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c315e94314fa'>111157ca09a9ff60fe4a9ba49173c315e94314fa (diff)
Cleanups and version bumpmame0148
Diffstat (limited to 'src')
-rw-r--r--src/build/makedep.c26
-rw-r--r--src/build/png2bdc.c44
-rw-r--r--src/build/verinfo.c8
-rw-r--r--src/emu/addrmap.c60
-rw-r--r--src/emu/addrmap.h118
-rw-r--r--src/emu/attotime.h26
-rw-r--r--src/emu/audit.c32
-rw-r--r--src/emu/audit.h34
-rw-r--r--src/emu/cheat.c64
-rw-r--r--src/emu/cheat.h98
-rw-r--r--src/emu/clifront.c54
-rw-r--r--src/emu/clifront.h64
-rw-r--r--src/emu/config.c10
-rw-r--r--src/emu/config.h14
-rw-r--r--src/emu/cpu/adsp2100/2100ops.c200
-rw-r--r--src/emu/cpu/adsp2100/adsp2100.c134
-rw-r--r--src/emu/cpu/adsp2100/adsp2100.h282
-rw-r--r--src/emu/cpu/alph8201/8201dasm.c176
-rw-r--r--src/emu/cpu/alph8201/alph8201.c680
-rw-r--r--src/emu/cpu/alph8201/alph8201.h16
-rw-r--r--src/emu/cpu/am29000/am29000.c1546
-rw-r--r--src/emu/cpu/am29000/am29000.h248
-rw-r--r--src/emu/cpu/am29000/am29dasm.c240
-rw-r--r--src/emu/cpu/am29000/am29ops.h208
-rw-r--r--src/emu/cpu/apexc/apexc.c242
-rw-r--r--src/emu/cpu/apexc/apexc.h16
-rw-r--r--src/emu/cpu/apexc/apexcdsm.c60
-rw-r--r--src/emu/cpu/arm/arm.c705
-rw-r--r--src/emu/cpu/arm/arm.h4
-rw-r--r--src/emu/cpu/arm/armdasm.c1
-rw-r--r--src/emu/cpu/arm7/arm7.c1366
-rw-r--r--src/emu/cpu/arm7/arm7core.c338
-rw-r--r--src/emu/cpu/arm7/arm7core.h332
-rw-r--r--src/emu/cpu/arm7/arm7dasm.c99
-rw-r--r--src/emu/cpu/arm7/arm7help.h181
-rw-r--r--src/emu/cpu/arm7/arm7ops.c2342
-rw-r--r--src/emu/cpu/arm7/arm7thmb.c866
-rw-r--r--src/emu/cpu/arm7/arm7thmb.h1
-rw-r--r--src/emu/cpu/asap/asap.c166
-rw-r--r--src/emu/cpu/asap/asap.h34
-rw-r--r--src/emu/cpu/asap/asapdasm.c76
-rw-r--r--src/emu/cpu/avr8/avr8.c2806
-rw-r--r--src/emu/cpu/avr8/avr8.h232
-rw-r--r--src/emu/cpu/avr8/avr8dasm.c1098
-rw-r--r--src/emu/cpu/ccpu/ccpu.c356
-rw-r--r--src/emu/cpu/ccpu/ccpu.h6
-rw-r--r--src/emu/cpu/ccpu/ccpudasm.c104
-rw-r--r--src/emu/cpu/cop400/cop400.c1030
-rw-r--r--src/emu/cpu/cop400/cop400.h18
-rw-r--r--src/emu/cpu/cop400/cop400op.c56
-rw-r--r--src/emu/cpu/cop400/cop410ds.c2
-rw-r--r--src/emu/cpu/cop400/cop420ds.c2
-rw-r--r--src/emu/cpu/cop400/cop440ds.c2
-rw-r--r--src/emu/cpu/cosmac/cosdasm.c58
-rw-r--r--src/emu/cpu/cosmac/cosmac.c492
-rw-r--r--src/emu/cpu/cosmac/cosmac.h98
-rw-r--r--src/emu/cpu/cp1610/1610dasm.c108
-rw-r--r--src/emu/cpu/cp1610/cp1610.c2696
-rw-r--r--src/emu/cpu/cp1610/cp1610.h8
-rw-r--r--src/emu/cpu/cpu.mak374
-rw-r--r--src/emu/cpu/cubeqcpu/cubedasm.c40
-rw-r--r--src/emu/cpu/cubeqcpu/cubeqcpu.c762
-rw-r--r--src/emu/cpu/cubeqcpu/cubeqcpu.h8
-rw-r--r--src/emu/cpu/drcbec.c764
-rw-r--r--src/emu/cpu/drcbec.h12
-rw-r--r--src/emu/cpu/drcbeut.c28
-rw-r--r--src/emu/cpu/drcbeut.h58
-rw-r--r--src/emu/cpu/drcbex64.c2356
-rw-r--r--src/emu/cpu/drcbex64.h80
-rw-r--r--src/emu/cpu/drcbex86.c2736
-rw-r--r--src/emu/cpu/drcbex86.h86
-rw-r--r--src/emu/cpu/drccache.c16
-rw-r--r--src/emu/cpu/drccache.h34
-rw-r--r--src/emu/cpu/drcfe.c20
-rw-r--r--src/emu/cpu/drcfe.h102
-rw-r--r--src/emu/cpu/drcuml.c62
-rw-r--r--src/emu/cpu/drcuml.h84
-rw-r--r--src/emu/cpu/drcumlsh.h276
-rw-r--r--src/emu/cpu/dsp16/dsp16.c78
-rw-r--r--src/emu/cpu/dsp16/dsp16.h14
-rw-r--r--src/emu/cpu/dsp16/dsp16dis.c4
-rw-r--r--src/emu/cpu/dsp16/dsp16ops.c22
-rw-r--r--src/emu/cpu/dsp32/dsp32.c230
-rw-r--r--src/emu/cpu/dsp32/dsp32.h100
-rw-r--r--src/emu/cpu/dsp32/dsp32dis.c118
-rw-r--r--src/emu/cpu/dsp32/dsp32ops.c740
-rw-r--r--src/emu/cpu/dsp56k/dsp56def.h62
-rw-r--r--src/emu/cpu/dsp56k/dsp56k.c328
-rw-r--r--src/emu/cpu/dsp56k/dsp56k.h14
-rw-r--r--src/emu/cpu/dsp56k/dsp56mem.c66
-rw-r--r--src/emu/cpu/dsp56k/dsp56ops.c805
-rw-r--r--src/emu/cpu/dsp56k/dsp56pcu.c10
-rw-r--r--src/emu/cpu/dsp56k/dsp56pcu.h40
-rw-r--r--src/emu/cpu/dsp56k/inst.c16
-rw-r--r--src/emu/cpu/dsp56k/inst.h258
-rw-r--r--src/emu/cpu/dsp56k/pmove.h4
-rw-r--r--src/emu/cpu/dsp56k/tables.c411
-rw-r--r--src/emu/cpu/dsp56k/tables.h26
-rw-r--r--src/emu/cpu/e132xs/32xsdasm.c50
-rw-r--r--src/emu/cpu/e132xs/e132xs.c1158
-rw-r--r--src/emu/cpu/e132xs/e132xs.h284
-rw-r--r--src/emu/cpu/esrip/esrip.c224
-rw-r--r--src/emu/cpu/esrip/esrip.h100
-rw-r--r--src/emu/cpu/f8/f8.c2002
-rw-r--r--src/emu/cpu/f8/f8.h20
-rw-r--r--src/emu/cpu/f8/f8dasm.c307
-rw-r--r--src/emu/cpu/g65816/g65816.c220
-rw-r--r--src/emu/cpu/g65816/g65816cm.h390
-rw-r--r--src/emu/cpu/g65816/g65816ds.c64
-rw-r--r--src/emu/cpu/g65816/g65816op.h1590
-rw-r--r--src/emu/cpu/h6280/6280dasm.c128
-rw-r--r--src/emu/cpu/h6280/h6280.c74
-rw-r--r--src/emu/cpu/h6280/h6280.h56
-rw-r--r--src/emu/cpu/h6280/h6280ops.h1266
-rw-r--r--src/emu/cpu/h6280/tblh6280.c442
-rw-r--r--src/emu/cpu/h83002/h8.h224
-rw-r--r--src/emu/cpu/h83002/h8_16.c327
-rw-r--r--src/emu/cpu/h83002/h8_8.c268
-rw-r--r--src/emu/cpu/h83002/h8disasm.c47
-rw-r--r--src/emu/cpu/h83002/h8ops.h105
-rw-r--r--src/emu/cpu/h83002/h8periph.c116
-rw-r--r--src/emu/cpu/h83002/h8priv.h24
-rw-r--r--src/emu/cpu/h83002/h8speriph.c177
-rw-r--r--src/emu/cpu/hcd62121/hcd62121.c143
-rw-r--r--src/emu/cpu/hcd62121/hcd62121.h1
-rw-r--r--src/emu/cpu/hcd62121/hcd62121_ops.h771
-rw-r--r--src/emu/cpu/hcd62121/hcd62121d.c59
-rw-r--r--src/emu/cpu/hd61700/hd61700.c670
-rw-r--r--src/emu/cpu/hd61700/hd61700.h38
-rw-r--r--src/emu/cpu/hd61700/hd61700d.c38
-rw-r--r--src/emu/cpu/hd6309/6309dasm.c88
-rw-r--r--src/emu/cpu/hd6309/6309ops.c935
-rw-r--r--src/emu/cpu/hd6309/6309tbl.c38
-rw-r--r--src/emu/cpu/hd6309/hd6309.c1496
-rw-r--r--src/emu/cpu/hd6309/hd6309.h4
-rw-r--r--src/emu/cpu/i386/cycles.h676
-rw-r--r--src/emu/cpu/i386/i386.c981
-rw-r--r--src/emu/cpu/i386/i386.h2
-rw-r--r--src/emu/cpu/i386/i386dasm.c3236
-rw-r--r--src/emu/cpu/i386/i386op16.c551
-rw-r--r--src/emu/cpu/i386/i386op32.c552
-rw-r--r--src/emu/cpu/i386/i386ops.c452
-rw-r--r--src/emu/cpu/i386/i386ops.h754
-rw-r--r--src/emu/cpu/i386/i386priv.h180
-rw-r--r--src/emu/cpu/i386/i486ops.c84
-rw-r--r--src/emu/cpu/i386/pentops.c20
-rw-r--r--src/emu/cpu/i386/x87ops.c355
-rw-r--r--src/emu/cpu/i4004/4004dasm.c74
-rw-r--r--src/emu/cpu/i4004/i4004.c110
-rw-r--r--src/emu/cpu/i8008/8008dasm.c80
-rw-r--r--src/emu/cpu/i8008/i8008.c48
-rw-r--r--src/emu/cpu/i8008/i8008.h32
-rw-r--r--src/emu/cpu/i8085/8085dasm.c1
-rw-r--r--src/emu/cpu/i8085/i8085.c732
-rw-r--r--src/emu/cpu/i8085/i8085.h34
-rw-r--r--src/emu/cpu/i8085/i8085cpu.h183
-rw-r--r--src/emu/cpu/i86/i286.c272
-rw-r--r--src/emu/cpu/i86/i86.c184
-rw-r--r--src/emu/cpu/i86/i86.h22
-rw-r--r--src/emu/cpu/i86/i86priv.h170
-rw-r--r--src/emu/cpu/i86/i86time.c554
-rw-r--r--src/emu/cpu/i86/instr186.c4
-rw-r--r--src/emu/cpu/i86/instr286.c25
-rw-r--r--src/emu/cpu/i86/instr86.c825
-rw-r--r--src/emu/cpu/i86/modrm.h116
-rw-r--r--src/emu/cpu/i86/modrm286.h188
-rw-r--r--src/emu/cpu/i86/table186.h556
-rw-r--r--src/emu/cpu/i86/table286.h514
-rw-r--r--src/emu/cpu/i86/table86.h556
-rw-r--r--src/emu/cpu/i860/i860.c538
-rw-r--r--src/emu/cpu/i860/i860.h37
-rw-r--r--src/emu/cpu/i860/i860dasm.c59
-rw-r--r--src/emu/cpu/i860/i860dec.c880
-rw-r--r--src/emu/cpu/i860/i860dis.c32
-rw-r--r--src/emu/cpu/i960/i960.c216
-rw-r--r--src/emu/cpu/i960/i960.h92
-rw-r--r--src/emu/cpu/i960/i960dis.c29
-rw-r--r--src/emu/cpu/i960/i960dis.h6
-rw-r--r--src/emu/cpu/jaguar/jagdasm.c141
-rw-r--r--src/emu/cpu/jaguar/jaguar.c564
-rw-r--r--src/emu/cpu/jaguar/jaguar.h18
-rw-r--r--src/emu/cpu/konami/knmidasm.c546
-rw-r--r--src/emu/cpu/konami/konami.c442
-rw-r--r--src/emu/cpu/konami/konami.h2
-rw-r--r--src/emu/cpu/konami/konamops.c518
-rw-r--r--src/emu/cpu/konami/konamtbl.c128
-rw-r--r--src/emu/cpu/lc8670/lc8670.c248
-rw-r--r--src/emu/cpu/lc8670/lc8670.h78
-rw-r--r--src/emu/cpu/lc8670/lc8670dsm.c32
-rw-r--r--src/emu/cpu/lh5801/5801tbl.c5
-rw-r--r--src/emu/cpu/lh5801/lh5801.c160
-rw-r--r--src/emu/cpu/lh5801/lh5801.h4
-rw-r--r--src/emu/cpu/lr35902/lr35902.c17
-rw-r--r--src/emu/cpu/lr35902/lr35902.h22
-rw-r--r--src/emu/cpu/lr35902/lr35902d.c18
-rw-r--r--src/emu/cpu/lr35902/opc_cb.h1506
-rw-r--r--src/emu/cpu/lr35902/opc_main.h1106
-rw-r--r--src/emu/cpu/m37710/m37710.c300
-rw-r--r--src/emu/cpu/m37710/m37710cm.h404
-rw-r--r--src/emu/cpu/m37710/m37710op.h2272
-rw-r--r--src/emu/cpu/m37710/m7700ds.c77
-rw-r--r--src/emu/cpu/m6502/ddeco16.lst32
-rw-r--r--src/emu/cpu/m6502/dm4510.lst32
-rw-r--r--src/emu/cpu/m6502/dm6502.lst32
-rw-r--r--src/emu/cpu/m6502/dm6509.lst32
-rw-r--r--src/emu/cpu/m6502/dm6510.lst32
-rw-r--r--src/emu/cpu/m6502/dm65c02.lst32
-rw-r--r--src/emu/cpu/m6502/dm65ce02.lst32
-rw-r--r--src/emu/cpu/m6502/dm740.lst32
-rw-r--r--src/emu/cpu/m6502/dn2a03.lst32
-rw-r--r--src/emu/cpu/m6502/dr65c02.lst32
-rw-r--r--src/emu/cpu/m6502/m6502.c12
-rw-r--r--src/emu/cpu/m6502/m6502.h52
-rw-r--r--src/emu/cpu/m6502/m65ce02.c14
-rw-r--r--src/emu/cpu/m6502/om740.lst1
-rw-r--r--src/emu/cpu/m6800/6800dasm.c66
-rw-r--r--src/emu/cpu/m6800/6800ops.c58
-rw-r--r--src/emu/cpu/m6800/6800tbl.c108
-rw-r--r--src/emu/cpu/m6800/m6800.c613
-rw-r--r--src/emu/cpu/m6800/m6800.h7
-rw-r--r--src/emu/cpu/m68000/68307bus.h1
-rw-r--r--src/emu/cpu/m68000/68307ser.c1
-rw-r--r--src/emu/cpu/m68000/68307ser.h1
-rw-r--r--src/emu/cpu/m68000/68307sim.c16
-rw-r--r--src/emu/cpu/m68000/68307tmu.c1
-rw-r--r--src/emu/cpu/m68000/68307tmu.h1
-rw-r--r--src/emu/cpu/m68000/68340dma.h1
-rw-r--r--src/emu/cpu/m68000/68340ser.h1
-rw-r--r--src/emu/cpu/m68000/68340sim.c16
-rw-r--r--src/emu/cpu/m68000/68340sim.h1
-rw-r--r--src/emu/cpu/m68000/68340tmu.h1
-rw-r--r--src/emu/cpu/m68000/m68000.h8
-rw-r--r--src/emu/cpu/m68000/m68k_in.c392
-rw-r--r--src/emu/cpu/m68000/m68kcpu.c1344
-rw-r--r--src/emu/cpu/m68000/m68kcpu.h138
-rw-r--r--src/emu/cpu/m68000/m68kdasm.c228
-rw-r--r--src/emu/cpu/m68000/m68kfpu.c583
-rw-r--r--src/emu/cpu/m68000/m68kmake.c174
-rw-r--r--src/emu/cpu/m68000/m68kmmu.h100
-rw-r--r--src/emu/cpu/m6805/6805dasm.c130
-rw-r--r--src/emu/cpu/m6805/6805ops.c48
-rw-r--r--src/emu/cpu/m6805/m6805.c118
-rw-r--r--src/emu/cpu/m6805/m6805.h104
-rw-r--r--src/emu/cpu/m6809/6809dasm.c74
-rw-r--r--src/emu/cpu/m6809/6809ops.c223
-rw-r--r--src/emu/cpu/m6809/6809tbl.c62
-rw-r--r--src/emu/cpu/m6809/m6809.c868
-rw-r--r--src/emu/cpu/m6809/m6809.h42
-rw-r--r--src/emu/cpu/mb86233/mb86233.c658
-rw-r--r--src/emu/cpu/mb86233/mb86233d.c250
-rw-r--r--src/emu/cpu/mb88xx/mb88xx.c442
-rw-r--r--src/emu/cpu/mb88xx/mb88xx.h22
-rw-r--r--src/emu/cpu/mc68hc11/hc11dasm.c2048
-rw-r--r--src/emu/cpu/mc68hc11/hc11ops.c72
-rw-r--r--src/emu/cpu/mc68hc11/hc11ops.h532
-rw-r--r--src/emu/cpu/mc68hc11/mc68hc11.c260
-rw-r--r--src/emu/cpu/mc68hc11/mc68hc11.h42
-rw-r--r--src/emu/cpu/mcs48/mcs48.c812
-rw-r--r--src/emu/cpu/mcs48/mcs48.h58
-rw-r--r--src/emu/cpu/mcs48/mcs48dsm.c492
-rw-r--r--src/emu/cpu/mcs51/mcs51.c1444
-rw-r--r--src/emu/cpu/mcs51/mcs51.h34
-rw-r--r--src/emu/cpu/mcs51/mcs51dasm.c498
-rw-r--r--src/emu/cpu/mcs51/mcs51ops.c500
-rw-r--r--src/emu/cpu/mcs96/i8x9x.c6
-rw-r--r--src/emu/cpu/mcs96/i8xc196.h2
-rw-r--r--src/emu/cpu/mcs96/mcs96.c34
-rw-r--r--src/emu/cpu/mcs96/mcs96.h46
-rw-r--r--src/emu/cpu/mcs96/mcs96ops.lst2
-rw-r--r--src/emu/cpu/minx/minx.c202
-rw-r--r--src/emu/cpu/minx/minx.h6
-rw-r--r--src/emu/cpu/minx/minxd.c216
-rw-r--r--src/emu/cpu/minx/minxfunc.h38
-rw-r--r--src/emu/cpu/minx/minxopce.h4
-rw-r--r--src/emu/cpu/minx/minxopcf.h16
-rw-r--r--src/emu/cpu/minx/minxops.h24
-rw-r--r--src/emu/cpu/mips/mips3.c1048
-rw-r--r--src/emu/cpu/mips/mips3.h38
-rw-r--r--src/emu/cpu/mips/mips3com.c742
-rw-r--r--src/emu/cpu/mips/mips3com.h242
-rw-r--r--src/emu/cpu/mips/mips3drc.c2159
-rw-r--r--src/emu/cpu/mips/mips3dsm.c516
-rw-r--r--src/emu/cpu/mips/mips3fe.c422
-rw-r--r--src/emu/cpu/mips/mips3fe.h10
-rw-r--r--src/emu/cpu/mips/r3000.c886
-rw-r--r--src/emu/cpu/mips/r3000.h18
-rw-r--r--src/emu/cpu/mips/r3kdasm.c404
-rw-r--r--src/emu/cpu/mn10200/mn10200.c662
-rw-r--r--src/emu/cpu/mn10200/mn102dis.c47
-rw-r--r--src/emu/cpu/nec/nec.c282
-rw-r--r--src/emu/cpu/nec/nec.h2
-rw-r--r--src/emu/cpu/nec/necdasm.c1405
-rw-r--r--src/emu/cpu/nec/necinstr.c580
-rw-r--r--src/emu/cpu/nec/necinstr.h512
-rw-r--r--src/emu/cpu/nec/necmacro.h398
-rw-r--r--src/emu/cpu/nec/necmodrm.h124
-rw-r--r--src/emu/cpu/nec/necpriv.h112
-rw-r--r--src/emu/cpu/nec/v25.c300
-rw-r--r--src/emu/cpu/nec/v25instr.c94
-rw-r--r--src/emu/cpu/nec/v25instr.h512
-rw-r--r--src/emu/cpu/nec/v25priv.h204
-rw-r--r--src/emu/cpu/nec/v25sfr.c30
-rw-r--r--src/emu/cpu/pdp1/pdp1.c952
-rw-r--r--src/emu/cpu/pdp1/pdp1.h8
-rw-r--r--src/emu/cpu/pdp1/pdp1dasm.c2
-rw-r--r--src/emu/cpu/pdp1/tx0.c802
-rw-r--r--src/emu/cpu/pdp1/tx0.h24
-rw-r--r--src/emu/cpu/pic16c5x/16c5xdsm.c68
-rw-r--r--src/emu/cpu/pic16c5x/dis16c5x.c22
-rw-r--r--src/emu/cpu/pic16c5x/pic16c5x.c666
-rw-r--r--src/emu/cpu/pic16c5x/pic16c5x.h24
-rw-r--r--src/emu/cpu/pic16c62x/16c62xdsm.c74
-rw-r--r--src/emu/cpu/pic16c62x/dis16c62x.c26
-rw-r--r--src/emu/cpu/pic16c62x/pic16c62x.c651
-rw-r--r--src/emu/cpu/pic16c62x/pic16c62x.h32
-rw-r--r--src/emu/cpu/powerpc/drc_ops.c245
-rw-r--r--src/emu/cpu/powerpc/drc_ops.h278
-rw-r--r--src/emu/cpu/powerpc/ppc.c1065
-rw-r--r--src/emu/cpu/powerpc/ppc.h34
-rw-r--r--src/emu/cpu/powerpc/ppc403.c267
-rw-r--r--src/emu/cpu/powerpc/ppc602.c30
-rw-r--r--src/emu/cpu/powerpc/ppc603.c20
-rw-r--r--src/emu/cpu/powerpc/ppc_dasm.c878
-rw-r--r--src/emu/cpu/powerpc/ppc_mem.c40
-rw-r--r--src/emu/cpu/powerpc/ppc_ops.c192
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-rw-r--r--src/osd/sdl/draw13.c260
-rw-r--r--src/osd/sdl/drawogl.c804
-rw-r--r--src/osd/sdl/drawsdl.c126
-rw-r--r--src/osd/sdl/dview.c40
-rw-r--r--src/osd/sdl/dview.h28
-rw-r--r--src/osd/sdl/gl_shader_mgr.c69
-rw-r--r--src/osd/sdl/gl_shader_tool.c212
-rw-r--r--src/osd/sdl/gl_shader_tool.h30
-rw-r--r--src/osd/sdl/input.c1242
-rw-r--r--src/osd/sdl/netdev.c20
-rw-r--r--src/osd/sdl/netdev_pcap.c14
-rw-r--r--src/osd/sdl/netdev_tap.c6
-rw-r--r--src/osd/sdl/osd_opengl.h2922
-rw-r--r--src/osd/sdl/osdsdl.h150
-rw-r--r--src/osd/sdl/output.c2
-rw-r--r--src/osd/sdl/sdl.mak24
-rw-r--r--src/osd/sdl/sdldir.c3
-rw-r--r--src/osd/sdl/sdlfile.c136
-rw-r--r--src/osd/sdl/sdlfile.h6
-rw-r--r--src/osd/sdl/sdlmain.c246
-rw-r--r--src/osd/sdl/sdlmisc_os2.c1
-rw-r--r--src/osd/sdl/sdlmisc_win32.c1
-rw-r--r--src/osd/sdl/sdlos.h2
-rw-r--r--src/osd/sdl/sdlos_macosx.c10
-rw-r--r--src/osd/sdl/sdlos_os2.c20
-rw-r--r--src/osd/sdl/sdlos_unix.c4
-rw-r--r--src/osd/sdl/sdlos_win32.c12
-rw-r--r--src/osd/sdl/sdlprefix.h5
-rw-r--r--src/osd/sdl/sdlsync.h2
-rw-r--r--src/osd/sdl/sdlsync_ntc.c44
-rw-r--r--src/osd/sdl/sdlsync_os2.c136
-rw-r--r--src/osd/sdl/sdlsync_sdl.c21
-rw-r--r--src/osd/sdl/sdlsync_tc.c34
-rw-r--r--src/osd/sdl/sdlsync_win32.c18
-rw-r--r--src/osd/sdl/sdlwork.c104
-rw-r--r--src/osd/sdl/shader/glsl_bilinear_idx16_lut.fsh.c66
-rw-r--r--src/osd/sdl/shader/glsl_bilinear_rgb32_dir.fsh.c56
-rw-r--r--src/osd/sdl/shader/glsl_bilinear_rgb32_lut.fsh.c68
-rw-r--r--src/osd/sdl/shader/glsl_general.vsh.c4
-rw-r--r--src/osd/sdl/shader/glsl_plain_idx16_lut.fsh.c24
-rw-r--r--src/osd/sdl/shader/glsl_plain_rgb32_dir.fsh.c12
-rw-r--r--src/osd/sdl/shader/glsl_plain_rgb32_lut.fsh.c22
-rw-r--r--src/osd/sdl/sound.c51
-rw-r--r--src/osd/sdl/strconv.c1
-rw-r--r--src/osd/sdl/strconv.h9
-rw-r--r--src/osd/sdl/testkeys.c89
-rw-r--r--src/osd/sdl/texcopy.c42
-rw-r--r--src/osd/sdl/texsrc.h12
-rw-r--r--src/osd/sdl/video.c33
-rw-r--r--src/osd/sdl/video.h118
-rw-r--r--src/osd/sdl/watchdog.h16
-rw-r--r--src/osd/sdl/window.c97
-rw-r--r--src/osd/sdl/window.h54
-rw-r--r--src/osd/windows/d3d8intf.c28
-rw-r--r--src/osd/windows/d3d9intf.c28
-rw-r--r--src/osd/windows/d3dcomm.h62
-rw-r--r--src/osd/windows/d3dhlsl.c10
-rw-r--r--src/osd/windows/d3dhlsl.h228
-rw-r--r--src/osd/windows/d3dintf.h34
-rw-r--r--src/osd/windows/debugwin.c120
-rw-r--r--src/osd/windows/drawd3d.c94
-rw-r--r--src/osd/windows/drawd3d.h106
-rw-r--r--src/osd/windows/drawdd.c84
-rw-r--r--src/osd/windows/drawgdi.c32
-rw-r--r--src/osd/windows/eivcx86.h250
-rw-r--r--src/osd/windows/input.c352
-rw-r--r--src/osd/windows/ledutil.c90
-rw-r--r--src/osd/windows/netdev_pcap.c1
-rw-r--r--src/osd/windows/output.c32
-rw-r--r--src/osd/windows/output.h22
-rw-r--r--src/osd/windows/sound.c52
-rw-r--r--src/osd/windows/strconv.h8
-rw-r--r--src/osd/windows/vconv.c148
-rw-r--r--src/osd/windows/video.h56
-rw-r--r--src/osd/windows/windir.c9
-rw-r--r--src/osd/windows/window.c46
-rw-r--r--src/osd/windows/window.h56
-rw-r--r--src/osd/windows/windows.mak12
-rw-r--r--src/osd/windows/winfile.c12
-rw-r--r--src/osd/windows/winfile.h8
-rw-r--r--src/osd/windows/winmain.c254
-rw-r--r--src/osd/windows/winmain.h170
-rw-r--r--src/osd/windows/winmisc.c4
-rw-r--r--src/osd/windows/winprefix.h4
-rw-r--r--src/osd/windows/winsocket.c2
-rw-r--r--src/osd/windows/winsync.c4
-rw-r--r--src/osd/windows/winutf8.c4
-rw-r--r--src/osd/windows/winutf8.h4
-rw-r--r--src/osd/windows/winwork.c104
-rw-r--r--src/tools/chdman.c526
-rw-r--r--src/tools/jedutil.c4080
-rw-r--r--src/tools/ldresample.c38
-rw-r--r--src/tools/ldverify.c12
-rw-r--r--src/tools/regrep.c234
-rw-r--r--src/tools/romcmp.c11
-rw-r--r--src/tools/split.c4
-rw-r--r--src/tools/src2html.c22
-rw-r--r--src/tools/unidasm.c118
-rw-r--r--src/ume/ume.c32
-rw-r--r--src/version.c2
5958 files changed, 465594 insertions, 466991 deletions
diff --git a/src/build/makedep.c b/src/build/makedep.c
index 7a4e0aa9367..694b81f0e76 100644
--- a/src/build/makedep.c
+++ b/src/build/makedep.c
@@ -50,7 +50,7 @@
CONSTANTS
***************************************************************************/
-#define HASH_SIZE 193
+#define HASH_SIZE 193
/***************************************************************************
@@ -59,24 +59,24 @@
struct include_path
{
- include_path * next;
- astring path;
+ include_path * next;
+ astring path;
};
struct exclude_path
{
- exclude_path * next;
- astring path;
- int pathlen;
- UINT8 recursive;
+ exclude_path * next;
+ astring path;
+ int pathlen;
+ UINT8 recursive;
};
struct list_entry
{
- list_entry * next;
- astring name;
+ list_entry * next;
+ astring name;
};
@@ -84,15 +84,15 @@ struct file_entry;
struct dependency
{
- dependency * next;
- file_entry * file;
+ dependency * next;
+ file_entry * file;
};
struct file_entry
{
- astring name;
- dependency * deplist;
+ astring name;
+ dependency * deplist;
};
typedef tagmap_t<UINT8> dependency_map;
diff --git a/src/build/png2bdc.c b/src/build/png2bdc.c
index 643a96ab5b8..e05633d12c4 100644
--- a/src/build/png2bdc.c
+++ b/src/build/png2bdc.c
@@ -58,8 +58,8 @@
CONSTANTS & DEFINES
***************************************************************************/
-#define CACHED_CHAR_SIZE 12
-#define CACHED_HEADER_SIZE 16
+#define CACHED_CHAR_SIZE 12
+#define CACHED_HEADER_SIZE 16
@@ -70,19 +70,19 @@
/* a render_font contains information about a single character in a font */
struct render_font_char
{
- INT32 width; /* width from this character to the next */
- INT32 xoffs, yoffs; /* X and Y offset from baseline to top,left of bitmap */
- INT32 bmwidth, bmheight; /* width and height of bitmap */
- bitmap_argb32 * bitmap; /* pointer to the bitmap containing the raw data */
+ INT32 width; /* width from this character to the next */
+ INT32 xoffs, yoffs; /* X and Y offset from baseline to top,left of bitmap */
+ INT32 bmwidth, bmheight; /* width and height of bitmap */
+ bitmap_argb32 * bitmap; /* pointer to the bitmap containing the raw data */
};
/* a render_font contains information about a font */
struct render_font
{
- int height; /* height of the font, from ascent to descent */
- int yoffs; /* y offset from baseline to descent */
- render_font_char chars[65536]; /* array of characters */
+ int height; /* height of the font, from ascent to descent */
+ int yoffs; /* y offset from baseline to descent */
+ render_font_char chars[65536]; /* array of characters */
};
@@ -396,12 +396,12 @@ int main(int argc, char *argv[])
int curarg;
/* validate arguments */
- if (argc < 3)
- {
- fprintf(stderr, "Usage:\n%s <input.png> [<input2.png> [...]] <output.bdc>\n", argv[0]);
- return 1;
- }
- bdcname = argv[argc - 1];
+ if (argc < 3)
+ {
+ fprintf(stderr, "Usage:\n%s <input.png> [<input2.png> [...]] <output.bdc>\n", argv[0]);
+ return 1;
+ }
+ bdcname = argv[argc - 1];
/* allocate a font */
font = (render_font *)malloc(sizeof(*font));
@@ -412,16 +412,16 @@ int main(int argc, char *argv[])
/* iterate over input files */
for (curarg = 1; curarg < argc - 1; curarg++)
{
- /* load the png file */
+ /* load the png file */
const char *pngname = argv[curarg];
core_file *file;
file_error filerr = core_fopen(pngname, OPEN_FLAG_READ, &file);
if (filerr != FILERR_NONE)
- {
- fprintf(stderr, "Error %d attempting to open PNG file\n", filerr);
- error = TRUE;
- break;
- }
+ {
+ fprintf(stderr, "Error %d attempting to open PNG file\n", filerr);
+ error = TRUE;
+ break;
+ }
bitmap_argb32 bitmap;
png_error pngerr = png_read_bitmap(file, bitmap);
@@ -445,5 +445,5 @@ int main(int argc, char *argv[])
/* cleanup after ourselves */
free(font);
- return error;
+ return error;
}
diff --git a/src/build/verinfo.c b/src/build/verinfo.c
index fe692bbf4cf..3c9b495a97b 100644
--- a/src/build/verinfo.c
+++ b/src/build/verinfo.c
@@ -15,10 +15,10 @@
typedef unsigned char UINT8;
-#define ARRAY_LENGTH(x) (sizeof(x) / sizeof(x[0]))
-#define BUILD_MAME (0)
-#define BUILD_MESS (1)
-#define BUILD_UME (2)
+#define ARRAY_LENGTH(x) (sizeof(x) / sizeof(x[0]))
+#define BUILD_MAME (0)
+#define BUILD_MESS (1)
+#define BUILD_UME (2)
//============================================================
// TYPE DEFINITIONS
diff --git a/src/emu/addrmap.c b/src/emu/addrmap.c
index ae726df8df1..29058448348 100644
--- a/src/emu/addrmap.c
+++ b/src/emu/addrmap.c
@@ -50,27 +50,27 @@
address_map_entry::address_map_entry(address_map &map, offs_t start, offs_t end)
: m_next(NULL),
- m_map(map),
- m_addrstart((map.m_globalmask == 0) ? start : start & map.m_globalmask),
- m_addrend((map.m_globalmask == 0) ? end : end & map.m_globalmask),
- m_addrmirror(0),
- m_addrmask(0),
- m_share(NULL),
- m_region(NULL),
- m_rgnoffs(0),
- m_rspace8(NULL),
- m_rspace16(NULL),
- m_rspace32(NULL),
- m_rspace64(NULL),
- m_wspace8(NULL),
- m_wspace16(NULL),
- m_wspace32(NULL),
- m_wspace64(NULL),
- m_memory(NULL),
- m_bytestart(0),
- m_byteend(0),
- m_bytemirror(0),
- m_bytemask(0)
+ m_map(map),
+ m_addrstart((map.m_globalmask == 0) ? start : start & map.m_globalmask),
+ m_addrend((map.m_globalmask == 0) ? end : end & map.m_globalmask),
+ m_addrmirror(0),
+ m_addrmask(0),
+ m_share(NULL),
+ m_region(NULL),
+ m_rgnoffs(0),
+ m_rspace8(NULL),
+ m_rspace16(NULL),
+ m_rspace32(NULL),
+ m_rspace64(NULL),
+ m_wspace8(NULL),
+ m_wspace16(NULL),
+ m_wspace32(NULL),
+ m_wspace64(NULL),
+ m_memory(NULL),
+ m_bytestart(0),
+ m_byteend(0),
+ m_bytemirror(0),
+ m_bytemask(0)
{
}
@@ -560,9 +560,9 @@ address_map_entry64::address_map_entry64(address_map &map, offs_t start, offs_t
address_map::address_map(device_t &device, address_spacenum spacenum)
: m_spacenum(spacenum),
- m_databits(0xff),
- m_unmapval(0),
- m_globalmask(0)
+ m_databits(0xff),
+ m_unmapval(0),
+ m_globalmask(0)
{
// get our memory interface
const device_memory_interface *memintf;
@@ -595,9 +595,9 @@ address_map::address_map(device_t &device, address_spacenum spacenum)
address_map::address_map(device_t &device, address_map_entry *entry)
: m_spacenum(AS_PROGRAM),
- m_databits(0xff),
- m_unmapval(0),
- m_globalmask(0)
+ m_databits(0xff),
+ m_unmapval(0),
+ m_globalmask(0)
{
// Retrieve the submap
entry->m_submap_delegate.late_bind(device);
@@ -612,9 +612,9 @@ address_map::address_map(device_t &device, address_map_entry *entry)
address_map::address_map(const address_space &space, offs_t start, offs_t end, int bits, UINT64 unitmask, device_t &device, address_map_delegate submap_delegate)
: m_spacenum(space.spacenum()),
- m_databits(space.data_width()),
- m_unmapval(space.unmap()),
- m_globalmask(space.bytemask())
+ m_databits(space.data_width()),
+ m_unmapval(space.unmap()),
+ m_globalmask(space.bytemask())
{
address_map_entry *e;
switch(m_databits) {
diff --git a/src/emu/addrmap.h b/src/emu/addrmap.h
index 4c7862a5d21..1fe20c90233 100644
--- a/src/emu/addrmap.h
+++ b/src/emu/addrmap.h
@@ -79,18 +79,18 @@ class map_handler_data
public:
map_handler_data()
: m_type(AMH_NONE),
- m_bits(0),
- m_mask(0),
- m_name(NULL),
- m_devbase(NULL),
- m_tag(NULL) { }
-
- map_handler_type m_type; // type of the handler
- UINT8 m_bits; // width of the handler in bits, or 0 for default
- UINT64 m_mask; // mask for which lanes apply
- const char * m_name; // name of the handler
- device_t * m_devbase; // pointer to "base" device
- const char * m_tag; // tag for I/O ports and banks
+ m_bits(0),
+ m_mask(0),
+ m_name(NULL),
+ m_devbase(NULL),
+ m_tag(NULL) { }
+
+ map_handler_type m_type; // type of the handler
+ UINT8 m_bits; // width of the handler in bits, or 0 for default
+ UINT64 m_mask; // mask for which lanes apply
+ const char * m_name; // name of the handler
+ device_t * m_devbase; // pointer to "base" device
+ const char * m_tag; // tag for I/O ports and banks
};
@@ -131,48 +131,48 @@ public:
void set_submap(device_t &device, const char *tag, address_map_delegate func, int bits, UINT64 mask);
// public state
- address_map_entry * m_next; // pointer to the next entry
- address_map & m_map; // reference to our owning map
- astring m_region_string; // string used to hold derived names
+ address_map_entry * m_next; // pointer to the next entry
+ address_map & m_map; // reference to our owning map
+ astring m_region_string; // string used to hold derived names
// basic information
- offs_t m_addrstart; // start address
- offs_t m_addrend; // end address
- offs_t m_addrmirror; // mirror bits
- offs_t m_addrmask; // mask bits
- map_handler_data m_read; // data for read handler
- map_handler_data m_write; // data for write handler
- const char * m_share; // tag of a shared memory block
- const char * m_region; // tag of region containing the memory backing this entry
- offs_t m_rgnoffs; // offset within the region
+ offs_t m_addrstart; // start address
+ offs_t m_addrend; // end address
+ offs_t m_addrmirror; // mirror bits
+ offs_t m_addrmask; // mask bits
+ map_handler_data m_read; // data for read handler
+ map_handler_data m_write; // data for write handler
+ const char * m_share; // tag of a shared memory block
+ const char * m_region; // tag of region containing the memory backing this entry
+ offs_t m_rgnoffs; // offset within the region
// handlers
- read8_delegate m_rproto8; // 8-bit read proto-delegate
- read16_delegate m_rproto16; // 16-bit read proto-delegate
- read32_delegate m_rproto32; // 32-bit read proto-delegate
- read64_delegate m_rproto64; // 64-bit read proto-delegate
- read8_space_func m_rspace8; // 8-bit legacy address space handler
- read16_space_func m_rspace16; // 16-bit legacy address space handler
- read32_space_func m_rspace32; // 32-bit legacy address space handler
- read64_space_func m_rspace64; // 64-bit legacy address space handler
- write8_delegate m_wproto8; // 8-bit write proto-delegate
- write16_delegate m_wproto16; // 16-bit write proto-delegate
- write32_delegate m_wproto32; // 32-bit write proto-delegate
- write64_delegate m_wproto64; // 64-bit write proto-delegate
- write8_space_func m_wspace8; // 8-bit legacy address space handler
- write16_space_func m_wspace16; // 16-bit legacy address space handler
- write32_space_func m_wspace32; // 32-bit legacy address space handler
- write64_space_func m_wspace64; // 64-bit legacy address space handler
-
- address_map_delegate m_submap_delegate;
- int m_submap_bits;
+ read8_delegate m_rproto8; // 8-bit read proto-delegate
+ read16_delegate m_rproto16; // 16-bit read proto-delegate
+ read32_delegate m_rproto32; // 32-bit read proto-delegate
+ read64_delegate m_rproto64; // 64-bit read proto-delegate
+ read8_space_func m_rspace8; // 8-bit legacy address space handler
+ read16_space_func m_rspace16; // 16-bit legacy address space handler
+ read32_space_func m_rspace32; // 32-bit legacy address space handler
+ read64_space_func m_rspace64; // 64-bit legacy address space handler
+ write8_delegate m_wproto8; // 8-bit write proto-delegate
+ write16_delegate m_wproto16; // 16-bit write proto-delegate
+ write32_delegate m_wproto32; // 32-bit write proto-delegate
+ write64_delegate m_wproto64; // 64-bit write proto-delegate
+ write8_space_func m_wspace8; // 8-bit legacy address space handler
+ write16_space_func m_wspace16; // 16-bit legacy address space handler
+ write32_space_func m_wspace32; // 32-bit legacy address space handler
+ write64_space_func m_wspace64; // 64-bit legacy address space handler
+
+ address_map_delegate m_submap_delegate;
+ int m_submap_bits;
// information used during processing
- void * m_memory; // pointer to memory backing this entry
- offs_t m_bytestart; // byte-adjusted start address
- offs_t m_byteend; // byte-adjusted end address
- offs_t m_bytemirror; // byte-adjusted mirror bits
- offs_t m_bytemask; // byte-adjusted mask bits
+ void * m_memory; // pointer to memory backing this entry
+ offs_t m_bytestart; // byte-adjusted start address
+ offs_t m_byteend; // byte-adjusted end address
+ offs_t m_bytemirror; // byte-adjusted mirror bits
+ offs_t m_bytemask; // byte-adjusted mask bits
protected:
// internal handler setters for 8-bit functions
@@ -359,11 +359,11 @@ public:
address_map_entry64 *add(offs_t start, offs_t end, address_map_entry64 *ptr);
// public data
- address_spacenum m_spacenum; // space number of the map
- UINT8 m_databits; // data bits represented by the map
- UINT8 m_unmapval; // unmapped memory value
- offs_t m_globalmask; // global mask
- simple_list<address_map_entry> m_entrylist; // list of entries
+ address_spacenum m_spacenum; // space number of the map
+ UINT8 m_databits; // data bits represented by the map
+ UINT8 m_unmapval; // unmapped memory value
+ offs_t m_globalmask; // global mask
+ simple_list<address_map_entry> m_entrylist; // list of entries
void uplift_submaps(running_machine &machine, device_t &device, device_t &owner, endianness_t endian);
};
@@ -664,14 +664,14 @@ void _class :: _name(::address_map &map, device_t &device) \
// common shortcuts
-#define AM_ROMBANK(_bank) AM_READ_BANK(_bank)
-#define AM_RAMBANK(_bank) AM_READWRITE_BANK(_bank)
-#define AM_RAM_READ(_read) AM_READ(_read) AM_WRITEONLY
-#define AM_RAM_WRITE(_write) AM_READONLY AM_WRITE(_write)
+#define AM_ROMBANK(_bank) AM_READ_BANK(_bank)
+#define AM_RAMBANK(_bank) AM_READWRITE_BANK(_bank)
+#define AM_RAM_READ(_read) AM_READ(_read) AM_WRITEONLY
+#define AM_RAM_WRITE(_write) AM_READONLY AM_WRITE(_write)
#define AM_RAM_DEVREAD(_tag, _class, _read) AM_DEVREAD(_tag, _class, _read) AM_WRITEONLY
#define AM_RAM_DEVWRITE(_tag, _class, _write) AM_READONLY AM_DEVWRITE(_tag, _class, _write)
-#define AM_RAM_WRITE_LEGACY(_write) AM_READONLY AM_WRITE_LEGACY(_write)
+#define AM_RAM_WRITE_LEGACY(_write) AM_READONLY AM_WRITE_LEGACY(_write)
#define AM_RAM_DEVWRITE_LEGACY(_tag, _write) AM_READONLY AM_DEVWRITE_LEGACY(_tag, _write)
@@ -688,4 +688,4 @@ static const char DEVICE_SELF[] = "";
static const char DEVICE_SELF_OWNER[] = "^";
-#endif /* __ADDRMAP_H__ */
+#endif /* __ADDRMAP_H__ */
diff --git a/src/emu/attotime.h b/src/emu/attotime.h
index 69421423b94..e10072efdce 100644
--- a/src/emu/attotime.h
+++ b/src/emu/attotime.h
@@ -94,18 +94,18 @@ const seconds_t ATTOTIME_MAX_SECONDS = 1000000000;
//**************************************************************************
// convert between a double and attoseconds
-#define ATTOSECONDS_TO_DOUBLE(x) ((double)(x) * 1e-18)
-#define DOUBLE_TO_ATTOSECONDS(x) ((attoseconds_t)((x) * 1e18))
+#define ATTOSECONDS_TO_DOUBLE(x) ((double)(x) * 1e-18)
+#define DOUBLE_TO_ATTOSECONDS(x) ((attoseconds_t)((x) * 1e18))
// convert between hertz (as a double) and attoseconds
-#define ATTOSECONDS_TO_HZ(x) ((double)ATTOSECONDS_PER_SECOND / (double)(x))
-#define HZ_TO_ATTOSECONDS(x) ((attoseconds_t)(ATTOSECONDS_PER_SECOND / (x)))
+#define ATTOSECONDS_TO_HZ(x) ((double)ATTOSECONDS_PER_SECOND / (double)(x))
+#define HZ_TO_ATTOSECONDS(x) ((attoseconds_t)(ATTOSECONDS_PER_SECOND / (x)))
// macros for converting other seconds types to attoseconds
-#define ATTOSECONDS_IN_SEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_SECOND)
-#define ATTOSECONDS_IN_MSEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_MILLISECOND)
-#define ATTOSECONDS_IN_USEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_MICROSECOND)
-#define ATTOSECONDS_IN_NSEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_NANOSECOND)
+#define ATTOSECONDS_IN_SEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_SECOND)
+#define ATTOSECONDS_IN_MSEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_MILLISECOND)
+#define ATTOSECONDS_IN_USEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_MICROSECOND)
+#define ATTOSECONDS_IN_NSEC(x) ((attoseconds_t)(x) * ATTOSECONDS_PER_NANOSECOND)
@@ -120,11 +120,11 @@ public:
// construction/destruction
attotime()
: seconds(0),
- attoseconds(0) { }
+ attoseconds(0) { }
attotime(seconds_t secs, attoseconds_t attos)
: seconds(secs),
- attoseconds(attos) { }
+ attoseconds(attos) { }
// queries
bool is_zero() const { return (seconds == 0 && attoseconds == 0); }
@@ -152,8 +152,8 @@ public:
attotime &operator/=(UINT32 factor);
// members
- seconds_t seconds;
- attoseconds_t attoseconds;
+ seconds_t seconds;
+ attoseconds_t attoseconds;
// constants
static const attotime never;
@@ -431,4 +431,4 @@ inline attotime attotime::from_double(double _time)
}
-#endif // __ATTOTIME_H__
+#endif // __ATTOTIME_H__
diff --git a/src/emu/audit.c b/src/emu/audit.c
index 5a6c0c588ac..2bec6e764eb 100644
--- a/src/emu/audit.c
+++ b/src/emu/audit.c
@@ -54,8 +54,8 @@
media_auditor::media_auditor(const driver_enumerator &enumerator)
: m_enumerator(enumerator),
- m_validation(AUDIT_VALIDATE_FULL),
- m_searchpath(NULL)
+ m_validation(AUDIT_VALIDATE_FULL),
+ m_searchpath(NULL)
{
}
@@ -599,25 +599,25 @@ device_t *media_auditor::find_shared_device(device_t &device, const char *name,
audit_record::audit_record(const rom_entry &media, media_type type)
: m_next(NULL),
- m_type(type),
- m_status(STATUS_ERROR),
- m_substatus(SUBSTATUS_ERROR),
- m_name(ROM_GETNAME(&media)),
- m_explength(rom_file_size(&media)),
- m_length(0),
- m_shared_device(NULL)
+ m_type(type),
+ m_status(STATUS_ERROR),
+ m_substatus(SUBSTATUS_ERROR),
+ m_name(ROM_GETNAME(&media)),
+ m_explength(rom_file_size(&media)),
+ m_length(0),
+ m_shared_device(NULL)
{
m_exphashes.from_internal_string(ROM_GETHASHDATA(&media));
}
audit_record::audit_record(const char *name, media_type type)
: m_next(NULL),
- m_type(type),
- m_status(STATUS_ERROR),
- m_substatus(SUBSTATUS_ERROR),
- m_name(name),
- m_explength(0),
- m_length(0),
- m_shared_device(NULL)
+ m_type(type),
+ m_status(STATUS_ERROR),
+ m_substatus(SUBSTATUS_ERROR),
+ m_name(name),
+ m_explength(0),
+ m_length(0),
+ m_shared_device(NULL)
{
}
diff --git a/src/emu/audit.h b/src/emu/audit.h
index 41f5ab1d19f..1d452c5e6d3 100644
--- a/src/emu/audit.h
+++ b/src/emu/audit.h
@@ -52,8 +52,8 @@
//**************************************************************************
// hashes to use for validation
-#define AUDIT_VALIDATE_FAST "R" /* CRC only */
-#define AUDIT_VALIDATE_FULL "RS" /* CRC + SHA1 */
+#define AUDIT_VALIDATE_FAST "R" /* CRC only */
+#define AUDIT_VALIDATE_FULL "RS" /* CRC + SHA1 */
@@ -137,16 +137,16 @@ public:
private:
// internal state
- audit_record * m_next;
- media_type m_type; /* type of item that was audited */
- audit_status m_status; /* status of audit on this item */
- audit_substatus m_substatus; /* finer-detail status */
- const char * m_name; /* name of item */
- UINT64 m_explength; /* expected length of item */
- UINT64 m_length; /* actual length of item */
- hash_collection m_exphashes; /* expected hash data */
- hash_collection m_hashes; /* actual hash information */
- device_t * m_shared_device; /* device that shares the rom */
+ audit_record * m_next;
+ media_type m_type; /* type of item that was audited */
+ audit_status m_status; /* status of audit on this item */
+ audit_substatus m_substatus; /* finer-detail status */
+ const char * m_name; /* name of item */
+ UINT64 m_explength; /* expected length of item */
+ UINT64 m_length; /* actual length of item */
+ hash_collection m_exphashes; /* expected hash data */
+ hash_collection m_hashes; /* actual hash information */
+ device_t * m_shared_device; /* device that shares the rom */
};
@@ -188,11 +188,11 @@ private:
device_t *find_shared_device(device_t &device, const char *name, const hash_collection &romhashes, UINT64 romlength);
// internal state
- simple_list<audit_record> m_record_list;
- const driver_enumerator & m_enumerator;
- const char * m_validation;
- const char * m_searchpath;
+ simple_list<audit_record> m_record_list;
+ const driver_enumerator & m_enumerator;
+ const char * m_validation;
+ const char * m_searchpath;
};
-#endif /* __AUDIT_H__ */
+#endif /* __AUDIT_H__ */
diff --git a/src/emu/cheat.c b/src/emu/cheat.c
index 8ab4afb4410..caddd153990 100644
--- a/src/emu/cheat.c
+++ b/src/emu/cheat.c
@@ -117,7 +117,7 @@
//**************************************************************************
// turn this on to enable removing duplicate cheats; not sure if we should
-#define REMOVE_DUPLICATE_CHEATS 0
+#define REMOVE_DUPLICATE_CHEATS 0
@@ -166,7 +166,7 @@ inline const char *number_and_format::format(astring &string) const
cheat_parameter::cheat_parameter(cheat_manager &manager, symbol_table &symbols, const char *filename, xml_data_node &paramnode)
: m_value(0),
- m_itemlist(manager.machine().respool())
+ m_itemlist(manager.machine().respool())
{
// read the core attributes
m_minval = number_and_format(xml_get_attribute_int(&paramnode, "min", 0), xml_get_attribute_int_format(&paramnode, "min"));
@@ -347,7 +347,7 @@ bool cheat_parameter::set_next_state()
cheat_script::cheat_script(cheat_manager &manager, symbol_table &symbols, const char *filename, xml_data_node &scriptnode)
: m_entrylist(manager.machine().respool()),
- m_state(SCRIPT_STATE_RUN)
+ m_state(SCRIPT_STATE_RUN)
{
// read the core attributes
const char *state = xml_get_attribute_string(&scriptnode, "state", "run");
@@ -407,11 +407,11 @@ void cheat_script::save(emu_file &cheatfile) const
cheatfile.printf("\t\t<script");
switch (m_state)
{
- case SCRIPT_STATE_OFF: cheatfile.printf(" state=\"off\""); break;
- case SCRIPT_STATE_ON: cheatfile.printf(" state=\"on\""); break;
+ case SCRIPT_STATE_OFF: cheatfile.printf(" state=\"off\""); break;
+ case SCRIPT_STATE_ON: cheatfile.printf(" state=\"on\""); break;
default:
- case SCRIPT_STATE_RUN: cheatfile.printf(" state=\"run\""); break;
- case SCRIPT_STATE_CHANGE: cheatfile.printf(" state=\"change\""); break;
+ case SCRIPT_STATE_RUN: cheatfile.printf(" state=\"run\""); break;
+ case SCRIPT_STATE_CHANGE: cheatfile.printf(" state=\"change\""); break;
}
cheatfile.printf(">\n");
@@ -430,9 +430,9 @@ void cheat_script::save(emu_file &cheatfile) const
cheat_script::script_entry::script_entry(cheat_manager &manager, symbol_table &symbols, const char *filename, xml_data_node &entrynode, bool isaction)
: m_next(NULL),
- m_condition(&symbols),
- m_expression(&symbols),
- m_arglist(manager.machine().respool())
+ m_condition(&symbols),
+ m_expression(&symbols),
+ m_arglist(manager.machine().respool())
{
const char *expression = NULL;
try
@@ -641,8 +641,8 @@ void cheat_script::script_entry::validate_format(const char *filename, int line)
cheat_script::script_entry::output_argument::output_argument(cheat_manager &manager, symbol_table &symbols, const char *filename, xml_data_node &argnode)
: m_next(NULL),
- m_expression(&symbols),
- m_count(0)
+ m_expression(&symbols),
+ m_count(0)
{
// first extract attributes
m_count = xml_get_attribute_int(&argnode, "count", 1);
@@ -712,16 +712,16 @@ void cheat_script::script_entry::output_argument::save(emu_file &cheatfile) cons
cheat_entry::cheat_entry(cheat_manager &manager, symbol_table &globaltable, const char *filename, xml_data_node &cheatnode)
: m_manager(manager),
- m_next(NULL),
- m_parameter(NULL),
- m_on_script(NULL),
- m_off_script(NULL),
- m_change_script(NULL),
- m_run_script(NULL),
- m_symbols(&manager.machine(), &globaltable),
- m_state(SCRIPT_STATE_OFF),
- m_numtemp(DEFAULT_TEMP_VARIABLES),
- m_argindex(0)
+ m_next(NULL),
+ m_parameter(NULL),
+ m_on_script(NULL),
+ m_off_script(NULL),
+ m_change_script(NULL),
+ m_run_script(NULL),
+ m_symbols(&manager.machine(), &globaltable),
+ m_state(SCRIPT_STATE_OFF),
+ m_numtemp(DEFAULT_TEMP_VARIABLES),
+ m_argindex(0)
{
// reset scripts
try
@@ -1067,11 +1067,11 @@ cheat_script *&cheat_entry::script_for_state(script_state state)
{
switch (state)
{
- case SCRIPT_STATE_ON: return m_on_script;
- case SCRIPT_STATE_OFF: return m_off_script;
- case SCRIPT_STATE_CHANGE: return m_change_script;
+ case SCRIPT_STATE_ON: return m_on_script;
+ case SCRIPT_STATE_OFF: return m_off_script;
+ case SCRIPT_STATE_CHANGE: return m_change_script;
default:
- case SCRIPT_STATE_RUN: return m_run_script;
+ case SCRIPT_STATE_RUN: return m_run_script;
}
}
@@ -1087,9 +1087,9 @@ cheat_script *&cheat_entry::script_for_state(script_state state)
cheat_manager::cheat_manager(running_machine &machine)
: m_machine(machine),
- m_cheatlist(machine.respool()),
- m_disabled(true),
- m_symtable(&machine)
+ m_cheatlist(machine.respool()),
+ m_disabled(true),
+ m_symtable(&machine)
{
// if the cheat engine is disabled, we're done
if (!machine.options().cheat())
@@ -1104,7 +1104,7 @@ cheat_manager::cheat_manager(running_machine &machine)
m_symtable.add("tobcd", NULL, 1, 1, execute_tobcd);
// we rely on the debugger expression callbacks; if the debugger isn't
- // enabled, we must jumpstart them manually
+ // enabled, we must jumpstart them manually
if ((machine.debug_flags & DEBUG_FLAG_ENABLED) == 0)
debug_cpu_init(machine);
@@ -1172,8 +1172,8 @@ void cheat_manager::reload()
m_disabled = false;
// load the cheat file, MESS will load a crc32.xml ( eg. 01234567.xml )
- // and MAME will load gamename.xml
- image_interface_iterator iter(machine().root_device());
+ // and MAME will load gamename.xml
+ image_interface_iterator iter(machine().root_device());
for (device_image_interface *image = iter.first(); image != NULL; image = iter.next())
if (image->exists())
{
diff --git a/src/emu/cheat.h b/src/emu/cheat.h
index b405e96e5fd..caff67f3f5d 100644
--- a/src/emu/cheat.h
+++ b/src/emu/cheat.h
@@ -78,7 +78,7 @@ public:
// construction/destruction
number_and_format(UINT64 value = 0, int format = 0)
: m_value(value),
- m_format(format) { }
+ m_format(format) { }
// pass-through to look like a regular number
operator UINT64 &() { return m_value; }
@@ -89,8 +89,8 @@ public:
private:
// internal state
- UINT64 m_value;
- int m_format;
+ UINT64 m_value;
+ int m_format;
};
@@ -127,8 +127,8 @@ private:
// construction/destruction
item(const char *text, UINT64 value, int valformat)
: m_next(NULL),
- m_text(text),
- m_value(value, valformat) { }
+ m_text(text),
+ m_value(value, valformat) { }
// getters
item *next() const { return m_next; }
@@ -137,18 +137,18 @@ private:
private:
// internal state
- item * m_next; // next item in list
- astring m_text; // name of the item
- number_and_format m_value; // value of the item
+ item * m_next; // next item in list
+ astring m_text; // name of the item
+ number_and_format m_value; // value of the item
};
// internal state
- number_and_format m_minval; // minimum value
- number_and_format m_maxval; // maximum value
- number_and_format m_stepval; // step value
- UINT64 m_value; // live value of the parameter
- astring m_curtext; // holding for a value string
- simple_list<item> m_itemlist; // list of items
+ number_and_format m_minval; // minimum value
+ number_and_format m_maxval; // maximum value
+ number_and_format m_stepval; // step value
+ UINT64 m_value; // live value of the parameter
+ astring m_curtext; // holding for a value string
+ simple_list<item> m_itemlist; // list of items
};
@@ -207,30 +207,30 @@ private:
private:
// internal state
- output_argument * m_next; // link to next argument
- parsed_expression m_expression; // expression for argument
- UINT64 m_count; // number of repetitions
+ output_argument * m_next; // link to next argument
+ parsed_expression m_expression; // expression for argument
+ UINT64 m_count; // number of repetitions
};
// internal helpers
void validate_format(const char *filename, int line);
// internal state
- script_entry * m_next; // link to next entry
- parsed_expression m_condition; // condition under which this is executed
- parsed_expression m_expression; // expression to execute
- astring m_format; // string format to print
- simple_list<output_argument> m_arglist; // list of arguments
- INT8 m_line; // which line to print on
- UINT8 m_justify; // justification when printing
+ script_entry * m_next; // link to next entry
+ parsed_expression m_condition; // condition under which this is executed
+ parsed_expression m_expression; // expression to execute
+ astring m_format; // string format to print
+ simple_list<output_argument> m_arglist; // list of arguments
+ INT8 m_line; // which line to print on
+ UINT8 m_justify; // justification when printing
// constants
static const int MAX_ARGUMENTS = 32;
};
// internal state
- simple_list<script_entry> m_entrylist; // list of actions to perform
- script_state m_state; // which state this script is for
+ simple_list<script_entry> m_entrylist; // list of actions to perform
+ script_state m_state; // which state this script is for
};
@@ -292,19 +292,19 @@ private:
cheat_script *&script_for_state(script_state state);
// internal state
- cheat_manager & m_manager; // reference to our manager
- cheat_entry * m_next; // next cheat entry
- astring m_description; // string description/menu title
- astring m_comment; // comment data
- cheat_parameter * m_parameter; // parameter
- cheat_script * m_on_script; // script to run when turning on
- cheat_script * m_off_script; // script to run when turning off
- cheat_script * m_change_script; // script to run when value changes
- cheat_script * m_run_script; // script to run each frame when on
- symbol_table m_symbols; // symbol table for this cheat
- script_state m_state; // current cheat state
- UINT32 m_numtemp; // number of temporary variables
- UINT64 m_argindex; // argument index variable
+ cheat_manager & m_manager; // reference to our manager
+ cheat_entry * m_next; // next cheat entry
+ astring m_description; // string description/menu title
+ astring m_comment; // comment data
+ cheat_parameter * m_parameter; // parameter
+ cheat_script * m_on_script; // script to run when turning on
+ cheat_script * m_off_script; // script to run when turning off
+ cheat_script * m_change_script; // script to run when value changes
+ cheat_script * m_run_script; // script to run each frame when on
+ symbol_table m_symbols; // symbol table for this cheat
+ script_state m_state; // current cheat state
+ UINT32 m_numtemp; // number of temporary variables
+ UINT64 m_argindex; // argument index variable
// constants
static const int DEFAULT_TEMP_VARIABLES = 10;
@@ -347,19 +347,19 @@ private:
void load_cheats(const char *filename);
// internal state
- running_machine & m_machine; // reference to our machine
- simple_list<cheat_entry> m_cheatlist; // cheat list
- UINT64 m_framecount; // frame count
- astring m_output[UI_TARGET_FONT_ROWS*2]; // array of output strings
- UINT8 m_justify[UI_TARGET_FONT_ROWS*2]; // justification for each string
- UINT8 m_numlines; // number of lines available for output
- INT8 m_lastline; // last line used for output
- bool m_disabled; // true if the cheat engine is disabled
- symbol_table m_symtable; // global symbol table
+ running_machine & m_machine; // reference to our machine
+ simple_list<cheat_entry> m_cheatlist; // cheat list
+ UINT64 m_framecount; // frame count
+ astring m_output[UI_TARGET_FONT_ROWS*2]; // array of output strings
+ UINT8 m_justify[UI_TARGET_FONT_ROWS*2]; // justification for each string
+ UINT8 m_numlines; // number of lines available for output
+ INT8 m_lastline; // last line used for output
+ bool m_disabled; // true if the cheat engine is disabled
+ symbol_table m_symtable; // global symbol table
// constants
static const int CHEAT_VERSION = 1;
};
-#endif /* __CHEAT_H__ */
+#endif /* __CHEAT_H__ */
diff --git a/src/emu/clifront.c b/src/emu/clifront.c
index 3427cea0fe5..fb7c0aad80c 100644
--- a/src/emu/clifront.c
+++ b/src/emu/clifront.c
@@ -122,8 +122,8 @@ cli_options::cli_options()
cli_frontend::cli_frontend(cli_options &options, osd_interface &osd)
: m_options(options),
- m_osd(osd),
- m_result(MAMERR_NONE)
+ m_osd(osd),
+ m_result(MAMERR_NONE)
{
// begin tracking memory
track_memory(true);
@@ -1637,24 +1637,24 @@ void cli_frontend::execute_commands(const char *exename)
void (cli_frontend::*function)(const char *gamename);
} info_commands[] =
{
- { CLICOMMAND_LISTXML, &cli_frontend::listxml },
- { CLICOMMAND_LISTFULL, &cli_frontend::listfull },
- { CLICOMMAND_LISTSOURCE, &cli_frontend::listsource },
- { CLICOMMAND_LISTCLONES, &cli_frontend::listclones },
- { CLICOMMAND_LISTBROTHERS, &cli_frontend::listbrothers },
- { CLICOMMAND_LISTCRC, &cli_frontend::listcrc },
- { CLICOMMAND_LISTDEVICES, &cli_frontend::listdevices },
- { CLICOMMAND_LISTSLOTS, &cli_frontend::listslots },
- { CLICOMMAND_LISTROMS, &cli_frontend::listroms },
- { CLICOMMAND_LISTSAMPLES, &cli_frontend::listsamples },
- { CLICOMMAND_VERIFYROMS, &cli_frontend::verifyroms },
- { CLICOMMAND_VERIFYSAMPLES, &cli_frontend::verifysamples },
- { CLICOMMAND_LISTMEDIA, &cli_frontend::listmedia },
+ { CLICOMMAND_LISTXML, &cli_frontend::listxml },
+ { CLICOMMAND_LISTFULL, &cli_frontend::listfull },
+ { CLICOMMAND_LISTSOURCE, &cli_frontend::listsource },
+ { CLICOMMAND_LISTCLONES, &cli_frontend::listclones },
+ { CLICOMMAND_LISTBROTHERS, &cli_frontend::listbrothers },
+ { CLICOMMAND_LISTCRC, &cli_frontend::listcrc },
+ { CLICOMMAND_LISTDEVICES, &cli_frontend::listdevices },
+ { CLICOMMAND_LISTSLOTS, &cli_frontend::listslots },
+ { CLICOMMAND_LISTROMS, &cli_frontend::listroms },
+ { CLICOMMAND_LISTSAMPLES, &cli_frontend::listsamples },
+ { CLICOMMAND_VERIFYROMS, &cli_frontend::verifyroms },
+ { CLICOMMAND_VERIFYSAMPLES, &cli_frontend::verifysamples },
+ { CLICOMMAND_LISTMEDIA, &cli_frontend::listmedia },
{ CLICOMMAND_LISTSOFTWARE, &cli_frontend::listsoftware },
- { CLICOMMAND_VERIFYSOFTWARE, &cli_frontend::verifysoftware },
- { CLICOMMAND_ROMIDENT, &cli_frontend::romident },
+ { CLICOMMAND_VERIFYSOFTWARE, &cli_frontend::verifysoftware },
+ { CLICOMMAND_ROMIDENT, &cli_frontend::romident },
{ CLICOMMAND_GETSOFTLIST, &cli_frontend::getsoftlist },
- { CLICOMMAND_VERIFYSOFTLIST, &cli_frontend::verifysoftlist },
+ { CLICOMMAND_VERIFYSOFTLIST, &cli_frontend::verifysoftlist },
{ CLICOMMAND_LIST_MIDI_DEVICES, &cli_frontend::listmididevices },
};
@@ -1684,12 +1684,12 @@ void cli_frontend::display_help()
mame_printf_info("%s\n", emulator_info::get_disclaimer());
emulator_info::printf_usage(emulator_info::get_appname(),emulator_info::get_gamenoun());
mame_printf_info("\n\n"
- " %s -showusage for a brief list of options\n"
- " %s -showconfig for a list of configuration options\n"
- " %s -listmedia for a full list of supported media\n"
- " %s -createconfig to create a %s.ini\n\n"
- "For usage instructions, please consult the files config.txt and windows.txt.\n",emulator_info::get_appname(),
- emulator_info::get_appname(),emulator_info::get_appname(),emulator_info::get_appname(),emulator_info::get_configname());
+ " %s -showusage for a brief list of options\n"
+ " %s -showconfig for a list of configuration options\n"
+ " %s -listmedia for a full list of supported media\n"
+ " %s -createconfig to create a %s.ini\n\n"
+ "For usage instructions, please consult the files config.txt and windows.txt.\n",emulator_info::get_appname(),
+ emulator_info::get_appname(),emulator_info::get_appname(),emulator_info::get_appname(),emulator_info::get_configname());
}
@@ -1713,9 +1713,9 @@ void cli_frontend::display_suggestions(const char *gamename)
media_identifier::media_identifier(cli_options &options)
: m_drivlist(options),
- m_total(0),
- m_matches(0),
- m_nonroms(0)
+ m_total(0),
+ m_matches(0),
+ m_nonroms(0)
{
}
diff --git a/src/emu/clifront.h b/src/emu/clifront.h
index 19c8f8e16ac..16275e7de2e 100644
--- a/src/emu/clifront.h
+++ b/src/emu/clifront.h
@@ -51,34 +51,34 @@
//**************************************************************************
// core commands
-#define CLICOMMAND_HELP "help"
-#define CLICOMMAND_VALIDATE "validate"
+#define CLICOMMAND_HELP "help"
+#define CLICOMMAND_VALIDATE "validate"
// configuration commands
-#define CLICOMMAND_CREATECONFIG "createconfig"
-#define CLICOMMAND_SHOWCONFIG "showconfig"
-#define CLICOMMAND_SHOWUSAGE "showusage"
+#define CLICOMMAND_CREATECONFIG "createconfig"
+#define CLICOMMAND_SHOWCONFIG "showconfig"
+#define CLICOMMAND_SHOWUSAGE "showusage"
// frontend commands
-#define CLICOMMAND_LISTXML "listxml"
-#define CLICOMMAND_LISTFULL "listfull"
-#define CLICOMMAND_LISTSOURCE "listsource"
-#define CLICOMMAND_LISTCLONES "listclones"
-#define CLICOMMAND_LISTBROTHERS "listbrothers"
-#define CLICOMMAND_LISTCRC "listcrc"
-#define CLICOMMAND_LISTROMS "listroms"
-#define CLICOMMAND_LISTSAMPLES "listsamples"
-#define CLICOMMAND_VERIFYROMS "verifyroms"
-#define CLICOMMAND_VERIFYSAMPLES "verifysamples"
-#define CLICOMMAND_ROMIDENT "romident"
-#define CLICOMMAND_LISTDEVICES "listdevices"
-#define CLICOMMAND_LISTSLOTS "listslots"
-#define CLICOMMAND_LISTMEDIA "listmedia" // needed by MESS
-#define CLICOMMAND_LISTSOFTWARE "listsoftware"
-#define CLICOMMAND_VERIFYSOFTWARE "verifysoftware"
-#define CLICOMMAND_GETSOFTLIST "getsoftlist"
-#define CLICOMMAND_VERIFYSOFTLIST "verifysoftlist"
-#define CLICOMMAND_LIST_MIDI_DEVICES "listmidi"
+#define CLICOMMAND_LISTXML "listxml"
+#define CLICOMMAND_LISTFULL "listfull"
+#define CLICOMMAND_LISTSOURCE "listsource"
+#define CLICOMMAND_LISTCLONES "listclones"
+#define CLICOMMAND_LISTBROTHERS "listbrothers"
+#define CLICOMMAND_LISTCRC "listcrc"
+#define CLICOMMAND_LISTROMS "listroms"
+#define CLICOMMAND_LISTSAMPLES "listsamples"
+#define CLICOMMAND_VERIFYROMS "verifyroms"
+#define CLICOMMAND_VERIFYSAMPLES "verifysamples"
+#define CLICOMMAND_ROMIDENT "romident"
+#define CLICOMMAND_LISTDEVICES "listdevices"
+#define CLICOMMAND_LISTSLOTS "listslots"
+#define CLICOMMAND_LISTMEDIA "listmedia" // needed by MESS
+#define CLICOMMAND_LISTSOFTWARE "listsoftware"
+#define CLICOMMAND_VERIFYSOFTWARE "verifysoftware"
+#define CLICOMMAND_GETSOFTLIST "getsoftlist"
+#define CLICOMMAND_VERIFYSOFTLIST "verifysoftlist"
+#define CLICOMMAND_LIST_MIDI_DEVICES "listmidi"
//**************************************************************************
@@ -138,9 +138,9 @@ private:
void output_single_softlist(FILE *out,software_list *list, const char *listname);
// internal state
- cli_options & m_options;
- osd_interface & m_osd;
- int m_result;
+ cli_options & m_options;
+ osd_interface & m_osd;
+ int m_result;
};
@@ -166,12 +166,12 @@ public:
private:
// internal state
- driver_enumerator m_drivlist;
- int m_total;
- int m_matches;
- int m_nonroms;
+ driver_enumerator m_drivlist;
+ int m_total;
+ int m_matches;
+ int m_nonroms;
};
-#endif /* __CLIFRONT_H__ */
+#endif /* __CLIFRONT_H__ */
diff --git a/src/emu/config.c b/src/emu/config.c
index 93c758cf464..ca43f2f080d 100644
--- a/src/emu/config.c
+++ b/src/emu/config.c
@@ -16,7 +16,7 @@
#include "xmlfile.h"
-#define DEBUG_CONFIG 0
+#define DEBUG_CONFIG 0
@@ -26,10 +26,10 @@
struct config_type
{
- config_type * next; /* next in line */
- const char * name; /* node name */
- config_saveload_delegate load; /* load callback */
- config_saveload_delegate save; /* save callback */
+ config_type * next; /* next in line */
+ const char * name; /* node name */
+ config_saveload_delegate load; /* load callback */
+ config_saveload_delegate save; /* save callback */
};
diff --git a/src/emu/config.h b/src/emu/config.h
index e94b0bfbb2f..56702cd1c70 100644
--- a/src/emu/config.h
+++ b/src/emu/config.h
@@ -24,15 +24,15 @@
*
*************************************/
-#define CONFIG_VERSION 10
+#define CONFIG_VERSION 10
enum
{
- CONFIG_TYPE_INIT = 0, /* opportunity to initialize things first */
- CONFIG_TYPE_CONTROLLER, /* loading from controller file */
- CONFIG_TYPE_DEFAULT, /* loading from default.cfg */
- CONFIG_TYPE_GAME, /* loading from game.cfg */
- CONFIG_TYPE_FINAL /* opportunity to finish initialization */
+ CONFIG_TYPE_INIT = 0, /* opportunity to initialize things first */
+ CONFIG_TYPE_CONTROLLER, /* loading from controller file */
+ CONFIG_TYPE_DEFAULT, /* loading from default.cfg */
+ CONFIG_TYPE_GAME, /* loading from game.cfg */
+ CONFIG_TYPE_FINAL /* opportunity to finish initialization */
};
@@ -58,4 +58,4 @@ void config_register(running_machine &machine, const char *nodename, config_save
int config_load_settings(running_machine &machine);
void config_save_settings(running_machine &machine);
-#endif /* __CONFIG_H__ */
+#endif /* __CONFIG_H__ */
diff --git a/src/emu/cpu/adsp2100/2100ops.c b/src/emu/cpu/adsp2100/2100ops.c
index 0c14e8f7b15..c44d9bb6445 100644
--- a/src/emu/cpu/adsp2100/2100ops.c
+++ b/src/emu/cpu/adsp2100/2100ops.c
@@ -3,45 +3,45 @@
===========================================================================*/
/* extracts flags */
-#define GET_SS (m_astat & SSFLAG)
-#define GET_MV (m_astat & MVFLAG)
-#define GET_Q (m_astat & QFLAG)
-#define GET_S (m_astat & SFLAG)
-#define GET_C (m_astat & CFLAG)
-#define GET_V (m_astat & VFLAG)
-#define GET_N (m_astat & NFLAG)
-#define GET_Z (m_astat & ZFLAG)
+#define GET_SS (m_astat & SSFLAG)
+#define GET_MV (m_astat & MVFLAG)
+#define GET_Q (m_astat & QFLAG)
+#define GET_S (m_astat & SFLAG)
+#define GET_C (m_astat & CFLAG)
+#define GET_V (m_astat & VFLAG)
+#define GET_N (m_astat & NFLAG)
+#define GET_Z (m_astat & ZFLAG)
/* clears flags */
-#define CLR_SS (m_astat &= ~SSFLAG)
-#define CLR_MV (m_astat &= ~MVFLAG)
-#define CLR_Q (m_astat &= ~QFLAG)
-#define CLR_S (m_astat &= ~SFLAG)
-#define CLR_C (m_astat &= ~CFLAG)
-#define CLR_V (m_astat &= ~VFLAG)
-#define CLR_N (m_astat &= ~NFLAG)
-#define CLR_Z (m_astat &= ~ZFLAG)
+#define CLR_SS (m_astat &= ~SSFLAG)
+#define CLR_MV (m_astat &= ~MVFLAG)
+#define CLR_Q (m_astat &= ~QFLAG)
+#define CLR_S (m_astat &= ~SFLAG)
+#define CLR_C (m_astat &= ~CFLAG)
+#define CLR_V (m_astat &= ~VFLAG)
+#define CLR_N (m_astat &= ~NFLAG)
+#define CLR_Z (m_astat &= ~ZFLAG)
/* sets flags */
-#define SET_SS (m_astat |= SSFLAG)
-#define SET_MV (m_astat |= MVFLAG)
-#define SET_Q (m_astat |= QFLAG)
-#define SET_S (m_astat |= SFLAG)
-#define SET_C (m_astat |= CFLAG)
-#define SET_V (m_astat |= VFLAG)
-#define SET_Z (m_astat |= ZFLAG)
-#define SET_N (m_astat |= NFLAG)
+#define SET_SS (m_astat |= SSFLAG)
+#define SET_MV (m_astat |= MVFLAG)
+#define SET_Q (m_astat |= QFLAG)
+#define SET_S (m_astat |= SFLAG)
+#define SET_C (m_astat |= CFLAG)
+#define SET_V (m_astat |= VFLAG)
+#define SET_Z (m_astat |= ZFLAG)
+#define SET_N (m_astat |= NFLAG)
/* flag clearing; must be done before setting */
-#define CLR_FLAGS (m_astat &= m_astat_clear)
+#define CLR_FLAGS (m_astat &= m_astat_clear)
/* compute flags */
-#define CALC_Z(r) (m_astat |= ((r & 0xffff) == 0))
-#define CALC_N(r) (m_astat |= (r >> 14) & 0x02)
-#define CALC_V(s,d,r) (m_astat |= ((s ^ d ^ r ^ (r >> 1)) >> 13) & 0x04)
-#define CALC_C(r) (m_astat |= (r >> 13) & 0x08)
-#define CALC_C_SUB(r) (m_astat |= (~r >> 13) & 0x08)
-#define CALC_NZ(r) CLR_FLAGS; CALC_N(r); CALC_Z(r)
+#define CALC_Z(r) (m_astat |= ((r & 0xffff) == 0))
+#define CALC_N(r) (m_astat |= (r >> 14) & 0x02)
+#define CALC_V(s,d,r) (m_astat |= ((s ^ d ^ r ^ (r >> 1)) >> 13) & 0x04)
+#define CALC_C(r) (m_astat |= (r >> 13) & 0x08)
+#define CALC_C_SUB(r) (m_astat |= (~r >> 13) & 0x08)
+#define CALC_NZ(r) CLR_FLAGS; CALC_N(r); CALC_Z(r)
#define CALC_NZV(s,d,r) CLR_FLAGS; CALC_N(r); CALC_Z(r); CALC_V(s,d,r)
#define CALC_NZVC(s,d,r) CLR_FLAGS; CALC_N(r); CALC_Z(r); CALC_V(s,d,r); CALC_C(r)
#define CALC_NZVC_SUB(s,d,r) CLR_FLAGS; CALC_N(r); CALC_Z(r); CALC_V(s,d,r); CALC_C_SUB(r)
@@ -62,13 +62,13 @@ static const INT32 constants[] =
===========================================================================*/
/* flag definitions */
-#define MSTAT_BANK 0x01 /* register bank select */
-#define MSTAT_REVERSE 0x02 /* bit-reverse addressing enable (DAG1) */
-#define MSTAT_STICKYV 0x04 /* sticky ALU overflow enable */
-#define MSTAT_SATURATE 0x08 /* AR saturation mode enable */
-#define MSTAT_INTEGER 0x10 /* MAC result placement; 0=fractional, 1=integer */
-#define MSTAT_TIMER 0x20 /* timer enable */
-#define MSTAT_GOMODE 0x40 /* go mode enable */
+#define MSTAT_BANK 0x01 /* register bank select */
+#define MSTAT_REVERSE 0x02 /* bit-reverse addressing enable (DAG1) */
+#define MSTAT_STICKYV 0x04 /* sticky ALU overflow enable */
+#define MSTAT_SATURATE 0x08 /* AR saturation mode enable */
+#define MSTAT_INTEGER 0x10 /* MAC result placement; 0=fractional, 1=integer */
+#define MSTAT_TIMER 0x20 /* timer enable */
+#define MSTAT_GOMODE 0x40 /* go mode enable */
/* you must call this in order to change MSTAT */
inline void adsp21xx_device::update_mstat()
@@ -95,14 +95,14 @@ inline void adsp21xx_device::update_mstat()
===========================================================================*/
/* flag definitions */
-#define PC_EMPTY 0x01 /* PC stack empty */
-#define PC_OVER 0x02 /* PC stack overflow */
-#define COUNT_EMPTY 0x04 /* count stack empty */
-#define COUNT_OVER 0x08 /* count stack overflow */
-#define STATUS_EMPTY 0x10 /* status stack empty */
-#define STATUS_OVER 0x20 /* status stack overflow */
-#define LOOP_EMPTY 0x40 /* loop stack empty */
-#define LOOP_OVER 0x80 /* loop stack overflow */
+#define PC_EMPTY 0x01 /* PC stack empty */
+#define PC_OVER 0x02 /* PC stack overflow */
+#define COUNT_EMPTY 0x04 /* count stack empty */
+#define COUNT_OVER 0x08 /* count stack overflow */
+#define STATUS_EMPTY 0x10 /* status stack empty */
+#define STATUS_OVER 0x20 /* status stack overflow */
+#define LOOP_EMPTY 0x40 /* loop stack empty */
+#define LOOP_OVER 0x80 /* loop stack overflow */
@@ -339,22 +339,22 @@ void adsp21xx_device::write_reg0(int regnum, INT32 val)
{
switch (regnum)
{
- case 0x00: m_core.ax0.s = val; break;
- case 0x01: m_core.ax1.s = val; break;
- case 0x02: m_core.mx0.s = val; break;
- case 0x03: m_core.mx1.s = val; break;
- case 0x04: m_core.ay0.s = val; break;
- case 0x05: m_core.ay1.s = val; break;
- case 0x06: m_core.my0.s = val; break;
- case 0x07: m_core.my1.s = val; break;
- case 0x08: m_core.si.s = val; break;
- case 0x09: m_core.se.s = (INT8)val; break;
- case 0x0a: m_core.ar.s = val; break;
- case 0x0b: m_core.mr.mrx.mr0.s = val; break;
- case 0x0c: m_core.mr.mrx.mr1.s = val; m_core.mr.mrx.mr2.s = (INT16)val >> 15; break;
- case 0x0d: m_core.mr.mrx.mr2.s = (INT8)val; break;
- case 0x0e: m_core.sr.srx.sr0.s = val; break;
- case 0x0f: m_core.sr.srx.sr1.s = val; break;
+ case 0x00: m_core.ax0.s = val; break;
+ case 0x01: m_core.ax1.s = val; break;
+ case 0x02: m_core.mx0.s = val; break;
+ case 0x03: m_core.mx1.s = val; break;
+ case 0x04: m_core.ay0.s = val; break;
+ case 0x05: m_core.ay1.s = val; break;
+ case 0x06: m_core.my0.s = val; break;
+ case 0x07: m_core.my1.s = val; break;
+ case 0x08: m_core.si.s = val; break;
+ case 0x09: m_core.se.s = (INT8)val; break;
+ case 0x0a: m_core.ar.s = val; break;
+ case 0x0b: m_core.mr.mrx.mr0.s = val; break;
+ case 0x0c: m_core.mr.mrx.mr1.s = val; m_core.mr.mrx.mr2.s = (INT16)val >> 15; break;
+ case 0x0d: m_core.mr.mrx.mr2.s = (INT8)val; break;
+ case 0x0e: m_core.sr.srx.sr0.s = val; break;
+ case 0x0f: m_core.sr.srx.sr1.s = val; break;
}
}
@@ -412,15 +412,15 @@ void adsp21xx_device::write_reg3(int regnum, INT32 val)
{
switch (regnum)
{
- case 0x00: m_astat = val & 0x00ff; break;
- case 0x01: m_mstat = val & m_mstat_mask; update_mstat(); break;
- case 0x03: m_imask = val & m_imask_mask; check_irqs(); break;
- case 0x04: m_icntl = val & 0x001f; check_irqs(); break;
- case 0x05: cntr_stack_push(); m_cntr = val & 0x3fff; break;
- case 0x06: m_core.sb.s = (INT32)(val << 27) >> 27; break;
- case 0x07: m_px = val; break;
- case 0x09: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 0, val); break;
- case 0x0b: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 1, val); break;
+ case 0x00: m_astat = val & 0x00ff; break;
+ case 0x01: m_mstat = val & m_mstat_mask; update_mstat(); break;
+ case 0x03: m_imask = val & m_imask_mask; check_irqs(); break;
+ case 0x04: m_icntl = val & 0x001f; check_irqs(); break;
+ case 0x05: cntr_stack_push(); m_cntr = val & 0x3fff; break;
+ case 0x06: m_core.sb.s = (INT32)(val << 27) >> 27; break;
+ case 0x07: m_px = val; break;
+ case 0x09: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 0, val); break;
+ case 0x0b: if (m_sport_tx_callback != NULL) (*m_sport_tx_callback)(*this, 1, val); break;
case 0x0c:
m_ifc = val;
if (m_chip_type >= CHIP_TYPE_ADSP2181)
@@ -459,9 +459,9 @@ void adsp21xx_device::write_reg3(int regnum, INT32 val)
}
check_irqs();
break;
- case 0x0d: m_cntr = val & 0x3fff; break;
- case 0x0f: pc_stack_push_val(val & 0x3fff); break;
- default: logerror("ADSP %04x: Writing to an invalid register!\n", m_ppc); break;
+ case 0x0d: m_cntr = val & 0x3fff; break;
+ case 0x0f: pc_stack_push_val(val & 0x3fff); break;
+ default: logerror("ADSP %04x: Writing to an invalid register!\n", m_ppc); break;
}
}
@@ -492,18 +492,18 @@ INT32 adsp21xx_device::read_reg3(int regnum)
{
switch (regnum)
{
- case 0x00: return m_astat;
- case 0x01: return m_mstat;
- case 0x02: return m_sstat;
- case 0x03: return m_imask;
- case 0x04: return m_icntl;
- case 0x05: return m_cntr;
- case 0x06: return m_core.sb.s;
- case 0x07: return m_px;
- case 0x08: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 0); else return 0;
- case 0x0a: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 1); else return 0;
- case 0x0f: return pc_stack_pop_val();
- default: logerror("ADSP %04x: Reading from an invalid register!\n", m_ppc); return 0;
+ case 0x00: return m_astat;
+ case 0x01: return m_mstat;
+ case 0x02: return m_sstat;
+ case 0x03: return m_imask;
+ case 0x04: return m_icntl;
+ case 0x05: return m_cntr;
+ case 0x06: return m_core.sb.s;
+ case 0x07: return m_px;
+ case 0x08: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 0); else return 0;
+ case 0x0a: if (m_sport_rx_callback) return (*m_sport_rx_callback)(*this, 1); else return 0;
+ case 0x0f: return pc_stack_pop_val();
+ default: logerror("ADSP %04x: Reading from an invalid register!\n", m_ppc); return 0;
}
}
@@ -800,7 +800,7 @@ void adsp21xx_device::alu_op_ar(int op)
if (xop & 0x8000) SET_S;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -926,7 +926,7 @@ void adsp21xx_device::alu_op_ar_const(int op)
if (xop & 0x8000) SET_S;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -1064,7 +1064,7 @@ void adsp21xx_device::alu_op_af(int op)
if (xop & 0x8000) SET_S;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -1187,7 +1187,7 @@ void adsp21xx_device::alu_op_af_const(int op)
if (xop & 0x8000) SET_S;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -1338,7 +1338,7 @@ void adsp21xx_device::mac_op_mr(int op)
INT32 temp;
INT64 res;
- switch (op & (15<<13)) /*JB*/
+ switch (op & (15<<13)) /*JB*/
{
case 0x00<<13:
/* no-op */
@@ -1476,7 +1476,7 @@ void adsp21xx_device::mac_op_mr(int op)
res = m_core.mr.mr - (INT64)temp;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -1500,7 +1500,7 @@ void adsp21xx_device::mac_op_mr_xop(int op)
INT32 temp;
INT64 res;
- switch (op & (15<<13)) /*JB*/
+ switch (op & (15<<13)) /*JB*/
{
case 0x00<<13:
/* no-op */
@@ -1623,7 +1623,7 @@ void adsp21xx_device::mac_op_mr_xop(int op)
res = m_core.mr.mr - (INT64)temp;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -1648,7 +1648,7 @@ void adsp21xx_device::mac_op_mf(int op)
INT32 temp;
INT64 res;
- switch (op & (15<<13)) /*JB*/
+ switch (op & (15<<13)) /*JB*/
{
case 0x00<<13:
/* no-op */
@@ -1786,7 +1786,7 @@ void adsp21xx_device::mac_op_mf(int op)
res = m_core.mr.mr - (INT64)temp;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -1807,7 +1807,7 @@ void adsp21xx_device::mac_op_mf_xop(int op)
INT32 temp;
INT64 res;
- switch (op & (15<<13)) /*JB*/
+ switch (op & (15<<13)) /*JB*/
{
case 0x00<<13:
/* no-op */
@@ -1930,7 +1930,7 @@ void adsp21xx_device::mac_op_mf_xop(int op)
res = m_core.mr.mr - (INT64)temp;
break;
default:
- res = 0; /* just to keep the compiler happy */
+ res = 0; /* just to keep the compiler happy */
break;
}
@@ -1950,7 +1950,7 @@ void adsp21xx_device::shift_op(int op)
INT32 xop = (op >> 8) & 7;
UINT32 res;
- switch (op & (15<<11)) /*JB*/
+ switch (op & (15<<11)) /*JB*/
{
case 0x00<<11:
/* LSHIFT (HI) */
@@ -2132,7 +2132,7 @@ void adsp21xx_device::shift_op_imm(int op)
INT32 xop = (op >> 8) & 7;
UINT32 res;
- switch (op & (15<<11)) /*JB*/
+ switch (op & (15<<11)) /*JB*/
{
case 0x00<<11:
/* LSHIFT (HI) */
diff --git a/src/emu/cpu/adsp2100/adsp2100.c b/src/emu/cpu/adsp2100/adsp2100.c
index 95e2e31f852..4c2dcce4e26 100644
--- a/src/emu/cpu/adsp2100/adsp2100.c
+++ b/src/emu/cpu/adsp2100/adsp2100.c
@@ -150,40 +150,40 @@ const device_type ADSP2181 = &device_creator<adsp2181_device>;
adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype)
: cpu_device(mconfig, type, name, tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 32, 14, -2),
- m_data_config("data", ENDIANNESS_LITTLE, 16, 14, -1),
- m_chip_type(chiptype),
- m_pc(0),
- m_ppc(0),
- m_loop(0),
- m_loop_condition(0),
- m_cntr(0),
- m_astat(0),
- m_sstat(0),
- m_mstat(0),
- m_mstat_prev(0),
- m_astat_clear(0),
- m_idle(0),
- m_px(0),
- m_pc_sp(0),
- m_cntr_sp(0),
- m_stat_sp(0),
- m_loop_sp(0),
- m_flagout(0),
- m_flagin(0),
- m_fl0(0),
- m_fl1(0),
- m_fl2(0),
- m_idma_addr(0),
- m_idma_cache(0),
- m_idma_offs(0),
- m_imask(0),
- m_icntl(0),
- m_ifc(0),
- m_icount(0),
- m_mstat_mask((m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x7f : 0x0f),
- m_imask_mask((m_chip_type >= CHIP_TYPE_ADSP2181) ? 0x3ff :
- (m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x3f : 0x0f)
+ m_program_config("program", ENDIANNESS_LITTLE, 32, 14, -2),
+ m_data_config("data", ENDIANNESS_LITTLE, 16, 14, -1),
+ m_chip_type(chiptype),
+ m_pc(0),
+ m_ppc(0),
+ m_loop(0),
+ m_loop_condition(0),
+ m_cntr(0),
+ m_astat(0),
+ m_sstat(0),
+ m_mstat(0),
+ m_mstat_prev(0),
+ m_astat_clear(0),
+ m_idle(0),
+ m_px(0),
+ m_pc_sp(0),
+ m_cntr_sp(0),
+ m_stat_sp(0),
+ m_loop_sp(0),
+ m_flagout(0),
+ m_flagin(0),
+ m_fl0(0),
+ m_fl1(0),
+ m_fl2(0),
+ m_idma_addr(0),
+ m_idma_cache(0),
+ m_idma_offs(0),
+ m_imask(0),
+ m_icntl(0),
+ m_ifc(0),
+ m_icount(0),
+ m_mstat_mask((m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x7f : 0x0f),
+ m_imask_mask((m_chip_type >= CHIP_TYPE_ADSP2181) ? 0x3ff :
+ (m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x3f : 0x0f)
{
// initialize remaining state
memset(&m_core, 0, sizeof(m_core));
@@ -297,7 +297,7 @@ adsp2115_device::adsp2115_device(const machine_config &mconfig, const char *tag,
adsp2181_device::adsp2181_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: adsp21xx_device(mconfig, ADSP2181, "ADSP-2181", tag, owner, clock, CHIP_TYPE_ADSP2181),
- m_io_config("I/O", ENDIANNESS_LITTLE, 16, 11, -1) { }
+ m_io_config("I/O", ENDIANNESS_LITTLE, 16, 11, -1) { }
//-------------------------------------------------
@@ -632,14 +632,14 @@ void adsp21xx_device::device_reset()
m_core.zero.u = m_alt.zero.u = 0;
// recompute the memory registers with their current values
- write_reg1(0x08, m_l[0]); write_reg1(0x00, m_i[0]);
- write_reg1(0x09, m_l[1]); write_reg1(0x01, m_i[1]);
- write_reg1(0x0a, m_l[2]); write_reg1(0x02, m_i[2]);
- write_reg1(0x0b, m_l[3]); write_reg1(0x03, m_i[3]);
- write_reg2(0x08, m_l[4]); write_reg2(0x00, m_i[4]);
- write_reg2(0x09, m_l[5]); write_reg2(0x01, m_i[5]);
- write_reg2(0x0a, m_l[6]); write_reg2(0x02, m_i[6]);
- write_reg2(0x0b, m_l[7]); write_reg2(0x03, m_i[7]);
+ write_reg1(0x08, m_l[0]); write_reg1(0x00, m_i[0]);
+ write_reg1(0x09, m_l[1]); write_reg1(0x01, m_i[1]);
+ write_reg1(0x0a, m_l[2]); write_reg1(0x02, m_i[2]);
+ write_reg1(0x0b, m_l[3]); write_reg1(0x03, m_i[3]);
+ write_reg2(0x08, m_l[4]); write_reg2(0x00, m_i[4]);
+ write_reg2(0x09, m_l[5]); write_reg2(0x01, m_i[5]);
+ write_reg2(0x0a, m_l[6]); write_reg2(0x02, m_i[6]);
+ write_reg2(0x0b, m_l[7]); write_reg2(0x03, m_i[7]);
// reset PC and loops
m_pc = (m_chip_type >= CHIP_TYPE_ADSP2101) ? 0 : 4;
@@ -682,21 +682,21 @@ void adsp21xx_device::device_reset()
const address_space_config *adsp2100_device::memory_space_config(address_spacenum spacenum) const
{
- return (spacenum == AS_PROGRAM) ? &m_program_config :
+ return (spacenum == AS_PROGRAM) ? &m_program_config :
(spacenum == AS_DATA) ? &m_data_config :
NULL;
}
const address_space_config *adsp2101_device::memory_space_config(address_spacenum spacenum) const
{
- return (spacenum == AS_PROGRAM) ? &m_program_config :
+ return (spacenum == AS_PROGRAM) ? &m_program_config :
(spacenum == AS_DATA) ? &m_data_config :
NULL;
}
const address_space_config *adsp2181_device::memory_space_config(address_spacenum spacenum) const
{
- return (spacenum == AS_PROGRAM) ? &m_program_config :
+ return (spacenum == AS_PROGRAM) ? &m_program_config :
(spacenum == AS_DATA) ? &m_data_config :
(spacenum == AS_IO) ? &m_io_config :
NULL;
@@ -1089,7 +1089,7 @@ void adsp21xx_device::create_tables()
// initialize the mask table
for (int i = 0; i < 0x4000; i++)
{
- if (i > 0x2000) m_mask_table[i] = 0x0000;
+ if (i > 0x2000) m_mask_table[i] = 0x0000;
else if (i > 0x1000) m_mask_table[i] = 0x2000;
else if (i > 0x0800) m_mask_table[i] = 0x3000;
else if (i > 0x0400) m_mask_table[i] = 0x3800;
@@ -1187,10 +1187,10 @@ void adsp21xx_device::execute_set_input(int inputnum, int state)
{
// update the latched state
if (state != CLEAR_LINE && m_irq_state[inputnum] == CLEAR_LINE)
- m_irq_latch[inputnum] = 1;
+ m_irq_latch[inputnum] = 1;
- // update the absolute state
- m_irq_state[inputnum] = state;
+ // update the absolute state
+ m_irq_state[inputnum] = state;
}
@@ -1203,7 +1203,7 @@ void adsp21xx_device::execute_run()
do
{
// debugging
- m_ppc = m_pc; // copy PC to previous PC
+ m_ppc = m_pc; // copy PC to previous PC
if (check_debugger)
debugger_instruction_hook(this, m_pc);
@@ -1402,22 +1402,22 @@ void adsp21xx_device::execute_run()
// 00001101 0000xxxx xxxxxxxx internal data move
switch ((op >> 8) & 15)
{
- case 0x00: write_reg0((op >> 4) & 15, read_reg0(op & 15)); break;
- case 0x01: write_reg0((op >> 4) & 15, read_reg1(op & 15)); break;
- case 0x02: write_reg0((op >> 4) & 15, read_reg2(op & 15)); break;
- case 0x03: write_reg0((op >> 4) & 15, read_reg3(op & 15)); break;
- case 0x04: write_reg1((op >> 4) & 15, read_reg0(op & 15)); break;
- case 0x05: write_reg1((op >> 4) & 15, read_reg1(op & 15)); break;
- case 0x06: write_reg1((op >> 4) & 15, read_reg2(op & 15)); break;
- case 0x07: write_reg1((op >> 4) & 15, read_reg3(op & 15)); break;
- case 0x08: write_reg2((op >> 4) & 15, read_reg0(op & 15)); break;
- case 0x09: write_reg2((op >> 4) & 15, read_reg1(op & 15)); break;
- case 0x0a: write_reg2((op >> 4) & 15, read_reg2(op & 15)); break;
- case 0x0b: write_reg2((op >> 4) & 15, read_reg3(op & 15)); break;
- case 0x0c: write_reg3((op >> 4) & 15, read_reg0(op & 15)); break;
- case 0x0d: write_reg3((op >> 4) & 15, read_reg1(op & 15)); break;
- case 0x0e: write_reg3((op >> 4) & 15, read_reg2(op & 15)); break;
- case 0x0f: write_reg3((op >> 4) & 15, read_reg3(op & 15)); break;
+ case 0x00: write_reg0((op >> 4) & 15, read_reg0(op & 15)); break;
+ case 0x01: write_reg0((op >> 4) & 15, read_reg1(op & 15)); break;
+ case 0x02: write_reg0((op >> 4) & 15, read_reg2(op & 15)); break;
+ case 0x03: write_reg0((op >> 4) & 15, read_reg3(op & 15)); break;
+ case 0x04: write_reg1((op >> 4) & 15, read_reg0(op & 15)); break;
+ case 0x05: write_reg1((op >> 4) & 15, read_reg1(op & 15)); break;
+ case 0x06: write_reg1((op >> 4) & 15, read_reg2(op & 15)); break;
+ case 0x07: write_reg1((op >> 4) & 15, read_reg3(op & 15)); break;
+ case 0x08: write_reg2((op >> 4) & 15, read_reg0(op & 15)); break;
+ case 0x09: write_reg2((op >> 4) & 15, read_reg1(op & 15)); break;
+ case 0x0a: write_reg2((op >> 4) & 15, read_reg2(op & 15)); break;
+ case 0x0b: write_reg2((op >> 4) & 15, read_reg3(op & 15)); break;
+ case 0x0c: write_reg3((op >> 4) & 15, read_reg0(op & 15)); break;
+ case 0x0d: write_reg3((op >> 4) & 15, read_reg1(op & 15)); break;
+ case 0x0e: write_reg3((op >> 4) & 15, read_reg2(op & 15)); break;
+ case 0x0f: write_reg3((op >> 4) & 15, read_reg3(op & 15)); break;
}
break;
case 0x0e:
diff --git a/src/emu/cpu/adsp2100/adsp2100.h b/src/emu/cpu/adsp2100/adsp2100.h
index 4e39cf2cddf..96cc4650084 100644
--- a/src/emu/cpu/adsp2100/adsp2100.h
+++ b/src/emu/cpu/adsp2100/adsp2100.h
@@ -47,7 +47,7 @@
// DEBUGGING
//**************************************************************************
-#define ADSP_TRACK_HOTSPOTS 0
+#define ADSP_TRACK_HOTSPOTS 0
@@ -56,63 +56,63 @@
//**************************************************************************
// ADSP-2100 IRQs
-const int ADSP2100_IRQ0 = 0; // IRQ0
-const int ADSP2100_SPORT1_RX = 0; // SPORT1 receive IRQ
-const int ADSP2100_IRQ1 = 1; // IRQ1
-const int ADSP2100_SPORT1_TX = 1; // SPORT1 transmit IRQ
-const int ADSP2100_IRQ2 = 2; // IRQ2
-const int ADSP2100_IRQ3 = 3; // IRQ3
+const int ADSP2100_IRQ0 = 0; // IRQ0
+const int ADSP2100_SPORT1_RX = 0; // SPORT1 receive IRQ
+const int ADSP2100_IRQ1 = 1; // IRQ1
+const int ADSP2100_SPORT1_TX = 1; // SPORT1 transmit IRQ
+const int ADSP2100_IRQ2 = 2; // IRQ2
+const int ADSP2100_IRQ3 = 3; // IRQ3
// ADSP-2101 IRQs
-const int ADSP2101_IRQ0 = 0; // IRQ0
-const int ADSP2101_SPORT1_RX = 0; // SPORT1 receive IRQ
-const int ADSP2101_IRQ1 = 1; // IRQ1
-const int ADSP2101_SPORT1_TX = 1; // SPORT1 transmit IRQ
-const int ADSP2101_IRQ2 = 2; // IRQ2
-const int ADSP2101_SPORT0_RX = 3; // SPORT0 receive IRQ
-const int ADSP2101_SPORT0_TX = 4; // SPORT0 transmit IRQ
-const int ADSP2101_TIMER = 5; // internal timer IRQ
+const int ADSP2101_IRQ0 = 0; // IRQ0
+const int ADSP2101_SPORT1_RX = 0; // SPORT1 receive IRQ
+const int ADSP2101_IRQ1 = 1; // IRQ1
+const int ADSP2101_SPORT1_TX = 1; // SPORT1 transmit IRQ
+const int ADSP2101_IRQ2 = 2; // IRQ2
+const int ADSP2101_SPORT0_RX = 3; // SPORT0 receive IRQ
+const int ADSP2101_SPORT0_TX = 4; // SPORT0 transmit IRQ
+const int ADSP2101_TIMER = 5; // internal timer IRQ
// ADSP-2104 IRQs
-const int ADSP2104_IRQ0 = 0; // IRQ0
-const int ADSP2104_SPORT1_RX = 0; // SPORT1 receive IRQ
-const int ADSP2104_IRQ1 = 1; // IRQ1
-const int ADSP2104_SPORT1_TX = 1; // SPORT1 transmit IRQ
-const int ADSP2104_IRQ2 = 2; // IRQ2
-const int ADSP2104_SPORT0_RX = 3; // SPORT0 receive IRQ
-const int ADSP2104_SPORT0_TX = 4; // SPORT0 transmit IRQ
-const int ADSP2104_TIMER = 5; // internal timer IRQ
+const int ADSP2104_IRQ0 = 0; // IRQ0
+const int ADSP2104_SPORT1_RX = 0; // SPORT1 receive IRQ
+const int ADSP2104_IRQ1 = 1; // IRQ1
+const int ADSP2104_SPORT1_TX = 1; // SPORT1 transmit IRQ
+const int ADSP2104_IRQ2 = 2; // IRQ2
+const int ADSP2104_SPORT0_RX = 3; // SPORT0 receive IRQ
+const int ADSP2104_SPORT0_TX = 4; // SPORT0 transmit IRQ
+const int ADSP2104_TIMER = 5; // internal timer IRQ
// ADSP-2105 IRQs
-const int ADSP2105_IRQ0 = 0; // IRQ0
-const int ADSP2105_SPORT1_RX = 0; // SPORT1 receive IRQ
-const int ADSP2105_IRQ1 = 1; // IRQ1
-const int ADSP2105_SPORT1_TX = 1; // SPORT1 transmit IRQ
-const int ADSP2105_IRQ2 = 2; // IRQ2
-const int ADSP2105_TIMER = 5; // internal timer IRQ
+const int ADSP2105_IRQ0 = 0; // IRQ0
+const int ADSP2105_SPORT1_RX = 0; // SPORT1 receive IRQ
+const int ADSP2105_IRQ1 = 1; // IRQ1
+const int ADSP2105_SPORT1_TX = 1; // SPORT1 transmit IRQ
+const int ADSP2105_IRQ2 = 2; // IRQ2
+const int ADSP2105_TIMER = 5; // internal timer IRQ
// ADSP-2115 IRQs
-const int ADSP2115_IRQ0 = 0; // IRQ0
-const int ADSP2115_SPORT1_RX = 0; // SPORT1 receive IRQ
-const int ADSP2115_IRQ1 = 1; // IRQ1
-const int ADSP2115_SPORT1_TX = 1; // SPORT1 transmit IRQ
-const int ADSP2115_IRQ2 = 2; // IRQ2
-const int ADSP2115_SPORT0_RX = 3; // SPORT0 receive IRQ
-const int ADSP2115_SPORT0_TX = 4; // SPORT0 transmit IRQ
-const int ADSP2115_TIMER = 5; // internal timer IRQ
+const int ADSP2115_IRQ0 = 0; // IRQ0
+const int ADSP2115_SPORT1_RX = 0; // SPORT1 receive IRQ
+const int ADSP2115_IRQ1 = 1; // IRQ1
+const int ADSP2115_SPORT1_TX = 1; // SPORT1 transmit IRQ
+const int ADSP2115_IRQ2 = 2; // IRQ2
+const int ADSP2115_SPORT0_RX = 3; // SPORT0 receive IRQ
+const int ADSP2115_SPORT0_TX = 4; // SPORT0 transmit IRQ
+const int ADSP2115_TIMER = 5; // internal timer IRQ
// ADSP-2181 IRQs
-const int ADSP2181_IRQ0 = 0; // IRQ0
-const int ADSP2181_SPORT1_RX = 0; // SPORT1 receive IRQ
-const int ADSP2181_IRQ1 = 1; // IRQ1
-const int ADSP2181_SPORT1_TX = 1; // SPORT1 transmit IRQ
-const int ADSP2181_IRQ2 = 2; // IRQ2
-const int ADSP2181_SPORT0_RX = 3; // SPORT0 receive IRQ
-const int ADSP2181_SPORT0_TX = 4; // SPORT0 transmit IRQ
-const int ADSP2181_TIMER = 5; // internal timer IRQ
-const int ADSP2181_IRQE = 6; // IRQE
-const int ADSP2181_IRQL1 = 7; // IRQL1
-const int ADSP2181_IRQL2 = 8; // IRQL2
+const int ADSP2181_IRQ0 = 0; // IRQ0
+const int ADSP2181_SPORT1_RX = 0; // SPORT1 receive IRQ
+const int ADSP2181_IRQ1 = 1; // IRQ1
+const int ADSP2181_SPORT1_TX = 1; // SPORT1 transmit IRQ
+const int ADSP2181_IRQ2 = 2; // IRQ2
+const int ADSP2181_SPORT0_RX = 3; // SPORT0 receive IRQ
+const int ADSP2181_SPORT0_TX = 4; // SPORT0 transmit IRQ
+const int ADSP2181_TIMER = 5; // internal timer IRQ
+const int ADSP2181_IRQE = 6; // IRQE
+const int ADSP2181_IRQL1 = 7; // IRQL1
+const int ADSP2181_IRQL2 = 8; // IRQL2
// register enumeration
enum
@@ -233,9 +233,9 @@ typedef void (*adsp21xx_timer_func)(adsp21xx_device &device, int enable);
struct adsp21xx_config
{
- adsp21xx_rx_func m_sport_rx_callback; // callback for serial receive
- adsp21xx_tx_func m_sport_tx_callback; // callback for serial transmit
- adsp21xx_timer_func m_timer_fired; // callback for timer fired
+ adsp21xx_rx_func m_sport_rx_callback; // callback for serial receive
+ adsp21xx_tx_func m_sport_tx_callback; // callback for serial transmit
+ adsp21xx_timer_func m_timer_fired; // callback for timer fired
};
@@ -351,16 +351,16 @@ protected:
virtual void check_irqs() = 0;
// internal state
- static const int PC_STACK_DEPTH = 16;
- static const int CNTR_STACK_DEPTH = 4;
- static const int STAT_STACK_DEPTH = 4;
- static const int LOOP_STACK_DEPTH = 4;
+ static const int PC_STACK_DEPTH = 16;
+ static const int CNTR_STACK_DEPTH = 4;
+ static const int STAT_STACK_DEPTH = 4;
+ static const int LOOP_STACK_DEPTH = 4;
// 16-bit registers that can be loaded signed or unsigned
union adsp_reg16
{
- UINT16 u;
- INT16 s;
+ UINT16 u;
+ INT16 s;
};
// the SHIFT result register is 32 bits
@@ -391,128 +391,128 @@ protected:
struct adsp_core
{
// ALU registers
- adsp_reg16 ax0, ax1;
- adsp_reg16 ay0, ay1;
- adsp_reg16 ar;
- adsp_reg16 af;
+ adsp_reg16 ax0, ax1;
+ adsp_reg16 ay0, ay1;
+ adsp_reg16 ar;
+ adsp_reg16 af;
// MAC registers
- adsp_reg16 mx0, mx1;
- adsp_reg16 my0, my1;
- adsp_mac mr;
- adsp_reg16 mf;
+ adsp_reg16 mx0, mx1;
+ adsp_reg16 my0, my1;
+ adsp_mac mr;
+ adsp_reg16 mf;
// SHIFT registers
- adsp_reg16 si;
- adsp_reg16 se;
- adsp_reg16 sb;
- adsp_shift sr;
+ adsp_reg16 si;
+ adsp_reg16 se;
+ adsp_reg16 sb;
+ adsp_shift sr;
// dummy registers
- adsp_reg16 zero;
+ adsp_reg16 zero;
};
// configuration
- const address_space_config m_program_config;
- const address_space_config m_data_config;
- UINT32 m_chip_type;
+ const address_space_config m_program_config;
+ const address_space_config m_data_config;
+ UINT32 m_chip_type;
// other CPU registers
- UINT32 m_pc;
- UINT32 m_ppc;
- UINT32 m_loop;
- UINT32 m_loop_condition;
- UINT32 m_cntr;
+ UINT32 m_pc;
+ UINT32 m_ppc;
+ UINT32 m_loop;
+ UINT32 m_loop_condition;
+ UINT32 m_cntr;
// status registers
- UINT32 m_astat;
- UINT32 m_sstat;
- UINT32 m_mstat;
- UINT32 m_mstat_prev;
- UINT32 m_astat_clear;
- UINT32 m_idle;
+ UINT32 m_astat;
+ UINT32 m_sstat;
+ UINT32 m_mstat;
+ UINT32 m_mstat_prev;
+ UINT32 m_astat_clear;
+ UINT32 m_idle;
// live set of core registers
- adsp_core m_core;
+ adsp_core m_core;
// memory addressing registers
- UINT32 m_i[8];
- INT32 m_m[8];
- UINT32 m_l[8];
- UINT32 m_lmask[8];
- UINT32 m_base[8];
- UINT8 m_px;
+ UINT32 m_i[8];
+ INT32 m_m[8];
+ UINT32 m_l[8];
+ UINT32 m_lmask[8];
+ UINT32 m_base[8];
+ UINT8 m_px;
// stacks
- UINT32 m_loop_stack[LOOP_STACK_DEPTH];
- UINT32 m_cntr_stack[CNTR_STACK_DEPTH];
- UINT32 m_pc_stack[PC_STACK_DEPTH];
- UINT16 m_stat_stack[STAT_STACK_DEPTH][3];
- INT32 m_pc_sp;
- INT32 m_cntr_sp;
- INT32 m_stat_sp;
- INT32 m_loop_sp;
+ UINT32 m_loop_stack[LOOP_STACK_DEPTH];
+ UINT32 m_cntr_stack[CNTR_STACK_DEPTH];
+ UINT32 m_pc_stack[PC_STACK_DEPTH];
+ UINT16 m_stat_stack[STAT_STACK_DEPTH][3];
+ INT32 m_pc_sp;
+ INT32 m_cntr_sp;
+ INT32 m_stat_sp;
+ INT32 m_loop_sp;
// external I/O
- UINT8 m_flagout;
- UINT8 m_flagin;
- UINT8 m_fl0;
- UINT8 m_fl1;
- UINT8 m_fl2;
- UINT16 m_idma_addr;
- UINT16 m_idma_cache;
- UINT8 m_idma_offs;
+ UINT8 m_flagout;
+ UINT8 m_flagin;
+ UINT8 m_fl0;
+ UINT8 m_fl1;
+ UINT8 m_fl2;
+ UINT16 m_idma_addr;
+ UINT16 m_idma_cache;
+ UINT8 m_idma_offs;
// interrupt handling
- UINT16 m_imask;
- UINT8 m_icntl;
- UINT16 m_ifc;
- UINT8 m_irq_state[9];
- UINT8 m_irq_latch[9];
+ UINT16 m_imask;
+ UINT8 m_icntl;
+ UINT16 m_ifc;
+ UINT8 m_irq_state[9];
+ UINT8 m_irq_latch[9];
// other internal states
- int m_icount;
- int m_mstat_mask;
- int m_imask_mask;
+ int m_icount;
+ int m_mstat_mask;
+ int m_imask_mask;
// register maps
- INT16 * m_read0_ptr[16];
- UINT32 * m_read1_ptr[16];
- UINT32 * m_read2_ptr[16];
- void * m_alu_xregs[8];
- void * m_alu_yregs[4];
- void * m_mac_xregs[8];
- void * m_mac_yregs[4];
- void * m_shift_xregs[8];
+ INT16 * m_read0_ptr[16];
+ UINT32 * m_read1_ptr[16];
+ UINT32 * m_read2_ptr[16];
+ void * m_alu_xregs[8];
+ void * m_alu_yregs[4];
+ void * m_mac_xregs[8];
+ void * m_mac_yregs[4];
+ void * m_shift_xregs[8];
// alternate core registers (at end for performance)
- adsp_core m_alt;
+ adsp_core m_alt;
// address spaces
- address_space * m_program;
- address_space * m_data;
- address_space * m_io;
- direct_read_data * m_direct;
+ address_space * m_program;
+ address_space * m_data;
+ address_space * m_io;
+ direct_read_data * m_direct;
// tables
- UINT8 m_condition_table[0x1000];
- UINT16 m_mask_table[0x4000];
- UINT16 m_reverse_table[0x4000];
+ UINT8 m_condition_table[0x1000];
+ UINT16 m_mask_table[0x4000];
+ UINT16 m_reverse_table[0x4000];
// debugging
#if ADSP_TRACK_HOTSPOTS
- UINT32 m_pcbucket[0x4000];
+ UINT32 m_pcbucket[0x4000];
#endif
// flag definitions
- static const int SSFLAG = 0x80;
- static const int MVFLAG = 0x40;
- static const int QFLAG = 0x20;
- static const int SFLAG = 0x10;
- static const int CFLAG = 0x08;
- static const int VFLAG = 0x04;
- static const int NFLAG = 0x02;
- static const int ZFLAG = 0x01;
+ static const int SSFLAG = 0x80;
+ static const int MVFLAG = 0x40;
+ static const int QFLAG = 0x20;
+ static const int SFLAG = 0x10;
+ static const int CFLAG = 0x08;
+ static const int VFLAG = 0x04;
+ static const int NFLAG = 0x02;
+ static const int ZFLAG = 0x01;
};
@@ -580,7 +580,7 @@ protected:
virtual void check_irqs();
// address spaces
- const address_space_config m_io_config;
+ const address_space_config m_io_config;
public:
// public interfaces
diff --git a/src/emu/cpu/alph8201/8201dasm.c b/src/emu/cpu/alph8201/8201dasm.c
index 89077aa9f04..dcfed7345a0 100644
--- a/src/emu/cpu/alph8201/8201dasm.c
+++ b/src/emu/cpu/alph8201/8201dasm.c
@@ -159,101 +159,101 @@ Notes:
/****************************************************/
static const char *const Formats[] = {
- FMT("0000_0000", "NOP"), // 00
- FMT("0000_0001", "RRCA"), // 01
- FMT("0000_0010", "RLCA"), // 02
- FMT("0000_0011", "INC RXB"), // 03 : shougi $360 to $377; splndrbt
- FMT("0000_0100", "DEC RXB"), // 04 : not found
- FMT("0000_0101", "INC A"), // 05
- FMT("0000_0110", "DEC A"), // 06
- FMT("0000_0111", "CPL A"), // 07
- FMT("0000_1aaa", "LD A,(IX0+%X)"), // 08-0F
- FMT("0001_0aaa", "LD A,(IX1+%X)"), // 10-17
- FMT("0001_1aaa", "LD (IX2+%X),A"), // 18-1F
+ FMT("0000_0000", "NOP"), // 00
+ FMT("0000_0001", "RRCA"), // 01
+ FMT("0000_0010", "RLCA"), // 02
+ FMT("0000_0011", "INC RXB"), // 03 : shougi $360 to $377; splndrbt
+ FMT("0000_0100", "DEC RXB"), // 04 : not found
+ FMT("0000_0101", "INC A"), // 05
+ FMT("0000_0110", "DEC A"), // 06
+ FMT("0000_0111", "CPL A"), // 07
+ FMT("0000_1aaa", "LD A,(IX0+%X)"), // 08-0F
+ FMT("0001_0aaa", "LD A,(IX1+%X)"), // 10-17
+ FMT("0001_1aaa", "LD (IX2+%X),A"), // 18-1F
FMT("0010_0aaa", "LD (RXB),(IX0+%X)"),// 20-27 : shougi $360 to $377
FMT("0010_1aaa", "LD (RXB),(IX1+%X)"),// 28-2f : not found
FMT("0011_0aaa", "LD (IX2+%X),(RXB)"),// 30-37 : not found
- FMT("0011_1aaa", "BIT R0.%d"), // 38-3F ZF = R0.a (bit test)
- FMT("0100_aaa0", "LD A,R%X"), // 40-4E
- FMT("0100_aaa1", "LD R%X,A"), // 41-4F
- FMT("0101_aaa0", "ADD A,R%X"), // 50-5E
- FMT("0101_aaa1", "SUB A,R%X"), // 51-5F
- FMT("0110_aaa0", "AND A,R%X"), // 60-6E
- FMT("0110_aaa1", "OR A,R%X"), // 61-6F
- FMT("0111_aaaa", "ADD IX0,$%X"), // 70-7f
- FMT("1000_aaaa", "ADD IX1,$%X"), // 80-8f
- FMT("1001_aaaa", "ADD IX2,$%X"), // 90-9f
- FMT("1010_aaaa", "LD RB,%X"), // A0-AF
- FMT("1011_x0aa", "LD MB,%X"), // B0-B3 (+ mirrors)
- FMT("1011_x1xx", "STOP"), // B4 (+ mirrors)
-
- FMT("1100_0000 I", "LD IX0,$%02X"), // C0
- FMT("1100_0001 I", "LD IX1,$%02X"), // C1
- FMT("1100_0010 I", "LD IX2,$%02X"), // C2
- FMT("1100_0011 I", "LD A,$%02X"), // C3
- FMT("1100_0100 I", "LD LP0,$%02X"), // C4
- FMT("1100_0101 I", "LD LP1,$%02X"), // C5
- FMT("1100_0110 I", "LD LP2,$%02X"), // C6
- FMT("1100_0111 I", "LD RXB,$%02X"), // C7 : shougi, splndrbt, equites
- FMT("1100_1000 I", "ADD A,$%02X"), // C8
- FMT("1100_1001 I", "SUB A,$%02X"), // C9
- FMT("1100_1010 I", "AND A,$%02X"), // CA
- FMT("1100_1011 I", "OR A,$%02X"), // CB
- FMT("1100_1100 I", "DJNZ LP0,$%02X"), // CC
- FMT("1100_1101 I", "DJNZ LP1,$%02X"), // CD
- FMT("1100_1110 I", "DJNZ LP2,$%02X"), // CE
- FMT("1100_1111 I", "JNZ $%02X"), // CF
- FMT("1101_0000 I", "JNC $%02X"), // D0
- FMT("1101_0001 I", "JZ $%02X"), // D1
- FMT("1101_001x I", "J $%02X"), // D2 (+ mirror)
+ FMT("0011_1aaa", "BIT R0.%d"), // 38-3F ZF = R0.a (bit test)
+ FMT("0100_aaa0", "LD A,R%X"), // 40-4E
+ FMT("0100_aaa1", "LD R%X,A"), // 41-4F
+ FMT("0101_aaa0", "ADD A,R%X"), // 50-5E
+ FMT("0101_aaa1", "SUB A,R%X"), // 51-5F
+ FMT("0110_aaa0", "AND A,R%X"), // 60-6E
+ FMT("0110_aaa1", "OR A,R%X"), // 61-6F
+ FMT("0111_aaaa", "ADD IX0,$%X"), // 70-7f
+ FMT("1000_aaaa", "ADD IX1,$%X"), // 80-8f
+ FMT("1001_aaaa", "ADD IX2,$%X"), // 90-9f
+ FMT("1010_aaaa", "LD RB,%X"), // A0-AF
+ FMT("1011_x0aa", "LD MB,%X"), // B0-B3 (+ mirrors)
+ FMT("1011_x1xx", "STOP"), // B4 (+ mirrors)
+
+ FMT("1100_0000 I", "LD IX0,$%02X"), // C0
+ FMT("1100_0001 I", "LD IX1,$%02X"), // C1
+ FMT("1100_0010 I", "LD IX2,$%02X"), // C2
+ FMT("1100_0011 I", "LD A,$%02X"), // C3
+ FMT("1100_0100 I", "LD LP0,$%02X"), // C4
+ FMT("1100_0101 I", "LD LP1,$%02X"), // C5
+ FMT("1100_0110 I", "LD LP2,$%02X"), // C6
+ FMT("1100_0111 I", "LD RXB,$%02X"), // C7 : shougi, splndrbt, equites
+ FMT("1100_1000 I", "ADD A,$%02X"), // C8
+ FMT("1100_1001 I", "SUB A,$%02X"), // C9
+ FMT("1100_1010 I", "AND A,$%02X"), // CA
+ FMT("1100_1011 I", "OR A,$%02X"), // CB
+ FMT("1100_1100 I", "DJNZ LP0,$%02X"), // CC
+ FMT("1100_1101 I", "DJNZ LP1,$%02X"), // CD
+ FMT("1100_1110 I", "DJNZ LP2,$%02X"), // CE
+ FMT("1100_1111 I", "JNZ $%02X"), // CF
+ FMT("1101_0000 I", "JNC $%02X"), // D0
+ FMT("1101_0001 I", "JZ $%02X"), // D1
+ FMT("1101_001x I", "J $%02X"), // D2 (+ mirror)
/* -------------- 830x only ------------- */
- FMT("1101_0100 I", "LD A,(R77:$%02X)"), // D4 : 8303+ only. exctscc2, bullfgtr
- FMT("1101_0101 I", "LD (R77:$%02X),A"), // D5 : 8303+ only. exctscc2, bullfgtr, kouyakyu
- FMT("1101_0110 I", "LD LP0,(R77:$%02X)"), // D6 : 8303+ only. kouyakyu
- FMT("1101_0111 I", "LD (R77:$%02X),LP0"), // D7 : 8303+ only. hvoltage
- FMT("1101_1000 I", "LD A,($%02X)"), // D8 : equites
- FMT("1101_1001 I", "LD ($%02X),A"), // D9 : equites
- FMT("1101_1010 I", "CMP A,$%02X"), // DA :
- FMT("1101_1011 I", "XOR A,$%02X"), // DB : equites splndrbt
- FMT("1101_1100 I", "LD A,R($%02X)"), // DC : not found
- FMT("1101_1101 I", "LD R($%02X),A"), // DD : equites, splndrbt
- FMT("1101_1110 I", "JC $%02X"), // DE : not found
- FMT("1101_1111 I", "CALL $%02X"), // DF :
-
- FMT("1110_0000", "EXG A,IX0"), // E0 : exctsccr
- FMT("1110_0001", "EXG A,IX1"), // E1 : not found
- FMT("1110_0010", "EXG A,IX2"), // E2 : not found
- FMT("1110_0011", "EXG A,LP1"), // E3 : exctsccr in pair with EB
- FMT("1110_0100", "EXG A,LP2"), // E4 : not found
- FMT("1110_0101", "EXG A,RXB"), // E5 : splndrbt
- FMT("1110_0110", "EXG A,LP0"), // E6 : splndrbt, bullfgtr, kouyakyu. EXG, not LD: see splndrbt $3ba to $3d3
- FMT("1110_0111", "EXG A,RB"), // E7 : not found
- FMT("1110_1000", "LD IX0,A"), // E8 :
- FMT("1110_1001", "LD IX1,A"), // E9 : not found
- FMT("1110_1010", "LD IX2,A"), // EA :
- FMT("1110_1011", "LD LP1,A"), // EB : exctsccr in pair with E3
- FMT("1110_1100", "LP LP2,A"), // EC : not found
- FMT("1110_1101", "LD RXB,A"), // ED : splndrbt
- FMT("1110_1110", "LD LP0,A"), // EE : splndrbt, bullfgtr
- FMT("1110_1111", "LD RB,A"), // EF : not found
- FMT("1111_0000", "EXG IX0,IX1"), // F0 : not found
- FMT("1111_0001", "EXG IX0,IX2"), // F1 : splndrbt $2e to $38, equites $40 to $4a
+ FMT("1101_0100 I", "LD A,(R77:$%02X)"), // D4 : 8303+ only. exctscc2, bullfgtr
+ FMT("1101_0101 I", "LD (R77:$%02X),A"), // D5 : 8303+ only. exctscc2, bullfgtr, kouyakyu
+ FMT("1101_0110 I", "LD LP0,(R77:$%02X)"), // D6 : 8303+ only. kouyakyu
+ FMT("1101_0111 I", "LD (R77:$%02X),LP0"), // D7 : 8303+ only. hvoltage
+ FMT("1101_1000 I", "LD A,($%02X)"), // D8 : equites
+ FMT("1101_1001 I", "LD ($%02X),A"), // D9 : equites
+ FMT("1101_1010 I", "CMP A,$%02X"), // DA :
+ FMT("1101_1011 I", "XOR A,$%02X"), // DB : equites splndrbt
+ FMT("1101_1100 I", "LD A,R($%02X)"), // DC : not found
+ FMT("1101_1101 I", "LD R($%02X),A"), // DD : equites, splndrbt
+ FMT("1101_1110 I", "JC $%02X"), // DE : not found
+ FMT("1101_1111 I", "CALL $%02X"), // DF :
+
+ FMT("1110_0000", "EXG A,IX0"), // E0 : exctsccr
+ FMT("1110_0001", "EXG A,IX1"), // E1 : not found
+ FMT("1110_0010", "EXG A,IX2"), // E2 : not found
+ FMT("1110_0011", "EXG A,LP1"), // E3 : exctsccr in pair with EB
+ FMT("1110_0100", "EXG A,LP2"), // E4 : not found
+ FMT("1110_0101", "EXG A,RXB"), // E5 : splndrbt
+ FMT("1110_0110", "EXG A,LP0"), // E6 : splndrbt, bullfgtr, kouyakyu. EXG, not LD: see splndrbt $3ba to $3d3
+ FMT("1110_0111", "EXG A,RB"), // E7 : not found
+ FMT("1110_1000", "LD IX0,A"), // E8 :
+ FMT("1110_1001", "LD IX1,A"), // E9 : not found
+ FMT("1110_1010", "LD IX2,A"), // EA :
+ FMT("1110_1011", "LD LP1,A"), // EB : exctsccr in pair with E3
+ FMT("1110_1100", "LP LP2,A"), // EC : not found
+ FMT("1110_1101", "LD RXB,A"), // ED : splndrbt
+ FMT("1110_1110", "LD LP0,A"), // EE : splndrbt, bullfgtr
+ FMT("1110_1111", "LD RB,A"), // EF : not found
+ FMT("1111_0000", "EXG IX0,IX1"), // F0 : not found
+ FMT("1111_0001", "EXG IX0,IX2"), // F1 : splndrbt $2e to $38, equites $40 to $4a
FMT("1111_0010", "REP LD (IX2),(RXB)"),// F2 : splndrbt LD (IX2),(RXB); INC RXB; DJNZ LP0
FMT("1111_0011", "REP LD (RXB),(IX0)"),// F3 : not found LD (RXB),(IX0); INC RXB; DJNZ LP0
- FMT("1111_0100", "SAVE ZC"), // F4 : not found
- FMT("1111_0101", "REST ZC"), // F5 : not found
- FMT("1111_0110", "LD (RXB),A"), // F6 : exctsccr
- FMT("1111_0111", "LD A,(RXB)"), // F7 : not found
- FMT("1111_1000", "CMP A,(RXB)"), // F8 : exctsccr
- FMT("1111_1001", "XOR A,(RXB)"), // F9 : exctsccr
- FMT("1111_1010", "ADD A,CF"), // FA :
- FMT("1111_1011", "SUB A,!CF"), // FB : not found
- FMT("1111_1100", "TST A"), // FC :
- FMT("1111_1101", "CLR A"), // FD :
- FMT("1111_1110", "LD A,(IX0+A)"), // FE :
- FMT("1111_1111", "RET"), // FF :
+ FMT("1111_0100", "SAVE ZC"), // F4 : not found
+ FMT("1111_0101", "REST ZC"), // F5 : not found
+ FMT("1111_0110", "LD (RXB),A"), // F6 : exctsccr
+ FMT("1111_0111", "LD A,(RXB)"), // F7 : not found
+ FMT("1111_1000", "CMP A,(RXB)"), // F8 : exctsccr
+ FMT("1111_1001", "XOR A,(RXB)"), // F9 : exctsccr
+ FMT("1111_1010", "ADD A,CF"), // FA :
+ FMT("1111_1011", "SUB A,!CF"), // FB : not found
+ FMT("1111_1100", "TST A"), // FC :
+ FMT("1111_1101", "CLR A"), // FD :
+ FMT("1111_1110", "LD A,(IX0+A)"), // FE :
+ FMT("1111_1111", "RET"), // FF :
NULL
};
@@ -347,7 +347,7 @@ CPU_DISASSEMBLE( alpha8201 )
if (!OpInizialized) InitDasm8201();
code = oprom[0];
- op = -1; /* no matching opcode */
+ op = -1; /* no matching opcode */
for ( i = 0; i < MAX_OPS; i++)
{
if( (code & Op[i].mask) == Op[i].bits )
diff --git a/src/emu/cpu/alph8201/alph8201.c b/src/emu/cpu/alph8201/alph8201.c
index a783087fc76..2550d252785 100644
--- a/src/emu/cpu/alph8201/alph8201.c
+++ b/src/emu/cpu/alph8201/alph8201.c
@@ -165,10 +165,10 @@ Timming
/* MAME is unnecessary */
#define HANDLE_HALT_LINE 0
-#define M_RDMEM(A) cpustate->program->read_byte(A)
-#define M_WRMEM(A,V) cpustate->program->write_byte(A, V)
-#define M_RDOP(A) cpustate->direct->read_decrypted_byte(A)
-#define M_RDOP_ARG(A) cpustate->direct->read_raw_byte(A)
+#define M_RDMEM(A) cpustate->program->read_byte(A)
+#define M_WRMEM(A,V) cpustate->program->write_byte(A, V)
+#define M_RDOP(A) cpustate->direct->read_decrypted_byte(A)
+#define M_RDOP_ARG(A) cpustate->direct->read_raw_byte(A)
struct alpha8201_state
{
@@ -183,9 +183,9 @@ struct alpha8201_state
UINT8 savec; /* for 8301, save flags */
UINT8 savez; /* for 8301, save flags */
//
- PAIR ix0; /* 8bit memory read index reg. */
- PAIR ix1; /* 8bitmemory read index reg. */
- PAIR ix2; /* 8bitmemory write index reg. */
+ PAIR ix0; /* 8bit memory read index reg. */
+ PAIR ix1; /* 8bitmemory read index reg. */
+ PAIR ix2; /* 8bitmemory write index reg. */
UINT8 lp0; /* 8bit loop reg. */
UINT8 lp1; /* 8bit loop reg. */
UINT8 lp2; /* 8bit loop reg. */
@@ -210,25 +210,25 @@ struct s_opcode {
};
-#define PC pc.w.l
-#define PCL pc.b.l
-#define RD_REG(x) cpustate->RAM[(cpustate->regPtr<<3)+(x)]
-#define WR_REG(x,d) cpustate->RAM[(cpustate->regPtr<<3)+(x)]=(d)
-#define IX0 ix0.b.l
-#define IX1 ix1.b.l
-#define IX2 ix2.b.l
-#define BIX0 ix0.w.l
-#define BIX1 ix1.w.l
-#define BIX2 ix2.w.l
-#define LP0 lp0
-#define LP1 lp1
-#define LP2 lp2
+#define PC pc.w.l
+#define PCL pc.b.l
+#define RD_REG(x) cpustate->RAM[(cpustate->regPtr<<3)+(x)]
+#define WR_REG(x,d) cpustate->RAM[(cpustate->regPtr<<3)+(x)]=(d)
+#define IX0 ix0.b.l
+#define IX1 ix1.b.l
+#define IX2 ix2.b.l
+#define BIX0 ix0.w.l
+#define BIX1 ix1.w.l
+#define BIX2 ix2.w.l
+#define LP0 lp0
+#define LP1 lp1
+#define LP2 lp2
INLINE alpha8201_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == ALPHA8201 ||
- device->type() == ALPHA8301);
+ device->type() == ALPHA8301);
return (alpha8201_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -259,7 +259,7 @@ INLINE void M_ADDB(alpha8201_state *cpustate, UINT8 dat)
INLINE void M_SUB(alpha8201_state *cpustate, UINT8 dat)
{
- cpustate->cf = (cpustate->A>=dat); // cpustate->cf is No Borrow
+ cpustate->cf = (cpustate->A>=dat); // cpustate->cf is No Borrow
cpustate->A -= dat;
cpustate->zf = (cpustate->A==0);
}
@@ -314,17 +314,17 @@ INLINE void M_UNDEFINED2(alpha8201_state *cpustate)
#endif
}
-static void undefined(alpha8201_state *cpustate) { M_UNDEFINED(cpustate); }
-static void undefined2(alpha8201_state *cpustate) { M_UNDEFINED2(cpustate); }
+static void undefined(alpha8201_state *cpustate) { M_UNDEFINED(cpustate); }
+static void undefined2(alpha8201_state *cpustate) { M_UNDEFINED2(cpustate); }
-static void nop(alpha8201_state *cpustate) { }
-static void rora(alpha8201_state *cpustate) { cpustate->cf = cpustate->A &1; cpustate->A = (cpustate->A>>1) | (cpustate->A<<7); }
-static void rola(alpha8201_state *cpustate) { cpustate->cf = (cpustate->A>>7)&1; cpustate->A = (cpustate->A<<1) | (cpustate->A>>7); }
-static void inc_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0x02); }
-static void dec_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0xfe); }
-static void inc_a(alpha8201_state *cpustate) { M_ADD(cpustate, 0x01); }
-static void dec_a(alpha8201_state *cpustate) { M_ADD(cpustate, 0xff); }
-static void cpl(alpha8201_state *cpustate) { cpustate->A ^= 0xff; };
+static void nop(alpha8201_state *cpustate) { }
+static void rora(alpha8201_state *cpustate) { cpustate->cf = cpustate->A &1; cpustate->A = (cpustate->A>>1) | (cpustate->A<<7); }
+static void rola(alpha8201_state *cpustate) { cpustate->cf = (cpustate->A>>7)&1; cpustate->A = (cpustate->A<<1) | (cpustate->A>>7); }
+static void inc_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0x02); }
+static void dec_b(alpha8201_state *cpustate) { M_ADDB(cpustate, 0xfe); }
+static void inc_a(alpha8201_state *cpustate) { M_ADD(cpustate, 0x01); }
+static void dec_a(alpha8201_state *cpustate) { M_ADD(cpustate, 0xff); }
+static void cpl(alpha8201_state *cpustate) { cpustate->A ^= 0xff; };
static void ld_a_ix0_0(alpha8201_state *cpustate) { cpustate->A = M_RDMEM(cpustate->BIX0+0); }
static void ld_a_ix0_1(alpha8201_state *cpustate) { cpustate->A = M_RDMEM(cpustate->BIX0+1); }
@@ -362,143 +362,143 @@ static void ld_ix0_5_b(alpha8201_state *cpustate) { cpustate->RAM[(cpustate->B>>
static void ld_ix0_6_b(alpha8201_state *cpustate) { cpustate->RAM[(cpustate->B>>1)&0x3f] = M_RDMEM(cpustate->BIX0+6); }
static void ld_ix0_7_b(alpha8201_state *cpustate) { cpustate->RAM[(cpustate->B>>1)&0x3f] = M_RDMEM(cpustate->BIX0+7); }
-static void bit_r0_0(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<0)?0:1; }
-static void bit_r0_1(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<1)?0:1; }
-static void bit_r0_2(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<2)?0:1; }
-static void bit_r0_3(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<3)?0:1; }
-static void bit_r0_4(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<4)?0:1; }
-static void bit_r0_5(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<5)?0:1; }
-static void bit_r0_6(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<6)?0:1; }
-static void bit_r0_7(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<7)?0:1; }
-
-static void ld_a_n(alpha8201_state *cpustate) { cpustate->A = M_RDMEM_OPCODE(cpustate); }
-
-static void ld_a_r0(alpha8201_state *cpustate) { cpustate->A = RD_REG(0); cpustate->zf = (cpustate->A==0); }
-static void ld_a_r1(alpha8201_state *cpustate) { cpustate->A = RD_REG(1); cpustate->zf = (cpustate->A==0); }
-static void ld_a_r2(alpha8201_state *cpustate) { cpustate->A = RD_REG(2); cpustate->zf = (cpustate->A==0); }
-static void ld_a_r3(alpha8201_state *cpustate) { cpustate->A = RD_REG(3); cpustate->zf = (cpustate->A==0); }
-static void ld_a_r4(alpha8201_state *cpustate) { cpustate->A = RD_REG(4); cpustate->zf = (cpustate->A==0); }
-static void ld_a_r5(alpha8201_state *cpustate) { cpustate->A = RD_REG(5); cpustate->zf = (cpustate->A==0); }
-static void ld_a_r6(alpha8201_state *cpustate) { cpustate->A = RD_REG(6); cpustate->zf = (cpustate->A==0); }
-static void ld_a_r7(alpha8201_state *cpustate) { cpustate->A = RD_REG(7); cpustate->zf = (cpustate->A==0); }
-
-static void ld_r0_a(alpha8201_state *cpustate) { WR_REG(0,cpustate->A); }
-static void ld_r1_a(alpha8201_state *cpustate) { WR_REG(1,cpustate->A); }
-static void ld_r2_a(alpha8201_state *cpustate) { WR_REG(2,cpustate->A); }
-static void ld_r3_a(alpha8201_state *cpustate) { WR_REG(3,cpustate->A); }
-static void ld_r4_a(alpha8201_state *cpustate) { WR_REG(4,cpustate->A); }
-static void ld_r5_a(alpha8201_state *cpustate) { WR_REG(5,cpustate->A); }
-static void ld_r6_a(alpha8201_state *cpustate) { WR_REG(6,cpustate->A); }
-static void ld_r7_a(alpha8201_state *cpustate) { WR_REG(7,cpustate->A); }
-
-static void add_a_n(alpha8201_state *cpustate) { M_ADD(cpustate, M_RDMEM_OPCODE(cpustate)); }
-
-static void add_a_r0(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(0)); }
-static void add_a_r1(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(1)); }
-static void add_a_r2(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(2)); }
-static void add_a_r3(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(3)); }
-static void add_a_r4(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(4)); }
-static void add_a_r5(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(5)); }
-static void add_a_r6(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(6)); }
-static void add_a_r7(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(7)); }
-
-static void sub_a_n(alpha8201_state *cpustate) { M_SUB(cpustate, M_RDMEM_OPCODE(cpustate)); }
-
-static void sub_a_r0(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(0)); }
-static void sub_a_r1(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(1)); }
-static void sub_a_r2(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(2)); }
-static void sub_a_r3(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(3)); }
-static void sub_a_r4(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(4)); }
-static void sub_a_r5(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(5)); }
-static void sub_a_r6(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(6)); }
-static void sub_a_r7(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(7)); }
-
-static void and_a_n(alpha8201_state *cpustate) { M_AND(cpustate, M_RDMEM_OPCODE(cpustate)); }
-
-static void and_a_r0(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(0)); }
-static void and_a_r1(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(1)); }
-static void and_a_r2(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(2)); }
-static void and_a_r3(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(3)); }
-static void and_a_r4(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(4)); }
-static void and_a_r5(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(5)); }
-static void and_a_r6(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(6)); }
-static void and_a_r7(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(7)); }
-
-static void or_a_n(alpha8201_state *cpustate) { M_OR(cpustate, M_RDMEM_OPCODE(cpustate)); }
-
-static void or_a_r0(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(0)); }
-static void or_a_r1(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(1)); }
-static void or_a_r2(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(2)); }
-static void or_a_r3(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(3)); }
-static void or_a_r4(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(4)); }
-static void or_a_r5(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(5)); }
-static void or_a_r6(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(6)); }
-static void or_a_r7(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(7)); }
-
-static void add_ix0_0(alpha8201_state *cpustate) { }
-static void add_ix0_1(alpha8201_state *cpustate) { cpustate->IX0 += 1; }
-static void add_ix0_2(alpha8201_state *cpustate) { cpustate->IX0 += 2; }
-static void add_ix0_3(alpha8201_state *cpustate) { cpustate->IX0 += 3; }
-static void add_ix0_4(alpha8201_state *cpustate) { cpustate->IX0 += 4; }
-static void add_ix0_5(alpha8201_state *cpustate) { cpustate->IX0 += 5; }
-static void add_ix0_6(alpha8201_state *cpustate) { cpustate->IX0 += 6; }
-static void add_ix0_7(alpha8201_state *cpustate) { cpustate->IX0 += 7; }
-static void add_ix0_8(alpha8201_state *cpustate) { cpustate->IX0 += 8; }
-static void add_ix0_9(alpha8201_state *cpustate) { cpustate->IX0 += 9; }
-static void add_ix0_a(alpha8201_state *cpustate) { cpustate->IX0 += 10; }
-static void add_ix0_b(alpha8201_state *cpustate) { cpustate->IX0 += 11; }
-static void add_ix0_c(alpha8201_state *cpustate) { cpustate->IX0 += 12; }
-static void add_ix0_d(alpha8201_state *cpustate) { cpustate->IX0 += 13; }
-static void add_ix0_e(alpha8201_state *cpustate) { cpustate->IX0 += 14; }
-static void add_ix0_f(alpha8201_state *cpustate) { cpustate->IX0 += 15; }
-
-static void add_ix1_0(alpha8201_state *cpustate) { }
-static void add_ix1_1(alpha8201_state *cpustate) { cpustate->IX1 += 1; }
-static void add_ix1_2(alpha8201_state *cpustate) { cpustate->IX1 += 2; }
-static void add_ix1_3(alpha8201_state *cpustate) { cpustate->IX1 += 3; }
-static void add_ix1_4(alpha8201_state *cpustate) { cpustate->IX1 += 4; }
-static void add_ix1_5(alpha8201_state *cpustate) { cpustate->IX1 += 5; }
-static void add_ix1_6(alpha8201_state *cpustate) { cpustate->IX1 += 6; }
-static void add_ix1_7(alpha8201_state *cpustate) { cpustate->IX1 += 7; }
-static void add_ix1_8(alpha8201_state *cpustate) { cpustate->IX1 += 8; }
-static void add_ix1_9(alpha8201_state *cpustate) { cpustate->IX1 += 9; }
-static void add_ix1_a(alpha8201_state *cpustate) { cpustate->IX1 += 10; }
-static void add_ix1_b(alpha8201_state *cpustate) { cpustate->IX1 += 11; }
-static void add_ix1_c(alpha8201_state *cpustate) { cpustate->IX1 += 12; }
-static void add_ix1_d(alpha8201_state *cpustate) { cpustate->IX1 += 13; }
-static void add_ix1_e(alpha8201_state *cpustate) { cpustate->IX1 += 14; }
-static void add_ix1_f(alpha8201_state *cpustate) { cpustate->IX1 += 15; }
-
-static void add_ix2_0(alpha8201_state *cpustate) { }
-static void add_ix2_1(alpha8201_state *cpustate) { cpustate->IX2 += 1; }
-static void add_ix2_2(alpha8201_state *cpustate) { cpustate->IX2 += 2; }
-static void add_ix2_3(alpha8201_state *cpustate) { cpustate->IX2 += 3; }
-static void add_ix2_4(alpha8201_state *cpustate) { cpustate->IX2 += 4; }
-static void add_ix2_5(alpha8201_state *cpustate) { cpustate->IX2 += 5; }
-static void add_ix2_6(alpha8201_state *cpustate) { cpustate->IX2 += 6; }
-static void add_ix2_7(alpha8201_state *cpustate) { cpustate->IX2 += 7; }
-static void add_ix2_8(alpha8201_state *cpustate) { cpustate->IX2 += 8; }
-static void add_ix2_9(alpha8201_state *cpustate) { cpustate->IX2 += 9; }
-static void add_ix2_a(alpha8201_state *cpustate) { cpustate->IX2 += 10; }
-static void add_ix2_b(alpha8201_state *cpustate) { cpustate->IX2 += 11; }
-static void add_ix2_c(alpha8201_state *cpustate) { cpustate->IX2 += 12; }
-static void add_ix2_d(alpha8201_state *cpustate) { cpustate->IX2 += 13; }
-static void add_ix2_e(alpha8201_state *cpustate) { cpustate->IX2 += 14; }
-static void add_ix2_f(alpha8201_state *cpustate) { cpustate->IX2 += 15; }
-
-static void ld_base_0(alpha8201_state *cpustate) { cpustate->regPtr = 0; }
-static void ld_base_1(alpha8201_state *cpustate) { cpustate->regPtr = 1; }
-static void ld_base_2(alpha8201_state *cpustate) { cpustate->regPtr = 2; }
-static void ld_base_3(alpha8201_state *cpustate) { cpustate->regPtr = 3; }
-static void ld_base_4(alpha8201_state *cpustate) { cpustate->regPtr = 4; }
-static void ld_base_5(alpha8201_state *cpustate) { cpustate->regPtr = 5; }
-static void ld_base_6(alpha8201_state *cpustate) { cpustate->regPtr = 6; }
-static void ld_base_7(alpha8201_state *cpustate) { cpustate->regPtr = 7; }
-
-static void ld_bank_0(alpha8201_state *cpustate) { cpustate->mb = 0; }
-static void ld_bank_1(alpha8201_state *cpustate) { cpustate->mb = 1; }
-static void ld_bank_2(alpha8201_state *cpustate) { cpustate->mb = 2; }
-static void ld_bank_3(alpha8201_state *cpustate) { cpustate->mb = 3; }
+static void bit_r0_0(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<0)?0:1; }
+static void bit_r0_1(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<1)?0:1; }
+static void bit_r0_2(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<2)?0:1; }
+static void bit_r0_3(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<3)?0:1; }
+static void bit_r0_4(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<4)?0:1; }
+static void bit_r0_5(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<5)?0:1; }
+static void bit_r0_6(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<6)?0:1; }
+static void bit_r0_7(alpha8201_state *cpustate) { cpustate->zf = RD_REG(0)&(1<<7)?0:1; }
+
+static void ld_a_n(alpha8201_state *cpustate) { cpustate->A = M_RDMEM_OPCODE(cpustate); }
+
+static void ld_a_r0(alpha8201_state *cpustate) { cpustate->A = RD_REG(0); cpustate->zf = (cpustate->A==0); }
+static void ld_a_r1(alpha8201_state *cpustate) { cpustate->A = RD_REG(1); cpustate->zf = (cpustate->A==0); }
+static void ld_a_r2(alpha8201_state *cpustate) { cpustate->A = RD_REG(2); cpustate->zf = (cpustate->A==0); }
+static void ld_a_r3(alpha8201_state *cpustate) { cpustate->A = RD_REG(3); cpustate->zf = (cpustate->A==0); }
+static void ld_a_r4(alpha8201_state *cpustate) { cpustate->A = RD_REG(4); cpustate->zf = (cpustate->A==0); }
+static void ld_a_r5(alpha8201_state *cpustate) { cpustate->A = RD_REG(5); cpustate->zf = (cpustate->A==0); }
+static void ld_a_r6(alpha8201_state *cpustate) { cpustate->A = RD_REG(6); cpustate->zf = (cpustate->A==0); }
+static void ld_a_r7(alpha8201_state *cpustate) { cpustate->A = RD_REG(7); cpustate->zf = (cpustate->A==0); }
+
+static void ld_r0_a(alpha8201_state *cpustate) { WR_REG(0,cpustate->A); }
+static void ld_r1_a(alpha8201_state *cpustate) { WR_REG(1,cpustate->A); }
+static void ld_r2_a(alpha8201_state *cpustate) { WR_REG(2,cpustate->A); }
+static void ld_r3_a(alpha8201_state *cpustate) { WR_REG(3,cpustate->A); }
+static void ld_r4_a(alpha8201_state *cpustate) { WR_REG(4,cpustate->A); }
+static void ld_r5_a(alpha8201_state *cpustate) { WR_REG(5,cpustate->A); }
+static void ld_r6_a(alpha8201_state *cpustate) { WR_REG(6,cpustate->A); }
+static void ld_r7_a(alpha8201_state *cpustate) { WR_REG(7,cpustate->A); }
+
+static void add_a_n(alpha8201_state *cpustate) { M_ADD(cpustate, M_RDMEM_OPCODE(cpustate)); }
+
+static void add_a_r0(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(0)); }
+static void add_a_r1(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(1)); }
+static void add_a_r2(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(2)); }
+static void add_a_r3(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(3)); }
+static void add_a_r4(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(4)); }
+static void add_a_r5(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(5)); }
+static void add_a_r6(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(6)); }
+static void add_a_r7(alpha8201_state *cpustate) { M_ADD(cpustate, RD_REG(7)); }
+
+static void sub_a_n(alpha8201_state *cpustate) { M_SUB(cpustate, M_RDMEM_OPCODE(cpustate)); }
+
+static void sub_a_r0(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(0)); }
+static void sub_a_r1(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(1)); }
+static void sub_a_r2(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(2)); }
+static void sub_a_r3(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(3)); }
+static void sub_a_r4(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(4)); }
+static void sub_a_r5(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(5)); }
+static void sub_a_r6(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(6)); }
+static void sub_a_r7(alpha8201_state *cpustate) { M_SUB(cpustate, RD_REG(7)); }
+
+static void and_a_n(alpha8201_state *cpustate) { M_AND(cpustate, M_RDMEM_OPCODE(cpustate)); }
+
+static void and_a_r0(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(0)); }
+static void and_a_r1(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(1)); }
+static void and_a_r2(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(2)); }
+static void and_a_r3(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(3)); }
+static void and_a_r4(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(4)); }
+static void and_a_r5(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(5)); }
+static void and_a_r6(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(6)); }
+static void and_a_r7(alpha8201_state *cpustate) { M_AND(cpustate, RD_REG(7)); }
+
+static void or_a_n(alpha8201_state *cpustate) { M_OR(cpustate, M_RDMEM_OPCODE(cpustate)); }
+
+static void or_a_r0(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(0)); }
+static void or_a_r1(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(1)); }
+static void or_a_r2(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(2)); }
+static void or_a_r3(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(3)); }
+static void or_a_r4(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(4)); }
+static void or_a_r5(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(5)); }
+static void or_a_r6(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(6)); }
+static void or_a_r7(alpha8201_state *cpustate) { M_OR(cpustate, RD_REG(7)); }
+
+static void add_ix0_0(alpha8201_state *cpustate) { }
+static void add_ix0_1(alpha8201_state *cpustate) { cpustate->IX0 += 1; }
+static void add_ix0_2(alpha8201_state *cpustate) { cpustate->IX0 += 2; }
+static void add_ix0_3(alpha8201_state *cpustate) { cpustate->IX0 += 3; }
+static void add_ix0_4(alpha8201_state *cpustate) { cpustate->IX0 += 4; }
+static void add_ix0_5(alpha8201_state *cpustate) { cpustate->IX0 += 5; }
+static void add_ix0_6(alpha8201_state *cpustate) { cpustate->IX0 += 6; }
+static void add_ix0_7(alpha8201_state *cpustate) { cpustate->IX0 += 7; }
+static void add_ix0_8(alpha8201_state *cpustate) { cpustate->IX0 += 8; }
+static void add_ix0_9(alpha8201_state *cpustate) { cpustate->IX0 += 9; }
+static void add_ix0_a(alpha8201_state *cpustate) { cpustate->IX0 += 10; }
+static void add_ix0_b(alpha8201_state *cpustate) { cpustate->IX0 += 11; }
+static void add_ix0_c(alpha8201_state *cpustate) { cpustate->IX0 += 12; }
+static void add_ix0_d(alpha8201_state *cpustate) { cpustate->IX0 += 13; }
+static void add_ix0_e(alpha8201_state *cpustate) { cpustate->IX0 += 14; }
+static void add_ix0_f(alpha8201_state *cpustate) { cpustate->IX0 += 15; }
+
+static void add_ix1_0(alpha8201_state *cpustate) { }
+static void add_ix1_1(alpha8201_state *cpustate) { cpustate->IX1 += 1; }
+static void add_ix1_2(alpha8201_state *cpustate) { cpustate->IX1 += 2; }
+static void add_ix1_3(alpha8201_state *cpustate) { cpustate->IX1 += 3; }
+static void add_ix1_4(alpha8201_state *cpustate) { cpustate->IX1 += 4; }
+static void add_ix1_5(alpha8201_state *cpustate) { cpustate->IX1 += 5; }
+static void add_ix1_6(alpha8201_state *cpustate) { cpustate->IX1 += 6; }
+static void add_ix1_7(alpha8201_state *cpustate) { cpustate->IX1 += 7; }
+static void add_ix1_8(alpha8201_state *cpustate) { cpustate->IX1 += 8; }
+static void add_ix1_9(alpha8201_state *cpustate) { cpustate->IX1 += 9; }
+static void add_ix1_a(alpha8201_state *cpustate) { cpustate->IX1 += 10; }
+static void add_ix1_b(alpha8201_state *cpustate) { cpustate->IX1 += 11; }
+static void add_ix1_c(alpha8201_state *cpustate) { cpustate->IX1 += 12; }
+static void add_ix1_d(alpha8201_state *cpustate) { cpustate->IX1 += 13; }
+static void add_ix1_e(alpha8201_state *cpustate) { cpustate->IX1 += 14; }
+static void add_ix1_f(alpha8201_state *cpustate) { cpustate->IX1 += 15; }
+
+static void add_ix2_0(alpha8201_state *cpustate) { }
+static void add_ix2_1(alpha8201_state *cpustate) { cpustate->IX2 += 1; }
+static void add_ix2_2(alpha8201_state *cpustate) { cpustate->IX2 += 2; }
+static void add_ix2_3(alpha8201_state *cpustate) { cpustate->IX2 += 3; }
+static void add_ix2_4(alpha8201_state *cpustate) { cpustate->IX2 += 4; }
+static void add_ix2_5(alpha8201_state *cpustate) { cpustate->IX2 += 5; }
+static void add_ix2_6(alpha8201_state *cpustate) { cpustate->IX2 += 6; }
+static void add_ix2_7(alpha8201_state *cpustate) { cpustate->IX2 += 7; }
+static void add_ix2_8(alpha8201_state *cpustate) { cpustate->IX2 += 8; }
+static void add_ix2_9(alpha8201_state *cpustate) { cpustate->IX2 += 9; }
+static void add_ix2_a(alpha8201_state *cpustate) { cpustate->IX2 += 10; }
+static void add_ix2_b(alpha8201_state *cpustate) { cpustate->IX2 += 11; }
+static void add_ix2_c(alpha8201_state *cpustate) { cpustate->IX2 += 12; }
+static void add_ix2_d(alpha8201_state *cpustate) { cpustate->IX2 += 13; }
+static void add_ix2_e(alpha8201_state *cpustate) { cpustate->IX2 += 14; }
+static void add_ix2_f(alpha8201_state *cpustate) { cpustate->IX2 += 15; }
+
+static void ld_base_0(alpha8201_state *cpustate) { cpustate->regPtr = 0; }
+static void ld_base_1(alpha8201_state *cpustate) { cpustate->regPtr = 1; }
+static void ld_base_2(alpha8201_state *cpustate) { cpustate->regPtr = 2; }
+static void ld_base_3(alpha8201_state *cpustate) { cpustate->regPtr = 3; }
+static void ld_base_4(alpha8201_state *cpustate) { cpustate->regPtr = 4; }
+static void ld_base_5(alpha8201_state *cpustate) { cpustate->regPtr = 5; }
+static void ld_base_6(alpha8201_state *cpustate) { cpustate->regPtr = 6; }
+static void ld_base_7(alpha8201_state *cpustate) { cpustate->regPtr = 7; }
+
+static void ld_bank_0(alpha8201_state *cpustate) { cpustate->mb = 0; }
+static void ld_bank_1(alpha8201_state *cpustate) { cpustate->mb = 1; }
+static void ld_bank_2(alpha8201_state *cpustate) { cpustate->mb = 2; }
+static void ld_bank_3(alpha8201_state *cpustate) { cpustate->mb = 3; }
static void stop(alpha8201_state *cpustate)
{
@@ -507,22 +507,22 @@ static void stop(alpha8201_state *cpustate)
cpustate->mb |= 0x08; /* mark internal HALT state */
}
-static void ld_ix0_n(alpha8201_state *cpustate) { cpustate->IX0 = M_RDMEM_OPCODE(cpustate); }
-static void ld_ix1_n(alpha8201_state *cpustate) { cpustate->IX1 = M_RDMEM_OPCODE(cpustate); }
-static void ld_ix2_n(alpha8201_state *cpustate) { cpustate->IX2 = M_RDMEM_OPCODE(cpustate); }
-static void ld_lp0_n(alpha8201_state *cpustate) { cpustate->LP0 = M_RDMEM_OPCODE(cpustate); }
-static void ld_lp1_n(alpha8201_state *cpustate) { cpustate->LP1 = M_RDMEM_OPCODE(cpustate); }
-static void ld_lp2_n(alpha8201_state *cpustate) { cpustate->LP2 = M_RDMEM_OPCODE(cpustate); }
-static void ld_b_n(alpha8201_state *cpustate) { cpustate->B = M_RDMEM_OPCODE(cpustate); }
-
-static void djnz_lp0(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->LP0--; if (cpustate->LP0 != 0) M_JMP(cpustate, i); }
-static void djnz_lp1(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->LP1--; if (cpustate->LP1 != 0) M_JMP(cpustate, i); }
-static void djnz_lp2(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->LP2--; if (cpustate->LP2 != 0) M_JMP(cpustate, i); }
-static void jnz(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if (!cpustate->zf) M_JMP(cpustate, i); }
-static void jnc(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if (!cpustate->cf) M_JMP(cpustate, i);}
-static void jz(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if ( cpustate->zf) M_JMP(cpustate, i); }
-static void jc(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if ( cpustate->cf) M_JMP(cpustate, i);}
-static void jmp(alpha8201_state *cpustate) { M_JMP(cpustate, M_RDMEM_OPCODE(cpustate) ); }
+static void ld_ix0_n(alpha8201_state *cpustate) { cpustate->IX0 = M_RDMEM_OPCODE(cpustate); }
+static void ld_ix1_n(alpha8201_state *cpustate) { cpustate->IX1 = M_RDMEM_OPCODE(cpustate); }
+static void ld_ix2_n(alpha8201_state *cpustate) { cpustate->IX2 = M_RDMEM_OPCODE(cpustate); }
+static void ld_lp0_n(alpha8201_state *cpustate) { cpustate->LP0 = M_RDMEM_OPCODE(cpustate); }
+static void ld_lp1_n(alpha8201_state *cpustate) { cpustate->LP1 = M_RDMEM_OPCODE(cpustate); }
+static void ld_lp2_n(alpha8201_state *cpustate) { cpustate->LP2 = M_RDMEM_OPCODE(cpustate); }
+static void ld_b_n(alpha8201_state *cpustate) { cpustate->B = M_RDMEM_OPCODE(cpustate); }
+
+static void djnz_lp0(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->LP0--; if (cpustate->LP0 != 0) M_JMP(cpustate, i); }
+static void djnz_lp1(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->LP1--; if (cpustate->LP1 != 0) M_JMP(cpustate, i); }
+static void djnz_lp2(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->LP2--; if (cpustate->LP2 != 0) M_JMP(cpustate, i); }
+static void jnz(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if (!cpustate->zf) M_JMP(cpustate, i); }
+static void jnc(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if (!cpustate->cf) M_JMP(cpustate, i);}
+static void jz(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if ( cpustate->zf) M_JMP(cpustate, i); }
+static void jc(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); if ( cpustate->cf) M_JMP(cpustate, i);}
+static void jmp(alpha8201_state *cpustate) { M_JMP(cpustate, M_RDMEM_OPCODE(cpustate) ); }
static const s_opcode opcode_8201[256]=
{
@@ -536,33 +536,33 @@ static const s_opcode opcode_8201[256]=
{C2,undefined },{C2,undefined },{C2, undefined },{C2,undefined },{C2,undefined },{C2,undefined },{C2,undefined },{C2,undefined },
{C2,bit_r0_0 },{C2,bit_r0_1 },{C2, bit_r0_2 },{C2, bit_r0_3 },{C2, bit_r0_4 },{C2, bit_r0_5 },{C2, bit_r0_6 },{C2, bit_r0_7 },
/* 40 : 8201 */
- {C2, ld_a_r0 },{C2, ld_r0_a },{C2, ld_a_r1 },{C2, ld_r1_a },{C2, ld_a_r2 },{C2, ld_r2_a },{C2, ld_a_r3 },{C2, ld_r3_a },
- {C2, ld_a_r4 },{C2, ld_r4_a },{C2, ld_a_r5 },{C2, ld_r5_a },{C2, ld_a_r6 },{C2, ld_r6_a },{C2, ld_a_r7 },{C2, ld_r7_a },
- {C1, add_a_r0 },{C1, sub_a_r0 },{C1, add_a_r1 },{C1, sub_a_r1 },{C1, add_a_r2 },{C1, sub_a_r2 },{C1, add_a_r3 },{C1, sub_a_r3 },
- {C1, add_a_r4 },{C1, sub_a_r4 },{C1, add_a_r5 },{C1, sub_a_r5 },{C1, add_a_r6 },{C1, sub_a_r6 },{C1, add_a_r7 },{C1, sub_a_r7 },
- {C1, and_a_r0 },{C1, or_a_r0 },{C1, and_a_r1 },{C1, or_a_r1 },{C1, and_a_r2 },{C1, or_a_r2 },{C1, and_a_r3 },{C1, or_a_r3 },
- {C1, and_a_r4 },{C1, or_a_r4 },{C1, and_a_r5 },{C1, or_a_r5 },{C1, and_a_r6 },{C1, or_a_r6 },{C1, and_a_r7 },{C1, or_a_r7 },
- {C1, add_ix0_0 },{C1, add_ix0_1},{C1, add_ix0_2},{C1, add_ix0_3},{C1, add_ix0_4},{C1, add_ix0_5},{C1, add_ix0_6},{C1, add_ix0_7},
- {C1, add_ix0_8 },{C1, add_ix0_9},{C1, add_ix0_a},{C1, add_ix0_b},{C1, add_ix0_c},{C1, add_ix0_d},{C1, add_ix0_e},{C1, add_ix0_f},
+ {C2, ld_a_r0 },{C2, ld_r0_a },{C2, ld_a_r1 },{C2, ld_r1_a },{C2, ld_a_r2 },{C2, ld_r2_a },{C2, ld_a_r3 },{C2, ld_r3_a },
+ {C2, ld_a_r4 },{C2, ld_r4_a },{C2, ld_a_r5 },{C2, ld_r5_a },{C2, ld_a_r6 },{C2, ld_r6_a },{C2, ld_a_r7 },{C2, ld_r7_a },
+ {C1, add_a_r0 },{C1, sub_a_r0 },{C1, add_a_r1 },{C1, sub_a_r1 },{C1, add_a_r2 },{C1, sub_a_r2 },{C1, add_a_r3 },{C1, sub_a_r3 },
+ {C1, add_a_r4 },{C1, sub_a_r4 },{C1, add_a_r5 },{C1, sub_a_r5 },{C1, add_a_r6 },{C1, sub_a_r6 },{C1, add_a_r7 },{C1, sub_a_r7 },
+ {C1, and_a_r0 },{C1, or_a_r0 },{C1, and_a_r1 },{C1, or_a_r1 },{C1, and_a_r2 },{C1, or_a_r2 },{C1, and_a_r3 },{C1, or_a_r3 },
+ {C1, and_a_r4 },{C1, or_a_r4 },{C1, and_a_r5 },{C1, or_a_r5 },{C1, and_a_r6 },{C1, or_a_r6 },{C1, and_a_r7 },{C1, or_a_r7 },
+ {C1, add_ix0_0 },{C1, add_ix0_1},{C1, add_ix0_2},{C1, add_ix0_3},{C1, add_ix0_4},{C1, add_ix0_5},{C1, add_ix0_6},{C1, add_ix0_7},
+ {C1, add_ix0_8 },{C1, add_ix0_9},{C1, add_ix0_a},{C1, add_ix0_b},{C1, add_ix0_c},{C1, add_ix0_d},{C1, add_ix0_e},{C1, add_ix0_f},
/* 80 : 8201 */
- {C1, add_ix1_0 },{C1, add_ix1_1},{C1, add_ix1_2},{C1, add_ix1_3},{C1, add_ix1_4},{C1, add_ix1_5},{C1, add_ix1_6},{C1, add_ix1_7},
- {C1, add_ix1_8 },{C1, add_ix1_9},{C1, add_ix1_a},{C1, add_ix1_b},{C1, add_ix1_c},{C1, add_ix1_d},{C1, add_ix1_e},{C1, add_ix1_f},
- {C1, add_ix2_0 },{C1, add_ix2_1},{C1, add_ix2_2},{C1, add_ix2_3},{C1, add_ix2_4},{C1, add_ix2_5},{C1, add_ix2_6},{C1, add_ix2_7},
- {C1, add_ix2_8 },{C1, add_ix2_9},{C1, add_ix2_a},{C1, add_ix2_b},{C1, add_ix2_c},{C1, add_ix2_d},{C1, add_ix2_e},{C1, add_ix2_f},
- {C1, ld_base_0 },{C1, ld_base_1},{C1, ld_base_2},{C1, ld_base_3},{C1, ld_base_4},{C1, ld_base_5},{C1, ld_base_6},{C1, ld_base_7},
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
- {C1, ld_bank_0 },{C1, ld_bank_1},{C1, ld_bank_2},{C1, ld_bank_3},{C2, stop },{C1, undefined},{C1, undefined},{C1, undefined},
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, add_ix1_0 },{C1, add_ix1_1},{C1, add_ix1_2},{C1, add_ix1_3},{C1, add_ix1_4},{C1, add_ix1_5},{C1, add_ix1_6},{C1, add_ix1_7},
+ {C1, add_ix1_8 },{C1, add_ix1_9},{C1, add_ix1_a},{C1, add_ix1_b},{C1, add_ix1_c},{C1, add_ix1_d},{C1, add_ix1_e},{C1, add_ix1_f},
+ {C1, add_ix2_0 },{C1, add_ix2_1},{C1, add_ix2_2},{C1, add_ix2_3},{C1, add_ix2_4},{C1, add_ix2_5},{C1, add_ix2_6},{C1, add_ix2_7},
+ {C1, add_ix2_8 },{C1, add_ix2_9},{C1, add_ix2_a},{C1, add_ix2_b},{C1, add_ix2_c},{C1, add_ix2_d},{C1, add_ix2_e},{C1, add_ix2_f},
+ {C1, ld_base_0 },{C1, ld_base_1},{C1, ld_base_2},{C1, ld_base_3},{C1, ld_base_4},{C1, ld_base_5},{C1, ld_base_6},{C1, ld_base_7},
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, ld_bank_0 },{C1, ld_bank_1},{C1, ld_bank_2},{C1, ld_bank_3},{C2, stop },{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
/* c0 : 8201 */
- {C2, ld_ix0_n },{C2, ld_ix1_n },{C2, ld_ix2_n },{C2, ld_a_n },{C2, ld_lp0_n },{C2, ld_lp1_n },{C2, ld_lp2_n },{C2, ld_b_n },
- {C2, add_a_n },{C2, sub_a_n },{C2, and_a_n },{C2, or_a_n },{C2, djnz_lp0 },{C2, djnz_lp1 },{C2, djnz_lp2 },{C2, jnz },
- {C2, jnc },{C2, jz },{C2, jmp },{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2, undefined2},
- {C2, undefined2 },{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2, undefined2},
+ {C2, ld_ix0_n },{C2, ld_ix1_n },{C2, ld_ix2_n },{C2, ld_a_n },{C2, ld_lp0_n },{C2, ld_lp1_n },{C2, ld_lp2_n },{C2, ld_b_n },
+ {C2, add_a_n },{C2, sub_a_n },{C2, and_a_n },{C2, or_a_n },{C2, djnz_lp0 },{C2, djnz_lp1 },{C2, djnz_lp2 },{C2, jnz },
+ {C2, jnc },{C2, jz },{C2, jmp },{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2, undefined2},
+ {C2, undefined2 },{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2,undefined2},{C2, undefined2},
/* E0 : 8201*/
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined }
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined }
};
@@ -607,10 +607,10 @@ static void xor_a_rxb(alpha8201_state *cpustate) { M_XOR(cpustate, cpustate->RAM
static void add_a_cf(alpha8201_state *cpustate) { if (cpustate->cf) inc_a(cpustate); }
static void sub_a_cf(alpha8201_state *cpustate) { if (cpustate->cf) dec_a(cpustate); }
-static void tst_a(alpha8201_state *cpustate) { cpustate->zf = (cpustate->A==0); }
-static void clr_a(alpha8201_state *cpustate) { cpustate->A = 0; cpustate->zf = (cpustate->A==0); }
-static void cmp_a_n(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->zf = (cpustate->A==i); cpustate->cf = (cpustate->A>=i); }
-static void xor_a_n(alpha8201_state *cpustate) { M_XOR(cpustate, M_RDMEM_OPCODE(cpustate) ); }
+static void tst_a(alpha8201_state *cpustate) { cpustate->zf = (cpustate->A==0); }
+static void clr_a(alpha8201_state *cpustate) { cpustate->A = 0; cpustate->zf = (cpustate->A==0); }
+static void cmp_a_n(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->zf = (cpustate->A==i); cpustate->cf = (cpustate->A>=i); }
+static void xor_a_n(alpha8201_state *cpustate) { M_XOR(cpustate, M_RDMEM_OPCODE(cpustate) ); }
static void call(alpha8201_state *cpustate) { UINT8 i=M_RDMEM_OPCODE(cpustate); cpustate->retptr.w.l = cpustate->PC; M_JMP(cpustate, i); };
static void ld_a_ix0_a(alpha8201_state *cpustate) { cpustate->A = M_RDMEM(cpustate->BIX0+cpustate->A); }
static void ret(alpha8201_state *cpustate) { cpustate->mb = cpustate->retptr.b.h; M_JMP(cpustate, cpustate->retptr.b.l ); };
@@ -629,33 +629,33 @@ static const s_opcode opcode_8301[256]=
{C2,undefined },{C2,undefined },{C2, undefined },{C2,undefined },{C2,undefined },{C2,undefined },{C2,undefined },{C2,undefined },
{C2,bit_r0_0 },{C2,bit_r0_1 },{C2, bit_r0_2 },{C2, bit_r0_3 },{C2, bit_r0_4 },{C2, bit_r0_5 },{C2, bit_r0_6 },{C2, bit_r0_7 },
/* 40 : 8301 */
- {C2, ld_a_r0 },{C2, ld_r0_a },{C2, ld_a_r1 },{C2, ld_r1_a },{C2, ld_a_r2 },{C2, ld_r2_a },{C2, ld_a_r3 },{C2, ld_r3_a },
- {C2, ld_a_r4 },{C2, ld_r4_a },{C2, ld_a_r5 },{C2, ld_r5_a },{C2, ld_a_r6 },{C2, ld_r6_a },{C2, ld_a_r7 },{C2, ld_r7_a },
- {C1, add_a_r0 },{C1, sub_a_r0 },{C1, add_a_r1 },{C1, sub_a_r1 },{C1, add_a_r2 },{C1, sub_a_r2 },{C1, add_a_r3 },{C1, sub_a_r3 },
- {C1, add_a_r4 },{C1, sub_a_r4 },{C1, add_a_r5 },{C1, sub_a_r5 },{C1, add_a_r6 },{C1, sub_a_r6 },{C1, add_a_r7 },{C1, sub_a_r7 },
+ {C2, ld_a_r0 },{C2, ld_r0_a },{C2, ld_a_r1 },{C2, ld_r1_a },{C2, ld_a_r2 },{C2, ld_r2_a },{C2, ld_a_r3 },{C2, ld_r3_a },
+ {C2, ld_a_r4 },{C2, ld_r4_a },{C2, ld_a_r5 },{C2, ld_r5_a },{C2, ld_a_r6 },{C2, ld_r6_a },{C2, ld_a_r7 },{C2, ld_r7_a },
+ {C1, add_a_r0 },{C1, sub_a_r0 },{C1, add_a_r1 },{C1, sub_a_r1 },{C1, add_a_r2 },{C1, sub_a_r2 },{C1, add_a_r3 },{C1, sub_a_r3 },
+ {C1, add_a_r4 },{C1, sub_a_r4 },{C1, add_a_r5 },{C1, sub_a_r5 },{C1, add_a_r6 },{C1, sub_a_r6 },{C1, add_a_r7 },{C1, sub_a_r7 },
/* 60 : 8301 */
- {C1, and_a_r0 },{C1, or_a_r0 },{C1, and_a_r1 },{C1, or_a_r1 },{C1, and_a_r2 },{C1, or_a_r2 },{C1, and_a_r3 },{C1, or_a_r3 },
- {C1, and_a_r4 },{C1, or_a_r4 },{C1, and_a_r5 },{C1, or_a_r5 },{C1, and_a_r6 },{C1, or_a_r6 },{C1, and_a_r7 },{C1, or_a_r7 },
- {C1, add_ix0_0 },{C1, add_ix0_1},{C1, add_ix0_2},{C1, add_ix0_3},{C1, add_ix0_4},{C1, add_ix0_5},{C1, add_ix0_6},{C1, add_ix0_7},
- {C1, add_ix0_8 },{C1, add_ix0_9},{C1, add_ix0_a},{C1, add_ix0_b},{C1, add_ix0_c},{C1, add_ix0_d},{C1, add_ix0_e},{C1, add_ix0_f},
+ {C1, and_a_r0 },{C1, or_a_r0 },{C1, and_a_r1 },{C1, or_a_r1 },{C1, and_a_r2 },{C1, or_a_r2 },{C1, and_a_r3 },{C1, or_a_r3 },
+ {C1, and_a_r4 },{C1, or_a_r4 },{C1, and_a_r5 },{C1, or_a_r5 },{C1, and_a_r6 },{C1, or_a_r6 },{C1, and_a_r7 },{C1, or_a_r7 },
+ {C1, add_ix0_0 },{C1, add_ix0_1},{C1, add_ix0_2},{C1, add_ix0_3},{C1, add_ix0_4},{C1, add_ix0_5},{C1, add_ix0_6},{C1, add_ix0_7},
+ {C1, add_ix0_8 },{C1, add_ix0_9},{C1, add_ix0_a},{C1, add_ix0_b},{C1, add_ix0_c},{C1, add_ix0_d},{C1, add_ix0_e},{C1, add_ix0_f},
/* 80 : 8301 */
- {C1, add_ix1_0 },{C1, add_ix1_1},{C1, add_ix1_2},{C1, add_ix1_3},{C1, add_ix1_4},{C1, add_ix1_5},{C1, add_ix1_6},{C1, add_ix1_7},
- {C1, add_ix1_8 },{C1, add_ix1_9},{C1, add_ix1_a},{C1, add_ix1_b},{C1, add_ix1_c},{C1, add_ix1_d},{C1, add_ix1_e},{C1, add_ix1_f},
- {C1, add_ix2_0 },{C1, add_ix2_1},{C1, add_ix2_2},{C1, add_ix2_3},{C1, add_ix2_4},{C1, add_ix2_5},{C1, add_ix2_6},{C1, add_ix2_7},
- {C1, add_ix2_8 },{C1, add_ix2_9},{C1, add_ix2_a},{C1, add_ix2_b},{C1, add_ix2_c},{C1, add_ix2_d},{C1, add_ix2_e},{C1, add_ix2_f},
+ {C1, add_ix1_0 },{C1, add_ix1_1},{C1, add_ix1_2},{C1, add_ix1_3},{C1, add_ix1_4},{C1, add_ix1_5},{C1, add_ix1_6},{C1, add_ix1_7},
+ {C1, add_ix1_8 },{C1, add_ix1_9},{C1, add_ix1_a},{C1, add_ix1_b},{C1, add_ix1_c},{C1, add_ix1_d},{C1, add_ix1_e},{C1, add_ix1_f},
+ {C1, add_ix2_0 },{C1, add_ix2_1},{C1, add_ix2_2},{C1, add_ix2_3},{C1, add_ix2_4},{C1, add_ix2_5},{C1, add_ix2_6},{C1, add_ix2_7},
+ {C1, add_ix2_8 },{C1, add_ix2_9},{C1, add_ix2_a},{C1, add_ix2_b},{C1, add_ix2_c},{C1, add_ix2_d},{C1, add_ix2_e},{C1, add_ix2_f},
/* A0 : 8301 */
- {C1, ld_base_0 },{C1, ld_base_1},{C1, ld_base_2},{C1, ld_base_3},{C1, ld_base_4},{C1, ld_base_5},{C1, ld_base_6},{C1, ld_base_7},
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
- {C1, ld_bank_0 },{C1, ld_bank_1},{C1, ld_bank_2},{C1, ld_bank_3},{C2, stop },{C1, undefined},{C1, undefined},{C1, undefined},
- {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, ld_base_0 },{C1, ld_base_1},{C1, ld_base_2},{C1, ld_base_3},{C1, ld_base_4},{C1, ld_base_5},{C1, ld_base_6},{C1, ld_base_7},
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, ld_bank_0 },{C1, ld_bank_1},{C1, ld_bank_2},{C1, ld_bank_3},{C2, stop },{C1, undefined},{C1, undefined},{C1, undefined},
+ {C1, undefined },{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},{C1, undefined},
/* c0 : 8301 */
- {C2, ld_ix0_n },{C2, ld_ix1_n},{C2, ld_ix2_n },{C2, ld_a_n },{C2, ld_lp0_n },{C2, ld_lp1_n },{C2, ld_lp2_n },{C2, ld_b_n },
- {C2, add_a_n },{C2, sub_a_n },{C2, and_a_n },{C2, or_a_n },{C2, djnz_lp0 },{C2, djnz_lp1 },{C2, djnz_lp2 },{C2, jnz },
- {C2, jnc },{C2, jz },{C2, jmp },{C2,undefined2},{C2, op_d4 },{C2, op_d5 },{C2, op_d6 },{C2, op_d7 },
- {C2, ld_a_abs },{C2, ld_abs_a},{C2,cmp_a_n },{C2,xor_a_n },{C2, ld_a_r },{C2, ld_r_a },{C2, jc },{C2, call},
+ {C2, ld_ix0_n },{C2, ld_ix1_n},{C2, ld_ix2_n },{C2, ld_a_n },{C2, ld_lp0_n },{C2, ld_lp1_n },{C2, ld_lp2_n },{C2, ld_b_n },
+ {C2, add_a_n },{C2, sub_a_n },{C2, and_a_n },{C2, or_a_n },{C2, djnz_lp0 },{C2, djnz_lp1 },{C2, djnz_lp2 },{C2, jnz },
+ {C2, jnc },{C2, jz },{C2, jmp },{C2,undefined2},{C2, op_d4 },{C2, op_d5 },{C2, op_d6 },{C2, op_d7 },
+ {C2, ld_a_abs },{C2, ld_abs_a},{C2,cmp_a_n },{C2,xor_a_n },{C2, ld_a_r },{C2, ld_r_a },{C2, jc },{C2, call},
/* E0 : 8301 */
- {C1, exg_a_ix0 },{C1, exg_a_ix1},{C1, exg_a_ix2},{C1, exg_a_lp1},{C1, exg_a_lp2},{C1, exg_a_b },{C1, exg_a_lp0},{C1, exg_a_rb },
- {C1, ld_ix0_a },{C1, ld_ix1_a },{C1, ld_ix2_a },{C1, ld_lp1_a },{C1, ld_lp2_a },{C1, ld_b_a },{C1, ld_lp0_a },{C1, ld_rb_a },
+ {C1, exg_a_ix0 },{C1, exg_a_ix1},{C1, exg_a_ix2},{C1, exg_a_lp1},{C1, exg_a_lp2},{C1, exg_a_b },{C1, exg_a_lp0},{C1, exg_a_rb },
+ {C1, ld_ix0_a },{C1, ld_ix1_a },{C1, ld_ix2_a },{C1, ld_lp1_a },{C1, ld_lp2_a },{C1, ld_b_a },{C1, ld_lp0_a },{C1, ld_rb_a },
{C1,exg_ix0_ix1},{C1,exg_ix0_ix2},{C1,op_rep_ld_ix2_b},{C1, op_rep_ld_b_ix0},{C1, save_zc},{C1, rest_zc},{C1, ld_rxb_a },{C1, ld_a_rxb },
{C1, cmp_a_rxb },{C1, xor_a_rxb},{C1, add_a_cf },{C1, sub_a_cf },{C1, tst_a },{C1, clr_a },{C1, ld_a_ix0_a},{C1, ret }
};
@@ -837,34 +837,34 @@ static CPU_SET_INFO( alpha8201 )
switch (state)
{
#if HANDLE_HALT_LINE
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_HALT: set_irq_line(cpustate, INPUT_LINE_HALT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_HALT: set_irq_line(cpustate, INPUT_LINE_HALT, info->i); break;
#endif
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + ALPHA8201_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_PC: cpustate->PC = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + ALPHA8201_SP: M_WRMEM(0x001,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_RB: cpustate->regPtr = info->i & 7; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_MB: cpustate->mb = info->i & 0x03; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_SP: M_WRMEM(0x001,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_RB: cpustate->regPtr = info->i & 7; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_MB: cpustate->mb = info->i & 0x03; break;
#if 0
- case CPUINFO_INT_REGISTER + ALPHA8201_ZF: cpustate->zf= info->i & 0x01; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_CF: cpustate->cf= info->i & 0x01; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_ZF: cpustate->zf= info->i & 0x01; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_CF: cpustate->cf= info->i & 0x01; break;
#endif
- case CPUINFO_INT_REGISTER + ALPHA8201_IX0: cpustate->IX0 = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_IX1: cpustate->IX1 = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_IX2: cpustate->IX2 = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_LP0: cpustate->LP0 = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_LP1: cpustate->LP1 = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_LP2: cpustate->LP2 = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_A: cpustate->A = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_B: cpustate->B = info->i; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R0: WR_REG(0,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R1: WR_REG(1,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R2: WR_REG(2,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R3: WR_REG(3,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R4: WR_REG(4,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R5: WR_REG(5,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R6: WR_REG(6,info->i); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R7: WR_REG(7,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_IX0: cpustate->IX0 = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_IX1: cpustate->IX1 = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_IX2: cpustate->IX2 = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_LP0: cpustate->LP0 = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_LP1: cpustate->LP1 = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_LP2: cpustate->LP2 = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_A: cpustate->A = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_B: cpustate->B = info->i; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R0: WR_REG(0,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R1: WR_REG(1,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R2: WR_REG(2,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R3: WR_REG(3,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R4: WR_REG(4,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R5: WR_REG(5,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R6: WR_REG(6,info->i); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R7: WR_REG(7,info->i); break;
}
}
@@ -881,102 +881,102 @@ static CPU_GET_INFO( alpha8xxx )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(alpha8201_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 6; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(alpha8201_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 6; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
#if HANDLE_HALT_LINE
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_HALT: info->i = cpustate->halt ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_HALT: info->i = cpustate->halt ? ASSERT_LINE : CLEAR_LINE; break;
#endif
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + ALPHA8201_PC: info->i = cpustate->PC & 0x3ff; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_PC: info->i = cpustate->PC & 0x3ff; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + ALPHA8201_SP: info->i = M_RDMEM(0x001); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_RB: info->i = cpustate->regPtr; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_MB: info->i = cpustate->mb; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_ZF: info->i = cpustate->zf; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_CF: info->i = cpustate->cf; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_IX0: info->i = cpustate->IX0; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_IX1: info->i = cpustate->IX1; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_IX2: info->i = cpustate->IX2; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_LP0: info->i = cpustate->LP0; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_LP1: info->i = cpustate->LP1; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_LP2: info->i = cpustate->LP2; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_A: info->i = cpustate->A; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_B: info->i = cpustate->B; break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R0: info->i = RD_REG(0); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R1: info->i = RD_REG(1); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R2: info->i = RD_REG(2); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R3: info->i = RD_REG(3); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R4: info->i = RD_REG(4); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R5: info->i = RD_REG(5); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R6: info->i = RD_REG(6); break;
- case CPUINFO_INT_REGISTER + ALPHA8201_R7: info->i = RD_REG(7); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_SP: info->i = M_RDMEM(0x001); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_RB: info->i = cpustate->regPtr; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_MB: info->i = cpustate->mb; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_ZF: info->i = cpustate->zf; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_CF: info->i = cpustate->cf; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_IX0: info->i = cpustate->IX0; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_IX1: info->i = cpustate->IX1; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_IX2: info->i = cpustate->IX2; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_LP0: info->i = cpustate->LP0; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_LP1: info->i = cpustate->LP1; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_LP2: info->i = cpustate->LP2; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_A: info->i = cpustate->A; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_B: info->i = cpustate->B; break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R0: info->i = RD_REG(0); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R1: info->i = RD_REG(1); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R2: info->i = RD_REG(2); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R3: info->i = RD_REG(3); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R4: info->i = RD_REG(4); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R5: info->i = RD_REG(5); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R6: info->i = RD_REG(6); break;
+ case CPUINFO_INT_REGISTER + ALPHA8201_R7: info->i = RD_REG(7); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(alpha8201); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(alpha8201); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(alpha8201); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(alpha8201); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(alpha8201); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(alpha8201); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(alpha8201); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(alpha8201); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(alpha8201); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(alpha8201); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_FAMILY: strcpy(info->s, "AlphaDenshi MCU"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tatsuyuki Satoh"); break;
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", cpustate->cf?'C':'.',cpustate->zf?'Z':'.'); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_PC: sprintf(info->s, "cpustate->PC:%03X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_SP: sprintf(info->s, "SP:%02X", M_RDMEM(0x001) ); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_RB: sprintf(info->s, "RB:%X", cpustate->regPtr); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_MB: sprintf(info->s, "MB:%X", cpustate->mb); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "AlphaDenshi MCU"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tatsuyuki Satoh"); break;
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", cpustate->cf?'C':'.',cpustate->zf?'Z':'.'); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_PC: sprintf(info->s, "cpustate->PC:%03X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_SP: sprintf(info->s, "SP:%02X", M_RDMEM(0x001) ); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_RB: sprintf(info->s, "RB:%X", cpustate->regPtr); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_MB: sprintf(info->s, "MB:%X", cpustate->mb); break;
#if 0
- case CPUINFO_STR_REGISTER + ALPHA8201_ZF: sprintf(info->s, "cpustate->zf:%X", cpustate->zf); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_CF: sprintf(info->s, "cpustate->cf:%X", cpustate->cf); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_ZF: sprintf(info->s, "cpustate->zf:%X", cpustate->zf); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_CF: sprintf(info->s, "cpustate->cf:%X", cpustate->cf); break;
#endif
- case CPUINFO_STR_REGISTER + ALPHA8201_IX0: sprintf(info->s, "cpustate->IX0:%02X", cpustate->IX0); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_IX1: sprintf(info->s, "cpustate->IX1:%02X", cpustate->IX1); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_IX2: sprintf(info->s, "cpustate->IX2:%02X", cpustate->IX2); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_LP0: sprintf(info->s, "cpustate->LP0:%02X", cpustate->LP0); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_LP1: sprintf(info->s, "cpustate->LP1:%02X", cpustate->LP1); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_LP2: sprintf(info->s, "cpustate->LP2:%02X", cpustate->LP2); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_A: sprintf(info->s, "A:%02X", cpustate->A); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_B: sprintf(info->s, "B:%02X", cpustate->B); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R0: sprintf(info->s, "R0:%02X", RD_REG(0)); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R1: sprintf(info->s, "R1:%02X", RD_REG(1)); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R2: sprintf(info->s, "R2:%02X", RD_REG(2)); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R3: sprintf(info->s, "R3:%02X", RD_REG(3)); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R4: sprintf(info->s, "R4:%02X", RD_REG(4)); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R5: sprintf(info->s, "R5:%02X", RD_REG(5)); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R6: sprintf(info->s, "R6:%02X", RD_REG(6)); break;
- case CPUINFO_STR_REGISTER + ALPHA8201_R7: sprintf(info->s, "R7:%02X", RD_REG(7)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_IX0: sprintf(info->s, "cpustate->IX0:%02X", cpustate->IX0); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_IX1: sprintf(info->s, "cpustate->IX1:%02X", cpustate->IX1); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_IX2: sprintf(info->s, "cpustate->IX2:%02X", cpustate->IX2); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_LP0: sprintf(info->s, "cpustate->LP0:%02X", cpustate->LP0); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_LP1: sprintf(info->s, "cpustate->LP1:%02X", cpustate->LP1); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_LP2: sprintf(info->s, "cpustate->LP2:%02X", cpustate->LP2); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_A: sprintf(info->s, "A:%02X", cpustate->A); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_B: sprintf(info->s, "B:%02X", cpustate->B); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R0: sprintf(info->s, "R0:%02X", RD_REG(0)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R1: sprintf(info->s, "R1:%02X", RD_REG(1)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R2: sprintf(info->s, "R2:%02X", RD_REG(2)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R3: sprintf(info->s, "R3:%02X", RD_REG(3)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R4: sprintf(info->s, "R4:%02X", RD_REG(4)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R5: sprintf(info->s, "R5:%02X", RD_REG(5)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R6: sprintf(info->s, "R6:%02X", RD_REG(6)); break;
+ case CPUINFO_STR_REGISTER + ALPHA8201_R7: sprintf(info->s, "R7:%02X", RD_REG(7)); break;
}
}
CPU_GET_INFO( alpha8201 )
{
switch (state)
{
- case CPUINFO_STR_NAME: strcpy(info->s, "ALPHA-8201"); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(alpha8201); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ALPHA-8201"); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(alpha8201); break;
default:
/* 8201 / 8301 */
CPU_GET_INFO_CALL(alpha8xxx);
@@ -987,8 +987,8 @@ CPU_GET_INFO( alpha8301 )
{
switch (state)
{
- case CPUINFO_STR_NAME: strcpy(info->s, "ALPHA-8301"); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ALPHA8301); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ALPHA-8301"); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ALPHA8301); break;
default:
/* 8201 / 8301 */
CPU_GET_INFO_CALL(alpha8xxx);
diff --git a/src/emu/cpu/alph8201/alph8201.h b/src/emu/cpu/alph8201/alph8201.h
index 449e584fe67..fd64c75d0f7 100644
--- a/src/emu/cpu/alph8201/alph8201.h
+++ b/src/emu/cpu/alph8201/alph8201.h
@@ -1,11 +1,11 @@
- /**************************************************************************\
- * Alpha8201 Emulator *
- * *
- * Copyright Tatsuyuki Satoh *
- * Originally written for the MAME project. *
- * *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Alpha8201 Emulator *
+ * *
+ * Copyright Tatsuyuki Satoh *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ \**************************************************************************/
#pragma once
diff --git a/src/emu/cpu/am29000/am29000.c b/src/emu/cpu/am29000/am29000.c
index 84ad9f23250..f15585d2ae8 100644
--- a/src/emu/cpu/am29000/am29000.c
+++ b/src/emu/cpu/am29000/am29000.c
@@ -21,54 +21,54 @@
CONSTANTS
***************************************************************************/
-#define MAX_EXCEPTIONS (4)
+#define MAX_EXCEPTIONS (4)
-#define PFLAG_FETCH_EN (1 << 0)
-#define PFLAG_DECODE_EN (1 << 1)
-#define PFLAG_EXECUTE_EN (1 << 2)
-#define PFLAG_WRITEBACK_EN (1 << 3)
-#define PFLAG_IRQ (1 << 4)
-#define PFLAG_LOADSTORE (1 << 5)
-#define PFLAG_MULTI_LOADSTORE (1 << 6)
-#define PFLAG_JUMP (1 << 7)
-#define PFLAG_JUMP2 (1 << 8)
-#define PFLAG_IRET (1 << 9)
-#define PFLAG_TIMER_LOADED (1 << 10)
+#define PFLAG_FETCH_EN (1 << 0)
+#define PFLAG_DECODE_EN (1 << 1)
+#define PFLAG_EXECUTE_EN (1 << 2)
+#define PFLAG_WRITEBACK_EN (1 << 3)
+#define PFLAG_IRQ (1 << 4)
+#define PFLAG_LOADSTORE (1 << 5)
+#define PFLAG_MULTI_LOADSTORE (1 << 6)
+#define PFLAG_JUMP (1 << 7)
+#define PFLAG_JUMP2 (1 << 8)
+#define PFLAG_IRET (1 << 9)
+#define PFLAG_TIMER_LOADED (1 << 10)
-#define PFLAG_RA_DEPENDENCY (1 << 26)
-#define PFLAG_RB_DEPENDENCY (1 << 27)
+#define PFLAG_RA_DEPENDENCY (1 << 26)
+#define PFLAG_RB_DEPENDENCY (1 << 27)
-#define PFLAG_MEM_MULTIPLE (1 << 29)
-#define PFLAG_REG_WRITEBACK (1 << 30)
-#define PFLAG_MEM_WRITEBACK (1 << 31)
+#define PFLAG_MEM_MULTIPLE (1 << 29)
+#define PFLAG_REG_WRITEBACK (1 << 30)
+#define PFLAG_MEM_WRITEBACK (1 << 31)
-#define MMU_PROGRAM_ACCESS (0)
-#define MMU_DATA_ACCESS (1)
+#define MMU_PROGRAM_ACCESS (0)
+#define MMU_DATA_ACCESS (1)
-#define FREEZE_MODE (am29000->cps & CPS_FZ)
-#define SUPERVISOR_MODE (am29000->cps & CPS_SM)
-#define USER_MODE (~am29000->cps & CPS_SM)
-#define REGISTER_IS_PROTECTED(x) (am29000->rbp & (1 << ((x) >> 4)))
+#define FREEZE_MODE (am29000->cps & CPS_FZ)
+#define SUPERVISOR_MODE (am29000->cps & CPS_SM)
+#define USER_MODE (~am29000->cps & CPS_SM)
+#define REGISTER_IS_PROTECTED(x) (am29000->rbp & (1 << ((x) >> 4)))
-#define INST_RB_FIELD(x) ((x) & 0xff)
-#define INST_RA_FIELD(x) (((x) >> 8) & 0xff)
-#define INST_RC_FIELD(x) (((x) >> 16) & 0xff)
-#define INST_SA_FIELD(x) (((x) >> 8) & 0xff)
+#define INST_RB_FIELD(x) ((x) & 0xff)
+#define INST_RA_FIELD(x) (((x) >> 8) & 0xff)
+#define INST_RC_FIELD(x) (((x) >> 16) & 0xff)
+#define INST_SA_FIELD(x) (((x) >> 8) & 0xff)
-#define FIELD_RA 0
-#define FIELD_RB 1
-#define FIELD_RC 2
+#define FIELD_RA 0
+#define FIELD_RB 1
+#define FIELD_RC 2
-#define SIGNAL_EXCEPTION(x) (signal_exception(am29000, x))
+#define SIGNAL_EXCEPTION(x) (signal_exception(am29000, x))
-#define GET_ALU_FC ((am29000->alu >> ALU_FC_SHIFT) & ALU_FC_MASK)
-#define GET_ALU_BP ((am29000->alu >> ALU_BP_SHIFT) & ALU_BP_MASK)
-#define GET_CHC_CR ((am29000->chc >> CHC_CR_SHIFT) & CHC_CR_MASK)
+#define GET_ALU_FC ((am29000->alu >> ALU_FC_SHIFT) & ALU_FC_MASK)
+#define GET_ALU_BP ((am29000->alu >> ALU_BP_SHIFT) & ALU_BP_MASK)
+#define GET_CHC_CR ((am29000->chc >> CHC_CR_SHIFT) & CHC_CR_MASK)
-#define SET_ALU_FC(x) do { am29000->alu &= ~(ALU_FC_MASK << ALU_FC_SHIFT); am29000->alu |= ((x) & ALU_FC_MASK) << ALU_FC_SHIFT; } while(0)
-#define SET_ALU_BP(x) do { am29000->alu &= ~(ALU_BP_MASK << ALU_BP_SHIFT); am29000->alu |= ((x) & ALU_BP_MASK) << ALU_BP_SHIFT; } while(0)
-#define SET_CHC_CR(x) do { am29000->chc &= ~(CHC_CR_MASK << CHC_CR_SHIFT); am29000->chc |= ((x) & CHC_CR_MASK) << CHC_CR_SHIFT; } while(0)
+#define SET_ALU_FC(x) do { am29000->alu &= ~(ALU_FC_MASK << ALU_FC_SHIFT); am29000->alu |= ((x) & ALU_FC_MASK) << ALU_FC_SHIFT; } while(0)
+#define SET_ALU_BP(x) do { am29000->alu &= ~(ALU_BP_MASK << ALU_BP_SHIFT); am29000->alu |= ((x) & ALU_BP_MASK) << ALU_BP_SHIFT; } while(0)
+#define SET_CHC_CR(x) do { am29000->chc &= ~(CHC_CR_MASK << CHC_CR_SHIFT); am29000->chc |= ((x) & CHC_CR_MASK) << CHC_CR_SHIFT; } while(0)
/***************************************************************************
@@ -77,59 +77,59 @@
struct am29000_state
{
- INT32 icount;
- UINT32 pc;
+ INT32 icount;
+ UINT32 pc;
/* General purpose */
- UINT32 r[256]; // TODO: There's only 192 implemented!
+ UINT32 r[256]; // TODO: There's only 192 implemented!
/* TLB */
- UINT32 tlb[128];
+ UINT32 tlb[128];
/* Protected SPRs */
- UINT32 vab;
- UINT32 ops;
- UINT32 cps;
- UINT32 cfg;
- UINT32 cha;
- UINT32 chd;
- UINT32 chc;
- UINT32 rbp;
- UINT32 tmc;
- UINT32 tmr;
- UINT32 pc0;
- UINT32 pc1;
- UINT32 pc2;
- UINT32 mmu;
- UINT32 lru;
+ UINT32 vab;
+ UINT32 ops;
+ UINT32 cps;
+ UINT32 cfg;
+ UINT32 cha;
+ UINT32 chd;
+ UINT32 chc;
+ UINT32 rbp;
+ UINT32 tmc;
+ UINT32 tmr;
+ UINT32 pc0;
+ UINT32 pc1;
+ UINT32 pc2;
+ UINT32 mmu;
+ UINT32 lru;
/* Unprotected SPRs */
- UINT32 ipc;
- UINT32 ipa;
- UINT32 ipb;
- UINT32 q;
- UINT32 alu;
- UINT32 fpe;
- UINT32 inte;
- UINT32 fps;
+ UINT32 ipc;
+ UINT32 ipa;
+ UINT32 ipb;
+ UINT32 q;
+ UINT32 alu;
+ UINT32 fpe;
+ UINT32 inte;
+ UINT32 fps;
/* Pipeline state */
- UINT32 exceptions;
- UINT32 exception_queue[MAX_EXCEPTIONS];
+ UINT32 exceptions;
+ UINT32 exception_queue[MAX_EXCEPTIONS];
- UINT8 irq_active;
- UINT8 irq_lines;
+ UINT8 irq_active;
+ UINT8 irq_lines;
- UINT32 exec_ir;
- UINT32 next_ir;
+ UINT32 exec_ir;
+ UINT32 next_ir;
- UINT32 pl_flags;
- UINT32 next_pl_flags;
+ UINT32 pl_flags;
+ UINT32 next_pl_flags;
- UINT32 iret_pc;
+ UINT32 iret_pc;
- UINT32 exec_pc;
- UINT32 next_pc;
+ UINT32 exec_pc;
+ UINT32 next_pc;
address_space *program;
direct_read_data *direct;
@@ -476,232 +476,232 @@ static CPU_SET_INFO( am29000 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + AM29000_INTR0: set_irq_line(am29000, AM29000_INTR0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + AM29000_INTR1: set_irq_line(am29000, AM29000_INTR1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + AM29000_INTR2: set_irq_line(am29000, AM29000_INTR2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + AM29000_INTR3: set_irq_line(am29000, AM29000_INTR3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + AM29000_INTR0: set_irq_line(am29000, AM29000_INTR0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + AM29000_INTR1: set_irq_line(am29000, AM29000_INTR1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + AM29000_INTR2: set_irq_line(am29000, AM29000_INTR2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + AM29000_INTR3: set_irq_line(am29000, AM29000_INTR3, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + AM29000_PC: am29000->pc = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_VAB: am29000->vab = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_OPS: am29000->ops = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_CPS: am29000->cps = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_CFG: am29000->cfg = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_CHA: am29000->cha = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_CHD: am29000->chd = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_CHC: am29000->chc = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_RBP: am29000->rbp = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_TMC: am29000->tmc = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_TMR: am29000->tmr = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_PC0: am29000->pc0 = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_PC1: am29000->pc1 = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_PC2: am29000->pc2 = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_MMU: am29000->mmu = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_LRU: am29000->lru = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_IPC: am29000->ipc = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_IPA: am29000->ipa = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_IPB: am29000->ipb = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_Q: am29000->q = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_ALU: am29000->alu = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_BP: SET_ALU_BP(info->i); break;
- case CPUINFO_INT_REGISTER + AM29000_FC: SET_ALU_FC(info->i); break;
- case CPUINFO_INT_REGISTER + AM29000_CR: SET_CHC_CR(info->i); break;
- case CPUINFO_INT_REGISTER + AM29000_FPE: am29000->fpe = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_INTE: am29000->inte = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_FPS: am29000->fps = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R1: am29000->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R64: am29000->r[64] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R65: am29000->r[65] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R66: am29000->r[66] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R67: am29000->r[67] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R68: am29000->r[68] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R69: am29000->r[69] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R70: am29000->r[70] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R71: am29000->r[71] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R72: am29000->r[72] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R73: am29000->r[73] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R74: am29000->r[74] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R75: am29000->r[75] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R76: am29000->r[76] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R77: am29000->r[77] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R78: am29000->r[78] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R79: am29000->r[79] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R80: am29000->r[80] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R81: am29000->r[81] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R82: am29000->r[82] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R83: am29000->r[83] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R84: am29000->r[84] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R85: am29000->r[85] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R86: am29000->r[86] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R87: am29000->r[87] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R88: am29000->r[88] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R89: am29000->r[89] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R90: am29000->r[90] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R91: am29000->r[91] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R92: am29000->r[92] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R93: am29000->r[93] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R94: am29000->r[94] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R95: am29000->r[95] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R96: am29000->r[96] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R97: am29000->r[97] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R98: am29000->r[98] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R99: am29000->r[99] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R100: am29000->r[100] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R101: am29000->r[101] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R102: am29000->r[102] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R103: am29000->r[103] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R104: am29000->r[104] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R105: am29000->r[105] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R106: am29000->r[106] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R107: am29000->r[107] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R108: am29000->r[108] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R109: am29000->r[109] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R110: am29000->r[110] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R111: am29000->r[111] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R112: am29000->r[112] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R113: am29000->r[113] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R114: am29000->r[114] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R115: am29000->r[115] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R116: am29000->r[116] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R117: am29000->r[117] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R118: am29000->r[118] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R119: am29000->r[119] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R120: am29000->r[120] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R121: am29000->r[121] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R122: am29000->r[122] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R123: am29000->r[123] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R124: am29000->r[124] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R125: am29000->r[125] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R126: am29000->r[126] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R127: am29000->r[127] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R128: am29000->r[128] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R129: am29000->r[129] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R130: am29000->r[130] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R131: am29000->r[131] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R132: am29000->r[132] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R133: am29000->r[133] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R134: am29000->r[134] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R135: am29000->r[135] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R136: am29000->r[136] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R137: am29000->r[137] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R138: am29000->r[138] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R139: am29000->r[139] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R140: am29000->r[140] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R141: am29000->r[141] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R142: am29000->r[142] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R143: am29000->r[143] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R144: am29000->r[144] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R145: am29000->r[145] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R146: am29000->r[146] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R147: am29000->r[147] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R148: am29000->r[148] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R149: am29000->r[149] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R150: am29000->r[150] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R151: am29000->r[151] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R152: am29000->r[152] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R153: am29000->r[153] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R154: am29000->r[154] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R155: am29000->r[155] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R156: am29000->r[156] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R157: am29000->r[157] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R158: am29000->r[158] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R159: am29000->r[159] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R160: am29000->r[160] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R161: am29000->r[161] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R162: am29000->r[162] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R163: am29000->r[163] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R164: am29000->r[164] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R165: am29000->r[165] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R166: am29000->r[166] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R167: am29000->r[167] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R168: am29000->r[168] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R169: am29000->r[169] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R170: am29000->r[170] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R171: am29000->r[171] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R172: am29000->r[172] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R173: am29000->r[173] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R174: am29000->r[174] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R175: am29000->r[175] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R176: am29000->r[176] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R177: am29000->r[177] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R178: am29000->r[178] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R179: am29000->r[179] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R180: am29000->r[180] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R181: am29000->r[181] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R182: am29000->r[182] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R183: am29000->r[183] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R184: am29000->r[184] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R185: am29000->r[185] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R186: am29000->r[186] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R187: am29000->r[187] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R188: am29000->r[188] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R189: am29000->r[189] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R190: am29000->r[190] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R191: am29000->r[191] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R192: am29000->r[192] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R193: am29000->r[193] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R194: am29000->r[194] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R195: am29000->r[195] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R196: am29000->r[196] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R197: am29000->r[197] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R198: am29000->r[198] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R199: am29000->r[199] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R200: am29000->r[200] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R201: am29000->r[201] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R202: am29000->r[202] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R203: am29000->r[203] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R204: am29000->r[204] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R205: am29000->r[205] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R206: am29000->r[206] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R207: am29000->r[207] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R208: am29000->r[208] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R209: am29000->r[209] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R210: am29000->r[210] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R211: am29000->r[211] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R212: am29000->r[212] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R213: am29000->r[213] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R214: am29000->r[214] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R215: am29000->r[215] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R216: am29000->r[216] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R217: am29000->r[217] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R218: am29000->r[218] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R219: am29000->r[219] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R220: am29000->r[220] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R221: am29000->r[221] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R222: am29000->r[222] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R223: am29000->r[223] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R224: am29000->r[224] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R225: am29000->r[225] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R226: am29000->r[226] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R227: am29000->r[227] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R228: am29000->r[228] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R229: am29000->r[229] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R230: am29000->r[230] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R231: am29000->r[231] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R232: am29000->r[232] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R233: am29000->r[233] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R234: am29000->r[234] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R235: am29000->r[235] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R236: am29000->r[236] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R237: am29000->r[237] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R238: am29000->r[238] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R239: am29000->r[239] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R240: am29000->r[240] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R241: am29000->r[241] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R242: am29000->r[242] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R243: am29000->r[243] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R244: am29000->r[244] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R245: am29000->r[245] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R246: am29000->r[246] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R247: am29000->r[247] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R248: am29000->r[248] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R249: am29000->r[249] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R250: am29000->r[250] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R251: am29000->r[251] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R252: am29000->r[252] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R253: am29000->r[253] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R254: am29000->r[254] = info->i; break;
- case CPUINFO_INT_REGISTER + AM29000_R255: am29000->r[255] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC: am29000->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_VAB: am29000->vab = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_OPS: am29000->ops = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_CPS: am29000->cps = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_CFG: am29000->cfg = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_CHA: am29000->cha = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_CHD: am29000->chd = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_CHC: am29000->chc = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_RBP: am29000->rbp = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_TMC: am29000->tmc = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_TMR: am29000->tmr = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC0: am29000->pc0 = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC1: am29000->pc1 = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC2: am29000->pc2 = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_MMU: am29000->mmu = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_LRU: am29000->lru = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_IPC: am29000->ipc = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_IPA: am29000->ipa = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_IPB: am29000->ipb = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_Q: am29000->q = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_ALU: am29000->alu = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_BP: SET_ALU_BP(info->i); break;
+ case CPUINFO_INT_REGISTER + AM29000_FC: SET_ALU_FC(info->i); break;
+ case CPUINFO_INT_REGISTER + AM29000_CR: SET_CHC_CR(info->i); break;
+ case CPUINFO_INT_REGISTER + AM29000_FPE: am29000->fpe = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_INTE: am29000->inte = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_FPS: am29000->fps = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R1: am29000->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R64: am29000->r[64] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R65: am29000->r[65] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R66: am29000->r[66] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R67: am29000->r[67] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R68: am29000->r[68] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R69: am29000->r[69] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R70: am29000->r[70] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R71: am29000->r[71] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R72: am29000->r[72] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R73: am29000->r[73] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R74: am29000->r[74] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R75: am29000->r[75] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R76: am29000->r[76] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R77: am29000->r[77] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R78: am29000->r[78] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R79: am29000->r[79] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R80: am29000->r[80] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R81: am29000->r[81] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R82: am29000->r[82] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R83: am29000->r[83] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R84: am29000->r[84] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R85: am29000->r[85] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R86: am29000->r[86] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R87: am29000->r[87] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R88: am29000->r[88] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R89: am29000->r[89] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R90: am29000->r[90] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R91: am29000->r[91] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R92: am29000->r[92] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R93: am29000->r[93] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R94: am29000->r[94] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R95: am29000->r[95] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R96: am29000->r[96] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R97: am29000->r[97] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R98: am29000->r[98] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R99: am29000->r[99] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R100: am29000->r[100] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R101: am29000->r[101] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R102: am29000->r[102] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R103: am29000->r[103] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R104: am29000->r[104] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R105: am29000->r[105] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R106: am29000->r[106] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R107: am29000->r[107] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R108: am29000->r[108] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R109: am29000->r[109] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R110: am29000->r[110] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R111: am29000->r[111] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R112: am29000->r[112] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R113: am29000->r[113] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R114: am29000->r[114] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R115: am29000->r[115] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R116: am29000->r[116] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R117: am29000->r[117] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R118: am29000->r[118] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R119: am29000->r[119] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R120: am29000->r[120] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R121: am29000->r[121] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R122: am29000->r[122] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R123: am29000->r[123] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R124: am29000->r[124] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R125: am29000->r[125] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R126: am29000->r[126] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R127: am29000->r[127] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R128: am29000->r[128] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R129: am29000->r[129] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R130: am29000->r[130] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R131: am29000->r[131] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R132: am29000->r[132] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R133: am29000->r[133] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R134: am29000->r[134] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R135: am29000->r[135] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R136: am29000->r[136] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R137: am29000->r[137] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R138: am29000->r[138] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R139: am29000->r[139] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R140: am29000->r[140] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R141: am29000->r[141] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R142: am29000->r[142] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R143: am29000->r[143] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R144: am29000->r[144] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R145: am29000->r[145] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R146: am29000->r[146] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R147: am29000->r[147] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R148: am29000->r[148] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R149: am29000->r[149] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R150: am29000->r[150] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R151: am29000->r[151] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R152: am29000->r[152] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R153: am29000->r[153] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R154: am29000->r[154] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R155: am29000->r[155] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R156: am29000->r[156] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R157: am29000->r[157] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R158: am29000->r[158] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R159: am29000->r[159] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R160: am29000->r[160] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R161: am29000->r[161] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R162: am29000->r[162] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R163: am29000->r[163] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R164: am29000->r[164] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R165: am29000->r[165] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R166: am29000->r[166] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R167: am29000->r[167] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R168: am29000->r[168] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R169: am29000->r[169] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R170: am29000->r[170] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R171: am29000->r[171] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R172: am29000->r[172] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R173: am29000->r[173] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R174: am29000->r[174] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R175: am29000->r[175] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R176: am29000->r[176] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R177: am29000->r[177] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R178: am29000->r[178] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R179: am29000->r[179] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R180: am29000->r[180] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R181: am29000->r[181] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R182: am29000->r[182] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R183: am29000->r[183] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R184: am29000->r[184] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R185: am29000->r[185] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R186: am29000->r[186] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R187: am29000->r[187] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R188: am29000->r[188] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R189: am29000->r[189] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R190: am29000->r[190] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R191: am29000->r[191] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R192: am29000->r[192] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R193: am29000->r[193] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R194: am29000->r[194] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R195: am29000->r[195] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R196: am29000->r[196] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R197: am29000->r[197] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R198: am29000->r[198] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R199: am29000->r[199] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R200: am29000->r[200] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R201: am29000->r[201] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R202: am29000->r[202] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R203: am29000->r[203] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R204: am29000->r[204] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R205: am29000->r[205] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R206: am29000->r[206] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R207: am29000->r[207] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R208: am29000->r[208] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R209: am29000->r[209] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R210: am29000->r[210] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R211: am29000->r[211] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R212: am29000->r[212] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R213: am29000->r[213] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R214: am29000->r[214] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R215: am29000->r[215] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R216: am29000->r[216] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R217: am29000->r[217] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R218: am29000->r[218] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R219: am29000->r[219] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R220: am29000->r[220] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R221: am29000->r[221] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R222: am29000->r[222] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R223: am29000->r[223] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R224: am29000->r[224] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R225: am29000->r[225] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R226: am29000->r[226] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R227: am29000->r[227] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R228: am29000->r[228] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R229: am29000->r[229] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R230: am29000->r[230] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R231: am29000->r[231] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R232: am29000->r[232] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R233: am29000->r[233] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R234: am29000->r[234] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R235: am29000->r[235] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R236: am29000->r[236] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R237: am29000->r[237] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R238: am29000->r[238] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R239: am29000->r[239] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R240: am29000->r[240] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R241: am29000->r[241] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R242: am29000->r[242] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R243: am29000->r[243] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R244: am29000->r[244] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R245: am29000->r[245] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R246: am29000->r[246] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R247: am29000->r[247] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R248: am29000->r[248] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R249: am29000->r[249] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R250: am29000->r[250] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R251: am29000->r[251] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R252: am29000->r[252] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R253: am29000->r[253] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R254: am29000->r[254] = info->i; break;
+ case CPUINFO_INT_REGISTER + AM29000_R255: am29000->r[255] = info->i; break;
}
}
@@ -717,267 +717,267 @@ CPU_GET_INFO( am29000 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(am29000_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(am29000_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + AM29000_PC: info->i = am29000->pc; break;
- case CPUINFO_INT_REGISTER + AM29000_VAB: info->i = am29000->vab; break;
- case CPUINFO_INT_REGISTER + AM29000_OPS: info->i = am29000->ops; break;
- case CPUINFO_INT_REGISTER + AM29000_CPS: info->i = am29000->cps; break;
- case CPUINFO_INT_REGISTER + AM29000_CFG: info->i = am29000->cfg; break;
- case CPUINFO_INT_REGISTER + AM29000_CHA: info->i = am29000->cha; break;
- case CPUINFO_INT_REGISTER + AM29000_CHD: info->i = am29000->chd; break;
- case CPUINFO_INT_REGISTER + AM29000_CHC: info->i = am29000->chc; break;
- case CPUINFO_INT_REGISTER + AM29000_RBP: info->i = am29000->rbp; break;
- case CPUINFO_INT_REGISTER + AM29000_TMC: info->i = am29000->tmc; break;
- case CPUINFO_INT_REGISTER + AM29000_TMR: info->i = am29000->tmr; break;
- case CPUINFO_INT_REGISTER + AM29000_PC0: info->i = am29000->pc0; break;
- case CPUINFO_INT_REGISTER + AM29000_PC1: info->i = am29000->pc1; break;
- case CPUINFO_INT_REGISTER + AM29000_PC2: info->i = am29000->pc2; break;
- case CPUINFO_INT_REGISTER + AM29000_MMU: info->i = am29000->mmu; break;
- case CPUINFO_INT_REGISTER + AM29000_LRU: info->i = am29000->lru; break;
- case CPUINFO_INT_REGISTER + AM29000_IPC: info->i = am29000->ipc; break;
- case CPUINFO_INT_REGISTER + AM29000_IPA: info->i = am29000->ipa; break;
- case CPUINFO_INT_REGISTER + AM29000_IPB: info->i = am29000->ipb; break;
- case CPUINFO_INT_REGISTER + AM29000_Q: info->i = am29000->q; break;
- case CPUINFO_INT_REGISTER + AM29000_ALU: info->i = am29000->alu; break;
- case CPUINFO_INT_REGISTER + AM29000_BP: info->i = GET_ALU_BP; break;
- case CPUINFO_INT_REGISTER + AM29000_FC: info->i = GET_ALU_FC; break;
- case CPUINFO_INT_REGISTER + AM29000_CR: info->i = GET_CHC_CR; break;
- case CPUINFO_INT_REGISTER + AM29000_FPE: info->i = am29000->fpe; break;
- case CPUINFO_INT_REGISTER + AM29000_INTE: info->i = am29000->inte; break;
- case CPUINFO_INT_REGISTER + AM29000_FPS: info->i = am29000->fps; break;
- case CPUINFO_INT_REGISTER + AM29000_R1: info->i = am29000->r[1]; break;
- case CPUINFO_INT_REGISTER + AM29000_R64: info->i = am29000->r[64]; break;
- case CPUINFO_INT_REGISTER + AM29000_R65: info->i = am29000->r[65]; break;
- case CPUINFO_INT_REGISTER + AM29000_R66: info->i = am29000->r[66]; break;
- case CPUINFO_INT_REGISTER + AM29000_R67: info->i = am29000->r[67]; break;
- case CPUINFO_INT_REGISTER + AM29000_R68: info->i = am29000->r[68]; break;
- case CPUINFO_INT_REGISTER + AM29000_R69: info->i = am29000->r[69]; break;
- case CPUINFO_INT_REGISTER + AM29000_R70: info->i = am29000->r[70]; break;
- case CPUINFO_INT_REGISTER + AM29000_R71: info->i = am29000->r[71]; break;
- case CPUINFO_INT_REGISTER + AM29000_R72: info->i = am29000->r[72]; break;
- case CPUINFO_INT_REGISTER + AM29000_R73: info->i = am29000->r[73]; break;
- case CPUINFO_INT_REGISTER + AM29000_R74: info->i = am29000->r[74]; break;
- case CPUINFO_INT_REGISTER + AM29000_R75: info->i = am29000->r[75]; break;
- case CPUINFO_INT_REGISTER + AM29000_R76: info->i = am29000->r[76]; break;
- case CPUINFO_INT_REGISTER + AM29000_R77: info->i = am29000->r[77]; break;
- case CPUINFO_INT_REGISTER + AM29000_R78: info->i = am29000->r[78]; break;
- case CPUINFO_INT_REGISTER + AM29000_R79: info->i = am29000->r[79]; break;
- case CPUINFO_INT_REGISTER + AM29000_R80: info->i = am29000->r[80]; break;
- case CPUINFO_INT_REGISTER + AM29000_R81: info->i = am29000->r[81]; break;
- case CPUINFO_INT_REGISTER + AM29000_R82: info->i = am29000->r[82]; break;
- case CPUINFO_INT_REGISTER + AM29000_R83: info->i = am29000->r[83]; break;
- case CPUINFO_INT_REGISTER + AM29000_R84: info->i = am29000->r[84]; break;
- case CPUINFO_INT_REGISTER + AM29000_R85: info->i = am29000->r[85]; break;
- case CPUINFO_INT_REGISTER + AM29000_R86: info->i = am29000->r[86]; break;
- case CPUINFO_INT_REGISTER + AM29000_R87: info->i = am29000->r[87]; break;
- case CPUINFO_INT_REGISTER + AM29000_R88: info->i = am29000->r[88]; break;
- case CPUINFO_INT_REGISTER + AM29000_R89: info->i = am29000->r[89]; break;
- case CPUINFO_INT_REGISTER + AM29000_R90: info->i = am29000->r[90]; break;
- case CPUINFO_INT_REGISTER + AM29000_R91: info->i = am29000->r[91]; break;
- case CPUINFO_INT_REGISTER + AM29000_R92: info->i = am29000->r[92]; break;
- case CPUINFO_INT_REGISTER + AM29000_R93: info->i = am29000->r[93]; break;
- case CPUINFO_INT_REGISTER + AM29000_R94: info->i = am29000->r[94]; break;
- case CPUINFO_INT_REGISTER + AM29000_R95: info->i = am29000->r[95]; break;
- case CPUINFO_INT_REGISTER + AM29000_R96: info->i = am29000->r[96]; break;
- case CPUINFO_INT_REGISTER + AM29000_R97: info->i = am29000->r[97]; break;
- case CPUINFO_INT_REGISTER + AM29000_R98: info->i = am29000->r[98]; break;
- case CPUINFO_INT_REGISTER + AM29000_R99: info->i = am29000->r[99]; break;
- case CPUINFO_INT_REGISTER + AM29000_R100: info->i = am29000->r[100]; break;
- case CPUINFO_INT_REGISTER + AM29000_R101: info->i = am29000->r[101]; break;
- case CPUINFO_INT_REGISTER + AM29000_R102: info->i = am29000->r[102]; break;
- case CPUINFO_INT_REGISTER + AM29000_R103: info->i = am29000->r[103]; break;
- case CPUINFO_INT_REGISTER + AM29000_R104: info->i = am29000->r[104]; break;
- case CPUINFO_INT_REGISTER + AM29000_R105: info->i = am29000->r[105]; break;
- case CPUINFO_INT_REGISTER + AM29000_R106: info->i = am29000->r[106]; break;
- case CPUINFO_INT_REGISTER + AM29000_R107: info->i = am29000->r[107]; break;
- case CPUINFO_INT_REGISTER + AM29000_R108: info->i = am29000->r[108]; break;
- case CPUINFO_INT_REGISTER + AM29000_R109: info->i = am29000->r[109]; break;
- case CPUINFO_INT_REGISTER + AM29000_R110: info->i = am29000->r[110]; break;
- case CPUINFO_INT_REGISTER + AM29000_R111: info->i = am29000->r[111]; break;
- case CPUINFO_INT_REGISTER + AM29000_R112: info->i = am29000->r[112]; break;
- case CPUINFO_INT_REGISTER + AM29000_R113: info->i = am29000->r[113]; break;
- case CPUINFO_INT_REGISTER + AM29000_R114: info->i = am29000->r[114]; break;
- case CPUINFO_INT_REGISTER + AM29000_R115: info->i = am29000->r[115]; break;
- case CPUINFO_INT_REGISTER + AM29000_R116: info->i = am29000->r[116]; break;
- case CPUINFO_INT_REGISTER + AM29000_R117: info->i = am29000->r[117]; break;
- case CPUINFO_INT_REGISTER + AM29000_R118: info->i = am29000->r[118]; break;
- case CPUINFO_INT_REGISTER + AM29000_R119: info->i = am29000->r[119]; break;
- case CPUINFO_INT_REGISTER + AM29000_R120: info->i = am29000->r[120]; break;
- case CPUINFO_INT_REGISTER + AM29000_R121: info->i = am29000->r[121]; break;
- case CPUINFO_INT_REGISTER + AM29000_R122: info->i = am29000->r[122]; break;
- case CPUINFO_INT_REGISTER + AM29000_R123: info->i = am29000->r[123]; break;
- case CPUINFO_INT_REGISTER + AM29000_R124: info->i = am29000->r[124]; break;
- case CPUINFO_INT_REGISTER + AM29000_R125: info->i = am29000->r[125]; break;
- case CPUINFO_INT_REGISTER + AM29000_R126: info->i = am29000->r[126]; break;
- case CPUINFO_INT_REGISTER + AM29000_R127: info->i = am29000->r[127]; break;
- case CPUINFO_INT_REGISTER + AM29000_R128: info->i = am29000->r[128]; break;
- case CPUINFO_INT_REGISTER + AM29000_R129: info->i = am29000->r[129]; break;
- case CPUINFO_INT_REGISTER + AM29000_R130: info->i = am29000->r[130]; break;
- case CPUINFO_INT_REGISTER + AM29000_R131: info->i = am29000->r[131]; break;
- case CPUINFO_INT_REGISTER + AM29000_R132: info->i = am29000->r[132]; break;
- case CPUINFO_INT_REGISTER + AM29000_R133: info->i = am29000->r[133]; break;
- case CPUINFO_INT_REGISTER + AM29000_R134: info->i = am29000->r[134]; break;
- case CPUINFO_INT_REGISTER + AM29000_R135: info->i = am29000->r[135]; break;
- case CPUINFO_INT_REGISTER + AM29000_R136: info->i = am29000->r[136]; break;
- case CPUINFO_INT_REGISTER + AM29000_R137: info->i = am29000->r[137]; break;
- case CPUINFO_INT_REGISTER + AM29000_R138: info->i = am29000->r[138]; break;
- case CPUINFO_INT_REGISTER + AM29000_R139: info->i = am29000->r[139]; break;
- case CPUINFO_INT_REGISTER + AM29000_R140: info->i = am29000->r[140]; break;
- case CPUINFO_INT_REGISTER + AM29000_R141: info->i = am29000->r[141]; break;
- case CPUINFO_INT_REGISTER + AM29000_R142: info->i = am29000->r[142]; break;
- case CPUINFO_INT_REGISTER + AM29000_R143: info->i = am29000->r[143]; break;
- case CPUINFO_INT_REGISTER + AM29000_R144: info->i = am29000->r[144]; break;
- case CPUINFO_INT_REGISTER + AM29000_R145: info->i = am29000->r[145]; break;
- case CPUINFO_INT_REGISTER + AM29000_R146: info->i = am29000->r[146]; break;
- case CPUINFO_INT_REGISTER + AM29000_R147: info->i = am29000->r[147]; break;
- case CPUINFO_INT_REGISTER + AM29000_R148: info->i = am29000->r[148]; break;
- case CPUINFO_INT_REGISTER + AM29000_R149: info->i = am29000->r[149]; break;
- case CPUINFO_INT_REGISTER + AM29000_R150: info->i = am29000->r[150]; break;
- case CPUINFO_INT_REGISTER + AM29000_R151: info->i = am29000->r[151]; break;
- case CPUINFO_INT_REGISTER + AM29000_R152: info->i = am29000->r[152]; break;
- case CPUINFO_INT_REGISTER + AM29000_R153: info->i = am29000->r[153]; break;
- case CPUINFO_INT_REGISTER + AM29000_R154: info->i = am29000->r[154]; break;
- case CPUINFO_INT_REGISTER + AM29000_R155: info->i = am29000->r[155]; break;
- case CPUINFO_INT_REGISTER + AM29000_R156: info->i = am29000->r[156]; break;
- case CPUINFO_INT_REGISTER + AM29000_R157: info->i = am29000->r[157]; break;
- case CPUINFO_INT_REGISTER + AM29000_R158: info->i = am29000->r[158]; break;
- case CPUINFO_INT_REGISTER + AM29000_R159: info->i = am29000->r[159]; break;
- case CPUINFO_INT_REGISTER + AM29000_R160: info->i = am29000->r[160]; break;
- case CPUINFO_INT_REGISTER + AM29000_R161: info->i = am29000->r[161]; break;
- case CPUINFO_INT_REGISTER + AM29000_R162: info->i = am29000->r[162]; break;
- case CPUINFO_INT_REGISTER + AM29000_R163: info->i = am29000->r[163]; break;
- case CPUINFO_INT_REGISTER + AM29000_R164: info->i = am29000->r[164]; break;
- case CPUINFO_INT_REGISTER + AM29000_R165: info->i = am29000->r[165]; break;
- case CPUINFO_INT_REGISTER + AM29000_R166: info->i = am29000->r[166]; break;
- case CPUINFO_INT_REGISTER + AM29000_R167: info->i = am29000->r[167]; break;
- case CPUINFO_INT_REGISTER + AM29000_R168: info->i = am29000->r[168]; break;
- case CPUINFO_INT_REGISTER + AM29000_R169: info->i = am29000->r[169]; break;
- case CPUINFO_INT_REGISTER + AM29000_R170: info->i = am29000->r[170]; break;
- case CPUINFO_INT_REGISTER + AM29000_R171: info->i = am29000->r[171]; break;
- case CPUINFO_INT_REGISTER + AM29000_R172: info->i = am29000->r[172]; break;
- case CPUINFO_INT_REGISTER + AM29000_R173: info->i = am29000->r[173]; break;
- case CPUINFO_INT_REGISTER + AM29000_R174: info->i = am29000->r[174]; break;
- case CPUINFO_INT_REGISTER + AM29000_R175: info->i = am29000->r[175]; break;
- case CPUINFO_INT_REGISTER + AM29000_R176: info->i = am29000->r[176]; break;
- case CPUINFO_INT_REGISTER + AM29000_R177: info->i = am29000->r[177]; break;
- case CPUINFO_INT_REGISTER + AM29000_R178: info->i = am29000->r[178]; break;
- case CPUINFO_INT_REGISTER + AM29000_R179: info->i = am29000->r[179]; break;
- case CPUINFO_INT_REGISTER + AM29000_R180: info->i = am29000->r[180]; break;
- case CPUINFO_INT_REGISTER + AM29000_R181: info->i = am29000->r[181]; break;
- case CPUINFO_INT_REGISTER + AM29000_R182: info->i = am29000->r[182]; break;
- case CPUINFO_INT_REGISTER + AM29000_R183: info->i = am29000->r[183]; break;
- case CPUINFO_INT_REGISTER + AM29000_R184: info->i = am29000->r[184]; break;
- case CPUINFO_INT_REGISTER + AM29000_R185: info->i = am29000->r[185]; break;
- case CPUINFO_INT_REGISTER + AM29000_R186: info->i = am29000->r[186]; break;
- case CPUINFO_INT_REGISTER + AM29000_R187: info->i = am29000->r[187]; break;
- case CPUINFO_INT_REGISTER + AM29000_R188: info->i = am29000->r[188]; break;
- case CPUINFO_INT_REGISTER + AM29000_R189: info->i = am29000->r[189]; break;
- case CPUINFO_INT_REGISTER + AM29000_R190: info->i = am29000->r[190]; break;
- case CPUINFO_INT_REGISTER + AM29000_R191: info->i = am29000->r[191]; break;
- case CPUINFO_INT_REGISTER + AM29000_R192: info->i = am29000->r[192]; break;
- case CPUINFO_INT_REGISTER + AM29000_R193: info->i = am29000->r[193]; break;
- case CPUINFO_INT_REGISTER + AM29000_R194: info->i = am29000->r[194]; break;
- case CPUINFO_INT_REGISTER + AM29000_R195: info->i = am29000->r[195]; break;
- case CPUINFO_INT_REGISTER + AM29000_R196: info->i = am29000->r[196]; break;
- case CPUINFO_INT_REGISTER + AM29000_R197: info->i = am29000->r[197]; break;
- case CPUINFO_INT_REGISTER + AM29000_R198: info->i = am29000->r[198]; break;
- case CPUINFO_INT_REGISTER + AM29000_R199: info->i = am29000->r[199]; break;
- case CPUINFO_INT_REGISTER + AM29000_R200: info->i = am29000->r[200]; break;
- case CPUINFO_INT_REGISTER + AM29000_R201: info->i = am29000->r[201]; break;
- case CPUINFO_INT_REGISTER + AM29000_R202: info->i = am29000->r[202]; break;
- case CPUINFO_INT_REGISTER + AM29000_R203: info->i = am29000->r[203]; break;
- case CPUINFO_INT_REGISTER + AM29000_R204: info->i = am29000->r[204]; break;
- case CPUINFO_INT_REGISTER + AM29000_R205: info->i = am29000->r[205]; break;
- case CPUINFO_INT_REGISTER + AM29000_R206: info->i = am29000->r[206]; break;
- case CPUINFO_INT_REGISTER + AM29000_R207: info->i = am29000->r[207]; break;
- case CPUINFO_INT_REGISTER + AM29000_R208: info->i = am29000->r[208]; break;
- case CPUINFO_INT_REGISTER + AM29000_R209: info->i = am29000->r[209]; break;
- case CPUINFO_INT_REGISTER + AM29000_R210: info->i = am29000->r[210]; break;
- case CPUINFO_INT_REGISTER + AM29000_R211: info->i = am29000->r[211]; break;
- case CPUINFO_INT_REGISTER + AM29000_R212: info->i = am29000->r[212]; break;
- case CPUINFO_INT_REGISTER + AM29000_R213: info->i = am29000->r[213]; break;
- case CPUINFO_INT_REGISTER + AM29000_R214: info->i = am29000->r[214]; break;
- case CPUINFO_INT_REGISTER + AM29000_R215: info->i = am29000->r[215]; break;
- case CPUINFO_INT_REGISTER + AM29000_R216: info->i = am29000->r[216]; break;
- case CPUINFO_INT_REGISTER + AM29000_R217: info->i = am29000->r[217]; break;
- case CPUINFO_INT_REGISTER + AM29000_R218: info->i = am29000->r[218]; break;
- case CPUINFO_INT_REGISTER + AM29000_R219: info->i = am29000->r[219]; break;
- case CPUINFO_INT_REGISTER + AM29000_R220: info->i = am29000->r[220]; break;
- case CPUINFO_INT_REGISTER + AM29000_R221: info->i = am29000->r[221]; break;
- case CPUINFO_INT_REGISTER + AM29000_R222: info->i = am29000->r[222]; break;
- case CPUINFO_INT_REGISTER + AM29000_R223: info->i = am29000->r[223]; break;
- case CPUINFO_INT_REGISTER + AM29000_R224: info->i = am29000->r[224]; break;
- case CPUINFO_INT_REGISTER + AM29000_R225: info->i = am29000->r[225]; break;
- case CPUINFO_INT_REGISTER + AM29000_R226: info->i = am29000->r[226]; break;
- case CPUINFO_INT_REGISTER + AM29000_R227: info->i = am29000->r[227]; break;
- case CPUINFO_INT_REGISTER + AM29000_R228: info->i = am29000->r[228]; break;
- case CPUINFO_INT_REGISTER + AM29000_R229: info->i = am29000->r[229]; break;
- case CPUINFO_INT_REGISTER + AM29000_R230: info->i = am29000->r[230]; break;
- case CPUINFO_INT_REGISTER + AM29000_R231: info->i = am29000->r[231]; break;
- case CPUINFO_INT_REGISTER + AM29000_R232: info->i = am29000->r[232]; break;
- case CPUINFO_INT_REGISTER + AM29000_R233: info->i = am29000->r[233]; break;
- case CPUINFO_INT_REGISTER + AM29000_R234: info->i = am29000->r[234]; break;
- case CPUINFO_INT_REGISTER + AM29000_R235: info->i = am29000->r[235]; break;
- case CPUINFO_INT_REGISTER + AM29000_R236: info->i = am29000->r[236]; break;
- case CPUINFO_INT_REGISTER + AM29000_R237: info->i = am29000->r[237]; break;
- case CPUINFO_INT_REGISTER + AM29000_R238: info->i = am29000->r[238]; break;
- case CPUINFO_INT_REGISTER + AM29000_R239: info->i = am29000->r[239]; break;
- case CPUINFO_INT_REGISTER + AM29000_R240: info->i = am29000->r[240]; break;
- case CPUINFO_INT_REGISTER + AM29000_R241: info->i = am29000->r[241]; break;
- case CPUINFO_INT_REGISTER + AM29000_R242: info->i = am29000->r[242]; break;
- case CPUINFO_INT_REGISTER + AM29000_R243: info->i = am29000->r[243]; break;
- case CPUINFO_INT_REGISTER + AM29000_R244: info->i = am29000->r[244]; break;
- case CPUINFO_INT_REGISTER + AM29000_R245: info->i = am29000->r[245]; break;
- case CPUINFO_INT_REGISTER + AM29000_R246: info->i = am29000->r[246]; break;
- case CPUINFO_INT_REGISTER + AM29000_R247: info->i = am29000->r[247]; break;
- case CPUINFO_INT_REGISTER + AM29000_R248: info->i = am29000->r[248]; break;
- case CPUINFO_INT_REGISTER + AM29000_R249: info->i = am29000->r[249]; break;
- case CPUINFO_INT_REGISTER + AM29000_R250: info->i = am29000->r[250]; break;
- case CPUINFO_INT_REGISTER + AM29000_R251: info->i = am29000->r[251]; break;
- case CPUINFO_INT_REGISTER + AM29000_R252: info->i = am29000->r[252]; break;
- case CPUINFO_INT_REGISTER + AM29000_R253: info->i = am29000->r[253]; break;
- case CPUINFO_INT_REGISTER + AM29000_R254: info->i = am29000->r[254]; break;
- case CPUINFO_INT_REGISTER + AM29000_R255: info->i = am29000->r[255]; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC: info->i = am29000->pc; break;
+ case CPUINFO_INT_REGISTER + AM29000_VAB: info->i = am29000->vab; break;
+ case CPUINFO_INT_REGISTER + AM29000_OPS: info->i = am29000->ops; break;
+ case CPUINFO_INT_REGISTER + AM29000_CPS: info->i = am29000->cps; break;
+ case CPUINFO_INT_REGISTER + AM29000_CFG: info->i = am29000->cfg; break;
+ case CPUINFO_INT_REGISTER + AM29000_CHA: info->i = am29000->cha; break;
+ case CPUINFO_INT_REGISTER + AM29000_CHD: info->i = am29000->chd; break;
+ case CPUINFO_INT_REGISTER + AM29000_CHC: info->i = am29000->chc; break;
+ case CPUINFO_INT_REGISTER + AM29000_RBP: info->i = am29000->rbp; break;
+ case CPUINFO_INT_REGISTER + AM29000_TMC: info->i = am29000->tmc; break;
+ case CPUINFO_INT_REGISTER + AM29000_TMR: info->i = am29000->tmr; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC0: info->i = am29000->pc0; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC1: info->i = am29000->pc1; break;
+ case CPUINFO_INT_REGISTER + AM29000_PC2: info->i = am29000->pc2; break;
+ case CPUINFO_INT_REGISTER + AM29000_MMU: info->i = am29000->mmu; break;
+ case CPUINFO_INT_REGISTER + AM29000_LRU: info->i = am29000->lru; break;
+ case CPUINFO_INT_REGISTER + AM29000_IPC: info->i = am29000->ipc; break;
+ case CPUINFO_INT_REGISTER + AM29000_IPA: info->i = am29000->ipa; break;
+ case CPUINFO_INT_REGISTER + AM29000_IPB: info->i = am29000->ipb; break;
+ case CPUINFO_INT_REGISTER + AM29000_Q: info->i = am29000->q; break;
+ case CPUINFO_INT_REGISTER + AM29000_ALU: info->i = am29000->alu; break;
+ case CPUINFO_INT_REGISTER + AM29000_BP: info->i = GET_ALU_BP; break;
+ case CPUINFO_INT_REGISTER + AM29000_FC: info->i = GET_ALU_FC; break;
+ case CPUINFO_INT_REGISTER + AM29000_CR: info->i = GET_CHC_CR; break;
+ case CPUINFO_INT_REGISTER + AM29000_FPE: info->i = am29000->fpe; break;
+ case CPUINFO_INT_REGISTER + AM29000_INTE: info->i = am29000->inte; break;
+ case CPUINFO_INT_REGISTER + AM29000_FPS: info->i = am29000->fps; break;
+ case CPUINFO_INT_REGISTER + AM29000_R1: info->i = am29000->r[1]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R64: info->i = am29000->r[64]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R65: info->i = am29000->r[65]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R66: info->i = am29000->r[66]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R67: info->i = am29000->r[67]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R68: info->i = am29000->r[68]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R69: info->i = am29000->r[69]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R70: info->i = am29000->r[70]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R71: info->i = am29000->r[71]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R72: info->i = am29000->r[72]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R73: info->i = am29000->r[73]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R74: info->i = am29000->r[74]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R75: info->i = am29000->r[75]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R76: info->i = am29000->r[76]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R77: info->i = am29000->r[77]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R78: info->i = am29000->r[78]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R79: info->i = am29000->r[79]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R80: info->i = am29000->r[80]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R81: info->i = am29000->r[81]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R82: info->i = am29000->r[82]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R83: info->i = am29000->r[83]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R84: info->i = am29000->r[84]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R85: info->i = am29000->r[85]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R86: info->i = am29000->r[86]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R87: info->i = am29000->r[87]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R88: info->i = am29000->r[88]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R89: info->i = am29000->r[89]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R90: info->i = am29000->r[90]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R91: info->i = am29000->r[91]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R92: info->i = am29000->r[92]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R93: info->i = am29000->r[93]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R94: info->i = am29000->r[94]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R95: info->i = am29000->r[95]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R96: info->i = am29000->r[96]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R97: info->i = am29000->r[97]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R98: info->i = am29000->r[98]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R99: info->i = am29000->r[99]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R100: info->i = am29000->r[100]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R101: info->i = am29000->r[101]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R102: info->i = am29000->r[102]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R103: info->i = am29000->r[103]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R104: info->i = am29000->r[104]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R105: info->i = am29000->r[105]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R106: info->i = am29000->r[106]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R107: info->i = am29000->r[107]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R108: info->i = am29000->r[108]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R109: info->i = am29000->r[109]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R110: info->i = am29000->r[110]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R111: info->i = am29000->r[111]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R112: info->i = am29000->r[112]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R113: info->i = am29000->r[113]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R114: info->i = am29000->r[114]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R115: info->i = am29000->r[115]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R116: info->i = am29000->r[116]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R117: info->i = am29000->r[117]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R118: info->i = am29000->r[118]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R119: info->i = am29000->r[119]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R120: info->i = am29000->r[120]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R121: info->i = am29000->r[121]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R122: info->i = am29000->r[122]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R123: info->i = am29000->r[123]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R124: info->i = am29000->r[124]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R125: info->i = am29000->r[125]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R126: info->i = am29000->r[126]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R127: info->i = am29000->r[127]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R128: info->i = am29000->r[128]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R129: info->i = am29000->r[129]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R130: info->i = am29000->r[130]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R131: info->i = am29000->r[131]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R132: info->i = am29000->r[132]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R133: info->i = am29000->r[133]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R134: info->i = am29000->r[134]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R135: info->i = am29000->r[135]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R136: info->i = am29000->r[136]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R137: info->i = am29000->r[137]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R138: info->i = am29000->r[138]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R139: info->i = am29000->r[139]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R140: info->i = am29000->r[140]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R141: info->i = am29000->r[141]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R142: info->i = am29000->r[142]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R143: info->i = am29000->r[143]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R144: info->i = am29000->r[144]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R145: info->i = am29000->r[145]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R146: info->i = am29000->r[146]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R147: info->i = am29000->r[147]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R148: info->i = am29000->r[148]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R149: info->i = am29000->r[149]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R150: info->i = am29000->r[150]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R151: info->i = am29000->r[151]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R152: info->i = am29000->r[152]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R153: info->i = am29000->r[153]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R154: info->i = am29000->r[154]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R155: info->i = am29000->r[155]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R156: info->i = am29000->r[156]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R157: info->i = am29000->r[157]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R158: info->i = am29000->r[158]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R159: info->i = am29000->r[159]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R160: info->i = am29000->r[160]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R161: info->i = am29000->r[161]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R162: info->i = am29000->r[162]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R163: info->i = am29000->r[163]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R164: info->i = am29000->r[164]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R165: info->i = am29000->r[165]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R166: info->i = am29000->r[166]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R167: info->i = am29000->r[167]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R168: info->i = am29000->r[168]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R169: info->i = am29000->r[169]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R170: info->i = am29000->r[170]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R171: info->i = am29000->r[171]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R172: info->i = am29000->r[172]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R173: info->i = am29000->r[173]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R174: info->i = am29000->r[174]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R175: info->i = am29000->r[175]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R176: info->i = am29000->r[176]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R177: info->i = am29000->r[177]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R178: info->i = am29000->r[178]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R179: info->i = am29000->r[179]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R180: info->i = am29000->r[180]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R181: info->i = am29000->r[181]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R182: info->i = am29000->r[182]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R183: info->i = am29000->r[183]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R184: info->i = am29000->r[184]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R185: info->i = am29000->r[185]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R186: info->i = am29000->r[186]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R187: info->i = am29000->r[187]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R188: info->i = am29000->r[188]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R189: info->i = am29000->r[189]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R190: info->i = am29000->r[190]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R191: info->i = am29000->r[191]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R192: info->i = am29000->r[192]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R193: info->i = am29000->r[193]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R194: info->i = am29000->r[194]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R195: info->i = am29000->r[195]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R196: info->i = am29000->r[196]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R197: info->i = am29000->r[197]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R198: info->i = am29000->r[198]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R199: info->i = am29000->r[199]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R200: info->i = am29000->r[200]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R201: info->i = am29000->r[201]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R202: info->i = am29000->r[202]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R203: info->i = am29000->r[203]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R204: info->i = am29000->r[204]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R205: info->i = am29000->r[205]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R206: info->i = am29000->r[206]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R207: info->i = am29000->r[207]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R208: info->i = am29000->r[208]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R209: info->i = am29000->r[209]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R210: info->i = am29000->r[210]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R211: info->i = am29000->r[211]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R212: info->i = am29000->r[212]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R213: info->i = am29000->r[213]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R214: info->i = am29000->r[214]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R215: info->i = am29000->r[215]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R216: info->i = am29000->r[216]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R217: info->i = am29000->r[217]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R218: info->i = am29000->r[218]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R219: info->i = am29000->r[219]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R220: info->i = am29000->r[220]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R221: info->i = am29000->r[221]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R222: info->i = am29000->r[222]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R223: info->i = am29000->r[223]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R224: info->i = am29000->r[224]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R225: info->i = am29000->r[225]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R226: info->i = am29000->r[226]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R227: info->i = am29000->r[227]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R228: info->i = am29000->r[228]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R229: info->i = am29000->r[229]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R230: info->i = am29000->r[230]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R231: info->i = am29000->r[231]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R232: info->i = am29000->r[232]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R233: info->i = am29000->r[233]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R234: info->i = am29000->r[234]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R235: info->i = am29000->r[235]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R236: info->i = am29000->r[236]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R237: info->i = am29000->r[237]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R238: info->i = am29000->r[238]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R239: info->i = am29000->r[239]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R240: info->i = am29000->r[240]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R241: info->i = am29000->r[241]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R242: info->i = am29000->r[242]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R243: info->i = am29000->r[243]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R244: info->i = am29000->r[244]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R245: info->i = am29000->r[245]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R246: info->i = am29000->r[246]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R247: info->i = am29000->r[247]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R248: info->i = am29000->r[248]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R249: info->i = am29000->r[249]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R250: info->i = am29000->r[250]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R251: info->i = am29000->r[251]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R252: info->i = am29000->r[252]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R253: info->i = am29000->r[253]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R254: info->i = am29000->r[254]; break;
+ case CPUINFO_INT_REGISTER + AM29000_R255: info->i = am29000->r[255]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(am29000); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(am29000); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(am29000); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(am29000); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(am29000); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(am29000); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &am29000->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(am29000); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(am29000); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(am29000); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(am29000); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(am29000); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(am29000); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &am29000->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Am29000"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "AMD Am29000"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip Bennett"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Am29000"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "AMD Am29000"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip Bennett"); break;
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c|%3d", am29000->alu & ALU_V ? 'V' : '.',
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c|%3d", am29000->alu & ALU_V ? 'V' : '.',
am29000->alu & ALU_Z ? 'Z' : '.',
am29000->alu & ALU_N ? 'N' : '.',
am29000->alu & ALU_C ? 'C' : '.',
@@ -989,226 +989,226 @@ CPU_GET_INFO( am29000 )
am29000->cps & CPS_DA ? 'D' : '.',
(am29000->r[1] >> 2) & 0x7f); break;
- case CPUINFO_STR_REGISTER + AM29000_PC: sprintf(info->s, "PC: %08X", am29000->pc); break;
- case CPUINFO_STR_REGISTER + AM29000_VAB: sprintf(info->s, "VAB: %08X", am29000->vab); break;
- case CPUINFO_STR_REGISTER + AM29000_OPS: sprintf(info->s, "OPS: %08X", am29000->ops); break;
- case CPUINFO_STR_REGISTER + AM29000_CPS: sprintf(info->s, "CPS: %08X", am29000->cps); break;
- case CPUINFO_STR_REGISTER + AM29000_CFG: sprintf(info->s, "CFG: %08X", am29000->cfg); break;
- case CPUINFO_STR_REGISTER + AM29000_CHA: sprintf(info->s, "CHA: %08X", am29000->cha); break;
- case CPUINFO_STR_REGISTER + AM29000_CHD: sprintf(info->s, "CHD: %08X", am29000->chd); break;
- case CPUINFO_STR_REGISTER + AM29000_CHC: sprintf(info->s, "CHC: %08X", am29000->chc); break;
- case CPUINFO_STR_REGISTER + AM29000_RBP: sprintf(info->s, "RBP: %08X", am29000->rbp); break;
- case CPUINFO_STR_REGISTER + AM29000_TMC: sprintf(info->s, "TMC: %08X", am29000->tmc); break;
- case CPUINFO_STR_REGISTER + AM29000_TMR: sprintf(info->s, "TMR: %08X", am29000->tmr); break;
- case CPUINFO_STR_REGISTER + AM29000_PC0: sprintf(info->s, "PC0: %08X", am29000->pc0); break;
- case CPUINFO_STR_REGISTER + AM29000_PC1: sprintf(info->s, "PC1: %08X", am29000->pc1); break;
- case CPUINFO_STR_REGISTER + AM29000_PC2: sprintf(info->s, "PC2: %08X", am29000->pc2); break;
- case CPUINFO_STR_REGISTER + AM29000_MMU: sprintf(info->s, "MMU: %08X", am29000->mmu); break;
- case CPUINFO_STR_REGISTER + AM29000_LRU: sprintf(info->s, "LRU: %08X", am29000->lru); break;
- case CPUINFO_STR_REGISTER + AM29000_IPC: sprintf(info->s, "IPC: %08X", am29000->ipc); break;
- case CPUINFO_STR_REGISTER + AM29000_IPA: sprintf(info->s, "IPA: %08X", am29000->ipa); break;
- case CPUINFO_STR_REGISTER + AM29000_IPB: sprintf(info->s, "IPB: %08X", am29000->ipb); break;
- case CPUINFO_STR_REGISTER + AM29000_Q: sprintf(info->s, "Q: %08X", am29000->q); break;
- case CPUINFO_STR_REGISTER + AM29000_ALU: sprintf(info->s, "ALU: %08X", am29000->alu); break;
- case CPUINFO_STR_REGISTER + AM29000_BP: sprintf(info->s, "BP: %08X", GET_ALU_BP); break;
- case CPUINFO_STR_REGISTER + AM29000_FC: sprintf(info->s, "FC: %08X", GET_ALU_FC); break;
- case CPUINFO_STR_REGISTER + AM29000_CR: sprintf(info->s, "CR: %08X", GET_CHC_CR); break;
- case CPUINFO_STR_REGISTER + AM29000_FPE: sprintf(info->s, "FPE: %08X", am29000->fpe); break;
- case CPUINFO_STR_REGISTER + AM29000_INTE: sprintf(info->s, "INTE: %08X", am29000->inte); break;
- case CPUINFO_STR_REGISTER + AM29000_FPS: sprintf(info->s, "FPS: %08X", am29000->fps); break;
- case CPUINFO_STR_REGISTER + AM29000_R1: sprintf(info->s, "R1: %08X", am29000->r[1]); break;
- case CPUINFO_STR_REGISTER + AM29000_R64: sprintf(info->s, "R64: %08X", am29000->r[64]); break;
- case CPUINFO_STR_REGISTER + AM29000_R65: sprintf(info->s, "R65: %08X", am29000->r[65]); break;
- case CPUINFO_STR_REGISTER + AM29000_R66: sprintf(info->s, "R66: %08X", am29000->r[66]); break;
- case CPUINFO_STR_REGISTER + AM29000_R67: sprintf(info->s, "R67: %08X", am29000->r[67]); break;
- case CPUINFO_STR_REGISTER + AM29000_R68: sprintf(info->s, "R68: %08X", am29000->r[68]); break;
- case CPUINFO_STR_REGISTER + AM29000_R69: sprintf(info->s, "R69: %08X", am29000->r[69]); break;
- case CPUINFO_STR_REGISTER + AM29000_R70: sprintf(info->s, "R70: %08X", am29000->r[70]); break;
- case CPUINFO_STR_REGISTER + AM29000_R71: sprintf(info->s, "R71: %08X", am29000->r[71]); break;
- case CPUINFO_STR_REGISTER + AM29000_R72: sprintf(info->s, "R72: %08X", am29000->r[72]); break;
- case CPUINFO_STR_REGISTER + AM29000_R73: sprintf(info->s, "R73: %08X", am29000->r[73]); break;
- case CPUINFO_STR_REGISTER + AM29000_R74: sprintf(info->s, "R74: %08X", am29000->r[74]); break;
- case CPUINFO_STR_REGISTER + AM29000_R75: sprintf(info->s, "R75: %08X", am29000->r[75]); break;
- case CPUINFO_STR_REGISTER + AM29000_R76: sprintf(info->s, "R76: %08X", am29000->r[76]); break;
- case CPUINFO_STR_REGISTER + AM29000_R77: sprintf(info->s, "R77: %08X", am29000->r[77]); break;
- case CPUINFO_STR_REGISTER + AM29000_R78: sprintf(info->s, "R78: %08X", am29000->r[78]); break;
- case CPUINFO_STR_REGISTER + AM29000_R79: sprintf(info->s, "R79: %08X", am29000->r[79]); break;
- case CPUINFO_STR_REGISTER + AM29000_R80: sprintf(info->s, "R80: %08X", am29000->r[80]); break;
- case CPUINFO_STR_REGISTER + AM29000_R81: sprintf(info->s, "R81: %08X", am29000->r[81]); break;
- case CPUINFO_STR_REGISTER + AM29000_R82: sprintf(info->s, "R82: %08X", am29000->r[82]); break;
- case CPUINFO_STR_REGISTER + AM29000_R83: sprintf(info->s, "R83: %08X", am29000->r[83]); break;
- case CPUINFO_STR_REGISTER + AM29000_R84: sprintf(info->s, "R84: %08X", am29000->r[84]); break;
- case CPUINFO_STR_REGISTER + AM29000_R85: sprintf(info->s, "R85: %08X", am29000->r[85]); break;
- case CPUINFO_STR_REGISTER + AM29000_R86: sprintf(info->s, "R86: %08X", am29000->r[86]); break;
- case CPUINFO_STR_REGISTER + AM29000_R87: sprintf(info->s, "R87: %08X", am29000->r[87]); break;
- case CPUINFO_STR_REGISTER + AM29000_R88: sprintf(info->s, "R88: %08X", am29000->r[88]); break;
- case CPUINFO_STR_REGISTER + AM29000_R89: sprintf(info->s, "R89: %08X", am29000->r[89]); break;
- case CPUINFO_STR_REGISTER + AM29000_R90: sprintf(info->s, "R90: %08X", am29000->r[90]); break;
- case CPUINFO_STR_REGISTER + AM29000_R91: sprintf(info->s, "R91: %08X", am29000->r[91]); break;
- case CPUINFO_STR_REGISTER + AM29000_R92: sprintf(info->s, "R92: %08X", am29000->r[92]); break;
- case CPUINFO_STR_REGISTER + AM29000_R93: sprintf(info->s, "R93: %08X", am29000->r[93]); break;
- case CPUINFO_STR_REGISTER + AM29000_R94: sprintf(info->s, "R94: %08X", am29000->r[94]); break;
- case CPUINFO_STR_REGISTER + AM29000_R95: sprintf(info->s, "R95: %08X", am29000->r[95]); break;
- case CPUINFO_STR_REGISTER + AM29000_R96: sprintf(info->s, "R96: %08X", am29000->r[96]); break;
- case CPUINFO_STR_REGISTER + AM29000_R97: sprintf(info->s, "R97: %08X", am29000->r[97]); break;
- case CPUINFO_STR_REGISTER + AM29000_R98: sprintf(info->s, "R98: %08X", am29000->r[98]); break;
- case CPUINFO_STR_REGISTER + AM29000_R99: sprintf(info->s, "R99: %08X", am29000->r[99]); break;
- case CPUINFO_STR_REGISTER + AM29000_R100: sprintf(info->s, "R100: %08X", am29000->r[100]); break;
- case CPUINFO_STR_REGISTER + AM29000_R101: sprintf(info->s, "R101: %08X", am29000->r[101]); break;
- case CPUINFO_STR_REGISTER + AM29000_R102: sprintf(info->s, "R102: %08X", am29000->r[102]); break;
- case CPUINFO_STR_REGISTER + AM29000_R103: sprintf(info->s, "R103: %08X", am29000->r[103]); break;
- case CPUINFO_STR_REGISTER + AM29000_R104: sprintf(info->s, "R104: %08X", am29000->r[104]); break;
- case CPUINFO_STR_REGISTER + AM29000_R105: sprintf(info->s, "R105: %08X", am29000->r[105]); break;
- case CPUINFO_STR_REGISTER + AM29000_R106: sprintf(info->s, "R106: %08X", am29000->r[106]); break;
- case CPUINFO_STR_REGISTER + AM29000_R107: sprintf(info->s, "R107: %08X", am29000->r[107]); break;
- case CPUINFO_STR_REGISTER + AM29000_R108: sprintf(info->s, "R108: %08X", am29000->r[108]); break;
- case CPUINFO_STR_REGISTER + AM29000_R109: sprintf(info->s, "R109: %08X", am29000->r[109]); break;
- case CPUINFO_STR_REGISTER + AM29000_R110: sprintf(info->s, "R110: %08X", am29000->r[110]); break;
- case CPUINFO_STR_REGISTER + AM29000_R111: sprintf(info->s, "R111: %08X", am29000->r[111]); break;
- case CPUINFO_STR_REGISTER + AM29000_R112: sprintf(info->s, "R112: %08X", am29000->r[112]); break;
- case CPUINFO_STR_REGISTER + AM29000_R113: sprintf(info->s, "R113: %08X", am29000->r[113]); break;
- case CPUINFO_STR_REGISTER + AM29000_R114: sprintf(info->s, "R114: %08X", am29000->r[114]); break;
- case CPUINFO_STR_REGISTER + AM29000_R115: sprintf(info->s, "R115: %08X", am29000->r[115]); break;
- case CPUINFO_STR_REGISTER + AM29000_R116: sprintf(info->s, "R116: %08X", am29000->r[116]); break;
- case CPUINFO_STR_REGISTER + AM29000_R117: sprintf(info->s, "R117: %08X", am29000->r[117]); break;
- case CPUINFO_STR_REGISTER + AM29000_R118: sprintf(info->s, "R118: %08X", am29000->r[118]); break;
- case CPUINFO_STR_REGISTER + AM29000_R119: sprintf(info->s, "R119: %08X", am29000->r[119]); break;
- case CPUINFO_STR_REGISTER + AM29000_R120: sprintf(info->s, "R120: %08X", am29000->r[120]); break;
- case CPUINFO_STR_REGISTER + AM29000_R121: sprintf(info->s, "R121: %08X", am29000->r[121]); break;
- case CPUINFO_STR_REGISTER + AM29000_R122: sprintf(info->s, "R122: %08X", am29000->r[122]); break;
- case CPUINFO_STR_REGISTER + AM29000_R123: sprintf(info->s, "R123: %08X", am29000->r[123]); break;
- case CPUINFO_STR_REGISTER + AM29000_R124: sprintf(info->s, "R124: %08X", am29000->r[124]); break;
- case CPUINFO_STR_REGISTER + AM29000_R125: sprintf(info->s, "R125: %08X", am29000->r[125]); break;
- case CPUINFO_STR_REGISTER + AM29000_R126: sprintf(info->s, "R126: %08X", am29000->r[126]); break;
- case CPUINFO_STR_REGISTER + AM29000_R127: sprintf(info->s, "R127: %08X", am29000->r[127]); break;
- case CPUINFO_STR_REGISTER + AM29000_R128: sprintf(info->s, "R128: %08X", am29000->r[128]); break;
- case CPUINFO_STR_REGISTER + AM29000_R129: sprintf(info->s, "R129: %08X", am29000->r[129]); break;
- case CPUINFO_STR_REGISTER + AM29000_R130: sprintf(info->s, "R130: %08X", am29000->r[130]); break;
- case CPUINFO_STR_REGISTER + AM29000_R131: sprintf(info->s, "R131: %08X", am29000->r[131]); break;
- case CPUINFO_STR_REGISTER + AM29000_R132: sprintf(info->s, "R132: %08X", am29000->r[132]); break;
- case CPUINFO_STR_REGISTER + AM29000_R133: sprintf(info->s, "R133: %08X", am29000->r[133]); break;
- case CPUINFO_STR_REGISTER + AM29000_R134: sprintf(info->s, "R134: %08X", am29000->r[134]); break;
- case CPUINFO_STR_REGISTER + AM29000_R135: sprintf(info->s, "R135: %08X", am29000->r[135]); break;
- case CPUINFO_STR_REGISTER + AM29000_R136: sprintf(info->s, "R136: %08X", am29000->r[136]); break;
- case CPUINFO_STR_REGISTER + AM29000_R137: sprintf(info->s, "R137: %08X", am29000->r[137]); break;
- case CPUINFO_STR_REGISTER + AM29000_R138: sprintf(info->s, "R138: %08X", am29000->r[138]); break;
- case CPUINFO_STR_REGISTER + AM29000_R139: sprintf(info->s, "R139: %08X", am29000->r[139]); break;
- case CPUINFO_STR_REGISTER + AM29000_R140: sprintf(info->s, "R140: %08X", am29000->r[140]); break;
- case CPUINFO_STR_REGISTER + AM29000_R141: sprintf(info->s, "R141: %08X", am29000->r[141]); break;
- case CPUINFO_STR_REGISTER + AM29000_R142: sprintf(info->s, "R142: %08X", am29000->r[142]); break;
- case CPUINFO_STR_REGISTER + AM29000_R143: sprintf(info->s, "R143: %08X", am29000->r[143]); break;
- case CPUINFO_STR_REGISTER + AM29000_R144: sprintf(info->s, "R144: %08X", am29000->r[144]); break;
- case CPUINFO_STR_REGISTER + AM29000_R145: sprintf(info->s, "R145: %08X", am29000->r[145]); break;
- case CPUINFO_STR_REGISTER + AM29000_R146: sprintf(info->s, "R146: %08X", am29000->r[146]); break;
- case CPUINFO_STR_REGISTER + AM29000_R147: sprintf(info->s, "R147: %08X", am29000->r[147]); break;
- case CPUINFO_STR_REGISTER + AM29000_R148: sprintf(info->s, "R148: %08X", am29000->r[148]); break;
- case CPUINFO_STR_REGISTER + AM29000_R149: sprintf(info->s, "R149: %08X", am29000->r[149]); break;
- case CPUINFO_STR_REGISTER + AM29000_R150: sprintf(info->s, "R150: %08X", am29000->r[150]); break;
- case CPUINFO_STR_REGISTER + AM29000_R151: sprintf(info->s, "R151: %08X", am29000->r[151]); break;
- case CPUINFO_STR_REGISTER + AM29000_R152: sprintf(info->s, "R152: %08X", am29000->r[152]); break;
- case CPUINFO_STR_REGISTER + AM29000_R153: sprintf(info->s, "R153: %08X", am29000->r[153]); break;
- case CPUINFO_STR_REGISTER + AM29000_R154: sprintf(info->s, "R154: %08X", am29000->r[154]); break;
- case CPUINFO_STR_REGISTER + AM29000_R155: sprintf(info->s, "R155: %08X", am29000->r[155]); break;
- case CPUINFO_STR_REGISTER + AM29000_R156: sprintf(info->s, "R156: %08X", am29000->r[156]); break;
- case CPUINFO_STR_REGISTER + AM29000_R157: sprintf(info->s, "R157: %08X", am29000->r[157]); break;
- case CPUINFO_STR_REGISTER + AM29000_R158: sprintf(info->s, "R158: %08X", am29000->r[158]); break;
- case CPUINFO_STR_REGISTER + AM29000_R159: sprintf(info->s, "R159: %08X", am29000->r[159]); break;
- case CPUINFO_STR_REGISTER + AM29000_R160: sprintf(info->s, "R160: %08X", am29000->r[160]); break;
- case CPUINFO_STR_REGISTER + AM29000_R161: sprintf(info->s, "R161: %08X", am29000->r[161]); break;
- case CPUINFO_STR_REGISTER + AM29000_R162: sprintf(info->s, "R162: %08X", am29000->r[162]); break;
- case CPUINFO_STR_REGISTER + AM29000_R163: sprintf(info->s, "R163: %08X", am29000->r[163]); break;
- case CPUINFO_STR_REGISTER + AM29000_R164: sprintf(info->s, "R164: %08X", am29000->r[164]); break;
- case CPUINFO_STR_REGISTER + AM29000_R165: sprintf(info->s, "R165: %08X", am29000->r[165]); break;
- case CPUINFO_STR_REGISTER + AM29000_R166: sprintf(info->s, "R166: %08X", am29000->r[166]); break;
- case CPUINFO_STR_REGISTER + AM29000_R167: sprintf(info->s, "R167: %08X", am29000->r[167]); break;
- case CPUINFO_STR_REGISTER + AM29000_R168: sprintf(info->s, "R168: %08X", am29000->r[168]); break;
- case CPUINFO_STR_REGISTER + AM29000_R169: sprintf(info->s, "R169: %08X", am29000->r[169]); break;
- case CPUINFO_STR_REGISTER + AM29000_R170: sprintf(info->s, "R170: %08X", am29000->r[170]); break;
- case CPUINFO_STR_REGISTER + AM29000_R171: sprintf(info->s, "R171: %08X", am29000->r[171]); break;
- case CPUINFO_STR_REGISTER + AM29000_R172: sprintf(info->s, "R172: %08X", am29000->r[172]); break;
- case CPUINFO_STR_REGISTER + AM29000_R173: sprintf(info->s, "R173: %08X", am29000->r[173]); break;
- case CPUINFO_STR_REGISTER + AM29000_R174: sprintf(info->s, "R174: %08X", am29000->r[174]); break;
- case CPUINFO_STR_REGISTER + AM29000_R175: sprintf(info->s, "R175: %08X", am29000->r[175]); break;
- case CPUINFO_STR_REGISTER + AM29000_R176: sprintf(info->s, "R176: %08X", am29000->r[176]); break;
- case CPUINFO_STR_REGISTER + AM29000_R177: sprintf(info->s, "R177: %08X", am29000->r[177]); break;
- case CPUINFO_STR_REGISTER + AM29000_R178: sprintf(info->s, "R178: %08X", am29000->r[178]); break;
- case CPUINFO_STR_REGISTER + AM29000_R179: sprintf(info->s, "R179: %08X", am29000->r[179]); break;
- case CPUINFO_STR_REGISTER + AM29000_R180: sprintf(info->s, "R180: %08X", am29000->r[180]); break;
- case CPUINFO_STR_REGISTER + AM29000_R181: sprintf(info->s, "R181: %08X", am29000->r[181]); break;
- case CPUINFO_STR_REGISTER + AM29000_R182: sprintf(info->s, "R182: %08X", am29000->r[182]); break;
- case CPUINFO_STR_REGISTER + AM29000_R183: sprintf(info->s, "R183: %08X", am29000->r[183]); break;
- case CPUINFO_STR_REGISTER + AM29000_R184: sprintf(info->s, "R184: %08X", am29000->r[184]); break;
- case CPUINFO_STR_REGISTER + AM29000_R185: sprintf(info->s, "R185: %08X", am29000->r[185]); break;
- case CPUINFO_STR_REGISTER + AM29000_R186: sprintf(info->s, "R186: %08X", am29000->r[186]); break;
- case CPUINFO_STR_REGISTER + AM29000_R187: sprintf(info->s, "R187: %08X", am29000->r[187]); break;
- case CPUINFO_STR_REGISTER + AM29000_R188: sprintf(info->s, "R188: %08X", am29000->r[188]); break;
- case CPUINFO_STR_REGISTER + AM29000_R189: sprintf(info->s, "R189: %08X", am29000->r[189]); break;
- case CPUINFO_STR_REGISTER + AM29000_R190: sprintf(info->s, "R190: %08X", am29000->r[190]); break;
- case CPUINFO_STR_REGISTER + AM29000_R191: sprintf(info->s, "R191: %08X", am29000->r[191]); break;
- case CPUINFO_STR_REGISTER + AM29000_R192: sprintf(info->s, "R192: %08X", am29000->r[192]); break;
- case CPUINFO_STR_REGISTER + AM29000_R193: sprintf(info->s, "R193: %08X", am29000->r[193]); break;
- case CPUINFO_STR_REGISTER + AM29000_R194: sprintf(info->s, "R194: %08X", am29000->r[194]); break;
- case CPUINFO_STR_REGISTER + AM29000_R195: sprintf(info->s, "R195: %08X", am29000->r[195]); break;
- case CPUINFO_STR_REGISTER + AM29000_R196: sprintf(info->s, "R196: %08X", am29000->r[196]); break;
- case CPUINFO_STR_REGISTER + AM29000_R197: sprintf(info->s, "R197: %08X", am29000->r[197]); break;
- case CPUINFO_STR_REGISTER + AM29000_R198: sprintf(info->s, "R198: %08X", am29000->r[198]); break;
- case CPUINFO_STR_REGISTER + AM29000_R199: sprintf(info->s, "R199: %08X", am29000->r[199]); break;
- case CPUINFO_STR_REGISTER + AM29000_R200: sprintf(info->s, "R200: %08X", am29000->r[200]); break;
- case CPUINFO_STR_REGISTER + AM29000_R201: sprintf(info->s, "R201: %08X", am29000->r[201]); break;
- case CPUINFO_STR_REGISTER + AM29000_R202: sprintf(info->s, "R202: %08X", am29000->r[202]); break;
- case CPUINFO_STR_REGISTER + AM29000_R203: sprintf(info->s, "R203: %08X", am29000->r[203]); break;
- case CPUINFO_STR_REGISTER + AM29000_R204: sprintf(info->s, "R204: %08X", am29000->r[204]); break;
- case CPUINFO_STR_REGISTER + AM29000_R205: sprintf(info->s, "R205: %08X", am29000->r[205]); break;
- case CPUINFO_STR_REGISTER + AM29000_R206: sprintf(info->s, "R206: %08X", am29000->r[206]); break;
- case CPUINFO_STR_REGISTER + AM29000_R207: sprintf(info->s, "R207: %08X", am29000->r[207]); break;
- case CPUINFO_STR_REGISTER + AM29000_R208: sprintf(info->s, "R208: %08X", am29000->r[208]); break;
- case CPUINFO_STR_REGISTER + AM29000_R209: sprintf(info->s, "R209: %08X", am29000->r[209]); break;
- case CPUINFO_STR_REGISTER + AM29000_R210: sprintf(info->s, "R210: %08X", am29000->r[210]); break;
- case CPUINFO_STR_REGISTER + AM29000_R211: sprintf(info->s, "R211: %08X", am29000->r[211]); break;
- case CPUINFO_STR_REGISTER + AM29000_R212: sprintf(info->s, "R212: %08X", am29000->r[212]); break;
- case CPUINFO_STR_REGISTER + AM29000_R213: sprintf(info->s, "R213: %08X", am29000->r[213]); break;
- case CPUINFO_STR_REGISTER + AM29000_R214: sprintf(info->s, "R214: %08X", am29000->r[214]); break;
- case CPUINFO_STR_REGISTER + AM29000_R215: sprintf(info->s, "R215: %08X", am29000->r[215]); break;
- case CPUINFO_STR_REGISTER + AM29000_R216: sprintf(info->s, "R216: %08X", am29000->r[216]); break;
- case CPUINFO_STR_REGISTER + AM29000_R217: sprintf(info->s, "R217: %08X", am29000->r[217]); break;
- case CPUINFO_STR_REGISTER + AM29000_R218: sprintf(info->s, "R218: %08X", am29000->r[218]); break;
- case CPUINFO_STR_REGISTER + AM29000_R219: sprintf(info->s, "R219: %08X", am29000->r[219]); break;
- case CPUINFO_STR_REGISTER + AM29000_R220: sprintf(info->s, "R220: %08X", am29000->r[220]); break;
- case CPUINFO_STR_REGISTER + AM29000_R221: sprintf(info->s, "R221: %08X", am29000->r[221]); break;
- case CPUINFO_STR_REGISTER + AM29000_R222: sprintf(info->s, "R222: %08X", am29000->r[222]); break;
- case CPUINFO_STR_REGISTER + AM29000_R223: sprintf(info->s, "R223: %08X", am29000->r[223]); break;
- case CPUINFO_STR_REGISTER + AM29000_R224: sprintf(info->s, "R224: %08X", am29000->r[224]); break;
- case CPUINFO_STR_REGISTER + AM29000_R225: sprintf(info->s, "R225: %08X", am29000->r[225]); break;
- case CPUINFO_STR_REGISTER + AM29000_R226: sprintf(info->s, "R226: %08X", am29000->r[226]); break;
- case CPUINFO_STR_REGISTER + AM29000_R227: sprintf(info->s, "R227: %08X", am29000->r[227]); break;
- case CPUINFO_STR_REGISTER + AM29000_R228: sprintf(info->s, "R228: %08X", am29000->r[228]); break;
- case CPUINFO_STR_REGISTER + AM29000_R229: sprintf(info->s, "R229: %08X", am29000->r[229]); break;
- case CPUINFO_STR_REGISTER + AM29000_R230: sprintf(info->s, "R230: %08X", am29000->r[230]); break;
- case CPUINFO_STR_REGISTER + AM29000_R231: sprintf(info->s, "R231: %08X", am29000->r[231]); break;
- case CPUINFO_STR_REGISTER + AM29000_R232: sprintf(info->s, "R232: %08X", am29000->r[232]); break;
- case CPUINFO_STR_REGISTER + AM29000_R233: sprintf(info->s, "R233: %08X", am29000->r[233]); break;
- case CPUINFO_STR_REGISTER + AM29000_R234: sprintf(info->s, "R234: %08X", am29000->r[234]); break;
- case CPUINFO_STR_REGISTER + AM29000_R235: sprintf(info->s, "R235: %08X", am29000->r[235]); break;
- case CPUINFO_STR_REGISTER + AM29000_R236: sprintf(info->s, "R236: %08X", am29000->r[236]); break;
- case CPUINFO_STR_REGISTER + AM29000_R237: sprintf(info->s, "R237: %08X", am29000->r[237]); break;
- case CPUINFO_STR_REGISTER + AM29000_R238: sprintf(info->s, "R238: %08X", am29000->r[238]); break;
- case CPUINFO_STR_REGISTER + AM29000_R239: sprintf(info->s, "R239: %08X", am29000->r[239]); break;
- case CPUINFO_STR_REGISTER + AM29000_R240: sprintf(info->s, "R240: %08X", am29000->r[240]); break;
- case CPUINFO_STR_REGISTER + AM29000_R241: sprintf(info->s, "R241: %08X", am29000->r[241]); break;
- case CPUINFO_STR_REGISTER + AM29000_R242: sprintf(info->s, "R242: %08X", am29000->r[242]); break;
- case CPUINFO_STR_REGISTER + AM29000_R243: sprintf(info->s, "R243: %08X", am29000->r[243]); break;
- case CPUINFO_STR_REGISTER + AM29000_R244: sprintf(info->s, "R244: %08X", am29000->r[244]); break;
- case CPUINFO_STR_REGISTER + AM29000_R245: sprintf(info->s, "R245: %08X", am29000->r[245]); break;
- case CPUINFO_STR_REGISTER + AM29000_R246: sprintf(info->s, "R246: %08X", am29000->r[246]); break;
- case CPUINFO_STR_REGISTER + AM29000_R247: sprintf(info->s, "R247: %08X", am29000->r[247]); break;
- case CPUINFO_STR_REGISTER + AM29000_R248: sprintf(info->s, "R248: %08X", am29000->r[248]); break;
- case CPUINFO_STR_REGISTER + AM29000_R249: sprintf(info->s, "R249: %08X", am29000->r[249]); break;
- case CPUINFO_STR_REGISTER + AM29000_R250: sprintf(info->s, "R250: %08X", am29000->r[250]); break;
- case CPUINFO_STR_REGISTER + AM29000_R251: sprintf(info->s, "R251: %08X", am29000->r[251]); break;
- case CPUINFO_STR_REGISTER + AM29000_R252: sprintf(info->s, "R252: %08X", am29000->r[252]); break;
- case CPUINFO_STR_REGISTER + AM29000_R253: sprintf(info->s, "R253: %08X", am29000->r[253]); break;
- case CPUINFO_STR_REGISTER + AM29000_R254: sprintf(info->s, "R254: %08X", am29000->r[254]); break;
- case CPUINFO_STR_REGISTER + AM29000_R255: sprintf(info->s, "R255: %08X", am29000->r[255]); break;
+ case CPUINFO_STR_REGISTER + AM29000_PC: sprintf(info->s, "PC: %08X", am29000->pc); break;
+ case CPUINFO_STR_REGISTER + AM29000_VAB: sprintf(info->s, "VAB: %08X", am29000->vab); break;
+ case CPUINFO_STR_REGISTER + AM29000_OPS: sprintf(info->s, "OPS: %08X", am29000->ops); break;
+ case CPUINFO_STR_REGISTER + AM29000_CPS: sprintf(info->s, "CPS: %08X", am29000->cps); break;
+ case CPUINFO_STR_REGISTER + AM29000_CFG: sprintf(info->s, "CFG: %08X", am29000->cfg); break;
+ case CPUINFO_STR_REGISTER + AM29000_CHA: sprintf(info->s, "CHA: %08X", am29000->cha); break;
+ case CPUINFO_STR_REGISTER + AM29000_CHD: sprintf(info->s, "CHD: %08X", am29000->chd); break;
+ case CPUINFO_STR_REGISTER + AM29000_CHC: sprintf(info->s, "CHC: %08X", am29000->chc); break;
+ case CPUINFO_STR_REGISTER + AM29000_RBP: sprintf(info->s, "RBP: %08X", am29000->rbp); break;
+ case CPUINFO_STR_REGISTER + AM29000_TMC: sprintf(info->s, "TMC: %08X", am29000->tmc); break;
+ case CPUINFO_STR_REGISTER + AM29000_TMR: sprintf(info->s, "TMR: %08X", am29000->tmr); break;
+ case CPUINFO_STR_REGISTER + AM29000_PC0: sprintf(info->s, "PC0: %08X", am29000->pc0); break;
+ case CPUINFO_STR_REGISTER + AM29000_PC1: sprintf(info->s, "PC1: %08X", am29000->pc1); break;
+ case CPUINFO_STR_REGISTER + AM29000_PC2: sprintf(info->s, "PC2: %08X", am29000->pc2); break;
+ case CPUINFO_STR_REGISTER + AM29000_MMU: sprintf(info->s, "MMU: %08X", am29000->mmu); break;
+ case CPUINFO_STR_REGISTER + AM29000_LRU: sprintf(info->s, "LRU: %08X", am29000->lru); break;
+ case CPUINFO_STR_REGISTER + AM29000_IPC: sprintf(info->s, "IPC: %08X", am29000->ipc); break;
+ case CPUINFO_STR_REGISTER + AM29000_IPA: sprintf(info->s, "IPA: %08X", am29000->ipa); break;
+ case CPUINFO_STR_REGISTER + AM29000_IPB: sprintf(info->s, "IPB: %08X", am29000->ipb); break;
+ case CPUINFO_STR_REGISTER + AM29000_Q: sprintf(info->s, "Q: %08X", am29000->q); break;
+ case CPUINFO_STR_REGISTER + AM29000_ALU: sprintf(info->s, "ALU: %08X", am29000->alu); break;
+ case CPUINFO_STR_REGISTER + AM29000_BP: sprintf(info->s, "BP: %08X", GET_ALU_BP); break;
+ case CPUINFO_STR_REGISTER + AM29000_FC: sprintf(info->s, "FC: %08X", GET_ALU_FC); break;
+ case CPUINFO_STR_REGISTER + AM29000_CR: sprintf(info->s, "CR: %08X", GET_CHC_CR); break;
+ case CPUINFO_STR_REGISTER + AM29000_FPE: sprintf(info->s, "FPE: %08X", am29000->fpe); break;
+ case CPUINFO_STR_REGISTER + AM29000_INTE: sprintf(info->s, "INTE: %08X", am29000->inte); break;
+ case CPUINFO_STR_REGISTER + AM29000_FPS: sprintf(info->s, "FPS: %08X", am29000->fps); break;
+ case CPUINFO_STR_REGISTER + AM29000_R1: sprintf(info->s, "R1: %08X", am29000->r[1]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R64: sprintf(info->s, "R64: %08X", am29000->r[64]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R65: sprintf(info->s, "R65: %08X", am29000->r[65]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R66: sprintf(info->s, "R66: %08X", am29000->r[66]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R67: sprintf(info->s, "R67: %08X", am29000->r[67]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R68: sprintf(info->s, "R68: %08X", am29000->r[68]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R69: sprintf(info->s, "R69: %08X", am29000->r[69]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R70: sprintf(info->s, "R70: %08X", am29000->r[70]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R71: sprintf(info->s, "R71: %08X", am29000->r[71]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R72: sprintf(info->s, "R72: %08X", am29000->r[72]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R73: sprintf(info->s, "R73: %08X", am29000->r[73]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R74: sprintf(info->s, "R74: %08X", am29000->r[74]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R75: sprintf(info->s, "R75: %08X", am29000->r[75]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R76: sprintf(info->s, "R76: %08X", am29000->r[76]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R77: sprintf(info->s, "R77: %08X", am29000->r[77]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R78: sprintf(info->s, "R78: %08X", am29000->r[78]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R79: sprintf(info->s, "R79: %08X", am29000->r[79]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R80: sprintf(info->s, "R80: %08X", am29000->r[80]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R81: sprintf(info->s, "R81: %08X", am29000->r[81]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R82: sprintf(info->s, "R82: %08X", am29000->r[82]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R83: sprintf(info->s, "R83: %08X", am29000->r[83]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R84: sprintf(info->s, "R84: %08X", am29000->r[84]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R85: sprintf(info->s, "R85: %08X", am29000->r[85]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R86: sprintf(info->s, "R86: %08X", am29000->r[86]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R87: sprintf(info->s, "R87: %08X", am29000->r[87]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R88: sprintf(info->s, "R88: %08X", am29000->r[88]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R89: sprintf(info->s, "R89: %08X", am29000->r[89]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R90: sprintf(info->s, "R90: %08X", am29000->r[90]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R91: sprintf(info->s, "R91: %08X", am29000->r[91]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R92: sprintf(info->s, "R92: %08X", am29000->r[92]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R93: sprintf(info->s, "R93: %08X", am29000->r[93]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R94: sprintf(info->s, "R94: %08X", am29000->r[94]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R95: sprintf(info->s, "R95: %08X", am29000->r[95]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R96: sprintf(info->s, "R96: %08X", am29000->r[96]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R97: sprintf(info->s, "R97: %08X", am29000->r[97]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R98: sprintf(info->s, "R98: %08X", am29000->r[98]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R99: sprintf(info->s, "R99: %08X", am29000->r[99]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R100: sprintf(info->s, "R100: %08X", am29000->r[100]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R101: sprintf(info->s, "R101: %08X", am29000->r[101]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R102: sprintf(info->s, "R102: %08X", am29000->r[102]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R103: sprintf(info->s, "R103: %08X", am29000->r[103]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R104: sprintf(info->s, "R104: %08X", am29000->r[104]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R105: sprintf(info->s, "R105: %08X", am29000->r[105]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R106: sprintf(info->s, "R106: %08X", am29000->r[106]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R107: sprintf(info->s, "R107: %08X", am29000->r[107]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R108: sprintf(info->s, "R108: %08X", am29000->r[108]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R109: sprintf(info->s, "R109: %08X", am29000->r[109]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R110: sprintf(info->s, "R110: %08X", am29000->r[110]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R111: sprintf(info->s, "R111: %08X", am29000->r[111]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R112: sprintf(info->s, "R112: %08X", am29000->r[112]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R113: sprintf(info->s, "R113: %08X", am29000->r[113]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R114: sprintf(info->s, "R114: %08X", am29000->r[114]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R115: sprintf(info->s, "R115: %08X", am29000->r[115]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R116: sprintf(info->s, "R116: %08X", am29000->r[116]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R117: sprintf(info->s, "R117: %08X", am29000->r[117]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R118: sprintf(info->s, "R118: %08X", am29000->r[118]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R119: sprintf(info->s, "R119: %08X", am29000->r[119]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R120: sprintf(info->s, "R120: %08X", am29000->r[120]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R121: sprintf(info->s, "R121: %08X", am29000->r[121]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R122: sprintf(info->s, "R122: %08X", am29000->r[122]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R123: sprintf(info->s, "R123: %08X", am29000->r[123]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R124: sprintf(info->s, "R124: %08X", am29000->r[124]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R125: sprintf(info->s, "R125: %08X", am29000->r[125]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R126: sprintf(info->s, "R126: %08X", am29000->r[126]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R127: sprintf(info->s, "R127: %08X", am29000->r[127]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R128: sprintf(info->s, "R128: %08X", am29000->r[128]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R129: sprintf(info->s, "R129: %08X", am29000->r[129]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R130: sprintf(info->s, "R130: %08X", am29000->r[130]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R131: sprintf(info->s, "R131: %08X", am29000->r[131]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R132: sprintf(info->s, "R132: %08X", am29000->r[132]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R133: sprintf(info->s, "R133: %08X", am29000->r[133]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R134: sprintf(info->s, "R134: %08X", am29000->r[134]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R135: sprintf(info->s, "R135: %08X", am29000->r[135]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R136: sprintf(info->s, "R136: %08X", am29000->r[136]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R137: sprintf(info->s, "R137: %08X", am29000->r[137]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R138: sprintf(info->s, "R138: %08X", am29000->r[138]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R139: sprintf(info->s, "R139: %08X", am29000->r[139]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R140: sprintf(info->s, "R140: %08X", am29000->r[140]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R141: sprintf(info->s, "R141: %08X", am29000->r[141]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R142: sprintf(info->s, "R142: %08X", am29000->r[142]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R143: sprintf(info->s, "R143: %08X", am29000->r[143]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R144: sprintf(info->s, "R144: %08X", am29000->r[144]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R145: sprintf(info->s, "R145: %08X", am29000->r[145]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R146: sprintf(info->s, "R146: %08X", am29000->r[146]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R147: sprintf(info->s, "R147: %08X", am29000->r[147]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R148: sprintf(info->s, "R148: %08X", am29000->r[148]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R149: sprintf(info->s, "R149: %08X", am29000->r[149]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R150: sprintf(info->s, "R150: %08X", am29000->r[150]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R151: sprintf(info->s, "R151: %08X", am29000->r[151]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R152: sprintf(info->s, "R152: %08X", am29000->r[152]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R153: sprintf(info->s, "R153: %08X", am29000->r[153]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R154: sprintf(info->s, "R154: %08X", am29000->r[154]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R155: sprintf(info->s, "R155: %08X", am29000->r[155]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R156: sprintf(info->s, "R156: %08X", am29000->r[156]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R157: sprintf(info->s, "R157: %08X", am29000->r[157]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R158: sprintf(info->s, "R158: %08X", am29000->r[158]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R159: sprintf(info->s, "R159: %08X", am29000->r[159]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R160: sprintf(info->s, "R160: %08X", am29000->r[160]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R161: sprintf(info->s, "R161: %08X", am29000->r[161]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R162: sprintf(info->s, "R162: %08X", am29000->r[162]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R163: sprintf(info->s, "R163: %08X", am29000->r[163]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R164: sprintf(info->s, "R164: %08X", am29000->r[164]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R165: sprintf(info->s, "R165: %08X", am29000->r[165]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R166: sprintf(info->s, "R166: %08X", am29000->r[166]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R167: sprintf(info->s, "R167: %08X", am29000->r[167]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R168: sprintf(info->s, "R168: %08X", am29000->r[168]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R169: sprintf(info->s, "R169: %08X", am29000->r[169]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R170: sprintf(info->s, "R170: %08X", am29000->r[170]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R171: sprintf(info->s, "R171: %08X", am29000->r[171]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R172: sprintf(info->s, "R172: %08X", am29000->r[172]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R173: sprintf(info->s, "R173: %08X", am29000->r[173]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R174: sprintf(info->s, "R174: %08X", am29000->r[174]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R175: sprintf(info->s, "R175: %08X", am29000->r[175]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R176: sprintf(info->s, "R176: %08X", am29000->r[176]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R177: sprintf(info->s, "R177: %08X", am29000->r[177]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R178: sprintf(info->s, "R178: %08X", am29000->r[178]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R179: sprintf(info->s, "R179: %08X", am29000->r[179]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R180: sprintf(info->s, "R180: %08X", am29000->r[180]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R181: sprintf(info->s, "R181: %08X", am29000->r[181]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R182: sprintf(info->s, "R182: %08X", am29000->r[182]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R183: sprintf(info->s, "R183: %08X", am29000->r[183]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R184: sprintf(info->s, "R184: %08X", am29000->r[184]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R185: sprintf(info->s, "R185: %08X", am29000->r[185]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R186: sprintf(info->s, "R186: %08X", am29000->r[186]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R187: sprintf(info->s, "R187: %08X", am29000->r[187]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R188: sprintf(info->s, "R188: %08X", am29000->r[188]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R189: sprintf(info->s, "R189: %08X", am29000->r[189]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R190: sprintf(info->s, "R190: %08X", am29000->r[190]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R191: sprintf(info->s, "R191: %08X", am29000->r[191]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R192: sprintf(info->s, "R192: %08X", am29000->r[192]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R193: sprintf(info->s, "R193: %08X", am29000->r[193]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R194: sprintf(info->s, "R194: %08X", am29000->r[194]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R195: sprintf(info->s, "R195: %08X", am29000->r[195]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R196: sprintf(info->s, "R196: %08X", am29000->r[196]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R197: sprintf(info->s, "R197: %08X", am29000->r[197]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R198: sprintf(info->s, "R198: %08X", am29000->r[198]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R199: sprintf(info->s, "R199: %08X", am29000->r[199]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R200: sprintf(info->s, "R200: %08X", am29000->r[200]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R201: sprintf(info->s, "R201: %08X", am29000->r[201]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R202: sprintf(info->s, "R202: %08X", am29000->r[202]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R203: sprintf(info->s, "R203: %08X", am29000->r[203]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R204: sprintf(info->s, "R204: %08X", am29000->r[204]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R205: sprintf(info->s, "R205: %08X", am29000->r[205]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R206: sprintf(info->s, "R206: %08X", am29000->r[206]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R207: sprintf(info->s, "R207: %08X", am29000->r[207]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R208: sprintf(info->s, "R208: %08X", am29000->r[208]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R209: sprintf(info->s, "R209: %08X", am29000->r[209]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R210: sprintf(info->s, "R210: %08X", am29000->r[210]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R211: sprintf(info->s, "R211: %08X", am29000->r[211]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R212: sprintf(info->s, "R212: %08X", am29000->r[212]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R213: sprintf(info->s, "R213: %08X", am29000->r[213]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R214: sprintf(info->s, "R214: %08X", am29000->r[214]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R215: sprintf(info->s, "R215: %08X", am29000->r[215]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R216: sprintf(info->s, "R216: %08X", am29000->r[216]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R217: sprintf(info->s, "R217: %08X", am29000->r[217]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R218: sprintf(info->s, "R218: %08X", am29000->r[218]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R219: sprintf(info->s, "R219: %08X", am29000->r[219]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R220: sprintf(info->s, "R220: %08X", am29000->r[220]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R221: sprintf(info->s, "R221: %08X", am29000->r[221]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R222: sprintf(info->s, "R222: %08X", am29000->r[222]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R223: sprintf(info->s, "R223: %08X", am29000->r[223]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R224: sprintf(info->s, "R224: %08X", am29000->r[224]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R225: sprintf(info->s, "R225: %08X", am29000->r[225]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R226: sprintf(info->s, "R226: %08X", am29000->r[226]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R227: sprintf(info->s, "R227: %08X", am29000->r[227]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R228: sprintf(info->s, "R228: %08X", am29000->r[228]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R229: sprintf(info->s, "R229: %08X", am29000->r[229]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R230: sprintf(info->s, "R230: %08X", am29000->r[230]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R231: sprintf(info->s, "R231: %08X", am29000->r[231]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R232: sprintf(info->s, "R232: %08X", am29000->r[232]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R233: sprintf(info->s, "R233: %08X", am29000->r[233]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R234: sprintf(info->s, "R234: %08X", am29000->r[234]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R235: sprintf(info->s, "R235: %08X", am29000->r[235]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R236: sprintf(info->s, "R236: %08X", am29000->r[236]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R237: sprintf(info->s, "R237: %08X", am29000->r[237]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R238: sprintf(info->s, "R238: %08X", am29000->r[238]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R239: sprintf(info->s, "R239: %08X", am29000->r[239]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R240: sprintf(info->s, "R240: %08X", am29000->r[240]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R241: sprintf(info->s, "R241: %08X", am29000->r[241]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R242: sprintf(info->s, "R242: %08X", am29000->r[242]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R243: sprintf(info->s, "R243: %08X", am29000->r[243]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R244: sprintf(info->s, "R244: %08X", am29000->r[244]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R245: sprintf(info->s, "R245: %08X", am29000->r[245]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R246: sprintf(info->s, "R246: %08X", am29000->r[246]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R247: sprintf(info->s, "R247: %08X", am29000->r[247]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R248: sprintf(info->s, "R248: %08X", am29000->r[248]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R249: sprintf(info->s, "R249: %08X", am29000->r[249]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R250: sprintf(info->s, "R250: %08X", am29000->r[250]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R251: sprintf(info->s, "R251: %08X", am29000->r[251]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R252: sprintf(info->s, "R252: %08X", am29000->r[252]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R253: sprintf(info->s, "R253: %08X", am29000->r[253]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R254: sprintf(info->s, "R254: %08X", am29000->r[254]); break;
+ case CPUINFO_STR_REGISTER + AM29000_R255: sprintf(info->s, "R255: %08X", am29000->r[255]); break;
}
}
diff --git a/src/emu/cpu/am29000/am29000.h b/src/emu/cpu/am29000/am29000.h
index 69e82382fed..8e234339fa9 100644
--- a/src/emu/cpu/am29000/am29000.h
+++ b/src/emu/cpu/am29000/am29000.h
@@ -246,7 +246,7 @@ enum
***************************************************************************/
enum
-{ SPR_VAB = 0,
+{ SPR_VAB = 0,
SPR_OPS = 1,
SPR_CPS = 2,
SPR_CFG = 3,
@@ -271,7 +271,7 @@ enum
SPR_CR = 135,
SPR_FPE = 160,
SPR_INTE = 161,
- SPR_FPS = 162,
+ SPR_FPS = 162,
};
@@ -290,34 +290,34 @@ enum
enum
{
- EXCEPTION_ILLEGAL_OPCODE = 0,
- EXCEPTION_UNALIGNED_ACCESS = 1,
- EXCEPTION_OUT_OF_RANGE = 2,
- EXCEPTION_COPRO_NOT_PRESENT = 3,
- EXCEPTION_COPRO_EXCEPTION = 4,
- EXCEPTION_PROTECTION_VIOLATION = 5,
- EXCEPTION_INST_ACCESS_VIOLATION = 6,
- EXCEPTION_DATA_ACCESS_VIOLATION = 7,
- EXCEPTION_USER_INST_TLB_MISS = 8,
- EXCEPTION_USER_DATA_TLB_MISS = 9,
- EXCEPTION_SUPER_INST_TLB_MISS = 10,
- EXCEPTION_SUPER_DATA_TLB_MISS = 11,
- EXCEPTION_INST_TLB_PROT_VIOLATION = 12,
- EXCEPTION_DATA_TLB_PROT_VIOLATION = 13,
- EXCEPTION_TIMER = 14,
- EXCEPTION_TRACE = 15,
- EXCEPTION_INTR0 = 16,
- EXCEPTION_INTR1 = 17,
- EXCEPTION_INTR2 = 18,
- EXCEPTION_INTR3 = 19,
- EXCEPTION_TRAP0 = 20,
- EXCEPTION_TRAP1 = 21,
- EXCEPTION_FLOATING_POINT_EXCEPTION = 22,
- EXCEPTION_MULTM = 30,
- EXCEPTION_MULTMU = 31,
- EXCEPTION_MULTIPLY = 32,
- EXCEPTION_DIVIDE = 33,
- EXCEPTION_MULTIPLU = 44, // TODO: FINISH ME
+ EXCEPTION_ILLEGAL_OPCODE = 0,
+ EXCEPTION_UNALIGNED_ACCESS = 1,
+ EXCEPTION_OUT_OF_RANGE = 2,
+ EXCEPTION_COPRO_NOT_PRESENT = 3,
+ EXCEPTION_COPRO_EXCEPTION = 4,
+ EXCEPTION_PROTECTION_VIOLATION = 5,
+ EXCEPTION_INST_ACCESS_VIOLATION = 6,
+ EXCEPTION_DATA_ACCESS_VIOLATION = 7,
+ EXCEPTION_USER_INST_TLB_MISS = 8,
+ EXCEPTION_USER_DATA_TLB_MISS = 9,
+ EXCEPTION_SUPER_INST_TLB_MISS = 10,
+ EXCEPTION_SUPER_DATA_TLB_MISS = 11,
+ EXCEPTION_INST_TLB_PROT_VIOLATION = 12,
+ EXCEPTION_DATA_TLB_PROT_VIOLATION = 13,
+ EXCEPTION_TIMER = 14,
+ EXCEPTION_TRACE = 15,
+ EXCEPTION_INTR0 = 16,
+ EXCEPTION_INTR1 = 17,
+ EXCEPTION_INTR2 = 18,
+ EXCEPTION_INTR3 = 19,
+ EXCEPTION_TRAP0 = 20,
+ EXCEPTION_TRAP1 = 21,
+ EXCEPTION_FLOATING_POINT_EXCEPTION = 22,
+ EXCEPTION_MULTM = 30,
+ EXCEPTION_MULTMU = 31,
+ EXCEPTION_MULTIPLY = 32,
+ EXCEPTION_DIVIDE = 33,
+ EXCEPTION_MULTIPLU = 44, // TODO: FINISH ME
};
@@ -325,96 +325,96 @@ enum
SPECIAL PURPOSE REGISTER FIELDS
***************************************************************************/
-#define PRL_AM29000 (0 << 3)
-#define PRL_AM29050 (1 << 3)
-#define PRL_REV_A (0)
-#define PRL_REV_B (1)
-#define PRL_REV_C (2)
-#define PRL_REV_D (3)
-
-#define PROCESSOR_REL_FIELD (PRL_AM29000 | PRL_REV_D)
-
-#define VAB_SHIFT (16)
-#define VAB_MASK (0xffff)
-
-#define CPS_CA (1 << 15)
-#define CPS_IP (1 << 14)
-#define CPS_TE (1 << 13)
-#define CPS_TP (1 << 12)
-#define CPS_TU (1 << 11)
-#define CPS_FZ (1 << 10)
-#define CPS_LK (1 << 9)
-#define CPS_RE (1 << 8)
-#define CPS_WM (1 << 7)
-#define CPS_PD (1 << 6)
-#define CPS_PI (1 << 5)
-#define CPS_SM (1 << 4)
-#define CPS_IM_SHIFT (2)
-#define CPS_IM_MASK (3)
-#define CPS_DI (1 << 1)
-#define CPS_DA (1 << 0)
-
-#define CFG_PRL_MASK (0xff)
-#define CFG_PRL_SHIFT (24)
-#define CFG_DW (1 << 5)
-#define CFG_VF (1 << 4)
-#define CFG_RV (1 << 3)
-#define CFG_BO (1 << 2)
-#define CFG_CP (1 << 1)
-#define CFG_CD (1 << 0)
-
-#define CHC_CE_CNTL_MASK (0xff)
-#define CHC_CE_CNTL_SHIFT (24)
-#define CHC_CR_MASK (0xff)
-#define CHC_CR_SHIFT (16)
-#define CHC_LS (1 << 15)
-#define CHC_ML (1 << 14)
-#define CHC_ST (1 << 13)
-#define CHC_LA (1 << 12)
-#define CHC_TF (1 << 11)
-#define CHC_TR_MASK (0xff)
-#define CHC_TR_SHIFT (2)
-#define CHC_NN (1 << 1)
-#define CHC_CV (1 << 0)
-
-#define RBP_MASK (0xffff)
-
-#define TCV_MASK (0x00ffffff)
-#define TCV_SHIFT (0)
-
-#define TMR_OV (1 << 26)
-#define TMR_IN (1 << 25)
-#define TMR_IE (1 << 24)
-#define TMR_TRV_MASK (0x00ffffff)
-#define TMR_TRV_SHIFT (0)
-
-#define PC_MASK (0xfffffffc)
-
-#define MMU_PS_MASK (3)
-#define MMU_PS_SHIFT (8)
-#define MMU_PID_MASK (0xff)
-#define MMU_PID_SHIFT (0)
-
-#define LRU_MASK (0x3f)
-#define LRU_SHIFT (1)
-
-#define ALU_DF_SHIFT (11)
-#define ALU_DF (1 << 11)
-#define ALU_V_SHIFT (10)
-#define ALU_V (1 << 10)
-#define ALU_N_SHIFT (9)
-#define ALU_N (1 << 9)
-#define ALU_Z_SHIFT (8)
-#define ALU_Z (1 << 8)
-#define ALU_C_SHIFT (7)
-#define ALU_C (1 << 7)
-#define ALU_BP_MASK (3)
-#define ALU_BP_SHIFT (5)
-#define ALU_FC_MASK (0x1f)
-#define ALU_FC_SHIFT (0)
-
-#define IPX_MASK (0xff)
-#define IPX_SHIFT (2)
+#define PRL_AM29000 (0 << 3)
+#define PRL_AM29050 (1 << 3)
+#define PRL_REV_A (0)
+#define PRL_REV_B (1)
+#define PRL_REV_C (2)
+#define PRL_REV_D (3)
+
+#define PROCESSOR_REL_FIELD (PRL_AM29000 | PRL_REV_D)
+
+#define VAB_SHIFT (16)
+#define VAB_MASK (0xffff)
+
+#define CPS_CA (1 << 15)
+#define CPS_IP (1 << 14)
+#define CPS_TE (1 << 13)
+#define CPS_TP (1 << 12)
+#define CPS_TU (1 << 11)
+#define CPS_FZ (1 << 10)
+#define CPS_LK (1 << 9)
+#define CPS_RE (1 << 8)
+#define CPS_WM (1 << 7)
+#define CPS_PD (1 << 6)
+#define CPS_PI (1 << 5)
+#define CPS_SM (1 << 4)
+#define CPS_IM_SHIFT (2)
+#define CPS_IM_MASK (3)
+#define CPS_DI (1 << 1)
+#define CPS_DA (1 << 0)
+
+#define CFG_PRL_MASK (0xff)
+#define CFG_PRL_SHIFT (24)
+#define CFG_DW (1 << 5)
+#define CFG_VF (1 << 4)
+#define CFG_RV (1 << 3)
+#define CFG_BO (1 << 2)
+#define CFG_CP (1 << 1)
+#define CFG_CD (1 << 0)
+
+#define CHC_CE_CNTL_MASK (0xff)
+#define CHC_CE_CNTL_SHIFT (24)
+#define CHC_CR_MASK (0xff)
+#define CHC_CR_SHIFT (16)
+#define CHC_LS (1 << 15)
+#define CHC_ML (1 << 14)
+#define CHC_ST (1 << 13)
+#define CHC_LA (1 << 12)
+#define CHC_TF (1 << 11)
+#define CHC_TR_MASK (0xff)
+#define CHC_TR_SHIFT (2)
+#define CHC_NN (1 << 1)
+#define CHC_CV (1 << 0)
+
+#define RBP_MASK (0xffff)
+
+#define TCV_MASK (0x00ffffff)
+#define TCV_SHIFT (0)
+
+#define TMR_OV (1 << 26)
+#define TMR_IN (1 << 25)
+#define TMR_IE (1 << 24)
+#define TMR_TRV_MASK (0x00ffffff)
+#define TMR_TRV_SHIFT (0)
+
+#define PC_MASK (0xfffffffc)
+
+#define MMU_PS_MASK (3)
+#define MMU_PS_SHIFT (8)
+#define MMU_PID_MASK (0xff)
+#define MMU_PID_SHIFT (0)
+
+#define LRU_MASK (0x3f)
+#define LRU_SHIFT (1)
+
+#define ALU_DF_SHIFT (11)
+#define ALU_DF (1 << 11)
+#define ALU_V_SHIFT (10)
+#define ALU_V (1 << 10)
+#define ALU_N_SHIFT (9)
+#define ALU_N (1 << 9)
+#define ALU_Z_SHIFT (8)
+#define ALU_Z (1 << 8)
+#define ALU_C_SHIFT (7)
+#define ALU_C (1 << 7)
+#define ALU_BP_MASK (3)
+#define ALU_BP_SHIFT (5)
+#define ALU_FC_MASK (0x1f)
+#define ALU_FC_SHIFT (0)
+
+#define IPX_MASK (0xff)
+#define IPX_SHIFT (2)
@@ -423,10 +423,10 @@ enum
INTERRUPT CONSTANTS
***************************************************************************/
-#define AM29000_INTR0 0
-#define AM29000_INTR1 1
-#define AM29000_INTR2 2
-#define AM29000_INTR3 3
+#define AM29000_INTR0 0
+#define AM29000_INTR1 1
+#define AM29000_INTR2 2
+#define AM29000_INTR3 3
/***************************************************************************
diff --git a/src/emu/cpu/am29000/am29dasm.c b/src/emu/cpu/am29000/am29dasm.c
index 270cc340a3d..a5f4128e147 100644
--- a/src/emu/cpu/am29000/am29dasm.c
+++ b/src/emu/cpu/am29000/am29dasm.c
@@ -14,20 +14,20 @@
DEFINES AND MACROS
***************************************************************************/
-#define OP_M_BIT (1 << 24)
-#define OP_RC ((op >> 16) & 0xff)
-#define OP_RA ((op >> 8) & 0xff)
-#define OP_RB (op & 0xff)
-#define OP_I8 (op & 0xff)
-#define OP_SA ((op >> 8) & 0xff)
-#define OP_I16 (((op >> 8) & 0xff00) | (op & 0xff))
-#define OP_IJMP (OP_I16 << 2)
-#define OP_VN ((op >> 16) & 0xff)
+#define OP_M_BIT (1 << 24)
+#define OP_RC ((op >> 16) & 0xff)
+#define OP_RA ((op >> 8) & 0xff)
+#define OP_RB (op & 0xff)
+#define OP_I8 (op & 0xff)
+#define OP_SA ((op >> 8) & 0xff)
+#define OP_I16 (((op >> 8) & 0xff00) | (op & 0xff))
+#define OP_IJMP (OP_I16 << 2)
+#define OP_VN ((op >> 16) & 0xff)
-#define OP_CE ((op >> 23) & 1)
-#define OP_CNTL ((op >> 16) & 0x7f)
+#define OP_CE ((op >> 23) & 1)
+#define OP_CNTL ((op >> 16) & 0x7f)
-#define OP_SJMP ((INT32)(INT16)OP_I16 << 2)
+#define OP_SJMP ((INT32)(INT16)OP_I16 << 2)
/***************************************************************************
@@ -100,12 +100,12 @@ static const char *dasm_type6(UINT32 op)
return buf;
}
-#define TYPE_1 dasm_type1(op)
-#define TYPE_2 dasm_type2(op)
-#define TYPE_3 dasm_type3(op)
-#define TYPE_4 dasm_type4(op, pc)
-#define TYPE_5 dasm_type5(op)
-#define TYPE_6 dasm_type6(op)
+#define TYPE_1 dasm_type1(op)
+#define TYPE_2 dasm_type2(op)
+#define TYPE_3 dasm_type3(op)
+#define TYPE_4 dasm_type4(op, pc)
+#define TYPE_5 dasm_type5(op)
+#define TYPE_6 dasm_type6(op)
static const char* get_spr(int spid)
@@ -150,108 +150,108 @@ CPU_DISASSEMBLE( am29000 )
switch (op >> 24)
{
- case 0x01: sprintf(buffer, "constn %s", TYPE_3); break;
- case 0x02: sprintf(buffer, "consth %s", TYPE_3); break;
- case 0x03: sprintf(buffer, "const %s", TYPE_3); break;
- case 0x04: sprintf(buffer, "mtsrim %s, $%.4x", get_spr(OP_SA), OP_I16); break;
- case 0x06: case 0x07: sprintf(buffer, "loadl %s", TYPE_6); break;
- case 0x08: sprintf(buffer, "clz r%d, %d", OP_RC, OP_RB); break;
- case 0x09: sprintf(buffer, "clz %d, %.2x", OP_RC, OP_I8); break;
- case 0x0a: case 0x0b: sprintf(buffer, "exbyte %s", TYPE_1); break;
- case 0x0c: case 0x0d: sprintf(buffer, "inbyte %s", TYPE_1); break;
- case 0x0e: case 0x0f: sprintf(buffer, "storel %s", TYPE_6); break;
- case 0x10: case 0x11: sprintf(buffer, "adds %s", TYPE_1); break;
- case 0x12: case 0x13: sprintf(buffer, "addu %s", TYPE_1); break;
- case 0x14: case 0x15: sprintf(buffer, "add %s", TYPE_1); break;
- case 0x16: case 0x17: sprintf(buffer, "load %s", TYPE_6); break;
- case 0x18: case 0x19: sprintf(buffer, "addcs %s", TYPE_1); break;
- case 0x1a: case 0x1b: sprintf(buffer, "addcu %s", TYPE_1); break;
- case 0x1c: case 0x1d: sprintf(buffer, "addc %s", TYPE_1); break;
- case 0x1e: case 0x1f: sprintf(buffer, "store %s", TYPE_6); break;
- case 0x20: case 0x21: sprintf(buffer, "subs %s", TYPE_1); break;
- case 0x22: case 0x23: sprintf(buffer, "subu %s", TYPE_1); break;
- case 0x24: case 0x25: sprintf(buffer, "sub %s", TYPE_1); break;
- case 0x26: case 0x27: sprintf(buffer, "loadset %s", TYPE_6); break;
- case 0x28: case 0x29: sprintf(buffer, "subcs %s", TYPE_1); break;
- case 0x2a: case 0x2b: sprintf(buffer, "subcu %s", TYPE_1); break;
- case 0x2c: case 0x2d: sprintf(buffer, "subc %s", TYPE_1); break;
- case 0x2e: case 0x2f: sprintf(buffer, "cpbyte %s", TYPE_1); break;
- case 0x30: case 0x31: sprintf(buffer, "subrs %s", TYPE_1); break;
- case 0x32: case 0x33: sprintf(buffer, "subru %s", TYPE_1); break;
- case 0x34: case 0x35: sprintf(buffer, "subr %s", TYPE_1); break;
- case 0x36: case 0x37: sprintf(buffer, "loadm %s", TYPE_6); break;
- case 0x38: case 0x39: sprintf(buffer, "subrcs %s", TYPE_1); break;
- case 0x3a: case 0x3b: sprintf(buffer, "subrcu %s", TYPE_1); break;
- case 0x3c: case 0x3d: sprintf(buffer, "subrc %s", TYPE_1); break;
- case 0x3e: case 0x3f: sprintf(buffer, "storem %s", TYPE_6); break;
- case 0x40: case 0x41: sprintf(buffer, "cplt %s", TYPE_1); break;
- case 0x42: case 0x43: sprintf(buffer, "cpltu %s", TYPE_1); break;
- case 0x44: case 0x45: sprintf(buffer, "cple %s", TYPE_1); break;
- case 0x46: case 0x47: sprintf(buffer, "cpleu %s", TYPE_1); break;
- case 0x48: case 0x49: sprintf(buffer, "cpgt %s", TYPE_1); break;
- case 0x4a: case 0x4b: sprintf(buffer, "cpgtu %s", TYPE_1); break;
- case 0x4c: case 0x4d: sprintf(buffer, "cpge %s", TYPE_1); break;
- case 0x4e: case 0x4f: sprintf(buffer, "cpgeu %s", TYPE_1); break;
- case 0x50: case 0x51: sprintf(buffer, "aslt %s", TYPE_5); break;
- case 0x52: case 0x53: sprintf(buffer, "asltu %s", TYPE_5); break;
- case 0x54: case 0x55: sprintf(buffer, "asle %s", TYPE_5); break;
- case 0x56: case 0x57: sprintf(buffer, "asleu %s", TYPE_5); break;
- case 0x58: case 0x59: sprintf(buffer, "asgt %s", TYPE_5); break;
- case 0x5a: case 0x5b: sprintf(buffer, "asgtu %s", TYPE_5); break;
- case 0x5c: case 0x5d: sprintf(buffer, "asge %s", TYPE_5); break;
- case 0x5e: case 0x5f: sprintf(buffer, "asgeu %s", TYPE_5); break;
- case 0x60: case 0x61: sprintf(buffer, "cpeq %s", TYPE_1); break;
- case 0x62: case 0x63: sprintf(buffer, "cpneq %s", TYPE_1); break;
- case 0x64: case 0x65: sprintf(buffer, "mul %s", TYPE_1); break;
- case 0x66: case 0x67: sprintf(buffer, "mull %s", TYPE_1); break;
- case 0x68: sprintf(buffer, "div0 r%d, r%d", OP_RC, OP_RB); break;
- case 0x69: sprintf(buffer, "div0 r%d, %.2x", OP_RC, OP_I8); break;
- case 0x6a: case 0x6b: sprintf(buffer, "div %s", TYPE_1); break;
- case 0x6c: case 0x6d: sprintf(buffer, "divl %s", TYPE_1); break;
- case 0x6e: case 0x6f: sprintf(buffer, "divrem %s", TYPE_1); break;
- case 0x70: case 0x71: sprintf(buffer, "aseq %s", TYPE_5); break;
- case 0x72: case 0x73: sprintf(buffer, "asneq %s", TYPE_5); break;
- case 0x74: case 0x75: sprintf(buffer, "mulu %s", TYPE_1); break;
- case 0x78: case 0x79: sprintf(buffer, "inhw %s", TYPE_1); break;
- case 0x7a: case 0x7b: sprintf(buffer, "extract %s", TYPE_1); break;
- case 0x7c: case 0x7d: sprintf(buffer, "exhw %s", TYPE_1); break;
- case 0x7e: sprintf(buffer, "exhws %s", TYPE_1); break;
- case 0x80: case 0x81: sprintf(buffer, "sll %s", TYPE_1); break;
- case 0x82: case 0x83: sprintf(buffer, "srl %s", TYPE_1); break;
- case 0x86: case 0x87: sprintf(buffer, "sra %s", TYPE_1); break;
- case 0x88: sprintf(buffer, "iret"); break;
- case 0x89: sprintf(buffer, "halt"); break;
- case 0x8c: sprintf(buffer, "iretinv"); break;
- case 0x90: case 0x91: sprintf(buffer, "and %s", TYPE_1); break;
- case 0x92: case 0x93: sprintf(buffer, "or %s", TYPE_1); break;
- case 0x94: case 0x95: sprintf(buffer, "xor %s", TYPE_1); break;
- case 0x96: case 0x97: sprintf(buffer, "xnor %s", TYPE_1); break;
- case 0x98: case 0x99: sprintf(buffer, "nor %s", TYPE_1); break;
- case 0x9a: case 0x9b: sprintf(buffer, "nand %s", TYPE_1); break;
- case 0x9c: case 0x9d: sprintf(buffer, "andn %s", TYPE_1); break;
- case 0x9e: sprintf(buffer, "setip %s", TYPE_2); break;
- case 0x9f: sprintf(buffer, "inv"); break;
- case 0xa0: sprintf(buffer, "jmp $%.4x", pc + OP_SJMP); break;
- case 0xa1: sprintf(buffer, "jmp $%.4x", OP_IJMP); break;
- case 0xa4: case 0xa5: sprintf(buffer, "jmpf %s", TYPE_4); break;
- case 0xa8: case 0xa9: sprintf(buffer, "call %s", TYPE_4); break;
- case 0xac: case 0xad: sprintf(buffer, "jmpt %s", TYPE_4); break;
- case 0xb4: case 0xb5: sprintf(buffer, "jmpfdec %s", TYPE_4); break;
- case 0xb6: sprintf(buffer, "mftlb r%d, r%d", OP_RC, OP_RA); break;
- case 0xbe: sprintf(buffer, "mttlb r%d, r%d", OP_RA, OP_RB); break;
- case 0xc0: sprintf(buffer, "jmpi r%d", OP_RB); break;
- case 0xc4: sprintf(buffer, "jmpfi r%d, r%d", OP_RA, OP_RB); break;
- case 0xc6: sprintf(buffer, "mfsr r%d, %s", OP_RC, get_spr(OP_SA)); break;
- case 0xc8: sprintf(buffer, "calli r%d, r%d", OP_RA, OP_RB); break;
- case 0xcc: sprintf(buffer, "jmpti r%d, r%d", OP_RA, OP_RB); break;
- case 0xce: sprintf(buffer, "mtsr %s, r%d", get_spr(OP_SA), OP_RB); break;
- case 0xd7: sprintf(buffer, "emulate %s", TYPE_5); break;
- case 0xde: sprintf(buffer, "multm %s", TYPE_2); break;
- case 0xdf: sprintf(buffer, "multmu %s", TYPE_2); break;
-
- case 0xe0: sprintf(buffer, "multiply %s", TYPE_2); break;
- case 0xe1: sprintf(buffer, "divide %s", TYPE_2); break;
- default: sprintf(buffer, "??????"); break;
+ case 0x01: sprintf(buffer, "constn %s", TYPE_3); break;
+ case 0x02: sprintf(buffer, "consth %s", TYPE_3); break;
+ case 0x03: sprintf(buffer, "const %s", TYPE_3); break;
+ case 0x04: sprintf(buffer, "mtsrim %s, $%.4x", get_spr(OP_SA), OP_I16); break;
+ case 0x06: case 0x07: sprintf(buffer, "loadl %s", TYPE_6); break;
+ case 0x08: sprintf(buffer, "clz r%d, %d", OP_RC, OP_RB); break;
+ case 0x09: sprintf(buffer, "clz %d, %.2x", OP_RC, OP_I8); break;
+ case 0x0a: case 0x0b: sprintf(buffer, "exbyte %s", TYPE_1); break;
+ case 0x0c: case 0x0d: sprintf(buffer, "inbyte %s", TYPE_1); break;
+ case 0x0e: case 0x0f: sprintf(buffer, "storel %s", TYPE_6); break;
+ case 0x10: case 0x11: sprintf(buffer, "adds %s", TYPE_1); break;
+ case 0x12: case 0x13: sprintf(buffer, "addu %s", TYPE_1); break;
+ case 0x14: case 0x15: sprintf(buffer, "add %s", TYPE_1); break;
+ case 0x16: case 0x17: sprintf(buffer, "load %s", TYPE_6); break;
+ case 0x18: case 0x19: sprintf(buffer, "addcs %s", TYPE_1); break;
+ case 0x1a: case 0x1b: sprintf(buffer, "addcu %s", TYPE_1); break;
+ case 0x1c: case 0x1d: sprintf(buffer, "addc %s", TYPE_1); break;
+ case 0x1e: case 0x1f: sprintf(buffer, "store %s", TYPE_6); break;
+ case 0x20: case 0x21: sprintf(buffer, "subs %s", TYPE_1); break;
+ case 0x22: case 0x23: sprintf(buffer, "subu %s", TYPE_1); break;
+ case 0x24: case 0x25: sprintf(buffer, "sub %s", TYPE_1); break;
+ case 0x26: case 0x27: sprintf(buffer, "loadset %s", TYPE_6); break;
+ case 0x28: case 0x29: sprintf(buffer, "subcs %s", TYPE_1); break;
+ case 0x2a: case 0x2b: sprintf(buffer, "subcu %s", TYPE_1); break;
+ case 0x2c: case 0x2d: sprintf(buffer, "subc %s", TYPE_1); break;
+ case 0x2e: case 0x2f: sprintf(buffer, "cpbyte %s", TYPE_1); break;
+ case 0x30: case 0x31: sprintf(buffer, "subrs %s", TYPE_1); break;
+ case 0x32: case 0x33: sprintf(buffer, "subru %s", TYPE_1); break;
+ case 0x34: case 0x35: sprintf(buffer, "subr %s", TYPE_1); break;
+ case 0x36: case 0x37: sprintf(buffer, "loadm %s", TYPE_6); break;
+ case 0x38: case 0x39: sprintf(buffer, "subrcs %s", TYPE_1); break;
+ case 0x3a: case 0x3b: sprintf(buffer, "subrcu %s", TYPE_1); break;
+ case 0x3c: case 0x3d: sprintf(buffer, "subrc %s", TYPE_1); break;
+ case 0x3e: case 0x3f: sprintf(buffer, "storem %s", TYPE_6); break;
+ case 0x40: case 0x41: sprintf(buffer, "cplt %s", TYPE_1); break;
+ case 0x42: case 0x43: sprintf(buffer, "cpltu %s", TYPE_1); break;
+ case 0x44: case 0x45: sprintf(buffer, "cple %s", TYPE_1); break;
+ case 0x46: case 0x47: sprintf(buffer, "cpleu %s", TYPE_1); break;
+ case 0x48: case 0x49: sprintf(buffer, "cpgt %s", TYPE_1); break;
+ case 0x4a: case 0x4b: sprintf(buffer, "cpgtu %s", TYPE_1); break;
+ case 0x4c: case 0x4d: sprintf(buffer, "cpge %s", TYPE_1); break;
+ case 0x4e: case 0x4f: sprintf(buffer, "cpgeu %s", TYPE_1); break;
+ case 0x50: case 0x51: sprintf(buffer, "aslt %s", TYPE_5); break;
+ case 0x52: case 0x53: sprintf(buffer, "asltu %s", TYPE_5); break;
+ case 0x54: case 0x55: sprintf(buffer, "asle %s", TYPE_5); break;
+ case 0x56: case 0x57: sprintf(buffer, "asleu %s", TYPE_5); break;
+ case 0x58: case 0x59: sprintf(buffer, "asgt %s", TYPE_5); break;
+ case 0x5a: case 0x5b: sprintf(buffer, "asgtu %s", TYPE_5); break;
+ case 0x5c: case 0x5d: sprintf(buffer, "asge %s", TYPE_5); break;
+ case 0x5e: case 0x5f: sprintf(buffer, "asgeu %s", TYPE_5); break;
+ case 0x60: case 0x61: sprintf(buffer, "cpeq %s", TYPE_1); break;
+ case 0x62: case 0x63: sprintf(buffer, "cpneq %s", TYPE_1); break;
+ case 0x64: case 0x65: sprintf(buffer, "mul %s", TYPE_1); break;
+ case 0x66: case 0x67: sprintf(buffer, "mull %s", TYPE_1); break;
+ case 0x68: sprintf(buffer, "div0 r%d, r%d", OP_RC, OP_RB); break;
+ case 0x69: sprintf(buffer, "div0 r%d, %.2x", OP_RC, OP_I8); break;
+ case 0x6a: case 0x6b: sprintf(buffer, "div %s", TYPE_1); break;
+ case 0x6c: case 0x6d: sprintf(buffer, "divl %s", TYPE_1); break;
+ case 0x6e: case 0x6f: sprintf(buffer, "divrem %s", TYPE_1); break;
+ case 0x70: case 0x71: sprintf(buffer, "aseq %s", TYPE_5); break;
+ case 0x72: case 0x73: sprintf(buffer, "asneq %s", TYPE_5); break;
+ case 0x74: case 0x75: sprintf(buffer, "mulu %s", TYPE_1); break;
+ case 0x78: case 0x79: sprintf(buffer, "inhw %s", TYPE_1); break;
+ case 0x7a: case 0x7b: sprintf(buffer, "extract %s", TYPE_1); break;
+ case 0x7c: case 0x7d: sprintf(buffer, "exhw %s", TYPE_1); break;
+ case 0x7e: sprintf(buffer, "exhws %s", TYPE_1); break;
+ case 0x80: case 0x81: sprintf(buffer, "sll %s", TYPE_1); break;
+ case 0x82: case 0x83: sprintf(buffer, "srl %s", TYPE_1); break;
+ case 0x86: case 0x87: sprintf(buffer, "sra %s", TYPE_1); break;
+ case 0x88: sprintf(buffer, "iret"); break;
+ case 0x89: sprintf(buffer, "halt"); break;
+ case 0x8c: sprintf(buffer, "iretinv"); break;
+ case 0x90: case 0x91: sprintf(buffer, "and %s", TYPE_1); break;
+ case 0x92: case 0x93: sprintf(buffer, "or %s", TYPE_1); break;
+ case 0x94: case 0x95: sprintf(buffer, "xor %s", TYPE_1); break;
+ case 0x96: case 0x97: sprintf(buffer, "xnor %s", TYPE_1); break;
+ case 0x98: case 0x99: sprintf(buffer, "nor %s", TYPE_1); break;
+ case 0x9a: case 0x9b: sprintf(buffer, "nand %s", TYPE_1); break;
+ case 0x9c: case 0x9d: sprintf(buffer, "andn %s", TYPE_1); break;
+ case 0x9e: sprintf(buffer, "setip %s", TYPE_2); break;
+ case 0x9f: sprintf(buffer, "inv"); break;
+ case 0xa0: sprintf(buffer, "jmp $%.4x", pc + OP_SJMP); break;
+ case 0xa1: sprintf(buffer, "jmp $%.4x", OP_IJMP); break;
+ case 0xa4: case 0xa5: sprintf(buffer, "jmpf %s", TYPE_4); break;
+ case 0xa8: case 0xa9: sprintf(buffer, "call %s", TYPE_4); break;
+ case 0xac: case 0xad: sprintf(buffer, "jmpt %s", TYPE_4); break;
+ case 0xb4: case 0xb5: sprintf(buffer, "jmpfdec %s", TYPE_4); break;
+ case 0xb6: sprintf(buffer, "mftlb r%d, r%d", OP_RC, OP_RA); break;
+ case 0xbe: sprintf(buffer, "mttlb r%d, r%d", OP_RA, OP_RB); break;
+ case 0xc0: sprintf(buffer, "jmpi r%d", OP_RB); break;
+ case 0xc4: sprintf(buffer, "jmpfi r%d, r%d", OP_RA, OP_RB); break;
+ case 0xc6: sprintf(buffer, "mfsr r%d, %s", OP_RC, get_spr(OP_SA)); break;
+ case 0xc8: sprintf(buffer, "calli r%d, r%d", OP_RA, OP_RB); break;
+ case 0xcc: sprintf(buffer, "jmpti r%d, r%d", OP_RA, OP_RB); break;
+ case 0xce: sprintf(buffer, "mtsr %s, r%d", get_spr(OP_SA), OP_RB); break;
+ case 0xd7: sprintf(buffer, "emulate %s", TYPE_5); break;
+ case 0xde: sprintf(buffer, "multm %s", TYPE_2); break;
+ case 0xdf: sprintf(buffer, "multmu %s", TYPE_2); break;
+
+ case 0xe0: sprintf(buffer, "multiply %s", TYPE_2); break;
+ case 0xe1: sprintf(buffer, "divide %s", TYPE_2); break;
+ default: sprintf(buffer, "??????"); break;
}
return 4 | flags | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/am29000/am29ops.h b/src/emu/cpu/am29000/am29ops.h
index d496bbb63e2..49a75fe7b91 100644
--- a/src/emu/cpu/am29000/am29ops.h
+++ b/src/emu/cpu/am29000/am29ops.h
@@ -9,52 +9,52 @@
DEFINES
***************************************************************************/
-#define IFLAG_ILLEGAL (1 << 0)
-#define IFLAG_SUPERVISOR_ONLY (1 << 1)
-#define IFLAG_RA_PRESENT (1 << 2)
-#define IFLAG_RB_PRESENT (1 << 3)
-#define IFLAG_RC_PRESENT (1 << 4)
-
-#define IFLAG_SPR_ACCESS (1 << 6)
-#define IFLAG_MEMORY_ACCESS (1 << 8)
-#define IFLAG_CONTROL (1 << 9)
-
-
-#define GET_RA_VAL (am29000->r[RA])
-#define GET_RB_VAL (am29000->r[RB])
-
-#define RA (get_abs_reg(am29000, am29000->exec_ir >> 8, am29000->ipa))
-#define RB (get_abs_reg(am29000, am29000->exec_ir >> 0, am29000->ipb))
-#define RC (get_abs_reg(am29000, am29000->exec_ir >> 16, am29000->ipc))
-
-#define INST_SA ((am29000->exec_ir >> 8) & 0xff)
-#define INST_VN ((am29000->exec_ir >> 16) & 0xff)
-#define INST_M_BIT (am29000->exec_ir & (1 << 24))
-#define INST_CE_BIT (am29000->exec_ir & (1 << 23))
-#define INST_AS_BIT (am29000->exec_ir & (1 << 22))
-#define INST_PA_BIT (am29000->exec_ir & (1 << 21))
-#define INST_SB_BIT (am29000->exec_ir & (1 << 20))
-#define INST_UA_BIT (am29000->exec_ir & (1 << 19))
-#define INST_OPT_MASK (7)
-#define INST_OPT_SHIFT (16)
-#define INST_OPT_FIELD (((am29000->exec_ir) >> INST_OPT_SHIFT) & INST_OPT_MASK)
-#define INST_CNTL_MASK (0x7f)
-#define INST_CNTL_SHIFT (16)
-
-#define I8 (am29000->exec_ir & 0xff)
-#define I16 (((am29000->exec_ir >> 8) & 0xff00) | (am29000->exec_ir & 0xff))
-#define I16_ZEX ((UINT32)(I16))
-#define I16_SEX ((INT32)(INT16)I16)
-#define I16_OEX (0xffff0000 | I16)
-
-#define JMP_ZEX (I16 << 2)
-#define JMP_SEX ((INT32)(INT16)(((am29000->exec_ir >> 8) & 0xff00) | (am29000->exec_ir & 0xff)) << 2)
-
-#define BOOLEAN_MASK (1 << 31)
-#define BOOLEAN_TRUE (1 << 31)
-#define BOOLEAN_FALSE (0)
-
-#define UNHANDLED_OP fatalerror("Am29000: Unhandled inst %s at %x\n", __FUNCTION__, am29000->exec_pc);
+#define IFLAG_ILLEGAL (1 << 0)
+#define IFLAG_SUPERVISOR_ONLY (1 << 1)
+#define IFLAG_RA_PRESENT (1 << 2)
+#define IFLAG_RB_PRESENT (1 << 3)
+#define IFLAG_RC_PRESENT (1 << 4)
+
+#define IFLAG_SPR_ACCESS (1 << 6)
+#define IFLAG_MEMORY_ACCESS (1 << 8)
+#define IFLAG_CONTROL (1 << 9)
+
+
+#define GET_RA_VAL (am29000->r[RA])
+#define GET_RB_VAL (am29000->r[RB])
+
+#define RA (get_abs_reg(am29000, am29000->exec_ir >> 8, am29000->ipa))
+#define RB (get_abs_reg(am29000, am29000->exec_ir >> 0, am29000->ipb))
+#define RC (get_abs_reg(am29000, am29000->exec_ir >> 16, am29000->ipc))
+
+#define INST_SA ((am29000->exec_ir >> 8) & 0xff)
+#define INST_VN ((am29000->exec_ir >> 16) & 0xff)
+#define INST_M_BIT (am29000->exec_ir & (1 << 24))
+#define INST_CE_BIT (am29000->exec_ir & (1 << 23))
+#define INST_AS_BIT (am29000->exec_ir & (1 << 22))
+#define INST_PA_BIT (am29000->exec_ir & (1 << 21))
+#define INST_SB_BIT (am29000->exec_ir & (1 << 20))
+#define INST_UA_BIT (am29000->exec_ir & (1 << 19))
+#define INST_OPT_MASK (7)
+#define INST_OPT_SHIFT (16)
+#define INST_OPT_FIELD (((am29000->exec_ir) >> INST_OPT_SHIFT) & INST_OPT_MASK)
+#define INST_CNTL_MASK (0x7f)
+#define INST_CNTL_SHIFT (16)
+
+#define I8 (am29000->exec_ir & 0xff)
+#define I16 (((am29000->exec_ir >> 8) & 0xff00) | (am29000->exec_ir & 0xff))
+#define I16_ZEX ((UINT32)(I16))
+#define I16_SEX ((INT32)(INT16)I16)
+#define I16_OEX (0xffff0000 | I16)
+
+#define JMP_ZEX (I16 << 2)
+#define JMP_SEX ((INT32)(INT16)(((am29000->exec_ir >> 8) & 0xff00) | (am29000->exec_ir & 0xff)) << 2)
+
+#define BOOLEAN_MASK (1 << 31)
+#define BOOLEAN_TRUE (1 << 31)
+#define BOOLEAN_FALSE (0)
+
+#define UNHANDLED_OP fatalerror("Am29000: Unhandled inst %s at %x\n", __FUNCTION__, am29000->exec_pc);
/***************************************************************************
@@ -72,29 +72,29 @@ struct op_info
ALU FLAG CALCULATION
***************************************************************************/
-#define SET_ALU_Z(r) am29000->alu &= ~ALU_Z; \
+#define SET_ALU_Z(r) am29000->alu &= ~ALU_Z; \
am29000->alu |= (r == 0) << ALU_Z_SHIFT;
-#define SET_ALU_N(r) am29000->alu &= ~ALU_N; \
+#define SET_ALU_N(r) am29000->alu &= ~ALU_N; \
am29000->alu |= ((UINT32)r & 0x80000000) >> (31 - ALU_N_SHIFT);
-#define CALC_C_ADD(r, a) ((UINT32)(r) < (UINT32)(a))
+#define CALC_C_ADD(r, a) ((UINT32)(r) < (UINT32)(a))
-#define SET_ALU_C_ADD(r, a) am29000->alu &= ~ALU_C; \
+#define SET_ALU_C_ADD(r, a) am29000->alu &= ~ALU_C; \
am29000->alu |= CALC_C_ADD(r, a) << ALU_C_SHIFT;
-#define CALC_C_SUB(a, b) (!((UINT32)(a) < (UINT32)(b)))
+#define CALC_C_SUB(a, b) (!((UINT32)(a) < (UINT32)(b)))
-#define SET_ALU_C_SUB(a, b) am29000->alu &= ~ALU_C; \
+#define SET_ALU_C_SUB(a, b) am29000->alu &= ~ALU_C; \
am29000->alu |= CALC_C_SUB(a, b) << ALU_C_SHIFT;
-#define SET_ALU_V_ADD(r, a, b) am29000->alu &= ~ALU_V; \
+#define SET_ALU_V_ADD(r, a, b) am29000->alu &= ~ALU_V; \
am29000->alu |= (((INT32)(~((a) ^ (b)) & ((a) ^ (r))) < 0)) << ALU_V_SHIFT;
-#define SET_ALU_V_SUB(r, a, b) am29000->alu &= ~ALU_V; \
+#define SET_ALU_V_SUB(r, a, b) am29000->alu &= ~ALU_V; \
am29000->alu |= ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0) << ALU_V_SHIFT;
-#define GET_CARRY ((am29000->alu >> ALU_C_SHIFT) & 1)
+#define GET_CARRY ((am29000->alu >> ALU_C_SHIFT) & 1)
@@ -104,32 +104,32 @@ static UINT32 read_spr(am29000_state *am29000, UINT32 idx)
switch (idx)
{
- case SPR_VAB: val = am29000->vab; break;
- case SPR_OPS: val = am29000->ops; break;
- case SPR_CPS: val = am29000->cps; break;
- case SPR_CFG: val = am29000->cfg; break;
- case SPR_CHA: val = am29000->cha; break;
- case SPR_CHD: val = am29000->chd; break;
- case SPR_CHC: val = am29000->chc; break;
- case SPR_RBP: val = am29000->rbp; break;
- case SPR_TMC: val = am29000->tmc; break;
- case SPR_TMR: val = am29000->tmr; break;
- case SPR_PC0: val = am29000->pc0; break;
- case SPR_PC1: val = am29000->pc1; break;
- case SPR_PC2: val = am29000->pc2; break;
- case SPR_MMU: val = am29000->mmu; break;
- case SPR_LRU: val = am29000->lru; break;
- case SPR_IPC: val = am29000->ipc; break;
- case SPR_IPA: val = am29000->ipa; break;
- case SPR_IPB: val = am29000->ipb; break;
- case SPR_Q: val = am29000->q; break;
- case SPR_ALU: val = am29000->alu; break;
- case SPR_BP: val = GET_ALU_BP; break;
- case SPR_FC: val = GET_ALU_FC; break;
- case SPR_CR: val = GET_CHC_CR; break;
- case SPR_FPE: val = am29000->fpe; break;
- case SPR_INTE: val = am29000->inte; break;
- case SPR_FPS: val = am29000->fps; break;
+ case SPR_VAB: val = am29000->vab; break;
+ case SPR_OPS: val = am29000->ops; break;
+ case SPR_CPS: val = am29000->cps; break;
+ case SPR_CFG: val = am29000->cfg; break;
+ case SPR_CHA: val = am29000->cha; break;
+ case SPR_CHD: val = am29000->chd; break;
+ case SPR_CHC: val = am29000->chc; break;
+ case SPR_RBP: val = am29000->rbp; break;
+ case SPR_TMC: val = am29000->tmc; break;
+ case SPR_TMR: val = am29000->tmr; break;
+ case SPR_PC0: val = am29000->pc0; break;
+ case SPR_PC1: val = am29000->pc1; break;
+ case SPR_PC2: val = am29000->pc2; break;
+ case SPR_MMU: val = am29000->mmu; break;
+ case SPR_LRU: val = am29000->lru; break;
+ case SPR_IPC: val = am29000->ipc; break;
+ case SPR_IPA: val = am29000->ipa; break;
+ case SPR_IPB: val = am29000->ipb; break;
+ case SPR_Q: val = am29000->q; break;
+ case SPR_ALU: val = am29000->alu; break;
+ case SPR_BP: val = GET_ALU_BP; break;
+ case SPR_FC: val = GET_ALU_FC; break;
+ case SPR_CR: val = GET_CHC_CR; break;
+ case SPR_FPE: val = am29000->fpe; break;
+ case SPR_INTE: val = am29000->inte; break;
+ case SPR_FPS: val = am29000->fps; break;
default:
logerror("Unknown SPR read (%d)\n", idx);
}
@@ -142,56 +142,56 @@ static void write_spr(am29000_state *am29000, UINT32 idx, UINT32 val)
{
switch (idx)
{
- case SPR_VAB: am29000->vab = val & (VAB_MASK << VAB_SHIFT);
+ case SPR_VAB: am29000->vab = val & (VAB_MASK << VAB_SHIFT);
break;
- case SPR_OPS: am29000->ops = val & (CPS_CA | CPS_IP | CPS_TE | CPS_TP | CPS_TU | CPS_FZ | CPS_LK | CPS_RE |
+ case SPR_OPS: am29000->ops = val & (CPS_CA | CPS_IP | CPS_TE | CPS_TP | CPS_TU | CPS_FZ | CPS_LK | CPS_RE |
CPS_WM | CPS_PD | CPS_PI | CPS_SM | (CPS_IM_MASK << CPS_IM_SHIFT) | CPS_DI | CPS_DA);
break;
- case SPR_CPS: am29000->cps = val & (CPS_CA | CPS_IP | CPS_TE | CPS_TP | CPS_TU | CPS_FZ | CPS_LK | CPS_RE |
+ case SPR_CPS: am29000->cps = val & (CPS_CA | CPS_IP | CPS_TE | CPS_TP | CPS_TU | CPS_FZ | CPS_LK | CPS_RE |
CPS_WM | CPS_PD | CPS_PI | CPS_SM | (CPS_IM_MASK << CPS_IM_SHIFT) | CPS_DI | CPS_DA);
break;
- case SPR_CFG: am29000->cfg = val & (CFG_DW | CFG_VF | CFG_RV | CFG_BO | CFG_CP | CFG_CD);
+ case SPR_CFG: am29000->cfg = val & (CFG_DW | CFG_VF | CFG_RV | CFG_BO | CFG_CP | CFG_CD);
am29000->cfg |= PROCESSOR_REL_FIELD << CFG_PRL_SHIFT;
break;
- case SPR_CHA: am29000->cha = val;
+ case SPR_CHA: am29000->cha = val;
break;
- case SPR_CHD: am29000->chd = val;
+ case SPR_CHD: am29000->chd = val;
break;
- case SPR_CHC: am29000->chc = val;
+ case SPR_CHC: am29000->chc = val;
break;
- case SPR_RBP: am29000->rbp = val & RBP_MASK;
+ case SPR_RBP: am29000->rbp = val & RBP_MASK;
break;
- case SPR_TMC: am29000->tmc = val & TCV_MASK;
+ case SPR_TMC: am29000->tmc = val & TCV_MASK;
break;
- case SPR_TMR: am29000->tmr = val & (TMR_OV | TMR_IN | TMR_IE | TMR_TRV_MASK);
+ case SPR_TMR: am29000->tmr = val & (TMR_OV | TMR_IN | TMR_IE | TMR_TRV_MASK);
break;
- case SPR_PC0: am29000->pc0 = val & PC_MASK;
+ case SPR_PC0: am29000->pc0 = val & PC_MASK;
break;
- case SPR_PC1: am29000->pc1 = val & PC_MASK;
+ case SPR_PC1: am29000->pc1 = val & PC_MASK;
break;
- case SPR_PC2: am29000->pc2 = val & PC_MASK;
+ case SPR_PC2: am29000->pc2 = val & PC_MASK;
break;
- case SPR_MMU: am29000->mmu = val & ((MMU_PS_MASK << MMU_PS_SHIFT) | MMU_PID_MASK);
+ case SPR_MMU: am29000->mmu = val & ((MMU_PS_MASK << MMU_PS_SHIFT) | MMU_PID_MASK);
break;
- case SPR_LRU: am29000->lru = val & (LRU_MASK << LRU_SHIFT);
+ case SPR_LRU: am29000->lru = val & (LRU_MASK << LRU_SHIFT);
break;
- case SPR_IPC: am29000->ipc = val;// & IPX_MASK;
+ case SPR_IPC: am29000->ipc = val;// & IPX_MASK;
break;
- case SPR_IPA: am29000->ipa = val;// & IPX_MASK;
+ case SPR_IPA: am29000->ipa = val;// & IPX_MASK;
break;
- case SPR_IPB: am29000->ipb = val;// & IPX_MASK;
+ case SPR_IPB: am29000->ipb = val;// & IPX_MASK;
break;
- case SPR_Q: am29000->q = val;
+ case SPR_Q: am29000->q = val;
break;
- case SPR_ALU: am29000->alu = val & (ALU_DF | ALU_V | ALU_N | ALU_Z | ALU_C | (ALU_BP_MASK << ALU_BP_SHIFT) | (ALU_FC_MASK << ALU_FC_SHIFT));
+ case SPR_ALU: am29000->alu = val & (ALU_DF | ALU_V | ALU_N | ALU_Z | ALU_C | (ALU_BP_MASK << ALU_BP_SHIFT) | (ALU_FC_MASK << ALU_FC_SHIFT));
break;
- case SPR_BP: am29000->alu &= ~(ALU_BP_MASK << ALU_BP_SHIFT);
+ case SPR_BP: am29000->alu &= ~(ALU_BP_MASK << ALU_BP_SHIFT);
am29000->alu |= (val & ALU_BP_MASK) << ALU_BP_SHIFT;
break;
- case SPR_FC: am29000->alu &= ~(ALU_FC_MASK << ALU_FC_SHIFT);
+ case SPR_FC: am29000->alu &= ~(ALU_FC_MASK << ALU_FC_SHIFT);
am29000->alu |= (val & ALU_FC_MASK) << ALU_FC_SHIFT;
break;
- case SPR_CR: am29000->chc &= ~(CHC_CR_MASK << CHC_CR_SHIFT);
+ case SPR_CR: am29000->chc &= ~(CHC_CR_MASK << CHC_CR_SHIFT);
am29000->chc |= (val & CHC_CR_MASK) << CHC_CR_SHIFT;
break;
// case SPR_FPE:
diff --git a/src/emu/cpu/apexc/apexc.c b/src/emu/cpu/apexc/apexc.c
index 5adf71dd1f6..0e4f0bbab0c 100644
--- a/src/emu/cpu/apexc/apexc.c
+++ b/src/emu/cpu/apexc/apexc.c
@@ -328,34 +328,34 @@ field: X address D Function Y address D (part 2)
#include "apexc.h"
#ifndef SUPPORT_ODD_WORD_SIZES
-#define apexc_readmem(address) cpustate->program->read_dword((address)<<2)
-#define apexc_writemem(address, data) cpustate->program->write_dword((address)<<2, (data))
+#define apexc_readmem(address) cpustate->program->read_dword((address)<<2)
+#define apexc_writemem(address, data) cpustate->program->write_dword((address)<<2, (data))
/* eewww ! - Fortunately, there is no memory mapped I/O, so we can simulate masked write
without danger */
-#define apexc_writemem_masked(address, data, mask) \
+#define apexc_writemem_masked(address, data, mask) \
apexc_writemem((address), (apexc_readmem(address) & ~(mask)) | ((data) & (mask)))
#else
-#define apexc_readmem(address) cpu_readmem13_32(address)
-#define apexc_writemem(address, data) cpu_writemem13_32((address), (data))
-#define apexc_writemem_masked(address, data, mask) cpu_writemem13_32masked((address), (data), (mask))
+#define apexc_readmem(address) cpu_readmem13_32(address)
+#define apexc_writemem(address, data) cpu_writemem13_32((address), (data))
+#define apexc_writemem_masked(address, data, mask) cpu_writemem13_32masked((address), (data), (mask))
#endif
-#define apexc_readop(address) apexc_readmem(address)
+#define apexc_readop(address) apexc_readmem(address)
struct apexc_state
{
- UINT32 a; /* accumulator */
- UINT32 r; /* register */
- UINT32 cr; /* control register (i.e. instruction register) */
- int ml; /* memory location (current track in working store, and requested
+ UINT32 a; /* accumulator */
+ UINT32 r; /* register */
+ UINT32 cr; /* control register (i.e. instruction register) */
+ int ml; /* memory location (current track in working store, and requested
word position within track) (10 bits) */
- int working_store; /* current working store (group of 16 tracks) (1-15) */
- int current_word; /* current word position within track (0-31) */
+ int working_store; /* current working store (group of 16 tracks) (1-15) */
+ int current_word; /* current word position within track (0-31) */
- int running; /* 1 flag: */
+ int running; /* 1 flag: */
/* running: flag implied by the existence of the stop instruction */
- UINT32 pc; /* address of next instruction for the disassembler */
+ UINT32 pc; /* address of next instruction for the disassembler */
legacy_cpu_device *device;
address_space *program;
@@ -364,7 +364,7 @@ struct apexc_state
};
/* decrement ICount by n */
-#define DELAY(n) {cpustate->icount -= (n); cpustate->current_word = (cpustate->current_word + (n)) & 0x1f;}
+#define DELAY(n) {cpustate->icount -= (n); cpustate->current_word = (cpustate->current_word + (n)) & 0x1f;}
INLINE apexc_state *get_safe_token(device_t *device)
@@ -461,7 +461,7 @@ static void word_write(apexc_state *cpustate, int address, UINT32 data, UINT32 m
#endif
/* write takes one memory cycle (2, actually, but the 2nd cycle is taken into
- account in execute) */
+ account in execute) */
DELAY(1);
}
@@ -494,11 +494,11 @@ INLINE int load_ml(apexc_state *cpustate, int address, int vector)
/* additionnal delay appears if we switch tracks */
if (((cpustate->ml & 0x3E0) != (address & 0x3E0)) /*|| vector*/)
- delay = 6; /* if tracks are different, delay to allow for track switching */
+ delay = 6; /* if tracks are different, delay to allow for track switching */
else
- delay = 0; /* else, no problem */
+ delay = 0; /* else, no problem */
- cpustate->ml = address; /* save ml */
+ cpustate->ml = address; /* save ml */
return delay;
}
@@ -520,17 +520,17 @@ INLINE int load_ml(apexc_state *cpustate, int address, int vector)
*/
static void execute(apexc_state *cpustate)
{
- int x, y, function, c6, vector; /* instruction fields */
- int i = 0; /* misc counter */
- int has_operand; /* true if instruction is an AU operation with an X operand */
- static const char has_operand_table[32] = /* table for has_operand - one entry for each function code */
+ int x, y, function, c6, vector; /* instruction fields */
+ int i = 0; /* misc counter */
+ int has_operand; /* true if instruction is an AU operation with an X operand */
+ static const char has_operand_table[32] = /* table for has_operand - one entry for each function code */
{
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0, 0
};
- int delay1; /* pre-operand-access delay */
- int delay2; /* post-operation delay */
- int delay3; /* pre-operand-fetch delay */
+ int delay1; /* pre-operand-access delay */
+ int delay2; /* post-operation delay */
+ int delay3; /* pre-operand-fetch delay */
/* first isolate the instruction fields */
x = (cpustate->cr >> 22) & 0x3FF;
@@ -540,7 +540,7 @@ static void execute(apexc_state *cpustate)
vector = cpustate->cr & 1;
cpustate->pc = y<<2;
- function &= 0x1E; /* this is a mere guess - the LSBit is reserved for future additions */
+ function &= 0x1E; /* this is a mere guess - the LSBit is reserved for future additions */
/* determinates if we need to read an operand*/
has_operand = has_operand_table[function];
@@ -556,7 +556,7 @@ static void execute(apexc_state *cpustate)
}
}
- delay2 = 0; /* default */
+ delay2 = 0; /* default */
do
{
@@ -568,22 +568,22 @@ static void execute(apexc_state *cpustate)
cpustate->running = FALSE;
/* BTW, I don't know whether stop loads y into ml or not, and whether
- subsequent fetch is done */
+ subsequent fetch is done */
break;
case 2:
/* I */
/* I do not know whether the CPU does an OR or whatever, but since docs say that
- the 5 bits must be cleared initially, an OR kind of makes sense */
+ the 5 bits must be cleared initially, an OR kind of makes sense */
cpustate->r |= papertape_read(cpustate) << 27;
- delay2 = 32; /* no idea whether this should be counted as an absolute delay
+ delay2 = 32; /* no idea whether this should be counted as an absolute delay
or as a value in delay2 */
break;
case 4:
/* P */
papertape_punch(cpustate, (cpustate->r >> 27) & 0x1f);
- delay2 = 32; /* no idea whether this should be counted as an absolute delay
+ delay2 = 32; /* no idea whether this should be counted as an absolute delay
or as a value in delay2 */
break;
@@ -608,7 +608,7 @@ static void execute(apexc_state *cpustate)
case 8:
/* l_n */
- delay2 = (c6 & 0x20) ? 1 : 2; /* if more than 32 shifts, it takes more time */
+ delay2 = (c6 & 0x20) ? 1 : 2; /* if more than 32 shifts, it takes more time */
/* Yes, this code is inefficient, but this must be the way the APEXC does it ;-) */
while (c6 != 0)
@@ -631,7 +631,7 @@ static void execute(apexc_state *cpustate)
case 10:
/* r_n */
- delay2 = (c6 & 0x20) ? 1 : 2; /* if more than 32 shifts, it takes more time */
+ delay2 = (c6 & 0x20) ? 1 : 2; /* if more than 32 shifts, it takes more time */
/* Yes, this code is inefficient, but this must be the way the APEXC does it ;-) */
while (c6 != 0)
@@ -649,7 +649,7 @@ static void execute(apexc_state *cpustate)
case 12:
/* unused function code. I assume this results into a NOP, for lack of any
- specific info... */
+ specific info... */
break;
@@ -672,12 +672,12 @@ static void execute(apexc_state *cpustate)
cpustate->a -= word_read(cpustate, x, 1);
else
/* Even if we do not read anything, the loop still takes 1 cycle of
- the memory word clock. */
+ the memory word clock. */
/* Anyway, maybe we still read the data even if we do not use it. */
DELAY(1);
/* exit if c6 reached 32 ("c6 & 0x20" is simpler to implement and
- essentially equivalent, so this is most likely the actual implementation) */
+ essentially equivalent, so this is most likely the actual implementation) */
if (c6 & 0x20)
break;
@@ -695,8 +695,8 @@ static void execute(apexc_state *cpustate)
//DELAY(32); /* mmmh... we have already counted 32 wait states */
/* actually, if (n < 32) (which is an untypical case), we do not have 32 wait
- states. Question is: do we really have 32 wait states if (n < 32), or is
- the timing table incomplete? */
+ states. Question is: do we really have 32 wait states if (n < 32), or is
+ the timing table incomplete? */
break;
case 16:
@@ -762,15 +762,15 @@ static void execute(apexc_state *cpustate)
case 30:
/* S(x) */
- cpustate->working_store = (x >> 5) & 0xf; /* or is it (x >> 6)? */
- DELAY(32); /* no idea what the value is... All I know is that it takes much
+ cpustate->working_store = (x >> 5) & 0xf; /* or is it (x >> 6)? */
+ DELAY(32); /* no idea what the value is... All I know is that it takes much
more time than track switching (which takes 6 cycles) */
break;
}
if (vector)
/* increment word position in vector operations */
cpustate->ml = (cpustate->ml & 0x3E0) | ((cpustate->ml + 1) & 0x1F);
- } while (vector && has_operand && (++i < 32)); /* iterate 32 times if vector bit is set */
+ } while (vector && has_operand && (++i < 32)); /* iterate 32 times if vector bit is set */
/* the has_operand is a mere guess */
/* load ml with Y */
@@ -787,7 +787,7 @@ static void execute(apexc_state *cpustate)
}
/* entry point after a successful Branch (which alters the normal instruction sequence,
- in order not to load ml with Y) */
+ in order not to load ml with Y) */
special_fetch:
/* fetch current instruction into control register */
@@ -819,12 +819,12 @@ static CPU_RESET( apexc )
/* mmmh... I don't know what happens on reset with an actual APEXC. */
- cpustate->working_store = 1; /* mere guess */
- cpustate->current_word = 0; /* well, we do have to start somewhere... */
+ cpustate->working_store = 1; /* mere guess */
+ cpustate->current_word = 0; /* well, we do have to start somewhere... */
/* next two lines are just the product of my bold fantasy */
- cpustate->cr = 0; /* first instruction executed will be a stop */
- cpustate->running = TRUE; /* this causes the CPU to load the instruction at 0/0,
+ cpustate->cr = 0; /* first instruction executed will be a stop */
+ cpustate->running = TRUE; /* this causes the CPU to load the instruction at 0/0,
which enables easy booting (just press run on the panel) */
}
@@ -840,7 +840,7 @@ static CPU_EXECUTE( apexc )
execute(cpustate);
else
{
- DELAY(cpustate->icount); /* burn cycles once for all */
+ DELAY(cpustate->icount); /* burn cycles once for all */
}
} while (cpustate->icount > 0);
}
@@ -852,32 +852,32 @@ static CPU_SET_INFO( apexc )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- /*case CPUINFO_INT_INPUT_STATE + ...:*/ /* no interrupts */
+ /*case CPUINFO_INT_INPUT_STATE + ...:*/ /* no interrupts */
case CPUINFO_INT_PC:
/* keep address 9 LSBits - 10th bit depends on whether we are accessing the permanent
- track group or a switchable one */
+ track group or a switchable one */
cpustate->ml = info->i & 0x1ff;
if (info->i & 0x1e00)
- { /* we are accessing a switchable track group */
- cpustate->ml |= 0x200; /* set 10th bit */
+ { /* we are accessing a switchable track group */
+ cpustate->ml |= 0x200; /* set 10th bit */
if (((info->i >> 9) & 0xf) != cpustate->working_store)
- { /* we need to do a store switch */
+ { /* we need to do a store switch */
cpustate->working_store = ((info->i >> 9) & 0xf);
}
}
break;
- case CPUINFO_INT_SP: (void) info->i; /* no SP */ break;
+ case CPUINFO_INT_SP: (void) info->i; /* no SP */ break;
- case CPUINFO_INT_REGISTER + APEXC_CR: cpustate->cr = info->i; break;
- case CPUINFO_INT_REGISTER + APEXC_A: cpustate->a = info->i; break;
- case CPUINFO_INT_REGISTER + APEXC_R: cpustate->r = info->i; break;
- case CPUINFO_INT_REGISTER + APEXC_ML: cpustate->ml = info->i & 0x3ff; break;
- case CPUINFO_INT_REGISTER + APEXC_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + APEXC_WS: cpustate->working_store = info->i & 0xf; break;
- case CPUINFO_INT_REGISTER + APEXC_STATE: cpustate->running = info->i ? TRUE : FALSE; break;
+ case CPUINFO_INT_REGISTER + APEXC_CR: cpustate->cr = info->i; break;
+ case CPUINFO_INT_REGISTER + APEXC_A: cpustate->a = info->i; break;
+ case CPUINFO_INT_REGISTER + APEXC_R: cpustate->r = info->i; break;
+ case CPUINFO_INT_REGISTER + APEXC_ML: cpustate->ml = info->i & 0x3ff; break;
+ case CPUINFO_INT_REGISTER + APEXC_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + APEXC_WS: cpustate->working_store = info->i & 0xf; break;
+ case CPUINFO_INT_REGISTER + APEXC_STATE: cpustate->running = info->i ? TRUE : FALSE; break;
}
}
@@ -887,66 +887,66 @@ CPU_GET_INFO( apexc )
switch (state)
{
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(apexc_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; /* IIRC */ break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 75; /* IIRC */ break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 15; /*13+2 ignored bits to make double word address*/ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = /*5*/8; /* no I/O bus, but we use address 0 for punchtape I/O */ break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = /*0*/1; /*0 is quite enough but the MAME core does not understand*/ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(apexc_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; /* IIRC */ break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 75; /* IIRC */ break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 15; /*13+2 ignored bits to make double word address*/ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = /*5*/8; /* no I/O bus, but we use address 0 for punchtape I/O */ break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = /*0*/1; /*0 is quite enough but the MAME core does not understand*/ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->pc; /* psuedo-PC */ break;
-
- /*case CPUINFO_INT_INPUT_STATE + ...:*/ /* no interrupts */
-
- case CPUINFO_INT_REGISTER + APEXC_CR: info->i = cpustate->cr; break;
- case CPUINFO_INT_REGISTER + APEXC_A: info->i = cpustate->a; break;
- case CPUINFO_INT_REGISTER + APEXC_R: info->i = cpustate->r; break;
- case CPUINFO_INT_REGISTER + APEXC_ML: info->i = cpustate->ml; break;
- case CPUINFO_INT_REGISTER + APEXC_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + APEXC_WS: info->i = cpustate->working_store; break;
- case CPUINFO_INT_REGISTER + APEXC_STATE: info->i = cpustate->running; break;
- case CPUINFO_INT_REGISTER + APEXC_ML_FULL: info->i = effective_address(cpustate, cpustate->ml); break;
-
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(apexc); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(apexc); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(apexc); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(apexc); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(apexc); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
-
- case CPUINFO_STR_NAME: strcpy(info->s, "APEXC"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "APEC"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
-
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c", (cpustate->running) ? 'R' : 'S'); break;
-
- case CPUINFO_STR_REGISTER + APEXC_CR: sprintf(info->s, "CR:%08X", cpustate->cr); break;
- case CPUINFO_STR_REGISTER + APEXC_A: sprintf(info->s, "A :%08X", cpustate->a); break;
- case CPUINFO_STR_REGISTER + APEXC_R: sprintf(info->s, "R :%08X", cpustate->r); break;
- case CPUINFO_STR_REGISTER + APEXC_ML: sprintf(info->s, "ML:%03X", cpustate->ml); break;
- case CPUINFO_STR_REGISTER + APEXC_PC: sprintf(info->s, "PC:%03X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + APEXC_WS: sprintf(info->s, "WS:%01X", cpustate->working_store); break;
-
- case CPUINFO_STR_REGISTER + APEXC_STATE: sprintf(info->s, "CPU state:%01X", cpustate->running ? TRUE : FALSE); break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->pc; /* psuedo-PC */ break;
+
+ /*case CPUINFO_INT_INPUT_STATE + ...:*/ /* no interrupts */
+
+ case CPUINFO_INT_REGISTER + APEXC_CR: info->i = cpustate->cr; break;
+ case CPUINFO_INT_REGISTER + APEXC_A: info->i = cpustate->a; break;
+ case CPUINFO_INT_REGISTER + APEXC_R: info->i = cpustate->r; break;
+ case CPUINFO_INT_REGISTER + APEXC_ML: info->i = cpustate->ml; break;
+ case CPUINFO_INT_REGISTER + APEXC_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + APEXC_WS: info->i = cpustate->working_store; break;
+ case CPUINFO_INT_REGISTER + APEXC_STATE: info->i = cpustate->running; break;
+ case CPUINFO_INT_REGISTER + APEXC_ML_FULL: info->i = effective_address(cpustate, cpustate->ml); break;
+
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(apexc); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(apexc); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(apexc); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(apexc); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(apexc); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+
+ case CPUINFO_STR_NAME: strcpy(info->s, "APEXC"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "APEC"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
+
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c", (cpustate->running) ? 'R' : 'S'); break;
+
+ case CPUINFO_STR_REGISTER + APEXC_CR: sprintf(info->s, "CR:%08X", cpustate->cr); break;
+ case CPUINFO_STR_REGISTER + APEXC_A: sprintf(info->s, "A :%08X", cpustate->a); break;
+ case CPUINFO_STR_REGISTER + APEXC_R: sprintf(info->s, "R :%08X", cpustate->r); break;
+ case CPUINFO_STR_REGISTER + APEXC_ML: sprintf(info->s, "ML:%03X", cpustate->ml); break;
+ case CPUINFO_STR_REGISTER + APEXC_PC: sprintf(info->s, "PC:%03X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + APEXC_WS: sprintf(info->s, "WS:%01X", cpustate->working_store); break;
+
+ case CPUINFO_STR_REGISTER + APEXC_STATE: sprintf(info->s, "CPU state:%01X", cpustate->running ? TRUE : FALSE); break;
}
}
diff --git a/src/emu/cpu/apexc/apexc.h b/src/emu/cpu/apexc/apexc.h
index 553b1d87cf0..695dd828a05 100644
--- a/src/emu/cpu/apexc/apexc.h
+++ b/src/emu/cpu/apexc/apexc.h
@@ -6,17 +6,17 @@
enum
{
- APEXC_CR =1, /* control register */
- APEXC_A, /* acumulator */
- APEXC_R, /* register */
- APEXC_ML, /* memory location */
- APEXC_WS, /* working store */
- APEXC_STATE, /* whether CPU is running */
+ APEXC_CR =1, /* control register */
+ APEXC_A, /* acumulator */
+ APEXC_R, /* register */
+ APEXC_ML, /* memory location */
+ APEXC_WS, /* working store */
+ APEXC_STATE, /* whether CPU is running */
- APEXC_ML_FULL, /* read-only pseudo-register for exclusive use by the control panel code
+ APEXC_ML_FULL, /* read-only pseudo-register for exclusive use by the control panel code
in the apexc driver : enables it to get the complete address computed
from the contents of ML and WS */
- APEXC_PC /* doesn't actually exist; is there for the disassembler */
+ APEXC_PC /* doesn't actually exist; is there for the disassembler */
};
DECLARE_LEGACY_CPU_DEVICE(APEXC, apexc);
diff --git a/src/emu/cpu/apexc/apexcdsm.c b/src/emu/cpu/apexc/apexcdsm.c
index 25a48f8a531..e7ea37d08e8 100644
--- a/src/emu/cpu/apexc/apexcdsm.c
+++ b/src/emu/cpu/apexc/apexcdsm.c
@@ -66,28 +66,28 @@ enum format_type {branch, shiftl, shiftr, multiply, store, swap, one_address, tw
struct instr_desc
{
const char *mnemonic;
- format_type format; /* -> X and Y are format */
+ format_type format; /* -> X and Y are format */
};
static const instr_desc instructions[16] =
{
- { "Stop", one_address }, { "I", one_address },
- { "P", one_address }, { "B", branch },
- { "l", shiftl }, { "r", shiftr },
- { "Illegal",one_address }, { "X", multiply },
- { "+c", two_address }, { "-c", two_address },
- { "+", two_address }, { "-", two_address },
- { "T", two_address }, { "R", store },
- { "A", store }, { "S", swap }
+ { "Stop", one_address }, { "I", one_address },
+ { "P", one_address }, { "B", branch },
+ { "l", shiftl }, { "r", shiftr },
+ { "Illegal",one_address }, { "X", multiply },
+ { "+c", two_address }, { "-c", two_address },
+ { "+", two_address }, { "-", two_address },
+ { "T", two_address }, { "R", store },
+ { "A", store }, { "S", swap }
};
CPU_DISASSEMBLE( apexc )
{
- UINT32 instruction; /* 32-bit machine instruction */
- int x, y, function, c6, vector; /* instruction fields */
- int n; /* 'friendly', instruction-dependant interpretation of C6 */
- const instr_desc *the_desc; /* pointer to the revelant entry in the instructions array */
- char mnemonic[9]; /* storage for generated mnemonic */
+ UINT32 instruction; /* 32-bit machine instruction */
+ int x, y, function, c6, vector; /* instruction fields */
+ int n; /* 'friendly', instruction-dependant interpretation of C6 */
+ const instr_desc *the_desc; /* pointer to the revelant entry in the instructions array */
+ char mnemonic[9]; /* storage for generated mnemonic */
/* read the instruction to disassemble */
instruction = oprom[0] << 24 | oprom[1] << 16 | oprom[2] << 8 | oprom[3];
@@ -112,7 +112,7 @@ CPU_DISASSEMBLE( apexc )
case two_address:
case branch:
case swap:
- buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars*/
+ buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars*/
break;
case shiftl:
@@ -121,32 +121,32 @@ CPU_DISASSEMBLE( apexc )
n = c6;
else
n = 64-c6;
- buffer += sprintf(buffer, " %-2s(%2d) ", mnemonic, n); /* 10 chars */
+ buffer += sprintf(buffer, " %-2s(%2d) ", mnemonic, n); /* 10 chars */
break;
case multiply:
n = 33-c6;
if (n == 32)
/* case "32" : do not show bit specifier */
- buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars */
+ buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars */
else
- buffer += sprintf(buffer, " %-2s(%2d) ", mnemonic, n); /* 10 chars */
+ buffer += sprintf(buffer, " %-2s(%2d) ", mnemonic, n); /* 10 chars */
break;
case store:
if (c6 == 0)
- { /* case "1-32" : do not show bit specifier */
- buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars*/
+ { /* case "1-32" : do not show bit specifier */
+ buffer += sprintf(buffer, " %-10s", mnemonic); /* 10 chars*/
}
else if (c6 & 0x20)
- { /* case "1-n" */
+ { /* case "1-n" */
n = c6-32;
- buffer += sprintf(buffer, " %-2s (1-%02d) ", mnemonic, n); /* 10 chars */
+ buffer += sprintf(buffer, " %-2s (1-%02d) ", mnemonic, n); /* 10 chars */
}
else
- { /* case "n-32" */
+ { /* case "n-32" */
n = c6+1;
- buffer += sprintf(buffer, " %-2s(%02d-32) ", mnemonic, n); /* 8 chars */
+ buffer += sprintf(buffer, " %-2s(%02d-32) ", mnemonic, n); /* 8 chars */
}
}
@@ -154,29 +154,29 @@ CPU_DISASSEMBLE( apexc )
switch (the_desc->format)
{
case branch:
- buffer--; /* eat last char */
- buffer += sprintf(buffer, "<%03X(%02d/%02d) >=", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10+1 chars */
+ buffer--; /* eat last char */
+ buffer += sprintf(buffer, "<%03X(%02d/%02d) >=", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10+1 chars */
break;
case multiply:
case swap:
- buffer += sprintf(buffer, " (%02d) ", (x >> 5) & 0x1f); /* 10 chars */
+ buffer += sprintf(buffer, " (%02d) ", (x >> 5) & 0x1f); /* 10 chars */
break;
case one_address:
case shiftl:
case shiftr:
- buffer += sprintf(buffer, " "); /* 10 chars */
+ buffer += sprintf(buffer, " "); /* 10 chars */
break;
case two_address:
case store:
- buffer += sprintf(buffer, "%03X(%02d/%02d) ", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10 chars */
+ buffer += sprintf(buffer, "%03X(%02d/%02d) ", x<<2, (x >> 5) & 0x1f, x & 0x1f); /* 10 chars */
break;
}
/* print Y address */
- buffer += sprintf(buffer, "%03X(%02d/%02d)", y<<2, (y >> 5) & 0x1f, y & 0x1f); /* 7 chars */
+ buffer += sprintf(buffer, "%03X(%02d/%02d)", y<<2, (y >> 5) & 0x1f, y & 0x1f); /* 7 chars */
return 4;
}
diff --git a/src/emu/cpu/arm/arm.c b/src/emu/cpu/arm/arm.c
index eea2cd3ac08..10364e4c19b 100644
--- a/src/emu/cpu/arm/arm.c
+++ b/src/emu/cpu/arm/arm.c
@@ -22,20 +22,20 @@
CPU_DISASSEMBLE( arm );
CPU_DISASSEMBLE( arm_be );
-#define READ8(addr) cpu_read8(cpustate,addr)
-#define WRITE8(addr,data) cpu_write8(cpustate,addr,data)
-#define READ32(addr) cpu_read32(cpustate,addr)
-#define WRITE32(addr,data) cpu_write32(cpustate,addr,data)
+#define READ8(addr) cpu_read8(cpustate,addr)
+#define WRITE8(addr,data) cpu_write8(cpustate,addr,data)
+#define READ32(addr) cpu_read32(cpustate,addr)
+#define WRITE32(addr,data) cpu_write32(cpustate,addr,data)
#define ARM_DEBUG_CORE 0
#define ARM_DEBUG_COPRO 0
enum
{
- eARM_MODE_USER = 0x0,
- eARM_MODE_FIQ = 0x1,
- eARM_MODE_IRQ = 0x2,
- eARM_MODE_SVC = 0x3,
+ eARM_MODE_USER = 0x0,
+ eARM_MODE_FIQ = 0x1,
+ eARM_MODE_IRQ = 0x2,
+ eARM_MODE_SVC = 0x3,
kNumModes
};
@@ -92,88 +92,88 @@ static const int sRegisterTable[kNumModes][16] =
}
};
-#define N_BIT 31
-#define Z_BIT 30
-#define C_BIT 29
-#define V_BIT 28
-#define I_BIT 27
-#define F_BIT 26
-
-#define N_MASK ((UINT32)(1<<N_BIT)) /* Negative flag */
-#define Z_MASK ((UINT32)(1<<Z_BIT)) /* Zero flag */
-#define C_MASK ((UINT32)(1<<C_BIT)) /* Carry flag */
-#define V_MASK ((UINT32)(1<<V_BIT)) /* oVerflow flag */
-#define I_MASK ((UINT32)(1<<I_BIT)) /* Interrupt request disable */
-#define F_MASK ((UINT32)(1<<F_BIT)) /* Fast interrupt request disable */
-
-#define N_IS_SET(pc) ((pc) & N_MASK)
-#define Z_IS_SET(pc) ((pc) & Z_MASK)
-#define C_IS_SET(pc) ((pc) & C_MASK)
-#define V_IS_SET(pc) ((pc) & V_MASK)
-#define I_IS_SET(pc) ((pc) & I_MASK)
-#define F_IS_SET(pc) ((pc) & F_MASK)
-
-#define N_IS_CLEAR(pc) (!N_IS_SET(pc))
-#define Z_IS_CLEAR(pc) (!Z_IS_SET(pc))
-#define C_IS_CLEAR(pc) (!C_IS_SET(pc))
-#define V_IS_CLEAR(pc) (!V_IS_SET(pc))
-#define I_IS_CLEAR(pc) (!I_IS_SET(pc))
-#define F_IS_CLEAR(pc) (!F_IS_SET(pc))
-
-#define PSR_MASK ((UINT32) 0xf0000000u)
-#define IRQ_MASK ((UINT32) 0x0c000000u)
-#define ADDRESS_MASK ((UINT32) 0x03fffffcu)
-#define MODE_MASK ((UINT32) 0x00000003u)
-
-#define R15 cpustate->sArmRegister[eR15]
-#define MODE (R15&0x03)
-#define SIGN_BIT ((UINT32)(1<<31))
-#define SIGN_BITS_DIFFER(a,b) (((a)^(b)) >> 31)
+#define N_BIT 31
+#define Z_BIT 30
+#define C_BIT 29
+#define V_BIT 28
+#define I_BIT 27
+#define F_BIT 26
+
+#define N_MASK ((UINT32)(1<<N_BIT)) /* Negative flag */
+#define Z_MASK ((UINT32)(1<<Z_BIT)) /* Zero flag */
+#define C_MASK ((UINT32)(1<<C_BIT)) /* Carry flag */
+#define V_MASK ((UINT32)(1<<V_BIT)) /* oVerflow flag */
+#define I_MASK ((UINT32)(1<<I_BIT)) /* Interrupt request disable */
+#define F_MASK ((UINT32)(1<<F_BIT)) /* Fast interrupt request disable */
+
+#define N_IS_SET(pc) ((pc) & N_MASK)
+#define Z_IS_SET(pc) ((pc) & Z_MASK)
+#define C_IS_SET(pc) ((pc) & C_MASK)
+#define V_IS_SET(pc) ((pc) & V_MASK)
+#define I_IS_SET(pc) ((pc) & I_MASK)
+#define F_IS_SET(pc) ((pc) & F_MASK)
+
+#define N_IS_CLEAR(pc) (!N_IS_SET(pc))
+#define Z_IS_CLEAR(pc) (!Z_IS_SET(pc))
+#define C_IS_CLEAR(pc) (!C_IS_SET(pc))
+#define V_IS_CLEAR(pc) (!V_IS_SET(pc))
+#define I_IS_CLEAR(pc) (!I_IS_SET(pc))
+#define F_IS_CLEAR(pc) (!F_IS_SET(pc))
+
+#define PSR_MASK ((UINT32) 0xf0000000u)
+#define IRQ_MASK ((UINT32) 0x0c000000u)
+#define ADDRESS_MASK ((UINT32) 0x03fffffcu)
+#define MODE_MASK ((UINT32) 0x00000003u)
+
+#define R15 cpustate->sArmRegister[eR15]
+#define MODE (R15&0x03)
+#define SIGN_BIT ((UINT32)(1<<31))
+#define SIGN_BITS_DIFFER(a,b) (((a)^(b)) >> 31)
/* Deconstructing an instruction */
-#define INSN_COND ((UINT32) 0xf0000000u)
-#define INSN_SDT_L ((UINT32) 0x00100000u)
-#define INSN_SDT_W ((UINT32) 0x00200000u)
-#define INSN_SDT_B ((UINT32) 0x00400000u)
-#define INSN_SDT_U ((UINT32) 0x00800000u)
-#define INSN_SDT_P ((UINT32) 0x01000000u)
-#define INSN_BDT_L ((UINT32) 0x00100000u)
-#define INSN_BDT_W ((UINT32) 0x00200000u)
-#define INSN_BDT_S ((UINT32) 0x00400000u)
-#define INSN_BDT_U ((UINT32) 0x00800000u)
-#define INSN_BDT_P ((UINT32) 0x01000000u)
-#define INSN_BDT_REGS ((UINT32) 0x0000ffffu)
-#define INSN_SDT_IMM ((UINT32) 0x00000fffu)
-#define INSN_MUL_A ((UINT32) 0x00200000u)
-#define INSN_MUL_RM ((UINT32) 0x0000000fu)
-#define INSN_MUL_RS ((UINT32) 0x00000f00u)
-#define INSN_MUL_RN ((UINT32) 0x0000f000u)
-#define INSN_MUL_RD ((UINT32) 0x000f0000u)
-#define INSN_I ((UINT32) 0x02000000u)
-#define INSN_OPCODE ((UINT32) 0x01e00000u)
-#define INSN_S ((UINT32) 0x00100000u)
-#define INSN_BL ((UINT32) 0x01000000u)
-#define INSN_BRANCH ((UINT32) 0x00ffffffu)
-#define INSN_SWI ((UINT32) 0x00ffffffu)
-#define INSN_RN ((UINT32) 0x000f0000u)
-#define INSN_RD ((UINT32) 0x0000f000u)
-#define INSN_OP2 ((UINT32) 0x00000fffu)
-#define INSN_OP2_SHIFT ((UINT32) 0x00000f80u)
-#define INSN_OP2_SHIFT_TYPE ((UINT32) 0x00000070u)
-#define INSN_OP2_RM ((UINT32) 0x0000000fu)
-#define INSN_OP2_ROTATE ((UINT32) 0x00000f00u)
-#define INSN_OP2_IMM ((UINT32) 0x000000ffu)
-#define INSN_OP2_SHIFT_TYPE_SHIFT 4
-#define INSN_OP2_SHIFT_SHIFT 7
-#define INSN_OP2_ROTATE_SHIFT 8
-#define INSN_MUL_RS_SHIFT 8
-#define INSN_MUL_RN_SHIFT 12
-#define INSN_MUL_RD_SHIFT 16
-#define INSN_OPCODE_SHIFT 21
-#define INSN_RN_SHIFT 16
-#define INSN_RD_SHIFT 12
-#define INSN_COND_SHIFT 28
+#define INSN_COND ((UINT32) 0xf0000000u)
+#define INSN_SDT_L ((UINT32) 0x00100000u)
+#define INSN_SDT_W ((UINT32) 0x00200000u)
+#define INSN_SDT_B ((UINT32) 0x00400000u)
+#define INSN_SDT_U ((UINT32) 0x00800000u)
+#define INSN_SDT_P ((UINT32) 0x01000000u)
+#define INSN_BDT_L ((UINT32) 0x00100000u)
+#define INSN_BDT_W ((UINT32) 0x00200000u)
+#define INSN_BDT_S ((UINT32) 0x00400000u)
+#define INSN_BDT_U ((UINT32) 0x00800000u)
+#define INSN_BDT_P ((UINT32) 0x01000000u)
+#define INSN_BDT_REGS ((UINT32) 0x0000ffffu)
+#define INSN_SDT_IMM ((UINT32) 0x00000fffu)
+#define INSN_MUL_A ((UINT32) 0x00200000u)
+#define INSN_MUL_RM ((UINT32) 0x0000000fu)
+#define INSN_MUL_RS ((UINT32) 0x00000f00u)
+#define INSN_MUL_RN ((UINT32) 0x0000f000u)
+#define INSN_MUL_RD ((UINT32) 0x000f0000u)
+#define INSN_I ((UINT32) 0x02000000u)
+#define INSN_OPCODE ((UINT32) 0x01e00000u)
+#define INSN_S ((UINT32) 0x00100000u)
+#define INSN_BL ((UINT32) 0x01000000u)
+#define INSN_BRANCH ((UINT32) 0x00ffffffu)
+#define INSN_SWI ((UINT32) 0x00ffffffu)
+#define INSN_RN ((UINT32) 0x000f0000u)
+#define INSN_RD ((UINT32) 0x0000f000u)
+#define INSN_OP2 ((UINT32) 0x00000fffu)
+#define INSN_OP2_SHIFT ((UINT32) 0x00000f80u)
+#define INSN_OP2_SHIFT_TYPE ((UINT32) 0x00000070u)
+#define INSN_OP2_RM ((UINT32) 0x0000000fu)
+#define INSN_OP2_ROTATE ((UINT32) 0x00000f00u)
+#define INSN_OP2_IMM ((UINT32) 0x000000ffu)
+#define INSN_OP2_SHIFT_TYPE_SHIFT 4
+#define INSN_OP2_SHIFT_SHIFT 7
+#define INSN_OP2_ROTATE_SHIFT 8
+#define INSN_MUL_RS_SHIFT 8
+#define INSN_MUL_RN_SHIFT 12
+#define INSN_MUL_RD_SHIFT 16
+#define INSN_OPCODE_SHIFT 21
+#define INSN_RN_SHIFT 16
+#define INSN_RD_SHIFT 12
+#define INSN_COND_SHIFT 28
#define S_CYCLE 1
#define N_CYCLE 1
@@ -181,42 +181,42 @@ static const int sRegisterTable[kNumModes][16] =
enum
{
- OPCODE_AND, /* 0000 */
- OPCODE_EOR, /* 0001 */
- OPCODE_SUB, /* 0010 */
- OPCODE_RSB, /* 0011 */
- OPCODE_ADD, /* 0100 */
- OPCODE_ADC, /* 0101 */
- OPCODE_SBC, /* 0110 */
- OPCODE_RSC, /* 0111 */
- OPCODE_TST, /* 1000 */
- OPCODE_TEQ, /* 1001 */
- OPCODE_CMP, /* 1010 */
- OPCODE_CMN, /* 1011 */
- OPCODE_ORR, /* 1100 */
- OPCODE_MOV, /* 1101 */
- OPCODE_BIC, /* 1110 */
- OPCODE_MVN /* 1111 */
+ OPCODE_AND, /* 0000 */
+ OPCODE_EOR, /* 0001 */
+ OPCODE_SUB, /* 0010 */
+ OPCODE_RSB, /* 0011 */
+ OPCODE_ADD, /* 0100 */
+ OPCODE_ADC, /* 0101 */
+ OPCODE_SBC, /* 0110 */
+ OPCODE_RSC, /* 0111 */
+ OPCODE_TST, /* 1000 */
+ OPCODE_TEQ, /* 1001 */
+ OPCODE_CMP, /* 1010 */
+ OPCODE_CMN, /* 1011 */
+ OPCODE_ORR, /* 1100 */
+ OPCODE_MOV, /* 1101 */
+ OPCODE_BIC, /* 1110 */
+ OPCODE_MVN /* 1111 */
};
enum
{
- COND_EQ = 0, /* Z: equal */
- COND_NE, /* ~Z: not equal */
- COND_CS, COND_HS = 2, /* C: unsigned higher or same */
- COND_CC, COND_LO = 3, /* ~C: unsigned lower */
- COND_MI, /* N: negative */
- COND_PL, /* ~N: positive or zero */
- COND_VS, /* V: overflow */
- COND_VC, /* ~V: no overflow */
- COND_HI, /* C && ~Z: unsigned higher */
- COND_LS, /* ~C || Z: unsigned lower or same */
- COND_GE, /* N == V: greater or equal */
- COND_LT, /* N != V: less than */
- COND_GT, /* ~Z && (N == V): greater than */
- COND_LE, /* Z || (N != V): less than or equal */
- COND_AL, /* always */
- COND_NV /* never */
+ COND_EQ = 0, /* Z: equal */
+ COND_NE, /* ~Z: not equal */
+ COND_CS, COND_HS = 2, /* C: unsigned higher or same */
+ COND_CC, COND_LO = 3, /* ~C: unsigned lower */
+ COND_MI, /* N: negative */
+ COND_PL, /* ~N: positive or zero */
+ COND_VS, /* V: overflow */
+ COND_VC, /* ~V: no overflow */
+ COND_HI, /* C && ~Z: unsigned higher */
+ COND_LS, /* ~C || Z: unsigned lower or same */
+ COND_GE, /* N == V: greater or equal */
+ COND_LT, /* N != V: less than */
+ COND_GT, /* ~Z && (N == V): greater than */
+ COND_LE, /* Z || (N != V): less than or equal */
+ COND_AL, /* always */
+ COND_NV /* never */
};
#define LSL(v,s) ((v) << (s))
@@ -419,7 +419,7 @@ static CPU_EXECUTE( arm )
goto L_Next;
}
/* Condition satisfied, so decode the instruction */
- if ((insn & 0x0fc000f0u) == 0x00000090u) /* Multiplication */
+ if ((insn & 0x0fc000f0u) == 0x00000090u) /* Multiplication */
{
HandleMul(cpustate, insn);
R15 += 4;
@@ -438,20 +438,20 @@ static CPU_EXECUTE( arm )
HandleMemBlock(cpustate, insn);
R15 += 4;
}
- else if ((insn & 0x0e000000u) == 0x0a000000u) /* Branch */
+ else if ((insn & 0x0e000000u) == 0x0a000000u) /* Branch */
{
HandleBranch(cpustate, insn);
}
- else if ((insn & 0x0f000000u) == 0x0e000000u) /* Coprocessor */
+ else if ((insn & 0x0f000000u) == 0x0e000000u) /* Coprocessor */
{
HandleCoPro(cpustate, insn);
R15 += 4;
}
- else if ((insn & 0x0f000000u) == 0x0f000000u) /* Software interrupt */
+ else if ((insn & 0x0f000000u) == 0x0f000000u) /* Software interrupt */
{
pc=R15+4;
- R15 = eARM_MODE_SVC; /* Set SVC mode so PC is saved to correct R14 bank */
- SetRegister( cpustate, 14, pc ); /* save PC */
+ R15 = eARM_MODE_SVC; /* Set SVC mode so PC is saved to correct R14 bank */
+ SetRegister( cpustate, 14, pc ); /* save PC */
R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x8|eARM_MODE_SVC|I_MASK|(pc&MODE_MASK);
cpustate->icount -= 2 * S_CYCLE + N_CYCLE;
}
@@ -475,25 +475,25 @@ static void arm_check_irq_state(ARM_REGS* cpustate)
/* Exception priorities (from ARM6, not specifically ARM2/3):
- Reset
- Data abort
- FIRQ
- IRQ
- Prefetch abort
- Undefined instruction
- */
+ Reset
+ Data abort
+ FIRQ
+ IRQ
+ Prefetch abort
+ Undefined instruction
+ */
if (cpustate->pendingFiq && (pc&F_MASK)==0) {
- R15 = eARM_MODE_FIQ; /* Set FIQ mode so PC is saved to correct R14 bank */
- SetRegister( cpustate, 14, pc ); /* save PC */
+ R15 = eARM_MODE_FIQ; /* Set FIQ mode so PC is saved to correct R14 bank */
+ SetRegister( cpustate, 14, pc ); /* save PC */
R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set PC=0x1c */
cpustate->pendingFiq=0;
return;
}
if (cpustate->pendingIrq && (pc&I_MASK)==0) {
- R15 = eARM_MODE_IRQ; /* Set IRQ mode so PC is saved to correct R14 bank */
- SetRegister( cpustate, 14, pc ); /* save PC */
+ R15 = eARM_MODE_IRQ; /* Set IRQ mode so PC is saved to correct R14 bank */
+ SetRegister( cpustate, 14, pc ); /* save PC */
R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=0x18 */
cpustate->pendingIrq=0;
return;
@@ -658,13 +658,13 @@ static void HandleMemSingle( ARM_REGS* cpustate, UINT32 insn )
R15 = (READ32(rnv) & ADDRESS_MASK) | (R15 & PSR_MASK) | (R15 & MODE_MASK);
/*
- The docs are explicit in that the bottom bits should be masked off
- when writing to R15 in this way, however World Cup Volleyball 95 has
- an example of an unaligned jump (bottom bits = 2) where execution
- should definitely continue from the rounded up address.
+ The docs are explicit in that the bottom bits should be masked off
+ when writing to R15 in this way, however World Cup Volleyball 95 has
+ an example of an unaligned jump (bottom bits = 2) where execution
+ should definitely continue from the rounded up address.
- In other cases, 4 is subracted from R15 here to account for pipelining.
- */
+ In other cases, 4 is subracted from R15 here to account for pipelining.
+ */
if ((READ32(rnv)&3)==0)
R15 -= 4;
@@ -702,7 +702,7 @@ static void HandleMemSingle( ARM_REGS* cpustate, UINT32 insn )
if (insn & INSN_SDT_U)
{
/* Writeback is applied in pipeline, before value is read from mem,
- so writeback is effectively ignored */
+ so writeback is effectively ignored */
if (rd==rn) {
SetRegister(cpustate, rn,GetRegister(cpustate, rd));
}
@@ -717,7 +717,7 @@ static void HandleMemSingle( ARM_REGS* cpustate, UINT32 insn )
else
{
/* Writeback is applied in pipeline, before value is read from mem,
- so writeback is effectively ignored */
+ so writeback is effectively ignored */
if (rd==rn) {
SetRegister(cpustate, rn,GetRegister(cpustate, rd));
}
@@ -737,38 +737,38 @@ static void HandleMemSingle( ARM_REGS* cpustate, UINT32 insn )
/* Set NZCV flags for ADDS / SUBS */
#define HandleALUAddFlags(rd, rn, op2) \
- if (insn & INSN_S) \
- R15 = \
- ((R15 &~ (N_MASK | Z_MASK | V_MASK | C_MASK)) \
- | (((!SIGN_BITS_DIFFER(rn, op2)) && SIGN_BITS_DIFFER(rn, rd)) \
- << V_BIT) \
- | (((~(rn)) < (op2)) << C_BIT) \
- | HandleALUNZFlags(rd)) \
- + 4; \
- else R15 += 4;
+ if (insn & INSN_S) \
+ R15 = \
+ ((R15 &~ (N_MASK | Z_MASK | V_MASK | C_MASK)) \
+ | (((!SIGN_BITS_DIFFER(rn, op2)) && SIGN_BITS_DIFFER(rn, rd)) \
+ << V_BIT) \
+ | (((~(rn)) < (op2)) << C_BIT) \
+ | HandleALUNZFlags(rd)) \
+ + 4; \
+ else R15 += 4;
#define HandleALUSubFlags(rd, rn, op2) \
- if (insn & INSN_S) \
- R15 = \
- ((R15 &~ (N_MASK | Z_MASK | V_MASK | C_MASK)) \
- | ((SIGN_BITS_DIFFER(rn, op2) && SIGN_BITS_DIFFER(rn, rd)) \
- << V_BIT) \
- | (((IsNeg(rn) & IsPos(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsPos(op2) & IsPos(rd))) ? C_MASK : 0) \
- | HandleALUNZFlags(rd)) \
- + 4; \
- else R15 += 4;
+ if (insn & INSN_S) \
+ R15 = \
+ ((R15 &~ (N_MASK | Z_MASK | V_MASK | C_MASK)) \
+ | ((SIGN_BITS_DIFFER(rn, op2) && SIGN_BITS_DIFFER(rn, rd)) \
+ << V_BIT) \
+ | (((IsNeg(rn) & IsPos(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsPos(op2) & IsPos(rd))) ? C_MASK : 0) \
+ | HandleALUNZFlags(rd)) \
+ + 4; \
+ else R15 += 4;
/* Set NZC flags for logical operations. */
#define HandleALUNZFlags(rd) \
- (((rd) & SIGN_BIT) | ((!(rd)) << Z_BIT))
+ (((rd) & SIGN_BIT) | ((!(rd)) << Z_BIT))
#define HandleALULogicalFlags(rd, sc) \
- if (insn & INSN_S) \
- R15 = ((R15 &~ (N_MASK | Z_MASK | C_MASK)) \
- | HandleALUNZFlags(rd) \
- | (((sc) != 0) << C_BIT)) + 4; \
- else R15 += 4;
+ if (insn & INSN_S) \
+ R15 = ((R15 &~ (N_MASK | Z_MASK | C_MASK)) \
+ | HandleALUNZFlags(rd) \
+ | (((sc) != 0) << C_BIT)) + 4; \
+ else R15 += 4;
static void HandleALU( ARM_REGS* cpustate, UINT32 insn )
{
@@ -801,7 +801,7 @@ static void HandleALU( ARM_REGS* cpustate, UINT32 insn )
{
op2 = decodeShift(cpustate, insn, (insn & INSN_S) ? &sc : NULL);
- if (!(insn & INSN_S))
+ if (!(insn & INSN_S))
sc=0;
}
@@ -814,7 +814,7 @@ static void HandleALU( ARM_REGS* cpustate, UINT32 insn )
logerror("%08x: Pipelined R15 (Shift %d)\n",R15,(insn&INSN_I?8:insn&0x10u?12:12));
/* Docs strongly suggest the mode bits should be included here, but it breaks Captain
- America, as it starts doing unaligned reads */
+ America, as it starts doing unaligned reads */
rn=(R15+8)&ADDRESS_MASK;
}
else
@@ -927,8 +927,8 @@ static void HandleALU( ARM_REGS* cpustate, UINT32 insn )
else
{
// combine the flags from rd with the address from R15
- rd &= ~ADDRESS_MASK; // clear address part of RD
- rd |= (R15 & ADDRESS_MASK); // RD = address part of R15
+ rd &= ~ADDRESS_MASK; // clear address part of RD
+ rd |= (R15 & ADDRESS_MASK); // RD = address part of R15
SetRegister(cpustate, rdn,(rd&ADDRESS_MASK) | (rd&PSR_MASK) | (R15&IRQ_MASK) | (R15&MODE_MASK));
}
cpustate->icount -= S_CYCLE + N_CYCLE;
@@ -941,28 +941,28 @@ static void HandleMul( ARM_REGS* cpustate, UINT32 insn)
cpustate->icount -= S_CYCLE + I_CYCLE;
/* should be:
- Range of Rs Number of cycles
-
- &0 -- &1 1S + 1I
- &2 -- &7 1S + 2I
- &8 -- &1F 1S + 3I
- &20 -- &7F 1S + 4I
- &80 -- &1FF 1S + 5I
- &200 -- &7FF 1S + 6I
- &800 -- &1FFF 1S + 7I
- &2000 -- &7FFF 1S + 8I
- &8000 -- &1FFFF 1S + 9I
- &20000 -- &7FFFF 1S + 10I
- &80000 -- &1FFFFF 1S + 11I
- &200000 -- &7FFFFF 1S + 12I
- &800000 -- &1FFFFFF 1S + 13I
- &2000000 -- &7FFFFFF 1S + 14I
- &8000000 -- &1FFFFFFF 1S + 15I
- &20000000 -- &FFFFFFFF 1S + 16I
- */
+ Range of Rs Number of cycles
+
+ &0 -- &1 1S + 1I
+ &2 -- &7 1S + 2I
+ &8 -- &1F 1S + 3I
+ &20 -- &7F 1S + 4I
+ &80 -- &1FF 1S + 5I
+ &200 -- &7FF 1S + 6I
+ &800 -- &1FFF 1S + 7I
+ &2000 -- &7FFF 1S + 8I
+ &8000 -- &1FFFF 1S + 9I
+ &20000 -- &7FFFF 1S + 10I
+ &80000 -- &1FFFFF 1S + 11I
+ &200000 -- &7FFFFF 1S + 12I
+ &800000 -- &1FFFFFF 1S + 13I
+ &2000000 -- &7FFFFFF 1S + 14I
+ &8000000 -- &1FFFFFFF 1S + 15I
+ &20000000 -- &FFFFFFFF 1S + 16I
+ */
/* Do the basic multiply of Rm and Rs */
- r = GetRegister( cpustate, insn&INSN_MUL_RM ) *
+ r = GetRegister( cpustate, insn&INSN_MUL_RM ) *
GetRegister( cpustate, (insn&INSN_MUL_RS)>>INSN_MUL_RS_SHIFT );
if (ARM_DEBUG_CORE && ((insn&INSN_MUL_RM)==0xf
@@ -1101,15 +1101,15 @@ static void HandleMemBlock( ARM_REGS* cpustate, UINT32 insn )
if (insn & INSN_BDT_W)
{
/* Arm docs notes: The base register can always be loaded without any problems.
- However, don't specify writeback if the base register is being loaded -
- you can't end up with both a written-back value and a loaded value in the base register!
+ However, don't specify writeback if the base register is being loaded -
+ you can't end up with both a written-back value and a loaded value in the base register!
- However - Fighter's History does exactly that at 0x121e4 (LDMUW [R13], { R13-R15 })!
+ However - Fighter's History does exactly that at 0x121e4 (LDMUW [R13], { R13-R15 })!
- This emulator implementation skips applying writeback in this case, which is confirmed
- correct for this situation, but that is not necessarily true for all ARM hardware
- implementations (the results are officially undefined).
- */
+ This emulator implementation skips applying writeback in this case, which is confirmed
+ correct for this situation, but that is not necessarily true for all ARM hardware
+ implementations (the results are officially undefined).
+ */
if (ARM_DEBUG_CORE && rb==15)
logerror("%08x: Illegal LDRM writeback to r15\n",R15);
@@ -1157,11 +1157,11 @@ static void HandleMemBlock( ARM_REGS* cpustate, UINT32 insn )
{
/* Storing
- ARM docs notes: Storing a list of registers including the base register using writeback
- will write the value of the base register before writeback to memory only if the base
- register is the first in the list. Otherwise, the value which is used is not defined.
+ ARM docs notes: Storing a list of registers including the base register using writeback
+ will write the value of the base register before writeback to memory only if the base
+ register is the first in the list. Otherwise, the value which is used is not defined.
- */
+ */
if (insn & (1<<eR15))
{
if (ARM_DEBUG_CORE)
@@ -1211,13 +1211,13 @@ static void HandleMemBlock( ARM_REGS* cpustate, UINT32 insn )
*/
static UINT32 decodeShift( ARM_REGS* cpustate, UINT32 insn, UINT32 *pCarry)
{
- UINT32 k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT;
- UINT32 rm = GetRegister( cpustate, insn & INSN_OP2_RM );
- UINT32 t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
+ UINT32 k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT;
+ UINT32 rm = GetRegister( cpustate, insn & INSN_OP2_RM );
+ UINT32 t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
if ((insn & INSN_OP2_RM)==0xf) {
/* If hardwired shift, then PC is 8 bytes ahead, else if register shift
- is used, then 12 bytes - TODO?? */
+ is used, then 12 bytes - TODO?? */
rm+=8;
}
@@ -1241,14 +1241,14 @@ static UINT32 decodeShift( ARM_REGS* cpustate, UINT32 insn, UINT32 *pCarry)
/* Decode the shift type and perform the shift */
switch (t >> 1)
{
- case 0: /* LSL */
+ case 0: /* LSL */
if (pCarry)
{
*pCarry = k ? (rm & (1 << (32 - k))) : (R15 & C_MASK);
}
return k ? LSL(rm, k) : rm;
- case 1: /* LSR */
+ case 1: /* LSR */
if (k == 0 || k == 32)
{
if (pCarry) *pCarry = rm & SIGN_BIT;
@@ -1266,7 +1266,7 @@ static UINT32 decodeShift( ARM_REGS* cpustate, UINT32 insn, UINT32 *pCarry)
}
break;
- case 2: /* ASR */
+ case 2: /* ASR */
if (k == 0 || k > 32)
k = 32;
if (pCarry) *pCarry = (rm & (1 << (k - 1)));
@@ -1281,7 +1281,7 @@ static UINT32 decodeShift( ARM_REGS* cpustate, UINT32 insn, UINT32 *pCarry)
}
break;
- case 3: /* ROR and RRX */
+ case 3: /* ROR and RRX */
if (k)
{
while (k > 32) k -= 32;
@@ -1303,9 +1303,9 @@ static UINT32 decodeShift( ARM_REGS* cpustate, UINT32 insn, UINT32 *pCarry)
static UINT32 BCDToDecimal(UINT32 value)
{
- UINT32 accumulator = 0;
- UINT32 multiplier = 1;
- int i;
+ UINT32 accumulator = 0;
+ UINT32 multiplier = 1;
+ int i;
for(i = 0; i < 8; i++)
{
@@ -1320,13 +1320,13 @@ static UINT32 BCDToDecimal(UINT32 value)
static UINT32 DecimalToBCD(UINT32 value)
{
- UINT32 accumulator = 0;
- UINT32 divisor = 10;
- int i;
+ UINT32 accumulator = 0;
+ UINT32 divisor = 10;
+ int i;
for(i = 0; i < 8; i++)
{
- UINT32 temp;
+ UINT32 temp;
temp = value % divisor;
value -= temp;
@@ -1445,40 +1445,40 @@ static CPU_SET_INFO( arm )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + ARM_IRQ_LINE: set_irq_line(cpustate, ARM_IRQ_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + ARM_FIRQ_LINE: set_irq_line(cpustate, ARM_FIRQ_LINE, info->i); break;
-
- case CPUINFO_INT_REGISTER + ARM32_R0: cpustate->sArmRegister[ 0]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R1: cpustate->sArmRegister[ 1]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R2: cpustate->sArmRegister[ 2]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R3: cpustate->sArmRegister[ 3]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R4: cpustate->sArmRegister[ 4]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R5: cpustate->sArmRegister[ 5]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R6: cpustate->sArmRegister[ 6]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R7: cpustate->sArmRegister[ 7]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R8: cpustate->sArmRegister[ 8]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R9: cpustate->sArmRegister[ 9]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R10: cpustate->sArmRegister[10]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R11: cpustate->sArmRegister[11]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R12: cpustate->sArmRegister[12]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R13: cpustate->sArmRegister[13]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R14: cpustate->sArmRegister[14]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_R15: cpustate->sArmRegister[15]= info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_FR8: cpustate->sArmRegister[eR8_FIQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_FR9: cpustate->sArmRegister[eR9_FIQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_FR10: cpustate->sArmRegister[eR10_FIQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_FR11: cpustate->sArmRegister[eR11_FIQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_FR12: cpustate->sArmRegister[eR12_FIQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_FR13: cpustate->sArmRegister[eR13_FIQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_FR14: cpustate->sArmRegister[eR14_FIQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_IR13: cpustate->sArmRegister[eR13_IRQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_IR14: cpustate->sArmRegister[eR14_IRQ] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_SR13: cpustate->sArmRegister[eR13_SVC] = info->i; break;
- case CPUINFO_INT_REGISTER + ARM32_SR14: cpustate->sArmRegister[eR14_SVC] = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + ARM_IRQ_LINE: set_irq_line(cpustate, ARM_IRQ_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + ARM_FIRQ_LINE: set_irq_line(cpustate, ARM_FIRQ_LINE, info->i); break;
+
+ case CPUINFO_INT_REGISTER + ARM32_R0: cpustate->sArmRegister[ 0]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R1: cpustate->sArmRegister[ 1]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R2: cpustate->sArmRegister[ 2]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R3: cpustate->sArmRegister[ 3]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R4: cpustate->sArmRegister[ 4]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R5: cpustate->sArmRegister[ 5]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R6: cpustate->sArmRegister[ 6]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R7: cpustate->sArmRegister[ 7]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R8: cpustate->sArmRegister[ 8]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R9: cpustate->sArmRegister[ 9]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R10: cpustate->sArmRegister[10]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R11: cpustate->sArmRegister[11]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R12: cpustate->sArmRegister[12]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R13: cpustate->sArmRegister[13]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R14: cpustate->sArmRegister[14]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_R15: cpustate->sArmRegister[15]= info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR8: cpustate->sArmRegister[eR8_FIQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR9: cpustate->sArmRegister[eR9_FIQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR10: cpustate->sArmRegister[eR10_FIQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR11: cpustate->sArmRegister[eR11_FIQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR12: cpustate->sArmRegister[eR12_FIQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR13: cpustate->sArmRegister[eR13_FIQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR14: cpustate->sArmRegister[eR14_FIQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_IR13: cpustate->sArmRegister[eR13_IRQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_IR14: cpustate->sArmRegister[eR14_IRQ] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_SR13: cpustate->sArmRegister[eR13_SVC] = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM32_SR14: cpustate->sArmRegister[eR14_SVC] = info->i; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + ARM32_PC: R15 = (R15&~ADDRESS_MASK)|info->i; break;
- case CPUINFO_INT_SP: SetRegister(cpustate,13,info->i); break;
+ case CPUINFO_INT_REGISTER + ARM32_PC: R15 = (R15&~ADDRESS_MASK)|info->i; break;
+ case CPUINFO_INT_SP: SetRegister(cpustate,13,info->i); break;
}
}
@@ -1495,80 +1495,80 @@ CPU_GET_INFO( arm )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ARM_REGS); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 26; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + ARM_IRQ_LINE: info->i = cpustate->pendingIrq; break;
- case CPUINFO_INT_INPUT_STATE + ARM_FIRQ_LINE: info->i = cpustate->pendingFiq; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ARM_REGS); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 26; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + ARM_IRQ_LINE: info->i = cpustate->pendingIrq; break;
+ case CPUINFO_INT_INPUT_STATE + ARM_FIRQ_LINE: info->i = cpustate->pendingFiq; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* not implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + ARM32_PC: info->i = cpustate->sArmRegister[15]&ADDRESS_MASK; break;
- case CPUINFO_INT_SP: info->i = GetRegister(cpustate, 13); break;
-
- case CPUINFO_INT_REGISTER + ARM32_R0: info->i = cpustate->sArmRegister[ 0]; break;
- case CPUINFO_INT_REGISTER + ARM32_R1: info->i = cpustate->sArmRegister[ 1]; break;
- case CPUINFO_INT_REGISTER + ARM32_R2: info->i = cpustate->sArmRegister[ 2]; break;
- case CPUINFO_INT_REGISTER + ARM32_R3: info->i = cpustate->sArmRegister[ 3]; break;
- case CPUINFO_INT_REGISTER + ARM32_R4: info->i = cpustate->sArmRegister[ 4]; break;
- case CPUINFO_INT_REGISTER + ARM32_R5: info->i = cpustate->sArmRegister[ 5]; break;
- case CPUINFO_INT_REGISTER + ARM32_R6: info->i = cpustate->sArmRegister[ 6]; break;
- case CPUINFO_INT_REGISTER + ARM32_R7: info->i = cpustate->sArmRegister[ 7]; break;
- case CPUINFO_INT_REGISTER + ARM32_R8: info->i = cpustate->sArmRegister[ 8]; break;
- case CPUINFO_INT_REGISTER + ARM32_R9: info->i = cpustate->sArmRegister[ 9]; break;
- case CPUINFO_INT_REGISTER + ARM32_R10: info->i = cpustate->sArmRegister[10]; break;
- case CPUINFO_INT_REGISTER + ARM32_R11: info->i = cpustate->sArmRegister[11]; break;
- case CPUINFO_INT_REGISTER + ARM32_R12: info->i = cpustate->sArmRegister[12]; break;
- case CPUINFO_INT_REGISTER + ARM32_R13: info->i = cpustate->sArmRegister[13]; break;
- case CPUINFO_INT_REGISTER + ARM32_R14: info->i = cpustate->sArmRegister[14]; break;
- case CPUINFO_INT_REGISTER + ARM32_R15: info->i = cpustate->sArmRegister[15]; break;
-
- case CPUINFO_INT_REGISTER + ARM32_FR8: info->i = cpustate->sArmRegister[eR8_FIQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_FR9: info->i = cpustate->sArmRegister[eR9_FIQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_FR10: info->i = cpustate->sArmRegister[eR10_FIQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_FR11: info->i = cpustate->sArmRegister[eR11_FIQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_FR12: info->i = cpustate->sArmRegister[eR12_FIQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_FR13: info->i = cpustate->sArmRegister[eR13_FIQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_FR14: info->i = cpustate->sArmRegister[eR14_FIQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_IR13: info->i = cpustate->sArmRegister[eR13_IRQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_IR14: info->i = cpustate->sArmRegister[eR14_IRQ]; break;
- case CPUINFO_INT_REGISTER + ARM32_SR13: info->i = cpustate->sArmRegister[eR13_SVC]; break;
- case CPUINFO_INT_REGISTER + ARM32_SR14: info->i = cpustate->sArmRegister[eR14_SVC]; break;
+ case CPUINFO_INT_REGISTER + ARM32_PC: info->i = cpustate->sArmRegister[15]&ADDRESS_MASK; break;
+ case CPUINFO_INT_SP: info->i = GetRegister(cpustate, 13); break;
+
+ case CPUINFO_INT_REGISTER + ARM32_R0: info->i = cpustate->sArmRegister[ 0]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R1: info->i = cpustate->sArmRegister[ 1]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R2: info->i = cpustate->sArmRegister[ 2]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R3: info->i = cpustate->sArmRegister[ 3]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R4: info->i = cpustate->sArmRegister[ 4]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R5: info->i = cpustate->sArmRegister[ 5]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R6: info->i = cpustate->sArmRegister[ 6]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R7: info->i = cpustate->sArmRegister[ 7]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R8: info->i = cpustate->sArmRegister[ 8]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R9: info->i = cpustate->sArmRegister[ 9]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R10: info->i = cpustate->sArmRegister[10]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R11: info->i = cpustate->sArmRegister[11]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R12: info->i = cpustate->sArmRegister[12]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R13: info->i = cpustate->sArmRegister[13]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R14: info->i = cpustate->sArmRegister[14]; break;
+ case CPUINFO_INT_REGISTER + ARM32_R15: info->i = cpustate->sArmRegister[15]; break;
+
+ case CPUINFO_INT_REGISTER + ARM32_FR8: info->i = cpustate->sArmRegister[eR8_FIQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR9: info->i = cpustate->sArmRegister[eR9_FIQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR10: info->i = cpustate->sArmRegister[eR10_FIQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR11: info->i = cpustate->sArmRegister[eR11_FIQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR12: info->i = cpustate->sArmRegister[eR12_FIQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR13: info->i = cpustate->sArmRegister[eR13_FIQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_FR14: info->i = cpustate->sArmRegister[eR14_FIQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_IR13: info->i = cpustate->sArmRegister[eR13_IRQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_IR14: info->i = cpustate->sArmRegister[eR14_IRQ]; break;
+ case CPUINFO_INT_REGISTER + ARM32_SR13: info->i = cpustate->sArmRegister[eR13_SVC]; break;
+ case CPUINFO_INT_REGISTER + ARM32_SR14: info->i = cpustate->sArmRegister[eR14_SVC]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(arm); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(arm); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(arm); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(arm); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(arm); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(arm); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "ARM"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Acorn Risc Machine"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.3"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Bryan McPhail, bmcphail@tendril.co.uk"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ARM"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Acorn Risc Machine"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.3"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Bryan McPhail, bmcphail@tendril.co.uk"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c",
@@ -1595,34 +1595,34 @@ CPU_GET_INFO( arm )
}
break;
- case CPUINFO_STR_REGISTER + ARM32_PC: sprintf( info->s, "PC :%08x", cpustate->sArmRegister[15]&ADDRESS_MASK ); break;
- case CPUINFO_STR_REGISTER + ARM32_R0: sprintf( info->s, "R0 :%08x", cpustate->sArmRegister[ 0] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R1: sprintf( info->s, "R1 :%08x", cpustate->sArmRegister[ 1] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R2: sprintf( info->s, "R2 :%08x", cpustate->sArmRegister[ 2] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R3: sprintf( info->s, "R3 :%08x", cpustate->sArmRegister[ 3] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R4: sprintf( info->s, "R4 :%08x", cpustate->sArmRegister[ 4] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R5: sprintf( info->s, "R5 :%08x", cpustate->sArmRegister[ 5] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R6: sprintf( info->s, "R6 :%08x", cpustate->sArmRegister[ 6] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R7: sprintf( info->s, "R7 :%08x", cpustate->sArmRegister[ 7] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R8: sprintf( info->s, "R8 :%08x", cpustate->sArmRegister[ 8] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R9: sprintf( info->s, "R9 :%08x", cpustate->sArmRegister[ 9] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R10: sprintf( info->s, "R10 :%08x", cpustate->sArmRegister[10] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R11: sprintf( info->s, "R11 :%08x", cpustate->sArmRegister[11] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R12: sprintf( info->s, "R12 :%08x", cpustate->sArmRegister[12] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R13: sprintf( info->s, "R13 :%08x", cpustate->sArmRegister[13] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R14: sprintf( info->s, "R14 :%08x", cpustate->sArmRegister[14] ); break;
- case CPUINFO_STR_REGISTER + ARM32_R15: sprintf( info->s, "R15 :%08x", cpustate->sArmRegister[15] ); break;
- case CPUINFO_STR_REGISTER + ARM32_FR8: sprintf( info->s, "FR8 :%08x", cpustate->sArmRegister[eR8_FIQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_FR9: sprintf( info->s, "FR9 :%08x", cpustate->sArmRegister[eR9_FIQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_FR10: sprintf( info->s, "FR10:%08x", cpustate->sArmRegister[eR10_FIQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_FR11: sprintf( info->s, "FR11:%08x", cpustate->sArmRegister[eR11_FIQ]); break;
- case CPUINFO_STR_REGISTER + ARM32_FR12: sprintf( info->s, "FR12:%08x", cpustate->sArmRegister[eR12_FIQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_FR13: sprintf( info->s, "FR13:%08x", cpustate->sArmRegister[eR13_FIQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_FR14: sprintf( info->s, "FR14:%08x", cpustate->sArmRegister[eR14_FIQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_IR13: sprintf( info->s, "IR13:%08x", cpustate->sArmRegister[eR13_IRQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_IR14: sprintf( info->s, "IR14:%08x", cpustate->sArmRegister[eR14_IRQ] ); break;
- case CPUINFO_STR_REGISTER + ARM32_SR13: sprintf( info->s, "SR13:%08x", cpustate->sArmRegister[eR13_SVC] ); break;
- case CPUINFO_STR_REGISTER + ARM32_SR14: sprintf( info->s, "SR14:%08x", cpustate->sArmRegister[eR14_SVC] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_PC: sprintf( info->s, "PC :%08x", cpustate->sArmRegister[15]&ADDRESS_MASK ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R0: sprintf( info->s, "R0 :%08x", cpustate->sArmRegister[ 0] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R1: sprintf( info->s, "R1 :%08x", cpustate->sArmRegister[ 1] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R2: sprintf( info->s, "R2 :%08x", cpustate->sArmRegister[ 2] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R3: sprintf( info->s, "R3 :%08x", cpustate->sArmRegister[ 3] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R4: sprintf( info->s, "R4 :%08x", cpustate->sArmRegister[ 4] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R5: sprintf( info->s, "R5 :%08x", cpustate->sArmRegister[ 5] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R6: sprintf( info->s, "R6 :%08x", cpustate->sArmRegister[ 6] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R7: sprintf( info->s, "R7 :%08x", cpustate->sArmRegister[ 7] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R8: sprintf( info->s, "R8 :%08x", cpustate->sArmRegister[ 8] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R9: sprintf( info->s, "R9 :%08x", cpustate->sArmRegister[ 9] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R10: sprintf( info->s, "R10 :%08x", cpustate->sArmRegister[10] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R11: sprintf( info->s, "R11 :%08x", cpustate->sArmRegister[11] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R12: sprintf( info->s, "R12 :%08x", cpustate->sArmRegister[12] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R13: sprintf( info->s, "R13 :%08x", cpustate->sArmRegister[13] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R14: sprintf( info->s, "R14 :%08x", cpustate->sArmRegister[14] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_R15: sprintf( info->s, "R15 :%08x", cpustate->sArmRegister[15] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_FR8: sprintf( info->s, "FR8 :%08x", cpustate->sArmRegister[eR8_FIQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_FR9: sprintf( info->s, "FR9 :%08x", cpustate->sArmRegister[eR9_FIQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_FR10: sprintf( info->s, "FR10:%08x", cpustate->sArmRegister[eR10_FIQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_FR11: sprintf( info->s, "FR11:%08x", cpustate->sArmRegister[eR11_FIQ]); break;
+ case CPUINFO_STR_REGISTER + ARM32_FR12: sprintf( info->s, "FR12:%08x", cpustate->sArmRegister[eR12_FIQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_FR13: sprintf( info->s, "FR13:%08x", cpustate->sArmRegister[eR13_FIQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_FR14: sprintf( info->s, "FR14:%08x", cpustate->sArmRegister[eR14_FIQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_IR13: sprintf( info->s, "IR13:%08x", cpustate->sArmRegister[eR13_IRQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_IR14: sprintf( info->s, "IR14:%08x", cpustate->sArmRegister[eR14_IRQ] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_SR13: sprintf( info->s, "SR13:%08x", cpustate->sArmRegister[eR13_SVC] ); break;
+ case CPUINFO_STR_REGISTER + ARM32_SR14: sprintf( info->s, "SR14:%08x", cpustate->sArmRegister[eR14_SVC] ); break;
}
}
@@ -1632,20 +1632,19 @@ CPU_GET_INFO( arm_be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(arm_be); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm_be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(arm_be); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm_be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "ARM (big endian)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ARM (big endian)"); break;
- default: CPU_GET_INFO_CALL(arm); break;
+ default: CPU_GET_INFO_CALL(arm); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(ARM, arm);
DEFINE_LEGACY_CPU_DEVICE(ARM_BE, arm_be);
-
diff --git a/src/emu/cpu/arm/arm.h b/src/emu/cpu/arm/arm.h
index 19297096a68..5bb45608218 100644
--- a/src/emu/cpu/arm/arm.h
+++ b/src/emu/cpu/arm/arm.h
@@ -7,8 +7,8 @@
* INTERRUPT CONSTANTS
***************************************************************************************************/
-#define ARM_IRQ_LINE 0
-#define ARM_FIRQ_LINE 1
+#define ARM_IRQ_LINE 0
+#define ARM_FIRQ_LINE 1
/****************************************************************************************************
* PUBLIC FUNCTIONS
diff --git a/src/emu/cpu/arm/armdasm.c b/src/emu/cpu/arm/armdasm.c
index 0d596fb5597..fedb5cdc24e 100644
--- a/src/emu/cpu/arm/armdasm.c
+++ b/src/emu/cpu/arm/armdasm.c
@@ -404,4 +404,3 @@ CPU_DISASSEMBLE( arm_be )
UINT32 opcode = oprom[3] | (oprom[2] << 8) | (oprom[1] << 16) | (oprom[0] << 24);
return 4 | arm_disasm(buffer, pc, opcode);
}
-
diff --git a/src/emu/cpu/arm7/arm7.c b/src/emu/cpu/arm7/arm7.c
index 882b6f2ffc6..7a79d82a16d 100644
--- a/src/emu/cpu/arm7/arm7.c
+++ b/src/emu/cpu/arm7/arm7.c
@@ -102,42 +102,42 @@ void set_cpsr( arm_state *cpustate, UINT32 val)
enum
{
- TLB_COARSE = 0,
- TLB_FINE,
+ TLB_COARSE = 0,
+ TLB_FINE,
};
enum
{
- FAULT_NONE = 0,
- FAULT_DOMAIN,
- FAULT_PERMISSION,
+ FAULT_NONE = 0,
+ FAULT_DOMAIN,
+ FAULT_PERMISSION,
};
INLINE UINT32 arm7_tlb_get_first_level_descriptor( arm_state *cpustate, UINT32 vaddr )
{
- UINT32 entry_paddr = ( COPRO_TLB_BASE & COPRO_TLB_BASE_MASK ) | ( ( vaddr & COPRO_TLB_VADDR_FLTI_MASK ) >> COPRO_TLB_VADDR_FLTI_MASK_SHIFT );
- return cpustate->program->read_dword( entry_paddr );
+ UINT32 entry_paddr = ( COPRO_TLB_BASE & COPRO_TLB_BASE_MASK ) | ( ( vaddr & COPRO_TLB_VADDR_FLTI_MASK ) >> COPRO_TLB_VADDR_FLTI_MASK_SHIFT );
+ return cpustate->program->read_dword( entry_paddr );
}
INLINE UINT32 arm7_tlb_get_second_level_descriptor( arm_state *cpustate, UINT32 granularity, UINT32 first_desc, UINT32 vaddr )
{
- UINT32 desc_lvl2 = vaddr;
-
- switch( granularity )
- {
- case TLB_COARSE:
- desc_lvl2 = ( first_desc & COPRO_TLB_CFLD_ADDR_MASK ) | ( ( vaddr & COPRO_TLB_VADDR_CSLTI_MASK ) >> COPRO_TLB_VADDR_CSLTI_MASK_SHIFT );
- break;
- case TLB_FINE:
- LOG( ( "ARM7: Attempting to get second-level TLB descriptor of fine granularity\n" ) );
- break;
- default:
- // We shouldn't be here
- LOG( ( "ARM7: Attempting to get second-level TLB descriptor of invalid granularity (%d)\n", granularity ) );
- break;
- }
-
- return cpustate->program->read_dword( desc_lvl2 );
+ UINT32 desc_lvl2 = vaddr;
+
+ switch( granularity )
+ {
+ case TLB_COARSE:
+ desc_lvl2 = ( first_desc & COPRO_TLB_CFLD_ADDR_MASK ) | ( ( vaddr & COPRO_TLB_VADDR_CSLTI_MASK ) >> COPRO_TLB_VADDR_CSLTI_MASK_SHIFT );
+ break;
+ case TLB_FINE:
+ LOG( ( "ARM7: Attempting to get second-level TLB descriptor of fine granularity\n" ) );
+ break;
+ default:
+ // We shouldn't be here
+ LOG( ( "ARM7: Attempting to get second-level TLB descriptor of invalid granularity (%d)\n", granularity ) );
+ break;
+ }
+
+ return cpustate->program->read_dword( desc_lvl2 );
}
INLINE int detect_fault( arm_state *cpustate, int permission, int ap, int flags)
@@ -227,174 +227,174 @@ INLINE int detect_fault( arm_state *cpustate, int permission, int ap, int flags)
int arm7_tlb_translate(arm_state *cpustate, UINT32 *addr, int flags)
{
- UINT32 desc_lvl1;
- UINT32 desc_lvl2 = 0;
- UINT32 paddr, vaddr = *addr;
- UINT8 domain, permission;
+ UINT32 desc_lvl1;
+ UINT32 desc_lvl2 = 0;
+ UINT32 paddr, vaddr = *addr;
+ UINT8 domain, permission;
- if (vaddr < 32 * 1024 * 1024)
- {
- UINT32 pid = ((COPRO_FCSE_PID >> 25) & 0x7F);
- if (pid > 0)
- {
- //LOG( ( "ARM7: FCSE PID vaddr %08X -> %08X\n", vaddr, vaddr + (pid * (32 * 1024 * 1024))) );
- vaddr = vaddr + (((COPRO_FCSE_PID >> 25) & 0x7F) * (32 * 1024 * 1024));
- }
- }
+ if (vaddr < 32 * 1024 * 1024)
+ {
+ UINT32 pid = ((COPRO_FCSE_PID >> 25) & 0x7F);
+ if (pid > 0)
+ {
+ //LOG( ( "ARM7: FCSE PID vaddr %08X -> %08X\n", vaddr, vaddr + (pid * (32 * 1024 * 1024))) );
+ vaddr = vaddr + (((COPRO_FCSE_PID >> 25) & 0x7F) * (32 * 1024 * 1024));
+ }
+ }
- desc_lvl1 = arm7_tlb_get_first_level_descriptor( cpustate, vaddr );
+ desc_lvl1 = arm7_tlb_get_first_level_descriptor( cpustate, vaddr );
- paddr = vaddr;
+ paddr = vaddr;
#if ARM7_MMU_ENABLE_HACK
- if ((R15 == (cpustate->mmu_enable_addr + 4)) || (R15 == (cpustate->mmu_enable_addr + 8)))
- {
- LOG( ( "ARM7: fetch flat, PC = %08x, vaddr = %08x\n", R15, vaddr ) );
- *addr = vaddr;
- return TRUE;
- }
- else
- {
- cpustate->mmu_enable_addr = 1;
- }
+ if ((R15 == (cpustate->mmu_enable_addr + 4)) || (R15 == (cpustate->mmu_enable_addr + 8)))
+ {
+ LOG( ( "ARM7: fetch flat, PC = %08x, vaddr = %08x\n", R15, vaddr ) );
+ *addr = vaddr;
+ return TRUE;
+ }
+ else
+ {
+ cpustate->mmu_enable_addr = 1;
+ }
#endif
domain = (desc_lvl1 >> 5) & 0xF;
permission = (COPRO_DOMAIN_ACCESS_CONTROL >> (domain << 1)) & 3;
- switch( desc_lvl1 & 3 )
- {
- case COPRO_TLB_UNMAPPED:
- // Unmapped, generate a translation fault
- if (flags & ARM7_TLB_ABORT_D)
- {
- LOG( ( "ARM7: Translation fault on unmapped virtual address, PC = %08x, vaddr = %08x\n", R15, vaddr ) );
- COPRO_FAULT_STATUS_D = (5 << 0); // 5 = section translation fault
- COPRO_FAULT_ADDRESS = vaddr;
- cpustate->pendingAbtD = 1;
- }
- else if (flags & ARM7_TLB_ABORT_P)
- {
- LOG( ( "ARM7: Translation fault on unmapped virtual address, PC = %08x, vaddr = %08x\n", R15, vaddr ) );
- cpustate->pendingAbtP = 1;
- }
- return FALSE;
- case COPRO_TLB_COARSE_TABLE:
- // Entry is the physical address of a coarse second-level table
- if ((permission == 1) || (permission == 3))
- {
- desc_lvl2 = arm7_tlb_get_second_level_descriptor( cpustate, TLB_COARSE, desc_lvl1, vaddr );
- }
- else
- {
- fatalerror("ARM7: Not Yet Implemented: Coarse Table, Section Domain fault on virtual address, vaddr = %08x, domain = %08x, PC = %08x\n", vaddr, domain, R15);
- }
- break;
- case COPRO_TLB_SECTION_TABLE:
- {
- // Entry is a section
- UINT8 ap = (desc_lvl1 >> 10) & 3;
- int fault = detect_fault( cpustate, permission, ap, flags);
- if (fault == FAULT_NONE)
- {
- paddr = ( desc_lvl1 & COPRO_TLB_SECTION_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_SECTION_PAGE_MASK );
- }
- else
- {
- if (flags & ARM7_TLB_ABORT_D)
- {
- LOG( ( "ARM7: Section Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
- COPRO_FAULT_STATUS_D = ((fault == FAULT_DOMAIN) ? (9 << 0) : (13 << 0)) | (domain << 4); // 9 = section domain fault, 13 = section permission fault
- COPRO_FAULT_ADDRESS = vaddr;
- cpustate->pendingAbtD = 1;
- LOG( ( "vaddr %08X desc_lvl1 %08X domain %d permission %d ap %d s %d r %d mode %d read %d write %d\n",
- vaddr, desc_lvl1, domain, permission, ap, (COPRO_CTRL & COPRO_CTRL_SYSTEM) ? 1 : 0, (COPRO_CTRL & COPRO_CTRL_ROM) ? 1 : 0,
- GET_MODE, flags & ARM7_TLB_READ ? 1 : 0, flags & ARM7_TLB_WRITE ? 1 : 0) );
- }
- else if (flags & ARM7_TLB_ABORT_P)
- {
- LOG( ( "ARM7: Section Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
- cpustate->pendingAbtP = 1;
- }
- return FALSE;
- }
- }
- break;
- case COPRO_TLB_FINE_TABLE:
- // Entry is the physical address of a fine second-level table
- fatalerror("ARM7: Not Yet Implemented: fine second-level TLB lookup, PC = %08x, vaddr = %08x\n", R15, vaddr);
- break;
- default:
- // Entry is the physical address of a three-legged termite-eaten table
- break;
- }
-
- if( ( desc_lvl1 & 3 ) == COPRO_TLB_COARSE_TABLE || ( desc_lvl1 & 3 ) == COPRO_TLB_FINE_TABLE )
- {
- switch( desc_lvl2 & 3 )
- {
- case COPRO_TLB_UNMAPPED:
- // Unmapped, generate a translation fault
- if (flags & ARM7_TLB_ABORT_D)
- {
- LOG( ( "ARM7: Translation fault on unmapped virtual address, vaddr = %08x, PC %08X\n", vaddr, R15 ) );
- COPRO_FAULT_STATUS_D = (7 << 0) | (domain << 4); // 7 = page translation fault
- COPRO_FAULT_ADDRESS = vaddr;
- cpustate->pendingAbtD = 1;
- }
- else if (flags & ARM7_TLB_ABORT_P)
- {
- LOG( ( "ARM7: Translation fault on unmapped virtual address, vaddr = %08x, PC %08X\n", vaddr, R15 ) );
- cpustate->pendingAbtP = 1;
- }
- return FALSE;
- case COPRO_TLB_LARGE_PAGE:
- // Large page descriptor
- paddr = ( desc_lvl2 & COPRO_TLB_LARGE_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_LARGE_PAGE_MASK );
- break;
- case COPRO_TLB_SMALL_PAGE:
- // Small page descriptor
- {
+ switch( desc_lvl1 & 3 )
+ {
+ case COPRO_TLB_UNMAPPED:
+ // Unmapped, generate a translation fault
+ if (flags & ARM7_TLB_ABORT_D)
+ {
+ LOG( ( "ARM7: Translation fault on unmapped virtual address, PC = %08x, vaddr = %08x\n", R15, vaddr ) );
+ COPRO_FAULT_STATUS_D = (5 << 0); // 5 = section translation fault
+ COPRO_FAULT_ADDRESS = vaddr;
+ cpustate->pendingAbtD = 1;
+ }
+ else if (flags & ARM7_TLB_ABORT_P)
+ {
+ LOG( ( "ARM7: Translation fault on unmapped virtual address, PC = %08x, vaddr = %08x\n", R15, vaddr ) );
+ cpustate->pendingAbtP = 1;
+ }
+ return FALSE;
+ case COPRO_TLB_COARSE_TABLE:
+ // Entry is the physical address of a coarse second-level table
+ if ((permission == 1) || (permission == 3))
+ {
+ desc_lvl2 = arm7_tlb_get_second_level_descriptor( cpustate, TLB_COARSE, desc_lvl1, vaddr );
+ }
+ else
+ {
+ fatalerror("ARM7: Not Yet Implemented: Coarse Table, Section Domain fault on virtual address, vaddr = %08x, domain = %08x, PC = %08x\n", vaddr, domain, R15);
+ }
+ break;
+ case COPRO_TLB_SECTION_TABLE:
+ {
+ // Entry is a section
+ UINT8 ap = (desc_lvl1 >> 10) & 3;
+ int fault = detect_fault( cpustate, permission, ap, flags);
+ if (fault == FAULT_NONE)
+ {
+ paddr = ( desc_lvl1 & COPRO_TLB_SECTION_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_SECTION_PAGE_MASK );
+ }
+ else
+ {
+ if (flags & ARM7_TLB_ABORT_D)
+ {
+ LOG( ( "ARM7: Section Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
+ COPRO_FAULT_STATUS_D = ((fault == FAULT_DOMAIN) ? (9 << 0) : (13 << 0)) | (domain << 4); // 9 = section domain fault, 13 = section permission fault
+ COPRO_FAULT_ADDRESS = vaddr;
+ cpustate->pendingAbtD = 1;
+ LOG( ( "vaddr %08X desc_lvl1 %08X domain %d permission %d ap %d s %d r %d mode %d read %d write %d\n",
+ vaddr, desc_lvl1, domain, permission, ap, (COPRO_CTRL & COPRO_CTRL_SYSTEM) ? 1 : 0, (COPRO_CTRL & COPRO_CTRL_ROM) ? 1 : 0,
+ GET_MODE, flags & ARM7_TLB_READ ? 1 : 0, flags & ARM7_TLB_WRITE ? 1 : 0) );
+ }
+ else if (flags & ARM7_TLB_ABORT_P)
+ {
+ LOG( ( "ARM7: Section Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
+ cpustate->pendingAbtP = 1;
+ }
+ return FALSE;
+ }
+ }
+ break;
+ case COPRO_TLB_FINE_TABLE:
+ // Entry is the physical address of a fine second-level table
+ fatalerror("ARM7: Not Yet Implemented: fine second-level TLB lookup, PC = %08x, vaddr = %08x\n", R15, vaddr);
+ break;
+ default:
+ // Entry is the physical address of a three-legged termite-eaten table
+ break;
+ }
+
+ if( ( desc_lvl1 & 3 ) == COPRO_TLB_COARSE_TABLE || ( desc_lvl1 & 3 ) == COPRO_TLB_FINE_TABLE )
+ {
+ switch( desc_lvl2 & 3 )
+ {
+ case COPRO_TLB_UNMAPPED:
+ // Unmapped, generate a translation fault
+ if (flags & ARM7_TLB_ABORT_D)
+ {
+ LOG( ( "ARM7: Translation fault on unmapped virtual address, vaddr = %08x, PC %08X\n", vaddr, R15 ) );
+ COPRO_FAULT_STATUS_D = (7 << 0) | (domain << 4); // 7 = page translation fault
+ COPRO_FAULT_ADDRESS = vaddr;
+ cpustate->pendingAbtD = 1;
+ }
+ else if (flags & ARM7_TLB_ABORT_P)
+ {
+ LOG( ( "ARM7: Translation fault on unmapped virtual address, vaddr = %08x, PC %08X\n", vaddr, R15 ) );
+ cpustate->pendingAbtP = 1;
+ }
+ return FALSE;
+ case COPRO_TLB_LARGE_PAGE:
+ // Large page descriptor
+ paddr = ( desc_lvl2 & COPRO_TLB_LARGE_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_LARGE_PAGE_MASK );
+ break;
+ case COPRO_TLB_SMALL_PAGE:
+ // Small page descriptor
+ {
UINT8 ap = ((((desc_lvl2 >> 4) & 0xFF) >> (((vaddr >> 10) & 3) << 1)) & 3);
int fault = detect_fault( cpustate, permission, ap, flags);
if (fault == FAULT_NONE)
- {
- paddr = ( desc_lvl2 & COPRO_TLB_SMALL_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_SMALL_PAGE_MASK );
- }
- else
- {
- if (flags & ARM7_TLB_ABORT_D)
- {
- // hapyfish expects a data abort when something tries to write to a read-only memory location from user mode
- LOG( ( "ARM7: Page Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
- COPRO_FAULT_STATUS_D = ((fault == FAULT_DOMAIN) ? (11 << 0) : (15 << 0)) | (domain << 4); // 11 = page domain fault, 15 = page permission fault
- COPRO_FAULT_ADDRESS = vaddr;
- cpustate->pendingAbtD = 1;
- LOG( ( "vaddr %08X desc_lvl2 %08X domain %d permission %d ap %d s %d r %d mode %d read %d write %d\n",
- vaddr, desc_lvl2, domain, permission, ap, (COPRO_CTRL & COPRO_CTRL_SYSTEM) ? 1 : 0, (COPRO_CTRL & COPRO_CTRL_ROM) ? 1 : 0,
- GET_MODE, flags & ARM7_TLB_READ ? 1 : 0, flags & ARM7_TLB_WRITE ? 1 : 0) );
- }
- else if (flags & ARM7_TLB_ABORT_P)
- {
- LOG( ( "ARM7: Page Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
- cpustate->pendingAbtP = 1;
- }
- return FALSE;
- }
- }
- break;
- case COPRO_TLB_TINY_PAGE:
- // Tiny page descriptor
- if( ( desc_lvl1 & 3 ) == 1 )
- {
- LOG( ( "ARM7: It would appear that we're looking up a tiny page from a coarse TLB lookup. This is bad. vaddr = %08x\n", vaddr ) );
- }
- paddr = ( desc_lvl2 & COPRO_TLB_TINY_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_TINY_PAGE_MASK );
- break;
- }
- }
+ {
+ paddr = ( desc_lvl2 & COPRO_TLB_SMALL_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_SMALL_PAGE_MASK );
+ }
+ else
+ {
+ if (flags & ARM7_TLB_ABORT_D)
+ {
+ // hapyfish expects a data abort when something tries to write to a read-only memory location from user mode
+ LOG( ( "ARM7: Page Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
+ COPRO_FAULT_STATUS_D = ((fault == FAULT_DOMAIN) ? (11 << 0) : (15 << 0)) | (domain << 4); // 11 = page domain fault, 15 = page permission fault
+ COPRO_FAULT_ADDRESS = vaddr;
+ cpustate->pendingAbtD = 1;
+ LOG( ( "vaddr %08X desc_lvl2 %08X domain %d permission %d ap %d s %d r %d mode %d read %d write %d\n",
+ vaddr, desc_lvl2, domain, permission, ap, (COPRO_CTRL & COPRO_CTRL_SYSTEM) ? 1 : 0, (COPRO_CTRL & COPRO_CTRL_ROM) ? 1 : 0,
+ GET_MODE, flags & ARM7_TLB_READ ? 1 : 0, flags & ARM7_TLB_WRITE ? 1 : 0) );
+ }
+ else if (flags & ARM7_TLB_ABORT_P)
+ {
+ LOG( ( "ARM7: Page Table, Section %s fault on virtual address, vaddr = %08x, PC = %08x\n", (fault == FAULT_DOMAIN) ? "domain" : "permission", vaddr, R15 ) );
+ cpustate->pendingAbtP = 1;
+ }
+ return FALSE;
+ }
+ }
+ break;
+ case COPRO_TLB_TINY_PAGE:
+ // Tiny page descriptor
+ if( ( desc_lvl1 & 3 ) == 1 )
+ {
+ LOG( ( "ARM7: It would appear that we're looking up a tiny page from a coarse TLB lookup. This is bad. vaddr = %08x\n", vaddr ) );
+ }
+ paddr = ( desc_lvl2 & COPRO_TLB_TINY_PAGE_MASK ) | ( vaddr & ~COPRO_TLB_TINY_PAGE_MASK );
+ break;
+ }
+ }
*addr = paddr;
- return TRUE;
+ return TRUE;
}
static CPU_TRANSLATE( arm7 )
@@ -443,8 +443,8 @@ static CPU_RESET( arm7 )
// must call core reset
arm7_core_reset(device);
- cpustate->archRev = 4; // ARMv4
- cpustate->archFlags = eARM_ARCHFLAGS_T; // has Thumb
+ cpustate->archRev = 4; // ARMv4
+ cpustate->archFlags = eARM_ARCHFLAGS_T; // has Thumb
}
static CPU_RESET( arm7_be )
@@ -462,7 +462,7 @@ static CPU_RESET( arm7500 )
// must call core reset
arm7_core_reset(device);
- cpustate->archRev = 3; // ARMv3
+ cpustate->archRev = 3; // ARMv3
cpustate->archFlags = eARM_ARCHFLAGS_MODE26;
}
@@ -473,8 +473,8 @@ static CPU_RESET( arm9 )
// must call core reset
arm7_core_reset(device);
- cpustate->archRev = 5; // ARMv5
- cpustate->archFlags = eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E; // has TE extensions
+ cpustate->archRev = 5; // ARMv5
+ cpustate->archFlags = eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E; // has TE extensions
}
static CPU_RESET( arm920t )
@@ -484,8 +484,8 @@ static CPU_RESET( arm920t )
// must call core reset
arm7_core_reset(device);
- cpustate->archRev = 4; // ARMv4
- cpustate->archFlags = eARM_ARCHFLAGS_T; // has T extension
+ cpustate->archRev = 4; // ARMv4
+ cpustate->archFlags = eARM_ARCHFLAGS_T; // has T extension
}
static CPU_RESET( pxa255 )
@@ -495,8 +495,8 @@ static CPU_RESET( pxa255 )
// must call core reset
arm7_core_reset(device);
- cpustate->archRev = 5; // ARMv5
- cpustate->archFlags = eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E | eARM_ARCHFLAGS_XSCALE; // has TE and XScale extensions
+ cpustate->archRev = 5; // ARMv5
+ cpustate->archFlags = eARM_ARCHFLAGS_T | eARM_ARCHFLAGS_E | eARM_ARCHFLAGS_XSCALE; // has TE and XScale extensions
}
static CPU_RESET( sa1110 )
@@ -506,8 +506,8 @@ static CPU_RESET( sa1110 )
// must call core reset
arm7_core_reset(device);
- cpustate->archRev = 4; // ARMv4
- cpustate->archFlags = eARM_ARCHFLAGS_SA; // has StrongARM, no Thumb, no Enhanced DSP
+ cpustate->archRev = 4; // ARMv4
+ cpustate->archFlags = eARM_ARCHFLAGS_SA; // has StrongARM, no Thumb, no Enhanced DSP
}
static CPU_EXIT( arm7 )
@@ -521,53 +521,53 @@ static CPU_EXIT( arm7 )
static CPU_EXECUTE( arm7 )
{
- UINT32 pc;
- UINT32 insn;
- arm_state *cpustate = get_safe_token(device);
+ UINT32 pc;
+ UINT32 insn;
+ arm_state *cpustate = get_safe_token(device);
- do
- {
- debugger_instruction_hook(cpustate->device, GET_PC);
+ do
+ {
+ debugger_instruction_hook(cpustate->device, GET_PC);
- /* handle Thumb instructions if active */
- if (T_IS_SET(GET_CPSR))
- {
+ /* handle Thumb instructions if active */
+ if (T_IS_SET(GET_CPSR))
+ {
UINT32 raddr;
- pc = R15;
+ pc = R15;
// "In Thumb state, bit [0] is undefined and must be ignored. Bits [31:1] contain the PC."
raddr = pc & (~1);
if ( COPRO_CTRL & COPRO_CTRL_MMU_EN )
{
- if (!arm7_tlb_translate(cpustate, &raddr, ARM7_TLB_ABORT_P | ARM7_TLB_READ))
- {
- goto skip_exec;
- }
+ if (!arm7_tlb_translate(cpustate, &raddr, ARM7_TLB_ABORT_P | ARM7_TLB_READ))
+ {
+ goto skip_exec;
+ }
}
insn = cpustate->direct->read_decrypted_word(raddr);
thumb_handler[(insn & 0xffc0) >> 6](cpustate, pc, insn);
- }
- else
- {
+ }
+ else
+ {
UINT32 raddr;
- /* load 32 bit instruction */
- pc = GET_PC;
+ /* load 32 bit instruction */
+ pc = GET_PC;
// "In ARM state, bits [1:0] of r15 are undefined and must be ignored. Bits [31:2] contain the PC."
raddr = pc & (~3);
- if ( COPRO_CTRL & COPRO_CTRL_MMU_EN )
- {
- if (!arm7_tlb_translate(cpustate, &raddr, ARM7_TLB_ABORT_P | ARM7_TLB_READ))
- {
- goto skip_exec;
- }
- }
+ if ( COPRO_CTRL & COPRO_CTRL_MMU_EN )
+ {
+ if (!arm7_tlb_translate(cpustate, &raddr, ARM7_TLB_ABORT_P | ARM7_TLB_READ))
+ {
+ goto skip_exec;
+ }
+ }
#if 0
if (MODE26)
@@ -579,11 +579,11 @@ static CPU_EXECUTE( arm7 )
}
#endif
- insn = cpustate->direct->read_decrypted_dword(raddr);
+ insn = cpustate->direct->read_decrypted_dword(raddr);
- /* process condition codes for this instruction */
- switch (insn >> INSN_COND_SHIFT)
- {
+ /* process condition codes for this instruction */
+ switch (insn >> INSN_COND_SHIFT)
+ {
case COND_EQ:
if (Z_IS_CLEAR(GET_CPSR))
{ UNEXECUTED(); goto skip_exec; }
@@ -638,31 +638,31 @@ static CPU_EXECUTE( arm7 )
break;
case COND_LE:
if (Z_IS_CLEAR(GET_CPSR) && (!(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK)))
- { UNEXECUTED(); goto skip_exec; }
+ { UNEXECUTED(); goto skip_exec; }
break;
case COND_NV:
{ UNEXECUTED(); goto skip_exec; }
break;
- }
- /*******************************************************************/
- /* If we got here - condition satisfied, so decode the instruction */
- /*******************************************************************/
+ }
+ /*******************************************************************/
+ /* If we got here - condition satisfied, so decode the instruction */
+ /*******************************************************************/
ops_handler[((insn & 0xF000000) >> 24)](cpustate, insn);
}
skip_exec:
- ARM7_CHECKIRQ;
+ ARM7_CHECKIRQ;
- /* All instructions remove 3 cycles.. Others taking less / more will have adjusted this # prior to here */
- ARM7_ICOUNT -= 3;
- } while (ARM7_ICOUNT > 0);
+ /* All instructions remove 3 cycles.. Others taking less / more will have adjusted this # prior to here */
+ ARM7_ICOUNT -= 3;
+ } while (ARM7_ICOUNT > 0);
}
static void set_irq_line(arm_state *cpustate, int irqline, int state)
{
- // must call core
- arm7_core_set_irq_line(cpustate, irqline, state);
+ // must call core
+ arm7_core_set_irq_line(cpustate, irqline, state);
}
static CPU_DISASSEMBLE( arm7 )
@@ -670,12 +670,12 @@ static CPU_DISASSEMBLE( arm7 )
CPU_DISASSEMBLE( arm7arm );
CPU_DISASSEMBLE( arm7thumb );
- arm_state *cpustate = get_safe_token(device);
+ arm_state *cpustate = get_safe_token(device);
- if (T_IS_SET(GET_CPSR))
- return CPU_DISASSEMBLE_CALL(arm7thumb);
- else
- return CPU_DISASSEMBLE_CALL(arm7arm);
+ if (T_IS_SET(GET_CPSR))
+ return CPU_DISASSEMBLE_CALL(arm7thumb);
+ else
+ return CPU_DISASSEMBLE_CALL(arm7arm);
}
static CPU_DISASSEMBLE( arm7_be )
@@ -698,72 +698,72 @@ static CPU_DISASSEMBLE( arm7_be )
static CPU_SET_INFO( arm7 )
{
- arm_state *cpustate = get_safe_token(device);
-
- switch (state)
- {
- /* --- the following bits of info are set as 64-bit signed integers --- */
-
- /* interrupt lines/exceptions */
- case CPUINFO_INT_INPUT_STATE + ARM7_IRQ_LINE: set_irq_line(cpustate, ARM7_IRQ_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + ARM7_FIRQ_LINE: set_irq_line(cpustate, ARM7_FIRQ_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_EXCEPTION: set_irq_line(cpustate, ARM7_ABORT_EXCEPTION, info->i); break;
- case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_PREFETCH_EXCEPTION: set_irq_line(cpustate, ARM7_ABORT_PREFETCH_EXCEPTION, info->i); break;
- case CPUINFO_INT_INPUT_STATE + ARM7_UNDEFINE_EXCEPTION: set_irq_line(cpustate, ARM7_UNDEFINE_EXCEPTION, info->i); break;
-
- /* registers shared by all operating modes */
- case CPUINFO_INT_REGISTER + ARM7_R0: ARM7REG( 0) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R1: ARM7REG( 1) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R2: ARM7REG( 2) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R3: ARM7REG( 3) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R4: ARM7REG( 4) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R5: ARM7REG( 5) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R6: ARM7REG( 6) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R7: ARM7REG( 7) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R8: ARM7REG( 8) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R9: ARM7REG( 9) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R10: ARM7REG(10) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R11: ARM7REG(11) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R12: ARM7REG(12) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R13: ARM7REG(13) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R14: ARM7REG(14) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_R15: ARM7REG(15) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_CPSR: SET_CPSR(info->i); break;
-
- case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + ARM7_PC: R15 = info->i; break;
- case CPUINFO_INT_SP: SetRegister(cpustate, 13,info->i); break;
-
- /* FIRQ Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_FR8: ARM7REG(eR8_FIQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_FR9: ARM7REG(eR9_FIQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_FR10: ARM7REG(eR10_FIQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_FR11: ARM7REG(eR11_FIQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_FR12: ARM7REG(eR12_FIQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_FR13: ARM7REG(eR13_FIQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_FR14: ARM7REG(eR14_FIQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_FSPSR: ARM7REG(eSPSR_FIQ) = info->i; break;
-
- /* IRQ Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_IR13: ARM7REG(eR13_IRQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_IR14: ARM7REG(eR14_IRQ) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_ISPSR: ARM7REG(eSPSR_IRQ) = info->i; break;
-
- /* Supervisor Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_SR13: ARM7REG(eR13_SVC) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_SR14: ARM7REG(eR14_SVC) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_SSPSR: ARM7REG(eSPSR_SVC) = info->i; break;
-
- /* Abort Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_AR13: ARM7REG(eR13_ABT) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_AR14: ARM7REG(eR14_ABT) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_ASPSR: ARM7REG(eSPSR_ABT) = info->i; break;
-
- /* Undefined Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_UR13: ARM7REG(eR13_UND) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_UR14: ARM7REG(eR14_UND) = info->i; break;
- case CPUINFO_INT_REGISTER + ARM7_USPSR: ARM7REG(eSPSR_UND) = info->i; break;
- }
+ arm_state *cpustate = get_safe_token(device);
+
+ switch (state)
+ {
+ /* --- the following bits of info are set as 64-bit signed integers --- */
+
+ /* interrupt lines/exceptions */
+ case CPUINFO_INT_INPUT_STATE + ARM7_IRQ_LINE: set_irq_line(cpustate, ARM7_IRQ_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_FIRQ_LINE: set_irq_line(cpustate, ARM7_FIRQ_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_EXCEPTION: set_irq_line(cpustate, ARM7_ABORT_EXCEPTION, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_PREFETCH_EXCEPTION: set_irq_line(cpustate, ARM7_ABORT_PREFETCH_EXCEPTION, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_UNDEFINE_EXCEPTION: set_irq_line(cpustate, ARM7_UNDEFINE_EXCEPTION, info->i); break;
+
+ /* registers shared by all operating modes */
+ case CPUINFO_INT_REGISTER + ARM7_R0: ARM7REG( 0) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R1: ARM7REG( 1) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R2: ARM7REG( 2) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R3: ARM7REG( 3) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R4: ARM7REG( 4) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R5: ARM7REG( 5) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R6: ARM7REG( 6) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R7: ARM7REG( 7) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R8: ARM7REG( 8) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R9: ARM7REG( 9) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R10: ARM7REG(10) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R11: ARM7REG(11) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R12: ARM7REG(12) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R13: ARM7REG(13) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R14: ARM7REG(14) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_R15: ARM7REG(15) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_CPSR: SET_CPSR(info->i); break;
+
+ case CPUINFO_INT_PC:
+ case CPUINFO_INT_REGISTER + ARM7_PC: R15 = info->i; break;
+ case CPUINFO_INT_SP: SetRegister(cpustate, 13,info->i); break;
+
+ /* FIRQ Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_FR8: ARM7REG(eR8_FIQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_FR9: ARM7REG(eR9_FIQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_FR10: ARM7REG(eR10_FIQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_FR11: ARM7REG(eR11_FIQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_FR12: ARM7REG(eR12_FIQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_FR13: ARM7REG(eR13_FIQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_FR14: ARM7REG(eR14_FIQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_FSPSR: ARM7REG(eSPSR_FIQ) = info->i; break;
+
+ /* IRQ Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_IR13: ARM7REG(eR13_IRQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_IR14: ARM7REG(eR14_IRQ) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_ISPSR: ARM7REG(eSPSR_IRQ) = info->i; break;
+
+ /* Supervisor Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_SR13: ARM7REG(eR13_SVC) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_SR14: ARM7REG(eR14_SVC) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_SSPSR: ARM7REG(eSPSR_SVC) = info->i; break;
+
+ /* Abort Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_AR13: ARM7REG(eR13_ABT) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_AR14: ARM7REG(eR14_ABT) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_ASPSR: ARM7REG(eSPSR_ABT) = info->i; break;
+
+ /* Undefined Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_UR13: ARM7REG(eR13_UND) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_UR14: ARM7REG(eR14_UND) = info->i; break;
+ case CPUINFO_INT_REGISTER + ARM7_USPSR: ARM7REG(eSPSR_UND) = info->i; break;
+ }
}
@@ -774,174 +774,174 @@ static CPU_SET_INFO( arm7 )
CPU_GET_INFO( arm7 )
{
- arm_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
-
- switch (state)
- {
- /* --- the following bits of info are returned as 64-bit signed integers --- */
-
- /* cpu implementation data */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(arm_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = ARM7_NUM_LINES; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- /* interrupt lines/exceptions */
- case CPUINFO_INT_INPUT_STATE + ARM7_IRQ_LINE: info->i = cpustate->pendingIrq; break;
- case CPUINFO_INT_INPUT_STATE + ARM7_FIRQ_LINE: info->i = cpustate->pendingFiq; break;
- case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_EXCEPTION: info->i = cpustate->pendingAbtD; break;
- case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_PREFETCH_EXCEPTION: info->i = cpustate->pendingAbtP; break;
- case CPUINFO_INT_INPUT_STATE + ARM7_UNDEFINE_EXCEPTION: info->i = cpustate->pendingUnd; break;
-
- /* registers shared by all operating modes */
- case CPUINFO_INT_REGISTER + ARM7_R0: info->i = ARM7REG( 0); break;
- case CPUINFO_INT_REGISTER + ARM7_R1: info->i = ARM7REG( 1); break;
- case CPUINFO_INT_REGISTER + ARM7_R2: info->i = ARM7REG( 2); break;
- case CPUINFO_INT_REGISTER + ARM7_R3: info->i = ARM7REG( 3); break;
- case CPUINFO_INT_REGISTER + ARM7_R4: info->i = ARM7REG( 4); break;
- case CPUINFO_INT_REGISTER + ARM7_R5: info->i = ARM7REG( 5); break;
- case CPUINFO_INT_REGISTER + ARM7_R6: info->i = ARM7REG( 6); break;
- case CPUINFO_INT_REGISTER + ARM7_R7: info->i = ARM7REG( 7); break;
- case CPUINFO_INT_REGISTER + ARM7_R8: info->i = ARM7REG( 8); break;
- case CPUINFO_INT_REGISTER + ARM7_R9: info->i = ARM7REG( 9); break;
- case CPUINFO_INT_REGISTER + ARM7_R10: info->i = ARM7REG(10); break;
- case CPUINFO_INT_REGISTER + ARM7_R11: info->i = ARM7REG(11); break;
- case CPUINFO_INT_REGISTER + ARM7_R12: info->i = ARM7REG(12); break;
- case CPUINFO_INT_REGISTER + ARM7_R13: info->i = ARM7REG(13); break;
- case CPUINFO_INT_REGISTER + ARM7_R14: info->i = ARM7REG(14); break;
- case CPUINFO_INT_REGISTER + ARM7_R15: info->i = ARM7REG(15); break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* not implemented */ break;
- case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + ARM7_PC: info->i = GET_PC; break;
- case CPUINFO_INT_SP: info->i = GetRegister(cpustate, 13); break;
-
- /* FIRQ Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_FR8: info->i = ARM7REG(eR8_FIQ); break;
- case CPUINFO_INT_REGISTER + ARM7_FR9: info->i = ARM7REG(eR9_FIQ); break;
- case CPUINFO_INT_REGISTER + ARM7_FR10: info->i = ARM7REG(eR10_FIQ); break;
- case CPUINFO_INT_REGISTER + ARM7_FR11: info->i = ARM7REG(eR11_FIQ); break;
- case CPUINFO_INT_REGISTER + ARM7_FR12: info->i = ARM7REG(eR12_FIQ); break;
- case CPUINFO_INT_REGISTER + ARM7_FR13: info->i = ARM7REG(eR13_FIQ); break;
- case CPUINFO_INT_REGISTER + ARM7_FR14: info->i = ARM7REG(eR14_FIQ); break;
- case CPUINFO_INT_REGISTER + ARM7_FSPSR: info->i = ARM7REG(eSPSR_FIQ); break;
-
- /* IRQ Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_IR13: info->i = ARM7REG(eR13_IRQ); break;
- case CPUINFO_INT_REGISTER + ARM7_IR14: info->i = ARM7REG(eR14_IRQ); break;
- case CPUINFO_INT_REGISTER + ARM7_ISPSR: info->i = ARM7REG(eSPSR_IRQ); break;
-
- /* Supervisor Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_SR13: info->i = ARM7REG(eR13_SVC); break;
- case CPUINFO_INT_REGISTER + ARM7_SR14: info->i = ARM7REG(eR14_SVC); break;
- case CPUINFO_INT_REGISTER + ARM7_SSPSR: info->i = ARM7REG(eSPSR_SVC); break;
-
- /* Abort Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_AR13: info->i = ARM7REG(eR13_ABT); break;
- case CPUINFO_INT_REGISTER + ARM7_AR14: info->i = ARM7REG(eR14_ABT); break;
- case CPUINFO_INT_REGISTER + ARM7_ASPSR: info->i = ARM7REG(eSPSR_ABT); break;
-
- /* Undefined Mode Shadowed Registers */
- case CPUINFO_INT_REGISTER + ARM7_UR13: info->i = ARM7REG(eR13_UND); break;
- case CPUINFO_INT_REGISTER + ARM7_UR14: info->i = ARM7REG(eR14_UND); break;
- case CPUINFO_INT_REGISTER + ARM7_USPSR: info->i = ARM7REG(eSPSR_UND); break;
-
- /* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(arm7); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(arm7); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm7); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(arm7); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm7); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm7); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ARM7_ICOUNT; break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(arm7); break;
-
- /* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "ARM7"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Acorn Risc Machine"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Steve Ellenoff, sellenoff@hotmail.com"); break;
-
- case CPUINFO_STR_FLAGS:
- sprintf(info->s, "%c%c%c%c%c%c%c%c %s",
- (ARM7REG(eCPSR) & N_MASK) ? 'N' : '-',
- (ARM7REG(eCPSR) & Z_MASK) ? 'Z' : '-',
- (ARM7REG(eCPSR) & C_MASK) ? 'C' : '-',
- (ARM7REG(eCPSR) & V_MASK) ? 'V' : '-',
- (ARM7REG(eCPSR) & Q_MASK) ? 'Q' : '-',
- (ARM7REG(eCPSR) & I_MASK) ? 'I' : '-',
- (ARM7REG(eCPSR) & F_MASK) ? 'F' : '-',
- (ARM7REG(eCPSR) & T_MASK) ? 'T' : '-',
- GetModeText(ARM7REG(eCPSR)));
- break;
-
- /* registers shared by all operating modes */
- case CPUINFO_STR_REGISTER + ARM7_PC: sprintf(info->s, "PC :%08x", GET_PC); break;
- case CPUINFO_STR_REGISTER + ARM7_R0: sprintf(info->s, "R0 :%08x", ARM7REG( 0)); break;
- case CPUINFO_STR_REGISTER + ARM7_R1: sprintf(info->s, "R1 :%08x", ARM7REG( 1)); break;
- case CPUINFO_STR_REGISTER + ARM7_R2: sprintf(info->s, "R2 :%08x", ARM7REG( 2)); break;
- case CPUINFO_STR_REGISTER + ARM7_R3: sprintf(info->s, "R3 :%08x", ARM7REG( 3)); break;
- case CPUINFO_STR_REGISTER + ARM7_R4: sprintf(info->s, "R4 :%08x", ARM7REG( 4)); break;
- case CPUINFO_STR_REGISTER + ARM7_R5: sprintf(info->s, "R5 :%08x", ARM7REG( 5)); break;
- case CPUINFO_STR_REGISTER + ARM7_R6: sprintf(info->s, "R6 :%08x", ARM7REG( 6)); break;
- case CPUINFO_STR_REGISTER + ARM7_R7: sprintf(info->s, "R7 :%08x", ARM7REG( 7)); break;
- case CPUINFO_STR_REGISTER + ARM7_R8: sprintf(info->s, "R8 :%08x", ARM7REG( 8)); break;
- case CPUINFO_STR_REGISTER + ARM7_R9: sprintf(info->s, "R9 :%08x", ARM7REG( 9)); break;
- case CPUINFO_STR_REGISTER + ARM7_R10: sprintf(info->s, "R10 :%08x", ARM7REG(10)); break;
- case CPUINFO_STR_REGISTER + ARM7_R11: sprintf(info->s, "R11 :%08x", ARM7REG(11)); break;
- case CPUINFO_STR_REGISTER + ARM7_R12: sprintf(info->s, "R12 :%08x", ARM7REG(12)); break;
- case CPUINFO_STR_REGISTER + ARM7_R13: sprintf(info->s, "R13 :%08x", ARM7REG(13)); break;
- case CPUINFO_STR_REGISTER + ARM7_R14: sprintf(info->s, "R14 :%08x", ARM7REG(14)); break;
- case CPUINFO_STR_REGISTER + ARM7_R15: sprintf(info->s, "R15 :%08x", ARM7REG(15)); break;
-
- /* FIRQ Mode Shadowed Registers */
- case CPUINFO_STR_REGISTER + ARM7_FR8: sprintf(info->s, "FR8 :%08x", ARM7REG(eR8_FIQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_FR9: sprintf(info->s, "FR9 :%08x", ARM7REG(eR9_FIQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_FR10: sprintf(info->s, "FR10:%08x", ARM7REG(eR10_FIQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_FR11: sprintf(info->s, "FR11:%08x", ARM7REG(eR11_FIQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_FR12: sprintf(info->s, "FR12:%08x", ARM7REG(eR12_FIQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_FR13: sprintf(info->s, "FR13:%08x", ARM7REG(eR13_FIQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_FR14: sprintf(info->s, "FR14:%08x", ARM7REG(eR14_FIQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_FSPSR: sprintf(info->s, "FR16:%08x", ARM7REG(eSPSR_FIQ)); break;
-
- /* IRQ Mode Shadowed Registers */
- case CPUINFO_STR_REGISTER + ARM7_IR13: sprintf(info->s, "IR13:%08x", ARM7REG(eR13_IRQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_IR14: sprintf(info->s, "IR14:%08x", ARM7REG(eR14_IRQ) ); break;
- case CPUINFO_STR_REGISTER + ARM7_ISPSR: sprintf(info->s, "IR16:%08x", ARM7REG(eSPSR_IRQ)); break;
-
- /* Supervisor Mode Shadowed Registers */
- case CPUINFO_STR_REGISTER + ARM7_SR13: sprintf(info->s, "SR13:%08x", ARM7REG(eR13_SVC) ); break;
- case CPUINFO_STR_REGISTER + ARM7_SR14: sprintf(info->s, "SR14:%08x", ARM7REG(eR14_SVC) ); break;
- case CPUINFO_STR_REGISTER + ARM7_SSPSR: sprintf(info->s, "SR16:%08x", ARM7REG(eSPSR_SVC)); break;
-
- /* Abort Mode Shadowed Registers */
- case CPUINFO_STR_REGISTER + ARM7_AR13: sprintf(info->s, "AR13:%08x", ARM7REG(eR13_ABT) ); break;
- case CPUINFO_STR_REGISTER + ARM7_AR14: sprintf(info->s, "AR14:%08x", ARM7REG(eR14_ABT) ); break;
- case CPUINFO_STR_REGISTER + ARM7_ASPSR: sprintf(info->s, "AR16:%08x", ARM7REG(eSPSR_ABT)); break;
-
- /* Undefined Mode Shadowed Registers */
- case CPUINFO_STR_REGISTER + ARM7_UR13: sprintf(info->s, "UR13:%08x", ARM7REG(eR13_UND) ); break;
- case CPUINFO_STR_REGISTER + ARM7_UR14: sprintf(info->s, "UR14:%08x", ARM7REG(eR14_UND) ); break;
- case CPUINFO_STR_REGISTER + ARM7_USPSR: sprintf(info->s, "UR16:%08x", ARM7REG(eSPSR_UND)); break;
- }
+ arm_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
+
+ switch (state)
+ {
+ /* --- the following bits of info are returned as 64-bit signed integers --- */
+
+ /* cpu implementation data */
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(arm_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = ARM7_NUM_LINES; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ /* interrupt lines/exceptions */
+ case CPUINFO_INT_INPUT_STATE + ARM7_IRQ_LINE: info->i = cpustate->pendingIrq; break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_FIRQ_LINE: info->i = cpustate->pendingFiq; break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_EXCEPTION: info->i = cpustate->pendingAbtD; break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_ABORT_PREFETCH_EXCEPTION: info->i = cpustate->pendingAbtP; break;
+ case CPUINFO_INT_INPUT_STATE + ARM7_UNDEFINE_EXCEPTION: info->i = cpustate->pendingUnd; break;
+
+ /* registers shared by all operating modes */
+ case CPUINFO_INT_REGISTER + ARM7_R0: info->i = ARM7REG( 0); break;
+ case CPUINFO_INT_REGISTER + ARM7_R1: info->i = ARM7REG( 1); break;
+ case CPUINFO_INT_REGISTER + ARM7_R2: info->i = ARM7REG( 2); break;
+ case CPUINFO_INT_REGISTER + ARM7_R3: info->i = ARM7REG( 3); break;
+ case CPUINFO_INT_REGISTER + ARM7_R4: info->i = ARM7REG( 4); break;
+ case CPUINFO_INT_REGISTER + ARM7_R5: info->i = ARM7REG( 5); break;
+ case CPUINFO_INT_REGISTER + ARM7_R6: info->i = ARM7REG( 6); break;
+ case CPUINFO_INT_REGISTER + ARM7_R7: info->i = ARM7REG( 7); break;
+ case CPUINFO_INT_REGISTER + ARM7_R8: info->i = ARM7REG( 8); break;
+ case CPUINFO_INT_REGISTER + ARM7_R9: info->i = ARM7REG( 9); break;
+ case CPUINFO_INT_REGISTER + ARM7_R10: info->i = ARM7REG(10); break;
+ case CPUINFO_INT_REGISTER + ARM7_R11: info->i = ARM7REG(11); break;
+ case CPUINFO_INT_REGISTER + ARM7_R12: info->i = ARM7REG(12); break;
+ case CPUINFO_INT_REGISTER + ARM7_R13: info->i = ARM7REG(13); break;
+ case CPUINFO_INT_REGISTER + ARM7_R14: info->i = ARM7REG(14); break;
+ case CPUINFO_INT_REGISTER + ARM7_R15: info->i = ARM7REG(15); break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* not implemented */ break;
+ case CPUINFO_INT_PC:
+ case CPUINFO_INT_REGISTER + ARM7_PC: info->i = GET_PC; break;
+ case CPUINFO_INT_SP: info->i = GetRegister(cpustate, 13); break;
+
+ /* FIRQ Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_FR8: info->i = ARM7REG(eR8_FIQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_FR9: info->i = ARM7REG(eR9_FIQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_FR10: info->i = ARM7REG(eR10_FIQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_FR11: info->i = ARM7REG(eR11_FIQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_FR12: info->i = ARM7REG(eR12_FIQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_FR13: info->i = ARM7REG(eR13_FIQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_FR14: info->i = ARM7REG(eR14_FIQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_FSPSR: info->i = ARM7REG(eSPSR_FIQ); break;
+
+ /* IRQ Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_IR13: info->i = ARM7REG(eR13_IRQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_IR14: info->i = ARM7REG(eR14_IRQ); break;
+ case CPUINFO_INT_REGISTER + ARM7_ISPSR: info->i = ARM7REG(eSPSR_IRQ); break;
+
+ /* Supervisor Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_SR13: info->i = ARM7REG(eR13_SVC); break;
+ case CPUINFO_INT_REGISTER + ARM7_SR14: info->i = ARM7REG(eR14_SVC); break;
+ case CPUINFO_INT_REGISTER + ARM7_SSPSR: info->i = ARM7REG(eSPSR_SVC); break;
+
+ /* Abort Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_AR13: info->i = ARM7REG(eR13_ABT); break;
+ case CPUINFO_INT_REGISTER + ARM7_AR14: info->i = ARM7REG(eR14_ABT); break;
+ case CPUINFO_INT_REGISTER + ARM7_ASPSR: info->i = ARM7REG(eSPSR_ABT); break;
+
+ /* Undefined Mode Shadowed Registers */
+ case CPUINFO_INT_REGISTER + ARM7_UR13: info->i = ARM7REG(eR13_UND); break;
+ case CPUINFO_INT_REGISTER + ARM7_UR14: info->i = ARM7REG(eR14_UND); break;
+ case CPUINFO_INT_REGISTER + ARM7_USPSR: info->i = ARM7REG(eSPSR_UND); break;
+
+ /* --- the following bits of info are returned as pointers to data or functions --- */
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(arm7); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(arm7); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm7); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(arm7); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(arm7); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm7); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ARM7_ICOUNT; break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(arm7); break;
+
+ /* --- the following bits of info are returned as NULL-terminated strings --- */
+ case CPUINFO_STR_NAME: strcpy(info->s, "ARM7"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Acorn Risc Machine"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Steve Ellenoff, sellenoff@hotmail.com"); break;
+
+ case CPUINFO_STR_FLAGS:
+ sprintf(info->s, "%c%c%c%c%c%c%c%c %s",
+ (ARM7REG(eCPSR) & N_MASK) ? 'N' : '-',
+ (ARM7REG(eCPSR) & Z_MASK) ? 'Z' : '-',
+ (ARM7REG(eCPSR) & C_MASK) ? 'C' : '-',
+ (ARM7REG(eCPSR) & V_MASK) ? 'V' : '-',
+ (ARM7REG(eCPSR) & Q_MASK) ? 'Q' : '-',
+ (ARM7REG(eCPSR) & I_MASK) ? 'I' : '-',
+ (ARM7REG(eCPSR) & F_MASK) ? 'F' : '-',
+ (ARM7REG(eCPSR) & T_MASK) ? 'T' : '-',
+ GetModeText(ARM7REG(eCPSR)));
+ break;
+
+ /* registers shared by all operating modes */
+ case CPUINFO_STR_REGISTER + ARM7_PC: sprintf(info->s, "PC :%08x", GET_PC); break;
+ case CPUINFO_STR_REGISTER + ARM7_R0: sprintf(info->s, "R0 :%08x", ARM7REG( 0)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R1: sprintf(info->s, "R1 :%08x", ARM7REG( 1)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R2: sprintf(info->s, "R2 :%08x", ARM7REG( 2)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R3: sprintf(info->s, "R3 :%08x", ARM7REG( 3)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R4: sprintf(info->s, "R4 :%08x", ARM7REG( 4)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R5: sprintf(info->s, "R5 :%08x", ARM7REG( 5)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R6: sprintf(info->s, "R6 :%08x", ARM7REG( 6)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R7: sprintf(info->s, "R7 :%08x", ARM7REG( 7)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R8: sprintf(info->s, "R8 :%08x", ARM7REG( 8)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R9: sprintf(info->s, "R9 :%08x", ARM7REG( 9)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R10: sprintf(info->s, "R10 :%08x", ARM7REG(10)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R11: sprintf(info->s, "R11 :%08x", ARM7REG(11)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R12: sprintf(info->s, "R12 :%08x", ARM7REG(12)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R13: sprintf(info->s, "R13 :%08x", ARM7REG(13)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R14: sprintf(info->s, "R14 :%08x", ARM7REG(14)); break;
+ case CPUINFO_STR_REGISTER + ARM7_R15: sprintf(info->s, "R15 :%08x", ARM7REG(15)); break;
+
+ /* FIRQ Mode Shadowed Registers */
+ case CPUINFO_STR_REGISTER + ARM7_FR8: sprintf(info->s, "FR8 :%08x", ARM7REG(eR8_FIQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_FR9: sprintf(info->s, "FR9 :%08x", ARM7REG(eR9_FIQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_FR10: sprintf(info->s, "FR10:%08x", ARM7REG(eR10_FIQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_FR11: sprintf(info->s, "FR11:%08x", ARM7REG(eR11_FIQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_FR12: sprintf(info->s, "FR12:%08x", ARM7REG(eR12_FIQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_FR13: sprintf(info->s, "FR13:%08x", ARM7REG(eR13_FIQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_FR14: sprintf(info->s, "FR14:%08x", ARM7REG(eR14_FIQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_FSPSR: sprintf(info->s, "FR16:%08x", ARM7REG(eSPSR_FIQ)); break;
+
+ /* IRQ Mode Shadowed Registers */
+ case CPUINFO_STR_REGISTER + ARM7_IR13: sprintf(info->s, "IR13:%08x", ARM7REG(eR13_IRQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_IR14: sprintf(info->s, "IR14:%08x", ARM7REG(eR14_IRQ) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_ISPSR: sprintf(info->s, "IR16:%08x", ARM7REG(eSPSR_IRQ)); break;
+
+ /* Supervisor Mode Shadowed Registers */
+ case CPUINFO_STR_REGISTER + ARM7_SR13: sprintf(info->s, "SR13:%08x", ARM7REG(eR13_SVC) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_SR14: sprintf(info->s, "SR14:%08x", ARM7REG(eR14_SVC) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_SSPSR: sprintf(info->s, "SR16:%08x", ARM7REG(eSPSR_SVC)); break;
+
+ /* Abort Mode Shadowed Registers */
+ case CPUINFO_STR_REGISTER + ARM7_AR13: sprintf(info->s, "AR13:%08x", ARM7REG(eR13_ABT) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_AR14: sprintf(info->s, "AR14:%08x", ARM7REG(eR14_ABT) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_ASPSR: sprintf(info->s, "AR16:%08x", ARM7REG(eSPSR_ABT)); break;
+
+ /* Undefined Mode Shadowed Registers */
+ case CPUINFO_STR_REGISTER + ARM7_UR13: sprintf(info->s, "UR13:%08x", ARM7REG(eR13_UND) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_UR14: sprintf(info->s, "UR14:%08x", ARM7REG(eR14_UND) ); break;
+ case CPUINFO_STR_REGISTER + ARM7_USPSR: sprintf(info->s, "UR16:%08x", ARM7REG(eSPSR_UND)); break;
+ }
}
@@ -949,100 +949,100 @@ CPU_GET_INFO( arm7_be )
{
switch (state)
{
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm7_be); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm7_be); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "ARM7 (big endian)"); break;
- default: CPU_GET_INFO_CALL(arm7);
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm7_be); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(arm7_be); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ARM7 (big endian)"); break;
+ default: CPU_GET_INFO_CALL(arm7);
}
}
CPU_GET_INFO( arm7500 )
{
- switch (state)
- {
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm7500); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "ARM7500"); break;
- default: CPU_GET_INFO_CALL(arm7);
+ switch (state)
+ {
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm7500); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ARM7500"); break;
+ default: CPU_GET_INFO_CALL(arm7);
break;
- }
+ }
}
CPU_GET_INFO( arm9 )
{
- switch (state)
- {
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm9); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "ARM9"); break;
- default: CPU_GET_INFO_CALL(arm7);
+ switch (state)
+ {
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm9); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ARM9"); break;
+ default: CPU_GET_INFO_CALL(arm7);
break;
- }
+ }
}
CPU_GET_INFO( arm920t )
{
- switch (state)
- {
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm920t); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "ARM920T"); break;
- default: CPU_GET_INFO_CALL(arm7);
+ switch (state)
+ {
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(arm920t); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ARM920T"); break;
+ default: CPU_GET_INFO_CALL(arm7);
break;
- }
+ }
}
CPU_GET_INFO( pxa255 )
{
- switch (state)
- {
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pxa255); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "PXA255"); break;
- default: CPU_GET_INFO_CALL(arm7);
+ switch (state)
+ {
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pxa255); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PXA255"); break;
+ default: CPU_GET_INFO_CALL(arm7);
break;
- }
+ }
}
CPU_GET_INFO( sa1110 )
{
- switch (state)
- {
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sa1110); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "SA1110"); break;
- default: CPU_GET_INFO_CALL(arm7);
+ switch (state)
+ {
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sa1110); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SA1110"); break;
+ default: CPU_GET_INFO_CALL(arm7);
break;
- }
+ }
}
/* ARM system coprocessor support */
static WRITE32_DEVICE_HANDLER( arm7_do_callback )
{
- arm_state *cpustate = get_safe_token(device);
+ arm_state *cpustate = get_safe_token(device);
cpustate->pendingUnd = 1;
}
static READ32_DEVICE_HANDLER( arm7_rt_r_callback )
{
- arm_state *cpustate = get_safe_token(device);
- UINT32 opcode = offset;
- UINT8 cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
- UINT8 op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
- UINT8 op3 = opcode & INSN_COPRO_OP3;
- UINT8 cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
- UINT32 data = 0;
+ arm_state *cpustate = get_safe_token(device);
+ UINT32 opcode = offset;
+ UINT8 cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
+ UINT8 op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
+ UINT8 op3 = opcode & INSN_COPRO_OP3;
+ UINT8 cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
+ UINT32 data = 0;
// printf("cpnum %d cReg %d op2 %d op3 %d (%x)\n", cpnum, cReg, op2, op3, GET_REGISTER(cpustate, 15));
- // we only handle system copro here
- if (cpnum != 15)
- {
- if (cpustate->archFlags & eARM_ARCHFLAGS_XSCALE)
+ // we only handle system copro here
+ if (cpnum != 15)
+ {
+ if (cpustate->archFlags & eARM_ARCHFLAGS_XSCALE)
{
// handle XScale specific CP14
if (cpnum == 14)
{
switch( cReg )
{
- case 1: // clock counter
+ case 1: // clock counter
data = (UINT32)cpustate->device->total_cycles();
break;
@@ -1063,27 +1063,27 @@ static READ32_DEVICE_HANDLER( arm7_rt_r_callback )
cpustate->pendingUnd = 1;
return 0;
}
- }
-
- switch( cReg )
- {
- case 4:
- case 7:
- case 8:
- case 9:
- case 10:
- case 11:
- case 12:
- // RESERVED
- LOG( ( "arm7_rt_r_callback CR%d, RESERVED\n", cReg ) );
- break;
- case 0: // ID
- switch(op2)
- {
- case 0:
- switch (cpustate->archRev)
- {
- case 3: // ARM6 32-bit
+ }
+
+ switch( cReg )
+ {
+ case 4:
+ case 7:
+ case 8:
+ case 9:
+ case 10:
+ case 11:
+ case 12:
+ // RESERVED
+ LOG( ( "arm7_rt_r_callback CR%d, RESERVED\n", cReg ) );
+ break;
+ case 0: // ID
+ switch(op2)
+ {
+ case 0:
+ switch (cpustate->archRev)
+ {
+ case 3: // ARM6 32-bit
data = 0x41;
break;
@@ -1093,7 +1093,7 @@ static READ32_DEVICE_HANDLER( arm7_rt_r_callback )
// ARM Architecture Version 4
// Part Number 0xB11 (SA1110)
// Stepping B5
- data = 0x69 | ( 0x01 << 16 ) | ( 0xB11 << 4 ) | 0x9;
+ data = 0x69 | ( 0x01 << 16 ) | ( 0xB11 << 4 ) | 0x9;
}
else
{
@@ -1112,7 +1112,7 @@ static READ32_DEVICE_HANDLER( arm7_rt_r_callback )
}
break;
- case 5: // ARM9/10/XScale
+ case 5: // ARM9/10/XScale
data = 0x41 | (9 << 12);
if (cpustate->archFlags & eARM_ARCHFLAGS_T)
{
@@ -1120,27 +1120,27 @@ static READ32_DEVICE_HANDLER( arm7_rt_r_callback )
{
if (cpustate->archFlags & eARM_ARCHFLAGS_J)
{
- data |= (6<<16); // v5TEJ
+ data |= (6<<16); // v5TEJ
}
else
{
- data |= (5<<16); // v5TE
+ data |= (5<<16); // v5TE
}
}
else
{
- data |= (4<<16); // v5T
+ data |= (4<<16); // v5T
}
}
break;
- case 6: // ARM11
- data = 0x41 | (10<< 12) | (7<<16); // v6
+ case 6: // ARM11
+ data = 0x41 | (10<< 12) | (7<<16); // v6
break;
- }
- break;
- case 1: // cache type
- data = 0x0f0d2112; // HACK: value expected by ARMWrestler (probably Nintendo DS ARM9's value)
+ }
+ break;
+ case 1: // cache type
+ data = 0x0f0d2112; // HACK: value expected by ARMWrestler (probably Nintendo DS ARM9's value)
//data = (6 << 25) | (1 << 24) | (0x172 << 12) | (0x172 << 0); // ARM920T (S3C24xx)
break;
case 2: // TCM type
@@ -1149,151 +1149,151 @@ static READ32_DEVICE_HANDLER( arm7_rt_r_callback )
case 3: // TLB type
data = 0;
break;
- case 4: // MPU type
+ case 4: // MPU type
data = 0;
break;
- }
- LOG( ( "arm7_rt_r_callback, ID\n" ) );
- break;
- case 1: // Control
- data = COPRO_CTRL | 0x70; // bits 4-6 always read back as "1" (bit 3 too in XScale)
- break;
- case 2: // Translation Table Base
- data = COPRO_TLB_BASE;
- break;
- case 3: // Domain Access Control
- LOG( ( "arm7_rt_r_callback, Domain Access Control\n" ) );
- data = COPRO_DOMAIN_ACCESS_CONTROL;
- break;
- case 5: // Fault Status
- LOG( ( "arm7_rt_r_callback, Fault Status\n" ) );
- switch (op3)
- {
- case 0: data = COPRO_FAULT_STATUS_D; break;
- case 1: data = COPRO_FAULT_STATUS_P; break;
- }
- break;
- case 6: // Fault Address
- LOG( ( "arm7_rt_r_callback, Fault Address\n" ) );
- data = COPRO_FAULT_ADDRESS;
- break;
- case 13: // Read Process ID (PID)
- LOG( ( "arm7_rt_r_callback, Read PID\n" ) );
- data = COPRO_FCSE_PID;
- break;
- case 14: // Read Breakpoint
- LOG( ( "arm7_rt_r_callback, Read Breakpoint\n" ) );
- break;
- case 15: // Test, Clock, Idle
- LOG( ( "arm7_rt_r_callback, Test / Clock / Idle \n" ) );
- break;
- }
-
- return data;
+ }
+ LOG( ( "arm7_rt_r_callback, ID\n" ) );
+ break;
+ case 1: // Control
+ data = COPRO_CTRL | 0x70; // bits 4-6 always read back as "1" (bit 3 too in XScale)
+ break;
+ case 2: // Translation Table Base
+ data = COPRO_TLB_BASE;
+ break;
+ case 3: // Domain Access Control
+ LOG( ( "arm7_rt_r_callback, Domain Access Control\n" ) );
+ data = COPRO_DOMAIN_ACCESS_CONTROL;
+ break;
+ case 5: // Fault Status
+ LOG( ( "arm7_rt_r_callback, Fault Status\n" ) );
+ switch (op3)
+ {
+ case 0: data = COPRO_FAULT_STATUS_D; break;
+ case 1: data = COPRO_FAULT_STATUS_P; break;
+ }
+ break;
+ case 6: // Fault Address
+ LOG( ( "arm7_rt_r_callback, Fault Address\n" ) );
+ data = COPRO_FAULT_ADDRESS;
+ break;
+ case 13: // Read Process ID (PID)
+ LOG( ( "arm7_rt_r_callback, Read PID\n" ) );
+ data = COPRO_FCSE_PID;
+ break;
+ case 14: // Read Breakpoint
+ LOG( ( "arm7_rt_r_callback, Read Breakpoint\n" ) );
+ break;
+ case 15: // Test, Clock, Idle
+ LOG( ( "arm7_rt_r_callback, Test / Clock / Idle \n" ) );
+ break;
+ }
+
+ return data;
}
static WRITE32_DEVICE_HANDLER( arm7_rt_w_callback )
{
- arm_state *cpustate = get_safe_token(device);
- UINT32 opcode = offset;
- UINT8 cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
- UINT8 op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
- UINT8 op3 = opcode & INSN_COPRO_OP3;
- UINT8 cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
-
- // handle XScale specific CP14 - just eat writes for now
- if (cpnum != 15)
- {
- if (cpnum == 14)
- {
- LOG( ("arm7_rt_w_callback: write %x to XScale CP14 reg %d\n", data, cReg) );
- return;
- }
- else
- {
- LOG( ("ARM7: Unhandled coprocessor %d\n", cpnum) );
+ arm_state *cpustate = get_safe_token(device);
+ UINT32 opcode = offset;
+ UINT8 cReg = ( opcode & INSN_COPRO_CREG ) >> INSN_COPRO_CREG_SHIFT;
+ UINT8 op2 = ( opcode & INSN_COPRO_OP2 ) >> INSN_COPRO_OP2_SHIFT;
+ UINT8 op3 = opcode & INSN_COPRO_OP3;
+ UINT8 cpnum = (opcode & INSN_COPRO_CPNUM) >> INSN_COPRO_CPNUM_SHIFT;
+
+ // handle XScale specific CP14 - just eat writes for now
+ if (cpnum != 15)
+ {
+ if (cpnum == 14)
+ {
+ LOG( ("arm7_rt_w_callback: write %x to XScale CP14 reg %d\n", data, cReg) );
+ return;
+ }
+ else
+ {
+ LOG( ("ARM7: Unhandled coprocessor %d\n", cpnum) );
cpustate->pendingUnd = 1;
return;
- }
- }
-
- switch( cReg )
- {
- case 0:
- case 4:
- case 10:
- case 11:
- case 12:
- // RESERVED
- LOG( ( "arm7_rt_w_callback CR%d, RESERVED = %08x\n", cReg, data) );
- break;
- case 1: // Control
- LOG( ( "arm7_rt_w_callback Control = %08x (%d) (%d)\n", data, op2, op3 ) );
- LOG( ( " MMU:%d, Address Fault:%d, Data Cache:%d, Write Buffer:%d\n",
- data & COPRO_CTRL_MMU_EN, ( data & COPRO_CTRL_ADDRFAULT_EN ) >> COPRO_CTRL_ADDRFAULT_EN_SHIFT,
- ( data & COPRO_CTRL_DCACHE_EN ) >> COPRO_CTRL_DCACHE_EN_SHIFT,
- ( data & COPRO_CTRL_WRITEBUF_EN ) >> COPRO_CTRL_WRITEBUF_EN_SHIFT ) );
- LOG( ( " Endianness:%d, System:%d, ROM:%d, Instruction Cache:%d\n",
- ( data & COPRO_CTRL_ENDIAN ) >> COPRO_CTRL_ENDIAN_SHIFT,
- ( data & COPRO_CTRL_SYSTEM ) >> COPRO_CTRL_SYSTEM_SHIFT,
- ( data & COPRO_CTRL_ROM ) >> COPRO_CTRL_ROM_SHIFT,
- ( data & COPRO_CTRL_ICACHE_EN ) >> COPRO_CTRL_ICACHE_EN_SHIFT ) );
- LOG( ( " Int Vector Adjust:%d\n", ( data & COPRO_CTRL_INTVEC_ADJUST ) >> COPRO_CTRL_INTVEC_ADJUST_SHIFT ) );
+ }
+ }
+
+ switch( cReg )
+ {
+ case 0:
+ case 4:
+ case 10:
+ case 11:
+ case 12:
+ // RESERVED
+ LOG( ( "arm7_rt_w_callback CR%d, RESERVED = %08x\n", cReg, data) );
+ break;
+ case 1: // Control
+ LOG( ( "arm7_rt_w_callback Control = %08x (%d) (%d)\n", data, op2, op3 ) );
+ LOG( ( " MMU:%d, Address Fault:%d, Data Cache:%d, Write Buffer:%d\n",
+ data & COPRO_CTRL_MMU_EN, ( data & COPRO_CTRL_ADDRFAULT_EN ) >> COPRO_CTRL_ADDRFAULT_EN_SHIFT,
+ ( data & COPRO_CTRL_DCACHE_EN ) >> COPRO_CTRL_DCACHE_EN_SHIFT,
+ ( data & COPRO_CTRL_WRITEBUF_EN ) >> COPRO_CTRL_WRITEBUF_EN_SHIFT ) );
+ LOG( ( " Endianness:%d, System:%d, ROM:%d, Instruction Cache:%d\n",
+ ( data & COPRO_CTRL_ENDIAN ) >> COPRO_CTRL_ENDIAN_SHIFT,
+ ( data & COPRO_CTRL_SYSTEM ) >> COPRO_CTRL_SYSTEM_SHIFT,
+ ( data & COPRO_CTRL_ROM ) >> COPRO_CTRL_ROM_SHIFT,
+ ( data & COPRO_CTRL_ICACHE_EN ) >> COPRO_CTRL_ICACHE_EN_SHIFT ) );
+ LOG( ( " Int Vector Adjust:%d\n", ( data & COPRO_CTRL_INTVEC_ADJUST ) >> COPRO_CTRL_INTVEC_ADJUST_SHIFT ) );
#if ARM7_MMU_ENABLE_HACK
- if (((data & COPRO_CTRL_MMU_EN) != 0) && ((COPRO_CTRL & COPRO_CTRL_MMU_EN) == 0))
- {
- cpustate->mmu_enable_addr = R15;
- }
- if (((data & COPRO_CTRL_MMU_EN) == 0) && ((COPRO_CTRL & COPRO_CTRL_MMU_EN) != 0))
- {
- if (!arm7_tlb_translate( cpustate, &R15, 0))
- {
- fatalerror("ARM7_MMU_ENABLE_HACK translate failed\n");
- }
- }
+ if (((data & COPRO_CTRL_MMU_EN) != 0) && ((COPRO_CTRL & COPRO_CTRL_MMU_EN) == 0))
+ {
+ cpustate->mmu_enable_addr = R15;
+ }
+ if (((data & COPRO_CTRL_MMU_EN) == 0) && ((COPRO_CTRL & COPRO_CTRL_MMU_EN) != 0))
+ {
+ if (!arm7_tlb_translate( cpustate, &R15, 0))
+ {
+ fatalerror("ARM7_MMU_ENABLE_HACK translate failed\n");
+ }
+ }
#endif
- COPRO_CTRL = data & COPRO_CTRL_MASK;
- break;
- case 2: // Translation Table Base
- LOG( ( "arm7_rt_w_callback TLB Base = %08x (%d) (%d)\n", data, op2, op3 ) );
- COPRO_TLB_BASE = data;
- break;
- case 3: // Domain Access Control
- LOG( ( "arm7_rt_w_callback Domain Access Control = %08x (%d) (%d)\n", data, op2, op3 ) );
- COPRO_DOMAIN_ACCESS_CONTROL = data;
- break;
- case 5: // Fault Status
- LOG( ( "arm7_rt_w_callback Fault Status = %08x (%d) (%d)\n", data, op2, op3 ) );
- switch (op3)
- {
- case 0: COPRO_FAULT_STATUS_D = data; break;
- case 1: COPRO_FAULT_STATUS_P = data; break;
- }
- break;
- case 6: // Fault Address
- LOG( ( "arm7_rt_w_callback Fault Address = %08x (%d) (%d)\n", data, op2, op3 ) );
- COPRO_FAULT_ADDRESS = data;
- break;
- case 7: // Cache Operations
+ COPRO_CTRL = data & COPRO_CTRL_MASK;
+ break;
+ case 2: // Translation Table Base
+ LOG( ( "arm7_rt_w_callback TLB Base = %08x (%d) (%d)\n", data, op2, op3 ) );
+ COPRO_TLB_BASE = data;
+ break;
+ case 3: // Domain Access Control
+ LOG( ( "arm7_rt_w_callback Domain Access Control = %08x (%d) (%d)\n", data, op2, op3 ) );
+ COPRO_DOMAIN_ACCESS_CONTROL = data;
+ break;
+ case 5: // Fault Status
+ LOG( ( "arm7_rt_w_callback Fault Status = %08x (%d) (%d)\n", data, op2, op3 ) );
+ switch (op3)
+ {
+ case 0: COPRO_FAULT_STATUS_D = data; break;
+ case 1: COPRO_FAULT_STATUS_P = data; break;
+ }
+ break;
+ case 6: // Fault Address
+ LOG( ( "arm7_rt_w_callback Fault Address = %08x (%d) (%d)\n", data, op2, op3 ) );
+ COPRO_FAULT_ADDRESS = data;
+ break;
+ case 7: // Cache Operations
// LOG( ( "arm7_rt_w_callback Cache Ops = %08x (%d) (%d)\n", data, op2, op3 ) );
- break;
- case 8: // TLB Operations
- LOG( ( "arm7_rt_w_callback TLB Ops = %08x (%d) (%d)\n", data, op2, op3 ) );
- break;
- case 9: // Read Buffer Operations
- LOG( ( "arm7_rt_w_callback Read Buffer Ops = %08x (%d) (%d)\n", data, op2, op3 ) );
- break;
- case 13: // Write Process ID (PID)
- LOG( ( "arm7_rt_w_callback Write PID = %08x (%d) (%d)\n", data, op2, op3 ) );
- COPRO_FCSE_PID = data;
- break;
- case 14: // Write Breakpoint
- LOG( ( "arm7_rt_w_callback Write Breakpoint = %08x (%d) (%d)\n", data, op2, op3 ) );
- break;
- case 15: // Test, Clock, Idle
- LOG( ( "arm7_rt_w_callback Test / Clock / Idle = %08x (%d) (%d)\n", data, op2, op3 ) );
- break;
- }
+ break;
+ case 8: // TLB Operations
+ LOG( ( "arm7_rt_w_callback TLB Ops = %08x (%d) (%d)\n", data, op2, op3 ) );
+ break;
+ case 9: // Read Buffer Operations
+ LOG( ( "arm7_rt_w_callback Read Buffer Ops = %08x (%d) (%d)\n", data, op2, op3 ) );
+ break;
+ case 13: // Write Process ID (PID)
+ LOG( ( "arm7_rt_w_callback Write PID = %08x (%d) (%d)\n", data, op2, op3 ) );
+ COPRO_FCSE_PID = data;
+ break;
+ case 14: // Write Breakpoint
+ LOG( ( "arm7_rt_w_callback Write Breakpoint = %08x (%d) (%d)\n", data, op2, op3 ) );
+ break;
+ case 15: // Test, Clock, Idle
+ LOG( ( "arm7_rt_w_callback Test / Clock / Idle = %08x (%d) (%d)\n", data, op2, op3 ) );
+ break;
+ }
}
void arm7_dt_r_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, UINT32 (*read32)(arm_state *cpustate, UINT32 addr))
diff --git a/src/emu/cpu/arm7/arm7core.c b/src/emu/cpu/arm7/arm7core.c
index a8bfaa300fb..a74e2cd6876 100644
--- a/src/emu/cpu/arm7/arm7core.c
+++ b/src/emu/cpu/arm7/arm7core.c
@@ -101,12 +101,12 @@ char *(*arm7_dasm_cop_do_callback)(arm_state *cpustate, char *pBuf, UINT32 opcod
// convert cpsr mode num into to text
static const char modetext[ARM7_NUM_MODES][5] = {
- "USER", "FIRQ", "IRQ", "SVC", "ILL1", "ILL2", "ILL3", "ABT",
- "ILL4", "ILL5", "ILL6", "UND", "ILL7", "ILL8", "ILL9", "SYS"
+ "USER", "FIRQ", "IRQ", "SVC", "ILL1", "ILL2", "ILL3", "ABT",
+ "ILL4", "ILL5", "ILL6", "UND", "ILL7", "ILL8", "ILL9", "SYS"
};
static const char *GetModeText(int cpsr)
{
- return modetext[cpsr & MODE_FLAG];
+ return modetext[cpsr & MODE_FLAG];
}
@@ -119,196 +119,196 @@ static const char *GetModeText(int cpsr)
// CPU INIT
static void arm7_core_init(device_t *device, const char *cpuname)
{
- arm_state *cpustate = get_safe_token(device);
-
- device->save_item(NAME(cpustate->sArmRegister));
- device->save_item(NAME(cpustate->pendingIrq));
- device->save_item(NAME(cpustate->pendingFiq));
- device->save_item(NAME(cpustate->pendingAbtD));
- device->save_item(NAME(cpustate->pendingAbtP));
- device->save_item(NAME(cpustate->pendingUnd));
- device->save_item(NAME(cpustate->pendingSwi));
+ arm_state *cpustate = get_safe_token(device);
+
+ device->save_item(NAME(cpustate->sArmRegister));
+ device->save_item(NAME(cpustate->pendingIrq));
+ device->save_item(NAME(cpustate->pendingFiq));
+ device->save_item(NAME(cpustate->pendingAbtD));
+ device->save_item(NAME(cpustate->pendingAbtP));
+ device->save_item(NAME(cpustate->pendingUnd));
+ device->save_item(NAME(cpustate->pendingSwi));
}
// CPU RESET
static void arm7_core_reset(legacy_cpu_device *device)
{
- arm_state *cpustate = get_safe_token(device);
+ arm_state *cpustate = get_safe_token(device);
- device_irq_acknowledge_callback save_irqcallback = cpustate->irq_callback;
+ device_irq_acknowledge_callback save_irqcallback = cpustate->irq_callback;
- memset(cpustate, 0, sizeof(arm_state));
- cpustate->irq_callback = save_irqcallback;
- cpustate->device = device;
- cpustate->program = &device->space(AS_PROGRAM);
+ memset(cpustate, 0, sizeof(arm_state));
+ cpustate->irq_callback = save_irqcallback;
+ cpustate->device = device;
+ cpustate->program = &device->space(AS_PROGRAM);
cpustate->endian = ENDIANNESS_LITTLE;
cpustate->direct = &cpustate->program->direct();
- /* start up in SVC mode with interrupts disabled. */
- ARM7REG(eCPSR) = I_MASK | F_MASK | 0x10;
- SwitchMode(cpustate, eARM7_MODE_SVC);
- R15 = 0;
+ /* start up in SVC mode with interrupts disabled. */
+ ARM7REG(eCPSR) = I_MASK | F_MASK | 0x10;
+ SwitchMode(cpustate, eARM7_MODE_SVC);
+ R15 = 0;
}
// CPU CHECK IRQ STATE
// Note: couldn't find any exact cycle counts for most of these exceptions
void arm7_check_irq_state(arm_state *cpustate)
{
- UINT32 cpsr = GET_CPSR; /* save current CPSR */
- UINT32 pc = R15 + 4; /* save old pc (already incremented in pipeline) */;
-
- /* Exception priorities:
-
- Reset
- Data abort
- FIRQ
- IRQ
- Prefetch abort
- Undefined instruction
- Software Interrupt
- */
-
- // Data Abort
- if (cpustate->pendingAbtD) {
- if (MODE26) fatalerror( "pendingAbtD (todo)\n");
- SwitchMode(cpustate, eARM7_MODE_ABT); /* Set ABT mode so PC is saved to correct R14 bank */
- SET_REGISTER(cpustate, 14, pc - 8 + 8); /* save PC to R14 */
- SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
- SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
- SET_CPSR(GET_CPSR & ~T_MASK);
- R15 = 0x10; /* IRQ Vector address */
- if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
- cpustate->pendingAbtD = 0;
- return;
- }
-
- // FIQ
- if (cpustate->pendingFiq && (cpsr & F_MASK) == 0) {
- if (MODE26) fatalerror( "pendingFiq (todo)\n");
- SwitchMode(cpustate, eARM7_MODE_FIQ); /* Set FIQ mode so PC is saved to correct R14 bank */
- SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
- SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
- SET_CPSR(GET_CPSR | I_MASK | F_MASK); /* Mask both IRQ & FIQ */
- SET_CPSR(GET_CPSR & ~T_MASK);
- R15 = 0x1c; /* IRQ Vector address */
- if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
- return;
- }
-
- // IRQ
- if (cpustate->pendingIrq && (cpsr & I_MASK) == 0) {
- SwitchMode(cpustate, eARM7_MODE_IRQ); /* Set IRQ mode so PC is saved to correct R14 bank */
- SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
- if (MODE32)
- {
- SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
- SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
- SET_CPSR(GET_CPSR & ~T_MASK);
- R15 = 0x18; /* IRQ Vector address */
- }
- else
- {
- UINT32 temp;
- R15 = (pc & 0xF4000000) /* N Z C V F */ | 0x18 | 0x00000002 /* IRQ */ | 0x08000000 /* I */;
- temp = (GET_CPSR & 0x0FFFFF3F) /* N Z C V I F */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */;
- SET_CPSR(temp); /* Mask IRQ */
- }
- if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
- return;
- }
-
- // Prefetch Abort
- if (cpustate->pendingAbtP) {
- if (MODE26) fatalerror( "pendingAbtP (todo)\n");
- SwitchMode(cpustate, eARM7_MODE_ABT); /* Set ABT mode so PC is saved to correct R14 bank */
- SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
- SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
- SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
- SET_CPSR(GET_CPSR & ~T_MASK);
- R15 = 0x0c; /* IRQ Vector address */
- if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
- cpustate->pendingAbtP = 0;
- return;
- }
-
- // Undefined instruction
- if (cpustate->pendingUnd) {
- if (MODE26) fatalerror( "pendingUnd (todo)\n");
- SwitchMode(cpustate, eARM7_MODE_UND); /* Set UND mode so PC is saved to correct R14 bank */
- // compensate for prefetch (should this also be done for normal IRQ?)
- if (T_IS_SET(GET_CPSR))
- {
- SET_REGISTER(cpustate, 14, pc - 4 + 2); /* save PC to R14 */
- }
- else
- {
- SET_REGISTER(cpustate, 14, pc - 4 + 4 - 4); /* save PC to R14 */
- }
- SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
- SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
- SET_CPSR(GET_CPSR & ~T_MASK);
- R15 = 0x04; /* IRQ Vector address */
- if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
- cpustate->pendingUnd = 0;
- return;
- }
-
- // Software Interrupt
- if (cpustate->pendingSwi) {
- SwitchMode(cpustate, eARM7_MODE_SVC); /* Set SVC mode so PC is saved to correct R14 bank */
- // compensate for prefetch (should this also be done for normal IRQ?)
- if (T_IS_SET(GET_CPSR))
- {
- SET_REGISTER(cpustate, 14, pc - 4 + 2); /* save PC to R14 */
- }
- else
- {
- SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
- }
- if (MODE32)
- {
- SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
- SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
- SET_CPSR(GET_CPSR & ~T_MASK); /* Go to ARM mode */
- R15 = 0x08; /* Jump to the SWI vector */
- }
- else
- {
- UINT32 temp;
- R15 = (pc & 0xF4000000) /* N Z C V F */ | 0x08 | 0x00000003 /* SVC */ | 0x08000000 /* I */;
- temp = (GET_CPSR & 0x0FFFFF3F) /* N Z C V I F */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */;
- SET_CPSR(temp); /* Mask IRQ */
- }
- if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
- cpustate->pendingSwi = 0;
- return;
- }
+ UINT32 cpsr = GET_CPSR; /* save current CPSR */
+ UINT32 pc = R15 + 4; /* save old pc (already incremented in pipeline) */;
+
+ /* Exception priorities:
+
+ Reset
+ Data abort
+ FIRQ
+ IRQ
+ Prefetch abort
+ Undefined instruction
+ Software Interrupt
+ */
+
+ // Data Abort
+ if (cpustate->pendingAbtD) {
+ if (MODE26) fatalerror( "pendingAbtD (todo)\n");
+ SwitchMode(cpustate, eARM7_MODE_ABT); /* Set ABT mode so PC is saved to correct R14 bank */
+ SET_REGISTER(cpustate, 14, pc - 8 + 8); /* save PC to R14 */
+ SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
+ SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
+ SET_CPSR(GET_CPSR & ~T_MASK);
+ R15 = 0x10; /* IRQ Vector address */
+ if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
+ cpustate->pendingAbtD = 0;
+ return;
+ }
+
+ // FIQ
+ if (cpustate->pendingFiq && (cpsr & F_MASK) == 0) {
+ if (MODE26) fatalerror( "pendingFiq (todo)\n");
+ SwitchMode(cpustate, eARM7_MODE_FIQ); /* Set FIQ mode so PC is saved to correct R14 bank */
+ SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
+ SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
+ SET_CPSR(GET_CPSR | I_MASK | F_MASK); /* Mask both IRQ & FIQ */
+ SET_CPSR(GET_CPSR & ~T_MASK);
+ R15 = 0x1c; /* IRQ Vector address */
+ if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
+ return;
+ }
+
+ // IRQ
+ if (cpustate->pendingIrq && (cpsr & I_MASK) == 0) {
+ SwitchMode(cpustate, eARM7_MODE_IRQ); /* Set IRQ mode so PC is saved to correct R14 bank */
+ SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
+ if (MODE32)
+ {
+ SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
+ SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
+ SET_CPSR(GET_CPSR & ~T_MASK);
+ R15 = 0x18; /* IRQ Vector address */
+ }
+ else
+ {
+ UINT32 temp;
+ R15 = (pc & 0xF4000000) /* N Z C V F */ | 0x18 | 0x00000002 /* IRQ */ | 0x08000000 /* I */;
+ temp = (GET_CPSR & 0x0FFFFF3F) /* N Z C V I F */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */;
+ SET_CPSR(temp); /* Mask IRQ */
+ }
+ if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
+ return;
+ }
+
+ // Prefetch Abort
+ if (cpustate->pendingAbtP) {
+ if (MODE26) fatalerror( "pendingAbtP (todo)\n");
+ SwitchMode(cpustate, eARM7_MODE_ABT); /* Set ABT mode so PC is saved to correct R14 bank */
+ SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
+ SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
+ SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
+ SET_CPSR(GET_CPSR & ~T_MASK);
+ R15 = 0x0c; /* IRQ Vector address */
+ if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
+ cpustate->pendingAbtP = 0;
+ return;
+ }
+
+ // Undefined instruction
+ if (cpustate->pendingUnd) {
+ if (MODE26) fatalerror( "pendingUnd (todo)\n");
+ SwitchMode(cpustate, eARM7_MODE_UND); /* Set UND mode so PC is saved to correct R14 bank */
+ // compensate for prefetch (should this also be done for normal IRQ?)
+ if (T_IS_SET(GET_CPSR))
+ {
+ SET_REGISTER(cpustate, 14, pc - 4 + 2); /* save PC to R14 */
+ }
+ else
+ {
+ SET_REGISTER(cpustate, 14, pc - 4 + 4 - 4); /* save PC to R14 */
+ }
+ SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
+ SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
+ SET_CPSR(GET_CPSR & ~T_MASK);
+ R15 = 0x04; /* IRQ Vector address */
+ if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
+ cpustate->pendingUnd = 0;
+ return;
+ }
+
+ // Software Interrupt
+ if (cpustate->pendingSwi) {
+ SwitchMode(cpustate, eARM7_MODE_SVC); /* Set SVC mode so PC is saved to correct R14 bank */
+ // compensate for prefetch (should this also be done for normal IRQ?)
+ if (T_IS_SET(GET_CPSR))
+ {
+ SET_REGISTER(cpustate, 14, pc - 4 + 2); /* save PC to R14 */
+ }
+ else
+ {
+ SET_REGISTER(cpustate, 14, pc - 4 + 4); /* save PC to R14 */
+ }
+ if (MODE32)
+ {
+ SET_REGISTER(cpustate, SPSR, cpsr); /* Save current CPSR */
+ SET_CPSR(GET_CPSR | I_MASK); /* Mask IRQ */
+ SET_CPSR(GET_CPSR & ~T_MASK); /* Go to ARM mode */
+ R15 = 0x08; /* Jump to the SWI vector */
+ }
+ else
+ {
+ UINT32 temp;
+ R15 = (pc & 0xF4000000) /* N Z C V F */ | 0x08 | 0x00000003 /* SVC */ | 0x08000000 /* I */;
+ temp = (GET_CPSR & 0x0FFFFF3F) /* N Z C V I F */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */;
+ SET_CPSR(temp); /* Mask IRQ */
+ }
+ if ((COPRO_CTRL & COPRO_CTRL_MMU_EN) && (COPRO_CTRL & COPRO_CTRL_INTVEC_ADJUST)) R15 |= 0xFFFF0000;
+ cpustate->pendingSwi = 0;
+ return;
+ }
}
// CPU - SET IRQ LINE
static void arm7_core_set_irq_line(arm_state *cpustate, int irqline, int state)
{
- switch (irqline) {
+ switch (irqline) {
- case ARM7_IRQ_LINE: /* IRQ */
- cpustate->pendingIrq = state & 1;
- break;
+ case ARM7_IRQ_LINE: /* IRQ */
+ cpustate->pendingIrq = state & 1;
+ break;
- case ARM7_FIRQ_LINE: /* FIRQ */
- cpustate->pendingFiq = state & 1;
- break;
+ case ARM7_FIRQ_LINE: /* FIRQ */
+ cpustate->pendingFiq = state & 1;
+ break;
- case ARM7_ABORT_EXCEPTION:
- cpustate->pendingAbtD = state & 1;
- break;
- case ARM7_ABORT_PREFETCH_EXCEPTION:
- cpustate->pendingAbtP = state & 1;
- break;
+ case ARM7_ABORT_EXCEPTION:
+ cpustate->pendingAbtD = state & 1;
+ break;
+ case ARM7_ABORT_PREFETCH_EXCEPTION:
+ cpustate->pendingAbtP = state & 1;
+ break;
- case ARM7_UNDEFINE_EXCEPTION:
- cpustate->pendingUnd = state & 1;
- break;
- }
+ case ARM7_UNDEFINE_EXCEPTION:
+ cpustate->pendingUnd = state & 1;
+ break;
+ }
- ARM7_CHECKIRQ;
+ ARM7_CHECKIRQ;
}
diff --git a/src/emu/cpu/arm7/arm7core.h b/src/emu/cpu/arm7/arm7core.h
index 14a7a8c9195..2733f2d7a41 100644
--- a/src/emu/cpu/arm7/arm7core.h
+++ b/src/emu/cpu/arm7/arm7core.h
@@ -42,9 +42,9 @@
***************************************************************************************************/
enum
{
- ARM7_IRQ_LINE=0, ARM7_FIRQ_LINE,
- ARM7_ABORT_EXCEPTION, ARM7_ABORT_PREFETCH_EXCEPTION, ARM7_UNDEFINE_EXCEPTION,
- ARM7_NUM_LINES
+ ARM7_IRQ_LINE=0, ARM7_FIRQ_LINE,
+ ARM7_ABORT_EXCEPTION, ARM7_ABORT_PREFETCH_EXCEPTION, ARM7_UNDEFINE_EXCEPTION,
+ ARM7_NUM_LINES
};
// Really there's only 1 ABORT Line.. and cpu decides whether it's during data fetch or prefetch, but we let the user specify
@@ -53,12 +53,12 @@ enum
***************************************************************************************************/
enum
{
- ARM7_PC = 0,
- ARM7_R0, ARM7_R1, ARM7_R2, ARM7_R3, ARM7_R4, ARM7_R5, ARM7_R6, ARM7_R7,
- ARM7_R8, ARM7_R9, ARM7_R10, ARM7_R11, ARM7_R12, ARM7_R13, ARM7_R14, ARM7_R15,
- ARM7_FR8, ARM7_FR9, ARM7_FR10, ARM7_FR11, ARM7_FR12, ARM7_FR13, ARM7_FR14,
- ARM7_IR13, ARM7_IR14, ARM7_SR13, ARM7_SR14, ARM7_FSPSR, ARM7_ISPSR, ARM7_SSPSR,
- ARM7_CPSR, ARM7_AR13, ARM7_AR14, ARM7_ASPSR, ARM7_UR13, ARM7_UR14, ARM7_USPSR
+ ARM7_PC = 0,
+ ARM7_R0, ARM7_R1, ARM7_R2, ARM7_R3, ARM7_R4, ARM7_R5, ARM7_R6, ARM7_R7,
+ ARM7_R8, ARM7_R9, ARM7_R10, ARM7_R11, ARM7_R12, ARM7_R13, ARM7_R14, ARM7_R15,
+ ARM7_FR8, ARM7_FR9, ARM7_FR10, ARM7_FR11, ARM7_FR12, ARM7_FR13, ARM7_FR14,
+ ARM7_IR13, ARM7_IR14, ARM7_SR13, ARM7_SR14, ARM7_FSPSR, ARM7_ISPSR, ARM7_SSPSR,
+ ARM7_CPSR, ARM7_AR13, ARM7_AR14, ARM7_ASPSR, ARM7_UR13, ARM7_UR14, ARM7_USPSR
};
/* There are 36 Unique - 32 bit processor registers */
@@ -66,34 +66,34 @@ enum
/* This is a list of each *unique* register */
enum
{
- /* All modes have the following */
- eR0 = 0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8, eR9, eR10, eR11, eR12,
- eR13, /* Stack Pointer */
- eR14, /* Link Register (holds return address) */
- eR15, /* Program Counter */
- eCPSR, /* Current Status Program Register */
+ /* All modes have the following */
+ eR0 = 0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8, eR9, eR10, eR11, eR12,
+ eR13, /* Stack Pointer */
+ eR14, /* Link Register (holds return address) */
+ eR15, /* Program Counter */
+ eCPSR, /* Current Status Program Register */
- /* Fast Interrupt - Bank switched registers */
- eR8_FIQ, eR9_FIQ, eR10_FIQ, eR11_FIQ, eR12_FIQ, eR13_FIQ, eR14_FIQ, eSPSR_FIQ,
+ /* Fast Interrupt - Bank switched registers */
+ eR8_FIQ, eR9_FIQ, eR10_FIQ, eR11_FIQ, eR12_FIQ, eR13_FIQ, eR14_FIQ, eSPSR_FIQ,
- /* IRQ - Bank switched registers */
- eR13_IRQ, eR14_IRQ, eSPSR_IRQ,
+ /* IRQ - Bank switched registers */
+ eR13_IRQ, eR14_IRQ, eSPSR_IRQ,
- /* Supervisor/Service Mode - Bank switched registers */
- eR13_SVC, eR14_SVC, eSPSR_SVC,
+ /* Supervisor/Service Mode - Bank switched registers */
+ eR13_SVC, eR14_SVC, eSPSR_SVC,
- /* Abort Mode - Bank switched registers */
- eR13_ABT, eR14_ABT, eSPSR_ABT,
+ /* Abort Mode - Bank switched registers */
+ eR13_ABT, eR14_ABT, eSPSR_ABT,
- /* Undefined Mode - Bank switched registers */
- eR13_UND, eR14_UND, eSPSR_UND,
+ /* Undefined Mode - Bank switched registers */
+ eR13_UND, eR14_UND, eSPSR_UND,
- kNumRegisters
+ kNumRegisters
};
/* Coprocessor-related macros */
-#define COPRO_TLB_BASE cpustate->tlbBase
+#define COPRO_TLB_BASE cpustate->tlbBase
#define COPRO_TLB_BASE_MASK 0xffffc000
#define COPRO_TLB_VADDR_FLTI_MASK 0xfff00000
#define COPRO_TLB_VADDR_FLTI_MASK_SHIFT 18
@@ -139,62 +139,62 @@ enum
#define COPRO_CTRL_INTVEC_F 1
#define COPRO_CTRL_MASK 0x0000338f
-#define COPRO_DOMAIN_ACCESS_CONTROL cpustate->domainAccessControl
+#define COPRO_DOMAIN_ACCESS_CONTROL cpustate->domainAccessControl
-#define COPRO_FAULT_STATUS_D cpustate->faultStatus[0]
-#define COPRO_FAULT_STATUS_P cpustate->faultStatus[1]
+#define COPRO_FAULT_STATUS_D cpustate->faultStatus[0]
+#define COPRO_FAULT_STATUS_P cpustate->faultStatus[1]
-#define COPRO_FAULT_ADDRESS cpustate->faultAddress
+#define COPRO_FAULT_ADDRESS cpustate->faultAddress
-#define COPRO_FCSE_PID cpustate->fcsePID
+#define COPRO_FCSE_PID cpustate->fcsePID
/* Coprocessor Registers */
#define ARM7COPRO_REGS \
- UINT32 control; \
- UINT32 tlbBase; \
- UINT32 faultStatus[2]; \
- UINT32 faultAddress; \
- UINT32 fcsePID; \
- UINT32 domainAccessControl;
+ UINT32 control; \
+ UINT32 tlbBase; \
+ UINT32 faultStatus[2]; \
+ UINT32 faultAddress; \
+ UINT32 fcsePID; \
+ UINT32 domainAccessControl;
enum
{
- eARM_ARCHFLAGS_T = 1, // Thumb present
- eARM_ARCHFLAGS_E = 2, // extended DSP operations present (only for v5+)
- eARM_ARCHFLAGS_J = 4, // "Jazelle" (direct execution of Java bytecode)
- eARM_ARCHFLAGS_MMU = 8, // has on-board MMU (traditional ARM style like the SA1110)
- eARM_ARCHFLAGS_SA = 16, // StrongARM extensions (enhanced TLB)
- eARM_ARCHFLAGS_XSCALE = 32, // XScale extensions (CP14, enhanced TLB)
- eARM_ARCHFLAGS_MODE26 = 64, // supports 26-bit backwards compatibility mode
+ eARM_ARCHFLAGS_T = 1, // Thumb present
+ eARM_ARCHFLAGS_E = 2, // extended DSP operations present (only for v5+)
+ eARM_ARCHFLAGS_J = 4, // "Jazelle" (direct execution of Java bytecode)
+ eARM_ARCHFLAGS_MMU = 8, // has on-board MMU (traditional ARM style like the SA1110)
+ eARM_ARCHFLAGS_SA = 16, // StrongARM extensions (enhanced TLB)
+ eARM_ARCHFLAGS_XSCALE = 32, // XScale extensions (CP14, enhanced TLB)
+ eARM_ARCHFLAGS_MODE26 = 64, // supports 26-bit backwards compatibility mode
};
#define ARM7CORE_REGS \
- UINT32 sArmRegister[kNumRegisters]; \
- UINT8 pendingIrq; \
- UINT8 pendingFiq; \
- UINT8 pendingAbtD; \
- UINT8 pendingAbtP; \
- UINT8 pendingUnd; \
- UINT8 pendingSwi; \
- INT32 iCount; \
- endianness_t endian; \
- device_irq_acknowledge_callback irq_callback; \
- legacy_cpu_device *device; \
- address_space *program; \
- direct_read_data *direct;
+ UINT32 sArmRegister[kNumRegisters]; \
+ UINT8 pendingIrq; \
+ UINT8 pendingFiq; \
+ UINT8 pendingAbtD; \
+ UINT8 pendingAbtP; \
+ UINT8 pendingUnd; \
+ UINT8 pendingSwi; \
+ INT32 iCount; \
+ endianness_t endian; \
+ device_irq_acknowledge_callback irq_callback; \
+ legacy_cpu_device *device; \
+ address_space *program; \
+ direct_read_data *direct;
/* CPU state struct */
struct arm_state
{
- ARM7CORE_REGS // these must be included in your cpu specific register implementation
+ ARM7CORE_REGS // these must be included in your cpu specific register implementation
ARM7COPRO_REGS
- UINT8 archRev; // ARM architecture revision (3, 4, and 5 are valid)
- UINT8 archFlags; // architecture flags
+ UINT8 archRev; // ARM architecture revision (3, 4, and 5 are valid)
+ UINT8 archFlags; // architecture flags
#if ARM7_MMU_ENABLE_HACK
- UINT32 mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
+ UINT32 mmu_enable_addr; // workaround for "MMU is enabled when PA != VA" problem
#endif
};
@@ -204,13 +204,13 @@ struct arm_state
// Mode values come from bit 4-0 of CPSR, but we are ignoring bit 4 here, since bit 4 always = 1 for valid modes
enum
{
- eARM7_MODE_USER = 0x0, // Bit: 4-0 = 10000
- eARM7_MODE_FIQ = 0x1, // Bit: 4-0 = 10001
- eARM7_MODE_IRQ = 0x2, // Bit: 4-0 = 10010
- eARM7_MODE_SVC = 0x3, // Bit: 4-0 = 10011
- eARM7_MODE_ABT = 0x7, // Bit: 4-0 = 10111
- eARM7_MODE_UND = 0xb, // Bit: 4-0 = 11011
- eARM7_MODE_SYS = 0xf // Bit: 4-0 = 11111
+ eARM7_MODE_USER = 0x0, // Bit: 4-0 = 10000
+ eARM7_MODE_FIQ = 0x1, // Bit: 4-0 = 10001
+ eARM7_MODE_IRQ = 0x2, // Bit: 4-0 = 10010
+ eARM7_MODE_SVC = 0x3, // Bit: 4-0 = 10011
+ eARM7_MODE_ABT = 0x7, // Bit: 4-0 = 10111
+ eARM7_MODE_UND = 0xb, // Bit: 4-0 = 11011
+ eARM7_MODE_SYS = 0xf // Bit: 4-0 = 11111
};
#define ARM7_NUM_MODES 0x10
@@ -218,22 +218,22 @@ enum
static const int thumbCycles[256] =
{
// 0 1 2 3 4 5 6 7 8 9 a b c d e f
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 0
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 1
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 2
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 3
- 1, 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, // 4
- 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // 5
- 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 6
- 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 7
- 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 8
- 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 9
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // a
- 1, 1, 1, 1, 2, 2, 1, 1, 1, 1, 1, 1, 2, 4, 1, 1, // b
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, // c
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, // d
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // e
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 // f
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 0
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 1
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 2
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, // 3
+ 1, 1, 1, 1, 1, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 3, // 4
+ 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // 5
+ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 6
+ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 7
+ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 8
+ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, // 9
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // a
+ 1, 1, 1, 1, 2, 2, 1, 1, 1, 1, 1, 1, 2, 4, 1, 1, // b
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, // c
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, // d
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, // e
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2 // f
};
/* 17 processor registers are visible at any given time,
@@ -242,51 +242,51 @@ static const int thumbCycles[256] =
static const int sRegisterTable[ARM7_NUM_MODES][18] =
{
- { /* USR */
- eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8, eR9, eR10, eR11, eR12,
- eR13, eR14,
- eR15, eCPSR // No SPSR in this mode
- },
- { /* FIQ */
- eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8_FIQ, eR9_FIQ, eR10_FIQ, eR11_FIQ, eR12_FIQ,
- eR13_FIQ, eR14_FIQ,
- eR15, eCPSR, eSPSR_FIQ
- },
- { /* IRQ */
- eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8, eR9, eR10, eR11, eR12,
- eR13_IRQ, eR14_IRQ,
- eR15, eCPSR, eSPSR_IRQ
- },
- { /* SVC */
- eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8, eR9, eR10, eR11, eR12,
- eR13_SVC, eR14_SVC,
- eR15, eCPSR, eSPSR_SVC
- },
- {0}, {0}, {0}, // values for modes 4,5,6 are not valid
- { /* ABT */
- eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8, eR9, eR10, eR11, eR12,
- eR13_ABT, eR14_ABT,
- eR15, eCPSR, eSPSR_ABT
- },
- {0}, {0}, {0}, // values for modes 8,9,a are not valid!
- { /* UND */
- eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8, eR9, eR10, eR11, eR12,
- eR13_UND, eR14_UND,
- eR15, eCPSR, eSPSR_UND
- },
- {0}, {0}, {0}, // values for modes c,d, e are not valid!
- { /* SYS */
- eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
- eR8, eR9, eR10, eR11, eR12,
- eR13, eR14,
- eR15, eCPSR // No SPSR in this mode
- }
+ { /* USR */
+ eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8, eR9, eR10, eR11, eR12,
+ eR13, eR14,
+ eR15, eCPSR // No SPSR in this mode
+ },
+ { /* FIQ */
+ eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8_FIQ, eR9_FIQ, eR10_FIQ, eR11_FIQ, eR12_FIQ,
+ eR13_FIQ, eR14_FIQ,
+ eR15, eCPSR, eSPSR_FIQ
+ },
+ { /* IRQ */
+ eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8, eR9, eR10, eR11, eR12,
+ eR13_IRQ, eR14_IRQ,
+ eR15, eCPSR, eSPSR_IRQ
+ },
+ { /* SVC */
+ eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8, eR9, eR10, eR11, eR12,
+ eR13_SVC, eR14_SVC,
+ eR15, eCPSR, eSPSR_SVC
+ },
+ {0}, {0}, {0}, // values for modes 4,5,6 are not valid
+ { /* ABT */
+ eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8, eR9, eR10, eR11, eR12,
+ eR13_ABT, eR14_ABT,
+ eR15, eCPSR, eSPSR_ABT
+ },
+ {0}, {0}, {0}, // values for modes 8,9,a are not valid!
+ { /* UND */
+ eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8, eR9, eR10, eR11, eR12,
+ eR13_UND, eR14_UND,
+ eR15, eCPSR, eSPSR_UND
+ },
+ {0}, {0}, {0}, // values for modes c,d, e are not valid!
+ { /* SYS */
+ eR0, eR1, eR2, eR3, eR4, eR5, eR6, eR7,
+ eR8, eR9, eR10, eR11, eR12,
+ eR13, eR14,
+ eR15, eCPSR // No SPSR in this mode
+ }
};
#define N_BIT 31
@@ -379,7 +379,7 @@ static const int sRegisterTable[ARM7_NUM_MODES][18] =
#define INSN_COPRO_N_SHIFT 20
#define INSN_COPRO_CREG_SHIFT 16
#define INSN_COPRO_AREG_SHIFT 12
-#define INSN_COPRO_CPNUM_SHIFT 8
+#define INSN_COPRO_CPNUM_SHIFT 8
#define INSN_COPRO_OP2_SHIFT 5
#define THUMB_INSN_TYPE ((UINT16)0xf000)
@@ -446,42 +446,42 @@ static const int sRegisterTable[ARM7_NUM_MODES][18] =
enum
{
- OPCODE_AND, /* 0000 */
- OPCODE_EOR, /* 0001 */
- OPCODE_SUB, /* 0010 */
- OPCODE_RSB, /* 0011 */
- OPCODE_ADD, /* 0100 */
- OPCODE_ADC, /* 0101 */
- OPCODE_SBC, /* 0110 */
- OPCODE_RSC, /* 0111 */
- OPCODE_TST, /* 1000 */
- OPCODE_TEQ, /* 1001 */
- OPCODE_CMP, /* 1010 */
- OPCODE_CMN, /* 1011 */
- OPCODE_ORR, /* 1100 */
- OPCODE_MOV, /* 1101 */
- OPCODE_BIC, /* 1110 */
- OPCODE_MVN /* 1111 */
+ OPCODE_AND, /* 0000 */
+ OPCODE_EOR, /* 0001 */
+ OPCODE_SUB, /* 0010 */
+ OPCODE_RSB, /* 0011 */
+ OPCODE_ADD, /* 0100 */
+ OPCODE_ADC, /* 0101 */
+ OPCODE_SBC, /* 0110 */
+ OPCODE_RSC, /* 0111 */
+ OPCODE_TST, /* 1000 */
+ OPCODE_TEQ, /* 1001 */
+ OPCODE_CMP, /* 1010 */
+ OPCODE_CMN, /* 1011 */
+ OPCODE_ORR, /* 1100 */
+ OPCODE_MOV, /* 1101 */
+ OPCODE_BIC, /* 1110 */
+ OPCODE_MVN /* 1111 */
};
enum
{
- COND_EQ = 0, /* Z equal */
- COND_NE, /* ~Z not equal */
- COND_CS, COND_HS = 2, /* C unsigned higher or same */
- COND_CC, COND_LO = 3, /* ~C unsigned lower */
- COND_MI, /* N negative */
- COND_PL, /* ~N positive or zero */
- COND_VS, /* V overflow */
- COND_VC, /* ~V no overflow */
- COND_HI, /* C && ~Z unsigned higher */
- COND_LS, /* ~C || Z unsigned lower or same */
- COND_GE, /* N == V greater or equal */
- COND_LT, /* N != V less than */
- COND_GT, /* ~Z && N == V greater than */
- COND_LE, /* Z || N != V less than or equal */
- COND_AL, /* 1 always */
- COND_NV /* 0 never */
+ COND_EQ = 0, /* Z equal */
+ COND_NE, /* ~Z not equal */
+ COND_CS, COND_HS = 2, /* C unsigned higher or same */
+ COND_CC, COND_LO = 3, /* ~C unsigned lower */
+ COND_MI, /* N negative */
+ COND_PL, /* ~N positive or zero */
+ COND_VS, /* V overflow */
+ COND_VC, /* ~V no overflow */
+ COND_HI, /* C && ~Z unsigned higher */
+ COND_LS, /* ~C || Z unsigned lower or same */
+ COND_GE, /* N == V greater or equal */
+ COND_LT, /* N != V less than */
+ COND_GT, /* ~Z && N == V greater than */
+ COND_LE, /* Z || N != V less than or equal */
+ COND_AL, /* 1 always */
+ COND_NV /* 0 never */
};
#define LSL(v, s) ((v) << (s))
@@ -502,8 +502,8 @@ enum
#define THUMB_SIGN_BIT ((UINT32)(1 << 31))
#define THUMB_SIGN_BITS_DIFFER(a, b) (((a)^(b)) >> 31)
-#define MODE32 (GET_CPSR & 0x10)
-#define MODE26 (!(GET_CPSR & 0x10))
+#define MODE32 (GET_CPSR & 0x10)
+#define MODE26 (!(GET_CPSR & 0x10))
#define GET_PC (MODE32 ? R15 : R15 & 0x03FFFFFC)
#define ARM7_TLB_ABORT_D (1 << 0)
diff --git a/src/emu/cpu/arm7/arm7dasm.c b/src/emu/cpu/arm7/arm7dasm.c
index 7c52e8fa0e0..e8129ca436a 100644
--- a/src/emu/cpu/arm7/arm7dasm.c
+++ b/src/emu/cpu/arm7/arm7dasm.c
@@ -49,7 +49,7 @@ static char *DasmCoProc_RT( char *pBuf, UINT32 opcode, const char *pConditionCod
{
/* co processor register transfer */
/* xxxx 1110 oooL nnnn dddd cccc ppp1 mmmm */
- if( opcode&0x00100000 ) //Bit 20 = Load or Store
+ if( opcode&0x00100000 ) //Bit 20 = Load or Store
{
pBuf += sprintf( pBuf, "MRC" );
}
@@ -71,19 +71,19 @@ static char *DasmCoProc_DT( char *pBuf, UINT32 opcode, const char *pConditionCod
/* xxxx 111P UNWL nnnn dddd pppp oooooooo */
//todo: test this on valid instructions
- pBuf += sprintf(pBuf, "%s%s",(opcode&0x00100000)?"LDC":"STC",pConditionCode); //Bit 20 = 1 for Load, 0 for Store
+ pBuf += sprintf(pBuf, "%s%s",(opcode&0x00100000)?"LDC":"STC",pConditionCode); //Bit 20 = 1 for Load, 0 for Store
//Long Operation
- if(opcode & 0x400000) pBuf += sprintf(pBuf, "L");
+ if(opcode & 0x400000) pBuf += sprintf(pBuf, "L");
pBuf = WritePadding( pBuf, pBuf0 );
//P# & CD #
pBuf += sprintf(pBuf, "p%d, c%d, ",(opcode>>8)&0x0f,(opcode>>12)&0x0f);
//Base Register (Rn)
- pBuf += sprintf(pBuf, "[R%d%s",(opcode>>16)&0x0f,(opcode&0x1000000)?"":"]"); //If Bit 24 = 1, Pre-increment, otherwise, Post increment so close brace
+ pBuf += sprintf(pBuf, "[R%d%s",(opcode>>16)&0x0f,(opcode&0x1000000)?"":"]"); //If Bit 24 = 1, Pre-increment, otherwise, Post increment so close brace
//immediate value ( 8 bit value is << 2 according to manual )
- if(opcode & 0xff) pBuf += sprintf(pBuf, ",%s#$%x",(opcode&0x800000)?"":"-",(opcode & 0xff)<<2);
+ if(opcode & 0xff) pBuf += sprintf(pBuf, ",%s#$%x",(opcode&0x800000)?"":"-",(opcode & 0xff)<<2);
//Pre-Inc brace & Write back
pBuf += sprintf(pBuf, "%s%s",(opcode&0x1000000)?"]":"",(opcode&0x200000)?"{!}":"");
@@ -232,88 +232,88 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
if ((opcode & 0x0f) == 14)
dasmflags = DASMFLAG_STEP_OUT;
}
- else if ((opcode & 0x0ff000f0) == 0x01600010) // CLZ - v5
+ else if ((opcode & 0x0ff000f0) == 0x01600010) // CLZ - v5
{
pBuf += sprintf(pBuf, "CLZ");
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d", (opcode>>12)&0xf, opcode&0xf);
}
- else if ((opcode & 0x0ff000f0) == 0x01000050) // QADD - v5
+ else if ((opcode & 0x0ff000f0) == 0x01000050) // QADD - v5
{
pBuf += sprintf(pBuf, "QADD");
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf);
}
- else if ((opcode & 0x0ff000f0) == 0x01400050) // QDADD - v5
+ else if ((opcode & 0x0ff000f0) == 0x01400050) // QDADD - v5
{
pBuf += sprintf(pBuf, "QDADD");
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf);
}
- else if ((opcode & 0x0ff000f0) == 0x01200050) // QSUB - v5
+ else if ((opcode & 0x0ff000f0) == 0x01200050) // QSUB - v5
{
pBuf += sprintf(pBuf, "QSUB");
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf);
}
- else if ((opcode & 0x0ff000f0) == 0x01600050) // QDSUB - v5
+ else if ((opcode & 0x0ff000f0) == 0x01600050) // QDSUB - v5
{
pBuf += sprintf(pBuf, "QDSUB");
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d", (opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf);
}
- else if ((opcode & 0x0ff00090) == 0x01000080) // SMLAxy - v5
+ else if ((opcode & 0x0ff00090) == 0x01000080) // SMLAxy - v5
{
pBuf += sprintf(pBuf, "SMLA%c%c", (opcode&0x20) ? 'T' : 'B', (opcode&0x40) ? 'T' : 'B');
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d, R%d", (opcode>>16)&0xf, (opcode>>12)&0xf, opcode&0xf, (opcode>>8)&0xf);
}
- else if ((opcode & 0x0ff00090) == 0x01400080) // SMLALxy - v5
+ else if ((opcode & 0x0ff00090) == 0x01400080) // SMLALxy - v5
{
pBuf += sprintf(pBuf, "SMLAL%c%c", (opcode&0x20) ? 'T' : 'B', (opcode&0x40) ? 'T' : 'B');
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d, R%d", (opcode>>16)&0xf, (opcode>>12)&0xf, opcode&0xf, (opcode>>8)&0xf);
}
- else if ((opcode & 0x0ff00090) == 0x01600080) // SMULxy - v5
+ else if ((opcode & 0x0ff00090) == 0x01600080) // SMULxy - v5
{
pBuf += sprintf(pBuf, "SMUL%c%c", (opcode&0x20) ? 'T' : 'B', (opcode&0x40) ? 'T' : 'B');
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d", (opcode>>16)&0xf, opcode&0xf, (opcode>>12)&0xf);
}
- else if ((opcode & 0x0ff000b0) == 0x012000a0) // SMULWy - v5
+ else if ((opcode & 0x0ff000b0) == 0x012000a0) // SMULWy - v5
{
pBuf += sprintf(pBuf, "SMULW%c", (opcode&0x40) ? 'T' : 'B');
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d", (opcode>>16)&0xf, opcode&0xf, (opcode>>8)&0xf);
}
- else if ((opcode & 0x0ff000b0) == 0x01200080) // SMLAWy - v5
+ else if ((opcode & 0x0ff000b0) == 0x01200080) // SMLAWy - v5
{
pBuf += sprintf(pBuf, "SMLAW%c", (opcode&0x40) ? 'T' : 'B');
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "R%d, R%d, R%d, R%d", (opcode>>16)&0xf, opcode&0xf, (opcode>>8)&0xf, (opcode>>12)&0xf);
}
- else if( (opcode&0x0e000000)==0 && (opcode&0x80) && (opcode&0x10) ) //bits 27-25 == 000, bit 7=1, bit 4=1
+ else if( (opcode&0x0e000000)==0 && (opcode&0x80) && (opcode&0x10) ) //bits 27-25 == 000, bit 7=1, bit 4=1
{
/* multiply or swap or half word data transfer */
if(opcode&0x60)
- { //bits = 6-5 != 00
+ { //bits = 6-5 != 00
/* half word data transfer */
- if (((opcode & 0x60) == 0x40) && !(opcode & 0x100000)) // bit 20 = 0, bits 5&6 = 10 is ARMv5 LDRD
+ if (((opcode & 0x60) == 0x40) && !(opcode & 0x100000)) // bit 20 = 0, bits 5&6 = 10 is ARMv5 LDRD
{
pBuf += sprintf(pBuf, "LDRD%s", pConditionCode);
}
- else if (((opcode & 0x60) == 0x60) && !(opcode & 0x100000)) // bit 20 = 0, bits 5&6 = 11 is ARMv5 STRD
+ else if (((opcode & 0x60) == 0x60) && !(opcode & 0x100000)) // bit 20 = 0, bits 5&6 = 11 is ARMv5 STRD
{
pBuf += sprintf(pBuf, "STRD%s", pConditionCode);
}
else
{
- pBuf += sprintf(pBuf, "%s%s",(opcode&0x00100000)?"LDR":"STR",pConditionCode); //Bit 20 = 1 for Load, 0 for Store
+ pBuf += sprintf(pBuf, "%s%s",(opcode&0x00100000)?"LDR":"STR",pConditionCode); //Bit 20 = 1 for Load, 0 for Store
//Signed? (if not, always unsigned half word)
if(opcode&0x40)
{
- pBuf += sprintf(pBuf, "%s",(opcode&0x20)?"SH":"SB"); //Bit 5 = 1 for Half Word, 0 for Byte
+ pBuf += sprintf(pBuf, "%s",(opcode&0x20)?"SH":"SB"); //Bit 5 = 1 for Half Word, 0 for Byte
}
else
{
@@ -326,10 +326,10 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
//Dest Register
pBuf += sprintf(pBuf, "R%d, ",(opcode>>12)&0x0f);
//Base Register
- pBuf += sprintf(pBuf, "[R%d%s",(opcode>>16)&0x0f,(opcode&0x1000000)?"":"]"); //If Bit 24 = 1, Pre-increment, otherwise, Post increment so close brace
+ pBuf += sprintf(pBuf, "[R%d%s",(opcode>>16)&0x0f,(opcode&0x1000000)?"":"]"); //If Bit 24 = 1, Pre-increment, otherwise, Post increment so close brace
//Immediate or Register Offset?
- if(opcode&0x400000) { //Bit 22 - 1 = immediate, 0 = register
+ if(opcode&0x400000) { //Bit 22 - 1 = immediate, 0 = register
//immediate ( imm. value in high nibble (bits 8-11) and lo nibble (bit 0-3) )
pBuf += sprintf(pBuf, ",%s#$%x",(opcode&0x800000)?"":"-",( (((opcode>>8)&0x0f)<<4) | (opcode&0x0f)));
}
@@ -342,12 +342,12 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
pBuf += sprintf(pBuf, "%s%s",(opcode&0x1000000)?"]":"",(opcode&0x200000)?"{!}":"");
}
else {
- if(opcode&0x01000000) { //bit 24 = 1
+ if(opcode&0x01000000) { //bit 24 = 1
/* swap */
//todo: Test on valid instructions
/* xxxx 0001 0B00 nnnn dddd 0000 1001 mmmm */
pBuf += sprintf( pBuf, "SWP" );
- pBuf += sprintf( pBuf, "%s%s", pConditionCode, (opcode & 0x400000)?"B":"" ); //Bit 22 = Byte/Word selection
+ pBuf += sprintf( pBuf, "%s%s", pConditionCode, (opcode & 0x400000)?"B":"" ); //Bit 22 = Byte/Word selection
//Rd, Rm, [Rn]
pBuf += sprintf( pBuf, "R%d, R%d, [R%d]",
(opcode>>12)&0xf, opcode&0xf, (opcode>>16)&0xf );
@@ -355,7 +355,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
else {
/* multiply or multiply long */
- if( opcode&0x800000 ) //Bit 23 = 1 for Multiply Long
+ if( opcode&0x800000 ) //Bit 23 = 1 for Multiply Long
{
/* Multiply Long */
/* xxxx0001 UAShhhhllllnnnn1001mmmm */
@@ -428,7 +428,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
}
}
}
- else if( (opcode&0x0c000000)==0 ) //bits 27-26 == 00 - This check can only exist properly after Multiplication check above
+ else if( (opcode&0x0c000000)==0 ) //bits 27-26 == 00 - This check can only exist properly after Multiplication check above
{
/* Data Processing OR PSR Transfer */
@@ -442,7 +442,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
if( (opcode&0x00200000) ) {
pBuf += sprintf(pBuf, "MSR%s",pConditionCode );
//Flag Bits Only? (Bit 16 Clear)
- if( (opcode&0x10000)==0) pBuf += sprintf(pBuf, "F");
+ if( (opcode&0x10000)==0) pBuf += sprintf(pBuf, "F");
pBuf = WritePadding( pBuf, pBuf0 );
pBuf += sprintf(pBuf, "%s,",strpsr);
WriteDataProcessingOperand(pBuf, opcode, (opcode&0x02000000)?1:0, 0, 1);
@@ -503,7 +503,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
}
}
}
- else if( (opcode&0x0c000000)==0x04000000 ) //bits 27-26 == 01
+ else if( (opcode&0x0c000000)==0x04000000 ) //bits 27-26 == 01
{
UINT32 rn = 0;
UINT32 rnv = 0;
@@ -579,7 +579,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
if(rnv) pBuf += sprintf( pBuf, " (%x)",rnv);
}
}
- else if( (opcode&0x0e000000) == 0x08000000 ) //bits 27-25 == 100
+ else if( (opcode&0x0e000000) == 0x08000000 ) //bits 27-25 == 100
{
/* xxxx100P USWLnnnn llllllll llllllll */
/* Block Data Transfer */
@@ -638,7 +638,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
pBuf--;
pBuf += sprintf( pBuf, " }");
}
- else if( (opcode&0x0e000000)==0x0a000000 ) //bits 27-25 == 101
+ else if( (opcode&0x0e000000)==0x0a000000 ) //bits 27-25 == 101
{
/* branch instruction */
/* xxxx101L oooooooo oooooooo oooooooo */
@@ -658,12 +658,12 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
pBuf = WriteBranchAddress( pBuf, pc, opcode );
}
- else if( (opcode&0x0e000000)==0x0c000000 ) //bits 27-25 == 110
+ else if( (opcode&0x0e000000)==0x0c000000 ) //bits 27-25 == 110
{
/* co processor data transfer */
DasmCoProc_DT(pBuf,opcode,(char*)pConditionCode,(char*)pBuf0);
}
- else if( (opcode&0x0f000000)==0x0e000000 ) //bits 27-24 == 1110
+ else if( (opcode&0x0f000000)==0x0e000000 ) //bits 27-24 == 1110
{
/* co processor data operation or register transfer */
@@ -678,7 +678,7 @@ static UINT32 arm7_disasm( char *pBuf, UINT32 pc, UINT32 opcode )
DasmCoProc_DO(pBuf,opcode,pConditionCode,pBuf0);
}
}
- else if( (opcode&0x0f000000) == 0x0f000000 ) //bits 27-24 == 1111
+ else if( (opcode&0x0f000000) == 0x0f000000 ) //bits 27-24 == 1111
{
/* Software Interrupt */
pBuf += sprintf( pBuf, "SWI%s $%x",
@@ -1276,21 +1276,21 @@ static UINT32 thumb_disasm( char *pBuf, UINT32 pc, UINT16 opcode )
}
break;
case 0xe: /* B #offs */
- if( opcode & THUMB_BLOP_LO )
- {
- addr = ( ( opcode & THUMB_BLOP_OFFS ) << 1 ) & 0xfffc;
- pBuf += sprintf( pBuf, "BLX (LO) %08x", addr );
- dasmflags = DASMFLAG_STEP_OVER;
- }
- else
- {
- offs = ( opcode & THUMB_BRANCH_OFFS ) << 1;
- if( offs & 0x00000800 )
- {
- offs |= 0xfffff800;
- }
- pBuf += sprintf( pBuf, "B #%08x (%08x)", offs, pc + 4 + offs);
- }
+ if( opcode & THUMB_BLOP_LO )
+ {
+ addr = ( ( opcode & THUMB_BLOP_OFFS ) << 1 ) & 0xfffc;
+ pBuf += sprintf( pBuf, "BLX (LO) %08x", addr );
+ dasmflags = DASMFLAG_STEP_OVER;
+ }
+ else
+ {
+ offs = ( opcode & THUMB_BRANCH_OFFS ) << 1;
+ if( offs & 0x00000800 )
+ {
+ offs |= 0xfffff800;
+ }
+ pBuf += sprintf( pBuf, "B #%08x (%08x)", offs, pc + 4 + offs);
+ }
break;
case 0xf: /* BL */
if( opcode & THUMB_BLOP_LO )
@@ -1336,4 +1336,3 @@ CPU_DISASSEMBLE( arm7thumb_be )
{
return thumb_disasm(buffer, pc, oprom[1] | (oprom[0] << 8)) | 2;
}
-
diff --git a/src/emu/cpu/arm7/arm7help.h b/src/emu/cpu/arm7/arm7help.h
index cfd1e33cc3f..b54ff628361 100644
--- a/src/emu/cpu/arm7/arm7help.h
+++ b/src/emu/cpu/arm7/arm7help.h
@@ -28,53 +28,53 @@ extern void SwitchMode(arm_state *cpustate, int cpsr_mode_val);
/* Set NZCV flags for ADDS / SUBS */
#define HandleALUAddFlags(rd, rn, op2) \
- if (insn & INSN_S) \
- SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
- | (((!SIGN_BITS_DIFFER(rn, op2)) && SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
- | (((IsNeg(rn) & IsNeg(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsNeg(op2) & IsPos(rd))) ? C_MASK : 0) \
- | HandleALUNZFlags(rd))); \
- R15 += 4;
+ if (insn & INSN_S) \
+ SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
+ | (((!SIGN_BITS_DIFFER(rn, op2)) && SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
+ | (((IsNeg(rn) & IsNeg(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsNeg(op2) & IsPos(rd))) ? C_MASK : 0) \
+ | HandleALUNZFlags(rd))); \
+ R15 += 4;
#define HandleThumbALUAddFlags(rd, rn, op2) \
- SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
- | (((!THUMB_SIGN_BITS_DIFFER(rn, op2)) && THUMB_SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
- | (((~(rn)) < (op2)) << C_BIT) \
- | HandleALUNZFlags(rd))); \
- R15 += 2;
+ SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
+ | (((!THUMB_SIGN_BITS_DIFFER(rn, op2)) && THUMB_SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
+ | (((~(rn)) < (op2)) << C_BIT) \
+ | HandleALUNZFlags(rd))); \
+ R15 += 2;
#define HandleALUSubFlags(rd, rn, op2) \
- if (insn & INSN_S) \
- SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
- | ((SIGN_BITS_DIFFER(rn, op2) && SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
- | (((IsNeg(rn) & IsPos(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsPos(op2) & IsPos(rd))) ? C_MASK : 0) \
- | HandleALUNZFlags(rd))); \
- R15 += 4;
+ if (insn & INSN_S) \
+ SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
+ | ((SIGN_BITS_DIFFER(rn, op2) && SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
+ | (((IsNeg(rn) & IsPos(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsPos(op2) & IsPos(rd))) ? C_MASK : 0) \
+ | HandleALUNZFlags(rd))); \
+ R15 += 4;
#define HandleThumbALUSubFlags(rd, rn, op2) \
- SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
- | ((THUMB_SIGN_BITS_DIFFER(rn, op2) && THUMB_SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
- | (((IsNeg(rn) & IsPos(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsPos(op2) & IsPos(rd))) ? C_MASK : 0) \
- | HandleALUNZFlags(rd))); \
- R15 += 2;
+ SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | V_MASK | C_MASK)) \
+ | ((THUMB_SIGN_BITS_DIFFER(rn, op2) && THUMB_SIGN_BITS_DIFFER(rn, rd)) << V_BIT) \
+ | (((IsNeg(rn) & IsPos(op2)) | (IsNeg(rn) & IsPos(rd)) | (IsPos(op2) & IsPos(rd))) ? C_MASK : 0) \
+ | HandleALUNZFlags(rd))); \
+ R15 += 2;
/* Set NZC flags for logical operations. */
// This macro (which I didn't write) - doesn't make it obvious that the SIGN BIT = 31, just as the N Bit does,
// therefore, N is set by default
#define HandleALUNZFlags(rd) \
- (((rd) & SIGN_BIT) | ((!(rd)) << Z_BIT))
+ (((rd) & SIGN_BIT) | ((!(rd)) << Z_BIT))
// Long ALU Functions use bit 63
#define HandleLongALUNZFlags(rd) \
- ((((rd) & ((UINT64)1 << 63)) >> 32) | ((!(rd)) << Z_BIT))
+ ((((rd) & ((UINT64)1 << 63)) >> 32) | ((!(rd)) << Z_BIT))
#define HandleALULogicalFlags(rd, sc) \
- if (insn & INSN_S) \
- SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | C_MASK)) \
- | HandleALUNZFlags(rd) \
- | (((sc) != 0) << C_BIT))); \
- R15 += 4;
+ if (insn & INSN_S) \
+ SET_CPSR(((GET_CPSR & ~(N_MASK | Z_MASK | C_MASK)) \
+ | HandleALUNZFlags(rd) \
+ | (((sc) != 0) << C_BIT))); \
+ R15 += 4;
void set_cpsr( arm_state *cpustate, UINT32 val);
@@ -105,33 +105,33 @@ extern void (*arm7_coproc_dt_w_callback)(arm_state *cpustate, UINT32 insn, UINT3
***************************************************************************/
INLINE void arm7_cpu_write32(arm_state *cpustate, UINT32 addr, UINT32 data)
{
- if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
- {
- if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_WRITE ))
- {
- return;
- }
- }
-
- addr &= ~3;
+ if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
+ {
+ if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_WRITE ))
+ {
+ return;
+ }
+ }
+
+ addr &= ~3;
if ( cpustate->endian == ENDIANNESS_BIG )
cpustate->program->write_dword(addr, data);
else
- cpustate->program->write_dword(addr, data);
+ cpustate->program->write_dword(addr, data);
}
INLINE void arm7_cpu_write16(arm_state *cpustate, UINT32 addr, UINT16 data)
{
- if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
- {
- if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_WRITE ))
- {
+ if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
+ {
+ if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_WRITE ))
+ {
return;
- }
- }
+ }
+ }
- addr &= ~1;
+ addr &= ~1;
if ( cpustate->endian == ENDIANNESS_BIG )
cpustate->program->write_word(addr, data);
else
@@ -140,13 +140,13 @@ INLINE void arm7_cpu_write16(arm_state *cpustate, UINT32 addr, UINT16 data)
INLINE void arm7_cpu_write8(arm_state *cpustate, UINT32 addr, UINT8 data)
{
- if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
- {
- if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_WRITE ))
+ if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
+ {
+ if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_WRITE ))
{
return;
}
- }
+ }
if ( cpustate->endian == ENDIANNESS_BIG )
cpustate->program->write_byte(addr, data);
@@ -156,71 +156,71 @@ INLINE void arm7_cpu_write8(arm_state *cpustate, UINT32 addr, UINT8 data)
INLINE UINT32 arm7_cpu_read32(arm_state *cpustate, UINT32 addr)
{
- UINT32 result;
-
- if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
- {
- if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_READ ))
- {
- return 0;
- }
- }
-
- if (addr & 3)
- {
+ UINT32 result;
+
+ if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
+ {
+ if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_READ ))
+ {
+ return 0;
+ }
+ }
+
+ if (addr & 3)
+ {
if ( cpustate->endian == ENDIANNESS_BIG )
result = cpustate->program->read_dword(addr & ~3);
else
result = cpustate->program->read_dword(addr & ~3);
- result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3))));
- }
- else
- {
+ result = (result >> (8 * (addr & 3))) | (result << (32 - (8 * (addr & 3))));
+ }
+ else
+ {
if ( cpustate->endian == ENDIANNESS_BIG )
result = cpustate->program->read_dword(addr);
else
result = cpustate->program->read_dword(addr);
- }
+ }
- return result;
+ return result;
}
INLINE UINT16 arm7_cpu_read16(arm_state *cpustate, UINT32 addr)
{
- UINT16 result;
+ UINT16 result;
- if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
- {
- if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_READ ))
- {
- return 0;
- }
- }
+ if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
+ {
+ if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_READ ))
+ {
+ return 0;
+ }
+ }
if ( cpustate->endian == ENDIANNESS_BIG )
result = cpustate->program->read_word(addr & ~1);
else
result = cpustate->program->read_word(addr & ~1);
- if (addr & 1)
- {
- result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
- }
+ if (addr & 1)
+ {
+ result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
+ }
- return result;
+ return result;
}
INLINE UINT8 arm7_cpu_read8(arm_state *cpustate, UINT32 addr)
{
- if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
- {
- if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_READ ))
- {
- return 0;
- }
- }
-
- // Handle through normal 8 bit handler (for 32 bit cpu)
+ if( COPRO_CTRL & COPRO_CTRL_MMU_EN )
+ {
+ if (!arm7_tlb_translate( cpustate, &addr, ARM7_TLB_ABORT_D | ARM7_TLB_READ ))
+ {
+ return 0;
+ }
+ }
+
+ // Handle through normal 8 bit handler (for 32 bit cpu)
if ( cpustate->endian == ENDIANNESS_BIG )
return cpustate->program->read_byte(addr);
else
@@ -239,4 +239,3 @@ INLINE UINT8 arm7_cpu_read8(arm_state *cpustate, UINT32 addr)
#define WRITE32(addr,data) arm7_cpu_write32(cpustate, addr,data)
#define PTR_READ32 &arm7_cpu_read32
#define PTR_WRITE32 &arm7_cpu_write32
-
diff --git a/src/emu/cpu/arm7/arm7ops.c b/src/emu/cpu/arm7/arm7ops.c
index 861eb18a2f1..63c32e4ca80 100644
--- a/src/emu/cpu/arm7/arm7ops.c
+++ b/src/emu/cpu/arm7/arm7ops.c
@@ -5,13 +5,13 @@
INLINE INT64 saturate_qbit_overflow(arm_state *cpustate, INT64 res)
{
- if (res > 2147483647) // INT32_MAX
- { // overflow high? saturate and set Q
+ if (res > 2147483647) // INT32_MAX
+ { // overflow high? saturate and set Q
res = 2147483647;
SET_CPSR(GET_CPSR | Q_MASK);
}
- else if (res < (-2147483647-1)) // INT32_MIN
- { // overflow low? saturate and set Q
+ else if (res < (-2147483647-1)) // INT32_MIN
+ { // overflow low? saturate and set Q
res = (-2147483647-1);
SET_CPSR(GET_CPSR | Q_MASK);
}
@@ -22,8 +22,8 @@ INLINE INT64 saturate_qbit_overflow(arm_state *cpustate, INT64 res)
// I could prob. convert to macro, but Switchmode shouldn't occur that often in emulated code..
void SwitchMode(arm_state *cpustate, int cpsr_mode_val)
{
- UINT32 cspr = GET_CPSR & ~MODE_FLAG;
- SET_CPSR(cspr | cpsr_mode_val);
+ UINT32 cspr = GET_CPSR & ~MODE_FLAG;
+ SET_CPSR(cspr | cpsr_mode_val);
}
@@ -47,231 +47,231 @@ void SwitchMode(arm_state *cpustate, int cpsr_mode_val)
UINT32 decodeShift(arm_state *cpustate, UINT32 insn, UINT32 *pCarry)
{
- UINT32 k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT; // Bits 11-7
- UINT32 rm = GET_REGISTER(cpustate, insn & INSN_OP2_RM);
- UINT32 t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
-
- if ((insn & INSN_OP2_RM) == 0xf) {
- // "If a register is used to specify the shift amount the PC will be 12 bytes ahead." (instead of 8)
- rm += t & 1 ? 12 : 8;
- }
-
- /* All shift types ending in 1 are Rk, not #k */
- if (t & 1)
- {
+ UINT32 k = (insn & INSN_OP2_SHIFT) >> INSN_OP2_SHIFT_SHIFT; // Bits 11-7
+ UINT32 rm = GET_REGISTER(cpustate, insn & INSN_OP2_RM);
+ UINT32 t = (insn & INSN_OP2_SHIFT_TYPE) >> INSN_OP2_SHIFT_TYPE_SHIFT;
+
+ if ((insn & INSN_OP2_RM) == 0xf) {
+ // "If a register is used to specify the shift amount the PC will be 12 bytes ahead." (instead of 8)
+ rm += t & 1 ? 12 : 8;
+ }
+
+ /* All shift types ending in 1 are Rk, not #k */
+ if (t & 1)
+ {
// LOG(("%08x: RegShift %02x %02x\n", R15, k >> 1, GET_REGISTER(cpustate, k >> 1)));
#if ARM7_DEBUG_CORE
- if ((insn & 0x80) == 0x80)
- LOG(("%08x: RegShift ERROR (p36)\n", R15));
+ if ((insn & 0x80) == 0x80)
+ LOG(("%08x: RegShift ERROR (p36)\n", R15));
#endif
- // see p35 for check on this
- //k = GET_REGISTER(cpustate, k >> 1) & 0x1f;
+ // see p35 for check on this
+ //k = GET_REGISTER(cpustate, k >> 1) & 0x1f;
- // Keep only the bottom 8 bits for a Register Shift
- k = GET_REGISTER(cpustate, k >> 1) & 0xff;
+ // Keep only the bottom 8 bits for a Register Shift
+ k = GET_REGISTER(cpustate, k >> 1) & 0xff;
- if (k == 0) /* Register shift by 0 is a no-op */
- {
+ if (k == 0) /* Register shift by 0 is a no-op */
+ {
// LOG(("%08x: NO-OP Regshift\n", R15));
- /* TODO this is wrong for at least ROR by reg with lower
- * 5 bits 0 but lower 8 bits non zero */
- if (pCarry)
- *pCarry = GET_CPSR & C_MASK;
- return rm;
- }
- }
- /* Decode the shift type and perform the shift */
- switch (t >> 1)
- {
- case 0: /* LSL */
- // LSL 32 = Result of 0, Carry = Bit 0 of RM
- // LSL >32 = Result of 0, Carry out 0
- if (k >= 32)
- {
- if (pCarry)
- *pCarry = (k == 32) ? rm & 1 : 0;
- return 0;
- }
- else
- {
- if (pCarry)
- {
- // LSL 0 = Result = RM, Carry = Old Contents of CPSR C Bit
- // LSL (0,31) = Result shifted, least significant bit is in carry out
- *pCarry = k ? (rm & (1 << (32 - k))) : (GET_CPSR & C_MASK);
- }
- return k ? LSL(rm, k) : rm;
- }
- break;
-
- case 1: /* LSR */
- if (k == 0 || k == 32)
- {
- if (pCarry)
- *pCarry = rm & SIGN_BIT;
- return 0;
- }
- else if (k > 32)
- {
- if (pCarry)
- *pCarry = 0;
- return 0;
- }
- else
- {
- if (pCarry)
- *pCarry = (rm & (1 << (k - 1)));
- return LSR(rm, k);
- }
- break;
-
- case 2: /* ASR */
- if (k == 0 || k > 32)
- k = 32;
-
- if (pCarry)
- *pCarry = (rm & (1 << (k - 1)));
- if (k >= 32)
- return rm & SIGN_BIT ? 0xffffffffu : 0;
- else
- {
- if (rm & SIGN_BIT)
- return LSR(rm, k) | (0xffffffffu << (32 - k));
- else
- return LSR(rm, k);
- }
- break;
-
- case 3: /* ROR and RRX */
- if (k)
- {
- while (k > 32)
- k -= 32;
- if (pCarry)
- *pCarry = rm & (1 << (k - 1));
- return ROR(rm, k);
- }
- else
- {
- /* RRX */
- if (pCarry)
- *pCarry = (rm & 1);
- return LSR(rm, 1) | ((GET_CPSR & C_MASK) << 2);
- }
- break;
- }
-
- LOG(("%08x: Decodeshift error\n", R15));
- return 0;
+ /* TODO this is wrong for at least ROR by reg with lower
+ * 5 bits 0 but lower 8 bits non zero */
+ if (pCarry)
+ *pCarry = GET_CPSR & C_MASK;
+ return rm;
+ }
+ }
+ /* Decode the shift type and perform the shift */
+ switch (t >> 1)
+ {
+ case 0: /* LSL */
+ // LSL 32 = Result of 0, Carry = Bit 0 of RM
+ // LSL >32 = Result of 0, Carry out 0
+ if (k >= 32)
+ {
+ if (pCarry)
+ *pCarry = (k == 32) ? rm & 1 : 0;
+ return 0;
+ }
+ else
+ {
+ if (pCarry)
+ {
+ // LSL 0 = Result = RM, Carry = Old Contents of CPSR C Bit
+ // LSL (0,31) = Result shifted, least significant bit is in carry out
+ *pCarry = k ? (rm & (1 << (32 - k))) : (GET_CPSR & C_MASK);
+ }
+ return k ? LSL(rm, k) : rm;
+ }
+ break;
+
+ case 1: /* LSR */
+ if (k == 0 || k == 32)
+ {
+ if (pCarry)
+ *pCarry = rm & SIGN_BIT;
+ return 0;
+ }
+ else if (k > 32)
+ {
+ if (pCarry)
+ *pCarry = 0;
+ return 0;
+ }
+ else
+ {
+ if (pCarry)
+ *pCarry = (rm & (1 << (k - 1)));
+ return LSR(rm, k);
+ }
+ break;
+
+ case 2: /* ASR */
+ if (k == 0 || k > 32)
+ k = 32;
+
+ if (pCarry)
+ *pCarry = (rm & (1 << (k - 1)));
+ if (k >= 32)
+ return rm & SIGN_BIT ? 0xffffffffu : 0;
+ else
+ {
+ if (rm & SIGN_BIT)
+ return LSR(rm, k) | (0xffffffffu << (32 - k));
+ else
+ return LSR(rm, k);
+ }
+ break;
+
+ case 3: /* ROR and RRX */
+ if (k)
+ {
+ while (k > 32)
+ k -= 32;
+ if (pCarry)
+ *pCarry = rm & (1 << (k - 1));
+ return ROR(rm, k);
+ }
+ else
+ {
+ /* RRX */
+ if (pCarry)
+ *pCarry = (rm & 1);
+ return LSR(rm, 1) | ((GET_CPSR & C_MASK) << 2);
+ }
+ break;
+ }
+
+ LOG(("%08x: Decodeshift error\n", R15));
+ return 0;
} /* decodeShift */
static int loadInc(arm_state *cpustate, UINT32 pat, UINT32 rbv, UINT32 s, int mode)
{
- int i, result;
- UINT32 data;
-
- result = 0;
- rbv &= ~3;
- for (i = 0; i < 16; i++)
- {
- if ((pat >> i) & 1)
- {
- if (cpustate->pendingAbtD == 0) // "Overwriting of registers stops when the abort happens."
- {
- data = READ32(rbv += 4);
- if (i == 15) {
- if (s) /* Pull full contents from stack */
- SET_MODE_REGISTER(cpustate, mode, 15, data);
- else /* Pull only address, preserve mode & status flags */
- if (MODE32)
- SET_MODE_REGISTER(cpustate, mode, 15, data);
- else
- {
- SET_MODE_REGISTER(cpustate, mode, 15, (GET_MODE_REGISTER(cpustate, mode, 15) & ~0x03FFFFFC) | (data & 0x03FFFFFC));
- }
- } else
- SET_MODE_REGISTER(cpustate, mode, i, data);
+ int i, result;
+ UINT32 data;
+
+ result = 0;
+ rbv &= ~3;
+ for (i = 0; i < 16; i++)
+ {
+ if ((pat >> i) & 1)
+ {
+ if (cpustate->pendingAbtD == 0) // "Overwriting of registers stops when the abort happens."
+ {
+ data = READ32(rbv += 4);
+ if (i == 15) {
+ if (s) /* Pull full contents from stack */
+ SET_MODE_REGISTER(cpustate, mode, 15, data);
+ else /* Pull only address, preserve mode & status flags */
+ if (MODE32)
+ SET_MODE_REGISTER(cpustate, mode, 15, data);
+ else
+ {
+ SET_MODE_REGISTER(cpustate, mode, 15, (GET_MODE_REGISTER(cpustate, mode, 15) & ~0x03FFFFFC) | (data & 0x03FFFFFC));
+ }
+ } else
+ SET_MODE_REGISTER(cpustate, mode, i, data);
}
- result++;
- }
- }
- return result;
+ result++;
+ }
+ }
+ return result;
}
static int loadDec(arm_state *cpustate, UINT32 pat, UINT32 rbv, UINT32 s, int mode)
{
- int i, result;
- UINT32 data;
-
- result = 0;
- rbv &= ~3;
- for (i = 15; i >= 0; i--)
- {
- if ((pat >> i) & 1)
- {
- if (cpustate->pendingAbtD == 0) // "Overwriting of registers stops when the abort happens."
- {
- data = READ32(rbv -= 4);
- if (i == 15) {
- if (s) /* Pull full contents from stack */
- SET_MODE_REGISTER(cpustate, mode, 15, data);
- else /* Pull only address, preserve mode & status flags */
- if (MODE32)
- SET_MODE_REGISTER(cpustate, mode, 15, data);
- else
- {
- SET_MODE_REGISTER(cpustate, mode, 15, (GET_MODE_REGISTER(cpustate, mode, 15) & ~0x03FFFFFC) | (data & 0x03FFFFFC));
- }
- }
- else
- SET_MODE_REGISTER(cpustate, mode, i, data);
- }
- result++;
- }
- }
- return result;
+ int i, result;
+ UINT32 data;
+
+ result = 0;
+ rbv &= ~3;
+ for (i = 15; i >= 0; i--)
+ {
+ if ((pat >> i) & 1)
+ {
+ if (cpustate->pendingAbtD == 0) // "Overwriting of registers stops when the abort happens."
+ {
+ data = READ32(rbv -= 4);
+ if (i == 15) {
+ if (s) /* Pull full contents from stack */
+ SET_MODE_REGISTER(cpustate, mode, 15, data);
+ else /* Pull only address, preserve mode & status flags */
+ if (MODE32)
+ SET_MODE_REGISTER(cpustate, mode, 15, data);
+ else
+ {
+ SET_MODE_REGISTER(cpustate, mode, 15, (GET_MODE_REGISTER(cpustate, mode, 15) & ~0x03FFFFFC) | (data & 0x03FFFFFC));
+ }
+ }
+ else
+ SET_MODE_REGISTER(cpustate, mode, i, data);
+ }
+ result++;
+ }
+ }
+ return result;
}
static int storeInc(arm_state *cpustate, UINT32 pat, UINT32 rbv, int mode)
{
- int i, result;
+ int i, result;
- result = 0;
- for (i = 0; i < 16; i++)
- {
- if ((pat >> i) & 1)
- {
+ result = 0;
+ for (i = 0; i < 16; i++)
+ {
+ if ((pat >> i) & 1)
+ {
#if ARM7_DEBUG_CORE
- if (i == 15) /* R15 is plus 12 from address of STM */
- LOG(("%08x: StoreInc on R15\n", R15));
+ if (i == 15) /* R15 is plus 12 from address of STM */
+ LOG(("%08x: StoreInc on R15\n", R15));
#endif
- WRITE32(rbv += 4, GET_MODE_REGISTER(cpustate, mode, i));
- result++;
- }
- }
- return result;
+ WRITE32(rbv += 4, GET_MODE_REGISTER(cpustate, mode, i));
+ result++;
+ }
+ }
+ return result;
} /* storeInc */
static int storeDec(arm_state *cpustate, UINT32 pat, UINT32 rbv, int mode)
{
- int i, result;
+ int i, result;
- result = 0;
- for (i = 15; i >= 0; i--)
- {
- if ((pat >> i) & 1)
- {
+ result = 0;
+ for (i = 15; i >= 0; i--)
+ {
+ if ((pat >> i) & 1)
+ {
#if ARM7_DEBUG_CORE
- if (i == 15) /* R15 is plus 12 from address of STM */
- LOG(("%08x: StoreDec on R15\n", R15));
+ if (i == 15) /* R15 is plus 12 from address of STM */
+ LOG(("%08x: StoreDec on R15\n", R15));
#endif
- WRITE32(rbv -= 4, GET_MODE_REGISTER(cpustate, mode, i));
- result++;
- }
- }
- return result;
+ WRITE32(rbv -= 4, GET_MODE_REGISTER(cpustate, mode, i));
+ result++;
+ }
+ }
+ return result;
} /* storeDec */
/***************************************************************************
@@ -281,41 +281,41 @@ static int storeDec(arm_state *cpustate, UINT32 pat, UINT32 rbv, int mode)
// Co-Processor Data Operation
static void HandleCoProcDO(arm_state *cpustate, UINT32 insn)
{
- // This instruction simply instructs the co-processor to do something, no data is returned to ARM7 core
- if (arm7_coproc_do_callback)
- arm7_coproc_do_callback(cpustate->device, *cpustate->program, insn, 0, 0); // simply pass entire opcode to callback - since data format is actually dependent on co-proc implementation
- else
- LOG(("%08x: Co-Processor Data Operation executed, but no callback defined!\n", R15));
+ // This instruction simply instructs the co-processor to do something, no data is returned to ARM7 core
+ if (arm7_coproc_do_callback)
+ arm7_coproc_do_callback(cpustate->device, *cpustate->program, insn, 0, 0); // simply pass entire opcode to callback - since data format is actually dependent on co-proc implementation
+ else
+ LOG(("%08x: Co-Processor Data Operation executed, but no callback defined!\n", R15));
}
// Co-Processor Register Transfer - To/From Arm to Co-Proc
static void HandleCoProcRT(arm_state *cpustate, UINT32 insn)
{
- /* xxxx 1110 oooL nnnn dddd cccc ppp1 mmmm */
-
- // Load (MRC) data from Co-Proc to ARM7 register
- if (insn & 0x00100000) // Bit 20 = Load or Store
- {
- if (arm7_coproc_rt_r_callback)
- {
- UINT32 res = arm7_coproc_rt_r_callback(cpustate->device, *cpustate->program, insn, 0); // RT Read handler must parse opcode & return appropriate result
- if (cpustate->pendingUnd == 0)
- {
- SET_REGISTER(cpustate, (insn >> 12) & 0xf, res);
- }
- }
- else
- LOG(("%08x: Co-Processor Register Transfer executed, but no RT Read callback defined!\n", R15));
- }
- // Store (MCR) data from ARM7 to Co-Proc register
- else
- {
- if (arm7_coproc_rt_w_callback)
- arm7_coproc_rt_w_callback(cpustate->device, *cpustate->program, insn, GET_REGISTER(cpustate, (insn >> 12) & 0xf), 0);
- else
- LOG(("%08x: Co-Processor Register Transfer executed, but no RT Write callback defined!\n", R15));
- }
+ /* xxxx 1110 oooL nnnn dddd cccc ppp1 mmmm */
+
+ // Load (MRC) data from Co-Proc to ARM7 register
+ if (insn & 0x00100000) // Bit 20 = Load or Store
+ {
+ if (arm7_coproc_rt_r_callback)
+ {
+ UINT32 res = arm7_coproc_rt_r_callback(cpustate->device, *cpustate->program, insn, 0); // RT Read handler must parse opcode & return appropriate result
+ if (cpustate->pendingUnd == 0)
+ {
+ SET_REGISTER(cpustate, (insn >> 12) & 0xf, res);
+ }
+ }
+ else
+ LOG(("%08x: Co-Processor Register Transfer executed, but no RT Read callback defined!\n", R15));
+ }
+ // Store (MCR) data from ARM7 to Co-Proc register
+ else
+ {
+ if (arm7_coproc_rt_w_callback)
+ arm7_coproc_rt_w_callback(cpustate->device, *cpustate->program, insn, GET_REGISTER(cpustate, (insn >> 12) & 0xf), 0);
+ else
+ LOG(("%08x: Co-Processor Register Transfer executed, but no RT Write callback defined!\n", R15));
+ }
}
/* Data Transfer - To/From Arm to Co-Proc
@@ -332,208 +332,208 @@ static void HandleCoProcRT(arm_state *cpustate, UINT32 insn)
// todo: test with valid instructions
static void HandleCoProcDT(arm_state *cpustate, UINT32 insn)
{
- UINT32 rn = (insn >> 16) & 0xf;
- UINT32 rnv = GET_REGISTER(cpustate, rn); // Get Address Value stored from Rn
- UINT32 ornv = rnv; // Keep value of Rn
- UINT32 off = (insn & 0xff) << 2; // Offset is << 2 according to manual
- UINT32 *prn = &ARM7REG(rn); // Pointer to our register, so it can be changed in the callback
-
- // Pointers to read32/write32 functions
- void (*write32)(arm_state *cpustate, UINT32 addr, UINT32 data);
- UINT32 (*read32)(arm_state *cpustate, UINT32 addr);
- write32 = PTR_WRITE32;
- read32 = PTR_READ32;
+ UINT32 rn = (insn >> 16) & 0xf;
+ UINT32 rnv = GET_REGISTER(cpustate, rn); // Get Address Value stored from Rn
+ UINT32 ornv = rnv; // Keep value of Rn
+ UINT32 off = (insn & 0xff) << 2; // Offset is << 2 according to manual
+ UINT32 *prn = &ARM7REG(rn); // Pointer to our register, so it can be changed in the callback
+
+ // Pointers to read32/write32 functions
+ void (*write32)(arm_state *cpustate, UINT32 addr, UINT32 data);
+ UINT32 (*read32)(arm_state *cpustate, UINT32 addr);
+ write32 = PTR_WRITE32;
+ read32 = PTR_READ32;
#if ARM7_DEBUG_CORE
- if (((insn >> 16) & 0xf) == 15 && (insn & 0x200000))
- LOG(("%08x: Illegal use of R15 as base for write back value!\n", R15));
+ if (((insn >> 16) & 0xf) == 15 && (insn & 0x200000))
+ LOG(("%08x: Illegal use of R15 as base for write back value!\n", R15));
#endif
- // Pre-Increment base address (IF POST INCREMENT - CALL BACK FUNCTION MUST DO IT)
- if ((insn & 0x1000000) && off)
- {
- // Up - Down bit
- if (insn & 0x800000)
- rnv += off;
- else
- rnv -= off;
- }
-
- // Load (LDC) data from ARM7 memory to Co-Proc memory
- if (insn & 0x00100000)
- {
- if (arm7_coproc_dt_r_callback)
- arm7_coproc_dt_r_callback(cpustate, insn, prn, read32);
- else
- LOG(("%08x: Co-Processer Data Transfer executed, but no READ callback defined!\n", R15));
- }
- // Store (STC) data from Co-Proc to ARM7 memory
- else
- {
- if (arm7_coproc_dt_w_callback)
- arm7_coproc_dt_w_callback(cpustate, insn, prn, write32);
- else
- LOG(("%08x: Co-Processer Data Transfer executed, but no WRITE callback defined!\n", R15));
- }
+ // Pre-Increment base address (IF POST INCREMENT - CALL BACK FUNCTION MUST DO IT)
+ if ((insn & 0x1000000) && off)
+ {
+ // Up - Down bit
+ if (insn & 0x800000)
+ rnv += off;
+ else
+ rnv -= off;
+ }
+
+ // Load (LDC) data from ARM7 memory to Co-Proc memory
+ if (insn & 0x00100000)
+ {
+ if (arm7_coproc_dt_r_callback)
+ arm7_coproc_dt_r_callback(cpustate, insn, prn, read32);
+ else
+ LOG(("%08x: Co-Processer Data Transfer executed, but no READ callback defined!\n", R15));
+ }
+ // Store (STC) data from Co-Proc to ARM7 memory
+ else
+ {
+ if (arm7_coproc_dt_w_callback)
+ arm7_coproc_dt_w_callback(cpustate, insn, prn, write32);
+ else
+ LOG(("%08x: Co-Processer Data Transfer executed, but no WRITE callback defined!\n", R15));
+ }
if (cpustate->pendingUnd != 0) return;
- // If writeback not used - ensure the original value of RN is restored in case co-proc callback changed value
- if ((insn & 0x200000) == 0)
- SET_REGISTER(cpustate, rn, ornv);
+ // If writeback not used - ensure the original value of RN is restored in case co-proc callback changed value
+ if ((insn & 0x200000) == 0)
+ SET_REGISTER(cpustate, rn, ornv);
}
INLINE void HandleBranch(arm_state *cpustate, UINT32 insn)
{
- UINT32 off = (insn & INSN_BRANCH) << 2;
-
- /* Save PC into LR if this is a branch with link */
- if (insn & INSN_BL)
- {
- SET_REGISTER(cpustate, 14, R15 + 4);
- }
-
- /* Sign-extend the 24-bit offset in our calculations */
- if (off & 0x2000000u)
- {
- if (MODE32)
- R15 -= ((~(off | 0xfc000000u)) + 1) - 8;
- else
- R15 = ((R15 - (((~(off | 0xfc000000u)) + 1) - 8)) & 0x03FFFFFC) | (R15 & ~0x03FFFFFC);
- }
- else
- {
- if (MODE32)
- R15 += off + 8;
- else
- R15 = ((R15 + (off + 8)) & 0x03FFFFFC) | (R15 & ~0x03FFFFFC);
- }
+ UINT32 off = (insn & INSN_BRANCH) << 2;
+
+ /* Save PC into LR if this is a branch with link */
+ if (insn & INSN_BL)
+ {
+ SET_REGISTER(cpustate, 14, R15 + 4);
+ }
+
+ /* Sign-extend the 24-bit offset in our calculations */
+ if (off & 0x2000000u)
+ {
+ if (MODE32)
+ R15 -= ((~(off | 0xfc000000u)) + 1) - 8;
+ else
+ R15 = ((R15 - (((~(off | 0xfc000000u)) + 1) - 8)) & 0x03FFFFFC) | (R15 & ~0x03FFFFFC);
+ }
+ else
+ {
+ if (MODE32)
+ R15 += off + 8;
+ else
+ R15 = ((R15 + (off + 8)) & 0x03FFFFFC) | (R15 & ~0x03FFFFFC);
+ }
}
static void HandleMemSingle(arm_state *cpustate, UINT32 insn)
{
- UINT32 rn, rnv, off, rd, rnv_old = 0;
-
- /* Fetch the offset */
- if (insn & INSN_I)
- {
- /* Register Shift */
- off = decodeShift(cpustate, insn, NULL);
- }
- else
- {
- /* Immediate Value */
- off = insn & INSN_SDT_IMM;
- }
-
- /* Calculate Rn, accounting for PC */
- rn = (insn & INSN_RN) >> INSN_RN_SHIFT;
-
- if (insn & INSN_SDT_P)
- {
- /* Pre-indexed addressing */
- if (insn & INSN_SDT_U)
- {
- if ((MODE32) || (rn != eR15))
- rnv = (GET_REGISTER(cpustate, rn) + off);
- else
- rnv = (GET_PC + off);
- }
- else
- {
- if ((MODE32) || (rn != eR15))
- rnv = (GET_REGISTER(cpustate, rn) - off);
+ UINT32 rn, rnv, off, rd, rnv_old = 0;
+
+ /* Fetch the offset */
+ if (insn & INSN_I)
+ {
+ /* Register Shift */
+ off = decodeShift(cpustate, insn, NULL);
+ }
+ else
+ {
+ /* Immediate Value */
+ off = insn & INSN_SDT_IMM;
+ }
+
+ /* Calculate Rn, accounting for PC */
+ rn = (insn & INSN_RN) >> INSN_RN_SHIFT;
+
+ if (insn & INSN_SDT_P)
+ {
+ /* Pre-indexed addressing */
+ if (insn & INSN_SDT_U)
+ {
+ if ((MODE32) || (rn != eR15))
+ rnv = (GET_REGISTER(cpustate, rn) + off);
else
- rnv = (GET_PC - off);
- }
-
- if (insn & INSN_SDT_W)
- {
- rnv_old = GET_REGISTER(cpustate, rn);
- SET_REGISTER(cpustate, rn, rnv);
-
- // check writeback???
- }
- else if (rn == eR15)
- {
- rnv = rnv + 8;
- }
- }
- else
- {
- /* Post-indexed addressing */
- if (rn == eR15)
- {
- if (MODE32)
- rnv = R15 + 8;
- else
- rnv = GET_PC + 8;
- }
- else
- {
- rnv = GET_REGISTER(cpustate, rn);
- }
- }
-
- /* Do the transfer */
- rd = (insn & INSN_RD) >> INSN_RD_SHIFT;
- if (insn & INSN_SDT_L)
- {
- /* Load */
- if (insn & INSN_SDT_B)
- {
- UINT32 data = READ8(rnv);
- if (cpustate->pendingAbtD == 0)
- {
- SET_REGISTER(cpustate, rd, data);
- }
- }
- else
- {
- UINT32 data = READ32(rnv);
- if (cpustate->pendingAbtD == 0)
- {
- if (rd == eR15)
- {
- if (MODE32)
- R15 = data - 4;
- else
- R15 = (R15 & ~0x03FFFFFC) /* N Z C V I F M1 M0 */ | ((data - 4) & 0x03FFFFFC);
- // LDR, PC takes 2S + 2N + 1I (5 total cycles)
- ARM7_ICOUNT -= 2;
- }
- else
- {
- SET_REGISTER(cpustate, rd, data);
- }
- }
- }
- }
- else
- {
- /* Store */
- if (insn & INSN_SDT_B)
- {
+ rnv = (GET_PC + off);
+ }
+ else
+ {
+ if ((MODE32) || (rn != eR15))
+ rnv = (GET_REGISTER(cpustate, rn) - off);
+ else
+ rnv = (GET_PC - off);
+ }
+
+ if (insn & INSN_SDT_W)
+ {
+ rnv_old = GET_REGISTER(cpustate, rn);
+ SET_REGISTER(cpustate, rn, rnv);
+
+ // check writeback???
+ }
+ else if (rn == eR15)
+ {
+ rnv = rnv + 8;
+ }
+ }
+ else
+ {
+ /* Post-indexed addressing */
+ if (rn == eR15)
+ {
+ if (MODE32)
+ rnv = R15 + 8;
+ else
+ rnv = GET_PC + 8;
+ }
+ else
+ {
+ rnv = GET_REGISTER(cpustate, rn);
+ }
+ }
+
+ /* Do the transfer */
+ rd = (insn & INSN_RD) >> INSN_RD_SHIFT;
+ if (insn & INSN_SDT_L)
+ {
+ /* Load */
+ if (insn & INSN_SDT_B)
+ {
+ UINT32 data = READ8(rnv);
+ if (cpustate->pendingAbtD == 0)
+ {
+ SET_REGISTER(cpustate, rd, data);
+ }
+ }
+ else
+ {
+ UINT32 data = READ32(rnv);
+ if (cpustate->pendingAbtD == 0)
+ {
+ if (rd == eR15)
+ {
+ if (MODE32)
+ R15 = data - 4;
+ else
+ R15 = (R15 & ~0x03FFFFFC) /* N Z C V I F M1 M0 */ | ((data - 4) & 0x03FFFFFC);
+ // LDR, PC takes 2S + 2N + 1I (5 total cycles)
+ ARM7_ICOUNT -= 2;
+ }
+ else
+ {
+ SET_REGISTER(cpustate, rd, data);
+ }
+ }
+ }
+ }
+ else
+ {
+ /* Store */
+ if (insn & INSN_SDT_B)
+ {
#if ARM7_DEBUG_CORE
- if (rd == eR15)
- LOG(("Wrote R15 in byte mode\n"));
+ if (rd == eR15)
+ LOG(("Wrote R15 in byte mode\n"));
#endif
- WRITE8(rnv, (UINT8) GET_REGISTER(cpustate, rd) & 0xffu);
- }
- else
- {
+ WRITE8(rnv, (UINT8) GET_REGISTER(cpustate, rd) & 0xffu);
+ }
+ else
+ {
#if ARM7_DEBUG_CORE
- if (rd == eR15)
- LOG(("Wrote R15 in 32bit mode\n"));
+ if (rd == eR15)
+ LOG(("Wrote R15 in 32bit mode\n"));
#endif
- //WRITE32(rnv, rd == eR15 ? R15 + 8 : GET_REGISTER(cpustate, rd));
- WRITE32(rnv, rd == eR15 ? R15 + 8 + 4 : GET_REGISTER(cpustate, rd)); // manual says STR rd = PC, +12
- }
- // Store takes only 2 N Cycles, so add + 1
- ARM7_ICOUNT += 1;
- }
+ //WRITE32(rnv, rd == eR15 ? R15 + 8 : GET_REGISTER(cpustate, rd));
+ WRITE32(rnv, rd == eR15 ? R15 + 8 + 4 : GET_REGISTER(cpustate, rd)); // manual says STR rd = PC, +12
+ }
+ // Store takes only 2 N Cycles, so add + 1
+ ARM7_ICOUNT += 1;
+ }
if (cpustate->pendingAbtD != 0)
{
@@ -545,40 +545,40 @@ static void HandleMemSingle(arm_state *cpustate, UINT32 insn)
else
{
- /* Do post-indexing writeback */
- if (!(insn & INSN_SDT_P)/* && (insn & INSN_SDT_W)*/)
- {
- if (insn & INSN_SDT_U)
- {
- /* Writeback is applied in pipeline, before value is read from mem,
- so writeback is effectively ignored */
- if (rd == rn) {
- SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
- // todo: check for offs... ?
- }
- else {
-
- if ((insn & INSN_SDT_W) != 0)
- LOG(("%08x: RegisterWritebackIncrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
-
- SET_REGISTER(cpustate, rn, (rnv + off));
- }
- }
- else
- {
- /* Writeback is applied in pipeline, before value is read from mem,
- so writeback is effectively ignored */
- if (rd == rn) {
- SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
- }
- else {
- SET_REGISTER(cpustate, rn, (rnv - off));
-
- if ((insn & INSN_SDT_W) != 0)
- LOG(("%08x: RegisterWritebackDecrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
- }
- }
- }
+ /* Do post-indexing writeback */
+ if (!(insn & INSN_SDT_P)/* && (insn & INSN_SDT_W)*/)
+ {
+ if (insn & INSN_SDT_U)
+ {
+ /* Writeback is applied in pipeline, before value is read from mem,
+ so writeback is effectively ignored */
+ if (rd == rn) {
+ SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
+ // todo: check for offs... ?
+ }
+ else {
+
+ if ((insn & INSN_SDT_W) != 0)
+ LOG(("%08x: RegisterWritebackIncrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
+
+ SET_REGISTER(cpustate, rn, (rnv + off));
+ }
+ }
+ else
+ {
+ /* Writeback is applied in pipeline, before value is read from mem,
+ so writeback is effectively ignored */
+ if (rd == rn) {
+ SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
+ }
+ else {
+ SET_REGISTER(cpustate, rn, (rnv - off));
+
+ if ((insn & INSN_SDT_W) != 0)
+ LOG(("%08x: RegisterWritebackDecrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
+ }
+ }
+ }
}
@@ -588,169 +588,169 @@ static void HandleMemSingle(arm_state *cpustate, UINT32 insn)
static void HandleHalfWordDT(arm_state *cpustate, UINT32 insn)
{
- UINT32 rn, rnv, off, rd, rnv_old = 0;
-
- // Immediate or Register Offset?
- if (insn & 0x400000) { // Bit 22 - 1 = immediate, 0 = register
- // imm. value in high nibble (bits 8-11) and lo nibble (bit 0-3)
- off = (((insn >> 8) & 0x0f) << 4) | (insn & 0x0f);
- }
- else {
- // register
- off = GET_REGISTER(cpustate, insn & 0x0f);
- }
-
- /* Calculate Rn, accounting for PC */
- rn = (insn & INSN_RN) >> INSN_RN_SHIFT;
-
- if (insn & INSN_SDT_P)
- {
- /* Pre-indexed addressing */
- if (insn & INSN_SDT_U)
- {
- rnv = (GET_REGISTER(cpustate, rn) + off);
- }
- else
- {
- rnv = (GET_REGISTER(cpustate, rn) - off);
- }
-
- if (insn & INSN_SDT_W)
- {
- rnv_old = GET_REGISTER(cpustate, rn);
- SET_REGISTER(cpustate, rn, rnv);
-
- // check writeback???
- }
- else if (rn == eR15)
- {
- rnv = (rnv) + 8;
- }
- }
- else
- {
- /* Post-indexed addressing */
- if (rn == eR15)
- {
- rnv = R15 + 8;
- }
- else
- {
- rnv = GET_REGISTER(cpustate, rn);
- }
- }
-
- /* Do the transfer */
- rd = (insn & INSN_RD) >> INSN_RD_SHIFT;
-
- /* Load */
- if (insn & INSN_SDT_L)
- {
- // Signed?
- if (insn & 0x40)
- {
- UINT32 newval = 0;
-
- // Signed Half Word?
- if (insn & 0x20) {
- UINT16 signbyte, databyte;
- databyte = READ16(rnv) & 0xFFFF;
- signbyte = (databyte & 0x8000) ? 0xffff : 0;
- newval = (UINT32)(signbyte << 16)|databyte;
- }
- // Signed Byte
- else {
- UINT8 databyte;
- UINT32 signbyte;
- databyte = READ8(rnv) & 0xff;
- signbyte = (databyte & 0x80) ? 0xffffff : 0;
- newval = (UINT32)(signbyte << 8)|databyte;
- }
+ UINT32 rn, rnv, off, rd, rnv_old = 0;
+
+ // Immediate or Register Offset?
+ if (insn & 0x400000) { // Bit 22 - 1 = immediate, 0 = register
+ // imm. value in high nibble (bits 8-11) and lo nibble (bit 0-3)
+ off = (((insn >> 8) & 0x0f) << 4) | (insn & 0x0f);
+ }
+ else {
+ // register
+ off = GET_REGISTER(cpustate, insn & 0x0f);
+ }
+
+ /* Calculate Rn, accounting for PC */
+ rn = (insn & INSN_RN) >> INSN_RN_SHIFT;
+
+ if (insn & INSN_SDT_P)
+ {
+ /* Pre-indexed addressing */
+ if (insn & INSN_SDT_U)
+ {
+ rnv = (GET_REGISTER(cpustate, rn) + off);
+ }
+ else
+ {
+ rnv = (GET_REGISTER(cpustate, rn) - off);
+ }
+
+ if (insn & INSN_SDT_W)
+ {
+ rnv_old = GET_REGISTER(cpustate, rn);
+ SET_REGISTER(cpustate, rn, rnv);
+
+ // check writeback???
+ }
+ else if (rn == eR15)
+ {
+ rnv = (rnv) + 8;
+ }
+ }
+ else
+ {
+ /* Post-indexed addressing */
+ if (rn == eR15)
+ {
+ rnv = R15 + 8;
+ }
+ else
+ {
+ rnv = GET_REGISTER(cpustate, rn);
+ }
+ }
+
+ /* Do the transfer */
+ rd = (insn & INSN_RD) >> INSN_RD_SHIFT;
+
+ /* Load */
+ if (insn & INSN_SDT_L)
+ {
+ // Signed?
+ if (insn & 0x40)
+ {
+ UINT32 newval = 0;
+
+ // Signed Half Word?
+ if (insn & 0x20) {
+ UINT16 signbyte, databyte;
+ databyte = READ16(rnv) & 0xFFFF;
+ signbyte = (databyte & 0x8000) ? 0xffff : 0;
+ newval = (UINT32)(signbyte << 16)|databyte;
+ }
+ // Signed Byte
+ else {
+ UINT8 databyte;
+ UINT32 signbyte;
+ databyte = READ8(rnv) & 0xff;
+ signbyte = (databyte & 0x80) ? 0xffffff : 0;
+ newval = (UINT32)(signbyte << 8)|databyte;
+ }
if (cpustate->pendingAbtD == 0)
{
- // PC?
- if (rd == eR15)
- {
- R15 = newval + 8;
- // LDR(H,SH,SB) PC takes 2S + 2N + 1I (5 total cycles)
- ARM7_ICOUNT -= 2;
-
- }
- else
- {
- SET_REGISTER(cpustate, rd, newval);
- R15 += 4;
- }
-
- }
- else
- {
- R15 += 4;
- }
-
- }
- // Unsigned Half Word
- else
- {
+ // PC?
+ if (rd == eR15)
+ {
+ R15 = newval + 8;
+ // LDR(H,SH,SB) PC takes 2S + 2N + 1I (5 total cycles)
+ ARM7_ICOUNT -= 2;
+
+ }
+ else
+ {
+ SET_REGISTER(cpustate, rd, newval);
+ R15 += 4;
+ }
+
+ }
+ else
+ {
+ R15 += 4;
+ }
+
+ }
+ // Unsigned Half Word
+ else
+ {
UINT32 newval = READ16(rnv);
if (cpustate->pendingAbtD == 0)
{
- if (rd == eR15)
- {
- R15 = newval + 8;
- // extra cycles for LDR(H,SH,SB) PC (5 total cycles)
- ARM7_ICOUNT -= 2;
- }
- else
- {
- SET_REGISTER(cpustate, rd, newval);
- R15 += 4;
- }
-
- }
- else
- {
- R15 += 4;
- }
-
- }
-
-
- }
- /* Store or ARMv5+ dword insns */
- else
- {
- if ((insn & 0x60) == 0x40) // LDRD
+ if (rd == eR15)
+ {
+ R15 = newval + 8;
+ // extra cycles for LDR(H,SH,SB) PC (5 total cycles)
+ ARM7_ICOUNT -= 2;
+ }
+ else
+ {
+ SET_REGISTER(cpustate, rd, newval);
+ R15 += 4;
+ }
+
+ }
+ else
+ {
+ R15 += 4;
+ }
+
+ }
+
+
+ }
+ /* Store or ARMv5+ dword insns */
+ else
+ {
+ if ((insn & 0x60) == 0x40) // LDRD
{
SET_REGISTER(cpustate, rd, READ32(rnv));
SET_REGISTER(cpustate, rd+1, READ32(rnv+4));
- R15 += 4;
+ R15 += 4;
}
- else if ((insn & 0x60) == 0x60) // STRD
+ else if ((insn & 0x60) == 0x60) // STRD
{
WRITE32(rnv, GET_REGISTER(cpustate, rd));
WRITE32(rnv+4, GET_REGISTER(cpustate, rd+1));
- R15 += 4;
+ R15 += 4;
}
else
{
- // WRITE16(rnv, rd == eR15 ? R15 + 8 : GET_REGISTER(cpustate, rd));
- WRITE16(rnv, rd == eR15 ? R15 + 8 + 4 : GET_REGISTER(cpustate, rd)); // manual says STR RD=PC, +12 of address
+ // WRITE16(rnv, rd == eR15 ? R15 + 8 : GET_REGISTER(cpustate, rd));
+ WRITE16(rnv, rd == eR15 ? R15 + 8 + 4 : GET_REGISTER(cpustate, rd)); // manual says STR RD=PC, +12 of address
// if R15 is not increased then e.g. "STRH R10, [R15,#$10]" will be executed over and over again
#if 0
- if (rn != eR15)
+ if (rn != eR15)
#endif
- R15 += 4;
+ R15 += 4;
- // STRH takes 2 cycles, so we add + 1
- ARM7_ICOUNT += 1;
+ // STRH takes 2 cycles, so we add + 1
+ ARM7_ICOUNT += 1;
+ }
}
- }
if (cpustate->pendingAbtD != 0)
{
@@ -762,329 +762,329 @@ static void HandleHalfWordDT(arm_state *cpustate, UINT32 insn)
else
{
- // SJE: No idea if this writeback code works or makes sense here..
-
- /* Do post-indexing writeback */
- if (!(insn & INSN_SDT_P)/* && (insn & INSN_SDT_W)*/)
- {
- if (insn & INSN_SDT_U)
- {
- /* Writeback is applied in pipeline, before value is read from mem,
- so writeback is effectively ignored */
- if (rd == rn) {
- SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
- // todo: check for offs... ?
- }
- else {
-
- if ((insn & INSN_SDT_W) != 0)
- LOG(("%08x: RegisterWritebackIncrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
-
- SET_REGISTER(cpustate, rn, (rnv + off));
- }
- }
- else
- {
- /* Writeback is applied in pipeline, before value is read from mem,
- so writeback is effectively ignored */
- if (rd == rn) {
- SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
- }
- else {
- SET_REGISTER(cpustate, rn, (rnv - off));
-
- if ((insn & INSN_SDT_W) != 0)
- LOG(("%08x: RegisterWritebackDecrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
- }
- }
- }
-
- }
+ // SJE: No idea if this writeback code works or makes sense here..
+
+ /* Do post-indexing writeback */
+ if (!(insn & INSN_SDT_P)/* && (insn & INSN_SDT_W)*/)
+ {
+ if (insn & INSN_SDT_U)
+ {
+ /* Writeback is applied in pipeline, before value is read from mem,
+ so writeback is effectively ignored */
+ if (rd == rn) {
+ SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
+ // todo: check for offs... ?
+ }
+ else {
+
+ if ((insn & INSN_SDT_W) != 0)
+ LOG(("%08x: RegisterWritebackIncrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
+
+ SET_REGISTER(cpustate, rn, (rnv + off));
+ }
+ }
+ else
+ {
+ /* Writeback is applied in pipeline, before value is read from mem,
+ so writeback is effectively ignored */
+ if (rd == rn) {
+ SET_REGISTER(cpustate, rn, GET_REGISTER(cpustate, rd));
+ }
+ else {
+ SET_REGISTER(cpustate, rn, (rnv - off));
+
+ if ((insn & INSN_SDT_W) != 0)
+ LOG(("%08x: RegisterWritebackDecrement %d %d %d\n", R15, (insn & INSN_SDT_P) != 0, (insn & INSN_SDT_W) != 0, (insn & INSN_SDT_U) != 0));
+ }
+ }
+ }
+
+ }
}
static void HandleSwap(arm_state *cpustate, UINT32 insn)
{
- UINT32 rn, rm, rd, tmp;
+ UINT32 rn, rm, rd, tmp;
- rn = GET_REGISTER(cpustate, (insn >> 16) & 0xf); // reg. w/read address
- rm = GET_REGISTER(cpustate, insn & 0xf); // reg. w/write address
- rd = (insn >> 12) & 0xf; // dest reg
+ rn = GET_REGISTER(cpustate, (insn >> 16) & 0xf); // reg. w/read address
+ rm = GET_REGISTER(cpustate, insn & 0xf); // reg. w/write address
+ rd = (insn >> 12) & 0xf; // dest reg
#if ARM7_DEBUG_CORE
- if (rn == 15 || rm == 15 || rd == 15)
- LOG(("%08x: Illegal use of R15 in Swap Instruction\n", R15));
+ if (rn == 15 || rm == 15 || rd == 15)
+ LOG(("%08x: Illegal use of R15 in Swap Instruction\n", R15));
#endif
- // can be byte or word
- if (insn & 0x400000)
- {
- tmp = READ8(rn);
- WRITE8(rn, rm);
- SET_REGISTER(cpustate, rd, tmp);
- }
- else
- {
- tmp = READ32(rn);
- WRITE32(rn, rm);
- SET_REGISTER(cpustate, rd, tmp);
- }
-
- R15 += 4;
- // Instruction takes 1S+2N+1I cycles - so we subtract one more..
- ARM7_ICOUNT -= 1;
+ // can be byte or word
+ if (insn & 0x400000)
+ {
+ tmp = READ8(rn);
+ WRITE8(rn, rm);
+ SET_REGISTER(cpustate, rd, tmp);
+ }
+ else
+ {
+ tmp = READ32(rn);
+ WRITE32(rn, rm);
+ SET_REGISTER(cpustate, rd, tmp);
+ }
+
+ R15 += 4;
+ // Instruction takes 1S+2N+1I cycles - so we subtract one more..
+ ARM7_ICOUNT -= 1;
}
static void HandlePSRTransfer(arm_state *cpustate, UINT32 insn)
{
- int reg = (insn & 0x400000) ? SPSR : eCPSR; // Either CPSR or SPSR
- UINT32 newval, val = 0;
- int oldmode = GET_CPSR & MODE_FLAG;
-
- // get old value of CPSR/SPSR
- newval = GET_REGISTER(cpustate, reg);
-
- // MSR (bit 21 set) - Copy value to CPSR/SPSR
- if ((insn & 0x00200000))
- {
- // Immediate Value?
- if (insn & INSN_I) {
- // Value can be specified for a Right Rotate, 2x the value specified.
- int by = (insn & INSN_OP2_ROTATE) >> INSN_OP2_ROTATE_SHIFT;
- if (by)
- val = ROR(insn & INSN_OP2_IMM, by << 1);
- else
- val = insn & INSN_OP2_IMM;
- }
- // Value from Register
- else
- {
- val = GET_REGISTER(cpustate, insn & 0x0f);
- }
-
- // apply field code bits
- if (reg == eCPSR)
- {
- if (oldmode != eARM7_MODE_USER)
- {
- if (insn & 0x00010000)
- {
- newval = (newval & 0xffffff00) | (val & 0x000000ff);
- }
- if (insn & 0x00020000)
- {
- newval = (newval & 0xffff00ff) | (val & 0x0000ff00);
- }
- if (insn & 0x00040000)
- {
- newval = (newval & 0xff00ffff) | (val & 0x00ff0000);
- }
- }
-
- // status flags can be modified regardless of mode
- if (insn & 0x00080000)
- {
- // TODO for non ARMv5E mask should be 0xf0000000 (ie mask Q bit)
- newval = (newval & 0x00ffffff) | (val & 0xf8000000);
- }
- }
- else // SPSR has stricter requirements
- {
- if (((GET_CPSR & 0x1f) > 0x10) && ((GET_CPSR & 0x1f) < 0x1f))
- {
- if (insn & 0x00010000)
- {
- newval = (newval & 0xffffff00) | (val & 0xff);
- }
- if (insn & 0x00020000)
- {
- newval = (newval & 0xffff00ff) | (val & 0xff00);
- }
- if (insn & 0x00040000)
- {
- newval = (newval & 0xff00ffff) | (val & 0xff0000);
- }
- if (insn & 0x00080000)
- {
- // TODO for non ARMv5E mask should be 0xf0000000 (ie mask Q bit)
- newval = (newval & 0x00ffffff) | (val & 0xf8000000);
- }
- }
- }
+ int reg = (insn & 0x400000) ? SPSR : eCPSR; // Either CPSR or SPSR
+ UINT32 newval, val = 0;
+ int oldmode = GET_CPSR & MODE_FLAG;
+
+ // get old value of CPSR/SPSR
+ newval = GET_REGISTER(cpustate, reg);
+
+ // MSR (bit 21 set) - Copy value to CPSR/SPSR
+ if ((insn & 0x00200000))
+ {
+ // Immediate Value?
+ if (insn & INSN_I) {
+ // Value can be specified for a Right Rotate, 2x the value specified.
+ int by = (insn & INSN_OP2_ROTATE) >> INSN_OP2_ROTATE_SHIFT;
+ if (by)
+ val = ROR(insn & INSN_OP2_IMM, by << 1);
+ else
+ val = insn & INSN_OP2_IMM;
+ }
+ // Value from Register
+ else
+ {
+ val = GET_REGISTER(cpustate, insn & 0x0f);
+ }
+
+ // apply field code bits
+ if (reg == eCPSR)
+ {
+ if (oldmode != eARM7_MODE_USER)
+ {
+ if (insn & 0x00010000)
+ {
+ newval = (newval & 0xffffff00) | (val & 0x000000ff);
+ }
+ if (insn & 0x00020000)
+ {
+ newval = (newval & 0xffff00ff) | (val & 0x0000ff00);
+ }
+ if (insn & 0x00040000)
+ {
+ newval = (newval & 0xff00ffff) | (val & 0x00ff0000);
+ }
+ }
+
+ // status flags can be modified regardless of mode
+ if (insn & 0x00080000)
+ {
+ // TODO for non ARMv5E mask should be 0xf0000000 (ie mask Q bit)
+ newval = (newval & 0x00ffffff) | (val & 0xf8000000);
+ }
+ }
+ else // SPSR has stricter requirements
+ {
+ if (((GET_CPSR & 0x1f) > 0x10) && ((GET_CPSR & 0x1f) < 0x1f))
+ {
+ if (insn & 0x00010000)
+ {
+ newval = (newval & 0xffffff00) | (val & 0xff);
+ }
+ if (insn & 0x00020000)
+ {
+ newval = (newval & 0xffff00ff) | (val & 0xff00);
+ }
+ if (insn & 0x00040000)
+ {
+ newval = (newval & 0xff00ffff) | (val & 0xff0000);
+ }
+ if (insn & 0x00080000)
+ {
+ // TODO for non ARMv5E mask should be 0xf0000000 (ie mask Q bit)
+ newval = (newval & 0x00ffffff) | (val & 0xf8000000);
+ }
+ }
+ }
#if 0
- // force valid mode
- newval |= 0x10;
+ // force valid mode
+ newval |= 0x10;
#endif
- // Update the Register
- if (reg == eCPSR)
- SET_CPSR(newval);
- else
- SET_REGISTER(cpustate, reg, newval);
-
- // Switch to new mode if changed
- if ((newval & MODE_FLAG) != oldmode)
- SwitchMode(cpustate, GET_MODE);
-
- }
- // MRS (bit 21 clear) - Copy CPSR or SPSR to specified Register
- else
- {
- SET_REGISTER(cpustate, (insn >> 12)& 0x0f, GET_REGISTER(cpustate, reg));
- }
+ // Update the Register
+ if (reg == eCPSR)
+ SET_CPSR(newval);
+ else
+ SET_REGISTER(cpustate, reg, newval);
+
+ // Switch to new mode if changed
+ if ((newval & MODE_FLAG) != oldmode)
+ SwitchMode(cpustate, GET_MODE);
+
+ }
+ // MRS (bit 21 clear) - Copy CPSR or SPSR to specified Register
+ else
+ {
+ SET_REGISTER(cpustate, (insn >> 12)& 0x0f, GET_REGISTER(cpustate, reg));
+ }
}
static void HandleALU(arm_state *cpustate, UINT32 insn)
{
- UINT32 op2, sc = 0, rd, rn, opcode;
- UINT32 by, rdn;
+ UINT32 op2, sc = 0, rd, rn, opcode;
+ UINT32 by, rdn;
// Normal Data Processing : 1S
// Data Processing with register specified shift : 1S + 1I
// Data Processing with PC written : 2S + 1N
// Data Processing with register specified shift and PC written : 2S + 1N + 1I
- opcode = (insn & INSN_OPCODE) >> INSN_OPCODE_SHIFT;
-
- rd = 0;
- rn = 0;
-
- /* --------------*/
- /* Construct Op2 */
- /* --------------*/
-
- /* Immediate constant */
- if (insn & INSN_I)
- {
- by = (insn & INSN_OP2_ROTATE) >> INSN_OP2_ROTATE_SHIFT;
- if (by)
- {
- op2 = ROR(insn & INSN_OP2_IMM, by << 1);
- sc = op2 & SIGN_BIT;
- }
- else
- {
- op2 = insn & INSN_OP2; // SJE: Shouldn't this be INSN_OP2_IMM?
- sc = GET_CPSR & C_MASK;
- }
- }
- /* Op2 = Register Value */
- else
- {
- op2 = decodeShift(cpustate, insn, (insn & INSN_S) ? &sc : NULL);
-
- // LD TODO sc will always be 0 if this applies
- if (!(insn & INSN_S))
- sc = 0;
-
- // extra cycle (register specified shift)
- ARM7_ICOUNT -= 1;
- }
-
- // LD TODO this comment is wrong
- /* Calculate Rn to account for pipelining */
- if ((opcode & 0xd) != 0xd) /* No Rn in MOV */
- {
- if ((rn = (insn & INSN_RN) >> INSN_RN_SHIFT) == eR15)
- {
+ opcode = (insn & INSN_OPCODE) >> INSN_OPCODE_SHIFT;
+
+ rd = 0;
+ rn = 0;
+
+ /* --------------*/
+ /* Construct Op2 */
+ /* --------------*/
+
+ /* Immediate constant */
+ if (insn & INSN_I)
+ {
+ by = (insn & INSN_OP2_ROTATE) >> INSN_OP2_ROTATE_SHIFT;
+ if (by)
+ {
+ op2 = ROR(insn & INSN_OP2_IMM, by << 1);
+ sc = op2 & SIGN_BIT;
+ }
+ else
+ {
+ op2 = insn & INSN_OP2; // SJE: Shouldn't this be INSN_OP2_IMM?
+ sc = GET_CPSR & C_MASK;
+ }
+ }
+ /* Op2 = Register Value */
+ else
+ {
+ op2 = decodeShift(cpustate, insn, (insn & INSN_S) ? &sc : NULL);
+
+ // LD TODO sc will always be 0 if this applies
+ if (!(insn & INSN_S))
+ sc = 0;
+
+ // extra cycle (register specified shift)
+ ARM7_ICOUNT -= 1;
+ }
+
+ // LD TODO this comment is wrong
+ /* Calculate Rn to account for pipelining */
+ if ((opcode & 0xd) != 0xd) /* No Rn in MOV */
+ {
+ if ((rn = (insn & INSN_RN) >> INSN_RN_SHIFT) == eR15)
+ {
#if ARM7_DEBUG_CORE
- LOG(("%08x: Pipelined R15 (Shift %d)\n", R15, (insn & INSN_I ? 8 : insn & 0x10u ? 12 : 12)));
+ LOG(("%08x: Pipelined R15 (Shift %d)\n", R15, (insn & INSN_I ? 8 : insn & 0x10u ? 12 : 12)));
#endif
if (MODE32)
- rn = R15 + 8;
- else
- rn = GET_PC + 8;
- }
- else
- {
- rn = GET_REGISTER(cpustate, rn);
- }
- }
-
- /* Perform the operation */
-
- switch (opcode)
- {
- /* Arithmetic operations */
- case OPCODE_SBC:
- rd = (rn - op2 - (GET_CPSR & C_MASK ? 0 : 1));
- HandleALUSubFlags(rd, rn, op2);
- break;
- case OPCODE_CMP:
- case OPCODE_SUB:
- rd = (rn - op2);
- HandleALUSubFlags(rd, rn, op2);
- break;
- case OPCODE_RSC:
- rd = (op2 - rn - (GET_CPSR & C_MASK ? 0 : 1));
- HandleALUSubFlags(rd, op2, rn);
- break;
- case OPCODE_RSB:
- rd = (op2 - rn);
- HandleALUSubFlags(rd, op2, rn);
- break;
- case OPCODE_ADC:
- rd = (rn + op2 + ((GET_CPSR & C_MASK) >> C_BIT));
- HandleALUAddFlags(rd, rn, op2);
- break;
- case OPCODE_CMN:
- case OPCODE_ADD:
- rd = (rn + op2);
- HandleALUAddFlags(rd, rn, op2);
- break;
-
- /* Logical operations */
- case OPCODE_AND:
- case OPCODE_TST:
- rd = rn & op2;
- HandleALULogicalFlags(rd, sc);
- break;
- case OPCODE_BIC:
- rd = rn & ~op2;
- HandleALULogicalFlags(rd, sc);
- break;
- case OPCODE_TEQ:
- case OPCODE_EOR:
- rd = rn ^ op2;
- HandleALULogicalFlags(rd, sc);
- break;
- case OPCODE_ORR:
- rd = rn | op2;
- HandleALULogicalFlags(rd, sc);
- break;
- case OPCODE_MOV:
- rd = op2;
- HandleALULogicalFlags(rd, sc);
- break;
- case OPCODE_MVN:
- rd = (~op2);
- HandleALULogicalFlags(rd, sc);
- break;
- }
-
- /* Put the result in its register if not one of the test only opcodes (TST,TEQ,CMP,CMN) */
- rdn = (insn & INSN_RD) >> INSN_RD_SHIFT;
- if ((opcode & 0xc) != 0x8)
- {
- // If Rd = R15, but S Flag not set, Result is placed in R15, but CPSR is not affected (page 44)
- if (rdn == eR15 && !(insn & INSN_S))
- {
+ rn = R15 + 8;
+ else
+ rn = GET_PC + 8;
+ }
+ else
+ {
+ rn = GET_REGISTER(cpustate, rn);
+ }
+ }
+
+ /* Perform the operation */
+
+ switch (opcode)
+ {
+ /* Arithmetic operations */
+ case OPCODE_SBC:
+ rd = (rn - op2 - (GET_CPSR & C_MASK ? 0 : 1));
+ HandleALUSubFlags(rd, rn, op2);
+ break;
+ case OPCODE_CMP:
+ case OPCODE_SUB:
+ rd = (rn - op2);
+ HandleALUSubFlags(rd, rn, op2);
+ break;
+ case OPCODE_RSC:
+ rd = (op2 - rn - (GET_CPSR & C_MASK ? 0 : 1));
+ HandleALUSubFlags(rd, op2, rn);
+ break;
+ case OPCODE_RSB:
+ rd = (op2 - rn);
+ HandleALUSubFlags(rd, op2, rn);
+ break;
+ case OPCODE_ADC:
+ rd = (rn + op2 + ((GET_CPSR & C_MASK) >> C_BIT));
+ HandleALUAddFlags(rd, rn, op2);
+ break;
+ case OPCODE_CMN:
+ case OPCODE_ADD:
+ rd = (rn + op2);
+ HandleALUAddFlags(rd, rn, op2);
+ break;
+
+ /* Logical operations */
+ case OPCODE_AND:
+ case OPCODE_TST:
+ rd = rn & op2;
+ HandleALULogicalFlags(rd, sc);
+ break;
+ case OPCODE_BIC:
+ rd = rn & ~op2;
+ HandleALULogicalFlags(rd, sc);
+ break;
+ case OPCODE_TEQ:
+ case OPCODE_EOR:
+ rd = rn ^ op2;
+ HandleALULogicalFlags(rd, sc);
+ break;
+ case OPCODE_ORR:
+ rd = rn | op2;
+ HandleALULogicalFlags(rd, sc);
+ break;
+ case OPCODE_MOV:
+ rd = op2;
+ HandleALULogicalFlags(rd, sc);
+ break;
+ case OPCODE_MVN:
+ rd = (~op2);
+ HandleALULogicalFlags(rd, sc);
+ break;
+ }
+
+ /* Put the result in its register if not one of the test only opcodes (TST,TEQ,CMP,CMN) */
+ rdn = (insn & INSN_RD) >> INSN_RD_SHIFT;
+ if ((opcode & 0xc) != 0x8)
+ {
+ // If Rd = R15, but S Flag not set, Result is placed in R15, but CPSR is not affected (page 44)
+ if (rdn == eR15 && !(insn & INSN_S))
+ {
if (MODE32)
{
- R15 = rd;
- }
- else
- {
- R15 = (R15 & ~0x03FFFFFC) | (rd & 0x03FFFFFC);
- }
- // extra cycles (PC written)
- ARM7_ICOUNT -= 2;
- }
- else
- {
- // Rd = 15 and S Flag IS set, Result is placed in R15, and current mode SPSR moved to CPSR
- if (rdn == eR15) {
+ R15 = rd;
+ }
+ else
+ {
+ R15 = (R15 & ~0x03FFFFFC) | (rd & 0x03FFFFFC);
+ }
+ // extra cycles (PC written)
+ ARM7_ICOUNT -= 2;
+ }
+ else
+ {
+ // Rd = 15 and S Flag IS set, Result is placed in R15, and current mode SPSR moved to CPSR
+ if (rdn == eR15) {
if (MODE32)
{
@@ -1094,73 +1094,73 @@ static void HandleALU(arm_state *cpustate, UINT32 insn)
if (GET_MODE != eARM7_MODE_USER)
{
- // Update CPSR from SPSR
- SET_CPSR(GET_REGISTER(cpustate, SPSR));
- SwitchMode(cpustate, GET_MODE);
- }
+ // Update CPSR from SPSR
+ SET_CPSR(GET_REGISTER(cpustate, SPSR));
+ SwitchMode(cpustate, GET_MODE);
+ }
- R15 = rd;
+ R15 = rd;
- }
- else
- {
- UINT32 temp;
+ }
+ else
+ {
+ UINT32 temp;
R15 = rd; //(R15 & 0x03FFFFFC) | (rd & 0xFC000003);
temp = (GET_CPSR & 0x0FFFFF20) | (rd & 0xF0000000) /* N Z C V */ | ((rd & 0x0C000000) >> (26 - 6)) /* I F */ | (rd & 0x00000003) /* M1 M0 */;
SET_CPSR( temp);
SwitchMode( cpustate, temp & 3);
- }
+ }
- // extra cycles (PC written)
- ARM7_ICOUNT -= 2;
+ // extra cycles (PC written)
+ ARM7_ICOUNT -= 2;
- /* IRQ masks may have changed in this instruction */
+ /* IRQ masks may have changed in this instruction */
// ARM7_CHECKIRQ;
- }
- else
- /* S Flag is set - Write results to register & update CPSR (which was already handled using HandleALU flag macros) */
- SET_REGISTER(cpustate, rdn, rd);
- }
- }
- // SJE: Don't think this applies any more.. (see page 44 at bottom)
- /* TST & TEQ can affect R15 (the condition code register) with the S bit set */
- else if (rdn == eR15)
- {
- if (insn & INSN_S) {
+ }
+ else
+ /* S Flag is set - Write results to register & update CPSR (which was already handled using HandleALU flag macros) */
+ SET_REGISTER(cpustate, rdn, rd);
+ }
+ }
+ // SJE: Don't think this applies any more.. (see page 44 at bottom)
+ /* TST & TEQ can affect R15 (the condition code register) with the S bit set */
+ else if (rdn == eR15)
+ {
+ if (insn & INSN_S) {
#if ARM7_DEBUG_CORE
- LOG(("%08x: TST class on R15 s bit set\n", R15));
+ LOG(("%08x: TST class on R15 s bit set\n", R15));
#endif
if (MODE32)
- R15 = rd;
- else
- {
- UINT32 temp;
+ R15 = rd;
+ else
+ {
+ UINT32 temp;
R15 = (R15 & 0x03FFFFFC) | (rd & ~0x03FFFFFC);
temp = (GET_CPSR & 0x0FFFFF20) | (rd & 0xF0000000) /* N Z C V */ | ((rd & 0x0C000000) >> (26 - 6)) /* I F */ | (rd & 0x00000003) /* M1 M0 */;
SET_CPSR( temp);
SwitchMode( cpustate, temp & 3);
}
- /* IRQ masks may have changed in this instruction */
+ /* IRQ masks may have changed in this instruction */
// ARM7_CHECKIRQ;
- }
- else
- {
+ }
+ else
+ {
#if ARM7_DEBUG_CORE
- LOG(("%08x: TST class on R15 no s bit set\n", R15));
+ LOG(("%08x: TST class on R15 no s bit set\n", R15));
#endif
- }
- // extra cycles (PC written)
- ARM7_ICOUNT -= 2;
- }
+ }
+ // extra cycles (PC written)
+ ARM7_ICOUNT -= 2;
+ }
- // compensate for the -3 at the end
- ARM7_ICOUNT += 2;
+ // compensate for the -3 at the end
+ ARM7_ICOUNT += 2;
}
static void HandleMul(arm_state *cpustate, UINT32 insn)
{
- UINT32 r, rm, rs;
+ UINT32 r, rm, rs;
// MUL takes 1S + mI and MLA 1S + (m+1)I cycles to execute, where S and I are as
// defined in 6.2 Cycle Types on page 6-2.
@@ -1171,32 +1171,32 @@ static void HandleMul(arm_state *cpustate, UINT32 insn)
rm = GET_REGISTER(cpustate, insn & INSN_MUL_RM);
rs = GET_REGISTER(cpustate, (insn & INSN_MUL_RS) >> INSN_MUL_RS_SHIFT);
- /* Do the basic multiply of Rm and Rs */
- r = rm * rs;
+ /* Do the basic multiply of Rm and Rs */
+ r = rm * rs;
#if ARM7_DEBUG_CORE
- if ((insn & INSN_MUL_RM) == 0xf ||
- ((insn & INSN_MUL_RS) >> INSN_MUL_RS_SHIFT) == 0xf ||
- ((insn & INSN_MUL_RN) >> INSN_MUL_RN_SHIFT) == 0xf)
- LOG(("%08x: R15 used in mult\n", R15));
+ if ((insn & INSN_MUL_RM) == 0xf ||
+ ((insn & INSN_MUL_RS) >> INSN_MUL_RS_SHIFT) == 0xf ||
+ ((insn & INSN_MUL_RN) >> INSN_MUL_RN_SHIFT) == 0xf)
+ LOG(("%08x: R15 used in mult\n", R15));
#endif
- /* Add on Rn if this is a MLA */
- if (insn & INSN_MUL_A)
- {
- r += GET_REGISTER(cpustate, (insn & INSN_MUL_RN) >> INSN_MUL_RN_SHIFT);
- // extra cycle for MLA
+ /* Add on Rn if this is a MLA */
+ if (insn & INSN_MUL_A)
+ {
+ r += GET_REGISTER(cpustate, (insn & INSN_MUL_RN) >> INSN_MUL_RN_SHIFT);
+ // extra cycle for MLA
ARM7_ICOUNT -= 1;
- }
+ }
- /* Write the result */
- SET_REGISTER(cpustate, (insn & INSN_MUL_RD) >> INSN_MUL_RD_SHIFT, r);
+ /* Write the result */
+ SET_REGISTER(cpustate, (insn & INSN_MUL_RD) >> INSN_MUL_RD_SHIFT, r);
- /* Set N and Z if asked */
- if (insn & INSN_S)
- {
- SET_CPSR((GET_CPSR & ~(N_MASK | Z_MASK)) | HandleALUNZFlags(r));
- }
+ /* Set N and Z if asked */
+ if (insn & INSN_S)
+ {
+ SET_CPSR((GET_CPSR & ~(N_MASK | Z_MASK)) | HandleALUNZFlags(r));
+ }
if (rs & SIGN_BIT) rs = -rs;
if (rs < 0x00000100) ARM7_ICOUNT -= 1 + 1;
@@ -1210,45 +1210,45 @@ static void HandleMul(arm_state *cpustate, UINT32 insn)
// todo: add proper cycle counts
static void HandleSMulLong(arm_state *cpustate, UINT32 insn)
{
- INT32 rm, rs;
- UINT32 rhi, rlo;
- INT64 res = 0;
+ INT32 rm, rs;
+ UINT32 rhi, rlo;
+ INT64 res = 0;
// MULL takes 1S + (m+1)I and MLAL 1S + (m+2)I cycles to execute, where m is the
// number of 8 bit multiplier array cycles required to complete the multiply, which is
// controlled by the value of the multiplier operand specified by Rs.
- rm = (INT32)GET_REGISTER(cpustate, insn & 0xf);
- rs = (INT32)GET_REGISTER(cpustate, ((insn >> 8) & 0xf));
- rhi = (insn >> 16) & 0xf;
- rlo = (insn >> 12) & 0xf;
+ rm = (INT32)GET_REGISTER(cpustate, insn & 0xf);
+ rs = (INT32)GET_REGISTER(cpustate, ((insn >> 8) & 0xf));
+ rhi = (insn >> 16) & 0xf;
+ rlo = (insn >> 12) & 0xf;
#if ARM7_DEBUG_CORE
- if ((insn & 0xf) == 15 || ((insn >> 8) & 0xf) == 15 || ((insn >> 16) & 0xf) == 15 || ((insn >> 12) & 0xf) == 15)
- LOG(("%08x: Illegal use of PC as a register in SMULL opcode\n", R15));
+ if ((insn & 0xf) == 15 || ((insn >> 8) & 0xf) == 15 || ((insn >> 16) & 0xf) == 15 || ((insn >> 12) & 0xf) == 15)
+ LOG(("%08x: Illegal use of PC as a register in SMULL opcode\n", R15));
#endif
- /* Perform the multiplication */
- res = (INT64)rm * rs;
+ /* Perform the multiplication */
+ res = (INT64)rm * rs;
- /* Add on Rn if this is a MLA */
- if (insn & INSN_MUL_A)
- {
- INT64 acum = (INT64)((((INT64)(GET_REGISTER(cpustate, rhi))) << 32) | GET_REGISTER(cpustate, rlo));
- res += acum;
- // extra cycle for MLA
+ /* Add on Rn if this is a MLA */
+ if (insn & INSN_MUL_A)
+ {
+ INT64 acum = (INT64)((((INT64)(GET_REGISTER(cpustate, rhi))) << 32) | GET_REGISTER(cpustate, rlo));
+ res += acum;
+ // extra cycle for MLA
ARM7_ICOUNT -= 1;
- }
+ }
- /* Write the result (upper dword goes to RHi, lower to RLo) */
- SET_REGISTER(cpustate, rhi, res >> 32);
- SET_REGISTER(cpustate, rlo, res & 0xFFFFFFFF);
+ /* Write the result (upper dword goes to RHi, lower to RLo) */
+ SET_REGISTER(cpustate, rhi, res >> 32);
+ SET_REGISTER(cpustate, rlo, res & 0xFFFFFFFF);
- /* Set N and Z if asked */
- if (insn & INSN_S)
- {
- SET_CPSR((GET_CPSR & ~(N_MASK | Z_MASK)) | HandleLongALUNZFlags(res));
- }
+ /* Set N and Z if asked */
+ if (insn & INSN_S)
+ {
+ SET_CPSR((GET_CPSR & ~(N_MASK | Z_MASK)) | HandleLongALUNZFlags(res));
+ }
if (rs < 0) rs = -rs;
if (rs < 0x00000100) ARM7_ICOUNT -= 1 + 1 + 1;
@@ -1262,45 +1262,45 @@ static void HandleSMulLong(arm_state *cpustate, UINT32 insn)
// todo: add proper cycle counts
static void HandleUMulLong(arm_state *cpustate, UINT32 insn)
{
- UINT32 rm, rs;
- UINT32 rhi, rlo;
- UINT64 res = 0;
+ UINT32 rm, rs;
+ UINT32 rhi, rlo;
+ UINT64 res = 0;
// MULL takes 1S + (m+1)I and MLAL 1S + (m+2)I cycles to execute, where m is the
// number of 8 bit multiplier array cycles required to complete the multiply, which is
// controlled by the value of the multiplier operand specified by Rs.
- rm = (INT32)GET_REGISTER(cpustate, insn & 0xf);
- rs = (INT32)GET_REGISTER(cpustate, ((insn >> 8) & 0xf));
- rhi = (insn >> 16) & 0xf;
- rlo = (insn >> 12) & 0xf;
+ rm = (INT32)GET_REGISTER(cpustate, insn & 0xf);
+ rs = (INT32)GET_REGISTER(cpustate, ((insn >> 8) & 0xf));
+ rhi = (insn >> 16) & 0xf;
+ rlo = (insn >> 12) & 0xf;
#if ARM7_DEBUG_CORE
- if (((insn & 0xf) == 15) || (((insn >> 8) & 0xf) == 15) || (((insn >> 16) & 0xf) == 15) || (((insn >> 12) & 0xf) == 15))
- LOG(("%08x: Illegal use of PC as a register in SMULL opcode\n", R15));
+ if (((insn & 0xf) == 15) || (((insn >> 8) & 0xf) == 15) || (((insn >> 16) & 0xf) == 15) || (((insn >> 12) & 0xf) == 15))
+ LOG(("%08x: Illegal use of PC as a register in SMULL opcode\n", R15));
#endif
- /* Perform the multiplication */
- res = (UINT64)rm * rs;
+ /* Perform the multiplication */
+ res = (UINT64)rm * rs;
- /* Add on Rn if this is a MLA */
- if (insn & INSN_MUL_A)
- {
- UINT64 acum = (UINT64)((((UINT64)(GET_REGISTER(cpustate, rhi))) << 32) | GET_REGISTER(cpustate, rlo));
- res += acum;
- // extra cycle for MLA
+ /* Add on Rn if this is a MLA */
+ if (insn & INSN_MUL_A)
+ {
+ UINT64 acum = (UINT64)((((UINT64)(GET_REGISTER(cpustate, rhi))) << 32) | GET_REGISTER(cpustate, rlo));
+ res += acum;
+ // extra cycle for MLA
ARM7_ICOUNT -= 1;
- }
+ }
- /* Write the result (upper dword goes to RHi, lower to RLo) */
- SET_REGISTER(cpustate, rhi, res >> 32);
- SET_REGISTER(cpustate, rlo, res & 0xFFFFFFFF);
+ /* Write the result (upper dword goes to RHi, lower to RLo) */
+ SET_REGISTER(cpustate, rhi, res >> 32);
+ SET_REGISTER(cpustate, rlo, res & 0xFFFFFFFF);
- /* Set N and Z if asked */
- if (insn & INSN_S)
- {
- SET_CPSR((GET_CPSR & ~(N_MASK | Z_MASK)) | HandleLongALUNZFlags(res));
- }
+ /* Set N and Z if asked */
+ if (insn & INSN_S)
+ {
+ SET_CPSR((GET_CPSR & ~(N_MASK | Z_MASK)) | HandleLongALUNZFlags(res));
+ }
if (rs < 0x00000100) ARM7_ICOUNT -= 1 + 1 + 1;
else if (rs < 0x00010000) ARM7_ICOUNT -= 1 + 2 + 1;
@@ -1312,13 +1312,13 @@ static void HandleUMulLong(arm_state *cpustate, UINT32 insn)
static void HandleMemBlock(arm_state *cpustate, UINT32 insn)
{
- UINT32 rb = (insn & INSN_RN) >> INSN_RN_SHIFT;
- UINT32 rbp = GET_REGISTER(cpustate, rb);
- int result;
+ UINT32 rb = (insn & INSN_RN) >> INSN_RN_SHIFT;
+ UINT32 rbp = GET_REGISTER(cpustate, rb);
+ int result;
#if ARM7_DEBUG_CORE
- if (rbp & 3)
- LOG(("%08x: Unaligned Mem Transfer @ %08x\n", R15, rbp));
+ if (rbp & 3)
+ LOG(("%08x: Unaligned Mem Transfer @ %08x\n", R15, rbp));
#endif
// Normal LDM instructions take nS + 1N + 1I and LDM PC takes (n+1)S + 2N + 1I
@@ -1326,37 +1326,37 @@ static void HandleMemBlock(arm_state *cpustate, UINT32 insn)
// STM instructions take (n-1)S + 2N incremental cycles to execute, where n is the
// number of words transferred.
- if (insn & INSN_BDT_L)
- {
- /* Loading */
- if (insn & INSN_BDT_U)
- {
- /* Incrementing */
- if (!(insn & INSN_BDT_P))
- {
- rbp = rbp + (- 4);
- }
-
- // S Flag Set, but R15 not in list = User Bank Transfer
- if (insn & INSN_BDT_S && (insn & 0x8000) == 0)
- {
- // !! actually switching to user mode triggers a section permission fault in Happy Fish 302-in-1 (BP C0030DF4, press F5 ~16 times) !!
- // set to user mode - then do the transfer, and set back
- //int curmode = GET_MODE;
- //SwitchMode(cpustate, eARM7_MODE_USER);
- LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
- result = loadInc(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, eARM7_MODE_USER);
- // todo - not sure if Writeback occurs on User registers also..
- //SwitchMode(cpustate, curmode);
- }
- else
- result = loadInc(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, GET_MODE);
-
- if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
- {
+ if (insn & INSN_BDT_L)
+ {
+ /* Loading */
+ if (insn & INSN_BDT_U)
+ {
+ /* Incrementing */
+ if (!(insn & INSN_BDT_P))
+ {
+ rbp = rbp + (- 4);
+ }
+
+ // S Flag Set, but R15 not in list = User Bank Transfer
+ if (insn & INSN_BDT_S && (insn & 0x8000) == 0)
+ {
+ // !! actually switching to user mode triggers a section permission fault in Happy Fish 302-in-1 (BP C0030DF4, press F5 ~16 times) !!
+ // set to user mode - then do the transfer, and set back
+ //int curmode = GET_MODE;
+ //SwitchMode(cpustate, eARM7_MODE_USER);
+ LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
+ result = loadInc(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, eARM7_MODE_USER);
+ // todo - not sure if Writeback occurs on User registers also..
+ //SwitchMode(cpustate, curmode);
+ }
+ else
+ result = loadInc(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, GET_MODE);
+
+ if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
+ {
#if ARM7_DEBUG_CORE
- if (rb == 15)
- LOG(("%08x: Illegal LDRM writeback to r15\n", R15));
+ if (rb == 15)
+ LOG(("%08x: Illegal LDRM writeback to r15\n", R15));
#endif
// "A LDM will always overwrite the updated base if the base is in the list." (also for a user bank transfer?)
// GBA "V-Rally 3" expects R0 not to be overwritten with the updated base value [BP 8077B0C]
@@ -1364,168 +1364,168 @@ static void HandleMemBlock(arm_state *cpustate, UINT32 insn)
{
SET_REGISTER(cpustate, rb, GET_REGISTER(cpustate, rb) + result * 4);
}
- }
+ }
- // R15 included? (NOTE: CPSR restore must occur LAST otherwise wrong registers restored!)
- if ((insn & 0x8000) && (cpustate->pendingAbtD == 0)) {
- R15 -= 4; // SJE: I forget why i did this?
- // S - Flag Set? Signals transfer of current mode SPSR->CPSR
- if (insn & INSN_BDT_S)
+ // R15 included? (NOTE: CPSR restore must occur LAST otherwise wrong registers restored!)
+ if ((insn & 0x8000) && (cpustate->pendingAbtD == 0)) {
+ R15 -= 4; // SJE: I forget why i did this?
+ // S - Flag Set? Signals transfer of current mode SPSR->CPSR
+ if (insn & INSN_BDT_S)
{
- if (MODE32)
- {
- SET_CPSR(GET_REGISTER(cpustate, SPSR));
- SwitchMode(cpustate, GET_MODE);
- }
- else
- {
- UINT32 temp;
+ if (MODE32)
+ {
+ SET_CPSR(GET_REGISTER(cpustate, SPSR));
+ SwitchMode(cpustate, GET_MODE);
+ }
+ else
+ {
+ UINT32 temp;
// LOG(("LDM + S | R15 %08X CPSR %08X\n", R15, GET_CPSR));
temp = (GET_CPSR & 0x0FFFFF20) | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */ | (R15 & 0x00000003) /* M1 M0 */;
SET_CPSR( temp);
SwitchMode(cpustate, temp & 3);
- }
- }
- // LDM PC - takes 2 extra cycles
- ARM7_ICOUNT -= 2;
- }
- }
- else
- {
- /* Decrementing */
- if (!(insn & INSN_BDT_P))
- {
- rbp = rbp - (- 4);
- }
-
- // S Flag Set, but R15 not in list = User Bank Transfer
- if (insn & INSN_BDT_S && ((insn & 0x8000) == 0))
- {
- // set to user mode - then do the transfer, and set back
- //int curmode = GET_MODE;
- //SwitchMode(cpustate, eARM7_MODE_USER);
- LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
- result = loadDec(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, eARM7_MODE_USER);
- // todo - not sure if Writeback occurs on User registers also..
- //SwitchMode(cpustate, curmode);
- }
- else
- result = loadDec(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, GET_MODE);
-
- if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
- {
- if (rb == 0xf)
- LOG(("%08x: Illegal LDRM writeback to r15\n", R15));
+ }
+ }
+ // LDM PC - takes 2 extra cycles
+ ARM7_ICOUNT -= 2;
+ }
+ }
+ else
+ {
+ /* Decrementing */
+ if (!(insn & INSN_BDT_P))
+ {
+ rbp = rbp - (- 4);
+ }
+
+ // S Flag Set, but R15 not in list = User Bank Transfer
+ if (insn & INSN_BDT_S && ((insn & 0x8000) == 0))
+ {
+ // set to user mode - then do the transfer, and set back
+ //int curmode = GET_MODE;
+ //SwitchMode(cpustate, eARM7_MODE_USER);
+ LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
+ result = loadDec(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, eARM7_MODE_USER);
+ // todo - not sure if Writeback occurs on User registers also..
+ //SwitchMode(cpustate, curmode);
+ }
+ else
+ result = loadDec(cpustate, insn & 0xffff, rbp, insn & INSN_BDT_S, GET_MODE);
+
+ if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
+ {
+ if (rb == 0xf)
+ LOG(("%08x: Illegal LDRM writeback to r15\n", R15));
// "A LDM will always overwrite the updated base if the base is in the list." (also for a user bank transfer?)
if (((insn >> rb) & 1) == 0)
{
SET_REGISTER(cpustate, rb, GET_REGISTER(cpustate, rb) - result * 4);
}
- }
+ }
- // R15 included? (NOTE: CPSR restore must occur LAST otherwise wrong registers restored!)
- if ((insn & 0x8000) && (cpustate->pendingAbtD == 0)) {
- R15 -= 4; // SJE: I forget why i did this?
- // S - Flag Set? Signals transfer of current mode SPSR->CPSR
- if (insn & INSN_BDT_S)
+ // R15 included? (NOTE: CPSR restore must occur LAST otherwise wrong registers restored!)
+ if ((insn & 0x8000) && (cpustate->pendingAbtD == 0)) {
+ R15 -= 4; // SJE: I forget why i did this?
+ // S - Flag Set? Signals transfer of current mode SPSR->CPSR
+ if (insn & INSN_BDT_S)
{
- if (MODE32)
- {
- SET_CPSR(GET_REGISTER(cpustate, SPSR));
- SwitchMode(cpustate, GET_MODE);
- }
- else
- {
- UINT32 temp;
+ if (MODE32)
+ {
+ SET_CPSR(GET_REGISTER(cpustate, SPSR));
+ SwitchMode(cpustate, GET_MODE);
+ }
+ else
+ {
+ UINT32 temp;
// LOG(("LDM + S | R15 %08X CPSR %08X\n", R15, GET_CPSR));
temp = (GET_CPSR & 0x0FFFFF20) /* N Z C V I F M4 M3 M2 M1 M0 */ | (R15 & 0xF0000000) /* N Z C V */ | ((R15 & 0x0C000000) >> (26 - 6)) /* I F */ | (R15 & 0x00000003) /* M1 M0 */;
SET_CPSR( temp);
SwitchMode(cpustate, temp & 3);
- }
- }
- // LDM PC - takes 2 extra cycles
- ARM7_ICOUNT -= 2;
- }
- }
- // LDM (NO PC) takes (n)S + 1N + 1I cycles (n = # of register transfers)
- ARM7_ICOUNT -= result + 1 + 1;
- } /* Loading */
- else
- {
- /* Storing */
- if (insn & (1 << eR15))
- {
+ }
+ }
+ // LDM PC - takes 2 extra cycles
+ ARM7_ICOUNT -= 2;
+ }
+ }
+ // LDM (NO PC) takes (n)S + 1N + 1I cycles (n = # of register transfers)
+ ARM7_ICOUNT -= result + 1 + 1;
+ } /* Loading */
+ else
+ {
+ /* Storing */
+ if (insn & (1 << eR15))
+ {
#if ARM7_DEBUG_CORE
- LOG(("%08x: Writing R15 in strm\n", R15));
+ LOG(("%08x: Writing R15 in strm\n", R15));
#endif
- /* special case handling if writing to PC */
- R15 += 12;
- }
- if (insn & INSN_BDT_U)
- {
- /* Incrementing */
- if (!(insn & INSN_BDT_P))
- {
- rbp = rbp + (- 4);
- }
-
- // S Flag Set = User Bank Transfer
- if (insn & INSN_BDT_S)
- {
- // todo: needs to be tested..
-
- // set to user mode - then do the transfer, and set back
- //int curmode = GET_MODE;
- //SwitchMode(cpustate, eARM7_MODE_USER);
- LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
- result = storeInc(cpustate, insn & 0xffff, rbp, eARM7_MODE_USER);
- // todo - not sure if Writeback occurs on User registers also..
- //SwitchMode(cpustate, curmode);
- }
- else
- result = storeInc(cpustate, insn & 0xffff, rbp, GET_MODE);
-
- if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
- {
- SET_REGISTER(cpustate, rb, GET_REGISTER(cpustate, rb) + result * 4);
- }
- }
- else
- {
- /* Decrementing */
- if (!(insn & INSN_BDT_P))
- {
- rbp = rbp - (-4);
- }
-
- // S Flag Set = User Bank Transfer
- if (insn & INSN_BDT_S)
- {
- // set to user mode - then do the transfer, and set back
- //int curmode = GET_MODE;
- //SwitchMode(cpustate, eARM7_MODE_USER);
- LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
- result = storeDec(cpustate, insn & 0xffff, rbp, eARM7_MODE_USER);
- // todo - not sure if Writeback occurs on User registers also..
- //SwitchMode(cpustate, curmode);
- }
- else
- result = storeDec(cpustate, insn & 0xffff, rbp, GET_MODE);
-
- if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
- {
- SET_REGISTER(cpustate, rb, GET_REGISTER(cpustate, rb) - result * 4);
- }
- }
- if (insn & (1 << eR15))
- R15 -= 12;
-
- // STM takes (n-1)S + 2N cycles (n = # of register transfers)
- ARM7_ICOUNT -= (result - 1) + 2;
- }
-
- // We will specify the cycle count for each case, so remove the -3 that occurs at the end
- ARM7_ICOUNT += 3;
+ /* special case handling if writing to PC */
+ R15 += 12;
+ }
+ if (insn & INSN_BDT_U)
+ {
+ /* Incrementing */
+ if (!(insn & INSN_BDT_P))
+ {
+ rbp = rbp + (- 4);
+ }
+
+ // S Flag Set = User Bank Transfer
+ if (insn & INSN_BDT_S)
+ {
+ // todo: needs to be tested..
+
+ // set to user mode - then do the transfer, and set back
+ //int curmode = GET_MODE;
+ //SwitchMode(cpustate, eARM7_MODE_USER);
+ LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
+ result = storeInc(cpustate, insn & 0xffff, rbp, eARM7_MODE_USER);
+ // todo - not sure if Writeback occurs on User registers also..
+ //SwitchMode(cpustate, curmode);
+ }
+ else
+ result = storeInc(cpustate, insn & 0xffff, rbp, GET_MODE);
+
+ if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
+ {
+ SET_REGISTER(cpustate, rb, GET_REGISTER(cpustate, rb) + result * 4);
+ }
+ }
+ else
+ {
+ /* Decrementing */
+ if (!(insn & INSN_BDT_P))
+ {
+ rbp = rbp - (-4);
+ }
+
+ // S Flag Set = User Bank Transfer
+ if (insn & INSN_BDT_S)
+ {
+ // set to user mode - then do the transfer, and set back
+ //int curmode = GET_MODE;
+ //SwitchMode(cpustate, eARM7_MODE_USER);
+ LOG(("%08x: User Bank Transfer not fully tested - please check if working properly!\n", R15));
+ result = storeDec(cpustate, insn & 0xffff, rbp, eARM7_MODE_USER);
+ // todo - not sure if Writeback occurs on User registers also..
+ //SwitchMode(cpustate, curmode);
+ }
+ else
+ result = storeDec(cpustate, insn & 0xffff, rbp, GET_MODE);
+
+ if ((insn & INSN_BDT_W) && (cpustate->pendingAbtD == 0))
+ {
+ SET_REGISTER(cpustate, rb, GET_REGISTER(cpustate, rb) - result * 4);
+ }
+ }
+ if (insn & (1 << eR15))
+ R15 -= 12;
+
+ // STM takes (n-1)S + 2N cycles (n = # of register transfers)
+ ARM7_ICOUNT -= (result - 1) + 2;
+ }
+
+ // We will specify the cycle count for each case, so remove the -3 that occurs at the end
+ ARM7_ICOUNT += 3;
} /* HandleMemBlock */
@@ -1551,7 +1551,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
R15--;
}
}
- else if ((insn & 0x0ff000f0) == 0x01600010) // CLZ - v5
+ else if ((insn & 0x0ff000f0) == 0x01600010) // CLZ - v5
{
UINT32 rm = insn&0xf;
UINT32 rd = (insn>>12)&0xf;
@@ -1560,7 +1560,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
R15 += 4;
}
- else if ((insn & 0x0ff000f0) == 0x01000050) // QADD - v5
+ else if ((insn & 0x0ff000f0) == 0x01000050) // QADD - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>16)&0xf);
@@ -1571,7 +1571,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
SET_REGISTER(cpustate, (insn>>12)&0xf, (INT32)res);
R15 += 4;
}
- else if ((insn & 0x0ff000f0) == 0x01400050) // QDADD - v5
+ else if ((insn & 0x0ff000f0) == 0x01400050) // QDADD - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>16)&0xf);
@@ -1587,7 +1587,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
SET_REGISTER(cpustate, (insn>>12)&0xf, (INT32)res);
R15 += 4;
}
- else if ((insn & 0x0ff000f0) == 0x01200050) // QSUB - v5
+ else if ((insn & 0x0ff000f0) == 0x01200050) // QSUB - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>16)&0xf);
@@ -1598,7 +1598,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
SET_REGISTER(cpustate, (insn>>12)&0xf, (INT32)res);
R15 += 4;
}
- else if ((insn & 0x0ff000f0) == 0x01600050) // QDSUB - v5
+ else if ((insn & 0x0ff000f0) == 0x01600050) // QDSUB - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>16)&0xf);
@@ -1614,7 +1614,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
SET_REGISTER(cpustate, (insn>>12)&0xf, (INT32)res);
R15 += 4;
}
- else if ((insn & 0x0ff00090) == 0x01000080) // SMLAxy - v5
+ else if ((insn & 0x0ff00090) == 0x01000080) // SMLAxy - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>8)&0xf);
@@ -1655,7 +1655,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
SET_REGISTER(cpustate, (insn>>16)&0xf, res1 + GET_REGISTER(cpustate, (insn>>12)&0xf));
R15 += 4;
}
- else if ((insn & 0x0ff00090) == 0x01400080) // SMLALxy - v5
+ else if ((insn & 0x0ff00090) == 0x01400080) // SMLALxy - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>8)&0xf);
@@ -1698,7 +1698,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
SET_REGISTER(cpustart, (insn>>12)&0xf, (UINT32)(dst&0xffffffff));
SET_REGISTER(cpustart, (insn>>16)&0xf, (UINT32)(dst>>32));
}
- else if ((insn & 0x0ff00090) == 0x01600080) // SMULxy - v5
+ else if ((insn & 0x0ff00090) == 0x01600080) // SMULxy - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>8)&0xf);
@@ -1734,7 +1734,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
res = src1 * src2;
SET_REGISTER(cpustart, (insn>>16)&0xf, res);
}
- else if ((insn & 0x0ff000b0) == 0x012000a0) // SMULWy - v5
+ else if ((insn & 0x0ff000b0) == 0x012000a0) // SMULWy - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>8)&0xf);
@@ -1757,7 +1757,7 @@ const void arm7ops_0123(arm_state *cpustate, UINT32 insn)
res >>= 16;
SET_REGISTER(cpustart, (insn>>16)&0xf, (UINT32)res);
}
- else if ((insn & 0x0ff000b0) == 0x01200080) // SMLAWy - v5
+ else if ((insn & 0x0ff000b0) == 0x01200080) // SMLAWy - v5
{
INT32 src1 = GET_REGISTER(cpustate, insn&0xf);
INT32 src2 = GET_REGISTER(cpustate, (insn>>8)&0xf);
diff --git a/src/emu/cpu/arm7/arm7thmb.c b/src/emu/cpu/arm7/arm7thmb.c
index bf16aac6484..51de5225918 100644
--- a/src/emu/cpu/arm7/arm7thmb.c
+++ b/src/emu/cpu/arm7/arm7thmb.c
@@ -7,71 +7,71 @@
arm7thumb_ophandler thumb_handler[0x40*0x10] =
{
// #define THUMB_SHIFT_R ((UINT16)0x0800)
- tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1,
+ tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_0, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1, tg00_1,
// #define THUMB_INSN_ADDSUB ((UINT16)0x0800) // #define THUMB_ADDSUB_TYPE ((UINT16)0x0600)
- tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13,
+ tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_0, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_10, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_11, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_12, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13, tg01_13,
// #define THUMB_INSN_CMP ((UINT16)0x0800)
- tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1,
+ tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_0, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1, tg02_1,
// #define THUMB_INSN_SUB ((UINT16)0x0800)
- tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1,
+ tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_0, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1, tg03_1,
//#define THUMB_GROUP4_TYPE ((UINT16)0x0c00) //#define THUMB_ALUOP_TYPE ((UINT16)0x03c0) // #define THUMB_HIREG_OP ((UINT16)0x0300) // #define THUMB_HIREG_H ((UINT16)0x00c0)
- tg04_00_00, tg04_00_01, tg04_00_02, tg04_00_03, tg04_00_04, tg04_00_05, tg04_00_06, tg04_00_07, tg04_00_08, tg04_00_09, tg04_00_0a, tg04_00_0b, tg04_00_0c, tg04_00_0d, tg04_00_0e, tg04_00_0f, tg04_01_00, tg04_01_01, tg04_01_02, tg04_01_03, tg04_01_10, tg04_01_11, tg04_01_12, tg04_01_13, tg04_01_20, tg04_01_21, tg04_01_22, tg04_01_23, tg04_01_30, tg04_01_31, tg04_01_32, tg04_01_33, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203,
+ tg04_00_00, tg04_00_01, tg04_00_02, tg04_00_03, tg04_00_04, tg04_00_05, tg04_00_06, tg04_00_07, tg04_00_08, tg04_00_09, tg04_00_0a, tg04_00_0b, tg04_00_0c, tg04_00_0d, tg04_00_0e, tg04_00_0f, tg04_01_00, tg04_01_01, tg04_01_02, tg04_01_03, tg04_01_10, tg04_01_11, tg04_01_12, tg04_01_13, tg04_01_20, tg04_01_21, tg04_01_22, tg04_01_23, tg04_01_30, tg04_01_31, tg04_01_32, tg04_01_33, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203, tg04_0203,
//#define THUMB_GROUP5_TYPE ((UINT16)0x0e00)
- tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7,
+ tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_0, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_1, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_2, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_3, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_4, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_5, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_6, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7, tg05_7,
//#define THUMB_LSOP_L ((UINT16)0x0800)
- tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1,
+ tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_0, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1, tg06_1,
//#define THUMB_LSOP_L ((UINT16)0x0800)
- tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1,
+ tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_0, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1, tg07_1,
// #define THUMB_HALFOP_L ((UINT16)0x0800)
- tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1,
+ tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_0, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1, tg08_1,
// #define THUMB_STACKOP_L ((UINT16)0x0800)
- tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1,
+ tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_0, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1, tg09_1,
// #define THUMB_RELADDR_SP ((UINT16)0x0800)
- tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1,
+ tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_0, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1, tg0a_1,
// #define THUMB_STACKOP_TYPE ((UINT16)0x0f00)
- tg0b_0, tg0b_0, tg0b_0, tg0b_0, tg0b_1, tg0b_1, tg0b_1, tg0b_1, tg0b_2, tg0b_2, tg0b_2, tg0b_2, tg0b_3, tg0b_3, tg0b_3, tg0b_3, tg0b_4, tg0b_4, tg0b_4, tg0b_4, tg0b_5, tg0b_5, tg0b_5, tg0b_5, tg0b_6, tg0b_6, tg0b_6, tg0b_6, tg0b_7, tg0b_7, tg0b_7, tg0b_7, tg0b_8, tg0b_8, tg0b_8, tg0b_8, tg0b_9, tg0b_9, tg0b_9, tg0b_9, tg0b_a, tg0b_a, tg0b_a, tg0b_a, tg0b_b, tg0b_b, tg0b_b, tg0b_b, tg0b_c, tg0b_c, tg0b_c, tg0b_c, tg0b_d, tg0b_d, tg0b_d, tg0b_d, tg0b_e, tg0b_e, tg0b_e, tg0b_e, tg0b_f, tg0b_f, tg0b_f, tg0b_f,
+ tg0b_0, tg0b_0, tg0b_0, tg0b_0, tg0b_1, tg0b_1, tg0b_1, tg0b_1, tg0b_2, tg0b_2, tg0b_2, tg0b_2, tg0b_3, tg0b_3, tg0b_3, tg0b_3, tg0b_4, tg0b_4, tg0b_4, tg0b_4, tg0b_5, tg0b_5, tg0b_5, tg0b_5, tg0b_6, tg0b_6, tg0b_6, tg0b_6, tg0b_7, tg0b_7, tg0b_7, tg0b_7, tg0b_8, tg0b_8, tg0b_8, tg0b_8, tg0b_9, tg0b_9, tg0b_9, tg0b_9, tg0b_a, tg0b_a, tg0b_a, tg0b_a, tg0b_b, tg0b_b, tg0b_b, tg0b_b, tg0b_c, tg0b_c, tg0b_c, tg0b_c, tg0b_d, tg0b_d, tg0b_d, tg0b_d, tg0b_e, tg0b_e, tg0b_e, tg0b_e, tg0b_f, tg0b_f, tg0b_f, tg0b_f,
// #define THUMB_MULTLS ((UINT16)0x0800)
- tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1,
+ tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_0, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1, tg0c_1,
// #define THUMB_COND_TYPE ((UINT16)0x0f00)
- tg0d_0, tg0d_0, tg0d_0, tg0d_0, tg0d_1, tg0d_1, tg0d_1, tg0d_1, tg0d_2, tg0d_2, tg0d_2, tg0d_2, tg0d_3, tg0d_3, tg0d_3, tg0d_3, tg0d_4, tg0d_4, tg0d_4, tg0d_4, tg0d_5, tg0d_5, tg0d_5, tg0d_5, tg0d_6, tg0d_6, tg0d_6, tg0d_6, tg0d_7, tg0d_7, tg0d_7, tg0d_7, tg0d_8, tg0d_8, tg0d_8, tg0d_8, tg0d_9, tg0d_9, tg0d_9, tg0d_9, tg0d_a, tg0d_a, tg0d_a, tg0d_a, tg0d_b, tg0d_b, tg0d_b, tg0d_b, tg0d_c, tg0d_c, tg0d_c, tg0d_c, tg0d_d, tg0d_d, tg0d_d, tg0d_d, tg0d_e, tg0d_e, tg0d_e, tg0d_e, tg0d_f, tg0d_f, tg0d_f, tg0d_f,
+ tg0d_0, tg0d_0, tg0d_0, tg0d_0, tg0d_1, tg0d_1, tg0d_1, tg0d_1, tg0d_2, tg0d_2, tg0d_2, tg0d_2, tg0d_3, tg0d_3, tg0d_3, tg0d_3, tg0d_4, tg0d_4, tg0d_4, tg0d_4, tg0d_5, tg0d_5, tg0d_5, tg0d_5, tg0d_6, tg0d_6, tg0d_6, tg0d_6, tg0d_7, tg0d_7, tg0d_7, tg0d_7, tg0d_8, tg0d_8, tg0d_8, tg0d_8, tg0d_9, tg0d_9, tg0d_9, tg0d_9, tg0d_a, tg0d_a, tg0d_a, tg0d_a, tg0d_b, tg0d_b, tg0d_b, tg0d_b, tg0d_c, tg0d_c, tg0d_c, tg0d_c, tg0d_d, tg0d_d, tg0d_d, tg0d_d, tg0d_e, tg0d_e, tg0d_e, tg0d_e, tg0d_f, tg0d_f, tg0d_f, tg0d_f,
// #define THUMB_BLOP_LO ((UINT16)0x0800)
- tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1,
+ tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_0, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1, tg0e_1,
// #define THUMB_BLOP_LO ((UINT16)0x0800)
- tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1,
+ tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_0, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1, tg0f_1,
};
- /* Shift operations */
+ /* Shift operations */
const void tg00_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Shift left */
{
UINT32 rs, rd, rrs;
INT32 offs;
- SET_CPSR(GET_CPSR & ~(N_MASK | Z_MASK));
+ SET_CPSR(GET_CPSR & ~(N_MASK | Z_MASK));
rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- rrs = GET_REGISTER(cpustate, rs);
- offs = (insn & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
- if (offs != 0)
- {
- SET_REGISTER(cpustate, rd, rrs << offs);
- if (rrs & (1 << (31 - (offs - 1))))
- {
- SET_CPSR(GET_CPSR | C_MASK);
- }
- else
- {
- SET_CPSR(GET_CPSR & ~C_MASK);
- }
- }
- else
- {
- SET_REGISTER(cpustate, rd, rrs);
- }
- SET_CPSR(GET_CPSR & ~(Z_MASK | N_MASK));
- SET_CPSR(GET_CPSR | HandleALUNZFlags(GET_REGISTER(cpustate, rd)));
- R15 += 2;
+ rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ rrs = GET_REGISTER(cpustate, rs);
+ offs = (insn & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
+ if (offs != 0)
+ {
+ SET_REGISTER(cpustate, rd, rrs << offs);
+ if (rrs & (1 << (31 - (offs - 1))))
+ {
+ SET_CPSR(GET_CPSR | C_MASK);
+ }
+ else
+ {
+ SET_CPSR(GET_CPSR & ~C_MASK);
+ }
+ }
+ else
+ {
+ SET_REGISTER(cpustate, rd, rrs);
+ }
+ SET_CPSR(GET_CPSR & ~(Z_MASK | N_MASK));
+ SET_CPSR(GET_CPSR | HandleALUNZFlags(GET_REGISTER(cpustate, rd)));
+ R15 += 2;
}
const void tg00_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Shift right */
@@ -79,39 +79,39 @@ const void tg00_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Shift right */
UINT32 rs, rd, rrs;
INT32 offs;
- SET_CPSR(GET_CPSR & ~(N_MASK | Z_MASK));
-
- rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
- rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- rrs = GET_REGISTER(cpustate, rs);
- offs = (insn & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
- if (offs != 0)
- {
- SET_REGISTER(cpustate, rd, rrs >> offs);
- if (rrs & (1 << (offs - 1)))
- {
- SET_CPSR(GET_CPSR | C_MASK);
- }
- else
- {
- SET_CPSR(GET_CPSR & ~C_MASK);
- }
- }
- else
- {
- SET_REGISTER(cpustate, rd, 0);
- if (rrs & 0x80000000)
- {
- SET_CPSR(GET_CPSR | C_MASK);
- }
- else
- {
- SET_CPSR(GET_CPSR & ~C_MASK);
- }
- }
- SET_CPSR(GET_CPSR & ~(Z_MASK | N_MASK));
- SET_CPSR(GET_CPSR | HandleALUNZFlags(GET_REGISTER(cpustate, rd)));
- R15 += 2;
+ SET_CPSR(GET_CPSR & ~(N_MASK | Z_MASK));
+
+ rs = (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT;
+ rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ rrs = GET_REGISTER(cpustate, rs);
+ offs = (insn & THUMB_SHIFT_AMT) >> THUMB_SHIFT_AMT_SHIFT;
+ if (offs != 0)
+ {
+ SET_REGISTER(cpustate, rd, rrs >> offs);
+ if (rrs & (1 << (offs - 1)))
+ {
+ SET_CPSR(GET_CPSR | C_MASK);
+ }
+ else
+ {
+ SET_CPSR(GET_CPSR & ~C_MASK);
+ }
+ }
+ else
+ {
+ SET_REGISTER(cpustate, rd, 0);
+ if (rrs & 0x80000000)
+ {
+ SET_CPSR(GET_CPSR | C_MASK);
+ }
+ else
+ {
+ SET_CPSR(GET_CPSR & ~C_MASK);
+ }
+ }
+ SET_CPSR(GET_CPSR & ~(Z_MASK | N_MASK));
+ SET_CPSR(GET_CPSR | HandleALUNZFlags(GET_REGISTER(cpustate, rd)));
+ R15 += 2;
}
/* Arithmetic */
@@ -169,11 +169,11 @@ const void tg01_10(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, Rs,
UINT32 rn, rs, rd;
- rn = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
- rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- SET_REGISTER(cpustate, rd, rs + rn);
- HandleThumbALUAddFlags(GET_REGISTER(cpustate, rd), rs, rn);
+ rn = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
+ rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ SET_REGISTER(cpustate, rd, rs + rn);
+ HandleThumbALUAddFlags(GET_REGISTER(cpustate, rd), rs, rn);
}
@@ -181,11 +181,11 @@ const void tg01_11(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SUB Rd, Rs, R
{
UINT32 rn, rs, rd;
- rn = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
- rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- SET_REGISTER(cpustate, rd, rs - rn);
- HandleThumbALUSubFlags(GET_REGISTER(cpustate, rd), rs, rn);
+ rn = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT);
+ rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ SET_REGISTER(cpustate, rd, rs - rn);
+ HandleThumbALUSubFlags(GET_REGISTER(cpustate, rd), rs, rn);
}
@@ -193,11 +193,11 @@ const void tg01_12(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, Rs, #
{
UINT32 rs, rd, imm;
- imm = (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- SET_REGISTER(cpustate, rd, rs + imm);
- HandleThumbALUAddFlags(GET_REGISTER(cpustate, rd), rs, imm);
+ imm = (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ SET_REGISTER(cpustate, rd, rs + imm);
+ HandleThumbALUAddFlags(GET_REGISTER(cpustate, rd), rs, imm);
}
@@ -205,11 +205,11 @@ const void tg01_13(arm_state *cpustate, UINT32 pc, UINT32 insn) /* SUB Rd, Rs, #
{
UINT32 rs, rd, imm;
- imm = (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
- rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
- rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
- SET_REGISTER(cpustate, rd, rs - imm);
- HandleThumbALUSubFlags(GET_REGISTER(cpustate, rd), rs,imm);
+ imm = (insn & THUMB_ADDSUB_RNIMM) >> THUMB_ADDSUB_RNIMM_SHIFT;
+ rs = GET_REGISTER(cpustate, (insn & THUMB_ADDSUB_RS) >> THUMB_ADDSUB_RS_SHIFT);
+ rd = (insn & THUMB_ADDSUB_RD) >> THUMB_ADDSUB_RD_SHIFT;
+ SET_REGISTER(cpustate, rd, rs - imm);
+ HandleThumbALUSubFlags(GET_REGISTER(cpustate, rd), rs,imm);
}
@@ -697,7 +697,7 @@ const void tg04_01_13(arm_state *cpustate, UINT32 pc, UINT32 insn) /* CMP Hd, Hs
}
- /* MOV group */
+ /* MOV group */
// "The action of H1 = 0, H2 = 0 for Op = 00 (ADD), Op = 01 (CMP) and Op = 10 (MOV) is undefined, and should not be used."
const void tg04_01_20(arm_state *cpustate, UINT32 pc, UINT32 insn) /* MOV Rd, Rs (undefined) */
@@ -867,12 +867,12 @@ const void tg05_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* STR Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- WRITE32(addr, GET_REGISTER(cpustate, rd));
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ WRITE32(addr, GET_REGISTER(cpustate, rd));
+ R15 += 2;
}
@@ -881,12 +881,12 @@ const void tg05_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* STRH Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- WRITE16(addr, GET_REGISTER(cpustate, rd));
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ WRITE16(addr, GET_REGISTER(cpustate, rd));
+ R15 += 2;
}
@@ -895,12 +895,12 @@ const void tg05_2(arm_state *cpustate, UINT32 pc, UINT32 insn) /* STRB Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- WRITE8(addr, GET_REGISTER(cpustate, rd));
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ WRITE8(addr, GET_REGISTER(cpustate, rd));
+ R15 += 2;
}
@@ -909,17 +909,17 @@ const void tg05_3(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDSB Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd, op2;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- op2 = READ8(addr);
- if (op2 & 0x00000080)
- {
- op2 |= 0xffffff00;
- }
- SET_REGISTER(cpustate, rd, op2);
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ op2 = READ8(addr);
+ if (op2 & 0x00000080)
+ {
+ op2 |= 0xffffff00;
+ }
+ SET_REGISTER(cpustate, rd, op2);
+ R15 += 2;
}
@@ -928,13 +928,13 @@ const void tg05_4(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDR Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd, op2;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- op2 = READ32(addr);
- SET_REGISTER(cpustate, rd, op2);
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ op2 = READ32(addr);
+ SET_REGISTER(cpustate, rd, op2);
+ R15 += 2;
}
@@ -943,13 +943,13 @@ const void tg05_5(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDRH Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd, op2;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- op2 = READ16(addr);
- SET_REGISTER(cpustate, rd, op2);
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ op2 = READ16(addr);
+ SET_REGISTER(cpustate, rd, op2);
+ R15 += 2;
}
@@ -958,13 +958,13 @@ const void tg05_6(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDRB Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd, op2;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- op2 = READ8(addr);
- SET_REGISTER(cpustate, rd, op2);
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ op2 = READ8(addr);
+ SET_REGISTER(cpustate, rd, op2);
+ R15 += 2;
}
@@ -973,21 +973,21 @@ const void tg05_7(arm_state *cpustate, UINT32 pc, UINT32 insn) /* LDSH Rd, [Rn,
UINT32 addr;
UINT32 rm, rn, rd, op2;
- rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
- rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
- rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
- addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
- op2 = READ16(addr);
- if (op2 & 0x00008000)
- {
- op2 |= 0xffff0000;
- }
- SET_REGISTER(cpustate, rd, op2);
- R15 += 2;
+ rm = (insn & THUMB_GROUP5_RM) >> THUMB_GROUP5_RM_SHIFT;
+ rn = (insn & THUMB_GROUP5_RN) >> THUMB_GROUP5_RN_SHIFT;
+ rd = (insn & THUMB_GROUP5_RD) >> THUMB_GROUP5_RD_SHIFT;
+ addr = GET_REGISTER(cpustate, rn) + GET_REGISTER(cpustate, rm);
+ op2 = READ16(addr);
+ if (op2 & 0x00008000)
+ {
+ op2 |= 0xffff0000;
+ }
+ SET_REGISTER(cpustate, rd, op2);
+ R15 += 2;
}
- /* Word Store w/ Immediate Offset */
+ /* Word Store w/ Immediate Offset */
const void tg06_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Store */
{
@@ -1063,7 +1063,7 @@ const void tg08_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Load */
R15 += 2;
}
- /* Stack-Relative Load/Store */
+ /* Stack-Relative Load/Store */
const void tg09_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Store */
{
@@ -1089,17 +1089,17 @@ const void tg09_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Load */
R15 += 2;
}
- /* Get relative address */
+ /* Get relative address */
const void tg0a_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, PC, #nn */
{
UINT32 rd;
INT32 offs;
- rd = (insn & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
- offs = (UINT8)(insn & THUMB_INSN_IMM) << 2;
- SET_REGISTER(cpustate, rd, ((R15 + 4) & ~2) + offs);
- R15 += 2;
+ rd = (insn & THUMB_RELADDR_RD) >> THUMB_RELADDR_RD_SHIFT;
+ offs = (UINT8)(insn & THUMB_INSN_IMM) << 2;
+ SET_REGISTER(cpustate, rd, ((R15 + 4) & ~2) + offs);
+ R15 += 2;
}
const void tg0a_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, SP, #nn */
@@ -1113,17 +1113,17 @@ const void tg0a_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD Rd, SP, #n
R15 += 2;
}
- /* Stack-Related Opcodes */
+ /* Stack-Related Opcodes */
const void tg0b_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* ADD SP, #imm */
{
UINT32 addr;
- addr = (insn & THUMB_INSN_IMM);
- addr &= ~THUMB_INSN_IMM_S;
- SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + ((insn & THUMB_INSN_IMM_S) ? -(addr << 2) : (addr << 2)));
- R15 += 2;
+ addr = (insn & THUMB_INSN_IMM);
+ addr &= ~THUMB_INSN_IMM_S;
+ SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + ((insn & THUMB_INSN_IMM_S) ? -(addr << 2) : (addr << 2)));
+ R15 += 2;
}
@@ -1132,8 +1132,8 @@ const void tg0b_1(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1142,8 +1142,8 @@ const void tg0b_2(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1152,8 +1152,8 @@ const void tg0b_3(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1161,15 +1161,15 @@ const void tg0b_4(arm_state *cpustate, UINT32 pc, UINT32 insn) /* PUSH {Rlist} *
{
INT32 offs;
- for (offs = 7; offs >= 0; offs--)
- {
- if (insn & (1 << offs))
- {
- SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) - 4);
- WRITE32(GET_REGISTER(cpustate, 13), GET_REGISTER(cpustate, offs));
- }
- }
- R15 += 2;
+ for (offs = 7; offs >= 0; offs--)
+ {
+ if (insn & (1 << offs))
+ {
+ SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) - 4);
+ WRITE32(GET_REGISTER(cpustate, 13), GET_REGISTER(cpustate, offs));
+ }
+ }
+ R15 += 2;
}
@@ -1177,17 +1177,17 @@ const void tg0b_5(arm_state *cpustate, UINT32 pc, UINT32 insn) /* PUSH {Rlist}{L
{
INT32 offs;
- SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) - 4);
- WRITE32(GET_REGISTER(cpustate, 13), GET_REGISTER(cpustate, 14));
- for (offs = 7; offs >= 0; offs--)
- {
- if (insn & (1 << offs))
- {
- SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) - 4);
- WRITE32(GET_REGISTER(cpustate, 13), GET_REGISTER(cpustate, offs));
- }
- }
- R15 += 2;
+ SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) - 4);
+ WRITE32(GET_REGISTER(cpustate, 13), GET_REGISTER(cpustate, 14));
+ for (offs = 7; offs >= 0; offs--)
+ {
+ if (insn & (1 << offs))
+ {
+ SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) - 4);
+ WRITE32(GET_REGISTER(cpustate, 13), GET_REGISTER(cpustate, offs));
+ }
+ }
+ R15 += 2;
}
@@ -1196,8 +1196,8 @@ const void tg0b_6(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1206,8 +1206,8 @@ const void tg0b_7(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1216,8 +1216,8 @@ const void tg0b_8(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1226,8 +1226,8 @@ const void tg0b_9(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1236,8 +1236,8 @@ const void tg0b_a(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1246,8 +1246,8 @@ const void tg0b_b(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1255,15 +1255,15 @@ const void tg0b_c(arm_state *cpustate, UINT32 pc, UINT32 insn) /* POP {Rlist} */
{
INT32 offs;
- for (offs = 0; offs < 8; offs++)
- {
- if (insn & (1 << offs))
- {
- SET_REGISTER(cpustate, offs, READ32(GET_REGISTER(cpustate, 13)));
- SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + 4);
- }
- }
- R15 += 2;
+ for (offs = 0; offs < 8; offs++)
+ {
+ if (insn & (1 << offs))
+ {
+ SET_REGISTER(cpustate, offs, READ32(GET_REGISTER(cpustate, 13)));
+ SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + 4);
+ }
+ }
+ R15 += 2;
}
@@ -1271,38 +1271,38 @@ const void tg0b_d(arm_state *cpustate, UINT32 pc, UINT32 insn) /* POP {Rlist}{PC
{
INT32 offs;
- for (offs = 0; offs < 8; offs++)
- {
- if (insn & (1 << offs))
- {
- SET_REGISTER(cpustate, offs, READ32(GET_REGISTER(cpustate, 13)));
- SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + 4);
- }
- }
- UINT32 addr = READ32(GET_REGISTER(cpustate, 13));
- // in v4T, bit 0 is ignored. v5 and later, it's an ARM/Thumb flag like the BX instruction
- if (cpustate->archRev < 5)
- {
- R15 = addr & ~1;
- }
- else
- {
- if (addr & 1)
- {
- addr &= ~1;
- }
- else
- {
- SET_CPSR(GET_CPSR & ~T_MASK);
- if (addr & 2)
- {
- addr += 2;
- }
- }
-
- R15 = addr;
- }
- SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + 4);
+ for (offs = 0; offs < 8; offs++)
+ {
+ if (insn & (1 << offs))
+ {
+ SET_REGISTER(cpustate, offs, READ32(GET_REGISTER(cpustate, 13)));
+ SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + 4);
+ }
+ }
+ UINT32 addr = READ32(GET_REGISTER(cpustate, 13));
+ // in v4T, bit 0 is ignored. v5 and later, it's an ARM/Thumb flag like the BX instruction
+ if (cpustate->archRev < 5)
+ {
+ R15 = addr & ~1;
+ }
+ else
+ {
+ if (addr & 1)
+ {
+ addr &= ~1;
+ }
+ else
+ {
+ SET_CPSR(GET_CPSR & ~T_MASK);
+ if (addr & 2)
+ {
+ addr += 2;
+ }
+ }
+
+ R15 = addr;
+ }
+ SET_REGISTER(cpustate, 13, GET_REGISTER(cpustate, 13) + 4);
}
@@ -1311,8 +1311,8 @@ const void tg0b_e(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1321,8 +1321,8 @@ const void tg0b_f(arm_state *cpustate, UINT32 pc, UINT32 insn)
// UINT32 addr;
// INT32 offs;
- fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Gb Undefined Thumb instruction: %04x\n", pc, insn);
+ R15 += 2;
}
@@ -1339,23 +1339,23 @@ const void tg0c_0(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Store */
UINT32 rd;
INT32 offs;
- UINT32 ld_st_address;
+ UINT32 ld_st_address;
- rd = (insn & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
+ rd = (insn & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
- ld_st_address = GET_REGISTER(cpustate, rd);
+ ld_st_address = GET_REGISTER(cpustate, rd);
- for (offs = 0; offs < 8; offs++)
- {
- if (insn & (1 << offs))
- {
- WRITE32(ld_st_address & ~3, GET_REGISTER(cpustate, offs));
- ld_st_address += 4;
- }
- }
- SET_REGISTER(cpustate, rd, ld_st_address);
- R15 += 2;
+ for (offs = 0; offs < 8; offs++)
+ {
+ if (insn & (1 << offs))
+ {
+ WRITE32(ld_st_address & ~3, GET_REGISTER(cpustate, offs));
+ ld_st_address += 4;
+ }
+ }
+ SET_REGISTER(cpustate, rd, ld_st_address);
+ R15 += 2;
}
@@ -1364,28 +1364,28 @@ const void tg0c_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* Load */
UINT32 rd;
INT32 offs;
- UINT32 ld_st_address;
+ UINT32 ld_st_address;
- rd = (insn & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
+ rd = (insn & THUMB_MULTLS_BASE) >> THUMB_MULTLS_BASE_SHIFT;
- ld_st_address = GET_REGISTER(cpustate, rd);
+ ld_st_address = GET_REGISTER(cpustate, rd);
- int rd_in_list;
+ int rd_in_list;
- rd_in_list = insn & (1 << rd);
- for (offs = 0; offs < 8; offs++)
- {
- if (insn & (1 << offs))
- {
- SET_REGISTER(cpustate, offs, READ32(ld_st_address & ~1));
- ld_st_address += 4;
- }
- }
+ rd_in_list = insn & (1 << rd);
+ for (offs = 0; offs < 8; offs++)
+ {
+ if (insn & (1 << offs))
+ {
+ SET_REGISTER(cpustate, offs, READ32(ld_st_address & ~1));
+ ld_st_address += 4;
+ }
+ }
if (!rd_in_list)
- SET_REGISTER(cpustate, rd, ld_st_address);
+ SET_REGISTER(cpustate, rd, ld_st_address);
R15 += 2;
}
@@ -1396,16 +1396,16 @@ const void tg0d_0(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_EQ:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (Z_IS_SET(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (Z_IS_SET(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1413,16 +1413,16 @@ const void tg0d_1(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_NE:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (Z_IS_CLEAR(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (Z_IS_CLEAR(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1430,16 +1430,16 @@ const void tg0d_2(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_CS:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (C_IS_SET(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (C_IS_SET(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1447,16 +1447,16 @@ const void tg0d_3(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_CC:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (C_IS_CLEAR(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (C_IS_CLEAR(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1464,16 +1464,16 @@ const void tg0d_4(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_MI:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (N_IS_SET(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (N_IS_SET(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1481,16 +1481,16 @@ const void tg0d_5(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_PL:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (N_IS_CLEAR(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (N_IS_CLEAR(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1498,16 +1498,16 @@ const void tg0d_6(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_VS:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (V_IS_SET(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (V_IS_SET(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1515,16 +1515,16 @@ const void tg0d_7(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_VC:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (V_IS_CLEAR(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (V_IS_CLEAR(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1532,16 +1532,16 @@ const void tg0d_8(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_HI:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (C_IS_SET(GET_CPSR) && Z_IS_CLEAR(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (C_IS_SET(GET_CPSR) && Z_IS_CLEAR(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1549,16 +1549,16 @@ const void tg0d_9(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_LS:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (C_IS_CLEAR(GET_CPSR) || Z_IS_SET(GET_CPSR))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (C_IS_CLEAR(GET_CPSR) || Z_IS_SET(GET_CPSR))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1566,16 +1566,16 @@ const void tg0d_a(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_GE:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (!(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (!(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1583,16 +1583,16 @@ const void tg0d_b(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_LT:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (!(GET_CPSR & N_MASK) != !(GET_CPSR & V_MASK))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (!(GET_CPSR & N_MASK) != !(GET_CPSR & V_MASK))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1600,16 +1600,16 @@ const void tg0d_c(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_GT:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (Z_IS_CLEAR(GET_CPSR) && !(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (Z_IS_CLEAR(GET_CPSR) && !(GET_CPSR & N_MASK) == !(GET_CPSR & V_MASK))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1617,16 +1617,16 @@ const void tg0d_d(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_LE:
{
INT32 offs;
- offs = (INT8)(insn & THUMB_INSN_IMM);
+ offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- if (Z_IS_SET(GET_CPSR) || !(GET_CPSR & N_MASK) != !(GET_CPSR & V_MASK))
- {
- R15 += 4 + (offs << 1);
- }
- else
- {
- R15 += 2;
- }
+ if (Z_IS_SET(GET_CPSR) || !(GET_CPSR & N_MASK) != !(GET_CPSR & V_MASK))
+ {
+ R15 += 4 + (offs << 1);
+ }
+ else
+ {
+ R15 += 2;
+ }
}
@@ -1636,8 +1636,8 @@ const void tg0d_e(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_AL:
// offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- fatalerror("%08x: Undefined Thumb instruction: %04x (ARM9 reserved)\n", pc, insn);
- R15 += 2;
+ fatalerror("%08x: Undefined Thumb instruction: %04x (ARM9 reserved)\n", pc, insn);
+ R15 += 2;
}
@@ -1648,23 +1648,23 @@ const void tg0d_f(arm_state *cpustate, UINT32 pc, UINT32 insn) // COND_NV: //
// offs = (INT8)(insn & THUMB_INSN_IMM);
//case
- cpustate->pendingSwi = 1;
- ARM7_CHECKIRQ;
+ cpustate->pendingSwi = 1;
+ ARM7_CHECKIRQ;
}
- /* B #offs */
+ /* B #offs */
const void tg0e_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
{
INT32 offs;
- offs = (insn & THUMB_BRANCH_OFFS) << 1;
- if (offs & 0x00000800)
- {
- offs |= 0xfffff800;
- }
- R15 += 4 + offs;
+ offs = (insn & THUMB_BRANCH_OFFS) << 1;
+ if (offs & 0x00000800)
+ {
+ offs |= 0xfffff800;
+ }
+ R15 += 4 + offs;
}
@@ -1672,27 +1672,27 @@ const void tg0e_1(arm_state *cpustate, UINT32 pc, UINT32 insn)
{
UINT32 addr;
- addr = GET_REGISTER(cpustate, 14);
- addr += (insn & THUMB_BLOP_OFFS) << 1;
- addr &= 0xfffffffc;
- SET_REGISTER(cpustate, 14, (R15 + 4) | 1);
- R15 = addr;
+ addr = GET_REGISTER(cpustate, 14);
+ addr += (insn & THUMB_BLOP_OFFS) << 1;
+ addr &= 0xfffffffc;
+ SET_REGISTER(cpustate, 14, (R15 + 4) | 1);
+ R15 = addr;
}
- /* BL */
+ /* BL */
const void tg0f_0(arm_state *cpustate, UINT32 pc, UINT32 insn)
{
UINT32 addr;
- addr = (insn & THUMB_BLOP_OFFS) << 12;
- if (addr & (1 << 22))
- {
- addr |= 0xff800000;
- }
- addr += R15 + 4;
- SET_REGISTER(cpustate, 14, addr);
- R15 += 2;
+ addr = (insn & THUMB_BLOP_OFFS) << 12;
+ if (addr & (1 << 22))
+ {
+ addr |= 0xff800000;
+ }
+ addr += R15 + 4;
+ SET_REGISTER(cpustate, 14, addr);
+ R15 += 2;
}
@@ -1700,9 +1700,9 @@ const void tg0f_1(arm_state *cpustate, UINT32 pc, UINT32 insn) /* BL */
{
UINT32 addr;
- addr = GET_REGISTER(cpustate, 14) & ~1;
- addr += (insn & THUMB_BLOP_OFFS) << 1;
- SET_REGISTER(cpustate, 14, (R15 + 2) | 1);
- R15 = addr;
- //R15 += 2;
+ addr = GET_REGISTER(cpustate, 14) & ~1;
+ addr += (insn & THUMB_BLOP_OFFS) << 1;
+ SET_REGISTER(cpustate, 14, (R15 + 2) | 1);
+ R15 = addr;
+ //R15 += 2;
}
diff --git a/src/emu/cpu/arm7/arm7thmb.h b/src/emu/cpu/arm7/arm7thmb.h
index 352e566f46d..c50ce1c2b8d 100644
--- a/src/emu/cpu/arm7/arm7thmb.h
+++ b/src/emu/cpu/arm7/arm7thmb.h
@@ -101,4 +101,3 @@ const void tg0e_0(arm_state *cpustate, UINT32 pc, UINT32 insn);
const void tg0e_1(arm_state *cpustate, UINT32 pc, UINT32 insn);
const void tg0f_0(arm_state *cpustate, UINT32 pc, UINT32 insn);
const void tg0f_1(arm_state *cpustate, UINT32 pc, UINT32 insn);
-
diff --git a/src/emu/cpu/asap/asap.c b/src/emu/cpu/asap/asap.c
index 2487321cb01..ee133856630 100644
--- a/src/emu/cpu/asap/asap.c
+++ b/src/emu/cpu/asap/asap.c
@@ -49,19 +49,19 @@
// CONSTANTS
//**************************************************************************
-const UINT32 PS_CFLAG = 0x00000001;
-const UINT32 PS_VFLAG = 0x00000002;
-const UINT32 PS_ZFLAG = 0x00000004;
-const UINT32 PS_NFLAG = 0x00000008;
-const UINT32 PS_IFLAG = 0x00000010;
-const UINT32 PS_PFLAG = 0x00000020;
+const UINT32 PS_CFLAG = 0x00000001;
+const UINT32 PS_VFLAG = 0x00000002;
+const UINT32 PS_ZFLAG = 0x00000004;
+const UINT32 PS_NFLAG = 0x00000008;
+const UINT32 PS_IFLAG = 0x00000010;
+const UINT32 PS_PFLAG = 0x00000020;
-const int EXCEPTION_RESET = 0;
-const int EXCEPTION_TRAP0 = 1;
-const int EXCEPTION_TRAPF = 2;
-const int EXCEPTION_INTERRUPT = 3;
+const int EXCEPTION_RESET = 0;
+const int EXCEPTION_TRAP0 = 1;
+const int EXCEPTION_TRAPF = 2;
+const int EXCEPTION_INTERRUPT = 3;
-const int REGBASE = 0xffe0;
+const int REGBASE = 0xffe0;
@@ -69,25 +69,25 @@ const int REGBASE = 0xffe0;
// MACROS
//**************************************************************************
-#define SET_C_ADD(a,b) (m_cflag = (UINT32)(b) > (UINT32)(~(a)))
-#define SET_C_SUB(a,b) (m_cflag = (UINT32)(b) <= (UINT32)(a))
-#define SET_V_ADD(r,a,b) (m_vflag = ~((a) ^ (b)) & ((a) ^ (r)))
-#define SET_V_SUB(r,a,b) (m_vflag = ((a) ^ (b)) & ((a) ^ (r)))
-#define SET_ZN(r) (m_znflag = (r))
-#define SET_ZNCV_ADD(r,a,b) SET_ZN(r); SET_C_ADD(a,b); SET_V_ADD(r,a,b)
-#define SET_ZNCV_SUB(r,a,b) SET_ZN(r); SET_C_SUB(a,b); SET_V_SUB(r,a,b)
-
-#define SET_VFLAG(val) (m_vflag = (val) << 31)
-#define SET_CFLAG(val) (m_cflag = (val))
-
-#define GET_FLAGS() (m_cflag | \
- ((m_vflag >> 30) & PS_VFLAG) | \
- ((m_znflag == 0) << 2) | \
- ((m_znflag >> 28) & PS_NFLAG) | \
- (m_iflag << 4) | \
- (m_pflag << 5))
-
-#define SET_FLAGS(v) do { \
+#define SET_C_ADD(a,b) (m_cflag = (UINT32)(b) > (UINT32)(~(a)))
+#define SET_C_SUB(a,b) (m_cflag = (UINT32)(b) <= (UINT32)(a))
+#define SET_V_ADD(r,a,b) (m_vflag = ~((a) ^ (b)) & ((a) ^ (r)))
+#define SET_V_SUB(r,a,b) (m_vflag = ((a) ^ (b)) & ((a) ^ (r)))
+#define SET_ZN(r) (m_znflag = (r))
+#define SET_ZNCV_ADD(r,a,b) SET_ZN(r); SET_C_ADD(a,b); SET_V_ADD(r,a,b)
+#define SET_ZNCV_SUB(r,a,b) SET_ZN(r); SET_C_SUB(a,b); SET_V_SUB(r,a,b)
+
+#define SET_VFLAG(val) (m_vflag = (val) << 31)
+#define SET_CFLAG(val) (m_cflag = (val))
+
+#define GET_FLAGS() (m_cflag | \
+ ((m_vflag >> 30) & PS_VFLAG) | \
+ ((m_znflag == 0) << 2) | \
+ ((m_znflag >> 28) & PS_NFLAG) | \
+ (m_iflag << 4) | \
+ (m_pflag << 5))
+
+#define SET_FLAGS(v) do { \
m_cflag = (v) & PS_CFLAG; \
m_vflag = ((v) & PS_VFLAG) << 30; \
m_znflag = ((v) & PS_ZFLAG) ? 0 : ((v) & PS_NFLAG) ? -1 : 1; \
@@ -95,12 +95,12 @@ const int REGBASE = 0xffe0;
m_pflag = ((v) & PS_PFLAG) >> 5; \
} while (0);
-#define OPCODE (m_op >> 27)
-#define DSTREG ((m_op >> 22) & 31)
-#define DSTVAL m_src2val[REGBASE + DSTREG]
-#define SRC1REG ((m_op >> 16) & 31)
-#define SRC1VAL m_src2val[REGBASE + SRC1REG]
-#define SRC2VAL m_src2val[m_op & 0xffff]
+#define OPCODE (m_op >> 27)
+#define DSTREG ((m_op >> 22) & 31)
+#define DSTVAL m_src2val[REGBASE + DSTREG]
+#define SRC1REG ((m_op >> 16) & 31)
+#define SRC1VAL m_src2val[REGBASE + SRC1REG]
+#define SRC2VAL m_src2val[m_op & 0xffff]
@@ -110,38 +110,38 @@ const int REGBASE = 0xffe0;
const asap_device::ophandler asap_device::s_opcodetable[32][4] =
{
- { &asap_device::trap0, &asap_device::trap0, &asap_device::trap0, &asap_device::trap0 },
- { &asap_device::noop, &asap_device::noop, &asap_device::noop, &asap_device::noop },
- { &asap_device::bsr, &asap_device::bsr_0, &asap_device::bsr, &asap_device::bsr_0 },
- { &asap_device::lea, &asap_device::noop, &asap_device::lea_c, &asap_device::lea_c0 },
- { &asap_device::leah, &asap_device::noop, &asap_device::leah_c, &asap_device::leah_c0 },
- { &asap_device::subr, &asap_device::noop, &asap_device::subr_c, &asap_device::subr_c0 },
- { &asap_device::xor_, &asap_device::noop, &asap_device::xor_c, &asap_device::xor_c0 },
- { &asap_device::xorn, &asap_device::noop, &asap_device::xorn_c, &asap_device::xorn_c0 },
- { &asap_device::add, &asap_device::noop, &asap_device::add_c, &asap_device::add_c0 },
- { &asap_device::sub, &asap_device::noop, &asap_device::sub_c, &asap_device::sub_c0 },
- { &asap_device::addc, &asap_device::noop, &asap_device::addc_c, &asap_device::addc_c0 },
- { &asap_device::subc, &asap_device::noop, &asap_device::subc_c, &asap_device::subc_c0 },
- { &asap_device::and_, &asap_device::noop, &asap_device::and_c, &asap_device::and_c0 },
- { &asap_device::andn, &asap_device::noop, &asap_device::andn_c, &asap_device::andn_c0 },
- { &asap_device::or_, &asap_device::noop, &asap_device::or_c, &asap_device::or_c0 },
- { &asap_device::orn, &asap_device::noop, &asap_device::orn_c, &asap_device::orn_c0 },
- { &asap_device::ld, &asap_device::ld_0, &asap_device::ld_c, &asap_device::ld_c0 },
- { &asap_device::ldh, &asap_device::ldh_0, &asap_device::ldh_c, &asap_device::ldh_c0 },
- { &asap_device::lduh, &asap_device::lduh_0, &asap_device::lduh_c, &asap_device::lduh_c0 },
- { &asap_device::sth, &asap_device::sth_0, &asap_device::sth_c, &asap_device::sth_c0 },
- { &asap_device::st, &asap_device::st_0, &asap_device::st_c, &asap_device::st_c0 },
- { &asap_device::ldb, &asap_device::ldb_0, &asap_device::ldb_c, &asap_device::ldb_c0 },
- { &asap_device::ldub, &asap_device::ldub_0, &asap_device::ldub_c, &asap_device::ldub_c0 },
- { &asap_device::stb, &asap_device::stb_0, &asap_device::stb_c, &asap_device::stb_c0 },
- { &asap_device::ashr, &asap_device::noop, &asap_device::ashr_c, &asap_device::ashr_c0 },
- { &asap_device::lshr, &asap_device::noop, &asap_device::lshr_c, &asap_device::lshr_c0 },
- { &asap_device::ashl, &asap_device::noop, &asap_device::ashl_c, &asap_device::ashl_c0 },
- { &asap_device::rotl, &asap_device::noop, &asap_device::rotl_c, &asap_device::rotl_c0 },
- { &asap_device::getps, &asap_device::noop, &asap_device::getps, &asap_device::noop },
- { &asap_device::putps, &asap_device::putps, &asap_device::putps, &asap_device::putps },
- { &asap_device::jsr, &asap_device::jsr_0, &asap_device::jsr_c, &asap_device::jsr_c0 },
- { &asap_device::trapf, &asap_device::trapf, &asap_device::trapf, &asap_device::trapf }
+ { &asap_device::trap0, &asap_device::trap0, &asap_device::trap0, &asap_device::trap0 },
+ { &asap_device::noop, &asap_device::noop, &asap_device::noop, &asap_device::noop },
+ { &asap_device::bsr, &asap_device::bsr_0, &asap_device::bsr, &asap_device::bsr_0 },
+ { &asap_device::lea, &asap_device::noop, &asap_device::lea_c, &asap_device::lea_c0 },
+ { &asap_device::leah, &asap_device::noop, &asap_device::leah_c, &asap_device::leah_c0 },
+ { &asap_device::subr, &asap_device::noop, &asap_device::subr_c, &asap_device::subr_c0 },
+ { &asap_device::xor_, &asap_device::noop, &asap_device::xor_c, &asap_device::xor_c0 },
+ { &asap_device::xorn, &asap_device::noop, &asap_device::xorn_c, &asap_device::xorn_c0 },
+ { &asap_device::add, &asap_device::noop, &asap_device::add_c, &asap_device::add_c0 },
+ { &asap_device::sub, &asap_device::noop, &asap_device::sub_c, &asap_device::sub_c0 },
+ { &asap_device::addc, &asap_device::noop, &asap_device::addc_c, &asap_device::addc_c0 },
+ { &asap_device::subc, &asap_device::noop, &asap_device::subc_c, &asap_device::subc_c0 },
+ { &asap_device::and_, &asap_device::noop, &asap_device::and_c, &asap_device::and_c0 },
+ { &asap_device::andn, &asap_device::noop, &asap_device::andn_c, &asap_device::andn_c0 },
+ { &asap_device::or_, &asap_device::noop, &asap_device::or_c, &asap_device::or_c0 },
+ { &asap_device::orn, &asap_device::noop, &asap_device::orn_c, &asap_device::orn_c0 },
+ { &asap_device::ld, &asap_device::ld_0, &asap_device::ld_c, &asap_device::ld_c0 },
+ { &asap_device::ldh, &asap_device::ldh_0, &asap_device::ldh_c, &asap_device::ldh_c0 },
+ { &asap_device::lduh, &asap_device::lduh_0, &asap_device::lduh_c, &asap_device::lduh_c0 },
+ { &asap_device::sth, &asap_device::sth_0, &asap_device::sth_c, &asap_device::sth_c0 },
+ { &asap_device::st, &asap_device::st_0, &asap_device::st_c, &asap_device::st_c0 },
+ { &asap_device::ldb, &asap_device::ldb_0, &asap_device::ldb_c, &asap_device::ldb_c0 },
+ { &asap_device::ldub, &asap_device::ldub_0, &asap_device::ldub_c, &asap_device::ldub_c0 },
+ { &asap_device::stb, &asap_device::stb_0, &asap_device::stb_c, &asap_device::stb_c0 },
+ { &asap_device::ashr, &asap_device::noop, &asap_device::ashr_c, &asap_device::ashr_c0 },
+ { &asap_device::lshr, &asap_device::noop, &asap_device::lshr_c, &asap_device::lshr_c0 },
+ { &asap_device::ashl, &asap_device::noop, &asap_device::ashl_c, &asap_device::ashl_c0 },
+ { &asap_device::rotl, &asap_device::noop, &asap_device::rotl_c, &asap_device::rotl_c0 },
+ { &asap_device::getps, &asap_device::noop, &asap_device::getps, &asap_device::noop },
+ { &asap_device::putps, &asap_device::putps, &asap_device::putps, &asap_device::putps },
+ { &asap_device::jsr, &asap_device::jsr_0, &asap_device::jsr_c, &asap_device::jsr_c0 },
+ { &asap_device::trapf, &asap_device::trapf, &asap_device::trapf, &asap_device::trapf }
};
const asap_device::ophandler asap_device::s_conditiontable[16] =
@@ -167,21 +167,21 @@ const device_type ASAP = &device_creator<asap_device>;
asap_device::asap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, ASAP, "ASAP", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 32, 32),
- m_pc(0),
- m_pflag(0),
- m_iflag(0),
- m_cflag(0),
- m_vflag(0),
- m_znflag(0),
- m_flagsio(0),
- m_op(0),
- m_ppc(0),
- m_nextpc(0),
- m_irq_state(0),
- m_icount(0),
- m_program(NULL),
- m_direct(NULL)
+ m_program_config("program", ENDIANNESS_LITTLE, 32, 32),
+ m_pc(0),
+ m_pflag(0),
+ m_iflag(0),
+ m_cflag(0),
+ m_vflag(0),
+ m_znflag(0),
+ m_flagsio(0),
+ m_op(0),
+ m_ppc(0),
+ m_nextpc(0),
+ m_irq_state(0),
+ m_icount(0),
+ m_program(NULL),
+ m_direct(NULL)
{
// initialize the src2val table to contain immediates for low values
for (int i = 0; i < REGBASE; i++)
diff --git a/src/emu/cpu/asap/asap.h b/src/emu/cpu/asap/asap.h
index 8728470579e..f402a7b66ec 100644
--- a/src/emu/cpu/asap/asap.h
+++ b/src/emu/cpu/asap/asap.h
@@ -213,33 +213,33 @@ protected:
void trapf();
// internal state
- const address_space_config m_program_config;
- UINT32 m_pc;
+ const address_space_config m_program_config;
+ UINT32 m_pc;
// expanded flags
- UINT32 m_pflag;
- UINT32 m_iflag;
- UINT32 m_cflag;
- UINT32 m_vflag;
- UINT32 m_znflag;
- UINT32 m_flagsio;
+ UINT32 m_pflag;
+ UINT32 m_iflag;
+ UINT32 m_cflag;
+ UINT32 m_vflag;
+ UINT32 m_znflag;
+ UINT32 m_flagsio;
// internal stuff
- UINT32 m_op;
- UINT32 m_ppc;
- UINT32 m_nextpc;
- UINT8 m_irq_state;
- int m_icount;
- address_space * m_program;
- direct_read_data * m_direct;
+ UINT32 m_op;
+ UINT32 m_ppc;
+ UINT32 m_nextpc;
+ UINT8 m_irq_state;
+ int m_icount;
+ address_space * m_program;
+ direct_read_data * m_direct;
// src2val table, registers are at the end
- UINT32 m_src2val[65536];
+ UINT32 m_src2val[65536];
// opcode/condition tables
typedef void (asap_device::*ophandler)();
- ophandler m_opcode[32 * 32 * 2];
+ ophandler m_opcode[32 * 32 * 2];
static const ophandler s_opcodetable[32][4];
static const ophandler s_conditiontable[16];
diff --git a/src/emu/cpu/asap/asapdasm.c b/src/emu/cpu/asap/asapdasm.c
index d88ad7b3a6f..a58e01ad64b 100644
--- a/src/emu/cpu/asap/asapdasm.c
+++ b/src/emu/cpu/asap/asapdasm.c
@@ -12,10 +12,10 @@
static const char *const reg[32] =
{
- "0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ "0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
};
static const char *const setcond[2] =
@@ -56,9 +56,9 @@ CPU_DISASSEMBLE( asap )
switch (opcode)
{
- case 0x00: sprintf(buffer, "trap $00"); flags = DASMFLAG_STEP_OVER; break;
- case 0x01: sprintf(buffer, "b%s $%08x", condition[rdst & 15], pc + ((INT32)(op << 10) >> 8)); break;
- case 0x02: if ((op & 0x003fffff) == 3)
+ case 0x00: sprintf(buffer, "trap $00"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x01: sprintf(buffer, "b%s $%08x", condition[rdst & 15], pc + ((INT32)(op << 10) >> 8)); break;
+ case 0x02: if ((op & 0x003fffff) == 3)
{
UINT32 nextop = oprom[4] | (oprom[5] << 8) | (oprom[6] << 16) | (oprom[7] << 24);
if ((nextop >> 27) == 0x10 && ((nextop >> 22) & 31) == rdst && (nextop & 0xffff) == 0)
@@ -76,48 +76,48 @@ CPU_DISASSEMBLE( asap )
else
sprintf(buffer, "bra $%08x", pc + ((INT32)(op << 10) >> 8));
break;
- case 0x03: sprintf(buffer, "lea%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break;
- case 0x04: sprintf(buffer, "leah%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
- case 0x05: sprintf(buffer, "subr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x06: sprintf(buffer, "xor%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x07: sprintf(buffer, "xorn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x08: if (!rsrc1 && !rdst && rsrc2_iszero)
+ case 0x03: sprintf(buffer, "lea%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break;
+ case 0x04: sprintf(buffer, "leah%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
+ case 0x05: sprintf(buffer, "subr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x06: sprintf(buffer, "xor%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x07: sprintf(buffer, "xorn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x08: if (!rsrc1 && !rdst && rsrc2_iszero)
sprintf(buffer, "nop");
else if (!rsrc1)
sprintf(buffer, "mov%s %s,%s", setcond[cond], src2(op,0), reg[rdst]);
else if (rsrc2_iszero)
sprintf(buffer, "mov%s %s,%s", setcond[cond], reg[rsrc1], reg[rdst]);
else
- sprintf(buffer, "add%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x09: sprintf(buffer, "sub%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x0a: sprintf(buffer, "addc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x0b: sprintf(buffer, "subc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x0c: sprintf(buffer, "and%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x0d: sprintf(buffer, "andn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x0e: if (!rsrc1 && !rdst && rsrc2_iszero)
+ sprintf(buffer, "add%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x09: sprintf(buffer, "sub%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x0a: sprintf(buffer, "addc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x0b: sprintf(buffer, "subc%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x0c: sprintf(buffer, "and%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x0d: sprintf(buffer, "andn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x0e: if (!rsrc1 && !rdst && rsrc2_iszero)
sprintf(buffer, "nop");
else if (!rsrc1)
sprintf(buffer, "mov%s %s,%s", setcond[cond], src2(op,0), reg[rdst]);
else if (rsrc2_iszero)
sprintf(buffer, "mov%s %s,%s", setcond[cond], reg[rsrc1], reg[rdst]);
else
- sprintf(buffer, "or%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x0f: sprintf(buffer, "orn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x10: sprintf(buffer, "ld%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break;
- case 0x11: sprintf(buffer, "ldh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
- case 0x12: sprintf(buffer, "lduh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
- case 0x13: sprintf(buffer, "sth%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
- case 0x14: sprintf(buffer, "st%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break;
- case 0x15: sprintf(buffer, "ldb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x16: sprintf(buffer, "ldub%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x17: sprintf(buffer, "stb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x18: sprintf(buffer, "ashr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x19: sprintf(buffer, "lshr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x1a: sprintf(buffer, "ashl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x1b: sprintf(buffer, "rotl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
- case 0x1c: sprintf(buffer, "getps %s", reg[rdst]); break;
- case 0x1d: sprintf(buffer, "putps %s", src2(op,0)); break;
- case 0x1e: if (rdst && rsrc2_iszero)
+ sprintf(buffer, "or%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x0f: sprintf(buffer, "orn%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x10: sprintf(buffer, "ld%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break;
+ case 0x11: sprintf(buffer, "ldh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
+ case 0x12: sprintf(buffer, "lduh%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
+ case 0x13: sprintf(buffer, "sth%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,1), reg[rdst]); break;
+ case 0x14: sprintf(buffer, "st%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,2), reg[rdst]); break;
+ case 0x15: sprintf(buffer, "ldb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x16: sprintf(buffer, "ldub%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x17: sprintf(buffer, "stb%s %s[%s],%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x18: sprintf(buffer, "ashr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x19: sprintf(buffer, "lshr%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x1a: sprintf(buffer, "ashl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x1b: sprintf(buffer, "rotl%s %s,%s,%s", setcond[cond], reg[rsrc1], src2(op,0), reg[rdst]); break;
+ case 0x1c: sprintf(buffer, "getps %s", reg[rdst]); break;
+ case 0x1d: sprintf(buffer, "putps %s", src2(op,0)); break;
+ case 0x1e: if (rdst && rsrc2_iszero)
{
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
sprintf(buffer, "jsr%s %s,%s", setcond[cond], reg[rdst], reg[rsrc1]);
@@ -136,7 +136,7 @@ CPU_DISASSEMBLE( asap )
else
sprintf(buffer, "jmp%s %s[%s]", setcond[cond], reg[rsrc1], src2(op,2));
break;
- case 0x1f: sprintf(buffer, "trap $1f"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x1f: sprintf(buffer, "trap $1f"); flags = DASMFLAG_STEP_OVER; break;
}
return 4 | flags | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/avr8/avr8.c b/src/emu/cpu/avr8/avr8.c
index 10aefec61aa..9a271fcab55 100644
--- a/src/emu/cpu/avr8/avr8.c
+++ b/src/emu/cpu/avr8/avr8.c
@@ -39,7 +39,7 @@
#include "debugger.h"
#include "avr8.h"
-#define VERBOSE_LEVEL (0)
+#define VERBOSE_LEVEL (0)
#define ENABLE_VERBOSE_LOG (0)
@@ -66,14 +66,14 @@ INLINE void verboselog(UINT16 pc, int n_level, const char *s_fmt, ...)
enum
{
- AVR8_SREG_C = 0,
- AVR8_SREG_Z,
- AVR8_SREG_N,
- AVR8_SREG_V,
- AVR8_SREG_S,
- AVR8_SREG_H,
- AVR8_SREG_T,
- AVR8_SREG_I,
+ AVR8_SREG_C = 0,
+ AVR8_SREG_Z,
+ AVR8_SREG_N,
+ AVR8_SREG_V,
+ AVR8_SREG_S,
+ AVR8_SREG_H,
+ AVR8_SREG_T,
+ AVR8_SREG_I,
};
// I/O Enums
@@ -131,181 +131,181 @@ static const char avr8_reg_name[4] = { 'A', 'B', 'C', 'D' };
#define QCONST6(op) ((((op) >> 8) & 0x0020) | (((op) >> 7) & 0x0018) | ((op) & 0x0007))
#define ACONST5(op) (((op) >> 3) & 0x001f)
#define ACONST6(op) ((((op) >> 5) & 0x0030) | ((op) & 0x000f))
-#define MULCONST2(op) ((((op) >> 6) & 0x0002) | (((op) >> 3) & 0x0001))
+#define MULCONST2(op) ((((op) >> 6) & 0x0002) | (((op) >> 3) & 0x0001))
// Register Defines
#define XREG ((m_r[27] << 8) | m_r[26])
#define YREG ((m_r[29] << 8) | m_r[28])
#define ZREG ((m_r[31] << 8) | m_r[30])
-#define SPREG ((m_r[AVR8_REGIDX_SPH] << 8) | m_r[AVR8_REGIDX_SPL])
+#define SPREG ((m_r[AVR8_REGIDX_SPH] << 8) | m_r[AVR8_REGIDX_SPL])
// I/O Defines
-#define AVR8_OCR1BH (m_r[AVR8_REGIDX_OCR1BH])
-#define AVR8_OCR1BL (m_r[AVR8_REGIDX_OCR1BL])
-#define AVR8_OCR1AH (m_r[AVR8_REGIDX_OCR1AH])
-#define AVR8_OCR1AL (m_r[AVR8_REGIDX_OCR1AL])
-#define AVR8_ICR1H (m_r[AVR8_REGIDX_ICR1H])
-#define AVR8_ICR1L (m_r[AVR8_REGIDX_ICR1L])
-#define AVR8_TCNT1H (m_r[AVR8_REGIDX_TCNT1H])
-#define AVR8_TCNT1L (m_r[AVR8_REGIDX_TCNT1L])
-
-#define AVR8_TCCR0B (m_r[AVR8_REGIDX_TCCR0B])
-#define AVR8_TCCR0B_FOC0A_MASK 0x80
-#define AVR8_TCCR0B_FOC0A_SHIFT 7
-#define AVR8_TCCR0B_FOC0B_MASK 0x40
-#define AVR8_TCCR0B_FOC0B_SHIFT 6
-#define AVR8_TCCR0B_WGM0_2_MASK 0x08
-#define AVR8_TCCR0B_WGM0_2_SHIFT 3
-#define AVR8_TCCR0B_CS_MASK 0x07
-#define AVR8_TCCR0B_CS_SHIFT 0
-#define AVR8_TIMER0_CLOCK_SELECT (AVR8_TCCR0B & AVR8_TCCR0B_CS_MASK)
-
-#define AVR8_TCCR0A (m_r[AVR8_REGIDX_TCCR0A])
-#define AVR8_TCCR0A_COM0A_MASK 0xc0
-#define AVR8_TCCR0A_COM0A_SHIFT 6
-#define AVR8_TCCR0A_COM0B_MASK 0x30
-#define AVR8_TCCR0A_COM0B_SHIFT 4
-#define AVR8_TCCR0A_WGM0_10_MASK 0x03
-#define AVR8_TCCR0A_WGM0_10_SHIFT 0
-#define AVR8_TCCR0A_COM0A ((AVR8_TCCR0A & AVR8_TCCR0A_COM0A_MASK) >> AVR8_TCCR0A_COM0A_SHIFT)
-#define AVR8_TCCR0A_COM0B ((AVR8_TCCR0A & AVR8_TCCR0A_COM0B_MASK) >> AVR8_TCCR0A_COM0B_SHIFT)
-#define AVR8_TCCR0A_WGM0_10 (AVR8_TCCR0A & AVR8_TCCR0A_WGM0_10_MASK)
-
-#define AVR8_TIMSK0 (m_r[AVR8_REGIDX_TIMSK0])
-#define AVR8_TIMSK0_OCIE0B_MASK 0x04
-#define AVR8_TIMSK0_OCIE0A_MASK 0x02
-#define AVR8_TIMSK0_TOIE0_MASK 0x01
-#define AVR8_TIMSK0_OCIE0B ((AVR8_TIMSK0 & AVR8_TIMSK0_OCIE0B_MASK) >> 2)
-#define AVR8_TIMSK0_OCIE0A ((AVR8_TIMSK0 & AVR8_TIMSK0_OCIE0A_MASK) >> 1)
-#define AVR8_TIMSK0_TOIE0 (AVR8_TIMSK0 & AVR8_TIMSK0_TOIE0_MASK)
-
-#define AVR8_TIFR0 (m_r[AVR8_REGIDX_TIFR0])
-#define AVR8_TIFR0_OCF0B_MASK 0x04
-#define AVR8_TIFR0_OCF0B_SHIFT 2
-#define AVR8_TIFR0_OCF0A_MASK 0x02
-#define AVR8_TIFR0_OCF0A_SHIFT 1
-#define AVR8_TIFR0_TOV0_MASK 0x01
-#define AVR8_TIFR0_TOV0_SHIFT 0
-#define AVR8_TIFR0_MASK (AVR8_TIFR0_TOV0_MASK | AVR8_TIFR0_OCF0B_MASK | AVR8_TIFR0_OCF0A_MASK)
-
-#define AVR8_TCCR1B (m_r[AVR8_REGIDX_TCCR1B])
-#define AVR8_TCCR1B_ICNC1_MASK 0x80
-#define AVR8_TCCR1B_ICNC1_SHIFT 7
-#define AVR8_TCCR1B_ICES1_MASK 0x40
-#define AVR8_TCCR1B_ICES1_SHIFT 6
-#define AVR8_TCCR1B_WGM1_32_MASK 0x18
-#define AVR8_TCCR1B_WGM1_32_SHIFT 3
-#define AVR8_TCCR1B_CS_MASK 0x07
-#define AVR8_TCCR1B_CS_SHIFT 0
-#define AVR8_TIMER1_CLOCK_SELECT (AVR8_TCCR1B & AVR8_TCCR1B_CS_MASK)
-
-#define AVR8_TCCR1A (m_r[AVR8_REGIDX_TCCR1A])
-#define AVR8_TCCR1A_COM1A_MASK 0xc0
-#define AVR8_TCCR1A_COM1A_SHIFT 6
-#define AVR8_TCCR1A_COM1B_MASK 0x30
-#define AVR8_TCCR1A_COM1B_SHIFT 4
-#define AVR8_TCCR1A_WGM1_10_MASK 0x03
-#define AVR8_TCCR1A_WGM1_10_SHIFT 0
-#define AVR8_TCCR1A_COM1A ((AVR8_TCCR1A & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT)
-#define AVR8_TCCR1A_COM1B ((AVR8_TCCR1A & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT)
-#define AVR8_TCCR1A_WGM1_10 (AVR8_TCCR1A & AVR8_TCCR1A_WGM1_10_MASK)
-
-#define AVR8_TIMSK1 (m_r[AVR8_REGIDX_TIMSK1])
-#define AVR8_TIMSK1_ICIE1_MASK 0x20
-#define AVR8_TIMSK1_OCIE1B_MASK 0x04
-#define AVR8_TIMSK1_OCIE1A_MASK 0x02
-#define AVR8_TIMSK1_TOIE1_MASK 0x01
-#define AVR8_TIMSK1_ICIE1 ((AVR8_TIMSK1 & AVR8_TIMSK1_ICIE1_MASK) >> 5)
-#define AVR8_TIMSK1_OCIE1B ((AVR8_TIMSK1 & AVR8_TIMSK1_OCIE1B_MASK) >> 2)
-#define AVR8_TIMSK1_OCIE1A ((AVR8_TIMSK1 & AVR8_TIMSK1_OCIE1A_MASK) >> 1)
-#define AVR8_TIMSK1_TOIE1 (AVR8_TIMSK1 & AVR8_TIMSK1_TOIE1_MASK)
-
-#define AVR8_TIFR1 (m_r[AVR8_REGIDX_TIFR1])
-#define AVR8_TIFR1_ICF1_MASK 0x20
-#define AVR8_TIFR1_ICF1_SHIFT 5
-#define AVR8_TIFR1_OCF1B_MASK 0x04
-#define AVR8_TIFR1_OCF1B_SHIFT 2
-#define AVR8_TIFR1_OCF1A_MASK 0x02
-#define AVR8_TIFR1_OCF1A_SHIFT 1
-#define AVR8_TIFR1_TOV1_MASK 0x01
-#define AVR8_TIFR1_TOV1_SHIFT 0
-#define AVR8_TIFR1_MASK (AVR8_TIFR1_ICF1_MASK | AVR8_TIFR1_TOV1_MASK | \
- AVR8_TIFR1_OCF1B_MASK | AVR8_TIFR1_OCF1A_MASK)
-
-#define AVR8_TCCR2B (m_r[AVR8_REGIDX_TCCR2B])
-#define AVR8_TCCR2B_FOC2A_MASK 0x80
-#define AVR8_TCCR2B_FOC2A_SHIFT 7
-#define AVR8_TCCR2B_FOC2B_MASK 0x40
-#define AVR8_TCCR2B_FOC2B_SHIFT 6
-#define AVR8_TCCR2B_WGM2_2_MASK 0x08
-#define AVR8_TCCR2B_WGM2_2_SHIFT 3
-#define AVR8_TCCR2B_CS_MASK 0x07
-#define AVR8_TCCR2B_CS_SHIFT 0
-#define AVR8_TIMER2_CLOCK_SELECT (AVR8_TCCR2B & AVR8_TCCR2B_CS_MASK)
-
-#define AVR8_TCCR2A (m_r[AVR8_REGIDX_TCCR2A])
-#define AVR8_TCCR2A_COM2A_MASK 0xc0
-#define AVR8_TCCR2A_COM2A_SHIFT 6
-#define AVR8_TCCR2A_COM2B_MASK 0x30
-#define AVR8_TCCR2A_COM2B_SHIFT 4
-#define AVR8_TCCR2A_WGM2_10_MASK 0x03
-#define AVR8_TCCR2A_WGM2_10_SHIFT 0
-#define AVR8_TCCR2A_COM2A ((AVR8_TCCR2A & AVR8_TCCR2A_COM2A_MASK) >> AVR8_TCCR2A_COM2A_SHIFT)
-#define AVR8_TCCR2A_COM2B ((AVR8_TCCR2A & AVR8_TCCR2A_COM2B_MASK) >> AVR8_TCCR2A_COM2B_SHIFT)
-#define AVR8_TCCR2A_WGM2_10 (AVR8_TCCR2A & AVR8_TCCR2A_WGM2_10_MASK)
-
-#define AVR8_TIMSK2 (m_r[AVR8_REGIDX_TIMSK2])
-#define AVR8_TIMSK2_OCIE2B_MASK 0x04
-#define AVR8_TIMSK2_OCIE2A_MASK 0x02
-#define AVR8_TIMSK2_TOIE2_MASK 0x01
-#define AVR8_TIMSK2_OCIE2B ((AVR8_TIMSK2 & AVR8_TIMSK2_OCIE2B_MASK) >> 2)
-#define AVR8_TIMSK2_OCIE2A ((AVR8_TIMSK2 & AVR8_TIMSK2_OCIE2A_MASK) >> 1)
-#define AVR8_TIMSK2_TOIE2 (AVR8_TIMSK2 & AVR8_TIMSK2_TOIE2_MASK)
-
-#define AVR8_TIFR2 (m_r[AVR8_REGIDX_TIFR2])
-#define AVR8_TIFR2_OCF2B_MASK 0x04
-#define AVR8_TIFR2_OCF2B_SHIFT 2
-#define AVR8_TIFR2_OCF2A_MASK 0x02
-#define AVR8_TIFR2_OCF2A_SHIFT 1
-#define AVR8_TIFR2_TOV2_MASK 0x01
-#define AVR8_TIFR2_TOV2_SHIFT 0
-#define AVR8_TIFR2_MASK (AVR8_TIFR2_TOV2_MASK | AVR8_TIFR2_OCF2B_MASK | AVR8_TIFR2_OCF2A_MASK)
-
-#define AVR8_OCR0A m_r[AVR8_REGIDX_OCR0A]
-#define AVR8_OCR0B m_r[AVR8_REGIDX_OCR0B]
-#define AVR8_TCNT0 m_r[AVR8_REGIDX_TCNT0]
-#define AVR8_WGM0 (((AVR8_TCCR0B & 0x08) >> 1) | (AVR8_TCCR0A & 0x03))
-
-#define AVR8_OCR1A ((AVR8_OCR1AH << 8) | AVR8_OCR1AL)
-#define AVR8_OCR1B ((AVR8_OCR1BH << 8) | AVR8_OCR1BL)
-#define AVR8_ICR1 ((AVR8_ICR1H << 8) | AVR8_ICR1L)
-#define AVR8_TCNT1 ((AVR8_TCNT1H << 8) | AVR8_TCNT1L)
-#define AVR8_WGM1 (((AVR8_TCCR1B & 0x18) >> 1) | (AVR8_TCCR1A & 0x03))
-#define AVR8_TCNT1_DIR (state->m_tcnt1_direction)
-
-#define AVR8_OCR2A m_r[AVR8_REGIDX_OCR2A]
-#define AVR8_OCR2B m_r[AVR8_REGIDX_OCR2B]
-#define AVR8_TCNT2 m_r[AVR8_REGIDX_TCNT2]
-#define AVR8_WGM2 (((AVR8_TCCR2B & 0x08) >> 1) | (AVR8_TCCR2A & 0x03))
-
-#define AVR8_GTCCR_PSRASY_MASK 0x02
-#define AVR8_GTCCR_PSRASY_SHIFT 1
-
-#define AVR8_SPSR (m_r[AVR8_REGIDX_SPSR])
-#define AVR8_SPSR_SPR2X (AVR8_SPSR & AVR8_SPSR_SPR2X_MASK)
-
-#define AVR8_SPCR (m_r[AVR8_REGIDX_SPCR])
-#define AVR8_SPCR_SPIE ((AVR8_SPCR & AVR8_SPCR_SPIE_MASK) >> 7)
-#define AVR8_SPCR_SPE ((AVR8_SPCR & AVR8_SPCR_SPE_MASK) >> 6)
-#define AVR8_SPCR_DORD ((AVR8_SPCR & AVR8_SPCR_DORD_MASK) >> 5)
-#define AVR8_SPCR_MSTR ((AVR8_SPCR & AVR8_SPCR_MSTR_MASK) >> 4)
-#define AVR8_SPCR_CPOL ((AVR8_SPCR & AVR8_SPCR_CPOL_MASK) >> 3)
-#define AVR8_SPCR_CPHA ((AVR8_SPCR & AVR8_SPCR_CPHA_MASK) >> 2)
-#define AVR8_SPCR_SPR (AVR8_SPCR & AVR8_SPCR_SPR_MASK)
-
-#define AVR8_SPI_RATE ((AVR8_SPSR_SPR2X << 2) | AVR8_SPCR_SPR)
-
-#define AVR8_PORTB_MOSI 0x08
+#define AVR8_OCR1BH (m_r[AVR8_REGIDX_OCR1BH])
+#define AVR8_OCR1BL (m_r[AVR8_REGIDX_OCR1BL])
+#define AVR8_OCR1AH (m_r[AVR8_REGIDX_OCR1AH])
+#define AVR8_OCR1AL (m_r[AVR8_REGIDX_OCR1AL])
+#define AVR8_ICR1H (m_r[AVR8_REGIDX_ICR1H])
+#define AVR8_ICR1L (m_r[AVR8_REGIDX_ICR1L])
+#define AVR8_TCNT1H (m_r[AVR8_REGIDX_TCNT1H])
+#define AVR8_TCNT1L (m_r[AVR8_REGIDX_TCNT1L])
+
+#define AVR8_TCCR0B (m_r[AVR8_REGIDX_TCCR0B])
+#define AVR8_TCCR0B_FOC0A_MASK 0x80
+#define AVR8_TCCR0B_FOC0A_SHIFT 7
+#define AVR8_TCCR0B_FOC0B_MASK 0x40
+#define AVR8_TCCR0B_FOC0B_SHIFT 6
+#define AVR8_TCCR0B_WGM0_2_MASK 0x08
+#define AVR8_TCCR0B_WGM0_2_SHIFT 3
+#define AVR8_TCCR0B_CS_MASK 0x07
+#define AVR8_TCCR0B_CS_SHIFT 0
+#define AVR8_TIMER0_CLOCK_SELECT (AVR8_TCCR0B & AVR8_TCCR0B_CS_MASK)
+
+#define AVR8_TCCR0A (m_r[AVR8_REGIDX_TCCR0A])
+#define AVR8_TCCR0A_COM0A_MASK 0xc0
+#define AVR8_TCCR0A_COM0A_SHIFT 6
+#define AVR8_TCCR0A_COM0B_MASK 0x30
+#define AVR8_TCCR0A_COM0B_SHIFT 4
+#define AVR8_TCCR0A_WGM0_10_MASK 0x03
+#define AVR8_TCCR0A_WGM0_10_SHIFT 0
+#define AVR8_TCCR0A_COM0A ((AVR8_TCCR0A & AVR8_TCCR0A_COM0A_MASK) >> AVR8_TCCR0A_COM0A_SHIFT)
+#define AVR8_TCCR0A_COM0B ((AVR8_TCCR0A & AVR8_TCCR0A_COM0B_MASK) >> AVR8_TCCR0A_COM0B_SHIFT)
+#define AVR8_TCCR0A_WGM0_10 (AVR8_TCCR0A & AVR8_TCCR0A_WGM0_10_MASK)
+
+#define AVR8_TIMSK0 (m_r[AVR8_REGIDX_TIMSK0])
+#define AVR8_TIMSK0_OCIE0B_MASK 0x04
+#define AVR8_TIMSK0_OCIE0A_MASK 0x02
+#define AVR8_TIMSK0_TOIE0_MASK 0x01
+#define AVR8_TIMSK0_OCIE0B ((AVR8_TIMSK0 & AVR8_TIMSK0_OCIE0B_MASK) >> 2)
+#define AVR8_TIMSK0_OCIE0A ((AVR8_TIMSK0 & AVR8_TIMSK0_OCIE0A_MASK) >> 1)
+#define AVR8_TIMSK0_TOIE0 (AVR8_TIMSK0 & AVR8_TIMSK0_TOIE0_MASK)
+
+#define AVR8_TIFR0 (m_r[AVR8_REGIDX_TIFR0])
+#define AVR8_TIFR0_OCF0B_MASK 0x04
+#define AVR8_TIFR0_OCF0B_SHIFT 2
+#define AVR8_TIFR0_OCF0A_MASK 0x02
+#define AVR8_TIFR0_OCF0A_SHIFT 1
+#define AVR8_TIFR0_TOV0_MASK 0x01
+#define AVR8_TIFR0_TOV0_SHIFT 0
+#define AVR8_TIFR0_MASK (AVR8_TIFR0_TOV0_MASK | AVR8_TIFR0_OCF0B_MASK | AVR8_TIFR0_OCF0A_MASK)
+
+#define AVR8_TCCR1B (m_r[AVR8_REGIDX_TCCR1B])
+#define AVR8_TCCR1B_ICNC1_MASK 0x80
+#define AVR8_TCCR1B_ICNC1_SHIFT 7
+#define AVR8_TCCR1B_ICES1_MASK 0x40
+#define AVR8_TCCR1B_ICES1_SHIFT 6
+#define AVR8_TCCR1B_WGM1_32_MASK 0x18
+#define AVR8_TCCR1B_WGM1_32_SHIFT 3
+#define AVR8_TCCR1B_CS_MASK 0x07
+#define AVR8_TCCR1B_CS_SHIFT 0
+#define AVR8_TIMER1_CLOCK_SELECT (AVR8_TCCR1B & AVR8_TCCR1B_CS_MASK)
+
+#define AVR8_TCCR1A (m_r[AVR8_REGIDX_TCCR1A])
+#define AVR8_TCCR1A_COM1A_MASK 0xc0
+#define AVR8_TCCR1A_COM1A_SHIFT 6
+#define AVR8_TCCR1A_COM1B_MASK 0x30
+#define AVR8_TCCR1A_COM1B_SHIFT 4
+#define AVR8_TCCR1A_WGM1_10_MASK 0x03
+#define AVR8_TCCR1A_WGM1_10_SHIFT 0
+#define AVR8_TCCR1A_COM1A ((AVR8_TCCR1A & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT)
+#define AVR8_TCCR1A_COM1B ((AVR8_TCCR1A & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT)
+#define AVR8_TCCR1A_WGM1_10 (AVR8_TCCR1A & AVR8_TCCR1A_WGM1_10_MASK)
+
+#define AVR8_TIMSK1 (m_r[AVR8_REGIDX_TIMSK1])
+#define AVR8_TIMSK1_ICIE1_MASK 0x20
+#define AVR8_TIMSK1_OCIE1B_MASK 0x04
+#define AVR8_TIMSK1_OCIE1A_MASK 0x02
+#define AVR8_TIMSK1_TOIE1_MASK 0x01
+#define AVR8_TIMSK1_ICIE1 ((AVR8_TIMSK1 & AVR8_TIMSK1_ICIE1_MASK) >> 5)
+#define AVR8_TIMSK1_OCIE1B ((AVR8_TIMSK1 & AVR8_TIMSK1_OCIE1B_MASK) >> 2)
+#define AVR8_TIMSK1_OCIE1A ((AVR8_TIMSK1 & AVR8_TIMSK1_OCIE1A_MASK) >> 1)
+#define AVR8_TIMSK1_TOIE1 (AVR8_TIMSK1 & AVR8_TIMSK1_TOIE1_MASK)
+
+#define AVR8_TIFR1 (m_r[AVR8_REGIDX_TIFR1])
+#define AVR8_TIFR1_ICF1_MASK 0x20
+#define AVR8_TIFR1_ICF1_SHIFT 5
+#define AVR8_TIFR1_OCF1B_MASK 0x04
+#define AVR8_TIFR1_OCF1B_SHIFT 2
+#define AVR8_TIFR1_OCF1A_MASK 0x02
+#define AVR8_TIFR1_OCF1A_SHIFT 1
+#define AVR8_TIFR1_TOV1_MASK 0x01
+#define AVR8_TIFR1_TOV1_SHIFT 0
+#define AVR8_TIFR1_MASK (AVR8_TIFR1_ICF1_MASK | AVR8_TIFR1_TOV1_MASK | \
+ AVR8_TIFR1_OCF1B_MASK | AVR8_TIFR1_OCF1A_MASK)
+
+#define AVR8_TCCR2B (m_r[AVR8_REGIDX_TCCR2B])
+#define AVR8_TCCR2B_FOC2A_MASK 0x80
+#define AVR8_TCCR2B_FOC2A_SHIFT 7
+#define AVR8_TCCR2B_FOC2B_MASK 0x40
+#define AVR8_TCCR2B_FOC2B_SHIFT 6
+#define AVR8_TCCR2B_WGM2_2_MASK 0x08
+#define AVR8_TCCR2B_WGM2_2_SHIFT 3
+#define AVR8_TCCR2B_CS_MASK 0x07
+#define AVR8_TCCR2B_CS_SHIFT 0
+#define AVR8_TIMER2_CLOCK_SELECT (AVR8_TCCR2B & AVR8_TCCR2B_CS_MASK)
+
+#define AVR8_TCCR2A (m_r[AVR8_REGIDX_TCCR2A])
+#define AVR8_TCCR2A_COM2A_MASK 0xc0
+#define AVR8_TCCR2A_COM2A_SHIFT 6
+#define AVR8_TCCR2A_COM2B_MASK 0x30
+#define AVR8_TCCR2A_COM2B_SHIFT 4
+#define AVR8_TCCR2A_WGM2_10_MASK 0x03
+#define AVR8_TCCR2A_WGM2_10_SHIFT 0
+#define AVR8_TCCR2A_COM2A ((AVR8_TCCR2A & AVR8_TCCR2A_COM2A_MASK) >> AVR8_TCCR2A_COM2A_SHIFT)
+#define AVR8_TCCR2A_COM2B ((AVR8_TCCR2A & AVR8_TCCR2A_COM2B_MASK) >> AVR8_TCCR2A_COM2B_SHIFT)
+#define AVR8_TCCR2A_WGM2_10 (AVR8_TCCR2A & AVR8_TCCR2A_WGM2_10_MASK)
+
+#define AVR8_TIMSK2 (m_r[AVR8_REGIDX_TIMSK2])
+#define AVR8_TIMSK2_OCIE2B_MASK 0x04
+#define AVR8_TIMSK2_OCIE2A_MASK 0x02
+#define AVR8_TIMSK2_TOIE2_MASK 0x01
+#define AVR8_TIMSK2_OCIE2B ((AVR8_TIMSK2 & AVR8_TIMSK2_OCIE2B_MASK) >> 2)
+#define AVR8_TIMSK2_OCIE2A ((AVR8_TIMSK2 & AVR8_TIMSK2_OCIE2A_MASK) >> 1)
+#define AVR8_TIMSK2_TOIE2 (AVR8_TIMSK2 & AVR8_TIMSK2_TOIE2_MASK)
+
+#define AVR8_TIFR2 (m_r[AVR8_REGIDX_TIFR2])
+#define AVR8_TIFR2_OCF2B_MASK 0x04
+#define AVR8_TIFR2_OCF2B_SHIFT 2
+#define AVR8_TIFR2_OCF2A_MASK 0x02
+#define AVR8_TIFR2_OCF2A_SHIFT 1
+#define AVR8_TIFR2_TOV2_MASK 0x01
+#define AVR8_TIFR2_TOV2_SHIFT 0
+#define AVR8_TIFR2_MASK (AVR8_TIFR2_TOV2_MASK | AVR8_TIFR2_OCF2B_MASK | AVR8_TIFR2_OCF2A_MASK)
+
+#define AVR8_OCR0A m_r[AVR8_REGIDX_OCR0A]
+#define AVR8_OCR0B m_r[AVR8_REGIDX_OCR0B]
+#define AVR8_TCNT0 m_r[AVR8_REGIDX_TCNT0]
+#define AVR8_WGM0 (((AVR8_TCCR0B & 0x08) >> 1) | (AVR8_TCCR0A & 0x03))
+
+#define AVR8_OCR1A ((AVR8_OCR1AH << 8) | AVR8_OCR1AL)
+#define AVR8_OCR1B ((AVR8_OCR1BH << 8) | AVR8_OCR1BL)
+#define AVR8_ICR1 ((AVR8_ICR1H << 8) | AVR8_ICR1L)
+#define AVR8_TCNT1 ((AVR8_TCNT1H << 8) | AVR8_TCNT1L)
+#define AVR8_WGM1 (((AVR8_TCCR1B & 0x18) >> 1) | (AVR8_TCCR1A & 0x03))
+#define AVR8_TCNT1_DIR (state->m_tcnt1_direction)
+
+#define AVR8_OCR2A m_r[AVR8_REGIDX_OCR2A]
+#define AVR8_OCR2B m_r[AVR8_REGIDX_OCR2B]
+#define AVR8_TCNT2 m_r[AVR8_REGIDX_TCNT2]
+#define AVR8_WGM2 (((AVR8_TCCR2B & 0x08) >> 1) | (AVR8_TCCR2A & 0x03))
+
+#define AVR8_GTCCR_PSRASY_MASK 0x02
+#define AVR8_GTCCR_PSRASY_SHIFT 1
+
+#define AVR8_SPSR (m_r[AVR8_REGIDX_SPSR])
+#define AVR8_SPSR_SPR2X (AVR8_SPSR & AVR8_SPSR_SPR2X_MASK)
+
+#define AVR8_SPCR (m_r[AVR8_REGIDX_SPCR])
+#define AVR8_SPCR_SPIE ((AVR8_SPCR & AVR8_SPCR_SPIE_MASK) >> 7)
+#define AVR8_SPCR_SPE ((AVR8_SPCR & AVR8_SPCR_SPE_MASK) >> 6)
+#define AVR8_SPCR_DORD ((AVR8_SPCR & AVR8_SPCR_DORD_MASK) >> 5)
+#define AVR8_SPCR_MSTR ((AVR8_SPCR & AVR8_SPCR_MSTR_MASK) >> 4)
+#define AVR8_SPCR_CPOL ((AVR8_SPCR & AVR8_SPCR_CPOL_MASK) >> 3)
+#define AVR8_SPCR_CPHA ((AVR8_SPCR & AVR8_SPCR_CPHA_MASK) >> 2)
+#define AVR8_SPCR_SPR (AVR8_SPCR & AVR8_SPCR_SPR_MASK)
+
+#define AVR8_SPI_RATE ((AVR8_SPSR_SPR2X << 2) | AVR8_SPCR_SPR)
+
+#define AVR8_PORTB_MOSI 0x08
//**************************************************************************
// DEVICE INTERFACE
@@ -346,33 +346,33 @@ atmega644_device::atmega644_device(const machine_config &mconfig, const char *ta
avr8_device::avr8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, const device_type type, UINT32 addr_mask, address_map_constructor internal_map)
: cpu_device(mconfig, type, "AVR8", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 8, 22),
- m_data_config("data", ENDIANNESS_LITTLE, 8, 16, 0, internal_map),
- m_io_config("io", ENDIANNESS_LITTLE, 8, 2),
- m_eeprom(NULL),
- m_pc(0),
- m_shifted_pc(0),
- m_timer0_top(0),
- m_timer0_increment(1),
- m_timer0_prescale(0),
- m_timer0_prescale_count(0),
- m_timer1_top(0),
- m_timer1_increment(1),
- m_timer1_prescale(0),
- m_timer1_prescale_count(0),
- m_timer2_top(0),
- m_timer2_increment(1),
- m_timer2_prescale(0),
- m_timer2_prescale_count(0),
- m_spi_active(false),
- m_spi_prescale(0),
- m_spi_prescale_count(0),
- m_addr_mask(addr_mask),
- m_interrupt_pending(false),
- m_icount(0),
- m_elapsed_cycles(0)
+ m_program_config("program", ENDIANNESS_LITTLE, 8, 22),
+ m_data_config("data", ENDIANNESS_LITTLE, 8, 16, 0, internal_map),
+ m_io_config("io", ENDIANNESS_LITTLE, 8, 2),
+ m_eeprom(NULL),
+ m_pc(0),
+ m_shifted_pc(0),
+ m_timer0_top(0),
+ m_timer0_increment(1),
+ m_timer0_prescale(0),
+ m_timer0_prescale_count(0),
+ m_timer1_top(0),
+ m_timer1_increment(1),
+ m_timer1_prescale(0),
+ m_timer1_prescale_count(0),
+ m_timer2_top(0),
+ m_timer2_increment(1),
+ m_timer2_prescale(0),
+ m_timer2_prescale_count(0),
+ m_spi_active(false),
+ m_spi_prescale(0),
+ m_spi_prescale_count(0),
+ m_addr_mask(addr_mask),
+ m_interrupt_pending(false),
+ m_icount(0),
+ m_elapsed_cycles(0)
{
- // Allocate & setup
+ // Allocate & setup
}
@@ -395,7 +395,7 @@ void avr8_device::static_set_config(device_t &device, const avr8_config &config)
void avr8_device::unimplemented_opcode(UINT32 op)
{
- fatalerror("AVR8: unknown opcode (%08x) at %08x\n", op, m_pc);
+ fatalerror("AVR8: unknown opcode (%08x) at %08x\n", op, m_pc);
}
@@ -432,11 +432,11 @@ inline bool avr8_device::is_long_opcode(UINT16 op)
void avr8_device::device_start()
{
- m_pc = 0;
+ m_pc = 0;
- m_program = &space(AS_PROGRAM);
- m_data = &space(AS_DATA);
- m_io = &space(AS_IO);
+ m_program = &space(AS_PROGRAM);
+ m_data = &space(AS_DATA);
+ m_io = &space(AS_IO);
// register our state for the debugger
astring tempstr;
@@ -521,31 +521,31 @@ void avr8_device::device_reset()
m_spi_prescale = 0;
m_spi_prescale_count = 0;
- m_timer0_top = 0;
+ m_timer0_top = 0;
m_timer0_increment = 1;
m_timer0_prescale = 0;
m_timer0_prescale_count = 0;
- m_timer1_top = 0;
+ m_timer1_top = 0;
m_timer1_increment = 1;
m_timer1_prescale = 0;
m_timer1_prescale_count = 0;
- m_timer2_top = 0;
+ m_timer2_top = 0;
m_timer2_increment = 1;
m_timer2_prescale = 0;
m_timer2_prescale_count = 0;
- AVR8_TIMSK1 = 0;
- AVR8_OCR1AH = 0;
- AVR8_OCR1AL = 0;
- AVR8_OCR1BH = 0;
- AVR8_OCR1BL = 0;
- AVR8_ICR1H = 0;
- AVR8_ICR1L = 0;
- AVR8_TCNT1H = 0;
- AVR8_TCNT1L = 0;
- AVR8_TCNT2 = 0;
+ AVR8_TIMSK1 = 0;
+ AVR8_OCR1AH = 0;
+ AVR8_OCR1AL = 0;
+ AVR8_OCR1BH = 0;
+ AVR8_OCR1BL = 0;
+ AVR8_ICR1H = 0;
+ AVR8_ICR1L = 0;
+ AVR8_TCNT1H = 0;
+ AVR8_TCNT1L = 0;
+ AVR8_TCNT2 = 0;
m_interrupt_pending = false;
@@ -587,14 +587,14 @@ void avr8_device::state_string_export(const device_state_entry &entry, astring &
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c%c%c",
- (m_r[AVR8_REGIDX_SREG] & 0x80) ? 'I' : '-',
- (m_r[AVR8_REGIDX_SREG] & 0x40) ? 'T' : '-',
- (m_r[AVR8_REGIDX_SREG] & 0x20) ? 'H' : '-',
- (m_r[AVR8_REGIDX_SREG] & 0x10) ? 'S' : '-',
- (m_r[AVR8_REGIDX_SREG] & 0x08) ? 'V' : '-',
- (m_r[AVR8_REGIDX_SREG] & 0x04) ? 'N' : '-',
- (m_r[AVR8_REGIDX_SREG] & 0x02) ? 'Z' : '-',
- (m_r[AVR8_REGIDX_SREG] & 0x01) ? 'C' : '-');
+ (m_r[AVR8_REGIDX_SREG] & 0x80) ? 'I' : '-',
+ (m_r[AVR8_REGIDX_SREG] & 0x40) ? 'T' : '-',
+ (m_r[AVR8_REGIDX_SREG] & 0x20) ? 'H' : '-',
+ (m_r[AVR8_REGIDX_SREG] & 0x10) ? 'S' : '-',
+ (m_r[AVR8_REGIDX_SREG] & 0x08) ? 'V' : '-',
+ (m_r[AVR8_REGIDX_SREG] & 0x04) ? 'N' : '-',
+ (m_r[AVR8_REGIDX_SREG] & 0x02) ? 'Z' : '-',
+ (m_r[AVR8_REGIDX_SREG] & 0x01) ? 'C' : '-');
break;
}
}
@@ -641,19 +641,19 @@ offs_t avr8_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *opr
inline void avr8_device::push(UINT8 val)
{
UINT16 sp = SPREG;
- m_data->write_byte(sp, val);
- sp--;
- m_r[AVR8_REGIDX_SPL] = sp & 0x00ff;
- m_r[AVR8_REGIDX_SPH] = (sp >> 8) & 0x00ff;
+ m_data->write_byte(sp, val);
+ sp--;
+ m_r[AVR8_REGIDX_SPL] = sp & 0x00ff;
+ m_r[AVR8_REGIDX_SPH] = (sp >> 8) & 0x00ff;
}
inline UINT8 avr8_device::pop()
{
UINT16 sp = SPREG;
- sp++;
+ sp++;
m_r[AVR8_REGIDX_SPL] = sp & 0x00ff;
m_r[AVR8_REGIDX_SPH] = (sp >> 8) & 0x00ff;
- return m_data->read_byte(sp);
+ return m_data->read_byte(sp);
}
//**************************************************************************
@@ -662,9 +662,9 @@ inline UINT8 avr8_device::pop()
void avr8_device::set_irq_line(UINT16 vector, int state)
{
- // Horrible hack, not accurate
- if(state)
- {
+ // Horrible hack, not accurate
+ if(state)
+ {
if(SREG_R(AVR8_SREG_I))
{
SREG_W(AVR8_SREG_I, 0);
@@ -677,7 +677,7 @@ void avr8_device::set_irq_line(UINT16 vector, int state)
{
m_interrupt_pending = true;
}
- }
+ }
}
class CInterruptCondition
@@ -707,10 +707,10 @@ static const CInterruptCondition s_int_conditions[AVR8_INTIDX_COUNT] =
void avr8_device::update_interrupt(int source)
{
- CInterruptCondition condition = s_int_conditions[source];
+ CInterruptCondition condition = s_int_conditions[source];
- int intstate = (m_r[condition.m_regindex] & condition.m_regmask) ? 1 : 0;
- intstate = (m_r[condition.m_intreg] & condition.m_intmask) ? intstate : 0;
+ int intstate = (m_r[condition.m_regindex] & condition.m_regmask) ? 1 : 0;
+ intstate = (m_r[condition.m_intreg] & condition.m_intmask) ? intstate : 0;
set_irq_line(condition.m_intindex, intstate);
@@ -738,10 +738,10 @@ static const CInterruptCondition s_mega644_int_conditions[AVR8_INTIDX_COUNT] =
void atmega644_device::update_interrupt(int source)
{
- CInterruptCondition condition = s_mega644_int_conditions[source];
+ CInterruptCondition condition = s_mega644_int_conditions[source];
- int intstate = (m_r[condition.m_regindex] & condition.m_regmask) ? 1 : 0;
- intstate = (m_r[condition.m_intreg] & condition.m_intmask) ? intstate : 0;
+ int intstate = (m_r[condition.m_regindex] & condition.m_regmask) ? 1 : 0;
+ intstate = (m_r[condition.m_intreg] & condition.m_intmask) ? intstate : 0;
set_irq_line(condition.m_intindex << 1, intstate);
@@ -810,94 +810,94 @@ void avr8_device::timer_tick(int cycles)
void avr8_device::timer0_tick()
{
/*
- UINT16 count = m_r[AVR8_REGIDX_TCNT0];
- INT32 wgm0 = ((m_r[AVR8_REGIDX_TCCR0B] & AVR8_TCCR0B_WGM0_2_MASK) >> 1) |
- (m_r[AVR8_REGIDX_TCCR0A] & AVR8_TCCR0A_WGM0_10_MASK);
-
- // Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
- //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR0A] & AVR8_TCCR0A_COM0A_MASK) >> AVR8_TCCR0A_COM0A_SHIFT,
- //(m_r[AVR8_REGIDX_TCCR0A] & AVR8_TCCR0A_COM0B_MASK) >> AVR8_TCCR0A_COM0B_SHIFT };
- UINT8 ocr0[2] = { m_r[AVR8_REGIDX_OCR0A], m_r[AVR8_REGIDX_OCR0B] };
- UINT8 ocf0[2] = { (1 << AVR8_TIFR0_OCF0A_SHIFT), (1 << AVR8_TIFR0_OCF0B_SHIFT) };
- INT32 increment = m_timer0_increment;
-
- for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
- {
- switch(wgm0)
- {
- case WGM02_FAST_PWM:
- if(count == ocr0[reg])
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR0] |= AVR8_TIFR0_TOV0_MASK;
- count = 0;
- increment = 0;
- }
-
- m_r[AVR8_REGIDX_TIFR0] |= ocf0[reg];
- }
- else if(count == 0)
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR0] &= ~AVR8_TIFR0_TOV0_MASK;
- }
- }
- break;
-
- case WGM02_FAST_PWM_CMP:
- if(count == ocr0[reg])
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR0] |= AVR8_TIFR0_TOV0_MASK;
- count = 0;
- increment = 0;
- }
-
- m_r[AVR8_REGIDX_TIFR0] |= ocf0[reg];
- }
- else if(count == 0)
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR0] &= ~AVR8_TIFR0_TOV0_MASK;
- }
- }
- break;
-
- default:
- // TODO
- break;
- }
- switch(compare_mode[reg])
- {
- case 0:
- //verboselog(m_pc, 0, "update_timer0_compare_mode: Normal port operation (OC0 disconnected)\n");
- break;
-
- case 1:
- case 2:
- // TODO
- break;
-
- case 3:
- break;
- }
- }
-
- m_r[AVR8_REGIDX_TCNT0] = count + increment;
-
- update_interrupt(AVR8_INTIDX_OCF0A);
- update_interrupt(AVR8_INTIDX_OCF0B);
- update_interrupt(AVR8_INTIDX_TOV0);
- */
+ UINT16 count = m_r[AVR8_REGIDX_TCNT0];
+ INT32 wgm0 = ((m_r[AVR8_REGIDX_TCCR0B] & AVR8_TCCR0B_WGM0_2_MASK) >> 1) |
+ (m_r[AVR8_REGIDX_TCCR0A] & AVR8_TCCR0A_WGM0_10_MASK);
+
+ // Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
+ //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR0A] & AVR8_TCCR0A_COM0A_MASK) >> AVR8_TCCR0A_COM0A_SHIFT,
+ //(m_r[AVR8_REGIDX_TCCR0A] & AVR8_TCCR0A_COM0B_MASK) >> AVR8_TCCR0A_COM0B_SHIFT };
+ UINT8 ocr0[2] = { m_r[AVR8_REGIDX_OCR0A], m_r[AVR8_REGIDX_OCR0B] };
+ UINT8 ocf0[2] = { (1 << AVR8_TIFR0_OCF0A_SHIFT), (1 << AVR8_TIFR0_OCF0B_SHIFT) };
+ INT32 increment = m_timer0_increment;
+
+ for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
+ {
+ switch(wgm0)
+ {
+ case WGM02_FAST_PWM:
+ if(count == ocr0[reg])
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR0] |= AVR8_TIFR0_TOV0_MASK;
+ count = 0;
+ increment = 0;
+ }
+
+ m_r[AVR8_REGIDX_TIFR0] |= ocf0[reg];
+ }
+ else if(count == 0)
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR0] &= ~AVR8_TIFR0_TOV0_MASK;
+ }
+ }
+ break;
+
+ case WGM02_FAST_PWM_CMP:
+ if(count == ocr0[reg])
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR0] |= AVR8_TIFR0_TOV0_MASK;
+ count = 0;
+ increment = 0;
+ }
+
+ m_r[AVR8_REGIDX_TIFR0] |= ocf0[reg];
+ }
+ else if(count == 0)
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR0] &= ~AVR8_TIFR0_TOV0_MASK;
+ }
+ }
+ break;
+
+ default:
+ // TODO
+ break;
+ }
+ switch(compare_mode[reg])
+ {
+ case 0:
+ //verboselog(m_pc, 0, "update_timer0_compare_mode: Normal port operation (OC0 disconnected)\n");
+ break;
+
+ case 1:
+ case 2:
+ // TODO
+ break;
+
+ case 3:
+ break;
+ }
+ }
+
+ m_r[AVR8_REGIDX_TCNT0] = count + increment;
+
+ update_interrupt(AVR8_INTIDX_OCF0A);
+ update_interrupt(AVR8_INTIDX_OCF0B);
+ update_interrupt(AVR8_INTIDX_TOV0);
+ */
}
void avr8_device::update_timer0_waveform_gen_mode()
{
- m_timer0_top = 0;
+ m_timer0_top = 0;
switch(AVR8_WGM0)
{
case WGM02_NORMAL:
@@ -1008,32 +1008,32 @@ void avr8_device::update_timer0_clock_source()
void avr8_device::update_ocr0(UINT8 newval, UINT8 reg)
{
- m_r[(reg == AVR8_REG_A) ? AVR8_REGIDX_OCR0A : AVR8_REGIDX_OCR0B] = newval;
+ m_r[(reg == AVR8_REG_A) ? AVR8_REGIDX_OCR0A : AVR8_REGIDX_OCR0B] = newval;
}
// Timer 1 Handling
void avr8_device::timer1_tick()
{
- /* TODO: Handle comparison, setting OC1x pins, detection of BOTTOM and TOP */
+ /* TODO: Handle comparison, setting OC1x pins, detection of BOTTOM and TOP */
- UINT16 count = (m_r[AVR8_REGIDX_TCNT1H] << 8) | m_r[AVR8_REGIDX_TCNT1L];
- INT32 wgm1 = ((m_r[AVR8_REGIDX_TCCR1B] & AVR8_TCCR1B_WGM1_32_MASK) >> 1) |
- (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_WGM1_10_MASK);
+ UINT16 count = (m_r[AVR8_REGIDX_TCNT1H] << 8) | m_r[AVR8_REGIDX_TCNT1L];
+ INT32 wgm1 = ((m_r[AVR8_REGIDX_TCCR1B] & AVR8_TCCR1B_WGM1_32_MASK) >> 1) |
+ (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_WGM1_10_MASK);
- // Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
- //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
- //(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT };
- UINT16 ocr1[2] = { (m_r[AVR8_REGIDX_OCR1AH] << 8) | m_r[AVR8_REGIDX_OCR1AL],
- (m_r[AVR8_REGIDX_OCR1BH] << 8) | m_r[AVR8_REGIDX_OCR1BL] };
+ // Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
+ //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1A_MASK) >> AVR8_TCCR1A_COM1A_SHIFT,
+ //(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT };
+ UINT16 ocr1[2] = { (m_r[AVR8_REGIDX_OCR1AH] << 8) | m_r[AVR8_REGIDX_OCR1AL],
+ (m_r[AVR8_REGIDX_OCR1BH] << 8) | m_r[AVR8_REGIDX_OCR1BL] };
UINT8 ocf1[2] = { (1 << AVR8_TIFR1_OCF1A_SHIFT), (1 << AVR8_TIFR1_OCF1B_SHIFT) };
UINT8 int1[2] = { AVR8_INTIDX_OCF1A, AVR8_INTIDX_OCF1B };
- INT32 increment = m_timer1_increment;
+ INT32 increment = m_timer1_increment;
- for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
- {
- switch(wgm1)
- {
+ for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
+ {
+ switch(wgm1)
+ {
case WGM1_CTC_OCR:
if (count == 0xffff)
{
@@ -1043,81 +1043,81 @@ void avr8_device::timer1_tick()
increment = 0;
}
- if (count == ocr1[reg])
- {
- if (reg == 0)
- {
+ if (count == ocr1[reg])
+ {
+ if (reg == 0)
+ {
count = 0;
increment = 0;
- }
- m_r[AVR8_REGIDX_TIFR1] |= ocf1[reg];
+ }
+ m_r[AVR8_REGIDX_TIFR1] |= ocf1[reg];
update_interrupt(int1[reg]);
- }
- else if (count == 0)
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR1] &= ~AVR8_TIFR1_TOV1_MASK;
+ }
+ else if (count == 0)
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR1] &= ~AVR8_TIFR1_TOV1_MASK;
update_interrupt(AVR8_INTIDX_TOV1);
- }
+ }
- m_r[AVR8_REGIDX_TIFR1] &= ~ocf1[reg];
+ m_r[AVR8_REGIDX_TIFR1] &= ~ocf1[reg];
update_interrupt(int1[reg]);
- }
- break;
-
- case WGM1_FAST_PWM_OCR:
- if(count == ocr1[reg])
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR1] |= AVR8_TIFR1_TOV1_MASK;
+ }
+ break;
+
+ case WGM1_FAST_PWM_OCR:
+ if(count == ocr1[reg])
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR1] |= AVR8_TIFR1_TOV1_MASK;
update_interrupt(AVR8_INTIDX_TOV1);
- count = 0;
- increment = 0;
- }
+ count = 0;
+ increment = 0;
+ }
- m_r[AVR8_REGIDX_TIFR1] |= ocf1[reg];
+ m_r[AVR8_REGIDX_TIFR1] |= ocf1[reg];
update_interrupt(int1[reg]);
- }
- else if(count == 0)
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR1] &= ~AVR8_TIFR1_TOV1_MASK;
+ }
+ else if(count == 0)
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR1] &= ~AVR8_TIFR1_TOV1_MASK;
update_interrupt(AVR8_INTIDX_TOV1);
- }
+ }
- m_r[AVR8_REGIDX_TIFR1] &= ~ocf1[reg];
+ m_r[AVR8_REGIDX_TIFR1] &= ~ocf1[reg];
update_interrupt(int1[reg]);
- }
- break;
-
- default:
- verboselog(m_pc, 0, "update_timer1_compare_mode: Unknown waveform generation mode: %02x\n", wgm1);
- break;
- }
- /*
- switch(compare_mode[reg])
- {
- case 0:
- //verboselog(m_pc, 0, "update_timer1_compare_mode: Normal port operation (OC1 disconnected)\n");
- break;
-
- case 1:
- case 2:
- // TODO
- break;
-
- case 3:
- break;
- }
- */
- }
-
- count += increment;
- m_r[AVR8_REGIDX_TCNT1H] = (count >> 8) & 0xff;
- m_r[AVR8_REGIDX_TCNT1L] = count & 0xff;
+ }
+ break;
+
+ default:
+ verboselog(m_pc, 0, "update_timer1_compare_mode: Unknown waveform generation mode: %02x\n", wgm1);
+ break;
+ }
+ /*
+ switch(compare_mode[reg])
+ {
+ case 0:
+ //verboselog(m_pc, 0, "update_timer1_compare_mode: Normal port operation (OC1 disconnected)\n");
+ break;
+
+ case 1:
+ case 2:
+ // TODO
+ break;
+
+ case 3:
+ break;
+ }
+ */
+ }
+
+ count += increment;
+ m_r[AVR8_REGIDX_TCNT1H] = (count >> 8) & 0xff;
+ m_r[AVR8_REGIDX_TCNT1L] = count & 0xff;
}
void avr8_device::update_timer1_waveform_gen_mode()
@@ -1171,7 +1171,7 @@ void avr8_device::changed_tccr1a(UINT8 data)
UINT8 newtccr = data;
UINT8 changed = newtccr ^ oldtccr;
- m_r[AVR8_REGIDX_TCCR1A] = newtccr;
+ m_r[AVR8_REGIDX_TCCR1A] = newtccr;
if(changed & AVR8_TCCR1A_WGM1_10_MASK)
{
@@ -1232,7 +1232,7 @@ void avr8_device::changed_tccr1b(UINT8 data)
UINT8 newtccr = data;
UINT8 changed = newtccr ^ oldtccr;
- m_r[AVR8_REGIDX_TCCR1B] = newtccr;
+ m_r[AVR8_REGIDX_TCCR1B] = newtccr;
if(changed & AVR8_TCCR1B_ICNC1_MASK)
{
@@ -1264,93 +1264,93 @@ void avr8_device::update_ocr1(UINT16 newval, UINT8 reg)
*p_reg_h = (UINT8)(newval >> 8);
*p_reg_l = (UINT8)newval;
- // Nothing needs to be done? All handled in timer callback
+ // Nothing needs to be done? All handled in timer callback
}
// Timer 2 Handling
void avr8_device::timer2_tick()
{
- UINT16 count = m_r[AVR8_REGIDX_TCNT2];
- INT32 wgm2 = ((m_r[AVR8_REGIDX_TCCR2B] & AVR8_TCCR2B_WGM2_2_MASK) >> 1) |
- (m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_WGM2_10_MASK);
-
- // Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
- //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_COM2A_MASK) >> AVR8_TCCR2A_COM2A_SHIFT,
- //(m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_COM2B_MASK) >> AVR8_TCCR2A_COM2B_SHIFT };
- UINT8 ocr2[2] = { m_r[AVR8_REGIDX_OCR2A], m_r[AVR8_REGIDX_OCR2B] };
+ UINT16 count = m_r[AVR8_REGIDX_TCNT2];
+ INT32 wgm2 = ((m_r[AVR8_REGIDX_TCCR2B] & AVR8_TCCR2B_WGM2_2_MASK) >> 1) |
+ (m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_WGM2_10_MASK);
+
+ // Cache things in array form to avoid a compare+branch inside a potentially high-frequency timer
+ //UINT8 compare_mode[2] = { (m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_COM2A_MASK) >> AVR8_TCCR2A_COM2A_SHIFT,
+ //(m_r[AVR8_REGIDX_TCCR2A] & AVR8_TCCR2A_COM2B_MASK) >> AVR8_TCCR2A_COM2B_SHIFT };
+ UINT8 ocr2[2] = { m_r[AVR8_REGIDX_OCR2A], m_r[AVR8_REGIDX_OCR2B] };
UINT8 ocf2[2] = { (1 << AVR8_TIFR2_OCF2A_SHIFT), (1 << AVR8_TIFR2_OCF2B_SHIFT) };
- INT32 increment = m_timer2_increment;
-
- for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
- {
- switch(wgm2)
- {
- case WGM02_FAST_PWM:
- if(count == ocr2[reg])
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR2] |= AVR8_TIFR2_TOV2_MASK;
- count = 0;
- increment = 0;
- }
-
- m_r[AVR8_REGIDX_TIFR2] |= ocf2[reg];
- }
- else if(count == 0)
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR2] &= ~AVR8_TIFR2_TOV2_MASK;
- }
- }
- break;
-
- case WGM02_FAST_PWM_CMP:
- if(count == ocr2[reg])
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR2] |= AVR8_TIFR2_TOV2_MASK;
- count = 0;
- increment = 0;
- }
-
- m_r[AVR8_REGIDX_TIFR2] |= ocf2[reg];
- }
- else if(count == 0)
- {
- if (reg == 0)
- {
- m_r[AVR8_REGIDX_TIFR2] &= ~AVR8_TIFR2_TOV2_MASK;
- }
- }
- break;
-
- default:
- // TODO
- break;
- }
- /*
- switch(compare_mode[reg])
- {
- case 0:
- //verboselog(m_pc, 0, "update_timer2_compare_mode: Normal port operation (OC2 disconnected)\n");
- break;
-
- case 1:
- case 2:
- // TODO
- break;
-
- case 3:
- break;
- }
- */
- }
-
- m_r[AVR8_REGIDX_TCNT2] = count + increment;
+ INT32 increment = m_timer2_increment;
+
+ for(INT32 reg = AVR8_REG_A; reg <= AVR8_REG_B; reg++)
+ {
+ switch(wgm2)
+ {
+ case WGM02_FAST_PWM:
+ if(count == ocr2[reg])
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR2] |= AVR8_TIFR2_TOV2_MASK;
+ count = 0;
+ increment = 0;
+ }
+
+ m_r[AVR8_REGIDX_TIFR2] |= ocf2[reg];
+ }
+ else if(count == 0)
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR2] &= ~AVR8_TIFR2_TOV2_MASK;
+ }
+ }
+ break;
+
+ case WGM02_FAST_PWM_CMP:
+ if(count == ocr2[reg])
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR2] |= AVR8_TIFR2_TOV2_MASK;
+ count = 0;
+ increment = 0;
+ }
+
+ m_r[AVR8_REGIDX_TIFR2] |= ocf2[reg];
+ }
+ else if(count == 0)
+ {
+ if (reg == 0)
+ {
+ m_r[AVR8_REGIDX_TIFR2] &= ~AVR8_TIFR2_TOV2_MASK;
+ }
+ }
+ break;
+
+ default:
+ // TODO
+ break;
+ }
+ /*
+ switch(compare_mode[reg])
+ {
+ case 0:
+ //verboselog(m_pc, 0, "update_timer2_compare_mode: Normal port operation (OC2 disconnected)\n");
+ break;
+
+ case 1:
+ case 2:
+ // TODO
+ break;
+
+ case 3:
+ break;
+ }
+ */
+ }
+
+ m_r[AVR8_REGIDX_TCNT2] = count + increment;
update_interrupt(AVR8_INTIDX_OCF2A);
update_interrupt(AVR8_INTIDX_OCF2B);
@@ -1359,7 +1359,7 @@ void avr8_device::timer2_tick()
void avr8_device::update_timer2_waveform_gen_mode()
{
- m_timer2_top = 0;
+ m_timer2_top = 0;
switch(AVR8_WGM2)
{
case WGM02_NORMAL:
@@ -1471,9 +1471,9 @@ void avr8_device::changed_tccr2b(UINT8 data)
void avr8_device::update_ocr2(UINT8 newval, UINT8 reg)
{
- m_r[(reg == AVR8_REG_A) ? AVR8_REGIDX_OCR2A : AVR8_REGIDX_OCR2B] = newval;
+ m_r[(reg == AVR8_REG_A) ? AVR8_REGIDX_OCR2A : AVR8_REGIDX_OCR2B] = newval;
- // Nothing needs to be done? All handled in timer callback
+ // Nothing needs to be done? All handled in timer callback
}
/****************/
@@ -1578,8 +1578,8 @@ void avr8_device::change_spsr(UINT8 data)
WRITE8_MEMBER( avr8_device::regs_w )
{
- switch( offset )
- {
+ switch( offset )
+ {
case AVR8_REGIDX_R0:
case AVR8_REGIDX_R1:
case AVR8_REGIDX_R2:
@@ -1651,8 +1651,8 @@ WRITE8_MEMBER( avr8_device::regs_w )
update_interrupt(AVR8_INTIDX_TOV0);
break;
- case AVR8_REGIDX_TCNT0:
- AVR8_TCNT0 = data;
+ case AVR8_REGIDX_TCNT0:
+ AVR8_TCNT0 = data;
break;
case AVR8_REGIDX_TCCR1B:
@@ -1703,12 +1703,12 @@ WRITE8_MEMBER( avr8_device::regs_w )
update_interrupt(AVR8_INTIDX_TOV1);
break;
- case AVR8_REGIDX_TCNT1H:
- AVR8_TCNT1H = data;
+ case AVR8_REGIDX_TCNT1H:
+ AVR8_TCNT1H = data;
break;
- case AVR8_REGIDX_TCNT1L:
- AVR8_TCNT1L = data;
+ case AVR8_REGIDX_TCNT1L:
+ AVR8_TCNT1L = data;
break;
case AVR8_REGIDX_TCCR2B:
@@ -1744,13 +1744,13 @@ WRITE8_MEMBER( avr8_device::regs_w )
update_interrupt(AVR8_INTIDX_TOV2);
break;
- case AVR8_REGIDX_TCNT2:
- AVR8_TCNT2 = data;
+ case AVR8_REGIDX_TCNT2:
+ AVR8_TCNT2 = data;
break;
- case AVR8_REGIDX_GTCCR:
- if (data & AVR8_GTCCR_PSRASY_MASK)
- {
+ case AVR8_REGIDX_GTCCR:
+ if (data & AVR8_GTCCR_PSRASY_MASK)
+ {
data &= ~AVR8_GTCCR_PSRASY_MASK;
m_timer2_prescale_count = 0;
}
@@ -1802,7 +1802,7 @@ WRITE8_MEMBER( avr8_device::regs_w )
m_r[AVR8_REGIDX_PORTC] = data;
break;
- case AVR8_REGIDX_PORTD:
+ case AVR8_REGIDX_PORTD:
m_io->write_byte(0x03, data);
m_r[AVR8_REGIDX_PORTD] = data;
break;
@@ -1824,17 +1824,17 @@ WRITE8_MEMBER( avr8_device::regs_w )
break;
}
- default:
+ default:
verboselog(m_pc, 0, "AVR8: Unknown Register Write: %02x = %02x\n", (UINT8)offset, data);
break;
- }
+ }
}
READ8_MEMBER( avr8_device::regs_r )
{
//printf("offset %04x\n", offset);
- switch( offset )
- {
+ switch( offset )
+ {
case AVR8_REGIDX_R0:
case AVR8_REGIDX_R1:
case AVR8_REGIDX_R2:
@@ -1899,10 +1899,10 @@ READ8_MEMBER( avr8_device::regs_r )
case AVR8_REGIDX_PIND:
return m_io->read_byte(AVR8_REG_D);
- default:
+ default:
verboselog(m_pc, 0, "AVR8: Unknown Register Read: %02x\n", (UINT8)offset);
- return 0;
- }
+ return 0;
+ }
}
@@ -1955,48 +1955,48 @@ void avr8_device::execute_set_input(int inputnum, int state)
void avr8_device::execute_run()
{
- UINT32 op = 0;
- INT32 offs = 0;
- UINT8 rd = 0;
- UINT8 rr = 0;
- UINT8 res = 0;
- UINT16 pd = 0;
- INT16 sd = 0;
- INT32 opcycles = 1;
-
- while (m_icount > 0)
- {
+ UINT32 op = 0;
+ INT32 offs = 0;
+ UINT8 rd = 0;
+ UINT8 rr = 0;
+ UINT8 res = 0;
+ UINT16 pd = 0;
+ INT16 sd = 0;
+ INT32 opcycles = 1;
+
+ while (m_icount > 0)
+ {
opcycles = 1;
- m_pc &= m_addr_mask;
- m_shifted_pc &= (m_addr_mask << 1) | 1;
-
- debugger_instruction_hook(this, m_shifted_pc);
-
- op = (UINT32)m_program->read_word(m_shifted_pc);
-
- switch(op & 0xf000)
- {
- case 0x0000:
- switch(op & 0x0f00)
- {
- case 0x0000: // NOP
- break;
- case 0x0100: // MOVW Rd+1:Rd,Rr+1:Rd
- m_r[(RD4(op) << 1) + 1] = m_r[(RR4(op) << 1) + 1];
- m_r[RD4(op) << 1] = m_r[RR4(op) << 1];
- break;
- case 0x0200: // MULS Rd,Rr
- sd = (INT8)m_r[16 + RD4(op)] * (INT8)m_r[16 + RR4(op)];
- m_r[1] = (sd >> 8) & 0x00ff;
- m_r[0] = sd & 0x00ff;
- SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0);
- SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0);
- opcycles = 2;
- break;
- case 0x0300: // Multiplicatn
- switch(MULCONST2(op))
- {
+ m_pc &= m_addr_mask;
+ m_shifted_pc &= (m_addr_mask << 1) | 1;
+
+ debugger_instruction_hook(this, m_shifted_pc);
+
+ op = (UINT32)m_program->read_word(m_shifted_pc);
+
+ switch(op & 0xf000)
+ {
+ case 0x0000:
+ switch(op & 0x0f00)
+ {
+ case 0x0000: // NOP
+ break;
+ case 0x0100: // MOVW Rd+1:Rd,Rr+1:Rd
+ m_r[(RD4(op) << 1) + 1] = m_r[(RR4(op) << 1) + 1];
+ m_r[RD4(op) << 1] = m_r[RR4(op) << 1];
+ break;
+ case 0x0200: // MULS Rd,Rr
+ sd = (INT8)m_r[16 + RD4(op)] * (INT8)m_r[16 + RR4(op)];
+ m_r[1] = (sd >> 8) & 0x00ff;
+ m_r[0] = sd & 0x00ff;
+ SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0);
+ SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0);
+ opcycles = 2;
+ break;
+ case 0x0300: // Multiplicatn
+ switch(MULCONST2(op))
+ {
case 0x0000: // MULSU Rd,Rr
sd = (INT8)m_r[16 + RD3(op)] * (UINT8)m_r[16 + RR3(op)];
m_r[1] = (sd >> 8) & 0x00ff;
@@ -2033,869 +2033,869 @@ void avr8_device::execute_run()
opcycles = 2;
break;
}
- break;
- case 0x0400:
- case 0x0500:
- case 0x0600:
- case 0x0700: // CPC Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- res = rd - (rr + SREG_R(AVR8_SREG_C));
- SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? SREG_R(AVR8_SREG_Z) : 0);
- SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
- break;
- case 0x0800:
- case 0x0900:
- case 0x0a00:
- case 0x0b00: // SBC Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- res = rd - (rr + SREG_R(AVR8_SREG_C));
- m_r[RD5(op)] = res;
- SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? SREG_R(AVR8_SREG_Z) : 0);
- SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
- break;
- case 0x0c00:
- case 0x0d00:
- case 0x0e00:
- case 0x0f00: // ADD Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- res = rd + rr;
- m_r[RD5(op)] = res;
- SREG_W(AVR8_SREG_H, (BIT(rd,3) & BIT(rr,3)) | (BIT(rr,3) & NOT(BIT(res,3))) | (NOT(BIT(res,3)) & BIT(rd,3)));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & NOT(BIT(rr,7)) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, (BIT(rd,7) & BIT(rr,7)) | (BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(res,7)) & BIT(rd,7)));
- break;
- }
- break;
- case 0x1000:
- switch(op & 0x0c00)
- {
- case 0x0000: // CPSE Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- if (rd == rr)
- {
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
- opcycles += is_long_opcode(op) ? 2 : 1;
- m_pc += is_long_opcode(op) ? 2 : 1;
+ break;
+ case 0x0400:
+ case 0x0500:
+ case 0x0600:
+ case 0x0700: // CPC Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ res = rd - (rr + SREG_R(AVR8_SREG_C));
+ SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? SREG_R(AVR8_SREG_Z) : 0);
+ SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
+ break;
+ case 0x0800:
+ case 0x0900:
+ case 0x0a00:
+ case 0x0b00: // SBC Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ res = rd - (rr + SREG_R(AVR8_SREG_C));
+ m_r[RD5(op)] = res;
+ SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? SREG_R(AVR8_SREG_Z) : 0);
+ SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
+ break;
+ case 0x0c00:
+ case 0x0d00:
+ case 0x0e00:
+ case 0x0f00: // ADD Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ res = rd + rr;
+ m_r[RD5(op)] = res;
+ SREG_W(AVR8_SREG_H, (BIT(rd,3) & BIT(rr,3)) | (BIT(rr,3) & NOT(BIT(res,3))) | (NOT(BIT(res,3)) & BIT(rd,3)));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & NOT(BIT(rr,7)) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, (BIT(rd,7) & BIT(rr,7)) | (BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(res,7)) & BIT(rd,7)));
+ break;
+ }
+ break;
+ case 0x1000:
+ switch(op & 0x0c00)
+ {
+ case 0x0000: // CPSE Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ if (rd == rr)
+ {
+ op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ opcycles += is_long_opcode(op) ? 2 : 1;
+ m_pc += is_long_opcode(op) ? 2 : 1;
}
- break;
- case 0x0400: // CP Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- res = rd - rr;
- SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
- break;
- case 0x0800: // SUB Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- res = rd - rr;
- m_r[RD5(op)] = res;
- SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
- break;
- case 0x0c00: // ADC Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- res = rd + rr + SREG_R(AVR8_SREG_C);
- m_r[RD5(op)] = res;
- SREG_W(AVR8_SREG_H, (BIT(rd,3) & BIT(rr,3)) | (BIT(rr,3) & NOT(BIT(res,3))) | (NOT(BIT(res,3)) & BIT(rd,3)));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & NOT(BIT(rr,7)) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, (BIT(rd,7) & BIT(rr,7)) | (BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(res,7)) & BIT(rd,7)));
- break;
- }
- break;
- case 0x2000:
- switch(op & 0x0c00)
- {
- case 0x0000: // AND Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- rd &= rr;
- SREG_W(AVR8_SREG_V, 0);
- SREG_W(AVR8_SREG_N, BIT(rd,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
- m_r[RD5(op)] = rd;
- break;
- case 0x0400: // EOR Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- rd ^= rr;
- SREG_W(AVR8_SREG_V, 0);
- SREG_W(AVR8_SREG_N, BIT(rd,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
- m_r[RD5(op)] = rd;
- break;
- case 0x0800: // OR Rd,Rr
- rd = m_r[RD5(op)];
- rr = m_r[RR5(op)];
- rd |= rr;
- SREG_W(AVR8_SREG_V, 0);
- SREG_W(AVR8_SREG_N, BIT(rd,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
- m_r[RD5(op)] = rd;
- break;
- case 0x0c00: // MOV Rd,Rr
- m_r[RD5(op)] = m_r[RR5(op)];
- break;
- }
- break;
- case 0x3000: // CPI Rd,K
- rd = m_r[16 + RD4(op)];
- rr = KCONST8(op);
- res = rd - rr;
- SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
- break;
- case 0x4000: // SBCI Rd,K
- rd = m_r[16 + RD4(op)];
- rr = KCONST8(op);
- res = rd - (rr + SREG_R(AVR8_SREG_C));
- m_r[16 + RD4(op)] = res;
- SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? SREG_R(AVR8_SREG_Z) : 0);
- SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
- break;
- case 0x5000: // SUBI Rd,K
- rd = m_r[16 + RD4(op)];
- rr = KCONST8(op);
- res = rd - rr;
- m_r[16 + RD4(op)] = res;
- SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
- SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
- break;
- case 0x6000: // ORI Rd,K
- rd = m_r[16 + RD4(op)];
- rr = KCONST8(op);
- rd |= rr;
- SREG_W(AVR8_SREG_V, 0);
- SREG_W(AVR8_SREG_N, BIT(rd,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
- m_r[16 + RD4(op)] = rd;
- break;
- case 0x7000: // ANDI Rd,K
- rd = m_r[16 + RD4(op)];
- rr = KCONST8(op);
- rd &= rr;
- SREG_W(AVR8_SREG_V, 0);
- SREG_W(AVR8_SREG_N, BIT(rd,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
- m_r[16 + RD4(op)] = rd;
- break;
- case 0x8000:
- case 0xa000:
- switch(op & 0x0208)
- {
- case 0x0000: // LDD Rd,Z+q
- m_r[RD5(op)] = m_data->read_byte(ZREG + QCONST6(op));
- opcycles = 2;
- break;
- case 0x0008: // LDD Rd,Y+q
- m_r[RD5(op)] = m_data->read_byte(YREG + QCONST6(op));
- opcycles = 2;
- break;
- case 0x0200: // STD Z+q,Rr
- m_data->write_byte(ZREG + QCONST6(op), m_r[RD5(op)]);
- opcycles = 2;
- break;
- case 0x0208: // STD Y+q,Rr
- m_data->write_byte(YREG + QCONST6(op), m_r[RD5(op)]);
- opcycles = 2;
- break;
- }
- break;
- case 0x9000:
- switch(op & 0x0f00)
- {
- case 0x0000:
- case 0x0100:
- switch(op & 0x000f)
- {
- case 0x0000: // LDS Rd,k
- op <<= 16;
- m_pc++;
- m_shifted_pc += 2;
- op |= m_program->read_word(m_shifted_pc);
- m_r[RD5(op >> 16)] = m_data->read_byte(op & 0x0000ffff);
- opcycles = 2;
- break;
- case 0x0001: // LD Rd,Z+
- pd = ZREG;
- m_r[RD5(op)] = m_data->read_byte(pd);
- pd++;
- m_r[31] = (pd >> 8) & 0x00ff;
- m_r[30] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x0002: // LD Rd,-Z
- pd = ZREG;
- pd--;
- m_r[RD5(op)] = m_data->read_byte(pd);
- m_r[31] = (pd >> 8) & 0x00ff;
- m_r[30] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x0004: // LPM Rd,Z
- m_r[RD5(op)] = m_program->read_byte(ZREG);
- opcycles = 3;
- break;
- case 0x0005: // LPM Rd,Z+
- pd = ZREG;
- m_r[RD5(op)] = m_program->read_byte(pd);
- pd++;
- m_r[31] = (pd >> 8) & 0x00ff;
- m_r[30] = pd & 0x00ff;
- opcycles = 3;
- break;
- case 0x0006: // ELPM Rd,Z
- //output += sprintf( output, "ELPM R%d, Z", RD5(op) );
- unimplemented_opcode(op);
- break;
- case 0x0007: // ELPM Rd,Z+
- //output += sprintf( output, "ELPM R%d, Z+", RD5(op) );
- unimplemented_opcode(op);
- break;
- case 0x0009: // LD Rd,Y+
- pd = YREG;
- m_r[RD5(op)] = m_data->read_byte(pd);
- pd++;
- m_r[29] = (pd >> 8) & 0x00ff;
- m_r[28] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000a: // LD Rd,-Y
- pd = YREG;
- pd--;
- m_r[RD5(op)] = m_data->read_byte(pd);
- m_r[29] = (pd >> 8) & 0x00ff;
- m_r[28] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000c: // LD Rd,X
- m_r[RD5(op)] = m_data->read_byte(XREG);
- opcycles = 2;
- break;
- case 0x000d: // LD Rd,X+
- pd = XREG;
- m_r[RD5(op)] = m_data->read_byte(pd);
- pd++;
- m_r[27] = (pd >> 8) & 0x00ff;
- m_r[26] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000e: // LD Rd,-X
- pd = XREG;
- pd--;
- m_r[RD5(op)] = m_data->read_byte(pd);
- m_r[27] = (pd >> 8) & 0x00ff;
- m_r[26] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000f: // POP Rd
- m_r[RD5(op)] = pop();
- opcycles = 2;
- break;
- default:
- unimplemented_opcode(op);
- //output += sprintf( output, "Undefined (%04x)", op );
- break;
- }
- break;
- case 0x0200:
- case 0x0300:
- switch(op & 0x000f)
- {
- case 0x0000: // STS k,Rr
- op <<= 16;
- m_pc++;
- m_shifted_pc += 2;
- op |= m_program->read_word(m_shifted_pc);
- m_data->write_byte(op & 0x0000ffff, m_r[RD5(op >> 16)]);
- opcycles = 2;
- break;
- case 0x0001: // ST Z+,Rd
- pd = ZREG;
- m_data->write_byte(pd, m_r[RD5(op)]);
- pd++;
- m_r[31] = (pd >> 8) & 0x00ff;
- m_r[30] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x0002: // ST -Z,Rd
- pd = ZREG;
- pd--;
- m_data->write_byte(pd, m_r[RD5(op)]);
- m_r[31] = (pd >> 8) & 0x00ff;
- m_r[30] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x0009: // ST Y+,Rd
- pd = YREG;
- m_data->write_byte(pd, m_r[RD5(op)]);
- pd++;
- m_r[29] = (pd >> 8) & 0x00ff;
- m_r[28] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000a: // ST -Y,Rd
- pd = YREG;
- pd--;
- m_data->write_byte(pd, m_r[RD5(op)]);
- m_r[29] = (pd >> 8) & 0x00ff;
- m_r[28] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000c: // ST X,Rd
- m_data->write_byte(XREG, m_r[RD5(op)]);
- break;
- case 0x000d: // ST X+,Rd
- pd = XREG;
- m_data->write_byte(pd, m_r[RD5(op)]);
- pd++;
- m_r[27] = (pd >> 8) & 0x00ff;
- m_r[26] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000e: // ST -X,Rd
- pd = XREG;
- pd--;
- m_data->write_byte(pd, m_r[RD5(op)]);
- m_r[27] = (pd >> 8) & 0x00ff;
- m_r[26] = pd & 0x00ff;
- opcycles = 2;
- break;
- case 0x000f: // PUSH Rd
- push(m_r[RD5(op)]);
- opcycles = 2;
- break;
- default:
- unimplemented_opcode(op);
- //output += sprintf( output, "Undefined (%04x)", op );
- break;
- }
- break;
- case 0x0400:
- switch(op & 0x000f)
- {
- case 0x0000: // COM Rd
- rd = m_r[RD5(op)];
- res = ~rd;
- SREG_W(AVR8_SREG_C, 1);
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_V, 0);
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0001: // NEG Rd
- rd = m_r[RD5(op)];
- res = 0 - rd;
- SREG_W(AVR8_SREG_C, (res == 0) ? 0 : 1);
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_V, (res == 0x80) ? 1 : 0);
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_H, BIT(res,3) | BIT(rd,3));
- m_r[RD5(op)] = res;
- break;
- case 0x0002: // SWAP Rd
- rd = m_r[RD5(op)];
- m_r[RD5(op)] = (rd >> 4) | (rd << 4);
- break;
- case 0x0003: // INC Rd
- rd = m_r[RD5(op)];
- res = rd + 1;
- SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- m_r[RD5(op)] = res;
- break;
- case 0x0005: // ASR Rd
- rd = m_r[RD5(op)];
- res = (rd & 0x80) | (rd >> 1);
- SREG_W(AVR8_SREG_C, BIT(rd,0));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(rd,7));
- SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0006: // LSR Rd
- rd = m_r[RD5(op)];
- res = rd >> 1;
- SREG_W(AVR8_SREG_C, BIT(rd,0));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
- SREG_W(AVR8_SREG_N, 0);
- SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0007: // ROR Rd
- rd = m_r[RD5(op)];
- res = rd >> 1;
- res |= (SREG_R(AVR8_SREG_C) << 7);
- SREG_W(AVR8_SREG_C, BIT(rd,0));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0008:
- switch(op & 0x00f0)
- {
- case 0x0000: // SEC
- case 0x0010: // SEZ
- case 0x0020: // SEN
- case 0x0030: // SEV
- case 0x0040: // SES
- case 0x0050: // SEH
- case 0x0060: // SET
- case 0x0070: // SEI
- SREG_W((op >> 4) & 0x07, 1);
- break;
- case 0x0080: // CLC
- case 0x0090: // CLZ
- case 0x00a0: // CLN
- case 0x00b0: // CLV
- case 0x00c0: // CLS
- case 0x00d0: // CLH
- case 0x00e0: // CLT
- case 0x00f0: // CLI
- SREG_W((op >> 4) & 0x07, 0);
- break;
- }
- break;
- case 0x0009:
- switch(op & 0x00f0)
- {
- case 0x0000: // IJMP
- m_pc = ZREG - 1;
- opcycles = 2;
- break;
- case 0x0010: // EIJMP
- //output += sprintf( output, "EIJMP" );
- unimplemented_opcode(op);
- break;
- default:
- //output += sprintf( output, "Undefined (%04x)", op );
- unimplemented_opcode(op);
- break;
- }
- break;
- case 0x000a: // DEC Rd
- rd = m_r[RD5(op)];
- res = rd - 1;
- SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- m_r[RD5(op)] = res;
- break;
- case 0x000c:
- case 0x000d: // JMP k
+ break;
+ case 0x0400: // CP Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ res = rd - rr;
+ SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
+ break;
+ case 0x0800: // SUB Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ res = rd - rr;
+ m_r[RD5(op)] = res;
+ SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
+ break;
+ case 0x0c00: // ADC Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ res = rd + rr + SREG_R(AVR8_SREG_C);
+ m_r[RD5(op)] = res;
+ SREG_W(AVR8_SREG_H, (BIT(rd,3) & BIT(rr,3)) | (BIT(rr,3) & NOT(BIT(res,3))) | (NOT(BIT(res,3)) & BIT(rd,3)));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & NOT(BIT(rr,7)) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, (BIT(rd,7) & BIT(rr,7)) | (BIT(rr,7) & NOT(BIT(res,7))) | (NOT(BIT(res,7)) & BIT(rd,7)));
+ break;
+ }
+ break;
+ case 0x2000:
+ switch(op & 0x0c00)
+ {
+ case 0x0000: // AND Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ rd &= rr;
+ SREG_W(AVR8_SREG_V, 0);
+ SREG_W(AVR8_SREG_N, BIT(rd,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
+ m_r[RD5(op)] = rd;
+ break;
+ case 0x0400: // EOR Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ rd ^= rr;
+ SREG_W(AVR8_SREG_V, 0);
+ SREG_W(AVR8_SREG_N, BIT(rd,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
+ m_r[RD5(op)] = rd;
+ break;
+ case 0x0800: // OR Rd,Rr
+ rd = m_r[RD5(op)];
+ rr = m_r[RR5(op)];
+ rd |= rr;
+ SREG_W(AVR8_SREG_V, 0);
+ SREG_W(AVR8_SREG_N, BIT(rd,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
+ m_r[RD5(op)] = rd;
+ break;
+ case 0x0c00: // MOV Rd,Rr
+ m_r[RD5(op)] = m_r[RR5(op)];
+ break;
+ }
+ break;
+ case 0x3000: // CPI Rd,K
+ rd = m_r[16 + RD4(op)];
+ rr = KCONST8(op);
+ res = rd - rr;
+ SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
+ break;
+ case 0x4000: // SBCI Rd,K
+ rd = m_r[16 + RD4(op)];
+ rr = KCONST8(op);
+ res = rd - (rr + SREG_R(AVR8_SREG_C));
+ m_r[16 + RD4(op)] = res;
+ SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? SREG_R(AVR8_SREG_Z) : 0);
+ SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
+ break;
+ case 0x5000: // SUBI Rd,K
+ rd = m_r[16 + RD4(op)];
+ rr = KCONST8(op);
+ res = rd - rr;
+ m_r[16 + RD4(op)] = res;
+ SREG_W(AVR8_SREG_H, (NOT(BIT(rd,3)) & BIT(rr,3)) | (BIT(rr,3) & BIT(res,3)) | (BIT(res,3) & NOT(BIT(rd,3))));
+ SREG_W(AVR8_SREG_V, (BIT(rd,7) & NOT(BIT(rr,7)) & NOT(BIT(res,7))) | (NOT(BIT(rd,7)) & BIT(rr,7) & BIT(res,7)));
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, (NOT(BIT(rd,7)) & BIT(rr,7)) | (BIT(rr,7) & BIT(res,7)) | (BIT(res,7) & NOT(BIT(rd,7))));
+ break;
+ case 0x6000: // ORI Rd,K
+ rd = m_r[16 + RD4(op)];
+ rr = KCONST8(op);
+ rd |= rr;
+ SREG_W(AVR8_SREG_V, 0);
+ SREG_W(AVR8_SREG_N, BIT(rd,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
+ m_r[16 + RD4(op)] = rd;
+ break;
+ case 0x7000: // ANDI Rd,K
+ rd = m_r[16 + RD4(op)];
+ rr = KCONST8(op);
+ rd &= rr;
+ SREG_W(AVR8_SREG_V, 0);
+ SREG_W(AVR8_SREG_N, BIT(rd,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (rd == 0) ? 1 : 0);
+ m_r[16 + RD4(op)] = rd;
+ break;
+ case 0x8000:
+ case 0xa000:
+ switch(op & 0x0208)
+ {
+ case 0x0000: // LDD Rd,Z+q
+ m_r[RD5(op)] = m_data->read_byte(ZREG + QCONST6(op));
+ opcycles = 2;
+ break;
+ case 0x0008: // LDD Rd,Y+q
+ m_r[RD5(op)] = m_data->read_byte(YREG + QCONST6(op));
+ opcycles = 2;
+ break;
+ case 0x0200: // STD Z+q,Rr
+ m_data->write_byte(ZREG + QCONST6(op), m_r[RD5(op)]);
+ opcycles = 2;
+ break;
+ case 0x0208: // STD Y+q,Rr
+ m_data->write_byte(YREG + QCONST6(op), m_r[RD5(op)]);
+ opcycles = 2;
+ break;
+ }
+ break;
+ case 0x9000:
+ switch(op & 0x0f00)
+ {
+ case 0x0000:
+ case 0x0100:
+ switch(op & 0x000f)
+ {
+ case 0x0000: // LDS Rd,k
+ op <<= 16;
+ m_pc++;
+ m_shifted_pc += 2;
+ op |= m_program->read_word(m_shifted_pc);
+ m_r[RD5(op >> 16)] = m_data->read_byte(op & 0x0000ffff);
+ opcycles = 2;
+ break;
+ case 0x0001: // LD Rd,Z+
+ pd = ZREG;
+ m_r[RD5(op)] = m_data->read_byte(pd);
+ pd++;
+ m_r[31] = (pd >> 8) & 0x00ff;
+ m_r[30] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x0002: // LD Rd,-Z
+ pd = ZREG;
+ pd--;
+ m_r[RD5(op)] = m_data->read_byte(pd);
+ m_r[31] = (pd >> 8) & 0x00ff;
+ m_r[30] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x0004: // LPM Rd,Z
+ m_r[RD5(op)] = m_program->read_byte(ZREG);
+ opcycles = 3;
+ break;
+ case 0x0005: // LPM Rd,Z+
+ pd = ZREG;
+ m_r[RD5(op)] = m_program->read_byte(pd);
+ pd++;
+ m_r[31] = (pd >> 8) & 0x00ff;
+ m_r[30] = pd & 0x00ff;
+ opcycles = 3;
+ break;
+ case 0x0006: // ELPM Rd,Z
+ //output += sprintf( output, "ELPM R%d, Z", RD5(op) );
+ unimplemented_opcode(op);
+ break;
+ case 0x0007: // ELPM Rd,Z+
+ //output += sprintf( output, "ELPM R%d, Z+", RD5(op) );
+ unimplemented_opcode(op);
+ break;
+ case 0x0009: // LD Rd,Y+
+ pd = YREG;
+ m_r[RD5(op)] = m_data->read_byte(pd);
+ pd++;
+ m_r[29] = (pd >> 8) & 0x00ff;
+ m_r[28] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000a: // LD Rd,-Y
+ pd = YREG;
+ pd--;
+ m_r[RD5(op)] = m_data->read_byte(pd);
+ m_r[29] = (pd >> 8) & 0x00ff;
+ m_r[28] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000c: // LD Rd,X
+ m_r[RD5(op)] = m_data->read_byte(XREG);
+ opcycles = 2;
+ break;
+ case 0x000d: // LD Rd,X+
+ pd = XREG;
+ m_r[RD5(op)] = m_data->read_byte(pd);
+ pd++;
+ m_r[27] = (pd >> 8) & 0x00ff;
+ m_r[26] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000e: // LD Rd,-X
+ pd = XREG;
+ pd--;
+ m_r[RD5(op)] = m_data->read_byte(pd);
+ m_r[27] = (pd >> 8) & 0x00ff;
+ m_r[26] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000f: // POP Rd
+ m_r[RD5(op)] = pop();
+ opcycles = 2;
+ break;
+ default:
+ unimplemented_opcode(op);
+ //output += sprintf( output, "Undefined (%04x)", op );
+ break;
+ }
+ break;
+ case 0x0200:
+ case 0x0300:
+ switch(op & 0x000f)
+ {
+ case 0x0000: // STS k,Rr
+ op <<= 16;
+ m_pc++;
+ m_shifted_pc += 2;
+ op |= m_program->read_word(m_shifted_pc);
+ m_data->write_byte(op & 0x0000ffff, m_r[RD5(op >> 16)]);
+ opcycles = 2;
+ break;
+ case 0x0001: // ST Z+,Rd
+ pd = ZREG;
+ m_data->write_byte(pd, m_r[RD5(op)]);
+ pd++;
+ m_r[31] = (pd >> 8) & 0x00ff;
+ m_r[30] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x0002: // ST -Z,Rd
+ pd = ZREG;
+ pd--;
+ m_data->write_byte(pd, m_r[RD5(op)]);
+ m_r[31] = (pd >> 8) & 0x00ff;
+ m_r[30] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x0009: // ST Y+,Rd
+ pd = YREG;
+ m_data->write_byte(pd, m_r[RD5(op)]);
+ pd++;
+ m_r[29] = (pd >> 8) & 0x00ff;
+ m_r[28] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000a: // ST -Y,Rd
+ pd = YREG;
+ pd--;
+ m_data->write_byte(pd, m_r[RD5(op)]);
+ m_r[29] = (pd >> 8) & 0x00ff;
+ m_r[28] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000c: // ST X,Rd
+ m_data->write_byte(XREG, m_r[RD5(op)]);
+ break;
+ case 0x000d: // ST X+,Rd
+ pd = XREG;
+ m_data->write_byte(pd, m_r[RD5(op)]);
+ pd++;
+ m_r[27] = (pd >> 8) & 0x00ff;
+ m_r[26] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000e: // ST -X,Rd
+ pd = XREG;
+ pd--;
+ m_data->write_byte(pd, m_r[RD5(op)]);
+ m_r[27] = (pd >> 8) & 0x00ff;
+ m_r[26] = pd & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x000f: // PUSH Rd
+ push(m_r[RD5(op)]);
+ opcycles = 2;
+ break;
+ default:
+ unimplemented_opcode(op);
+ //output += sprintf( output, "Undefined (%04x)", op );
+ break;
+ }
+ break;
+ case 0x0400:
+ switch(op & 0x000f)
+ {
+ case 0x0000: // COM Rd
+ rd = m_r[RD5(op)];
+ res = ~rd;
+ SREG_W(AVR8_SREG_C, 1);
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_V, 0);
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0001: // NEG Rd
+ rd = m_r[RD5(op)];
+ res = 0 - rd;
+ SREG_W(AVR8_SREG_C, (res == 0) ? 0 : 1);
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_V, (res == 0x80) ? 1 : 0);
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_H, BIT(res,3) | BIT(rd,3));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0002: // SWAP Rd
+ rd = m_r[RD5(op)];
+ m_r[RD5(op)] = (rd >> 4) | (rd << 4);
+ break;
+ case 0x0003: // INC Rd
+ rd = m_r[RD5(op)];
+ res = rd + 1;
+ SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0005: // ASR Rd
+ rd = m_r[RD5(op)];
+ res = (rd & 0x80) | (rd >> 1);
+ SREG_W(AVR8_SREG_C, BIT(rd,0));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(rd,7));
+ SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0006: // LSR Rd
+ rd = m_r[RD5(op)];
+ res = rd >> 1;
+ SREG_W(AVR8_SREG_C, BIT(rd,0));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
+ SREG_W(AVR8_SREG_N, 0);
+ SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0007: // ROR Rd
+ rd = m_r[RD5(op)];
+ res = rd >> 1;
+ res |= (SREG_R(AVR8_SREG_C) << 7);
+ SREG_W(AVR8_SREG_C, BIT(rd,0));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0008:
+ switch(op & 0x00f0)
+ {
+ case 0x0000: // SEC
+ case 0x0010: // SEZ
+ case 0x0020: // SEN
+ case 0x0030: // SEV
+ case 0x0040: // SES
+ case 0x0050: // SEH
+ case 0x0060: // SET
+ case 0x0070: // SEI
+ SREG_W((op >> 4) & 0x07, 1);
+ break;
+ case 0x0080: // CLC
+ case 0x0090: // CLZ
+ case 0x00a0: // CLN
+ case 0x00b0: // CLV
+ case 0x00c0: // CLS
+ case 0x00d0: // CLH
+ case 0x00e0: // CLT
+ case 0x00f0: // CLI
+ SREG_W((op >> 4) & 0x07, 0);
+ break;
+ }
+ break;
+ case 0x0009:
+ switch(op & 0x00f0)
+ {
+ case 0x0000: // IJMP
+ m_pc = ZREG - 1;
+ opcycles = 2;
+ break;
+ case 0x0010: // EIJMP
+ //output += sprintf( output, "EIJMP" );
+ unimplemented_opcode(op);
+ break;
+ default:
+ //output += sprintf( output, "Undefined (%04x)", op );
+ unimplemented_opcode(op);
+ break;
+ }
+ break;
+ case 0x000a: // DEC Rd
+ rd = m_r[RD5(op)];
+ res = rd - 1;
+ SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ m_r[RD5(op)] = res;
+ break;
+ case 0x000c:
+ case 0x000d: // JMP k
offs = KCONST22(op) << 16;
- m_pc++;
- m_shifted_pc += 2;
- offs |= m_program->read_word(m_shifted_pc);
- m_pc = offs;
+ m_pc++;
+ m_shifted_pc += 2;
+ offs |= m_program->read_word(m_shifted_pc);
+ m_pc = offs;
m_pc--;
opcycles = 3;
- break;
- case 0x000e: // CALL k
- case 0x000f:
+ break;
+ case 0x000e: // CALL k
+ case 0x000f:
push((m_pc + 2) & 0x00ff);
push(((m_pc + 2) >> 8) & 0x00ff);
offs = KCONST22(op) << 16;
- m_pc++;
- m_shifted_pc += 2;
- offs |= m_program->read_word(m_shifted_pc);
- m_pc = offs;
+ m_pc++;
+ m_shifted_pc += 2;
+ offs |= m_program->read_word(m_shifted_pc);
+ m_pc = offs;
m_pc--;
opcycles = 4;
- break;
- default:
- unimplemented_opcode(op);
- //output += sprintf( output, "Undefined (%04x)", op );
- break;
- }
- break;
- case 0x0500:
- switch(op & 0x000f)
- {
- case 0x0000: // COM Rd
- rd = m_r[RD5(op)];
- res = ~rd;
- SREG_W(AVR8_SREG_C, 1);
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_V, 0);
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0001: // NEG Rd
- rd = m_r[RD5(op)];
- res = 0 - rd;
- SREG_W(AVR8_SREG_C, (res == 0) ? 0 : 1);
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_V, (res == 0x80) ? 1 : 0);
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_H, BIT(res,3) | BIT(rd,3));
- m_r[RD5(op)] = res;
- break;
- case 0x0002: // SWAP Rd
- rd = m_r[RD5(op)];
- m_r[RD5(op)] = (rd >> 4) | (rd << 4);
- break;
- case 0x0003: // INC Rd
- rd = m_r[RD5(op)];
- res = rd + 1;
- SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- m_r[RD5(op)] = res;
- break;
- case 0x0005: // ASR Rd
- rd = m_r[RD5(op)];
- res = (rd & 0x80) | (rd >> 1);
- SREG_W(AVR8_SREG_C, BIT(rd,0));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(rd,7));
- SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0006: // LSR Rd
- rd = m_r[RD5(op)];
- res = rd >> 1;
- SREG_W(AVR8_SREG_C, BIT(rd,0));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
- SREG_W(AVR8_SREG_N, 0);
- SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0007: // ROR Rd
- rd = m_r[RD5(op)];
- res = rd >> 1;
- res |= (SREG_R(AVR8_SREG_C) << 7);
- SREG_W(AVR8_SREG_C, BIT(rd,0));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- m_r[RD5(op)] = res;
- break;
- case 0x0008:
- switch(op & 0x00f0)
- {
- case 0x0000: // RET
- m_pc = pop() << 8;
- m_pc |= pop();
- m_pc--;
- opcycles = 4;
- break;
- case 0x0010: // RETI
- m_pc = pop() << 8;
- m_pc |= pop();
- m_pc--;
- SREG_W(AVR8_SREG_I, 1);
- opcycles = 4;
- break;
- case 0x0080: // SLEEP
- //output += sprintf( output, "SLEEP" );
- unimplemented_opcode(op);
- break;
- case 0x0090: // BREAK
- //output += sprintf( output, "BREAK" );
- unimplemented_opcode(op);
- break;
- case 0x00a0: // WDR
- //output += sprintf( output, "WDR" );
- unimplemented_opcode(op);
- break;
- case 0x00c0: // LPM
- m_r[0] = m_program->read_byte(ZREG);
- opcycles = 3;
- break;
- case 0x00d0: // ELPM
- //output += sprintf( output, "ELPM" );
- unimplemented_opcode(op);
- break;
- case 0x00e0: // SPM
- //output += sprintf( output, "SPM" );
- unimplemented_opcode(op);
- break;
- case 0x00f0: // SPM Z+
- //output += sprintf( output, "SPM Z+" );
- unimplemented_opcode(op);
- break;
- default:
- unimplemented_opcode(op);
- //output += sprintf( output, "Undefined (%04x)", op );
- break;
- }
- break;
- case 0x0009:
- switch(op & 0x00f0)
- {
- case 0x0000: // ICALL
- push((m_pc + 1) & 0x00ff);
- push(((m_pc + 1) >> 8) & 0x00ff);
- m_pc = ZREG;
- m_pc--;
- opcycles = 3;
- break;
- case 0x0010: // EICALL
- //output += sprintf( output, "EICALL" );
- unimplemented_opcode(op);
- break;
- default:
- unimplemented_opcode(op);
- //output += sprintf( output, "Undefined (%04x)", op );
- break;
- }
- break;
- case 0x000a: // DEC Rd
- rd = m_r[RD5(op)];
- res = rd - 1;
- SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
- SREG_W(AVR8_SREG_N, BIT(res,7));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
- m_r[RD5(op)] = res;
- break;
- case 0x000c:
- case 0x000d: // JMP k
- //op <<= 8;
- //op |= oprom[pos++];
- //op <<= 8;
- //op |= oprom[pos++];
- //output += sprintf( output, "JMP 0x%06x", KCONST22(op) );
- unimplemented_opcode(op);
- break;
- case 0x000e:
- case 0x000f: // CALL k
- //op <<= 8;
- //op |= oprom[pos++];
- //op <<= 8;
- //op |= oprom[pos++];
- //output += sprintf( output, "CALL 0x%06x", KCONST22(op) );
- unimplemented_opcode(op);
- break;
- }
- break;
- case 0x0600: // ADIW Rd+1:Rd,K
- rd = m_r[24 + (DCONST(op) << 1)];
- rr = m_r[25 + (DCONST(op) << 1)];
- pd = rd;
- pd |= rr << 8;
- pd += KCONST6(op);
- SREG_W(AVR8_SREG_V, BIT(pd,15) & NOT(BIT(rr,7)));
- SREG_W(AVR8_SREG_N, BIT(pd,15));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (pd == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, NOT(BIT(pd,15)) & BIT(rr,7));
- m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff;
- m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff;
- opcycles = 2;
- break;
- case 0x0700: // SBIW Rd+1:Rd,K
- rd = m_r[24 + (DCONST(op) << 1)];
- rr = m_r[25 + (DCONST(op) << 1)];
- pd = rd;
- pd |= rr << 8;
- pd -= KCONST6(op);
- SREG_W(AVR8_SREG_V, NOT(BIT(pd,15)) & BIT(rr,7));
- SREG_W(AVR8_SREG_N, BIT(pd,15));
- SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
- SREG_W(AVR8_SREG_Z, (pd == 0) ? 1 : 0);
- SREG_W(AVR8_SREG_C, BIT(pd,15) & NOT(BIT(rr,7)));
- m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff;
- m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff;
- opcycles = 2;
- break;
- case 0x0800: // CBI A,b
- //output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
- m_data->write_byte(32 + ACONST5(op), m_data->read_byte(32 + ACONST5(op)) &~ (1 << RR3(op)));
- opcycles = 2;
- break;
- case 0x0900: // SBIC A,b
- if(NOT(BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op))))
- {
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ break;
+ default:
+ unimplemented_opcode(op);
+ //output += sprintf( output, "Undefined (%04x)", op );
+ break;
+ }
+ break;
+ case 0x0500:
+ switch(op & 0x000f)
+ {
+ case 0x0000: // COM Rd
+ rd = m_r[RD5(op)];
+ res = ~rd;
+ SREG_W(AVR8_SREG_C, 1);
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_V, 0);
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0001: // NEG Rd
+ rd = m_r[RD5(op)];
+ res = 0 - rd;
+ SREG_W(AVR8_SREG_C, (res == 0) ? 0 : 1);
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_V, (res == 0x80) ? 1 : 0);
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_H, BIT(res,3) | BIT(rd,3));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0002: // SWAP Rd
+ rd = m_r[RD5(op)];
+ m_r[RD5(op)] = (rd >> 4) | (rd << 4);
+ break;
+ case 0x0003: // INC Rd
+ rd = m_r[RD5(op)];
+ res = rd + 1;
+ SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0005: // ASR Rd
+ rd = m_r[RD5(op)];
+ res = (rd & 0x80) | (rd >> 1);
+ SREG_W(AVR8_SREG_C, BIT(rd,0));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(rd,7));
+ SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0006: // LSR Rd
+ rd = m_r[RD5(op)];
+ res = rd >> 1;
+ SREG_W(AVR8_SREG_C, BIT(rd,0));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
+ SREG_W(AVR8_SREG_N, 0);
+ SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0007: // ROR Rd
+ rd = m_r[RD5(op)];
+ res = rd >> 1;
+ res |= (SREG_R(AVR8_SREG_C) << 7);
+ SREG_W(AVR8_SREG_C, BIT(rd,0));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 :0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_V, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_C));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ m_r[RD5(op)] = res;
+ break;
+ case 0x0008:
+ switch(op & 0x00f0)
+ {
+ case 0x0000: // RET
+ m_pc = pop() << 8;
+ m_pc |= pop();
+ m_pc--;
+ opcycles = 4;
+ break;
+ case 0x0010: // RETI
+ m_pc = pop() << 8;
+ m_pc |= pop();
+ m_pc--;
+ SREG_W(AVR8_SREG_I, 1);
+ opcycles = 4;
+ break;
+ case 0x0080: // SLEEP
+ //output += sprintf( output, "SLEEP" );
+ unimplemented_opcode(op);
+ break;
+ case 0x0090: // BREAK
+ //output += sprintf( output, "BREAK" );
+ unimplemented_opcode(op);
+ break;
+ case 0x00a0: // WDR
+ //output += sprintf( output, "WDR" );
+ unimplemented_opcode(op);
+ break;
+ case 0x00c0: // LPM
+ m_r[0] = m_program->read_byte(ZREG);
+ opcycles = 3;
+ break;
+ case 0x00d0: // ELPM
+ //output += sprintf( output, "ELPM" );
+ unimplemented_opcode(op);
+ break;
+ case 0x00e0: // SPM
+ //output += sprintf( output, "SPM" );
+ unimplemented_opcode(op);
+ break;
+ case 0x00f0: // SPM Z+
+ //output += sprintf( output, "SPM Z+" );
+ unimplemented_opcode(op);
+ break;
+ default:
+ unimplemented_opcode(op);
+ //output += sprintf( output, "Undefined (%04x)", op );
+ break;
+ }
+ break;
+ case 0x0009:
+ switch(op & 0x00f0)
+ {
+ case 0x0000: // ICALL
+ push((m_pc + 1) & 0x00ff);
+ push(((m_pc + 1) >> 8) & 0x00ff);
+ m_pc = ZREG;
+ m_pc--;
+ opcycles = 3;
+ break;
+ case 0x0010: // EICALL
+ //output += sprintf( output, "EICALL" );
+ unimplemented_opcode(op);
+ break;
+ default:
+ unimplemented_opcode(op);
+ //output += sprintf( output, "Undefined (%04x)", op );
+ break;
+ }
+ break;
+ case 0x000a: // DEC Rd
+ rd = m_r[RD5(op)];
+ res = rd - 1;
+ SREG_W(AVR8_SREG_V, (rd == 0x7f) ? 1 : 0);
+ SREG_W(AVR8_SREG_N, BIT(res,7));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (res == 0) ? 1 : 0);
+ m_r[RD5(op)] = res;
+ break;
+ case 0x000c:
+ case 0x000d: // JMP k
+ //op <<= 8;
+ //op |= oprom[pos++];
+ //op <<= 8;
+ //op |= oprom[pos++];
+ //output += sprintf( output, "JMP 0x%06x", KCONST22(op) );
+ unimplemented_opcode(op);
+ break;
+ case 0x000e:
+ case 0x000f: // CALL k
+ //op <<= 8;
+ //op |= oprom[pos++];
+ //op <<= 8;
+ //op |= oprom[pos++];
+ //output += sprintf( output, "CALL 0x%06x", KCONST22(op) );
+ unimplemented_opcode(op);
+ break;
+ }
+ break;
+ case 0x0600: // ADIW Rd+1:Rd,K
+ rd = m_r[24 + (DCONST(op) << 1)];
+ rr = m_r[25 + (DCONST(op) << 1)];
+ pd = rd;
+ pd |= rr << 8;
+ pd += KCONST6(op);
+ SREG_W(AVR8_SREG_V, BIT(pd,15) & NOT(BIT(rr,7)));
+ SREG_W(AVR8_SREG_N, BIT(pd,15));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (pd == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, NOT(BIT(pd,15)) & BIT(rr,7));
+ m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff;
+ m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x0700: // SBIW Rd+1:Rd,K
+ rd = m_r[24 + (DCONST(op) << 1)];
+ rr = m_r[25 + (DCONST(op) << 1)];
+ pd = rd;
+ pd |= rr << 8;
+ pd -= KCONST6(op);
+ SREG_W(AVR8_SREG_V, NOT(BIT(pd,15)) & BIT(rr,7));
+ SREG_W(AVR8_SREG_N, BIT(pd,15));
+ SREG_W(AVR8_SREG_S, SREG_R(AVR8_SREG_N) ^ SREG_R(AVR8_SREG_V));
+ SREG_W(AVR8_SREG_Z, (pd == 0) ? 1 : 0);
+ SREG_W(AVR8_SREG_C, BIT(pd,15) & NOT(BIT(rr,7)));
+ m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff;
+ m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff;
+ opcycles = 2;
+ break;
+ case 0x0800: // CBI A,b
+ //output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
+ m_data->write_byte(32 + ACONST5(op), m_data->read_byte(32 + ACONST5(op)) &~ (1 << RR3(op)));
+ opcycles = 2;
+ break;
+ case 0x0900: // SBIC A,b
+ if(NOT(BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op))))
+ {
+ op = (UINT32)m_program->read_word(m_shifted_pc + 2);
opcycles = is_long_opcode(op) ? 3 : 2;
- m_pc += is_long_opcode(op) ? 2 : 1;
+ m_pc += is_long_opcode(op) ? 2 : 1;
}
- break;
- case 0x0a00: // SBI A,b
- m_data->write_byte(32 + ACONST5(op), m_data->read_byte(32 + ACONST5(op)) | (1 << RR3(op)));
- opcycles = 2;
- break;
- case 0x0b00: // SBIS A,b
- if(BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op)))
- {
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ break;
+ case 0x0a00: // SBI A,b
+ m_data->write_byte(32 + ACONST5(op), m_data->read_byte(32 + ACONST5(op)) | (1 << RR3(op)));
+ opcycles = 2;
+ break;
+ case 0x0b00: // SBIS A,b
+ if(BIT(m_data->read_byte(32 + ACONST5(op)), RR3(op)))
+ {
+ op = (UINT32)m_program->read_word(m_shifted_pc + 2);
opcycles = is_long_opcode(op) ? 3 : 2;
- m_pc += is_long_opcode(op) ? 2 : 1;
+ m_pc += is_long_opcode(op) ? 2 : 1;
+ }
+ break;
+ case 0x0c00:
+ case 0x0d00:
+ case 0x0e00:
+ case 0x0f00: // MUL Rd,Rr
+ sd = (UINT8)m_r[RD5(op)] * (UINT8)m_r[RR5(op)];
+ m_r[1] = (sd >> 8) & 0x00ff;
+ m_r[0] = sd & 0x00ff;
+ SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0);
+ SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0);
+ opcycles = 2;
+ break;
+ }
+ break;
+ case 0xb000:
+ if(op & 0x0800) // OUT A,Rr
+ {
+ m_data->write_byte(32 + ACONST6(op), m_r[RD5(op)]);
+ }
+ else // IN Rd,A
+ {
+ m_r[RD5(op)] = m_data->read_byte(0x20 + ACONST6(op));
+ }
+ break;
+ case 0xc000: // RJMP k
+ offs = (INT32)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
+ m_pc += offs;
+ opcycles = 2;
+ break;
+ case 0xd000: // RCALL k
+ offs = (INT32)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
+ push((m_pc + 1) & 0x00ff);
+ push(((m_pc + 1) >> 8) & 0x00ff);
+ m_pc += offs;
+ opcycles = 3;
+ break;
+ case 0xe000: // LDI Rd,K
+ m_r[16 + RD4(op)] = KCONST8(op);
+ break;
+ case 0xf000:
+ switch(op & 0x0c00)
+ {
+ case 0x0000: // BRLO through BRIE
+ if(SREG_R(op & 0x0007))
+ {
+ offs = (INT32)(KCONST7(op));
+ if(offs & 0x40)
+ {
+ offs |= 0xffffff80;
+ }
+ m_pc += offs;
+ opcycles = 2;
+ }
+ break;
+ case 0x0400: // BRSH through BRID
+ if(SREG_R(op & 0x0007) == 0)
+ {
+ offs = (INT32)(KCONST7(op));
+ if(offs & 0x40)
+ {
+ offs |= 0xffffff80;
+ }
+ m_pc += offs;
+ opcycles = 2;
}
- break;
- case 0x0c00:
- case 0x0d00:
- case 0x0e00:
- case 0x0f00: // MUL Rd,Rr
- sd = (UINT8)m_r[RD5(op)] * (UINT8)m_r[RR5(op)];
- m_r[1] = (sd >> 8) & 0x00ff;
- m_r[0] = sd & 0x00ff;
- SREG_W(AVR8_SREG_C, (sd & 0x8000) ? 1 : 0);
- SREG_W(AVR8_SREG_Z, (sd == 0) ? 1 : 0);
- opcycles = 2;
- break;
- }
- break;
- case 0xb000:
- if(op & 0x0800) // OUT A,Rr
- {
- m_data->write_byte(32 + ACONST6(op), m_r[RD5(op)]);
- }
- else // IN Rd,A
- {
- m_r[RD5(op)] = m_data->read_byte(0x20 + ACONST6(op));
- }
- break;
- case 0xc000: // RJMP k
- offs = (INT32)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
- m_pc += offs;
- opcycles = 2;
- break;
- case 0xd000: // RCALL k
- offs = (INT32)((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff));
- push((m_pc + 1) & 0x00ff);
- push(((m_pc + 1) >> 8) & 0x00ff);
- m_pc += offs;
- opcycles = 3;
- break;
- case 0xe000: // LDI Rd,K
- m_r[16 + RD4(op)] = KCONST8(op);
- break;
- case 0xf000:
- switch(op & 0x0c00)
- {
- case 0x0000: // BRLO through BRIE
- if(SREG_R(op & 0x0007))
- {
- offs = (INT32)(KCONST7(op));
- if(offs & 0x40)
- {
- offs |= 0xffffff80;
- }
- m_pc += offs;
- opcycles = 2;
- }
- break;
- case 0x0400: // BRSH through BRID
- if(SREG_R(op & 0x0007) == 0)
- {
- offs = (INT32)(KCONST7(op));
- if(offs & 0x40)
- {
- offs |= 0xffffff80;
- }
- m_pc += offs;
- opcycles = 2;
- }
- break;
- case 0x0800:
- if(op & 0x0200) // BST Rd, b
- {
- SREG_W(AVR8_SREG_T, (BIT(m_r[RD5(op)], RR3(op))) ? 1 : 0);
- }
- else // BLD Rd, b
- {
- if(SREG_R(AVR8_SREG_T))
- {
- m_r[RD5(op)] |= (1 << RR3(op));
- }
- else
- {
- m_r[RD5(op)] &= ~(1 << RR3(op));
- }
- }
- break;
- case 0x0c00:
- if(op & 0x0200) // SBRS Rd, b
- {
- if(BIT(m_r[RD5(op)], RR3(op)))
- {
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
- m_pc += is_long_opcode(op) ? 2 : 1;
- opcycles = is_long_opcode(op) ? 3 : 2;
- }
- }
- else // SBRC Rd, b
- {
- if(NOT(BIT(m_r[RD5(op)], RR3(op))))
- {
- op = (UINT32)m_program->read_word(m_shifted_pc + 2);
- m_pc += is_long_opcode(op) ? 2 : 1;
- opcycles = is_long_opcode(op) ? 3 : 2;
- }
- }
- break;
- }
- break;
- }
-
- m_pc++;
-
- m_shifted_pc = m_pc << 1;
-
- m_icount -= opcycles;
+ break;
+ case 0x0800:
+ if(op & 0x0200) // BST Rd, b
+ {
+ SREG_W(AVR8_SREG_T, (BIT(m_r[RD5(op)], RR3(op))) ? 1 : 0);
+ }
+ else // BLD Rd, b
+ {
+ if(SREG_R(AVR8_SREG_T))
+ {
+ m_r[RD5(op)] |= (1 << RR3(op));
+ }
+ else
+ {
+ m_r[RD5(op)] &= ~(1 << RR3(op));
+ }
+ }
+ break;
+ case 0x0c00:
+ if(op & 0x0200) // SBRS Rd, b
+ {
+ if(BIT(m_r[RD5(op)], RR3(op)))
+ {
+ op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ m_pc += is_long_opcode(op) ? 2 : 1;
+ opcycles = is_long_opcode(op) ? 3 : 2;
+ }
+ }
+ else // SBRC Rd, b
+ {
+ if(NOT(BIT(m_r[RD5(op)], RR3(op))))
+ {
+ op = (UINT32)m_program->read_word(m_shifted_pc + 2);
+ m_pc += is_long_opcode(op) ? 2 : 1;
+ opcycles = is_long_opcode(op) ? 3 : 2;
+ }
+ }
+ break;
+ }
+ break;
+ }
+
+ m_pc++;
+
+ m_shifted_pc = m_pc << 1;
+
+ m_icount -= opcycles;
timer_tick(opcycles);
- }
+ }
}
diff --git a/src/emu/cpu/avr8/avr8.h b/src/emu/cpu/avr8/avr8.h
index 5d5629ba2ae..d5490ef18db 100644
--- a/src/emu/cpu/avr8/avr8.h
+++ b/src/emu/cpu/avr8/avr8.h
@@ -114,25 +114,25 @@ protected:
const address_space_config m_program_config;
const address_space_config m_data_config;
const address_space_config m_io_config;
- UINT8 *m_eeprom;
+ UINT8 *m_eeprom;
// CPU registers
- UINT32 m_pc;
- UINT32 m_shifted_pc;
+ UINT32 m_pc;
+ UINT32 m_shifted_pc;
UINT8 m_r[256];
// internal timers
- UINT8 m_timer0_top;
+ UINT8 m_timer0_top;
INT32 m_timer0_increment;
UINT16 m_timer0_prescale;
UINT16 m_timer0_prescale_count;
- UINT16 m_timer1_top;
+ UINT16 m_timer1_top;
INT32 m_timer1_increment;
UINT16 m_timer1_prescale;
UINT16 m_timer1_prescale_count;
- UINT8 m_timer2_top;
+ UINT8 m_timer2_top;
INT32 m_timer2_increment;
UINT16 m_timer2_prescale;
UINT16 m_timer2_prescale_count;
@@ -142,7 +142,7 @@ protected:
UINT8 m_spi_prescale;
UINT8 m_spi_prescale_count;
INT8 m_spi_prescale_countdown;
- static const UINT8 spi_clock_divisor[8];
+ static const UINT8 spi_clock_divisor[8];
void enable_spi();
void disable_spi();
void spi_update_masterslave_select();
@@ -152,12 +152,12 @@ protected:
void change_spcr(UINT8 data);
void change_spsr(UINT8 data);
- // internal CPU state
+ // internal CPU state
UINT32 m_addr_mask;
bool m_interrupt_pending;
// other internal states
- int m_icount;
+ int m_icount;
UINT64 m_elapsed_cycles;
// memory access
@@ -211,9 +211,9 @@ protected:
void timer2_force_output_compare(int reg);
// address spaces
- address_space *m_program;
- address_space *m_data;
- address_space *m_io;
+ address_space *m_program;
+ address_space *m_data;
+ address_space *m_io;
};
// device type definition
@@ -246,104 +246,104 @@ public:
enum
{
- AVR8_SREG = 1,
- AVR8_PC,
- AVR8_R0,
- AVR8_R1,
- AVR8_R2,
- AVR8_R3,
- AVR8_R4,
- AVR8_R5,
- AVR8_R6,
- AVR8_R7,
- AVR8_R8,
- AVR8_R9,
- AVR8_R10,
- AVR8_R11,
- AVR8_R12,
- AVR8_R13,
- AVR8_R14,
- AVR8_R15,
- AVR8_R16,
- AVR8_R17,
- AVR8_R18,
- AVR8_R19,
- AVR8_R20,
- AVR8_R21,
- AVR8_R22,
- AVR8_R23,
- AVR8_R24,
- AVR8_R25,
- AVR8_R26,
- AVR8_R27,
- AVR8_R28,
- AVR8_R29,
- AVR8_R30,
- AVR8_R31,
- AVR8_X,
- AVR8_Y,
- AVR8_Z,
- AVR8_SP,
+ AVR8_SREG = 1,
+ AVR8_PC,
+ AVR8_R0,
+ AVR8_R1,
+ AVR8_R2,
+ AVR8_R3,
+ AVR8_R4,
+ AVR8_R5,
+ AVR8_R6,
+ AVR8_R7,
+ AVR8_R8,
+ AVR8_R9,
+ AVR8_R10,
+ AVR8_R11,
+ AVR8_R12,
+ AVR8_R13,
+ AVR8_R14,
+ AVR8_R15,
+ AVR8_R16,
+ AVR8_R17,
+ AVR8_R18,
+ AVR8_R19,
+ AVR8_R20,
+ AVR8_R21,
+ AVR8_R22,
+ AVR8_R23,
+ AVR8_R24,
+ AVR8_R25,
+ AVR8_R26,
+ AVR8_R27,
+ AVR8_R28,
+ AVR8_R29,
+ AVR8_R30,
+ AVR8_R31,
+ AVR8_X,
+ AVR8_Y,
+ AVR8_Z,
+ AVR8_SP,
};
enum
{
- AVR8_INT_RESET = 0,
- AVR8_INT_INT0,
- AVR8_INT_INT1,
- AVR8_INT_PCINT0,
- AVR8_INT_PCINT1,
- AVR8_INT_PCINT2,
- AVR8_INT_WDT,
- AVR8_INT_T2COMPA,
- AVR8_INT_T2COMPB,
- AVR8_INT_T2OVF,
- AVR8_INT_T1CAPT,
- AVR8_INT_T1COMPA,
- AVR8_INT_T1COMPB,
- AVR8_INT_T1OVF,
- AVR8_INT_T0COMPA,
- AVR8_INT_T0COMPB,
- AVR8_INT_T0OVF,
- AVR8_INT_SPI_STC,
- AVR8_INT_USART_RX,
- AVR8_INT_USART_UDRE,
- AVR8_INT_USART_TX,
- AVR8_INT_ADC,
- AVR8_INT_EE_RDY,
- AVR8_INT_ANALOG_COMP,
- AVR8_INT_TWI,
- AVR8_INT_SPM_RDY,
+ AVR8_INT_RESET = 0,
+ AVR8_INT_INT0,
+ AVR8_INT_INT1,
+ AVR8_INT_PCINT0,
+ AVR8_INT_PCINT1,
+ AVR8_INT_PCINT2,
+ AVR8_INT_WDT,
+ AVR8_INT_T2COMPA,
+ AVR8_INT_T2COMPB,
+ AVR8_INT_T2OVF,
+ AVR8_INT_T1CAPT,
+ AVR8_INT_T1COMPA,
+ AVR8_INT_T1COMPB,
+ AVR8_INT_T1OVF,
+ AVR8_INT_T0COMPA,
+ AVR8_INT_T0COMPB,
+ AVR8_INT_T0OVF,
+ AVR8_INT_SPI_STC,
+ AVR8_INT_USART_RX,
+ AVR8_INT_USART_UDRE,
+ AVR8_INT_USART_TX,
+ AVR8_INT_ADC,
+ AVR8_INT_EE_RDY,
+ AVR8_INT_ANALOG_COMP,
+ AVR8_INT_TWI,
+ AVR8_INT_SPM_RDY,
// ATMEGA644
- ATMEGA644_INT_RESET = 0,
- ATMEGA644_INT_INT0,
- ATMEGA644_INT_INT1,
- ATMEGA644_INT_INT2,
- ATMEGA644_INT_PCINT0,
- ATMEGA644_INT_PCINT1,
- ATMEGA644_INT_PCINT2,
- ATMEGA644_INT_PCINT3,
- ATMEGA644_INT_WDT,
- ATMEGA644_INT_T2COMPA,
- ATMEGA644_INT_T2COMPB,
- ATMEGA644_INT_T2OVF,
- ATMEGA644_INT_T1CAPT,
- ATMEGA644_INT_T1COMPA,
- ATMEGA644_INT_T1COMPB,
- ATMEGA644_INT_T1OVF,
- ATMEGA644_INT_T0COMPA,
- ATMEGA644_INT_T0COMPB,
- ATMEGA644_INT_T0OVF,
- ATMEGA644_INT_SPI_STC,
- ATMEGA644_INT_USART_RX,
- ATMEGA644_INT_USART_UDRE,
- ATMEGA644_INT_USART_TX,
- ATMEGA644_INT_ADC,
- ATMEGA644_INT_EE_RDY,
- ATMEGA644_INT_ANALOG_COMP,
- ATMEGA644_INT_TWI,
- ATMEGA644_INT_SPM_RDY,
+ ATMEGA644_INT_RESET = 0,
+ ATMEGA644_INT_INT0,
+ ATMEGA644_INT_INT1,
+ ATMEGA644_INT_INT2,
+ ATMEGA644_INT_PCINT0,
+ ATMEGA644_INT_PCINT1,
+ ATMEGA644_INT_PCINT2,
+ ATMEGA644_INT_PCINT3,
+ ATMEGA644_INT_WDT,
+ ATMEGA644_INT_T2COMPA,
+ ATMEGA644_INT_T2COMPB,
+ ATMEGA644_INT_T2OVF,
+ ATMEGA644_INT_T1CAPT,
+ ATMEGA644_INT_T1COMPA,
+ ATMEGA644_INT_T1COMPB,
+ ATMEGA644_INT_T1OVF,
+ ATMEGA644_INT_T0COMPA,
+ ATMEGA644_INT_T0COMPB,
+ ATMEGA644_INT_T0OVF,
+ ATMEGA644_INT_SPI_STC,
+ ATMEGA644_INT_USART_RX,
+ ATMEGA644_INT_USART_UDRE,
+ ATMEGA644_INT_USART_TX,
+ ATMEGA644_INT_ADC,
+ ATMEGA644_INT_EE_RDY,
+ ATMEGA644_INT_ANALOG_COMP,
+ ATMEGA644_INT_TWI,
+ ATMEGA644_INT_SPM_RDY,
};
// Used by I/O register handling
@@ -518,21 +518,21 @@ enum
AVR8_INTIDX_COUNT,
};
-#define AVR8_EECR_EERE 0x01
+#define AVR8_EECR_EERE 0x01
-#define AVR8_EEARH_MASK 0x01
+#define AVR8_EEARH_MASK 0x01
-#define AVR8_SPSR_SPIF_MASK 0x80
-#define AVR8_SPSR_SPIF_SHIFT 7
-#define AVR8_SPSR_SPR2X_MASK 0x01
+#define AVR8_SPSR_SPIF_MASK 0x80
+#define AVR8_SPSR_SPIF_SHIFT 7
+#define AVR8_SPSR_SPR2X_MASK 0x01
-#define AVR8_SPCR_SPIE_MASK 0x80
-#define AVR8_SPCR_SPE_MASK 0x40
-#define AVR8_SPCR_DORD_MASK 0x20
-#define AVR8_SPCR_MSTR_MASK 0x10
-#define AVR8_SPCR_CPOL_MASK 0x08
-#define AVR8_SPCR_CPHA_MASK 0x04
-#define AVR8_SPCR_SPR_MASK 0x03
+#define AVR8_SPCR_SPIE_MASK 0x80
+#define AVR8_SPCR_SPE_MASK 0x40
+#define AVR8_SPCR_DORD_MASK 0x20
+#define AVR8_SPCR_MSTR_MASK 0x10
+#define AVR8_SPCR_CPOL_MASK 0x08
+#define AVR8_SPCR_CPHA_MASK 0x04
+#define AVR8_SPCR_SPR_MASK 0x03
CPU_DISASSEMBLE( avr8 );
diff --git a/src/emu/cpu/avr8/avr8dasm.c b/src/emu/cpu/avr8/avr8dasm.c
index c657cd66ed0..b356ccf1c71 100644
--- a/src/emu/cpu/avr8/avr8dasm.c
+++ b/src/emu/cpu/avr8/avr8dasm.c
@@ -21,563 +21,563 @@
#define QCONST6(op) ((((op) >> 8) & 0x0020) | (((op) >> 7) & 0x0018) | ((op) & 0x0007))
#define ACONST5(op) (((op) >> 3) & 0x001f)
#define ACONST6(op) ((((op) >> 5) & 0x0030) | ((op) & 0x000f))
-#define MULCONST2(op) ((((op) >> 6) & 0x0002) | (((op) >> 3) & 0x0001))
+#define MULCONST2(op) ((((op) >> 6) & 0x0002) | (((op) >> 3) & 0x0001))
CPU_DISASSEMBLE( avr8 )
{
- char *output = buffer;
- int pos = 0;
- UINT32 op = oprom[pos++];
- op |= oprom[pos++] << 8;
+ char *output = buffer;
+ int pos = 0;
+ UINT32 op = oprom[pos++];
+ op |= oprom[pos++] << 8;
UINT32 addr = 0;
- switch(op & 0xf000)
- {
- case 0x0000:
- switch(op & 0x0f00)
- {
- case 0x0000:
- output += sprintf( output, "NOP" );
- break;
- case 0x0100:
- output += sprintf( output, "MOVW R%d:R%d, R%d:R%d", (RD4(op) << 1)+1, RD4(op) << 1, (RR4(op) << 1)+1, RR4(op) << 1 );
- break;
- case 0x0200:
- output += sprintf( output, "MULS R%d, R%d", 16+RD4(op), 16+RR4(op) );
- break;
- case 0x0300:
- switch(MULCONST2(op))
- {
+ switch(op & 0xf000)
+ {
+ case 0x0000:
+ switch(op & 0x0f00)
+ {
+ case 0x0000:
+ output += sprintf( output, "NOP" );
+ break;
+ case 0x0100:
+ output += sprintf( output, "MOVW R%d:R%d, R%d:R%d", (RD4(op) << 1)+1, RD4(op) << 1, (RR4(op) << 1)+1, RR4(op) << 1 );
+ break;
+ case 0x0200:
+ output += sprintf( output, "MULS R%d, R%d", 16+RD4(op), 16+RR4(op) );
+ break;
+ case 0x0300:
+ switch(MULCONST2(op))
+ {
case 0:
- output += sprintf( output, "MULSU R%d, R%d", 16+RD3(op), 16+RR3(op) );
- break;
+ output += sprintf( output, "MULSU R%d, R%d", 16+RD3(op), 16+RR3(op) );
+ break;
case 1:
- output += sprintf( output, "FMUL R%d, R%d", 16+RD3(op), 16+RR3(op) );
- break;
+ output += sprintf( output, "FMUL R%d, R%d", 16+RD3(op), 16+RR3(op) );
+ break;
case 2:
- output += sprintf( output, "FMULS R%d, R%d", 16+RD3(op), 16+RR3(op) );
- break;
+ output += sprintf( output, "FMULS R%d, R%d", 16+RD3(op), 16+RR3(op) );
+ break;
case 3:
- output += sprintf( output, "FMULSU R%d, R%d", 16+RD3(op), 16+RR3(op) );
- break;
+ output += sprintf( output, "FMULSU R%d, R%d", 16+RD3(op), 16+RR3(op) );
+ break;
}
- break;
- case 0x0400:
- case 0x0500:
- case 0x0600:
- case 0x0700:
- output += sprintf( output, "CPC R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0800:
- case 0x0900:
- case 0x0a00:
- case 0x0b00:
- output += sprintf( output, "SBC R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0c00:
- case 0x0d00:
- case 0x0e00:
- case 0x0f00:
- output += sprintf( output, "ADD R%d, R%d", RD5(op), RR5(op) );
- break;
- }
- break;
- case 0x1000:
- switch(op & 0x0c00)
- {
- case 0x0000:
- output += sprintf( output, "CPSE R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0400:
- output += sprintf( output, "CP R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0800:
- output += sprintf( output, "SUB R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0c00:
- output += sprintf( output, "ADC R%d, R%d", RD5(op), RR5(op) );
- break;
- }
- break;
- case 0x2000:
- switch(op & 0x0c00)
- {
- case 0x0000:
- output += sprintf( output, "AND R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0400:
- output += sprintf( output, "EOR R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0800:
- output += sprintf( output, "OR R%d, R%d", RD5(op), RR5(op) );
- break;
- case 0x0c00:
- output += sprintf( output, "MOV R%d, R%d", RD5(op), RR5(op) );
- break;
- }
- break;
- case 0x3000:
- output += sprintf( output, "CPI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
- break;
- case 0x4000:
- output += sprintf( output, "SBCI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
- break;
- case 0x5000:
- output += sprintf( output, "SUBI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
- break;
- case 0x6000:
- output += sprintf( output, "ORI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
- break;
- case 0x7000:
- output += sprintf( output, "ANDI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
- break;
- case 0x8000:
- case 0xa000:
- switch(op & 0x0208)
- {
- case 0x0000:
- output += sprintf( output, "LD(D) R%d, Z+%02x", RD5(op), QCONST6(op) );
- break;
- case 0x0008:
- output += sprintf( output, "LD(D) R%d, Y+%02x", RD5(op), QCONST6(op) );
- break;
- case 0x0200:
- output += sprintf( output, "ST(D) Z+%02x, R%d", QCONST6(op), RD5(op) );
- break;
- case 0x0208:
- output += sprintf( output, "ST(D) Y+%02x, R%d", QCONST6(op), RD5(op) );
- break;
- }
- break;
- case 0x9000:
- switch(op & 0x0f00)
- {
- case 0x0000:
- case 0x0100:
- switch(op & 0x000f)
- {
- case 0x0000:
- op <<= 16;
- op |= oprom[pos++];
- op |= oprom[pos++] << 8;
- output += sprintf( output, "LDS R%d, (0x%04x)", RD5(op >> 16), op & 0x0000ffff );
- break;
- case 0x0001:
- output += sprintf( output, "LD R%d, Z+", RD5(op) );
- break;
- case 0x0002:
- output += sprintf( output, "LD R%d,-Z", RD5(op) );
- break;
- case 0x0004:
- output += sprintf( output, "LPM R%d, Z", RD5(op) );
- break;
- case 0x0005:
- output += sprintf( output, "LPM R%d, Z+", RD5(op) );
- break;
- case 0x0006:
- output += sprintf( output, "ELPM R%d, Z", RD5(op) );
- break;
- case 0x0007:
- output += sprintf( output, "ELPM R%d, Z+", RD5(op) );
- break;
- case 0x0009:
- output += sprintf( output, "LD R%d, Y+", RD5(op) );
- break;
- case 0x000a:
- output += sprintf( output, "LD R%d,-Y", RD5(op) );
- break;
- case 0x000c:
- output += sprintf( output, "LD R%d, X", RD5(op) );
- break;
- case 0x000d:
- output += sprintf( output, "LD R%d, X+", RD5(op) );
- break;
- case 0x000e:
- output += sprintf( output, "LD R%d,-X", RD5(op) );
- break;
- case 0x000f:
- output += sprintf( output, "POP R%d", RD5(op) );
- break;
- default:
- output += sprintf( output, "Undefined (%08x)", op );
- break;
- }
- break;
- case 0x0200:
- case 0x0300:
- switch(op & 0x000f)
- {
- case 0x0000:
- op <<= 16;
- op |= oprom[pos++];
- op |= oprom[pos++] << 8;
- output += sprintf( output, "STS (0x%04x), R%d", op & 0x0000ffff, RD5(op >> 16) );
- break;
- case 0x0001:
- output += sprintf( output, "ST Z+, R%d", RD5(op) );
- break;
- case 0x0002:
- output += sprintf( output, "ST -Z , R%d", RD5(op) );
- break;
- case 0x0009:
- output += sprintf( output, "ST Y+, R%d", RD5(op) );
- break;
- case 0x000a:
- output += sprintf( output, "ST -Y , R%d", RD5(op) );
- break;
- case 0x000c:
- output += sprintf( output, "ST X , R%d", RD5(op) );
- break;
- case 0x000d:
- output += sprintf( output, "ST X+, R%d", RD5(op) );
- break;
- case 0x000e:
- output += sprintf( output, "ST -X , R%d", RD5(op) );
- break;
- case 0x000f:
- output += sprintf( output, "PUSH R%d", RD5(op) );
- break;
- default:
- output += sprintf( output, "Undefined (%08x)", op );
- break;
- }
- break;
- case 0x0400:
- switch(op & 0x000f)
- {
- case 0x0000:
- output += sprintf( output, "COM R%d", RD5(op) );
- break;
- case 0x0001:
- output += sprintf( output, "NEG R%d", RD5(op) );
- break;
- case 0x0002:
- output += sprintf( output, "SWAP R%d", RD5(op) );
- break;
- case 0x0003:
- output += sprintf( output, "INC R%d", RD5(op) );
- break;
- case 0x0005:
- output += sprintf( output, "ASR R%d", RD5(op) );
- break;
- case 0x0006:
- output += sprintf( output, "LSR R%d", RD5(op) );
- break;
- case 0x0007:
- output += sprintf( output, "ROR R%d", RD5(op) );
- break;
- case 0x0008:
- switch(op & 0x00f0)
- {
- case 0x0000:
- output += sprintf( output, "SEC" );
- break;
- case 0x0010:
- output += sprintf( output, "SEZ" );
- break;
- case 0x0020:
- output += sprintf( output, "SEN" );
- break;
- case 0x0030:
- output += sprintf( output, "SEV" );
- break;
- case 0x0040:
- output += sprintf( output, "SES" );
- break;
- case 0x0050:
- output += sprintf( output, "SEH" );
- break;
- case 0x0060:
- output += sprintf( output, "SET" );
- break;
- case 0x0070:
- output += sprintf( output, "SEI" );
- break;
- case 0x0080:
- output += sprintf( output, "CLC" );
- break;
- case 0x0090:
- output += sprintf( output, "CLZ" );
- break;
- case 0x00a0:
- output += sprintf( output, "CLN" );
- break;
- case 0x00b0:
- output += sprintf( output, "CLV" );
- break;
- case 0x00c0:
- output += sprintf( output, "CLS" );
- break;
- case 0x00d0:
- output += sprintf( output, "CLH" );
- break;
- case 0x00e0:
- output += sprintf( output, "CLT" );
- break;
- case 0x00f0:
- output += sprintf( output, "CLI" );
- break;
- default:
- output += sprintf( output, "Undefined (%08x)", op );
- break;
- }
- break;
- case 0x0009:
- switch(op & 0x00f0)
- {
- case 0x0000:
- output += sprintf( output, "IJMP" );
- break;
- case 0x0010:
- output += sprintf( output, "EIJMP" );
- break;
- default:
- output += sprintf( output, "Undefined (%08x)", op );
- break;
- }
- break;
- case 0x000a:
- output += sprintf( output, "DEC R%d", RD5(op) );
- break;
- case 0x000c:
- case 0x000d:
- addr = KCONST22(op) << 16;
- addr |= oprom[pos++];
- addr |= oprom[pos++] << 8;
- output += sprintf( output, "JMP 0x%06x", addr << 1 );
- break;
- case 0x000e:
- case 0x000f:
- addr = KCONST22(op) << 16;
- addr |= oprom[pos++];
- addr |= oprom[pos++] << 8;
- output += sprintf( output, "CALL 0x%06x", addr << 1 );
- break;
- default:
- output += sprintf( output, "Undefined (%08x)", op );
- break;
- }
- break;
- case 0x0500:
- switch(op & 0x000f)
- {
- case 0x0000:
- output += sprintf( output, "COM R%d", RD5(op) );
- break;
- case 0x0001:
- output += sprintf( output, "NEG R%d", RD5(op) );
- break;
- case 0x0002:
- output += sprintf( output, "SWAP R%d", RD5(op) );
- break;
- case 0x0003:
- output += sprintf( output, "INC R%d", RD5(op) );
- break;
- case 0x0005:
- output += sprintf( output, "ASR R%d", RD5(op) );
- break;
- case 0x0006:
- output += sprintf( output, "LSR R%d", RD5(op) );
- break;
- case 0x0007:
- output += sprintf( output, "ROR R%d", RD5(op) );
- break;
- case 0x0008:
- switch(op & 0x00f0)
- {
- case 0x0000:
- output += sprintf( output, "RET" );
- break;
- case 0x0010:
- output += sprintf( output, "RETI" );
- break;
- case 0x0080:
- output += sprintf( output, "SLEEP" );
- break;
- case 0x0090:
- output += sprintf( output, "BREAK" );
- break;
- case 0x00a0:
- output += sprintf( output, "WDR" );
- break;
- case 0x00c0:
- output += sprintf( output, "LPM" );
- break;
- case 0x00d0:
- output += sprintf( output, "ELPM" );
- break;
- case 0x00e0:
- output += sprintf( output, "SPM" );
- break;
- case 0x00f0:
- output += sprintf( output, "SPM Z+" );
- break;
- default:
- output += sprintf( output, "Undefined (%08x)", op );
- break;
- }
- break;
- case 0x0009:
- switch(op & 0x00f0)
- {
- case 0x0000:
- output += sprintf( output, "ICALL" );
- break;
- case 0x0010:
- output += sprintf( output, "EICALL" );
- break;
- default:
- output += sprintf( output, "Undefined (%08x)", op );
- break;
- }
- break;
- case 0x000a:
- output += sprintf( output, "DEC R%d", RD5(op) );
- break;
- case 0x000c:
- case 0x000d:
- op <<= 16;
- op |= oprom[pos++];
- op |= oprom[pos++] << 8;
- output += sprintf( output, "JMP 0x%06x", KCONST22(op) << 1 );
- break;
- case 0x000e:
- case 0x000f:
- op <<= 16;
- op |= oprom[pos++];
- op |= oprom[pos++] << 8;
- output += sprintf( output, "CALL 0x%06x", KCONST22(op) << 1 );
- break;
- }
- break;
- case 0x0600:
- output += sprintf( output, "ADIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op) );
- break;
- case 0x0700:
- output += sprintf( output, "SBIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op) );
- break;
- case 0x0800:
- output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
- break;
- case 0x0900:
- output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) );
- break;
- case 0x0a00:
- output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) );
- break;
- case 0x0b00:
- output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) );
- break;
- case 0x0c00:
- case 0x0d00:
- case 0x0e00:
- case 0x0f00:
- output += sprintf( output, "MUL R%d, R%d", RD5(op), RR5(op) );
- break;
- }
- break;
- case 0xb000:
- if(op & 0x0800)
- {
- output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) );
- }
- else
- {
- output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) );
- }
- break;
- case 0xc000:
- output += sprintf( output, "RJMP %08x", (((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)) << 1) );
- break;
- case 0xd000:
- output += sprintf( output, "RCALL %08x", (((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)) << 1) );
- break;
- case 0xe000:
- output += sprintf( output, "LDI R%d, 0x%02x", 16 + RD4(op), KCONST8(op) );
- break;
- case 0xf000:
- switch(op & 0x0c00)
- {
- case 0x0000:
- switch(op & 0x0007)
- {
- case 0x0000:
- output += sprintf( output, "BRLO %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0001:
- output += sprintf( output, "BREQ %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0002:
- output += sprintf( output, "BRMI %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0003:
- output += sprintf( output, "BRVS %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0004:
- output += sprintf( output, "BRLT %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0005:
- output += sprintf( output, "BRHS %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0006:
- output += sprintf( output, "BRTS %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0007:
- output += sprintf( output, "BRIE %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- }
- break;
- case 0x0400:
- switch(op & 0x0007)
- {
- case 0x0000:
- output += sprintf( output, "BRSH %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0001:
- output += sprintf( output, "BRNE %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0002:
- output += sprintf( output, "BRPL %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0003:
- output += sprintf( output, "BRVC %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0004:
- output += sprintf( output, "BRGE %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0005:
- output += sprintf( output, "BRHC %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0006:
- output += sprintf( output, "BRTC %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- case 0x0007:
- output += sprintf( output, "BRID %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
- break;
- }
- break;
- case 0x0800:
- if(op & 0x0200)
- {
- output += sprintf( output, "BST R%d, %d", RD5(op), RR3(op) );
- }
- else
- {
- output += sprintf( output, "BLD R%d, %d", RD5(op), RR3(op) );
- }
- break;
- case 0x0c00:
- if(op & 0x0200)
- {
- output += sprintf( output, "SBRS R%d, %d", RD5(op), RR3(op) );
- }
- else
- {
- output += sprintf( output, "SBRC R%d, %d", RD5(op), RR3(op) );
- }
- break;
- }
- break;
- }
+ break;
+ case 0x0400:
+ case 0x0500:
+ case 0x0600:
+ case 0x0700:
+ output += sprintf( output, "CPC R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0800:
+ case 0x0900:
+ case 0x0a00:
+ case 0x0b00:
+ output += sprintf( output, "SBC R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0c00:
+ case 0x0d00:
+ case 0x0e00:
+ case 0x0f00:
+ output += sprintf( output, "ADD R%d, R%d", RD5(op), RR5(op) );
+ break;
+ }
+ break;
+ case 0x1000:
+ switch(op & 0x0c00)
+ {
+ case 0x0000:
+ output += sprintf( output, "CPSE R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0400:
+ output += sprintf( output, "CP R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0800:
+ output += sprintf( output, "SUB R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0c00:
+ output += sprintf( output, "ADC R%d, R%d", RD5(op), RR5(op) );
+ break;
+ }
+ break;
+ case 0x2000:
+ switch(op & 0x0c00)
+ {
+ case 0x0000:
+ output += sprintf( output, "AND R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0400:
+ output += sprintf( output, "EOR R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0800:
+ output += sprintf( output, "OR R%d, R%d", RD5(op), RR5(op) );
+ break;
+ case 0x0c00:
+ output += sprintf( output, "MOV R%d, R%d", RD5(op), RR5(op) );
+ break;
+ }
+ break;
+ case 0x3000:
+ output += sprintf( output, "CPI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
+ break;
+ case 0x4000:
+ output += sprintf( output, "SBCI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
+ break;
+ case 0x5000:
+ output += sprintf( output, "SUBI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
+ break;
+ case 0x6000:
+ output += sprintf( output, "ORI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
+ break;
+ case 0x7000:
+ output += sprintf( output, "ANDI R%d, 0x%02x", 16+RD4(op), KCONST8(op) );
+ break;
+ case 0x8000:
+ case 0xa000:
+ switch(op & 0x0208)
+ {
+ case 0x0000:
+ output += sprintf( output, "LD(D) R%d, Z+%02x", RD5(op), QCONST6(op) );
+ break;
+ case 0x0008:
+ output += sprintf( output, "LD(D) R%d, Y+%02x", RD5(op), QCONST6(op) );
+ break;
+ case 0x0200:
+ output += sprintf( output, "ST(D) Z+%02x, R%d", QCONST6(op), RD5(op) );
+ break;
+ case 0x0208:
+ output += sprintf( output, "ST(D) Y+%02x, R%d", QCONST6(op), RD5(op) );
+ break;
+ }
+ break;
+ case 0x9000:
+ switch(op & 0x0f00)
+ {
+ case 0x0000:
+ case 0x0100:
+ switch(op & 0x000f)
+ {
+ case 0x0000:
+ op <<= 16;
+ op |= oprom[pos++];
+ op |= oprom[pos++] << 8;
+ output += sprintf( output, "LDS R%d, (0x%04x)", RD5(op >> 16), op & 0x0000ffff );
+ break;
+ case 0x0001:
+ output += sprintf( output, "LD R%d, Z+", RD5(op) );
+ break;
+ case 0x0002:
+ output += sprintf( output, "LD R%d,-Z", RD5(op) );
+ break;
+ case 0x0004:
+ output += sprintf( output, "LPM R%d, Z", RD5(op) );
+ break;
+ case 0x0005:
+ output += sprintf( output, "LPM R%d, Z+", RD5(op) );
+ break;
+ case 0x0006:
+ output += sprintf( output, "ELPM R%d, Z", RD5(op) );
+ break;
+ case 0x0007:
+ output += sprintf( output, "ELPM R%d, Z+", RD5(op) );
+ break;
+ case 0x0009:
+ output += sprintf( output, "LD R%d, Y+", RD5(op) );
+ break;
+ case 0x000a:
+ output += sprintf( output, "LD R%d,-Y", RD5(op) );
+ break;
+ case 0x000c:
+ output += sprintf( output, "LD R%d, X", RD5(op) );
+ break;
+ case 0x000d:
+ output += sprintf( output, "LD R%d, X+", RD5(op) );
+ break;
+ case 0x000e:
+ output += sprintf( output, "LD R%d,-X", RD5(op) );
+ break;
+ case 0x000f:
+ output += sprintf( output, "POP R%d", RD5(op) );
+ break;
+ default:
+ output += sprintf( output, "Undefined (%08x)", op );
+ break;
+ }
+ break;
+ case 0x0200:
+ case 0x0300:
+ switch(op & 0x000f)
+ {
+ case 0x0000:
+ op <<= 16;
+ op |= oprom[pos++];
+ op |= oprom[pos++] << 8;
+ output += sprintf( output, "STS (0x%04x), R%d", op & 0x0000ffff, RD5(op >> 16) );
+ break;
+ case 0x0001:
+ output += sprintf( output, "ST Z+, R%d", RD5(op) );
+ break;
+ case 0x0002:
+ output += sprintf( output, "ST -Z , R%d", RD5(op) );
+ break;
+ case 0x0009:
+ output += sprintf( output, "ST Y+, R%d", RD5(op) );
+ break;
+ case 0x000a:
+ output += sprintf( output, "ST -Y , R%d", RD5(op) );
+ break;
+ case 0x000c:
+ output += sprintf( output, "ST X , R%d", RD5(op) );
+ break;
+ case 0x000d:
+ output += sprintf( output, "ST X+, R%d", RD5(op) );
+ break;
+ case 0x000e:
+ output += sprintf( output, "ST -X , R%d", RD5(op) );
+ break;
+ case 0x000f:
+ output += sprintf( output, "PUSH R%d", RD5(op) );
+ break;
+ default:
+ output += sprintf( output, "Undefined (%08x)", op );
+ break;
+ }
+ break;
+ case 0x0400:
+ switch(op & 0x000f)
+ {
+ case 0x0000:
+ output += sprintf( output, "COM R%d", RD5(op) );
+ break;
+ case 0x0001:
+ output += sprintf( output, "NEG R%d", RD5(op) );
+ break;
+ case 0x0002:
+ output += sprintf( output, "SWAP R%d", RD5(op) );
+ break;
+ case 0x0003:
+ output += sprintf( output, "INC R%d", RD5(op) );
+ break;
+ case 0x0005:
+ output += sprintf( output, "ASR R%d", RD5(op) );
+ break;
+ case 0x0006:
+ output += sprintf( output, "LSR R%d", RD5(op) );
+ break;
+ case 0x0007:
+ output += sprintf( output, "ROR R%d", RD5(op) );
+ break;
+ case 0x0008:
+ switch(op & 0x00f0)
+ {
+ case 0x0000:
+ output += sprintf( output, "SEC" );
+ break;
+ case 0x0010:
+ output += sprintf( output, "SEZ" );
+ break;
+ case 0x0020:
+ output += sprintf( output, "SEN" );
+ break;
+ case 0x0030:
+ output += sprintf( output, "SEV" );
+ break;
+ case 0x0040:
+ output += sprintf( output, "SES" );
+ break;
+ case 0x0050:
+ output += sprintf( output, "SEH" );
+ break;
+ case 0x0060:
+ output += sprintf( output, "SET" );
+ break;
+ case 0x0070:
+ output += sprintf( output, "SEI" );
+ break;
+ case 0x0080:
+ output += sprintf( output, "CLC" );
+ break;
+ case 0x0090:
+ output += sprintf( output, "CLZ" );
+ break;
+ case 0x00a0:
+ output += sprintf( output, "CLN" );
+ break;
+ case 0x00b0:
+ output += sprintf( output, "CLV" );
+ break;
+ case 0x00c0:
+ output += sprintf( output, "CLS" );
+ break;
+ case 0x00d0:
+ output += sprintf( output, "CLH" );
+ break;
+ case 0x00e0:
+ output += sprintf( output, "CLT" );
+ break;
+ case 0x00f0:
+ output += sprintf( output, "CLI" );
+ break;
+ default:
+ output += sprintf( output, "Undefined (%08x)", op );
+ break;
+ }
+ break;
+ case 0x0009:
+ switch(op & 0x00f0)
+ {
+ case 0x0000:
+ output += sprintf( output, "IJMP" );
+ break;
+ case 0x0010:
+ output += sprintf( output, "EIJMP" );
+ break;
+ default:
+ output += sprintf( output, "Undefined (%08x)", op );
+ break;
+ }
+ break;
+ case 0x000a:
+ output += sprintf( output, "DEC R%d", RD5(op) );
+ break;
+ case 0x000c:
+ case 0x000d:
+ addr = KCONST22(op) << 16;
+ addr |= oprom[pos++];
+ addr |= oprom[pos++] << 8;
+ output += sprintf( output, "JMP 0x%06x", addr << 1 );
+ break;
+ case 0x000e:
+ case 0x000f:
+ addr = KCONST22(op) << 16;
+ addr |= oprom[pos++];
+ addr |= oprom[pos++] << 8;
+ output += sprintf( output, "CALL 0x%06x", addr << 1 );
+ break;
+ default:
+ output += sprintf( output, "Undefined (%08x)", op );
+ break;
+ }
+ break;
+ case 0x0500:
+ switch(op & 0x000f)
+ {
+ case 0x0000:
+ output += sprintf( output, "COM R%d", RD5(op) );
+ break;
+ case 0x0001:
+ output += sprintf( output, "NEG R%d", RD5(op) );
+ break;
+ case 0x0002:
+ output += sprintf( output, "SWAP R%d", RD5(op) );
+ break;
+ case 0x0003:
+ output += sprintf( output, "INC R%d", RD5(op) );
+ break;
+ case 0x0005:
+ output += sprintf( output, "ASR R%d", RD5(op) );
+ break;
+ case 0x0006:
+ output += sprintf( output, "LSR R%d", RD5(op) );
+ break;
+ case 0x0007:
+ output += sprintf( output, "ROR R%d", RD5(op) );
+ break;
+ case 0x0008:
+ switch(op & 0x00f0)
+ {
+ case 0x0000:
+ output += sprintf( output, "RET" );
+ break;
+ case 0x0010:
+ output += sprintf( output, "RETI" );
+ break;
+ case 0x0080:
+ output += sprintf( output, "SLEEP" );
+ break;
+ case 0x0090:
+ output += sprintf( output, "BREAK" );
+ break;
+ case 0x00a0:
+ output += sprintf( output, "WDR" );
+ break;
+ case 0x00c0:
+ output += sprintf( output, "LPM" );
+ break;
+ case 0x00d0:
+ output += sprintf( output, "ELPM" );
+ break;
+ case 0x00e0:
+ output += sprintf( output, "SPM" );
+ break;
+ case 0x00f0:
+ output += sprintf( output, "SPM Z+" );
+ break;
+ default:
+ output += sprintf( output, "Undefined (%08x)", op );
+ break;
+ }
+ break;
+ case 0x0009:
+ switch(op & 0x00f0)
+ {
+ case 0x0000:
+ output += sprintf( output, "ICALL" );
+ break;
+ case 0x0010:
+ output += sprintf( output, "EICALL" );
+ break;
+ default:
+ output += sprintf( output, "Undefined (%08x)", op );
+ break;
+ }
+ break;
+ case 0x000a:
+ output += sprintf( output, "DEC R%d", RD5(op) );
+ break;
+ case 0x000c:
+ case 0x000d:
+ op <<= 16;
+ op |= oprom[pos++];
+ op |= oprom[pos++] << 8;
+ output += sprintf( output, "JMP 0x%06x", KCONST22(op) << 1 );
+ break;
+ case 0x000e:
+ case 0x000f:
+ op <<= 16;
+ op |= oprom[pos++];
+ op |= oprom[pos++] << 8;
+ output += sprintf( output, "CALL 0x%06x", KCONST22(op) << 1 );
+ break;
+ }
+ break;
+ case 0x0600:
+ output += sprintf( output, "ADIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op) );
+ break;
+ case 0x0700:
+ output += sprintf( output, "SBIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op) );
+ break;
+ case 0x0800:
+ output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) );
+ break;
+ case 0x0900:
+ output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) );
+ break;
+ case 0x0a00:
+ output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) );
+ break;
+ case 0x0b00:
+ output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) );
+ break;
+ case 0x0c00:
+ case 0x0d00:
+ case 0x0e00:
+ case 0x0f00:
+ output += sprintf( output, "MUL R%d, R%d", RD5(op), RR5(op) );
+ break;
+ }
+ break;
+ case 0xb000:
+ if(op & 0x0800)
+ {
+ output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) );
+ }
+ else
+ {
+ output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) );
+ }
+ break;
+ case 0xc000:
+ output += sprintf( output, "RJMP %08x", (((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)) << 1) );
+ break;
+ case 0xd000:
+ output += sprintf( output, "RCALL %08x", (((op & 0x0800) ? ((op & 0x0fff) | 0xfffff000) : (op & 0x0fff)) << 1) );
+ break;
+ case 0xe000:
+ output += sprintf( output, "LDI R%d, 0x%02x", 16 + RD4(op), KCONST8(op) );
+ break;
+ case 0xf000:
+ switch(op & 0x0c00)
+ {
+ case 0x0000:
+ switch(op & 0x0007)
+ {
+ case 0x0000:
+ output += sprintf( output, "BRLO %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0001:
+ output += sprintf( output, "BREQ %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0002:
+ output += sprintf( output, "BRMI %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0003:
+ output += sprintf( output, "BRVS %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0004:
+ output += sprintf( output, "BRLT %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0005:
+ output += sprintf( output, "BRHS %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0006:
+ output += sprintf( output, "BRTS %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0007:
+ output += sprintf( output, "BRIE %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ }
+ break;
+ case 0x0400:
+ switch(op & 0x0007)
+ {
+ case 0x0000:
+ output += sprintf( output, "BRSH %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0001:
+ output += sprintf( output, "BRNE %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0002:
+ output += sprintf( output, "BRPL %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0003:
+ output += sprintf( output, "BRVC %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0004:
+ output += sprintf( output, "BRGE %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0005:
+ output += sprintf( output, "BRHC %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0006:
+ output += sprintf( output, "BRTC %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ case 0x0007:
+ output += sprintf( output, "BRID %08x", (((op & 0x0200) ? ((KCONST7(op) & 0x007f) | 0xff80) : KCONST7(op)) << 1) );
+ break;
+ }
+ break;
+ case 0x0800:
+ if(op & 0x0200)
+ {
+ output += sprintf( output, "BST R%d, %d", RD5(op), RR3(op) );
+ }
+ else
+ {
+ output += sprintf( output, "BLD R%d, %d", RD5(op), RR3(op) );
+ }
+ break;
+ case 0x0c00:
+ if(op & 0x0200)
+ {
+ output += sprintf( output, "SBRS R%d, %d", RD5(op), RR3(op) );
+ }
+ else
+ {
+ output += sprintf( output, "SBRC R%d, %d", RD5(op), RR3(op) );
+ }
+ break;
+ }
+ break;
+ }
- return pos | DASMFLAG_SUPPORTED;
+ return pos | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/ccpu/ccpu.c b/src/emu/cpu/ccpu/ccpu.c
index b46faffc255..d8490a00e87 100644
--- a/src/emu/cpu/ccpu/ccpu.c
+++ b/src/emu/cpu/ccpu/ccpu.c
@@ -19,28 +19,28 @@
struct ccpu_state
{
- UINT16 PC;
- UINT16 A;
- UINT16 B;
- UINT8 I;
- UINT16 J;
- UINT8 P;
- UINT16 X;
- UINT16 Y;
- UINT16 T;
- UINT16 * acc;
+ UINT16 PC;
+ UINT16 A;
+ UINT16 B;
+ UINT8 I;
+ UINT16 J;
+ UINT8 P;
+ UINT16 X;
+ UINT16 Y;
+ UINT16 T;
+ UINT16 * acc;
- UINT16 a0flag, ncflag, cmpacc, cmpval;
- UINT16 miflag, nextmiflag, nextnextmiflag;
- UINT16 drflag;
+ UINT16 a0flag, ncflag, cmpacc, cmpval;
+ UINT16 miflag, nextmiflag, nextnextmiflag;
+ UINT16 drflag;
- ccpu_input_func external_input;
- ccpu_vector_func vector_callback;
+ ccpu_input_func external_input;
+ ccpu_vector_func vector_callback;
- UINT8 waiting;
- UINT8 watchdog;
+ UINT8 waiting;
+ UINT8 watchdog;
- int icount;
+ int icount;
legacy_cpu_device *device;
address_space *program;
@@ -62,38 +62,38 @@ INLINE ccpu_state *get_safe_token(device_t *device)
MACROS
***************************************************************************/
-#define READOP(C,a) ((C)->direct->read_decrypted_byte(a))
+#define READOP(C,a) ((C)->direct->read_decrypted_byte(a))
-#define RDMEM(C,a) ((C)->data->read_word((a) * 2) & 0xfff)
-#define WRMEM(C,a,v) ((C)->data->write_word((a) * 2, (v)))
+#define RDMEM(C,a) ((C)->data->read_word((a) * 2) & 0xfff)
+#define WRMEM(C,a,v) ((C)->data->write_word((a) * 2, (v)))
-#define READPORT(C,a) ((C)->io->read_byte(a))
-#define WRITEPORT(C,a,v) ((C)->io->write_byte((a), (v)))
+#define READPORT(C,a) ((C)->io->read_byte(a))
+#define WRITEPORT(C,a,v) ((C)->io->write_byte((a), (v)))
-#define SET_A0(C) do { (C)->a0flag = (C)->A; } while (0)
-#define SET_CMP_VAL(C,x) do { (C)->cmpacc = *(C)->acc; (C)->cmpval = (x) & 0xfff; } while (0)
-#define SET_NC(C,a) do { (C)->ncflag = ~(a); } while (0)
-#define SET_MI(C,a) do { (C)->nextnextmiflag = (a); } while (0)
+#define SET_A0(C) do { (C)->a0flag = (C)->A; } while (0)
+#define SET_CMP_VAL(C,x) do { (C)->cmpacc = *(C)->acc; (C)->cmpval = (x) & 0xfff; } while (0)
+#define SET_NC(C,a) do { (C)->ncflag = ~(a); } while (0)
+#define SET_MI(C,a) do { (C)->nextnextmiflag = (a); } while (0)
-#define TEST_A0(C) ((C)->a0flag & 1)
-#define TEST_NC(C) (((C)->ncflag >> 12) & 1)
-#define TEST_MI(C) (((C)->miflag >> 11) & 1)
-#define TEST_LT(C) ((C)->cmpval < (C)->cmpacc)
-#define TEST_EQ(C) ((C)->cmpval == (C)->cmpacc)
-#define TEST_DR(C) ((C)->drflag != 0)
+#define TEST_A0(C) ((C)->a0flag & 1)
+#define TEST_NC(C) (((C)->ncflag >> 12) & 1)
+#define TEST_MI(C) (((C)->miflag >> 11) & 1)
+#define TEST_LT(C) ((C)->cmpval < (C)->cmpacc)
+#define TEST_EQ(C) ((C)->cmpval == (C)->cmpacc)
+#define TEST_DR(C) ((C)->drflag != 0)
-#define NEXT_ACC_A(C) do { SET_MI(C, *(C)->acc); (C)->acc = &(C)->A; } while (0)
-#define NEXT_ACC_B(C) do { SET_MI(C, *(C)->acc); if ((C)->acc == &(C)->A) (C)->acc = &(C)->B; else (C)->acc = &(C)->A; } while (0)
+#define NEXT_ACC_A(C) do { SET_MI(C, *(C)->acc); (C)->acc = &(C)->A; } while (0)
+#define NEXT_ACC_B(C) do { SET_MI(C, *(C)->acc); if ((C)->acc == &(C)->A) (C)->acc = &(C)->B; else (C)->acc = &(C)->A; } while (0)
-#define CYCLES(C,x) do { (C)->icount -= (x); } while (0)
+#define CYCLES(C,x) do { (C)->icount -= (x); } while (0)
#define STANDARD_ACC_OP(C,resexp,cmpval) \
do { \
UINT16 result = resexp; \
- SET_A0(C); /* set the A0 bit based on the previous 'A' value */ \
- SET_CMP_VAL(C,cmpval); /* set the compare values to the previous accumulator and the cmpval */ \
- SET_NC(C,result); /* set the NC flag based on the unmasked result */ \
- *(C)->acc = result & 0xfff; /* store the low 12 bits of the new value */ \
+ SET_A0(C); /* set the A0 bit based on the previous 'A' value */ \
+ SET_CMP_VAL(C,cmpval); /* set the compare values to the previous accumulator and the cmpval */ \
+ SET_NC(C,result); /* set the NC flag based on the unmasked result */ \
+ *(C)->acc = result & 0xfff; /* store the low 12 bits of the new value */ \
} while (0)
@@ -217,20 +217,20 @@ static CPU_EXECUTE( ccpu )
switch (opcode)
{
/* LDAI */
- case 0x00: case 0x01: case 0x02: case 0x03:
- case 0x04: case 0x05: case 0x06: case 0x07:
- case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ case 0x00: case 0x01: case 0x02: case 0x03:
+ case 0x04: case 0x05: case 0x06: case 0x07:
+ case 0x08: case 0x09: case 0x0a: case 0x0b:
+ case 0x0c: case 0x0d: case 0x0e: case 0x0f:
tempval = (opcode & 0x0f) << 8;
STANDARD_ACC_OP(cpustate, tempval, tempval);
NEXT_ACC_A(cpustate); CYCLES(cpustate, 1);
break;
/* INP */
- case 0x10: case 0x11: case 0x12: case 0x13:
- case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b:
- case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ case 0x1c: case 0x1d: case 0x1e: case 0x1f:
if (cpustate->acc == &cpustate->A)
tempval = READPORT(cpustate, opcode & 0x0f) & 1;
else
@@ -247,10 +247,10 @@ static CPU_EXECUTE( ccpu )
break;
/* A4I */
- case 0x21: case 0x22: case 0x23:
- case 0x24: case 0x25: case 0x26: case 0x27:
- case 0x28: case 0x29: case 0x2a: case 0x2b:
- case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ case 0x21: case 0x22: case 0x23:
+ case 0x24: case 0x25: case 0x26: case 0x27:
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f:
tempval = opcode & 0x0f;
STANDARD_ACC_OP(cpustate, *cpustate->acc + tempval, tempval);
NEXT_ACC_A(cpustate); CYCLES(cpustate, 1);
@@ -264,20 +264,20 @@ static CPU_EXECUTE( ccpu )
break;
/* S4I */
- case 0x31: case 0x32: case 0x33:
- case 0x34: case 0x35: case 0x36: case 0x37:
- case 0x38: case 0x39: case 0x3a: case 0x3b:
- case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ case 0x31: case 0x32: case 0x33:
+ case 0x34: case 0x35: case 0x36: case 0x37:
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ case 0x3c: case 0x3d: case 0x3e: case 0x3f:
tempval = opcode & 0x0f;
STANDARD_ACC_OP(cpustate, *cpustate->acc + (tempval ^ 0xfff) + 1, tempval);
NEXT_ACC_A(cpustate); CYCLES(cpustate, 1);
break;
/* LPAI */
- case 0x40: case 0x41: case 0x42: case 0x43:
- case 0x44: case 0x45: case 0x46: case 0x47:
- case 0x48: case 0x49: case 0x4a: case 0x4b:
- case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ case 0x40: case 0x41: case 0x42: case 0x43:
+ case 0x44: case 0x45: case 0x46: case 0x47:
+ case 0x48: case 0x49: case 0x4a: case 0x4b:
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f:
tempval = READOP(cpustate, cpustate->PC++);
cpustate->J = (opcode & 0x0f) + (tempval & 0xf0) + ((tempval & 0x0f) << 8);
NEXT_ACC_A(cpustate); CYCLES(cpustate, 3);
@@ -378,10 +378,10 @@ static CPU_EXECUTE( ccpu )
break;
/* ADD */
- case 0x60: case 0x61: case 0x62: case 0x63:
- case 0x64: case 0x65: case 0x66: case 0x67:
- case 0x68: case 0x69: case 0x6a: case 0x6b:
- case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x65: case 0x66: case 0x67:
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f:
cpustate->I = (cpustate->P << 4) + (opcode & 0x0f);
tempval = RDMEM(cpustate, cpustate->I);
STANDARD_ACC_OP(cpustate, *cpustate->acc + tempval, tempval);
@@ -389,10 +389,10 @@ static CPU_EXECUTE( ccpu )
break;
/* SUB */
- case 0x70: case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- case 0x78: case 0x79: case 0x7a: case 0x7b:
- case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f:
cpustate->I = (cpustate->P << 4) + (opcode & 0x0f);
tempval = RDMEM(cpustate, cpustate->I);
STANDARD_ACC_OP(cpustate, *cpustate->acc + (tempval ^ 0xfff) + 1, tempval);
@@ -400,29 +400,29 @@ static CPU_EXECUTE( ccpu )
break;
/* SETP */
- case 0x80: case 0x81: case 0x82: case 0x83:
- case 0x84: case 0x85: case 0x86: case 0x87:
- case 0x88: case 0x89: case 0x8a: case 0x8b:
- case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x85: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f:
cpustate->P = opcode & 0x0f;
NEXT_ACC_A(cpustate); CYCLES(cpustate, 1);
break;
/* OUT */
- case 0x90: case 0x91: case 0x92: case 0x93:
- case 0x94: case 0x95: case 0x96: case 0x97:
- case 0x98: case 0x99: case 0x9a: case 0x9b:
- case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f:
if (cpustate->acc == &cpustate->A)
WRITEPORT(cpustate, opcode & 0x07, ~*cpustate->acc & 1);
NEXT_ACC_A(cpustate); CYCLES(cpustate, 1);
break;
/* LDA */
- case 0xa0: case 0xa1: case 0xa2: case 0xa3:
- case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- case 0xa8: case 0xa9: case 0xaa: case 0xab:
- case 0xac: case 0xad: case 0xae: case 0xaf:
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ case 0xac: case 0xad: case 0xae: case 0xaf:
cpustate->I = (cpustate->P << 4) + (opcode & 0x0f);
tempval = RDMEM(cpustate, cpustate->I);
STANDARD_ACC_OP(cpustate, tempval, tempval);
@@ -430,10 +430,10 @@ static CPU_EXECUTE( ccpu )
break;
/* TST */
- case 0xb0: case 0xb1: case 0xb2: case 0xb3:
- case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- case 0xb8: case 0xb9: case 0xba: case 0xbb:
- case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf:
cpustate->I = (cpustate->P << 4) + (opcode & 0x0f);
tempval = RDMEM(cpustate, cpustate->I);
{
@@ -447,20 +447,20 @@ static CPU_EXECUTE( ccpu )
break;
/* WS */
- case 0xc0: case 0xc1: case 0xc2: case 0xc3:
- case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb:
- case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3:
+ case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ case 0xcc: case 0xcd: case 0xce: case 0xcf:
cpustate->I = (cpustate->P << 4) + (opcode & 0x0f);
cpustate->I = RDMEM(cpustate, cpustate->I) & 0xff;
NEXT_ACC_A(cpustate); CYCLES(cpustate, 3);
break;
/* STA */
- case 0xd0: case 0xd1: case 0xd2: case 0xd3:
- case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb:
- case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3:
+ case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ case 0xdc: case 0xdd: case 0xde: case 0xdf:
cpustate->I = (cpustate->P << 4) + (opcode & 0x0f);
WRMEM(cpustate, cpustate->I, *cpustate->acc);
NEXT_ACC_A(cpustate); CYCLES(cpustate, 3);
@@ -554,8 +554,8 @@ static CPU_EXECUTE( ccpu )
case 0xf4:
cpustate->T = 0;
while (((cpustate->A & 0xa00) == 0x000 || (cpustate->A & 0xa00) == 0xa00) &&
- ((cpustate->B & 0xa00) == 0x000 || (cpustate->B & 0xa00) == 0xa00) &&
- cpustate->T < 16)
+ ((cpustate->B & 0xa00) == 0x000 || (cpustate->B & 0xa00) == 0xa00) &&
+ cpustate->T < 16)
{
cpustate->A = (cpustate->A << 1) & 0xfff;
cpustate->B = (cpustate->B << 1) & 0xfff;
@@ -573,8 +573,8 @@ static CPU_EXECUTE( ccpu )
cpustate->icount = -1;
/* some games repeat the FRM opcode twice; it apparently does not cause
- a second wait, so we make sure we skip any duplicate opcode at this
- point */
+ a second wait, so we make sure we skip any duplicate opcode at this
+ point */
if (READOP(cpustate, cpustate->PC) == opcode)
cpustate->PC++;
break;
@@ -700,7 +700,7 @@ static CPU_SET_INFO( ccpu )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CCPU_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + CCPU_PC: cpustate->PC = info->i; break;
case CPUINFO_INT_REGISTER + CCPU_FLAGS:
cpustate->a0flag = (info->i & 0x01) ? 1 : 0;
cpustate->ncflag = (info->i & 0x02) ? 0x0000 : 0x1000;
@@ -709,15 +709,15 @@ static CPU_SET_INFO( ccpu )
cpustate->miflag = (info->i & 0x10) ? 1 : 0;
cpustate->drflag = (info->i & 0x20) ? 1 : 0;
break;
- case CPUINFO_INT_REGISTER + CCPU_A: cpustate->A = info->i & 0xfff; break;
- case CPUINFO_INT_REGISTER + CCPU_B: cpustate->B = info->i & 0xfff; break;
- case CPUINFO_INT_REGISTER + CCPU_I: cpustate->I = info->i & 0xff; break;
- case CPUINFO_INT_REGISTER + CCPU_J: cpustate->J = info->i & 0xfff; break;
+ case CPUINFO_INT_REGISTER + CCPU_A: cpustate->A = info->i & 0xfff; break;
+ case CPUINFO_INT_REGISTER + CCPU_B: cpustate->B = info->i & 0xfff; break;
+ case CPUINFO_INT_REGISTER + CCPU_I: cpustate->I = info->i & 0xff; break;
+ case CPUINFO_INT_REGISTER + CCPU_J: cpustate->J = info->i & 0xfff; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + CCPU_P: cpustate->P = info->i & 0x0f; break;
- case CPUINFO_INT_REGISTER + CCPU_X: cpustate->X = info->i & 0xfff; break;
- case CPUINFO_INT_REGISTER + CCPU_Y: cpustate->Y = info->i & 0xfff; break;
- case CPUINFO_INT_REGISTER + CCPU_T: cpustate->T = info->i & 0xfff; break;
+ case CPUINFO_INT_REGISTER + CCPU_P: cpustate->P = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + CCPU_X: cpustate->X = info->i & 0xfff; break;
+ case CPUINFO_INT_REGISTER + CCPU_Y: cpustate->Y = info->i & 0xfff; break;
+ case CPUINFO_INT_REGISTER + CCPU_T: cpustate->T = info->i & 0xfff; break;
}
}
@@ -734,32 +734,32 @@ CPU_GET_INFO( ccpu )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ccpu_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 15; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ccpu_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 15; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CCPU_PC: info->i = cpustate->PC; break;
- case CPUINFO_INT_REGISTER + CCPU_FLAGS: info->i = 0;
+ case CPUINFO_INT_REGISTER + CCPU_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + CCPU_FLAGS: info->i = 0;
if (TEST_A0(cpustate)) info->i |= 0x01;
if (TEST_NC(cpustate)) info->i |= 0x02;
if (TEST_LT(cpustate)) info->i |= 0x04;
@@ -767,62 +767,62 @@ CPU_GET_INFO( ccpu )
if ((*cpustate->external_input)(cpustate->device)) info->i |= 0x10;
if (TEST_DR(cpustate)) info->i |= 0x20;
break;
- case CPUINFO_INT_REGISTER + CCPU_A: info->i = cpustate->A; break;
- case CPUINFO_INT_REGISTER + CCPU_B: info->i = cpustate->B; break;
- case CPUINFO_INT_REGISTER + CCPU_I: info->i = cpustate->I; break;
- case CPUINFO_INT_REGISTER + CCPU_J: info->i = cpustate->J; break;
+ case CPUINFO_INT_REGISTER + CCPU_A: info->i = cpustate->A; break;
+ case CPUINFO_INT_REGISTER + CCPU_B: info->i = cpustate->B; break;
+ case CPUINFO_INT_REGISTER + CCPU_I: info->i = cpustate->I; break;
+ case CPUINFO_INT_REGISTER + CCPU_J: info->i = cpustate->J; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + CCPU_P: info->i = cpustate->P; break;
- case CPUINFO_INT_REGISTER + CCPU_X: info->i = cpustate->X; break;
- case CPUINFO_INT_REGISTER + CCPU_Y: info->i = cpustate->Y; break;
- case CPUINFO_INT_REGISTER + CCPU_T: info->i = cpustate->T; break;
+ case CPUINFO_INT_REGISTER + CCPU_P: info->i = cpustate->P; break;
+ case CPUINFO_INT_REGISTER + CCPU_X: info->i = cpustate->X; break;
+ case CPUINFO_INT_REGISTER + CCPU_Y: info->i = cpustate->Y; break;
+ case CPUINFO_INT_REGISTER + CCPU_T: info->i = cpustate->T; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ccpu); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ccpu); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ccpu); break;
- case CPUINFO_FCT_EXIT: info->exit = NULL; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ccpu); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ccpu); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ccpu); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ccpu); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ccpu); break;
+ case CPUINFO_FCT_EXIT: info->exit = NULL; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ccpu); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ccpu); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "CCPU"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Cinematronics CPU"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles & Zonn Moore"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "CCPU"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Cinematronics CPU"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles & Zonn Moore"); break;
case CPUINFO_STR_FLAGS:
- sprintf(info->s, "%c%c%c%c%c%c",
- TEST_A0(cpustate) ? '0' : 'o',
- TEST_NC(cpustate) ? 'N' : 'n',
- TEST_LT(cpustate) ? 'L' : 'l',
- TEST_EQ(cpustate) ? 'E' : 'e',
- (*cpustate->external_input)(cpustate->device) ? 'M' : 'm',
- TEST_DR(cpustate) ? 'D' : 'd');
- break;
-
- case CPUINFO_STR_REGISTER + CCPU_FLAGS:
- sprintf(info->s, "FL:%c%c%c%c%c%c",
- TEST_A0(cpustate) ? '0' : 'o',
- TEST_NC(cpustate) ? 'N' : 'n',
- TEST_LT(cpustate) ? 'L' : 'l',
- TEST_EQ(cpustate) ? 'E' : 'e',
- (*cpustate->external_input)(cpustate->device) ? 'M' : 'm',
- TEST_DR(cpustate) ? 'D' : 'd');
- break;
-
- case CPUINFO_STR_REGISTER + CCPU_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + CCPU_A: sprintf(info->s, "A:%03X", cpustate->A); break;
- case CPUINFO_STR_REGISTER + CCPU_B: sprintf(info->s, "B:%03X", cpustate->B); break;
- case CPUINFO_STR_REGISTER + CCPU_I: sprintf(info->s, "I:%03X", cpustate->I); break;
- case CPUINFO_STR_REGISTER + CCPU_J: sprintf(info->s, "J:%03X", cpustate->J); break;
- case CPUINFO_STR_REGISTER + CCPU_P: sprintf(info->s, "P:%X", cpustate->P); break;
- case CPUINFO_STR_REGISTER + CCPU_X: sprintf(info->s, "X:%03X", cpustate->X); break;
- case CPUINFO_STR_REGISTER + CCPU_Y: sprintf(info->s, "Y:%03X", cpustate->Y); break;
- case CPUINFO_STR_REGISTER + CCPU_T: sprintf(info->s, "T:%03X", cpustate->T); break;
+ sprintf(info->s, "%c%c%c%c%c%c",
+ TEST_A0(cpustate) ? '0' : 'o',
+ TEST_NC(cpustate) ? 'N' : 'n',
+ TEST_LT(cpustate) ? 'L' : 'l',
+ TEST_EQ(cpustate) ? 'E' : 'e',
+ (*cpustate->external_input)(cpustate->device) ? 'M' : 'm',
+ TEST_DR(cpustate) ? 'D' : 'd');
+ break;
+
+ case CPUINFO_STR_REGISTER + CCPU_FLAGS:
+ sprintf(info->s, "FL:%c%c%c%c%c%c",
+ TEST_A0(cpustate) ? '0' : 'o',
+ TEST_NC(cpustate) ? 'N' : 'n',
+ TEST_LT(cpustate) ? 'L' : 'l',
+ TEST_EQ(cpustate) ? 'E' : 'e',
+ (*cpustate->external_input)(cpustate->device) ? 'M' : 'm',
+ TEST_DR(cpustate) ? 'D' : 'd');
+ break;
+
+ case CPUINFO_STR_REGISTER + CCPU_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + CCPU_A: sprintf(info->s, "A:%03X", cpustate->A); break;
+ case CPUINFO_STR_REGISTER + CCPU_B: sprintf(info->s, "B:%03X", cpustate->B); break;
+ case CPUINFO_STR_REGISTER + CCPU_I: sprintf(info->s, "I:%03X", cpustate->I); break;
+ case CPUINFO_STR_REGISTER + CCPU_J: sprintf(info->s, "J:%03X", cpustate->J); break;
+ case CPUINFO_STR_REGISTER + CCPU_P: sprintf(info->s, "P:%X", cpustate->P); break;
+ case CPUINFO_STR_REGISTER + CCPU_X: sprintf(info->s, "X:%03X", cpustate->X); break;
+ case CPUINFO_STR_REGISTER + CCPU_Y: sprintf(info->s, "Y:%03X", cpustate->Y); break;
+ case CPUINFO_STR_REGISTER + CCPU_T: sprintf(info->s, "T:%03X", cpustate->T); break;
}
}
diff --git a/src/emu/cpu/ccpu/ccpu.h b/src/emu/cpu/ccpu/ccpu.h
index a7df1f55756..a1630a294b5 100644
--- a/src/emu/cpu/ccpu/ccpu.h
+++ b/src/emu/cpu/ccpu/ccpu.h
@@ -11,7 +11,7 @@
#pragma once
#ifndef __CCPU_H__
-#define __CCPU_H__
+#define __CCPU_H__
/***************************************************************************
@@ -43,8 +43,8 @@ typedef void (*ccpu_vector_func)(device_t *device, INT16 sx, INT16 sy, INT16 ex,
struct ccpu_config
{
- ccpu_input_func external_input; /* if NULL, assume JMI jumper is present */
- ccpu_vector_func vector_callback;
+ ccpu_input_func external_input; /* if NULL, assume JMI jumper is present */
+ ccpu_vector_func vector_callback;
};
diff --git a/src/emu/cpu/ccpu/ccpudasm.c b/src/emu/cpu/ccpu/ccpudasm.c
index 24c1107f55d..93069c8a25b 100644
--- a/src/emu/cpu/ccpu/ccpudasm.c
+++ b/src/emu/cpu/ccpu/ccpudasm.c
@@ -21,18 +21,18 @@ CPU_DISASSEMBLE( ccpu )
switch (opcode)
{
/* LDAI */
- case 0x00: case 0x01: case 0x02: case 0x03:
- case 0x04: case 0x05: case 0x06: case 0x07:
- case 0x08: case 0x09: case 0x0a: case 0x0b:
- case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ case 0x00: case 0x01: case 0x02: case 0x03:
+ case 0x04: case 0x05: case 0x06: case 0x07:
+ case 0x08: case 0x09: case 0x0a: case 0x0b:
+ case 0x0c: case 0x0d: case 0x0e: case 0x0f:
sprintf(buffer, "LDAI $%X", opcode & 0x0f);
break;
/* INP */
- case 0x10: case 0x11: case 0x12: case 0x13:
- case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b:
- case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ case 0x1c: case 0x1d: case 0x1e: case 0x1f:
sprintf(buffer, "INP $%X", opcode & 0x0f);
break;
@@ -42,10 +42,10 @@ CPU_DISASSEMBLE( ccpu )
break;
/* A4I */
- case 0x21: case 0x22: case 0x23:
- case 0x24: case 0x25: case 0x26: case 0x27:
- case 0x28: case 0x29: case 0x2a: case 0x2b:
- case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ case 0x21: case 0x22: case 0x23:
+ case 0x24: case 0x25: case 0x26: case 0x27:
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f:
sprintf(buffer, "A4I $%X", opcode & 0x0f);
break;
@@ -55,18 +55,18 @@ CPU_DISASSEMBLE( ccpu )
break;
/* S4I */
- case 0x31: case 0x32: case 0x33:
- case 0x34: case 0x35: case 0x36: case 0x37:
- case 0x38: case 0x39: case 0x3a: case 0x3b:
- case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ case 0x31: case 0x32: case 0x33:
+ case 0x34: case 0x35: case 0x36: case 0x37:
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ case 0x3c: case 0x3d: case 0x3e: case 0x3f:
sprintf(buffer, "S4I $%X", opcode & 0x0f);
break;
/* LPAI */
- case 0x40: case 0x41: case 0x42: case 0x43:
- case 0x44: case 0x45: case 0x46: case 0x47:
- case 0x48: case 0x49: case 0x4a: case 0x4b:
- case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ case 0x40: case 0x41: case 0x42: case 0x43:
+ case 0x44: case 0x45: case 0x46: case 0x47:
+ case 0x48: case 0x49: case 0x4a: case 0x4b:
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f:
tempval = oprom[pc++ - startpc];
sprintf(buffer, "LPAI $%03X", (opcode & 0x0f) + (tempval & 0xf0) + ((tempval & 0x0f) << 8));
break;
@@ -152,66 +152,66 @@ CPU_DISASSEMBLE( ccpu )
break;
/* ADD */
- case 0x60: case 0x61: case 0x62: case 0x63:
- case 0x64: case 0x65: case 0x66: case 0x67:
- case 0x68: case 0x69: case 0x6a: case 0x6b:
- case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x65: case 0x66: case 0x67:
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f:
sprintf(buffer, "ADD $%X", opcode & 0x0f);
break;
/* SUB n */
- case 0x70: case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- case 0x78: case 0x79: case 0x7a: case 0x7b:
- case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f:
sprintf(buffer, "SUB $%X", opcode & 0x0f);
break;
/* SETP n */
- case 0x80: case 0x81: case 0x82: case 0x83:
- case 0x84: case 0x85: case 0x86: case 0x87:
- case 0x88: case 0x89: case 0x8a: case 0x8b:
- case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x85: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f:
sprintf(buffer, "SETP $%X", opcode & 0x0f);
break;
/* OUT */
- case 0x90: case 0x91: case 0x92: case 0x93:
- case 0x94: case 0x95: case 0x96: case 0x97:
- case 0x98: case 0x99: case 0x9a: case 0x9b:
- case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f:
sprintf(buffer, "OUT $%X", opcode & 0x0f);
break;
/* LDA */
- case 0xa0: case 0xa1: case 0xa2: case 0xa3:
- case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- case 0xa8: case 0xa9: case 0xaa: case 0xab:
- case 0xac: case 0xad: case 0xae: case 0xaf:
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ case 0xac: case 0xad: case 0xae: case 0xaf:
sprintf(buffer, "LDA $%X", opcode & 0x0f);
break;
/* CMP */
- case 0xb0: case 0xb1: case 0xb2: case 0xb3:
- case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- case 0xb8: case 0xb9: case 0xba: case 0xbb:
- case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf:
sprintf(buffer, "TST $%X", opcode & 0x0f);
break;
/* WS */
- case 0xc0: case 0xc1: case 0xc2: case 0xc3:
- case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb:
- case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3:
+ case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ case 0xcc: case 0xcd: case 0xce: case 0xcf:
sprintf(buffer, "WS $%X", opcode & 0x0f);
break;
/* STA n */
- case 0xd0: case 0xd1: case 0xd2: case 0xd3:
- case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb:
- case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3:
+ case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ case 0xdc: case 0xdd: case 0xde: case 0xdf:
sprintf(buffer, "STA $%X", opcode & 0x0f);
break;
diff --git a/src/emu/cpu/cop400/cop400.c b/src/emu/cpu/cop400/cop400.c
index e931c5efacd..9e4d65fdc48 100644
--- a/src/emu/cpu/cop400/cop400.c
+++ b/src/emu/cpu/cop400/cop400.c
@@ -73,10 +73,10 @@
***************************************************************************/
/* feature masks */
-#define COP410_FEATURE 0x01
-#define COP420_FEATURE 0x02
-#define COP444_FEATURE 0x04
-#define COP440_FEATURE 0x08
+#define COP410_FEATURE 0x01
+#define COP420_FEATURE 0x02
+#define COP444_FEATURE 0x04
+#define COP440_FEATURE 0x08
/***************************************************************************
TYPE DEFINITIONS
@@ -88,57 +88,57 @@ struct cop400_state
{
const cop400_interface *intf;
- address_space *program;
- direct_read_data *direct;
- address_space *data;
- address_space *io;
+ address_space *program;
+ direct_read_data *direct;
+ address_space *data;
+ address_space *io;
- UINT8 featuremask;
+ UINT8 featuremask;
/* registers */
- UINT16 pc; /* 9/10/11-bit ROM address program counter */
- UINT16 prevpc; /* previous value of program counter */
- UINT8 a; /* 4-bit accumulator */
- UINT8 b; /* 5/6/7-bit RAM address register */
- int c; /* 1-bit carry register */
- UINT8 n; /* 2-bit stack pointer (COP440 only) */
- UINT8 en; /* 4-bit enable register */
- UINT8 g; /* 4-bit general purpose I/O port */
- UINT8 q; /* 8-bit latch for L port */
- UINT16 sa, sb, sc; /* subroutine save registers (not present in COP440) */
- UINT8 sio; /* 4-bit shift register and counter */
- int skl; /* 1-bit latch for SK output */
- UINT8 h; /* 4-bit general purpose I/O port (COP440 only) */
- UINT8 r; /* 8-bit general purpose I/O port (COP440 only) */
- UINT8 flags; // used for I/O only
+ UINT16 pc; /* 9/10/11-bit ROM address program counter */
+ UINT16 prevpc; /* previous value of program counter */
+ UINT8 a; /* 4-bit accumulator */
+ UINT8 b; /* 5/6/7-bit RAM address register */
+ int c; /* 1-bit carry register */
+ UINT8 n; /* 2-bit stack pointer (COP440 only) */
+ UINT8 en; /* 4-bit enable register */
+ UINT8 g; /* 4-bit general purpose I/O port */
+ UINT8 q; /* 8-bit latch for L port */
+ UINT16 sa, sb, sc; /* subroutine save registers (not present in COP440) */
+ UINT8 sio; /* 4-bit shift register and counter */
+ int skl; /* 1-bit latch for SK output */
+ UINT8 h; /* 4-bit general purpose I/O port (COP440 only) */
+ UINT8 r; /* 8-bit general purpose I/O port (COP440 only) */
+ UINT8 flags; // used for I/O only
/* counter */
- UINT8 t; /* 8-bit timer */
- int skt_latch; /* timer overflow latch */
+ UINT8 t; /* 8-bit timer */
+ int skt_latch; /* timer overflow latch */
/* input/output ports */
- UINT8 g_mask; /* G port mask */
- UINT8 d_mask; /* D port mask */
- UINT8 in_mask; /* IN port mask */
- UINT8 il; /* IN latch */
- UINT8 in[4]; /* IN port shift register */
- UINT8 si; /* serial input */
+ UINT8 g_mask; /* G port mask */
+ UINT8 d_mask; /* D port mask */
+ UINT8 in_mask; /* IN port mask */
+ UINT8 il; /* IN latch */
+ UINT8 in[4]; /* IN port shift register */
+ UINT8 si; /* serial input */
/* skipping logic */
- int skip; /* skip next instruction */
- int skip_lbi; /* skip until next non-LBI instruction */
- int last_skip; /* last value of skip */
- int halt; /* halt mode */
- int idle; /* idle mode */
+ int skip; /* skip next instruction */
+ int skip_lbi; /* skip until next non-LBI instruction */
+ int last_skip; /* last value of skip */
+ int halt; /* halt mode */
+ int idle; /* idle mode */
/* microbus */
- int microbus_int; /* microbus interrupt */
+ int microbus_int; /* microbus interrupt */
/* execution logic */
- int InstLen[256]; /* instruction length in bytes */
+ int InstLen[256]; /* instruction length in bytes */
int LBIops[256];
int LBIops33[256];
- int icount; /* instruction counter */
+ int icount; /* instruction counter */
const cop400_opcode_map *opcode_map;
@@ -160,40 +160,40 @@ struct cop400_opcode_map {
MACROS
***************************************************************************/
-#define ROM(a) cpustate->direct->read_decrypted_byte(a)
-#define RAM_R(a) cpustate->data->read_byte(a)
-#define RAM_W(a, v) cpustate->data->write_byte(a, v)
-#define IN(a) cpustate->io->read_byte(a)
-#define OUT(a, v) cpustate->io->write_byte(a, v)
-
-#define IN_G() (IN(COP400_PORT_G) & cpustate->g_mask)
-#define IN_L() IN(COP400_PORT_L)
-#define IN_SI() BIT(IN(COP400_PORT_SIO), 0)
-#define IN_CKO() BIT(IN(COP400_PORT_CKO), 0)
-#define IN_IN() (cpustate->in_mask ? IN(COP400_PORT_IN) : 0)
-
-#define OUT_G(v) OUT(COP400_PORT_G, (v) & cpustate->g_mask)
-#define OUT_L(v) OUT(COP400_PORT_L, (v))
-#define OUT_D(v) OUT(COP400_PORT_D, (v) & cpustate->d_mask)
-#define OUT_SK(v) OUT(COP400_PORT_SK, (v))
-#define OUT_SO(v) OUT(COP400_PORT_SIO, (v))
-
-#define PC cpustate->pc
-#define A cpustate->a
-#define B cpustate->b
-#define C cpustate->c
-#define G cpustate->g
-#define Q cpustate->q
-#define H cpustate->h
-#define R cpustate->r
-#define EN cpustate->en
-#define SA cpustate->sa
-#define SB cpustate->sb
-#define SC cpustate->sc
-#define SIO cpustate->sio
-#define SKL cpustate->skl
-#define T cpustate->t
-#define IL cpustate->il
+#define ROM(a) cpustate->direct->read_decrypted_byte(a)
+#define RAM_R(a) cpustate->data->read_byte(a)
+#define RAM_W(a, v) cpustate->data->write_byte(a, v)
+#define IN(a) cpustate->io->read_byte(a)
+#define OUT(a, v) cpustate->io->write_byte(a, v)
+
+#define IN_G() (IN(COP400_PORT_G) & cpustate->g_mask)
+#define IN_L() IN(COP400_PORT_L)
+#define IN_SI() BIT(IN(COP400_PORT_SIO), 0)
+#define IN_CKO() BIT(IN(COP400_PORT_CKO), 0)
+#define IN_IN() (cpustate->in_mask ? IN(COP400_PORT_IN) : 0)
+
+#define OUT_G(v) OUT(COP400_PORT_G, (v) & cpustate->g_mask)
+#define OUT_L(v) OUT(COP400_PORT_L, (v))
+#define OUT_D(v) OUT(COP400_PORT_D, (v) & cpustate->d_mask)
+#define OUT_SK(v) OUT(COP400_PORT_SK, (v))
+#define OUT_SO(v) OUT(COP400_PORT_SIO, (v))
+
+#define PC cpustate->pc
+#define A cpustate->a
+#define B cpustate->b
+#define C cpustate->c
+#define G cpustate->g
+#define Q cpustate->q
+#define H cpustate->h
+#define R cpustate->r
+#define EN cpustate->en
+#define SA cpustate->sa
+#define SB cpustate->sb
+#define SC cpustate->sc
+#define SIO cpustate->sio
+#define SKL cpustate->skl
+#define T cpustate->t
+#define IL cpustate->il
/***************************************************************************
INLINE FUNCTIONS
@@ -203,18 +203,18 @@ INLINE cop400_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == COP401 ||
- device->type() == COP410 ||
- device->type() == COP411 ||
- device->type() == COP402 ||
- device->type() == COP420 ||
- device->type() == COP421 ||
- device->type() == COP422 ||
- device->type() == COP404 ||
- device->type() == COP424 ||
- device->type() == COP425 ||
- device->type() == COP426 ||
- device->type() == COP444 ||
- device->type() == COP445);
+ device->type() == COP410 ||
+ device->type() == COP411 ||
+ device->type() == COP402 ||
+ device->type() == COP420 ||
+ device->type() == COP421 ||
+ device->type() == COP422 ||
+ device->type() == COP404 ||
+ device->type() == COP424 ||
+ device->type() == COP425 ||
+ device->type() == COP426 ||
+ device->type() == COP444 ||
+ device->type() == COP445);
return (cop400_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -281,41 +281,41 @@ INSTRUCTION(illegal)
static const cop400_opcode_map COP410_OPCODE_23_MAP[] =
{
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, xad },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, xad },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
};
static void cop410_op23(cop400_state *cpustate, UINT8 opcode)
@@ -327,41 +327,41 @@ static void cop410_op23(cop400_state *cpustate, UINT8 opcode)
static const cop400_opcode_map COP410_OPCODE_33_MAP[] =
{
- {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, ing },{1, illegal },{1, illegal },{1, illegal },{1, inl },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, halt },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
- {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
+ {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, ing },{1, illegal },{1, illegal },{1, illegal },{1, inl },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, halt },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
+ {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
};
static void cop410_op33(cop400_state *cpustate, UINT8 opcode)
@@ -373,80 +373,80 @@ static void cop410_op33(cop400_state *cpustate, UINT8 opcode)
static const cop400_opcode_map COP410_OPCODE_MAP[] =
{
- {1, clra },{1, skmbz0 },{1, xor_ },{1, skmbz2 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {0, illegal },{1, skmbz1 },{0, illegal },{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, skc },{1, ske },{1, sc },{1, cop410_op23 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, asc },{1, add },{1, rc },{1, cop410_op33 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
-
- {1, comp },{0, illegal },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 },
- {1, ret },{1, retsk },{0, illegal },{1, smb3 },{1, rmb0 },{1, smb0 },{1, cba },{1, xas },
- {1, cab },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
- {1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
- {2, jmp },{2, jmp },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
- {2, jsr },{2, jsr },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
- {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
- {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
-
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, lqid },
-
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, jid }
+ {1, clra },{1, skmbz0 },{1, xor_ },{1, skmbz2 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {0, illegal },{1, skmbz1 },{0, illegal },{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, skc },{1, ske },{1, sc },{1, cop410_op23 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, asc },{1, add },{1, rc },{1, cop410_op33 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+
+ {1, comp },{0, illegal },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 },
+ {1, ret },{1, retsk },{0, illegal },{1, smb3 },{1, rmb0 },{1, smb0 },{1, cba },{1, xas },
+ {1, cab },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
+ {1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
+ {2, jmp },{2, jmp },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+ {2, jsr },{2, jsr },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+ {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
+ {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
+
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, lqid },
+
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, jid }
};
static const cop400_opcode_map COP420_OPCODE_23_MAP[] =
{
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
-
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
};
static void cop420_op23(cop400_state *cpustate, UINT8 opcode)
@@ -458,41 +458,41 @@ static void cop420_op23(cop400_state *cpustate, UINT8 opcode)
static const cop400_opcode_map COP420_OPCODE_33_MAP[] =
{
- {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
- {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
- {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
- {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
-
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
+ {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, illegal },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
+ {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
+ {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
+ {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal }
};
static void cop420_op33(cop400_state *cpustate, UINT8 opcode)
@@ -504,80 +504,80 @@ static void cop420_op33(cop400_state *cpustate, UINT8 opcode)
static const cop400_opcode_map COP420_OPCODE_MAP[] =
{
- {1, clra },{1, skmbz0 },{1, xor_ },{1, skmbz2 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, casc },{1, skmbz1 },{1, xabr },{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, skc },{1, ske },{1, sc },{1, cop420_op23 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, asc },{1, add },{1, rc },{1, cop420_op33 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
-
- {1, comp },{1, skt },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 },
- {1, cop420_ret },{1, retsk },{1, adt },{1, smb3 },{1, rmb0 },{1, smb0 },{1, cba },{1, xas },
- {1, cab },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
- {1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
- {2, jmp },{2, jmp },{2, jmp },{2, jmp },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
- {2, jsr },{2, jsr },{2, jsr },{2, jsr },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
- {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
- {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
-
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, lqid },
-
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, jid }
+ {1, clra },{1, skmbz0 },{1, xor_ },{1, skmbz2 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, casc },{1, skmbz1 },{1, xabr },{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, skc },{1, ske },{1, sc },{1, cop420_op23 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, asc },{1, add },{1, rc },{1, cop420_op33 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+
+ {1, comp },{1, skt },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 },
+ {1, cop420_ret },{1, retsk },{1, adt },{1, smb3 },{1, rmb0 },{1, smb0 },{1, cba },{1, xas },
+ {1, cab },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
+ {1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
+ {2, jmp },{2, jmp },{2, jmp },{2, jmp },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+ {2, jsr },{2, jsr },{2, jsr },{2, jsr },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+ {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
+ {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
+
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, lqid },
+
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, jid }
};
static const cop400_opcode_map COP444_OPCODE_23_MAP[256] =
{
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
-
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
- {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
-
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
-
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
- {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+ {1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },{1, ldd },
+
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
+ {1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },{1, xad },
};
static void cop444_op23(cop400_state *cpustate, UINT8 opcode)
@@ -589,41 +589,41 @@ static void cop444_op23(cop400_state *cpustate, UINT8 opcode)
static const cop400_opcode_map COP444_OPCODE_33_MAP[256] =
{
- {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, ctma },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, it },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, camt },
-
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
- {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
- {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
- {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
- {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
-
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
-
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, illegal },{1, skgbz0 },{1, illegal },{1, skgbz2 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, skgbz1 },{1, illegal },{1, skgbz3 },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, skgz },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, inin },{1, inil },{1, ing },{1, illegal },{1, cqma },{1, illegal },{1, inl },{1, ctma },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, it },{1, illegal },{1, omg },{1, illegal },{1, camq },{1, illegal },{1, obd },{1, camt },
+
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
+ {1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },{1, ogi },
+ {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
+ {1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },{1, lei },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+ {1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },{1, illegal },
+
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
};
static void cop444_op33(cop400_state *cpustate, UINT8 opcode)
@@ -635,41 +635,41 @@ static void cop444_op33(cop400_state *cpustate, UINT8 opcode)
static const cop400_opcode_map COP444_OPCODE_MAP[256] =
{
- {1, clra },{1, skmbz0 },{1, xor_ },{1, skmbz2 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, casc },{1, skmbz1 },{1, cop444_xabr},{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, skc },{1, ske },{1, sc },{1, cop444_op23 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
- {1, asc },{1, add },{1, rc },{1, cop444_op33 },{1, xis },{1, ld },{1, x },{1, xds },
- {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
-
- {1, comp },{1, skt },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 },
- {1, cop420_ret },{1, retsk },{1, adt },{1, smb3 },{1, rmb0 },{1, smb0 },{1, cba },{1, xas },
- {1, cab },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
- {1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
- {2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },
- {2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },
- {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
- {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
-
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, lqid },
-
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
- {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, jid }
+ {1, clra },{1, skmbz0 },{1, xor_ },{1, skmbz2 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, casc },{1, skmbz1 },{1, cop444_xabr},{1, skmbz3 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, skc },{1, ske },{1, sc },{1, cop444_op23 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+ {1, asc },{1, add },{1, rc },{1, cop444_op33 },{1, xis },{1, ld },{1, x },{1, xds },
+ {1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },{1, lbi },
+
+ {1, comp },{1, skt },{1, rmb2 },{1, rmb3 },{1, nop },{1, rmb1 },{1, smb2 },{1, smb1 },
+ {1, cop420_ret },{1, retsk },{1, adt },{1, smb3 },{1, rmb0 },{1, smb0 },{1, cba },{1, xas },
+ {1, cab },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
+ {1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },{1, aisc },
+ {2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },{2, jmp },
+ {2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },{2, jsr },
+ {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
+ {1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },{1, stii },
+
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, lqid },
+
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },
+ {1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{1, jp },{2, jid }
};
/***************************************************************************
@@ -684,11 +684,11 @@ static TIMER_CALLBACK( serial_tick )
{
/*
- SIO is an asynchronous binary counter decrementing its value by one upon each low-going pulse ("1" to "0") occurring on the SI input.
- Each pulse must remain at each logic level at least two instruction cycles. SK outputs the value of the C upon the execution of an XAS
- and remains latched until the execution of another XAS instruction. The SO output is equal to the value of EN3.
+ SIO is an asynchronous binary counter decrementing its value by one upon each low-going pulse ("1" to "0") occurring on the SI input.
+ Each pulse must remain at each logic level at least two instruction cycles. SK outputs the value of the C upon the execution of an XAS
+ and remains latched until the execution of another XAS instruction. The SO output is equal to the value of EN3.
- */
+ */
// serial output
@@ -713,15 +713,15 @@ static TIMER_CALLBACK( serial_tick )
{
/*
- SIO is a serial shift register, shifting continuously left each instruction cycle time. The data present at SI goes into the least
- significant bit of SIO: SO can be enabled to output the most significant bit of SIO each cycle time. SK output becomes a logic-
- controlled clock, providing a SYNC signal each instruction time. It will start outputting a SYNC pulse upon the execution of an XAS
- instruction with C = "1," stopping upon the execution of a subsequent XAS with C = "0".
+ SIO is a serial shift register, shifting continuously left each instruction cycle time. The data present at SI goes into the least
+ significant bit of SIO: SO can be enabled to output the most significant bit of SIO each cycle time. SK output becomes a logic-
+ controlled clock, providing a SYNC signal each instruction time. It will start outputting a SYNC pulse upon the execution of an XAS
+ instruction with C = "1," stopping upon the execution of a subsequent XAS with C = "0".
- If EN0 is changed from "1" to "0" ("0" to "1") the SK output will change from "1" to SYNC (SYNC to "1") without the execution of
- an XAS instruction.
+ If EN0 is changed from "1" to "0" ("0" to "1") the SK output will change from "1" to SYNC (SYNC to "1") without the execution of
+ an XAS instruction.
- */
+ */
// serial output
@@ -1187,7 +1187,7 @@ static CPU_EXECUTE( cop400 )
{
cop400_opcode_func function = cpustate->opcode_map[ROM(PC)].function;
- if ((function != jp) && (function != jmp) && (function != jsr))
+ if ((function != jp) && (function != jmp) && (function != jsr))
{
// store skip logic
cpustate->last_skip = cpustate->skip;
@@ -1352,7 +1352,7 @@ static CPU_EXPORT_STATE( cop400 )
{
case STATE_GENFLAGS:
cpustate->flags = (cpustate->c ? 0x02 : 0x00) |
- (cpustate->skl ? 0x01 : 0x00);
+ (cpustate->skl ? 0x01 : 0x00);
break;
}
}
@@ -1365,8 +1365,8 @@ static CPU_EXPORT_STRING( cop400 )
{
case STATE_GENFLAGS:
string.printf("%c%c",
- cpustate->c ? 'C' : '.',
- cpustate->skl ? 'S' : '.');
+ cpustate->c ? 'C' : '.',
+ cpustate->skl ? 'S' : '.');
break;
}
}
@@ -1384,49 +1384,49 @@ static CPU_GET_INFO( cop400 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cop400_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = (intf != NULL) ? intf->cki : 16; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: /* set per-core */ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; /* really 4 */ break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: /* set per-core */ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cop400_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = (intf != NULL) ? intf->cki : 16; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: /* set per-core */ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; /* really 4 */ break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: /* set per-core */ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cop400); break;
- case CPUINFO_FCT_INIT: /* set per-core */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cop400); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cop400); break;
- case CPUINFO_FCT_DISASSEMBLE: /* set per-core */ break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cop400); break;
+ case CPUINFO_FCT_INIT: /* set per-core */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cop400); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cop400); break;
+ case CPUINFO_FCT_DISASSEMBLE: /* set per-core */ break;
// case CPUINFO_FCT_VALIDITY_CHECK: /* set per-core */ break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(cop400); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(cop400); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(cop400); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(cop400); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(cop400); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(cop400); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: /* set per-core */ break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: /* set per-core */ break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: /* set per-core */ break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: /* set per-core */ break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP400"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright MAME Team"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP400"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "National Semiconductor COPS"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright MAME Team"); break;
}
}
@@ -1439,22 +1439,22 @@ CPU_GET_INFO( cop410 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop410); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop410); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop410); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop410); break;
// case CPUINFO_FCT_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop410); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_512b); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_32b); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_512b); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_32b); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP410"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP410"); break;
- default: CPU_GET_INFO_CALL(cop400); break;
+ default: CPU_GET_INFO_CALL(cop400); break;
}
}
@@ -1465,12 +1465,12 @@ CPU_GET_INFO( cop411 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop411); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop411); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP411"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP411"); break;
- default: CPU_GET_INFO_CALL(cop410); break;
+ default: CPU_GET_INFO_CALL(cop410); break;
}
}
@@ -1481,12 +1481,12 @@ CPU_GET_INFO( cop401 )
switch (state)
{
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP401"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP401"); break;
- default: CPU_GET_INFO_CALL(cop410); break;
+ default: CPU_GET_INFO_CALL(cop410); break;
}
}
@@ -1497,28 +1497,28 @@ CPU_GET_INFO( cop420 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop420); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop420); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop420); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop420); break;
// case CPUINFO_FCT_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop420); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_1kb); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_64b); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_1kb); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_64b); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP420"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP420"); break;
case CPUINFO_STR_FLAGS: sprintf(info->s,
"%c%c%c",
- cpustate->c ? 'C' : '.',
- cpustate->skl ? 'S' : '.',
- cpustate->skt_latch ? 'T' : '.'); break;
+ cpustate->c ? 'C' : '.',
+ cpustate->skl ? 'S' : '.',
+ cpustate->skt_latch ? 'T' : '.'); break;
- default: CPU_GET_INFO_CALL(cop400); break;
+ default: CPU_GET_INFO_CALL(cop400); break;
}
}
@@ -1529,13 +1529,13 @@ CPU_GET_INFO( cop421 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop421); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop421); break;
// case CPUINFO_FCT_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop421); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP421"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP421"); break;
- default: CPU_GET_INFO_CALL(cop420); break;
+ default: CPU_GET_INFO_CALL(cop420); break;
}
}
@@ -1546,12 +1546,12 @@ CPU_GET_INFO( cop422 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop422); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop422); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP422"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP422"); break;
- default: CPU_GET_INFO_CALL(cop421); break;
+ default: CPU_GET_INFO_CALL(cop421); break;
}
}
@@ -1562,12 +1562,12 @@ CPU_GET_INFO( cop402 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP402"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP402"); break;
- default: CPU_GET_INFO_CALL(cop420); break;
+ default: CPU_GET_INFO_CALL(cop420); break;
}
}
@@ -1578,28 +1578,28 @@ CPU_GET_INFO( cop444 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop444); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop444); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop444); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cop444); break;
// case CPUINFO_FCT_VALIDITY_CHECK: info->validity_check = CPU_VALIDITY_CHECK_NAME(cop444); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_2kb); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_128b); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_2kb); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_128b); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP444"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP444"); break;
case CPUINFO_STR_FLAGS: sprintf(info->s,
"%c%c%c",
- cpustate->c ? 'C' : '.',
- cpustate->skl ? 'S' : '.',
- cpustate->skt_latch ? 'T' : '.'); break;
+ cpustate->c ? 'C' : '.',
+ cpustate->skl ? 'S' : '.',
+ cpustate->skt_latch ? 'T' : '.'); break;
- default: CPU_GET_INFO_CALL(cop400); break;
+ default: CPU_GET_INFO_CALL(cop400); break;
}
}
@@ -1610,12 +1610,12 @@ CPU_GET_INFO( cop445 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop445); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop445); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP445"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP445"); break;
- default: CPU_GET_INFO_CALL(cop444); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
@@ -1626,17 +1626,17 @@ CPU_GET_INFO( cop424 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_1kb); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_64b); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_1kb); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_64b); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP424"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP424"); break;
- default: CPU_GET_INFO_CALL(cop444); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
@@ -1647,12 +1647,12 @@ CPU_GET_INFO( cop425 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop425); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop425); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP425"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP425"); break;
- default: CPU_GET_INFO_CALL(cop424); break;
+ default: CPU_GET_INFO_CALL(cop424); break;
}
}
@@ -1663,12 +1663,12 @@ CPU_GET_INFO( cop426 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop426); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cop426); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP426"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP426"); break;
- default: CPU_GET_INFO_CALL(cop424); break;
+ default: CPU_GET_INFO_CALL(cop424); break;
}
}
@@ -1679,12 +1679,12 @@ CPU_GET_INFO( cop404 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "COP404"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "COP404"); break;
- default: CPU_GET_INFO_CALL(cop444); break;
+ default: CPU_GET_INFO_CALL(cop444); break;
}
}
diff --git a/src/emu/cpu/cop400/cop400.h b/src/emu/cpu/cop400/cop400.h
index 1b0a0dfdf0e..3c301063f79 100644
--- a/src/emu/cpu/cop400/cop400.h
+++ b/src/emu/cpu/cop400/cop400.h
@@ -22,9 +22,9 @@
enum
{
COP400_PC,
- COP400_SA,
- COP400_SB,
- COP400_SC,
+ COP400_SA,
+ COP400_SB,
+ COP400_SC,
COP400_N,
COP400_A,
COP400_B,
@@ -34,9 +34,9 @@ enum
COP400_Q,
COP400_R,
COP400_EN,
- COP400_SIO,
- COP400_SKL,
- COP400_T,
+ COP400_SIO,
+ COP400_SKL,
+ COP400_T,
COP400_GENPC = STATE_GENPC,
COP400_GENPCBASE = STATE_GENPCBASE,
COP400_GENSP = STATE_GENSP
@@ -98,9 +98,9 @@ enum cop400_microbus {
/* interface */
struct cop400_interface
{
- cop400_cki_bond cki; /* CKI bonding option */
- cop400_cko_bond cko; /* CKO bonding option */
- cop400_microbus microbus; /* microbus option */
+ cop400_cki_bond cki; /* CKI bonding option */
+ cop400_cko_bond cko; /* CKO bonding option */
+ cop400_microbus microbus; /* microbus option */
};
#define COP400_INTERFACE(name) const cop400_interface (name) =
diff --git a/src/emu/cpu/cop400/cop400op.c b/src/emu/cpu/cop400/cop400op.c
index 9c737f0807e..973113d35b3 100644
--- a/src/emu/cpu/cop400/cop400op.c
+++ b/src/emu/cpu/cop400/cop400op.c
@@ -475,34 +475,34 @@ INSTRUCTION( camq )
{
/*
- Excerpt from the COP410L data sheet:
-
- False states may be generated on L0-L7 during the execution of the CAMQ instruction.
- The L-ports should not be used as clocks for edge sensitive devices such as flip-flops,
- counters, shift registers, etc. the following short program that illustrates this situation.
-
- START:
- CLRA ;ENABLE THE Q
- LEI 4 ;REGISTER TO L LINES
- LBI TEST
- STII 3
- AISC 12
- LOOP:
- LBI TEST ;LOAD Q WITH X'C3
- CAMQ
- JP LOOP
-
- In this program the internal Q register is enabled onto the L lines and a steady bit
- pattern of logic highs is output on L0, L1, L6, L7, and logic lows on L2-L5 via the
- two-byte CAMQ instruction. Timing constraints on the device are such that the Q
- register may be temporarily loaded with the second byte of the CAMQ opcode (3C) prior
- to receiving the valid data pattern. If this occurs, the opcode will ripple onto the L
- lines and cause negative-going glitches on L0, L1, L6, L7, and positive glitches on
- L2-L5. Glitch durations are under 2 ms, although the exact value may vary due to data
- patterns, processing parameters, and L line loading. These false states are peculiar
- only to the CAMQ instruction and the L lines.
-
- */
+ Excerpt from the COP410L data sheet:
+
+ False states may be generated on L0-L7 during the execution of the CAMQ instruction.
+ The L-ports should not be used as clocks for edge sensitive devices such as flip-flops,
+ counters, shift registers, etc. the following short program that illustrates this situation.
+
+ START:
+ CLRA ;ENABLE THE Q
+ LEI 4 ;REGISTER TO L LINES
+ LBI TEST
+ STII 3
+ AISC 12
+ LOOP:
+ LBI TEST ;LOAD Q WITH X'C3
+ CAMQ
+ JP LOOP
+
+ In this program the internal Q register is enabled onto the L lines and a steady bit
+ pattern of logic highs is output on L0, L1, L6, L7, and logic lows on L2-L5 via the
+ two-byte CAMQ instruction. Timing constraints on the device are such that the Q
+ register may be temporarily loaded with the second byte of the CAMQ opcode (3C) prior
+ to receiving the valid data pattern. If this occurs, the opcode will ripple onto the L
+ lines and cause negative-going glitches on L0, L1, L6, L7, and positive glitches on
+ L2-L5. Glitch durations are under 2 ms, although the exact value may vary due to data
+ patterns, processing parameters, and L line loading. These false states are peculiar
+ only to the CAMQ instruction and the L lines.
+
+ */
UINT8 data = (A << 4) | RAM_R(B);
diff --git a/src/emu/cpu/cop400/cop410ds.c b/src/emu/cpu/cop400/cop410ds.c
index 513da9ad15b..0f0bc3c0cc9 100644
--- a/src/emu/cpu/cop400/cop410ds.c
+++ b/src/emu/cpu/cop400/cop410ds.c
@@ -33,7 +33,7 @@ CPU_DISASSEMBLE( cop410 )
address = (UINT16)((pc & 0x3C0) | (opcode & 0x3F));
sprintf(buffer, "JP %x", address);
}
- else //JSRP
+ else //JSRP
{
address = (UINT16)(0x80 | (opcode & 0x3F));
sprintf(buffer, "JSRP %x", address);
diff --git a/src/emu/cpu/cop400/cop420ds.c b/src/emu/cpu/cop400/cop420ds.c
index 9ed207ea66a..f470c3d398b 100644
--- a/src/emu/cpu/cop400/cop420ds.c
+++ b/src/emu/cpu/cop400/cop420ds.c
@@ -33,7 +33,7 @@ CPU_DISASSEMBLE( cop420 )
address = (UINT16)((pc & 0x3C0) | (opcode & 0x3F));
sprintf(buffer, "JP %x", address);
}
- else //JSRP
+ else //JSRP
{
address = (UINT16)(0x80 | (opcode & 0x3F));
sprintf(buffer, "JSRP %x", address);
diff --git a/src/emu/cpu/cop400/cop440ds.c b/src/emu/cpu/cop400/cop440ds.c
index 05e47e3bd4b..56d8b508afb 100644
--- a/src/emu/cpu/cop400/cop440ds.c
+++ b/src/emu/cpu/cop400/cop440ds.c
@@ -33,7 +33,7 @@ CPU_DISASSEMBLE( cop444 )
address = (UINT16)((pc & 0x3C0) | (opcode & 0x3F));
sprintf(buffer, "JP %x", address);
}
- else //JSRP
+ else //JSRP
{
address = (UINT16)(0x80 | (opcode & 0x3F));
sprintf(buffer, "JSRP %x", address);
diff --git a/src/emu/cpu/cosmac/cosdasm.c b/src/emu/cpu/cosmac/cosdasm.c
index 8f87d694bc1..cfbb883ad99 100644
--- a/src/emu/cpu/cosmac/cosdasm.c
+++ b/src/emu/cpu/cosmac/cosdasm.c
@@ -36,63 +36,63 @@ enum Adr
};
static const struct { const char *mnemonic; Adr adr; } table[]={
- { "IDL", Imp }, { "LDN", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "IDL", Imp }, { "LDN", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "INC", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "INC", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "DEC", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "DEC", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "BR", Low }, { "BQ", Low }, { "BZ", Low }, { "BDF", Low },
- { "B1", Low }, { "B2", Low }, { "B3", Low }, { "B4", Low },
- { "SKP", Low }, { "BNQ", Low }, { "BNZ", Low }, { "BNF", Low },
- { "BN1", Low }, { "BN2", Low }, { "BN3", Low }, { "BN4", Low },
+ { "BR", Low }, { "BQ", Low }, { "BZ", Low }, { "BDF", Low },
+ { "B1", Low }, { "B2", Low }, { "B3", Low }, { "B4", Low },
+ { "SKP", Low }, { "BNQ", Low }, { "BNZ", Low }, { "BNF", Low },
+ { "BN1", Low }, { "BN2", Low }, { "BN3", Low }, { "BN4", Low },
- { "LDA", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "LDA", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "STR", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "STR", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "IRX", Imp } ,{ "OUT", Imp3},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { 0 } ,{ "INP", Imp3},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "IRX", Imp } ,{ "OUT", Imp3},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { 0 } ,{ "INP", Imp3},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "RET", Imp }, { "DIS", Imp }, { "LDXA", Imp }, { "STXD", Imp },
- { "ADC", Imp }, { "SDB", Imp }, { "SHRC", Imp }, { "SMB", Imp },
- { "SAV", Imp }, { "MARK", Imp }, { "REQ", Imp }, { "SEQ", Imp },
- { "ADCI", Imm }, { "SDBI", Imm }, { "SHLC", Imp }, { "SMBI", Imm },
+ { "RET", Imp }, { "DIS", Imp }, { "LDXA", Imp }, { "STXD", Imp },
+ { "ADC", Imp }, { "SDB", Imp }, { "SHRC", Imp }, { "SMB", Imp },
+ { "SAV", Imp }, { "MARK", Imp }, { "REQ", Imp }, { "SEQ", Imp },
+ { "ADCI", Imm }, { "SDBI", Imm }, { "SHLC", Imp }, { "SMBI", Imm },
- { "GLO", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "GLO", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "GHI", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "GHI", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "PLO", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "PLO", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "PHI", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "PHI", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "LBR", Abs }, { "LBQ", Abs }, { "LBZ", Abs }, { "LBDF", Abs },
- { "NOP", Imp }, { "LSNQ", Imp }, { "LSNZ", Imp }, { "LSNF", Imp },
- { "LSKP", Imp }, { "LBNQ", Abs }, { "LBNZ", Abs }, { "LBNF", Abs },
- { "LSIE", Imp }, { "LSQ", Imp }, { "LSZ", Imp }, { "LSDF", Imp },
+ { "LBR", Abs }, { "LBQ", Abs }, { "LBZ", Abs }, { "LBDF", Abs },
+ { "NOP", Imp }, { "LSNQ", Imp }, { "LSNZ", Imp }, { "LSNF", Imp },
+ { "LSKP", Imp }, { "LBNQ", Abs }, { "LBNZ", Abs }, { "LBNF", Abs },
+ { "LSIE", Imp }, { "LSQ", Imp }, { "LSZ", Imp }, { "LSDF", Imp },
- { "SEP", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "SEP", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "SEX", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "SEX", Imp2},{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "LDX", Imp }, { "OR", Imp }, { "AND", Imp }, { "XOR", Imp },
- { "ADD", Imp }, { "SD", Imp }, { "SHR", Imp }, { "SM", Imp },
- { "LDI", Imm }, { "ORI", Imm }, { "ANI", Imm }, { "XRI", Imm },
- { "ADI", Imm }, { "SDI", Imm }, { "SHL", Imp }, { "SMI", Imm },
+ { "LDX", Imp }, { "OR", Imp }, { "AND", Imp }, { "XOR", Imp },
+ { "ADD", Imp }, { "SD", Imp }, { "SHR", Imp }, { "SM", Imp },
+ { "LDI", Imm }, { "ORI", Imm }, { "ANI", Imm }, { "XRI", Imm },
+ { "ADI", Imm }, { "SDI", Imm }, { "SHL", Imp }, { "SMI", Imm },
};
diff --git a/src/emu/cpu/cosmac/cosmac.c b/src/emu/cpu/cosmac/cosmac.c
index 53b8f8ad19b..e2a1cfa1870 100644
--- a/src/emu/cpu/cosmac/cosmac.c
+++ b/src/emu/cpu/cosmac/cosmac.c
@@ -30,22 +30,22 @@ ALLOW_SAVE_TYPE(cosmac_device::cosmac_state);
// CONSTANTS
//**************************************************************************
-#define CLOCKS_RESET 8
-#define CLOCKS_INIT 8 // really 9, but needs to be 8 to synchronize cdp1861 video timings
-#define CLOCKS_FETCH 8
-#define CLOCKS_EXECUTE 8
-#define CLOCKS_DMA 8
-#define CLOCKS_INTERRUPT 8
+#define CLOCKS_RESET 8
+#define CLOCKS_INIT 8 // really 9, but needs to be 8 to synchronize cdp1861 video timings
+#define CLOCKS_FETCH 8
+#define CLOCKS_EXECUTE 8
+#define CLOCKS_DMA 8
+#define CLOCKS_INTERRUPT 8
const cosmac_state_code COSMAC_STATE_CODE[] =
{
- COSMAC_STATE_CODE_S0_FETCH, // COSMAC_STATE_0_FETCH
- COSMAC_STATE_CODE_S1_EXECUTE, // COSMAC_STATE_1_RESET
- COSMAC_STATE_CODE_S1_EXECUTE, // COSMAC_STATE_1_INIT
- COSMAC_STATE_CODE_S1_EXECUTE, // COSMAC_STATE_1_EXECUTE
- COSMAC_STATE_CODE_S2_DMA, // COSMAC_STATE_2_DMA_IN
- COSMAC_STATE_CODE_S2_DMA, // COSMAC_STATE_2_DMA_OUT
- COSMAC_STATE_CODE_S3_INTERRUPT // COSMAC_STATE_3_INT
+ COSMAC_STATE_CODE_S0_FETCH, // COSMAC_STATE_0_FETCH
+ COSMAC_STATE_CODE_S1_EXECUTE, // COSMAC_STATE_1_RESET
+ COSMAC_STATE_CODE_S1_EXECUTE, // COSMAC_STATE_1_INIT
+ COSMAC_STATE_CODE_S1_EXECUTE, // COSMAC_STATE_1_EXECUTE
+ COSMAC_STATE_CODE_S2_DMA, // COSMAC_STATE_2_DMA_IN
+ COSMAC_STATE_CODE_S2_DMA, // COSMAC_STATE_2_DMA_OUT
+ COSMAC_STATE_CODE_S3_INTERRUPT // COSMAC_STATE_3_INT
};
@@ -54,28 +54,28 @@ const cosmac_state_code COSMAC_STATE_CODE[] =
// MACROS
//**************************************************************************
-#define OPCODE_R(addr) read_opcode(addr)
-#define RAM_R(addr) read_byte(addr)
-#define RAM_W(addr, data) write_byte(addr, data)
-#define IO_R(addr) read_io_byte(addr)
-#define IO_W(addr, data) write_io_byte(addr, data)
+#define OPCODE_R(addr) read_opcode(addr)
+#define RAM_R(addr) read_byte(addr)
+#define RAM_W(addr, data) write_byte(addr, data)
+#define IO_R(addr) read_io_byte(addr)
+#define IO_W(addr, data) write_io_byte(addr, data)
-#define P m_p
-#define X m_x
-#define D m_d
+#define P m_p
+#define X m_x
+#define D m_d
#define B m_b
-#define T m_t
+#define T m_t
#define R m_r
-#define DF m_df
-#define IE m_ie
-#define Q m_q
-#define N m_n
-#define I m_i
-#define EF m_ef
+#define DF m_df
+#define IE m_ie
+#define Q m_q
+#define N m_n
+#define I m_i
+#define EF m_ef
-#define GET_FLAGS() ((m_df << 2) | (m_ie << 1) | m_q)
+#define GET_FLAGS() ((m_df << 2) | (m_ie << 1) | m_q)
-#define SET_FLAGS(v) do { \
+#define SET_FLAGS(v) do { \
m_df = BIT(v, 2); \
m_ie = BIT(v, 1); \
m_q = BIT(v, 0); \
@@ -89,85 +89,85 @@ const cosmac_state_code COSMAC_STATE_CODE[] =
const cosmac_device::ophandler cosmac_device::s_opcodetable[256] =
{
- &cosmac_device::idl, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
- &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
- &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
- &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
-
- &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
- &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
- &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
- &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
-
- &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
- &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
- &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
- &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
-
- &cosmac_device::br, &cosmac_device::bq, &cosmac_device::bz, &cosmac_device::bdf,
- &cosmac_device::b, &cosmac_device::b, &cosmac_device::b, &cosmac_device::b,
- &cosmac_device::nbr, &cosmac_device::bnq, &cosmac_device::bnz, &cosmac_device::bnf,
- &cosmac_device::bn, &cosmac_device::bn, &cosmac_device::bn, &cosmac_device::bn,
-
- &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
- &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
- &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
- &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
-
- &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
- &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
- &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
- &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
-
- &cosmac_device::irx, &cosmac_device::out, &cosmac_device::out, &cosmac_device::out,
- &cosmac_device::out, &cosmac_device::out, &cosmac_device::out, &cosmac_device::out,
- &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp,
- &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp,
-
- &cosmac_device::ret, &cosmac_device::dis, &cosmac_device::ldxa, &cosmac_device::stxd,
- &cosmac_device::adc, &cosmac_device::sdb, &cosmac_device::shrc, &cosmac_device::smb,
- &cosmac_device::sav, &cosmac_device::mark, &cosmac_device::req, &cosmac_device::seq,
- &cosmac_device::adci, &cosmac_device::sdbi, &cosmac_device::shlc, &cosmac_device::smbi,
-
- &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
- &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
- &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
- &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
-
- &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
- &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
- &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
- &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
-
- &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
- &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
- &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
- &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
-
- &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
- &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
- &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
- &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
-
- &cosmac_device::lbr, &cosmac_device::lbq, &cosmac_device::lbz, &cosmac_device::lbdf,
- &cosmac_device::nop, &cosmac_device::lsnq, &cosmac_device::lsnz, &cosmac_device::lsnf,
- &cosmac_device::nlbr, &cosmac_device::lbnq, &cosmac_device::lbnz, &cosmac_device::lbnf,
- &cosmac_device::lsie, &cosmac_device::lsq, &cosmac_device::lsz, &cosmac_device::lsdf,
-
- &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
- &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
- &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
- &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
-
- &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
- &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
- &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
- &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
-
- &cosmac_device::ldx, &cosmac_device::_or, &cosmac_device::_and, &cosmac_device::_xor,
- &cosmac_device::add, &cosmac_device::sd, &cosmac_device::shr, &cosmac_device::sm,
- &cosmac_device::ldi, &cosmac_device::ori, &cosmac_device::ani, &cosmac_device::xri,
- &cosmac_device::adi, &cosmac_device::sdi, &cosmac_device::shl, &cosmac_device::smi
+ &cosmac_device::idl, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
+ &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
+ &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
+ &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn, &cosmac_device::ldn,
+
+ &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
+ &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
+ &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
+ &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc, &cosmac_device::inc,
+
+ &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
+ &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
+ &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
+ &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec, &cosmac_device::dec,
+
+ &cosmac_device::br, &cosmac_device::bq, &cosmac_device::bz, &cosmac_device::bdf,
+ &cosmac_device::b, &cosmac_device::b, &cosmac_device::b, &cosmac_device::b,
+ &cosmac_device::nbr, &cosmac_device::bnq, &cosmac_device::bnz, &cosmac_device::bnf,
+ &cosmac_device::bn, &cosmac_device::bn, &cosmac_device::bn, &cosmac_device::bn,
+
+ &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
+ &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
+ &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
+ &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda, &cosmac_device::lda,
+
+ &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
+ &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
+ &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
+ &cosmac_device::str, &cosmac_device::str, &cosmac_device::str, &cosmac_device::str,
+
+ &cosmac_device::irx, &cosmac_device::out, &cosmac_device::out, &cosmac_device::out,
+ &cosmac_device::out, &cosmac_device::out, &cosmac_device::out, &cosmac_device::out,
+ &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp,
+ &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp, &cosmac_device::inp,
+
+ &cosmac_device::ret, &cosmac_device::dis, &cosmac_device::ldxa, &cosmac_device::stxd,
+ &cosmac_device::adc, &cosmac_device::sdb, &cosmac_device::shrc, &cosmac_device::smb,
+ &cosmac_device::sav, &cosmac_device::mark, &cosmac_device::req, &cosmac_device::seq,
+ &cosmac_device::adci, &cosmac_device::sdbi, &cosmac_device::shlc, &cosmac_device::smbi,
+
+ &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
+ &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
+ &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
+ &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo, &cosmac_device::glo,
+
+ &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
+ &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
+ &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
+ &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi, &cosmac_device::ghi,
+
+ &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
+ &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
+ &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
+ &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo, &cosmac_device::plo,
+
+ &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
+ &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
+ &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
+ &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi, &cosmac_device::phi,
+
+ &cosmac_device::lbr, &cosmac_device::lbq, &cosmac_device::lbz, &cosmac_device::lbdf,
+ &cosmac_device::nop, &cosmac_device::lsnq, &cosmac_device::lsnz, &cosmac_device::lsnf,
+ &cosmac_device::nlbr, &cosmac_device::lbnq, &cosmac_device::lbnz, &cosmac_device::lbnf,
+ &cosmac_device::lsie, &cosmac_device::lsq, &cosmac_device::lsz, &cosmac_device::lsdf,
+
+ &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
+ &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
+ &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
+ &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep, &cosmac_device::sep,
+
+ &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
+ &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
+ &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
+ &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex, &cosmac_device::sex,
+
+ &cosmac_device::ldx, &cosmac_device::_or, &cosmac_device::_and, &cosmac_device::_xor,
+ &cosmac_device::add, &cosmac_device::sd, &cosmac_device::shr, &cosmac_device::sm,
+ &cosmac_device::ldi, &cosmac_device::ori, &cosmac_device::ani, &cosmac_device::xri,
+ &cosmac_device::adi, &cosmac_device::sdi, &cosmac_device::shl, &cosmac_device::smi
};
@@ -186,17 +186,17 @@ const device_type COSMAC = &device_creator<cosmac_device>;
cosmac_device::cosmac_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, COSMAC, "COSMAC", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 8, 16),
- m_io_config("io", ENDIANNESS_LITTLE, 8, 3),
- m_op(0),
- m_state(COSMAC_STATE_1_RESET),
- m_mode(COSMAC_MODE_RESET),
- m_irq(0),
- m_dmain(0),
- m_dmaout(0),
- m_program(NULL),
- m_io(NULL),
- m_direct(NULL)
+ m_program_config("program", ENDIANNESS_LITTLE, 8, 16),
+ m_io_config("io", ENDIANNESS_LITTLE, 8, 3),
+ m_op(0),
+ m_state(COSMAC_STATE_1_RESET),
+ m_mode(COSMAC_MODE_RESET),
+ m_irq(0),
+ m_dmain(0),
+ m_dmaout(0),
+ m_program(NULL),
+ m_io(NULL),
+ m_direct(NULL)
{
for (int i = 0; i < 4; i++)
EF[i] = CLEAR_LINE;
@@ -236,25 +236,25 @@ void cosmac_device::device_start()
m_io = &space(AS_IO);
// register our state for the debugger
- state_add(STATE_GENPC, "GENPC", m_pc).callimport().callexport().noshow();
- state_add(STATE_GENFLAGS, "GENFLAGS", m_flagsio).mask(0x7).callimport().callexport().noshow().formatstr("%3s");
+ state_add(STATE_GENPC, "GENPC", m_pc).callimport().callexport().noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_flagsio).mask(0x7).callimport().callexport().noshow().formatstr("%3s");
- state_add(COSMAC_P, "P", m_p).mask(0xf);
- state_add(COSMAC_X, "X", m_x).mask(0xf);
- state_add(COSMAC_D, "D", m_d);
- state_add(COSMAC_B, "B", m_b);
- state_add(COSMAC_T, "T", m_t);
+ state_add(COSMAC_P, "P", m_p).mask(0xf);
+ state_add(COSMAC_X, "X", m_x).mask(0xf);
+ state_add(COSMAC_D, "D", m_d);
+ state_add(COSMAC_B, "B", m_b);
+ state_add(COSMAC_T, "T", m_t);
- state_add(COSMAC_I, "I", m_i).mask(0xf);
- state_add(COSMAC_N, "N", m_n).mask(0xf);
+ state_add(COSMAC_I, "I", m_i).mask(0xf);
+ state_add(COSMAC_N, "N", m_n).mask(0xf);
astring tempstr;
for (int regnum = 0; regnum < 16; regnum++)
state_add(COSMAC_R0 + regnum, tempstr.format("R%x", regnum), m_r[regnum]);
- state_add(COSMAC_DF, "DF", m_df).mask(0x1).noshow();
- state_add(COSMAC_IE, "IE", m_ie).mask(0x1).noshow();
- state_add(COSMAC_Q, "Q", m_q).mask(0x1).noshow();
+ state_add(COSMAC_DF, "DF", m_df).mask(0x1).noshow();
+ state_add(COSMAC_IE, "IE", m_ie).mask(0x1).noshow();
+ state_add(COSMAC_Q, "Q", m_q).mask(0x1).noshow();
// resolve callbacks
m_in_wait_func.resolve(m_in_wait_cb, *this);
@@ -264,8 +264,8 @@ void cosmac_device::device_start()
m_in_ef_func[2].resolve(m_in_ef3_cb, *this);
m_in_ef_func[3].resolve(m_in_ef4_cb, *this);
m_out_q_func.resolve(m_out_q_cb, *this);
- m_in_dma_func.resolve(m_in_dma_cb, *this);
- m_out_dma_func.resolve(m_out_dma_cb, *this);
+ m_in_dma_func.resolve(m_in_dma_cb, *this);
+ m_out_dma_func.resolve(m_out_dma_cb, *this);
m_out_sc_func = m_out_sc_cb;
m_out_tpa_func.resolve(m_out_tpa_cb, *this);
m_out_tpb_func.resolve(m_out_tpb_cb, *this);
@@ -849,28 +849,28 @@ inline void cosmac_device::dma_input()
R[0]++;
- m_icount -= CLOCKS_DMA;
-
- if (m_dmain)
- {
- m_state = COSMAC_STATE_2_DMA_IN;
- }
- else if (m_dmaout)
- {
- m_state = COSMAC_STATE_2_DMA_OUT;
- }
- else if (IE && m_irq)
- {
- m_state = COSMAC_STATE_3_INT;
- }
- else if (m_mode == COSMAC_MODE_LOAD)
- {
- m_state = COSMAC_STATE_1_EXECUTE;
- }
- else
- {
- m_state = COSMAC_STATE_0_FETCH;
- }
+ m_icount -= CLOCKS_DMA;
+
+ if (m_dmain)
+ {
+ m_state = COSMAC_STATE_2_DMA_IN;
+ }
+ else if (m_dmaout)
+ {
+ m_state = COSMAC_STATE_2_DMA_OUT;
+ }
+ else if (IE && m_irq)
+ {
+ m_state = COSMAC_STATE_3_INT;
+ }
+ else if (m_mode == COSMAC_MODE_LOAD)
+ {
+ m_state = COSMAC_STATE_1_EXECUTE;
+ }
+ else
+ {
+ m_state = COSMAC_STATE_0_FETCH;
+ }
standard_irq_callback(COSMAC_INPUT_LINE_DMAIN);
}
@@ -886,24 +886,24 @@ inline void cosmac_device::dma_output()
R[0]++;
- m_icount -= CLOCKS_DMA;
-
- if (m_dmain)
- {
- m_state = COSMAC_STATE_2_DMA_IN;
- }
- else if (m_dmaout)
- {
- m_state = COSMAC_STATE_2_DMA_OUT;
- }
- else if (IE && m_irq)
- {
- m_state = COSMAC_STATE_3_INT;
- }
- else
- {
- m_state = COSMAC_STATE_0_FETCH;
- }
+ m_icount -= CLOCKS_DMA;
+
+ if (m_dmain)
+ {
+ m_state = COSMAC_STATE_2_DMA_IN;
+ }
+ else if (m_dmaout)
+ {
+ m_state = COSMAC_STATE_2_DMA_OUT;
+ }
+ else if (IE && m_irq)
+ {
+ m_state = COSMAC_STATE_3_INT;
+ }
+ else
+ {
+ m_state = COSMAC_STATE_0_FETCH;
+ }
standard_irq_callback(COSMAC_INPUT_LINE_DMAOUT);
}
@@ -945,34 +945,34 @@ inline void cosmac_device::interrupt()
//**************************************************************************
// memory reference opcode handlers
-void cosmac_device::ldn() { D = RAM_R(R[N]); }
-void cosmac_device::lda() { D = RAM_R(R[N]); R[N]++; }
-void cosmac_device::ldx() { D = RAM_R(R[X]); }
-void cosmac_device::ldxa() { D = RAM_R(R[X]); R[X]++; }
-void cosmac_device::ldi() { D = RAM_R(R[P]); R[P]++; }
-void cosmac_device::str() { RAM_W(R[N], D); }
-void cosmac_device::stxd() { RAM_W(R[X], D); R[X]--; }
+void cosmac_device::ldn() { D = RAM_R(R[N]); }
+void cosmac_device::lda() { D = RAM_R(R[N]); R[N]++; }
+void cosmac_device::ldx() { D = RAM_R(R[X]); }
+void cosmac_device::ldxa() { D = RAM_R(R[X]); R[X]++; }
+void cosmac_device::ldi() { D = RAM_R(R[P]); R[P]++; }
+void cosmac_device::str() { RAM_W(R[N], D); }
+void cosmac_device::stxd() { RAM_W(R[X], D); R[X]--; }
// register operations opcode handlers
-void cosmac_device::inc() { R[N]++; }
-void cosmac_device::dec() { R[N]--; }
-void cosmac_device::irx() { R[X]++; }
-void cosmac_device::glo() { D = R[N] & 0xff; }
-void cosmac_device::plo() { R[N] = (R[N] & 0xff00) | D; }
-void cosmac_device::ghi() { D = R[N] >> 8; }
-void cosmac_device::phi() { R[N] = (D << 8) | (R[N] & 0xff); }
+void cosmac_device::inc() { R[N]++; }
+void cosmac_device::dec() { R[N]--; }
+void cosmac_device::irx() { R[X]++; }
+void cosmac_device::glo() { D = R[N] & 0xff; }
+void cosmac_device::plo() { R[N] = (R[N] & 0xff00) | D; }
+void cosmac_device::ghi() { D = R[N] >> 8; }
+void cosmac_device::phi() { R[N] = (D << 8) | (R[N] & 0xff); }
// logic operations opcode handlers
-void cosmac_device::_or() { D = RAM_R(R[X]) | D; }
-void cosmac_device::ori() { D = RAM_R(R[P]) | D; R[P]++; }
-void cosmac_device::_xor() { D = RAM_R(R[X]) ^ D; }
-void cosmac_device::xri() { D = RAM_R(R[P]) ^ D; R[P]++; }
-void cosmac_device::_and() { D = RAM_R(R[X]) & D; }
-void cosmac_device::ani() { D = RAM_R(R[P]) & D; R[P]++; }
-void cosmac_device::shr() { DF = BIT(D, 0); D >>= 1; }
-void cosmac_device::shrc() { int b = DF; DF = BIT(D, 0); D >>= 1; D |= b << 7; }
-void cosmac_device::shl() { DF = BIT(D, 7); D <<= 1; }
-void cosmac_device::shlc() { int b = DF; DF = BIT(D, 7); D <<= 1; D |= b; }
+void cosmac_device::_or() { D = RAM_R(R[X]) | D; }
+void cosmac_device::ori() { D = RAM_R(R[P]) | D; R[P]++; }
+void cosmac_device::_xor() { D = RAM_R(R[X]) ^ D; }
+void cosmac_device::xri() { D = RAM_R(R[P]) ^ D; R[P]++; }
+void cosmac_device::_and() { D = RAM_R(R[X]) & D; }
+void cosmac_device::ani() { D = RAM_R(R[P]) & D; R[P]++; }
+void cosmac_device::shr() { DF = BIT(D, 0); D >>= 1; }
+void cosmac_device::shrc() { int b = DF; DF = BIT(D, 0); D >>= 1; D |= b << 7; }
+void cosmac_device::shl() { DF = BIT(D, 7); D <<= 1; }
+void cosmac_device::shlc() { int b = DF; DF = BIT(D, 7); D <<= 1; D |= b; }
// arithmetic operations opcode handlers
void cosmac_device::add(int left, int right)
@@ -1007,18 +1007,18 @@ void cosmac_device::subtract_with_borrow(int left, int right)
DF = result > 0xff;
}
-void cosmac_device::add() { add(RAM_R(R[X]), D); }
-void cosmac_device::adi() { add(RAM_R(R[P]), D); R[P]++; }
-void cosmac_device::adc() { add_with_carry(RAM_R(R[X]), D); }
-void cosmac_device::adci() { add_with_carry(RAM_R(R[P]), D); R[P]++; }
-void cosmac_device::sd() { subtract(RAM_R(R[X]), D); }
-void cosmac_device::sdi() { subtract(RAM_R(R[P]), D); R[P]++; }
-void cosmac_device::sdb() { subtract_with_borrow(RAM_R(R[X]), D); }
-void cosmac_device::sdbi() { subtract_with_borrow(RAM_R(R[P]), D); R[P]++; }
-void cosmac_device::sm() { subtract(D, RAM_R(R[X])); }
-void cosmac_device::smi() { subtract(D, RAM_R(R[P])); R[P]++; }
-void cosmac_device::smb() { subtract_with_borrow(D, RAM_R(R[X])); }
-void cosmac_device::smbi() { subtract_with_borrow(D, RAM_R(R[P])); R[P]++; }
+void cosmac_device::add() { add(RAM_R(R[X]), D); }
+void cosmac_device::adi() { add(RAM_R(R[P]), D); R[P]++; }
+void cosmac_device::adc() { add_with_carry(RAM_R(R[X]), D); }
+void cosmac_device::adci() { add_with_carry(RAM_R(R[P]), D); R[P]++; }
+void cosmac_device::sd() { subtract(RAM_R(R[X]), D); }
+void cosmac_device::sdi() { subtract(RAM_R(R[P]), D); R[P]++; }
+void cosmac_device::sdb() { subtract_with_borrow(RAM_R(R[X]), D); }
+void cosmac_device::sdbi() { subtract_with_borrow(RAM_R(R[P]), D); R[P]++; }
+void cosmac_device::sm() { subtract(D, RAM_R(R[X])); }
+void cosmac_device::smi() { subtract(D, RAM_R(R[P])); R[P]++; }
+void cosmac_device::smb() { subtract_with_borrow(D, RAM_R(R[X])); }
+void cosmac_device::smbi() { subtract_with_borrow(D, RAM_R(R[P])); R[P]++; }
// short branch instructions opcode handlers
void cosmac_device::short_branch(int taken)
@@ -1033,16 +1033,16 @@ void cosmac_device::short_branch(int taken)
}
}
-void cosmac_device::br() { short_branch(1); }
-void cosmac_device::nbr() { short_branch(0); }
-void cosmac_device::bz() { short_branch(D == 0); }
-void cosmac_device::bnz() { short_branch(D != 0); }
-void cosmac_device::bdf() { short_branch(DF); }
-void cosmac_device::bnf() { short_branch(!DF); }
-void cosmac_device::bq() { short_branch(Q); }
-void cosmac_device::bnq() { short_branch(!Q); }
-void cosmac_device::b() { short_branch(EF[N & 0x03]); }
-void cosmac_device::bn() { short_branch(!EF[N & 0x03]); }
+void cosmac_device::br() { short_branch(1); }
+void cosmac_device::nbr() { short_branch(0); }
+void cosmac_device::bz() { short_branch(D == 0); }
+void cosmac_device::bnz() { short_branch(D != 0); }
+void cosmac_device::bdf() { short_branch(DF); }
+void cosmac_device::bnf() { short_branch(!DF); }
+void cosmac_device::bq() { short_branch(Q); }
+void cosmac_device::bnq() { short_branch(!Q); }
+void cosmac_device::b() { short_branch(EF[N & 0x03]); }
+void cosmac_device::bn() { short_branch(!EF[N & 0x03]); }
// long branch instructions opcode handlers
void cosmac_device::long_branch(int taken)
@@ -1067,14 +1067,14 @@ void cosmac_device::long_branch(int taken)
m_icount -= CLOCKS_EXECUTE;
}
-void cosmac_device::lbr() { long_branch(1); }
-void cosmac_device::nlbr() { long_skip(1); }
-void cosmac_device::lbz() { long_branch(D == 0); }
-void cosmac_device::lbnz() { long_branch(D != 0); }
-void cosmac_device::lbdf() { long_branch(DF); }
-void cosmac_device::lbnf() { long_branch(!DF); }
-void cosmac_device::lbq() { long_branch(Q); }
-void cosmac_device::lbnq() { long_branch(!Q); }
+void cosmac_device::lbr() { long_branch(1); }
+void cosmac_device::nlbr() { long_skip(1); }
+void cosmac_device::lbz() { long_branch(D == 0); }
+void cosmac_device::lbnz() { long_branch(D != 0); }
+void cosmac_device::lbdf() { long_branch(DF); }
+void cosmac_device::lbnf() { long_branch(!DF); }
+void cosmac_device::lbq() { long_branch(Q); }
+void cosmac_device::lbnq() { long_branch(!Q); }
// skip instructions opcode handlers
void cosmac_device::long_skip(int taken)
@@ -1091,22 +1091,22 @@ void cosmac_device::long_skip(int taken)
m_icount -= CLOCKS_EXECUTE;
}
-void cosmac_device::lsz() { long_skip(D == 0); }
-void cosmac_device::lsnz() { long_skip(D != 0); }
-void cosmac_device::lsdf() { long_skip(DF); }
-void cosmac_device::lsnf() { long_skip(!DF); }
-void cosmac_device::lsq() { long_skip(Q); }
-void cosmac_device::lsnq() { long_skip(!Q); }
-void cosmac_device::lsie() { long_skip(IE); }
+void cosmac_device::lsz() { long_skip(D == 0); }
+void cosmac_device::lsnz() { long_skip(D != 0); }
+void cosmac_device::lsdf() { long_skip(DF); }
+void cosmac_device::lsnf() { long_skip(!DF); }
+void cosmac_device::lsq() { long_skip(Q); }
+void cosmac_device::lsnq() { long_skip(!Q); }
+void cosmac_device::lsie() { long_skip(IE); }
// control instructions opcode handlers
-void cosmac_device::idl() { /* idle */ }
-void cosmac_device::nop() { m_icount -= CLOCKS_EXECUTE; }
-void cosmac_device::sep() { P = N; }
-void cosmac_device::sex() { X = N; }
-void cosmac_device::seq() { set_q_flag(1); }
-void cosmac_device::req() { set_q_flag(0); }
-void cosmac_device::sav() { RAM_W(R[X], T); }
+void cosmac_device::idl() { /* idle */ }
+void cosmac_device::nop() { m_icount -= CLOCKS_EXECUTE; }
+void cosmac_device::sep() { P = N; }
+void cosmac_device::sex() { X = N; }
+void cosmac_device::seq() { set_q_flag(1); }
+void cosmac_device::req() { set_q_flag(0); }
+void cosmac_device::sav() { RAM_W(R[X], T); }
void cosmac_device::mark()
{
@@ -1125,11 +1125,11 @@ void cosmac_device::return_from_interrupt(int ie)
IE = ie;
}
-void cosmac_device::ret() { return_from_interrupt(1); }
-void cosmac_device::dis() { return_from_interrupt(0); }
+void cosmac_device::ret() { return_from_interrupt(1); }
+void cosmac_device::dis() { return_from_interrupt(0); }
// input/output byte transfer opcode handlers
-void cosmac_device::out() { IO_W(N, RAM_R(R[X])); R[X]++; }
+void cosmac_device::out() { IO_W(N, RAM_R(R[X])); R[X]++; }
/*
@@ -1149,4 +1149,4 @@ void cosmac_device::out() { IO_W(N, RAM_R(R[X])); R[X]++; }
http://www.ittybittycomputers.com/IttyBitty/ShortCor.htm
*/
-void cosmac_device::inp() { D = IO_R(N & 0x07); RAM_W(R[X], D); }
+void cosmac_device::inp() { D = IO_R(N & 0x07); RAM_W(R[X], D); }
diff --git a/src/emu/cpu/cosmac/cosmac.h b/src/emu/cpu/cosmac/cosmac.h
index 16e9201a041..f0a1665a752 100644
--- a/src/emu/cpu/cosmac/cosmac.h
+++ b/src/emu/cpu/cosmac/cosmac.h
@@ -119,18 +119,18 @@ typedef void (*cosmac_out_sc_func)(device_t *device, cosmac_state_code sc);
struct cosmac_interface
{
- devcb_read_line m_in_wait_cb;
- devcb_read_line m_in_clear_cb;
- devcb_read_line m_in_ef1_cb;
- devcb_read_line m_in_ef2_cb;
- devcb_read_line m_in_ef3_cb;
- devcb_read_line m_in_ef4_cb;
- devcb_write_line m_out_q_cb;
- devcb_read8 m_in_dma_cb;
- devcb_write8 m_out_dma_cb;
- cosmac_out_sc_func m_out_sc_cb;
- devcb_write_line m_out_tpa_cb;
- devcb_write_line m_out_tpb_cb;
+ devcb_read_line m_in_wait_cb;
+ devcb_read_line m_in_clear_cb;
+ devcb_read_line m_in_ef1_cb;
+ devcb_read_line m_in_ef2_cb;
+ devcb_read_line m_in_ef3_cb;
+ devcb_read_line m_in_ef4_cb;
+ devcb_write_line m_out_q_cb;
+ devcb_read8 m_in_dma_cb;
+ devcb_write8 m_out_dma_cb;
+ cosmac_out_sc_func m_out_sc_cb;
+ devcb_write_line m_out_tpa_cb;
+ devcb_write_line m_out_tpb_cb;
};
#define COSMAC_INTERFACE(name) \
@@ -140,7 +140,7 @@ struct cosmac_interface
// ======================> cosmac_device
class cosmac_device : public cpu_device,
- public cosmac_interface
+ public cosmac_interface
{
public:
// construction/destruction
@@ -303,19 +303,19 @@ protected:
void out();
void inp();
- const address_space_config m_program_config;
- const address_space_config m_io_config;
+ const address_space_config m_program_config;
+ const address_space_config m_io_config;
// device callbacks
- devcb_resolved_read_line m_in_wait_func;
- devcb_resolved_read_line m_in_clear_func;
- devcb_resolved_read_line m_in_ef_func[4];
- devcb_resolved_write_line m_out_q_func;
- devcb_resolved_read8 m_in_dma_func;
- devcb_resolved_write8 m_out_dma_func;
- cosmac_out_sc_func m_out_sc_func;
- devcb_resolved_write_line m_out_tpa_func;
- devcb_resolved_write_line m_out_tpb_func;
+ devcb_resolved_read_line m_in_wait_func;
+ devcb_resolved_read_line m_in_clear_func;
+ devcb_resolved_read_line m_in_ef_func[4];
+ devcb_resolved_write_line m_out_q_func;
+ devcb_resolved_read8 m_in_dma_func;
+ devcb_resolved_write8 m_out_dma_func;
+ cosmac_out_sc_func m_out_sc_func;
+ devcb_resolved_write_line m_out_tpa_func;
+ devcb_resolved_write_line m_out_tpb_func;
// control modes
enum cosmac_mode
@@ -339,37 +339,37 @@ protected:
};
// internal state
- UINT16 m_pc; // fake program counter
- UINT8 m_op; // current opcode
- UINT8 m_flagsio; // flags storage for state saving
- cosmac_state m_state; // state
- cosmac_mode m_mode; // control mode
- cosmac_mode m_pmode; // previous control mode
- int m_irq; // interrupt request
- int m_dmain; // DMA input request
- int m_dmaout; // DMA output request
- int m_ef[4]; // external flags
+ UINT16 m_pc; // fake program counter
+ UINT8 m_op; // current opcode
+ UINT8 m_flagsio; // flags storage for state saving
+ cosmac_state m_state; // state
+ cosmac_mode m_mode; // control mode
+ cosmac_mode m_pmode; // previous control mode
+ int m_irq; // interrupt request
+ int m_dmain; // DMA input request
+ int m_dmaout; // DMA output request
+ int m_ef[4]; // external flags
// registers
- UINT8 m_d; // data register (accumulator)
- UINT8 m_b; // auxiliary holding register
- UINT16 m_r[16]; // scratchpad registers
- UINT8 m_p; // designates which register is Program Counter
- UINT8 m_x; // designates which register is Data Pointer
- UINT8 m_n; // low-order instruction digit
- UINT8 m_i; // high-order instruction digit
- UINT8 m_t; // temporary register
+ UINT8 m_d; // data register (accumulator)
+ UINT8 m_b; // auxiliary holding register
+ UINT16 m_r[16]; // scratchpad registers
+ UINT8 m_p; // designates which register is Program Counter
+ UINT8 m_x; // designates which register is Data Pointer
+ UINT8 m_n; // low-order instruction digit
+ UINT8 m_i; // high-order instruction digit
+ UINT8 m_t; // temporary register
// flags
- int m_df; // data flag (ALU carry)
- int m_ie; // interrupt enable
- int m_q; // output flip-flop
+ int m_df; // data flag (ALU carry)
+ int m_ie; // interrupt enable
+ int m_q; // output flip-flop
// internal stuff
- int m_icount;
- address_space * m_program;
- address_space * m_io;
- direct_read_data * m_direct;
+ int m_icount;
+ address_space * m_program;
+ address_space * m_io;
+ direct_read_data * m_direct;
// opcode/condition tables
typedef void (cosmac_device::*ophandler)();
diff --git a/src/emu/cpu/cp1610/1610dasm.c b/src/emu/cpu/cp1610/1610dasm.c
index 573c63f4dba..e5585130fe2 100644
--- a/src/emu/cpu/cp1610/1610dasm.c
+++ b/src/emu/cpu/cp1610/1610dasm.c
@@ -5,17 +5,17 @@
CPU_DISASSEMBLE( cp1610 )
{
UINT16 oprom16[4]={ (oprom[0] << 8) | oprom[1], (oprom[2] << 8) | oprom[3], (oprom[4] << 8) | oprom[5], (oprom[6] << 8) | oprom[7] };
- UINT16 op = oprom16[0]; UINT16 subop;
+ UINT16 op = oprom16[0]; UINT16 subop;
UINT16 ea, ea1, ea2;
unsigned size = 1;
// const char *sym, *sym2;
- switch( op )
+ switch( op )
{
/* opcode bitmask */
case 0x00: /* 0 000 000 000 */
// sym = set_ea_info( 0, 12, EA_UINT8, EA_ZPG_RD );
- sprintf(buffer, "HLT");
+ sprintf(buffer, "HLT");
break;
case 0x001: /* 0 000 000 001 */
subop = oprom16[1];
@@ -125,14 +125,14 @@ CPU_DISASSEMBLE( cp1610 )
break;
default:
size += 1;
- sprintf(buffer, "SDBD ????");
+ sprintf(buffer, "SDBD ????");
}
break;
case 0x002: /* 0 000 000 010 */
- sprintf(buffer, "EIS");
+ sprintf(buffer, "EIS");
break;
case 0x003: /* 0 000 000 011 */
- sprintf(buffer, "DIS");
+ sprintf(buffer, "DIS");
break;
case 0x004: /* 0 000 000 100 */
size += 2;
@@ -145,17 +145,17 @@ CPU_DISASSEMBLE( cp1610 )
switch(ea1 & 0x03)
{
case 0:
- sprintf(buffer, "J %04X",ea);
+ sprintf(buffer, "J %04X",ea);
break;
case 1:
- sprintf(buffer, "JE %04X",ea);
+ sprintf(buffer, "JE %04X",ea);
break;
case 2:
- sprintf(buffer, "JD %04X",ea);
+ sprintf(buffer, "JD %04X",ea);
break;
case 3:
- sprintf(buffer, "????");
- break;
+ sprintf(buffer, "????");
+ break;
}
}
else
@@ -164,28 +164,28 @@ CPU_DISASSEMBLE( cp1610 )
switch(ea1 & 0x03)
{
case 0:
- sprintf(buffer, "JSR R%01d,%04X",((ea1&0x300)>>8)+4,ea);
+ sprintf(buffer, "JSR R%01d,%04X",((ea1&0x300)>>8)+4,ea);
break;
case 1:
- sprintf(buffer, "JSRE R%01d,%04X",((ea1&0x300)>>8)+4,ea);
+ sprintf(buffer, "JSRE R%01d,%04X",((ea1&0x300)>>8)+4,ea);
break;
case 2:
- sprintf(buffer, "JSRD R%01d,%04X",((ea1&0x300)>>8)+4,ea);
+ sprintf(buffer, "JSRD R%01d,%04X",((ea1&0x300)>>8)+4,ea);
break;
case 3:
- sprintf(buffer, "????");
- break;
+ sprintf(buffer, "????");
+ break;
}
}
break;
case 0x005: /* 0 000 000 101 */
- sprintf(buffer, "TCI");
+ sprintf(buffer, "TCI");
break;
case 0x006: /* 0 000 000 110 */
- sprintf(buffer, "CLRC");
+ sprintf(buffer, "CLRC");
break;
case 0x007: /* 0 000 000 111 */
- sprintf(buffer, "SETC");
+ sprintf(buffer, "SETC");
break;
case 0x008: /* 0 000 001 000 */
case 0x009: /* 0 000 001 001 */
@@ -195,7 +195,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x00d: /* 0 000 001 101 */
case 0x00e: /* 0 000 001 110 */
case 0x00f: /* 0 000 001 111 */
- sprintf(buffer, "INCR R%01d",op&0x7);
+ sprintf(buffer, "INCR R%01d",op&0x7);
break;
case 0x010: /* 0 000 010 000 */
case 0x011: /* 0 000 010 001 */
@@ -205,7 +205,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x015: /* 0 000 010 101 */
case 0x016: /* 0 000 010 110 */
case 0x017: /* 0 000 010 111 */
- sprintf(buffer, "DECR R%01d",op&0x7);
+ sprintf(buffer, "DECR R%01d",op&0x7);
break;
case 0x018: /* 0 000 011 000 */
case 0x019: /* 0 000 011 001 */
@@ -215,7 +215,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x01d: /* 0 000 011 101 */
case 0x01e: /* 0 000 011 110 */
case 0x01f: /* 0 000 011 111 */
- sprintf(buffer, "COMR R%01d",op&0x7);
+ sprintf(buffer, "COMR R%01d",op&0x7);
break;
case 0x020: /* 0 000 100 000 */
case 0x021: /* 0 000 100 001 */
@@ -225,7 +225,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x025: /* 0 000 100 101 */
case 0x026: /* 0 000 100 110 */
case 0x027: /* 0 000 100 111 */
- sprintf(buffer, "NEGR R%01d",op&0x7);
+ sprintf(buffer, "NEGR R%01d",op&0x7);
break;
case 0x028: /* 0 000 101 000 */
case 0x029: /* 0 000 101 001 */
@@ -235,21 +235,21 @@ CPU_DISASSEMBLE( cp1610 )
case 0x02d: /* 0 000 101 101 */
case 0x02e: /* 0 000 101 110 */
case 0x02f: /* 0 000 101 111 */
- sprintf(buffer, "ADCR R%01d",op&0x7);
+ sprintf(buffer, "ADCR R%01d",op&0x7);
break;
case 0x030: /* 0 000 110 000 */
case 0x031: /* 0 000 110 001 */
case 0x032: /* 0 000 110 010 */
case 0x033: /* 0 000 110 011 */
- sprintf(buffer, "GSWD R%01d",op&0x3);
+ sprintf(buffer, "GSWD R%01d",op&0x3);
break;
case 0x034: /* 0 000 110 100 */
case 0x035: /* 0 000 110 101 */
- sprintf(buffer, "NOP (%01d)",op&0x1); //???
- break;
+ sprintf(buffer, "NOP (%01d)",op&0x1); //???
+ break;
case 0x036: /* 0 000 110 110 */
case 0x037: /* 0 000 110 111 */
- sprintf(buffer, "SIN");
+ sprintf(buffer, "SIN");
break;
case 0x038: /* 0 000 111 000 */
case 0x039: /* 0 000 111 001 */
@@ -259,103 +259,103 @@ CPU_DISASSEMBLE( cp1610 )
case 0x03d: /* 0 000 111 101 */
case 0x03e: /* 0 000 111 110 */
case 0x03f: /* 0 000 111 111 */
- sprintf(buffer, "RSWD R%01d",op&0x7);
+ sprintf(buffer, "RSWD R%01d",op&0x7);
break;
case 0x040: /* 0 001 000 000 */
case 0x041: /* 0 001 000 001 */
case 0x042: /* 0 001 000 010 */
case 0x043: /* 0 001 000 011 */
- sprintf(buffer, "SWAP R%01d,1",op&0x3);
+ sprintf(buffer, "SWAP R%01d,1",op&0x3);
break;
case 0x044: /* 0 001 000 100 */
case 0x045: /* 0 001 000 101 */
case 0x046: /* 0 001 000 110 */
case 0x047: /* 0 001 000 111 */
- sprintf(buffer, "SWAP R%01d,2",op&0x3);
+ sprintf(buffer, "SWAP R%01d,2",op&0x3);
break;
case 0x048: /* 0 001 001 000 */
case 0x049: /* 0 001 001 001 */
case 0x04a: /* 0 001 001 010 */
case 0x04b: /* 0 001 001 011 */
- sprintf(buffer, "SLL R%01d,1",op&0x3);
+ sprintf(buffer, "SLL R%01d,1",op&0x3);
break;
case 0x04c: /* 0 001 001 100 */
case 0x04d: /* 0 001 001 101 */
case 0x04e: /* 0 001 001 110 */
case 0x04f: /* 0 001 001 111 */
- sprintf(buffer, "SLL R%01d,2",op&0x3);
+ sprintf(buffer, "SLL R%01d,2",op&0x3);
break;
case 0x050: /* 0 001 010 000 */
case 0x051: /* 0 001 010 001 */
case 0x052: /* 0 001 010 010 */
case 0x053: /* 0 001 010 011 */
- sprintf(buffer, "RLC R%01d,1",op&0x3);
+ sprintf(buffer, "RLC R%01d,1",op&0x3);
break;
case 0x054: /* 0 001 010 100 */
case 0x055: /* 0 001 010 101 */
case 0x056: /* 0 001 010 110 */
case 0x057: /* 0 001 010 111 */
- sprintf(buffer, "RLC R%01d,2",op&0x3);
+ sprintf(buffer, "RLC R%01d,2",op&0x3);
break;
case 0x058: /* 0 001 011 000 */
case 0x059: /* 0 001 011 001 */
case 0x05a: /* 0 001 011 010 */
case 0x05b: /* 0 001 011 011 */
- sprintf(buffer, "SLLC R%01d,1",op&0x3);
+ sprintf(buffer, "SLLC R%01d,1",op&0x3);
break;
case 0x05c: /* 0 001 011 100 */
case 0x05d: /* 0 001 011 101 */
case 0x05e: /* 0 001 011 110 */
case 0x05f: /* 0 001 011 111 */
- sprintf(buffer, "SLLC R%01d,2",op&0x3);
+ sprintf(buffer, "SLLC R%01d,2",op&0x3);
break;
case 0x060: /* 0 001 100 000 */
case 0x061: /* 0 001 100 001 */
case 0x062: /* 0 001 100 010 */
case 0x063: /* 0 001 100 011 */
- sprintf(buffer, "SLR R%01d,1",op&0x3);
+ sprintf(buffer, "SLR R%01d,1",op&0x3);
break;
case 0x064: /* 0 001 100 100 */
case 0x065: /* 0 001 100 101 */
case 0x066: /* 0 001 100 110 */
case 0x067: /* 0 001 100 111 */
- sprintf(buffer, "SLR R%01d,2",op&0x3);
+ sprintf(buffer, "SLR R%01d,2",op&0x3);
break;
case 0x068: /* 0 001 101 000 */
case 0x069: /* 0 001 101 001 */
case 0x06a: /* 0 001 101 010 */
case 0x06b: /* 0 001 101 011 */
- sprintf(buffer, "SAR R%01d,1",op&0x3);
+ sprintf(buffer, "SAR R%01d,1",op&0x3);
break;
case 0x06c: /* 0 001 101 100 */
case 0x06d: /* 0 001 101 101 */
case 0x06e: /* 0 001 101 110 */
case 0x06f: /* 0 001 101 111 */
- sprintf(buffer, "SAR R%01d,2",op&0x3);
+ sprintf(buffer, "SAR R%01d,2",op&0x3);
break;
case 0x070: /* 0 001 110 000 */
case 0x071: /* 0 001 110 001 */
case 0x072: /* 0 001 110 010 */
case 0x073: /* 0 001 110 011 */
- sprintf(buffer, "RRC R%01d,1",op&0x3);
+ sprintf(buffer, "RRC R%01d,1",op&0x3);
break;
case 0x074: /* 0 001 110 100 */
case 0x075: /* 0 001 110 101 */
case 0x076: /* 0 001 110 110 */
case 0x077: /* 0 001 110 111 */
- sprintf(buffer, "RRC R%01d,2",op&0x3);
+ sprintf(buffer, "RRC R%01d,2",op&0x3);
break;
case 0x078: /* 0 001 111 000 */
case 0x079: /* 0 001 111 001 */
case 0x07a: /* 0 001 111 010 */
case 0x07b: /* 0 001 111 011 */
- sprintf(buffer, "SARC R%01d,1",op&0x3);
+ sprintf(buffer, "SARC R%01d,1",op&0x3);
break;
case 0x07c: /* 0 001 111 100 */
case 0x07d: /* 0 001 111 101 */
case 0x07e: /* 0 001 111 110 */
case 0x07f: /* 0 001 111 111 */
- sprintf(buffer, "SARC R%01d,2",op&0x3);
+ sprintf(buffer, "SARC R%01d,2",op&0x3);
break;
case 0x080: /* 0 010 000 000 */
case 0x089: /* 0 010 001 001 */
@@ -365,7 +365,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x0ad: /* 0 010 101 101 */
case 0x0b6: /* 0 010 110 110 */
case 0x0bf: /* 0 010 111 111 */
- sprintf(buffer, "TSTR R%01d",op&0x7);
+ sprintf(buffer, "TSTR R%01d",op&0x7);
break;
case 0x087: /* 0 010 000 111 */
case 0x08f: /* 0 010 001 111 */
@@ -374,7 +374,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x0a7: /* 0 010 100 111 */
case 0x0af: /* 0 010 101 111 */
case 0x0b7: /* 0 010 110 111 */
- sprintf(buffer, "JR R%01d",(op&0x38)>>3);
+ sprintf(buffer, "JR R%01d",(op&0x38)>>3);
break;
case 0x081: /* 0 010 000 001 */
case 0x082: /* 0 010 000 010 */
@@ -425,7 +425,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x0bc: /* 0 010 111 100 */
case 0x0bd: /* 0 010 111 101 */
case 0x0be: /* 0 010 111 110 */
- sprintf(buffer, "MOVR R%01d,R%01d",(op&0x38)>>3,op&0x7);
+ sprintf(buffer, "MOVR R%01d,R%01d",(op&0x38)>>3,op&0x7);
break;
case 0x0c0: /* 0 011 000 000 */
case 0x0c1: /* 0 011 000 001 */
@@ -491,7 +491,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x0fd: /* 0 011 111 101 */
case 0x0fe: /* 0 011 111 110 */
case 0x0ff: /* 0 011 111 111 */
- sprintf(buffer, "ADDR R%01d,R%01d",(op&0x38)>>3,op&7);
+ sprintf(buffer, "ADDR R%01d,R%01d",(op&0x38)>>3,op&7);
break;
case 0x100: /* 0 100 000 000 */
case 0x101: /* 0 100 000 001 */
@@ -557,7 +557,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x13d: /* 0 100 111 101 */
case 0x13e: /* 0 100 111 110 */
case 0x13f: /* 0 100 111 111 */
- sprintf(buffer, "SUBR R%01d,R%01d",(op&0x38)>>3,op&7);
+ sprintf(buffer, "SUBR R%01d,R%01d",(op&0x38)>>3,op&7);
break;
case 0x140: /* 0 101 000 000 */
case 0x141: /* 0 101 000 001 */
@@ -623,7 +623,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x17d: /* 0 101 111 101 */
case 0x17e: /* 0 101 111 110 */
case 0x17f: /* 0 101 111 111 */
- sprintf(buffer, "CMPR R%01d,R%01d",(op&0x38)>>3,op&7);
+ sprintf(buffer, "CMPR R%01d,R%01d",(op&0x38)>>3,op&7);
break;
case 0x180: /* 0 110 000 000 */
case 0x181: /* 0 110 000 001 */
@@ -689,7 +689,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x1bd: /* 0 110 111 101 */
case 0x1be: /* 0 110 111 110 */
case 0x1bf: /* 0 110 111 111 */
- sprintf(buffer, "ANDR R%01d,R%01d",(op&0x38)>>3,op&7);
+ sprintf(buffer, "ANDR R%01d,R%01d",(op&0x38)>>3,op&7);
break;
case 0x1c0: /* 0 111 000 000 */
case 0x1c9: /* 0 111 001 001 */
@@ -699,7 +699,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x1ed: /* 0 111 101 101 */
case 0x1f6: /* 0 111 110 110 */
case 0x1ff: /* 0 111 111 111 */
- sprintf(buffer, "CLRR R%01d",op&7);
+ sprintf(buffer, "CLRR R%01d",op&7);
break;
case 0x1c1: /* 0 111 000 001 */
case 0x1c2: /* 0 111 000 010 */
@@ -757,7 +757,7 @@ CPU_DISASSEMBLE( cp1610 )
case 0x1fc: /* 0 111 111 100 */
case 0x1fd: /* 0 111 111 101 */
case 0x1fe: /* 0 111 111 110 */
- sprintf(buffer, "XORR R%01d,R%01d",(op&0x38)>>3,op&7);
+ sprintf(buffer, "XORR R%01d,R%01d",(op&0x38)>>3,op&7);
break;
case 0x200: /* 1 000 000 000 */
size += 1;
diff --git a/src/emu/cpu/cp1610/cp1610.c b/src/emu/cpu/cp1610/cp1610.c
index 4d0b111f1e4..ca87fad4bce 100644
--- a/src/emu/cpu/cp1610/cp1610.c
+++ b/src/emu/cpu/cp1610/cp1610.c
@@ -32,19 +32,19 @@
struct cp1610_state
{
- UINT16 r[8]; /* registers */
- UINT8 flags; /* flags */
- int intr_enabled;
+ UINT16 r[8]; /* registers */
+ UINT8 flags; /* flags */
+ int intr_enabled;
//int (*reset_callback)(cp1610_state *cpustate);
device_irq_acknowledge_callback irq_callback;
- UINT16 intr_vector;
- int reset_state;
- int intr_state;
- int intrm_state;
- int reset_pending;
- int intr_pending;
- int intrm_pending;
- int mask_interrupts;
+ UINT16 intr_vector;
+ int reset_state;
+ int intr_state;
+ int intrm_state;
+ int reset_pending;
+ int intr_pending;
+ int intrm_pending;
+ int mask_interrupts;
legacy_cpu_device *device;
address_space *program;
int icount;
@@ -66,61 +66,61 @@ INLINE cp1610_state *get_safe_token(device_t *device)
cpustate->flags &= ~(S|Z|C|OV)
/* clear sign and zero flags */
-#define CLR_SZ \
+#define CLR_SZ \
cpustate->flags &= ~(S|Z)
/* clear sign,zero, and carry flags */
-#define CLR_SZC \
+#define CLR_SZC \
cpustate->flags &= ~(S|Z|C)
/* set sign and zero flags */
#define SET_SZ(n) \
- if (n == 0) \
- cpustate->flags |= Z; \
- else \
- if (n & 0x8000) \
+ if (n == 0) \
+ cpustate->flags |= Z; \
+ else \
+ if (n & 0x8000) \
cpustate->flags |= S
/* set sign zero, and carry flags */
#define SET_SZC(n,m) \
- if (n == 0) \
- cpustate->flags |= Z; \
- else \
- if (n & 0x8000) \
- cpustate->flags |= S; \
- if ((n + m) & 0x10000) \
+ if (n == 0) \
+ cpustate->flags |= Z; \
+ else \
+ if (n & 0x8000) \
+ cpustate->flags |= S; \
+ if ((n + m) & 0x10000) \
cpustate->flags |= C
/* set carry and overflow flags */
#define SET_COV(n,m,qq) \
- { unsigned int pp = n + m; \
- if (pp & 0x10000) \
- cpustate->flags |= C; \
- if (qq) \
- { \
- if ((n^pp)&(~(m^n))&0x8000) \
+ { unsigned int pp = n + m; \
+ if (pp & 0x10000) \
+ cpustate->flags |= C; \
+ if (qq) \
+ { \
+ if ((n^pp)&(~(m^n))&0x8000) \
cpustate->flags |= OV; \
- if (m == 0x8000) \
- cpustate->flags ^= OV; \
- } \
- else \
- { \
- if ((n^pp)&(~(m^n))&0x8000) \
- cpustate->flags |= OV; \
- } \
- }
+ if (m == 0x8000) \
+ cpustate->flags ^= OV; \
+ } \
+ else \
+ { \
+ if ((n^pp)&(~(m^n))&0x8000) \
+ cpustate->flags |= OV; \
+ } \
+ }
#if 0
#define SET_COV(n,m) \
- if ((n&0x7fff)+(m&0x7fff) > 0x7fff) \
- { \
+ if ((n&0x7fff)+(m&0x7fff) > 0x7fff) \
+ { \
if (!(cpustate->flags & C))\
- cpustate->flags |= OV; \
- } \
- else \
- { \
- if (cpustate->flags & C) \
- cpustate->flags |= OV; \
+ cpustate->flags |= OV; \
+ } \
+ else \
+ { \
+ if (cpustate->flags & C) \
+ cpustate->flags |= OV; \
}
#endif
@@ -2052,8 +2052,8 @@ static void cp1610_do_sdbd(cp1610_state *cpustate)
UINT16 sdbdtype, dest;
/* Even though SDBD is uninterruptable, we don't need to set the mask bit,
- * because we already treat the SDBD prefixed instructions as uninterruptable
- */
+ * because we already treat the SDBD prefixed instructions as uninterruptable
+ */
//cpustate->mask_interrupts = 1;
sdbdtype = cp1610_readop(cpustate->r[7]);
@@ -2069,62 +2069,62 @@ static void cp1610_do_sdbd(cp1610_state *cpustate)
case 0x260:
case 0x268:
case 0x270:
- case 0x278: /* 1 001 xxx xxx */ cp1610_illegal(cpustate); break;
-
- case 0x280: /* 1 010 000 xxx */ cp1610_sdbd_mviat(cpustate, 0,dest); break;
- case 0x288: /* 1 010 001 xxx */ cp1610_sdbd_mviat(cpustate, 1,dest); break;
- case 0x290: /* 1 010 010 xxx */ cp1610_sdbd_mviat(cpustate, 2,dest); break;
- case 0x298: /* 1 010 011 xxx */ cp1610_sdbd_mviat(cpustate, 3,dest); break;
- case 0x2a0: /* 1 010 100 xxx */ cp1610_sdbd_mviat_i(cpustate, 4,dest); break;
- case 0x2a8: /* 1 010 101 xxx */ cp1610_sdbd_mviat_i(cpustate, 5,dest); break;
- case 0x2b0: /* 1 010 110 xxx */ cp1610_sdbd_mviat_d(cpustate, 6,dest); break; /* ??? */
- case 0x2b8: /* 1 010 111 xxx */ cp1610_sdbd_mvii(cpustate, dest); break;
-
- case 0x2c0: /* 1 011 000 xxx */ cp1610_sdbd_addat(cpustate, 0,dest); break;
- case 0x2c8: /* 1 011 001 xxx */ cp1610_sdbd_addat(cpustate, 1,dest); break;
- case 0x2d0: /* 1 011 010 xxx */ cp1610_sdbd_addat(cpustate, 2,dest); break;
- case 0x2d8: /* 1 011 011 xxx */ cp1610_sdbd_addat(cpustate, 3,dest); break;
- case 0x2e0: /* 1 011 100 xxx */ cp1610_sdbd_addat_i(cpustate, 4,dest); break;
- case 0x2e8: /* 1 011 101 xxx */ cp1610_sdbd_addat_i(cpustate, 5,dest); break;
- case 0x2f0: /* 1 011 110 xxx */ cp1610_sdbd_addat_d(cpustate, 6,dest); break; /* ??? */
- case 0x2f8: /* 1 011 111 xxx */ cp1610_sdbd_addi(cpustate, dest); break;
-
- case 0x300: /* 1 100 000 xxx */ cp1610_sdbd_subat(cpustate, 0,dest); break;
- case 0x308: /* 1 100 001 xxx */ cp1610_sdbd_subat(cpustate, 1,dest); break;
- case 0x310: /* 1 100 010 xxx */ cp1610_sdbd_subat(cpustate, 2,dest); break;
- case 0x318: /* 1 100 011 xxx */ cp1610_sdbd_subat(cpustate, 3,dest); break;
- case 0x320: /* 1 100 100 xxx */ cp1610_sdbd_subat_i(cpustate, 4,dest); break;
- case 0x328: /* 1 100 101 xxx */ cp1610_sdbd_subat_i(cpustate, 5,dest); break;
- case 0x330: /* 1 100 110 xxx */ cp1610_sdbd_subat_d(cpustate, 6,dest); break; /* ??? */
- case 0x338: /* 1 100 111 xxx */ cp1610_sdbd_subi(cpustate, dest); break;
-
- case 0x340: /* 1 101 000 xxx */ cp1610_sdbd_cmpat(cpustate, 0,dest); break;
- case 0x348: /* 1 101 001 xxx */ cp1610_sdbd_cmpat(cpustate, 1,dest); break;
- case 0x350: /* 1 101 010 xxx */ cp1610_sdbd_cmpat(cpustate, 2,dest); break;
- case 0x358: /* 1 101 011 xxx */ cp1610_sdbd_cmpat(cpustate, 3,dest); break;
- case 0x360: /* 1 101 100 xxx */ cp1610_sdbd_cmpat_i(cpustate, 4,dest); break;
- case 0x368: /* 1 101 101 xxx */ cp1610_sdbd_cmpat_i(cpustate, 5,dest); break;
- case 0x370: /* 1 101 110 xxx */ cp1610_sdbd_cmpat_d(cpustate, 6,dest); break; /* ??? */
- case 0x378: /* 1 101 111 xxx */ cp1610_sdbd_cmpi(cpustate, dest); break;
-
- case 0x380: /* 1 110 000 xxx */ cp1610_sdbd_andat(cpustate, 0,dest); break;
- case 0x388: /* 1 110 001 xxx */ cp1610_sdbd_andat(cpustate, 1,dest); break;
- case 0x390: /* 1 110 010 xxx */ cp1610_sdbd_andat(cpustate, 2,dest); break;
- case 0x398: /* 1 110 011 xxx */ cp1610_sdbd_andat(cpustate, 3,dest); break;
- case 0x3a0: /* 1 110 100 xxx */ cp1610_sdbd_andat_i(cpustate, 4,dest); break;
- case 0x3a8: /* 1 110 101 xxx */ cp1610_sdbd_andat_i(cpustate, 5,dest); break;
- case 0x3b0: /* 1 110 110 xxx */ cp1610_sdbd_andat_d(cpustate, 6,dest); break; /* ??? */
- case 0x3b8: /* 1 110 111 xxx */ cp1610_sdbd_andi(cpustate, dest); break;
-
- case 0x3c0: /* 1 110 000 xxx */ cp1610_sdbd_xorat(cpustate, 0,dest); break;
- case 0x3c8: /* 1 110 001 xxx */ cp1610_sdbd_xorat(cpustate, 1,dest); break;
- case 0x3d0: /* 1 110 010 xxx */ cp1610_sdbd_xorat(cpustate, 2,dest); break;
- case 0x3d8: /* 1 110 011 xxx */ cp1610_sdbd_xorat(cpustate, 3,dest); break;
- case 0x3e0: /* 1 110 100 xxx */ cp1610_sdbd_xorat_i(cpustate, 4,dest); break;
- case 0x3e8: /* 1 110 101 xxx */ cp1610_sdbd_xorat_i(cpustate, 5,dest); break;
- case 0x3f0: /* 1 110 110 xxx */ cp1610_sdbd_xorat_d(cpustate, 6,dest); break; /* ??? */
- case 0x3f8: /* 1 110 111 xxx */ cp1610_sdbd_xori(cpustate, dest); break;
- default: cp1610_illegal(cpustate); break;
+ case 0x278: /* 1 001 xxx xxx */ cp1610_illegal(cpustate); break;
+
+ case 0x280: /* 1 010 000 xxx */ cp1610_sdbd_mviat(cpustate, 0,dest); break;
+ case 0x288: /* 1 010 001 xxx */ cp1610_sdbd_mviat(cpustate, 1,dest); break;
+ case 0x290: /* 1 010 010 xxx */ cp1610_sdbd_mviat(cpustate, 2,dest); break;
+ case 0x298: /* 1 010 011 xxx */ cp1610_sdbd_mviat(cpustate, 3,dest); break;
+ case 0x2a0: /* 1 010 100 xxx */ cp1610_sdbd_mviat_i(cpustate, 4,dest); break;
+ case 0x2a8: /* 1 010 101 xxx */ cp1610_sdbd_mviat_i(cpustate, 5,dest); break;
+ case 0x2b0: /* 1 010 110 xxx */ cp1610_sdbd_mviat_d(cpustate, 6,dest); break; /* ??? */
+ case 0x2b8: /* 1 010 111 xxx */ cp1610_sdbd_mvii(cpustate, dest); break;
+
+ case 0x2c0: /* 1 011 000 xxx */ cp1610_sdbd_addat(cpustate, 0,dest); break;
+ case 0x2c8: /* 1 011 001 xxx */ cp1610_sdbd_addat(cpustate, 1,dest); break;
+ case 0x2d0: /* 1 011 010 xxx */ cp1610_sdbd_addat(cpustate, 2,dest); break;
+ case 0x2d8: /* 1 011 011 xxx */ cp1610_sdbd_addat(cpustate, 3,dest); break;
+ case 0x2e0: /* 1 011 100 xxx */ cp1610_sdbd_addat_i(cpustate, 4,dest); break;
+ case 0x2e8: /* 1 011 101 xxx */ cp1610_sdbd_addat_i(cpustate, 5,dest); break;
+ case 0x2f0: /* 1 011 110 xxx */ cp1610_sdbd_addat_d(cpustate, 6,dest); break; /* ??? */
+ case 0x2f8: /* 1 011 111 xxx */ cp1610_sdbd_addi(cpustate, dest); break;
+
+ case 0x300: /* 1 100 000 xxx */ cp1610_sdbd_subat(cpustate, 0,dest); break;
+ case 0x308: /* 1 100 001 xxx */ cp1610_sdbd_subat(cpustate, 1,dest); break;
+ case 0x310: /* 1 100 010 xxx */ cp1610_sdbd_subat(cpustate, 2,dest); break;
+ case 0x318: /* 1 100 011 xxx */ cp1610_sdbd_subat(cpustate, 3,dest); break;
+ case 0x320: /* 1 100 100 xxx */ cp1610_sdbd_subat_i(cpustate, 4,dest); break;
+ case 0x328: /* 1 100 101 xxx */ cp1610_sdbd_subat_i(cpustate, 5,dest); break;
+ case 0x330: /* 1 100 110 xxx */ cp1610_sdbd_subat_d(cpustate, 6,dest); break; /* ??? */
+ case 0x338: /* 1 100 111 xxx */ cp1610_sdbd_subi(cpustate, dest); break;
+
+ case 0x340: /* 1 101 000 xxx */ cp1610_sdbd_cmpat(cpustate, 0,dest); break;
+ case 0x348: /* 1 101 001 xxx */ cp1610_sdbd_cmpat(cpustate, 1,dest); break;
+ case 0x350: /* 1 101 010 xxx */ cp1610_sdbd_cmpat(cpustate, 2,dest); break;
+ case 0x358: /* 1 101 011 xxx */ cp1610_sdbd_cmpat(cpustate, 3,dest); break;
+ case 0x360: /* 1 101 100 xxx */ cp1610_sdbd_cmpat_i(cpustate, 4,dest); break;
+ case 0x368: /* 1 101 101 xxx */ cp1610_sdbd_cmpat_i(cpustate, 5,dest); break;
+ case 0x370: /* 1 101 110 xxx */ cp1610_sdbd_cmpat_d(cpustate, 6,dest); break; /* ??? */
+ case 0x378: /* 1 101 111 xxx */ cp1610_sdbd_cmpi(cpustate, dest); break;
+
+ case 0x380: /* 1 110 000 xxx */ cp1610_sdbd_andat(cpustate, 0,dest); break;
+ case 0x388: /* 1 110 001 xxx */ cp1610_sdbd_andat(cpustate, 1,dest); break;
+ case 0x390: /* 1 110 010 xxx */ cp1610_sdbd_andat(cpustate, 2,dest); break;
+ case 0x398: /* 1 110 011 xxx */ cp1610_sdbd_andat(cpustate, 3,dest); break;
+ case 0x3a0: /* 1 110 100 xxx */ cp1610_sdbd_andat_i(cpustate, 4,dest); break;
+ case 0x3a8: /* 1 110 101 xxx */ cp1610_sdbd_andat_i(cpustate, 5,dest); break;
+ case 0x3b0: /* 1 110 110 xxx */ cp1610_sdbd_andat_d(cpustate, 6,dest); break; /* ??? */
+ case 0x3b8: /* 1 110 111 xxx */ cp1610_sdbd_andi(cpustate, dest); break;
+
+ case 0x3c0: /* 1 110 000 xxx */ cp1610_sdbd_xorat(cpustate, 0,dest); break;
+ case 0x3c8: /* 1 110 001 xxx */ cp1610_sdbd_xorat(cpustate, 1,dest); break;
+ case 0x3d0: /* 1 110 010 xxx */ cp1610_sdbd_xorat(cpustate, 2,dest); break;
+ case 0x3d8: /* 1 110 011 xxx */ cp1610_sdbd_xorat(cpustate, 3,dest); break;
+ case 0x3e0: /* 1 110 100 xxx */ cp1610_sdbd_xorat_i(cpustate, 4,dest); break;
+ case 0x3e8: /* 1 110 101 xxx */ cp1610_sdbd_xorat_i(cpustate, 5,dest); break;
+ case 0x3f0: /* 1 110 110 xxx */ cp1610_sdbd_xorat_d(cpustate, 6,dest); break; /* ??? */
+ case 0x3f8: /* 1 110 111 xxx */ cp1610_sdbd_xori(cpustate, dest); break;
+ default: cp1610_illegal(cpustate); break;
}
}
@@ -2133,36 +2133,36 @@ static void cp1610_do_jumps(cp1610_state *cpustate)
UINT16 jumptype, arg1, arg2, addr;
arg1 = cp1610_readop(cpustate->r[7]);
- cpustate->r[7]++;
+ cpustate->r[7]++;
arg2 = cp1610_readop(cpustate->r[7]);
- cpustate->r[7]++;
+ cpustate->r[7]++;
- /*logerror("jumps: pc = 0x%04x, arg1 = 0x%04x, arg2 = 0x%04x\n",cpustate->r[7]-1,arg1,arg2);*/
+ /*logerror("jumps: pc = 0x%04x, arg1 = 0x%04x, arg2 = 0x%04x\n",cpustate->r[7]-1,arg1,arg2);*/
jumptype = arg1 & 0x303;
addr = ((arg1 & 0x0fc) << 8) | (arg2 & 0x3ff);
- switch( jumptype )
- {
- case 0x000: /* 0 0xx xxx x00 */ cp1610_jsr(cpustate, 4,addr); break;
- case 0x001: /* 0 0xx xxx x01 */ cp1610_jsre(cpustate, 4,addr); break;
- case 0x002: /* 0 0xx xxx x10 */ cp1610_jsrd(cpustate, 4,addr); break;
- case 0x003: /* 0 0xx xxx x11 */ cp1610_illegal(cpustate); break;
-
- case 0x100: /* 0 1xx xxx x00 */ cp1610_jsr(cpustate, 5,addr); break;
- case 0x101: /* 0 1xx xxx x01 */ cp1610_jsre(cpustate, 5,addr); break;
- case 0x102: /* 0 1xx xxx x10 */ cp1610_jsrd(cpustate, 5,addr); break;
- case 0x103: /* 0 1xx xxx x11 */ cp1610_illegal(cpustate); break;
-
- case 0x200: /* 1 0xx xxx x00 */ cp1610_jsr(cpustate, 6,addr); break;
- case 0x201: /* 1 0xx xxx x01 */ cp1610_jsre(cpustate, 6,addr); break;
- case 0x202: /* 1 0xx xxx x10 */ cp1610_jsrd(cpustate, 6,addr); break;
- case 0x203: /* 1 0xx xxx x11 */ cp1610_illegal(cpustate); break;
-
- case 0x300: /* 1 1xx xxx x00 */ cp1610_j(cpustate, addr); break;
- case 0x301: /* 1 1xx xxx x01 */ cp1610_je(cpustate, addr); break;
- case 0x302: /* 1 1xx xxx x10 */ cp1610_jd(cpustate, addr); break;
- case 0x303: /* 1 1xx xxx x11 */ cp1610_illegal(cpustate); break;
+ switch( jumptype )
+ {
+ case 0x000: /* 0 0xx xxx x00 */ cp1610_jsr(cpustate, 4,addr); break;
+ case 0x001: /* 0 0xx xxx x01 */ cp1610_jsre(cpustate, 4,addr); break;
+ case 0x002: /* 0 0xx xxx x10 */ cp1610_jsrd(cpustate, 4,addr); break;
+ case 0x003: /* 0 0xx xxx x11 */ cp1610_illegal(cpustate); break;
+
+ case 0x100: /* 0 1xx xxx x00 */ cp1610_jsr(cpustate, 5,addr); break;
+ case 0x101: /* 0 1xx xxx x01 */ cp1610_jsre(cpustate, 5,addr); break;
+ case 0x102: /* 0 1xx xxx x10 */ cp1610_jsrd(cpustate, 5,addr); break;
+ case 0x103: /* 0 1xx xxx x11 */ cp1610_illegal(cpustate); break;
+
+ case 0x200: /* 1 0xx xxx x00 */ cp1610_jsr(cpustate, 6,addr); break;
+ case 0x201: /* 1 0xx xxx x01 */ cp1610_jsre(cpustate, 6,addr); break;
+ case 0x202: /* 1 0xx xxx x10 */ cp1610_jsrd(cpustate, 6,addr); break;
+ case 0x203: /* 1 0xx xxx x11 */ cp1610_illegal(cpustate); break;
+
+ case 0x300: /* 1 1xx xxx x00 */ cp1610_j(cpustate, addr); break;
+ case 0x301: /* 1 1xx xxx x01 */ cp1610_je(cpustate, addr); break;
+ case 0x302: /* 1 1xx xxx x10 */ cp1610_jd(cpustate, addr); break;
+ case 0x303: /* 1 1xx xxx x11 */ cp1610_illegal(cpustate); break;
}
cpustate->icount -= 12;
@@ -2174,14 +2174,14 @@ static CPU_EXECUTE( cp1610 )
cp1610_state *cpustate = get_safe_token(device);
UINT16 opcode;
- do
- {
- debugger_instruction_hook(device, cpustate->r[7]);
+ do
+ {
+ debugger_instruction_hook(device, cpustate->r[7]);
cpustate->mask_interrupts = 0;
- opcode = cp1610_readop(cpustate->r[7]);
- cpustate->r[7]++;
+ opcode = cp1610_readop(cpustate->r[7]);
+ cpustate->r[7]++;
#if 0
logerror("PC:0x%04x, opcode = 0x%03x, ",cpustate->r[7]-1,opcode);
logerror("R0:0x%04x, ",cpustate->r[0]);
@@ -2194,1163 +2194,1163 @@ static CPU_EXECUTE( cp1610 )
#endif
switch( opcode )
- {
+ {
/* opcode bitmask */
- case 0x000: /* 0 000 000 000 */ cp1610_hlt(cpustate); break; /* TBD */
- case 0x001: /* 0 000 000 001 */ cp1610_do_sdbd(cpustate); break;
- case 0x002: /* 0 000 000 010 */ cp1610_eis(cpustate); break; /* TBD */
- case 0x003: /* 0 000 000 011 */ cp1610_dis(cpustate); break; /* TBD */
- case 0x004: /* 0 000 000 100 */ cp1610_do_jumps(cpustate); break;
- case 0x005: /* 0 000 000 101 */ cp1610_tci(cpustate); break; /* TBD */
- case 0x006: /* 0 000 000 110 */ cp1610_clrc(cpustate); break;
- case 0x007: /* 0 000 000 111 */ cp1610_setc(cpustate); break;
-
- case 0x008: /* 0 000 001 000 */ cp1610_incr(cpustate, 0); break;
- case 0x009: /* 0 000 001 001 */ cp1610_incr(cpustate, 1); break;
- case 0x00a: /* 0 000 001 010 */ cp1610_incr(cpustate, 2); break;
- case 0x00b: /* 0 000 001 011 */ cp1610_incr(cpustate, 3); break;
- case 0x00c: /* 0 000 001 100 */ cp1610_incr(cpustate, 4); break;
- case 0x00d: /* 0 000 001 101 */ cp1610_incr(cpustate, 5); break;
- case 0x00e: /* 0 000 001 110 */ cp1610_incr(cpustate, 6); break;
- case 0x00f: /* 0 000 001 111 */ cp1610_incr(cpustate, 7); break;
-
- case 0x010: /* 0 000 010 000 */ cp1610_decr(cpustate, 0); break;
- case 0x011: /* 0 000 010 001 */ cp1610_decr(cpustate, 1); break;
- case 0x012: /* 0 000 010 010 */ cp1610_decr(cpustate, 2); break;
- case 0x013: /* 0 000 010 011 */ cp1610_decr(cpustate, 3); break;
- case 0x014: /* 0 000 010 100 */ cp1610_decr(cpustate, 4); break;
- case 0x015: /* 0 000 010 101 */ cp1610_decr(cpustate, 5); break;
- case 0x016: /* 0 000 010 110 */ cp1610_decr(cpustate, 6); break;
- case 0x017: /* 0 000 010 111 */ cp1610_decr(cpustate, 7); break;
-
- case 0x018: /* 0 000 011 000 */ cp1610_comr(cpustate, 0); break;
- case 0x019: /* 0 000 011 001 */ cp1610_comr(cpustate, 1); break;
- case 0x01a: /* 0 000 011 010 */ cp1610_comr(cpustate, 2); break;
- case 0x01b: /* 0 000 011 011 */ cp1610_comr(cpustate, 3); break;
- case 0x01c: /* 0 000 011 100 */ cp1610_comr(cpustate, 4); break;
- case 0x01d: /* 0 000 011 101 */ cp1610_comr(cpustate, 5); break;
- case 0x01e: /* 0 000 011 110 */ cp1610_comr(cpustate, 6); break;
- case 0x01f: /* 0 000 011 111 */ cp1610_comr(cpustate, 7); break;
-
- case 0x020: /* 0 000 100 000 */ cp1610_negr(cpustate, 0); break;
- case 0x021: /* 0 000 100 001 */ cp1610_negr(cpustate, 1); break;
- case 0x022: /* 0 000 100 010 */ cp1610_negr(cpustate, 2); break;
- case 0x023: /* 0 000 100 011 */ cp1610_negr(cpustate, 3); break;
- case 0x024: /* 0 000 100 100 */ cp1610_negr(cpustate, 4); break;
- case 0x025: /* 0 000 100 101 */ cp1610_negr(cpustate, 5); break;
- case 0x026: /* 0 000 100 110 */ cp1610_negr(cpustate, 6); break;
- case 0x027: /* 0 000 100 111 */ cp1610_negr(cpustate, 7); break;
-
- case 0x028: /* 0 000 101 000 */ cp1610_adcr(cpustate, 0); break;
- case 0x029: /* 0 000 101 001 */ cp1610_adcr(cpustate, 1); break;
- case 0x02a: /* 0 000 101 010 */ cp1610_adcr(cpustate, 2); break;
- case 0x02b: /* 0 000 101 011 */ cp1610_adcr(cpustate, 3); break;
- case 0x02c: /* 0 000 101 100 */ cp1610_adcr(cpustate, 4); break;
- case 0x02d: /* 0 000 101 101 */ cp1610_adcr(cpustate, 5); break;
- case 0x02e: /* 0 000 101 110 */ cp1610_adcr(cpustate, 6); break;
- case 0x02f: /* 0 000 101 111 */ cp1610_adcr(cpustate, 7); break;
-
- case 0x030: /* 0 000 110 000 */ cp1610_gswd(cpustate, 0); break;
- case 0x031: /* 0 000 110 001 */ cp1610_gswd(cpustate, 1); break;
- case 0x032: /* 0 000 110 010 */ cp1610_gswd(cpustate, 2); break;
- case 0x033: /* 0 000 110 011 */ cp1610_gswd(cpustate, 3); break;
- case 0x034: /* 0 000 110 100 */ cp1610_nop(cpustate); break;
- case 0x035: /* 0 000 110 101 */ cp1610_nop(cpustate); break;
- case 0x036: /* 0 000 110 110 */ cp1610_sin(cpustate); break; /* TBD */
- case 0x037: /* 0 000 110 111 */ cp1610_sin(cpustate); break; /* TBD */
-
- case 0x038: /* 0 000 111 000 */ cp1610_rswd(cpustate, 0); break;
- case 0x039: /* 0 000 111 001 */ cp1610_rswd(cpustate, 1); break;
- case 0x03a: /* 0 000 111 010 */ cp1610_rswd(cpustate, 2); break;
- case 0x03b: /* 0 000 111 011 */ cp1610_rswd(cpustate, 3); break;
- case 0x03c: /* 0 000 111 100 */ cp1610_rswd(cpustate, 4); break;
- case 0x03d: /* 0 000 111 101 */ cp1610_rswd(cpustate, 5); break;
- case 0x03e: /* 0 000 111 110 */ cp1610_rswd(cpustate, 6); break;
- case 0x03f: /* 0 000 111 111 */ cp1610_rswd(cpustate, 7); break;
-
- case 0x040: /* 0 001 000 000 */ cp1610_swap(cpustate, 0); break;
- case 0x041: /* 0 001 000 001 */ cp1610_swap(cpustate, 1); break;
- case 0x042: /* 0 001 000 010 */ cp1610_swap(cpustate, 2); break;
- case 0x043: /* 0 001 000 011 */ cp1610_swap(cpustate, 3); break;
- case 0x044: /* 0 001 000 100 */ cp1610_dswap(cpustate, 0); break;
- case 0x045: /* 0 001 000 101 */ cp1610_dswap(cpustate, 1); break;
- case 0x046: /* 0 001 000 110 */ cp1610_dswap(cpustate, 2); break;
- case 0x047: /* 0 001 000 111 */ cp1610_dswap(cpustate, 3); break;
-
- case 0x048: /* 0 001 001 000 */ cp1610_sll_1(cpustate, 0); break;
- case 0x049: /* 0 001 001 001 */ cp1610_sll_1(cpustate, 1); break;
- case 0x04a: /* 0 001 001 010 */ cp1610_sll_1(cpustate, 2); break;
- case 0x04b: /* 0 001 001 011 */ cp1610_sll_1(cpustate, 3); break;
- case 0x04c: /* 0 001 001 100 */ cp1610_sll_2(cpustate, 0); break;
- case 0x04d: /* 0 001 001 101 */ cp1610_sll_2(cpustate, 1); break;
- case 0x04e: /* 0 001 001 110 */ cp1610_sll_2(cpustate, 2); break;
- case 0x04f: /* 0 001 001 111 */ cp1610_sll_2(cpustate, 3); break;
-
- case 0x050: /* 0 001 010 000 */ cp1610_rlc_1(cpustate, 0); break;
- case 0x051: /* 0 001 010 001 */ cp1610_rlc_1(cpustate, 1); break;
- case 0x052: /* 0 001 010 010 */ cp1610_rlc_1(cpustate, 2); break;
- case 0x053: /* 0 001 010 011 */ cp1610_rlc_1(cpustate, 3); break;
- case 0x054: /* 0 001 010 100 */ cp1610_rlc_2(cpustate, 0); break;
- case 0x055: /* 0 001 010 101 */ cp1610_rlc_2(cpustate, 1); break;
- case 0x056: /* 0 001 010 110 */ cp1610_rlc_2(cpustate, 2); break;
- case 0x057: /* 0 001 010 111 */ cp1610_rlc_2(cpustate, 3); break;
-
- case 0x058: /* 0 001 011 000 */ cp1610_sllc_1(cpustate, 0); break;
- case 0x059: /* 0 001 011 001 */ cp1610_sllc_1(cpustate, 1); break;
- case 0x05a: /* 0 001 011 010 */ cp1610_sllc_1(cpustate, 2); break;
- case 0x05b: /* 0 001 011 011 */ cp1610_sllc_1(cpustate, 3); break;
- case 0x05c: /* 0 001 011 100 */ cp1610_sllc_2(cpustate, 0); break;
- case 0x05d: /* 0 001 011 101 */ cp1610_sllc_2(cpustate, 1); break;
- case 0x05e: /* 0 001 011 110 */ cp1610_sllc_2(cpustate, 2); break;
- case 0x05f: /* 0 001 011 111 */ cp1610_sllc_2(cpustate, 3); break;
-
- case 0x060: /* 0 001 100 000 */ cp1610_slr_1(cpustate, 0); break;
- case 0x061: /* 0 001 100 001 */ cp1610_slr_1(cpustate, 1); break;
- case 0x062: /* 0 001 100 010 */ cp1610_slr_1(cpustate, 2); break;
- case 0x063: /* 0 001 100 011 */ cp1610_slr_1(cpustate, 3); break;
- case 0x064: /* 0 001 100 100 */ cp1610_slr_2(cpustate, 0); break;
- case 0x065: /* 0 001 100 101 */ cp1610_slr_2(cpustate, 1); break;
- case 0x066: /* 0 001 100 110 */ cp1610_slr_2(cpustate, 2); break;
- case 0x067: /* 0 001 100 111 */ cp1610_slr_2(cpustate, 3); break;
-
- case 0x068: /* 0 001 101 000 */ cp1610_sar_1(cpustate, 0); break;
- case 0x069: /* 0 001 101 001 */ cp1610_sar_1(cpustate, 1); break;
- case 0x06a: /* 0 001 101 010 */ cp1610_sar_1(cpustate, 2); break;
- case 0x06b: /* 0 001 101 011 */ cp1610_sar_1(cpustate, 3); break;
- case 0x06c: /* 0 001 101 100 */ cp1610_sar_2(cpustate, 0); break;
- case 0x06d: /* 0 001 101 101 */ cp1610_sar_2(cpustate, 1); break;
- case 0x06e: /* 0 001 101 110 */ cp1610_sar_2(cpustate, 2); break;
- case 0x06f: /* 0 001 101 111 */ cp1610_sar_2(cpustate, 3); break;
-
- case 0x070: /* 0 001 110 000 */ cp1610_rrc_1(cpustate, 0); break;
- case 0x071: /* 0 001 110 001 */ cp1610_rrc_1(cpustate, 1); break;
- case 0x072: /* 0 001 110 010 */ cp1610_rrc_1(cpustate, 2); break;
- case 0x073: /* 0 001 110 011 */ cp1610_rrc_1(cpustate, 3); break;
- case 0x074: /* 0 001 110 100 */ cp1610_rrc_2(cpustate, 0); break;
- case 0x075: /* 0 001 110 101 */ cp1610_rrc_2(cpustate, 1); break;
- case 0x076: /* 0 001 110 110 */ cp1610_rrc_2(cpustate, 2); break;
- case 0x077: /* 0 001 110 111 */ cp1610_rrc_2(cpustate, 3); break;
-
- case 0x078: /* 0 001 111 000 */ cp1610_sarc_1(cpustate, 0); break;
- case 0x079: /* 0 001 111 001 */ cp1610_sarc_1(cpustate, 1); break;
- case 0x07a: /* 0 001 111 010 */ cp1610_sarc_1(cpustate, 2); break;
- case 0x07b: /* 0 001 111 011 */ cp1610_sarc_1(cpustate, 3); break;
- case 0x07c: /* 0 001 111 100 */ cp1610_sarc_2(cpustate, 0); break;
- case 0x07d: /* 0 001 111 101 */ cp1610_sarc_2(cpustate, 1); break;
- case 0x07e: /* 0 001 111 110 */ cp1610_sarc_2(cpustate, 2); break;
- case 0x07f: /* 0 001 111 111 */ cp1610_sarc_2(cpustate, 3); break;
-
- case 0x080: /* 0 010 000 000 */ cp1610_tstr(cpustate, 0); break;
- case 0x081: /* 0 010 000 001 */ cp1610_movr(cpustate, 0,1); break;
- case 0x082: /* 0 010 000 010 */ cp1610_movr(cpustate, 0,2); break;
- case 0x083: /* 0 010 000 011 */ cp1610_movr(cpustate, 0,3); break;
- case 0x084: /* 0 010 000 100 */ cp1610_movr(cpustate, 0,4); break;
- case 0x085: /* 0 010 000 101 */ cp1610_movr(cpustate, 0,5); break;
- case 0x086: /* 0 010 000 110 */ cp1610_movr(cpustate, 0,6); break;
- case 0x087: /* 0 010 000 111 */ cp1610_movr(cpustate, 0,7); break; /* jr */
-
- case 0x088: /* 0 010 001 000 */ cp1610_movr(cpustate, 1,0); break;
- case 0x089: /* 0 010 001 001 */ cp1610_tstr(cpustate, 1); break;
- case 0x08a: /* 0 010 001 010 */ cp1610_movr(cpustate, 1,2); break;
- case 0x08b: /* 0 010 001 011 */ cp1610_movr(cpustate, 1,3); break;
- case 0x08c: /* 0 010 001 100 */ cp1610_movr(cpustate, 1,4); break;
- case 0x08d: /* 0 010 001 101 */ cp1610_movr(cpustate, 1,5); break;
- case 0x08e: /* 0 010 001 110 */ cp1610_movr(cpustate, 1,6); break;
- case 0x08f: /* 0 010 001 111 */ cp1610_movr(cpustate, 1,7); break; /* jr */
-
- case 0x090: /* 0 010 010 000 */ cp1610_movr(cpustate, 2,0); break;
- case 0x091: /* 0 010 010 001 */ cp1610_movr(cpustate, 2,1); break;
- case 0x092: /* 0 010 010 010 */ cp1610_tstr(cpustate, 2); break;
- case 0x093: /* 0 010 010 011 */ cp1610_movr(cpustate, 2,3); break;
- case 0x094: /* 0 010 010 100 */ cp1610_movr(cpustate, 2,4); break;
- case 0x095: /* 0 010 010 101 */ cp1610_movr(cpustate, 2,5); break;
- case 0x096: /* 0 010 010 110 */ cp1610_movr(cpustate, 2,6); break;
- case 0x097: /* 0 010 010 111 */ cp1610_movr(cpustate, 2,7); break; /* jr */
-
- case 0x098: /* 0 010 011 000 */ cp1610_movr(cpustate, 3,0); break;
- case 0x099: /* 0 010 011 001 */ cp1610_movr(cpustate, 3,1); break;
- case 0x09a: /* 0 010 011 010 */ cp1610_movr(cpustate, 3,2); break;
- case 0x09b: /* 0 010 011 011 */ cp1610_tstr(cpustate, 3); break;
- case 0x09c: /* 0 010 011 100 */ cp1610_movr(cpustate, 3,4); break;
- case 0x09d: /* 0 010 011 101 */ cp1610_movr(cpustate, 3,5); break;
- case 0x09e: /* 0 010 011 110 */ cp1610_movr(cpustate, 3,6); break;
- case 0x09f: /* 0 010 011 111 */ cp1610_movr(cpustate, 3,7); break; /* jr */
-
- case 0x0a0: /* 0 010 100 000 */ cp1610_movr(cpustate, 4,0); break;
- case 0x0a1: /* 0 010 100 001 */ cp1610_movr(cpustate, 4,1); break;
- case 0x0a2: /* 0 010 100 010 */ cp1610_movr(cpustate, 4,2); break;
- case 0x0a3: /* 0 010 100 011 */ cp1610_movr(cpustate, 4,3); break;
- case 0x0a4: /* 0 010 100 100 */ cp1610_tstr(cpustate, 4); break;
- case 0x0a5: /* 0 010 100 101 */ cp1610_movr(cpustate, 4,5); break;
- case 0x0a6: /* 0 010 100 110 */ cp1610_movr(cpustate, 4,6); break;
- case 0x0a7: /* 0 010 100 111 */ cp1610_movr(cpustate, 4,7); break; /* jr */
-
- case 0x0a8: /* 0 010 101 000 */ cp1610_movr(cpustate, 5,0); break;
- case 0x0a9: /* 0 010 101 001 */ cp1610_movr(cpustate, 5,1); break;
- case 0x0aa: /* 0 010 101 010 */ cp1610_movr(cpustate, 5,2); break;
- case 0x0ab: /* 0 010 101 011 */ cp1610_movr(cpustate, 5,3); break;
- case 0x0ac: /* 0 010 101 100 */ cp1610_movr(cpustate, 5,4); break;
- case 0x0ad: /* 0 010 101 101 */ cp1610_tstr(cpustate, 5); break;
- case 0x0ae: /* 0 010 101 110 */ cp1610_movr(cpustate, 5,6); break;
- case 0x0af: /* 0 010 101 111 */ cp1610_movr(cpustate, 5,7); break; /* jr */
-
- case 0x0b0: /* 0 010 110 000 */ cp1610_movr(cpustate, 6,0); break;
- case 0x0b1: /* 0 010 110 001 */ cp1610_movr(cpustate, 6,1); break;
- case 0x0b2: /* 0 010 110 010 */ cp1610_movr(cpustate, 6,2); break;
- case 0x0b3: /* 0 010 110 011 */ cp1610_movr(cpustate, 6,3); break;
- case 0x0b4: /* 0 010 110 100 */ cp1610_movr(cpustate, 6,4); break;
- case 0x0b5: /* 0 010 110 101 */ cp1610_movr(cpustate, 6,5); break;
- case 0x0b6: /* 0 010 110 110 */ cp1610_tstr(cpustate, 6); break;
- case 0x0b7: /* 0 010 110 111 */ cp1610_movr(cpustate, 6,7); break; /* jr */
-
- case 0x0b8: /* 0 010 111 000 */ cp1610_movr(cpustate, 7,0); break;
- case 0x0b9: /* 0 010 111 001 */ cp1610_movr(cpustate, 7,1); break;
- case 0x0ba: /* 0 010 111 010 */ cp1610_movr(cpustate, 7,2); break;
- case 0x0bb: /* 0 010 111 011 */ cp1610_movr(cpustate, 7,3); break;
- case 0x0bc: /* 0 010 111 100 */ cp1610_movr(cpustate, 7,4); break;
- case 0x0bd: /* 0 010 111 101 */ cp1610_movr(cpustate, 7,5); break;
- case 0x0be: /* 0 010 111 110 */ cp1610_movr(cpustate, 7,6); break;
- case 0x0bf: /* 0 010 111 111 */ cp1610_tstr(cpustate, 7); break;
-
- case 0x0c0: /* 0 011 000 000 */ cp1610_addr(cpustate, 0,0); break;
- case 0x0c1: /* 0 011 000 001 */ cp1610_addr(cpustate, 0,1); break;
- case 0x0c2: /* 0 011 000 010 */ cp1610_addr(cpustate, 0,2); break;
- case 0x0c3: /* 0 011 000 011 */ cp1610_addr(cpustate, 0,3); break;
- case 0x0c4: /* 0 011 000 100 */ cp1610_addr(cpustate, 0,4); break;
- case 0x0c5: /* 0 011 000 101 */ cp1610_addr(cpustate, 0,5); break;
- case 0x0c6: /* 0 011 000 110 */ cp1610_addr(cpustate, 0,6); break;
- case 0x0c7: /* 0 011 000 111 */ cp1610_addr(cpustate, 0,7); break;
-
- case 0x0c8: /* 0 011 001 000 */ cp1610_addr(cpustate, 1,0); break;
- case 0x0c9: /* 0 011 001 001 */ cp1610_addr(cpustate, 1,1); break;
- case 0x0ca: /* 0 011 001 010 */ cp1610_addr(cpustate, 1,2); break;
- case 0x0cb: /* 0 011 001 011 */ cp1610_addr(cpustate, 1,3); break;
- case 0x0cc: /* 0 011 001 100 */ cp1610_addr(cpustate, 1,4); break;
- case 0x0cd: /* 0 011 001 101 */ cp1610_addr(cpustate, 1,5); break;
- case 0x0ce: /* 0 011 001 110 */ cp1610_addr(cpustate, 1,6); break;
- case 0x0cf: /* 0 011 001 111 */ cp1610_addr(cpustate, 1,7); break;
-
- case 0x0d0: /* 0 011 010 000 */ cp1610_addr(cpustate, 2,0); break;
- case 0x0d1: /* 0 011 010 001 */ cp1610_addr(cpustate, 2,1); break;
- case 0x0d2: /* 0 011 010 010 */ cp1610_addr(cpustate, 2,2); break;
- case 0x0d3: /* 0 011 010 011 */ cp1610_addr(cpustate, 2,3); break;
- case 0x0d4: /* 0 011 010 100 */ cp1610_addr(cpustate, 2,4); break;
- case 0x0d5: /* 0 011 010 101 */ cp1610_addr(cpustate, 2,5); break;
- case 0x0d6: /* 0 011 010 110 */ cp1610_addr(cpustate, 2,6); break;
- case 0x0d7: /* 0 011 010 111 */ cp1610_addr(cpustate, 2,7); break;
-
- case 0x0d8: /* 0 011 011 000 */ cp1610_addr(cpustate, 3,0); break;
- case 0x0d9: /* 0 011 011 001 */ cp1610_addr(cpustate, 3,1); break;
- case 0x0da: /* 0 011 011 010 */ cp1610_addr(cpustate, 3,2); break;
- case 0x0db: /* 0 011 011 011 */ cp1610_addr(cpustate, 3,3); break;
- case 0x0dc: /* 0 011 011 100 */ cp1610_addr(cpustate, 3,4); break;
- case 0x0dd: /* 0 011 011 101 */ cp1610_addr(cpustate, 3,5); break;
- case 0x0de: /* 0 011 011 110 */ cp1610_addr(cpustate, 3,6); break;
- case 0x0df: /* 0 011 011 111 */ cp1610_addr(cpustate, 3,7); break;
-
- case 0x0e0: /* 0 011 100 000 */ cp1610_addr(cpustate, 4,0); break;
- case 0x0e1: /* 0 011 100 001 */ cp1610_addr(cpustate, 4,1); break;
- case 0x0e2: /* 0 011 100 010 */ cp1610_addr(cpustate, 4,2); break;
- case 0x0e3: /* 0 011 100 011 */ cp1610_addr(cpustate, 4,3); break;
- case 0x0e4: /* 0 011 100 100 */ cp1610_addr(cpustate, 4,4); break;
- case 0x0e5: /* 0 011 100 101 */ cp1610_addr(cpustate, 4,5); break;
- case 0x0e6: /* 0 011 100 110 */ cp1610_addr(cpustate, 4,6); break;
- case 0x0e7: /* 0 011 100 111 */ cp1610_addr(cpustate, 4,7); break;
-
- case 0x0e8: /* 0 011 101 000 */ cp1610_addr(cpustate, 5,0); break;
- case 0x0e9: /* 0 011 101 001 */ cp1610_addr(cpustate, 5,1); break;
- case 0x0ea: /* 0 011 101 010 */ cp1610_addr(cpustate, 5,2); break;
- case 0x0eb: /* 0 011 101 011 */ cp1610_addr(cpustate, 5,3); break;
- case 0x0ec: /* 0 011 101 100 */ cp1610_addr(cpustate, 5,4); break;
- case 0x0ed: /* 0 011 101 101 */ cp1610_addr(cpustate, 5,5); break;
- case 0x0ee: /* 0 011 101 110 */ cp1610_addr(cpustate, 5,6); break;
- case 0x0ef: /* 0 011 101 111 */ cp1610_addr(cpustate, 5,7); break;
-
- case 0x0f0: /* 0 011 110 000 */ cp1610_addr(cpustate, 6,0); break;
- case 0x0f1: /* 0 011 110 001 */ cp1610_addr(cpustate, 6,1); break;
- case 0x0f2: /* 0 011 110 010 */ cp1610_addr(cpustate, 6,2); break;
- case 0x0f3: /* 0 011 110 011 */ cp1610_addr(cpustate, 6,3); break;
- case 0x0f4: /* 0 011 110 100 */ cp1610_addr(cpustate, 6,4); break;
- case 0x0f5: /* 0 011 110 101 */ cp1610_addr(cpustate, 6,5); break;
- case 0x0f6: /* 0 011 110 110 */ cp1610_addr(cpustate, 6,6); break;
- case 0x0f7: /* 0 011 110 111 */ cp1610_addr(cpustate, 6,7); break;
-
- case 0x0f8: /* 0 011 111 000 */ cp1610_addr(cpustate, 7,0); break;
- case 0x0f9: /* 0 011 111 001 */ cp1610_addr(cpustate, 7,1); break;
- case 0x0fa: /* 0 011 111 010 */ cp1610_addr(cpustate, 7,2); break;
- case 0x0fb: /* 0 011 111 011 */ cp1610_addr(cpustate, 7,3); break;
- case 0x0fc: /* 0 011 111 100 */ cp1610_addr(cpustate, 7,4); break;
- case 0x0fd: /* 0 011 111 101 */ cp1610_addr(cpustate, 7,5); break;
- case 0x0fe: /* 0 011 111 110 */ cp1610_addr(cpustate, 7,6); break;
- case 0x0ff: /* 0 011 111 111 */ cp1610_addr(cpustate, 7,7); break;
-
- case 0x100: /* 0 100 000 000 */ cp1610_subr(cpustate, 0,0); break;
- case 0x101: /* 0 100 000 001 */ cp1610_subr(cpustate, 0,1); break;
- case 0x102: /* 0 100 000 010 */ cp1610_subr(cpustate, 0,2); break;
- case 0x103: /* 0 100 000 011 */ cp1610_subr(cpustate, 0,3); break;
- case 0x104: /* 0 100 000 100 */ cp1610_subr(cpustate, 0,4); break;
- case 0x105: /* 0 100 000 101 */ cp1610_subr(cpustate, 0,5); break;
- case 0x106: /* 0 100 000 110 */ cp1610_subr(cpustate, 0,6); break;
- case 0x107: /* 0 100 000 111 */ cp1610_subr(cpustate, 0,7); break;
-
- case 0x108: /* 0 100 001 000 */ cp1610_subr(cpustate, 1,0); break;
- case 0x109: /* 0 100 001 001 */ cp1610_subr(cpustate, 1,1); break;
- case 0x10a: /* 0 100 001 010 */ cp1610_subr(cpustate, 1,2); break;
- case 0x10b: /* 0 100 001 011 */ cp1610_subr(cpustate, 1,3); break;
- case 0x10c: /* 0 100 001 100 */ cp1610_subr(cpustate, 1,4); break;
- case 0x10d: /* 0 100 001 101 */ cp1610_subr(cpustate, 1,5); break;
- case 0x10e: /* 0 100 001 110 */ cp1610_subr(cpustate, 1,6); break;
- case 0x10f: /* 0 100 001 111 */ cp1610_subr(cpustate, 1,7); break;
-
- case 0x110: /* 0 100 010 000 */ cp1610_subr(cpustate, 2,0); break;
- case 0x111: /* 0 100 010 001 */ cp1610_subr(cpustate, 2,1); break;
- case 0x112: /* 0 100 010 010 */ cp1610_subr(cpustate, 2,2); break;
- case 0x113: /* 0 100 010 011 */ cp1610_subr(cpustate, 2,3); break;
- case 0x114: /* 0 100 010 100 */ cp1610_subr(cpustate, 2,4); break;
- case 0x115: /* 0 100 010 101 */ cp1610_subr(cpustate, 2,5); break;
- case 0x116: /* 0 100 010 110 */ cp1610_subr(cpustate, 2,6); break;
- case 0x117: /* 0 100 010 111 */ cp1610_subr(cpustate, 2,7); break;
-
- case 0x118: /* 0 100 011 000 */ cp1610_subr(cpustate, 3,0); break;
- case 0x119: /* 0 100 011 001 */ cp1610_subr(cpustate, 3,1); break;
- case 0x11a: /* 0 100 011 010 */ cp1610_subr(cpustate, 3,2); break;
- case 0x11b: /* 0 100 011 011 */ cp1610_subr(cpustate, 3,3); break;
- case 0x11c: /* 0 100 011 100 */ cp1610_subr(cpustate, 3,4); break;
- case 0x11d: /* 0 100 011 101 */ cp1610_subr(cpustate, 3,5); break;
- case 0x11e: /* 0 100 011 110 */ cp1610_subr(cpustate, 3,6); break;
- case 0x11f: /* 0 100 011 111 */ cp1610_subr(cpustate, 3,7); break;
-
- case 0x120: /* 0 100 100 000 */ cp1610_subr(cpustate, 4,0); break;
- case 0x121: /* 0 100 100 001 */ cp1610_subr(cpustate, 4,1); break;
- case 0x122: /* 0 100 100 010 */ cp1610_subr(cpustate, 4,2); break;
- case 0x123: /* 0 100 100 011 */ cp1610_subr(cpustate, 4,3); break;
- case 0x124: /* 0 100 100 100 */ cp1610_subr(cpustate, 4,4); break;
- case 0x125: /* 0 100 100 101 */ cp1610_subr(cpustate, 4,5); break;
- case 0x126: /* 0 100 100 110 */ cp1610_subr(cpustate, 4,6); break;
- case 0x127: /* 0 100 100 111 */ cp1610_subr(cpustate, 4,7); break;
-
- case 0x128: /* 0 100 101 000 */ cp1610_subr(cpustate, 5,0); break;
- case 0x129: /* 0 100 101 001 */ cp1610_subr(cpustate, 5,1); break;
- case 0x12a: /* 0 100 101 010 */ cp1610_subr(cpustate, 5,2); break;
- case 0x12b: /* 0 100 101 011 */ cp1610_subr(cpustate, 5,3); break;
- case 0x12c: /* 0 100 101 100 */ cp1610_subr(cpustate, 5,4); break;
- case 0x12d: /* 0 100 101 101 */ cp1610_subr(cpustate, 5,5); break;
- case 0x12e: /* 0 100 101 110 */ cp1610_subr(cpustate, 5,6); break;
- case 0x12f: /* 0 100 101 111 */ cp1610_subr(cpustate, 5,7); break;
-
- case 0x130: /* 0 100 110 000 */ cp1610_subr(cpustate, 6,0); break;
- case 0x131: /* 0 100 110 001 */ cp1610_subr(cpustate, 6,1); break;
- case 0x132: /* 0 100 110 010 */ cp1610_subr(cpustate, 6,2); break;
- case 0x133: /* 0 100 110 011 */ cp1610_subr(cpustate, 6,3); break;
- case 0x134: /* 0 100 110 100 */ cp1610_subr(cpustate, 6,4); break;
- case 0x135: /* 0 100 110 101 */ cp1610_subr(cpustate, 6,5); break;
- case 0x136: /* 0 100 110 110 */ cp1610_subr(cpustate, 6,6); break;
- case 0x137: /* 0 100 110 111 */ cp1610_subr(cpustate, 6,7); break;
-
- case 0x138: /* 0 100 111 000 */ cp1610_subr(cpustate, 7,0); break;
- case 0x139: /* 0 100 111 001 */ cp1610_subr(cpustate, 7,1); break;
- case 0x13a: /* 0 100 111 010 */ cp1610_subr(cpustate, 7,2); break;
- case 0x13b: /* 0 100 111 011 */ cp1610_subr(cpustate, 7,3); break;
- case 0x13c: /* 0 100 111 100 */ cp1610_subr(cpustate, 7,4); break;
- case 0x13d: /* 0 100 111 101 */ cp1610_subr(cpustate, 7,5); break;
- case 0x13e: /* 0 100 111 110 */ cp1610_subr(cpustate, 7,6); break;
- case 0x13f: /* 0 100 111 111 */ cp1610_subr(cpustate, 7,7); break;
-
- case 0x140: /* 0 101 000 000 */ cp1610_cmpr(cpustate, 0,0); break;
- case 0x141: /* 0 101 000 001 */ cp1610_cmpr(cpustate, 0,1); break;
- case 0x142: /* 0 101 000 010 */ cp1610_cmpr(cpustate, 0,2); break;
- case 0x143: /* 0 101 000 011 */ cp1610_cmpr(cpustate, 0,3); break;
- case 0x144: /* 0 101 000 100 */ cp1610_cmpr(cpustate, 0,4); break;
- case 0x145: /* 0 101 000 101 */ cp1610_cmpr(cpustate, 0,5); break;
- case 0x146: /* 0 101 000 110 */ cp1610_cmpr(cpustate, 0,6); break;
- case 0x147: /* 0 101 000 111 */ cp1610_cmpr(cpustate, 0,7); break;
-
- case 0x148: /* 0 101 001 000 */ cp1610_cmpr(cpustate, 1,0); break;
- case 0x149: /* 0 101 001 001 */ cp1610_cmpr(cpustate, 1,1); break;
- case 0x14a: /* 0 101 001 010 */ cp1610_cmpr(cpustate, 1,2); break;
- case 0x14b: /* 0 101 001 011 */ cp1610_cmpr(cpustate, 1,3); break;
- case 0x14c: /* 0 101 001 100 */ cp1610_cmpr(cpustate, 1,4); break;
- case 0x14d: /* 0 101 001 101 */ cp1610_cmpr(cpustate, 1,5); break;
- case 0x14e: /* 0 101 001 110 */ cp1610_cmpr(cpustate, 1,6); break;
- case 0x14f: /* 0 101 001 111 */ cp1610_cmpr(cpustate, 1,7); break;
-
- case 0x150: /* 0 101 010 000 */ cp1610_cmpr(cpustate, 2,0); break;
- case 0x151: /* 0 101 010 001 */ cp1610_cmpr(cpustate, 2,1); break;
- case 0x152: /* 0 101 010 010 */ cp1610_cmpr(cpustate, 2,2); break;
- case 0x153: /* 0 101 010 011 */ cp1610_cmpr(cpustate, 2,3); break;
- case 0x154: /* 0 101 010 100 */ cp1610_cmpr(cpustate, 2,4); break;
- case 0x155: /* 0 101 010 101 */ cp1610_cmpr(cpustate, 2,5); break;
- case 0x156: /* 0 101 010 110 */ cp1610_cmpr(cpustate, 2,6); break;
- case 0x157: /* 0 101 010 111 */ cp1610_cmpr(cpustate, 2,7); break;
-
- case 0x158: /* 0 101 011 000 */ cp1610_cmpr(cpustate, 3,0); break;
- case 0x159: /* 0 101 011 001 */ cp1610_cmpr(cpustate, 3,1); break;
- case 0x15a: /* 0 101 011 010 */ cp1610_cmpr(cpustate, 3,2); break;
- case 0x15b: /* 0 101 011 011 */ cp1610_cmpr(cpustate, 3,3); break;
- case 0x15c: /* 0 101 011 100 */ cp1610_cmpr(cpustate, 3,4); break;
- case 0x15d: /* 0 101 011 101 */ cp1610_cmpr(cpustate, 3,5); break;
- case 0x15e: /* 0 101 011 110 */ cp1610_cmpr(cpustate, 3,6); break;
- case 0x15f: /* 0 101 011 111 */ cp1610_cmpr(cpustate, 3,7); break;
-
- case 0x160: /* 0 101 100 000 */ cp1610_cmpr(cpustate, 4,0); break;
- case 0x161: /* 0 101 100 001 */ cp1610_cmpr(cpustate, 4,1); break;
- case 0x162: /* 0 101 100 010 */ cp1610_cmpr(cpustate, 4,2); break;
- case 0x163: /* 0 101 100 011 */ cp1610_cmpr(cpustate, 4,3); break;
- case 0x164: /* 0 101 100 100 */ cp1610_cmpr(cpustate, 4,4); break;
- case 0x165: /* 0 101 100 101 */ cp1610_cmpr(cpustate, 4,5); break;
- case 0x166: /* 0 101 100 110 */ cp1610_cmpr(cpustate, 4,6); break;
- case 0x167: /* 0 101 100 111 */ cp1610_cmpr(cpustate, 4,7); break;
-
- case 0x168: /* 0 101 101 000 */ cp1610_cmpr(cpustate, 5,0); break;
- case 0x169: /* 0 101 101 001 */ cp1610_cmpr(cpustate, 5,1); break;
- case 0x16a: /* 0 101 101 010 */ cp1610_cmpr(cpustate, 5,2); break;
- case 0x16b: /* 0 101 101 011 */ cp1610_cmpr(cpustate, 5,3); break;
- case 0x16c: /* 0 101 101 100 */ cp1610_cmpr(cpustate, 5,4); break;
- case 0x16d: /* 0 101 101 101 */ cp1610_cmpr(cpustate, 5,5); break;
- case 0x16e: /* 0 101 101 110 */ cp1610_cmpr(cpustate, 5,6); break;
- case 0x16f: /* 0 101 101 111 */ cp1610_cmpr(cpustate, 5,7); break;
-
- case 0x170: /* 0 101 110 000 */ cp1610_cmpr(cpustate, 6,0); break;
- case 0x171: /* 0 101 110 001 */ cp1610_cmpr(cpustate, 6,1); break;
- case 0x172: /* 0 101 110 010 */ cp1610_cmpr(cpustate, 6,2); break;
- case 0x173: /* 0 101 110 011 */ cp1610_cmpr(cpustate, 6,3); break;
- case 0x174: /* 0 101 110 100 */ cp1610_cmpr(cpustate, 6,4); break;
- case 0x175: /* 0 101 110 101 */ cp1610_cmpr(cpustate, 6,5); break;
- case 0x176: /* 0 101 110 110 */ cp1610_cmpr(cpustate, 6,6); break;
- case 0x177: /* 0 101 110 111 */ cp1610_cmpr(cpustate, 6,7); break;
-
- case 0x178: /* 0 101 111 000 */ cp1610_cmpr(cpustate, 7,0); break;
- case 0x179: /* 0 101 111 001 */ cp1610_cmpr(cpustate, 7,1); break;
- case 0x17a: /* 0 101 111 010 */ cp1610_cmpr(cpustate, 7,2); break;
- case 0x17b: /* 0 101 111 011 */ cp1610_cmpr(cpustate, 7,3); break;
- case 0x17c: /* 0 101 111 100 */ cp1610_cmpr(cpustate, 7,4); break;
- case 0x17d: /* 0 101 111 101 */ cp1610_cmpr(cpustate, 7,5); break;
- case 0x17e: /* 0 101 111 110 */ cp1610_cmpr(cpustate, 7,6); break;
- case 0x17f: /* 0 101 111 111 */ cp1610_cmpr(cpustate, 7,7); break;
-
- case 0x180: /* 0 110 000 000 */ cp1610_andr(cpustate, 0,0); break;
- case 0x181: /* 0 110 000 001 */ cp1610_andr(cpustate, 0,1); break;
- case 0x182: /* 0 110 000 010 */ cp1610_andr(cpustate, 0,2); break;
- case 0x183: /* 0 110 000 011 */ cp1610_andr(cpustate, 0,3); break;
- case 0x184: /* 0 110 000 100 */ cp1610_andr(cpustate, 0,4); break;
- case 0x185: /* 0 110 000 101 */ cp1610_andr(cpustate, 0,5); break;
- case 0x186: /* 0 110 000 110 */ cp1610_andr(cpustate, 0,6); break;
- case 0x187: /* 0 110 000 111 */ cp1610_andr(cpustate, 0,7); break;
-
- case 0x188: /* 0 110 001 000 */ cp1610_andr(cpustate, 1,0); break;
- case 0x189: /* 0 110 001 001 */ cp1610_andr(cpustate, 1,1); break;
- case 0x18a: /* 0 110 001 010 */ cp1610_andr(cpustate, 1,2); break;
- case 0x18b: /* 0 110 001 011 */ cp1610_andr(cpustate, 1,3); break;
- case 0x18c: /* 0 110 001 100 */ cp1610_andr(cpustate, 1,4); break;
- case 0x18d: /* 0 110 001 101 */ cp1610_andr(cpustate, 1,5); break;
- case 0x18e: /* 0 110 001 110 */ cp1610_andr(cpustate, 1,6); break;
- case 0x18f: /* 0 110 001 111 */ cp1610_andr(cpustate, 1,7); break;
-
- case 0x190: /* 0 110 010 000 */ cp1610_andr(cpustate, 2,0); break;
- case 0x191: /* 0 110 010 001 */ cp1610_andr(cpustate, 2,1); break;
- case 0x192: /* 0 110 010 010 */ cp1610_andr(cpustate, 2,2); break;
- case 0x193: /* 0 110 010 011 */ cp1610_andr(cpustate, 2,3); break;
- case 0x194: /* 0 110 010 100 */ cp1610_andr(cpustate, 2,4); break;
- case 0x195: /* 0 110 010 101 */ cp1610_andr(cpustate, 2,5); break;
- case 0x196: /* 0 110 010 110 */ cp1610_andr(cpustate, 2,6); break;
- case 0x197: /* 0 110 010 111 */ cp1610_andr(cpustate, 2,7); break;
-
- case 0x198: /* 0 110 011 000 */ cp1610_andr(cpustate, 3,0); break;
- case 0x199: /* 0 110 011 001 */ cp1610_andr(cpustate, 3,1); break;
- case 0x19a: /* 0 110 011 010 */ cp1610_andr(cpustate, 3,2); break;
- case 0x19b: /* 0 110 011 011 */ cp1610_andr(cpustate, 3,3); break;
- case 0x19c: /* 0 110 011 100 */ cp1610_andr(cpustate, 3,4); break;
- case 0x19d: /* 0 110 011 101 */ cp1610_andr(cpustate, 3,5); break;
- case 0x19e: /* 0 110 011 110 */ cp1610_andr(cpustate, 3,6); break;
- case 0x19f: /* 0 110 011 111 */ cp1610_andr(cpustate, 3,7); break;
-
- case 0x1a0: /* 0 110 100 000 */ cp1610_andr(cpustate, 4,0); break;
- case 0x1a1: /* 0 110 100 001 */ cp1610_andr(cpustate, 4,1); break;
- case 0x1a2: /* 0 110 100 010 */ cp1610_andr(cpustate, 4,2); break;
- case 0x1a3: /* 0 110 100 011 */ cp1610_andr(cpustate, 4,3); break;
- case 0x1a4: /* 0 110 100 100 */ cp1610_andr(cpustate, 4,4); break;
- case 0x1a5: /* 0 110 100 101 */ cp1610_andr(cpustate, 4,5); break;
- case 0x1a6: /* 0 110 100 110 */ cp1610_andr(cpustate, 4,6); break;
- case 0x1a7: /* 0 110 100 111 */ cp1610_andr(cpustate, 4,7); break;
-
- case 0x1a8: /* 0 110 101 000 */ cp1610_andr(cpustate, 5,0); break;
- case 0x1a9: /* 0 110 101 001 */ cp1610_andr(cpustate, 5,1); break;
- case 0x1aa: /* 0 110 101 010 */ cp1610_andr(cpustate, 5,2); break;
- case 0x1ab: /* 0 110 101 011 */ cp1610_andr(cpustate, 5,3); break;
- case 0x1ac: /* 0 110 101 100 */ cp1610_andr(cpustate, 5,4); break;
- case 0x1ad: /* 0 110 101 101 */ cp1610_andr(cpustate, 5,5); break;
- case 0x1ae: /* 0 110 101 110 */ cp1610_andr(cpustate, 5,6); break;
- case 0x1af: /* 0 110 101 111 */ cp1610_andr(cpustate, 5,7); break;
-
- case 0x1b0: /* 0 110 110 000 */ cp1610_andr(cpustate, 6,0); break;
- case 0x1b1: /* 0 110 110 001 */ cp1610_andr(cpustate, 6,1); break;
- case 0x1b2: /* 0 110 110 010 */ cp1610_andr(cpustate, 6,2); break;
- case 0x1b3: /* 0 110 110 011 */ cp1610_andr(cpustate, 6,3); break;
- case 0x1b4: /* 0 110 110 100 */ cp1610_andr(cpustate, 6,4); break;
- case 0x1b5: /* 0 110 110 101 */ cp1610_andr(cpustate, 6,5); break;
- case 0x1b6: /* 0 110 110 110 */ cp1610_andr(cpustate, 6,6); break;
- case 0x1b7: /* 0 110 110 111 */ cp1610_andr(cpustate, 6,7); break;
-
- case 0x1b8: /* 0 110 111 000 */ cp1610_andr(cpustate, 7,0); break;
- case 0x1b9: /* 0 110 111 001 */ cp1610_andr(cpustate, 7,1); break;
- case 0x1ba: /* 0 110 111 010 */ cp1610_andr(cpustate, 7,2); break;
- case 0x1bb: /* 0 110 111 011 */ cp1610_andr(cpustate, 7,3); break;
- case 0x1bc: /* 0 110 111 100 */ cp1610_andr(cpustate, 7,4); break;
- case 0x1bd: /* 0 110 111 101 */ cp1610_andr(cpustate, 7,5); break;
- case 0x1be: /* 0 110 111 110 */ cp1610_andr(cpustate, 7,6); break;
- case 0x1bf: /* 0 110 111 111 */ cp1610_andr(cpustate, 7,7); break;
-
- case 0x1c0: /* 0 111 000 000 */ cp1610_clrr(cpustate, 0); break;
- case 0x1c1: /* 0 111 000 001 */ cp1610_xorr(cpustate, 0,1); break;
- case 0x1c2: /* 0 111 000 010 */ cp1610_xorr(cpustate, 0,2); break;
- case 0x1c3: /* 0 111 000 011 */ cp1610_xorr(cpustate, 0,3); break;
- case 0x1c4: /* 0 111 000 100 */ cp1610_xorr(cpustate, 0,4); break;
- case 0x1c5: /* 0 111 000 101 */ cp1610_xorr(cpustate, 0,5); break;
- case 0x1c6: /* 0 111 000 110 */ cp1610_xorr(cpustate, 0,6); break;
- case 0x1c7: /* 0 111 000 111 */ cp1610_xorr(cpustate, 0,7); break;
-
- case 0x1c8: /* 0 111 001 000 */ cp1610_xorr(cpustate, 1,0); break;
- case 0x1c9: /* 0 111 001 001 */ cp1610_clrr(cpustate, 1); break;
- case 0x1ca: /* 0 111 001 010 */ cp1610_xorr(cpustate, 1,2); break;
- case 0x1cb: /* 0 111 001 011 */ cp1610_xorr(cpustate, 1,3); break;
- case 0x1cc: /* 0 111 001 100 */ cp1610_xorr(cpustate, 1,4); break;
- case 0x1cd: /* 0 111 001 101 */ cp1610_xorr(cpustate, 1,5); break;
- case 0x1ce: /* 0 111 001 110 */ cp1610_xorr(cpustate, 1,6); break;
- case 0x1cf: /* 0 111 001 111 */ cp1610_xorr(cpustate, 1,7); break;
-
- case 0x1d0: /* 0 111 010 000 */ cp1610_xorr(cpustate, 2,0); break;
- case 0x1d1: /* 0 111 010 001 */ cp1610_xorr(cpustate, 2,1); break;
- case 0x1d2: /* 0 111 010 010 */ cp1610_clrr(cpustate, 2); break;
- case 0x1d3: /* 0 111 010 011 */ cp1610_xorr(cpustate, 2,3); break;
- case 0x1d4: /* 0 111 010 100 */ cp1610_xorr(cpustate, 2,4); break;
- case 0x1d5: /* 0 111 010 101 */ cp1610_xorr(cpustate, 2,5); break;
- case 0x1d6: /* 0 111 010 110 */ cp1610_xorr(cpustate, 2,6); break;
- case 0x1d7: /* 0 111 010 111 */ cp1610_xorr(cpustate, 2,7); break;
-
- case 0x1d8: /* 0 111 011 000 */ cp1610_xorr(cpustate, 3,0); break;
- case 0x1d9: /* 0 111 011 001 */ cp1610_xorr(cpustate, 3,1); break;
- case 0x1da: /* 0 111 011 010 */ cp1610_xorr(cpustate, 3,2); break;
- case 0x1db: /* 0 111 011 011 */ cp1610_clrr(cpustate, 3); break;
- case 0x1dc: /* 0 111 011 100 */ cp1610_xorr(cpustate, 3,4); break;
- case 0x1dd: /* 0 111 011 101 */ cp1610_xorr(cpustate, 3,5); break;
- case 0x1de: /* 0 111 011 110 */ cp1610_xorr(cpustate, 3,6); break;
- case 0x1df: /* 0 111 011 111 */ cp1610_xorr(cpustate, 3,7); break;
-
- case 0x1e0: /* 0 111 100 000 */ cp1610_xorr(cpustate, 4,0); break;
- case 0x1e1: /* 0 111 100 001 */ cp1610_xorr(cpustate, 4,1); break;
- case 0x1e2: /* 0 111 100 010 */ cp1610_xorr(cpustate, 4,2); break;
- case 0x1e3: /* 0 111 100 011 */ cp1610_xorr(cpustate, 4,3); break;
- case 0x1e4: /* 0 111 100 100 */ cp1610_clrr(cpustate, 4); break;
- case 0x1e5: /* 0 111 100 101 */ cp1610_xorr(cpustate, 4,5); break;
- case 0x1e6: /* 0 111 100 110 */ cp1610_xorr(cpustate, 4,6); break;
- case 0x1e7: /* 0 111 100 111 */ cp1610_xorr(cpustate, 4,7); break;
-
- case 0x1e8: /* 0 111 101 000 */ cp1610_xorr(cpustate, 5,0); break;
- case 0x1e9: /* 0 111 101 001 */ cp1610_xorr(cpustate, 5,1); break;
- case 0x1ea: /* 0 111 101 010 */ cp1610_xorr(cpustate, 5,2); break;
- case 0x1eb: /* 0 111 101 011 */ cp1610_xorr(cpustate, 5,3); break;
- case 0x1ec: /* 0 111 101 100 */ cp1610_xorr(cpustate, 5,4); break;
- case 0x1ed: /* 0 111 101 101 */ cp1610_clrr(cpustate, 5); break;
- case 0x1ee: /* 0 111 101 110 */ cp1610_xorr(cpustate, 5,6); break;
- case 0x1ef: /* 0 111 101 111 */ cp1610_xorr(cpustate, 5,7); break;
-
- case 0x1f0: /* 0 111 110 000 */ cp1610_xorr(cpustate, 6,0); break;
- case 0x1f1: /* 0 111 110 001 */ cp1610_xorr(cpustate, 6,1); break;
- case 0x1f2: /* 0 111 110 010 */ cp1610_xorr(cpustate, 6,2); break;
- case 0x1f3: /* 0 111 110 011 */ cp1610_xorr(cpustate, 6,3); break;
- case 0x1f4: /* 0 111 110 100 */ cp1610_xorr(cpustate, 6,4); break;
- case 0x1f5: /* 0 111 110 101 */ cp1610_xorr(cpustate, 6,5); break;
- case 0x1f6: /* 0 111 110 110 */ cp1610_clrr(cpustate, 6); break;
- case 0x1f7: /* 0 111 110 111 */ cp1610_xorr(cpustate, 6,7); break;
-
- case 0x1f8: /* 0 111 111 000 */ cp1610_xorr(cpustate, 7,0); break;
- case 0x1f9: /* 0 111 111 001 */ cp1610_xorr(cpustate, 7,1); break;
- case 0x1fa: /* 0 111 111 010 */ cp1610_xorr(cpustate, 7,2); break;
- case 0x1fb: /* 0 111 111 011 */ cp1610_xorr(cpustate, 7,3); break;
- case 0x1fc: /* 0 111 111 100 */ cp1610_xorr(cpustate, 7,4); break;
- case 0x1fd: /* 0 111 111 101 */ cp1610_xorr(cpustate, 7,5); break;
- case 0x1fe: /* 0 111 111 110 */ cp1610_xorr(cpustate, 7,6); break;
- case 0x1ff: /* 0 110 111 111 */ cp1610_clrr(cpustate, 7); break;
-
- case 0x200: /* 1 000 000 000 */ cp1610_b(cpustate, 0); break;
- case 0x201: /* 1 000 000 001 */ cp1610_bc(cpustate, 0); break; /* aka BLGE */
- case 0x202: /* 1 000 000 010 */ cp1610_bov(cpustate, 0); break;
- case 0x203: /* 1 000 000 011 */ cp1610_bpl(cpustate, 0); break;
- case 0x204: /* 1 000 000 100 */ cp1610_bze(cpustate, 0); break; /* aka BEQ */
- case 0x205: /* 1 000 000 101 */ cp1610_blt(cpustate, 0); break;
- case 0x206: /* 1 000 000 110 */ cp1610_ble(cpustate, 0); break;
- case 0x207: /* 1 000 000 111 */ cp1610_busc(cpustate, 0); break;
-
- case 0x208: /* 1 000 001 000 */ cp1610_nopp(cpustate, 0); break;
- case 0x209: /* 1 000 001 001 */ cp1610_bnc(cpustate, 0); break; /* aka BLLT */
- case 0x20a: /* 1 000 001 010 */ cp1610_bnov(cpustate, 0); break;
- case 0x20b: /* 1 000 001 011 */ cp1610_bmi(cpustate, 0); break;
- case 0x20c: /* 1 000 001 100 */ cp1610_bnze(cpustate, 0); break; /* aka BNEQ */
- case 0x20d: /* 1 000 001 101 */ cp1610_bge(cpustate, 0); break;
- case 0x20e: /* 1 000 001 110 */ cp1610_bgt(cpustate, 0); break;
- case 0x20f: /* 1 000 001 111 */ cp1610_besc(cpustate, 0); break;
-
- case 0x210: /* 1 000 010 000 */ cp1610_bext(cpustate, 0,0); break;
- case 0x211: /* 1 000 010 001 */ cp1610_bext(cpustate, 1,0); break;
- case 0x212: /* 1 000 010 010 */ cp1610_bext(cpustate, 2,0); break;
- case 0x213: /* 1 000 010 011 */ cp1610_bext(cpustate, 3,0); break;
- case 0x214: /* 1 000 010 100 */ cp1610_bext(cpustate, 4,0); break;
- case 0x215: /* 1 000 010 101 */ cp1610_bext(cpustate, 5,0); break;
- case 0x216: /* 1 000 010 110 */ cp1610_bext(cpustate, 6,0); break;
- case 0x217: /* 1 000 010 111 */ cp1610_bext(cpustate, 7,0); break;
-
- case 0x218: /* 1 000 011 000 */ cp1610_bext(cpustate, 8,0); break;
- case 0x219: /* 1 000 011 001 */ cp1610_bext(cpustate, 9,0); break;
- case 0x21a: /* 1 000 011 010 */ cp1610_bext(cpustate, 10,0); break;
- case 0x21b: /* 1 000 011 011 */ cp1610_bext(cpustate, 11,0); break;
- case 0x21c: /* 1 000 011 100 */ cp1610_bext(cpustate, 12,0); break;
- case 0x21d: /* 1 000 011 101 */ cp1610_bext(cpustate, 13,0); break;
- case 0x21e: /* 1 000 011 110 */ cp1610_bext(cpustate, 14,0); break;
- case 0x21f: /* 1 000 011 111 */ cp1610_bext(cpustate, 15,0); break;
-
- case 0x220: /* 1 000 100 000 */ cp1610_b(cpustate, 0xffff); break;
- case 0x221: /* 1 000 100 001 */ cp1610_bc(cpustate, 0xffff); break; /* aka BLGE */
- case 0x222: /* 1 000 100 010 */ cp1610_bov(cpustate, 0xffff); break;
- case 0x223: /* 1 000 100 011 */ cp1610_bpl(cpustate, 0xffff); break;
- case 0x224: /* 1 000 100 100 */ cp1610_bze(cpustate, 0xffff); break; /* aka BEQ */
- case 0x225: /* 1 000 100 101 */ cp1610_blt(cpustate, 0xffff); break;
- case 0x226: /* 1 000 100 110 */ cp1610_ble(cpustate, 0xffff); break;
- case 0x227: /* 1 000 100 111 */ cp1610_busc(cpustate, 0xffff); break;
-
- case 0x228: /* 1 000 101 000 */ cp1610_nopp(cpustate, 0xffff); break;
- case 0x229: /* 1 000 101 001 */ cp1610_bnc(cpustate, 0xffff); break; /* aka BLLT */
- case 0x22a: /* 1 000 101 010 */ cp1610_bnov(cpustate, 0xffff); break;
- case 0x22b: /* 1 000 101 011 */ cp1610_bmi(cpustate, 0xffff); break;
- case 0x22c: /* 1 000 101 100 */ cp1610_bnze(cpustate, 0xffff); break; /* aka BNEQ */
- case 0x22d: /* 1 000 101 101 */ cp1610_bge(cpustate, 0xffff); break;
- case 0x22e: /* 1 000 101 110 */ cp1610_bgt(cpustate, 0xffff); break;
- case 0x22f: /* 1 000 101 111 */ cp1610_besc(cpustate, 0xffff); break;
-
- case 0x230: /* 1 000 110 000 */ cp1610_bext(cpustate, 0,0xffff); break;
- case 0x231: /* 1 000 110 001 */ cp1610_bext(cpustate, 1,0xffff); break;
- case 0x232: /* 1 000 110 010 */ cp1610_bext(cpustate, 2,0xffff); break;
- case 0x233: /* 1 000 110 011 */ cp1610_bext(cpustate, 3,0xffff); break;
- case 0x234: /* 1 000 110 100 */ cp1610_bext(cpustate, 4,0xffff); break;
- case 0x235: /* 1 000 110 101 */ cp1610_bext(cpustate, 5,0xffff); break;
- case 0x236: /* 1 000 110 110 */ cp1610_bext(cpustate, 6,0xffff); break;
- case 0x237: /* 1 000 110 111 */ cp1610_bext(cpustate, 7,0xffff); break;
-
- case 0x238: /* 1 000 111 000 */ cp1610_bext(cpustate, 8,0xffff); break;
- case 0x239: /* 1 000 111 001 */ cp1610_bext(cpustate, 9,0xffff); break;
- case 0x23a: /* 1 000 111 010 */ cp1610_bext(cpustate, 10,0xffff); break;
- case 0x23b: /* 1 000 111 011 */ cp1610_bext(cpustate, 11,0xffff); break;
- case 0x23c: /* 1 000 111 100 */ cp1610_bext(cpustate, 12,0xffff); break;
- case 0x23d: /* 1 000 111 101 */ cp1610_bext(cpustate, 13,0xffff); break;
- case 0x23e: /* 1 000 111 110 */ cp1610_bext(cpustate, 14,0xffff); break;
- case 0x23f: /* 1 000 111 111 */ cp1610_bext(cpustate, 15,0xffff); break;
-
- case 0x240: /* 1 001 000 000 */ cp1610_mvo(cpustate, 0); break;
- case 0x241: /* 1 001 000 001 */ cp1610_mvo(cpustate, 1); break;
- case 0x242: /* 1 001 000 010 */ cp1610_mvo(cpustate, 2); break;
- case 0x243: /* 1 001 000 011 */ cp1610_mvo(cpustate, 3); break;
- case 0x244: /* 1 001 000 100 */ cp1610_mvo(cpustate, 4); break;
- case 0x245: /* 1 001 000 101 */ cp1610_mvo(cpustate, 5); break;
- case 0x246: /* 1 001 000 110 */ cp1610_mvo(cpustate, 6); break;
- case 0x247: /* 1 001 000 111 */ cp1610_mvo(cpustate, 7); break;
-
- case 0x248: /* 1 001 001 000 */ cp1610_mvoat(cpustate, 0,1); break;
- case 0x249: /* 1 001 001 001 */ cp1610_mvoat(cpustate, 1,1); break;
- case 0x24a: /* 1 001 001 010 */ cp1610_mvoat(cpustate, 2,1); break;
- case 0x24b: /* 1 001 001 011 */ cp1610_mvoat(cpustate, 3,1); break;
- case 0x24c: /* 1 001 001 100 */ cp1610_mvoat(cpustate, 4,1); break;
- case 0x24d: /* 1 001 001 101 */ cp1610_mvoat(cpustate, 5,1); break;
- case 0x24e: /* 1 001 001 110 */ cp1610_mvoat(cpustate, 6,1); break;
- case 0x24f: /* 1 001 001 111 */ cp1610_mvoat(cpustate, 7,1); break;
-
- case 0x250: /* 1 001 010 000 */ cp1610_mvoat(cpustate, 0,2); break;
- case 0x251: /* 1 001 010 001 */ cp1610_mvoat(cpustate, 1,2); break;
- case 0x252: /* 1 001 010 010 */ cp1610_mvoat(cpustate, 2,2); break;
- case 0x253: /* 1 001 010 011 */ cp1610_mvoat(cpustate, 3,2); break;
- case 0x254: /* 1 001 010 100 */ cp1610_mvoat(cpustate, 4,2); break;
- case 0x255: /* 1 001 010 101 */ cp1610_mvoat(cpustate, 5,2); break;
- case 0x256: /* 1 001 010 110 */ cp1610_mvoat(cpustate, 6,2); break;
- case 0x257: /* 1 001 010 111 */ cp1610_mvoat(cpustate, 7,2); break;
-
- case 0x258: /* 1 001 011 000 */ cp1610_mvoat(cpustate, 0,3); break;
- case 0x259: /* 1 001 011 001 */ cp1610_mvoat(cpustate, 1,3); break;
- case 0x25a: /* 1 001 011 010 */ cp1610_mvoat(cpustate, 2,3); break;
- case 0x25b: /* 1 001 011 011 */ cp1610_mvoat(cpustate, 3,3); break;
- case 0x25c: /* 1 001 011 100 */ cp1610_mvoat(cpustate, 4,3); break;
- case 0x25d: /* 1 001 011 101 */ cp1610_mvoat(cpustate, 5,3); break;
- case 0x25e: /* 1 001 011 110 */ cp1610_mvoat(cpustate, 6,3); break;
- case 0x25f: /* 1 001 011 111 */ cp1610_mvoat(cpustate, 7,3); break;
-
- case 0x260: /* 1 001 100 000 */ cp1610_mvoat_i(cpustate, 0,4); break;
- case 0x261: /* 1 001 100 001 */ cp1610_mvoat_i(cpustate, 1,4); break;
- case 0x262: /* 1 001 100 010 */ cp1610_mvoat_i(cpustate, 2,4); break;
- case 0x263: /* 1 001 100 011 */ cp1610_mvoat_i(cpustate, 3,4); break;
- case 0x264: /* 1 001 100 100 */ cp1610_mvoat_i(cpustate, 4,4); break;
- case 0x265: /* 1 001 100 101 */ cp1610_mvoat_i(cpustate, 5,4); break;
- case 0x266: /* 1 001 100 110 */ cp1610_mvoat_i(cpustate, 6,4); break;
- case 0x267: /* 1 001 100 111 */ cp1610_mvoat_i(cpustate, 7,4); break;
-
- case 0x268: /* 1 001 101 000 */ cp1610_mvoat_i(cpustate, 0,5); break;
- case 0x269: /* 1 001 101 001 */ cp1610_mvoat_i(cpustate, 1,5); break;
- case 0x26a: /* 1 001 101 010 */ cp1610_mvoat_i(cpustate, 2,5); break;
- case 0x26b: /* 1 001 101 011 */ cp1610_mvoat_i(cpustate, 3,5); break;
- case 0x26c: /* 1 001 101 100 */ cp1610_mvoat_i(cpustate, 4,5); break;
- case 0x26d: /* 1 001 101 101 */ cp1610_mvoat_i(cpustate, 5,5); break;
- case 0x26e: /* 1 001 101 110 */ cp1610_mvoat_i(cpustate, 6,5); break;
- case 0x26f: /* 1 001 101 111 */ cp1610_mvoat_i(cpustate, 7,5); break;
-
- case 0x270: /* 1 001 110 000 */ cp1610_mvoat_i(cpustate, 0,6); break; /* pshr */
- case 0x271: /* 1 001 110 001 */ cp1610_mvoat_i(cpustate, 1,6); break; /* pshr */
- case 0x272: /* 1 001 110 010 */ cp1610_mvoat_i(cpustate, 2,6); break; /* pshr */
- case 0x273: /* 1 001 110 011 */ cp1610_mvoat_i(cpustate, 3,6); break; /* pshr */
- case 0x274: /* 1 001 110 100 */ cp1610_mvoat_i(cpustate, 4,6); break; /* pshr */
- case 0x275: /* 1 001 110 101 */ cp1610_mvoat_i(cpustate, 5,6); break; /* pshr */
- case 0x276: /* 1 001 110 110 */ cp1610_mvoat_i(cpustate, 6,6); break; /* pshr */
- case 0x277: /* 1 001 110 111 */ cp1610_mvoat_i(cpustate, 7,6); break; /* pshr */
-
- case 0x278: /* 1 001 111 000 */ cp1610_mvoi(cpustate, 0); break;
- case 0x279: /* 1 001 111 001 */ cp1610_mvoi(cpustate, 1); break;
- case 0x27a: /* 1 001 111 010 */ cp1610_mvoi(cpustate, 2); break;
- case 0x27b: /* 1 001 111 011 */ cp1610_mvoi(cpustate, 3); break;
- case 0x27c: /* 1 001 111 100 */ cp1610_mvoi(cpustate, 4); break;
- case 0x27d: /* 1 001 111 101 */ cp1610_mvoi(cpustate, 5); break;
- case 0x27e: /* 1 001 111 110 */ cp1610_mvoi(cpustate, 6); break;
- case 0x27f: /* 1 001 111 111 */ cp1610_mvoi(cpustate, 7); break;
-
- case 0x280: /* 1 010 000 000 */ cp1610_mvi(cpustate, 0); break;
- case 0x281: /* 1 010 000 001 */ cp1610_mvi(cpustate, 1); break;
- case 0x282: /* 1 010 000 010 */ cp1610_mvi(cpustate, 2); break;
- case 0x283: /* 1 010 000 011 */ cp1610_mvi(cpustate, 3); break;
- case 0x284: /* 1 010 000 100 */ cp1610_mvi(cpustate, 4); break;
- case 0x285: /* 1 010 000 101 */ cp1610_mvi(cpustate, 5); break;
- case 0x286: /* 1 010 000 110 */ cp1610_mvi(cpustate, 6); break;
- case 0x287: /* 1 010 000 111 */ cp1610_mvi(cpustate, 7); break;
-
- case 0x288: /* 1 010 001 000 */ cp1610_mviat(cpustate, 1,0); break;
- case 0x289: /* 1 010 001 001 */ cp1610_mviat(cpustate, 1,1); break;
- case 0x28a: /* 1 010 001 010 */ cp1610_mviat(cpustate, 1,2); break;
- case 0x28b: /* 1 010 001 011 */ cp1610_mviat(cpustate, 1,3); break;
- case 0x28c: /* 1 010 001 100 */ cp1610_mviat(cpustate, 1,4); break;
- case 0x28d: /* 1 010 001 101 */ cp1610_mviat(cpustate, 1,5); break;
- case 0x28e: /* 1 010 001 110 */ cp1610_mviat(cpustate, 1,6); break;
- case 0x28f: /* 1 010 001 111 */ cp1610_mviat(cpustate, 1,7); break;
-
- case 0x290: /* 1 010 010 000 */ cp1610_mviat(cpustate, 2,0); break;
- case 0x291: /* 1 010 010 001 */ cp1610_mviat(cpustate, 2,1); break;
- case 0x292: /* 1 010 010 010 */ cp1610_mviat(cpustate, 2,2); break;
- case 0x293: /* 1 010 010 011 */ cp1610_mviat(cpustate, 2,3); break;
- case 0x294: /* 1 010 010 100 */ cp1610_mviat(cpustate, 2,4); break;
- case 0x295: /* 1 010 010 101 */ cp1610_mviat(cpustate, 2,5); break;
- case 0x296: /* 1 010 010 110 */ cp1610_mviat(cpustate, 2,6); break;
- case 0x297: /* 1 010 010 111 */ cp1610_mviat(cpustate, 2,7); break;
-
- case 0x298: /* 1 010 011 000 */ cp1610_mviat(cpustate, 3,0); break;
- case 0x299: /* 1 010 011 001 */ cp1610_mviat(cpustate, 3,1); break;
- case 0x29a: /* 1 010 011 010 */ cp1610_mviat(cpustate, 3,2); break;
- case 0x29b: /* 1 010 011 011 */ cp1610_mviat(cpustate, 3,3); break;
- case 0x29c: /* 1 010 011 100 */ cp1610_mviat(cpustate, 3,4); break;
- case 0x29d: /* 1 010 011 101 */ cp1610_mviat(cpustate, 3,5); break;
- case 0x29e: /* 1 010 011 110 */ cp1610_mviat(cpustate, 3,6); break;
- case 0x29f: /* 1 010 011 111 */ cp1610_mviat(cpustate, 3,7); break;
-
- case 0x2a0: /* 1 010 100 000 */ cp1610_mviat_i(cpustate, 4,0); break;
- case 0x2a1: /* 1 010 100 001 */ cp1610_mviat_i(cpustate, 4,1); break;
- case 0x2a2: /* 1 010 100 010 */ cp1610_mviat_i(cpustate, 4,2); break;
- case 0x2a3: /* 1 010 100 011 */ cp1610_mviat_i(cpustate, 4,3); break;
- case 0x2a4: /* 1 010 100 100 */ cp1610_mviat_i(cpustate, 4,4); break;
- case 0x2a5: /* 1 010 100 101 */ cp1610_mviat_i(cpustate, 4,5); break;
- case 0x2a6: /* 1 010 100 110 */ cp1610_mviat_i(cpustate, 4,6); break;
- case 0x2a7: /* 1 010 100 111 */ cp1610_mviat_i(cpustate, 4,7); break;
-
- case 0x2a8: /* 1 010 101 000 */ cp1610_mviat_i(cpustate, 5,0); break;
- case 0x2a9: /* 1 010 101 001 */ cp1610_mviat_i(cpustate, 5,1); break;
- case 0x2aa: /* 1 010 101 010 */ cp1610_mviat_i(cpustate, 5,2); break;
- case 0x2ab: /* 1 010 101 011 */ cp1610_mviat_i(cpustate, 5,3); break;
- case 0x2ac: /* 1 010 101 100 */ cp1610_mviat_i(cpustate, 5,4); break;
- case 0x2ad: /* 1 010 101 101 */ cp1610_mviat_i(cpustate, 5,5); break;
- case 0x2ae: /* 1 010 101 110 */ cp1610_mviat_i(cpustate, 5,6); break;
- case 0x2af: /* 1 010 101 111 */ cp1610_mviat_i(cpustate, 5,7); break;
-
- case 0x2b0: /* 1 010 110 000 */ cp1610_pulr(cpustate, 0); break;
- case 0x2b1: /* 1 010 110 001 */ cp1610_pulr(cpustate, 1); break;
- case 0x2b2: /* 1 010 110 010 */ cp1610_pulr(cpustate, 2); break;
- case 0x2b3: /* 1 010 110 011 */ cp1610_pulr(cpustate, 3); break;
- case 0x2b4: /* 1 010 110 100 */ cp1610_pulr(cpustate, 4); break;
- case 0x2b5: /* 1 010 110 101 */ cp1610_pulr(cpustate, 5); break;
- case 0x2b6: /* 1 010 110 110 */ cp1610_pulr(cpustate, 6); break;
- case 0x2b7: /* 1 010 110 111 */ cp1610_pulr(cpustate, 7); break;
-
- case 0x2b8: /* 1 010 111 000 */ cp1610_mvii(cpustate, 0); break;
- case 0x2b9: /* 1 010 111 001 */ cp1610_mvii(cpustate, 1); break;
- case 0x2ba: /* 1 010 111 010 */ cp1610_mvii(cpustate, 2); break;
- case 0x2bb: /* 1 010 111 011 */ cp1610_mvii(cpustate, 3); break;
- case 0x2bc: /* 1 010 111 100 */ cp1610_mvii(cpustate, 4); break;
- case 0x2bd: /* 1 010 111 101 */ cp1610_mvii(cpustate, 5); break;
- case 0x2be: /* 1 010 111 110 */ cp1610_mvii(cpustate, 6); break;
- case 0x2bf: /* 1 010 111 111 */ cp1610_mvii(cpustate, 7); break;
-
- case 0x2c0: /* 1 011 000 000 */ cp1610_add(cpustate, 0); break;
- case 0x2c1: /* 1 011 000 001 */ cp1610_add(cpustate, 1); break;
- case 0x2c2: /* 1 011 000 010 */ cp1610_add(cpustate, 2); break;
- case 0x2c3: /* 1 011 000 011 */ cp1610_add(cpustate, 3); break;
- case 0x2c4: /* 1 011 000 100 */ cp1610_add(cpustate, 4); break;
- case 0x2c5: /* 1 011 000 101 */ cp1610_add(cpustate, 5); break;
- case 0x2c6: /* 1 011 000 110 */ cp1610_add(cpustate, 6); break;
- case 0x2c7: /* 1 011 000 111 */ cp1610_add(cpustate, 7); break;
-
- case 0x2c8: /* 1 011 001 000 */ cp1610_addat(cpustate, 1,0); break;
- case 0x2c9: /* 1 011 001 001 */ cp1610_addat(cpustate, 1,1); break;
- case 0x2ca: /* 1 011 001 010 */ cp1610_addat(cpustate, 1,2); break;
- case 0x2cb: /* 1 011 001 011 */ cp1610_addat(cpustate, 1,3); break;
- case 0x2cc: /* 1 011 001 100 */ cp1610_addat(cpustate, 1,4); break;
- case 0x2cd: /* 1 011 001 101 */ cp1610_addat(cpustate, 1,5); break;
- case 0x2ce: /* 1 011 001 110 */ cp1610_addat(cpustate, 1,6); break;
- case 0x2cf: /* 1 011 001 111 */ cp1610_addat(cpustate, 1,7); break;
-
- case 0x2d0: /* 1 011 010 000 */ cp1610_addat(cpustate, 2,0); break;
- case 0x2d1: /* 1 011 010 001 */ cp1610_addat(cpustate, 2,1); break;
- case 0x2d2: /* 1 011 010 010 */ cp1610_addat(cpustate, 2,2); break;
- case 0x2d3: /* 1 011 010 011 */ cp1610_addat(cpustate, 2,3); break;
- case 0x2d4: /* 1 011 010 100 */ cp1610_addat(cpustate, 2,4); break;
- case 0x2d5: /* 1 011 010 101 */ cp1610_addat(cpustate, 2,5); break;
- case 0x2d6: /* 1 011 010 110 */ cp1610_addat(cpustate, 2,6); break;
- case 0x2d7: /* 1 011 010 111 */ cp1610_addat(cpustate, 2,7); break;
-
- case 0x2d8: /* 1 011 011 000 */ cp1610_addat(cpustate, 3,0); break;
- case 0x2d9: /* 1 011 011 001 */ cp1610_addat(cpustate, 3,1); break;
- case 0x2da: /* 1 011 011 010 */ cp1610_addat(cpustate, 3,2); break;
- case 0x2db: /* 1 011 011 011 */ cp1610_addat(cpustate, 3,3); break;
- case 0x2dc: /* 1 011 011 100 */ cp1610_addat(cpustate, 3,4); break;
- case 0x2dd: /* 1 011 011 101 */ cp1610_addat(cpustate, 3,5); break;
- case 0x2de: /* 1 011 011 110 */ cp1610_addat(cpustate, 3,6); break;
- case 0x2df: /* 1 011 011 111 */ cp1610_addat(cpustate, 3,7); break;
-
- case 0x2e0: /* 1 011 100 000 */ cp1610_addat_i(cpustate, 4,0); break;
- case 0x2e1: /* 1 011 100 001 */ cp1610_addat_i(cpustate, 4,1); break;
- case 0x2e2: /* 1 011 100 010 */ cp1610_addat_i(cpustate, 4,2); break;
- case 0x2e3: /* 1 011 100 011 */ cp1610_addat_i(cpustate, 4,3); break;
- case 0x2e4: /* 1 011 100 100 */ cp1610_addat_i(cpustate, 4,4); break;
- case 0x2e5: /* 1 011 100 101 */ cp1610_addat_i(cpustate, 4,5); break;
- case 0x2e6: /* 1 011 100 110 */ cp1610_addat_i(cpustate, 4,6); break;
- case 0x2e7: /* 1 011 100 111 */ cp1610_addat_i(cpustate, 4,7); break;
-
- case 0x2e8: /* 1 011 101 000 */ cp1610_addat_i(cpustate, 5,0); break;
- case 0x2e9: /* 1 011 101 001 */ cp1610_addat_i(cpustate, 5,1); break;
- case 0x2ea: /* 1 011 101 010 */ cp1610_addat_i(cpustate, 5,2); break;
- case 0x2eb: /* 1 011 101 011 */ cp1610_addat_i(cpustate, 5,3); break;
- case 0x2ec: /* 1 011 101 100 */ cp1610_addat_i(cpustate, 5,4); break;
- case 0x2ed: /* 1 011 101 101 */ cp1610_addat_i(cpustate, 5,5); break;
- case 0x2ee: /* 1 011 101 110 */ cp1610_addat_i(cpustate, 5,6); break;
- case 0x2ef: /* 1 011 101 111 */ cp1610_addat_i(cpustate, 5,7); break;
-
- case 0x2f0: /* 1 011 110 000 */ cp1610_addat_d(cpustate, 6,0); break;
- case 0x2f1: /* 1 011 110 001 */ cp1610_addat_d(cpustate, 6,1); break;
- case 0x2f2: /* 1 011 110 010 */ cp1610_addat_d(cpustate, 6,2); break;
- case 0x2f3: /* 1 011 110 011 */ cp1610_addat_d(cpustate, 6,3); break;
- case 0x2f4: /* 1 011 110 100 */ cp1610_addat_d(cpustate, 6,4); break;
- case 0x2f5: /* 1 011 110 101 */ cp1610_addat_d(cpustate, 6,5); break;
- case 0x2f6: /* 1 011 110 110 */ cp1610_addat_d(cpustate, 6,6); break;
- case 0x2f7: /* 1 011 110 111 */ cp1610_addat_d(cpustate, 6,7); break;
-
- case 0x2f8: /* 1 011 111 000 */ cp1610_addi(cpustate, 0); break;
- case 0x2f9: /* 1 011 111 001 */ cp1610_addi(cpustate, 1); break;
- case 0x2fa: /* 1 011 111 010 */ cp1610_addi(cpustate, 2); break;
- case 0x2fb: /* 1 011 111 011 */ cp1610_addi(cpustate, 3); break;
- case 0x2fc: /* 1 011 111 100 */ cp1610_addi(cpustate, 4); break;
- case 0x2fd: /* 1 011 111 101 */ cp1610_addi(cpustate, 5); break;
- case 0x2fe: /* 1 011 111 110 */ cp1610_addi(cpustate, 6); break;
- case 0x2ff: /* 1 011 111 111 */ cp1610_addi(cpustate, 7); break;
-
- case 0x300: /* 1 100 000 000 */ cp1610_sub(cpustate, 0); break;
- case 0x301: /* 1 100 000 001 */ cp1610_sub(cpustate, 1); break;
- case 0x302: /* 1 100 000 010 */ cp1610_sub(cpustate, 2); break;
- case 0x303: /* 1 100 000 011 */ cp1610_sub(cpustate, 3); break;
- case 0x304: /* 1 100 000 100 */ cp1610_sub(cpustate, 4); break;
- case 0x305: /* 1 100 000 101 */ cp1610_sub(cpustate, 5); break;
- case 0x306: /* 1 100 000 110 */ cp1610_sub(cpustate, 6); break;
- case 0x307: /* 1 100 000 111 */ cp1610_sub(cpustate, 7); break;
-
- case 0x308: /* 1 100 001 000 */ cp1610_subat(cpustate, 1,0); break;
- case 0x309: /* 1 100 001 001 */ cp1610_subat(cpustate, 1,1); break;
- case 0x30a: /* 1 100 001 010 */ cp1610_subat(cpustate, 1,2); break;
- case 0x30b: /* 1 100 001 011 */ cp1610_subat(cpustate, 1,3); break;
- case 0x30c: /* 1 100 001 100 */ cp1610_subat(cpustate, 1,4); break;
- case 0x30d: /* 1 100 001 101 */ cp1610_subat(cpustate, 1,5); break;
- case 0x30e: /* 1 100 001 110 */ cp1610_subat(cpustate, 1,6); break;
- case 0x30f: /* 1 100 001 111 */ cp1610_subat(cpustate, 1,7); break;
-
- case 0x310: /* 1 100 010 000 */ cp1610_subat(cpustate, 2,0); break;
- case 0x311: /* 1 100 010 001 */ cp1610_subat(cpustate, 2,1); break;
- case 0x312: /* 1 100 010 010 */ cp1610_subat(cpustate, 2,2); break;
- case 0x313: /* 1 100 010 011 */ cp1610_subat(cpustate, 2,3); break;
- case 0x314: /* 1 100 010 100 */ cp1610_subat(cpustate, 2,4); break;
- case 0x315: /* 1 100 010 101 */ cp1610_subat(cpustate, 2,5); break;
- case 0x316: /* 1 100 010 110 */ cp1610_subat(cpustate, 2,6); break;
- case 0x317: /* 1 100 010 111 */ cp1610_subat(cpustate, 2,7); break;
-
- case 0x318: /* 1 100 011 000 */ cp1610_subat(cpustate, 3,0); break;
- case 0x319: /* 1 100 011 001 */ cp1610_subat(cpustate, 3,1); break;
- case 0x31a: /* 1 100 011 010 */ cp1610_subat(cpustate, 3,2); break;
- case 0x31b: /* 1 100 011 011 */ cp1610_subat(cpustate, 3,3); break;
- case 0x31c: /* 1 100 011 100 */ cp1610_subat(cpustate, 3,4); break;
- case 0x31d: /* 1 100 011 101 */ cp1610_subat(cpustate, 3,5); break;
- case 0x31e: /* 1 100 011 110 */ cp1610_subat(cpustate, 3,6); break;
- case 0x31f: /* 1 100 011 111 */ cp1610_subat(cpustate, 3,7); break;
-
- case 0x320: /* 1 100 100 000 */ cp1610_subat_i(cpustate, 4,0); break;
- case 0x321: /* 1 100 100 001 */ cp1610_subat_i(cpustate, 4,1); break;
- case 0x322: /* 1 100 100 010 */ cp1610_subat_i(cpustate, 4,2); break;
- case 0x323: /* 1 100 100 011 */ cp1610_subat_i(cpustate, 4,3); break;
- case 0x324: /* 1 100 100 100 */ cp1610_subat_i(cpustate, 4,4); break;
- case 0x325: /* 1 100 100 101 */ cp1610_subat_i(cpustate, 4,5); break;
- case 0x326: /* 1 100 100 110 */ cp1610_subat_i(cpustate, 4,6); break;
- case 0x327: /* 1 100 100 111 */ cp1610_subat_i(cpustate, 4,7); break;
-
- case 0x328: /* 1 100 101 000 */ cp1610_subat_i(cpustate, 5,0); break;
- case 0x329: /* 1 100 101 001 */ cp1610_subat_i(cpustate, 5,1); break;
- case 0x32a: /* 1 100 101 010 */ cp1610_subat_i(cpustate, 5,2); break;
- case 0x32b: /* 1 100 101 011 */ cp1610_subat_i(cpustate, 5,3); break;
- case 0x32c: /* 1 100 101 100 */ cp1610_subat_i(cpustate, 5,4); break;
- case 0x32d: /* 1 100 101 101 */ cp1610_subat_i(cpustate, 5,5); break;
- case 0x32e: /* 1 100 101 110 */ cp1610_subat_i(cpustate, 5,6); break;
- case 0x32f: /* 1 100 101 111 */ cp1610_subat_i(cpustate, 5,7); break;
-
- case 0x330: /* 1 100 110 000 */ cp1610_subat_d(cpustate, 6,0); break;
- case 0x331: /* 1 100 110 001 */ cp1610_subat_d(cpustate, 6,1); break;
- case 0x332: /* 1 100 110 010 */ cp1610_subat_d(cpustate, 6,2); break;
- case 0x333: /* 1 100 110 011 */ cp1610_subat_d(cpustate, 6,3); break;
- case 0x334: /* 1 100 110 100 */ cp1610_subat_d(cpustate, 6,4); break;
- case 0x335: /* 1 100 110 101 */ cp1610_subat_d(cpustate, 6,5); break;
- case 0x336: /* 1 100 110 110 */ cp1610_subat_d(cpustate, 6,6); break;
- case 0x337: /* 1 100 110 111 */ cp1610_subat_d(cpustate, 6,7); break;
-
- case 0x338: /* 1 100 111 000 */ cp1610_subi(cpustate, 0); break;
- case 0x339: /* 1 100 111 001 */ cp1610_subi(cpustate, 1); break;
- case 0x33a: /* 1 100 111 010 */ cp1610_subi(cpustate, 2); break;
- case 0x33b: /* 1 100 111 011 */ cp1610_subi(cpustate, 3); break;
- case 0x33c: /* 1 100 111 100 */ cp1610_subi(cpustate, 4); break;
- case 0x33d: /* 1 100 111 101 */ cp1610_subi(cpustate, 5); break;
- case 0x33e: /* 1 100 111 110 */ cp1610_subi(cpustate, 6); break;
- case 0x33f: /* 1 100 111 111 */ cp1610_subi(cpustate, 7); break;
-
- case 0x340: /* 1 101 000 000 */ cp1610_cmp(cpustate, 0); break;
- case 0x341: /* 1 101 000 001 */ cp1610_cmp(cpustate, 1); break;
- case 0x342: /* 1 101 000 010 */ cp1610_cmp(cpustate, 2); break;
- case 0x343: /* 1 101 000 011 */ cp1610_cmp(cpustate, 3); break;
- case 0x344: /* 1 101 000 100 */ cp1610_cmp(cpustate, 4); break;
- case 0x345: /* 1 101 000 101 */ cp1610_cmp(cpustate, 5); break;
- case 0x346: /* 1 101 000 110 */ cp1610_cmp(cpustate, 6); break;
- case 0x347: /* 1 101 000 111 */ cp1610_cmp(cpustate, 7); break;
-
- case 0x348: /* 1 101 001 000 */ cp1610_cmpat(cpustate, 1,0); break;
- case 0x349: /* 1 101 001 001 */ cp1610_cmpat(cpustate, 1,1); break;
- case 0x34a: /* 1 101 001 010 */ cp1610_cmpat(cpustate, 1,2); break;
- case 0x34b: /* 1 101 001 011 */ cp1610_cmpat(cpustate, 1,3); break;
- case 0x34c: /* 1 101 001 100 */ cp1610_cmpat(cpustate, 1,4); break;
- case 0x34d: /* 1 101 001 101 */ cp1610_cmpat(cpustate, 1,5); break;
- case 0x34e: /* 1 101 001 110 */ cp1610_cmpat(cpustate, 1,6); break;
- case 0x34f: /* 1 101 001 111 */ cp1610_cmpat(cpustate, 1,7); break;
-
- case 0x350: /* 1 101 010 000 */ cp1610_cmpat(cpustate, 2,0); break;
- case 0x351: /* 1 101 010 001 */ cp1610_cmpat(cpustate, 2,1); break;
- case 0x352: /* 1 101 010 010 */ cp1610_cmpat(cpustate, 2,2); break;
- case 0x353: /* 1 101 010 011 */ cp1610_cmpat(cpustate, 2,3); break;
- case 0x354: /* 1 101 010 100 */ cp1610_cmpat(cpustate, 2,4); break;
- case 0x355: /* 1 101 010 101 */ cp1610_cmpat(cpustate, 2,5); break;
- case 0x356: /* 1 101 010 110 */ cp1610_cmpat(cpustate, 2,6); break;
- case 0x357: /* 1 101 010 111 */ cp1610_cmpat(cpustate, 2,7); break;
-
- case 0x358: /* 1 101 011 000 */ cp1610_cmpat(cpustate, 3,0); break;
- case 0x359: /* 1 101 011 001 */ cp1610_cmpat(cpustate, 3,1); break;
- case 0x35a: /* 1 101 011 010 */ cp1610_cmpat(cpustate, 3,2); break;
- case 0x35b: /* 1 101 011 011 */ cp1610_cmpat(cpustate, 3,3); break;
- case 0x35c: /* 1 101 011 100 */ cp1610_cmpat(cpustate, 3,4); break;
- case 0x35d: /* 1 101 011 101 */ cp1610_cmpat(cpustate, 3,5); break;
- case 0x35e: /* 1 101 011 110 */ cp1610_cmpat(cpustate, 3,6); break;
- case 0x35f: /* 1 101 011 111 */ cp1610_cmpat(cpustate, 3,7); break;
-
- case 0x360: /* 1 101 100 000 */ cp1610_cmpat_i(cpustate, 4,0); break;
- case 0x361: /* 1 101 100 001 */ cp1610_cmpat_i(cpustate, 4,1); break;
- case 0x362: /* 1 101 100 010 */ cp1610_cmpat_i(cpustate, 4,2); break;
- case 0x363: /* 1 101 100 011 */ cp1610_cmpat_i(cpustate, 4,3); break;
- case 0x364: /* 1 101 100 100 */ cp1610_cmpat_i(cpustate, 4,4); break;
- case 0x365: /* 1 101 100 101 */ cp1610_cmpat_i(cpustate, 4,5); break;
- case 0x366: /* 1 101 100 110 */ cp1610_cmpat_i(cpustate, 4,6); break;
- case 0x367: /* 1 101 100 111 */ cp1610_cmpat_i(cpustate, 4,7); break;
-
- case 0x368: /* 1 101 101 000 */ cp1610_cmpat_i(cpustate, 5,0); break;
- case 0x369: /* 1 101 101 001 */ cp1610_cmpat_i(cpustate, 5,1); break;
- case 0x36a: /* 1 101 101 010 */ cp1610_cmpat_i(cpustate, 5,2); break;
- case 0x36b: /* 1 101 101 011 */ cp1610_cmpat_i(cpustate, 5,3); break;
- case 0x36c: /* 1 101 101 100 */ cp1610_cmpat_i(cpustate, 5,4); break;
- case 0x36d: /* 1 101 101 101 */ cp1610_cmpat_i(cpustate, 5,5); break;
- case 0x36e: /* 1 101 101 110 */ cp1610_cmpat_i(cpustate, 5,6); break;
- case 0x36f: /* 1 101 101 111 */ cp1610_cmpat_i(cpustate, 5,7); break;
-
- case 0x370: /* 1 101 110 000 */ cp1610_cmpat_d(cpustate, 6,0); break;
- case 0x371: /* 1 101 110 001 */ cp1610_cmpat_d(cpustate, 6,1); break;
- case 0x372: /* 1 101 110 010 */ cp1610_cmpat_d(cpustate, 6,2); break;
- case 0x373: /* 1 101 110 011 */ cp1610_cmpat_d(cpustate, 6,3); break;
- case 0x374: /* 1 101 110 100 */ cp1610_cmpat_d(cpustate, 6,4); break;
- case 0x375: /* 1 101 110 101 */ cp1610_cmpat_d(cpustate, 6,5); break;
- case 0x376: /* 1 101 110 110 */ cp1610_cmpat_d(cpustate, 6,6); break;
- case 0x377: /* 1 101 110 111 */ cp1610_cmpat_d(cpustate, 6,7); break;
-
- case 0x378: /* 1 101 111 000 */ cp1610_cmpi(cpustate, 0); break;
- case 0x379: /* 1 101 111 001 */ cp1610_cmpi(cpustate, 1); break;
- case 0x37a: /* 1 101 111 010 */ cp1610_cmpi(cpustate, 2); break;
- case 0x37b: /* 1 101 111 011 */ cp1610_cmpi(cpustate, 3); break;
- case 0x37c: /* 1 101 111 100 */ cp1610_cmpi(cpustate, 4); break;
- case 0x37d: /* 1 101 111 101 */ cp1610_cmpi(cpustate, 5); break;
- case 0x37e: /* 1 101 111 110 */ cp1610_cmpi(cpustate, 6); break;
- case 0x37f: /* 1 101 111 111 */ cp1610_cmpi(cpustate, 7); break;
-
- case 0x380: /* 1 110 000 000 */ cp1610_and(cpustate, 0); break;
- case 0x381: /* 1 110 000 001 */ cp1610_and(cpustate, 1); break;
- case 0x382: /* 1 110 000 010 */ cp1610_and(cpustate, 2); break;
- case 0x383: /* 1 110 000 011 */ cp1610_and(cpustate, 3); break;
- case 0x384: /* 1 110 000 100 */ cp1610_and(cpustate, 4); break;
- case 0x385: /* 1 110 000 101 */ cp1610_and(cpustate, 5); break;
- case 0x386: /* 1 110 000 110 */ cp1610_and(cpustate, 6); break;
- case 0x387: /* 1 110 000 111 */ cp1610_and(cpustate, 7); break;
-
- case 0x388: /* 1 110 001 000 */ cp1610_andat(cpustate, 1,0); break;
- case 0x389: /* 1 110 001 001 */ cp1610_andat(cpustate, 1,1); break;
- case 0x38a: /* 1 110 001 010 */ cp1610_andat(cpustate, 1,2); break;
- case 0x38b: /* 1 110 001 011 */ cp1610_andat(cpustate, 1,3); break;
- case 0x38c: /* 1 110 001 100 */ cp1610_andat(cpustate, 1,4); break;
- case 0x38d: /* 1 110 001 101 */ cp1610_andat(cpustate, 1,5); break;
- case 0x38e: /* 1 110 001 110 */ cp1610_andat(cpustate, 1,6); break;
- case 0x38f: /* 1 110 001 111 */ cp1610_andat(cpustate, 1,7); break;
-
- case 0x390: /* 1 110 010 000 */ cp1610_andat(cpustate, 2,0); break;
- case 0x391: /* 1 110 010 001 */ cp1610_andat(cpustate, 2,1); break;
- case 0x392: /* 1 110 010 010 */ cp1610_andat(cpustate, 2,2); break;
- case 0x393: /* 1 110 010 011 */ cp1610_andat(cpustate, 2,3); break;
- case 0x394: /* 1 110 010 100 */ cp1610_andat(cpustate, 2,4); break;
- case 0x395: /* 1 110 010 101 */ cp1610_andat(cpustate, 2,5); break;
- case 0x396: /* 1 110 010 110 */ cp1610_andat(cpustate, 2,6); break;
- case 0x397: /* 1 110 010 111 */ cp1610_andat(cpustate, 2,7); break;
-
- case 0x398: /* 1 110 011 000 */ cp1610_andat(cpustate, 3,0); break;
- case 0x399: /* 1 110 011 001 */ cp1610_andat(cpustate, 3,1); break;
- case 0x39a: /* 1 110 011 010 */ cp1610_andat(cpustate, 3,2); break;
- case 0x39b: /* 1 110 011 011 */ cp1610_andat(cpustate, 3,3); break;
- case 0x39c: /* 1 110 011 100 */ cp1610_andat(cpustate, 3,4); break;
- case 0x39d: /* 1 110 011 101 */ cp1610_andat(cpustate, 3,5); break;
- case 0x39e: /* 1 110 011 110 */ cp1610_andat(cpustate, 3,6); break;
- case 0x39f: /* 1 110 011 111 */ cp1610_andat(cpustate, 3,7); break;
-
- case 0x3a0: /* 1 110 100 000 */ cp1610_andat_i(cpustate, 4,0); break;
- case 0x3a1: /* 1 110 100 001 */ cp1610_andat_i(cpustate, 4,1); break;
- case 0x3a2: /* 1 110 100 010 */ cp1610_andat_i(cpustate, 4,2); break;
- case 0x3a3: /* 1 110 100 011 */ cp1610_andat_i(cpustate, 4,3); break;
- case 0x3a4: /* 1 110 100 100 */ cp1610_andat_i(cpustate, 4,4); break;
- case 0x3a5: /* 1 110 100 101 */ cp1610_andat_i(cpustate, 4,5); break;
- case 0x3a6: /* 1 110 100 110 */ cp1610_andat_i(cpustate, 4,6); break;
- case 0x3a7: /* 1 110 100 111 */ cp1610_andat_i(cpustate, 4,7); break;
-
- case 0x3a8: /* 1 110 101 000 */ cp1610_andat_i(cpustate, 5,0); break;
- case 0x3a9: /* 1 110 101 001 */ cp1610_andat_i(cpustate, 5,1); break;
- case 0x3aa: /* 1 110 101 010 */ cp1610_andat_i(cpustate, 5,2); break;
- case 0x3ab: /* 1 110 101 011 */ cp1610_andat_i(cpustate, 5,3); break;
- case 0x3ac: /* 1 110 101 100 */ cp1610_andat_i(cpustate, 5,4); break;
- case 0x3ad: /* 1 110 101 101 */ cp1610_andat_i(cpustate, 5,5); break;
- case 0x3ae: /* 1 110 101 110 */ cp1610_andat_i(cpustate, 5,6); break;
- case 0x3af: /* 1 110 101 111 */ cp1610_andat_i(cpustate, 5,7); break;
-
- case 0x3b0: /* 1 110 110 000 */ cp1610_andat_d(cpustate, 6,0); break;
- case 0x3b1: /* 1 110 110 001 */ cp1610_andat_d(cpustate, 6,1); break;
- case 0x3b2: /* 1 110 110 010 */ cp1610_andat_d(cpustate, 6,2); break;
- case 0x3b3: /* 1 110 110 011 */ cp1610_andat_d(cpustate, 6,3); break;
- case 0x3b4: /* 1 110 110 100 */ cp1610_andat_d(cpustate, 6,4); break;
- case 0x3b5: /* 1 110 110 101 */ cp1610_andat_d(cpustate, 6,5); break;
- case 0x3b6: /* 1 110 110 110 */ cp1610_andat_d(cpustate, 6,6); break;
- case 0x3b7: /* 1 110 110 111 */ cp1610_andat_d(cpustate, 6,7); break;
-
- case 0x3b8: /* 1 110 111 000 */ cp1610_andi(cpustate, 0); break;
- case 0x3b9: /* 1 110 111 001 */ cp1610_andi(cpustate, 1); break;
- case 0x3ba: /* 1 110 111 010 */ cp1610_andi(cpustate, 2); break;
- case 0x3bb: /* 1 110 111 011 */ cp1610_andi(cpustate, 3); break;
- case 0x3bc: /* 1 110 111 100 */ cp1610_andi(cpustate, 4); break;
- case 0x3bd: /* 1 110 111 101 */ cp1610_andi(cpustate, 5); break;
- case 0x3be: /* 1 110 111 110 */ cp1610_andi(cpustate, 6); break;
- case 0x3bf: /* 1 110 111 111 */ cp1610_andi(cpustate, 7); break;
-
- case 0x3c0: /* 1 111 000 000 */ cp1610_xor(cpustate, 0); break;
- case 0x3c1: /* 1 111 000 001 */ cp1610_xor(cpustate, 1); break;
- case 0x3c2: /* 1 111 000 010 */ cp1610_xor(cpustate, 2); break;
- case 0x3c3: /* 1 111 000 011 */ cp1610_xor(cpustate, 3); break;
- case 0x3c4: /* 1 111 000 100 */ cp1610_xor(cpustate, 4); break;
- case 0x3c5: /* 1 111 000 101 */ cp1610_xor(cpustate, 5); break;
- case 0x3c6: /* 1 111 000 110 */ cp1610_xor(cpustate, 6); break;
- case 0x3c7: /* 1 111 000 111 */ cp1610_xor(cpustate, 7); break;
-
- case 0x3c8: /* 1 111 001 000 */ cp1610_xorat(cpustate, 1,0); break;
- case 0x3c9: /* 1 111 001 001 */ cp1610_xorat(cpustate, 1,1); break;
- case 0x3ca: /* 1 111 001 010 */ cp1610_xorat(cpustate, 1,2); break;
- case 0x3cb: /* 1 111 001 011 */ cp1610_xorat(cpustate, 1,3); break;
- case 0x3cc: /* 1 111 001 100 */ cp1610_xorat(cpustate, 1,4); break;
- case 0x3cd: /* 1 111 001 101 */ cp1610_xorat(cpustate, 1,5); break;
- case 0x3ce: /* 1 111 001 110 */ cp1610_xorat(cpustate, 1,6); break;
- case 0x3cf: /* 1 111 001 111 */ cp1610_xorat(cpustate, 1,7); break;
-
- case 0x3d0: /* 1 111 010 000 */ cp1610_xorat(cpustate, 2,0); break;
- case 0x3d1: /* 1 111 010 001 */ cp1610_xorat(cpustate, 2,1); break;
- case 0x3d2: /* 1 111 010 010 */ cp1610_xorat(cpustate, 2,2); break;
- case 0x3d3: /* 1 111 010 011 */ cp1610_xorat(cpustate, 2,3); break;
- case 0x3d4: /* 1 111 010 100 */ cp1610_xorat(cpustate, 2,4); break;
- case 0x3d5: /* 1 111 010 101 */ cp1610_xorat(cpustate, 2,5); break;
- case 0x3d6: /* 1 111 010 110 */ cp1610_xorat(cpustate, 2,6); break;
- case 0x3d7: /* 1 111 010 111 */ cp1610_xorat(cpustate, 2,7); break;
-
- case 0x3d8: /* 1 111 011 000 */ cp1610_xorat(cpustate, 3,0); break;
- case 0x3d9: /* 1 111 011 001 */ cp1610_xorat(cpustate, 3,1); break;
- case 0x3da: /* 1 111 011 010 */ cp1610_xorat(cpustate, 3,2); break;
- case 0x3db: /* 1 111 011 011 */ cp1610_xorat(cpustate, 3,3); break;
- case 0x3dc: /* 1 111 011 100 */ cp1610_xorat(cpustate, 3,4); break;
- case 0x3dd: /* 1 111 011 101 */ cp1610_xorat(cpustate, 3,5); break;
- case 0x3de: /* 1 111 011 110 */ cp1610_xorat(cpustate, 3,6); break;
- case 0x3df: /* 1 111 011 111 */ cp1610_xorat(cpustate, 3,7); break;
-
- case 0x3e0: /* 1 111 100 000 */ cp1610_xorat_i(cpustate, 4,0); break;
- case 0x3e1: /* 1 111 100 001 */ cp1610_xorat_i(cpustate, 4,1); break;
- case 0x3e2: /* 1 111 100 010 */ cp1610_xorat_i(cpustate, 4,2); break;
- case 0x3e3: /* 1 111 100 011 */ cp1610_xorat_i(cpustate, 4,3); break;
- case 0x3e4: /* 1 111 100 100 */ cp1610_xorat_i(cpustate, 4,4); break;
- case 0x3e5: /* 1 111 100 101 */ cp1610_xorat_i(cpustate, 4,5); break;
- case 0x3e6: /* 1 111 100 110 */ cp1610_xorat_i(cpustate, 4,6); break;
- case 0x3e7: /* 1 111 100 111 */ cp1610_xorat_i(cpustate, 4,7); break;
-
- case 0x3e8: /* 1 111 101 000 */ cp1610_xorat_i(cpustate, 5,0); break;
- case 0x3e9: /* 1 111 101 001 */ cp1610_xorat_i(cpustate, 5,1); break;
- case 0x3ea: /* 1 111 101 010 */ cp1610_xorat_i(cpustate, 5,2); break;
- case 0x3eb: /* 1 111 101 011 */ cp1610_xorat_i(cpustate, 5,3); break;
- case 0x3ec: /* 1 111 101 100 */ cp1610_xorat_i(cpustate, 5,4); break;
- case 0x3ed: /* 1 111 101 101 */ cp1610_xorat_i(cpustate, 5,5); break;
- case 0x3ee: /* 1 111 101 110 */ cp1610_xorat_i(cpustate, 5,6); break;
- case 0x3ef: /* 1 111 101 111 */ cp1610_xorat_i(cpustate, 5,7); break;
-
- case 0x3f0: /* 1 111 110 000 */ cp1610_xorat_d(cpustate, 6,0); break;
- case 0x3f1: /* 1 111 110 001 */ cp1610_xorat_d(cpustate, 6,1); break;
- case 0x3f2: /* 1 111 110 010 */ cp1610_xorat_d(cpustate, 6,2); break;
- case 0x3f3: /* 1 111 110 011 */ cp1610_xorat_d(cpustate, 6,3); break;
- case 0x3f4: /* 1 111 110 100 */ cp1610_xorat_d(cpustate, 6,4); break;
- case 0x3f5: /* 1 111 110 101 */ cp1610_xorat_d(cpustate, 6,5); break;
- case 0x3f6: /* 1 111 110 110 */ cp1610_xorat_d(cpustate, 6,6); break;
- case 0x3f7: /* 1 111 110 111 */ cp1610_xorat_d(cpustate, 6,7); break;
-
- case 0x3f8: /* 1 111 111 000 */ cp1610_xori(cpustate, 0); break;
- case 0x3f9: /* 1 111 111 001 */ cp1610_xori(cpustate, 1); break;
- case 0x3fa: /* 1 111 111 010 */ cp1610_xori(cpustate, 2); break;
- case 0x3fb: /* 1 111 111 011 */ cp1610_xori(cpustate, 3); break;
- case 0x3fc: /* 1 111 111 100 */ cp1610_xori(cpustate, 4); break;
- case 0x3fd: /* 1 111 111 101 */ cp1610_xori(cpustate, 5); break;
- case 0x3fe: /* 1 111 111 110 */ cp1610_xori(cpustate, 6); break;
- case 0x3ff: /* 1 111 111 111 */ cp1610_xori(cpustate, 7); break;
- }
-
- if (cpustate->mask_interrupts == 0)
- {
+ case 0x000: /* 0 000 000 000 */ cp1610_hlt(cpustate); break; /* TBD */
+ case 0x001: /* 0 000 000 001 */ cp1610_do_sdbd(cpustate); break;
+ case 0x002: /* 0 000 000 010 */ cp1610_eis(cpustate); break; /* TBD */
+ case 0x003: /* 0 000 000 011 */ cp1610_dis(cpustate); break; /* TBD */
+ case 0x004: /* 0 000 000 100 */ cp1610_do_jumps(cpustate); break;
+ case 0x005: /* 0 000 000 101 */ cp1610_tci(cpustate); break; /* TBD */
+ case 0x006: /* 0 000 000 110 */ cp1610_clrc(cpustate); break;
+ case 0x007: /* 0 000 000 111 */ cp1610_setc(cpustate); break;
+
+ case 0x008: /* 0 000 001 000 */ cp1610_incr(cpustate, 0); break;
+ case 0x009: /* 0 000 001 001 */ cp1610_incr(cpustate, 1); break;
+ case 0x00a: /* 0 000 001 010 */ cp1610_incr(cpustate, 2); break;
+ case 0x00b: /* 0 000 001 011 */ cp1610_incr(cpustate, 3); break;
+ case 0x00c: /* 0 000 001 100 */ cp1610_incr(cpustate, 4); break;
+ case 0x00d: /* 0 000 001 101 */ cp1610_incr(cpustate, 5); break;
+ case 0x00e: /* 0 000 001 110 */ cp1610_incr(cpustate, 6); break;
+ case 0x00f: /* 0 000 001 111 */ cp1610_incr(cpustate, 7); break;
+
+ case 0x010: /* 0 000 010 000 */ cp1610_decr(cpustate, 0); break;
+ case 0x011: /* 0 000 010 001 */ cp1610_decr(cpustate, 1); break;
+ case 0x012: /* 0 000 010 010 */ cp1610_decr(cpustate, 2); break;
+ case 0x013: /* 0 000 010 011 */ cp1610_decr(cpustate, 3); break;
+ case 0x014: /* 0 000 010 100 */ cp1610_decr(cpustate, 4); break;
+ case 0x015: /* 0 000 010 101 */ cp1610_decr(cpustate, 5); break;
+ case 0x016: /* 0 000 010 110 */ cp1610_decr(cpustate, 6); break;
+ case 0x017: /* 0 000 010 111 */ cp1610_decr(cpustate, 7); break;
+
+ case 0x018: /* 0 000 011 000 */ cp1610_comr(cpustate, 0); break;
+ case 0x019: /* 0 000 011 001 */ cp1610_comr(cpustate, 1); break;
+ case 0x01a: /* 0 000 011 010 */ cp1610_comr(cpustate, 2); break;
+ case 0x01b: /* 0 000 011 011 */ cp1610_comr(cpustate, 3); break;
+ case 0x01c: /* 0 000 011 100 */ cp1610_comr(cpustate, 4); break;
+ case 0x01d: /* 0 000 011 101 */ cp1610_comr(cpustate, 5); break;
+ case 0x01e: /* 0 000 011 110 */ cp1610_comr(cpustate, 6); break;
+ case 0x01f: /* 0 000 011 111 */ cp1610_comr(cpustate, 7); break;
+
+ case 0x020: /* 0 000 100 000 */ cp1610_negr(cpustate, 0); break;
+ case 0x021: /* 0 000 100 001 */ cp1610_negr(cpustate, 1); break;
+ case 0x022: /* 0 000 100 010 */ cp1610_negr(cpustate, 2); break;
+ case 0x023: /* 0 000 100 011 */ cp1610_negr(cpustate, 3); break;
+ case 0x024: /* 0 000 100 100 */ cp1610_negr(cpustate, 4); break;
+ case 0x025: /* 0 000 100 101 */ cp1610_negr(cpustate, 5); break;
+ case 0x026: /* 0 000 100 110 */ cp1610_negr(cpustate, 6); break;
+ case 0x027: /* 0 000 100 111 */ cp1610_negr(cpustate, 7); break;
+
+ case 0x028: /* 0 000 101 000 */ cp1610_adcr(cpustate, 0); break;
+ case 0x029: /* 0 000 101 001 */ cp1610_adcr(cpustate, 1); break;
+ case 0x02a: /* 0 000 101 010 */ cp1610_adcr(cpustate, 2); break;
+ case 0x02b: /* 0 000 101 011 */ cp1610_adcr(cpustate, 3); break;
+ case 0x02c: /* 0 000 101 100 */ cp1610_adcr(cpustate, 4); break;
+ case 0x02d: /* 0 000 101 101 */ cp1610_adcr(cpustate, 5); break;
+ case 0x02e: /* 0 000 101 110 */ cp1610_adcr(cpustate, 6); break;
+ case 0x02f: /* 0 000 101 111 */ cp1610_adcr(cpustate, 7); break;
+
+ case 0x030: /* 0 000 110 000 */ cp1610_gswd(cpustate, 0); break;
+ case 0x031: /* 0 000 110 001 */ cp1610_gswd(cpustate, 1); break;
+ case 0x032: /* 0 000 110 010 */ cp1610_gswd(cpustate, 2); break;
+ case 0x033: /* 0 000 110 011 */ cp1610_gswd(cpustate, 3); break;
+ case 0x034: /* 0 000 110 100 */ cp1610_nop(cpustate); break;
+ case 0x035: /* 0 000 110 101 */ cp1610_nop(cpustate); break;
+ case 0x036: /* 0 000 110 110 */ cp1610_sin(cpustate); break; /* TBD */
+ case 0x037: /* 0 000 110 111 */ cp1610_sin(cpustate); break; /* TBD */
+
+ case 0x038: /* 0 000 111 000 */ cp1610_rswd(cpustate, 0); break;
+ case 0x039: /* 0 000 111 001 */ cp1610_rswd(cpustate, 1); break;
+ case 0x03a: /* 0 000 111 010 */ cp1610_rswd(cpustate, 2); break;
+ case 0x03b: /* 0 000 111 011 */ cp1610_rswd(cpustate, 3); break;
+ case 0x03c: /* 0 000 111 100 */ cp1610_rswd(cpustate, 4); break;
+ case 0x03d: /* 0 000 111 101 */ cp1610_rswd(cpustate, 5); break;
+ case 0x03e: /* 0 000 111 110 */ cp1610_rswd(cpustate, 6); break;
+ case 0x03f: /* 0 000 111 111 */ cp1610_rswd(cpustate, 7); break;
+
+ case 0x040: /* 0 001 000 000 */ cp1610_swap(cpustate, 0); break;
+ case 0x041: /* 0 001 000 001 */ cp1610_swap(cpustate, 1); break;
+ case 0x042: /* 0 001 000 010 */ cp1610_swap(cpustate, 2); break;
+ case 0x043: /* 0 001 000 011 */ cp1610_swap(cpustate, 3); break;
+ case 0x044: /* 0 001 000 100 */ cp1610_dswap(cpustate, 0); break;
+ case 0x045: /* 0 001 000 101 */ cp1610_dswap(cpustate, 1); break;
+ case 0x046: /* 0 001 000 110 */ cp1610_dswap(cpustate, 2); break;
+ case 0x047: /* 0 001 000 111 */ cp1610_dswap(cpustate, 3); break;
+
+ case 0x048: /* 0 001 001 000 */ cp1610_sll_1(cpustate, 0); break;
+ case 0x049: /* 0 001 001 001 */ cp1610_sll_1(cpustate, 1); break;
+ case 0x04a: /* 0 001 001 010 */ cp1610_sll_1(cpustate, 2); break;
+ case 0x04b: /* 0 001 001 011 */ cp1610_sll_1(cpustate, 3); break;
+ case 0x04c: /* 0 001 001 100 */ cp1610_sll_2(cpustate, 0); break;
+ case 0x04d: /* 0 001 001 101 */ cp1610_sll_2(cpustate, 1); break;
+ case 0x04e: /* 0 001 001 110 */ cp1610_sll_2(cpustate, 2); break;
+ case 0x04f: /* 0 001 001 111 */ cp1610_sll_2(cpustate, 3); break;
+
+ case 0x050: /* 0 001 010 000 */ cp1610_rlc_1(cpustate, 0); break;
+ case 0x051: /* 0 001 010 001 */ cp1610_rlc_1(cpustate, 1); break;
+ case 0x052: /* 0 001 010 010 */ cp1610_rlc_1(cpustate, 2); break;
+ case 0x053: /* 0 001 010 011 */ cp1610_rlc_1(cpustate, 3); break;
+ case 0x054: /* 0 001 010 100 */ cp1610_rlc_2(cpustate, 0); break;
+ case 0x055: /* 0 001 010 101 */ cp1610_rlc_2(cpustate, 1); break;
+ case 0x056: /* 0 001 010 110 */ cp1610_rlc_2(cpustate, 2); break;
+ case 0x057: /* 0 001 010 111 */ cp1610_rlc_2(cpustate, 3); break;
+
+ case 0x058: /* 0 001 011 000 */ cp1610_sllc_1(cpustate, 0); break;
+ case 0x059: /* 0 001 011 001 */ cp1610_sllc_1(cpustate, 1); break;
+ case 0x05a: /* 0 001 011 010 */ cp1610_sllc_1(cpustate, 2); break;
+ case 0x05b: /* 0 001 011 011 */ cp1610_sllc_1(cpustate, 3); break;
+ case 0x05c: /* 0 001 011 100 */ cp1610_sllc_2(cpustate, 0); break;
+ case 0x05d: /* 0 001 011 101 */ cp1610_sllc_2(cpustate, 1); break;
+ case 0x05e: /* 0 001 011 110 */ cp1610_sllc_2(cpustate, 2); break;
+ case 0x05f: /* 0 001 011 111 */ cp1610_sllc_2(cpustate, 3); break;
+
+ case 0x060: /* 0 001 100 000 */ cp1610_slr_1(cpustate, 0); break;
+ case 0x061: /* 0 001 100 001 */ cp1610_slr_1(cpustate, 1); break;
+ case 0x062: /* 0 001 100 010 */ cp1610_slr_1(cpustate, 2); break;
+ case 0x063: /* 0 001 100 011 */ cp1610_slr_1(cpustate, 3); break;
+ case 0x064: /* 0 001 100 100 */ cp1610_slr_2(cpustate, 0); break;
+ case 0x065: /* 0 001 100 101 */ cp1610_slr_2(cpustate, 1); break;
+ case 0x066: /* 0 001 100 110 */ cp1610_slr_2(cpustate, 2); break;
+ case 0x067: /* 0 001 100 111 */ cp1610_slr_2(cpustate, 3); break;
+
+ case 0x068: /* 0 001 101 000 */ cp1610_sar_1(cpustate, 0); break;
+ case 0x069: /* 0 001 101 001 */ cp1610_sar_1(cpustate, 1); break;
+ case 0x06a: /* 0 001 101 010 */ cp1610_sar_1(cpustate, 2); break;
+ case 0x06b: /* 0 001 101 011 */ cp1610_sar_1(cpustate, 3); break;
+ case 0x06c: /* 0 001 101 100 */ cp1610_sar_2(cpustate, 0); break;
+ case 0x06d: /* 0 001 101 101 */ cp1610_sar_2(cpustate, 1); break;
+ case 0x06e: /* 0 001 101 110 */ cp1610_sar_2(cpustate, 2); break;
+ case 0x06f: /* 0 001 101 111 */ cp1610_sar_2(cpustate, 3); break;
+
+ case 0x070: /* 0 001 110 000 */ cp1610_rrc_1(cpustate, 0); break;
+ case 0x071: /* 0 001 110 001 */ cp1610_rrc_1(cpustate, 1); break;
+ case 0x072: /* 0 001 110 010 */ cp1610_rrc_1(cpustate, 2); break;
+ case 0x073: /* 0 001 110 011 */ cp1610_rrc_1(cpustate, 3); break;
+ case 0x074: /* 0 001 110 100 */ cp1610_rrc_2(cpustate, 0); break;
+ case 0x075: /* 0 001 110 101 */ cp1610_rrc_2(cpustate, 1); break;
+ case 0x076: /* 0 001 110 110 */ cp1610_rrc_2(cpustate, 2); break;
+ case 0x077: /* 0 001 110 111 */ cp1610_rrc_2(cpustate, 3); break;
+
+ case 0x078: /* 0 001 111 000 */ cp1610_sarc_1(cpustate, 0); break;
+ case 0x079: /* 0 001 111 001 */ cp1610_sarc_1(cpustate, 1); break;
+ case 0x07a: /* 0 001 111 010 */ cp1610_sarc_1(cpustate, 2); break;
+ case 0x07b: /* 0 001 111 011 */ cp1610_sarc_1(cpustate, 3); break;
+ case 0x07c: /* 0 001 111 100 */ cp1610_sarc_2(cpustate, 0); break;
+ case 0x07d: /* 0 001 111 101 */ cp1610_sarc_2(cpustate, 1); break;
+ case 0x07e: /* 0 001 111 110 */ cp1610_sarc_2(cpustate, 2); break;
+ case 0x07f: /* 0 001 111 111 */ cp1610_sarc_2(cpustate, 3); break;
+
+ case 0x080: /* 0 010 000 000 */ cp1610_tstr(cpustate, 0); break;
+ case 0x081: /* 0 010 000 001 */ cp1610_movr(cpustate, 0,1); break;
+ case 0x082: /* 0 010 000 010 */ cp1610_movr(cpustate, 0,2); break;
+ case 0x083: /* 0 010 000 011 */ cp1610_movr(cpustate, 0,3); break;
+ case 0x084: /* 0 010 000 100 */ cp1610_movr(cpustate, 0,4); break;
+ case 0x085: /* 0 010 000 101 */ cp1610_movr(cpustate, 0,5); break;
+ case 0x086: /* 0 010 000 110 */ cp1610_movr(cpustate, 0,6); break;
+ case 0x087: /* 0 010 000 111 */ cp1610_movr(cpustate, 0,7); break; /* jr */
+
+ case 0x088: /* 0 010 001 000 */ cp1610_movr(cpustate, 1,0); break;
+ case 0x089: /* 0 010 001 001 */ cp1610_tstr(cpustate, 1); break;
+ case 0x08a: /* 0 010 001 010 */ cp1610_movr(cpustate, 1,2); break;
+ case 0x08b: /* 0 010 001 011 */ cp1610_movr(cpustate, 1,3); break;
+ case 0x08c: /* 0 010 001 100 */ cp1610_movr(cpustate, 1,4); break;
+ case 0x08d: /* 0 010 001 101 */ cp1610_movr(cpustate, 1,5); break;
+ case 0x08e: /* 0 010 001 110 */ cp1610_movr(cpustate, 1,6); break;
+ case 0x08f: /* 0 010 001 111 */ cp1610_movr(cpustate, 1,7); break; /* jr */
+
+ case 0x090: /* 0 010 010 000 */ cp1610_movr(cpustate, 2,0); break;
+ case 0x091: /* 0 010 010 001 */ cp1610_movr(cpustate, 2,1); break;
+ case 0x092: /* 0 010 010 010 */ cp1610_tstr(cpustate, 2); break;
+ case 0x093: /* 0 010 010 011 */ cp1610_movr(cpustate, 2,3); break;
+ case 0x094: /* 0 010 010 100 */ cp1610_movr(cpustate, 2,4); break;
+ case 0x095: /* 0 010 010 101 */ cp1610_movr(cpustate, 2,5); break;
+ case 0x096: /* 0 010 010 110 */ cp1610_movr(cpustate, 2,6); break;
+ case 0x097: /* 0 010 010 111 */ cp1610_movr(cpustate, 2,7); break; /* jr */
+
+ case 0x098: /* 0 010 011 000 */ cp1610_movr(cpustate, 3,0); break;
+ case 0x099: /* 0 010 011 001 */ cp1610_movr(cpustate, 3,1); break;
+ case 0x09a: /* 0 010 011 010 */ cp1610_movr(cpustate, 3,2); break;
+ case 0x09b: /* 0 010 011 011 */ cp1610_tstr(cpustate, 3); break;
+ case 0x09c: /* 0 010 011 100 */ cp1610_movr(cpustate, 3,4); break;
+ case 0x09d: /* 0 010 011 101 */ cp1610_movr(cpustate, 3,5); break;
+ case 0x09e: /* 0 010 011 110 */ cp1610_movr(cpustate, 3,6); break;
+ case 0x09f: /* 0 010 011 111 */ cp1610_movr(cpustate, 3,7); break; /* jr */
+
+ case 0x0a0: /* 0 010 100 000 */ cp1610_movr(cpustate, 4,0); break;
+ case 0x0a1: /* 0 010 100 001 */ cp1610_movr(cpustate, 4,1); break;
+ case 0x0a2: /* 0 010 100 010 */ cp1610_movr(cpustate, 4,2); break;
+ case 0x0a3: /* 0 010 100 011 */ cp1610_movr(cpustate, 4,3); break;
+ case 0x0a4: /* 0 010 100 100 */ cp1610_tstr(cpustate, 4); break;
+ case 0x0a5: /* 0 010 100 101 */ cp1610_movr(cpustate, 4,5); break;
+ case 0x0a6: /* 0 010 100 110 */ cp1610_movr(cpustate, 4,6); break;
+ case 0x0a7: /* 0 010 100 111 */ cp1610_movr(cpustate, 4,7); break; /* jr */
+
+ case 0x0a8: /* 0 010 101 000 */ cp1610_movr(cpustate, 5,0); break;
+ case 0x0a9: /* 0 010 101 001 */ cp1610_movr(cpustate, 5,1); break;
+ case 0x0aa: /* 0 010 101 010 */ cp1610_movr(cpustate, 5,2); break;
+ case 0x0ab: /* 0 010 101 011 */ cp1610_movr(cpustate, 5,3); break;
+ case 0x0ac: /* 0 010 101 100 */ cp1610_movr(cpustate, 5,4); break;
+ case 0x0ad: /* 0 010 101 101 */ cp1610_tstr(cpustate, 5); break;
+ case 0x0ae: /* 0 010 101 110 */ cp1610_movr(cpustate, 5,6); break;
+ case 0x0af: /* 0 010 101 111 */ cp1610_movr(cpustate, 5,7); break; /* jr */
+
+ case 0x0b0: /* 0 010 110 000 */ cp1610_movr(cpustate, 6,0); break;
+ case 0x0b1: /* 0 010 110 001 */ cp1610_movr(cpustate, 6,1); break;
+ case 0x0b2: /* 0 010 110 010 */ cp1610_movr(cpustate, 6,2); break;
+ case 0x0b3: /* 0 010 110 011 */ cp1610_movr(cpustate, 6,3); break;
+ case 0x0b4: /* 0 010 110 100 */ cp1610_movr(cpustate, 6,4); break;
+ case 0x0b5: /* 0 010 110 101 */ cp1610_movr(cpustate, 6,5); break;
+ case 0x0b6: /* 0 010 110 110 */ cp1610_tstr(cpustate, 6); break;
+ case 0x0b7: /* 0 010 110 111 */ cp1610_movr(cpustate, 6,7); break; /* jr */
+
+ case 0x0b8: /* 0 010 111 000 */ cp1610_movr(cpustate, 7,0); break;
+ case 0x0b9: /* 0 010 111 001 */ cp1610_movr(cpustate, 7,1); break;
+ case 0x0ba: /* 0 010 111 010 */ cp1610_movr(cpustate, 7,2); break;
+ case 0x0bb: /* 0 010 111 011 */ cp1610_movr(cpustate, 7,3); break;
+ case 0x0bc: /* 0 010 111 100 */ cp1610_movr(cpustate, 7,4); break;
+ case 0x0bd: /* 0 010 111 101 */ cp1610_movr(cpustate, 7,5); break;
+ case 0x0be: /* 0 010 111 110 */ cp1610_movr(cpustate, 7,6); break;
+ case 0x0bf: /* 0 010 111 111 */ cp1610_tstr(cpustate, 7); break;
+
+ case 0x0c0: /* 0 011 000 000 */ cp1610_addr(cpustate, 0,0); break;
+ case 0x0c1: /* 0 011 000 001 */ cp1610_addr(cpustate, 0,1); break;
+ case 0x0c2: /* 0 011 000 010 */ cp1610_addr(cpustate, 0,2); break;
+ case 0x0c3: /* 0 011 000 011 */ cp1610_addr(cpustate, 0,3); break;
+ case 0x0c4: /* 0 011 000 100 */ cp1610_addr(cpustate, 0,4); break;
+ case 0x0c5: /* 0 011 000 101 */ cp1610_addr(cpustate, 0,5); break;
+ case 0x0c6: /* 0 011 000 110 */ cp1610_addr(cpustate, 0,6); break;
+ case 0x0c7: /* 0 011 000 111 */ cp1610_addr(cpustate, 0,7); break;
+
+ case 0x0c8: /* 0 011 001 000 */ cp1610_addr(cpustate, 1,0); break;
+ case 0x0c9: /* 0 011 001 001 */ cp1610_addr(cpustate, 1,1); break;
+ case 0x0ca: /* 0 011 001 010 */ cp1610_addr(cpustate, 1,2); break;
+ case 0x0cb: /* 0 011 001 011 */ cp1610_addr(cpustate, 1,3); break;
+ case 0x0cc: /* 0 011 001 100 */ cp1610_addr(cpustate, 1,4); break;
+ case 0x0cd: /* 0 011 001 101 */ cp1610_addr(cpustate, 1,5); break;
+ case 0x0ce: /* 0 011 001 110 */ cp1610_addr(cpustate, 1,6); break;
+ case 0x0cf: /* 0 011 001 111 */ cp1610_addr(cpustate, 1,7); break;
+
+ case 0x0d0: /* 0 011 010 000 */ cp1610_addr(cpustate, 2,0); break;
+ case 0x0d1: /* 0 011 010 001 */ cp1610_addr(cpustate, 2,1); break;
+ case 0x0d2: /* 0 011 010 010 */ cp1610_addr(cpustate, 2,2); break;
+ case 0x0d3: /* 0 011 010 011 */ cp1610_addr(cpustate, 2,3); break;
+ case 0x0d4: /* 0 011 010 100 */ cp1610_addr(cpustate, 2,4); break;
+ case 0x0d5: /* 0 011 010 101 */ cp1610_addr(cpustate, 2,5); break;
+ case 0x0d6: /* 0 011 010 110 */ cp1610_addr(cpustate, 2,6); break;
+ case 0x0d7: /* 0 011 010 111 */ cp1610_addr(cpustate, 2,7); break;
+
+ case 0x0d8: /* 0 011 011 000 */ cp1610_addr(cpustate, 3,0); break;
+ case 0x0d9: /* 0 011 011 001 */ cp1610_addr(cpustate, 3,1); break;
+ case 0x0da: /* 0 011 011 010 */ cp1610_addr(cpustate, 3,2); break;
+ case 0x0db: /* 0 011 011 011 */ cp1610_addr(cpustate, 3,3); break;
+ case 0x0dc: /* 0 011 011 100 */ cp1610_addr(cpustate, 3,4); break;
+ case 0x0dd: /* 0 011 011 101 */ cp1610_addr(cpustate, 3,5); break;
+ case 0x0de: /* 0 011 011 110 */ cp1610_addr(cpustate, 3,6); break;
+ case 0x0df: /* 0 011 011 111 */ cp1610_addr(cpustate, 3,7); break;
+
+ case 0x0e0: /* 0 011 100 000 */ cp1610_addr(cpustate, 4,0); break;
+ case 0x0e1: /* 0 011 100 001 */ cp1610_addr(cpustate, 4,1); break;
+ case 0x0e2: /* 0 011 100 010 */ cp1610_addr(cpustate, 4,2); break;
+ case 0x0e3: /* 0 011 100 011 */ cp1610_addr(cpustate, 4,3); break;
+ case 0x0e4: /* 0 011 100 100 */ cp1610_addr(cpustate, 4,4); break;
+ case 0x0e5: /* 0 011 100 101 */ cp1610_addr(cpustate, 4,5); break;
+ case 0x0e6: /* 0 011 100 110 */ cp1610_addr(cpustate, 4,6); break;
+ case 0x0e7: /* 0 011 100 111 */ cp1610_addr(cpustate, 4,7); break;
+
+ case 0x0e8: /* 0 011 101 000 */ cp1610_addr(cpustate, 5,0); break;
+ case 0x0e9: /* 0 011 101 001 */ cp1610_addr(cpustate, 5,1); break;
+ case 0x0ea: /* 0 011 101 010 */ cp1610_addr(cpustate, 5,2); break;
+ case 0x0eb: /* 0 011 101 011 */ cp1610_addr(cpustate, 5,3); break;
+ case 0x0ec: /* 0 011 101 100 */ cp1610_addr(cpustate, 5,4); break;
+ case 0x0ed: /* 0 011 101 101 */ cp1610_addr(cpustate, 5,5); break;
+ case 0x0ee: /* 0 011 101 110 */ cp1610_addr(cpustate, 5,6); break;
+ case 0x0ef: /* 0 011 101 111 */ cp1610_addr(cpustate, 5,7); break;
+
+ case 0x0f0: /* 0 011 110 000 */ cp1610_addr(cpustate, 6,0); break;
+ case 0x0f1: /* 0 011 110 001 */ cp1610_addr(cpustate, 6,1); break;
+ case 0x0f2: /* 0 011 110 010 */ cp1610_addr(cpustate, 6,2); break;
+ case 0x0f3: /* 0 011 110 011 */ cp1610_addr(cpustate, 6,3); break;
+ case 0x0f4: /* 0 011 110 100 */ cp1610_addr(cpustate, 6,4); break;
+ case 0x0f5: /* 0 011 110 101 */ cp1610_addr(cpustate, 6,5); break;
+ case 0x0f6: /* 0 011 110 110 */ cp1610_addr(cpustate, 6,6); break;
+ case 0x0f7: /* 0 011 110 111 */ cp1610_addr(cpustate, 6,7); break;
+
+ case 0x0f8: /* 0 011 111 000 */ cp1610_addr(cpustate, 7,0); break;
+ case 0x0f9: /* 0 011 111 001 */ cp1610_addr(cpustate, 7,1); break;
+ case 0x0fa: /* 0 011 111 010 */ cp1610_addr(cpustate, 7,2); break;
+ case 0x0fb: /* 0 011 111 011 */ cp1610_addr(cpustate, 7,3); break;
+ case 0x0fc: /* 0 011 111 100 */ cp1610_addr(cpustate, 7,4); break;
+ case 0x0fd: /* 0 011 111 101 */ cp1610_addr(cpustate, 7,5); break;
+ case 0x0fe: /* 0 011 111 110 */ cp1610_addr(cpustate, 7,6); break;
+ case 0x0ff: /* 0 011 111 111 */ cp1610_addr(cpustate, 7,7); break;
+
+ case 0x100: /* 0 100 000 000 */ cp1610_subr(cpustate, 0,0); break;
+ case 0x101: /* 0 100 000 001 */ cp1610_subr(cpustate, 0,1); break;
+ case 0x102: /* 0 100 000 010 */ cp1610_subr(cpustate, 0,2); break;
+ case 0x103: /* 0 100 000 011 */ cp1610_subr(cpustate, 0,3); break;
+ case 0x104: /* 0 100 000 100 */ cp1610_subr(cpustate, 0,4); break;
+ case 0x105: /* 0 100 000 101 */ cp1610_subr(cpustate, 0,5); break;
+ case 0x106: /* 0 100 000 110 */ cp1610_subr(cpustate, 0,6); break;
+ case 0x107: /* 0 100 000 111 */ cp1610_subr(cpustate, 0,7); break;
+
+ case 0x108: /* 0 100 001 000 */ cp1610_subr(cpustate, 1,0); break;
+ case 0x109: /* 0 100 001 001 */ cp1610_subr(cpustate, 1,1); break;
+ case 0x10a: /* 0 100 001 010 */ cp1610_subr(cpustate, 1,2); break;
+ case 0x10b: /* 0 100 001 011 */ cp1610_subr(cpustate, 1,3); break;
+ case 0x10c: /* 0 100 001 100 */ cp1610_subr(cpustate, 1,4); break;
+ case 0x10d: /* 0 100 001 101 */ cp1610_subr(cpustate, 1,5); break;
+ case 0x10e: /* 0 100 001 110 */ cp1610_subr(cpustate, 1,6); break;
+ case 0x10f: /* 0 100 001 111 */ cp1610_subr(cpustate, 1,7); break;
+
+ case 0x110: /* 0 100 010 000 */ cp1610_subr(cpustate, 2,0); break;
+ case 0x111: /* 0 100 010 001 */ cp1610_subr(cpustate, 2,1); break;
+ case 0x112: /* 0 100 010 010 */ cp1610_subr(cpustate, 2,2); break;
+ case 0x113: /* 0 100 010 011 */ cp1610_subr(cpustate, 2,3); break;
+ case 0x114: /* 0 100 010 100 */ cp1610_subr(cpustate, 2,4); break;
+ case 0x115: /* 0 100 010 101 */ cp1610_subr(cpustate, 2,5); break;
+ case 0x116: /* 0 100 010 110 */ cp1610_subr(cpustate, 2,6); break;
+ case 0x117: /* 0 100 010 111 */ cp1610_subr(cpustate, 2,7); break;
+
+ case 0x118: /* 0 100 011 000 */ cp1610_subr(cpustate, 3,0); break;
+ case 0x119: /* 0 100 011 001 */ cp1610_subr(cpustate, 3,1); break;
+ case 0x11a: /* 0 100 011 010 */ cp1610_subr(cpustate, 3,2); break;
+ case 0x11b: /* 0 100 011 011 */ cp1610_subr(cpustate, 3,3); break;
+ case 0x11c: /* 0 100 011 100 */ cp1610_subr(cpustate, 3,4); break;
+ case 0x11d: /* 0 100 011 101 */ cp1610_subr(cpustate, 3,5); break;
+ case 0x11e: /* 0 100 011 110 */ cp1610_subr(cpustate, 3,6); break;
+ case 0x11f: /* 0 100 011 111 */ cp1610_subr(cpustate, 3,7); break;
+
+ case 0x120: /* 0 100 100 000 */ cp1610_subr(cpustate, 4,0); break;
+ case 0x121: /* 0 100 100 001 */ cp1610_subr(cpustate, 4,1); break;
+ case 0x122: /* 0 100 100 010 */ cp1610_subr(cpustate, 4,2); break;
+ case 0x123: /* 0 100 100 011 */ cp1610_subr(cpustate, 4,3); break;
+ case 0x124: /* 0 100 100 100 */ cp1610_subr(cpustate, 4,4); break;
+ case 0x125: /* 0 100 100 101 */ cp1610_subr(cpustate, 4,5); break;
+ case 0x126: /* 0 100 100 110 */ cp1610_subr(cpustate, 4,6); break;
+ case 0x127: /* 0 100 100 111 */ cp1610_subr(cpustate, 4,7); break;
+
+ case 0x128: /* 0 100 101 000 */ cp1610_subr(cpustate, 5,0); break;
+ case 0x129: /* 0 100 101 001 */ cp1610_subr(cpustate, 5,1); break;
+ case 0x12a: /* 0 100 101 010 */ cp1610_subr(cpustate, 5,2); break;
+ case 0x12b: /* 0 100 101 011 */ cp1610_subr(cpustate, 5,3); break;
+ case 0x12c: /* 0 100 101 100 */ cp1610_subr(cpustate, 5,4); break;
+ case 0x12d: /* 0 100 101 101 */ cp1610_subr(cpustate, 5,5); break;
+ case 0x12e: /* 0 100 101 110 */ cp1610_subr(cpustate, 5,6); break;
+ case 0x12f: /* 0 100 101 111 */ cp1610_subr(cpustate, 5,7); break;
+
+ case 0x130: /* 0 100 110 000 */ cp1610_subr(cpustate, 6,0); break;
+ case 0x131: /* 0 100 110 001 */ cp1610_subr(cpustate, 6,1); break;
+ case 0x132: /* 0 100 110 010 */ cp1610_subr(cpustate, 6,2); break;
+ case 0x133: /* 0 100 110 011 */ cp1610_subr(cpustate, 6,3); break;
+ case 0x134: /* 0 100 110 100 */ cp1610_subr(cpustate, 6,4); break;
+ case 0x135: /* 0 100 110 101 */ cp1610_subr(cpustate, 6,5); break;
+ case 0x136: /* 0 100 110 110 */ cp1610_subr(cpustate, 6,6); break;
+ case 0x137: /* 0 100 110 111 */ cp1610_subr(cpustate, 6,7); break;
+
+ case 0x138: /* 0 100 111 000 */ cp1610_subr(cpustate, 7,0); break;
+ case 0x139: /* 0 100 111 001 */ cp1610_subr(cpustate, 7,1); break;
+ case 0x13a: /* 0 100 111 010 */ cp1610_subr(cpustate, 7,2); break;
+ case 0x13b: /* 0 100 111 011 */ cp1610_subr(cpustate, 7,3); break;
+ case 0x13c: /* 0 100 111 100 */ cp1610_subr(cpustate, 7,4); break;
+ case 0x13d: /* 0 100 111 101 */ cp1610_subr(cpustate, 7,5); break;
+ case 0x13e: /* 0 100 111 110 */ cp1610_subr(cpustate, 7,6); break;
+ case 0x13f: /* 0 100 111 111 */ cp1610_subr(cpustate, 7,7); break;
+
+ case 0x140: /* 0 101 000 000 */ cp1610_cmpr(cpustate, 0,0); break;
+ case 0x141: /* 0 101 000 001 */ cp1610_cmpr(cpustate, 0,1); break;
+ case 0x142: /* 0 101 000 010 */ cp1610_cmpr(cpustate, 0,2); break;
+ case 0x143: /* 0 101 000 011 */ cp1610_cmpr(cpustate, 0,3); break;
+ case 0x144: /* 0 101 000 100 */ cp1610_cmpr(cpustate, 0,4); break;
+ case 0x145: /* 0 101 000 101 */ cp1610_cmpr(cpustate, 0,5); break;
+ case 0x146: /* 0 101 000 110 */ cp1610_cmpr(cpustate, 0,6); break;
+ case 0x147: /* 0 101 000 111 */ cp1610_cmpr(cpustate, 0,7); break;
+
+ case 0x148: /* 0 101 001 000 */ cp1610_cmpr(cpustate, 1,0); break;
+ case 0x149: /* 0 101 001 001 */ cp1610_cmpr(cpustate, 1,1); break;
+ case 0x14a: /* 0 101 001 010 */ cp1610_cmpr(cpustate, 1,2); break;
+ case 0x14b: /* 0 101 001 011 */ cp1610_cmpr(cpustate, 1,3); break;
+ case 0x14c: /* 0 101 001 100 */ cp1610_cmpr(cpustate, 1,4); break;
+ case 0x14d: /* 0 101 001 101 */ cp1610_cmpr(cpustate, 1,5); break;
+ case 0x14e: /* 0 101 001 110 */ cp1610_cmpr(cpustate, 1,6); break;
+ case 0x14f: /* 0 101 001 111 */ cp1610_cmpr(cpustate, 1,7); break;
+
+ case 0x150: /* 0 101 010 000 */ cp1610_cmpr(cpustate, 2,0); break;
+ case 0x151: /* 0 101 010 001 */ cp1610_cmpr(cpustate, 2,1); break;
+ case 0x152: /* 0 101 010 010 */ cp1610_cmpr(cpustate, 2,2); break;
+ case 0x153: /* 0 101 010 011 */ cp1610_cmpr(cpustate, 2,3); break;
+ case 0x154: /* 0 101 010 100 */ cp1610_cmpr(cpustate, 2,4); break;
+ case 0x155: /* 0 101 010 101 */ cp1610_cmpr(cpustate, 2,5); break;
+ case 0x156: /* 0 101 010 110 */ cp1610_cmpr(cpustate, 2,6); break;
+ case 0x157: /* 0 101 010 111 */ cp1610_cmpr(cpustate, 2,7); break;
+
+ case 0x158: /* 0 101 011 000 */ cp1610_cmpr(cpustate, 3,0); break;
+ case 0x159: /* 0 101 011 001 */ cp1610_cmpr(cpustate, 3,1); break;
+ case 0x15a: /* 0 101 011 010 */ cp1610_cmpr(cpustate, 3,2); break;
+ case 0x15b: /* 0 101 011 011 */ cp1610_cmpr(cpustate, 3,3); break;
+ case 0x15c: /* 0 101 011 100 */ cp1610_cmpr(cpustate, 3,4); break;
+ case 0x15d: /* 0 101 011 101 */ cp1610_cmpr(cpustate, 3,5); break;
+ case 0x15e: /* 0 101 011 110 */ cp1610_cmpr(cpustate, 3,6); break;
+ case 0x15f: /* 0 101 011 111 */ cp1610_cmpr(cpustate, 3,7); break;
+
+ case 0x160: /* 0 101 100 000 */ cp1610_cmpr(cpustate, 4,0); break;
+ case 0x161: /* 0 101 100 001 */ cp1610_cmpr(cpustate, 4,1); break;
+ case 0x162: /* 0 101 100 010 */ cp1610_cmpr(cpustate, 4,2); break;
+ case 0x163: /* 0 101 100 011 */ cp1610_cmpr(cpustate, 4,3); break;
+ case 0x164: /* 0 101 100 100 */ cp1610_cmpr(cpustate, 4,4); break;
+ case 0x165: /* 0 101 100 101 */ cp1610_cmpr(cpustate, 4,5); break;
+ case 0x166: /* 0 101 100 110 */ cp1610_cmpr(cpustate, 4,6); break;
+ case 0x167: /* 0 101 100 111 */ cp1610_cmpr(cpustate, 4,7); break;
+
+ case 0x168: /* 0 101 101 000 */ cp1610_cmpr(cpustate, 5,0); break;
+ case 0x169: /* 0 101 101 001 */ cp1610_cmpr(cpustate, 5,1); break;
+ case 0x16a: /* 0 101 101 010 */ cp1610_cmpr(cpustate, 5,2); break;
+ case 0x16b: /* 0 101 101 011 */ cp1610_cmpr(cpustate, 5,3); break;
+ case 0x16c: /* 0 101 101 100 */ cp1610_cmpr(cpustate, 5,4); break;
+ case 0x16d: /* 0 101 101 101 */ cp1610_cmpr(cpustate, 5,5); break;
+ case 0x16e: /* 0 101 101 110 */ cp1610_cmpr(cpustate, 5,6); break;
+ case 0x16f: /* 0 101 101 111 */ cp1610_cmpr(cpustate, 5,7); break;
+
+ case 0x170: /* 0 101 110 000 */ cp1610_cmpr(cpustate, 6,0); break;
+ case 0x171: /* 0 101 110 001 */ cp1610_cmpr(cpustate, 6,1); break;
+ case 0x172: /* 0 101 110 010 */ cp1610_cmpr(cpustate, 6,2); break;
+ case 0x173: /* 0 101 110 011 */ cp1610_cmpr(cpustate, 6,3); break;
+ case 0x174: /* 0 101 110 100 */ cp1610_cmpr(cpustate, 6,4); break;
+ case 0x175: /* 0 101 110 101 */ cp1610_cmpr(cpustate, 6,5); break;
+ case 0x176: /* 0 101 110 110 */ cp1610_cmpr(cpustate, 6,6); break;
+ case 0x177: /* 0 101 110 111 */ cp1610_cmpr(cpustate, 6,7); break;
+
+ case 0x178: /* 0 101 111 000 */ cp1610_cmpr(cpustate, 7,0); break;
+ case 0x179: /* 0 101 111 001 */ cp1610_cmpr(cpustate, 7,1); break;
+ case 0x17a: /* 0 101 111 010 */ cp1610_cmpr(cpustate, 7,2); break;
+ case 0x17b: /* 0 101 111 011 */ cp1610_cmpr(cpustate, 7,3); break;
+ case 0x17c: /* 0 101 111 100 */ cp1610_cmpr(cpustate, 7,4); break;
+ case 0x17d: /* 0 101 111 101 */ cp1610_cmpr(cpustate, 7,5); break;
+ case 0x17e: /* 0 101 111 110 */ cp1610_cmpr(cpustate, 7,6); break;
+ case 0x17f: /* 0 101 111 111 */ cp1610_cmpr(cpustate, 7,7); break;
+
+ case 0x180: /* 0 110 000 000 */ cp1610_andr(cpustate, 0,0); break;
+ case 0x181: /* 0 110 000 001 */ cp1610_andr(cpustate, 0,1); break;
+ case 0x182: /* 0 110 000 010 */ cp1610_andr(cpustate, 0,2); break;
+ case 0x183: /* 0 110 000 011 */ cp1610_andr(cpustate, 0,3); break;
+ case 0x184: /* 0 110 000 100 */ cp1610_andr(cpustate, 0,4); break;
+ case 0x185: /* 0 110 000 101 */ cp1610_andr(cpustate, 0,5); break;
+ case 0x186: /* 0 110 000 110 */ cp1610_andr(cpustate, 0,6); break;
+ case 0x187: /* 0 110 000 111 */ cp1610_andr(cpustate, 0,7); break;
+
+ case 0x188: /* 0 110 001 000 */ cp1610_andr(cpustate, 1,0); break;
+ case 0x189: /* 0 110 001 001 */ cp1610_andr(cpustate, 1,1); break;
+ case 0x18a: /* 0 110 001 010 */ cp1610_andr(cpustate, 1,2); break;
+ case 0x18b: /* 0 110 001 011 */ cp1610_andr(cpustate, 1,3); break;
+ case 0x18c: /* 0 110 001 100 */ cp1610_andr(cpustate, 1,4); break;
+ case 0x18d: /* 0 110 001 101 */ cp1610_andr(cpustate, 1,5); break;
+ case 0x18e: /* 0 110 001 110 */ cp1610_andr(cpustate, 1,6); break;
+ case 0x18f: /* 0 110 001 111 */ cp1610_andr(cpustate, 1,7); break;
+
+ case 0x190: /* 0 110 010 000 */ cp1610_andr(cpustate, 2,0); break;
+ case 0x191: /* 0 110 010 001 */ cp1610_andr(cpustate, 2,1); break;
+ case 0x192: /* 0 110 010 010 */ cp1610_andr(cpustate, 2,2); break;
+ case 0x193: /* 0 110 010 011 */ cp1610_andr(cpustate, 2,3); break;
+ case 0x194: /* 0 110 010 100 */ cp1610_andr(cpustate, 2,4); break;
+ case 0x195: /* 0 110 010 101 */ cp1610_andr(cpustate, 2,5); break;
+ case 0x196: /* 0 110 010 110 */ cp1610_andr(cpustate, 2,6); break;
+ case 0x197: /* 0 110 010 111 */ cp1610_andr(cpustate, 2,7); break;
+
+ case 0x198: /* 0 110 011 000 */ cp1610_andr(cpustate, 3,0); break;
+ case 0x199: /* 0 110 011 001 */ cp1610_andr(cpustate, 3,1); break;
+ case 0x19a: /* 0 110 011 010 */ cp1610_andr(cpustate, 3,2); break;
+ case 0x19b: /* 0 110 011 011 */ cp1610_andr(cpustate, 3,3); break;
+ case 0x19c: /* 0 110 011 100 */ cp1610_andr(cpustate, 3,4); break;
+ case 0x19d: /* 0 110 011 101 */ cp1610_andr(cpustate, 3,5); break;
+ case 0x19e: /* 0 110 011 110 */ cp1610_andr(cpustate, 3,6); break;
+ case 0x19f: /* 0 110 011 111 */ cp1610_andr(cpustate, 3,7); break;
+
+ case 0x1a0: /* 0 110 100 000 */ cp1610_andr(cpustate, 4,0); break;
+ case 0x1a1: /* 0 110 100 001 */ cp1610_andr(cpustate, 4,1); break;
+ case 0x1a2: /* 0 110 100 010 */ cp1610_andr(cpustate, 4,2); break;
+ case 0x1a3: /* 0 110 100 011 */ cp1610_andr(cpustate, 4,3); break;
+ case 0x1a4: /* 0 110 100 100 */ cp1610_andr(cpustate, 4,4); break;
+ case 0x1a5: /* 0 110 100 101 */ cp1610_andr(cpustate, 4,5); break;
+ case 0x1a6: /* 0 110 100 110 */ cp1610_andr(cpustate, 4,6); break;
+ case 0x1a7: /* 0 110 100 111 */ cp1610_andr(cpustate, 4,7); break;
+
+ case 0x1a8: /* 0 110 101 000 */ cp1610_andr(cpustate, 5,0); break;
+ case 0x1a9: /* 0 110 101 001 */ cp1610_andr(cpustate, 5,1); break;
+ case 0x1aa: /* 0 110 101 010 */ cp1610_andr(cpustate, 5,2); break;
+ case 0x1ab: /* 0 110 101 011 */ cp1610_andr(cpustate, 5,3); break;
+ case 0x1ac: /* 0 110 101 100 */ cp1610_andr(cpustate, 5,4); break;
+ case 0x1ad: /* 0 110 101 101 */ cp1610_andr(cpustate, 5,5); break;
+ case 0x1ae: /* 0 110 101 110 */ cp1610_andr(cpustate, 5,6); break;
+ case 0x1af: /* 0 110 101 111 */ cp1610_andr(cpustate, 5,7); break;
+
+ case 0x1b0: /* 0 110 110 000 */ cp1610_andr(cpustate, 6,0); break;
+ case 0x1b1: /* 0 110 110 001 */ cp1610_andr(cpustate, 6,1); break;
+ case 0x1b2: /* 0 110 110 010 */ cp1610_andr(cpustate, 6,2); break;
+ case 0x1b3: /* 0 110 110 011 */ cp1610_andr(cpustate, 6,3); break;
+ case 0x1b4: /* 0 110 110 100 */ cp1610_andr(cpustate, 6,4); break;
+ case 0x1b5: /* 0 110 110 101 */ cp1610_andr(cpustate, 6,5); break;
+ case 0x1b6: /* 0 110 110 110 */ cp1610_andr(cpustate, 6,6); break;
+ case 0x1b7: /* 0 110 110 111 */ cp1610_andr(cpustate, 6,7); break;
+
+ case 0x1b8: /* 0 110 111 000 */ cp1610_andr(cpustate, 7,0); break;
+ case 0x1b9: /* 0 110 111 001 */ cp1610_andr(cpustate, 7,1); break;
+ case 0x1ba: /* 0 110 111 010 */ cp1610_andr(cpustate, 7,2); break;
+ case 0x1bb: /* 0 110 111 011 */ cp1610_andr(cpustate, 7,3); break;
+ case 0x1bc: /* 0 110 111 100 */ cp1610_andr(cpustate, 7,4); break;
+ case 0x1bd: /* 0 110 111 101 */ cp1610_andr(cpustate, 7,5); break;
+ case 0x1be: /* 0 110 111 110 */ cp1610_andr(cpustate, 7,6); break;
+ case 0x1bf: /* 0 110 111 111 */ cp1610_andr(cpustate, 7,7); break;
+
+ case 0x1c0: /* 0 111 000 000 */ cp1610_clrr(cpustate, 0); break;
+ case 0x1c1: /* 0 111 000 001 */ cp1610_xorr(cpustate, 0,1); break;
+ case 0x1c2: /* 0 111 000 010 */ cp1610_xorr(cpustate, 0,2); break;
+ case 0x1c3: /* 0 111 000 011 */ cp1610_xorr(cpustate, 0,3); break;
+ case 0x1c4: /* 0 111 000 100 */ cp1610_xorr(cpustate, 0,4); break;
+ case 0x1c5: /* 0 111 000 101 */ cp1610_xorr(cpustate, 0,5); break;
+ case 0x1c6: /* 0 111 000 110 */ cp1610_xorr(cpustate, 0,6); break;
+ case 0x1c7: /* 0 111 000 111 */ cp1610_xorr(cpustate, 0,7); break;
+
+ case 0x1c8: /* 0 111 001 000 */ cp1610_xorr(cpustate, 1,0); break;
+ case 0x1c9: /* 0 111 001 001 */ cp1610_clrr(cpustate, 1); break;
+ case 0x1ca: /* 0 111 001 010 */ cp1610_xorr(cpustate, 1,2); break;
+ case 0x1cb: /* 0 111 001 011 */ cp1610_xorr(cpustate, 1,3); break;
+ case 0x1cc: /* 0 111 001 100 */ cp1610_xorr(cpustate, 1,4); break;
+ case 0x1cd: /* 0 111 001 101 */ cp1610_xorr(cpustate, 1,5); break;
+ case 0x1ce: /* 0 111 001 110 */ cp1610_xorr(cpustate, 1,6); break;
+ case 0x1cf: /* 0 111 001 111 */ cp1610_xorr(cpustate, 1,7); break;
+
+ case 0x1d0: /* 0 111 010 000 */ cp1610_xorr(cpustate, 2,0); break;
+ case 0x1d1: /* 0 111 010 001 */ cp1610_xorr(cpustate, 2,1); break;
+ case 0x1d2: /* 0 111 010 010 */ cp1610_clrr(cpustate, 2); break;
+ case 0x1d3: /* 0 111 010 011 */ cp1610_xorr(cpustate, 2,3); break;
+ case 0x1d4: /* 0 111 010 100 */ cp1610_xorr(cpustate, 2,4); break;
+ case 0x1d5: /* 0 111 010 101 */ cp1610_xorr(cpustate, 2,5); break;
+ case 0x1d6: /* 0 111 010 110 */ cp1610_xorr(cpustate, 2,6); break;
+ case 0x1d7: /* 0 111 010 111 */ cp1610_xorr(cpustate, 2,7); break;
+
+ case 0x1d8: /* 0 111 011 000 */ cp1610_xorr(cpustate, 3,0); break;
+ case 0x1d9: /* 0 111 011 001 */ cp1610_xorr(cpustate, 3,1); break;
+ case 0x1da: /* 0 111 011 010 */ cp1610_xorr(cpustate, 3,2); break;
+ case 0x1db: /* 0 111 011 011 */ cp1610_clrr(cpustate, 3); break;
+ case 0x1dc: /* 0 111 011 100 */ cp1610_xorr(cpustate, 3,4); break;
+ case 0x1dd: /* 0 111 011 101 */ cp1610_xorr(cpustate, 3,5); break;
+ case 0x1de: /* 0 111 011 110 */ cp1610_xorr(cpustate, 3,6); break;
+ case 0x1df: /* 0 111 011 111 */ cp1610_xorr(cpustate, 3,7); break;
+
+ case 0x1e0: /* 0 111 100 000 */ cp1610_xorr(cpustate, 4,0); break;
+ case 0x1e1: /* 0 111 100 001 */ cp1610_xorr(cpustate, 4,1); break;
+ case 0x1e2: /* 0 111 100 010 */ cp1610_xorr(cpustate, 4,2); break;
+ case 0x1e3: /* 0 111 100 011 */ cp1610_xorr(cpustate, 4,3); break;
+ case 0x1e4: /* 0 111 100 100 */ cp1610_clrr(cpustate, 4); break;
+ case 0x1e5: /* 0 111 100 101 */ cp1610_xorr(cpustate, 4,5); break;
+ case 0x1e6: /* 0 111 100 110 */ cp1610_xorr(cpustate, 4,6); break;
+ case 0x1e7: /* 0 111 100 111 */ cp1610_xorr(cpustate, 4,7); break;
+
+ case 0x1e8: /* 0 111 101 000 */ cp1610_xorr(cpustate, 5,0); break;
+ case 0x1e9: /* 0 111 101 001 */ cp1610_xorr(cpustate, 5,1); break;
+ case 0x1ea: /* 0 111 101 010 */ cp1610_xorr(cpustate, 5,2); break;
+ case 0x1eb: /* 0 111 101 011 */ cp1610_xorr(cpustate, 5,3); break;
+ case 0x1ec: /* 0 111 101 100 */ cp1610_xorr(cpustate, 5,4); break;
+ case 0x1ed: /* 0 111 101 101 */ cp1610_clrr(cpustate, 5); break;
+ case 0x1ee: /* 0 111 101 110 */ cp1610_xorr(cpustate, 5,6); break;
+ case 0x1ef: /* 0 111 101 111 */ cp1610_xorr(cpustate, 5,7); break;
+
+ case 0x1f0: /* 0 111 110 000 */ cp1610_xorr(cpustate, 6,0); break;
+ case 0x1f1: /* 0 111 110 001 */ cp1610_xorr(cpustate, 6,1); break;
+ case 0x1f2: /* 0 111 110 010 */ cp1610_xorr(cpustate, 6,2); break;
+ case 0x1f3: /* 0 111 110 011 */ cp1610_xorr(cpustate, 6,3); break;
+ case 0x1f4: /* 0 111 110 100 */ cp1610_xorr(cpustate, 6,4); break;
+ case 0x1f5: /* 0 111 110 101 */ cp1610_xorr(cpustate, 6,5); break;
+ case 0x1f6: /* 0 111 110 110 */ cp1610_clrr(cpustate, 6); break;
+ case 0x1f7: /* 0 111 110 111 */ cp1610_xorr(cpustate, 6,7); break;
+
+ case 0x1f8: /* 0 111 111 000 */ cp1610_xorr(cpustate, 7,0); break;
+ case 0x1f9: /* 0 111 111 001 */ cp1610_xorr(cpustate, 7,1); break;
+ case 0x1fa: /* 0 111 111 010 */ cp1610_xorr(cpustate, 7,2); break;
+ case 0x1fb: /* 0 111 111 011 */ cp1610_xorr(cpustate, 7,3); break;
+ case 0x1fc: /* 0 111 111 100 */ cp1610_xorr(cpustate, 7,4); break;
+ case 0x1fd: /* 0 111 111 101 */ cp1610_xorr(cpustate, 7,5); break;
+ case 0x1fe: /* 0 111 111 110 */ cp1610_xorr(cpustate, 7,6); break;
+ case 0x1ff: /* 0 110 111 111 */ cp1610_clrr(cpustate, 7); break;
+
+ case 0x200: /* 1 000 000 000 */ cp1610_b(cpustate, 0); break;
+ case 0x201: /* 1 000 000 001 */ cp1610_bc(cpustate, 0); break; /* aka BLGE */
+ case 0x202: /* 1 000 000 010 */ cp1610_bov(cpustate, 0); break;
+ case 0x203: /* 1 000 000 011 */ cp1610_bpl(cpustate, 0); break;
+ case 0x204: /* 1 000 000 100 */ cp1610_bze(cpustate, 0); break; /* aka BEQ */
+ case 0x205: /* 1 000 000 101 */ cp1610_blt(cpustate, 0); break;
+ case 0x206: /* 1 000 000 110 */ cp1610_ble(cpustate, 0); break;
+ case 0x207: /* 1 000 000 111 */ cp1610_busc(cpustate, 0); break;
+
+ case 0x208: /* 1 000 001 000 */ cp1610_nopp(cpustate, 0); break;
+ case 0x209: /* 1 000 001 001 */ cp1610_bnc(cpustate, 0); break; /* aka BLLT */
+ case 0x20a: /* 1 000 001 010 */ cp1610_bnov(cpustate, 0); break;
+ case 0x20b: /* 1 000 001 011 */ cp1610_bmi(cpustate, 0); break;
+ case 0x20c: /* 1 000 001 100 */ cp1610_bnze(cpustate, 0); break; /* aka BNEQ */
+ case 0x20d: /* 1 000 001 101 */ cp1610_bge(cpustate, 0); break;
+ case 0x20e: /* 1 000 001 110 */ cp1610_bgt(cpustate, 0); break;
+ case 0x20f: /* 1 000 001 111 */ cp1610_besc(cpustate, 0); break;
+
+ case 0x210: /* 1 000 010 000 */ cp1610_bext(cpustate, 0,0); break;
+ case 0x211: /* 1 000 010 001 */ cp1610_bext(cpustate, 1,0); break;
+ case 0x212: /* 1 000 010 010 */ cp1610_bext(cpustate, 2,0); break;
+ case 0x213: /* 1 000 010 011 */ cp1610_bext(cpustate, 3,0); break;
+ case 0x214: /* 1 000 010 100 */ cp1610_bext(cpustate, 4,0); break;
+ case 0x215: /* 1 000 010 101 */ cp1610_bext(cpustate, 5,0); break;
+ case 0x216: /* 1 000 010 110 */ cp1610_bext(cpustate, 6,0); break;
+ case 0x217: /* 1 000 010 111 */ cp1610_bext(cpustate, 7,0); break;
+
+ case 0x218: /* 1 000 011 000 */ cp1610_bext(cpustate, 8,0); break;
+ case 0x219: /* 1 000 011 001 */ cp1610_bext(cpustate, 9,0); break;
+ case 0x21a: /* 1 000 011 010 */ cp1610_bext(cpustate, 10,0); break;
+ case 0x21b: /* 1 000 011 011 */ cp1610_bext(cpustate, 11,0); break;
+ case 0x21c: /* 1 000 011 100 */ cp1610_bext(cpustate, 12,0); break;
+ case 0x21d: /* 1 000 011 101 */ cp1610_bext(cpustate, 13,0); break;
+ case 0x21e: /* 1 000 011 110 */ cp1610_bext(cpustate, 14,0); break;
+ case 0x21f: /* 1 000 011 111 */ cp1610_bext(cpustate, 15,0); break;
+
+ case 0x220: /* 1 000 100 000 */ cp1610_b(cpustate, 0xffff); break;
+ case 0x221: /* 1 000 100 001 */ cp1610_bc(cpustate, 0xffff); break; /* aka BLGE */
+ case 0x222: /* 1 000 100 010 */ cp1610_bov(cpustate, 0xffff); break;
+ case 0x223: /* 1 000 100 011 */ cp1610_bpl(cpustate, 0xffff); break;
+ case 0x224: /* 1 000 100 100 */ cp1610_bze(cpustate, 0xffff); break; /* aka BEQ */
+ case 0x225: /* 1 000 100 101 */ cp1610_blt(cpustate, 0xffff); break;
+ case 0x226: /* 1 000 100 110 */ cp1610_ble(cpustate, 0xffff); break;
+ case 0x227: /* 1 000 100 111 */ cp1610_busc(cpustate, 0xffff); break;
+
+ case 0x228: /* 1 000 101 000 */ cp1610_nopp(cpustate, 0xffff); break;
+ case 0x229: /* 1 000 101 001 */ cp1610_bnc(cpustate, 0xffff); break; /* aka BLLT */
+ case 0x22a: /* 1 000 101 010 */ cp1610_bnov(cpustate, 0xffff); break;
+ case 0x22b: /* 1 000 101 011 */ cp1610_bmi(cpustate, 0xffff); break;
+ case 0x22c: /* 1 000 101 100 */ cp1610_bnze(cpustate, 0xffff); break; /* aka BNEQ */
+ case 0x22d: /* 1 000 101 101 */ cp1610_bge(cpustate, 0xffff); break;
+ case 0x22e: /* 1 000 101 110 */ cp1610_bgt(cpustate, 0xffff); break;
+ case 0x22f: /* 1 000 101 111 */ cp1610_besc(cpustate, 0xffff); break;
+
+ case 0x230: /* 1 000 110 000 */ cp1610_bext(cpustate, 0,0xffff); break;
+ case 0x231: /* 1 000 110 001 */ cp1610_bext(cpustate, 1,0xffff); break;
+ case 0x232: /* 1 000 110 010 */ cp1610_bext(cpustate, 2,0xffff); break;
+ case 0x233: /* 1 000 110 011 */ cp1610_bext(cpustate, 3,0xffff); break;
+ case 0x234: /* 1 000 110 100 */ cp1610_bext(cpustate, 4,0xffff); break;
+ case 0x235: /* 1 000 110 101 */ cp1610_bext(cpustate, 5,0xffff); break;
+ case 0x236: /* 1 000 110 110 */ cp1610_bext(cpustate, 6,0xffff); break;
+ case 0x237: /* 1 000 110 111 */ cp1610_bext(cpustate, 7,0xffff); break;
+
+ case 0x238: /* 1 000 111 000 */ cp1610_bext(cpustate, 8,0xffff); break;
+ case 0x239: /* 1 000 111 001 */ cp1610_bext(cpustate, 9,0xffff); break;
+ case 0x23a: /* 1 000 111 010 */ cp1610_bext(cpustate, 10,0xffff); break;
+ case 0x23b: /* 1 000 111 011 */ cp1610_bext(cpustate, 11,0xffff); break;
+ case 0x23c: /* 1 000 111 100 */ cp1610_bext(cpustate, 12,0xffff); break;
+ case 0x23d: /* 1 000 111 101 */ cp1610_bext(cpustate, 13,0xffff); break;
+ case 0x23e: /* 1 000 111 110 */ cp1610_bext(cpustate, 14,0xffff); break;
+ case 0x23f: /* 1 000 111 111 */ cp1610_bext(cpustate, 15,0xffff); break;
+
+ case 0x240: /* 1 001 000 000 */ cp1610_mvo(cpustate, 0); break;
+ case 0x241: /* 1 001 000 001 */ cp1610_mvo(cpustate, 1); break;
+ case 0x242: /* 1 001 000 010 */ cp1610_mvo(cpustate, 2); break;
+ case 0x243: /* 1 001 000 011 */ cp1610_mvo(cpustate, 3); break;
+ case 0x244: /* 1 001 000 100 */ cp1610_mvo(cpustate, 4); break;
+ case 0x245: /* 1 001 000 101 */ cp1610_mvo(cpustate, 5); break;
+ case 0x246: /* 1 001 000 110 */ cp1610_mvo(cpustate, 6); break;
+ case 0x247: /* 1 001 000 111 */ cp1610_mvo(cpustate, 7); break;
+
+ case 0x248: /* 1 001 001 000 */ cp1610_mvoat(cpustate, 0,1); break;
+ case 0x249: /* 1 001 001 001 */ cp1610_mvoat(cpustate, 1,1); break;
+ case 0x24a: /* 1 001 001 010 */ cp1610_mvoat(cpustate, 2,1); break;
+ case 0x24b: /* 1 001 001 011 */ cp1610_mvoat(cpustate, 3,1); break;
+ case 0x24c: /* 1 001 001 100 */ cp1610_mvoat(cpustate, 4,1); break;
+ case 0x24d: /* 1 001 001 101 */ cp1610_mvoat(cpustate, 5,1); break;
+ case 0x24e: /* 1 001 001 110 */ cp1610_mvoat(cpustate, 6,1); break;
+ case 0x24f: /* 1 001 001 111 */ cp1610_mvoat(cpustate, 7,1); break;
+
+ case 0x250: /* 1 001 010 000 */ cp1610_mvoat(cpustate, 0,2); break;
+ case 0x251: /* 1 001 010 001 */ cp1610_mvoat(cpustate, 1,2); break;
+ case 0x252: /* 1 001 010 010 */ cp1610_mvoat(cpustate, 2,2); break;
+ case 0x253: /* 1 001 010 011 */ cp1610_mvoat(cpustate, 3,2); break;
+ case 0x254: /* 1 001 010 100 */ cp1610_mvoat(cpustate, 4,2); break;
+ case 0x255: /* 1 001 010 101 */ cp1610_mvoat(cpustate, 5,2); break;
+ case 0x256: /* 1 001 010 110 */ cp1610_mvoat(cpustate, 6,2); break;
+ case 0x257: /* 1 001 010 111 */ cp1610_mvoat(cpustate, 7,2); break;
+
+ case 0x258: /* 1 001 011 000 */ cp1610_mvoat(cpustate, 0,3); break;
+ case 0x259: /* 1 001 011 001 */ cp1610_mvoat(cpustate, 1,3); break;
+ case 0x25a: /* 1 001 011 010 */ cp1610_mvoat(cpustate, 2,3); break;
+ case 0x25b: /* 1 001 011 011 */ cp1610_mvoat(cpustate, 3,3); break;
+ case 0x25c: /* 1 001 011 100 */ cp1610_mvoat(cpustate, 4,3); break;
+ case 0x25d: /* 1 001 011 101 */ cp1610_mvoat(cpustate, 5,3); break;
+ case 0x25e: /* 1 001 011 110 */ cp1610_mvoat(cpustate, 6,3); break;
+ case 0x25f: /* 1 001 011 111 */ cp1610_mvoat(cpustate, 7,3); break;
+
+ case 0x260: /* 1 001 100 000 */ cp1610_mvoat_i(cpustate, 0,4); break;
+ case 0x261: /* 1 001 100 001 */ cp1610_mvoat_i(cpustate, 1,4); break;
+ case 0x262: /* 1 001 100 010 */ cp1610_mvoat_i(cpustate, 2,4); break;
+ case 0x263: /* 1 001 100 011 */ cp1610_mvoat_i(cpustate, 3,4); break;
+ case 0x264: /* 1 001 100 100 */ cp1610_mvoat_i(cpustate, 4,4); break;
+ case 0x265: /* 1 001 100 101 */ cp1610_mvoat_i(cpustate, 5,4); break;
+ case 0x266: /* 1 001 100 110 */ cp1610_mvoat_i(cpustate, 6,4); break;
+ case 0x267: /* 1 001 100 111 */ cp1610_mvoat_i(cpustate, 7,4); break;
+
+ case 0x268: /* 1 001 101 000 */ cp1610_mvoat_i(cpustate, 0,5); break;
+ case 0x269: /* 1 001 101 001 */ cp1610_mvoat_i(cpustate, 1,5); break;
+ case 0x26a: /* 1 001 101 010 */ cp1610_mvoat_i(cpustate, 2,5); break;
+ case 0x26b: /* 1 001 101 011 */ cp1610_mvoat_i(cpustate, 3,5); break;
+ case 0x26c: /* 1 001 101 100 */ cp1610_mvoat_i(cpustate, 4,5); break;
+ case 0x26d: /* 1 001 101 101 */ cp1610_mvoat_i(cpustate, 5,5); break;
+ case 0x26e: /* 1 001 101 110 */ cp1610_mvoat_i(cpustate, 6,5); break;
+ case 0x26f: /* 1 001 101 111 */ cp1610_mvoat_i(cpustate, 7,5); break;
+
+ case 0x270: /* 1 001 110 000 */ cp1610_mvoat_i(cpustate, 0,6); break; /* pshr */
+ case 0x271: /* 1 001 110 001 */ cp1610_mvoat_i(cpustate, 1,6); break; /* pshr */
+ case 0x272: /* 1 001 110 010 */ cp1610_mvoat_i(cpustate, 2,6); break; /* pshr */
+ case 0x273: /* 1 001 110 011 */ cp1610_mvoat_i(cpustate, 3,6); break; /* pshr */
+ case 0x274: /* 1 001 110 100 */ cp1610_mvoat_i(cpustate, 4,6); break; /* pshr */
+ case 0x275: /* 1 001 110 101 */ cp1610_mvoat_i(cpustate, 5,6); break; /* pshr */
+ case 0x276: /* 1 001 110 110 */ cp1610_mvoat_i(cpustate, 6,6); break; /* pshr */
+ case 0x277: /* 1 001 110 111 */ cp1610_mvoat_i(cpustate, 7,6); break; /* pshr */
+
+ case 0x278: /* 1 001 111 000 */ cp1610_mvoi(cpustate, 0); break;
+ case 0x279: /* 1 001 111 001 */ cp1610_mvoi(cpustate, 1); break;
+ case 0x27a: /* 1 001 111 010 */ cp1610_mvoi(cpustate, 2); break;
+ case 0x27b: /* 1 001 111 011 */ cp1610_mvoi(cpustate, 3); break;
+ case 0x27c: /* 1 001 111 100 */ cp1610_mvoi(cpustate, 4); break;
+ case 0x27d: /* 1 001 111 101 */ cp1610_mvoi(cpustate, 5); break;
+ case 0x27e: /* 1 001 111 110 */ cp1610_mvoi(cpustate, 6); break;
+ case 0x27f: /* 1 001 111 111 */ cp1610_mvoi(cpustate, 7); break;
+
+ case 0x280: /* 1 010 000 000 */ cp1610_mvi(cpustate, 0); break;
+ case 0x281: /* 1 010 000 001 */ cp1610_mvi(cpustate, 1); break;
+ case 0x282: /* 1 010 000 010 */ cp1610_mvi(cpustate, 2); break;
+ case 0x283: /* 1 010 000 011 */ cp1610_mvi(cpustate, 3); break;
+ case 0x284: /* 1 010 000 100 */ cp1610_mvi(cpustate, 4); break;
+ case 0x285: /* 1 010 000 101 */ cp1610_mvi(cpustate, 5); break;
+ case 0x286: /* 1 010 000 110 */ cp1610_mvi(cpustate, 6); break;
+ case 0x287: /* 1 010 000 111 */ cp1610_mvi(cpustate, 7); break;
+
+ case 0x288: /* 1 010 001 000 */ cp1610_mviat(cpustate, 1,0); break;
+ case 0x289: /* 1 010 001 001 */ cp1610_mviat(cpustate, 1,1); break;
+ case 0x28a: /* 1 010 001 010 */ cp1610_mviat(cpustate, 1,2); break;
+ case 0x28b: /* 1 010 001 011 */ cp1610_mviat(cpustate, 1,3); break;
+ case 0x28c: /* 1 010 001 100 */ cp1610_mviat(cpustate, 1,4); break;
+ case 0x28d: /* 1 010 001 101 */ cp1610_mviat(cpustate, 1,5); break;
+ case 0x28e: /* 1 010 001 110 */ cp1610_mviat(cpustate, 1,6); break;
+ case 0x28f: /* 1 010 001 111 */ cp1610_mviat(cpustate, 1,7); break;
+
+ case 0x290: /* 1 010 010 000 */ cp1610_mviat(cpustate, 2,0); break;
+ case 0x291: /* 1 010 010 001 */ cp1610_mviat(cpustate, 2,1); break;
+ case 0x292: /* 1 010 010 010 */ cp1610_mviat(cpustate, 2,2); break;
+ case 0x293: /* 1 010 010 011 */ cp1610_mviat(cpustate, 2,3); break;
+ case 0x294: /* 1 010 010 100 */ cp1610_mviat(cpustate, 2,4); break;
+ case 0x295: /* 1 010 010 101 */ cp1610_mviat(cpustate, 2,5); break;
+ case 0x296: /* 1 010 010 110 */ cp1610_mviat(cpustate, 2,6); break;
+ case 0x297: /* 1 010 010 111 */ cp1610_mviat(cpustate, 2,7); break;
+
+ case 0x298: /* 1 010 011 000 */ cp1610_mviat(cpustate, 3,0); break;
+ case 0x299: /* 1 010 011 001 */ cp1610_mviat(cpustate, 3,1); break;
+ case 0x29a: /* 1 010 011 010 */ cp1610_mviat(cpustate, 3,2); break;
+ case 0x29b: /* 1 010 011 011 */ cp1610_mviat(cpustate, 3,3); break;
+ case 0x29c: /* 1 010 011 100 */ cp1610_mviat(cpustate, 3,4); break;
+ case 0x29d: /* 1 010 011 101 */ cp1610_mviat(cpustate, 3,5); break;
+ case 0x29e: /* 1 010 011 110 */ cp1610_mviat(cpustate, 3,6); break;
+ case 0x29f: /* 1 010 011 111 */ cp1610_mviat(cpustate, 3,7); break;
+
+ case 0x2a0: /* 1 010 100 000 */ cp1610_mviat_i(cpustate, 4,0); break;
+ case 0x2a1: /* 1 010 100 001 */ cp1610_mviat_i(cpustate, 4,1); break;
+ case 0x2a2: /* 1 010 100 010 */ cp1610_mviat_i(cpustate, 4,2); break;
+ case 0x2a3: /* 1 010 100 011 */ cp1610_mviat_i(cpustate, 4,3); break;
+ case 0x2a4: /* 1 010 100 100 */ cp1610_mviat_i(cpustate, 4,4); break;
+ case 0x2a5: /* 1 010 100 101 */ cp1610_mviat_i(cpustate, 4,5); break;
+ case 0x2a6: /* 1 010 100 110 */ cp1610_mviat_i(cpustate, 4,6); break;
+ case 0x2a7: /* 1 010 100 111 */ cp1610_mviat_i(cpustate, 4,7); break;
+
+ case 0x2a8: /* 1 010 101 000 */ cp1610_mviat_i(cpustate, 5,0); break;
+ case 0x2a9: /* 1 010 101 001 */ cp1610_mviat_i(cpustate, 5,1); break;
+ case 0x2aa: /* 1 010 101 010 */ cp1610_mviat_i(cpustate, 5,2); break;
+ case 0x2ab: /* 1 010 101 011 */ cp1610_mviat_i(cpustate, 5,3); break;
+ case 0x2ac: /* 1 010 101 100 */ cp1610_mviat_i(cpustate, 5,4); break;
+ case 0x2ad: /* 1 010 101 101 */ cp1610_mviat_i(cpustate, 5,5); break;
+ case 0x2ae: /* 1 010 101 110 */ cp1610_mviat_i(cpustate, 5,6); break;
+ case 0x2af: /* 1 010 101 111 */ cp1610_mviat_i(cpustate, 5,7); break;
+
+ case 0x2b0: /* 1 010 110 000 */ cp1610_pulr(cpustate, 0); break;
+ case 0x2b1: /* 1 010 110 001 */ cp1610_pulr(cpustate, 1); break;
+ case 0x2b2: /* 1 010 110 010 */ cp1610_pulr(cpustate, 2); break;
+ case 0x2b3: /* 1 010 110 011 */ cp1610_pulr(cpustate, 3); break;
+ case 0x2b4: /* 1 010 110 100 */ cp1610_pulr(cpustate, 4); break;
+ case 0x2b5: /* 1 010 110 101 */ cp1610_pulr(cpustate, 5); break;
+ case 0x2b6: /* 1 010 110 110 */ cp1610_pulr(cpustate, 6); break;
+ case 0x2b7: /* 1 010 110 111 */ cp1610_pulr(cpustate, 7); break;
+
+ case 0x2b8: /* 1 010 111 000 */ cp1610_mvii(cpustate, 0); break;
+ case 0x2b9: /* 1 010 111 001 */ cp1610_mvii(cpustate, 1); break;
+ case 0x2ba: /* 1 010 111 010 */ cp1610_mvii(cpustate, 2); break;
+ case 0x2bb: /* 1 010 111 011 */ cp1610_mvii(cpustate, 3); break;
+ case 0x2bc: /* 1 010 111 100 */ cp1610_mvii(cpustate, 4); break;
+ case 0x2bd: /* 1 010 111 101 */ cp1610_mvii(cpustate, 5); break;
+ case 0x2be: /* 1 010 111 110 */ cp1610_mvii(cpustate, 6); break;
+ case 0x2bf: /* 1 010 111 111 */ cp1610_mvii(cpustate, 7); break;
+
+ case 0x2c0: /* 1 011 000 000 */ cp1610_add(cpustate, 0); break;
+ case 0x2c1: /* 1 011 000 001 */ cp1610_add(cpustate, 1); break;
+ case 0x2c2: /* 1 011 000 010 */ cp1610_add(cpustate, 2); break;
+ case 0x2c3: /* 1 011 000 011 */ cp1610_add(cpustate, 3); break;
+ case 0x2c4: /* 1 011 000 100 */ cp1610_add(cpustate, 4); break;
+ case 0x2c5: /* 1 011 000 101 */ cp1610_add(cpustate, 5); break;
+ case 0x2c6: /* 1 011 000 110 */ cp1610_add(cpustate, 6); break;
+ case 0x2c7: /* 1 011 000 111 */ cp1610_add(cpustate, 7); break;
+
+ case 0x2c8: /* 1 011 001 000 */ cp1610_addat(cpustate, 1,0); break;
+ case 0x2c9: /* 1 011 001 001 */ cp1610_addat(cpustate, 1,1); break;
+ case 0x2ca: /* 1 011 001 010 */ cp1610_addat(cpustate, 1,2); break;
+ case 0x2cb: /* 1 011 001 011 */ cp1610_addat(cpustate, 1,3); break;
+ case 0x2cc: /* 1 011 001 100 */ cp1610_addat(cpustate, 1,4); break;
+ case 0x2cd: /* 1 011 001 101 */ cp1610_addat(cpustate, 1,5); break;
+ case 0x2ce: /* 1 011 001 110 */ cp1610_addat(cpustate, 1,6); break;
+ case 0x2cf: /* 1 011 001 111 */ cp1610_addat(cpustate, 1,7); break;
+
+ case 0x2d0: /* 1 011 010 000 */ cp1610_addat(cpustate, 2,0); break;
+ case 0x2d1: /* 1 011 010 001 */ cp1610_addat(cpustate, 2,1); break;
+ case 0x2d2: /* 1 011 010 010 */ cp1610_addat(cpustate, 2,2); break;
+ case 0x2d3: /* 1 011 010 011 */ cp1610_addat(cpustate, 2,3); break;
+ case 0x2d4: /* 1 011 010 100 */ cp1610_addat(cpustate, 2,4); break;
+ case 0x2d5: /* 1 011 010 101 */ cp1610_addat(cpustate, 2,5); break;
+ case 0x2d6: /* 1 011 010 110 */ cp1610_addat(cpustate, 2,6); break;
+ case 0x2d7: /* 1 011 010 111 */ cp1610_addat(cpustate, 2,7); break;
+
+ case 0x2d8: /* 1 011 011 000 */ cp1610_addat(cpustate, 3,0); break;
+ case 0x2d9: /* 1 011 011 001 */ cp1610_addat(cpustate, 3,1); break;
+ case 0x2da: /* 1 011 011 010 */ cp1610_addat(cpustate, 3,2); break;
+ case 0x2db: /* 1 011 011 011 */ cp1610_addat(cpustate, 3,3); break;
+ case 0x2dc: /* 1 011 011 100 */ cp1610_addat(cpustate, 3,4); break;
+ case 0x2dd: /* 1 011 011 101 */ cp1610_addat(cpustate, 3,5); break;
+ case 0x2de: /* 1 011 011 110 */ cp1610_addat(cpustate, 3,6); break;
+ case 0x2df: /* 1 011 011 111 */ cp1610_addat(cpustate, 3,7); break;
+
+ case 0x2e0: /* 1 011 100 000 */ cp1610_addat_i(cpustate, 4,0); break;
+ case 0x2e1: /* 1 011 100 001 */ cp1610_addat_i(cpustate, 4,1); break;
+ case 0x2e2: /* 1 011 100 010 */ cp1610_addat_i(cpustate, 4,2); break;
+ case 0x2e3: /* 1 011 100 011 */ cp1610_addat_i(cpustate, 4,3); break;
+ case 0x2e4: /* 1 011 100 100 */ cp1610_addat_i(cpustate, 4,4); break;
+ case 0x2e5: /* 1 011 100 101 */ cp1610_addat_i(cpustate, 4,5); break;
+ case 0x2e6: /* 1 011 100 110 */ cp1610_addat_i(cpustate, 4,6); break;
+ case 0x2e7: /* 1 011 100 111 */ cp1610_addat_i(cpustate, 4,7); break;
+
+ case 0x2e8: /* 1 011 101 000 */ cp1610_addat_i(cpustate, 5,0); break;
+ case 0x2e9: /* 1 011 101 001 */ cp1610_addat_i(cpustate, 5,1); break;
+ case 0x2ea: /* 1 011 101 010 */ cp1610_addat_i(cpustate, 5,2); break;
+ case 0x2eb: /* 1 011 101 011 */ cp1610_addat_i(cpustate, 5,3); break;
+ case 0x2ec: /* 1 011 101 100 */ cp1610_addat_i(cpustate, 5,4); break;
+ case 0x2ed: /* 1 011 101 101 */ cp1610_addat_i(cpustate, 5,5); break;
+ case 0x2ee: /* 1 011 101 110 */ cp1610_addat_i(cpustate, 5,6); break;
+ case 0x2ef: /* 1 011 101 111 */ cp1610_addat_i(cpustate, 5,7); break;
+
+ case 0x2f0: /* 1 011 110 000 */ cp1610_addat_d(cpustate, 6,0); break;
+ case 0x2f1: /* 1 011 110 001 */ cp1610_addat_d(cpustate, 6,1); break;
+ case 0x2f2: /* 1 011 110 010 */ cp1610_addat_d(cpustate, 6,2); break;
+ case 0x2f3: /* 1 011 110 011 */ cp1610_addat_d(cpustate, 6,3); break;
+ case 0x2f4: /* 1 011 110 100 */ cp1610_addat_d(cpustate, 6,4); break;
+ case 0x2f5: /* 1 011 110 101 */ cp1610_addat_d(cpustate, 6,5); break;
+ case 0x2f6: /* 1 011 110 110 */ cp1610_addat_d(cpustate, 6,6); break;
+ case 0x2f7: /* 1 011 110 111 */ cp1610_addat_d(cpustate, 6,7); break;
+
+ case 0x2f8: /* 1 011 111 000 */ cp1610_addi(cpustate, 0); break;
+ case 0x2f9: /* 1 011 111 001 */ cp1610_addi(cpustate, 1); break;
+ case 0x2fa: /* 1 011 111 010 */ cp1610_addi(cpustate, 2); break;
+ case 0x2fb: /* 1 011 111 011 */ cp1610_addi(cpustate, 3); break;
+ case 0x2fc: /* 1 011 111 100 */ cp1610_addi(cpustate, 4); break;
+ case 0x2fd: /* 1 011 111 101 */ cp1610_addi(cpustate, 5); break;
+ case 0x2fe: /* 1 011 111 110 */ cp1610_addi(cpustate, 6); break;
+ case 0x2ff: /* 1 011 111 111 */ cp1610_addi(cpustate, 7); break;
+
+ case 0x300: /* 1 100 000 000 */ cp1610_sub(cpustate, 0); break;
+ case 0x301: /* 1 100 000 001 */ cp1610_sub(cpustate, 1); break;
+ case 0x302: /* 1 100 000 010 */ cp1610_sub(cpustate, 2); break;
+ case 0x303: /* 1 100 000 011 */ cp1610_sub(cpustate, 3); break;
+ case 0x304: /* 1 100 000 100 */ cp1610_sub(cpustate, 4); break;
+ case 0x305: /* 1 100 000 101 */ cp1610_sub(cpustate, 5); break;
+ case 0x306: /* 1 100 000 110 */ cp1610_sub(cpustate, 6); break;
+ case 0x307: /* 1 100 000 111 */ cp1610_sub(cpustate, 7); break;
+
+ case 0x308: /* 1 100 001 000 */ cp1610_subat(cpustate, 1,0); break;
+ case 0x309: /* 1 100 001 001 */ cp1610_subat(cpustate, 1,1); break;
+ case 0x30a: /* 1 100 001 010 */ cp1610_subat(cpustate, 1,2); break;
+ case 0x30b: /* 1 100 001 011 */ cp1610_subat(cpustate, 1,3); break;
+ case 0x30c: /* 1 100 001 100 */ cp1610_subat(cpustate, 1,4); break;
+ case 0x30d: /* 1 100 001 101 */ cp1610_subat(cpustate, 1,5); break;
+ case 0x30e: /* 1 100 001 110 */ cp1610_subat(cpustate, 1,6); break;
+ case 0x30f: /* 1 100 001 111 */ cp1610_subat(cpustate, 1,7); break;
+
+ case 0x310: /* 1 100 010 000 */ cp1610_subat(cpustate, 2,0); break;
+ case 0x311: /* 1 100 010 001 */ cp1610_subat(cpustate, 2,1); break;
+ case 0x312: /* 1 100 010 010 */ cp1610_subat(cpustate, 2,2); break;
+ case 0x313: /* 1 100 010 011 */ cp1610_subat(cpustate, 2,3); break;
+ case 0x314: /* 1 100 010 100 */ cp1610_subat(cpustate, 2,4); break;
+ case 0x315: /* 1 100 010 101 */ cp1610_subat(cpustate, 2,5); break;
+ case 0x316: /* 1 100 010 110 */ cp1610_subat(cpustate, 2,6); break;
+ case 0x317: /* 1 100 010 111 */ cp1610_subat(cpustate, 2,7); break;
+
+ case 0x318: /* 1 100 011 000 */ cp1610_subat(cpustate, 3,0); break;
+ case 0x319: /* 1 100 011 001 */ cp1610_subat(cpustate, 3,1); break;
+ case 0x31a: /* 1 100 011 010 */ cp1610_subat(cpustate, 3,2); break;
+ case 0x31b: /* 1 100 011 011 */ cp1610_subat(cpustate, 3,3); break;
+ case 0x31c: /* 1 100 011 100 */ cp1610_subat(cpustate, 3,4); break;
+ case 0x31d: /* 1 100 011 101 */ cp1610_subat(cpustate, 3,5); break;
+ case 0x31e: /* 1 100 011 110 */ cp1610_subat(cpustate, 3,6); break;
+ case 0x31f: /* 1 100 011 111 */ cp1610_subat(cpustate, 3,7); break;
+
+ case 0x320: /* 1 100 100 000 */ cp1610_subat_i(cpustate, 4,0); break;
+ case 0x321: /* 1 100 100 001 */ cp1610_subat_i(cpustate, 4,1); break;
+ case 0x322: /* 1 100 100 010 */ cp1610_subat_i(cpustate, 4,2); break;
+ case 0x323: /* 1 100 100 011 */ cp1610_subat_i(cpustate, 4,3); break;
+ case 0x324: /* 1 100 100 100 */ cp1610_subat_i(cpustate, 4,4); break;
+ case 0x325: /* 1 100 100 101 */ cp1610_subat_i(cpustate, 4,5); break;
+ case 0x326: /* 1 100 100 110 */ cp1610_subat_i(cpustate, 4,6); break;
+ case 0x327: /* 1 100 100 111 */ cp1610_subat_i(cpustate, 4,7); break;
+
+ case 0x328: /* 1 100 101 000 */ cp1610_subat_i(cpustate, 5,0); break;
+ case 0x329: /* 1 100 101 001 */ cp1610_subat_i(cpustate, 5,1); break;
+ case 0x32a: /* 1 100 101 010 */ cp1610_subat_i(cpustate, 5,2); break;
+ case 0x32b: /* 1 100 101 011 */ cp1610_subat_i(cpustate, 5,3); break;
+ case 0x32c: /* 1 100 101 100 */ cp1610_subat_i(cpustate, 5,4); break;
+ case 0x32d: /* 1 100 101 101 */ cp1610_subat_i(cpustate, 5,5); break;
+ case 0x32e: /* 1 100 101 110 */ cp1610_subat_i(cpustate, 5,6); break;
+ case 0x32f: /* 1 100 101 111 */ cp1610_subat_i(cpustate, 5,7); break;
+
+ case 0x330: /* 1 100 110 000 */ cp1610_subat_d(cpustate, 6,0); break;
+ case 0x331: /* 1 100 110 001 */ cp1610_subat_d(cpustate, 6,1); break;
+ case 0x332: /* 1 100 110 010 */ cp1610_subat_d(cpustate, 6,2); break;
+ case 0x333: /* 1 100 110 011 */ cp1610_subat_d(cpustate, 6,3); break;
+ case 0x334: /* 1 100 110 100 */ cp1610_subat_d(cpustate, 6,4); break;
+ case 0x335: /* 1 100 110 101 */ cp1610_subat_d(cpustate, 6,5); break;
+ case 0x336: /* 1 100 110 110 */ cp1610_subat_d(cpustate, 6,6); break;
+ case 0x337: /* 1 100 110 111 */ cp1610_subat_d(cpustate, 6,7); break;
+
+ case 0x338: /* 1 100 111 000 */ cp1610_subi(cpustate, 0); break;
+ case 0x339: /* 1 100 111 001 */ cp1610_subi(cpustate, 1); break;
+ case 0x33a: /* 1 100 111 010 */ cp1610_subi(cpustate, 2); break;
+ case 0x33b: /* 1 100 111 011 */ cp1610_subi(cpustate, 3); break;
+ case 0x33c: /* 1 100 111 100 */ cp1610_subi(cpustate, 4); break;
+ case 0x33d: /* 1 100 111 101 */ cp1610_subi(cpustate, 5); break;
+ case 0x33e: /* 1 100 111 110 */ cp1610_subi(cpustate, 6); break;
+ case 0x33f: /* 1 100 111 111 */ cp1610_subi(cpustate, 7); break;
+
+ case 0x340: /* 1 101 000 000 */ cp1610_cmp(cpustate, 0); break;
+ case 0x341: /* 1 101 000 001 */ cp1610_cmp(cpustate, 1); break;
+ case 0x342: /* 1 101 000 010 */ cp1610_cmp(cpustate, 2); break;
+ case 0x343: /* 1 101 000 011 */ cp1610_cmp(cpustate, 3); break;
+ case 0x344: /* 1 101 000 100 */ cp1610_cmp(cpustate, 4); break;
+ case 0x345: /* 1 101 000 101 */ cp1610_cmp(cpustate, 5); break;
+ case 0x346: /* 1 101 000 110 */ cp1610_cmp(cpustate, 6); break;
+ case 0x347: /* 1 101 000 111 */ cp1610_cmp(cpustate, 7); break;
+
+ case 0x348: /* 1 101 001 000 */ cp1610_cmpat(cpustate, 1,0); break;
+ case 0x349: /* 1 101 001 001 */ cp1610_cmpat(cpustate, 1,1); break;
+ case 0x34a: /* 1 101 001 010 */ cp1610_cmpat(cpustate, 1,2); break;
+ case 0x34b: /* 1 101 001 011 */ cp1610_cmpat(cpustate, 1,3); break;
+ case 0x34c: /* 1 101 001 100 */ cp1610_cmpat(cpustate, 1,4); break;
+ case 0x34d: /* 1 101 001 101 */ cp1610_cmpat(cpustate, 1,5); break;
+ case 0x34e: /* 1 101 001 110 */ cp1610_cmpat(cpustate, 1,6); break;
+ case 0x34f: /* 1 101 001 111 */ cp1610_cmpat(cpustate, 1,7); break;
+
+ case 0x350: /* 1 101 010 000 */ cp1610_cmpat(cpustate, 2,0); break;
+ case 0x351: /* 1 101 010 001 */ cp1610_cmpat(cpustate, 2,1); break;
+ case 0x352: /* 1 101 010 010 */ cp1610_cmpat(cpustate, 2,2); break;
+ case 0x353: /* 1 101 010 011 */ cp1610_cmpat(cpustate, 2,3); break;
+ case 0x354: /* 1 101 010 100 */ cp1610_cmpat(cpustate, 2,4); break;
+ case 0x355: /* 1 101 010 101 */ cp1610_cmpat(cpustate, 2,5); break;
+ case 0x356: /* 1 101 010 110 */ cp1610_cmpat(cpustate, 2,6); break;
+ case 0x357: /* 1 101 010 111 */ cp1610_cmpat(cpustate, 2,7); break;
+
+ case 0x358: /* 1 101 011 000 */ cp1610_cmpat(cpustate, 3,0); break;
+ case 0x359: /* 1 101 011 001 */ cp1610_cmpat(cpustate, 3,1); break;
+ case 0x35a: /* 1 101 011 010 */ cp1610_cmpat(cpustate, 3,2); break;
+ case 0x35b: /* 1 101 011 011 */ cp1610_cmpat(cpustate, 3,3); break;
+ case 0x35c: /* 1 101 011 100 */ cp1610_cmpat(cpustate, 3,4); break;
+ case 0x35d: /* 1 101 011 101 */ cp1610_cmpat(cpustate, 3,5); break;
+ case 0x35e: /* 1 101 011 110 */ cp1610_cmpat(cpustate, 3,6); break;
+ case 0x35f: /* 1 101 011 111 */ cp1610_cmpat(cpustate, 3,7); break;
+
+ case 0x360: /* 1 101 100 000 */ cp1610_cmpat_i(cpustate, 4,0); break;
+ case 0x361: /* 1 101 100 001 */ cp1610_cmpat_i(cpustate, 4,1); break;
+ case 0x362: /* 1 101 100 010 */ cp1610_cmpat_i(cpustate, 4,2); break;
+ case 0x363: /* 1 101 100 011 */ cp1610_cmpat_i(cpustate, 4,3); break;
+ case 0x364: /* 1 101 100 100 */ cp1610_cmpat_i(cpustate, 4,4); break;
+ case 0x365: /* 1 101 100 101 */ cp1610_cmpat_i(cpustate, 4,5); break;
+ case 0x366: /* 1 101 100 110 */ cp1610_cmpat_i(cpustate, 4,6); break;
+ case 0x367: /* 1 101 100 111 */ cp1610_cmpat_i(cpustate, 4,7); break;
+
+ case 0x368: /* 1 101 101 000 */ cp1610_cmpat_i(cpustate, 5,0); break;
+ case 0x369: /* 1 101 101 001 */ cp1610_cmpat_i(cpustate, 5,1); break;
+ case 0x36a: /* 1 101 101 010 */ cp1610_cmpat_i(cpustate, 5,2); break;
+ case 0x36b: /* 1 101 101 011 */ cp1610_cmpat_i(cpustate, 5,3); break;
+ case 0x36c: /* 1 101 101 100 */ cp1610_cmpat_i(cpustate, 5,4); break;
+ case 0x36d: /* 1 101 101 101 */ cp1610_cmpat_i(cpustate, 5,5); break;
+ case 0x36e: /* 1 101 101 110 */ cp1610_cmpat_i(cpustate, 5,6); break;
+ case 0x36f: /* 1 101 101 111 */ cp1610_cmpat_i(cpustate, 5,7); break;
+
+ case 0x370: /* 1 101 110 000 */ cp1610_cmpat_d(cpustate, 6,0); break;
+ case 0x371: /* 1 101 110 001 */ cp1610_cmpat_d(cpustate, 6,1); break;
+ case 0x372: /* 1 101 110 010 */ cp1610_cmpat_d(cpustate, 6,2); break;
+ case 0x373: /* 1 101 110 011 */ cp1610_cmpat_d(cpustate, 6,3); break;
+ case 0x374: /* 1 101 110 100 */ cp1610_cmpat_d(cpustate, 6,4); break;
+ case 0x375: /* 1 101 110 101 */ cp1610_cmpat_d(cpustate, 6,5); break;
+ case 0x376: /* 1 101 110 110 */ cp1610_cmpat_d(cpustate, 6,6); break;
+ case 0x377: /* 1 101 110 111 */ cp1610_cmpat_d(cpustate, 6,7); break;
+
+ case 0x378: /* 1 101 111 000 */ cp1610_cmpi(cpustate, 0); break;
+ case 0x379: /* 1 101 111 001 */ cp1610_cmpi(cpustate, 1); break;
+ case 0x37a: /* 1 101 111 010 */ cp1610_cmpi(cpustate, 2); break;
+ case 0x37b: /* 1 101 111 011 */ cp1610_cmpi(cpustate, 3); break;
+ case 0x37c: /* 1 101 111 100 */ cp1610_cmpi(cpustate, 4); break;
+ case 0x37d: /* 1 101 111 101 */ cp1610_cmpi(cpustate, 5); break;
+ case 0x37e: /* 1 101 111 110 */ cp1610_cmpi(cpustate, 6); break;
+ case 0x37f: /* 1 101 111 111 */ cp1610_cmpi(cpustate, 7); break;
+
+ case 0x380: /* 1 110 000 000 */ cp1610_and(cpustate, 0); break;
+ case 0x381: /* 1 110 000 001 */ cp1610_and(cpustate, 1); break;
+ case 0x382: /* 1 110 000 010 */ cp1610_and(cpustate, 2); break;
+ case 0x383: /* 1 110 000 011 */ cp1610_and(cpustate, 3); break;
+ case 0x384: /* 1 110 000 100 */ cp1610_and(cpustate, 4); break;
+ case 0x385: /* 1 110 000 101 */ cp1610_and(cpustate, 5); break;
+ case 0x386: /* 1 110 000 110 */ cp1610_and(cpustate, 6); break;
+ case 0x387: /* 1 110 000 111 */ cp1610_and(cpustate, 7); break;
+
+ case 0x388: /* 1 110 001 000 */ cp1610_andat(cpustate, 1,0); break;
+ case 0x389: /* 1 110 001 001 */ cp1610_andat(cpustate, 1,1); break;
+ case 0x38a: /* 1 110 001 010 */ cp1610_andat(cpustate, 1,2); break;
+ case 0x38b: /* 1 110 001 011 */ cp1610_andat(cpustate, 1,3); break;
+ case 0x38c: /* 1 110 001 100 */ cp1610_andat(cpustate, 1,4); break;
+ case 0x38d: /* 1 110 001 101 */ cp1610_andat(cpustate, 1,5); break;
+ case 0x38e: /* 1 110 001 110 */ cp1610_andat(cpustate, 1,6); break;
+ case 0x38f: /* 1 110 001 111 */ cp1610_andat(cpustate, 1,7); break;
+
+ case 0x390: /* 1 110 010 000 */ cp1610_andat(cpustate, 2,0); break;
+ case 0x391: /* 1 110 010 001 */ cp1610_andat(cpustate, 2,1); break;
+ case 0x392: /* 1 110 010 010 */ cp1610_andat(cpustate, 2,2); break;
+ case 0x393: /* 1 110 010 011 */ cp1610_andat(cpustate, 2,3); break;
+ case 0x394: /* 1 110 010 100 */ cp1610_andat(cpustate, 2,4); break;
+ case 0x395: /* 1 110 010 101 */ cp1610_andat(cpustate, 2,5); break;
+ case 0x396: /* 1 110 010 110 */ cp1610_andat(cpustate, 2,6); break;
+ case 0x397: /* 1 110 010 111 */ cp1610_andat(cpustate, 2,7); break;
+
+ case 0x398: /* 1 110 011 000 */ cp1610_andat(cpustate, 3,0); break;
+ case 0x399: /* 1 110 011 001 */ cp1610_andat(cpustate, 3,1); break;
+ case 0x39a: /* 1 110 011 010 */ cp1610_andat(cpustate, 3,2); break;
+ case 0x39b: /* 1 110 011 011 */ cp1610_andat(cpustate, 3,3); break;
+ case 0x39c: /* 1 110 011 100 */ cp1610_andat(cpustate, 3,4); break;
+ case 0x39d: /* 1 110 011 101 */ cp1610_andat(cpustate, 3,5); break;
+ case 0x39e: /* 1 110 011 110 */ cp1610_andat(cpustate, 3,6); break;
+ case 0x39f: /* 1 110 011 111 */ cp1610_andat(cpustate, 3,7); break;
+
+ case 0x3a0: /* 1 110 100 000 */ cp1610_andat_i(cpustate, 4,0); break;
+ case 0x3a1: /* 1 110 100 001 */ cp1610_andat_i(cpustate, 4,1); break;
+ case 0x3a2: /* 1 110 100 010 */ cp1610_andat_i(cpustate, 4,2); break;
+ case 0x3a3: /* 1 110 100 011 */ cp1610_andat_i(cpustate, 4,3); break;
+ case 0x3a4: /* 1 110 100 100 */ cp1610_andat_i(cpustate, 4,4); break;
+ case 0x3a5: /* 1 110 100 101 */ cp1610_andat_i(cpustate, 4,5); break;
+ case 0x3a6: /* 1 110 100 110 */ cp1610_andat_i(cpustate, 4,6); break;
+ case 0x3a7: /* 1 110 100 111 */ cp1610_andat_i(cpustate, 4,7); break;
+
+ case 0x3a8: /* 1 110 101 000 */ cp1610_andat_i(cpustate, 5,0); break;
+ case 0x3a9: /* 1 110 101 001 */ cp1610_andat_i(cpustate, 5,1); break;
+ case 0x3aa: /* 1 110 101 010 */ cp1610_andat_i(cpustate, 5,2); break;
+ case 0x3ab: /* 1 110 101 011 */ cp1610_andat_i(cpustate, 5,3); break;
+ case 0x3ac: /* 1 110 101 100 */ cp1610_andat_i(cpustate, 5,4); break;
+ case 0x3ad: /* 1 110 101 101 */ cp1610_andat_i(cpustate, 5,5); break;
+ case 0x3ae: /* 1 110 101 110 */ cp1610_andat_i(cpustate, 5,6); break;
+ case 0x3af: /* 1 110 101 111 */ cp1610_andat_i(cpustate, 5,7); break;
+
+ case 0x3b0: /* 1 110 110 000 */ cp1610_andat_d(cpustate, 6,0); break;
+ case 0x3b1: /* 1 110 110 001 */ cp1610_andat_d(cpustate, 6,1); break;
+ case 0x3b2: /* 1 110 110 010 */ cp1610_andat_d(cpustate, 6,2); break;
+ case 0x3b3: /* 1 110 110 011 */ cp1610_andat_d(cpustate, 6,3); break;
+ case 0x3b4: /* 1 110 110 100 */ cp1610_andat_d(cpustate, 6,4); break;
+ case 0x3b5: /* 1 110 110 101 */ cp1610_andat_d(cpustate, 6,5); break;
+ case 0x3b6: /* 1 110 110 110 */ cp1610_andat_d(cpustate, 6,6); break;
+ case 0x3b7: /* 1 110 110 111 */ cp1610_andat_d(cpustate, 6,7); break;
+
+ case 0x3b8: /* 1 110 111 000 */ cp1610_andi(cpustate, 0); break;
+ case 0x3b9: /* 1 110 111 001 */ cp1610_andi(cpustate, 1); break;
+ case 0x3ba: /* 1 110 111 010 */ cp1610_andi(cpustate, 2); break;
+ case 0x3bb: /* 1 110 111 011 */ cp1610_andi(cpustate, 3); break;
+ case 0x3bc: /* 1 110 111 100 */ cp1610_andi(cpustate, 4); break;
+ case 0x3bd: /* 1 110 111 101 */ cp1610_andi(cpustate, 5); break;
+ case 0x3be: /* 1 110 111 110 */ cp1610_andi(cpustate, 6); break;
+ case 0x3bf: /* 1 110 111 111 */ cp1610_andi(cpustate, 7); break;
+
+ case 0x3c0: /* 1 111 000 000 */ cp1610_xor(cpustate, 0); break;
+ case 0x3c1: /* 1 111 000 001 */ cp1610_xor(cpustate, 1); break;
+ case 0x3c2: /* 1 111 000 010 */ cp1610_xor(cpustate, 2); break;
+ case 0x3c3: /* 1 111 000 011 */ cp1610_xor(cpustate, 3); break;
+ case 0x3c4: /* 1 111 000 100 */ cp1610_xor(cpustate, 4); break;
+ case 0x3c5: /* 1 111 000 101 */ cp1610_xor(cpustate, 5); break;
+ case 0x3c6: /* 1 111 000 110 */ cp1610_xor(cpustate, 6); break;
+ case 0x3c7: /* 1 111 000 111 */ cp1610_xor(cpustate, 7); break;
+
+ case 0x3c8: /* 1 111 001 000 */ cp1610_xorat(cpustate, 1,0); break;
+ case 0x3c9: /* 1 111 001 001 */ cp1610_xorat(cpustate, 1,1); break;
+ case 0x3ca: /* 1 111 001 010 */ cp1610_xorat(cpustate, 1,2); break;
+ case 0x3cb: /* 1 111 001 011 */ cp1610_xorat(cpustate, 1,3); break;
+ case 0x3cc: /* 1 111 001 100 */ cp1610_xorat(cpustate, 1,4); break;
+ case 0x3cd: /* 1 111 001 101 */ cp1610_xorat(cpustate, 1,5); break;
+ case 0x3ce: /* 1 111 001 110 */ cp1610_xorat(cpustate, 1,6); break;
+ case 0x3cf: /* 1 111 001 111 */ cp1610_xorat(cpustate, 1,7); break;
+
+ case 0x3d0: /* 1 111 010 000 */ cp1610_xorat(cpustate, 2,0); break;
+ case 0x3d1: /* 1 111 010 001 */ cp1610_xorat(cpustate, 2,1); break;
+ case 0x3d2: /* 1 111 010 010 */ cp1610_xorat(cpustate, 2,2); break;
+ case 0x3d3: /* 1 111 010 011 */ cp1610_xorat(cpustate, 2,3); break;
+ case 0x3d4: /* 1 111 010 100 */ cp1610_xorat(cpustate, 2,4); break;
+ case 0x3d5: /* 1 111 010 101 */ cp1610_xorat(cpustate, 2,5); break;
+ case 0x3d6: /* 1 111 010 110 */ cp1610_xorat(cpustate, 2,6); break;
+ case 0x3d7: /* 1 111 010 111 */ cp1610_xorat(cpustate, 2,7); break;
+
+ case 0x3d8: /* 1 111 011 000 */ cp1610_xorat(cpustate, 3,0); break;
+ case 0x3d9: /* 1 111 011 001 */ cp1610_xorat(cpustate, 3,1); break;
+ case 0x3da: /* 1 111 011 010 */ cp1610_xorat(cpustate, 3,2); break;
+ case 0x3db: /* 1 111 011 011 */ cp1610_xorat(cpustate, 3,3); break;
+ case 0x3dc: /* 1 111 011 100 */ cp1610_xorat(cpustate, 3,4); break;
+ case 0x3dd: /* 1 111 011 101 */ cp1610_xorat(cpustate, 3,5); break;
+ case 0x3de: /* 1 111 011 110 */ cp1610_xorat(cpustate, 3,6); break;
+ case 0x3df: /* 1 111 011 111 */ cp1610_xorat(cpustate, 3,7); break;
+
+ case 0x3e0: /* 1 111 100 000 */ cp1610_xorat_i(cpustate, 4,0); break;
+ case 0x3e1: /* 1 111 100 001 */ cp1610_xorat_i(cpustate, 4,1); break;
+ case 0x3e2: /* 1 111 100 010 */ cp1610_xorat_i(cpustate, 4,2); break;
+ case 0x3e3: /* 1 111 100 011 */ cp1610_xorat_i(cpustate, 4,3); break;
+ case 0x3e4: /* 1 111 100 100 */ cp1610_xorat_i(cpustate, 4,4); break;
+ case 0x3e5: /* 1 111 100 101 */ cp1610_xorat_i(cpustate, 4,5); break;
+ case 0x3e6: /* 1 111 100 110 */ cp1610_xorat_i(cpustate, 4,6); break;
+ case 0x3e7: /* 1 111 100 111 */ cp1610_xorat_i(cpustate, 4,7); break;
+
+ case 0x3e8: /* 1 111 101 000 */ cp1610_xorat_i(cpustate, 5,0); break;
+ case 0x3e9: /* 1 111 101 001 */ cp1610_xorat_i(cpustate, 5,1); break;
+ case 0x3ea: /* 1 111 101 010 */ cp1610_xorat_i(cpustate, 5,2); break;
+ case 0x3eb: /* 1 111 101 011 */ cp1610_xorat_i(cpustate, 5,3); break;
+ case 0x3ec: /* 1 111 101 100 */ cp1610_xorat_i(cpustate, 5,4); break;
+ case 0x3ed: /* 1 111 101 101 */ cp1610_xorat_i(cpustate, 5,5); break;
+ case 0x3ee: /* 1 111 101 110 */ cp1610_xorat_i(cpustate, 5,6); break;
+ case 0x3ef: /* 1 111 101 111 */ cp1610_xorat_i(cpustate, 5,7); break;
+
+ case 0x3f0: /* 1 111 110 000 */ cp1610_xorat_d(cpustate, 6,0); break;
+ case 0x3f1: /* 1 111 110 001 */ cp1610_xorat_d(cpustate, 6,1); break;
+ case 0x3f2: /* 1 111 110 010 */ cp1610_xorat_d(cpustate, 6,2); break;
+ case 0x3f3: /* 1 111 110 011 */ cp1610_xorat_d(cpustate, 6,3); break;
+ case 0x3f4: /* 1 111 110 100 */ cp1610_xorat_d(cpustate, 6,4); break;
+ case 0x3f5: /* 1 111 110 101 */ cp1610_xorat_d(cpustate, 6,5); break;
+ case 0x3f6: /* 1 111 110 110 */ cp1610_xorat_d(cpustate, 6,6); break;
+ case 0x3f7: /* 1 111 110 111 */ cp1610_xorat_d(cpustate, 6,7); break;
+
+ case 0x3f8: /* 1 111 111 000 */ cp1610_xori(cpustate, 0); break;
+ case 0x3f9: /* 1 111 111 001 */ cp1610_xori(cpustate, 1); break;
+ case 0x3fa: /* 1 111 111 010 */ cp1610_xori(cpustate, 2); break;
+ case 0x3fb: /* 1 111 111 011 */ cp1610_xori(cpustate, 3); break;
+ case 0x3fc: /* 1 111 111 100 */ cp1610_xori(cpustate, 4); break;
+ case 0x3fd: /* 1 111 111 101 */ cp1610_xori(cpustate, 5); break;
+ case 0x3fe: /* 1 111 111 110 */ cp1610_xori(cpustate, 6); break;
+ case 0x3ff: /* 1 111 111 111 */ cp1610_xori(cpustate, 7); break;
+ }
+
+ if (cpustate->mask_interrupts == 0)
+ {
if (cpustate->intr_pending == 1)
{
/* PSHR R7 */
@@ -3430,22 +3430,22 @@ static CPU_SET_INFO( cp1610 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_PREVIOUSPC: break; /* TODO? */
+ case CPUINFO_INT_PREVIOUSPC: break; /* TODO? */
case CPUINFO_INT_INPUT_STATE + CP1610_INT_INTRM:
case CPUINFO_INT_INPUT_STATE + CP1610_RESET:
case CPUINFO_INT_INPUT_STATE + CP1610_INT_INTR:
- cp1610_set_irq_line(cpustate, state-CPUINFO_INT_INPUT_STATE, info->i); break;
-
- case CPUINFO_INT_REGISTER + CP1610_R0: cpustate->r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + CP1610_R1: cpustate->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + CP1610_R2: cpustate->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + CP1610_R3: cpustate->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + CP1610_R4: cpustate->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + CP1610_R5: cpustate->r[5] = info->i; break;
+ cp1610_set_irq_line(cpustate, state-CPUINFO_INT_INPUT_STATE, info->i); break;
+
+ case CPUINFO_INT_REGISTER + CP1610_R0: cpustate->r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + CP1610_R1: cpustate->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + CP1610_R2: cpustate->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + CP1610_R3: cpustate->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + CP1610_R4: cpustate->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + CP1610_R5: cpustate->r[5] = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + CP1610_R6: cpustate->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + CP1610_R6: cpustate->r[6] = info->i; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CP1610_R7: cpustate->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + CP1610_R7: cpustate->r[7] = info->i; break;
}
return;
}
@@ -3456,63 +3456,63 @@ CPU_GET_INFO( cp1610 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cp1610_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 7; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
-
- case CPUINFO_INT_INPUT_STATE + CP1610_INT_INTRM: info->i = cpustate->intrm_state; break;
- case CPUINFO_INT_INPUT_STATE + CP1610_RESET: info->i = cpustate->reset_state; break;
- case CPUINFO_INT_INPUT_STATE + CP1610_INT_INTR: info->i = cpustate->intr_state; break;
-
- case CPUINFO_INT_REGISTER + CP1610_R0: info->i = cpustate->r[0]; break;
- case CPUINFO_INT_REGISTER + CP1610_R1: info->i = cpustate->r[1]; break;
- case CPUINFO_INT_REGISTER + CP1610_R2: info->i = cpustate->r[2]; break;
- case CPUINFO_INT_REGISTER + CP1610_R3: info->i = cpustate->r[3]; break;
- case CPUINFO_INT_REGISTER + CP1610_R4: info->i = cpustate->r[4]; break;
- case CPUINFO_INT_REGISTER + CP1610_R5: info->i = cpustate->r[5]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cp1610_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 7; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
+
+ case CPUINFO_INT_INPUT_STATE + CP1610_INT_INTRM: info->i = cpustate->intrm_state; break;
+ case CPUINFO_INT_INPUT_STATE + CP1610_RESET: info->i = cpustate->reset_state; break;
+ case CPUINFO_INT_INPUT_STATE + CP1610_INT_INTR: info->i = cpustate->intr_state; break;
+
+ case CPUINFO_INT_REGISTER + CP1610_R0: info->i = cpustate->r[0]; break;
+ case CPUINFO_INT_REGISTER + CP1610_R1: info->i = cpustate->r[1]; break;
+ case CPUINFO_INT_REGISTER + CP1610_R2: info->i = cpustate->r[2]; break;
+ case CPUINFO_INT_REGISTER + CP1610_R3: info->i = cpustate->r[3]; break;
+ case CPUINFO_INT_REGISTER + CP1610_R4: info->i = cpustate->r[4]; break;
+ case CPUINFO_INT_REGISTER + CP1610_R5: info->i = cpustate->r[5]; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + CP1610_R6: info->i = cpustate->r[6]; break;
+ case CPUINFO_INT_REGISTER + CP1610_R6: info->i = cpustate->r[6]; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CP1610_R7: info->i = cpustate->r[7]; break;
+ case CPUINFO_INT_REGISTER + CP1610_R7: info->i = cpustate->r[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cp1610); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cp1610); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cp1610); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cp1610); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cp1610); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cp1610); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cp1610); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cp1610); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cp1610); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cp1610); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "CP1610"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, ""); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s,
+ case CPUINFO_STR_NAME: strcpy(info->s, "CP1610"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, ""); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s,
"Copyright Frank Palazzolo, all rights reserved.");
break;
- case CPUINFO_STR_FLAGS:
+ case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c",
cpustate->flags & 0x80 ? 'S':'.',
cpustate->flags & 0x40 ? 'Z':'.',
diff --git a/src/emu/cpu/cp1610/cp1610.h b/src/emu/cpu/cp1610/cp1610.h
index 47246109cc8..06691a4f1aa 100644
--- a/src/emu/cpu/cp1610/cp1610.h
+++ b/src/emu/cpu/cp1610/cp1610.h
@@ -28,10 +28,10 @@ enum
CP1610_R4, CP1610_R5, CP1610_R6, CP1610_R7
};
-#define CP1610_INT_NONE 0
-#define CP1610_INT_INTRM 1 /* Maskable */
-#define CP1610_RESET INPUT_LINE_RESET /* Non-Maskable */
-#define CP1610_INT_INTR INPUT_LINE_NMI /* Non-Maskable */
+#define CP1610_INT_NONE 0
+#define CP1610_INT_INTRM 1 /* Maskable */
+#define CP1610_RESET INPUT_LINE_RESET /* Non-Maskable */
+#define CP1610_INT_INTR INPUT_LINE_NMI /* Non-Maskable */
DECLARE_LEGACY_CPU_DEVICE(CP1610, cp1610);
diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak
index d377c39b7fa..80fc59fac00 100644
--- a/src/emu/cpu/cpu.mak
+++ b/src/emu/cpu/cpu.mak
@@ -84,22 +84,22 @@ CPUOBJS += $(CPUOBJ)/arm7/arm7ops.o
DASMOBJS += $(CPUOBJ)/arm7/arm7dasm.o
endif
-$(CPUOBJ)/arm/arm.o: $(CPUSRC)/arm/arm.c \
+$(CPUOBJ)/arm/arm.o: $(CPUSRC)/arm/arm.c \
$(CPUSRC)/arm/arm.h
-$(CPUOBJ)/arm7/arm7.o: $(CPUSRC)/arm7/arm7.c \
+$(CPUOBJ)/arm7/arm7.o: $(CPUSRC)/arm7/arm7.c \
$(CPUSRC)/arm7/arm7.h \
$(CPUSRC)/arm7/arm7help.h \
$(CPUSRC)/arm7/arm7thmb.c \
$(CPUSRC)/arm7/arm7ops.c \
$(CPUSRC)/arm7/arm7core.c
-$(CPUOBJ)/arm7/arm7ops.o: $(CPUSRC)/arm7/arm7ops.c \
+$(CPUOBJ)/arm7/arm7ops.o: $(CPUSRC)/arm7/arm7ops.c \
$(CPUSRC)/arm7/arm7.h \
$(CPUSRC)/arm7/arm7help.h \
$(CPUSRC)/arm7/arm7core.h \
-$(CPUOBJ)/arm7/arm7thmb.o: $(CPUSRC)/arm7/arm7thmb.c \
+$(CPUOBJ)/arm7/arm7thmb.o: $(CPUSRC)/arm7/arm7thmb.c \
$(CPUSRC)/arm7/arm7.h \
$(CPUSRC)/arm7/arm7help.h \
$(CPUSRC)/arm7/arm7core.h \
@@ -114,7 +114,7 @@ CPUOBJS += $(CPUOBJ)/se3208/se3208.o
DASMOBJS += $(CPUOBJ)/se3208/se3208dis.o
endif
-$(CPUOBJ)/se3208/se3208.o: $(CPUSRC)/se3208/se3208.c \
+$(CPUOBJ)/se3208/se3208.o: $(CPUSRC)/se3208/se3208.c \
$(CPUSRC)/se3208/se3208.h
@@ -129,7 +129,7 @@ CPUOBJS += $(CPUOBJ)/alph8201/alph8201.o
DASMOBJS += $(CPUOBJ)/alph8201/8201dasm.o
endif
-$(CPUOBJ)/alph8201/alph8201.o: $(CPUSRC)/alph8201/alph8201.c \
+$(CPUOBJ)/alph8201/alph8201.o: $(CPUSRC)/alph8201/alph8201.c \
$(CPUSRC)/alph8201/alph8201.h
@@ -144,7 +144,7 @@ CPUOBJS += $(CPUOBJ)/adsp2100/adsp2100.o
DASMOBJS += $(CPUOBJ)/adsp2100/2100dasm.o
endif
-$(CPUOBJ)/adsp2100/adsp2100.o: $(CPUSRC)/adsp2100/adsp2100.c \
+$(CPUOBJ)/adsp2100/adsp2100.o: $(CPUSRC)/adsp2100/adsp2100.c \
$(CPUSRC)/adsp2100/adsp2100.h \
$(CPUSRC)/adsp2100/2100ops.c
@@ -160,7 +160,7 @@ CPUOBJS += $(CPUOBJ)/sharc/sharc.o
DASMOBJS += $(CPUOBJ)/sharc/sharcdsm.o
endif
-$(CPUOBJ)/sharc/sharc.o: $(CPUSRC)/sharc/sharc.c \
+$(CPUOBJ)/sharc/sharc.o: $(CPUSRC)/sharc/sharc.c \
$(CPUSRC)/sharc/sharc.h \
$(CPUSRC)/sharc/sharcops.c \
$(CPUSRC)/sharc/sharcops.h \
@@ -182,7 +182,7 @@ CPUOBJS += $(CPUOBJ)/apexc/apexc.o
DASMOBJS += $(CPUOBJ)/apexc/apexcdsm.o
endif
-$(CPUOBJ)/apexc/apexc.o: $(CPUSRC)/apexc/apexc.c \
+$(CPUOBJ)/apexc/apexc.o: $(CPUSRC)/apexc/apexc.c \
$(CPUSRC)/apexc/apexc.h
@@ -197,7 +197,7 @@ CPUOBJS += $(CPUOBJ)/dsp16/dsp16.o
DASMOBJS += $(CPUOBJ)/dsp16/dsp16dis.o
endif
-$(CPUOBJ)/dsp16/dsp16.o: $(CPUSRC)/dsp16/dsp16ops.c \
+$(CPUOBJ)/dsp16/dsp16.o: $(CPUSRC)/dsp16/dsp16ops.c \
$(CPUSRC)/dsp16/dsp16.c \
$(CPUSRC)/dsp16/dsp16.h
@@ -212,7 +212,7 @@ CPUOBJS += $(CPUOBJ)/dsp32/dsp32.o
DASMOBJS += $(CPUOBJ)/dsp32/dsp32dis.o
endif
-$(CPUOBJ)/dsp32/dsp32.o: $(CPUSRC)/dsp32/dsp32.c \
+$(CPUOBJ)/dsp32/dsp32.o: $(CPUSRC)/dsp32/dsp32.c \
$(CPUSRC)/dsp32/dsp32.h \
$(CPUSRC)/dsp32/dsp32ops.c
@@ -228,7 +228,7 @@ CPUOBJS += $(CPUOBJ)/asap/asap.o
DASMOBJS += $(CPUOBJ)/asap/asapdasm.o
endif
-$(CPUOBJ)/asap/asap.o: $(CPUSRC)/asap/asap.c \
+$(CPUOBJ)/asap/asap.o: $(CPUSRC)/asap/asap.c \
$(CPUSRC)/asap/asap.h
@@ -243,7 +243,7 @@ CPUOBJS += $(CPUOBJ)/am29000/am29000.o
DASMOBJS += $(CPUOBJ)/am29000/am29dasm.o
endif
-$(CPUOBJ)/am29000/am29000.o: $(CPUSRC)/am29000/am29000.c \
+$(CPUOBJ)/am29000/am29000.o: $(CPUSRC)/am29000/am29000.c \
$(CPUSRC)/am29000/am29000.h \
$(CPUSRC)/am29000/am29ops.h \
@@ -259,7 +259,7 @@ CPUOBJS += $(CPUOBJ)/jaguar/jaguar.o
DASMOBJS += $(CPUOBJ)/jaguar/jagdasm.o
endif
-$(CPUOBJ)/jaguar/jaguar.o: $(CPUSRC)/jaguar/jaguar.c \
+$(CPUOBJ)/jaguar/jaguar.o: $(CPUSRC)/jaguar/jaguar.c \
$(CPUSRC)/jaguar/jaguar.h
@@ -274,7 +274,7 @@ CPUOBJS += $(CPUOBJ)/cubeqcpu/cubeqcpu.o
DASMOBJS += $(CPUOBJ)/cubeqcpu/cubedasm.o
endif
-$(CPUOBJ)/cubeqcpu/cubeqcpu.o: $(CPUSRC)/cubeqcpu/cubeqcpu.c \
+$(CPUOBJ)/cubeqcpu/cubeqcpu.o: $(CPUSRC)/cubeqcpu/cubeqcpu.c \
$(CPUSRC)/cubeqcpu/cubeqcpu.h
@@ -289,7 +289,7 @@ CPUOBJS += $(CPUOBJ)/esrip/esrip.o
DASMOBJS += $(CPUOBJ)/esrip/esripdsm.o
endif
-$(CPUOBJ)/esrip/esrip.o: $(CPUSRC)/esrip/esrip.c \
+$(CPUOBJ)/esrip/esrip.o: $(CPUSRC)/esrip/esrip.c \
$(CPUSRC)/esrip/esrip.h
@@ -304,7 +304,7 @@ CPUOBJS += $(CPUOBJ)/cosmac/cosmac.o
DASMOBJS += $(CPUOBJ)/cosmac/cosdasm.o
endif
-$(CPUOBJ)/cosmac/cosmac.o: $(CPUSRC)/cosmac/cosmac.c \
+$(CPUOBJ)/cosmac/cosmac.o: $(CPUSRC)/cosmac/cosmac.c \
$(CPUSRC)/cosmac/cosmac.h
@@ -321,7 +321,7 @@ DASMOBJS += $(CPUOBJ)/cop400/cop420ds.o
DASMOBJS += $(CPUOBJ)/cop400/cop440ds.o
endif
-$(CPUOBJ)/cop400/cop400.o: $(CPUSRC)/cop400/cop400.c \
+$(CPUOBJ)/cop400/cop400.o: $(CPUSRC)/cop400/cop400.c \
$(CPUSRC)/cop400/cop400.h \
$(CPUSRC)/cop400/cop400op.c
@@ -337,7 +337,7 @@ CPUOBJS += $(CPUOBJ)/cp1610/cp1610.o
DASMOBJS += $(CPUOBJ)/cp1610/1610dasm.o
endif
-$(CPUOBJ)/cp1610/cp1610.o: $(CPUSRC)/cp1610/cp1610.c \
+$(CPUOBJ)/cp1610/cp1610.o: $(CPUSRC)/cp1610/cp1610.c \
$(CPUSRC)/cp1610/cp1610.h
@@ -352,7 +352,7 @@ CPUOBJS += $(CPUOBJ)/ccpu/ccpu.o
DASMOBJS += $(CPUOBJ)/ccpu/ccpudasm.o
endif
-$(CPUOBJ)/ccpu/ccpu.o: $(CPUSRC)/ccpu/ccpu.c \
+$(CPUOBJ)/ccpu/ccpu.o: $(CPUSRC)/ccpu/ccpu.c \
$(CPUSRC)/ccpu/ccpu.h
@@ -367,7 +367,7 @@ CPUOBJS += $(CPUOBJ)/t11/t11.o
DASMOBJS += $(CPUOBJ)/t11/t11dasm.o
endif
-$(CPUOBJ)/t11/t11.o: $(CPUSRC)/t11/t11.c \
+$(CPUOBJ)/t11/t11.o: $(CPUSRC)/t11/t11.c \
$(CPUSRC)/t11/t11.h \
$(CPUSRC)/t11/t11ops.c \
$(CPUSRC)/t11/t11table.c
@@ -384,7 +384,7 @@ CPUOBJS += $(CPUOBJ)/f8/f8.o
DASMOBJS += $(CPUOBJ)/f8/f8dasm.o
endif
-$(CPUOBJ)/f8/f8.o: $(CPUSRC)/f8/f8.c \
+$(CPUOBJ)/f8/f8.o: $(CPUSRC)/f8/f8.c \
$(CPUSRC)/f8/f8.h
@@ -410,22 +410,22 @@ G65816DEPS = \
$(CPUSRC)/g65816/g65816cm.h \
$(CPUSRC)/g65816/g65816op.h
-$(CPUOBJ)/g65816/g65816.o: $(CPUSRC)/g65816/g65816.c \
+$(CPUOBJ)/g65816/g65816.o: $(CPUSRC)/g65816/g65816.c \
$(G65816DEPS)
-$(CPUOBJ)/g65816/g65816o0.o: $(CPUSRC)/g65816/g65816o0.c \
+$(CPUOBJ)/g65816/g65816o0.o: $(CPUSRC)/g65816/g65816o0.c \
$(G65816DEPS)
-$(CPUOBJ)/g65816/g65816o1.o: $(CPUSRC)/g65816/g65816o1.c \
+$(CPUOBJ)/g65816/g65816o1.o: $(CPUSRC)/g65816/g65816o1.c \
$(G65816DEPS)
-$(CPUOBJ)/g65816/g65816o2.o: $(CPUSRC)/g65816/g65816o2.c \
+$(CPUOBJ)/g65816/g65816o2.o: $(CPUSRC)/g65816/g65816o2.c \
$(G65816DEPS)
-$(CPUOBJ)/g65816/g65816o3.o: $(CPUSRC)/g65816/g65816o3.c \
+$(CPUOBJ)/g65816/g65816o3.o: $(CPUSRC)/g65816/g65816o3.c \
$(G65816DEPS)
-$(CPUOBJ)/g65816/g65816o4.o: $(CPUSRC)/g65816/g65816o4.c \
+$(CPUOBJ)/g65816/g65816o4.o: $(CPUSRC)/g65816/g65816o4.c \
$(G65816DEPS)
@@ -440,7 +440,7 @@ CPUOBJS += $(CPUOBJ)/hd6309/hd6309.o
DASMOBJS += $(CPUOBJ)/hd6309/6309dasm.o
endif
-$(CPUOBJ)/hd6309/hd6309.o: $(CPUSRC)/hd6309/hd6309.c \
+$(CPUOBJ)/hd6309/hd6309.o: $(CPUSRC)/hd6309/hd6309.c \
$(CPUSRC)/hd6309/hd6309.h \
$(CPUSRC)/hd6309/6309ops.c \
$(CPUSRC)/hd6309/6309tbl.c
@@ -456,18 +456,18 @@ CPUOBJS += $(CPUOBJ)/h83002/h8_16.o $(CPUOBJ)/h83002/h8periph.o $(CPUOBJ)/h83002
DASMOBJS += $(CPUOBJ)/h83002/h8disasm.o
endif
-$(CPUOBJ)/h83002/h8_16.o: $(CPUSRC)/h83002/h8_16.c \
+$(CPUOBJ)/h83002/h8_16.o: $(CPUSRC)/h83002/h8_16.c \
$(CPUSRC)/h83002/h8.h \
$(CPUSRC)/h83002/h8ops.h \
$(CPUSRC)/h83002/h8priv.h
-$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c
+$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c
-$(CPUOBJ)/h83002/h8periph.o: $(CPUSRC)/h83002/h8periph.c \
+$(CPUOBJ)/h83002/h8periph.o: $(CPUSRC)/h83002/h8periph.c \
$(CPUSRC)/h83002/h8priv.h \
$(CPUSRC)/h83002/h8.h
-$(CPUOBJ)/h83002/h8speriph.o: $(CPUSRC)/h83002/h8speriph.c \
+$(CPUOBJ)/h83002/h8speriph.o: $(CPUSRC)/h83002/h8speriph.c \
$(CPUSRC)/h83002/h8priv.h \
$(CPUSRC)/h83002/h8.h
@@ -482,18 +482,18 @@ CPUOBJS += $(CPUOBJ)/h83002/h8_8.o $(CPUOBJ)/h83002/h8periph.o $(CPUOBJ)/h83002/
DASMOBJS += $(CPUOBJ)/h83002/h8disasm.o
endif
-$(CPUOBJ)/h83002/h8_8.o: $(CPUSRC)/h83002/h8_8.c \
+$(CPUOBJ)/h83002/h8_8.o: $(CPUSRC)/h83002/h8_8.c \
$(CPUSRC)/h83002/h8.h \
$(CPUSRC)/h83002/h8ops.h \
$(CPUSRC)/h83002/h8priv.h
-$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c
+$(CPUOBJ)/h83002/h8disasm.o: $(CPUSRC)/h83002/h8disasm.c
-$(CPUOBJ)/h83002/h8periph.o: $(CPUSRC)/h83002/h8periph.c \
+$(CPUOBJ)/h83002/h8periph.o: $(CPUSRC)/h83002/h8periph.c \
$(CPUSRC)/h83002/h8priv.h \
$(CPUSRC)/h83002/h8.h
-$(CPUOBJ)/h83002/h8speriph.o: $(CPUSRC)/h83002/h8speriph.c \
+$(CPUOBJ)/h83002/h8speriph.o: $(CPUSRC)/h83002/h8speriph.c \
$(CPUSRC)/h83002/h8priv.h \
$(CPUSRC)/h83002/h8.h
@@ -507,7 +507,7 @@ CPUOBJS += $(CPUOBJ)/hcd62121/hcd62121.o
DASMOBJS += $(CPUOBJ)/hcd62121/hcd62121d.o
endif
-$(CPUOBJ)/hcd62121/hcd62121.o: $(CPUSRC)/hcd62121/hcd62121.c \
+$(CPUOBJ)/hcd62121/hcd62121.o: $(CPUSRC)/hcd62121/hcd62121.c \
$(CPUSRC)/hcd62121/hcd62121.h \
$(CPUSRC)/hcd62121/hcd62121_ops.h
@@ -522,7 +522,7 @@ CPUOBJS += $(CPUOBJ)/sh2/sh2.o $(CPUOBJ)/sh2/sh2comn.o $(CPUOBJ)/sh2/sh2drc.o $(
DASMOBJS += $(CPUOBJ)/sh2/sh2dasm.o
endif
-$(CPUOBJ)/sh2/sh2.o: $(CPUSRC)/sh2/sh2.c \
+$(CPUOBJ)/sh2/sh2.o: $(CPUSRC)/sh2/sh2.c \
$(CPUSRC)/sh2/sh2.h \
$(CPUSRC)/sh2/sh2comn.h
@@ -530,12 +530,12 @@ $(CPUOBJ)/sh2/sh2comn.o: $(CPUSRC)/sh2/sh2comn.c \
$(CPUSRC)/sh2/sh2comn.h \
$(CPUSRC)/sh2/sh2.h
-$(CPUOBJ)/sh2/sh2drc.o: $(CPUSRC)/sh2/sh2drc.c \
+$(CPUOBJ)/sh2/sh2drc.o: $(CPUSRC)/sh2/sh2drc.c \
$(CPUSRC)/sh2/sh2.h \
$(CPUSRC)/sh2/sh2comn.h \
$(DRCDEPS)
-$(CPUOBJ)/sh2/sh2fe.o: $(CPUSRC)/sh2/sh2fe.c \
+$(CPUOBJ)/sh2/sh2fe.o: $(CPUSRC)/sh2/sh2fe.c \
$(CPUSRC)/sh2/sh2.h \
$(CPUSRC)/sh2/sh2comn.h
@@ -549,7 +549,7 @@ CPUOBJS += $(CPUOBJ)/sh4/sh4.o $(CPUOBJ)/sh4/sh4comn.o $(CPUOBJ)/sh4/sh3comn.o $
DASMOBJS += $(CPUOBJ)/sh4/sh4dasm.o
endif
-$(CPUOBJ)/sh4/sh4.o: $(CPUSRC)/sh4/sh4.c \
+$(CPUOBJ)/sh4/sh4.o: $(CPUSRC)/sh4/sh4.c \
$(CPUSRC)/sh4/sh4.h \
$(CPUSRC)/sh4/sh4regs.h \
$(CPUSRC)/sh4/sh4comn.h \
@@ -593,7 +593,7 @@ CPUOBJS += $(CPUOBJ)/h6280/h6280.o
DASMOBJS += $(CPUOBJ)/h6280/6280dasm.o
endif
-$(CPUOBJ)/h6280/h6280.o: $(CPUSRC)/h6280/h6280.c \
+$(CPUOBJ)/h6280/h6280.o: $(CPUSRC)/h6280/h6280.c \
$(CPUSRC)/h6280/h6280.h \
$(CPUSRC)/h6280/h6280ops.h \
$(CPUSRC)/h6280/tblh6280.c
@@ -610,7 +610,7 @@ CPUOBJS += $(CPUOBJ)/e132xs/e132xs.o
DASMOBJS += $(CPUOBJ)/e132xs/32xsdasm.o
endif
-$(CPUOBJ)/e132xs/e132xs.o: $(CPUSRC)/e132xs/e132xs.c \
+$(CPUOBJ)/e132xs/e132xs.o: $(CPUSRC)/e132xs/e132xs.c \
$(CPUSRC)/e132xs/e132xs.h \
$(CPUSRC)/e132xs/e132xsop.c
@@ -626,7 +626,7 @@ CPUOBJS += $(CPUOBJ)/i4004/i4004.o
DASMOBJS += $(CPUOBJ)/i4004/4004dasm.o
endif
-$(CPUOBJ)/i4004/i4004.o: $(CPUSRC)/i4004/i4004.c \
+$(CPUOBJ)/i4004/i4004.o: $(CPUSRC)/i4004/i4004.c \
$(CPUSRC)/i4004/i4004.h
@@ -640,7 +640,7 @@ CPUOBJS += $(CPUOBJ)/i8008/i8008.o
DASMOBJS += $(CPUOBJ)/i8008/8008dasm.o
endif
-$(CPUOBJ)/i8008/i8008.o: $(CPUSRC)/i8008/i8008.c \
+$(CPUOBJ)/i8008/i8008.o: $(CPUSRC)/i8008/i8008.c \
$(CPUSRC)/i8008/i8008.h
#-------------------------------------------------
@@ -653,7 +653,7 @@ CPUOBJS += $(CPUOBJ)/scmp/scmp.o
DASMOBJS += $(CPUOBJ)/scmp/scmpdasm.o
endif
-$(CPUOBJ)/scmp/scmp.o: $(CPUSRC)/scmp/scmp.c \
+$(CPUOBJ)/scmp/scmp.o: $(CPUSRC)/scmp/scmp.c \
$(CPUSRC)/scmp/scmp.h
@@ -667,7 +667,7 @@ CPUOBJS += $(CPUOBJ)/i8085/i8085.o
DASMOBJS += $(CPUOBJ)/i8085/8085dasm.o
endif
-$(CPUOBJ)/i8085/i8085.o: $(CPUSRC)/i8085/i8085.c \
+$(CPUOBJ)/i8085/i8085.o: $(CPUSRC)/i8085/i8085.c \
$(CPUSRC)/i8085/i8085.h \
$(CPUSRC)/i8085/i8085cpu.h
@@ -683,7 +683,7 @@ CPUOBJS += $(CPUOBJ)/mcs48/mcs48.o
DASMOBJS += $(CPUOBJ)/mcs48/mcs48dsm.o
endif
-$(CPUOBJ)/mcs48/mcs48.o: $(CPUSRC)/mcs48/mcs48.c \
+$(CPUOBJ)/mcs48/mcs48.o: $(CPUSRC)/mcs48/mcs48.c \
$(CPUSRC)/mcs48/mcs48.h
@@ -698,7 +698,7 @@ CPUOBJS += $(CPUOBJ)/mcs51/mcs51.o
DASMOBJS += $(CPUOBJ)/mcs51/mcs51dasm.o
endif
-$(CPUOBJ)/mcs51/mcs51.o: $(CPUSRC)/mcs51/mcs51.c \
+$(CPUOBJ)/mcs51/mcs51.o: $(CPUSRC)/mcs51/mcs51.c \
$(CPUSRC)/mcs51/mcs51.h \
$(CPUSRC)/mcs51/mcs51ops.c
@@ -709,22 +709,22 @@ $(CPUOBJ)/mcs51/mcs51.o: $(CPUSRC)/mcs51/mcs51.c \
ifneq ($(filter MCS96,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/mcs96
CPUOBJS += $(CPUOBJ)/mcs96/mcs96.o \
- $(CPUOBJ)/mcs96/i8x9x.o \
- $(CPUOBJ)/mcs96/i8xc196.o
+ $(CPUOBJ)/mcs96/i8x9x.o \
+ $(CPUOBJ)/mcs96/i8xc196.o
endif
-$(CPUOBJ)/mcs96/mcs96.o: $(CPUOBJ)/mcs96/mcs96.inc \
- $(CPUSRC)/mcs96/mcs96.c \
+$(CPUOBJ)/mcs96/mcs96.o: $(CPUOBJ)/mcs96/mcs96.inc \
+ $(CPUSRC)/mcs96/mcs96.c \
$(CPUSRC)/mcs96/mcs96.h
-$(CPUOBJ)/mcs96/i8x9x.o: $(CPUOBJ)/mcs96/i8x9x.inc \
- $(CPUSRC)/mcs96/i8x9x.c \
+$(CPUOBJ)/mcs96/i8x9x.o: $(CPUOBJ)/mcs96/i8x9x.inc \
+ $(CPUSRC)/mcs96/i8x9x.c \
$(CPUSRC)/mcs96/i8x9x.h \
$(CPUSRC)/mcs96/mcs96.h
-$(CPUOBJ)/mcs96/i8xc196.o: $(CPUOBJ)/mcs96/i8xc196.inc \
- $(CPUSRC)/mcs96/i8xc196.c \
- $(CPUSRC)/mcs96/i8xc196.c \
+$(CPUOBJ)/mcs96/i8xc196.o: $(CPUOBJ)/mcs96/i8xc196.inc \
+ $(CPUSRC)/mcs96/i8xc196.c \
+ $(CPUSRC)/mcs96/i8xc196.c \
$(CPUSRC)/mcs96/mcs96.h
$(CPUOBJ)/mcs96/mcs96.inc: $(CPUSRC)/mcs96/mcs96make.py $(CPUSRC)/mcs96/mcs96ops.lst
@@ -762,14 +762,14 @@ I86DEPS = \
$(CPUSRC)/i86/host.h \
$(CPUSRC)/i86/modrm.h
-$(CPUOBJ)/i86/i86.o: $(CPUSRC)/i86/i86.c \
+$(CPUOBJ)/i86/i86.o: $(CPUSRC)/i86/i86.c \
$(CPUSRC)/i86/i86.h \
$(CPUSRC)/i86/i86time.c \
$(CPUSRC)/i86/instr86.c \
$(CPUSRC)/i86/instr186.c \
$(I86DEPS)
-$(CPUOBJ)/i86/i286.o: $(CPUSRC)/i86/i286.c \
+$(CPUOBJ)/i86/i286.o: $(CPUSRC)/i86/i286.c \
$(CPUSRC)/i86/i286.h \
$(CPUSRC)/i86/i86time.c \
$(CPUSRC)/i86/instr86.c \
@@ -778,7 +778,7 @@ $(CPUOBJ)/i86/i286.o: $(CPUSRC)/i86/i286.c \
$(CPUSRC)/i86/modrm286.h \
$(I86DEPS)
-$(CPUOBJ)/i386/i386.o: $(CPUSRC)/i386/i386.c \
+$(CPUOBJ)/i386/i386.o: $(CPUSRC)/i386/i386.c \
$(CPUSRC)/i386/i386.h \
$(CPUSRC)/i386/i386priv.h \
$(CPUSRC)/i386/i386op16.c \
@@ -803,8 +803,8 @@ DASMOBJS += $(CPUOBJ)/i860/i860dis.o
endif
$(CPUOBJ)/i860/i860.o: $(CPUSRC)/i860/i860.c \
- $(CPUSRC)/i860/i860.h \
- $(CPUSRC)/i860/i860dec.c
+ $(CPUSRC)/i860/i860.h \
+ $(CPUSRC)/i860/i860dec.c
#-------------------------------------------------
# Intel i960
@@ -816,7 +816,7 @@ CPUOBJS += $(CPUOBJ)/i960/i960.o
DASMOBJS += $(CPUOBJ)/i960/i960dis.o
endif
-$(CPUOBJ)/i960/i960.o: $(CPUSRC)/i960/i960.c \
+$(CPUOBJ)/i960/i960.o: $(CPUSRC)/i960/i960.c \
$(CPUSRC)/i960/i960.h
@@ -831,7 +831,7 @@ CPUOBJS += $(CPUOBJ)/konami/konami.o
DASMOBJS += $(CPUOBJ)/konami/knmidasm.o
endif
-$(CPUOBJ)/konami/konami.o: $(CPUSRC)/konami/konami.c \
+$(CPUOBJ)/konami/konami.o: $(CPUSRC)/konami/konami.c \
$(CPUSRC)/konami/konami.h \
$(CPUSRC)/konami/konamops.c \
$(CPUSRC)/konami/konamtbl.c
@@ -848,7 +848,7 @@ CPUOBJS += $(CPUOBJ)/lh5801/lh5801.o
DASMOBJS += $(CPUOBJ)/lh5801/5801dasm.o
endif
-$(CPUOBJ)/lh5801/lh5801.o: $(CPUSRC)/lh5801/lh5801.c \
+$(CPUOBJ)/lh5801/lh5801.o: $(CPUSRC)/lh5801/lh5801.c \
$(CPUSRC)/lh5801/5801tbl.c \
$(CPUSRC)/lh5801/lh5801.h
@@ -864,7 +864,7 @@ CPUOBJS += $(CPUOBJ)/ssem/ssem.o
DASMOBJS += $(CPUOBJ)/ssem/ssemdasm.o
endif
-$(CPUOBJ)/ssem/ssem.o: $(CPUSRC)/ssem/ssem.c \
+$(CPUOBJ)/ssem/ssem.o: $(CPUSRC)/ssem/ssem.c \
$(CPUSRC)/ssem/ssem.h
@@ -879,7 +879,7 @@ CPUOBJS += $(CPUOBJ)/mb88xx/mb88xx.o
DASMOBJS += $(CPUOBJ)/mb88xx/mb88dasm.o
endif
-$(CPUOBJ)/mb88xx/mb88xx.o: $(CPUSRC)/mb88xx/mb88xx.c \
+$(CPUOBJ)/mb88xx/mb88xx.o: $(CPUSRC)/mb88xx/mb88xx.c \
$(CPUSRC)/mb88xx/mb88xx.h
@@ -894,7 +894,7 @@ CPUOBJS += $(CPUOBJ)/mb86233/mb86233.o
DASMOBJS += $(CPUOBJ)/mb86233/mb86233d.o
endif
-$(CPUOBJ)/mb86233/mb86233.o: $(CPUSRC)/mb86233/mb86233.c \
+$(CPUOBJ)/mb86233/mb86233.o: $(CPUSRC)/mb86233/mb86233.c \
$(CPUSRC)/mb86233/mb86233.h
@@ -909,7 +909,7 @@ CPUOBJS += $(CPUOBJ)/pic16c5x/pic16c5x.o
DASMOBJS += $(CPUOBJ)/pic16c5x/16c5xdsm.o
endif
-$(CPUOBJ)/pic16c5x/pic16c5x.o: $(CPUSRC)/pic16c5x/pic16c5x.c \
+$(CPUOBJ)/pic16c5x/pic16c5x.o: $(CPUSRC)/pic16c5x/pic16c5x.c \
$(CPUSRC)/pic16c5x/pic16c5x.h
@@ -924,7 +924,7 @@ CPUOBJS += $(CPUOBJ)/pic16c62x/pic16c62x.o
DASMOBJS += $(CPUOBJ)/pic16c62x/16c62xdsm.o
endif
-$(CPUOBJ)/pic16c62x/pic16c62x.o: $(CPUSRC)/pic16c62x/pic16c62x.c \
+$(CPUOBJ)/pic16c62x/pic16c62x.o: $(CPUSRC)/pic16c62x/pic16c62x.c \
$(CPUSRC)/pic16c62x/pic16c62x.h
@@ -942,20 +942,20 @@ DASMOBJS += $(CPUOBJ)/mips/r3kdasm.o
DASMOBJS += $(CPUOBJ)/mips/mips3dsm.o
endif
-$(CPUOBJ)/mips/r3000.o: $(CPUSRC)/mips/r3000.c \
+$(CPUOBJ)/mips/r3000.o: $(CPUSRC)/mips/r3000.c \
$(CPUSRC)/mips/r3000.h
-$(CPUOBJ)/mips/mips3.o: $(CPUSRC)/mips/mips3.h $(CPUSRC)/mips/mips3com.h \
+$(CPUOBJ)/mips/mips3.o: $(CPUSRC)/mips/mips3.h $(CPUSRC)/mips/mips3com.h \
$(CPUSRC)/mips/mips3.c
-$(CPUOBJ)/mips/mips3com.o: $(CPUSRC)/mips/mips3.h \
+$(CPUOBJ)/mips/mips3com.o: $(CPUSRC)/mips/mips3.h \
$(CPUSRC)/mips/mips3com.h
-$(CPUOBJ)/mips/mips3fe.o: $(CPUSRC)/mips/mips3.h \
+$(CPUOBJ)/mips/mips3fe.o: $(CPUSRC)/mips/mips3.h \
$(CPUSRC)/mips/mips3com.h \
$(CPUSRC)/mips/mips3fe.h
-$(CPUOBJ)/mips/mips3drc.o: $(CPUSRC)/mips/mips3drc.c \
+$(CPUOBJ)/mips/mips3drc.o: $(CPUSRC)/mips/mips3drc.c \
$(CPUSRC)/mips/mips3.h \
$(CPUSRC)/mips/mips3com.h \
$(CPUSRC)/mips/mips3fe.h \
@@ -973,7 +973,7 @@ CPUOBJS += $(CPUOBJ)/psx/psx.o $(CPUOBJ)/psx/gte.o $(CPUOBJ)/psx/dma.o $(CPUOBJ)
DASMOBJS += $(CPUOBJ)/psx/psxdasm.o
endif
-$(CPUOBJ)/psx/psx.o: $(CPUSRC)/psx/psx.c \
+$(CPUOBJ)/psx/psx.o: $(CPUSRC)/psx/psx.c \
$(CPUSRC)/psx/psx.h \
$(CPUSRC)/psx/dma.h \
$(CPUSRC)/psx/gte.h \
@@ -981,17 +981,17 @@ $(CPUOBJ)/psx/psx.o: $(CPUSRC)/psx/psx.c \
$(CPUSRC)/psx/rcnt.h \
$(CPUSRC)/psx/sio.h
-$(CPUOBJ)/psx/dma.o: $(CPUSRC)/psx/dma.c \
+$(CPUOBJ)/psx/dma.o: $(CPUSRC)/psx/dma.c \
$(CPUSRC)/psx/dma.h
-$(CPUOBJ)/psx/gte.o: $(CPUSRC)/psx/gte.c \
+$(CPUOBJ)/psx/gte.o: $(CPUSRC)/psx/gte.c \
$(CPUSRC)/psx/gte.h
-$(CPUOBJ)/psx/mdec.o: $(CPUSRC)/psx/mdec.c \
+$(CPUOBJ)/psx/mdec.o: $(CPUSRC)/psx/mdec.c \
$(CPUSRC)/psx/dma.h \
$(CPUSRC)/psx/mdec.h
-$(CPUOBJ)/psx/sio.o: $(CPUSRC)/psx/sio.c \
+$(CPUOBJ)/psx/sio.o: $(CPUSRC)/psx/sio.c \
$(CPUSRC)/psx/sio.h
@@ -1015,22 +1015,22 @@ M37710DEPS = \
$(CPUSRC)/m37710/m37710op.h \
$(CPUSRC)/m37710/m7700ds.h
-$(CPUOBJ)/m37710/m37710.o: $(CPUSRC)/m37710/m37710.c \
+$(CPUOBJ)/m37710/m37710.o: $(CPUSRC)/m37710/m37710.c \
$(M37710DEPS)
-$(CPUOBJ)/m37710/m37710o0.o: $(CPUSRC)/m37710/m37710o0.c \
+$(CPUOBJ)/m37710/m37710o0.o: $(CPUSRC)/m37710/m37710o0.c \
$(M37710DEPS)
-$(CPUOBJ)/m37710/m37710o1.o: $(CPUSRC)/m37710/m37710o1.c \
+$(CPUOBJ)/m37710/m37710o1.o: $(CPUSRC)/m37710/m37710o1.c \
$(M37710DEPS)
-$(CPUOBJ)/m37710/m37710o2.o: $(CPUSRC)/m37710/m37710o2.c \
+$(CPUOBJ)/m37710/m37710o2.o: $(CPUSRC)/m37710/m37710o2.c \
$(M37710DEPS)
-$(CPUOBJ)/m37710/m37710o3.o: $(CPUSRC)/m37710/m37710o3.c \
+$(CPUOBJ)/m37710/m37710o3.o: $(CPUSRC)/m37710/m37710o3.c \
$(M37710DEPS)
-$(CPUOBJ)/m37710/m7700ds.o: $(CPUSRC)/m37710/m7700ds.c \
+$(CPUOBJ)/m37710/m7700ds.o: $(CPUSRC)/m37710/m7700ds.c \
$(CPUSRC)/m37710/m7700ds.h
@@ -1042,96 +1042,96 @@ $(CPUOBJ)/m37710/m7700ds.o: $(CPUSRC)/m37710/m7700ds.c \
ifneq ($(filter M6502,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/m6502
CPUOBJS += $(CPUOBJ)/m6502/deco16.o \
- $(CPUOBJ)/m6502/m4510.o \
- $(CPUOBJ)/m6502/m6502.o \
- $(CPUOBJ)/m6502/m65c02.o \
- $(CPUOBJ)/m6502/m65ce02.o \
- $(CPUOBJ)/m6502/m65sc02.o \
- $(CPUOBJ)/m6502/m6504.o \
- $(CPUOBJ)/m6502/m6509.o \
- $(CPUOBJ)/m6502/m6510.o \
- $(CPUOBJ)/m6502/m6510t.o \
- $(CPUOBJ)/m6502/m7501.o \
- $(CPUOBJ)/m6502/m8502.o \
- $(CPUOBJ)/m6502/n2a03.o \
- $(CPUOBJ)/m6502/r65c02.o \
- $(CPUOBJ)/m6502/m740.o
+ $(CPUOBJ)/m6502/m4510.o \
+ $(CPUOBJ)/m6502/m6502.o \
+ $(CPUOBJ)/m6502/m65c02.o \
+ $(CPUOBJ)/m6502/m65ce02.o \
+ $(CPUOBJ)/m6502/m65sc02.o \
+ $(CPUOBJ)/m6502/m6504.o \
+ $(CPUOBJ)/m6502/m6509.o \
+ $(CPUOBJ)/m6502/m6510.o \
+ $(CPUOBJ)/m6502/m6510t.o \
+ $(CPUOBJ)/m6502/m7501.o \
+ $(CPUOBJ)/m6502/m8502.o \
+ $(CPUOBJ)/m6502/n2a03.o \
+ $(CPUOBJ)/m6502/r65c02.o \
+ $(CPUOBJ)/m6502/m740.o
DASMOBJS +=
endif
-$(CPUOBJ)/m6502/deco16.o: $(CPUSRC)/m6502/deco16.c \
+$(CPUOBJ)/m6502/deco16.o: $(CPUSRC)/m6502/deco16.c \
$(CPUOBJ)/m6502/deco16.inc \
$(CPUSRC)/m6502/deco16.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m4510.o: $(CPUSRC)/m6502/m4510.c \
+$(CPUOBJ)/m6502/m4510.o: $(CPUSRC)/m6502/m4510.c \
$(CPUOBJ)/m6502/m4510.inc \
$(CPUSRC)/m6502/m4510.h \
$(CPUSRC)/m6502/m65ce02.h \
$(CPUSRC)/m6502/m65c02.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m6502.o: $(CPUSRC)/m6502/m6502.c \
+$(CPUOBJ)/m6502/m6502.o: $(CPUSRC)/m6502/m6502.c \
$(CPUOBJ)/m6502/m6502.inc \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m65c02.o: $(CPUSRC)/m6502/m65c02.c \
+$(CPUOBJ)/m6502/m65c02.o: $(CPUSRC)/m6502/m65c02.c \
$(CPUOBJ)/m6502/m65c02.inc \
$(CPUSRC)/m6502/m65c02.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m65ce02.o: $(CPUSRC)/m6502/m65ce02.c \
+$(CPUOBJ)/m6502/m65ce02.o: $(CPUSRC)/m6502/m65ce02.c \
$(CPUOBJ)/m6502/m65ce02.inc \
$(CPUSRC)/m6502/m65ce02.h \
$(CPUSRC)/m6502/m65c02.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m65sc02.o: $(CPUSRC)/m6502/m65sc02.c \
+$(CPUOBJ)/m6502/m65sc02.o: $(CPUSRC)/m6502/m65sc02.c \
$(CPUSRC)/m6502/m65sc02.h \
$(CPUSRC)/m6502/r65c02.h \
$(CPUSRC)/m6502/m65c02.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m6504.o: $(CPUSRC)/m6502/m6504.c \
+$(CPUOBJ)/m6502/m6504.o: $(CPUSRC)/m6502/m6504.c \
$(CPUSRC)/m6502/m6504.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m6509.o: $(CPUSRC)/m6502/m6509.c \
+$(CPUOBJ)/m6502/m6509.o: $(CPUSRC)/m6502/m6509.c \
$(CPUOBJ)/m6502/m6509.inc \
$(CPUSRC)/m6502/m6509.h
-$(CPUOBJ)/m6502/m6510.o: $(CPUSRC)/m6502/m6510.c \
+$(CPUOBJ)/m6502/m6510.o: $(CPUSRC)/m6502/m6510.c \
$(CPUOBJ)/m6502/m6510.inc \
$(CPUSRC)/m6502/m6510.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m6510t.o: $(CPUSRC)/m6502/m6510t.c \
+$(CPUOBJ)/m6502/m6510t.o: $(CPUSRC)/m6502/m6510t.c \
$(CPUSRC)/m6502/m6510t.h \
$(CPUSRC)/m6502/m6510.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m7501.o: $(CPUSRC)/m6502/m7501.c \
+$(CPUOBJ)/m6502/m7501.o: $(CPUSRC)/m6502/m7501.c \
$(CPUSRC)/m6502/m7501.h \
$(CPUSRC)/m6502/m6510.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m8502.o: $(CPUSRC)/m6502/m8502.c \
+$(CPUOBJ)/m6502/m8502.o: $(CPUSRC)/m6502/m8502.c \
$(CPUSRC)/m6502/m8502.h \
$(CPUSRC)/m6502/m6510.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/n2a03.o: $(CPUSRC)/m6502/n2a03.c \
+$(CPUOBJ)/m6502/n2a03.o: $(CPUSRC)/m6502/n2a03.c \
$(CPUOBJ)/m6502/n2a03.inc \
$(CPUSRC)/m6502/n2a03.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/r65c02.o: $(CPUSRC)/m6502/r65c02.c \
+$(CPUOBJ)/m6502/r65c02.o: $(CPUSRC)/m6502/r65c02.c \
$(CPUOBJ)/m6502/r65c02.inc \
$(CPUSRC)/m6502/r65c02.h \
$(CPUSRC)/m6502/m65c02.h \
$(CPUSRC)/m6502/m6502.h
-$(CPUOBJ)/m6502/m740.o: $(CPUSRC)/m6502/m740.c \
+$(CPUOBJ)/m6502/m740.o: $(CPUSRC)/m6502/m740.c \
$(CPUOBJ)/m6502/m740.inc \
$(CPUSRC)/m6502/m740.h \
$(CPUSRC)/m6502/m6502.h
@@ -1187,7 +1187,7 @@ CPUOBJS += $(CPUOBJ)/m6800/m6800.o
DASMOBJS += $(CPUOBJ)/m6800/6800dasm.o
endif
-$(CPUOBJ)/m6800/m6800.o: $(CPUSRC)/m6800/m6800.c \
+$(CPUOBJ)/m6800/m6800.o: $(CPUSRC)/m6800/m6800.c \
$(CPUSRC)/m6800/m6800.h \
$(CPUSRC)/m6800/6800ops.c \
$(CPUSRC)/m6800/6800tbl.c
@@ -1204,7 +1204,7 @@ CPUOBJS += $(CPUOBJ)/m6805/m6805.o
DASMOBJS += $(CPUOBJ)/m6805/6805dasm.o
endif
-$(CPUOBJ)/m6805/m6805.o: $(CPUSRC)/m6805/m6805.c \
+$(CPUOBJ)/m6805/m6805.o: $(CPUSRC)/m6805/m6805.c \
$(CPUSRC)/m6805/m6805.h \
$(CPUSRC)/m6805/6805ops.c
@@ -1220,7 +1220,7 @@ CPUOBJS += $(CPUOBJ)/m6809/m6809.o
DASMOBJS += $(CPUOBJ)/m6809/6809dasm.o
endif
-$(CPUOBJ)/m6809/m6809.o: $(CPUSRC)/m6809/m6809.c \
+$(CPUOBJ)/m6809/m6809.o: $(CPUSRC)/m6809/m6809.c \
$(CPUSRC)/m6809/m6809.h \
$(CPUSRC)/m6809/6809ops.c \
$(CPUSRC)/m6809/6809tbl.c
@@ -1237,7 +1237,7 @@ CPUOBJS += $(CPUOBJ)/mc68hc11/mc68hc11.o
DASMOBJS += $(CPUOBJ)/mc68hc11/hc11dasm.o
endif
-$(CPUOBJ)/mc68hc11/mc68hc11.o: $(CPUSRC)/mc68hc11/mc68hc11.c \
+$(CPUOBJ)/mc68hc11/mc68hc11.o: $(CPUSRC)/mc68hc11/mc68hc11.c \
$(CPUSRC)/mc68hc11/hc11ops.c
@@ -1290,7 +1290,7 @@ $(M68KMAKE): $(CPUOBJ)/m68000/m68kmake.o $(LIBOCORE)
endif
# rule to ensure we build the header before building the core CPU file
-$(CPUOBJ)/m68000/m68kcpu.o: $(CPUOBJ)/m68000/m68kops.c \
+$(CPUOBJ)/m68000/m68kcpu.o: $(CPUOBJ)/m68000/m68kops.c \
$(CPUSRC)/m68000/m68kcpu.h $(CPUSRC)/m68000/m68kfpu.c $(CPUSRC)/m68000/m68kmmu.h
# m68kcpu.h now includes m68kops.h; m68kops.h won't exist until m68kops.c has been made
@@ -1321,28 +1321,28 @@ DASMOBJS += $(CPUOBJ)/dsp56k/pmove.o
DASMOBJS += $(CPUOBJ)/dsp56k/tables.o
endif
-$(CPUOBJ)/dsp56k/dsp56mem.o: $(CPUSRC)/dsp56k/dsp56mem.c \
+$(CPUOBJ)/dsp56k/dsp56mem.o: $(CPUSRC)/dsp56k/dsp56mem.c \
$(CPUSRC)/dsp56k/dsp56mem.h
-$(CPUOBJ)/dsp56k/dsp56pcu.o: $(CPUSRC)/dsp56k/dsp56pcu.c \
+$(CPUOBJ)/dsp56k/dsp56pcu.o: $(CPUSRC)/dsp56k/dsp56pcu.c \
$(CPUSRC)/dsp56k/dsp56pcu.h
-$(CPUOBJ)/dsp56k/dsp56k.o: $(CPUSRC)/dsp56k/dsp56k.c \
+$(CPUOBJ)/dsp56k/dsp56k.o: $(CPUSRC)/dsp56k/dsp56k.c \
$(CPUSRC)/dsp56k/dsp56k.h
-$(CPUOBJ)/dsp56k/opcode.o: $(CPUSRC)/dsp56k/opcode.c \
+$(CPUOBJ)/dsp56k/opcode.o: $(CPUSRC)/dsp56k/opcode.c \
$(CPUSRC)/dsp56k/opcode.h
-$(CPUOBJ)/dsp56k/inst.o: $(CPUSRC)/dsp56k/inst.c \
+$(CPUOBJ)/dsp56k/inst.o: $(CPUSRC)/dsp56k/inst.c \
$(CPUSRC)/dsp56k/inst.h
-$(CPUOBJ)/dsp56k/pmove.o: $(CPUSRC)/dsp56k/pmove.c \
+$(CPUOBJ)/dsp56k/pmove.o: $(CPUSRC)/dsp56k/pmove.c \
$(CPUSRC)/dsp56k/pmove.h
-$(CPUOBJ)/dsp56k/tables.o: $(CPUSRC)/dsp56k/tables.c \
+$(CPUOBJ)/dsp56k/tables.o: $(CPUSRC)/dsp56k/tables.c \
$(CPUSRC)/dsp56k/tables.h
-$(CPUOBJ)/dsp56k/dsp56dsm.o: $(CPUSRC)/dsp56k/opcode.c \
+$(CPUOBJ)/dsp56k/dsp56dsm.o: $(CPUSRC)/dsp56k/opcode.c \
$(CPUSRC)/dsp56k/opcode.h \
$(CPUSRC)/dsp56k/inst.c \
$(CPUSRC)/dsp56k/inst.h \
@@ -1365,13 +1365,13 @@ DASMOBJS += $(CPUOBJ)/pdp1/pdp1dasm.o
DASMOBJS += $(CPUOBJ)/pdp1/tx0dasm.o
endif
-$(CPUOBJ)/pdp1/pdp1.o: $(CPUSRC)/pdp1/pdp1.c \
+$(CPUOBJ)/pdp1/pdp1.o: $(CPUSRC)/pdp1/pdp1.c \
$(CPUSRC)/pdp1/pdp1.h
-$(CPUOBJ)/pdp1/tx0.o: $(CPUSRC)/pdp1/tx0.h \
+$(CPUOBJ)/pdp1/tx0.o: $(CPUSRC)/pdp1/tx0.h \
$(CPUSRC)/pdp1/tx0.c
-$(CPUOBJ)/pdp1/tx0dasm.o: $(CPUSRC)/pdp1/tx0.h \
+$(CPUOBJ)/pdp1/tx0dasm.o: $(CPUSRC)/pdp1/tx0.h \
$(CPUSRC)/pdp1/tx0dasm.c
@@ -1385,14 +1385,14 @@ CPUOBJS += $(CPUOBJ)/powerpc/ppccom.o $(CPUOBJ)/powerpc/ppcfe.o $(CPUOBJ)/powerp
DASMOBJS += $(CPUOBJ)/powerpc/ppc_dasm.o
endif
-$(CPUOBJ)/powerpc/ppccom.o: $(CPUSRC)/powerpc/ppc.h \
+$(CPUOBJ)/powerpc/ppccom.o: $(CPUSRC)/powerpc/ppc.h \
$(CPUSRC)/powerpc/ppccom.h
-$(CPUOBJ)/powerpc/ppcfe.o: $(CPUSRC)/powerpc/ppc.h \
+$(CPUOBJ)/powerpc/ppcfe.o: $(CPUSRC)/powerpc/ppc.h \
$(CPUSRC)/powerpc/ppccom.h \
$(CPUSRC)/powerpc/ppcfe.h
-$(CPUOBJ)/powerpc/ppcdrc.o: $(CPUSRC)/powerpc/ppcdrc.c \
+$(CPUOBJ)/powerpc/ppcdrc.o: $(CPUSRC)/powerpc/ppcdrc.c \
$(CPUSRC)/powerpc/ppc.h \
$(CPUSRC)/powerpc/ppccom.h \
$(CPUSRC)/powerpc/ppcfe.h \
@@ -1418,7 +1418,7 @@ CPUOBJS += $(CPUOBJ)/v30mz/v30mz.o
DASMOBJS += $(CPUOBJ)/nec/necdasm.o
endif
-$(CPUOBJ)/nec/nec.o: $(CPUSRC)/nec/nec.c \
+$(CPUOBJ)/nec/nec.o: $(CPUSRC)/nec/nec.c \
$(CPUSRC)/nec/nec.h \
$(CPUSRC)/nec/necea.h \
$(CPUSRC)/nec/necinstr.c \
@@ -1427,7 +1427,7 @@ $(CPUOBJ)/nec/nec.o: $(CPUSRC)/nec/nec.c \
$(CPUSRC)/nec/necmodrm.h \
$(CPUSRC)/nec/necpriv.h
-$(CPUOBJ)/nec/v25.o: $(CPUSRC)/nec/v25.c \
+$(CPUOBJ)/nec/v25.o: $(CPUSRC)/nec/v25.c \
$(CPUSRC)/nec/nec.h \
$(CPUSRC)/nec/necea.h \
$(CPUSRC)/nec/necinstr.c \
@@ -1437,11 +1437,11 @@ $(CPUOBJ)/nec/v25.o: $(CPUSRC)/nec/v25.c \
$(CPUSRC)/nec/necmodrm.h \
$(CPUSRC)/nec/v25priv.h
-$(CPUOBJ)/nec/v25sfr.o: $(CPUSRC)/nec/v25sfr.c \
+$(CPUOBJ)/nec/v25sfr.o: $(CPUSRC)/nec/v25sfr.c \
$(CPUSRC)/nec/nec.h \
$(CPUSRC)/nec/v25priv.h
-$(CPUOBJ)/v30mz/v30mz.o: $(CPUSRC)/v30mz/v30mz.c \
+$(CPUOBJ)/v30mz/v30mz.o: $(CPUSRC)/v30mz/v30mz.c \
$(CPUSRC)/v30mz/v30mz.h
@@ -1456,7 +1456,7 @@ CPUOBJS += $(CPUOBJ)/v60/v60.o
DASMOBJS += $(CPUOBJ)/v60/v60d.o
endif
-$(CPUOBJ)/v60/v60.o: $(CPUSRC)/v60/am.c \
+$(CPUOBJ)/v60/v60.o: $(CPUSRC)/v60/am.c \
$(CPUSRC)/v60/am1.c \
$(CPUSRC)/v60/am2.c \
$(CPUSRC)/v60/am3.c \
@@ -1484,7 +1484,7 @@ CPUOBJS += $(CPUOBJ)/v810/v810.o
DASMOBJS += $(CPUOBJ)/v810/v810dasm.o
endif
-$(CPUOBJ)/v810/v810.o: $(CPUSRC)/v810/v810.c \
+$(CPUOBJ)/v810/v810.o: $(CPUSRC)/v810/v810.c \
$(CPUSRC)/v810/v810.h
@@ -1498,7 +1498,7 @@ CPUOBJS += $(CPUOBJ)/upd7725/upd7725.o
DASMOBJS += $(CPUOBJ)/upd7725/dasm7725.o
endif
-$(CPUOBJ)/upd7725/upd7725.o: $(CPUSRC)/upd7725/upd7725.c \
+$(CPUOBJ)/upd7725/upd7725.o: $(CPUSRC)/upd7725/upd7725.c \
$(CPUSRC)/upd7725/upd7725.h
@@ -1512,7 +1512,7 @@ CPUOBJS += $(CPUOBJ)/upd7810/upd7810.o
DASMOBJS += $(CPUOBJ)/upd7810/7810dasm.o
endif
-$(CPUOBJ)/upd7810/upd7810.o: $(CPUSRC)/upd7810/upd7810.c \
+$(CPUOBJ)/upd7810/upd7810.o: $(CPUSRC)/upd7810/upd7810.c \
$(CPUSRC)/upd7810/7810tbl.c \
$(CPUSRC)/upd7810/7810ops.c \
$(CPUSRC)/upd7810/upd7810.h
@@ -1529,7 +1529,7 @@ CPUOBJS += $(CPUOBJ)/minx/minx.o
DASMOBJS += $(CPUOBJ)/minx/minxd.o
endif
-$(CPUOBJ)/minx/minx.o: $(CPUSRC)/minx/minx.c \
+$(CPUOBJ)/minx/minx.o: $(CPUSRC)/minx/minx.c \
$(CPUSRC)/minx/minx.h \
$(CPUSRC)/minx/minxd.c \
$(CPUSRC)/minx/minxopce.h \
@@ -1548,15 +1548,15 @@ CPUOBJS += $(CPUOBJ)/rsp/rsp.o $(CPUOBJ)/rsp/rspdrc.o $(CPUOBJ)/rsp/rspfe.o $(DR
DASMOBJS += $(CPUOBJ)/rsp/rsp_dasm.o
endif
-$(CPUOBJ)/rsp/rsp.o: $(CPUSRC)/rsp/rsp.c \
+$(CPUOBJ)/rsp/rsp.o: $(CPUSRC)/rsp/rsp.c \
$(CPUSRC)/rsp/rsp.h
-$(CPUOBJ)/rsp/rspdrc.o: $(CPUSRC)/rsp/rspdrc.c \
+$(CPUOBJ)/rsp/rspdrc.o: $(CPUSRC)/rsp/rspdrc.c \
$(CPUSRC)/rsp/rsp.h \
$(CPUSRC)/rsp/rspfe.h \
$(DRCDEPS)
-$(CPUOBJ)/rsp/rspfe.o: $(CPUSRC)/rsp/rspfe.c \
+$(CPUOBJ)/rsp/rspfe.o: $(CPUSRC)/rsp/rspfe.c \
$(CPUSRC)/rsp/rspfe.h
@@ -1570,7 +1570,7 @@ CPUOBJS += $(CPUOBJ)/mn10200/mn10200.o
DASMOBJS += $(CPUOBJ)/mn10200/mn102dis.o
endif
-$(CPUOBJ)/mn10200/mn10200.o: $(CPUSRC)/mn10200/mn10200.c \
+$(CPUOBJ)/mn10200/mn10200.o: $(CPUSRC)/mn10200/mn10200.c \
$(CPUSRC)/mn10200/mn10200.h
@@ -1584,7 +1584,7 @@ CPUOBJS += $(CPUOBJ)/saturn/saturn.o
DASMOBJS += $(CPUOBJ)/saturn/saturnds.o
endif
-$(CPUOBJ)/saturn/saturn.o: $(CPUSRC)/saturn/saturn.c \
+$(CPUOBJ)/saturn/saturn.o: $(CPUSRC)/saturn/saturn.c \
$(CPUSRC)/saturn/sattable.c \
$(CPUSRC)/saturn/satops.c \
$(CPUSRC)/saturn/saturn.h
@@ -1601,7 +1601,7 @@ CPUOBJS += $(CPUOBJ)/s2650/s2650.o
DASMOBJS += $(CPUOBJ)/s2650/2650dasm.o
endif
-$(CPUOBJ)/s2650/s2650.o: $(CPUSRC)/s2650/s2650.c \
+$(CPUOBJ)/s2650/s2650.o: $(CPUSRC)/s2650/s2650.c \
$(CPUSRC)/s2650/s2650.h \
$(CPUSRC)/s2650/s2650cpu.h
@@ -1617,7 +1617,7 @@ CPUOBJS += $(CPUOBJ)/sc61860/sc61860.o
DASMOBJS += $(CPUOBJ)/sc61860/scdasm.o
endif
-$(CPUOBJ)/sc61860/sc61860.o: $(CPUSRC)/sc61860/sc61860.h \
+$(CPUOBJ)/sc61860/sc61860.o: $(CPUSRC)/sc61860/sc61860.h \
$(CPUSRC)/sc61860/sc.h \
$(CPUSRC)/sc61860/scops.c \
$(CPUSRC)/sc61860/sctable.c
@@ -1634,7 +1634,7 @@ CPUOBJS += $(CPUOBJ)/sm8500/sm8500.o
DASMOBJS += $(CPUOBJ)/sm8500/sm8500d.o
endif
-$(CPUOBJ)/sm8500/sm8500.o: $(CPUSRC)/sm8500/sm8500.c \
+$(CPUOBJ)/sm8500/sm8500.o: $(CPUSRC)/sm8500/sm8500.c \
$(CPUSRC)/sm8500/sm8500.h \
$(CPUSRC)/sm8500/sm85ops.h
@@ -1651,7 +1651,7 @@ CPUOBJS += $(CPUOBJ)/spc700/spc700.o
DASMOBJS += $(CPUOBJ)/spc700/spc700ds.o
endif
-$(CPUOBJ)/spc700/spc700.o: $(CPUSRC)/spc700/spc700.c \
+$(CPUOBJ)/spc700/spc700.o: $(CPUSRC)/spc700/spc700.c \
$(CPUSRC)/spc700/spc700.h
@@ -1666,7 +1666,7 @@ CPUOBJS += $(CPUOBJ)/ssp1601/ssp1601.o
DASMOBJS += $(CPUOBJ)/ssp1601/ssp1601d.o
endif
-$(CPUOBJ)/ssp1610/ssp1601.o: $(CPUSRC)/ssp1601/ssp1601.c \
+$(CPUOBJ)/ssp1610/ssp1601.o: $(CPUSRC)/ssp1601/ssp1601.c \
$(CPUSRC)/ssp1610/ssp1601.h
@@ -1681,7 +1681,7 @@ CPUOBJS += $(CPUOBJ)/unsp/unsp.o
DASMOBJS += $(CPUOBJ)/unsp/unspdasm.o
endif
-$(CPUOBJ)/unsp/unsp.o: $(CPUSRC)/unsp/unsp.c \
+$(CPUOBJ)/unsp/unsp.o: $(CPUSRC)/unsp/unsp.c \
$(CPUSRC)/unsp/unsp.h
@@ -1696,7 +1696,7 @@ CPUOBJS += $(CPUOBJ)/avr8/avr8.o
DASMOBJS += $(CPUOBJ)/avr8/avr8dasm.o
endif
-$(CPUOBJ)/avr8/avr8.o: $(CPUSRC)/avr8/avr8.c \
+$(CPUOBJ)/avr8/avr8.o: $(CPUSRC)/avr8/avr8.c \
$(CPUSRC)/avr8/avr8.h
@@ -1711,10 +1711,10 @@ CPUOBJS += $(CPUOBJ)/tms0980/tms0980.o
DASMOBJS += $(CPUOBJ)/tms0980/tms0980d.o
endif
-$(CPUOBJ)/tms0980/tms0980.o: $(CPUSRC)/tms0980/tms0980.h \
+$(CPUOBJ)/tms0980/tms0980.o: $(CPUSRC)/tms0980/tms0980.h \
$(CPUSRC)/tms0980/tms0980.c
-$(CPUOBJ)/tms0980/tms0980d.o: $(CPUSRC)/tms0980/tms0980.h \
+$(CPUOBJ)/tms0980/tms0980d.o: $(CPUSRC)/tms0980/tms0980.h \
$(CPUSRC)/tms0980/tms0980d.c
@@ -1729,12 +1729,12 @@ CPUOBJS += $(CPUOBJ)/tms7000/tms7000.o
DASMOBJS += $(CPUOBJ)/tms7000/7000dasm.o
endif
-$(CPUOBJ)/tms7000/tms7000.o: $(CPUSRC)/tms7000/tms7000.h \
+$(CPUOBJ)/tms7000/tms7000.o: $(CPUSRC)/tms7000/tms7000.h \
$(CPUSRC)/tms7000/tms7000.c \
$(CPUSRC)/tms7000/tms70op.c \
$(CPUSRC)/tms7000/tms70tb.c
-$(CPUOBJ)/tms7000/7000dasm.o: $(CPUSRC)/tms7000/tms7000.h \
+$(CPUOBJ)/tms7000/7000dasm.o: $(CPUSRC)/tms7000/tms7000.h \
$(CPUSRC)/tms7000/7000dasm.c
@@ -1755,33 +1755,33 @@ CPUOBJS += $(CPUOBJ)/tms9900/ti990_10l.o
DASMOBJS += $(CPUOBJ)/tms9900/9900dasm.o
endif
-$(CPUOBJ)/tms9900/tms9900.o: $(CPUSRC)/tms9900/tms9900.c \
+$(CPUOBJ)/tms9900/tms9900.o: $(CPUSRC)/tms9900/tms9900.c \
$(CPUSRC)/tms9900/tms9900.h
-$(CPUOBJ)/tms9900/tms9900l.o: $(CPUSRC)/tms9900/tms9900l.c \
+$(CPUOBJ)/tms9900/tms9900l.o: $(CPUSRC)/tms9900/tms9900l.c \
$(CPUSRC)/tms9900/tms9900l.h \
$(CPUSRC)/tms9900/99xxcore.h \
$(CPUSRC)/tms9900/99xxstat.h
-$(CPUOBJ)/tms9900/tms9980a.o: $(CPUSRC)/tms9900/tms9980a.c \
+$(CPUOBJ)/tms9900/tms9980a.o: $(CPUSRC)/tms9900/tms9980a.c \
$(CPUSRC)/tms9900/tms9980a.h \
$(CPUSRC)/tms9900/tms9900.c \
$(CPUSRC)/tms9900/tms9900.h
-$(CPUOBJ)/tms9900/tms9980al.o: $(CPUSRC)/tms9900/tms9980al.c \
+$(CPUOBJ)/tms9900/tms9980al.o: $(CPUSRC)/tms9900/tms9980al.c \
$(CPUSRC)/tms9900/tms9900l.h \
$(CPUSRC)/tms9900/99xxcore.h \
$(CPUSRC)/tms9900/99xxstat.h
-$(CPUOBJ)/tms9900/tms9995.o: $(CPUSRC)/tms9900/tms9995.c \
+$(CPUOBJ)/tms9900/tms9995.o: $(CPUSRC)/tms9900/tms9995.c \
$(CPUSRC)/tms9900/tms9995.h
-$(CPUOBJ)/tms9900/tms9995l.o: $(CPUSRC)/tms9900/tms9995l.c \
+$(CPUOBJ)/tms9900/tms9995l.o: $(CPUSRC)/tms9900/tms9995l.c \
$(CPUSRC)/tms9900/tms9900l.h \
$(CPUSRC)/tms9900/99xxcore.h \
$(CPUSRC)/tms9900/99xxstat.h
-$(CPUOBJ)/tms9900/ti990_10l.o: $(CPUSRC)/tms9900/ti990_10l.c \
+$(CPUOBJ)/tms9900/ti990_10l.o: $(CPUSRC)/tms9900/ti990_10l.c \
$(CPUSRC)/tms9900/tms9900l.h \
$(CPUSRC)/tms9900/99xxcore.h \
$(CPUSRC)/tms9900/99xxstat.h
@@ -1798,7 +1798,7 @@ CPUOBJS += $(CPUOBJ)/tms34010/tms34010.o
DASMOBJS += $(CPUOBJ)/tms34010/34010dsm.o
endif
-$(CPUOBJ)/tms34010/tms34010.o: $(CPUSRC)/tms34010/tms34010.c \
+$(CPUOBJ)/tms34010/tms34010.o: $(CPUSRC)/tms34010/tms34010.c \
$(CPUSRC)/tms34010/tms34010.h \
$(CPUSRC)/tms34010/34010ops.c \
$(CPUSRC)/tms34010/34010gfx.c \
@@ -1817,7 +1817,7 @@ CPUOBJS += $(CPUOBJ)/tms32010/tms32010.o
DASMOBJS += $(CPUOBJ)/tms32010/32010dsm.o
endif
-$(CPUOBJ)/tms32010/tms32010.o: $(CPUSRC)/tms32010/tms32010.c \
+$(CPUOBJ)/tms32010/tms32010.o: $(CPUSRC)/tms32010/tms32010.c \
$(CPUSRC)/tms32010/tms32010.h
@@ -1832,7 +1832,7 @@ CPUOBJS += $(CPUOBJ)/tms32025/tms32025.o
DASMOBJS += $(CPUOBJ)/tms32025/32025dsm.o
endif
-$(CPUOBJ)/tms32025/tms32025.o: $(CPUSRC)/tms32025/tms32025.c \
+$(CPUOBJ)/tms32025/tms32025.o: $(CPUSRC)/tms32025/tms32025.c \
$(CPUSRC)/tms32025/tms32025.h
@@ -1847,7 +1847,7 @@ CPUOBJS += $(CPUOBJ)/tms32031/tms32031.o
DASMOBJS += $(CPUOBJ)/tms32031/dis32031.o
endif
-$(CPUOBJ)/tms32031/tms32031.o: $(CPUSRC)/tms32031/tms32031.c \
+$(CPUOBJ)/tms32031/tms32031.o: $(CPUSRC)/tms32031/tms32031.c \
$(CPUSRC)/tms32031/tms32031.h \
$(CPUSRC)/tms32031/32031ops.c
@@ -1863,7 +1863,7 @@ CPUOBJS += $(CPUOBJ)/tms32051/tms32051.o
DASMOBJS += $(CPUOBJ)/tms32051/dis32051.o
endif
-$(CPUOBJ)/tms32051/tms32051.o: $(CPUSRC)/tms32051/tms32051.c \
+$(CPUOBJ)/tms32051/tms32051.o: $(CPUSRC)/tms32051/tms32051.c \
$(CPUSRC)/tms32051/tms32051.h \
$(CPUSRC)/tms32051/32051ops.c
@@ -1879,15 +1879,15 @@ CPUOBJS += $(CPUOBJ)/tms57002/tms57002.o $(CPUOBJ)/tms57002/tms57kdec.o
DASMOBJS += $(CPUOBJ)/tms57002/57002dsm.o
endif
-$(CPUOBJ)/tms57002/tms57002.o: $(CPUSRC)/tms57002/tms57002.c \
+$(CPUOBJ)/tms57002/tms57002.o: $(CPUSRC)/tms57002/tms57002.c \
$(CPUSRC)/tms57002/tms57002.h \
$(CPUOBJ)/tms57002/tms57002.inc
-$(CPUOBJ)/tms57002/tms57kdec.o: $(CPUSRC)/tms57002/tms57kdec.c \
+$(CPUOBJ)/tms57002/tms57kdec.o: $(CPUSRC)/tms57002/tms57kdec.c \
$(CPUSRC)/tms57002/tms57002.h \
$(CPUOBJ)/tms57002/tms57002.inc
-$(CPUOBJ)/tms57002/57002dsm.o: $(CPUSRC)/tms57002/57002dsm.c \
+$(CPUOBJ)/tms57002/57002dsm.o: $(CPUSRC)/tms57002/57002dsm.c \
$(CPUOBJ)/tms57002/tms57002.inc
# rule to generate the C file
@@ -1906,7 +1906,7 @@ CPUOBJS += $(CPUOBJ)/tlcs90/tlcs90.o
#DASMOBJS += $(CPUOBJ)/tlcs90/tlcs90.o
endif
-$(CPUOBJ)/tlcs90/tlcs90.o: $(CPUSRC)/tlcs90/tlcs90.c \
+$(CPUOBJ)/tlcs90/tlcs90.o: $(CPUSRC)/tlcs90/tlcs90.c \
$(CPUSRC)/tlcs90/tlcs90.h
@@ -1921,11 +1921,11 @@ CPUOBJS += $(CPUOBJ)/tlcs900/tlcs900.o
DASMOBJS += $(CPUOBJ)/tlcs900/dasm900.o
endif
-$(CPUOBJ)/tlcs900/tlcs900.o: $(CPUSRC)/tlcs900/tlcs900.c \
+$(CPUOBJ)/tlcs900/tlcs900.o: $(CPUSRC)/tlcs900/tlcs900.c \
$(CPUSRC)/tlcs900/900tbl.c \
$(CPUSRC)/tlcs900/tlcs900.h
-$(CPUOBJ)/tlcs900/dasm900.o: $(CPUSRC)/tlcs900/dasm900.c
+$(CPUOBJ)/tlcs900/dasm900.o: $(CPUSRC)/tlcs900/dasm900.c
@@ -1939,7 +1939,7 @@ CPUOBJS += $(CPUOBJ)/z80/z80.o $(CPUOBJ)/z80/z80daisy.o
DASMOBJS += $(CPUOBJ)/z80/z80dasm.o
endif
-$(CPUOBJ)/z80/z80.o: $(CPUSRC)/z80/z80.c \
+$(CPUOBJ)/z80/z80.o: $(CPUSRC)/z80/z80.c \
$(CPUSRC)/z80/z80.h
@@ -1954,7 +1954,7 @@ CPUOBJS += $(CPUOBJ)/lr35902/lr35902.o
DASMOBJS += $(CPUOBJ)/lr35902/lr35902d.o
endif
-$(CPUOBJ)/lr35902/lr35902.o: $(CPUSRC)/lr35902/lr35902.c \
+$(CPUOBJ)/lr35902/lr35902.o: $(CPUSRC)/lr35902/lr35902.c \
$(CPUSRC)/lr35902/lr35902.h \
$(CPUSRC)/lr35902/opc_cb.h \
$(CPUSRC)/lr35902/opc_main.h
@@ -1971,7 +1971,7 @@ CPUOBJS += $(CPUOBJ)/z180/z180.o $(CPUOBJ)/z80/z80daisy.o
DASMOBJS += $(CPUOBJ)/z180/z180dasm.o
endif
-$(CPUOBJ)/z180/z180.o: $(CPUSRC)/z180/z180.c \
+$(CPUOBJ)/z180/z180.o: $(CPUSRC)/z180/z180.c \
$(CPUSRC)/z180/z180.h \
$(CPUSRC)/z180/z180op.c \
$(CPUSRC)/z180/z180ops.h \
@@ -1994,7 +1994,7 @@ CPUOBJS += $(CPUOBJ)/z8000/z8000.o
DASMOBJS += $(CPUOBJ)/z8000/8000dasm.o
endif
-$(CPUOBJ)/z8000/z8000.o: $(CPUSRC)/z8000/z8000.c \
+$(CPUOBJ)/z8000/z8000.o: $(CPUSRC)/z8000/z8000.c \
$(CPUSRC)/z8000/z8000.h \
$(CPUSRC)/z8000/z8000cpu.h \
$(CPUSRC)/z8000/z8000dab.h \
@@ -2013,7 +2013,7 @@ CPUOBJS += $(CPUOBJ)/z8/z8.o
DASMOBJS += $(CPUOBJ)/z8/z8dasm.o
endif
-$(CPUOBJ)/z8/z8.o: $(CPUSRC)/z8/z8.c \
+$(CPUOBJ)/z8/z8.o: $(CPUSRC)/z8/z8.c \
$(CPUSRC)/z8/z8ops.c \
$(CPUSRC)/z8/z8.h
@@ -2042,7 +2042,7 @@ CPUOBJS += $(CPUOBJ)/pps4/pps4.o
DASMOBJS += $(CPUOBJ)/pps4/pps4dasm.o
endif
-$(CPUOBJ)/pps4/pps4.o: $(CPUSRC)/pps4/pps4.c \
+$(CPUOBJ)/pps4/pps4.o: $(CPUSRC)/pps4/pps4.c \
$(CPUSRC)/pps4/pps4.h
#-------------------------------------------------
@@ -2055,7 +2055,7 @@ CPUOBJS += $(CPUOBJ)/hd61700/hd61700.o
DASMOBJS += $(CPUOBJ)/hd61700/hd61700d.o
endif
-$(CPUOBJ)/hd61700/hd61700.o: $(CPUSRC)/hd61700/hd61700.c \
+$(CPUOBJ)/hd61700/hd61700.o: $(CPUSRC)/hd61700/hd61700.c \
$(CPUSRC)/hd61700/hd61700.h
#-------------------------------------------------
@@ -2068,5 +2068,5 @@ CPUOBJS += $(CPUOBJ)/lc8670/lc8670.o
DASMOBJS += $(CPUOBJ)/lc8670/lc8670dsm.o
endif
-$(CPUOBJ)/lc8670/lc8670.o: $(CPUSRC)/lc8670/lc8670.c \
+$(CPUOBJ)/lc8670/lc8670.o: $(CPUSRC)/lc8670/lc8670.c \
$(CPUSRC)/lc8670/lc8670.h
diff --git a/src/emu/cpu/cubeqcpu/cubedasm.c b/src/emu/cpu/cubeqcpu/cubedasm.c
index 8a808fd9e95..b35e8ed29fe 100644
--- a/src/emu/cpu/cubeqcpu/cubedasm.c
+++ b/src/emu/cpu/cubeqcpu/cubedasm.c
@@ -189,18 +189,18 @@ CPU_DISASSEMBLE( cquestrot )
int t = (inshig >> 20) & 0xfff;
int jmp = (inshig >> 16) & 0xf;
- int spf = (inshig >> 12) & 0xf;
+ int spf = (inshig >> 12) & 0xf;
// int rsrc = (inshig >> 11) & 0x1;
- int yout = (inshig >> 8) & 0x7;
- int sel = (inshig >> 6) & 0x3;
+ int yout = (inshig >> 8) & 0x7;
+ int sel = (inshig >> 6) & 0x3;
// int dsrc = (inshig >> 4) & 0x3;
- int b = (inshig >> 0) & 0xf;
- int a = (inslow >> 28) & 0xf;
- int i8_6 = (inslow >> 24) & 0x7;
- int ci = (inslow >> 23) & 0x1;
- int i5_3 = (inslow >> 20) & 0x7;
+ int b = (inshig >> 0) & 0xf;
+ int a = (inslow >> 28) & 0xf;
+ int i8_6 = (inslow >> 24) & 0x7;
+ int ci = (inslow >> 23) & 0x1;
+ int i5_3 = (inslow >> 20) & 0x7;
// int _sex = (inslow >> 19) & 0x1;
- int i2_0 = (inslow >> 16) & 0x7;
+ int i2_0 = (inslow >> 16) & 0x7;
sprintf(buffer, "%s %s,%s %x,%x,%c %d %s %s %s %.2x",
ins[i5_3],
@@ -274,17 +274,17 @@ CPU_DISASSEMBLE( cquestlin )
UINT32 inshig = inst >> 32;
int t = (inshig >> 24) & 0xff;
- int jmp = (inshig >> 20) & 0xf;
- int latch = (inshig >> 16) & 0x7;
- int op = (inshig >> 15) & 0x1;
- int spf = (inshig >> 12) & 0x7;
- int b = (inshig >> 8) & 0xf;
- int a = (inshig >> 4) & 0xf;
- int i8_6 = (inshig >> 0) & 0x7;
- int ci = (inslow >> 31) & 0x1;
- int i5_3 = (inslow >> 28) & 0x7;
- int _pbcs = (inslow >> 27) & 0x1;
- int i2_0 = (inslow >> 24) & 0x7;
+ int jmp = (inshig >> 20) & 0xf;
+ int latch = (inshig >> 16) & 0x7;
+ int op = (inshig >> 15) & 0x1;
+ int spf = (inshig >> 12) & 0x7;
+ int b = (inshig >> 8) & 0xf;
+ int a = (inshig >> 4) & 0xf;
+ int i8_6 = (inshig >> 0) & 0x7;
+ int ci = (inslow >> 31) & 0x1;
+ int i5_3 = (inslow >> 28) & 0x7;
+ int _pbcs = (inslow >> 27) & 0x1;
+ int i2_0 = (inslow >> 24) & 0x7;
sprintf(buffer, "%s %s,%s %x,%x %c %s %.2x %s %s %s %s",
ins[i5_3],
diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.c b/src/emu/cpu/cubeqcpu/cubeqcpu.c
index cd60864229d..adc53bfa1ef 100644
--- a/src/emu/cpu/cubeqcpu/cubeqcpu.c
+++ b/src/emu/cpu/cubeqcpu/cubeqcpu.c
@@ -65,7 +65,7 @@ enum alu_dst
MACROS
***************************************************************************/
-#define _BIT(x, n) ((x) & (1 << (n)))
+#define _BIT(x, n) ((x) & (1 << (n)))
/***************************************************************************
STRUCTURES & TYPEDEFS
@@ -74,20 +74,20 @@ enum alu_dst
struct cquestsnd_state
{
/* AM2901 internals */
- UINT16 ram[16];
+ UINT16 ram[16];
UINT16 q;
- UINT16 f;
- UINT16 y;
- UINT32 cflag;
- UINT32 vflag;
-
- UINT8 pc; /* 2 x LS161 @ 6E, 6F */
- UINT16 platch;
- UINT8 rtnlatch; /* LS374 @ 5F */
- UINT8 adrcntr; /* 2 x LS161 */
- UINT16 adrlatch;
- UINT16 dinlatch;
- UINT16 ramwlatch;
+ UINT16 f;
+ UINT16 y;
+ UINT32 cflag;
+ UINT32 vflag;
+
+ UINT8 pc; /* 2 x LS161 @ 6E, 6F */
+ UINT16 platch;
+ UINT8 rtnlatch; /* LS374 @ 5F */
+ UINT8 adrcntr; /* 2 x LS161 */
+ UINT16 adrlatch;
+ UINT16 dinlatch;
+ UINT16 ramwlatch;
UINT16 *sram;
@@ -107,27 +107,27 @@ struct cquestsnd_state
struct cquestrot_state
{
/* AM2901 internals */
- UINT16 ram[16];
+ UINT16 ram[16];
UINT16 q;
- UINT16 f;
- UINT16 y;
- UINT32 cflag;
- UINT32 vflag;
-
- UINT16 pc; /* 12-bit, but only 9 used */
- UINT8 seqcnt; /* 4-bit counter */
-
- UINT8 dsrclatch;
- UINT8 rsrclatch;
- UINT16 dynaddr; /* LS374 at 2D, 8D */
- UINT16 dyndata; /* LS374 at 10B, 9B */
- UINT16 yrlatch; /* LS374 at 9D, 10D */
- UINT16 ydlatch; /* LS374 at 9C, 10C */
- UINT16 dinlatch;
- UINT8 divreg; /* LS74 at ? */
-
- UINT16 linedata;
- UINT16 lineaddr;
+ UINT16 f;
+ UINT16 y;
+ UINT32 cflag;
+ UINT32 vflag;
+
+ UINT16 pc; /* 12-bit, but only 9 used */
+ UINT8 seqcnt; /* 4-bit counter */
+
+ UINT8 dsrclatch;
+ UINT8 rsrclatch;
+ UINT16 dynaddr; /* LS374 at 2D, 8D */
+ UINT16 dyndata; /* LS374 at 10B, 9B */
+ UINT16 yrlatch; /* LS374 at 9D, 10D */
+ UINT16 ydlatch; /* LS374 at 9C, 10C */
+ UINT16 dinlatch;
+ UINT8 divreg; /* LS74 at ? */
+
+ UINT16 linedata;
+ UINT16 lineaddr;
UINT16 *dram;
UINT16 *sram;
@@ -149,41 +149,41 @@ struct cquestrot_state
struct cquestlin_state
{
/* 12-bit AM2901 internals */
- UINT16 ram[16];
+ UINT16 ram[16];
UINT16 q;
- UINT16 f;
- UINT16 y;
- UINT32 cflag;
- UINT32 vflag;
+ UINT16 f;
+ UINT16 y;
+ UINT32 cflag;
+ UINT32 vflag;
- UINT8 pc[2]; /* Two program counters; one for FG, other for BG */
+ UINT8 pc[2]; /* Two program counters; one for FG, other for BG */
- UINT16 seqcnt; /* 12-bit */
- UINT16 clatch; /* LS374 at 9E and 1-bit FF */
- UINT8 zlatch; /* LS374 at 4H */
+ UINT16 seqcnt; /* 12-bit */
+ UINT16 clatch; /* LS374 at 9E and 1-bit FF */
+ UINT8 zlatch; /* LS374 at 4H */
- UINT16 xcnt;
- UINT16 ycnt;
- UINT8 sreg;
+ UINT16 xcnt;
+ UINT16 ycnt;
+ UINT8 sreg;
- UINT16 fadlatch;
- UINT16 badlatch;
+ UINT16 fadlatch;
+ UINT16 badlatch;
- UINT16 sramdlatch;
+ UINT16 sramdlatch;
- UINT8 fglatch;
- UINT8 bglatch;
- UINT8 gt0reg;
- UINT8 fdxreg;
- UINT32 field;
+ UINT8 fglatch;
+ UINT8 bglatch;
+ UINT8 gt0reg;
+ UINT8 fdxreg;
+ UINT32 field;
- UINT32 clkcnt;
+ UINT32 clkcnt;
/* RAM */
- UINT16 *sram;
- UINT8 *ptr_ram;
- UINT32 *e_stack;
- UINT32 *o_stack;
+ UINT16 *sram;
+ UINT8 *ptr_ram;
+ UINT32 *e_stack;
+ UINT32 *o_stack;
legacy_cpu_device *device;
legacy_cpu_device *rotdevice;
@@ -375,10 +375,10 @@ static CPU_EXIT( cquestrot )
/***************************************************************************
LINE DRAWER INITIALIZATION AND SHUTDOWN
***************************************************************************/
-#define FOREGROUND 0
-#define BACKGROUND 1
-#define ODD_FIELD 0
-#define EVEN_FIELD 1
+#define FOREGROUND 0
+#define BACKGROUND 1
+#define ODD_FIELD 0
+#define EVEN_FIELD 1
static void cquestlin_state_register(device_t *device)
{
@@ -454,8 +454,8 @@ static CPU_EXIT( cquestlin )
SOUND CORE EXECUTION LOOP
***************************************************************************/
-#define SND_PC (cpustate->pc)
-#define SND_DATA_IN (_ramen ? cpustate->sound_data[cpustate->platch] : cpustate->dinlatch)
+#define SND_PC (cpustate->pc)
+#define SND_DATA_IN (_ramen ? cpustate->sound_data[cpustate->platch] : cpustate->dinlatch)
enum snd_latch_type
{
@@ -627,11 +627,11 @@ static CPU_EXECUTE( cquestsnd )
/* Now handle any SRAM accesses from the previous cycle */
if (!cpustate->prev_ipram)
{
- UINT16 addr = cpustate->adrlatch | (cpustate->adrcntr & 0x7f);
+ UINT16 addr = cpustate->adrlatch | (cpustate->adrcntr & 0x7f);
- if (!cpustate->prev_ipwrt)
+ if (!cpustate->prev_ipwrt)
cpustate->sram[addr] = cpustate->ramwlatch;
- else
+ else
cpustate->dinlatch = cpustate->sram[addr];
}
@@ -661,15 +661,15 @@ static CPU_EXECUTE( cquestsnd )
/* Load the return latch? (Obviously a load and a ret in the same cycle are invalid) */
if (rtnltch)
- cpustate->rtnlatch = t;
+ cpustate->rtnlatch = t;
/* Only increment the sound counter if not loading */
if (inca && latch != ADLATCH)
- cpustate->adrcntr++;
+ cpustate->adrcntr++;
/* Latch data for a RAM write (do actual write on the next cycle) */
if (!_ipwrt)
- cpustate->ramwlatch = cpustate->y;
+ cpustate->ramwlatch = cpustate->y;
/* Save level sensitive bits */
cpustate->prev_ipram = _ipram;
@@ -684,20 +684,20 @@ static CPU_EXECUTE( cquestsnd )
ROTATE CORE EXECUTION LOOP
***************************************************************************/
-#define ROT_PC (cpustate->pc & 0x1ff)
+#define ROT_PC (cpustate->pc & 0x1ff)
enum rot_spf
{
SPF_UNUSED0 = 0,
SPF_UNUSED1 = 1,
- SPF_OP = 2,
- SPF_RET = 3,
- SPF_SQLTCH = 4,
- SPF_SWRT = 5,
- SPF_DIV = 6,
- SPF_MULT = 7,
- SPF_DRED = 8,
- SPF_DWRT = 9,
+ SPF_OP = 2,
+ SPF_RET = 3,
+ SPF_SQLTCH = 4,
+ SPF_SWRT = 5,
+ SPF_DIV = 6,
+ SPF_MULT = 7,
+ SPF_DRED = 8,
+ SPF_DWRT = 9,
};
enum rot_yout
@@ -705,11 +705,11 @@ enum rot_yout
YOUT_UNUSED0 = 0,
YOUT_UNUSED1 = 1,
YOUT_Y2LDA = 2,
- YOUT_Y2LDD = 3,
+ YOUT_Y2LDD = 3,
YOUT_Y2DAD = 4,
YOUT_Y2DYN = 5,
- YOUT_Y2R = 6,
- YOUT_Y2D = 7,
+ YOUT_Y2R = 6,
+ YOUT_Y2D = 7,
};
/* Sync is asserted for the duration of every fourth cycle */
@@ -736,7 +736,7 @@ INLINE int do_rotjmp(cquestrot_state *cpustate, int jmp)
}
-#define ROT_SRAM_ADDRESS ((cpustate->dsrclatch & 2) ? cpustate->yrlatch : (cpustate->rsrclatch | 0x700))
+#define ROT_SRAM_ADDRESS ((cpustate->dsrclatch & 2) ? cpustate->yrlatch : (cpustate->rsrclatch | 0x700))
static CPU_EXECUTE( cquestrot )
@@ -756,18 +756,18 @@ static CPU_EXECUTE( cquestrot )
int t = (inshig >> 20) & 0xfff;
int jmp = (inshig >> 16) & 0xf;
- int spf = (inshig >> 12) & 0xf;
- int rsrc = (inshig >> 11) & 0x1;
- int yout = (inshig >> 8) & 0x7;
- int sel = (inshig >> 6) & 0x3;
- int dsrc = (inshig >> 4) & 0x3;
- int b = (inshig >> 0) & 0xf;
- int a = (inslow >> 28) & 0xf;
- int i8_6 = (inslow >> 24) & 0x7;
- int ci = (inslow >> 23) & 0x1;
- int i5_3 = (inslow >> 20) & 0x7;
- int _sex = (inslow >> 19) & 0x1;
- int i2_0 = (inslow >> 16) & 0x7;
+ int spf = (inshig >> 12) & 0xf;
+ int rsrc = (inshig >> 11) & 0x1;
+ int yout = (inshig >> 8) & 0x7;
+ int sel = (inshig >> 6) & 0x3;
+ int dsrc = (inshig >> 4) & 0x3;
+ int b = (inshig >> 0) & 0xf;
+ int a = (inslow >> 28) & 0xf;
+ int i8_6 = (inslow >> 24) & 0x7;
+ int ci = (inslow >> 23) & 0x1;
+ int i5_3 = (inslow >> 20) & 0x7;
+ int _sex = (inslow >> 19) & 0x1;
+ int i2_0 = (inslow >> 16) & 0x7;
int dsrclatch;
UINT16 data_in = 0xffff;
@@ -842,9 +842,9 @@ static CPU_EXECUTE( cquestrot )
case 2: r = 0; s = cpustate->q; break;
case 3: r = 0; s = cpustate->ram[b]; break;
case 4: r = 0; s = cpustate->ram[a]; break;
- case 5: r = data_in; s = cpustate->ram[a]; break;
- case 6: r = data_in; s = cpustate->q; break;
- case 7: r = data_in; s = 0; break;
+ case 5: r = data_in; s = cpustate->ram[a]; break;
+ case 6: r = data_in; s = cpustate->q; break;
+ case 7: r = data_in; s = 0; break;
}
/* Next, determine the I3 and carry bits */
@@ -944,9 +944,9 @@ static CPU_EXECUTE( cquestrot )
switch (sel)
{
- case 0: r15 = 0; break;
- case 1: r15 = 0x8000; break;
- case 2: r15 = r0 << 15; break;
+ case 0: r15 = 0; break;
+ case 1: r15 = 0x8000; break;
+ case 2: r15 = r0 << 15; break;
case 3:
r15 = (cpustate->vflag ^ BIT(cpustate->f, 15)) << 15;
break;
@@ -965,8 +965,8 @@ static CPU_EXECUTE( cquestrot )
switch (sel)
{
- case 0: q0 = 0; r0 = 0; break;
- case 1: q0 = 1; r0 = 1; break;
+ case 0: q0 = 0; r0 = 0; break;
+ case 1: q0 = 1; r0 = 1; break;
case 2: q0 = q15; r0 = r15; break;
case 3:
{
@@ -990,10 +990,10 @@ static CPU_EXECUTE( cquestrot )
switch (sel)
{
- case 0: r0 = 0; break;
- case 1: r0 = 1; break;
- case 2: r0 = r15; break;
- case 3: r0 = q15; break;
+ case 0: r0 = 0; break;
+ case 1: r0 = 1; break;
+ case 2: r0 = r15; break;
+ case 3: r0 = q15; break;
}
cpustate->ram[b] = (cpustate->f << 1) | r0;
@@ -1042,9 +1042,9 @@ static CPU_EXECUTE( cquestrot )
break;
}
case YOUT_Y2DAD: cpustate->dynaddr = cpustate->y & 0x3fff; break;
- case YOUT_Y2DYN: cpustate->dyndata = cpustate->y & 0xffff; break;
- case YOUT_Y2R: cpustate->yrlatch = cpustate->y & 0x7ff; break;
- case YOUT_Y2D: cpustate->ydlatch = cpustate->y; break;
+ case YOUT_Y2DYN: cpustate->dyndata = cpustate->y & 0xffff; break;
+ case YOUT_Y2R: cpustate->yrlatch = cpustate->y & 0x7ff; break;
+ case YOUT_Y2D: cpustate->ydlatch = cpustate->y; break;
}
/* Clock in the divide register */
@@ -1064,7 +1064,7 @@ static CPU_EXECUTE( cquestrot )
LINE DRAWER CORE EXECUTION LOOP
***************************************************************************/
-#define VISIBLE_FIELD !cpustate->field
+#define VISIBLE_FIELD !cpustate->field
enum line_spf
{
@@ -1157,8 +1157,8 @@ static CPU_EXECUTE( cquestlin )
cquestlin_state *cpustate = get_safe_token_lin(device);
cquestrot_state *rotcpustate = get_safe_token_rot(cpustate->rotdevice);
int calldebugger = ((device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0);
- UINT32 *stack_ram;
- UINT8 *ptr_ram;
+ UINT32 *stack_ram;
+ UINT8 *ptr_ram;
/* Check the field and set the stack/pointer RAM pointers appropriately */
if (cpustate->field == ODD_FIELD)
@@ -1184,19 +1184,19 @@ static CPU_EXECUTE( cquestlin )
UINT32 inshig = inst >> 32;
int t = (inshig >> 24) & 0xff;
- int jmp = (inshig >> 20) & 0xf;
- int latch = (inshig >> 16) & 0x7;
- int op = (inshig >> 15) & 0x1;
- int spf = (inshig >> 12) & 0x7;
- int b = (inshig >> 8) & 0xf;
- int a = (inshig >> 4) & 0xf;
- int i8_6 = (inshig >> 0) & 0x7;
- int ci = (inslow >> 31) & 0x1;
- int i5_3 = (inslow >> 28) & 0x7;
- int _pbcs = (inslow >> 27) & 0x1;
- int i2_0 = (inslow >> 24) & 0x7;
-
- UINT16 data_in = 0;
+ int jmp = (inshig >> 20) & 0xf;
+ int latch = (inshig >> 16) & 0x7;
+ int op = (inshig >> 15) & 0x1;
+ int spf = (inshig >> 12) & 0x7;
+ int b = (inshig >> 8) & 0xf;
+ int a = (inshig >> 4) & 0xf;
+ int i8_6 = (inshig >> 0) & 0x7;
+ int ci = (inslow >> 31) & 0x1;
+ int i5_3 = (inslow >> 28) & 0x7;
+ int _pbcs = (inslow >> 27) & 0x1;
+ int i2_0 = (inslow >> 24) & 0x7;
+
+ UINT16 data_in = 0;
if (calldebugger)
debugger_instruction_hook(device, cpustate->pc[prog]);
@@ -1270,14 +1270,14 @@ static CPU_EXECUTE( cquestlin )
/* Determine the ALU sources */
switch (i2_0)
{
- case 0: r = cpustate->ram[a]; s = cpustate->q; break;
- case 1: r = cpustate->ram[a]; s = cpustate->ram[b]; break;
- case 2: r = 0; s = cpustate->q; break;
- case 3: r = 0; s = cpustate->ram[b]; break;
- case 4: r = 0; s = cpustate->ram[a]; break;
- case 5: r = data_in; s = cpustate->ram[a]; break;
- case 6: r = data_in; s = cpustate->q; break;
- case 7: r = data_in; s = 0; break;
+ case 0: r = cpustate->ram[a]; s = cpustate->q; break;
+ case 1: r = cpustate->ram[a]; s = cpustate->ram[b]; break;
+ case 2: r = 0; s = cpustate->q; break;
+ case 3: r = 0; s = cpustate->ram[b]; break;
+ case 4: r = 0; s = cpustate->ram[a]; break;
+ case 5: r = data_in; s = cpustate->ram[a]; break;
+ case 6: r = data_in; s = cpustate->q; break;
+ case 7: r = data_in; s = 0; break;
}
/* 12-bits */
@@ -1536,28 +1536,28 @@ static CPU_SET_INFO( cquestsnd )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CQUESTSND_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + CQUESTSND_Q: cpustate->q = info->i; break;
- case CPUINFO_INT_REGISTER + CQUESTSND_RTNLATCH: cpustate->rtnlatch = info->i; break;
- case CPUINFO_INT_REGISTER + CQUESTSND_ADRCNTR: cpustate->adrcntr = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_DINLATCH: cpustate->dinlatch = info->i; break;
-
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM0: cpustate->ram[0x0] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM1: cpustate->ram[0x1] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM2: cpustate->ram[0x2] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM3: cpustate->ram[0x3] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM4: cpustate->ram[0x4] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM5: cpustate->ram[0x5] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM6: cpustate->ram[0x6] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM7: cpustate->ram[0x7] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM8: cpustate->ram[0x8] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM9: cpustate->ram[0x9] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMA: cpustate->ram[0xa] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMB: cpustate->ram[0xb] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMC: cpustate->ram[0xc] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMD: cpustate->ram[0xd] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAME: cpustate->ram[0xe] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMF: cpustate->ram[0xf] = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTSND_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTSND_Q: cpustate->q = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTSND_RTNLATCH: cpustate->rtnlatch = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTSND_ADRCNTR: cpustate->adrcntr = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_DINLATCH: cpustate->dinlatch = info->i; break;
+
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM0: cpustate->ram[0x0] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM1: cpustate->ram[0x1] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM2: cpustate->ram[0x2] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM3: cpustate->ram[0x3] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM4: cpustate->ram[0x4] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM5: cpustate->ram[0x5] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM6: cpustate->ram[0x6] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM7: cpustate->ram[0x7] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM8: cpustate->ram[0x8] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM9: cpustate->ram[0x9] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMA: cpustate->ram[0xa] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMB: cpustate->ram[0xb] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMC: cpustate->ram[0xc] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMD: cpustate->ram[0xd] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAME: cpustate->ram[0xe] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMF: cpustate->ram[0xf] = info->i; break;
}
}
@@ -1571,69 +1571,69 @@ CPU_GET_INFO( cquestsnd )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cquestsnd_state); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cquestsnd_state); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CQUESTSND_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + CQUESTSND_RTNLATCH: info->i = cpustate->rtnlatch; break;
- case CPUINFO_INT_REGISTER + CQUESTSND_ADRCNTR: info->i = cpustate->adrcntr; break;
+ case CPUINFO_INT_REGISTER + CQUESTSND_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + CQUESTSND_RTNLATCH: info->i = cpustate->rtnlatch; break;
+ case CPUINFO_INT_REGISTER + CQUESTSND_ADRCNTR: info->i = cpustate->adrcntr; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestsnd); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cquestsnd); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cquestsnd); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(cquestsnd); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestsnd); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestsnd); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestsnd); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cquestsnd); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cquestsnd); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(cquestsnd); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestsnd); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestsnd); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Sound CPU");break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Cube Quest"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
-
- case CPUINFO_STR_FLAGS: sprintf(info->s, "......."); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_Q: sprintf(info->s, "Q: %04X", cpustate->q); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Sound CPU");break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Cube Quest"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
+
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "......."); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_Q: sprintf(info->s, "Q: %04X", cpustate->q); break;
case CPUINFO_STR_REGISTER + CQUESTSND_RTNLATCH: sprintf(info->s, "RTN: %02X", cpustate->rtnlatch); break;
case CPUINFO_STR_REGISTER + CQUESTSND_ADRCNTR: sprintf(info->s, "CNT: %02X", cpustate->adrcntr); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_DINLATCH: sprintf(info->s, "DIN: %04X", cpustate->dinlatch); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM2: sprintf(info->s, "RAM[2]: %04X", cpustate->ram[0x2]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM3: sprintf(info->s, "RAM[3]: %04X", cpustate->ram[0x3]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM4: sprintf(info->s, "RAM[4]: %04X", cpustate->ram[0x4]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM5: sprintf(info->s, "RAM[5]: %04X", cpustate->ram[0x5]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM6: sprintf(info->s, "RAM[6]: %04X", cpustate->ram[0x6]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM7: sprintf(info->s, "RAM[7]: %04X", cpustate->ram[0x7]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM8: sprintf(info->s, "RAM[8]: %04X", cpustate->ram[0x8]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAM9: sprintf(info->s, "RAM[9]: %04X", cpustate->ram[0x9]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMA: sprintf(info->s, "RAM[A]: %04X", cpustate->ram[0xa]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMB: sprintf(info->s, "RAM[B]: %04X", cpustate->ram[0xb]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMC: sprintf(info->s, "RAM[C]: %04X", cpustate->ram[0xc]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMD: sprintf(info->s, "RAM[D]: %04X", cpustate->ram[0xd]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAME: sprintf(info->s, "RAM[E]: %04X", cpustate->ram[0xe]); break;
- case CPUINFO_STR_REGISTER + CQUESTSND_RAMF: sprintf(info->s, "RAM[F]: %04X", cpustate->ram[0xf]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_DINLATCH: sprintf(info->s, "DIN: %04X", cpustate->dinlatch); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM2: sprintf(info->s, "RAM[2]: %04X", cpustate->ram[0x2]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM3: sprintf(info->s, "RAM[3]: %04X", cpustate->ram[0x3]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM4: sprintf(info->s, "RAM[4]: %04X", cpustate->ram[0x4]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM5: sprintf(info->s, "RAM[5]: %04X", cpustate->ram[0x5]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM6: sprintf(info->s, "RAM[6]: %04X", cpustate->ram[0x6]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM7: sprintf(info->s, "RAM[7]: %04X", cpustate->ram[0x7]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM8: sprintf(info->s, "RAM[8]: %04X", cpustate->ram[0x8]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAM9: sprintf(info->s, "RAM[9]: %04X", cpustate->ram[0x9]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMA: sprintf(info->s, "RAM[A]: %04X", cpustate->ram[0xa]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMB: sprintf(info->s, "RAM[B]: %04X", cpustate->ram[0xb]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMC: sprintf(info->s, "RAM[C]: %04X", cpustate->ram[0xc]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMD: sprintf(info->s, "RAM[D]: %04X", cpustate->ram[0xd]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAME: sprintf(info->s, "RAM[E]: %04X", cpustate->ram[0xe]); break;
+ case CPUINFO_STR_REGISTER + CQUESTSND_RAMF: sprintf(info->s, "RAM[F]: %04X", cpustate->ram[0xf]); break;
}
}
@@ -1649,33 +1649,33 @@ static CPU_SET_INFO( cquestrot )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CQUESTROT_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + CQUESTROT_Q: cpustate->q = info->i; break;
-
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM0: cpustate->ram[0x0] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM1: cpustate->ram[0x1] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM2: cpustate->ram[0x2] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM3: cpustate->ram[0x3] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM4: cpustate->ram[0x4] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM5: cpustate->ram[0x5] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM6: cpustate->ram[0x6] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM7: cpustate->ram[0x7] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM8: cpustate->ram[0x8] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM9: cpustate->ram[0x9] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMA: cpustate->ram[0xa] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMB: cpustate->ram[0xb] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMC: cpustate->ram[0xc] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMD: cpustate->ram[0xd] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAME: cpustate->ram[0xe] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMF: cpustate->ram[0xf] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_SEQCNT: cpustate->seqcnt = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_DYNADDR: cpustate->dynaddr = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_DYNDATA: cpustate->dyndata = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_YRLATCH: cpustate->yrlatch = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_YDLATCH: cpustate->ydlatch = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_DINLATCH: cpustate->dinlatch = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_DSRCLATCH:cpustate->dsrclatch = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RSRCLATCH:cpustate->rsrclatch = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTROT_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTROT_Q: cpustate->q = info->i; break;
+
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM0: cpustate->ram[0x0] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM1: cpustate->ram[0x1] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM2: cpustate->ram[0x2] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM3: cpustate->ram[0x3] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM4: cpustate->ram[0x4] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM5: cpustate->ram[0x5] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM6: cpustate->ram[0x6] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM7: cpustate->ram[0x7] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM8: cpustate->ram[0x8] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM9: cpustate->ram[0x9] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMA: cpustate->ram[0xa] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMB: cpustate->ram[0xb] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMC: cpustate->ram[0xc] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMD: cpustate->ram[0xd] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAME: cpustate->ram[0xe] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMF: cpustate->ram[0xf] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_SEQCNT: cpustate->seqcnt = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_DYNADDR: cpustate->dynaddr = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_DYNDATA: cpustate->dyndata = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_YRLATCH: cpustate->yrlatch = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_YDLATCH: cpustate->ydlatch = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_DINLATCH: cpustate->dinlatch = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_DSRCLATCH:cpustate->dsrclatch = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RSRCLATCH:cpustate->rsrclatch = info->i; break;
}
}
@@ -1689,76 +1689,76 @@ CPU_GET_INFO( cquestrot )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cquestrot_state); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cquestrot_state); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CQUESTROT_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + CQUESTROT_PC: info->i = cpustate->pc; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestrot); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cquestrot); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cquestrot); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(cquestrot); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestrot); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestrot); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestrot); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cquestrot); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cquestrot); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(cquestrot); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestrot); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestrot); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Rotate CPU");break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Cube Quest"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
-
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c", cpustate->cflag ? 'C' : '.',
- cpustate->vflag ? 'V' : '.',
- cpustate->f ? '.' : 'Z'); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_Q: sprintf(info->s, "Q: %04X", cpustate->q); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM2: sprintf(info->s, "RAM[2]: %04X", cpustate->ram[0x2]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM3: sprintf(info->s, "RAM[3]: %04X", cpustate->ram[0x3]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM4: sprintf(info->s, "RAM[4]: %04X", cpustate->ram[0x4]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM5: sprintf(info->s, "RAM[5]: %04X", cpustate->ram[0x5]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM6: sprintf(info->s, "RAM[6]: %04X", cpustate->ram[0x6]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM7: sprintf(info->s, "RAM[7]: %04X", cpustate->ram[0x7]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM8: sprintf(info->s, "RAM[8]: %04X", cpustate->ram[0x8]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAM9: sprintf(info->s, "RAM[9]: %04X", cpustate->ram[0x9]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMA: sprintf(info->s, "RAM[A]: %04X", cpustate->ram[0xa]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMB: sprintf(info->s, "RAM[B]: %04X", cpustate->ram[0xb]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMC: sprintf(info->s, "RAM[C]: %04X", cpustate->ram[0xc]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMD: sprintf(info->s, "RAM[D]: %04X", cpustate->ram[0xd]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAME: sprintf(info->s, "RAM[E]: %04X", cpustate->ram[0xe]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_RAMF: sprintf(info->s, "RAM[F]: %04X", cpustate->ram[0xf]); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_SEQCNT: sprintf(info->s, "SEQCNT: %01X", cpustate->seqcnt); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_DYNADDR: sprintf(info->s, "DYNADDR: %04X", cpustate->dynaddr); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_DYNDATA: sprintf(info->s, "DYNDATA: %04X", cpustate->dyndata); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_YRLATCH: sprintf(info->s, "YRLATCH: %04X", cpustate->yrlatch); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_YDLATCH: sprintf(info->s, "YDLATCH: %04X", cpustate->ydlatch); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_DINLATCH: sprintf(info->s, "DINLATCH: %04X", cpustate->dinlatch); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Rotate CPU");break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Cube Quest"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
+
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c", cpustate->cflag ? 'C' : '.',
+ cpustate->vflag ? 'V' : '.',
+ cpustate->f ? '.' : 'Z'); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_PC: sprintf(info->s, "PC: %02X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_Q: sprintf(info->s, "Q: %04X", cpustate->q); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM2: sprintf(info->s, "RAM[2]: %04X", cpustate->ram[0x2]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM3: sprintf(info->s, "RAM[3]: %04X", cpustate->ram[0x3]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM4: sprintf(info->s, "RAM[4]: %04X", cpustate->ram[0x4]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM5: sprintf(info->s, "RAM[5]: %04X", cpustate->ram[0x5]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM6: sprintf(info->s, "RAM[6]: %04X", cpustate->ram[0x6]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM7: sprintf(info->s, "RAM[7]: %04X", cpustate->ram[0x7]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM8: sprintf(info->s, "RAM[8]: %04X", cpustate->ram[0x8]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAM9: sprintf(info->s, "RAM[9]: %04X", cpustate->ram[0x9]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMA: sprintf(info->s, "RAM[A]: %04X", cpustate->ram[0xa]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMB: sprintf(info->s, "RAM[B]: %04X", cpustate->ram[0xb]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMC: sprintf(info->s, "RAM[C]: %04X", cpustate->ram[0xc]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMD: sprintf(info->s, "RAM[D]: %04X", cpustate->ram[0xd]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAME: sprintf(info->s, "RAM[E]: %04X", cpustate->ram[0xe]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_RAMF: sprintf(info->s, "RAM[F]: %04X", cpustate->ram[0xf]); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_SEQCNT: sprintf(info->s, "SEQCNT: %01X", cpustate->seqcnt); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_DYNADDR: sprintf(info->s, "DYNADDR: %04X", cpustate->dynaddr); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_DYNDATA: sprintf(info->s, "DYNDATA: %04X", cpustate->dyndata); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_YRLATCH: sprintf(info->s, "YRLATCH: %04X", cpustate->yrlatch); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_YDLATCH: sprintf(info->s, "YDLATCH: %04X", cpustate->ydlatch); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_DINLATCH: sprintf(info->s, "DINLATCH: %04X", cpustate->dinlatch); break;
case CPUINFO_STR_REGISTER + CQUESTROT_DSRCLATCH:sprintf(info->s, "DSRCLATCH: %04X", cpustate->dsrclatch); break;
case CPUINFO_STR_REGISTER + CQUESTROT_RSRCLATCH:sprintf(info->s, "RSRCLATCH: %04X", cpustate->rsrclatch); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_LDADDR: sprintf(info->s, "LDADDR : %04X", cpustate->lineaddr); break;
- case CPUINFO_STR_REGISTER + CQUESTROT_LDDATA: sprintf(info->s, "LDDATA : %04X", cpustate->linedata); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_LDADDR: sprintf(info->s, "LDADDR : %04X", cpustate->lineaddr); break;
+ case CPUINFO_STR_REGISTER + CQUESTROT_LDDATA: sprintf(info->s, "LDDATA : %04X", cpustate->linedata); break;
}
}
@@ -1774,26 +1774,26 @@ static CPU_SET_INFO( cquestlin )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CQUESTLIN_FGPC: cpustate->pc[FOREGROUND] = info->i; break;
- case CPUINFO_INT_REGISTER + CQUESTLIN_BGPC: cpustate->pc[BACKGROUND] = info->i; break;
- case CPUINFO_INT_REGISTER + CQUESTLIN_Q: cpustate->q = info->i; break;
-
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM0: cpustate->ram[0x0] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM1: cpustate->ram[0x1] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM2: cpustate->ram[0x2] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM3: cpustate->ram[0x3] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM4: cpustate->ram[0x4] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM5: cpustate->ram[0x5] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM6: cpustate->ram[0x6] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM7: cpustate->ram[0x7] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM8: cpustate->ram[0x8] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM9: cpustate->ram[0x9] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMA: cpustate->ram[0xa] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMB: cpustate->ram[0xb] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMC: cpustate->ram[0xc] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMD: cpustate->ram[0xd] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAME: cpustate->ram[0xe] = info->i; break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMF: cpustate->ram[0xf] = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTLIN_FGPC: cpustate->pc[FOREGROUND] = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTLIN_BGPC: cpustate->pc[BACKGROUND] = info->i; break;
+ case CPUINFO_INT_REGISTER + CQUESTLIN_Q: cpustate->q = info->i; break;
+
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM0: cpustate->ram[0x0] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM1: cpustate->ram[0x1] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM2: cpustate->ram[0x2] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM3: cpustate->ram[0x3] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM4: cpustate->ram[0x4] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM5: cpustate->ram[0x5] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM6: cpustate->ram[0x6] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM7: cpustate->ram[0x7] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM8: cpustate->ram[0x8] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM9: cpustate->ram[0x9] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMA: cpustate->ram[0xa] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMB: cpustate->ram[0xb] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMC: cpustate->ram[0xc] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMD: cpustate->ram[0xd] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAME: cpustate->ram[0xe] = info->i; break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMF: cpustate->ram[0xf] = info->i; break;
}
}
@@ -1807,76 +1807,76 @@ CPU_GET_INFO( cquestlin )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cquestlin_state); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(cquestlin_state); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + CQUESTLIN_FGPC: info->i = cpustate->pc[cpustate->clkcnt & 3 ? BACKGROUND : FOREGROUND]; break;
+ case CPUINFO_INT_REGISTER + CQUESTLIN_FGPC: info->i = cpustate->pc[cpustate->clkcnt & 3 ? BACKGROUND : FOREGROUND]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestlin); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cquestlin); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cquestlin); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(cquestlin); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestlin); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestlin); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(cquestlin); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(cquestlin); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(cquestlin); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(cquestlin); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(cquestlin); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(cquestlin); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Line CPU"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Cube Quest"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Line CPU"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Cube Quest"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c|%cG", cpustate->cflag ? 'C' : '.',
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c|%cG", cpustate->cflag ? 'C' : '.',
cpustate->vflag ? 'V' : '.',
cpustate->f ? '.' : 'Z',
cpustate->clkcnt & 3 ? 'B' : 'F'); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_FGPC: sprintf(info->s, "FPC: %02X", cpustate->pc[FOREGROUND]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_BGPC: sprintf(info->s, "BPC: %02X", cpustate->pc[BACKGROUND]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_Q: sprintf(info->s, "Q: %04X", cpustate->q); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM2: sprintf(info->s, "RAM[2]: %04X", cpustate->ram[0x2]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM3: sprintf(info->s, "RAM[3]: %04X", cpustate->ram[0x3]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM4: sprintf(info->s, "RAM[4]: %04X", cpustate->ram[0x4]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM5: sprintf(info->s, "RAM[5]: %04X", cpustate->ram[0x5]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM6: sprintf(info->s, "RAM[6]: %04X", cpustate->ram[0x6]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM7: sprintf(info->s, "RAM[7]: %04X", cpustate->ram[0x7]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM8: sprintf(info->s, "RAM[8]: %04X", cpustate->ram[0x8]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAM9: sprintf(info->s, "RAM[9]: %04X", cpustate->ram[0x9]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMA: sprintf(info->s, "RAM[A]: %04X", cpustate->ram[0xa]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMB: sprintf(info->s, "RAM[B]: %04X", cpustate->ram[0xb]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMC: sprintf(info->s, "RAM[C]: %04X", cpustate->ram[0xc]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMD: sprintf(info->s, "RAM[D]: %04X", cpustate->ram[0xd]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAME: sprintf(info->s, "RAM[E]: %04X", cpustate->ram[0xe]); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_RAMF: sprintf(info->s, "RAM[F]: %04X", cpustate->ram[0xf]); break;
-
- case CPUINFO_STR_REGISTER + CQUESTLIN_FADLATCH: sprintf(info->s, "FADDR: %04X", cpustate->fadlatch); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_BADLATCH: sprintf(info->s, "BADDR: %04X", cpustate->badlatch); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_SREG: sprintf(info->s, "SREG: %04X", cpustate->sreg); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_XCNT: sprintf(info->s, "XCNT: %03X", cpustate->xcnt); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_YCNT: sprintf(info->s, "YCNT: %03X", cpustate->ycnt); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_CLATCH: sprintf(info->s, "CLATCH: %04X", cpustate->clatch); break;
- case CPUINFO_STR_REGISTER + CQUESTLIN_ZLATCH: sprintf(info->s, "ZLATCH: %04X", cpustate->zlatch); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_FGPC: sprintf(info->s, "FPC: %02X", cpustate->pc[FOREGROUND]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_BGPC: sprintf(info->s, "BPC: %02X", cpustate->pc[BACKGROUND]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_Q: sprintf(info->s, "Q: %04X", cpustate->q); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM0: sprintf(info->s, "RAM[0]: %04X", cpustate->ram[0x0]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM1: sprintf(info->s, "RAM[1]: %04X", cpustate->ram[0x1]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM2: sprintf(info->s, "RAM[2]: %04X", cpustate->ram[0x2]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM3: sprintf(info->s, "RAM[3]: %04X", cpustate->ram[0x3]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM4: sprintf(info->s, "RAM[4]: %04X", cpustate->ram[0x4]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM5: sprintf(info->s, "RAM[5]: %04X", cpustate->ram[0x5]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM6: sprintf(info->s, "RAM[6]: %04X", cpustate->ram[0x6]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM7: sprintf(info->s, "RAM[7]: %04X", cpustate->ram[0x7]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM8: sprintf(info->s, "RAM[8]: %04X", cpustate->ram[0x8]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAM9: sprintf(info->s, "RAM[9]: %04X", cpustate->ram[0x9]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMA: sprintf(info->s, "RAM[A]: %04X", cpustate->ram[0xa]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMB: sprintf(info->s, "RAM[B]: %04X", cpustate->ram[0xb]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMC: sprintf(info->s, "RAM[C]: %04X", cpustate->ram[0xc]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMD: sprintf(info->s, "RAM[D]: %04X", cpustate->ram[0xd]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAME: sprintf(info->s, "RAM[E]: %04X", cpustate->ram[0xe]); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_RAMF: sprintf(info->s, "RAM[F]: %04X", cpustate->ram[0xf]); break;
+
+ case CPUINFO_STR_REGISTER + CQUESTLIN_FADLATCH: sprintf(info->s, "FADDR: %04X", cpustate->fadlatch); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_BADLATCH: sprintf(info->s, "BADDR: %04X", cpustate->badlatch); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_SREG: sprintf(info->s, "SREG: %04X", cpustate->sreg); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_XCNT: sprintf(info->s, "XCNT: %03X", cpustate->xcnt); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_YCNT: sprintf(info->s, "YCNT: %03X", cpustate->ycnt); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_CLATCH: sprintf(info->s, "CLATCH: %04X", cpustate->clatch); break;
+ case CPUINFO_STR_REGISTER + CQUESTLIN_ZLATCH: sprintf(info->s, "ZLATCH: %04X", cpustate->zlatch); break;
}
}
diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.h b/src/emu/cpu/cubeqcpu/cubeqcpu.h
index 60c01f2be45..ee148564430 100644
--- a/src/emu/cpu/cubeqcpu/cubeqcpu.h
+++ b/src/emu/cpu/cubeqcpu/cubeqcpu.h
@@ -120,19 +120,19 @@ typedef void (*cubeqst_dac_w_func)(device_t *, UINT16);
struct cubeqst_snd_config
{
- cubeqst_dac_w_func dac_w;
- const char * sound_data_region;
+ cubeqst_dac_w_func dac_w;
+ const char * sound_data_region;
};
struct cubeqst_lin_config
{
- const char * rot_cpu_tag;
+ const char * rot_cpu_tag;
};
struct cubeqst_rot_config
{
- const char * lin_cpu_tag;
+ const char * lin_cpu_tag;
};
/***************************************************************************
diff --git a/src/emu/cpu/drcbec.c b/src/emu/cpu/drcbec.c
index 3a8648aa0e6..2267fa44324 100644
--- a/src/emu/cpu/drcbec.c
+++ b/src/emu/cpu/drcbec.c
@@ -54,22 +54,22 @@ using namespace uml;
//**************************************************************************
// define a bit to match each possible condition, starting at bit 12
-#define ZBIT (0x1000 << (COND_Z & 15))
-#define NZBIT (0x1000 << (COND_NZ & 15))
-#define SBIT (0x1000 << (COND_S & 15))
-#define NSBIT (0x1000 << (COND_NS & 15))
-#define CBIT (0x1000 << (COND_C & 15))
-#define NCBIT (0x1000 << (COND_NC & 15))
-#define VBIT (0x1000 << (COND_V & 15))
-#define NVBIT (0x1000 << (COND_NV & 15))
-#define UBIT (0x1000 << (COND_U & 15))
-#define NUBIT (0x1000 << (COND_NU & 15))
-#define ABIT (0x1000 << (COND_A & 15))
-#define BEBIT (0x1000 << (COND_BE & 15))
-#define GBIT (0x1000 << (COND_G & 15))
-#define GEBIT (0x1000 << (COND_GE & 15))
-#define LBIT (0x1000 << (COND_L & 15))
-#define LEBIT (0x1000 << (COND_LE & 15))
+#define ZBIT (0x1000 << (COND_Z & 15))
+#define NZBIT (0x1000 << (COND_NZ & 15))
+#define SBIT (0x1000 << (COND_S & 15))
+#define NSBIT (0x1000 << (COND_NS & 15))
+#define CBIT (0x1000 << (COND_C & 15))
+#define NCBIT (0x1000 << (COND_NC & 15))
+#define VBIT (0x1000 << (COND_V & 15))
+#define NVBIT (0x1000 << (COND_NV & 15))
+#define UBIT (0x1000 << (COND_U & 15))
+#define NUBIT (0x1000 << (COND_NU & 15))
+#define ABIT (0x1000 << (COND_A & 15))
+#define BEBIT (0x1000 << (COND_BE & 15))
+#define GBIT (0x1000 << (COND_G & 15))
+#define GEBIT (0x1000 << (COND_GE & 15))
+#define LBIT (0x1000 << (COND_L & 15))
+#define LEBIT (0x1000 << (COND_LE & 15))
// internal opcodes
@@ -184,53 +184,53 @@ enum
(MAKE_OPCODE_SHORT(op, size, (condition | flags)) | ((condition != COND_ALWAYS) ? (0x1000 << ((condition) & 15)) : 0) | ((pwords) << 28))
// extract various parts of the opcode
-#define OPCODE_GET_SHORT(op) ((op) & 0xfff)
-#define OPCODE_PASS_CONDITION(op,f) (((op) & s_condition_map[f]) != 0)
-#define OPCODE_FAIL_CONDITION(op,f) (((op) & s_condition_map[f]) == 0)
-#define OPCODE_GET_PWORDS(op) ((op) >> 28)
+#define OPCODE_GET_SHORT(op) ((op) & 0xfff)
+#define OPCODE_PASS_CONDITION(op,f) (((op) & s_condition_map[f]) != 0)
+#define OPCODE_FAIL_CONDITION(op,f) (((op) & s_condition_map[f]) == 0)
+#define OPCODE_GET_PWORDS(op) ((op) >> 28)
// shorthand for accessing parameters in the instruction stream
-#define PARAM0 (*inst[0].puint32)
-#define PARAM1 (*inst[1].puint32)
-#define PARAM2 (*inst[2].puint32)
-#define PARAM3 (*inst[3].puint32)
-
-#define DPARAM0 (*inst[0].puint64)
-#define DPARAM1 (*inst[1].puint64)
-#define DPARAM2 (*inst[2].puint64)
-#define DPARAM3 (*inst[3].puint64)
-
-#define FSPARAM0 (*inst[0].pfloat)
-#define FSPARAM1 (*inst[1].pfloat)
-#define FSPARAM2 (*inst[2].pfloat)
-#define FSPARAM3 (*inst[3].pfloat)
-
-#define FDPARAM0 (*inst[0].pdouble)
-#define FDPARAM1 (*inst[1].pdouble)
-#define FDPARAM2 (*inst[2].pdouble)
-#define FDPARAM3 (*inst[3].pdouble)
+#define PARAM0 (*inst[0].puint32)
+#define PARAM1 (*inst[1].puint32)
+#define PARAM2 (*inst[2].puint32)
+#define PARAM3 (*inst[3].puint32)
+
+#define DPARAM0 (*inst[0].puint64)
+#define DPARAM1 (*inst[1].puint64)
+#define DPARAM2 (*inst[2].puint64)
+#define DPARAM3 (*inst[3].puint64)
+
+#define FSPARAM0 (*inst[0].pfloat)
+#define FSPARAM1 (*inst[1].pfloat)
+#define FSPARAM2 (*inst[2].pfloat)
+#define FSPARAM3 (*inst[3].pfloat)
+
+#define FDPARAM0 (*inst[0].pdouble)
+#define FDPARAM1 (*inst[1].pdouble)
+#define FDPARAM2 (*inst[2].pdouble)
+#define FDPARAM3 (*inst[3].pdouble)
// compute C and V flags for 32-bit add/subtract
-#define FLAGS32_C_ADD(a,b) ((UINT32)~(a) < (UINT32)(b))
-#define FLAGS32_C_SUB(a,b) ((UINT32)(b) > (UINT32)(a))
-#define FLAGS32_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
-#define FLAGS32_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
+#define FLAGS32_C_ADD(a,b) ((UINT32)~(a) < (UINT32)(b))
+#define FLAGS32_C_SUB(a,b) ((UINT32)(b) > (UINT32)(a))
+#define FLAGS32_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
+#define FLAGS32_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
// compute N and Z flags for 32-bit operations
-#define FLAGS32_NZ(v) ((((v) >> 28) & FLAG_S) | (((UINT32)(v) == 0) << 2))
-#define FLAGS32_NZCV_ADD(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_ADD(a,b) | FLAGS32_V_ADD(r,a,b))
-#define FLAGS32_NZCV_SUB(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_SUB(a,b) | FLAGS32_V_SUB(r,a,b))
+#define FLAGS32_NZ(v) ((((v) >> 28) & FLAG_S) | (((UINT32)(v) == 0) << 2))
+#define FLAGS32_NZCV_ADD(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_ADD(a,b) | FLAGS32_V_ADD(r,a,b))
+#define FLAGS32_NZCV_SUB(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_SUB(a,b) | FLAGS32_V_SUB(r,a,b))
// compute C and V flags for 64-bit add/subtract
-#define FLAGS64_C_ADD(a,b) ((UINT64)~(a) < (UINT64)(b))
-#define FLAGS64_C_SUB(a,b) ((UINT64)(b) > (UINT64)(a))
-#define FLAGS64_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
-#define FLAGS64_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
+#define FLAGS64_C_ADD(a,b) ((UINT64)~(a) < (UINT64)(b))
+#define FLAGS64_C_SUB(a,b) ((UINT64)(b) > (UINT64)(a))
+#define FLAGS64_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
+#define FLAGS64_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
// compute N and Z flags for 64-bit operations
-#define FLAGS64_NZ(v) ((((v) >> 60) & FLAG_S) | (((UINT64)(v) == 0) << 2))
-#define FLAGS64_NZCV_ADD(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_ADD(a,b) | FLAGS64_V_ADD(r,a,b))
-#define FLAGS64_NZCV_SUB(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_SUB(a,b) | FLAGS64_V_SUB(r,a,b))
+#define FLAGS64_NZ(v) ((((v) >> 60) & FLAG_S) | (((UINT64)(v) == 0) << 2))
+#define FLAGS64_NZCV_ADD(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_ADD(a,b) | FLAGS64_V_ADD(r,a,b))
+#define FLAGS64_NZCV_SUB(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_SUB(a,b) | FLAGS64_V_SUB(r,a,b))
@@ -241,22 +241,22 @@ enum
// union to simplify accessing data via the instruction stream
union drcbec_instruction
{
- UINT32 i;
- void * v;
- char * c;
- UINT8 * puint8;
- INT8 * pint8;
- UINT16 * puint16;
- INT16 * pint16;
- UINT32 * puint32;
- INT32 * pint32;
- UINT64 * puint64;
- INT64 * pint64;
- float * pfloat;
- double * pdouble;
- void (*cfunc)(void *);
+ UINT32 i;
+ void * v;
+ char * c;
+ UINT8 * puint8;
+ INT8 * pint8;
+ UINT16 * puint16;
+ INT16 * pint16;
+ UINT32 * puint32;
+ INT32 * pint32;
+ UINT64 * puint64;
+ INT64 * pint64;
+ float * pfloat;
+ double * pdouble;
+ void (*cfunc)(void *);
drcuml_machine_state *state;
- const code_handle * handle;
+ const code_handle * handle;
const drcbec_instruction *inst;
const drcbec_instruction **pinst;
};
@@ -271,38 +271,38 @@ UINT64 drcbe_c::s_immediate_zero = 0;
const UINT32 drcbe_c::s_condition_map[] =
{
- /* ..... */ NCBIT | NVBIT | NZBIT | NSBIT | NUBIT | ABIT | GBIT | GEBIT,
- /* ....C */ CBIT | NVBIT | NZBIT | NSBIT | NUBIT | BEBIT | GBIT | GEBIT,
- /* ...V. */ NCBIT | VBIT | NZBIT | NSBIT | NUBIT | ABIT | LEBIT | LBIT,
- /* ...VC */ CBIT | VBIT | NZBIT | NSBIT | NUBIT | BEBIT | LEBIT | LBIT,
- /* ..Z.. */ NCBIT | NVBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | GEBIT,
- /* ..Z.C */ CBIT | NVBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | GEBIT,
- /* ..ZV. */ NCBIT | VBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | LBIT,
- /* ..ZVC */ CBIT | VBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | LBIT,
- /* .S... */ NCBIT | NVBIT | NZBIT | SBIT | NUBIT | ABIT | LEBIT | LBIT,
- /* .S..C */ CBIT | NVBIT | NZBIT | SBIT | NUBIT | BEBIT | LEBIT | LBIT,
- /* .S.V. */ NCBIT | VBIT | NZBIT | SBIT | NUBIT | ABIT | GBIT | GEBIT,
- /* .S.VC */ CBIT | VBIT | NZBIT | SBIT | NUBIT | BEBIT | GBIT | GEBIT,
- /* .SZ.. */ NCBIT | NVBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | LBIT,
- /* .SZ.C */ CBIT | NVBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | LBIT,
- /* .SZV. */ NCBIT | VBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | GEBIT,
- /* .SZVC */ CBIT | VBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | GEBIT,
- /* U.... */ NCBIT | NVBIT | NZBIT | NSBIT | UBIT | ABIT | GBIT | GEBIT,
- /* U...C */ CBIT | NVBIT | NZBIT | NSBIT | UBIT | BEBIT | GBIT | GEBIT,
- /* U..V. */ NCBIT | VBIT | NZBIT | NSBIT | UBIT | ABIT | LEBIT | LBIT,
- /* U..VC */ CBIT | VBIT | NZBIT | NSBIT | UBIT | BEBIT | LEBIT | LBIT,
- /* U.Z.. */ NCBIT | NVBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | GEBIT,
- /* U.Z.C */ CBIT | NVBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | GEBIT,
- /* U.ZV. */ NCBIT | VBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | LBIT,
- /* U.ZVC */ CBIT | VBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | LBIT,
- /* US... */ NCBIT | NVBIT | NZBIT | SBIT | UBIT | ABIT | LEBIT | LBIT,
- /* US..C */ CBIT | NVBIT | NZBIT | SBIT | UBIT | BEBIT | LEBIT | LBIT,
- /* US.V. */ NCBIT | VBIT | NZBIT | SBIT | UBIT | ABIT | GBIT | GEBIT,
- /* US.VC */ CBIT | VBIT | NZBIT | SBIT | UBIT | BEBIT | GBIT | GEBIT,
- /* USZ.. */ NCBIT | NVBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | LBIT,
- /* USZ.C */ CBIT | NVBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | LBIT,
- /* USZV. */ NCBIT | VBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | GEBIT,
- /* USZVC */ CBIT | VBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | GEBIT
+ /* ..... */ NCBIT | NVBIT | NZBIT | NSBIT | NUBIT | ABIT | GBIT | GEBIT,
+ /* ....C */ CBIT | NVBIT | NZBIT | NSBIT | NUBIT | BEBIT | GBIT | GEBIT,
+ /* ...V. */ NCBIT | VBIT | NZBIT | NSBIT | NUBIT | ABIT | LEBIT | LBIT,
+ /* ...VC */ CBIT | VBIT | NZBIT | NSBIT | NUBIT | BEBIT | LEBIT | LBIT,
+ /* ..Z.. */ NCBIT | NVBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | GEBIT,
+ /* ..Z.C */ CBIT | NVBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | GEBIT,
+ /* ..ZV. */ NCBIT | VBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | LBIT,
+ /* ..ZVC */ CBIT | VBIT | ZBIT | NSBIT | NUBIT | BEBIT | LEBIT | LBIT,
+ /* .S... */ NCBIT | NVBIT | NZBIT | SBIT | NUBIT | ABIT | LEBIT | LBIT,
+ /* .S..C */ CBIT | NVBIT | NZBIT | SBIT | NUBIT | BEBIT | LEBIT | LBIT,
+ /* .S.V. */ NCBIT | VBIT | NZBIT | SBIT | NUBIT | ABIT | GBIT | GEBIT,
+ /* .S.VC */ CBIT | VBIT | NZBIT | SBIT | NUBIT | BEBIT | GBIT | GEBIT,
+ /* .SZ.. */ NCBIT | NVBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | LBIT,
+ /* .SZ.C */ CBIT | NVBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | LBIT,
+ /* .SZV. */ NCBIT | VBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | GEBIT,
+ /* .SZVC */ CBIT | VBIT | ZBIT | SBIT | NUBIT | BEBIT | LEBIT | GEBIT,
+ /* U.... */ NCBIT | NVBIT | NZBIT | NSBIT | UBIT | ABIT | GBIT | GEBIT,
+ /* U...C */ CBIT | NVBIT | NZBIT | NSBIT | UBIT | BEBIT | GBIT | GEBIT,
+ /* U..V. */ NCBIT | VBIT | NZBIT | NSBIT | UBIT | ABIT | LEBIT | LBIT,
+ /* U..VC */ CBIT | VBIT | NZBIT | NSBIT | UBIT | BEBIT | LEBIT | LBIT,
+ /* U.Z.. */ NCBIT | NVBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | GEBIT,
+ /* U.Z.C */ CBIT | NVBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | GEBIT,
+ /* U.ZV. */ NCBIT | VBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | LBIT,
+ /* U.ZVC */ CBIT | VBIT | ZBIT | NSBIT | UBIT | BEBIT | LEBIT | LBIT,
+ /* US... */ NCBIT | NVBIT | NZBIT | SBIT | UBIT | ABIT | LEBIT | LBIT,
+ /* US..C */ CBIT | NVBIT | NZBIT | SBIT | UBIT | BEBIT | LEBIT | LBIT,
+ /* US.V. */ NCBIT | VBIT | NZBIT | SBIT | UBIT | ABIT | GBIT | GEBIT,
+ /* US.VC */ CBIT | VBIT | NZBIT | SBIT | UBIT | BEBIT | GBIT | GEBIT,
+ /* USZ.. */ NCBIT | NVBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | LBIT,
+ /* USZ.C */ CBIT | NVBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | LBIT,
+ /* USZV. */ NCBIT | VBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | GEBIT,
+ /* USZVC */ CBIT | VBIT | ZBIT | SBIT | UBIT | BEBIT | LEBIT | GEBIT
};
@@ -317,10 +317,10 @@ const UINT32 drcbe_c::s_condition_map[] =
drcbe_c::drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
: drcbe_interface(drcuml, cache, device),
- m_hash(cache, modes, addrbits, ignorebits),
- m_map(cache, 0),
- m_labels(cache),
- m_fixup_delegate(FUNC(drcbe_c::fixup_label), this)
+ m_hash(cache, modes, addrbits, ignorebits),
+ m_map(cache, 0),
+ m_labels(cache),
+ m_fixup_delegate(FUNC(drcbe_c::fixup_label), this)
{
}
@@ -541,21 +541,21 @@ int drcbe_c::execute(code_handle &entry)
{
// ----------------------- Control Flow Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_HANDLE, 4, 0): // HANDLE handle
- case MAKE_OPCODE_SHORT(OP_HASH, 4, 0): // HASH mode,pc
- case MAKE_OPCODE_SHORT(OP_LABEL, 4, 0): // LABEL imm
- case MAKE_OPCODE_SHORT(OP_COMMENT, 4, 0): // COMMENT string
- case MAKE_OPCODE_SHORT(OP_MAPVAR, 4, 0): // MAPVAR mapvar,value
+ case MAKE_OPCODE_SHORT(OP_HANDLE, 4, 0): // HANDLE handle
+ case MAKE_OPCODE_SHORT(OP_HASH, 4, 0): // HASH mode,pc
+ case MAKE_OPCODE_SHORT(OP_LABEL, 4, 0): // LABEL imm
+ case MAKE_OPCODE_SHORT(OP_COMMENT, 4, 0): // COMMENT string
+ case MAKE_OPCODE_SHORT(OP_MAPVAR, 4, 0): // MAPVAR mapvar,value
// these opcodes should be processed at compile-time only
fatalerror("Unexpected opcode\n");
break;
- case MAKE_OPCODE_SHORT(OP_DEBUG, 4, 0): // DEBUG pc
+ case MAKE_OPCODE_SHORT(OP_DEBUG, 4, 0): // DEBUG pc
debugger_instruction_hook(&m_device, PARAM0);
break;
- case MAKE_OPCODE_SHORT(OP_HASHJMP, 4, 0): // HASHJMP mode,pc,handle
+ case MAKE_OPCODE_SHORT(OP_HASHJMP, 4, 0): // HASHJMP mode,pc,handle
sp = 0;
newinst = (const drcbec_instruction *)m_hash.get_codeptr(PARAM0, PARAM1);
if (newinst == NULL)
@@ -569,7 +569,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_EXIT, 4, 1): // EXIT src1[,c]
+ case MAKE_OPCODE_SHORT(OP_EXIT, 4, 1): // EXIT src1[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -577,7 +577,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_EXIT, 4, 0):
return PARAM0;
- case MAKE_OPCODE_SHORT(OP_JMP, 4, 1): // JMP imm[,c]
+ case MAKE_OPCODE_SHORT(OP_JMP, 4, 1): // JMP imm[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -588,7 +588,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_CALLH, 4, 1): // CALLH handle[,c]
+ case MAKE_OPCODE_SHORT(OP_CALLH, 4, 1): // CALLH handle[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -601,7 +601,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_RET, 4, 1): // RET [c]
+ case MAKE_OPCODE_SHORT(OP_RET, 4, 1): // RET [c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -613,7 +613,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_EXH, 4, 1): // EXH handle,param[,c]
+ case MAKE_OPCODE_SHORT(OP_EXH, 4, 1): // EXH handle,param[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -627,7 +627,7 @@ int drcbe_c::execute(code_handle &entry)
inst = newinst;
continue;
- case MAKE_OPCODE_SHORT(OP_CALLC, 4, 1): // CALLC func,ptr[,c]
+ case MAKE_OPCODE_SHORT(OP_CALLC, 4, 1): // CALLC func,ptr[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -636,7 +636,7 @@ int drcbe_c::execute(code_handle &entry)
(*inst[0].cfunc)(inst[1].v);
break;
- case MAKE_OPCODE_SHORT(OP_RECOVER, 4, 0): // RECOVER dst,mapvar
+ case MAKE_OPCODE_SHORT(OP_RECOVER, 4, 0): // RECOVER dst,mapvar
assert(sp > 0);
PARAM0 = m_map.get_value((drccodeptr)callstack[0], PARAM1);
break;
@@ -644,29 +644,29 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- Internal Register Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_SETFMOD, 4, 0): // SETFMOD src
+ case MAKE_OPCODE_SHORT(OP_SETFMOD, 4, 0): // SETFMOD src
m_state.fmod = PARAM0;
break;
- case MAKE_OPCODE_SHORT(OP_GETFMOD, 4, 0): // GETFMOD dst
+ case MAKE_OPCODE_SHORT(OP_GETFMOD, 4, 0): // GETFMOD dst
PARAM0 = m_state.fmod;
break;
- case MAKE_OPCODE_SHORT(OP_GETEXP, 4, 0): // GETEXP dst
+ case MAKE_OPCODE_SHORT(OP_GETEXP, 4, 0): // GETEXP dst
PARAM0 = m_state.exp;
break;
- case MAKE_OPCODE_SHORT(OP_GETFLGS, 4, 0): // GETFLGS dst[,f]
+ case MAKE_OPCODE_SHORT(OP_GETFLGS, 4, 0): // GETFLGS dst[,f]
PARAM0 = flags & PARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_SAVE, 4, 0): // SAVE dst
+ case MAKE_OPCODE_SHORT(OP_SAVE, 4, 0): // SAVE dst
*inst[0].state = m_state;
inst[0].state->flags = flags;
break;
- case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 0): // RESTORE dst
- case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 1): // RESTORE dst
+ case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 0): // RESTORE dst
+ case MAKE_OPCODE_SHORT(OP_RESTORE, 4, 1): // RESTORE dst
m_state = *inst[0].state;
flags = inst[0].state->flags;
break;
@@ -674,195 +674,195 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 32-Bit Integer Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_LOAD1, 4, 0): // LOAD dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOAD1, 4, 0): // LOAD dst,base,index,BYTE
PARAM0 = inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD1x2, 4, 0): // LOAD dst,base,index,BYTE_x2
+ case MAKE_OPCODE_SHORT(OP_LOAD1x2, 4, 0): // LOAD dst,base,index,BYTE_x2
PARAM0 = *(UINT8 *)&inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD1x4, 4, 0): // LOAD dst,base,index,BYTE_x4
+ case MAKE_OPCODE_SHORT(OP_LOAD1x4, 4, 0): // LOAD dst,base,index,BYTE_x4
PARAM0 = *(UINT8 *)&inst[1].puint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD1x8, 4, 0): // LOAD dst,base,index,BYTE_x8
+ case MAKE_OPCODE_SHORT(OP_LOAD1x8, 4, 0): // LOAD dst,base,index,BYTE_x8
PARAM0 = *(UINT8 *)&inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2x1, 4, 0): // LOAD dst,base,index,WORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOAD2x1, 4, 0): // LOAD dst,base,index,WORD_x1
PARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2, 4, 0): // LOAD dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_LOAD2, 4, 0): // LOAD dst,base,index,WORD
PARAM0 = inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2x4, 4, 0): // LOAD dst,base,index,WORD_x4
+ case MAKE_OPCODE_SHORT(OP_LOAD2x4, 4, 0): // LOAD dst,base,index,WORD_x4
PARAM0 = *(UINT16 *)&inst[1].puint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2x8, 4, 0): // LOAD dst,base,index,WORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOAD2x8, 4, 0): // LOAD dst,base,index,WORD_x8
PARAM0 = *(UINT16 *)&inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4x1, 4, 0): // LOAD dst,base,index,DWORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOAD4x1, 4, 0): // LOAD dst,base,index,DWORD_x1
PARAM0 = *(UINT32 *)&inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4x2, 4, 0): // LOAD dst,base,index,DWORD_x2
+ case MAKE_OPCODE_SHORT(OP_LOAD4x2, 4, 0): // LOAD dst,base,index,DWORD_x2
PARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4, 4, 0): // LOAD dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOAD4, 4, 0): // LOAD dst,base,index,DWORD
PARAM0 = inst[1].puint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4x8, 4, 0): // LOAD dst,base,index,DWORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOAD4x8, 4, 0): // LOAD dst,base,index,DWORD_x8
PARAM0 = *(UINT32 *)&inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1, 4, 0): // LOADS dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOADS1, 4, 0): // LOADS dst,base,index,BYTE
PARAM0 = inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1x2, 4, 0): // LOADS dst,base,index,BYTE_x2
+ case MAKE_OPCODE_SHORT(OP_LOADS1x2, 4, 0): // LOADS dst,base,index,BYTE_x2
PARAM0 = *(INT8 *)&inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1x4, 4, 0): // LOADS dst,base,index,BYTE_x4
+ case MAKE_OPCODE_SHORT(OP_LOADS1x4, 4, 0): // LOADS dst,base,index,BYTE_x4
PARAM0 = *(INT8 *)&inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1x8, 4, 0): // LOADS dst,base,index,BYTE_x8
+ case MAKE_OPCODE_SHORT(OP_LOADS1x8, 4, 0): // LOADS dst,base,index,BYTE_x8
PARAM0 = *(INT8 *)&inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2x1, 4, 0): // LOADS dst,base,index,WORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOADS2x1, 4, 0): // LOADS dst,base,index,WORD_x1
PARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2, 4, 0): // LOADS dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_LOADS2, 4, 0): // LOADS dst,base,index,WORD
PARAM0 = inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2x4, 4, 0): // LOADS dst,base,index,WORD_x4
+ case MAKE_OPCODE_SHORT(OP_LOADS2x4, 4, 0): // LOADS dst,base,index,WORD_x4
PARAM0 = *(INT16 *)&inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2x8, 4, 0): // LOADS dst,base,index,WORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOADS2x8, 4, 0): // LOADS dst,base,index,WORD_x8
PARAM0 = *(INT16 *)&inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4x1, 4, 0): // LOADS dst,base,index,DWORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOADS4x1, 4, 0): // LOADS dst,base,index,DWORD_x1
PARAM0 = *(INT32 *)&inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4x2, 4, 0): // LOADS dst,base,index,DWORD_x2
+ case MAKE_OPCODE_SHORT(OP_LOADS4x2, 4, 0): // LOADS dst,base,index,DWORD_x2
PARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4, 4, 0): // LOADS dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOADS4, 4, 0): // LOADS dst,base,index,DWORD
PARAM0 = inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4x8, 4, 0): // LOADS dst,base,index,DWORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOADS4x8, 4, 0): // LOADS dst,base,index,DWORD_x8
PARAM0 = *(INT32 *)&inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_STORE1, 4, 0): // STORE dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_STORE1, 4, 0): // STORE dst,base,index,BYTE
inst[0].puint8[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE1x2, 4, 0): // STORE dst,base,index,BYTE_x2
+ case MAKE_OPCODE_SHORT(OP_STORE1x2, 4, 0): // STORE dst,base,index,BYTE_x2
*(UINT8 *)&inst[0].puint16[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE1x4, 4, 0): // STORE dst,base,index,BYTE_x4
+ case MAKE_OPCODE_SHORT(OP_STORE1x4, 4, 0): // STORE dst,base,index,BYTE_x4
*(UINT8 *)&inst[0].puint32[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE1x8, 4, 0): // STORE dst,base,index,BYTE_x8
+ case MAKE_OPCODE_SHORT(OP_STORE1x8, 4, 0): // STORE dst,base,index,BYTE_x8
*(UINT8 *)&inst[0].puint64[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2x1, 4, 0): // STORE dst,base,index,WORD_x1
+ case MAKE_OPCODE_SHORT(OP_STORE2x1, 4, 0): // STORE dst,base,index,WORD_x1
*(UINT16 *)&inst[0].puint8[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2, 4, 0): // STORE dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_STORE2, 4, 0): // STORE dst,base,index,WORD
inst[0].puint16[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2x4, 4, 0): // STORE dst,base,index,WORD_x4
+ case MAKE_OPCODE_SHORT(OP_STORE2x4, 4, 0): // STORE dst,base,index,WORD_x4
*(UINT16 *)&inst[0].puint32[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2x8, 4, 0): // STORE dst,base,index,WORD_x8
+ case MAKE_OPCODE_SHORT(OP_STORE2x8, 4, 0): // STORE dst,base,index,WORD_x8
*(UINT16 *)&inst[0].puint64[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4x1, 4, 0): // STORE dst,base,index,DWORD_x1
+ case MAKE_OPCODE_SHORT(OP_STORE4x1, 4, 0): // STORE dst,base,index,DWORD_x1
*(UINT32 *)&inst[0].puint8[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4x2, 4, 0): // STORE dst,base,index,DWORD_x2
+ case MAKE_OPCODE_SHORT(OP_STORE4x2, 4, 0): // STORE dst,base,index,DWORD_x2
*(UINT32 *)&inst[0].puint16[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4, 4, 0): // STORE dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_STORE4, 4, 0): // STORE dst,base,index,DWORD
inst[0].puint32[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4x8, 4, 0): // STORE dst,base,index,DWORD_x8
+ case MAKE_OPCODE_SHORT(OP_STORE4x8, 4, 0): // STORE dst,base,index,DWORD_x8
*(UINT32 *)&inst[0].puint64[PARAM1] = PARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_READ1, 4, 0): // READ dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_READ1, 4, 0): // READ dst,src1,space_BYTE
PARAM0 = m_space[PARAM2]->read_byte(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ2, 4, 0): // READ dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_READ2, 4, 0): // READ dst,src1,space_WORD
PARAM0 = m_space[PARAM2]->read_word(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ4, 4, 0): // READ dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_READ4, 4, 0): // READ dst,src1,space_DWORD
PARAM0 = m_space[PARAM2]->read_dword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READM2, 4, 0): // READM dst,src1,mask,space_WORD
+ case MAKE_OPCODE_SHORT(OP_READM2, 4, 0): // READM dst,src1,mask,space_WORD
PARAM0 = m_space[PARAM3]->read_word(PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_READM4, 4, 0): // READM dst,src1,mask,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_READM4, 4, 0): // READM dst,src1,mask,space_DWORD
PARAM0 = m_space[PARAM3]->read_dword(PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE1, 4, 0): // WRITE dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_WRITE1, 4, 0): // WRITE dst,src1,space_BYTE
m_space[PARAM2]->write_byte(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE2, 4, 0): // WRITE dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_WRITE2, 4, 0): // WRITE dst,src1,space_WORD
m_space[PARAM2]->write_word(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE4, 4, 0): // WRITE dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_WRITE4, 4, 0): // WRITE dst,src1,space_DWORD
m_space[PARAM2]->write_dword(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITEM2, 4, 0): // WRITEM dst,src1,mask,space_WORD
+ case MAKE_OPCODE_SHORT(OP_WRITEM2, 4, 0): // WRITEM dst,src1,mask,space_WORD
m_space[PARAM3]->write_word(PARAM0, PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_WRITEM4, 4, 0): // WRITEM dst,src1,mask,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_WRITEM4, 4, 0): // WRITEM dst,src1,mask,space_DWORD
m_space[PARAM3]->write_dword(PARAM0, PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_CARRY, 4, 1): // CARRY src,bitnum
+ case MAKE_OPCODE_SHORT(OP_CARRY, 4, 1): // CARRY src,bitnum
flags = (flags & ~FLAG_C) | ((PARAM0 >> (PARAM1 & 31)) & FLAG_C);
break;
- case MAKE_OPCODE_SHORT(OP_MOV, 4, 1): // MOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_MOV, 4, 1): // MOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -871,11 +871,11 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = PARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_SET, 4, 1): // SET dst,c
+ case MAKE_OPCODE_SHORT(OP_SET, 4, 1): // SET dst,c
PARAM0 = OPCODE_FAIL_CONDITION(opcode, flags) ? 0 : 1;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT1, 4, 0): // SEXT1 dst,src
+ case MAKE_OPCODE_SHORT(OP_SEXT1, 4, 0): // SEXT1 dst,src
PARAM0 = (INT8)PARAM1;
break;
@@ -885,7 +885,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT2, 4, 0): // SEXT2 dst,src
+ case MAKE_OPCODE_SHORT(OP_SEXT2, 4, 0): // SEXT2 dst,src
PARAM0 = (INT16)PARAM1;
break;
@@ -895,7 +895,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROLAND, 4, 0): // ROLAND dst,src,count,mask[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLAND, 4, 0): // ROLAND dst,src,count,mask[,f]
shift = PARAM2 & 31;
PARAM0 = ((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3;
break;
@@ -907,7 +907,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROLINS, 4, 0): // ROLINS dst,src,count,mask[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLINS, 4, 0): // ROLINS dst,src,count,mask[,f]
shift = PARAM2 & 31;
PARAM0 = (PARAM0 & ~PARAM3) | (((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3);
break;
@@ -919,7 +919,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ADD, 4, 0): // ADD dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADD, 4, 0): // ADD dst,src1,src2[,f]
PARAM0 = PARAM1 + PARAM2;
break;
@@ -929,7 +929,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ADDC, 4, 0): // ADDC dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADDC, 4, 0): // ADDC dst,src1,src2[,f]
PARAM0 = PARAM1 + PARAM2 + (flags & FLAG_C);
break;
@@ -938,19 +938,19 @@ int drcbe_c::execute(code_handle &entry)
if (PARAM2 + 1 != 0)
flags = FLAGS32_NZCV_ADD(temp32, PARAM1, PARAM2 + (flags & FLAG_C));
else
- {
- if ((PARAM2 == 0xffffffff) && (flags & FLAG_C))
- {
- flags = FLAGS32_NZCV_ADD(temp32, PARAM1 + (flags & FLAG_C), PARAM2);
- flags |= FLAG_C;
- }
- else
- flags = FLAGS32_NZCV_ADD(temp32, PARAM1 + (flags & FLAG_C), PARAM2);
- }
+ {
+ if ((PARAM2 == 0xffffffff) && (flags & FLAG_C))
+ {
+ flags = FLAGS32_NZCV_ADD(temp32, PARAM1 + (flags & FLAG_C), PARAM2);
+ flags |= FLAG_C;
+ }
+ else
+ flags = FLAGS32_NZCV_ADD(temp32, PARAM1 + (flags & FLAG_C), PARAM2);
+ }
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SUB, 4, 0): // SUB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUB, 4, 0): // SUB dst,src1,src2[,f]
PARAM0 = PARAM1 - PARAM2;
break;
@@ -960,32 +960,32 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SUBB, 4, 0): // SUBB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUBB, 4, 0): // SUBB dst,src1,src2[,f]
PARAM0 = PARAM1 - PARAM2 - (flags & FLAG_C);
break;
case MAKE_OPCODE_SHORT(OP_SUBB, 4, 1):
temp32 = PARAM1 - PARAM2 - (flags & FLAG_C);
- temp64 = (UINT64)PARAM1 - (UINT64)PARAM2 - (UINT64)(flags & FLAG_C);
+ temp64 = (UINT64)PARAM1 - (UINT64)PARAM2 - (UINT64)(flags & FLAG_C);
if (PARAM2 + 1 != 0)
flags = FLAGS32_NZCV_SUB(temp32, PARAM1, PARAM2 + (flags & FLAG_C));
else
- {
- flags = FLAGS32_NZCV_SUB(temp32, PARAM1 - (flags & FLAG_C), PARAM2);
- flags &= ~(FLAG_C | FLAG_V);
- flags |= ((temp64>>32) & 1) ? FLAG_C : 0;
- flags |= (((PARAM1) ^ (PARAM2)) & ((PARAM1) ^ (temp64)) & 0x80000000) ? FLAG_V : 0;
- }
+ {
+ flags = FLAGS32_NZCV_SUB(temp32, PARAM1 - (flags & FLAG_C), PARAM2);
+ flags &= ~(FLAG_C | FLAG_V);
+ flags |= ((temp64>>32) & 1) ? FLAG_C : 0;
+ flags |= (((PARAM1) ^ (PARAM2)) & ((PARAM1) ^ (temp64)) & 0x80000000) ? FLAG_V : 0;
+ }
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_CMP, 4, 1): // CMP src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_CMP, 4, 1): // CMP src1,src2[,f]
temp32 = PARAM0 - PARAM1;
flags = FLAGS32_NZCV_SUB(temp32, PARAM0, PARAM1);
// printf("CMP: %08x - %08x = flags %x\n", PARAM0, PARAM1, flags);
break;
- case MAKE_OPCODE_SHORT(OP_MULU, 4, 0): // MULU dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_MULU, 4, 0): // MULU dst,edst,src1,src2[,f]
temp64 = (UINT64)(UINT32)PARAM2 * (UINT64)(UINT32)PARAM3;
PARAM1 = temp64 >> 32;
PARAM0 = (UINT32)temp64;
@@ -1000,7 +1000,7 @@ int drcbe_c::execute(code_handle &entry)
flags |= FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_MULS, 4, 0): // MULS dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_MULS, 4, 0): // MULS dst,edst,src1,src2[,f]
temp64 = (INT64)(INT32)PARAM2 * (INT64)(INT32)PARAM3;
PARAM1 = temp64 >> 32;
PARAM0 = (UINT32)temp64;
@@ -1008,7 +1008,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_MULS, 4, 1):
temp64 = (INT64)(INT32)PARAM2 * (INT64)(INT32)PARAM3;
- temp32 = (INT32)temp64;
+ temp32 = (INT32)temp64;
flags = FLAGS32_NZ(temp32);
PARAM1 = temp64 >> 32;
PARAM0 = (UINT32)temp64;
@@ -1016,7 +1016,7 @@ int drcbe_c::execute(code_handle &entry)
flags |= FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_DIVU, 4, 0): // DIVU dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_DIVU, 4, 0): // DIVU dst,edst,src1,src2[,f]
if (PARAM3 != 0)
{
temp32 = (UINT32)PARAM2 / (UINT32)PARAM3;
@@ -1037,7 +1037,7 @@ int drcbe_c::execute(code_handle &entry)
flags = FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_DIVS, 4, 0): // DIVS dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_DIVS, 4, 0): // DIVS dst,edst,src1,src2[,f]
if (PARAM3 != 0)
{
temp32 = (INT32)PARAM2 / (INT32)PARAM3;
@@ -1058,7 +1058,7 @@ int drcbe_c::execute(code_handle &entry)
flags = FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_AND, 4, 0): // AND dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_AND, 4, 0): // AND dst,src1,src2[,f]
PARAM0 = PARAM1 & PARAM2;
break;
@@ -1068,12 +1068,12 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_TEST, 4, 1): // TEST src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_TEST, 4, 1): // TEST src1,src2[,f]
temp32 = PARAM0 & PARAM1;
flags = FLAGS32_NZ(temp32);
break;
- case MAKE_OPCODE_SHORT(OP_OR, 4, 0): // OR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_OR, 4, 0): // OR dst,src1,src2[,f]
PARAM0 = PARAM1 | PARAM2;
break;
@@ -1083,7 +1083,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_XOR, 4, 0): // XOR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_XOR, 4, 0): // XOR dst,src1,src2[,f]
PARAM0 = PARAM1 ^ PARAM2;
break;
@@ -1093,7 +1093,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_LZCNT, 4, 0): // LZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_LZCNT, 4, 0): // LZCNT dst,src
PARAM0 = count_leading_zeros(PARAM1);
break;
@@ -1103,7 +1103,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_BSWAP, 4, 0): // BSWAP dst,src
+ case MAKE_OPCODE_SHORT(OP_BSWAP, 4, 0): // BSWAP dst,src
temp32 = PARAM1;
PARAM0 = FLIPENDIAN_INT32(temp32);
break;
@@ -1114,7 +1114,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = FLIPENDIAN_INT32(temp32);
break;
- case MAKE_OPCODE_SHORT(OP_SHL, 4, 0): // SHL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHL, 4, 0): // SHL dst,src,count[,f]
PARAM0 = PARAM1 << (PARAM2 & 31);
break;
@@ -1122,14 +1122,14 @@ int drcbe_c::execute(code_handle &entry)
shift = PARAM2 & 31;
temp32 = PARAM1 << shift;
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
- flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
- }
+ {
+ flags = FLAGS32_NZ(temp32);
+ flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
+ }
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SHR, 4, 0): // SHR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHR, 4, 0): // SHR dst,src,count[,f]
PARAM0 = PARAM1 >> (PARAM2 & 31);
break;
@@ -1137,14 +1137,14 @@ int drcbe_c::execute(code_handle &entry)
shift = PARAM2 & 31;
temp32 = PARAM1 >> shift;
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
- flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
- }
+ {
+ flags = FLAGS32_NZ(temp32);
+ flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
+ }
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_SAR, 4, 0): // SAR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SAR, 4, 0): // SAR dst,src,count[,f]
PARAM0 = (INT32)PARAM1 >> (PARAM2 & 31);
break;
@@ -1152,14 +1152,14 @@ int drcbe_c::execute(code_handle &entry)
shift = PARAM2 & 31;
temp32 = (INT32)PARAM1 >> shift;
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
- flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
- }
+ {
+ flags = FLAGS32_NZ(temp32);
+ flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
+ }
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROL, 4, 0): // ROL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROL, 4, 0): // ROL dst,src,count[,f]
shift = PARAM2 & 31;
PARAM0 = (PARAM1 << shift) | (PARAM1 >> ((32 - shift) & 31));
break;
@@ -1168,14 +1168,14 @@ int drcbe_c::execute(code_handle &entry)
shift = PARAM2 & 31;
temp32 = (PARAM1 << shift) | (PARAM1 >> ((32 - shift) & 31));
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
- flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
- }
+ {
+ flags = FLAGS32_NZ(temp32);
+ flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
+ }
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROLC, 4, 0): // ROLC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLC, 4, 0): // ROLC dst,src,count[,f]
shift = PARAM2 & 31;
if (shift > 1)
PARAM0 = (PARAM1 << shift) | ((flags & FLAG_C) << (shift - 1)) | (PARAM1 >> (33 - shift));
@@ -1196,7 +1196,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_ROR, 4, 0): // ROR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROR, 4, 0): // ROR dst,src,count[,f]
shift = PARAM2 & 31;
PARAM0 = (PARAM1 >> shift) | (PARAM1 << ((32 - shift) & 31));
break;
@@ -1209,7 +1209,7 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_RORC, 4, 0): // RORC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_RORC, 4, 0): // RORC dst,src,count[,f]
shift = PARAM2 & 31;
if (shift > 1)
PARAM0 = (PARAM1 >> shift) | (((flags & FLAG_C) << 31) >> (shift - 1)) | (PARAM1 << (33 - shift));
@@ -1233,259 +1233,259 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 64-Bit Integer Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_LOAD1, 8, 0): // DLOAD dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOAD1, 8, 0): // DLOAD dst,base,index,BYTE
DPARAM0 = inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD1x2, 8, 0): // DLOAD dst,base,index,BYTE_x2
+ case MAKE_OPCODE_SHORT(OP_LOAD1x2, 8, 0): // DLOAD dst,base,index,BYTE_x2
DPARAM0 = *(UINT8 *)&inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD1x4, 8, 0): // DLOAD dst,base,index,BYTE_x4
+ case MAKE_OPCODE_SHORT(OP_LOAD1x4, 8, 0): // DLOAD dst,base,index,BYTE_x4
DPARAM0 = *(UINT8 *)&inst[1].puint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD1x8, 8, 0): // DLOAD dst,base,index,BYTE_x8
+ case MAKE_OPCODE_SHORT(OP_LOAD1x8, 8, 0): // DLOAD dst,base,index,BYTE_x8
DPARAM0 = *(UINT8 *)&inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2x1, 8, 0): // DLOAD dst,base,index,WORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOAD2x1, 8, 0): // DLOAD dst,base,index,WORD_x1
DPARAM0 = *(UINT16 *)&inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2, 8, 0): // DLOAD dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_LOAD2, 8, 0): // DLOAD dst,base,index,WORD
DPARAM0 = inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2x4, 8, 0): // DLOAD dst,base,index,WORD_x4
+ case MAKE_OPCODE_SHORT(OP_LOAD2x4, 8, 0): // DLOAD dst,base,index,WORD_x4
DPARAM0 = *(UINT16 *)&inst[1].puint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD2x8, 8, 0): // DLOAD dst,base,index,WORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOAD2x8, 8, 0): // DLOAD dst,base,index,WORD_x8
DPARAM0 = *(UINT16 *)&inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4x1, 8, 0): // DLOAD dst,base,index,DWORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOAD4x1, 8, 0): // DLOAD dst,base,index,DWORD_x1
DPARAM0 = *(UINT32 *)&inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4x2, 8, 0): // DLOAD dst,base,index,DWORD_x2
+ case MAKE_OPCODE_SHORT(OP_LOAD4x2, 8, 0): // DLOAD dst,base,index,DWORD_x2
DPARAM0 = *(UINT32 *)&inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4, 8, 0): // DLOAD dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOAD4, 8, 0): // DLOAD dst,base,index,DWORD
DPARAM0 = inst[1].puint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD4x8, 8, 0): // DLOAD dst,base,index,DWORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOAD4x8, 8, 0): // DLOAD dst,base,index,DWORD_x8
DPARAM0 = *(UINT32 *)&inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD8x1, 8, 0): // DLOAD dst,base,index,QWORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOAD8x1, 8, 0): // DLOAD dst,base,index,QWORD_x1
DPARAM0 = *(UINT64 *)&inst[1].puint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD8x2, 8, 0): // DLOAD dst,base,index,QWORD_x2
+ case MAKE_OPCODE_SHORT(OP_LOAD8x2, 8, 0): // DLOAD dst,base,index,QWORD_x2
DPARAM0 = *(UINT64 *)&inst[1].puint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD8x4, 8, 0): // DLOAD dst,base,index,QWORD_x4
+ case MAKE_OPCODE_SHORT(OP_LOAD8x4, 8, 0): // DLOAD dst,base,index,QWORD_x4
DPARAM0 = *(UINT64 *)&inst[1].puint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOAD8, 8, 0): // DLOAD dst,base,index,QWORD
+ case MAKE_OPCODE_SHORT(OP_LOAD8, 8, 0): // DLOAD dst,base,index,QWORD
DPARAM0 = inst[1].puint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1, 8, 0): // DLOADS dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_LOADS1, 8, 0): // DLOADS dst,base,index,BYTE
DPARAM0 = inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1x2, 8, 0): // DLOADS dst,base,index,BYTE_x2
+ case MAKE_OPCODE_SHORT(OP_LOADS1x2, 8, 0): // DLOADS dst,base,index,BYTE_x2
DPARAM0 = *(INT8 *)&inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1x4, 8, 0): // DLOADS dst,base,index,BYTE_x4
+ case MAKE_OPCODE_SHORT(OP_LOADS1x4, 8, 0): // DLOADS dst,base,index,BYTE_x4
DPARAM0 = *(INT8 *)&inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS1x8, 8, 0): // DLOADS dst,base,index,BYTE_x8
+ case MAKE_OPCODE_SHORT(OP_LOADS1x8, 8, 0): // DLOADS dst,base,index,BYTE_x8
DPARAM0 = *(INT8 *)&inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2x1, 8, 0): // DLOADS dst,base,index,WORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOADS2x1, 8, 0): // DLOADS dst,base,index,WORD_x1
DPARAM0 = *(INT16 *)&inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2, 8, 0): // DLOADS dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_LOADS2, 8, 0): // DLOADS dst,base,index,WORD
DPARAM0 = inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2x4, 8, 0): // DLOADS dst,base,index,WORD_x4
+ case MAKE_OPCODE_SHORT(OP_LOADS2x4, 8, 0): // DLOADS dst,base,index,WORD_x4
DPARAM0 = *(INT16 *)&inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS2x8, 8, 0): // DLOADS dst,base,index,WORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOADS2x8, 8, 0): // DLOADS dst,base,index,WORD_x8
DPARAM0 = *(INT16 *)&inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4x1, 8, 0): // DLOADS dst,base,index,DWORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOADS4x1, 8, 0): // DLOADS dst,base,index,DWORD_x1
DPARAM0 = *(INT32 *)&inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4x2, 8, 0): // DLOADS dst,base,index,DWORD_x2
+ case MAKE_OPCODE_SHORT(OP_LOADS4x2, 8, 0): // DLOADS dst,base,index,DWORD_x2
DPARAM0 = *(INT32 *)&inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4, 8, 0): // DLOADS dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_LOADS4, 8, 0): // DLOADS dst,base,index,DWORD
DPARAM0 = inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS4x8, 8, 0): // DLOADS dst,base,index,DWORD_x8
+ case MAKE_OPCODE_SHORT(OP_LOADS4x8, 8, 0): // DLOADS dst,base,index,DWORD_x8
DPARAM0 = *(INT32 *)&inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS8x1, 8, 0): // DLOADS dst,base,index,QWORD_x1
+ case MAKE_OPCODE_SHORT(OP_LOADS8x1, 8, 0): // DLOADS dst,base,index,QWORD_x1
DPARAM0 = *(INT64 *)&inst[1].pint8[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS8x2, 8, 0): // DLOADS dst,base,index,QWORD_x2
+ case MAKE_OPCODE_SHORT(OP_LOADS8x2, 8, 0): // DLOADS dst,base,index,QWORD_x2
DPARAM0 = *(INT64 *)&inst[1].pint16[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS8x4, 8, 0): // DLOADS dst,base,index,QWORD_x4
+ case MAKE_OPCODE_SHORT(OP_LOADS8x4, 8, 0): // DLOADS dst,base,index,QWORD_x4
DPARAM0 = *(INT64 *)&inst[1].pint32[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_LOADS8, 8, 0): // DLOADS dst,base,index,QWORD
+ case MAKE_OPCODE_SHORT(OP_LOADS8, 8, 0): // DLOADS dst,base,index,QWORD
DPARAM0 = inst[1].pint64[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_STORE1, 8, 0): // DSTORE dst,base,index,BYTE
+ case MAKE_OPCODE_SHORT(OP_STORE1, 8, 0): // DSTORE dst,base,index,BYTE
inst[0].puint8[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE1x2, 8, 0): // DSTORE dst,base,index,BYTE_x2
+ case MAKE_OPCODE_SHORT(OP_STORE1x2, 8, 0): // DSTORE dst,base,index,BYTE_x2
*(UINT8 *)&inst[0].puint16[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE1x4, 8, 0): // DSTORE dst,base,index,BYTE_x4
+ case MAKE_OPCODE_SHORT(OP_STORE1x4, 8, 0): // DSTORE dst,base,index,BYTE_x4
*(UINT8 *)&inst[0].puint32[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE1x8, 8, 0): // DSTORE dst,base,index,BYTE_x8
+ case MAKE_OPCODE_SHORT(OP_STORE1x8, 8, 0): // DSTORE dst,base,index,BYTE_x8
*(UINT8 *)&inst[0].puint64[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2x1, 8, 0): // DSTORE dst,base,index,WORD_x1
+ case MAKE_OPCODE_SHORT(OP_STORE2x1, 8, 0): // DSTORE dst,base,index,WORD_x1
*(UINT16 *)&inst[0].puint8[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2, 8, 0): // DSTORE dst,base,index,WORD
+ case MAKE_OPCODE_SHORT(OP_STORE2, 8, 0): // DSTORE dst,base,index,WORD
inst[0].puint16[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2x4, 8, 0): // DSTORE dst,base,index,WORD_x4
+ case MAKE_OPCODE_SHORT(OP_STORE2x4, 8, 0): // DSTORE dst,base,index,WORD_x4
*(UINT16 *)&inst[0].puint32[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE2x8, 8, 0): // DSTORE dst,base,index,WORD_x8
+ case MAKE_OPCODE_SHORT(OP_STORE2x8, 8, 0): // DSTORE dst,base,index,WORD_x8
*(UINT16 *)&inst[0].puint64[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4x1, 8, 0): // DSTORE dst,base,index,DWORD_x1
+ case MAKE_OPCODE_SHORT(OP_STORE4x1, 8, 0): // DSTORE dst,base,index,DWORD_x1
*(UINT32 *)&inst[0].puint8[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4x2, 8, 0): // DSTORE dst,base,index,DWORD_x2
+ case MAKE_OPCODE_SHORT(OP_STORE4x2, 8, 0): // DSTORE dst,base,index,DWORD_x2
*(UINT32 *)&inst[0].puint16[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4, 8, 0): // DSTORE dst,base,index,DWORD
+ case MAKE_OPCODE_SHORT(OP_STORE4, 8, 0): // DSTORE dst,base,index,DWORD
inst[0].puint32[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE4x8, 8, 0): // DSTORE dst,base,index,DWORD_x8
+ case MAKE_OPCODE_SHORT(OP_STORE4x8, 8, 0): // DSTORE dst,base,index,DWORD_x8
*(UINT32 *)&inst[0].puint64[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE8x1, 8, 0): // DSTORE dst,base,index,QWORD_x1
+ case MAKE_OPCODE_SHORT(OP_STORE8x1, 8, 0): // DSTORE dst,base,index,QWORD_x1
*(UINT64 *)&inst[0].puint8[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE8x2, 8, 0): // DSTORE dst,base,index,QWORD_x2
+ case MAKE_OPCODE_SHORT(OP_STORE8x2, 8, 0): // DSTORE dst,base,index,QWORD_x2
*(UINT64 *)&inst[0].puint16[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE8x4, 8, 0): // DSTORE dst,base,index,QWORD_x4
+ case MAKE_OPCODE_SHORT(OP_STORE8x4, 8, 0): // DSTORE dst,base,index,QWORD_x4
*(UINT64 *)&inst[0].puint32[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_STORE8, 8, 0): // DSTORE dst,base,index,QWORD
+ case MAKE_OPCODE_SHORT(OP_STORE8, 8, 0): // DSTORE dst,base,index,QWORD
inst[0].puint64[PARAM1] = DPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_READ1, 8, 0): // DREAD dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_READ1, 8, 0): // DREAD dst,src1,space_BYTE
DPARAM0 = m_space[PARAM2]->read_byte(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ2, 8, 0): // DREAD dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_READ2, 8, 0): // DREAD dst,src1,space_WORD
DPARAM0 = m_space[PARAM2]->read_word(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ4, 8, 0): // DREAD dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_READ4, 8, 0): // DREAD dst,src1,space_DWORD
DPARAM0 = m_space[PARAM2]->read_dword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ8, 8, 0): // DREAD dst,src1,space_QOWRD
+ case MAKE_OPCODE_SHORT(OP_READ8, 8, 0): // DREAD dst,src1,space_QOWRD
DPARAM0 = m_space[PARAM2]->read_qword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READM2, 8, 0): // DREADM dst,src1,mask,space_WORD
+ case MAKE_OPCODE_SHORT(OP_READM2, 8, 0): // DREADM dst,src1,mask,space_WORD
DPARAM0 = m_space[PARAM3]->read_word(PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_READM4, 8, 0): // DREADM dst,src1,mask,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_READM4, 8, 0): // DREADM dst,src1,mask,space_DWORD
DPARAM0 = m_space[PARAM3]->read_dword(PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_READM8, 8, 0): // DREADM dst,src1,mask,space_QWORD
+ case MAKE_OPCODE_SHORT(OP_READM8, 8, 0): // DREADM dst,src1,mask,space_QWORD
DPARAM0 = m_space[PARAM3]->read_qword(PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE1, 8, 0): // DWRITE dst,src1,space_BYTE
+ case MAKE_OPCODE_SHORT(OP_WRITE1, 8, 0): // DWRITE dst,src1,space_BYTE
m_space[PARAM2]->write_byte(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE2, 8, 0): // DWRITE dst,src1,space_WORD
+ case MAKE_OPCODE_SHORT(OP_WRITE2, 8, 0): // DWRITE dst,src1,space_WORD
m_space[PARAM2]->write_word(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE4, 8, 0): // DWRITE dst,src1,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_WRITE4, 8, 0): // DWRITE dst,src1,space_DWORD
m_space[PARAM2]->write_dword(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITE8, 8, 0): // DWRITE dst,src1,space_QWORD
+ case MAKE_OPCODE_SHORT(OP_WRITE8, 8, 0): // DWRITE dst,src1,space_QWORD
m_space[PARAM2]->write_qword(PARAM0, DPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_WRITEM2, 8, 0): // DWRITEM dst,src1,mask,space_WORD
+ case MAKE_OPCODE_SHORT(OP_WRITEM2, 8, 0): // DWRITEM dst,src1,mask,space_WORD
m_space[PARAM3]->write_word(PARAM0, DPARAM1, DPARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_WRITEM4, 8, 0): // DWRITEM dst,src1,mask,space_DWORD
+ case MAKE_OPCODE_SHORT(OP_WRITEM4, 8, 0): // DWRITEM dst,src1,mask,space_DWORD
m_space[PARAM3]->write_dword(PARAM0, DPARAM1, DPARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_WRITEM8, 8, 0): // DWRITEM dst,src1,mask,space_QWORD
+ case MAKE_OPCODE_SHORT(OP_WRITEM8, 8, 0): // DWRITEM dst,src1,mask,space_QWORD
m_space[PARAM3]->write_qword(PARAM0, DPARAM1, DPARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_CARRY, 8, 0): // DCARRY src,bitnum
+ case MAKE_OPCODE_SHORT(OP_CARRY, 8, 0): // DCARRY src,bitnum
flags = (flags & ~FLAG_C) | ((DPARAM0 >> (DPARAM1 & 63)) & FLAG_C);
break;
- case MAKE_OPCODE_SHORT(OP_MOV, 8, 1): // DMOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_MOV, 8, 1): // DMOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -1494,11 +1494,11 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = DPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_SET, 8, 1): // DSET dst,c
+ case MAKE_OPCODE_SHORT(OP_SET, 8, 1): // DSET dst,c
DPARAM0 = OPCODE_FAIL_CONDITION(opcode, flags) ? 0 : 1;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT1, 8, 0): // DSEXT dst,src,BYTE
+ case MAKE_OPCODE_SHORT(OP_SEXT1, 8, 0): // DSEXT dst,src,BYTE
DPARAM0 = (INT8)PARAM1;
break;
@@ -1508,7 +1508,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT2, 8, 0): // DSEXT dst,src,WORD
+ case MAKE_OPCODE_SHORT(OP_SEXT2, 8, 0): // DSEXT dst,src,WORD
DPARAM0 = (INT16)PARAM1;
break;
@@ -1518,7 +1518,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SEXT4, 8, 0): // DSEXT dst,src,DWORD
+ case MAKE_OPCODE_SHORT(OP_SEXT4, 8, 0): // DSEXT dst,src,DWORD
DPARAM0 = (INT32)PARAM1;
break;
@@ -1528,7 +1528,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROLAND, 8, 0): // DROLAND dst,src,count,mask[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLAND, 8, 0): // DROLAND dst,src,count,mask[,f]
shift = DPARAM2 & 63;
DPARAM0 = ((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3;
break;
@@ -1540,7 +1540,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROLINS, 8, 0): // DROLINS dst,src,count,mask[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLINS, 8, 0): // DROLINS dst,src,count,mask[,f]
shift = DPARAM2 & 63;
DPARAM0 = (DPARAM0 & ~DPARAM3) | (((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3);
break;
@@ -1552,7 +1552,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ADD, 8, 0): // DADD dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADD, 8, 0): // DADD dst,src1,src2[,f]
DPARAM0 = DPARAM1 + DPARAM2;
break;
@@ -1562,7 +1562,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ADDC, 8, 0): // DADDC dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_ADDC, 8, 0): // DADDC dst,src1,src2[,f]
DPARAM0 = DPARAM1 + DPARAM2 + (flags & FLAG_C);
break;
@@ -1575,7 +1575,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SUB, 8, 0): // DSUB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUB, 8, 0): // DSUB dst,src1,src2[,f]
DPARAM0 = DPARAM1 - DPARAM2;
break;
@@ -1585,7 +1585,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SUBB, 8, 0): // DSUBB dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_SUBB, 8, 0): // DSUBB dst,src1,src2[,f]
DPARAM0 = DPARAM1 - DPARAM2 - (flags & FLAG_C);
break;
@@ -1598,12 +1598,12 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_CMP, 8, 1): // DCMP src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_CMP, 8, 1): // DCMP src1,src2[,f]
temp64 = DPARAM0 - DPARAM1;
flags = FLAGS64_NZCV_SUB(temp64, DPARAM0, DPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_MULU, 8, 0): // DMULU dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_MULU, 8, 0): // DMULU dst,edst,src1,src2[,f]
dmulu(*inst[0].puint64, *inst[1].puint64, DPARAM2, DPARAM3, FALSE);
break;
@@ -1611,7 +1611,7 @@ int drcbe_c::execute(code_handle &entry)
flags = dmulu(*inst[0].puint64, *inst[1].puint64, DPARAM2, DPARAM3, TRUE);
break;
- case MAKE_OPCODE_SHORT(OP_MULS, 8, 0): // DMULS dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_MULS, 8, 0): // DMULS dst,edst,src1,src2[,f]
dmuls(*inst[0].puint64, *inst[1].puint64, DPARAM2, DPARAM3, FALSE);
break;
@@ -1619,7 +1619,7 @@ int drcbe_c::execute(code_handle &entry)
flags = dmuls(*inst[0].puint64, *inst[1].puint64, DPARAM2, DPARAM3, TRUE);
break;
- case MAKE_OPCODE_SHORT(OP_DIVU, 8, 0): // DDIVU dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_DIVU, 8, 0): // DDIVU dst,edst,src1,src2[,f]
if (DPARAM3 != 0)
{
temp64 = (UINT64)DPARAM2 / (UINT64)DPARAM3;
@@ -1640,7 +1640,7 @@ int drcbe_c::execute(code_handle &entry)
flags = FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_DIVS, 8, 0): // DDIVS dst,edst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_DIVS, 8, 0): // DDIVS dst,edst,src1,src2[,f]
if (DPARAM3 != 0)
{
temp64 = (INT64)DPARAM2 / (INT64)DPARAM3;
@@ -1661,7 +1661,7 @@ int drcbe_c::execute(code_handle &entry)
flags = FLAG_V;
break;
- case MAKE_OPCODE_SHORT(OP_AND, 8, 0): // DAND dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_AND, 8, 0): // DAND dst,src1,src2[,f]
DPARAM0 = DPARAM1 & DPARAM2;
break;
@@ -1671,12 +1671,12 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_TEST, 8, 1): // DTEST src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_TEST, 8, 1): // DTEST src1,src2[,f]
temp64 = DPARAM1 & DPARAM2;
flags = FLAGS64_NZ(temp64);
break;
- case MAKE_OPCODE_SHORT(OP_OR, 8, 0): // DOR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_OR, 8, 0): // DOR dst,src1,src2[,f]
DPARAM0 = DPARAM1 | DPARAM2;
break;
@@ -1686,7 +1686,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_XOR, 8, 0): // DXOR dst,src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_XOR, 8, 0): // DXOR dst,src1,src2[,f]
DPARAM0 = DPARAM1 ^ DPARAM2;
break;
@@ -1696,7 +1696,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_LZCNT, 8, 0): // DLZCNT dst,src
+ case MAKE_OPCODE_SHORT(OP_LZCNT, 8, 0): // DLZCNT dst,src
if ((UINT32)(DPARAM1 >> 32) != 0)
DPARAM0 = count_leading_zeros(DPARAM1 >> 32);
else
@@ -1712,7 +1712,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_BSWAP, 8, 0): // DBSWAP dst,src
+ case MAKE_OPCODE_SHORT(OP_BSWAP, 8, 0): // DBSWAP dst,src
temp64 = DPARAM1;
DPARAM0 = FLIPENDIAN_INT64(temp64);
break;
@@ -1723,7 +1723,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = FLIPENDIAN_INT64(temp64);
break;
- case MAKE_OPCODE_SHORT(OP_SHL, 8, 0): // DSHL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHL, 8, 0): // DSHL dst,src,count[,f]
DPARAM0 = DPARAM1 << (DPARAM2 & 63);
break;
@@ -1735,7 +1735,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SHR, 8, 0): // DSHR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SHR, 8, 0): // DSHR dst,src,count[,f]
DPARAM0 = DPARAM1 >> (DPARAM2 & 63);
break;
@@ -1747,7 +1747,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_SAR, 8, 0): // DSAR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_SAR, 8, 0): // DSAR dst,src,count[,f]
DPARAM0 = (INT64)DPARAM1 >> (DPARAM2 & 63);
break;
@@ -1759,7 +1759,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROL, 8, 0): // DROL dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROL, 8, 0): // DROL dst,src,count[,f]
shift = DPARAM2 & 31;
DPARAM0 = (DPARAM1 << shift) | (DPARAM1 >> ((64 - shift) & 63));
break;
@@ -1772,7 +1772,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROLC, 8, 0): // DROLC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROLC, 8, 0): // DROLC dst,src,count[,f]
shift = DPARAM2 & 63;
if (shift > 1)
DPARAM0 = (DPARAM1 << shift) | ((flags & FLAG_C) << (shift - 1)) | (DPARAM1 >> (65 - shift));
@@ -1793,7 +1793,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_ROR, 8, 0): // DROR dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_ROR, 8, 0): // DROR dst,src,count[,f]
shift = DPARAM2 & 63;
DPARAM0 = (DPARAM1 >> shift) | (DPARAM1 << ((64 - shift) & 63));
break;
@@ -1806,7 +1806,7 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_RORC, 8, 0): // DRORC dst,src,count[,f]
+ case MAKE_OPCODE_SHORT(OP_RORC, 8, 0): // DRORC dst,src,count[,f]
shift = DPARAM2 & 63;
if (shift > 1)
DPARAM0 = (DPARAM1 >> shift) | ((((UINT64)flags & FLAG_C) << 63) >> (shift - 1)) | (DPARAM1 << (65 - shift));
@@ -1830,23 +1830,23 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 32-Bit Floating Point Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_FLOAD, 4, 0): // FSLOAD dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FLOAD, 4, 0): // FSLOAD dst,base,index
FSPARAM0 = inst[1].pfloat[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_FSTORE, 4, 0): // FSSTORE dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FSTORE, 4, 0): // FSSTORE dst,base,index
inst[0].pfloat[PARAM1] = FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FREAD, 4, 0): // FSREAD dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FREAD, 4, 0): // FSREAD dst,src1,space
PARAM0 = m_space[PARAM2]->read_dword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FWRITE, 4, 0): // FSWRITE dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FWRITE, 4, 0): // FSWRITE dst,src1,space
m_space[PARAM2]->write_dword(PARAM0, PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FMOV, 4, 1): // FSMOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_FMOV, 4, 1): // FSMOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -1855,133 +1855,133 @@ int drcbe_c::execute(code_handle &entry)
FSPARAM0 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4T, 4, 0): // FSTOI4T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4T, 4, 0): // FSTOI4T dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint32 = floor(FSPARAM1);
else
*inst[0].pint32 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4R, 4, 0): // FSTOI4R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4R, 4, 0): // FSTOI4R dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint32 = floor(FSPARAM1 + 0.5f);
else
*inst[0].pint32 = ceil(FSPARAM1 - 0.5f);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4F, 4, 0): // FSTOI4F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4F, 4, 0): // FSTOI4F dst,src1
*inst[0].pint32 = floor(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4C, 4, 0): // FSTOI4C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4C, 4, 0): // FSTOI4C dst,src1
*inst[0].pint32 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4, 4, 0): // FSTOI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4, 4, 0): // FSTOI4 dst,src1
*inst[0].pint32 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8T, 4, 0): // FSTOI8T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8T, 4, 0): // FSTOI8T dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint64 = floor(FSPARAM1);
else
*inst[0].pint64 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8R, 4, 0): // FSTOI8R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8R, 4, 0): // FSTOI8R dst,src1
if (FSPARAM1 >= 0)
*inst[0].pint64 = floor(FSPARAM1 + 0.5f);
else
*inst[0].pint64 = ceil(FSPARAM1 - 0.5f);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8F, 4, 0): // FSTOI8F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8F, 4, 0): // FSTOI8F dst,src1
*inst[0].pint64 = floor(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8C, 4, 0): // FSTOI8C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8C, 4, 0): // FSTOI8C dst,src1
*inst[0].pint64 = ceil(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8, 4, 0): // FSTOI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8, 4, 0): // FSTOI8 dst,src1
*inst[0].pint64 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI4, 4, 0): // FSFRI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI4, 4, 0): // FSFRI4 dst,src1
FSPARAM0 = *inst[1].pint32;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI8, 4, 0): // FSFRI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI8, 4, 0): // FSFRI8 dst,src1
FSPARAM0 = *inst[1].pint64;
break;
- case MAKE_OPCODE_SHORT(OP_FFRFD, 4, 0): // FSFRFD dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRFD, 4, 0): // FSFRFD dst,src1
FSPARAM0 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FADD, 4, 0): // FSADD dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FADD, 4, 0): // FSADD dst,src1,src2
FSPARAM0 = FSPARAM1 + FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FSUB, 4, 0): // FSSUB dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FSUB, 4, 0): // FSSUB dst,src1,src2
FSPARAM0 = FSPARAM1 - FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FCMP, 4, 1): // FSCMP src1,src2
+ case MAKE_OPCODE_SHORT(OP_FCMP, 4, 1): // FSCMP src1,src2
if (isnan(FSPARAM0) || isnan(FSPARAM1))
flags = FLAG_U;
else
flags = (FSPARAM0 < FSPARAM1) | ((FSPARAM0 == FSPARAM1) << 2);
break;
- case MAKE_OPCODE_SHORT(OP_FMUL, 4, 0): // FSMUL dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FMUL, 4, 0): // FSMUL dst,src1,src2
FSPARAM0 = FSPARAM1 * FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FDIV, 4, 0): // FSDIV dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FDIV, 4, 0): // FSDIV dst,src1,src2
FSPARAM0 = FSPARAM1 / FSPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FNEG, 4, 0): // FSNEG dst,src1
+ case MAKE_OPCODE_SHORT(OP_FNEG, 4, 0): // FSNEG dst,src1
FSPARAM0 = -FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FABS, 4, 0): // FSABS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FABS, 4, 0): // FSABS dst,src1
FSPARAM0 = fabs(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FSQRT, 4, 0): // FSSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FSQRT, 4, 0): // FSSQRT dst,src1
FSPARAM0 = sqrt(FSPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FRECIP, 4, 0): // FSRECIP dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRECIP, 4, 0): // FSRECIP dst,src1
FSPARAM0 = 1.0f / FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FRSQRT, 4, 0): // FSRSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRSQRT, 4, 0): // FSRSQRT dst,src1
FSPARAM0 = 1.0f / sqrt(FSPARAM1);
break;
// ----------------------- 64-Bit Floating Point Operations -----------------------
- case MAKE_OPCODE_SHORT(OP_FLOAD, 8, 0): // FDLOAD dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FLOAD, 8, 0): // FDLOAD dst,base,index
FDPARAM0 = inst[1].pdouble[PARAM2];
break;
- case MAKE_OPCODE_SHORT(OP_FSTORE, 8, 0): // FDSTORE dst,base,index
+ case MAKE_OPCODE_SHORT(OP_FSTORE, 8, 0): // FDSTORE dst,base,index
inst[0].pdouble[PARAM1] = FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FREAD, 8, 0): // FDREAD dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FREAD, 8, 0): // FDREAD dst,src1,space
DPARAM0 = m_space[PARAM2]->read_qword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FWRITE, 8, 0): // FDWRITE dst,src1,space
+ case MAKE_OPCODE_SHORT(OP_FWRITE, 8, 0): // FDWRITE dst,src1,space
m_space[PARAM2]->write_qword(PARAM0, DPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FMOV, 8, 1): // FDMOV dst,src[,c]
+ case MAKE_OPCODE_SHORT(OP_FMOV, 8, 1): // FDMOV dst,src[,c]
if (OPCODE_FAIL_CONDITION(opcode, flags))
break;
// fall through...
@@ -1990,114 +1990,114 @@ int drcbe_c::execute(code_handle &entry)
FDPARAM0 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4T, 8, 0): // FDTOI4T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4T, 8, 0): // FDTOI4T dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint32 = floor(FDPARAM1);
else
*inst[0].pint32 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4R, 8, 0): // FDTOI4R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4R, 8, 0): // FDTOI4R dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint32 = floor(FDPARAM1 + 0.5);
else
*inst[0].pint32 = ceil(FDPARAM1 - 0.5);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4F, 8, 0): // FDTOI4F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4F, 8, 0): // FDTOI4F dst,src1
*inst[0].pint32 = floor(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4C, 8, 0): // FDTOI4C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4C, 8, 0): // FDTOI4C dst,src1
*inst[0].pint32 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI4, 8, 0): // FDTOI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI4, 8, 0): // FDTOI4 dst,src1
*inst[0].pint32 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8T, 8, 0): // FDTOI8T dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8T, 8, 0): // FDTOI8T dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint64 = floor(FDPARAM1);
else
*inst[0].pint64 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8R, 8, 0): // FDTOI8R dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8R, 8, 0): // FDTOI8R dst,src1
if (FDPARAM1 >= 0)
*inst[0].pint64 = floor(FDPARAM1 + 0.5);
else
*inst[0].pint64 = ceil(FDPARAM1 - 0.5);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8F, 8, 0): // FDTOI8F dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8F, 8, 0): // FDTOI8F dst,src1
*inst[0].pint64 = floor(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8C, 8, 0): // FDTOI8C dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8C, 8, 0): // FDTOI8C dst,src1
*inst[0].pint64 = ceil(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FTOI8, 8, 0): // FDTOI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FTOI8, 8, 0): // FDTOI8 dst,src1
*inst[0].pint64 = FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI4, 8, 0): // FDFRI4 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI4, 8, 0): // FDFRI4 dst,src1
FDPARAM0 = *inst[1].pint32;
break;
- case MAKE_OPCODE_SHORT(OP_FFRI8, 8, 0): // FDFRI8 dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRI8, 8, 0): // FDFRI8 dst,src1
FDPARAM0 = *inst[1].pint64;
break;
- case MAKE_OPCODE_SHORT(OP_FFRFS, 8, 0): // FDFRFS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FFRFS, 8, 0): // FDFRFS dst,src1
FDPARAM0 = FSPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FRNDS, 8, 0): // FDRNDS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRNDS, 8, 0): // FDRNDS dst,src1
FDPARAM0 = (float)FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FADD, 8, 0): // FDADD dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FADD, 8, 0): // FDADD dst,src1,src2
FDPARAM0 = FDPARAM1 + FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FSUB, 8, 0): // FDSUB dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FSUB, 8, 0): // FDSUB dst,src1,src2
FDPARAM0 = FDPARAM1 - FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FCMP, 8, 1): // FDCMP src1,src2
+ case MAKE_OPCODE_SHORT(OP_FCMP, 8, 1): // FDCMP src1,src2
if (isnan(FDPARAM0) || isnan(FDPARAM1))
flags = FLAG_U;
else
flags = (FDPARAM0 < FDPARAM1) | ((FDPARAM0 == FDPARAM1) << 2);
break;
- case MAKE_OPCODE_SHORT(OP_FMUL, 8, 0): // FDMUL dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FMUL, 8, 0): // FDMUL dst,src1,src2
FDPARAM0 = FDPARAM1 * FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FDIV, 8, 0): // FDDIV dst,src1,src2
+ case MAKE_OPCODE_SHORT(OP_FDIV, 8, 0): // FDDIV dst,src1,src2
FDPARAM0 = FDPARAM1 / FDPARAM2;
break;
- case MAKE_OPCODE_SHORT(OP_FNEG, 8, 0): // FDNEG dst,src1
+ case MAKE_OPCODE_SHORT(OP_FNEG, 8, 0): // FDNEG dst,src1
FDPARAM0 = -FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FABS, 8, 0): // FDABS dst,src1
+ case MAKE_OPCODE_SHORT(OP_FABS, 8, 0): // FDABS dst,src1
FDPARAM0 = fabs(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FSQRT, 8, 0): // FDSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FSQRT, 8, 0): // FDSQRT dst,src1
FDPARAM0 = sqrt(FDPARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_FRECIP, 8, 0): // FDRECIP dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRECIP, 8, 0): // FDRECIP dst,src1
FDPARAM0 = 1.0 / FDPARAM1;
break;
- case MAKE_OPCODE_SHORT(OP_FRSQRT, 8, 0): // FDRSQRT dst,src1
+ case MAKE_OPCODE_SHORT(OP_FRSQRT, 8, 0): // FDRSQRT dst,src1
FDPARAM0 = 1.0 / sqrt(FDPARAM1);
break;
diff --git a/src/emu/cpu/drcbec.h b/src/emu/cpu/drcbec.h
index ada16d7f055..f5bf7309ef8 100644
--- a/src/emu/cpu/drcbec.h
+++ b/src/emu/cpu/drcbec.h
@@ -75,13 +75,13 @@ private:
int dmuls(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2, int flags);
// internal state
- drc_hash_table m_hash; // hash table state
- drc_map_variables m_map; // code map
- drc_label_list m_labels; // label list
- drc_label_fixup_delegate m_fixup_delegate; // precomputed delegate
+ drc_hash_table m_hash; // hash table state
+ drc_map_variables m_map; // code map
+ drc_label_list m_labels; // label list
+ drc_label_fixup_delegate m_fixup_delegate; // precomputed delegate
- static const UINT32 s_condition_map[32];
- static UINT64 s_immediate_zero;
+ static const UINT32 s_condition_map[32];
+ static UINT64 s_immediate_zero;
};
diff --git a/src/emu/cpu/drcbeut.c b/src/emu/cpu/drcbeut.c
index 9d656fc77a1..0b3824a0280 100644
--- a/src/emu/cpu/drcbeut.c
+++ b/src/emu/cpu/drcbeut.c
@@ -47,7 +47,7 @@ using namespace uml;
// DEBUGGING
//**************************************************************************
-#define LOG_RECOVER (0)
+#define LOG_RECOVER (0)
@@ -61,17 +61,17 @@ using namespace uml;
drc_hash_table::drc_hash_table(drc_cache &cache, UINT32 modes, UINT8 addrbits, UINT8 ignorebits)
: m_cache(cache),
- m_modes(modes),
- m_nocodeptr(NULL),
- m_l1bits((addrbits - ignorebits) / 2),
- m_l2bits((addrbits - ignorebits) - m_l1bits),
- m_l1shift(ignorebits + m_l2bits),
- m_l2shift(ignorebits),
- m_l1mask((1 << m_l1bits) - 1),
- m_l2mask((1 << m_l2bits) - 1),
- m_base(reinterpret_cast<drccodeptr ***>(cache.alloc(modes * sizeof(**m_base)))),
- m_emptyl1(NULL),
- m_emptyl2(NULL)
+ m_modes(modes),
+ m_nocodeptr(NULL),
+ m_l1bits((addrbits - ignorebits) / 2),
+ m_l2bits((addrbits - ignorebits) - m_l1bits),
+ m_l1shift(ignorebits + m_l2bits),
+ m_l2shift(ignorebits),
+ m_l1mask((1 << m_l1bits) - 1),
+ m_l2mask((1 << m_l2bits) - 1),
+ m_base(reinterpret_cast<drccodeptr ***>(cache.alloc(modes * sizeof(**m_base)))),
+ m_emptyl1(NULL),
+ m_emptyl2(NULL)
{
reset();
}
@@ -228,7 +228,7 @@ bool drc_hash_table::set_codeptr(UINT32 mode, UINT32 pc, drccodeptr code)
drc_map_variables::drc_map_variables(drc_cache &cache, UINT64 uniquevalue)
: m_cache(cache),
- m_uniquevalue(uniquevalue)
+ m_uniquevalue(uniquevalue)
{
memset(m_mapvalue, 0, sizeof(m_mapvalue));
}
@@ -464,7 +464,7 @@ UINT32 drc_map_variables::get_last_value(UINT32 mapvar)
drc_label_list::drc_label_list(drc_cache &cache)
: m_cache(cache),
- m_oob_callback_delegate(FUNC(drc_label_list::oob_callback), this)
+ m_oob_callback_delegate(FUNC(drc_label_list::oob_callback), this)
{
}
diff --git a/src/emu/cpu/drcbeut.h b/src/emu/cpu/drcbeut.h
index 83710ff82b3..7525f60b27f 100644
--- a/src/emu/cpu/drcbeut.h
+++ b/src/emu/cpu/drcbeut.h
@@ -83,21 +83,21 @@ public:
private:
// internal state
- drc_cache & m_cache; // cache where allocations come from
- UINT32 m_modes; // number of modes supported
+ drc_cache & m_cache; // cache where allocations come from
+ UINT32 m_modes; // number of modes supported
- drccodeptr m_nocodeptr; // pointer to code which will handle missing entries
+ drccodeptr m_nocodeptr; // pointer to code which will handle missing entries
- UINT8 m_l1bits; // bits worth of entries in l1 hash tables
- UINT8 m_l2bits; // bits worth of entries in l2 hash tables
- UINT8 m_l1shift; // shift to apply to the PC to get the l1 hash entry
- UINT8 m_l2shift; // shift to apply to the PC to get the l2 hash entry
- offs_t m_l1mask; // mask to apply after shifting
- offs_t m_l2mask; // mask to apply after shifting
+ UINT8 m_l1bits; // bits worth of entries in l1 hash tables
+ UINT8 m_l2bits; // bits worth of entries in l2 hash tables
+ UINT8 m_l1shift; // shift to apply to the PC to get the l1 hash entry
+ UINT8 m_l2shift; // shift to apply to the PC to get the l2 hash entry
+ offs_t m_l1mask; // mask to apply after shifting
+ offs_t m_l2mask; // mask to apply after shifting
- drccodeptr *** m_base; // pointer to the l1 table for each mode
- drccodeptr ** m_emptyl1; // pointer to empty l1 hash table
- drccodeptr * m_emptyl2; // pointer to empty l2 hash table
+ drccodeptr *** m_base; // pointer to the l1 table for each mode
+ drccodeptr ** m_emptyl1; // pointer to empty l1 hash table
+ drccodeptr * m_emptyl2; // pointer to empty l2 hash table
};
@@ -125,20 +125,20 @@ public:
private:
// internal state
- drc_cache & m_cache; // pointer to the cache
- UINT64 m_uniquevalue; // unique value used to find the table
- UINT32 m_mapvalue[uml::MAPVAR_END - uml::MAPVAR_M0]; // array of current values
+ drc_cache & m_cache; // pointer to the cache
+ UINT64 m_uniquevalue; // unique value used to find the table
+ UINT32 m_mapvalue[uml::MAPVAR_END - uml::MAPVAR_M0]; // array of current values
// list of entries
struct map_entry
{
map_entry *next() const { return m_next; }
- map_entry * m_next; // pointer to next map entry
- drccodeptr m_codeptr; // pointer to the relevant code
- UINT32 m_mapvar; // map variable id
- UINT32 m_newval; // value of the variable starting at codeptr
+ map_entry * m_next; // pointer to next map entry
+ drccodeptr m_codeptr; // pointer to the relevant code
+ UINT32 m_mapvar; // map variable id
+ UINT32 m_newval; // value of the variable starting at codeptr
};
- simple_list<map_entry> m_entry_list; // list of entries
+ simple_list<map_entry> m_entry_list; // list of entries
};
@@ -166,16 +166,16 @@ private:
struct label_entry
{
label_entry *next() const { return m_next; }
- label_entry * m_next; // pointer to next label
- uml::code_label m_label; // the label specified
- drccodeptr m_codeptr; // pointer to the relevant code
+ label_entry * m_next; // pointer to next label
+ uml::code_label m_label; // the label specified
+ drccodeptr m_codeptr; // pointer to the relevant code
};
struct label_fixup
{
label_fixup *next() const { return m_next; }
- label_fixup * m_next; // pointer to the next oob
- label_entry * m_label; // the label in question
+ label_fixup * m_next; // pointer to the next oob
+ label_entry * m_label; // the label in question
drc_label_fixup_delegate m_callback; // callback
};
@@ -185,10 +185,10 @@ private:
void oob_callback(drccodeptr *codeptr, void *param1, void *param2);
// internal state
- drc_cache & m_cache; // pointer to the cache
- simple_list<label_entry> m_list; // head of the live list
- simple_list<label_fixup> m_fixup_list; // list of pending oob fixups
- drc_oob_delegate m_oob_callback_delegate; // pre-computed delegate
+ drc_cache & m_cache; // pointer to the cache
+ simple_list<label_entry> m_list; // head of the live list
+ simple_list<label_fixup> m_fixup_list; // list of pending oob fixups
+ drc_oob_delegate m_oob_callback_delegate; // pre-computed delegate
};
diff --git a/src/emu/cpu/drcbex64.c b/src/emu/cpu/drcbex64.c
index 1ec54a30d4c..bc20a787bd6 100644
--- a/src/emu/cpu/drcbex64.c
+++ b/src/emu/cpu/drcbex64.c
@@ -209,12 +209,12 @@ using namespace x64emit;
// DEBUGGING
//**************************************************************************
-#define LOG_HASHJMPS (0)
+#define LOG_HASHJMPS (0)
-#define USE_RCPSS_FOR_SINGLES (0)
-#define USE_RSQRTSS_FOR_SINGLES (0)
-#define USE_RCPSS_FOR_DOUBLES (0)
-#define USE_RSQRTSS_FOR_DOUBLES (0)
+#define USE_RCPSS_FOR_SINGLES (0)
+#define USE_RSQRTSS_FOR_SINGLES (0)
+#define USE_RCPSS_FOR_DOUBLES (0)
+#define USE_RSQRTSS_FOR_DOUBLES (0)
@@ -222,29 +222,29 @@ using namespace x64emit;
// CONSTANTS
//**************************************************************************
-const UINT32 PTYPE_M = 1 << parameter::PTYPE_MEMORY;
-const UINT32 PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
-const UINT32 PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
-const UINT32 PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
-const UINT32 PTYPE_MI = PTYPE_M | PTYPE_I;
-const UINT32 PTYPE_RI = PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MR = PTYPE_M | PTYPE_R;
-const UINT32 PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
+const UINT32 PTYPE_M = 1 << parameter::PTYPE_MEMORY;
+const UINT32 PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
+const UINT32 PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
+const UINT32 PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
+const UINT32 PTYPE_MI = PTYPE_M | PTYPE_I;
+const UINT32 PTYPE_RI = PTYPE_R | PTYPE_I;
+const UINT32 PTYPE_MR = PTYPE_M | PTYPE_R;
+const UINT32 PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
+const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
#ifdef X64_WINDOWS_ABI
-const int REG_PARAM1 = REG_RCX;
-const int REG_PARAM2 = REG_RDX;
-const int REG_PARAM3 = REG_R8;
-const int REG_PARAM4 = REG_R9;
+const int REG_PARAM1 = REG_RCX;
+const int REG_PARAM2 = REG_RDX;
+const int REG_PARAM3 = REG_R8;
+const int REG_PARAM4 = REG_R9;
#else
-const int REG_PARAM1 = REG_RDI;
-const int REG_PARAM2 = REG_RSI;
-const int REG_PARAM3 = REG_RDX;
-const int REG_PARAM4 = REG_RCX;
+const int REG_PARAM1 = REG_RDI;
+const int REG_PARAM2 = REG_RSI;
+const int REG_PARAM3 = REG_RDX;
+const int REG_PARAM4 = REG_RCX;
#endif
@@ -254,18 +254,18 @@ const int REG_PARAM4 = REG_RCX;
// MACROS
//**************************************************************************
-#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
-#define X86_NOT_CONDITION(condition) (condition_map[condition - uml::COND_Z] ^ 1)
+#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
+#define X86_NOT_CONDITION(condition) (condition_map[condition - uml::COND_Z] ^ 1)
inline x86_memref drcbe_x64::MABS(const void *ptr)
{
return MBD(REG_BP, offset_from_rbp(ptr));
}
-#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
-#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
-#define assert_no_flags(inst) assert((inst).flags() == 0)
-#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
+#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
+#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
+#define assert_no_flags(inst) assert((inst).flags() == 0)
+#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
@@ -296,31 +296,31 @@ static UINT8 float_register_map[REG_F_COUNT] =
// condition mapping table
static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] =
{
- x64emit::COND_Z, // COND_Z = 0x80, requires Z
- x64emit::COND_NZ, // COND_NZ, requires Z
- x64emit::COND_S, // COND_S, requires S
- x64emit::COND_NS, // COND_NS, requires S
- x64emit::COND_C, // COND_C, requires C
- x64emit::COND_NC, // COND_NC, requires C
- x64emit::COND_O, // COND_V, requires V
- x64emit::COND_NO, // COND_NV, requires V
- x64emit::COND_P, // COND_U, requires U
- x64emit::COND_NP, // COND_NU, requires U
- x64emit::COND_A, // COND_A, requires CZ
- x64emit::COND_BE, // COND_BE, requires CZ
- x64emit::COND_G, // COND_G, requires SVZ
- x64emit::COND_LE, // COND_LE, requires SVZ
- x64emit::COND_L, // COND_L, requires SV
- x64emit::COND_GE, // COND_GE, requires SV
+ x64emit::COND_Z, // COND_Z = 0x80, requires Z
+ x64emit::COND_NZ, // COND_NZ, requires Z
+ x64emit::COND_S, // COND_S, requires S
+ x64emit::COND_NS, // COND_NS, requires S
+ x64emit::COND_C, // COND_C, requires C
+ x64emit::COND_NC, // COND_NC, requires C
+ x64emit::COND_O, // COND_V, requires V
+ x64emit::COND_NO, // COND_NV, requires V
+ x64emit::COND_P, // COND_U, requires U
+ x64emit::COND_NP, // COND_NU, requires U
+ x64emit::COND_A, // COND_A, requires CZ
+ x64emit::COND_BE, // COND_BE, requires CZ
+ x64emit::COND_G, // COND_G, requires SVZ
+ x64emit::COND_LE, // COND_LE, requires SVZ
+ x64emit::COND_L, // COND_L, requires SV
+ x64emit::COND_GE, // COND_GE, requires SV
};
// rounding mode mapping table
static const UINT8 fprnd_map[4] =
{
- FPRND_CHOP, // ROUND_TRUNC, truncate
- FPRND_NEAR, // ROUND_ROUND, round
- FPRND_UP, // ROUND_CEIL, round up
- FPRND_DOWN // ROUND_FLOOR round down
+ FPRND_CHOP, // ROUND_TRUNC, truncate
+ FPRND_NEAR, // ROUND_ROUND, round
+ FPRND_UP, // ROUND_CEIL, round up
+ FPRND_DOWN // ROUND_FLOOR round down
};
@@ -332,89 +332,89 @@ static const UINT8 fprnd_map[4] =
const drcbe_x64::opcode_table_entry drcbe_x64::s_opcode_table_source[] =
{
// Compile-time opcodes
- { uml::OP_HANDLE, &drcbe_x64::op_handle }, // HANDLE handle
- { uml::OP_HASH, &drcbe_x64::op_hash }, // HASH mode,pc
- { uml::OP_LABEL, &drcbe_x64::op_label }, // LABEL imm
- { uml::OP_COMMENT, &drcbe_x64::op_comment }, // COMMENT string
- { uml::OP_MAPVAR, &drcbe_x64::op_mapvar }, // MAPVAR mapvar,value
+ { uml::OP_HANDLE, &drcbe_x64::op_handle }, // HANDLE handle
+ { uml::OP_HASH, &drcbe_x64::op_hash }, // HASH mode,pc
+ { uml::OP_LABEL, &drcbe_x64::op_label }, // LABEL imm
+ { uml::OP_COMMENT, &drcbe_x64::op_comment }, // COMMENT string
+ { uml::OP_MAPVAR, &drcbe_x64::op_mapvar }, // MAPVAR mapvar,value
// Control Flow Operations
- { uml::OP_NOP, &drcbe_x64::op_nop }, // NOP
- { uml::OP_DEBUG, &drcbe_x64::op_debug }, // DEBUG pc
- { uml::OP_EXIT, &drcbe_x64::op_exit }, // EXIT src1[,c]
- { uml::OP_HASHJMP, &drcbe_x64::op_hashjmp }, // HASHJMP mode,pc,handle
- { uml::OP_JMP, &drcbe_x64::op_jmp }, // JMP imm[,c]
- { uml::OP_EXH, &drcbe_x64::op_exh }, // EXH handle,param[,c]
- { uml::OP_CALLH, &drcbe_x64::op_callh }, // CALLH handle[,c]
- { uml::OP_RET, &drcbe_x64::op_ret }, // RET [c]
- { uml::OP_CALLC, &drcbe_x64::op_callc }, // CALLC func,ptr[,c]
- { uml::OP_RECOVER, &drcbe_x64::op_recover }, // RECOVER dst,mapvar
+ { uml::OP_NOP, &drcbe_x64::op_nop }, // NOP
+ { uml::OP_DEBUG, &drcbe_x64::op_debug }, // DEBUG pc
+ { uml::OP_EXIT, &drcbe_x64::op_exit }, // EXIT src1[,c]
+ { uml::OP_HASHJMP, &drcbe_x64::op_hashjmp }, // HASHJMP mode,pc,handle
+ { uml::OP_JMP, &drcbe_x64::op_jmp }, // JMP imm[,c]
+ { uml::OP_EXH, &drcbe_x64::op_exh }, // EXH handle,param[,c]
+ { uml::OP_CALLH, &drcbe_x64::op_callh }, // CALLH handle[,c]
+ { uml::OP_RET, &drcbe_x64::op_ret }, // RET [c]
+ { uml::OP_CALLC, &drcbe_x64::op_callc }, // CALLC func,ptr[,c]
+ { uml::OP_RECOVER, &drcbe_x64::op_recover }, // RECOVER dst,mapvar
// Internal Register Operations
- { uml::OP_SETFMOD, &drcbe_x64::op_setfmod }, // SETFMOD src
- { uml::OP_GETFMOD, &drcbe_x64::op_getfmod }, // GETFMOD dst
- { uml::OP_GETEXP, &drcbe_x64::op_getexp }, // GETEXP dst
- { uml::OP_GETFLGS, &drcbe_x64::op_getflgs }, // GETFLGS dst[,f]
- { uml::OP_SAVE, &drcbe_x64::op_save }, // SAVE dst
- { uml::OP_RESTORE, &drcbe_x64::op_restore }, // RESTORE dst
+ { uml::OP_SETFMOD, &drcbe_x64::op_setfmod }, // SETFMOD src
+ { uml::OP_GETFMOD, &drcbe_x64::op_getfmod }, // GETFMOD dst
+ { uml::OP_GETEXP, &drcbe_x64::op_getexp }, // GETEXP dst
+ { uml::OP_GETFLGS, &drcbe_x64::op_getflgs }, // GETFLGS dst[,f]
+ { uml::OP_SAVE, &drcbe_x64::op_save }, // SAVE dst
+ { uml::OP_RESTORE, &drcbe_x64::op_restore }, // RESTORE dst
// Integer Operations
- { uml::OP_LOAD, &drcbe_x64::op_load }, // LOAD dst,base,index,size
- { uml::OP_LOADS, &drcbe_x64::op_loads }, // LOADS dst,base,index,size
- { uml::OP_STORE, &drcbe_x64::op_store }, // STORE base,index,src,size
- { uml::OP_READ, &drcbe_x64::op_read }, // READ dst,src1,spacesize
- { uml::OP_READM, &drcbe_x64::op_readm }, // READM dst,src1,mask,spacesize
- { uml::OP_WRITE, &drcbe_x64::op_write }, // WRITE dst,src1,spacesize
- { uml::OP_WRITEM, &drcbe_x64::op_writem }, // WRITEM dst,src1,spacesize
- { uml::OP_CARRY, &drcbe_x64::op_carry }, // CARRY src,bitnum
- { uml::OP_SET, &drcbe_x64::op_set }, // SET dst,c
- { uml::OP_MOV, &drcbe_x64::op_mov }, // MOV dst,src[,c]
- { uml::OP_SEXT, &drcbe_x64::op_sext }, // SEXT dst,src
- { uml::OP_ROLAND, &drcbe_x64::op_roland }, // ROLAND dst,src1,src2,src3
- { uml::OP_ROLINS, &drcbe_x64::op_rolins }, // ROLINS dst,src1,src2,src3
- { uml::OP_ADD, &drcbe_x64::op_add }, // ADD dst,src1,src2[,f]
- { uml::OP_ADDC, &drcbe_x64::op_addc }, // ADDC dst,src1,src2[,f]
- { uml::OP_SUB, &drcbe_x64::op_sub }, // SUB dst,src1,src2[,f]
- { uml::OP_SUBB, &drcbe_x64::op_subc }, // SUBB dst,src1,src2[,f]
- { uml::OP_CMP, &drcbe_x64::op_cmp }, // CMP src1,src2[,f]
- { uml::OP_MULU, &drcbe_x64::op_mulu }, // MULU dst,edst,src1,src2[,f]
- { uml::OP_MULS, &drcbe_x64::op_muls }, // MULS dst,edst,src1,src2[,f]
- { uml::OP_DIVU, &drcbe_x64::op_divu }, // DIVU dst,edst,src1,src2[,f]
- { uml::OP_DIVS, &drcbe_x64::op_divs }, // DIVS dst,edst,src1,src2[,f]
- { uml::OP_AND, &drcbe_x64::op_and }, // AND dst,src1,src2[,f]
- { uml::OP_TEST, &drcbe_x64::op_test }, // TEST src1,src2[,f]
- { uml::OP_OR, &drcbe_x64::op_or }, // OR dst,src1,src2[,f]
- { uml::OP_XOR, &drcbe_x64::op_xor }, // XOR dst,src1,src2[,f]
- { uml::OP_LZCNT, &drcbe_x64::op_lzcnt }, // LZCNT dst,src[,f]
- { uml::OP_BSWAP, &drcbe_x64::op_bswap }, // BSWAP dst,src
- { uml::OP_SHL, &drcbe_x64::op_shl }, // SHL dst,src,count[,f]
- { uml::OP_SHR, &drcbe_x64::op_shr }, // SHR dst,src,count[,f]
- { uml::OP_SAR, &drcbe_x64::op_sar }, // SAR dst,src,count[,f]
- { uml::OP_ROL, &drcbe_x64::op_rol }, // ROL dst,src,count[,f]
- { uml::OP_ROLC, &drcbe_x64::op_rolc }, // ROLC dst,src,count[,f]
- { uml::OP_ROR, &drcbe_x64::op_ror }, // ROR dst,src,count[,f]
- { uml::OP_RORC, &drcbe_x64::op_rorc }, // RORC dst,src,count[,f]
+ { uml::OP_LOAD, &drcbe_x64::op_load }, // LOAD dst,base,index,size
+ { uml::OP_LOADS, &drcbe_x64::op_loads }, // LOADS dst,base,index,size
+ { uml::OP_STORE, &drcbe_x64::op_store }, // STORE base,index,src,size
+ { uml::OP_READ, &drcbe_x64::op_read }, // READ dst,src1,spacesize
+ { uml::OP_READM, &drcbe_x64::op_readm }, // READM dst,src1,mask,spacesize
+ { uml::OP_WRITE, &drcbe_x64::op_write }, // WRITE dst,src1,spacesize
+ { uml::OP_WRITEM, &drcbe_x64::op_writem }, // WRITEM dst,src1,spacesize
+ { uml::OP_CARRY, &drcbe_x64::op_carry }, // CARRY src,bitnum
+ { uml::OP_SET, &drcbe_x64::op_set }, // SET dst,c
+ { uml::OP_MOV, &drcbe_x64::op_mov }, // MOV dst,src[,c]
+ { uml::OP_SEXT, &drcbe_x64::op_sext }, // SEXT dst,src
+ { uml::OP_ROLAND, &drcbe_x64::op_roland }, // ROLAND dst,src1,src2,src3
+ { uml::OP_ROLINS, &drcbe_x64::op_rolins }, // ROLINS dst,src1,src2,src3
+ { uml::OP_ADD, &drcbe_x64::op_add }, // ADD dst,src1,src2[,f]
+ { uml::OP_ADDC, &drcbe_x64::op_addc }, // ADDC dst,src1,src2[,f]
+ { uml::OP_SUB, &drcbe_x64::op_sub }, // SUB dst,src1,src2[,f]
+ { uml::OP_SUBB, &drcbe_x64::op_subc }, // SUBB dst,src1,src2[,f]
+ { uml::OP_CMP, &drcbe_x64::op_cmp }, // CMP src1,src2[,f]
+ { uml::OP_MULU, &drcbe_x64::op_mulu }, // MULU dst,edst,src1,src2[,f]
+ { uml::OP_MULS, &drcbe_x64::op_muls }, // MULS dst,edst,src1,src2[,f]
+ { uml::OP_DIVU, &drcbe_x64::op_divu }, // DIVU dst,edst,src1,src2[,f]
+ { uml::OP_DIVS, &drcbe_x64::op_divs }, // DIVS dst,edst,src1,src2[,f]
+ { uml::OP_AND, &drcbe_x64::op_and }, // AND dst,src1,src2[,f]
+ { uml::OP_TEST, &drcbe_x64::op_test }, // TEST src1,src2[,f]
+ { uml::OP_OR, &drcbe_x64::op_or }, // OR dst,src1,src2[,f]
+ { uml::OP_XOR, &drcbe_x64::op_xor }, // XOR dst,src1,src2[,f]
+ { uml::OP_LZCNT, &drcbe_x64::op_lzcnt }, // LZCNT dst,src[,f]
+ { uml::OP_BSWAP, &drcbe_x64::op_bswap }, // BSWAP dst,src
+ { uml::OP_SHL, &drcbe_x64::op_shl }, // SHL dst,src,count[,f]
+ { uml::OP_SHR, &drcbe_x64::op_shr }, // SHR dst,src,count[,f]
+ { uml::OP_SAR, &drcbe_x64::op_sar }, // SAR dst,src,count[,f]
+ { uml::OP_ROL, &drcbe_x64::op_rol }, // ROL dst,src,count[,f]
+ { uml::OP_ROLC, &drcbe_x64::op_rolc }, // ROLC dst,src,count[,f]
+ { uml::OP_ROR, &drcbe_x64::op_ror }, // ROR dst,src,count[,f]
+ { uml::OP_RORC, &drcbe_x64::op_rorc }, // RORC dst,src,count[,f]
// Floating Point Operations
- { uml::OP_FLOAD, &drcbe_x64::op_fload }, // FLOAD dst,base,index
- { uml::OP_FSTORE, &drcbe_x64::op_fstore }, // FSTORE base,index,src
- { uml::OP_FREAD, &drcbe_x64::op_fread }, // FREAD dst,space,src1
- { uml::OP_FWRITE, &drcbe_x64::op_fwrite }, // FWRITE space,dst,src1
- { uml::OP_FMOV, &drcbe_x64::op_fmov }, // FMOV dst,src1[,c]
- { uml::OP_FTOINT, &drcbe_x64::op_ftoint }, // FTOINT dst,src1,size,round
- { uml::OP_FFRINT, &drcbe_x64::op_ffrint }, // FFRINT dst,src1,size
- { uml::OP_FFRFLT, &drcbe_x64::op_ffrflt }, // FFRFLT dst,src1,size
- { uml::OP_FRNDS, &drcbe_x64::op_frnds }, // FRNDS dst,src1
- { uml::OP_FADD, &drcbe_x64::op_fadd }, // FADD dst,src1,src2
- { uml::OP_FSUB, &drcbe_x64::op_fsub }, // FSUB dst,src1,src2
- { uml::OP_FCMP, &drcbe_x64::op_fcmp }, // FCMP src1,src2
- { uml::OP_FMUL, &drcbe_x64::op_fmul }, // FMUL dst,src1,src2
- { uml::OP_FDIV, &drcbe_x64::op_fdiv }, // FDIV dst,src1,src2
- { uml::OP_FNEG, &drcbe_x64::op_fneg }, // FNEG dst,src1
- { uml::OP_FABS, &drcbe_x64::op_fabs }, // FABS dst,src1
- { uml::OP_FSQRT, &drcbe_x64::op_fsqrt }, // FSQRT dst,src1
- { uml::OP_FRECIP, &drcbe_x64::op_frecip }, // FRECIP dst,src1
- { uml::OP_FRSQRT, &drcbe_x64::op_frsqrt } // FRSQRT dst,src1
+ { uml::OP_FLOAD, &drcbe_x64::op_fload }, // FLOAD dst,base,index
+ { uml::OP_FSTORE, &drcbe_x64::op_fstore }, // FSTORE base,index,src
+ { uml::OP_FREAD, &drcbe_x64::op_fread }, // FREAD dst,space,src1
+ { uml::OP_FWRITE, &drcbe_x64::op_fwrite }, // FWRITE space,dst,src1
+ { uml::OP_FMOV, &drcbe_x64::op_fmov }, // FMOV dst,src1[,c]
+ { uml::OP_FTOINT, &drcbe_x64::op_ftoint }, // FTOINT dst,src1,size,round
+ { uml::OP_FFRINT, &drcbe_x64::op_ffrint }, // FFRINT dst,src1,size
+ { uml::OP_FFRFLT, &drcbe_x64::op_ffrflt }, // FFRFLT dst,src1,size
+ { uml::OP_FRNDS, &drcbe_x64::op_frnds }, // FRNDS dst,src1
+ { uml::OP_FADD, &drcbe_x64::op_fadd }, // FADD dst,src1,src2
+ { uml::OP_FSUB, &drcbe_x64::op_fsub }, // FSUB dst,src1,src2
+ { uml::OP_FCMP, &drcbe_x64::op_fcmp }, // FCMP src1,src2
+ { uml::OP_FMUL, &drcbe_x64::op_fmul }, // FMUL dst,src1,src2
+ { uml::OP_FDIV, &drcbe_x64::op_fdiv }, // FDIV dst,src1,src2
+ { uml::OP_FNEG, &drcbe_x64::op_fneg }, // FNEG dst,src1
+ { uml::OP_FABS, &drcbe_x64::op_fabs }, // FABS dst,src1
+ { uml::OP_FSQRT, &drcbe_x64::op_fsqrt }, // FSQRT dst,src1
+ { uml::OP_FRECIP, &drcbe_x64::op_frecip }, // FRECIP dst,src1
+ { uml::OP_FRSQRT, &drcbe_x64::op_frsqrt } // FRSQRT dst,src1
};
@@ -560,7 +560,7 @@ inline int drcbe_x64::get_base_register_and_offset(x86code *&dst, void *target,
else
{
offset = 0;
- emit_mov_r64_imm(dst, reg, (FPTR)target); // mov reg,target
+ emit_mov_r64_imm(dst, reg, (FPTR)target); // mov reg,target
return reg;
}
}
@@ -575,11 +575,11 @@ inline void drcbe_x64::emit_smart_call_r64(x86code *&dst, x86code *target, UINT8
{
INT64 delta = target - (dst + 5);
if (short_immediate(delta))
- emit_call(dst, target); // call target
+ emit_call(dst, target); // call target
else
{
- emit_mov_r64_imm(dst, reg, (FPTR)target); // mov reg,target
- emit_call_r64(dst, reg); // call reg
+ emit_mov_r64_imm(dst, reg, (FPTR)target); // mov reg,target
+ emit_call_r64(dst, reg); // call reg
}
}
@@ -593,9 +593,9 @@ inline void drcbe_x64::emit_smart_call_m64(x86code *&dst, x86code **target)
{
INT64 delta = *target - (dst + 5);
if (short_immediate(delta))
- emit_call(dst, *target); // call *target
+ emit_call(dst, *target); // call *target
else
- emit_call_m64(dst, MABS(target)); // call [target]
+ emit_call_m64(dst, MABS(target)); // call [target]
}
@@ -610,28 +610,28 @@ inline void drcbe_x64::emit_smart_call_m64(x86code *&dst, x86code **target)
drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
: drcbe_interface(drcuml, cache, device),
- m_hash(cache, modes, addrbits, ignorebits),
- m_map(cache, 0),
- m_labels(cache),
- m_log(NULL),
- m_sse41(false),
- m_absmask32((UINT32 *)cache.alloc_near(16*2 + 15)),
- m_absmask64(NULL),
- m_rbpvalue(cache.near() + 0x80),
- m_entry(NULL),
- m_exit(NULL),
- m_nocode(NULL),
- m_fixup_label(FUNC(drcbe_x64::fixup_label), this),
- m_fixup_exception(FUNC(drcbe_x64::fixup_exception), this),
- m_near(*(near_state *)cache.alloc_near(sizeof(m_near)))
+ m_hash(cache, modes, addrbits, ignorebits),
+ m_map(cache, 0),
+ m_labels(cache),
+ m_log(NULL),
+ m_sse41(false),
+ m_absmask32((UINT32 *)cache.alloc_near(16*2 + 15)),
+ m_absmask64(NULL),
+ m_rbpvalue(cache.near() + 0x80),
+ m_entry(NULL),
+ m_exit(NULL),
+ m_nocode(NULL),
+ m_fixup_label(FUNC(drcbe_x64::fixup_label), this),
+ m_fixup_exception(FUNC(drcbe_x64::fixup_exception), this),
+ m_near(*(near_state *)cache.alloc_near(sizeof(m_near)))
{
// build up necessary arrays
static const UINT32 sse_control[4] =
{
- 0xffc0, // ROUND_TRUNC
- 0x9fc0, // ROUND_ROUND
- 0xdfc0, // ROUND_CEIL
- 0xbfc0 // ROUND_FLOOR
+ 0xffc0, // ROUND_TRUNC
+ 0x9fc0, // ROUND_ROUND
+ 0xdfc0, // ROUND_CEIL
+ 0xbfc0 // ROUND_FLOOR
};
memcpy(m_near.ssecontrol, sse_control, sizeof(m_near.ssecontrol));
m_near.single1 = 1.0f;
@@ -715,56 +715,56 @@ void drcbe_x64::reset()
// generate a simple CPUID stub
UINT32 (*cpuid_ecx_stub)(void) = (UINT32 (*)(void))dst;
- emit_push_r64(dst, REG_RBX); // push rbx
- emit_mov_r32_imm(dst, REG_EAX, 1); // mov eax,1
- emit_cpuid(dst); // cpuid
- emit_mov_r32_r32(dst, REG_EAX, REG_ECX); // mov eax,ecx
- emit_pop_r64(dst, REG_RBX); // pop rbx
- emit_ret(dst); // ret
+ emit_push_r64(dst, REG_RBX); // push rbx
+ emit_mov_r32_imm(dst, REG_EAX, 1); // mov eax,1
+ emit_cpuid(dst); // cpuid
+ emit_mov_r32_r32(dst, REG_EAX, REG_ECX); // mov eax,ecx
+ emit_pop_r64(dst, REG_RBX); // pop rbx
+ emit_ret(dst); // ret
// call it to determine if we have SSE4.1 support
m_sse41 = (((*cpuid_ecx_stub)() & 0x80000) != 0);
// generate an entry point
m_entry = (x86_entry_point_func)dst;
- emit_push_r64(dst, REG_RBX); // push rbx
- emit_push_r64(dst, REG_RSI); // push rsi
- emit_push_r64(dst, REG_RDI); // push rdi
- emit_push_r64(dst, REG_RBP); // push rbp
- emit_push_r64(dst, REG_R12); // push r12
- emit_push_r64(dst, REG_R13); // push r13
- emit_push_r64(dst, REG_R14); // push r14
- emit_push_r64(dst, REG_R15); // push r15
- emit_mov_r64_r64(dst, REG_RBP, REG_PARAM1); // mov rbp,param1
- emit_sub_r64_imm(dst, REG_RSP, 32); // sub rsp,32
- emit_mov_m64_r64(dst, MABS(&m_near.hashstacksave), REG_RSP); // mov [hashstacksave],rsp
- emit_sub_r64_imm(dst, REG_RSP, 8); // sub rsp,8
- emit_mov_m64_r64(dst, MABS(&m_near.stacksave), REG_RSP); // mov [stacksave],rsp
- emit_stmxcsr_m32(dst, MABS(&m_near.ssemode)); // stmxcsr [ssemode]
- emit_jmp_r64(dst, REG_PARAM2); // jmp param2
+ emit_push_r64(dst, REG_RBX); // push rbx
+ emit_push_r64(dst, REG_RSI); // push rsi
+ emit_push_r64(dst, REG_RDI); // push rdi
+ emit_push_r64(dst, REG_RBP); // push rbp
+ emit_push_r64(dst, REG_R12); // push r12
+ emit_push_r64(dst, REG_R13); // push r13
+ emit_push_r64(dst, REG_R14); // push r14
+ emit_push_r64(dst, REG_R15); // push r15
+ emit_mov_r64_r64(dst, REG_RBP, REG_PARAM1); // mov rbp,param1
+ emit_sub_r64_imm(dst, REG_RSP, 32); // sub rsp,32
+ emit_mov_m64_r64(dst, MABS(&m_near.hashstacksave), REG_RSP); // mov [hashstacksave],rsp
+ emit_sub_r64_imm(dst, REG_RSP, 8); // sub rsp,8
+ emit_mov_m64_r64(dst, MABS(&m_near.stacksave), REG_RSP); // mov [stacksave],rsp
+ emit_stmxcsr_m32(dst, MABS(&m_near.ssemode)); // stmxcsr [ssemode]
+ emit_jmp_r64(dst, REG_PARAM2); // jmp param2
if (m_log != NULL)
x86log_disasm_code_range(m_log, "entry_point", (x86code *)m_entry, dst);
// generate an exit point
m_exit = dst;
- emit_ldmxcsr_m32(dst, MABS(&m_near.ssemode)); // ldmxcsr [ssemode]
- emit_mov_r64_m64(dst, REG_RSP, MABS(&m_near.hashstacksave)); // mov rsp,[hashstacksave]
- emit_add_r64_imm(dst, REG_RSP, 32); // add rsp,32
- emit_pop_r64(dst, REG_R15); // pop r15
- emit_pop_r64(dst, REG_R14); // pop r14
- emit_pop_r64(dst, REG_R13); // pop r13
- emit_pop_r64(dst, REG_R12); // pop r12
- emit_pop_r64(dst, REG_RBP); // pop rbp
- emit_pop_r64(dst, REG_RDI); // pop rdi
- emit_pop_r64(dst, REG_RSI); // pop rsi
- emit_pop_r64(dst, REG_RBX); // pop rbx
- emit_ret(dst); // ret
+ emit_ldmxcsr_m32(dst, MABS(&m_near.ssemode)); // ldmxcsr [ssemode]
+ emit_mov_r64_m64(dst, REG_RSP, MABS(&m_near.hashstacksave)); // mov rsp,[hashstacksave]
+ emit_add_r64_imm(dst, REG_RSP, 32); // add rsp,32
+ emit_pop_r64(dst, REG_R15); // pop r15
+ emit_pop_r64(dst, REG_R14); // pop r14
+ emit_pop_r64(dst, REG_R13); // pop r13
+ emit_pop_r64(dst, REG_R12); // pop r12
+ emit_pop_r64(dst, REG_RBP); // pop rbp
+ emit_pop_r64(dst, REG_RDI); // pop rdi
+ emit_pop_r64(dst, REG_RSI); // pop rsi
+ emit_pop_r64(dst, REG_RBX); // pop rbx
+ emit_ret(dst); // ret
if (m_log != NULL)
x86log_disasm_code_range(m_log, "exit_point", m_exit, dst);
// generate a no code point
m_nocode = dst;
- emit_ret(dst); // ret
+ emit_ret(dst); // ret
if (m_log != NULL)
x86log_disasm_code_range(m_log, "nocode", m_nocode, dst);
@@ -896,16 +896,16 @@ void drcbe_x64::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (param.immediate() == 0)
- emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
+ emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else
- emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
+ emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
}
else if (param.is_memory())
- emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
+ emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
+ emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
}
}
@@ -920,16 +920,16 @@ void drcbe_x64::emit_movsx_r64_p32(x86code *&dst, UINT8 reg, const be_parameter
if (param.is_immediate())
{
if (param.immediate() == 0)
- emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
+ emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else if ((INT32)param.immediate() >= 0)
- emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
+ emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
else
- emit_mov_r64_imm(dst, reg, (INT32)param.immediate()); // mov reg,param
+ emit_mov_r64_imm(dst, reg, (INT32)param.immediate()); // mov reg,param
}
else if (param.is_memory())
- emit_movsxd_r64_m32(dst, reg, MABS(param.memory())); // movsxd reg,[param]
+ emit_movsxd_r64_m32(dst, reg, MABS(param.memory())); // movsxd reg,[param]
else if (param.is_int_register())
- emit_movsxd_r64_r32(dst, reg, param.ireg()); // movsdx reg,param
+ emit_movsxd_r64_r32(dst, reg, param.ireg()); // movsdx reg,param
}
@@ -942,13 +942,13 @@ void drcbe_x64::emit_movsx_r64_p32(x86code *&dst, UINT8 reg, const be_parameter
void drcbe_x64::emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param)
{
if (param.is_immediate())
- emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
+ emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
else if (param.is_memory())
- emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
+ emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
+ emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
}
}
@@ -961,14 +961,14 @@ void drcbe_x64::emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_pa
void drcbe_x64::emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param)
{
if (param.is_immediate())
- emit_mov_m32_imm(dst, memref, param.immediate()); // mov [mem],param
+ emit_mov_m32_imm(dst, memref, param.immediate()); // mov [mem],param
else if (param.is_memory())
{
- emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
- emit_mov_m32_r32(dst, memref, REG_EAX); // mov [mem],eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
+ emit_mov_m32_r32(dst, memref, REG_EAX); // mov [mem],eax
}
else if (param.is_int_register())
- emit_mov_m32_r32(dst, memref, param.ireg()); // mov [mem],param
+ emit_mov_m32_r32(dst, memref, param.ireg()); // mov [mem],param
}
@@ -981,11 +981,11 @@ void drcbe_x64::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8
{
assert(!param.is_immediate());
if (param.is_memory())
- emit_mov_m32_r32(dst, MABS(param.memory()), reg); // mov [param],reg
+ emit_mov_m32_r32(dst, MABS(param.memory()), reg); // mov [param],reg
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r32_r32(dst, param.ireg(), reg); // mov param,reg
+ emit_mov_r32_r32(dst, param.ireg(), reg); // mov param,reg
}
}
@@ -1000,12 +1000,12 @@ void drcbe_x64::emit_add_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_add_r32_imm(dst, reg, param.immediate()); // add reg,param
+ emit_add_r32_imm(dst, reg, param.immediate()); // add reg,param
}
else if (param.is_memory())
- emit_add_r32_m32(dst, reg, MABS(param.memory())); // add reg,[param]
+ emit_add_r32_m32(dst, reg, MABS(param.memory())); // add reg,[param]
else if (param.is_int_register())
- emit_add_r32_r32(dst, reg, param.ireg()); // add reg,param
+ emit_add_r32_r32(dst, reg, param.ireg()); // add reg,param
}
@@ -1019,13 +1019,13 @@ void drcbe_x64::emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_add_m32_imm(dst, memref, param.immediate()); // add [dest],param
+ emit_add_m32_imm(dst, memref, param.immediate()); // add [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_add_m32_r32(dst, memref, reg); // add [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_add_m32_r32(dst, memref, reg); // add [dest],reg
}
}
@@ -1038,11 +1038,11 @@ void drcbe_x64::emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x64::emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_adc_r32_imm(dst, reg, param.immediate()); // adc reg,param
+ emit_adc_r32_imm(dst, reg, param.immediate()); // adc reg,param
else if (param.is_memory())
- emit_adc_r32_m32(dst, reg, MABS(param.memory())); // adc reg,[param]
+ emit_adc_r32_m32(dst, reg, MABS(param.memory())); // adc reg,[param]
else if (param.is_int_register())
- emit_adc_r32_r32(dst, reg, param.ireg()); // adc reg,param
+ emit_adc_r32_r32(dst, reg, param.ireg()); // adc reg,param
}
@@ -1054,12 +1054,12 @@ void drcbe_x64::emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x64::emit_adc_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_adc_m32_imm(dst, memref, param.immediate()); // adc [dest],param
+ emit_adc_m32_imm(dst, memref, param.immediate()); // adc [dest],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
- emit_adc_m32_r32(dst, memref, reg); // adc [dest],reg
+ emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
+ emit_adc_m32_r32(dst, memref, reg); // adc [dest],reg
}
}
@@ -1074,12 +1074,12 @@ void drcbe_x64::emit_sub_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_sub_r32_imm(dst, reg, param.immediate()); // sub reg,param
+ emit_sub_r32_imm(dst, reg, param.immediate()); // sub reg,param
}
else if (param.is_memory())
- emit_sub_r32_m32(dst, reg, MABS(param.memory())); // sub reg,[param]
+ emit_sub_r32_m32(dst, reg, MABS(param.memory())); // sub reg,[param]
else if (param.is_int_register())
- emit_sub_r32_r32(dst, reg, param.ireg()); // sub reg,param
+ emit_sub_r32_r32(dst, reg, param.ireg()); // sub reg,param
}
@@ -1093,13 +1093,13 @@ void drcbe_x64::emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_sub_m32_imm(dst, memref, param.immediate()); // sub [dest],param
+ emit_sub_m32_imm(dst, memref, param.immediate()); // sub [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_sub_m32_r32(dst, memref, reg); // sub [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_sub_m32_r32(dst, memref, reg); // sub [dest],reg
}
}
@@ -1112,11 +1112,11 @@ void drcbe_x64::emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x64::emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_sbb_r32_imm(dst, reg, param.immediate()); // sbb reg,param
+ emit_sbb_r32_imm(dst, reg, param.immediate()); // sbb reg,param
else if (param.is_memory())
- emit_sbb_r32_m32(dst, reg, MABS(param.memory())); // sbb reg,[param]
+ emit_sbb_r32_m32(dst, reg, MABS(param.memory())); // sbb reg,[param]
else if (param.is_int_register())
- emit_sbb_r32_r32(dst, reg, param.ireg()); // sbb reg,param
+ emit_sbb_r32_r32(dst, reg, param.ireg()); // sbb reg,param
}
@@ -1128,12 +1128,12 @@ void drcbe_x64::emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x64::emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_sbb_m32_imm(dst, memref, param.immediate()); // sbb [dest],param
+ emit_sbb_m32_imm(dst, memref, param.immediate()); // sbb [dest],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
- emit_sbb_m32_r32(dst, memref, reg); // sbb [dest],reg
+ emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
+ emit_sbb_m32_r32(dst, memref, reg); // sbb [dest],reg
}
}
@@ -1146,11 +1146,11 @@ void drcbe_x64::emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x64::emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_cmp_r32_imm(dst, reg, param.immediate()); // cmp reg,param
+ emit_cmp_r32_imm(dst, reg, param.immediate()); // cmp reg,param
else if (param.is_memory())
- emit_cmp_r32_m32(dst, reg, MABS(param.memory())); // cmp reg,[param]
+ emit_cmp_r32_m32(dst, reg, MABS(param.memory())); // cmp reg,[param]
else if (param.is_int_register())
- emit_cmp_r32_r32(dst, reg, param.ireg()); // cmp reg,param
+ emit_cmp_r32_r32(dst, reg, param.ireg()); // cmp reg,param
}
@@ -1162,12 +1162,12 @@ void drcbe_x64::emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x64::emit_cmp_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_cmp_m32_imm(dst, memref, param.immediate()); // cmp [dest],param
+ emit_cmp_m32_imm(dst, memref, param.immediate()); // cmp [dest],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_cmp_m32_r32(dst, memref, reg); // cmp [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_cmp_m32_r32(dst, memref, reg); // cmp [dest],reg
}
}
@@ -1184,14 +1184,14 @@ void drcbe_x64::emit_and_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
- emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
+ emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else
- emit_and_r32_imm(dst, reg, param.immediate()); // and reg,param
+ emit_and_r32_imm(dst, reg, param.immediate()); // and reg,param
}
else if (param.is_memory())
- emit_and_r32_m32(dst, reg, MABS(param.memory())); // and reg,[param]
+ emit_and_r32_m32(dst, reg, MABS(param.memory())); // and reg,[param]
else if (param.is_int_register())
- emit_and_r32_r32(dst, reg, param.ireg()); // and reg,param
+ emit_and_r32_r32(dst, reg, param.ireg()); // and reg,param
}
@@ -1207,15 +1207,15 @@ void drcbe_x64::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
- emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
+ emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
else
- emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
+ emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_and_m32_r32(dst, memref, reg); // and [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_and_m32_r32(dst, memref, reg); // and [dest],reg
}
}
@@ -1228,11 +1228,11 @@ void drcbe_x64::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x64::emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_test_r32_imm(dst, reg, param.immediate()); // test reg,param
+ emit_test_r32_imm(dst, reg, param.immediate()); // test reg,param
else if (param.is_memory())
- emit_test_m32_r32(dst, MABS(param.memory()), reg); // test [param],reg
+ emit_test_m32_r32(dst, MABS(param.memory()), reg); // test [param],reg
else if (param.is_int_register())
- emit_test_r32_r32(dst, reg, param.ireg()); // test reg,param
+ emit_test_r32_r32(dst, reg, param.ireg()); // test reg,param
}
@@ -1244,14 +1244,14 @@ void drcbe_x64::emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &
void drcbe_x64::emit_test_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_test_m32_imm(dst, memref, param.immediate()); // test [dest],param
+ emit_test_m32_imm(dst, memref, param.immediate()); // test [dest],param
else if (param.is_memory())
{
- emit_mov_r32_p32(dst, REG_EAX, param); // mov reg,param
- emit_test_m32_r32(dst, memref, REG_EAX); // test [dest],reg
+ emit_mov_r32_p32(dst, REG_EAX, param); // mov reg,param
+ emit_test_m32_r32(dst, memref, REG_EAX); // test [dest],reg
}
else if (param.is_int_register())
- emit_test_m32_r32(dst, memref, param.ireg()); // test [dest],param
+ emit_test_m32_r32(dst, memref, param.ireg()); // test [dest],param
}
@@ -1267,14 +1267,14 @@ void drcbe_x64::emit_or_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &pa
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_mov_r32_imm(dst, reg, 0xffffffff); // mov reg,-1
+ emit_mov_r32_imm(dst, reg, 0xffffffff); // mov reg,-1
else
- emit_or_r32_imm(dst, reg, param.immediate()); // or reg,param
+ emit_or_r32_imm(dst, reg, param.immediate()); // or reg,param
}
else if (param.is_memory())
- emit_or_r32_m32(dst, reg, MABS(param.memory())); // or reg,[param]
+ emit_or_r32_m32(dst, reg, MABS(param.memory())); // or reg,[param]
else if (param.is_int_register())
- emit_or_r32_r32(dst, reg, param.ireg()); // or reg,param
+ emit_or_r32_r32(dst, reg, param.ireg()); // or reg,param
}
@@ -1290,15 +1290,15 @@ void drcbe_x64::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_mov_m32_imm(dst, memref, 0xffffffff); // mov [dest],-1
+ emit_mov_m32_imm(dst, memref, 0xffffffff); // mov [dest],-1
else
- emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
+ emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_or_m32_r32(dst, memref, reg); // or [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_or_m32_r32(dst, memref, reg); // or [dest],reg
}
}
@@ -1315,14 +1315,14 @@ void drcbe_x64::emit_xor_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_not_r32(dst, reg); // not reg
+ emit_not_r32(dst, reg); // not reg
else
- emit_xor_r32_imm(dst, reg, param.immediate()); // xor reg,param
+ emit_xor_r32_imm(dst, reg, param.immediate()); // xor reg,param
}
else if (param.is_memory())
- emit_xor_r32_m32(dst, reg, MABS(param.memory())); // xor reg,[param]
+ emit_xor_r32_m32(dst, reg, MABS(param.memory())); // xor reg,[param]
else if (param.is_int_register())
- emit_xor_r32_r32(dst, reg, param.ireg()); // xor reg,param
+ emit_xor_r32_r32(dst, reg, param.ireg()); // xor reg,param
}
@@ -1338,15 +1338,15 @@ void drcbe_x64::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_not_m32(dst, memref); // not [dest]
+ emit_not_m32(dst, memref); // not [dest]
else
- emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
+ emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_xor_m32_r32(dst, memref, reg); // xor [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_xor_m32_r32(dst, memref, reg); // xor [dest],reg
}
}
@@ -1363,12 +1363,12 @@ void drcbe_x64::emit_shl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shl_r32_imm(dst, reg, param.immediate()); // shl reg,param
+ emit_shl_r32_imm(dst, reg, param.immediate()); // shl reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shl_r32_cl(dst, reg); // shl reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shl_r32_cl(dst, reg); // shl reg,cl
}
}
@@ -1385,12 +1385,12 @@ void drcbe_x64::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shl_m32_imm(dst, memref, param.immediate()); // shl [dest],param
+ emit_shl_m32_imm(dst, memref, param.immediate()); // shl [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shl_m32_cl(dst, memref); // shl [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shl_m32_cl(dst, memref); // shl [dest],cl
}
}
@@ -1407,12 +1407,12 @@ void drcbe_x64::emit_shr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shr_r32_imm(dst, reg, param.immediate()); // shr reg,param
+ emit_shr_r32_imm(dst, reg, param.immediate()); // shr reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shr_r32_cl(dst, reg); // shr reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shr_r32_cl(dst, reg); // shr reg,cl
}
}
@@ -1429,12 +1429,12 @@ void drcbe_x64::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shr_m32_imm(dst, memref, param.immediate()); // shr [dest],param
+ emit_shr_m32_imm(dst, memref, param.immediate()); // shr [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shr_m32_cl(dst, memref); // shr [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shr_m32_cl(dst, memref); // shr [dest],cl
}
}
@@ -1451,12 +1451,12 @@ void drcbe_x64::emit_sar_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_sar_r32_imm(dst, reg, param.immediate()); // sar reg,param
+ emit_sar_r32_imm(dst, reg, param.immediate()); // sar reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_sar_r32_cl(dst, reg); // sar reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_sar_r32_cl(dst, reg); // sar reg,cl
}
}
@@ -1473,12 +1473,12 @@ void drcbe_x64::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_sar_m32_imm(dst, memref, param.immediate()); // sar [dest],param
+ emit_sar_m32_imm(dst, memref, param.immediate()); // sar [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_sar_m32_cl(dst, memref); // sar [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_sar_m32_cl(dst, memref); // sar [dest],cl
}
}
@@ -1495,12 +1495,12 @@ void drcbe_x64::emit_rol_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rol_r32_imm(dst, reg, param.immediate()); // rol reg,param
+ emit_rol_r32_imm(dst, reg, param.immediate()); // rol reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_rol_r32_cl(dst, reg); // rol reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_rol_r32_cl(dst, reg); // rol reg,cl
}
}
@@ -1517,12 +1517,12 @@ void drcbe_x64::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rol_m32_imm(dst, memref, param.immediate()); // rol [dest],param
+ emit_rol_m32_imm(dst, memref, param.immediate()); // rol [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_rol_m32_cl(dst, memref); // rol [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_rol_m32_cl(dst, memref); // rol [dest],cl
}
}
@@ -1539,12 +1539,12 @@ void drcbe_x64::emit_ror_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_ror_r32_imm(dst, reg, param.immediate()); // ror reg,param
+ emit_ror_r32_imm(dst, reg, param.immediate()); // ror reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_ror_r32_cl(dst, reg); // ror reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_ror_r32_cl(dst, reg); // ror reg,cl
}
}
@@ -1561,12 +1561,12 @@ void drcbe_x64::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_ror_m32_imm(dst, memref, param.immediate()); // ror [dest],param
+ emit_ror_m32_imm(dst, memref, param.immediate()); // ror [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_ror_m32_cl(dst, memref); // ror [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_ror_m32_cl(dst, memref); // ror [dest],cl
}
}
@@ -1583,12 +1583,12 @@ void drcbe_x64::emit_rcl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcl_r32_imm(dst, reg, param.immediate()); // rcl reg,param
+ emit_rcl_r32_imm(dst, reg, param.immediate()); // rcl reg,param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcl_r32_cl(dst, reg); // rcl reg,cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcl_r32_cl(dst, reg); // rcl reg,cl
}
}
@@ -1605,12 +1605,12 @@ void drcbe_x64::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcl_m32_imm(dst, memref, param.immediate()); // rcl [dest],param
+ emit_rcl_m32_imm(dst, memref, param.immediate()); // rcl [dest],param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcl_m32_cl(dst, memref); // rcl [dest],cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcl_m32_cl(dst, memref); // rcl [dest],cl
}
}
@@ -1627,12 +1627,12 @@ void drcbe_x64::emit_rcr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcr_r32_imm(dst, reg, param.immediate()); // rcr reg,param
+ emit_rcr_r32_imm(dst, reg, param.immediate()); // rcr reg,param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcr_r32_cl(dst, reg); // rcr reg,cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcr_r32_cl(dst, reg); // rcr reg,cl
}
}
@@ -1649,12 +1649,12 @@ void drcbe_x64::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcr_m32_imm(dst, memref, param.immediate()); // rcr [dest],param
+ emit_rcr_m32_imm(dst, memref, param.immediate()); // rcr [dest],param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcr_m32_cl(dst, memref); // rcr [dest],cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcr_m32_cl(dst, memref); // rcr [dest],cl
}
}
@@ -1674,16 +1674,16 @@ void drcbe_x64::emit_mov_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (param.immediate() == 0)
- emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
+ emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else
- emit_mov_r64_imm(dst, reg, param.immediate()); // mov reg,param
+ emit_mov_r64_imm(dst, reg, param.immediate()); // mov reg,param
}
else if (param.is_memory())
- emit_mov_r64_m64(dst, reg, MABS(param.memory())); // mov reg,[param]
+ emit_mov_r64_m64(dst, reg, MABS(param.memory())); // mov reg,[param]
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r64_r64(dst, reg, param.ireg()); // mov reg,param
+ emit_mov_r64_r64(dst, reg, param.ireg()); // mov reg,param
}
}
@@ -1697,13 +1697,13 @@ void drcbe_x64::emit_mov_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x64::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param)
{
if (param.is_immediate())
- emit_mov_r64_imm(dst, reg, param.immediate()); // mov reg,param
+ emit_mov_r64_imm(dst, reg, param.immediate()); // mov reg,param
else if (param.is_memory())
- emit_mov_r64_m64(dst, reg, MABS(param.memory())); // mov reg,[param]
+ emit_mov_r64_m64(dst, reg, MABS(param.memory())); // mov reg,[param]
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r64_r64(dst, reg, param.ireg()); // mov reg,param
+ emit_mov_r64_r64(dst, reg, param.ireg()); // mov reg,param
}
}
@@ -1717,11 +1717,11 @@ void drcbe_x64::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8
{
assert(!param.is_immediate());
if (param.is_memory())
- emit_mov_m64_r64(dst, MABS(param.memory()), reg); // mov [param],reg
+ emit_mov_m64_r64(dst, MABS(param.memory()), reg); // mov [param],reg
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r64_r64(dst, param.ireg(), reg); // mov param,reg
+ emit_mov_r64_r64(dst, param.ireg(), reg); // mov param,reg
}
}
@@ -1738,18 +1738,18 @@ void drcbe_x64::emit_add_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() != 0 || param.immediate() != 0)
{
if (short_immediate(param.immediate()))
- emit_add_r64_imm(dst, reg, param.immediate()); // add reg,param
+ emit_add_r64_imm(dst, reg, param.immediate()); // add reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_add_r64_r64(dst, reg, REG_R11); // add reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_add_r64_r64(dst, reg, REG_R11); // add reg,r11
}
}
}
else if (param.is_memory())
- emit_add_r64_m64(dst, reg, MABS(param.memory())); // add reg,[param]
+ emit_add_r64_m64(dst, reg, MABS(param.memory())); // add reg,[param]
else if (param.is_int_register())
- emit_add_r64_r64(dst, reg, param.ireg()); // add reg,param
+ emit_add_r64_r64(dst, reg, param.ireg()); // add reg,param
}
@@ -1765,19 +1765,19 @@ void drcbe_x64::emit_add_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() != 0 || param.immediate() != 0)
{
if (short_immediate(param.immediate()))
- emit_add_m64_imm(dst, memref, param.immediate()); // add [mem],param
+ emit_add_m64_imm(dst, memref, param.immediate()); // add [mem],param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_add_m64_r64(dst, memref, REG_R11); // add [mem],r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_add_m64_r64(dst, memref, REG_R11); // add [mem],r11
}
}
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64(dst, reg, param); // mov reg,param
- emit_add_m64_r64(dst, memref, reg); // add [dest],reg
+ emit_mov_r64_p64(dst, reg, param); // mov reg,param
+ emit_add_m64_r64(dst, memref, reg); // add [dest],reg
}
}
@@ -1792,17 +1792,17 @@ void drcbe_x64::emit_adc_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (short_immediate(param.immediate()))
- emit_adc_r64_imm(dst, reg, param.immediate()); // adc reg,param
+ emit_adc_r64_imm(dst, reg, param.immediate()); // adc reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_adc_r64_r64(dst, reg, REG_R11); // adc reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_adc_r64_r64(dst, reg, REG_R11); // adc reg,r11
}
}
else if (param.is_memory())
- emit_adc_r64_m64(dst, reg, MABS(param.memory())); // adc reg,[param]
+ emit_adc_r64_m64(dst, reg, MABS(param.memory())); // adc reg,[param]
else if (param.is_int_register())
- emit_adc_r64_r64(dst, reg, param.ireg()); // adc reg,param
+ emit_adc_r64_r64(dst, reg, param.ireg()); // adc reg,param
}
@@ -1814,12 +1814,12 @@ void drcbe_x64::emit_adc_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x64::emit_adc_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate() && short_immediate(param.immediate()))
- emit_adc_m64_imm(dst, memref, param.immediate()); // adc [mem],param
+ emit_adc_m64_imm(dst, memref, param.immediate()); // adc [mem],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64_keepflags(dst, reg, param); // mov reg,param
- emit_adc_m64_r64(dst, memref, reg); // adc [dest],reg
+ emit_mov_r64_p64_keepflags(dst, reg, param); // mov reg,param
+ emit_adc_m64_r64(dst, memref, reg); // adc [dest],reg
}
}
@@ -1836,18 +1836,18 @@ void drcbe_x64::emit_sub_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() != 0 || param.immediate() != 0)
{
if (short_immediate(param.immediate()))
- emit_sub_r64_imm(dst, reg, param.immediate()); // sub reg,param
+ emit_sub_r64_imm(dst, reg, param.immediate()); // sub reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_sub_r64_r64(dst, reg, REG_R11); // sub reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_sub_r64_r64(dst, reg, REG_R11); // sub reg,r11
}
}
}
else if (param.is_memory())
- emit_sub_r64_m64(dst, reg, MABS(param.memory())); // sub reg,[param]
+ emit_sub_r64_m64(dst, reg, MABS(param.memory())); // sub reg,[param]
else if (param.is_int_register())
- emit_sub_r64_r64(dst, reg, param.ireg()); // sub reg,param
+ emit_sub_r64_r64(dst, reg, param.ireg()); // sub reg,param
}
@@ -1863,19 +1863,19 @@ void drcbe_x64::emit_sub_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() != 0 || param.immediate() != 0)
{
if (short_immediate(param.immediate()))
- emit_sub_m64_imm(dst, memref, param.immediate()); // sub [mem],param
+ emit_sub_m64_imm(dst, memref, param.immediate()); // sub [mem],param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_sub_m64_r64(dst, memref, REG_R11); // sub [mem],r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_sub_m64_r64(dst, memref, REG_R11); // sub [mem],r11
}
}
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64(dst, reg, param); // mov reg,param
- emit_sub_m64_r64(dst, memref, reg); // sub [dest],reg
+ emit_mov_r64_p64(dst, reg, param); // mov reg,param
+ emit_sub_m64_r64(dst, memref, reg); // sub [dest],reg
}
}
@@ -1890,17 +1890,17 @@ void drcbe_x64::emit_sbb_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (short_immediate(param.immediate()))
- emit_sbb_r64_imm(dst, reg, param.immediate()); // sbb reg,param
+ emit_sbb_r64_imm(dst, reg, param.immediate()); // sbb reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_sbb_r64_r64(dst, reg, REG_R11); // sbb reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_sbb_r64_r64(dst, reg, REG_R11); // sbb reg,r11
}
}
else if (param.is_memory())
- emit_sbb_r64_m64(dst, reg, MABS(param.memory())); // sbb reg,[param]
+ emit_sbb_r64_m64(dst, reg, MABS(param.memory())); // sbb reg,[param]
else if (param.is_int_register())
- emit_sbb_r64_r64(dst, reg, param.ireg()); // sbb reg,param
+ emit_sbb_r64_r64(dst, reg, param.ireg()); // sbb reg,param
}
@@ -1912,12 +1912,12 @@ void drcbe_x64::emit_sbb_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x64::emit_sbb_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate() && short_immediate(param.immediate()))
- emit_sbb_m64_imm(dst, memref, param.immediate()); // sbb [mem],param
+ emit_sbb_m64_imm(dst, memref, param.immediate()); // sbb [mem],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64_keepflags(dst, reg, param); // mov reg,param
- emit_sbb_m64_r64(dst, memref, reg); // sbb [dest],reg
+ emit_mov_r64_p64_keepflags(dst, reg, param); // mov reg,param
+ emit_sbb_m64_r64(dst, memref, reg); // sbb [dest],reg
}
}
@@ -1932,17 +1932,17 @@ void drcbe_x64::emit_cmp_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (short_immediate(param.immediate()))
- emit_cmp_r64_imm(dst, reg, param.immediate()); // cmp reg,param
+ emit_cmp_r64_imm(dst, reg, param.immediate()); // cmp reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_cmp_r64_r64(dst, reg, REG_R11); // cmp reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_cmp_r64_r64(dst, reg, REG_R11); // cmp reg,r11
}
}
else if (param.is_memory())
- emit_cmp_r64_m64(dst, reg, MABS(param.memory())); // cmp reg,[param]
+ emit_cmp_r64_m64(dst, reg, MABS(param.memory())); // cmp reg,[param]
else if (param.is_int_register())
- emit_cmp_r64_r64(dst, reg, param.ireg()); // cmp reg,param
+ emit_cmp_r64_r64(dst, reg, param.ireg()); // cmp reg,param
}
@@ -1954,12 +1954,12 @@ void drcbe_x64::emit_cmp_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x64::emit_cmp_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate() && short_immediate(param.immediate()))
- emit_cmp_m64_imm(dst, memref, param.immediate()); // cmp [dest],param
+ emit_cmp_m64_imm(dst, memref, param.immediate()); // cmp [dest],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64(dst, reg, param); // mov reg,param
- emit_cmp_m64_r64(dst, memref, reg); // cmp [dest],reg
+ emit_mov_r64_p64(dst, reg, param); // mov reg,param
+ emit_cmp_m64_r64(dst, memref, reg); // cmp [dest],reg
}
}
@@ -1976,18 +1976,18 @@ void drcbe_x64::emit_and_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() != 0 || param.immediate() != U64(0xffffffffffffffff))
{
if (short_immediate(param.immediate()))
- emit_and_r64_imm(dst, reg, param.immediate()); // and reg,param
+ emit_and_r64_imm(dst, reg, param.immediate()); // and reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_and_r64_r64(dst, reg, REG_R11); // and reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_and_r64_r64(dst, reg, REG_R11); // and reg,r11
}
}
}
else if (param.is_memory())
- emit_and_r64_m64(dst, reg, MABS(param.memory())); // and reg,[param]
+ emit_and_r64_m64(dst, reg, MABS(param.memory())); // and reg,[param]
else if (param.is_int_register())
- emit_and_r64_r64(dst, reg, param.ireg()); // and reg,param
+ emit_and_r64_r64(dst, reg, param.ireg()); // and reg,param
}
@@ -2003,19 +2003,19 @@ void drcbe_x64::emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() != 0 || param.immediate() != U64(0xffffffffffffffff))
{
if (short_immediate(param.immediate()))
- emit_and_m64_imm(dst, memref, param.immediate()); // and [mem],param
+ emit_and_m64_imm(dst, memref, param.immediate()); // and [mem],param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_and_m64_r64(dst, memref, REG_R11); // and [mem],r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_and_m64_r64(dst, memref, REG_R11); // and [mem],r11
}
}
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64(dst, reg, param); // mov reg,param
- emit_and_m64_r64(dst, memref, reg); // and [dest],reg
+ emit_mov_r64_p64(dst, reg, param); // mov reg,param
+ emit_and_m64_r64(dst, memref, reg); // and [dest],reg
}
}
@@ -2030,17 +2030,17 @@ void drcbe_x64::emit_test_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &
if (param.is_immediate())
{
if (short_immediate(param.immediate()))
- emit_test_r64_imm(dst, reg, param.immediate()); // test reg,param
+ emit_test_r64_imm(dst, reg, param.immediate()); // test reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_test_r64_r64(dst, reg, REG_R11); // test reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_test_r64_r64(dst, reg, REG_R11); // test reg,r11
}
}
else if (param.is_memory())
- emit_test_m64_r64(dst, MABS(param.memory()), reg); // test [param],reg
+ emit_test_m64_r64(dst, MABS(param.memory()), reg); // test [param],reg
else if (param.is_int_register())
- emit_test_r64_r64(dst, reg, param.ireg()); // test reg,param
+ emit_test_r64_r64(dst, reg, param.ireg()); // test reg,param
}
@@ -2052,14 +2052,14 @@ void drcbe_x64::emit_test_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &
void drcbe_x64::emit_test_m64_p64(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate() && short_immediate(param.immediate()))
- emit_test_m64_imm(dst, memref, param.immediate()); // test [dest],param
+ emit_test_m64_imm(dst, memref, param.immediate()); // test [dest],param
else if (param.is_memory())
{
- emit_mov_r64_p64(dst, REG_EAX, param); // mov reg,param
- emit_test_m64_r64(dst, memref, REG_EAX); // test [dest],reg
+ emit_mov_r64_p64(dst, REG_EAX, param); // mov reg,param
+ emit_test_m64_r64(dst, memref, REG_EAX); // test [dest],reg
}
else if (param.is_int_register())
- emit_test_m64_r64(dst, memref, param.ireg()); // test [dest],param
+ emit_test_m64_r64(dst, memref, param.ireg()); // test [dest],param
}
@@ -2075,18 +2075,18 @@ void drcbe_x64::emit_or_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &pa
if (inst.flags() != 0 || param.immediate() != 0)
{
if (short_immediate(param.immediate()))
- emit_or_r64_imm(dst, reg, param.immediate()); // or reg,param
+ emit_or_r64_imm(dst, reg, param.immediate()); // or reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_or_r64_r64(dst, reg, REG_R11); // or reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_or_r64_r64(dst, reg, REG_R11); // or reg,r11
}
}
}
else if (param.is_memory())
- emit_or_r64_m64(dst, reg, MABS(param.memory())); // or reg,[param]
+ emit_or_r64_m64(dst, reg, MABS(param.memory())); // or reg,[param]
else if (param.is_int_register())
- emit_or_r64_r64(dst, reg, param.ireg()); // or reg,param
+ emit_or_r64_r64(dst, reg, param.ireg()); // or reg,param
}
@@ -2102,19 +2102,19 @@ void drcbe_x64::emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_param
if (inst.flags() != 0 || param.immediate() != 0)
{
if (short_immediate(param.immediate()))
- emit_or_m64_imm(dst, memref, param.immediate()); // or [mem],param
+ emit_or_m64_imm(dst, memref, param.immediate()); // or [mem],param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_or_m64_r64(dst, memref, REG_R11); // or [mem],r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_or_m64_r64(dst, memref, REG_R11); // or [mem],r11
}
}
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64(dst, reg, param); // mov reg,param
- emit_or_m64_r64(dst, memref, reg); // or [dest],reg
+ emit_mov_r64_p64(dst, reg, param); // mov reg,param
+ emit_or_m64_r64(dst, memref, reg); // or [dest],reg
}
}
@@ -2131,20 +2131,20 @@ void drcbe_x64::emit_xor_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() != 0 || param.immediate() != 0)
{
if (param.immediate() == U64(0xffffffffffffffff))
- emit_not_r64(dst, reg); // not reg
+ emit_not_r64(dst, reg); // not reg
else if (short_immediate(param.immediate()))
- emit_xor_r64_imm(dst, reg, param.immediate()); // xor reg,param
+ emit_xor_r64_imm(dst, reg, param.immediate()); // xor reg,param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_xor_r64_r64(dst, reg, REG_R11); // xor reg,r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_xor_r64_r64(dst, reg, REG_R11); // xor reg,r11
}
}
}
else if (param.is_memory())
- emit_xor_r64_m64(dst, reg, MABS(param.memory())); // xor reg,[param]
+ emit_xor_r64_m64(dst, reg, MABS(param.memory())); // xor reg,[param]
else if (param.is_int_register())
- emit_xor_r64_r64(dst, reg, param.ireg()); // xor reg,param
+ emit_xor_r64_r64(dst, reg, param.ireg()); // xor reg,param
}
@@ -2160,21 +2160,21 @@ void drcbe_x64::emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() != 0 || param.immediate() != 0)
{
if (param.immediate() == U64(0xffffffffffffffff))
- emit_not_m64(dst, memref); // not [mem]
+ emit_not_m64(dst, memref); // not [mem]
else if (short_immediate(param.immediate()))
- emit_xor_m64_imm(dst, memref, param.immediate()); // xor [mem],param
+ emit_xor_m64_imm(dst, memref, param.immediate()); // xor [mem],param
else
{
- emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
- emit_xor_m64_r64(dst, memref, REG_R11); // xor [mem],r11
+ emit_mov_r64_imm(dst, REG_R11, param.immediate()); // mov r11,param
+ emit_xor_m64_r64(dst, memref, REG_R11); // xor [mem],r11
}
}
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r64_p64(dst, reg, param); // mov reg,param
- emit_xor_m64_r64(dst, memref, reg); // xor [dest],reg
+ emit_mov_r64_p64(dst, reg, param); // mov reg,param
+ emit_xor_m64_r64(dst, memref, reg); // xor [dest],reg
}
}
@@ -2191,12 +2191,12 @@ void drcbe_x64::emit_shl_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shl_r64_imm(dst, reg, param.immediate()); // shl reg,param
+ emit_shl_r64_imm(dst, reg, param.immediate()); // shl reg,param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_shl_r64_cl(dst, reg); // shl reg,cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_shl_r64_cl(dst, reg); // shl reg,cl
}
}
@@ -2213,12 +2213,12 @@ void drcbe_x64::emit_shl_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
;// skip
else
- emit_shl_m64_imm(dst, memref, param.immediate()); // shl [dest],param
+ emit_shl_m64_imm(dst, memref, param.immediate()); // shl [dest],param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_shl_m64_cl(dst, memref); // shl [dest],cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_shl_m64_cl(dst, memref); // shl [dest],cl
}
}
@@ -2235,12 +2235,12 @@ void drcbe_x64::emit_shr_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shr_r64_imm(dst, reg, param.immediate()); // shr reg,param
+ emit_shr_r64_imm(dst, reg, param.immediate()); // shr reg,param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_shr_r64_cl(dst, reg); // shr reg,cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_shr_r64_cl(dst, reg); // shr reg,cl
}
}
@@ -2257,12 +2257,12 @@ void drcbe_x64::emit_shr_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
;// skip
else
- emit_shr_m64_imm(dst, memref, param.immediate()); // shr [dest],param
+ emit_shr_m64_imm(dst, memref, param.immediate()); // shr [dest],param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_shr_m64_cl(dst, memref); // shr [dest],cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_shr_m64_cl(dst, memref); // shr [dest],cl
}
}
@@ -2279,12 +2279,12 @@ void drcbe_x64::emit_sar_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_sar_r64_imm(dst, reg, param.immediate()); // sar reg,param
+ emit_sar_r64_imm(dst, reg, param.immediate()); // sar reg,param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_sar_r64_cl(dst, reg); // sar reg,cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_sar_r64_cl(dst, reg); // sar reg,cl
}
}
@@ -2301,12 +2301,12 @@ void drcbe_x64::emit_sar_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
;// skip
else
- emit_sar_m64_imm(dst, memref, param.immediate()); // sar [dest],param
+ emit_sar_m64_imm(dst, memref, param.immediate()); // sar [dest],param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_sar_m64_cl(dst, memref); // sar [dest],cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_sar_m64_cl(dst, memref); // sar [dest],cl
}
}
@@ -2323,12 +2323,12 @@ void drcbe_x64::emit_rol_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rol_r64_imm(dst, reg, param.immediate()); // rol reg,param
+ emit_rol_r64_imm(dst, reg, param.immediate()); // rol reg,param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_rol_r64_cl(dst, reg); // rol reg,cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_rol_r64_cl(dst, reg); // rol reg,cl
}
}
@@ -2345,12 +2345,12 @@ void drcbe_x64::emit_rol_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
;// skip
else
- emit_rol_m64_imm(dst, memref, param.immediate()); // rol [dest],param
+ emit_rol_m64_imm(dst, memref, param.immediate()); // rol [dest],param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_rol_m64_cl(dst, memref); // rol [dest],cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_rol_m64_cl(dst, memref); // rol [dest],cl
}
}
@@ -2367,12 +2367,12 @@ void drcbe_x64::emit_ror_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_ror_r64_imm(dst, reg, param.immediate()); // ror reg,param
+ emit_ror_r64_imm(dst, reg, param.immediate()); // ror reg,param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_ror_r64_cl(dst, reg); // ror reg,cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_ror_r64_cl(dst, reg); // ror reg,cl
}
}
@@ -2389,12 +2389,12 @@ void drcbe_x64::emit_ror_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
;// skip
else
- emit_ror_m64_imm(dst, memref, param.immediate()); // ror [dest],param
+ emit_ror_m64_imm(dst, memref, param.immediate()); // ror [dest],param
}
else
{
- emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
- emit_ror_m64_cl(dst, memref); // ror [dest],cl
+ emit_mov_r64_p64(dst, REG_RCX, param); // mov rcx,param
+ emit_ror_m64_cl(dst, memref); // ror [dest],cl
}
}
@@ -2411,12 +2411,12 @@ void drcbe_x64::emit_rcl_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcl_r64_imm(dst, reg, param.immediate()); // rcl reg,param
+ emit_rcl_r64_imm(dst, reg, param.immediate()); // rcl reg,param
}
else
{
- emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
- emit_rcl_r64_cl(dst, reg); // rcl reg,cl
+ emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
+ emit_rcl_r64_cl(dst, reg); // rcl reg,cl
}
}
@@ -2433,12 +2433,12 @@ void drcbe_x64::emit_rcl_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
;// skip
else
- emit_rcl_m64_imm(dst, memref, param.immediate()); // rcl [dest],param
+ emit_rcl_m64_imm(dst, memref, param.immediate()); // rcl [dest],param
}
else
{
- emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
- emit_rcl_m64_cl(dst, memref); // rcl [dest],cl
+ emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
+ emit_rcl_m64_cl(dst, memref); // rcl [dest],cl
}
}
@@ -2455,12 +2455,12 @@ void drcbe_x64::emit_rcr_r64_p64(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcr_r64_imm(dst, reg, param.immediate()); // rcr reg,param
+ emit_rcr_r64_imm(dst, reg, param.immediate()); // rcr reg,param
}
else
{
- emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
- emit_rcr_r64_cl(dst, reg); // rcr reg,cl
+ emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
+ emit_rcr_r64_cl(dst, reg); // rcr reg,cl
}
}
@@ -2477,12 +2477,12 @@ void drcbe_x64::emit_rcr_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT64)param.immediate() == 0)
;// skip
else
- emit_rcr_m64_imm(dst, memref, param.immediate()); // rcr [dest],param
+ emit_rcr_m64_imm(dst, memref, param.immediate()); // rcr [dest],param
}
else
{
- emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
- emit_rcr_m64_cl(dst, memref); // rcr [dest],cl
+ emit_mov_r64_p64_keepflags(dst, REG_RCX, param); // mov rcx,param
+ emit_rcr_m64_cl(dst, memref); // rcr [dest],cl
}
}
@@ -2501,11 +2501,11 @@ void drcbe_x64::emit_movss_r128_p32(x86code *&dst, UINT8 reg, const be_parameter
{
assert(!param.is_immediate());
if (param.is_memory())
- emit_movss_r128_m32(dst, reg, MABS(param.memory())); // movss reg,[param]
+ emit_movss_r128_m32(dst, reg, MABS(param.memory())); // movss reg,[param]
else if (param.is_float_register())
{
if (reg != param.freg())
- emit_movss_r128_r128(dst, reg, param.freg()); // movss reg,param
+ emit_movss_r128_r128(dst, reg, param.freg()); // movss reg,param
}
}
@@ -2519,11 +2519,11 @@ void drcbe_x64::emit_movss_p32_r128(x86code *&dst, const be_parameter &param, UI
{
assert(!param.is_immediate());
if (param.is_memory())
- emit_movss_m32_r128(dst, MABS(param.memory()), reg); // movss [param],reg
+ emit_movss_m32_r128(dst, MABS(param.memory()), reg); // movss [param],reg
else if (param.is_float_register())
{
if (reg != param.freg())
- emit_movss_r128_r128(dst, param.freg(), reg); // movss param,reg
+ emit_movss_r128_r128(dst, param.freg(), reg); // movss param,reg
}
}
@@ -2537,11 +2537,11 @@ void drcbe_x64::emit_movsd_r128_p64(x86code *&dst, UINT8 reg, const be_parameter
{
assert(!param.is_immediate());
if (param.is_memory())
- emit_movsd_r128_m64(dst, reg, MABS(param.memory())); // movsd reg,[param]
+ emit_movsd_r128_m64(dst, reg, MABS(param.memory())); // movsd reg,[param]
else if (param.is_float_register())
{
if (reg != param.freg())
- emit_movsd_r128_r128(dst, reg, param.freg()); // movsd reg,param
+ emit_movsd_r128_r128(dst, reg, param.freg()); // movsd reg,param
}
}
@@ -2555,11 +2555,11 @@ void drcbe_x64::emit_movsd_p64_r128(x86code *&dst, const be_parameter &param, UI
{
assert(!param.is_immediate());
if (param.is_memory())
- emit_movsd_m64_r128(dst, MABS(param.memory()), reg); // movsd [param],reg
+ emit_movsd_m64_r128(dst, MABS(param.memory()), reg); // movsd [param],reg
else if (param.is_float_register())
{
if (reg != param.freg())
- emit_movsd_r128_r128(dst, param.freg(), reg); // movsd param,reg
+ emit_movsd_r128_r128(dst, param.freg(), reg); // movsd param,reg
}
}
@@ -2622,15 +2622,15 @@ void drcbe_x64::fixup_exception(drccodeptr *codeptr, void *param1, void *param2)
((UINT32 *)src)[-1] = dst - src;
// then store the exception parameter
- emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
+ emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
// push the original return address on the stack
- emit_lea_r64_m64(dst, REG_RAX, MABS(src)); // lea rax,[return]
- emit_push_r64(dst, REG_RAX); // push rax
+ emit_lea_r64_m64(dst, REG_RAX, MABS(src)); // lea rax,[return]
+ emit_push_r64(dst, REG_RAX); // push rax
if (*targetptr != NULL)
- emit_jmp(dst, *targetptr); // jmp *targetptr
+ emit_jmp(dst, *targetptr); // jmp *targetptr
else
- emit_jmp_m64(dst, MABS(targetptr)); // jmp [targetptr]
+ emit_jmp_m64(dst, MABS(targetptr)); // jmp [targetptr]
*codeptr = dst;
}
@@ -2681,14 +2681,14 @@ void drcbe_x64::op_handle(x86code *&dst, const instruction &inst)
// emit a jump around the stack adjust in case code falls through here
emit_link skip;
- emit_jmp_short_link(dst, skip); // jmp skip
+ emit_jmp_short_link(dst, skip); // jmp skip
// register the current pointer for the handle
inst.param(0).handle().set_codeptr(dst);
// by default, the handle points to prolog code that moves the stack pointer
- emit_lea_r64_m64(dst, REG_RSP, MBD(REG_RSP, -40)); // lea rsp,[rsp-40]
- resolve_link(dst, skip); // skip:
+ emit_lea_r64_m64(dst, REG_RSP, MBD(REG_RSP, -40)); // lea rsp,[rsp-40]
+ resolve_link(dst, skip); // skip:
}
@@ -2789,17 +2789,17 @@ void drcbe_x64::op_debug(x86code *&dst, const instruction &inst)
be_parameter pcp(*this, inst.param(0), PTYPE_MRI);
// test and branch
- emit_mov_r64_imm(dst, REG_RAX, (FPTR)&m_device.machine().debug_flags); // mov rax,&debug_flags
- emit_test_m32_imm(dst, MBD(REG_RAX, 0), DEBUG_FLAG_CALL_HOOK); // test [debug_flags],DEBUG_FLAG_CALL_HOOK
+ emit_mov_r64_imm(dst, REG_RAX, (FPTR)&m_device.machine().debug_flags); // mov rax,&debug_flags
+ emit_test_m32_imm(dst, MBD(REG_RAX, 0), DEBUG_FLAG_CALL_HOOK); // test [debug_flags],DEBUG_FLAG_CALL_HOOK
emit_link skip = { 0 };
- emit_jcc_short_link(dst, x64emit::COND_Z, skip); // jz skip
+ emit_jcc_short_link(dst, x64emit::COND_Z, skip); // jz skip
// push the parameter
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)&m_device); // mov param1,device
- emit_mov_r32_p32(dst, REG_PARAM2, pcp); // mov param2,pcp
- emit_smart_call_m64(dst, &m_near.debug_cpu_instruction_hook); // call debug_cpu_instruction_hook
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)&m_device); // mov param1,device
+ emit_mov_r32_p32(dst, REG_PARAM2, pcp); // mov param2,pcp
+ emit_smart_call_m64(dst, &m_near.debug_cpu_instruction_hook); // call debug_cpu_instruction_hook
- resolve_link(dst, skip); // skip:
+ resolve_link(dst, skip); // skip:
}
}
@@ -2819,11 +2819,11 @@ void drcbe_x64::op_exit(x86code *&dst, const instruction &inst)
be_parameter retp(*this, inst.param(0), PTYPE_MRI);
// load the parameter into EAX
- emit_mov_r32_p32(dst, REG_EAX, retp); // mov eax,retp
+ emit_mov_r32_p32(dst, REG_EAX, retp); // mov eax,retp
if (inst.condition() == uml::COND_ALWAYS)
- emit_jmp(dst, m_exit); // jmp exit
+ emit_jmp(dst, m_exit); // jmp exit
else
- emit_jcc(dst, X86_CONDITION(inst.condition()), m_exit); // jcc exit
+ emit_jcc(dst, X86_CONDITION(inst.condition()), m_exit); // jcc exit
}
@@ -2852,7 +2852,7 @@ void drcbe_x64::op_hashjmp(x86code *&dst, const instruction &inst)
}
// load the stack base one word early so we end up at the right spot after our call below
- emit_mov_r64_m64(dst, REG_RSP, MABS(&m_near.hashstacksave)); // mov rsp,[hashstacksave]
+ emit_mov_r64_m64(dst, REG_RSP, MABS(&m_near.hashstacksave)); // mov rsp,[hashstacksave]
// fixed mode cases
if (modep.is_immediate() && m_hash.is_mode_populated(modep.immediate()))
@@ -2869,20 +2869,20 @@ void drcbe_x64::op_hashjmp(x86code *&dst, const instruction &inst)
// a fixed mode but variable PC
else
{
- emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
- emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
- emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
- emit_and_r32_imm(dst, REG_EAX, m_hash.l2mask() << m_hash.l2shift()); // and eax,l2mask << l2shift
+ emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
+ emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
+ emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
+ emit_and_r32_imm(dst, REG_EAX, m_hash.l2mask() << m_hash.l2shift()); // and eax,l2mask << l2shift
emit_mov_r64_m64(dst, REG_RDX, MBISD(REG_RBP, REG_RDX, 8, offset_from_rbp(&m_hash.base()[modep.immediate()][0])));
// mov rdx,hash[modep+edx*8]
- emit_call_m64(dst, MBISD(REG_RDX, REG_RAX, 8 >> m_hash.l2shift(), 0)); // call [rdx+rax*shift]
+ emit_call_m64(dst, MBISD(REG_RDX, REG_RAX, 8 >> m_hash.l2shift(), 0)); // call [rdx+rax*shift]
}
}
else
{
// variable mode
int modereg = modep.select_register(REG_ECX);
- emit_mov_r32_p32(dst, modereg, modep); // mov modereg,modep
+ emit_mov_r32_p32(dst, modereg, modep); // mov modereg,modep
emit_mov_r64_m64(dst, REG_RCX, MBISD(REG_RBP, modereg, 8, offset_from_rbp(m_hash.base())));
// mov rcx,hash[modereg*8]
@@ -2891,19 +2891,19 @@ void drcbe_x64::op_hashjmp(x86code *&dst, const instruction &inst)
{
UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
- emit_mov_r64_m64(dst, REG_RDX, MBD(REG_RCX, l1val*8)); // mov rdx,[rcx+l1val*8]
- emit_call_m64(dst, MBD(REG_RDX, l2val*8)); // call [l2val*8]
+ emit_mov_r64_m64(dst, REG_RDX, MBD(REG_RCX, l1val*8)); // mov rdx,[rcx+l1val*8]
+ emit_call_m64(dst, MBD(REG_RDX, l2val*8)); // call [l2val*8]
}
// variable PC
else
{
- emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
- emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
- emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
- emit_mov_r64_m64(dst, REG_RDX, MBISD(REG_RCX, REG_RDX, 8, 0)); // mov rdx,[rcx+rdx*8]
- emit_and_r32_imm(dst, REG_EAX, m_hash.l2mask() << m_hash.l2shift()); // and eax,l2mask << l2shift
- emit_call_m64(dst, MBISD(REG_RDX, REG_RAX, 8 >> m_hash.l2shift(), 0)); // call [rdx+rax*shift]
+ emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
+ emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
+ emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
+ emit_mov_r64_m64(dst, REG_RDX, MBISD(REG_RCX, REG_RDX, 8, 0)); // mov rdx,[rcx+rdx*8]
+ emit_and_r32_imm(dst, REG_EAX, m_hash.l2mask() << m_hash.l2shift()); // and eax,l2mask << l2shift
+ emit_call_m64(dst, MBISD(REG_RDX, REG_RAX, 8 >> m_hash.l2shift(), 0)); // call [rdx+rax*shift]
}
}
@@ -2911,9 +2911,9 @@ void drcbe_x64::op_hashjmp(x86code *&dst, const instruction &inst)
if (LOG_HASHJMPS)
emit_smart_call_m64(dst, &m_near.debug_log_hashjmp_fail);
- emit_mov_m32_p32(dst, MABS(&m_state.exp), pcp); // mov [exp],param
- emit_sub_r64_imm(dst, REG_RSP, 8); // sub rsp,8
- emit_call_m64(dst, MABS(exp.handle().codeptr_addr())); // call [exp]
+ emit_mov_m32_p32(dst, MABS(&m_state.exp), pcp); // mov [exp],param
+ emit_sub_r64_imm(dst, REG_RSP, 8); // sub rsp,8
+ emit_call_m64(dst, MABS(exp.handle().codeptr_addr())); // call [exp]
}
@@ -2937,9 +2937,9 @@ void drcbe_x64::op_jmp(x86code *&dst, const instruction &inst)
if (jmptarget == NULL)
jmptarget = dst + 0x7ffffff0;
if (inst.condition() == uml::COND_ALWAYS)
- emit_jmp(dst, jmptarget); // jmp target
+ emit_jmp(dst, jmptarget); // jmp target
else
- emit_jcc(dst, X86_CONDITION(inst.condition()), jmptarget); // jcc target
+ emit_jcc(dst, X86_CONDITION(inst.condition()), jmptarget); // jcc target
}
@@ -2966,17 +2966,17 @@ void drcbe_x64::op_exh(x86code *&dst, const instruction &inst)
// perform the exception processing inline if unconditional
if (inst.condition() == uml::COND_ALWAYS)
{
- emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
+ emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
if (*targetptr != NULL)
- emit_call(dst, *targetptr); // call *targetptr
+ emit_call(dst, *targetptr); // call *targetptr
else
- emit_call_m64(dst, MABS(targetptr)); // call [targetptr]
+ emit_call_m64(dst, MABS(targetptr)); // call [targetptr]
}
// otherwise, jump to an out-of-band handler
else
{
- emit_jcc(dst, X86_CONDITION(inst.condition()), dst + 0x7ffffff0); // jcc exception
+ emit_jcc(dst, X86_CONDITION(inst.condition()), dst + 0x7ffffff0); // jcc exception
m_cache.request_oob_codegen(m_fixup_exception, dst, &const_cast<instruction &>(inst));
}
}
@@ -3003,17 +3003,17 @@ void drcbe_x64::op_callh(x86code *&dst, const instruction &inst)
// skip if conditional
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// jump through the handle; directly if a normal jump
if (*targetptr != NULL)
- emit_call(dst, *targetptr); // call *targetptr
+ emit_call(dst, *targetptr); // call *targetptr
else
- emit_call_m64(dst, MABS(targetptr)); // call [targetptr]
+ emit_call_m64(dst, MABS(targetptr)); // call [targetptr]
// resolve the conditional link
if (inst.condition() != uml::COND_ALWAYS)
- resolve_link(dst, skip); // skip:
+ resolve_link(dst, skip); // skip:
}
@@ -3032,15 +3032,15 @@ void drcbe_x64::op_ret(x86code *&dst, const instruction &inst)
// skip if conditional
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// return
- emit_lea_r64_m64(dst, REG_RSP, MBD(REG_RSP, 40)); // lea rsp,[rsp+40]
- emit_ret(dst); // ret
+ emit_lea_r64_m64(dst, REG_RSP, MBD(REG_RSP, 40)); // lea rsp,[rsp+40]
+ emit_ret(dst); // ret
// resolve the conditional link
if (inst.condition() != uml::COND_ALWAYS)
- resolve_link(dst, skip); // skip:
+ resolve_link(dst, skip); // skip:
}
@@ -3063,15 +3063,15 @@ void drcbe_x64::op_callc(x86code *&dst, const instruction &inst)
// skip if conditional
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// perform the call
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)paramp.memory()); // mov param1,paramp
- emit_smart_call_r64(dst, (x86code *)(FPTR)funcp.cfunc(), REG_RAX); // call funcp
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)paramp.memory()); // mov param1,paramp
+ emit_smart_call_r64(dst, (x86code *)(FPTR)funcp.cfunc(), REG_RAX); // call funcp
// resolve the conditional link
if (inst.condition() != uml::COND_ALWAYS)
- resolve_link(dst, skip); // skip:
+ resolve_link(dst, skip); // skip:
}
@@ -3090,13 +3090,13 @@ void drcbe_x64::op_recover(x86code *&dst, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
// call the recovery code
- emit_mov_r64_m64(dst, REG_RAX, MABS(&m_near.stacksave)); // mov rax,stacksave
- emit_mov_r64_m64(dst, REG_RAX, MBD(REG_RAX, -8)); // mov rax,[rax-4]
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)&m_map); // mov param1,m_map
- emit_lea_r64_m64(dst, REG_PARAM2, MBD(REG_RAX, -1)); // lea param2,[rax-1]
- emit_mov_r64_imm(dst, REG_PARAM3, inst.param(1).mapvar()); // mov param3,param[1].value
- emit_smart_call_m64(dst, &m_near.drcmap_get_value); // call drcmap_get_value
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_mov_r64_m64(dst, REG_RAX, MABS(&m_near.stacksave)); // mov rax,stacksave
+ emit_mov_r64_m64(dst, REG_RAX, MBD(REG_RAX, -8)); // mov rax,[rax-4]
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)&m_map); // mov param1,m_map
+ emit_lea_r64_m64(dst, REG_PARAM2, MBD(REG_RAX, -1)); // lea param2,[rax-1]
+ emit_mov_r64_imm(dst, REG_PARAM3, inst.param(1).mapvar()); // mov param3,param[1].value
+ emit_smart_call_m64(dst, &m_near.drcmap_get_value); // call drcmap_get_value
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
}
@@ -3124,16 +3124,16 @@ void drcbe_x64::op_setfmod(x86code *&dst, const instruction &inst)
if (srcp.is_immediate())
{
int value = srcp.immediate() & 3;
- emit_mov_m8_imm(dst, MABS(&m_state.fmod), value); // mov [fmod],srcp
- emit_ldmxcsr_m32(dst, MABS(&m_near.ssecontrol[value])); // ldmxcsr fp_control[srcp]
+ emit_mov_m8_imm(dst, MABS(&m_state.fmod), value); // mov [fmod],srcp
+ emit_ldmxcsr_m32(dst, MABS(&m_near.ssecontrol[value])); // ldmxcsr fp_control[srcp]
}
// register/memory case
else
{
- emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
- emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
- emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
+ emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
+ emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
+ emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
emit_ldmxcsr_m32(dst, MBISD(REG_RBP, REG_RAX, 4, offset_from_rbp(&m_near.ssecontrol[0])));
// ldmxcsr fp_control[eax]
}
@@ -3156,11 +3156,11 @@ void drcbe_x64::op_getfmod(x86code *&dst, const instruction &inst)
// fetch the current mode and store to the destination
if (dstp.is_int_register())
- emit_movzx_r32_m8(dst, dstp.ireg(), MABS(&m_state.fmod)); // movzx reg,[fmod]
+ emit_movzx_r32_m8(dst, dstp.ireg(), MABS(&m_state.fmod)); // movzx reg,[fmod]
else
{
- emit_movzx_r32_m8(dst, REG_EAX, MABS(&m_state.fmod)); // movzx eax,[fmod]
- emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
+ emit_movzx_r32_m8(dst, REG_EAX, MABS(&m_state.fmod)); // movzx eax,[fmod]
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
}
}
@@ -3181,11 +3181,11 @@ void drcbe_x64::op_getexp(x86code *&dst, const instruction &inst)
// fetch the exception parameter and store to the destination
if (dstp.is_int_register())
- emit_mov_r32_m32(dst, dstp.ireg(), MABS(&m_state.exp)); // mov reg,[exp]
+ emit_mov_r32_m32(dst, dstp.ireg(), MABS(&m_state.exp)); // mov reg,[exp]
else
{
- emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
- emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
}
}
@@ -3220,93 +3220,93 @@ void drcbe_x64::op_getflgs(x86code *&dst, const instruction &inst)
{
// single flags only
case FLAG_C:
- emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
break;
case FLAG_V:
- emit_setcc_r8(dst, x64emit::COND_O, REG_AL); // seto al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
+ emit_setcc_r8(dst, x64emit::COND_O, REG_AL); // seto al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
break;
case FLAG_Z:
- emit_setcc_r8(dst, x64emit::COND_Z, REG_AL); // setz al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
+ emit_setcc_r8(dst, x64emit::COND_Z, REG_AL); // setz al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
break;
case FLAG_S:
- emit_setcc_r8(dst, x64emit::COND_S, REG_AL); // sets al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 3); // shl dstreg,3
+ emit_setcc_r8(dst, x64emit::COND_S, REG_AL); // sets al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 3); // shl dstreg,3
break;
case FLAG_U:
- emit_setcc_r8(dst, x64emit::COND_P, REG_AL); // setp al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 4); // shl dstreg,4
+ emit_setcc_r8(dst, x64emit::COND_P, REG_AL); // setp al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 4); // shl dstreg,4
break;
// carry plus another flag
case FLAG_C | FLAG_V:
- emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
- emit_setcc_r8(dst, x64emit::COND_O, REG_CL); // seto cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
+ emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
+ emit_setcc_r8(dst, x64emit::COND_O, REG_CL); // seto cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
break;
case FLAG_C | FLAG_Z:
- emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
- emit_setcc_r8(dst, x64emit::COND_Z, REG_CL); // setz cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
+ emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
+ emit_setcc_r8(dst, x64emit::COND_Z, REG_CL); // setz cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
break;
case FLAG_C | FLAG_S:
- emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
- emit_setcc_r8(dst, x64emit::COND_S, REG_CL); // sets cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 8, 0)); // lea dstreg,[eax+ecx*8]
+ emit_setcc_r8(dst, x64emit::COND_C, REG_AL); // setc al
+ emit_setcc_r8(dst, x64emit::COND_S, REG_CL); // sets cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 8, 0)); // lea dstreg,[eax+ecx*8]
break;
// overflow plus another flag
case FLAG_V | FLAG_Z:
- emit_setcc_r8(dst, x64emit::COND_O, REG_AL); // seto al
- emit_setcc_r8(dst, x64emit::COND_Z, REG_CL); // setz cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
- emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
+ emit_setcc_r8(dst, x64emit::COND_O, REG_AL); // seto al
+ emit_setcc_r8(dst, x64emit::COND_Z, REG_CL); // setz cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,cl
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
+ emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
break;
case FLAG_V | FLAG_S:
- emit_setcc_r8(dst, x64emit::COND_O, REG_AL); // seto al
- emit_setcc_r8(dst, x64emit::COND_S, REG_CL); // sets cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
- emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
+ emit_setcc_r8(dst, x64emit::COND_O, REG_AL); // seto al
+ emit_setcc_r8(dst, x64emit::COND_S, REG_CL); // sets cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
+ emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
break;
// zero plus another flag
case FLAG_Z | FLAG_S:
- emit_setcc_r8(dst, x64emit::COND_Z, REG_AL); // setz al
- emit_setcc_r8(dst, x64emit::COND_S, REG_CL); // sets cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
- emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
+ emit_setcc_r8(dst, x64emit::COND_Z, REG_AL); // setz al
+ emit_setcc_r8(dst, x64emit::COND_S, REG_CL); // sets cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
+ emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
break;
// default cases
default:
- emit_pushf(dst); // pushf
- emit_pop_r64(dst, REG_EAX); // pop eax
- emit_and_r32_imm(dst, REG_EAX, flagmask); // and eax,flagmask
+ emit_pushf(dst); // pushf
+ emit_pop_r64(dst, REG_EAX); // pop eax
+ emit_and_r32_imm(dst, REG_EAX, flagmask); // and eax,flagmask
emit_movzx_r32_m8(dst, dstreg, MBISD(REG_RBP, REG_RAX, 1, offset_from_rbp(&m_near.flagsmap[0])));
// movzx dstreg,[flags_map]
break;
@@ -3314,11 +3314,11 @@ void drcbe_x64::op_getflgs(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form
else if (inst.size() == 8)
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -3337,21 +3337,21 @@ void drcbe_x64::op_save(x86code *&dst, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_M);
// copy live state to the destination
- emit_mov_r64_imm(dst, REG_RCX, (FPTR)dstp.memory()); // mov rcx,dstp
+ emit_mov_r64_imm(dst, REG_RCX, (FPTR)dstp.memory()); // mov rcx,dstp
// copy flags
- emit_pushf(dst); // pushf
- emit_pop_r64(dst, REG_RAX); // pop rax
- emit_and_r32_imm(dst, REG_EAX, 0x8c5); // and eax,0x8c5
+ emit_pushf(dst); // pushf
+ emit_pop_r64(dst, REG_RAX); // pop rax
+ emit_and_r32_imm(dst, REG_EAX, 0x8c5); // and eax,0x8c5
emit_mov_r8_m8(dst, REG_AL, MBISD(REG_RBP, REG_RAX, 1, offset_from_rbp(&m_near.flagsmap[0])));
// mov al,[flags_map]
- emit_mov_m8_r8(dst, MBD(REG_RCX, offsetof(drcuml_machine_state, flags)), REG_AL); // mov state->flags,al
+ emit_mov_m8_r8(dst, MBD(REG_RCX, offsetof(drcuml_machine_state, flags)), REG_AL); // mov state->flags,al
// copy fmod and exp
- emit_mov_r8_m8(dst, REG_AL, MABS(&m_state.fmod)); // mov al,[fmod]
- emit_mov_m8_r8(dst, MBD(REG_RCX, offsetof(drcuml_machine_state, fmod)), REG_AL); // mov state->fmod,al
- emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
- emit_mov_m32_r32(dst, MBD(REG_RCX, offsetof(drcuml_machine_state, exp)), REG_EAX); // mov state->exp,eax
+ emit_mov_r8_m8(dst, REG_AL, MABS(&m_state.fmod)); // mov al,[fmod]
+ emit_mov_m8_r8(dst, MBD(REG_RCX, offsetof(drcuml_machine_state, fmod)), REG_AL); // mov state->fmod,al
+ emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
+ emit_mov_m32_r32(dst, MBD(REG_RCX, offsetof(drcuml_machine_state, exp)), REG_EAX); // mov state->exp,eax
// copy integer registers
int regoffs = offsetof(drcuml_machine_state, r);
@@ -3395,7 +3395,7 @@ void drcbe_x64::op_restore(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(0), PTYPE_M);
// copy live state from the destination
- emit_mov_r64_imm(dst, REG_ECX, (FPTR)srcp.memory()); // mov rcx,dstp
+ emit_mov_r64_imm(dst, REG_ECX, (FPTR)srcp.memory()); // mov rcx,dstp
// copy integer registers
int regoffs = offsetof(drcuml_machine_state, r);
@@ -3425,17 +3425,17 @@ void drcbe_x64::op_restore(x86code *&dst, const instruction &inst)
// copy fmod and exp
emit_movzx_r32_m8(dst, REG_EAX, MBD(REG_RCX, offsetof(drcuml_machine_state, fmod)));// movzx eax,state->fmod
- emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
- emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
+ emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
+ emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
emit_ldmxcsr_m32(dst, MBISD(REG_RBP, REG_RAX, 4, offset_from_rbp(&m_near.ssecontrol[0])));
- emit_mov_r32_m32(dst, REG_EAX, MBD(REG_RCX, offsetof(drcuml_machine_state, exp))); // mov eax,state->exp
- emit_mov_m32_r32(dst, MABS(&m_state.exp), REG_EAX); // mov [exp],eax
+ emit_mov_r32_m32(dst, REG_EAX, MBD(REG_RCX, offsetof(drcuml_machine_state, exp))); // mov eax,state->exp
+ emit_mov_m32_r32(dst, MABS(&m_state.exp), REG_EAX); // mov [exp],eax
// copy flags
emit_movzx_r32_m8(dst, REG_EAX, MBD(REG_RCX, offsetof(drcuml_machine_state, flags)));// movzx eax,state->flags
emit_push_m64(dst, MBISD(REG_RBP, REG_RAX, 8, offset_from_rbp(&m_near.flagsunmap[0])));
// push flags_unmap[eax*8]
- emit_popf(dst); // popf
+ emit_popf(dst); // popf
}
@@ -3479,9 +3479,9 @@ void drcbe_x64::op_load(x86code *&dst, const instruction &inst)
else if (size == SIZE_WORD)
emit_movzx_r32_m16(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate()));// movzx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
- emit_mov_r64_m64(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
+ emit_mov_r64_m64(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
}
// other index
@@ -3490,20 +3490,20 @@ void drcbe_x64::op_load(x86code *&dst, const instruction &inst)
int indreg = indp.select_register(REG_ECX);
emit_movsx_r64_p32(dst, indreg, indp);
if (size == SIZE_BYTE)
- emit_movzx_r32_m8(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // movzx dstreg,[basep + scale*indp]
+ emit_movzx_r32_m8(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_WORD)
- emit_movzx_r32_m16(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // movzx dstreg,[basep + scale*indp]
+ emit_movzx_r32_m16(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
- emit_mov_r64_m64(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r64_m64(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
}
// store result
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
else
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -3545,7 +3545,7 @@ void drcbe_x64::op_loads(x86code *&dst, const instruction &inst)
else if (size == SIZE_WORD)
emit_movsx_r32_m16(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate()));// movsx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
}
else if (inst.size() == 8)
{
@@ -3556,7 +3556,7 @@ void drcbe_x64::op_loads(x86code *&dst, const instruction &inst)
else if (size == SIZE_DWORD)
emit_movsxd_r64_m32(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate()));// movsxd dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
- emit_mov_r64_m64(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
+ emit_mov_r64_m64(dst, dstreg, MBD(basereg, baseoffs + scale*indp.immediate())); // mov dstreg,[basep + scale*indp]
}
}
@@ -3572,7 +3572,7 @@ void drcbe_x64::op_loads(x86code *&dst, const instruction &inst)
else if (size == SIZE_WORD)
emit_movsx_r32_m16(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));// movsx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
}
else if (inst.size() == 8)
{
@@ -3583,15 +3583,15 @@ void drcbe_x64::op_loads(x86code *&dst, const instruction &inst)
else if (size == SIZE_DWORD)
emit_movsxd_r64_m32(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs));// movsxd dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
- emit_mov_r64_m64(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r64_m64(dst, dstreg, MBISD(basereg, indreg, scale, baseoffs)); // mov dstreg,[basep + scale*indp]
}
}
// store result
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
else
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -3651,17 +3651,17 @@ void drcbe_x64::op_store(x86code *&dst, const instruction &inst)
else
{
if (size != SIZE_QWORD)
- emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
else
- emit_mov_r64_p64(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_mov_r64_p64(dst, srcreg, srcp); // mov srcreg,srcp
if (size == SIZE_BYTE)
- emit_mov_m8_r8(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m8_r8(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
else if (size == SIZE_WORD)
- emit_mov_m16_r16(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m16_r16(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
else if (size == SIZE_DWORD)
- emit_mov_m32_r32(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m32_r32(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
else if (size == SIZE_QWORD)
- emit_mov_m64_r64(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m64_r64(dst, MBD(basereg, baseoffs + scale*indp.immediate()), srcreg); // mov [basep + scale*indp],srcreg
}
}
@@ -3669,7 +3669,7 @@ void drcbe_x64::op_store(x86code *&dst, const instruction &inst)
else
{
int indreg = indp.select_register(REG_ECX);
- emit_movsx_r64_p32(dst, indreg, indp); // mov indreg,indp
+ emit_movsx_r64_p32(dst, indreg, indp); // mov indreg,indp
// immediate source
if (srcp.is_immediate())
@@ -3697,17 +3697,17 @@ void drcbe_x64::op_store(x86code *&dst, const instruction &inst)
else
{
if (size != SIZE_QWORD)
- emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
else
- emit_mov_r64_p64(dst, srcreg, srcp); // mov edx:srcreg,srcp
+ emit_mov_r64_p64(dst, srcreg, srcp); // mov edx:srcreg,srcp
if (size == SIZE_BYTE)
- emit_mov_m8_r8(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
+ emit_mov_m8_r8(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
else if (size == SIZE_WORD)
- emit_mov_m16_r16(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
+ emit_mov_m16_r16(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
else if (size == SIZE_DWORD)
- emit_mov_m32_r32(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
+ emit_mov_m32_r32(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
else if (size == SIZE_QWORD)
- emit_mov_m64_r64(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
+ emit_mov_m64_r64(dst, MBISD(basereg, indreg, scale, baseoffs), srcreg); // mov [basep + scale*ecx],srcreg
}
}
}
@@ -3734,40 +3734,40 @@ void drcbe_x64::op_read(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_EAX);
// set up a call to the read byte handler
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
- emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
+ emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
if (spacesizep.size() == SIZE_BYTE)
{
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].read_byte);
// call read_byte
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
}
else if (spacesizep.size() == SIZE_WORD)
{
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].read_word);
// call read_word
- emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
+ emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
}
else if (spacesizep.size() == SIZE_DWORD)
{
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].read_dword);
// call read_dword
if (dstreg != REG_EAX || inst.size() == 8)
- emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
+ emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
}
else if (spacesizep.size() == SIZE_QWORD)
{
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].read_qword);
// call read_qword
if (dstreg != REG_RAX)
- emit_mov_r64_r64(dst, dstreg, REG_RAX); // mov dstreg,rax
+ emit_mov_r64_r64(dst, dstreg, REG_RAX); // mov dstreg,rax
}
// store result
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
else
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -3793,38 +3793,38 @@ void drcbe_x64::op_readm(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_EAX);
// set up a call to the read byte handler
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
- emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
+ emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
if (spacesizep.size() != SIZE_QWORD)
- emit_mov_r32_p32(dst, REG_PARAM3, maskp); // mov param3,maskp
+ emit_mov_r32_p32(dst, REG_PARAM3, maskp); // mov param3,maskp
else
- emit_mov_r64_p64(dst, REG_PARAM3, maskp); // mov param3,maskp
+ emit_mov_r64_p64(dst, REG_PARAM3, maskp); // mov param3,maskp
if (spacesizep.size() == SIZE_WORD)
{
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].read_word_masked);
// call read_word_masked
- emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
+ emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
}
else if (spacesizep.size() == SIZE_DWORD)
{
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].read_dword_masked);
// call read_dword_masked
if (dstreg != REG_EAX || inst.size() == 8)
- emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
+ emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
}
else if (spacesizep.size() == SIZE_QWORD)
{
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].read_qword_masked);
// call read_qword_masked
if (dstreg != REG_RAX)
- emit_mov_r64_r64(dst, dstreg, REG_RAX); // mov dstreg,rax
+ emit_mov_r64_r64(dst, dstreg, REG_RAX); // mov dstreg,rax
}
// store result
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
else
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -3846,12 +3846,12 @@ void drcbe_x64::op_write(x86code *&dst, const instruction &inst)
assert(spacesizep.is_size_space());
// set up a call to the write byte handler
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
- emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
+ emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
if (spacesizep.size() != SIZE_QWORD)
- emit_mov_r32_p32(dst, REG_PARAM3, srcp); // mov param3,srcp
+ emit_mov_r32_p32(dst, REG_PARAM3, srcp); // mov param3,srcp
else
- emit_mov_r64_p64(dst, REG_PARAM3, srcp); // mov param3,srcp
+ emit_mov_r64_p64(dst, REG_PARAM3, srcp); // mov param3,srcp
if (spacesizep.size() == SIZE_BYTE)
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].write_byte);
// call write_byte
@@ -3886,17 +3886,17 @@ void drcbe_x64::op_writem(x86code *&dst, const instruction &inst)
assert(spacesizep.is_size_space());
// set up a call to the write byte handler
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
- emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacesizep.space()])); // mov param1,space
+ emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
if (spacesizep.size() != SIZE_QWORD)
{
- emit_mov_r32_p32(dst, REG_PARAM3, srcp); // mov param3,srcp
- emit_mov_r32_p32(dst, REG_PARAM4, maskp); // mov param4,maskp
+ emit_mov_r32_p32(dst, REG_PARAM3, srcp); // mov param3,srcp
+ emit_mov_r32_p32(dst, REG_PARAM4, maskp); // mov param4,maskp
}
else
{
- emit_mov_r64_p64(dst, REG_PARAM3, srcp); // mov param3,srcp
- emit_mov_r64_p64(dst, REG_PARAM4, maskp); // mov param4,maskp
+ emit_mov_r64_p64(dst, REG_PARAM3, srcp); // mov param3,srcp
+ emit_mov_r64_p64(dst, REG_PARAM4, maskp); // mov param4,maskp
}
if (spacesizep.size() == SIZE_WORD)
emit_smart_call_m64(dst, (x86code **)&m_accessors[spacesizep.space()].write_word_masked);
@@ -3947,16 +3947,16 @@ void drcbe_x64::op_carry(x86code *&dst, const instruction &inst)
if (bitp.is_immediate())
{
if (srcp.is_memory())
- emit_bt_m32_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
+ emit_bt_m32_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
else if (srcp.is_int_register())
- emit_bt_r32_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
+ emit_bt_r32_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
}
else
{
if (srcp.is_memory())
- emit_bt_m32_r32(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
+ emit_bt_m32_r32(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
else if (srcp.is_int_register())
- emit_bt_r32_r32(dst, srcp.ireg(), REG_ECX); // bt srcp,ecx
+ emit_bt_r32_r32(dst, srcp.ireg(), REG_ECX); // bt srcp,ecx
}
}
@@ -3966,16 +3966,16 @@ void drcbe_x64::op_carry(x86code *&dst, const instruction &inst)
if (bitp.is_immediate())
{
if (srcp.is_memory())
- emit_bt_m64_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
+ emit_bt_m64_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
else if (srcp.is_int_register())
- emit_bt_r64_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
+ emit_bt_r64_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
}
else
{
if (srcp.is_memory())
- emit_bt_m64_r64(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
+ emit_bt_m64_r64(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
else if (srcp.is_int_register())
- emit_bt_r64_r64(dst, srcp.ireg(), REG_ECX); // bt srcp,ecx
+ emit_bt_r64_r64(dst, srcp.ireg(), REG_ECX); // bt srcp,ecx
}
}
}
@@ -3999,16 +3999,16 @@ void drcbe_x64::op_set(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_EAX);
// set to AL
- emit_setcc_r8(dst, X86_CONDITION(inst.condition()), REG_AL); // setcc al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_setcc_r8(dst, X86_CONDITION(inst.condition()), REG_AL); // setcc al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
// 32-bit form
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form
else if (inst.size() == 8)
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
@@ -4036,18 +4036,18 @@ void drcbe_x64::op_mov(x86code *&dst, const instruction &inst)
// always start with a jmp
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// 32-bit form
if (inst.size() == 4)
{
// register to memory
if (dstp.is_memory() && srcp.is_int_register())
- emit_mov_m32_r32(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
// immediate to memory
else if (dstp.is_memory() && srcp.is_immediate())
- emit_mov_m32_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
+ emit_mov_m32_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
// conditional memory to register
else if (inst.condition() != 0 && dstp.is_int_register() && srcp.is_memory())
@@ -4070,8 +4070,8 @@ void drcbe_x64::op_mov(x86code *&dst, const instruction &inst)
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4080,11 +4080,11 @@ void drcbe_x64::op_mov(x86code *&dst, const instruction &inst)
{
// register to memory
if (dstp.is_memory() && srcp.is_int_register())
- emit_mov_m64_r64(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
+ emit_mov_m64_r64(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
// immediate to memory
else if (dstp.is_memory() && srcp.is_immediate() && short_immediate(srcp.immediate()))
- emit_mov_m64_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
+ emit_mov_m64_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
// conditional memory to register
else if (inst.condition() != 0 && dstp.is_int_register() && srcp.is_memory())
@@ -4107,8 +4107,8 @@ void drcbe_x64::op_mov(x86code *&dst, const instruction &inst)
// general case
else
{
- emit_mov_r64_p64_keepflags(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64_keepflags(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4145,24 +4145,24 @@ void drcbe_x64::op_sext(x86code *&dst, const instruction &inst)
if (srcp.is_memory())
{
if (sizep.size() == SIZE_BYTE)
- emit_movsx_r32_m8(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
+ emit_movsx_r32_m8(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
else if (sizep.size() == SIZE_WORD)
- emit_movsx_r32_m16(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
+ emit_movsx_r32_m16(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
else if (sizep.size() == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
+ emit_mov_r32_m32(dst, dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
}
else if (srcp.is_int_register())
{
if (sizep.size() == SIZE_BYTE)
- emit_movsx_r32_r8(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
+ emit_movsx_r32_r8(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
else if (sizep.size() == SIZE_WORD)
- emit_movsx_r32_r16(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
+ emit_movsx_r32_r16(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
else if (sizep.size() == SIZE_DWORD)
- emit_mov_r32_r32(dst, dstreg, srcp.ireg()); // mov dstreg,srcp
+ emit_mov_r32_r32(dst, dstreg, srcp.ireg()); // mov dstreg,srcp
}
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
if (inst.flags() != 0)
- emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
+ emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
}
// 64-bit form
@@ -4172,28 +4172,28 @@ void drcbe_x64::op_sext(x86code *&dst, const instruction &inst)
if (srcp.is_memory())
{
if (sizep.size() == SIZE_BYTE)
- emit_movsx_r64_m8(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
+ emit_movsx_r64_m8(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
else if (sizep.size() == SIZE_WORD)
- emit_movsx_r64_m16(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
+ emit_movsx_r64_m16(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
else if (sizep.size() == SIZE_DWORD)
- emit_movsxd_r64_m32(dst, dstreg, MABS(srcp.memory())); // movsxd dstreg,[srcp]
+ emit_movsxd_r64_m32(dst, dstreg, MABS(srcp.memory())); // movsxd dstreg,[srcp]
else if (sizep.size() == SIZE_QWORD)
- emit_mov_r64_m64(dst, dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
+ emit_mov_r64_m64(dst, dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
}
else if (srcp.is_int_register())
{
if (sizep.size() == SIZE_BYTE)
- emit_movsx_r64_r8(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
+ emit_movsx_r64_r8(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
else if (sizep.size() == SIZE_WORD)
- emit_movsx_r64_r16(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
+ emit_movsx_r64_r16(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
else if (sizep.size() == SIZE_DWORD)
- emit_movsxd_r64_r32(dst, dstreg, srcp.ireg()); // movsxd dstreg,srcp
+ emit_movsxd_r64_r32(dst, dstreg, srcp.ireg()); // movsxd dstreg,srcp
else if (sizep.size() == SIZE_QWORD)
- emit_mov_r64_r64(dst, dstreg, srcp.ireg()); // mov dstreg,srcp
+ emit_mov_r64_r64(dst, dstreg, srcp.ireg()); // mov dstreg,srcp
}
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
if (inst.flags() != 0)
- emit_test_r64_r64(dst, dstreg, dstreg); // test dstreg,dstreg
+ emit_test_r64_r64(dst, dstreg, dstreg); // test dstreg,dstreg
}
}
@@ -4221,19 +4221,19 @@ void drcbe_x64::op_roland(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
- emit_rol_r32_p32(dst, dstreg, shiftp, inst); // rol dstreg,shiftp
- emit_and_r32_p32(dst, dstreg, maskp, inst); // and dstreg,maskp
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_rol_r32_p32(dst, dstreg, shiftp, inst); // rol dstreg,shiftp
+ emit_and_r32_p32(dst, dstreg, maskp, inst); // and dstreg,maskp
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
- emit_rol_r64_p64(dst, dstreg, shiftp, inst); // rol dstreg,shiftp
- emit_and_r64_p64(dst, dstreg, maskp, inst); // and dstreg,maskp
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_rol_r64_p64(dst, dstreg, shiftp, inst); // rol dstreg,shiftp
+ emit_and_r64_p64(dst, dstreg, maskp, inst); // and dstreg,maskp
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4261,37 +4261,37 @@ void drcbe_x64::op_rolins(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
- emit_rol_r32_p32(dst, REG_EAX, shiftp, inst); // rol eax,shiftp
- emit_mov_r32_p32(dst, dstreg, dstp); // mov dstreg,dstp
+ emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
+ emit_rol_r32_p32(dst, REG_EAX, shiftp, inst); // rol eax,shiftp
+ emit_mov_r32_p32(dst, dstreg, dstp); // mov dstreg,dstp
if (maskp.is_immediate())
{
- emit_and_r32_imm(dst, REG_EAX, maskp.immediate()); // and eax,maskp
- emit_and_r32_imm(dst, dstreg, ~maskp.immediate()); // and dstreg,~maskp
+ emit_and_r32_imm(dst, REG_EAX, maskp.immediate()); // and eax,maskp
+ emit_and_r32_imm(dst, dstreg, ~maskp.immediate()); // and dstreg,~maskp
}
else
{
- emit_mov_r32_p32(dst, REG_EDX, maskp); // mov edx,maskp
- emit_and_r32_r32(dst, REG_EAX, REG_EDX); // and eax,edx
- emit_not_r32(dst, REG_EDX); // not edx
- emit_and_r32_r32(dst, dstreg, REG_EDX); // and dstreg,edx
+ emit_mov_r32_p32(dst, REG_EDX, maskp); // mov edx,maskp
+ emit_and_r32_r32(dst, REG_EAX, REG_EDX); // and eax,edx
+ emit_not_r32(dst, REG_EDX); // not edx
+ emit_and_r32_r32(dst, dstreg, REG_EDX); // and dstreg,edx
}
- emit_or_r32_r32(dst, dstreg, REG_EAX); // or dstreg,eax
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_or_r32_r32(dst, dstreg, REG_EAX); // or dstreg,eax
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, REG_RAX, srcp); // mov rax,srcp
- emit_mov_r64_p64(dst, REG_RDX, maskp); // mov rdx,maskp
- emit_rol_r64_p64(dst, REG_RAX, shiftp, inst); // rol rax,shiftp
- emit_mov_r64_p64(dst, dstreg, dstp); // mov dstreg,dstp
- emit_and_r64_r64(dst, REG_RAX, REG_RDX); // and eax,rdx
- emit_not_r64(dst, REG_RDX); // not rdx
- emit_and_r64_r64(dst, dstreg, REG_RDX); // and dstreg,rdx
- emit_or_r64_r64(dst, dstreg, REG_RAX); // or dstreg,rax
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, REG_RAX, srcp); // mov rax,srcp
+ emit_mov_r64_p64(dst, REG_RDX, maskp); // mov rdx,maskp
+ emit_rol_r64_p64(dst, REG_RAX, shiftp, inst); // rol rax,shiftp
+ emit_mov_r64_p64(dst, dstreg, dstp); // mov dstreg,dstp
+ emit_and_r64_r64(dst, REG_RAX, REG_RDX); // and eax,rdx
+ emit_not_r64(dst, REG_RDX); // not rdx
+ emit_and_r64_r64(dst, dstreg, REG_RDX); // and dstreg,rdx
+ emit_or_r64_r64(dst, dstreg, REG_RAX); // or dstreg,rax
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4321,11 +4321,11 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_add_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
+ emit_add_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && inst.flags() == 0)
- emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), src2p.immediate())); // lea dstp,[src1p+src2p]
+ emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), src2p.immediate())); // lea dstp,[src1p+src2p]
// reg = reg + reg
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_int_register() && inst.flags() == 0)
@@ -4334,9 +4334,9 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_add_r32_p32(dst, dstreg, src2p, inst); // add dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_add_r32_p32(dst, dstreg, src2p, inst); // add dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4345,11 +4345,11 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_add_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
+ emit_add_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && short_immediate(src2p.immediate()) && inst.flags() == 0)
- emit_lea_r64_m64(dst, dstp.ireg(), MBD(src1p.ireg(), src2p.immediate())); // lea dstp,[src1p+src2p]
+ emit_lea_r64_m64(dst, dstp.ireg(), MBD(src1p.ireg(), src2p.immediate())); // lea dstp,[src1p+src2p]
// reg = reg + reg
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_int_register() && inst.flags() == 0)
@@ -4358,9 +4358,9 @@ void drcbe_x64::op_add(x86code *&dst, const instruction &inst)
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_add_r64_p64(dst, dstreg, src2p, inst); // add dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_add_r64_p64(dst, dstreg, src2p, inst); // add dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -4391,14 +4391,14 @@ void drcbe_x64::op_addc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_adc_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
+ emit_adc_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_adc_r32_p32(dst, dstreg, src2p, inst); // adc dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_adc_r32_p32(dst, dstreg, src2p, inst); // adc dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4407,14 +4407,14 @@ void drcbe_x64::op_addc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_adc_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
+ emit_adc_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
// general case
else
{
- emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_adc_r64_p64(dst, dstreg, src2p, inst); // adc dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_adc_r64_p64(dst, dstreg, src2p, inst); // adc dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -4444,18 +4444,18 @@ void drcbe_x64::op_sub(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sub_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
+ emit_sub_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
// reg = reg - imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && inst.flags() == 0)
- emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), -src2p.immediate())); // lea dstp,[src1p-src2p]
+ emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), -src2p.immediate())); // lea dstp,[src1p-src2p]
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sub_r32_p32(dst, dstreg, src2p, inst); // sub dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sub_r32_p32(dst, dstreg, src2p, inst); // sub dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4464,18 +4464,18 @@ void drcbe_x64::op_sub(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sub_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
+ emit_sub_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
// reg = reg - imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && short_immediate(src2p.immediate()) && inst.flags() == 0)
- emit_lea_r64_m64(dst, dstp.ireg(), MBD(src1p.ireg(), -src2p.immediate())); // lea dstp,[src1p-src2p]
+ emit_lea_r64_m64(dst, dstp.ireg(), MBD(src1p.ireg(), -src2p.immediate())); // lea dstp,[src1p-src2p]
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sub_r64_p64(dst, dstreg, src2p, inst); // sub dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sub_r64_p64(dst, dstreg, src2p, inst); // sub dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -4505,14 +4505,14 @@ void drcbe_x64::op_subc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sbb_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
+ emit_sbb_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sbb_r32_p32(dst, dstreg, src2p, inst); // sbb dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sbb_r32_p32(dst, dstreg, src2p, inst); // sbb dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4521,14 +4521,14 @@ void drcbe_x64::op_subc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sbb_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
+ emit_sbb_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
// general case
else
{
- emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sbb_r64_p64(dst, dstreg, src2p, inst); // sbb dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sbb_r64_p64(dst, dstreg, src2p, inst); // sbb dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -4557,14 +4557,14 @@ void drcbe_x64::op_cmp(x86code *&dst, const instruction &inst)
{
// memory versus anything
if (src1p.is_memory())
- emit_cmp_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // cmp [dstp],src2p
+ emit_cmp_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // cmp [dstp],src2p
// general case
else
{
if (src1p.is_immediate())
- emit_mov_r32_imm(dst, src1reg, src1p.immediate()); // mov src1reg,imm
- emit_cmp_r32_p32(dst, src1reg, src2p, inst); // cmp src1reg,src2p
+ emit_mov_r32_imm(dst, src1reg, src1p.immediate()); // mov src1reg,imm
+ emit_cmp_r32_p32(dst, src1reg, src2p, inst); // cmp src1reg,src2p
}
}
@@ -4573,14 +4573,14 @@ void drcbe_x64::op_cmp(x86code *&dst, const instruction &inst)
{
// memory versus anything
if (src1p.is_memory())
- emit_cmp_m64_p64(dst, MABS(src1p.memory()), src2p, inst); // cmp [dstp],src2p
+ emit_cmp_m64_p64(dst, MABS(src1p.memory()), src2p, inst); // cmp [dstp],src2p
// general case
else
{
if (src1p.is_immediate())
- emit_mov_r64_imm(dst, src1reg, src1p.immediate()); // mov src1reg,imm
- emit_cmp_r64_p64(dst, src1reg, src2p, inst); // cmp src1reg,src2p
+ emit_mov_r64_imm(dst, src1reg, src1p.immediate()); // mov src1reg,imm
+ emit_cmp_r64_p64(dst, src1reg, src2p, inst); // cmp src1reg,src2p
}
}
}
@@ -4612,19 +4612,19 @@ void drcbe_x64::op_mulu(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
// general case
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
if (src2p.is_memory())
- emit_mul_m32(dst, MABS(src2p.memory())); // mul [src2p]
+ emit_mul_m32(dst, MABS(src2p.memory())); // mul [src2p]
else if (src2p.is_int_register())
- emit_mul_r32(dst, src2p.ireg()); // mul src2p
+ emit_mul_r32(dst, src2p.ireg()); // mul src2p
else if (src2p.is_immediate())
{
- emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
- emit_mul_r32(dst, REG_EDX); // mul edx
+ emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
+ emit_mul_r32(dst, REG_EDX); // mul edx
}
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
if (compute_hi)
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
// compute flags
if (inst.flags() != 0)
@@ -4632,32 +4632,32 @@ void drcbe_x64::op_mulu(x86code *&dst, const instruction &inst)
if (zsflags != 0)
{
if (vflag)
- emit_pushf(dst); // pushf
+ emit_pushf(dst); // pushf
if (compute_hi)
{
if (zsflags == FLAG_Z)
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
else if (zsflags == FLAG_S)
- emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
+ emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
else
{
- emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
- emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
- emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
+ emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
+ emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
}
}
else
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
// we rely on the fact that OF is cleared by all logical operations above
if (vflag)
{
- emit_pushf(dst); // pushf
- emit_pop_r64(dst, REG_RAX); // pop rax
- emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
- emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
- emit_popf(dst); // popf
+ emit_pushf(dst); // pushf
+ emit_pop_r64(dst, REG_RAX); // pop rax
+ emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
+ emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
+ emit_popf(dst); // popf
}
}
}
@@ -4667,19 +4667,19 @@ void drcbe_x64::op_mulu(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
+ emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
if (src2p.is_memory())
- emit_mul_m64(dst, MABS(src2p.memory())); // mul [src2p]
+ emit_mul_m64(dst, MABS(src2p.memory())); // mul [src2p]
else if (src2p.is_int_register())
- emit_mul_r64(dst, src2p.ireg()); // mul src2p
+ emit_mul_r64(dst, src2p.ireg()); // mul src2p
else if (src2p.is_immediate())
{
- emit_mov_r64_imm(dst, REG_RDX, src2p.immediate()); // mov rdx,src2p
- emit_mul_r64(dst, REG_RDX); // mul rdx
+ emit_mov_r64_imm(dst, REG_RDX, src2p.immediate()); // mov rdx,src2p
+ emit_mul_r64(dst, REG_RDX); // mul rdx
}
- emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
+ emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
if (compute_hi)
- emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
+ emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
// compute flags
if (inst.flags() != 0)
@@ -4687,32 +4687,32 @@ void drcbe_x64::op_mulu(x86code *&dst, const instruction &inst)
if (zsflags != 0)
{
if (vflag)
- emit_pushf(dst); // pushf
+ emit_pushf(dst); // pushf
if (compute_hi)
{
if (zsflags == FLAG_Z)
- emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
+ emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
else if (zsflags == FLAG_S)
- emit_test_r64_r64(dst, REG_RDX, REG_RDX); // test rdx,rdx
+ emit_test_r64_r64(dst, REG_RDX, REG_RDX); // test rdx,rdx
else
{
- emit_mov_r32_r32(dst, REG_ECX, REG_EAX); // mov ecx,eax
- emit_shr_r64_imm(dst, REG_RAX, 32); // shr rax,32
- emit_or_r64_r64(dst, REG_RDX, REG_RCX); // or rdx,rcx
- emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
+ emit_mov_r32_r32(dst, REG_ECX, REG_EAX); // mov ecx,eax
+ emit_shr_r64_imm(dst, REG_RAX, 32); // shr rax,32
+ emit_or_r64_r64(dst, REG_RDX, REG_RCX); // or rdx,rcx
+ emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
}
}
else
- emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test rax,rax
+ emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test rax,rax
// we rely on the fact that OF is cleared by all logical operations above
if (vflag)
{
- emit_pushf(dst); // pushf
- emit_pop_r64(dst, REG_RAX); // pop rax
- emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
- emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
- emit_popf(dst); // popf
+ emit_pushf(dst); // pushf
+ emit_pop_r64(dst, REG_RAX); // pop rax
+ emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
+ emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
+ emit_popf(dst); // popf
}
}
}
@@ -4751,36 +4751,36 @@ void drcbe_x64::op_muls(x86code *&dst, const instruction &inst)
if (src1p.is_memory())
emit_imul_r32_m32_imm(dst, REG_EAX, MABS(src1p.memory()), src2p.immediate()); // imul eax,[src1p],src2p
else if (src1p.is_int_register())
- emit_imul_r32_r32_imm(dst, REG_EAX, src1p.ireg(), src2p.immediate()); // imul eax,src1p,src2p
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_imul_r32_r32_imm(dst, REG_EAX, src1p.ireg(), src2p.immediate()); // imul eax,src1p,src2p
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
}
// 32-bit destination, general case
else if (!compute_hi)
{
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
if (src2p.is_memory())
- emit_imul_r32_m32(dst, REG_EAX, MABS(src2p.memory())); // imul eax,[src2p]
+ emit_imul_r32_m32(dst, REG_EAX, MABS(src2p.memory())); // imul eax,[src2p]
else if (src2p.is_int_register())
- emit_imul_r32_r32(dst, REG_EAX, src2p.ireg()); // imul eax,src2p
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_imul_r32_r32(dst, REG_EAX, src2p.ireg()); // imul eax,src2p
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
}
// 64-bit destination, general case
else
{
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
if (src2p.is_memory())
- emit_imul_m32(dst, MABS(src2p.memory())); // imul [src2p]
+ emit_imul_m32(dst, MABS(src2p.memory())); // imul [src2p]
else if (src2p.is_int_register())
- emit_imul_r32(dst, src2p.ireg()); // imul src2p
+ emit_imul_r32(dst, src2p.ireg()); // imul src2p
else if (src2p.is_immediate())
{
- emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
- emit_imul_r32(dst, REG_EDX); // imul edx
+ emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
+ emit_imul_r32(dst, REG_EDX); // imul edx
}
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
}
// compute flags
@@ -4789,32 +4789,32 @@ void drcbe_x64::op_muls(x86code *&dst, const instruction &inst)
if (zsflags != 0)
{
if (vflag)
- emit_pushf(dst); // pushf
+ emit_pushf(dst); // pushf
if (compute_hi)
{
if (zsflags == FLAG_Z)
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
else if (zsflags == FLAG_S)
- emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
+ emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
else
{
- emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
- emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
- emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
+ emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
+ emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
}
}
else
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
// we rely on the fact that OF is cleared by all logical operations above
if (vflag)
{
- emit_pushf(dst); // pushf
- emit_pop_r64(dst, REG_RAX); // pop rax
- emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
- emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
- emit_popf(dst); // popf
+ emit_pushf(dst); // pushf
+ emit_pop_r64(dst, REG_RAX); // pop rax
+ emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
+ emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
+ emit_popf(dst); // popf
}
}
}
@@ -4829,36 +4829,36 @@ void drcbe_x64::op_muls(x86code *&dst, const instruction &inst)
if (src1p.is_memory())
emit_imul_r64_m64_imm(dst, REG_RAX, MABS(src1p.memory()), src2p.immediate());// imul rax,[src1p],src2p
else if (src1p.is_int_register())
- emit_imul_r64_r64_imm(dst, REG_RAX, src1p.ireg(), src2p.immediate()); // imul rax,src1p,src2p
- emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
+ emit_imul_r64_r64_imm(dst, REG_RAX, src1p.ireg(), src2p.immediate()); // imul rax,src1p,src2p
+ emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
}
// 64-bit destination, general case
else if (!compute_hi)
{
- emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
+ emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
if (src2p.is_memory())
- emit_imul_r64_m64(dst, REG_RAX, MABS(src2p.memory())); // imul rax,[src2p]
+ emit_imul_r64_m64(dst, REG_RAX, MABS(src2p.memory())); // imul rax,[src2p]
else if (src2p.is_int_register())
- emit_imul_r64_r64(dst, REG_RAX, src2p.ireg()); // imul rax,src2p
- emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
+ emit_imul_r64_r64(dst, REG_RAX, src2p.ireg()); // imul rax,src2p
+ emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
}
// 128-bit destination, general case
else
{
- emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
+ emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
if (src2p.is_memory())
- emit_imul_m64(dst, MABS(src2p.memory())); // imul [src2p]
+ emit_imul_m64(dst, MABS(src2p.memory())); // imul [src2p]
else if (src2p.is_int_register())
- emit_imul_r64(dst, src2p.ireg()); // imul src2p
+ emit_imul_r64(dst, src2p.ireg()); // imul src2p
else if (src2p.is_immediate())
{
- emit_mov_r64_imm(dst, REG_RDX, src2p.immediate()); // mov rdx,src2p
- emit_imul_r64(dst, REG_RDX); // imul rdx
+ emit_mov_r64_imm(dst, REG_RDX, src2p.immediate()); // mov rdx,src2p
+ emit_imul_r64(dst, REG_RDX); // imul rdx
}
- emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
- emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
+ emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
+ emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
}
// compute flags
@@ -4867,32 +4867,32 @@ void drcbe_x64::op_muls(x86code *&dst, const instruction &inst)
if (zsflags != 0)
{
if (vflag)
- emit_pushf(dst); // pushf
+ emit_pushf(dst); // pushf
if (compute_hi)
{
if (zsflags == FLAG_Z)
- emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
+ emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
else if (zsflags == FLAG_S)
- emit_test_r64_r64(dst, REG_RDX, REG_RDX); // test rdx,rdx
+ emit_test_r64_r64(dst, REG_RDX, REG_RDX); // test rdx,rdx
else
{
- emit_mov_r32_r32(dst, REG_ECX, REG_EAX); // mov ecx,eax
- emit_shr_r64_imm(dst, REG_RAX, 32); // shr rax,32
- emit_or_r64_r64(dst, REG_RDX, REG_RCX); // or rdx,rcx
- emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
+ emit_mov_r32_r32(dst, REG_ECX, REG_EAX); // mov ecx,eax
+ emit_shr_r64_imm(dst, REG_RAX, 32); // shr rax,32
+ emit_or_r64_r64(dst, REG_RDX, REG_RCX); // or rdx,rcx
+ emit_or_r64_r64(dst, REG_RDX, REG_RAX); // or rdx,rax
}
}
else
- emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test rax,rax
+ emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test rax,rax
// we rely on the fact that OF is cleared by all logical operations above
if (vflag)
{
- emit_pushf(dst); // pushf
- emit_pop_r64(dst, REG_RAX); // pop rax
- emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
- emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
- emit_popf(dst); // popf
+ emit_pushf(dst); // pushf
+ emit_pop_r64(dst, REG_RAX); // pop rax
+ emit_and_m64_imm(dst, MBD(REG_RSP, 0), ~0x84); // and [rsp],~0x84
+ emit_or_m64_r64(dst, MBD(REG_RSP, 0), REG_RAX); // or [rsp],rax
+ emit_popf(dst); // popf
}
}
}
@@ -4922,46 +4922,46 @@ void drcbe_x64::op_divu(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
// general case
- emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
+ emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
if (inst.flags() != 0)
{
- emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
- emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
+ emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
+ emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
}
emit_link skip;
- emit_jecxz_link(dst, skip); // jecxz skip
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
- emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
- emit_div_r32(dst, REG_ECX); // div ecx
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_jecxz_link(dst, skip); // jecxz skip
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
+ emit_div_r32(dst, REG_ECX); // div ecx
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
if (compute_rem)
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
if (inst.flags() != 0)
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
- resolve_link(dst, skip); // skip:
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ resolve_link(dst, skip); // skip:
}
// 64-bit form
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, REG_RCX, src2p); // mov rcx,src2p
+ emit_mov_r64_p64(dst, REG_RCX, src2p); // mov rcx,src2p
if (inst.flags() != 0)
{
- emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
- emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
+ emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
+ emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
}
emit_link skip;
- emit_jrcxz_link(dst, skip); // jrcxz skip
- emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
- emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
- emit_div_r64(dst, REG_RCX); // div rcx
- emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
+ emit_jrcxz_link(dst, skip); // jrcxz skip
+ emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
+ emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
+ emit_div_r64(dst, REG_RCX); // div rcx
+ emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
if (compute_rem)
- emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
+ emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
if (inst.flags() != 0)
- emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test eax,eax
- resolve_link(dst, skip); // skip:
+ emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test eax,eax
+ resolve_link(dst, skip); // skip:
}
}
@@ -4988,46 +4988,46 @@ void drcbe_x64::op_divs(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
// general case
- emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
+ emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
if (inst.flags() != 0)
{
- emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
- emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
+ emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
+ emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
}
emit_link skip;
- emit_jecxz_link(dst, skip); // jecxz skip
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
- emit_cdq(dst); // cdq
- emit_idiv_r32(dst, REG_ECX); // idiv ecx
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_jecxz_link(dst, skip); // jecxz skip
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_cdq(dst); // cdq
+ emit_idiv_r32(dst, REG_ECX); // idiv ecx
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
if (compute_rem)
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
if (inst.flags() != 0)
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
- resolve_link(dst, skip); // skip:
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ resolve_link(dst, skip); // skip:
}
// 64-bit form
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, REG_RCX, src2p); // mov rcx,src2p
+ emit_mov_r64_p64(dst, REG_RCX, src2p); // mov rcx,src2p
if (inst.flags() != 0)
{
- emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
- emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
+ emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
+ emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
}
emit_link skip;
- emit_jrcxz_link(dst, skip); // jrcxz skip
- emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
- emit_cqo(dst); // cqo
- emit_idiv_r64(dst, REG_RCX); // idiv rcx
- emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
+ emit_jrcxz_link(dst, skip); // jrcxz skip
+ emit_mov_r64_p64(dst, REG_RAX, src1p); // mov rax,src1p
+ emit_cqo(dst); // cqo
+ emit_idiv_r64(dst, REG_RCX); // idiv rcx
+ emit_mov_p64_r64(dst, dstp, REG_RAX); // mov dstp,rax
if (compute_rem)
- emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
+ emit_mov_p64_r64(dst, edstp, REG_RDX); // mov edstp,rdx
if (inst.flags() != 0)
- emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test eax,eax
- resolve_link(dst, skip); // skip:
+ emit_test_r64_r64(dst, REG_RAX, REG_RAX); // test eax,eax
+ resolve_link(dst, skip); // skip:
}
}
@@ -5057,34 +5057,34 @@ void drcbe_x64::op_and(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_and_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
+ emit_and_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
// AND with immediate 0xff
else if (src2p.is_immediate_value(0xff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// AND with immediate 0xffff
else if (src2p.is_immediate_value(0xffff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_and_r32_p32(dst, dstreg, src2p, inst); // and dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_and_r32_p32(dst, dstreg, src2p, inst); // and dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5093,46 +5093,46 @@ void drcbe_x64::op_and(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_and_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
+ emit_and_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
// AND with immediate 0xff
else if (src2p.is_immediate_value(0xff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
// AND with immediate 0xffff
else if (src2p.is_immediate_value(0xffff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
// AND with immediate 0xffffffff
else if (src2p.is_immediate_value(0xffffffff) && inst.flags() == 0)
{
if (dstp.is_int_register() && src1p == dstp)
- emit_mov_r32_r32(dst, dstreg, dstreg); // mov dstreg,dstreg
+ emit_mov_r32_r32(dst, dstreg, dstreg); // mov dstreg,dstreg
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_and_r64_p64(dst, dstreg, src2p, inst); // and dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_and_r64_p64(dst, dstreg, src2p, inst); // and dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5162,13 +5162,13 @@ void drcbe_x64::op_test(x86code *&dst, const instruction &inst)
{
// src1p in memory
if (src1p.is_memory())
- emit_test_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // test [src1p],src2p
+ emit_test_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // test [src1p],src2p
// general case
else
{
- emit_mov_r32_p32(dst, src1reg, src1p); // mov src1reg,src1p
- emit_test_r32_p32(dst, src1reg, src2p, inst); // test src1reg,src2p
+ emit_mov_r32_p32(dst, src1reg, src1p); // mov src1reg,src1p
+ emit_test_r32_p32(dst, src1reg, src2p, inst); // test src1reg,src2p
}
}
@@ -5177,13 +5177,13 @@ void drcbe_x64::op_test(x86code *&dst, const instruction &inst)
{
// src1p in memory
if (src1p.is_memory())
- emit_test_m64_p64(dst, MABS(src1p.memory()), src2p, inst); // test [src1p],src2p
+ emit_test_m64_p64(dst, MABS(src1p.memory()), src2p, inst); // test [src1p],src2p
// general case
else
{
- emit_mov_r64_p64(dst, src1reg, src1p); // mov src1reg,src1p
- emit_test_r64_p64(dst, src1reg, src2p, inst); // test src1reg,src2p
+ emit_mov_r64_p64(dst, src1reg, src1p); // mov src1reg,src1p
+ emit_test_r64_p64(dst, src1reg, src2p, inst); // test src1reg,src2p
}
}
}
@@ -5214,14 +5214,14 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_or_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
+ emit_or_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_or_r32_p32(dst, dstreg, src2p, inst); // or dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_or_r32_p32(dst, dstreg, src2p, inst); // or dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5230,14 +5230,14 @@ void drcbe_x64::op_or(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_or_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
+ emit_or_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_or_r64_p64(dst, dstreg, src2p, inst); // or dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_or_r64_p64(dst, dstreg, src2p, inst); // or dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5268,14 +5268,14 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_xor_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
+ emit_xor_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_xor_r32_p32(dst, dstreg, src2p, inst); // xor dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_xor_r32_p32(dst, dstreg, src2p, inst); // xor dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5284,14 +5284,14 @@ void drcbe_x64::op_xor(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_xor_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
+ emit_xor_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_xor_r64_p64(dst, dstreg, src2p, inst); // xor dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_xor_r64_p64(dst, dstreg, src2p, inst); // xor dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5318,23 +5318,23 @@ void drcbe_x64::op_lzcnt(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
- emit_mov_r32_imm(dst, REG_ECX, 32 ^ 31); // mov ecx,32 ^ 31
- emit_bsr_r32_r32(dst, dstreg, dstreg); // bsr dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_xor_r32_imm(dst, dstreg, 31); // xor dstreg,31
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_mov_r32_imm(dst, REG_ECX, 32 ^ 31); // mov ecx,32 ^ 31
+ emit_bsr_r32_r32(dst, dstreg, dstreg); // bsr dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x64emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_xor_r32_imm(dst, dstreg, 31); // xor dstreg,31
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,src1p
- emit_mov_r64_imm(dst, REG_RCX, 64 ^ 63); // mov rcx,64 ^ 63
- emit_bsr_r64_r64(dst, dstreg, dstreg); // bsr dstreg,dstreg
- emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
- emit_xor_r32_imm(dst, dstreg, 63); // xor dstreg,63
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_mov_r64_imm(dst, REG_RCX, 64 ^ 63); // mov rcx,64 ^ 63
+ emit_bsr_r64_r64(dst, dstreg, dstreg); // bsr dstreg,dstreg
+ emit_cmovcc_r64_r64(dst, x64emit::COND_Z, dstreg, REG_RCX); // cmovz dstreg,rcx
+ emit_xor_r32_imm(dst, dstreg, 63); // xor dstreg,63
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5360,21 +5360,21 @@ void drcbe_x64::op_bswap(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
- emit_bswap_r32(dst, dstreg); // bswap dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_bswap_r32(dst, dstreg); // bswap dstreg
if (inst.flags() != 0)
- emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,src1p
- emit_bswap_r64(dst, dstreg); // bswap dstreg
+ emit_mov_r64_p64(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_bswap_r64(dst, dstreg); // bswap dstreg
if (inst.flags() != 0)
- emit_test_r64_r64(dst, dstreg, dstreg); // test dstreg,dstreg
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_test_r64_r64(dst, dstreg, dstreg); // test dstreg,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5403,14 +5403,14 @@ void drcbe_x64::op_shl(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_shl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shl [dstp],src2p
+ emit_shl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shl [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_shl_r32_p32(dst, dstreg, src2p, inst); // shl dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_shl_r32_p32(dst, dstreg, src2p, inst); // shl dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5419,14 +5419,14 @@ void drcbe_x64::op_shl(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_shl_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // shl [dstp],src2p
+ emit_shl_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // shl [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_shl_r64_p64(dst, dstreg, src2p, inst); // shl dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_shl_r64_p64(dst, dstreg, src2p, inst); // shl dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5456,14 +5456,14 @@ void drcbe_x64::op_shr(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_shr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shr [dstp],src2p
+ emit_shr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shr [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_shr_r32_p32(dst, dstreg, src2p, inst); // shr dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_shr_r32_p32(dst, dstreg, src2p, inst); // shr dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5472,14 +5472,14 @@ void drcbe_x64::op_shr(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_shr_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // shr [dstp],src2p
+ emit_shr_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // shr [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_shr_r64_p64(dst, dstreg, src2p, inst); // shr dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_shr_r64_p64(dst, dstreg, src2p, inst); // shr dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5509,14 +5509,14 @@ void drcbe_x64::op_sar(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sar_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sar [dstp],src2p
+ emit_sar_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sar [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sar_r32_p32(dst, dstreg, src2p, inst); // sar dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sar_r32_p32(dst, dstreg, src2p, inst); // sar dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5525,14 +5525,14 @@ void drcbe_x64::op_sar(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sar_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sar [dstp],src2p
+ emit_sar_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sar [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sar_r64_p64(dst, dstreg, src2p, inst); // sar dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sar_r64_p64(dst, dstreg, src2p, inst); // sar dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5562,14 +5562,14 @@ void drcbe_x64::op_rol(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rol_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rol [dstp],src2p
+ emit_rol_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rol [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rol_r32_p32(dst, dstreg, src2p, inst); // rol dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rol_r32_p32(dst, dstreg, src2p, inst); // rol dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5578,14 +5578,14 @@ void drcbe_x64::op_rol(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rol_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // rol [dstp],src2p
+ emit_rol_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // rol [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rol_r64_p64(dst, dstreg, src2p, inst); // rol dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rol_r64_p64(dst, dstreg, src2p, inst); // rol dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5615,14 +5615,14 @@ void drcbe_x64::op_ror(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_ror_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // ror [dstp],src2p
+ emit_ror_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // ror [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_ror_r32_p32(dst, dstreg, src2p, inst); // ror dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_ror_r32_p32(dst, dstreg, src2p, inst); // ror dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5631,14 +5631,14 @@ void drcbe_x64::op_ror(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_ror_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // ror [dstp],src2p
+ emit_ror_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // ror [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
- emit_ror_r64_p64(dst, dstreg, src2p, inst); // ror dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_ror_r64_p64(dst, dstreg, src2p, inst); // ror dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5668,14 +5668,14 @@ void drcbe_x64::op_rolc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rcl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcl [dstp],src2p
+ emit_rcl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcl [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rcl_r32_p32(dst, dstreg, src2p, inst); // rcl dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rcl_r32_p32(dst, dstreg, src2p, inst); // rcl dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5684,14 +5684,14 @@ void drcbe_x64::op_rolc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rcl_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // rcl [dstp],src2p
+ emit_rcl_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // rcl [dstp],src2p
// general case
else
{
- emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rcl_r64_p64(dst, dstreg, src2p, inst); // rcl dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rcl_r64_p64(dst, dstreg, src2p, inst); // rcl dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5721,14 +5721,14 @@ void drcbe_x64::op_rorc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rcr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcr [dstp],src2p
+ emit_rcr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcr [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rcr_r32_p32(dst, dstreg, src2p, inst); // rcr dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rcr_r32_p32(dst, dstreg, src2p, inst); // rcr dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5737,14 +5737,14 @@ void drcbe_x64::op_rorc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rcr_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // rcr [dstp],src2p
+ emit_rcr_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // rcr [dstp],src2p
// general case
else
{
- emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rcr_r64_p64(dst, dstreg, src2p, inst); // rcr dstreg,src2p
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r64_p64_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rcr_r64_p64(dst, dstreg, src2p, inst); // rcr dstreg,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
}
}
}
@@ -5782,28 +5782,28 @@ void drcbe_x64::op_fload(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
if (indp.is_immediate())
- emit_movss_r128_m32(dst, dstreg, MBD(basereg, baseoffs + 4*indp.immediate())); // movss dstreg,[basep + 4*indp]
+ emit_movss_r128_m32(dst, dstreg, MBD(basereg, baseoffs + 4*indp.immediate())); // movss dstreg,[basep + 4*indp]
else
{
int indreg = indp.select_register(REG_ECX);
- emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
- emit_movss_r128_m32(dst, dstreg, MBISD(basereg, indreg, 4, baseoffs)); // movss dstreg,[basep + 4*indp]
+ emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
+ emit_movss_r128_m32(dst, dstreg, MBISD(basereg, indreg, 4, baseoffs)); // movss dstreg,[basep + 4*indp]
}
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
if (indp.is_immediate())
- emit_movsd_r128_m64(dst, dstreg, MBD(basereg, baseoffs + 8*indp.immediate())); // movsd dstreg,[basep + 8*indp]
+ emit_movsd_r128_m64(dst, dstreg, MBD(basereg, baseoffs + 8*indp.immediate())); // movsd dstreg,[basep + 8*indp]
else
{
int indreg = indp.select_register(REG_ECX);
- emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
- emit_movsd_r128_m64(dst, dstreg, MBISD(basereg, indreg, 8, baseoffs)); // movsd dstreg,[basep + 8*indp]
+ emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
+ emit_movsd_r128_m64(dst, dstreg, MBISD(basereg, indreg, 8, baseoffs)); // movsd dstreg,[basep + 8*indp]
}
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -5834,28 +5834,28 @@ void drcbe_x64::op_fstore(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, srcreg, srcp); // movss srcreg,srcp
+ emit_movss_r128_p32(dst, srcreg, srcp); // movss srcreg,srcp
if (indp.is_immediate())
- emit_movss_m32_r128(dst, MBD(basereg, baseoffs + 4*indp.immediate()), srcreg); // movss [basep + 4*indp],srcreg
+ emit_movss_m32_r128(dst, MBD(basereg, baseoffs + 4*indp.immediate()), srcreg); // movss [basep + 4*indp],srcreg
else
{
int indreg = indp.select_register(REG_ECX);
- emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
- emit_movss_m32_r128(dst, MBISD(basereg, indreg, 4, baseoffs), srcreg); // movss [basep + 4*indp],srcreg
+ emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
+ emit_movss_m32_r128(dst, MBISD(basereg, indreg, 4, baseoffs), srcreg); // movss [basep + 4*indp],srcreg
}
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, srcreg, srcp); // movsd srcreg,srcp
+ emit_movsd_r128_p64(dst, srcreg, srcp); // movsd srcreg,srcp
if (indp.is_immediate())
- emit_movsd_m64_r128(dst, MBD(basereg, baseoffs + 8*indp.immediate()), srcreg); // movsd [basep + 8*indp],srcreg
+ emit_movsd_m64_r128(dst, MBD(basereg, baseoffs + 8*indp.immediate()), srcreg); // movsd [basep + 8*indp],srcreg
else
{
int indreg = indp.select_register(REG_ECX);
- emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
- emit_movsd_m64_r128(dst, MBISD(basereg, indreg, 8, baseoffs), srcreg); // movsd [basep + 8*indp],srcreg
+ emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
+ emit_movsd_m64_r128(dst, MBISD(basereg, indreg, 8, baseoffs), srcreg); // movsd [basep + 8*indp],srcreg
}
}
}
@@ -5880,27 +5880,27 @@ void drcbe_x64::op_fread(x86code *&dst, const instruction &inst)
assert((1 << spacep.size()) == inst.size());
// set up a call to the read dword/qword handler
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacep.space()])); // mov param1,space
- emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacep.space()])); // mov param1,space
+ emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param2,addrp
if (inst.size() == 4)
- emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].read_dword); // call read_dword
+ emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].read_dword); // call read_dword
else if (inst.size() == 8)
- emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].read_qword); // call read_qword
+ emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].read_qword); // call read_qword
// store result
if (inst.size() == 4)
{
if (dstp.is_memory())
- emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
else if (dstp.is_float_register())
- emit_movd_r128_r32(dst, dstp.freg(), REG_EAX); // movd dstp,eax
+ emit_movd_r128_r32(dst, dstp.freg(), REG_EAX); // movd dstp,eax
}
else if (inst.size() == 8)
{
if (dstp.is_memory())
- emit_mov_m64_r64(dst, MABS(dstp.memory()), REG_RAX); // mov [dstp],rax
+ emit_mov_m64_r64(dst, MABS(dstp.memory()), REG_RAX); // mov [dstp],rax
else if (dstp.is_float_register())
- emit_movq_r128_r64(dst, dstp.freg(), REG_RAX); // movq dstp,rax
+ emit_movq_r128_r64(dst, dstp.freg(), REG_RAX); // movq dstp,rax
}
}
@@ -5924,27 +5924,27 @@ void drcbe_x64::op_fwrite(x86code *&dst, const instruction &inst)
assert((1 << spacep.size()) == inst.size());
// general case
- emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacep.space()])); // mov param1,space
- emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param21,addrp
+ emit_mov_r64_imm(dst, REG_PARAM1, (FPTR)(m_space[spacep.space()])); // mov param1,space
+ emit_mov_r32_p32(dst, REG_PARAM2, addrp); // mov param21,addrp
// 32-bit form
if (inst.size() == 4)
{
if (srcp.is_memory())
- emit_mov_r32_m32(dst, REG_PARAM3, MABS(srcp.memory())); // mov param3,[srcp]
+ emit_mov_r32_m32(dst, REG_PARAM3, MABS(srcp.memory())); // mov param3,[srcp]
else if (srcp.is_float_register())
- emit_movd_r32_r128(dst, REG_PARAM3, srcp.freg()); // movd param3,srcp
- emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].write_dword); // call write_dword
+ emit_movd_r32_r128(dst, REG_PARAM3, srcp.freg()); // movd param3,srcp
+ emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].write_dword); // call write_dword
}
// 64-bit form
else if (inst.size() == 8)
{
if (srcp.is_memory())
- emit_mov_r64_m64(dst, REG_PARAM3, MABS(srcp.memory())); // mov param3,[srcp]
+ emit_mov_r64_m64(dst, REG_PARAM3, MABS(srcp.memory())); // mov param3,[srcp]
else if (srcp.is_float_register())
- emit_movq_r64_r128(dst, REG_PARAM3, srcp.freg()); // movq param3,srcp
- emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].write_qword); // call write_qword
+ emit_movq_r64_r128(dst, REG_PARAM3, srcp.freg()); // movq param3,srcp
+ emit_smart_call_m64(dst, (x86code **)&m_accessors[spacep.space()].write_qword); // call write_qword
}
}
@@ -5970,25 +5970,25 @@ void drcbe_x64::op_fmov(x86code *&dst, const instruction &inst)
// always start with a jmp
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, dstreg, srcp); // movss dstreg,srcp
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_movss_r128_p32(dst, dstreg, srcp); // movss dstreg,srcp
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, dstreg, srcp); // movsd dstreg,srcp
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_movsd_r128_p64(dst, dstreg, srcp); // movsd dstreg,srcp
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
// resolve the jump
if (inst.condition() != uml::COND_ALWAYS)
- resolve_link(dst, skip); // skip:
+ resolve_link(dst, skip); // skip:
}
@@ -6017,8 +6017,8 @@ void drcbe_x64::op_ftoint(x86code *&dst, const instruction &inst)
// set rounding mode if necessary
if (roundp.rounding() != ROUND_DEFAULT && roundp.rounding() != ROUND_TRUNC)
{
- emit_stmxcsr_m32(dst, MABS(&m_near.ssemodesave)); // stmxcsr [ssemodesave]
- emit_ldmxcsr_m32(dst, MABS(&m_near.ssecontrol[roundp.rounding()])); // ldmxcsr fpcontrol[mode]
+ emit_stmxcsr_m32(dst, MABS(&m_near.ssemodesave)); // stmxcsr [ssemodesave]
+ emit_ldmxcsr_m32(dst, MABS(&m_near.ssecontrol[roundp.rounding()])); // ldmxcsr fpcontrol[mode]
}
// 32-bit form
@@ -6030,16 +6030,16 @@ void drcbe_x64::op_ftoint(x86code *&dst, const instruction &inst)
if (srcp.is_memory())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtss2si_r32_m32(dst, dstreg, MABS(srcp.memory())); // cvtss2si dstreg,[srcp]
+ emit_cvtss2si_r32_m32(dst, dstreg, MABS(srcp.memory())); // cvtss2si dstreg,[srcp]
else
- emit_cvttss2si_r32_m32(dst, dstreg, MABS(srcp.memory())); // cvttss2si dstreg,[srcp]
+ emit_cvttss2si_r32_m32(dst, dstreg, MABS(srcp.memory())); // cvttss2si dstreg,[srcp]
}
else if (srcp.is_float_register())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtss2si_r32_r128(dst, dstreg, srcp.freg()); // cvtss2si dstreg,srcp
+ emit_cvtss2si_r32_r128(dst, dstreg, srcp.freg()); // cvtss2si dstreg,srcp
else
- emit_cvttss2si_r32_r128(dst, dstreg, srcp.freg()); // cvttss2si dstreg,srcp
+ emit_cvttss2si_r32_r128(dst, dstreg, srcp.freg()); // cvttss2si dstreg,srcp
}
}
@@ -6049,16 +6049,16 @@ void drcbe_x64::op_ftoint(x86code *&dst, const instruction &inst)
if (srcp.is_memory())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtss2si_r64_m32(dst, dstreg, MABS(srcp.memory())); // cvtss2si dstreg,[srcp]
+ emit_cvtss2si_r64_m32(dst, dstreg, MABS(srcp.memory())); // cvtss2si dstreg,[srcp]
else
- emit_cvttss2si_r64_m32(dst, dstreg, MABS(srcp.memory())); // cvttss2si dstreg,[srcp]
+ emit_cvttss2si_r64_m32(dst, dstreg, MABS(srcp.memory())); // cvttss2si dstreg,[srcp]
}
else if (srcp.is_float_register())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtss2si_r64_r128(dst, dstreg, srcp.freg()); // cvtss2si dstreg,srcp
+ emit_cvtss2si_r64_r128(dst, dstreg, srcp.freg()); // cvtss2si dstreg,srcp
else
- emit_cvttss2si_r64_r128(dst, dstreg, srcp.freg()); // cvttss2si dstreg,srcp
+ emit_cvttss2si_r64_r128(dst, dstreg, srcp.freg()); // cvttss2si dstreg,srcp
}
}
}
@@ -6072,16 +6072,16 @@ void drcbe_x64::op_ftoint(x86code *&dst, const instruction &inst)
if (srcp.is_memory())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtsd2si_r32_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2si dstreg,[srcp]
+ emit_cvtsd2si_r32_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2si dstreg,[srcp]
else
- emit_cvttsd2si_r32_m64(dst, dstreg, MABS(srcp.memory())); // cvttsd2si dstreg,[srcp]
+ emit_cvttsd2si_r32_m64(dst, dstreg, MABS(srcp.memory())); // cvttsd2si dstreg,[srcp]
}
else if (srcp.is_float_register())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtsd2si_r32_r128(dst, dstreg, srcp.freg()); // cvtsd2si dstreg,srcp
+ emit_cvtsd2si_r32_r128(dst, dstreg, srcp.freg()); // cvtsd2si dstreg,srcp
else
- emit_cvttsd2si_r32_r128(dst, dstreg, srcp.freg()); // cvttsd2si dstreg,srcp
+ emit_cvttsd2si_r32_r128(dst, dstreg, srcp.freg()); // cvttsd2si dstreg,srcp
}
}
@@ -6091,29 +6091,29 @@ void drcbe_x64::op_ftoint(x86code *&dst, const instruction &inst)
if (srcp.is_memory())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtsd2si_r64_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2si dstreg,[srcp]
+ emit_cvtsd2si_r64_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2si dstreg,[srcp]
else
- emit_cvttsd2si_r64_m64(dst, dstreg, MABS(srcp.memory())); // cvttsd2si dstreg,[srcp]
+ emit_cvttsd2si_r64_m64(dst, dstreg, MABS(srcp.memory())); // cvttsd2si dstreg,[srcp]
}
else if (srcp.is_float_register())
{
if (roundp.rounding() != ROUND_TRUNC)
- emit_cvtsd2si_r64_r128(dst, dstreg, srcp.freg()); // cvtsd2si dstreg,srcp
+ emit_cvtsd2si_r64_r128(dst, dstreg, srcp.freg()); // cvtsd2si dstreg,srcp
else
- emit_cvttsd2si_r64_r128(dst, dstreg, srcp.freg()); // cvttsd2si dstreg,srcp
+ emit_cvttsd2si_r64_r128(dst, dstreg, srcp.freg()); // cvttsd2si dstreg,srcp
}
}
}
// general case
if (sizep.size() == SIZE_DWORD)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
else
- emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p64_r64(dst, dstp, dstreg); // mov dstp,dstreg
// restore rounding mode
if (roundp.rounding() != ROUND_DEFAULT && roundp.rounding() != ROUND_TRUNC)
- emit_ldmxcsr_m32(dst, MABS(&m_near.ssemodesave)); // ldmxcsr [ssemodesave]
+ emit_ldmxcsr_m32(dst, MABS(&m_near.ssemodesave)); // ldmxcsr [ssemodesave]
}
@@ -6144,12 +6144,12 @@ void drcbe_x64::op_ffrint(x86code *&dst, const instruction &inst)
if (sizep.size() == SIZE_DWORD)
{
if (srcp.is_memory())
- emit_cvtsi2ss_r128_m32(dst, dstreg, MABS(srcp.memory())); // cvtsi2ss dstreg,[srcp]
+ emit_cvtsi2ss_r128_m32(dst, dstreg, MABS(srcp.memory())); // cvtsi2ss dstreg,[srcp]
else
{
int srcreg = srcp.select_register(REG_EAX);
- emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
- emit_cvtsi2ss_r128_r32(dst, dstreg, srcreg); // cvtsi2ss dstreg,srcreg
+ emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_cvtsi2ss_r128_r32(dst, dstreg, srcreg); // cvtsi2ss dstreg,srcreg
}
}
@@ -6157,15 +6157,15 @@ void drcbe_x64::op_ffrint(x86code *&dst, const instruction &inst)
else
{
if (srcp.is_memory())
- emit_cvtsi2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsi2ss dstreg,[srcp]
+ emit_cvtsi2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsi2ss dstreg,[srcp]
else
{
int srcreg = srcp.select_register(REG_RAX);
- emit_mov_r64_p64(dst, srcreg, srcp); // mov srcreg,srcp
- emit_cvtsi2ss_r128_r64(dst, dstreg, srcreg); // cvtsi2ss dstreg,srcreg
+ emit_mov_r64_p64(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_cvtsi2ss_r128_r64(dst, dstreg, srcreg); // cvtsi2ss dstreg,srcreg
}
}
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
@@ -6175,12 +6175,12 @@ void drcbe_x64::op_ffrint(x86code *&dst, const instruction &inst)
if (sizep.size() == SIZE_DWORD)
{
if (srcp.is_memory())
- emit_cvtsi2sd_r128_m32(dst, dstreg, MABS(srcp.memory())); // cvtsi2sd dstreg,[srcp]
+ emit_cvtsi2sd_r128_m32(dst, dstreg, MABS(srcp.memory())); // cvtsi2sd dstreg,[srcp]
else
{
int srcreg = srcp.select_register(REG_EAX);
- emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
- emit_cvtsi2sd_r128_r32(dst, dstreg, srcreg); // cvtsi2sd dstreg,srcreg
+ emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_cvtsi2sd_r128_r32(dst, dstreg, srcreg); // cvtsi2sd dstreg,srcreg
}
}
@@ -6188,15 +6188,15 @@ void drcbe_x64::op_ffrint(x86code *&dst, const instruction &inst)
else
{
if (srcp.is_memory())
- emit_cvtsi2sd_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsi2sd dstreg,[srcp]
+ emit_cvtsi2sd_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsi2sd dstreg,[srcp]
else
{
int srcreg = srcp.select_register(REG_EAX);
- emit_mov_r64_p64(dst, srcreg, srcp); // mov srcreg,srcp
- emit_cvtsi2sd_r128_r64(dst, dstreg, srcreg); // cvtsi2sd dstreg,srcreg
+ emit_mov_r64_p64(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_cvtsi2sd_r128_r64(dst, dstreg, srcreg); // cvtsi2sd dstreg,srcreg
}
}
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6225,20 +6225,20 @@ void drcbe_x64::op_ffrflt(x86code *&dst, const instruction &inst)
if (inst.size() == 8 && sizep.size() == SIZE_DWORD)
{
if (srcp.is_memory())
- emit_cvtss2sd_r128_m32(dst, dstreg, MABS(srcp.memory())); // cvtss2sd dstreg,[srcp]
+ emit_cvtss2sd_r128_m32(dst, dstreg, MABS(srcp.memory())); // cvtss2sd dstreg,[srcp]
else if (srcp.is_float_register())
- emit_cvtss2sd_r128_r128(dst, dstreg, srcp.freg()); // cvtss2sd dstreg,srcp
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_cvtss2sd_r128_r128(dst, dstreg, srcp.freg()); // cvtss2sd dstreg,srcp
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
// double-to-single
else if (inst.size() == 4 && sizep.size() == SIZE_QWORD)
{
if (srcp.is_memory())
- emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
+ emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
}
@@ -6263,11 +6263,11 @@ void drcbe_x64::op_frnds(x86code *&dst, const instruction &inst)
// 64-bit form
if (srcp.is_memory())
- emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
+ emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
- emit_cvtss2sd_r128_r128(dst, dstreg, dstreg); // cvtss2sd dstreg,dstreg
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
+ emit_cvtss2sd_r128_r128(dst, dstreg, dstreg); // cvtss2sd dstreg,dstreg
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
@@ -6294,23 +6294,23 @@ void drcbe_x64::op_fadd(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
+ emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
- emit_addss_r128_m32(dst, dstreg, MABS(src2p.memory())); // addss dstreg,[src2p]
+ emit_addss_r128_m32(dst, dstreg, MABS(src2p.memory())); // addss dstreg,[src2p]
else if (src2p.is_float_register())
- emit_addss_r128_r128(dst, dstreg, src2p.freg()); // addss dstreg,src2p
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_addss_r128_r128(dst, dstreg, src2p.freg()); // addss dstreg,src2p
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
+ emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
- emit_addsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // addsd dstreg,[src2p]
+ emit_addsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // addsd dstreg,[src2p]
else if (src2p.is_float_register())
- emit_addsd_r128_r128(dst, dstreg, src2p.freg()); // addsd dstreg,src2p
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_addsd_r128_r128(dst, dstreg, src2p.freg()); // addsd dstreg,src2p
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6337,23 +6337,23 @@ void drcbe_x64::op_fsub(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
+ emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
- emit_subss_r128_m32(dst, dstreg, MABS(src2p.memory())); // subss dstreg,[src2p]
+ emit_subss_r128_m32(dst, dstreg, MABS(src2p.memory())); // subss dstreg,[src2p]
else if (src2p.is_float_register())
- emit_subss_r128_r128(dst, dstreg, src2p.freg()); // subss dstreg,src2p
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_subss_r128_r128(dst, dstreg, src2p.freg()); // subss dstreg,src2p
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
+ emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
- emit_subsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // subsd dstreg,[src2p]
+ emit_subsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // subsd dstreg,[src2p]
else if (src2p.is_float_register())
- emit_subsd_r128_r128(dst, dstreg, src2p.freg()); // subsd dstreg,src2p
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_subsd_r128_r128(dst, dstreg, src2p.freg()); // subsd dstreg,src2p
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6379,21 +6379,21 @@ void drcbe_x64::op_fcmp(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, src1reg, src1p); // movss src1reg,src1p
+ emit_movss_r128_p32(dst, src1reg, src1p); // movss src1reg,src1p
if (src2p.is_memory())
- emit_comiss_r128_m32(dst, src1reg, MABS(src2p.memory())); // comiss src1reg,[src2p]
+ emit_comiss_r128_m32(dst, src1reg, MABS(src2p.memory())); // comiss src1reg,[src2p]
else if (src2p.is_float_register())
- emit_comiss_r128_r128(dst, src1reg, src2p.freg()); // comiss src1reg,src2p
+ emit_comiss_r128_r128(dst, src1reg, src2p.freg()); // comiss src1reg,src2p
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, src1reg, src1p); // movsd src1reg,src1p
+ emit_movsd_r128_p64(dst, src1reg, src1p); // movsd src1reg,src1p
if (src2p.is_memory())
- emit_comisd_r128_m64(dst, src1reg, MABS(src2p.memory())); // comisd src1reg,[src2p]
+ emit_comisd_r128_m64(dst, src1reg, MABS(src2p.memory())); // comisd src1reg,[src2p]
else if (src2p.is_float_register())
- emit_comisd_r128_r128(dst, src1reg, src2p.freg()); // comisd src1reg,src2p
+ emit_comisd_r128_r128(dst, src1reg, src2p.freg()); // comisd src1reg,src2p
}
}
@@ -6421,23 +6421,23 @@ void drcbe_x64::op_fmul(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
+ emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
- emit_mulss_r128_m32(dst, dstreg, MABS(src2p.memory())); // mulss dstreg,[src2p]
+ emit_mulss_r128_m32(dst, dstreg, MABS(src2p.memory())); // mulss dstreg,[src2p]
else if (src2p.is_float_register())
- emit_mulss_r128_r128(dst, dstreg, src2p.freg()); // mulss dstreg,src2p
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_mulss_r128_r128(dst, dstreg, src2p.freg()); // mulss dstreg,src2p
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
+ emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
- emit_mulsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // mulsd dstreg,[src2p]
+ emit_mulsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // mulsd dstreg,[src2p]
else if (src2p.is_float_register())
- emit_mulsd_r128_r128(dst, dstreg, src2p.freg()); // mulsd dstreg,src2p
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_mulsd_r128_r128(dst, dstreg, src2p.freg()); // mulsd dstreg,src2p
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6464,23 +6464,23 @@ void drcbe_x64::op_fdiv(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
+ emit_movss_r128_p32(dst, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
- emit_divss_r128_m32(dst, dstreg, MABS(src2p.memory())); // divss dstreg,[src2p]
+ emit_divss_r128_m32(dst, dstreg, MABS(src2p.memory())); // divss dstreg,[src2p]
else if (src2p.is_float_register())
- emit_divss_r128_r128(dst, dstreg, src2p.freg()); // divss dstreg,src2p
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_divss_r128_r128(dst, dstreg, src2p.freg()); // divss dstreg,src2p
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
+ emit_movsd_r128_p64(dst, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
- emit_divsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // divsd dstreg,[src2p]
+ emit_divsd_r128_m64(dst, dstreg, MABS(src2p.memory())); // divsd dstreg,[src2p]
else if (src2p.is_float_register())
- emit_divsd_r128_r128(dst, dstreg, src2p.freg()); // divsd dstreg,src2p
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_divsd_r128_r128(dst, dstreg, src2p.freg()); // divsd dstreg,src2p
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6506,23 +6506,23 @@ void drcbe_x64::op_fneg(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_xorps_r128_r128(dst, dstreg, dstreg); // xorps dstreg,dstreg
+ emit_xorps_r128_r128(dst, dstreg, dstreg); // xorps dstreg,dstreg
if (srcp.is_memory())
- emit_subss_r128_m32(dst, dstreg, MABS(srcp.memory())); // subss dstreg,[srcp]
+ emit_subss_r128_m32(dst, dstreg, MABS(srcp.memory())); // subss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_subss_r128_r128(dst, dstreg, srcp.freg()); // subss dstreg,srcp
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_subss_r128_r128(dst, dstreg, srcp.freg()); // subss dstreg,srcp
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_xorpd_r128_r128(dst, dstreg, dstreg); // xorpd dstreg,dstreg
+ emit_xorpd_r128_r128(dst, dstreg, dstreg); // xorpd dstreg,dstreg
if (srcp.is_memory())
- emit_subsd_r128_m64(dst, dstreg, MABS(srcp.memory())); // subsd dstreg,[srcp]
+ emit_subsd_r128_m64(dst, dstreg, MABS(srcp.memory())); // subsd dstreg,[srcp]
else if (srcp.is_float_register())
- emit_subsd_r128_r128(dst, dstreg, srcp.freg()); // subsd dstreg,srcp
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_subsd_r128_r128(dst, dstreg, srcp.freg()); // subsd dstreg,srcp
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6548,17 +6548,17 @@ void drcbe_x64::op_fabs(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_movss_r128_p32(dst, dstreg, srcp); // movss dstreg,srcp
- emit_andps_r128_m128(dst, dstreg, MABS(m_absmask32)); // andps dstreg,[absmask32]
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_movss_r128_p32(dst, dstreg, srcp); // movss dstreg,srcp
+ emit_andps_r128_m128(dst, dstreg, MABS(m_absmask32)); // andps dstreg,[absmask32]
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_movsd_r128_p64(dst, dstreg, srcp); // movsd dstreg,srcp
- emit_andpd_r128_m128(dst, dstreg, MABS(m_absmask64)); // andpd dstreg,[absmask64]
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_movsd_r128_p64(dst, dstreg, srcp); // movsd dstreg,srcp
+ emit_andpd_r128_m128(dst, dstreg, MABS(m_absmask64)); // andpd dstreg,[absmask64]
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6585,20 +6585,20 @@ void drcbe_x64::op_fsqrt(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
if (srcp.is_memory())
- emit_sqrtss_r128_m32(dst, dstreg, MABS(srcp.memory())); // sqrtss dstreg,[srcp]
+ emit_sqrtss_r128_m32(dst, dstreg, MABS(srcp.memory())); // sqrtss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_sqrtss_r128_r128(dst, dstreg, srcp.freg()); // sqrtss dstreg,srcp
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_sqrtss_r128_r128(dst, dstreg, srcp.freg()); // sqrtss dstreg,srcp
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
if (srcp.is_memory())
- emit_sqrtsd_r128_m64(dst, dstreg, MABS(srcp.memory())); // sqrtsd dstreg,[srcp]
+ emit_sqrtsd_r128_m64(dst, dstreg, MABS(srcp.memory())); // sqrtsd dstreg,[srcp]
else if (srcp.is_float_register())
- emit_sqrtsd_r128_r128(dst, dstreg, srcp.freg()); // sqrtsd dstreg,srcp
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_sqrtsd_r128_r128(dst, dstreg, srcp.freg()); // sqrtsd dstreg,srcp
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
@@ -6627,19 +6627,19 @@ void drcbe_x64::op_frecip(x86code *&dst, const instruction &inst)
if (USE_RCPSS_FOR_SINGLES)
{
if (srcp.is_memory())
- emit_rcpss_r128_m32(dst, dstreg, MABS(srcp.memory())); // rcpss dstreg,[srcp]
+ emit_rcpss_r128_m32(dst, dstreg, MABS(srcp.memory())); // rcpss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_rcpss_r128_r128(dst, dstreg, srcp.freg()); // rcpss dstreg,srcp
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_rcpss_r128_r128(dst, dstreg, srcp.freg()); // rcpss dstreg,srcp
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
else
{
- emit_movss_r128_m32(dst, REG_XMM1, MABS(&m_near.single1)); // movss xmm1,1.0
+ emit_movss_r128_m32(dst, REG_XMM1, MABS(&m_near.single1)); // movss xmm1,1.0
if (srcp.is_memory())
- emit_divss_r128_m32(dst, REG_XMM1, MABS(srcp.memory())); // divss xmm1,[srcp]
+ emit_divss_r128_m32(dst, REG_XMM1, MABS(srcp.memory())); // divss xmm1,[srcp]
else if (srcp.is_float_register())
- emit_divss_r128_r128(dst, REG_XMM1, srcp.freg()); // divss xmm1,srcp
- emit_movss_p32_r128(dst, dstp, REG_XMM1); // movss dstp,xmm1
+ emit_divss_r128_r128(dst, REG_XMM1, srcp.freg()); // divss xmm1,srcp
+ emit_movss_p32_r128(dst, dstp, REG_XMM1); // movss dstp,xmm1
}
}
@@ -6649,21 +6649,21 @@ void drcbe_x64::op_frecip(x86code *&dst, const instruction &inst)
if (USE_RCPSS_FOR_DOUBLES)
{
if (srcp.is_memory())
- emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
+ emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
- emit_rcpss_r128_r128(dst, dstreg, dstreg); // rcpss dstreg,dstreg
- emit_cvtss2sd_r128_r128(dst, dstreg, dstreg); // cvtss2sd dstreg,dstreg
- emit_movsd_p64_r128(dst, dstp, REG_XMM1); // movsd dstp,dstreg
+ emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
+ emit_rcpss_r128_r128(dst, dstreg, dstreg); // rcpss dstreg,dstreg
+ emit_cvtss2sd_r128_r128(dst, dstreg, dstreg); // cvtss2sd dstreg,dstreg
+ emit_movsd_p64_r128(dst, dstp, REG_XMM1); // movsd dstp,dstreg
}
else
{
- emit_movsd_r128_m64(dst, REG_XMM1, MABS(&m_near.double1)); // movsd xmm1,1.0
+ emit_movsd_r128_m64(dst, REG_XMM1, MABS(&m_near.double1)); // movsd xmm1,1.0
if (srcp.is_memory())
- emit_divsd_r128_m64(dst, REG_XMM1, MABS(srcp.memory())); // divsd xmm1,[srcp]
+ emit_divsd_r128_m64(dst, REG_XMM1, MABS(srcp.memory())); // divsd xmm1,[srcp]
else if (srcp.is_float_register())
- emit_divsd_r128_r128(dst, REG_XMM1, srcp.freg()); // divsd xmm1,srcp
- emit_movsd_p64_r128(dst, dstp, REG_XMM1); // movsd dstp,xmm1
+ emit_divsd_r128_r128(dst, REG_XMM1, srcp.freg()); // divsd xmm1,srcp
+ emit_movsd_p64_r128(dst, dstp, REG_XMM1); // movsd dstp,xmm1
}
}
}
@@ -6693,20 +6693,20 @@ void drcbe_x64::op_frsqrt(x86code *&dst, const instruction &inst)
if (USE_RSQRTSS_FOR_SINGLES)
{
if (srcp.is_memory())
- emit_rsqrtss_r128_m32(dst, dstreg, MABS(srcp.memory())); // rsqrtss dstreg,[srcp]
+ emit_rsqrtss_r128_m32(dst, dstreg, MABS(srcp.memory())); // rsqrtss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_rsqrtss_r128_r128(dst, dstreg, srcp.freg()); // rsqrtss dstreg,srcp
+ emit_rsqrtss_r128_r128(dst, dstreg, srcp.freg()); // rsqrtss dstreg,srcp
}
else
{
if (srcp.is_memory())
- emit_sqrtss_r128_m32(dst, REG_XMM1, MABS(srcp.memory())); // sqrtss xmm1,[srcp]
+ emit_sqrtss_r128_m32(dst, REG_XMM1, MABS(srcp.memory())); // sqrtss xmm1,[srcp]
else if (srcp.is_float_register())
- emit_sqrtss_r128_r128(dst, REG_XMM1, srcp.freg()); // sqrtss xmm1,srcp
- emit_movss_r128_m32(dst, dstreg, MABS(&m_near.single1)); // movss dstreg,1.0
- emit_divss_r128_r128(dst, dstreg, REG_XMM1); // divss dstreg,xmm1
+ emit_sqrtss_r128_r128(dst, REG_XMM1, srcp.freg()); // sqrtss xmm1,srcp
+ emit_movss_r128_m32(dst, dstreg, MABS(&m_near.single1)); // movss dstreg,1.0
+ emit_divss_r128_r128(dst, dstreg, REG_XMM1); // divss dstreg,xmm1
}
- emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
+ emit_movss_p32_r128(dst, dstp, dstreg); // movss dstp,dstreg
}
// 64-bit form
@@ -6715,21 +6715,21 @@ void drcbe_x64::op_frsqrt(x86code *&dst, const instruction &inst)
if (USE_RSQRTSS_FOR_DOUBLES)
{
if (srcp.is_memory())
- emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
+ emit_cvtsd2ss_r128_m64(dst, dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
else if (srcp.is_float_register())
- emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
- emit_rsqrtss_r128_r128(dst, dstreg, dstreg); // rsqrtss dstreg,dstreg
- emit_cvtss2sd_r128_r128(dst, dstreg, dstreg); // cvtss2sd dstreg,dstreg
+ emit_cvtsd2ss_r128_r128(dst, dstreg, srcp.freg()); // cvtsd2ss dstreg,srcp
+ emit_rsqrtss_r128_r128(dst, dstreg, dstreg); // rsqrtss dstreg,dstreg
+ emit_cvtss2sd_r128_r128(dst, dstreg, dstreg); // cvtss2sd dstreg,dstreg
}
else
{
if (srcp.is_memory())
- emit_sqrtsd_r128_m64(dst, REG_XMM1, MABS(srcp.memory())); // sqrtsd xmm1,[srcp]
+ emit_sqrtsd_r128_m64(dst, REG_XMM1, MABS(srcp.memory())); // sqrtsd xmm1,[srcp]
else if (srcp.is_float_register())
- emit_sqrtsd_r128_r128(dst, REG_XMM1, srcp.freg()); // sqrtsd xmm1,srcp
- emit_movsd_r128_m64(dst, dstreg, MABS(&m_near.double1)); // movsd dstreg,1.0
- emit_divsd_r128_r128(dst, dstreg, REG_XMM1); // divsd dstreg,xmm1
+ emit_sqrtsd_r128_r128(dst, REG_XMM1, srcp.freg()); // sqrtsd xmm1,srcp
+ emit_movsd_r128_m64(dst, dstreg, MABS(&m_near.double1)); // movsd dstreg,1.0
+ emit_divsd_r128_r128(dst, dstreg, REG_XMM1); // divsd dstreg,xmm1
}
- emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
+ emit_movsd_p64_r128(dst, dstp, dstreg); // movsd dstp,dstreg
}
}
diff --git a/src/emu/cpu/drcbex64.h b/src/emu/cpu/drcbex64.h
index 04441a563e3..a37e586ee7c 100644
--- a/src/emu/cpu/drcbex64.h
+++ b/src/emu/cpu/drcbex64.h
@@ -79,12 +79,12 @@ private:
// parameter types
enum be_parameter_type
{
- PTYPE_NONE = 0, // invalid
- PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
- PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
- PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
- PTYPE_VECTOR_REGISTER, // vector register; value = 0-REG_MAX
- PTYPE_MEMORY, // memory; value = pointer to memory
+ PTYPE_NONE = 0, // invalid
+ PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
+ PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
+ PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
+ PTYPE_VECTOR_REGISTER, // vector register; value = 0-REG_MAX
+ PTYPE_MEMORY, // memory; value = pointer to memory
PTYPE_MAX
};
@@ -136,8 +136,8 @@ private:
be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
// internals
- be_parameter_type m_type; // parameter type
- be_parameter_value m_value; // parameter value
+ be_parameter_type m_type; // parameter type
+ be_parameter_value m_value; // parameter value
};
// helpers
@@ -319,51 +319,51 @@ private:
void emit_movsd_p64_r128(x86code *&dst, const be_parameter &param, UINT8 reg);
// internal state
- drc_hash_table m_hash; // hash table state
- drc_map_variables m_map; // code map
- drc_label_list m_labels; // label list
- x86log_context * m_log; // logging
- bool m_sse41; // do we have SSE4.1 support?
+ drc_hash_table m_hash; // hash table state
+ drc_map_variables m_map; // code map
+ drc_label_list m_labels; // label list
+ x86log_context * m_log; // logging
+ bool m_sse41; // do we have SSE4.1 support?
- UINT32 * m_absmask32; // absolute value mask (32-bit)
- UINT64 * m_absmask64; // absolute value mask (32-bit)
- UINT8 * m_rbpvalue; // value of RBP
+ UINT32 * m_absmask32; // absolute value mask (32-bit)
+ UINT64 * m_absmask64; // absolute value mask (32-bit)
+ UINT8 * m_rbpvalue; // value of RBP
- x86_entry_point_func m_entry; // entry point
- x86code * m_exit; // exit point
- x86code * m_nocode; // nocode handler
+ x86_entry_point_func m_entry; // entry point
+ x86code * m_exit; // exit point
+ x86code * m_nocode; // nocode handler
- drc_label_fixup_delegate m_fixup_label; // precomputed delegate for fixups
- drc_oob_delegate m_fixup_exception; // precomputed delegate for exception fixups
+ drc_label_fixup_delegate m_fixup_label; // precomputed delegate for fixups
+ drc_oob_delegate m_fixup_exception; // precomputed delegate for exception fixups
// state to live in the near cache
struct near_state
{
- x86code * debug_cpu_instruction_hook;// debugger callback
- x86code * debug_log_hashjmp; // hashjmp debugging
- x86code * debug_log_hashjmp_fail; // hashjmp debugging
- x86code * drcmap_get_value; // map lookup helper
-
- UINT32 ssemode; // saved SSE mode
- UINT32 ssemodesave; // temporary location for saving
- UINT32 ssecontrol[4]; // copy of the sse_control array
- float single1; // 1.0 is single-precision
- double double1; // 1.0 in double-precision
-
- void * stacksave; // saved stack pointer
- void * hashstacksave; // saved stack pointer for hashjmp
-
- UINT8 flagsmap[0x1000]; // flags map
- UINT64 flagsunmap[0x20]; // flags unmapper
+ x86code * debug_cpu_instruction_hook;// debugger callback
+ x86code * debug_log_hashjmp; // hashjmp debugging
+ x86code * debug_log_hashjmp_fail; // hashjmp debugging
+ x86code * drcmap_get_value; // map lookup helper
+
+ UINT32 ssemode; // saved SSE mode
+ UINT32 ssemodesave; // temporary location for saving
+ UINT32 ssecontrol[4]; // copy of the sse_control array
+ float single1; // 1.0 is single-precision
+ double double1; // 1.0 in double-precision
+
+ void * stacksave; // saved stack pointer
+ void * hashstacksave; // saved stack pointer for hashjmp
+
+ UINT8 flagsmap[0x1000]; // flags map
+ UINT64 flagsunmap[0x20]; // flags unmapper
};
- near_state & m_near;
+ near_state & m_near;
// globals
typedef void (drcbe_x64::*opcode_generate_func)(x86code *&dst, const uml::instruction &inst);
struct opcode_table_entry
{
- uml::opcode_t opcode; // opcode in question
- opcode_generate_func func; // function pointer to the work
+ uml::opcode_t opcode; // opcode in question
+ opcode_generate_func func; // function pointer to the work
};
static const opcode_table_entry s_opcode_table_source[];
static opcode_generate_func s_opcode_table[uml::OP_MAX];
diff --git a/src/emu/cpu/drcbex86.c b/src/emu/cpu/drcbex86.c
index b8961d02315..3a0535a7d00 100644
--- a/src/emu/cpu/drcbex86.c
+++ b/src/emu/cpu/drcbex86.c
@@ -124,7 +124,7 @@ using namespace x86emit;
// DEBUGGING
//**************************************************************************
-#define LOG_HASHJMPS (0)
+#define LOG_HASHJMPS (0)
@@ -132,15 +132,15 @@ using namespace x86emit;
// CONSTANTS
//**************************************************************************
-const UINT32 PTYPE_M = 1 << parameter::PTYPE_MEMORY;
-const UINT32 PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
-const UINT32 PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
-const UINT32 PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
-const UINT32 PTYPE_MI = PTYPE_M | PTYPE_I;
-const UINT32 PTYPE_RI = PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MR = PTYPE_M | PTYPE_R;
-const UINT32 PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
-const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
+const UINT32 PTYPE_M = 1 << parameter::PTYPE_MEMORY;
+const UINT32 PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
+const UINT32 PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
+const UINT32 PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
+const UINT32 PTYPE_MI = PTYPE_M | PTYPE_I;
+const UINT32 PTYPE_RI = PTYPE_R | PTYPE_I;
+const UINT32 PTYPE_MR = PTYPE_M | PTYPE_R;
+const UINT32 PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
+const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
@@ -148,13 +148,13 @@ const UINT32 PTYPE_MF = PTYPE_M | PTYPE_F;
// MACROS
//**************************************************************************
-#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
-#define X86_NOT_CONDITION(condition) (condition_map[condition - uml::COND_Z] ^ 1)
+#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
+#define X86_NOT_CONDITION(condition) (condition_map[condition - uml::COND_Z] ^ 1)
-#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
-#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
-#define assert_no_flags(inst) assert((inst).flags() == 0)
-#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
+#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
+#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
+#define assert_no_flags(inst) assert((inst).flags() == 0)
+#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
@@ -180,31 +180,31 @@ static UINT32 flags_unmap[0x20];
// condition mapping table
static const UINT8 condition_map[uml::COND_MAX - uml::COND_Z] =
{
- x86emit::COND_Z, // COND_Z = 0x80, requires Z
- x86emit::COND_NZ, // COND_NZ, requires Z
- x86emit::COND_S, // COND_S, requires S
- x86emit::COND_NS, // COND_NS, requires S
- x86emit::COND_C, // COND_C, requires C
- x86emit::COND_NC, // COND_NC, requires C
- x86emit::COND_O, // COND_V, requires V
- x86emit::COND_NO, // COND_NV, requires V
- x86emit::COND_P, // COND_U, requires U
- x86emit::COND_NP, // COND_NU, requires U
- x86emit::COND_A, // COND_A, requires CZ
- x86emit::COND_BE, // COND_BE, requires CZ
- x86emit::COND_G, // COND_G, requires SVZ
- x86emit::COND_LE, // COND_LE, requires SVZ
- x86emit::COND_L, // COND_L, requires SV
- x86emit::COND_GE, // COND_GE, requires SV
+ x86emit::COND_Z, // COND_Z = 0x80, requires Z
+ x86emit::COND_NZ, // COND_NZ, requires Z
+ x86emit::COND_S, // COND_S, requires S
+ x86emit::COND_NS, // COND_NS, requires S
+ x86emit::COND_C, // COND_C, requires C
+ x86emit::COND_NC, // COND_NC, requires C
+ x86emit::COND_O, // COND_V, requires V
+ x86emit::COND_NO, // COND_NV, requires V
+ x86emit::COND_P, // COND_U, requires U
+ x86emit::COND_NP, // COND_NU, requires U
+ x86emit::COND_A, // COND_A, requires CZ
+ x86emit::COND_BE, // COND_BE, requires CZ
+ x86emit::COND_G, // COND_G, requires SVZ
+ x86emit::COND_LE, // COND_LE, requires SVZ
+ x86emit::COND_L, // COND_L, requires SV
+ x86emit::COND_GE, // COND_GE, requires SV
};
// FPU control register mapping
static const UINT16 fp_control[4] =
{
- 0x0e3f, // ROUND_TRUNC
- 0x023f, // ROUND_ROUND
- 0x0a3f, // ROUND_CEIL
- 0x063f // ROUND_FLOOR
+ 0x0e3f, // ROUND_TRUNC
+ 0x023f, // ROUND_ROUND
+ 0x0a3f, // ROUND_CEIL
+ 0x063f // ROUND_FLOOR
};
@@ -216,89 +216,89 @@ static const UINT16 fp_control[4] =
const drcbe_x86::opcode_table_entry drcbe_x86::s_opcode_table_source[] =
{
// Compile-time opcodes
- { uml::OP_HANDLE, &drcbe_x86::op_handle }, // HANDLE handle
- { uml::OP_HASH, &drcbe_x86::op_hash }, // HASH mode,pc
- { uml::OP_LABEL, &drcbe_x86::op_label }, // LABEL imm
- { uml::OP_COMMENT, &drcbe_x86::op_comment }, // COMMENT string
- { uml::OP_MAPVAR, &drcbe_x86::op_mapvar }, // MAPVAR mapvar,value
+ { uml::OP_HANDLE, &drcbe_x86::op_handle }, // HANDLE handle
+ { uml::OP_HASH, &drcbe_x86::op_hash }, // HASH mode,pc
+ { uml::OP_LABEL, &drcbe_x86::op_label }, // LABEL imm
+ { uml::OP_COMMENT, &drcbe_x86::op_comment }, // COMMENT string
+ { uml::OP_MAPVAR, &drcbe_x86::op_mapvar }, // MAPVAR mapvar,value
// Control Flow Operations
- { uml::OP_NOP, &drcbe_x86::op_nop }, // NOP
- { uml::OP_DEBUG, &drcbe_x86::op_debug }, // DEBUG pc
- { uml::OP_EXIT, &drcbe_x86::op_exit }, // EXIT src1[,c]
- { uml::OP_HASHJMP, &drcbe_x86::op_hashjmp }, // HASHJMP mode,pc,handle
- { uml::OP_JMP, &drcbe_x86::op_jmp }, // JMP imm[,c]
- { uml::OP_EXH, &drcbe_x86::op_exh }, // EXH handle,param[,c]
- { uml::OP_CALLH, &drcbe_x86::op_callh }, // CALLH handle[,c]
- { uml::OP_RET, &drcbe_x86::op_ret }, // RET [c]
- { uml::OP_CALLC, &drcbe_x86::op_callc }, // CALLC func,ptr[,c]
- { uml::OP_RECOVER, &drcbe_x86::op_recover }, // RECOVER dst,mapvar
+ { uml::OP_NOP, &drcbe_x86::op_nop }, // NOP
+ { uml::OP_DEBUG, &drcbe_x86::op_debug }, // DEBUG pc
+ { uml::OP_EXIT, &drcbe_x86::op_exit }, // EXIT src1[,c]
+ { uml::OP_HASHJMP, &drcbe_x86::op_hashjmp }, // HASHJMP mode,pc,handle
+ { uml::OP_JMP, &drcbe_x86::op_jmp }, // JMP imm[,c]
+ { uml::OP_EXH, &drcbe_x86::op_exh }, // EXH handle,param[,c]
+ { uml::OP_CALLH, &drcbe_x86::op_callh }, // CALLH handle[,c]
+ { uml::OP_RET, &drcbe_x86::op_ret }, // RET [c]
+ { uml::OP_CALLC, &drcbe_x86::op_callc }, // CALLC func,ptr[,c]
+ { uml::OP_RECOVER, &drcbe_x86::op_recover }, // RECOVER dst,mapvar
// Internal Register Operations
- { uml::OP_SETFMOD, &drcbe_x86::op_setfmod }, // SETFMOD src
- { uml::OP_GETFMOD, &drcbe_x86::op_getfmod }, // GETFMOD dst
- { uml::OP_GETEXP, &drcbe_x86::op_getexp }, // GETEXP dst
- { uml::OP_GETFLGS, &drcbe_x86::op_getflgs }, // GETFLGS dst[,f]
- { uml::OP_SAVE, &drcbe_x86::op_save }, // SAVE dst
- { uml::OP_RESTORE, &drcbe_x86::op_restore }, // RESTORE dst
+ { uml::OP_SETFMOD, &drcbe_x86::op_setfmod }, // SETFMOD src
+ { uml::OP_GETFMOD, &drcbe_x86::op_getfmod }, // GETFMOD dst
+ { uml::OP_GETEXP, &drcbe_x86::op_getexp }, // GETEXP dst
+ { uml::OP_GETFLGS, &drcbe_x86::op_getflgs }, // GETFLGS dst[,f]
+ { uml::OP_SAVE, &drcbe_x86::op_save }, // SAVE dst
+ { uml::OP_RESTORE, &drcbe_x86::op_restore }, // RESTORE dst
// Integer Operations
- { uml::OP_LOAD, &drcbe_x86::op_load }, // LOAD dst,base,index,size
- { uml::OP_LOADS, &drcbe_x86::op_loads }, // LOADS dst,base,index,size
- { uml::OP_STORE, &drcbe_x86::op_store }, // STORE base,index,src,size
- { uml::OP_READ, &drcbe_x86::op_read }, // READ dst,src1,spacesize
- { uml::OP_READM, &drcbe_x86::op_readm }, // READM dst,src1,mask,spacesize
- { uml::OP_WRITE, &drcbe_x86::op_write }, // WRITE dst,src1,spacesize
- { uml::OP_WRITEM, &drcbe_x86::op_writem }, // WRITEM dst,src1,spacesize
- { uml::OP_CARRY, &drcbe_x86::op_carry }, // CARRY src,bitnum
- { uml::OP_SET, &drcbe_x86::op_set }, // SET dst,c
- { uml::OP_MOV, &drcbe_x86::op_mov }, // MOV dst,src[,c]
- { uml::OP_SEXT, &drcbe_x86::op_sext }, // SEXT dst,src
- { uml::OP_ROLAND, &drcbe_x86::op_roland }, // ROLAND dst,src1,src2,src3
- { uml::OP_ROLINS, &drcbe_x86::op_rolins }, // ROLINS dst,src1,src2,src3
- { uml::OP_ADD, &drcbe_x86::op_add }, // ADD dst,src1,src2[,f]
- { uml::OP_ADDC, &drcbe_x86::op_addc }, // ADDC dst,src1,src2[,f]
- { uml::OP_SUB, &drcbe_x86::op_sub }, // SUB dst,src1,src2[,f]
- { uml::OP_SUBB, &drcbe_x86::op_subc }, // SUBB dst,src1,src2[,f]
- { uml::OP_CMP, &drcbe_x86::op_cmp }, // CMP src1,src2[,f]
- { uml::OP_MULU, &drcbe_x86::op_mulu }, // MULU dst,edst,src1,src2[,f]
- { uml::OP_MULS, &drcbe_x86::op_muls }, // MULS dst,edst,src1,src2[,f]
- { uml::OP_DIVU, &drcbe_x86::op_divu }, // DIVU dst,edst,src1,src2[,f]
- { uml::OP_DIVS, &drcbe_x86::op_divs }, // DIVS dst,edst,src1,src2[,f]
- { uml::OP_AND, &drcbe_x86::op_and }, // AND dst,src1,src2[,f]
- { uml::OP_TEST, &drcbe_x86::op_test }, // TEST src1,src2[,f]
- { uml::OP_OR, &drcbe_x86::op_or }, // OR dst,src1,src2[,f]
- { uml::OP_XOR, &drcbe_x86::op_xor }, // XOR dst,src1,src2[,f]
- { uml::OP_LZCNT, &drcbe_x86::op_lzcnt }, // LZCNT dst,src[,f]
- { uml::OP_BSWAP, &drcbe_x86::op_bswap }, // BSWAP dst,src
- { uml::OP_SHL, &drcbe_x86::op_shl }, // SHL dst,src,count[,f]
- { uml::OP_SHR, &drcbe_x86::op_shr }, // SHR dst,src,count[,f]
- { uml::OP_SAR, &drcbe_x86::op_sar }, // SAR dst,src,count[,f]
- { uml::OP_ROL, &drcbe_x86::op_rol }, // ROL dst,src,count[,f]
- { uml::OP_ROLC, &drcbe_x86::op_rolc }, // ROLC dst,src,count[,f]
- { uml::OP_ROR, &drcbe_x86::op_ror }, // ROR dst,src,count[,f]
- { uml::OP_RORC, &drcbe_x86::op_rorc }, // RORC dst,src,count[,f]
+ { uml::OP_LOAD, &drcbe_x86::op_load }, // LOAD dst,base,index,size
+ { uml::OP_LOADS, &drcbe_x86::op_loads }, // LOADS dst,base,index,size
+ { uml::OP_STORE, &drcbe_x86::op_store }, // STORE base,index,src,size
+ { uml::OP_READ, &drcbe_x86::op_read }, // READ dst,src1,spacesize
+ { uml::OP_READM, &drcbe_x86::op_readm }, // READM dst,src1,mask,spacesize
+ { uml::OP_WRITE, &drcbe_x86::op_write }, // WRITE dst,src1,spacesize
+ { uml::OP_WRITEM, &drcbe_x86::op_writem }, // WRITEM dst,src1,spacesize
+ { uml::OP_CARRY, &drcbe_x86::op_carry }, // CARRY src,bitnum
+ { uml::OP_SET, &drcbe_x86::op_set }, // SET dst,c
+ { uml::OP_MOV, &drcbe_x86::op_mov }, // MOV dst,src[,c]
+ { uml::OP_SEXT, &drcbe_x86::op_sext }, // SEXT dst,src
+ { uml::OP_ROLAND, &drcbe_x86::op_roland }, // ROLAND dst,src1,src2,src3
+ { uml::OP_ROLINS, &drcbe_x86::op_rolins }, // ROLINS dst,src1,src2,src3
+ { uml::OP_ADD, &drcbe_x86::op_add }, // ADD dst,src1,src2[,f]
+ { uml::OP_ADDC, &drcbe_x86::op_addc }, // ADDC dst,src1,src2[,f]
+ { uml::OP_SUB, &drcbe_x86::op_sub }, // SUB dst,src1,src2[,f]
+ { uml::OP_SUBB, &drcbe_x86::op_subc }, // SUBB dst,src1,src2[,f]
+ { uml::OP_CMP, &drcbe_x86::op_cmp }, // CMP src1,src2[,f]
+ { uml::OP_MULU, &drcbe_x86::op_mulu }, // MULU dst,edst,src1,src2[,f]
+ { uml::OP_MULS, &drcbe_x86::op_muls }, // MULS dst,edst,src1,src2[,f]
+ { uml::OP_DIVU, &drcbe_x86::op_divu }, // DIVU dst,edst,src1,src2[,f]
+ { uml::OP_DIVS, &drcbe_x86::op_divs }, // DIVS dst,edst,src1,src2[,f]
+ { uml::OP_AND, &drcbe_x86::op_and }, // AND dst,src1,src2[,f]
+ { uml::OP_TEST, &drcbe_x86::op_test }, // TEST src1,src2[,f]
+ { uml::OP_OR, &drcbe_x86::op_or }, // OR dst,src1,src2[,f]
+ { uml::OP_XOR, &drcbe_x86::op_xor }, // XOR dst,src1,src2[,f]
+ { uml::OP_LZCNT, &drcbe_x86::op_lzcnt }, // LZCNT dst,src[,f]
+ { uml::OP_BSWAP, &drcbe_x86::op_bswap }, // BSWAP dst,src
+ { uml::OP_SHL, &drcbe_x86::op_shl }, // SHL dst,src,count[,f]
+ { uml::OP_SHR, &drcbe_x86::op_shr }, // SHR dst,src,count[,f]
+ { uml::OP_SAR, &drcbe_x86::op_sar }, // SAR dst,src,count[,f]
+ { uml::OP_ROL, &drcbe_x86::op_rol }, // ROL dst,src,count[,f]
+ { uml::OP_ROLC, &drcbe_x86::op_rolc }, // ROLC dst,src,count[,f]
+ { uml::OP_ROR, &drcbe_x86::op_ror }, // ROR dst,src,count[,f]
+ { uml::OP_RORC, &drcbe_x86::op_rorc }, // RORC dst,src,count[,f]
// Floating Point Operations
- { uml::OP_FLOAD, &drcbe_x86::op_fload }, // FLOAD dst,base,index
- { uml::OP_FSTORE, &drcbe_x86::op_fstore }, // FSTORE base,index,src
- { uml::OP_FREAD, &drcbe_x86::op_fread }, // FREAD dst,space,src1
- { uml::OP_FWRITE, &drcbe_x86::op_fwrite }, // FWRITE space,dst,src1
- { uml::OP_FMOV, &drcbe_x86::op_fmov }, // FMOV dst,src1[,c]
- { uml::OP_FTOINT, &drcbe_x86::op_ftoint }, // FTOINT dst,src1,size,round
- { uml::OP_FFRINT, &drcbe_x86::op_ffrint }, // FFRINT dst,src1,size
- { uml::OP_FFRFLT, &drcbe_x86::op_ffrflt }, // FFRFLT dst,src1,size
- { uml::OP_FRNDS, &drcbe_x86::op_frnds }, // FRNDS dst,src1
- { uml::OP_FADD, &drcbe_x86::op_fadd }, // FADD dst,src1,src2
- { uml::OP_FSUB, &drcbe_x86::op_fsub }, // FSUB dst,src1,src2
- { uml::OP_FCMP, &drcbe_x86::op_fcmp }, // FCMP src1,src2
- { uml::OP_FMUL, &drcbe_x86::op_fmul }, // FMUL dst,src1,src2
- { uml::OP_FDIV, &drcbe_x86::op_fdiv }, // FDIV dst,src1,src2
- { uml::OP_FNEG, &drcbe_x86::op_fneg }, // FNEG dst,src1
- { uml::OP_FABS, &drcbe_x86::op_fabs }, // FABS dst,src1
- { uml::OP_FSQRT, &drcbe_x86::op_fsqrt }, // FSQRT dst,src1
- { uml::OP_FRECIP, &drcbe_x86::op_frecip }, // FRECIP dst,src1
- { uml::OP_FRSQRT, &drcbe_x86::op_frsqrt } // FRSQRT dst,src1
+ { uml::OP_FLOAD, &drcbe_x86::op_fload }, // FLOAD dst,base,index
+ { uml::OP_FSTORE, &drcbe_x86::op_fstore }, // FSTORE base,index,src
+ { uml::OP_FREAD, &drcbe_x86::op_fread }, // FREAD dst,space,src1
+ { uml::OP_FWRITE, &drcbe_x86::op_fwrite }, // FWRITE space,dst,src1
+ { uml::OP_FMOV, &drcbe_x86::op_fmov }, // FMOV dst,src1[,c]
+ { uml::OP_FTOINT, &drcbe_x86::op_ftoint }, // FTOINT dst,src1,size,round
+ { uml::OP_FFRINT, &drcbe_x86::op_ffrint }, // FFRINT dst,src1,size
+ { uml::OP_FFRFLT, &drcbe_x86::op_ffrflt }, // FFRFLT dst,src1,size
+ { uml::OP_FRNDS, &drcbe_x86::op_frnds }, // FRNDS dst,src1
+ { uml::OP_FADD, &drcbe_x86::op_fadd }, // FADD dst,src1,src2
+ { uml::OP_FSUB, &drcbe_x86::op_fsub }, // FSUB dst,src1,src2
+ { uml::OP_FCMP, &drcbe_x86::op_fcmp }, // FCMP src1,src2
+ { uml::OP_FMUL, &drcbe_x86::op_fmul }, // FMUL dst,src1,src2
+ { uml::OP_FDIV, &drcbe_x86::op_fdiv }, // FDIV dst,src1,src2
+ { uml::OP_FNEG, &drcbe_x86::op_fneg }, // FNEG dst,src1
+ { uml::OP_FABS, &drcbe_x86::op_fabs }, // FABS dst,src1
+ { uml::OP_FSQRT, &drcbe_x86::op_fsqrt }, // FSQRT dst,src1
+ { uml::OP_FRECIP, &drcbe_x86::op_frecip }, // FRECIP dst,src1
+ { uml::OP_FRSQRT, &drcbe_x86::op_frsqrt } // FRSQRT dst,src1
};
@@ -419,12 +419,12 @@ inline void drcbe_x86::emit_combine_z_flags(x86code *&dst)
{
// this assumes that the flags from the low 32-bit op are on the stack
// and the flags from the high 32-bit op are live
- emit_pushf(dst); // pushf
- emit_mov_r32_m32(dst, REG_ECX, MBD(REG_ESP, 4)); // mov ecx,[esp+4]
- emit_or_r32_imm(dst, REG_ECX, ~0x40); // or ecx,~0x40
- emit_and_m32_r32(dst, MBD(REG_ESP, 0), REG_ECX); // and [esp],ecx
- emit_popf(dst); // popf
- emit_lea_r32_m32(dst, REG_ESP, MBD(REG_ESP, 4)); // lea esp,[esp+4]
+ emit_pushf(dst); // pushf
+ emit_mov_r32_m32(dst, REG_ECX, MBD(REG_ESP, 4)); // mov ecx,[esp+4]
+ emit_or_r32_imm(dst, REG_ECX, ~0x40); // or ecx,~0x40
+ emit_and_m32_r32(dst, MBD(REG_ESP, 0), REG_ECX); // and [esp],ecx
+ emit_popf(dst); // popf
+ emit_lea_r32_m32(dst, REG_ESP, MBD(REG_ESP, 4)); // lea esp,[esp+4]
}
@@ -437,11 +437,11 @@ inline void drcbe_x86::emit_combine_z_shl_flags(x86code *&dst)
{
// this assumes that the flags from the high 32-bit op are on the stack
// and the flags from the low 32-bit op are live
- emit_pushf(dst); // pushf
- emit_pop_r32(dst, REG_ECX); // pop ecx
- emit_or_r32_imm(dst, REG_ECX, ~0x40); // or ecx,~0x40
- emit_and_m32_r32(dst, MBD(REG_ESP, 0), REG_ECX); // and [esp],ecx
- emit_popf(dst); // popf
+ emit_pushf(dst); // pushf
+ emit_pop_r32(dst, REG_ECX); // pop ecx
+ emit_or_r32_imm(dst, REG_ECX, ~0x40); // or ecx,~0x40
+ emit_and_m32_r32(dst, MBD(REG_ESP, 0), REG_ECX); // and [esp],ecx
+ emit_popf(dst); // popf
}
@@ -533,32 +533,32 @@ inline void drcbe_x86::track_resolve_link(x86code *&destptr, const emit_link &li
drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
: drcbe_interface(drcuml, cache, device),
- m_hash(cache, modes, addrbits, ignorebits),
- m_map(cache, 0),
- m_labels(cache),
- m_log(NULL),
- m_logged_common(false),
- m_sse3(false),
- m_entry(NULL),
- m_exit(NULL),
- m_nocode(NULL),
- m_save(NULL),
- m_restore(NULL),
- m_last_lower_reg(REG_NONE),
- m_last_lower_pc(NULL),
- m_last_lower_addr(NULL),
- m_last_upper_reg(REG_NONE),
- m_last_upper_pc(NULL),
- m_last_upper_addr(NULL),
- m_fptemp(0),
- m_fpumode(0),
- m_fmodesave(0),
- m_stacksave(0),
- m_hashstacksave(0),
- m_reslo(0),
- m_reshi(0),
- m_fixup_label(FUNC(drcbe_x86::fixup_label), this),
- m_fixup_exception(FUNC(drcbe_x86::fixup_exception), this)
+ m_hash(cache, modes, addrbits, ignorebits),
+ m_map(cache, 0),
+ m_labels(cache),
+ m_log(NULL),
+ m_logged_common(false),
+ m_sse3(false),
+ m_entry(NULL),
+ m_exit(NULL),
+ m_nocode(NULL),
+ m_save(NULL),
+ m_restore(NULL),
+ m_last_lower_reg(REG_NONE),
+ m_last_lower_pc(NULL),
+ m_last_lower_addr(NULL),
+ m_last_upper_reg(REG_NONE),
+ m_last_upper_pc(NULL),
+ m_last_upper_addr(NULL),
+ m_fptemp(0),
+ m_fpumode(0),
+ m_fmodesave(0),
+ m_stacksave(0),
+ m_hashstacksave(0),
+ m_reslo(0),
+ m_reshi(0),
+ m_fixup_label(FUNC(drcbe_x86::fixup_label), this),
+ m_fixup_exception(FUNC(drcbe_x86::fixup_exception), this)
{
// compute hi pointers for each register
for (int regnum = 0; regnum < ARRAY_LENGTH(int_register_map); regnum++)
@@ -631,62 +631,62 @@ void drcbe_x86::reset()
// generate a simple CPUID stub
UINT32 (*cpuid_ecx_stub)(void) = (UINT32 (*)(void))dst;
- emit_push_r32(dst, REG_EBX); // push ebx
- emit_mov_r32_imm(dst, REG_EAX, 1); // mov eax,1
- emit_cpuid(dst); // cpuid
- emit_mov_r32_r32(dst, REG_EAX, REG_ECX); // mov eax,ecx
- emit_pop_r32(dst, REG_EBX); // pop ebx
- emit_ret(dst); // ret
+ emit_push_r32(dst, REG_EBX); // push ebx
+ emit_mov_r32_imm(dst, REG_EAX, 1); // mov eax,1
+ emit_cpuid(dst); // cpuid
+ emit_mov_r32_r32(dst, REG_EAX, REG_ECX); // mov eax,ecx
+ emit_pop_r32(dst, REG_EBX); // pop ebx
+ emit_ret(dst); // ret
// call it to determine if we have SSE3 support
m_sse3 = (((*cpuid_ecx_stub)() & 1) != 0);
// generate an entry point
m_entry = (x86_entry_point_func)dst;
- emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ESP, 4)); // mov eax,[esp+4]
- emit_push_r32(dst, REG_EBX); // push ebx
- emit_push_r32(dst, REG_ESI); // push esi
- emit_push_r32(dst, REG_EDI); // push edi
- emit_push_r32(dst, REG_EBP); // push ebp
- emit_sub_r32_imm(dst, REG_ESP, 24); // sub esp,24
- emit_mov_m32_r32(dst, MABS(&m_hashstacksave), REG_ESP); // mov [hashstacksave],esp
- emit_sub_r32_imm(dst, REG_ESP, 4); // sub esp,4
- emit_mov_m32_r32(dst, MABS(&m_stacksave), REG_ESP); // mov [stacksave],esp
- emit_fstcw_m16(dst, MABS(&m_fpumode)); // fstcw [fpumode]
- emit_jmp_r32(dst, REG_EAX); // jmp eax
+ emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ESP, 4)); // mov eax,[esp+4]
+ emit_push_r32(dst, REG_EBX); // push ebx
+ emit_push_r32(dst, REG_ESI); // push esi
+ emit_push_r32(dst, REG_EDI); // push edi
+ emit_push_r32(dst, REG_EBP); // push ebp
+ emit_sub_r32_imm(dst, REG_ESP, 24); // sub esp,24
+ emit_mov_m32_r32(dst, MABS(&m_hashstacksave), REG_ESP); // mov [hashstacksave],esp
+ emit_sub_r32_imm(dst, REG_ESP, 4); // sub esp,4
+ emit_mov_m32_r32(dst, MABS(&m_stacksave), REG_ESP); // mov [stacksave],esp
+ emit_fstcw_m16(dst, MABS(&m_fpumode)); // fstcw [fpumode]
+ emit_jmp_r32(dst, REG_EAX); // jmp eax
if (m_log != NULL && !m_logged_common)
x86log_disasm_code_range(m_log, "entry_point", (x86code *)m_entry, dst);
// generate an exit point
m_exit = dst;
- emit_fldcw_m16(dst, MABS(&m_fpumode)); // fldcw [fpumode]
- emit_mov_r32_m32(dst, REG_ESP, MABS(&m_hashstacksave)); // mov esp,[hashstacksave]
- emit_add_r32_imm(dst, REG_ESP, 24); // add esp,24
- emit_pop_r32(dst, REG_EBP); // pop ebp
- emit_pop_r32(dst, REG_EDI); // pop edi
- emit_pop_r32(dst, REG_ESI); // pop esi
- emit_pop_r32(dst, REG_EBX); // pop ebx
- emit_ret(dst); // ret
+ emit_fldcw_m16(dst, MABS(&m_fpumode)); // fldcw [fpumode]
+ emit_mov_r32_m32(dst, REG_ESP, MABS(&m_hashstacksave)); // mov esp,[hashstacksave]
+ emit_add_r32_imm(dst, REG_ESP, 24); // add esp,24
+ emit_pop_r32(dst, REG_EBP); // pop ebp
+ emit_pop_r32(dst, REG_EDI); // pop edi
+ emit_pop_r32(dst, REG_ESI); // pop esi
+ emit_pop_r32(dst, REG_EBX); // pop ebx
+ emit_ret(dst); // ret
if (m_log != NULL && !m_logged_common)
x86log_disasm_code_range(m_log, "exit_point", m_exit, dst);
// generate a no code point
m_nocode = dst;
- emit_ret(dst); // ret
+ emit_ret(dst); // ret
if (m_log != NULL && !m_logged_common)
x86log_disasm_code_range(m_log, "nocode", m_nocode, dst);
// generate a save subroutine
m_save = dst;
- emit_pushf(dst); // pushf
- emit_pop_r32(dst, REG_EAX); // pop eax
- emit_and_r32_imm(dst, REG_EAX, 0x8c5); // and eax,0x8c5
- emit_mov_r8_m8(dst, REG_AL, MABSI(flags_map, REG_EAX)); // mov al,[flags_map]
- emit_mov_m8_r8(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, flags)), REG_AL); // mov state->flags,al
- emit_mov_r8_m8(dst, REG_AL, MABS(&m_state.fmod)); // mov al,[fmod]
- emit_mov_m8_r8(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, fmod)), REG_AL); // mov state->fmod,al
- emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
- emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, exp)), REG_EAX); // mov state->exp,eax
+ emit_pushf(dst); // pushf
+ emit_pop_r32(dst, REG_EAX); // pop eax
+ emit_and_r32_imm(dst, REG_EAX, 0x8c5); // and eax,0x8c5
+ emit_mov_r8_m8(dst, REG_AL, MABSI(flags_map, REG_EAX)); // mov al,[flags_map]
+ emit_mov_m8_r8(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, flags)), REG_AL); // mov state->flags,al
+ emit_mov_r8_m8(dst, REG_AL, MABS(&m_state.fmod)); // mov al,[fmod]
+ emit_mov_m8_r8(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, fmod)), REG_AL); // mov state->fmod,al
+ emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
+ emit_mov_m32_r32(dst, MBD(REG_ECX, offsetof(drcuml_machine_state, exp)), REG_EAX); // mov state->exp,eax
for (int regnum = 0; regnum < ARRAY_LENGTH(m_state.r); regnum++)
{
FPTR regoffsl = (FPTR)&((drcuml_machine_state *)NULL)->r[regnum].w.l;
@@ -710,7 +710,7 @@ void drcbe_x86::reset()
emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.f[regnum].s.h));
emit_mov_m32_r32(dst, MBD(REG_ECX, regoffsh), REG_EAX);
}
- emit_ret(dst); // ret
+ emit_ret(dst); // ret
if (m_log != NULL && !m_logged_common)
x86log_disasm_code_range(m_log, "save", m_save, dst);
@@ -740,15 +740,15 @@ void drcbe_x86::reset()
emit_mov_m32_r32(dst, MABS(&m_state.f[regnum].s.h), REG_EAX);
}
emit_movzx_r32_m8(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, fmod)));// movzx eax,state->fmod
- emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
- emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
- emit_fldcw_m16(dst, MABSI(&fp_control[0], REG_EAX, 2)); // fldcw fp_control[eax]
- emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, exp))); // mov eax,state->exp
- emit_mov_m32_r32(dst, MABS(&m_state.exp), REG_EAX); // mov [exp],eax
+ emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
+ emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
+ emit_fldcw_m16(dst, MABSI(&fp_control[0], REG_EAX, 2)); // fldcw fp_control[eax]
+ emit_mov_r32_m32(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, exp))); // mov eax,state->exp
+ emit_mov_m32_r32(dst, MABS(&m_state.exp), REG_EAX); // mov [exp],eax
emit_movzx_r32_m8(dst, REG_EAX, MBD(REG_ECX, offsetof(drcuml_machine_state, flags)));// movzx eax,state->flags
- emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_popf(dst); // popf
- emit_ret(dst); // ret
+ emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
+ emit_popf(dst); // popf
+ emit_ret(dst); // ret
if (m_log != NULL && !m_logged_common)
x86log_disasm_code_range(m_log, "restore", m_restore, dst);
@@ -879,16 +879,16 @@ void drcbe_x86::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (param.immediate() == 0)
- emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
+ emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else
- emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
+ emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
}
else if (param.is_memory())
- emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
+ emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
+ emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
}
}
@@ -902,16 +902,16 @@ void drcbe_x86::emit_mov_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x86::emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_parameter &param)
{
if (param.is_immediate())
- emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
+ emit_mov_r32_imm(dst, reg, param.immediate()); // mov reg,param
else if (param.is_memory())
{
if (!can_skip_lower_load(dst, (UINT32 *)((FPTR)param.memory()), reg))
- emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
+ emit_mov_r32_m32(dst, reg, MABS(param.memory())); // mov reg,[param]
}
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
+ emit_mov_r32_r32(dst, reg, param.ireg()); // mov reg,param
}
}
@@ -924,15 +924,15 @@ void drcbe_x86::emit_mov_r32_p32_keepflags(x86code *&dst, UINT8 reg, const be_pa
void drcbe_x86::emit_mov_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param)
{
if (param.is_immediate())
- emit_mov_m32_imm(dst, memref, param.immediate()); // mov [mem],param
+ emit_mov_m32_imm(dst, memref, param.immediate()); // mov [mem],param
else if (param.is_memory())
{
if (!can_skip_lower_load(dst, (UINT32 *)((FPTR)param.memory()), REG_EAX))
- emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
- emit_mov_m32_r32(dst, memref, REG_EAX); // mov [mem],eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
+ emit_mov_m32_r32(dst, memref, REG_EAX); // mov [mem],eax
}
else if (param.is_int_register())
- emit_mov_m32_r32(dst, memref, param.ireg()); // mov [mem],param
+ emit_mov_m32_r32(dst, memref, param.ireg()); // mov [mem],param
}
@@ -946,13 +946,13 @@ void drcbe_x86::emit_mov_p32_r32(x86code *&dst, const be_parameter &param, UINT8
assert(!param.is_immediate());
if (param.is_memory())
{
- emit_mov_m32_r32(dst, MABS(param.memory()), reg); // mov [param],reg
+ emit_mov_m32_r32(dst, MABS(param.memory()), reg); // mov [param],reg
set_last_lower_reg(dst, param, reg);
}
else if (param.is_int_register())
{
if (reg != param.ireg())
- emit_mov_r32_r32(dst, param.ireg(), reg); // mov param,reg
+ emit_mov_r32_r32(dst, param.ireg(), reg); // mov param,reg
}
}
@@ -967,12 +967,12 @@ void drcbe_x86::emit_add_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_add_r32_imm(dst, reg, param.immediate()); // add reg,param
+ emit_add_r32_imm(dst, reg, param.immediate()); // add reg,param
}
else if (param.is_memory())
- emit_add_r32_m32(dst, reg, MABS(param.memory())); // add reg,[param]
+ emit_add_r32_m32(dst, reg, MABS(param.memory())); // add reg,[param]
else if (param.is_int_register())
- emit_add_r32_r32(dst, reg, param.ireg()); // add reg,param
+ emit_add_r32_r32(dst, reg, param.ireg()); // add reg,param
}
@@ -986,13 +986,13 @@ void drcbe_x86::emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_add_m32_imm(dst, memref, param.immediate()); // add [dest],param
+ emit_add_m32_imm(dst, memref, param.immediate()); // add [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_add_m32_r32(dst, memref, reg); // add [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_add_m32_r32(dst, memref, reg); // add [dest],reg
}
}
@@ -1005,11 +1005,11 @@ void drcbe_x86::emit_add_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x86::emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_adc_r32_imm(dst, reg, param.immediate()); // adc reg,param
+ emit_adc_r32_imm(dst, reg, param.immediate()); // adc reg,param
else if (param.is_memory())
- emit_adc_r32_m32(dst, reg, MABS(param.memory())); // adc reg,[param]
+ emit_adc_r32_m32(dst, reg, MABS(param.memory())); // adc reg,[param]
else if (param.is_int_register())
- emit_adc_r32_r32(dst, reg, param.ireg()); // adc reg,param
+ emit_adc_r32_r32(dst, reg, param.ireg()); // adc reg,param
}
@@ -1021,12 +1021,12 @@ void drcbe_x86::emit_adc_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x86::emit_adc_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_adc_m32_imm(dst, memref, param.immediate()); // adc [dest],param
+ emit_adc_m32_imm(dst, memref, param.immediate()); // adc [dest],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
- emit_adc_m32_r32(dst, memref, reg); // adc [dest],reg
+ emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
+ emit_adc_m32_r32(dst, memref, reg); // adc [dest],reg
}
}
@@ -1041,12 +1041,12 @@ void drcbe_x86::emit_sub_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_sub_r32_imm(dst, reg, param.immediate()); // sub reg,param
+ emit_sub_r32_imm(dst, reg, param.immediate()); // sub reg,param
}
else if (param.is_memory())
- emit_sub_r32_m32(dst, reg, MABS(param.memory())); // sub reg,[param]
+ emit_sub_r32_m32(dst, reg, MABS(param.memory())); // sub reg,[param]
else if (param.is_int_register())
- emit_sub_r32_r32(dst, reg, param.ireg()); // sub reg,param
+ emit_sub_r32_r32(dst, reg, param.ireg()); // sub reg,param
}
@@ -1060,13 +1060,13 @@ void drcbe_x86::emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (param.is_immediate())
{
if (inst.flags() != 0 || param.immediate() != 0)
- emit_sub_m32_imm(dst, memref, param.immediate()); // sub [dest],param
+ emit_sub_m32_imm(dst, memref, param.immediate()); // sub [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_sub_m32_r32(dst, memref, reg); // sub [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_sub_m32_r32(dst, memref, reg); // sub [dest],reg
}
}
@@ -1079,11 +1079,11 @@ void drcbe_x86::emit_sub_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x86::emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_sbb_r32_imm(dst, reg, param.immediate()); // sbb reg,param
+ emit_sbb_r32_imm(dst, reg, param.immediate()); // sbb reg,param
else if (param.is_memory())
- emit_sbb_r32_m32(dst, reg, MABS(param.memory())); // sbb reg,[param]
+ emit_sbb_r32_m32(dst, reg, MABS(param.memory())); // sbb reg,[param]
else if (param.is_int_register())
- emit_sbb_r32_r32(dst, reg, param.ireg()); // sbb reg,param
+ emit_sbb_r32_r32(dst, reg, param.ireg()); // sbb reg,param
}
@@ -1095,12 +1095,12 @@ void drcbe_x86::emit_sbb_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x86::emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_sbb_m32_imm(dst, memref, param.immediate()); // sbb [dest],param
+ emit_sbb_m32_imm(dst, memref, param.immediate()); // sbb [dest],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
- emit_sbb_m32_r32(dst, memref, reg); // sbb [dest],reg
+ emit_mov_r32_p32_keepflags(dst, reg, param); // mov reg,param
+ emit_sbb_m32_r32(dst, memref, reg); // sbb [dest],reg
}
}
@@ -1113,11 +1113,11 @@ void drcbe_x86::emit_sbb_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x86::emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_cmp_r32_imm(dst, reg, param.immediate()); // cmp reg,param
+ emit_cmp_r32_imm(dst, reg, param.immediate()); // cmp reg,param
else if (param.is_memory())
- emit_cmp_r32_m32(dst, reg, MABS(param.memory())); // cmp reg,[param]
+ emit_cmp_r32_m32(dst, reg, MABS(param.memory())); // cmp reg,[param]
else if (param.is_int_register())
- emit_cmp_r32_r32(dst, reg, param.ireg()); // cmp reg,param
+ emit_cmp_r32_r32(dst, reg, param.ireg()); // cmp reg,param
}
@@ -1129,12 +1129,12 @@ void drcbe_x86::emit_cmp_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
void drcbe_x86::emit_cmp_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_cmp_m32_imm(dst, memref, param.immediate()); // cmp [dest],param
+ emit_cmp_m32_imm(dst, memref, param.immediate()); // cmp [dest],param
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_cmp_m32_r32(dst, memref, reg); // cmp [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_cmp_m32_r32(dst, memref, reg); // cmp [dest],reg
}
}
@@ -1151,14 +1151,14 @@ void drcbe_x86::emit_and_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
- emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
+ emit_xor_r32_r32(dst, reg, reg); // xor reg,reg
else
- emit_and_r32_imm(dst, reg, param.immediate()); // and reg,param
+ emit_and_r32_imm(dst, reg, param.immediate()); // and reg,param
}
else if (param.is_memory())
- emit_and_r32_m32(dst, reg, MABS(param.memory())); // and reg,[param]
+ emit_and_r32_m32(dst, reg, MABS(param.memory())); // and reg,[param]
else if (param.is_int_register())
- emit_and_r32_r32(dst, reg, param.ireg()); // and reg,param
+ emit_and_r32_r32(dst, reg, param.ireg()); // and reg,param
}
@@ -1174,15 +1174,15 @@ void drcbe_x86::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
- emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
+ emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
else
- emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
+ emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_and_m32_r32(dst, memref, reg); // and [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_and_m32_r32(dst, memref, reg); // and [dest],reg
}
}
@@ -1195,11 +1195,11 @@ void drcbe_x86::emit_and_m32_p32(x86code *&dst, x86_memref memref, const be_para
void drcbe_x86::emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_test_r32_imm(dst, reg, param.immediate()); // test reg,param
+ emit_test_r32_imm(dst, reg, param.immediate()); // test reg,param
else if (param.is_memory())
- emit_test_m32_r32(dst, MABS(param.memory()), reg); // test [param],reg
+ emit_test_m32_r32(dst, MABS(param.memory()), reg); // test [param],reg
else if (param.is_int_register())
- emit_test_r32_r32(dst, reg, param.ireg()); // test reg,param
+ emit_test_r32_r32(dst, reg, param.ireg()); // test reg,param
}
@@ -1211,14 +1211,14 @@ void drcbe_x86::emit_test_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &
void drcbe_x86::emit_test_m32_p32(x86code *&dst, x86_memref memref, const be_parameter &param, const instruction &inst)
{
if (param.is_immediate())
- emit_test_m32_imm(dst, memref, param.immediate()); // test [dest],param
+ emit_test_m32_imm(dst, memref, param.immediate()); // test [dest],param
else if (param.is_memory())
{
- emit_mov_r32_p32(dst, REG_EAX, param); // mov reg,param
- emit_test_m32_r32(dst, memref, REG_EAX); // test [dest],reg
+ emit_mov_r32_p32(dst, REG_EAX, param); // mov reg,param
+ emit_test_m32_r32(dst, memref, REG_EAX); // test [dest],reg
}
else if (param.is_int_register())
- emit_test_m32_r32(dst, memref, param.ireg()); // test [dest],param
+ emit_test_m32_r32(dst, memref, param.ireg()); // test [dest],param
}
@@ -1234,14 +1234,14 @@ void drcbe_x86::emit_or_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &pa
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_mov_r32_imm(dst, reg, ~0); // mov reg,-1
+ emit_mov_r32_imm(dst, reg, ~0); // mov reg,-1
else
- emit_or_r32_imm(dst, reg, param.immediate()); // or reg,param
+ emit_or_r32_imm(dst, reg, param.immediate()); // or reg,param
}
else if (param.is_memory())
- emit_or_r32_m32(dst, reg, MABS(param.memory())); // or reg,[param]
+ emit_or_r32_m32(dst, reg, MABS(param.memory())); // or reg,[param]
else if (param.is_int_register())
- emit_or_r32_r32(dst, reg, param.ireg()); // or reg,param
+ emit_or_r32_r32(dst, reg, param.ireg()); // or reg,param
}
@@ -1257,15 +1257,15 @@ void drcbe_x86::emit_or_m32_p32(x86code *&dst, x86_memref memref, const be_param
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1
+ emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1
else
- emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
+ emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_or_m32_r32(dst, memref, reg); // or [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_or_m32_r32(dst, memref, reg); // or [dest],reg
}
}
@@ -1282,14 +1282,14 @@ void drcbe_x86::emit_xor_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_not_r32(dst, reg); // not reg
+ emit_not_r32(dst, reg); // not reg
else
- emit_xor_r32_imm(dst, reg, param.immediate()); // xor reg,param
+ emit_xor_r32_imm(dst, reg, param.immediate()); // xor reg,param
}
else if (param.is_memory())
- emit_xor_r32_m32(dst, reg, MABS(param.memory())); // xor reg,[param]
+ emit_xor_r32_m32(dst, reg, MABS(param.memory())); // xor reg,[param]
else if (param.is_int_register())
- emit_xor_r32_r32(dst, reg, param.ireg()); // xor reg,param
+ emit_xor_r32_r32(dst, reg, param.ireg()); // xor reg,param
}
@@ -1305,15 +1305,15 @@ void drcbe_x86::emit_xor_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_not_m32(dst, memref); // not [dest]
+ emit_not_m32(dst, memref); // not [dest]
else
- emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
+ emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
}
else
{
int reg = param.select_register(REG_EAX);
- emit_mov_r32_p32(dst, reg, param); // mov reg,param
- emit_xor_m32_r32(dst, memref, reg); // xor [dest],reg
+ emit_mov_r32_p32(dst, reg, param); // mov reg,param
+ emit_xor_m32_r32(dst, memref, reg); // xor [dest],reg
}
}
@@ -1330,12 +1330,12 @@ void drcbe_x86::emit_shl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shl_r32_imm(dst, reg, param.immediate()); // shl reg,param
+ emit_shl_r32_imm(dst, reg, param.immediate()); // shl reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shl_r32_cl(dst, reg); // shl reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shl_r32_cl(dst, reg); // shl reg,cl
}
}
@@ -1352,12 +1352,12 @@ void drcbe_x86::emit_shl_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shl_m32_imm(dst, memref, param.immediate()); // shl [dest],param
+ emit_shl_m32_imm(dst, memref, param.immediate()); // shl [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shl_m32_cl(dst, memref); // shl [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shl_m32_cl(dst, memref); // shl [dest],cl
}
}
@@ -1374,12 +1374,12 @@ void drcbe_x86::emit_shr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shr_r32_imm(dst, reg, param.immediate()); // shr reg,param
+ emit_shr_r32_imm(dst, reg, param.immediate()); // shr reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shr_r32_cl(dst, reg); // shr reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shr_r32_cl(dst, reg); // shr reg,cl
}
}
@@ -1396,12 +1396,12 @@ void drcbe_x86::emit_shr_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_shr_m32_imm(dst, memref, param.immediate()); // shr [dest],param
+ emit_shr_m32_imm(dst, memref, param.immediate()); // shr [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_shr_m32_cl(dst, memref); // shr [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_shr_m32_cl(dst, memref); // shr [dest],cl
}
}
@@ -1418,12 +1418,12 @@ void drcbe_x86::emit_sar_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_sar_r32_imm(dst, reg, param.immediate()); // sar reg,param
+ emit_sar_r32_imm(dst, reg, param.immediate()); // sar reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_sar_r32_cl(dst, reg); // sar reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_sar_r32_cl(dst, reg); // sar reg,cl
}
}
@@ -1440,12 +1440,12 @@ void drcbe_x86::emit_sar_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_sar_m32_imm(dst, memref, param.immediate()); // sar [dest],param
+ emit_sar_m32_imm(dst, memref, param.immediate()); // sar [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_sar_m32_cl(dst, memref); // sar [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_sar_m32_cl(dst, memref); // sar [dest],cl
}
}
@@ -1462,12 +1462,12 @@ void drcbe_x86::emit_rol_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rol_r32_imm(dst, reg, param.immediate()); // rol reg,param
+ emit_rol_r32_imm(dst, reg, param.immediate()); // rol reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_rol_r32_cl(dst, reg); // rol reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_rol_r32_cl(dst, reg); // rol reg,cl
}
}
@@ -1484,12 +1484,12 @@ void drcbe_x86::emit_rol_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rol_m32_imm(dst, memref, param.immediate()); // rol [dest],param
+ emit_rol_m32_imm(dst, memref, param.immediate()); // rol [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_rol_m32_cl(dst, memref); // rol [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_rol_m32_cl(dst, memref); // rol [dest],cl
}
}
@@ -1506,12 +1506,12 @@ void drcbe_x86::emit_ror_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_ror_r32_imm(dst, reg, param.immediate()); // ror reg,param
+ emit_ror_r32_imm(dst, reg, param.immediate()); // ror reg,param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_ror_r32_cl(dst, reg); // ror reg,cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_ror_r32_cl(dst, reg); // ror reg,cl
}
}
@@ -1528,12 +1528,12 @@ void drcbe_x86::emit_ror_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_ror_m32_imm(dst, memref, param.immediate()); // ror [dest],param
+ emit_ror_m32_imm(dst, memref, param.immediate()); // ror [dest],param
}
else
{
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_ror_m32_cl(dst, memref); // ror [dest],cl
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_ror_m32_cl(dst, memref); // ror [dest],cl
}
}
@@ -1550,12 +1550,12 @@ void drcbe_x86::emit_rcl_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcl_r32_imm(dst, reg, param.immediate()); // rcl reg,param
+ emit_rcl_r32_imm(dst, reg, param.immediate()); // rcl reg,param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcl_r32_cl(dst, reg); // rcl reg,cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcl_r32_cl(dst, reg); // rcl reg,cl
}
}
@@ -1572,12 +1572,12 @@ void drcbe_x86::emit_rcl_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcl_m32_imm(dst, memref, param.immediate()); // rcl [dest],param
+ emit_rcl_m32_imm(dst, memref, param.immediate()); // rcl [dest],param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcl_m32_cl(dst, memref); // rcl [dest],cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcl_m32_cl(dst, memref); // rcl [dest],cl
}
}
@@ -1594,12 +1594,12 @@ void drcbe_x86::emit_rcr_r32_p32(x86code *&dst, UINT8 reg, const be_parameter &p
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcr_r32_imm(dst, reg, param.immediate()); // rcr reg,param
+ emit_rcr_r32_imm(dst, reg, param.immediate()); // rcr reg,param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcr_r32_cl(dst, reg); // rcr reg,cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcr_r32_cl(dst, reg); // rcr reg,cl
}
}
@@ -1616,12 +1616,12 @@ void drcbe_x86::emit_rcr_m32_p32(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else
- emit_rcr_m32_imm(dst, memref, param.immediate()); // rcr [dest],param
+ emit_rcr_m32_imm(dst, memref, param.immediate()); // rcr [dest],param
}
else
{
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
- emit_rcr_m32_cl(dst, memref); // rcr [dest],cl
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_rcr_m32_cl(dst, memref); // rcr [dest],cl
}
}
@@ -1643,32 +1643,32 @@ void drcbe_x86::emit_mov_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
if (reglo == REG_NONE)
;
else if ((UINT32)param.immediate() == 0)
- emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
+ emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
else
- emit_mov_r32_imm(dst, reglo, param.immediate()); // mov reglo,param
+ emit_mov_r32_imm(dst, reglo, param.immediate()); // mov reglo,param
if (reghi == REG_NONE)
;
else if ((UINT32)(param.immediate() >> 32) == 0)
- emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
+ emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
else
- emit_mov_r32_imm(dst, reghi, param.immediate() >> 32); // mov reghi,param >> 32
+ emit_mov_r32_imm(dst, reghi, param.immediate() >> 32); // mov reghi,param >> 32
}
else if (param.is_memory())
{
int skip_lower = can_skip_lower_load(dst, (UINT32 *)((FPTR)param.memory()), reglo);
int skip_upper = can_skip_upper_load(dst, (UINT32 *)((FPTR)param.memory(4)), reghi);
if (reglo != REG_NONE && !skip_lower)
- emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param]
+ emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param]
if (reghi != REG_NONE && !skip_upper)
- emit_mov_r32_m32(dst, reghi, MABS(param.memory(4))); // mov reghi,[param+4]
+ emit_mov_r32_m32(dst, reghi, MABS(param.memory(4))); // mov reghi,[param+4]
}
else if (param.is_int_register())
{
int skip_upper = can_skip_upper_load(dst, m_reghi[param.ireg()], reghi);
if (reglo != REG_NONE && reglo != param.ireg())
- emit_mov_r32_r32(dst, reglo, param.ireg()); // mov reglo,param
+ emit_mov_r32_r32(dst, reglo, param.ireg()); // mov reglo,param
if (reghi != REG_NONE && !skip_upper)
- emit_mov_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // mov reghi,reghi[param]
+ emit_mov_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // mov reghi,reghi[param]
}
}
@@ -1684,26 +1684,26 @@ void drcbe_x86::emit_mov_r64_p64_keepflags(x86code *&dst, UINT8 reglo, UINT8 reg
if (param.is_immediate())
{
if (reglo != REG_NONE)
- emit_mov_r32_imm(dst, reglo, param.immediate()); // mov reglo,param
+ emit_mov_r32_imm(dst, reglo, param.immediate()); // mov reglo,param
if (reghi != REG_NONE)
- emit_mov_r32_imm(dst, reghi, param.immediate() >> 32); // mov reghi,param >> 32
+ emit_mov_r32_imm(dst, reghi, param.immediate() >> 32); // mov reghi,param >> 32
}
else if (param.is_memory())
{
int skip_lower = can_skip_lower_load(dst, (UINT32 *)((FPTR)param.memory()), reglo);
int skip_upper = can_skip_upper_load(dst, (UINT32 *)((FPTR)param.memory(4)), reghi);
if (reglo != REG_NONE && !skip_lower)
- emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param]
+ emit_mov_r32_m32(dst, reglo, MABS(param.memory())); // mov reglo,[param]
if (reghi != REG_NONE && !skip_upper)
- emit_mov_r32_m32(dst, reghi, MABS(param.memory(4))); // mov reghi,[param+4]
+ emit_mov_r32_m32(dst, reghi, MABS(param.memory(4))); // mov reghi,[param+4]
}
else if (param.is_int_register())
{
int skip_upper = can_skip_upper_load(dst, m_reghi[param.ireg()], reghi);
if (reglo != REG_NONE && reglo != param.ireg())
- emit_mov_r32_r32(dst, reglo, param.ireg()); // mov reglo,param
+ emit_mov_r32_r32(dst, reglo, param.ireg()); // mov reglo,param
if (reghi != REG_NONE && !skip_upper)
- emit_mov_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // mov reghi,reghi[param]
+ emit_mov_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // mov reghi,reghi[param]
}
}
@@ -1717,23 +1717,23 @@ void drcbe_x86::emit_mov_m64_p64(x86code *&dst, x86_memref memref, const be_para
{
if (param.is_immediate())
{
- emit_mov_m32_imm(dst, memref + 0, param.immediate()); // mov [mem],param
- emit_mov_m32_imm(dst, memref + 4, param.immediate() >> 32); // mov [mem],param >> 32
+ emit_mov_m32_imm(dst, memref + 0, param.immediate()); // mov [mem],param
+ emit_mov_m32_imm(dst, memref + 4, param.immediate() >> 32); // mov [mem],param >> 32
}
else if (param.is_memory())
{
int skip_lower = can_skip_lower_load(dst, (UINT32 *)((FPTR)param.memory()), REG_EAX);
if (!skip_lower)
- emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
- emit_mov_m32_r32(dst, memref + 0, REG_EAX); // mov [mem],eax
- emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory(4))); // mov eax,[param+4]
- emit_mov_m32_r32(dst, memref + 4, REG_EAX); // mov [mem+4],eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory())); // mov eax,[param]
+ emit_mov_m32_r32(dst, memref + 0, REG_EAX); // mov [mem],eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(param.memory(4))); // mov eax,[param+4]
+ emit_mov_m32_r32(dst, memref + 4, REG_EAX); // mov [mem+4],eax
}
else if (param.is_int_register())
{
- emit_mov_m32_r32(dst, memref + 0, param.ireg()); // mov [mem],param
- emit_mov_r32_m32(dst, REG_EAX, MABS(m_reghi[param.ireg()])); // mov eax,[param.hi]
- emit_mov_m32_r32(dst, memref + 4, REG_EAX); // mov [mem+4],eax
+ emit_mov_m32_r32(dst, memref + 0, param.ireg()); // mov [mem],param
+ emit_mov_r32_m32(dst, REG_EAX, MABS(m_reghi[param.ireg()])); // mov eax,[param.hi]
+ emit_mov_m32_r32(dst, memref + 4, REG_EAX); // mov [mem+4],eax
}
}
@@ -1748,14 +1748,14 @@ void drcbe_x86::emit_mov_p64_r64(x86code *&dst, const be_parameter &param, UINT8
assert(!param.is_immediate());
if (param.is_memory())
{
- emit_mov_m32_r32(dst, MABS(param.memory()), reglo); // mov [param],reglo
- emit_mov_m32_r32(dst, MABS(param.memory(4)), reghi); // mov [param+4],reghi
+ emit_mov_m32_r32(dst, MABS(param.memory()), reglo); // mov [param],reglo
+ emit_mov_m32_r32(dst, MABS(param.memory(4)), reghi); // mov [param+4],reghi
}
else if (param.is_int_register())
{
if (reglo != param.ireg())
- emit_mov_r32_r32(dst, param.ireg(), reglo); // mov param,reglo
- emit_mov_m32_r32(dst, MABS(m_reghi[param.ireg()]), reghi); // mov reghi[param],reghi
+ emit_mov_r32_r32(dst, param.ireg(), reglo); // mov param,reglo
+ emit_mov_m32_r32(dst, MABS(m_reghi[param.ireg()]), reghi); // mov reghi[param],reghi
}
set_last_lower_reg(dst, param, reglo);
set_last_upper_reg(dst, param, reghi);
@@ -1772,21 +1772,21 @@ void drcbe_x86::emit_add_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_add_r32_m32(dst, reglo, MABS(param.memory())); // add reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_r32_m32(dst, reghi, MABS(param.memory(4))); // adc reghi,[param]
+ emit_add_r32_m32(dst, reglo, MABS(param.memory())); // add reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_r32_m32(dst, reghi, MABS(param.memory(4))); // adc reghi,[param]
}
else if (param.is_immediate())
{
- emit_add_r32_imm(dst, reglo, param.immediate()); // add reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_r32_imm(dst, reghi, param.immediate() >> 32); // adc reghi,param >> 32
+ emit_add_r32_imm(dst, reglo, param.immediate()); // add reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_r32_imm(dst, reghi, param.immediate() >> 32); // adc reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_add_r32_r32(dst, reglo, param.ireg()); // add reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // adc reghi,reghi[param]
+ emit_add_r32_r32(dst, reglo, param.ireg()); // add reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // adc reghi,reghi[param]
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -1803,17 +1803,17 @@ void drcbe_x86::emit_add_m64_p64(x86code *&dst, x86_memref memref, const be_para
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- emit_add_m32_imm(dst, memref, param.immediate()); // add [dest],param
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_m32_imm(dst, memref + 4, param.immediate() >> 32); // adc [dest+4],param >> 32
+ emit_add_m32_imm(dst, memref, param.immediate()); // add [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_m32_imm(dst, memref + 4, param.immediate() >> 32); // adc [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_add_m32_r32(dst, memref, reglo); // add [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_m32_r32(dst, memref + 4, REG_EDX); // adc [dest+4],edx
+ emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_add_m32_r32(dst, memref, reglo); // add [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_m32_r32(dst, memref + 4, REG_EDX); // adc [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -1830,21 +1830,21 @@ void drcbe_x86::emit_adc_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_adc_r32_m32(dst, reglo, MABS(param.memory())); // adc reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_r32_m32(dst, reghi, MABS(param.memory(4))); // adc reghi,[param]
+ emit_adc_r32_m32(dst, reglo, MABS(param.memory())); // adc reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_r32_m32(dst, reghi, MABS(param.memory(4))); // adc reghi,[param]
}
else if (param.is_immediate())
{
- emit_adc_r32_imm(dst, reglo, param.immediate()); // adc reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_r32_imm(dst, reghi, param.immediate() >> 32); // adc reghi,param >> 32
+ emit_adc_r32_imm(dst, reglo, param.immediate()); // adc reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_r32_imm(dst, reghi, param.immediate() >> 32); // adc reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_adc_r32_r32(dst, reglo, param.ireg()); // adc reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // adc reghi,reghi[param]
+ emit_adc_r32_r32(dst, reglo, param.ireg()); // adc reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // adc reghi,reghi[param]
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -1861,17 +1861,17 @@ void drcbe_x86::emit_adc_m64_p64(x86code *&dst, x86_memref memref, const be_para
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- emit_adc_m32_imm(dst, memref, param.immediate()); // adc [dest],param
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_m32_imm(dst, memref + 4, param.immediate() >> 32); // adc [dest+4],param >> 32
+ emit_adc_m32_imm(dst, memref, param.immediate()); // adc [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_m32_imm(dst, memref + 4, param.immediate() >> 32); // adc [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64_keepflags(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_adc_m32_r32(dst, memref, reglo); // adc [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_adc_m32_r32(dst, memref + 4, REG_EDX); // adc [dest+4],edx
+ emit_mov_r64_p64_keepflags(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_adc_m32_r32(dst, memref, reglo); // adc [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_adc_m32_r32(dst, memref + 4, REG_EDX); // adc [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -1888,21 +1888,21 @@ void drcbe_x86::emit_sub_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_sub_r32_m32(dst, reglo, MABS(param.memory())); // sub reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_m32(dst, reghi, MABS(param.memory(4))); // sbb reghi,[param]
+ emit_sub_r32_m32(dst, reglo, MABS(param.memory())); // sub reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_m32(dst, reghi, MABS(param.memory(4))); // sbb reghi,[param]
}
else if (param.is_immediate())
{
- emit_sub_r32_imm(dst, reglo, param.immediate()); // sub reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_imm(dst, reghi, param.immediate() >> 32); // sbb reghi,param >> 32
+ emit_sub_r32_imm(dst, reglo, param.immediate()); // sub reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_imm(dst, reghi, param.immediate() >> 32); // sbb reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_sub_r32_r32(dst, reglo, param.ireg()); // sub reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // sbb reghi,reghi[param]
+ emit_sub_r32_r32(dst, reglo, param.ireg()); // sub reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // sbb reghi,reghi[param]
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -1919,17 +1919,17 @@ void drcbe_x86::emit_sub_m64_p64(x86code *&dst, x86_memref memref, const be_para
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- emit_sub_m32_imm(dst, memref, param.immediate()); // sub [dest],param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_m32_imm(dst, memref + 4, param.immediate() >> 32); // sbb [dest+4],param >> 32
+ emit_sub_m32_imm(dst, memref, param.immediate()); // sub [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_m32_imm(dst, memref + 4, param.immediate() >> 32); // sbb [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_sub_m32_r32(dst, memref, reglo); // sub [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_m32_r32(dst, memref + 4, REG_EDX); // sbb [dest+4],edx
+ emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_sub_m32_r32(dst, memref, reglo); // sub [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_m32_r32(dst, memref + 4, REG_EDX); // sbb [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -1946,21 +1946,21 @@ void drcbe_x86::emit_sbb_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_sbb_r32_m32(dst, reglo, MABS(param.memory())); // sbb reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_m32(dst, reghi, MABS(param.memory(4))); // sbb reghi,[param]
+ emit_sbb_r32_m32(dst, reglo, MABS(param.memory())); // sbb reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_m32(dst, reghi, MABS(param.memory(4))); // sbb reghi,[param]
}
else if (param.is_immediate())
{
- emit_sbb_r32_imm(dst, reglo, param.immediate()); // sbb reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_imm(dst, reghi, param.immediate() >> 32); // sbb reghi,param >> 32
+ emit_sbb_r32_imm(dst, reglo, param.immediate()); // sbb reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_imm(dst, reghi, param.immediate() >> 32); // sbb reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_sbb_r32_r32(dst, reglo, param.ireg()); // sbb reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // sbb reghi,reghi[param]
+ emit_sbb_r32_r32(dst, reglo, param.ireg()); // sbb reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // sbb reghi,reghi[param]
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -1977,17 +1977,17 @@ void drcbe_x86::emit_sbb_m64_p64(x86code *&dst, x86_memref memref, const be_para
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- emit_sbb_m32_imm(dst, memref, param.immediate()); // sbb [dest],param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_m32_imm(dst, memref + 4, param.immediate() >> 32); // sbb [dest+4],param >> 32
+ emit_sbb_m32_imm(dst, memref, param.immediate()); // sbb [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_m32_imm(dst, memref + 4, param.immediate() >> 32); // sbb [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64_keepflags(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_sbb_m32_r32(dst, memref, reglo); // sbb [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_m32_r32(dst, memref + 4, REG_EDX); // sbb [dest+4],edx
+ emit_mov_r64_p64_keepflags(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_sbb_m32_r32(dst, memref, reglo); // sbb [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_m32_r32(dst, memref + 4, REG_EDX); // sbb [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2004,24 +2004,24 @@ void drcbe_x86::emit_cmp_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = (inst.flags() != FLAG_Z && (inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_sub_r32_m32(dst, reglo, MABS(param.memory())); // sub reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_m32(dst, reghi, MABS(param.memory(4))); // sbb reghi,[param]
+ emit_sub_r32_m32(dst, reglo, MABS(param.memory())); // sub reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_m32(dst, reghi, MABS(param.memory(4))); // sbb reghi,[param]
}
else if (param.is_immediate())
{
- emit_sub_r32_imm(dst, reglo, param.immediate()); // sub reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_imm(dst, reghi, param.immediate() >> 32); // sbb reghi,param >> 32
+ emit_sub_r32_imm(dst, reglo, param.immediate()); // sub reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_imm(dst, reghi, param.immediate() >> 32); // sbb reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_sub_r32_r32(dst, reglo, param.ireg()); // sub reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_sbb_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // sbb reghi,reghi[param]
+ emit_sub_r32_r32(dst, reglo, param.ireg()); // sub reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sbb_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // sbb reghi,reghi[param]
}
if (inst.flags() == FLAG_Z)
- emit_or_r32_r32(dst, reghi, reglo); // or reghi,reglo
+ emit_or_r32_r32(dst, reghi, reglo); // or reghi,reglo
else if (saveflags)
emit_combine_z_flags(dst);
}
@@ -2037,31 +2037,31 @@ void drcbe_x86::emit_and_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_and_r32_m32(dst, reglo, MABS(param.memory())); // and reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_and_r32_m32(dst, reghi, MABS(param.memory(4))); // and reghi,[param]
+ emit_and_r32_m32(dst, reglo, MABS(param.memory())); // and reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_and_r32_m32(dst, reghi, MABS(param.memory(4))); // and reghi,[param]
}
else if (param.is_immediate())
{
if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
- emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
+ emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
else
- emit_and_r32_imm(dst, reglo, param.immediate()); // and reglo,param
- if (saveflags) emit_pushf(dst); // pushf
+ emit_and_r32_imm(dst, reglo, param.immediate()); // and reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
- emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
+ emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
else
- emit_and_r32_imm(dst, reghi, param.immediate() >> 32); // and reghi,param >> 32
+ emit_and_r32_imm(dst, reghi, param.immediate() >> 32); // and reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_and_r32_r32(dst, reglo, param.ireg()); // and reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_and_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // and reghi,reghi[param]
+ emit_and_r32_r32(dst, reglo, param.ireg()); // and reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_and_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // and reghi,reghi[param]
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2081,24 +2081,24 @@ void drcbe_x86::emit_and_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
- emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
+ emit_mov_m32_imm(dst, memref, 0); // mov [dest],0
else
- emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
- if (saveflags) emit_pushf(dst); // pushf
+ emit_and_m32_imm(dst, memref, param.immediate()); // and [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
;// skip
else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
- emit_mov_m32_imm(dst, memref + 4, 0); // mov [dest+4],0
+ emit_mov_m32_imm(dst, memref + 4, 0); // mov [dest+4],0
else
- emit_and_m32_imm(dst, memref + 4, param.immediate() >> 32); // and [dest+4],param >> 32
+ emit_and_m32_imm(dst, memref + 4, param.immediate() >> 32); // and [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_and_m32_r32(dst, memref, reglo); // and [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_and_m32_r32(dst, memref + 4, REG_EDX); // and [dest+4],edx
+ emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_and_m32_r32(dst, memref, reglo); // and [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_and_m32_r32(dst, memref + 4, REG_EDX); // and [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2115,21 +2115,21 @@ void drcbe_x86::emit_test_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_test_m32_r32(dst, MABS(param.memory()), reglo); // test [param],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_test_m32_r32(dst, MABS(param.memory(4)), reghi); // test [param],reghi
+ emit_test_m32_r32(dst, MABS(param.memory()), reglo); // test [param],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_test_m32_r32(dst, MABS(param.memory(4)), reghi); // test [param],reghi
}
else if (param.is_immediate())
{
- emit_test_r32_imm(dst, reglo, param.immediate()); // test reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_test_r32_imm(dst, reghi, param.immediate() >> 32); // test reghi,param >> 32
+ emit_test_r32_imm(dst, reglo, param.immediate()); // test reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_test_r32_imm(dst, reghi, param.immediate() >> 32); // test reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_test_r32_r32(dst, reglo, param.ireg()); // test reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_test_m32_r32(dst, MABS(m_reghi[param.ireg()]), reghi); // test reghi[param],reghi
+ emit_test_r32_r32(dst, reglo, param.ireg()); // test reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_test_m32_r32(dst, MABS(m_reghi[param.ireg()]), reghi); // test reghi[param],reghi
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2146,17 +2146,17 @@ void drcbe_x86::emit_test_m64_p64(x86code *&dst, x86_memref memref, const be_par
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_immediate())
{
- emit_test_m32_imm(dst, memref, param.immediate()); // test [dest],param
- if (saveflags) emit_pushf(dst); // pushf
- emit_test_m32_imm(dst, memref + 4, param.immediate() >> 32); // test [dest+4],param >> 32
+ emit_test_m32_imm(dst, memref, param.immediate()); // test [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_test_m32_imm(dst, memref + 4, param.immediate() >> 32); // test [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_test_m32_r32(dst, memref, reglo); // test [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_test_m32_r32(dst, memref + 4, REG_EDX); // test [dest+4],edx
+ emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_test_m32_r32(dst, memref, reglo); // test [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_test_m32_r32(dst, memref + 4, REG_EDX); // test [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2173,31 +2173,31 @@ void drcbe_x86::emit_or_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const b
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_or_r32_m32(dst, reglo, MABS(param.memory())); // or reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_or_r32_m32(dst, reghi, MABS(param.memory(4))); // or reghi,[param]
+ emit_or_r32_m32(dst, reglo, MABS(param.memory())); // or reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_or_r32_m32(dst, reghi, MABS(param.memory(4))); // or reghi,[param]
}
else if (param.is_immediate())
{
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_mov_r32_imm(dst, reglo, ~0); // mov reglo,-1
+ emit_mov_r32_imm(dst, reglo, ~0); // mov reglo,-1
else
- emit_or_r32_imm(dst, reglo, param.immediate()); // or reglo,param
- if (saveflags) emit_pushf(dst); // pushf
+ emit_or_r32_imm(dst, reglo, param.immediate()); // or reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
- emit_mov_r32_imm(dst, reghi, ~0); // mov reghi,-1
+ emit_mov_r32_imm(dst, reghi, ~0); // mov reghi,-1
else
- emit_or_r32_imm(dst, reghi, param.immediate() >> 32); // or reghi,param >> 32
+ emit_or_r32_imm(dst, reghi, param.immediate() >> 32); // or reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_or_r32_r32(dst, reglo, param.ireg()); // or reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_or_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // or reghi,reghi[param]
+ emit_or_r32_r32(dst, reglo, param.ireg()); // or reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_or_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // or reghi,reghi[param]
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2217,24 +2217,24 @@ void drcbe_x86::emit_or_m64_p64(x86code *&dst, x86_memref memref, const be_param
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1
+ emit_mov_m32_imm(dst, memref, ~0); // mov [dest],-1
else
- emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
- if (saveflags) emit_pushf(dst); // pushf
+ emit_or_m32_imm(dst, memref, param.immediate()); // or [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
- emit_mov_m32_imm(dst, memref + 4, ~0); // mov [dest+4],-1
+ emit_mov_m32_imm(dst, memref + 4, ~0); // mov [dest+4],-1
else
- emit_or_m32_imm(dst, memref + 4, param.immediate() >> 32); // or [dest+4],param >> 32
+ emit_or_m32_imm(dst, memref + 4, param.immediate() >> 32); // or [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_or_m32_r32(dst, memref, reglo); // or [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_or_m32_r32(dst, memref + 4, REG_EDX); // or [dest+4],edx
+ emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_or_m32_r32(dst, memref, reglo); // or [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_or_m32_r32(dst, memref + 4, REG_EDX); // or [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2251,31 +2251,31 @@ void drcbe_x86::emit_xor_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
int saveflags = ((inst.flags() & FLAG_Z) != 0);
if (param.is_memory())
{
- emit_xor_r32_m32(dst, reglo, MABS(param.memory())); // xor reglo,[param]
- if (saveflags) emit_pushf(dst); // pushf
- emit_xor_r32_m32(dst, reghi, MABS(param.memory(4))); // xor reghi,[param]
+ emit_xor_r32_m32(dst, reglo, MABS(param.memory())); // xor reglo,[param]
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_xor_r32_m32(dst, reghi, MABS(param.memory(4))); // xor reghi,[param]
}
else if (param.is_immediate())
{
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_not_r32(dst, reglo); // not reglo
+ emit_not_r32(dst, reglo); // not reglo
else
- emit_xor_r32_imm(dst, reglo, param.immediate()); // xor reglo,param
- if (saveflags) emit_pushf(dst); // pushf
+ emit_xor_r32_imm(dst, reglo, param.immediate()); // xor reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
- emit_not_r32(dst, reghi); // not reghi
+ emit_not_r32(dst, reghi); // not reghi
else
- emit_xor_r32_imm(dst, reghi, param.immediate() >> 32); // xor reghi,param >> 32
+ emit_xor_r32_imm(dst, reghi, param.immediate() >> 32); // xor reghi,param >> 32
}
else if (param.is_int_register())
{
- emit_xor_r32_r32(dst, reglo, param.ireg()); // xor reglo,param
- if (saveflags) emit_pushf(dst); // pushf
- emit_xor_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // xor reghi,reghi[param]
+ emit_xor_r32_r32(dst, reglo, param.ireg()); // xor reglo,param
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_xor_r32_m32(dst, reghi, MABS(m_reghi[param.ireg()])); // xor reghi,reghi[param]
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2295,24 +2295,24 @@ void drcbe_x86::emit_xor_m64_p64(x86code *&dst, x86_memref memref, const be_para
if (inst.flags() == 0 && (UINT32)param.immediate() == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)param.immediate() == 0xffffffff)
- emit_not_m32(dst, memref); // not [dest]
+ emit_not_m32(dst, memref); // not [dest]
else
- emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
- if (saveflags) emit_pushf(dst); // pushf
+ emit_xor_m32_imm(dst, memref, param.immediate()); // xor [dest],param
+ if (saveflags) emit_pushf(dst); // pushf
if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0)
;// skip
else if (inst.flags() == 0 && (UINT32)(param.immediate() >> 32) == 0xffffffff)
- emit_not_m32(dst, memref + 4); // not [dest+4]
+ emit_not_m32(dst, memref + 4); // not [dest+4]
else
- emit_xor_m32_imm(dst, memref + 4, param.immediate() >> 32); // xor [dest+4],param >> 32
+ emit_xor_m32_imm(dst, memref + 4, param.immediate() >> 32); // xor [dest+4],param >> 32
}
else
{
int reglo = (param.is_int_register()) ? param.ireg() : REG_EAX;
- emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
- emit_xor_m32_r32(dst, memref, reglo); // xor [dest],reglo
- if (saveflags) emit_pushf(dst); // pushf
- emit_xor_m32_r32(dst, memref + 4, REG_EDX); // xor [dest+4],edx
+ emit_mov_r64_p64(dst, reglo, REG_EDX, param); // mov edx:reglo,param
+ emit_xor_m32_r32(dst, memref, reglo); // xor [dest],reglo
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_xor_m32_r32(dst, memref + 4, REG_EDX); // xor [dest+4],edx
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2338,52 +2338,52 @@ void drcbe_x86::emit_shl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
{
if (inst.flags() != 0)
{
- emit_shld_r32_r32_imm(dst, reghi, reglo, 31); // shld reghi,reglo,31
- emit_shl_r32_imm(dst, reglo, 31); // shl reglo,31
+ emit_shld_r32_r32_imm(dst, reghi, reglo, 31); // shld reghi,reglo,31
+ emit_shl_r32_imm(dst, reglo, 31); // shl reglo,31
count -= 31;
}
else
{
- emit_mov_r32_r32(dst, reghi, reglo); // mov reghi,reglo
- emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
+ emit_mov_r32_r32(dst, reghi, reglo); // mov reghi,reglo
+ emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
count -= 32;
}
}
if (inst.flags() != 0 || count > 0)
{
- emit_shld_r32_r32_imm(dst, reghi, reglo, count); // shld reghi,reglo,count
- if (saveflags) emit_pushf(dst); // pushf
- emit_shl_r32_imm(dst, reglo, count); // shl reglo,count
+ emit_shld_r32_r32_imm(dst, reghi, reglo, count); // shld reghi,reglo,count
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shl_r32_imm(dst, reglo, count); // shl reglo,count
}
}
}
else
{
emit_link skip1, skip2;
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
if (inst.flags() != 0)
{
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_shld_r32_r32_imm(dst, reghi, reglo, 31); // shld reghi,reglo,31
- emit_shl_r32_imm(dst, reglo, 31); // shl reglo,31
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_shld_r32_r32_imm(dst, reghi, reglo, 31); // shld reghi,reglo,31
- emit_shl_r32_imm(dst, reglo, 31); // shl reglo,31
- track_resolve_link(dst, skip2); // skip2:
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_shld_r32_r32_imm(dst, reghi, reglo, 31); // shld reghi,reglo,31
+ emit_shl_r32_imm(dst, reglo, 31); // shl reglo,31
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_shld_r32_r32_imm(dst, reghi, reglo, 31); // shld reghi,reglo,31
+ emit_shl_r32_imm(dst, reglo, 31); // shl reglo,31
+ track_resolve_link(dst, skip2); // skip2:
}
else
{
- emit_mov_r32_r32(dst, reghi, reglo); // mov reghi,reglo
- emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
+ emit_mov_r32_r32(dst, reghi, reglo); // mov reghi,reglo
+ emit_xor_r32_r32(dst, reglo, reglo); // xor reglo,reglo
}
- track_resolve_link(dst, skip1); // skip1:
- emit_shld_r32_r32_cl(dst, reghi, reglo); // shld reghi,reglo,cl
- if (saveflags) emit_pushf(dst); // pushf
- emit_shl_r32_cl(dst, reglo); // shl reglo,cl
+ track_resolve_link(dst, skip1); // skip1:
+ emit_shld_r32_r32_cl(dst, reghi, reglo); // shld reghi,reglo,cl
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shl_r32_cl(dst, reglo); // shl reglo,cl
}
if (saveflags)
emit_combine_z_shl_flags(dst);
@@ -2409,52 +2409,52 @@ void drcbe_x86::emit_shr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
{
if (inst.flags() != 0)
{
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_shr_r32_imm(dst, reghi, 31); // shr reghi,31
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_shr_r32_imm(dst, reghi, 31); // shr reghi,31
count -= 31;
}
else
{
- emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
- emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
+ emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
+ emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
count -= 32;
}
}
if (inst.flags() != 0 || count > 0)
{
- emit_shrd_r32_r32_imm(dst, reglo, reghi, count); // shrd reglo,reghi,count
- if (saveflags) emit_pushf(dst); // pushf
- emit_shr_r32_imm(dst, reghi, count); // shr reghi,count
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, count); // shrd reglo,reghi,count
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shr_r32_imm(dst, reghi, count); // shr reghi,count
}
}
}
else
{
emit_link skip1, skip2;
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
if (inst.flags() != 0)
{
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_shr_r32_imm(dst, reghi, 31); // shr reghi,31
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_shr_r32_imm(dst, reghi, 31); // shr reghi,31
- track_resolve_link(dst, skip2); // skip2:
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_shr_r32_imm(dst, reghi, 31); // shr reghi,31
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_shr_r32_imm(dst, reghi, 31); // shr reghi,31
+ track_resolve_link(dst, skip2); // skip2:
}
else
{
- emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
- emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
+ emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
+ emit_xor_r32_r32(dst, reghi, reghi); // xor reghi,reghi
}
- track_resolve_link(dst, skip1); // skip1:
- emit_shrd_r32_r32_cl(dst, reglo, reghi); // shrd reglo,reghi,cl
- if (saveflags) emit_pushf(dst); // pushf
- emit_shr_r32_cl(dst, reghi); // shr reghi,cl
+ track_resolve_link(dst, skip1); // skip1:
+ emit_shrd_r32_r32_cl(dst, reglo, reghi); // shrd reglo,reghi,cl
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shr_r32_cl(dst, reghi); // shr reghi,cl
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2480,52 +2480,52 @@ void drcbe_x86::emit_sar_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
{
if (inst.flags() != 0)
{
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
count -= 31;
}
else
{
- emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
- emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
+ emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
+ emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
count -= 32;
}
}
if (inst.flags() != 0 || count > 0)
{
- emit_shrd_r32_r32_imm(dst, reglo, reghi, count); // shrd reglo,reghi,count
- if (saveflags) emit_pushf(dst); // pushf
- emit_sar_r32_imm(dst, reghi, count); // sar reghi,count
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, count); // shrd reglo,reghi,count
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sar_r32_imm(dst, reghi, count); // sar reghi,count
}
}
}
else
{
emit_link skip1, skip2;
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
if (inst.flags() != 0)
{
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
- track_resolve_link(dst, skip2); // skip2:
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
+ track_resolve_link(dst, skip2); // skip2:
}
else
{
- emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
- emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
+ emit_mov_r32_r32(dst, reglo, reghi); // mov reglo,reghi
+ emit_sar_r32_imm(dst, reghi, 31); // sar reghi,31
}
- track_resolve_link(dst, skip1); // skip1:
- emit_shrd_r32_r32_cl(dst, reglo, reghi); // shrd reglo,reghi,cl
- if (saveflags) emit_pushf(dst); // pushf
- emit_sar_r32_cl(dst, reghi); // sar reghi,cl
+ track_resolve_link(dst, skip1); // skip1:
+ emit_shrd_r32_r32_cl(dst, reglo, reghi); // shrd reglo,reghi,cl
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_sar_r32_cl(dst, reghi); // sar reghi,cl
}
if (saveflags)
emit_combine_z_flags(dst);
@@ -2551,23 +2551,23 @@ void drcbe_x86::emit_rol_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
{
if (inst.flags() != 0)
{
- emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
- emit_shld_r32_r32_imm(dst, reglo, reghi, 31); // shld reglo,reghi,31
- emit_shld_r32_r32_imm(dst, reghi, REG_ECX, 31); // shld reghi,ecx,31
+ emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
+ emit_shld_r32_r32_imm(dst, reglo, reghi, 31); // shld reglo,reghi,31
+ emit_shld_r32_r32_imm(dst, reghi, REG_ECX, 31); // shld reghi,ecx,31
count -= 31;
}
else
{
- emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
+ emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
count -= 32;
}
}
if (inst.flags() != 0 || count > 0)
{
- emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
- emit_shld_r32_r32_imm(dst, reglo, reghi, count); // shld reglo,reghi,count
- if (saveflags) emit_pushf(dst); // pushf
- emit_shld_r32_r32_imm(dst, reghi, REG_ECX, count); // shld reghi,ecx,count
+ emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
+ emit_shld_r32_r32_imm(dst, reglo, reghi, count); // shld reglo,reghi,count
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shld_r32_r32_imm(dst, reghi, REG_ECX, count); // shld reghi,ecx,count
}
}
}
@@ -2576,30 +2576,30 @@ void drcbe_x86::emit_rol_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
emit_link skip1, skip2;
int tempreg = REG_EBX;
emit_mov_m32_r32(dst, MBD(REG_ESP, -8), tempreg); // mov [esp-8],ebx
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
if (inst.flags() != 0)
{
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
- emit_shld_r32_r32_imm(dst, reglo, reghi, 31); // shld reglo,reghi,31
- emit_shld_r32_r32_imm(dst, reghi, tempreg, 31); // shld reghi,ebx,31
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
- emit_shld_r32_r32_imm(dst, reglo, reghi, 31); // shld reglo,reghi,31
- emit_shld_r32_r32_imm(dst, reghi, tempreg, 31); // shld reghi,ebx,31
- track_resolve_link(dst, skip2); // skip2:
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
+ emit_shld_r32_r32_imm(dst, reglo, reghi, 31); // shld reglo,reghi,31
+ emit_shld_r32_r32_imm(dst, reghi, tempreg, 31); // shld reghi,ebx,31
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
+ emit_shld_r32_r32_imm(dst, reglo, reghi, 31); // shld reglo,reghi,31
+ emit_shld_r32_r32_imm(dst, reghi, tempreg, 31); // shld reghi,ebx,31
+ track_resolve_link(dst, skip2); // skip2:
}
else
- emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
- track_resolve_link(dst, skip1); // skip1:
- emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
- emit_shld_r32_r32_cl(dst, reglo, reghi); // shld reglo,reghi,cl
- if (saveflags) emit_pushf(dst); // pushf
- emit_shld_r32_r32_cl(dst, reghi, tempreg); // shld reghi,ebx,cl
+ emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
+ track_resolve_link(dst, skip1); // skip1:
+ emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
+ emit_shld_r32_r32_cl(dst, reglo, reghi); // shld reglo,reghi,cl
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shld_r32_r32_cl(dst, reghi, tempreg); // shld reghi,ebx,cl
emit_mov_r32_m32(dst, tempreg, MBD(REG_ESP, saveflags ? -4 : -8)); // mov ebx,[esp-8]
}
if (saveflags)
@@ -2626,23 +2626,23 @@ void drcbe_x86::emit_ror_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
{
if (inst.flags() != 0)
{
- emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_shrd_r32_r32_imm(dst, reghi, REG_ECX, 31); // shrd reghi,ecx,31
+ emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_shrd_r32_r32_imm(dst, reghi, REG_ECX, 31); // shrd reghi,ecx,31
count -= 31;
}
else
{
- emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
+ emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
count -= 32;
}
}
if (inst.flags() != 0 || count > 0)
{
- emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
- emit_shrd_r32_r32_imm(dst, reglo, reghi, count); // shrd reglo,reghi,count
- if (saveflags) emit_pushf(dst); // pushf
- emit_shrd_r32_r32_imm(dst, reghi, REG_ECX, count); // shrd reghi,ecx,count
+ emit_mov_r32_r32(dst, REG_ECX, reglo); // mov ecx,reglo
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, count); // shrd reglo,reghi,count
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shrd_r32_r32_imm(dst, reghi, REG_ECX, count); // shrd reghi,ecx,count
}
}
}
@@ -2651,30 +2651,30 @@ void drcbe_x86::emit_ror_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
emit_link skip1, skip2;
int tempreg = REG_EBX;
emit_mov_m32_r32(dst, MBD(REG_ESP, -8), tempreg); // mov [esp-8],ebx
- emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
+ emit_mov_r32_p32(dst, REG_ECX, param); // mov ecx,param
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip1); // jz skip1
if (inst.flags() != 0)
{
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_shrd_r32_r32_imm(dst, reghi, tempreg, 31); // shrd reghi,ebx,31
- emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
- emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
- emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
- emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
- emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
- emit_shrd_r32_r32_imm(dst, reghi, tempreg, 31); // shrd reghi,ebx,31
- track_resolve_link(dst, skip2); // skip2:
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_shrd_r32_r32_imm(dst, reghi, tempreg, 31); // shrd reghi,ebx,31
+ emit_test_r32_imm(dst, REG_ECX, 0x20); // test ecx,0x20
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip2); // jz skip2
+ emit_sub_r32_imm(dst, REG_ECX, 31); // sub ecx,31
+ emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
+ emit_shrd_r32_r32_imm(dst, reglo, reghi, 31); // shrd reglo,reghi,31
+ emit_shrd_r32_r32_imm(dst, reghi, tempreg, 31); // shrd reghi,ebx,31
+ track_resolve_link(dst, skip2); // skip2:
}
else
- emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
- track_resolve_link(dst, skip1); // skip1:
- emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
- emit_shrd_r32_r32_cl(dst, reglo, reghi); // shrd reglo,reghi,cl
- if (saveflags) emit_pushf(dst); // pushf
- emit_shrd_r32_r32_cl(dst, reghi, tempreg); // shrd reghi,ebx,cl
+ emit_xchg_r32_r32(dst, reghi, reglo); // xchg reghi,reglo
+ track_resolve_link(dst, skip1); // skip1:
+ emit_mov_r32_r32(dst, tempreg, reglo); // mov ebx,reglo
+ emit_shrd_r32_r32_cl(dst, reglo, reghi); // shrd reglo,reghi,cl
+ if (saveflags) emit_pushf(dst); // pushf
+ emit_shrd_r32_r32_cl(dst, reghi, tempreg); // shrd reghi,ebx,cl
emit_mov_r32_m32(dst, tempreg, MBD(REG_ESP, saveflags ? -4 : -8)); // mov ebx,[esp-8]
}
if (saveflags)
@@ -2693,32 +2693,32 @@ void drcbe_x86::emit_rcl_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
emit_link skipall, skiploop;
x86code *loop;
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
if (!saveflags)
{
- loop = dst; // loop:
- emit_jecxz_link(dst, skipall); // jecxz skipall
- emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
- emit_rcl_r32_imm(dst, reglo, 1); // rcl reglo,1
- emit_rcl_r32_imm(dst, reghi, 1); // rcl reghi,1
- emit_jmp(dst, loop); // jmp loop
- track_resolve_link(dst, skipall); // skipall:
+ loop = dst; // loop:
+ emit_jecxz_link(dst, skipall); // jecxz skipall
+ emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
+ emit_rcl_r32_imm(dst, reglo, 1); // rcl reglo,1
+ emit_rcl_r32_imm(dst, reghi, 1); // rcl reghi,1
+ emit_jmp(dst, loop); // jmp loop
+ track_resolve_link(dst, skipall); // skipall:
}
else
{
- emit_jecxz_link(dst, skipall); // jecxz skipall
- emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
- loop = dst; // loop:
- emit_jecxz_link(dst, skiploop); // jecxz skiploop
- emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
- emit_rcl_r32_imm(dst, reglo, 1); // rcl reglo,1
- emit_rcl_r32_imm(dst, reghi, 1); // rcl reghi,1
- emit_jmp(dst, loop); // jmp loop
- track_resolve_link(dst, skiploop); // skiploop:
- emit_rcl_r32_imm(dst, reglo, 1); // rcl reglo,1
- emit_pushf(dst); // pushf
- emit_rcl_r32_imm(dst, reghi, 1); // rcl reghi,1
- track_resolve_link(dst, skipall); // skipall:
+ emit_jecxz_link(dst, skipall); // jecxz skipall
+ emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
+ loop = dst; // loop:
+ emit_jecxz_link(dst, skiploop); // jecxz skiploop
+ emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
+ emit_rcl_r32_imm(dst, reglo, 1); // rcl reglo,1
+ emit_rcl_r32_imm(dst, reghi, 1); // rcl reghi,1
+ emit_jmp(dst, loop); // jmp loop
+ track_resolve_link(dst, skiploop); // skiploop:
+ emit_rcl_r32_imm(dst, reglo, 1); // rcl reglo,1
+ emit_pushf(dst); // pushf
+ emit_rcl_r32_imm(dst, reghi, 1); // rcl reghi,1
+ track_resolve_link(dst, skipall); // skipall:
emit_combine_z_flags(dst);
}
}
@@ -2735,32 +2735,32 @@ void drcbe_x86::emit_rcr_r64_p64(x86code *&dst, UINT8 reglo, UINT8 reghi, const
emit_link skipall, skiploop;
x86code *loop;
- emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
+ emit_mov_r32_p32_keepflags(dst, REG_ECX, param); // mov ecx,param
if (!saveflags)
{
- loop = dst; // loop:
- emit_jecxz_link(dst, skipall); // jecxz skipall
- emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
- emit_rcr_r32_imm(dst, reghi, 1); // rcr reghi,1
- emit_rcr_r32_imm(dst, reglo, 1); // rcr reglo,1
- emit_jmp(dst, loop); // jmp loop
- track_resolve_link(dst, skipall); // skipall:
+ loop = dst; // loop:
+ emit_jecxz_link(dst, skipall); // jecxz skipall
+ emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
+ emit_rcr_r32_imm(dst, reghi, 1); // rcr reghi,1
+ emit_rcr_r32_imm(dst, reglo, 1); // rcr reglo,1
+ emit_jmp(dst, loop); // jmp loop
+ track_resolve_link(dst, skipall); // skipall:
}
else
{
- emit_jecxz_link(dst, skipall); // jecxz skipall
- emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
- loop = dst; // loop:
- emit_jecxz_link(dst, skiploop); // jecxz skiploop
- emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
- emit_rcr_r32_imm(dst, reghi, 1); // rcr reghi,1
- emit_rcr_r32_imm(dst, reglo, 1); // rcr reglo,1
- emit_jmp(dst, loop); // jmp loop
- track_resolve_link(dst, skiploop); // skiploop:
- emit_rcr_r32_imm(dst, reghi, 1); // rcr reghi,1
- emit_pushf(dst); // pushf
- emit_rcr_r32_imm(dst, reglo, 1); // rcr reglo,1
- track_resolve_link(dst, skipall); // skipall:
+ emit_jecxz_link(dst, skipall); // jecxz skipall
+ emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
+ loop = dst; // loop:
+ emit_jecxz_link(dst, skiploop); // jecxz skiploop
+ emit_lea_r32_m32(dst, REG_ECX, MBD(REG_ECX, -1)); // lea ecx,[ecx-1]
+ emit_rcr_r32_imm(dst, reghi, 1); // rcr reghi,1
+ emit_rcr_r32_imm(dst, reglo, 1); // rcr reglo,1
+ emit_jmp(dst, loop); // jmp loop
+ track_resolve_link(dst, skiploop); // skiploop:
+ emit_rcr_r32_imm(dst, reghi, 1); // rcr reghi,1
+ emit_pushf(dst); // pushf
+ emit_rcr_r32_imm(dst, reglo, 1); // rcr reglo,1
+ track_resolve_link(dst, skipall); // skipall:
emit_combine_z_shl_flags(dst);
}
}
@@ -2861,14 +2861,14 @@ void drcbe_x86::fixup_exception(drccodeptr *codeptr, void *param1, void *param2)
((UINT32 *)src)[-1] = dst - src;
// then store the exception parameter
- emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
+ emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
// push the original return address on the stack
- emit_push_imm(dst, (FPTR)src); // push <return>
+ emit_push_imm(dst, (FPTR)src); // push <return>
if (*targetptr != NULL)
- emit_jmp(dst, *targetptr); // jmp *targetptr
+ emit_jmp(dst, *targetptr); // jmp *targetptr
else
- emit_jmp_m32(dst, MABS(targetptr)); // jmp [targetptr]
+ emit_jmp_m32(dst, MABS(targetptr)); // jmp [targetptr]
*codeptr = dst;
}
@@ -2910,14 +2910,14 @@ void drcbe_x86::op_handle(x86code *&dst, const instruction &inst)
// emit a jump around the stack adjust in case code falls through here
emit_link skip;
- emit_jmp_short_link(dst, skip); // jmp skip
+ emit_jmp_short_link(dst, skip); // jmp skip
// register the current pointer for the handle
inst.param(0).handle().set_codeptr(dst);
// by default, the handle points to prolog code that moves the stack pointer
- emit_lea_r32_m32(dst, REG_ESP, MBD(REG_ESP, -28)); // lea rsp,[rsp-28]
- track_resolve_link(dst, skip); // skip:
+ emit_lea_r32_m32(dst, REG_ESP, MBD(REG_ESP, -28)); // lea rsp,[rsp-28]
+ track_resolve_link(dst, skip); // skip:
}
@@ -3020,16 +3020,16 @@ void drcbe_x86::op_debug(x86code *&dst, const instruction &inst)
be_parameter pcp(*this, inst.param(0), PTYPE_MRI);
// test and branch
- emit_test_m32_imm(dst, MABS(&m_device.machine().debug_flags), DEBUG_FLAG_CALL_HOOK); // test [debug_flags],DEBUG_FLAG_CALL_HOOK
+ emit_test_m32_imm(dst, MABS(&m_device.machine().debug_flags), DEBUG_FLAG_CALL_HOOK); // test [debug_flags],DEBUG_FLAG_CALL_HOOK
emit_link skip = { 0 };
- emit_jcc_short_link(dst, x86emit::COND_Z, skip); // jz skip
+ emit_jcc_short_link(dst, x86emit::COND_Z, skip); // jz skip
// push the parameter
- emit_mov_m32_p32(dst, MBD(REG_ESP, 4), pcp); // mov [esp+4],pcp
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_device); // mov [esp],device
- emit_call(dst, (x86code *)debugger_instruction_hook); // call debug_cpu_instruction_hook
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 4), pcp); // mov [esp+4],pcp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_device); // mov [esp],device
+ emit_call(dst, (x86code *)debugger_instruction_hook); // call debug_cpu_instruction_hook
- track_resolve_link(dst, skip); // skip:
+ track_resolve_link(dst, skip); // skip:
}
}
@@ -3049,11 +3049,11 @@ void drcbe_x86::op_exit(x86code *&dst, const instruction &inst)
be_parameter retp(*this, inst.param(0), PTYPE_MRI);
// load the parameter into EAX
- emit_mov_r32_p32(dst, REG_EAX, retp); // mov eax,retp
+ emit_mov_r32_p32(dst, REG_EAX, retp); // mov eax,retp
if (inst.condition() == uml::COND_ALWAYS)
- emit_jmp(dst, m_exit); // jmp exit
+ emit_jmp(dst, m_exit); // jmp exit
else
- emit_jcc(dst, X86_CONDITION(inst.condition()), m_exit); // jcc exit
+ emit_jcc(dst, X86_CONDITION(inst.condition()), m_exit); // jcc exit
}
@@ -3082,7 +3082,7 @@ void drcbe_x86::op_hashjmp(x86code *&dst, const instruction &inst)
}
// load the stack base one word early so we end up at the right spot after our call below
- emit_mov_r32_m32(dst, REG_ESP, MABS(&m_hashstacksave)); // mov esp,[hashstacksave]
+ emit_mov_r32_m32(dst, REG_ESP, MABS(&m_hashstacksave)); // mov esp,[hashstacksave]
// fixed mode cases
if (modep.is_immediate() && m_hash.is_mode_populated(modep.immediate()))
@@ -3092,15 +3092,15 @@ void drcbe_x86::op_hashjmp(x86code *&dst, const instruction &inst)
{
UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
- emit_call_m32(dst, MABS(&m_hash.base()[modep.immediate()][l1val][l2val])); // call hash[modep][l1val][l2val]
+ emit_call_m32(dst, MABS(&m_hash.base()[modep.immediate()][l1val][l2val])); // call hash[modep][l1val][l2val]
}
// a fixed mode but variable PC
else
{
- emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
- emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
- emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
+ emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
+ emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
+ emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
emit_and_r32_imm(dst, REG_EAX, m_hash.l2mask() << m_hash.l2shift());// and eax,l2mask << l2shift
emit_mov_r32_m32(dst, REG_EDX, MABSI(&m_hash.base()[modep.immediate()][0], REG_EDX, 4));
// mov edx,hash[modep+edx*4]
@@ -3111,34 +3111,34 @@ void drcbe_x86::op_hashjmp(x86code *&dst, const instruction &inst)
{
// variable mode
int modereg = modep.select_register(REG_ECX);
- emit_mov_r32_p32(dst, modereg, modep); // mov modereg,modep
- emit_mov_r32_m32(dst, REG_ECX, MABSI(m_hash.base(), modereg, 4)); // mov ecx,hash[modereg*4]
+ emit_mov_r32_p32(dst, modereg, modep); // mov modereg,modep
+ emit_mov_r32_m32(dst, REG_ECX, MABSI(m_hash.base(), modereg, 4)); // mov ecx,hash[modereg*4]
// fixed PC
if (pcp.is_immediate())
{
UINT32 l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
UINT32 l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
- emit_mov_r32_m32(dst, REG_EDX, MBD(REG_ECX, l1val*4)); // mov edx,[ecx+l1val*4]
- emit_call_m32(dst, MBD(REG_EDX, l2val*4)); // call [l2val*4]
+ emit_mov_r32_m32(dst, REG_EDX, MBD(REG_ECX, l1val*4)); // mov edx,[ecx+l1val*4]
+ emit_call_m32(dst, MBD(REG_EDX, l2val*4)); // call [l2val*4]
}
// variable PC
else
{
- emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
- emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
- emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
- emit_mov_r32_m32(dst, REG_EDX, MBISD(REG_ECX, REG_EDX, 4, 0)); // mov edx,[ecx+edx*4]
+ emit_mov_r32_p32(dst, REG_EAX, pcp); // mov eax,pcp
+ emit_mov_r32_r32(dst, REG_EDX, REG_EAX); // mov edx,eax
+ emit_shr_r32_imm(dst, REG_EDX, m_hash.l1shift()); // shr edx,l1shift
+ emit_mov_r32_m32(dst, REG_EDX, MBISD(REG_ECX, REG_EDX, 4, 0)); // mov edx,[ecx+edx*4]
emit_and_r32_imm(dst, REG_EAX, m_hash.l2mask() << m_hash.l2shift());// and eax,l2mask << l2shift
emit_call_m32(dst, MBISD(REG_EDX, REG_EAX, 4 >> m_hash.l2shift(), 0));// call [edx+eax*shift]
}
}
// in all cases, if there is no code, we return here to generate the exception
- emit_mov_m32_p32(dst, MABS(&m_state.exp), pcp); // mov [exp],param
- emit_sub_r32_imm(dst, REG_ESP, 4); // sub esp,4
- emit_call_m32(dst, MABS(exp.handle().codeptr_addr())); // call [exp]
+ emit_mov_m32_p32(dst, MABS(&m_state.exp), pcp); // mov [exp],param
+ emit_sub_r32_imm(dst, REG_ESP, 4); // sub esp,4
+ emit_call_m32(dst, MABS(exp.handle().codeptr_addr())); // call [exp]
}
@@ -3160,9 +3160,9 @@ void drcbe_x86::op_jmp(x86code *&dst, const instruction &inst)
// look up the jump target and jump there
x86code *jmptarget = (x86code *)m_labels.get_codeptr(labelp.label(), m_fixup_label, dst);
if (inst.condition() == uml::COND_ALWAYS)
- emit_jmp(dst, jmptarget); // jmp target
+ emit_jmp(dst, jmptarget); // jmp target
else
- emit_jcc(dst, X86_CONDITION(inst.condition()), jmptarget); // jcc target
+ emit_jcc(dst, X86_CONDITION(inst.condition()), jmptarget); // jcc target
}
@@ -3188,17 +3188,17 @@ void drcbe_x86::op_exh(x86code *&dst, const instruction &inst)
// perform the exception processing inline if unconditional
if (inst.condition() == uml::COND_ALWAYS)
{
- emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
+ emit_mov_m32_p32(dst, MABS(&m_state.exp), exp); // mov [exp],exp
if (*targetptr != NULL)
- emit_call(dst, *targetptr); // call *targetptr
+ emit_call(dst, *targetptr); // call *targetptr
else
- emit_call_m32(dst, MABS(targetptr)); // call [targetptr]
+ emit_call_m32(dst, MABS(targetptr)); // call [targetptr]
}
// otherwise, jump to an out-of-band handler
else
{
- emit_jcc(dst, X86_CONDITION(inst.condition()), 0); // jcc exception
+ emit_jcc(dst, X86_CONDITION(inst.condition()), 0); // jcc exception
m_cache.request_oob_codegen(m_fixup_exception, dst, &const_cast<instruction &>(inst));
}
}
@@ -3225,17 +3225,17 @@ void drcbe_x86::op_callh(x86code *&dst, const instruction &inst)
// skip if conditional
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// jump through the handle; directly if a normal jump
if (*targetptr != NULL)
- emit_call(dst, *targetptr); // call *targetptr
+ emit_call(dst, *targetptr); // call *targetptr
else
- emit_call_m32(dst, MABS(targetptr)); // call [targetptr]
+ emit_call_m32(dst, MABS(targetptr)); // call [targetptr]
// resolve the conditional link
if (inst.condition() != uml::COND_ALWAYS)
- track_resolve_link(dst, skip); // skip:
+ track_resolve_link(dst, skip); // skip:
}
@@ -3254,15 +3254,15 @@ void drcbe_x86::op_ret(x86code *&dst, const instruction &inst)
// skip if conditional
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// return
- emit_lea_r32_m32(dst, REG_ESP, MBD(REG_ESP, 28)); // lea rsp,[rsp+28]
- emit_ret(dst); // ret
+ emit_lea_r32_m32(dst, REG_ESP, MBD(REG_ESP, 28)); // lea rsp,[rsp+28]
+ emit_ret(dst); // ret
// resolve the conditional link
if (inst.condition() != uml::COND_ALWAYS)
- track_resolve_link(dst, skip); // skip:
+ track_resolve_link(dst, skip); // skip:
}
@@ -3285,15 +3285,15 @@ void drcbe_x86::op_callc(x86code *&dst, const instruction &inst)
// skip if conditional
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// perform the call
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)paramp.memory()); // mov [esp],paramp
- emit_call(dst, (x86code *)(FPTR)funcp.cfunc()); // call funcp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)paramp.memory()); // mov [esp],paramp
+ emit_call(dst, (x86code *)(FPTR)funcp.cfunc()); // call funcp
// resolve the conditional link
if (inst.condition() != uml::COND_ALWAYS)
- track_resolve_link(dst, skip); // skip:
+ track_resolve_link(dst, skip); // skip:
}
@@ -3312,14 +3312,14 @@ void drcbe_x86::op_recover(x86code *&dst, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
// call the recovery code
- emit_mov_r32_m32(dst, REG_EAX, MABS(&m_stacksave)); // mov eax,stacksave
- emit_mov_r32_m32(dst, REG_EAX, MBD(REG_EAX, -4)); // mov eax,[eax-4]
- emit_sub_r32_imm(dst, REG_EAX, 1); // sub eax,1
- emit_mov_m32_imm(dst, MBD(REG_ESP, 8), inst.param(1).mapvar()); // mov [esp+8],param1
- emit_mov_m32_r32(dst, MBD(REG_ESP, 4), REG_EAX); // mov [esp+4],eax
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_map); // mov [esp],m_map
- emit_call(dst, (x86code *)&drc_map_variables::static_get_value); // call drcmap_get_value
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(&m_stacksave)); // mov eax,stacksave
+ emit_mov_r32_m32(dst, REG_EAX, MBD(REG_EAX, -4)); // mov eax,[eax-4]
+ emit_sub_r32_imm(dst, REG_EAX, 1); // sub eax,1
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 8), inst.param(1).mapvar()); // mov [esp+8],param1
+ emit_mov_m32_r32(dst, MBD(REG_ESP, 4), REG_EAX); // mov [esp+4],eax
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_map); // mov [esp],m_map
+ emit_call(dst, (x86code *)&drc_map_variables::static_get_value); // call drcmap_get_value
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
}
@@ -3346,17 +3346,17 @@ void drcbe_x86::op_setfmod(x86code *&dst, const instruction &inst)
if (srcp.is_immediate())
{
int value = srcp.immediate() & 3;
- emit_mov_m8_imm(dst, MABS(&m_state.fmod), value); // mov [fmod],srcp
- emit_fldcw_m16(dst, MABS(&fp_control[value])); // fldcw fp_control[srcp]
+ emit_mov_m8_imm(dst, MABS(&m_state.fmod), value); // mov [fmod],srcp
+ emit_fldcw_m16(dst, MABS(&fp_control[value])); // fldcw fp_control[srcp]
}
// register/memory case
else
{
- emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
- emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
- emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
- emit_fldcw_m16(dst, MABSI(&fp_control[0], REG_EAX, 2)); // fldcw fp_control[eax]
+ emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
+ emit_and_r32_imm(dst, REG_EAX, 3); // and eax,3
+ emit_mov_m8_r8(dst, MABS(&m_state.fmod), REG_AL); // mov [fmod],al
+ emit_fldcw_m16(dst, MABSI(&fp_control[0], REG_EAX, 2)); // fldcw fp_control[eax]
}
}
@@ -3377,11 +3377,11 @@ void drcbe_x86::op_getfmod(x86code *&dst, const instruction &inst)
// fetch the current mode and store to the destination
if (dstp.is_int_register())
- emit_movzx_r32_m8(dst, dstp.ireg(), MABS(&m_state.fmod)); // movzx reg,[fmod]
+ emit_movzx_r32_m8(dst, dstp.ireg(), MABS(&m_state.fmod)); // movzx reg,[fmod]
else
{
- emit_movzx_r32_m8(dst, REG_EAX, MABS(&m_state.fmod)); // movzx eax,[fmod]
- emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
+ emit_movzx_r32_m8(dst, REG_EAX, MABS(&m_state.fmod)); // movzx eax,[fmod]
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
}
}
@@ -3402,11 +3402,11 @@ void drcbe_x86::op_getexp(x86code *&dst, const instruction &inst)
// fetch the exception parameter and store to the destination
if (dstp.is_int_register())
- emit_mov_r32_m32(dst, dstp.ireg(), MABS(&m_state.exp)); // mov reg,[exp]
+ emit_mov_r32_m32(dst, dstp.ireg(), MABS(&m_state.exp)); // mov reg,[exp]
else
{
- emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
- emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(&m_state.exp)); // mov eax,[exp]
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
}
}
@@ -3441,108 +3441,108 @@ void drcbe_x86::op_getflgs(x86code *&dst, const instruction &inst)
{
// single flags only
case FLAG_C:
- emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
break;
case FLAG_V:
- emit_setcc_r8(dst, x86emit::COND_O, REG_AL); // seto al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
+ emit_setcc_r8(dst, x86emit::COND_O, REG_AL); // seto al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
break;
case FLAG_Z:
- emit_setcc_r8(dst, x86emit::COND_Z, REG_AL); // setz al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
+ emit_setcc_r8(dst, x86emit::COND_Z, REG_AL); // setz al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
break;
case FLAG_S:
- emit_setcc_r8(dst, x86emit::COND_S, REG_AL); // sets al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 3); // shl dstreg,3
+ emit_setcc_r8(dst, x86emit::COND_S, REG_AL); // sets al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 3); // shl dstreg,3
break;
case FLAG_U:
- emit_setcc_r8(dst, x86emit::COND_P, REG_AL); // setp al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
- emit_shl_r32_imm(dst, dstreg, 4); // shl dstreg,4
+ emit_setcc_r8(dst, x86emit::COND_P, REG_AL); // setp al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_shl_r32_imm(dst, dstreg, 4); // shl dstreg,4
break;
// carry plus another flag
case FLAG_C | FLAG_V:
- emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
- emit_setcc_r8(dst, x86emit::COND_O, REG_CL); // seto cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
+ emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
+ emit_setcc_r8(dst, x86emit::COND_O, REG_CL); // seto cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
break;
case FLAG_C | FLAG_Z:
- emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
- emit_setcc_r8(dst, x86emit::COND_Z, REG_CL); // setz cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
+ emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
+ emit_setcc_r8(dst, x86emit::COND_Z, REG_CL); // setz cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
break;
case FLAG_C | FLAG_S:
- emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
- emit_setcc_r8(dst, x86emit::COND_S, REG_CL); // sets cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 8, 0)); // lea dstreg,[eax+ecx*8]
+ emit_setcc_r8(dst, x86emit::COND_C, REG_AL); // setc al
+ emit_setcc_r8(dst, x86emit::COND_S, REG_CL); // sets cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 8, 0)); // lea dstreg,[eax+ecx*8]
break;
// overflow plus another flag
case FLAG_V | FLAG_Z:
- emit_setcc_r8(dst, x86emit::COND_O, REG_AL); // seto al
- emit_setcc_r8(dst, x86emit::COND_Z, REG_CL); // setz cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
- emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
+ emit_setcc_r8(dst, x86emit::COND_O, REG_AL); // seto al
+ emit_setcc_r8(dst, x86emit::COND_Z, REG_CL); // setz cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
+ emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
break;
case FLAG_V | FLAG_S:
- emit_setcc_r8(dst, x86emit::COND_O, REG_AL); // seto al
- emit_setcc_r8(dst, x86emit::COND_S, REG_CL); // sets cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
- emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
+ emit_setcc_r8(dst, x86emit::COND_O, REG_AL); // seto al
+ emit_setcc_r8(dst, x86emit::COND_S, REG_CL); // sets cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 4, 0)); // lea dstreg,[eax+ecx*4]
+ emit_shl_r32_imm(dst, dstreg, 1); // shl dstreg,1
break;
// zero plus another flag
case FLAG_Z | FLAG_S:
- emit_setcc_r8(dst, x86emit::COND_Z, REG_AL); // setz al
- emit_setcc_r8(dst, x86emit::COND_S, REG_CL); // sets cl
- emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
- emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
- emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
- emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
+ emit_setcc_r8(dst, x86emit::COND_Z, REG_AL); // setz al
+ emit_setcc_r8(dst, x86emit::COND_S, REG_CL); // sets cl
+ emit_movzx_r32_r8(dst, REG_EAX, REG_AL); // movzx eax,al
+ emit_movzx_r32_r8(dst, REG_ECX, REG_CL); // movzx ecx,al
+ emit_lea_r32_m32(dst, dstreg, MBISD(REG_EAX, REG_ECX, 2, 0)); // lea dstreg,[eax+ecx*2]
+ emit_shl_r32_imm(dst, dstreg, 2); // shl dstreg,2
break;
// default cases
default:
- emit_pushf(dst); // pushf
- emit_pop_r32(dst, REG_EAX); // pop eax
- emit_and_r32_imm(dst, REG_EAX, flagmask); // and eax,flagmask
- emit_movzx_r32_m8(dst, dstreg, MABSI(flags_map, REG_EAX)); // movzx dstreg,[flags_map]
+ emit_pushf(dst); // pushf
+ emit_pop_r32(dst, REG_EAX); // pop eax
+ emit_and_r32_imm(dst, REG_EAX, flagmask); // and eax,flagmask
+ emit_movzx_r32_m8(dst, dstreg, MABSI(flags_map, REG_EAX)); // movzx dstreg,[flags_map]
break;
}
// store low 32 bits
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
{
// general case
if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
else if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
}
}
@@ -3562,8 +3562,8 @@ void drcbe_x86::op_save(x86code *&dst, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_M);
// copy live state to the destination
- emit_mov_r32_imm(dst, REG_ECX, (FPTR)dstp.memory()); // mov ecx,dstp
- emit_call(dst, m_save); // call save
+ emit_mov_r32_imm(dst, REG_ECX, (FPTR)dstp.memory()); // mov ecx,dstp
+ emit_call(dst, m_save); // call save
}
@@ -3581,8 +3581,8 @@ void drcbe_x86::op_restore(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(0), PTYPE_M);
// copy live state from the destination
- emit_mov_r32_imm(dst, REG_ECX, (FPTR)srcp.memory()); // mov ecx,dstp
- emit_call(dst, m_restore); // call restore
+ emit_mov_r32_imm(dst, REG_ECX, (FPTR)srcp.memory()); // mov ecx,dstp
+ emit_call(dst, m_restore); // call restore
}
@@ -3618,15 +3618,15 @@ void drcbe_x86::op_load(x86code *&dst, const instruction &inst)
if (indp.is_immediate())
{
if (size == SIZE_BYTE)
- emit_movzx_r32_m8(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movzx dstreg,[basep + scale*indp]
+ emit_movzx_r32_m8(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_WORD)
- emit_movzx_r32_m16(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movzx dstreg,[basep + scale*indp]
+ emit_movzx_r32_m16(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
{
- emit_mov_r32_m32(dst, REG_EDX, MABS(basep.memory(scale*indp.immediate() + 4))); // mov edx,[basep + scale*indp + 4]
- emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, REG_EDX, MABS(basep.memory(scale*indp.immediate() + 4))); // mov edx,[basep + scale*indp + 4]
+ emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
}
}
@@ -3636,20 +3636,20 @@ void drcbe_x86::op_load(x86code *&dst, const instruction &inst)
int indreg = indp.select_register(REG_ECX);
emit_mov_r32_p32(dst, indreg, indp);
if (size == SIZE_BYTE)
- emit_movzx_r32_m8(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movzx dstreg,[basep + scale*indp]
+ emit_movzx_r32_m8(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_WORD)
- emit_movzx_r32_m16(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movzx dstreg,[basep + scale*indp]
+ emit_movzx_r32_m16(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
{
- emit_mov_r32_m32(dst, REG_EDX, MABSI(basep.memory(4), indreg, scale)); // mov edx,[basep + scale*indp + 4]
- emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, REG_EDX, MABSI(basep.memory(4), indreg, scale)); // mov edx,[basep + scale*indp + 4]
+ emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
}
}
// store low 32 bits
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
@@ -3658,18 +3658,18 @@ void drcbe_x86::op_load(x86code *&dst, const instruction &inst)
if (size != SIZE_QWORD)
{
if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
else if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
}
// 8-byte case
else
{
if (dstp.is_memory())
- emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
+ emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
else if (dstp.is_int_register())
- emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
+ emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
set_last_upper_reg(dst, dstp, REG_EDX);
}
}
@@ -3704,15 +3704,15 @@ void drcbe_x86::op_loads(x86code *&dst, const instruction &inst)
if (indp.is_immediate())
{
if (size == SIZE_BYTE)
- emit_movsx_r32_m8(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movsx dstreg,[basep + scale*indp]
+ emit_movsx_r32_m8(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movsx dstreg,[basep + scale*indp]
else if (size == SIZE_WORD)
- emit_movsx_r32_m16(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movsx dstreg,[basep + scale*indp]
+ emit_movsx_r32_m16(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // movsx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
{
- emit_mov_r32_m32(dst, REG_EDX, MABS(basep.memory(scale*indp.immediate() + 4))); // mov edx,[basep + scale*indp + 4]
- emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, REG_EDX, MABS(basep.memory(scale*indp.immediate() + 4))); // mov edx,[basep + scale*indp + 4]
+ emit_mov_r32_m32(dst, dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
}
}
@@ -3722,29 +3722,29 @@ void drcbe_x86::op_loads(x86code *&dst, const instruction &inst)
int indreg = indp.select_register(REG_ECX);
emit_mov_r32_p32(dst, indreg, indp);
if (size == SIZE_BYTE)
- emit_movsx_r32_m8(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movsx dstreg,[basep + scale*indp]
+ emit_movsx_r32_m8(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movsx dstreg,[basep + scale*indp]
else if (size == SIZE_WORD)
- emit_movsx_r32_m16(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movsx dstreg,[basep + scale*indp]
+ emit_movsx_r32_m16(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // movsx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
{
- emit_mov_r32_m32(dst, REG_EDX, MABSI(basep.memory(4), indreg, scale)); // mov edx,[basep + scale*indp + 4]
- emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
+ emit_mov_r32_m32(dst, REG_EDX, MABSI(basep.memory(4), indreg, scale)); // mov edx,[basep + scale*indp + 4]
+ emit_mov_r32_m32(dst, dstreg, MABSI(basep.memory(), indreg, scale)); // mov dstreg,[basep + scale*indp]
}
}
// store low 32 bits
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
{
- emit_cdq(dst); // cdq
+ emit_cdq(dst); // cdq
if (dstp.is_memory())
- emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
+ emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
else if (dstp.is_int_register())
- emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
+ emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
set_last_upper_reg(dst, dstp, REG_EDX);
}
set_last_lower_reg(dst, dstp, dstreg);
@@ -3782,14 +3782,14 @@ void drcbe_x86::op_store(x86code *&dst, const instruction &inst)
if (srcp.is_immediate())
{
if (size == SIZE_BYTE)
- emit_mov_m8_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
+ emit_mov_m8_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
else if (size == SIZE_WORD)
- emit_mov_m16_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
+ emit_mov_m16_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
else if (size == SIZE_DWORD)
- emit_mov_m32_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
+ emit_mov_m32_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
else if (size == SIZE_QWORD)
{
- emit_mov_m32_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
+ emit_mov_m32_imm(dst, MABS(basep.memory(scale*indp.immediate())), srcp.immediate()); // mov [basep + scale*indp],srcp
emit_mov_m32_imm(dst, MABS(basep.memory(scale*indp.immediate() + 4)), srcp.immediate() >> 32);
// mov [basep + scale*indp + 4],srcp >> 32
}
@@ -3799,19 +3799,19 @@ void drcbe_x86::op_store(x86code *&dst, const instruction &inst)
else
{
if (size != SIZE_QWORD)
- emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
else
- emit_mov_r64_p64(dst, srcreg, REG_EDX, srcp); // mov edx:srcreg,srcp
+ emit_mov_r64_p64(dst, srcreg, REG_EDX, srcp); // mov edx:srcreg,srcp
if (size == SIZE_BYTE)
- emit_mov_m8_r8(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m8_r8(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
else if (size == SIZE_WORD)
- emit_mov_m16_r16(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m16_r16(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
else if (size == SIZE_DWORD)
- emit_mov_m32_r32(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m32_r32(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
else if (size == SIZE_QWORD)
{
- emit_mov_m32_r32(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
- emit_mov_m32_r32(dst, MABS(basep.memory(scale*indp.immediate() + 4)), REG_EDX); // mov [basep + scale*indp + 4],edx
+ emit_mov_m32_r32(dst, MABS(basep.memory(scale*indp.immediate())), srcreg); // mov [basep + scale*indp],srcreg
+ emit_mov_m32_r32(dst, MABS(basep.memory(scale*indp.immediate() + 4)), REG_EDX); // mov [basep + scale*indp + 4],edx
}
}
}
@@ -3820,20 +3820,20 @@ void drcbe_x86::op_store(x86code *&dst, const instruction &inst)
else
{
int indreg = indp.select_register(REG_ECX);
- emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
+ emit_mov_r32_p32(dst, indreg, indp); // mov indreg,indp
// immediate source
if (srcp.is_immediate())
{
if (size == SIZE_BYTE)
- emit_mov_m8_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 1*ecx],srcp
+ emit_mov_m8_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 1*ecx],srcp
else if (size == SIZE_WORD)
- emit_mov_m16_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 2*ecx],srcp
+ emit_mov_m16_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 2*ecx],srcp
else if (size == SIZE_DWORD)
- emit_mov_m32_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 4*ecx],srcp
+ emit_mov_m32_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 4*ecx],srcp
else if (size == SIZE_QWORD)
{
- emit_mov_m32_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 8*ecx],srcp
+ emit_mov_m32_imm(dst, MABSI(basep.memory(), indreg, scale), srcp.immediate()); // mov [basep + 8*ecx],srcp
emit_mov_m32_imm(dst, MABSI(basep.memory(4), indreg, scale), srcp.immediate() >> 32);
// mov [basep + 8*ecx + 4],srcp >> 32
}
@@ -3843,19 +3843,19 @@ void drcbe_x86::op_store(x86code *&dst, const instruction &inst)
else
{
if (size != SIZE_QWORD)
- emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
+ emit_mov_r32_p32(dst, srcreg, srcp); // mov srcreg,srcp
else
- emit_mov_r64_p64(dst, srcreg, REG_EDX, srcp); // mov edx:srcreg,srcp
+ emit_mov_r64_p64(dst, srcreg, REG_EDX, srcp); // mov edx:srcreg,srcp
if (size == SIZE_BYTE)
- emit_mov_m8_r8(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 1*ecx],srcreg
+ emit_mov_m8_r8(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 1*ecx],srcreg
else if (size == SIZE_WORD)
- emit_mov_m16_r16(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 2*ecx],srcreg
+ emit_mov_m16_r16(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 2*ecx],srcreg
else if (size == SIZE_DWORD)
- emit_mov_m32_r32(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 4*ecx],srcreg
+ emit_mov_m32_r32(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 4*ecx],srcreg
else if (size == SIZE_QWORD)
{
- emit_mov_m32_r32(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 8*ecx],srcreg
- emit_mov_m32_r32(dst, MABSI(basep.memory(4), indreg, scale), REG_EDX); // mov [basep + 8*ecx],edx
+ emit_mov_m32_r32(dst, MABSI(basep.memory(), indreg, scale), srcreg); // mov [basep + 8*ecx],srcreg
+ emit_mov_m32_r32(dst, MABSI(basep.memory(4), indreg, scale), REG_EDX); // mov [basep + 8*ecx],edx
}
}
}
@@ -3883,35 +3883,35 @@ void drcbe_x86::op_read(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_EAX);
// set up a call to the read byte handler
- emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
if (spacesizep.size() == SIZE_BYTE)
{
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].read_byte);
// call read_byte
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
}
else if (spacesizep.size() == SIZE_WORD)
{
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].read_word);
// call read_word
- emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
+ emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
}
else if (spacesizep.size() == SIZE_DWORD)
{
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].read_dword);
// call read_dword
- emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
+ emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
}
else if (spacesizep.size() == SIZE_QWORD)
{
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].read_qword);
// call read_qword
- emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
+ emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
}
// store low 32 bits
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
@@ -3920,18 +3920,18 @@ void drcbe_x86::op_read(x86code *&dst, const instruction &inst)
if (spacesizep.size() != SIZE_QWORD)
{
if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
else if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
}
// 8-byte case
else
{
if (dstp.is_memory())
- emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
+ emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
else if (dstp.is_int_register())
- emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
+ emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
}
}
}
@@ -3960,32 +3960,32 @@ void drcbe_x86::op_readm(x86code *&dst, const instruction &inst)
// set up a call to the read byte handler
if (spacesizep.size() != SIZE_QWORD)
- emit_mov_m32_p32(dst, MBD(REG_ESP, 8), maskp); // mov [esp+8],maskp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 8), maskp); // mov [esp+8],maskp
else
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), maskp); // mov [esp+8],maskp
- emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), maskp); // mov [esp+8],maskp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
if (spacesizep.size() == SIZE_WORD)
{
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].read_word_masked);
// call read_word_masked
- emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
+ emit_movzx_r32_r16(dst, dstreg, REG_AX); // movzx dstreg,ax
}
else if (spacesizep.size() == SIZE_DWORD)
{
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].read_dword_masked);
// call read_dword_masked
- emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
+ emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
}
else if (spacesizep.size() == SIZE_QWORD)
{
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].read_qword_masked);
// call read_qword_masked
- emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
+ emit_mov_r32_r32(dst, dstreg, REG_EAX); // mov dstreg,eax
}
// store low 32 bits
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
@@ -3994,18 +3994,18 @@ void drcbe_x86::op_readm(x86code *&dst, const instruction &inst)
if (spacesizep.size() != SIZE_QWORD)
{
if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
else if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
}
// 8-byte case
else
{
if (dstp.is_memory())
- emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
+ emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp+4],edx
else if (dstp.is_int_register())
- emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
+ emit_mov_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // mov [reghi],edx
}
}
}
@@ -4030,11 +4030,11 @@ void drcbe_x86::op_write(x86code *&dst, const instruction &inst)
// set up a call to the write byte handler
if (spacesizep.size() != SIZE_QWORD)
- emit_mov_m32_p32(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
else
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
- emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
if (spacesizep.size() == SIZE_BYTE)
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].write_byte);
// call write_byte
@@ -4071,16 +4071,16 @@ void drcbe_x86::op_writem(x86code *&dst, const instruction &inst)
// set up a call to the write byte handler
if (spacesizep.size() != SIZE_QWORD)
{
- emit_mov_m32_p32(dst, MBD(REG_ESP, 12), maskp); // mov [esp+12],maskp
- emit_mov_m32_p32(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 12), maskp); // mov [esp+12],maskp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
}
else
{
- emit_mov_m64_p64(dst, MBD(REG_ESP, 16), maskp); // mov [esp+16],maskp
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 16), maskp); // mov [esp+16],maskp
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
}
- emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacesizep.space()]); // mov [esp],space
if (spacesizep.size() == SIZE_WORD)
emit_call(dst, (x86code *)m_accessors[spacesizep.space()].write_word_masked);
// call write_word_masked
@@ -4130,16 +4130,16 @@ void drcbe_x86::op_carry(x86code *&dst, const instruction &inst)
if (bitp.is_immediate())
{
if (srcp.is_memory())
- emit_bt_m32_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
+ emit_bt_m32_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
else if (srcp.is_int_register())
- emit_bt_r32_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
+ emit_bt_r32_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
}
else
{
if (srcp.is_memory())
- emit_bt_m32_r32(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
+ emit_bt_m32_r32(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
else if (srcp.is_int_register())
- emit_bt_r32_r32(dst, srcp.ireg(), REG_ECX); // bt [srcp],ecx
+ emit_bt_r32_r32(dst, srcp.ireg(), REG_ECX); // bt [srcp],ecx
}
}
@@ -4149,20 +4149,20 @@ void drcbe_x86::op_carry(x86code *&dst, const instruction &inst)
if (bitp.is_immediate())
{
if (srcp.is_memory())
- emit_bt_m32_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
+ emit_bt_m32_imm(dst, MABS(srcp.memory()), bitp.immediate()); // bt [srcp],bitp
else if (srcp.is_int_register() && bitp.immediate() < 32)
- emit_bt_r32_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
+ emit_bt_r32_imm(dst, srcp.ireg(), bitp.immediate()); // bt srcp,bitp
else if (srcp.is_int_register() && bitp.immediate() >= 32)
- emit_bt_m32_imm(dst, MABS(m_reghi[srcp.ireg()]), bitp.immediate() - 32); // bt [srcp.hi],bitp
+ emit_bt_m32_imm(dst, MABS(m_reghi[srcp.ireg()]), bitp.immediate() - 32); // bt [srcp.hi],bitp
}
else
{
if (srcp.is_memory())
- emit_bt_m32_r32(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
+ emit_bt_m32_r32(dst, MABS(srcp.memory()), REG_ECX); // bt [srcp],ecx
else if (srcp.is_int_register())
{
- emit_mov_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), srcp.ireg()); // mov [srcp.lo],srcp
- emit_bt_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), REG_ECX); // bt [srcp],ecx
+ emit_mov_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), srcp.ireg()); // mov [srcp.lo],srcp
+ emit_bt_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), REG_ECX); // bt [srcp],ecx
}
}
}
@@ -4187,20 +4187,20 @@ void drcbe_x86::op_set(x86code *&dst, const instruction &inst)
int dstreg = dstp.select_register(REG_EAX);
// set to AL
- emit_setcc_r8(dst, X86_CONDITION(inst.condition()), REG_AL); // setcc al
- emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
+ emit_setcc_r8(dst, X86_CONDITION(inst.condition()), REG_AL); // setcc al
+ emit_movzx_r32_r8(dst, dstreg, REG_AL); // movzx dstreg,al
// store low 32 bits
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
{
// general case
if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov [dstp+4],0
else if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov [reghi],0
}
}
@@ -4228,18 +4228,18 @@ void drcbe_x86::op_mov(x86code *&dst, const instruction &inst)
// always start with a jmp
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// 32-bit form
if (inst.size() == 4)
{
// register to memory
if (dstp.is_memory() && srcp.is_int_register())
- emit_mov_m32_r32(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
// immediate to memory
else if (dstp.is_memory() && srcp.is_immediate())
- emit_mov_m32_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
+ emit_mov_m32_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
// conditional memory to register
else if (inst.condition() != uml::COND_ALWAYS && dstp.is_int_register() && srcp.is_memory())
@@ -4262,8 +4262,8 @@ void drcbe_x86::op_mov(x86code *&dst, const instruction &inst)
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, srcp); // mov dstreg,srcp
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4273,23 +4273,23 @@ void drcbe_x86::op_mov(x86code *&dst, const instruction &inst)
// register to memory
if (dstp.is_memory() && srcp.is_int_register())
{
- emit_mov_r32_m32(dst, REG_EAX, MABS(m_reghi[srcp.ireg()])); // mov eax,reghi[srcp]
- emit_mov_m32_r32(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
- emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EAX); // mov [dstp+4],eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS(m_reghi[srcp.ireg()])); // mov eax,reghi[srcp]
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), srcp.ireg()); // mov [dstp],srcp
+ emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EAX); // mov [dstp+4],eax
}
// immediate to memory
else if (dstp.is_memory() && srcp.is_immediate())
{
- emit_mov_m32_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), srcp.immediate() >> 32); // mov [dstp+4],srcp >> 32
+ emit_mov_m32_imm(dst, MABS(dstp.memory()), srcp.immediate()); // mov [dstp],srcp
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), srcp.immediate() >> 32); // mov [dstp+4],srcp >> 32
}
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, REG_EDX, srcp); // mov edx:dstreg,srcp
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, srcp); // mov edx:dstreg,srcp
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
}
}
@@ -4322,7 +4322,7 @@ void drcbe_x86::op_sext(x86code *&dst, const instruction &inst)
// convert 8-bit source registers to EAX
if (sizep.size() == SIZE_BYTE && srcp.is_int_register() && (srcp.ireg() & 4))
{
- emit_mov_r32_r32(dst, REG_EAX, srcp.ireg()); // mov eax,srcp
+ emit_mov_r32_r32(dst, REG_EAX, srcp.ireg()); // mov eax,srcp
srcp = be_parameter::make_ireg(REG_EAX);
}
@@ -4330,33 +4330,33 @@ void drcbe_x86::op_sext(x86code *&dst, const instruction &inst)
if (srcp.is_memory())
{
if (sizep.size() == SIZE_BYTE)
- emit_movsx_r32_m8(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
+ emit_movsx_r32_m8(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
else if (sizep.size() == SIZE_WORD)
- emit_movsx_r32_m16(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
+ emit_movsx_r32_m16(dst, dstreg, MABS(srcp.memory())); // movsx dstreg,[srcp]
else if (sizep.size() == SIZE_DWORD)
- emit_mov_r32_m32(dst, dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
+ emit_mov_r32_m32(dst, dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
}
else if (srcp.is_int_register())
{
if (sizep.size() == SIZE_BYTE)
- emit_movsx_r32_r8(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
+ emit_movsx_r32_r8(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
else if (sizep.size() == SIZE_WORD)
- emit_movsx_r32_r16(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
+ emit_movsx_r32_r16(dst, dstreg, srcp.ireg()); // movsx dstreg,srcp
else if (sizep.size() == SIZE_DWORD && dstreg != srcp.ireg())
- emit_mov_r32_r32(dst, dstreg, srcp.ireg()); // mov dstreg,srcp
+ emit_mov_r32_r32(dst, dstreg, srcp.ireg()); // mov dstreg,srcp
}
if (inst.flags() != 0)
- emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
+ emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
// 32-bit form: store the low 32 bits
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
// 64-bit form: sign extend to 64 bits and store edx:eax
else if (inst.size() == 8)
{
- emit_cdq(dst); // cdq
- emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
+ emit_cdq(dst); // cdq
+ emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
}
}
@@ -4384,19 +4384,19 @@ void drcbe_x86::op_roland(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
- emit_rol_r32_p32(dst, dstreg, shiftp, inst); // rol dstreg,shiftp
- emit_and_r32_p32(dst, dstreg, maskp, inst); // and dstreg,maskp
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,srcp
+ emit_rol_r32_p32(dst, dstreg, shiftp, inst); // rol dstreg,shiftp
+ emit_and_r32_p32(dst, dstreg, maskp, inst); // and dstreg,maskp
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, dstreg, REG_EDX, srcp); // mov edx:dstreg,srcp
- emit_rol_r64_p64(dst, dstreg, REG_EDX, shiftp, inst); // rol edx:dstreg,shiftp
- emit_and_r64_p64(dst, dstreg, REG_EDX, maskp, inst); // and edx:dstreg,maskp
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, srcp); // mov edx:dstreg,srcp
+ emit_rol_r64_p64(dst, dstreg, REG_EDX, shiftp, inst); // rol edx:dstreg,shiftp
+ emit_and_r64_p64(dst, dstreg, REG_EDX, maskp, inst); // and edx:dstreg,maskp
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
}
}
@@ -4424,84 +4424,84 @@ void drcbe_x86::op_rolins(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
- emit_rol_r32_p32(dst, REG_EAX, shiftp, inst); // rol eax,shiftp
- emit_mov_r32_p32(dst, dstreg, dstp); // mov dstreg,dstp
+ emit_mov_r32_p32(dst, REG_EAX, srcp); // mov eax,srcp
+ emit_rol_r32_p32(dst, REG_EAX, shiftp, inst); // rol eax,shiftp
+ emit_mov_r32_p32(dst, dstreg, dstp); // mov dstreg,dstp
if (maskp.is_immediate())
{
- emit_and_r32_imm(dst, REG_EAX, maskp.immediate()); // and eax,maskp
- emit_and_r32_imm(dst, dstreg, ~maskp.immediate()); // and dstreg,~maskp
+ emit_and_r32_imm(dst, REG_EAX, maskp.immediate()); // and eax,maskp
+ emit_and_r32_imm(dst, dstreg, ~maskp.immediate()); // and dstreg,~maskp
}
else
{
- emit_mov_r32_p32(dst, REG_EDX, maskp); // mov edx,maskp
- emit_and_r32_r32(dst, REG_EAX, REG_EDX); // and eax,edx
- emit_not_r32(dst, REG_EDX); // not edx
- emit_and_r32_r32(dst, dstreg, REG_EDX); // and dstreg,edx
+ emit_mov_r32_p32(dst, REG_EDX, maskp); // mov edx,maskp
+ emit_and_r32_r32(dst, REG_EAX, REG_EDX); // and eax,edx
+ emit_not_r32(dst, REG_EDX); // not edx
+ emit_and_r32_r32(dst, dstreg, REG_EDX); // and dstreg,edx
}
- emit_or_r32_r32(dst, dstreg, REG_EAX); // or dstreg,eax
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_or_r32_r32(dst, dstreg, REG_EAX); // or dstreg,eax
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, REG_EAX, REG_EDX, srcp); // mov edx:eax,srcp
- emit_rol_r64_p64(dst, REG_EAX, REG_EDX, shiftp, inst); // rol edx:eax,shiftp
+ emit_mov_r64_p64(dst, REG_EAX, REG_EDX, srcp); // mov edx:eax,srcp
+ emit_rol_r64_p64(dst, REG_EAX, REG_EDX, shiftp, inst); // rol edx:eax,shiftp
if (maskp.is_immediate())
{
- emit_and_r32_imm(dst, REG_EAX, maskp.immediate()); // and eax,maskp
- emit_and_r32_imm(dst, REG_EDX, maskp.immediate() >> 32); // and edx,maskp >> 32
+ emit_and_r32_imm(dst, REG_EAX, maskp.immediate()); // and eax,maskp
+ emit_and_r32_imm(dst, REG_EDX, maskp.immediate() >> 32); // and edx,maskp >> 32
if (dstp.is_int_register())
{
- emit_and_r32_imm(dst, dstp.ireg(), ~maskp.immediate()); // and dstp.lo,~maskp
+ emit_and_r32_imm(dst, dstp.ireg(), ~maskp.immediate()); // and dstp.lo,~maskp
emit_and_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), ~maskp.immediate() >> 32);// and dstp.hi,~maskp >> 32
- emit_or_r32_r32(dst, dstp.ireg(), REG_EAX); // or dstp.lo,eax
- emit_or_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // or dstp.hi,edx
+ emit_or_r32_r32(dst, dstp.ireg(), REG_EAX); // or dstp.lo,eax
+ emit_or_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // or dstp.hi,edx
}
else
{
- emit_and_m32_imm(dst, MABS(dstp.memory()), ~maskp.immediate()); // and dstp.lo,~maskp
- emit_and_m32_imm(dst, MABS(dstp.memory(4)), ~maskp.immediate() >> 32); // and dstp.hi,~maskp >> 32
- emit_or_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // or dstp.lo,eax
- emit_or_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // or dstp.hi,edx
+ emit_and_m32_imm(dst, MABS(dstp.memory()), ~maskp.immediate()); // and dstp.lo,~maskp
+ emit_and_m32_imm(dst, MABS(dstp.memory(4)), ~maskp.immediate() >> 32); // and dstp.hi,~maskp >> 32
+ emit_or_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // or dstp.lo,eax
+ emit_or_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // or dstp.hi,edx
}
}
else
{
int tempreg = REG_EBX;
- emit_mov_m32_r32(dst, MBD(REG_ESP, -8), tempreg); // mov [esp-8],ebx
- emit_mov_r64_p64(dst, tempreg, REG_ECX, maskp); // mov ecx:ebx,maskp
- emit_and_r32_r32(dst, REG_EAX, tempreg); // and eax,ebx
- emit_and_r32_r32(dst, REG_EDX, REG_ECX); // and edx,ecx
- emit_not_r32(dst, tempreg); // not ebx
- emit_not_r32(dst, REG_ECX); // not ecx
+ emit_mov_m32_r32(dst, MBD(REG_ESP, -8), tempreg); // mov [esp-8],ebx
+ emit_mov_r64_p64(dst, tempreg, REG_ECX, maskp); // mov ecx:ebx,maskp
+ emit_and_r32_r32(dst, REG_EAX, tempreg); // and eax,ebx
+ emit_and_r32_r32(dst, REG_EDX, REG_ECX); // and edx,ecx
+ emit_not_r32(dst, tempreg); // not ebx
+ emit_not_r32(dst, REG_ECX); // not ecx
if (dstp.is_int_register())
{
- emit_and_r32_r32(dst, dstp.ireg(), tempreg); // and dstp.lo,ebx
- emit_and_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_ECX); // and dstp.hi,ecx
- emit_or_r32_r32(dst, dstp.ireg(), REG_EAX); // or dstp.lo,eax
- emit_or_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // or dstp.hi,edx
+ emit_and_r32_r32(dst, dstp.ireg(), tempreg); // and dstp.lo,ebx
+ emit_and_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_ECX); // and dstp.hi,ecx
+ emit_or_r32_r32(dst, dstp.ireg(), REG_EAX); // or dstp.lo,eax
+ emit_or_m32_r32(dst, MABS(m_reghi[dstp.ireg()]), REG_EDX); // or dstp.hi,edx
}
else
{
- emit_and_m32_r32(dst, MABS(dstp.memory()), tempreg); // and dstp.lo,ebx
- emit_and_m32_r32(dst, MABS(dstp.memory(4)), REG_ECX); // and dstp.hi,ecx
- emit_or_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // or dstp.lo,eax
- emit_or_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // or dstp.hi,edx
+ emit_and_m32_r32(dst, MABS(dstp.memory()), tempreg); // and dstp.lo,ebx
+ emit_and_m32_r32(dst, MABS(dstp.memory(4)), REG_ECX); // and dstp.hi,ecx
+ emit_or_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // or dstp.lo,eax
+ emit_or_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // or dstp.hi,edx
}
- emit_mov_r32_m32(dst, tempreg, MBD(REG_ESP, -8)); // mov ebx,[esp-8]
+ emit_mov_r32_m32(dst, tempreg, MBD(REG_ESP, -8)); // mov ebx,[esp-8]
}
if (inst.flags() == FLAG_Z)
- emit_or_r32_r32(dst, REG_EAX, REG_EDX); // or eax,edx
+ emit_or_r32_r32(dst, REG_EAX, REG_EDX); // or eax,edx
else if (inst.flags() == FLAG_S)
;// do nothing -- final OR will have the right result
else if (inst.flags() == (FLAG_Z | FLAG_S))
{
- emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
- emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
- emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
+ emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
+ emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
}
}
}
@@ -4532,22 +4532,22 @@ void drcbe_x86::op_add(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_add_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
+ emit_add_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
// reg = reg + imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && inst.flags() == 0)
- emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), src2p.immediate())); // lea dstp,[src1p+src2p]
+ emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), src2p.immediate())); // lea dstp,[src1p+src2p]
// reg = reg + reg
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_int_register() && inst.flags() == 0)
- emit_lea_r32_m32(dst, dstp.ireg(), MBISD(src1p.ireg(), src2p.ireg(), 1, 0)); // lea dstp,[src1p+src2p]
+ emit_lea_r32_m32(dst, dstp.ireg(), MBISD(src1p.ireg(), src2p.ireg(), 1, 0)); // lea dstp,[src1p+src2p]
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_add_r32_p32(dst, dstreg, src2p, inst); // add dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_add_r32_p32(dst, dstreg, src2p, inst); // add dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4556,14 +4556,14 @@ void drcbe_x86::op_add(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_add_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
+ emit_add_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // add [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_add_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // add dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_add_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // add dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
}
@@ -4594,14 +4594,14 @@ void drcbe_x86::op_addc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_adc_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
+ emit_adc_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_adc_r32_p32(dst, dstreg, src2p, inst); // adc dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_adc_r32_p32(dst, dstreg, src2p, inst); // adc dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4610,14 +4610,14 @@ void drcbe_x86::op_addc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_adc_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
+ emit_adc_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // adc [dstp],src2p
// general case
else
{
- emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_adc_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // adc dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_adc_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // adc dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
}
@@ -4647,18 +4647,18 @@ void drcbe_x86::op_sub(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sub_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
+ emit_sub_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
// reg = reg - imm
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && inst.flags() == 0)
- emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), -src2p.immediate())); // lea dstp,[src1p-src2p]
+ emit_lea_r32_m32(dst, dstp.ireg(), MBD(src1p.ireg(), -src2p.immediate())); // lea dstp,[src1p-src2p]
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sub_r32_p32(dst, dstreg, src2p, inst); // sub dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sub_r32_p32(dst, dstreg, src2p, inst); // sub dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4667,14 +4667,14 @@ void drcbe_x86::op_sub(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sub_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
+ emit_sub_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sub [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_sub_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // sub dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_sub_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // sub dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
}
@@ -4704,14 +4704,14 @@ void drcbe_x86::op_subc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sbb_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
+ emit_sbb_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sbb_r32_p32(dst, dstreg, src2p, inst); // sbb dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sbb_r32_p32(dst, dstreg, src2p, inst); // sbb dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -4720,14 +4720,14 @@ void drcbe_x86::op_subc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sbb_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
+ emit_sbb_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // sbb [dstp],src2p
// general case
else
{
- emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_sbb_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // sbb dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_sbb_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // sbb dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
}
@@ -4756,14 +4756,14 @@ void drcbe_x86::op_cmp(x86code *&dst, const instruction &inst)
{
// memory versus anything
if (src1p.is_memory())
- emit_cmp_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // cmp [dstp],src2p
+ emit_cmp_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // cmp [dstp],src2p
// general case
else
{
if (src1p.is_immediate())
- emit_mov_r32_imm(dst, src1reg, src1p.immediate()); // mov src1reg,imm
- emit_cmp_r32_p32(dst, src1reg, src2p, inst); // cmp src1reg,src2p
+ emit_mov_r32_imm(dst, src1reg, src1p.immediate()); // mov src1reg,imm
+ emit_cmp_r32_p32(dst, src1reg, src2p, inst); // cmp src1reg,src2p
}
}
@@ -4771,8 +4771,8 @@ void drcbe_x86::op_cmp(x86code *&dst, const instruction &inst)
else
{
// general case
- emit_mov_r64_p64(dst, REG_EAX, REG_EDX, src1p); // mov eax:dstp,[src1p]
- emit_cmp_r64_p64(dst, REG_EAX, REG_EDX, src2p, inst); // cmp eax:dstp,src2p
+ emit_mov_r64_p64(dst, REG_EAX, REG_EDX, src1p); // mov eax:dstp,[src1p]
+ emit_cmp_r64_p64(dst, REG_EAX, REG_EDX, src2p, inst); // cmp eax:dstp,src2p
}
}
@@ -4803,19 +4803,19 @@ void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
// general case
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
if (src2p.is_memory())
- emit_mul_m32(dst, MABS(src2p.memory())); // mul [src2p]
+ emit_mul_m32(dst, MABS(src2p.memory())); // mul [src2p]
else if (src2p.is_int_register())
- emit_mul_r32(dst, src2p.ireg()); // mul src2p
+ emit_mul_r32(dst, src2p.ireg()); // mul src2p
else if (src2p.is_immediate())
{
- emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
- emit_mul_r32(dst, REG_EDX); // mul edx
+ emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
+ emit_mul_r32(dst, REG_EDX); // mul edx
}
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
if (compute_hi)
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
// compute flags
if (inst.flags() != 0)
@@ -4823,32 +4823,32 @@ void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst)
if (zsflags != 0)
{
if (vflag)
- emit_pushf(dst); // pushf
+ emit_pushf(dst); // pushf
if (compute_hi)
{
if (zsflags == FLAG_Z)
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
else if (zsflags == FLAG_S)
- emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
+ emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
else
{
- emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
- emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
- emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
+ emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
+ emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
}
}
else
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
// we rely on the fact that OF is cleared by all logical operations above
if (vflag)
{
- emit_pushf(dst); // pushf
- emit_pop_r32(dst, REG_EAX); // pop eax
- emit_and_m32_imm(dst, MBD(REG_ESP, 0), ~0x84); // and [esp],~0x84
- emit_or_m32_r32(dst, MBD(REG_ESP, 0), REG_EAX); // or [esp],eax
- emit_popf(dst); // popf
+ emit_pushf(dst); // pushf
+ emit_pop_r32(dst, REG_EAX); // pop eax
+ emit_and_m32_imm(dst, MBD(REG_ESP, 0), ~0x84); // and [esp],~0x84
+ emit_or_m32_r32(dst, MBD(REG_ESP, 0), REG_EAX); // or [esp],eax
+ emit_popf(dst); // popf
}
}
}
@@ -4858,28 +4858,28 @@ void drcbe_x86::op_mulu(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_m32_imm(dst, MBD(REG_ESP, 24), inst.flags()); // mov [esp+24],flags
- emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 24), inst.flags()); // mov [esp+24],flags
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
if (!compute_hi)
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
else
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // mov [esp+4],&reshi
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
- emit_call(dst, (x86code *)dmulu); // call dmulu
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // mov [esp+4],&reshi
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
+ emit_call(dst, (x86code *)dmulu); // call dmulu
if (inst.flags() != 0)
- emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
- emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
+ emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_hi)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_ECX, MABS((UINT32 *)&m_reshi + 1)); // mov ecx,reshi.hi
- emit_mov_p64_r64(dst, edstp, REG_EAX, REG_ECX); // mov edstp,ecx:eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_ECX, MABS((UINT32 *)&m_reshi + 1)); // mov ecx,reshi.hi
+ emit_mov_p64_r64(dst, edstp, REG_EAX, REG_ECX); // mov edstp,ecx:eax
}
if (inst.flags() != 0)
- emit_popf(dst); // popf
+ emit_popf(dst); // popf
}
}
@@ -4913,38 +4913,38 @@ void drcbe_x86::op_muls(x86code *&dst, const instruction &inst)
if (!compute_hi && !src1p.is_immediate() && src2p.is_immediate())
{
if (src1p.is_memory())
- emit_imul_r32_m32_imm(dst, REG_EAX, MABS(src1p.memory()), src2p.immediate()); // imul eax,[src1p],src2p
+ emit_imul_r32_m32_imm(dst, REG_EAX, MABS(src1p.memory()), src2p.immediate()); // imul eax,[src1p],src2p
else if (src1p.is_int_register())
- emit_imul_r32_r32_imm(dst, REG_EAX, src1p.ireg(), src2p.immediate()); // imul eax,src1p,src2p
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_imul_r32_r32_imm(dst, REG_EAX, src1p.ireg(), src2p.immediate()); // imul eax,src1p,src2p
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
}
// 32-bit destination, general case
else if (!compute_hi)
{
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
if (src2p.is_memory())
- emit_imul_r32_m32(dst, REG_EAX, MABS(src2p.memory())); // imul eax,[src2p]
+ emit_imul_r32_m32(dst, REG_EAX, MABS(src2p.memory())); // imul eax,[src2p]
else if (src2p.is_int_register())
- emit_imul_r32_r32(dst, REG_EAX, src2p.ireg()); // imul eax,src2p
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_imul_r32_r32(dst, REG_EAX, src2p.ireg()); // imul eax,src2p
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
}
// 64-bit destination, general case
else
{
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
if (src2p.is_memory())
- emit_imul_m32(dst, MABS(src2p.memory())); // imul [src2p]
+ emit_imul_m32(dst, MABS(src2p.memory())); // imul [src2p]
else if (src2p.is_int_register())
- emit_imul_r32(dst, src2p.ireg()); // imul src2p
+ emit_imul_r32(dst, src2p.ireg()); // imul src2p
else if (src2p.is_immediate())
{
- emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
- emit_imul_r32(dst, REG_EDX); // imul edx
+ emit_mov_r32_imm(dst, REG_EDX, src2p.immediate()); // mov edx,src2p
+ emit_imul_r32(dst, REG_EDX); // imul edx
}
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
}
// compute flags
@@ -4953,32 +4953,32 @@ void drcbe_x86::op_muls(x86code *&dst, const instruction &inst)
if (zsflags != 0)
{
if (vflag)
- emit_pushf(dst); // pushf
+ emit_pushf(dst); // pushf
if (compute_hi)
{
if (inst.flags() == FLAG_Z)
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
else if (inst.flags() == FLAG_S)
- emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
+ emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
else
{
- emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
- emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
- emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
- emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
+ emit_movzx_r32_r16(dst, REG_ECX, REG_AX); // movzx ecx,ax
+ emit_shr_r32_imm(dst, REG_EAX, 16); // shr eax,16
+ emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
+ emit_or_r32_r32(dst, REG_EDX, REG_EAX); // or edx,eax
}
}
else
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
// we rely on the fact that OF is cleared by all logical operations above
if (vflag)
{
- emit_pushf(dst); // pushf
- emit_pop_r32(dst, REG_EAX); // pop eax
- emit_and_m32_imm(dst, MBD(REG_ESP, 0), ~0x84); // and [esp],~0x84
- emit_or_m32_r32(dst, MBD(REG_ESP, 0), REG_EAX); // or [esp],eax
- emit_popf(dst); // popf
+ emit_pushf(dst); // pushf
+ emit_pop_r32(dst, REG_EAX); // pop eax
+ emit_and_m32_imm(dst, MBD(REG_ESP, 0), ~0x84); // and [esp],~0x84
+ emit_or_m32_r32(dst, MBD(REG_ESP, 0), REG_EAX); // or [esp],eax
+ emit_popf(dst); // popf
}
}
}
@@ -4988,28 +4988,28 @@ void drcbe_x86::op_muls(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_m32_imm(dst, MBD(REG_ESP, 24), inst.flags()); // mov [esp+24],flags
- emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 24), inst.flags()); // mov [esp+24],flags
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
if (!compute_hi)
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
else
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // push [esp+4],&reshi
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
- emit_call(dst, (x86code *)dmuls); // call dmuls
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // push [esp+4],&reshi
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
+ emit_call(dst, (x86code *)dmuls); // call dmuls
if (inst.flags() != 0)
- emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
- emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
+ emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_hi)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
- emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
+ emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
}
if (inst.flags() != 0)
- emit_popf(dst); // popf
+ emit_popf(dst); // popf
}
}
@@ -5036,50 +5036,50 @@ void drcbe_x86::op_divu(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
// general case
- emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
+ emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
if (inst.flags() != 0)
{
- emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
- emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
+ emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
+ emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
}
emit_link skip;
- emit_jecxz_link(dst, skip); // jecxz skip
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
- emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
- emit_div_r32(dst, REG_ECX); // div ecx
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_jecxz_link(dst, skip); // jecxz skip
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
+ emit_div_r32(dst, REG_ECX); // div ecx
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
if (compute_rem)
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
if (inst.flags() != 0)
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
- track_resolve_link(dst, skip); // skip:
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ track_resolve_link(dst, skip); // skip:
}
// 64-bit form
else if (inst.size() == 8)
{
// general case
- emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
if (!compute_rem)
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
else
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // push [esp+4],&reshi
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
- emit_call(dst, (x86code *)ddivu); // call ddivu
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // push [esp+4],&reshi
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
+ emit_call(dst, (x86code *)ddivu); // call ddivu
if (inst.flags() != 0)
- emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
- emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
+ emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_rem)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
- emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
+ emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
}
if (inst.flags() != 0)
- emit_popf(dst); // popf
+ emit_popf(dst); // popf
}
}
@@ -5106,50 +5106,50 @@ void drcbe_x86::op_divs(x86code *&dst, const instruction &inst)
if (inst.size() == 4)
{
// general case
- emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
+ emit_mov_r32_p32(dst, REG_ECX, src2p); // mov ecx,src2p
if (inst.flags() != 0)
{
- emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
- emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
+ emit_mov_r32_imm(dst, REG_EAX, 0xa0000000); // mov eax,0xa0000000
+ emit_add_r32_r32(dst, REG_EAX, REG_EAX); // add eax,eax
}
emit_link skip;
- emit_jecxz_link(dst, skip); // jecxz skip
- emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
- emit_cdq(dst); // cdq
- emit_idiv_r32(dst, REG_ECX); // idiv ecx
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_jecxz_link(dst, skip); // jecxz skip
+ emit_mov_r32_p32(dst, REG_EAX, src1p); // mov eax,src1p
+ emit_cdq(dst); // cdq
+ emit_idiv_r32(dst, REG_ECX); // idiv ecx
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
if (compute_rem)
- emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
+ emit_mov_p32_r32(dst, edstp, REG_EDX); // mov edstp,edx
if (inst.flags() != 0)
- emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
- track_resolve_link(dst, skip); // skip:
+ emit_test_r32_r32(dst, REG_EAX, REG_EAX); // test eax,eax
+ track_resolve_link(dst, skip); // skip:
}
// 64-bit form
else if (inst.size() == 8)
{
// general case
- emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 16), src2p); // mov [esp+16],src2p
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), src1p); // mov [esp+8],src1p
if (!compute_rem)
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reslo); // mov [esp+4],&reslo
else
- emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // push [esp+4],&reshi
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
- emit_call(dst, (x86code *)ddivs); // call ddivs
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 4), (FPTR)&m_reshi); // push [esp+4],&reshi
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)&m_reslo); // mov [esp],&reslo
+ emit_call(dst, (x86code *)ddivs); // call ddivs
if (inst.flags() != 0)
- emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
- emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
+ emit_push_m32(dst, MABSI(flags_unmap, REG_EAX, 4)); // push flags_unmap[eax*4]
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reslo + 0)); // mov eax,reslo.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
if (compute_rem)
{
- emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
- emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
- emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
+ emit_mov_r32_m32(dst, REG_EAX, MABS((UINT32 *)&m_reshi + 0)); // mov eax,reshi.lo
+ emit_mov_r32_m32(dst, REG_EDX, MABS((UINT32 *)&m_reshi + 1)); // mov edx,reshi.hi
+ emit_mov_p64_r64(dst, edstp, REG_EAX, REG_EDX); // mov edstp,edx:eax
}
if (inst.flags() != 0)
- emit_popf(dst); // popf
+ emit_popf(dst); // popf
}
}
@@ -5179,34 +5179,34 @@ void drcbe_x86::op_and(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_and_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
+ emit_and_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
// AND with immediate 0xff
else if (src2p.is_immediate_value(0xff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// AND with immediate 0xffff
else if (src2p.is_immediate_value(0xffff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_and_r32_p32(dst, dstreg, src2p, inst); // and dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_and_r32_p32(dst, dstreg, src2p, inst); // and dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5215,45 +5215,45 @@ void drcbe_x86::op_and(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_and_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
+ emit_and_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // and [dstp],src2p
// AND with immediate 0xff
else if (src2p.is_immediate_value(0xff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r8(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m8(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
else if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
}
// AND with immediate 0xffff
else if (src2p.is_immediate_value(0xffff) && inst.flags() == 0)
{
if (src1p.is_int_register())
- emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
+ emit_movzx_r32_r16(dst, dstreg, src1p.ireg()); // movzx dstreg,src1p
else if (src1p.is_memory())
- emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_movzx_r32_m16(dst, dstreg, MABS(src1p.memory())); // movzx dstreg,[src1p]
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
else if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
}
// AND with immediate 0xffffffff
else if (src2p.is_immediate_value(0xffffffff) && inst.flags() == 0)
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
else if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
}
// AND with immediate 0xffffffff00000000
@@ -5261,33 +5261,33 @@ void drcbe_x86::op_and(x86code *&dst, const instruction &inst)
{
if (src1p != dstp)
{
- emit_mov_r64_p64(dst, REG_NONE, REG_EDX, src1p); // mov dstreg,src1p
- emit_mov_p64_r64(dst, dstp, REG_NONE, REG_EDX); // mov dstp,dstreg
+ emit_mov_r64_p64(dst, REG_NONE, REG_EDX, src1p); // mov dstreg,src1p
+ emit_mov_p64_r64(dst, dstp, REG_NONE, REG_EDX); // mov dstp,dstreg
}
if (dstp.is_int_register())
- emit_xor_r32_r32(dst, dstp.ireg(), dstp.ireg()); // xor dstlo,dstlo
+ emit_xor_r32_r32(dst, dstp.ireg(), dstp.ireg()); // xor dstlo,dstlo
else if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory()), 0); // mov dstlo,0
+ emit_mov_m32_imm(dst, MABS(dstp.memory()), 0); // mov dstlo,0
}
// AND with immediate <= 0xffffffff
else if (src2p.is_immediate() && src2p.immediate() <= 0xffffffff && inst.flags() == 0)
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_and_r32_p32(dst, dstreg, src2p, inst); // and dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_and_r32_p32(dst, dstreg, src2p, inst); // and dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
if (dstp.is_int_register())
- emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(m_reghi[dstp.ireg()]), 0); // mov dsthi,0
else if (dstp.is_memory())
- emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
+ emit_mov_m32_imm(dst, MABS(dstp.memory(4)), 0); // mov dsthi,0
}
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_and_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // and dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_and_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // and dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
}
@@ -5317,13 +5317,13 @@ void drcbe_x86::op_test(x86code *&dst, const instruction &inst)
{
// src1p in memory
if (src1p.is_memory())
- emit_test_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // test [src1p],src2p
+ emit_test_m32_p32(dst, MABS(src1p.memory()), src2p, inst); // test [src1p],src2p
// general case
else
{
- emit_mov_r32_p32(dst, src1reg, src1p); // mov src1reg,src1p
- emit_test_r32_p32(dst, src1reg, src2p, inst); // test src1reg,src2p
+ emit_mov_r32_p32(dst, src1reg, src1p); // mov src1reg,src1p
+ emit_test_r32_p32(dst, src1reg, src2p, inst); // test src1reg,src2p
}
}
@@ -5332,13 +5332,13 @@ void drcbe_x86::op_test(x86code *&dst, const instruction &inst)
{
// src1p in memory
if (src1p.is_memory())
- emit_test_m64_p64(dst, MABS(src1p.memory()), src2p, inst); // test [dstp],src2p
+ emit_test_m64_p64(dst, MABS(src1p.memory()), src2p, inst); // test [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, src1reg, REG_EDX, src1p); // mov src1reg:dstp,[src1p]
- emit_test_r64_p64(dst, src1reg, REG_EDX, src2p, inst); // test src1reg:dstp,src2p
+ emit_mov_r64_p64(dst, src1reg, REG_EDX, src1p); // mov src1reg:dstp,[src1p]
+ emit_test_r64_p64(dst, src1reg, REG_EDX, src2p, inst); // test src1reg:dstp,src2p
}
}
}
@@ -5369,14 +5369,14 @@ void drcbe_x86::op_or(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_or_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
+ emit_or_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_or_r32_p32(dst, dstreg, src2p, inst); // or dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_or_r32_p32(dst, dstreg, src2p, inst); // or dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5385,14 +5385,14 @@ void drcbe_x86::op_or(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_or_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
+ emit_or_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // or [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_or_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // or dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_or_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // or dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
}
@@ -5423,14 +5423,14 @@ void drcbe_x86::op_xor(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_xor_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
+ emit_xor_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_xor_r32_p32(dst, dstreg, src2p, inst); // xor dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_xor_r32_p32(dst, dstreg, src2p, inst); // xor dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5439,14 +5439,14 @@ void drcbe_x86::op_xor(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_xor_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
+ emit_xor_m64_p64(dst, MABS(dstp.memory()), src2p, inst); // xor [dstp],src2p
// general case
else
{
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_xor_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // xor dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_xor_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // xor dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
}
@@ -5473,29 +5473,29 @@ void drcbe_x86::op_lzcnt(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
- emit_mov_r32_imm(dst, REG_ECX, 32 ^ 31); // mov ecx,32 ^ 31
- emit_bsr_r32_r32(dst, dstreg, dstreg); // bsr dstreg,dstreg
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_xor_r32_imm(dst, dstreg, 31); // xor dstreg,31
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_mov_r32_imm(dst, REG_ECX, 32 ^ 31); // mov ecx,32 ^ 31
+ emit_bsr_r32_r32(dst, dstreg, dstreg); // bsr dstreg,dstreg
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_xor_r32_imm(dst, dstreg, 31); // xor dstreg,31
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
- emit_bsr_r32_r32(dst, dstreg, dstreg); // bsr dstreg,dstreg
+ emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
+ emit_bsr_r32_r32(dst, dstreg, dstreg); // bsr dstreg,dstreg
emit_link skip;
- emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
- emit_mov_r32_imm(dst, REG_ECX, 32 ^ 31); // mov ecx,32 ^ 31
- emit_bsr_r32_r32(dst, dstreg, REG_EDX); // bsr dstreg,edx
- emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
- emit_add_r32_imm(dst, REG_ECX, 32); // add ecx,32
- track_resolve_link(dst, skip); // skip:
- emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
- emit_xor_r32_imm(dst, dstreg, 31); // xor dstreg,31
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
+ emit_jcc_short_link(dst, x86emit::COND_NZ, skip); // jnz skip
+ emit_mov_r32_imm(dst, REG_ECX, 32 ^ 31); // mov ecx,32 ^ 31
+ emit_bsr_r32_r32(dst, dstreg, REG_EDX); // bsr dstreg,edx
+ emit_cmovcc_r32_r32(dst, x86emit::COND_Z, dstreg, REG_ECX); // cmovz dstreg,ecx
+ emit_add_r32_imm(dst, REG_ECX, 32); // add ecx,32
+ track_resolve_link(dst, skip); // skip:
+ emit_xor_r32_r32(dst, REG_EDX, REG_EDX); // xor edx,edx
+ emit_xor_r32_imm(dst, dstreg, 31); // xor dstreg,31
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
}
}
@@ -5521,31 +5521,31 @@ void drcbe_x86::op_bswap(x86code *&dst, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
- emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
- emit_bswap_r32(dst, dstreg); // bswap dstreg
+ emit_mov_r32_p32(dst, dstreg, srcp); // mov dstreg,src1p
+ emit_bswap_r32(dst, dstreg); // bswap dstreg
if (inst.flags() != 0)
- emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_test_r32_r32(dst, dstreg, dstreg); // test dstreg,dstreg
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
- emit_bswap_r32(dst, dstreg); // bswap dstreg
- emit_bswap_r32(dst, REG_EDX); // bswap edx
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
+ emit_mov_r64_p64(dst, REG_EDX, dstreg, srcp); // mov dstreg:edx,srcp
+ emit_bswap_r32(dst, dstreg); // bswap dstreg
+ emit_bswap_r32(dst, REG_EDX); // bswap edx
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,edx:dstreg
if (inst.flags() == FLAG_Z)
- emit_or_r32_r32(dst, REG_EDX, dstreg); // or edx,eax
+ emit_or_r32_r32(dst, REG_EDX, dstreg); // or edx,eax
else if (inst.flags() == FLAG_S)
- emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
+ emit_test_r32_r32(dst, REG_EDX, REG_EDX); // test edx,edx
else
{
- emit_movzx_r32_r16(dst, REG_ECX, dstreg); // movzx ecx,dstreg
- emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
- emit_mov_r32_r32(dst, REG_ECX, dstreg); // mov ecx,dstreg
- emit_shr_r32_imm(dst, REG_ECX, 16); // shr ecx,16
- emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
+ emit_movzx_r32_r16(dst, REG_ECX, dstreg); // movzx ecx,dstreg
+ emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
+ emit_mov_r32_r32(dst, REG_ECX, dstreg); // mov ecx,dstreg
+ emit_shr_r32_imm(dst, REG_ECX, 16); // shr ecx,16
+ emit_or_r32_r32(dst, REG_EDX, REG_ECX); // or edx,ecx
}
}
}
@@ -5575,14 +5575,14 @@ void drcbe_x86::op_shl(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_shl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shl [dstp],src2p
+ emit_shl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shl [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_shl_r32_p32(dst, dstreg, src2p, inst); // shl dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_shl_r32_p32(dst, dstreg, src2p, inst); // shl dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5590,9 +5590,9 @@ void drcbe_x86::op_shl(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_shl_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // shl dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_shl_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // shl dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
@@ -5621,14 +5621,14 @@ void drcbe_x86::op_shr(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_shr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shr [dstp],src2p
+ emit_shr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // shr [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_shr_r32_p32(dst, dstreg, src2p, inst); // shr dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_shr_r32_p32(dst, dstreg, src2p, inst); // shr dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5636,9 +5636,9 @@ void drcbe_x86::op_shr(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_shr_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // shr dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_shr_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // shr dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
@@ -5667,14 +5667,14 @@ void drcbe_x86::op_sar(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_sar_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sar [dstp],src2p
+ emit_sar_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // sar [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_sar_r32_p32(dst, dstreg, src2p, inst); // sar dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_sar_r32_p32(dst, dstreg, src2p, inst); // sar dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5682,9 +5682,9 @@ void drcbe_x86::op_sar(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_sar_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // sar dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_sar_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // sar dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
@@ -5713,14 +5713,14 @@ void drcbe_x86::op_rol(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rol_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rol [dstp],src2p
+ emit_rol_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rol [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rol_r32_p32(dst, dstreg, src2p, inst); // rol dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rol_r32_p32(dst, dstreg, src2p, inst); // rol dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5728,9 +5728,9 @@ void drcbe_x86::op_rol(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_rol_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // rol dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_rol_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // rol dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
@@ -5759,14 +5759,14 @@ void drcbe_x86::op_ror(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_ror_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // ror [dstp],src2p
+ emit_ror_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // ror [dstp],src2p
// general case
else
{
- emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
- emit_ror_r32_p32(dst, dstreg, src2p, inst); // ror dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_ror_r32_p32(dst, dstreg, src2p, inst); // ror dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5774,9 +5774,9 @@ void drcbe_x86::op_ror(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_ror_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // ror dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_ror_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // ror dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
@@ -5805,14 +5805,14 @@ void drcbe_x86::op_rolc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rcl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcl [dstp],src2p
+ emit_rcl_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcl [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rcl_r32_p32(dst, dstreg, src2p, inst); // rcl dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rcl_r32_p32(dst, dstreg, src2p, inst); // rcl dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5820,9 +5820,9 @@ void drcbe_x86::op_rolc(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_rcl_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // rcl dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_rcl_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // rcl dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
@@ -5851,14 +5851,14 @@ void drcbe_x86::op_rorc(x86code *&dst, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- emit_rcr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcr [dstp],src2p
+ emit_rcr_m32_p32(dst, MABS(dstp.memory()), src2p, inst); // rcr [dstp],src2p
// general case
else
{
- emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
- emit_rcr_r32_p32(dst, dstreg, src2p, inst); // rcr dstreg,src2p
- emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_r32_p32_keepflags(dst, dstreg, src1p); // mov dstreg,src1p
+ emit_rcr_r32_p32(dst, dstreg, src2p, inst); // rcr dstreg,src2p
+ emit_mov_p32_r32(dst, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5866,9 +5866,9 @@ void drcbe_x86::op_rorc(x86code *&dst, const instruction &inst)
else if (inst.size() == 8)
{
// general case
- emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
- emit_rcr_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // rcr dstreg:dstp,src2p
- emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
+ emit_mov_r64_p64_keepflags(dst, dstreg, REG_EDX, src1p); // mov dstreg:dstp,[src1p]
+ emit_rcr_r64_p64(dst, dstreg, REG_EDX, src2p, inst); // rcr dstreg:dstp,src2p
+ emit_mov_p64_r64(dst, dstp, dstreg, REG_EDX); // mov dstp,dstreg:eax
}
}
@@ -5897,9 +5897,9 @@ void drcbe_x86::op_fload(x86code *&dst, const instruction &inst)
// immediate index
if (indp.is_immediate())
{
- emit_mov_r32_m32(dst, REG_EAX, MABS(basep.memory(4*indp.immediate()))); // mov eax,[basep + 4*indp]
+ emit_mov_r32_m32(dst, REG_EAX, MABS(basep.memory(4*indp.immediate()))); // mov eax,[basep + 4*indp]
if (inst.size() == 8)
- emit_mov_r32_m32(dst, REG_EDX, MABS(basep.memory(4 + 4*indp.immediate()))); // mov edx,[basep + 4*indp + 4]
+ emit_mov_r32_m32(dst, REG_EDX, MABS(basep.memory(4 + 4*indp.immediate()))); // mov edx,[basep + 4*indp + 4]
}
// other index
@@ -5907,15 +5907,15 @@ void drcbe_x86::op_fload(x86code *&dst, const instruction &inst)
{
int indreg = indp.select_register(REG_ECX);
emit_mov_r32_p32(dst, indreg, indp);
- emit_mov_r32_m32(dst, REG_EAX, MABSI(basep.memory(), indreg, 4)); // mov eax,[basep + 4*indp]
+ emit_mov_r32_m32(dst, REG_EAX, MABSI(basep.memory(), indreg, 4)); // mov eax,[basep + 4*indp]
if (inst.size() == 8)
- emit_mov_r32_m32(dst, REG_EDX, MABSI(basep.memory(4), indreg, 4)); // mov edx,[basep + 4*indp + 4]
+ emit_mov_r32_m32(dst, REG_EDX, MABSI(basep.memory(4), indreg, 4)); // mov edx,[basep + 4*indp + 4]
}
// general case
- emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
if (inst.size() == 8)
- emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp + 4],edx
+ emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp + 4],edx
}
@@ -5936,16 +5936,16 @@ void drcbe_x86::op_fstore(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(2), PTYPE_MF);
// general case
- emit_mov_r32_m32(dst, REG_EAX, MABS(srcp.memory())); // mov eax,[srcp]
+ emit_mov_r32_m32(dst, REG_EAX, MABS(srcp.memory())); // mov eax,[srcp]
if (inst.size() == 8)
- emit_mov_r32_m32(dst, REG_EDX, MABS(srcp.memory(4))); // mov edx,[srcp + 4]
+ emit_mov_r32_m32(dst, REG_EDX, MABS(srcp.memory(4))); // mov edx,[srcp + 4]
// immediate index
if (indp.is_immediate())
{
- emit_mov_m32_r32(dst, MABS(basep.memory(4*indp.immediate())), REG_EAX); // mov [basep + 4*indp],eax
+ emit_mov_m32_r32(dst, MABS(basep.memory(4*indp.immediate())), REG_EAX); // mov [basep + 4*indp],eax
if (inst.size() == 8)
- emit_mov_m32_r32(dst, MABS(basep.memory(4 + 4*indp.immediate())), REG_EDX); // mov [basep + 4*indp + 4],edx
+ emit_mov_m32_r32(dst, MABS(basep.memory(4 + 4*indp.immediate())), REG_EDX); // mov [basep + 4*indp + 4],edx
}
// other index
@@ -5953,9 +5953,9 @@ void drcbe_x86::op_fstore(x86code *&dst, const instruction &inst)
{
int indreg = indp.select_register(REG_ECX);
emit_mov_r32_p32(dst, indreg, indp);
- emit_mov_m32_r32(dst, MABSI(basep.memory(), indreg, 4), REG_EAX); // mov [basep + 4*indp],eax
+ emit_mov_m32_r32(dst, MABSI(basep.memory(), indreg, 4), REG_EAX); // mov [basep + 4*indp],eax
if (inst.size() == 8)
- emit_mov_m32_r32(dst, MABSI(basep.memory(4), indreg, 4), REG_EDX); // mov [basep + 4*indp + 4],edx
+ emit_mov_m32_r32(dst, MABSI(basep.memory(4), indreg, 4), REG_EDX); // mov [basep + 4*indp + 4],edx
}
}
@@ -5979,18 +5979,18 @@ void drcbe_x86::op_fread(x86code *&dst, const instruction &inst)
assert((1 << spacep.size()) == inst.size());
// set up a call to the read dword/qword handler
- emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacep.space()]); // mov [esp],space
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacep.space()]); // mov [esp],space
if (inst.size() == 4)
- emit_call(dst, (x86code *)m_accessors[spacep.space()].read_dword); // call read_dword
+ emit_call(dst, (x86code *)m_accessors[spacep.space()].read_dword); // call read_dword
else if (inst.size() == 8)
- emit_call(dst, (x86code *)m_accessors[spacep.space()].read_qword); // call read_qword
+ emit_call(dst, (x86code *)m_accessors[spacep.space()].read_qword); // call read_qword
// store result
if (inst.size() == 4)
- emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
+ emit_mov_p32_r32(dst, dstp, REG_EAX); // mov dstp,eax
else if (inst.size() == 8)
- emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
+ emit_mov_p64_r64(dst, dstp, REG_EAX, REG_EDX); // mov dstp,edx:eax
}
@@ -6014,15 +6014,15 @@ void drcbe_x86::op_fwrite(x86code *&dst, const instruction &inst)
// set up a call to the write dword/qword handler
if (inst.size() == 4)
- emit_mov_m32_p32(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
else if (inst.size() == 8)
- emit_mov_m64_p64(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
- emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
- emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacep.space()]); // mov [esp],space
+ emit_mov_m64_p64(dst, MBD(REG_ESP, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m32_p32(dst, MBD(REG_ESP, 4), addrp); // mov [esp+4],addrp
+ emit_mov_m32_imm(dst, MBD(REG_ESP, 0), (FPTR)m_space[spacep.space()]); // mov [esp],space
if (inst.size() == 4)
- emit_call(dst, (x86code *)m_accessors[spacep.space()].write_dword); // call write_dword
+ emit_call(dst, (x86code *)m_accessors[spacep.space()].write_dword); // call write_dword
else if (inst.size() == 8)
- emit_call(dst, (x86code *)m_accessors[spacep.space()].write_qword); // call write_qword
+ emit_call(dst, (x86code *)m_accessors[spacep.space()].write_qword); // call write_qword
}
@@ -6044,19 +6044,19 @@ void drcbe_x86::op_fmov(x86code *&dst, const instruction &inst)
// always start with a jmp
emit_link skip = { 0 };
if (inst.condition() != uml::COND_ALWAYS)
- emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ emit_jcc_short_link(dst, X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
// general case
- emit_mov_r32_m32(dst, REG_EAX, MABS(srcp.memory())); // mov eax,[srcp]
+ emit_mov_r32_m32(dst, REG_EAX, MABS(srcp.memory())); // mov eax,[srcp]
if (inst.size() == 8)
- emit_mov_r32_m32(dst, REG_EDX, MABS(srcp.memory(4))); // mov edx,[srcp + 4]
- emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
+ emit_mov_r32_m32(dst, REG_EDX, MABS(srcp.memory(4))); // mov edx,[srcp + 4]
+ emit_mov_m32_r32(dst, MABS(dstp.memory()), REG_EAX); // mov [dstp],eax
if (inst.size() == 8)
- emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp + 4],edx
+ emit_mov_m32_r32(dst, MABS(dstp.memory(4)), REG_EDX); // mov [dstp + 4],edx
// resolve the jump
if (skip.target != NULL)
- track_resolve_link(dst, skip); // skip:
+ track_resolve_link(dst, skip); // skip:
}
@@ -6082,12 +6082,12 @@ void drcbe_x86::op_ftoint(x86code *&dst, const instruction &inst)
// set rounding mode if necessary
if (roundp.rounding() != ROUND_DEFAULT && (!m_sse3 || roundp.rounding() != ROUND_TRUNC))
{
- emit_fstcw_m16(dst, MABS(&m_fmodesave)); // fstcw [fmodesave]
- emit_fldcw_m16(dst, MABS(&fp_control[roundp.rounding()])); // fldcw fpcontrol[roundp]
+ emit_fstcw_m16(dst, MABS(&m_fmodesave)); // fstcw [fmodesave]
+ emit_fldcw_m16(dst, MABS(&fp_control[roundp.rounding()])); // fldcw fpcontrol[roundp]
}
// general case
- emit_fld_p(dst, inst.size(), srcp); // fld srcp
+ emit_fld_p(dst, inst.size(), srcp); // fld srcp
// 4-byte integer case
if (sizep.size() == SIZE_DWORD)
@@ -6095,17 +6095,17 @@ void drcbe_x86::op_ftoint(x86code *&dst, const instruction &inst)
if (dstp.is_memory())
{
if (!m_sse3 || roundp.rounding() != ROUND_TRUNC)
- emit_fistp_m32(dst, MABS(dstp.memory())); // fistp [dstp]
+ emit_fistp_m32(dst, MABS(dstp.memory())); // fistp [dstp]
else
- emit_fisttp_m32(dst, MABS(dstp.memory())); // fisttp [dstp]
+ emit_fisttp_m32(dst, MABS(dstp.memory())); // fisttp [dstp]
}
else if (dstp.is_int_register())
{
if (!m_sse3 || roundp.rounding() != ROUND_TRUNC)
- emit_fistp_m32(dst, MABS(m_reglo[dstp.ireg()])); // fistp reglo[dstp]
+ emit_fistp_m32(dst, MABS(m_reglo[dstp.ireg()])); // fistp reglo[dstp]
else
- emit_fisttp_m32(dst, MABS(m_reglo[dstp.ireg()])); // fisttp reglo[dstp]
- emit_mov_r32_m32(dst, dstp.ireg(), MABS(m_reglo[dstp.ireg()])); // mov dstp,reglo[dstp]
+ emit_fisttp_m32(dst, MABS(m_reglo[dstp.ireg()])); // fisttp reglo[dstp]
+ emit_mov_r32_m32(dst, dstp.ireg(), MABS(m_reglo[dstp.ireg()])); // mov dstp,reglo[dstp]
}
}
@@ -6115,23 +6115,23 @@ void drcbe_x86::op_ftoint(x86code *&dst, const instruction &inst)
if (dstp.is_memory())
{
if (!m_sse3 || roundp.rounding() != ROUND_TRUNC)
- emit_fistp_m64(dst, MABS(dstp.memory())); // fistp [dstp]
+ emit_fistp_m64(dst, MABS(dstp.memory())); // fistp [dstp]
else
- emit_fisttp_m64(dst, MABS(dstp.memory())); // fisttp [dstp]
+ emit_fisttp_m64(dst, MABS(dstp.memory())); // fisttp [dstp]
}
else if (dstp.is_int_register())
{
if (!m_sse3 || roundp.rounding() != ROUND_TRUNC)
- emit_fistp_m64(dst, MABS(m_reglo[dstp.ireg()])); // fistp reglo[dstp]
+ emit_fistp_m64(dst, MABS(m_reglo[dstp.ireg()])); // fistp reglo[dstp]
else
- emit_fisttp_m64(dst, MABS(m_reglo[dstp.ireg()])); // fisttp reglo[dstp]
- emit_mov_r32_m32(dst, dstp.ireg(), MABS(m_reglo[dstp.ireg()])); // mov dstp,reglo[dstp]
+ emit_fisttp_m64(dst, MABS(m_reglo[dstp.ireg()])); // fisttp reglo[dstp]
+ emit_mov_r32_m32(dst, dstp.ireg(), MABS(m_reglo[dstp.ireg()])); // mov dstp,reglo[dstp]
}
}
// restore control word and proceed
if (roundp.rounding() != ROUND_DEFAULT && (!m_sse3 || roundp.rounding() != ROUND_TRUNC))
- emit_fldcw_m16(dst, MABS(&m_fmodesave)); // fldcw [fmodesave]
+ emit_fldcw_m16(dst, MABS(&m_fmodesave)); // fldcw [fmodesave]
}
@@ -6157,15 +6157,15 @@ void drcbe_x86::op_ffrint(x86code *&dst, const instruction &inst)
{
if (srcp.is_immediate())
{
- emit_mov_m32_imm(dst, MABS(&m_fptemp), srcp.immediate()); // mov [fptemp],srcp
- emit_fild_m32(dst, MABS(&m_fptemp)); // fild [fptemp]
+ emit_mov_m32_imm(dst, MABS(&m_fptemp), srcp.immediate()); // mov [fptemp],srcp
+ emit_fild_m32(dst, MABS(&m_fptemp)); // fild [fptemp]
}
else if (srcp.is_memory())
- emit_fild_m32(dst, MABS(srcp.memory())); // fild [srcp]
+ emit_fild_m32(dst, MABS(srcp.memory())); // fild [srcp]
else if (srcp.is_int_register())
{
- emit_mov_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), srcp.ireg()); // mov reglo[srcp],srcp
- emit_fild_m32(dst, MABS(m_reglo[srcp.ireg()])); // fild reglo[srcp]
+ emit_mov_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), srcp.ireg()); // mov reglo[srcp],srcp
+ emit_fild_m32(dst, MABS(m_reglo[srcp.ireg()])); // fild reglo[srcp]
}
}
@@ -6174,21 +6174,21 @@ void drcbe_x86::op_ffrint(x86code *&dst, const instruction &inst)
{
if (srcp.is_immediate())
{
- emit_mov_m32_imm(dst, MABS(&m_fptemp), srcp.immediate()); // mov [fptemp],srcp
- emit_mov_m32_imm(dst, MABS((UINT8 *)&m_fptemp + 4), srcp.immediate()); // mov [fptemp+4],srcp
- emit_fild_m64(dst, MABS(&m_fptemp)); // fild [fptemp]
+ emit_mov_m32_imm(dst, MABS(&m_fptemp), srcp.immediate()); // mov [fptemp],srcp
+ emit_mov_m32_imm(dst, MABS((UINT8 *)&m_fptemp + 4), srcp.immediate()); // mov [fptemp+4],srcp
+ emit_fild_m64(dst, MABS(&m_fptemp)); // fild [fptemp]
}
else if (srcp.is_memory())
- emit_fild_m64(dst, MABS(srcp.memory())); // fild [srcp]
+ emit_fild_m64(dst, MABS(srcp.memory())); // fild [srcp]
else if (srcp.is_int_register())
{
- emit_mov_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), srcp.ireg()); // mov reglo[srcp],srcp
- emit_fild_m64(dst, MABS(m_reglo[srcp.ireg()])); // fild reglo[srcp]
+ emit_mov_m32_r32(dst, MABS(m_reglo[srcp.ireg()]), srcp.ireg()); // mov reglo[srcp],srcp
+ emit_fild_m64(dst, MABS(m_reglo[srcp.ireg()])); // fild reglo[srcp]
}
}
// store the result and be done
- emit_fstp_p(dst, inst.size(), dstp); // fstp [dstp]
+ emit_fstp_p(dst, inst.size(), dstp); // fstp [dstp]
}
@@ -6211,10 +6211,10 @@ void drcbe_x86::op_ffrflt(x86code *&dst, const instruction &inst)
// general case
if (sizep.size() == SIZE_DWORD)
- emit_fld_m32(dst, MABS(srcp.memory())); // fld [srcp]
+ emit_fld_m32(dst, MABS(srcp.memory())); // fld [srcp]
else if (sizep.size() == SIZE_QWORD)
- emit_fld_m64(dst, MABS(srcp.memory())); // fld [srcp]
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_m64(dst, MABS(srcp.memory())); // fld [srcp]
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6234,10 +6234,10 @@ void drcbe_x86::op_frnds(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// general case
- emit_fld_p(dst, inst.size(), srcp); // fld srcp
- emit_fstp_m32(dst, MABS(&m_fptemp)); // fstp [fptemp]
- emit_fld_m32(dst, MABS(&m_fptemp)); // fld [fptemp]
- emit_fstp_p(dst, inst.size(), dstp); // fstp [dstp]
+ emit_fld_p(dst, inst.size(), srcp); // fld srcp
+ emit_fstp_m32(dst, MABS(&m_fptemp)); // fstp [fptemp]
+ emit_fld_m32(dst, MABS(&m_fptemp)); // fld [fptemp]
+ emit_fstp_p(dst, inst.size(), dstp); // fstp [dstp]
}
@@ -6259,10 +6259,10 @@ void drcbe_x86::op_fadd(x86code *&dst, const instruction &inst)
normalize_commutative(src1p, src2p);
// general case
- emit_fld_p(dst, inst.size(), src1p); // fld src1p
- emit_fld_p(dst, inst.size(), src2p); // fld src2p
- emit_faddp(dst); // faddp
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_p(dst, inst.size(), src1p); // fld src1p
+ emit_fld_p(dst, inst.size(), src2p); // fld src2p
+ emit_faddp(dst); // faddp
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6283,10 +6283,10 @@ void drcbe_x86::op_fsub(x86code *&dst, const instruction &inst)
be_parameter src2p(*this, inst.param(2), PTYPE_MF);
// general case
- emit_fld_p(dst, inst.size(), src1p); // fld src1p
- emit_fld_p(dst, inst.size(), src2p); // fld src2p
- emit_fsubp(dst); // fsubp
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_p(dst, inst.size(), src1p); // fld src1p
+ emit_fld_p(dst, inst.size(), src2p); // fld src2p
+ emit_fsubp(dst); // fsubp
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6306,11 +6306,11 @@ void drcbe_x86::op_fcmp(x86code *&dst, const instruction &inst)
be_parameter src2p(*this, inst.param(1), PTYPE_MF);
// general case
- emit_fld_p(dst, inst.size(), src2p); // fld src2p
- emit_fld_p(dst, inst.size(), src1p); // fld src1p
- emit_fcompp(dst); // fcompp
- emit_fstsw_ax(dst); // fnstsw ax
- emit_sahf(dst); // sahf
+ emit_fld_p(dst, inst.size(), src2p); // fld src2p
+ emit_fld_p(dst, inst.size(), src1p); // fld src1p
+ emit_fcompp(dst); // fcompp
+ emit_fstsw_ax(dst); // fnstsw ax
+ emit_sahf(dst); // sahf
}
@@ -6332,10 +6332,10 @@ void drcbe_x86::op_fmul(x86code *&dst, const instruction &inst)
normalize_commutative(src1p, src2p);
// general case
- emit_fld_p(dst, inst.size(), src1p); // fld src1p
- emit_fld_p(dst, inst.size(), src2p); // fld src2p
- emit_fmulp(dst); // fmulp
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_p(dst, inst.size(), src1p); // fld src1p
+ emit_fld_p(dst, inst.size(), src2p); // fld src2p
+ emit_fmulp(dst); // fmulp
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6356,10 +6356,10 @@ void drcbe_x86::op_fdiv(x86code *&dst, const instruction &inst)
be_parameter src2p(*this, inst.param(2), PTYPE_MF);
// general case
- emit_fld_p(dst, inst.size(), src1p); // fld src1p
- emit_fld_p(dst, inst.size(), src2p); // fld src2p
- emit_fdivp(dst); // fdivp
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_p(dst, inst.size(), src1p); // fld src1p
+ emit_fld_p(dst, inst.size(), src2p); // fld src2p
+ emit_fdivp(dst); // fdivp
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6379,9 +6379,9 @@ void drcbe_x86::op_fneg(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// general case
- emit_fld_p(dst, inst.size(), srcp); // fld srcp
- emit_fchs(dst); // fchs
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_p(dst, inst.size(), srcp); // fld srcp
+ emit_fchs(dst); // fchs
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6401,9 +6401,9 @@ void drcbe_x86::op_fabs(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// general case
- emit_fld_p(dst, inst.size(), srcp); // fld srcp
- emit_fabs(dst); // fabs
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_p(dst, inst.size(), srcp); // fld srcp
+ emit_fabs(dst); // fabs
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6423,9 +6423,9 @@ void drcbe_x86::op_fsqrt(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// general case
- emit_fld_p(dst, inst.size(), srcp); // fld srcp
- emit_fsqrt(dst); // fsqrt
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld_p(dst, inst.size(), srcp); // fld srcp
+ emit_fsqrt(dst); // fsqrt
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6445,10 +6445,10 @@ void drcbe_x86::op_frecip(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// general case
- emit_fld1(dst); // fld1
- emit_fld_p(dst, inst.size(), srcp); // fld srcp
- emit_fdivp(dst); // fdivp
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld1(dst); // fld1
+ emit_fld_p(dst, inst.size(), srcp); // fld srcp
+ emit_fdivp(dst); // fdivp
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
@@ -6468,11 +6468,11 @@ void drcbe_x86::op_frsqrt(x86code *&dst, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// general case
- emit_fld1(dst); // fld1
- emit_fld_p(dst, inst.size(), srcp); // fld srcp
- emit_fsqrt(dst); // fsqrt
- emit_fdivp(dst); // fdivp
- emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
+ emit_fld1(dst); // fld1
+ emit_fld_p(dst, inst.size(), srcp); // fld srcp
+ emit_fsqrt(dst); // fsqrt
+ emit_fdivp(dst); // fdivp
+ emit_fstp_p(dst, inst.size(), dstp); // fstp dstp
}
diff --git a/src/emu/cpu/drcbex86.h b/src/emu/cpu/drcbex86.h
index 97b9bce1112..764fd2059e7 100644
--- a/src/emu/cpu/drcbex86.h
+++ b/src/emu/cpu/drcbex86.h
@@ -79,12 +79,12 @@ private:
// parameter types
enum be_parameter_type
{
- PTYPE_NONE = 0, // invalid
- PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
- PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
- PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
- PTYPE_VECTOR_REGISTER, // vector register; value = 0-REG_MAX
- PTYPE_MEMORY, // memory; value = pointer to memory
+ PTYPE_NONE = 0, // invalid
+ PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
+ PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
+ PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
+ PTYPE_VECTOR_REGISTER, // vector register; value = 0-REG_MAX
+ PTYPE_MEMORY, // memory; value = pointer to memory
PTYPE_MAX
};
@@ -136,8 +136,8 @@ private:
be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
// internals
- be_parameter_type m_type; // parameter type
- be_parameter_value m_value; // parameter value
+ be_parameter_type m_type; // parameter type
+ be_parameter_value m_value; // parameter value
};
// helpers
@@ -325,46 +325,46 @@ private:
static int ddivs(UINT64 &dstlo, UINT64 &dsthi, INT64 src1, INT64 src2);
// internal state
- drc_hash_table m_hash; // hash table state
- drc_map_variables m_map; // code map
- drc_label_list m_labels; // label list
- x86log_context * m_log; // logging
- bool m_logged_common; // logged common code already?
- bool m_sse3; // do we have SSE3 support?
-
- x86_entry_point_func m_entry; // entry point
- x86code * m_exit; // exit point
- x86code * m_nocode; // nocode handler
- x86code * m_save; // save handler
- x86code * m_restore; // restore handler
-
- UINT32 * m_reglo[x86emit::REG_MAX];// pointer to low part of data for each register
- UINT32 * m_reghi[x86emit::REG_MAX];// pointer to high part of data for each register
- UINT8 m_last_lower_reg; // last register we stored a lower from
- x86code * m_last_lower_pc; // PC after instruction where we last stored a lower register
- UINT32 * m_last_lower_addr; // address where we last stored an lower register
- UINT8 m_last_upper_reg; // last register we stored an upper from
- x86code * m_last_upper_pc; // PC after instruction where we last stored an upper register
- UINT32 * m_last_upper_addr; // address where we last stored an upper register
- double m_fptemp; // temporary storage for floating point
-
- UINT16 m_fpumode; // saved FPU mode
- UINT16 m_fmodesave; // temporary location for saving
-
- void * m_stacksave; // saved stack pointer
- void * m_hashstacksave; // saved stack pointer for hashjmp
- UINT64 m_reslo; // extended low result
- UINT64 m_reshi; // extended high result
-
- drc_label_fixup_delegate m_fixup_label; // precomputed delegate for fixups
- drc_oob_delegate m_fixup_exception; // precomputed delegate for exception fixups
+ drc_hash_table m_hash; // hash table state
+ drc_map_variables m_map; // code map
+ drc_label_list m_labels; // label list
+ x86log_context * m_log; // logging
+ bool m_logged_common; // logged common code already?
+ bool m_sse3; // do we have SSE3 support?
+
+ x86_entry_point_func m_entry; // entry point
+ x86code * m_exit; // exit point
+ x86code * m_nocode; // nocode handler
+ x86code * m_save; // save handler
+ x86code * m_restore; // restore handler
+
+ UINT32 * m_reglo[x86emit::REG_MAX];// pointer to low part of data for each register
+ UINT32 * m_reghi[x86emit::REG_MAX];// pointer to high part of data for each register
+ UINT8 m_last_lower_reg; // last register we stored a lower from
+ x86code * m_last_lower_pc; // PC after instruction where we last stored a lower register
+ UINT32 * m_last_lower_addr; // address where we last stored an lower register
+ UINT8 m_last_upper_reg; // last register we stored an upper from
+ x86code * m_last_upper_pc; // PC after instruction where we last stored an upper register
+ UINT32 * m_last_upper_addr; // address where we last stored an upper register
+ double m_fptemp; // temporary storage for floating point
+
+ UINT16 m_fpumode; // saved FPU mode
+ UINT16 m_fmodesave; // temporary location for saving
+
+ void * m_stacksave; // saved stack pointer
+ void * m_hashstacksave; // saved stack pointer for hashjmp
+ UINT64 m_reslo; // extended low result
+ UINT64 m_reshi; // extended high result
+
+ drc_label_fixup_delegate m_fixup_label; // precomputed delegate for fixups
+ drc_oob_delegate m_fixup_exception; // precomputed delegate for exception fixups
// globals
typedef void (drcbe_x86::*opcode_generate_func)(x86code *&dst, const uml::instruction &inst);
struct opcode_table_entry
{
- uml::opcode_t opcode; // opcode in question
- opcode_generate_func func; // function pointer to the work
+ uml::opcode_t opcode; // opcode in question
+ opcode_generate_func func; // function pointer to the work
};
static const opcode_table_entry s_opcode_table_source[];
static opcode_generate_func s_opcode_table[uml::OP_MAX];
diff --git a/src/emu/cpu/drccache.c b/src/emu/cpu/drccache.c
index b9922c3dc7b..20c6a820742 100644
--- a/src/emu/cpu/drccache.c
+++ b/src/emu/cpu/drccache.c
@@ -47,8 +47,8 @@
//**************************************************************************
// ensure that all memory allocated is aligned to an 8-byte boundary
-#define ALIGN_PTR_UP(p) ((void *)(((FPTR)(p) + (CACHE_ALIGNMENT - 1)) & ~(CACHE_ALIGNMENT - 1)))
-#define ALIGN_PTR_DOWN(p) ((void *)((FPTR)(p) & ~(CACHE_ALIGNMENT - 1)))
+#define ALIGN_PTR_UP(p) ((void *)(((FPTR)(p) + (CACHE_ALIGNMENT - 1)) & ~(CACHE_ALIGNMENT - 1)))
+#define ALIGN_PTR_DOWN(p) ((void *)((FPTR)(p) & ~(CACHE_ALIGNMENT - 1)))
@@ -62,12 +62,12 @@
drc_cache::drc_cache(size_t bytes)
: m_near((drccodeptr)osd_alloc_executable(bytes)),
- m_neartop(m_near),
- m_base(m_near + NEAR_CACHE_SIZE),
- m_top(m_base),
- m_end(m_near + bytes),
- m_codegen(0),
- m_size(bytes)
+ m_neartop(m_near),
+ m_base(m_near + NEAR_CACHE_SIZE),
+ m_top(m_base),
+ m_end(m_near + bytes),
+ m_codegen(0),
+ m_size(bytes)
{
memset(m_free, 0, sizeof(m_free));
memset(m_nearfree, 0, sizeof(m_nearfree));
diff --git a/src/emu/cpu/drccache.h b/src/emu/cpu/drccache.h
index ae90ca0aea1..3f54a5139ab 100644
--- a/src/emu/cpu/drccache.h
+++ b/src/emu/cpu/drccache.h
@@ -49,8 +49,8 @@
//**************************************************************************
// ensure that a given pointer is within the cache boundaries
-#define assert_in_cache(c,p) assert((c).contains_pointer(p))
-#define assert_in_near_cache(c,p) assert((c).contains_near_pointer(p))
+#define assert_in_cache(c,p) assert((c).contains_pointer(p))
+#define assert_in_near_cache(c,p) assert((c).contains_near_pointer(p))
@@ -110,33 +110,33 @@ private:
static const size_t NEAR_CACHE_SIZE = 65536;
// core parameters
- drccodeptr m_near; // pointer to the near part of the cache
- drccodeptr m_neartop; // top of the near part of the cache
- drccodeptr m_base; // base pointer to the compiler cache
- drccodeptr m_top; // current top of cache
- drccodeptr m_end; // end of cache memory
- drccodeptr m_codegen; // start of generated code
- size_t m_size; // size of the cache in bytes
+ drccodeptr m_near; // pointer to the near part of the cache
+ drccodeptr m_neartop; // top of the near part of the cache
+ drccodeptr m_base; // base pointer to the compiler cache
+ drccodeptr m_top; // current top of cache
+ drccodeptr m_end; // end of cache memory
+ drccodeptr m_codegen; // start of generated code
+ size_t m_size; // size of the cache in bytes
// oob management
struct oob_handler
{
oob_handler *next() const { return m_next; }
- oob_handler * m_next; // next handler
- drc_oob_delegate m_callback; // callback function
- void * m_param1; // 1st pointer parameter
- void * m_param2; // 2nd pointer parameter
+ oob_handler * m_next; // next handler
+ drc_oob_delegate m_callback; // callback function
+ void * m_param1; // 1st pointer parameter
+ void * m_param2; // 2nd pointer parameter
};
- simple_list<oob_handler> m_ooblist; // list of oob handlers
+ simple_list<oob_handler> m_ooblist; // list of oob handlers
// free lists
struct free_link
{
- free_link * m_next; // pointer to the next guy
+ free_link * m_next; // pointer to the next guy
};
- free_link * m_free[MAX_PERMANENT_ALLOC / CACHE_ALIGNMENT];
- free_link * m_nearfree[MAX_PERMANENT_ALLOC / CACHE_ALIGNMENT];
+ free_link * m_free[MAX_PERMANENT_ALLOC / CACHE_ALIGNMENT];
+ free_link * m_nearfree[MAX_PERMANENT_ALLOC / CACHE_ALIGNMENT];
};
diff --git a/src/emu/cpu/drcfe.c b/src/emu/cpu/drcfe.c
index 03000e151a9..c58ebf41df5 100644
--- a/src/emu/cpu/drcfe.c
+++ b/src/emu/cpu/drcfe.c
@@ -63,8 +63,8 @@ const UINT32 MAX_STACK_DEPTH = 100;
// an entry that maps branches for our code walking
struct pc_stack_entry
{
- offs_t targetpc;
- offs_t srcpc;
+ offs_t targetpc;
+ offs_t srcpc;
};
@@ -79,14 +79,14 @@ struct pc_stack_entry
drc_frontend::drc_frontend(device_t &cpu, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
: m_window_start(window_start),
- m_window_end(window_end),
- m_max_sequence(max_sequence),
- m_cpudevice(downcast<cpu_device &>(cpu)),
- m_program(m_cpudevice.space(AS_PROGRAM)),
- m_pageshift(m_cpudevice.space_config(AS_PROGRAM)->m_page_shift),
- m_desc_live_list(cpu.machine().respool()),
- m_desc_allocator(cpu.machine().respool()),
- m_desc_array(auto_alloc_array_clear(cpu.machine(), opcode_desc *, window_end + window_start + 2))
+ m_window_end(window_end),
+ m_max_sequence(max_sequence),
+ m_cpudevice(downcast<cpu_device &>(cpu)),
+ m_program(m_cpudevice.space(AS_PROGRAM)),
+ m_pageshift(m_cpudevice.space_config(AS_PROGRAM)->m_page_shift),
+ m_desc_live_list(cpu.machine().respool()),
+ m_desc_allocator(cpu.machine().respool()),
+ m_desc_array(auto_alloc_array_clear(cpu.machine(), opcode_desc *, window_end + window_start + 2))
{
}
diff --git a/src/emu/cpu/drcfe.h b/src/emu/cpu/drcfe.h
index ddf617ccd85..c23a151bc00 100644
--- a/src/emu/cpu/drcfe.h
+++ b/src/emu/cpu/drcfe.h
@@ -73,39 +73,39 @@ const offs_t BRANCH_TARGET_DYNAMIC = ~0;
// opcode branch flags
-const UINT32 OPFLAG_IS_UNCONDITIONAL_BRANCH = 0x00000001; // instruction is unconditional branch
-const UINT32 OPFLAG_IS_CONDITIONAL_BRANCH = 0x00000002; // instruction is conditional branch
-const UINT32 OPFLAG_IS_BRANCH = (OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_IS_CONDITIONAL_BRANCH);
-const UINT32 OPFLAG_IS_BRANCH_TARGET = 0x00000004; // instruction is the target of a branch
-const UINT32 OPFLAG_IN_DELAY_SLOT = 0x00000008; // instruction is in the delay slot of a branch
-const UINT32 OPFLAG_INTRABLOCK_BRANCH = 0x00000010; // instruction branches within the block
+const UINT32 OPFLAG_IS_UNCONDITIONAL_BRANCH = 0x00000001; // instruction is unconditional branch
+const UINT32 OPFLAG_IS_CONDITIONAL_BRANCH = 0x00000002; // instruction is conditional branch
+const UINT32 OPFLAG_IS_BRANCH = (OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_IS_CONDITIONAL_BRANCH);
+const UINT32 OPFLAG_IS_BRANCH_TARGET = 0x00000004; // instruction is the target of a branch
+const UINT32 OPFLAG_IN_DELAY_SLOT = 0x00000008; // instruction is in the delay slot of a branch
+const UINT32 OPFLAG_INTRABLOCK_BRANCH = 0x00000010; // instruction branches within the block
// opcode exception flags
-const UINT32 OPFLAG_CAN_TRIGGER_SW_INT = 0x00000020; // instruction can trigger a software interrupt
-const UINT32 OPFLAG_CAN_EXPOSE_EXTERNAL_INT = 0x00000040; // instruction can expose an external interrupt
-const UINT32 OPFLAG_CAN_CAUSE_EXCEPTION = 0x00000080; // instruction may generate exception
-const UINT32 OPFLAG_WILL_CAUSE_EXCEPTION = 0x00000100; // instruction will generate exception
-const UINT32 OPFLAG_PRIVILEGED = 0x00000200; // instruction is privileged
+const UINT32 OPFLAG_CAN_TRIGGER_SW_INT = 0x00000020; // instruction can trigger a software interrupt
+const UINT32 OPFLAG_CAN_EXPOSE_EXTERNAL_INT = 0x00000040; // instruction can expose an external interrupt
+const UINT32 OPFLAG_CAN_CAUSE_EXCEPTION = 0x00000080; // instruction may generate exception
+const UINT32 OPFLAG_WILL_CAUSE_EXCEPTION = 0x00000100; // instruction will generate exception
+const UINT32 OPFLAG_PRIVILEGED = 0x00000200; // instruction is privileged
// opcode virtual->physical translation flags
-const UINT32 OPFLAG_VALIDATE_TLB = 0x00000400; // instruction must validate TLB before execution
-const UINT32 OPFLAG_MODIFIES_TRANSLATION = 0x00000800; // instruction modifies the TLB
-const UINT32 OPFLAG_COMPILER_PAGE_FAULT = 0x00001000; // compiler hit a page fault when parsing
-const UINT32 OPFLAG_COMPILER_UNMAPPED = 0x00002000; // compiler hit unmapped memory when parsing
+const UINT32 OPFLAG_VALIDATE_TLB = 0x00000400; // instruction must validate TLB before execution
+const UINT32 OPFLAG_MODIFIES_TRANSLATION = 0x00000800; // instruction modifies the TLB
+const UINT32 OPFLAG_COMPILER_PAGE_FAULT = 0x00001000; // compiler hit a page fault when parsing
+const UINT32 OPFLAG_COMPILER_UNMAPPED = 0x00002000; // compiler hit unmapped memory when parsing
// opcode flags
-const UINT32 OPFLAG_INVALID_OPCODE = 0x00004000; // instruction is invalid
-const UINT32 OPFLAG_VIRTUAL_NOOP = 0x00008000; // instruction is a virtual no-op
+const UINT32 OPFLAG_INVALID_OPCODE = 0x00004000; // instruction is invalid
+const UINT32 OPFLAG_VIRTUAL_NOOP = 0x00008000; // instruction is a virtual no-op
// opcode sequence flow flags
-const UINT32 OPFLAG_REDISPATCH = 0x00010000; // instruction must redispatch after completion
-const UINT32 OPFLAG_RETURN_TO_START = 0x00020000; // instruction must jump back to the beginning after completion
-const UINT32 OPFLAG_END_SEQUENCE = 0x00040000; // this is the last instruction in a sequence
-const UINT32 OPFLAG_CAN_CHANGE_MODES = 0x00080000; // instruction can change modes
+const UINT32 OPFLAG_REDISPATCH = 0x00010000; // instruction must redispatch after completion
+const UINT32 OPFLAG_RETURN_TO_START = 0x00020000; // instruction must jump back to the beginning after completion
+const UINT32 OPFLAG_END_SEQUENCE = 0x00040000; // this is the last instruction in a sequence
+const UINT32 OPFLAG_CAN_CHANGE_MODES = 0x00080000; // instruction can change modes
// execution semantics
-const UINT32 OPFLAG_READS_MEMORY = 0x00100000; // instruction reads memory
-const UINT32 OPFLAG_WRITES_MEMORY = 0x00200000; // instruction writes memory
+const UINT32 OPFLAG_READS_MEMORY = 0x00100000; // instruction reads memory
+const UINT32 OPFLAG_WRITES_MEMORY = 0x00200000; // instruction writes memory
@@ -119,35 +119,35 @@ struct opcode_desc
opcode_desc *next() const { return m_next; }
// links to other descriptions
- opcode_desc * m_next; // pointer to next description
- opcode_desc * branch; // pointer back to branch description for delay slots
- simple_list<opcode_desc> delay; // pointer to delay slot description
+ opcode_desc * m_next; // pointer to next description
+ opcode_desc * branch; // pointer back to branch description for delay slots
+ simple_list<opcode_desc> delay; // pointer to delay slot description
// information about the current PC
- offs_t pc; // PC of this opcode
- offs_t physpc; // physical PC of this opcode
- offs_t targetpc; // target PC if we are a branch, or BRANCH_TARGET_DYNAMIC
+ offs_t pc; // PC of this opcode
+ offs_t physpc; // physical PC of this opcode
+ offs_t targetpc; // target PC if we are a branch, or BRANCH_TARGET_DYNAMIC
// copy of up to 16 bytes of opcode
union
{
- UINT8 b[16];
- UINT16 w[8];
- UINT32 l[4];
- UINT64 q[2];
- } opptr; // pointer to opcode memory
+ UINT8 b[16];
+ UINT16 w[8];
+ UINT32 l[4];
+ UINT64 q[2];
+ } opptr; // pointer to opcode memory
// information about this instruction's execution
- UINT8 length; // length in bytes of this opcode
- UINT8 delayslots; // number of delay slots (for branches)
- UINT8 skipslots; // number of skip slots (for branches)
- UINT32 flags; // OPFLAG_* opcode flags
- UINT32 cycles; // number of cycles needed to execute
+ UINT8 length; // length in bytes of this opcode
+ UINT8 delayslots; // number of delay slots (for branches)
+ UINT8 skipslots; // number of skip slots (for branches)
+ UINT32 flags; // OPFLAG_* opcode flags
+ UINT32 cycles; // number of cycles needed to execute
// register usage information
- UINT32 regin[4]; // input registers
- UINT32 regout[4]; // output registers
- UINT32 regreq[4]; // required output registers
+ UINT32 regin[4]; // input registers
+ UINT32 regout[4]; // output registers
+ UINT32 regreq[4]; // required output registers
};
@@ -174,19 +174,19 @@ private:
void release_descriptions();
// configuration parameters
- UINT32 m_window_start; // code window start offset = startpc - window_start
- UINT32 m_window_end; // code window end offset = startpc + window_end
- UINT32 m_max_sequence; // maximum instructions to include in a sequence
+ UINT32 m_window_start; // code window start offset = startpc - window_start
+ UINT32 m_window_end; // code window end offset = startpc + window_end
+ UINT32 m_max_sequence; // maximum instructions to include in a sequence
// CPU parameters
- cpu_device & m_cpudevice; // CPU device object
- address_space & m_program; // program address space for this CPU
- offs_t m_pageshift; // shift to convert address to a page index
+ cpu_device & m_cpudevice; // CPU device object
+ address_space & m_program; // program address space for this CPU
+ offs_t m_pageshift; // shift to convert address to a page index
// opcode descriptor arrays
- simple_list<opcode_desc> m_desc_live_list; // list of live descriptions
- fixed_allocator<opcode_desc> m_desc_allocator; // fixed allocator for descriptions
- opcode_desc ** m_desc_array; // array of descriptions in PC order
+ simple_list<opcode_desc> m_desc_live_list; // list of live descriptions
+ fixed_allocator<opcode_desc> m_desc_allocator; // fixed allocator for descriptions
+ opcode_desc ** m_desc_array; // array of descriptions in PC order
};
diff --git a/src/emu/cpu/drcuml.c b/src/emu/cpu/drcuml.c
index 626b55538e6..eaa66d63792 100644
--- a/src/emu/cpu/drcuml.c
+++ b/src/emu/cpu/drcuml.c
@@ -77,8 +77,8 @@ using namespace uml;
// DEBUGGING
//**************************************************************************
-#define VALIDATE_BACKEND (0)
-#define LOG_SIMPLIFICATIONS (0)
+#define VALIDATE_BACKEND (0)
+#define LOG_SIMPLIFICATIONS (0)
@@ -89,11 +89,11 @@ using namespace uml;
// structure describing back-end validation test
struct bevalidate_test
{
- opcode_t opcode;
- UINT8 size;
- UINT8 iflags;
- UINT8 flags;
- UINT64 param[4];
+ opcode_t opcode;
+ UINT8 size;
+ UINT8 iflags;
+ UINT8 flags;
+ UINT64 param[4];
};
@@ -108,10 +108,10 @@ struct bevalidate_test
drcbe_interface::drcbe_interface(drcuml_state &drcuml, drc_cache &cache, device_t &device)
: m_drcuml(drcuml),
- m_cache(cache),
- m_device(device),
- m_state(*(drcuml_machine_state *)cache.alloc_near(sizeof(m_state))),
- m_accessors((data_accessors *)cache.alloc_near(sizeof(*m_accessors) * ADDRESS_SPACES))
+ m_cache(cache),
+ m_device(device),
+ m_state(*(drcuml_machine_state *)cache.alloc_near(sizeof(m_state))),
+ m_accessors((data_accessors *)cache.alloc_near(sizeof(*m_accessors) * ADDRESS_SPACES))
{
// reset the machine state
memset(m_accessors, 0, sizeof(*m_accessors) * ADDRESS_SPACES);
@@ -149,13 +149,13 @@ drcbe_interface::~drcbe_interface()
drcuml_state::drcuml_state(device_t &device, drc_cache &cache, UINT32 flags, int modes, int addrbits, int ignorebits)
: m_device(device),
- m_cache(cache),
- m_beintf((flags & DRCUML_OPTION_USE_C) ?
+ m_cache(cache),
+ m_beintf((flags & DRCUML_OPTION_USE_C) ?
*static_cast<drcbe_interface *>(auto_alloc(device.machine(), drcbe_c(*this, device, cache, flags, modes, addrbits, ignorebits))) :
*static_cast<drcbe_interface *>(auto_alloc(device.machine(), drcbe_native(*this, device, cache, flags, modes, addrbits, ignorebits)))),
- m_umllog(NULL),
- m_blocklist(device.machine().respool()),
- m_symlist(device.machine().respool())
+ m_umllog(NULL),
+ m_blocklist(device.machine().respool()),
+ m_symlist(device.machine().respool())
{
// if we're to log, create the logfile
if (flags & DRCUML_OPTION_LOG_UML)
@@ -320,11 +320,11 @@ void drcuml_state::log_printf(const char *format, ...)
drcuml_block::drcuml_block(drcuml_state &drcuml, UINT32 maxinst)
: m_drcuml(drcuml),
- m_next(NULL),
- m_nextinst(0),
- m_maxinst(maxinst * 3/2),
- m_inst(auto_alloc_array(drcuml.device().machine(), instruction, m_maxinst)),
- m_inuse(false)
+ m_next(NULL),
+ m_nextinst(0),
+ m_maxinst(maxinst * 3/2),
+ m_inst(auto_alloc_array(drcuml.device().machine(), instruction, m_maxinst)),
+ m_inuse(false)
{
}
@@ -581,13 +581,13 @@ inline UINT8 effective_test_psize(const opcode_info &opinfo, int pnum, int insts
{
switch (opinfo.param[pnum].size)
{
- case PSIZE_4: return 4;
- case PSIZE_8: return 8;
- case PSIZE_OP: return instsize;
- case PSIZE_P1: return 1 << (params[0] & 3);
- case PSIZE_P2: return 1 << (params[1] & 3);
- case PSIZE_P3: return 1 << (params[2] & 3);
- case PSIZE_P4: return 1 << (params[3] & 3);
+ case PSIZE_4: return 4;
+ case PSIZE_8: return 8;
+ case PSIZE_OP: return instsize;
+ case PSIZE_P1: return 1 << (params[0] & 3);
+ case PSIZE_P2: return 1 << (params[1] & 3);
+ case PSIZE_P3: return 1 << (params[2] & 3);
+ case PSIZE_P4: return 1 << (params[3] & 3);
}
return instsize;
}
@@ -807,9 +807,9 @@ static void bevalidate_iterate_over_params(drcuml_state *drcuml, code_handle **h
// for some parameter types, we wish to iterate over all possibilities
switch (ptype)
{
- case parameter::PTYPE_INT_REGISTER: pcount = REG_I_END - REG_I0; break;
- case parameter::PTYPE_FLOAT_REGISTER: pcount = REG_F_END - REG_F0; break;
- default: pcount = 1; break;
+ case parameter::PTYPE_INT_REGISTER: pcount = REG_I_END - REG_I0; break;
+ case parameter::PTYPE_FLOAT_REGISTER: pcount = REG_F_END - REG_F0; break;
+ default: pcount = 1; break;
}
// iterate over possibilities
diff --git a/src/emu/cpu/drcuml.h b/src/emu/cpu/drcuml.h
index 6cb0cab285a..39ade10059a 100644
--- a/src/emu/cpu/drcuml.h
+++ b/src/emu/cpu/drcuml.h
@@ -51,9 +51,9 @@
//**************************************************************************
// these options are passed into drcuml_alloc() and control global behaviors
-const UINT32 DRCUML_OPTION_USE_C = 0x0001; // always use the C back-end
-const UINT32 DRCUML_OPTION_LOG_UML = 0x0002; // generate a UML disassembly of each block
-const UINT32 DRCUML_OPTION_LOG_NATIVE = 0x0004; // tell the back-end to generate a native disassembly of each block
+const UINT32 DRCUML_OPTION_USE_C = 0x0001; // always use the C back-end
+const UINT32 DRCUML_OPTION_LOG_UML = 0x0002; // generate a UML disassembly of each block
+const UINT32 DRCUML_OPTION_LOG_NATIVE = 0x0004; // tell the back-end to generate a native disassembly of each block
@@ -79,11 +79,11 @@ class drcuml_state;
union drcuml_ireg
{
#ifdef LSB_FIRST
- struct { UINT32 l,h; } w; // 32-bit low, high parts of the register
+ struct { UINT32 l,h; } w; // 32-bit low, high parts of the register
#else
- struct { UINT32 h,l; } w; // 32-bit low, high parts of the register
+ struct { UINT32 h,l; } w; // 32-bit low, high parts of the register
#endif
- UINT64 d; // 64-bit full register
+ UINT64 d; // 64-bit full register
};
@@ -91,30 +91,30 @@ union drcuml_ireg
union drcuml_freg
{
#ifdef LSB_FIRST
- struct { float l,h; } s; // 32-bit low, high parts of the register
+ struct { float l,h; } s; // 32-bit low, high parts of the register
#else
- struct { float h,l; } s; // 32-bit low, high parts of the register
+ struct { float h,l; } s; // 32-bit low, high parts of the register
#endif
- double d; // 64-bit full register
+ double d; // 64-bit full register
};
// the collected machine state of a system
struct drcuml_machine_state
{
- drcuml_ireg r[uml::REG_I_COUNT]; // integer registers
- drcuml_freg f[uml::REG_F_COUNT]; // floating-point registers
- UINT32 exp; // exception parameter register
- UINT8 fmod; // fmod (floating-point mode) register
- UINT8 flags; // flags state
+ drcuml_ireg r[uml::REG_I_COUNT]; // integer registers
+ drcuml_freg f[uml::REG_F_COUNT]; // floating-point registers
+ UINT32 exp; // exception parameter register
+ UINT8 fmod; // fmod (floating-point mode) register
+ UINT8 flags; // flags state
};
// hints and information about the back-end
struct drcbe_info
{
- UINT8 direct_iregs; // number of direct-mapped integer registers
- UINT8 direct_fregs; // number of direct-mapped floating point registers
+ UINT8 direct_iregs; // number of direct-mapped integer registers
+ UINT8 direct_fregs; // number of direct-mapped floating point registers
};
@@ -156,12 +156,12 @@ private:
const char *get_comment_text(const uml::instruction &inst, astring &comment);
// internal state
- drcuml_state & m_drcuml; // pointer back to the owning UML
- drcuml_block * m_next; // pointer to next block
- UINT32 m_nextinst; // next instruction to fill in the cache
- UINT32 m_maxinst; // maximum number of instructions
- uml::instruction * m_inst; // pointer to the instruction list
- bool m_inuse; // this block is in use
+ drcuml_state & m_drcuml; // pointer back to the owning UML
+ drcuml_block * m_next; // pointer to next block
+ UINT32 m_nextinst; // next instruction to fill in the cache
+ UINT32 m_maxinst; // maximum number of instructions
+ uml::instruction * m_inst; // pointer to the instruction list
+ bool m_inuse; // this block is in use
};
@@ -182,12 +182,12 @@ public:
protected:
// internal state
- drcuml_state & m_drcuml; // pointer back to our owner
- drc_cache & m_cache; // pointer to the cache
- device_t & m_device; // CPU device we are associated with
- address_space * m_space[ADDRESS_SPACES];// pointers to CPU's address space
- drcuml_machine_state & m_state; // state of the machine (in near cache)
- data_accessors * m_accessors; // memory accessors (in near cache)
+ drcuml_state & m_drcuml; // pointer back to our owner
+ drc_cache & m_cache; // pointer to the cache
+ device_t & m_device; // CPU device we are associated with
+ address_space * m_space[ADDRESS_SPACES];// pointers to CPU's address space
+ drcuml_machine_state & m_state; // state of the machine (in near cache)
+ data_accessors * m_accessors; // memory accessors (in near cache)
};
@@ -237,9 +237,9 @@ private:
// construction/destruction
symbol(void *base, UINT32 length, const char *name)
: m_next(NULL),
- m_base(drccodeptr(base)),
- m_length(length),
- m_name(name) { }
+ m_base(drccodeptr(base)),
+ m_length(length),
+ m_name(name) { }
public:
// getters
@@ -247,20 +247,20 @@ private:
private:
// internal state
- symbol * m_next; // link to the next symbol
- drccodeptr m_base; // base of the symbol
- UINT32 m_length; // length of the region covered
- astring m_name; // name of the symbol
+ symbol * m_next; // link to the next symbol
+ drccodeptr m_base; // base of the symbol
+ UINT32 m_length; // length of the region covered
+ astring m_name; // name of the symbol
};
// internal state
- device_t & m_device; // CPU device we are associated with
- drc_cache & m_cache; // pointer to the codegen cache
- drcbe_interface & m_beintf; // backend interface pointer
- FILE * m_umllog; // handle to the UML logfile
- simple_list<drcuml_block> m_blocklist; // list of active blocks
- simple_list<uml::code_handle> m_handlelist; // list of active handles
- simple_list<symbol> m_symlist; // list of symbols
+ device_t & m_device; // CPU device we are associated with
+ drc_cache & m_cache; // pointer to the codegen cache
+ drcbe_interface & m_beintf; // backend interface pointer
+ FILE * m_umllog; // handle to the UML logfile
+ simple_list<drcuml_block> m_blocklist; // list of active blocks
+ simple_list<uml::code_handle> m_handlelist; // list of active handles
+ simple_list<symbol> m_symlist; // list of symbols
};
diff --git a/src/emu/cpu/drcumlsh.h b/src/emu/cpu/drcumlsh.h
index c02ac68a882..564e67d5db0 100644
--- a/src/emu/cpu/drcumlsh.h
+++ b/src/emu/cpu/drcumlsh.h
@@ -24,163 +24,163 @@
***************************************************************************/
/* ----- Compile-time Opcodes ----- */
-#define UML_HANDLE(block, _handle) do { block->append().handle(_handle); } while (0)
-#define UML_HASH(block, mode, pc) do { block->append().hash(mode, pc); } while (0)
-#define UML_LABEL(block, _label) do { block->append().label(_label); } while (0)
-#define UML_MAPVAR(block, _mapvar, _value) do { block->append().mapvar(_mapvar, _value); } while (0)
+#define UML_HANDLE(block, _handle) do { block->append().handle(_handle); } while (0)
+#define UML_HASH(block, mode, pc) do { block->append().hash(mode, pc); } while (0)
+#define UML_LABEL(block, _label) do { block->append().label(_label); } while (0)
+#define UML_MAPVAR(block, _mapvar, _value) do { block->append().mapvar(_mapvar, _value); } while (0)
/* ----- Control Flow Operations ----- */
-#define UML_NOP(block) do { block->append().nop(); } while (0)
-#define UML_DEBUG(block, pc) do { block->append().debug(pc); } while (0)
-#define UML_EXIT(block, param) do { block->append().exit(param); } while (0)
-#define UML_EXITc(block, cond, param) do { block->append().exit(param, cond); } while (0)
-#define UML_HASHJMP(block, mode, pc, handle) do { block->append().hashjmp(mode, pc, handle); } while (0)
-#define UML_JMP(block, label) do { block->append().jmp(label); } while (0)
-#define UML_JMPc(block, cond, label) do { block->append().jmp(cond, label); } while (0)
-#define UML_JMPH(block, handle) do { block->append().jmph(handle); } while (0)
-#define UML_JMPHc(block, cond, handle) do { block->append().jmph(cond, handle); } while (0)
-#define UML_EXH(block, handle, param) do { block->append().exh(handle, param); } while (0)
-#define UML_EXHc(block, cond, handle, param) do { block->append().exh(cond, handle, param); } while (0)
-#define UML_CALLH(block, handle) do { block->append().callh(handle); } while (0)
-#define UML_CALLHc(block, cond, handle) do { block->append().callh(cond, handle); } while (0)
-#define UML_RET(block) do { block->append().ret(); } while (0)
-#define UML_RETc(block, cond) do { block->append().ret(cond); } while (0)
-#define UML_CALLC(block, func, ptr) do { block->append().callc(func, ptr); } while (0)
-#define UML_CALLCc(block, cond, func, ptr) do { block->append().callc(cond, func, ptr); } while (0)
-#define UML_RECOVER(block, dst, mapvar) do { block->append().recover(dst, mapvar); } while (0)
+#define UML_NOP(block) do { block->append().nop(); } while (0)
+#define UML_DEBUG(block, pc) do { block->append().debug(pc); } while (0)
+#define UML_EXIT(block, param) do { block->append().exit(param); } while (0)
+#define UML_EXITc(block, cond, param) do { block->append().exit(param, cond); } while (0)
+#define UML_HASHJMP(block, mode, pc, handle) do { block->append().hashjmp(mode, pc, handle); } while (0)
+#define UML_JMP(block, label) do { block->append().jmp(label); } while (0)
+#define UML_JMPc(block, cond, label) do { block->append().jmp(cond, label); } while (0)
+#define UML_JMPH(block, handle) do { block->append().jmph(handle); } while (0)
+#define UML_JMPHc(block, cond, handle) do { block->append().jmph(cond, handle); } while (0)
+#define UML_EXH(block, handle, param) do { block->append().exh(handle, param); } while (0)
+#define UML_EXHc(block, cond, handle, param) do { block->append().exh(cond, handle, param); } while (0)
+#define UML_CALLH(block, handle) do { block->append().callh(handle); } while (0)
+#define UML_CALLHc(block, cond, handle) do { block->append().callh(cond, handle); } while (0)
+#define UML_RET(block) do { block->append().ret(); } while (0)
+#define UML_RETc(block, cond) do { block->append().ret(cond); } while (0)
+#define UML_CALLC(block, func, ptr) do { block->append().callc(func, ptr); } while (0)
+#define UML_CALLCc(block, cond, func, ptr) do { block->append().callc(cond, func, ptr); } while (0)
+#define UML_RECOVER(block, dst, mapvar) do { block->append().recover(dst, mapvar); } while (0)
/* ----- Internal Register Operations ----- */
-#define UML_SETFMOD(block, mode) do { block->append().setfmod(mode); } while (0)
-#define UML_GETFMOD(block, dst) do { block->append().getfmod(dst); } while (0)
-#define UML_GETEXP(block, dst) do { block->append().getexp(dst); } while (0)
-#define UML_GETFLGS(block, dst, flags) do { block->append().getflgs(dst, flags); } while (0)
-#define UML_SAVE(block, dst) do { block->append().save(dst); } while (0)
-#define UML_RESTORE(block, src) do { block->append().restore(src); } while (0)
+#define UML_SETFMOD(block, mode) do { block->append().setfmod(mode); } while (0)
+#define UML_GETFMOD(block, dst) do { block->append().getfmod(dst); } while (0)
+#define UML_GETEXP(block, dst) do { block->append().getexp(dst); } while (0)
+#define UML_GETFLGS(block, dst, flags) do { block->append().getflgs(dst, flags); } while (0)
+#define UML_SAVE(block, dst) do { block->append().save(dst); } while (0)
+#define UML_RESTORE(block, src) do { block->append().restore(src); } while (0)
/* ----- 32-Bit Integer Operations ----- */
-#define UML_LOAD(block, dst, base, index, size, scale) do { block->append().load(dst, base, index, size, scale); } while (0)
-#define UML_LOADS(block, dst, base, index, size, scale) do { block->append().loads(dst, base, index, size, scale); } while (0)
-#define UML_STORE(block, base, index, src1, size, scale) do { block->append().store(base, index, src1, size, scale); } while (0)
-#define UML_READ(block, dst, src1, size, space) do { block->append().read(dst, src1, size, space); } while (0)
-#define UML_READM(block, dst, src1, mask, size, space) do { block->append().readm(dst, src1, mask, size, space); } while (0)
-#define UML_WRITE(block, dst, src1, size, space) do { block->append().write(dst, src1, size, space); } while (0)
-#define UML_WRITEM(block, dst, src1, mask, size, space) do { block->append().writem(dst, src1, mask, size, space); } while (0)
-#define UML_CARRY(block, src, bitnum) do { block->append().carry(src, bitnum); } while (0)
-#define UML_SETc(block, cond, dst) do { block->append().set(cond, dst); } while (0)
-#define UML_MOV(block, dst, src1) do { block->append().mov(dst, src1); } while (0)
-#define UML_MOVc(block, cond, dst, src1) do { block->append().mov(cond, dst, src1); } while (0)
-#define UML_SEXT(block, dst, src1, size) do { block->append().sext(dst, src1, size); } while (0)
-#define UML_ROLAND(block, dst, src, shift, mask) do { block->append().roland(dst, src, shift, mask); } while (0)
-#define UML_ROLINS(block, dst, src, shift, mask) do { block->append().rolins(dst, src, shift, mask); } while (0)
-#define UML_ADD(block, dst, src1, src2) do { block->append().add(dst, src1, src2); } while (0)
-#define UML_ADDC(block, dst, src1, src2) do { block->append().addc(dst, src1, src2); } while (0)
-#define UML_SUB(block, dst, src1, src2) do { block->append().sub(dst, src1, src2); } while (0)
-#define UML_SUBB(block, dst, src1, src2) do { block->append().subb(dst, src1, src2); } while (0)
-#define UML_CMP(block, src1, src2) do { block->append().cmp(src1, src2); } while (0)
-#define UML_MULU(block, dst, edst, src1, src2) do { block->append().mulu(dst, edst, src1, src2); } while (0)
-#define UML_MULS(block, dst, edst, src1, src2) do { block->append().muls(dst, edst, src1, src2); } while (0)
-#define UML_DIVU(block, dst, edst, src1, src2) do { block->append().divu(dst, edst, src1, src2); } while (0)
-#define UML_DIVS(block, dst, edst, src1, src2) do { block->append().divs(dst, edst, src1, src2); } while (0)
-#define UML_AND(block, dst, src1, src2) do { block->append()._and(dst, src1, src2); } while (0)
-#define UML_TEST(block, src1, src2) do { block->append().test(src1, src2); } while (0)
-#define UML_OR(block, dst, src1, src2) do { block->append()._or(dst, src1, src2); } while (0)
-#define UML_XOR(block, dst, src1, src2) do { block->append()._xor(dst, src1, src2); } while (0)
-#define UML_LZCNT(block, dst, src) do { block->append().lzcnt(dst, src); } while (0)
-#define UML_BSWAP(block, dst, src) do { block->append().bswap(dst, src); } while (0)
-#define UML_SHL(block, dst, src, count) do { block->append().shl(dst, src, count); } while (0)
-#define UML_SHR(block, dst, src, count) do { block->append().shr(dst, src, count); } while (0)
-#define UML_SAR(block, dst, src, count) do { block->append().sar(dst, src, count); } while (0)
-#define UML_ROL(block, dst, src, count) do { block->append().rol(dst, src, count); } while (0)
-#define UML_ROLC(block, dst, src, count) do { block->append().rolc(dst, src, count); } while (0)
-#define UML_ROR(block, dst, src, count) do { block->append().ror(dst, src, count); } while (0)
-#define UML_RORC(block, dst, src, count) do { block->append().rorc(dst, src, count); } while (0)
+#define UML_LOAD(block, dst, base, index, size, scale) do { block->append().load(dst, base, index, size, scale); } while (0)
+#define UML_LOADS(block, dst, base, index, size, scale) do { block->append().loads(dst, base, index, size, scale); } while (0)
+#define UML_STORE(block, base, index, src1, size, scale) do { block->append().store(base, index, src1, size, scale); } while (0)
+#define UML_READ(block, dst, src1, size, space) do { block->append().read(dst, src1, size, space); } while (0)
+#define UML_READM(block, dst, src1, mask, size, space) do { block->append().readm(dst, src1, mask, size, space); } while (0)
+#define UML_WRITE(block, dst, src1, size, space) do { block->append().write(dst, src1, size, space); } while (0)
+#define UML_WRITEM(block, dst, src1, mask, size, space) do { block->append().writem(dst, src1, mask, size, space); } while (0)
+#define UML_CARRY(block, src, bitnum) do { block->append().carry(src, bitnum); } while (0)
+#define UML_SETc(block, cond, dst) do { block->append().set(cond, dst); } while (0)
+#define UML_MOV(block, dst, src1) do { block->append().mov(dst, src1); } while (0)
+#define UML_MOVc(block, cond, dst, src1) do { block->append().mov(cond, dst, src1); } while (0)
+#define UML_SEXT(block, dst, src1, size) do { block->append().sext(dst, src1, size); } while (0)
+#define UML_ROLAND(block, dst, src, shift, mask) do { block->append().roland(dst, src, shift, mask); } while (0)
+#define UML_ROLINS(block, dst, src, shift, mask) do { block->append().rolins(dst, src, shift, mask); } while (0)
+#define UML_ADD(block, dst, src1, src2) do { block->append().add(dst, src1, src2); } while (0)
+#define UML_ADDC(block, dst, src1, src2) do { block->append().addc(dst, src1, src2); } while (0)
+#define UML_SUB(block, dst, src1, src2) do { block->append().sub(dst, src1, src2); } while (0)
+#define UML_SUBB(block, dst, src1, src2) do { block->append().subb(dst, src1, src2); } while (0)
+#define UML_CMP(block, src1, src2) do { block->append().cmp(src1, src2); } while (0)
+#define UML_MULU(block, dst, edst, src1, src2) do { block->append().mulu(dst, edst, src1, src2); } while (0)
+#define UML_MULS(block, dst, edst, src1, src2) do { block->append().muls(dst, edst, src1, src2); } while (0)
+#define UML_DIVU(block, dst, edst, src1, src2) do { block->append().divu(dst, edst, src1, src2); } while (0)
+#define UML_DIVS(block, dst, edst, src1, src2) do { block->append().divs(dst, edst, src1, src2); } while (0)
+#define UML_AND(block, dst, src1, src2) do { block->append()._and(dst, src1, src2); } while (0)
+#define UML_TEST(block, src1, src2) do { block->append().test(src1, src2); } while (0)
+#define UML_OR(block, dst, src1, src2) do { block->append()._or(dst, src1, src2); } while (0)
+#define UML_XOR(block, dst, src1, src2) do { block->append()._xor(dst, src1, src2); } while (0)
+#define UML_LZCNT(block, dst, src) do { block->append().lzcnt(dst, src); } while (0)
+#define UML_BSWAP(block, dst, src) do { block->append().bswap(dst, src); } while (0)
+#define UML_SHL(block, dst, src, count) do { block->append().shl(dst, src, count); } while (0)
+#define UML_SHR(block, dst, src, count) do { block->append().shr(dst, src, count); } while (0)
+#define UML_SAR(block, dst, src, count) do { block->append().sar(dst, src, count); } while (0)
+#define UML_ROL(block, dst, src, count) do { block->append().rol(dst, src, count); } while (0)
+#define UML_ROLC(block, dst, src, count) do { block->append().rolc(dst, src, count); } while (0)
+#define UML_ROR(block, dst, src, count) do { block->append().ror(dst, src, count); } while (0)
+#define UML_RORC(block, dst, src, count) do { block->append().rorc(dst, src, count); } while (0)
/* ----- 64-Bit Integer Operations ----- */
-#define UML_DLOAD(block, dst, base, index, size, scale) do { block->append().dload(dst, base, index, size, scale); } while (0)
-#define UML_DLOADS(block, dst, base, index, size, scale) do { block->append().dloads(dst, base, index, size, scale); } while (0)
-#define UML_DSTORE(block, base, index, src1, size, scale) do { block->append().dstore(base, index, src1, size, scale); } while (0)
-#define UML_DREAD(block, dst, src1, size, space) do { block->append().dread(dst, src1, size, space); } while (0)
-#define UML_DREADM(block, dst, src1, mask, size, space) do { block->append().dreadm(dst, src1, mask, size, space); } while (0)
-#define UML_DWRITE(block, dst, src1, size, space) do { block->append().dwrite(dst, src1, size, space); } while (0)
-#define UML_DWRITEM(block, dst, src1, mask, size, space) do { block->append().dwritem(dst, src1, mask, size, space); } while (0)
-#define UML_DCARRY(block, src, bitnum) do { block->append().dcarry(src, bitnum); } while (0)
-#define UML_DSETc(block, cond, dst) do { block->append().dset(cond, dst); } while (0)
-#define UML_DMOV(block, dst, src1) do { block->append().dmov(dst, src1); } while (0)
-#define UML_DMOVc(block, cond, dst, src1) do { block->append().dmov(cond, dst, src1); } while (0)
-#define UML_DSEXT(block, dst, src1, size) do { block->append().dsext(dst, src1, size); } while (0)
-#define UML_DROLAND(block, dst, src, shift, mask) do { block->append().droland(dst, src, shift, mask); } while (0)
-#define UML_DROLINS(block, dst, src, shift, mask) do { block->append().drolins(dst, src, shift, mask); } while (0)
-#define UML_DADD(block, dst, src1, src2) do { block->append().dadd(dst, src1, src2); } while (0)
-#define UML_DADDC(block, dst, src1, src2) do { block->append().daddc(dst, src1, src2); } while (0)
-#define UML_DSUB(block, dst, src1, src2) do { block->append().dsub(dst, src1, src2); } while (0)
-#define UML_DSUBB(block, dst, src1, src2) do { block->append().dsubb(dst, src1, src2); } while (0)
-#define UML_DCMP(block, src1, src2) do { block->append().dcmp(src1, src2); } while (0)
-#define UML_DMULU(block, dst, edst, src1, src2) do { block->append().dmulu(dst, edst, src1, src2); } while (0)
-#define UML_DMULS(block, dst, edst, src1, src2) do { block->append().dmuls(dst, edst, src1, src2); } while (0)
-#define UML_DDIVU(block, dst, edst, src1, src2) do { block->append().ddivu(dst, edst, src1, src2); } while (0)
-#define UML_DDIVS(block, dst, edst, src1, src2) do { block->append().ddivs(dst, edst, src1, src2); } while (0)
-#define UML_DAND(block, dst, src1, src2) do { block->append().dand(dst, src1, src2); } while (0)
-#define UML_DTEST(block, src1, src2) do { block->append().dtest(src1, src2); } while (0)
-#define UML_DOR(block, dst, src1, src2) do { block->append().dor(dst, src1, src2); } while (0)
-#define UML_DXOR(block, dst, src1, src2) do { block->append().dxor(dst, src1, src2); } while (0)
-#define UML_DLZCNT(block, dst, src) do { block->append().dlzcnt(dst, src); } while (0)
-#define UML_DBSWAP(block, dst, src) do { block->append().dbswap(dst, src); } while (0)
-#define UML_DSHL(block, dst, src, count) do { block->append().dshl(dst, src, count); } while (0)
-#define UML_DSHR(block, dst, src, count) do { block->append().dshr(dst, src, count); } while (0)
-#define UML_DSAR(block, dst, src, count) do { block->append().dsar(dst, src, count); } while (0)
-#define UML_DROL(block, dst, src, count) do { block->append().drol(dst, src, count); } while (0)
-#define UML_DROLC(block, dst, src, count) do { block->append().drolc(dst, src, count); } while (0)
-#define UML_DROR(block, dst, src, count) do { block->append().dror(dst, src, count); } while (0)
-#define UML_DRORC(block, dst, src, count) do { block->append().drorc(dst, src, count); } while (0)
+#define UML_DLOAD(block, dst, base, index, size, scale) do { block->append().dload(dst, base, index, size, scale); } while (0)
+#define UML_DLOADS(block, dst, base, index, size, scale) do { block->append().dloads(dst, base, index, size, scale); } while (0)
+#define UML_DSTORE(block, base, index, src1, size, scale) do { block->append().dstore(base, index, src1, size, scale); } while (0)
+#define UML_DREAD(block, dst, src1, size, space) do { block->append().dread(dst, src1, size, space); } while (0)
+#define UML_DREADM(block, dst, src1, mask, size, space) do { block->append().dreadm(dst, src1, mask, size, space); } while (0)
+#define UML_DWRITE(block, dst, src1, size, space) do { block->append().dwrite(dst, src1, size, space); } while (0)
+#define UML_DWRITEM(block, dst, src1, mask, size, space) do { block->append().dwritem(dst, src1, mask, size, space); } while (0)
+#define UML_DCARRY(block, src, bitnum) do { block->append().dcarry(src, bitnum); } while (0)
+#define UML_DSETc(block, cond, dst) do { block->append().dset(cond, dst); } while (0)
+#define UML_DMOV(block, dst, src1) do { block->append().dmov(dst, src1); } while (0)
+#define UML_DMOVc(block, cond, dst, src1) do { block->append().dmov(cond, dst, src1); } while (0)
+#define UML_DSEXT(block, dst, src1, size) do { block->append().dsext(dst, src1, size); } while (0)
+#define UML_DROLAND(block, dst, src, shift, mask) do { block->append().droland(dst, src, shift, mask); } while (0)
+#define UML_DROLINS(block, dst, src, shift, mask) do { block->append().drolins(dst, src, shift, mask); } while (0)
+#define UML_DADD(block, dst, src1, src2) do { block->append().dadd(dst, src1, src2); } while (0)
+#define UML_DADDC(block, dst, src1, src2) do { block->append().daddc(dst, src1, src2); } while (0)
+#define UML_DSUB(block, dst, src1, src2) do { block->append().dsub(dst, src1, src2); } while (0)
+#define UML_DSUBB(block, dst, src1, src2) do { block->append().dsubb(dst, src1, src2); } while (0)
+#define UML_DCMP(block, src1, src2) do { block->append().dcmp(src1, src2); } while (0)
+#define UML_DMULU(block, dst, edst, src1, src2) do { block->append().dmulu(dst, edst, src1, src2); } while (0)
+#define UML_DMULS(block, dst, edst, src1, src2) do { block->append().dmuls(dst, edst, src1, src2); } while (0)
+#define UML_DDIVU(block, dst, edst, src1, src2) do { block->append().ddivu(dst, edst, src1, src2); } while (0)
+#define UML_DDIVS(block, dst, edst, src1, src2) do { block->append().ddivs(dst, edst, src1, src2); } while (0)
+#define UML_DAND(block, dst, src1, src2) do { block->append().dand(dst, src1, src2); } while (0)
+#define UML_DTEST(block, src1, src2) do { block->append().dtest(src1, src2); } while (0)
+#define UML_DOR(block, dst, src1, src2) do { block->append().dor(dst, src1, src2); } while (0)
+#define UML_DXOR(block, dst, src1, src2) do { block->append().dxor(dst, src1, src2); } while (0)
+#define UML_DLZCNT(block, dst, src) do { block->append().dlzcnt(dst, src); } while (0)
+#define UML_DBSWAP(block, dst, src) do { block->append().dbswap(dst, src); } while (0)
+#define UML_DSHL(block, dst, src, count) do { block->append().dshl(dst, src, count); } while (0)
+#define UML_DSHR(block, dst, src, count) do { block->append().dshr(dst, src, count); } while (0)
+#define UML_DSAR(block, dst, src, count) do { block->append().dsar(dst, src, count); } while (0)
+#define UML_DROL(block, dst, src, count) do { block->append().drol(dst, src, count); } while (0)
+#define UML_DROLC(block, dst, src, count) do { block->append().drolc(dst, src, count); } while (0)
+#define UML_DROR(block, dst, src, count) do { block->append().dror(dst, src, count); } while (0)
+#define UML_DRORC(block, dst, src, count) do { block->append().drorc(dst, src, count); } while (0)
/* ----- 32-bit Floating Point Arithmetic Operations ----- */
-#define UML_FSLOAD(block, dst, base, index) do { block->append().fsload(dst, base, index); } while (0)
-#define UML_FSSTORE(block, base, index, src1) do { block->append().fsstore(base, index, src1); } while (0)
-#define UML_FSREAD(block, dst, src1, space) do { block->append().fsread(dst, src1, AS_##space); } while (0)
-#define UML_FSWRITE(block, dst, src1, space) do { block->append().fswrite(dst, src1, AS_##space); } while (0)
-#define UML_FSMOV(block, dst, src1) do { block->append().fsmov(dst, src1); } while (0)
-#define UML_FSMOVc(block, cond, dst, src1) do { block->append().fsmov(cond, dst, src1); } while (0)
-#define UML_FSTOINT(block, dst, src1, size, round) do { block->append().fstoint(dst, src1, size, round); } while (0)
-#define UML_FSFRINT(block, dst, src1, size) do { block->append().fsfrint(dst, src1, size); } while (0)
-#define UML_FSFRFLT(block, dst, src1, size) do { block->append().fsfrflt(dst, src1, size); } while (0)
-#define UML_FSADD(block, dst, src1, src2) do { block->append().fsadd(dst, src1, src2); } while (0)
-#define UML_FSSUB(block, dst, src1, src2) do { block->append().fssub(dst, src1, src2); } while (0)
-#define UML_FSCMP(block, src1, src2) do { block->append().fscmp(src1, src2); } while (0)
-#define UML_FSMUL(block, dst, src1, src2) do { block->append().fsmul(dst, src1, src2); } while (0)
-#define UML_FSDIV(block, dst, src1, src2) do { block->append().fsdiv(dst, src1, src2); } while (0)
-#define UML_FSNEG(block, dst, src1) do { block->append().fsneg(dst, src1); } while (0)
-#define UML_FSABS(block, dst, src1) do { block->append().fsabs(dst, src1); } while (0)
-#define UML_FSSQRT(block, dst, src1) do { block->append().fssqrt(dst, src1); } while (0)
-#define UML_FSRECIP(block, dst, src1) do { block->append().fsrecip(dst, src1); } while (0)
-#define UML_FSRSQRT(block, dst, src1) do { block->append().fsrsqrt(dst, src1); } while (0)
+#define UML_FSLOAD(block, dst, base, index) do { block->append().fsload(dst, base, index); } while (0)
+#define UML_FSSTORE(block, base, index, src1) do { block->append().fsstore(base, index, src1); } while (0)
+#define UML_FSREAD(block, dst, src1, space) do { block->append().fsread(dst, src1, AS_##space); } while (0)
+#define UML_FSWRITE(block, dst, src1, space) do { block->append().fswrite(dst, src1, AS_##space); } while (0)
+#define UML_FSMOV(block, dst, src1) do { block->append().fsmov(dst, src1); } while (0)
+#define UML_FSMOVc(block, cond, dst, src1) do { block->append().fsmov(cond, dst, src1); } while (0)
+#define UML_FSTOINT(block, dst, src1, size, round) do { block->append().fstoint(dst, src1, size, round); } while (0)
+#define UML_FSFRINT(block, dst, src1, size) do { block->append().fsfrint(dst, src1, size); } while (0)
+#define UML_FSFRFLT(block, dst, src1, size) do { block->append().fsfrflt(dst, src1, size); } while (0)
+#define UML_FSADD(block, dst, src1, src2) do { block->append().fsadd(dst, src1, src2); } while (0)
+#define UML_FSSUB(block, dst, src1, src2) do { block->append().fssub(dst, src1, src2); } while (0)
+#define UML_FSCMP(block, src1, src2) do { block->append().fscmp(src1, src2); } while (0)
+#define UML_FSMUL(block, dst, src1, src2) do { block->append().fsmul(dst, src1, src2); } while (0)
+#define UML_FSDIV(block, dst, src1, src2) do { block->append().fsdiv(dst, src1, src2); } while (0)
+#define UML_FSNEG(block, dst, src1) do { block->append().fsneg(dst, src1); } while (0)
+#define UML_FSABS(block, dst, src1) do { block->append().fsabs(dst, src1); } while (0)
+#define UML_FSSQRT(block, dst, src1) do { block->append().fssqrt(dst, src1); } while (0)
+#define UML_FSRECIP(block, dst, src1) do { block->append().fsrecip(dst, src1); } while (0)
+#define UML_FSRSQRT(block, dst, src1) do { block->append().fsrsqrt(dst, src1); } while (0)
/* ----- 64-bit Floating Point Arithmetic Operations ----- */
-#define UML_FDLOAD(block, dst, base, index) do { block->append().fdload(dst, base, index); } while (0)
-#define UML_FDSTORE(block, base, index, src1) do { block->append().fdstore(base, index, src1); } while (0)
-#define UML_FDREAD(block, dst, src1, space) do { block->append().fdread(dst, src1, AS_##space); } while (0)
-#define UML_FDWRITE(block, dst, src1, space) do { block->append().fdwrite(dst, src1, AS_##space); } while (0)
-#define UML_FDMOV(block, dst, src1) do { block->append().fdmov(dst, src1); } while (0)
-#define UML_FDMOVc(block, cond, dst, src1) do { block->append().fdmov(cond, dst, src1); } while (0)
-#define UML_FDTOINT(block, dst, src1, size, round) do { block->append().fdtoint(dst, src1, size, round); } while (0)
-#define UML_FDFRINT(block, dst, src1, size) do { block->append().fdfrint(dst, src1, size); } while (0)
-#define UML_FDFRFLT(block, dst, src1, size) do { block->append().fdfrflt(dst, src1, size); } while (0)
+#define UML_FDLOAD(block, dst, base, index) do { block->append().fdload(dst, base, index); } while (0)
+#define UML_FDSTORE(block, base, index, src1) do { block->append().fdstore(base, index, src1); } while (0)
+#define UML_FDREAD(block, dst, src1, space) do { block->append().fdread(dst, src1, AS_##space); } while (0)
+#define UML_FDWRITE(block, dst, src1, space) do { block->append().fdwrite(dst, src1, AS_##space); } while (0)
+#define UML_FDMOV(block, dst, src1) do { block->append().fdmov(dst, src1); } while (0)
+#define UML_FDMOVc(block, cond, dst, src1) do { block->append().fdmov(cond, dst, src1); } while (0)
+#define UML_FDTOINT(block, dst, src1, size, round) do { block->append().fdtoint(dst, src1, size, round); } while (0)
+#define UML_FDFRINT(block, dst, src1, size) do { block->append().fdfrint(dst, src1, size); } while (0)
+#define UML_FDFRFLT(block, dst, src1, size) do { block->append().fdfrflt(dst, src1, size); } while (0)
#define UML_FDRNDS(block, dst, src1) do { block->append().fdrnds(dst, src1); } while (0)
-#define UML_FDADD(block, dst, src1, src2) do { block->append().fdadd(dst, src1, src2); } while (0)
-#define UML_FDSUB(block, dst, src1, src2) do { block->append().fdsub(dst, src1, src2); } while (0)
-#define UML_FDCMP(block, src1, src2) do { block->append().fdcmp(src1, src2); } while (0)
-#define UML_FDMUL(block, dst, src1, src2) do { block->append().fdmul(dst, src1, src2); } while (0)
-#define UML_FDDIV(block, dst, src1, src2) do { block->append().fddiv(dst, src1, src2); } while (0)
-#define UML_FDNEG(block, dst, src1) do { block->append().fdneg(dst, src1); } while (0)
-#define UML_FDABS(block, dst, src1) do { block->append().fdabs(dst, src1); } while (0)
-#define UML_FDSQRT(block, dst, src1) do { block->append().fdsqrt(dst, src1); } while (0)
-#define UML_FDRECIP(block, dst, src1) do { block->append().fdrecip(dst, src1); } while (0)
-#define UML_FDRSQRT(block, dst, src1) do { block->append().fdrsqrt(dst, src1); } while (0)
+#define UML_FDADD(block, dst, src1, src2) do { block->append().fdadd(dst, src1, src2); } while (0)
+#define UML_FDSUB(block, dst, src1, src2) do { block->append().fdsub(dst, src1, src2); } while (0)
+#define UML_FDCMP(block, src1, src2) do { block->append().fdcmp(src1, src2); } while (0)
+#define UML_FDMUL(block, dst, src1, src2) do { block->append().fdmul(dst, src1, src2); } while (0)
+#define UML_FDDIV(block, dst, src1, src2) do { block->append().fddiv(dst, src1, src2); } while (0)
+#define UML_FDNEG(block, dst, src1) do { block->append().fdneg(dst, src1); } while (0)
+#define UML_FDABS(block, dst, src1) do { block->append().fdabs(dst, src1); } while (0)
+#define UML_FDSQRT(block, dst, src1) do { block->append().fdsqrt(dst, src1); } while (0)
+#define UML_FDRECIP(block, dst, src1) do { block->append().fdrecip(dst, src1); } while (0)
+#define UML_FDRSQRT(block, dst, src1) do { block->append().fdrsqrt(dst, src1); } while (0)
#endif /* __DRCUMLSH_H__ */
diff --git a/src/emu/cpu/dsp16/dsp16.c b/src/emu/cpu/dsp16/dsp16.c
index dc76c854653..c2cb8b72401 100644
--- a/src/emu/cpu/dsp16/dsp16.c
+++ b/src/emu/cpu/dsp16/dsp16.c
@@ -30,42 +30,42 @@ const device_type DSP16 = &device_creator<dsp16_device>;
dsp16_device::dsp16_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, DSP16, "DSP16", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1),
- m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1),
- m_i(0),
- m_pc(0),
- m_pt(0),
- m_pr(0),
- m_pi(0),
- m_j(0),
- m_k(0),
- m_rb(0),
- m_re(0),
- m_r0(0),
- m_r1(0),
- m_r2(0),
- m_r3(0),
- m_x(0),
- m_y(0),
- m_p(0),
- m_a0(0),
- m_a1(0),
- m_auc(0),
- m_psw(0),
- m_c0(0),
- m_c1(0),
- m_c2(0),
- m_sioc(0),
- m_pioc(0),
- m_ppc(0),
- m_cacheStart(CACHE_INVALID),
- m_cacheEnd(CACHE_INVALID),
- m_cacheRedoNextPC(CACHE_INVALID),
- m_cacheIterations(0),
- m_program(NULL),
- m_data(NULL),
- m_direct(NULL),
- m_icount(0)
+ m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1),
+ m_data_config("data", ENDIANNESS_LITTLE, 16, 16, -1),
+ m_i(0),
+ m_pc(0),
+ m_pt(0),
+ m_pr(0),
+ m_pi(0),
+ m_j(0),
+ m_k(0),
+ m_rb(0),
+ m_re(0),
+ m_r0(0),
+ m_r1(0),
+ m_r2(0),
+ m_r3(0),
+ m_x(0),
+ m_y(0),
+ m_p(0),
+ m_a0(0),
+ m_a1(0),
+ m_auc(0),
+ m_psw(0),
+ m_c0(0),
+ m_c1(0),
+ m_c2(0),
+ m_sioc(0),
+ m_pioc(0),
+ m_ppc(0),
+ m_cacheStart(CACHE_INVALID),
+ m_cacheEnd(CACHE_INVALID),
+ m_cacheRedoNextPC(CACHE_INVALID),
+ m_cacheIterations(0),
+ m_program(NULL),
+ m_data(NULL),
+ m_direct(NULL),
+ m_icount(0)
{
// Allocate & setup
}
@@ -182,8 +182,8 @@ void dsp16_device::device_reset()
const address_space_config *dsp16_device::memory_space_config(address_spacenum spacenum) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config :
- (spacenum == AS_DATA) ? &m_data_config :
- NULL;
+ (spacenum == AS_DATA) ? &m_data_config :
+ NULL;
}
@@ -312,7 +312,7 @@ void dsp16_device::execute_run()
do
{
// debugging
- m_ppc = m_pc; // copy PC to previous PC
+ m_ppc = m_pc; // copy PC to previous PC
debugger_instruction_hook(this, m_pc);
// instruction fetch & execute
diff --git a/src/emu/cpu/dsp16/dsp16.h b/src/emu/cpu/dsp16/dsp16.h
index 7bdee3838ac..4b83dd07be6 100644
--- a/src/emu/cpu/dsp16/dsp16.h
+++ b/src/emu/cpu/dsp16/dsp16.h
@@ -55,7 +55,7 @@ protected:
// CPU registers
// ROM Address Arithmetic Unit (XAAU)
- UINT16 m_i; // 12 bits
+ UINT16 m_i; // 12 bits
UINT16 m_pc;
UINT16 m_pt;
UINT16 m_pr;
@@ -73,9 +73,9 @@ protected:
UINT16 m_x;
UINT32 m_y;
UINT32 m_p;
- UINT64 m_a0; // 36 bits
- UINT64 m_a1; // 36 bits
- UINT8 m_auc; // 6 bits
+ UINT64 m_a0; // 36 bits
+ UINT64 m_a1; // 36 bits
+ UINT8 m_auc; // 6 bits
UINT16 m_psw;
UINT8 m_c0;
UINT8 m_c1;
@@ -136,12 +136,12 @@ extern const device_type DSP16;
enum
{
- DSP16_I, // ROM Address Arithmetic Unit (XAAU)
+ DSP16_I, // ROM Address Arithmetic Unit (XAAU)
DSP16_PC,
DSP16_PT,
DSP16_PR,
DSP16_PI,
- DSP16_J, // RAM Address Arithmetic Unit (YAAU)
+ DSP16_J, // RAM Address Arithmetic Unit (YAAU)
DSP16_K,
DSP16_RB,
DSP16_RE,
@@ -149,7 +149,7 @@ enum
DSP16_R1,
DSP16_R2,
DSP16_R3,
- DSP16_X, // Data Arithmetic Unit (DAU)
+ DSP16_X, // Data Arithmetic Unit (DAU)
DSP16_Y,
DSP16_P,
DSP16_A0,
diff --git a/src/emu/cpu/dsp16/dsp16dis.c b/src/emu/cpu/dsp16/dsp16dis.c
index 59fdd6008d1..1be3ad654dd 100644
--- a/src/emu/cpu/dsp16/dsp16dis.c
+++ b/src/emu/cpu/dsp16/dsp16dis.c
@@ -234,8 +234,8 @@ bool disasmSIField(const UINT8& SI)
{
switch (SI)
{
- case 0x00: return 0; // Not a software interrupt
- case 0x01: return 1; // Software Interrupt
+ case 0x00: return 0; // Not a software interrupt
+ case 0x01: return 1; // Software Interrupt
}
return false;
}
diff --git a/src/emu/cpu/dsp16/dsp16ops.c b/src/emu/cpu/dsp16/dsp16ops.c
index 1fb338bb44e..3f4523b0a3b 100644
--- a/src/emu/cpu/dsp16/dsp16ops.c
+++ b/src/emu/cpu/dsp16/dsp16ops.c
@@ -109,20 +109,20 @@ void dsp16_device::executeF1Field(const UINT8& F1, const UINT8& D, const UINT8&
//UINT64* destinationReg = NULL;
//switch (D)
//{
- // case 0x00: destinationReg = &m_a0;
- // case 0x01: destinationReg = &m_a1;
- // default: break;
+ // case 0x00: destinationReg = &m_a0;
+ // case 0x01: destinationReg = &m_a1;
+ // default: break;
//}
// Which source is being used?
//UINT64* sourceReg = NULL;
//switch (S)
//{
- // case 0x00: sourceReg = &m_a0;
- // case 0x01: sourceReg = &m_a1;
- // default: break;
+ // case 0x00: sourceReg = &m_a0;
+ // case 0x01: sourceReg = &m_a1;
+ // default: break;
//}
-
+
switch (F1)
{
case 0x00: printf("UNIMPLEMENTED F1 operation @ PC 0x%04x\n", m_pc); break;
@@ -173,7 +173,7 @@ void dsp16_device::executeYFieldPost(const UINT8& Y)
case 0x03: opReg = &m_r3; break;
default: break;
}
-
+
const UINT8 lower = Y & 0x03;
switch (lower)
{
@@ -463,7 +463,7 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
const INT8 M = (op & 0x00ff);
const UINT8 R = (op & 0x0e00) >> 9;
void* reg = registerFromRImmediateField(R);
- writeRegister(reg, (INT16)M); // Sign extend 8 bit int
+ writeRegister(reg, (INT16)M); // Sign extend 8 bit int
cycles = 1;
pcAdvance = 1;
break;
@@ -480,14 +480,14 @@ void dsp16_device::execute_one(const UINT16& op, UINT8& cycles, UINT8& pcAdvance
// Do
m_cacheStart = m_pc + 1;
m_cacheEnd = m_pc + NI + 1;
- m_cacheIterations = K-1; // -1 because we check the counter below
+ m_cacheIterations = K-1; // -1 because we check the counter below
cycles = 1;
pcAdvance = 1;
}
else
{
// Redo
- m_cacheIterations = K-1; // -1 because we check the counter below
+ m_cacheIterations = K-1; // -1 because we check the counter below
m_cacheRedoNextPC = m_pc + 1;
m_pc = m_cacheStart;
pcAdvance = 0;
diff --git a/src/emu/cpu/dsp32/dsp32.c b/src/emu/cpu/dsp32/dsp32.c
index 8a097610c02..a0513000b51 100644
--- a/src/emu/cpu/dsp32/dsp32.c
+++ b/src/emu/cpu/dsp32/dsp32.c
@@ -66,7 +66,7 @@
// DEBUGGING
//**************************************************************************
-#define DETECT_MISALIGNED_MEMORY 0
+#define DETECT_MISALIGNED_MEMORY 0
@@ -75,35 +75,35 @@
//**************************************************************************
// internal register numbering for PIO registers
-#define PIO_PAR 0
-#define PIO_PDR 1
-#define PIO_EMR 2
-#define PIO_ESR 3
-#define PIO_PCR 4
-#define PIO_PIR 5
-#define PIO_PARE 6
-#define PIO_PDR2 7
-#define PIO_RESERVED 8
-
-#define UPPER (0x00ff << 8)
-#define LOWER (0xff00 << 8)
+#define PIO_PAR 0
+#define PIO_PDR 1
+#define PIO_EMR 2
+#define PIO_ESR 3
+#define PIO_PCR 4
+#define PIO_PIR 5
+#define PIO_PARE 6
+#define PIO_PDR2 7
+#define PIO_RESERVED 8
+
+#define UPPER (0x00ff << 8)
+#define LOWER (0xff00 << 8)
// bits in the PCR register
-#define PCR_RESET 0x001
-#define PCR_REGMAP 0x002
-#define PCR_ENI 0x004
-#define PCR_DMA 0x008
-#define PCR_AUTO 0x010
-#define PCR_PDFs 0x020
-#define PCR_PIFs 0x040
-#define PCR_RES 0x080
-#define PCR_DMA32 0x100
-#define PCR_PIO16 0x200
-#define PCR_FLG 0x400
+#define PCR_RESET 0x001
+#define PCR_REGMAP 0x002
+#define PCR_ENI 0x004
+#define PCR_DMA 0x008
+#define PCR_AUTO 0x010
+#define PCR_PDFs 0x020
+#define PCR_PIFs 0x040
+#define PCR_RES 0x080
+#define PCR_DMA32 0x100
+#define PCR_PIO16 0x200
+#define PCR_FLG 0x400
// internal flag bits
-#define UFLAGBIT 1
-#define VFLAGBIT 2
+#define UFLAGBIT 1
+#define VFLAGBIT 2
@@ -112,52 +112,52 @@
//**************************************************************************
// register mapping
-#define R0 m_r[0]
-#define R1 m_r[1]
-#define R2 m_r[2]
-#define R3 m_r[3]
-#define R4 m_r[4]
-#define R5 m_r[5]
-#define R6 m_r[6]
-#define R7 m_r[7]
-#define R8 m_r[8]
-#define R9 m_r[9]
-#define R10 m_r[10]
-#define R11 m_r[11]
-#define R12 m_r[12]
-#define R13 m_r[13]
-#define R14 m_r[14]
-#define PC m_r[15]
-#define R0_ALT m_r[16]
-#define R15 m_r[17]
-#define R16 m_r[18]
-#define R17 m_r[19]
-#define R18 m_r[20]
-#define R19 m_r[21]
-#define RMM m_r[22]
-#define RPP m_r[23]
-#define R20 m_r[24]
-#define R21 m_r[25]
-#define DAUC m_r[26]
-#define IOC m_r[27]
-#define R22 m_r[29]
-#define PCSH m_r[30]
-
-#define A0 m_a[0]
-#define A1 m_a[1]
-#define A2 m_a[2]
-#define A3 m_a[3]
-#define A_0 m_a[4]
-#define A_1 m_a[5]
-
-#define zFLAG ((m_nzcflags & 0xffffff) == 0)
-#define nFLAG ((m_nzcflags & 0x800000) != 0)
-#define cFLAG ((m_nzcflags & 0x1000000) != 0)
-#define vFLAG ((m_vflags & 0x800000) != 0)
-#define ZFLAG (m_NZflags == 0)
-#define NFLAG (m_NZflags < 0)
-#define UFLAG (m_VUflags & UFLAGBIT)
-#define VFLAG (m_VUflags & VFLAGBIT)
+#define R0 m_r[0]
+#define R1 m_r[1]
+#define R2 m_r[2]
+#define R3 m_r[3]
+#define R4 m_r[4]
+#define R5 m_r[5]
+#define R6 m_r[6]
+#define R7 m_r[7]
+#define R8 m_r[8]
+#define R9 m_r[9]
+#define R10 m_r[10]
+#define R11 m_r[11]
+#define R12 m_r[12]
+#define R13 m_r[13]
+#define R14 m_r[14]
+#define PC m_r[15]
+#define R0_ALT m_r[16]
+#define R15 m_r[17]
+#define R16 m_r[18]
+#define R17 m_r[19]
+#define R18 m_r[20]
+#define R19 m_r[21]
+#define RMM m_r[22]
+#define RPP m_r[23]
+#define R20 m_r[24]
+#define R21 m_r[25]
+#define DAUC m_r[26]
+#define IOC m_r[27]
+#define R22 m_r[29]
+#define PCSH m_r[30]
+
+#define A0 m_a[0]
+#define A1 m_a[1]
+#define A2 m_a[2]
+#define A3 m_a[3]
+#define A_0 m_a[4]
+#define A_1 m_a[5]
+
+#define zFLAG ((m_nzcflags & 0xffffff) == 0)
+#define nFLAG ((m_nzcflags & 0x800000) != 0)
+#define cFLAG ((m_nzcflags & 0x1000000) != 0)
+#define vFLAG ((m_vflags & 0x800000) != 0)
+#define ZFLAG (m_NZflags == 0)
+#define NFLAG (m_NZflags < 0)
+#define UFLAG (m_VUflags & UFLAGBIT)
+#define VFLAG (m_VUflags & VFLAGBIT)
@@ -173,37 +173,37 @@ const device_type DSP32C = &device_creator<dsp32c_device>;
dsp32c_device::dsp32c_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, DSP32C, "DSP32C", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 32, 24),
- m_pin(0),
- m_pout(0),
- m_ivtp(0),
- m_nzcflags(0),
- m_vflags(0),
- m_NZflags(0),
- m_VUflags(0),
- m_abuf_index(0),
- m_mbuf_index(0),
- m_par(0),
- m_pare(0),
- m_pdr(0),
- m_pdr2(0),
- m_pir(0),
- m_pcr(0),
- m_emr(0),
- m_esr(0),
- m_pcw(0),
- m_piop(0),
- m_ibuf(0),
- m_isr(0),
- m_obuf(0),
- m_osr(0),
- m_iotemp(0),
- m_lastp(0),
- m_icount(0),
- m_lastpins(0),
- m_ppc(0),
- m_program(NULL),
- m_direct(NULL)
+ m_program_config("program", ENDIANNESS_LITTLE, 32, 24),
+ m_pin(0),
+ m_pout(0),
+ m_ivtp(0),
+ m_nzcflags(0),
+ m_vflags(0),
+ m_NZflags(0),
+ m_VUflags(0),
+ m_abuf_index(0),
+ m_mbuf_index(0),
+ m_par(0),
+ m_pare(0),
+ m_pdr(0),
+ m_pdr2(0),
+ m_pir(0),
+ m_pcr(0),
+ m_emr(0),
+ m_esr(0),
+ m_pcw(0),
+ m_piop(0),
+ m_ibuf(0),
+ m_isr(0),
+ m_obuf(0),
+ m_osr(0),
+ m_iotemp(0),
+ m_lastp(0),
+ m_icount(0),
+ m_lastpins(0),
+ m_ppc(0),
+ m_program(NULL),
+ m_direct(NULL)
{
m_output_pins_changed = NULL;
@@ -387,7 +387,7 @@ void dsp32c_device::state_export(const device_state_entry &entry)
{
case STATE_GENFLAGS:
// no actual flags register, so just make something up
- m_iotemp = ((zFLAG != 0) << 0) |
+ m_iotemp = ((zFLAG != 0) << 0) |
((nFLAG != 0) << 1) |
((cFLAG != 0) << 2) |
((vFLAG != 0) << 3) |
@@ -421,12 +421,12 @@ void dsp32c_device::state_string_export(const device_state_entry &entry, astring
string.printf("%c%c%c%c%c%c%c%c",
NFLAG ? 'N':'.',
ZFLAG ? 'Z':'.',
- UFLAG ? 'U':'.',
- VFLAG ? 'V':'.',
- nFLAG ? 'n':'.',
- zFLAG ? 'z':'.',
- cFLAG ? 'c':'.',
- vFLAG ? 'v':'.');
+ UFLAG ? 'U':'.',
+ VFLAG ? 'V':'.',
+ nFLAG ? 'n':'.',
+ zFLAG ? 'z':'.',
+ cFLAG ? 'c':'.',
+ vFLAG ? 'v':'.');
break;
case DSP32_A0:
@@ -676,25 +676,25 @@ void dsp32c_device::execute_run()
const UINT32 dsp32c_device::s_regmap[4][16] =
{
- { // DSP32 compatible mode
+ { // DSP32 compatible mode
PIO_PAR|LOWER, PIO_PAR|UPPER, PIO_PDR|LOWER, PIO_PDR|UPPER,
PIO_EMR|LOWER, PIO_EMR|UPPER, PIO_ESR|LOWER, PIO_PCR|LOWER,
PIO_PIR|UPPER, PIO_PIR|UPPER, PIO_PIR|UPPER, PIO_PIR|UPPER,
PIO_PIR|UPPER, PIO_PIR|UPPER, PIO_PIR|UPPER, PIO_PIR|UPPER
},
- { // DSP32C 8-bit mode
+ { // DSP32C 8-bit mode
PIO_PAR|LOWER, PIO_PAR|UPPER, PIO_PDR|LOWER, PIO_PDR|UPPER,
PIO_EMR|LOWER, PIO_EMR|UPPER, PIO_ESR|LOWER, PIO_PCR|LOWER,
PIO_PIR|LOWER, PIO_PIR|UPPER, PIO_PCR|UPPER, PIO_PARE|LOWER,
PIO_PDR2|LOWER,PIO_PDR2|UPPER,PIO_RESERVED, PIO_RESERVED
},
- { // DSP32C illegal mode
+ { // DSP32C illegal mode
PIO_RESERVED, PIO_RESERVED, PIO_RESERVED, PIO_RESERVED,
PIO_RESERVED, PIO_RESERVED, PIO_RESERVED, PIO_RESERVED,
PIO_RESERVED, PIO_RESERVED, PIO_RESERVED, PIO_RESERVED,
PIO_RESERVED, PIO_RESERVED, PIO_RESERVED, PIO_RESERVED
},
- { // DSP32C 16-bit mode
+ { // DSP32C 16-bit mode
PIO_PAR, PIO_RESERVED, PIO_PDR, PIO_RESERVED,
PIO_EMR, PIO_RESERVED, PIO_ESR|LOWER, PIO_PCR,
PIO_PIR, PIO_RESERVED, PIO_RESERVED, PIO_PARE|LOWER,
@@ -905,7 +905,7 @@ int dsp32c_device::pio_r(int reg)
case PIO_PIR:
if (!(mask & 0xff00))
{
- update_pcr(m_pcr & ~PCR_PIFs); // clear PIFs
+ update_pcr(m_pcr & ~PCR_PIFs); // clear PIFs
update_pins();
}
result = m_pir;
diff --git a/src/emu/cpu/dsp32/dsp32.h b/src/emu/cpu/dsp32/dsp32.h
index 7d760cb1ebc..e419b46ef65 100644
--- a/src/emu/cpu/dsp32/dsp32.h
+++ b/src/emu/cpu/dsp32/dsp32.h
@@ -56,12 +56,12 @@
//**************************************************************************
// IRQ sources
-const int DSP32_IRQ0 = 0; // IRQ0
-const int DSP32_IRQ1 = 1; // IRQ1
+const int DSP32_IRQ0 = 0; // IRQ0
+const int DSP32_IRQ1 = 1; // IRQ1
// pin signal bits
-const int DSP32_OUTPUT_PIF = 0x01;
-const int DSP32_OUTPUT_PDF = 0x02;
+const int DSP32_OUTPUT_PIF = 0x01;
+const int DSP32_OUTPUT_PDF = 0x02;
// register enumeration
enum
@@ -132,7 +132,7 @@ class dsp32c_device;
struct dsp32_config
{
- void (*m_output_pins_changed)(dsp32c_device &device, UINT32 pins); // a change has occurred on an output pin
+ void (*m_output_pins_changed)(dsp32c_device &device, UINT32 pins); // a change has occurred on an output pin
};
@@ -140,7 +140,7 @@ struct dsp32_config
// ======================> dsp32c_device
class dsp32c_device : public cpu_device,
- public dsp32_config
+ public dsp32_config
{
public:
// construction/destruction
@@ -423,54 +423,54 @@ protected:
void dma_store();
// configuration
- const address_space_config m_program_config;
+ const address_space_config m_program_config;
// internal state
- UINT32 m_r[32];
- UINT32 m_pin, m_pout;
- UINT32 m_ivtp;
- UINT32 m_nzcflags;
- UINT32 m_vflags;
-
- double m_a[6];
- double m_NZflags;
- UINT8 m_VUflags;
-
- double m_abuf[4];
- UINT8 m_abufreg[4];
- UINT8 m_abufVUflags[4];
- UINT8 m_abufNZflags[4];
- int m_abufcycle[4];
- int m_abuf_index;
-
- INT32 m_mbufaddr[4];
- UINT32 m_mbufdata[4];
- int m_mbuf_index;
-
- UINT16 m_par;
- UINT8 m_pare;
- UINT16 m_pdr;
- UINT16 m_pdr2;
- UINT16 m_pir;
- UINT16 m_pcr;
- UINT16 m_emr;
- UINT8 m_esr;
- UINT16 m_pcw;
- UINT8 m_piop;
-
- UINT32 m_ibuf;
- UINT32 m_isr;
- UINT32 m_obuf;
- UINT32 m_osr;
-
- UINT32 m_iotemp;
+ UINT32 m_r[32];
+ UINT32 m_pin, m_pout;
+ UINT32 m_ivtp;
+ UINT32 m_nzcflags;
+ UINT32 m_vflags;
+
+ double m_a[6];
+ double m_NZflags;
+ UINT8 m_VUflags;
+
+ double m_abuf[4];
+ UINT8 m_abufreg[4];
+ UINT8 m_abufVUflags[4];
+ UINT8 m_abufNZflags[4];
+ int m_abufcycle[4];
+ int m_abuf_index;
+
+ INT32 m_mbufaddr[4];
+ UINT32 m_mbufdata[4];
+ int m_mbuf_index;
+
+ UINT16 m_par;
+ UINT8 m_pare;
+ UINT16 m_pdr;
+ UINT16 m_pdr2;
+ UINT16 m_pir;
+ UINT16 m_pcr;
+ UINT16 m_emr;
+ UINT8 m_esr;
+ UINT16 m_pcw;
+ UINT8 m_piop;
+
+ UINT32 m_ibuf;
+ UINT32 m_isr;
+ UINT32 m_obuf;
+ UINT32 m_osr;
+
+ UINT32 m_iotemp;
// internal stuff
- int m_lastp;
- int m_icount;
- UINT8 m_lastpins;
- UINT32 m_ppc;
- address_space * m_program;
+ int m_lastp;
+ int m_icount;
+ UINT8 m_lastpins;
+ UINT32 m_ppc;
+ address_space * m_program;
direct_read_data *m_direct;
// tables
diff --git a/src/emu/cpu/dsp32/dsp32dis.c b/src/emu/cpu/dsp32/dsp32dis.c
index 80d0c2ea11a..42ff3bb1505 100644
--- a/src/emu/cpu/dsp32/dsp32dis.c
+++ b/src/emu/cpu/dsp32/dsp32dis.c
@@ -131,18 +131,18 @@ static const char *dasm_XYZ(UINT8 bits, char *buffer)
if (p)
{
- if (p == 15) p = lastp; /* P=15 means Z inherits from Y, Y inherits from X */
+ if (p == 15) p = lastp; /* P=15 means Z inherits from Y, Y inherits from X */
lastp = p;
switch (i)
{
- case 0: sprintf(buffer, "*r%d", p); break;
+ case 0: sprintf(buffer, "*r%d", p); break;
case 1:
case 2:
case 3:
case 4:
- case 5: sprintf(buffer, "*r%d++r%d", p, i + 14); break;
- case 6: sprintf(buffer, "*r%d--", p); break;
- case 7: sprintf(buffer, "*r%d++", p); break;
+ case 5: sprintf(buffer, "*r%d++r%d", p, i + 14); break;
+ case 6: sprintf(buffer, "*r%d--", p); break;
+ case 7: sprintf(buffer, "*r%d++", p); break;
}
}
else
@@ -152,11 +152,11 @@ static const char *dasm_XYZ(UINT8 bits, char *buffer)
case 0:
case 1:
case 2:
- case 3: sprintf(buffer, "a%d", i); break;
- case 4: sprintf(buffer, "ibuf"); break;
- case 5: sprintf(buffer, "obuf"); break;
- case 6: sprintf(buffer, "pdr"); break;
- case 7: buffer[0] = 0; break;
+ case 3: sprintf(buffer, "a%d", i); break;
+ case 4: sprintf(buffer, "ibuf"); break;
+ case 5: sprintf(buffer, "obuf"); break;
+ case 6: sprintf(buffer, "pdr"); break;
+ case 7: buffer[0] = 0; break;
}
}
return buffer;
@@ -173,24 +173,24 @@ static const char *dasm_PI(UINT16 bits, char *buffer)
switch (i)
{
case 0:
- case 16: sprintf(buffer, "*%s", regname[p]); break;
- case 22: sprintf(buffer, "*%s--", regname[p]); break;
- case 23: sprintf(buffer, "*%s++", regname[p]); break;
- default: sprintf(buffer, "*%s++%s", regname[p], regname[i]); break;
+ case 16: sprintf(buffer, "*%s", regname[p]); break;
+ case 22: sprintf(buffer, "*%s--", regname[p]); break;
+ case 23: sprintf(buffer, "*%s++", regname[p]); break;
+ default: sprintf(buffer, "*%s++%s", regname[p], regname[i]); break;
}
}
else
{
switch (i)
{
- case 4: sprintf(buffer, "ibuf"); break;
- case 5: sprintf(buffer, "obuf"); break;
- case 6: sprintf(buffer, "pdr"); break;
- case 14: sprintf(buffer, "piop"); break;
- case 20: sprintf(buffer, "pdr2"); break;
- case 22: sprintf(buffer, "pir"); break;
- case 30: sprintf(buffer, "pcw"); break;
- default: sprintf(buffer, "????"); break;
+ case 4: sprintf(buffer, "ibuf"); break;
+ case 5: sprintf(buffer, "obuf"); break;
+ case 6: sprintf(buffer, "pdr"); break;
+ case 14: sprintf(buffer, "piop"); break;
+ case 20: sprintf(buffer, "pdr2"); break;
+ case 22: sprintf(buffer, "pir"); break;
+ case 30: sprintf(buffer, "pcw"); break;
+ default: sprintf(buffer, "????"); break;
}
}
return buffer;
@@ -204,9 +204,9 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
switch (op >> 25)
{
/* DA format 1 */
- case 0x10: case 0x11: case 0x12: case 0x13:
- case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b:
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
{
const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]);
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
@@ -235,9 +235,9 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* DA format 2 */
- case 0x20: case 0x21: case 0x22: case 0x23:
- case 0x24: case 0x25: case 0x26: case 0x27:
- case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x20: case 0x21: case 0x22: case 0x23:
+ case 0x24: case 0x25: case 0x26: case 0x27:
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
{
const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]);
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
@@ -263,9 +263,9 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* DA format 3 */
- case 0x30: case 0x31: case 0x32: case 0x33:
- case 0x34: case 0x35: case 0x36: case 0x37:
- case 0x38: case 0x39: case 0x3a: case 0x3b:
+ case 0x30: case 0x31: case 0x32: case 0x33:
+ case 0x34: case 0x35: case 0x36: case 0x37:
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
{
const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]);
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
@@ -291,7 +291,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* DA format 4 */
- case 0x1c: case 0x1d:
+ case 0x1c: case 0x1d:
{
const char *X = dasm_XYZ((op >> 14) & 0x7f, tempbuf[0]);
const char *Y = dasm_XYZ((op >> 7) & 0x7f, tempbuf[1]);
@@ -306,22 +306,22 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* DA format 5 */
- case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ case 0x3c: case 0x3d: case 0x3e: case 0x3f:
if ((op & 0x7f) == 7)
sprintf(buffer, "a%d = %s(%s)",
- (op >> 21) & 3, // aN
- functable[(op >> 23) & 15], // G
- dasm_XYZ((op >> 7) & 0x7f, tempbuf[0])); // Y
+ (op >> 21) & 3, // aN
+ functable[(op >> 23) & 15], // G
+ dasm_XYZ((op >> 7) & 0x7f, tempbuf[0])); // Y
else
sprintf(buffer, "%s = a%d = %s(%s)",
- dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]), // Z
- (op >> 21) & 3, // aN
- functable[(op >> 23) & 15], // G
- dasm_XYZ((op >> 7) & 0x7f, tempbuf[0])); // Y
+ dasm_XYZ((op >> 0) & 0x7f, tempbuf[2]), // Z
+ (op >> 21) & 3, // aN
+ functable[(op >> 23) & 15], // G
+ dasm_XYZ((op >> 7) & 0x7f, tempbuf[0])); // Y
break;
/* CA formats 0/1 */
- case 0x00: case 0x01: case 0x02: case 0x03:
+ case 0x00: case 0x01: case 0x02: case 0x03:
{
const char *rH = regname[(op >> 16) & 0x1f];
UINT8 C = (op >> 21) & 0x3f;
@@ -365,7 +365,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* CA format 3a */
- case 0x06: case 0x07:
+ case 0x06: case 0x07:
{
const char *rH = regname[(op >> 16) & 0x1f];
const char *rM = regname[(op >> 21) & 0x1f];
@@ -403,7 +403,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
break;
/* CA format 4 */
- case 0x08: case 0x09:
+ case 0x08: case 0x09:
{
const char *rH = regname[(op >> 16) & 0x1f];
const char *rM = regname[(op >> 21) & 0x1f];
@@ -422,8 +422,8 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* CA format 5a/5b */
- case 0x0a: case 0x0b:
- case 0x4a: case 0x4b:
+ case 0x0a: case 0x0b:
+ case 0x4a: case 0x4b:
{
const char *rD = regname[(op >> 21) & 0x1f];
const char *rH = regname[(op >> 16) & 0x1f];
@@ -439,7 +439,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* CA format 6a/6b */
- case 0x0c: case 0x4c:
+ case 0x0c: case 0x4c:
{
const char *rD = regname[(op >> 16) & 0x1f];
const char *rS1 = regname[(op >> 5) & 0x1f];
@@ -566,7 +566,7 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* CA format 6c/6d */
- case 0x0d: case 0x4d:
+ case 0x0d: case 0x4d:
{
const char *rD = regname[(op >> 16) & 0x1f];
const char *s = sizesuffix[(op >> 31) & 1];
@@ -640,10 +640,10 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
break;
/* CA format 8a */
- case 0x50: case 0x51: case 0x52: case 0x53:
- case 0x54: case 0x55: case 0x56: case 0x57:
- case 0x58: case 0x59: case 0x5a: case 0x5b:
- case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ case 0x50: case 0x51: case 0x52: case 0x53:
+ case 0x54: case 0x55: case 0x56: case 0x57:
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f:
{
INT32 N = (op & 0xffff) | ((INT32)((op & 0x1fe00000) << 3) >> 8);
const char *rH = regname[(op >> 16) & 0x1f];
@@ -664,10 +664,10 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* CA format 8b */
- case 0x60: case 0x61: case 0x62: case 0x63:
- case 0x64: case 0x65: case 0x66: case 0x67:
- case 0x68: case 0x69: case 0x6a: case 0x6b:
- case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x65: case 0x66: case 0x67:
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f:
{
INT32 immed = (op & 0xffff) | ((INT32)((op & 0x1fe00000) << 3) >> 8);
sprintf(buffer, "%s = $%x", regnamee[(op >> 16) & 0x1f], immed & 0xffffff);
@@ -675,10 +675,10 @@ static unsigned dasm_dsp32(char *buffer, unsigned pc, UINT32 op)
}
/* CA format 8c */
- case 0x70: case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- case 0x78: case 0x79: case 0x7a: case 0x7b:
- case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f:
{
INT32 N = (op & 0xffff) | ((INT32)((op & 0x1fe00000) << 3) >> 8);
const char *rM = regname[(op >> 16) & 0x1f];
diff --git a/src/emu/cpu/dsp32/dsp32ops.c b/src/emu/cpu/dsp32/dsp32ops.c
index 644a1473904..e825ee99ac4 100644
--- a/src/emu/cpu/dsp32/dsp32ops.c
+++ b/src/emu/cpu/dsp32/dsp32ops.c
@@ -43,15 +43,15 @@
//**************************************************************************
// these defined latencies are a pain to implement, but are necessary
-#define EMULATE_MEMORY_LATENCY (1)
-#define EMULATE_MULTIPLIER_LATENCY (1)
-#define EMULATE_AFLAGS_LATENCY (1)
+#define EMULATE_MEMORY_LATENCY (1)
+#define EMULATE_MULTIPLIER_LATENCY (1)
+#define EMULATE_AFLAGS_LATENCY (1)
// these optimizations should have some effect, but they don't really, so
// leave them off
-#define IGNORE_DAU_UV_FLAGS (0)
-#define ASSUME_WRITEABLE (0)
-#define ASSUME_UNCONDITIONAL_CAU (0)
+#define IGNORE_DAU_UV_FLAGS (0)
+#define ASSUME_WRITEABLE (0)
+#define ASSUME_UNCONDITIONAL_CAU (0)
@@ -59,65 +59,65 @@
// MACROS
//**************************************************************************
-#define SET_V_16(a,b,r) m_vflags = (((a) ^ (b) ^ (r) ^ ((r) >> 1)) << 8)
-#define SET_NZC_16(r) m_nzcflags = ((r) << 8)
-#define SET_NZCV_16(a,b,r) SET_NZC_16(r); SET_V_16(a,b,r)
-#define SET_NZ00_16(r) m_nzcflags = (((r) << 8) & 0xffffff); m_vflags = 0
+#define SET_V_16(a,b,r) m_vflags = (((a) ^ (b) ^ (r) ^ ((r) >> 1)) << 8)
+#define SET_NZC_16(r) m_nzcflags = ((r) << 8)
+#define SET_NZCV_16(a,b,r) SET_NZC_16(r); SET_V_16(a,b,r)
+#define SET_NZ00_16(r) m_nzcflags = (((r) << 8) & 0xffffff); m_vflags = 0
-#define SET_V_24(a,b,r) m_vflags = ((a) ^ (b) ^ (r) ^ ((r) >> 1))
-#define SET_NZC_24(r) m_nzcflags = (r)
-#define SET_NZCV_24(a,b,r) SET_NZC_24(r); SET_V_24(a,b,r)
-#define SET_NZ00_24(r) m_nzcflags = ((r) & 0xffffff); m_vflags = 0
+#define SET_V_24(a,b,r) m_vflags = ((a) ^ (b) ^ (r) ^ ((r) >> 1))
+#define SET_NZC_24(r) m_nzcflags = (r)
+#define SET_NZCV_24(a,b,r) SET_NZC_24(r); SET_V_24(a,b,r)
+#define SET_NZ00_24(r) m_nzcflags = ((r) & 0xffffff); m_vflags = 0
-#define TRUNCATE24(a) ((a) & 0xffffff)
-#define EXTEND16_TO_24(a) TRUNCATE24((INT32)(INT16)(a))
-#define REG16(a) ((UINT16)m_r[a])
-#define REG24(a) (m_r[a])
+#define TRUNCATE24(a) ((a) & 0xffffff)
+#define EXTEND16_TO_24(a) TRUNCATE24((INT32)(INT16)(a))
+#define REG16(a) ((UINT16)m_r[a])
+#define REG24(a) (m_r[a])
-#define WRITEABLE_REGS (0x6f3efffe)
+#define WRITEABLE_REGS (0x6f3efffe)
#if ASSUME_WRITEABLE
-#define IS_WRITEABLE(r) (1)
+#define IS_WRITEABLE(r) (1)
#else
-#define IS_WRITEABLE(r) (WRITEABLE_REGS & (1 << (r)))
+#define IS_WRITEABLE(r) (WRITEABLE_REGS & (1 << (r)))
#endif
#if ASSUME_UNCONDITIONAL_CAU
-#define CONDITION_IS_TRUE() (1)
+#define CONDITION_IS_TRUE() (1)
#else
-#define CONDITION_IS_TRUE() (!(op & 0x400) || (condition((op >> 12) & 15)))
+#define CONDITION_IS_TRUE() (!(op & 0x400) || (condition((op >> 12) & 15)))
#endif
#if EMULATE_MEMORY_LATENCY
-#define WWORD_DEFERRED(a,v) do { int bufidx = m_mbuf_index & 3; m_mbufaddr[bufidx] = -(a); m_mbufdata[bufidx] = (v); } while (0)
-#define WLONG_DEFERRED(a,v) do { int bufidx = m_mbuf_index & 3; m_mbufaddr[bufidx] = (a); m_mbufdata[bufidx] = (v); } while (0)
-#define PROCESS_DEFERRED_MEMORY() \
- if (m_mbufaddr[++m_mbuf_index & 3] != 1) \
- { \
- int bufidx = m_mbuf_index & 3; \
- if (m_mbufaddr[bufidx] >= 0) \
- WLONG(m_mbufaddr[bufidx], m_mbufdata[bufidx]); \
- else \
- WWORD(-m_mbufaddr[bufidx], m_mbufdata[bufidx]); \
- m_mbufaddr[bufidx] = 1; \
+#define WWORD_DEFERRED(a,v) do { int bufidx = m_mbuf_index & 3; m_mbufaddr[bufidx] = -(a); m_mbufdata[bufidx] = (v); } while (0)
+#define WLONG_DEFERRED(a,v) do { int bufidx = m_mbuf_index & 3; m_mbufaddr[bufidx] = (a); m_mbufdata[bufidx] = (v); } while (0)
+#define PROCESS_DEFERRED_MEMORY() \
+ if (m_mbufaddr[++m_mbuf_index & 3] != 1) \
+ { \
+ int bufidx = m_mbuf_index & 3; \
+ if (m_mbufaddr[bufidx] >= 0) \
+ WLONG(m_mbufaddr[bufidx], m_mbufdata[bufidx]); \
+ else \
+ WWORD(-m_mbufaddr[bufidx], m_mbufdata[bufidx]); \
+ m_mbufaddr[bufidx] = 1; \
}
#else
-#define WWORD_DEFERRED(a,v) WWORD(a,v)
-#define WLONG_DEFERRED(a,v) WLONG(a,v)
+#define WWORD_DEFERRED(a,v) WWORD(a,v)
+#define WLONG_DEFERRED(a,v) WLONG(a,v)
#define PROCESS_DEFERRED_MEMORY()
#endif
#if EMULATE_MULTIPLIER_LATENCY
-#define DEFERRED_MULTIPLIER(x) dau_get_amult(x)
+#define DEFERRED_MULTIPLIER(x) dau_get_amult(x)
#else
-#define DEFERRED_MULTIPLIER(x) m_a[x]
+#define DEFERRED_MULTIPLIER(x) m_a[x]
#endif
#if EMULATE_AFLAGS_LATENCY
-#define DEFERRED_NZFLAGS() dau_get_anzflags()
-#define DEFERRED_VUFLAGS() dau_get_avuflags()
+#define DEFERRED_NZFLAGS() dau_get_anzflags()
+#define DEFERRED_VUFLAGS() dau_get_avuflags()
#else
-#define DEFERRED_NZFLAGS() m_NZflags
-#define DEFERRED_VUFLAGS() m_VUflags
+#define DEFERRED_NZFLAGS() m_NZflags
+#define DEFERRED_VUFLAGS() m_VUflags
#endif
@@ -145,7 +145,7 @@ void dsp32c_device::illegal(UINT32 op)
void dsp32c_device::unimplemented(UINT32 op)
{
- fatalerror("Unimplemented op @ %06X: %08X (dis=%02X, tbl=%03X)\n", PC - 4, op, op >> 25, op >> 21);
+ fatalerror("Unimplemented op @ %06X: %08X (dis=%02X, tbl=%03X)\n", PC - 4, op, op >> 25, op >> 21);
}
@@ -156,7 +156,7 @@ inline void dsp32c_device::execute_one()
PROCESS_DEFERRED_MEMORY();
debugger_instruction_hook(this, PC);
op = ROPCODE(PC);
- m_icount -= 4; // 4 clocks per cycle
+ m_icount -= 4; // 4 clocks per cycle
PC += 4;
if (op)
(this->*s_dsp32ops[op >> 21])(op);
@@ -172,14 +172,14 @@ UINT32 dsp32c_device::cau_read_pi_special(UINT8 i)
{
switch (i)
{
- case 4: return m_ibuf;
- case 5: return m_obuf;
- case 6: update_pcr(m_pcr & ~PCR_PDFs); update_pins(); return m_pdr;
- case 14: return m_piop;
- case 20: return m_pdr2;
- case 22: update_pcr(m_pcr & ~PCR_PIFs); update_pins(); return m_pir;
- case 30: return m_pcw;
- default: fprintf(stderr, "Unimplemented CAU PI read = %X\n", i);
+ case 4: return m_ibuf;
+ case 5: return m_obuf;
+ case 6: update_pcr(m_pcr & ~PCR_PDFs); update_pins(); return m_pdr;
+ case 14: return m_piop;
+ case 20: return m_pdr2;
+ case 22: update_pcr(m_pcr & ~PCR_PIFs); update_pins(); return m_pir;
+ case 30: return m_pcw;
+ default: fprintf(stderr, "Unimplemented CAU PI read = %X\n", i);
}
return 0;
}
@@ -189,14 +189,14 @@ void dsp32c_device::cau_write_pi_special(UINT8 i, UINT32 val)
{
switch (i)
{
- case 4: m_ibuf = val; break;
- case 5: m_obuf = val; break;
- case 6: m_pdr = val; update_pcr(m_pcr | PCR_PDFs); update_pins(); break;
- case 14: m_piop = val; break;
- case 20: m_pdr2 = val; break;
- case 22: m_pir = val; update_pcr(m_pcr | PCR_PIFs); update_pins(); break;
- case 30: m_pcw = val; break;
- default: fprintf(stderr, "Unimplemented CAU PI write = %X\n", i);
+ case 4: m_ibuf = val; break;
+ case 5: m_obuf = val; break;
+ case 6: m_pdr = val; update_pcr(m_pcr | PCR_PDFs); update_pins(); break;
+ case 14: m_piop = val; break;
+ case 20: m_pdr2 = val; break;
+ case 22: m_pir = val; update_pcr(m_pcr | PCR_PIFs); update_pins(); break;
+ case 30: m_pcw = val; break;
+ default: fprintf(stderr, "Unimplemented CAU PI write = %X\n", i);
}
}
@@ -449,14 +449,14 @@ inline UINT32 dsp32c_device::double_to_dsp(double val)
double dsp32c_device::dau_read_pi_special(int i)
{
- fatalerror("Unimplemented dau_read_pi_special(%d)\n", i);
+ fatalerror("Unimplemented dau_read_pi_special(%d)\n", i);
return 0;
}
void dsp32c_device::dau_write_pi_special(int i, double val)
{
- fatalerror("Unimplemented dau_write_pi_special(%d)\n", i);
+ fatalerror("Unimplemented dau_write_pi_special(%d)\n", i);
}
@@ -487,7 +487,7 @@ inline double dsp32c_device::dau_read_pi_double_2nd(int pi, int multiplier, doub
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
- if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
+ if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
m_lastp = p;
if (p)
{
@@ -555,7 +555,7 @@ inline void dsp32c_device::dau_write_pi_double(int pi, double val)
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
- if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
+ if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
if (p)
{
WLONG_DEFERRED(m_r[p], double_to_dsp(val));
@@ -576,7 +576,7 @@ inline void dsp32c_device::dau_write_pi_4bytes(int pi, UINT32 val)
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
- if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
+ if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
if (p)
{
m_lastp = p;
@@ -598,7 +598,7 @@ inline void dsp32c_device::dau_write_pi_2bytes(int pi, UINT16 val)
int p = (pi >> 3) & 15;
int i = (pi >> 0) & 7;
- if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
+ if (p == 15) p = m_lastp; // P=15 means Z inherits from Y, Y inherits from X
if (p)
{
m_lastp = p;
@@ -679,24 +679,24 @@ int dsp32c_device::condition(int cond)
case 25:
return (DEFERRED_NZFLAGS() <= 0);
- case 32: // !ibf
- case 33: // ibf
- case 34: // !obe
- case 35: // obe
- case 36: // !pdf
- case 37: // pdf
- case 38: // !pif
- case 39: // pif
- case 40: // !sy
- case 41: // sy
- case 42: // !fb
- case 43: // fb
- case 44: // !ireq1
- case 45: // ireq1
- case 46: // !ireq2
- case 47: // ireq2
+ case 32: // !ibf
+ case 33: // ibf
+ case 34: // !obe
+ case 35: // obe
+ case 36: // !pdf
+ case 37: // pdf
+ case 38: // !pif
+ case 39: // pif
+ case 40: // !sy
+ case 41: // sy
+ case 42: // !fb
+ case 43: // fb
+ case 44: // !ireq1
+ case 45: // ireq1
+ case 46: // !ireq2
+ case 47: // ireq2
default:
- fatalerror("Unimplemented condition: %X\n", cond);
+ fatalerror("Unimplemented condition: %X\n", cond);
}
}
#endif
@@ -2513,293 +2513,293 @@ void dsp32c_device::d5_seed(UINT32 op)
void (dsp32c_device::*const dsp32c_device::s_dsp32ops[])(UINT32 op) =
{
- &dsp32c_device::nop, &dsp32c_device::goto_t, &dsp32c_device::goto_pl, &dsp32c_device::goto_mi, &dsp32c_device::goto_ne, &dsp32c_device::goto_eq, &dsp32c_device::goto_vc, &dsp32c_device::goto_vs, // 00
- &dsp32c_device::goto_cc, &dsp32c_device::goto_cs, &dsp32c_device::goto_ge, &dsp32c_device::goto_lt, &dsp32c_device::goto_gt, &dsp32c_device::goto_le, &dsp32c_device::goto_hi, &dsp32c_device::goto_ls,
- &dsp32c_device::goto_auc, &dsp32c_device::goto_aus, &dsp32c_device::goto_age, &dsp32c_device::goto_alt, &dsp32c_device::goto_ane, &dsp32c_device::goto_aeq, &dsp32c_device::goto_avc, &dsp32c_device::goto_avs, // 01
- &dsp32c_device::goto_agt, &dsp32c_device::goto_ale, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::goto_ibe, &dsp32c_device::goto_ibf, &dsp32c_device::goto_obf, &dsp32c_device::goto_obe, &dsp32c_device::goto_pde, &dsp32c_device::goto_pdf, &dsp32c_device::goto_pie, &dsp32c_device::goto_pif, // 02
- &dsp32c_device::goto_syc, &dsp32c_device::goto_sys, &dsp32c_device::goto_fbc, &dsp32c_device::goto_fbs, &dsp32c_device::goto_irq1lo,&dsp32c_device::goto_irq1hi,&dsp32c_device::goto_irq2lo,&dsp32c_device::goto_irq2hi,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 03
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
-
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 04
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 05
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, // 06
- &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto,
- &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, // 07
- &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto,
-
- &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, // 08
- &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call,
- &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, // 09
- &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call,
- &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, // 0a
- &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si,
- &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, // 0b
- &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si,
-
- &dsp32c_device::add_ss, &dsp32c_device::mul2_s, &dsp32c_device::subr_ss, &dsp32c_device::addr_ss, &dsp32c_device::sub_ss, &dsp32c_device::neg_s, &dsp32c_device::andc_ss, &dsp32c_device::cmp_ss, // 0c
- &dsp32c_device::xor_ss, &dsp32c_device::rcr_s, &dsp32c_device::or_ss, &dsp32c_device::rcl_s, &dsp32c_device::shr_s, &dsp32c_device::div2_s, &dsp32c_device::and_ss, &dsp32c_device::test_ss,
- &dsp32c_device::add_di, &dsp32c_device::illegal, &dsp32c_device::subr_di, &dsp32c_device::addr_di, &dsp32c_device::sub_di, &dsp32c_device::illegal, &dsp32c_device::andc_di, &dsp32c_device::cmp_di, // 0d
- &dsp32c_device::xor_di, &dsp32c_device::illegal, &dsp32c_device::or_di, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::and_di, &dsp32c_device::test_di,
- &dsp32c_device::load_hi, &dsp32c_device::load_hi, &dsp32c_device::load_li, &dsp32c_device::load_li, &dsp32c_device::load_i, &dsp32c_device::load_i, &dsp32c_device::load_ei, &dsp32c_device::load_ei, // 0e
- &dsp32c_device::store_hi, &dsp32c_device::store_hi, &dsp32c_device::store_li, &dsp32c_device::store_li, &dsp32c_device::store_i, &dsp32c_device::store_i, &dsp32c_device::store_ei, &dsp32c_device::store_ei,
- &dsp32c_device::load_hr, &dsp32c_device::load_hr, &dsp32c_device::load_lr, &dsp32c_device::load_lr, &dsp32c_device::load_r, &dsp32c_device::load_r, &dsp32c_device::load_er, &dsp32c_device::load_er, // 0f
- &dsp32c_device::store_hr, &dsp32c_device::store_hr, &dsp32c_device::store_lr, &dsp32c_device::store_lr, &dsp32c_device::store_r, &dsp32c_device::store_r, &dsp32c_device::store_er, &dsp32c_device::store_er,
-
- &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 10
- &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
- &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 11
- &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
- &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 12
- &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
- &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 13
- &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
-
- &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 14
- &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
- &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 15
- &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
- &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 16
- &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
- &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 17
- &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
-
- &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, // 18
- &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx,
- &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 19
- &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
- &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pm, &dsp32c_device::d1_1pm, &dsp32c_device::d1_1pm, &dsp32c_device::d1_1pm, // 1a
- &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mm, &dsp32c_device::d1_1mm, &dsp32c_device::d1_1mm, &dsp32c_device::d1_1mm,
- &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 1b
- &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
-
- &dsp32c_device::d4_pp, &dsp32c_device::d4_pp, &dsp32c_device::d4_pp, &dsp32c_device::d4_pp, &dsp32c_device::d4_pm, &dsp32c_device::d4_pm, &dsp32c_device::d4_pm, &dsp32c_device::d4_pm, // 1c
- &dsp32c_device::d4_mp, &dsp32c_device::d4_mp, &dsp32c_device::d4_mp, &dsp32c_device::d4_mp, &dsp32c_device::d4_mm, &dsp32c_device::d4_mm, &dsp32c_device::d4_mm, &dsp32c_device::d4_mm,
- &dsp32c_device::d4_ppr, &dsp32c_device::d4_ppr, &dsp32c_device::d4_ppr, &dsp32c_device::d4_ppr, &dsp32c_device::d4_pmr, &dsp32c_device::d4_pmr, &dsp32c_device::d4_pmr, &dsp32c_device::d4_pmr, // 1d
- &dsp32c_device::d4_mpr, &dsp32c_device::d4_mpr, &dsp32c_device::d4_mpr, &dsp32c_device::d4_mpr, &dsp32c_device::d4_mmr, &dsp32c_device::d4_mmr, &dsp32c_device::d4_mmr, &dsp32c_device::d4_mmr,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 1e
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 1f
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
-
- &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 20
- &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
- &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 21
- &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
- &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 22
- &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
- &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 23
- &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
-
- &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 24
- &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
- &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 25
- &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
- &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 26
- &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
- &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 27
- &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
-
- &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 28
- &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
- &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 29
- &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
- &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 2a
- &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
- &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 2b
- &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
-
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2c
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2d
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2e
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2f
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
-
- &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 30
- &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
- &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 31
- &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
- &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 32
- &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
- &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 33
- &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
-
- &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 34
- &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
- &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 35
- &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
- &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 36
- &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
- &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 37
- &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
-
- &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 38
- &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
- &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 39
- &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
- &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 3a
- &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
- &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 3b
- &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
-
- &dsp32c_device::d5_ic, &dsp32c_device::d5_ic, &dsp32c_device::d5_ic, &dsp32c_device::d5_ic, &dsp32c_device::d5_oc, &dsp32c_device::d5_oc, &dsp32c_device::d5_oc, &dsp32c_device::d5_oc, // 3c
- &dsp32c_device::d5_float, &dsp32c_device::d5_float, &dsp32c_device::d5_float, &dsp32c_device::d5_float, &dsp32c_device::d5_int, &dsp32c_device::d5_int, &dsp32c_device::d5_int, &dsp32c_device::d5_int,
- &dsp32c_device::d5_round, &dsp32c_device::d5_round, &dsp32c_device::d5_round, &dsp32c_device::d5_round, &dsp32c_device::d5_ifalt, &dsp32c_device::d5_ifalt, &dsp32c_device::d5_ifalt, &dsp32c_device::d5_ifalt, // 3d
- &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifagt, &dsp32c_device::d5_ifagt, &dsp32c_device::d5_ifagt, &dsp32c_device::d5_ifagt,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 3e
- &dsp32c_device::d5_float24, &dsp32c_device::d5_float24, &dsp32c_device::d5_float24, &dsp32c_device::d5_float24, &dsp32c_device::d5_int24, &dsp32c_device::d5_int24, &dsp32c_device::d5_int24, &dsp32c_device::d5_int24,
- &dsp32c_device::d5_ieee, &dsp32c_device::d5_ieee, &dsp32c_device::d5_ieee, &dsp32c_device::d5_ieee, &dsp32c_device::d5_dsp, &dsp32c_device::d5_dsp, &dsp32c_device::d5_dsp, &dsp32c_device::d5_dsp, // 3f
- &dsp32c_device::d5_seed, &dsp32c_device::d5_seed, &dsp32c_device::d5_seed, &dsp32c_device::d5_seed, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
-
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 40
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 41
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 42
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 43
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
-
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 44
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 45
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::do_i, &dsp32c_device::do_r, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 46
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 47
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
-
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 48
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 49
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, // 4a
- &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si,
- &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, // 4b
- &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si,
-
- &dsp32c_device::adde_ss, &dsp32c_device::mul2e_s, &dsp32c_device::subre_ss, &dsp32c_device::addre_ss, &dsp32c_device::sube_ss, &dsp32c_device::nege_s, &dsp32c_device::andce_ss, &dsp32c_device::cmpe_ss, // 4c
- &dsp32c_device::xore_ss, &dsp32c_device::rcre_s, &dsp32c_device::ore_ss, &dsp32c_device::rcle_s, &dsp32c_device::shre_s, &dsp32c_device::div2e_s, &dsp32c_device::ande_ss, &dsp32c_device::teste_ss,
- &dsp32c_device::adde_di, &dsp32c_device::illegal, &dsp32c_device::subre_di, &dsp32c_device::addre_di, &dsp32c_device::sube_di, &dsp32c_device::illegal, &dsp32c_device::andce_di, &dsp32c_device::cmpe_di, // 4d
- &dsp32c_device::xore_di, &dsp32c_device::illegal, &dsp32c_device::ore_di, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::ande_di, &dsp32c_device::teste_di,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 4e
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 4f
- &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
-
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 50
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 51
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 52
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 53
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
-
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 54
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 55
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 56
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 57
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
-
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 58
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 59
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5a
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5b
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
-
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5c
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5d
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5e
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5f
- &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
-
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 60
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 61
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 62
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 63
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
-
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 64
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 65
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 66
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 67
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
-
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 68
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 69
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6a
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6b
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
-
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6c
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6d
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6e
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6f
- &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
-
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 70
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 71
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 72
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 73
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
-
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 74
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 75
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 76
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 77
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
-
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 78
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 79
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7a
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7b
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
-
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7c
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7d
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7e
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7f
- &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24
+ &dsp32c_device::nop, &dsp32c_device::goto_t, &dsp32c_device::goto_pl, &dsp32c_device::goto_mi, &dsp32c_device::goto_ne, &dsp32c_device::goto_eq, &dsp32c_device::goto_vc, &dsp32c_device::goto_vs, // 00
+ &dsp32c_device::goto_cc, &dsp32c_device::goto_cs, &dsp32c_device::goto_ge, &dsp32c_device::goto_lt, &dsp32c_device::goto_gt, &dsp32c_device::goto_le, &dsp32c_device::goto_hi, &dsp32c_device::goto_ls,
+ &dsp32c_device::goto_auc, &dsp32c_device::goto_aus, &dsp32c_device::goto_age, &dsp32c_device::goto_alt, &dsp32c_device::goto_ane, &dsp32c_device::goto_aeq, &dsp32c_device::goto_avc, &dsp32c_device::goto_avs, // 01
+ &dsp32c_device::goto_agt, &dsp32c_device::goto_ale, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::goto_ibe, &dsp32c_device::goto_ibf, &dsp32c_device::goto_obf, &dsp32c_device::goto_obe, &dsp32c_device::goto_pde, &dsp32c_device::goto_pdf, &dsp32c_device::goto_pie, &dsp32c_device::goto_pif, // 02
+ &dsp32c_device::goto_syc, &dsp32c_device::goto_sys, &dsp32c_device::goto_fbc, &dsp32c_device::goto_fbs, &dsp32c_device::goto_irq1lo,&dsp32c_device::goto_irq1hi,&dsp32c_device::goto_irq2lo,&dsp32c_device::goto_irq2hi,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 03
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 04
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 05
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, // 06
+ &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto,
+ &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, // 07
+ &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto, &dsp32c_device::dec_goto,
+
+ &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, // 08
+ &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call,
+ &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, // 09
+ &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call, &dsp32c_device::call,
+ &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, // 0a
+ &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si,
+ &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, // 0b
+ &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si, &dsp32c_device::add_si,
+
+ &dsp32c_device::add_ss, &dsp32c_device::mul2_s, &dsp32c_device::subr_ss, &dsp32c_device::addr_ss, &dsp32c_device::sub_ss, &dsp32c_device::neg_s, &dsp32c_device::andc_ss, &dsp32c_device::cmp_ss, // 0c
+ &dsp32c_device::xor_ss, &dsp32c_device::rcr_s, &dsp32c_device::or_ss, &dsp32c_device::rcl_s, &dsp32c_device::shr_s, &dsp32c_device::div2_s, &dsp32c_device::and_ss, &dsp32c_device::test_ss,
+ &dsp32c_device::add_di, &dsp32c_device::illegal, &dsp32c_device::subr_di, &dsp32c_device::addr_di, &dsp32c_device::sub_di, &dsp32c_device::illegal, &dsp32c_device::andc_di, &dsp32c_device::cmp_di, // 0d
+ &dsp32c_device::xor_di, &dsp32c_device::illegal, &dsp32c_device::or_di, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::and_di, &dsp32c_device::test_di,
+ &dsp32c_device::load_hi, &dsp32c_device::load_hi, &dsp32c_device::load_li, &dsp32c_device::load_li, &dsp32c_device::load_i, &dsp32c_device::load_i, &dsp32c_device::load_ei, &dsp32c_device::load_ei, // 0e
+ &dsp32c_device::store_hi, &dsp32c_device::store_hi, &dsp32c_device::store_li, &dsp32c_device::store_li, &dsp32c_device::store_i, &dsp32c_device::store_i, &dsp32c_device::store_ei, &dsp32c_device::store_ei,
+ &dsp32c_device::load_hr, &dsp32c_device::load_hr, &dsp32c_device::load_lr, &dsp32c_device::load_lr, &dsp32c_device::load_r, &dsp32c_device::load_r, &dsp32c_device::load_er, &dsp32c_device::load_er, // 0f
+ &dsp32c_device::store_hr, &dsp32c_device::store_hr, &dsp32c_device::store_lr, &dsp32c_device::store_lr, &dsp32c_device::store_r, &dsp32c_device::store_r, &dsp32c_device::store_er, &dsp32c_device::store_er,
+
+ &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 10
+ &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
+ &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 11
+ &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
+ &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 12
+ &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
+ &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 13
+ &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
+
+ &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 14
+ &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
+ &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 15
+ &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
+ &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpp, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, &dsp32c_device::d1_aMpm, // 16
+ &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmp, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm, &dsp32c_device::d1_aMmm,
+ &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 17
+ &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
+
+ &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, &dsp32c_device::d1_0px, // 18
+ &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx, &dsp32c_device::d1_0mx,
+ &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 19
+ &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
+ &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pp, &dsp32c_device::d1_1pm, &dsp32c_device::d1_1pm, &dsp32c_device::d1_1pm, &dsp32c_device::d1_1pm, // 1a
+ &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mp, &dsp32c_device::d1_1mm, &dsp32c_device::d1_1mm, &dsp32c_device::d1_1mm, &dsp32c_device::d1_1mm,
+ &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMppr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, &dsp32c_device::d1_aMpmr, // 1b
+ &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmpr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr, &dsp32c_device::d1_aMmmr,
+
+ &dsp32c_device::d4_pp, &dsp32c_device::d4_pp, &dsp32c_device::d4_pp, &dsp32c_device::d4_pp, &dsp32c_device::d4_pm, &dsp32c_device::d4_pm, &dsp32c_device::d4_pm, &dsp32c_device::d4_pm, // 1c
+ &dsp32c_device::d4_mp, &dsp32c_device::d4_mp, &dsp32c_device::d4_mp, &dsp32c_device::d4_mp, &dsp32c_device::d4_mm, &dsp32c_device::d4_mm, &dsp32c_device::d4_mm, &dsp32c_device::d4_mm,
+ &dsp32c_device::d4_ppr, &dsp32c_device::d4_ppr, &dsp32c_device::d4_ppr, &dsp32c_device::d4_ppr, &dsp32c_device::d4_pmr, &dsp32c_device::d4_pmr, &dsp32c_device::d4_pmr, &dsp32c_device::d4_pmr, // 1d
+ &dsp32c_device::d4_mpr, &dsp32c_device::d4_mpr, &dsp32c_device::d4_mpr, &dsp32c_device::d4_mpr, &dsp32c_device::d4_mmr, &dsp32c_device::d4_mmr, &dsp32c_device::d4_mmr, &dsp32c_device::d4_mmr,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 1e
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 1f
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+
+ &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 20
+ &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
+ &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 21
+ &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
+ &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 22
+ &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
+ &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 23
+ &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
+
+ &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 24
+ &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
+ &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 25
+ &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
+ &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 26
+ &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
+ &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 27
+ &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
+
+ &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 28
+ &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
+ &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 29
+ &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
+ &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpp, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, &dsp32c_device::d2_aMpm, // 2a
+ &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmp, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm, &dsp32c_device::d2_aMmm,
+ &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMppr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, &dsp32c_device::d2_aMpmr, // 2b
+ &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmpr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr, &dsp32c_device::d2_aMmmr,
+
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2c
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2d
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2e
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 2f
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+
+ &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 30
+ &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
+ &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 31
+ &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
+ &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 32
+ &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
+ &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 33
+ &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
+
+ &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 34
+ &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
+ &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 35
+ &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
+ &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 36
+ &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
+ &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 37
+ &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
+
+ &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 38
+ &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
+ &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 39
+ &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
+ &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpp, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, &dsp32c_device::d3_aMpm, // 3a
+ &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmp, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm, &dsp32c_device::d3_aMmm,
+ &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMppr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, &dsp32c_device::d3_aMpmr, // 3b
+ &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmpr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr, &dsp32c_device::d3_aMmmr,
+
+ &dsp32c_device::d5_ic, &dsp32c_device::d5_ic, &dsp32c_device::d5_ic, &dsp32c_device::d5_ic, &dsp32c_device::d5_oc, &dsp32c_device::d5_oc, &dsp32c_device::d5_oc, &dsp32c_device::d5_oc, // 3c
+ &dsp32c_device::d5_float, &dsp32c_device::d5_float, &dsp32c_device::d5_float, &dsp32c_device::d5_float, &dsp32c_device::d5_int, &dsp32c_device::d5_int, &dsp32c_device::d5_int, &dsp32c_device::d5_int,
+ &dsp32c_device::d5_round, &dsp32c_device::d5_round, &dsp32c_device::d5_round, &dsp32c_device::d5_round, &dsp32c_device::d5_ifalt, &dsp32c_device::d5_ifalt, &dsp32c_device::d5_ifalt, &dsp32c_device::d5_ifalt, // 3d
+ &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifaeq, &dsp32c_device::d5_ifagt, &dsp32c_device::d5_ifagt, &dsp32c_device::d5_ifagt, &dsp32c_device::d5_ifagt,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 3e
+ &dsp32c_device::d5_float24, &dsp32c_device::d5_float24, &dsp32c_device::d5_float24, &dsp32c_device::d5_float24, &dsp32c_device::d5_int24, &dsp32c_device::d5_int24, &dsp32c_device::d5_int24, &dsp32c_device::d5_int24,
+ &dsp32c_device::d5_ieee, &dsp32c_device::d5_ieee, &dsp32c_device::d5_ieee, &dsp32c_device::d5_ieee, &dsp32c_device::d5_dsp, &dsp32c_device::d5_dsp, &dsp32c_device::d5_dsp, &dsp32c_device::d5_dsp, // 3f
+ &dsp32c_device::d5_seed, &dsp32c_device::d5_seed, &dsp32c_device::d5_seed, &dsp32c_device::d5_seed, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 40
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 41
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 42
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 43
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 44
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 45
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::do_i, &dsp32c_device::do_r, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 46
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 47
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 48
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 49
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, // 4a
+ &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si,
+ &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, // 4b
+ &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si, &dsp32c_device::adde_si,
+
+ &dsp32c_device::adde_ss, &dsp32c_device::mul2e_s, &dsp32c_device::subre_ss, &dsp32c_device::addre_ss, &dsp32c_device::sube_ss, &dsp32c_device::nege_s, &dsp32c_device::andce_ss, &dsp32c_device::cmpe_ss, // 4c
+ &dsp32c_device::xore_ss, &dsp32c_device::rcre_s, &dsp32c_device::ore_ss, &dsp32c_device::rcle_s, &dsp32c_device::shre_s, &dsp32c_device::div2e_s, &dsp32c_device::ande_ss, &dsp32c_device::teste_ss,
+ &dsp32c_device::adde_di, &dsp32c_device::illegal, &dsp32c_device::subre_di, &dsp32c_device::addre_di, &dsp32c_device::sube_di, &dsp32c_device::illegal, &dsp32c_device::andce_di, &dsp32c_device::cmpe_di, // 4d
+ &dsp32c_device::xore_di, &dsp32c_device::illegal, &dsp32c_device::ore_di, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::ande_di, &dsp32c_device::teste_di,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 4e
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, // 4f
+ &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal, &dsp32c_device::illegal,
+
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 50
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 51
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 52
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 53
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 54
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 55
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 56
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 57
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 58
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 59
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5a
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5b
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5c
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5d
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5e
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, // 5f
+ &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24, &dsp32c_device::goto24,
+
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 60
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 61
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 62
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 63
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 64
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 65
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 66
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 67
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 68
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 69
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6a
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6b
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6c
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6d
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6e
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, // 6f
+ &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24, &dsp32c_device::load24,
+
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 70
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 71
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 72
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 73
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 74
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 75
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 76
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 77
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 78
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 79
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7a
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7b
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7c
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7d
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7e
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24,
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, // 7f
+ &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24, &dsp32c_device::call24
};
diff --git a/src/emu/cpu/dsp56k/dsp56def.h b/src/emu/cpu/dsp56k/dsp56def.h
index 416653e7cd9..741de50846d 100644
--- a/src/emu/cpu/dsp56k/dsp56def.h
+++ b/src/emu/cpu/dsp56k/dsp56def.h
@@ -13,42 +13,42 @@ namespace DSP56K
/***************************************************************************
ALU
***************************************************************************/
-#define X cpustate->ALU.x.d
-#define X1 cpustate->ALU.x.w.h
-#define X0 cpustate->ALU.x.w.l
-#define Y cpustate->ALU.y.d
-#define Y1 cpustate->ALU.y.w.h
-#define Y0 cpustate->ALU.y.w.l
-
-#define A cpustate->ALU.a.q
-#define A2 cpustate->ALU.a.b.h4
-#define A1 cpustate->ALU.a.w.h
-#define A0 cpustate->ALU.a.w.l
-#define B cpustate->ALU.b.q
-#define B2 cpustate->ALU.b.b.h4
-#define B1 cpustate->ALU.b.w.h
-#define B0 cpustate->ALU.b.w.l
+#define X cpustate->ALU.x.d
+#define X1 cpustate->ALU.x.w.h
+#define X0 cpustate->ALU.x.w.l
+#define Y cpustate->ALU.y.d
+#define Y1 cpustate->ALU.y.w.h
+#define Y0 cpustate->ALU.y.w.l
+
+#define A cpustate->ALU.a.q
+#define A2 cpustate->ALU.a.b.h4
+#define A1 cpustate->ALU.a.w.h
+#define A0 cpustate->ALU.a.w.l
+#define B cpustate->ALU.b.q
+#define B2 cpustate->ALU.b.b.h4
+#define B1 cpustate->ALU.b.w.h
+#define B0 cpustate->ALU.b.w.l
/***************************************************************************
AGU
***************************************************************************/
-#define R0 cpustate->AGU.r0
-#define R1 cpustate->AGU.r1
-#define R2 cpustate->AGU.r2
-#define R3 cpustate->AGU.r3
-
-#define N0 cpustate->AGU.n0
-#define N1 cpustate->AGU.n1
-#define N2 cpustate->AGU.n2
-#define N3 cpustate->AGU.n3
-
-#define M0 cpustate->AGU.m0
-#define M1 cpustate->AGU.m1
-#define M2 cpustate->AGU.m2
-#define M3 cpustate->AGU.m3
-
-#define TEMP cpustate->AGU.temp
+#define R0 cpustate->AGU.r0
+#define R1 cpustate->AGU.r1
+#define R2 cpustate->AGU.r2
+#define R3 cpustate->AGU.r3
+
+#define N0 cpustate->AGU.n0
+#define N1 cpustate->AGU.n1
+#define N2 cpustate->AGU.n2
+#define N3 cpustate->AGU.n3
+
+#define M0 cpustate->AGU.m0
+#define M1 cpustate->AGU.m1
+#define M2 cpustate->AGU.m2
+#define M3 cpustate->AGU.m3
+
+#define TEMP cpustate->AGU.temp
} // namespace DSP56K
diff --git a/src/emu/cpu/dsp56k/dsp56k.c b/src/emu/cpu/dsp56k/dsp56k.c
index 7ac2c4a2c53..45ac6e01c91 100644
--- a/src/emu/cpu/dsp56k/dsp56k.c
+++ b/src/emu/cpu/dsp56k/dsp56k.c
@@ -322,7 +322,7 @@ static size_t execute_one_new(dsp56k_core* cpustate)
Opcode op(w0, w1);
op.evaluate(cpustate);
- PC += op.evalSize(); // Special size function needed to handle jmps, etc.
+ PC += op.evalSize(); // Special size function needed to handle jmps, etc.
// TODO: Currently all operations take up 4 cycles (inst->cycles()).
return 4;
@@ -353,7 +353,7 @@ static CPU_EXECUTE( dsp56k )
{
execute_one(cpustate);
if (0) cpustate->icount -= execute_one_new(cpustate);
- pcu_service_interrupts(cpustate); // TODO: Is it incorrect to service after each instruction?
+ pcu_service_interrupts(cpustate); // TODO: Is it incorrect to service after each instruction?
}
}
@@ -369,13 +369,13 @@ extern CPU_DISASSEMBLE( dsp56k );
* Internal Memory Maps
****************************************************************************/
static ADDRESS_MAP_START( dsp56156_program_map, AS_PROGRAM, 16, legacy_cpu_device )
- AM_RANGE(0x0000,0x07ff) AM_READWRITE_LEGACY(DSP56K::program_r, DSP56K::program_w) /* 1-5 */
+ AM_RANGE(0x0000,0x07ff) AM_READWRITE_LEGACY(DSP56K::program_r, DSP56K::program_w) /* 1-5 */
// AM_RANGE(0x2f00,0x2fff) AM_ROM /* 1-5 PROM reserved memory. Is this the right spot for it? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( dsp56156_x_data_map, AS_DATA, 16, legacy_cpu_device )
- AM_RANGE(0x0000,0x07ff) AM_RAM /* 1-5 */
- AM_RANGE(0xffc0,0xffff) AM_READWRITE_LEGACY(DSP56K::peripheral_register_r, DSP56K::peripheral_register_w) /* 1-5 On-chip peripheral registers memory mapped in data space */
+ AM_RANGE(0x0000,0x07ff) AM_RAM /* 1-5 */
+ AM_RANGE(0xffc0,0xffff) AM_READWRITE_LEGACY(DSP56K::peripheral_register_r, DSP56K::peripheral_register_w) /* 1-5 On-chip peripheral registers memory mapped in data space */
ADDRESS_MAP_END
@@ -434,58 +434,58 @@ static CPU_SET_INFO( dsp56k )
case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_RESET: set_irq_line(cpustate, DSP56K_IRQ_RESET, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + DSP56K_PC: PC = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_PC: PC = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_SR: SR = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_LC: LC = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_LA: LA = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_SR: SR = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_LC: LC = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_LA: LA = info->i & 0xffff; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + DSP56K_SP: SP = info->i & 0xff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_SP: SP = info->i & 0xff; break;
- case CPUINFO_INT_REGISTER + DSP56K_OMR: OMR = info->i & 0xff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_OMR: OMR = info->i & 0xff; break;
- case CPUINFO_INT_REGISTER + DSP56K_X: X = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_Y: Y = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_X: X = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_Y: Y = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_A: A = info->i & (UINT64)U64(0xffffffffffffffff); break; /* could benefit from a better mask? */
- case CPUINFO_INT_REGISTER + DSP56K_B: B = info->i & (UINT64)U64(0xffffffffffffffff); break; /* could benefit from a better mask? */
+ case CPUINFO_INT_REGISTER + DSP56K_A: A = info->i & (UINT64)U64(0xffffffffffffffff); break; /* could benefit from a better mask? */
+ case CPUINFO_INT_REGISTER + DSP56K_B: B = info->i & (UINT64)U64(0xffffffffffffffff); break; /* could benefit from a better mask? */
- case CPUINFO_INT_REGISTER + DSP56K_R0: R0 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_R1: R1 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_R2: R2 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_R3: R3 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R0: R0 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R1: R1 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R2: R2 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R3: R3 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_N0: N0 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_N1: N1 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_N2: N2 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_N3: N3 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N0: N0 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N1: N1 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N2: N2 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N3: N3 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_M0: M0 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_M1: M1 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_M2: M2 = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_M3: M3 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M0: M0 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M1: M1 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M2: M2 = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M3: M3 = info->i & 0xffff; break;
/* case CPUINFO_INT_REGISTER + DSP56K_TEMP: TEMP = info->i & 0xffff; break; */
/* case CPUINFO_INT_REGISTER + DSP56K_STATUS: STATUS = info->i & 0xff; break; */
/* The CPU stack */
- case CPUINFO_INT_REGISTER + DSP56K_ST0: ST0 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST1: ST1 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST2: ST2 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST3: ST3 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST4: ST4 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST5: ST5 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST6: ST6 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST7: ST7 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST8: ST8 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST9: ST9 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST10: ST10 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST11: ST11 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST12: ST12 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST13: ST13 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST14: ST14 = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST15: ST15 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST0: ST0 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST1: ST1 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST2: ST2 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST3: ST3 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST4: ST4 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST5: ST5 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST6: ST6 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST7: ST7 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST8: ST8 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST9: ST9 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST10: ST10 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST11: ST11 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST12: ST12 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST13: ST13 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST14: ST14 = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST15: ST15 = info->i & 0xffffffff; break;
}
}
@@ -497,111 +497,111 @@ CPU_GET_INFO( dsp56k )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(dsp56k_core); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0x0000; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; // ? break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 8; // ? break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODA: info->i = DSP56K_IRQ_MODA; break;
- case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODB: info->i = DSP56K_IRQ_MODB; break;
- case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODC: info->i = DSP56K_IRQ_MODC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(dsp56k_core); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0x0000; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; // ? break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 8; // ? break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODA: info->i = DSP56K_IRQ_MODA; break;
+ case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODB: info->i = DSP56K_IRQ_MODB; break;
+ case CPUINFO_INT_INPUT_STATE + DSP56K_IRQ_MODC: info->i = DSP56K_IRQ_MODC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + DSP56K_PC: info->i = PC; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc; break;
+ case CPUINFO_INT_REGISTER + DSP56K_PC: info->i = PC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc; break;
- case CPUINFO_INT_REGISTER + DSP56K_SR: info->i = SR; break;
- case CPUINFO_INT_REGISTER + DSP56K_LC: info->i = LC; break;
- case CPUINFO_INT_REGISTER + DSP56K_LA: info->i = LA; break;
+ case CPUINFO_INT_REGISTER + DSP56K_SR: info->i = SR; break;
+ case CPUINFO_INT_REGISTER + DSP56K_LC: info->i = LC; break;
+ case CPUINFO_INT_REGISTER + DSP56K_LA: info->i = LA; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + DSP56K_SP: info->i = SP; break;
+ case CPUINFO_INT_REGISTER + DSP56K_SP: info->i = SP; break;
- case CPUINFO_INT_REGISTER + DSP56K_OMR: info->i = OMR; break;
+ case CPUINFO_INT_REGISTER + DSP56K_OMR: info->i = OMR; break;
- case CPUINFO_INT_REGISTER + DSP56K_X: info->i = X; break;
- case CPUINFO_INT_REGISTER + DSP56K_Y: info->i = Y; break;
+ case CPUINFO_INT_REGISTER + DSP56K_X: info->i = X; break;
+ case CPUINFO_INT_REGISTER + DSP56K_Y: info->i = Y; break;
- case CPUINFO_INT_REGISTER + DSP56K_A: info->i = A; break;
- case CPUINFO_INT_REGISTER + DSP56K_B: info->i = B; break;
+ case CPUINFO_INT_REGISTER + DSP56K_A: info->i = A; break;
+ case CPUINFO_INT_REGISTER + DSP56K_B: info->i = B; break;
- case CPUINFO_INT_REGISTER + DSP56K_R0: info->i = R0; break;
- case CPUINFO_INT_REGISTER + DSP56K_R1: info->i = R1; break;
- case CPUINFO_INT_REGISTER + DSP56K_R2: info->i = R2; break;
- case CPUINFO_INT_REGISTER + DSP56K_R3: info->i = R3; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R0: info->i = R0; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R1: info->i = R1; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R2: info->i = R2; break;
+ case CPUINFO_INT_REGISTER + DSP56K_R3: info->i = R3; break;
- case CPUINFO_INT_REGISTER + DSP56K_N0: info->i = N0; break;
- case CPUINFO_INT_REGISTER + DSP56K_N1: info->i = N1; break;
- case CPUINFO_INT_REGISTER + DSP56K_N2: info->i = N2; break;
- case CPUINFO_INT_REGISTER + DSP56K_N3: info->i = N3; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N0: info->i = N0; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N1: info->i = N1; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N2: info->i = N2; break;
+ case CPUINFO_INT_REGISTER + DSP56K_N3: info->i = N3; break;
- case CPUINFO_INT_REGISTER + DSP56K_M0: info->i = M0; break;
- case CPUINFO_INT_REGISTER + DSP56K_M1: info->i = M1; break;
- case CPUINFO_INT_REGISTER + DSP56K_M2: info->i = M2; break;
- case CPUINFO_INT_REGISTER + DSP56K_M3: info->i = M3; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M0: info->i = M0; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M1: info->i = M1; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M2: info->i = M2; break;
+ case CPUINFO_INT_REGISTER + DSP56K_M3: info->i = M3; break;
/* case CPUINFO_INT_REGISTER + DSP56K_TEMP: info->i = TEMP; break; */
/* case CPUINFO_INT_REGISTER + DSP56K_STATUS: info->i = STATUS; break; */
/* The CPU stack */
- case CPUINFO_INT_REGISTER + DSP56K_ST0: info->i = ST0; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST1: info->i = ST1; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST2: info->i = ST2; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST3: info->i = ST3; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST4: info->i = ST4; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST5: info->i = ST5; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST6: info->i = ST6; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST7: info->i = ST7; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST8: info->i = ST8; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST9: info->i = ST9; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST10: info->i = ST10; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST11: info->i = ST11; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST12: info->i = ST12; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST13: info->i = ST13; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST14: info->i = ST14; break;
- case CPUINFO_INT_REGISTER + DSP56K_ST15: info->i = ST15; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST0: info->i = ST0; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST1: info->i = ST1; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST2: info->i = ST2; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST3: info->i = ST3; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST4: info->i = ST4; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST5: info->i = ST5; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST6: info->i = ST6; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST7: info->i = ST7; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST8: info->i = ST8; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST9: info->i = ST9; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST10: info->i = ST10; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST11: info->i = ST11; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST12: info->i = ST12; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST13: info->i = ST13; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST14: info->i = ST14; break;
+ case CPUINFO_INT_REGISTER + DSP56K_ST15: info->i = ST15; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(dsp56k); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(dsp56k); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(dsp56k); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(dsp56k); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(dsp56k); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(dsp56k); break;
- case CPUINFO_FCT_DEBUG_INIT: info->debug_init = NULL; break;
- case CPUINFO_FCT_TRANSLATE: info->translate = NULL; break;
- case CPUINFO_FCT_READ: info->read = NULL; break;
- case CPUINFO_FCT_WRITE: info->write = NULL; break;
- case CPUINFO_FCT_READOP: info->readop = NULL; break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(dsp56k); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(dsp56k); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(dsp56k); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(dsp56k); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(dsp56k); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(dsp56k); break;
+ case CPUINFO_FCT_DEBUG_INIT: info->debug_init = NULL; break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = NULL; break;
+ case CPUINFO_FCT_READ: info->read = NULL; break;
+ case CPUINFO_FCT_WRITE: info->write = NULL; break;
+ case CPUINFO_FCT_READOP: info->readop = NULL; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA:
- info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_x_data_map); break;
+ info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_x_data_map); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM:
- info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_program_map); break;
+ info->internal_map16 = ADDRESS_MAP_NAME(dsp56156_program_map); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "DSP56156"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola DSP56156"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Andrew Gardner"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "DSP56156"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola DSP56156"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Andrew Gardner"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%s%s %s%s%s%s%s%s%s%s %s%s",
@@ -623,54 +623,54 @@ CPU_GET_INFO( dsp56k )
SE_bit(cpustate) ? "S" : ".");
break;
- case CPUINFO_STR_REGISTER + DSP56K_PC: sprintf(info->s, "PC : %04x", PC); break;
- case CPUINFO_STR_REGISTER + DSP56K_SR: sprintf(info->s, "SR : %04x", SR); break;
- case CPUINFO_STR_REGISTER + DSP56K_LC: sprintf(info->s, "LC : %04x", LC); break;
- case CPUINFO_STR_REGISTER + DSP56K_LA: sprintf(info->s, "LA : %04x", LA); break;
- case CPUINFO_STR_REGISTER + DSP56K_SP: sprintf(info->s, "SP : %02x", SP); break;
- case CPUINFO_STR_REGISTER + DSP56K_OMR: sprintf(info->s, "OMR: %02x", OMR); break;
+ case CPUINFO_STR_REGISTER + DSP56K_PC: sprintf(info->s, "PC : %04x", PC); break;
+ case CPUINFO_STR_REGISTER + DSP56K_SR: sprintf(info->s, "SR : %04x", SR); break;
+ case CPUINFO_STR_REGISTER + DSP56K_LC: sprintf(info->s, "LC : %04x", LC); break;
+ case CPUINFO_STR_REGISTER + DSP56K_LA: sprintf(info->s, "LA : %04x", LA); break;
+ case CPUINFO_STR_REGISTER + DSP56K_SP: sprintf(info->s, "SP : %02x", SP); break;
+ case CPUINFO_STR_REGISTER + DSP56K_OMR: sprintf(info->s, "OMR: %02x", OMR); break;
- case CPUINFO_STR_REGISTER + DSP56K_X: sprintf(info->s, "X : %04x %04x", X1, X0); break;
- case CPUINFO_STR_REGISTER + DSP56K_Y: sprintf(info->s, "Y : %04x %04x", Y1, Y0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_X: sprintf(info->s, "X : %04x %04x", X1, X0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_Y: sprintf(info->s, "Y : %04x %04x", Y1, Y0); break;
- case CPUINFO_STR_REGISTER + DSP56K_A: sprintf(info->s, "A : %02x %04x %04x", A2,A1,A0); break;
- case CPUINFO_STR_REGISTER + DSP56K_B: sprintf(info->s, "B : %02x %04x %04x", B2,B1,B0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_A: sprintf(info->s, "A : %02x %04x %04x", A2,A1,A0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_B: sprintf(info->s, "B : %02x %04x %04x", B2,B1,B0); break;
- case CPUINFO_STR_REGISTER + DSP56K_R0: sprintf(info->s, "R0 : %04x", R0); break;
- case CPUINFO_STR_REGISTER + DSP56K_R1: sprintf(info->s, "R1 : %04x", R1); break;
- case CPUINFO_STR_REGISTER + DSP56K_R2: sprintf(info->s, "R2 : %04x", R2); break;
- case CPUINFO_STR_REGISTER + DSP56K_R3: sprintf(info->s, "R3 : %04x", R3); break;
+ case CPUINFO_STR_REGISTER + DSP56K_R0: sprintf(info->s, "R0 : %04x", R0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_R1: sprintf(info->s, "R1 : %04x", R1); break;
+ case CPUINFO_STR_REGISTER + DSP56K_R2: sprintf(info->s, "R2 : %04x", R2); break;
+ case CPUINFO_STR_REGISTER + DSP56K_R3: sprintf(info->s, "R3 : %04x", R3); break;
- case CPUINFO_STR_REGISTER + DSP56K_N0: sprintf(info->s, "N0 : %04x", N0); break;
- case CPUINFO_STR_REGISTER + DSP56K_N1: sprintf(info->s, "N1 : %04x", N1); break;
- case CPUINFO_STR_REGISTER + DSP56K_N2: sprintf(info->s, "N2 : %04x", N2); break;
- case CPUINFO_STR_REGISTER + DSP56K_N3: sprintf(info->s, "N3 : %04x", N3); break;
+ case CPUINFO_STR_REGISTER + DSP56K_N0: sprintf(info->s, "N0 : %04x", N0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_N1: sprintf(info->s, "N1 : %04x", N1); break;
+ case CPUINFO_STR_REGISTER + DSP56K_N2: sprintf(info->s, "N2 : %04x", N2); break;
+ case CPUINFO_STR_REGISTER + DSP56K_N3: sprintf(info->s, "N3 : %04x", N3); break;
- case CPUINFO_STR_REGISTER + DSP56K_M0: sprintf(info->s, "M0 : %04x", M0); break;
- case CPUINFO_STR_REGISTER + DSP56K_M1: sprintf(info->s, "M1 : %04x", M1); break;
- case CPUINFO_STR_REGISTER + DSP56K_M2: sprintf(info->s, "M2 : %04x", M2); break;
- case CPUINFO_STR_REGISTER + DSP56K_M3: sprintf(info->s, "M3 : %04x", M3); break;
+ case CPUINFO_STR_REGISTER + DSP56K_M0: sprintf(info->s, "M0 : %04x", M0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_M1: sprintf(info->s, "M1 : %04x", M1); break;
+ case CPUINFO_STR_REGISTER + DSP56K_M2: sprintf(info->s, "M2 : %04x", M2); break;
+ case CPUINFO_STR_REGISTER + DSP56K_M3: sprintf(info->s, "M3 : %04x", M3); break;
/* case CPUINFO_STR_REGISTER + DSP56K_TEMP: sprintf(info->s, "TMP: %04x", TEMP); break; */
/* case CPUINFO_STR_REGISTER + DSP56K_STATUS: sprintf(info->s, "STS: %02x", STATUS); break; */
/* The CPU stack */
- case CPUINFO_STR_REGISTER + DSP56K_ST0: sprintf(info->s, "ST0 : %08x", ST0); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST1: sprintf(info->s, "ST1 : %08x", ST1); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST2: sprintf(info->s, "ST2 : %08x", ST2); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST3: sprintf(info->s, "ST3 : %08x", ST3); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST4: sprintf(info->s, "ST4 : %08x", ST4); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST5: sprintf(info->s, "ST5 : %08x", ST5); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST6: sprintf(info->s, "ST6 : %08x", ST6); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST7: sprintf(info->s, "ST7 : %08x", ST7); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST8: sprintf(info->s, "ST8 : %08x", ST8); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST9: sprintf(info->s, "ST9 : %08x", ST9); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST10: sprintf(info->s, "ST10: %08x", ST10); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST11: sprintf(info->s, "ST11: %08x", ST11); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST12: sprintf(info->s, "ST12: %08x", ST12); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST13: sprintf(info->s, "ST13: %08x", ST13); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST14: sprintf(info->s, "ST14: %08x", ST14); break;
- case CPUINFO_STR_REGISTER + DSP56K_ST15: sprintf(info->s, "ST15: %08x", ST15); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST0: sprintf(info->s, "ST0 : %08x", ST0); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST1: sprintf(info->s, "ST1 : %08x", ST1); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST2: sprintf(info->s, "ST2 : %08x", ST2); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST3: sprintf(info->s, "ST3 : %08x", ST3); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST4: sprintf(info->s, "ST4 : %08x", ST4); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST5: sprintf(info->s, "ST5 : %08x", ST5); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST6: sprintf(info->s, "ST6 : %08x", ST6); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST7: sprintf(info->s, "ST7 : %08x", ST7); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST8: sprintf(info->s, "ST8 : %08x", ST8); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST9: sprintf(info->s, "ST9 : %08x", ST9); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST10: sprintf(info->s, "ST10: %08x", ST10); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST11: sprintf(info->s, "ST11: %08x", ST11); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST12: sprintf(info->s, "ST12: %08x", ST12); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST13: sprintf(info->s, "ST13: %08x", ST13); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST14: sprintf(info->s, "ST14: %08x", ST14); break;
+ case CPUINFO_STR_REGISTER + DSP56K_ST15: sprintf(info->s, "ST15: %08x", ST15); break;
}
}
diff --git a/src/emu/cpu/dsp56k/dsp56k.h b/src/emu/cpu/dsp56k/dsp56k.h
index 7737de30d11..92a81090505 100644
--- a/src/emu/cpu/dsp56k/dsp56k.h
+++ b/src/emu/cpu/dsp56k/dsp56k.h
@@ -20,7 +20,7 @@
#define DSP56K_IRQ_MODA 0
#define DSP56K_IRQ_MODB 1
#define DSP56K_IRQ_MODC 2
-#define DSP56K_IRQ_RESET 3 /* Is this needed? */
+#define DSP56K_IRQ_RESET 3 /* Is this needed? */
// Needed for MAME
DECLARE_LEGACY_CPU_DEVICE(DSP56156, dsp56k);
@@ -179,17 +179,17 @@ struct dsp56k_core
// HACK - Bootstrap mode state variable.
UINT8 bootstrap_mode;
- UINT8 repFlag; // Knowing if we're in a 'repeat' state (dunno how the processor does this)
- UINT32 repAddr; // The address of the instruction to repeat...
+ UINT8 repFlag; // Knowing if we're in a 'repeat' state (dunno how the processor does this)
+ UINT32 repAddr; // The address of the instruction to repeat...
/* MAME internal stuff */
int icount;
- UINT32 ppc;
- UINT32 op;
- int interrupt_cycles;
- void (*output_pins_changed)(UINT32 pins);
+ UINT32 ppc;
+ UINT32 op;
+ int interrupt_cycles;
+ void (*output_pins_changed)(UINT32 pins);
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
diff --git a/src/emu/cpu/dsp56k/dsp56mem.c b/src/emu/cpu/dsp56k/dsp56mem.c
index dcbb6d766e8..e421bcffcc1 100644
--- a/src/emu/cpu/dsp56k/dsp56mem.c
+++ b/src/emu/cpu/dsp56k/dsp56mem.c
@@ -14,15 +14,15 @@ void IPR_set(dsp56k_core* cpustate, UINT16 value)
IPR = value;
}
-INT8 irqa_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0003) >> 0) - 1; }
+INT8 irqa_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0003) >> 0) - 1; }
UINT8 irqa_trigger(dsp56k_core* cpustate){ return (IPR & 0x0004) >> 2; }
-INT8 irqb_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0018) >> 3) - 1; }
+INT8 irqb_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0018) >> 3) - 1; }
UINT8 irqb_trigger(dsp56k_core* cpustate){ return (IPR & 0x0002) >> 5; }
-INT8 codec_ipl(dsp56k_core* cpustate) { return ((IPR & 0x00c0) >> 6) - 1; }
-INT8 host_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0300) >> 8) - 1; }
-INT8 ssi0_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0c00) >> 10) - 1; }
-INT8 ssi1_ipl(dsp56k_core* cpustate) { return ((IPR & 0x3000) >> 12) - 1; }
-INT8 tm_ipl(dsp56k_core* cpustate) { return ((IPR & 0xc000) >> 14) - 1; }
+INT8 codec_ipl(dsp56k_core* cpustate) { return ((IPR & 0x00c0) >> 6) - 1; }
+INT8 host_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0300) >> 8) - 1; }
+INT8 ssi0_ipl(dsp56k_core* cpustate) { return ((IPR & 0x0c00) >> 10) - 1; }
+INT8 ssi1_ipl(dsp56k_core* cpustate) { return ((IPR & 0x3000) >> 12) - 1; }
+INT8 tm_ipl(dsp56k_core* cpustate) { return ((IPR & 0xc000) >> 14) - 1; }
void mem_reset(dsp56k_core* cpustate)
{
@@ -192,7 +192,7 @@ void HF1_bit_host_set(dsp56k_core* cpustate, UINT8 value)
ICR &= ~(0x10);
ICR |= (value << 4);
- HF1_bit_set(cpustate, value); // 5-14
+ HF1_bit_set(cpustate, value); // 5-14
}
void HF0_bit_host_set(dsp56k_core* cpustate, UINT8 value)
{
@@ -200,7 +200,7 @@ void HF0_bit_host_set(dsp56k_core* cpustate, UINT8 value)
ICR &= ~(0x08);
ICR |= (value << 3);
- HF0_bit_set(cpustate, value); // 5-13
+ HF0_bit_set(cpustate, value); // 5-13
}
void TREQ_bit_set(dsp56k_core* cpustate, UINT8 value)
{
@@ -241,7 +241,7 @@ void HC_bit_set(dsp56k_core* cpustate, UINT8 value)
CVR &= ~(0x80);
CVR |= (value << 7);
- HCP_bit_set(cpustate, value); // 5-9 & 5-11
+ HCP_bit_set(cpustate, value); // 5-9 & 5-11
}
void HV_bits_set(dsp56k_core* cpustate, UINT8 value)
{
@@ -306,19 +306,19 @@ void dsp56k_host_interface_reset(dsp56k_core* cpustate)
cpustate->HI.bootstrap_offset = 0x0000;
/* HCR */
- HCR_set(cpustate, 0x0000); // 5-10
+ HCR_set(cpustate, 0x0000); // 5-10
/* HSR */
- HRDF_bit_set(cpustate, 0); // 5-11
- HTDE_bit_set(cpustate, 1); // 5-11
- HCP_bit_set(cpustate, 0); // 5-11
- HF0_bit_set(cpustate, 0); // 5-12
- HF1_bit_set(cpustate, 0); // 5-12
- DMA_bit_set(cpustate, 0); // 5-12
+ HRDF_bit_set(cpustate, 0); // 5-11
+ HTDE_bit_set(cpustate, 1); // 5-11
+ HCP_bit_set(cpustate, 0); // 5-11
+ HF0_bit_set(cpustate, 0); // 5-12
+ HF1_bit_set(cpustate, 0); // 5-12
+ DMA_bit_set(cpustate, 0); // 5-12
/* CVR*/
- HV_bits_set(cpustate, 0x16); // 5-7
- HC_bit_set(cpustate, 0); // 5-9
+ HV_bits_set(cpustate, 0x16); // 5-7
+ HC_bit_set(cpustate, 0); // 5-9
/* TODO: ISR (at least) */
}
@@ -564,7 +564,7 @@ READ16_HANDLER( peripheral_register_r )
return 0xbeef;
else
{
- UINT16 value = HRX; // TODO: Maybe not exactly right? Just being safe.
+ UINT16 value = HRX; // TODO: Maybe not exactly right? Just being safe.
DSP56K::HRDF_bit_set(cpustate, 0);
return value;
}
@@ -722,7 +722,7 @@ WRITE16_HANDLER( peripheral_register_w )
// HTX/HRX: Host TX/RX Register
case 0xffe5:
HTX = data;
- DSP56K::HTDE_bit_set(cpustate, 0); // 5-5
+ DSP56K::HTDE_bit_set(cpustate, 0); // 5-5
break;
// COSR
@@ -796,9 +796,9 @@ void dsp56k_host_interface_write(device_t* device, UINT8 offset, UINT8 data)
/* Not exactly correct since the bootstrap hack doesn't need this to be true */
/*
- if (!host_interface_active())
- logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
- */
+ if (!host_interface_active())
+ logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
+ */
switch (offset)
{
@@ -850,10 +850,10 @@ void dsp56k_host_interface_write(device_t* device, UINT8 offset, UINT8 data)
{
cpustate->program_ram[cpustate->HI.bootstrap_offset] &= 0x00ff;
cpustate->program_ram[cpustate->HI.bootstrap_offset] |= (data << 8);
- break; /* Probably the right thing to do, given this is a hack */
+ break; /* Probably the right thing to do, given this is a hack */
}
- if (DSP56K::TXDE_bit(cpustate)) // 5-5
+ if (DSP56K::TXDE_bit(cpustate)) // 5-5
{
TXH = data;
}
@@ -872,10 +872,10 @@ void dsp56k_host_interface_write(device_t* device, UINT8 offset, UINT8 data)
{
cpustate->bootstrap_mode = BOOTSTRAP_OFF;
}
- break; /* Probably the right thing to do, given this is a hack */
+ break; /* Probably the right thing to do, given this is a hack */
}
- if (DSP56K::TXDE_bit(cpustate)) // 5-5
+ if (DSP56K::TXDE_bit(cpustate)) // 5-5
{
TXL = data;
DSP56K::TXDE_bit_set(cpustate, 0);
@@ -892,9 +892,9 @@ UINT8 dsp56k_host_interface_read(device_t* device, UINT8 offset)
/* Not exactly correct since the bootstrap hack doesn't need this to be true */
/*
- if (!host_interface_active())
- logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
- */
+ if (!host_interface_active())
+ logerror("Dsp56k : Host interface write called without HI being set active by the PBC.\n");
+ */
switch (offset)
{
@@ -939,7 +939,7 @@ UINT8 dsp56k_host_interface_read(device_t* device, UINT8 offset)
return 0xbf;
else
{
- UINT8 value = RXL; // TODO: Maybe not exactly right? I'm just being safe.
+ UINT8 value = RXL; // TODO: Maybe not exactly right? I'm just being safe.
DSP56K::RXDF_bit_set(cpustate, 0);
return value;
}
@@ -958,5 +958,3 @@ UINT16 dsp56k_get_peripheral_memory(device_t* device, UINT16 addr)
dsp56k_core* cpustate = get_safe_token(device);
return cpustate->peripheral_ram[A2O(addr)];
}
-
-
diff --git a/src/emu/cpu/dsp56k/dsp56ops.c b/src/emu/cpu/dsp56k/dsp56ops.c
index 221145de9d1..b093eb5e26a 100644
--- a/src/emu/cpu/dsp56k/dsp56ops.c
+++ b/src/emu/cpu/dsp56k/dsp56ops.c
@@ -47,126 +47,126 @@ struct typed_pointer
/* Opcode prototypes */
/*********************/
static size_t dsp56k_op_addsub_2 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mac_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_macr_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_move_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mpy_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mpyr_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_tfr_2 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
-static size_t dsp56k_op_mpy_2 (dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles);
-static size_t dsp56k_op_mac_2 (dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles);
-static size_t dsp56k_op_clr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_add (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_move (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_tfr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_rnd (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_tst (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_inc (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_inc24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_or (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_asr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_asl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_lsr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_lsl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_eor (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_subl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_sub (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_clr24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_sbc (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_cmp (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_neg (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_not (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_dec (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_dec24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_and (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_abs (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_ror (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_rol (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_cmpm (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_mpy (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_mpyr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_mac (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_macr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
-static size_t dsp56k_op_adc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_andi (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_asl4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_asr4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_asr16 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bfop (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bfop_1 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bfop_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bcc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bcc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bcc_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bra (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bra_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bra_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_brkcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bscc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bscc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_bsr (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_bsr_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_chkaau (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_debug (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_debugcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_div (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_dmac (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_do (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_do_1 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_do_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_mac_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
+static size_t dsp56k_op_macr_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
+static size_t dsp56k_op_move_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
+static size_t dsp56k_op_mpy_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
+static size_t dsp56k_op_mpyr_1 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
+static size_t dsp56k_op_tfr_2 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT8* cycles);
+static size_t dsp56k_op_mpy_2 (dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles);
+static size_t dsp56k_op_mac_2 (dsp56k_core* cpustate, const UINT16 op_byte, UINT8* cycles);
+static size_t dsp56k_op_clr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_add (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_move (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_tfr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_rnd (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_tst (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_inc (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_inc24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_or (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_asr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_asl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_lsr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_lsl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_eor (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_subl (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_sub (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_clr24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_sbc (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_cmp (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_neg (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_not (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_dec (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_dec24 (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_and (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_abs (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_ror (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_rol (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_cmpm (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_mpy (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_mpyr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_mac (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_macr (dsp56k_core* cpustate, const UINT16 op_byte, typed_pointer* d_register, UINT64* p_accum, UINT8* cycles);
+static size_t dsp56k_op_adc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_andi (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_asl4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_asr4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_asr16 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_bfop (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_bfop_1 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_bfop_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_bcc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_bcc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_bcc_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_bra (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_bra_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_bra_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_brkcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_bscc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_bscc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_bsr (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_bsr_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_chkaau (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_debug (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_debugcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_div (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_dmac (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_do (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_do_1 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_do_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
static size_t dsp56k_op_doforever(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_enddo (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_ext (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_illegal (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_imac (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_impy (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jcc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jcc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jmp (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jmp_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jscc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jscc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jsr (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_jsr_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_jsr_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_lea (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_lea_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_macsuuu (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_move_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movec (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_3 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movec_4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movec_5 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movei (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movem (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movem_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movem_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
-static size_t dsp56k_op_movep (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_movep_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_moves (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_mpysuuu (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_negc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_nop (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_norm (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_ori (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rep (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rep_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rep_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_repcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_reset (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rti (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_rts (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_stop (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_swap (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_swi (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tfr2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tfr3 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_tst2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_wait (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
-static size_t dsp56k_op_zero (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_enddo (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_ext (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_illegal (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_imac (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_impy (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_jcc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_jcc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_jmp (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_jmp_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_jscc (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_jscc_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_jsr (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_jsr_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_jsr_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_lea (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_lea_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_macsuuu (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_move_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_movec (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movec_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movec_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movec_3 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_movec_4 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movec_5 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_movei (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movem (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movem_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movem_2 (dsp56k_core* cpustate, const UINT16 op, const UINT16 op2, UINT8* cycles);
+static size_t dsp56k_op_movep (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_movep_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_moves (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_mpysuuu (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_negc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_nop (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_norm (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_ori (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_rep (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_rep_1 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_rep_2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_repcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_reset (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_rti (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_rts (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_stop (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_swap (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_swi (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_tcc (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_tfr2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_tfr3 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_tst2 (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_wait (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
+static size_t dsp56k_op_zero (dsp56k_core* cpustate, const UINT16 op, UINT8* cycles);
static void execute_register_to_register_data_move(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register, UINT64* prev_accum_value);
@@ -176,37 +176,37 @@ static void execute_x_memory_data_move2(dsp56k_core* cpustate, const UINT16 op,
static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const UINT16 op, typed_pointer* d_register);
static void execute_x_memory_data_move_with_short_displacement(dsp56k_core* cpustate, const UINT16 op, const UINT16 op2);
-static UINT16 decode_BBB_bitmask(dsp56k_core* cpustate, UINT16 BBB, UINT16 *iVal);
-static int decode_cccc_table(dsp56k_core* cpustate, UINT16 cccc);
-static void decode_DDDDD_table(dsp56k_core* cpustate, UINT16 DDDDD, typed_pointer* ret);
-static void decode_DD_table(dsp56k_core* cpustate, UINT16 DD, typed_pointer* ret);
-static void decode_DDF_table(dsp56k_core* cpustate, UINT16 DD, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_F_table(dsp56k_core* cpustate, UINT16 F, typed_pointer* ret);
-static void decode_h0hF_table(dsp56k_core* cpustate, UINT16 h0h, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_HH_table(dsp56k_core* cpustate, UINT16 HH, typed_pointer* ret);
-static void decode_HHH_table(dsp56k_core* cpustate, UINT16 HHH, typed_pointer* ret);
-static void decode_IIII_table(dsp56k_core* cpustate, UINT16 IIII, typed_pointer* src_ret, typed_pointer* dst_ret, void* working);
-static void decode_JJJF_table(dsp56k_core* cpustate, UINT16 JJJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_JJF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_JF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working);
-static void decode_QQF_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D);
-static void decode_QQF_special_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D);
-static void decode_QQQF_table(dsp56k_core* cpustate, UINT16 QQQ, UINT16 F, void **S1, void **S2, void **D);
-static void decode_RR_table(dsp56k_core* cpustate, UINT16 RR, typed_pointer* ret);
-static void decode_TT_table(dsp56k_core* cpustate, UINT16 TT, typed_pointer* ret);
-static void decode_uuuuF_table(dsp56k_core* cpustate, UINT16 uuuu, UINT16 F, UINT8 add_sub_other, typed_pointer* src_ret, typed_pointer* dst_ret);
-static void decode_Z_table(dsp56k_core* cpustate, UINT16 Z, typed_pointer* ret);
-
-static void execute_m_table(dsp56k_core* cpustate, int x, UINT16 m);
-static void execute_mm_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 mm);
-static void execute_MM_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 MM);
-static UINT16 execute_q_table(dsp56k_core* cpustate, int RR, UINT16 q);
-static void execute_z_table(dsp56k_core* cpustate, int RR, UINT16 z);
-
-static UINT16 assemble_address_from_Pppppp_table(dsp56k_core* cpustate, UINT16 P, UINT16 ppppp);
-static UINT16 assemble_address_from_IO_short_address(dsp56k_core* cpustate, UINT16 pp);
-static UINT16 assemble_address_from_6bit_signed_relative_short_address(dsp56k_core* cpustate, UINT16 srs);
+static UINT16 decode_BBB_bitmask(dsp56k_core* cpustate, UINT16 BBB, UINT16 *iVal);
+static int decode_cccc_table(dsp56k_core* cpustate, UINT16 cccc);
+static void decode_DDDDD_table(dsp56k_core* cpustate, UINT16 DDDDD, typed_pointer* ret);
+static void decode_DD_table(dsp56k_core* cpustate, UINT16 DD, typed_pointer* ret);
+static void decode_DDF_table(dsp56k_core* cpustate, UINT16 DD, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_F_table(dsp56k_core* cpustate, UINT16 F, typed_pointer* ret);
+static void decode_h0hF_table(dsp56k_core* cpustate, UINT16 h0h, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_HH_table(dsp56k_core* cpustate, UINT16 HH, typed_pointer* ret);
+static void decode_HHH_table(dsp56k_core* cpustate, UINT16 HHH, typed_pointer* ret);
+static void decode_IIII_table(dsp56k_core* cpustate, UINT16 IIII, typed_pointer* src_ret, typed_pointer* dst_ret, void* working);
+static void decode_JJJF_table(dsp56k_core* cpustate, UINT16 JJJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_JJF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_JF_table(dsp56k_core* cpustate, UINT16 JJ, UINT16 F, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working);
+static void decode_QQF_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D);
+static void decode_QQF_special_table(dsp56k_core* cpustate, UINT16 QQ, UINT16 F, void **S1, void **S2, void **D);
+static void decode_QQQF_table(dsp56k_core* cpustate, UINT16 QQQ, UINT16 F, void **S1, void **S2, void **D);
+static void decode_RR_table(dsp56k_core* cpustate, UINT16 RR, typed_pointer* ret);
+static void decode_TT_table(dsp56k_core* cpustate, UINT16 TT, typed_pointer* ret);
+static void decode_uuuuF_table(dsp56k_core* cpustate, UINT16 uuuu, UINT16 F, UINT8 add_sub_other, typed_pointer* src_ret, typed_pointer* dst_ret);
+static void decode_Z_table(dsp56k_core* cpustate, UINT16 Z, typed_pointer* ret);
+
+static void execute_m_table(dsp56k_core* cpustate, int x, UINT16 m);
+static void execute_mm_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 mm);
+static void execute_MM_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 MM);
+static UINT16 execute_q_table(dsp56k_core* cpustate, int RR, UINT16 q);
+static void execute_z_table(dsp56k_core* cpustate, int RR, UINT16 z);
+
+static UINT16 assemble_address_from_Pppppp_table(dsp56k_core* cpustate, UINT16 P, UINT16 ppppp);
+static UINT16 assemble_address_from_IO_short_address(dsp56k_core* cpustate, UINT16 pp);
+static UINT16 assemble_address_from_6bit_signed_relative_short_address(dsp56k_core* cpustate, UINT16 srs);
static void dsp56k_process_loop(dsp56k_core* cpustate);
static void dsp56k_process_rep(dsp56k_core* cpustate, size_t repSize);
@@ -281,11 +281,11 @@ static void execute_one(dsp56k_core* cpustate)
else if ((op & 0xe09f) == 0x6010)
{
/* Note: The opcode encoding : 011x xxxx 0xx1 0000 (move + double memory read)
- is .identical. to (tfr X0,A + two parallel reads). This sparks the notion
- that these 'move' opcodes don't actually exist and are just there as
- documentation. Real-world examples would need to be examined to come
- to a satisfactory conclusion, but as it stands, tfr will override this
- move operation. */
+ is .identical. to (tfr X0,A + two parallel reads). This sparks the notion
+ that these 'move' opcodes don't actually exist and are just there as
+ documentation. Real-world examples would need to be examined to come
+ to a satisfactory conclusion, but as it stands, tfr will override this
+ move operation. */
size = dsp56k_op_move_1(cpustate, op_byte, &d_register, &cycle_count);
}
/* MPY : 011m mKKK 1xx0 F0QQ : A-160 */
@@ -332,11 +332,11 @@ static void execute_one(dsp56k_core* cpustate)
/***************************************/
enum pType { kNoParallelDataMove,
- kRegisterToRegister,
- kAddressRegister,
- kXMemoryDataMove,
- kXMemoryDataMove2,
- kXMemoryDataMoveWithDisp };
+ kRegisterToRegister,
+ kAddressRegister,
+ kXMemoryDataMove,
+ kXMemoryDataMove2,
+ kXMemoryDataMoveWithDisp };
int parallelType = -1;
UINT16 op_byte = 0x0000;
@@ -380,10 +380,10 @@ static void execute_one(dsp56k_core* cpustate)
/* Now check it against all the other potential collisions */
/* This is necessary because "don't care bits" get in the way. */
/*
- MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152
- MOVE(C) : 0000 0101 BBBB BBBB 0011 1WDD DDD0 ---- : A-144
- MOVE : 0000 0101 BBBB BBBB ---- HHHW 0001 0001 : A-128
- */
+ MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152
+ MOVE(C) : 0000 0101 BBBB BBBB 0011 1WDD DDD0 ---- : A-144
+ MOVE : 0000 0101 BBBB BBBB ---- HHHW 0001 0001 : A-128
+ */
if (((op2 & 0xfe20) != 0x0200) &&
((op2 & 0xf810) != 0x3800) &&
((op2 & 0x00ff) != 0x0011))
@@ -611,7 +611,7 @@ static void execute_one(dsp56k_core* cpustate)
dsp56k_process_loop(cpustate);
dsp56k_process_rep(cpustate, size);
- cpustate->icount -= 4; /* Temporarily hard-coded at 4 clocks per opcode */ /* cycle_count */
+ cpustate->icount -= 4; /* Temporarily hard-coded at 4 clocks per opcode */ /* cycle_count */
return;
}
@@ -1087,7 +1087,7 @@ static void execute_one(dsp56k_core* cpustate)
if (size == 0x1337)
{
logerror("DSP56k: Unimplemented opcode at 0x%04x : %04x\n", PC, op);
- size = 1 ; /* Just to get the debugger past the bad opcode */
+ size = 1 ; /* Just to get the debugger past the bad opcode */
}
/* Must have been a good opcode */
@@ -1096,7 +1096,7 @@ static void execute_one(dsp56k_core* cpustate)
dsp56k_process_loop(cpustate);
dsp56k_process_rep(cpustate, size);
- cpustate->icount -= 4; /* Temporarily hard-coded at 4 clocks per opcode */ /* cycle_count */
+ cpustate->icount -= 4; /* Temporarily hard-coded at 4 clocks per opcode */ /* cycle_count */
}
@@ -1155,9 +1155,9 @@ static size_t dsp56k_op_addsub_2(dsp56k_core* cpustate, const UINT16 op_byte, ty
/* * * * * * * * * */
/* TODO S, L, E, U, V, C */
if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1205,10 +1205,10 @@ static size_t dsp56k_op_mac_1(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: +mv oscillator cycles */
+ cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
@@ -1259,10 +1259,10 @@ static size_t dsp56k_op_mpy_1(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: +mv oscillator cycles */
+ cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
@@ -1325,7 +1325,7 @@ static size_t dsp56k_op_clr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
DSP56K_Z_SET();
DSP56K_V_CLEAR();
- cycles += 2; /* TODO: + mv oscillator clock cycles */
+ cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
@@ -1361,9 +1361,9 @@ static size_t dsp56k_op_add(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* * * * * * * * * */
/* TODO S, L, E, U, V, C */
if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1379,7 +1379,7 @@ static size_t dsp56k_op_move(dsp56k_core* cpustate, const UINT16 op_byte, typed_
/* S L E U N Z V C */
/* * * - - - - - - */
/* TODO: S, L */
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1401,7 +1401,7 @@ static size_t dsp56k_op_tfr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * - - - - - - */
/* TODO: S, L */
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1429,7 +1429,7 @@ static size_t dsp56k_op_rnd(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
if ((*((UINT64*)D.addr)) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: + mv oscillator clock cycles */
+ cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
@@ -1453,7 +1453,7 @@ static size_t dsp56k_op_tst(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
DSP56K_V_CLEAR();
DSP56K_C_CLEAR();
- cycles += 2; /* TODO: + mv oscillator clock cycles */
+ cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
@@ -1478,12 +1478,12 @@ static size_t dsp56k_op_inc(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * * */
/* TODO: S, L, E, U */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
- cycles += 2; /* TODO: +mv oscillator cycles */
+ cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
@@ -1513,12 +1513,12 @@ static size_t dsp56k_op_inc24(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * ? * * */
/* TODO: S, L, E, U */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
if ((workBits24 & 0xff000000) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
if ((workBits24 & 0xff000000) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
- cycles += 2; /* TODO: + mv oscillator clock cycles */
+ cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
@@ -1542,11 +1542,11 @@ static size_t dsp56k_op_or(dsp56k_core* cpustate, const UINT16 op_byte, typed_po
/* S L E U N Z V C */
/* * * - - ? ? 0 - */
/* TODO: S, L */
- if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1574,11 +1574,11 @@ static size_t dsp56k_op_asr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* * * * * * * 0 ? */
/* TODO: S, L, E, U */
if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
- if (*p_accum & U64(0x0000000000000001)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
+ if (*p_accum & U64(0x0000000000000001)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1588,8 +1588,8 @@ static size_t dsp56k_op_asl(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * ? ? */
/* V - Set if an arithmetic overflow occurs in the 40 bit result. Also set if the most significant
- bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
- /* C - Set if bit 39 of source operand is set. Cleared otherwise. */
+ bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
+ /* C - Set if bit 39 of source operand is set. Cleared otherwise. */
return 0;
}
@@ -1614,11 +1614,11 @@ static size_t dsp56k_op_lsr(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* * * - - ? ? 0 ? */
/* TODO: S, L */
DSP56K_N_CLEAR();
- if (((PAIR64*)D.addr)->w.h == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (((PAIR64*)D.addr)->w.h == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
- if (*p_accum & U64(0x0000000000010000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
+ if (*p_accum & U64(0x0000000000010000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1649,7 +1649,7 @@ static size_t dsp56k_op_subl(dsp56k_core* cpustate, const UINT16 op_byte, typed_
/* S L E U N Z V C */
/* * * * * * * ? * */
/* V - Set if an arithmetic overflow occurs in the 40 bit result. Also set if the most significant
- bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
+ bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
return 0;
}
@@ -1688,11 +1688,11 @@ static size_t dsp56k_op_sub(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* * * * * * * * * */
/* TODO S, L, E, U */
if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if ( *((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if ( *((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
if ((*((UINT64*)D.addr) & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1756,7 +1756,7 @@ static size_t dsp56k_op_cmp(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
if ((result & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
- cycles += 2; /* TODO: + mv oscillator clock cycles */
+ cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
@@ -1785,11 +1785,11 @@ static size_t dsp56k_op_not(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * - - ? ? 0 - */
/* TODO: S?, L */
- if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1815,7 +1815,7 @@ static size_t dsp56k_op_dec24(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* TODO: I wonder if workBits24 should be signed? */
workBits24 = ((*((UINT64*)D.addr)) & U64(0x000000ffffff0000)) >> 16;
workBits24--;
- workBits24 &= 0x00ffffff; /* Solves -x issues */
+ workBits24 &= 0x00ffffff; /* Solves -x issues */
/* Set the D bits with the dec result */
*((UINT64*)D.addr) &= U64(0x000000000000ffff);
@@ -1827,10 +1827,10 @@ static size_t dsp56k_op_dec24(dsp56k_core* cpustate, const UINT16 op_byte, typed
/* S L E U N Z V C */
/* * * * * * ? * * */
/* TODO: S, L, E, U, V, C */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: + mv oscillator clock cycles */
+ cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
@@ -1854,11 +1854,11 @@ static size_t dsp56k_op_and(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * - - ? ? 0 - */
/* TODO: S, L */
- if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D.addr) & U64(0x0000000080000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr) & U64(0x00000000ffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
- cycles += 2; /* TODO: + mv oscillator cycles */
+ cycles += 2; /* TODO: + mv oscillator cycles */
return 1;
}
@@ -1893,11 +1893,11 @@ static size_t dsp56k_op_abs(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, U */
- if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D.addr) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- if ((*p_accum) == U64(0x0000008000000000)) DSP56K_V_SET(); else DSP56K_V_CLEAR();
+ if ((*p_accum) == U64(0x0000008000000000)) DSP56K_V_SET(); else DSP56K_V_CLEAR();
- cycles += 2; /* TODO: + mv oscillator clock cycles */
+ cycles += 2; /* TODO: + mv oscillator clock cycles */
return 1;
}
@@ -1920,7 +1920,7 @@ static size_t dsp56k_op_rol(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* N - Set if bit 31 of the result is set. Cleared otherwise. */
/* Z - Set if bits 16-31 of the result are zero. Cleared otherwise. */
/* C - Set if bit 31 of the source operand is set. Cleared otherwise. */
- return 0;
+ return 0;
}
/* CMPM : .... .... 0111 FJJJ : A-66 */
@@ -1976,12 +1976,12 @@ static size_t dsp56k_op_cmpm(dsp56k_core* cpustate, const UINT16 op_byte, typed_
/* S L E U N Z V C */
/* * * * * * * * * */
/* TODO: S, L, E, U */
- if ( (absResult) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( (absResult) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if (((absResult) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
if ( (absResult & U64(0xffffff0000000000)) != 0) DSP56K_V_SET(); else DSP56K_V_CLEAR();
if ( (absResult & U64(0xffffff0000000000)) != 0) DSP56K_C_SET(); else DSP56K_C_CLEAR();
- cycles += 2; /* TODO: +mv oscillator cycles */
+ cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
@@ -2018,10 +2018,10 @@ static size_t dsp56k_op_mpy(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: +mv oscillator cycles */
+ cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
@@ -2084,10 +2084,10 @@ static size_t dsp56k_op_mac(dsp56k_core* cpustate, const UINT16 op_byte, typed_p
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: +mv oscillator cycles */
+ cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
@@ -2150,10 +2150,10 @@ static size_t dsp56k_op_macr(dsp56k_core* cpustate, const UINT16 op_byte, typed_
/* S L E U N Z V C */
/* * * * * * * * - */
/* TODO: S, L, E, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
- cycles += 2; /* TODO: +mv oscillator cycles */
+ cycles += 2; /* TODO: +mv oscillator cycles */
return 1;
}
@@ -2178,15 +2178,15 @@ static size_t dsp56k_op_andi(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* There is not currently a good way to refer to CCR or MR. Explicitly decode here. */
switch(BITS(op,0x0600))
{
- case 0x01: /* MR */
+ case 0x01: /* MR */
SR &= ((immediate << 8) | 0x00ff);
break;
- case 0x02: /* CCR */
+ case 0x02: /* CCR */
SR &= (immediate | 0xff00);
break;
- case 0x03: /* OMR */
+ case 0x03: /* OMR */
OMR &= (UINT8)(immediate);
break;
@@ -2197,7 +2197,7 @@ static size_t dsp56k_op_andi(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* S L E U N Z V C */
/* - ? ? ? ? ? ? ? */
/* All ? bits - Cleared if the corresponding bit in the immediate data is cleared and if the operand
- is the CCR. Not affected otherwise. */
+ is the CCR. Not affected otherwise. */
cycles += 2;
return 1;
}
@@ -2218,12 +2218,12 @@ static size_t dsp56k_op_asl4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* - ? * * * * ? ? */
/* TODO: L, E, U */
/* V - Set if an arithmetic overflow occurs in the 40 bit result. Also set if bit 35 through 39 are
- not the same. */
+ not the same. */
/* C - Set if bit 36 of source operand is set. Cleared otherwise. */
if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
if ( (*((UINT64*)D.addr) & U64(0x000000ff00000000)) != (p_accum & U64(0x000000ff00000000)) ) DSP56K_V_SET(); else DSP56K_V_CLEAR();
- if (p_accum & U64(0x0000001000000000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
+ if (p_accum & U64(0x0000001000000000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
cycles += 2;
return 1;
@@ -2252,9 +2252,9 @@ static size_t dsp56k_op_asr4(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* TODO: E, U */
/* C - Set if bit 3 of source operand is set. Cleared otherwise. */
if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
- if (p_accum & U64(0x0000000000000008)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
+ if (p_accum & U64(0x0000000000000008)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
cycles += 2;
return 1;
@@ -2281,9 +2281,9 @@ static size_t dsp56k_op_asr16(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
/* - * * * * * 0 ? */
/* TODO: E, U */
if (*((UINT64*)D.addr) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
- if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
+ if (*((UINT64*)D.addr) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
- if (backupVal & U64(0x0000000000008000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
+ if (backupVal & U64(0x0000000000008000)) DSP56K_C_SET(); else DSP56K_C_CLEAR();
cycles += 2;
return 1;
@@ -2310,19 +2310,19 @@ static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const UINT16 op, const UINT1
switch(BITS(op2, 0x1f00))
{
- case 0x12: /* BFCHG */
+ case 0x12: /* BFCHG */
workingWord ^= iVal;
break;
- case 0x04: /* BFCLR */
+ case 0x04: /* BFCLR */
workingWord = workingWord & (~iVal);
break;
- case 0x18: /* BFSET */
+ case 0x18: /* BFSET */
workingWord = workingWord | iVal;
break;
- case 0x10: /* BFTSTH */
+ case 0x10: /* BFTSTH */
/* Just the test below */
break;
- case 0x00: /* BFTSTL */
+ case 0x00: /* BFTSTL */
/* Just the test below */
break;
}
@@ -2336,19 +2336,19 @@ static size_t dsp56k_op_bfop(dsp56k_core* cpustate, const UINT16 op, const UINT1
/* TODO: L */
switch(BITS(op2, 0x1f00))
{
- case 0x12: /* BFCHG */
+ case 0x12: /* BFCHG */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x04: /* BFCLR */
+ case 0x04: /* BFCLR */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x18: /* BFSET */
+ case 0x18: /* BFSET */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x10: /* BFTSTH */
+ case 0x10: /* BFTSTH */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x00: /* BFTSTL */
+ case 0x00: /* BFTSTL */
if ((iVal & previousValue) == 0x0000) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
}
- cycles += 4; /* TODO: + mvb oscillator clock cycles */
+ cycles += 4; /* TODO: + mvb oscillator clock cycles */
return 2;
}
@@ -2376,19 +2376,19 @@ static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const UINT16 op, const UIN
switch(BITS(op2, 0x1f00))
{
- case 0x12: /* BFCHG */
+ case 0x12: /* BFCHG */
workingWord ^= iVal;
break;
- case 0x04: /* BFCLR */
+ case 0x04: /* BFCLR */
workingWord = workingWord & (~iVal);
break;
- case 0x18: /* BFSET */
+ case 0x18: /* BFSET */
workingWord = workingWord | iVal;
break;
- case 0x10: /* BFTSTH */
+ case 0x10: /* BFTSTH */
/* Just the test below */
break;
- case 0x00: /* BFTSTL */
+ case 0x00: /* BFTSTL */
/* Just the test below */
break;
}
@@ -2402,19 +2402,19 @@ static size_t dsp56k_op_bfop_1(dsp56k_core* cpustate, const UINT16 op, const UIN
/* TODO: L */
switch(BITS(op2, 0x1f00))
{
- case 0x12: /* BFCHG */
+ case 0x12: /* BFCHG */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x04: /* BFCLR */
+ case 0x04: /* BFCLR */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x18: /* BFSET */
+ case 0x18: /* BFSET */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x10: /* BFTSTH */
+ case 0x10: /* BFTSTH */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x00: /* BFTSTL */
+ case 0x00: /* BFTSTL */
if ((iVal & previousValue) == 0x0000) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
}
- cycles += 4; /* TODO: + mvb oscillator clock cycles */
+ cycles += 4; /* TODO: + mvb oscillator clock cycles */
return 2;
}
@@ -2444,19 +2444,19 @@ static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const UINT16 op, const UIN
switch(BITS(op2, 0x1f00))
{
- case 0x12: /* BFCHG */
+ case 0x12: /* BFCHG */
workingWord ^= iVal;
break;
- case 0x04: /* BFCLR */
+ case 0x04: /* BFCLR */
workingWord = workingWord & (~iVal);
break;
- case 0x18: /* BFSET */
+ case 0x18: /* BFSET */
workingWord = workingWord | iVal;
break;
- case 0x10: /* BFTSTH */
+ case 0x10: /* BFTSTH */
/* Just the test below */
break;
- case 0x00: /* BFTSTL */
+ case 0x00: /* BFTSTL */
/* Just the test below */
break;
}
@@ -2472,19 +2472,19 @@ static size_t dsp56k_op_bfop_2(dsp56k_core* cpustate, const UINT16 op, const UIN
/* TODO: L */
switch(BITS(op2, 0x1f00))
{
- case 0x12: /* BFCHG */
+ case 0x12: /* BFCHG */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x04: /* BFCLR */
+ case 0x04: /* BFCLR */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x18: /* BFSET */
+ case 0x18: /* BFSET */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x10: /* BFTSTH */
+ case 0x10: /* BFTSTH */
if ((iVal & previousValue) == iVal) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
- case 0x00: /* BFTSTL */
+ case 0x00: /* BFTSTL */
if ((iVal & previousValue) == 0x0000) DSP56K_C_SET(); else DSP56K_C_CLEAR(); break;
}
- cycles += 4; /* TODO: + mvb oscillator clock cycles */
+ cycles += 4; /* TODO: + mvb oscillator clock cycles */
return 2;
}
@@ -2598,7 +2598,7 @@ static size_t dsp56k_op_brkcc(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
cpustate->ppc = PC;
PC = LA;
- SR = SSL; /* TODO: A-83. I believe only the Loop Flag and Forever Flag come back here. */
+ SR = SSL; /* TODO: A-83. I believe only the Loop Flag and Forever Flag come back here. */
SP--;
LA = SSH;
@@ -2640,13 +2640,13 @@ static size_t dsp56k_op_bscc(dsp56k_core* cpustate, const UINT16 op, const UINT1
/* S L E U N Z V C */
/* - - - - - - - - */
- cycles += 4; /* TODO: + jx oscillator clock cycles */
+ cycles += 4; /* TODO: + jx oscillator clock cycles */
return 0;
}
/* S L E U N Z V C */
/* - - - - - - - - */
- cycles += 4; /* TODO: + jx oscillator clock cycles */
+ cycles += 4; /* TODO: + jx oscillator clock cycles */
return 2;
}
@@ -2675,7 +2675,7 @@ static size_t dsp56k_op_bsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
/* S L E U N Z V C */
/* - - - - - - - - */
- cycles += 4; /* TODO: + jx oscillator clock cycles */
+ cycles += 4; /* TODO: + jx oscillator clock cycles */
return 0;
}
@@ -2693,11 +2693,11 @@ static size_t dsp56k_op_chkaau(dsp56k_core* cpustate, const UINT16 op, UINT8* cy
/* S L E U N Z V C */
/* - - - - ? ? ? - */
/* V - Set if the result of the last address ALU update performed a modulo wrap. Cleared if
- result of the last address ALU did not perform a modulo wrap.*/
+ result of the last address ALU did not perform a modulo wrap.*/
/* Z - Set if the result of the last address ALU update is 0. Cleared if the result of the last
- address ALU is positive. */
+ address ALU is positive. */
/* N - Set if the result of the last address ALU update is negative. Cleared if the result of the
- last address ALU is positive. */
+ last address ALU is positive. */
return 0;
}
@@ -2730,7 +2730,7 @@ static size_t dsp56k_op_div(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
/* S L E U N Z V C */
/* - * - - - - ? ? */
/* V - Set if an arithmetic overflow occurs in the 40 bit result. Also set if the most significantst
- bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
+ bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
/* C - Set if bit 39 of the result is cleared. Cleared otherwise. */
cycles += 2;
return 1;
@@ -2781,7 +2781,7 @@ static size_t dsp56k_op_dmac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* S L E U N Z V C */
/* - * * * * * * - */
/* TODO: L, E, U, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2;
@@ -2806,17 +2806,17 @@ static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const UINT16 op, const UINT1
if (iValue != 0x00)
{
/* First instruction cycle */
- SP++; /* TODO: Should i really inc here first? */
+ SP++; /* TODO: Should i really inc here first? */
SSH = LA;
SSL = LC;
LC = (UINT16)iValue;
/* Second instruction cycle */
- SP++; /* TODO: See above */
- SSH = PC + 2; /* Keep these stack entries in 'word-based-index' space */
+ SP++; /* TODO: See above */
+ SSH = PC + 2; /* Keep these stack entries in 'word-based-index' space */
SSL = SR;
- LA = PC + 2 + op2; /* TODO: The docs subtract 1 from here? */
+ LA = PC + 2 + op2; /* TODO: The docs subtract 1 from here? */
/* Third instruction cycle */
@@ -2830,7 +2830,7 @@ static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const UINT16 op, const UINT1
/* - * - - - - - - */
/* TODO : L */
- cycles += 6; /* TODO: + mv oscillator cycles */
+ cycles += 6; /* TODO: + mv oscillator cycles */
retSize = 2;
}
else
@@ -2839,7 +2839,7 @@ static size_t dsp56k_op_do_1(dsp56k_core* cpustate, const UINT16 op, const UINT1
cpustate->ppc = PC;
PC = PC + 2 + op2;
- cycles += 10; /* TODO: + mv oscillator cycles */
+ cycles += 10; /* TODO: + mv oscillator cycles */
retSize = 0;
}
@@ -2858,10 +2858,10 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
/* TODO: There are other cases besides A&B this code won't work. */
if (S.addr == &A) lValue = *((UINT16*)(&A1));
else if (S.addr == &B) lValue = *((UINT16*)(&B1));
- else lValue = *((UINT16*)S.addr);
+ else lValue = *((UINT16*)S.addr);
/* HACK */
- if (lValue >= 0xfff0)
+ if (lValue >= 0xfff0)
{
logerror("Dsp56k : DO_2 operation changed %04x to 0000.\n", lValue);
lValue = 0x0000;
@@ -2879,17 +2879,17 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
if (lValue != 0x00)
{
/* First instruction cycle */
- SP++; /* TODO: Should i really inc here first? */
+ SP++; /* TODO: Should i really inc here first? */
SSH = LA;
SSL = LC;
LC = (UINT16)lValue;
/* Second instruction cycle */
- SP++; /* TODO: See above */
- SSH = PC + 2; /* Keep these stack entries in 'word-based-index' space */
+ SP++; /* TODO: See above */
+ SSH = PC + 2; /* Keep these stack entries in 'word-based-index' space */
SSL = SR;
- LA = PC + 2 + op2; /* TODO: The docs subtract 1 from here? */
+ LA = PC + 2 + op2; /* TODO: The docs subtract 1 from here? */
/* Third instruction cycle */
@@ -2900,7 +2900,7 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
/* - * - - - - - - */
/* TODO : L */
- cycles += 6; /* TODO: + mv oscillator cycles */
+ cycles += 6; /* TODO: + mv oscillator cycles */
retSize = 2;
}
else
@@ -2909,7 +2909,7 @@ static size_t dsp56k_op_do_2(dsp56k_core* cpustate, const UINT16 op, const UINT1
cpustate->ppc = PC;
PC = PC + 2 + op2;
- cycles += 10; /* TODO: + mv oscillator cycles */
+ cycles += 10; /* TODO: + mv oscillator cycles */
retSize = 0;
}
@@ -3008,7 +3008,7 @@ static size_t dsp56k_op_imac(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* - * ? ? * ? ? - */
/* TODO: L */
/* U,E - Will not be set correctly by this instruction*/
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffff0000)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
DSP56K_V_CLEAR();
@@ -3052,7 +3052,7 @@ static size_t dsp56k_op_jmp(dsp56k_core* cpustate, const UINT16 op, const UINT16
/* S L E U N Z V C */
/* - - - - - - - - */
- cycles += 4; /* TODO: + jx */
+ cycles += 4; /* TODO: + jx */
return 0;
}
@@ -3068,7 +3068,7 @@ static size_t dsp56k_op_jmp_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
/* S L E U N Z V C */
/* - - - - - - - - */
- cycles += 4; /* TODO: + jx */
+ cycles += 4; /* TODO: + jx */
return 0;
}
@@ -3092,12 +3092,12 @@ static size_t dsp56k_op_jscc(dsp56k_core* cpustate, const UINT16 op, const UINT1
cpustate->ppc = PC;
PC = branchOffset;
- cycles += 4; /* TODO: +jx oscillator clock cycles */
+ cycles += 4; /* TODO: +jx oscillator clock cycles */
return 0;
}
else
{
- cycles += 4; /* TODO: +jx oscillator clock cycles */
+ cycles += 4; /* TODO: +jx oscillator clock cycles */
return 2;
}
@@ -3147,7 +3147,7 @@ static size_t dsp56k_op_jsr(dsp56k_core* cpustate, const UINT16 op, const UINT16
/* S L E U N Z V C */
/* - - - - - - - - */
- cycles += 4; /* TODO: + jx oscillator cycles */
+ cycles += 4; /* TODO: + jx oscillator cycles */
return 0;
}
@@ -3190,9 +3190,9 @@ static size_t dsp56k_op_lea(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
/* MM table */
switch(BITS(op,0x000c))
{
- case 0x0: ea = *rX; break;
- case 0x1: ea = *rX + 1; break;
- case 0x2: ea = *rX - 1; break;
+ case 0x0: ea = *rX; break;
+ case 0x1: ea = *rX + 1; break;
+ case 0x2: ea = *rX - 1; break;
case 0x3: ea = *rX + *nX; break;
}
@@ -3250,7 +3250,7 @@ static size_t dsp56k_op_macsuuu(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* S L E U N Z V C */
/* - * * * * * * - */
/* TODO: L, E, U, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2;
@@ -3295,15 +3295,15 @@ static size_t dsp56k_op_movec(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
/* S L E U N Z V C */
/* * ? ? ? ? ? ? ? */
/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
- bit of the source operand. If SR is not specified as a destination operand, L is set if data
- limiting occurred. All ? bits are not affected otherwise.*/
+ bit of the source operand. If SR is not specified as a destination operand, L is set if data
+ limiting occurred. All ? bits are not affected otherwise.*/
if (W && (SD.addr != &SR))
{
/* If you're writing to something other than the SR */
/* TODO */
}
- cycles += 2; /* TODO: + mvc */
+ cycles += 2; /* TODO: + mvc */
return 1;
}
@@ -3336,15 +3336,15 @@ static size_t dsp56k_op_movec_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* S L E U N Z V C */
/* * ? ? ? ? ? ? ? */
/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
- bit of the source operand. If SR is not specified as a destination operand, L is set if data
- limiting occurred. All ? bits are not affected otherwise.*/
+ bit of the source operand. If SR is not specified as a destination operand, L is set if data
+ limiting occurred. All ? bits are not affected otherwise.*/
if (W && (SD.addr != &SR))
{
/* If you're writing to something other than the SR */
/* TODO */
}
- cycles += 2; /* + mvc oscillator clock cycles */
+ cycles += 2; /* + mvc oscillator clock cycles */
return 1;
}
@@ -3381,15 +3381,15 @@ static size_t dsp56k_op_movec_2(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* S L E U N Z V C */
/* * ? ? ? ? ? ? ? */
/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
- bit of the source operand. If SR is not specified as a destination operand, L is set if data
- limiting occurred. All ? bits are not affected otherwise.*/
+ bit of the source operand. If SR is not specified as a destination operand, L is set if data
+ limiting occurred. All ? bits are not affected otherwise.*/
if (W && (SD.addr != &SR))
{
/* If you're writing to something other than the SR */
/* TODO */
}
- cycles += 2; /* + mvc oscillator clock cycles */
+ cycles += 2; /* + mvc oscillator clock cycles */
return 1;
}
@@ -3439,15 +3439,15 @@ static size_t dsp56k_op_movec_3(dsp56k_core* cpustate, const UINT16 op, const UI
/* S L E U N Z V C */
/* * ? ? ? ? ? ? ? */
/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
- bit of the source operand. If SR is not specified as a destination operand, L is set if data
- limiting occurred. All ? bits are not affected otherwise.*/
+ bit of the source operand. If SR is not specified as a destination operand, L is set if data
+ limiting occurred. All ? bits are not affected otherwise.*/
if (W && (SD.addr != &SR))
{
/* If you're writing to something other than the SR */
/* TODO */
}
- cycles += 2; /* TODO: + mvc */
+ cycles += 2; /* TODO: + mvc */
return 2;
}
@@ -3465,8 +3465,8 @@ static size_t dsp56k_op_movec_4(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* S L E U N Z V C */
/* * ? ? ? ? ? ? ? */
/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
- bit of the source operand. If SR is not specified as a destination operand, L is set if data
- limiting occurred. All ? bits are not affected otherwise.*/
+ bit of the source operand. If SR is not specified as a destination operand, L is set if data
+ limiting occurred. All ? bits are not affected otherwise.*/
if (D.addr != &SR)
{
/* If you're writing to something other than the SR */
@@ -3509,15 +3509,15 @@ static size_t dsp56k_op_movec_5(dsp56k_core* cpustate, const UINT16 op, const UI
/* S L E U N Z V C */
/* * ? ? ? ? ? ? ? */
/* All ? bits - If SR is specified as a destination operand, set according to the corresponding
- bit of the source operand. If SR is not specified as a destination operand, L is set if data
- limiting occurred. All ? bits are not affected otherwise.*/
+ bit of the source operand. If SR is not specified as a destination operand, L is set if data
+ limiting occurred. All ? bits are not affected otherwise.*/
if (W && (SD.addr != &SR))
{
/* If you're writing to something other than the SR */
/* TODO */
}
- cycles += 2; /* TODO: + mvc oscillator clock cycles */
+ cycles += 2; /* TODO: + mvc oscillator clock cycles */
return 2;
}
@@ -3574,7 +3574,7 @@ static size_t dsp56k_op_movem(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
/* S L E U N Z V C */
/* * * - - - - - - */
/* TODO: S, L */
- cycles += 2; /* TODO: + mvm oscillator clock cycles */
+ cycles += 2; /* TODO: + mvm oscillator clock cycles */
return 1;
}
@@ -3628,7 +3628,7 @@ static size_t dsp56k_op_movep(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
/* * * - - - - - - */
/* TODO: S, L */
- cycles += 4; /* TODO: + mvp oscillator cycles */
+ cycles += 4; /* TODO: + mvp oscillator cycles */
return 1;
}
@@ -3670,7 +3670,7 @@ static size_t dsp56k_op_movep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* S L E U N Z V C */
/* * * - - - - - - */
/* TODO: S, L */
- cycles += 4; /* TODO: + mvp oscillator cycles */
+ cycles += 4; /* TODO: + mvp oscillator cycles */
return 1;
}
@@ -3721,7 +3721,7 @@ static size_t dsp56k_op_mpysuuu(dsp56k_core* cpustate, const UINT16 op, UINT8* c
/* S L E U N Z V C */
/* - * * * * * * - */
/* TODO: L, E, U, V */
- if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
+ if ( *((UINT64*)D) & U64(0x0000008000000000)) DSP56K_N_SET(); else DSP56K_N_CLEAR();
if ((*((UINT64*)D) & U64(0x000000ffffffffff)) == 0) DSP56K_Z_SET(); else DSP56K_Z_CLEAR();
cycles += 2;
@@ -3750,7 +3750,7 @@ static size_t dsp56k_op_norm(dsp56k_core* cpustate, const UINT16 op, UINT8* cycl
/* S L E U N Z V C */
/* - * * * * * ? - */
/* V - Set if an arithmetic overflow occurs in the 40 bit result. Also set if the most significantst
- bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
+ bit of the destination operand is changed as a result of the left shift. Cleared otherwise. */
return 0;
}
@@ -3760,7 +3760,7 @@ static size_t dsp56k_op_ori(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
/* S L E U N Z V C */
/* - ? ? ? ? ? ? ? */
/* All ? bits - Set if the corresponding bit in the immediate data is set and if the operand is the
- CCR. Not affected otherwise. */
+ CCR. Not affected otherwise. */
return 0;
}
@@ -3786,17 +3786,17 @@ static size_t dsp56k_op_rep_1(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
cpustate->repFlag = 1;
cpustate->repAddr = PC + ADDRESS(1);
- cycles += 4; /* TODO: + mv oscillator clock cycles */
+ cycles += 4; /* TODO: + mv oscillator clock cycles */
}
else
{
- cycles += 6; /* TODO: + mv oscillator clock cycles */
+ cycles += 6; /* TODO: + mv oscillator clock cycles */
}
/* S L E U N Z V C */
/* - * - - - - - - */
- /* TODO: L */
+ /* TODO: L */
return 1;
}
@@ -3822,11 +3822,11 @@ static size_t dsp56k_op_rep_2(dsp56k_core* cpustate, const UINT16 op, UINT8* cyc
cpustate->repFlag = 1;
cpustate->repAddr = PC + ADDRESS(1);
- cycles += 4; /* TODO: + mv oscillator clock cycles */
+ cycles += 4; /* TODO: + mv oscillator clock cycles */
}
else
{
- cycles += 6; /* TODO: + mv oscillator clock cycles */
+ cycles += 6; /* TODO: + mv oscillator clock cycles */
}
/* S L E U N Z V C */
@@ -3870,7 +3870,7 @@ static size_t dsp56k_op_rti(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
/* S L E U N Z V C */
/* ? ? ? ? ? ? ? ? */
/* All ? bits - Set according to value pulled from the stack. */
- cycles += 4; /* TODO: + rx oscillator clock cycles */
+ cycles += 4; /* TODO: + rx oscillator clock cycles */
return 0;
}
@@ -3887,7 +3887,7 @@ static size_t dsp56k_op_rts(dsp56k_core* cpustate, const UINT16 op, UINT8* cycle
/* S L E U N Z V C */
/* - - - - - - - - */
- cycles += 4; /* TODO: + rx oscillator clock cycles */
+ cycles += 4; /* TODO: + rx oscillator clock cycles */
return 0;
}
@@ -4030,22 +4030,22 @@ static int decode_cccc_table(dsp56k_core* cpustate, UINT16 cccc)
switch (cccc)
{
/* Arranged according to mnemonic table - not decoding table */
- case 0x0: if( C() == 0) retVal = 1; break; /* cc(hs) */
- case 0x8: if( C() == 1) retVal = 1; break; /* cs(lo) */
- case 0x5: if( E() == 0) retVal = 1; break; /* ec */
- case 0xa: if( Z() == 1) retVal = 1; break; /* eq */
- case 0xd: if( E() == 1) retVal = 1; break; /* es */
- case 0x1: if((N() ^ V()) == 0) retVal = 1; break; /* ge */
- case 0x7: if((Z() | (N() ^ V())) == 0) retVal = 1; break; /* gt */
- case 0x6: if( L() == 0) retVal = 1; break; /* lc */
- case 0xf: if((Z() | (N() ^ V())) == 1) retVal = 1; break; /* le */
- case 0xe: if( L() == 1) retVal = 1; break; /* ls */
- case 0x9: if((N() ^ V()) == 1) retVal = 1; break; /* lt */
- case 0xb: if( N() == 1) retVal = 1; break; /* mi */
- case 0x2: if( Z() == 0) retVal = 1; break; /* ne */
- case 0xc: if((Z() | ((!U()) & (!E()))) == 1) retVal = 1; break; /* nr */
- case 0x3: if( N() == 0) retVal = 1; break; /* pl */
- case 0x4: if((Z() | ((!U()) & (!E()))) == 0) retVal = 1; break; /* nn */
+ case 0x0: if( C() == 0) retVal = 1; break; /* cc(hs) */
+ case 0x8: if( C() == 1) retVal = 1; break; /* cs(lo) */
+ case 0x5: if( E() == 0) retVal = 1; break; /* ec */
+ case 0xa: if( Z() == 1) retVal = 1; break; /* eq */
+ case 0xd: if( E() == 1) retVal = 1; break; /* es */
+ case 0x1: if((N() ^ V()) == 0) retVal = 1; break; /* ge */
+ case 0x7: if((Z() | (N() ^ V())) == 0) retVal = 1; break; /* gt */
+ case 0x6: if( L() == 0) retVal = 1; break; /* lc */
+ case 0xf: if((Z() | (N() ^ V())) == 1) retVal = 1; break; /* le */
+ case 0xe: if( L() == 1) retVal = 1; break; /* ls */
+ case 0x9: if((N() ^ V()) == 1) retVal = 1; break; /* lt */
+ case 0xb: if( N() == 1) retVal = 1; break; /* mi */
+ case 0x2: if( Z() == 0) retVal = 1; break; /* ne */
+ case 0xc: if((Z() | ((!U()) & (!E()))) == 1) retVal = 1; break; /* nr */
+ case 0x3: if( N() == 0) retVal = 1; break; /* pl */
+ case 0x4: if((Z() | ((!U()) & (!E()))) == 0) retVal = 1; break; /* nn */
}
return retVal;
@@ -4250,7 +4250,7 @@ static void decode_JF_table(dsp56k_core* cpustate, UINT16 J, UINT16 F, typed_poi
}
}
-static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working)
+static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* dst_ret1, typed_pointer* dst_ret2, void* working)
{
void *opposite = 0x00 ;
@@ -4260,13 +4260,13 @@ static void decode_KKK_table(dsp56k_core* cpustate, UINT16 KKK, typed_pointer* d
switch(KKK)
{
case 0x0: dst_ret1->addr = opposite; dst_ret1->data_type = DT_LONG_WORD; dst_ret2->addr = &X0; dst_ret2->data_type = DT_WORD; break;
- case 0x1: dst_ret1->addr = &Y0; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X0; dst_ret2->data_type = DT_WORD; break;
- case 0x2: dst_ret1->addr = &X1; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X0; dst_ret2->data_type = DT_WORD; break;
- case 0x3: dst_ret1->addr = &Y1; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X0; dst_ret2->data_type = DT_WORD; break;
- case 0x4: dst_ret1->addr = &X0; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X1; dst_ret2->data_type = DT_WORD; break;
- case 0x5: dst_ret1->addr = &Y0; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X1; dst_ret2->data_type = DT_WORD; break;
+ case 0x1: dst_ret1->addr = &Y0; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X0; dst_ret2->data_type = DT_WORD; break;
+ case 0x2: dst_ret1->addr = &X1; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X0; dst_ret2->data_type = DT_WORD; break;
+ case 0x3: dst_ret1->addr = &Y1; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X0; dst_ret2->data_type = DT_WORD; break;
+ case 0x4: dst_ret1->addr = &X0; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X1; dst_ret2->data_type = DT_WORD; break;
+ case 0x5: dst_ret1->addr = &Y0; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X1; dst_ret2->data_type = DT_WORD; break;
case 0x6: dst_ret1->addr = opposite; dst_ret1->data_type = DT_LONG_WORD; dst_ret2->addr = &Y0; dst_ret2->data_type = DT_WORD; break;
- case 0x7: dst_ret1->addr = &Y1; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X1; dst_ret2->data_type = DT_WORD; break;
+ case 0x7: dst_ret1->addr = &Y1; dst_ret1->data_type = DT_WORD; dst_ret2->addr = &X1; dst_ret2->data_type = DT_WORD; break;
}
}
@@ -4364,65 +4364,65 @@ static void decode_uuuuF_table(dsp56k_core* cpustate, UINT16 uuuu, UINT16 F, UIN
switch(switchVal)
{
case 0x00: add_sub_other = OP_ADD;
- src_ret->addr = &X0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x08: add_sub_other = OP_SUB;
- src_ret->addr = &X0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x01: add_sub_other = OP_ADD;
- src_ret->addr = &X0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x09: add_sub_other = OP_SUB;
- src_ret->addr = &X0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x02: add_sub_other = OP_ADD;
- src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x0a: add_sub_other = OP_SUB;
- src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x03: add_sub_other = OP_ADD;
- src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x0b: add_sub_other = OP_SUB;
- src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y0; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x04: add_sub_other = OP_ADD;
- src_ret->addr = &X1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x0c: add_sub_other = OP_SUB;
- src_ret->addr = &X1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x05: add_sub_other = OP_ADD;
- src_ret->addr = &X1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x0d: add_sub_other = OP_SUB;
- src_ret->addr = &X1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &X1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x06: add_sub_other = OP_ADD;
- src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x0e: add_sub_other = OP_SUB;
- src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x07: add_sub_other = OP_ADD;
- src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x0f: add_sub_other = OP_SUB;
- src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &Y1; src_ret->data_type = DT_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x18: add_sub_other = OP_ADD;
- src_ret->addr = &B; src_ret->data_type = DT_LONG_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &B; src_ret->data_type = DT_LONG_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x1a: add_sub_other = OP_SUB;
- src_ret->addr = &B; src_ret->data_type = DT_LONG_WORD;
- dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &B; src_ret->data_type = DT_LONG_WORD;
+ dst_ret->addr = &A; dst_ret->data_type = DT_LONG_WORD; break;
case 0x19: add_sub_other = OP_ADD;
- src_ret->addr = &A; src_ret->data_type = DT_LONG_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &A; src_ret->data_type = DT_LONG_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
case 0x1b: add_sub_other = OP_SUB;
- src_ret->addr = &A; src_ret->data_type = DT_LONG_WORD;
- dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
+ src_ret->addr = &A; src_ret->data_type = DT_LONG_WORD;
+ dst_ret->addr = &B; dst_ret->data_type = DT_LONG_WORD; break;
}
}
@@ -4471,10 +4471,10 @@ static void execute_mm_table(dsp56k_core* cpustate, UINT16 rnum, UINT16 mm)
switch(mm)
{
- case 0x0: (*rX)++; R3++; break;
- case 0x1: (*rX)++; R3 = R3 + N3; break;
- case 0x2: (*rX) = (*rX) + (*nX); R3++; break;
- case 0x3: (*rX) = (*rX) + (*nX); R3 = R3 + N3; break;
+ case 0x0: (*rX)++; R3++; break;
+ case 0x1: (*rX)++; R3 = R3 + N3; break;
+ case 0x2: (*rX) = (*rX) + (*nX); R3++; break;
+ case 0x3: (*rX) = (*rX) + (*nX); R3 = R3 + N3; break;
}
}
@@ -4517,7 +4517,7 @@ static UINT16 execute_q_table(dsp56k_core* cpustate, int RR, UINT16 q)
switch(q)
{
case 0x0: /* No permanent changes */ ; return (*rX)+(*nX);
- case 0x1: (*rX)--; return (*rX); /* This one is special - it's a *PRE-decrement*! */
+ case 0x1: (*rX)--; return (*rX); /* This one is special - it's a *PRE-decrement*! */
}
/* Should not get here */
@@ -4540,7 +4540,7 @@ static void execute_z_table(dsp56k_core* cpustate, int RR, UINT16 z)
switch(z)
{
- case 0x0: (*rX)--; break;
+ case 0x0: (*rX)--; break;
case 0x1: (*rX) = (*rX) + (*nX); break;
}
}
@@ -4551,7 +4551,7 @@ static UINT16 assemble_address_from_Pppppp_table(dsp56k_core* cpustate, UINT16 P
switch (P)
{
- case 0x0: destAddr = ppppp; break; /* TODO: Does this really only address up to 0x32? */
+ case 0x0: destAddr = ppppp; break; /* TODO: Does this really only address up to 0x32? */
case 0x1: destAddr = assemble_address_from_IO_short_address(cpustate, ppppp); break;
}
@@ -4596,7 +4596,7 @@ static void dsp56k_process_loop(dsp56k_core* cpustate)
if (LC == 1)
{
/* End of loop processing */
- SR = SSL; /* TODO: A-83. I believe only the Loop Flag comes back here. And maybe the do forever bit too. */
+ SR = SSL; /* TODO: A-83. I believe only the Loop Flag comes back here. And maybe the do forever bit too. */
SP--;
LA = SSH;
@@ -4628,7 +4628,7 @@ static void dsp56k_process_rep(dsp56k_core* cpustate, size_t repSize)
else
{
LC--;
- PC -= repSize; /* A little strange - rewind by the size of the rep'd op */
+ PC -= repSize; /* A little strange - rewind by the size of the rep'd op */
}
}
}
@@ -4787,7 +4787,7 @@ static void execute_dual_x_memory_data_read(dsp56k_core* cpustate, const UINT16
fatalerror("Dsp56k: Error. Dual x memory data read specified R3 as its first source!\n");
/* The note on A-142 is very interesting.
- You can effectively access external memory in the last 64 bytes of X data memory! */
+ You can effectively access external memory in the last 64 bytes of X data memory! */
if (*((UINT16*)D2.addr) >= 0xffc0)
fatalerror("Dsp56k: Unimplemented access to external X Data Memory >= 0xffc0 in Dual X Memory Data Read.\n");
@@ -4821,7 +4821,7 @@ static UINT16 Dsp56kOpMask(UINT16 cur, UINT16 mask)
/* Shift everything right, eliminating 'whitespace' */
for (i = 0; i < 16; i++)
{
- if (mask & (0x1<<i)) /* If mask bit is non-zero */
+ if (mask & (0x1<<i)) /* If mask bit is non-zero */
{
temp |= (((retVal >> i) & 0x1) << offsetCount) ;
offsetCount++ ;
@@ -4856,7 +4856,7 @@ static void SetDestinationValue(typed_pointer source, typed_pointer dest)
case DT_BYTE: *((UINT16*)dest.addr) = (*((UINT8*) source.addr)) & 0xff; break;
case DT_WORD: *((UINT16*)dest.addr) = (*((UINT16*)source.addr)) & 0xffff; break;
case DT_DOUBLE_WORD: *((UINT16*)dest.addr) = (*((UINT32*)source.addr)) & 0x0000ffff; break;
- case DT_LONG_WORD: *((UINT16*)dest.addr) = (*((UINT64*)source.addr)) & U64(0x000000000000ffff); break; /* TODO: Shift limiter action! A-147 */
+ case DT_LONG_WORD: *((UINT16*)dest.addr) = (*((UINT64*)source.addr)) & U64(0x000000000000ffff); break; /* TODO: Shift limiter action! A-147 */
}
break ;
@@ -4878,9 +4878,9 @@ static void SetDestinationValue(typed_pointer source, typed_pointer dest)
case DT_BYTE: *((UINT64*)dest.addr) = (*((UINT8*)source.addr)) & 0xff; break;
case DT_WORD: destinationValue = (*((UINT16*)source.addr)) << 16;
- if (destinationValue & U64(0x0000000080000000))
- destinationValue |= U64(0x000000ff00000000);
- *((UINT64*)dest.addr) = (UINT64)destinationValue; break; /* Forget not, yon shift register */
+ if (destinationValue & U64(0x0000000080000000))
+ destinationValue |= U64(0x000000ff00000000);
+ *((UINT64*)dest.addr) = (UINT64)destinationValue; break; /* Forget not, yon shift register */
case DT_DOUBLE_WORD: *((UINT64*)dest.addr) = (*((UINT32*)source.addr)) & 0xffffffff; break;
case DT_LONG_WORD: *((UINT64*)dest.addr) = (*((UINT64*)source.addr)) & U64(0x000000ffffffffff); break;
@@ -4918,4 +4918,3 @@ static void SetProgramMemoryValue(dsp56k_core* cpustate, typed_pointer source, U
case DT_LONG_WORD: cpustate->program->write_word(destinationAddr, (UINT16)( ((*((UINT64*)source.addr)) & U64(0x00000000ffff0000)) >> 16) ) ; break ;
}
}
-
diff --git a/src/emu/cpu/dsp56k/dsp56pcu.c b/src/emu/cpu/dsp56k/dsp56pcu.c
index be29585ec05..87bb8c77b0f 100644
--- a/src/emu/cpu/dsp56k/dsp56pcu.c
+++ b/src/emu/cpu/dsp56k/dsp56pcu.c
@@ -136,7 +136,7 @@ void pcu_reset(dsp56k_core* cpustate)
/* This, in actuality, is handled with the internal boot ROM. */
for (i = 0; i < 0x800; i++)
{
- UINT32 mem_offset = (0xc000<<1) + (i<<1); /* TODO: TEST */
+ UINT32 mem_offset = (0xc000<<1) + (i<<1); /* TODO: TEST */
/* TODO - DO I HAVE TO FLIP THIS WORD? */
/* P:$c000 -> Internal P:$0000 low byte */
@@ -144,7 +144,7 @@ void pcu_reset(dsp56k_core* cpustate)
/* ... */
/* P:$cffe -> Internal P:$07ff low byte */
/* P:$cfff -> Internal P:$07ff high byte */
- UINT8 mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
+ UINT8 mem_value_low = cpustate->program->read_byte(mem_offset); /* TODO: IS THIS READING RIGHT? */
UINT8 mem_value_high = cpustate->program->read_byte(mem_offset);
cpustate->program_ram[i] = (mem_value_high << 8) || mem_value_low;
}
@@ -348,7 +348,7 @@ void dsp56k_irq_table_init(void)
dsp56k_set_irq_source(19, 0x0026, "Host DMA Transmit Data");
dsp56k_set_irq_source(20, 0x0028, "Host Receive Data");
dsp56k_set_irq_source(21, 0x002a, "Host Transmit Data");
- dsp56k_set_irq_source(22, 0x002c, "Host Command"); /* Default vector for the host command */
+ dsp56k_set_irq_source(22, 0x002c, "Host Command"); /* Default vector for the host command */
dsp56k_set_irq_source(23, 0x002e, "Codec Receive/Transmit");
dsp56k_set_irq_source(24, 0x0030, "Host Command 1");
dsp56k_set_irq_source(25, 0x0032, "Host Command 2");
@@ -397,7 +397,7 @@ void dsp56k_sort_pending_interrupts(dsp56k_core* cpustate, int num)
/* Bubble sort should be good enough for us */
for (i = 0; i < num; i++)
{
- for(j = 0; j < num-1; j++)
+ for(j = 0; j < num-1; j++)
{
if (priority_list[j] > priority_list[j+1])
{
@@ -435,7 +435,7 @@ INT8 dsp56k_get_irq_priority(dsp56k_core* cpustate, int index)
/* Poll the IPR for these guys. */
case 5: return irqa_ipl(cpustate); /* IRQA */
case 6: return irqb_ipl(cpustate); /* IRQB */
- case 7: return -1; /* Reserved */
+ case 7: return -1; /* Reserved */
case 8: return ssi0_ipl(cpustate); /* SSI0 Receive Data with Exception */
case 9: return ssi0_ipl(cpustate); /* SSI0 Receive Data */
case 10: return ssi0_ipl(cpustate); /* SSI0 Transmit Data with Exception */
diff --git a/src/emu/cpu/dsp56k/dsp56pcu.h b/src/emu/cpu/dsp56k/dsp56pcu.h
index b7e72a1e5f9..a582eb1cb39 100644
--- a/src/emu/cpu/dsp56k/dsp56pcu.h
+++ b/src/emu/cpu/dsp56k/dsp56pcu.h
@@ -19,25 +19,25 @@ void pcu_init(dsp56k_core* cpustate, device_t *device);
#define SP (cpustate->PCU.sp)
#define SS (cpustate->PCU.ss)
-#define SSH (SS[SP].w.h)
-#define SSL (SS[SP].w.l)
-
-#define ST0 (SS[0].d)
-#define ST1 (SS[1].d)
-#define ST2 (SS[2].d)
-#define ST3 (SS[3].d)
-#define ST4 (SS[4].d)
-#define ST5 (SS[5].d)
-#define ST6 (SS[6].d)
-#define ST7 (SS[7].d)
-#define ST8 (SS[8].d)
-#define ST9 (SS[9].d)
-#define ST10 (SS[10].d)
-#define ST11 (SS[11].d)
-#define ST12 (SS[12].d)
-#define ST13 (SS[13].d)
-#define ST14 (SS[14].d)
-#define ST15 (SS[15].d)
+#define SSH (SS[SP].w.h)
+#define SSL (SS[SP].w.l)
+
+#define ST0 (SS[0].d)
+#define ST1 (SS[1].d)
+#define ST2 (SS[2].d)
+#define ST3 (SS[3].d)
+#define ST4 (SS[4].d)
+#define ST5 (SS[5].d)
+#define ST6 (SS[6].d)
+#define ST7 (SS[7].d)
+#define ST8 (SS[8].d)
+#define ST9 (SS[9].d)
+#define ST10 (SS[10].d)
+#define ST11 (SS[11].d)
+#define ST12 (SS[12].d)
+#define ST13 (SS[13].d)
+#define ST14 (SS[14].d)
+#define ST15 (SS[15].d)
/* STATUS REGISTER (SR) BITS (1-25) */
/* MR */
@@ -137,7 +137,7 @@ void dsp56k_irq_table_init(void);
void dsp56k_set_irq_source(UINT8 irq_num, UINT16 iv, const char* source);
int dsp56k_get_irq_index_by_tag(const char* tag);
-void dsp56k_add_pending_interrupt(dsp56k_core* cpustate, const char* name); // Call me to add an interrupt to the queue
+void dsp56k_add_pending_interrupt(dsp56k_core* cpustate, const char* name); // Call me to add an interrupt to the queue
void dsp56k_clear_pending_interrupts(dsp56k_core* cpustate);
int dsp56k_count_pending_interrupts(dsp56k_core* cpustate);
diff --git a/src/emu/cpu/dsp56k/inst.c b/src/emu/cpu/dsp56k/inst.c
index c2d1e81df46..74c5b88c090 100644
--- a/src/emu/cpu/dsp56k/inst.c
+++ b/src/emu/cpu/dsp56k/inst.c
@@ -117,10 +117,10 @@ Instruction* Instruction::decodeInstruction(const Opcode* opc,
/* Quote: (32 General parallel move instructions) */
/****************************************************************/
else if (((w0 & 0xff00) == 0x4a00) ||
- ((w0 & 0xf000) == 0x4000) ||
- ((w0 & 0xf800) == 0x3000) ||
- ((w0 & 0x8000) == 0x8000) ||
- ((w0 & 0xf000) == 0x5000))
+ ((w0 & 0xf000) == 0x4000) ||
+ ((w0 & 0xf800) == 0x3000) ||
+ ((w0 & 0x8000) == 0x8000) ||
+ ((w0 & 0xf000) == 0x5000))
{
/* Note: There is much overlap down here, so certain ops must come before others */
@@ -486,22 +486,22 @@ Instruction* Instruction::decodeInstruction(const Opcode* opc,
return global_alloc(Dmac(opc, w0, w1));
}
/* DO : 0000 0000 110- --RR xxxx xxxx xxxx xxxx : A-82 */
- else if (((w0 & 0xffe0) == 0x00c0) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
+ else if (((w0 & 0xffe0) == 0x00c0) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
{
return global_alloc(Do(opc, w0, w1));
}
/* DO : 0000 1110 iiii iiii xxxx xxxx xxxx xxxx : A-82 */
- else if (((w0 & 0xff00) == 0x0e00) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
+ else if (((w0 & 0xff00) == 0x0e00) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
{
return global_alloc(Do_2(opc, w0, w1));
}
/* DO : 0000 0100 000D DDDD xxxx xxxx xxxx xxxx : A-82 */
- else if (((w0 & 0xffe0) == 0x0400) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
+ else if (((w0 & 0xffe0) == 0x0400) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
{
return global_alloc(Do_3(opc, w0, w1));
}
/* DO FOREVER : 0000 0000 0000 0010 xxxx xxxx xxxx xxxx : A-88 */
- else if (((w0 & 0xffff) == 0x0002) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
+ else if (((w0 & 0xffff) == 0x0002) && ((w1 & 0x0000) == 0x0000)) // Wait. Huh?
{
return global_alloc(DoForever(opc, w0, w1));
}
diff --git a/src/emu/cpu/dsp56k/inst.h b/src/emu/cpu/dsp56k/inst.h
index 847fe51245a..afd65fa340d 100644
--- a/src/emu/cpu/dsp56k/inst.h
+++ b/src/emu/cpu/dsp56k/inst.h
@@ -23,10 +23,10 @@ class Instruction
{
public:
Instruction(const Opcode* oco) : m_valid(false),
- m_oco(oco),
- m_sizeIncrement(0),
- m_source(iINVALID),
- m_destination(iINVALID) { }
+ m_oco(oco),
+ m_sizeIncrement(0),
+ m_source(iINVALID),
+ m_destination(iINVALID) { }
virtual ~Instruction() {}
virtual bool decode(const UINT16 word0, const UINT16 word1) = 0;
@@ -34,14 +34,14 @@ public:
virtual void evaluate(dsp56k_core* cpustate) = 0;
virtual size_t size() const = 0;
- virtual size_t evalSize() const { return size(); }
+ virtual size_t evalSize() const { return size(); }
virtual size_t accumulatorBitsModified() const = 0; // Potentially make this always return ALL (like flags)
virtual size_t flags() const { return 0; }
static Instruction* decodeInstruction(const Opcode* opc,
- const UINT16 word0,
- const UINT16 word1,
- bool shifted=false);
+ const UINT16 word0,
+ const UINT16 word1,
+ bool shifted=false);
const bool valid() const { return m_valid; }
@@ -121,7 +121,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -147,7 +147,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
- m_opcode, m_source, m_destination);
+ m_opcode, m_source, m_destination);
// TODO: m_opcode = "add";
return true;
}
@@ -160,7 +160,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- astring m_opcode;
+ astring m_opcode;
astring m_arg; // TODO: get rid of this Add|Sub thing.
};
@@ -175,7 +175,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -383,9 +383,9 @@ public:
size_t size() const { return 2; }
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_iVal;
- astring m_opcode;
- astring dString;
+ UINT16 m_iVal;
+ astring m_opcode;
+ astring dString;
};
/* BFCHG : 0001 0100 101- --RR BBB1 0010 iiii iiii : A-38 */
@@ -450,9 +450,9 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- reg_id m_r;
- UINT16 m_iVal;
- astring m_opcode;
+ reg_id m_r;
+ UINT16 m_iVal;
+ astring m_opcode;
};
/* BFCHG : 0001 0100 100D DDDD BBB1 0010 iiii iiii : A-38 */
@@ -513,8 +513,8 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT16 m_iVal;
- astring m_opcode;
+ UINT16 m_iVal;
+ astring m_opcode;
};
// Bcc : 0000 0111 --11 cccc xxxx xxxx xxxx xxxx : A-48 ////////////////////////
@@ -548,7 +548,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
INT16 m_immediate;
};
@@ -585,7 +585,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
INT8 m_immediate;
};
@@ -615,7 +615,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
};
// BRA : 0000 0001 0011 11-- xxxx xxxx xxxx xxxx : A-50 ////////////////////////
@@ -724,7 +724,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
};
// BScc : 0000 0111 --01 cccc xxxx xxxx xxxx xxxx : A-54 ///////////////////////
@@ -761,7 +761,7 @@ public:
size_t flags() const { return DASMFLAG_STEP_OVER; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
INT16 m_immediate;
};
@@ -792,7 +792,7 @@ public:
size_t flags() const { return DASMFLAG_STEP_OVER; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
};
// BSR : 0000 0001 0011 10-- xxxx xxxx xxxx xxxx : A-56 ////////////////////////
@@ -925,9 +925,9 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
/* Note: This is a JJJF limited in the docs, but other opcodes sneak
- in before cmp, so the same decode function can be used. */
+ in before cmp, so the same decode function can be used. */
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -950,9 +950,9 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
/* Note: This is a JJJF limited in the docs, but other opcodes sneak
- in before cmp, so the same decode function can be used. */
+ in before cmp, so the same decode function can be used. */
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -1010,7 +1010,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
};
// DEC : .... .... 0110 F010 : A-72 ////////////////////////////////////////////
@@ -1068,7 +1068,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_DDF_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -1093,7 +1093,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
decode_ss_table(BITSn(word0,0x0024), m_mnem);
if (m_mnem == oINVALID) return false;
@@ -1113,7 +1113,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
reg_id m_source2;
};
@@ -1279,7 +1279,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -1346,7 +1346,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -1375,7 +1375,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -1467,7 +1467,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
UINT16 m_displacement;
};
@@ -1497,7 +1497,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
};
// JMP : 0000 0001 0011 01-- xxxx xxxx xxxx xxxx : A-110 ///////////////////////
@@ -1530,7 +1530,7 @@ public:
/* - - - - - - - - */
}
size_t size() const { return 2; }
- size_t evalSize() const { return 0; }
+ size_t evalSize() const { return 0; }
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
@@ -1563,7 +1563,7 @@ public:
/* - - - - - - - - */
}
size_t size() const { return 1; }
- size_t evalSize() const { return 0; }
+ size_t evalSize() const { return 0; }
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
};
@@ -1601,7 +1601,7 @@ public:
size_t flags() const { return DASMFLAG_STEP_OVER; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
UINT16 m_displacement;
};
@@ -1632,7 +1632,7 @@ public:
size_t flags() const { return DASMFLAG_STEP_OVER; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
};
// JSR : 0000 0001 0011 00-- xxxx xxxx xxxx xxxx : A-114 ///////////////////////
@@ -1748,7 +1748,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- astring m_ea;
+ astring m_ea;
};
// LEA : 0000 0001 10NN MMRR : A-116 ///////////////////////////////////////////
@@ -1780,7 +1780,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- astring m_ea;
+ astring m_ea;
};
// LSL : .... .... 0011 F011 : A-118 ///////////////////////////////////////////
@@ -1840,7 +1840,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
decode_kSign_table(BITSn(word0,0x40), m_sign);
return true;
@@ -1850,7 +1850,7 @@ public:
astring ts = m_sign;
if (ts != "-") ts = "";
retString = "mac " +
- ts +
+ ts +
regIdAsString(m_source) + "," +
regIdAsString(m_source2) + "," + regIdAsString(m_destination);
}
@@ -1875,7 +1875,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -1904,7 +1904,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -1934,7 +1934,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
decode_kSign_table(BITSn(word0,0x40), m_sign);
return true;
@@ -1944,7 +1944,7 @@ public:
astring ts = m_sign;
if (ts != "-") ts = "";
retString = "macr " +
- ts +
+ ts +
regIdAsString(m_source) + "," +
regIdAsString(m_source2) + "," + regIdAsString(m_destination);
}
@@ -1953,7 +1953,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- astring m_sign;
+ astring m_sign;
reg_id m_source2;
};
@@ -1969,7 +1969,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -2000,7 +2000,7 @@ public:
{
// Special QQF
decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
decode_s_table(BITSn(word0,0x0004), m_mnem);
return true;
@@ -2019,7 +2019,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
reg_id m_source2;
};
@@ -2124,8 +2124,8 @@ public:
private:
INT8 m_b;
- UINT8 m_W;
- reg_id m_SD;
+ UINT8 m_W;
+ reg_id m_SD;
};
// MOVE(C) : 0011 1WDD DDD0 MMRR : A-144 ///////////////////////////////////////
@@ -2164,7 +2164,7 @@ public:
private:
INT8 m_W;
reg_id m_SD;
- astring m_ea;
+ astring m_ea;
};
// MOVE(C) : 0011 1WDD DDD1 q0RR : A-144 ///////////////////////////////////////
@@ -2203,7 +2203,7 @@ public:
private:
INT8 m_W;
reg_id m_SD;
- astring m_ea;
+ astring m_ea;
};
// MOVE(C) : 0011 1WDD DDD1 Z11- : A-144 ///////////////////////////////////////
@@ -2241,7 +2241,7 @@ public:
private:
INT8 m_W;
reg_id m_SD;
- astring m_ea;
+ astring m_ea;
};
// MOVE(C) : 0011 1WDD DDD1 t10- xxxx xxxx xxxx xxxx : A-144 ///////////////////
@@ -2277,50 +2277,50 @@ public:
retString = "move ";
if (m_W) retString += ea + "," + regIdAsString(m_sd);
- else retString += regIdAsString(m_sd) + "," + ea;
+ else retString += regIdAsString(m_sd) + "," + ea;
// NEW // sprintf(opcode_str, "move(c)");
}
void evaluate(dsp56k_core* cpustate)
- {
+ {
if (m_W)
{
- if (m_t)
- {
- setReg16(cpustate, m_value, m_sd);
- }
- else
- {
- //UINT16 memValue = memory_read_word_16le(cpustate->data, ADDRESS(m_value));
- //setReg16(cpustate, memValue, m_sd);
- }
+ if (m_t)
+ {
+ setReg16(cpustate, m_value, m_sd);
+ }
+ else
+ {
+ //UINT16 memValue = memory_read_word_16le(cpustate->data, ADDRESS(m_value));
+ //setReg16(cpustate, memValue, m_sd);
+ }
}
else
{
- if (m_t)
- {
- logerror("DSP561xx|Movec_4: This sure seems like it can't happen.");
- }
- else
- {
- //UINT16 regValue = regValue16(cpustate, m_sd);
- //memory_write_word_16le(cpustate->data, m_value, regValue);
- }
+ if (m_t)
+ {
+ logerror("DSP561xx|Movec_4: This sure seems like it can't happen.");
+ }
+ else
+ {
+ //UINT16 regValue = regValue16(cpustate, m_sd);
+ //memory_write_word_16le(cpustate->data, m_value, regValue);
+ }
}
- /* S L E U N Z V C */
- /* * ? ? ? ? ? ? ? */
- // All ? bits - If SR is specified as a destination operand, set according to the corresponding
+ /* S L E U N Z V C */
+ /* * ? ? ? ? ? ? ? */
+ // All ? bits - If SR is specified as a destination operand, set according to the corresponding
// bit of the source operand. If SR is not specified as a destination operand, L is set if data
// limiting occurred. All ? bits are not affected otherwise.
- }
+ }
size_t size() const { return 2; }
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_t;
+ UINT8 m_t;
UINT8 m_W;
- UINT16 m_value;
- reg_id m_sd;
+ UINT16 m_value;
+ reg_id m_sd;
};
// MOVE(C) : 0010 10dd dddD DDDD : A-144 ///////////////////////////////////////
@@ -2383,9 +2383,9 @@ public:
private:
INT8 m_b;
- UINT8 m_W;
- reg_id m_SD;
- op_mnem m_mnem;
+ UINT8 m_W;
+ reg_id m_SD;
+ op_mnem m_mnem;
};
// MOVE(I) : 0010 00DD BBBB BBBB : A-150 ///////////////////////////////////////
@@ -2457,7 +2457,7 @@ public:
private:
INT8 m_W;
reg_id m_SD;
- astring m_ea;
+ astring m_ea;
};
// MOVE(M) : 0000 001W RR11 mmRR : A-152 ///////////////////////////////////////
@@ -2499,9 +2499,9 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- UINT8 m_W;
- astring m_ea;
- astring m_ea2;
+ UINT8 m_W;
+ astring m_ea;
+ astring m_ea2;
};
// MOVE(M) : 0000 0101 BBBB BBBB 0000 001W --0- -HHH : A-152 ///////////////////
@@ -2535,10 +2535,10 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- INT8 m_b;
- UINT8 m_W;
- reg_id m_SD;
- op_mnem m_mnem;
+ INT8 m_b;
+ UINT8 m_W;
+ reg_id m_SD;
+ op_mnem m_mnem;
};
// MOVE(P) : 0001 100W HH1p pppp : A-156 ///////////////////////////////////////
@@ -2577,7 +2577,7 @@ public:
private:
INT8 m_W;
reg_id m_SD;
- astring m_ea;
+ astring m_ea;
};
// MOVE(P) : 0000 110W RRmp pppp : A-156 ///////////////////////////////////////
@@ -2597,7 +2597,7 @@ public:
assemble_ea_from_m_table(BITSn(word0,0x0020), rNum, m_ea);
- astring fullAddy; /* Convert Short Absolute Address to full 16-bit */
+ astring fullAddy; /* Convert Short Absolute Address to full 16-bit */
assemble_address_from_IO_short_address(BITSn(word0,0x001f), fullAddy);
m_W = BITSn(word0,0x0100);
@@ -2620,7 +2620,7 @@ public:
private:
INT8 m_W;
astring m_SD;
- astring m_ea;
+ astring m_ea;
};
// MOVE(S) : 0001 100W HH0a aaaa : A-158 ///////////////////////////////////////
@@ -2660,7 +2660,7 @@ public:
private:
INT8 m_W;
reg_id m_SD;
- astring m_ea;
+ astring m_ea;
};
// MPY : .... .... 1k00 FQQQ : A-160 ///////////////////////////////////////////
@@ -2676,9 +2676,9 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
/* There are inconsistencies with the S1 & S2 operand ordering in the docs,
- but since it's a multiply it doesn't matter */
+ but since it's a multiply it doesn't matter */
decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
decode_kSign_table(BITSn(word0,0x40), m_sign);
return true;
@@ -2688,7 +2688,7 @@ public:
astring ts = m_sign;
if (ts != "-") ts = "";
retString = "mpy " +
- ts +
+ ts +
regIdAsString(m_source) + "," +
regIdAsString(m_source2) + "," + regIdAsString(m_destination);
}
@@ -2697,7 +2697,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- astring m_sign;
+ astring m_sign;
reg_id m_source2;
};
@@ -2713,7 +2713,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -2742,7 +2742,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -2772,9 +2772,9 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
/* There are inconsistencies with the S1 & S2 operand ordering in the docs,
- but since it's a multiply it doesn't matter */
+ but since it's a multiply it doesn't matter */
decode_QQQF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
decode_kSign_table(BITSn(word0,0x40), m_sign);
return true;
@@ -2785,7 +2785,7 @@ public:
if (ts != "-") ts = "";
retString = "mpyr " +
ts +
- regIdAsString(m_source) + "," +
+ regIdAsString(m_source) + "," +
regIdAsString(m_source2) + "," + regIdAsString(m_destination);
}
void evaluate(dsp56k_core* cpustate) {}
@@ -2793,7 +2793,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- astring m_sign;
+ astring m_sign;
reg_id m_source2;
};
@@ -2809,7 +2809,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQF_table(BITSn(word0,0x03), BITSn(word0,0x08),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -2839,7 +2839,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQF_special_table(BITSn(word0,0x0003), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
decode_s_table(BITSn(word0,0x0004), m_mnem);
return true;
@@ -2858,7 +2858,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
reg_id m_source2;
};
@@ -2984,7 +2984,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_JJF_table(BITSn(word0,0x03),BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -3128,7 +3128,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
};
// RESET : 0000 0000 0000 1000 : A-186 /////////////////////////////////////////
@@ -3317,7 +3317,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -3341,7 +3341,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_uuuuF_table(BITSn(word0,0x17), BITSn(word0,0x08),
- m_opcode, m_source, m_destination);
+ m_opcode, m_source, m_destination);
// TODO // m_opcode = "sub";
return true;
@@ -3355,7 +3355,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- astring m_opcode;
+ astring m_opcode;
};
// SUBL : .... .... 0100 F001 : A-204 //////////////////////////////////////////
@@ -3446,7 +3446,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_h0hF_table(BITSn(word0,0x0007),BITSn(word0,0x0008),
- m_source, m_destination);
+ m_source, m_destination);
decode_RR_table(BITSn(word0,0x0030), m_destination2);
@@ -3475,7 +3475,7 @@ public:
size_t accumulatorBitsModified() const { return BM_HIGH | BM_MIDDLE | BM_LOW; }
private:
- op_mnem m_mnem;
+ op_mnem m_mnem;
reg_id m_destination2;
};
@@ -3490,7 +3490,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_JJJF_table(BITSn(word0,0x07), BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -3513,7 +3513,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_DDF_table(BITSn(word0,0x03), BITSn(word0,0x08),
- m_source, m_destination);
+ m_source, m_destination);
return true;
}
void disassemble(astring& retString) const
@@ -3564,7 +3564,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_DDF_table(BITSn(word0,0x0030), BITSn(word0,0x0008),
- m_destination, m_source);
+ m_destination, m_source);
decode_HHH_table(BITSn(word0,0x0007), m_SD);
// If the destination of the second move is the same as the first, you're invalid
@@ -3583,7 +3583,7 @@ public:
assemble_arguments_from_W_table(m_W, 'X', m_SD, m_ea, source2, destination2);
retString = "tfr3 " +
regIdAsString(m_source) + "," + regIdAsString(m_destination) + " " +
- source2 + "," + destination2;
+ source2 + "," + destination2;
}
void evaluate(dsp56k_core* cpustate) {}
size_t size() const { return 1; }
@@ -3592,7 +3592,7 @@ public:
private:
INT8 m_W;
reg_id m_SD;
- astring m_ea;
+ astring m_ea;
reg_id m_source2;
reg_id m_destination2;
};
@@ -3696,7 +3696,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
// This hackery amounts to a very strange QQQF table...
if (m_source == iX0 && m_source2 == iX0) return false;
@@ -3740,7 +3740,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_QQQF_table(BITSn(word0,0x0007), BITSn(word0,0x0008),
- m_source, m_source2, m_destination);
+ m_source, m_source2, m_destination);
// This hackery amounts to a very strange QQQF table...
if (m_source == iX0 && m_source2 == iX0) return false;
diff --git a/src/emu/cpu/dsp56k/pmove.h b/src/emu/cpu/dsp56k/pmove.h
index eb1412be956..4dabb9b3a30 100644
--- a/src/emu/cpu/dsp56k/pmove.h
+++ b/src/emu/cpu/dsp56k/pmove.h
@@ -189,7 +189,7 @@ public:
bool decode(const UINT16 word0, const UINT16 word1)
{
decode_IIIIx_table(BITSn(word0,0x0f00), BITSn(word0,0x0008),
- m_source, m_destination);
+ m_source, m_destination);
if (m_source == iINVALID)
return false;
@@ -204,7 +204,7 @@ public:
else if (opDestination() == iA)
m_destination = iB;
else
- m_destination = iA; /* In the case of no data ALU instruction */
+ m_destination = iA; /* In the case of no data ALU instruction */
}
// Don't return a failure, just let everything fall through (nop).
diff --git a/src/emu/cpu/dsp56k/tables.c b/src/emu/cpu/dsp56k/tables.c
index 7e816d7ef11..096eb04ffae 100644
--- a/src/emu/cpu/dsp56k/tables.c
+++ b/src/emu/cpu/dsp56k/tables.c
@@ -311,23 +311,23 @@ void decode_KKK_table(const UINT16 KKK, reg_id& D1, reg_id& D2)
void decode_NN_table(UINT16 NN, reg_id& ret)
{
switch(NN)
- {
- case 0x0: ret = iN0; break;
- case 0x1: ret = iN1; break;
- case 0x2: ret = iN2; break;
- case 0x3: ret = iN3; break;
- }
+ {
+ case 0x0: ret = iN0; break;
+ case 0x1: ret = iN1; break;
+ case 0x2: ret = iN2; break;
+ case 0x3: ret = iN3; break;
+ }
}
void decode_TT_table(UINT16 TT, reg_id& ret)
{
switch(TT)
- {
- case 0x0: ret = iR0; break;
- case 0x1: ret = iR1; break;
- case 0x2: ret = iR2; break;
- case 0x3: ret = iR3; break;
- }
+ {
+ case 0x0: ret = iR0; break;
+ case 0x1: ret = iR1; break;
+ case 0x2: ret = iR2; break;
+ case 0x3: ret = iR3; break;
+ }
}
void decode_QQF_table(const UINT16 QQ, const UINT16 F, reg_id& S1, reg_id& S2, reg_id& D)
@@ -392,23 +392,23 @@ void decode_QQQF_table(const UINT16 QQQ, const UINT16 F, reg_id& S1, reg_id& S2,
void decode_RR_table(UINT16 RR, reg_id& ret)
{
switch(RR)
- {
- case 0x0: ret = iR0; break;
- case 0x1: ret = iR1; break;
- case 0x2: ret = iR2; break;
- case 0x3: ret = iR3; break;
- }
+ {
+ case 0x0: ret = iR0; break;
+ case 0x1: ret = iR1; break;
+ case 0x2: ret = iR2; break;
+ case 0x3: ret = iR3; break;
+ }
}
void decode_rr_table(UINT16 rr, reg_id& ret)
{
switch(rr)
- {
- case 0x0: ret = iR0; break;
- case 0x1: ret = iR1; break;
- case 0x2: ret = iR2; break;
- case 0x3: ret = iR3; break;
- }
+ {
+ case 0x0: ret = iR0; break;
+ case 0x1: ret = iR1; break;
+ case 0x2: ret = iR2; break;
+ case 0x3: ret = iR3; break;
+ }
}
void decode_s_table(const UINT16 s, op_mnem& arithmetic)
@@ -489,7 +489,7 @@ void assemble_ea_from_m_table(const UINT16 m, const int n, astring& ea)
char temp[32];
switch(m)
{
- case 0x0: sprintf(temp, "(R%d)+",n) ; break;
+ case 0x0: sprintf(temp, "(R%d)+",n) ; break;
case 0x1: sprintf(temp, "(R%d)+N%d", n, n); break;
}
ea = temp;
@@ -501,14 +501,14 @@ void assemble_eas_from_mm_table(UINT16 mm, int n1, int n2, astring& ea1, astring
char temp2[32];
switch(mm)
{
- case 0x0: sprintf(temp1, "(R%d)+", n1) ;
- sprintf(temp2, "(R%d)+", n2) ; break;
- case 0x1: sprintf(temp1, "(R%d)+", n1) ;
- sprintf(temp2, "(R%d)+N%d", n2, n2); break;
+ case 0x0: sprintf(temp1, "(R%d)+", n1) ;
+ sprintf(temp2, "(R%d)+", n2) ; break;
+ case 0x1: sprintf(temp1, "(R%d)+", n1) ;
+ sprintf(temp2, "(R%d)+N%d", n2, n2); break;
case 0x2: sprintf(temp1, "(R%d)+N%d", n1, n1);
- sprintf(temp2, "(R%d)+", n2) ; break;
+ sprintf(temp2, "(R%d)+", n2) ; break;
case 0x3: sprintf(temp1, "(R%d)+N%d", n1, n1);
- sprintf(temp2, "(R%d)+N%d", n2, n2); break;
+ sprintf(temp2, "(R%d)+N%d", n2, n2); break;
}
ea1 = temp1;
ea2 = temp2;
@@ -519,9 +519,9 @@ void assemble_ea_from_MM_table(UINT16 MM, int n, astring& ea)
char temp[32];
switch(MM)
{
- case 0x0: sprintf(temp, "(R%d)", n) ; break;
- case 0x1: sprintf(temp, "(R%d)+", n) ; break;
- case 0x2: sprintf(temp, "(R%d)-", n) ; break;
+ case 0x0: sprintf(temp, "(R%d)", n) ; break;
+ case 0x1: sprintf(temp, "(R%d)+", n) ; break;
+ case 0x2: sprintf(temp, "(R%d)-", n) ; break;
case 0x3: sprintf(temp, "(R%d)+N%d", n, n); break;
}
ea = temp;
@@ -533,7 +533,7 @@ void assemble_ea_from_q_table(UINT16 q, int n, astring& ea)
switch(q)
{
case 0x0: sprintf(temp, "(R%d+N%d)", n, n); break;
- case 0x1: sprintf(temp, "-(R%d)", n) ; break;
+ case 0x1: sprintf(temp, "-(R%d)", n) ; break;
}
ea = temp;
}
@@ -556,7 +556,7 @@ void assemble_ea_from_z_table(UINT16 z, int n, astring& ea)
char temp[32];
switch(z)
{
- case 0x0: sprintf(temp, "(R%d)-", n) ; break;
+ case 0x0: sprintf(temp, "(R%d)-", n) ; break;
case 0x1: sprintf(temp, "(R%d)+N%d", n, n); break;
}
ea = temp;
@@ -565,7 +565,7 @@ void assemble_ea_from_z_table(UINT16 z, int n, astring& ea)
void assemble_D_from_P_table(UINT16 P, UINT16 ppppp, astring& D)
{
char temp[32];
- astring fullAddy; /* Convert Short Absolute Address to full 16-bit */
+ astring fullAddy; /* Convert Short Absolute Address to full 16-bit */
switch(P)
{
@@ -583,7 +583,7 @@ void assemble_D_from_P_table(UINT16 P, UINT16 ppppp, astring& D)
}
void assemble_arguments_from_W_table(UINT16 W, char ma, const reg_id& SD, const astring& ea,
- astring& source, astring& destination)
+ astring& source, astring& destination)
{
char temp[32];
sprintf(temp, "%c:%s", ma, ea.cstr());
@@ -595,7 +595,7 @@ void assemble_arguments_from_W_table(UINT16 W, char ma, const reg_id& SD, const
}
void assemble_arguments_from_W_table(UINT16 W, char ma, const astring& SD, const astring& ea,
- astring& source, astring& destination)
+ astring& source, astring& destination)
{
char temp[32];
sprintf(temp, "%c:%s", ma, ea.cstr());
@@ -695,205 +695,204 @@ bool registerOverlap(const reg_id& r0, const size_t bmd, const reg_id& r1)
UINT16 regValue16(dsp56k_core* cpustate, const reg_id& reg)
{
- if (reg == iX0) return X0;
- if (reg == iX1) return X1;
- if (reg == iY0) return Y0;
- if (reg == iY1) return Y1;
+ if (reg == iX0) return X0;
+ if (reg == iX1) return X1;
+ if (reg == iY0) return Y0;
+ if (reg == iY1) return Y1;
- if (reg == iA0) return A0;
- if (reg == iA1) return A1;
- if (reg == iB0) return B0;
- if (reg == iB1) return B1;
+ if (reg == iA0) return A0;
+ if (reg == iA1) return A1;
+ if (reg == iB0) return B0;
+ if (reg == iB1) return B1;
- if (reg == iR0) return R0;
- if (reg == iR1) return R1;
- if (reg == iR2) return R2;
- if (reg == iR3) return R3;
+ if (reg == iR0) return R0;
+ if (reg == iR1) return R1;
+ if (reg == iR2) return R2;
+ if (reg == iR3) return R3;
- if (reg == iN0) return N0;
- if (reg == iN1) return N1;
- if (reg == iN2) return N2;
- if (reg == iN3) return N3;
+ if (reg == iN0) return N0;
+ if (reg == iN1) return N1;
+ if (reg == iN2) return N2;
+ if (reg == iN3) return N3;
- if (reg == iM0) return M0;
- if (reg == iM1) return M1;
- if (reg == iM2) return M2;
- if (reg == iM3) return M3;
+ if (reg == iM0) return M0;
+ if (reg == iM1) return M1;
+ if (reg == iM2) return M2;
+ if (reg == iM3) return M3;
- mame_printf_debug("The dsp561xx core is requesting a 16 bit value from non-16 bit register!");
- return 0xdead;
+ mame_printf_debug("The dsp561xx core is requesting a 16 bit value from non-16 bit register!");
+ return 0xdead;
}
void setReg16(dsp56k_core* cpustate, const UINT16& value, const reg_id& reg)
{
- if (reg == iX0) X0 = value;
- if (reg == iX1) X1 = value;
- if (reg == iY0) Y0 = value;
- if (reg == iY1) Y1 = value;
+ if (reg == iX0) X0 = value;
+ if (reg == iX1) X1 = value;
+ if (reg == iY0) Y0 = value;
+ if (reg == iY1) Y1 = value;
- if (reg == iA0) A0 = value;
- if (reg == iA1) A1 = value;
- if (reg == iB0) B0 = value;
- if (reg == iB1) B1 = value;
+ if (reg == iA0) A0 = value;
+ if (reg == iA1) A1 = value;
+ if (reg == iB0) B0 = value;
+ if (reg == iB1) B1 = value;
- if (reg == iR0) R0 = value;
- if (reg == iR1) R1 = value;
- if (reg == iR2) R2 = value;
- if (reg == iR3) R3 = value;
+ if (reg == iR0) R0 = value;
+ if (reg == iR1) R1 = value;
+ if (reg == iR2) R2 = value;
+ if (reg == iR3) R3 = value;
- if (reg == iN0) N0 = value;
- if (reg == iN1) N1 = value;
- if (reg == iN2) N2 = value;
- if (reg == iN3) N3 = value;
+ if (reg == iN0) N0 = value;
+ if (reg == iN1) N1 = value;
+ if (reg == iN2) N2 = value;
+ if (reg == iN3) N3 = value;
- if (reg == iM0) M0 = value;
- if (reg == iM1) M1 = value;
- if (reg == iM2) M2 = value;
- if (reg == iM3) M3 = value;
+ if (reg == iM0) M0 = value;
+ if (reg == iM1) M1 = value;
+ if (reg == iM2) M2 = value;
+ if (reg == iM3) M3 = value;
}
astring regIdAsString(const reg_id& regId)
{
- switch(regId)
- {
- case iX: return "X";
- case iX0: return "X0";
- case iX1: return "X1";
- case iY: return "Y";
- case iY0: return "Y0";
- case iY1: return "Y1";
- case iA: return "A";
- case iA0: return "A0";
- case iA1: return "A1";
- case iA2: return "A2";
- case iB: return "B";
- case iB0: return "B0";
- case iB1: return "B1";
- case iB2: return "B2";
- case iR0: return "R0";
- case iR1: return "R1";
- case iR2: return "R2";
- case iR3: return "R3";
- case iN0: return "N0";
- case iN1: return "N1";
- case iN2: return "N2";
- case iN3: return "N3";
- case iM0: return "M0";
- case iM1: return "M1";
- case iM2: return "M2";
- case iM3: return "M3";
- case iLC: return "LC";
- case iSR: return "SR";
- case iOMR: return "OMR";
- case iSP: return "SP";
- case iSSH: return "SSH";
- case iSSL: return "SSL";
- case iLA: return "LA";
- case iMR: return "MR";
- case iCCR: return "CCR";
- case iF: return "F";
- case iFHAT: return "^F";
- case iINVALID: return "!!";
- case iWEIRD: return "?";
- }
-
- return "INVALID_REG_ID";
+ switch(regId)
+ {
+ case iX: return "X";
+ case iX0: return "X0";
+ case iX1: return "X1";
+ case iY: return "Y";
+ case iY0: return "Y0";
+ case iY1: return "Y1";
+ case iA: return "A";
+ case iA0: return "A0";
+ case iA1: return "A1";
+ case iA2: return "A2";
+ case iB: return "B";
+ case iB0: return "B0";
+ case iB1: return "B1";
+ case iB2: return "B2";
+ case iR0: return "R0";
+ case iR1: return "R1";
+ case iR2: return "R2";
+ case iR3: return "R3";
+ case iN0: return "N0";
+ case iN1: return "N1";
+ case iN2: return "N2";
+ case iN3: return "N3";
+ case iM0: return "M0";
+ case iM1: return "M1";
+ case iM2: return "M2";
+ case iM3: return "M3";
+ case iLC: return "LC";
+ case iSR: return "SR";
+ case iOMR: return "OMR";
+ case iSP: return "SP";
+ case iSSH: return "SSH";
+ case iSSL: return "SSL";
+ case iLA: return "LA";
+ case iMR: return "MR";
+ case iCCR: return "CCR";
+ case iF: return "F";
+ case iFHAT: return "^F";
+ case iINVALID: return "!!";
+ case iWEIRD: return "?";
+ }
+
+ return "INVALID_REG_ID";
}
astring opMnemonicAsString(const op_mnem& mnem)
{
- switch(mnem)
- {
- case oCC: return "cc";
- case oGE: return "ge";
- case oNE: return "ne";
- case oPL: return "pl";
- case oNN: return "nn";
- case oEC: return "ec";
- case oLC: return "lc";
- case oGT: return "gt";
- case oCS: return "cs";
- case oLT: return "lt";
- case oEQ: return "eq";
- case oMI: return "mi";
- case oNR: return "nr";
- case oES: return "es";
- case oLS: return "ls";
- case oLE: return "le";
-
- case oSS: return "ss";
- case oSU: return "su";
- case oUU: return "uu";
- case oINVALID: return "!!";
- }
-
- return "INVALID_OPCODE_MNEMONIC";
+ switch(mnem)
+ {
+ case oCC: return "cc";
+ case oGE: return "ge";
+ case oNE: return "ne";
+ case oPL: return "pl";
+ case oNN: return "nn";
+ case oEC: return "ec";
+ case oLC: return "lc";
+ case oGT: return "gt";
+ case oCS: return "cs";
+ case oLT: return "lt";
+ case oEQ: return "eq";
+ case oMI: return "mi";
+ case oNR: return "nr";
+ case oES: return "es";
+ case oLS: return "ls";
+ case oLE: return "le";
+
+ case oSS: return "ss";
+ case oSU: return "su";
+ case oUU: return "uu";
+ case oINVALID: return "!!";
+ }
+
+ return "INVALID_OPCODE_MNEMONIC";
}
reg_id stringAsRegID(const astring& str)
{
- if (str == "X") return iX;
- if (str == "X0") return iX0;
- if (str == "X1") return iX1;
- if (str == "Y") return iY;
- if (str == "Y0") return iY0;
- if (str == "Y1") return iY1;
- if (str == "A") return iA;
- if (str == "A0") return iA0;
- if (str == "A1") return iA1;
- if (str == "A2") return iA2;
- if (str == "B") return iB;
- if (str == "B0") return iB0;
- if (str == "B1") return iB1;
- if (str == "B2") return iB2;
- if (str == "R0") return iR0;
- if (str == "R1") return iR1;
- if (str == "R2") return iR2;
- if (str == "R3") return iR3;
- if (str == "N0") return iN0;
- if (str == "N1") return iN1;
- if (str == "N2") return iN2;
- if (str == "N3") return iN3;
- if (str == "M0") return iM0;
- if (str == "M1") return iM1;
- if (str == "M2") return iM2;
- if (str == "M3") return iM3;
- if (str == "LC") return iLC;
- if (str == "SR") return iSR;
- if (str == "OMR") return iOMR;
- if (str == "SP") return iSP;
- if (str == "SSH") return iSSH;
- if (str == "SSL") return iSSL;
- if (str == "LA") return iLA;
- if (str == "MR") return iMR;
- if (str == "CCR") return iCCR;
- if (str == "F") return iF;
- if (str == "^F") return iFHAT;
- if (str == "!!") return iINVALID;
- if (str == "?") return iWEIRD;
-
- return iINVALID;
+ if (str == "X") return iX;
+ if (str == "X0") return iX0;
+ if (str == "X1") return iX1;
+ if (str == "Y") return iY;
+ if (str == "Y0") return iY0;
+ if (str == "Y1") return iY1;
+ if (str == "A") return iA;
+ if (str == "A0") return iA0;
+ if (str == "A1") return iA1;
+ if (str == "A2") return iA2;
+ if (str == "B") return iB;
+ if (str == "B0") return iB0;
+ if (str == "B1") return iB1;
+ if (str == "B2") return iB2;
+ if (str == "R0") return iR0;
+ if (str == "R1") return iR1;
+ if (str == "R2") return iR2;
+ if (str == "R3") return iR3;
+ if (str == "N0") return iN0;
+ if (str == "N1") return iN1;
+ if (str == "N2") return iN2;
+ if (str == "N3") return iN3;
+ if (str == "M0") return iM0;
+ if (str == "M1") return iM1;
+ if (str == "M2") return iM2;
+ if (str == "M3") return iM3;
+ if (str == "LC") return iLC;
+ if (str == "SR") return iSR;
+ if (str == "OMR") return iOMR;
+ if (str == "SP") return iSP;
+ if (str == "SSH") return iSSH;
+ if (str == "SSL") return iSSL;
+ if (str == "LA") return iLA;
+ if (str == "MR") return iMR;
+ if (str == "CCR") return iCCR;
+ if (str == "F") return iF;
+ if (str == "^F") return iFHAT;
+ if (str == "!!") return iINVALID;
+ if (str == "?") return iWEIRD;
+
+ return iINVALID;
}
UINT8 regIDAsNum(const reg_id& regId)
{
- if (regId == iR0) return 0;
- if (regId == iR1) return 1;
- if (regId == iR2) return 2;
- if (regId == iR3) return 3;
+ if (regId == iR0) return 0;
+ if (regId == iR1) return 1;
+ if (regId == iR2) return 2;
+ if (regId == iR3) return 3;
- if (regId == iN0) return 0;
- if (regId == iN1) return 1;
- if (regId == iN2) return 2;
- if (regId == iN3) return 3;
+ if (regId == iN0) return 0;
+ if (regId == iN1) return 1;
+ if (regId == iN2) return 2;
+ if (regId == iN3) return 3;
- if (regId == iM0) return 0;
- if (regId == iM1) return 1;
- if (regId == iM2) return 2;
- if (regId == iM3) return 3;
+ if (regId == iM0) return 0;
+ if (regId == iM1) return 1;
+ if (regId == iM2) return 2;
+ if (regId == iM3) return 3;
- return 255;
+ return 255;
}
}
-
diff --git a/src/emu/cpu/dsp56k/tables.h b/src/emu/cpu/dsp56k/tables.h
index 39efd3092df..1701bcd146a 100644
--- a/src/emu/cpu/dsp56k/tables.h
+++ b/src/emu/cpu/dsp56k/tables.h
@@ -16,21 +16,21 @@ enum bitsModified {BM_NONE = 0x0, BM_LOW = 0x1, BM_MIDDLE = 0x2, BM_HIGH = 0x4};
enum bfShift {BBB_UPPER, BBB_MIDDLE, BBB_LOWER, BBB_INVALID};
enum reg_id {iX, iX0, iX1,
- iY, iY0, iY1,
- iA, iA0, iA1, iA2,
- iB, iB0, iB1, iB2,
- iR0, iR1, iR2, iR3,
- iN0, iN1, iN2, iN3,
- iM0, iM1, iM2, iM3,
- iLC, iSR, iOMR, iSP, iSSH, iSSL, iLA, iMR, iCCR,
- iF, iFHAT,
- iINVALID, iWEIRD};
+ iY, iY0, iY1,
+ iA, iA0, iA1, iA2,
+ iB, iB0, iB1, iB2,
+ iR0, iR1, iR2, iR3,
+ iN0, iN1, iN2, iN3,
+ iM0, iM1, iM2, iM3,
+ iLC, iSR, iOMR, iSP, iSSH, iSSL, iLA, iMR, iCCR,
+ iF, iFHAT,
+ iINVALID, iWEIRD};
enum op_mnem {oCC, oGE, oNE, oPL,
- oNN, oEC, oLC, oGT,
- oCS, oLT, oEQ, oMI,
- oNR, oES, oLS, oLE,
- oSS, oSU, oUU, oINVALID};
+ oNN, oEC, oLC, oGT,
+ oCS, oLT, oEQ, oMI,
+ oNR, oES, oLS, oLE,
+ oSS, oSU, oUU, oINVALID};
bfShift decode_BBB_table(UINT16 BBB);
diff --git a/src/emu/cpu/e132xs/32xsdasm.c b/src/emu/cpu/e132xs/32xsdasm.c
index 83b9e044246..d572f425e1e 100644
--- a/src/emu/cpu/e132xs/32xsdasm.c
+++ b/src/emu/cpu/e132xs/32xsdasm.c
@@ -11,44 +11,44 @@
static const char *const L_REG[] =
{
- "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7", "L8", "L9",
- "L10", "L11", "L12", "L13", "L14", "L15", "L16", "L17", "L18", "L19",
- "L20", "L21", "L22", "L23", "L24", "L25", "L26", "L27", "L28", "L29",
- "L30", "L31", "L32", "L33", "L34", "L35", "L36", "L37", "L38", "L39",
- "L40", "L41", "L42", "L43", "L44", "L45", "L46", "L47", "L48", "L49",
- "L50", "L51", "L52", "L53", "L54", "L55", "L56", "L57", "L58", "L59",
- "L60", "L61", "L62", "L63"
+ "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7", "L8", "L9",
+ "L10", "L11", "L12", "L13", "L14", "L15", "L16", "L17", "L18", "L19",
+ "L20", "L21", "L22", "L23", "L24", "L25", "L26", "L27", "L28", "L29",
+ "L30", "L31", "L32", "L33", "L34", "L35", "L36", "L37", "L38", "L39",
+ "L40", "L41", "L42", "L43", "L44", "L45", "L46", "L47", "L48", "L49",
+ "L50", "L51", "L52", "L53", "L54", "L55", "L56", "L57", "L58", "L59",
+ "L60", "L61", "L62", "L63"
};
static const char *const G_REG[] =
{
- "PC", "SR", "FER", "G03", "G04", "G05", "G06", "G07", "G08", "G09",
- "G10", "G11", "G12", "G13", "G14", "G15", "G16", "G17", "SP", "UB",
- "BCR", "TPR", "TCR", "TR", "WCR", "ISR", "FCR", "MCR", "G28", "G29",
- "G30", "G31"
+ "PC", "SR", "FER", "G03", "G04", "G05", "G06", "G07", "G08", "G09",
+ "G10", "G11", "G12", "G13", "G14", "G15", "G16", "G17", "SP", "UB",
+ "BCR", "TPR", "TCR", "TR", "WCR", "ISR", "FCR", "MCR", "G28", "G29",
+ "G30", "G31"
};
static const char *const SETxx[] =
{
- "SETADR", "Reserved", "SET1", "SET0", "SETLE", "SETGT", "SETLT", "SETGE",
- "SETSE", "SETHT", "SETST", "SETHE", "SETE", "SETNE", "SETV", "SETNV",
- "Reserved", "Reserved", "SET1M", "Reserved", "SETLEM", "SETGTM", "SETLTM", "SETGEM",
- "SETSEM", "SETTHM", "SETSTM", "SETHEM", "SETEM", "SETNEM", "SETVM", "SETNVM"
+ "SETADR", "Reserved", "SET1", "SET0", "SETLE", "SETGT", "SETLT", "SETGE",
+ "SETSE", "SETHT", "SETST", "SETHE", "SETE", "SETNE", "SETV", "SETNV",
+ "Reserved", "Reserved", "SET1M", "Reserved", "SETLEM", "SETGTM", "SETLTM", "SETGEM",
+ "SETSEM", "SETTHM", "SETSTM", "SETHEM", "SETEM", "SETNEM", "SETVM", "SETNVM"
};
-#define DESTCODE(op) ((op & 0x00f0) >> 4)
-#define SOURCECODE(op) (op & 0x000f)
+#define DESTCODE(op) ((op & 0x00f0) >> 4)
+#define SOURCECODE(op) (op & 0x000f)
-#define SOURCEBIT(op) ((op & 0x100) >> 8)
-#define DESTBIT(op) ((op & 0x200) >> 9)
+#define SOURCEBIT(op) ((op & 0x100) >> 8)
+#define DESTBIT(op) ((op & 0x200) >> 9)
-#define N_VALUE(op) ((((op & 0x100) >> 8) << 4 ) | (op & 0x0f))
+#define N_VALUE(op) ((((op & 0x100) >> 8) << 4 ) | (op & 0x0f))
static int size, global_fp;
static offs_t base_pc;
static const UINT8 *base_oprom;
-#define READ_OP_DASM(p) ((base_oprom[(p) - base_pc] << 8) | base_oprom[(p) + 1 - base_pc])
+#define READ_OP_DASM(p) ((base_oprom[(p) - base_pc] << 8) | base_oprom[(p) + 1 - base_pc])
static void LL_format(char *source, char *dest, UINT16 op)
@@ -217,8 +217,8 @@ static INT32 Rimm_format(char *dest, UINT16 op, unsigned *pc, unsigned h_flag)
switch( n )
{
- case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 8:
- case 9: case 10: case 11: case 12: case 13: case 14: case 15: case 16:
+ case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 8:
+ case 9: case 10: case 11: case 12: case 13: case 14: case 15: case 16:
return n;
case 17:
@@ -247,10 +247,10 @@ static INT32 Rimm_format(char *dest, UINT16 op, unsigned *pc, unsigned h_flag)
return ret;
case 20:
- return 32; //bit 5 = 1, others = 0
+ return 32; //bit 5 = 1, others = 0
case 21:
- return 64; //bit 6 = 1, others = 0
+ return 64; //bit 6 = 1, others = 0
case 22:
return 128; //bit 7 = 1, others = 0
diff --git a/src/emu/cpu/e132xs/e132xs.c b/src/emu/cpu/e132xs/e132xs.c
index 0ad3d359c20..cd9b9858bcf 100644
--- a/src/emu/cpu/e132xs/e132xs.c
+++ b/src/emu/cpu/e132xs/e132xs.c
@@ -291,11 +291,11 @@ ADDRESS_MAP_END
//-------------------------------------------------
hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map)
+ const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map)
: cpu_device(mconfig, type, name, tag, owner, clock),
- m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map),
- m_io_config("io", ENDIANNESS_BIG, io_data_width, 15),
- m_icount(0)
+ m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map),
+ m_io_config("io", ENDIANNESS_BIG, io_data_width, 15),
+ m_icount(0)
{
// build the opcode table
for (int op = 0; op < 256; op++)
@@ -504,78 +504,78 @@ void hyperstone_device::hyperstone_set_trap_entry(int which)
}
}
-#define OP m_op
-#define PPC m_ppc //previous pc
-#define PC m_global_regs[0] //Program Counter
-#define SR m_global_regs[1] //Status Register
-#define FER m_global_regs[2] //Floating-Point Exception Register
+#define OP m_op
+#define PPC m_ppc //previous pc
+#define PC m_global_regs[0] //Program Counter
+#define SR m_global_regs[1] //Status Register
+#define FER m_global_regs[2] //Floating-Point Exception Register
// 03 - 15 General Purpose Registers
// 16 - 17 Reserved
-#define SP m_global_regs[18] //Stack Pointer
-#define UB m_global_regs[19] //Upper Stack Bound
-#define BCR m_global_regs[20] //Bus Control Register
-#define TPR m_global_regs[21] //Timer Prescaler Register
-#define TCR m_global_regs[22] //Timer Compare Register
-#define TR compute_tr() //Timer Register
-#define WCR m_global_regs[24] //Watchdog Compare Register
-#define ISR m_global_regs[25] //Input Status Register
-#define FCR m_global_regs[26] //Function Control Register
-#define MCR m_global_regs[27] //Memory Control Register
+#define SP m_global_regs[18] //Stack Pointer
+#define UB m_global_regs[19] //Upper Stack Bound
+#define BCR m_global_regs[20] //Bus Control Register
+#define TPR m_global_regs[21] //Timer Prescaler Register
+#define TCR m_global_regs[22] //Timer Compare Register
+#define TR compute_tr() //Timer Register
+#define WCR m_global_regs[24] //Watchdog Compare Register
+#define ISR m_global_regs[25] //Input Status Register
+#define FCR m_global_regs[26] //Function Control Register
+#define MCR m_global_regs[27] //Memory Control Register
// 28 - 31 Reserved
/* SR flags */
-#define GET_C ( SR & 0x00000001) // bit 0 //CARRY
-#define GET_Z ((SR & 0x00000002)>>1) // bit 1 //ZERO
-#define GET_N ((SR & 0x00000004)>>2) // bit 2 //NEGATIVE
-#define GET_V ((SR & 0x00000008)>>3) // bit 3 //OVERFLOW
-#define GET_M ((SR & 0x00000010)>>4) // bit 4 //CACHE-MODE
-#define GET_H ((SR & 0x00000020)>>5) // bit 5 //HIGHGLOBAL
+#define GET_C ( SR & 0x00000001) // bit 0 //CARRY
+#define GET_Z ((SR & 0x00000002)>>1) // bit 1 //ZERO
+#define GET_N ((SR & 0x00000004)>>2) // bit 2 //NEGATIVE
+#define GET_V ((SR & 0x00000008)>>3) // bit 3 //OVERFLOW
+#define GET_M ((SR & 0x00000010)>>4) // bit 4 //CACHE-MODE
+#define GET_H ((SR & 0x00000020)>>5) // bit 5 //HIGHGLOBAL
// bit 6 RESERVED (always 0)
-#define GET_I ((SR & 0x00000080)>>7) // bit 7 //INTERRUPT-MODE
-#define GET_FTE ((SR & 0x00001f00)>>8) // bits 12 - 8 //Floating-Point Trap Enable
-#define GET_FRM ((SR & 0x00006000)>>13) // bits 14 - 13 //Floating-Point Rounding Mode
-#define GET_L ((SR & 0x00008000)>>15) // bit 15 //INTERRUPT-LOCK
-#define GET_T ((SR & 0x00010000)>>16) // bit 16 //TRACE-MODE
-#define GET_P ((SR & 0x00020000)>>17) // bit 17 //TRACE PENDING
-#define GET_S ((SR & 0x00040000)>>18) // bit 18 //SUPERVISOR STATE
-#define GET_ILC ((SR & 0x00180000)>>19) // bits 20 - 19 //INSTRUCTION-LENGTH
+#define GET_I ((SR & 0x00000080)>>7) // bit 7 //INTERRUPT-MODE
+#define GET_FTE ((SR & 0x00001f00)>>8) // bits 12 - 8 //Floating-Point Trap Enable
+#define GET_FRM ((SR & 0x00006000)>>13) // bits 14 - 13 //Floating-Point Rounding Mode
+#define GET_L ((SR & 0x00008000)>>15) // bit 15 //INTERRUPT-LOCK
+#define GET_T ((SR & 0x00010000)>>16) // bit 16 //TRACE-MODE
+#define GET_P ((SR & 0x00020000)>>17) // bit 17 //TRACE PENDING
+#define GET_S ((SR & 0x00040000)>>18) // bit 18 //SUPERVISOR STATE
+#define GET_ILC ((SR & 0x00180000)>>19) // bits 20 - 19 //INSTRUCTION-LENGTH
/* if FL is zero it is always interpreted as 16 */
-#define GET_FL ((SR & 0x01e00000) ? ((SR & 0x01e00000)>>21) : 16) // bits 24 - 21 //FRAME LENGTH
-#define GET_FP ((SR & 0xfe000000)>>25) // bits 31 - 25 //FRAME POINTER
-
-#define SET_C(val) (SR = (SR & ~0x00000001) | (val))
-#define SET_Z(val) (SR = (SR & ~0x00000002) | ((val) << 1))
-#define SET_N(val) (SR = (SR & ~0x00000004) | ((val) << 2))
-#define SET_V(val) (SR = (SR & ~0x00000008) | ((val) << 3))
-#define SET_M(val) (SR = (SR & ~0x00000010) | ((val) << 4))
-#define SET_H(val) (SR = (SR & ~0x00000020) | ((val) << 5))
-#define SET_I(val) (SR = (SR & ~0x00000080) | ((val) << 7))
-#define SET_FTE(val) (SR = (SR & ~0x00001f00) | ((val) << 8))
-#define SET_FRM(val) (SR = (SR & ~0x00006000) | ((val) << 13))
-#define SET_L(val) (SR = (SR & ~0x00008000) | ((val) << 15))
-#define SET_T(val) (SR = (SR & ~0x00010000) | ((val) << 16))
-#define SET_P(val) (SR = (SR & ~0x00020000) | ((val) << 17))
-#define SET_S(val) (SR = (SR & ~0x00040000) | ((val) << 18))
-#define SET_ILC(val) (SR = (SR & ~0x00180000) | ((val) << 19))
-#define SET_FL(val) (SR = (SR & ~0x01e00000) | ((val) << 21))
-#define SET_FP(val) (SR = (SR & ~0xfe000000) | ((val) << 25))
-
-#define SET_PC(val) PC = ((val) & 0xfffffffe) //PC(0) = 0
-#define SET_SP(val) SP = ((val) & 0xfffffffc) //SP(0) = SP(1) = 0
-#define SET_UB(val) UB = ((val) & 0xfffffffc) //UB(0) = UB(1) = 0
-
-#define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed
-
-
-#define CHECK_C(x) (SR = (SR & ~0x00000001) | (((x) & (((UINT64)1) << 32)) ? 1 : 0 ))
-#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 8: 0))
-#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) ? 8: 0))
-#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | ((((z) ^ (y)) & ((y) ^ (x)) & 0x80000000) ? 8: 0))
+#define GET_FL ((SR & 0x01e00000) ? ((SR & 0x01e00000)>>21) : 16) // bits 24 - 21 //FRAME LENGTH
+#define GET_FP ((SR & 0xfe000000)>>25) // bits 31 - 25 //FRAME POINTER
+
+#define SET_C(val) (SR = (SR & ~0x00000001) | (val))
+#define SET_Z(val) (SR = (SR & ~0x00000002) | ((val) << 1))
+#define SET_N(val) (SR = (SR & ~0x00000004) | ((val) << 2))
+#define SET_V(val) (SR = (SR & ~0x00000008) | ((val) << 3))
+#define SET_M(val) (SR = (SR & ~0x00000010) | ((val) << 4))
+#define SET_H(val) (SR = (SR & ~0x00000020) | ((val) << 5))
+#define SET_I(val) (SR = (SR & ~0x00000080) | ((val) << 7))
+#define SET_FTE(val) (SR = (SR & ~0x00001f00) | ((val) << 8))
+#define SET_FRM(val) (SR = (SR & ~0x00006000) | ((val) << 13))
+#define SET_L(val) (SR = (SR & ~0x00008000) | ((val) << 15))
+#define SET_T(val) (SR = (SR & ~0x00010000) | ((val) << 16))
+#define SET_P(val) (SR = (SR & ~0x00020000) | ((val) << 17))
+#define SET_S(val) (SR = (SR & ~0x00040000) | ((val) << 18))
+#define SET_ILC(val) (SR = (SR & ~0x00180000) | ((val) << 19))
+#define SET_FL(val) (SR = (SR & ~0x01e00000) | ((val) << 21))
+#define SET_FP(val) (SR = (SR & ~0xfe000000) | ((val) << 25))
+
+#define SET_PC(val) PC = ((val) & 0xfffffffe) //PC(0) = 0
+#define SET_SP(val) SP = ((val) & 0xfffffffc) //SP(0) = SP(1) = 0
+#define SET_UB(val) UB = ((val) & 0xfffffffc) //UB(0) = UB(1) = 0
+
+#define SET_LOW_SR(val) (SR = (SR & 0xffff0000) | ((val) & 0x0000ffff)) // when SR is addressed, only low 16 bits can be changed
+
+
+#define CHECK_C(x) (SR = (SR & ~0x00000001) | (((x) & (((UINT64)1) << 32)) ? 1 : 0 ))
+#define CHECK_VADD(x,y,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 8: 0))
+#define CHECK_VADD3(x,y,w,z) (SR = (SR & ~0x00000008) | ((((x) ^ (z)) & ((y) ^ (z)) & ((w) ^ (z)) & 0x80000000) ? 8: 0))
+#define CHECK_VSUB(x,y,z) (SR = (SR & ~0x00000008) | ((((z) ^ (y)) & ((y) ^ (x)) & 0x80000000) ? 8: 0))
/* FER flags */
-#define GET_ACCRUED (FER & 0x0000001f) //bits 4 - 0 //Floating-Point Accrued Exceptions
-#define GET_ACTUAL (FER & 0x00001f00) //bits 12 - 8 //Floating-Point Actual Exceptions
+#define GET_ACCRUED (FER & 0x0000001f) //bits 4 - 0 //Floating-Point Accrued Exceptions
+#define GET_ACTUAL (FER & 0x00001f00) //bits 12 - 8 //Floating-Point Actual Exceptions
//other bits are reversed, in particular 7 - 5 for the operating system.
//the user program can only changes the above 2 flags
@@ -788,21 +788,21 @@ void hyperstone_device::set_global_register(UINT8 code, UINT32 val)
adjust_timer_interrupt();
break;
- case TCR_REGISTER:
- if (oldval != val)
- {
+ case TCR_REGISTER:
+ if (oldval != val)
+ {
adjust_timer_interrupt();
if (m_intblock < 1)
m_intblock = 1;
}
- break;
+ break;
- case FCR_REGISTER:
- if ((oldval ^ val) & 0x00800000)
+ case FCR_REGISTER:
+ if ((oldval ^ val) & 0x00800000)
adjust_timer_interrupt();
if (m_intblock < 1)
m_intblock = 1;
- break;
+ break;
case MCR_REGISTER:
// bits 14..12 EntryTableMap
@@ -813,19 +813,19 @@ void hyperstone_device::set_global_register(UINT8 code, UINT32 val)
}
}
-#define GET_ABS_L_REG(code) m_local_regs[code]
-#define SET_L_REG(code, val) set_local_register(code, val)
-#define SET_ABS_L_REG(code, val) m_local_regs[code] = val
-#define GET_G_REG(code) get_global_register(code)
-#define SET_G_REG(code, val) set_global_register(code, val)
+#define GET_ABS_L_REG(code) m_local_regs[code]
+#define SET_L_REG(code, val) set_local_register(code, val)
+#define SET_ABS_L_REG(code, val) m_local_regs[code] = val
+#define GET_G_REG(code) get_global_register(code)
+#define SET_G_REG(code, val) set_global_register(code, val)
-#define S_BIT ((OP & 0x100) >> 8)
-#define N_BIT S_BIT
-#define D_BIT ((OP & 0x200) >> 9)
-#define N_VALUE ((N_BIT << 4) | (OP & 0x0f))
-#define DST_CODE ((OP & 0xf0) >> 4)
-#define SRC_CODE (OP & 0x0f)
-#define SIGN_BIT(val) ((val & 0x80000000) >> 31)
+#define S_BIT ((OP & 0x100) >> 8)
+#define N_BIT S_BIT
+#define D_BIT ((OP & 0x200) >> 9)
+#define N_VALUE ((N_BIT << 4) | (OP & 0x0f))
+#define DST_CODE ((OP & 0xf0) >> 4)
+#define SRC_CODE (OP & 0x0f)
+#define SIGN_BIT(val) ((val & 0x80000000) >> 31)
#define LOCAL 1
@@ -837,430 +837,430 @@ static const INT32 immediate_values[32] =
-8, -7, -6, -5, -4, -3, -2, -1
};
-#define WRITE_ONLY_REGMASK ((1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER))
+#define WRITE_ONLY_REGMASK ((1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER))
-#define decode_source(decode, local, hflag) \
-do \
-{ \
- if(local) \
- { \
- UINT8 code = (decode)->src; \
- (decode)->src_is_local = 1; \
+#define decode_source(decode, local, hflag) \
+do \
+{ \
+ if(local) \
+ { \
+ UINT8 code = (decode)->src; \
+ (decode)->src_is_local = 1; \
code = ((decode)->src + GET_FP) % 64; /* registers offset by frame pointer */\
- SREG = m_local_regs[code]; \
- code = ((decode)->src + 1 + GET_FP) % 64; \
- SREGF = m_local_regs[code]; \
- } \
- else \
- { \
- (decode)->src_is_local = 0; \
+ SREG = m_local_regs[code]; \
+ code = ((decode)->src + 1 + GET_FP) % 64; \
+ SREGF = m_local_regs[code]; \
+ } \
+ else \
+ { \
+ (decode)->src_is_local = 0; \
\
- if (!hflag) \
- { \
- SREG = get_global_register((decode)->src); \
+ if (!hflag) \
+ { \
+ SREG = get_global_register((decode)->src); \
\
- /* bound safe */ \
- if ((decode)->src != 15) \
- SREGF = get_global_register((decode)->src + 1); \
- } \
- else \
- { \
- (decode)->src += 16; \
+ /* bound safe */ \
+ if ((decode)->src != 15) \
+ SREGF = get_global_register((decode)->src + 1); \
+ } \
+ else \
+ { \
+ (decode)->src += 16; \
\
- SREG = get_global_register((decode)->src); \
- if ((WRITE_ONLY_REGMASK >> (decode)->src) & 1) \
- SREG = 0; /* write-only registers */ \
- else if ((decode)->src == ISR_REGISTER) \
- DEBUG_PRINTF(("read src ISR. PC = %08X\n",PPC)); \
+ SREG = get_global_register((decode)->src); \
+ if ((WRITE_ONLY_REGMASK >> (decode)->src) & 1) \
+ SREG = 0; /* write-only registers */ \
+ else if ((decode)->src == ISR_REGISTER) \
+ DEBUG_PRINTF(("read src ISR. PC = %08X\n",PPC)); \
\
- /* bound safe */ \
- if ((decode)->src != 31) \
- SREGF = get_global_register((decode)->src + 1); \
- } \
- } \
+ /* bound safe */ \
+ if ((decode)->src != 31) \
+ SREGF = get_global_register((decode)->src + 1); \
+ } \
+ } \
} while (0)
-#define decode_dest(decode, local, hflag) \
-do \
-{ \
- if(local) \
- { \
- UINT8 code = (decode)->dst; \
- (decode)->dst_is_local = 1; \
+#define decode_dest(decode, local, hflag) \
+do \
+{ \
+ if(local) \
+ { \
+ UINT8 code = (decode)->dst; \
+ (decode)->dst_is_local = 1; \
code = ((decode)->dst + GET_FP) % 64; /* registers offset by frame pointer */\
- DREG = m_local_regs[code]; \
- code = ((decode)->dst + 1 + GET_FP) % 64; \
- DREGF = m_local_regs[code]; \
- } \
- else \
- { \
- (decode)->dst_is_local = 0; \
+ DREG = m_local_regs[code]; \
+ code = ((decode)->dst + 1 + GET_FP) % 64; \
+ DREGF = m_local_regs[code]; \
+ } \
+ else \
+ { \
+ (decode)->dst_is_local = 0; \
\
- if (!hflag) \
- { \
- DREG = get_global_register((decode)->dst); \
+ if (!hflag) \
+ { \
+ DREG = get_global_register((decode)->dst); \
\
- /* bound safe */ \
- if ((decode)->dst != 15) \
- DREGF = get_global_register((decode)->dst + 1); \
- } \
- else \
- { \
- (decode)->dst += 16; \
+ /* bound safe */ \
+ if ((decode)->dst != 15) \
+ DREGF = get_global_register((decode)->dst + 1); \
+ } \
+ else \
+ { \
+ (decode)->dst += 16; \
\
- DREG = get_global_register((decode)->dst); \
- if( (decode)->dst == ISR_REGISTER ) \
- DEBUG_PRINTF(("read dst ISR. PC = %08X\n",PPC)); \
+ DREG = get_global_register((decode)->dst); \
+ if( (decode)->dst == ISR_REGISTER ) \
+ DEBUG_PRINTF(("read dst ISR. PC = %08X\n",PPC)); \
\
- /* bound safe */ \
- if ((decode)->dst != 31) \
- DREGF = get_global_register((decode)->dst + 1); \
- } \
- } \
+ /* bound safe */ \
+ if ((decode)->dst != 31) \
+ DREGF = get_global_register((decode)->dst + 1); \
+ } \
+ } \
} while (0)
-#define decode_RR(decode, dlocal, slocal) \
-do \
-{ \
- (decode)->src = SRC_CODE; \
- (decode)->dst = DST_CODE; \
- decode_source(decode, slocal, 0); \
- decode_dest(decode, dlocal, 0); \
+#define decode_RR(decode, dlocal, slocal) \
+do \
+{ \
+ (decode)->src = SRC_CODE; \
+ (decode)->dst = DST_CODE; \
+ decode_source(decode, slocal, 0); \
+ decode_dest(decode, dlocal, 0); \
\
- if( (slocal) == (dlocal) && SRC_CODE == DST_CODE ) \
- SAME_SRC_DST = 1; \
+ if( (slocal) == (dlocal) && SRC_CODE == DST_CODE ) \
+ SAME_SRC_DST = 1; \
\
- if( (slocal) == LOCAL && (dlocal) == LOCAL ) \
- { \
- if( SRC_CODE == ((DST_CODE + 1) % 64) ) \
- SAME_SRC_DSTF = 1; \
+ if( (slocal) == LOCAL && (dlocal) == LOCAL ) \
+ { \
+ if( SRC_CODE == ((DST_CODE + 1) % 64) ) \
+ SAME_SRC_DSTF = 1; \
\
- if( ((SRC_CODE + 1) % 64) == DST_CODE ) \
- SAME_SRCF_DST = 1; \
- } \
- else if( (slocal) == 0 && (dlocal) == 0 ) \
- { \
- if( SRC_CODE == (DST_CODE + 1) ) \
- SAME_SRC_DSTF = 1; \
+ if( ((SRC_CODE + 1) % 64) == DST_CODE ) \
+ SAME_SRCF_DST = 1; \
+ } \
+ else if( (slocal) == 0 && (dlocal) == 0 ) \
+ { \
+ if( SRC_CODE == (DST_CODE + 1) ) \
+ SAME_SRC_DSTF = 1; \
\
- if( (SRC_CODE + 1) == DST_CODE ) \
- SAME_SRCF_DST = 1; \
- } \
+ if( (SRC_CODE + 1) == DST_CODE ) \
+ SAME_SRCF_DST = 1; \
+ } \
} while (0)
-#define decode_LL(decode) \
-do \
-{ \
- (decode)->src = SRC_CODE; \
- (decode)->dst = DST_CODE; \
- decode_source(decode, LOCAL, 0); \
- decode_dest(decode, LOCAL, 0); \
+#define decode_LL(decode) \
+do \
+{ \
+ (decode)->src = SRC_CODE; \
+ (decode)->dst = DST_CODE; \
+ decode_source(decode, LOCAL, 0); \
+ decode_dest(decode, LOCAL, 0); \
\
- if( SRC_CODE == DST_CODE ) \
- SAME_SRC_DST = 1; \
+ if( SRC_CODE == DST_CODE ) \
+ SAME_SRC_DST = 1; \
\
- if( SRC_CODE == ((DST_CODE + 1) % 64) ) \
- SAME_SRC_DSTF = 1; \
+ if( SRC_CODE == ((DST_CODE + 1) % 64) ) \
+ SAME_SRC_DSTF = 1; \
} while (0)
-#define decode_LR(decode, slocal) \
-do \
-{ \
- (decode)->src = SRC_CODE; \
- (decode)->dst = DST_CODE; \
- decode_source(decode, slocal, 0); \
- decode_dest(decode, LOCAL, 0); \
+#define decode_LR(decode, slocal) \
+do \
+{ \
+ (decode)->src = SRC_CODE; \
+ (decode)->dst = DST_CODE; \
+ decode_source(decode, slocal, 0); \
+ decode_dest(decode, LOCAL, 0); \
\
- if( ((SRC_CODE + 1) % 64) == DST_CODE && slocal == LOCAL ) \
- SAME_SRCF_DST = 1; \
+ if( ((SRC_CODE + 1) % 64) == DST_CODE && slocal == LOCAL ) \
+ SAME_SRCF_DST = 1; \
} while (0)
-#define check_delay_PC() \
-do \
-{ \
- /* if PC is used in a delay instruction, the delayed PC should be used */ \
- if( m_delay.delay_cmd == DELAY_EXECUTE ) \
- { \
- PC = m_delay.delay_pc; \
- m_delay.delay_cmd = NO_DELAY; \
- } \
+#define check_delay_PC() \
+do \
+{ \
+ /* if PC is used in a delay instruction, the delayed PC should be used */ \
+ if( m_delay.delay_cmd == DELAY_EXECUTE ) \
+ { \
+ PC = m_delay.delay_pc; \
+ m_delay.delay_cmd = NO_DELAY; \
+ } \
} while (0)
-#define decode_immediate(decode, nbit) \
-do \
-{ \
- if (!nbit) \
- EXTRA_U = immediate_values[OP & 0x0f]; \
- else \
- switch( OP & 0x0f ) \
- { \
- default: \
- EXTRA_U = immediate_values[0x10 + (OP & 0x0f)]; \
- break; \
+#define decode_immediate(decode, nbit) \
+do \
+{ \
+ if (!nbit) \
+ EXTRA_U = immediate_values[OP & 0x0f]; \
+ else \
+ switch( OP & 0x0f ) \
+ { \
+ default: \
+ EXTRA_U = immediate_values[0x10 + (OP & 0x0f)]; \
+ break; \
\
- case 1: \
- m_instruction_length = 3; \
- EXTRA_U = (READ_OP(PC) << 16) | READ_OP(PC + 2); \
- PC += 4; \
- break; \
+ case 1: \
+ m_instruction_length = 3; \
+ EXTRA_U = (READ_OP(PC) << 16) | READ_OP(PC + 2); \
+ PC += 4; \
+ break; \
\
- case 2: \
- m_instruction_length = 2; \
- EXTRA_U = READ_OP(PC); \
- PC += 2; \
- break; \
+ case 2: \
+ m_instruction_length = 2; \
+ EXTRA_U = READ_OP(PC); \
+ PC += 2; \
+ break; \
\
- case 3: \
- m_instruction_length = 2; \
- EXTRA_U = 0xffff0000 | READ_OP(PC); \
- PC += 2; \
- break; \
- } \
+ case 3: \
+ m_instruction_length = 2; \
+ EXTRA_U = 0xffff0000 | READ_OP(PC); \
+ PC += 2; \
+ break; \
+ } \
} while (0)
-#define decode_const(decode) \
-do \
-{ \
- UINT16 imm_1 = READ_OP(PC); \
+#define decode_const(decode) \
+do \
+{ \
+ UINT16 imm_1 = READ_OP(PC); \
\
- PC += 2; \
- m_instruction_length = 2; \
+ PC += 2; \
+ m_instruction_length = 2; \
\
- if( E_BIT(imm_1) ) \
- { \
- UINT16 imm_2 = READ_OP(PC); \
+ if( E_BIT(imm_1) ) \
+ { \
+ UINT16 imm_2 = READ_OP(PC); \
\
- PC += 2; \
- m_instruction_length = 3; \
+ PC += 2; \
+ m_instruction_length = 3; \
\
- EXTRA_S = imm_2; \
- EXTRA_S |= ((imm_1 & 0x3fff) << 16); \
+ EXTRA_S = imm_2; \
+ EXTRA_S |= ((imm_1 & 0x3fff) << 16); \
\
- if( S_BIT_CONST(imm_1) ) \
- { \
- EXTRA_S |= 0xc0000000; \
- } \
- } \
- else \
- { \
- EXTRA_S = imm_1 & 0x3fff; \
+ if( S_BIT_CONST(imm_1) ) \
+ { \
+ EXTRA_S |= 0xc0000000; \
+ } \
+ } \
+ else \
+ { \
+ EXTRA_S = imm_1 & 0x3fff; \
\
- if( S_BIT_CONST(imm_1) ) \
- { \
- EXTRA_S |= 0xffffc000; \
- } \
- } \
+ if( S_BIT_CONST(imm_1) ) \
+ { \
+ EXTRA_S |= 0xffffc000; \
+ } \
+ } \
} while (0)
-#define decode_pcrel(decode) \
-do \
-{ \
- if( OP & 0x80 ) \
- { \
- UINT16 next = READ_OP(PC); \
+#define decode_pcrel(decode) \
+do \
+{ \
+ if( OP & 0x80 ) \
+ { \
+ UINT16 next = READ_OP(PC); \
\
- PC += 2; \
- m_instruction_length = 2; \
+ PC += 2; \
+ m_instruction_length = 2; \
\
- EXTRA_S = (OP & 0x7f) << 16; \
- EXTRA_S |= (next & 0xfffe); \
+ EXTRA_S = (OP & 0x7f) << 16; \
+ EXTRA_S |= (next & 0xfffe); \
\
- if( next & 1 ) \
- EXTRA_S |= 0xff800000; \
- } \
- else \
- { \
- EXTRA_S = OP & 0x7e; \
+ if( next & 1 ) \
+ EXTRA_S |= 0xff800000; \
+ } \
+ else \
+ { \
+ EXTRA_S = OP & 0x7e; \
\
- if( OP & 1 ) \
- EXTRA_S |= 0xffffff80; \
- } \
+ if( OP & 1 ) \
+ EXTRA_S |= 0xffffff80; \
+ } \
} while (0)
-#define decode_dis(decode) \
-do \
-{ \
- UINT16 next_1 = READ_OP(PC); \
+#define decode_dis(decode) \
+do \
+{ \
+ UINT16 next_1 = READ_OP(PC); \
\
- PC += 2; \
- m_instruction_length = 2; \
+ PC += 2; \
+ m_instruction_length = 2; \
\
- (decode)->sub_type = DD(next_1); \
+ (decode)->sub_type = DD(next_1); \
\
- if( E_BIT(next_1) ) \
- { \
- UINT16 next_2 = READ_OP(PC); \
+ if( E_BIT(next_1) ) \
+ { \
+ UINT16 next_2 = READ_OP(PC); \
\
- PC += 2; \
- m_instruction_length = 3; \
+ PC += 2; \
+ m_instruction_length = 3; \
\
- EXTRA_S = next_2; \
- EXTRA_S |= ((next_1 & 0xfff) << 16); \
+ EXTRA_S = next_2; \
+ EXTRA_S |= ((next_1 & 0xfff) << 16); \
\
- if( S_BIT_CONST(next_1) ) \
- { \
- EXTRA_S |= 0xf0000000; \
- } \
- } \
- else \
- { \
- EXTRA_S = next_1 & 0xfff; \
+ if( S_BIT_CONST(next_1) ) \
+ { \
+ EXTRA_S |= 0xf0000000; \
+ } \
+ } \
+ else \
+ { \
+ EXTRA_S = next_1 & 0xfff; \
\
- if( S_BIT_CONST(next_1) ) \
- { \
- EXTRA_S |= 0xfffff000; \
- } \
- } \
+ if( S_BIT_CONST(next_1) ) \
+ { \
+ EXTRA_S |= 0xfffff000; \
+ } \
+ } \
} while (0)
-#define decode_lim(decode) \
-do \
-{ \
- UINT32 next = READ_OP(PC); \
- PC += 2; \
- m_instruction_length = 2; \
+#define decode_lim(decode) \
+do \
+{ \
+ UINT32 next = READ_OP(PC); \
+ PC += 2; \
+ m_instruction_length = 2; \
\
- (decode)->sub_type = X_CODE(next); \
+ (decode)->sub_type = X_CODE(next); \
\
- if( E_BIT(next) ) \
- { \
- EXTRA_U = ((next & 0xfff) << 16) | READ_OP(PC); \
- PC += 2; \
- m_instruction_length = 3; \
- } \
- else \
- { \
- EXTRA_U = next & 0xfff; \
- } \
+ if( E_BIT(next) ) \
+ { \
+ EXTRA_U = ((next & 0xfff) << 16) | READ_OP(PC); \
+ PC += 2; \
+ m_instruction_length = 3; \
+ } \
+ else \
+ { \
+ EXTRA_U = next & 0xfff; \
+ } \
} while (0)
-#define RRdecode(decode, dlocal, slocal) \
-do \
-{ \
- check_delay_PC(); \
- decode_RR(decode, dlocal, slocal); \
+#define RRdecode(decode, dlocal, slocal) \
+do \
+{ \
+ check_delay_PC(); \
+ decode_RR(decode, dlocal, slocal); \
} while (0)
-#define RRlimdecode(decode, dlocal, slocal) \
-do \
-{ \
- decode_lim(decode); \
- check_delay_PC(); \
- decode_RR(decode, dlocal, slocal); \
+#define RRlimdecode(decode, dlocal, slocal) \
+do \
+{ \
+ decode_lim(decode); \
+ check_delay_PC(); \
+ decode_RR(decode, dlocal, slocal); \
} while (0)
-#define RRconstdecode(decode, dlocal, slocal) \
-do \
-{ \
- decode_const(decode); \
- check_delay_PC(); \
- decode_RR(decode, dlocal, slocal); \
+#define RRconstdecode(decode, dlocal, slocal) \
+do \
+{ \
+ decode_const(decode); \
+ check_delay_PC(); \
+ decode_RR(decode, dlocal, slocal); \
} while (0)
-#define RRdisdecode(decode, dlocal, slocal) \
-do \
-{ \
- decode_dis(decode); \
- check_delay_PC(); \
- decode_RR(decode, dlocal, slocal); \
+#define RRdisdecode(decode, dlocal, slocal) \
+do \
+{ \
+ decode_dis(decode); \
+ check_delay_PC(); \
+ decode_RR(decode, dlocal, slocal); \
} while (0)
-#define RRdecodewithHflag(decode, dlocal, slocal) \
-do \
-{ \
- check_delay_PC(); \
- (decode)->src = SRC_CODE; \
- (decode)->dst = DST_CODE; \
- decode_source(decode, slocal, GET_H); \
- decode_dest(decode, dlocal, GET_H); \
+#define RRdecodewithHflag(decode, dlocal, slocal) \
+do \
+{ \
+ check_delay_PC(); \
+ (decode)->src = SRC_CODE; \
+ (decode)->dst = DST_CODE; \
+ decode_source(decode, slocal, GET_H); \
+ decode_dest(decode, dlocal, GET_H); \
\
- if(GET_H) \
- if(slocal == 0 && dlocal == 0) \
- DEBUG_PRINTF(("MOV with hflag and 2 GRegs! PC = %08X\n",PPC)); \
+ if(GET_H) \
+ if(slocal == 0 && dlocal == 0) \
+ DEBUG_PRINTF(("MOV with hflag and 2 GRegs! PC = %08X\n",PPC)); \
} while (0)
-#define Rimmdecode(decode, dlocal, nbit) \
-do \
-{ \
- decode_immediate(decode, nbit); \
- check_delay_PC(); \
- (decode)->dst = DST_CODE; \
- decode_dest(decode, dlocal, 0); \
+#define Rimmdecode(decode, dlocal, nbit) \
+do \
+{ \
+ decode_immediate(decode, nbit); \
+ check_delay_PC(); \
+ (decode)->dst = DST_CODE; \
+ decode_dest(decode, dlocal, 0); \
} while (0)
-#define Rndecode(decode, dlocal) \
-do \
-{ \
- check_delay_PC(); \
- (decode)->dst = DST_CODE; \
- decode_dest(decode, dlocal, 0); \
+#define Rndecode(decode, dlocal) \
+do \
+{ \
+ check_delay_PC(); \
+ (decode)->dst = DST_CODE; \
+ decode_dest(decode, dlocal, 0); \
} while (0)
-#define RimmdecodewithHflag(decode, dlocal, nbit) \
-do \
-{ \
- decode_immediate(decode, nbit); \
- check_delay_PC(); \
- (decode)->dst = DST_CODE; \
- decode_dest(decode, dlocal, GET_H); \
+#define RimmdecodewithHflag(decode, dlocal, nbit) \
+do \
+{ \
+ decode_immediate(decode, nbit); \
+ check_delay_PC(); \
+ (decode)->dst = DST_CODE; \
+ decode_dest(decode, dlocal, GET_H); \
} while (0)
-#define Lndecode(decode) \
-do \
-{ \
- check_delay_PC(); \
- (decode)->dst = DST_CODE; \
- decode_dest(decode, LOCAL, 0); \
+#define Lndecode(decode) \
+do \
+{ \
+ check_delay_PC(); \
+ (decode)->dst = DST_CODE; \
+ decode_dest(decode, LOCAL, 0); \
} while (0)
-#define LLdecode(decode) \
-do \
-{ \
- check_delay_PC(); \
- decode_LL(decode); \
+#define LLdecode(decode) \
+do \
+{ \
+ check_delay_PC(); \
+ decode_LL(decode); \
} while (0)
-#define LLextdecode(decode) \
-do \
-{ \
- m_instruction_length = 2; \
- EXTRA_U = READ_OP(PC); \
- PC += 2; \
- check_delay_PC(); \
- decode_LL(decode); \
+#define LLextdecode(decode) \
+do \
+{ \
+ m_instruction_length = 2; \
+ EXTRA_U = READ_OP(PC); \
+ PC += 2; \
+ check_delay_PC(); \
+ decode_LL(decode); \
} while (0)
-#define LRdecode(decode, slocal) \
-do \
-{ \
- check_delay_PC(); \
- decode_LR(decode, slocal); \
+#define LRdecode(decode, slocal) \
+do \
+{ \
+ check_delay_PC(); \
+ decode_LR(decode, slocal); \
} while (0)
-#define LRconstdecode(decode, slocal) \
-do \
-{ \
- decode_const(decode); \
- check_delay_PC(); \
- decode_LR(decode, slocal); \
+#define LRconstdecode(decode, slocal) \
+do \
+{ \
+ decode_const(decode); \
+ check_delay_PC(); \
+ decode_LR(decode, slocal); \
} while (0)
-#define PCreldecode(decode) \
-do \
-{ \
- decode_pcrel(decode); \
- check_delay_PC(); \
+#define PCreldecode(decode) \
+do \
+{ \
+ decode_pcrel(decode); \
+ check_delay_PC(); \
} while (0)
-#define PCadrdecode(decode) \
-do \
-{ \
- check_delay_PC(); \
+#define PCadrdecode(decode) \
+do \
+{ \
+ check_delay_PC(); \
} while (0)
-#define no_decode(decode) \
-do \
-{ \
+#define no_decode(decode) \
+do \
+{ \
} while (0)
@@ -1416,13 +1416,13 @@ void hyperstone_device::execute_software(struct hyperstone_device::regs_decode *
7 - TIMER (trap 55)
*/
-#define INT1_LINE_STATE ((ISR >> 0) & 1)
-#define INT2_LINE_STATE ((ISR >> 1) & 1)
-#define INT3_LINE_STATE ((ISR >> 2) & 1)
-#define INT4_LINE_STATE ((ISR >> 3) & 1)
-#define IO1_LINE_STATE ((ISR >> 4) & 1)
-#define IO2_LINE_STATE ((ISR >> 5) & 1)
-#define IO3_LINE_STATE ((ISR >> 6) & 1)
+#define INT1_LINE_STATE ((ISR >> 0) & 1)
+#define INT2_LINE_STATE ((ISR >> 1) & 1)
+#define INT3_LINE_STATE ((ISR >> 2) & 1)
+#define INT4_LINE_STATE ((ISR >> 3) & 1)
+#define IO1_LINE_STATE ((ISR >> 4) & 1)
+#define IO2_LINE_STATE ((ISR >> 5) & 1)
+#define IO3_LINE_STATE ((ISR >> 6) & 1)
void hyperstone_device::check_interrupts()
{
@@ -1563,118 +1563,118 @@ void hyperstone_device::init(int scale_mask)
astring tempstr;
state_add(STATE_GENPC, "GENPC", m_global_regs[0]).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_global_regs[1]).callimport().callexport().formatstr("%40s").noshow();
- state_add(E132XS_PC, "PC :%08X", m_global_regs[0]).mask(0xffffffff);
- state_add(E132XS_SR, "SR :%08X", m_global_regs[1]).mask(0xffffffff);
- state_add(E132XS_FER, "FER :%08X", m_global_regs[2]).mask(0xffffffff);
- state_add(E132XS_G3, "G3 :%08X", m_global_regs[3]).mask(0xffffffff);
- state_add(E132XS_G4, "G4 :%08X", m_global_regs[4]).mask(0xffffffff);
- state_add(E132XS_G5, "G5 :%08X", m_global_regs[5]).mask(0xffffffff);
- state_add(E132XS_G6, "G6 :%08X", m_global_regs[6]).mask(0xffffffff);
- state_add(E132XS_G7, "G7 :%08X", m_global_regs[7]).mask(0xffffffff);
- state_add(E132XS_G8, "G8 :%08X", m_global_regs[8]).mask(0xffffffff);
- state_add(E132XS_G9, "G9 :%08X", m_global_regs[9]).mask(0xffffffff);
- state_add(E132XS_G10, "G10 :%08X", m_global_regs[10]).mask(0xffffffff);
- state_add(E132XS_G11, "G11 :%08X", m_global_regs[11]).mask(0xffffffff);
- state_add(E132XS_G12, "G12 :%08X", m_global_regs[12]).mask(0xffffffff);
- state_add(E132XS_G13, "G13 :%08X", m_global_regs[13]).mask(0xffffffff);
- state_add(E132XS_G14, "G14 :%08X", m_global_regs[14]).mask(0xffffffff);
- state_add(E132XS_G15, "G15 :%08X", m_global_regs[15]).mask(0xffffffff);
- state_add(E132XS_G16, "G16 :%08X", m_global_regs[16]).mask(0xffffffff);
- state_add(E132XS_G17, "G17 :%08X", m_global_regs[17]).mask(0xffffffff);
- state_add(E132XS_SP, "SP :%08X", m_global_regs[18]).mask(0xffffffff);
- state_add(E132XS_UB, "UB :%08X", m_global_regs[19]).mask(0xffffffff);
- state_add(E132XS_BCR, "BCR :%08X", m_global_regs[20]).mask(0xffffffff);
- state_add(E132XS_TPR, "TPR :%08X", m_global_regs[21]).mask(0xffffffff);
- state_add(E132XS_TCR, "TCR :%08X", m_global_regs[22]).mask(0xffffffff);
- state_add(E132XS_TR, "TR :%08X", m_global_regs[23]).mask(0xffffffff);
- state_add(E132XS_WCR, "WCR :%08X", m_global_regs[24]).mask(0xffffffff);
- state_add(E132XS_ISR, "ISR :%08X", m_global_regs[25]).mask(0xffffffff);
- state_add(E132XS_FCR, "FCR :%08X", m_global_regs[26]).mask(0xffffffff);
- state_add(E132XS_MCR, "MCR :%08X", m_global_regs[27]).mask(0xffffffff);
- state_add(E132XS_G28, "G28 :%08X", m_global_regs[28]).mask(0xffffffff);
- state_add(E132XS_G29, "G29 :%08X", m_global_regs[29]).mask(0xffffffff);
- state_add(E132XS_G30, "G30 :%08X", m_global_regs[30]).mask(0xffffffff);
- state_add(E132XS_G31, "G31 :%08X", m_global_regs[31]).mask(0xffffffff);
- state_add(E132XS_CL0, "CL0 :%08X", m_local_regs[(0 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL1, "CL1 :%08X", m_local_regs[(1 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL2, "CL2 :%08X", m_local_regs[(2 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL3, "CL3 :%08X", m_local_regs[(3 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL4, "CL4 :%08X", m_local_regs[(4 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL5, "CL5 :%08X", m_local_regs[(5 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL6, "CL6 :%08X", m_local_regs[(6 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL7, "CL7 :%08X", m_local_regs[(7 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL8, "CL8 :%08X", m_local_regs[(8 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL9, "CL9 :%08X", m_local_regs[(9 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL10, "CL10:%08X", m_local_regs[(10 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL11, "CL11:%08X", m_local_regs[(11 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL12, "CL12:%08X", m_local_regs[(12 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL13, "CL13:%08X", m_local_regs[(13 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL14, "CL14:%08X", m_local_regs[(14 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL15, "CL15:%08X", m_local_regs[(15 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_L0, "L0 :%08X", m_local_regs[0]).mask(0xffffffff);
- state_add(E132XS_L1, "L1 :%08X", m_local_regs[1]).mask(0xffffffff);
- state_add(E132XS_L2, "L2 :%08X", m_local_regs[2]).mask(0xffffffff);
- state_add(E132XS_L3, "L3 :%08X", m_local_regs[3]).mask(0xffffffff);
- state_add(E132XS_L4, "L4 :%08X", m_local_regs[4]).mask(0xffffffff);
- state_add(E132XS_L5, "L5 :%08X", m_local_regs[5]).mask(0xffffffff);
- state_add(E132XS_L6, "L6 :%08X", m_local_regs[6]).mask(0xffffffff);
- state_add(E132XS_L7, "L7 :%08X", m_local_regs[7]).mask(0xffffffff);
- state_add(E132XS_L8, "L8 :%08X", m_local_regs[8]).mask(0xffffffff);
- state_add(E132XS_L9, "L9 :%08X", m_local_regs[9]).mask(0xffffffff);
- state_add(E132XS_L10, "L10 :%08X", m_local_regs[10]).mask(0xffffffff);
- state_add(E132XS_L11, "L11 :%08X", m_local_regs[11]).mask(0xffffffff);
- state_add(E132XS_L12, "L12 :%08X", m_local_regs[12]).mask(0xffffffff);
- state_add(E132XS_L13, "L13 :%08X", m_local_regs[13]).mask(0xffffffff);
- state_add(E132XS_L14, "L14 :%08X", m_local_regs[14]).mask(0xffffffff);
- state_add(E132XS_L15, "L15 :%08X", m_local_regs[15]).mask(0xffffffff);
- state_add(E132XS_L16, "L16 :%08X", m_local_regs[16]).mask(0xffffffff);
- state_add(E132XS_L17, "L17 :%08X", m_local_regs[17]).mask(0xffffffff);
- state_add(E132XS_L18, "L18 :%08X", m_local_regs[18]).mask(0xffffffff);
- state_add(E132XS_L19, "L19 :%08X", m_local_regs[19]).mask(0xffffffff);
- state_add(E132XS_L20, "L20 :%08X", m_local_regs[20]).mask(0xffffffff);
- state_add(E132XS_L21, "L21 :%08X", m_local_regs[21]).mask(0xffffffff);
- state_add(E132XS_L22, "L22 :%08X", m_local_regs[22]).mask(0xffffffff);
- state_add(E132XS_L23, "L23 :%08X", m_local_regs[23]).mask(0xffffffff);
- state_add(E132XS_L24, "L24 :%08X", m_local_regs[24]).mask(0xffffffff);
- state_add(E132XS_L25, "L25 :%08X", m_local_regs[25]).mask(0xffffffff);
- state_add(E132XS_L26, "L26 :%08X", m_local_regs[26]).mask(0xffffffff);
- state_add(E132XS_L27, "L27 :%08X", m_local_regs[27]).mask(0xffffffff);
- state_add(E132XS_L28, "L28 :%08X", m_local_regs[28]).mask(0xffffffff);
- state_add(E132XS_L29, "L29 :%08X", m_local_regs[29]).mask(0xffffffff);
- state_add(E132XS_L30, "L30 :%08X", m_local_regs[30]).mask(0xffffffff);
- state_add(E132XS_L31, "L31 :%08X", m_local_regs[31]).mask(0xffffffff);
- state_add(E132XS_L32, "L32 :%08X", m_local_regs[32]).mask(0xffffffff);
- state_add(E132XS_L33, "L33 :%08X", m_local_regs[33]).mask(0xffffffff);
- state_add(E132XS_L34, "L34 :%08X", m_local_regs[34]).mask(0xffffffff);
- state_add(E132XS_L35, "L35 :%08X", m_local_regs[35]).mask(0xffffffff);
- state_add(E132XS_L36, "L36 :%08X", m_local_regs[36]).mask(0xffffffff);
- state_add(E132XS_L37, "L37 :%08X", m_local_regs[37]).mask(0xffffffff);
- state_add(E132XS_L38, "L38 :%08X", m_local_regs[38]).mask(0xffffffff);
- state_add(E132XS_L39, "L39 :%08X", m_local_regs[39]).mask(0xffffffff);
- state_add(E132XS_L40, "L40 :%08X", m_local_regs[40]).mask(0xffffffff);
- state_add(E132XS_L41, "L41 :%08X", m_local_regs[41]).mask(0xffffffff);
- state_add(E132XS_L42, "L42 :%08X", m_local_regs[42]).mask(0xffffffff);
- state_add(E132XS_L43, "L43 :%08X", m_local_regs[43]).mask(0xffffffff);
- state_add(E132XS_L44, "L44 :%08X", m_local_regs[44]).mask(0xffffffff);
- state_add(E132XS_L45, "L45 :%08X", m_local_regs[45]).mask(0xffffffff);
- state_add(E132XS_L46, "L46 :%08X", m_local_regs[46]).mask(0xffffffff);
- state_add(E132XS_L47, "L47 :%08X", m_local_regs[47]).mask(0xffffffff);
- state_add(E132XS_L48, "L48 :%08X", m_local_regs[48]).mask(0xffffffff);
- state_add(E132XS_L49, "L49 :%08X", m_local_regs[49]).mask(0xffffffff);
- state_add(E132XS_L50, "L50 :%08X", m_local_regs[50]).mask(0xffffffff);
- state_add(E132XS_L51, "L51 :%08X", m_local_regs[51]).mask(0xffffffff);
- state_add(E132XS_L52, "L52 :%08X", m_local_regs[52]).mask(0xffffffff);
- state_add(E132XS_L53, "L53 :%08X", m_local_regs[53]).mask(0xffffffff);
- state_add(E132XS_L54, "L54 :%08X", m_local_regs[54]).mask(0xffffffff);
- state_add(E132XS_L55, "L55 :%08X", m_local_regs[55]).mask(0xffffffff);
- state_add(E132XS_L56, "L56 :%08X", m_local_regs[56]).mask(0xffffffff);
- state_add(E132XS_L57, "L57 :%08X", m_local_regs[57]).mask(0xffffffff);
- state_add(E132XS_L58, "L58 :%08X", m_local_regs[58]).mask(0xffffffff);
- state_add(E132XS_L59, "L59 :%08X", m_local_regs[59]).mask(0xffffffff);
- state_add(E132XS_L60, "L60 :%08X", m_local_regs[60]).mask(0xffffffff);
- state_add(E132XS_L61, "L61 :%08X", m_local_regs[61]).mask(0xffffffff);
- state_add(E132XS_L62, "L62 :%08X", m_local_regs[62]).mask(0xffffffff);
- state_add(E132XS_L63, "L63 :%08X", m_local_regs[63]).mask(0xffffffff);
+ state_add(E132XS_PC, "PC :%08X", m_global_regs[0]).mask(0xffffffff);
+ state_add(E132XS_SR, "SR :%08X", m_global_regs[1]).mask(0xffffffff);
+ state_add(E132XS_FER, "FER :%08X", m_global_regs[2]).mask(0xffffffff);
+ state_add(E132XS_G3, "G3 :%08X", m_global_regs[3]).mask(0xffffffff);
+ state_add(E132XS_G4, "G4 :%08X", m_global_regs[4]).mask(0xffffffff);
+ state_add(E132XS_G5, "G5 :%08X", m_global_regs[5]).mask(0xffffffff);
+ state_add(E132XS_G6, "G6 :%08X", m_global_regs[6]).mask(0xffffffff);
+ state_add(E132XS_G7, "G7 :%08X", m_global_regs[7]).mask(0xffffffff);
+ state_add(E132XS_G8, "G8 :%08X", m_global_regs[8]).mask(0xffffffff);
+ state_add(E132XS_G9, "G9 :%08X", m_global_regs[9]).mask(0xffffffff);
+ state_add(E132XS_G10, "G10 :%08X", m_global_regs[10]).mask(0xffffffff);
+ state_add(E132XS_G11, "G11 :%08X", m_global_regs[11]).mask(0xffffffff);
+ state_add(E132XS_G12, "G12 :%08X", m_global_regs[12]).mask(0xffffffff);
+ state_add(E132XS_G13, "G13 :%08X", m_global_regs[13]).mask(0xffffffff);
+ state_add(E132XS_G14, "G14 :%08X", m_global_regs[14]).mask(0xffffffff);
+ state_add(E132XS_G15, "G15 :%08X", m_global_regs[15]).mask(0xffffffff);
+ state_add(E132XS_G16, "G16 :%08X", m_global_regs[16]).mask(0xffffffff);
+ state_add(E132XS_G17, "G17 :%08X", m_global_regs[17]).mask(0xffffffff);
+ state_add(E132XS_SP, "SP :%08X", m_global_regs[18]).mask(0xffffffff);
+ state_add(E132XS_UB, "UB :%08X", m_global_regs[19]).mask(0xffffffff);
+ state_add(E132XS_BCR, "BCR :%08X", m_global_regs[20]).mask(0xffffffff);
+ state_add(E132XS_TPR, "TPR :%08X", m_global_regs[21]).mask(0xffffffff);
+ state_add(E132XS_TCR, "TCR :%08X", m_global_regs[22]).mask(0xffffffff);
+ state_add(E132XS_TR, "TR :%08X", m_global_regs[23]).mask(0xffffffff);
+ state_add(E132XS_WCR, "WCR :%08X", m_global_regs[24]).mask(0xffffffff);
+ state_add(E132XS_ISR, "ISR :%08X", m_global_regs[25]).mask(0xffffffff);
+ state_add(E132XS_FCR, "FCR :%08X", m_global_regs[26]).mask(0xffffffff);
+ state_add(E132XS_MCR, "MCR :%08X", m_global_regs[27]).mask(0xffffffff);
+ state_add(E132XS_G28, "G28 :%08X", m_global_regs[28]).mask(0xffffffff);
+ state_add(E132XS_G29, "G29 :%08X", m_global_regs[29]).mask(0xffffffff);
+ state_add(E132XS_G30, "G30 :%08X", m_global_regs[30]).mask(0xffffffff);
+ state_add(E132XS_G31, "G31 :%08X", m_global_regs[31]).mask(0xffffffff);
+ state_add(E132XS_CL0, "CL0 :%08X", m_local_regs[(0 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL1, "CL1 :%08X", m_local_regs[(1 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL2, "CL2 :%08X", m_local_regs[(2 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL3, "CL3 :%08X", m_local_regs[(3 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL4, "CL4 :%08X", m_local_regs[(4 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL5, "CL5 :%08X", m_local_regs[(5 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL6, "CL6 :%08X", m_local_regs[(6 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL7, "CL7 :%08X", m_local_regs[(7 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL8, "CL8 :%08X", m_local_regs[(8 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL9, "CL9 :%08X", m_local_regs[(9 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL10, "CL10:%08X", m_local_regs[(10 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL11, "CL11:%08X", m_local_regs[(11 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL12, "CL12:%08X", m_local_regs[(12 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL13, "CL13:%08X", m_local_regs[(13 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL14, "CL14:%08X", m_local_regs[(14 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_CL15, "CL15:%08X", m_local_regs[(15 + GET_FP) % 64]).mask(0xffffffff);
+ state_add(E132XS_L0, "L0 :%08X", m_local_regs[0]).mask(0xffffffff);
+ state_add(E132XS_L1, "L1 :%08X", m_local_regs[1]).mask(0xffffffff);
+ state_add(E132XS_L2, "L2 :%08X", m_local_regs[2]).mask(0xffffffff);
+ state_add(E132XS_L3, "L3 :%08X", m_local_regs[3]).mask(0xffffffff);
+ state_add(E132XS_L4, "L4 :%08X", m_local_regs[4]).mask(0xffffffff);
+ state_add(E132XS_L5, "L5 :%08X", m_local_regs[5]).mask(0xffffffff);
+ state_add(E132XS_L6, "L6 :%08X", m_local_regs[6]).mask(0xffffffff);
+ state_add(E132XS_L7, "L7 :%08X", m_local_regs[7]).mask(0xffffffff);
+ state_add(E132XS_L8, "L8 :%08X", m_local_regs[8]).mask(0xffffffff);
+ state_add(E132XS_L9, "L9 :%08X", m_local_regs[9]).mask(0xffffffff);
+ state_add(E132XS_L10, "L10 :%08X", m_local_regs[10]).mask(0xffffffff);
+ state_add(E132XS_L11, "L11 :%08X", m_local_regs[11]).mask(0xffffffff);
+ state_add(E132XS_L12, "L12 :%08X", m_local_regs[12]).mask(0xffffffff);
+ state_add(E132XS_L13, "L13 :%08X", m_local_regs[13]).mask(0xffffffff);
+ state_add(E132XS_L14, "L14 :%08X", m_local_regs[14]).mask(0xffffffff);
+ state_add(E132XS_L15, "L15 :%08X", m_local_regs[15]).mask(0xffffffff);
+ state_add(E132XS_L16, "L16 :%08X", m_local_regs[16]).mask(0xffffffff);
+ state_add(E132XS_L17, "L17 :%08X", m_local_regs[17]).mask(0xffffffff);
+ state_add(E132XS_L18, "L18 :%08X", m_local_regs[18]).mask(0xffffffff);
+ state_add(E132XS_L19, "L19 :%08X", m_local_regs[19]).mask(0xffffffff);
+ state_add(E132XS_L20, "L20 :%08X", m_local_regs[20]).mask(0xffffffff);
+ state_add(E132XS_L21, "L21 :%08X", m_local_regs[21]).mask(0xffffffff);
+ state_add(E132XS_L22, "L22 :%08X", m_local_regs[22]).mask(0xffffffff);
+ state_add(E132XS_L23, "L23 :%08X", m_local_regs[23]).mask(0xffffffff);
+ state_add(E132XS_L24, "L24 :%08X", m_local_regs[24]).mask(0xffffffff);
+ state_add(E132XS_L25, "L25 :%08X", m_local_regs[25]).mask(0xffffffff);
+ state_add(E132XS_L26, "L26 :%08X", m_local_regs[26]).mask(0xffffffff);
+ state_add(E132XS_L27, "L27 :%08X", m_local_regs[27]).mask(0xffffffff);
+ state_add(E132XS_L28, "L28 :%08X", m_local_regs[28]).mask(0xffffffff);
+ state_add(E132XS_L29, "L29 :%08X", m_local_regs[29]).mask(0xffffffff);
+ state_add(E132XS_L30, "L30 :%08X", m_local_regs[30]).mask(0xffffffff);
+ state_add(E132XS_L31, "L31 :%08X", m_local_regs[31]).mask(0xffffffff);
+ state_add(E132XS_L32, "L32 :%08X", m_local_regs[32]).mask(0xffffffff);
+ state_add(E132XS_L33, "L33 :%08X", m_local_regs[33]).mask(0xffffffff);
+ state_add(E132XS_L34, "L34 :%08X", m_local_regs[34]).mask(0xffffffff);
+ state_add(E132XS_L35, "L35 :%08X", m_local_regs[35]).mask(0xffffffff);
+ state_add(E132XS_L36, "L36 :%08X", m_local_regs[36]).mask(0xffffffff);
+ state_add(E132XS_L37, "L37 :%08X", m_local_regs[37]).mask(0xffffffff);
+ state_add(E132XS_L38, "L38 :%08X", m_local_regs[38]).mask(0xffffffff);
+ state_add(E132XS_L39, "L39 :%08X", m_local_regs[39]).mask(0xffffffff);
+ state_add(E132XS_L40, "L40 :%08X", m_local_regs[40]).mask(0xffffffff);
+ state_add(E132XS_L41, "L41 :%08X", m_local_regs[41]).mask(0xffffffff);
+ state_add(E132XS_L42, "L42 :%08X", m_local_regs[42]).mask(0xffffffff);
+ state_add(E132XS_L43, "L43 :%08X", m_local_regs[43]).mask(0xffffffff);
+ state_add(E132XS_L44, "L44 :%08X", m_local_regs[44]).mask(0xffffffff);
+ state_add(E132XS_L45, "L45 :%08X", m_local_regs[45]).mask(0xffffffff);
+ state_add(E132XS_L46, "L46 :%08X", m_local_regs[46]).mask(0xffffffff);
+ state_add(E132XS_L47, "L47 :%08X", m_local_regs[47]).mask(0xffffffff);
+ state_add(E132XS_L48, "L48 :%08X", m_local_regs[48]).mask(0xffffffff);
+ state_add(E132XS_L49, "L49 :%08X", m_local_regs[49]).mask(0xffffffff);
+ state_add(E132XS_L50, "L50 :%08X", m_local_regs[50]).mask(0xffffffff);
+ state_add(E132XS_L51, "L51 :%08X", m_local_regs[51]).mask(0xffffffff);
+ state_add(E132XS_L52, "L52 :%08X", m_local_regs[52]).mask(0xffffffff);
+ state_add(E132XS_L53, "L53 :%08X", m_local_regs[53]).mask(0xffffffff);
+ state_add(E132XS_L54, "L54 :%08X", m_local_regs[54]).mask(0xffffffff);
+ state_add(E132XS_L55, "L55 :%08X", m_local_regs[55]).mask(0xffffffff);
+ state_add(E132XS_L56, "L56 :%08X", m_local_regs[56]).mask(0xffffffff);
+ state_add(E132XS_L57, "L57 :%08X", m_local_regs[57]).mask(0xffffffff);
+ state_add(E132XS_L58, "L58 :%08X", m_local_regs[58]).mask(0xffffffff);
+ state_add(E132XS_L59, "L59 :%08X", m_local_regs[59]).mask(0xffffffff);
+ state_add(E132XS_L60, "L60 :%08X", m_local_regs[60]).mask(0xffffffff);
+ state_add(E132XS_L61, "L61 :%08X", m_local_regs[61]).mask(0xffffffff);
+ state_add(E132XS_L62, "L62 :%08X", m_local_regs[62]).mask(0xffffffff);
+ state_add(E132XS_L63, "L63 :%08X", m_local_regs[63]).mask(0xffffffff);
save_item(NAME(m_global_regs));
save_item(NAME(m_local_regs));
@@ -3138,11 +3138,11 @@ void hyperstone_device::hyperstone_ldxx1(struct hyperstone_device::regs_decode *
load |= (load & 0x8000) ? 0xffff0000 : 0;
}
/*
- else // LDHU.A
- {
- // nothing more
- }
- */
+ else // LDHU.A
+ {
+ // nothing more
+ }
+ */
SET_SREG(load);
@@ -3212,11 +3212,11 @@ void hyperstone_device::hyperstone_ldxx1(struct hyperstone_device::regs_decode *
load |= (load & 0x8000) ? 0xffff0000 : 0;
}
/*
- else // LDHU.D
- {
- // nothing more
- }
- */
+ else // LDHU.D
+ {
+ // nothing more
+ }
+ */
SET_SREG(load);
@@ -3313,11 +3313,11 @@ void hyperstone_device::hyperstone_ldxx2(struct hyperstone_device::regs_decode *
DEBUG_PRINTF(("LDHS.N denoted same regs @ %08X",PPC));
}
/*
- else // LDHU.N
- {
- // nothing more
- }
- */
+ else // LDHU.N
+ {
+ // nothing more
+ }
+ */
SET_SREG(load);
@@ -3410,15 +3410,15 @@ void hyperstone_device::hyperstone_stxx1(struct hyperstone_device::regs_decode *
WRITE_HW(EXTRA_S & ~1, SREG & 0xffff);
/*
- if( EXTRA_S & 1 ) // STHS.A
- {
- // TODO: missing trap on range error
- }
- else // STHU.A
- {
- // nothing more
- }
- */
+ if( EXTRA_S & 1 ) // STHS.A
+ {
+ // TODO: missing trap on range error
+ }
+ else // STHU.A
+ {
+ // nothing more
+ }
+ */
break;
@@ -3472,15 +3472,15 @@ void hyperstone_device::hyperstone_stxx1(struct hyperstone_device::regs_decode *
WRITE_HW(DREG + (EXTRA_S & ~1), SREG & 0xffff);
/*
- if( EXTRA_S & 1 ) // STHS.D
- {
- // TODO: missing trap on range error
- }
- else // STHU.D
- {
- // nothing more
- }
- */
+ if( EXTRA_S & 1 ) // STHS.D
+ {
+ // TODO: missing trap on range error
+ }
+ else // STHU.D
+ {
+ // nothing more
+ }
+ */
break;
@@ -3550,15 +3550,15 @@ void hyperstone_device::hyperstone_stxx2(struct hyperstone_device::regs_decode *
SET_DREG(DREG + (EXTRA_S & ~1));
/*
- if( EXTRA_S & 1 ) // STHS.N
- {
- // TODO: missing trap on range error
- }
- else // STHU.N
- {
- // nothing more
- }
- */
+ if( EXTRA_S & 1 ) // STHS.N
+ {
+ // TODO: missing trap on range error
+ }
+ else // STHU.N
+ {
+ // nothing more
+ }
+ */
break;
@@ -4438,7 +4438,7 @@ void hyperstone_device::hyperstone_lddp(struct hyperstone_device::regs_decode *d
// post increment the destination register if it's different from the source one
// and from the "next source" one
- if(!(decode->src == decode->dst && S_BIT == LOCAL) && !SAME_SRCF_DST )
+ if(!(decode->src == decode->dst && S_BIT == LOCAL) && !SAME_SRCF_DST )
{
SET_DREG(DREG + 8);
}
@@ -4925,7 +4925,7 @@ void hyperstone_device::execute_run()
{
UINT32 oldh = SR & 0x00000020;
- PPC = PC; /* copy PC to previous PC */
+ PPC = PC; /* copy PC to previous PC */
debugger_instruction_hook(this, PC);
OP = READ_OP(PC);
diff --git a/src/emu/cpu/e132xs/e132xs.h b/src/emu/cpu/e132xs/e132xs.h
index ccc4303cc7e..b027205979c 100644
--- a/src/emu/cpu/e132xs/e132xs.h
+++ b/src/emu/cpu/e132xs/e132xs.h
@@ -26,91 +26,91 @@
COMPILE-TIME DEFINITIONS
***************************************************************************/
-#define PC_REGISTER 0
-#define SR_REGISTER 1
-#define BCR_REGISTER 20
-#define TPR_REGISTER 21
-#define TCR_REGISTER 22
-#define TR_REGISTER 23
-#define ISR_REGISTER 25
-#define FCR_REGISTER 26
-#define MCR_REGISTER 27
-
-#define X_CODE(val) ((val & 0x7000) >> 12)
-#define E_BIT(val) ((val & 0x8000) >> 15)
+#define PC_REGISTER 0
+#define SR_REGISTER 1
+#define BCR_REGISTER 20
+#define TPR_REGISTER 21
+#define TCR_REGISTER 22
+#define TR_REGISTER 23
+#define ISR_REGISTER 25
+#define FCR_REGISTER 26
+#define MCR_REGISTER 27
+
+#define X_CODE(val) ((val & 0x7000) >> 12)
+#define E_BIT(val) ((val & 0x8000) >> 15)
#define S_BIT_CONST(val) ((val & 0x4000) >> 14)
-#define DD(val) ((val & 0x3000) >> 12)
+#define DD(val) ((val & 0x3000) >> 12)
/* Extended DSP instructions */
-#define EMUL 0x102
-#define EMULU 0x104
-#define EMULS 0x106
-#define EMAC 0x10a
-#define EMACD 0x10e
-#define EMSUB 0x11a
-#define EMSUBD 0x11e
-#define EHMAC 0x02a
-#define EHMACD 0x02e
-#define EHCMULD 0x046
-#define EHCMACD 0x04e
-#define EHCSUMD 0x086
-#define EHCFFTD 0x096
-#define EHCFFTSD 0x296
+#define EMUL 0x102
+#define EMULU 0x104
+#define EMULS 0x106
+#define EMAC 0x10a
+#define EMACD 0x10e
+#define EMSUB 0x11a
+#define EMSUBD 0x11e
+#define EHMAC 0x02a
+#define EHMACD 0x02e
+#define EHCMULD 0x046
+#define EHCMACD 0x04e
+#define EHCSUMD 0x086
+#define EHCFFTD 0x096
+#define EHCFFTSD 0x296
/* Delay values */
-#define NO_DELAY 0
-#define DELAY_EXECUTE 1
+#define NO_DELAY 0
+#define DELAY_EXECUTE 1
/* IRQ numbers */
-#define IRQ_INT1 0
-#define IRQ_INT2 1
-#define IRQ_INT3 2
-#define IRQ_INT4 3
-#define IRQ_IO1 4
-#define IRQ_IO2 5
-#define IRQ_IO3 6
+#define IRQ_INT1 0
+#define IRQ_INT2 1
+#define IRQ_INT3 2
+#define IRQ_INT4 3
+#define IRQ_IO1 4
+#define IRQ_IO2 5
+#define IRQ_IO3 6
/* Trap numbers */
-#define TRAPNO_IO2 48
-#define TRAPNO_IO1 49
-#define TRAPNO_INT4 50
-#define TRAPNO_INT3 51
-#define TRAPNO_INT2 52
-#define TRAPNO_INT1 53
-#define TRAPNO_IO3 54
-#define TRAPNO_TIMER 55
-#define TRAPNO_RESERVED1 56
-#define TRAPNO_TRACE_EXCEPTION 57
-#define TRAPNO_PARITY_ERROR 58
-#define TRAPNO_EXTENDED_OVERFLOW 59
-#define TRAPNO_RANGE_ERROR 60
-#define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR
-#define TRAPNO_FRAME_ERROR TRAPNO_RANGE_ERROR
-#define TRAPNO_RESERVED2 61
-#define TRAPNO_RESET 62 // reserved if not mapped @ MEM3
-#define TRAPNO_ERROR_ENTRY 63 // for instruction code of all ones
+#define TRAPNO_IO2 48
+#define TRAPNO_IO1 49
+#define TRAPNO_INT4 50
+#define TRAPNO_INT3 51
+#define TRAPNO_INT2 52
+#define TRAPNO_INT1 53
+#define TRAPNO_IO3 54
+#define TRAPNO_TIMER 55
+#define TRAPNO_RESERVED1 56
+#define TRAPNO_TRACE_EXCEPTION 57
+#define TRAPNO_PARITY_ERROR 58
+#define TRAPNO_EXTENDED_OVERFLOW 59
+#define TRAPNO_RANGE_ERROR 60
+#define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR
+#define TRAPNO_FRAME_ERROR TRAPNO_RANGE_ERROR
+#define TRAPNO_RESERVED2 61
+#define TRAPNO_RESET 62 // reserved if not mapped @ MEM3
+#define TRAPNO_ERROR_ENTRY 63 // for instruction code of all ones
/* Trap codes */
-#define TRAPLE 4
-#define TRAPGT 5
-#define TRAPLT 6
-#define TRAPGE 7
-#define TRAPSE 8
-#define TRAPHT 9
-#define TRAPST 10
-#define TRAPHE 11
-#define TRAPE 12
-#define TRAPNE 13
-#define TRAPV 14
-#define TRAP 15
+#define TRAPLE 4
+#define TRAPGT 5
+#define TRAPLT 6
+#define TRAPGE 7
+#define TRAPSE 8
+#define TRAPHT 9
+#define TRAPST 10
+#define TRAPHE 11
+#define TRAPE 12
+#define TRAPNE 13
+#define TRAPV 14
+#define TRAP 15
/* Entry point to get trap locations or emulated code associated */
-#define E132XS_ENTRY_MEM0 0
-#define E132XS_ENTRY_MEM1 1
-#define E132XS_ENTRY_MEM2 2
-#define E132XS_ENTRY_IRAM 3
-#define E132XS_ENTRY_MEM3 7
+#define E132XS_ENTRY_MEM0 0
+#define E132XS_ENTRY_MEM1 1
+#define E132XS_ENTRY_MEM2 2
+#define E132XS_ENTRY_IRAM 3
+#define E132XS_ENTRY_MEM3 7
/***************************************************************************
REGISTER ENUMERATION
@@ -176,28 +176,28 @@ extern unsigned dasm_hyperstone(char *buffer, unsigned pc, const UINT8 *oprom, u
/* Memory access */
/* read byte */
-#define READ_B(addr) m_program->read_byte((addr))
+#define READ_B(addr) m_program->read_byte((addr))
/* read half-word */
-#define READ_HW(addr) m_program->read_word((addr) & ~1)
+#define READ_HW(addr) m_program->read_word((addr) & ~1)
/* read word */
-#define READ_W(addr) m_program->read_dword((addr) & ~3)
+#define READ_W(addr) m_program->read_dword((addr) & ~3)
/* write byte */
-#define WRITE_B(addr, data) m_program->write_byte(addr, data)
+#define WRITE_B(addr, data) m_program->write_byte(addr, data)
/* write half-word */
-#define WRITE_HW(addr, data) m_program->write_word((addr) & ~1, data)
+#define WRITE_HW(addr, data) m_program->write_word((addr) & ~1, data)
/* write word */
-#define WRITE_W(addr, data) m_program->write_dword((addr) & ~3, data)
+#define WRITE_W(addr, data) m_program->write_dword((addr) & ~3, data)
/* I/O access */
/* read word */
-#define IO_READ_W(addr) m_io->read_dword(((addr) >> 11) & 0x7ffc)
+#define IO_READ_W(addr) m_io->read_dword(((addr) >> 11) & 0x7ffc)
/* write word */
-#define IO_WRITE_W(addr, data) m_io->write_dword(((addr) >> 11) & 0x7ffc, data)
+#define IO_WRITE_W(addr, data) m_io->write_dword(((addr) >> 11) & 0x7ffc, data)
-#define READ_OP(addr) m_direct->read_decrypted_word((addr), m_opcodexor)
+#define READ_OP(addr) m_direct->read_decrypted_word((addr), m_opcodexor)
//**************************************************************************
// TYPE DEFINITIONS
@@ -211,7 +211,7 @@ class hyperstone_device : public cpu_device
public:
// construction/destruction
hyperstone_device(const machine_config &mconfig, const char *name, const char *tag, device_t *owner, UINT32 clock,
- const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map);
+ const device_type type, UINT32 prg_data_width, UINT32 io_data_width, address_map_constructor internal_map);
// public interfaces
@@ -253,30 +253,30 @@ protected:
/* Delay information */
struct delay_info
{
- INT32 delay_cmd;
- UINT32 delay_pc;
+ INT32 delay_cmd;
+ UINT32 delay_pc;
};
// CPU registers
- UINT32 m_global_regs[32];
- UINT32 m_local_regs[64];
+ UINT32 m_global_regs[32];
+ UINT32 m_local_regs[64];
/* internal stuff */
- UINT32 m_ppc; // previous pc
- UINT16 m_op; // opcode
- UINT32 m_trap_entry; // entry point to get trap address
-
- UINT8 m_clock_scale_mask;
- UINT8 m_clock_scale;
- UINT8 m_clock_cycles_1;
- UINT8 m_clock_cycles_2;
- UINT8 m_clock_cycles_4;
- UINT8 m_clock_cycles_6;
-
- UINT64 m_tr_base_cycles;
- UINT32 m_tr_base_value;
- UINT32 m_tr_clocks_per_tick;
- UINT8 m_timer_int_pending;
+ UINT32 m_ppc; // previous pc
+ UINT16 m_op; // opcode
+ UINT32 m_trap_entry; // entry point to get trap address
+
+ UINT8 m_clock_scale_mask;
+ UINT8 m_clock_scale;
+ UINT8 m_clock_cycles_1;
+ UINT8 m_clock_cycles_2;
+ UINT8 m_clock_cycles_4;
+ UINT8 m_clock_cycles_6;
+
+ UINT64 m_tr_base_cycles;
+ UINT32 m_tr_base_value;
+ UINT32 m_tr_clocks_per_tick;
+ UINT8 m_timer_int_pending;
emu_timer *m_timer;
delay_info m_delay;
@@ -287,7 +287,7 @@ protected:
INT32 m_intblock;
// other internal state
- int m_icount;
+ int m_icount;
typedef void (hyperstone_device::*ophandler)();
@@ -298,19 +298,19 @@ protected:
private:
struct regs_decode
{
- UINT8 src, dst; // destination and source register code
- UINT32 src_value; // current source register value
- UINT32 next_src_value; // current next source register value
- UINT32 dst_value; // current destination register value
- UINT32 next_dst_value; // current next destination register value
- UINT8 sub_type; // sub type opcode (for DD and X_CODE bits)
+ UINT8 src, dst; // destination and source register code
+ UINT32 src_value; // current source register value
+ UINT32 next_src_value; // current next source register value
+ UINT32 dst_value; // current destination register value
+ UINT32 next_dst_value; // current next destination register value
+ UINT8 sub_type; // sub type opcode (for DD and X_CODE bits)
union
{
UINT32 u;
INT32 s;
- } extra; // extra value such as immediate value, const, pcrel, ...
- UINT8 src_is_local;
- UINT8 dst_is_local;
+ } extra; // extra value such as immediate value, const, pcrel, ...
+ UINT8 src_is_local;
+ UINT8 dst_is_local;
UINT8 same_src_dst;
UINT8 same_src_dstf;
UINT8 same_srcf_dst;
@@ -460,38 +460,38 @@ private:
void reserved(struct regs_decode *decode);
- void op00(); void op01(); void op02(); void op03(); void op04(); void op05(); void op06(); void op07();
- void op08(); void op09(); void op0a(); void op0b(); void op0c(); void op0d(); void op0e(); void op0f();
- void op10(); void op11(); void op12(); void op13(); void op14(); void op15(); void op16(); void op17();
- void op18(); void op19(); void op1a(); void op1b(); void op1c(); void op1d(); void op1e(); void op1f();
- void op20(); void op21(); void op22(); void op23(); void op24(); void op25(); void op26(); void op27();
- void op28(); void op29(); void op2a(); void op2b(); void op2c(); void op2d(); void op2e(); void op2f();
- void op30(); void op31(); void op32(); void op33(); void op34(); void op35(); void op36(); void op37();
- void op38(); void op39(); void op3a(); void op3b(); void op3c(); void op3d(); void op3e(); void op3f();
- void op40(); void op41(); void op42(); void op43(); void op44(); void op45(); void op46(); void op47();
- void op48(); void op49(); void op4a(); void op4b(); void op4c(); void op4d(); void op4e(); void op4f();
- void op50(); void op51(); void op52(); void op53(); void op54(); void op55(); void op56(); void op57();
- void op58(); void op59(); void op5a(); void op5b(); void op5c(); void op5d(); void op5e(); void op5f();
- void op60(); void op61(); void op62(); void op63(); void op64(); void op65(); void op66(); void op67();
- void op68(); void op69(); void op6a(); void op6b(); void op6c(); void op6d(); void op6e(); void op6f();
- void op70(); void op71(); void op72(); void op73(); void op74(); void op75(); void op76(); void op77();
- void op78(); void op79(); void op7a(); void op7b(); void op7c(); void op7d(); void op7e(); void op7f();
- void op80(); void op81(); void op82(); void op83(); void op84(); void op85(); void op86(); void op87();
- void op88(); void op89(); void op8a(); void op8b(); void op8c(); void op8d(); void op8e(); void op8f();
- void op90(); void op91(); void op92(); void op93(); void op94(); void op95(); void op96(); void op97();
- void op98(); void op99(); void op9a(); void op9b(); void op9c(); void op9d(); void op9e(); void op9f();
- void opa0(); void opa1(); void opa2(); void opa3(); void opa4(); void opa5(); void opa6(); void opa7();
- void opa8(); void opa9(); void opaa(); void opab(); void opac(); void opad(); void opae(); void opaf();
- void opb0(); void opb1(); void opb2(); void opb3(); void opb4(); void opb5(); void opb6(); void opb7();
- void opb8(); void opb9(); void opba(); void opbb(); void opbc(); void opbd(); void opbe(); void opbf();
- void opc0(); void opc1(); void opc2(); void opc3(); void opc4(); void opc5(); void opc6(); void opc7();
- void opc8(); void opc9(); void opca(); void opcb(); void opcc(); void opcd(); void opce(); void opcf();
- void opd0(); void opd1(); void opd2(); void opd3(); void opd4(); void opd5(); void opd6(); void opd7();
- void opd8(); void opd9(); void opda(); void opdb(); void opdc(); void opdd(); void opde(); void opdf();
- void ope0(); void ope1(); void ope2(); void ope3(); void ope4(); void ope5(); void ope6(); void ope7();
- void ope8(); void ope9(); void opea(); void opeb(); void opec(); void oped(); void opee(); void opef();
- void opf0(); void opf1(); void opf2(); void opf3(); void opf4(); void opf5(); void opf6(); void opf7();
- void opf8(); void opf9(); void opfa(); void opfb(); void opfc(); void opfd(); void opfe(); void opff();
+ void op00(); void op01(); void op02(); void op03(); void op04(); void op05(); void op06(); void op07();
+ void op08(); void op09(); void op0a(); void op0b(); void op0c(); void op0d(); void op0e(); void op0f();
+ void op10(); void op11(); void op12(); void op13(); void op14(); void op15(); void op16(); void op17();
+ void op18(); void op19(); void op1a(); void op1b(); void op1c(); void op1d(); void op1e(); void op1f();
+ void op20(); void op21(); void op22(); void op23(); void op24(); void op25(); void op26(); void op27();
+ void op28(); void op29(); void op2a(); void op2b(); void op2c(); void op2d(); void op2e(); void op2f();
+ void op30(); void op31(); void op32(); void op33(); void op34(); void op35(); void op36(); void op37();
+ void op38(); void op39(); void op3a(); void op3b(); void op3c(); void op3d(); void op3e(); void op3f();
+ void op40(); void op41(); void op42(); void op43(); void op44(); void op45(); void op46(); void op47();
+ void op48(); void op49(); void op4a(); void op4b(); void op4c(); void op4d(); void op4e(); void op4f();
+ void op50(); void op51(); void op52(); void op53(); void op54(); void op55(); void op56(); void op57();
+ void op58(); void op59(); void op5a(); void op5b(); void op5c(); void op5d(); void op5e(); void op5f();
+ void op60(); void op61(); void op62(); void op63(); void op64(); void op65(); void op66(); void op67();
+ void op68(); void op69(); void op6a(); void op6b(); void op6c(); void op6d(); void op6e(); void op6f();
+ void op70(); void op71(); void op72(); void op73(); void op74(); void op75(); void op76(); void op77();
+ void op78(); void op79(); void op7a(); void op7b(); void op7c(); void op7d(); void op7e(); void op7f();
+ void op80(); void op81(); void op82(); void op83(); void op84(); void op85(); void op86(); void op87();
+ void op88(); void op89(); void op8a(); void op8b(); void op8c(); void op8d(); void op8e(); void op8f();
+ void op90(); void op91(); void op92(); void op93(); void op94(); void op95(); void op96(); void op97();
+ void op98(); void op99(); void op9a(); void op9b(); void op9c(); void op9d(); void op9e(); void op9f();
+ void opa0(); void opa1(); void opa2(); void opa3(); void opa4(); void opa5(); void opa6(); void opa7();
+ void opa8(); void opa9(); void opaa(); void opab(); void opac(); void opad(); void opae(); void opaf();
+ void opb0(); void opb1(); void opb2(); void opb3(); void opb4(); void opb5(); void opb6(); void opb7();
+ void opb8(); void opb9(); void opba(); void opbb(); void opbc(); void opbd(); void opbe(); void opbf();
+ void opc0(); void opc1(); void opc2(); void opc3(); void opc4(); void opc5(); void opc6(); void opc7();
+ void opc8(); void opc9(); void opca(); void opcb(); void opcc(); void opcd(); void opce(); void opcf();
+ void opd0(); void opd1(); void opd2(); void opd3(); void opd4(); void opd5(); void opd6(); void opd7();
+ void opd8(); void opd9(); void opda(); void opdb(); void opdc(); void opdd(); void opde(); void opdf();
+ void ope0(); void ope1(); void ope2(); void ope3(); void ope4(); void ope5(); void ope6(); void ope7();
+ void ope8(); void ope9(); void opea(); void opeb(); void opec(); void oped(); void opee(); void opef();
+ void opf0(); void opf1(); void opf2(); void opf3(); void opf4(); void opf5(); void opf6(); void opf7();
+ void opf8(); void opf9(); void opfa(); void opfb(); void opfc(); void opfd(); void opfe(); void opff();
void set_irq_line(int irqline, int state);
};
diff --git a/src/emu/cpu/esrip/esrip.c b/src/emu/cpu/esrip/esrip.c
index 379f8d46ccf..4e351c26c06 100644
--- a/src/emu/cpu/esrip/esrip.c
+++ b/src/emu/cpu/esrip/esrip.c
@@ -16,43 +16,43 @@
CONSTANTS
***************************************************************************/
-#define IPT_RAM_SIZE (8192 * sizeof(UINT16))
+#define IPT_RAM_SIZE (8192 * sizeof(UINT16))
/***************************************************************************
MACROS
***************************************************************************/
-#define RIP_PC (m_pc | ((m_status_out & 1) << 8))
-#define _BIT(x, n) ((x) & (1 << (n)))
-#define RISING_EDGE(old_val, new_val, bit) (!(old_val & (1 << bit)) && (new_val & (1 << bit)))
+#define RIP_PC (m_pc | ((m_status_out & 1) << 8))
+#define _BIT(x, n) ((x) & (1 << (n)))
+#define RISING_EDGE(old_val, new_val, bit) (!(old_val & (1 << bit)) && (new_val & (1 << bit)))
-#define UNHANDLED do {printf("%s:UNHANDLED (%x)\n", __FUNCTION__, inst); assert(0);} while (0)
-#define INVALID do {printf("%s:INVALID (%x)\n", __FUNCTION__, inst); assert(0);} while (0)
+#define UNHANDLED do {printf("%s:UNHANDLED (%x)\n", __FUNCTION__, inst); assert(0);} while (0)
+#define INVALID do {printf("%s:INVALID (%x)\n", __FUNCTION__, inst); assert(0);} while (0)
-#define RAM_ADDR (inst & 0x1f)
-#define MODE (inst & 0x8000)
-#define WORD_MODE (inst & 0x8000)
-#define BYTE_MODE (!WORD_MODE)
-#define N ((inst >> 9) & 0xf)
-#define OPCODE ((inst >> 5) & 0xf)
-#define SRC ((inst >> 9) & 0xf)
-#define DST (inst & 0x1f) // TEST
+#define RAM_ADDR (inst & 0x1f)
+#define MODE (inst & 0x8000)
+#define WORD_MODE (inst & 0x8000)
+#define BYTE_MODE (!WORD_MODE)
+#define N ((inst >> 9) & 0xf)
+#define OPCODE ((inst >> 5) & 0xf)
+#define SRC ((inst >> 9) & 0xf)
+#define DST (inst & 0x1f) // TEST
-#define BW_WORD (1 << 15)
-#define BW_BYTE (0 << 15)
+#define BW_WORD (1 << 15)
+#define BW_BYTE (0 << 15)
-#define FLAG_3 (1 << 7)
-#define FLAG_2 (1 << 6)
-#define FLAG_1 (1 << 5)
-#define L_FLAG (1 << 4)
-#define V_FLAG (1 << 3)
-#define N_FLAG (1 << 2)
-#define C_FLAG (1 << 1)
-#define Z_FLAG (1 << 0)
+#define FLAG_3 (1 << 7)
+#define FLAG_2 (1 << 6)
+#define FLAG_1 (1 << 5)
+#define L_FLAG (1 << 4)
+#define V_FLAG (1 << 3)
+#define N_FLAG (1 << 2)
+#define C_FLAG (1 << 1)
+#define Z_FLAG (1 << 0)
-#define CLEAR_FLAGS(a) (m_new_status &= ~(a))
-#define SET_FLAGS(a) (m_new_status |= (a))
+#define CLEAR_FLAGS(a) (m_new_status &= ~(a))
+#define SET_FLAGS(a) (m_new_status |= (a))
/***************************************************************************
@@ -196,10 +196,10 @@ void esrip_device::device_start()
astring tempstr;
state_add(STATE_GENPC, "GENPC", m_rip_pc).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_status).callimport().callexport().formatstr("%8s").noshow();
- state_add(ESRIP_PC, "PC:", m_rip_pc).mask(0xffff);
- state_add(ESRIP_ACC, "ACC:", m_acc).mask(0xffff);
- state_add(ESRIP_DLATCH, "DLATCH:", m_d_latch).mask(0xff);
- state_add(ESRIP_ILATCH, "ILATCH:", m_i_latch).mask(0xffff);
+ state_add(ESRIP_PC, "PC:", m_rip_pc).mask(0xffff);
+ state_add(ESRIP_ACC, "ACC:", m_acc).mask(0xffff);
+ state_add(ESRIP_DLATCH, "DLATCH:", m_d_latch).mask(0xff);
+ state_add(ESRIP_ILATCH, "ILATCH:", m_i_latch).mask(0xffff);
state_add(ESRIP_RAM00, "RAM[00]:", m_ram[0x00]).mask(0xffff);
state_add(ESRIP_RAM01, "RAM[01]:", m_ram[0x01]).mask(0xffff);
state_add(ESRIP_RAM02, "RAM[02]:", m_ram[0x02]).mask(0xffff);
@@ -594,9 +594,9 @@ UINT16 esrip_device::sor_op(UINT16 r, UINT16 opcode)
void esrip_device::sor(UINT16 inst)
{
- UINT16 r = 0;
- UINT16 dst = 0;
- UINT16 res = 0;
+ UINT16 r = 0;
+ UINT16 dst = 0;
+ UINT16 res = 0;
if (BYTE_MODE)
{
@@ -606,14 +606,14 @@ void esrip_device::sor(UINT16 inst)
switch ((inst >> 5) & 0xf)
{
- case SORA: r = m_ram[RAM_ADDR]; dst = ACC; break;
- case SORY: r = m_ram[RAM_ADDR]; dst = Y_BUS; break;
- case SORS: r = m_ram[RAM_ADDR]; dst = STATUS; break;
- case SOAR: r = m_acc; dst = RAM; break;
- case SODR: r = m_d_latch; dst = RAM; break;
+ case SORA: r = m_ram[RAM_ADDR]; dst = ACC; break;
+ case SORY: r = m_ram[RAM_ADDR]; dst = Y_BUS; break;
+ case SORS: r = m_ram[RAM_ADDR]; dst = STATUS; break;
+ case SOAR: r = m_acc; dst = RAM; break;
+ case SODR: r = m_d_latch; dst = RAM; break;
case SOIR:
{
- if (m_immflag == 0) // Macrofiy this?
+ if (m_immflag == 0) // Macrofiy this?
{
m_i_latch = inst;
m_immflag = 1;
@@ -627,8 +627,8 @@ void esrip_device::sor(UINT16 inst)
}
break;
}
- case SOZR: r = 0; dst = RAM; break;
- case SORR: r = m_ram[RAM_ADDR]; dst = RAM; break;
+ case SOZR: r = 0; dst = RAM; break;
+ case SORR: r = m_ram[RAM_ADDR]; dst = RAM; break;
default: UNHANDLED;
}
@@ -666,13 +666,13 @@ enum
void esrip_device::sonr(UINT16 inst)
{
- UINT16 r = 0;
- UINT16 res = 0;
+ UINT16 r = 0;
+ UINT16 res = 0;
switch ((inst >> 5) & 0xf)
{
- case SOA: r = m_acc; break;
- case SOD: r = m_d_latch; break;
+ case SOA: r = m_acc; break;
+ case SOD: r = m_d_latch; break;
case SOI:
{
if (m_immflag == 0)
@@ -688,7 +688,7 @@ void esrip_device::sonr(UINT16 inst)
}
break;
}
- case SOZ: r = 0; break;
+ case SOZ: r = 0; break;
default: INVALID;
}
@@ -831,7 +831,7 @@ void esrip_device::tor1(UINT16 inst)
UINT16 r = 0;
UINT16 s = 0;
UINT16 dst = 0;
- UINT16 res = 0;
+ UINT16 res = 0;
enum
{
@@ -848,7 +848,7 @@ void esrip_device::tor1(UINT16 inst)
switch (SRC)
{
- case TORAA: r = m_ram[RAM_ADDR]; s = m_acc; dst = ACC; break;
+ case TORAA: r = m_ram[RAM_ADDR]; s = m_acc; dst = ACC; break;
case TORIA:
{
if (m_immflag == 0)
@@ -866,8 +866,8 @@ void esrip_device::tor1(UINT16 inst)
}
break;
}
- case TODRA: r = m_d_latch; s = m_ram[RAM_ADDR]; dst = ACC; break;
- case TORAY: r = m_ram[RAM_ADDR]; s = m_acc; dst = Y_BUS;break;
+ case TODRA: r = m_d_latch; s = m_ram[RAM_ADDR]; dst = ACC; break;
+ case TORAY: r = m_ram[RAM_ADDR]; s = m_acc; dst = Y_BUS;break;
case TORIY:
{
if (m_immflag == 0)
@@ -885,8 +885,8 @@ void esrip_device::tor1(UINT16 inst)
}
break;
}
- case TODRY: r = m_d_latch; s = m_ram[RAM_ADDR]; dst = Y_BUS;break;
- case TORAR: r = m_ram[RAM_ADDR]; s = m_acc; dst = RAM; break;
+ case TODRY: r = m_d_latch; s = m_ram[RAM_ADDR]; dst = Y_BUS;break;
+ case TORAR: r = m_ram[RAM_ADDR]; s = m_acc; dst = RAM; break;
case TORIR:
{
if (m_immflag == 0)
@@ -904,7 +904,7 @@ void esrip_device::tor1(UINT16 inst)
}
break;
}
- case TODRR: r = m_d_latch; s = m_ram[RAM_ADDR]; dst = RAM; break;
+ case TODRR: r = m_d_latch; s = m_ram[RAM_ADDR]; dst = RAM; break;
default: INVALID;
}
@@ -914,10 +914,10 @@ void esrip_device::tor1(UINT16 inst)
/* Destination */
switch (dst)
{
- case ACC: m_acc = res; break;
- case Y_BUS: break;
- case RAM: m_ram[RAM_ADDR] = res; break;
- default: INVALID;
+ case ACC: m_acc = res; break;
+ case Y_BUS: break;
+ case RAM: m_ram[RAM_ADDR] = res; break;
+ default: INVALID;
}
m_result = res;
@@ -938,7 +938,7 @@ void esrip_device::tor2(UINT16 inst)
switch (SRC)
{
- case TODAR: r = m_d_latch; s = m_acc; break;
+ case TODAR: r = m_d_latch; s = m_acc; break;
case TOAIR:
{
if (m_immflag == 0)
@@ -994,7 +994,7 @@ void esrip_device::tonr(UINT16 inst)
UINT16 r = 0;
UINT16 s = 0;
- UINT16 res = 0;
+ UINT16 res = 0;
switch (SRC)
{
@@ -1076,7 +1076,7 @@ void esrip_device::bonr(UINT16 inst)
LDC2NY = 0x17,
};
- UINT16 res = 0;
+ UINT16 res = 0;
switch (inst & 0x1f)
{
@@ -1193,7 +1193,7 @@ void esrip_device::bor1(UINT16 inst)
TSTNR = 0xf,
};
- UINT16 res = 0;
+ UINT16 res = 0;
switch ((inst >> 5) & 0xf)
{
@@ -1304,16 +1304,16 @@ void esrip_device::rotr1(UINT16 inst)
RTRR = 0xf,
};
- UINT16 u = 0;
- UINT16 dst = 0;
- UINT16 res = 0;
- int n = N;
+ UINT16 u = 0;
+ UINT16 dst = 0;
+ UINT16 res = 0;
+ int n = N;
switch ((inst >> 5) & 0xf)
{
- case RTRA: u = m_ram[RAM_ADDR]; dst = ACC; break;
- case RTRY: u = m_ram[RAM_ADDR]; dst = Y_BUS; break;
- case RTRR: u = m_ram[RAM_ADDR]; dst = RAM; break;
+ case RTRA: u = m_ram[RAM_ADDR]; dst = ACC; break;
+ case RTRY: u = m_ram[RAM_ADDR]; dst = Y_BUS; break;
+ case RTRR: u = m_ram[RAM_ADDR]; dst = RAM; break;
default: INVALID;
}
@@ -1339,13 +1339,13 @@ void esrip_device::rotr2(UINT16 inst)
RTDR = 1,
};
- UINT16 u = 0;
- UINT16 res = 0;
+ UINT16 u = 0;
+ UINT16 res = 0;
switch ((inst >> 5) & 0xf)
{
- case RTAR: u = m_acc; break;
- case RTDR: u = m_d_latch; break;
+ case RTAR: u = m_acc; break;
+ case RTDR: u = m_d_latch; break;
default: INVALID;
}
@@ -1368,16 +1368,16 @@ void esrip_device::rotnr(UINT16 inst)
RTAA = 0x1d,
};
- UINT16 u = 0;
- UINT16 res = 0;
- UINT16 dst = 0;
+ UINT16 u = 0;
+ UINT16 res = 0;
+ UINT16 dst = 0;
switch (inst & 0x1f)
{
- case RTDY: u = m_d_latch; dst = Y_BUS; break;
- case RTDA: u = m_d_latch; dst = ACC; break;
- case RTAY: u = m_acc; dst = Y_BUS; break;
- case RTAA: u = m_acc; dst = ACC; break;
+ case RTDY: u = m_d_latch; dst = Y_BUS; break;
+ case RTDA: u = m_d_latch; dst = ACC; break;
+ case RTAY: u = m_acc; dst = Y_BUS; break;
+ case RTAA: u = m_acc; dst = ACC; break;
default: INVALID;
}
@@ -1470,7 +1470,7 @@ enum
SHDNOV = 8,
};
-#define SET_LINK_flag(x) (m_new_status &= ~L_FLAG); \
+#define SET_LINK_flag(x) (m_new_status &= ~L_FLAG); \
(m_new_status |= x ? L_FLAG : 0)
UINT16 esrip_device::shift_op(UINT16 u, int opcode)
@@ -1526,13 +1526,13 @@ void esrip_device::shftr(UINT16 inst)
SHDR = 7,
};
- UINT16 u = 0;
- UINT16 res = 0;
+ UINT16 u = 0;
+ UINT16 res = 0;
switch ((inst >> 9) & 0xf)
{
- case SHRR: u = m_ram[RAM_ADDR]; break;
- case SHDR: u = m_d_latch; break;
+ case SHRR: u = m_ram[RAM_ADDR]; break;
+ case SHDR: u = m_d_latch; break;
default: INVALID;
}
@@ -1551,13 +1551,13 @@ void esrip_device::shftnr(UINT16 inst)
SHD = 7,
};
- UINT16 u = 0;
- UINT16 res = 0;
+ UINT16 u = 0;
+ UINT16 res = 0;
switch ((inst >> 9) & 0xf)
{
- case SHA: u = m_acc; break;
- case SHD: u = m_d_latch; break;
+ case SHA: u = m_acc; break;
+ case SHD: u = m_d_latch; break;
default: INVALID;
}
@@ -1565,9 +1565,9 @@ void esrip_device::shftnr(UINT16 inst)
switch (DST)
{
- case NRY: break;
- case NRA: m_acc = res; break;
- default: INVALID;
+ case NRY: break;
+ case NRA: m_acc = res; break;
+ default: INVALID;
}
m_result = res;
}
@@ -1598,10 +1598,10 @@ void esrip_device::rstst(UINT16 inst)
switch (inst & 0x1f)
{
case RONCZ: CLEAR_FLAGS(V_FLAG | N_FLAG | C_FLAG | Z_FLAG); break;
- case RL: CLEAR_FLAGS(L_FLAG); break;
- case RF1: CLEAR_FLAGS(FLAG_1); break;
- case RF2: CLEAR_FLAGS(FLAG_2); break;
- case RF3: CLEAR_FLAGS(FLAG_3); break;
+ case RL: CLEAR_FLAGS(L_FLAG); break;
+ case RF1: CLEAR_FLAGS(FLAG_1); break;
+ case RF2: CLEAR_FLAGS(FLAG_2); break;
+ case RF3: CLEAR_FLAGS(FLAG_3); break;
}
m_result = 0;
@@ -1621,10 +1621,10 @@ void esrip_device::setst(UINT16 inst)
switch (inst & 0x1f)
{
case SONCZ: SET_FLAGS(V_FLAG | N_FLAG | C_FLAG | Z_FLAG); break;
- case SL: SET_FLAGS(L_FLAG); break;
- case SF1: SET_FLAGS(FLAG_1); break;
- case SF2: SET_FLAGS(FLAG_2); break;
- case SF3: SET_FLAGS(FLAG_3); break;
+ case SL: SET_FLAGS(L_FLAG); break;
+ case SF1: SET_FLAGS(FLAG_1); break;
+ case SF2: SET_FLAGS(FLAG_2); break;
+ case SF3: SET_FLAGS(FLAG_3); break;
}
m_result = 0xffff;
@@ -1679,7 +1679,7 @@ void esrip_device::test(UINT16 inst)
void esrip_device::nop(UINT16 inst)
{
- m_result = 0xff; // Undefined
+ m_result = 0xff; // Undefined
}
//**************************************************************************
@@ -1694,7 +1694,7 @@ const device_type ESRIP = &device_creator<esrip_device>;
esrip_device::esrip_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, ESRIP, "ESRIP", tag, owner, clock),
- m_program_config("program", ENDIANNESS_BIG, 64, 9, -3)
+ m_program_config("program", ENDIANNESS_BIG, 64, 9, -3)
{
// build the opcode table
for (int op = 0; op < 24; op++)
@@ -1721,12 +1721,12 @@ void esrip_device::static_set_config(device_t &device, const esrip_config &confi
const esrip_device::ophandler esrip_device::s_opcodetable[24] =
{
- &esrip_device::rotr1, &esrip_device::tor1, &esrip_device::rotr2, &esrip_device::rotc,
- &esrip_device::rotm, &esrip_device::bor2, &esrip_device::crcf, &esrip_device::crcr,
- &esrip_device::svstr, &esrip_device::prt, &esrip_device::sor, &esrip_device::tor2,
- &esrip_device::shftr, &esrip_device::test, &esrip_device::nop, &esrip_device::setst,
- &esrip_device::rstst, &esrip_device::rotnr, &esrip_device::bonr, &esrip_device::bor1,
- &esrip_device::sonr, &esrip_device::shftnr, &esrip_device::prtnr, &esrip_device::tonr
+ &esrip_device::rotr1, &esrip_device::tor1, &esrip_device::rotr2, &esrip_device::rotc,
+ &esrip_device::rotm, &esrip_device::bor2, &esrip_device::crcf, &esrip_device::crcr,
+ &esrip_device::svstr, &esrip_device::prt, &esrip_device::sor, &esrip_device::tor2,
+ &esrip_device::shftr, &esrip_device::test, &esrip_device::nop, &esrip_device::setst,
+ &esrip_device::rstst, &esrip_device::rotnr, &esrip_device::bonr, &esrip_device::bor1,
+ &esrip_device::sonr, &esrip_device::shftnr, &esrip_device::prtnr, &esrip_device::tonr
};
@@ -1805,11 +1805,11 @@ void esrip_device::execute_run()
/* Core execution loop */
do
{
- UINT64 inst;
- UINT8 next_pc;
- UINT16 x_bus = 0;
- UINT16 ipt_bus = 0;
- UINT16 y_bus = 0;
+ UINT64 inst;
+ UINT8 next_pc;
+ UINT16 x_bus = 0;
+ UINT16 ipt_bus = 0;
+ UINT16 y_bus = 0;
int yoe = _BIT(m_l5, 1);
int bl46 = BIT(m_l4, 6);
diff --git a/src/emu/cpu/esrip/esrip.h b/src/emu/cpu/esrip/esrip.h
index bcedb360ff5..729a0f96eef 100644
--- a/src/emu/cpu/esrip/esrip.h
+++ b/src/emu/cpu/esrip/esrip.h
@@ -96,8 +96,8 @@ class esrip_device;
struct esrip_config
{
- read16_device_func fdt_r;
- write16_device_func fdt_w;
+ read16_device_func fdt_r;
+ write16_device_func fdt_w;
UINT8 (*status_in)(running_machine &machine);
int (*draw)(running_machine &machine, int l, int r, int fig, int attr, int addr, int col, int x_scale, int bank);
const char* lbrm_prom;
@@ -110,7 +110,7 @@ extern const device_type ESRIP;
// Used by core CPU interface
class esrip_device : public cpu_device,
- public esrip_config
+ public esrip_config
{
public:
// construction/destruction
@@ -152,60 +152,60 @@ protected:
const address_space_config m_program_config;
// CPU registers
- UINT16 m_ram[32];
- UINT16 m_acc;
- UINT16 m_d_latch;
- UINT16 m_i_latch;
- UINT16 m_result;
- UINT8 m_new_status;
- UINT8 m_status;
- UINT16 m_inst;
- UINT8 m_immflag;
- UINT8 m_ct;
- UINT8 m_t;
+ UINT16 m_ram[32];
+ UINT16 m_acc;
+ UINT16 m_d_latch;
+ UINT16 m_i_latch;
+ UINT16 m_result;
+ UINT8 m_new_status;
+ UINT8 m_status;
+ UINT16 m_inst;
+ UINT8 m_immflag;
+ UINT8 m_ct;
+ UINT8 m_t;
/* Instruction latches - current and previous values */
- UINT8 m_l1, m_pl1;
- UINT8 m_l2, m_pl2;
- UINT8 m_l3, m_pl3;
- UINT8 m_l4, m_pl4;
- UINT8 m_l5, m_pl5;
- UINT8 m_l6, m_pl6;
- UINT8 m_l7, m_pl7;
-
- UINT8 m_pc;
- UINT16 m_rip_pc;
- UINT8 m_status_out;
-
- UINT8 m_x_scale;
- UINT8 m_y_scale;
- UINT8 m_img_bank;
- UINT8 m_line_latch;
- UINT16 m_fig_latch;
- UINT16 m_attr_latch;
- UINT16 m_adl_latch;
- UINT16 m_adr_latch;
- UINT16 m_iaddr_latch;
- UINT8 m_c_latch;
-
- UINT16 m_fdt_cnt;
- UINT16 m_ipt_cnt;
-
- UINT8 m_fig;
- UINT16 m_fig_cycles;
-
- UINT8 m_optable[65536];
-
- UINT16 *m_ipt_ram;
- UINT8 *m_lbrm;
+ UINT8 m_l1, m_pl1;
+ UINT8 m_l2, m_pl2;
+ UINT8 m_l3, m_pl3;
+ UINT8 m_l4, m_pl4;
+ UINT8 m_l5, m_pl5;
+ UINT8 m_l6, m_pl6;
+ UINT8 m_l7, m_pl7;
+
+ UINT8 m_pc;
+ UINT16 m_rip_pc;
+ UINT8 m_status_out;
+
+ UINT8 m_x_scale;
+ UINT8 m_y_scale;
+ UINT8 m_img_bank;
+ UINT8 m_line_latch;
+ UINT16 m_fig_latch;
+ UINT16 m_attr_latch;
+ UINT16 m_adl_latch;
+ UINT16 m_adr_latch;
+ UINT16 m_iaddr_latch;
+ UINT8 m_c_latch;
+
+ UINT16 m_fdt_cnt;
+ UINT16 m_ipt_cnt;
+
+ UINT8 m_fig;
+ UINT16 m_fig_cycles;
+
+ UINT8 m_optable[65536];
+
+ UINT16 *m_ipt_ram;
+ UINT8 *m_lbrm;
address_space *m_program;
direct_read_data *m_direct;
- int m_icount;
+ int m_icount;
- read16_device_func m_fdt_r;
- write16_device_func m_fdt_w;
+ read16_device_func m_fdt_r;
+ write16_device_func m_fdt_w;
UINT8 (*m_status_in)(running_machine &machine);
int (*m_draw)(running_machine &machine, int l, int r, int fig, int attr, int addr, int col, int x_scale, int bank);
diff --git a/src/emu/cpu/f8/f8.c b/src/emu/cpu/f8/f8.c
index be67cf7a2ac..605056e99e2 100644
--- a/src/emu/cpu/f8/f8.c
+++ b/src/emu/cpu/f8/f8.c
@@ -30,26 +30,26 @@
#include "debugger.h"
#include "f8.h"
-#define S 0x01
-#define C 0x02
-#define Z 0x04
-#define O 0x08
-#define I 0x10
+#define S 0x01
+#define C 0x02
+#define Z 0x04
+#define O 0x08
+#define I 0x10
#define cS 4
-#define cL 6
+#define cL 6
struct f8_Regs
{
- UINT16 pc0; /* program counter 0 */
- UINT16 pc1; /* program counter 1 */
- UINT16 dc0; /* data counter 0 */
- UINT16 dc1; /* data counter 1 */
- UINT8 a; /* accumulator */
- UINT8 w; /* processor status */
- UINT8 is; /* scratchpad pointer */
- UINT8 dbus; /* data bus value */
- UINT16 io; /* last I/O address */
+ UINT16 pc0; /* program counter 0 */
+ UINT16 pc1; /* program counter 1 */
+ UINT16 dc0; /* data counter 0 */
+ UINT16 dc1; /* data counter 1 */
+ UINT8 a; /* accumulator */
+ UINT8 w; /* processor status */
+ UINT8 is; /* scratchpad pointer */
+ UINT8 dbus; /* data bus value */
+ UINT16 io; /* last I/O address */
UINT16 irq_vector;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
@@ -77,25 +77,25 @@ static UINT8 timer_shifter[256];
/* set sign and zero flags (note: the S flag is complementary) */
#define SET_SZ(n) \
- if (n == 0) \
- cpustate->w |= Z | S; \
- else \
- if (n < 128) \
+ if (n == 0) \
+ cpustate->w |= Z | S; \
+ else \
+ if (n < 128) \
cpustate->w |= S
/* set overflow and carry flags */
#define SET_OC(n,m) \
- if (n + m > 255) \
- cpustate->w |= C; \
- if ((n&127)+(m&127) > 127) \
- { \
- if (!(cpustate->w & C)) \
- cpustate->w |= O; \
- } \
- else \
- { \
- if (cpustate->w & C) \
- cpustate->w |= O; \
+ if (n + m > 255) \
+ cpustate->w |= C; \
+ if ((n&127)+(m&127) > 127) \
+ { \
+ if (!(cpustate->w & C)) \
+ cpustate->w |= O; \
+ } \
+ else \
+ { \
+ if (cpustate->w & C) \
+ cpustate->w |= O; \
}
/******************************************************************************
@@ -108,367 +108,367 @@ static UINT8 timer_shifter[256];
* Currently the emulation does not handle distinct PCs and DCs, but
* only one instance inside the CPU context.
******************************************************************************/
-static void ROMC_00(f8_Regs *cpustate, int insttim) /* SKR - added parameter to tell if */
- /* it is long or short based on inst */
+static void ROMC_00(f8_Regs *cpustate, int insttim) /* SKR - added parameter to tell if */
+ /* it is long or short based on inst */
{
- /*
- * Instruction Fetch. The device whose address space includes the
- * contents of the PC0 register must place on the data bus the op
- * code addressed by PC0; then all devices increment the contents
- * of PC0.
- */
+ /*
+ * Instruction Fetch. The device whose address space includes the
+ * contents of the PC0 register must place on the data bus the op
+ * code addressed by PC0; then all devices increment the contents
+ * of PC0.
+ */
cpustate->dbus = cpustate->direct->read_decrypted_byte(cpustate->pc0);
- cpustate->pc0 += 1;
- cpustate->icount -= insttim; /* SKR - ROMC00 is usually short, not short+long, */
- /* but DS is long */
+ cpustate->pc0 += 1;
+ cpustate->icount -= insttim; /* SKR - ROMC00 is usually short, not short+long, */
+ /* but DS is long */
}
static void ROMC_01(f8_Regs *cpustate)
{
- /*
- * The device whose address space includes the contents of the PC0
- * register must place on the data bus the contents of the memory
- * location addressed by PC0; then all devices add the 8-bit value
- * on the data bus as signed binary number to PC0.
- */
+ /*
+ * The device whose address space includes the contents of the PC0
+ * register must place on the data bus the contents of the memory
+ * location addressed by PC0; then all devices add the 8-bit value
+ * on the data bus as signed binary number to PC0.
+ */
cpustate->dbus = cpustate->direct->read_raw_byte(cpustate->pc0);
cpustate->pc0 += (INT8)cpustate->dbus;
- cpustate->icount -= cL;
+ cpustate->icount -= cL;
}
static void ROMC_02(f8_Regs *cpustate)
{
- /*
- * The device whose DC0 addresses a memory word within the address
- * space of that device must place on the data bus the contents of
- * the memory location addressed by DC0; then all devices increment
- * DC0.
- */
- cpustate->dbus = cpustate->program->read_byte(cpustate->dc0);
- cpustate->dc0 += 1;
- cpustate->icount -= cL;
+ /*
+ * The device whose DC0 addresses a memory word within the address
+ * space of that device must place on the data bus the contents of
+ * the memory location addressed by DC0; then all devices increment
+ * DC0.
+ */
+ cpustate->dbus = cpustate->program->read_byte(cpustate->dc0);
+ cpustate->dc0 += 1;
+ cpustate->icount -= cL;
}
-static void ROMC_03(f8_Regs *cpustate, int insttim) /* SKR - added parameter to tell if */
+static void ROMC_03(f8_Regs *cpustate, int insttim) /* SKR - added parameter to tell if */
{ /* it is long or short based on inst */
- /*
- * Similiar to 0x00, except that it is used for immediate operands
- * fetches (using PC0) instead of instruction fetches.
- */
- cpustate->dbus = cpustate->io = cpustate->direct->read_raw_byte(cpustate->pc0);
- cpustate->pc0 += 1;
- cpustate->icount -= insttim;
+ /*
+ * Similiar to 0x00, except that it is used for immediate operands
+ * fetches (using PC0) instead of instruction fetches.
+ */
+ cpustate->dbus = cpustate->io = cpustate->direct->read_raw_byte(cpustate->pc0);
+ cpustate->pc0 += 1;
+ cpustate->icount -= insttim;
}
static void ROMC_04(f8_Regs *cpustate)
{
- /*
- * Copy the contents of PC1 into PC0
- */
- cpustate->pc0 = cpustate->pc1;
- cpustate->icount -= cS;
+ /*
+ * Copy the contents of PC1 into PC0
+ */
+ cpustate->pc0 = cpustate->pc1;
+ cpustate->icount -= cS;
}
static void ROMC_05(f8_Regs *cpustate)
{
- /*
- * Store the data bus contents into the memory location pointed
- * to by DC0; increment DC0.
- */
- cpustate->program->write_byte(cpustate->dc0, cpustate->dbus);
- cpustate->dc0 += 1;
- cpustate->icount -= cL;
+ /*
+ * Store the data bus contents into the memory location pointed
+ * to by DC0; increment DC0.
+ */
+ cpustate->program->write_byte(cpustate->dc0, cpustate->dbus);
+ cpustate->dc0 += 1;
+ cpustate->icount -= cL;
}
static void ROMC_06(f8_Regs *cpustate)
{
- /*
- * Place the high order byte of DC0 on the data bus.
- */
- cpustate->dbus = cpustate->dc0 >> 8;
- cpustate->icount -= cL;
+ /*
+ * Place the high order byte of DC0 on the data bus.
+ */
+ cpustate->dbus = cpustate->dc0 >> 8;
+ cpustate->icount -= cL;
}
static void ROMC_07(f8_Regs *cpustate)
{
- /*
- * Place the high order byte of PC1 on the data bus.
- */
- cpustate->dbus = cpustate->pc1 >> 8;
- cpustate->icount -= cL;
+ /*
+ * Place the high order byte of PC1 on the data bus.
+ */
+ cpustate->dbus = cpustate->pc1 >> 8;
+ cpustate->icount -= cL;
}
static void ROMC_08(f8_Regs *cpustate)
{
- /*
- * All devices copy the contents of PC0 into PC1. The CPU outputs
- * zero on the data bus in this ROMC state. Load the data bus into
- * both halves of PC0, thus clearing the register.
- */
- cpustate->pc1 = cpustate->pc0;
- cpustate->dbus = 0;
- cpustate->pc0 = 0;
- cpustate->icount -= cL;
+ /*
+ * All devices copy the contents of PC0 into PC1. The CPU outputs
+ * zero on the data bus in this ROMC state. Load the data bus into
+ * both halves of PC0, thus clearing the register.
+ */
+ cpustate->pc1 = cpustate->pc0;
+ cpustate->dbus = 0;
+ cpustate->pc0 = 0;
+ cpustate->icount -= cL;
}
static void ROMC_09(f8_Regs *cpustate)
{
- /*
- * The device whose address space includes the contents of the DC0
- * register must place the low order byte of DC0 onto the data bus.
- */
- cpustate->dbus = cpustate->dc0 & 0xff;
- cpustate->icount -= cL;
+ /*
+ * The device whose address space includes the contents of the DC0
+ * register must place the low order byte of DC0 onto the data bus.
+ */
+ cpustate->dbus = cpustate->dc0 & 0xff;
+ cpustate->icount -= cL;
}
static void ROMC_0A(f8_Regs *cpustate)
{
- /*
- * All devices add the 8-bit value on the data bus, treated as
- * signed binary number, to the data counter.
- */
- cpustate->dc0 += (INT8)cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * All devices add the 8-bit value on the data bus, treated as
+ * signed binary number, to the data counter.
+ */
+ cpustate->dc0 += (INT8)cpustate->dbus;
+ cpustate->icount -= cL;
}
static void ROMC_0B(f8_Regs *cpustate)
{
- /*
- * The device whose address space includes the value in PC1
- * must place the low order byte of PC1 onto the data bus.
- */
- cpustate->dbus = cpustate->pc1 & 0xff;
- cpustate->icount -= cL;
+ /*
+ * The device whose address space includes the value in PC1
+ * must place the low order byte of PC1 onto the data bus.
+ */
+ cpustate->dbus = cpustate->pc1 & 0xff;
+ cpustate->icount -= cL;
}
static void ROMC_0C(f8_Regs *cpustate)
{
- /*
- * The device whose address space includes the contents of the PC0
- * register must place the contents of the memory word addressed
- * by PC0 into the data bus; then all devices move the value that
- * has just been placed on the data bus into the low order byte of PC0.
- */
- cpustate->dbus = cpustate->direct->read_raw_byte(cpustate->pc0);
- cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * The device whose address space includes the contents of the PC0
+ * register must place the contents of the memory word addressed
+ * by PC0 into the data bus; then all devices move the value that
+ * has just been placed on the data bus into the low order byte of PC0.
+ */
+ cpustate->dbus = cpustate->direct->read_raw_byte(cpustate->pc0);
+ cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
+ cpustate->icount -= cL;
}
static void ROMC_0D(f8_Regs *cpustate)
{
- /*
- * All devices store in PC1 the current contents of PC0, incremented
- * by 1; PC0 is unaltered.
- */
- cpustate->pc1 = cpustate->pc0 + 1;
- cpustate->icount -= cS;
+ /*
+ * All devices store in PC1 the current contents of PC0, incremented
+ * by 1; PC0 is unaltered.
+ */
+ cpustate->pc1 = cpustate->pc0 + 1;
+ cpustate->icount -= cS;
}
static void ROMC_0E(f8_Regs *cpustate)
{
- /*
- * The device whose address space includes the contents of the PC0
- * register must place the word addressed by PC0 into the data bus.
- * The value on the data bus is then moved to the low order byte
- * of DC0 by all devices.
- */
- cpustate->dbus = cpustate->direct->read_raw_byte(cpustate->pc0);
- cpustate->dc0 = (cpustate->dc0 & 0xff00) | cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * The device whose address space includes the contents of the PC0
+ * register must place the word addressed by PC0 into the data bus.
+ * The value on the data bus is then moved to the low order byte
+ * of DC0 by all devices.
+ */
+ cpustate->dbus = cpustate->direct->read_raw_byte(cpustate->pc0);
+ cpustate->dc0 = (cpustate->dc0 & 0xff00) | cpustate->dbus;
+ cpustate->icount -= cL;
}
static void ROMC_0F(f8_Regs *cpustate)
{
- /*
- * The interrupting device with highest priority must place the
- * low order byte of the interrupt vector on the data bus.
- * All devices must copy the contents of PC0 into PC1. All devices
- * must move the contents of the data bus into the low order
- * byte of PC0.
- */
- cpustate->irq_vector = (*cpustate->irq_callback)(cpustate->device, F8_INPUT_LINE_INT_REQ);
- cpustate->dbus = cpustate->irq_vector & 0x00ff;
- cpustate->pc1 = cpustate->pc0;
- cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * The interrupting device with highest priority must place the
+ * low order byte of the interrupt vector on the data bus.
+ * All devices must copy the contents of PC0 into PC1. All devices
+ * must move the contents of the data bus into the low order
+ * byte of PC0.
+ */
+ cpustate->irq_vector = (*cpustate->irq_callback)(cpustate->device, F8_INPUT_LINE_INT_REQ);
+ cpustate->dbus = cpustate->irq_vector & 0x00ff;
+ cpustate->pc1 = cpustate->pc0;
+ cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
+ cpustate->icount -= cL;
}
#ifdef UNUSED_FUNCTION
static void ROMC_10(f8_Regs *cpustate)
{
- /*
- * Inhibit any modification to the interrupt priority logic.
- */
- cpustate->w |= 0x20; /* ???? */
- cpustate->icount -= cL;
+ /*
+ * Inhibit any modification to the interrupt priority logic.
+ */
+ cpustate->w |= 0x20; /* ???? */
+ cpustate->icount -= cL;
}
#endif
static void ROMC_11(f8_Regs *cpustate)
{
- /*
- * The device whose address space includes the contents of PC0
- * must place the contents of the addressed memory word on the
- * data bus. All devices must then move the contents of the
- * data bus to the upper byte of DC0.
- */
- cpustate->dbus = cpustate->direct->read_raw_byte(cpustate->pc0);
+ /*
+ * The device whose address space includes the contents of PC0
+ * must place the contents of the addressed memory word on the
+ * data bus. All devices must then move the contents of the
+ * data bus to the upper byte of DC0.
+ */
+ cpustate->dbus = cpustate->direct->read_raw_byte(cpustate->pc0);
cpustate->dc0 = (cpustate->dc0 & 0x00ff) | (cpustate->dbus << 8);
- cpustate->icount -= cL;
+ cpustate->icount -= cL;
}
static void ROMC_12(f8_Regs *cpustate)
{
- /*
- * All devices copy the contents of PC0 into PC1. All devices then
- * move the contents of the data bus into the low order byte of PC0.
- */
- cpustate->pc1 = cpustate->pc0;
- cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * All devices copy the contents of PC0 into PC1. All devices then
+ * move the contents of the data bus into the low order byte of PC0.
+ */
+ cpustate->pc1 = cpustate->pc0;
+ cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
+ cpustate->icount -= cL;
}
static void ROMC_13(f8_Regs *cpustate)
{
- /*
- * The interrupting device with highest priority must move the high
- * order half of the interrupt vector onto the data bus. All devices
- * must then move the contents of the data bus into the high order
- * byte of PC0. The interrupting device resets its interrupt circuitry
- * (so that it is no longer requesting CPU servicing and can respond
- * to another interrupt).
- */
- cpustate->dbus = cpustate->irq_vector >> 8;
- cpustate->pc0 = (cpustate->pc0 & 0x00ff) | (cpustate->dbus << 8);
- cpustate->w&=~I;
- cpustate->icount -= cL;
+ /*
+ * The interrupting device with highest priority must move the high
+ * order half of the interrupt vector onto the data bus. All devices
+ * must then move the contents of the data bus into the high order
+ * byte of PC0. The interrupting device resets its interrupt circuitry
+ * (so that it is no longer requesting CPU servicing and can respond
+ * to another interrupt).
+ */
+ cpustate->dbus = cpustate->irq_vector >> 8;
+ cpustate->pc0 = (cpustate->pc0 & 0x00ff) | (cpustate->dbus << 8);
+ cpustate->w&=~I;
+ cpustate->icount -= cL;
}
static void ROMC_14(f8_Regs *cpustate)
{
- /*
- * All devices move the contents of the data bus into the high
- * order byte of PC0.
- */
- cpustate->pc0 = (cpustate->pc0 & 0x00ff) | (cpustate->dbus << 8);
- cpustate->icount -= cL;
+ /*
+ * All devices move the contents of the data bus into the high
+ * order byte of PC0.
+ */
+ cpustate->pc0 = (cpustate->pc0 & 0x00ff) | (cpustate->dbus << 8);
+ cpustate->icount -= cL;
}
static void ROMC_15(f8_Regs *cpustate)
{
- /*
- * All devices move the contents of the data bus into the high
- * order byte of PC1.
- */
- cpustate->pc1 = (cpustate->pc1 & 0x00ff) | (cpustate->dbus << 8);
- cpustate->icount -= cL;
+ /*
+ * All devices move the contents of the data bus into the high
+ * order byte of PC1.
+ */
+ cpustate->pc1 = (cpustate->pc1 & 0x00ff) | (cpustate->dbus << 8);
+ cpustate->icount -= cL;
}
static void ROMC_16(f8_Regs *cpustate)
{
- /*
- * All devices move the contents of the data bus into the high
- * order byte of DC0.
- */
- cpustate->dc0 = (cpustate->dc0 & 0x00ff) | (cpustate->dbus << 8);
- cpustate->icount -= cL;
+ /*
+ * All devices move the contents of the data bus into the high
+ * order byte of DC0.
+ */
+ cpustate->dc0 = (cpustate->dc0 & 0x00ff) | (cpustate->dbus << 8);
+ cpustate->icount -= cL;
}
static void ROMC_17(f8_Regs *cpustate)
{
- /*
- * All devices move the contents of the data bus into the low
- * order byte of PC0.
- */
- cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * All devices move the contents of the data bus into the low
+ * order byte of PC0.
+ */
+ cpustate->pc0 = (cpustate->pc0 & 0xff00) | cpustate->dbus;
+ cpustate->icount -= cL;
}
static void ROMC_18(f8_Regs *cpustate)
{
- /*
- * All devices move the contents of the data bus into the low
- * order byte of PC1.
- */
- cpustate->pc1 = (cpustate->pc1 & 0xff00) | cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * All devices move the contents of the data bus into the low
+ * order byte of PC1.
+ */
+ cpustate->pc1 = (cpustate->pc1 & 0xff00) | cpustate->dbus;
+ cpustate->icount -= cL;
}
static void ROMC_19(f8_Regs *cpustate)
{
- /*
- * All devices move the contents of the data bus into the low
- * order byte of DC0.
- */
- cpustate->dc0 = (cpustate->dc0 & 0xff00) | cpustate->dbus;
- cpustate->icount -= cL;
+ /*
+ * All devices move the contents of the data bus into the low
+ * order byte of DC0.
+ */
+ cpustate->dc0 = (cpustate->dc0 & 0xff00) | cpustate->dbus;
+ cpustate->icount -= cL;
}
static void ROMC_1A(f8_Regs *cpustate)
{
- /*
- * During the prior cycle, an I/O port timer or interrupt control
- * register was addressed; the device containing the addressed port
- * must place the contents of the data bus into the address port.
- */
- cpustate->iospace->write_byte(cpustate->io, cpustate->dbus);
- cpustate->icount -= cL;
+ /*
+ * During the prior cycle, an I/O port timer or interrupt control
+ * register was addressed; the device containing the addressed port
+ * must place the contents of the data bus into the address port.
+ */
+ cpustate->iospace->write_byte(cpustate->io, cpustate->dbus);
+ cpustate->icount -= cL;
}
static void ROMC_1B(f8_Regs *cpustate)
{
- /*
- * During the prior cycle, the data bus specified the address of an
- * I/O port. The device containing the addressed I/O port must place
- * the contents of the I/O port on the data bus. (Note that the
- * contents of timer and interrupt control registers cannot be read
- * back onto the data bus).
- */
+ /*
+ * During the prior cycle, the data bus specified the address of an
+ * I/O port. The device containing the addressed I/O port must place
+ * the contents of the I/O port on the data bus. (Note that the
+ * contents of timer and interrupt control registers cannot be read
+ * back onto the data bus).
+ */
cpustate->dbus = cpustate->iospace->read_byte(cpustate->io);
- cpustate->icount -= cL;
+ cpustate->icount -= cL;
}
-static void ROMC_1C(f8_Regs *cpustate, int insttim) /* SKR - added parameter to tell if */
- /* it is long or short based on inst */
+static void ROMC_1C(f8_Regs *cpustate, int insttim) /* SKR - added parameter to tell if */
+ /* it is long or short based on inst */
{
- /*
- * None.
- */
- cpustate->icount -= insttim;
+ /*
+ * None.
+ */
+ cpustate->icount -= insttim;
}
static void ROMC_1D(f8_Regs *cpustate)
{
- /*
- * Devices with DC0 and DC1 registers must switch registers.
- * Devices without a DC1 register perform no operation.
- */
- UINT16 tmp = cpustate->dc0;
- cpustate->dc0 = cpustate->dc1;
- cpustate->dc1 = tmp;
- cpustate->icount -= cS;
+ /*
+ * Devices with DC0 and DC1 registers must switch registers.
+ * Devices without a DC1 register perform no operation.
+ */
+ UINT16 tmp = cpustate->dc0;
+ cpustate->dc0 = cpustate->dc1;
+ cpustate->dc1 = tmp;
+ cpustate->icount -= cS;
}
#ifdef UNUSED_FUNCTION
static void ROMC_1E(f8_Regs *cpustate)
{
- /*
- * The devices whose address space includes the contents of PC0
- * must place the low order byte of PC0 onto the data bus.
- */
- cpustate->dbus = cpustate->pc0 & 0xff;
- cpustate->icount -= cL;
+ /*
+ * The devices whose address space includes the contents of PC0
+ * must place the low order byte of PC0 onto the data bus.
+ */
+ cpustate->dbus = cpustate->pc0 & 0xff;
+ cpustate->icount -= cL;
}
static void ROMC_1F(f8_Regs *cpustate)
{
- /*
- * The devices whose address space includes the contents of PC0
- * must place the high order byte of PC0 onto the data bus.
- */
- cpustate->dbus = (cpustate->pc0 >> 8) & 0xff;
- cpustate->icount -= cL;
+ /*
+ * The devices whose address space includes the contents of PC0
+ * must place the high order byte of PC0 onto the data bus.
+ */
+ cpustate->dbus = (cpustate->pc0 >> 8) & 0xff;
+ cpustate->icount -= cL;
}
#endif
@@ -477,7 +477,7 @@ static void ROMC_1F(f8_Regs *cpustate)
***********************************/
static void illegal(f8_Regs *cpustate)
{
- logerror("f8 illegal opcode at 0x%04x: %02x\n", cpustate->pc0, cpustate->dbus);
+ logerror("f8 illegal opcode at 0x%04x: %02x\n", cpustate->pc0, cpustate->dbus);
}
/***************************************************
@@ -486,7 +486,7 @@ static void illegal(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_ku(f8_Regs *cpustate)
{
- cpustate->a = cpustate->r[12];
+ cpustate->a = cpustate->r[12];
}
/***************************************************
@@ -495,7 +495,7 @@ static void f8_lr_a_ku(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_kl(f8_Regs *cpustate)
{
- cpustate->a = cpustate->r[13];
+ cpustate->a = cpustate->r[13];
}
/***************************************************
@@ -504,7 +504,7 @@ static void f8_lr_a_kl(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_qu(f8_Regs *cpustate)
{
- cpustate->a = cpustate->r[14];
+ cpustate->a = cpustate->r[14];
}
/***************************************************
@@ -513,7 +513,7 @@ static void f8_lr_a_qu(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_ql(f8_Regs *cpustate)
{
- cpustate->a = cpustate->r[15];
+ cpustate->a = cpustate->r[15];
}
/***************************************************
@@ -522,7 +522,7 @@ static void f8_lr_a_ql(f8_Regs *cpustate)
***************************************************/
static void f8_lr_ku_a(f8_Regs *cpustate)
{
- cpustate->r[12] = cpustate->a;
+ cpustate->r[12] = cpustate->a;
}
/***************************************************
@@ -531,7 +531,7 @@ static void f8_lr_ku_a(f8_Regs *cpustate)
***************************************************/
static void f8_lr_kl_a(f8_Regs *cpustate)
{
- cpustate->r[13] = cpustate->a;
+ cpustate->r[13] = cpustate->a;
}
/***************************************************
@@ -540,7 +540,7 @@ static void f8_lr_kl_a(f8_Regs *cpustate)
***************************************************/
static void f8_lr_qu_a(f8_Regs *cpustate)
{
- cpustate->r[14] = cpustate->a;
+ cpustate->r[14] = cpustate->a;
}
/***************************************************
@@ -549,7 +549,7 @@ static void f8_lr_qu_a(f8_Regs *cpustate)
***************************************************/
static void f8_lr_ql_a(f8_Regs *cpustate)
{
- cpustate->r[15] = cpustate->a;
+ cpustate->r[15] = cpustate->a;
}
/***************************************************
@@ -558,10 +558,10 @@ static void f8_lr_ql_a(f8_Regs *cpustate)
***************************************************/
static void f8_lr_k_p(f8_Regs *cpustate)
{
- ROMC_07(cpustate);
- cpustate->r[12] = cpustate->dbus;
- ROMC_0B(cpustate);
- cpustate->r[13] = cpustate->dbus;
+ ROMC_07(cpustate);
+ cpustate->r[12] = cpustate->dbus;
+ ROMC_0B(cpustate);
+ cpustate->r[13] = cpustate->dbus;
}
/***************************************************
@@ -570,10 +570,10 @@ static void f8_lr_k_p(f8_Regs *cpustate)
***************************************************/
static void f8_lr_p_k(f8_Regs *cpustate)
{
- cpustate->dbus = cpustate->r[12];
- ROMC_15(cpustate);
- cpustate->dbus = cpustate->r[13];
- ROMC_18(cpustate);
+ cpustate->dbus = cpustate->r[12];
+ ROMC_15(cpustate);
+ cpustate->dbus = cpustate->r[13];
+ ROMC_18(cpustate);
}
/***************************************************
@@ -582,7 +582,7 @@ static void f8_lr_p_k(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_is(f8_Regs *cpustate)
{
- cpustate->a = cpustate->is;
+ cpustate->a = cpustate->is;
}
/***************************************************
@@ -591,7 +591,7 @@ static void f8_lr_a_is(f8_Regs *cpustate)
***************************************************/
static void f8_lr_is_a(f8_Regs *cpustate)
{
- cpustate->is = cpustate->a & 0x3f;
+ cpustate->is = cpustate->a & 0x3f;
}
/***************************************************
@@ -600,10 +600,10 @@ static void f8_lr_is_a(f8_Regs *cpustate)
***************************************************/
static void f8_pk(f8_Regs *cpustate)
{
- cpustate->dbus = cpustate->r[13];
- ROMC_12(cpustate);
- cpustate->dbus = cpustate->r[12];
- ROMC_14(cpustate);
+ cpustate->dbus = cpustate->r[13];
+ ROMC_12(cpustate);
+ cpustate->dbus = cpustate->r[12];
+ ROMC_14(cpustate);
}
/***************************************************
@@ -612,10 +612,10 @@ static void f8_pk(f8_Regs *cpustate)
***************************************************/
static void f8_lr_p0_q(f8_Regs *cpustate)
{
- cpustate->dbus = cpustate->r[15];
- ROMC_17(cpustate);
- cpustate->dbus = cpustate->r[14];
- ROMC_14(cpustate);
+ cpustate->dbus = cpustate->r[15];
+ ROMC_17(cpustate);
+ cpustate->dbus = cpustate->r[14];
+ ROMC_14(cpustate);
}
/***************************************************
@@ -624,10 +624,10 @@ static void f8_lr_p0_q(f8_Regs *cpustate)
***************************************************/
static void f8_lr_q_dc(f8_Regs *cpustate)
{
- ROMC_06(cpustate);
- cpustate->r[14] = cpustate->dbus;
- ROMC_09(cpustate);
- cpustate->r[15] = cpustate->dbus;
+ ROMC_06(cpustate);
+ cpustate->r[14] = cpustate->dbus;
+ ROMC_09(cpustate);
+ cpustate->r[15] = cpustate->dbus;
}
/***************************************************
@@ -636,10 +636,10 @@ static void f8_lr_q_dc(f8_Regs *cpustate)
***************************************************/
static void f8_lr_dc_q(f8_Regs *cpustate)
{
- cpustate->dbus = cpustate->r[14];
- ROMC_16(cpustate);
- cpustate->dbus = cpustate->r[15];
- ROMC_19(cpustate);
+ cpustate->dbus = cpustate->r[14];
+ ROMC_16(cpustate);
+ cpustate->dbus = cpustate->r[15];
+ ROMC_19(cpustate);
}
/***************************************************
@@ -648,10 +648,10 @@ static void f8_lr_dc_q(f8_Regs *cpustate)
***************************************************/
static void f8_lr_dc_h(f8_Regs *cpustate)
{
- cpustate->dbus = cpustate->r[10];
- ROMC_16(cpustate);
- cpustate->dbus = cpustate->r[11];
- ROMC_19(cpustate);
+ cpustate->dbus = cpustate->r[10];
+ ROMC_16(cpustate);
+ cpustate->dbus = cpustate->r[11];
+ ROMC_19(cpustate);
}
/***************************************************
@@ -660,10 +660,10 @@ static void f8_lr_dc_h(f8_Regs *cpustate)
***************************************************/
static void f8_lr_h_dc(f8_Regs *cpustate)
{
- ROMC_06(cpustate);
- cpustate->r[10] = cpustate->dbus;
- ROMC_09(cpustate);
- cpustate->r[11] = cpustate->dbus;
+ ROMC_06(cpustate);
+ cpustate->r[10] = cpustate->dbus;
+ ROMC_09(cpustate);
+ cpustate->r[11] = cpustate->dbus;
}
/***************************************************
@@ -672,9 +672,9 @@ static void f8_lr_h_dc(f8_Regs *cpustate)
***************************************************/
static void f8_sr_1(f8_Regs *cpustate)
{
- cpustate->a >>= 1;
- CLR_OZCS;
- SET_SZ(cpustate->a);
+ cpustate->a >>= 1;
+ CLR_OZCS;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -683,9 +683,9 @@ static void f8_sr_1(f8_Regs *cpustate)
***************************************************/
static void f8_sl_1(f8_Regs *cpustate)
{
- cpustate->a <<= 1;
- CLR_OZCS;
- SET_SZ(cpustate->a);
+ cpustate->a <<= 1;
+ CLR_OZCS;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -694,9 +694,9 @@ static void f8_sl_1(f8_Regs *cpustate)
***************************************************/
static void f8_sr_4(f8_Regs *cpustate)
{
- cpustate->a >>= 4;
- CLR_OZCS;
- SET_SZ(cpustate->a);
+ cpustate->a >>= 4;
+ CLR_OZCS;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -705,9 +705,9 @@ static void f8_sr_4(f8_Regs *cpustate)
***************************************************/
static void f8_sl_4(f8_Regs *cpustate)
{
- cpustate->a <<= 4;
- CLR_OZCS;
- SET_SZ(cpustate->a);
+ cpustate->a <<= 4;
+ CLR_OZCS;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -716,8 +716,8 @@ static void f8_sl_4(f8_Regs *cpustate)
***************************************************/
static void f8_lm(f8_Regs *cpustate)
{
- ROMC_02(cpustate);
- cpustate->a = cpustate->dbus;
+ ROMC_02(cpustate);
+ cpustate->a = cpustate->dbus;
}
/***************************************************
@@ -726,8 +726,8 @@ static void f8_lm(f8_Regs *cpustate)
***************************************************/
static void f8_st(f8_Regs *cpustate)
{
- cpustate->dbus = cpustate->a;
- ROMC_05(cpustate);
+ cpustate->dbus = cpustate->a;
+ ROMC_05(cpustate);
}
/***************************************************
@@ -736,9 +736,9 @@ static void f8_st(f8_Regs *cpustate)
***************************************************/
static void f8_com(f8_Regs *cpustate)
{
- cpustate->a = ~cpustate->a;
- CLR_OZCS;
- SET_SZ(cpustate->a);
+ cpustate->a = ~cpustate->a;
+ CLR_OZCS;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -747,17 +747,17 @@ static void f8_com(f8_Regs *cpustate)
***************************************************/
static void f8_lnk(f8_Regs *cpustate)
{
- if (cpustate->w & C)
- {
+ if (cpustate->w & C)
+ {
CLR_OZCS;
SET_OC(cpustate->a,1);
cpustate->a += 1;
- }
- else
- {
+ }
+ else
+ {
CLR_OZCS;
- }
- SET_SZ(cpustate->a);
+ }
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -766,8 +766,8 @@ static void f8_lnk(f8_Regs *cpustate)
***************************************************/
static void f8_di(f8_Regs *cpustate)
{
- ROMC_1C(cpustate, cS);
- cpustate->w &= ~I;
+ ROMC_1C(cpustate, cS);
+ cpustate->w &= ~I;
}
/***************************************************
@@ -776,8 +776,8 @@ static void f8_di(f8_Regs *cpustate)
***************************************************/
static void f8_ei(f8_Regs *cpustate)
{
- ROMC_1C(cpustate, cS);
- cpustate->w |= I;
+ ROMC_1C(cpustate, cS);
+ cpustate->w |= I;
}
/***************************************************
@@ -786,7 +786,7 @@ static void f8_ei(f8_Regs *cpustate)
***************************************************/
static void f8_pop(f8_Regs *cpustate)
{
- ROMC_04(cpustate);
+ ROMC_04(cpustate);
}
/***************************************************
@@ -795,8 +795,8 @@ static void f8_pop(f8_Regs *cpustate)
***************************************************/
static void f8_lr_w_j(f8_Regs *cpustate)
{
- ROMC_1C(cpustate, cS);
- cpustate->w = cpustate->r[9];
+ ROMC_1C(cpustate, cS);
+ cpustate->w = cpustate->r[9];
}
/***************************************************
@@ -805,7 +805,7 @@ static void f8_lr_w_j(f8_Regs *cpustate)
***************************************************/
static void f8_lr_j_w(f8_Regs *cpustate)
{
- cpustate->r[9] = cpustate->w;
+ cpustate->r[9] = cpustate->w;
}
/***************************************************
@@ -814,10 +814,10 @@ static void f8_lr_j_w(f8_Regs *cpustate)
***************************************************/
static void f8_inc(f8_Regs *cpustate)
{
- CLR_OZCS;
- SET_OC(cpustate->a,1);
- cpustate->a += 1;
- SET_SZ(cpustate->a);
+ CLR_OZCS;
+ SET_OC(cpustate->a,1);
+ cpustate->a += 1;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -826,8 +826,8 @@ static void f8_inc(f8_Regs *cpustate)
***************************************************/
static void f8_li(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- cpustate->a = cpustate->dbus;
+ ROMC_03(cpustate, cL);
+ cpustate->a = cpustate->dbus;
}
/***************************************************
@@ -836,10 +836,10 @@ static void f8_li(f8_Regs *cpustate)
***************************************************/
static void f8_ni(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- CLR_OZCS;
- cpustate->a &= cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_03(cpustate, cL);
+ CLR_OZCS;
+ cpustate->a &= cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -848,10 +848,10 @@ static void f8_ni(f8_Regs *cpustate)
***************************************************/
static void f8_oi(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- CLR_OZCS;
- cpustate->a |= cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_03(cpustate, cL);
+ CLR_OZCS;
+ cpustate->a |= cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -860,10 +860,10 @@ static void f8_oi(f8_Regs *cpustate)
***************************************************/
static void f8_xi(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- CLR_OZCS;
- cpustate->a ^= cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_03(cpustate, cL);
+ CLR_OZCS;
+ cpustate->a ^= cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -872,11 +872,11 @@ static void f8_xi(f8_Regs *cpustate)
***************************************************/
static void f8_ai(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- CLR_OZCS;
- SET_OC(cpustate->a,cpustate->dbus);
- cpustate->a += cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_03(cpustate, cL);
+ CLR_OZCS;
+ SET_OC(cpustate->a,cpustate->dbus);
+ cpustate->a += cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -885,12 +885,12 @@ static void f8_ai(f8_Regs *cpustate)
***************************************************/
static void f8_ci(f8_Regs *cpustate)
{
- UINT16 tmp = ((UINT8)~cpustate->a) + 1;
- ROMC_03(cpustate, cL);
- CLR_OZCS;
- SET_OC(tmp,cpustate->dbus);
- tmp += cpustate->dbus;
- SET_SZ((UINT8)tmp);
+ UINT16 tmp = ((UINT8)~cpustate->a) + 1;
+ ROMC_03(cpustate, cL);
+ CLR_OZCS;
+ SET_OC(tmp,cpustate->dbus);
+ tmp += cpustate->dbus;
+ SET_SZ((UINT8)tmp);
}
/***************************************************
@@ -899,11 +899,11 @@ static void f8_ci(f8_Regs *cpustate)
***************************************************/
static void f8_in(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- CLR_OZCS;
- ROMC_1B(cpustate);
- cpustate->a = cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_03(cpustate, cL);
+ CLR_OZCS;
+ ROMC_1B(cpustate);
+ cpustate->a = cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -912,9 +912,9 @@ static void f8_in(f8_Regs *cpustate)
***************************************************/
static void f8_out(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- cpustate->dbus = cpustate->a;
- ROMC_1A(cpustate);
+ ROMC_03(cpustate, cL);
+ cpustate->dbus = cpustate->a;
+ ROMC_1A(cpustate);
}
/***************************************************
@@ -923,12 +923,12 @@ static void f8_out(f8_Regs *cpustate)
***************************************************/
static void f8_pi(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- cpustate->a = cpustate->dbus;
- ROMC_0D(cpustate);
- ROMC_0C(cpustate);
- cpustate->dbus = cpustate->a;
- ROMC_14(cpustate);
+ ROMC_03(cpustate, cL);
+ cpustate->a = cpustate->dbus;
+ ROMC_0D(cpustate);
+ ROMC_0C(cpustate);
+ cpustate->dbus = cpustate->a;
+ ROMC_14(cpustate);
}
/***************************************************
@@ -937,11 +937,11 @@ static void f8_pi(f8_Regs *cpustate)
***************************************************/
static void f8_jmp(f8_Regs *cpustate)
{
- ROMC_03(cpustate, cL);
- cpustate->a = cpustate->dbus;
- ROMC_0C(cpustate);
- cpustate->dbus = cpustate->a;
- ROMC_14(cpustate);
+ ROMC_03(cpustate, cL);
+ cpustate->a = cpustate->dbus;
+ ROMC_0C(cpustate);
+ cpustate->dbus = cpustate->a;
+ ROMC_14(cpustate);
}
/***************************************************
@@ -950,10 +950,10 @@ static void f8_jmp(f8_Regs *cpustate)
***************************************************/
static void f8_dci(f8_Regs *cpustate)
{
- ROMC_11(cpustate);
- ROMC_03(cpustate, cS);
- ROMC_0E(cpustate);
- ROMC_03(cpustate, cS);
+ ROMC_11(cpustate);
+ ROMC_03(cpustate, cS);
+ ROMC_0E(cpustate);
+ ROMC_03(cpustate, cS);
}
/***************************************************
@@ -970,7 +970,7 @@ static void f8_nop(f8_Regs *cpustate)
***************************************************/
static void f8_xdc(f8_Regs *cpustate)
{
- ROMC_1D(cpustate);
+ ROMC_1D(cpustate);
}
/***************************************************
@@ -979,10 +979,10 @@ static void f8_xdc(f8_Regs *cpustate)
***************************************************/
static void f8_ds_r(f8_Regs *cpustate, int r)
{
- CLR_OZCS;
- SET_OC(cpustate->r[r], 0xff);
- cpustate->r[r] = cpustate->r[r] + 0xff;
- SET_SZ(cpustate->r[r]);
+ CLR_OZCS;
+ SET_OC(cpustate->r[r], 0xff);
+ cpustate->r[r] = cpustate->r[r] + 0xff;
+ SET_SZ(cpustate->r[r]);
}
/***************************************************
@@ -991,10 +991,10 @@ static void f8_ds_r(f8_Regs *cpustate, int r)
***************************************************/
static void f8_ds_isar(f8_Regs *cpustate)
{
- CLR_OZCS;
- SET_OC(cpustate->r[cpustate->is], 0xff);
- cpustate->r[cpustate->is] = cpustate->r[cpustate->is] + 0xff;
- SET_SZ(cpustate->r[cpustate->is]);
+ CLR_OZCS;
+ SET_OC(cpustate->r[cpustate->is], 0xff);
+ cpustate->r[cpustate->is] = cpustate->r[cpustate->is] + 0xff;
+ SET_SZ(cpustate->r[cpustate->is]);
}
/***************************************************
@@ -1003,11 +1003,11 @@ static void f8_ds_isar(f8_Regs *cpustate)
***************************************************/
static void f8_ds_isar_i(f8_Regs *cpustate)
{
- CLR_OZCS;
- SET_OC(cpustate->r[cpustate->is], 0xff);
- cpustate->r[cpustate->is] = cpustate->r[cpustate->is] + 0xff;
- SET_SZ(cpustate->r[cpustate->is]);
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
+ CLR_OZCS;
+ SET_OC(cpustate->r[cpustate->is], 0xff);
+ cpustate->r[cpustate->is] = cpustate->r[cpustate->is] + 0xff;
+ SET_SZ(cpustate->r[cpustate->is]);
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
}
/***************************************************
@@ -1016,11 +1016,11 @@ static void f8_ds_isar_i(f8_Regs *cpustate)
***************************************************/
static void f8_ds_isar_d(f8_Regs *cpustate)
{
- CLR_OZCS;
- SET_OC(cpustate->r[cpustate->is], 0xff);
- cpustate->r[cpustate->is] = cpustate->r[cpustate->is] + 0xff;
- SET_SZ(cpustate->r[cpustate->is]);
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
+ CLR_OZCS;
+ SET_OC(cpustate->r[cpustate->is], 0xff);
+ cpustate->r[cpustate->is] = cpustate->r[cpustate->is] + 0xff;
+ SET_SZ(cpustate->r[cpustate->is]);
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
}
/***************************************************
@@ -1029,7 +1029,7 @@ static void f8_ds_isar_d(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_r(f8_Regs *cpustate, int r)
{
- cpustate->a = cpustate->r[r];
+ cpustate->a = cpustate->r[r];
}
/***************************************************
@@ -1038,7 +1038,7 @@ static void f8_lr_a_r(f8_Regs *cpustate, int r)
***************************************************/
static void f8_lr_a_isar(f8_Regs *cpustate)
{
- cpustate->a = cpustate->r[cpustate->is];
+ cpustate->a = cpustate->r[cpustate->is];
}
/***************************************************
@@ -1047,8 +1047,8 @@ static void f8_lr_a_isar(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_isar_i(f8_Regs *cpustate)
{
- cpustate->a = cpustate->r[cpustate->is];
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
+ cpustate->a = cpustate->r[cpustate->is];
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
}
/***************************************************
@@ -1057,8 +1057,8 @@ static void f8_lr_a_isar_i(f8_Regs *cpustate)
***************************************************/
static void f8_lr_a_isar_d(f8_Regs *cpustate)
{
- cpustate->a = cpustate->r[cpustate->is];
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
+ cpustate->a = cpustate->r[cpustate->is];
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
}
/***************************************************
@@ -1067,7 +1067,7 @@ static void f8_lr_a_isar_d(f8_Regs *cpustate)
***************************************************/
static void f8_lr_r_a(f8_Regs *cpustate, int r)
{
- cpustate->r[r] = cpustate->a;
+ cpustate->r[r] = cpustate->a;
}
/***************************************************
@@ -1076,7 +1076,7 @@ static void f8_lr_r_a(f8_Regs *cpustate, int r)
***************************************************/
static void f8_lr_isar_a(f8_Regs *cpustate)
{
- cpustate->r[cpustate->is] = cpustate->a;
+ cpustate->r[cpustate->is] = cpustate->a;
}
/***************************************************
@@ -1085,8 +1085,8 @@ static void f8_lr_isar_a(f8_Regs *cpustate)
***************************************************/
static void f8_lr_isar_i_a(f8_Regs *cpustate)
{
- cpustate->r[cpustate->is] = cpustate->a;
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
+ cpustate->r[cpustate->is] = cpustate->a;
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
}
/***************************************************
@@ -1095,8 +1095,8 @@ static void f8_lr_isar_i_a(f8_Regs *cpustate)
***************************************************/
static void f8_lr_isar_d_a(f8_Regs *cpustate)
{
- cpustate->r[cpustate->is] = cpustate->a;
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
+ cpustate->r[cpustate->is] = cpustate->a;
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
}
/***************************************************
@@ -1105,7 +1105,7 @@ static void f8_lr_isar_d_a(f8_Regs *cpustate)
***************************************************/
static void f8_lisu(f8_Regs *cpustate, int e)
{
- cpustate->is = (cpustate->is & 0x07) | e;
+ cpustate->is = (cpustate->is & 0x07) | e;
}
/***************************************************
@@ -1114,7 +1114,7 @@ static void f8_lisu(f8_Regs *cpustate, int e)
***************************************************/
static void f8_lisl(f8_Regs *cpustate, int e)
{
- cpustate->is = (cpustate->is & 0x38) | e;
+ cpustate->is = (cpustate->is & 0x38) | e;
}
/***************************************************
@@ -1123,7 +1123,7 @@ static void f8_lisl(f8_Regs *cpustate, int e)
***************************************************/
static void f8_lis(f8_Regs *cpustate, int i)
{
- cpustate->a = i;
+ cpustate->a = i;
}
/***************************************************
@@ -1132,11 +1132,11 @@ static void f8_lis(f8_Regs *cpustate, int i)
***************************************************/
static void f8_bt(f8_Regs *cpustate, int e)
{
- ROMC_1C(cpustate, cS);
- if (cpustate->w & e)
- ROMC_01(cpustate); /* take the relative branch */
- else
- ROMC_03(cpustate, cS); /* just read the argument on the data bus */
+ ROMC_1C(cpustate, cS);
+ if (cpustate->w & e)
+ ROMC_01(cpustate); /* take the relative branch */
+ else
+ ROMC_03(cpustate, cS); /* just read the argument on the data bus */
}
/***************************************************
@@ -1145,11 +1145,11 @@ static void f8_bt(f8_Regs *cpustate, int e)
***************************************************/
static void f8_am(f8_Regs *cpustate)
{
- ROMC_02(cpustate);
- CLR_OZCS;
- SET_OC(cpustate->a, cpustate->dbus);
- cpustate->a += cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_02(cpustate);
+ CLR_OZCS;
+ SET_OC(cpustate->a, cpustate->dbus);
+ cpustate->a += cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -1173,30 +1173,30 @@ static void f8_amd(f8_Regs *cpustate)
*NOTE* status flags are updated prior to the factor being added
*/
- UINT8 augend=cpustate->a;
- ROMC_02(cpustate);
- UINT8 addend=cpustate->dbus;
- UINT8 tmp=addend+augend;
+ UINT8 augend=cpustate->a;
+ ROMC_02(cpustate);
+ UINT8 addend=cpustate->dbus;
+ UINT8 tmp=addend+augend;
- UINT8 c=0; /* high order carry */
- UINT8 ic=0; /* low order carry */
- if(((augend+addend)&0xff0)>0xf0)
- c=1;
- if((augend&0x0f)+(addend&0x0f)>0x0F)
- ic=1;
+ UINT8 c=0; /* high order carry */
+ UINT8 ic=0; /* low order carry */
+ if(((augend+addend)&0xff0)>0xf0)
+ c=1;
+ if((augend&0x0f)+(addend&0x0f)>0x0F)
+ ic=1;
- CLR_OZCS;
- SET_OC(augend,addend);
- SET_SZ(tmp);
+ CLR_OZCS;
+ SET_OC(augend,addend);
+ SET_SZ(tmp);
- if(c==0&&ic==0)
- tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
- if(c==0&&ic==1)
- tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
- if(c==1&&ic==0)
- tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==0)
+ tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==1)
+ tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
+ if(c==1&&ic==0)
+ tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
- cpustate->a = tmp;
+ cpustate->a = tmp;
}
/***************************************************
@@ -1205,10 +1205,10 @@ static void f8_amd(f8_Regs *cpustate)
***************************************************/
static void f8_nm(f8_Regs *cpustate)
{
- ROMC_02(cpustate);
- CLR_OZCS;
- cpustate->a &= cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_02(cpustate);
+ CLR_OZCS;
+ cpustate->a &= cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -1217,10 +1217,10 @@ static void f8_nm(f8_Regs *cpustate)
***************************************************/
static void f8_om(f8_Regs *cpustate)
{
- ROMC_02(cpustate);
- CLR_OZCS;
- cpustate->a |= cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_02(cpustate);
+ CLR_OZCS;
+ cpustate->a |= cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -1229,19 +1229,19 @@ static void f8_om(f8_Regs *cpustate)
***************************************************/
static void f8_xm(f8_Regs *cpustate)
{
- ROMC_02(cpustate);
- CLR_OZCS;
- cpustate->a ^= cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_02(cpustate);
+ CLR_OZCS;
+ cpustate->a ^= cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
* O Z C S 1000 1101
* x x x x CM
***************************************************/
-static void f8_cm(f8_Regs *cpustate) /* SKR changed to match f8_ci(cpustate) */
+static void f8_cm(f8_Regs *cpustate) /* SKR changed to match f8_ci(cpustate) */
{
- UINT16 tmp = ((UINT8)~cpustate->a) + 1;
+ UINT16 tmp = ((UINT8)~cpustate->a) + 1;
ROMC_02(cpustate);
CLR_OZCS;
SET_OC(tmp,cpustate->dbus);
@@ -1255,8 +1255,8 @@ static void f8_cm(f8_Regs *cpustate) /* SKR changed to match f8_ci(cpustate) */
***************************************************/
static void f8_adc(f8_Regs *cpustate)
{
- cpustate->dbus = cpustate->a;
- ROMC_0A(cpustate); /* add data bus value to DC0 */
+ cpustate->dbus = cpustate->a;
+ ROMC_0A(cpustate); /* add data bus value to DC0 */
}
/***************************************************
@@ -1265,10 +1265,10 @@ static void f8_adc(f8_Regs *cpustate)
***************************************************/
static void f8_br7(f8_Regs *cpustate)
{
- if ((cpustate->is & 7) == 7)
- ROMC_03(cpustate, cS); /* just read the argument on the data bus */
- else
- ROMC_01(cpustate); /* take the relative branch */
+ if ((cpustate->is & 7) == 7)
+ ROMC_03(cpustate, cS); /* just read the argument on the data bus */
+ else
+ ROMC_01(cpustate); /* take the relative branch */
}
/***************************************************
@@ -1277,11 +1277,11 @@ static void f8_br7(f8_Regs *cpustate)
***************************************************/
static void f8_bf(f8_Regs *cpustate, int t)
{
- ROMC_1C(cpustate, cS);
- if (cpustate->w & t)
- ROMC_03(cpustate, cS); /* just read the argument on the data bus */
- else
- ROMC_01(cpustate); /* take the relative branch */
+ ROMC_1C(cpustate, cS);
+ if (cpustate->w & t)
+ ROMC_03(cpustate, cS); /* just read the argument on the data bus */
+ else
+ ROMC_01(cpustate); /* take the relative branch */
}
/***************************************************
@@ -1290,10 +1290,10 @@ static void f8_bf(f8_Regs *cpustate, int t)
***************************************************/
static void f8_ins_0(f8_Regs *cpustate, int n)
{
- ROMC_1C(cpustate, cS);
- CLR_OZCS;
- cpustate->a = cpustate->iospace->read_byte(n);
- SET_SZ(cpustate->a);
+ ROMC_1C(cpustate, cS);
+ CLR_OZCS;
+ cpustate->a = cpustate->iospace->read_byte(n);
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -1302,12 +1302,12 @@ static void f8_ins_0(f8_Regs *cpustate, int n)
***************************************************/
static void f8_ins_1(f8_Regs *cpustate, int n)
{
- ROMC_1C(cpustate, cL);
- cpustate->io = n;
- ROMC_1B(cpustate);
- CLR_OZCS;
- cpustate->a = cpustate->dbus;
- SET_SZ(cpustate->a);
+ ROMC_1C(cpustate, cL);
+ cpustate->io = n;
+ ROMC_1B(cpustate);
+ CLR_OZCS;
+ cpustate->a = cpustate->dbus;
+ SET_SZ(cpustate->a);
}
/***************************************************
@@ -1316,8 +1316,8 @@ static void f8_ins_1(f8_Regs *cpustate, int n)
***************************************************/
static void f8_outs_0(f8_Regs *cpustate, int n)
{
- ROMC_1C(cpustate, cS);
- cpustate->iospace->write_byte(n, cpustate->a);
+ ROMC_1C(cpustate, cS);
+ cpustate->iospace->write_byte(n, cpustate->a);
}
/***************************************************
@@ -1326,10 +1326,10 @@ static void f8_outs_0(f8_Regs *cpustate, int n)
***************************************************/
static void f8_outs_1(f8_Regs *cpustate, int n)
{
- ROMC_1C(cpustate, cL);
- cpustate->io = n;
- cpustate->dbus = cpustate->a;
- ROMC_1A(cpustate);
+ ROMC_1C(cpustate, cL);
+ cpustate->io = n;
+ cpustate->dbus = cpustate->a;
+ ROMC_1A(cpustate);
}
/***************************************************
@@ -1389,30 +1389,30 @@ static void f8_as_isar_d(f8_Regs *cpustate)
static void f8_asd(f8_Regs *cpustate, int r)
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=cpustate->a;
- ROMC_1C(cpustate, cS);
- UINT8 addend=cpustate->r[r];
- UINT8 tmp=augend+addend;
+ UINT8 augend=cpustate->a;
+ ROMC_1C(cpustate, cS);
+ UINT8 addend=cpustate->r[r];
+ UINT8 tmp=augend+addend;
+
+ UINT8 c=0;
+ UINT8 ic=0;
+ if(((augend+addend)&0xff0)>0xf0)
+ c=1;
+ if((augend&0x0f)+(addend&0x0f)>0x0F)
+ ic=1;
- UINT8 c=0;
- UINT8 ic=0;
- if(((augend+addend)&0xff0)>0xf0)
- c=1;
- if((augend&0x0f)+(addend&0x0f)>0x0F)
- ic=1;
-
- CLR_OZCS;
- SET_OC(augend,addend);
- SET_SZ(tmp);
+ CLR_OZCS;
+ SET_OC(augend,addend);
+ SET_SZ(tmp);
- if(c==0&&ic==0)
- tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
- if(c==0&&ic==1)
- tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
- if(c==1&&ic==0)
- tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==0)
+ tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==1)
+ tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
+ if(c==1&&ic==0)
+ tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
- cpustate->a = tmp;
+ cpustate->a = tmp;
}
/***************************************************
@@ -1422,30 +1422,30 @@ static void f8_asd(f8_Regs *cpustate, int r)
static void f8_asd_isar(f8_Regs *cpustate)
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=cpustate->a;
- ROMC_1C(cpustate, cS);
- UINT8 addend=cpustate->r[cpustate->is];
- UINT8 tmp=augend+addend;
+ UINT8 augend=cpustate->a;
+ ROMC_1C(cpustate, cS);
+ UINT8 addend=cpustate->r[cpustate->is];
+ UINT8 tmp=augend+addend;
+
+ UINT8 c=0;
+ UINT8 ic=0;
+ if(((augend+addend)&0xff0)>0xf0)
+ c=1;
+ if((augend&0x0f)+(addend&0x0f)>0x0F)
+ ic=1;
- UINT8 c=0;
- UINT8 ic=0;
- if(((augend+addend)&0xff0)>0xf0)
- c=1;
- if((augend&0x0f)+(addend&0x0f)>0x0F)
- ic=1;
-
- CLR_OZCS;
- SET_OC(augend,addend);
- SET_SZ(tmp);
+ CLR_OZCS;
+ SET_OC(augend,addend);
+ SET_SZ(tmp);
- if(c==0&&ic==0)
- tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
- if(c==0&&ic==1)
- tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
- if(c==1&&ic==0)
- tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==0)
+ tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==1)
+ tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
+ if(c==1&&ic==0)
+ tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
- cpustate->a = tmp;
+ cpustate->a = tmp;
}
/***************************************************
@@ -1455,31 +1455,31 @@ static void f8_asd_isar(f8_Regs *cpustate)
static void f8_asd_isar_i(f8_Regs *cpustate)
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=cpustate->a;
- ROMC_1C(cpustate, cS);
- UINT8 addend=cpustate->r[cpustate->is];
- UINT8 tmp=augend+addend;
+ UINT8 augend=cpustate->a;
+ ROMC_1C(cpustate, cS);
+ UINT8 addend=cpustate->r[cpustate->is];
+ UINT8 tmp=augend+addend;
+
+ UINT8 c=0;
+ UINT8 ic=0;
+ if(((augend+addend)&0xff0)>0xf0)
+ c=1;
+ if((augend&0x0f)+(addend&0x0f)>0x0F)
+ ic=1;
- UINT8 c=0;
- UINT8 ic=0;
- if(((augend+addend)&0xff0)>0xf0)
- c=1;
- if((augend&0x0f)+(addend&0x0f)>0x0F)
- ic=1;
-
- CLR_OZCS;
- SET_OC(augend,addend);
- SET_SZ(tmp);
+ CLR_OZCS;
+ SET_OC(augend,addend);
+ SET_SZ(tmp);
- if(c==0&&ic==0)
- tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
- if(c==0&&ic==1)
- tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
- if(c==1&&ic==0)
- tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==0)
+ tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==1)
+ tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
+ if(c==1&&ic==0)
+ tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
- cpustate->a = tmp;
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
+ cpustate->a = tmp;
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is + 1) & 0x07);
}
/***************************************************
@@ -1489,31 +1489,31 @@ static void f8_asd_isar_i(f8_Regs *cpustate)
static void f8_asd_isar_d(f8_Regs *cpustate)
{
/*SKR from F8 Guide To programming description of AMD */
- UINT8 augend=cpustate->a;
- ROMC_1C(cpustate, cS);
- UINT8 addend=cpustate->r[cpustate->is];
- UINT8 tmp=augend+addend;
+ UINT8 augend=cpustate->a;
+ ROMC_1C(cpustate, cS);
+ UINT8 addend=cpustate->r[cpustate->is];
+ UINT8 tmp=augend+addend;
+
+ UINT8 c=0;
+ UINT8 ic=0;
+ if(((augend+addend)&0xff0)>0xf0)
+ c=1;
+ if((augend&0x0f)+(addend&0x0f)>0x0F)
+ ic=1;
- UINT8 c=0;
- UINT8 ic=0;
- if(((augend+addend)&0xff0)>0xf0)
- c=1;
- if((augend&0x0f)+(addend&0x0f)>0x0F)
- ic=1;
-
- CLR_OZCS;
- SET_OC(augend,addend);
- SET_SZ(tmp);
+ CLR_OZCS;
+ SET_OC(augend,addend);
+ SET_SZ(tmp);
- if(c==0&&ic==0)
- tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
- if(c==0&&ic==1)
- tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
- if(c==1&&ic==0)
- tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==0)
+ tmp=((tmp+0xa0)&0xf0)+((tmp+0x0a)&0x0f);
+ if(c==0&&ic==1)
+ tmp=((tmp+0xa0)&0xf0)+(tmp&0x0f);
+ if(c==1&&ic==0)
+ tmp=(tmp&0xf0)+((tmp+0x0a)&0x0f);
- cpustate->a = tmp;
- cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
+ cpustate->a = tmp;
+ cpustate->is = (cpustate->is & 0x38) | ((cpustate->is - 1) & 0x07);
}
/***************************************************
@@ -1630,21 +1630,21 @@ static CPU_RESET( f8 )
ROMC_00(cpustate, cS);
/* initialize the timer shift register
- * this is an 8 bit polynome counter which can be loaded parallel
- * with 0xff the outputs never change and thus the timer is disabled.
- * with 0xfe the shifter starts cycling through 255 states until it
- * reaches 0xfe again (and then issues an interrupt).
- * the counter output values are not sequential, but go like this:
- * 0xfe, 0xfd, 0xfb, 0xf7, 0xee, 0xdc ... etc. :-)
- * We have to build a lookup table to tell how many cycles a write
-
- */
- data = 0xfe; /* initial value */
+ * this is an 8 bit polynome counter which can be loaded parallel
+ * with 0xff the outputs never change and thus the timer is disabled.
+ * with 0xfe the shifter starts cycling through 255 states until it
+ * reaches 0xfe again (and then issues an interrupt).
+ * the counter output values are not sequential, but go like this:
+ * 0xfe, 0xfd, 0xfb, 0xf7, 0xee, 0xdc ... etc. :-)
+ * We have to build a lookup table to tell how many cycles a write
+
+ */
+ data = 0xfe; /* initial value */
for (i = 0; i < 256; i++)
{
timer_shifter[i] = data;
if ( (((data >> 3) ^ (data >> 4)) ^
- ((data >> 5) ^ (data >> 7))) & 1 )
+ ((data >> 5) ^ (data >> 7))) & 1 )
data <<= 1;
else
data = (data << 1) | 1;
@@ -1654,310 +1654,310 @@ static CPU_RESET( f8 )
/* Execute cycles - returns number of cycles actually run */
static CPU_EXECUTE( f8 )
{
- f8_Regs *cpustate = get_safe_token(device);
+ f8_Regs *cpustate = get_safe_token(device);
- do
- {
+ do
+ {
UINT8 op=cpustate->dbus;
- debugger_instruction_hook(device, (cpustate->pc0 - 1) & 0xffff);
+ debugger_instruction_hook(device, (cpustate->pc0 - 1) & 0xffff);
switch( op )
- {
+ {
/* opcode bitmask */
- case 0x00: /* 0000 0000 */ f8_lr_a_ku(cpustate); break;
- case 0x01: /* 0000 0001 */ f8_lr_a_kl(cpustate); break;
- case 0x02: /* 0000 0010 */ f8_lr_a_qu(cpustate); break;
- case 0x03: /* 0000 0011 */ f8_lr_a_ql(cpustate); break;
- case 0x04: /* 0000 0100 */ f8_lr_ku_a(cpustate); break;
- case 0x05: /* 0000 0101 */ f8_lr_kl_a(cpustate); break;
- case 0x06: /* 0000 0110 */ f8_lr_qu_a(cpustate); break;
- case 0x07: /* 0000 0111 */ f8_lr_ql_a(cpustate); break;
- case 0x08: /* 0000 1000 */ f8_lr_k_p(cpustate); break;
- case 0x09: /* 0000 1001 */ f8_lr_p_k(cpustate); break;
- case 0x0a: /* 0000 1010 */ f8_lr_a_is(cpustate); break;
- case 0x0b: /* 0000 1011 */ f8_lr_is_a(cpustate); break;
- case 0x0c: /* 0000 1100 */ f8_pk(cpustate); break;
- case 0x0d: /* 0000 1101 */ f8_lr_p0_q(cpustate); break;
- case 0x0e: /* 0000 1110 */ f8_lr_q_dc(cpustate); break;
- case 0x0f: /* 0000 1111 */ f8_lr_dc_q(cpustate); break;
-
- case 0x10: /* 0001 0000 */ f8_lr_dc_h(cpustate); break;
- case 0x11: /* 0001 0001 */ f8_lr_h_dc(cpustate); break;
- case 0x12: /* 0001 0010 */ f8_sr_1(cpustate); break;
- case 0x13: /* 0001 0011 */ f8_sl_1(cpustate); break;
- case 0x14: /* 0001 0100 */ f8_sr_4(cpustate); break;
- case 0x15: /* 0001 0101 */ f8_sl_4(cpustate); break;
- case 0x16: /* 0001 0110 */ f8_lm(cpustate); break;
- case 0x17: /* 0001 0111 */ f8_st(cpustate); break;
- case 0x18: /* 0001 1000 */ f8_com(cpustate); break;
- case 0x19: /* 0001 1001 */ f8_lnk(cpustate); break;
- case 0x1a: /* 0001 1010 */ f8_di(cpustate); break;
- case 0x1b: /* 0001 1011 */ f8_ei(cpustate); break;
- case 0x1c: /* 0001 1100 */ f8_pop(cpustate); break;
- case 0x1d: /* 0001 1101 */ f8_lr_w_j(cpustate); break;
- case 0x1e: /* 0001 1110 */ f8_lr_j_w(cpustate); break;
- case 0x1f: /* 0001 1111 */ f8_inc(cpustate); break;
-
- case 0x20: /* 0010 0000 */ f8_li(cpustate); break;
- case 0x21: /* 0010 0001 */ f8_ni(cpustate); break;
- case 0x22: /* 0010 0010 */ f8_oi(cpustate); break;
- case 0x23: /* 0010 0011 */ f8_xi(cpustate); break;
- case 0x24: /* 0010 0100 */ f8_ai(cpustate); break;
- case 0x25: /* 0010 0101 */ f8_ci(cpustate); break;
- case 0x26: /* 0010 0110 */ f8_in(cpustate); break;
- case 0x27: /* 0010 0111 */ f8_out(cpustate); break;
- case 0x28: /* 0010 1000 */ f8_pi(cpustate); break;
- case 0x29: /* 0010 1001 */ f8_jmp(cpustate); break;
- case 0x2a: /* 0010 1010 */ f8_dci(cpustate); break;
- case 0x2b: /* 0010 1011 */ f8_nop(cpustate); break;
- case 0x2c: /* 0010 1100 */ f8_xdc(cpustate); break;
- case 0x2d: /* 0010 1101 */ illegal(cpustate); break;
- case 0x2e: /* 0010 1110 */ illegal(cpustate); break;
- case 0x2f: /* 0010 1111 */ illegal(cpustate); break;
-
- case 0x30: /* 0011 0000 */ f8_ds_r(cpustate, 0); break;
- case 0x31: /* 0011 0001 */ f8_ds_r(cpustate, 1); break;
- case 0x32: /* 0011 0010 */ f8_ds_r(cpustate, 2); break;
- case 0x33: /* 0011 0011 */ f8_ds_r(cpustate, 3); break;
- case 0x34: /* 0011 0100 */ f8_ds_r(cpustate, 4); break;
- case 0x35: /* 0011 0101 */ f8_ds_r(cpustate, 5); break;
- case 0x36: /* 0011 0110 */ f8_ds_r(cpustate, 6); break;
- case 0x37: /* 0011 0111 */ f8_ds_r(cpustate, 7); break;
- case 0x38: /* 0011 1000 */ f8_ds_r(cpustate, 8); break;
- case 0x39: /* 0011 1001 */ f8_ds_r(cpustate, 9); break;
- case 0x3a: /* 0011 1010 */ f8_ds_r(cpustate, 10); break;
- case 0x3b: /* 0011 1011 */ f8_ds_r(cpustate, 11); break;
- case 0x3c: /* 0011 1100 */ f8_ds_isar(cpustate); break;
- case 0x3d: /* 0011 1101 */ f8_ds_isar_i(cpustate); break;
- case 0x3e: /* 0011 1110 */ f8_ds_isar_d(cpustate); break;
- case 0x3f: /* 0011 1111 */ illegal(cpustate); break;
-
- case 0x40: /* 0100 0000 */ f8_lr_a_r(cpustate, 0); break;
- case 0x41: /* 0100 0001 */ f8_lr_a_r(cpustate, 1); break;
- case 0x42: /* 0100 0010 */ f8_lr_a_r(cpustate, 2); break;
- case 0x43: /* 0100 0011 */ f8_lr_a_r(cpustate, 3); break;
- case 0x44: /* 0100 0100 */ f8_lr_a_r(cpustate, 4); break;
- case 0x45: /* 0100 0101 */ f8_lr_a_r(cpustate, 5); break;
- case 0x46: /* 0100 0110 */ f8_lr_a_r(cpustate, 6); break;
- case 0x47: /* 0100 0111 */ f8_lr_a_r(cpustate, 7); break;
- case 0x48: /* 0100 1000 */ f8_lr_a_r(cpustate, 8); break;
- case 0x49: /* 0100 1001 */ f8_lr_a_r(cpustate, 9); break;
- case 0x4a: /* 0100 1010 */ f8_lr_a_r(cpustate, 10); break;
- case 0x4b: /* 0100 1011 */ f8_lr_a_r(cpustate, 11); break;
- case 0x4c: /* 0100 1100 */ f8_lr_a_isar(cpustate); break;
- case 0x4d: /* 0100 1101 */ f8_lr_a_isar_i(cpustate); break;
- case 0x4e: /* 0100 1110 */ f8_lr_a_isar_d(cpustate); break;
- case 0x4f: /* 0100 1111 */ illegal(cpustate); break;
-
- case 0x50: /* 0101 0000 */ f8_lr_r_a(cpustate, 0); break;
- case 0x51: /* 0101 0001 */ f8_lr_r_a(cpustate, 1); break;
- case 0x52: /* 0101 0010 */ f8_lr_r_a(cpustate, 2); break;
- case 0x53: /* 0101 0011 */ f8_lr_r_a(cpustate, 3); break;
- case 0x54: /* 0101 0100 */ f8_lr_r_a(cpustate, 4); break;
- case 0x55: /* 0101 0101 */ f8_lr_r_a(cpustate, 5); break;
- case 0x56: /* 0101 0110 */ f8_lr_r_a(cpustate, 6); break;
- case 0x57: /* 0101 0111 */ f8_lr_r_a(cpustate, 7); break;
- case 0x58: /* 0101 1000 */ f8_lr_r_a(cpustate, 8); break;
- case 0x59: /* 0101 1001 */ f8_lr_r_a(cpustate, 9); break;
- case 0x5a: /* 0101 1010 */ f8_lr_r_a(cpustate, 10); break;
- case 0x5b: /* 0101 1011 */ f8_lr_r_a(cpustate, 11); break;
- case 0x5c: /* 0101 1100 */ f8_lr_isar_a(cpustate); break;
- case 0x5d: /* 0101 1101 */ f8_lr_isar_i_a(cpustate); break;
- case 0x5e: /* 0101 1110 */ f8_lr_isar_d_a(cpustate); break;
- case 0x5f: /* 0101 1111 */ illegal(cpustate); break;
-
- case 0x60: /* 0110 0000 */ f8_lisu(cpustate, 0x00); break;
- case 0x61: /* 0110 0001 */ f8_lisu(cpustate, 0x08); break;
- case 0x62: /* 0110 0010 */ f8_lisu(cpustate, 0x10); break;
- case 0x63: /* 0110 0011 */ f8_lisu(cpustate, 0x18); break;
- case 0x64: /* 0110 0100 */ f8_lisu(cpustate, 0x20); break;
- case 0x65: /* 0110 0101 */ f8_lisu(cpustate, 0x28); break;
- case 0x66: /* 0110 0110 */ f8_lisu(cpustate, 0x30); break;
- case 0x67: /* 0110 0111 */ f8_lisu(cpustate, 0x38); break;
- case 0x68: /* 0110 1000 */ f8_lisl(cpustate, 0x00); break;
- case 0x69: /* 0110 1001 */ f8_lisl(cpustate, 0x01); break;
- case 0x6a: /* 0110 1010 */ f8_lisl(cpustate, 0x02); break;
- case 0x6b: /* 0110 1011 */ f8_lisl(cpustate, 0x03); break;
- case 0x6c: /* 0110 1100 */ f8_lisl(cpustate, 0x04); break;
- case 0x6d: /* 0110 1101 */ f8_lisl(cpustate, 0x05); break;
- case 0x6e: /* 0110 1110 */ f8_lisl(cpustate, 0x06); break;
- case 0x6f: /* 0110 1111 */ f8_lisl(cpustate, 0x07); break;
-
- case 0x70: /* 0111 0000 */ f8_lis(cpustate, 0x0); break;
- case 0x71: /* 0111 0001 */ f8_lis(cpustate, 0x1); break;
- case 0x72: /* 0111 0010 */ f8_lis(cpustate, 0x2); break;
- case 0x73: /* 0111 0011 */ f8_lis(cpustate, 0x3); break;
- case 0x74: /* 0111 0100 */ f8_lis(cpustate, 0x4); break;
- case 0x75: /* 0111 0101 */ f8_lis(cpustate, 0x5); break;
- case 0x76: /* 0111 0110 */ f8_lis(cpustate, 0x6); break;
- case 0x77: /* 0111 0111 */ f8_lis(cpustate, 0x7); break;
- case 0x78: /* 0111 1000 */ f8_lis(cpustate, 0x8); break;
- case 0x79: /* 0111 1001 */ f8_lis(cpustate, 0x9); break;
- case 0x7a: /* 0111 1010 */ f8_lis(cpustate, 0xa); break;
- case 0x7b: /* 0111 1011 */ f8_lis(cpustate, 0xb); break;
- case 0x7c: /* 0111 1100 */ f8_lis(cpustate, 0xc); break;
- case 0x7d: /* 0111 1101 */ f8_lis(cpustate, 0xd); break;
- case 0x7e: /* 0111 1110 */ f8_lis(cpustate, 0xe); break;
- case 0x7f: /* 0111 1111 */ f8_lis(cpustate, 0xf); break;
-
- case 0x80: /* 1000 0000 */ f8_bt(cpustate, 0); break;
- case 0x81: /* 1000 0001 */ f8_bt(cpustate, 1); break;
- case 0x82: /* 1000 0010 */ f8_bt(cpustate, 2); break;
- case 0x83: /* 1000 0011 */ f8_bt(cpustate, 3); break;
- case 0x84: /* 1000 0100 */ f8_bt(cpustate, 4); break;
- case 0x85: /* 1000 0101 */ f8_bt(cpustate, 5); break;
- case 0x86: /* 1000 0110 */ f8_bt(cpustate, 6); break;
- case 0x87: /* 1000 0111 */ f8_bt(cpustate, 7); break;
- case 0x88: /* 1000 1000 */ f8_am(cpustate); break;
- case 0x89: /* 1000 1001 */ f8_amd(cpustate); break;
- case 0x8a: /* 1000 1010 */ f8_nm(cpustate); break;
- case 0x8b: /* 1000 1011 */ f8_om(cpustate); break;
- case 0x8c: /* 1000 1100 */ f8_xm(cpustate); break;
- case 0x8d: /* 1000 1101 */ f8_cm(cpustate); break;
- case 0x8e: /* 1000 1110 */ f8_adc(cpustate); break;
- case 0x8f: /* 1000 1111 */ f8_br7(cpustate); break;
-
- case 0x90: /* 1001 0000 */ f8_bf(cpustate, 0x0); break;
- case 0x91: /* 1001 0001 */ f8_bf(cpustate, 0x1); break;
- case 0x92: /* 1001 0010 */ f8_bf(cpustate, 0x2); break;
- case 0x93: /* 1001 0011 */ f8_bf(cpustate, 0x3); break;
- case 0x94: /* 1001 0100 */ f8_bf(cpustate, 0x4); break;
- case 0x95: /* 1001 0101 */ f8_bf(cpustate, 0x5); break;
- case 0x96: /* 1001 0110 */ f8_bf(cpustate, 0x6); break;
- case 0x97: /* 1001 0111 */ f8_bf(cpustate, 0x7); break;
- case 0x98: /* 1001 1000 */ f8_bf(cpustate, 0x8); break;
- case 0x99: /* 1001 1001 */ f8_bf(cpustate, 0x9); break;
- case 0x9a: /* 1001 1010 */ f8_bf(cpustate, 0xa); break;
- case 0x9b: /* 1001 1011 */ f8_bf(cpustate, 0xb); break;
- case 0x9c: /* 1001 1100 */ f8_bf(cpustate, 0xc); break;
- case 0x9d: /* 1001 1101 */ f8_bf(cpustate, 0xd); break;
- case 0x9e: /* 1001 1110 */ f8_bf(cpustate, 0xe); break;
- case 0x9f: /* 1001 1111 */ f8_bf(cpustate, 0xf); break;
-
- case 0xa0: /* 1010 0000 */ f8_ins_0(cpustate, 0x0); break;
- case 0xa1: /* 1010 0001 */ f8_ins_0(cpustate, 0x1); break;
- case 0xa2: /* 1010 0010 */ illegal(cpustate); break;
- case 0xa3: /* 1010 0011 */ illegal(cpustate); break;
- case 0xa4: /* 1010 0100 */ f8_ins_1(cpustate, 0x4); break;
- case 0xa5: /* 1010 0101 */ f8_ins_1(cpustate, 0x5); break;
- case 0xa6: /* 1010 0110 */ f8_ins_1(cpustate, 0x6); break;
- case 0xa7: /* 1010 0111 */ f8_ins_1(cpustate, 0x7); break;
- case 0xa8: /* 1010 1000 */ f8_ins_1(cpustate, 0x8); break;
- case 0xa9: /* 1010 1001 */ f8_ins_1(cpustate, 0x9); break;
- case 0xaa: /* 1010 1010 */ f8_ins_1(cpustate, 0xa); break;
- case 0xab: /* 1010 1011 */ f8_ins_1(cpustate, 0xb); break;
- case 0xac: /* 1010 1100 */ f8_ins_1(cpustate, 0xc); break;
- case 0xad: /* 1010 1101 */ f8_ins_1(cpustate, 0xd); break;
- case 0xae: /* 1010 1110 */ f8_ins_1(cpustate, 0xe); break;
- case 0xaf: /* 1010 1111 */ f8_ins_1(cpustate, 0xf); break;
-
- case 0xb0: /* 1011 0000 */ f8_outs_0(cpustate, 0x0); break;
- case 0xb1: /* 1011 0001 */ f8_outs_0(cpustate, 0x1); break;
- case 0xb2: /* 1011 0010 */ illegal(cpustate); break;
- case 0xb3: /* 1011 0011 */ illegal(cpustate); break;
- case 0xb4: /* 1011 0100 */ f8_outs_1(cpustate, 0x4); break;
- case 0xb5: /* 1011 0101 */ f8_outs_1(cpustate, 0x5); break;
- case 0xb6: /* 1011 0110 */ f8_outs_1(cpustate, 0x6); break;
- case 0xb7: /* 1011 0111 */ f8_outs_1(cpustate, 0x7); break;
- case 0xb8: /* 1011 1000 */ f8_outs_1(cpustate, 0x8); break;
- case 0xb9: /* 1011 1001 */ f8_outs_1(cpustate, 0x9); break;
- case 0xba: /* 1011 1010 */ f8_outs_1(cpustate, 0xa); break;
- case 0xbb: /* 1011 1011 */ f8_outs_1(cpustate, 0xb); break;
- case 0xbc: /* 1011 1100 */ f8_outs_1(cpustate, 0xc); break;
- case 0xbd: /* 1011 1101 */ f8_outs_1(cpustate, 0xd); break;
- case 0xbe: /* 1011 1110 */ f8_outs_1(cpustate, 0xe); break;
- case 0xbf: /* 1011 1111 */ f8_outs_1(cpustate, 0xf); break;
-
- case 0xc0: /* 1100 0000 */ f8_as(cpustate, 0x0); break;
- case 0xc1: /* 1100 0001 */ f8_as(cpustate, 0x1); break;
- case 0xc2: /* 1100 0010 */ f8_as(cpustate, 0x2); break;
- case 0xc3: /* 1100 0011 */ f8_as(cpustate, 0x3); break;
- case 0xc4: /* 1100 0100 */ f8_as(cpustate, 0x4); break;
- case 0xc5: /* 1100 0101 */ f8_as(cpustate, 0x5); break;
- case 0xc6: /* 1100 0110 */ f8_as(cpustate, 0x6); break;
- case 0xc7: /* 1100 0111 */ f8_as(cpustate, 0x7); break;
- case 0xc8: /* 1100 1000 */ f8_as(cpustate, 0x8); break;
- case 0xc9: /* 1100 1001 */ f8_as(cpustate, 0x9); break;
- case 0xca: /* 1100 1010 */ f8_as(cpustate, 0xa); break;
- case 0xcb: /* 1100 1011 */ f8_as(cpustate, 0xb); break;
- case 0xcc: /* 1100 1100 */ f8_as_isar(cpustate); break;
- case 0xcd: /* 1100 1101 */ f8_as_isar_i(cpustate); break;
- case 0xce: /* 1100 1110 */ f8_as_isar_d(cpustate); break;
- case 0xcf: /* 1100 1111 */ illegal(cpustate); break;
-
- case 0xd0: /* 1101 0000 */ f8_asd(cpustate, 0x0); break;
- case 0xd1: /* 1101 0001 */ f8_asd(cpustate, 0x1); break;
- case 0xd2: /* 1101 0010 */ f8_asd(cpustate, 0x2); break;
- case 0xd3: /* 1101 0011 */ f8_asd(cpustate, 0x3); break;
- case 0xd4: /* 1101 0100 */ f8_asd(cpustate, 0x4); break;
- case 0xd5: /* 1101 0101 */ f8_asd(cpustate, 0x5); break;
- case 0xd6: /* 1101 0110 */ f8_asd(cpustate, 0x6); break;
- case 0xd7: /* 1101 0111 */ f8_asd(cpustate, 0x7); break;
- case 0xd8: /* 1101 1000 */ f8_asd(cpustate, 0x8); break;
- case 0xd9: /* 1101 1001 */ f8_asd(cpustate, 0x9); break;
- case 0xda: /* 1101 1010 */ f8_asd(cpustate, 0xa); break;
- case 0xdb: /* 1101 1011 */ f8_asd(cpustate, 0xb); break;
- case 0xdc: /* 1101 1100 */ f8_asd_isar(cpustate); break;
- case 0xdd: /* 1101 1101 */ f8_asd_isar_i(cpustate); break;
- case 0xde: /* 1101 1110 */ f8_asd_isar_d(cpustate); break;
- case 0xdf: /* 1101 1111 */ illegal(cpustate); break;
-
- case 0xe0: /* 1110 0000 */ f8_xs(cpustate, 0x0); break;
- case 0xe1: /* 1110 0001 */ f8_xs(cpustate, 0x1); break;
- case 0xe2: /* 1110 0010 */ f8_xs(cpustate, 0x2); break;
- case 0xe3: /* 1110 0011 */ f8_xs(cpustate, 0x3); break;
- case 0xe4: /* 1110 0100 */ f8_xs(cpustate, 0x4); break;
- case 0xe5: /* 1110 0101 */ f8_xs(cpustate, 0x5); break;
- case 0xe6: /* 1110 0110 */ f8_xs(cpustate, 0x6); break;
- case 0xe7: /* 1110 0111 */ f8_xs(cpustate, 0x7); break;
- case 0xe8: /* 1110 1000 */ f8_xs(cpustate, 0x8); break;
- case 0xe9: /* 1110 1001 */ f8_xs(cpustate, 0x9); break;
- case 0xea: /* 1110 1010 */ f8_xs(cpustate, 0xa); break;
- case 0xeb: /* 1110 1011 */ f8_xs(cpustate, 0xb); break;
- case 0xec: /* 1110 1100 */ f8_xs_isar(cpustate); break;
- case 0xed: /* 1110 1101 */ f8_xs_isar_i(cpustate); break;
- case 0xee: /* 1110 1110 */ f8_xs_isar_d(cpustate); break;
- case 0xef: /* 1110 1111 */ illegal(cpustate); break;
-
- case 0xf0: /* 1111 0000 */ f8_ns(cpustate, 0x0); break;
- case 0xf1: /* 1111 0001 */ f8_ns(cpustate, 0x1); break;
- case 0xf2: /* 1111 0010 */ f8_ns(cpustate, 0x2); break;
- case 0xf3: /* 1111 0011 */ f8_ns(cpustate, 0x3); break;
- case 0xf4: /* 1111 0100 */ f8_ns(cpustate, 0x4); break;
- case 0xf5: /* 1111 0101 */ f8_ns(cpustate, 0x5); break;
- case 0xf6: /* 1111 0110 */ f8_ns(cpustate, 0x6); break;
- case 0xf7: /* 1111 0111 */ f8_ns(cpustate, 0x7); break;
- case 0xf8: /* 1111 1000 */ f8_ns(cpustate, 0x8); break;
- case 0xf9: /* 1111 1001 */ f8_ns(cpustate, 0x9); break;
- case 0xfa: /* 1111 1010 */ f8_ns(cpustate, 0xa); break;
- case 0xfb: /* 1111 1011 */ f8_ns(cpustate, 0xb); break;
- case 0xfc: /* 1111 1100 */ f8_ns_isar(cpustate); break;
- case 0xfd: /* 1111 1101 */ f8_ns_isar_i(cpustate); break;
- case 0xfe: /* 1111 1110 */ f8_ns_isar_d(cpustate); break;
- case 0xff: /* 1111 1111 */ illegal(cpustate); break;
- }
+ case 0x00: /* 0000 0000 */ f8_lr_a_ku(cpustate); break;
+ case 0x01: /* 0000 0001 */ f8_lr_a_kl(cpustate); break;
+ case 0x02: /* 0000 0010 */ f8_lr_a_qu(cpustate); break;
+ case 0x03: /* 0000 0011 */ f8_lr_a_ql(cpustate); break;
+ case 0x04: /* 0000 0100 */ f8_lr_ku_a(cpustate); break;
+ case 0x05: /* 0000 0101 */ f8_lr_kl_a(cpustate); break;
+ case 0x06: /* 0000 0110 */ f8_lr_qu_a(cpustate); break;
+ case 0x07: /* 0000 0111 */ f8_lr_ql_a(cpustate); break;
+ case 0x08: /* 0000 1000 */ f8_lr_k_p(cpustate); break;
+ case 0x09: /* 0000 1001 */ f8_lr_p_k(cpustate); break;
+ case 0x0a: /* 0000 1010 */ f8_lr_a_is(cpustate); break;
+ case 0x0b: /* 0000 1011 */ f8_lr_is_a(cpustate); break;
+ case 0x0c: /* 0000 1100 */ f8_pk(cpustate); break;
+ case 0x0d: /* 0000 1101 */ f8_lr_p0_q(cpustate); break;
+ case 0x0e: /* 0000 1110 */ f8_lr_q_dc(cpustate); break;
+ case 0x0f: /* 0000 1111 */ f8_lr_dc_q(cpustate); break;
+
+ case 0x10: /* 0001 0000 */ f8_lr_dc_h(cpustate); break;
+ case 0x11: /* 0001 0001 */ f8_lr_h_dc(cpustate); break;
+ case 0x12: /* 0001 0010 */ f8_sr_1(cpustate); break;
+ case 0x13: /* 0001 0011 */ f8_sl_1(cpustate); break;
+ case 0x14: /* 0001 0100 */ f8_sr_4(cpustate); break;
+ case 0x15: /* 0001 0101 */ f8_sl_4(cpustate); break;
+ case 0x16: /* 0001 0110 */ f8_lm(cpustate); break;
+ case 0x17: /* 0001 0111 */ f8_st(cpustate); break;
+ case 0x18: /* 0001 1000 */ f8_com(cpustate); break;
+ case 0x19: /* 0001 1001 */ f8_lnk(cpustate); break;
+ case 0x1a: /* 0001 1010 */ f8_di(cpustate); break;
+ case 0x1b: /* 0001 1011 */ f8_ei(cpustate); break;
+ case 0x1c: /* 0001 1100 */ f8_pop(cpustate); break;
+ case 0x1d: /* 0001 1101 */ f8_lr_w_j(cpustate); break;
+ case 0x1e: /* 0001 1110 */ f8_lr_j_w(cpustate); break;
+ case 0x1f: /* 0001 1111 */ f8_inc(cpustate); break;
+
+ case 0x20: /* 0010 0000 */ f8_li(cpustate); break;
+ case 0x21: /* 0010 0001 */ f8_ni(cpustate); break;
+ case 0x22: /* 0010 0010 */ f8_oi(cpustate); break;
+ case 0x23: /* 0010 0011 */ f8_xi(cpustate); break;
+ case 0x24: /* 0010 0100 */ f8_ai(cpustate); break;
+ case 0x25: /* 0010 0101 */ f8_ci(cpustate); break;
+ case 0x26: /* 0010 0110 */ f8_in(cpustate); break;
+ case 0x27: /* 0010 0111 */ f8_out(cpustate); break;
+ case 0x28: /* 0010 1000 */ f8_pi(cpustate); break;
+ case 0x29: /* 0010 1001 */ f8_jmp(cpustate); break;
+ case 0x2a: /* 0010 1010 */ f8_dci(cpustate); break;
+ case 0x2b: /* 0010 1011 */ f8_nop(cpustate); break;
+ case 0x2c: /* 0010 1100 */ f8_xdc(cpustate); break;
+ case 0x2d: /* 0010 1101 */ illegal(cpustate); break;
+ case 0x2e: /* 0010 1110 */ illegal(cpustate); break;
+ case 0x2f: /* 0010 1111 */ illegal(cpustate); break;
+
+ case 0x30: /* 0011 0000 */ f8_ds_r(cpustate, 0); break;
+ case 0x31: /* 0011 0001 */ f8_ds_r(cpustate, 1); break;
+ case 0x32: /* 0011 0010 */ f8_ds_r(cpustate, 2); break;
+ case 0x33: /* 0011 0011 */ f8_ds_r(cpustate, 3); break;
+ case 0x34: /* 0011 0100 */ f8_ds_r(cpustate, 4); break;
+ case 0x35: /* 0011 0101 */ f8_ds_r(cpustate, 5); break;
+ case 0x36: /* 0011 0110 */ f8_ds_r(cpustate, 6); break;
+ case 0x37: /* 0011 0111 */ f8_ds_r(cpustate, 7); break;
+ case 0x38: /* 0011 1000 */ f8_ds_r(cpustate, 8); break;
+ case 0x39: /* 0011 1001 */ f8_ds_r(cpustate, 9); break;
+ case 0x3a: /* 0011 1010 */ f8_ds_r(cpustate, 10); break;
+ case 0x3b: /* 0011 1011 */ f8_ds_r(cpustate, 11); break;
+ case 0x3c: /* 0011 1100 */ f8_ds_isar(cpustate); break;
+ case 0x3d: /* 0011 1101 */ f8_ds_isar_i(cpustate); break;
+ case 0x3e: /* 0011 1110 */ f8_ds_isar_d(cpustate); break;
+ case 0x3f: /* 0011 1111 */ illegal(cpustate); break;
+
+ case 0x40: /* 0100 0000 */ f8_lr_a_r(cpustate, 0); break;
+ case 0x41: /* 0100 0001 */ f8_lr_a_r(cpustate, 1); break;
+ case 0x42: /* 0100 0010 */ f8_lr_a_r(cpustate, 2); break;
+ case 0x43: /* 0100 0011 */ f8_lr_a_r(cpustate, 3); break;
+ case 0x44: /* 0100 0100 */ f8_lr_a_r(cpustate, 4); break;
+ case 0x45: /* 0100 0101 */ f8_lr_a_r(cpustate, 5); break;
+ case 0x46: /* 0100 0110 */ f8_lr_a_r(cpustate, 6); break;
+ case 0x47: /* 0100 0111 */ f8_lr_a_r(cpustate, 7); break;
+ case 0x48: /* 0100 1000 */ f8_lr_a_r(cpustate, 8); break;
+ case 0x49: /* 0100 1001 */ f8_lr_a_r(cpustate, 9); break;
+ case 0x4a: /* 0100 1010 */ f8_lr_a_r(cpustate, 10); break;
+ case 0x4b: /* 0100 1011 */ f8_lr_a_r(cpustate, 11); break;
+ case 0x4c: /* 0100 1100 */ f8_lr_a_isar(cpustate); break;
+ case 0x4d: /* 0100 1101 */ f8_lr_a_isar_i(cpustate); break;
+ case 0x4e: /* 0100 1110 */ f8_lr_a_isar_d(cpustate); break;
+ case 0x4f: /* 0100 1111 */ illegal(cpustate); break;
+
+ case 0x50: /* 0101 0000 */ f8_lr_r_a(cpustate, 0); break;
+ case 0x51: /* 0101 0001 */ f8_lr_r_a(cpustate, 1); break;
+ case 0x52: /* 0101 0010 */ f8_lr_r_a(cpustate, 2); break;
+ case 0x53: /* 0101 0011 */ f8_lr_r_a(cpustate, 3); break;
+ case 0x54: /* 0101 0100 */ f8_lr_r_a(cpustate, 4); break;
+ case 0x55: /* 0101 0101 */ f8_lr_r_a(cpustate, 5); break;
+ case 0x56: /* 0101 0110 */ f8_lr_r_a(cpustate, 6); break;
+ case 0x57: /* 0101 0111 */ f8_lr_r_a(cpustate, 7); break;
+ case 0x58: /* 0101 1000 */ f8_lr_r_a(cpustate, 8); break;
+ case 0x59: /* 0101 1001 */ f8_lr_r_a(cpustate, 9); break;
+ case 0x5a: /* 0101 1010 */ f8_lr_r_a(cpustate, 10); break;
+ case 0x5b: /* 0101 1011 */ f8_lr_r_a(cpustate, 11); break;
+ case 0x5c: /* 0101 1100 */ f8_lr_isar_a(cpustate); break;
+ case 0x5d: /* 0101 1101 */ f8_lr_isar_i_a(cpustate); break;
+ case 0x5e: /* 0101 1110 */ f8_lr_isar_d_a(cpustate); break;
+ case 0x5f: /* 0101 1111 */ illegal(cpustate); break;
+
+ case 0x60: /* 0110 0000 */ f8_lisu(cpustate, 0x00); break;
+ case 0x61: /* 0110 0001 */ f8_lisu(cpustate, 0x08); break;
+ case 0x62: /* 0110 0010 */ f8_lisu(cpustate, 0x10); break;
+ case 0x63: /* 0110 0011 */ f8_lisu(cpustate, 0x18); break;
+ case 0x64: /* 0110 0100 */ f8_lisu(cpustate, 0x20); break;
+ case 0x65: /* 0110 0101 */ f8_lisu(cpustate, 0x28); break;
+ case 0x66: /* 0110 0110 */ f8_lisu(cpustate, 0x30); break;
+ case 0x67: /* 0110 0111 */ f8_lisu(cpustate, 0x38); break;
+ case 0x68: /* 0110 1000 */ f8_lisl(cpustate, 0x00); break;
+ case 0x69: /* 0110 1001 */ f8_lisl(cpustate, 0x01); break;
+ case 0x6a: /* 0110 1010 */ f8_lisl(cpustate, 0x02); break;
+ case 0x6b: /* 0110 1011 */ f8_lisl(cpustate, 0x03); break;
+ case 0x6c: /* 0110 1100 */ f8_lisl(cpustate, 0x04); break;
+ case 0x6d: /* 0110 1101 */ f8_lisl(cpustate, 0x05); break;
+ case 0x6e: /* 0110 1110 */ f8_lisl(cpustate, 0x06); break;
+ case 0x6f: /* 0110 1111 */ f8_lisl(cpustate, 0x07); break;
+
+ case 0x70: /* 0111 0000 */ f8_lis(cpustate, 0x0); break;
+ case 0x71: /* 0111 0001 */ f8_lis(cpustate, 0x1); break;
+ case 0x72: /* 0111 0010 */ f8_lis(cpustate, 0x2); break;
+ case 0x73: /* 0111 0011 */ f8_lis(cpustate, 0x3); break;
+ case 0x74: /* 0111 0100 */ f8_lis(cpustate, 0x4); break;
+ case 0x75: /* 0111 0101 */ f8_lis(cpustate, 0x5); break;
+ case 0x76: /* 0111 0110 */ f8_lis(cpustate, 0x6); break;
+ case 0x77: /* 0111 0111 */ f8_lis(cpustate, 0x7); break;
+ case 0x78: /* 0111 1000 */ f8_lis(cpustate, 0x8); break;
+ case 0x79: /* 0111 1001 */ f8_lis(cpustate, 0x9); break;
+ case 0x7a: /* 0111 1010 */ f8_lis(cpustate, 0xa); break;
+ case 0x7b: /* 0111 1011 */ f8_lis(cpustate, 0xb); break;
+ case 0x7c: /* 0111 1100 */ f8_lis(cpustate, 0xc); break;
+ case 0x7d: /* 0111 1101 */ f8_lis(cpustate, 0xd); break;
+ case 0x7e: /* 0111 1110 */ f8_lis(cpustate, 0xe); break;
+ case 0x7f: /* 0111 1111 */ f8_lis(cpustate, 0xf); break;
+
+ case 0x80: /* 1000 0000 */ f8_bt(cpustate, 0); break;
+ case 0x81: /* 1000 0001 */ f8_bt(cpustate, 1); break;
+ case 0x82: /* 1000 0010 */ f8_bt(cpustate, 2); break;
+ case 0x83: /* 1000 0011 */ f8_bt(cpustate, 3); break;
+ case 0x84: /* 1000 0100 */ f8_bt(cpustate, 4); break;
+ case 0x85: /* 1000 0101 */ f8_bt(cpustate, 5); break;
+ case 0x86: /* 1000 0110 */ f8_bt(cpustate, 6); break;
+ case 0x87: /* 1000 0111 */ f8_bt(cpustate, 7); break;
+ case 0x88: /* 1000 1000 */ f8_am(cpustate); break;
+ case 0x89: /* 1000 1001 */ f8_amd(cpustate); break;
+ case 0x8a: /* 1000 1010 */ f8_nm(cpustate); break;
+ case 0x8b: /* 1000 1011 */ f8_om(cpustate); break;
+ case 0x8c: /* 1000 1100 */ f8_xm(cpustate); break;
+ case 0x8d: /* 1000 1101 */ f8_cm(cpustate); break;
+ case 0x8e: /* 1000 1110 */ f8_adc(cpustate); break;
+ case 0x8f: /* 1000 1111 */ f8_br7(cpustate); break;
+
+ case 0x90: /* 1001 0000 */ f8_bf(cpustate, 0x0); break;
+ case 0x91: /* 1001 0001 */ f8_bf(cpustate, 0x1); break;
+ case 0x92: /* 1001 0010 */ f8_bf(cpustate, 0x2); break;
+ case 0x93: /* 1001 0011 */ f8_bf(cpustate, 0x3); break;
+ case 0x94: /* 1001 0100 */ f8_bf(cpustate, 0x4); break;
+ case 0x95: /* 1001 0101 */ f8_bf(cpustate, 0x5); break;
+ case 0x96: /* 1001 0110 */ f8_bf(cpustate, 0x6); break;
+ case 0x97: /* 1001 0111 */ f8_bf(cpustate, 0x7); break;
+ case 0x98: /* 1001 1000 */ f8_bf(cpustate, 0x8); break;
+ case 0x99: /* 1001 1001 */ f8_bf(cpustate, 0x9); break;
+ case 0x9a: /* 1001 1010 */ f8_bf(cpustate, 0xa); break;
+ case 0x9b: /* 1001 1011 */ f8_bf(cpustate, 0xb); break;
+ case 0x9c: /* 1001 1100 */ f8_bf(cpustate, 0xc); break;
+ case 0x9d: /* 1001 1101 */ f8_bf(cpustate, 0xd); break;
+ case 0x9e: /* 1001 1110 */ f8_bf(cpustate, 0xe); break;
+ case 0x9f: /* 1001 1111 */ f8_bf(cpustate, 0xf); break;
+
+ case 0xa0: /* 1010 0000 */ f8_ins_0(cpustate, 0x0); break;
+ case 0xa1: /* 1010 0001 */ f8_ins_0(cpustate, 0x1); break;
+ case 0xa2: /* 1010 0010 */ illegal(cpustate); break;
+ case 0xa3: /* 1010 0011 */ illegal(cpustate); break;
+ case 0xa4: /* 1010 0100 */ f8_ins_1(cpustate, 0x4); break;
+ case 0xa5: /* 1010 0101 */ f8_ins_1(cpustate, 0x5); break;
+ case 0xa6: /* 1010 0110 */ f8_ins_1(cpustate, 0x6); break;
+ case 0xa7: /* 1010 0111 */ f8_ins_1(cpustate, 0x7); break;
+ case 0xa8: /* 1010 1000 */ f8_ins_1(cpustate, 0x8); break;
+ case 0xa9: /* 1010 1001 */ f8_ins_1(cpustate, 0x9); break;
+ case 0xaa: /* 1010 1010 */ f8_ins_1(cpustate, 0xa); break;
+ case 0xab: /* 1010 1011 */ f8_ins_1(cpustate, 0xb); break;
+ case 0xac: /* 1010 1100 */ f8_ins_1(cpustate, 0xc); break;
+ case 0xad: /* 1010 1101 */ f8_ins_1(cpustate, 0xd); break;
+ case 0xae: /* 1010 1110 */ f8_ins_1(cpustate, 0xe); break;
+ case 0xaf: /* 1010 1111 */ f8_ins_1(cpustate, 0xf); break;
+
+ case 0xb0: /* 1011 0000 */ f8_outs_0(cpustate, 0x0); break;
+ case 0xb1: /* 1011 0001 */ f8_outs_0(cpustate, 0x1); break;
+ case 0xb2: /* 1011 0010 */ illegal(cpustate); break;
+ case 0xb3: /* 1011 0011 */ illegal(cpustate); break;
+ case 0xb4: /* 1011 0100 */ f8_outs_1(cpustate, 0x4); break;
+ case 0xb5: /* 1011 0101 */ f8_outs_1(cpustate, 0x5); break;
+ case 0xb6: /* 1011 0110 */ f8_outs_1(cpustate, 0x6); break;
+ case 0xb7: /* 1011 0111 */ f8_outs_1(cpustate, 0x7); break;
+ case 0xb8: /* 1011 1000 */ f8_outs_1(cpustate, 0x8); break;
+ case 0xb9: /* 1011 1001 */ f8_outs_1(cpustate, 0x9); break;
+ case 0xba: /* 1011 1010 */ f8_outs_1(cpustate, 0xa); break;
+ case 0xbb: /* 1011 1011 */ f8_outs_1(cpustate, 0xb); break;
+ case 0xbc: /* 1011 1100 */ f8_outs_1(cpustate, 0xc); break;
+ case 0xbd: /* 1011 1101 */ f8_outs_1(cpustate, 0xd); break;
+ case 0xbe: /* 1011 1110 */ f8_outs_1(cpustate, 0xe); break;
+ case 0xbf: /* 1011 1111 */ f8_outs_1(cpustate, 0xf); break;
+
+ case 0xc0: /* 1100 0000 */ f8_as(cpustate, 0x0); break;
+ case 0xc1: /* 1100 0001 */ f8_as(cpustate, 0x1); break;
+ case 0xc2: /* 1100 0010 */ f8_as(cpustate, 0x2); break;
+ case 0xc3: /* 1100 0011 */ f8_as(cpustate, 0x3); break;
+ case 0xc4: /* 1100 0100 */ f8_as(cpustate, 0x4); break;
+ case 0xc5: /* 1100 0101 */ f8_as(cpustate, 0x5); break;
+ case 0xc6: /* 1100 0110 */ f8_as(cpustate, 0x6); break;
+ case 0xc7: /* 1100 0111 */ f8_as(cpustate, 0x7); break;
+ case 0xc8: /* 1100 1000 */ f8_as(cpustate, 0x8); break;
+ case 0xc9: /* 1100 1001 */ f8_as(cpustate, 0x9); break;
+ case 0xca: /* 1100 1010 */ f8_as(cpustate, 0xa); break;
+ case 0xcb: /* 1100 1011 */ f8_as(cpustate, 0xb); break;
+ case 0xcc: /* 1100 1100 */ f8_as_isar(cpustate); break;
+ case 0xcd: /* 1100 1101 */ f8_as_isar_i(cpustate); break;
+ case 0xce: /* 1100 1110 */ f8_as_isar_d(cpustate); break;
+ case 0xcf: /* 1100 1111 */ illegal(cpustate); break;
+
+ case 0xd0: /* 1101 0000 */ f8_asd(cpustate, 0x0); break;
+ case 0xd1: /* 1101 0001 */ f8_asd(cpustate, 0x1); break;
+ case 0xd2: /* 1101 0010 */ f8_asd(cpustate, 0x2); break;
+ case 0xd3: /* 1101 0011 */ f8_asd(cpustate, 0x3); break;
+ case 0xd4: /* 1101 0100 */ f8_asd(cpustate, 0x4); break;
+ case 0xd5: /* 1101 0101 */ f8_asd(cpustate, 0x5); break;
+ case 0xd6: /* 1101 0110 */ f8_asd(cpustate, 0x6); break;
+ case 0xd7: /* 1101 0111 */ f8_asd(cpustate, 0x7); break;
+ case 0xd8: /* 1101 1000 */ f8_asd(cpustate, 0x8); break;
+ case 0xd9: /* 1101 1001 */ f8_asd(cpustate, 0x9); break;
+ case 0xda: /* 1101 1010 */ f8_asd(cpustate, 0xa); break;
+ case 0xdb: /* 1101 1011 */ f8_asd(cpustate, 0xb); break;
+ case 0xdc: /* 1101 1100 */ f8_asd_isar(cpustate); break;
+ case 0xdd: /* 1101 1101 */ f8_asd_isar_i(cpustate); break;
+ case 0xde: /* 1101 1110 */ f8_asd_isar_d(cpustate); break;
+ case 0xdf: /* 1101 1111 */ illegal(cpustate); break;
+
+ case 0xe0: /* 1110 0000 */ f8_xs(cpustate, 0x0); break;
+ case 0xe1: /* 1110 0001 */ f8_xs(cpustate, 0x1); break;
+ case 0xe2: /* 1110 0010 */ f8_xs(cpustate, 0x2); break;
+ case 0xe3: /* 1110 0011 */ f8_xs(cpustate, 0x3); break;
+ case 0xe4: /* 1110 0100 */ f8_xs(cpustate, 0x4); break;
+ case 0xe5: /* 1110 0101 */ f8_xs(cpustate, 0x5); break;
+ case 0xe6: /* 1110 0110 */ f8_xs(cpustate, 0x6); break;
+ case 0xe7: /* 1110 0111 */ f8_xs(cpustate, 0x7); break;
+ case 0xe8: /* 1110 1000 */ f8_xs(cpustate, 0x8); break;
+ case 0xe9: /* 1110 1001 */ f8_xs(cpustate, 0x9); break;
+ case 0xea: /* 1110 1010 */ f8_xs(cpustate, 0xa); break;
+ case 0xeb: /* 1110 1011 */ f8_xs(cpustate, 0xb); break;
+ case 0xec: /* 1110 1100 */ f8_xs_isar(cpustate); break;
+ case 0xed: /* 1110 1101 */ f8_xs_isar_i(cpustate); break;
+ case 0xee: /* 1110 1110 */ f8_xs_isar_d(cpustate); break;
+ case 0xef: /* 1110 1111 */ illegal(cpustate); break;
+
+ case 0xf0: /* 1111 0000 */ f8_ns(cpustate, 0x0); break;
+ case 0xf1: /* 1111 0001 */ f8_ns(cpustate, 0x1); break;
+ case 0xf2: /* 1111 0010 */ f8_ns(cpustate, 0x2); break;
+ case 0xf3: /* 1111 0011 */ f8_ns(cpustate, 0x3); break;
+ case 0xf4: /* 1111 0100 */ f8_ns(cpustate, 0x4); break;
+ case 0xf5: /* 1111 0101 */ f8_ns(cpustate, 0x5); break;
+ case 0xf6: /* 1111 0110 */ f8_ns(cpustate, 0x6); break;
+ case 0xf7: /* 1111 0111 */ f8_ns(cpustate, 0x7); break;
+ case 0xf8: /* 1111 1000 */ f8_ns(cpustate, 0x8); break;
+ case 0xf9: /* 1111 1001 */ f8_ns(cpustate, 0x9); break;
+ case 0xfa: /* 1111 1010 */ f8_ns(cpustate, 0xa); break;
+ case 0xfb: /* 1111 1011 */ f8_ns(cpustate, 0xb); break;
+ case 0xfc: /* 1111 1100 */ f8_ns_isar(cpustate); break;
+ case 0xfd: /* 1111 1101 */ f8_ns_isar_i(cpustate); break;
+ case 0xfe: /* 1111 1110 */ f8_ns_isar_d(cpustate); break;
+ case 0xff: /* 1111 1111 */ illegal(cpustate); break;
+ }
switch (op) {
case 0x0d:case 0x1b:case 0x1c:case 0x1d:
case 0x27:case 0x28:case 0x29:
case 0xb4:case 0xb5:case 0xb6:case 0xb7:
case 0xb8:case 0xb9:case 0xba:case 0xbb:
case 0xbc:case 0xbd:case 0xbe:case 0xbf:
- ROMC_00(cpustate, cS);
- break;
+ ROMC_00(cpustate, cS);
+ break;
default:
- if (cpustate->w&I && cpustate->irq_request) {
+ if (cpustate->w&I && cpustate->irq_request) {
ROMC_1C(cpustate, cL);
ROMC_0F(cpustate);
ROMC_13(cpustate);
- }
- if((op>=0x30)&&(op<=0x3f)) /* SKR - DS is a long cycle inst */
- ROMC_00(cpustate, cL);
- else
- ROMC_00(cpustate, cS);
- break;
+ }
+ if((op>=0x30)&&(op<=0x3f)) /* SKR - DS is a long cycle inst */
+ ROMC_00(cpustate, cL);
+ else
+ ROMC_00(cpustate, cS);
+ break;
}
- } while( cpustate->icount > 0 );
+ } while( cpustate->icount > 0 );
}
CPU_DISASSEMBLE( f8 );
@@ -1991,26 +1991,26 @@ static CPU_SET_INFO( f8 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_SP: cpustate->pc1 = info->i; break;
+ case CPUINFO_INT_SP: cpustate->pc1 = info->i; break;
case CPUINFO_INT_PC:
cpustate->pc0 = info->i;
cpustate->dbus = cpustate->direct->read_decrypted_byte(cpustate->pc0);
- cpustate->pc0 += 1;
+ cpustate->pc0 += 1;
break;
- case CPUINFO_INT_PREVIOUSPC: break; /* TODO? */
- case CPUINFO_INT_INPUT_STATE + F8_INPUT_LINE_INT_REQ: cpustate->irq_request = info->i; break;
+ case CPUINFO_INT_PREVIOUSPC: break; /* TODO? */
+ case CPUINFO_INT_INPUT_STATE + F8_INPUT_LINE_INT_REQ: cpustate->irq_request = info->i; break;
case CPUINFO_INT_REGISTER + F8_PC0:
cpustate->pc0 = info->i;
cpustate->dbus = cpustate->direct->read_decrypted_byte(cpustate->pc0);
- cpustate->pc0 += 1;
+ cpustate->pc0 += 1;
break;
case CPUINFO_INT_REGISTER + F8_PC1: cpustate->pc1 = info->i; break;
case CPUINFO_INT_REGISTER + F8_DC0: cpustate->dc0 = info->i; break;
case CPUINFO_INT_REGISTER + F8_DC1: cpustate->dc1 = info->i; break;
- case CPUINFO_INT_REGISTER + F8_W: cpustate->w = info->i; break;
- case CPUINFO_INT_REGISTER + F8_A: cpustate->a = info->i; break;
+ case CPUINFO_INT_REGISTER + F8_W: cpustate->w = info->i; break;
+ case CPUINFO_INT_REGISTER + F8_A: cpustate->a = info->i; break;
case CPUINFO_INT_REGISTER + F8_IS: cpustate->is = info->i & 0x3f; break;
- case CPUINFO_INT_REGISTER + F8_J: cpustate->r[ 9] = info->i; break;
+ case CPUINFO_INT_REGISTER + F8_J: cpustate->r[ 9] = info->i; break;
case CPUINFO_INT_REGISTER + F8_HU: cpustate->r[10] = info->i; break;
case CPUINFO_INT_REGISTER + F8_HL: cpustate->r[11] = info->i; break;
case CPUINFO_INT_REGISTER + F8_KU: cpustate->r[12] = info->i; break;
@@ -2091,130 +2091,130 @@ CPU_GET_INFO( f8 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(f8_Regs); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 7; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_SP: info->i = cpustate->pc1; break;
- case CPUINFO_INT_PC: info->i = (cpustate->pc0 - 1) & 0xffff; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
-
- case CPUINFO_INT_INPUT_STATE + F8_INPUT_LINE_INT_REQ: info->i = cpustate->irq_request; break;
-
- case CPUINFO_INT_REGISTER + F8_PC0: info->i = (cpustate->pc0 - 1) & 0xffff; break;
- case CPUINFO_INT_REGISTER + F8_PC1: info->i = cpustate->pc1; break;
- case CPUINFO_INT_REGISTER + F8_DC0: info->i = cpustate->dc0; break;
- case CPUINFO_INT_REGISTER + F8_DC1: info->i = cpustate->dc1; break;
- case CPUINFO_INT_REGISTER + F8_W: info->i = cpustate->w; break;
- case CPUINFO_INT_REGISTER + F8_A: info->i = cpustate->a; break;
- case CPUINFO_INT_REGISTER + F8_IS: info->i = cpustate->is; break;
- case CPUINFO_INT_REGISTER + F8_J: info->i = cpustate->r[ 9]; break;
- case CPUINFO_INT_REGISTER + F8_HU: info->i = cpustate->r[10]; break;
- case CPUINFO_INT_REGISTER + F8_HL: info->i = cpustate->r[11]; break;
- case CPUINFO_INT_REGISTER + F8_KU: info->i = cpustate->r[12]; break;
- case CPUINFO_INT_REGISTER + F8_KL: info->i = cpustate->r[13]; break;
- case CPUINFO_INT_REGISTER + F8_QU: info->i = cpustate->r[14]; break;
- case CPUINFO_INT_REGISTER + F8_QL: info->i = cpustate->r[15]; break;
-
- case CPUINFO_INT_REGISTER + F8_R0:
- case CPUINFO_INT_REGISTER + F8_R1:
- case CPUINFO_INT_REGISTER + F8_R2:
- case CPUINFO_INT_REGISTER + F8_R3:
- case CPUINFO_INT_REGISTER + F8_R4:
- case CPUINFO_INT_REGISTER + F8_R5:
- case CPUINFO_INT_REGISTER + F8_R6:
- case CPUINFO_INT_REGISTER + F8_R7:
- case CPUINFO_INT_REGISTER + F8_R8:
- info->i = cpustate->r[state - (CPUINFO_INT_REGISTER + F8_R0)]; break;
-
-
- case CPUINFO_INT_REGISTER + F8_R16:
- case CPUINFO_INT_REGISTER + F8_R17:
- case CPUINFO_INT_REGISTER + F8_R18:
- case CPUINFO_INT_REGISTER + F8_R19:
- case CPUINFO_INT_REGISTER + F8_R20:
- case CPUINFO_INT_REGISTER + F8_R21:
- case CPUINFO_INT_REGISTER + F8_R22:
- case CPUINFO_INT_REGISTER + F8_R23:
- case CPUINFO_INT_REGISTER + F8_R24:
- case CPUINFO_INT_REGISTER + F8_R25:
- case CPUINFO_INT_REGISTER + F8_R26:
- case CPUINFO_INT_REGISTER + F8_R27:
- case CPUINFO_INT_REGISTER + F8_R28:
- case CPUINFO_INT_REGISTER + F8_R29:
- case CPUINFO_INT_REGISTER + F8_R30:
- case CPUINFO_INT_REGISTER + F8_R31:
- case CPUINFO_INT_REGISTER + F8_R32:
- case CPUINFO_INT_REGISTER + F8_R33:
- case CPUINFO_INT_REGISTER + F8_R34:
- case CPUINFO_INT_REGISTER + F8_R35:
- case CPUINFO_INT_REGISTER + F8_R36:
- case CPUINFO_INT_REGISTER + F8_R37:
- case CPUINFO_INT_REGISTER + F8_R38:
- case CPUINFO_INT_REGISTER + F8_R39:
- case CPUINFO_INT_REGISTER + F8_R40:
- case CPUINFO_INT_REGISTER + F8_R41:
- case CPUINFO_INT_REGISTER + F8_R42:
- case CPUINFO_INT_REGISTER + F8_R43:
- case CPUINFO_INT_REGISTER + F8_R44:
- case CPUINFO_INT_REGISTER + F8_R45:
- case CPUINFO_INT_REGISTER + F8_R46:
- case CPUINFO_INT_REGISTER + F8_R47:
- case CPUINFO_INT_REGISTER + F8_R48:
- case CPUINFO_INT_REGISTER + F8_R49:
- case CPUINFO_INT_REGISTER + F8_R50:
- case CPUINFO_INT_REGISTER + F8_R51:
- case CPUINFO_INT_REGISTER + F8_R52:
- case CPUINFO_INT_REGISTER + F8_R53:
- case CPUINFO_INT_REGISTER + F8_R54:
- case CPUINFO_INT_REGISTER + F8_R55:
- case CPUINFO_INT_REGISTER + F8_R56:
- case CPUINFO_INT_REGISTER + F8_R57:
- case CPUINFO_INT_REGISTER + F8_R58:
- case CPUINFO_INT_REGISTER + F8_R59:
- case CPUINFO_INT_REGISTER + F8_R60:
- case CPUINFO_INT_REGISTER + F8_R61:
- case CPUINFO_INT_REGISTER + F8_R62:
- case CPUINFO_INT_REGISTER + F8_R63:
- info->i = cpustate->r[state - (CPUINFO_INT_REGISTER + F8_R16) + 16]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(f8_Regs); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 7; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_SP: info->i = cpustate->pc1; break;
+ case CPUINFO_INT_PC: info->i = (cpustate->pc0 - 1) & 0xffff; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
+
+ case CPUINFO_INT_INPUT_STATE + F8_INPUT_LINE_INT_REQ: info->i = cpustate->irq_request; break;
+
+ case CPUINFO_INT_REGISTER + F8_PC0: info->i = (cpustate->pc0 - 1) & 0xffff; break;
+ case CPUINFO_INT_REGISTER + F8_PC1: info->i = cpustate->pc1; break;
+ case CPUINFO_INT_REGISTER + F8_DC0: info->i = cpustate->dc0; break;
+ case CPUINFO_INT_REGISTER + F8_DC1: info->i = cpustate->dc1; break;
+ case CPUINFO_INT_REGISTER + F8_W: info->i = cpustate->w; break;
+ case CPUINFO_INT_REGISTER + F8_A: info->i = cpustate->a; break;
+ case CPUINFO_INT_REGISTER + F8_IS: info->i = cpustate->is; break;
+ case CPUINFO_INT_REGISTER + F8_J: info->i = cpustate->r[ 9]; break;
+ case CPUINFO_INT_REGISTER + F8_HU: info->i = cpustate->r[10]; break;
+ case CPUINFO_INT_REGISTER + F8_HL: info->i = cpustate->r[11]; break;
+ case CPUINFO_INT_REGISTER + F8_KU: info->i = cpustate->r[12]; break;
+ case CPUINFO_INT_REGISTER + F8_KL: info->i = cpustate->r[13]; break;
+ case CPUINFO_INT_REGISTER + F8_QU: info->i = cpustate->r[14]; break;
+ case CPUINFO_INT_REGISTER + F8_QL: info->i = cpustate->r[15]; break;
+
+ case CPUINFO_INT_REGISTER + F8_R0:
+ case CPUINFO_INT_REGISTER + F8_R1:
+ case CPUINFO_INT_REGISTER + F8_R2:
+ case CPUINFO_INT_REGISTER + F8_R3:
+ case CPUINFO_INT_REGISTER + F8_R4:
+ case CPUINFO_INT_REGISTER + F8_R5:
+ case CPUINFO_INT_REGISTER + F8_R6:
+ case CPUINFO_INT_REGISTER + F8_R7:
+ case CPUINFO_INT_REGISTER + F8_R8:
+ info->i = cpustate->r[state - (CPUINFO_INT_REGISTER + F8_R0)]; break;
+
+
+ case CPUINFO_INT_REGISTER + F8_R16:
+ case CPUINFO_INT_REGISTER + F8_R17:
+ case CPUINFO_INT_REGISTER + F8_R18:
+ case CPUINFO_INT_REGISTER + F8_R19:
+ case CPUINFO_INT_REGISTER + F8_R20:
+ case CPUINFO_INT_REGISTER + F8_R21:
+ case CPUINFO_INT_REGISTER + F8_R22:
+ case CPUINFO_INT_REGISTER + F8_R23:
+ case CPUINFO_INT_REGISTER + F8_R24:
+ case CPUINFO_INT_REGISTER + F8_R25:
+ case CPUINFO_INT_REGISTER + F8_R26:
+ case CPUINFO_INT_REGISTER + F8_R27:
+ case CPUINFO_INT_REGISTER + F8_R28:
+ case CPUINFO_INT_REGISTER + F8_R29:
+ case CPUINFO_INT_REGISTER + F8_R30:
+ case CPUINFO_INT_REGISTER + F8_R31:
+ case CPUINFO_INT_REGISTER + F8_R32:
+ case CPUINFO_INT_REGISTER + F8_R33:
+ case CPUINFO_INT_REGISTER + F8_R34:
+ case CPUINFO_INT_REGISTER + F8_R35:
+ case CPUINFO_INT_REGISTER + F8_R36:
+ case CPUINFO_INT_REGISTER + F8_R37:
+ case CPUINFO_INT_REGISTER + F8_R38:
+ case CPUINFO_INT_REGISTER + F8_R39:
+ case CPUINFO_INT_REGISTER + F8_R40:
+ case CPUINFO_INT_REGISTER + F8_R41:
+ case CPUINFO_INT_REGISTER + F8_R42:
+ case CPUINFO_INT_REGISTER + F8_R43:
+ case CPUINFO_INT_REGISTER + F8_R44:
+ case CPUINFO_INT_REGISTER + F8_R45:
+ case CPUINFO_INT_REGISTER + F8_R46:
+ case CPUINFO_INT_REGISTER + F8_R47:
+ case CPUINFO_INT_REGISTER + F8_R48:
+ case CPUINFO_INT_REGISTER + F8_R49:
+ case CPUINFO_INT_REGISTER + F8_R50:
+ case CPUINFO_INT_REGISTER + F8_R51:
+ case CPUINFO_INT_REGISTER + F8_R52:
+ case CPUINFO_INT_REGISTER + F8_R53:
+ case CPUINFO_INT_REGISTER + F8_R54:
+ case CPUINFO_INT_REGISTER + F8_R55:
+ case CPUINFO_INT_REGISTER + F8_R56:
+ case CPUINFO_INT_REGISTER + F8_R57:
+ case CPUINFO_INT_REGISTER + F8_R58:
+ case CPUINFO_INT_REGISTER + F8_R59:
+ case CPUINFO_INT_REGISTER + F8_R60:
+ case CPUINFO_INT_REGISTER + F8_R61:
+ case CPUINFO_INT_REGISTER + F8_R62:
+ case CPUINFO_INT_REGISTER + F8_R63:
+ info->i = cpustate->r[state - (CPUINFO_INT_REGISTER + F8_R16) + 16]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(f8); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(f8); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(f8); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(f8); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(f8); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(f8); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(f8); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(f8); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(f8); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(f8); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "F8"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Fairchild F8"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s,
+ case CPUINFO_STR_NAME: strcpy(info->s, "F8"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Fairchild F8"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s,
"Copyright Juergen Buchmueller, all rights reserved.");
break;
- case CPUINFO_STR_FLAGS:
+ case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c",
cpustate->w & 0x10 ? 'I':'.',
cpustate->w & 0x08 ? 'O':'.',
diff --git a/src/emu/cpu/f8/f8.h b/src/emu/cpu/f8/f8.h
index 51e2e6aeac1..865a45e74a0 100644
--- a/src/emu/cpu/f8/f8.h
+++ b/src/emu/cpu/f8/f8.h
@@ -32,18 +32,18 @@ extern "C" {
enum
{
F8_PC0=1, F8_PC1, F8_DC0, F8_DC1, F8_W, F8_A, F8_IS,
- F8_J, F8_HU, F8_HL, F8_KU, F8_KL, F8_QU, F8_QL,
-
- F8_R0, F8_R1, F8_R2, F8_R3, F8_R4, F8_R5, F8_R6, F8_R7, F8_R8,
- F8_R16, F8_R17, F8_R18, F8_R19, F8_R20, F8_R21, F8_R22, F8_R23,
- F8_R24, F8_R25, F8_R26, F8_R27, F8_R28, F8_R29, F8_R30, F8_R31,
- F8_R32, F8_R33, F8_R34, F8_R35, F8_R36, F8_R37, F8_R38, F8_R39,
- F8_R40, F8_R41, F8_R42, F8_R43, F8_R44, F8_R45, F8_R46, F8_R47,
- F8_R48, F8_R49, F8_R50, F8_R51, F8_R52, F8_R53, F8_R54, F8_R55,
- F8_R56, F8_R57, F8_R58, F8_R59, F8_R60, F8_R61, F8_R62, F8_R63
+ F8_J, F8_HU, F8_HL, F8_KU, F8_KL, F8_QU, F8_QL,
+
+ F8_R0, F8_R1, F8_R2, F8_R3, F8_R4, F8_R5, F8_R6, F8_R7, F8_R8,
+ F8_R16, F8_R17, F8_R18, F8_R19, F8_R20, F8_R21, F8_R22, F8_R23,
+ F8_R24, F8_R25, F8_R26, F8_R27, F8_R28, F8_R29, F8_R30, F8_R31,
+ F8_R32, F8_R33, F8_R34, F8_R35, F8_R36, F8_R37, F8_R38, F8_R39,
+ F8_R40, F8_R41, F8_R42, F8_R43, F8_R44, F8_R45, F8_R46, F8_R47,
+ F8_R48, F8_R49, F8_R50, F8_R51, F8_R52, F8_R53, F8_R54, F8_R55,
+ F8_R56, F8_R57, F8_R58, F8_R59, F8_R60, F8_R61, F8_R62, F8_R63
};
-#define F8_INPUT_LINE_INT_REQ 1
+#define F8_INPUT_LINE_INT_REQ 1
DECLARE_LEGACY_CPU_DEVICE(F8, f8);
diff --git a/src/emu/cpu/f8/f8dasm.c b/src/emu/cpu/f8/f8dasm.c
index 187dd53a1e6..a28a1b004c4 100644
--- a/src/emu/cpu/f8/f8dasm.c
+++ b/src/emu/cpu/f8/f8dasm.c
@@ -12,39 +12,39 @@ CPU_DISASSEMBLE( f8 )
unsigned size = 0;
UINT8 op = oprom[size++];
- switch( op )
+ switch( op )
{
/* opcode bitmask */
case 0x00: /* 0000 0000 */
- sprintf(buffer, "LR A,KU");
+ sprintf(buffer, "LR A,KU");
break;
case 0x01: /* 0000 0001 */
- sprintf(buffer, "LR A,KL");
+ sprintf(buffer, "LR A,KL");
break;
case 0x02: /* 0000 0010 */
- sprintf(buffer, "LR A,QU");
+ sprintf(buffer, "LR A,QU");
break;
case 0x03: /* 0000 0011 */
- sprintf(buffer, "LR A,QL");
+ sprintf(buffer, "LR A,QL");
break;
case 0x04: /* 0000 0100 */
- sprintf(buffer, "LR KU,A");
+ sprintf(buffer, "LR KU,A");
break;
case 0x05: /* 0000 0101 */
- sprintf(buffer, "LR KL,A");
+ sprintf(buffer, "LR KL,A");
break;
case 0x06: /* 0000 0110 */
- sprintf(buffer, "LR QU,A");
+ sprintf(buffer, "LR QU,A");
break;
case 0x07: /* 0000 0111 */
- sprintf(buffer, "LR QL,A");
+ sprintf(buffer, "LR QL,A");
break;
- case 0x08: /* 0000 1000 */
- sprintf(buffer, "LR K,P");
+ case 0x08: /* 0000 1000 */
+ sprintf(buffer, "LR K,P");
break;
case 0x09: /* 0000 1001 */
- sprintf(buffer, "LR P,K");
+ sprintf(buffer, "LR P,K");
break;
case 0x0a: /* 0000 1010 */
sprintf(buffer, "LR A,IS");
@@ -53,17 +53,17 @@ CPU_DISASSEMBLE( f8 )
sprintf(buffer, "LR IS,A");
break;
- case 0x0c: /* 0000 1100 */
+ case 0x0c: /* 0000 1100 */
sprintf(buffer, "PK") ;
break;
case 0x0d: /* 0000 1101 */
sprintf(buffer, "LR P0,Q");
- break;
+ break;
case 0x0e: /* 0000 1110 */
- sprintf(buffer, "LR Q,DC");
+ sprintf(buffer, "LR Q,DC");
break;
case 0x0f: /* 0000 1111 */
- sprintf(buffer, "LR DC,Q");
+ sprintf(buffer, "LR DC,Q");
break;
case 0x10: /* 0001 0000 */
sprintf(buffer, "LR DC,H");
@@ -102,13 +102,13 @@ CPU_DISASSEMBLE( f8 )
sprintf(buffer, "EI");
break;
case 0x1c: /* 0001 1100 */
- sprintf(buffer, "POP");
+ sprintf(buffer, "POP");
break;
case 0x1d: /* 0001 1101 */
- sprintf(buffer, "LR W,J");
+ sprintf(buffer, "LR W,J");
break;
case 0x1e: /* 0001 1110 */
- sprintf(buffer, "LR J,W");
+ sprintf(buffer, "LR J,W");
break;
case 0x1f: /* 0001 1111 */
sprintf(buffer, "INC");
@@ -118,37 +118,37 @@ CPU_DISASSEMBLE( f8 )
break;
case 0x21: /* 0010 0001 */
sprintf(buffer, "NI $%02X", oprom[size++]);
- break;
- case 0x22: /* 0010 0010 */
+ break;
+ case 0x22: /* 0010 0010 */
sprintf(buffer, "OI $%02X", oprom[size++]);
- break;
- case 0x23: /* 0010 0011 */
+ break;
+ case 0x23: /* 0010 0011 */
sprintf(buffer, "XI $%02X", oprom[size++]);
- break;
+ break;
case 0x24: /* 0010 0100 */
sprintf(buffer, "AI $%02X", oprom[size++]);
- break;
+ break;
case 0x25: /* 0010 0101 */
sprintf(buffer, "CI $%02X", oprom[size++]);
- break;
+ break;
case 0x26: /* 0010 0110 */
sprintf(buffer, "IN $%02X", oprom[size++]);
- break;
+ break;
case 0x27: /* 0010 0111 */
sprintf(buffer, "OUT $%02X", oprom[size++]);
- break;
+ break;
case 0x28: /* 0010 1000 */
sprintf(buffer, "PI $%02X%02X", oprom[size + 0], oprom[size + 1]);
size += 2;
- break;
+ break;
case 0x29: /* 0010 1001 */
sprintf(buffer, "JMP $%02X%02X", oprom[size + 0], oprom[size + 1]);
size += 2;
- break;
+ break;
case 0x2a: /* 0010 1010 */
sprintf(buffer, "DCI $%02X%02X", oprom[size + 0], oprom[size + 1]);
size += 2;
- break;
+ break;
case 0x2b: /* 0010 1011 */
sprintf(buffer, "NOP");
break;
@@ -159,9 +159,9 @@ CPU_DISASSEMBLE( f8 )
case 0x2e: /* 0010 1110 */
case 0x2f: /* 0010 1111 */
sprintf(buffer, "??? $%02X",op);
- break;
+ break;
- case 0x30: /* 0011 0000 */
+ case 0x30: /* 0011 0000 */
case 0x31: /* 0011 0001 */
case 0x32: /* 0011 0010 */
case 0x33: /* 0011 0011 */
@@ -173,23 +173,23 @@ CPU_DISASSEMBLE( f8 )
case 0x39: /* 0011 1001 */
case 0x3a: /* 0011 1010 */
case 0x3b: /* 0011 1011 */
- sprintf(buffer, "DS %s",rname[op & 15]);
- break;
- case 0x3c: /* 0011 1100 */
- sprintf(buffer, "DS (IS)");
- break;
- case 0x3d: /* 0011 1101 */
- sprintf(buffer, "DS (IS++)");
- break;
- case 0x3e: /* 0011 1110 */
- sprintf(buffer, "DS (IS--)");
- break;
- case 0x3f: /* 0011 1111 */
+ sprintf(buffer, "DS %s",rname[op & 15]);
+ break;
+ case 0x3c: /* 0011 1100 */
+ sprintf(buffer, "DS (IS)");
+ break;
+ case 0x3d: /* 0011 1101 */
+ sprintf(buffer, "DS (IS++)");
+ break;
+ case 0x3e: /* 0011 1110 */
+ sprintf(buffer, "DS (IS--)");
+ break;
+ case 0x3f: /* 0011 1111 */
sprintf(buffer, "??? $%02X",op);
- break;
+ break;
- case 0x40: /* 0100 0000 */
- case 0x41: /* 0100 0001 */
+ case 0x40: /* 0100 0000 */
+ case 0x41: /* 0100 0001 */
case 0x42: /* 0100 0010 */
case 0x43: /* 0100 0011 */
case 0x44: /* 0100 0100 */
@@ -200,22 +200,22 @@ CPU_DISASSEMBLE( f8 )
case 0x49: /* 0100 1001 */
case 0x4a: /* 0100 1010 */
case 0x4b: /* 0100 1011 */
- sprintf(buffer, "LR A,%s",rname[op & 15]);
- break;
- case 0x4c: /* 0100 1100 */
- sprintf(buffer, "LR A,(IS)");
- break;
- case 0x4d: /* 0100 1101 */
- sprintf(buffer, "LR A,(IS++)");
- break;
- case 0x4e: /* 0100 1110 */
- sprintf(buffer, "LR A,(IS--)");
- break;
- case 0x4f: /* 0100 1111 */
+ sprintf(buffer, "LR A,%s",rname[op & 15]);
+ break;
+ case 0x4c: /* 0100 1100 */
+ sprintf(buffer, "LR A,(IS)");
+ break;
+ case 0x4d: /* 0100 1101 */
+ sprintf(buffer, "LR A,(IS++)");
+ break;
+ case 0x4e: /* 0100 1110 */
+ sprintf(buffer, "LR A,(IS--)");
+ break;
+ case 0x4f: /* 0100 1111 */
sprintf(buffer, "??? $%02X",op);
- break;
+ break;
- case 0x50: /* 0101 0000 */
+ case 0x50: /* 0101 0000 */
case 0x51: /* 0101 0001 */
case 0x52: /* 0101 0010 */
case 0x53: /* 0101 0011 */
@@ -227,23 +227,23 @@ CPU_DISASSEMBLE( f8 )
case 0x59: /* 0101 1001 */
case 0x5a: /* 0101 1010 */
case 0x5b: /* 0101 1011 */
- sprintf(buffer, "LR %s,A",rname[op & 15]);
- break;
- case 0x5c: /* 0101 1100 */
- sprintf(buffer, "LR (IS),A");
- break;
- case 0x5d: /* 0101 1101 */
- sprintf(buffer, "LR (IS++),A");
- break;
- case 0x5e: /* 0101 1110 */
- sprintf(buffer, "LR (IS--),A");
- break;
- case 0x5f: /* 0101 1111 */
+ sprintf(buffer, "LR %s,A",rname[op & 15]);
+ break;
+ case 0x5c: /* 0101 1100 */
+ sprintf(buffer, "LR (IS),A");
+ break;
+ case 0x5d: /* 0101 1101 */
+ sprintf(buffer, "LR (IS++),A");
+ break;
+ case 0x5e: /* 0101 1110 */
+ sprintf(buffer, "LR (IS--),A");
+ break;
+ case 0x5f: /* 0101 1111 */
sprintf(buffer, "??? $%02X",op);
- break;
+ break;
- case 0x60: /* 0110 0000 */
- case 0x61: /* 0110 0001 */
+ case 0x60: /* 0110 0000 */
+ case 0x61: /* 0110 0001 */
case 0x62: /* 0110 0010 */
case 0x63: /* 0110 0011 */
case 0x64: /* 0110 0100 */
@@ -252,7 +252,7 @@ CPU_DISASSEMBLE( f8 )
case 0x67: /* 0110 0111 */
sprintf(buffer, "LISU $%02X", op & 0x07);
break;
- case 0x68: /* 0110 1000 */
+ case 0x68: /* 0110 1000 */
case 0x69: /* 0110 1001 */
case 0x6a: /* 0110 1010 */
case 0x6b: /* 0110 1011 */
@@ -261,9 +261,9 @@ CPU_DISASSEMBLE( f8 )
case 0x6e: /* 0110 1110 */
case 0x6f: /* 0110 1111 */
sprintf(buffer, "LISL $%02X", op & 0x07);
- break;
+ break;
- case 0x70: /* 0111 0000 */
+ case 0x70: /* 0111 0000 */
case 0x71: /* 0111 0001 */
case 0x72: /* 0111 0010 */
case 0x73: /* 0111 0011 */
@@ -285,75 +285,75 @@ CPU_DISASSEMBLE( f8 )
case 0x81: /* 1000 0001 */
case 0x85: /* 1000 0101 */
sprintf(buffer, "BP $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x82: /* 1000 0010 */
sprintf(buffer, "BC $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x84: /* 1000 0100 */
sprintf(buffer, "BZ $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x80: /* 1000 0000 */
case 0x83: /* 1000 0011 */
case 0x86: /* 1000 0110 */
case 0x87: /* 1000 0111 */
sprintf(buffer, "BT $%02X,$%04X", op & 0x07, pc + (INT8)oprom[size++] + 1);
- break;
+ break;
- case 0x88: /* 1000 1000 */
+ case 0x88: /* 1000 1000 */
sprintf(buffer, "AM");
break;
- case 0x89: /* 1000 1001 */
+ case 0x89: /* 1000 1001 */
sprintf(buffer, "AMD");
- break;
+ break;
- case 0x8a: /* 1000 1010 */
+ case 0x8a: /* 1000 1010 */
sprintf(buffer, "NM");
break;
- case 0x8b: /* 1000 1011 */
+ case 0x8b: /* 1000 1011 */
sprintf(buffer, "OM");
break;
- case 0x8c: /* 1000 1100 */
+ case 0x8c: /* 1000 1100 */
sprintf(buffer, "XM");
break;
- case 0x8d: /* 1000 1101 */
+ case 0x8d: /* 1000 1101 */
sprintf(buffer, "CM");
break;
- case 0x8e: /* 1000 1110 */
+ case 0x8e: /* 1000 1110 */
sprintf(buffer, "ADC");
- break;
+ break;
- case 0x8f: /* 1000 1111 */
+ case 0x8f: /* 1000 1111 */
sprintf(buffer, "BR7 $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
- case 0x90: /* 1001 0000 */
+ case 0x90: /* 1001 0000 */
sprintf(buffer, "BR $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x91: /* 1001 0001 */
case 0x95: /* 1001 0101 */
sprintf(buffer, "BM $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x92: /* 1001 0010 */
sprintf(buffer, "BNC $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x94: /* 1001 0100 */
sprintf(buffer, "BNZ $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x98: /* 1001 1000 */
sprintf(buffer, "BNO $%04X", pc + (INT8)oprom[size++] + 1);
- break;
+ break;
case 0x93: /* 1001 0011 */
case 0x96: /* 1001 0110 */
@@ -366,19 +366,19 @@ CPU_DISASSEMBLE( f8 )
case 0x9e: /* 1001 1110 */
case 0x9f: /* 1001 1111 */
sprintf(buffer, "BF $%02X,$%04X", op & 0x0f, pc + (INT8)oprom[size++] + 1);
- break;
+ break;
- case 0xa0: /* 1010 0000 */
+ case 0xa0: /* 1010 0000 */
case 0xa1: /* 1010 0001 */
sprintf(buffer, "INS $%02X", (unsigned) (INT8) (op & 0x0F));
- break;
+ break;
- case 0xa2: /* 1010 0010 */
+ case 0xa2: /* 1010 0010 */
case 0xa3: /* 1010 0011 */
sprintf(buffer, "??? $%02X\n", op);
- break;
+ break;
- case 0xa4: /* 1010 0100 */
+ case 0xa4: /* 1010 0100 */
case 0xa5: /* 1010 0101 */
case 0xa6: /* 1010 0110 */
case 0xa7: /* 1010 0111 */
@@ -391,19 +391,19 @@ CPU_DISASSEMBLE( f8 )
case 0xae: /* 1010 1110 */
case 0xaf: /* 1010 1111 */
sprintf(buffer, "INS $%02X", (INT8) op & 0x0f);
- break;
+ break;
- case 0xb0: /* 1011 0000 */
+ case 0xb0: /* 1011 0000 */
case 0xb1: /* 1011 0001 */
sprintf(buffer, "OUTS $%02X", (INT8) op & 0x0f);
- break;
+ break;
- case 0xb2: /* 1011 0010 */
+ case 0xb2: /* 1011 0010 */
case 0xb3: /* 1011 0011 */
sprintf(buffer, "??? $%02X\n", op);
- break;
+ break;
- case 0xb4: /* 1011 0100 */
+ case 0xb4: /* 1011 0100 */
case 0xb5: /* 1011 0101 */
case 0xb6: /* 1011 0110 */
case 0xb7: /* 1011 0111 */
@@ -416,9 +416,9 @@ CPU_DISASSEMBLE( f8 )
case 0xbe: /* 1011 1110 */
case 0xbf: /* 1011 1111 */
sprintf(buffer, "OUTS $%02X", (unsigned) (INT8) op & 0x0f);
- break;
+ break;
- case 0xc0: /* 1100 0000 */
+ case 0xc0: /* 1100 0000 */
case 0xc1: /* 1100 0001 */
case 0xc2: /* 1100 0010 */
case 0xc3: /* 1100 0011 */
@@ -430,22 +430,22 @@ CPU_DISASSEMBLE( f8 )
case 0xc9: /* 1100 1001 */
case 0xca: /* 1100 1010 */
case 0xcb: /* 1100 1011 */
- sprintf(buffer, "AS %s", rname[op & 15]);
- break;
- case 0xcc: /* 1100 1100 */
+ sprintf(buffer, "AS %s", rname[op & 15]);
+ break;
+ case 0xcc: /* 1100 1100 */
sprintf(buffer, "AS (IS)");
- break;
- case 0xcd: /* 1100 1101 */
+ break;
+ case 0xcd: /* 1100 1101 */
sprintf(buffer, "AS (IS++)");
- break;
- case 0xce: /* 1100 1110 */
+ break;
+ case 0xce: /* 1100 1110 */
sprintf(buffer, "AS (IS--)");
- break;
- case 0xcf: /* 1100 1111 */
+ break;
+ case 0xcf: /* 1100 1111 */
sprintf(buffer, "??? $%02X\n", op);
break;
- case 0xd0: /* 1101 0000 */
+ case 0xd0: /* 1101 0000 */
case 0xd1: /* 1101 0001 */
case 0xd2: /* 1101 0010 */
case 0xd3: /* 1101 0011 */
@@ -459,20 +459,20 @@ CPU_DISASSEMBLE( f8 )
case 0xdb: /* 1101 1011 */
sprintf(buffer, "ASD %s", rname[op & 15]);
break;
- case 0xdc: /* 1101 1100 */
+ case 0xdc: /* 1101 1100 */
sprintf(buffer, "ASD (IS)");
break;
- case 0xdd: /* 1101 1101 */
+ case 0xdd: /* 1101 1101 */
sprintf(buffer, "ASD (IS++)");
- break;
- case 0xde: /* 1101 1110 */
+ break;
+ case 0xde: /* 1101 1110 */
sprintf(buffer, "ASD (IS--)");
- break;
- case 0xdf: /* 1101 1111 */
+ break;
+ case 0xdf: /* 1101 1111 */
sprintf(buffer, "??? $%02X\n", op);
- break;
+ break;
- case 0xe0: /* 1110 0000 */
+ case 0xe0: /* 1110 0000 */
case 0xe1: /* 1110 0001 */
case 0xe2: /* 1110 0010 */
case 0xe3: /* 1110 0011 */
@@ -485,22 +485,22 @@ CPU_DISASSEMBLE( f8 )
case 0xea: /* 1110 1010 */
case 0xeb: /* 1110 1011 */
sprintf(buffer, "XS %s", rname[op & 15]);
- break;
- case 0xec: /* 1110 1100 */
+ break;
+ case 0xec: /* 1110 1100 */
sprintf(buffer, "XS (IS)");
- break;
- case 0xed: /* 1110 1101 */
+ break;
+ case 0xed: /* 1110 1101 */
sprintf(buffer, "XS (IS++)");
- break;
- case 0xee: /* 1110 1110 */
+ break;
+ case 0xee: /* 1110 1110 */
sprintf(buffer, "XS (IS--)");
- break;
- case 0xef: /* 1110 1111 */
+ break;
+ case 0xef: /* 1110 1111 */
sprintf(buffer, "??? $%02X\n", op);
- break;
+ break;
- case 0xf0: /* 1111 0000 */
+ case 0xf0: /* 1111 0000 */
case 0xf1: /* 1111 0001 */
case 0xf2: /* 1111 0010 */
case 0xf3: /* 1111 0011 */
@@ -514,20 +514,19 @@ CPU_DISASSEMBLE( f8 )
case 0xfb: /* 1111 1011 */
sprintf(buffer, "NS %s", rname[op & 15]);
break;
- case 0xfc: /* 1111 1100 */
+ case 0xfc: /* 1111 1100 */
sprintf(buffer, "NS (IS)");
- break;
- case 0xfd: /* 1111 1101 */
+ break;
+ case 0xfd: /* 1111 1101 */
sprintf(buffer, "NS (IS++)");
- break;
- case 0xfe: /* 1111 1110 */
+ break;
+ case 0xfe: /* 1111 1110 */
sprintf(buffer, "NS (IS--)");
- break;
- case 0xff: /* 1111 1111 */
+ break;
+ case 0xff: /* 1111 1111 */
sprintf(buffer, "??? $%02X\n", op);
- break;
- }
+ break;
+ }
- return size;
+ return size;
}
-
diff --git a/src/emu/cpu/g65816/g65816.c b/src/emu/cpu/g65816/g65816.c
index 94348229019..0dbc1c6b791 100644
--- a/src/emu/cpu/g65816/g65816.c
+++ b/src/emu/cpu/g65816/g65816.c
@@ -385,28 +385,28 @@ static CPU_SET_INFO( g65816 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_IRQ: g65816_set_irq_line(cpustate, G65816_LINE_IRQ, info->i); break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_NMI: g65816_set_irq_line(cpustate, G65816_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_ABORT: g65816_set_irq_line(cpustate, G65816_LINE_ABORT, info->i); break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_SO: g65816_set_irq_line(cpustate, G65816_LINE_SO, info->i); break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_RDY: g65816_set_irq_line(cpustate, G65816_LINE_RDY, info->i); break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_RESET: g65816_set_irq_line(cpustate, G65816_LINE_RESET, info->i); break;
-
- case CPUINFO_INT_PC: g65816_set_pc(cpustate, info->i); break;
- case CPUINFO_INT_SP: g65816_set_sp(cpustate, info->i); break;
-
- case CPUINFO_INT_REGISTER + G65816_PC: g65816_set_reg(cpustate, G65816_PC, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_S: g65816_set_reg(cpustate, G65816_S, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_P: g65816_set_reg(cpustate, G65816_P, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_A: g65816_set_reg(cpustate, G65816_A, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_X: g65816_set_reg(cpustate, G65816_X, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_Y: g65816_set_reg(cpustate, G65816_Y, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_PB: g65816_set_reg(cpustate, G65816_PB, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_DB: g65816_set_reg(cpustate, G65816_DB, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_D: g65816_set_reg(cpustate, G65816_D, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_E: g65816_set_reg(cpustate, G65816_E, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_NMI_STATE: g65816_set_reg(cpustate, G65816_NMI_STATE, info->i); break;
- case CPUINFO_INT_REGISTER + G65816_IRQ_STATE: g65816_set_reg(cpustate, G65816_IRQ_STATE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_IRQ: g65816_set_irq_line(cpustate, G65816_LINE_IRQ, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_NMI: g65816_set_irq_line(cpustate, G65816_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_ABORT: g65816_set_irq_line(cpustate, G65816_LINE_ABORT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_SO: g65816_set_irq_line(cpustate, G65816_LINE_SO, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_RDY: g65816_set_irq_line(cpustate, G65816_LINE_RDY, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_RESET: g65816_set_irq_line(cpustate, G65816_LINE_RESET, info->i); break;
+
+ case CPUINFO_INT_PC: g65816_set_pc(cpustate, info->i); break;
+ case CPUINFO_INT_SP: g65816_set_sp(cpustate, info->i); break;
+
+ case CPUINFO_INT_REGISTER + G65816_PC: g65816_set_reg(cpustate, G65816_PC, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_S: g65816_set_reg(cpustate, G65816_S, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_P: g65816_set_reg(cpustate, G65816_P, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_A: g65816_set_reg(cpustate, G65816_A, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_X: g65816_set_reg(cpustate, G65816_X, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_Y: g65816_set_reg(cpustate, G65816_Y, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_PB: g65816_set_reg(cpustate, G65816_PB, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_DB: g65816_set_reg(cpustate, G65816_DB, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_D: g65816_set_reg(cpustate, G65816_D, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_E: g65816_set_reg(cpustate, G65816_E, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_NMI_STATE: g65816_set_reg(cpustate, G65816_NMI_STATE, info->i); break;
+ case CPUINFO_INT_REGISTER + G65816_IRQ_STATE: g65816_set_reg(cpustate, G65816_IRQ_STATE, info->i); break;
}
}
@@ -429,70 +429,70 @@ CPU_GET_INFO( g65816 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(g65816i_cpu_struct); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_IRQ: info->i = LINE_IRQ; break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_NMI: info->i = LINE_NMI; break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_ABORT: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_SO: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_RDY: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + G65816_LINE_RESET: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
-
- case CPUINFO_INT_PC: info->i = g65816_get_pc(cpustate); break;
- case CPUINFO_INT_SP: info->i = g65816_get_sp(cpustate); break;
-
- case CPUINFO_INT_REGISTER + G65816_PC: info->i = g65816_get_pc(cpustate); break;
- case CPUINFO_INT_REGISTER + G65816_S: info->i = g65816_get_reg(cpustate, G65816_S); break;
- case CPUINFO_INT_REGISTER + G65816_P: info->i = g65816_get_reg(cpustate, G65816_P); break;
- case CPUINFO_INT_REGISTER + G65816_A: info->i = g65816_get_reg(cpustate, G65816_A); break;
- case CPUINFO_INT_REGISTER + G65816_X: info->i = g65816_get_reg(cpustate, G65816_X); break;
- case CPUINFO_INT_REGISTER + G65816_Y: info->i = g65816_get_reg(cpustate, G65816_Y); break;
- case CPUINFO_INT_REGISTER + G65816_PB: info->i = g65816_get_reg(cpustate, G65816_PB); break;
- case CPUINFO_INT_REGISTER + G65816_DB: info->i = g65816_get_reg(cpustate, G65816_DB); break;
- case CPUINFO_INT_REGISTER + G65816_D: info->i = g65816_get_reg(cpustate, G65816_D); break;
- case CPUINFO_INT_REGISTER + G65816_E: info->i = g65816_get_reg(cpustate, G65816_E); break;
- case CPUINFO_INT_REGISTER + G65816_NMI_STATE: info->i = g65816_get_reg(cpustate, G65816_NMI_STATE); break;
- case CPUINFO_INT_REGISTER + G65816_IRQ_STATE: info->i = g65816_get_reg(cpustate, G65816_IRQ_STATE); break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(g65816i_cpu_struct); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_IRQ: info->i = LINE_IRQ; break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_NMI: info->i = LINE_NMI; break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_ABORT: info->i = 0; break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_SO: info->i = 0; break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_RDY: info->i = 0; break;
+ case CPUINFO_INT_INPUT_STATE + G65816_LINE_RESET: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
+
+ case CPUINFO_INT_PC: info->i = g65816_get_pc(cpustate); break;
+ case CPUINFO_INT_SP: info->i = g65816_get_sp(cpustate); break;
+
+ case CPUINFO_INT_REGISTER + G65816_PC: info->i = g65816_get_pc(cpustate); break;
+ case CPUINFO_INT_REGISTER + G65816_S: info->i = g65816_get_reg(cpustate, G65816_S); break;
+ case CPUINFO_INT_REGISTER + G65816_P: info->i = g65816_get_reg(cpustate, G65816_P); break;
+ case CPUINFO_INT_REGISTER + G65816_A: info->i = g65816_get_reg(cpustate, G65816_A); break;
+ case CPUINFO_INT_REGISTER + G65816_X: info->i = g65816_get_reg(cpustate, G65816_X); break;
+ case CPUINFO_INT_REGISTER + G65816_Y: info->i = g65816_get_reg(cpustate, G65816_Y); break;
+ case CPUINFO_INT_REGISTER + G65816_PB: info->i = g65816_get_reg(cpustate, G65816_PB); break;
+ case CPUINFO_INT_REGISTER + G65816_DB: info->i = g65816_get_reg(cpustate, G65816_DB); break;
+ case CPUINFO_INT_REGISTER + G65816_D: info->i = g65816_get_reg(cpustate, G65816_D); break;
+ case CPUINFO_INT_REGISTER + G65816_E: info->i = g65816_get_reg(cpustate, G65816_E); break;
+ case CPUINFO_INT_REGISTER + G65816_NMI_STATE: info->i = g65816_get_reg(cpustate, G65816_NMI_STATE); break;
+ case CPUINFO_INT_REGISTER + G65816_IRQ_STATE: info->i = g65816_get_reg(cpustate, G65816_IRQ_STATE); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(g65816); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(g65816); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(g65816); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(g65816); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(g65816); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(g65816); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->ICount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(g65816); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(g65816); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(g65816); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(g65816); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(g65816); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(g65816); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->ICount; break;
- case CPUINFO_FCT_READOP: info->readop = CPU_READOP_NAME(g65816); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_READOP_NAME(g65816); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "G65C816"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "6500"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Karl Stenerud, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "G65C816"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "6500"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Karl Stenerud, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -507,26 +507,26 @@ CPU_GET_INFO( g65816 )
cpustate->flag_c & CFLAG_SET ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + G65816_PC: sprintf(info->s, "PC:%06X", g65816_get_pc(cpustate)); break;
- case CPUINFO_STR_REGISTER + G65816_PB: sprintf(info->s, "PB:%02X", cpustate->pb>>16); break;
- case CPUINFO_STR_REGISTER + G65816_DB: sprintf(info->s, "DB:%02X", cpustate->db>>16); break;
- case CPUINFO_STR_REGISTER + G65816_D: sprintf(info->s, "D:%04X", cpustate->d); break;
- case CPUINFO_STR_REGISTER + G65816_S: sprintf(info->s, "S:%04X", cpustate->s); break;
- case CPUINFO_STR_REGISTER + G65816_P: sprintf(info->s, "P:%02X",
- (cpustate->flag_n&0x80) |
- ((cpustate->flag_v>>1)&0x40) |
- cpustate->flag_m |
- cpustate->flag_x |
- cpustate->flag_d |
- cpustate->flag_i |
- ((!cpustate->flag_z)<<1) |
+ case CPUINFO_STR_REGISTER + G65816_PC: sprintf(info->s, "PC:%06X", g65816_get_pc(cpustate)); break;
+ case CPUINFO_STR_REGISTER + G65816_PB: sprintf(info->s, "PB:%02X", cpustate->pb>>16); break;
+ case CPUINFO_STR_REGISTER + G65816_DB: sprintf(info->s, "DB:%02X", cpustate->db>>16); break;
+ case CPUINFO_STR_REGISTER + G65816_D: sprintf(info->s, "D:%04X", cpustate->d); break;
+ case CPUINFO_STR_REGISTER + G65816_S: sprintf(info->s, "S:%04X", cpustate->s); break;
+ case CPUINFO_STR_REGISTER + G65816_P: sprintf(info->s, "P:%02X",
+ (cpustate->flag_n&0x80) |
+ ((cpustate->flag_v>>1)&0x40) |
+ cpustate->flag_m |
+ cpustate->flag_x |
+ cpustate->flag_d |
+ cpustate->flag_i |
+ ((!cpustate->flag_z)<<1) |
((cpustate->flag_c>>8)&1)); break;
- case CPUINFO_STR_REGISTER + G65816_E: sprintf(info->s, "E:%d", cpustate->flag_e); break;
- case CPUINFO_STR_REGISTER + G65816_A: sprintf(info->s, "A:%04X", cpustate->a | cpustate->b); break;
- case CPUINFO_STR_REGISTER + G65816_X: sprintf(info->s, "X:%04X", cpustate->x); break;
- case CPUINFO_STR_REGISTER + G65816_Y: sprintf(info->s, "Y:%04X", cpustate->y); break;
- case CPUINFO_STR_REGISTER + G65816_NMI_STATE: sprintf(info->s, "NMI:%X", cpustate->line_nmi); break;
- case CPUINFO_STR_REGISTER + G65816_IRQ_STATE: sprintf(info->s, "IRQ:%X", cpustate->line_irq); break;
+ case CPUINFO_STR_REGISTER + G65816_E: sprintf(info->s, "E:%d", cpustate->flag_e); break;
+ case CPUINFO_STR_REGISTER + G65816_A: sprintf(info->s, "A:%04X", cpustate->a | cpustate->b); break;
+ case CPUINFO_STR_REGISTER + G65816_X: sprintf(info->s, "X:%04X", cpustate->x); break;
+ case CPUINFO_STR_REGISTER + G65816_Y: sprintf(info->s, "Y:%04X", cpustate->y); break;
+ case CPUINFO_STR_REGISTER + G65816_NMI_STATE: sprintf(info->s, "NMI:%X", cpustate->line_nmi); break;
+ case CPUINFO_STR_REGISTER + G65816_IRQ_STATE: sprintf(info->s, "IRQ:%X", cpustate->line_irq); break;
}
}
@@ -680,9 +680,9 @@ CPU_SET_INFO( _5a22 )
switch (state)
{
- case CPUINFO_INT_REGISTER + _5A22_FASTROM: g65816_set_reg(cpustate, _5A22_FASTROM, info->i); break;
+ case CPUINFO_INT_REGISTER + _5A22_FASTROM: g65816_set_reg(cpustate, _5A22_FASTROM, info->i); break;
- default: CPU_SET_INFO_CALL(g65816); break;
+ default: CPU_SET_INFO_CALL(g65816); break;
}
}
@@ -693,17 +693,17 @@ CPU_GET_INFO( _5a22 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(_5a22); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(5a22); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(5a22); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(_5a22); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(5a22); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(5a22); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "5A22"); break;
- case CPUINFO_INT_REGISTER + _5A22_FASTROM: info->i = g65816_get_reg(cpustate, _5A22_FASTROM); break;
- case CPUINFO_STR_REGISTER + _5A22_FASTROM: sprintf(info->s, "fastROM:%d", cpustate->fastROM & 1 ? 1 : 0); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(_5a22_map); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "5A22"); break;
+ case CPUINFO_INT_REGISTER + _5A22_FASTROM: info->i = g65816_get_reg(cpustate, _5A22_FASTROM); break;
+ case CPUINFO_STR_REGISTER + _5A22_FASTROM: sprintf(info->s, "fastROM:%d", cpustate->fastROM & 1 ? 1 : 0); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(_5a22_map); break;
- default: CPU_GET_INFO_CALL(g65816); break;
+ default: CPU_GET_INFO_CALL(g65816); break;
}
}
diff --git a/src/emu/cpu/g65816/g65816cm.h b/src/emu/cpu/g65816/g65816cm.h
index 18d8873d3a8..c404b00e6de 100644
--- a/src/emu/cpu/g65816/g65816cm.h
+++ b/src/emu/cpu/g65816/g65816cm.h
@@ -11,9 +11,9 @@
#undef G65816_CALL_DEBUGGER
#define G65816_CALL_DEBUGGER(x) debugger_instruction_hook(cpustate->device, x)
-#define g65816_read_8(addr) cpustate->program->read_byte(addr)
-#define g65816_write_8(addr,data) cpustate->program->write_byte(addr,data)
-#define g65816_read_8_immediate(A) cpustate->program->read_byte(A)
+#define g65816_read_8(addr) cpustate->program->read_byte(addr)
+#define g65816_write_8(addr,data) cpustate->program->write_byte(addr,data)
+#define g65816_read_8_immediate(A) cpustate->program->read_byte(A)
#define g65816_jumping(A)
#define g65816_branching(A)
@@ -52,14 +52,14 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
#define MAKE_UINT_24(A) ((A)&0xffffff)
/* Bits */
-#define BIT_0 0x01
-#define BIT_1 0x02
-#define BIT_2 0x04
-#define BIT_3 0x08
-#define BIT_4 0x10
-#define BIT_5 0x20
-#define BIT_6 0x40
-#define BIT_7 0x80
+#define BIT_0 0x01
+#define BIT_1 0x02
+#define BIT_2 0x04
+#define BIT_3 0x08
+#define BIT_4 0x10
+#define BIT_5 0x20
+#define BIT_6 0x40
+#define BIT_7 0x80
/* ======================================================================== */
@@ -69,35 +69,35 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
/* CPU Structure */
struct g65816i_cpu_struct
{
- uint a; /* Accumulator */
- uint b; /* holds high byte of accumulator */
- uint x; /* Index Register X */
- uint y; /* Index Register Y */
- uint s; /* Stack Pointer */
- uint pc; /* Program Counter */
- uint ppc; /* Previous Program Counter */
- uint pb; /* Program Bank (shifted left 16) */
- uint db; /* Data Bank (shifted left 16) */
- uint d; /* Direct Register */
- uint flag_e; /* Emulation Mode Flag */
- uint flag_m; /* Memory/Accumulator Select Flag */
- uint flag_x; /* Index Select Flag */
- uint flag_n; /* Negative Flag */
- uint flag_v; /* Overflow Flag */
- uint flag_d; /* Decimal Mode Flag */
- uint flag_i; /* Interrupt Mask Flag */
- uint flag_z; /* Zero Flag (inverted) */
- uint flag_c; /* Carry Flag */
- uint line_irq; /* Status of the IRQ line */
- uint line_nmi; /* Status of the NMI line */
- uint fastROM; /* SNES specific */
- uint ir; /* Instruction Register */
- uint irq_delay; /* delay 1 instruction before checking irq */
+ uint a; /* Accumulator */
+ uint b; /* holds high byte of accumulator */
+ uint x; /* Index Register X */
+ uint y; /* Index Register Y */
+ uint s; /* Stack Pointer */
+ uint pc; /* Program Counter */
+ uint ppc; /* Previous Program Counter */
+ uint pb; /* Program Bank (shifted left 16) */
+ uint db; /* Data Bank (shifted left 16) */
+ uint d; /* Direct Register */
+ uint flag_e; /* Emulation Mode Flag */
+ uint flag_m; /* Memory/Accumulator Select Flag */
+ uint flag_x; /* Index Select Flag */
+ uint flag_n; /* Negative Flag */
+ uint flag_v; /* Overflow Flag */
+ uint flag_d; /* Decimal Mode Flag */
+ uint flag_i; /* Interrupt Mask Flag */
+ uint flag_z; /* Zero Flag (inverted) */
+ uint flag_c; /* Carry Flag */
+ uint line_irq; /* Status of the IRQ line */
+ uint line_nmi; /* Status of the NMI line */
+ uint fastROM; /* SNES specific */
+ uint ir; /* Instruction Register */
+ uint irq_delay; /* delay 1 instruction before checking irq */
device_irq_acknowledge_callback int_ack; /* Interrupt Acknowledge */
legacy_cpu_device *device;
address_space *program;
- read8_delegate read_vector; /* Read vector override */
- uint stopped; /* Sets how the CPU is stopped */
+ read8_delegate read_vector; /* Read vector override */
+ uint stopped; /* Sets how the CPU is stopped */
void (*const *opcodes)(g65816i_cpu_struct *cpustate);
uint (*get_reg)(g65816i_cpu_struct *cpustate, int regnum);
void (*set_reg)(g65816i_cpu_struct *cpustate, int regnum, uint val);
@@ -125,51 +125,51 @@ extern void (*const g65816i_set_line[])(g65816i_cpu_struct *cpustate, int line,
extern int (*const g65816i_execute[])(g65816i_cpu_struct *cpustate, int cycles);
extern int bus_5A22_cycle_burst(g65816i_cpu_struct *cpustate, uint addr);
-#define REGISTER_A cpustate->a /* Accumulator */
-#define REGISTER_B cpustate->b /* Accumulator hi byte */
-#define REGISTER_X cpustate->x /* Index X Register */
-#define REGISTER_Y cpustate->y /* Index Y Register */
-#define REGISTER_S cpustate->s /* Stack Pointer */
-#define REGISTER_PC cpustate->pc /* Program Counter */
-#define REGISTER_PPC cpustate->ppc /* Previous Program Counter */
-#define REGISTER_PB cpustate->pb /* Program Bank */
-#define REGISTER_DB cpustate->db /* Data Bank */
-#define REGISTER_D cpustate->d /* Direct Register */
-#define FLAG_E cpustate->flag_e /* Emulation Mode Flag */
-#define FLAG_M cpustate->flag_m /* Memory/Accumulator Select Flag */
-#define FLAG_X cpustate->flag_x /* Index Select Flag */
-#define FLAG_N cpustate->flag_n /* Negative Flag */
-#define FLAG_V cpustate->flag_v /* Overflow Flag */
-#define FLAG_D cpustate->flag_d /* Decimal Mode Flag */
-#define FLAG_I cpustate->flag_i /* Interrupt Mask Flag */
-#define FLAG_Z cpustate->flag_z /* Zero Flag (inverted) */
-#define FLAG_C cpustate->flag_c /* Carry Flag */
-#define LINE_IRQ cpustate->line_irq /* Status of the IRQ line */
-#define LINE_NMI cpustate->line_nmi /* Status of the NMI line */
-#define REGISTER_IR cpustate->ir /* Instruction Register */
-#define INT_ACK cpustate->int_ack /* Interrupt Acknowledge function pointer */
-#define READ_VECTOR cpustate->read_vector /* Vector reading override */
-#define CLOCKS cpustate->ICount /* Clock cycles remaining */
-#define IRQ_DELAY cpustate->irq_delay /* Delay 1 instruction before checking IRQ */
-#define CPU_STOPPED cpustate->stopped /* Stopped status of the CPU */
-
-#define FTABLE_OPCODES cpustate->opcodes
-#define FTABLE_GET_REG cpustate->get_reg
-#define FTABLE_SET_REG cpustate->set_reg
-#define FTABLE_SET_LINE cpustate->set_line
-#define FTABLE_EXECUTE cpustate->execute
-
-#define SRC cpustate->source /* Source Operand */
-#define DST cpustate->destination /* Destination Operand */
-
-#define STOP_LEVEL_WAI 1
-#define STOP_LEVEL_STOP 2
-
-#define EXECUTION_MODE_M0X0 0
-#define EXECUTION_MODE_M0X1 1
-#define EXECUTION_MODE_M1X0 2
-#define EXECUTION_MODE_M1X1 3
-#define EXECUTION_MODE_E 4
+#define REGISTER_A cpustate->a /* Accumulator */
+#define REGISTER_B cpustate->b /* Accumulator hi byte */
+#define REGISTER_X cpustate->x /* Index X Register */
+#define REGISTER_Y cpustate->y /* Index Y Register */
+#define REGISTER_S cpustate->s /* Stack Pointer */
+#define REGISTER_PC cpustate->pc /* Program Counter */
+#define REGISTER_PPC cpustate->ppc /* Previous Program Counter */
+#define REGISTER_PB cpustate->pb /* Program Bank */
+#define REGISTER_DB cpustate->db /* Data Bank */
+#define REGISTER_D cpustate->d /* Direct Register */
+#define FLAG_E cpustate->flag_e /* Emulation Mode Flag */
+#define FLAG_M cpustate->flag_m /* Memory/Accumulator Select Flag */
+#define FLAG_X cpustate->flag_x /* Index Select Flag */
+#define FLAG_N cpustate->flag_n /* Negative Flag */
+#define FLAG_V cpustate->flag_v /* Overflow Flag */
+#define FLAG_D cpustate->flag_d /* Decimal Mode Flag */
+#define FLAG_I cpustate->flag_i /* Interrupt Mask Flag */
+#define FLAG_Z cpustate->flag_z /* Zero Flag (inverted) */
+#define FLAG_C cpustate->flag_c /* Carry Flag */
+#define LINE_IRQ cpustate->line_irq /* Status of the IRQ line */
+#define LINE_NMI cpustate->line_nmi /* Status of the NMI line */
+#define REGISTER_IR cpustate->ir /* Instruction Register */
+#define INT_ACK cpustate->int_ack /* Interrupt Acknowledge function pointer */
+#define READ_VECTOR cpustate->read_vector /* Vector reading override */
+#define CLOCKS cpustate->ICount /* Clock cycles remaining */
+#define IRQ_DELAY cpustate->irq_delay /* Delay 1 instruction before checking IRQ */
+#define CPU_STOPPED cpustate->stopped /* Stopped status of the CPU */
+
+#define FTABLE_OPCODES cpustate->opcodes
+#define FTABLE_GET_REG cpustate->get_reg
+#define FTABLE_SET_REG cpustate->set_reg
+#define FTABLE_SET_LINE cpustate->set_line
+#define FTABLE_EXECUTE cpustate->execute
+
+#define SRC cpustate->source /* Source Operand */
+#define DST cpustate->destination /* Destination Operand */
+
+#define STOP_LEVEL_WAI 1
+#define STOP_LEVEL_STOP 2
+
+#define EXECUTION_MODE_M0X0 0
+#define EXECUTION_MODE_M0X1 1
+#define EXECUTION_MODE_M1X0 2
+#define EXECUTION_MODE_M1X1 3
+#define EXECUTION_MODE_E 4
INLINE void g65816i_set_execution_mode(g65816i_cpu_struct *cpustate, uint mode)
{
@@ -182,80 +182,80 @@ INLINE void g65816i_set_execution_mode(g65816i_cpu_struct *cpustate, uint mode)
-#define VECTOR_RESET 0xfffc /* Reset */
-#define VECTOR_IRQ_E 0xfffe /* Interrupt Request */
-#define VECTOR_NMI_E 0xfffa /* Non-Maskable Interrupt */
-#define VECTOR_ABORT_E 0xfff8 /* ABORT asserted */
-#define VECTOR_BRK_E 0xfffe /* Break Instruction */
-#define VECTOR_COP_E 0xfff4 /* Coprocessor instruction */
+#define VECTOR_RESET 0xfffc /* Reset */
+#define VECTOR_IRQ_E 0xfffe /* Interrupt Request */
+#define VECTOR_NMI_E 0xfffa /* Non-Maskable Interrupt */
+#define VECTOR_ABORT_E 0xfff8 /* ABORT asserted */
+#define VECTOR_BRK_E 0xfffe /* Break Instruction */
+#define VECTOR_COP_E 0xfff4 /* Coprocessor instruction */
-#define VECTOR_IRQ_N 0xffee /* Interrupt Request */
-#define VECTOR_NMI_N 0xffea /* Non-Maskable Interrupt */
-#define VECTOR_ABORT_N 0xffe8 /* ABORT asserted */
-#define VECTOR_BRK_N 0xffe6 /* Break Instruction */
-#define VECTOR_COP_N 0xffe4 /* Coprocessor instruction */
+#define VECTOR_IRQ_N 0xffee /* Interrupt Request */
+#define VECTOR_NMI_N 0xffea /* Non-Maskable Interrupt */
+#define VECTOR_ABORT_N 0xffe8 /* ABORT asserted */
+#define VECTOR_BRK_N 0xffe6 /* Break Instruction */
+#define VECTOR_COP_N 0xffe4 /* Coprocessor instruction */
/* ======================================================================== */
/* ================================= CLOCK ================================ */
/* ======================================================================== */
-#define CLK_OP 1
-#define CLK_R8 cpustate->rw8_cycles
-#define CLK_R16 cpustate->rw16_cycles
-#define CLK_R24 cpustate->rw24_cycles
-#define CLK_W8 cpustate->rw8_cycles
-#define CLK_W16 cpustate->rw16_cycles
-#define CLK_W24 cpustate->rw24_cycles
-#define CLK_RMW8 cpustate->rw8_cycles+cpustate->rw8_cycles + 1
-#define CLK_RMW16 cpustate->rw16_cycles+cpustate->rw16_cycles + 1
-
-#define CLK_IMPLIED 1
-#define CLK_IMPLIED 1
-#define CLK_RELATIVE_8 1
-#define CLK_RELATIVE_16 2
-#define CLK_IMM 0
-#define CLK_AI 4
-#define CLK_AXI 4
-#define CLK_A 2
-#define CLK_AL 3
-#define CLK_ALX 3
-#define CLK_AX 2
-#define CLK_AY 2
-#define CLK_D 1
-#define CLK_DI 3
-#define CLK_DIY 3
-#define CLK_DLI 4
-#define CLK_DLIY 4
-#define CLK_DX 2
-#define CLK_DXI 4
-#define CLK_DY 2
-#define CLK_S 2
-#define CLK_SIY 5
+#define CLK_OP 1
+#define CLK_R8 cpustate->rw8_cycles
+#define CLK_R16 cpustate->rw16_cycles
+#define CLK_R24 cpustate->rw24_cycles
+#define CLK_W8 cpustate->rw8_cycles
+#define CLK_W16 cpustate->rw16_cycles
+#define CLK_W24 cpustate->rw24_cycles
+#define CLK_RMW8 cpustate->rw8_cycles+cpustate->rw8_cycles + 1
+#define CLK_RMW16 cpustate->rw16_cycles+cpustate->rw16_cycles + 1
+
+#define CLK_IMPLIED 1
+#define CLK_IMPLIED 1
+#define CLK_RELATIVE_8 1
+#define CLK_RELATIVE_16 2
+#define CLK_IMM 0
+#define CLK_AI 4
+#define CLK_AXI 4
+#define CLK_A 2
+#define CLK_AL 3
+#define CLK_ALX 3
+#define CLK_AX 2
+#define CLK_AY 2
+#define CLK_D 1
+#define CLK_DI 3
+#define CLK_DIY 3
+#define CLK_DLI 4
+#define CLK_DLIY 4
+#define CLK_DX 2
+#define CLK_DXI 4
+#define CLK_DY 2
+#define CLK_S 2
+#define CLK_SIY 5
/* AX and AY addressing modes take 1 extra cycle when writing */
-#define CLK_W_IMM 0
-#define CLK_W_AI 4
-#define CLK_W_AXI 4
-#define CLK_W_A 2
-#define CLK_W_AL 3
-#define CLK_W_ALX 3
-#define CLK_W_AX 3
-#define CLK_W_AY 3
-#define CLK_W_D 1
-#define CLK_W_DI 3
-#define CLK_W_DIY 3
-#define CLK_W_DLI 4
-#define CLK_W_DLIY 4
-#define CLK_W_DX 2
-#define CLK_W_DXI 4
-#define CLK_W_DY 2
-#define CLK_W_S 2
-#define CLK_W_SIY 5
-
-#define CLK(A) CLOCKS -= (cpustate->cpu_type == CPU_TYPE_G65816 ? A : A*6)
-#define CLK_BUS(A) CLOCKS -= A
-#define USE_ALL_CLKS() CLOCKS = 0
+#define CLK_W_IMM 0
+#define CLK_W_AI 4
+#define CLK_W_AXI 4
+#define CLK_W_A 2
+#define CLK_W_AL 3
+#define CLK_W_ALX 3
+#define CLK_W_AX 3
+#define CLK_W_AY 3
+#define CLK_W_D 1
+#define CLK_W_DI 3
+#define CLK_W_DIY 3
+#define CLK_W_DLI 4
+#define CLK_W_DLIY 4
+#define CLK_W_DX 2
+#define CLK_W_DXI 4
+#define CLK_W_DY 2
+#define CLK_W_S 2
+#define CLK_W_SIY 5
+
+#define CLK(A) CLOCKS -= (cpustate->cpu_type == CPU_TYPE_G65816 ? A : A*6)
+#define CLK_BUS(A) CLOCKS -= A
+#define USE_ALL_CLKS() CLOCKS = 0
/* ======================================================================== */
@@ -264,62 +264,62 @@ INLINE void g65816i_set_execution_mode(g65816i_cpu_struct *cpustate, uint mode)
/* Flag positions in Processor Status Register */
/* common */
-#define FLAGPOS_N BIT_7 /* Negative */
-#define FLAGPOS_V BIT_6 /* Overflow */
-#define FLAGPOS_D BIT_3 /* Decimal Mode */
-#define FLAGPOS_I BIT_2 /* Interrupt Mask */
-#define FLAGPOS_Z BIT_1 /* Zero */
-#define FLAGPOS_C BIT_0 /* Carry */
+#define FLAGPOS_N BIT_7 /* Negative */
+#define FLAGPOS_V BIT_6 /* Overflow */
+#define FLAGPOS_D BIT_3 /* Decimal Mode */
+#define FLAGPOS_I BIT_2 /* Interrupt Mask */
+#define FLAGPOS_Z BIT_1 /* Zero */
+#define FLAGPOS_C BIT_0 /* Carry */
/* emulation */
-#define FLAGPOS_R BIT_5 /* Reserved */
-#define FLAGPOS_B BIT_4 /* BRK Instruction */
+#define FLAGPOS_R BIT_5 /* Reserved */
+#define FLAGPOS_B BIT_4 /* BRK Instruction */
/* native */
-#define FLAGPOS_M BIT_5 /* Mem/Reg Select */
-#define FLAGPOS_X BIT_4 /* Index Select */
-
-#define EFLAG_SET 1
-#define EFLAG_CLEAR 0
-#define MFLAG_SET FLAGPOS_M
-#define MFLAG_CLEAR 0
-#define XFLAG_SET FLAGPOS_X
-#define XFLAG_CLEAR 0
-#define NFLAG_SET 0x80
-#define NFLAG_CLEAR 0
-#define VFLAG_SET 0x80
-#define VFLAG_CLEAR 0
-#define DFLAG_SET FLAGPOS_D
-#define DFLAG_CLEAR 0
-#define IFLAG_SET FLAGPOS_I
-#define IFLAG_CLEAR 0
-#define BFLAG_SET FLAGPOS_B
-#define BFLAG_CLEAR 0
-#define ZFLAG_SET 0
-#define ZFLAG_CLEAR 1
-#define CFLAG_SET 0x100
-#define CFLAG_CLEAR 0
+#define FLAGPOS_M BIT_5 /* Mem/Reg Select */
+#define FLAGPOS_X BIT_4 /* Index Select */
+
+#define EFLAG_SET 1
+#define EFLAG_CLEAR 0
+#define MFLAG_SET FLAGPOS_M
+#define MFLAG_CLEAR 0
+#define XFLAG_SET FLAGPOS_X
+#define XFLAG_CLEAR 0
+#define NFLAG_SET 0x80
+#define NFLAG_CLEAR 0
+#define VFLAG_SET 0x80
+#define VFLAG_CLEAR 0
+#define DFLAG_SET FLAGPOS_D
+#define DFLAG_CLEAR 0
+#define IFLAG_SET FLAGPOS_I
+#define IFLAG_CLEAR 0
+#define BFLAG_SET FLAGPOS_B
+#define BFLAG_CLEAR 0
+#define ZFLAG_SET 0
+#define ZFLAG_CLEAR 1
+#define CFLAG_SET 0x100
+#define CFLAG_CLEAR 0
/* Codition code tests */
-#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
-#define COND_CS() (FLAG_C&0x100) /* Carry Set */
-#define COND_EQ() (!FLAG_Z) /* Equal */
-#define COND_NE() FLAG_Z /* Not Equal */
-#define COND_MI() (FLAG_N&0x80) /* Minus */
-#define COND_PL() (!(FLAG_N&0x80)) /* Plus */
-#define COND_VC() (!(FLAG_V&0x80)) /* Overflow Clear */
-#define COND_VS() (FLAG_V&0x80) /* Overflow Set */
+#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
+#define COND_CS() (FLAG_C&0x100) /* Carry Set */
+#define COND_EQ() (!FLAG_Z) /* Equal */
+#define COND_NE() FLAG_Z /* Not Equal */
+#define COND_MI() (FLAG_N&0x80) /* Minus */
+#define COND_PL() (!(FLAG_N&0x80)) /* Plus */
+#define COND_VC() (!(FLAG_V&0x80)) /* Overflow Clear */
+#define COND_VS() (FLAG_V&0x80) /* Overflow Set */
/* Set Overflow flag in math operations */
-#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
-#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
-#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
-#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
+#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
+#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
+#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
+#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
-#define CFLAG_8(A) (A)
-#define CFLAG_16(A) ((A)>>8)
-#define NFLAG_8(A) (A)
-#define NFLAG_16(A) ((A)>>8)
+#define CFLAG_8(A) (A)
+#define CFLAG_16(A) ((A)>>8)
+#define NFLAG_8(A) (A)
+#define NFLAG_16(A) ((A)>>8)
-#define CFLAG_AS_1() ((FLAG_C>>8)&1)
+#define CFLAG_AS_1() ((FLAG_C>>8)&1)
diff --git a/src/emu/cpu/g65816/g65816ds.c b/src/emu/cpu/g65816/g65816ds.c
index dd4a464e6c5..1228d7283ce 100644
--- a/src/emu/cpu/g65816/g65816ds.c
+++ b/src/emu/cpu/g65816/g65816ds.c
@@ -49,28 +49,28 @@ enum
enum
{
- ADC , AND , ASL , BCC , BCS , BEQ , BIT , BMI , BNE , BPL , BRA ,
- BRK , BRL , BVC , BVS , CLC , CLD , CLI , CLV , CMP , COP , CPX ,
- CPY , DEA , DEC , DEX , DEY , EOR , INA , INC , INX , INY , JML ,
- JMP , JSL , JSR , LDA , LDX , LDY , LSR , MVN , MVP , NOP , ORA ,
- PEA , PEI , PER , PHA , PHB , PHD , PHK , PHP , PHX , PHY , PLA ,
- PLB , PLD , PLP , PLX , PLY , REP , ROL , ROR , RTI , RTL , RTS ,
- SBC , SEC , SED , SEI , SEP , STA , STP , STX , STY , STZ , TAX ,
- TAY , TCS , TCD , TDC , TRB , TSB , TSC , TSX , TXA , TXS , TXY ,
- TYA , TYX , WAI , WDM , XBA , XCE
+ ADC , AND , ASL , BCC , BCS , BEQ , BIT , BMI , BNE , BPL , BRA ,
+ BRK , BRL , BVC , BVS , CLC , CLD , CLI , CLV , CMP , COP , CPX ,
+ CPY , DEA , DEC , DEX , DEY , EOR , INA , INC , INX , INY , JML ,
+ JMP , JSL , JSR , LDA , LDX , LDY , LSR , MVN , MVP , NOP , ORA ,
+ PEA , PEI , PER , PHA , PHB , PHD , PHK , PHP , PHX , PHY , PLA ,
+ PLB , PLD , PLP , PLX , PLY , REP , ROL , ROR , RTI , RTL , RTS ,
+ SBC , SEC , SED , SEI , SEP , STA , STP , STX , STY , STZ , TAX ,
+ TAY , TCS , TCD , TDC , TRB , TSB , TSC , TSX , TXA , TXS , TXY ,
+ TYA , TYX , WAI , WDM , XBA , XCE
};
static const char *const g_opnames[] =
{
- "ADC", "AND", "ASL", "BCC", "BCS", "BEQ", "BIT", "BMI", "BNE", "BPL", "BRA",
- "BRK", "BRL", "BVC", "BVS", "CLC", "CLD", "CLI", "CLV", "CMP", "COP", "CPX",
- "CPY", "DEA", "DEC", "DEX", "DEY", "EOR", "INA", "INC", "INX", "INY", "JML",
- "JMP", "JSL", "JSR", "LDA", "LDX", "LDY", "LSR", "MVN", "MVP", "NOP", "ORA",
- "PEA", "PEI", "PER", "PHA", "PHB", "PHD", "PHK", "PHP", "PHX", "PHY", "PLA",
- "PLB", "PLD", "PLP", "PLX", "PLY", "REP", "ROL", "ROR", "RTI", "RTL", "RTS",
- "SBC", "SEC", "SED", "SEI", "SEP", "STA", "STP", "STX", "STY", "STZ", "TAX",
- "TAY", "TCS", "TCD", "TDC", "TRB", "TSB", "TSC", "TSX", "TXA", "TXS", "TXY",
- "TYA", "TYX", "WAI", "WDM", "XBA", "XCE"
+ "ADC", "AND", "ASL", "BCC", "BCS", "BEQ", "BIT", "BMI", "BNE", "BPL", "BRA",
+ "BRK", "BRL", "BVC", "BVS", "CLC", "CLD", "CLI", "CLV", "CMP", "COP", "CPX",
+ "CPY", "DEA", "DEC", "DEX", "DEY", "EOR", "INA", "INC", "INX", "INY", "JML",
+ "JMP", "JSL", "JSR", "LDA", "LDX", "LDY", "LSR", "MVN", "MVP", "NOP", "ORA",
+ "PEA", "PEI", "PER", "PHA", "PHB", "PHD", "PHK", "PHP", "PHX", "PHY", "PLA",
+ "PLB", "PLD", "PLP", "PLX", "PLY", "REP", "ROL", "ROR", "RTI", "RTL", "RTS",
+ "SBC", "SEC", "SED", "SEI", "SEP", "STA", "STP", "STX", "STY", "STZ", "TAX",
+ "TAY", "TCS", "TCD", "TDC", "TRB", "TSB", "TSC", "TSX", "TXA", "TXS", "TXY",
+ "TYA", "TYX", "WAI", "WDM", "XBA", "XCE"
};
static const opcode_struct g_opcodes[256] =
@@ -165,30 +165,30 @@ INLINE unsigned int read_24(unsigned int address)
INLINE char* int_8_str(unsigned int val)
{
- static char str[20];
+ static char str[20];
- val &= 0xff;
+ val &= 0xff;
- if(val & 0x80)
- sprintf(str, "-$%x", (0-val) & 0x7f);
- else
- sprintf(str, "$%x", val & 0x7f);
+ if(val & 0x80)
+ sprintf(str, "-$%x", (0-val) & 0x7f);
+ else
+ sprintf(str, "$%x", val & 0x7f);
- return str;
+ return str;
}
INLINE char* int_16_str(unsigned int val)
{
- static char str[20];
+ static char str[20];
- val &= 0xffff;
+ val &= 0xffff;
- if(val & 0x8000)
- sprintf(str, "-$%x", (0-val) & 0x7fff);
- else
- sprintf(str, "$%x", val & 0x7fff);
+ if(val & 0x8000)
+ sprintf(str, "-$%x", (0-val) & 0x7fff);
+ else
+ sprintf(str, "$%x", val & 0x7fff);
- return str;
+ return str;
}
diff --git a/src/emu/cpu/g65816/g65816op.h b/src/emu/cpu/g65816/g65816op.h
index a56e85abc65..2748b37aa5a 100644
--- a/src/emu/cpu/g65816/g65816op.h
+++ b/src/emu/cpu/g65816/g65816op.h
@@ -35,17 +35,17 @@
#undef VECTOR_COP
#if FLAG_SET_E
-#define VECTOR_IRQ VECTOR_IRQ_E
-#define VECTOR_NMI VECTOR_NMI_E
-#define VECTOR_ABORT VECTOR_ABORT_E
-#define VECTOR_BRK VECTOR_BRK_E
-#define VECTOR_COP VECTOR_COP_E
+#define VECTOR_IRQ VECTOR_IRQ_E
+#define VECTOR_NMI VECTOR_NMI_E
+#define VECTOR_ABORT VECTOR_ABORT_E
+#define VECTOR_BRK VECTOR_BRK_E
+#define VECTOR_COP VECTOR_COP_E
#else /* FLAG_SET_E */
-#define VECTOR_IRQ VECTOR_IRQ_N
-#define VECTOR_NMI VECTOR_NMI_N
-#define VECTOR_ABORT VECTOR_ABORT_N
-#define VECTOR_BRK VECTOR_BRK_N
-#define VECTOR_COP VECTOR_COP_N
+#define VECTOR_IRQ VECTOR_IRQ_N
+#define VECTOR_NMI VECTOR_NMI_N
+#define VECTOR_ABORT VECTOR_ABORT_N
+#define VECTOR_BRK VECTOR_BRK_N
+#define VECTOR_COP VECTOR_COP_N
#endif
@@ -111,13 +111,13 @@ INLINE void g65816i_write_8_direct(g65816i_cpu_struct *cpustate, uint address, u
INLINE uint g65816i_read_16_normal(g65816i_cpu_struct *cpustate, uint address)
{
- return g65816i_read_8_normal(cpustate, address) |
+ return g65816i_read_8_normal(cpustate, address) |
(g65816i_read_8_normal(cpustate, address+1)<<8);
}
INLINE uint g65816i_read_16_immediate(g65816i_cpu_struct *cpustate, uint address)
{
- return g65816i_read_8_immediate(cpustate, address) |
+ return g65816i_read_8_immediate(cpustate, address) |
(g65816i_read_8_immediate(cpustate, address+1)<<8);
}
@@ -129,7 +129,7 @@ INLINE uint g65816i_read_16_direct(g65816i_cpu_struct *cpustate, uint address)
INLINE uint g65816i_read_16_vector(g65816i_cpu_struct *cpustate, uint address)
{
- return g65816i_read_8_vector(cpustate, address) |
+ return g65816i_read_8_vector(cpustate, address) |
(g65816i_read_8_vector(cpustate, address+1)<<8);
}
@@ -147,21 +147,21 @@ INLINE void g65816i_write_16_direct(g65816i_cpu_struct *cpustate, uint address,
INLINE uint g65816i_read_24_normal(g65816i_cpu_struct *cpustate, uint address)
{
- return g65816i_read_8_normal(cpustate, address) |
+ return g65816i_read_8_normal(cpustate, address) |
(g65816i_read_8_normal(cpustate, address+1)<<8) |
(g65816i_read_8_normal(cpustate, address+2)<<16);
}
INLINE uint g65816i_read_24_immediate(g65816i_cpu_struct *cpustate, uint address)
{
- return g65816i_read_8_immediate(cpustate, address) |
+ return g65816i_read_8_immediate(cpustate, address) |
(g65816i_read_8_immediate(cpustate, address+1)<<8) |
(g65816i_read_8_immediate(cpustate, address+2)<<16);
}
INLINE uint g65816i_read_24_direct(g65816i_cpu_struct *cpustate, uint address)
{
- return g65816i_read_8_direct(cpustate, address) |
+ return g65816i_read_8_direct(cpustate, address) |
(g65816i_read_8_direct(cpustate, address+1)<<8) |
(g65816i_read_8_direct(cpustate, address+2)<<16);
}
@@ -343,13 +343,13 @@ INLINE void g65816i_set_flag_i(g65816i_cpu_struct *cpustate, uint value)
/* Get the Processor Status Register */
INLINE uint g65816i_get_reg_p(g65816i_cpu_struct *cpustate)
{
- return (FLAG_N&0x80) |
- ((FLAG_V>>1)&0x40) |
- FLAG_M |
- FLAG_X |
- FLAG_D |
- FLAG_I |
- ((!FLAG_Z)<<1) |
+ return (FLAG_N&0x80) |
+ ((FLAG_V>>1)&0x40) |
+ FLAG_M |
+ FLAG_X |
+ FLAG_D |
+ FLAG_I |
+ ((!FLAG_Z)<<1) |
((FLAG_C>>8)&1);
}
@@ -461,169 +461,169 @@ INLINE void g65816i_check_maskable_interrupt(g65816i_cpu_struct *cpustate)
/* ======================================================================== */
/* Effective-address based memory access macros */
-#define read_8_NORM(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_IMM(A) g65816i_read_8_immediate(cpustate, A)
-#define read_8_D(A) g65816i_read_8_direct(cpustate, A)
-#define read_8_A(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_AL(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_DX(A) g65816i_read_8_direct(cpustate, A)
-#define read_8_DY(A) g65816i_read_8_direct(cpustate, A)
-#define read_8_AX(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_ALX(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_AY(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_DI(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_DLI(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_AI(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_ALI(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_DXI(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_DIY(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_DLIY(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_AXI(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_S(A) g65816i_read_8_normal(cpustate, A)
-#define read_8_SIY(A) g65816i_read_8_normal(cpustate, A)
-
-#define read_16_NORM(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_IMM(A) g65816i_read_16_immediate(cpustate, A)
-#define read_16_D(A) g65816i_read_16_direct(cpustate, A)
-#define read_16_A(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_AL(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_DX(A) g65816i_read_16_direct(cpustate, A)
-#define read_16_DY(A) g65816i_read_16_direct(cpustate, A)
-#define read_16_AX(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_ALX(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_AY(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_DI(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_DLI(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_AI(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_ALI(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_DXI(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_DIY(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_DLIY(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_AXI(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_S(A) g65816i_read_16_normal(cpustate, A)
-#define read_16_SIY(A) g65816i_read_16_normal(cpustate, A)
-
-#define read_24_NORM(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_IMM(A) g65816i_read_24_immediate(cpustate, A)
-#define read_24_D(A) g65816i_read_24_direct(cpustate, A)
-#define read_24_A(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_AL(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_DX(A) g65816i_read_24_direct(cpustate, A)
-#define read_24_DY(A) g65816i_read_24_direct(cpustate, A)
-#define read_24_AX(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_ALX(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_AY(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_DI(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_DLI(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_AI(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_ALI(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_DXI(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_DIY(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_DLIY(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_AXI(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_S(A) g65816i_read_24_normal(cpustate, A)
-#define read_24_SIY(A) g65816i_read_24_normal(cpustate, A)
-
-#define write_8_NORM(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_D(A, V) g65816i_write_8_direct(cpustate, A, V)
-#define write_8_A(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_AL(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_DX(A, V) g65816i_write_8_direct(cpustate, A, V)
-#define write_8_DY(A, V) g65816i_write_8_direct(cpustate, A, V)
-#define write_8_AX(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_ALX(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_AY(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_DI(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_DLI(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_AI(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_ALI(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_DXI(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_DIY(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_DLIY(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_AXI(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_S(A, V) g65816i_write_8_normal(cpustate, A, V)
-#define write_8_SIY(A, V) g65816i_write_8_normal(cpustate, A, V)
-
-#define write_16_NORM(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_D(A, V) g65816i_write_16_direct(cpustate, A, V)
-#define write_16_A(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_AL(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_DX(A, V) g65816i_write_16_direct(cpustate, A, V)
-#define write_16_DY(A, V) g65816i_write_16_direct(cpustate, A, V)
-#define write_16_AX(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_ALX(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_AY(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_DI(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_DLI(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_AI(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_ALI(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_DXI(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_DIY(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_DLIY(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_AXI(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_S(A, V) g65816i_write_16_normal(cpustate, A, V)
-#define write_16_SIY(A, V) g65816i_write_16_normal(cpustate, A, V)
-
-
-#define OPER_8_IMM(cpustate) read_8_IMM(EA_IMM8(cpustate))
-#define OPER_8_D(cpustate) read_8_D(EA_D(cpustate))
-#define OPER_8_A(cpustate) read_8_A(EA_A(cpustate))
-#define OPER_8_AL(cpustate) read_8_AL(EA_AL(cpustate))
-#define OPER_8_DX(cpustate) read_8_DX(EA_DX(cpustate))
-#define OPER_8_DY(cpustate) read_8_DY(EA_DY(cpustate))
-#define OPER_8_AX(cpustate) read_8_AX(EA_AX(cpustate))
-#define OPER_8_ALX(cpustate) read_8_ALX(EA_ALX(cpustate))
-#define OPER_8_AY(cpustate) read_8_AY(EA_AY(cpustate))
-#define OPER_8_DI(cpustate) read_8_DI(EA_DI(cpustate))
-#define OPER_8_DLI(cpustate) read_8_DLI(EA_DLI(cpustate))
-#define OPER_8_AI(cpustate) read_8_AI(EA_AI(cpustate))
-#define OPER_8_ALI(cpustate) read_8_ALI(EA_ALI(cpustate))
-#define OPER_8_DXI(cpustate) read_8_DXI(EA_DXI(cpustate))
-#define OPER_8_DIY(cpustate) read_8_DIY(EA_DIY(cpustate))
-#define OPER_8_DLIY(cpustate) read_8_DLIY(EA_DLIY(cpustate))
-#define OPER_8_AXI(cpustate) read_8_AXI(EA_AXI(cpustate))
-#define OPER_8_S(cpustate) read_8_S(EA_S(cpustate))
-#define OPER_8_SIY(cpustate) read_8_SIY(EA_SIY(cpustate))
-
-#define OPER_16_IMM(cpustate) read_16_IMM(EA_IMM16(cpustate))
-#define OPER_16_D(cpustate) read_16_D(EA_D(cpustate))
-#define OPER_16_A(cpustate) read_16_A(EA_A(cpustate))
-#define OPER_16_AL(cpustate) read_16_AL(EA_AL(cpustate))
-#define OPER_16_DX(cpustate) read_16_DX(EA_DX(cpustate))
-#define OPER_16_DY(cpustate) read_16_DY(EA_DY(cpustate))
-#define OPER_16_AX(cpustate) read_16_AX(EA_AX(cpustate))
-#define OPER_16_ALX(cpustate) read_16_ALX(EA_ALX(cpustate))
-#define OPER_16_AY(cpustate) read_16_AY(EA_AY(cpustate))
-#define OPER_16_DI(cpustate) read_16_DI(EA_DI(cpustate))
-#define OPER_16_DLI(cpustate) read_16_DLI(EA_DLI(cpustate))
-#define OPER_16_AI(cpustate) read_16_AI(EA_AI(cpustate))
-#define OPER_16_ALI(cpustate) read_16_ALI(EA_ALI(cpustate))
-#define OPER_16_DXI(cpustate) read_16_DXI(EA_DXI(cpustate))
-#define OPER_16_DIY(cpustate) read_16_DIY(EA_DIY(cpustate))
-#define OPER_16_DLIY(cpustate) read_16_DLIY(EA_DLIY(cpustate))
-#define OPER_16_AXI(cpustate) read_16_AXI(EA_AXI(cpustate))
-#define OPER_16_S(cpustate) read_16_S(EA_S(cpustate))
-#define OPER_16_SIY(cpustate) read_16_SIY(EA_SIY(cpustate))
-
-#define OPER_24_IMM(cpustate) read_24_IMM(EA_IMM24(cpustate))
-#define OPER_24_D(cpustate) read_24_D(EA_D(cpustate))
-#define OPER_24_A(cpustate) read_24_A(EA_A(cpustate))
-#define OPER_24_AL(cpustate) read_24_AL(EA_AL(cpustate))
-#define OPER_24_DX(cpustate) read_24_DX(EA_DX(cpustate))
-#define OPER_24_DY(cpustate) read_24_DY(EA_DY(cpustate))
-#define OPER_24_AX(cpustate) read_24_AX(EA_AX(cpustate))
-#define OPER_24_ALX(cpustate) read_24_ALX(EA_ALX(cpustate))
-#define OPER_24_AY(cpustate) read_24_AY(EA_AY(cpustate))
-#define OPER_24_DI(cpustate) read_24_DI(EA_DI(cpustate))
-#define OPER_24_DLI(cpustate) read_24_DLI(EA_DLI(cpustate))
-#define OPER_24_AI(cpustate) read_24_AI(EA_AI(cpustate))
-#define OPER_24_ALI(cpustate) read_24_ALI(EA_ALI(cpustate))
-#define OPER_24_DXI(cpustate) read_24_DXI(EA_DXI(cpustate))
-#define OPER_24_DIY(cpustate) read_24_DIY(EA_DIY(cpustate))
-#define OPER_24_DLIY(cpustate) read_24_DLIY(EA_DLIY(cpustate))
-#define OPER_24_AXI(cpustate) read_24_AXI(EA_AXI(cpustate))
-#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate))
-#define OPER_24_SIY(cpustate) read_24_SIY(EA_SIY(cpustate))
+#define read_8_NORM(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_IMM(A) g65816i_read_8_immediate(cpustate, A)
+#define read_8_D(A) g65816i_read_8_direct(cpustate, A)
+#define read_8_A(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_AL(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_DX(A) g65816i_read_8_direct(cpustate, A)
+#define read_8_DY(A) g65816i_read_8_direct(cpustate, A)
+#define read_8_AX(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_ALX(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_AY(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_DI(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_DLI(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_AI(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_ALI(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_DXI(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_DIY(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_DLIY(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_AXI(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_S(A) g65816i_read_8_normal(cpustate, A)
+#define read_8_SIY(A) g65816i_read_8_normal(cpustate, A)
+
+#define read_16_NORM(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_IMM(A) g65816i_read_16_immediate(cpustate, A)
+#define read_16_D(A) g65816i_read_16_direct(cpustate, A)
+#define read_16_A(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_AL(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_DX(A) g65816i_read_16_direct(cpustate, A)
+#define read_16_DY(A) g65816i_read_16_direct(cpustate, A)
+#define read_16_AX(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_ALX(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_AY(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_DI(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_DLI(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_AI(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_ALI(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_DXI(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_DIY(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_DLIY(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_AXI(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_S(A) g65816i_read_16_normal(cpustate, A)
+#define read_16_SIY(A) g65816i_read_16_normal(cpustate, A)
+
+#define read_24_NORM(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_IMM(A) g65816i_read_24_immediate(cpustate, A)
+#define read_24_D(A) g65816i_read_24_direct(cpustate, A)
+#define read_24_A(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_AL(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_DX(A) g65816i_read_24_direct(cpustate, A)
+#define read_24_DY(A) g65816i_read_24_direct(cpustate, A)
+#define read_24_AX(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_ALX(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_AY(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_DI(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_DLI(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_AI(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_ALI(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_DXI(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_DIY(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_DLIY(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_AXI(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_S(A) g65816i_read_24_normal(cpustate, A)
+#define read_24_SIY(A) g65816i_read_24_normal(cpustate, A)
+
+#define write_8_NORM(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_D(A, V) g65816i_write_8_direct(cpustate, A, V)
+#define write_8_A(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_AL(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_DX(A, V) g65816i_write_8_direct(cpustate, A, V)
+#define write_8_DY(A, V) g65816i_write_8_direct(cpustate, A, V)
+#define write_8_AX(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_ALX(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_AY(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_DI(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_DLI(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_AI(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_ALI(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_DXI(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_DIY(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_DLIY(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_AXI(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_S(A, V) g65816i_write_8_normal(cpustate, A, V)
+#define write_8_SIY(A, V) g65816i_write_8_normal(cpustate, A, V)
+
+#define write_16_NORM(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_D(A, V) g65816i_write_16_direct(cpustate, A, V)
+#define write_16_A(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_AL(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_DX(A, V) g65816i_write_16_direct(cpustate, A, V)
+#define write_16_DY(A, V) g65816i_write_16_direct(cpustate, A, V)
+#define write_16_AX(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_ALX(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_AY(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_DI(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_DLI(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_AI(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_ALI(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_DXI(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_DIY(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_DLIY(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_AXI(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_S(A, V) g65816i_write_16_normal(cpustate, A, V)
+#define write_16_SIY(A, V) g65816i_write_16_normal(cpustate, A, V)
+
+
+#define OPER_8_IMM(cpustate) read_8_IMM(EA_IMM8(cpustate))
+#define OPER_8_D(cpustate) read_8_D(EA_D(cpustate))
+#define OPER_8_A(cpustate) read_8_A(EA_A(cpustate))
+#define OPER_8_AL(cpustate) read_8_AL(EA_AL(cpustate))
+#define OPER_8_DX(cpustate) read_8_DX(EA_DX(cpustate))
+#define OPER_8_DY(cpustate) read_8_DY(EA_DY(cpustate))
+#define OPER_8_AX(cpustate) read_8_AX(EA_AX(cpustate))
+#define OPER_8_ALX(cpustate) read_8_ALX(EA_ALX(cpustate))
+#define OPER_8_AY(cpustate) read_8_AY(EA_AY(cpustate))
+#define OPER_8_DI(cpustate) read_8_DI(EA_DI(cpustate))
+#define OPER_8_DLI(cpustate) read_8_DLI(EA_DLI(cpustate))
+#define OPER_8_AI(cpustate) read_8_AI(EA_AI(cpustate))
+#define OPER_8_ALI(cpustate) read_8_ALI(EA_ALI(cpustate))
+#define OPER_8_DXI(cpustate) read_8_DXI(EA_DXI(cpustate))
+#define OPER_8_DIY(cpustate) read_8_DIY(EA_DIY(cpustate))
+#define OPER_8_DLIY(cpustate) read_8_DLIY(EA_DLIY(cpustate))
+#define OPER_8_AXI(cpustate) read_8_AXI(EA_AXI(cpustate))
+#define OPER_8_S(cpustate) read_8_S(EA_S(cpustate))
+#define OPER_8_SIY(cpustate) read_8_SIY(EA_SIY(cpustate))
+
+#define OPER_16_IMM(cpustate) read_16_IMM(EA_IMM16(cpustate))
+#define OPER_16_D(cpustate) read_16_D(EA_D(cpustate))
+#define OPER_16_A(cpustate) read_16_A(EA_A(cpustate))
+#define OPER_16_AL(cpustate) read_16_AL(EA_AL(cpustate))
+#define OPER_16_DX(cpustate) read_16_DX(EA_DX(cpustate))
+#define OPER_16_DY(cpustate) read_16_DY(EA_DY(cpustate))
+#define OPER_16_AX(cpustate) read_16_AX(EA_AX(cpustate))
+#define OPER_16_ALX(cpustate) read_16_ALX(EA_ALX(cpustate))
+#define OPER_16_AY(cpustate) read_16_AY(EA_AY(cpustate))
+#define OPER_16_DI(cpustate) read_16_DI(EA_DI(cpustate))
+#define OPER_16_DLI(cpustate) read_16_DLI(EA_DLI(cpustate))
+#define OPER_16_AI(cpustate) read_16_AI(EA_AI(cpustate))
+#define OPER_16_ALI(cpustate) read_16_ALI(EA_ALI(cpustate))
+#define OPER_16_DXI(cpustate) read_16_DXI(EA_DXI(cpustate))
+#define OPER_16_DIY(cpustate) read_16_DIY(EA_DIY(cpustate))
+#define OPER_16_DLIY(cpustate) read_16_DLIY(EA_DLIY(cpustate))
+#define OPER_16_AXI(cpustate) read_16_AXI(EA_AXI(cpustate))
+#define OPER_16_S(cpustate) read_16_S(EA_S(cpustate))
+#define OPER_16_SIY(cpustate) read_16_SIY(EA_SIY(cpustate))
+
+#define OPER_24_IMM(cpustate) read_24_IMM(EA_IMM24(cpustate))
+#define OPER_24_D(cpustate) read_24_D(EA_D(cpustate))
+#define OPER_24_A(cpustate) read_24_A(EA_A(cpustate))
+#define OPER_24_AL(cpustate) read_24_AL(EA_AL(cpustate))
+#define OPER_24_DX(cpustate) read_24_DX(EA_DX(cpustate))
+#define OPER_24_DY(cpustate) read_24_DY(EA_DY(cpustate))
+#define OPER_24_AX(cpustate) read_24_AX(EA_AX(cpustate))
+#define OPER_24_ALX(cpustate) read_24_ALX(EA_ALX(cpustate))
+#define OPER_24_AY(cpustate) read_24_AY(EA_AY(cpustate))
+#define OPER_24_DI(cpustate) read_24_DI(EA_DI(cpustate))
+#define OPER_24_DLI(cpustate) read_24_DLI(EA_DLI(cpustate))
+#define OPER_24_AI(cpustate) read_24_AI(EA_AI(cpustate))
+#define OPER_24_ALI(cpustate) read_24_ALI(EA_ALI(cpustate))
+#define OPER_24_DXI(cpustate) read_24_DXI(EA_DXI(cpustate))
+#define OPER_24_DIY(cpustate) read_24_DIY(EA_DIY(cpustate))
+#define OPER_24_DLIY(cpustate) read_24_DLIY(EA_DLIY(cpustate))
+#define OPER_24_AXI(cpustate) read_24_AXI(EA_AXI(cpustate))
+#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate))
+#define OPER_24_SIY(cpustate) read_24_SIY(EA_SIY(cpustate))
INLINE uint EA_IMM8(g65816i_cpu_struct *cpustate) {REGISTER_PC += 1; return REGISTER_PB | MAKE_UINT_16(REGISTER_PC-1);}
INLINE uint EA_IMM16(g65816i_cpu_struct *cpustate) {REGISTER_PC += 2; return REGISTER_PB | MAKE_UINT_16(REGISTER_PC-2);}
@@ -656,215 +656,215 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* M6502 Add With Carry */
#undef OP_ADC
#if FLAG_SET_M
-#define OP_ADC(MODE) \
- { \
- unsigned tmp16; \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- SRC = OPER_8_##MODE(cpustate); \
- if(FLAG_D) \
- { \
- INT32 result, r0, r1, carry; \
- r0 = REGISTER_A; \
- r1 = SRC; \
- carry = CFLAG_AS_1(); \
- result = (r0 & 0x0f) + (r1 & 0x0f) + (carry << 0); \
- if (result > 0x09) result += 0x06; \
- carry = result > 0x0f; \
- result = (r0 & 0xf0) + (r1 & 0xf0) + (carry << 4) + (result & 0x0f); \
- FLAG_V = ~(r0 ^ SRC) & (r0 ^ result) & 0x80; \
- if (result > 0x9f) result += 0x60; \
- FLAG_C = (result > 0xff) ? 0x100 : 0; \
- FLAG_N = (result & 0x80); \
- FLAG_Z = REGISTER_A = MAKE_UINT_8(result); \
- } \
- else \
- { \
- FLAG_C = tmp16 = REGISTER_A + SRC + CFLAG_AS_1(); \
- FLAG_V = VFLAG_ADD_8(SRC, REGISTER_A, FLAG_C); \
- FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(tmp16); \
- } \
+#define OP_ADC(MODE) \
+ { \
+ unsigned tmp16; \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ SRC = OPER_8_##MODE(cpustate); \
+ if(FLAG_D) \
+ { \
+ INT32 result, r0, r1, carry; \
+ r0 = REGISTER_A; \
+ r1 = SRC; \
+ carry = CFLAG_AS_1(); \
+ result = (r0 & 0x0f) + (r1 & 0x0f) + (carry << 0); \
+ if (result > 0x09) result += 0x06; \
+ carry = result > 0x0f; \
+ result = (r0 & 0xf0) + (r1 & 0xf0) + (carry << 4) + (result & 0x0f); \
+ FLAG_V = ~(r0 ^ SRC) & (r0 ^ result) & 0x80; \
+ if (result > 0x9f) result += 0x60; \
+ FLAG_C = (result > 0xff) ? 0x100 : 0; \
+ FLAG_N = (result & 0x80); \
+ FLAG_Z = REGISTER_A = MAKE_UINT_8(result); \
+ } \
+ else \
+ { \
+ FLAG_C = tmp16 = REGISTER_A + SRC + CFLAG_AS_1(); \
+ FLAG_V = VFLAG_ADD_8(SRC, REGISTER_A, FLAG_C); \
+ FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(tmp16); \
+ } \
}
#else
-#define OP_ADC(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- SRC = OPER_16_##MODE(cpustate); \
- INT32 result, r0, r1, carry; \
- r0 = REGISTER_A; \
- r1 = SRC; \
- carry = CFLAG_AS_1(); \
- if (!FLAG_D) \
- { \
- result = r0 + r1 + carry; \
- } \
- else \
- { \
- result = (r0 & 0x000f) + (r1 & 0x000f) + (carry << 0); \
- if(result > 0x0009) result += 0x0006; \
- carry = result > 0x000f; \
- result = (r0 & 0x00f0) + (r1 & 0x00f0) + (carry << 4) + (result & 0x000f); \
- if(result > 0x009f) result += 0x0060; \
- carry = result > 0x00ff; \
- result = (r0 & 0x0f00) + (r1 & 0x0f00) + (carry << 8) + (result & 0x00ff); \
- if(result > 0x09ff) result += 0x0600; \
- carry = result > 0x0fff; \
- result = (r0 & 0xf000) + (r1 & 0xf000) + (carry << 12) + (result & 0x0fff); \
- } \
- FLAG_V = ~(r0 ^ r1) & (r0 ^ result) & 0x8000; \
- FLAG_V >>= 8; \
- if (FLAG_D && result > 0x9fff) result += 0x6000; \
- FLAG_C = (result > 0xffff) ? 0x100 : 0; \
- FLAG_Z = REGISTER_A = MAKE_UINT_16(result); \
+#define OP_ADC(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ SRC = OPER_16_##MODE(cpustate); \
+ INT32 result, r0, r1, carry; \
+ r0 = REGISTER_A; \
+ r1 = SRC; \
+ carry = CFLAG_AS_1(); \
+ if (!FLAG_D) \
+ { \
+ result = r0 + r1 + carry; \
+ } \
+ else \
+ { \
+ result = (r0 & 0x000f) + (r1 & 0x000f) + (carry << 0); \
+ if(result > 0x0009) result += 0x0006; \
+ carry = result > 0x000f; \
+ result = (r0 & 0x00f0) + (r1 & 0x00f0) + (carry << 4) + (result & 0x000f); \
+ if(result > 0x009f) result += 0x0060; \
+ carry = result > 0x00ff; \
+ result = (r0 & 0x0f00) + (r1 & 0x0f00) + (carry << 8) + (result & 0x00ff); \
+ if(result > 0x09ff) result += 0x0600; \
+ carry = result > 0x0fff; \
+ result = (r0 & 0xf000) + (r1 & 0xf000) + (carry << 12) + (result & 0x0fff); \
+ } \
+ FLAG_V = ~(r0 ^ r1) & (r0 ^ result) & 0x8000; \
+ FLAG_V >>= 8; \
+ if (FLAG_D && result > 0x9fff) result += 0x6000; \
+ FLAG_C = (result > 0xffff) ? 0x100 : 0; \
+ FLAG_Z = REGISTER_A = MAKE_UINT_16(result); \
FLAG_N = NFLAG_16(REGISTER_A);
#endif
/* M6502 Logical AND with accumulator */
#undef OP_AND
#if FLAG_SET_M
-#define OP_AND(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_AND(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REGISTER_A &= OPER_8_##MODE(cpustate)
#else
-#define OP_AND(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REGISTER_A &= OPER_16_##MODE(cpustate); \
+#define OP_AND(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REGISTER_A &= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REGISTER_A)
#endif
/* M6502 Arithmetic Shift Left accumulator */
#undef OP_ASL
#if FLAG_SET_M
-#define OP_ASL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = REGISTER_A << 1; \
+#define OP_ASL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = REGISTER_A << 1; \
FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(FLAG_C)
#else
-#define OP_ASL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = REGISTER_A << 1; \
- FLAG_Z = REGISTER_A = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_ASL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = REGISTER_A << 1; \
+ FLAG_Z = REGISTER_A = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = CFLAG_16(FLAG_C)
#endif
/* M6502 Arithmetic Shift Left operand */
#undef OP_ASLM
#if FLAG_SET_M
-#define OP_ASLM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = read_8_##MODE(DST) << 1; \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_ASLM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = read_8_##MODE(DST) << 1; \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_ASLM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = read_16_##MODE(DST) << 1; \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
- FLAG_C = CFLAG_16(FLAG_C); \
+#define OP_ASLM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = read_16_##MODE(DST) << 1; \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
+ FLAG_C = CFLAG_16(FLAG_C); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M6502 Branch on Condition Code */
#undef OP_BCC
-#define OP_BCC(COND) \
- DST = OPER_8_IMM(cpustate); \
- if(COND) \
- { \
- CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
- g65816i_branch_8(cpustate, DST); \
- BREAKOUT; \
- } \
- CLK(CLK_OP + CLK_RELATIVE_8); \
+#define OP_BCC(COND) \
+ DST = OPER_8_IMM(cpustate); \
+ if(COND) \
+ { \
+ CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
+ g65816i_branch_8(cpustate, DST); \
+ BREAKOUT; \
+ } \
+ CLK(CLK_OP + CLK_RELATIVE_8); \
/* M6502 Set flags according to bits */
#undef OP_BIT
#if FLAG_SET_M
-#define OP_BIT(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- FLAG_N = OPER_8_##MODE(cpustate); \
- FLAG_Z = FLAG_N & REGISTER_A; \
+#define OP_BIT(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ FLAG_N = OPER_8_##MODE(cpustate); \
+ FLAG_Z = FLAG_N & REGISTER_A; \
FLAG_V = FLAG_N << 1
#else
-#define OP_BIT(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_N = OPER_16_##MODE(cpustate); \
- FLAG_Z = FLAG_N & REGISTER_A; \
- FLAG_N = NFLAG_16(FLAG_N); \
+#define OP_BIT(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_N = OPER_16_##MODE(cpustate); \
+ FLAG_Z = FLAG_N & REGISTER_A; \
+ FLAG_N = NFLAG_16(FLAG_N); \
FLAG_V = FLAG_N << 1
#endif
/* G65816 Set flags according to bits (immediate addressing mode) */
#undef OP_BITI
#if FLAG_SET_M
-#define OP_BITI() \
- CLK(CLK_OP + CLK_R8 + CLK_IMM); \
+#define OP_BITI() \
+ CLK(CLK_OP + CLK_R8 + CLK_IMM); \
FLAG_Z = REGISTER_A & OPER_8_IMM(cpustate)
#else
-#define OP_BITI() \
- CLK(CLK_OP + CLK_R16 + CLK_IMM); \
+#define OP_BITI() \
+ CLK(CLK_OP + CLK_R16 + CLK_IMM); \
FLAG_Z = REGISTER_A & OPER_16_IMM(cpustate)
#endif
/* M6502 Cause a Break interrupt */
#undef OP_BRK
-#define OP_BRK() \
- REGISTER_PC++; \
+#define OP_BRK() \
+ REGISTER_PC++; \
g65816i_interrupt_software(cpustate, VECTOR_BRK)
/* G65816 Branch Always */
#undef OP_BRA
-#define OP_BRA() \
- CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_8); \
+#define OP_BRA() \
+ CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_8); \
g65816i_branch_8(cpustate, OPER_8_IMM(cpustate))
/* G65816 Branch Always Long */
#undef OP_BRL
-#define OP_BRL() \
- CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_16); \
+#define OP_BRL() \
+ CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_16); \
g65816i_branch_16(cpustate, OPER_16_IMM(cpustate))
/* M6502 Clear Carry flag */
#undef OP_CLC
-#define OP_CLC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_CLC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_C = CFLAG_CLEAR
/* M6502 Clear Decimal flag */
#undef OP_CLD
-#define OP_CLD() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_CLD() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_D = DFLAG_CLEAR
/* M6502 Clear Interrupt Mask flag */
#undef OP_CLI
-#define OP_CLI() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_CLI() \
+ CLK(CLK_OP + CLK_IMPLIED); \
g65816i_set_flag_i(cpustate, IFLAG_CLEAR)
/* M6502 Clear oVerflow flag */
#undef OP_CLV
-#define OP_CLV() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_CLV() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_V = VFLAG_CLEAR
/* M6502 Compare operand to accumulator */
/* Unusual behavior: C flag is inverted */
#undef OP_CMP
#if FLAG_SET_M
-#define OP_CMP(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- FLAG_C = REGISTER_A - OPER_8_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_CMP(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ FLAG_C = REGISTER_A - OPER_8_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
FLAG_C ^= CFLAG_SET
#else
-#define OP_CMP(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_C = REGISTER_A - OPER_16_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_CMP(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_C = REGISTER_A - OPER_16_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = ~CFLAG_16(FLAG_C)
#endif
@@ -872,238 +872,238 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* Unusual behavior: C flag is inverted */
#undef OP_CMPX
#if FLAG_SET_X
-#define OP_CMPX(REG, MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- FLAG_C = REG - OPER_8_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_CMPX(REG, MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ FLAG_C = REG - OPER_8_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
FLAG_C ^= CFLAG_SET
#else
-#define OP_CMPX(REG, MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_C = REG - OPER_16_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_CMPX(REG, MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_C = REG - OPER_16_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = ~CFLAG_16(FLAG_C)
#endif
/* G65816 Coprocessor operation */
#undef OP_COP
-#define OP_COP() \
- REGISTER_PC++; \
+#define OP_COP() \
+ REGISTER_PC++; \
g65816i_interrupt_software(cpustate, VECTOR_COP)
/* M6502 Decrement accumulator */
#undef OP_DEC
#if FLAG_SET_M
-#define OP_DEC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_DEC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(REGISTER_A - 1)
#else
-#define OP_DEC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_A = MAKE_UINT_16(REGISTER_A - 1); \
+#define OP_DEC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_A = MAKE_UINT_16(REGISTER_A - 1); \
FLAG_N = NFLAG_16(REGISTER_A)
#endif
/* M6502 Decrement operand */
#undef OP_DECM
#if FLAG_SET_M
-#define OP_DECM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) - 1); \
+#define OP_DECM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) - 1); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_DECM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) - 1); \
- FLAG_N = NFLAG_16(FLAG_Z); \
+#define OP_DECM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) - 1); \
+ FLAG_N = NFLAG_16(FLAG_Z); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M6502 Decrement index register */
#undef OP_DECX
#if FLAG_SET_X
-#define OP_DECX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_DECX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG = MAKE_UINT_8(REG - 1)
#else
-#define OP_DECX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = MAKE_UINT_16(REG - 1); \
+#define OP_DECX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = MAKE_UINT_16(REG - 1); \
FLAG_N = NFLAG_16(REG)
#endif
/* M6502 Exclusive Or operand to accumulator */
#undef OP_EOR
#if FLAG_SET_M
-#define OP_EOR(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_EOR(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REGISTER_A ^= OPER_8_##MODE(cpustate)
#else
-#define OP_EOR(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REGISTER_A ^= OPER_16_##MODE(cpustate); \
+#define OP_EOR(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REGISTER_A ^= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REGISTER_A)
#endif
/* M6502 Increment accumulator */
#undef OP_INC
#if FLAG_SET_M
-#define OP_INC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_INC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(REGISTER_A + 1)
#else
-#define OP_INC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_A = MAKE_UINT_16(REGISTER_A + 1); \
+#define OP_INC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_A = MAKE_UINT_16(REGISTER_A + 1); \
FLAG_N = NFLAG_16(REGISTER_A)
#endif
/* M6502 Increment operand */
#undef OP_INCM
#if FLAG_SET_M
-#define OP_INCM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) + 1); \
+#define OP_INCM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) + 1); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_INCM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) + 1); \
- FLAG_N = NFLAG_16(FLAG_Z); \
+#define OP_INCM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) + 1); \
+ FLAG_N = NFLAG_16(FLAG_Z); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M6502 Increment index register */
#undef OP_INCX
#if FLAG_SET_X
-#define OP_INCX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_INCX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG = MAKE_UINT_8(REG + 1)
#else
-#define OP_INCX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = MAKE_UINT_16(REG + 1); \
+#define OP_INCX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = MAKE_UINT_16(REG + 1); \
FLAG_N = NFLAG_16(REG)
#endif
/* G65816 Jump Long */
#undef OP_JMLAI
-#define OP_JMLAI() \
- CLK(CLK_OP + CLK_AI + 1); \
+#define OP_JMLAI() \
+ CLK(CLK_OP + CLK_AI + 1); \
g65816i_jump_24(cpustate, read_24_A(OPER_16_IMM(cpustate)))
/* M6502 Jump */
#undef OP_JMP
-#define OP_JMP(MODE) \
- CLK(CLK_OP + CLK_##MODE); \
+#define OP_JMP(MODE) \
+ CLK(CLK_OP + CLK_##MODE); \
g65816i_jump_16(cpustate, EA_##MODE(cpustate))
/* M6502 Jump absolute indexed indirect */
#undef OP_JMPAXI
-#define OP_JMPAXI() \
- CLK(CLK_OP + CLK_AXI); \
+#define OP_JMPAXI() \
+ CLK(CLK_OP + CLK_AXI); \
g65816i_jump_16(cpustate, read_16_AXI(REGISTER_PB | (MAKE_UINT_16(OPER_16_IMM(cpustate) + REGISTER_X))))
/* G65816 Jump absolute long */
#undef OP_JMPAL
-#define OP_JMPAL() \
- CLK(CLK_OP + CLK_AL); \
+#define OP_JMPAL() \
+ CLK(CLK_OP + CLK_AL); \
g65816i_jump_24(cpustate, EA_AL(cpustate))
/* G65816 Jump to Subroutine Long */
/* Unusual behavior: stacks PC-1 */
#undef OP_JSL
-#define OP_JSL(MODE) \
- CLK(CLK_OP + CLK_W24 + CLK_##MODE + 1); \
- DST = EA_##MODE(cpustate); \
- g65816i_push_8(cpustate, REGISTER_PB>>16); \
- g65816i_push_16(cpustate, REGISTER_PC-1); \
+#define OP_JSL(MODE) \
+ CLK(CLK_OP + CLK_W24 + CLK_##MODE + 1); \
+ DST = EA_##MODE(cpustate); \
+ g65816i_push_8(cpustate, REGISTER_PB>>16); \
+ g65816i_push_16(cpustate, REGISTER_PC-1); \
g65816i_jump_24(cpustate, DST)
/* M6502 Jump to Subroutine */
/* Unusual behavior: stacks PC-1 */
#undef OP_JSR
-#define OP_JSR(MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_##MODE); \
- DST = EA_##MODE(cpustate); \
- g65816i_push_16(cpustate, REGISTER_PC-1); \
+#define OP_JSR(MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ g65816i_push_16(cpustate, REGISTER_PC-1); \
g65816i_jump_16(cpustate, DST)
/* M6502 Jump to Subroutine */
/* Unusual behavior: stacks PC-1 */
#undef OP_JSRAXI
-#define OP_JSRAXI() \
- CLK(CLK_OP + CLK_W16 + CLK_AXI); \
+#define OP_JSRAXI() \
+ CLK(CLK_OP + CLK_W16 + CLK_AXI); \
DST = read_16_AXI(REGISTER_PB | (MAKE_UINT_16(OPER_16_IMM(cpustate) + REGISTER_X))); \
- g65816i_push_16(cpustate, REGISTER_PC-1); \
+ g65816i_push_16(cpustate, REGISTER_PC-1); \
g65816i_jump_16(cpustate, DST)
/* M6502 Load accumulator with operand */
#undef OP_LDA
#if FLAG_SET_M
-#define OP_LDA(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_LDA(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REGISTER_A = OPER_8_##MODE(cpustate)
#else
-#define OP_LDA(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REGISTER_A = OPER_16_##MODE(cpustate); \
+#define OP_LDA(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REGISTER_A = OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REGISTER_A)
#endif
/* M6502 Load index register with operand */
#undef OP_LDX
#if FLAG_SET_X
-#define OP_LDX(REG, MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_LDX(REG, MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG = OPER_8_##MODE(cpustate)
#else
-#define OP_LDX(REG, MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG = OPER_16_##MODE(cpustate); \
+#define OP_LDX(REG, MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG = OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG)
#endif
/* M6502 Logical Shift Right accumulator */
#undef OP_LSR
#if FLAG_SET_M
-#define OP_LSR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_N = 0; \
- FLAG_C = REGISTER_A << 8; \
+#define OP_LSR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_N = 0; \
+ FLAG_C = REGISTER_A << 8; \
FLAG_Z = REGISTER_A >>= 1
#else
-#define OP_LSR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_N = 0; \
- FLAG_C = REGISTER_A << 8; \
+#define OP_LSR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_N = 0; \
+ FLAG_C = REGISTER_A << 8; \
FLAG_Z = REGISTER_A >>= 1
#endif
/* M6502 Logical Shift Right operand */
#undef OP_LSRM
#if FLAG_SET_M
-#define OP_LSRM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = 0; \
- FLAG_Z = read_8_##MODE(DST); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_Z >>= 1; \
+#define OP_LSRM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = 0; \
+ FLAG_Z = read_8_##MODE(DST); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_Z >>= 1; \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_LSRM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = 0; \
- FLAG_Z = read_16_##MODE(DST); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_Z >>= 1; \
+#define OP_LSRM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = 0; \
+ FLAG_Z = read_16_##MODE(DST); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_Z >>= 1; \
write_16_##MODE(DST, FLAG_Z)
#endif
@@ -1111,15 +1111,15 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#undef OP_MVN
#if FLAG_SET_M
#if FLAG_SET_X
-#define OP_MVN() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_8(REGISTER_X+1); \
- REGISTER_Y = MAKE_UINT_8(REGISTER_Y+1); \
- REGISTER_A--; \
+#define OP_MVN() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_8(REGISTER_X+1); \
+ REGISTER_Y = MAKE_UINT_8(REGISTER_Y+1); \
+ REGISTER_A--; \
REGISTER_A &= 0xff; \
if ((REGISTER_A&0xff) != 0xff) \
{\
@@ -1130,20 +1130,20 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
REGISTER_B -= 0x100;\
REGISTER_B &= 0xff00; \
if ((REGISTER_B & 0xff00) != 0xff00)\
- { \
+ { \
REGISTER_PC -= 3;\
- } \
+ } \
}
#else
-#define OP_MVN() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_16(REGISTER_X+1); \
- REGISTER_Y = MAKE_UINT_16(REGISTER_Y+1); \
- REGISTER_A--; \
+#define OP_MVN() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_16(REGISTER_X+1); \
+ REGISTER_Y = MAKE_UINT_16(REGISTER_Y+1); \
+ REGISTER_A--; \
REGISTER_A &= 0xff; \
if ((REGISTER_A&0xff) != 0xff) \
{\
@@ -1154,38 +1154,38 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
REGISTER_B -= 0x100;\
REGISTER_B &= 0xff00; \
if ((REGISTER_B & 0xff00) != 0xff00)\
- { \
+ { \
REGISTER_PC -= 3;\
- } \
+ } \
}
#endif
#else
#if FLAG_SET_X
-#define OP_MVN() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- REGISTER_A |= REGISTER_B; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_8(REGISTER_X+1); \
- REGISTER_Y = MAKE_UINT_8(REGISTER_Y+1); \
- REGISTER_A--; \
+#define OP_MVN() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ REGISTER_A |= REGISTER_B; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_8(REGISTER_X+1); \
+ REGISTER_Y = MAKE_UINT_8(REGISTER_Y+1); \
+ REGISTER_A--; \
if ((REGISTER_A&0xffff) != 0xffff) \
{\
REGISTER_PC -= 3; \
}
#else
-#define OP_MVN() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- REGISTER_A |= REGISTER_B; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_16(REGISTER_X+1); \
- REGISTER_Y = MAKE_UINT_16(REGISTER_Y+1); \
- REGISTER_A--; \
+#define OP_MVN() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ REGISTER_A |= REGISTER_B; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_16(REGISTER_X+1); \
+ REGISTER_Y = MAKE_UINT_16(REGISTER_Y+1); \
+ REGISTER_A--; \
if ((REGISTER_A&0xffff) != 0xffff) \
{\
REGISTER_PC -= 3; \
@@ -1197,15 +1197,15 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#undef OP_MVP
#if FLAG_SET_M
#if FLAG_SET_X
-#define OP_MVP() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_8(REGISTER_X-1); \
- REGISTER_Y = MAKE_UINT_8(REGISTER_Y-1); \
- REGISTER_A--; \
+#define OP_MVP() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_8(REGISTER_X-1); \
+ REGISTER_Y = MAKE_UINT_8(REGISTER_Y-1); \
+ REGISTER_A--; \
REGISTER_A &= 0xff; \
if ((REGISTER_A&0xff) != 0xff) \
{\
@@ -1216,20 +1216,20 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
REGISTER_B -= 0x100;\
REGISTER_B &= 0xff00; \
if ((REGISTER_B & 0xff00) != 0xff00)\
- { \
+ { \
REGISTER_PC -= 3;\
- } \
+ } \
}
#else
-#define OP_MVP() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_16(REGISTER_X-1); \
- REGISTER_Y = MAKE_UINT_16(REGISTER_Y-1); \
- REGISTER_A--; \
+#define OP_MVP() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_16(REGISTER_X-1); \
+ REGISTER_Y = MAKE_UINT_16(REGISTER_Y-1); \
+ REGISTER_A--; \
REGISTER_A &= 0xff; \
if ((REGISTER_A&0xff) != 0xff) \
{\
@@ -1240,38 +1240,38 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
REGISTER_B -= 0x100;\
REGISTER_B &= 0xff00; \
if ((REGISTER_B & 0xff00) != 0xff00)\
- { \
+ { \
REGISTER_PC -= 3;\
- } \
+ } \
}
#endif
#else
#if FLAG_SET_X
-#define OP_MVP() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- REGISTER_A |= REGISTER_B; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_8(REGISTER_X-1); \
- REGISTER_Y = MAKE_UINT_8(REGISTER_Y-1); \
- REGISTER_A--; \
+#define OP_MVP() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ REGISTER_A |= REGISTER_B; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_8(REGISTER_X-1); \
+ REGISTER_Y = MAKE_UINT_8(REGISTER_Y-1); \
+ REGISTER_A--; \
if ((REGISTER_A&0xffff) != 0xffff) \
{\
REGISTER_PC -= 3; \
}
#else
-#define OP_MVP() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REGISTER_DB = DST; \
- REGISTER_A |= REGISTER_B; \
- CLK(7); \
- write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
- REGISTER_X = MAKE_UINT_16(REGISTER_X-1); \
- REGISTER_Y = MAKE_UINT_16(REGISTER_Y-1); \
- REGISTER_A--; \
+#define OP_MVP() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REGISTER_DB = DST; \
+ REGISTER_A |= REGISTER_B; \
+ CLK(7); \
+ write_8_NORM(DST | REGISTER_Y, read_8_NORM(SRC | REGISTER_X)); \
+ REGISTER_X = MAKE_UINT_16(REGISTER_X-1); \
+ REGISTER_Y = MAKE_UINT_16(REGISTER_Y-1); \
+ REGISTER_A--; \
if ((REGISTER_A&0xffff) != 0xffff) \
{\
REGISTER_PC -= 3; \
@@ -1281,402 +1281,402 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* M6502 No Operation */
#undef OP_NOP
-#define OP_NOP() \
+#define OP_NOP() \
CLK(CLK_OP + CLK_IMPLIED)
/* M6502 Logical OR operand to accumulator */
#undef OP_ORA
#if FLAG_SET_M
-#define OP_ORA(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_ORA(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REGISTER_A |= OPER_8_ ## MODE(cpustate)
#else
-#define OP_ORA(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REGISTER_A |= OPER_16_##MODE(cpustate); \
+#define OP_ORA(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REGISTER_A |= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REGISTER_A)
#endif
/* G65816 Push Effective Address */
#undef OP_PEA
-#define OP_PEA() \
- CLK(CLK_OP + CLK_R16 + CLK_W16); \
+#define OP_PEA() \
+ CLK(CLK_OP + CLK_R16 + CLK_W16); \
g65816i_push_16(cpustate, OPER_16_IMM(cpustate))
/* G65816 Push Effective Indirect Address */
#undef OP_PEI
-#define OP_PEI() \
- CLK(CLK_OP + CLK_R16 + CLK_W16 + CLK_D); \
+#define OP_PEI() \
+ CLK(CLK_OP + CLK_R16 + CLK_W16 + CLK_D); \
g65816i_push_16(cpustate, EA_DI(cpustate))
/* G65816 Push Effective PC-Relative Address */
#undef OP_PER
-#define OP_PER() \
- CLK(CLK_OP + CLK_R16 + CLK_W16 + 1); \
- SRC = OPER_16_IMM(cpustate); \
+#define OP_PER() \
+ CLK(CLK_OP + CLK_R16 + CLK_W16 + 1); \
+ SRC = OPER_16_IMM(cpustate); \
g65816i_push_16(cpustate, REGISTER_PC + SRC)
/* M6502 Push accumulator to the stack */
#undef OP_PHA
#if FLAG_SET_M
-#define OP_PHA() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHA() \
+ CLK(CLK_OP + CLK_W8 + 1); \
g65816i_push_8(cpustate, REGISTER_A)
#else
-#define OP_PHA() \
- CLK(CLK_OP + CLK_W16 + 1); \
+#define OP_PHA() \
+ CLK(CLK_OP + CLK_W16 + 1); \
g65816i_push_16(cpustate, REGISTER_A)
#endif
/* M6502 Push index register to the stack */
#undef OP_PHX
#if FLAG_SET_X
-#define OP_PHX(REG) \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHX(REG) \
+ CLK(CLK_OP + CLK_W8 + 1); \
g65816i_push_8(cpustate, REG)
#else
-#define OP_PHX(REG) \
- CLK(CLK_OP + CLK_W16 + 1); \
+#define OP_PHX(REG) \
+ CLK(CLK_OP + CLK_W16 + 1); \
g65816i_push_16(cpustate, REG)
#endif
/* G65816 Push data bank register */
#undef OP_PHB
-#define OP_PHB() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHB() \
+ CLK(CLK_OP + CLK_W8 + 1); \
g65816i_push_8(cpustate, REGISTER_DB>>16)
/* G65816 Push direct register */
#undef OP_PHD
-#define OP_PHD() \
- CLK(CLK_OP + CLK_W16 + 1); \
+#define OP_PHD() \
+ CLK(CLK_OP + CLK_W16 + 1); \
g65816i_push_16(cpustate, REGISTER_D)
/* G65816 Push program bank register */
#undef OP_PHK
-#define OP_PHK() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHK() \
+ CLK(CLK_OP + CLK_W8 + 1); \
g65816i_push_8(cpustate, REGISTER_PB>>16)
/* M6502 Push the Processor Status Register to the stack */
#undef OP_PHP
-#define OP_PHP() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHP() \
+ CLK(CLK_OP + CLK_W8 + 1); \
g65816i_push_8(cpustate, g65816i_get_reg_p(cpustate))
/* M6502 Pull accumulator from the stack */
#undef OP_PLA
#if FLAG_SET_M
-#define OP_PLA() \
- CLK(CLK_OP + CLK_R8 + 2); \
+#define OP_PLA() \
+ CLK(CLK_OP + CLK_R8 + 2); \
FLAG_N = FLAG_Z = REGISTER_A = g65816i_pull_8(cpustate)
#else
-#define OP_PLA() \
- CLK(CLK_OP + CLK_R16 + 2); \
- FLAG_Z = REGISTER_A = g65816i_pull_16(cpustate); \
+#define OP_PLA() \
+ CLK(CLK_OP + CLK_R16 + 2); \
+ FLAG_Z = REGISTER_A = g65816i_pull_16(cpustate); \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M6502 Pull index register from the stack */
#undef OP_PLX
#if FLAG_SET_X
-#define OP_PLX(REG) \
- CLK(CLK_OP + CLK_R8 + 2); \
+#define OP_PLX(REG) \
+ CLK(CLK_OP + CLK_R8 + 2); \
FLAG_N = FLAG_Z = REG = g65816i_pull_8(cpustate)
#else
-#define OP_PLX(REG) \
- CLK(CLK_OP + CLK_R16 + 2); \
- FLAG_Z = REG = g65816i_pull_16(cpustate); \
+#define OP_PLX(REG) \
+ CLK(CLK_OP + CLK_R16 + 2); \
+ FLAG_Z = REG = g65816i_pull_16(cpustate); \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* G65816 Pull data bank register */
#undef OP_PLB
-#define OP_PLB() \
- CLK(CLK_OP + CLK_R8 + 2); \
- FLAG_N = FLAG_Z = g65816i_pull_8(cpustate); \
+#define OP_PLB() \
+ CLK(CLK_OP + CLK_R8 + 2); \
+ FLAG_N = FLAG_Z = g65816i_pull_8(cpustate); \
REGISTER_DB = FLAG_Z << 16
/* G65816 Pull direct register */
#undef OP_PLD
-#define OP_PLD() \
- CLK(CLK_OP + CLK_R16 + 2); \
- FLAG_Z = REGISTER_D = g65816i_pull_16(cpustate); \
+#define OP_PLD() \
+ CLK(CLK_OP + CLK_R16 + 2); \
+ FLAG_Z = REGISTER_D = g65816i_pull_16(cpustate); \
FLAG_N = NFLAG_16(FLAG_Z)
/* M6502 Pull the Processor Status Register from the stack */
#undef OP_PLP
-#define OP_PLP() \
- CLK(CLK_OP + CLK_R8 + 2); \
+#define OP_PLP() \
+ CLK(CLK_OP + CLK_R8 + 2); \
g65816i_set_reg_p(cpustate, g65816i_pull_8(cpustate))
/* G65816 Reset Program status word */
#undef OP_REP
-#define OP_REP() \
- CLK(CLK_OP + CLK_R8 + 1); \
+#define OP_REP() \
+ CLK(CLK_OP + CLK_R8 + 1); \
g65816i_set_reg_p(cpustate, g65816i_get_reg_p(cpustate) & ~OPER_8_IMM(cpustate))
/* M6502 Rotate Left the accumulator */
#undef OP_ROL
#if FLAG_SET_M
-#define OP_ROL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = (REGISTER_A<<1) | CFLAG_AS_1(); \
+#define OP_ROL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = (REGISTER_A<<1) | CFLAG_AS_1(); \
FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(FLAG_C)
#else
-#define OP_ROL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = (REGISTER_A<<1) | CFLAG_AS_1(); \
- FLAG_Z = REGISTER_A = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_ROL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = (REGISTER_A<<1) | CFLAG_AS_1(); \
+ FLAG_Z = REGISTER_A = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = CFLAG_16(FLAG_C)
#endif
/* M6502 Rotate Left an operand */
#undef OP_ROLM
#if FLAG_SET_M
-#define OP_ROLM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = (read_8_##MODE(DST)<<1) | CFLAG_AS_1(); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_ROLM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = (read_8_##MODE(DST)<<1) | CFLAG_AS_1(); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_ROLM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = (read_16_##MODE(DST)<<1) | CFLAG_AS_1(); \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
- FLAG_C = CFLAG_16(FLAG_C); \
+#define OP_ROLM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = (read_16_##MODE(DST)<<1) | CFLAG_AS_1(); \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
+ FLAG_C = CFLAG_16(FLAG_C); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M6502 Rotate Right the accumulator */
#undef OP_ROR
#if FLAG_SET_M
-#define OP_ROR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- REGISTER_A |= FLAG_C & 0x100; \
- FLAG_C = REGISTER_A << 8; \
+#define OP_ROR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ REGISTER_A |= FLAG_C & 0x100; \
+ FLAG_C = REGISTER_A << 8; \
FLAG_N = FLAG_Z = REGISTER_A >>= 1
#else
-#define OP_ROR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- REGISTER_A |= (FLAG_C<<8) & 0x10000; \
- FLAG_C = REGISTER_A << 8; \
- FLAG_Z = REGISTER_A >>= 1; \
+#define OP_ROR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ REGISTER_A |= (FLAG_C<<8) & 0x10000; \
+ FLAG_C = REGISTER_A << 8; \
+ FLAG_Z = REGISTER_A >>= 1; \
FLAG_N = NFLAG_16(REGISTER_A)
#endif
/* M6502 Rotate Right an operand */
#undef OP_RORM
#if FLAG_SET_M
-#define OP_RORM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_8_##MODE(DST) | (FLAG_C & 0x100); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_N = FLAG_Z >>= 1; \
+#define OP_RORM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_8_##MODE(DST) | (FLAG_C & 0x100); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_N = FLAG_Z >>= 1; \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_RORM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_16_##MODE(DST) | ((FLAG_C<<8) & 0x10000); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_Z >>= 1; \
- FLAG_N = NFLAG_16(FLAG_Z); \
+#define OP_RORM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_16_##MODE(DST) | ((FLAG_C<<8) & 0x10000); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_Z >>= 1; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M6502 Return from Interrupt */
#undef OP_RTI
#if FLAG_SET_E
-#define OP_RTI() \
- CLK(7); \
- g65816i_set_reg_p(cpustate, g65816i_pull_8(cpustate)); \
+#define OP_RTI() \
+ CLK(7); \
+ g65816i_set_reg_p(cpustate, g65816i_pull_8(cpustate)); \
g65816i_jump_16(cpustate, g65816i_pull_16(cpustate))
#else
-#define OP_RTI() \
- CLK(8); \
- g65816i_set_reg_p(cpustate, g65816i_pull_8(cpustate)); \
- g65816i_jump_16(cpustate, g65816i_pull_16(cpustate)); \
+#define OP_RTI() \
+ CLK(8); \
+ g65816i_set_reg_p(cpustate, g65816i_pull_8(cpustate)); \
+ g65816i_jump_16(cpustate, g65816i_pull_16(cpustate)); \
REGISTER_PB = g65816i_pull_8(cpustate) << 16
#endif
/* G65816 Return from Subroutine Long */
/* Unusual behavior: Gets PC and increments */
#undef OP_RTL
-#define OP_RTL() \
- CLK(6); \
+#define OP_RTL() \
+ CLK(6); \
g65816i_jump_24(cpustate, g65816i_pull_24(cpustate))
/* M6502 Return from Subroutine */
/* Unusual behavior: Gets PC and increments */
#undef OP_RTS
-#define OP_RTS() \
- CLK(6); \
+#define OP_RTS() \
+ CLK(6); \
g65816i_jump_16(cpustate, g65816i_pull_16(cpustate)+1)
/* M6502 Subtract with Carry */
/* Unusual behavior: C flag is inverted */
#undef OP_SBC
#if FLAG_SET_M
-#define OP_SBC(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- SRC = OPER_8_##MODE(cpustate); \
- if(!FLAG_D) \
- { \
- FLAG_C = ~FLAG_C; \
- FLAG_C = REGISTER_A - SRC - CFLAG_AS_1(); \
- FLAG_V = VFLAG_SUB_8(SRC, REGISTER_A, FLAG_C); \
- FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(FLAG_C); \
- FLAG_C = ~FLAG_C; \
- BREAKOUT; \
- } \
- else \
- { \
- INT32 result, r0, r1, carry; \
- r0 = REGISTER_A; \
- r1 = SRC; \
- r1 ^= 0xff; \
- carry = CFLAG_AS_1(); \
- result = (r0 & 0x0f) + (r1 & 0x0f) + (carry << 0); \
- if (result <= 0x0f) result -= 0x06; \
- carry = result > 0x0f; \
- result = (r0 & 0xf0) + (r1 & 0xf0) + (carry << 4) + (result & 0x0f); \
- FLAG_V = ~(r0 ^ r1) & (r0 ^ result) & 0x80; \
- if (result <= 0xff) result -= 0x60; \
- FLAG_C = (result > 0xff) ? 0x100 : 0; \
- FLAG_N = (result & 0x80); \
- FLAG_Z = REGISTER_A = MAKE_UINT_8(result); \
+#define OP_SBC(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ SRC = OPER_8_##MODE(cpustate); \
+ if(!FLAG_D) \
+ { \
+ FLAG_C = ~FLAG_C; \
+ FLAG_C = REGISTER_A - SRC - CFLAG_AS_1(); \
+ FLAG_V = VFLAG_SUB_8(SRC, REGISTER_A, FLAG_C); \
+ FLAG_N = FLAG_Z = REGISTER_A = MAKE_UINT_8(FLAG_C); \
+ FLAG_C = ~FLAG_C; \
+ BREAKOUT; \
+ } \
+ else \
+ { \
+ INT32 result, r0, r1, carry; \
+ r0 = REGISTER_A; \
+ r1 = SRC; \
+ r1 ^= 0xff; \
+ carry = CFLAG_AS_1(); \
+ result = (r0 & 0x0f) + (r1 & 0x0f) + (carry << 0); \
+ if (result <= 0x0f) result -= 0x06; \
+ carry = result > 0x0f; \
+ result = (r0 & 0xf0) + (r1 & 0xf0) + (carry << 4) + (result & 0x0f); \
+ FLAG_V = ~(r0 ^ r1) & (r0 ^ result) & 0x80; \
+ if (result <= 0xff) result -= 0x60; \
+ FLAG_C = (result > 0xff) ? 0x100 : 0; \
+ FLAG_N = (result & 0x80); \
+ FLAG_Z = REGISTER_A = MAKE_UINT_8(result); \
}
#else
-#define OP_SBC(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- SRC = OPER_16_##MODE(cpustate); \
- INT32 result, r0, r1, carry; \
- r0 = REGISTER_A; \
- r1 = SRC; \
- r1 ^= 0xffff; \
- carry = CFLAG_AS_1(); \
- if (!FLAG_D) \
- { \
- result = r0 + r1 + carry; \
- } \
- else \
- { \
- result = (r0 & 0x000f) + (r1 & 0x000f) + (carry << 0); \
- if(result <= 0x000f) result -= 0x0006; \
- carry = result > 0x000f; \
- result = (r0 & 0x00f0) + (r1 & 0x00f0) + (carry << 4) + (result & 0x000f); \
- if(result <= 0x00ff) result -= 0x0060; \
- carry = result > 0x00ff; \
- result = (r0 & 0x0f00) + (r1 & 0x0f00) + (carry << 8) + (result & 0x00ff); \
- if(result <= 0x0fff) result -= 0x0600; \
- carry = result > 0x0fff; \
- result = (r0 & 0xf000) + (r1 & 0xf000) + (carry << 12) + (result & 0x0fff); \
- } \
- FLAG_V = ~(r0 ^ r1) & (r0 ^ result) & 0x8000; \
- FLAG_V >>= 8; \
- if (FLAG_D && result <= 0xffff) result -= 0x6000; \
- FLAG_C = (result > 0xffff) ? 0x100 : 0; \
- FLAG_Z = REGISTER_A = MAKE_UINT_16(result); \
+#define OP_SBC(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ SRC = OPER_16_##MODE(cpustate); \
+ INT32 result, r0, r1, carry; \
+ r0 = REGISTER_A; \
+ r1 = SRC; \
+ r1 ^= 0xffff; \
+ carry = CFLAG_AS_1(); \
+ if (!FLAG_D) \
+ { \
+ result = r0 + r1 + carry; \
+ } \
+ else \
+ { \
+ result = (r0 & 0x000f) + (r1 & 0x000f) + (carry << 0); \
+ if(result <= 0x000f) result -= 0x0006; \
+ carry = result > 0x000f; \
+ result = (r0 & 0x00f0) + (r1 & 0x00f0) + (carry << 4) + (result & 0x000f); \
+ if(result <= 0x00ff) result -= 0x0060; \
+ carry = result > 0x00ff; \
+ result = (r0 & 0x0f00) + (r1 & 0x0f00) + (carry << 8) + (result & 0x00ff); \
+ if(result <= 0x0fff) result -= 0x0600; \
+ carry = result > 0x0fff; \
+ result = (r0 & 0xf000) + (r1 & 0xf000) + (carry << 12) + (result & 0x0fff); \
+ } \
+ FLAG_V = ~(r0 ^ r1) & (r0 ^ result) & 0x8000; \
+ FLAG_V >>= 8; \
+ if (FLAG_D && result <= 0xffff) result -= 0x6000; \
+ FLAG_C = (result > 0xffff) ? 0x100 : 0; \
+ FLAG_Z = REGISTER_A = MAKE_UINT_16(result); \
FLAG_N = NFLAG_16(REGISTER_A);
#endif
/* M6502 Set Carry flag */
#undef OP_SEC
-#define OP_SEC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_SEC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_C = CFLAG_SET
/* M6502 Set Decimal flag */
#undef OP_SED
-#define OP_SED() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_SED() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_D = DFLAG_SET
/* M6502 Set Interrupt Mask flag */
#undef OP_SEI
-#define OP_SEI() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_SEI() \
+ CLK(CLK_OP + CLK_IMPLIED); \
g65816i_set_flag_i(cpustate, IFLAG_SET)
/* G65816 Set Program status word */
#undef OP_SEP
-#define OP_SEP() \
- CLK(CLK_OP + CLK_R8 + 1); \
+#define OP_SEP() \
+ CLK(CLK_OP + CLK_R8 + 1); \
g65816i_set_reg_p(cpustate, g65816i_get_reg_p(cpustate) | OPER_8_IMM(cpustate))
/* M6502 Store accumulator to memory */
#undef OP_STA
#if FLAG_SET_M
-#define OP_STA(MODE) \
- CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
+#define OP_STA(MODE) \
+ CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
write_8_##MODE(EA_##MODE(cpustate), REGISTER_A)
#else
-#define OP_STA(MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
+#define OP_STA(MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
write_16_##MODE(EA_##MODE(cpustate), REGISTER_A)
#endif
/* M6502 Store index register to memory */
#undef OP_STX
#if FLAG_SET_X
-#define OP_STX(REG, MODE) \
- CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
+#define OP_STX(REG, MODE) \
+ CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
write_8_##MODE(EA_##MODE(cpustate), REG)
#else
-#define OP_STX(REG, MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
+#define OP_STX(REG, MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
write_16_##MODE(EA_##MODE(cpustate), REG)
#endif
/* M6502 Store zero to memory */
#undef OP_STZ
#if FLAG_SET_M
-#define OP_STZ(MODE) \
- CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
+#define OP_STZ(MODE) \
+ CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
write_8_##MODE(EA_##MODE(cpustate), 0)
#else
-#define OP_STZ(MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
+#define OP_STZ(MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
write_16_##MODE(EA_##MODE(cpustate), 0)
#endif
/* G65816 Stop the clock */
#undef OP_STP
-#define OP_STP() \
- USE_ALL_CLKS(); \
+#define OP_STP() \
+ USE_ALL_CLKS(); \
CPU_STOPPED |= STOP_LEVEL_STOP
/* M6502 Transfer accumulator to index */
#undef OP_TAX
#if FLAG_SET_M
#if FLAG_SET_X
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REGISTER_A; \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REGISTER_A; \
FLAG_N = NFLAG_8(FLAG_Z)
#else /* FLAG_SET_X */
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REGISTER_B | REGISTER_A; \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REGISTER_B | REGISTER_A; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif /* FLAG_SET_X */
#else /* FLAG_SET_M */
#if FLAG_SET_X
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = MAKE_UINT_8(REGISTER_A); \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = MAKE_UINT_8(REGISTER_A); \
FLAG_N = NFLAG_8(FLAG_Z)
#else /* FLAG_SET_X */
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REGISTER_A; \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REGISTER_A; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif /* FLAG_SET_X */
#endif /* FLAG_SET_M */
@@ -1685,200 +1685,200 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* M6502 Transfer index to accumulator */
#undef OP_TXA
#if FLAG_SET_M
-#define OP_TXA(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_A = MAKE_UINT_8(REG); \
+#define OP_TXA(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_A = MAKE_UINT_8(REG); \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TXA(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_A = REG; \
+#define OP_TXA(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_A = REG; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* G65816 Transfer C to direct register */
#undef OP_TCD
#if FLAG_SET_M
-#define OP_TCD() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_D = REGISTER_A | REGISTER_B; \
+#define OP_TCD() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_D = REGISTER_A | REGISTER_B; \
FLAG_N = NFLAG_16(FLAG_Z)
#else
-#define OP_TCD() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_D = REGISTER_A; \
+#define OP_TCD() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_D = REGISTER_A; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* G65816 Transfer direct register to C */
#undef OP_TDC
#if FLAG_SET_M
-#define OP_TDC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_D; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- REGISTER_A = MAKE_UINT_8(REGISTER_D); \
+#define OP_TDC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_D; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ REGISTER_A = MAKE_UINT_8(REGISTER_D); \
REGISTER_B = REGISTER_D & 0xff00
#else
-#define OP_TDC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_A = REGISTER_D; \
+#define OP_TDC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_A = REGISTER_D; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* G65816 Transfer C to stack pointer */
#undef OP_TCS
#if FLAG_SET_E
-#define OP_TCS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TCS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REGISTER_S = MAKE_UINT_8(REGISTER_A) | 0x100
#else
-#define OP_TCS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TCS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REGISTER_S = REGISTER_A | REGISTER_B
#endif
/* G65816 Transfer stack pointer to C */
#undef OP_TSC
#if FLAG_SET_M
-#define OP_TSC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_S; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- REGISTER_A = MAKE_UINT_8(REGISTER_S); \
+#define OP_TSC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_S; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ REGISTER_A = MAKE_UINT_8(REGISTER_S); \
REGISTER_B = REGISTER_S & 0xff00
#else
-#define OP_TSC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_A = REGISTER_S; \
+#define OP_TSC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_A = REGISTER_S; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M6502 Transfer stack pointer to X */
#undef OP_TSX
#if FLAG_SET_X
-#define OP_TSX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_X = MAKE_UINT_8(REGISTER_S); \
+#define OP_TSX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_X = MAKE_UINT_8(REGISTER_S); \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TSX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_X = REGISTER_S; \
+#define OP_TSX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_X = REGISTER_S; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M6502 Transfer X to stack pointer */
#undef OP_TXS
#if FLAG_SET_E
-#define OP_TXS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TXS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REGISTER_S = MAKE_UINT_8(REGISTER_X) | 0x100
#else
-#define OP_TXS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TXS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REGISTER_S = REGISTER_X
#endif
/* G65816 Transfer X to Y */
#undef OP_TXY
#if FLAG_SET_X
-#define OP_TXY() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_Y = REGISTER_X; \
+#define OP_TXY() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_Y = REGISTER_X; \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TXY() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_Y = REGISTER_X; \
+#define OP_TXY() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_Y = REGISTER_X; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* G65816 Transfer Y to X */
#undef OP_TYX
#if FLAG_SET_X
-#define OP_TYX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_X = REGISTER_Y; \
+#define OP_TYX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_X = REGISTER_Y; \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TYX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_X = REGISTER_Y; \
+#define OP_TYX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_X = REGISTER_Y; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* G65816 Test and reset bit */
#undef OP_TRB
#if FLAG_SET_M
-#define OP_TRB(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_8_##MODE(DST); \
- write_8_##MODE(DST, FLAG_Z & ~REGISTER_A); \
+#define OP_TRB(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_8_##MODE(DST); \
+ write_8_##MODE(DST, FLAG_Z & ~REGISTER_A); \
FLAG_Z &= REGISTER_A
#else
-#define OP_TRB(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_16_##MODE(DST); \
- write_16_##MODE(DST, FLAG_Z & ~REGISTER_A); \
+#define OP_TRB(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_16_##MODE(DST); \
+ write_16_##MODE(DST, FLAG_Z & ~REGISTER_A); \
FLAG_Z &= REGISTER_A
#endif
/* G65816 Test and set bit */
#undef OP_TSB
#if FLAG_SET_M
-#define OP_TSB(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_8_##MODE(DST); \
- write_8_##MODE(DST, FLAG_Z | REGISTER_A); \
+#define OP_TSB(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_8_##MODE(DST); \
+ write_8_##MODE(DST, FLAG_Z | REGISTER_A); \
FLAG_Z &= REGISTER_A
#else
-#define OP_TSB(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_16_##MODE(DST); \
- write_16_##MODE(DST, FLAG_Z | REGISTER_A); \
+#define OP_TSB(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_16_##MODE(DST); \
+ write_16_##MODE(DST, FLAG_Z | REGISTER_A); \
FLAG_Z &= REGISTER_A
#endif
/* G65816 Wait for interrupt */
#undef OP_WAI
-#define OP_WAI() \
- USE_ALL_CLKS(); \
+#define OP_WAI() \
+ USE_ALL_CLKS(); \
CPU_STOPPED |= STOP_LEVEL_WAI
/* G65816 William D. Mensch, JR. (65816 designer) - future expansion */
#undef OP_WDM
-#define OP_WDM() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_WDM() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REGISTER_PC++
/* G65816 Exchange accum high and low bytes */
#undef OP_XBA
#if FLAG_SET_M
-#define OP_XBA() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REGISTER_B>>8; \
- REGISTER_B = REGISTER_A<<8; \
- REGISTER_A = FLAG_Z; \
+#define OP_XBA() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REGISTER_B>>8; \
+ REGISTER_B = REGISTER_A<<8; \
+ REGISTER_A = FLAG_Z; \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_XBA() \
- CLK(CLK_OP + CLK_IMPLIED + 1); \
- FLAG_Z = REGISTER_A >> 8; \
- REGISTER_A = MAKE_UINT_16(REGISTER_A<<8) | FLAG_Z; \
+#define OP_XBA() \
+ CLK(CLK_OP + CLK_IMPLIED + 1); \
+ FLAG_Z = REGISTER_A >> 8; \
+ REGISTER_A = MAKE_UINT_16(REGISTER_A<<8) | FLAG_Z; \
FLAG_N = NFLAG_8(FLAG_Z)
#endif
/* G65816 Exchange carry and emulation bits */
#undef OP_XCE
-#define OP_XCE() \
- CLK(CLK_OP + CLK_IMPLIED); \
- SRC = CFLAG_AS_1(); \
- FLAG_C = FLAG_E<<8; \
+#define OP_XCE() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ SRC = CFLAG_AS_1(); \
+ FLAG_C = FLAG_E<<8; \
g65816i_set_flag_e(cpustate, SRC)
@@ -1897,7 +1897,7 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _E(g65816i_cpu_struct *cpustate) {OPERATION;}
#define O(CODE) g65816i_ ## CODE ## _E
#define TABLE_OPCODES void (*const g65816i_opcodes_E[256])(g65816i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _E ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _E ARGS
#else
@@ -1905,28 +1905,28 @@ INLINE uint EA_SIY(g65816i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M0X0(g65816i_cpu_struct *cpustate) {OPERATION;}
#define O(CODE) g65816i_ ## CODE ## _M0X0
#define TABLE_OPCODES void (*const g65816i_opcodes_M0X0[256])(g65816i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M0X0 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M0X0 ARGS
#elif !FLAG_SET_M && FLAG_SET_X
#define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M0X1(g65816i_cpu_struct *cpustate) {OPERATION;}
#define O(CODE) g65816i_ ## CODE ## _M0X1
#define TABLE_OPCODES void (*const g65816i_opcodes_M0X1[256])(g65816i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M0X1 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M0X1 ARGS
#elif FLAG_SET_M && !FLAG_SET_X
#define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M1X0(g65816i_cpu_struct *cpustate) {OPERATION;}
#define O(CODE) g65816i_ ## CODE ## _M1X0
#define TABLE_OPCODES void (*const g65816i_opcodes_M1X0[256])(g65816i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M1X0 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M1X0 ARGS
#elif FLAG_SET_M && FLAG_SET_X
#define OP(CODE, OPERATION) static void g65816i_ ## CODE ## _M1X1(g65816i_cpu_struct *cpustate) {OPERATION;}
#define O(CODE) g65816i_ ## CODE ## _M1X1
#define TABLE_OPCODES void (*const g65816i_opcodes_M1X1[256])(g65816i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M1X1 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE g65816i_ ## NAME ## _M1X1 ARGS
#endif
#endif
@@ -2374,9 +2374,9 @@ TABLE_FUNCTION(int, execute, (g65816i_cpu_struct *cpustate, int clocks))
do
{
/* Note that I'm doing a per-instruction interrupt
- * check until this core is working well enough
- * to start trying fancy stuff.
- */
+ * check until this core is working well enough
+ * to start trying fancy stuff.
+ */
g65816i_check_maskable_interrupt(cpustate);
REGISTER_PPC = REGISTER_PC;
diff --git a/src/emu/cpu/h6280/6280dasm.c b/src/emu/cpu/h6280/6280dasm.c
index e20f831766f..de07366a884 100644
--- a/src/emu/cpu/h6280/6280dasm.c
+++ b/src/emu/cpu/h6280/6280dasm.c
@@ -23,22 +23,22 @@
#define RDWORD(addr) (opram[addr - pc] | ( oprom[(addr) + 1 - pc] << 8 ))
enum addr_mode {
- _non=0, /* no additional arguments */
- _acc, /* accumulator */
- _imp, /* implicit */
- _imm, /* immediate */
- _abs, /* absolute */
- _zpg, /* zero page */
- _zpx, /* zero page + X */
- _zpy, /* zero page + Y */
- _zpi, /* zero page indirect */
- _abx, /* absolute + X */
- _aby, /* absolute + Y */
- _rel, /* relative */
- _idx, /* zero page pre indexed */
- _idy, /* zero page post indexed */
- _ind, /* indirect */
- _iax, /* indirect + X */
+ _non=0, /* no additional arguments */
+ _acc, /* accumulator */
+ _imp, /* implicit */
+ _imm, /* immediate */
+ _abs, /* absolute */
+ _zpg, /* zero page */
+ _zpx, /* zero page + X */
+ _zpy, /* zero page + Y */
+ _zpi, /* zero page indirect */
+ _abx, /* absolute + X */
+ _aby, /* absolute + Y */
+ _rel, /* relative */
+ _idx, /* zero page pre indexed */
+ _idy, /* zero page post indexed */
+ _ind, /* indirect */
+ _iax, /* indirect + X */
_blk, /* block */
_zrl, /* zero page relative */
_imz, /* immediate, zero page */
@@ -50,13 +50,13 @@ enum addr_mode {
enum opcodes {
/* 6502 opcodes */
- _adc=0,_and, _asl, _bcc, _bcs, _beq, _bit, _bmi,
- _bne, _bpl, _brk, _bvc, _bvs, _clc, _cld, _cli,
- _clv, _cmp, _cpx, _cpy, _dec, _dex, _dey, _eor,
- _inc, _inx, _iny, _jmp, _jsr, _lda, _ldx, _ldy,
- _lsr, _nop, _ora, _pha, _php, _pla, _plp, _rol,
- _ror, _rti, _rts, _sbc, _sec, _sed, _sei, _sta,
- _stx, _sty, _tax, _tay, _tsx, _txa, _txs, _tya,
+ _adc=0,_and, _asl, _bcc, _bcs, _beq, _bit, _bmi,
+ _bne, _bpl, _brk, _bvc, _bvs, _clc, _cld, _cli,
+ _clv, _cmp, _cpx, _cpy, _dec, _dex, _dey, _eor,
+ _inc, _inx, _iny, _jmp, _jsr, _lda, _ldx, _ldy,
+ _lsr, _nop, _ora, _pha, _php, _pla, _plp, _rol,
+ _ror, _rti, _rts, _sbc, _sec, _sed, _sei, _sta,
+ _stx, _sty, _tax, _tay, _tsx, _txa, _txs, _tya,
_ill,
/* Hu6280 extensions */
@@ -101,38 +101,38 @@ static const char *const token[]=
static const unsigned char op6280[512]=
{
- _brk,_imp, _ora,_idx, _sxy,_imp, _st0,_imm, _tsb,_zpg, _ora,_zpg, _asl,_zpg, _rm0,_zpg, /* 00 */
- _php,_imp, _ora,_imm, _asl,_acc, _ill,_non, _tsb,_abs, _ora,_abs, _asl,_abs, _br0,_zrl,
- _bpl,_rel, _ora,_idy, _ora,_zpi, _st1,_imm, _trb,_zpg, _ora,_zpx, _asl,_zpx, _rm1,_zpg, /* 10 */
- _clc,_imp, _ora,_aby, _ina,_imp, _ill,_non, _trb,_abs, _ora,_abx, _asl,_abx, _br1,_zrl,
- _jsr,_abs, _and,_idx, _sax,_imp, _st2,_imm, _bit,_zpg, _and,_zpg, _rol,_zpg, _rm2,_zpg, /* 20 */
- _plp,_imp, _and,_imm, _rol,_acc, _ill,_non, _bit,_abs, _and,_abs, _rol,_abs, _br2,_zrl,
- _bmi,_rel, _and,_idy, _and,_zpi, _ill,_non, _bit,_zpx, _and,_zpx, _rol,_zpx, _rm3,_zpg, /* 30 */
- _sec,_imp, _and,_aby, _dea,_imp, _ill,_non, _bit,_abx, _and,_abx, _rol,_abx, _br3,_zrl,
- _rti,_imp, _eor,_idx, _say,_imp, _tma,_imm, _bsr,_rel, _eor,_zpg, _lsr,_zpg, _rm4,_zpg, /* 40 */
- _pha,_imp, _eor,_imm, _lsr,_acc, _ill,_non, _jmp,_abs, _eor,_abs, _lsr,_abs, _br4,_zrl,
- _bvc,_rel, _eor,_idy, _eor,_zpi, _tam,_imm, _csl,_imp, _eor,_zpx, _lsr,_zpx, _rm5,_zpg, /* 50 */
- _cli,_imp, _eor,_aby, _phy,_imp, _ill,_non, _ill,_non, _eor,_abx, _lsr,_abx, _br5,_zrl,
- _rts,_imp, _adc,_idx, _cla,_imp, _ill,_non, _stz,_zpg, _adc,_zpg, _ror,_zpg, _rm6,_zpg, /* 60 */
- _pla,_imp, _adc,_imm, _ror,_acc, _ill,_non, _jmp,_ind, _adc,_abs, _ror,_abs, _br6,_zrl,
- _bvs,_rel, _adc,_idy, _adc,_zpi, _tii,_blk, _stz,_zpx, _adc,_zpx, _ror,_zpx, _rm7,_zpg, /* 70 */
- _sei,_imp, _adc,_aby, _ply,_imp, _ill,_non, _jmp,_iax, _adc,_abx, _ror,_abx, _br7,_zrl,
- _bra,_rel, _sta,_idx, _clx,_imp, _tst,_imz, _sty,_zpg, _sta,_zpg, _stx,_zpg, _sm0,_zpg, /* 80 */
- _dey,_imp, _bit,_imm, _txa,_imp, _ill,_non, _sty,_abs, _sta,_abs, _stx,_abs, _bs0,_zrl,
- _bcc,_rel, _sta,_idy, _sta,_zpi, _tst,_ima, _sty,_zpx, _sta,_zpx, _stx,_zpy, _sm1,_zpg, /* 90 */
- _tya,_imp, _sta,_aby, _txs,_imp, _ill,_non, _stz,_abs, _sta,_abx, _stz,_abx, _bs1,_zrl,
- _ldy,_imm, _lda,_idx, _ldx,_imm, _tst,_izx, _ldy,_zpg, _lda,_zpg, _ldx,_zpg, _sm2,_zpg, /* a0 */
- _tay,_imp, _lda,_imm, _tax,_imp, _ill,_non, _ldy,_abs, _lda,_abs, _ldx,_abs, _bs2,_zrl,
- _bcs,_rel, _lda,_idy, _lda,_zpi, _tst,_imx, _ldy,_zpx, _lda,_zpx, _ldx,_zpy, _sm3,_zpg, /* b0 */
- _clv,_imp, _lda,_aby, _tsx,_imp, _ill,_non, _ldy,_abx, _lda,_abx, _ldx,_aby, _bs3,_zrl,
- _cpy,_imm, _cmp,_idx, _cly,_imp, _tdd,_blk, _cpy,_zpg, _cmp,_zpg, _dec,_zpg, _sm4,_zpg, /* c0 */
- _iny,_imp, _cmp,_imm, _dex,_imp, _ill,_non, _cpy,_abs, _cmp,_abs, _dec,_abs, _bs4,_zrl,
- _bne,_rel, _cmp,_idy, _cmp,_zpi, _tin,_blk, _csh,_imp, _cmp,_zpx, _dec,_zpx, _sm5,_zpg, /* d0 */
- _cld,_imp, _cmp,_aby, _phx,_imp, _ill,_non, _ill,_non, _cmp,_abx, _dec,_abx, _bs5,_zrl,
- _cpx,_imm, _sbc,_idx, _ill,_non, _tia,_blk, _cpx,_zpg, _sbc,_zpg, _inc,_zpg, _sm6,_zpg, /* e0 */
- _inx,_imp, _sbc,_imm, _nop,_imp, _ill,_non, _cpx,_abs, _sbc,_abs, _inc,_abs, _bs6,_zrl,
- _beq,_rel, _sbc,_idy, _sbc,_zpi, _tai,_blk, _set,_imp, _sbc,_zpx, _inc,_zpx, _sm7,_zpg, /* f0 */
- _sed,_imp, _sbc,_aby, _plx,_imp, _ill,_non, _ill,_non, _sbc,_abx, _inc,_abx, _bs7,_zrl
+ _brk,_imp, _ora,_idx, _sxy,_imp, _st0,_imm, _tsb,_zpg, _ora,_zpg, _asl,_zpg, _rm0,_zpg, /* 00 */
+ _php,_imp, _ora,_imm, _asl,_acc, _ill,_non, _tsb,_abs, _ora,_abs, _asl,_abs, _br0,_zrl,
+ _bpl,_rel, _ora,_idy, _ora,_zpi, _st1,_imm, _trb,_zpg, _ora,_zpx, _asl,_zpx, _rm1,_zpg, /* 10 */
+ _clc,_imp, _ora,_aby, _ina,_imp, _ill,_non, _trb,_abs, _ora,_abx, _asl,_abx, _br1,_zrl,
+ _jsr,_abs, _and,_idx, _sax,_imp, _st2,_imm, _bit,_zpg, _and,_zpg, _rol,_zpg, _rm2,_zpg, /* 20 */
+ _plp,_imp, _and,_imm, _rol,_acc, _ill,_non, _bit,_abs, _and,_abs, _rol,_abs, _br2,_zrl,
+ _bmi,_rel, _and,_idy, _and,_zpi, _ill,_non, _bit,_zpx, _and,_zpx, _rol,_zpx, _rm3,_zpg, /* 30 */
+ _sec,_imp, _and,_aby, _dea,_imp, _ill,_non, _bit,_abx, _and,_abx, _rol,_abx, _br3,_zrl,
+ _rti,_imp, _eor,_idx, _say,_imp, _tma,_imm, _bsr,_rel, _eor,_zpg, _lsr,_zpg, _rm4,_zpg, /* 40 */
+ _pha,_imp, _eor,_imm, _lsr,_acc, _ill,_non, _jmp,_abs, _eor,_abs, _lsr,_abs, _br4,_zrl,
+ _bvc,_rel, _eor,_idy, _eor,_zpi, _tam,_imm, _csl,_imp, _eor,_zpx, _lsr,_zpx, _rm5,_zpg, /* 50 */
+ _cli,_imp, _eor,_aby, _phy,_imp, _ill,_non, _ill,_non, _eor,_abx, _lsr,_abx, _br5,_zrl,
+ _rts,_imp, _adc,_idx, _cla,_imp, _ill,_non, _stz,_zpg, _adc,_zpg, _ror,_zpg, _rm6,_zpg, /* 60 */
+ _pla,_imp, _adc,_imm, _ror,_acc, _ill,_non, _jmp,_ind, _adc,_abs, _ror,_abs, _br6,_zrl,
+ _bvs,_rel, _adc,_idy, _adc,_zpi, _tii,_blk, _stz,_zpx, _adc,_zpx, _ror,_zpx, _rm7,_zpg, /* 70 */
+ _sei,_imp, _adc,_aby, _ply,_imp, _ill,_non, _jmp,_iax, _adc,_abx, _ror,_abx, _br7,_zrl,
+ _bra,_rel, _sta,_idx, _clx,_imp, _tst,_imz, _sty,_zpg, _sta,_zpg, _stx,_zpg, _sm0,_zpg, /* 80 */
+ _dey,_imp, _bit,_imm, _txa,_imp, _ill,_non, _sty,_abs, _sta,_abs, _stx,_abs, _bs0,_zrl,
+ _bcc,_rel, _sta,_idy, _sta,_zpi, _tst,_ima, _sty,_zpx, _sta,_zpx, _stx,_zpy, _sm1,_zpg, /* 90 */
+ _tya,_imp, _sta,_aby, _txs,_imp, _ill,_non, _stz,_abs, _sta,_abx, _stz,_abx, _bs1,_zrl,
+ _ldy,_imm, _lda,_idx, _ldx,_imm, _tst,_izx, _ldy,_zpg, _lda,_zpg, _ldx,_zpg, _sm2,_zpg, /* a0 */
+ _tay,_imp, _lda,_imm, _tax,_imp, _ill,_non, _ldy,_abs, _lda,_abs, _ldx,_abs, _bs2,_zrl,
+ _bcs,_rel, _lda,_idy, _lda,_zpi, _tst,_imx, _ldy,_zpx, _lda,_zpx, _ldx,_zpy, _sm3,_zpg, /* b0 */
+ _clv,_imp, _lda,_aby, _tsx,_imp, _ill,_non, _ldy,_abx, _lda,_abx, _ldx,_aby, _bs3,_zrl,
+ _cpy,_imm, _cmp,_idx, _cly,_imp, _tdd,_blk, _cpy,_zpg, _cmp,_zpg, _dec,_zpg, _sm4,_zpg, /* c0 */
+ _iny,_imp, _cmp,_imm, _dex,_imp, _ill,_non, _cpy,_abs, _cmp,_abs, _dec,_abs, _bs4,_zrl,
+ _bne,_rel, _cmp,_idy, _cmp,_zpi, _tin,_blk, _csh,_imp, _cmp,_zpx, _dec,_zpx, _sm5,_zpg, /* d0 */
+ _cld,_imp, _cmp,_aby, _phx,_imp, _ill,_non, _ill,_non, _cmp,_abx, _dec,_abx, _bs5,_zrl,
+ _cpx,_imm, _sbc,_idx, _ill,_non, _tia,_blk, _cpx,_zpg, _sbc,_zpg, _inc,_zpg, _sm6,_zpg, /* e0 */
+ _inx,_imp, _sbc,_imm, _nop,_imp, _ill,_non, _cpx,_abs, _sbc,_abs, _inc,_abs, _bs6,_zrl,
+ _beq,_rel, _sbc,_idy, _sbc,_zpi, _tai,_blk, _set,_imp, _sbc,_zpx, _inc,_zpx, _sm7,_zpg, /* f0 */
+ _sed,_imp, _sbc,_aby, _plx,_imp, _ill,_non, _ill,_non, _sbc,_abx, _inc,_abx, _bs7,_zrl
};
/*****************************************************************************
@@ -149,12 +149,12 @@ CPU_DISASSEMBLE( h6280 )
PC++;
opc = op6280[OP];
- arg = op6280[OP+1];
+ arg = op6280[OP+1];
- if (opc == _jsr || opc == _bsr)
- flags = DASMFLAG_STEP_OVER;
- else if (opc == _rts)
- flags = DASMFLAG_STEP_OUT;
+ if (opc == _jsr || opc == _bsr)
+ flags = DASMFLAG_STEP_OVER;
+ else if (opc == _rts)
+ flags = DASMFLAG_STEP_OUT;
switch(arg)
{
@@ -194,8 +194,8 @@ CPU_DISASSEMBLE( h6280 )
break;
case _zpi:
sprintf(buffer,"%-5s($%02X)", token[opc], RDBYTE(PC));
- PC+=1;
- break;
+ PC+=1;
+ break;
case _abs:
sprintf(buffer,"%-5s$%04X", token[opc], RDWORD(PC));
PC+=2;
@@ -215,11 +215,11 @@ CPU_DISASSEMBLE( h6280 )
case _iax:
sprintf(buffer,"%-5s($%04X),X", token[opc], RDWORD(PC));
PC+=2;
- break;
+ break;
case _blk:
sprintf(buffer,"%-5s$%04X $%04X $%04X", token[opc], RDWORD(PC), RDWORD(PC+2), RDWORD(PC+4));
PC+=6;
- break;
+ break;
case _zrl:
sprintf(buffer,"%-5s$%02X $%04X", token[opc], RDBYTE(PC), (PC + 2 + (signed char)RDBYTE(PC+1)) & 0xffff);
PC+=2;
diff --git a/src/emu/cpu/h6280/h6280.c b/src/emu/cpu/h6280/h6280.c
index 0fce00ea0c4..27d720a50e3 100644
--- a/src/emu/cpu/h6280/h6280.c
+++ b/src/emu/cpu/h6280/h6280.c
@@ -174,28 +174,28 @@ const h6280_device::ophandler h6280_device::s_opcodetable[256] =
void h6280_device::device_start()
{
// register our state for the debugger
- state_add(STATE_GENPC, "GENPC", m_pc.w.l).noshow();
- state_add(STATE_GENFLAGS, "GENFLAGS", m_p).callimport().callexport().formatstr("%8s").noshow();
- state_add(H6280_PC, "PC", m_pc.d).mask(0xffff);
- state_add(H6280_S, "S", m_sp.b.l).mask(0xff);
- state_add(H6280_P, "P", m_p).mask(0xff);
- state_add(H6280_A, "A", m_a).mask(0xff);
- state_add(H6280_X, "X", m_x).mask(0xff);
- state_add(H6280_Y, "Y", m_y).mask(0xff);
- state_add(H6280_IRQ_MASK, "IM", m_irq_mask).mask(0xff);
- state_add(H6280_TIMER_STATE,"TMR", m_timer_status).mask(0xff);
- state_add(H6280_NMI_STATE, "NMI", m_nmi_state).mask(0xf);
+ state_add(STATE_GENPC, "GENPC", m_pc.w.l).noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_p).callimport().callexport().formatstr("%8s").noshow();
+ state_add(H6280_PC, "PC", m_pc.d).mask(0xffff);
+ state_add(H6280_S, "S", m_sp.b.l).mask(0xff);
+ state_add(H6280_P, "P", m_p).mask(0xff);
+ state_add(H6280_A, "A", m_a).mask(0xff);
+ state_add(H6280_X, "X", m_x).mask(0xff);
+ state_add(H6280_Y, "Y", m_y).mask(0xff);
+ state_add(H6280_IRQ_MASK, "IM", m_irq_mask).mask(0xff);
+ state_add(H6280_TIMER_STATE,"TMR", m_timer_status).mask(0xff);
+ state_add(H6280_NMI_STATE, "NMI", m_nmi_state).mask(0xf);
state_add(H6280_IRQ1_STATE, "IRQ1", m_irq_state[0]).mask(0xf);
state_add(H6280_IRQ2_STATE, "IRQ2", m_irq_state[1]).mask(0xf);
state_add(H6280_IRQT_STATE, "IRQT", m_irq_state[2]).mask(0xf);
- state_add(H6280_M1, "M1", m_mmr[0]).mask(0xff);
- state_add(H6280_M2, "M2", m_mmr[1]).mask(0xff);
- state_add(H6280_M3, "M3", m_mmr[2]).mask(0xff);
- state_add(H6280_M4, "M4", m_mmr[3]).mask(0xff);
- state_add(H6280_M5, "M5", m_mmr[4]).mask(0xff);
- state_add(H6280_M6, "M6", m_mmr[5]).mask(0xff);
- state_add(H6280_M7, "M7", m_mmr[6]).mask(0xff);
- state_add(H6280_M8, "M8", m_mmr[7]).mask(0xff);
+ state_add(H6280_M1, "M1", m_mmr[0]).mask(0xff);
+ state_add(H6280_M2, "M2", m_mmr[1]).mask(0xff);
+ state_add(H6280_M3, "M3", m_mmr[2]).mask(0xff);
+ state_add(H6280_M4, "M4", m_mmr[3]).mask(0xff);
+ state_add(H6280_M5, "M5", m_mmr[4]).mask(0xff);
+ state_add(H6280_M6, "M6", m_mmr[5]).mask(0xff);
+ state_add(H6280_M7, "M7", m_mmr[6]).mask(0xff);
+ state_add(H6280_M8, "M8", m_mmr[7]).mask(0xff);
save_item(NAME(m_ppc.w.l));
save_item(NAME(m_pc.w.l));
@@ -256,21 +256,21 @@ void h6280_device::device_reset()
/* set I and B flags */
P = _fI | _fB;
- /* stack starts at 0x01ff */
+ /* stack starts at 0x01ff */
m_sp.d = 0x1ff;
- /* read the reset vector into PC */
+ /* read the reset vector into PC */
PCL = program_read8(H6280_RESET_VEC);
PCH = program_read8(H6280_RESET_VEC + 1);
/* CPU starts in low speed mode */
- m_clocks_per_cycle = 4;
+ m_clocks_per_cycle = 4;
/* timer off by default */
m_timer_status = 0;
m_timer_load = 128 * 1024;
- /* clear pending interrupts */
+ /* clear pending interrupts */
for (int i = 0; i < 3; i++)
{
m_irq_state[i] = CLEAR_LINE;
@@ -426,7 +426,7 @@ void h6280_device::execute_set_input(int inputnum, int state)
}
/***************************************************************
- * program_read8 read memory
+ * program_read8 read memory
***************************************************************/
UINT8 h6280_device::program_read8(offs_t addr)
{
@@ -435,7 +435,7 @@ UINT8 h6280_device::program_read8(offs_t addr)
}
/***************************************************************
- * program_write8 write memory
+ * program_write8 write memory
***************************************************************/
void h6280_device::program_write8(offs_t addr, UINT8 data)
{
@@ -444,7 +444,7 @@ void h6280_device::program_write8(offs_t addr, UINT8 data)
}
/***************************************************************
- * program_read8z read memory - zero page
+ * program_read8z read memory - zero page
***************************************************************/
UINT8 h6280_device::program_read8z(offs_t addr)
{
@@ -452,7 +452,7 @@ UINT8 h6280_device::program_read8z(offs_t addr)
}
/***************************************************************
- * program_write8z write memory - zero page
+ * program_write8z write memory - zero page
***************************************************************/
void h6280_device::program_write8z(offs_t addr, UINT8 data)
{
@@ -460,28 +460,28 @@ void h6280_device::program_write8z(offs_t addr, UINT8 data)
}
/***************************************************************
- * program_read16 read word from memory
+ * program_read16 read word from memory
***************************************************************/
UINT16 h6280_device::program_read16(offs_t addr)
{
return m_program->read_byte(TRANSLATED(addr)) |
- (m_program->read_byte(TRANSLATED(addr + 1)) << 8);
+ (m_program->read_byte(TRANSLATED(addr + 1)) << 8);
}
/***************************************************************
- * program_read16z read a word from a zero page address
+ * program_read16z read a word from a zero page address
***************************************************************/
UINT16 h6280_device::program_read16z(offs_t addr)
{
if ((addr & 0xff) == 0xff)
{
return m_program->read_byte((m_mmr[1] << 13) | (addr & 0x1fff)) |
- (m_program->read_byte((m_mmr[1] << 13) | ((addr - 0xff) & 0x1fff)) << 8);
+ (m_program->read_byte((m_mmr[1] << 13) | ((addr - 0xff) & 0x1fff)) << 8);
}
else
{
return m_program->read_byte((m_mmr[1] << 13) | (addr & 0x1fff)) |
- (m_program->read_byte((m_mmr[1] << 13) | ((addr + 1) & 0x1fff)) << 8);
+ (m_program->read_byte((m_mmr[1] << 13) | ((addr + 1) & 0x1fff)) << 8);
}
}
@@ -504,7 +504,7 @@ void h6280_device::pull(UINT8 &value)
}
/***************************************************************
- * read_opcode read an opcode
+ * read_opcode read an opcode
***************************************************************/
UINT8 h6280_device::read_opcode()
{
@@ -512,7 +512,7 @@ UINT8 h6280_device::read_opcode()
}
/***************************************************************
- * read_opcode_arg read an opcode argument
+ * read_opcode_arg read an opcode argument
***************************************************************/
UINT8 h6280_device::read_opcode_arg()
{
@@ -536,7 +536,7 @@ void h6280_device::execute_run()
/* Execute instructions */
do
- {
+ {
m_ppc = m_pc;
debugger_instruction_hook(this, PCW);
@@ -601,7 +601,7 @@ void h6280_device::set_irq_line(int irqline, int state)
if (m_irq_state[irqline] == state)
return;
- m_irq_state[irqline] = state;
+ m_irq_state[irqline] = state;
CHECK_IRQ_LINES;
}
@@ -673,7 +673,7 @@ WRITE8_MEMBER( h6280_device::timer_w )
case 1: /* Counter enable */
if (data & 1)
- { /* stop -> start causes reload */
+ { /* stop -> start causes reload */
if(m_timer_status == 0)
m_timer_value = m_timer_load;
}
diff --git a/src/emu/cpu/h6280/h6280.h b/src/emu/cpu/h6280/h6280.h
index 3f33d1bca26..5467ab918c7 100644
--- a/src/emu/cpu/h6280/h6280.h
+++ b/src/emu/cpu/h6280/h6280.h
@@ -45,11 +45,11 @@ enum
H6280_M8
};
-#define H6280_RESET_VEC 0xfffe
-#define H6280_NMI_VEC 0xfffc
-#define H6280_TIMER_VEC 0xfffa
-#define H6280_IRQ1_VEC 0xfff8
-#define H6280_IRQ2_VEC 0xfff6 /* Aka BRK vector */
+#define H6280_RESET_VEC 0xfffe
+#define H6280_NMI_VEC 0xfffc
+#define H6280_TIMER_VEC 0xfffa
+#define H6280_IRQ1_VEC 0xfff8
+#define H6280_IRQ2_VEC 0xfff6 /* Aka BRK vector */
//**************************************************************************
@@ -126,36 +126,36 @@ protected:
const address_space_config m_io_config;
// CPU registers
- PAIR m_ppc; /* previous program counter */
- PAIR m_pc; /* program counter */
- PAIR m_sp; /* stack pointer (always 100 - 1FF) */
- PAIR m_zp; /* zero page address */
- PAIR m_ea; /* effective address */
- UINT8 m_a; /* Accumulator */
- UINT8 m_x; /* X index register */
- UINT8 m_y; /* Y index register */
- UINT8 m_p; /* Processor status */
- UINT8 m_mmr[8]; /* Hu6280 memory mapper registers */
- UINT8 m_irq_mask; /* interrupt enable/disable */
- UINT8 m_timer_status; /* timer status */
- UINT8 m_timer_ack; /* timer acknowledge */
- UINT8 m_clocks_per_cycle; /* 4 = low speed mode, 1 = high speed mode */
- INT32 m_timer_value; /* timer interrupt */
- INT32 m_timer_load; /* reload value */
- UINT8 m_nmi_state;
- UINT8 m_irq_state[3];
+ PAIR m_ppc; /* previous program counter */
+ PAIR m_pc; /* program counter */
+ PAIR m_sp; /* stack pointer (always 100 - 1FF) */
+ PAIR m_zp; /* zero page address */
+ PAIR m_ea; /* effective address */
+ UINT8 m_a; /* Accumulator */
+ UINT8 m_x; /* X index register */
+ UINT8 m_y; /* Y index register */
+ UINT8 m_p; /* Processor status */
+ UINT8 m_mmr[8]; /* Hu6280 memory mapper registers */
+ UINT8 m_irq_mask; /* interrupt enable/disable */
+ UINT8 m_timer_status; /* timer status */
+ UINT8 m_timer_ack; /* timer acknowledge */
+ UINT8 m_clocks_per_cycle; /* 4 = low speed mode, 1 = high speed mode */
+ INT32 m_timer_value; /* timer interrupt */
+ INT32 m_timer_load; /* reload value */
+ UINT8 m_nmi_state;
+ UINT8 m_irq_state[3];
UINT8 m_irq_pending;
#if LAZY_FLAGS
- INT32 m_nz; /* last value (lazy N and Z flag) */
+ INT32 m_nz; /* last value (lazy N and Z flag) */
#endif
- UINT8 m_io_buffer; /* last value written to the PSG, timer, and interrupt pages */
+ UINT8 m_io_buffer; /* last value written to the PSG, timer, and interrupt pages */
// other internal states
- int m_icount;
+ int m_icount;
// address spaces
- address_space *m_program;
- address_space *m_io;
+ address_space *m_program;
+ address_space *m_io;
direct_read_data *m_direct;
typedef void (h6280_device::*ophandler)();
diff --git a/src/emu/cpu/h6280/h6280ops.h b/src/emu/cpu/h6280/h6280ops.h
index 7da4b283f80..8c57e2cfff5 100644
--- a/src/emu/cpu/h6280/h6280ops.h
+++ b/src/emu/cpu/h6280/h6280ops.h
@@ -21,31 +21,31 @@
#define _fN 0x80
/* some shortcuts for improved readability */
-#define A m_a
-#define X m_x
-#define Y m_y
-#define P m_p
-#define S m_sp.b.l
-
-#define TRANSLATED(addr) ((m_mmr[((addr) >> 13) & 7] << 13) | ((addr) & 0x1fff))
-#define H6280_CYCLES(cyc) \
- { \
- m_icount -= ((cyc) * m_clocks_per_cycle); \
- m_timer_value -= ((cyc) * m_clocks_per_cycle); \
+#define A m_a
+#define X m_x
+#define Y m_y
+#define P m_p
+#define S m_sp.b.l
+
+#define TRANSLATED(addr) ((m_mmr[((addr) >> 13) & 7] << 13) | ((addr) & 0x1fff))
+#define H6280_CYCLES(cyc) \
+ { \
+ m_icount -= ((cyc) * m_clocks_per_cycle); \
+ m_timer_value -= ((cyc) * m_clocks_per_cycle); \
}
#if LAZY_FLAGS
-#define NZ m_NZ
-#define SET_NZ(n) \
- P &= ~_fT; \
- NZ = ((n & _fN) << 8) | n
+#define NZ m_NZ
+#define SET_NZ(n) \
+ P &= ~_fT; \
+ NZ = ((n & _fN) << 8) | n
#else
-#define SET_NZ(n) \
- P = (P & ~(_fN|_fT|_fZ)) | \
- (n & _fN) | \
+#define SET_NZ(n) \
+ P = (P & ~(_fN|_fT|_fZ)) | \
+ (n & _fN) | \
((n == 0) ? _fZ : 0)
#endif
@@ -68,46 +68,46 @@
#define CLEAR_T \
P &= ~_fT;
-#define DO_INTERRUPT(vector) \
-{ \
- H6280_CYCLES(7); /* 7 cycles for an int */ \
- push(PCH); \
- push(PCL); \
- COMPOSE_P(0, _fB); \
- push(P); \
- P = (P & ~_fD) | _fI; /* knock out D and set I flag */ \
- PCL = program_read8(vector); \
- PCH = program_read8(vector + 1); \
+#define DO_INTERRUPT(vector) \
+{ \
+ H6280_CYCLES(7); /* 7 cycles for an int */ \
+ push(PCH); \
+ push(PCL); \
+ COMPOSE_P(0, _fB); \
+ push(P); \
+ P = (P & ~_fD) | _fI; /* knock out D and set I flag */ \
+ PCL = program_read8(vector); \
+ PCH = program_read8(vector + 1); \
}
-#define CHECK_AND_TAKE_IRQ_LINES \
- if ( m_nmi_state != CLEAR_LINE ) { \
- m_nmi_state = CLEAR_LINE; \
- DO_INTERRUPT(H6280_NMI_VEC); \
- } \
- else if( !(P & _fI) ) \
- { \
- if ( m_irq_state[2] != CLEAR_LINE && \
- !(m_irq_mask & 0x4) ) \
- { \
- DO_INTERRUPT(H6280_TIMER_VEC); \
- } else \
- if ( m_irq_state[0] != CLEAR_LINE && \
- !(m_irq_mask & 0x2) ) \
- { \
- DO_INTERRUPT(H6280_IRQ1_VEC); \
- standard_irq_callback(0); \
- } else \
- if ( m_irq_state[1] != CLEAR_LINE && \
- !(m_irq_mask & 0x1) ) \
- { \
- DO_INTERRUPT(H6280_IRQ2_VEC); \
- standard_irq_callback(1); \
- } \
- }
-
-#define CHECK_IRQ_LINES \
- if (!m_irq_pending) \
+#define CHECK_AND_TAKE_IRQ_LINES \
+ if ( m_nmi_state != CLEAR_LINE ) { \
+ m_nmi_state = CLEAR_LINE; \
+ DO_INTERRUPT(H6280_NMI_VEC); \
+ } \
+ else if( !(P & _fI) ) \
+ { \
+ if ( m_irq_state[2] != CLEAR_LINE && \
+ !(m_irq_mask & 0x4) ) \
+ { \
+ DO_INTERRUPT(H6280_TIMER_VEC); \
+ } else \
+ if ( m_irq_state[0] != CLEAR_LINE && \
+ !(m_irq_mask & 0x2) ) \
+ { \
+ DO_INTERRUPT(H6280_IRQ1_VEC); \
+ standard_irq_callback(0); \
+ } else \
+ if ( m_irq_state[1] != CLEAR_LINE && \
+ !(m_irq_mask & 0x1) ) \
+ { \
+ DO_INTERRUPT(H6280_IRQ2_VEC); \
+ standard_irq_callback(1); \
+ } \
+ }
+
+#define CHECK_IRQ_LINES \
+ if (!m_irq_pending) \
m_irq_pending = 2;
/***************************************************************
@@ -115,28 +115,28 @@
* The CPU inserts 1 clock delay when accessing the VDC or VCE
* area.
***************************************************************/
-#define CHECK_VDC_VCE_PENALTY(addr) \
- if ( ( TRANSLATED(addr) & 0x1FF800 ) == 0x1FE000 ) { \
- H6280_CYCLES(1); \
+#define CHECK_VDC_VCE_PENALTY(addr) \
+ if ( ( TRANSLATED(addr) & 0x1FF800 ) == 0x1FE000 ) { \
+ H6280_CYCLES(1); \
}
/***************************************************************
* BRA branch relative
***************************************************************/
-#define BRA(cond) \
- CLEAR_T; \
- if (cond) \
- { \
- H6280_CYCLES(4); \
- tmp = read_opcode_arg(); \
- PCW++; \
- EAW = PCW + (signed char)tmp; \
- PCD = EAD; \
- } \
- else \
- { \
- PCW++; \
- H6280_CYCLES(2); \
+#define BRA(cond) \
+ CLEAR_T; \
+ if (cond) \
+ { \
+ H6280_CYCLES(4); \
+ tmp = read_opcode_arg(); \
+ PCW++; \
+ EAW = PCW + (signed char)tmp; \
+ PCD = EAD; \
+ } \
+ else \
+ { \
+ PCW++; \
+ H6280_CYCLES(2); \
}
/***************************************************************
@@ -148,133 +148,133 @@
/***************************************************************
* EA = zero page address
***************************************************************/
-#define EA_ZPG \
- ZPL = read_opcode_arg(); \
- PCW++; \
+#define EA_ZPG \
+ ZPL = read_opcode_arg(); \
+ PCW++; \
EAD = ZPD
/***************************************************************
* EA = zero page address - T flag
***************************************************************/
-#define EA_TFLG \
- ZPL = X; \
+#define EA_TFLG \
+ ZPL = X; \
EAD = ZPD
/***************************************************************
* EA = zero page address + X
***************************************************************/
-#define EA_ZPX \
- ZPL = read_opcode_arg() + X; \
- PCW++; \
+#define EA_ZPX \
+ ZPL = read_opcode_arg() + X; \
+ PCW++; \
EAD = ZPD
/***************************************************************
* EA = zero page address + Y
***************************************************************/
-#define EA_ZPY \
- ZPL = read_opcode_arg() + Y; \
- PCW++; \
+#define EA_ZPY \
+ ZPL = read_opcode_arg() + Y; \
+ PCW++; \
EAD = ZPD
/***************************************************************
* EA = absolute address
***************************************************************/
-#define EA_ABS \
- EAL = read_opcode_arg(); \
- PCW++; \
- EAH = read_opcode_arg(); \
+#define EA_ABS \
+ EAL = read_opcode_arg(); \
+ PCW++; \
+ EAH = read_opcode_arg(); \
PCW++
/***************************************************************
* EA = absolute address + X
***************************************************************/
#define EA_ABX \
- EA_ABS; \
+ EA_ABS; \
EAW += X
/***************************************************************
* EA = absolute address + Y
***************************************************************/
-#define EA_ABY \
- EA_ABS; \
+#define EA_ABY \
+ EA_ABS; \
EAW += Y
/***************************************************************
* EA = zero page indirect (65c02 pre indexed w/o X)
***************************************************************/
-#define EA_ZPI \
- ZPL = read_opcode_arg(); \
- PCW++; \
+#define EA_ZPI \
+ ZPL = read_opcode_arg(); \
+ PCW++; \
EAD = program_read16z(ZPD);
/***************************************************************
* EA = zero page + X indirect (pre indexed)
***************************************************************/
-#define EA_IDX \
- ZPL = read_opcode_arg() + X; \
- PCW++; \
+#define EA_IDX \
+ ZPL = read_opcode_arg() + X; \
+ PCW++; \
EAD = program_read16z(ZPD);
/***************************************************************
* EA = zero page indirect + Y (post indexed)
***************************************************************/
-#define EA_IDY \
- ZPL = read_opcode_arg(); \
- PCW++; \
- EAD = program_read16z(ZPD); \
+#define EA_IDY \
+ ZPL = read_opcode_arg(); \
+ PCW++; \
+ EAD = program_read16z(ZPD); \
EAW += Y
/***************************************************************
* EA = indirect (only used by JMP)
***************************************************************/
-#define EA_IND \
- EA_ABS; \
- tmp = program_read8(EAD); \
- EAD++; \
- EAH = program_read8(EAD); \
+#define EA_IND \
+ EA_ABS; \
+ tmp = program_read8(EAD); \
+ EAD++; \
+ EAH = program_read8(EAD); \
EAL = tmp
/***************************************************************
* EA = indirect plus x (only used by JMP)
***************************************************************/
#define EA_IAX \
- EA_ABS; \
- EAD+=X; \
- tmp = program_read8(EAD); \
- EAD++; \
- EAH = program_read8(EAD); \
+ EA_ABS; \
+ EAD+=X; \
+ tmp = program_read8(EAD); \
+ EAD++; \
+ EAH = program_read8(EAD); \
EAL = tmp
/* read a value into tmp */
-#define RD_IMM tmp = read_opcode_arg(); PCW++
-#define RD_IMM2 tmp2 = read_opcode_arg(); PCW++
-#define RD_ACC tmp = A
-#define RD_ZPG EA_ZPG; tmp = program_read8z(EAD)
-#define RD_ZPX EA_ZPX; tmp = program_read8z(EAD)
-#define RD_ZPY EA_ZPY; tmp = program_read8z(EAD)
-#define RD_ABS EA_ABS; tmp = program_read8(EAD)
-#define RD_ABX EA_ABX; tmp = program_read8(EAD)
-#define RD_ABY EA_ABY; tmp = program_read8(EAD)
-#define RD_ZPI EA_ZPI; tmp = program_read8(EAD)
-#define RD_IDX EA_IDX; tmp = program_read8(EAD)
-#define RD_IDY EA_IDY; tmp = program_read8(EAD)
+#define RD_IMM tmp = read_opcode_arg(); PCW++
+#define RD_IMM2 tmp2 = read_opcode_arg(); PCW++
+#define RD_ACC tmp = A
+#define RD_ZPG EA_ZPG; tmp = program_read8z(EAD)
+#define RD_ZPX EA_ZPX; tmp = program_read8z(EAD)
+#define RD_ZPY EA_ZPY; tmp = program_read8z(EAD)
+#define RD_ABS EA_ABS; tmp = program_read8(EAD)
+#define RD_ABX EA_ABX; tmp = program_read8(EAD)
+#define RD_ABY EA_ABY; tmp = program_read8(EAD)
+#define RD_ZPI EA_ZPI; tmp = program_read8(EAD)
+#define RD_IDX EA_IDX; tmp = program_read8(EAD)
+#define RD_IDY EA_IDY; tmp = program_read8(EAD)
#define RD_TFL EA_TFLG; tflagtemp = program_read8z(EAD)
/* write a value from tmp */
-#define WR_ZPG EA_ZPG; program_write8z(EAD, tmp)
-#define WR_ZPX EA_ZPX; program_write8z(EAD, tmp)
-#define WR_ZPY EA_ZPY; program_write8z(EAD, tmp)
-#define WR_ABS EA_ABS; program_write8(EAD, tmp)
-#define WR_ABX EA_ABX; program_write8(EAD, tmp)
-#define WR_ABY EA_ABY; program_write8(EAD, tmp)
-#define WR_ZPI EA_ZPI; program_write8(EAD, tmp)
-#define WR_IDX EA_IDX; program_write8(EAD, tmp)
-#define WR_IDY EA_IDY; program_write8(EAD, tmp)
+#define WR_ZPG EA_ZPG; program_write8z(EAD, tmp)
+#define WR_ZPX EA_ZPX; program_write8z(EAD, tmp)
+#define WR_ZPY EA_ZPY; program_write8z(EAD, tmp)
+#define WR_ABS EA_ABS; program_write8(EAD, tmp)
+#define WR_ABX EA_ABX; program_write8(EAD, tmp)
+#define WR_ABY EA_ABY; program_write8(EAD, tmp)
+#define WR_ZPI EA_ZPI; program_write8(EAD, tmp)
+#define WR_IDX EA_IDX; program_write8(EAD, tmp)
+#define WR_IDY EA_IDY; program_write8(EAD, tmp)
/* write back a value from tmp to the last EA */
-#define WB_ACC A = (UINT8)tmp;
-#define WB_EA program_write8(EAD, tmp)
-#define WB_EAZ program_write8z(EAD, tmp)
+#define WB_ACC A = (UINT8)tmp;
+#define WB_EA program_write8(EAD, tmp)
+#define WB_EAZ program_write8z(EAD, tmp)
#define WB_TFL program_write8z(EAD, tflagtemp)
/***************************************************************
@@ -290,15 +290,15 @@
***************************************************************/
#if LAZY_FLAGS
-#define COMPOSE_P(SET,CLR) \
- P = (P & ~(_fN | _fZ | CLR)) | \
- (NZ >> 8) | \
- ((NZ & 0xff) ? 0 : _fZ) | \
+#define COMPOSE_P(SET,CLR) \
+ P = (P & ~(_fN | _fZ | CLR)) | \
+ (NZ >> 8) | \
+ ((NZ & 0xff) ? 0 : _fZ) | \
SET
#else
-#define COMPOSE_P(SET,CLR) \
+#define COMPOSE_P(SET,CLR) \
P = (P & ~CLR) | SET
#endif
@@ -306,124 +306,124 @@
/* 6280 ********************************************************
* ADC Add with carry
***************************************************************/
-#define TADC \
- { \
- int tflagtemp; \
- CLEAR_T; \
- RD_TFL; \
- if (P & _fD) \
- { \
- int c = (P & _fC); \
- int lo = (tflagtemp & 0x0f) + (tmp & 0x0f) + c; \
- int hi = (tflagtemp & 0xf0) + (tmp & 0xf0); \
- P &= ~_fC; \
- if (lo > 0x09) \
- { \
- hi += 0x10; \
- lo += 0x06; \
- } \
- if (hi > 0x90) \
- hi += 0x60; \
- if (hi & 0xff00) \
- P |= _fC; \
- tflagtemp = (lo & 0x0f) + (hi & 0xf0); \
- H6280_CYCLES(1); \
- } \
- else \
- { \
- int c = (P & _fC); \
- int sum = tflagtemp + tmp + c; \
- P &= ~(_fV | _fC); \
- if (~(tflagtemp^tmp) & (tflagtemp^sum) & _fN) \
- P |= _fV; \
- if (sum & 0xff00) \
- P |= _fC; \
- tflagtemp = (UINT8) sum; \
- } \
- SET_NZ(tflagtemp); \
- WB_TFL; \
- H6280_CYCLES(3); \
+#define TADC \
+ { \
+ int tflagtemp; \
+ CLEAR_T; \
+ RD_TFL; \
+ if (P & _fD) \
+ { \
+ int c = (P & _fC); \
+ int lo = (tflagtemp & 0x0f) + (tmp & 0x0f) + c; \
+ int hi = (tflagtemp & 0xf0) + (tmp & 0xf0); \
+ P &= ~_fC; \
+ if (lo > 0x09) \
+ { \
+ hi += 0x10; \
+ lo += 0x06; \
+ } \
+ if (hi > 0x90) \
+ hi += 0x60; \
+ if (hi & 0xff00) \
+ P |= _fC; \
+ tflagtemp = (lo & 0x0f) + (hi & 0xf0); \
+ H6280_CYCLES(1); \
+ } \
+ else \
+ { \
+ int c = (P & _fC); \
+ int sum = tflagtemp + tmp + c; \
+ P &= ~(_fV | _fC); \
+ if (~(tflagtemp^tmp) & (tflagtemp^sum) & _fN) \
+ P |= _fV; \
+ if (sum & 0xff00) \
+ P |= _fC; \
+ tflagtemp = (UINT8) sum; \
+ } \
+ SET_NZ(tflagtemp); \
+ WB_TFL; \
+ H6280_CYCLES(3); \
}
-#define ADC \
- if(P & _fT) \
- TADC \
- else { \
- if (P & _fD) \
- { \
- int c = (P & _fC); \
- int lo = (A & 0x0f) + (tmp & 0x0f) + c; \
- int hi = (A & 0xf0) + (tmp & 0xf0); \
- P &= ~_fC; \
- if (lo > 0x09) \
- { \
- hi += 0x10; \
- lo += 0x06; \
- } \
- if (hi > 0x90) \
- hi += 0x60; \
- if (hi & 0xff00) \
- P |= _fC; \
- A = (lo & 0x0f) + (hi & 0xf0); \
- H6280_CYCLES(1); \
- } \
- else \
- { \
- int c = (P & _fC); \
- int sum = A + tmp + c; \
- P &= ~(_fV | _fC); \
- if (~(A^tmp) & (A^sum) & _fN) \
- P |= _fV; \
- if (sum & 0xff00) \
- P |= _fC; \
- A = (UINT8) sum; \
- } \
- SET_NZ(A); \
+#define ADC \
+ if(P & _fT) \
+ TADC \
+ else { \
+ if (P & _fD) \
+ { \
+ int c = (P & _fC); \
+ int lo = (A & 0x0f) + (tmp & 0x0f) + c; \
+ int hi = (A & 0xf0) + (tmp & 0xf0); \
+ P &= ~_fC; \
+ if (lo > 0x09) \
+ { \
+ hi += 0x10; \
+ lo += 0x06; \
+ } \
+ if (hi > 0x90) \
+ hi += 0x60; \
+ if (hi & 0xff00) \
+ P |= _fC; \
+ A = (lo & 0x0f) + (hi & 0xf0); \
+ H6280_CYCLES(1); \
+ } \
+ else \
+ { \
+ int c = (P & _fC); \
+ int sum = A + tmp + c; \
+ P &= ~(_fV | _fC); \
+ if (~(A^tmp) & (A^sum) & _fN) \
+ P |= _fV; \
+ if (sum & 0xff00) \
+ P |= _fC; \
+ A = (UINT8) sum; \
+ } \
+ SET_NZ(A); \
}
/* 6280 ********************************************************
* AND Logical and
***************************************************************/
-#define TAND \
- { \
- int tflagtemp; \
- CLEAR_T; \
- RD_TFL; \
- tflagtemp = (UINT8)(tflagtemp & tmp); \
- WB_TFL; \
- SET_NZ(tflagtemp); \
- H6280_CYCLES(3); \
+#define TAND \
+ { \
+ int tflagtemp; \
+ CLEAR_T; \
+ RD_TFL; \
+ tflagtemp = (UINT8)(tflagtemp & tmp); \
+ WB_TFL; \
+ SET_NZ(tflagtemp); \
+ H6280_CYCLES(3); \
}
-#define AND \
- if(P & _fT) \
- TAND \
- else { \
- A = (UINT8)(A & tmp); \
- SET_NZ(A); \
+#define AND \
+ if(P & _fT) \
+ TAND \
+ else { \
+ A = (UINT8)(A & tmp); \
+ SET_NZ(A); \
}
/* 6280 ********************************************************
* ASL Arithmetic shift left
***************************************************************/
-#define ASL \
- CLEAR_T; \
- P = (P & ~_fC) | ((tmp >> 7) & _fC); \
- tmp = (UINT8)(tmp << 1); \
+#define ASL \
+ CLEAR_T; \
+ P = (P & ~_fC) | ((tmp >> 7) & _fC); \
+ tmp = (UINT8)(tmp << 1); \
SET_NZ(tmp)
/* 6280 ********************************************************
* BBR Branch if bit is reset
***************************************************************/
#define BBR(bit) \
- BRA(!(tmp & (1<<bit)))
+ BRA(!(tmp & (1<<bit)))
/* 6280 ********************************************************
* BBS Branch if bit is set
***************************************************************/
#define BBS(bit) \
- BRA(tmp & (1<<bit))
+ BRA(tmp & (1<<bit))
/* 6280 ********************************************************
* BCC Branch if carry clear
@@ -447,10 +447,10 @@
/* 6280 ********************************************************
* BIT Bit test
***************************************************************/
-#define HBIT \
- P = (P & ~(_fN|_fV|_fT|_fZ)) \
- | ((tmp&0x80) ? _fN:0) \
- | ((tmp&0x40) ? _fV:0) \
+#define HBIT \
+ P = (P & ~(_fN|_fV|_fT|_fZ)) \
+ | ((tmp&0x80) ? _fN:0) \
+ | ((tmp&0x40) ? _fV:0) \
| ((tmp&A) ? 0:_fZ)
/* 6280 ********************************************************
@@ -485,24 +485,24 @@
* increment PC, push PC hi, PC lo, flags (with B bit set),
* set I flag, reset D flag and jump via IRQ vector
***************************************************************/
-#define BRK \
- logerror("BRK %04x\n",PCW); \
- CLEAR_T; \
- PCW++; \
- push(PCH); \
- push(PCL); \
- push(P); \
- P = (P & ~_fD) | _fI; \
- PCL = program_read8(H6280_IRQ2_VEC); \
- PCH = program_read8(H6280_IRQ2_VEC+1); \
+#define BRK \
+ logerror("BRK %04x\n",PCW); \
+ CLEAR_T; \
+ PCW++; \
+ push(PCH); \
+ push(PCL); \
+ push(P); \
+ P = (P & ~_fD) | _fI; \
+ PCL = program_read8(H6280_IRQ2_VEC); \
+ PCH = program_read8(H6280_IRQ2_VEC+1); \
/* 6280 ********************************************************
* BSR Branch to subroutine
***************************************************************/
-#define BSR \
- push(PCH); \
- push(PCL); \
- H6280_CYCLES(4); /* 4 cycles here, 4 in BRA */ \
+#define BSR \
+ push(PCH); \
+ push(PCL); \
+ H6280_CYCLES(4); /* 4 cycles here, 4 in BRA */ \
BRA(1)
/* 6280 ********************************************************
@@ -519,224 +519,224 @@
* CLA Clear accumulator
***************************************************************/
#define CLA \
- CLEAR_T; \
+ CLEAR_T; \
A = 0
/* 6280 ********************************************************
* CLC Clear carry flag
***************************************************************/
-#define CLC \
- CLEAR_T; \
+#define CLC \
+ CLEAR_T; \
P &= ~_fC
/* 6280 ********************************************************
* CLD Clear decimal flag
***************************************************************/
-#define CLD \
- CLEAR_T; \
+#define CLD \
+ CLEAR_T; \
P &= ~_fD
/* 6280 ********************************************************
* CLI Clear interrupt flag
***************************************************************/
-#define CLI \
- CLEAR_T; \
- if( P & _fI ) \
- { \
- P &= ~_fI; \
- CHECK_IRQ_LINES; \
+#define CLI \
+ CLEAR_T; \
+ if( P & _fI ) \
+ { \
+ P &= ~_fI; \
+ CHECK_IRQ_LINES; \
}
/* 6280 ********************************************************
* CLV Clear overflow flag
***************************************************************/
-#define CLV \
- CLEAR_T; \
+#define CLV \
+ CLEAR_T; \
P &= ~_fV
/* 6280 ********************************************************
* CLX Clear index X
***************************************************************/
#define CLX \
- CLEAR_T; \
- X = 0
+ CLEAR_T; \
+ X = 0
/* 6280 ********************************************************
* CLY Clear index Y
***************************************************************/
#define CLY \
- CLEAR_T; \
- Y = 0
+ CLEAR_T; \
+ Y = 0
/* 6280 ********************************************************
* CMP Compare accumulator
***************************************************************/
-#define CMP \
- CLEAR_T; \
- P &= ~_fC; \
- if (A >= tmp) \
- P |= _fC; \
+#define CMP \
+ CLEAR_T; \
+ P &= ~_fC; \
+ if (A >= tmp) \
+ P |= _fC; \
SET_NZ((UINT8)(A - tmp))
/* 6280 ********************************************************
* CPX Compare index X
***************************************************************/
-#define CPX \
- CLEAR_T; \
- P &= ~_fC; \
- if (X >= tmp) \
- P |= _fC; \
+#define CPX \
+ CLEAR_T; \
+ P &= ~_fC; \
+ if (X >= tmp) \
+ P |= _fC; \
SET_NZ((UINT8)(X - tmp))
/* 6280 ********************************************************
* CPY Compare index Y
***************************************************************/
-#define CPY \
- CLEAR_T; \
- P &= ~_fC; \
- if (Y >= tmp) \
- P |= _fC; \
+#define CPY \
+ CLEAR_T; \
+ P &= ~_fC; \
+ if (Y >= tmp) \
+ P |= _fC; \
SET_NZ((UINT8)(Y - tmp))
/* 6280 ********************************************************
* DEA Decrement accumulator
***************************************************************/
#define DEA \
- CLEAR_T; \
- A = (UINT8)(A - 1); \
- SET_NZ(A)
+ CLEAR_T; \
+ A = (UINT8)(A - 1); \
+ SET_NZ(A)
/* 6280 ********************************************************
* DEC Decrement memory
***************************************************************/
-#define DEC \
- CLEAR_T; \
- tmp = (UINT8)(tmp-1); \
+#define DEC \
+ CLEAR_T; \
+ tmp = (UINT8)(tmp-1); \
SET_NZ(tmp)
/* 6280 ********************************************************
* DEX Decrement index X
***************************************************************/
-#define DEX \
- CLEAR_T; \
- X = (UINT8)(X - 1); \
+#define DEX \
+ CLEAR_T; \
+ X = (UINT8)(X - 1); \
SET_NZ(X)
/* 6280 ********************************************************
* DEY Decrement index Y
***************************************************************/
-#define DEY \
- CLEAR_T; \
- Y = (UINT8)(Y - 1); \
+#define DEY \
+ CLEAR_T; \
+ Y = (UINT8)(Y - 1); \
SET_NZ(Y)
/* 6280 ********************************************************
* EOR Logical exclusive or
***************************************************************/
-#define TEOR \
- { \
- int tflagtemp; \
- CLEAR_T; \
- RD_TFL; \
- tflagtemp = (UINT8)(tflagtemp ^ tmp); \
- WB_TFL; \
- SET_NZ(tflagtemp); \
- H6280_CYCLES(3); \
+#define TEOR \
+ { \
+ int tflagtemp; \
+ CLEAR_T; \
+ RD_TFL; \
+ tflagtemp = (UINT8)(tflagtemp ^ tmp); \
+ WB_TFL; \
+ SET_NZ(tflagtemp); \
+ H6280_CYCLES(3); \
}
-#define EOR \
- if(P & _fT) \
- TEOR \
- else { \
- A = (UINT8)(A ^ tmp); \
- SET_NZ(A); \
+#define EOR \
+ if(P & _fT) \
+ TEOR \
+ else { \
+ A = (UINT8)(A ^ tmp); \
+ SET_NZ(A); \
}
/* 6280 ********************************************************
* INA Increment accumulator
***************************************************************/
#define INA \
- CLEAR_T; \
- A = (UINT8)(A + 1); \
- SET_NZ(A)
+ CLEAR_T; \
+ A = (UINT8)(A + 1); \
+ SET_NZ(A)
/* 6280 ********************************************************
* INC Increment memory
***************************************************************/
-#define INC \
- CLEAR_T; \
- tmp = (UINT8)(tmp+1); \
+#define INC \
+ CLEAR_T; \
+ tmp = (UINT8)(tmp+1); \
SET_NZ(tmp)
/* 6280 ********************************************************
* INX Increment index X
***************************************************************/
-#define INX \
- CLEAR_T; \
- X = (UINT8)(X + 1); \
+#define INX \
+ CLEAR_T; \
+ X = (UINT8)(X + 1); \
SET_NZ(X)
/* 6280 ********************************************************
* INY Increment index Y
***************************************************************/
-#define INY \
- CLEAR_T; \
- Y = (UINT8)(Y + 1); \
+#define INY \
+ CLEAR_T; \
+ Y = (UINT8)(Y + 1); \
SET_NZ(Y)
/* 6280 ********************************************************
* JMP Jump to address
* set PC to the effective address
***************************************************************/
-#define JMP \
- CLEAR_T; \
- PCD = EAD; \
+#define JMP \
+ CLEAR_T; \
+ PCD = EAD; \
/* 6280 ********************************************************
* JSR Jump to subroutine
* decrement PC (sic!) push PC hi, push PC lo and set
* PC to the effective address
***************************************************************/
-#define JSR \
- CLEAR_T; \
- PCW--; \
- push(PCH); \
- push(PCL); \
- PCD = EAD; \
+#define JSR \
+ CLEAR_T; \
+ PCW--; \
+ push(PCH); \
+ push(PCL); \
+ PCD = EAD; \
/* 6280 ********************************************************
* LDA Load accumulator
***************************************************************/
-#define LDA \
- CLEAR_T; \
- A = (UINT8)tmp; \
+#define LDA \
+ CLEAR_T; \
+ A = (UINT8)tmp; \
SET_NZ(A)
/* 6280 ********************************************************
* LDX Load index X
***************************************************************/
-#define LDX \
- CLEAR_T; \
- X = (UINT8)tmp; \
+#define LDX \
+ CLEAR_T; \
+ X = (UINT8)tmp; \
SET_NZ(X)
/* 6280 ********************************************************
* LDY Load index Y
***************************************************************/
-#define LDY \
- CLEAR_T; \
- Y = (UINT8)tmp; \
+#define LDY \
+ CLEAR_T; \
+ Y = (UINT8)tmp; \
SET_NZ(Y)
/* 6280 ********************************************************
* LSR Logic shift right
* 0 -> [7][6][5][4][3][2][1][0] -> C
***************************************************************/
-#define LSR \
- CLEAR_T; \
- P = (P & ~_fC) | (tmp & _fC); \
- tmp = (UINT8)tmp >> 1; \
+#define LSR \
+ CLEAR_T; \
+ P = (P & ~_fC) | (tmp & _fC); \
+ tmp = (UINT8)tmp >> 1; \
SET_NZ(tmp)
/* 6280 ********************************************************
@@ -748,60 +748,60 @@
* ORA Logical inclusive or
***************************************************************/
-#define TORA \
- { \
- int tflagtemp; \
- CLEAR_T; \
- RD_TFL; \
- tflagtemp = (UINT8)(tflagtemp | tmp); \
- WB_TFL; \
- SET_NZ(tflagtemp); \
- H6280_CYCLES(3); \
+#define TORA \
+ { \
+ int tflagtemp; \
+ CLEAR_T; \
+ RD_TFL; \
+ tflagtemp = (UINT8)(tflagtemp | tmp); \
+ WB_TFL; \
+ SET_NZ(tflagtemp); \
+ H6280_CYCLES(3); \
}
-#define ORA \
- if(P & _fT) \
- TORA \
- else { \
- A = (UINT8)(A | tmp); \
- SET_NZ(A); \
+#define ORA \
+ if(P & _fT) \
+ TORA \
+ else { \
+ A = (UINT8)(A | tmp); \
+ SET_NZ(A); \
}
/* 6280 ********************************************************
* PHA Push accumulator
***************************************************************/
-#define PHA \
- CLEAR_T; \
+#define PHA \
+ CLEAR_T; \
push(A)
/* 6280 ********************************************************
* PHP Push processor status (flags)
***************************************************************/
-#define PHP \
- CLEAR_T; \
- COMPOSE_P(0,0); \
+#define PHP \
+ CLEAR_T; \
+ COMPOSE_P(0,0); \
push(P)
/* 6280 ********************************************************
* PHX Push index X
***************************************************************/
#define PHX \
- CLEAR_T; \
- push(X)
+ CLEAR_T; \
+ push(X)
/* 6280 ********************************************************
* PHY Push index Y
***************************************************************/
#define PHY \
- CLEAR_T; \
- push(Y)
+ CLEAR_T; \
+ push(Y)
/* 6280 ********************************************************
* PLA Pull accumulator
***************************************************************/
-#define PLA \
- CLEAR_T; \
- pull(A); \
+#define PLA \
+ CLEAR_T; \
+ pull(A); \
SET_NZ(A)
/* 6280 ********************************************************
@@ -809,18 +809,18 @@
***************************************************************/
#if LAZY_FLAGS
-#define PLP \
- pull(P); \
- P |= _fB; \
- NZ = ((P & _fN) << 8) | \
- ((P & _fZ) ^ _fZ); \
+#define PLP \
+ pull(P); \
+ P |= _fB; \
+ NZ = ((P & _fN) << 8) | \
+ ((P & _fZ) ^ _fZ); \
CHECK_IRQ_LINES
#else
-#define PLP \
- pull(P); \
- P |= _fB; \
+#define PLP \
+ pull(P); \
+ P |= _fB; \
CHECK_IRQ_LINES
#endif
@@ -828,45 +828,45 @@
* PLX Pull index X
***************************************************************/
#define PLX \
- CLEAR_T; \
- pull(X); \
+ CLEAR_T; \
+ pull(X); \
SET_NZ(X)
/* 6280 ********************************************************
* PLY Pull index Y
***************************************************************/
#define PLY \
- CLEAR_T; \
- pull(Y); \
+ CLEAR_T; \
+ pull(Y); \
SET_NZ(Y)
/* 6280 ********************************************************
* RMB Reset memory bit
***************************************************************/
#define RMB(bit) \
- CLEAR_T; \
- tmp &= ~(1<<bit)
+ CLEAR_T; \
+ tmp &= ~(1<<bit)
/* 6280 ********************************************************
* ROL Rotate left
* new C <- [7][6][5][4][3][2][1][0] <- C
***************************************************************/
-#define ROL \
- CLEAR_T; \
- tmp = (tmp << 1) | (P & _fC); \
- P = (P & ~_fC) | ((tmp >> 8) & _fC); \
- tmp = (UINT8)tmp; \
+#define ROL \
+ CLEAR_T; \
+ tmp = (tmp << 1) | (P & _fC); \
+ P = (P & ~_fC) | ((tmp >> 8) & _fC); \
+ tmp = (UINT8)tmp; \
SET_NZ(tmp)
/* 6280 ********************************************************
* ROR Rotate right
* C -> [7][6][5][4][3][2][1][0] -> new C
***************************************************************/
-#define ROR \
- CLEAR_T; \
- tmp |= (P & _fC) << 8; \
- P = (P & ~_fC) | (tmp & _fC); \
- tmp = (UINT8)(tmp >> 1); \
+#define ROR \
+ CLEAR_T; \
+ tmp |= (P & _fC) << 8; \
+ P = (P & ~_fC) | (tmp & _fC); \
+ tmp = (UINT8)(tmp >> 1); \
SET_NZ(tmp)
/* 6280 ********************************************************
@@ -875,21 +875,21 @@
***************************************************************/
#if LAZY_FLAGS
-#define RTI \
- pull(P); \
- P |= _fB; \
- NZ = ((P & _fN) << 8) | \
- ((P & _fZ) ^ _fZ); \
- pull(PCL); \
- pull(PCH); \
+#define RTI \
+ pull(P); \
+ P |= _fB; \
+ NZ = ((P & _fN) << 8) | \
+ ((P & _fZ) ^ _fZ); \
+ pull(PCL); \
+ pull(PCH); \
CHECK_IRQ_LINES
#else
-#define RTI \
- pull(P); \
- P |= _fB; \
- pull(PCL); \
- pull(PCH); \
+#define RTI \
+ pull(P); \
+ P |= _fB; \
+ pull(PCL); \
+ pull(PCH); \
CHECK_IRQ_LINES
#endif
@@ -897,106 +897,106 @@
* RTS Return from subroutine
* pull PC lo, PC hi and increment PC
***************************************************************/
-#define RTS \
- CLEAR_T; \
- pull(PCL); \
- pull(PCH); \
+#define RTS \
+ CLEAR_T; \
+ pull(PCL); \
+ pull(PCH); \
PCW++;
/* 6280 ********************************************************
* SAX Swap accumulator and index X
***************************************************************/
#define SAX \
- CLEAR_T; \
- tmp = X; \
- X = A; \
- A = tmp
+ CLEAR_T; \
+ tmp = X; \
+ X = A; \
+ A = tmp
/* 6280 ********************************************************
* SAY Swap accumulator and index Y
***************************************************************/
#define SAY \
- CLEAR_T; \
- tmp = Y; \
- Y = A; \
- A = tmp
+ CLEAR_T; \
+ tmp = Y; \
+ Y = A; \
+ A = tmp
/* 6280 ********************************************************
* SBC Subtract with carry
***************************************************************/
-#define TSBC \
- { \
- int tflagtemp; \
- CLEAR_T; \
- RD_TFL; \
- if (P & _fD) \
- { \
- int c = (P & _fC) ^ _fC; \
- int sum = tflagtemp - tmp -c; \
- int lo = (tflagtemp & 0x0f) - (tmp & 0x0f) - c; \
- int hi = (tflagtemp & 0xf0) - (tmp & 0xf0); \
- P &= ~_fC; \
- if (lo & 0xf0) \
- lo -= 6; \
- if (lo & 0x80) \
- hi -= 0x10; \
- if (hi & 0x0f00) \
- hi -= 0x60; \
- if ((sum & 0xff00) == 0) \
- P |= _fC; \
- tflagtemp = (lo & 0x0f) + (hi & 0xf0); \
- H6280_CYCLES(1); \
- } \
- else \
- { \
- int c = (P & _fC) ^ _fC; \
- int sum = tflagtemp - tmp - c; \
- P &= ~(_fV | _fC); \
- if ((tflagtemp^tmp) & (tflagtemp^sum) & _fN) \
- P |= _fV; \
- if ((sum & 0xff00) == 0) \
- P |= _fC; \
- tflagtemp = (UINT8) sum; \
- } \
- SET_NZ(tflagtemp); \
- WB_TFL; \
- H6280_CYCLES(3); \
+#define TSBC \
+ { \
+ int tflagtemp; \
+ CLEAR_T; \
+ RD_TFL; \
+ if (P & _fD) \
+ { \
+ int c = (P & _fC) ^ _fC; \
+ int sum = tflagtemp - tmp -c; \
+ int lo = (tflagtemp & 0x0f) - (tmp & 0x0f) - c; \
+ int hi = (tflagtemp & 0xf0) - (tmp & 0xf0); \
+ P &= ~_fC; \
+ if (lo & 0xf0) \
+ lo -= 6; \
+ if (lo & 0x80) \
+ hi -= 0x10; \
+ if (hi & 0x0f00) \
+ hi -= 0x60; \
+ if ((sum & 0xff00) == 0) \
+ P |= _fC; \
+ tflagtemp = (lo & 0x0f) + (hi & 0xf0); \
+ H6280_CYCLES(1); \
+ } \
+ else \
+ { \
+ int c = (P & _fC) ^ _fC; \
+ int sum = tflagtemp - tmp - c; \
+ P &= ~(_fV | _fC); \
+ if ((tflagtemp^tmp) & (tflagtemp^sum) & _fN) \
+ P |= _fV; \
+ if ((sum & 0xff00) == 0) \
+ P |= _fC; \
+ tflagtemp = (UINT8) sum; \
+ } \
+ SET_NZ(tflagtemp); \
+ WB_TFL; \
+ H6280_CYCLES(3); \
}
-#define SBC \
- if(P & _fT) \
- TSBC \
- else { \
- if (P & _fD) \
- { \
- int c = (P & _fC) ^ _fC; \
- int sum = A - tmp - c; \
- int lo = (A & 0x0f) - (tmp & 0x0f) - c; \
- int hi = (A & 0xf0) - (tmp & 0xf0); \
- P &= ~_fC; \
- if (lo & 0xf0) \
- lo -= 6; \
- if (lo & 0x80) \
- hi -= 0x10; \
- if (hi & 0x0f00) \
- hi -= 0x60; \
- if ((sum & 0xff00) == 0) \
- P |= _fC; \
- A = (lo & 0x0f) + (hi & 0xf0); \
- H6280_CYCLES(1); \
- } \
- else \
- { \
- int c = (P & _fC) ^ _fC; \
- int sum = A - tmp - c; \
- P &= ~(_fV | _fC); \
- if ((A^tmp) & (A^sum) & _fN) \
- P |= _fV; \
- if ((sum & 0xff00) == 0) \
- P |= _fC; \
- A = (UINT8) sum; \
- } \
- SET_NZ(A); \
+#define SBC \
+ if(P & _fT) \
+ TSBC \
+ else { \
+ if (P & _fD) \
+ { \
+ int c = (P & _fC) ^ _fC; \
+ int sum = A - tmp - c; \
+ int lo = (A & 0x0f) - (tmp & 0x0f) - c; \
+ int hi = (A & 0xf0) - (tmp & 0xf0); \
+ P &= ~_fC; \
+ if (lo & 0xf0) \
+ lo -= 6; \
+ if (lo & 0x80) \
+ hi -= 0x10; \
+ if (hi & 0x0f00) \
+ hi -= 0x60; \
+ if ((sum & 0xff00) == 0) \
+ P |= _fC; \
+ A = (lo & 0x0f) + (hi & 0xf0); \
+ H6280_CYCLES(1); \
+ } \
+ else \
+ { \
+ int c = (P & _fC) ^ _fC; \
+ int sum = A - tmp - c; \
+ P &= ~(_fV | _fC); \
+ if ((A^tmp) & (A^sum) & _fN) \
+ P |= _fV; \
+ if ((sum & 0xff00) == 0) \
+ P |= _fC; \
+ A = (UINT8) sum; \
+ } \
+ SET_NZ(A); \
}
/* 6280 ********************************************************
@@ -1005,210 +1005,210 @@
#if defined(SEC)
#undef SEC
#endif
-#define SEC \
- CLEAR_T; \
+#define SEC \
+ CLEAR_T; \
P |= _fC
/* 6280 ********************************************************
* SED Set decimal flag
***************************************************************/
-#define SED \
- CLEAR_T; \
+#define SED \
+ CLEAR_T; \
P |= _fD
/* 6280 ********************************************************
* SEI Set interrupt flag
***************************************************************/
-#define SEI \
- CLEAR_T; \
+#define SEI \
+ CLEAR_T; \
P |= _fI
/* 6280 ********************************************************
* SET Set t flag
***************************************************************/
-#define SET \
+#define SET \
P |= _fT;
/* 6280 ********************************************************
* SMB Set memory bit
***************************************************************/
#define SMB(bit) \
- CLEAR_T; \
- tmp |= (1<<bit)
+ CLEAR_T; \
+ tmp |= (1<<bit)
/* 6280 ********************************************************
* ST0 Store at hardware address 0
***************************************************************/
#define ST0 \
- CLEAR_T; \
- m_io->write_byte(0x0000,tmp)
+ CLEAR_T; \
+ m_io->write_byte(0x0000,tmp)
/* 6280 ********************************************************
* ST1 Store at hardware address 2
***************************************************************/
#define ST1 \
- CLEAR_T; \
- m_io->write_byte(0x0002,tmp)
+ CLEAR_T; \
+ m_io->write_byte(0x0002,tmp)
/* 6280 ********************************************************
* ST2 Store at hardware address 3
***************************************************************/
#define ST2 \
- CLEAR_T; \
- m_io->write_byte(0x0003,tmp)
+ CLEAR_T; \
+ m_io->write_byte(0x0003,tmp)
/* 6280 ********************************************************
* STA Store accumulator
***************************************************************/
-#define STA \
- CLEAR_T; \
+#define STA \
+ CLEAR_T; \
tmp = A
/* 6280 ********************************************************
* STX Store index X
***************************************************************/
-#define STX \
- CLEAR_T; \
+#define STX \
+ CLEAR_T; \
tmp = X
/* 6280 ********************************************************
* STY Store index Y
***************************************************************/
-#define STY \
- CLEAR_T; \
+#define STY \
+ CLEAR_T; \
tmp = Y
/* 6280 ********************************************************
* STZ Store zero
***************************************************************/
#define STZ \
- CLEAR_T; \
- tmp = 0
+ CLEAR_T; \
+ tmp = 0
/* H6280 *******************************************************
* SXY Swap index X and index Y
***************************************************************/
#define SXY \
- CLEAR_T; \
- tmp = X; \
- X = Y; \
- Y = tmp
+ CLEAR_T; \
+ tmp = X; \
+ X = Y; \
+ Y = tmp
/* H6280 *******************************************************
* TAI Transfer Alternate Increment
***************************************************************/
-#define TAI \
- CLEAR_T; \
- from = program_read16(PCW); \
- to = program_read16(PCW + 2); \
- length = program_read16(PCW + 4); \
- PCW += 6; \
- alternate = 0; \
- if (!length) length = 0x10000; \
- H6280_CYCLES( ((6 * length) + 17) ); \
- while ((length--) != 0) \
- { \
- program_write8(to, program_read8(from + alternate)); \
- to++; \
- alternate ^= 1; \
+#define TAI \
+ CLEAR_T; \
+ from = program_read16(PCW); \
+ to = program_read16(PCW + 2); \
+ length = program_read16(PCW + 4); \
+ PCW += 6; \
+ alternate = 0; \
+ if (!length) length = 0x10000; \
+ H6280_CYCLES( ((6 * length) + 17) ); \
+ while ((length--) != 0) \
+ { \
+ program_write8(to, program_read8(from + alternate)); \
+ to++; \
+ alternate ^= 1; \
}
/* H6280 *******************************************************
* TAM Transfer accumulator to memory mapper register(s)
***************************************************************/
#define TAM \
- CLEAR_T; \
- if (tmp&0x01) m_mmr[0] = A; \
- if (tmp&0x02) m_mmr[1] = A; \
- if (tmp&0x04) m_mmr[2] = A; \
- if (tmp&0x08) m_mmr[3] = A; \
- if (tmp&0x10) m_mmr[4] = A; \
- if (tmp&0x20) m_mmr[5] = A; \
- if (tmp&0x40) m_mmr[6] = A; \
- if (tmp&0x80) m_mmr[7] = A
+ CLEAR_T; \
+ if (tmp&0x01) m_mmr[0] = A; \
+ if (tmp&0x02) m_mmr[1] = A; \
+ if (tmp&0x04) m_mmr[2] = A; \
+ if (tmp&0x08) m_mmr[3] = A; \
+ if (tmp&0x10) m_mmr[4] = A; \
+ if (tmp&0x20) m_mmr[5] = A; \
+ if (tmp&0x40) m_mmr[6] = A; \
+ if (tmp&0x80) m_mmr[7] = A
/* 6280 ********************************************************
* TAX Transfer accumulator to index X
***************************************************************/
-#define TAX \
- CLEAR_T; \
- X = A; \
+#define TAX \
+ CLEAR_T; \
+ X = A; \
SET_NZ(X)
/* 6280 ********************************************************
* TAY Transfer accumulator to index Y
***************************************************************/
-#define TAY \
- CLEAR_T; \
- Y = A; \
+#define TAY \
+ CLEAR_T; \
+ Y = A; \
SET_NZ(Y)
/* 6280 ********************************************************
* TDD Transfer Decrement Decrement
***************************************************************/
-#define TDD \
- CLEAR_T; \
- from = program_read16(PCW); \
- to = program_read16(PCW + 2); \
- length = program_read16(PCW + 4); \
- PCW+=6; \
- if (!length) length = 0x10000; \
- H6280_CYCLES( ((6 * length) + 17) ); \
- while ((length--) != 0) { \
- program_write8(to, program_read8(from)); \
- to--; \
- from--; \
+#define TDD \
+ CLEAR_T; \
+ from = program_read16(PCW); \
+ to = program_read16(PCW + 2); \
+ length = program_read16(PCW + 4); \
+ PCW+=6; \
+ if (!length) length = 0x10000; \
+ H6280_CYCLES( ((6 * length) + 17) ); \
+ while ((length--) != 0) { \
+ program_write8(to, program_read8(from)); \
+ to--; \
+ from--; \
}
/* 6280 ********************************************************
* TIA Transfer Increment Alternate
***************************************************************/
-#define TIA \
- CLEAR_T; \
- from = program_read16(PCW); \
- to = program_read16(PCW + 2); \
- length = program_read16(PCW + 4); \
- PCW+=6; \
- alternate=0; \
- if (!length) length = 0x10000; \
- H6280_CYCLES( ((6 * length) + 17) ); \
- while ((length--) != 0) { \
- program_write8(to + alternate, program_read8(from)); \
- from++; \
- alternate ^= 1; \
+#define TIA \
+ CLEAR_T; \
+ from = program_read16(PCW); \
+ to = program_read16(PCW + 2); \
+ length = program_read16(PCW + 4); \
+ PCW+=6; \
+ alternate=0; \
+ if (!length) length = 0x10000; \
+ H6280_CYCLES( ((6 * length) + 17) ); \
+ while ((length--) != 0) { \
+ program_write8(to + alternate, program_read8(from)); \
+ from++; \
+ alternate ^= 1; \
}
/* 6280 ********************************************************
* TII Transfer Increment Increment
***************************************************************/
-#define TII \
- CLEAR_T; \
- from = program_read16(PCW); \
- to = program_read16(PCW + 2); \
- length = program_read16(PCW + 4); \
- PCW += 6; \
- if (!length) length = 0x10000; \
- H6280_CYCLES( ((6 * length) + 17) ); \
- while ((length--) != 0) { \
- program_write8(to, program_read8(from)); \
- to++; \
- from++; \
+#define TII \
+ CLEAR_T; \
+ from = program_read16(PCW); \
+ to = program_read16(PCW + 2); \
+ length = program_read16(PCW + 4); \
+ PCW += 6; \
+ if (!length) length = 0x10000; \
+ H6280_CYCLES( ((6 * length) + 17) ); \
+ while ((length--) != 0) { \
+ program_write8(to, program_read8(from)); \
+ to++; \
+ from++; \
}
/* 6280 ********************************************************
* TIN Transfer block, source increments every loop
***************************************************************/
-#define TIN \
- CLEAR_T; \
- from = program_read16(PCW); \
- to = program_read16(PCW + 2); \
- length = program_read16(PCW + 4); \
- PCW+=6; \
- if (!length) length = 0x10000; \
- H6280_CYCLES( ((6 * length) + 17) ); \
- while ((length--) != 0) { \
- program_write8(to, program_read8(from)); \
- from++; \
+#define TIN \
+ CLEAR_T; \
+ from = program_read16(PCW); \
+ to = program_read16(PCW + 2); \
+ length = program_read16(PCW + 4); \
+ PCW+=6; \
+ if (!length) length = 0x10000; \
+ H6280_CYCLES( ((6 * length) + 17) ); \
+ while ((length--) != 0) { \
+ program_write8(to, program_read8(from)); \
+ from++; \
}
/* 6280 ********************************************************
@@ -1216,87 +1216,87 @@
* the highest bit set in tmp is the one that counts
***************************************************************/
#define TMA \
- CLEAR_T; \
- if (tmp&0x01) A = m_mmr[0]; \
- if (tmp&0x02) A = m_mmr[1]; \
- if (tmp&0x04) A = m_mmr[2]; \
- if (tmp&0x08) A = m_mmr[3]; \
- if (tmp&0x10) A = m_mmr[4]; \
- if (tmp&0x20) A = m_mmr[5]; \
- if (tmp&0x40) A = m_mmr[6]; \
- if (tmp&0x80) A = m_mmr[7]
+ CLEAR_T; \
+ if (tmp&0x01) A = m_mmr[0]; \
+ if (tmp&0x02) A = m_mmr[1]; \
+ if (tmp&0x04) A = m_mmr[2]; \
+ if (tmp&0x08) A = m_mmr[3]; \
+ if (tmp&0x10) A = m_mmr[4]; \
+ if (tmp&0x20) A = m_mmr[5]; \
+ if (tmp&0x40) A = m_mmr[6]; \
+ if (tmp&0x80) A = m_mmr[7]
/* 6280 ********************************************************
* TRB Test and reset bits
***************************************************************/
-#define TRB \
- CLEAR_T; \
- P = (P & ~(_fN|_fV|_fT|_fZ)) \
- | ((tmp&0x80) ? _fN:0) \
- | ((tmp&0x40) ? _fV:0) \
- | ((tmp&~A) ? 0:_fZ); \
- tmp &= ~A
+#define TRB \
+ CLEAR_T; \
+ P = (P & ~(_fN|_fV|_fT|_fZ)) \
+ | ((tmp&0x80) ? _fN:0) \
+ | ((tmp&0x40) ? _fV:0) \
+ | ((tmp&~A) ? 0:_fZ); \
+ tmp &= ~A
/* 6280 ********************************************************
* TSB Test and set bits
***************************************************************/
#define TSB \
- CLEAR_T; \
- P = (P & ~(_fN|_fV|_fT|_fZ)) \
- | ((tmp&0x80) ? _fN:0) \
- | ((tmp&0x40) ? _fV:0) \
- | ((tmp|A) ? 0:_fZ); \
- tmp |= A
+ CLEAR_T; \
+ P = (P & ~(_fN|_fV|_fT|_fZ)) \
+ | ((tmp&0x80) ? _fN:0) \
+ | ((tmp&0x40) ? _fV:0) \
+ | ((tmp|A) ? 0:_fZ); \
+ tmp |= A
/* 6280 ********************************************************
* TSX Transfer stack LSB to index X
***************************************************************/
-#define TSX \
- CLEAR_T; \
- X = S; \
+#define TSX \
+ CLEAR_T; \
+ X = S; \
SET_NZ(X)
/* 6280 ********************************************************
* TST
***************************************************************/
-#define TST \
- P = (P & ~(_fN|_fV|_fT|_fZ)) \
- | ((tmp&0x80) ? _fN:0) \
- | ((tmp&0x40) ? _fV:0) \
+#define TST \
+ P = (P & ~(_fN|_fV|_fT|_fZ)) \
+ | ((tmp&0x80) ? _fN:0) \
+ | ((tmp&0x40) ? _fV:0) \
| ((tmp&tmp2) ? 0:_fZ)
/* 6280 ********************************************************
* TXA Transfer index X to accumulator
***************************************************************/
-#define TXA \
- CLEAR_T; \
- A = X; \
+#define TXA \
+ CLEAR_T; \
+ A = X; \
SET_NZ(A)
/* 6280 ********************************************************
* TXS Transfer index X to stack LSB
* no flags changed (sic!)
***************************************************************/
-#define TXS \
- CLEAR_T; \
+#define TXS \
+ CLEAR_T; \
S = X
/* 6280 ********************************************************
* TYA Transfer index Y to accumulator
***************************************************************/
-#define TYA \
- CLEAR_T; \
- A = Y; \
+#define TYA \
+ CLEAR_T; \
+ A = Y; \
SET_NZ(A)
/* 6280 ********************************************************
* CSH Set CPU in high speed mode
***************************************************************/
-#define CSH \
+#define CSH \
m_clocks_per_cycle = 1;
/* 6280 ********************************************************
* CSL Set CPU in low speed mode
***************************************************************/
-#define CSL \
- m_clocks_per_cycle = 4;
+#define CSL \
+ m_clocks_per_cycle = 4;
diff --git a/src/emu/cpu/h6280/tblh6280.c b/src/emu/cpu/h6280/tblh6280.c
index dcd7ccbcc50..8ced7561acd 100644
--- a/src/emu/cpu/h6280/tblh6280.c
+++ b/src/emu/cpu/h6280/tblh6280.c
@@ -10,7 +10,7 @@
******************************************************************************/
-#undef OP
+#undef OP
#define OP(nnn) inline void op##nnn()
/*****************************************************************************
@@ -20,120 +20,120 @@
*
*****************************************************************************
* op temp cycles rdmem opc wrmem ******************/
-OP(_000) { H6280_CYCLES(8); BRK; } // 8 BRK
-OP(_020) { H6280_CYCLES(7); EA_ABS; JSR; } // 7 JSR ABS
-OP(_040) { H6280_CYCLES(7); RTI; } // 7 RTI
-OP(_060) { H6280_CYCLES(7); RTS; } // 7 RTS
-OP(_080) { int tmp; BRA(1); } // 4 BRA REL
-OP(_0a0) { int tmp; H6280_CYCLES(2); RD_IMM; LDY; } // 2 LDY IMM
-OP(_0c0) { int tmp; H6280_CYCLES(2); RD_IMM; CPY; } // 2 CPY IMM
-OP(_0e0) { int tmp; H6280_CYCLES(2); RD_IMM; CPX; } // 2 CPX IMM
-
-OP(_010) { int tmp; BPL; } // 2/4 BPL REL
-OP(_030) { int tmp; BMI; } // 2/4 BMI REL
-OP(_050) { int tmp; BVC; } // 2/4 BVC REL
-OP(_070) { int tmp; BVS; } // 2/4 BVS REL
-OP(_090) { int tmp; BCC; } // 2/4 BCC REL
-OP(_0b0) { int tmp; BCS; } // 2/4 BCS REL
-OP(_0d0) { int tmp; BNE; } // 2/4 BNE REL
-OP(_0f0) { int tmp; BEQ; } // 2/4 BEQ REL
-
-OP(_001) { int tmp; H6280_CYCLES(7); RD_IDX; ORA; } // 7 ORA IDX
-OP(_021) { int tmp; H6280_CYCLES(7); RD_IDX; AND; } // 7 AND IDX
-OP(_041) { int tmp; H6280_CYCLES(7); RD_IDX; EOR; } // 7 EOR IDX
-OP(_061) { int tmp; H6280_CYCLES(7); RD_IDX; ADC; } // 7 ADC IDX
+OP(_000) { H6280_CYCLES(8); BRK; } // 8 BRK
+OP(_020) { H6280_CYCLES(7); EA_ABS; JSR; } // 7 JSR ABS
+OP(_040) { H6280_CYCLES(7); RTI; } // 7 RTI
+OP(_060) { H6280_CYCLES(7); RTS; } // 7 RTS
+OP(_080) { int tmp; BRA(1); } // 4 BRA REL
+OP(_0a0) { int tmp; H6280_CYCLES(2); RD_IMM; LDY; } // 2 LDY IMM
+OP(_0c0) { int tmp; H6280_CYCLES(2); RD_IMM; CPY; } // 2 CPY IMM
+OP(_0e0) { int tmp; H6280_CYCLES(2); RD_IMM; CPX; } // 2 CPX IMM
+
+OP(_010) { int tmp; BPL; } // 2/4 BPL REL
+OP(_030) { int tmp; BMI; } // 2/4 BMI REL
+OP(_050) { int tmp; BVC; } // 2/4 BVC REL
+OP(_070) { int tmp; BVS; } // 2/4 BVS REL
+OP(_090) { int tmp; BCC; } // 2/4 BCC REL
+OP(_0b0) { int tmp; BCS; } // 2/4 BCS REL
+OP(_0d0) { int tmp; BNE; } // 2/4 BNE REL
+OP(_0f0) { int tmp; BEQ; } // 2/4 BEQ REL
+
+OP(_001) { int tmp; H6280_CYCLES(7); RD_IDX; ORA; } // 7 ORA IDX
+OP(_021) { int tmp; H6280_CYCLES(7); RD_IDX; AND; } // 7 AND IDX
+OP(_041) { int tmp; H6280_CYCLES(7); RD_IDX; EOR; } // 7 EOR IDX
+OP(_061) { int tmp; H6280_CYCLES(7); RD_IDX; ADC; } // 7 ADC IDX
OP(_081) { int tmp; H6280_CYCLES(7); STA; WR_IDX; } // 7 STA IDX
-OP(_0a1) { int tmp; H6280_CYCLES(7); RD_IDX; LDA; } // 7 LDA IDX
-OP(_0c1) { int tmp; H6280_CYCLES(7); RD_IDX; CMP; } // 7 CMP IDX
-OP(_0e1) { int tmp; H6280_CYCLES(7); RD_IDX; SBC; } // 7 SBC IDX
-
-OP(_011) { int tmp; H6280_CYCLES(7); RD_IDY; ORA; } // 7 ORA IDY
-OP(_031) { int tmp; H6280_CYCLES(7); RD_IDY; AND; } // 7 AND IDY
-OP(_051) { int tmp; H6280_CYCLES(7); RD_IDY; EOR; } // 7 EOR IDY
-OP(_071) { int tmp; H6280_CYCLES(7); RD_IDY; ADC; } // 7 ADC AZP
-OP(_091) { int tmp; H6280_CYCLES(7); STA; WR_IDY; } // 7 STA IDY
-OP(_0b1) { int tmp; H6280_CYCLES(7); RD_IDY; LDA; } // 7 LDA IDY
-OP(_0d1) { int tmp; H6280_CYCLES(7); RD_IDY; CMP; } // 7 CMP IDY
-OP(_0f1) { int tmp; H6280_CYCLES(7); RD_IDY; SBC; } // 7 SBC IDY
-
-OP(_002) { int tmp; H6280_CYCLES(3); SXY; } // 3 SXY
-OP(_022) { int tmp; H6280_CYCLES(3); SAX; } // 3 SAX
-OP(_042) { int tmp; H6280_CYCLES(3); SAY; } // 3 SAY
-OP(_062) { H6280_CYCLES(2); CLA; } // 2 CLA
-OP(_082) { H6280_CYCLES(2); CLX; } // 2 CLX
-OP(_0a2) { int tmp; H6280_CYCLES(2); RD_IMM; LDX; } // 2 LDX IMM
-OP(_0c2) { H6280_CYCLES(2); CLY; } // 2 CLY
-OP(_0e2) { H6280_CYCLES(2); NOP; } // 2 NOP
-
-OP(_012) { int tmp; H6280_CYCLES(7); RD_ZPI; ORA; } // 7 ORA ZPI
-OP(_032) { int tmp; H6280_CYCLES(7); RD_ZPI; AND; } // 7 AND ZPI
-OP(_052) { int tmp; H6280_CYCLES(7); RD_ZPI; EOR; } // 7 EOR ZPI
-OP(_072) { int tmp; H6280_CYCLES(7); RD_ZPI; ADC; } // 7 ADC ZPI
-OP(_092) { int tmp; H6280_CYCLES(7); STA; WR_ZPI; } // 7 STA ZPI
-OP(_0b2) { int tmp; H6280_CYCLES(7); RD_ZPI; LDA; } // 7 LDA ZPI
-OP(_0d2) { int tmp; H6280_CYCLES(7); RD_ZPI; CMP; } // 7 CMP ZPI
-OP(_0f2) { int tmp; H6280_CYCLES(7); RD_ZPI; SBC; } // 7 SBC ZPI
-
-OP(_003) { int tmp; H6280_CYCLES(5); RD_IMM; ST0; } // 4 + 1 penalty cycle ST0 IMM
-OP(_023) { int tmp; H6280_CYCLES(5); RD_IMM; ST2; } // 4 + 1 penalty cycle ST2 IMM
-OP(_043) { int tmp; H6280_CYCLES(4); RD_IMM; TMA; } // 4 TMA
-OP(_063) { H6280_CYCLES(4); NOP; } // 2 NOP
+OP(_0a1) { int tmp; H6280_CYCLES(7); RD_IDX; LDA; } // 7 LDA IDX
+OP(_0c1) { int tmp; H6280_CYCLES(7); RD_IDX; CMP; } // 7 CMP IDX
+OP(_0e1) { int tmp; H6280_CYCLES(7); RD_IDX; SBC; } // 7 SBC IDX
+
+OP(_011) { int tmp; H6280_CYCLES(7); RD_IDY; ORA; } // 7 ORA IDY
+OP(_031) { int tmp; H6280_CYCLES(7); RD_IDY; AND; } // 7 AND IDY
+OP(_051) { int tmp; H6280_CYCLES(7); RD_IDY; EOR; } // 7 EOR IDY
+OP(_071) { int tmp; H6280_CYCLES(7); RD_IDY; ADC; } // 7 ADC AZP
+OP(_091) { int tmp; H6280_CYCLES(7); STA; WR_IDY; } // 7 STA IDY
+OP(_0b1) { int tmp; H6280_CYCLES(7); RD_IDY; LDA; } // 7 LDA IDY
+OP(_0d1) { int tmp; H6280_CYCLES(7); RD_IDY; CMP; } // 7 CMP IDY
+OP(_0f1) { int tmp; H6280_CYCLES(7); RD_IDY; SBC; } // 7 SBC IDY
+
+OP(_002) { int tmp; H6280_CYCLES(3); SXY; } // 3 SXY
+OP(_022) { int tmp; H6280_CYCLES(3); SAX; } // 3 SAX
+OP(_042) { int tmp; H6280_CYCLES(3); SAY; } // 3 SAY
+OP(_062) { H6280_CYCLES(2); CLA; } // 2 CLA
+OP(_082) { H6280_CYCLES(2); CLX; } // 2 CLX
+OP(_0a2) { int tmp; H6280_CYCLES(2); RD_IMM; LDX; } // 2 LDX IMM
+OP(_0c2) { H6280_CYCLES(2); CLY; } // 2 CLY
+OP(_0e2) { H6280_CYCLES(2); NOP; } // 2 NOP
+
+OP(_012) { int tmp; H6280_CYCLES(7); RD_ZPI; ORA; } // 7 ORA ZPI
+OP(_032) { int tmp; H6280_CYCLES(7); RD_ZPI; AND; } // 7 AND ZPI
+OP(_052) { int tmp; H6280_CYCLES(7); RD_ZPI; EOR; } // 7 EOR ZPI
+OP(_072) { int tmp; H6280_CYCLES(7); RD_ZPI; ADC; } // 7 ADC ZPI
+OP(_092) { int tmp; H6280_CYCLES(7); STA; WR_ZPI; } // 7 STA ZPI
+OP(_0b2) { int tmp; H6280_CYCLES(7); RD_ZPI; LDA; } // 7 LDA ZPI
+OP(_0d2) { int tmp; H6280_CYCLES(7); RD_ZPI; CMP; } // 7 CMP ZPI
+OP(_0f2) { int tmp; H6280_CYCLES(7); RD_ZPI; SBC; } // 7 SBC ZPI
+
+OP(_003) { int tmp; H6280_CYCLES(5); RD_IMM; ST0; } // 4 + 1 penalty cycle ST0 IMM
+OP(_023) { int tmp; H6280_CYCLES(5); RD_IMM; ST2; } // 4 + 1 penalty cycle ST2 IMM
+OP(_043) { int tmp; H6280_CYCLES(4); RD_IMM; TMA; } // 4 TMA
+OP(_063) { H6280_CYCLES(4); NOP; } // 2 NOP
OP(_083) { int tmp,tmp2; H6280_CYCLES(7); RD_IMM2; RD_ZPG; TST; } // 7 TST IMM,ZPG
OP(_0a3) { int tmp,tmp2; H6280_CYCLES(7); RD_IMM2; RD_ZPX; TST; } // 7 TST IMM,ZPX
-OP(_0c3) { int to,from,length; TDD; } // 6*l+17 TDD XFER
-OP(_0e3) { int to,from,length,alternate; TIA; } // 6*l+17 TIA XFER
+OP(_0c3) { int to,from,length; TDD; } // 6*l+17 TDD XFER
+OP(_0e3) { int to,from,length,alternate; TIA; } // 6*l+17 TIA XFER
-OP(_013) { int tmp; H6280_CYCLES(5); RD_IMM; ST1; } // 4 + 1 penalty cycle ST1
-OP(_033) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_053) { int tmp; H6280_CYCLES(5); RD_IMM; TAM; } // 5 TAM IMM
-OP(_073) { int to,from,length; TII; } // 6*l+17 TII XFER
+OP(_013) { int tmp; H6280_CYCLES(5); RD_IMM; ST1; } // 4 + 1 penalty cycle ST1
+OP(_033) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_053) { int tmp; H6280_CYCLES(5); RD_IMM; TAM; } // 5 TAM IMM
+OP(_073) { int to,from,length; TII; } // 6*l+17 TII XFER
OP(_093) { int tmp,tmp2; H6280_CYCLES(8); RD_IMM2; RD_ABS; TST; } // 8 TST IMM,ABS
OP(_0b3) { int tmp,tmp2; H6280_CYCLES(8); RD_IMM2; RD_ABX; TST; } // 8 TST IMM,ABX
-OP(_0d3) { int to,from,length; TIN; } // 6*l+17 TIN XFER
-OP(_0f3) { int to,from,length,alternate; TAI; } // 6*l+17 TAI XFER
+OP(_0d3) { int to,from,length; TIN; } // 6*l+17 TIN XFER
+OP(_0f3) { int to,from,length,alternate; TAI; } // 6*l+17 TAI XFER
OP(_004) { int tmp; H6280_CYCLES(6); RD_ZPG; TSB; WB_EAZ; } // 6 TSB ZPG
-OP(_024) { int tmp; H6280_CYCLES(4); RD_ZPG; HBIT; } // 4 BIT ZPG
-OP(_044) { int tmp; BSR; } // 8 BSR REL
-OP(_064) { int tmp; H6280_CYCLES(4); STZ; WR_ZPG; } // 4 STZ ZPG
-OP(_084) { int tmp; H6280_CYCLES(4); STY; WR_ZPG; } // 4 STY ZPG
-OP(_0a4) { int tmp; H6280_CYCLES(4); RD_ZPG; LDY; } // 4 LDY ZPG
-OP(_0c4) { int tmp; H6280_CYCLES(4); RD_ZPG; CPY; } // 4 CPY ZPG
-OP(_0e4) { int tmp; H6280_CYCLES(4); RD_ZPG; CPX; } // 4 CPX ZPG
+OP(_024) { int tmp; H6280_CYCLES(4); RD_ZPG; HBIT; } // 4 BIT ZPG
+OP(_044) { int tmp; BSR; } // 8 BSR REL
+OP(_064) { int tmp; H6280_CYCLES(4); STZ; WR_ZPG; } // 4 STZ ZPG
+OP(_084) { int tmp; H6280_CYCLES(4); STY; WR_ZPG; } // 4 STY ZPG
+OP(_0a4) { int tmp; H6280_CYCLES(4); RD_ZPG; LDY; } // 4 LDY ZPG
+OP(_0c4) { int tmp; H6280_CYCLES(4); RD_ZPG; CPY; } // 4 CPY ZPG
+OP(_0e4) { int tmp; H6280_CYCLES(4); RD_ZPG; CPX; } // 4 CPX ZPG
OP(_014) { int tmp; H6280_CYCLES(6); RD_ZPG; TRB; WB_EAZ; } // 6 TRB ZPG
-OP(_034) { int tmp; H6280_CYCLES(4); RD_ZPX; HBIT; } // 4 BIT ZPX
-OP(_054) { H6280_CYCLES(3); CSL; } // 3 CSL
-OP(_074) { int tmp; H6280_CYCLES(4); STZ; WR_ZPX; } // 4 STZ ZPX
-OP(_094) { int tmp; H6280_CYCLES(4); STY; WR_ZPX; } // 4 STY ZPX
-OP(_0b4) { int tmp; H6280_CYCLES(4); RD_ZPX; LDY; } // 4 LDY ZPX
-OP(_0d4) { H6280_CYCLES(3); CSH; } // 3 CSH
-OP(_0f4) { H6280_CYCLES(2); SET; } // 2 SET
-
-OP(_005) { int tmp; H6280_CYCLES(4); RD_ZPG; ORA; } // 4 ORA ZPG
-OP(_025) { int tmp; H6280_CYCLES(4); RD_ZPG; AND; } // 4 AND ZPG
-OP(_045) { int tmp; H6280_CYCLES(4); RD_ZPG; EOR; } // 4 EOR ZPG
-OP(_065) { int tmp; H6280_CYCLES(4); RD_ZPG; ADC; } // 4 ADC ZPG
-OP(_085) { int tmp; H6280_CYCLES(4); STA; WR_ZPG; } // 4 STA ZPG
-OP(_0a5) { int tmp; H6280_CYCLES(4); RD_ZPG; LDA; } // 4 LDA ZPG
-OP(_0c5) { int tmp; H6280_CYCLES(4); RD_ZPG; CMP; } // 4 CMP ZPG
-OP(_0e5) { int tmp; H6280_CYCLES(4); RD_ZPG; SBC; } // 4 SBC ZPG
-
-OP(_015) { int tmp; H6280_CYCLES(4); RD_ZPX; ORA; } // 4 ORA ZPX
-OP(_035) { int tmp; H6280_CYCLES(4); RD_ZPX; AND; } // 4 AND ZPX
-OP(_055) { int tmp; H6280_CYCLES(4); RD_ZPX; EOR; } // 4 EOR ZPX
-OP(_075) { int tmp; H6280_CYCLES(4); RD_ZPX; ADC; } // 4 ADC ZPX
-OP(_095) { int tmp; H6280_CYCLES(4); STA; WR_ZPX; } // 4 STA ZPX
-OP(_0b5) { int tmp; H6280_CYCLES(4); RD_ZPX; LDA; } // 4 LDA ZPX
-OP(_0d5) { int tmp; H6280_CYCLES(4); RD_ZPX; CMP; } // 4 CMP ZPX
-OP(_0f5) { int tmp; H6280_CYCLES(4); RD_ZPX; SBC; } // 4 SBC ZPX
+OP(_034) { int tmp; H6280_CYCLES(4); RD_ZPX; HBIT; } // 4 BIT ZPX
+OP(_054) { H6280_CYCLES(3); CSL; } // 3 CSL
+OP(_074) { int tmp; H6280_CYCLES(4); STZ; WR_ZPX; } // 4 STZ ZPX
+OP(_094) { int tmp; H6280_CYCLES(4); STY; WR_ZPX; } // 4 STY ZPX
+OP(_0b4) { int tmp; H6280_CYCLES(4); RD_ZPX; LDY; } // 4 LDY ZPX
+OP(_0d4) { H6280_CYCLES(3); CSH; } // 3 CSH
+OP(_0f4) { H6280_CYCLES(2); SET; } // 2 SET
+
+OP(_005) { int tmp; H6280_CYCLES(4); RD_ZPG; ORA; } // 4 ORA ZPG
+OP(_025) { int tmp; H6280_CYCLES(4); RD_ZPG; AND; } // 4 AND ZPG
+OP(_045) { int tmp; H6280_CYCLES(4); RD_ZPG; EOR; } // 4 EOR ZPG
+OP(_065) { int tmp; H6280_CYCLES(4); RD_ZPG; ADC; } // 4 ADC ZPG
+OP(_085) { int tmp; H6280_CYCLES(4); STA; WR_ZPG; } // 4 STA ZPG
+OP(_0a5) { int tmp; H6280_CYCLES(4); RD_ZPG; LDA; } // 4 LDA ZPG
+OP(_0c5) { int tmp; H6280_CYCLES(4); RD_ZPG; CMP; } // 4 CMP ZPG
+OP(_0e5) { int tmp; H6280_CYCLES(4); RD_ZPG; SBC; } // 4 SBC ZPG
+
+OP(_015) { int tmp; H6280_CYCLES(4); RD_ZPX; ORA; } // 4 ORA ZPX
+OP(_035) { int tmp; H6280_CYCLES(4); RD_ZPX; AND; } // 4 AND ZPX
+OP(_055) { int tmp; H6280_CYCLES(4); RD_ZPX; EOR; } // 4 EOR ZPX
+OP(_075) { int tmp; H6280_CYCLES(4); RD_ZPX; ADC; } // 4 ADC ZPX
+OP(_095) { int tmp; H6280_CYCLES(4); STA; WR_ZPX; } // 4 STA ZPX
+OP(_0b5) { int tmp; H6280_CYCLES(4); RD_ZPX; LDA; } // 4 LDA ZPX
+OP(_0d5) { int tmp; H6280_CYCLES(4); RD_ZPX; CMP; } // 4 CMP ZPX
+OP(_0f5) { int tmp; H6280_CYCLES(4); RD_ZPX; SBC; } // 4 SBC ZPX
OP(_006) { int tmp; H6280_CYCLES(6); RD_ZPG; ASL; WB_EAZ; } // 6 ASL ZPG
OP(_026) { int tmp; H6280_CYCLES(6); RD_ZPG; ROL; WB_EAZ; } // 6 ROL ZPG
OP(_046) { int tmp; H6280_CYCLES(6); RD_ZPG; LSR; WB_EAZ; } // 6 LSR ZPG
OP(_066) { int tmp; H6280_CYCLES(6); RD_ZPG; ROR; WB_EAZ; } // 6 ROR ZPG
-OP(_086) { int tmp; H6280_CYCLES(4); STX; WR_ZPG; } // 4 STX ZPG
-OP(_0a6) { int tmp; H6280_CYCLES(4); RD_ZPG; LDX; } // 4 LDX ZPG
+OP(_086) { int tmp; H6280_CYCLES(4); STX; WR_ZPG; } // 4 STX ZPG
+OP(_0a6) { int tmp; H6280_CYCLES(4); RD_ZPG; LDX; } // 4 LDX ZPG
OP(_0c6) { int tmp; H6280_CYCLES(6); RD_ZPG; DEC; WB_EAZ; } // 6 DEC ZPG
OP(_0e6) { int tmp; H6280_CYCLES(6); RD_ZPG; INC; WB_EAZ; } // 6 INC ZPG
@@ -141,8 +141,8 @@ OP(_016) { int tmp; H6280_CYCLES(6); RD_ZPX; ASL; WB_EAZ; } // 6 ASL ZPX
OP(_036) { int tmp; H6280_CYCLES(6); RD_ZPX; ROL; WB_EAZ; } // 6 ROL ZPX
OP(_056) { int tmp; H6280_CYCLES(6); RD_ZPX; LSR; WB_EAZ; } // 6 LSR ZPX
OP(_076) { int tmp; H6280_CYCLES(6); RD_ZPX; ROR; WB_EAZ; } // 6 ROR ZPX
-OP(_096) { int tmp; H6280_CYCLES(4); STX; WR_ZPY; } // 4 STX ZPY
-OP(_0b6) { int tmp; H6280_CYCLES(4); RD_ZPY; LDX; } // 4 LDX ZPY
+OP(_096) { int tmp; H6280_CYCLES(4); STX; WR_ZPY; } // 4 STX ZPY
+OP(_0b6) { int tmp; H6280_CYCLES(4); RD_ZPY; LDX; } // 4 LDX ZPY
OP(_0d6) { int tmp; H6280_CYCLES(6); RD_ZPX; DEC; WB_EAZ; } // 6 DEC ZPX
OP(_0f6) { int tmp; H6280_CYCLES(6); RD_ZPX; INC; WB_EAZ; } // 6 INC ZPX
@@ -164,120 +164,120 @@ OP(_0b7) { int tmp; H6280_CYCLES(7); RD_ZPG; SMB(3);WB_EAZ;} // 7 SMB3 ZPG
OP(_0d7) { int tmp; H6280_CYCLES(7); RD_ZPG; SMB(5);WB_EAZ;} // 7 SMB5 ZPG
OP(_0f7) { int tmp; H6280_CYCLES(7); RD_ZPG; SMB(7);WB_EAZ;} // 7 SMB7 ZPG
-OP(_008) { H6280_CYCLES(3); PHP; } // 3 PHP
-OP(_028) { H6280_CYCLES(4); PLP; } // 4 PLP
-OP(_048) { H6280_CYCLES(3); PHA; } // 3 PHA
-OP(_068) { H6280_CYCLES(4); PLA; } // 4 PLA
-OP(_088) { H6280_CYCLES(2); DEY; } // 2 DEY
-OP(_0a8) { H6280_CYCLES(2); TAY; } // 2 TAY
-OP(_0c8) { H6280_CYCLES(2); INY; } // 2 INY
-OP(_0e8) { H6280_CYCLES(2); INX; } // 2 INX
-
-OP(_018) { H6280_CYCLES(2); CLC; } // 2 CLC
-OP(_038) { H6280_CYCLES(2); SEC; } // 2 SEC
-OP(_058) { H6280_CYCLES(2); CLI; } // 2 CLI
-OP(_078) { H6280_CYCLES(2); SEI; } // 2 SEI
-OP(_098) { H6280_CYCLES(2); TYA; } // 2 TYA
-OP(_0b8) { H6280_CYCLES(2); CLV; } // 2 CLV
-OP(_0d8) { H6280_CYCLES(2); CLD; } // 2 CLD
-OP(_0f8) { H6280_CYCLES(2); SED; } // 2 SED
-
-OP(_009) { int tmp; H6280_CYCLES(2); RD_IMM; ORA; } // 2 ORA IMM
-OP(_029) { int tmp; H6280_CYCLES(2); RD_IMM; AND; } // 2 AND IMM
-OP(_049) { int tmp; H6280_CYCLES(2); RD_IMM; EOR; } // 2 EOR IMM
-OP(_069) { int tmp; H6280_CYCLES(2); RD_IMM; ADC; } // 2 ADC IMM
-OP(_089) { int tmp; H6280_CYCLES(2); RD_IMM; HBIT; } // 2 BIT IMM
-OP(_0a9) { int tmp; H6280_CYCLES(2); RD_IMM; LDA; } // 2 LDA IMM
-OP(_0c9) { int tmp; H6280_CYCLES(2); RD_IMM; CMP; } // 2 CMP IMM
-OP(_0e9) { int tmp; H6280_CYCLES(2); RD_IMM; SBC; } // 2 SBC IMM
-
-OP(_019) { int tmp; H6280_CYCLES(5); RD_ABY; ORA; } // 5 ORA ABY
-OP(_039) { int tmp; H6280_CYCLES(5); RD_ABY; AND; } // 5 AND ABY
-OP(_059) { int tmp; H6280_CYCLES(5); RD_ABY; EOR; } // 5 EOR ABY
-OP(_079) { int tmp; H6280_CYCLES(5); RD_ABY; ADC; } // 5 ADC ABY
-OP(_099) { int tmp; H6280_CYCLES(5); STA; WR_ABY; } // 5 STA ABY
-OP(_0b9) { int tmp; H6280_CYCLES(5); RD_ABY; LDA; } // 5 LDA ABY
-OP(_0d9) { int tmp; H6280_CYCLES(5); RD_ABY; CMP; } // 5 CMP ABY
-OP(_0f9) { int tmp; H6280_CYCLES(5); RD_ABY; SBC; } // 5 SBC ABY
+OP(_008) { H6280_CYCLES(3); PHP; } // 3 PHP
+OP(_028) { H6280_CYCLES(4); PLP; } // 4 PLP
+OP(_048) { H6280_CYCLES(3); PHA; } // 3 PHA
+OP(_068) { H6280_CYCLES(4); PLA; } // 4 PLA
+OP(_088) { H6280_CYCLES(2); DEY; } // 2 DEY
+OP(_0a8) { H6280_CYCLES(2); TAY; } // 2 TAY
+OP(_0c8) { H6280_CYCLES(2); INY; } // 2 INY
+OP(_0e8) { H6280_CYCLES(2); INX; } // 2 INX
+
+OP(_018) { H6280_CYCLES(2); CLC; } // 2 CLC
+OP(_038) { H6280_CYCLES(2); SEC; } // 2 SEC
+OP(_058) { H6280_CYCLES(2); CLI; } // 2 CLI
+OP(_078) { H6280_CYCLES(2); SEI; } // 2 SEI
+OP(_098) { H6280_CYCLES(2); TYA; } // 2 TYA
+OP(_0b8) { H6280_CYCLES(2); CLV; } // 2 CLV
+OP(_0d8) { H6280_CYCLES(2); CLD; } // 2 CLD
+OP(_0f8) { H6280_CYCLES(2); SED; } // 2 SED
+
+OP(_009) { int tmp; H6280_CYCLES(2); RD_IMM; ORA; } // 2 ORA IMM
+OP(_029) { int tmp; H6280_CYCLES(2); RD_IMM; AND; } // 2 AND IMM
+OP(_049) { int tmp; H6280_CYCLES(2); RD_IMM; EOR; } // 2 EOR IMM
+OP(_069) { int tmp; H6280_CYCLES(2); RD_IMM; ADC; } // 2 ADC IMM
+OP(_089) { int tmp; H6280_CYCLES(2); RD_IMM; HBIT; } // 2 BIT IMM
+OP(_0a9) { int tmp; H6280_CYCLES(2); RD_IMM; LDA; } // 2 LDA IMM
+OP(_0c9) { int tmp; H6280_CYCLES(2); RD_IMM; CMP; } // 2 CMP IMM
+OP(_0e9) { int tmp; H6280_CYCLES(2); RD_IMM; SBC; } // 2 SBC IMM
+
+OP(_019) { int tmp; H6280_CYCLES(5); RD_ABY; ORA; } // 5 ORA ABY
+OP(_039) { int tmp; H6280_CYCLES(5); RD_ABY; AND; } // 5 AND ABY
+OP(_059) { int tmp; H6280_CYCLES(5); RD_ABY; EOR; } // 5 EOR ABY
+OP(_079) { int tmp; H6280_CYCLES(5); RD_ABY; ADC; } // 5 ADC ABY
+OP(_099) { int tmp; H6280_CYCLES(5); STA; WR_ABY; } // 5 STA ABY
+OP(_0b9) { int tmp; H6280_CYCLES(5); RD_ABY; LDA; } // 5 LDA ABY
+OP(_0d9) { int tmp; H6280_CYCLES(5); RD_ABY; CMP; } // 5 CMP ABY
+OP(_0f9) { int tmp; H6280_CYCLES(5); RD_ABY; SBC; } // 5 SBC ABY
OP(_00a) { int tmp; H6280_CYCLES(2); RD_ACC; ASL; WB_ACC; } // 2 ASL A
OP(_02a) { int tmp; H6280_CYCLES(2); RD_ACC; ROL; WB_ACC; } // 2 ROL A
OP(_04a) { int tmp; H6280_CYCLES(2); RD_ACC; LSR; WB_ACC; } // 2 LSR A
OP(_06a) { int tmp; H6280_CYCLES(2); RD_ACC; ROR; WB_ACC; } // 2 ROR A
-OP(_08a) { H6280_CYCLES(2); TXA; } // 2 TXA
-OP(_0aa) { H6280_CYCLES(2); TAX; } // 2 TAX
-OP(_0ca) { H6280_CYCLES(2); DEX; } // 2 DEX
-OP(_0ea) { H6280_CYCLES(2); NOP; } // 2 NOP
-
-OP(_01a) { H6280_CYCLES(2); INA; } // 2 INC A
-OP(_03a) { H6280_CYCLES(2); DEA; } // 2 DEC A
-OP(_05a) { H6280_CYCLES(3); PHY; } // 3 PHY
-OP(_07a) { H6280_CYCLES(4); PLY; } // 4 PLY
-OP(_09a) { H6280_CYCLES(2); TXS; } // 2 TXS
-OP(_0ba) { H6280_CYCLES(2); TSX; } // 2 TSX
-OP(_0da) { H6280_CYCLES(3); PHX; } // 3 PHX
-OP(_0fa) { H6280_CYCLES(4); PLX; } // 4 PLX
-
-OP(_00b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_02b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_04b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_06b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_08b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_0ab) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_0cb) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_0eb) { H6280_CYCLES(2); NOP; } // 2 NOP
-
-OP(_01b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_03b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_05b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_07b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_09b) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_0bb) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_0db) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_0fb) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_08a) { H6280_CYCLES(2); TXA; } // 2 TXA
+OP(_0aa) { H6280_CYCLES(2); TAX; } // 2 TAX
+OP(_0ca) { H6280_CYCLES(2); DEX; } // 2 DEX
+OP(_0ea) { H6280_CYCLES(2); NOP; } // 2 NOP
+
+OP(_01a) { H6280_CYCLES(2); INA; } // 2 INC A
+OP(_03a) { H6280_CYCLES(2); DEA; } // 2 DEC A
+OP(_05a) { H6280_CYCLES(3); PHY; } // 3 PHY
+OP(_07a) { H6280_CYCLES(4); PLY; } // 4 PLY
+OP(_09a) { H6280_CYCLES(2); TXS; } // 2 TXS
+OP(_0ba) { H6280_CYCLES(2); TSX; } // 2 TSX
+OP(_0da) { H6280_CYCLES(3); PHX; } // 3 PHX
+OP(_0fa) { H6280_CYCLES(4); PLX; } // 4 PLX
+
+OP(_00b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_02b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_04b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_06b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_08b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_0ab) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_0cb) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_0eb) { H6280_CYCLES(2); NOP; } // 2 NOP
+
+OP(_01b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_03b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_05b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_07b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_09b) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_0bb) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_0db) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_0fb) { H6280_CYCLES(2); NOP; } // 2 NOP
OP(_00c) { int tmp; H6280_CYCLES(7); RD_ABS; TSB; WB_EA; } // 7 TSB ABS
-OP(_02c) { int tmp; H6280_CYCLES(5); RD_ABS; HBIT; } // 5 BIT ABS
-OP(_04c) { H6280_CYCLES(4); EA_ABS; JMP; } // 4 JMP ABS
-OP(_06c) { int tmp; H6280_CYCLES(7); EA_IND; JMP; } // 7 JMP IND
-OP(_08c) { int tmp; H6280_CYCLES(5); STY; WR_ABS; } // 5 STY ABS
-OP(_0ac) { int tmp; H6280_CYCLES(5); RD_ABS; LDY; } // 5 LDY ABS
-OP(_0cc) { int tmp; H6280_CYCLES(5); RD_ABS; CPY; } // 5 CPY ABS
-OP(_0ec) { int tmp; H6280_CYCLES(5); RD_ABS; CPX; } // 5 CPX ABS
+OP(_02c) { int tmp; H6280_CYCLES(5); RD_ABS; HBIT; } // 5 BIT ABS
+OP(_04c) { H6280_CYCLES(4); EA_ABS; JMP; } // 4 JMP ABS
+OP(_06c) { int tmp; H6280_CYCLES(7); EA_IND; JMP; } // 7 JMP IND
+OP(_08c) { int tmp; H6280_CYCLES(5); STY; WR_ABS; } // 5 STY ABS
+OP(_0ac) { int tmp; H6280_CYCLES(5); RD_ABS; LDY; } // 5 LDY ABS
+OP(_0cc) { int tmp; H6280_CYCLES(5); RD_ABS; CPY; } // 5 CPY ABS
+OP(_0ec) { int tmp; H6280_CYCLES(5); RD_ABS; CPX; } // 5 CPX ABS
OP(_01c) { int tmp; H6280_CYCLES(7); RD_ABS; TRB; WB_EA; } // 7 TRB ABS
-OP(_03c) { int tmp; H6280_CYCLES(5); RD_ABX; HBIT; } // 5 BIT ABX
-OP(_05c) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_07c) { int tmp; H6280_CYCLES(7); EA_IAX; JMP; } // 7 JMP IAX
-OP(_09c) { int tmp; H6280_CYCLES(5); STZ; WR_ABS; } // 5 STZ ABS
-OP(_0bc) { int tmp; H6280_CYCLES(5); RD_ABX; LDY; } // 5 LDY ABX
-OP(_0dc) { H6280_CYCLES(2); NOP; } // 2 NOP
-OP(_0fc) { H6280_CYCLES(2); NOP; } // 2 NOP
-
-OP(_00d) { int tmp; H6280_CYCLES(5); RD_ABS; ORA; } // 5 ORA ABS
-OP(_02d) { int tmp; H6280_CYCLES(5); RD_ABS; AND; } // 5 AND ABS
-OP(_04d) { int tmp; H6280_CYCLES(5); RD_ABS; EOR; } // 5 EOR ABS
-OP(_06d) { int tmp; H6280_CYCLES(5); RD_ABS; ADC; } // 5 ADC ABS
-OP(_08d) { int tmp; H6280_CYCLES(5); STA; WR_ABS; } // 5 STA ABS
-OP(_0ad) { int tmp; H6280_CYCLES(5); RD_ABS; LDA; } // 5 LDA ABS
-OP(_0cd) { int tmp; H6280_CYCLES(5); RD_ABS; CMP; } // 5 CMP ABS
-OP(_0ed) { int tmp; H6280_CYCLES(5); RD_ABS; SBC; } // 5 SBC ABS
-
-OP(_01d) { int tmp; H6280_CYCLES(5); RD_ABX; ORA; } // 5 ORA ABX
-OP(_03d) { int tmp; H6280_CYCLES(5); RD_ABX; AND; } // 5 AND ABX
-OP(_05d) { int tmp; H6280_CYCLES(5); RD_ABX; EOR; } // 5 EOR ABX
-OP(_07d) { int tmp; H6280_CYCLES(5); RD_ABX; ADC; } // 5 ADC ABX
-OP(_09d) { int tmp; H6280_CYCLES(5); STA; WR_ABX; } // 5 STA ABX
-OP(_0bd) { int tmp; H6280_CYCLES(5); RD_ABX; LDA; } // 5 LDA ABX
-OP(_0dd) { int tmp; H6280_CYCLES(5); RD_ABX; CMP; } // 5 CMP ABX
-OP(_0fd) { int tmp; H6280_CYCLES(5); RD_ABX; SBC; } // 5 SBC ABX
+OP(_03c) { int tmp; H6280_CYCLES(5); RD_ABX; HBIT; } // 5 BIT ABX
+OP(_05c) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_07c) { int tmp; H6280_CYCLES(7); EA_IAX; JMP; } // 7 JMP IAX
+OP(_09c) { int tmp; H6280_CYCLES(5); STZ; WR_ABS; } // 5 STZ ABS
+OP(_0bc) { int tmp; H6280_CYCLES(5); RD_ABX; LDY; } // 5 LDY ABX
+OP(_0dc) { H6280_CYCLES(2); NOP; } // 2 NOP
+OP(_0fc) { H6280_CYCLES(2); NOP; } // 2 NOP
+
+OP(_00d) { int tmp; H6280_CYCLES(5); RD_ABS; ORA; } // 5 ORA ABS
+OP(_02d) { int tmp; H6280_CYCLES(5); RD_ABS; AND; } // 5 AND ABS
+OP(_04d) { int tmp; H6280_CYCLES(5); RD_ABS; EOR; } // 5 EOR ABS
+OP(_06d) { int tmp; H6280_CYCLES(5); RD_ABS; ADC; } // 5 ADC ABS
+OP(_08d) { int tmp; H6280_CYCLES(5); STA; WR_ABS; } // 5 STA ABS
+OP(_0ad) { int tmp; H6280_CYCLES(5); RD_ABS; LDA; } // 5 LDA ABS
+OP(_0cd) { int tmp; H6280_CYCLES(5); RD_ABS; CMP; } // 5 CMP ABS
+OP(_0ed) { int tmp; H6280_CYCLES(5); RD_ABS; SBC; } // 5 SBC ABS
+
+OP(_01d) { int tmp; H6280_CYCLES(5); RD_ABX; ORA; } // 5 ORA ABX
+OP(_03d) { int tmp; H6280_CYCLES(5); RD_ABX; AND; } // 5 AND ABX
+OP(_05d) { int tmp; H6280_CYCLES(5); RD_ABX; EOR; } // 5 EOR ABX
+OP(_07d) { int tmp; H6280_CYCLES(5); RD_ABX; ADC; } // 5 ADC ABX
+OP(_09d) { int tmp; H6280_CYCLES(5); STA; WR_ABX; } // 5 STA ABX
+OP(_0bd) { int tmp; H6280_CYCLES(5); RD_ABX; LDA; } // 5 LDA ABX
+OP(_0dd) { int tmp; H6280_CYCLES(5); RD_ABX; CMP; } // 5 CMP ABX
+OP(_0fd) { int tmp; H6280_CYCLES(5); RD_ABX; SBC; } // 5 SBC ABX
OP(_00e) { int tmp; H6280_CYCLES(7); RD_ABS; ASL; WB_EA; } // 7 ASL ABS
OP(_02e) { int tmp; H6280_CYCLES(7); RD_ABS; ROL; WB_EA; } // 7 ROL ABS
OP(_04e) { int tmp; H6280_CYCLES(7); RD_ABS; LSR; WB_EA; } // 7 LSR ABS
OP(_06e) { int tmp; H6280_CYCLES(7); RD_ABS; ROR; WB_EA; } // 7 ROR ABS
-OP(_08e) { int tmp; H6280_CYCLES(5); STX; WR_ABS; } // 5 STX ABS
-OP(_0ae) { int tmp; H6280_CYCLES(5); RD_ABS; LDX; } // 5 LDX ABS
+OP(_08e) { int tmp; H6280_CYCLES(5); STX; WR_ABS; } // 5 STX ABS
+OP(_0ae) { int tmp; H6280_CYCLES(5); RD_ABS; LDX; } // 5 LDX ABS
OP(_0ce) { int tmp; H6280_CYCLES(7); RD_ABS; DEC; WB_EA; } // 7 DEC ABS
OP(_0ee) { int tmp; H6280_CYCLES(7); RD_ABS; INC; WB_EA; } // 7 INC ABS
@@ -285,25 +285,25 @@ OP(_01e) { int tmp; H6280_CYCLES(7); RD_ABX; ASL; WB_EA; } // 7 ASL ABX
OP(_03e) { int tmp; H6280_CYCLES(7); RD_ABX; ROL; WB_EA; } // 7 ROL ABX
OP(_05e) { int tmp; H6280_CYCLES(7); RD_ABX; LSR; WB_EA; } // 7 LSR ABX
OP(_07e) { int tmp; H6280_CYCLES(7); RD_ABX; ROR; WB_EA; } // 7 ROR ABX
-OP(_09e) { int tmp; H6280_CYCLES(5); STZ; WR_ABX; } // 5 STZ ABX
-OP(_0be) { int tmp; H6280_CYCLES(5); RD_ABY; LDX; } // 5 LDX ABY
+OP(_09e) { int tmp; H6280_CYCLES(5); STZ; WR_ABX; } // 5 STZ ABX
+OP(_0be) { int tmp; H6280_CYCLES(5); RD_ABY; LDX; } // 5 LDX ABY
OP(_0de) { int tmp; H6280_CYCLES(7); RD_ABX; DEC; WB_EA; } // 7 DEC ABX
OP(_0fe) { int tmp; H6280_CYCLES(7); RD_ABX; INC; WB_EA; } // 7 INC ABX
-OP(_00f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(0); } // 6/8 BBR0 ZPG,REL
-OP(_02f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(2); } // 6/8 BBR2 ZPG,REL
-OP(_04f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(4); } // 6/8 BBR4 ZPG,REL
-OP(_06f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(6); } // 6/8 BBR6 ZPG,REL
-OP(_08f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(0); } // 6/8 BBS0 ZPG,REL
-OP(_0af) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(2); } // 6/8 BBS2 ZPG,REL
-OP(_0cf) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(4); } // 6/8 BBS4 ZPG,REL
-OP(_0ef) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(6); } // 6/8 BBS6 ZPG,REL
-
-OP(_01f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(1); } // 6/8 BBR1 ZPG,REL
-OP(_03f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(3); } // 6/8 BBR3 ZPG,REL
-OP(_05f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(5); } // 6/8 BBR5 ZPG,REL
-OP(_07f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(7); } // 6/8 BBR7 ZPG,REL
-OP(_09f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(1); } // 6/8 BBS1 ZPG,REL
-OP(_0bf) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(3); } // 6/8 BBS3 ZPG,REL
-OP(_0df) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(5); } // 6/8 BBS5 ZPG,REL
-OP(_0ff) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(7); } // 6/8 BBS7 ZPG,REL
+OP(_00f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(0); } // 6/8 BBR0 ZPG,REL
+OP(_02f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(2); } // 6/8 BBR2 ZPG,REL
+OP(_04f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(4); } // 6/8 BBR4 ZPG,REL
+OP(_06f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(6); } // 6/8 BBR6 ZPG,REL
+OP(_08f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(0); } // 6/8 BBS0 ZPG,REL
+OP(_0af) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(2); } // 6/8 BBS2 ZPG,REL
+OP(_0cf) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(4); } // 6/8 BBS4 ZPG,REL
+OP(_0ef) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(6); } // 6/8 BBS6 ZPG,REL
+
+OP(_01f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(1); } // 6/8 BBR1 ZPG,REL
+OP(_03f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(3); } // 6/8 BBR3 ZPG,REL
+OP(_05f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(5); } // 6/8 BBR5 ZPG,REL
+OP(_07f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBR(7); } // 6/8 BBR7 ZPG,REL
+OP(_09f) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(1); } // 6/8 BBS1 ZPG,REL
+OP(_0bf) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(3); } // 6/8 BBS3 ZPG,REL
+OP(_0df) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(5); } // 6/8 BBS5 ZPG,REL
+OP(_0ff) { int tmp; H6280_CYCLES(4); RD_ZPG; BBS(7); } // 6/8 BBS7 ZPG,REL
diff --git a/src/emu/cpu/h83002/h8.h b/src/emu/cpu/h83002/h8.h
index 0cada2d9f0e..12c68961c83 100644
--- a/src/emu/cpu/h83002/h8.h
+++ b/src/emu/cpu/h83002/h8.h
@@ -33,7 +33,7 @@ enum
H8_PC,
H8_CCR,
- H8_EXR
+ H8_EXR
};
// external input lines
@@ -45,14 +45,14 @@ enum
H8_IRQ3,
H8_IRQ4,
H8_IRQ5,
- H8_IRQ6, // IRQs 6+ only available on 8-bit H8/3xx or 16-bit H8S/2394
+ H8_IRQ6, // IRQs 6+ only available on 8-bit H8/3xx or 16-bit H8S/2394
H8_IRQ7,
H8_NMI,
- H8_METRO_TIMER_HACK, // as described. this needs to be fixed.
+ H8_METRO_TIMER_HACK, // as described. this needs to be fixed.
- H8_SCI_0_RX, // incoming character on SCI 0
- H8_SCI_1_RX, // incoming character on SCI 1
+ H8_SCI_0_RX, // incoming character on SCI 0
+ H8_SCI_1_RX, // incoming character on SCI 1
};
// I/O ports
@@ -60,23 +60,23 @@ enum
{
// digital I/O ports
// ports 4-B are valid on 16-bit H8/3xx, ports 1-9 on 8-bit H8/3xx
- // H8S/2394 has 12 ports named 1-6 and A-G
- H8_PORT_1 = 0, // 0
- H8_PORT_2, // 1
- H8_PORT_3, // 2
- H8_PORT_4, // 3
- H8_PORT_5, // 4
- H8_PORT_6, // 5
- H8_PORT_7, // 6
- H8_PORT_8, // 7
- H8_PORT_9, // 8
- H8_PORT_A, // 9
- H8_PORT_B, // A
- H8_PORT_C, // B
- H8_PORT_D, // C
- H8_PORT_E, // D
- H8_PORT_F, // E
- H8_PORT_G, // F
+ // H8S/2394 has 12 ports named 1-6 and A-G
+ H8_PORT_1 = 0, // 0
+ H8_PORT_2, // 1
+ H8_PORT_3, // 2
+ H8_PORT_4, // 3
+ H8_PORT_5, // 4
+ H8_PORT_6, // 5
+ H8_PORT_7, // 6
+ H8_PORT_8, // 7
+ H8_PORT_9, // 8
+ H8_PORT_A, // 9
+ H8_PORT_B, // A
+ H8_PORT_C, // B
+ H8_PORT_D, // C
+ H8_PORT_E, // D
+ H8_PORT_F, // E
+ H8_PORT_G, // F
// analog inputs
H8_ADC_0_H = 0x20,
@@ -99,7 +99,7 @@ enum
// serial ports
H8_SERIAL_0 = 0x30,
H8_SERIAL_1,
- H8_SERIAL_2
+ H8_SERIAL_2
};
////////////////////////////
@@ -227,87 +227,87 @@ enum
#define H8S_IO_TSTR H8S_IO(0xFFC0)
#define H8S_IO_TSYR H8S_IO(0xFFC1)
// TPU0
-#define H8S_IO_TTCR0 H8S_IO(0xFFD0)
-#define H8S_IO_TMDR0 H8S_IO(0xFFD1)
-#define H8S_IO_TIOR0_H H8S_IO(0xFFD2)
-#define H8S_IO_TIOR0_L H8S_IO(0xFFD3)
-#define H8S_IO_TIER0 H8S_IO(0xFFD4)
-#define H8S_IO_TSR0 H8S_IO(0xFFD5)
-#define H8S_IO_TCNT0_H H8S_IO(0xFFD6)
-#define H8S_IO_TCNT0_L H8S_IO(0xFFD7)
-#define H8S_IO_TGR0A_H H8S_IO(0xFFD8)
-#define H8S_IO_TGR0A_L H8S_IO(0xFFD9)
-#define H8S_IO_TGR0B_H H8S_IO(0xFFDA)
-#define H8S_IO_TGR0B_L H8S_IO(0xFFDB)
-#define H8S_IO_TGR0C_H H8S_IO(0xFFDC)
-#define H8S_IO_TGR0C_L H8S_IO(0xFFDD)
-#define H8S_IO_TGR0D_H H8S_IO(0xFFDE)
-#define H8S_IO_TGR0D_L H8S_IO(0xFFDF)
+#define H8S_IO_TTCR0 H8S_IO(0xFFD0)
+#define H8S_IO_TMDR0 H8S_IO(0xFFD1)
+#define H8S_IO_TIOR0_H H8S_IO(0xFFD2)
+#define H8S_IO_TIOR0_L H8S_IO(0xFFD3)
+#define H8S_IO_TIER0 H8S_IO(0xFFD4)
+#define H8S_IO_TSR0 H8S_IO(0xFFD5)
+#define H8S_IO_TCNT0_H H8S_IO(0xFFD6)
+#define H8S_IO_TCNT0_L H8S_IO(0xFFD7)
+#define H8S_IO_TGR0A_H H8S_IO(0xFFD8)
+#define H8S_IO_TGR0A_L H8S_IO(0xFFD9)
+#define H8S_IO_TGR0B_H H8S_IO(0xFFDA)
+#define H8S_IO_TGR0B_L H8S_IO(0xFFDB)
+#define H8S_IO_TGR0C_H H8S_IO(0xFFDC)
+#define H8S_IO_TGR0C_L H8S_IO(0xFFDD)
+#define H8S_IO_TGR0D_H H8S_IO(0xFFDE)
+#define H8S_IO_TGR0D_L H8S_IO(0xFFDF)
// TPU1
-#define H8S_IO_TTCR1 H8S_IO(0xFFE0)
-#define H8S_IO_TMDR1 H8S_IO(0xFFE1)
-#define H8S_IO_TIOR1 H8S_IO(0xFFE2)
-#define H8S_IO_TIER1 H8S_IO(0xFFE4)
-#define H8S_IO_TSR1 H8S_IO(0xFFE5)
-#define H8S_IO_TCNT1_H H8S_IO(0xFFE6)
-#define H8S_IO_TCNT1_L H8S_IO(0xFFE7)
-#define H8S_IO_TGR1A_H H8S_IO(0xFFE8)
-#define H8S_IO_TGR1A_L H8S_IO(0xFFE9)
-#define H8S_IO_TGR1B_H H8S_IO(0xFFEA)
-#define H8S_IO_TGR1B_L H8S_IO(0xFFEB)
+#define H8S_IO_TTCR1 H8S_IO(0xFFE0)
+#define H8S_IO_TMDR1 H8S_IO(0xFFE1)
+#define H8S_IO_TIOR1 H8S_IO(0xFFE2)
+#define H8S_IO_TIER1 H8S_IO(0xFFE4)
+#define H8S_IO_TSR1 H8S_IO(0xFFE5)
+#define H8S_IO_TCNT1_H H8S_IO(0xFFE6)
+#define H8S_IO_TCNT1_L H8S_IO(0xFFE7)
+#define H8S_IO_TGR1A_H H8S_IO(0xFFE8)
+#define H8S_IO_TGR1A_L H8S_IO(0xFFE9)
+#define H8S_IO_TGR1B_H H8S_IO(0xFFEA)
+#define H8S_IO_TGR1B_L H8S_IO(0xFFEB)
// TPU2
-#define H8S_IO_TTCR2 H8S_IO(0xFFF0)
-#define H8S_IO_TMDR2 H8S_IO(0xFFF1)
-#define H8S_IO_TIOR2 H8S_IO(0xFFF2)
-#define H8S_IO_TIER2 H8S_IO(0xFFF4)
-#define H8S_IO_TSR2 H8S_IO(0xFFF5)
-#define H8S_IO_TCNT2_H H8S_IO(0xFFF6)
-#define H8S_IO_TCNT2_L H8S_IO(0xFFF7)
-#define H8S_IO_TGR2A_H H8S_IO(0xFFF8)
-#define H8S_IO_TGR2A_L H8S_IO(0xFFF9)
-#define H8S_IO_TGR2B_H H8S_IO(0xFFFA)
-#define H8S_IO_TGR2B_L H8S_IO(0xFFFB)
+#define H8S_IO_TTCR2 H8S_IO(0xFFF0)
+#define H8S_IO_TMDR2 H8S_IO(0xFFF1)
+#define H8S_IO_TIOR2 H8S_IO(0xFFF2)
+#define H8S_IO_TIER2 H8S_IO(0xFFF4)
+#define H8S_IO_TSR2 H8S_IO(0xFFF5)
+#define H8S_IO_TCNT2_H H8S_IO(0xFFF6)
+#define H8S_IO_TCNT2_L H8S_IO(0xFFF7)
+#define H8S_IO_TGR2A_H H8S_IO(0xFFF8)
+#define H8S_IO_TGR2A_L H8S_IO(0xFFF9)
+#define H8S_IO_TGR2B_H H8S_IO(0xFFFA)
+#define H8S_IO_TGR2B_L H8S_IO(0xFFFB)
// TPU3
-#define H8S_IO_TTCR3 H8S_IO(0xFE80)
-#define H8S_IO_TMDR3 H8S_IO(0xFE81)
-#define H8S_IO_TIOR3_H H8S_IO(0xFE82)
-#define H8S_IO_TIOR3_L H8S_IO(0xFE83)
-#define H8S_IO_TIER3 H8S_IO(0xFE84)
-#define H8S_IO_TSR3 H8S_IO(0xFE85)
-#define H8S_IO_TCNT3_H H8S_IO(0xFE86)
-#define H8S_IO_TCNT3_L H8S_IO(0xFE87)
-#define H8S_IO_TGR3A_H H8S_IO(0xFE88)
-#define H8S_IO_TGR3A_L H8S_IO(0xFE89)
-#define H8S_IO_TGR3B_H H8S_IO(0xFE8A)
-#define H8S_IO_TGR3B_L H8S_IO(0xFE8B)
-#define H8S_IO_TGR3C_H H8S_IO(0xFE8C)
-#define H8S_IO_TGR3C_L H8S_IO(0xFE8D)
-#define H8S_IO_TGR3D_H H8S_IO(0xFE8E)
-#define H8S_IO_TGR3D_L H8S_IO(0xFE8F)
+#define H8S_IO_TTCR3 H8S_IO(0xFE80)
+#define H8S_IO_TMDR3 H8S_IO(0xFE81)
+#define H8S_IO_TIOR3_H H8S_IO(0xFE82)
+#define H8S_IO_TIOR3_L H8S_IO(0xFE83)
+#define H8S_IO_TIER3 H8S_IO(0xFE84)
+#define H8S_IO_TSR3 H8S_IO(0xFE85)
+#define H8S_IO_TCNT3_H H8S_IO(0xFE86)
+#define H8S_IO_TCNT3_L H8S_IO(0xFE87)
+#define H8S_IO_TGR3A_H H8S_IO(0xFE88)
+#define H8S_IO_TGR3A_L H8S_IO(0xFE89)
+#define H8S_IO_TGR3B_H H8S_IO(0xFE8A)
+#define H8S_IO_TGR3B_L H8S_IO(0xFE8B)
+#define H8S_IO_TGR3C_H H8S_IO(0xFE8C)
+#define H8S_IO_TGR3C_L H8S_IO(0xFE8D)
+#define H8S_IO_TGR3D_H H8S_IO(0xFE8E)
+#define H8S_IO_TGR3D_L H8S_IO(0xFE8F)
// TPU4
-#define H8S_IO_TTCR4 H8S_IO(0xFE90)
-#define H8S_IO_TMDR4 H8S_IO(0xFE91)
-#define H8S_IO_TIOR4 H8S_IO(0xFE92)
-#define H8S_IO_TIER4 H8S_IO(0xFE94)
-#define H8S_IO_TSR4 H8S_IO(0xFE95)
-#define H8S_IO_TCNT4_H H8S_IO(0xFE96)
-#define H8S_IO_TCNT4_L H8S_IO(0xFE97)
-#define H8S_IO_TGR4A_H H8S_IO(0xFE98)
-#define H8S_IO_TGR4A_L H8S_IO(0xFE99)
-#define H8S_IO_TGR4B_H H8S_IO(0xFE9A)
-#define H8S_IO_TGR4B_L H8S_IO(0xFE9B)
+#define H8S_IO_TTCR4 H8S_IO(0xFE90)
+#define H8S_IO_TMDR4 H8S_IO(0xFE91)
+#define H8S_IO_TIOR4 H8S_IO(0xFE92)
+#define H8S_IO_TIER4 H8S_IO(0xFE94)
+#define H8S_IO_TSR4 H8S_IO(0xFE95)
+#define H8S_IO_TCNT4_H H8S_IO(0xFE96)
+#define H8S_IO_TCNT4_L H8S_IO(0xFE97)
+#define H8S_IO_TGR4A_H H8S_IO(0xFE98)
+#define H8S_IO_TGR4A_L H8S_IO(0xFE99)
+#define H8S_IO_TGR4B_H H8S_IO(0xFE9A)
+#define H8S_IO_TGR4B_L H8S_IO(0xFE9B)
// TPU5
-#define H8S_IO_TTCR5 H8S_IO(0xFEA0)
-#define H8S_IO_TMDR5 H8S_IO(0xFEA1)
-#define H8S_IO_TIOR5 H8S_IO(0xFEA2)
-#define H8S_IO_TIER5 H8S_IO(0xFEA4)
-#define H8S_IO_TSR5 H8S_IO(0xFEA5)
-#define H8S_IO_TCNT5_H H8S_IO(0xFEA6)
-#define H8S_IO_TCNT5_L H8S_IO(0xFEA7)
-#define H8S_IO_TGR5A_H H8S_IO(0xFEA8)
-#define H8S_IO_TGR5A_L H8S_IO(0xFEA9)
-#define H8S_IO_TGR5B_H H8S_IO(0xFEAA)
-#define H8S_IO_TGR5B_L H8S_IO(0xFEAB)
+#define H8S_IO_TTCR5 H8S_IO(0xFEA0)
+#define H8S_IO_TMDR5 H8S_IO(0xFEA1)
+#define H8S_IO_TIOR5 H8S_IO(0xFEA2)
+#define H8S_IO_TIER5 H8S_IO(0xFEA4)
+#define H8S_IO_TSR5 H8S_IO(0xFEA5)
+#define H8S_IO_TCNT5_H H8S_IO(0xFEA6)
+#define H8S_IO_TCNT5_L H8S_IO(0xFEA7)
+#define H8S_IO_TGR5A_H H8S_IO(0xFEA8)
+#define H8S_IO_TGR5A_L H8S_IO(0xFEA9)
+#define H8S_IO_TGR5B_H H8S_IO(0xFEAA)
+#define H8S_IO_TGR5B_L H8S_IO(0xFEAB)
// DMA
#define H8S_IO_MAR1AH H8S_IO(0xFEF0)
#define H8S_IO_MAR1AL H8S_IO(0xFEF2)
@@ -423,19 +423,19 @@ enum
#define H8S_INT_TXI2 0x5A
#define H8S_INT_TEI2 0x5B
-#define H8S_INT_TGI3A 48
-#define H8S_INT_TGI3B 49
-#define H8S_INT_TGI3C 50
-#define H8S_INT_TGI3D 51
-#define H8S_INT_TCI3V 52
-#define H8S_INT_TGI4A 56
-#define H8S_INT_TGI4B 57
-#define H8S_INT_TCI4V 58
-#define H8S_INT_TCI4U 59
-#define H8S_INT_TGI5A 60
-#define H8S_INT_TGI5B 61
-#define H8S_INT_TCI5V 62
-#define H8S_INT_TCI5U 63
+#define H8S_INT_TGI3A 48
+#define H8S_INT_TGI3B 49
+#define H8S_INT_TGI3C 50
+#define H8S_INT_TGI3D 51
+#define H8S_INT_TCI3V 52
+#define H8S_INT_TGI4A 56
+#define H8S_INT_TGI4B 57
+#define H8S_INT_TCI4V 58
+#define H8S_INT_TCI4U 59
+#define H8S_INT_TGI5A 60
+#define H8S_INT_TGI5B 61
+#define H8S_INT_TCI5V 62
+#define H8S_INT_TCI5U 63
DECLARE_LEGACY_CPU_DEVICE(H83002, h8_3002);
DECLARE_LEGACY_CPU_DEVICE(H83007, h8_3007);
diff --git a/src/emu/cpu/h83002/h8_16.c b/src/emu/cpu/h83002/h8_16.c
index c19ea2b924c..19987c36a3d 100644
--- a/src/emu/cpu/h83002/h8_16.c
+++ b/src/emu/cpu/h83002/h8_16.c
@@ -21,7 +21,7 @@
CPU_DISASSEMBLE(h8_24);
CPU_DISASSEMBLE(h8_32);
-#define H8_SP (7)
+#define H8_SP (7)
#define h8_mem_read8(x) h8->program->read_byte(x)
#define h8_mem_read16(z, x) h8->program->read_word(x)
@@ -32,12 +32,12 @@ CPU_DISASSEMBLE(h8_32);
// timing macros
// note: we assume a system 12 - type setup where external access is 3+1 states
// timing will be off somewhat for other configurations.
-#define H8_IFETCH_TIMING(x) h8->cyccnt -= (x) * 4;
-#define H8_BRANCH_TIMING(x) h8->cyccnt -= (x) * 4;
-#define H8_STACK_TIMING(x) h8->cyccnt -= (x) * 4;
-#define H8_BYTE_TIMING(x, adr) if (address24 >= 0xffff10) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
-#define H8_WORD_TIMING(x, adr) if (address24 >= 0xffff10) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
-#define H8_IOP_TIMING(x) h8->cyccnt -= (x);
+#define H8_IFETCH_TIMING(x) h8->cyccnt -= (x) * 4;
+#define H8_BRANCH_TIMING(x) h8->cyccnt -= (x) * 4;
+#define H8_STACK_TIMING(x) h8->cyccnt -= (x) * 4;
+#define H8_BYTE_TIMING(x, adr) if (address24 >= 0xffff10) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
+#define H8_WORD_TIMING(x, adr) if (address24 >= 0xffff10) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
+#define H8_IOP_TIMING(x) h8->cyccnt -= (x);
INLINE UINT32 h8_mem_read32(h83xx_state *h8, offs_t address)
{
@@ -90,7 +90,7 @@ static UINT8 h8_get_ccr(h83xx_state *h8)
static UINT8 h8_get_exr(h83xx_state *h8)
{
- return h8->exr;
+ return h8->exr;
}
static char *h8_get_ccr_str(h83xx_state *h8)
@@ -265,8 +265,8 @@ static CPU_RESET(h8)
h8->pc = h8_mem_read32(h8, 0) & 0xffffff;
h8->incheckirqs = 0;
- h8->exr = 0;
- h8->has_exr = false;
+ h8->exr = 0;
+ h8->has_exr = false;
// disable timers
h8->h8TSTR = 0;
@@ -282,7 +282,7 @@ static CPU_RESET(h8s_2xxx)
CPU_RESET_CALL(h8);
- h8->exr = 7; // set the 3 interrupt bits, clear TRACE
+ h8->exr = 7; // set the 3 interrupt bits, clear TRACE
h8s_periph_reset(h8);
h8->has_h8speriphs = true;
@@ -295,12 +295,12 @@ static CPU_RESET(h8s_2394)
CPU_RESET_CALL(h8);
- h8->exr = 7; // set the 3 interrupt bits, clear TRACE
- h8->has_exr = true;
+ h8->exr = 7; // set the 3 interrupt bits, clear TRACE
+ h8->has_exr = true;
- // port 4 is fixed to input only
- h8->drs[3] = 0;
- h8->ddrs[3] = 0;
+ // port 4 is fixed to input only
+ h8->drs[3] = 0;
+ h8->ddrs[3] = 0;
h8s_periph_reset(h8);
h8->has_h8speriphs = true;
@@ -371,25 +371,25 @@ static void h8_check_irqs(h83xx_state *h8)
h8->incheckirqs = 1;
- if (h8->has_exr)
- {
- lv = (h8->exr & 7);
- }
- else
- {
- if (h8->h8iflag == 0)
- {
- lv = 0;
- }
- else
- {
- if ((h8->per_regs[0xF2]&0x08)/*SYSCR*/ == 0)
- {
- if (h8->h8uiflag == 0)
- lv = 1;
- }
- }
- }
+ if (h8->has_exr)
+ {
+ lv = (h8->exr & 7);
+ }
+ else
+ {
+ if (h8->h8iflag == 0)
+ {
+ lv = 0;
+ }
+ else
+ {
+ if ((h8->per_regs[0xF2]&0x08)/*SYSCR*/ == 0)
+ {
+ if (h8->h8uiflag == 0)
+ lv = 1;
+ }
+ }
+ }
// any interrupts wanted and can accept ?
if(((h8->irq_req[0] != 0) || (h8->irq_req[1]!= 0) || (h8->irq_req[2] != 0)) && (lv >= 0))
@@ -465,31 +465,31 @@ static CPU_SET_INFO( h8 )
h83xx_state *h8 = get_safe_token(device);
switch(state) {
- case CPUINFO_INT_PC: h8->pc = info->i; break;
- case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break;
- case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break;
- case CPUINFO_INT_REGISTER + H8_EXR: h8_set_exr(h8, info->i); break;
-
- case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E1: h8->regs[1] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E2: h8->regs[2] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E3: h8->regs[3] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E4: h8->regs[4] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E5: h8->regs[5] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E6: h8->regs[6] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E7: h8->regs[7] = info->i; break;
-
- case CPUINFO_INT_INPUT_STATE + H8_IRQ0: h8_3002_InterruptRequest(h8, 12, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ1: h8_3002_InterruptRequest(h8, 13, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ2: h8_3002_InterruptRequest(h8, 14, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ3: h8_3002_InterruptRequest(h8, 15, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ4: h8_3002_InterruptRequest(h8, 16, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ5: h8_3002_InterruptRequest(h8, 17, info->i); break;
-
- case CPUINFO_INT_INPUT_STATE + H8_METRO_TIMER_HACK: h8_3002_InterruptRequest(h8, 24, info->i); break;
-
- case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX: h8_3002_InterruptRequest(h8, 53, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX: h8_3002_InterruptRequest(h8, 57, info->i); break;
+ case CPUINFO_INT_PC: h8->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break;
+ case CPUINFO_INT_REGISTER + H8_EXR: h8_set_exr(h8, info->i); break;
+
+ case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E1: h8->regs[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E2: h8->regs[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E3: h8->regs[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E4: h8->regs[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E5: h8->regs[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E6: h8->regs[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E7: h8->regs[7] = info->i; break;
+
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ0: h8_3002_InterruptRequest(h8, 12, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ1: h8_3002_InterruptRequest(h8, 13, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ2: h8_3002_InterruptRequest(h8, 14, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ3: h8_3002_InterruptRequest(h8, 15, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ4: h8_3002_InterruptRequest(h8, 16, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ5: h8_3002_InterruptRequest(h8, 17, info->i); break;
+
+ case CPUINFO_INT_INPUT_STATE + H8_METRO_TIMER_HACK: h8_3002_InterruptRequest(h8, 24, info->i); break;
+
+ case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX: h8_3002_InterruptRequest(h8, 53, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX: h8_3002_InterruptRequest(h8, 57, info->i); break;
default:
fatalerror("h8_set_info unknown request %x\n", state);
@@ -502,31 +502,31 @@ static CPU_SET_INFO( h8s_2394 )
h83xx_state *h8 = get_safe_token(device);
switch(state) {
- case CPUINFO_INT_PC: h8->pc = info->i; break;
- case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break;
- case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break;
- case CPUINFO_INT_REGISTER + H8_EXR: h8_set_exr(h8, info->i); break;
-
- case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E1: h8->regs[1] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E2: h8->regs[2] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E3: h8->regs[3] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E4: h8->regs[4] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E5: h8->regs[5] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E6: h8->regs[6] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E7: h8->regs[7] = info->i; break;
-
- case CPUINFO_INT_INPUT_STATE + H8_IRQ0: h8_3002_InterruptRequest(h8, 16, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ1: h8_3002_InterruptRequest(h8, 17, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ2: h8_3002_InterruptRequest(h8, 18, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ3: h8_3002_InterruptRequest(h8, 19, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ4: h8_3002_InterruptRequest(h8, 20, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ5: h8_3002_InterruptRequest(h8, 21, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ6: h8_3002_InterruptRequest(h8, 22, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ7: h8_3002_InterruptRequest(h8, 23, info->i); break;
-
- case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX: h8_3002_InterruptRequest(h8, 81, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX: h8_3002_InterruptRequest(h8, 85, info->i); break;
+ case CPUINFO_INT_PC: h8->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break;
+ case CPUINFO_INT_REGISTER + H8_EXR: h8_set_exr(h8, info->i); break;
+
+ case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E1: h8->regs[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E2: h8->regs[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E3: h8->regs[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E4: h8->regs[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E5: h8->regs[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E6: h8->regs[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E7: h8->regs[7] = info->i; break;
+
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ0: h8_3002_InterruptRequest(h8, 16, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ1: h8_3002_InterruptRequest(h8, 17, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ2: h8_3002_InterruptRequest(h8, 18, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ3: h8_3002_InterruptRequest(h8, 19, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ4: h8_3002_InterruptRequest(h8, 20, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ5: h8_3002_InterruptRequest(h8, 21, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ6: h8_3002_InterruptRequest(h8, 22, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ7: h8_3002_InterruptRequest(h8, 23, info->i); break;
+
+ case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX: h8_3002_InterruptRequest(h8, 81, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX: h8_3002_InterruptRequest(h8, 85, info->i); break;
default:
fatalerror("h8_set_info unknown request %x\n", state);
@@ -881,74 +881,74 @@ CPU_GET_INFO( h8_3002 )
switch(state) {
// Interface functions and variables
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(h8); break;
- case CPUINFO_FCT_EXIT: info->exit = 0; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(h8); break;
- case CPUINFO_FCT_BURN: info->burn = 0; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8_32); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h8->cyccnt; break;
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(h83xx_state); break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(h8); break;
+ case CPUINFO_FCT_EXIT: info->exit = 0; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(h8); break;
+ case CPUINFO_FCT_BURN: info->burn = 0; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8_32); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h8->cyccnt; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(h83xx_state); break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
// Bus sizes
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
// Internal maps
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8_3002_internal_map); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map16 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map16 = NULL; break;
// CPU misc parameters
- case CPUINFO_STR_NAME: strcpy(info->s, "H8/3002"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_FLAGS: strcpy(info->s, h8_get_ccr_str(h8)); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8/3002"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_FLAGS: strcpy(info->s, h8_get_ccr_str(h8)); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
// CPU main state
- case CPUINFO_INT_PC: info->i = h8->pc; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = h8->ppc; break;
-
- case CPUINFO_INT_REGISTER + H8_PC: info->i = h8->pc; break;
- case CPUINFO_INT_REGISTER + H8_CCR: info->i = h8_get_ccr(h8); break;
- case CPUINFO_INT_REGISTER + H8_EXR: info->i = h8_get_exr(h8); break;
-
- case CPUINFO_INT_REGISTER + H8_E0: info->i = h8->regs[0]; break;
- case CPUINFO_INT_REGISTER + H8_E1: info->i = h8->regs[1]; break;
- case CPUINFO_INT_REGISTER + H8_E2: info->i = h8->regs[2]; break;
- case CPUINFO_INT_REGISTER + H8_E3: info->i = h8->regs[3]; break;
- case CPUINFO_INT_REGISTER + H8_E4: info->i = h8->regs[4]; break;
- case CPUINFO_INT_REGISTER + H8_E5: info->i = h8->regs[5]; break;
- case CPUINFO_INT_REGISTER + H8_E6: info->i = h8->regs[6]; break;
- case CPUINFO_INT_REGISTER + H8_E7: info->i = h8->regs[7]; break;
+ case CPUINFO_INT_PC: info->i = h8->pc; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = h8->ppc; break;
+
+ case CPUINFO_INT_REGISTER + H8_PC: info->i = h8->pc; break;
+ case CPUINFO_INT_REGISTER + H8_CCR: info->i = h8_get_ccr(h8); break;
+ case CPUINFO_INT_REGISTER + H8_EXR: info->i = h8_get_exr(h8); break;
+
+ case CPUINFO_INT_REGISTER + H8_E0: info->i = h8->regs[0]; break;
+ case CPUINFO_INT_REGISTER + H8_E1: info->i = h8->regs[1]; break;
+ case CPUINFO_INT_REGISTER + H8_E2: info->i = h8->regs[2]; break;
+ case CPUINFO_INT_REGISTER + H8_E3: info->i = h8->regs[3]; break;
+ case CPUINFO_INT_REGISTER + H8_E4: info->i = h8->regs[4]; break;
+ case CPUINFO_INT_REGISTER + H8_E5: info->i = h8->regs[5]; break;
+ case CPUINFO_INT_REGISTER + H8_E6: info->i = h8->regs[6]; break;
+ case CPUINFO_INT_REGISTER + H8_E7: info->i = h8->regs[7]; break;
// CPU debug stuff
- case CPUINFO_STR_REGISTER + H8_PC: sprintf(info->s, "PC :%08x", h8->pc); break;
- case CPUINFO_STR_REGISTER + H8_CCR: sprintf(info->s, "CCR :%08x", h8_get_ccr(h8)); break;
- case CPUINFO_STR_REGISTER + H8_EXR: sprintf(info->s, "EXR :%02x", h8_get_exr(h8)); break;
-
- case CPUINFO_STR_REGISTER + H8_E0: sprintf(info->s, "ER0 :%08x", h8->regs[0]); break;
- case CPUINFO_STR_REGISTER + H8_E1: sprintf(info->s, "ER1 :%08x", h8->regs[1]); break;
- case CPUINFO_STR_REGISTER + H8_E2: sprintf(info->s, "ER2 :%08x", h8->regs[2]); break;
- case CPUINFO_STR_REGISTER + H8_E3: sprintf(info->s, "ER3 :%08x", h8->regs[3]); break;
- case CPUINFO_STR_REGISTER + H8_E4: sprintf(info->s, "ER4 :%08x", h8->regs[4]); break;
- case CPUINFO_STR_REGISTER + H8_E5: sprintf(info->s, "ER5 :%08x", h8->regs[5]); break;
- case CPUINFO_STR_REGISTER + H8_E6: sprintf(info->s, "ER6 :%08x", h8->regs[6]); break;
- case CPUINFO_STR_REGISTER + H8_E7: sprintf(info->s, " SP :%08x", h8->regs[7]); break;
+ case CPUINFO_STR_REGISTER + H8_PC: sprintf(info->s, "PC :%08x", h8->pc); break;
+ case CPUINFO_STR_REGISTER + H8_CCR: sprintf(info->s, "CCR :%08x", h8_get_ccr(h8)); break;
+ case CPUINFO_STR_REGISTER + H8_EXR: sprintf(info->s, "EXR :%02x", h8_get_exr(h8)); break;
+
+ case CPUINFO_STR_REGISTER + H8_E0: sprintf(info->s, "ER0 :%08x", h8->regs[0]); break;
+ case CPUINFO_STR_REGISTER + H8_E1: sprintf(info->s, "ER1 :%08x", h8->regs[1]); break;
+ case CPUINFO_STR_REGISTER + H8_E2: sprintf(info->s, "ER2 :%08x", h8->regs[2]); break;
+ case CPUINFO_STR_REGISTER + H8_E3: sprintf(info->s, "ER3 :%08x", h8->regs[3]); break;
+ case CPUINFO_STR_REGISTER + H8_E4: sprintf(info->s, "ER4 :%08x", h8->regs[4]); break;
+ case CPUINFO_STR_REGISTER + H8_E5: sprintf(info->s, "ER5 :%08x", h8->regs[5]); break;
+ case CPUINFO_STR_REGISTER + H8_E6: sprintf(info->s, "ER6 :%08x", h8->regs[6]); break;
+ case CPUINFO_STR_REGISTER + H8_E7: sprintf(info->s, " SP :%08x", h8->regs[7]); break;
}
}
@@ -957,8 +957,8 @@ CPU_GET_INFO( h8_3044 )
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8_3044_internal_map); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8_24); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "H8/3044"); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8_24); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8/3044"); break;
default:
CPU_GET_INFO_CALL(h8_3002);
}
@@ -969,8 +969,8 @@ CPU_GET_INFO( h8_3007 )
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8_3007_internal_map); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8_3007); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "H8/3007"); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8_3007); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8/3007"); break;
default:
CPU_GET_INFO_CALL(h8_3002);
}
@@ -981,9 +981,9 @@ CPU_GET_INFO( h8s_2241 )
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8s_2241_internal_map); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
- case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2241"); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
+ case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2241"); break;
default:
CPU_GET_INFO_CALL(h8_3002);
}
@@ -994,9 +994,9 @@ CPU_GET_INFO( h8s_2246 )
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8s_2246_internal_map); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
- case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2246"); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
+ case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2246"); break;
default:
CPU_GET_INFO_CALL(h8_3002);
}
@@ -1007,9 +1007,9 @@ CPU_GET_INFO( h8s_2323 )
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8s_2323_internal_map); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
- case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2323"); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
+ case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2323"); break;
default:
CPU_GET_INFO_CALL(h8_3002);
}
@@ -1020,10 +1020,10 @@ CPU_GET_INFO( h8s_2394 )
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8s_2394_internal_map); break;
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8s_2394); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
- case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2394); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2394"); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8s_2394); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
+ case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2394); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2394"); break;
default:
CPU_GET_INFO_CALL(h8_3002);
}
@@ -1034,10 +1034,10 @@ CPU_GET_INFO( h8s_2655 )
switch (state)
{
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(h8s_2655_internal_map); break;
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8s_2394); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
- case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2655"); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8s_2394); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8s_2xxx); break;
+ case CPUINFO_FCT_RESET: info->reset= CPU_RESET_NAME(h8s_2xxx); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8S/2655"); break;
default:
CPU_GET_INFO_CALL(h8_3002);
}
@@ -1052,4 +1052,3 @@ DEFINE_LEGACY_CPU_DEVICE(H8S2246, h8s_2246);
DEFINE_LEGACY_CPU_DEVICE(H8S2323, h8s_2323);
DEFINE_LEGACY_CPU_DEVICE(H8S2394, h8s_2394);
DEFINE_LEGACY_CPU_DEVICE(H8S2655, h8s_2655);
-
diff --git a/src/emu/cpu/h83002/h8_8.c b/src/emu/cpu/h83002/h8_8.c
index dcfef2cca4d..7d6da1fd4a7 100644
--- a/src/emu/cpu/h83002/h8_8.c
+++ b/src/emu/cpu/h83002/h8_8.c
@@ -16,18 +16,18 @@
CPU_DISASSEMBLE(h8);
-#define H8_SP (7)
+#define H8_SP (7)
-#define h8_mem_read8(x) h8->program->read_byte(x)
-#define h8_mem_write8(x, y) h8->program->write_byte(x, y)
+#define h8_mem_read8(x) h8->program->read_byte(x)
+#define h8_mem_write8(x, y) h8->program->write_byte(x, y)
// timing macros
-#define H8_IFETCH_TIMING(x) h8->cyccnt -= (x) * 4;
-#define H8_BRANCH_TIMING(x) h8->cyccnt -= (x) * 4;
-#define H8_STACK_TIMING(x) h8->cyccnt -= (x) * 4;
-#define H8_BYTE_TIMING(x, adr) if (address24 >= 0xff90) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
-#define H8_WORD_TIMING(x, adr) if (address24 >= 0xff90) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
-#define H8_IOP_TIMING(x) h8->cyccnt -= (x);
+#define H8_IFETCH_TIMING(x) h8->cyccnt -= (x) * 4;
+#define H8_BRANCH_TIMING(x) h8->cyccnt -= (x) * 4;
+#define H8_STACK_TIMING(x) h8->cyccnt -= (x) * 4;
+#define H8_BYTE_TIMING(x, adr) if (address24 >= 0xff90) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
+#define H8_WORD_TIMING(x, adr) if (address24 >= 0xff90) h8->cyccnt -= (x) * 3; else h8->cyccnt -= (x) * 4;
+#define H8_IOP_TIMING(x) h8->cyccnt -= (x);
static TIMER_CALLBACK( h8_timer_0_cb );
static TIMER_CALLBACK( h8_timer_1_cb );
@@ -106,7 +106,7 @@ static UINT8 h8_get_ccr(h83xx_state *h8)
static UINT8 h8_get_exr(h83xx_state *h8)
{
- return h8->exr;
+ return h8->exr;
}
static char *h8_get_ccr_str(h83xx_state *h8)
@@ -295,8 +295,8 @@ static void h8_GenException(h83xx_state *h8, UINT8 vectornr)
h8->pc = h8_mem_read16(h8, vectornr * 2) & 0xffff;
// these timings are still approximations but much better than before
- H8_IFETCH_TIMING(8); // 24 cycles
- H8_STACK_TIMING(3); // 12 cycles
+ H8_IFETCH_TIMING(8); // 24 cycles
+ H8_STACK_TIMING(3); // 12 cycles
}
static int h8_get_priority(h83xx_state *h8, UINT8 bit)
@@ -443,7 +443,7 @@ static void timer_8bit_expire(h83xx_state *h8, int t, int sel)
switch ((h8->TCR[t]>>3) & 3)
{
- case 0: // no clear
+ case 0: // no clear
break;
case 1: // clear on match A
@@ -462,7 +462,7 @@ static void timer_8bit_expire(h83xx_state *h8, int t, int sel)
}
break;
- case 3: // clear on external reset input signal (not implemented)
+ case 3: // clear on external reset input signal (not implemented)
logerror("H8: external reset not implemented for 8-bit timers\n");
break;
}
@@ -476,32 +476,32 @@ static CPU_SET_INFO( h8 )
h83xx_state *h8 = get_safe_token(device);
switch(state) {
- case CPUINFO_INT_PC: h8->pc = info->i; break;
- case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break;
- case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break;
- case CPUINFO_INT_REGISTER + H8_EXR: h8_set_exr(h8, info->i); break;
-
- case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E1: h8->regs[1] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E2: h8->regs[2] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E3: h8->regs[3] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E4: h8->regs[4] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E5: h8->regs[5] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E6: h8->regs[6] = info->i; break;
- case CPUINFO_INT_REGISTER + H8_E7: h8->regs[7] = info->i; break;
-
- case CPUINFO_INT_INPUT_STATE + H8_NMI: h8_300_InterruptRequest(h8, 3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ0: h8_300_InterruptRequest(h8, 4, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ1: h8_300_InterruptRequest(h8, 5, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ2: h8_300_InterruptRequest(h8, 6, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ3: h8_300_InterruptRequest(h8, 7, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ4: h8_300_InterruptRequest(h8, 8, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ5: h8_300_InterruptRequest(h8, 9, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ6: h8_300_InterruptRequest(h8, 10, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_IRQ7: h8_300_InterruptRequest(h8, 11, info->i); break;
-
- case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX: h8_300_InterruptRequest(h8, 28, info->i); break;
- case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX: h8_300_InterruptRequest(h8, 32, info->i); break;
+ case CPUINFO_INT_PC: h8->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_PC: h8->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_CCR: h8_set_ccr(h8, info->i); break;
+ case CPUINFO_INT_REGISTER + H8_EXR: h8_set_exr(h8, info->i); break;
+
+ case CPUINFO_INT_REGISTER + H8_E0: h8->regs[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E1: h8->regs[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E2: h8->regs[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E3: h8->regs[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E4: h8->regs[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E5: h8->regs[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E6: h8->regs[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + H8_E7: h8->regs[7] = info->i; break;
+
+ case CPUINFO_INT_INPUT_STATE + H8_NMI: h8_300_InterruptRequest(h8, 3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ0: h8_300_InterruptRequest(h8, 4, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ1: h8_300_InterruptRequest(h8, 5, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ2: h8_300_InterruptRequest(h8, 6, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ3: h8_300_InterruptRequest(h8, 7, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ4: h8_300_InterruptRequest(h8, 8, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ5: h8_300_InterruptRequest(h8, 9, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ6: h8_300_InterruptRequest(h8, 10, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_IRQ7: h8_300_InterruptRequest(h8, 11, info->i); break;
+
+ case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX: h8_300_InterruptRequest(h8, 28, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX: h8_300_InterruptRequest(h8, 32, info->i); break;
default:
fatalerror("h8_set_info unknown request %x\n", state);
@@ -521,76 +521,76 @@ static READ8_HANDLER( h8330_itu_r )
switch(reg)
{
- case 0x8d: // serial Rx 1
+ case 0x8d: // serial Rx 1
val = h8->io->read_byte(H8_SERIAL_1);
break;
- case 0x92: // FRC H
+ case 0x92: // FRC H
frc = h8->device->total_cycles() / divider[h8->per_regs[0x96]];
frc %= 65536;
return frc>>8;
- case 0x93: // FRC L
+ case 0x93: // FRC L
frc = h8->device->total_cycles() / divider[h8->per_regs[0x96]];
frc %= 65536;
return frc&0xff;
- case 0xb2: // port 1 data
+ case 0xb2: // port 1 data
val = h8->io->read_byte(H8_PORT_1);
break;
- case 0xb3: // port 2 data
+ case 0xb3: // port 2 data
val = h8->io->read_byte(H8_PORT_2);
break;
- case 0xb6: // port 3 data
+ case 0xb6: // port 3 data
val = h8->io->read_byte(H8_PORT_3);
break;
- case 0xb7: // port 4 data
+ case 0xb7: // port 4 data
val = h8->io->read_byte(H8_PORT_4);
break;
- case 0xba: // port 5 data
+ case 0xba: // port 5 data
val = h8->io->read_byte(H8_PORT_5);
break;
- case 0xbb: // port 6 data
+ case 0xbb: // port 6 data
val = h8->io->read_byte(H8_PORT_6);
break;
- case 0xbe: // port 7 data
+ case 0xbe: // port 7 data
val = h8->io->read_byte(H8_PORT_7);
break;
- case 0xbf: // port 8 data
+ case 0xbf: // port 8 data
val = h8->io->read_byte(H8_PORT_8);
break;
- case 0xc1: // port 9 data
+ case 0xc1: // port 9 data
val = h8->io->read_byte(H8_PORT_9);
break;
- case 0xdc: // serial status
+ case 0xdc: // serial status
val = 0x87;
break;
- case 0xdd: // serial Rx 0
+ case 0xdd: // serial Rx 0
val = h8->io->read_byte(H8_SERIAL_0);
break;
- case 0xe0: // ADC 0 low byte
+ case 0xe0: // ADC 0 low byte
val = h8->io->read_byte(H8_ADC_0_L);
break;
- case 0xe1: // ADC 0 high byte
+ case 0xe1: // ADC 0 high byte
val = h8->io->read_byte(H8_ADC_0_H);
break;
- case 0xe2: // ADC 1 low byte
+ case 0xe2: // ADC 1 low byte
val = h8->io->read_byte(H8_ADC_1_L);
break;
- case 0xe3: // ADC 1 high byte
+ case 0xe3: // ADC 1 high byte
val = h8->io->read_byte(H8_ADC_1_H);
break;
- case 0xe4: // ADC 2 low byte
+ case 0xe4: // ADC 2 low byte
val = h8->io->read_byte(H8_ADC_2_L);
break;
- case 0xe5: // ADC 2 high byte
+ case 0xe5: // ADC 2 high byte
val = h8->io->read_byte(H8_ADC_2_H);
break;
- case 0xe6: // ADC 3 low byte
+ case 0xe6: // ADC 3 low byte
val = h8->io->read_byte(H8_ADC_3_L);
break;
- case 0xe7: // ADC 3 high byte
+ case 0xe7: // ADC 3 high byte
val = h8->io->read_byte(H8_ADC_3_H);
break;
- case 0xe8: // ADCSR: A/D control/status
- val = 0x80; // return conversion completed
+ case 0xe8: // ADCSR: A/D control/status
+ val = 0x80; // return conversion completed
break;
default:
val = h8->per_regs[reg];
@@ -612,37 +612,37 @@ static WRITE8_HANDLER( h8330_itu_w )
case 0x80:
printf("%02x to flash control or external\n", data);
break;
- case 0x8b: // serial Tx 1
+ case 0x8b: // serial Tx 1
h8->io->write_byte(H8_SERIAL_1, data);
break;
- case 0xb2: // port 1 data
+ case 0xb2: // port 1 data
h8->io->write_byte(H8_PORT_1, data);
break;
- case 0xb3: // port 2 data
+ case 0xb3: // port 2 data
h8->io->write_byte(H8_PORT_2, data);
break;
- case 0xb6: // port 3 data
+ case 0xb6: // port 3 data
h8->io->write_byte(H8_PORT_3, data);
break;
- case 0xb7: // port 4 data
+ case 0xb7: // port 4 data
h8->io->write_byte(H8_PORT_4, data);
break;
- case 0xba: // port 5 data
+ case 0xba: // port 5 data
h8->io->write_byte(H8_PORT_5, data);
break;
- case 0xbb: // port 6 data
+ case 0xbb: // port 6 data
h8->io->write_byte(H8_PORT_6, data);
break;
- case 0xbe: // port 7 data
+ case 0xbe: // port 7 data
h8->io->write_byte(H8_PORT_7, data);
break;
- case 0xbf: // port 8 data
+ case 0xbf: // port 8 data
h8->io->write_byte(H8_PORT_8, data);
break;
- case 0xc1: // port 9 data
+ case 0xc1: // port 9 data
h8->io->write_byte(H8_PORT_9, data);
break;
- case 0xdb: // serial Tx 0
+ case 0xdb: // serial Tx 0
h8->io->write_byte(H8_SERIAL_0, data);
break;
@@ -662,7 +662,7 @@ static WRITE8_HANDLER( h8330_itu_w )
break;
case 0xc8:
- h8->TCR[0] = data;
+ h8->TCR[0] = data;
recalc_8bit_timer(h8, 0);
break;
case 0xc9:
@@ -692,7 +692,7 @@ static WRITE8_HANDLER( h8330_itu_w )
break;
case 0xd0:
- h8->TCR[1] = data;
+ h8->TCR[1] = data;
recalc_8bit_timer(h8, 1);
break;
case 0xd1:
@@ -755,74 +755,74 @@ CPU_GET_INFO( h8_3334 )
switch(state) {
// Interface functions and variables
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8bit); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(h8bit); break;
- case CPUINFO_FCT_EXIT: info->exit = 0; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(h8); break;
- case CPUINFO_FCT_BURN: info->burn = 0; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h8->cyccnt; break;
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(h83xx_state); break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(h8); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(h8bit); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(h8bit); break;
+ case CPUINFO_FCT_EXIT: info->exit = 0; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(h8); break;
+ case CPUINFO_FCT_BURN: info->burn = 0; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(h8); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &h8->cyccnt; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(h83xx_state); break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
// Bus sizes
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
// Internal maps
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(h8_3334_internal_map); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map16 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map16 = NULL; break;
// CPU misc parameters
- case CPUINFO_STR_NAME: strcpy(info->s, "H8/3334"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_FLAGS: strcpy(info->s, h8_get_ccr_str(h8)); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "H8/3334"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_FLAGS: strcpy(info->s, h8_get_ccr_str(h8)); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
// CPU main state
- case CPUINFO_INT_PC: info->i = h8->pc; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = h8->ppc; break;
-
- case CPUINFO_INT_REGISTER + H8_PC: info->i = h8->pc; break;
- case CPUINFO_INT_REGISTER + H8_CCR: info->i = h8_get_ccr(h8); break;
- case CPUINFO_INT_REGISTER + H8_EXR: info->i = h8_get_exr(h8); break;
-
- case CPUINFO_INT_REGISTER + H8_E0: info->i = h8->regs[0]; break;
- case CPUINFO_INT_REGISTER + H8_E1: info->i = h8->regs[1]; break;
- case CPUINFO_INT_REGISTER + H8_E2: info->i = h8->regs[2]; break;
- case CPUINFO_INT_REGISTER + H8_E3: info->i = h8->regs[3]; break;
- case CPUINFO_INT_REGISTER + H8_E4: info->i = h8->regs[4]; break;
- case CPUINFO_INT_REGISTER + H8_E5: info->i = h8->regs[5]; break;
- case CPUINFO_INT_REGISTER + H8_E6: info->i = h8->regs[6]; break;
- case CPUINFO_INT_REGISTER + H8_E7: info->i = h8->regs[7]; break;
+ case CPUINFO_INT_PC: info->i = h8->pc; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = h8->ppc; break;
+
+ case CPUINFO_INT_REGISTER + H8_PC: info->i = h8->pc; break;
+ case CPUINFO_INT_REGISTER + H8_CCR: info->i = h8_get_ccr(h8); break;
+ case CPUINFO_INT_REGISTER + H8_EXR: info->i = h8_get_exr(h8); break;
+
+ case CPUINFO_INT_REGISTER + H8_E0: info->i = h8->regs[0]; break;
+ case CPUINFO_INT_REGISTER + H8_E1: info->i = h8->regs[1]; break;
+ case CPUINFO_INT_REGISTER + H8_E2: info->i = h8->regs[2]; break;
+ case CPUINFO_INT_REGISTER + H8_E3: info->i = h8->regs[3]; break;
+ case CPUINFO_INT_REGISTER + H8_E4: info->i = h8->regs[4]; break;
+ case CPUINFO_INT_REGISTER + H8_E5: info->i = h8->regs[5]; break;
+ case CPUINFO_INT_REGISTER + H8_E6: info->i = h8->regs[6]; break;
+ case CPUINFO_INT_REGISTER + H8_E7: info->i = h8->regs[7]; break;
// CPU debug stuff
- case CPUINFO_STR_REGISTER + H8_PC: sprintf(info->s, "PC :%08x", h8->pc); break;
- case CPUINFO_STR_REGISTER + H8_CCR: sprintf(info->s, "CCR :%08x", h8_get_ccr(h8)); break;
- case CPUINFO_STR_REGISTER + H8_EXR: sprintf(info->s, "EXR :%02x", h8_get_exr(h8)); break;
-
- case CPUINFO_STR_REGISTER + H8_E0: sprintf(info->s, " R0 :%08x", h8->regs[0]); break;
- case CPUINFO_STR_REGISTER + H8_E1: sprintf(info->s, " R1 :%08x", h8->regs[1]); break;
- case CPUINFO_STR_REGISTER + H8_E2: sprintf(info->s, " R2 :%08x", h8->regs[2]); break;
- case CPUINFO_STR_REGISTER + H8_E3: sprintf(info->s, " R3 :%08x", h8->regs[3]); break;
- case CPUINFO_STR_REGISTER + H8_E4: sprintf(info->s, " R4 :%08x", h8->regs[4]); break;
- case CPUINFO_STR_REGISTER + H8_E5: sprintf(info->s, " R5 :%08x", h8->regs[5]); break;
- case CPUINFO_STR_REGISTER + H8_E6: sprintf(info->s, " R6 :%08x", h8->regs[6]); break;
- case CPUINFO_STR_REGISTER + H8_E7: sprintf(info->s, " SP :%08x", h8->regs[7]); break;
+ case CPUINFO_STR_REGISTER + H8_PC: sprintf(info->s, "PC :%08x", h8->pc); break;
+ case CPUINFO_STR_REGISTER + H8_CCR: sprintf(info->s, "CCR :%08x", h8_get_ccr(h8)); break;
+ case CPUINFO_STR_REGISTER + H8_EXR: sprintf(info->s, "EXR :%02x", h8_get_exr(h8)); break;
+
+ case CPUINFO_STR_REGISTER + H8_E0: sprintf(info->s, " R0 :%08x", h8->regs[0]); break;
+ case CPUINFO_STR_REGISTER + H8_E1: sprintf(info->s, " R1 :%08x", h8->regs[1]); break;
+ case CPUINFO_STR_REGISTER + H8_E2: sprintf(info->s, " R2 :%08x", h8->regs[2]); break;
+ case CPUINFO_STR_REGISTER + H8_E3: sprintf(info->s, " R3 :%08x", h8->regs[3]); break;
+ case CPUINFO_STR_REGISTER + H8_E4: sprintf(info->s, " R4 :%08x", h8->regs[4]); break;
+ case CPUINFO_STR_REGISTER + H8_E5: sprintf(info->s, " R5 :%08x", h8->regs[5]); break;
+ case CPUINFO_STR_REGISTER + H8_E6: sprintf(info->s, " R6 :%08x", h8->regs[6]); break;
+ case CPUINFO_STR_REGISTER + H8_E7: sprintf(info->s, " SP :%08x", h8->regs[7]); break;
}
}
diff --git a/src/emu/cpu/h83002/h8disasm.c b/src/emu/cpu/h83002/h8disasm.c
index 5756665cf43..31007dd876e 100644
--- a/src/emu/cpu/h83002/h8disasm.c
+++ b/src/emu/cpu/h83002/h8disasm.c
@@ -12,14 +12,14 @@
#include "debugger.h"
#include "h8.h"
-static const char *const bit_instr[8] = {"bset", "bnot", "bclr", "btst", "bor", "bxor", "band", "bld"};
-static const char *const bit_instr2[8] = {"bset", "bnot", "bclr", "btst", "bior", "bixor", "biand", "bild"};
-static const char *const imm32l_instr[8] = {"mov", "add", "cmp", "sub", "or", "xor", "and", "?"};
-static const char *const branch_instr[16] = {"bt", "bf", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc", "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble"};
+static const char *const bit_instr[8] = {"bset", "bnot", "bclr", "btst", "bor", "bxor", "band", "bld"};
+static const char *const bit_instr2[8] = {"bset", "bnot", "bclr", "btst", "bior", "bixor", "biand", "bild"};
+static const char *const imm32l_instr[8] = {"mov", "add", "cmp", "sub", "or", "xor", "and", "?"};
+static const char *const branch_instr[16] = {"bt", "bf", "bhi", "bls", "bcc", "bcs", "bne", "beq", "bvc", "bvs", "bpl", "bmi", "bge", "blt", "bgt", "ble"};
-static const char *const reg_names32[8] = {"ER0", "ER1", "ER2", "ER3", "ER4", "ER5", "ER6", "SP"};
-static const char *const reg_names16[16] = {"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7"};
-static const char *const reg_names8[16] = {"R0H", "R1H", "R2H", "R3H", "R4H", "R5H", "R6H", "R7H","R0L", "R1L", "R2L", "R3L", "R4L", "R5L", "R6L", "R7L"};
+static const char *const reg_names32[8] = {"ER0", "ER1", "ER2", "ER3", "ER4", "ER5", "ER6", "SP"};
+static const char *const reg_names16[16] = {"R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "E0", "E1", "E2", "E3", "E4", "E5", "E6", "E7"};
+static const char *const reg_names8[16] = {"R0H", "R1H", "R2H", "R3H", "R4H", "R5H", "R6H", "R7H","R0L", "R1L", "R2L", "R3L", "R4L", "R5L", "R6L", "R7L"};
static UINT32 h8disasm_0(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
static UINT32 h8disasm_1(UINT32 address, UINT32 opcode, char *output, const UINT8 *oprom);
@@ -203,25 +203,25 @@ static UINT32 h8disasm_0(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *op
case 0x6b:
// stc.w CCR,@abs
- if ((data16&0xff) == 0x00) // 16 bit absolute
+ if ((data16&0xff) == 0x00) // 16 bit absolute
{
ext16 = h8_mem_read16(4);
sprintf(buffer, "%4.4x ldc.w @%04x, ccr", opcode, ext16);
size = 6;
}
- else if ((data16&0xff) == 0x20) // 24 bit absolute
+ else if ((data16&0xff) == 0x20) // 24 bit absolute
{
sdata32 = h8_mem_read32(4) & 0xffffff;
sprintf(buffer, "%4.4x ldc.w @%06x, ccr", opcode, sdata32);
size = 8;
}
- else if ((data16&0xff) == 0x80) // 16 bit absolute
+ else if ((data16&0xff) == 0x80) // 16 bit absolute
{
ext16 = h8_mem_read16(4);
sprintf(buffer, "%4.4x stc.w ccr, @%04x", opcode, ext16);
size = 6;
}
- else if ((data16&0xff) == 0xa0) // 24 bit absolute
+ else if ((data16&0xff) == 0xa0) // 24 bit absolute
{
sdata32 = h8_mem_read32(4) & 0xffffff;
sprintf(buffer, "%4.4x stc.w ccr, @%06x", opcode, sdata32);
@@ -422,13 +422,13 @@ static UINT32 h8disasm_0(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *op
size = 4;
switch((data16>>8)&0xff)
{
- case 0x64: // or.l ERs, ERd
+ case 0x64: // or.l ERs, ERd
sprintf(buffer, "%4.4x or.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
break;
- case 0x65: // xor.l ERs, ERd
+ case 0x65: // xor.l ERs, ERd
sprintf(buffer, "%4.4x xor.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
break;
- case 0x66: // and.l ERs, ERd
+ case 0x66: // and.l ERs, ERd
sprintf(buffer, "%4.4x and.l %s, %s", opcode, reg_names32[(data16>>4) & 0x7], reg_names32[data16 & 0x7]);
break;
default:
@@ -448,9 +448,9 @@ static UINT32 h8disasm_0(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *op
sprintf(buffer, "%4.4x stc ccr, %s", opcode, reg_names8[opcode & 0xf]);
}
else if(((opcode>>4) & 0xf) == 1) // H8S stc exr, rd
- {
+ {
sprintf(buffer, "%4.4x stc exr, %s", opcode, reg_names8[opcode & 0xf]);
- }
+ }
else
{
sprintf(buffer, "%4.4x default", opcode);
@@ -464,9 +464,9 @@ static UINT32 h8disasm_0(UINT32 pc, UINT32 opcode, char *buffer, const UINT8 *op
sprintf(buffer, "%4.4x ldc %s, ccr", opcode, reg_names8[opcode & 0xf]);
}
else if(((opcode>>4) & 0xf) == 1) // H8S ldr rd, exr
- {
+ {
sprintf(buffer, "%4.4x ldc %s, exr", opcode, reg_names8[opcode & 0xf]);
- }
+ }
else
{
sprintf(buffer, "%4.4x default", opcode);
@@ -1309,7 +1309,7 @@ static UINT32 h8disasm_6(UINT32 address, UINT32 opcode, char *buffer, const UINT
sprintf(buffer, "%4.4x mov.b @%8.8x, %s", opcode, data32&addr_mask, reg_names8[opcode & 0xf]);
size = 6;
break;
- case 0x3: // bclr #imm, imm:32
+ case 0x3: // bclr #imm, imm:32
data32=h8_mem_read32(2);
data16=h8_mem_read16(6);
switch ((data16 >> 8) & 0xff)
@@ -1541,7 +1541,7 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *buffer, const UINT
size = 4;
switch(data16>>8)
{
- case 0x60: // bset/bnot/bclr.b rn, @erd
+ case 0x60: // bset/bnot/bclr.b rn, @erd
case 0x61:
case 0x62:
if (((opcode & 0x8f)!=0)||((data16 & 0x0f)!=0))
@@ -1552,7 +1552,7 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *buffer, const UINT
sprintf(buffer, "%4.4x %s.b %s, @%s", opcode, bit_instr[(data16>>8)&7], reg_names16[(data16>>4)&0xf], reg_names32[(opcode>>4) & 0x7]);
break;
- case 0x67: // bst/bist.b #xx:3, @erd
+ case 0x67: // bst/bist.b #xx:3, @erd
if (((opcode & 0x8f)!=0)||((data16 & 0x0f)!=0))
{
sprintf(buffer, "%4.4x default", opcode);
@@ -1564,7 +1564,7 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *buffer, const UINT
sprintf(buffer, "%4.4x bst.b #%1.1x, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
break;
- case 0x70: // bset/bnot/bclr.b #xx:3, @erd
+ case 0x70: // bset/bnot/bclr.b #xx:3, @erd
case 0x71:
case 0x72:
if (((opcode & 0x8f)!=0)||((data16 & 0x8f)!=0))
@@ -1575,7 +1575,7 @@ static UINT32 h8disasm_7(UINT32 address, UINT32 opcode, char *buffer, const UINT
sprintf(buffer, "%4.4x %s.b #%1.1x, @%s", opcode, bit_instr[(data16>>8)&7], (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
break;
- case 0x77: // bld #xx:3, @rd
+ case 0x77: // bld #xx:3, @rd
sprintf(buffer, "%4.4x bld #%d, @%s", opcode, (data16>>4)&7, reg_names32[(opcode>>4) & 0x7]);
break;
}
@@ -1617,4 +1617,3 @@ CPU_DISASSEMBLE(h8_32)
{
return h8_disasm(buffer, pc, oprom, opram, 0xffffffff);
}
-
diff --git a/src/emu/cpu/h83002/h8ops.h b/src/emu/cpu/h83002/h8ops.h
index 6112f3e72a4..23df45a2e1e 100644
--- a/src/emu/cpu/h83002/h8ops.h
+++ b/src/emu/cpu/h83002/h8ops.h
@@ -334,7 +334,7 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
break;
case 0x6b:
- if ((ext16&0xff) == 0x00) // 16 bit absolute
+ if ((ext16&0xff) == 0x00) // 16 bit absolute
{
address24=h8_mem_read16(h8, h8->pc);
h8->pc += 2;
@@ -345,7 +345,7 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
H8_IFETCH_TIMING(4);
H8_BYTE_TIMING(1, address24);
}
- else if ((ext16&0xff) == 0x20) // 24 bit absolute
+ else if ((ext16&0xff) == 0x20) // 24 bit absolute
{
address24=h8_mem_read32(h8, h8->pc);
h8->pc += 4;
@@ -354,7 +354,7 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
H8_IFETCH_TIMING(4);
H8_BYTE_TIMING(1, address24);
}
- else if ((ext16&0xff) == 0x80) // 16 bit absolute
+ else if ((ext16&0xff) == 0x80) // 16 bit absolute
{
address24=h8_mem_read16(h8, h8->pc);
h8->pc += 2;
@@ -364,7 +364,7 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
H8_IFETCH_TIMING(3);
H8_BYTE_TIMING(1, address24);
}
- else if ((ext16&0xff) == 0xa0) // 24 bit absolute
+ else if ((ext16&0xff) == 0xa0) // 24 bit absolute
{
address24=h8_mem_read32(h8, h8->pc);
h8->pc += 4;
@@ -402,13 +402,13 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
dstreg = ext16 & 0x7;
switch((ext16>>8)&0xff)
{
- case 0x64: // or.l ERs, ERd
+ case 0x64: // or.l ERs, ERd
udata32 = h8_or32(h8, h8_getreg32(h8, (ext16>>4) & 0x7), h8_getreg32(h8, dstreg));
break;
- case 0x65: // xor.l ERs, ERd
+ case 0x65: // xor.l ERs, ERd
udata32 = h8_xor32(h8, h8_getreg32(h8, (ext16>>4) & 0x7), h8_getreg32(h8, dstreg));
break;
- case 0x66: // and.l ERs, ERd
+ case 0x66: // and.l ERs, ERd
udata32 = h8_and32(h8, h8_getreg32(h8, (ext16>>4) & 0x7), h8_getreg32(h8, dstreg));
break;
default:
@@ -599,7 +599,7 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
sdata8 = ((opcode>>4) & 0xf);
// check LDM or STM
- if (ext16 & 0x80) // STM
+ if (ext16 & 0x80) // STM
{
srcreg = (ext16 & 7);
for (int i = 0; i <= sdata8; i++)
@@ -613,7 +613,7 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
H8_IOP_TIMING(2);
}
}
- else // LDM
+ else // LDM
{
srcreg = (ext16 & 7);
for (int i = 0; i <= sdata8; i++)
@@ -628,23 +628,23 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
}
}
break;
- case 0x8: // sleep
+ case 0x8: // sleep
H8_IFETCH_TIMING(1);
break;
case 0xc:
// mulxs
ext16 = h8_mem_read16(h8, h8->pc);
h8->pc+=2;
- if(((ext16>>8) & 0xf) == 0) // .b (8x8 = 16)
+ if(((ext16>>8) & 0xf) == 0) // .b (8x8 = 16)
{
- sdata16 = h8_getreg8(h8, (ext16 & 0xf)+8); // Rd - always the low 8 bits of Rd
- sdata8 = h8_getreg8(h8, (ext16>>4) & 0xf); // Rs
+ sdata16 = h8_getreg8(h8, (ext16 & 0xf)+8); // Rd - always the low 8 bits of Rd
+ sdata8 = h8_getreg8(h8, (ext16>>4) & 0xf); // Rs
sdata16 = h8_mulxs8(h8, sdata8, sdata16);
h8_setreg16(h8, ext16 & 0xf, sdata16);
H8_IFETCH_TIMING(2);
H8_IOP_TIMING(12);
}
- else if(((ext16>>8) & 0xf) == 2) // .w
+ else if(((ext16>>8) & 0xf) == 2) // .w
{
sdata32 = h8_getreg32(h8, ext16 & 0x7);
sdata16 = h8_getreg16(h8, (ext16>>4) & 0xf);
@@ -703,10 +703,10 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
H8_IFETCH_TIMING(1);
}
else if(((opcode>>4) & 0xf) == 1)
- {
+ {
h8_setreg8(h8, opcode & 0xf, h8_get_exr(h8));
H8_IFETCH_TIMING(1);
- }
+ }
else
{
logerror("H8/3xx: Unk. group 0 2 %x\n", opcode);
@@ -722,11 +722,11 @@ static void h8_group0(h83xx_state *h8, UINT16 opcode)
H8_IFETCH_TIMING(1);
}
else if(((opcode>>4) & 0xf) == 1)
- {
+ {
udata8 = h8_getreg8(h8, opcode & 0xf);
h8_set_exr(h8, udata8);
H8_IFETCH_TIMING(1);
- }
+ }
else
{
logerror("H8/3xx: Unk. group 0 3 %x\n", opcode);
@@ -1466,40 +1466,40 @@ static void h8_group1(h83xx_state *h8, UINT16 opcode)
case 0xb:
switch((opcode>>4)& 0xf)
{
- case 0: // subs.l #1, rN (decrement without touching flags)
+ case 0: // subs.l #1, rN (decrement without touching flags)
dstreg = opcode & 0x7;
udata32 = h8_getreg32(h8, dstreg);
udata32--;
h8_setreg32(h8, dstreg, udata32);
H8_IFETCH_TIMING(1);
break;
- case 5: // dec.w #1, rN
+ case 5: // dec.w #1, rN
dstreg = opcode & 0xf;
udata16 = h8_dec16(h8, h8_getreg16(h8, dstreg));
h8_setreg16(h8, dstreg, udata16);
H8_IFETCH_TIMING(1);
break;
- case 7: // dec.l #1, rN
+ case 7: // dec.l #1, rN
dstreg = opcode & 0x7;
udata32 = h8_dec32(h8, h8_getreg32(h8, dstreg));
h8_setreg32(h8, dstreg, udata32);
H8_IFETCH_TIMING(1);
break;
- case 8: // subs.l #2, rN (decrement without touching flags)
+ case 8: // subs.l #2, rN (decrement without touching flags)
dstreg = opcode & 0x7;
udata32 = h8_getreg32(h8, dstreg);
udata32-=2;
h8_setreg32(h8, dstreg, udata32);
H8_IFETCH_TIMING(1);
break;
- case 9: // subs.l #4, rN (decrement without touching flags)
+ case 9: // subs.l #4, rN (decrement without touching flags)
dstreg = opcode & 0x7;
udata32 = h8_getreg32(h8, dstreg);
udata32-=4;
h8_setreg32(h8, dstreg, udata32);
H8_IFETCH_TIMING(1);
break;
- case 0xd: // dec.w #2, rN
+ case 0xd: // dec.w #2, rN
dstreg = opcode & 0xf;
udata16 = h8_dec16(h8, h8_getreg16(h8, dstreg));
if (h8->h8vflag)
@@ -1512,7 +1512,7 @@ static void h8_group1(h83xx_state *h8, UINT16 opcode)
h8_setreg16(h8, dstreg, udata16);
H8_IFETCH_TIMING(1);
break;
- case 0xf: // dec.l #2, rN
+ case 0xf: // dec.l #2, rN
dstreg = opcode & 0x7;
udata32 = h8_dec32(h8, h8_getreg32(h8, dstreg));
if (h8->h8vflag)
@@ -1782,9 +1782,9 @@ static void h8_group6(h83xx_state *h8, UINT16 opcode)
switch((opcode>>8)&0xf)
{
- case 0: udata8 = h8_bset8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
- case 2: udata8 = h8_bclr8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
- case 3: h8_btst8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
+ case 0: udata8 = h8_bset8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
+ case 2: udata8 = h8_bclr8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
+ case 3: h8_btst8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
default:
logerror("H8/3xx: Unk. group 6 def 0-3-0 %x\n", opcode);
h8->h8err = 1;
@@ -1891,7 +1891,7 @@ static void h8_group6(h83xx_state *h8, UINT16 opcode)
H8_IFETCH_TIMING(1);
H8_BYTE_TIMING(1, address24);
break;
- case 0x1: // btst #xx, @aa:16 or btst Rn, @aa:16
+ case 0x1: // btst #xx, @aa:16 or btst Rn, @aa:16
sdata16 = h8_mem_read16(h8, h8->pc);
h8->pc += 2;
address24 = sdata16 & H8_ADDR_MASK;
@@ -1934,14 +1934,14 @@ static void h8_group6(h83xx_state *h8, UINT16 opcode)
H8_IFETCH_TIMING(2);
H8_BYTE_TIMING(1, address24);
break;
- case 0x3: // bclr #x, @imm:24
+ case 0x3: // bclr #x, @imm:24
address24=h8_mem_read32(h8, h8->pc);
h8->pc += 4;
udata16 = h8_mem_read16(h8, h8->pc);
h8->pc += 2;
switch ((udata16 >> 8) & 0xff)
{
- case 0x60 : // bset Rn, @abs:24
+ case 0x60 : // bset Rn, @abs:24
udata8 = h8_mem_read8(address24);
udata8 = h8_bset8(h8, h8_getreg8(h8, (udata16 >> 4) & 0xf), udata8);
h8_mem_write8(address24, udata8);
@@ -2188,14 +2188,14 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
{
switch((opcode>>8)&0x7)
{
- case 0: udata8 = h8_bset8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
- case 1: udata8 = h8_bnot8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
- case 2: udata8 = h8_bclr8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8);H8_IFETCH_TIMING(1);break;
- case 3: h8_btst8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
- case 4: h8_bor8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
- case 5: h8_bxor8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
- case 6: h8_band8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
- case 7: h8_bld8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
+ case 0: udata8 = h8_bset8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
+ case 1: udata8 = h8_bnot8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8); H8_IFETCH_TIMING(1); break;
+ case 2: udata8 = h8_bclr8(h8, bitnr, udata8); h8_setreg8(h8, dstreg, udata8);H8_IFETCH_TIMING(1);break;
+ case 3: h8_btst8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
+ case 4: h8_bor8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
+ case 5: h8_bxor8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
+ case 6: h8_band8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
+ case 7: h8_bld8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
default:
logerror("H8/3xx: Unk. group 7 0-7 def %x\n", opcode);
h8->h8err = 1;
@@ -2206,7 +2206,7 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
{
switch((opcode>>8)&7)
{
- case 7: h8_bild8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
+ case 7: h8_bild8(h8, bitnr, udata8); H8_IFETCH_TIMING(1); break;
default:
logerror("H8/3xx: Unk. group 7 0-7-1 def %x\n", opcode);
h8->h8err = 1;
@@ -2283,7 +2283,7 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
switch((opcode>>4)&7)
{
- case 0: dst16 = h8_mov16(h8, udata16); h8_setreg16(h8, dstreg, dst16); H8_IFETCH_TIMING(2);break;
+ case 0: dst16 = h8_mov16(h8, udata16); h8_setreg16(h8, dstreg, dst16); H8_IFETCH_TIMING(2);break;
case 1: dst16 = h8_add16(h8, udata16, dst16); h8_setreg16(h8, dstreg, dst16); H8_IFETCH_TIMING(2); break;
case 2: h8_cmp16(h8, udata16, dst16); H8_IFETCH_TIMING(2); break;
case 3: dst16 = h8_sub16(h8, udata16, dst16); h8_setreg16(h8, dstreg, dst16); H8_IFETCH_TIMING(2); break;
@@ -2314,7 +2314,7 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
switch((opcode>>4)&7)
{
- case 0: dst32 = h8_mov32(h8, udata32); h8_setreg32(h8, dstreg, dst32); H8_IFETCH_TIMING(3); break;
+ case 0: dst32 = h8_mov32(h8, udata32); h8_setreg32(h8, dstreg, dst32); H8_IFETCH_TIMING(3); break;
case 1: dst32 = h8_add32(h8, udata32, dst32); h8_setreg32(h8, dstreg, dst32); H8_IFETCH_TIMING(3); break;
case 2: h8_cmp32(h8, udata32, dst32); H8_IFETCH_TIMING(3); break;
case 3: dst32 = h8_sub32(h8, udata32, dst32); h8_setreg32(h8, dstreg, dst32); H8_IFETCH_TIMING(3); break;
@@ -2332,7 +2332,7 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
case 0xb:
switch (opcode & 0xff)
{
- case 0xd4: // eepmov.w
+ case 0xd4: // eepmov.w
{
ext16 = h8_mem_read16(h8, h8->pc);
h8->pc += 2;
@@ -2360,7 +2360,7 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
}
break;
- case 0x5c: // eepmov.b
+ case 0x5c: // eepmov.b
{
ext16 = h8_mem_read16(h8, h8->pc);
h8->pc += 2;
@@ -2447,20 +2447,20 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
{
// bset/bnot/bclr.b Rn, @ERd
case 0x60:
- if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
+ if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
h8_mem_write8(address24, h8_bset8(h8, h8_getreg16(h8, (ext16>>4)&0xf)&7, h8_mem_read8(address24)));
break;
case 0x61:
- if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
+ if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
h8_mem_write8(address24, h8_bnot8(h8, h8_getreg16(h8, (ext16>>4)&0xf)&7, h8_mem_read8(address24)));
break;
case 0x62:
- if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
+ if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
h8_mem_write8(address24, h8_bclr8(h8, h8_getreg16(h8, (ext16>>4)&0xf)&7, h8_mem_read8(address24)));
break;
- case 0x67: // bst/bist.b #Imm:3, @ERd
- if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
+ case 0x67: // bst/bist.b #Imm:3, @ERd
+ if (((opcode & 0x8f)!=0)||((ext16 & 0x0f)!=0)) { h8->h8err=1; break; }
if ((ext16 & 0x80)!=0)
{
h8_mem_write8(address24, h8_bist8(h8, (ext16>>4)&7, h8_mem_read8(address24)));
@@ -2473,15 +2473,15 @@ static void h8_group7(h83xx_state *h8, UINT16 opcode)
// bset/bnot/bclr.b #Imm:3, @ERd
case 0x70:
- if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8->h8err=1; break; }
+ if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8->h8err=1; break; }
h8_mem_write8(address24, h8_bset8(h8, (ext16>>4)&7, h8_mem_read8(address24)));
break;
case 0x71:
- if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8->h8err=1; break; }
+ if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8->h8err=1; break; }
h8_mem_write8(address24, h8_bnot8(h8, (ext16>>4)&7, h8_mem_read8(address24)));
break;
case 0x72:
- if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8->h8err=1; break; }
+ if (((opcode & 0x8f)!=0)||((ext16 & 0x8f)!=0)) { h8->h8err=1; break; }
h8_mem_write8(address24, h8_bclr8(h8, (ext16>>4)&7, h8_mem_read8(address24)));
break;
}
@@ -4260,4 +4260,3 @@ static int h8_branch(h83xx_state *h8, UINT8 condition)
}
return taken;
}
-
diff --git a/src/emu/cpu/h83002/h8periph.c b/src/emu/cpu/h83002/h8periph.c
index a9c292b2742..edd9d651275 100644
--- a/src/emu/cpu/h83002/h8periph.c
+++ b/src/emu/cpu/h83002/h8periph.c
@@ -13,25 +13,25 @@
#include "h8.h"
#include "h8priv.h"
-#define H8_REG_START (0x00ffff10)
+#define H8_REG_START (0x00ffff10)
// timer registers
-#define TSTR (0x60)
-#define TIER0 (0x66)
+#define TSTR (0x60)
+#define TIER0 (0x66)
#define TIER1 (0x70)
#define TIER2 (0x7a)
#define TIER3 (0x84)
#define TIER4 (0x94)
-#define TSR0 (0x67)
-#define TSR1 (0x71)
-#define TSR2 (0x7b)
-#define TSR3 (0x85)
-#define TSR4 (0x95)
-#define TCR0 (0x64)
-#define TCR1 (0x6e)
-#define TCR2 (0x78)
-#define TCR3 (0x82)
-#define TCR4 (0x92)
+#define TSR0 (0x67)
+#define TSR1 (0x71)
+#define TSR2 (0x7b)
+#define TSR3 (0x85)
+#define TSR4 (0x95)
+#define TCR0 (0x64)
+#define TCR1 (0x6e)
+#define TCR2 (0x78)
+#define TCR3 (0x82)
+#define TCR4 (0x92)
static const UINT8 tsr[5] = { TSR0, TSR1, TSR2, TSR3, TSR4 };
static const UINT8 tier[5] = { TIER0, TIER1, TIER2, TIER3, TIER4 };
@@ -292,7 +292,7 @@ static UINT8 h8_ISR_r(h83xx_state *h8)
int i;
for (i = 0; i < 6; i++)
- if (h8->irq_req[0] & (1 << (12+i))) res |= (1 << i);
+ if (h8->irq_req[0] & (1 << (12+i))) res |= (1 << i);
return res;
}
@@ -301,7 +301,7 @@ static void h8_ISR_w(h83xx_state *h8, UINT8 val)
{
int i;
for (i = 0; i < 6; i++)
- if ((~val) & (1 << i)) h8->irq_req[0] &= ~(1 << (12+i));
+ if ((~val) & (1 << i)) h8->irq_req[0] &= ~(1 << (12+i));
}
@@ -324,14 +324,14 @@ UINT8 h8_register_read8(h83xx_state *h8, UINT32 address)
{
case 0xb4: // serial port A status
val = h8->per_regs[reg];
- val |= 0xc4; // transmit finished, receive ready, no errors
+ val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xb5: // serial port A receive
val = h8->io->read_byte(H8_SERIAL_0);
break;
case 0xbc: // serial port B status
val = h8->per_regs[reg];
- val |= 0xc4; // transmit finished, receive ready, no errors
+ val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xbd: // serial port B receive
val = h8->io->read_byte(H8_SERIAL_1);
@@ -360,28 +360,28 @@ UINT8 h8_register_read8(h83xx_state *h8, UINT32 address)
case 0xe7:
val = h8->io->read_byte(H8_ADC_3_L);
break;
- case 0xe8: // adc status
+ case 0xe8: // adc status
val = 0x80;
break;
- case 0xc7: // port 4 data
+ case 0xc7: // port 4 data
val = h8->io->read_byte(H8_PORT_4);
break;
- case 0xcb: // port 6 data
+ case 0xcb: // port 6 data
val = h8->io->read_byte(H8_PORT_6);
break;
- case 0xce: // port 7 data
+ case 0xce: // port 7 data
val = h8->io->read_byte(H8_PORT_7);
break;
- case 0xcf: // port 8 data
+ case 0xcf: // port 8 data
val = h8->io->read_byte(H8_PORT_8);
break;
- case 0xd2: // port 9 data
+ case 0xd2: // port 9 data
val = h8->io->read_byte(H8_PORT_9);
break;
- case 0xd3: // port a data
+ case 0xd3: // port a data
val = h8->io->read_byte(H8_PORT_A);
break;
- case 0xd6: // port b data
+ case 0xd6: // port b data
val = h8->io->read_byte(H8_PORT_B);
break;
case 0xf6:
@@ -412,12 +412,12 @@ void h8_register_write8(h83xx_state *h8, UINT32 address, UINT8 val)
switch (reg)
{
- case 0xb3: // serial 0 send
+ case 0xb3: // serial 0 send
h8->io->write_byte(H8_SERIAL_0, val);
h8_3002_InterruptRequest(h8, 54, 1);
h8_3002_InterruptRequest(h8, 55, 1);
break;
- case 0xbb: // serial 1 send
+ case 0xbb: // serial 1 send
h8->io->write_byte(H8_SERIAL_1, val);
h8_3002_InterruptRequest(h8, 58, 1);
h8_3002_InterruptRequest(h8, 59, 1);
@@ -425,22 +425,22 @@ void h8_register_write8(h83xx_state *h8, UINT32 address, UINT8 val)
case 0xc7:
h8->io->write_byte(H8_PORT_4, val);
break;
- case 0xcb: // port 6 data
+ case 0xcb: // port 6 data
h8->io->write_byte(H8_PORT_6, val);
break;
- case 0xce: // port 7 data
+ case 0xce: // port 7 data
h8->io->write_byte(H8_PORT_7, val);
break;
- case 0xcf: // port 8 data
+ case 0xcf: // port 8 data
h8->io->write_byte(H8_PORT_8, val);
break;
- case 0xd2: // port 9 data
+ case 0xd2: // port 9 data
h8->io->write_byte(H8_PORT_9, val);
break;
- case 0xd3: // port a data
+ case 0xd3: // port a data
h8->io->write_byte(H8_PORT_A, val);
break;
- case 0xd6: // port b data
+ case 0xd6: // port b data
h8->io->write_byte(H8_PORT_B, val);
break;
case 0xf6:
@@ -492,7 +492,7 @@ static void h8itu_3007_timer_expire(h83xx_state *h8, int tnum)
}
h8->per_regs[0x64] |= 1<<tnum;
- if(h8->per_regs[0x64] & (4<<tnum)) // interrupt enable
+ if(h8->per_regs[0x64] & (4<<tnum)) // interrupt enable
{
//logerror("h8/3007 timer %d GRA INTERRUPT\n",tnum);
h8_3002_InterruptRequest(h8, 24+tnum*4, 1);
@@ -514,7 +514,7 @@ static void h8itu_3007_timer_expire(h83xx_state *h8, int tnum)
}
h8->per_regs[0x65] |= 1<<tnum;
- if(h8->per_regs[0x65] & (4<<tnum)) // interrupt enable
+ if(h8->per_regs[0x65] & (4<<tnum)) // interrupt enable
{
//logerror("h8/3007 timer %d GRB INTERRUPT\n",tnum);
h8_3002_InterruptRequest(h8, 25+tnum*4, 1);
@@ -525,7 +525,7 @@ static void h8itu_3007_timer_expire(h83xx_state *h8, int tnum)
{
//logerror("h8/3007 timer %d OVF match, restarting\n",tnum);
h8->per_regs[0x66] |= 1<<tnum;
- if(h8->per_regs[0x66] & (4<<tnum)) // interrupt enable
+ if(h8->per_regs[0x66] & (4<<tnum)) // interrupt enable
{
//logerror("h8/3007 timer %d OVF INTERRUPT\n",tnum);
h8_3002_InterruptRequest(h8, 26+tnum*4, 1);
@@ -619,14 +619,14 @@ UINT8 h8_3007_register_read8(h83xx_state *h8, UINT32 address)
{
case 0xb4: // serial port A status
val = h8->per_regs[reg];
- val |= 0xc4; // transmit finished, receive ready, no errors
+ val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xb5: // serial port A receive
val = h8->io->read_byte(H8_SERIAL_0);
break;
case 0xbc: // serial port B status
val = h8->per_regs[reg];
- val |= 0xc4; // transmit finished, receive ready, no errors
+ val |= 0xc4; // transmit finished, receive ready, no errors
break;
case 0xbd: // serial port B receive
val = h8->io->read_byte(H8_SERIAL_1);
@@ -655,29 +655,29 @@ UINT8 h8_3007_register_read8(h83xx_state *h8, UINT32 address)
case 0xe7:
val = h8->io->read_byte(H8_ADC_3_L);
break;
- case 0xe8: // adc status
+ case 0xe8: // adc status
val = 0x80;
break;
- case 0xd3: // port 4 data
+ case 0xd3: // port 4 data
val = h8->io->read_byte(H8_PORT_4);
break;
- case 0xd5: // port 6 data
+ case 0xd5: // port 6 data
val = h8->io->read_byte(H8_PORT_6);
break;
- case 0xd6: // port 7 data
+ case 0xd6: // port 7 data
val = h8->io->read_byte(H8_PORT_7);
break;
- case 0xd7: // port 8 data
+ case 0xd7: // port 8 data
val = h8->io->read_byte(H8_PORT_8);
break;
- case 0xd8: // port 9 data
+ case 0xd8: // port 9 data
val = h8->io->read_byte(H8_PORT_9);
break;
- case 0xd9: // port a data
+ case 0xd9: // port a data
val = h8->io->read_byte(H8_PORT_A);
break;
- case 0xda: // port b data
+ case 0xda: // port b data
val = h8->io->read_byte(H8_PORT_B);
break;
default:
@@ -716,22 +716,22 @@ void h8_3007_register_write8(h83xx_state *h8, UINT32 address, UINT8 val)
case 0xd3:
h8->io->write_byte(H8_PORT_4, val);
break;
- case 0xd5: // port 6 data
+ case 0xd5: // port 6 data
h8->io->write_byte(H8_PORT_6, val);
break;
- case 0xd6: // port 7 data
+ case 0xd6: // port 7 data
h8->io->write_byte(H8_PORT_7, val);
break;
- case 0xd7: // port 8 data
+ case 0xd7: // port 8 data
h8->io->write_byte(H8_PORT_8, val);
break;
- case 0xd8: // port 9 data
+ case 0xd8: // port 9 data
h8->io->write_byte(H8_PORT_9, val);
break;
- case 0xd9: // port a data
+ case 0xd9: // port a data
h8->io->write_byte(H8_PORT_A, val);
break;
- case 0xda: // port b data
+ case 0xda: // port b data
h8->io->write_byte(H8_PORT_B, val);
break;
}
@@ -742,9 +742,9 @@ UINT8 h8_3007_register1_read8(h83xx_state *h8, UINT32 address)
{
switch (address)
{
- case 0xfee012: return h8->per_regs[0xF2]; // SYSCR
- case 0xfee016: return h8_ISR_r(h8); // ISR
- case 0xfee018: return h8->per_regs[0xF8]; // IPRA
+ case 0xfee012: return h8->per_regs[0xF2]; // SYSCR
+ case 0xfee016: return h8_ISR_r(h8); // ISR
+ case 0xfee018: return h8->per_regs[0xF8]; // IPRA
}
logerror("cpu '%s' (PC=%08X): unmapped I/O(1) byte read from %08X\n",h8->device->tag(),h8->pc,address);
@@ -755,9 +755,9 @@ void h8_3007_register1_write8(h83xx_state *h8, UINT32 address, UINT8 val)
{
switch (address)
{
- case 0xfee012: h8->per_regs[0xF2] = val; return; // SYSCR
- case 0xfee016: h8_ISR_w(h8, val); return; // ISR
- case 0xfee018: h8->per_regs[0xF8] = val; return; // IPRA
+ case 0xfee012: h8->per_regs[0xF2] = val; return; // SYSCR
+ case 0xfee016: h8_ISR_w(h8, val); return; // ISR
+ case 0xfee018: h8->per_regs[0xF8] = val; return; // IPRA
}
logerror("cpu '%s' (PC=%08X): unmapped I/O(1) byte write to %08X = %02X\n",h8->device->tag(),h8->pc,address,val);
}
diff --git a/src/emu/cpu/h83002/h8priv.h b/src/emu/cpu/h83002/h8priv.h
index c3f65de49b5..3b2c7369fd6 100644
--- a/src/emu/cpu/h83002/h8priv.h
+++ b/src/emu/cpu/h83002/h8priv.h
@@ -51,7 +51,7 @@ struct h83xx_state
UINT8 h8uflag, h8uiflag;
UINT8 incheckirqs;
- bool has_exr;
+ bool has_exr;
device_irq_acknowledge_callback irq_cb;
legacy_cpu_device *device;
@@ -76,12 +76,12 @@ struct h83xx_state
H8S2XXX_TPU tpu[6];
H8S2XXX_SCI sci[3];
- int tpu_max;
+ int tpu_max;
- UINT8 ddrs[H8_MAX_PORTS], drs[H8_MAX_PORTS], pcrs[H8_MAX_PORTS], odrs[H8_MAX_PORTS];
+ UINT8 ddrs[H8_MAX_PORTS], drs[H8_MAX_PORTS], pcrs[H8_MAX_PORTS], odrs[H8_MAX_PORTS];
int mode_8bit;
- bool has_h8speriphs;
+ bool has_h8speriphs;
};
// defined in h8speriph.c
@@ -95,14 +95,14 @@ INLINE h83xx_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == H83002 ||
- device->type() == H83007 ||
- device->type() == H83044 ||
- device->type() == H83334 ||
- device->type() == H8S2241 ||
- device->type() == H8S2246 ||
- device->type() == H8S2323 ||
- device->type() == H8S2394 ||
- device->type() == H8S2655);
+ device->type() == H83007 ||
+ device->type() == H83044 ||
+ device->type() == H83334 ||
+ device->type() == H8S2241 ||
+ device->type() == H8S2246 ||
+ device->type() == H8S2323 ||
+ device->type() == H8S2394 ||
+ device->type() == H8S2655);
return (h83xx_state *)downcast<legacy_cpu_device *>(device)->token();
}
diff --git a/src/emu/cpu/h83002/h8speriph.c b/src/emu/cpu/h83002/h8speriph.c
index a755972f27c..97cdb25b77d 100644
--- a/src/emu/cpu/h83002/h8speriph.c
+++ b/src/emu/cpu/h83002/h8speriph.c
@@ -95,10 +95,10 @@ const UINT8 H8S_RESET_H8S_IO_2323[0x1C0] = // values from "rej09b0220_h8s2329.pd
0x00, 0xC0, 0x00, 0x00, 0x40, 0xC0, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, // FFF0
};
-#define SCR_TIE 0x80
-#define SCR_RIE 0x40
-#define SCR_TE 0x20
-#define SCR_RE 0x10
+#define SCR_TIE 0x80
+#define SCR_RIE 0x40
+#define SCR_TE 0x20
+#define SCR_RE 0x10
#define SSR_TDRE 0x80
#define SSR_RDRF 0x40
@@ -184,42 +184,42 @@ enum
PIN_PG0, PIN_PG1, PIN_PG2, PIN_PG3, PIN_PG4
};
-#define PIN_TIOCA0 PIN_P10
-#define PIN_TIOCB0 PIN_P11
-#define PIN_TIOCC0 PIN_P12
-#define PIN_TIOCD0 PIN_P13
-#define PIN_TIOCA1 PIN_P14
-#define PIN_TIOCB1 PIN_P15
-#define PIN_TIOCA2 PIN_P16
-#define PIN_TIOCB2 PIN_P17
-
-#define PIN_TCLKA PIN_P12
-#define PIN_TCLKB PIN_P13
-#define PIN_TCLKC PIN_P15
-#define PIN_TCLKD PIN_P17
-
-#define PIN_TXD0 PIN_P30
-#define PIN_TXD1 PIN_P31
-#define PIN_RXD0 PIN_P32
-#define PIN_RXD1 PIN_P33
-#define PIN_SCK0 PIN_P34
-#define PIN_SCK1 PIN_P35
-
-#define PIN_TIOCA3 PIN_P20
-#define PIN_TIOCB3 PIN_P21
-#define PIN_TIOCC3 PIN_P22
-#define PIN_TIOCD3 PIN_P23
-#define PIN_TIOCA4 PIN_P24
-#define PIN_TIOCB4 PIN_P25
-#define PIN_TIOCA5 PIN_P26
-#define PIN_TIOCB5 PIN_P27
-
-#define PIN_TMRI0 PIN_P22
-#define PIN_TMCI0 PIN_P23
-#define PIN_TMRI1 PIN_P24
-#define PIN_TMCI1 PIN_P25
-#define PIN_TMO0 PIN_P26
-#define PIN_TMO1 PIN_P27
+#define PIN_TIOCA0 PIN_P10
+#define PIN_TIOCB0 PIN_P11
+#define PIN_TIOCC0 PIN_P12
+#define PIN_TIOCD0 PIN_P13
+#define PIN_TIOCA1 PIN_P14
+#define PIN_TIOCB1 PIN_P15
+#define PIN_TIOCA2 PIN_P16
+#define PIN_TIOCB2 PIN_P17
+
+#define PIN_TCLKA PIN_P12
+#define PIN_TCLKB PIN_P13
+#define PIN_TCLKC PIN_P15
+#define PIN_TCLKD PIN_P17
+
+#define PIN_TXD0 PIN_P30
+#define PIN_TXD1 PIN_P31
+#define PIN_RXD0 PIN_P32
+#define PIN_RXD1 PIN_P33
+#define PIN_SCK0 PIN_P34
+#define PIN_SCK1 PIN_P35
+
+#define PIN_TIOCA3 PIN_P20
+#define PIN_TIOCB3 PIN_P21
+#define PIN_TIOCC3 PIN_P22
+#define PIN_TIOCD3 PIN_P23
+#define PIN_TIOCA4 PIN_P24
+#define PIN_TIOCB4 PIN_P25
+#define PIN_TIOCA5 PIN_P26
+#define PIN_TIOCB5 PIN_P27
+
+#define PIN_TMRI0 PIN_P22
+#define PIN_TMCI0 PIN_P23
+#define PIN_TMRI1 PIN_P24
+#define PIN_TMCI1 PIN_P25
+#define PIN_TMO0 PIN_P26
+#define PIN_TMO1 PIN_P27
const int TPU_0_DIV[] = { 1, 4, 16, 64, 0, 0, 0,0 };
const int TPU_1_DIV[] = { 1, 4, 16, 64, 0, 0, 256, 0 };
@@ -1319,7 +1319,7 @@ void h8s_onchip_reg_write_8(h83xx_state *h8, int offset, UINT8 data)
case H8S_IO_BRR0 : h8->per_regs[offset] = data; h8s_sci_rate(h8, 0); h8s_sci_start(h8, 0); break;
// SCI 1
case H8S_IO_SSR1 : h8->per_regs[offset] = data; if ((data & H8S_SSR_TDRE) == 0) h8s_sci_execute(h8, 1); break;
- case H8S_IO_SCR1 : h8->per_regs[offset] = data; if (data & H8S_SCR_RIE) h8s2xxx_interrupt_request(h8, h8s_sci_entry(1)->int_rx); break;
+ case H8S_IO_SCR1 : h8->per_regs[offset] = data; if (data & H8S_SCR_RIE) h8s2xxx_interrupt_request(h8, h8s_sci_entry(1)->int_rx); break;
case H8S_IO_BRR1 : h8->per_regs[offset] = data; h8s_sci_rate(h8, 1); h8s_sci_start(h8, 1); break;
// SCI 2
case H8S_IO_SSR2 : h8->per_regs[offset] = data; if ((data & H8S_SSR_TDRE) == 0) h8s_sci_execute(h8, 2); break;
@@ -1390,7 +1390,7 @@ void h8s_onchip_reg_write_8_ddr(h83xx_state *h8, int offset, UINT8 data)
case H8S_IO_BRR0 : h8->per_regs[offset] = data; h8s_sci_rate(h8, 0); h8s_sci_start(h8, 0); break;
// SCI 1
case H8S_IO_SSR1 : h8->per_regs[offset] = data; if ((data & H8S_SSR_TDRE) == 0) h8s_sci_execute(h8, 1); break;
- case H8S_IO_SCR1 : h8->per_regs[offset] = data; if (data & H8S_SCR_RIE) h8s2xxx_interrupt_request(h8, h8s_sci_entry(1)->int_rx); break;
+ case H8S_IO_SCR1 : h8->per_regs[offset] = data; if (data & H8S_SCR_RIE) h8s2xxx_interrupt_request(h8, h8s_sci_entry(1)->int_rx); break;
case H8S_IO_BRR1 : h8->per_regs[offset] = data; h8s_sci_rate(h8, 1); h8s_sci_start(h8, 1); break;
// SCI 2
case H8S_IO_SSR2 : h8->per_regs[offset] = data; if ((data & H8S_SSR_TDRE) == 0) h8s_sci_execute(h8, 2); break;
@@ -1408,28 +1408,28 @@ void h8s_onchip_reg_write_8_ddr(h83xx_state *h8, int offset, UINT8 data)
case H8S_IO_TCORB1 : h8s_tmr_x_write_tcorb( h8, 1, data); break;
case H8S_IO_IER:
- case H8S_IO_IFR:
+ case H8S_IO_IFR:
h8->per_regs[offset] = data;
- break;
+ break;
- case H8S_IO_P1DDR : case H8S_IO_P2DDR : case H8S_IO_P3DDR : case H8S_IO_P5DDR : case H8S_IO_P6DDR :
- case H8S_IO_PADDR : case H8S_IO_PBDDR : case H8S_IO_PCDDR : case H8S_IO_PDDDR : case H8S_IO_PEDDR :
- case H8S_IO_PFDDR : case H8S_IO_PGDDR :
- h8->ddrs[offset - H8S_IO_P1DDR] = data;
- break;
+ case H8S_IO_P1DDR : case H8S_IO_P2DDR : case H8S_IO_P3DDR : case H8S_IO_P5DDR : case H8S_IO_P6DDR :
+ case H8S_IO_PADDR : case H8S_IO_PBDDR : case H8S_IO_PCDDR : case H8S_IO_PDDDR : case H8S_IO_PEDDR :
+ case H8S_IO_PFDDR : case H8S_IO_PGDDR :
+ h8->ddrs[offset - H8S_IO_P1DDR] = data;
+ break;
case H8S_IO_P1DR : case H8S_IO_P2DR : case H8S_IO_P3DR : case H8S_IO_P5DR : case H8S_IO_P6DR :
case H8S_IO_PADR : case H8S_IO_PBDR : case H8S_IO_PCDR : case H8S_IO_PDDR : case H8S_IO_PEDR :
- case H8S_IO_PFDR : case H8S_IO_PGDR :
- {
- int port = (offset - H8S_IO_P1DR);
- h8->drs[port] = data;
- h8->io->write_byte(H8_PORT_1 + port, data & h8->ddrs[port]);
- }
- break;
+ case H8S_IO_PFDR : case H8S_IO_PGDR :
+ {
+ int port = (offset - H8S_IO_P1DR);
+ h8->drs[port] = data;
+ h8->io->write_byte(H8_PORT_1 + port, data & h8->ddrs[port]);
+ }
+ break;
// ...
- // TPU
+ // TPU
case H8S_IO_TSTR : h8s_tpu_write_tstr( h8, data); break;
// DMA
case H8S_IO_DMABCRL :
@@ -1532,9 +1532,9 @@ UINT8 h8s_onchip_reg_read_8(h83xx_state *h8, int offset)
case H8S_IO_PORTA : case H8S_IO_PORTB : case H8S_IO_PORTC : case H8S_IO_PORTD : case H8S_IO_PORTE :
case H8S_IO_PORTF : data = h8->io->read_byte( H8S_IO_ADDR( offset)); break;
// ...
- case H8S_IO_P1DR : case H8S_IO_P2DR : case H8S_IO_P3DR : case H8S_IO_P4DR : case H8S_IO_P5DR :
- case H8S_IO_PADR : case H8S_IO_PBDR : case H8S_IO_PCDR : case H8S_IO_PDDR : case H8S_IO_PEDR :
- case H8S_IO_PFDR : case H8S_IO_PGDR : data = h8->io->read_byte( H8S_IO_ADDR( offset)); break;
+ case H8S_IO_P1DR : case H8S_IO_P2DR : case H8S_IO_P3DR : case H8S_IO_P4DR : case H8S_IO_P5DR :
+ case H8S_IO_PADR : case H8S_IO_PBDR : case H8S_IO_PCDR : case H8S_IO_PDDR : case H8S_IO_PEDR :
+ case H8S_IO_PFDR : case H8S_IO_PGDR : data = h8->io->read_byte( H8S_IO_ADDR( offset)); break;
// TMR 0
case H8S_IO_TCNT0 : data = h8s_tmr_x_read_tcnt( h8, 0); break;
// TMR 1
@@ -1552,7 +1552,7 @@ UINT8 h8s_onchip_reg_read_8_ddr(h83xx_state *h8, int offset)
UINT8 data;
switch (offset)
{
- #if 0
+ #if 0
// SCI 0
case H8S_IO_SSR0 : data = H8S_SSR_TDRE | H8S_SSR_TEND; break;
case H8S_IO_RDR0 : data = h8->io->read_byte( H8S_IO_ADDR( offset)); break;
@@ -1565,38 +1565,38 @@ UINT8 h8s_onchip_reg_read_8_ddr(h83xx_state *h8, int offset)
if (!(h8->per_regs[H8S_IO_SCR2] & H8S_SCR_TE)) data |= H8S_SSR_TDRE;
}
break;
- #endif
-
- case H8S_IO_IFR:
- data = h8->per_regs[offset];
- break;
-
- // ports
- case H8S_IO_PORT1 : case H8S_IO_PORT2 : case H8S_IO_PORT3 : case H8S_IO_PORT4 : case H8S_IO_PORT5 : case H8S_IO_PORT6 :
- case H8S_IO_PORTA : case H8S_IO_PORTB : case H8S_IO_PORTC : case H8S_IO_PORTD : case H8S_IO_PORTE : case H8S_IO_PORTF :
- case H8S_IO_PORTG :
- {
- int port = (offset - H8S_IO_PORT1);
- data = h8->drs[port] & h8->ddrs[port]; // result = data register for DDR "1" bits, live read for DDR "0" bits
- data |= (h8->io->read_byte(H8_PORT_1 + port) & (h8->ddrs[port] ^ 0xff));
- }
- break;
+ #endif
+
+ case H8S_IO_IFR:
+ data = h8->per_regs[offset];
+ break;
+
+ // ports
+ case H8S_IO_PORT1 : case H8S_IO_PORT2 : case H8S_IO_PORT3 : case H8S_IO_PORT4 : case H8S_IO_PORT5 : case H8S_IO_PORT6 :
+ case H8S_IO_PORTA : case H8S_IO_PORTB : case H8S_IO_PORTC : case H8S_IO_PORTD : case H8S_IO_PORTE : case H8S_IO_PORTF :
+ case H8S_IO_PORTG :
+ {
+ int port = (offset - H8S_IO_PORT1);
+ data = h8->drs[port] & h8->ddrs[port]; // result = data register for DDR "1" bits, live read for DDR "0" bits
+ data |= (h8->io->read_byte(H8_PORT_1 + port) & (h8->ddrs[port] ^ 0xff));
+ }
+ break;
// the manual is ambivalent, but the invqix code very much implies that reading DR also reads the pin states
- case H8S_IO_P1DR : case H8S_IO_P2DR : case H8S_IO_P3DR : case H8S_IO_P5DR : case H8S_IO_P6DR :
- case H8S_IO_PADR : case H8S_IO_PBDR : case H8S_IO_PCDR : case H8S_IO_PDDR : case H8S_IO_PEDR :
- case H8S_IO_PFDR : case H8S_IO_PGDR :
- {
- int port = (offset - H8S_IO_P1DR);
- data = h8->drs[port] & h8->ddrs[port];
- data |= (h8->io->read_byte(H8_PORT_1 + port) & (h8->ddrs[port] ^ 0xff));
- }
- break;
+ case H8S_IO_P1DR : case H8S_IO_P2DR : case H8S_IO_P3DR : case H8S_IO_P5DR : case H8S_IO_P6DR :
+ case H8S_IO_PADR : case H8S_IO_PBDR : case H8S_IO_PCDR : case H8S_IO_PDDR : case H8S_IO_PEDR :
+ case H8S_IO_PFDR : case H8S_IO_PGDR :
+ {
+ int port = (offset - H8S_IO_P1DR);
+ data = h8->drs[port] & h8->ddrs[port];
+ data |= (h8->io->read_byte(H8_PORT_1 + port) & (h8->ddrs[port] ^ 0xff));
+ }
+ break;
// ADCSR
- case H8S_IO_ADCSR: data = ADCSR_ADF; break;
+ case H8S_IO_ADCSR: data = ADCSR_ADF; break;
- // TMR 0
+ // TMR 0
case H8S_IO_TCNT0 : data = h8s_tmr_x_read_tcnt( h8, 0); break;
// TMR 1
case H8S_IO_TCNT1 : data = h8s_tmr_x_read_tcnt( h8, 1); break;
@@ -1741,4 +1741,3 @@ UINT16 h8s2655_per_regs_read_16(h83xx_state *h8, int offset)
{
return h8s_onchip_reg_read_16(h8, offset);
}
-
diff --git a/src/emu/cpu/hcd62121/hcd62121.c b/src/emu/cpu/hcd62121/hcd62121.c
index 7191d28f523..d579f560fea 100644
--- a/src/emu/cpu/hcd62121/hcd62121.c
+++ b/src/emu/cpu/hcd62121/hcd62121.c
@@ -39,17 +39,17 @@ struct hcd62121_state
/* From the battery check routine at 20:e874 it looks like
bit 3 of the flag register should be the Zero flag. */
-#define _FLAG_Z 0x08
-#define _FLAG_C 0x02
-#define _FLAG_ZL 0x04
-#define _FLAG_CL 0x01
-#define _FLAG_ZH 0x10
+#define _FLAG_Z 0x08
+#define _FLAG_C 0x02
+#define _FLAG_ZL 0x04
+#define _FLAG_CL 0x01
+#define _FLAG_ZH 0x10
-#define mem_readbyte(cs,A) ((UINT8)(cs)->program->read_byte(A))
-#define mem_writebyte(cs,A,V) ((cs)->program->write_byte(A,V))
-#define io_readbyte(cs,A) ((UINT8)(cs)->io->read_byte(A))
-#define io_writebyte(cs,A,V) ((cs)->io->write_byte(A,V))
+#define mem_readbyte(cs,A) ((UINT8)(cs)->program->read_byte(A))
+#define mem_writebyte(cs,A,V) ((cs)->program->write_byte(A,V))
+#define io_readbyte(cs,A) ((UINT8)(cs)->io->read_byte(A))
+#define io_writebyte(cs,A,V) ((cs)->io->write_byte(A,V))
INLINE UINT8 read_op(hcd62121_state *cpustate)
@@ -257,42 +257,42 @@ INLINE int check_cond( hcd62121_state *cpustate, UINT8 op )
{
switch ( op & 0x07 )
{
- case 0x00: /* ZH set */
+ case 0x00: /* ZH set */
if ( cpustate->f & _FLAG_ZH )
return 1;
break;
- case 0x01: /* ZL set */
+ case 0x01: /* ZL set */
if ( cpustate->f & _FLAG_ZL )
return 1;
break;
- case 0x02: /* C set */
+ case 0x02: /* C set */
if ( cpustate->f & _FLAG_C )
return 1;
break;
- case 0x03: /* Z set */
+ case 0x03: /* Z set */
if ( cpustate->f & _FLAG_Z )
return 1;
break;
- case 0x04: /* Z or C set */
+ case 0x04: /* Z or C set */
if ( cpustate->f & ( _FLAG_Z | _FLAG_C ) )
return 1;
break;
- case 0x05: /* CL set */
+ case 0x05: /* CL set */
if ( cpustate->f & _FLAG_CL )
return 1;
break;
- case 0x06: /* C clear */
+ case 0x06: /* C clear */
if ( ! ( cpustate->f & _FLAG_C ) )
return 1;
break;
- case 0x07: /* Z clear */
+ case 0x07: /* Z clear */
if ( ! ( cpustate->f & _FLAG_Z ) )
return 1;
break;
@@ -377,16 +377,16 @@ static CPU_SET_INFO( hcd62121 )
case CPUINFO_INT_INPUT_STATE + 1:
break;
- case CPUINFO_INT_SP: cpustate->sp = info->i; break;
- case CPUINFO_INT_PC: cpustate->ip = info->i; break;
+ case CPUINFO_INT_SP: cpustate->sp = info->i; break;
+ case CPUINFO_INT_PC: cpustate->ip = info->i; break;
- case CPUINFO_INT_REGISTER + HCD62121_IP: cpustate->ip = info->i; break;
- case CPUINFO_INT_REGISTER + HCD62121_SP: cpustate->sp = info->i; break;
- case CPUINFO_INT_REGISTER + HCD62121_LAR: cpustate->lar = info->i; break;
- case CPUINFO_INT_REGISTER + HCD62121_CS: cpustate->cseg = info->i; break;
- case CPUINFO_INT_REGISTER + HCD62121_DS: cpustate->dseg = info->i; break;
- case CPUINFO_INT_REGISTER + HCD62121_SS: cpustate->sseg = info->i; break;
- case CPUINFO_INT_REGISTER + HCD62121_DSIZE: cpustate->dsize = info->i; break;
+ case CPUINFO_INT_REGISTER + HCD62121_IP: cpustate->ip = info->i; break;
+ case CPUINFO_INT_REGISTER + HCD62121_SP: cpustate->sp = info->i; break;
+ case CPUINFO_INT_REGISTER + HCD62121_LAR: cpustate->lar = info->i; break;
+ case CPUINFO_INT_REGISTER + HCD62121_CS: cpustate->cseg = info->i; break;
+ case CPUINFO_INT_REGISTER + HCD62121_DS: cpustate->dseg = info->i; break;
+ case CPUINFO_INT_REGISTER + HCD62121_SS: cpustate->sseg = info->i; break;
+ case CPUINFO_INT_REGISTER + HCD62121_DSIZE: cpustate->dsize = info->i; break;
// case CPUINFO_INT_REGISTER + HCD62121_R00: break;
// case CPUINFO_INT_REGISTER + HCD62121_R02: break;
}
@@ -400,59 +400,59 @@ CPU_GET_INFO( hcd62121 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(hcd62121_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 18; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 4; /* right? */ break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 48; /* right? */ break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_SP: info->i = cpustate->sp; break;
- case CPUINFO_INT_PC: info->i = ( cpustate->cseg << 16 ) | cpustate->ip; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prev_pc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(hcd62121_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 18; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 4; /* right? */ break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 48; /* right? */ break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_SP: info->i = cpustate->sp; break;
+ case CPUINFO_INT_PC: info->i = ( cpustate->cseg << 16 ) | cpustate->ip; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prev_pc; break;
case CPUINFO_INT_INPUT_STATE + 0:
case CPUINFO_INT_INPUT_STATE + 1:
- /* TODO */ break;
-
- case CPUINFO_INT_REGISTER + HCD62121_IP: info->i = cpustate->ip; break;
- case CPUINFO_INT_REGISTER + HCD62121_SP: info->i = cpustate->sp; break;
- case CPUINFO_INT_REGISTER + HCD62121_LAR: info->i = cpustate->lar; break;
- case CPUINFO_INT_REGISTER + HCD62121_CS: info->i = cpustate->cseg; break;
- case CPUINFO_INT_REGISTER + HCD62121_DS: info->i = cpustate->dseg; break;
- case CPUINFO_INT_REGISTER + HCD62121_SS: info->i = cpustate->sseg; break;
- case CPUINFO_INT_REGISTER + HCD62121_DSIZE: info->i = cpustate->dsize; break;
- case CPUINFO_INT_REGISTER + HCD62121_R00: info->i = ( cpustate->reg[0x00] << 24 ) | ( cpustate->reg[0x01] << 16 ) | ( cpustate->reg[0x02] << 8 ) | cpustate->reg[0x03]; break;
+ /* TODO */ break;
+
+ case CPUINFO_INT_REGISTER + HCD62121_IP: info->i = cpustate->ip; break;
+ case CPUINFO_INT_REGISTER + HCD62121_SP: info->i = cpustate->sp; break;
+ case CPUINFO_INT_REGISTER + HCD62121_LAR: info->i = cpustate->lar; break;
+ case CPUINFO_INT_REGISTER + HCD62121_CS: info->i = cpustate->cseg; break;
+ case CPUINFO_INT_REGISTER + HCD62121_DS: info->i = cpustate->dseg; break;
+ case CPUINFO_INT_REGISTER + HCD62121_SS: info->i = cpustate->sseg; break;
+ case CPUINFO_INT_REGISTER + HCD62121_DSIZE: info->i = cpustate->dsize; break;
+ case CPUINFO_INT_REGISTER + HCD62121_R00: info->i = ( cpustate->reg[0x00] << 24 ) | ( cpustate->reg[0x01] << 16 ) | ( cpustate->reg[0x02] << 8 ) | cpustate->reg[0x03]; break;
// case CPUINFO_INT_REGISTER + HCD62121_R02: info->i = cpustate->; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hcd62121); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hcd62121); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(hcd62121); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(hcd62121); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hcd62121); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hcd62121); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hcd62121); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(hcd62121); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(hcd62121); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hcd62121); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "HCD62121"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi HCD62121"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright The MESS Team."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "HCD62121"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi HCD62121"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright The MESS Team."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%s-%s-%s-%c-%c",
@@ -507,4 +507,3 @@ CPU_GET_INFO( hcd62121 )
}
DEFINE_LEGACY_CPU_DEVICE(HCD62121, hcd62121);
-
diff --git a/src/emu/cpu/hcd62121/hcd62121.h b/src/emu/cpu/hcd62121/hcd62121.h
index 3301dda59c6..43189d20622 100644
--- a/src/emu/cpu/hcd62121/hcd62121.h
+++ b/src/emu/cpu/hcd62121/hcd62121.h
@@ -37,4 +37,3 @@ DECLARE_LEGACY_CPU_DEVICE(HCD62121, hcd62121);
extern CPU_DISASSEMBLE( hcd62121 );
#endif /* __HCD62121_H__ */
-
diff --git a/src/emu/cpu/hcd62121/hcd62121_ops.h b/src/emu/cpu/hcd62121/hcd62121_ops.h
index 9eaf6386a9b..d4ded8f29f2 100644
--- a/src/emu/cpu/hcd62121/hcd62121_ops.h
+++ b/src/emu/cpu/hcd62121/hcd62121_ops.h
@@ -1,291 +1,291 @@
-#define HCD62121_MSK \
- { \
- int i; \
- UINT8 mskres = 1; \
+#define HCD62121_MSK \
+ { \
+ int i; \
+ UINT8 mskres = 1; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- if ( ( cpustate->temp1[i] & cpustate->temp2[i] ) != cpustate->temp2[i] ) \
- mskres = 0; \
- } \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ if ( ( cpustate->temp1[i] & cpustate->temp2[i] ) != cpustate->temp2[i] ) \
+ mskres = 0; \
+ } \
\
- if ( mskres ) \
- cpustate->f &= ~_FLAG_Z; \
- else \
- cpustate->f |= _FLAG_Z; \
+ if ( mskres ) \
+ cpustate->f &= ~_FLAG_Z; \
+ else \
+ cpustate->f |= _FLAG_Z; \
}
-#define HCD62121_IMSK \
- { \
- int i; \
- UINT8 mskres = 1; \
- UINT8 set_zero = 0; \
+#define HCD62121_IMSK \
+ { \
+ int i; \
+ UINT8 mskres = 1; \
+ UINT8 set_zero = 0; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- if ( ( cpustate->temp1[i] & ~cpustate->temp2[i] ) != ~cpustate->temp2[i] ) \
- mskres = 0; \
- if ( cpustate->temp1[i] | cpustate->temp2[i] ) \
- set_zero = 1; \
- } \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ if ( ( cpustate->temp1[i] & ~cpustate->temp2[i] ) != ~cpustate->temp2[i] ) \
+ mskres = 0; \
+ if ( cpustate->temp1[i] | cpustate->temp2[i] ) \
+ set_zero = 1; \
+ } \
\
- if ( set_zero ) \
- cpustate->f |= _FLAG_Z; \
- else \
- cpustate->f &= ~_FLAG_Z; \
+ if ( set_zero ) \
+ cpustate->f |= _FLAG_Z; \
+ else \
+ cpustate->f &= ~_FLAG_Z; \
\
- if ( mskres ) \
- cpustate->f &= ~_FLAG_C; \
- else \
- cpustate->f |= _FLAG_C; \
+ if ( mskres ) \
+ cpustate->f &= ~_FLAG_C; \
+ else \
+ cpustate->f |= _FLAG_C; \
}
-#define HCD62121_AND \
- { \
- int i; \
- UINT8 is_zero = 1; \
+#define HCD62121_AND \
+ { \
+ int i; \
+ UINT8 is_zero = 1; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- cpustate->temp1[i] = cpustate->temp1[i] & cpustate->temp2[i]; \
- if ( cpustate->temp1[i] ) \
- is_zero = 0; \
- } \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ cpustate->temp1[i] = cpustate->temp1[i] & cpustate->temp2[i]; \
+ if ( cpustate->temp1[i] ) \
+ is_zero = 0; \
+ } \
\
- if ( is_zero ) \
- cpustate->f |= _FLAG_Z; \
- else \
- cpustate->f &= ~_FLAG_Z; \
+ if ( is_zero ) \
+ cpustate->f |= _FLAG_Z; \
+ else \
+ cpustate->f &= ~_FLAG_Z; \
\
- if ( cpustate->temp1[0] & 0x0f ) \
- cpustate->f &= ~_FLAG_ZL; \
- else \
- cpustate->f |= _FLAG_ZL; \
+ if ( cpustate->temp1[0] & 0x0f ) \
+ cpustate->f &= ~_FLAG_ZL; \
+ else \
+ cpustate->f |= _FLAG_ZL; \
\
- if ( cpustate->temp1[0] & 0xf0 ) \
- cpustate->f &= ~_FLAG_ZH; \
- else \
- cpustate->f |= _FLAG_ZH; \
+ if ( cpustate->temp1[0] & 0xf0 ) \
+ cpustate->f &= ~_FLAG_ZH; \
+ else \
+ cpustate->f |= _FLAG_ZH; \
}
-#define HCD62121_OR \
- { \
- int i; \
- UINT8 is_zero = 1; \
+#define HCD62121_OR \
+ { \
+ int i; \
+ UINT8 is_zero = 1; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- cpustate->temp1[i] = cpustate->temp1[i] | cpustate->temp2[i]; \
- if ( cpustate->temp1[i] ) \
- is_zero = 0; \
- } \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ cpustate->temp1[i] = cpustate->temp1[i] | cpustate->temp2[i]; \
+ if ( cpustate->temp1[i] ) \
+ is_zero = 0; \
+ } \
\
- if ( is_zero ) \
- cpustate->f |= _FLAG_Z; \
- else \
- cpustate->f &= ~_FLAG_Z; \
+ if ( is_zero ) \
+ cpustate->f |= _FLAG_Z; \
+ else \
+ cpustate->f &= ~_FLAG_Z; \
\
- if ( cpustate->temp1[0] & 0x0f ) \
- cpustate->f &= ~_FLAG_ZL; \
- else \
- cpustate->f |= _FLAG_ZL; \
+ if ( cpustate->temp1[0] & 0x0f ) \
+ cpustate->f &= ~_FLAG_ZL; \
+ else \
+ cpustate->f |= _FLAG_ZL; \
\
- if ( cpustate->temp1[0] & 0xf0 ) \
- cpustate->f &= ~_FLAG_ZH; \
- else \
- cpustate->f |= _FLAG_ZH; \
+ if ( cpustate->temp1[0] & 0xf0 ) \
+ cpustate->f &= ~_FLAG_ZH; \
+ else \
+ cpustate->f |= _FLAG_ZH; \
}
-#define HCD62121_XOR \
- { \
- int i; \
- UINT8 is_zero = 1; \
+#define HCD62121_XOR \
+ { \
+ int i; \
+ UINT8 is_zero = 1; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- cpustate->temp1[i] = cpustate->temp1[i] ^ cpustate->temp2[i]; \
- if ( cpustate->temp1[i] ) \
- is_zero = 0; \
- } \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ cpustate->temp1[i] = cpustate->temp1[i] ^ cpustate->temp2[i]; \
+ if ( cpustate->temp1[i] ) \
+ is_zero = 0; \
+ } \
\
- if ( is_zero ) \
- cpustate->f |= _FLAG_Z; \
- else \
- cpustate->f &= ~_FLAG_Z; \
+ if ( is_zero ) \
+ cpustate->f |= _FLAG_Z; \
+ else \
+ cpustate->f &= ~_FLAG_Z; \
\
- if ( cpustate->temp1[0] & 0x0f ) \
- cpustate->f &= ~_FLAG_ZL; \
- else \
- cpustate->f |= _FLAG_ZL; \
+ if ( cpustate->temp1[0] & 0x0f ) \
+ cpustate->f &= ~_FLAG_ZL; \
+ else \
+ cpustate->f |= _FLAG_ZL; \
\
- if ( cpustate->temp1[0] & 0xf0 ) \
- cpustate->f &= ~_FLAG_ZH; \
- else \
- cpustate->f |= _FLAG_ZH; \
+ if ( cpustate->temp1[0] & 0xf0 ) \
+ cpustate->f &= ~_FLAG_ZH; \
+ else \
+ cpustate->f |= _FLAG_ZH; \
}
-#define HCD62121_ADD \
- { \
- int i; \
- UINT8 is_zero = 1, carry = 0; \
+#define HCD62121_ADD \
+ { \
+ int i; \
+ UINT8 is_zero = 1, carry = 0; \
\
- if ( ( cpustate->temp1[0] & 0x0f ) + ( cpustate->temp2[0] & 0x0f ) > 15 ) \
- cpustate->f |= _FLAG_CL; \
- else \
- cpustate->f &= ~_FLAG_CL; \
+ if ( ( cpustate->temp1[0] & 0x0f ) + ( cpustate->temp2[0] & 0x0f ) > 15 ) \
+ cpustate->f |= _FLAG_CL; \
+ else \
+ cpustate->f &= ~_FLAG_CL; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- UINT16 res = cpustate->temp1[i] + cpustate->temp2[i] + carry; \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ UINT16 res = cpustate->temp1[i] + cpustate->temp2[i] + carry; \
\
- cpustate->temp1[i] = res & 0xff; \
- if ( cpustate->temp1[i] ) \
- is_zero = 0; \
+ cpustate->temp1[i] = res & 0xff; \
+ if ( cpustate->temp1[i] ) \
+ is_zero = 0; \
\
- carry = ( res & 0xff00 ) ? 1 : 0; \
- } \
+ carry = ( res & 0xff00 ) ? 1 : 0; \
+ } \
\
- if ( is_zero ) \
- cpustate->f |= _FLAG_Z; \
- else \
- cpustate->f &= ~_FLAG_Z; \
+ if ( is_zero ) \
+ cpustate->f |= _FLAG_Z; \
+ else \
+ cpustate->f &= ~_FLAG_Z; \
\
- if ( carry ) \
- cpustate->f |= _FLAG_C; \
- else \
- cpustate->f &= ~_FLAG_C; \
+ if ( carry ) \
+ cpustate->f |= _FLAG_C; \
+ else \
+ cpustate->f &= ~_FLAG_C; \
\
- if ( cpustate->temp1[0] & 0x0f ) \
- cpustate->f &= ~_FLAG_ZL; \
- else \
- cpustate->f |= _FLAG_ZL; \
+ if ( cpustate->temp1[0] & 0x0f ) \
+ cpustate->f &= ~_FLAG_ZL; \
+ else \
+ cpustate->f |= _FLAG_ZL; \
\
- if ( cpustate->temp1[0] & 0xf0 ) \
- cpustate->f &= ~_FLAG_ZH; \
- else \
- cpustate->f |= _FLAG_ZH; \
+ if ( cpustate->temp1[0] & 0xf0 ) \
+ cpustate->f &= ~_FLAG_ZH; \
+ else \
+ cpustate->f |= _FLAG_ZH; \
}
/* BCD ADD */
-#define HCD62121_ADDB \
- { \
- int i; \
- UINT8 is_zero = 1, carry = 0; \
+#define HCD62121_ADDB \
+ { \
+ int i; \
+ UINT8 is_zero = 1, carry = 0; \
\
- if ( ( cpustate->temp1[0] & 0x0f ) + ( cpustate->temp2[0] & 0x0f ) > 9 ) \
- cpustate->f |= _FLAG_CL; \
- else \
- cpustate->f &= ~_FLAG_CL; \
+ if ( ( cpustate->temp1[0] & 0x0f ) + ( cpustate->temp2[0] & 0x0f ) > 9 ) \
+ cpustate->f |= _FLAG_CL; \
+ else \
+ cpustate->f &= ~_FLAG_CL; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- UINT16 res = ( cpustate->temp1[i] & 0x0f ) + ( cpustate->temp2[i] & 0x0f ) + carry; \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ UINT16 res = ( cpustate->temp1[i] & 0x0f ) + ( cpustate->temp2[i] & 0x0f ) + carry; \
\
- carry = 0; \
- if ( res > 9 ) \
- { \
- res += 6; \
- } \
- res += ( cpustate->temp1[i] & 0xf0 ) + ( cpustate->temp2[i] & 0xf0 ); \
- if ( res > 0x9f ) \
- { \
- res += 0x60; \
- } \
- cpustate->temp1[i] = res & 0xff; \
- if ( cpustate->temp1[i] ) \
- is_zero = 0; \
+ carry = 0; \
+ if ( res > 9 ) \
+ { \
+ res += 6; \
+ } \
+ res += ( cpustate->temp1[i] & 0xf0 ) + ( cpustate->temp2[i] & 0xf0 ); \
+ if ( res > 0x9f ) \
+ { \
+ res += 0x60; \
+ } \
+ cpustate->temp1[i] = res & 0xff; \
+ if ( cpustate->temp1[i] ) \
+ is_zero = 0; \
\
- carry = ( res & 0xff00 ) ? 1 : 0; \
- } \
+ carry = ( res & 0xff00 ) ? 1 : 0; \
+ } \
\
- if ( is_zero ) \
- cpustate->f |= _FLAG_Z; \
- else \
- cpustate->f &= ~_FLAG_Z; \
+ if ( is_zero ) \
+ cpustate->f |= _FLAG_Z; \
+ else \
+ cpustate->f &= ~_FLAG_Z; \
\
- if ( carry ) \
- cpustate->f |= _FLAG_C; \
- else \
- cpustate->f &= ~_FLAG_C; \
+ if ( carry ) \
+ cpustate->f |= _FLAG_C; \
+ else \
+ cpustate->f &= ~_FLAG_C; \
\
- if ( cpustate->temp1[0] & 0x0f ) \
- cpustate->f &= ~_FLAG_ZL; \
- else \
- cpustate->f |= _FLAG_ZL; \
+ if ( cpustate->temp1[0] & 0x0f ) \
+ cpustate->f &= ~_FLAG_ZL; \
+ else \
+ cpustate->f |= _FLAG_ZL; \
\
- if ( cpustate->temp1[0] & 0xf0 ) \
- cpustate->f &= ~_FLAG_ZH; \
- else \
- cpustate->f |= _FLAG_ZH; \
+ if ( cpustate->temp1[0] & 0xf0 ) \
+ cpustate->f &= ~_FLAG_ZH; \
+ else \
+ cpustate->f |= _FLAG_ZH; \
}
-#define HCD62121_SUB \
- { \
- int i; \
- UINT8 is_zero = 1, carry = 0; \
+#define HCD62121_SUB \
+ { \
+ int i; \
+ UINT8 is_zero = 1, carry = 0; \
\
- if ( ( cpustate->temp1[0] & 0x0f ) < ( cpustate->temp2[0] & 0x0f ) ) \
- cpustate->f |= _FLAG_CL; \
- else \
- cpustate->f &= ~_FLAG_CL; \
+ if ( ( cpustate->temp1[0] & 0x0f ) < ( cpustate->temp2[0] & 0x0f ) ) \
+ cpustate->f |= _FLAG_CL; \
+ else \
+ cpustate->f &= ~_FLAG_CL; \
\
- for ( i = 0; i < size; i++ ) \
- { \
- UINT16 res = cpustate->temp1[i] - cpustate->temp2[i] - carry; \
+ for ( i = 0; i < size; i++ ) \
+ { \
+ UINT16 res = cpustate->temp1[i] - cpustate->temp2[i] - carry; \
\
- cpustate->temp1[i] = res & 0xff; \
- if ( cpustate->temp1[i] ) \
- is_zero = 0; \
+ cpustate->temp1[i] = res & 0xff; \
+ if ( cpustate->temp1[i] ) \
+ is_zero = 0; \
\
- carry = ( res & 0xff00 ) ? 1 : 0; \
- } \
+ carry = ( res & 0xff00 ) ? 1 : 0; \
+ } \
\
- if ( is_zero ) \
- cpustate->f |= _FLAG_Z; \
- else \
- cpustate->f &= ~_FLAG_Z; \
+ if ( is_zero ) \
+ cpustate->f |= _FLAG_Z; \
+ else \
+ cpustate->f &= ~_FLAG_Z; \
\
- if ( carry ) \
- cpustate->f |= _FLAG_C; \
- else \
- cpustate->f &= ~_FLAG_C; \
+ if ( carry ) \
+ cpustate->f |= _FLAG_C; \
+ else \
+ cpustate->f &= ~_FLAG_C; \
\
- if ( cpustate->temp1[0] & 0x0f ) \
- cpustate->f &= ~_FLAG_ZL; \
- else \
- cpustate->f |= _FLAG_ZL; \
+ if ( cpustate->temp1[0] & 0x0f ) \
+ cpustate->f &= ~_FLAG_ZL; \
+ else \
+ cpustate->f |= _FLAG_ZL; \
\
- if ( cpustate->temp1[0] & 0xf0 ) \
- cpustate->f &= ~_FLAG_ZH; \
- else \
- cpustate->f |= _FLAG_ZH; \
+ if ( cpustate->temp1[0] & 0xf0 ) \
+ cpustate->f &= ~_FLAG_ZH; \
+ else \
+ cpustate->f |= _FLAG_ZH; \
}
-#define HCD62121_PUSHW(source) \
- { \
- UINT16 address = source; \
- mem_writebyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp, ( address ) & 0xff ); \
- cpustate->sp--; \
- mem_writebyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp, ( address ) >> 8 ); \
- cpustate->sp--; \
+#define HCD62121_PUSHW(source) \
+ { \
+ UINT16 address = source; \
+ mem_writebyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp, ( address ) & 0xff ); \
+ cpustate->sp--; \
+ mem_writebyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp, ( address ) >> 8 ); \
+ cpustate->sp--; \
}
-#define HCD62121_POPW(dest) \
- { \
- UINT16 res; \
- cpustate->sp++; \
- res = mem_readbyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp ) << 8; \
- cpustate->sp++; \
- res |= mem_readbyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp ); \
- dest = res; \
+#define HCD62121_POPW(dest) \
+ { \
+ UINT16 res; \
+ cpustate->sp++; \
+ res = mem_readbyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp ) << 8; \
+ cpustate->sp++; \
+ res |= mem_readbyte( cpustate, ( cpustate->sseg << 16 ) | cpustate->sp ); \
+ dest = res; \
}
-case 0x04: /* mskb r1,r2 */
-case 0x05: /* mskw r1,r2 */
-case 0x06: /* mskq r1,r2 */
-case 0x07: /* mskt r1,r2 */
+case 0x04: /* mskb r1,r2 */
+case 0x05: /* mskw r1,r2 */
+case 0x06: /* mskq r1,r2 */
+case 0x07: /* mskt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -297,10 +297,10 @@ case 0x07: /* mskt r1,r2 */
}
break;
-case 0x08: /* shb r1,4 */
-case 0x09: /* shw r1,4 */
-case 0x0A: /* shq r1,4 */
-case 0x0B: /* sht r1,4 */
+case 0x08: /* shb r1,4 */
+case 0x09: /* shw r1,4 */
+case 0x0A: /* shq r1,4 */
+case 0x0B: /* sht r1,4 */
/* Shift is a nibble shift! */
{
int i;
@@ -329,10 +329,10 @@ case 0x0B: /* sht r1,4 */
}
break;
-case 0x0C: /* testb r1,r2 */
-case 0x0D: /* testw r1,r2 */
-case 0x0E: /* testq r1,r2 */
-case 0x0F: /* testt r1,r2 */
+case 0x0C: /* testb r1,r2 */
+case 0x0D: /* testw r1,r2 */
+case 0x0E: /* testq r1,r2 */
+case 0x0F: /* testt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -344,10 +344,10 @@ case 0x0F: /* testt r1,r2 */
}
break;
-case 0x10: /* xorb r1,r2 */
-case 0x11: /* xorw r1,r2 */
-case 0x12: /* xorq r1,r2 */
-case 0x13: /* xort r1,r2 */
+case 0x10: /* xorb r1,r2 */
+case 0x11: /* xorw r1,r2 */
+case 0x12: /* xorq r1,r2 */
+case 0x13: /* xort r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -361,10 +361,10 @@ case 0x13: /* xort r1,r2 */
}
break;
-case 0x14: /* cmpb r1,r2 */
-case 0x15: /* cmpw r1,r2 */
-case 0x16: /* cmpq r1,r2 */
-case 0x17: /* cmpt r1,r2 */
+case 0x14: /* cmpb r1,r2 */
+case 0x15: /* cmpw r1,r2 */
+case 0x16: /* cmpq r1,r2 */
+case 0x17: /* cmpt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -376,10 +376,10 @@ case 0x17: /* cmpt r1,r2 */
}
break;
-case 0x18: /* movb r1,r2 */
-case 0x19: /* movw r1,r2 */
-case 0x1A: /* movq r1,r2 */
-case 0x1B: /* movt r1,r2 */
+case 0x18: /* movb r1,r2 */
+case 0x19: /* movw r1,r2 */
+case 0x1A: /* movq r1,r2 */
+case 0x1B: /* movt r1,r2 */
{
int i;
int size = datasize( cpustate, op );
@@ -395,10 +395,10 @@ case 0x1B: /* movt r1,r2 */
}
break;
-case 0x1C: /* imskb r1,r2 */
-case 0x1D: /* imskw r1,r2 */
-case 0x1E: /* imskq r1,r2 */
-case 0x1F: /* imskt r1,r2 */
+case 0x1C: /* imskb r1,r2 */
+case 0x1D: /* imskw r1,r2 */
+case 0x1E: /* imskq r1,r2 */
+case 0x1F: /* imskt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -410,10 +410,10 @@ case 0x1F: /* imskt r1,r2 */
}
break;
-case 0x20: /* shrb r1 */
-case 0x21: /* shrw r1 */
-case 0x22: /* shrq r1 */
-case 0x23: /* shrt r1 */
+case 0x20: /* shrb r1 */
+case 0x21: /* shrw r1 */
+case 0x22: /* shrq r1 */
+case 0x23: /* shrt r1 */
/* Shift is a single shift! */
{
int i;
@@ -434,10 +434,10 @@ case 0x23: /* shrt r1 */
}
break;
-case 0x24: /* orb r1,r2 */
-case 0x25: /* orw r1,r2 */
-case 0x26: /* orq r1,r2 */
-case 0x27: /* ort r1,r2 */
+case 0x24: /* orb r1,r2 */
+case 0x25: /* orw r1,r2 */
+case 0x26: /* orq r1,r2 */
+case 0x27: /* ort r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -451,10 +451,10 @@ case 0x27: /* ort r1,r2 */
}
break;
-case 0x28: /* shlb r1 */
-case 0x29: /* shlw r1 */
-case 0x2A: /* shlq r1 */
-case 0x2B: /* shlt r1 */
+case 0x28: /* shlb r1 */
+case 0x29: /* shlw r1 */
+case 0x2A: /* shlq r1 */
+case 0x2B: /* shlt r1 */
/* Shift is a single shift! */
{
int i;
@@ -475,10 +475,10 @@ case 0x2B: /* shlt r1 */
}
break;
-case 0x2C: /* andb r1,r2 */
-case 0x2D: /* andw r1,r2 */
-case 0x2E: /* andq r1,r2 */
-case 0x2F: /* andt r1,r2 */
+case 0x2C: /* andb r1,r2 */
+case 0x2D: /* andw r1,r2 */
+case 0x2E: /* andq r1,r2 */
+case 0x2F: /* andt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -492,10 +492,10 @@ case 0x2F: /* andt r1,r2 */
}
break;
-case 0x34: /* subb r1,r2 */
-case 0x35: /* subw r1,r2 */
-case 0x36: /* subq r1,r2 */
-case 0x37: /* subt r1,r2 */
+case 0x34: /* subb r1,r2 */
+case 0x35: /* subw r1,r2 */
+case 0x36: /* subq r1,r2 */
+case 0x37: /* subt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -509,10 +509,10 @@ case 0x37: /* subt r1,r2 */
}
break;
-case 0x38: /* adbb r1,r2 */
-case 0x39: /* adbw r1,r2 */
-case 0x3A: /* adbq r1,r2 */
-case 0x3B: /* adbt r1,r2 */
+case 0x38: /* adbb r1,r2 */
+case 0x39: /* adbw r1,r2 */
+case 0x3A: /* adbq r1,r2 */
+case 0x3B: /* adbt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -526,10 +526,10 @@ case 0x3B: /* adbt r1,r2 */
}
break;
-case 0x3C: /* addb r1,r2 */
-case 0x3D: /* addw r1,r2 */
-case 0x3E: /* addq r1,r2 */
-case 0x3F: /* addt r1,r2 */
+case 0x3C: /* addb r1,r2 */
+case 0x3D: /* addw r1,r2 */
+case 0x3E: /* addq r1,r2 */
+case 0x3F: /* addt r1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -543,10 +543,10 @@ case 0x3F: /* addt r1,r2 */
}
break;
-case 0x4C: /* testb ir1,r2 */
-case 0x4D: /* testw ir1,r2 */
-case 0x4E: /* testq ir1,r2 */
-case 0x4F: /* testt ir1,r2 */
+case 0x4C: /* testb ir1,r2 */
+case 0x4D: /* testw ir1,r2 */
+case 0x4E: /* testq ir1,r2 */
+case 0x4F: /* testt ir1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -558,10 +558,10 @@ case 0x4F: /* testt ir1,r2 */
}
break;
-case 0x54: /* cmpb ir1,r2 */
-case 0x55: /* cmpw ir1,r2 */
-case 0x56: /* cmpq ir1,r2 */
-case 0x57: /* cmpt ir1,r2 */
+case 0x54: /* cmpb ir1,r2 */
+case 0x55: /* cmpw ir1,r2 */
+case 0x56: /* cmpq ir1,r2 */
+case 0x57: /* cmpt ir1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -573,10 +573,10 @@ case 0x57: /* cmpt ir1,r2 */
}
break;
-case 0x58: /* movb ir1,r2 */
-case 0x59: /* movw ir1,r2 */
-case 0x5A: /* movq ir1,r2 */
-case 0x5B: /* movt ir1,r2 */
+case 0x58: /* movb ir1,r2 */
+case 0x59: /* movw ir1,r2 */
+case 0x5A: /* movq ir1,r2 */
+case 0x5B: /* movt ir1,r2 */
{
int i;
int size = datasize( cpustate, op );
@@ -592,10 +592,10 @@ case 0x5B: /* movt ir1,r2 */
}
break;
-case 0x64: /* orb ir1,r2 */
-case 0x65: /* orb ir1,r2 */
-case 0x66: /* orb ir1,r2 */
-case 0x67: /* orb ir1,r2 */
+case 0x64: /* orb ir1,r2 */
+case 0x65: /* orb ir1,r2 */
+case 0x66: /* orb ir1,r2 */
+case 0x67: /* orb ir1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -609,10 +609,10 @@ case 0x67: /* orb ir1,r2 */
}
break;
-case 0x6C: /* andb ir1,r2 */
-case 0x6D: /* andw ir1,r2 */
-case 0x6E: /* andq ir1,r2 */
-case 0x6F: /* andt ir1,r2 */
+case 0x6C: /* andb ir1,r2 */
+case 0x6D: /* andw ir1,r2 */
+case 0x6E: /* andq ir1,r2 */
+case 0x6F: /* andt ir1,r2 */
{
int size = datasize( cpustate, op );
UINT8 reg1 = read_op( cpustate );
@@ -643,11 +643,11 @@ case 0x7F: /* addt ir1,r2 */
}
break;
-case 0x88: /* jump _a16 */
+case 0x88: /* jump _a16 */
cpustate->ip = ( read_op( cpustate ) << 8 ) | read_op( cpustate );
break;
-case 0x89: /* jumpf cs:a16 */
+case 0x89: /* jumpf cs:a16 */
{
UINT8 cs = read_op( cpustate );
UINT8 a1 = read_op( cpustate );
@@ -658,7 +658,7 @@ case 0x89: /* jumpf cs:a16 */
}
break;
-case 0x8A: /* call a16 */
+case 0x8A: /* call a16 */
{
UINT8 a1 = read_op( cpustate );
UINT8 a2 = read_op( cpustate );
@@ -669,25 +669,25 @@ case 0x8A: /* call a16 */
}
break;
-case 0x8C: /* unk_8C */
-case 0x8D: /* unk_8D */
-case 0x8E: /* unk_8E */
+case 0x8C: /* unk_8C */
+case 0x8D: /* unk_8D */
+case 0x8E: /* unk_8E */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
break;
-case 0x90: /* retzh */
-case 0x91: /* retzl */
-case 0x92: /* retc */
-case 0x93: /* retz */
-case 0x94: /* retzc */
-case 0x95: /* retcl */
-case 0x96: /* retnc */
-case 0x97: /* retnz */
+case 0x90: /* retzh */
+case 0x91: /* retzl */
+case 0x92: /* retc */
+case 0x93: /* retz */
+case 0x94: /* retzc */
+case 0x95: /* retcl */
+case 0x96: /* retnc */
+case 0x97: /* retnz */
if ( check_cond( cpustate, op ) )
HCD62121_POPW( cpustate->ip );
break;
-case 0x98: /* jump (r1) */
+case 0x98: /* jump (r1) */
{
UINT8 reg1 = read_op( cpustate );
UINT16 ad = cpustate->reg[ ( reg1 | 0x40 ) & 0x7f ] << 8;
@@ -701,18 +701,18 @@ case 0x98: /* jump (r1) */
}
break;
-case 0x9F: /* ret */
+case 0x9F: /* ret */
HCD62121_POPW( cpustate->ip );
break;
-case 0xA0: /* jmpzh a16 */
-case 0xA1: /* jmpzl a16 */
-case 0xA2: /* jmpc a16 */
-case 0xA3: /* jmpz a16 */
-case 0xA4: /* jmpzc a16 */
-case 0xA5: /* jmpcl a16 */
-case 0xA6: /* jmpnc a16 */
-case 0xA7: /* jmpnz a16 */
+case 0xA0: /* jmpzh a16 */
+case 0xA1: /* jmpzl a16 */
+case 0xA2: /* jmpc a16 */
+case 0xA3: /* jmpz a16 */
+case 0xA4: /* jmpzc a16 */
+case 0xA5: /* jmpcl a16 */
+case 0xA6: /* jmpnc a16 */
+case 0xA7: /* jmpnz a16 */
{
UINT8 a1 = read_op( cpustate );
UINT8 a2 = read_op( cpustate );
@@ -722,14 +722,14 @@ case 0xA7: /* jmpnz a16 */
}
break;
-case 0xA8: /* callzh a16 */
-case 0xA9: /* callzl a16 */
-case 0xAA: /* callc a16 */
-case 0xAB: /* callz a16 */
-case 0xAC: /* callzc a16 */
-case 0xAD: /* callcl a16 */
-case 0xAE: /* callnc a16 */
-case 0xAF: /* callnz a16 */
+case 0xA8: /* callzh a16 */
+case 0xA9: /* callzl a16 */
+case 0xAA: /* callc a16 */
+case 0xAB: /* callz a16 */
+case 0xAC: /* callzc a16 */
+case 0xAD: /* callcl a16 */
+case 0xAE: /* callnc a16 */
+case 0xAF: /* callnz a16 */
{
UINT8 a1 = read_op( cpustate );
UINT8 a2 = read_op( cpustate );
@@ -743,34 +743,34 @@ case 0xAF: /* callnz a16 */
}
break;
-case 0xB1: /* unk_B1 reg/i8 */
-case 0xB3: /* unk_B3 reg/i8 */
+case 0xB1: /* unk_B1 reg/i8 */
+case 0xB3: /* unk_B3 reg/i8 */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
read_op( cpustate );
break;
-case 0xB4: /* out koh,reg */
+case 0xB4: /* out koh,reg */
io_writebyte( cpustate, HCD62121_KOH, cpustate->reg[ read_op( cpustate ) & 0x7f ] );
break;
-case 0xB5: /* out koh,i8 */
+case 0xB5: /* out koh,i8 */
io_writebyte( cpustate, HCD62121_KOH, read_op( cpustate ) );
break;
-case 0xB6: /* out kol,reg */
+case 0xB6: /* out kol,reg */
io_writebyte( cpustate, HCD62121_KOL, cpustate->reg[ read_op( cpustate ) & 0x7f ] );
break;
-case 0xB7: /* out kol,i8 */
+case 0xB7: /* out kol,i8 */
io_writebyte( cpustate, HCD62121_KOL, read_op( cpustate ) );
break;
-case 0xB9: /* unk_B9 reg/i8 */
+case 0xB9: /* unk_B9 reg/i8 */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
read_op( cpustate );
break;
-case 0xBB: /* jmpcl? a16 */
+case 0xBB: /* jmpcl? a16 */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
{
UINT8 a1 = read_op( cpustate );
@@ -781,7 +781,7 @@ case 0xBB: /* jmpcl? a16 */
}
break;
-case 0xBF: /* jmpncl? a16 */
+case 0xBF: /* jmpncl? a16 */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
{
UINT8 a1 = read_op( cpustate );
@@ -792,10 +792,10 @@ case 0xBF: /* jmpncl? a16 */
}
break;
-case 0xC0: /* movb reg,i8 */
-case 0xC1: /* movw reg,i16 */
-case 0xC2: /* movw reg,i64 */
-case 0xC3: /* movw reg,i80 */
+case 0xC0: /* movb reg,i8 */
+case 0xC1: /* movw reg,i16 */
+case 0xC2: /* movw reg,i64 */
+case 0xC3: /* movw reg,i80 */
{
int i;
int size = datasize( cpustate, op );
@@ -808,10 +808,10 @@ case 0xC3: /* movw reg,i80 */
}
break;
-case 0xC4: /* movb (lar),r1 / r1,(lar) */
-case 0xC5: /* movw (lar),r1 / r1,(lar) */
-case 0xC6: /* movq (lar),r1 / r1,(lar) */
-case 0xC7: /* movt (lar),r1 / r1,(lar) */
+case 0xC4: /* movb (lar),r1 / r1,(lar) */
+case 0xC5: /* movw (lar),r1 / r1,(lar) */
+case 0xC6: /* movq (lar),r1 / r1,(lar) */
+case 0xC7: /* movt (lar),r1 / r1,(lar) */
{
int i;
int size = datasize( cpustate, op );
@@ -863,10 +863,10 @@ case 0xC7: /* movt (lar),r1 / r1,(lar) */
}
break;
-case 0xCC: /* swapb ir1,r2 */
-case 0xCD: /* swapw ir1,r2 */
-case 0xCE: /* swapq ir1,r2 */
-case 0xCF: /* swapt ir1,r2? */
+case 0xCC: /* swapb ir1,r2 */
+case 0xCD: /* swapw ir1,r2 */
+case 0xCE: /* swapq ir1,r2 */
+case 0xCF: /* swapt ir1,r2? */
{
int i;
int size = datasize( cpustate, op );
@@ -887,31 +887,31 @@ case 0xCF: /* swapt ir1,r2? */
}
break;
-case 0xD0: /* movb cs,reg */
+case 0xD0: /* movb cs,reg */
cpustate->cseg = cpustate->reg[ read_op( cpustate ) & 0x7f ];
break;
-case 0xD1: /* movb cs,i8 */
+case 0xD1: /* movb cs,i8 */
cpustate->cseg = read_op( cpustate );
break;
-case 0xD2: /* movb dsize,reg */
+case 0xD2: /* movb dsize,reg */
cpustate->dsize = cpustate->reg[ read_op( cpustate ) & 0x7f ];
break;
-case 0xD3: /* movb dsize,i8 */
+case 0xD3: /* movb dsize,i8 */
cpustate->dsize = read_op( cpustate );
break;
-case 0xD4: /* movb ss,reg */
+case 0xD4: /* movb ss,reg */
cpustate->sseg = cpustate->reg[ read_op( cpustate ) & 0x7f ];
break;
-case 0xD5: /* movb ss,i8 */
+case 0xD5: /* movb ss,i8 */
cpustate->sseg = read_op( cpustate );
break;
-case 0xD6: /* movw sp,reg */
+case 0xD6: /* movw sp,reg */
{
UINT8 reg1 = read_op( cpustate );
@@ -919,28 +919,28 @@ case 0xD6: /* movw sp,reg */
}
break;
-case 0xD7: /* movw sp,i16 */
+case 0xD7: /* movw sp,i16 */
cpustate->sp = read_op( cpustate) << 8;
cpustate->sp |= read_op( cpustate );
break;
-case 0xD8: /* movb f,reg */
+case 0xD8: /* movb f,reg */
cpustate->f = cpustate->reg[ read_op( cpustate ) & 0x7f ];
break;
-case 0xD9: /* movb f,i8 */
+case 0xD9: /* movb f,i8 */
cpustate->f = read_op( cpustate );
break;
-case 0xDC: /* movb ds,reg */
+case 0xDC: /* movb ds,reg */
cpustate->dseg = cpustate->reg[ read_op( cpustate ) & 0x7f ];
break;
-case 0xDD: /* movb ds,i8 */
+case 0xDD: /* movb ds,i8 */
cpustate->dseg = read_op( cpustate );
break;
-case 0xDE: /* movw lar,reg */
+case 0xDE: /* movw lar,reg */
{
UINT8 reg1 = read_op( cpustate );
@@ -948,7 +948,7 @@ case 0xDE: /* movw lar,reg */
}
break;
-case 0xE0: /* in0 reg */
+case 0xE0: /* in0 reg */
{
UINT8 reg1 = read_op( cpustate );
@@ -956,25 +956,25 @@ case 0xE0: /* in0 reg */
}
break;
-case 0xE1: /* unk_E1 reg/i8 (in?) */
+case 0xE1: /* unk_E1 reg/i8 (in?) */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
read_op( cpustate );
break;
-case 0xE2: /* in kb, reg */
+case 0xE2: /* in kb, reg */
cpustate->reg[ read_op( cpustate ) & 0x7f ] = io_readbyte( cpustate, HCD62121_KI );
break;
-case 0xE3: /* unk_e3 reg/i8 (in?) */
-case 0xE4: /* unk_e4 reg/i8 (in?) */
-case 0xE5: /* unk_e5 reg/i8 (in?) */
-case 0xE6: /* unk_e6 reg/i8 (in?) */
-case 0xE7: /* unk_e7 reg/i8 (in?) */
+case 0xE3: /* unk_e3 reg/i8 (in?) */
+case 0xE4: /* unk_e4 reg/i8 (in?) */
+case 0xE5: /* unk_e5 reg/i8 (in?) */
+case 0xE6: /* unk_e6 reg/i8 (in?) */
+case 0xE7: /* unk_e7 reg/i8 (in?) */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
read_op( cpustate );
break;
-case 0xE8: /* movw r1,lar */
+case 0xE8: /* movw r1,lar */
{
UINT8 reg1 = read_op( cpustate );
@@ -983,7 +983,7 @@ case 0xE8: /* movw r1,lar */
}
break;
-case 0xEB: /* movw reg,ss */
+case 0xEB: /* movw reg,ss */
{
UINT8 reg1 = read_op( cpustate );
@@ -992,32 +992,31 @@ case 0xEB: /* movw reg,ss */
}
break;
-case 0xEF: /* movb reg,ss */
+case 0xEF: /* movb reg,ss */
cpustate->reg[ read_op( cpustate ) & 0x7f ] = cpustate->sseg;
break;
-case 0xF0: /* unk_F0 reg/i8 (out?) */
-case 0xF1: /* unk_F1 reg/i8 (out?) */
-case 0xF2: /* unk_F2 reg/i8 (out?) */
-case 0xF3: /* unk_F3 reg/i8 (out?) */
-case 0xF4: /* unk_F4 reg/i8 (out?) */
-case 0xF5: /* unk_F5 reg/i8 (out?) */
-case 0xF6: /* unk_F6 reg/i8 (out?) */
-case 0xF7: /* unk_F7 reg/i8 (out?) */
+case 0xF0: /* unk_F0 reg/i8 (out?) */
+case 0xF1: /* unk_F1 reg/i8 (out?) */
+case 0xF2: /* unk_F2 reg/i8 (out?) */
+case 0xF3: /* unk_F3 reg/i8 (out?) */
+case 0xF4: /* unk_F4 reg/i8 (out?) */
+case 0xF5: /* unk_F5 reg/i8 (out?) */
+case 0xF6: /* unk_F6 reg/i8 (out?) */
+case 0xF7: /* unk_F7 reg/i8 (out?) */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
read_op( cpustate );
break;
-case 0xFC: /* unk_FC */
-case 0xFD: /* unk_FD */
-case 0xFE: /* unk_FE */
+case 0xFC: /* unk_FC */
+case 0xFD: /* unk_FD */
+case 0xFE: /* unk_FE */
logerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
break;
-case 0xFF: /* nop */
+case 0xFF: /* nop */
break;
default:
/*logerror*/fatalerror( "%02x:%04x: unimplemented instruction %02x encountered\n", cpustate->cseg, cpustate->ip-1, op );
break;
-
diff --git a/src/emu/cpu/hcd62121/hcd62121d.c b/src/emu/cpu/hcd62121/hcd62121d.c
index 504d2edba49..1e2811ba323 100644
--- a/src/emu/cpu/hcd62121/hcd62121d.c
+++ b/src/emu/cpu/hcd62121/hcd62121d.c
@@ -6,37 +6,37 @@
enum
{
- _REG=1, /* register */
- _REGREG, /* register1, register2, or register2, register1 or register1, imm byte */
- _IRG, /* register indirect */
- _IRGREG, /* 2 register indirect */
- _A16, /* 16bit address */
- _A24, /* seg:address */
- _F, /* flag register */
- _CS, /* cs register */
- _DS, /* ds register */
- _SS, /* ss register */
- _PC, /* program counter */
- _SP, /* stack pointer */
- _I8, /* immediate 8 bit value */
- _I16, /* immediate 16 bit value */
- _I64, /* immediate 64 bit value */
- _I80, /* immediate 80 bit value */
- _ILR, /* indirect last address register access */
- _LAR, /* last address register */
- _DSZ, /* dsize register? */
- _TIM, /* timing related register? */
- _KLO, /* KO1 - KO8 output lines */
- _KHI, /* KO9 - KO14(?) output lines */
- _KI, /* K input lines */
- _4, /* for nibble shifts */
+ _REG=1, /* register */
+ _REGREG, /* register1, register2, or register2, register1 or register1, imm byte */
+ _IRG, /* register indirect */
+ _IRGREG, /* 2 register indirect */
+ _A16, /* 16bit address */
+ _A24, /* seg:address */
+ _F, /* flag register */
+ _CS, /* cs register */
+ _DS, /* ds register */
+ _SS, /* ss register */
+ _PC, /* program counter */
+ _SP, /* stack pointer */
+ _I8, /* immediate 8 bit value */
+ _I16, /* immediate 16 bit value */
+ _I64, /* immediate 64 bit value */
+ _I80, /* immediate 80 bit value */
+ _ILR, /* indirect last address register access */
+ _LAR, /* last address register */
+ _DSZ, /* dsize register? */
+ _TIM, /* timing related register? */
+ _KLO, /* KO1 - KO8 output lines */
+ _KHI, /* KO9 - KO14(?) output lines */
+ _KI, /* K input lines */
+ _4, /* for nibble shifts */
};
struct hcd62121_dasm
{
const char *str;
- UINT8 arg1;
- UINT8 arg2;
+ UINT8 arg1;
+ UINT8 arg2;
};
@@ -57,9 +57,9 @@ static const hcd62121_dasm hcd62121_ops[256] =
{ "orb", _REGREG, 0 }, { "orw", _REGREG, 0 }, { "orq", _REGREG, 0 }, { "ort", _REGREG, 0 },
{ "shlb", _REG, 0 }, { "shlw", _REG, 0 }, { "shlq", _REG, 0 }, { "shlt", _REG, 0 },
{ "andb", _REGREG, 0 }, { "andw", _REGREG, 0 }, { "andq", _REGREG, 0 }, { "andt", _REGREG, 0 },
- { "sbbb", _REGREG, 0 }, { "sbbw", _REGREG, 0 }, { "sbbq", _REGREG, 0 }, { "sbbt", _REGREG, 0 }, /* BCD SUB */
+ { "sbbb", _REGREG, 0 }, { "sbbw", _REGREG, 0 }, { "sbbq", _REGREG, 0 }, { "sbbt", _REGREG, 0 }, /* BCD SUB */
{ "subb", _REGREG, 0 }, { "subw", _REGREG, 0 }, { "subq", _REGREG, 0 }, { "subt", _REGREG, 0 },
- { "adbb", _REGREG, 0 }, { "adbw", _REGREG, 0 }, { "adbq", _REGREG, 0 }, { "adbt", _REGREG, 0 }, /* BCD ADD */
+ { "adbb", _REGREG, 0 }, { "adbw", _REGREG, 0 }, { "adbq", _REGREG, 0 }, { "adbt", _REGREG, 0 }, /* BCD ADD */
{ "addb", _REGREG, 0 }, { "addw", _REGREG, 0 }, { "addq", _REGREG, 0 }, { "addt", _REGREG, 0 },
/* 0x40 */
@@ -240,7 +240,7 @@ CPU_DISASSEMBLE( hcd62121 )
if ( ( op1 & 0x80 ) || ( op2 & 0x80 ) )
{
/* (lar),reg */
- buffer += sprintf( buffer, "(%slar%s),r%02x", (op1 & 0x20) ? ( (op1 & 0x40) ? "--" : "++" ) : "", (op1 & 0x20) ? "" : ( (op1 & 0x40) ? "--" : "++" ), op2 & 0x7f );
+ buffer += sprintf( buffer, "(%slar%s),r%02x", (op1 & 0x20) ? ( (op1 & 0x40) ? "--" : "++" ) : "", (op1 & 0x20) ? "" : ( (op1 & 0x40) ? "--" : "++" ), op2 & 0x7f );
}
else
{
@@ -349,4 +349,3 @@ CPU_DISASSEMBLE( hcd62121 )
return pos | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/hd61700/hd61700.c b/src/emu/cpu/hd61700/hd61700.c
index 370437e27a1..cfbfb785720 100644
--- a/src/emu/cpu/hd61700/hd61700.c
+++ b/src/emu/cpu/hd61700/hd61700.c
@@ -25,66 +25,66 @@
#include "hd61700.h"
// internal ROM
-#define INT_ROM 0x0c00
+#define INT_ROM 0x0c00
// 5 bit registers
-#define REG_SX m_regsir[0]
-#define REG_SY m_regsir[1]
-#define REG_SZ m_regsir[2]
-#define READ_SREG(a) (m_regsir[((a)>>5) & 0x03] & 0x1f)
-#define WRITE_SREG(a,d) (m_regsir[((a)>>5) & 0x03] = (d) & 0x1f)
+#define REG_SX m_regsir[0]
+#define REG_SY m_regsir[1]
+#define REG_SZ m_regsir[2]
+#define READ_SREG(a) (m_regsir[((a)>>5) & 0x03] & 0x1f)
+#define WRITE_SREG(a,d) (m_regsir[((a)>>5) & 0x03] = (d) & 0x1f)
// 8 bit registers
-#define REG_PE m_reg8bit[0]
-#define REG_PD m_reg8bit[1]
-#define REG_IB m_reg8bit[2]
-#define REG_UA m_reg8bit[3]
-#define REG_IA m_reg8bit[4]
-#define REG_IE m_reg8bit[5]
-#define REG_TM m_reg8bit[7]
-#define READ_REG8(a) (m_reg8bit[(a) & 0x07])
-#define WRITE_REG8(a,d) (m_reg8bit[(a) & 0x07] = d)
+#define REG_PE m_reg8bit[0]
+#define REG_PD m_reg8bit[1]
+#define REG_IB m_reg8bit[2]
+#define REG_UA m_reg8bit[3]
+#define REG_IA m_reg8bit[4]
+#define REG_IE m_reg8bit[5]
+#define REG_TM m_reg8bit[7]
+#define READ_REG8(a) (m_reg8bit[(a) & 0x07])
+#define WRITE_REG8(a,d) (m_reg8bit[(a) & 0x07] = d)
// 16 bit registers
-#define REG_IX m_reg16bit[0]
-#define REG_IY m_reg16bit[1]
-#define REG_IZ m_reg16bit[2]
-#define REG_US m_reg16bit[3]
-#define REG_SS m_reg16bit[4]
-#define REG_KY m_reg16bit[5]
+#define REG_IX m_reg16bit[0]
+#define REG_IY m_reg16bit[1]
+#define REG_IZ m_reg16bit[2]
+#define REG_US m_reg16bit[3]
+#define REG_SS m_reg16bit[4]
+#define REG_KY m_reg16bit[5]
// main registers
-#define READ_REG(a) (m_regmain[(a) & 0x1f])
-#define WRITE_REG(a,d) (m_regmain[(a) & 0x1f] = d)
-#define COPY_REG(d,s) (m_regmain[(d) & 0x1f] = m_regmain[(s) & 0x1f])
-#define REG_GET16(r) (((m_regmain[((r)) & 0x1f]<<0)) | (m_regmain[((r) + 1) & 0x1f]<<8))
-#define REG_PUT16(r,d) do{(m_regmain[(r) & 0x1f] = (((d)>>0) & 0xff)); (m_regmain[((r)+1)&0x1f]=(((d)>>8)&0xff));}while(0)
+#define READ_REG(a) (m_regmain[(a) & 0x1f])
+#define WRITE_REG(a,d) (m_regmain[(a) & 0x1f] = d)
+#define COPY_REG(d,s) (m_regmain[(d) & 0x1f] = m_regmain[(s) & 0x1f])
+#define REG_GET16(r) (((m_regmain[((r)) & 0x1f]<<0)) | (m_regmain[((r) + 1) & 0x1f]<<8))
+#define REG_PUT16(r,d) do{(m_regmain[(r) & 0x1f] = (((d)>>0) & 0xff)); (m_regmain[((r)+1)&0x1f]=(((d)>>8)&0xff));}while(0)
// opcode
-#define GET_REG_IDX(a,b) (((a<<2) & 0x04) | ((b>>5) & 0x03))
-#define RESTORE_REG(o,r,pr) r = (o&0x02) ? r : pr
-#define COND_WRITE_REG(o,a,d) if (o&0x08) WRITE_REG(a,d)
-#define GET_IM3(d) (((d>>5)&0x07) + 1)
+#define GET_REG_IDX(a,b) (((a<<2) & 0x04) | ((b>>5) & 0x03))
+#define RESTORE_REG(o,r,pr) r = (o&0x02) ? r : pr
+#define COND_WRITE_REG(o,a,d) if (o&0x08) WRITE_REG(a,d)
+#define GET_IM3(d) (((d>>5)&0x07) + 1)
// flags
-#define SET_FLAG_C m_flags |= FLAG_C
-#define CLEAR_FLAG_Z m_flags |= FLAG_Z
-#define CLEAR_FLAG_LZ m_flags |= FLAG_LZ
-#define CLEAR_FLAG_UZ m_flags |= FLAG_UZ
-#define CLEAR_FLAGS m_flags &= ~(FLAG_Z | FLAG_C | FLAG_LZ | FLAG_UZ)
-
-#define CHECK_FLAG_Z(d) if((d) != 0) CLEAR_FLAG_Z
-#define CHECK_FLAG_C(d,l) if (d > l) SET_FLAG_C
-#define CHECK_FLAGB_LZ(d) if(((d) & 0x0f) != 0) CLEAR_FLAG_LZ
-#define CHECK_FLAGB_UZ(d) if(((d) & 0xf0) != 0) CLEAR_FLAG_UZ
-#define CHECK_FLAGW_LZ(d) if(((d) & 0x0f00) != 0) CLEAR_FLAG_LZ
-#define CHECK_FLAGW_UZ(d) if(((d) & 0xf000) != 0) CLEAR_FLAG_UZ
-#define CHECK_FLAGB_UZ_LZ(d) do{CHECK_FLAGB_LZ(d); CHECK_FLAGB_UZ(d);}while(0)
-#define CHECK_FLAGW_UZ_LZ(d) do{CHECK_FLAGW_LZ(d); CHECK_FLAGW_UZ(d);}while(0)
+#define SET_FLAG_C m_flags |= FLAG_C
+#define CLEAR_FLAG_Z m_flags |= FLAG_Z
+#define CLEAR_FLAG_LZ m_flags |= FLAG_LZ
+#define CLEAR_FLAG_UZ m_flags |= FLAG_UZ
+#define CLEAR_FLAGS m_flags &= ~(FLAG_Z | FLAG_C | FLAG_LZ | FLAG_UZ)
+
+#define CHECK_FLAG_Z(d) if((d) != 0) CLEAR_FLAG_Z
+#define CHECK_FLAG_C(d,l) if (d > l) SET_FLAG_C
+#define CHECK_FLAGB_LZ(d) if(((d) & 0x0f) != 0) CLEAR_FLAG_LZ
+#define CHECK_FLAGB_UZ(d) if(((d) & 0xf0) != 0) CLEAR_FLAG_UZ
+#define CHECK_FLAGW_LZ(d) if(((d) & 0x0f00) != 0) CLEAR_FLAG_LZ
+#define CHECK_FLAGW_UZ(d) if(((d) & 0xf000) != 0) CLEAR_FLAG_UZ
+#define CHECK_FLAGB_UZ_LZ(d) do{CHECK_FLAGB_LZ(d); CHECK_FLAGB_UZ(d);}while(0)
+#define CHECK_FLAGW_UZ_LZ(d) do{CHECK_FLAGW_LZ(d); CHECK_FLAGW_UZ(d);}while(0)
//CPU state
-#define CPU_FAST 0x01
-#define CPU_SLP 0x02
+#define CPU_FAST 0x01
+#define CPU_SLP 0x02
/* HD61700 IRQ vector */
static const UINT16 irq_vector[] = {0x0032, 0x0042, 0x0052, 0x0062, 0x0072};
@@ -101,7 +101,7 @@ const device_type HD61700 = &device_creator<hd61700_cpu_device>;
hd61700_cpu_device::hd61700_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, HD61700, "HD61700", tag, owner, clock),
- m_program_config("program", ENDIANNESS_BIG, 16, 18, -1)
+ m_program_config("program", ENDIANNESS_BIG, 16, 18, -1)
{
// ...
}
@@ -344,10 +344,10 @@ void hd61700_cpu_device::execute_run()
// execute the instruction
switch ( op )
{
- case 0x00: //adc
- case 0x01: //sbc
- case 0x08: //ad
- case 0x09: //sb
+ case 0x00: //adc
+ case 0x01: //sbc
+ case 0x08: //ad
+ case 0x09: //sb
{
UINT8 arg = read_op();
UINT8 src = READ_REG(get_sir_im8(arg));
@@ -365,7 +365,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x02: //ld
+ case 0x02: //ld
{
UINT8 arg = read_op();
COPY_REG(arg, get_sir_im8(arg));
@@ -375,14 +375,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x04: //anc
- case 0x05: //nac
- case 0x06: //orc
- case 0x07: //xrc
- case 0x0c: //an
- case 0x0d: //na
- case 0x0e: //or
- case 0x0f: //xr
+ case 0x04: //anc
+ case 0x05: //nac
+ case 0x06: //orc
+ case 0x07: //xrc
+ case 0x0c: //an
+ case 0x0d: //na
+ case 0x0e: //or
+ case 0x0f: //xr
{
UINT8 arg = read_op();
@@ -403,8 +403,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x0a: //adb
- case 0x0b: //sbb
+ case 0x0a: //adb
+ case 0x0b: //sbb
{
UINT8 arg = read_op();
UINT16 res;
@@ -426,7 +426,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x10: //st
+ case 0x10: //st
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
@@ -439,7 +439,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x11: //ld
+ case 0x11: //ld
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
@@ -452,7 +452,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x12: //stl
+ case 0x12: //stl
{
UINT8 arg = read_op();
@@ -464,7 +464,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x13: //ldl
+ case 0x13: //ldl
{
UINT8 arg = read_op();
UINT8 res = 0xff;
@@ -479,7 +479,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x14: //ppo/pfl
+ case 0x14: //ppo/pfl
{
UINT8 arg = read_op();
@@ -498,7 +498,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x15: //psr
+ case 0x15: //psr
{
UINT8 arg = read_op();
WRITE_SREG(arg, READ_REG(arg)&0x1f);
@@ -508,8 +508,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x16: //pst
- case 0x17: //pst
+ case 0x16: //pst
+ case 0x17: //pst
{
UINT8 arg = read_op();
UINT8 src = READ_REG(arg);
@@ -517,30 +517,30 @@ void hd61700_cpu_device::execute_run()
switch (idx)
{
- case 0: //PE
- case 1: //PD
+ case 0: //PE
+ case 1: //PD
WRITE_REG8(idx, src);
if (m_port_w)
(*m_port_w)(*this, REG_PD & REG_PE);
break;
- case 2: //IB
+ case 2: //IB
REG_IB = (REG_IB & 0x1f) | (src & 0xe0);
break;
- case 3: //UA
+ case 3: //UA
WRITE_REG8(idx, src);
break;
- case 4: //IA
+ case 4: //IA
if (m_kb_w)
(*m_kb_w)(*this, src);
WRITE_REG8(idx, src);
break;
- case 5: //IE
+ case 5: //IE
REG_IB &= (((src>>3)&0x1f) | 0xe0);
m_irq_status &= ((src>>3)&0x1f);
WRITE_REG8(idx, src);
break;
- case 6: //TM
- case 7: //TM
+ case 6: //TM
+ case 7: //TM
// read-only
break;
}
@@ -556,8 +556,8 @@ void hd61700_cpu_device::execute_run()
UINT8 op1 = (arg>>5) & 0x03;
switch (op1)
{
- case 0x00: //rod
- case 0x02: //bid
+ case 0x00: //rod
+ case 0x02: //bid
{
UINT8 src = READ_REG(arg);
UINT8 res = (src>>1)&0x7f;
@@ -574,8 +574,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x01: //rou
- case 0x03: //biu
+ case 0x01: //rou
+ case 0x03: //biu
{
UINT8 src = READ_REG(arg);
UINT8 res = (src<<1)&0xfe;
@@ -604,8 +604,8 @@ void hd61700_cpu_device::execute_run()
UINT8 op1 = (arg>>5) & 0x03;
switch (op1)
{
- case 0x00: //did
- case 0x01: //diu
+ case 0x00: //did
+ case 0x01: //diu
{
UINT8 res;
@@ -621,8 +621,8 @@ void hd61700_cpu_device::execute_run()
CHECK_FLAGB_UZ_LZ(res);
}
break;
- case 0x02: //byd
- case 0x03: //byu
+ case 0x02: //byd
+ case 0x03: //byu
{
WRITE_REG(arg, 0);
CLEAR_FLAGS;
@@ -635,7 +635,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x1b: //cmp/inv
+ case 0x1b: //cmp/inv
{
UINT8 arg = read_op();
UINT8 res = ~(READ_REG(arg));
@@ -653,7 +653,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x1c: //gpo/gfl
+ case 0x1c: //gpo/gfl
{
UINT8 arg = read_op();
UINT8 src = 0xff;
@@ -677,7 +677,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x1d: //gsr
+ case 0x1d: //gsr
{
UINT8 arg = read_op();
WRITE_REG(arg, READ_SREG(arg));
@@ -686,8 +686,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x1e: //gst
- case 0x1f: //gst
+ case 0x1e: //gst
+ case 0x1f: //gst
{
UINT8 arg = read_op();
UINT8 idx = GET_REG_IDX(op, arg);
@@ -697,8 +697,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x20: //st
- case 0x22: //sti
+ case 0x20: //st
+ case 0x22: //sti
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IX;
@@ -712,8 +712,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x21: //st
- case 0x23: //sti
+ case 0x21: //st
+ case 0x23: //sti
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IZ;
@@ -727,7 +727,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x24: //std
+ case 0x24: //std
{
UINT8 arg = read_op();
REG_IX += get_sign_mreg(arg);
@@ -737,7 +737,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x25: //std
+ case 0x25: //std
{
UINT8 arg = read_op();
REG_IZ += get_sign_mreg(arg);
@@ -747,7 +747,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x26: //phs
+ case 0x26: //phs
{
UINT8 arg = read_op();
@@ -755,7 +755,7 @@ void hd61700_cpu_device::execute_run()
m_icount -= 9;
}
break;
- case 0x27: //phu
+ case 0x27: //phu
{
UINT8 arg = read_op();
@@ -764,8 +764,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x28: //ld
- case 0x2a: //ldi
+ case 0x28: //ld
+ case 0x2a: //ldi
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IX;
@@ -779,8 +779,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x29: //ld
- case 0x2b: //ldi
+ case 0x29: //ld
+ case 0x2b: //ldi
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IZ;
@@ -794,7 +794,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x2c: //ldd
+ case 0x2c: //ldd
{
UINT8 arg = read_op();
REG_IX += get_sign_mreg(arg);
@@ -805,7 +805,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x2d: //ldd
+ case 0x2d: //ldd
{
UINT8 arg = read_op();
REG_IZ += get_sign_mreg(arg);
@@ -816,7 +816,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x2e: //pps
+ case 0x2e: //pps
{
UINT8 arg = read_op();
WRITE_REG(arg, pop(REG_SS));
@@ -824,7 +824,7 @@ void hd61700_cpu_device::execute_run()
m_icount -= 11;
}
break;
- case 0x2f: //ppu
+ case 0x2f: //ppu
{
UINT8 arg = read_op();
WRITE_REG(arg, pop(REG_US));
@@ -833,14 +833,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x30: //jp z
- case 0x31: //jp nc
- case 0x32: //jp lz
- case 0x33: //jp uz
- case 0x34: //jp nz
- case 0x35: //jp c
- case 0x36: //jp nlz
- case 0x37: //unconditional jp
+ case 0x30: //jp z
+ case 0x31: //jp nc
+ case 0x32: //jp lz
+ case 0x33: //jp uz
+ case 0x34: //jp nz
+ case 0x35: //jp c
+ case 0x36: //jp nlz
+ case 0x37: //unconditional jp
{
UINT8 lsb = read_op();
if (m_pc < INT_ROM) read_op();
@@ -852,10 +852,10 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x38: //adc
- case 0x3a: //sbc
- case 0x3c: //ad
- case 0x3e: //sb
+ case 0x38: //adc
+ case 0x3a: //sbc
+ case 0x3c: //ad
+ case 0x3e: //sb
{
UINT8 arg = read_op();
UINT16 offset = REG_IX + get_sign_mreg(arg);
@@ -875,10 +875,10 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x39: //adc
- case 0x3b: //sbc
- case 0x3d: //ad
- case 0x3f: //sb
+ case 0x39: //adc
+ case 0x3b: //sbc
+ case 0x3d: //ad
+ case 0x3f: //sb
{
UINT8 arg = read_op();
UINT16 offset = REG_IZ + get_sign_mreg(arg);
@@ -898,10 +898,10 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x40: //adc
- case 0x41: //sbc
- case 0x48: //ad
- case 0x49: //sb
+ case 0x40: //adc
+ case 0x41: //sbc
+ case 0x48: //ad
+ case 0x49: //sb
{
UINT8 arg = read_op();
UINT8 src = read_op();
@@ -919,7 +919,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x42: //ld
+ case 0x42: //ld
{
UINT8 arg = read_op();
UINT8 src = read_op() ;
@@ -931,14 +931,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x44: //anc
- case 0x45: //nac
- case 0x46: //orc
- case 0x47: //xrc
- case 0x4c: //an
- case 0x4d: //na
- case 0x4e: //or
- case 0x4f: //xr
+ case 0x44: //anc
+ case 0x45: //nac
+ case 0x46: //orc
+ case 0x47: //xrc
+ case 0x4c: //an
+ case 0x4d: //na
+ case 0x4e: //or
+ case 0x4f: //xr
{
UINT8 arg = read_op();
UINT8 src = read_op();
@@ -960,8 +960,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x4a: //adb
- case 0x4b: //sbb
+ case 0x4a: //adb
+ case 0x4b: //sbb
{
UINT8 arg = read_op();
UINT8 src = read_op();
@@ -984,7 +984,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x50: //st
+ case 0x50: //st
{
UINT8 arg = read_op();
UINT8 src = read_op();
@@ -995,7 +995,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x51: //ld
+ case 0x51: //ld
{
UINT8 arg = read_op();
UINT8 src = read_op();
@@ -1005,7 +1005,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x52: //stl
+ case 0x52: //stl
{
UINT8 arg = read_op();
@@ -1016,7 +1016,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x54: //ppo/pfl
+ case 0x54: //ppo/pfl
{
UINT8 arg = read_op();
UINT8 src = read_op();
@@ -1035,7 +1035,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x55: //psr
+ case 0x55: //psr
{
UINT8 arg = read_op();
WRITE_SREG(arg, arg&0x1f);
@@ -1044,8 +1044,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x56: //pst
- case 0x57: //pst
+ case 0x56: //pst
+ case 0x57: //pst
{
UINT8 arg = read_op();
UINT8 src = read_op();
@@ -1053,30 +1053,30 @@ void hd61700_cpu_device::execute_run()
switch (idx)
{
- case 0: //PE
- case 1: //PD
+ case 0: //PE
+ case 1: //PD
WRITE_REG8(idx, src);
if (m_port_w)
(*m_port_w)(*this, REG_PD & REG_PE);
break;
- case 2: //IB
+ case 2: //IB
REG_IB = (REG_IB & 0x1f) | (src & 0xe0);
break;
- case 3: //UA
+ case 3: //UA
WRITE_REG8(idx, src);
break;
- case 4: //IA
+ case 4: //IA
if (m_kb_w)
(*m_kb_w)(*this, src);
WRITE_REG8(idx, src);
break;
- case 5: //IE
+ case 5: //IE
REG_IB &= (((src>>3)&0x1f) | 0xe0);
m_irq_status &= ((src>>3)&0x1f);
WRITE_REG8(idx, src);
break;
- case 6: //TM
- case 7: //TM
+ case 6: //TM
+ case 7: //TM
// read-only
break;
}
@@ -1085,8 +1085,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x58: //bups
- case 0x59: //bdns
+ case 0x58: //bups
+ case 0x59: //bdns
{
UINT8 arg = read_op();
UINT8 tmp;
@@ -1115,8 +1115,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x5c: //sup
- case 0x5d: //sdn
+ case 0x5c: //sup
+ case 0x5d: //sdn
{
UINT8 arg = read_op();
UINT16 res;
@@ -1141,8 +1141,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x60: //st
- case 0x62: //sti
+ case 0x60: //st
+ case 0x62: //sti
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IX;
@@ -1156,8 +1156,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x61: //st
- case 0x63: //sti
+ case 0x61: //st
+ case 0x63: //sti
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IZ;
@@ -1170,7 +1170,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x64: //std
+ case 0x64: //std
{
UINT8 arg = read_op();
REG_IX += get_sign_im8(arg);
@@ -1180,7 +1180,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x65: //std
+ case 0x65: //std
{
UINT8 arg = read_op();
REG_IZ += get_sign_im8(arg);
@@ -1190,8 +1190,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x68: //ld
- case 0x6a: //ldi
+ case 0x68: //ld
+ case 0x6a: //ldi
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IX;
@@ -1204,8 +1204,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x69: //ld
- case 0x6b: //ldi
+ case 0x69: //ld
+ case 0x6b: //ldi
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IZ;
@@ -1218,7 +1218,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x6c: //ldd
+ case 0x6c: //ldd
{
UINT8 arg = read_op();
REG_IX += get_sign_im8(arg);
@@ -1228,7 +1228,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x6d: //ldd
+ case 0x6d: //ldd
{
UINT8 arg = read_op();
REG_IZ += get_sign_im8(arg);
@@ -1238,14 +1238,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x70: //cal z
- case 0x71: //cal nc
- case 0x72: //cal lz
- case 0x73: //cal uz
- case 0x74: //cal nz
- case 0x75: //cal c
- case 0x76: //cal nlz
- case 0x77: //unconditional cal
+ case 0x70: //cal z
+ case 0x71: //cal nc
+ case 0x72: //cal lz
+ case 0x73: //cal uz
+ case 0x74: //cal nz
+ case 0x75: //cal c
+ case 0x76: //cal nlz
+ case 0x77: //unconditional cal
{
UINT8 lsb = read_op();
if (m_pc < INT_ROM) read_op();
@@ -1264,10 +1264,10 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x78: //adc
- case 0x7a: //sbc
- case 0x7c: //ad
- case 0x7e: //sb
+ case 0x78: //adc
+ case 0x7a: //sbc
+ case 0x7c: //ad
+ case 0x7e: //sb
{
UINT8 arg = read_op();
UINT16 offset = REG_IX + get_sign_im8(arg);
@@ -1287,10 +1287,10 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x79: //adc
- case 0x7b: //sbc
- case 0x7d: //ad
- case 0x7f: //sb
+ case 0x79: //adc
+ case 0x7b: //sbc
+ case 0x7d: //ad
+ case 0x7f: //sb
{
UINT8 arg = read_op();
UINT16 offset = REG_IZ + get_sign_im8(arg);
@@ -1310,16 +1310,16 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x80: //adcw
- case 0x81: //sbcw
- case 0x88: //adw
- case 0x89: //sbw
+ case 0x80: //adcw
+ case 0x81: //sbcw
+ case 0x88: //adw
+ case 0x89: //sbw
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
UINT32 res = REG_GET16(arg) + ((op & 0x01) ? -REG_GET16(src) : +REG_GET16(src));
- if (op & 0x08) REG_PUT16(arg, res&0xffff);
+ if (op & 0x08) REG_PUT16(arg, res&0xffff);
CLEAR_FLAGS;
CHECK_FLAG_Z(res & 0xffff);
@@ -1331,7 +1331,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x82: //ldw
+ case 0x82: //ldw
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
@@ -1344,14 +1344,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x84: //ancw
- case 0x85: //nacw
- case 0x86: //orcw
- case 0x87: //xrcw
- case 0x8c: //anw
- case 0x8d: //naw
- case 0x8e: //orw
- case 0x8f: //xrw
+ case 0x84: //ancw
+ case 0x85: //nacw
+ case 0x86: //orcw
+ case 0x87: //xrcw
+ case 0x8c: //anw
+ case 0x8d: //naw
+ case 0x8e: //orw
+ case 0x8f: //xrw
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
@@ -1375,8 +1375,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x8a: //adbw
- case 0x8b: //sbbw
+ case 0x8a: //adbw
+ case 0x8b: //sbbw
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
@@ -1408,7 +1408,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x90: //stw
+ case 0x90: //stw
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
@@ -1422,7 +1422,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x91: //ldw
+ case 0x91: //ldw
{
UINT8 arg = read_op();
UINT8 src = get_sir_im8(arg);
@@ -1436,7 +1436,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x92: //stlw
+ case 0x92: //stlw
{
UINT8 arg = read_op();
@@ -1451,7 +1451,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x93: //ldcw
+ case 0x93: //ldcw
{
UINT8 arg = read_op();
UINT8 reg0, reg1;
@@ -1472,8 +1472,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x96: //pre
- case 0x97: //pre
+ case 0x96: //pre
+ case 0x97: //pre
{
UINT8 arg = read_op();
UINT8 idx = GET_REG_IDX(op, arg);
@@ -1486,14 +1486,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x98: //rodw
+ case 0x98: //rodw
{
UINT8 arg = read_op();
UINT8 op1 = (arg>>5) & 0x03;
switch (op1)
{
- case 0x00: //rodw
- case 0x02: //bidw
+ case 0x00: //rodw
+ case 0x02: //bidw
{
UINT16 src = REG_GET16(arg-1);
UINT16 res = (src>>1)&0x7fff;
@@ -1510,8 +1510,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x01: //rouw
- case 0x03: //biuw
+ case 0x01: //rouw
+ case 0x03: //biuw
{
UINT16 src = REG_GET16(arg);
UINT16 res = (src<<1)&0xfffe;
@@ -1540,7 +1540,7 @@ void hd61700_cpu_device::execute_run()
UINT8 op1 = (arg>>5) & 0x03;
switch (op1)
{
- case 0x00: //didw
+ case 0x00: //didw
{
UINT16 src = (REG_GET16(arg-1)>>4)&0x0fff;
REG_PUT16(arg-1, src);
@@ -1551,7 +1551,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x01: //diuw
+ case 0x01: //diuw
{
UINT16 src = (REG_GET16(arg)<<4)&0xfff0;
REG_PUT16(arg, src);
@@ -1562,7 +1562,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x02: //bydw
+ case 0x02: //bydw
{
UINT8 src = READ_REG(arg);
@@ -1575,7 +1575,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x03: //byuw
+ case 0x03: //byuw
{
UINT8 src = READ_REG(arg);
@@ -1594,7 +1594,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x9b: //cmpw/invw
+ case 0x9b: //cmpw/invw
{
UINT8 arg = read_op();
UINT16 res = ~(REG_GET16(arg));
@@ -1613,7 +1613,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x9c: //gpow/gflw
+ case 0x9c: //gpow/gflw
{
UINT8 arg = read_op();
UINT8 reg0, reg1;
@@ -1645,8 +1645,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x9e: //gre
- case 0x9f: //gre
+ case 0x9e: //gre
+ case 0x9f: //gre
{
UINT8 arg = read_op();
UINT8 idx = GET_REG_IDX(op, arg);
@@ -1671,8 +1671,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xa0: //stw
- case 0xa2: //stiw
+ case 0xa0: //stw
+ case 0xa2: //stiw
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IX;
@@ -1688,8 +1688,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xa1: //stw
- case 0xa3: //stiw
+ case 0xa1: //stw
+ case 0xa3: //stiw
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IZ;
@@ -1705,7 +1705,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xa4: //stdw
+ case 0xa4: //stdw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1718,7 +1718,7 @@ void hd61700_cpu_device::execute_run()
m_icount -= 9;
}
break;
- case 0xa5: //stdw
+ case 0xa5: //stdw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1732,7 +1732,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xa6: //phsw
+ case 0xa6: //phsw
{
UINT8 arg = read_op();
push(REG_SS, READ_REG(arg));
@@ -1741,7 +1741,7 @@ void hd61700_cpu_device::execute_run()
m_icount -= 12;
}
break;
- case 0xa7: //phuw
+ case 0xa7: //phuw
{
UINT8 arg = read_op();
push(REG_US, READ_REG(arg));
@@ -1751,8 +1751,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xa8: //ldw
- case 0xaa: //ldiw
+ case 0xa8: //ldw
+ case 0xaa: //ldiw
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IX;
@@ -1769,8 +1769,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xa9: //ldw
- case 0xab: //ldiw
+ case 0xa9: //ldw
+ case 0xab: //ldiw
{
UINT8 arg = read_op();
UINT16 prev_ir = REG_IZ;
@@ -1787,7 +1787,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xac: //lddw
+ case 0xac: //lddw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1801,7 +1801,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xad: //lddw
+ case 0xad: //lddw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1815,8 +1815,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xae: //ppsw
- case 0xaf: //ppuw
+ case 0xae: //ppsw
+ case 0xaf: //ppuw
{
UINT8 arg = read_op();
@@ -1827,14 +1827,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xb0: //jr z
- case 0xb1: //jr nc
- case 0xb2: //jr lz
- case 0xb3: //jr uz
- case 0xb4: //jr nz
- case 0xb5: //jr c
- case 0xb6: //jr nlz
- case 0xb7: //unconditional jr
+ case 0xb0: //jr z
+ case 0xb1: //jr nc
+ case 0xb2: //jr lz
+ case 0xb3: //jr uz
+ case 0xb4: //jr nz
+ case 0xb5: //jr c
+ case 0xb6: //jr nlz
+ case 0xb7: //unconditional jr
{
UINT8 arg = read_op();
UINT32 new_pc = m_pc-1 + get_im_7(arg);
@@ -1845,8 +1845,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xb8: //adcw
- case 0xbc: //adw
+ case 0xb8: //adcw
+ case 0xbc: //adw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1871,8 +1871,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xba: //sbcw
- case 0xbe: //sbw
+ case 0xba: //sbcw
+ case 0xbe: //sbw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1897,8 +1897,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xb9: //adcw
- case 0xbd: //adw
+ case 0xb9: //adcw
+ case 0xbd: //adw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1923,8 +1923,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xbb: //sbcw
- case 0xbf: //sbw
+ case 0xbb: //sbcw
+ case 0xbf: //sbw
{
UINT8 arg = read_op();
UINT8 ir_inc = READ_REG(get_sir_im8(arg));
@@ -1949,10 +1949,10 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xc0: //adbcm
- case 0xc1: //sbbcm
- case 0xc8: //adbm
- case 0xc9: //sbbm
+ case 0xc0: //adbcm
+ case 0xc1: //sbbcm
+ case 0xc8: //adbm
+ case 0xc9: //sbbm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -1989,7 +1989,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xc2: //ldm
+ case 0xc2: //ldm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2007,14 +2007,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xc4: //ancm
- case 0xc5: //nacm
- case 0xc6: //orcm
- case 0xc7: //xrcm
- case 0xcc: //anm
- case 0xcd: //nam
- case 0xce: //orm
- case 0xcf: //xrm
+ case 0xc4: //ancm
+ case 0xc5: //nacm
+ case 0xc6: //orcm
+ case 0xc7: //xrcm
+ case 0xcc: //anm
+ case 0xcd: //nam
+ case 0xce: //orm
+ case 0xcf: //xrm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2047,8 +2047,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xca: //adbm
- case 0xcb: //sbbm
+ case 0xca: //adbm
+ case 0xcb: //sbbm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2085,7 +2085,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xd0: //stw
+ case 0xd0: //stw
{
UINT8 arg = read_op();
UINT16 offset = REG_GET16(READ_SREG(arg));
@@ -2097,7 +2097,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xd1: //ldw
+ case 0xd1: //ldw
{
UINT8 arg = read_op();
UINT8 reg0 = read_op();
@@ -2109,7 +2109,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xd2: //stlm
+ case 0xd2: //stlm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2127,7 +2127,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xd3: //ldlm
+ case 0xd3: //ldlm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2149,8 +2149,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xd6: //pre
- case 0xd7: //pre
+ case 0xd6: //pre
+ case 0xd7: //pre
{
UINT8 arg = read_op();
UINT8 lsb = read_op();
@@ -2164,8 +2164,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xd8: //bup
- case 0xd9: //bdn
+ case 0xd8: //bup
+ case 0xd9: //bdn
{
UINT8 src;
for(;;)
@@ -2191,7 +2191,7 @@ void hd61700_cpu_device::execute_run()
UINT8 op1 = (arg>>5) & 0x03;
switch (op1)
{
- case 0x00: //didm
+ case 0x00: //didm
{
UINT8 arg1 = read_op();
UINT8 r1 = 0, r2 = 0;
@@ -2211,7 +2211,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x01: //dium
+ case 0x01: //dium
{
UINT8 arg1 = read_op();
UINT8 r1 = 0, r2 = 0;
@@ -2231,7 +2231,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x02: //bydm
+ case 0x02: //bydm
{
UINT8 arg1 = read_op();
UINT8 r1 = 0, r2 = 0, f = 0;
@@ -2251,7 +2251,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0x03: //byum
+ case 0x03: //byum
{
UINT8 arg1 = read_op();
UINT8 r1 = 0, r2 = 0, f = 0;
@@ -2274,7 +2274,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xdb: //cmpm/invm
+ case 0xdb: //cmpm/invm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2301,8 +2301,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xdc: //sup
- case 0xdd: //sdn
+ case 0xdc: //sup
+ case 0xdd: //sdn
{
UINT8 arg = read_op();
UINT16 res;
@@ -2327,7 +2327,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xde: //jp
+ case 0xde: //jp
{
UINT8 arg = read_op();
set_pc(REG_GET16(arg));
@@ -2336,7 +2336,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xdf: //jp
+ case 0xdf: //jp
{
UINT8 arg = read_op();
UINT16 offset = REG_GET16(arg);
@@ -2349,8 +2349,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xe0: //stm
- case 0xe2: //stim
+ case 0xe0: //stm
+ case 0xe2: //stim
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2371,8 +2371,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xe1: //stm
- case 0xe3: //stim
+ case 0xe1: //stm
+ case 0xe3: //stim
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2393,7 +2393,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xe4: //stdm
+ case 0xe4: //stdm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2413,7 +2413,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xe5: //stdm
+ case 0xe5: //stdm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2433,8 +2433,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xe6: //phsm
- case 0xe7: //phum
+ case 0xe6: //phsm
+ case 0xe7: //phum
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2450,8 +2450,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xe8: //ldm
- case 0xea: //ldim
+ case 0xe8: //ldm
+ case 0xea: //ldim
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2472,8 +2472,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xe9: //ldm
- case 0xeb: //ldim
+ case 0xe9: //ldm
+ case 0xeb: //ldim
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2494,7 +2494,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xec: //lddm
+ case 0xec: //lddm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2514,7 +2514,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xed: //lddm
+ case 0xed: //lddm
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2534,8 +2534,8 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xee: //ppsm
- case 0xef: //ppum
+ case 0xee: //ppsm
+ case 0xef: //ppum
{
UINT8 arg = read_op();
UINT8 arg1 = read_op();
@@ -2550,14 +2550,14 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xf0: //rtn z
- case 0xf1: //rtn nc
- case 0xf2: //rtn lz
- case 0xf3: //rtn uz
- case 0xf4: //rtn nz
- case 0xf5: //rtn c
- case 0xf6: //rtn nlz
- case 0xf7: //unconditional rtn
+ case 0xf0: //rtn z
+ case 0xf1: //rtn nc
+ case 0xf2: //rtn lz
+ case 0xf3: //rtn uz
+ case 0xf4: //rtn nz
+ case 0xf5: //rtn c
+ case 0xf6: //rtn nlz
+ case 0xf7: //unconditional rtn
{
if (check_cond(op))
{
@@ -2570,26 +2570,26 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xf8: //nop
+ case 0xf8: //nop
m_icount -= 3;
break;
- case 0xf9: //clt
+ case 0xf9: //clt
REG_TM = 0;
m_icount -= 3;
break;
- case 0xfa: //fst
+ case 0xfa: //fst
m_state |= CPU_FAST;
m_icount -= 3;
break;
- case 0xfb: //slw
+ case 0xfb: //slw
m_state &= ~CPU_FAST;
m_icount -= 3;
break;
- case 0xfd: //rtni
+ case 0xfd: //rtni
{
UINT8 lsb = pop(REG_SS);
UINT8 msb = pop(REG_SS);
@@ -2600,7 +2600,7 @@ void hd61700_cpu_device::execute_run()
}
//fall through
- case 0xfc: //cani
+ case 0xfc: //cani
{
for (UINT8 arg=0x10; arg>0; arg>>=1)
{
@@ -2616,7 +2616,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xfe: //off
+ case 0xfe: //off
{
set_pc(0);
REG_UA = REG_IA = 0;
@@ -2641,7 +2641,7 @@ void hd61700_cpu_device::execute_run()
}
break;
- case 0xff: //trp
+ case 0xff: //trp
{
m_pc--;
push(REG_SS, (m_pc>>8)&0xff);
@@ -2709,37 +2709,37 @@ void hd61700_cpu_device::execute_set_input(int inputnum, int state)
m_state &= ~(CPU_SLP | CPU_FAST);
set_pc(0x0000);
break;
- case HD61700_KEY_INT: //level sensitive line
+ case HD61700_KEY_INT: //level sensitive line
if (((REG_IE>>3) & (1<<inputnum)) && state != CLEAR_LINE)
REG_IB |= (1<<inputnum);
break;
- case HD61700_INT1: //edge sensitive line
+ case HD61700_INT1: //edge sensitive line
if (((REG_IE>>3) & (1<<inputnum)) && (m_lines_status[inputnum] != state))
REG_IB |= (1<<inputnum);
if (m_lines_status[inputnum] == CLEAR_LINE && state != CLEAR_LINE)
- REG_IE = (REG_IE & 0xfd) | 0x02; //rising edge
+ REG_IE = (REG_IE & 0xfd) | 0x02; //rising edge
else if (m_lines_status[inputnum] != CLEAR_LINE && state == CLEAR_LINE)
- REG_IE = (REG_IE & 0xfd) | 0x00; //falling edge
+ REG_IE = (REG_IE & 0xfd) | 0x00; //falling edge
REG_KY = (REG_KY & 0xf7ff) | ((state != CLEAR_LINE)<<11);
break;
- case HD61700_INT2: //level sensitive line
+ case HD61700_INT2: //level sensitive line
if (((REG_IE>>3) & (1<<inputnum)) && state != CLEAR_LINE)
REG_IB |= (1<<inputnum);
REG_IE = (REG_IE & 0xfe) | (state != CLEAR_LINE);
REG_KY = (REG_KY & 0xfbff) | ((state != CLEAR_LINE)<<10);
break;
- case HD61700_ON_INT: //level sensitive line
+ case HD61700_ON_INT: //level sensitive line
if ((REG_IE>>3) & (1<<inputnum) && state != CLEAR_LINE)
REG_IB |= (1<<inputnum);
REG_KY = (REG_KY & 0xfdff) | ((state != CLEAR_LINE)<<9);
break;
- case HD61700_SW: //level sensitive line
+ case HD61700_SW: //level sensitive line
if (state != CLEAR_LINE)
{
if ((m_state & CPU_SLP) || m_lines_status[HD61700_SW] == CLEAR_LINE)
@@ -2835,42 +2835,42 @@ inline int hd61700_cpu_device::check_cond(UINT32 op)
{
switch ( op & 0x07 )
{
- case 0x00: // Z set
+ case 0x00: // Z set
if ( !(m_flags & FLAG_Z) )
return 1;
break;
- case 0x01: // NC set
+ case 0x01: // NC set
if ( !(m_flags & FLAG_C) )
return 1;
break;
- case 0x02: // LZ set
+ case 0x02: // LZ set
if ( !(m_flags & FLAG_LZ) )
return 1;
break;
- case 0x03: // UZ set
+ case 0x03: // UZ set
if ( !(m_flags & FLAG_UZ) )
return 1;
break;
- case 0x04: // NZ set
+ case 0x04: // NZ set
if ( m_flags & FLAG_Z )
return 1;
break;
- case 0x05: // C set
+ case 0x05: // C set
if ( m_flags & FLAG_C )
return 1;
break;
- case 0x06: // NLZ clear
+ case 0x06: // NLZ clear
if ( m_flags & FLAG_LZ )
return 1;
break;
- case 0x07: // unconditional
+ case 0x07: // unconditional
return 1;
}
@@ -2881,13 +2881,13 @@ inline UINT8 hd61700_cpu_device::make_logic(UINT8 type, UINT8 d1, UINT8 d2)
{
switch (type&3)
{
- case 0: //and
+ case 0: //and
return d1 & d2;
- case 1: //nand
+ case 1: //nand
return ~(d1 & d2);
- case 2: //or
+ case 2: //or
return d1 | d2;
- case 3: //xor
+ case 3: //xor
return d1 ^ d2;
default:
return 0x00;
diff --git a/src/emu/cpu/hd61700/hd61700.h b/src/emu/cpu/hd61700/hd61700.h
index 3e69ba97378..039d4ce853f 100644
--- a/src/emu/cpu/hd61700/hd61700.h
+++ b/src/emu/cpu/hd61700/hd61700.h
@@ -35,13 +35,13 @@ typedef void (*hd61700_port_w_func)(hd61700_cpu_device &device, UINT8 data);
// device config
struct hd61700_config
{
- hd61700_lcd_control_func m_lcd_control; //lcd control
- hd61700_lcd_data_r_func m_lcd_data_r; //lcd data read
- hd61700_lcd_data_w_func m_lcd_data_w; //lcd data write
- hd61700_kb_r_func m_kb_r; //keyboard matrix read
- hd61700_kb_w_func m_kb_w; //keyboard matrix write
- hd61700_port_r_func m_port_r; //8 bit port read
- hd61700_port_w_func m_port_w; //8 bit port write
+ hd61700_lcd_control_func m_lcd_control; //lcd control
+ hd61700_lcd_data_r_func m_lcd_data_r; //lcd data read
+ hd61700_lcd_data_w_func m_lcd_data_w; //lcd data write
+ hd61700_kb_r_func m_kb_r; //keyboard matrix read
+ hd61700_kb_w_func m_kb_w; //keyboard matrix write
+ hd61700_port_r_func m_port_r; //8 bit port read
+ hd61700_port_w_func m_port_w; //8 bit port write
};
@@ -68,7 +68,7 @@ enum
// ======================> hd61700_cpu_device
class hd61700_cpu_device : public cpu_device,
- public hd61700_config
+ public hd61700_config
{
public:
// construction/destruction
@@ -135,25 +135,25 @@ protected:
UINT16 m_pc;
UINT8 m_flags;
UINT32 m_fetch_addr;
- UINT8 m_regsir[3]; // 5bit register (sx, sy, sz)
- UINT8 m_reg8bit[8]; // 8bit register (pe, pd, ib, ua, ia, ie, tm, tm)
- UINT16 m_reg16bit[8]; // 16bit register (ix, iy, iz, us, ss, ky, ky, ky)
- UINT8 m_regmain[0x20]; // main registers
+ UINT8 m_regsir[3]; // 5bit register (sx, sy, sz)
+ UINT8 m_reg8bit[8]; // 8bit register (pe, pd, ib, ua, ia, ie, tm, tm)
+ UINT16 m_reg16bit[8]; // 16bit register (ix, iy, iz, us, ss, ky, ky, ky)
+ UINT8 m_regmain[0x20]; // main registers
UINT8 m_irq_status;
UINT8 m_state;
- UINT8 prev_ua;
+ UINT8 prev_ua;
int m_lines_status[6];
int m_icount;
address_space *m_program;
// flag definitions
- static const int FLAG_Z = 0x80;
- static const int FLAG_C = 0x40;
- static const int FLAG_LZ = 0x20;
- static const int FLAG_UZ = 0x10;
- static const int FLAG_SW = 0x08;
- static const int FLAG_APO = 0x04;
+ static const int FLAG_Z = 0x80;
+ static const int FLAG_C = 0x40;
+ static const int FLAG_LZ = 0x20;
+ static const int FLAG_UZ = 0x10;
+ static const int FLAG_SW = 0x08;
+ static const int FLAG_APO = 0x04;
};
extern const device_type HD61700;
diff --git a/src/emu/cpu/hd61700/hd61700d.c b/src/emu/cpu/hd61700/hd61700d.c
index b06a16290d6..2b2a9f55cb9 100644
--- a/src/emu/cpu/hd61700/hd61700d.c
+++ b/src/emu/cpu/hd61700/hd61700d.c
@@ -2,9 +2,9 @@
#include "debugger.h"
#include "hd61700.h"
-#define EXT_ROM (pc > 0x0c00)
-#define INC_POS pos += (type+1)
-#define POS (pos + type)
+#define EXT_ROM (pc > 0x0c00)
+#define INC_POS pos += (type+1)
+#define POS (pos + type)
static const char *const reg_5b[4] = {"sx", "sy", "sz", "sz"};
static const char *const reg_8b[8] = {"pe", "pd", "ib", "ua", "ia", "ie", "tm", "tm"};
@@ -42,9 +42,9 @@ enum
struct hd61700_dasm
{
const char *str;
- UINT8 arg1;
- UINT8 arg2;
- bool optjr;
+ UINT8 arg1;
+ UINT8 arg2;
+ bool optjr;
};
static const hd61700_dasm hd61700_ops[256] =
@@ -334,7 +334,7 @@ int dasm_arg(char *buffer, UINT8 op, UINT16 pc, int arg, const UINT8 *oprom, int
case OP_IM7:
{
int tmp = oprom[POS];
- if (tmp&0x80) tmp = 0x80 - tmp;
+ if (tmp&0x80) tmp = 0x80 - tmp;
buffer += sprintf( buffer, "0x%04x", (pc + tmp + EXT_ROM) & 0xffff );
INC_POS;
@@ -357,7 +357,7 @@ int dasm_arg(char *buffer, UINT8 op, UINT16 pc, int arg, const UINT8 *oprom, int
{
UINT8 tmp1 = oprom[POS];
INC_POS;
- if (!EXT_ROM && arg == OP_IM16A) INC_POS;
+ if (!EXT_ROM && arg == OP_IM16A) INC_POS;
UINT8 tmp2 = oprom[POS];
buffer += sprintf( buffer, "0x%04x", ((tmp2<<8) | tmp1));
INC_POS;
@@ -375,18 +375,18 @@ UINT32 get_dasmflags(UINT8 op)
{
switch (op)
{
- case 0x30: case 0x31: case 0x32: case 0x33: //jp
- case 0x34: case 0x35: case 0x36: case 0x37: //jp
- case 0x70: case 0x71: case 0x72: case 0x73: //cal
- case 0x74: case 0x75: case 0x76: case 0x77: //cal
- case 0xb0: case 0xb1: case 0xb2: case 0xb3: //jr
- case 0xb4: case 0xb5: case 0xb6: case 0xb7: //jr
- case 0xde: //jp
- case 0xdf: //jp
+ case 0x30: case 0x31: case 0x32: case 0x33: //jp
+ case 0x34: case 0x35: case 0x36: case 0x37: //jp
+ case 0x70: case 0x71: case 0x72: case 0x73: //cal
+ case 0x74: case 0x75: case 0x76: case 0x77: //cal
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: //jr
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7: //jr
+ case 0xde: //jp
+ case 0xdf: //jp
return DASMFLAG_STEP_OVER;
- case 0xf0: case 0xf1: case 0xf2: case 0xf3: //rtn
- case 0xf4: case 0xf5: case 0xf6: case 0xf7: //rtn
- case 0xfd: //rtni
+ case 0xf0: case 0xf1: case 0xf2: case 0xf3: //rtn
+ case 0xf4: case 0xf5: case 0xf6: case 0xf7: //rtn
+ case 0xfd: //rtni
return DASMFLAG_STEP_OUT;
}
diff --git a/src/emu/cpu/hd6309/6309dasm.c b/src/emu/cpu/hd6309/6309dasm.c
index 37d7f7b9a54..716dc59c525 100644
--- a/src/emu/cpu/hd6309/6309dasm.c
+++ b/src/emu/cpu/hd6309/6309dasm.c
@@ -27,28 +27,28 @@
// Opcode structure
struct opcodeinfo
{
- UINT8 opcode; // 8-bit opcode value
- UINT8 length; // Opcode length in bytes
- char name[6]; // Opcode name
- UINT8 mode; // Addressing mode
- unsigned flags; // Disassembly flags
+ UINT8 opcode; // 8-bit opcode value
+ UINT8 length; // Opcode length in bytes
+ char name[6]; // Opcode name
+ UINT8 mode; // Addressing mode
+ unsigned flags; // Disassembly flags
};
enum hd6309_addressing_modes
{
- INH, // Inherent
- DIR, // Direct
- DIR_IM, // Direct in memory (6309 only)
- IND, // Indexed
- REL, // Relative (8 bit)
- LREL, // Long relative (16 bit)
- EXT, // Extended
- IMM, // Immediate
- IMM_RR, // Register-to-register
- IMM_BW, // Bitwise operations (6309 only)
- IMM_TFM, // Transfer from memory (6309 only)
- PG1, // Switch to page 1 opcodes
- PG2 // Switch to page 2 opcodes
+ INH, // Inherent
+ DIR, // Direct
+ DIR_IM, // Direct in memory (6309 only)
+ IND, // Indexed
+ REL, // Relative (8 bit)
+ LREL, // Long relative (16 bit)
+ EXT, // Extended
+ IMM, // Immediate
+ IMM_RR, // Register-to-register
+ IMM_BW, // Bitwise operations (6309 only)
+ IMM_TFM, // Transfer from memory (6309 only)
+ PG1, // Switch to page 1 opcodes
+ PG2 // Switch to page 2 opcodes
};
// Page 0 opcodes (single byte)
@@ -598,7 +598,7 @@ static const char *const hd6309_teregs[16] =
};
static const char *const hd6309_tfmregs[16] = {
- "D", "X", "Y", "U", "S", "inv", "inv", "inv",
+ "D", "X", "Y", "U", "S", "inv", "inv", "inv",
"inv", "inv", "inv", "inv", "inv", "inv", "inv", "inv"
};
@@ -653,28 +653,28 @@ CPU_DISASSEMBLE( hd6309 )
case INH:
switch (opcode)
{
- case 0x34: // PSHS
- case 0x36: // PSHU
+ case 0x34: // PSHS
+ case 0x36: // PSHU
pb = operandarray[0];
if (pb & 0x80)
buffer += sprintf(buffer, "PC");
if (pb & 0x40)
buffer += sprintf(buffer, "%s%s", (pb&0x80)?",":"", (opcode==0x34)?"U":"S");
if (pb & 0x20)
- buffer += sprintf(buffer, "%sY", (pb&0xc0)?",":"");
+ buffer += sprintf(buffer, "%sY", (pb&0xc0)?",":"");
if (pb & 0x10)
- buffer += sprintf(buffer, "%sX", (pb&0xe0)?",":"");
+ buffer += sprintf(buffer, "%sX", (pb&0xe0)?",":"");
if (pb & 0x08)
- buffer += sprintf(buffer, "%sDP", (pb&0xf0)?",":"");
+ buffer += sprintf(buffer, "%sDP", (pb&0xf0)?",":"");
if (pb & 0x04)
- buffer += sprintf(buffer, "%sB", (pb&0xf8)?",":"");
+ buffer += sprintf(buffer, "%sB", (pb&0xf8)?",":"");
if (pb & 0x02)
buffer += sprintf(buffer, "%sA", (pb&0xfc)?",":"");
if (pb & 0x01)
buffer += sprintf(buffer, "%sCC", (pb&0xfe)?",":"");
break;
- case 0x35: // PULS
- case 0x37: // PULU
+ case 0x35: // PULS
+ case 0x37: // PULU
pb = operandarray[0];
if (pb & 0x01)
buffer += sprintf(buffer, "CC");
@@ -755,7 +755,7 @@ CPU_DISASSEMBLE( hd6309 )
switch (pbm)
{
- case 0x80: // ,R+ or operations relative to W
+ case 0x80: // ,R+ or operations relative to W
if (indirect)
{
switch (reg)
@@ -781,45 +781,45 @@ CPU_DISASSEMBLE( hd6309 )
buffer += sprintf(buffer, ",%s+", hd6309_regs[reg]);
break;
- case 0x81: // ,R++
+ case 0x81: // ,R++
buffer += sprintf(buffer, ",%s++", hd6309_regs[reg]);
break;
- case 0x82: // ,-R
+ case 0x82: // ,-R
if (indirect)
strcpy(buffer, "Illegal Postbyte");
else
buffer += sprintf(buffer, ",-%s", hd6309_regs[reg]);
break;
- case 0x83: // ,--R
+ case 0x83: // ,--R
buffer += sprintf(buffer, ",--%s", hd6309_regs[reg]);
break;
- case 0x84: // ,R
+ case 0x84: // ,R
buffer += sprintf(buffer, ",%s", hd6309_regs[reg]);
break;
- case 0x85: // (+/- B),R
+ case 0x85: // (+/- B),R
buffer += sprintf(buffer, "B,%s", hd6309_regs[reg]);
break;
- case 0x86: // (+/- A),R
+ case 0x86: // (+/- A),R
buffer += sprintf(buffer, "A,%s", hd6309_regs[reg]);
break;
- case 0x87: // (+/- E),R
+ case 0x87: // (+/- E),R
buffer += sprintf(buffer, "E,%s", hd6309_regs[reg]);
break;
- case 0x88: // (+/- 7 bit offset),R
+ case 0x88: // (+/- 7 bit offset),R
offset = (INT8)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,", (offset < 0) ? -offset : offset);
buffer += sprintf(buffer, "%s", hd6309_regs[reg]);
break;
- case 0x89: // (+/- 15 bit offset),R
+ case 0x89: // (+/- 15 bit offset),R
offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
@@ -827,32 +827,32 @@ CPU_DISASSEMBLE( hd6309 )
buffer += sprintf(buffer, "%s", hd6309_regs[reg]);
break;
- case 0x8a: // (+/- F),R
+ case 0x8a: // (+/- F),R
buffer += sprintf(buffer, "F,%s", hd6309_regs[reg]);
break;
- case 0x8b: // (+/- D),R
+ case 0x8b: // (+/- D),R
buffer += sprintf(buffer, "D,%s", hd6309_regs[reg]);
break;
- case 0x8c: // (+/- 7 bit offset),PC
+ case 0x8c: // (+/- 7 bit offset),PC
offset = (INT8)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,PC", (offset < 0) ? -offset : offset);
break;
- case 0x8d: // (+/- 15 bit offset),PC
+ case 0x8d: // (+/- 15 bit offset),PC
offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%04X,PC", (offset < 0) ? -offset : offset);
break;
- case 0x8e: // (+/- W),R
+ case 0x8e: // (+/- W),R
buffer += sprintf(buffer, "W,%s", hd6309_regs[reg]);
break;
- case 0x8f: // address or operations relative to W
+ case 0x8f: // address or operations relative to W
if (indirect)
{
ea = (UINT16)((opram[p+0] << 8) + opram[p+1]);
@@ -883,7 +883,7 @@ CPU_DISASSEMBLE( hd6309 )
}
break;
- default: // (+/- 4 bit offset),R
+ default: // (+/- 4 bit offset),R
offset = pb & 0x1f;
if (offset > 15)
offset = offset - 32;
diff --git a/src/emu/cpu/hd6309/6309ops.c b/src/emu/cpu/hd6309/6309ops.c
index 533185b0e54..a9f72db1b22 100644
--- a/src/emu/cpu/hd6309/6309ops.c
+++ b/src/emu/cpu/hd6309/6309ops.c
@@ -41,14 +41,14 @@ OP_HANDLER( illegal )
static void IIError(m68_state_t *m68_state)
{
- SEII; // Set illegal Instruction Flag
- illegal(m68_state); // Vector to Trap handler
+ SEII; // Set illegal Instruction Flag
+ illegal(m68_state); // Vector to Trap handler
}
static void DZError(m68_state_t *m68_state)
{
- SEDZ; // Set Division by Zero Flag
- illegal(m68_state); // Vector to Trap handler
+ SEDZ; // Set Division by Zero Flag
+ illegal(m68_state); // Vector to Trap handler
}
/* $00 NEG direct ?**** */
@@ -65,7 +65,7 @@ OP_HANDLER( neg_di )
/* $01 OIM direct ?**** */
OP_HANDLER( oim_di )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
DIRBYTE(t);
r = im | t;
@@ -77,7 +77,7 @@ OP_HANDLER( oim_di )
/* $02 AIM direct */
OP_HANDLER( aim_di )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
DIRBYTE(t);
r = im & t;
@@ -113,7 +113,7 @@ OP_HANDLER( lsr_di )
/* $05 EIM direct */
OP_HANDLER( eim_di )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
DIRBYTE(t);
r = im ^ t;
@@ -183,7 +183,7 @@ OP_HANDLER( dec_di )
/* $0B TIM direct */
OP_HANDLER( tim_di )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
DIRBYTE(t);
r = im & t;
@@ -244,10 +244,10 @@ OP_HANDLER( sync )
/* SYNC stops processing instructions until an interrupt request happens. */
/* This doesn't require the corresponding interrupt to be enabled: if it */
/* is disabled, execution continues with the next instruction. */
- m68_state->int_state |= M6809_SYNC; /* HJB 990227 */
+ m68_state->int_state |= M6809_SYNC; /* HJB 990227 */
check_irq_lines(m68_state);
/* if M6809_SYNC has not been cleared by check_irq_lines(m68_state),
- * stop execution until the interrupt lines change. */
+ * stop execution until the interrupt lines change. */
if( m68_state->int_state & M6809_SYNC )
if (m68_state->icount > 0) m68_state->icount = 0;
}
@@ -304,7 +304,7 @@ OP_HANDLER( orcc )
UINT8 t;
IMMBYTE(t);
CC |= t;
- check_irq_lines(m68_state); /* HJB 990116 */
+ check_irq_lines(m68_state); /* HJB 990116 */
}
/* $1B ILLEGAL */
@@ -315,7 +315,7 @@ OP_HANDLER( andcc )
UINT8 t;
IMMBYTE(t);
CC &= t;
- check_irq_lines(m68_state); /* HJB 990116 */
+ check_irq_lines(m68_state); /* HJB 990116 */
}
/* $1D SEX inherent -**-- */
@@ -334,10 +334,10 @@ OP_HANDLER( exg )
{
UINT16 t1,t2;
UINT8 tb;
- int promote = FALSE;
+ int promote = FALSE;
IMMBYTE(tb);
- if( (tb^(tb>>4)) & 0x08 ) /* HJB 990225: mixed 8/16 bit case? */
+ if( (tb^(tb>>4)) & 0x08 ) /* HJB 990225: mixed 8/16 bit case? */
{
promote = TRUE;
}
@@ -422,7 +422,7 @@ OP_HANDLER( tfr )
{
UINT8 tb;
UINT16 t;
- int promote = FALSE;
+ int promote = FALSE;
IMMBYTE(tb);
if( (tb^(tb>>4)) & 0x08 )
@@ -478,7 +478,7 @@ OP_HANDLER( bra )
}
/* $21 BRN relative ----- */
-static UINT8 brn_temp; // hack around GCC 4.6 error because we need the side effects of IMMBYTE
+static UINT8 brn_temp; // hack around GCC 4.6 error because we need the side effects of IMMBYTE
OP_HANDLER( brn )
{
IMMBYTE(brn_temp);
@@ -658,57 +658,57 @@ OP_HANDLER( lble )
LBRANCH( (NXORV || (CC&CC_Z)) );
}
-#define REGREG_PREAMBLE \
- IMMBYTE(tb); \
- if( (tb^(tb>>4)) & 0x08 ) \
- {promote = TRUE;} \
- switch(tb>>4) { \
- case 0: src16Reg = &D; large = TRUE; break; \
- case 1: src16Reg = &X; large = TRUE; break; \
- case 2: src16Reg = &Y; large = TRUE; break; \
- case 3: src16Reg = &U; large = TRUE; break; \
- case 4: src16Reg = &S; large = TRUE; break; \
- case 5: src16Reg = &PC; large = TRUE; break; \
- case 6: src16Reg = &W; large = TRUE; break; \
- case 7: src16Reg = &V; large = TRUE; break; \
- case 8: if (promote) src16Reg = &D; else src8Reg = &A; break; \
- case 9: if (promote) src16Reg = &D; else src8Reg = &B; break; \
- case 10: if (promote) src16Reg = &z16; else src8Reg = &CC; break; \
- case 11: if (promote) src16Reg = &z16; else src8Reg = &DP; break; \
- case 12: if (promote) src16Reg = &z16; else src8Reg = &z8; break; \
- case 13: if (promote) src16Reg = &z16; else src8Reg = &z8; break; \
- case 14: if (promote) src16Reg = &W; else src8Reg = &E; break; \
- default: if (promote) src16Reg = &W; else src8Reg = &F; break; \
- } \
- switch(tb&15) { \
- case 0: dst16Reg = &D; large = TRUE; break; \
- case 1: dst16Reg = &X; large = TRUE; break; \
- case 2: dst16Reg = &Y; large = TRUE; break; \
- case 3: dst16Reg = &U; large = TRUE; break; \
- case 4: dst16Reg = &S; large = TRUE; break; \
- case 5: dst16Reg = &PC; large = TRUE; break; \
- case 6: dst16Reg = &W; large = TRUE; break; \
- case 7: dst16Reg = &V; large = TRUE; break; \
- case 8: if (promote) dst16Reg = &D; else dst8Reg = &A; break; \
- case 9: if (promote) dst16Reg = &D; else dst8Reg = &B; break; \
- case 10: if (promote) dst16Reg = &z16; else dst8Reg = &CC; break; \
- case 11: if (promote) dst16Reg = &z16; else dst8Reg = &DP; break; \
- case 12: if (promote) dst16Reg = &z16; else dst8Reg = &z8; break; \
- case 13: if (promote) dst16Reg = &z16; else dst8Reg = &z8; break; \
- case 14: if (promote) dst16Reg = &W; else dst8Reg = &E; break; \
- default: if (promote) dst16Reg = &W; else dst8Reg = &F; break; \
- } \
+#define REGREG_PREAMBLE \
+ IMMBYTE(tb); \
+ if( (tb^(tb>>4)) & 0x08 ) \
+ {promote = TRUE;} \
+ switch(tb>>4) { \
+ case 0: src16Reg = &D; large = TRUE; break; \
+ case 1: src16Reg = &X; large = TRUE; break; \
+ case 2: src16Reg = &Y; large = TRUE; break; \
+ case 3: src16Reg = &U; large = TRUE; break; \
+ case 4: src16Reg = &S; large = TRUE; break; \
+ case 5: src16Reg = &PC; large = TRUE; break; \
+ case 6: src16Reg = &W; large = TRUE; break; \
+ case 7: src16Reg = &V; large = TRUE; break; \
+ case 8: if (promote) src16Reg = &D; else src8Reg = &A; break; \
+ case 9: if (promote) src16Reg = &D; else src8Reg = &B; break; \
+ case 10: if (promote) src16Reg = &z16; else src8Reg = &CC; break; \
+ case 11: if (promote) src16Reg = &z16; else src8Reg = &DP; break; \
+ case 12: if (promote) src16Reg = &z16; else src8Reg = &z8; break; \
+ case 13: if (promote) src16Reg = &z16; else src8Reg = &z8; break; \
+ case 14: if (promote) src16Reg = &W; else src8Reg = &E; break; \
+ default: if (promote) src16Reg = &W; else src8Reg = &F; break; \
+ } \
+ switch(tb&15) { \
+ case 0: dst16Reg = &D; large = TRUE; break; \
+ case 1: dst16Reg = &X; large = TRUE; break; \
+ case 2: dst16Reg = &Y; large = TRUE; break; \
+ case 3: dst16Reg = &U; large = TRUE; break; \
+ case 4: dst16Reg = &S; large = TRUE; break; \
+ case 5: dst16Reg = &PC; large = TRUE; break; \
+ case 6: dst16Reg = &W; large = TRUE; break; \
+ case 7: dst16Reg = &V; large = TRUE; break; \
+ case 8: if (promote) dst16Reg = &D; else dst8Reg = &A; break; \
+ case 9: if (promote) dst16Reg = &D; else dst8Reg = &B; break; \
+ case 10: if (promote) dst16Reg = &z16; else dst8Reg = &CC; break; \
+ case 11: if (promote) dst16Reg = &z16; else dst8Reg = &DP; break; \
+ case 12: if (promote) dst16Reg = &z16; else dst8Reg = &z8; break; \
+ case 13: if (promote) dst16Reg = &z16; else dst8Reg = &z8; break; \
+ case 14: if (promote) dst16Reg = &W; else dst8Reg = &E; break; \
+ default: if (promote) dst16Reg = &W; else dst8Reg = &F; break; \
+ } \
/* $1030 addr_r r1 + r2 -> r2 */
OP_HANDLER( addr_r )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -731,12 +731,12 @@ OP_HANDLER( addr_r )
OP_HANDLER( adcr )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -760,12 +760,12 @@ OP_HANDLER( adcr )
/* $1032 SUBR r1 - r2 -> r2 */
OP_HANDLER( subr )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -788,12 +788,12 @@ OP_HANDLER( subr )
/* $1033 SBCR r1 - r2 - C -> r2 */
OP_HANDLER( sbcr )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -816,12 +816,12 @@ OP_HANDLER( sbcr )
/* $1034 ANDR r1 & r2 -> r2 */
OP_HANDLER( andr )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -844,12 +844,12 @@ OP_HANDLER( andr )
/* $1035 ORR r1 | r2 -> r2 */
OP_HANDLER( orr )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -872,12 +872,12 @@ OP_HANDLER( orr )
/* $1036 EORR r1 ^ r2 -> r2 */
OP_HANDLER( eorr )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -900,12 +900,12 @@ OP_HANDLER( eorr )
/* $1037 CMPR r1 - r2 */
OP_HANDLER( cmpr )
{
- UINT8 tb, z8 = 0;
- UINT16 z16 = 0, r8;
- UINT32 r16;
- UINT8 *src8Reg = NULL, *dst8Reg = NULL;
- UINT16 *src16Reg = NULL, *dst16Reg = NULL;
- int promote = FALSE, large = FALSE;
+ UINT8 tb, z8 = 0;
+ UINT16 z16 = 0, r8;
+ UINT32 r16;
+ UINT8 *src8Reg = NULL, *dst8Reg = NULL;
+ UINT16 *src16Reg = NULL, *dst16Reg = NULL;
+ int promote = FALSE, large = FALSE;
REGREG_PREAMBLE;
@@ -926,7 +926,7 @@ OP_HANDLER( cmpr )
/* $1138 TFM R0+,R1+ */
OP_HANDLER( tfmpp )
{
- UINT8 tb, srcValue = 0;
+ UINT8 tb, srcValue = 0;
IMMBYTE(tb);
@@ -938,7 +938,7 @@ OP_HANDLER( tfmpp )
case 2: srcValue = RM(Y++); break;
case 3: srcValue = RM(U++); break;
case 4: srcValue = RM(S++); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@@ -947,7 +947,7 @@ OP_HANDLER( tfmpp )
case 2: WM(Y++, srcValue); break;
case 3: WM(U++, srcValue); break;
case 4: WM(S++, srcValue); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;
@@ -960,7 +960,7 @@ OP_HANDLER( tfmpp )
/* $1139 TFM R0-,R1- */
OP_HANDLER( tfmmm )
{
- UINT8 tb, srcValue = 0;
+ UINT8 tb, srcValue = 0;
IMMBYTE(tb);
@@ -972,7 +972,7 @@ OP_HANDLER( tfmmm )
case 2: srcValue = RM(Y--); break;
case 3: srcValue = RM(U--); break;
case 4: srcValue = RM(S--); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@@ -981,7 +981,7 @@ OP_HANDLER( tfmmm )
case 2: WM(Y--, srcValue); break;
case 3: WM(U--, srcValue); break;
case 4: WM(S--, srcValue); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;
@@ -994,7 +994,7 @@ OP_HANDLER( tfmmm )
/* $113A TFM R0+,R1 */
OP_HANDLER( tfmpc )
{
- UINT8 tb, srcValue = 0;
+ UINT8 tb, srcValue = 0;
IMMBYTE(tb);
@@ -1006,7 +1006,7 @@ OP_HANDLER( tfmpc )
case 2: srcValue = RM(Y++); break;
case 3: srcValue = RM(U++); break;
case 4: srcValue = RM(S++); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@@ -1015,7 +1015,7 @@ OP_HANDLER( tfmpc )
case 2: WM(Y, srcValue); break;
case 3: WM(U, srcValue); break;
case 4: WM(S, srcValue); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;
@@ -1028,7 +1028,7 @@ OP_HANDLER( tfmpc )
/* $113B TFM R0,R1+ */
OP_HANDLER( tfmcp )
{
- UINT8 tb, srcValue = 0;
+ UINT8 tb, srcValue = 0;
IMMBYTE(tb);
@@ -1040,7 +1040,7 @@ OP_HANDLER( tfmcp )
case 2: srcValue = RM(Y); break;
case 3: srcValue = RM(U); break;
case 4: srcValue = RM(S); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
switch(tb&15) {
@@ -1049,7 +1049,7 @@ OP_HANDLER( tfmcp )
case 2: WM(Y++, srcValue); break;
case 3: WM(U++, srcValue); break;
case 4: WM(S++, srcValue); break;
- default: IIError(m68_state); return; /* reg PC through F */
+ default: IIError(m68_state); return; /* reg PC through F */
}
PCD = PCD - 3;
@@ -1201,7 +1201,7 @@ OP_HANDLER( rti )
{
UINT8 t;
PULLBYTE(CC);
- t = CC & CC_E; /* HJB 990225: entire state saved? */
+ t = CC & CC_E; /* HJB 990225: entire state saved? */
if(t)
{
m68_state->icount -= 9;
@@ -1219,7 +1219,7 @@ OP_HANDLER( rti )
PULLWORD(UD);
}
PULLWORD(PCD);
- check_irq_lines(m68_state); /* HJB 990116 */
+ check_irq_lines(m68_state); /* HJB 990116 */
}
/* $3C CWAI inherent ----1 */
@@ -1229,11 +1229,11 @@ OP_HANDLER( cwai )
IMMBYTE(t);
CC &= t;
/*
- * CWAI stacks the entire machine state on the hardware stack,
- * then waits for an interrupt; when the interrupt is taken
- * later, the state is *not* saved again after CWAI.
- */
- CC |= CC_E; /* HJB 990225: save entire state */
+ * CWAI stacks the entire machine state on the hardware stack,
+ * then waits for an interrupt; when the interrupt is taken
+ * later, the state is *not* saved again after CWAI.
+ */
+ CC |= CC_E; /* HJB 990225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -1247,8 +1247,8 @@ OP_HANDLER( cwai )
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- m68_state->int_state |= M6809_CWAI; /* HJB 990228 */
- check_irq_lines(m68_state); /* HJB 990116 */
+ m68_state->int_state |= M6809_CWAI; /* HJB 990228 */
+ check_irq_lines(m68_state); /* HJB 990116 */
if( m68_state->int_state & M6809_CWAI )
if( m68_state->icount > 0 )
m68_state->icount = 0;
@@ -1268,7 +1268,7 @@ OP_HANDLER( mul )
/* $3F SWI (SWI2 SWI3) absolute indirect ----- */
OP_HANDLER( swi )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -1282,22 +1282,22 @@ OP_HANDLER( swi )
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD=RM16(m68_state, 0xfffa);
}
/* $1130 BAND */
-#define decodePB_tReg(n) (((n) >> 6) & 0x03)
-#define decodePB_src(n) (((n) >> 3) & 0x07)
-#define decodePB_dst(n) (((n) >> 0) & 0x07)
+#define decodePB_tReg(n) (((n) >> 6) & 0x03)
+#define decodePB_src(n) (((n) >> 3) & 0x07)
+#define decodePB_dst(n) (((n) >> 0) & 0x07)
static const UINT8 bitTable[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
OP_HANDLER( band )
{
- UINT8 pb;
- UINT16 db;
+ UINT8 pb;
+ UINT16 db;
IMMBYTE(pb);
@@ -1313,8 +1313,8 @@ OP_HANDLER( band )
OP_HANDLER( biand )
{
- UINT8 pb;
- UINT16 db;
+ UINT8 pb;
+ UINT16 db;
IMMBYTE(pb);
@@ -1330,8 +1330,8 @@ OP_HANDLER( biand )
OP_HANDLER( bor )
{
- UINT8 pb;
- UINT16 db;
+ UINT8 pb;
+ UINT16 db;
IMMBYTE(pb);
@@ -1347,8 +1347,8 @@ OP_HANDLER( bor )
OP_HANDLER( bior )
{
- UINT8 pb;
- UINT16 db;
+ UINT8 pb;
+ UINT16 db;
IMMBYTE(pb);
@@ -1364,9 +1364,9 @@ OP_HANDLER( bior )
OP_HANDLER( beor )
{
- UINT8 pb;
- UINT16 db;
- UINT8 tReg, tMem;
+ UINT8 pb;
+ UINT16 db;
+ UINT8 tReg, tMem;
IMMBYTE(pb);
@@ -1385,9 +1385,9 @@ OP_HANDLER( beor )
OP_HANDLER( bieor )
{
- UINT8 pb;
- UINT16 db;
- UINT8 tReg, tMem;
+ UINT8 pb;
+ UINT16 db;
+ UINT8 tReg, tMem;
IMMBYTE(pb);
@@ -1406,8 +1406,8 @@ OP_HANDLER( bieor )
OP_HANDLER( ldbt )
{
- UINT8 pb;
- UINT16 db;
+ UINT8 pb;
+ UINT16 db;
IMMBYTE(pb);
@@ -1423,8 +1423,8 @@ OP_HANDLER( ldbt )
OP_HANDLER( stbt )
{
- UINT8 pb;
- UINT16 db;
+ UINT8 pb;
+ UINT16 db;
IMMBYTE(pb);
@@ -1439,7 +1439,7 @@ OP_HANDLER( stbt )
/* $103F SWI2 absolute indirect ----- */
OP_HANDLER( swi2 )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -1459,7 +1459,7 @@ OP_HANDLER( swi2 )
/* $113F SWI3 absolute indirect ----- */
OP_HANDLER( swi3 )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -1970,7 +1970,7 @@ OP_HANDLER( neg_ix )
/* $61 OIM indexed */
OP_HANDLER( oim_ix )
{
- UINT8 r,im;
+ UINT8 r,im;
IMMBYTE(im);
fetch_effective_address(m68_state);
r = im | RM(EAD);
@@ -1982,7 +1982,7 @@ OP_HANDLER( oim_ix )
/* $62 AIM indexed */
OP_HANDLER( aim_ix )
{
- UINT8 r,im;
+ UINT8 r,im;
IMMBYTE(im);
fetch_effective_address(m68_state);
r = im & RM(EAD);
@@ -2018,7 +2018,7 @@ OP_HANDLER( lsr_ix )
/* $65 EIM indexed */
OP_HANDLER( eim_ix )
{
- UINT8 r,im;
+ UINT8 r,im;
IMMBYTE(im);
fetch_effective_address(m68_state);
r = im ^ RM(EAD);
@@ -2090,7 +2090,7 @@ OP_HANDLER( dec_ix )
/* $6B TIM indexed */
OP_HANDLER( tim_ix )
{
- UINT8 r,im,m;
+ UINT8 r,im,m;
IMMBYTE(im);
fetch_effective_address(m68_state);
m = RM(EAD);
@@ -2147,7 +2147,7 @@ OP_HANDLER( neg_ex )
/* $71 OIM extended */
OP_HANDLER( oim_ex )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
EXTBYTE(t);
r = im | t;
@@ -2159,7 +2159,7 @@ OP_HANDLER( oim_ex )
/* $72 AIM extended */
OP_HANDLER( aim_ex )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
EXTBYTE(t);
r = im & t;
@@ -2189,7 +2189,7 @@ OP_HANDLER( lsr_ex )
/* $75 EIM extended */
OP_HANDLER( eim_ex )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
EXTBYTE(t);
r = im ^ t;
@@ -2248,7 +2248,7 @@ OP_HANDLER( dec_ex )
/* $7B TIM extended */
OP_HANDLER( tim_ex )
{
- UINT8 r,t,im;
+ UINT8 r,t,im;
IMMBYTE(im);
EXTBYTE(t);
r = im & t;
@@ -2302,7 +2302,7 @@ OP_HANDLER( suba_im )
/* $81 CMPA immediate ?**** */
OP_HANDLER( cmpa_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = A - t;
CLR_NZVC;
@@ -2312,7 +2312,7 @@ OP_HANDLER( cmpa_im )
/* $82 SBCA immediate ?**** */
OP_HANDLER( sbca_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -2510,7 +2510,7 @@ OP_HANDLER( ldx_im )
/* $CD LDQ immediate -**0- */
OP_HANDLER( ldq_im )
{
- PAIR q;
+ PAIR q;
IMMLONG(q);
D = q.w.h;
@@ -2586,8 +2586,8 @@ OP_HANDLER( divd_im )
/* $118e DIVQ immediate */
OP_HANDLER( divq_im )
{
- PAIR t,q, oldQ;
- INT32 v;
+ PAIR t,q, oldQ;
+ INT32 v;
IMMWORD( t );
@@ -2632,7 +2632,7 @@ OP_HANDLER( divq_im )
/* $90 SUBA direct ?**** */
OP_HANDLER( suba_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t;
CLR_NZVC;
@@ -2643,7 +2643,7 @@ OP_HANDLER( suba_di )
/* $91 CMPA direct ?**** */
OP_HANDLER( cmpa_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t;
CLR_NZVC;
@@ -2653,7 +2653,7 @@ OP_HANDLER( cmpa_di )
/* $92 SBCA direct ?**** */
OP_HANDLER( sbca_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -2859,7 +2859,7 @@ OP_HANDLER( ldx_di )
/* $119f MULD direct -**0- */
OP_HANDLER( muld_di )
{
- PAIR t,q;
+ PAIR t,q;
DIRWORD(t);
q.d = (INT16) D * (INT16)t.w.l;
@@ -2873,7 +2873,7 @@ OP_HANDLER( muld_di )
/* $119d DIVD direct -**0- */
OP_HANDLER( divd_di )
{
- UINT8 t;
+ UINT8 t;
INT16 v, oldD;
DIRBYTE(t);
@@ -2915,8 +2915,8 @@ OP_HANDLER( divd_di )
/* $119e DIVQ direct -**0- */
OP_HANDLER( divq_di )
{
- PAIR t,q, oldQ;
- INT32 v;
+ PAIR t,q, oldQ;
+ INT32 v;
DIRWORD(t);
@@ -2960,7 +2960,7 @@ OP_HANDLER( divq_di )
/* $10dc LDQ direct -**0- */
OP_HANDLER( ldq_di )
{
- PAIR q;
+ PAIR q;
DIRLONG(q);
D = q.w.h;
@@ -2990,7 +2990,7 @@ OP_HANDLER( stx_di )
/* $10dd STQ direct -**0- */
OP_HANDLER( stq_di )
{
- PAIR q;
+ PAIR q;
q.w.h = D;
q.w.l = W;
@@ -3036,7 +3036,7 @@ OP_HANDLER( cmpa_ix )
/* $a2 SBCA indexed ?**** */
OP_HANDLER( sbca_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = A - t - (CC & CC_C);
@@ -3251,8 +3251,8 @@ OP_HANDLER( ldx_ix )
/* $11af MULD indexed -**0- */
OP_HANDLER( muld_ix )
{
- PAIR q;
- UINT16 t;
+ PAIR q;
+ UINT16 t;
fetch_effective_address(m68_state);
t=RM16(m68_state, EAD);
@@ -3267,7 +3267,7 @@ OP_HANDLER( muld_ix )
/* $11ad DIVD indexed -**0- */
OP_HANDLER( divd_ix )
{
- UINT8 t;
+ UINT8 t;
INT16 v, oldD;
fetch_effective_address(m68_state);
@@ -3310,8 +3310,8 @@ OP_HANDLER( divd_ix )
/* $11ae DIVQ indexed -**0- */
OP_HANDLER( divq_ix )
{
- PAIR t,q, oldQ;
- INT32 v;
+ PAIR t,q, oldQ;
+ INT32 v;
fetch_effective_address(m68_state);
t.w.l=RM16(m68_state, EAD);
@@ -3357,7 +3357,7 @@ OP_HANDLER( divq_ix )
/* $10ec LDQ indexed -**0- */
OP_HANDLER( ldq_ix )
{
- PAIR q;
+ PAIR q;
fetch_effective_address(m68_state);
q.d=RM32(m68_state, EAD);
@@ -3389,7 +3389,7 @@ OP_HANDLER( stx_ix )
/* $10ed STQ indexed -**0- */
OP_HANDLER( stq_ix )
{
- PAIR q;
+ PAIR q;
q.w.h = D;
q.w.l = W;
@@ -3412,7 +3412,7 @@ OP_HANDLER( sty_ix )
/* $b0 SUBA extended ?**** */
OP_HANDLER( suba_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZVC;
@@ -3423,7 +3423,7 @@ OP_HANDLER( suba_ex )
/* $b1 CMPA extended ?**** */
OP_HANDLER( cmpa_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZVC;
@@ -3433,7 +3433,7 @@ OP_HANDLER( cmpa_ex )
/* $b2 SBCA extended ?**** */
OP_HANDLER( sbca_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -3638,7 +3638,7 @@ OP_HANDLER( ldx_ex )
/* $11bf MULD extended -**0- */
OP_HANDLER( muld_ex )
{
- PAIR t, q;
+ PAIR t, q;
EXTWORD(t);
q.d = (INT16) D * (INT16)t.w.l;
@@ -3652,7 +3652,7 @@ OP_HANDLER( muld_ex )
/* $11bd DIVD extended -**0- */
OP_HANDLER( divd_ex )
{
- UINT8 t;
+ UINT8 t;
INT16 v, oldD;
EXTBYTE(t);
@@ -3694,8 +3694,8 @@ OP_HANDLER( divd_ex )
/* $11be DIVQ extended -**0- */
OP_HANDLER( divq_ex )
{
- PAIR t,q, oldQ;
- INT32 v;
+ PAIR t,q, oldQ;
+ INT32 v;
EXTWORD(t);
@@ -3740,7 +3740,7 @@ OP_HANDLER( divq_ex )
/* $10fc LDQ extended -**0- */
OP_HANDLER( ldq_ex )
{
- PAIR q;
+ PAIR q;
EXTLONG(q);
D = q.w.h;
@@ -3770,7 +3770,7 @@ OP_HANDLER( stx_ex )
/* $10fd STQ extended -**0- */
OP_HANDLER( stq_ex )
{
- PAIR q;
+ PAIR q;
q.w.h = D;
q.w.l = W;
@@ -3793,7 +3793,7 @@ OP_HANDLER( sty_ex )
/* $c0 SUBB immediate ?**** */
OP_HANDLER( subb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B - t;
CLR_NZVC;
@@ -3804,7 +3804,7 @@ OP_HANDLER( subb_im )
/* $1180 SUBE immediate ?**** */
OP_HANDLER( sube_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = E - t;
CLR_NZVC;
@@ -3815,7 +3815,7 @@ OP_HANDLER( sube_im )
/* $11C0 SUBF immediate ?**** */
OP_HANDLER( subf_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = F - t;
CLR_NZVC;
@@ -3826,7 +3826,7 @@ OP_HANDLER( subf_im )
/* $c1 CMPB immediate ?**** */
OP_HANDLER( cmpb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B - t;
CLR_NZVC; SET_FLAGS8(B,t,r);
@@ -3835,7 +3835,7 @@ OP_HANDLER( cmpb_im )
/* $1181 CMPE immediate ?**** */
OP_HANDLER( cmpe_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = E - t;
CLR_NZVC; SET_FLAGS8(E,t,r);
@@ -3844,7 +3844,7 @@ OP_HANDLER( cmpe_im )
/* $11C1 CMPF immediate ?**** */
OP_HANDLER( cmpf_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = F - t;
CLR_NZVC; SET_FLAGS8(F,t,r);
@@ -3853,7 +3853,7 @@ OP_HANDLER( cmpf_im )
/* $c2 SBCB immediate ?**** */
OP_HANDLER( sbcb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -3864,8 +3864,8 @@ OP_HANDLER( sbcb_im )
/* $1082 SBCD immediate ?**** */
OP_HANDLER( sbcd_im )
{
- PAIR t;
- UINT32 r;
+ PAIR t;
+ UINT32 r;
IMMWORD(t);
r = D - t.w.l - (CC & CC_C);
CLR_NZVC;
@@ -3956,8 +3956,8 @@ OP_HANDLER( bitb_im )
/* $1085 BITD immediate -**0- */
OP_HANDLER( bitd_im )
{
- PAIR t;
- UINT16 r;
+ PAIR t;
+ UINT16 r;
IMMWORD(t);
r = B & t.w.l;
CLR_NZV;
@@ -3968,15 +3968,15 @@ OP_HANDLER( bitd_im )
OP_HANDLER( bitmd_im )
{
/*
- The following is from Darren A.
+ The following is from Darren A.
- The Z flag is the only condition code that should be affected by BITMD.
- For example, when the "Divide-By-Zero" flag (bit 7) is set, BITMD should
- not set the N flag. It should also NOT clear the V flag (unlike the other
- BIT instructions).
+ The Z flag is the only condition code that should be affected by BITMD.
+ For example, when the "Divide-By-Zero" flag (bit 7) is set, BITMD should
+ not set the N flag. It should also NOT clear the V flag (unlike the other
+ BIT instructions).
- His comments come from experimentation and differ from Chris Burke
- */
+ His comments come from experimentation and differ from Chris Burke
+ */
UINT8 t,r;
IMMBYTE(t);
@@ -4054,8 +4054,8 @@ OP_HANDLER( adcb_im )
/* $1089 ADCD immediate ***** */
OP_HANDLER( adcd_im )
{
- PAIR t;
- UINT32 r;
+ PAIR t;
+ UINT32 r;
IMMWORD(t);
r = D + t.w.l + (CC & CC_C);
CLR_NZVC;
@@ -4098,7 +4098,7 @@ OP_HANDLER( addb_im )
/* $cC LDD immediate -**0- */
OP_HANDLER( ldd_im )
{
- PAIR t;
+ PAIR t;
IMMWORD(t);
D=t.w.l;
@@ -4109,7 +4109,7 @@ OP_HANDLER( ldd_im )
/* $1086 LDW immediate -**0- */
OP_HANDLER( ldw_im )
{
- PAIR t;
+ PAIR t;
IMMWORD(t);
W=t.w.l;
CLR_NZV;
@@ -4136,7 +4136,7 @@ OP_HANDLER( lds_im )
/* $d0 SUBB direct ?**** */
OP_HANDLER( subb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B - t;
CLR_NZVC;
@@ -4147,7 +4147,7 @@ OP_HANDLER( subb_di )
/* $1190 SUBE direct ?**** */
OP_HANDLER( sube_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = E - t;
CLR_NZVC;
@@ -4158,7 +4158,7 @@ OP_HANDLER( sube_di )
/* $11d0 SUBF direct ?**** */
OP_HANDLER( subf_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = F - t;
CLR_NZVC;
@@ -4169,7 +4169,7 @@ OP_HANDLER( subf_di )
/* $d1 CMPB direct ?**** */
OP_HANDLER( cmpb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B - t;
CLR_NZVC;
@@ -4179,7 +4179,7 @@ OP_HANDLER( cmpb_di )
/* $1191 CMPE direct ?**** */
OP_HANDLER( cmpe_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = E - t;
CLR_NZVC;
@@ -4189,7 +4189,7 @@ OP_HANDLER( cmpe_di )
/* $11D1 CMPF direct ?**** */
OP_HANDLER( cmpf_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = F - t;
CLR_NZVC;
@@ -4199,7 +4199,7 @@ OP_HANDLER( cmpf_di )
/* $d2 SBCB direct ?**** */
OP_HANDLER( sbcb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -4210,8 +4210,8 @@ OP_HANDLER( sbcb_di )
/* $1092 SBCD direct ?**** */
OP_HANDLER( sbcd_di )
{
- PAIR t;
- UINT32 r;
+ PAIR t;
+ UINT32 r;
DIRWORD(t);
r = D - t.w.l - (CC & CC_C);
CLR_NZVC;
@@ -4302,8 +4302,8 @@ OP_HANDLER( bitb_di )
/* $1095 BITD direct -**0- */
OP_HANDLER( bitd_di )
{
- PAIR t;
- UINT16 r;
+ PAIR t;
+ UINT16 r;
DIRWORD(t);
r = B & t.w.l;
CLR_NZV;
@@ -4396,8 +4396,8 @@ OP_HANDLER( adcb_di )
/* $1099 adcd direct ***** */
OP_HANDLER( adcd_di )
{
- UINT32 r;
- PAIR t;
+ UINT32 r;
+ PAIR t;
DIRWORD(t);
r = D + t.w.l + (CC & CC_C);
@@ -4514,7 +4514,7 @@ OP_HANDLER( sts_di )
/* $e0 SUBB indexed ?**** */
OP_HANDLER( subb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = B - t;
@@ -4526,7 +4526,7 @@ OP_HANDLER( subb_ix )
/* $11a0 SUBE indexed ?**** */
OP_HANDLER( sube_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = E - t;
@@ -4538,7 +4538,7 @@ OP_HANDLER( sube_ix )
/* $11e0 SUBF indexed ?**** */
OP_HANDLER( subf_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = F - t;
@@ -4550,7 +4550,7 @@ OP_HANDLER( subf_ix )
/* $e1 CMPB indexed ?**** */
OP_HANDLER( cmpb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = B - t;
@@ -4561,7 +4561,7 @@ OP_HANDLER( cmpb_ix )
/* $11a1 CMPE indexed ?**** */
OP_HANDLER( cmpe_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = E - t;
@@ -4572,7 +4572,7 @@ OP_HANDLER( cmpe_ix )
/* $11e1 CMPF indexed ?**** */
OP_HANDLER( cmpf_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = F - t;
@@ -4583,7 +4583,7 @@ OP_HANDLER( cmpf_ix )
/* $e2 SBCB indexed ?**** */
OP_HANDLER( sbcb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address(m68_state);
t = RM(EAD);
r = B - t - (CC & CC_C);
@@ -4595,7 +4595,7 @@ OP_HANDLER( sbcb_ix )
/* $10a2 SBCD indexed ?**** */
OP_HANDLER( sbcd_ix )
{
- UINT32 t,r;
+ UINT32 t,r;
fetch_effective_address(m68_state);
t = RM16(m68_state, EAD);
r = D - t - (CC & CC_C);
@@ -4784,8 +4784,8 @@ OP_HANDLER( adcb_ix )
/* $10a9 ADCD indexed ***** */
OP_HANDLER( adcd_ix )
{
- UINT32 r;
- PAIR t;
+ UINT32 r;
+ PAIR t;
fetch_effective_address(m68_state);
t.d = RM16(m68_state, EAD);
r = D + t.d + (CC & CC_C);
@@ -4899,7 +4899,7 @@ OP_HANDLER( sts_ix )
/* $f0 SUBB extended ?**** */
OP_HANDLER( subb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B - t;
CLR_NZVC;
@@ -4910,7 +4910,7 @@ OP_HANDLER( subb_ex )
/* $11b0 SUBE extended ?**** */
OP_HANDLER( sube_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = E - t;
CLR_NZVC;
@@ -4921,7 +4921,7 @@ OP_HANDLER( sube_ex )
/* $11f0 SUBF extended ?**** */
OP_HANDLER( subf_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = F - t;
CLR_NZVC;
@@ -4932,7 +4932,7 @@ OP_HANDLER( subf_ex )
/* $f1 CMPB extended ?**** */
OP_HANDLER( cmpb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B - t;
CLR_NZVC;
@@ -4942,7 +4942,7 @@ OP_HANDLER( cmpb_ex )
/* $11b1 CMPE extended ?**** */
OP_HANDLER( cmpe_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = E - t;
CLR_NZVC;
@@ -4952,7 +4952,7 @@ OP_HANDLER( cmpe_ex )
/* $11f1 CMPF extended ?**** */
OP_HANDLER( cmpf_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = F - t;
CLR_NZVC;
@@ -4962,7 +4962,7 @@ OP_HANDLER( cmpf_ex )
/* $f2 SBCB extended ?**** */
OP_HANDLER( sbcb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -5160,8 +5160,8 @@ OP_HANDLER( adcb_ex )
/* $10b9 ADCD extended ***** */
OP_HANDLER( adcd_ex )
{
- UINT32 r;
- PAIR t;
+ UINT32 r;
+ PAIR t;
EXTWORD(t);
r = D + t.w.l + (CC & CC_C);
CLR_NZVC;
@@ -5279,135 +5279,135 @@ OP_HANDLER( pref10 )
#if BIG_SWITCH
switch( ireg2 )
{
- case 0x21: lbrn(m68_state); break;
- case 0x22: lbhi(m68_state); break;
- case 0x23: lbls(m68_state); break;
- case 0x24: lbcc(m68_state); break;
- case 0x25: lbcs(m68_state); break;
- case 0x26: lbne(m68_state); break;
- case 0x27: lbeq(m68_state); break;
- case 0x28: lbvc(m68_state); break;
- case 0x29: lbvs(m68_state); break;
- case 0x2a: lbpl(m68_state); break;
- case 0x2b: lbmi(m68_state); break;
- case 0x2c: lbge(m68_state); break;
- case 0x2d: lblt(m68_state); break;
- case 0x2e: lbgt(m68_state); break;
- case 0x2f: lble(m68_state); break;
-
- case 0x30: addr_r(m68_state); break;
- case 0x31: adcr(m68_state); break;
- case 0x32: subr(m68_state); break;
- case 0x33: sbcr(m68_state); break;
- case 0x34: andr(m68_state); break;
- case 0x35: orr(m68_state); break;
- case 0x36: eorr(m68_state); break;
- case 0x37: cmpr(m68_state); break;
- case 0x38: pshsw(m68_state); break;
- case 0x39: pulsw(m68_state); break;
- case 0x3a: pshuw(m68_state); break;
- case 0x3b: puluw(m68_state); break;
- case 0x3f: swi2(m68_state); break;
-
- case 0x40: negd(m68_state); break;
- case 0x43: comd(m68_state); break;
- case 0x44: lsrd(m68_state); break;
- case 0x46: rord(m68_state); break;
- case 0x47: asrd(m68_state); break;
- case 0x48: asld(m68_state); break;
- case 0x49: rold(m68_state); break;
- case 0x4a: decd(m68_state); break;
- case 0x4c: incd(m68_state); break;
- case 0x4d: tstd(m68_state); break;
- case 0x4f: clrd(m68_state); break;
-
- case 0x53: comw(m68_state); break;
- case 0x54: lsrw(m68_state); break;
- case 0x56: rorw(m68_state); break;
- case 0x59: rolw(m68_state); break;
- case 0x5a: decw(m68_state); break;
- case 0x5c: incw(m68_state); break;
- case 0x5d: tstw(m68_state); break;
- case 0x5f: clrw(m68_state); break;
-
- case 0x80: subw_im(m68_state); break;
- case 0x81: cmpw_im(m68_state); break;
- case 0x82: sbcd_im(m68_state); break;
- case 0x83: cmpd_im(m68_state); break;
- case 0x84: andd_im(m68_state); break;
- case 0x85: bitd_im(m68_state); break;
- case 0x86: ldw_im(m68_state); break;
- case 0x88: eord_im(m68_state); break;
- case 0x89: adcd_im(m68_state); break;
- case 0x8a: ord_im(m68_state); break;
- case 0x8b: addw_im(m68_state); break;
- case 0x8c: cmpy_im(m68_state); break;
- case 0x8e: ldy_im(m68_state); break;
-
- case 0x90: subw_di(m68_state); break;
- case 0x91: cmpw_di(m68_state); break;
- case 0x92: sbcd_di(m68_state); break;
- case 0x93: cmpd_di(m68_state); break;
- case 0x94: andd_di(m68_state); break;
- case 0x95: bitd_di(m68_state); break;
- case 0x96: ldw_di(m68_state); break;
- case 0x97: stw_di(m68_state); break;
- case 0x98: eord_di(m68_state); break;
- case 0x99: adcd_di(m68_state); break;
- case 0x9a: ord_di(m68_state); break;
- case 0x9b: addw_di(m68_state); break;
- case 0x9c: cmpy_di(m68_state); break;
- case 0x9e: ldy_di(m68_state); break;
- case 0x9f: sty_di(m68_state); break;
-
- case 0xa0: subw_ix(m68_state); break;
- case 0xa1: cmpw_ix(m68_state); break;
- case 0xa2: sbcd_ix(m68_state); break;
- case 0xa3: cmpd_ix(m68_state); break;
- case 0xa4: andd_ix(m68_state); break;
- case 0xa5: bitd_ix(m68_state); break;
- case 0xa6: ldw_ix(m68_state); break;
- case 0xa7: stw_ix(m68_state); break;
- case 0xa8: eord_ix(m68_state); break;
- case 0xa9: adcd_ix(m68_state); break;
- case 0xaa: ord_ix(m68_state); break;
- case 0xab: addw_ix(m68_state); break;
- case 0xac: cmpy_ix(m68_state); break;
- case 0xae: ldy_ix(m68_state); break;
- case 0xaf: sty_ix(m68_state); break;
-
- case 0xb0: subw_ex(m68_state); break;
- case 0xb1: cmpw_ex(m68_state); break;
- case 0xb2: sbcd_ex(m68_state); break;
- case 0xb3: cmpd_ex(m68_state); break;
- case 0xb4: andd_ex(m68_state); break;
- case 0xb5: bitd_ex(m68_state); break;
- case 0xb6: ldw_ex(m68_state); break;
- case 0xb7: stw_ex(m68_state); break;
- case 0xb8: eord_ex(m68_state); break;
- case 0xb9: adcd_ex(m68_state); break;
- case 0xba: ord_ex(m68_state); break;
- case 0xbb: addw_ex(m68_state); break;
- case 0xbc: cmpy_ex(m68_state); break;
- case 0xbe: ldy_ex(m68_state); break;
- case 0xbf: sty_ex(m68_state); break;
-
- case 0xce: lds_im(m68_state); break;
-
- case 0xdc: ldq_di(m68_state); break;
- case 0xdd: stq_di(m68_state); break;
- case 0xde: lds_di(m68_state); break;
- case 0xdf: sts_di(m68_state); break;
-
- case 0xec: ldq_ix(m68_state); break;
- case 0xed: stq_ix(m68_state); break;
- case 0xee: lds_ix(m68_state); break;
- case 0xef: sts_ix(m68_state); break;
-
- case 0xfc: ldq_ex(m68_state); break;
- case 0xfd: stq_ex(m68_state); break;
- case 0xfe: lds_ex(m68_state); break;
- case 0xff: sts_ex(m68_state); break;
+ case 0x21: lbrn(m68_state); break;
+ case 0x22: lbhi(m68_state); break;
+ case 0x23: lbls(m68_state); break;
+ case 0x24: lbcc(m68_state); break;
+ case 0x25: lbcs(m68_state); break;
+ case 0x26: lbne(m68_state); break;
+ case 0x27: lbeq(m68_state); break;
+ case 0x28: lbvc(m68_state); break;
+ case 0x29: lbvs(m68_state); break;
+ case 0x2a: lbpl(m68_state); break;
+ case 0x2b: lbmi(m68_state); break;
+ case 0x2c: lbge(m68_state); break;
+ case 0x2d: lblt(m68_state); break;
+ case 0x2e: lbgt(m68_state); break;
+ case 0x2f: lble(m68_state); break;
+
+ case 0x30: addr_r(m68_state); break;
+ case 0x31: adcr(m68_state); break;
+ case 0x32: subr(m68_state); break;
+ case 0x33: sbcr(m68_state); break;
+ case 0x34: andr(m68_state); break;
+ case 0x35: orr(m68_state); break;
+ case 0x36: eorr(m68_state); break;
+ case 0x37: cmpr(m68_state); break;
+ case 0x38: pshsw(m68_state); break;
+ case 0x39: pulsw(m68_state); break;
+ case 0x3a: pshuw(m68_state); break;
+ case 0x3b: puluw(m68_state); break;
+ case 0x3f: swi2(m68_state); break;
+
+ case 0x40: negd(m68_state); break;
+ case 0x43: comd(m68_state); break;
+ case 0x44: lsrd(m68_state); break;
+ case 0x46: rord(m68_state); break;
+ case 0x47: asrd(m68_state); break;
+ case 0x48: asld(m68_state); break;
+ case 0x49: rold(m68_state); break;
+ case 0x4a: decd(m68_state); break;
+ case 0x4c: incd(m68_state); break;
+ case 0x4d: tstd(m68_state); break;
+ case 0x4f: clrd(m68_state); break;
+
+ case 0x53: comw(m68_state); break;
+ case 0x54: lsrw(m68_state); break;
+ case 0x56: rorw(m68_state); break;
+ case 0x59: rolw(m68_state); break;
+ case 0x5a: decw(m68_state); break;
+ case 0x5c: incw(m68_state); break;
+ case 0x5d: tstw(m68_state); break;
+ case 0x5f: clrw(m68_state); break;
+
+ case 0x80: subw_im(m68_state); break;
+ case 0x81: cmpw_im(m68_state); break;
+ case 0x82: sbcd_im(m68_state); break;
+ case 0x83: cmpd_im(m68_state); break;
+ case 0x84: andd_im(m68_state); break;
+ case 0x85: bitd_im(m68_state); break;
+ case 0x86: ldw_im(m68_state); break;
+ case 0x88: eord_im(m68_state); break;
+ case 0x89: adcd_im(m68_state); break;
+ case 0x8a: ord_im(m68_state); break;
+ case 0x8b: addw_im(m68_state); break;
+ case 0x8c: cmpy_im(m68_state); break;
+ case 0x8e: ldy_im(m68_state); break;
+
+ case 0x90: subw_di(m68_state); break;
+ case 0x91: cmpw_di(m68_state); break;
+ case 0x92: sbcd_di(m68_state); break;
+ case 0x93: cmpd_di(m68_state); break;
+ case 0x94: andd_di(m68_state); break;
+ case 0x95: bitd_di(m68_state); break;
+ case 0x96: ldw_di(m68_state); break;
+ case 0x97: stw_di(m68_state); break;
+ case 0x98: eord_di(m68_state); break;
+ case 0x99: adcd_di(m68_state); break;
+ case 0x9a: ord_di(m68_state); break;
+ case 0x9b: addw_di(m68_state); break;
+ case 0x9c: cmpy_di(m68_state); break;
+ case 0x9e: ldy_di(m68_state); break;
+ case 0x9f: sty_di(m68_state); break;
+
+ case 0xa0: subw_ix(m68_state); break;
+ case 0xa1: cmpw_ix(m68_state); break;
+ case 0xa2: sbcd_ix(m68_state); break;
+ case 0xa3: cmpd_ix(m68_state); break;
+ case 0xa4: andd_ix(m68_state); break;
+ case 0xa5: bitd_ix(m68_state); break;
+ case 0xa6: ldw_ix(m68_state); break;
+ case 0xa7: stw_ix(m68_state); break;
+ case 0xa8: eord_ix(m68_state); break;
+ case 0xa9: adcd_ix(m68_state); break;
+ case 0xaa: ord_ix(m68_state); break;
+ case 0xab: addw_ix(m68_state); break;
+ case 0xac: cmpy_ix(m68_state); break;
+ case 0xae: ldy_ix(m68_state); break;
+ case 0xaf: sty_ix(m68_state); break;
+
+ case 0xb0: subw_ex(m68_state); break;
+ case 0xb1: cmpw_ex(m68_state); break;
+ case 0xb2: sbcd_ex(m68_state); break;
+ case 0xb3: cmpd_ex(m68_state); break;
+ case 0xb4: andd_ex(m68_state); break;
+ case 0xb5: bitd_ex(m68_state); break;
+ case 0xb6: ldw_ex(m68_state); break;
+ case 0xb7: stw_ex(m68_state); break;
+ case 0xb8: eord_ex(m68_state); break;
+ case 0xb9: adcd_ex(m68_state); break;
+ case 0xba: ord_ex(m68_state); break;
+ case 0xbb: addw_ex(m68_state); break;
+ case 0xbc: cmpy_ex(m68_state); break;
+ case 0xbe: ldy_ex(m68_state); break;
+ case 0xbf: sty_ex(m68_state); break;
+
+ case 0xce: lds_im(m68_state); break;
+
+ case 0xdc: ldq_di(m68_state); break;
+ case 0xdd: stq_di(m68_state); break;
+ case 0xde: lds_di(m68_state); break;
+ case 0xdf: sts_di(m68_state); break;
+
+ case 0xec: ldq_ix(m68_state); break;
+ case 0xed: stq_ix(m68_state); break;
+ case 0xee: lds_ix(m68_state); break;
+ case 0xef: sts_ix(m68_state); break;
+
+ case 0xfc: ldq_ex(m68_state); break;
+ case 0xfd: stq_ex(m68_state); break;
+ case 0xfe: lds_ex(m68_state); break;
+ case 0xff: sts_ex(m68_state); break;
default: IIError(m68_state); break;
}
@@ -5429,101 +5429,101 @@ OP_HANDLER( pref11 )
#if BIG_SWITCH
switch( ireg2 )
{
- case 0x30: band(m68_state); break;
- case 0x31: biand(m68_state); break;
- case 0x32: bor(m68_state); break;
- case 0x33: bior(m68_state); break;
- case 0x34: beor(m68_state); break;
- case 0x35: bieor(m68_state); break;
- case 0x36: ldbt(m68_state); break;
- case 0x37: stbt(m68_state); break;
- case 0x38: tfmpp(m68_state); break; /* Timing for TFM is actually 6+3n. */
- case 0x39: tfmmm(m68_state); break; /* To avoid saving the state, I decided */
- case 0x3a: tfmpc(m68_state); break; /* to push the initial 6 cycles to the end */
- case 0x3b: tfmcp(m68_state); break; /* We will soon see how this fairs! */
- case 0x3c: bitmd_im(m68_state); break;
- case 0x3d: ldmd_im(m68_state); break;
- case 0x3f: swi3(m68_state); break;
-
- case 0x43: come(m68_state); break;
- case 0x4a: dece(m68_state); break;
- case 0x4c: ince(m68_state); break;
- case 0x4d: tste(m68_state); break;
- case 0x4f: clre(m68_state); break;
-
- case 0x53: comf(m68_state); break;
- case 0x5a: decf(m68_state); break;
- case 0x5c: incf(m68_state); break;
- case 0x5d: tstf(m68_state); break;
- case 0x5f: clrf(m68_state); break;
-
- case 0x80: sube_im(m68_state); break;
- case 0x81: cmpe_im(m68_state); break;
- case 0x83: cmpu_im(m68_state); break;
- case 0x86: lde_im(m68_state); break;
- case 0x8b: adde_im(m68_state); break;
- case 0x8c: cmps_im(m68_state); break;
- case 0x8d: divd_im(m68_state); break;
- case 0x8e: divq_im(m68_state); break;
- case 0x8f: muld_im(m68_state); break;
-
- case 0x90: sube_di(m68_state); break;
- case 0x91: cmpe_di(m68_state); break;
- case 0x93: cmpu_di(m68_state); break;
- case 0x96: lde_di(m68_state); break;
- case 0x97: ste_di(m68_state); break;
- case 0x9b: adde_di(m68_state); break;
- case 0x9c: cmps_di(m68_state); break;
- case 0x9d: divd_di(m68_state); break;
- case 0x9e: divq_di(m68_state); break;
- case 0x9f: muld_di(m68_state); break;
-
- case 0xa0: sube_ix(m68_state); break;
- case 0xa1: cmpe_ix(m68_state); break;
- case 0xa3: cmpu_ix(m68_state); break;
- case 0xa6: lde_ix(m68_state); break;
- case 0xa7: ste_ix(m68_state); break;
- case 0xab: adde_ix(m68_state); break;
- case 0xac: cmps_ix(m68_state); break;
- case 0xad: divd_ix(m68_state); break;
- case 0xae: divq_ix(m68_state); break;
- case 0xaf: muld_ix(m68_state); break;
-
- case 0xb0: sube_ex(m68_state); break;
- case 0xb1: cmpe_ex(m68_state); break;
- case 0xb3: cmpu_ex(m68_state); break;
- case 0xb6: lde_ex(m68_state); break;
- case 0xb7: ste_ex(m68_state); break;
- case 0xbb: adde_ex(m68_state); break;
- case 0xbc: cmps_ex(m68_state); break;
- case 0xbd: divd_ex(m68_state); break;
- case 0xbe: divq_ex(m68_state); break;
- case 0xbf: muld_ex(m68_state); break;
-
- case 0xc0: subf_im(m68_state); break;
- case 0xc1: cmpf_im(m68_state); break;
- case 0xc6: ldf_im(m68_state); break;
- case 0xcb: addf_im(m68_state); break;
-
- case 0xd0: subf_di(m68_state); break;
- case 0xd1: cmpf_di(m68_state); break;
- case 0xd6: ldf_di(m68_state); break;
- case 0xd7: stf_di(m68_state); break;
- case 0xdb: addf_di(m68_state); break;
-
- case 0xe0: subf_ix(m68_state); break;
- case 0xe1: cmpf_ix(m68_state); break;
- case 0xe6: ldf_ix(m68_state); break;
- case 0xe7: stf_ix(m68_state); break;
- case 0xeb: addf_ix(m68_state); break;
-
- case 0xf0: subf_ex(m68_state); break;
- case 0xf1: cmpf_ex(m68_state); break;
- case 0xf6: ldf_ex(m68_state); break;
- case 0xf7: stf_ex(m68_state); break;
- case 0xfb: addf_ex(m68_state); break;
-
- default: IIError(m68_state); break;
+ case 0x30: band(m68_state); break;
+ case 0x31: biand(m68_state); break;
+ case 0x32: bor(m68_state); break;
+ case 0x33: bior(m68_state); break;
+ case 0x34: beor(m68_state); break;
+ case 0x35: bieor(m68_state); break;
+ case 0x36: ldbt(m68_state); break;
+ case 0x37: stbt(m68_state); break;
+ case 0x38: tfmpp(m68_state); break; /* Timing for TFM is actually 6+3n. */
+ case 0x39: tfmmm(m68_state); break; /* To avoid saving the state, I decided */
+ case 0x3a: tfmpc(m68_state); break; /* to push the initial 6 cycles to the end */
+ case 0x3b: tfmcp(m68_state); break; /* We will soon see how this fairs! */
+ case 0x3c: bitmd_im(m68_state); break;
+ case 0x3d: ldmd_im(m68_state); break;
+ case 0x3f: swi3(m68_state); break;
+
+ case 0x43: come(m68_state); break;
+ case 0x4a: dece(m68_state); break;
+ case 0x4c: ince(m68_state); break;
+ case 0x4d: tste(m68_state); break;
+ case 0x4f: clre(m68_state); break;
+
+ case 0x53: comf(m68_state); break;
+ case 0x5a: decf(m68_state); break;
+ case 0x5c: incf(m68_state); break;
+ case 0x5d: tstf(m68_state); break;
+ case 0x5f: clrf(m68_state); break;
+
+ case 0x80: sube_im(m68_state); break;
+ case 0x81: cmpe_im(m68_state); break;
+ case 0x83: cmpu_im(m68_state); break;
+ case 0x86: lde_im(m68_state); break;
+ case 0x8b: adde_im(m68_state); break;
+ case 0x8c: cmps_im(m68_state); break;
+ case 0x8d: divd_im(m68_state); break;
+ case 0x8e: divq_im(m68_state); break;
+ case 0x8f: muld_im(m68_state); break;
+
+ case 0x90: sube_di(m68_state); break;
+ case 0x91: cmpe_di(m68_state); break;
+ case 0x93: cmpu_di(m68_state); break;
+ case 0x96: lde_di(m68_state); break;
+ case 0x97: ste_di(m68_state); break;
+ case 0x9b: adde_di(m68_state); break;
+ case 0x9c: cmps_di(m68_state); break;
+ case 0x9d: divd_di(m68_state); break;
+ case 0x9e: divq_di(m68_state); break;
+ case 0x9f: muld_di(m68_state); break;
+
+ case 0xa0: sube_ix(m68_state); break;
+ case 0xa1: cmpe_ix(m68_state); break;
+ case 0xa3: cmpu_ix(m68_state); break;
+ case 0xa6: lde_ix(m68_state); break;
+ case 0xa7: ste_ix(m68_state); break;
+ case 0xab: adde_ix(m68_state); break;
+ case 0xac: cmps_ix(m68_state); break;
+ case 0xad: divd_ix(m68_state); break;
+ case 0xae: divq_ix(m68_state); break;
+ case 0xaf: muld_ix(m68_state); break;
+
+ case 0xb0: sube_ex(m68_state); break;
+ case 0xb1: cmpe_ex(m68_state); break;
+ case 0xb3: cmpu_ex(m68_state); break;
+ case 0xb6: lde_ex(m68_state); break;
+ case 0xb7: ste_ex(m68_state); break;
+ case 0xbb: adde_ex(m68_state); break;
+ case 0xbc: cmps_ex(m68_state); break;
+ case 0xbd: divd_ex(m68_state); break;
+ case 0xbe: divq_ex(m68_state); break;
+ case 0xbf: muld_ex(m68_state); break;
+
+ case 0xc0: subf_im(m68_state); break;
+ case 0xc1: cmpf_im(m68_state); break;
+ case 0xc6: ldf_im(m68_state); break;
+ case 0xcb: addf_im(m68_state); break;
+
+ case 0xd0: subf_di(m68_state); break;
+ case 0xd1: cmpf_di(m68_state); break;
+ case 0xd6: ldf_di(m68_state); break;
+ case 0xd7: stf_di(m68_state); break;
+ case 0xdb: addf_di(m68_state); break;
+
+ case 0xe0: subf_ix(m68_state); break;
+ case 0xe1: cmpf_ix(m68_state); break;
+ case 0xe6: ldf_ix(m68_state); break;
+ case 0xe7: stf_ix(m68_state); break;
+ case 0xeb: addf_ix(m68_state); break;
+
+ case 0xf0: subf_ex(m68_state); break;
+ case 0xf1: cmpf_ex(m68_state); break;
+ case 0xf6: ldf_ex(m68_state); break;
+ case 0xf7: stf_ex(m68_state); break;
+ case 0xfb: addf_ex(m68_state); break;
+
+ default: IIError(m68_state); break;
}
#else
@@ -5532,4 +5532,3 @@ OP_HANDLER( pref11 )
#endif /* BIG_SWITCH */
m68_state->icount -= m68_state->cycle_counts_page11[ireg2];
}
-
diff --git a/src/emu/cpu/hd6309/6309tbl.c b/src/emu/cpu/hd6309/6309tbl.c
index 4ae82172247..eee1fea0346 100644
--- a/src/emu/cpu/hd6309/6309tbl.c
+++ b/src/emu/cpu/hd6309/6309tbl.c
@@ -439,7 +439,7 @@ INLINE void tstf(m68_state_t *m68_state);
INLINE void tst_ix(m68_state_t *m68_state);
INLINE void tstw(m68_state_t *m68_state);
-static const UINT8 flags8i[256]= /* increment */
+static const UINT8 flags8i[256]= /* increment */
{
CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -521,8 +521,8 @@ native 6309 */
/* 0xFX */ 4, 5, 19, 5, 3, 4, 4, 4, 4, 7, 4, 5, 4, 6, 4, 19
};
-#define IIP0 19 /* Illegal instruction cycle count page 0 */
-#define IIP1 20 /* Illegal instruction cycle count page 01 & 11 */
+#define IIP0 19 /* Illegal instruction cycle count page 0 */
+#define IIP1 20 /* Illegal instruction cycle count page 01 & 11 */
static const UINT8 ccounts_page0_em[256] = /* Cycle Counts Page zero, Emulated 6809 */
{
@@ -657,52 +657,52 @@ static void (*const hd6309_main[0x100])(m68_state_t *) = {
0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
/* 0x0X */ neg_di, oim_di, aim_di, com_di, lsr_di, eim_di, ror_di, asr_di,
- asl_di, rol_di, dec_di, tim_di, inc_di, tst_di, jmp_di, clr_di,
+ asl_di, rol_di, dec_di, tim_di, inc_di, tst_di, jmp_di, clr_di,
/* 0x1X */ pref10, pref11, nop, sync, sexw, IIError, lbra, lbsr,
- IIError, daa, orcc, IIError, andcc, sex, exg, tfr,
+ IIError, daa, orcc, IIError, andcc, sex, exg, tfr,
/* 0x2X */ bra, brn, bhi, bls, bcc, bcs, bne, beq,
- bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
+ bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
/* 0x3X */ leax, leay, leas, leau, pshs, puls, pshu, pulu,
- IIError, rts, abx, rti, cwai, mul, IIError, swi,
+ IIError, rts, abx, rti, cwai, mul, IIError, swi,
/* 0x4X */ nega, IIError, IIError, coma, lsra, IIError, rora, asra,
- asla, rola, deca, IIError, inca, tsta, IIError, clra,
+ asla, rola, deca, IIError, inca, tsta, IIError, clra,
/* 0x5X */ negb, IIError, IIError, comb, lsrb, IIError, rorb, asrb,
- aslb, rolb, decb, IIError, incb, tstb, IIError, clrb,
+ aslb, rolb, decb, IIError, incb, tstb, IIError, clrb,
/* 0x6X */ neg_ix, oim_ix, aim_ix, com_ix, lsr_ix, eim_ix, ror_ix, asr_ix,
- asl_ix, rol_ix, dec_ix, tim_ix, inc_ix, tst_ix, jmp_ix, clr_ix,
+ asl_ix, rol_ix, dec_ix, tim_ix, inc_ix, tst_ix, jmp_ix, clr_ix,
/* 0x7X */ neg_ex, oim_ex, aim_ex, com_ex, lsr_ex, eim_ex, ror_ex, asr_ex,
- asl_ex, rol_ex, dec_ex, tim_ex, inc_ex, tst_ex, jmp_ex, clr_ex,
+ asl_ex, rol_ex, dec_ex, tim_ex, inc_ex, tst_ex, jmp_ex, clr_ex,
/* 0x8X */ suba_im, cmpa_im, sbca_im, subd_im, anda_im, bita_im, lda_im, IIError,
- eora_im, adca_im, ora_im, adda_im, cmpx_im, bsr, ldx_im, IIError,
+ eora_im, adca_im, ora_im, adda_im, cmpx_im, bsr, ldx_im, IIError,
/* 0x9X */ suba_di, cmpa_di, sbca_di, subd_di, anda_di, bita_di, lda_di, sta_di,
- eora_di, adca_di, ora_di, adda_di, cmpx_di, jsr_di, ldx_di, stx_di,
+ eora_di, adca_di, ora_di, adda_di, cmpx_di, jsr_di, ldx_di, stx_di,
/* 0xAX */ suba_ix, cmpa_ix, sbca_ix, subd_ix, anda_ix, bita_ix, lda_ix, sta_ix,
- eora_ix, adca_ix, ora_ix, adda_ix, cmpx_ix, jsr_ix, ldx_ix, stx_ix,
+ eora_ix, adca_ix, ora_ix, adda_ix, cmpx_ix, jsr_ix, ldx_ix, stx_ix,
/* 0xBX */ suba_ex, cmpa_ex, sbca_ex, subd_ex, anda_ex, bita_ex, lda_ex, sta_ex,
- eora_ex, adca_ex, ora_ex, adda_ex, cmpx_ex, jsr_ex, ldx_ex, stx_ex,
+ eora_ex, adca_ex, ora_ex, adda_ex, cmpx_ex, jsr_ex, ldx_ex, stx_ex,
/* 0xCX */ subb_im, cmpb_im, sbcb_im, addd_im, andb_im, bitb_im, ldb_im, IIError,
- eorb_im, adcb_im, orb_im, addb_im, ldd_im, ldq_im, ldu_im, IIError,
+ eorb_im, adcb_im, orb_im, addb_im, ldd_im, ldq_im, ldu_im, IIError,
/* 0xDX */ subb_di, cmpb_di, sbcb_di, addd_di, andb_di, bitb_di, ldb_di, stb_di,
- eorb_di, adcb_di, orb_di, addb_di, ldd_di, std_di, ldu_di, stu_di,
+ eorb_di, adcb_di, orb_di, addb_di, ldd_di, std_di, ldu_di, stu_di,
/* 0xEX */ subb_ix, cmpb_ix, sbcb_ix, addd_ix, andb_ix, bitb_ix, ldb_ix, stb_ix,
- eorb_ix, adcb_ix, orb_ix, addb_ix, ldd_ix, std_ix, ldu_ix, stu_ix,
+ eorb_ix, adcb_ix, orb_ix, addb_ix, ldd_ix, std_ix, ldu_ix, stu_ix,
/* 0xFX */ subb_ex, cmpb_ex, sbcb_ex, addd_ex, andb_ex, bitb_ex, ldb_ex, stb_ex,
- eorb_ex, adcb_ex, orb_ex, addb_ex, ldd_ex, std_ex, ldu_ex, stu_ex
+ eorb_ex, adcb_ex, orb_ex, addb_ex, ldd_ex, std_ex, ldu_ex, stu_ex
};
static void (*const hd6309_page01[0x100])(m68_state_t *) = {
diff --git a/src/emu/cpu/hd6309/hd6309.c b/src/emu/cpu/hd6309/hd6309.c
index 3742fcf83b3..22ad0c98a5e 100644
--- a/src/emu/cpu/hd6309/hd6309.c
+++ b/src/emu/cpu/hd6309/hd6309.c
@@ -110,40 +110,40 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* 6309 Registers */
struct m68_state_t
{
- PAIR pc; /* Program counter */
- PAIR ppc; /* Previous program counter */
- PAIR d; /* Accumulator a and b */
- PAIR w; /* Accumlator e and f */
+ PAIR pc; /* Program counter */
+ PAIR ppc; /* Previous program counter */
+ PAIR d; /* Accumulator a and b */
+ PAIR w; /* Accumlator e and f */
/* abef = q */
- PAIR dp; /* Direct Page register (page in MSB) */
- PAIR u, s; /* Stack pointers */
- PAIR x, y; /* Index registers */
- UINT8 cc;
- PAIR v; /* New 6309 register */
- UINT8 md; /* Special mode register */
- UINT8 ireg; /* First opcode */
- UINT8 irq_state[2];
-
- int extra_cycles; /* cycles used up by interrupts */
+ PAIR dp; /* Direct Page register (page in MSB) */
+ PAIR u, s; /* Stack pointers */
+ PAIR x, y; /* Index registers */
+ UINT8 cc;
+ PAIR v; /* New 6309 register */
+ UINT8 md; /* Special mode register */
+ UINT8 ireg; /* First opcode */
+ UINT8 irq_state[2];
+
+ int extra_cycles; /* cycles used up by interrupts */
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
- int icount;
- PAIR ea; /* effective address */
+ int icount;
+ PAIR ea; /* effective address */
/* Memory spaces */
- address_space *program;
- direct_read_data *direct;
+ address_space *program;
+ direct_read_data *direct;
- UINT8 int_state; /* SYNC and CWAI flags */
- UINT8 nmi_state;
+ UINT8 int_state; /* SYNC and CWAI flags */
+ UINT8 nmi_state;
- UINT8 dummy_byte;
- UINT8 *regTable[4];
+ UINT8 dummy_byte;
+ UINT8 *regTable[4];
UINT8 const *cycle_counts_page0;
UINT8 const *cycle_counts_page01;
@@ -165,66 +165,66 @@ static void DZError(m68_state_t *m68_state);
INLINE void fetch_effective_address( m68_state_t *m68_state );
/* flag bits in the cc register */
-#define CC_C 0x01 /* Carry */
-#define CC_V 0x02 /* Overflow */
-#define CC_Z 0x04 /* Zero */
-#define CC_N 0x08 /* Negative */
-#define CC_II 0x10 /* Inhibit IRQ */
-#define CC_H 0x20 /* Half (auxiliary) carry */
-#define CC_IF 0x40 /* Inhibit FIRQ */
-#define CC_E 0x80 /* entire state pushed */
+#define CC_C 0x01 /* Carry */
+#define CC_V 0x02 /* Overflow */
+#define CC_Z 0x04 /* Zero */
+#define CC_N 0x08 /* Negative */
+#define CC_II 0x10 /* Inhibit IRQ */
+#define CC_H 0x20 /* Half (auxiliary) carry */
+#define CC_IF 0x40 /* Inhibit FIRQ */
+#define CC_E 0x80 /* entire state pushed */
/* flag bits in the md register */
-#define MD_EM 0x01 /* Execution mode */
-#define MD_FM 0x02 /* FIRQ mode */
-#define MD_II 0x40 /* Illegal instruction */
-#define MD_DZ 0x80 /* Division by zero */
-
-#define pPPC m68_state->ppc
-#define pPC m68_state->pc
-#define pU m68_state->u
-#define pS m68_state->s
-#define pX m68_state->x
-#define pY m68_state->y
-#define pD m68_state->d
-
-#define pV m68_state->v
-#define pW m68_state->w
+#define MD_EM 0x01 /* Execution mode */
+#define MD_FM 0x02 /* FIRQ mode */
+#define MD_II 0x40 /* Illegal instruction */
+#define MD_DZ 0x80 /* Division by zero */
+
+#define pPPC m68_state->ppc
+#define pPC m68_state->pc
+#define pU m68_state->u
+#define pS m68_state->s
+#define pX m68_state->x
+#define pY m68_state->y
+#define pD m68_state->d
+
+#define pV m68_state->v
+#define pW m68_state->w
/* #define pQ m68_state->q */
/* #define pZ m68_state->z */
-#define PPC m68_state->ppc.w.l
-#define PC m68_state->pc.w.l
-#define PCD m68_state->pc.d
-#define U m68_state->u.w.l
-#define UD m68_state->u.d
-#define S m68_state->s.w.l
-#define SD m68_state->s.d
-#define X m68_state->x.w.l
-#define XD m68_state->x.d
-#define Y m68_state->y.w.l
-#define YD m68_state->y.d
-#define V m68_state->v.w.l
-#define VD m68_state->v.d
-#define D m68_state->d.w.l
-#define A m68_state->d.b.h
-#define B m68_state->d.b.l
-#define W m68_state->w.w.l
-#define E m68_state->w.b.h
-#define F m68_state->w.b.l
-#define DP m68_state->dp.b.h
-#define DPD m68_state->dp.d
-#define CC m68_state->cc
-#define MD m68_state->md
-
-#define EA m68_state->ea.w.l
+#define PPC m68_state->ppc.w.l
+#define PC m68_state->pc.w.l
+#define PCD m68_state->pc.d
+#define U m68_state->u.w.l
+#define UD m68_state->u.d
+#define S m68_state->s.w.l
+#define SD m68_state->s.d
+#define X m68_state->x.w.l
+#define XD m68_state->x.d
+#define Y m68_state->y.w.l
+#define YD m68_state->y.d
+#define V m68_state->v.w.l
+#define VD m68_state->v.d
+#define D m68_state->d.w.l
+#define A m68_state->d.b.h
+#define B m68_state->d.b.l
+#define W m68_state->w.w.l
+#define E m68_state->w.b.h
+#define F m68_state->w.b.l
+#define DP m68_state->dp.b.h
+#define DPD m68_state->dp.d
+#define CC m68_state->cc
+#define MD m68_state->md
+
+#define EA m68_state->ea.w.l
#define EAD m68_state->ea.d
#define EAP m68_state->ea
-#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */
-#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */
-#define M6809_LDS 32 /* set when LDS occurred at least once */
+#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */
+#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */
+#define M6809_LDS 32 /* set when LDS occurred at least once */
/****************************************************************************/
/* Read a byte from given memory location */
@@ -251,9 +251,9 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#define ROP_ARG(Addr) ((unsigned)m68_state->direct->read_raw_byte(Addr))
/* macros to access memory */
-#define IMMBYTE(b) b = ROP_ARG(PCD); PC++
-#define IMMWORD(w) w.d = (ROP_ARG(PCD)<<8) | ROP_ARG((PCD+1)&0xffff); PC+=2
-#define IMMLONG(w) w.d = (ROP_ARG(PCD)<<24) + (ROP_ARG(PCD+1)<<16) + (ROP_ARG(PCD+2)<<8) + (ROP_ARG(PCD+3)); PC+=4
+#define IMMBYTE(b) b = ROP_ARG(PCD); PC++
+#define IMMWORD(w) w.d = (ROP_ARG(PCD)<<8) | ROP_ARG((PCD+1)&0xffff); PC+=2
+#define IMMLONG(w) w.d = (ROP_ARG(PCD)<<24) + (ROP_ARG(PCD+1)<<16) + (ROP_ARG(PCD+2)<<8) + (ROP_ARG(PCD+3)); PC+=4
#define PUSHBYTE(b) --S; WM(SD,b)
#define PUSHWORD(w) --S; WM(SD,w.b.l); --S; WM(SD,w.b.h)
@@ -265,39 +265,39 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#define PULUBYTE(b) b = RM(UD); U++
#define PULUWORD(w) w = RM(UD)<<8; U++; w |= RM(UD); U++
-#define CLR_HNZVC CC&=~(CC_H|CC_N|CC_Z|CC_V|CC_C)
-#define CLR_NZV CC&=~(CC_N|CC_Z|CC_V)
-#define CLR_NZ CC&=~(CC_N|CC_Z)
-#define CLR_HNZC CC&=~(CC_H|CC_N|CC_Z|CC_C)
-#define CLR_NZVC CC&=~(CC_N|CC_Z|CC_V|CC_C)
-#define CLR_Z CC&=~(CC_Z)
-#define CLR_N CC&=~(CC_N)
-#define CLR_NZC CC&=~(CC_N|CC_Z|CC_C)
-#define CLR_ZC CC&=~(CC_Z|CC_C)
+#define CLR_HNZVC CC&=~(CC_H|CC_N|CC_Z|CC_V|CC_C)
+#define CLR_NZV CC&=~(CC_N|CC_Z|CC_V)
+#define CLR_NZ CC&=~(CC_N|CC_Z)
+#define CLR_HNZC CC&=~(CC_H|CC_N|CC_Z|CC_C)
+#define CLR_NZVC CC&=~(CC_N|CC_Z|CC_V|CC_C)
+#define CLR_Z CC&=~(CC_Z)
+#define CLR_N CC&=~(CC_N)
+#define CLR_NZC CC&=~(CC_N|CC_Z|CC_C)
+#define CLR_ZC CC&=~(CC_Z|CC_C)
/* macros for CC -- CC bits affected should be reset before calling */
-#define SET_Z(a) if(!a)SEZ
-#define SET_Z8(a) SET_Z((UINT8)a)
-#define SET_Z16(a) SET_Z((UINT16)a)
-#define SET_N8(a) CC|=((a&0x80)>>4)
-#define SET_N16(a) CC|=((a&0x8000)>>12)
-#define SET_N32(a) CC|=((a&0x8000)>>20)
-#define SET_H(a,b,r) CC|=(((a^b^r)&0x10)<<1)
-#define SET_C8(a) CC|=((a&0x100)>>8)
-#define SET_C16(a) CC|=((a&0x10000)>>16)
-#define SET_V8(a,b,r) CC|=(((a^b^r^(r>>1))&0x80)>>6)
-#define SET_V16(a,b,r) CC|=(((a^b^r^(r>>1))&0x8000)>>14)
-
-#define SET_FLAGS8I(a) {CC|=flags8i[(a)&0xff];}
-#define SET_FLAGS8D(a) {CC|=flags8d[(a)&0xff];}
+#define SET_Z(a) if(!a)SEZ
+#define SET_Z8(a) SET_Z((UINT8)a)
+#define SET_Z16(a) SET_Z((UINT16)a)
+#define SET_N8(a) CC|=((a&0x80)>>4)
+#define SET_N16(a) CC|=((a&0x8000)>>12)
+#define SET_N32(a) CC|=((a&0x8000)>>20)
+#define SET_H(a,b,r) CC|=(((a^b^r)&0x10)<<1)
+#define SET_C8(a) CC|=((a&0x100)>>8)
+#define SET_C16(a) CC|=((a&0x10000)>>16)
+#define SET_V8(a,b,r) CC|=(((a^b^r^(r>>1))&0x80)>>6)
+#define SET_V16(a,b,r) CC|=(((a^b^r^(r>>1))&0x8000)>>14)
+
+#define SET_FLAGS8I(a) {CC|=flags8i[(a)&0xff];}
+#define SET_FLAGS8D(a) {CC|=flags8d[(a)&0xff];}
/* combos */
-#define SET_NZ8(a) {SET_N8(a);SET_Z(a);}
-#define SET_NZ16(a) {SET_N16(a);SET_Z(a);}
-#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
-#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
+#define SET_NZ8(a) {SET_N8(a);SET_Z(a);}
+#define SET_NZ16(a) {SET_N16(a);SET_Z(a);}
+#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
+#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
-#define NXORV ((CC&CC_N)^((CC&CC_V)<<2))
+#define NXORV ((CC&CC_N)^((CC&CC_V)<<2))
/* for treating an unsigned byte as a signed word */
#define SIGNED(b) ((UINT16)(b&0x80?b|0xff00:b))
@@ -306,9 +306,9 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#define SIGNED_16(b) ((UINT32)(b&0x8000?b|0xffff0000:b))
/* macros for addressing modes (postbytes have their own code) */
-#define DIRECT EAD = DPD; IMMBYTE(m68_state->ea.b.l)
-#define IMM8 EAD = PCD; PC++
-#define IMM16 EAD = PCD; PC+=2
+#define DIRECT EAD = DPD; IMMBYTE(m68_state->ea.b.l)
+#define IMM8 EAD = PCD; PC++
+#define IMM16 EAD = PCD; PC+=2
#define EXTENDED IMMWORD(EAP)
/* macros to set status flags */
@@ -349,24 +349,24 @@ INLINE void fetch_effective_address( m68_state_t *m68_state );
#include "6309tbl.c"
/* macros for branch instructions */
-#define BRANCH(f) { \
- UINT8 t; \
- IMMBYTE(t); \
- if( f ) \
- { \
- PC += SIGNED(t); \
- } \
+#define BRANCH(f) { \
+ UINT8 t; \
+ IMMBYTE(t); \
+ if( f ) \
+ { \
+ PC += SIGNED(t); \
+ } \
}
-#define LBRANCH(f) { \
- PAIR t; \
- IMMWORD(t); \
- if( f ) \
- { \
- if( !(MD & MD_EM) ) \
- m68_state->icount -= 1; \
- PC += t.w.l; \
- } \
+#define LBRANCH(f) { \
+ PAIR t; \
+ IMMWORD(t); \
+ if( f ) \
+ { \
+ if( !(MD & MD_EM) ) \
+ m68_state->icount -= 1; \
+ PC += t.w.l; \
+ } \
}
/* macros for setting/getting registers in TFR/EXG instructions */
@@ -430,13 +430,13 @@ static void check_irq_lines( m68_state_t *m68_state )
if( m68_state->int_state & M6809_CWAI )
{
m68_state->int_state &= ~M6809_CWAI;
- m68_state->extra_cycles += 7; /* subtract +7 cycles */
+ m68_state->extra_cycles += 7; /* subtract +7 cycles */
}
else
{
if ( MD & MD_FM )
{
- CC |= CC_E; /* save entire state */
+ CC |= CC_E; /* save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -451,17 +451,17 @@ static void check_irq_lines( m68_state_t *m68_state )
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- m68_state->extra_cycles += 19; /* subtract +19 cycles */
+ m68_state->extra_cycles += 19; /* subtract +19 cycles */
}
else
{
- CC &= ~CC_E; /* save 'short' state */
+ CC &= ~CC_E; /* save 'short' state */
PUSHWORD(pPC);
PUSHBYTE(CC);
- m68_state->extra_cycles += 10; /* subtract +10 cycles */
+ m68_state->extra_cycles += 10; /* subtract +10 cycles */
}
}
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD=RM16(m68_state, 0xfff6);
(void)(*m68_state->irq_callback)(m68_state->device, HD6309_FIRQ_LINE);
}
@@ -473,11 +473,11 @@ static void check_irq_lines( m68_state_t *m68_state )
if( m68_state->int_state & M6809_CWAI )
{
m68_state->int_state &= ~M6809_CWAI; /* clear CWAI flag */
- m68_state->extra_cycles += 7; /* subtract +7 cycles */
+ m68_state->extra_cycles += 7; /* subtract +7 cycles */
}
else
{
- CC |= CC_E; /* save entire state */
+ CC |= CC_E; /* save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -492,9 +492,9 @@ static void check_irq_lines( m68_state_t *m68_state )
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- m68_state->extra_cycles += 19; /* subtract +19 cycles */
+ m68_state->extra_cycles += 19; /* subtract +19 cycles */
}
- CC |= CC_II; /* inhibit IRQ */
+ CC |= CC_II; /* inhibit IRQ */
PCD=RM16(m68_state, 0xfff8);
(void)(*m68_state->irq_callback)(m68_state->device, HD6309_IRQ_LINE);
}
@@ -556,11 +556,11 @@ static CPU_RESET( hd6309 )
m68_state->irq_state[0] = CLEAR_LINE;
m68_state->irq_state[1] = CLEAR_LINE;
- DPD = 0; /* Reset direct page register */
+ DPD = 0; /* Reset direct page register */
- MD = 0; /* Mode register gets reset */
- CC |= CC_II; /* IRQ disabled */
- CC |= CC_IF; /* FIRQ disabled */
+ MD = 0; /* Mode register gets reset */
+ CC |= CC_II; /* IRQ disabled */
+ CC |= CC_IF; /* FIRQ disabled */
PCD = RM16(m68_state, 0xfffe);
UpdateState(m68_state);
@@ -591,11 +591,11 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
if( m68_state->int_state & M6809_CWAI )
{
m68_state->int_state &= ~M6809_CWAI;
- m68_state->extra_cycles += 7; /* subtract +7 cycles next time */
+ m68_state->extra_cycles += 7; /* subtract +7 cycles next time */
}
else
{
- CC |= CC_E; /* save entire state */
+ CC |= CC_E; /* save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -611,9 +611,9 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- m68_state->extra_cycles += 19; /* subtract +19 cycles next time */
+ m68_state->extra_cycles += 19; /* subtract +19 cycles next time */
}
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD = RM16(m68_state, 0xfffc);
}
else if (irqline < 2)
@@ -631,7 +631,7 @@ static void set_irq_line(m68_state_t *m68_state, int irqline, int state)
#include "6309ops.c"
/* execute instructions on this CPU until icount expires */
-static CPU_EXECUTE( hd6309 ) /* NS 970908 */
+static CPU_EXECUTE( hd6309 ) /* NS 970908 */
{
m68_state_t *m68_state = get_safe_token(device);
@@ -658,262 +658,262 @@ static CPU_EXECUTE( hd6309 ) /* NS 970908 */
#if BIG_SWITCH
switch( m68_state->ireg )
{
- case 0x00: neg_di(m68_state); break;
- case 0x01: oim_di(m68_state); break;
- case 0x02: aim_di(m68_state); break;
- case 0x03: com_di(m68_state); break;
- case 0x04: lsr_di(m68_state); break;
- case 0x05: eim_di(m68_state); break;
- case 0x06: ror_di(m68_state); break;
- case 0x07: asr_di(m68_state); break;
- case 0x08: asl_di(m68_state); break;
- case 0x09: rol_di(m68_state); break;
- case 0x0a: dec_di(m68_state); break;
- case 0x0b: tim_di(m68_state); break;
- case 0x0c: inc_di(m68_state); break;
- case 0x0d: tst_di(m68_state); break;
- case 0x0e: jmp_di(m68_state); break;
- case 0x0f: clr_di(m68_state); break;
- case 0x10: pref10(m68_state); break;
- case 0x11: pref11(m68_state); break;
- case 0x12: nop(m68_state); break;
- case 0x13: sync(m68_state); break;
- case 0x14: sexw(m68_state); break;
- case 0x15: IIError(m68_state); break;
- case 0x16: lbra(m68_state); break;
- case 0x17: lbsr(m68_state); break;
- case 0x18: IIError(m68_state); break;
- case 0x19: daa(m68_state); break;
- case 0x1a: orcc(m68_state); break;
- case 0x1b: IIError(m68_state); break;
- case 0x1c: andcc(m68_state); break;
- case 0x1d: sex(m68_state); break;
- case 0x1e: exg(m68_state); break;
- case 0x1f: tfr(m68_state); break;
- case 0x20: bra(m68_state); break;
- case 0x21: brn(m68_state); break;
- case 0x22: bhi(m68_state); break;
- case 0x23: bls(m68_state); break;
- case 0x24: bcc(m68_state); break;
- case 0x25: bcs(m68_state); break;
- case 0x26: bne(m68_state); break;
- case 0x27: beq(m68_state); break;
- case 0x28: bvc(m68_state); break;
- case 0x29: bvs(m68_state); break;
- case 0x2a: bpl(m68_state); break;
- case 0x2b: bmi(m68_state); break;
- case 0x2c: bge(m68_state); break;
- case 0x2d: blt(m68_state); break;
- case 0x2e: bgt(m68_state); break;
- case 0x2f: ble(m68_state); break;
- case 0x30: leax(m68_state); break;
- case 0x31: leay(m68_state); break;
- case 0x32: leas(m68_state); break;
- case 0x33: leau(m68_state); break;
- case 0x34: pshs(m68_state); break;
- case 0x35: puls(m68_state); break;
- case 0x36: pshu(m68_state); break;
- case 0x37: pulu(m68_state); break;
- case 0x38: IIError(m68_state); break;
- case 0x39: rts(m68_state); break;
- case 0x3a: abx(m68_state); break;
- case 0x3b: rti(m68_state); break;
- case 0x3c: cwai(m68_state); break;
- case 0x3d: mul(m68_state); break;
- case 0x3e: IIError(m68_state); break;
- case 0x3f: swi(m68_state); break;
- case 0x40: nega(m68_state); break;
- case 0x41: IIError(m68_state); break;
- case 0x42: IIError(m68_state); break;
- case 0x43: coma(m68_state); break;
- case 0x44: lsra(m68_state); break;
- case 0x45: IIError(m68_state); break;
- case 0x46: rora(m68_state); break;
- case 0x47: asra(m68_state); break;
- case 0x48: asla(m68_state); break;
- case 0x49: rola(m68_state); break;
- case 0x4a: deca(m68_state); break;
- case 0x4b: IIError(m68_state); break;
- case 0x4c: inca(m68_state); break;
- case 0x4d: tsta(m68_state); break;
- case 0x4e: IIError(m68_state); break;
- case 0x4f: clra(m68_state); break;
- case 0x50: negb(m68_state); break;
- case 0x51: IIError(m68_state); break;
- case 0x52: IIError(m68_state); break;
- case 0x53: comb(m68_state); break;
- case 0x54: lsrb(m68_state); break;
- case 0x55: IIError(m68_state); break;
- case 0x56: rorb(m68_state); break;
- case 0x57: asrb(m68_state); break;
- case 0x58: aslb(m68_state); break;
- case 0x59: rolb(m68_state); break;
- case 0x5a: decb(m68_state); break;
- case 0x5b: IIError(m68_state); break;
- case 0x5c: incb(m68_state); break;
- case 0x5d: tstb(m68_state); break;
- case 0x5e: IIError(m68_state); break;
- case 0x5f: clrb(m68_state); break;
- case 0x60: neg_ix(m68_state); break;
- case 0x61: oim_ix(m68_state); break;
- case 0x62: aim_ix(m68_state); break;
- case 0x63: com_ix(m68_state); break;
- case 0x64: lsr_ix(m68_state); break;
- case 0x65: eim_ix(m68_state); break;
- case 0x66: ror_ix(m68_state); break;
- case 0x67: asr_ix(m68_state); break;
- case 0x68: asl_ix(m68_state); break;
- case 0x69: rol_ix(m68_state); break;
- case 0x6a: dec_ix(m68_state); break;
- case 0x6b: tim_ix(m68_state); break;
- case 0x6c: inc_ix(m68_state); break;
- case 0x6d: tst_ix(m68_state); break;
- case 0x6e: jmp_ix(m68_state); break;
- case 0x6f: clr_ix(m68_state); break;
- case 0x70: neg_ex(m68_state); break;
- case 0x71: oim_ex(m68_state); break;
- case 0x72: aim_ex(m68_state); break;
- case 0x73: com_ex(m68_state); break;
- case 0x74: lsr_ex(m68_state); break;
- case 0x75: eim_ex(m68_state); break;
- case 0x76: ror_ex(m68_state); break;
- case 0x77: asr_ex(m68_state); break;
- case 0x78: asl_ex(m68_state); break;
- case 0x79: rol_ex(m68_state); break;
- case 0x7a: dec_ex(m68_state); break;
- case 0x7b: tim_ex(m68_state); break;
- case 0x7c: inc_ex(m68_state); break;
- case 0x7d: tst_ex(m68_state); break;
- case 0x7e: jmp_ex(m68_state); break;
- case 0x7f: clr_ex(m68_state); break;
- case 0x80: suba_im(m68_state); break;
- case 0x81: cmpa_im(m68_state); break;
- case 0x82: sbca_im(m68_state); break;
- case 0x83: subd_im(m68_state); break;
- case 0x84: anda_im(m68_state); break;
- case 0x85: bita_im(m68_state); break;
- case 0x86: lda_im(m68_state); break;
- case 0x87: IIError(m68_state); break;
- case 0x88: eora_im(m68_state); break;
- case 0x89: adca_im(m68_state); break;
- case 0x8a: ora_im(m68_state); break;
- case 0x8b: adda_im(m68_state); break;
- case 0x8c: cmpx_im(m68_state); break;
- case 0x8d: bsr(m68_state); break;
- case 0x8e: ldx_im(m68_state); break;
- case 0x8f: IIError(m68_state); break;
- case 0x90: suba_di(m68_state); break;
- case 0x91: cmpa_di(m68_state); break;
- case 0x92: sbca_di(m68_state); break;
- case 0x93: subd_di(m68_state); break;
- case 0x94: anda_di(m68_state); break;
- case 0x95: bita_di(m68_state); break;
- case 0x96: lda_di(m68_state); break;
- case 0x97: sta_di(m68_state); break;
- case 0x98: eora_di(m68_state); break;
- case 0x99: adca_di(m68_state); break;
- case 0x9a: ora_di(m68_state); break;
- case 0x9b: adda_di(m68_state); break;
- case 0x9c: cmpx_di(m68_state); break;
- case 0x9d: jsr_di(m68_state); break;
- case 0x9e: ldx_di(m68_state); break;
- case 0x9f: stx_di(m68_state); break;
- case 0xa0: suba_ix(m68_state); break;
- case 0xa1: cmpa_ix(m68_state); break;
- case 0xa2: sbca_ix(m68_state); break;
- case 0xa3: subd_ix(m68_state); break;
- case 0xa4: anda_ix(m68_state); break;
- case 0xa5: bita_ix(m68_state); break;
- case 0xa6: lda_ix(m68_state); break;
- case 0xa7: sta_ix(m68_state); break;
- case 0xa8: eora_ix(m68_state); break;
- case 0xa9: adca_ix(m68_state); break;
- case 0xaa: ora_ix(m68_state); break;
- case 0xab: adda_ix(m68_state); break;
- case 0xac: cmpx_ix(m68_state); break;
- case 0xad: jsr_ix(m68_state); break;
- case 0xae: ldx_ix(m68_state); break;
- case 0xaf: stx_ix(m68_state); break;
- case 0xb0: suba_ex(m68_state); break;
- case 0xb1: cmpa_ex(m68_state); break;
- case 0xb2: sbca_ex(m68_state); break;
- case 0xb3: subd_ex(m68_state); break;
- case 0xb4: anda_ex(m68_state); break;
- case 0xb5: bita_ex(m68_state); break;
- case 0xb6: lda_ex(m68_state); break;
- case 0xb7: sta_ex(m68_state); break;
- case 0xb8: eora_ex(m68_state); break;
- case 0xb9: adca_ex(m68_state); break;
- case 0xba: ora_ex(m68_state); break;
- case 0xbb: adda_ex(m68_state); break;
- case 0xbc: cmpx_ex(m68_state); break;
- case 0xbd: jsr_ex(m68_state); break;
- case 0xbe: ldx_ex(m68_state); break;
- case 0xbf: stx_ex(m68_state); break;
- case 0xc0: subb_im(m68_state); break;
- case 0xc1: cmpb_im(m68_state); break;
- case 0xc2: sbcb_im(m68_state); break;
- case 0xc3: addd_im(m68_state); break;
- case 0xc4: andb_im(m68_state); break;
- case 0xc5: bitb_im(m68_state); break;
- case 0xc6: ldb_im(m68_state); break;
- case 0xc7: IIError(m68_state); break;
- case 0xc8: eorb_im(m68_state); break;
- case 0xc9: adcb_im(m68_state); break;
- case 0xca: orb_im(m68_state); break;
- case 0xcb: addb_im(m68_state); break;
- case 0xcc: ldd_im(m68_state); break;
- case 0xcd: ldq_im(m68_state); break; /* in m6809 was std_im */
- case 0xce: ldu_im(m68_state); break;
- case 0xcf: IIError(m68_state); break;
- case 0xd0: subb_di(m68_state); break;
- case 0xd1: cmpb_di(m68_state); break;
- case 0xd2: sbcb_di(m68_state); break;
- case 0xd3: addd_di(m68_state); break;
- case 0xd4: andb_di(m68_state); break;
- case 0xd5: bitb_di(m68_state); break;
- case 0xd6: ldb_di(m68_state); break;
- case 0xd7: stb_di(m68_state); break;
- case 0xd8: eorb_di(m68_state); break;
- case 0xd9: adcb_di(m68_state); break;
- case 0xda: orb_di(m68_state); break;
- case 0xdb: addb_di(m68_state); break;
- case 0xdc: ldd_di(m68_state); break;
- case 0xdd: std_di(m68_state); break;
- case 0xde: ldu_di(m68_state); break;
- case 0xdf: stu_di(m68_state); break;
- case 0xe0: subb_ix(m68_state); break;
- case 0xe1: cmpb_ix(m68_state); break;
- case 0xe2: sbcb_ix(m68_state); break;
- case 0xe3: addd_ix(m68_state); break;
- case 0xe4: andb_ix(m68_state); break;
- case 0xe5: bitb_ix(m68_state); break;
- case 0xe6: ldb_ix(m68_state); break;
- case 0xe7: stb_ix(m68_state); break;
- case 0xe8: eorb_ix(m68_state); break;
- case 0xe9: adcb_ix(m68_state); break;
- case 0xea: orb_ix(m68_state); break;
- case 0xeb: addb_ix(m68_state); break;
- case 0xec: ldd_ix(m68_state); break;
- case 0xed: std_ix(m68_state); break;
- case 0xee: ldu_ix(m68_state); break;
- case 0xef: stu_ix(m68_state); break;
- case 0xf0: subb_ex(m68_state); break;
- case 0xf1: cmpb_ex(m68_state); break;
- case 0xf2: sbcb_ex(m68_state); break;
- case 0xf3: addd_ex(m68_state); break;
- case 0xf4: andb_ex(m68_state); break;
- case 0xf5: bitb_ex(m68_state); break;
- case 0xf6: ldb_ex(m68_state); break;
- case 0xf7: stb_ex(m68_state); break;
- case 0xf8: eorb_ex(m68_state); break;
- case 0xf9: adcb_ex(m68_state); break;
- case 0xfa: orb_ex(m68_state); break;
- case 0xfb: addb_ex(m68_state); break;
- case 0xfc: ldd_ex(m68_state); break;
- case 0xfd: std_ex(m68_state); break;
- case 0xfe: ldu_ex(m68_state); break;
- case 0xff: stu_ex(m68_state); break;
+ case 0x00: neg_di(m68_state); break;
+ case 0x01: oim_di(m68_state); break;
+ case 0x02: aim_di(m68_state); break;
+ case 0x03: com_di(m68_state); break;
+ case 0x04: lsr_di(m68_state); break;
+ case 0x05: eim_di(m68_state); break;
+ case 0x06: ror_di(m68_state); break;
+ case 0x07: asr_di(m68_state); break;
+ case 0x08: asl_di(m68_state); break;
+ case 0x09: rol_di(m68_state); break;
+ case 0x0a: dec_di(m68_state); break;
+ case 0x0b: tim_di(m68_state); break;
+ case 0x0c: inc_di(m68_state); break;
+ case 0x0d: tst_di(m68_state); break;
+ case 0x0e: jmp_di(m68_state); break;
+ case 0x0f: clr_di(m68_state); break;
+ case 0x10: pref10(m68_state); break;
+ case 0x11: pref11(m68_state); break;
+ case 0x12: nop(m68_state); break;
+ case 0x13: sync(m68_state); break;
+ case 0x14: sexw(m68_state); break;
+ case 0x15: IIError(m68_state); break;
+ case 0x16: lbra(m68_state); break;
+ case 0x17: lbsr(m68_state); break;
+ case 0x18: IIError(m68_state); break;
+ case 0x19: daa(m68_state); break;
+ case 0x1a: orcc(m68_state); break;
+ case 0x1b: IIError(m68_state); break;
+ case 0x1c: andcc(m68_state); break;
+ case 0x1d: sex(m68_state); break;
+ case 0x1e: exg(m68_state); break;
+ case 0x1f: tfr(m68_state); break;
+ case 0x20: bra(m68_state); break;
+ case 0x21: brn(m68_state); break;
+ case 0x22: bhi(m68_state); break;
+ case 0x23: bls(m68_state); break;
+ case 0x24: bcc(m68_state); break;
+ case 0x25: bcs(m68_state); break;
+ case 0x26: bne(m68_state); break;
+ case 0x27: beq(m68_state); break;
+ case 0x28: bvc(m68_state); break;
+ case 0x29: bvs(m68_state); break;
+ case 0x2a: bpl(m68_state); break;
+ case 0x2b: bmi(m68_state); break;
+ case 0x2c: bge(m68_state); break;
+ case 0x2d: blt(m68_state); break;
+ case 0x2e: bgt(m68_state); break;
+ case 0x2f: ble(m68_state); break;
+ case 0x30: leax(m68_state); break;
+ case 0x31: leay(m68_state); break;
+ case 0x32: leas(m68_state); break;
+ case 0x33: leau(m68_state); break;
+ case 0x34: pshs(m68_state); break;
+ case 0x35: puls(m68_state); break;
+ case 0x36: pshu(m68_state); break;
+ case 0x37: pulu(m68_state); break;
+ case 0x38: IIError(m68_state); break;
+ case 0x39: rts(m68_state); break;
+ case 0x3a: abx(m68_state); break;
+ case 0x3b: rti(m68_state); break;
+ case 0x3c: cwai(m68_state); break;
+ case 0x3d: mul(m68_state); break;
+ case 0x3e: IIError(m68_state); break;
+ case 0x3f: swi(m68_state); break;
+ case 0x40: nega(m68_state); break;
+ case 0x41: IIError(m68_state); break;
+ case 0x42: IIError(m68_state); break;
+ case 0x43: coma(m68_state); break;
+ case 0x44: lsra(m68_state); break;
+ case 0x45: IIError(m68_state); break;
+ case 0x46: rora(m68_state); break;
+ case 0x47: asra(m68_state); break;
+ case 0x48: asla(m68_state); break;
+ case 0x49: rola(m68_state); break;
+ case 0x4a: deca(m68_state); break;
+ case 0x4b: IIError(m68_state); break;
+ case 0x4c: inca(m68_state); break;
+ case 0x4d: tsta(m68_state); break;
+ case 0x4e: IIError(m68_state); break;
+ case 0x4f: clra(m68_state); break;
+ case 0x50: negb(m68_state); break;
+ case 0x51: IIError(m68_state); break;
+ case 0x52: IIError(m68_state); break;
+ case 0x53: comb(m68_state); break;
+ case 0x54: lsrb(m68_state); break;
+ case 0x55: IIError(m68_state); break;
+ case 0x56: rorb(m68_state); break;
+ case 0x57: asrb(m68_state); break;
+ case 0x58: aslb(m68_state); break;
+ case 0x59: rolb(m68_state); break;
+ case 0x5a: decb(m68_state); break;
+ case 0x5b: IIError(m68_state); break;
+ case 0x5c: incb(m68_state); break;
+ case 0x5d: tstb(m68_state); break;
+ case 0x5e: IIError(m68_state); break;
+ case 0x5f: clrb(m68_state); break;
+ case 0x60: neg_ix(m68_state); break;
+ case 0x61: oim_ix(m68_state); break;
+ case 0x62: aim_ix(m68_state); break;
+ case 0x63: com_ix(m68_state); break;
+ case 0x64: lsr_ix(m68_state); break;
+ case 0x65: eim_ix(m68_state); break;
+ case 0x66: ror_ix(m68_state); break;
+ case 0x67: asr_ix(m68_state); break;
+ case 0x68: asl_ix(m68_state); break;
+ case 0x69: rol_ix(m68_state); break;
+ case 0x6a: dec_ix(m68_state); break;
+ case 0x6b: tim_ix(m68_state); break;
+ case 0x6c: inc_ix(m68_state); break;
+ case 0x6d: tst_ix(m68_state); break;
+ case 0x6e: jmp_ix(m68_state); break;
+ case 0x6f: clr_ix(m68_state); break;
+ case 0x70: neg_ex(m68_state); break;
+ case 0x71: oim_ex(m68_state); break;
+ case 0x72: aim_ex(m68_state); break;
+ case 0x73: com_ex(m68_state); break;
+ case 0x74: lsr_ex(m68_state); break;
+ case 0x75: eim_ex(m68_state); break;
+ case 0x76: ror_ex(m68_state); break;
+ case 0x77: asr_ex(m68_state); break;
+ case 0x78: asl_ex(m68_state); break;
+ case 0x79: rol_ex(m68_state); break;
+ case 0x7a: dec_ex(m68_state); break;
+ case 0x7b: tim_ex(m68_state); break;
+ case 0x7c: inc_ex(m68_state); break;
+ case 0x7d: tst_ex(m68_state); break;
+ case 0x7e: jmp_ex(m68_state); break;
+ case 0x7f: clr_ex(m68_state); break;
+ case 0x80: suba_im(m68_state); break;
+ case 0x81: cmpa_im(m68_state); break;
+ case 0x82: sbca_im(m68_state); break;
+ case 0x83: subd_im(m68_state); break;
+ case 0x84: anda_im(m68_state); break;
+ case 0x85: bita_im(m68_state); break;
+ case 0x86: lda_im(m68_state); break;
+ case 0x87: IIError(m68_state); break;
+ case 0x88: eora_im(m68_state); break;
+ case 0x89: adca_im(m68_state); break;
+ case 0x8a: ora_im(m68_state); break;
+ case 0x8b: adda_im(m68_state); break;
+ case 0x8c: cmpx_im(m68_state); break;
+ case 0x8d: bsr(m68_state); break;
+ case 0x8e: ldx_im(m68_state); break;
+ case 0x8f: IIError(m68_state); break;
+ case 0x90: suba_di(m68_state); break;
+ case 0x91: cmpa_di(m68_state); break;
+ case 0x92: sbca_di(m68_state); break;
+ case 0x93: subd_di(m68_state); break;
+ case 0x94: anda_di(m68_state); break;
+ case 0x95: bita_di(m68_state); break;
+ case 0x96: lda_di(m68_state); break;
+ case 0x97: sta_di(m68_state); break;
+ case 0x98: eora_di(m68_state); break;
+ case 0x99: adca_di(m68_state); break;
+ case 0x9a: ora_di(m68_state); break;
+ case 0x9b: adda_di(m68_state); break;
+ case 0x9c: cmpx_di(m68_state); break;
+ case 0x9d: jsr_di(m68_state); break;
+ case 0x9e: ldx_di(m68_state); break;
+ case 0x9f: stx_di(m68_state); break;
+ case 0xa0: suba_ix(m68_state); break;
+ case 0xa1: cmpa_ix(m68_state); break;
+ case 0xa2: sbca_ix(m68_state); break;
+ case 0xa3: subd_ix(m68_state); break;
+ case 0xa4: anda_ix(m68_state); break;
+ case 0xa5: bita_ix(m68_state); break;
+ case 0xa6: lda_ix(m68_state); break;
+ case 0xa7: sta_ix(m68_state); break;
+ case 0xa8: eora_ix(m68_state); break;
+ case 0xa9: adca_ix(m68_state); break;
+ case 0xaa: ora_ix(m68_state); break;
+ case 0xab: adda_ix(m68_state); break;
+ case 0xac: cmpx_ix(m68_state); break;
+ case 0xad: jsr_ix(m68_state); break;
+ case 0xae: ldx_ix(m68_state); break;
+ case 0xaf: stx_ix(m68_state); break;
+ case 0xb0: suba_ex(m68_state); break;
+ case 0xb1: cmpa_ex(m68_state); break;
+ case 0xb2: sbca_ex(m68_state); break;
+ case 0xb3: subd_ex(m68_state); break;
+ case 0xb4: anda_ex(m68_state); break;
+ case 0xb5: bita_ex(m68_state); break;
+ case 0xb6: lda_ex(m68_state); break;
+ case 0xb7: sta_ex(m68_state); break;
+ case 0xb8: eora_ex(m68_state); break;
+ case 0xb9: adca_ex(m68_state); break;
+ case 0xba: ora_ex(m68_state); break;
+ case 0xbb: adda_ex(m68_state); break;
+ case 0xbc: cmpx_ex(m68_state); break;
+ case 0xbd: jsr_ex(m68_state); break;
+ case 0xbe: ldx_ex(m68_state); break;
+ case 0xbf: stx_ex(m68_state); break;
+ case 0xc0: subb_im(m68_state); break;
+ case 0xc1: cmpb_im(m68_state); break;
+ case 0xc2: sbcb_im(m68_state); break;
+ case 0xc3: addd_im(m68_state); break;
+ case 0xc4: andb_im(m68_state); break;
+ case 0xc5: bitb_im(m68_state); break;
+ case 0xc6: ldb_im(m68_state); break;
+ case 0xc7: IIError(m68_state); break;
+ case 0xc8: eorb_im(m68_state); break;
+ case 0xc9: adcb_im(m68_state); break;
+ case 0xca: orb_im(m68_state); break;
+ case 0xcb: addb_im(m68_state); break;
+ case 0xcc: ldd_im(m68_state); break;
+ case 0xcd: ldq_im(m68_state); break; /* in m6809 was std_im */
+ case 0xce: ldu_im(m68_state); break;
+ case 0xcf: IIError(m68_state); break;
+ case 0xd0: subb_di(m68_state); break;
+ case 0xd1: cmpb_di(m68_state); break;
+ case 0xd2: sbcb_di(m68_state); break;
+ case 0xd3: addd_di(m68_state); break;
+ case 0xd4: andb_di(m68_state); break;
+ case 0xd5: bitb_di(m68_state); break;
+ case 0xd6: ldb_di(m68_state); break;
+ case 0xd7: stb_di(m68_state); break;
+ case 0xd8: eorb_di(m68_state); break;
+ case 0xd9: adcb_di(m68_state); break;
+ case 0xda: orb_di(m68_state); break;
+ case 0xdb: addb_di(m68_state); break;
+ case 0xdc: ldd_di(m68_state); break;
+ case 0xdd: std_di(m68_state); break;
+ case 0xde: ldu_di(m68_state); break;
+ case 0xdf: stu_di(m68_state); break;
+ case 0xe0: subb_ix(m68_state); break;
+ case 0xe1: cmpb_ix(m68_state); break;
+ case 0xe2: sbcb_ix(m68_state); break;
+ case 0xe3: addd_ix(m68_state); break;
+ case 0xe4: andb_ix(m68_state); break;
+ case 0xe5: bitb_ix(m68_state); break;
+ case 0xe6: ldb_ix(m68_state); break;
+ case 0xe7: stb_ix(m68_state); break;
+ case 0xe8: eorb_ix(m68_state); break;
+ case 0xe9: adcb_ix(m68_state); break;
+ case 0xea: orb_ix(m68_state); break;
+ case 0xeb: addb_ix(m68_state); break;
+ case 0xec: ldd_ix(m68_state); break;
+ case 0xed: std_ix(m68_state); break;
+ case 0xee: ldu_ix(m68_state); break;
+ case 0xef: stu_ix(m68_state); break;
+ case 0xf0: subb_ex(m68_state); break;
+ case 0xf1: cmpb_ex(m68_state); break;
+ case 0xf2: sbcb_ex(m68_state); break;
+ case 0xf3: addd_ex(m68_state); break;
+ case 0xf4: andb_ex(m68_state); break;
+ case 0xf5: bitb_ex(m68_state); break;
+ case 0xf6: ldb_ex(m68_state); break;
+ case 0xf7: stb_ex(m68_state); break;
+ case 0xf8: eorb_ex(m68_state); break;
+ case 0xf9: adcb_ex(m68_state); break;
+ case 0xfa: orb_ex(m68_state); break;
+ case 0xfb: addb_ex(m68_state); break;
+ case 0xfc: ldd_ex(m68_state); break;
+ case 0xfd: std_ex(m68_state); break;
+ case 0xfe: ldu_ex(m68_state); break;
+ case 0xff: stu_ex(m68_state); break;
}
#else
(*hd6309_main[m68_state->ireg])(m68_state);
@@ -935,277 +935,277 @@ INLINE void fetch_effective_address( m68_state_t *m68_state )
switch(postbyte)
{
- case 0x00: EA=X; break;
- case 0x01: EA=X+1; break;
- case 0x02: EA=X+2; break;
- case 0x03: EA=X+3; break;
- case 0x04: EA=X+4; break;
- case 0x05: EA=X+5; break;
- case 0x06: EA=X+6; break;
- case 0x07: EA=X+7; break;
- case 0x08: EA=X+8; break;
- case 0x09: EA=X+9; break;
- case 0x0a: EA=X+10; break;
- case 0x0b: EA=X+11; break;
- case 0x0c: EA=X+12; break;
- case 0x0d: EA=X+13; break;
- case 0x0e: EA=X+14; break;
- case 0x0f: EA=X+15; break;
-
- case 0x10: EA=X-16; break;
- case 0x11: EA=X-15; break;
- case 0x12: EA=X-14; break;
- case 0x13: EA=X-13; break;
- case 0x14: EA=X-12; break;
- case 0x15: EA=X-11; break;
- case 0x16: EA=X-10; break;
- case 0x17: EA=X-9; break;
- case 0x18: EA=X-8; break;
- case 0x19: EA=X-7; break;
- case 0x1a: EA=X-6; break;
- case 0x1b: EA=X-5; break;
- case 0x1c: EA=X-4; break;
- case 0x1d: EA=X-3; break;
- case 0x1e: EA=X-2; break;
- case 0x1f: EA=X-1; break;
-
- case 0x20: EA=Y; break;
- case 0x21: EA=Y+1; break;
- case 0x22: EA=Y+2; break;
- case 0x23: EA=Y+3; break;
- case 0x24: EA=Y+4; break;
- case 0x25: EA=Y+5; break;
- case 0x26: EA=Y+6; break;
- case 0x27: EA=Y+7; break;
- case 0x28: EA=Y+8; break;
- case 0x29: EA=Y+9; break;
- case 0x2a: EA=Y+10; break;
- case 0x2b: EA=Y+11; break;
- case 0x2c: EA=Y+12; break;
- case 0x2d: EA=Y+13; break;
- case 0x2e: EA=Y+14; break;
- case 0x2f: EA=Y+15; break;
-
- case 0x30: EA=Y-16; break;
- case 0x31: EA=Y-15; break;
- case 0x32: EA=Y-14; break;
- case 0x33: EA=Y-13; break;
- case 0x34: EA=Y-12; break;
- case 0x35: EA=Y-11; break;
- case 0x36: EA=Y-10; break;
- case 0x37: EA=Y-9; break;
- case 0x38: EA=Y-8; break;
- case 0x39: EA=Y-7; break;
- case 0x3a: EA=Y-6; break;
- case 0x3b: EA=Y-5; break;
- case 0x3c: EA=Y-4; break;
- case 0x3d: EA=Y-3; break;
- case 0x3e: EA=Y-2; break;
- case 0x3f: EA=Y-1; break;
-
- case 0x40: EA=U; break;
- case 0x41: EA=U+1; break;
- case 0x42: EA=U+2; break;
- case 0x43: EA=U+3; break;
- case 0x44: EA=U+4; break;
- case 0x45: EA=U+5; break;
- case 0x46: EA=U+6; break;
- case 0x47: EA=U+7; break;
- case 0x48: EA=U+8; break;
- case 0x49: EA=U+9; break;
- case 0x4a: EA=U+10; break;
- case 0x4b: EA=U+11; break;
- case 0x4c: EA=U+12; break;
- case 0x4d: EA=U+13; break;
- case 0x4e: EA=U+14; break;
- case 0x4f: EA=U+15; break;
-
- case 0x50: EA=U-16; break;
- case 0x51: EA=U-15; break;
- case 0x52: EA=U-14; break;
- case 0x53: EA=U-13; break;
- case 0x54: EA=U-12; break;
- case 0x55: EA=U-11; break;
- case 0x56: EA=U-10; break;
- case 0x57: EA=U-9; break;
- case 0x58: EA=U-8; break;
- case 0x59: EA=U-7; break;
- case 0x5a: EA=U-6; break;
- case 0x5b: EA=U-5; break;
- case 0x5c: EA=U-4; break;
- case 0x5d: EA=U-3; break;
- case 0x5e: EA=U-2; break;
- case 0x5f: EA=U-1; break;
-
- case 0x60: EA=S; break;
- case 0x61: EA=S+1; break;
- case 0x62: EA=S+2; break;
- case 0x63: EA=S+3; break;
- case 0x64: EA=S+4; break;
- case 0x65: EA=S+5; break;
- case 0x66: EA=S+6; break;
- case 0x67: EA=S+7; break;
- case 0x68: EA=S+8; break;
- case 0x69: EA=S+9; break;
- case 0x6a: EA=S+10; break;
- case 0x6b: EA=S+11; break;
- case 0x6c: EA=S+12; break;
- case 0x6d: EA=S+13; break;
- case 0x6e: EA=S+14; break;
- case 0x6f: EA=S+15; break;
-
- case 0x70: EA=S-16; break;
- case 0x71: EA=S-15; break;
- case 0x72: EA=S-14; break;
- case 0x73: EA=S-13; break;
- case 0x74: EA=S-12; break;
- case 0x75: EA=S-11; break;
- case 0x76: EA=S-10; break;
- case 0x77: EA=S-9; break;
- case 0x78: EA=S-8; break;
- case 0x79: EA=S-7; break;
- case 0x7a: EA=S-6; break;
- case 0x7b: EA=S-5; break;
- case 0x7c: EA=S-4; break;
- case 0x7d: EA=S-3; break;
- case 0x7e: EA=S-2; break;
- case 0x7f: EA=S-1; break;
-
- case 0x80: EA=X; X++; break;
- case 0x81: EA=X; X+=2; break;
- case 0x82: X--; EA=X; break;
- case 0x83: X-=2; EA=X; break;
- case 0x84: EA=X; break;
- case 0x85: EA=X+SIGNED(B); break;
- case 0x86: EA=X+SIGNED(A); break;
- case 0x87: EA=X+SIGNED(E); break;
- case 0x88: IMMBYTE(EA); EA=X+SIGNED(EA); break;
- case 0x89: IMMWORD(EAP); EA+=X; break;
- case 0x8a: EA=X+SIGNED(F); break;
- case 0x8b: EA=X+D; break;
- case 0x8c: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0x8d: IMMWORD(EAP); EA+=PC; break;
- case 0x8e: EA=X+W; break;
- case 0x8f: EA=W; break;
-
- case 0x90: EA=W; EAD=RM16(m68_state, EAD); break;
- case 0x91: EA=X; X+=2; EAD=RM16(m68_state, EAD); break;
- case 0x92: IIError(m68_state); break;
- case 0x93: X-=2; EA=X; EAD=RM16(m68_state, EAD); break;
- case 0x94: EA=X; EAD=RM16(m68_state, EAD); break;
- case 0x95: EA=X+SIGNED(B); EAD=RM16(m68_state, EAD); break;
- case 0x96: EA=X+SIGNED(A); EAD=RM16(m68_state, EAD); break;
- case 0x97: EA=X+SIGNED(E); EAD=RM16(m68_state, EAD); break;
- case 0x98: IMMBYTE(EA); EA=X+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(m68_state, EAD); break;
- case 0x9a: EA=X+SIGNED(F); EAD=RM16(m68_state, EAD); break;
- case 0x9b: EA=X+D; EAD=RM16(m68_state, EAD); break;
- case 0x9c: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
- case 0x9e: EA=X+W; EAD=RM16(m68_state, EAD); break;
- case 0x9f: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break;
-
- case 0xa0: EA=Y; Y++; break;
- case 0xa1: EA=Y; Y+=2; break;
- case 0xa2: Y--; EA=Y; break;
- case 0xa3: Y-=2; EA=Y; break;
- case 0xa4: EA=Y; break;
- case 0xa5: EA=Y+SIGNED(B); break;
- case 0xa6: EA=Y+SIGNED(A); break;
- case 0xa7: EA=Y+SIGNED(E); break;
- case 0xa8: IMMBYTE(EA); EA=Y+SIGNED(EA); break;
- case 0xa9: IMMWORD(EAP); EA+=Y; break;
- case 0xaa: EA=Y+SIGNED(F); break;
- case 0xab: EA=Y+D; break;
- case 0xac: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0xad: IMMWORD(EAP); EA+=PC; break;
- case 0xae: EA=Y+W; break;
- case 0xaf: IMMWORD(EAP); EA+=W; break;
-
- case 0xb0: IMMWORD(EAP); EA+=W; EAD=RM16(m68_state, EAD); break;
- case 0xb1: EA=Y; Y+=2; EAD=RM16(m68_state, EAD); break;
- case 0xb2: IIError(m68_state); break;
- case 0xb3: Y-=2; EA=Y; EAD=RM16(m68_state, EAD); break;
- case 0xb4: EA=Y; EAD=RM16(m68_state, EAD); break;
- case 0xb5: EA=Y+SIGNED(B); EAD=RM16(m68_state, EAD); break;
- case 0xb6: EA=Y+SIGNED(A); EAD=RM16(m68_state, EAD); break;
- case 0xb7: EA=Y+SIGNED(E); EAD=RM16(m68_state, EAD); break;
- case 0xb8: IMMBYTE(EA); EA=Y+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(m68_state, EAD); break;
- case 0xba: EA=Y+SIGNED(F); EAD=RM16(m68_state, EAD); break;
- case 0xbb: EA=Y+D; EAD=RM16(m68_state, EAD); break;
- case 0xbc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
- case 0xbe: EA=Y+W; EAD=RM16(m68_state, EAD); break;
- case 0xbf: IIError(m68_state); break;
-
- case 0xc0: EA=U; U++; break;
- case 0xc1: EA=U; U+=2; break;
- case 0xc2: U--; EA=U; break;
- case 0xc3: U-=2; EA=U; break;
- case 0xc4: EA=U; break;
- case 0xc5: EA=U+SIGNED(B); break;
- case 0xc6: EA=U+SIGNED(A); break;
- case 0xc7: EA=U+SIGNED(E); break;
- case 0xc8: IMMBYTE(EA); EA=U+SIGNED(EA); break;
- case 0xc9: IMMWORD(EAP); EA+=U; break;
- case 0xca: EA=U+SIGNED(F); break;
- case 0xcb: EA=U+D; break;
- case 0xcc: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0xcd: IMMWORD(EAP); EA+=PC; break;
- case 0xce: EA=U+W; break;
- case 0xcf: EA=W; W+=2; break;
-
- case 0xd0: EA=W; W+=2; EAD=RM16(m68_state, EAD); break;
- case 0xd1: EA=U; U+=2; EAD=RM16(m68_state, EAD); break;
- case 0xd2: IIError(m68_state); break;
- case 0xd3: U-=2; EA=U; EAD=RM16(m68_state, EAD); break;
- case 0xd4: EA=U; EAD=RM16(m68_state, EAD); break;
- case 0xd5: EA=U+SIGNED(B); EAD=RM16(m68_state, EAD); break;
- case 0xd6: EA=U+SIGNED(A); EAD=RM16(m68_state, EAD); break;
- case 0xd7: EA=U+SIGNED(E); EAD=RM16(m68_state, EAD); break;
- case 0xd8: IMMBYTE(EA); EA=U+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(m68_state, EAD); break;
- case 0xda: EA=U+SIGNED(F); EAD=RM16(m68_state, EAD); break;
- case 0xdb: EA=U+D; EAD=RM16(m68_state, EAD); break;
- case 0xdc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
- case 0xde: EA=U+W; EAD=RM16(m68_state, EAD); break;
- case 0xdf: IIError(m68_state); break;
-
- case 0xe0: EA=S; S++; break;
- case 0xe1: EA=S; S+=2; break;
- case 0xe2: S--; EA=S; break;
- case 0xe3: S-=2; EA=S; break;
- case 0xe4: EA=S; break;
- case 0xe5: EA=S+SIGNED(B); break;
- case 0xe6: EA=S+SIGNED(A); break;
- case 0xe7: EA=S+SIGNED(E); break;
- case 0xe8: IMMBYTE(EA); EA=S+SIGNED(EA); break;
- case 0xe9: IMMWORD(EAP); EA+=S; break;
- case 0xea: EA=S+SIGNED(F); break;
- case 0xeb: EA=S+D; break;
- case 0xec: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0xed: IMMWORD(EAP); EA+=PC; break;
- case 0xee: EA=S+W; break;
- case 0xef: W-=2; EA=W; break;
-
- case 0xf0: W-=2; EA=W; EAD=RM16(m68_state, EAD); break;
- case 0xf1: EA=S; S+=2; EAD=RM16(m68_state, EAD); break;
- case 0xf2: IIError(m68_state); break;
- case 0xf3: S-=2; EA=S; EAD=RM16(m68_state, EAD); break;
- case 0xf4: EA=S; EAD=RM16(m68_state, EAD); break;
- case 0xf5: EA=S+SIGNED(B); EAD=RM16(m68_state, EAD); break;
- case 0xf6: EA=S+SIGNED(A); EAD=RM16(m68_state, EAD); break;
- case 0xf7: EA=S+SIGNED(E); EAD=RM16(m68_state, EAD); break;
- case 0xf8: IMMBYTE(EA); EA=S+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(m68_state, EAD); break;
- case 0xfa: EA=S+SIGNED(F); EAD=RM16(m68_state, EAD); break;
- case 0xfb: EA=S+D; EAD=RM16(m68_state, EAD); break;
- case 0xfc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
- case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
- case 0xfe: EA=S+W; EAD=RM16(m68_state, EAD); break;
- case 0xff: IIError(m68_state); break;
+ case 0x00: EA=X; break;
+ case 0x01: EA=X+1; break;
+ case 0x02: EA=X+2; break;
+ case 0x03: EA=X+3; break;
+ case 0x04: EA=X+4; break;
+ case 0x05: EA=X+5; break;
+ case 0x06: EA=X+6; break;
+ case 0x07: EA=X+7; break;
+ case 0x08: EA=X+8; break;
+ case 0x09: EA=X+9; break;
+ case 0x0a: EA=X+10; break;
+ case 0x0b: EA=X+11; break;
+ case 0x0c: EA=X+12; break;
+ case 0x0d: EA=X+13; break;
+ case 0x0e: EA=X+14; break;
+ case 0x0f: EA=X+15; break;
+
+ case 0x10: EA=X-16; break;
+ case 0x11: EA=X-15; break;
+ case 0x12: EA=X-14; break;
+ case 0x13: EA=X-13; break;
+ case 0x14: EA=X-12; break;
+ case 0x15: EA=X-11; break;
+ case 0x16: EA=X-10; break;
+ case 0x17: EA=X-9; break;
+ case 0x18: EA=X-8; break;
+ case 0x19: EA=X-7; break;
+ case 0x1a: EA=X-6; break;
+ case 0x1b: EA=X-5; break;
+ case 0x1c: EA=X-4; break;
+ case 0x1d: EA=X-3; break;
+ case 0x1e: EA=X-2; break;
+ case 0x1f: EA=X-1; break;
+
+ case 0x20: EA=Y; break;
+ case 0x21: EA=Y+1; break;
+ case 0x22: EA=Y+2; break;
+ case 0x23: EA=Y+3; break;
+ case 0x24: EA=Y+4; break;
+ case 0x25: EA=Y+5; break;
+ case 0x26: EA=Y+6; break;
+ case 0x27: EA=Y+7; break;
+ case 0x28: EA=Y+8; break;
+ case 0x29: EA=Y+9; break;
+ case 0x2a: EA=Y+10; break;
+ case 0x2b: EA=Y+11; break;
+ case 0x2c: EA=Y+12; break;
+ case 0x2d: EA=Y+13; break;
+ case 0x2e: EA=Y+14; break;
+ case 0x2f: EA=Y+15; break;
+
+ case 0x30: EA=Y-16; break;
+ case 0x31: EA=Y-15; break;
+ case 0x32: EA=Y-14; break;
+ case 0x33: EA=Y-13; break;
+ case 0x34: EA=Y-12; break;
+ case 0x35: EA=Y-11; break;
+ case 0x36: EA=Y-10; break;
+ case 0x37: EA=Y-9; break;
+ case 0x38: EA=Y-8; break;
+ case 0x39: EA=Y-7; break;
+ case 0x3a: EA=Y-6; break;
+ case 0x3b: EA=Y-5; break;
+ case 0x3c: EA=Y-4; break;
+ case 0x3d: EA=Y-3; break;
+ case 0x3e: EA=Y-2; break;
+ case 0x3f: EA=Y-1; break;
+
+ case 0x40: EA=U; break;
+ case 0x41: EA=U+1; break;
+ case 0x42: EA=U+2; break;
+ case 0x43: EA=U+3; break;
+ case 0x44: EA=U+4; break;
+ case 0x45: EA=U+5; break;
+ case 0x46: EA=U+6; break;
+ case 0x47: EA=U+7; break;
+ case 0x48: EA=U+8; break;
+ case 0x49: EA=U+9; break;
+ case 0x4a: EA=U+10; break;
+ case 0x4b: EA=U+11; break;
+ case 0x4c: EA=U+12; break;
+ case 0x4d: EA=U+13; break;
+ case 0x4e: EA=U+14; break;
+ case 0x4f: EA=U+15; break;
+
+ case 0x50: EA=U-16; break;
+ case 0x51: EA=U-15; break;
+ case 0x52: EA=U-14; break;
+ case 0x53: EA=U-13; break;
+ case 0x54: EA=U-12; break;
+ case 0x55: EA=U-11; break;
+ case 0x56: EA=U-10; break;
+ case 0x57: EA=U-9; break;
+ case 0x58: EA=U-8; break;
+ case 0x59: EA=U-7; break;
+ case 0x5a: EA=U-6; break;
+ case 0x5b: EA=U-5; break;
+ case 0x5c: EA=U-4; break;
+ case 0x5d: EA=U-3; break;
+ case 0x5e: EA=U-2; break;
+ case 0x5f: EA=U-1; break;
+
+ case 0x60: EA=S; break;
+ case 0x61: EA=S+1; break;
+ case 0x62: EA=S+2; break;
+ case 0x63: EA=S+3; break;
+ case 0x64: EA=S+4; break;
+ case 0x65: EA=S+5; break;
+ case 0x66: EA=S+6; break;
+ case 0x67: EA=S+7; break;
+ case 0x68: EA=S+8; break;
+ case 0x69: EA=S+9; break;
+ case 0x6a: EA=S+10; break;
+ case 0x6b: EA=S+11; break;
+ case 0x6c: EA=S+12; break;
+ case 0x6d: EA=S+13; break;
+ case 0x6e: EA=S+14; break;
+ case 0x6f: EA=S+15; break;
+
+ case 0x70: EA=S-16; break;
+ case 0x71: EA=S-15; break;
+ case 0x72: EA=S-14; break;
+ case 0x73: EA=S-13; break;
+ case 0x74: EA=S-12; break;
+ case 0x75: EA=S-11; break;
+ case 0x76: EA=S-10; break;
+ case 0x77: EA=S-9; break;
+ case 0x78: EA=S-8; break;
+ case 0x79: EA=S-7; break;
+ case 0x7a: EA=S-6; break;
+ case 0x7b: EA=S-5; break;
+ case 0x7c: EA=S-4; break;
+ case 0x7d: EA=S-3; break;
+ case 0x7e: EA=S-2; break;
+ case 0x7f: EA=S-1; break;
+
+ case 0x80: EA=X; X++; break;
+ case 0x81: EA=X; X+=2; break;
+ case 0x82: X--; EA=X; break;
+ case 0x83: X-=2; EA=X; break;
+ case 0x84: EA=X; break;
+ case 0x85: EA=X+SIGNED(B); break;
+ case 0x86: EA=X+SIGNED(A); break;
+ case 0x87: EA=X+SIGNED(E); break;
+ case 0x88: IMMBYTE(EA); EA=X+SIGNED(EA); break;
+ case 0x89: IMMWORD(EAP); EA+=X; break;
+ case 0x8a: EA=X+SIGNED(F); break;
+ case 0x8b: EA=X+D; break;
+ case 0x8c: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0x8d: IMMWORD(EAP); EA+=PC; break;
+ case 0x8e: EA=X+W; break;
+ case 0x8f: EA=W; break;
+
+ case 0x90: EA=W; EAD=RM16(m68_state, EAD); break;
+ case 0x91: EA=X; X+=2; EAD=RM16(m68_state, EAD); break;
+ case 0x92: IIError(m68_state); break;
+ case 0x93: X-=2; EA=X; EAD=RM16(m68_state, EAD); break;
+ case 0x94: EA=X; EAD=RM16(m68_state, EAD); break;
+ case 0x95: EA=X+SIGNED(B); EAD=RM16(m68_state, EAD); break;
+ case 0x96: EA=X+SIGNED(A); EAD=RM16(m68_state, EAD); break;
+ case 0x97: EA=X+SIGNED(E); EAD=RM16(m68_state, EAD); break;
+ case 0x98: IMMBYTE(EA); EA=X+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(m68_state, EAD); break;
+ case 0x9a: EA=X+SIGNED(F); EAD=RM16(m68_state, EAD); break;
+ case 0x9b: EA=X+D; EAD=RM16(m68_state, EAD); break;
+ case 0x9c: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
+ case 0x9e: EA=X+W; EAD=RM16(m68_state, EAD); break;
+ case 0x9f: IMMWORD(EAP); EAD=RM16(m68_state, EAD); break;
+
+ case 0xa0: EA=Y; Y++; break;
+ case 0xa1: EA=Y; Y+=2; break;
+ case 0xa2: Y--; EA=Y; break;
+ case 0xa3: Y-=2; EA=Y; break;
+ case 0xa4: EA=Y; break;
+ case 0xa5: EA=Y+SIGNED(B); break;
+ case 0xa6: EA=Y+SIGNED(A); break;
+ case 0xa7: EA=Y+SIGNED(E); break;
+ case 0xa8: IMMBYTE(EA); EA=Y+SIGNED(EA); break;
+ case 0xa9: IMMWORD(EAP); EA+=Y; break;
+ case 0xaa: EA=Y+SIGNED(F); break;
+ case 0xab: EA=Y+D; break;
+ case 0xac: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0xad: IMMWORD(EAP); EA+=PC; break;
+ case 0xae: EA=Y+W; break;
+ case 0xaf: IMMWORD(EAP); EA+=W; break;
+
+ case 0xb0: IMMWORD(EAP); EA+=W; EAD=RM16(m68_state, EAD); break;
+ case 0xb1: EA=Y; Y+=2; EAD=RM16(m68_state, EAD); break;
+ case 0xb2: IIError(m68_state); break;
+ case 0xb3: Y-=2; EA=Y; EAD=RM16(m68_state, EAD); break;
+ case 0xb4: EA=Y; EAD=RM16(m68_state, EAD); break;
+ case 0xb5: EA=Y+SIGNED(B); EAD=RM16(m68_state, EAD); break;
+ case 0xb6: EA=Y+SIGNED(A); EAD=RM16(m68_state, EAD); break;
+ case 0xb7: EA=Y+SIGNED(E); EAD=RM16(m68_state, EAD); break;
+ case 0xb8: IMMBYTE(EA); EA=Y+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(m68_state, EAD); break;
+ case 0xba: EA=Y+SIGNED(F); EAD=RM16(m68_state, EAD); break;
+ case 0xbb: EA=Y+D; EAD=RM16(m68_state, EAD); break;
+ case 0xbc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
+ case 0xbe: EA=Y+W; EAD=RM16(m68_state, EAD); break;
+ case 0xbf: IIError(m68_state); break;
+
+ case 0xc0: EA=U; U++; break;
+ case 0xc1: EA=U; U+=2; break;
+ case 0xc2: U--; EA=U; break;
+ case 0xc3: U-=2; EA=U; break;
+ case 0xc4: EA=U; break;
+ case 0xc5: EA=U+SIGNED(B); break;
+ case 0xc6: EA=U+SIGNED(A); break;
+ case 0xc7: EA=U+SIGNED(E); break;
+ case 0xc8: IMMBYTE(EA); EA=U+SIGNED(EA); break;
+ case 0xc9: IMMWORD(EAP); EA+=U; break;
+ case 0xca: EA=U+SIGNED(F); break;
+ case 0xcb: EA=U+D; break;
+ case 0xcc: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0xcd: IMMWORD(EAP); EA+=PC; break;
+ case 0xce: EA=U+W; break;
+ case 0xcf: EA=W; W+=2; break;
+
+ case 0xd0: EA=W; W+=2; EAD=RM16(m68_state, EAD); break;
+ case 0xd1: EA=U; U+=2; EAD=RM16(m68_state, EAD); break;
+ case 0xd2: IIError(m68_state); break;
+ case 0xd3: U-=2; EA=U; EAD=RM16(m68_state, EAD); break;
+ case 0xd4: EA=U; EAD=RM16(m68_state, EAD); break;
+ case 0xd5: EA=U+SIGNED(B); EAD=RM16(m68_state, EAD); break;
+ case 0xd6: EA=U+SIGNED(A); EAD=RM16(m68_state, EAD); break;
+ case 0xd7: EA=U+SIGNED(E); EAD=RM16(m68_state, EAD); break;
+ case 0xd8: IMMBYTE(EA); EA=U+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(m68_state, EAD); break;
+ case 0xda: EA=U+SIGNED(F); EAD=RM16(m68_state, EAD); break;
+ case 0xdb: EA=U+D; EAD=RM16(m68_state, EAD); break;
+ case 0xdc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
+ case 0xde: EA=U+W; EAD=RM16(m68_state, EAD); break;
+ case 0xdf: IIError(m68_state); break;
+
+ case 0xe0: EA=S; S++; break;
+ case 0xe1: EA=S; S+=2; break;
+ case 0xe2: S--; EA=S; break;
+ case 0xe3: S-=2; EA=S; break;
+ case 0xe4: EA=S; break;
+ case 0xe5: EA=S+SIGNED(B); break;
+ case 0xe6: EA=S+SIGNED(A); break;
+ case 0xe7: EA=S+SIGNED(E); break;
+ case 0xe8: IMMBYTE(EA); EA=S+SIGNED(EA); break;
+ case 0xe9: IMMWORD(EAP); EA+=S; break;
+ case 0xea: EA=S+SIGNED(F); break;
+ case 0xeb: EA=S+D; break;
+ case 0xec: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0xed: IMMWORD(EAP); EA+=PC; break;
+ case 0xee: EA=S+W; break;
+ case 0xef: W-=2; EA=W; break;
+
+ case 0xf0: W-=2; EA=W; EAD=RM16(m68_state, EAD); break;
+ case 0xf1: EA=S; S+=2; EAD=RM16(m68_state, EAD); break;
+ case 0xf2: IIError(m68_state); break;
+ case 0xf3: S-=2; EA=S; EAD=RM16(m68_state, EAD); break;
+ case 0xf4: EA=S; EAD=RM16(m68_state, EAD); break;
+ case 0xf5: EA=S+SIGNED(B); EAD=RM16(m68_state, EAD); break;
+ case 0xf6: EA=S+SIGNED(A); EAD=RM16(m68_state, EAD); break;
+ case 0xf7: EA=S+SIGNED(E); EAD=RM16(m68_state, EAD); break;
+ case 0xf8: IMMBYTE(EA); EA=S+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(m68_state, EAD); break;
+ case 0xfa: EA=S+SIGNED(F); EAD=RM16(m68_state, EAD); break;
+ case 0xfb: EA=S+D; EAD=RM16(m68_state, EAD); break;
+ case 0xfc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(m68_state, EAD); break;
+ case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(m68_state, EAD); break;
+ case 0xfe: EA=S+W; EAD=RM16(m68_state, EAD); break;
+ case 0xff: IIError(m68_state); break;
}
m68_state->icount -= m68_state->index_cycle[postbyte];
@@ -1223,25 +1223,25 @@ static CPU_SET_INFO( hd6309 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + HD6309_IRQ_LINE: set_irq_line(m68_state, HD6309_IRQ_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + HD6309_IRQ_LINE: set_irq_line(m68_state, HD6309_IRQ_LINE, info->i); break;
case CPUINFO_INT_INPUT_STATE + HD6309_FIRQ_LINE:set_irq_line(m68_state, HD6309_FIRQ_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(m68_state, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(m68_state, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + HD6309_PC: PC = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_PC: PC = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + HD6309_S: S = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_CC: CC = info->i; check_irq_lines(m68_state); break;
- case CPUINFO_INT_REGISTER + HD6309_MD: MD = info->i; UpdateState(m68_state); break;
- case CPUINFO_INT_REGISTER + HD6309_U: U = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_A: A = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_B: B = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_E: E = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_F: F = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_X: X = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_Y: Y = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_V: V = info->i; break;
- case CPUINFO_INT_REGISTER + HD6309_DP: DP = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_S: S = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_CC: CC = info->i; check_irq_lines(m68_state); break;
+ case CPUINFO_INT_REGISTER + HD6309_MD: MD = info->i; UpdateState(m68_state); break;
+ case CPUINFO_INT_REGISTER + HD6309_U: U = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_A: A = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_B: B = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_E: E = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_F: F = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_X: X = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_Y: Y = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_V: V = info->i; break;
+ case CPUINFO_INT_REGISTER + HD6309_DP: DP = info->i; break;
}
}
@@ -1258,65 +1258,65 @@ CPU_GET_INFO( hd6309 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m68_state_t); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 20; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + HD6309_IRQ_LINE: info->i = m68_state->irq_state[HD6309_IRQ_LINE]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m68_state_t); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 20; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + HD6309_IRQ_LINE: info->i = m68_state->irq_state[HD6309_IRQ_LINE]; break;
case CPUINFO_INT_INPUT_STATE + HD6309_FIRQ_LINE:info->i = m68_state->irq_state[HD6309_FIRQ_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m68_state->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = m68_state->nmi_state; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + HD6309_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + HD6309_PC: info->i = PC; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + HD6309_S: info->i = S; break;
- case CPUINFO_INT_REGISTER + HD6309_CC: info->i = CC; break;
- case CPUINFO_INT_REGISTER + HD6309_MD: info->i = MD; break;
- case CPUINFO_INT_REGISTER + HD6309_U: info->i = U; break;
- case CPUINFO_INT_REGISTER + HD6309_A: info->i = A; break;
- case CPUINFO_INT_REGISTER + HD6309_B: info->i = B; break;
- case CPUINFO_INT_REGISTER + HD6309_E: info->i = E; break;
- case CPUINFO_INT_REGISTER + HD6309_F: info->i = F; break;
- case CPUINFO_INT_REGISTER + HD6309_X: info->i = X; break;
- case CPUINFO_INT_REGISTER + HD6309_Y: info->i = Y; break;
- case CPUINFO_INT_REGISTER + HD6309_V: info->i = V; break;
- case CPUINFO_INT_REGISTER + HD6309_DP: info->i = DP; break;
+ case CPUINFO_INT_REGISTER + HD6309_S: info->i = S; break;
+ case CPUINFO_INT_REGISTER + HD6309_CC: info->i = CC; break;
+ case CPUINFO_INT_REGISTER + HD6309_MD: info->i = MD; break;
+ case CPUINFO_INT_REGISTER + HD6309_U: info->i = U; break;
+ case CPUINFO_INT_REGISTER + HD6309_A: info->i = A; break;
+ case CPUINFO_INT_REGISTER + HD6309_B: info->i = B; break;
+ case CPUINFO_INT_REGISTER + HD6309_E: info->i = E; break;
+ case CPUINFO_INT_REGISTER + HD6309_F: info->i = F; break;
+ case CPUINFO_INT_REGISTER + HD6309_X: info->i = X; break;
+ case CPUINFO_INT_REGISTER + HD6309_Y: info->i = Y; break;
+ case CPUINFO_INT_REGISTER + HD6309_V: info->i = V; break;
+ case CPUINFO_INT_REGISTER + HD6309_DP: info->i = DP; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hd6309); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6309); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(hd6309); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(hd6309); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(hd6309); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6309); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68_state->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(hd6309); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6309); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(hd6309); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(hd6309); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(hd6309); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6309); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68_state->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "HD6309"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi 6309"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.01"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright John Butler and Tim Lindner"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "HD6309"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi 6309"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.01"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright John Butler and Tim Lindner"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c (MD:%c%c%c%c)",
@@ -1335,19 +1335,19 @@ CPU_GET_INFO( hd6309 )
m68_state->md & 0x01 ? 'Z':'z');
break;
- case CPUINFO_STR_REGISTER + HD6309_PC: sprintf(info->s, "PC:%04X", m68_state->pc.w.l); break;
- case CPUINFO_STR_REGISTER + HD6309_S: sprintf(info->s, "S:%04X", m68_state->s.w.l); break;
- case CPUINFO_STR_REGISTER + HD6309_CC: sprintf(info->s, "CC:%02X", m68_state->cc); break;
- case CPUINFO_STR_REGISTER + HD6309_MD: sprintf(info->s, "MD:%02X", m68_state->md); break;
- case CPUINFO_STR_REGISTER + HD6309_U: sprintf(info->s, "U:%04X", m68_state->u.w.l); break;
- case CPUINFO_STR_REGISTER + HD6309_A: sprintf(info->s, "A:%02X", m68_state->d.b.h); break;
- case CPUINFO_STR_REGISTER + HD6309_B: sprintf(info->s, "B:%02X", m68_state->d.b.l); break;
- case CPUINFO_STR_REGISTER + HD6309_E: sprintf(info->s, "E:%02X", m68_state->w.b.h); break;
- case CPUINFO_STR_REGISTER + HD6309_F: sprintf(info->s, "F:%02X", m68_state->w.b.l); break;
- case CPUINFO_STR_REGISTER + HD6309_X: sprintf(info->s, "X:%04X", m68_state->x.w.l); break;
- case CPUINFO_STR_REGISTER + HD6309_Y: sprintf(info->s, "Y:%04X", m68_state->y.w.l); break;
- case CPUINFO_STR_REGISTER + HD6309_V: sprintf(info->s, "V:%04X", m68_state->v.w.l); break;
- case CPUINFO_STR_REGISTER + HD6309_DP: sprintf(info->s, "DP:%02X", m68_state->dp.b.h); break;
+ case CPUINFO_STR_REGISTER + HD6309_PC: sprintf(info->s, "PC:%04X", m68_state->pc.w.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_S: sprintf(info->s, "S:%04X", m68_state->s.w.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_CC: sprintf(info->s, "CC:%02X", m68_state->cc); break;
+ case CPUINFO_STR_REGISTER + HD6309_MD: sprintf(info->s, "MD:%02X", m68_state->md); break;
+ case CPUINFO_STR_REGISTER + HD6309_U: sprintf(info->s, "U:%04X", m68_state->u.w.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_A: sprintf(info->s, "A:%02X", m68_state->d.b.h); break;
+ case CPUINFO_STR_REGISTER + HD6309_B: sprintf(info->s, "B:%02X", m68_state->d.b.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_E: sprintf(info->s, "E:%02X", m68_state->w.b.h); break;
+ case CPUINFO_STR_REGISTER + HD6309_F: sprintf(info->s, "F:%02X", m68_state->w.b.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_X: sprintf(info->s, "X:%04X", m68_state->x.w.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_Y: sprintf(info->s, "Y:%04X", m68_state->y.w.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_V: sprintf(info->s, "V:%04X", m68_state->v.w.l); break;
+ case CPUINFO_STR_REGISTER + HD6309_DP: sprintf(info->s, "DP:%02X", m68_state->dp.b.h); break;
}
}
diff --git a/src/emu/cpu/hd6309/hd6309.h b/src/emu/cpu/hd6309/hd6309.h
index 8fceaaccdae..9fc7d6f8262 100644
--- a/src/emu/cpu/hd6309/hd6309.h
+++ b/src/emu/cpu/hd6309/hd6309.h
@@ -12,8 +12,8 @@ enum
HD6309_E, HD6309_F, HD6309_V, HD6309_MD
};
-#define HD6309_IRQ_LINE 0 /* IRQ line number */
-#define HD6309_FIRQ_LINE 1 /* FIRQ line number */
+#define HD6309_IRQ_LINE 0 /* IRQ line number */
+#define HD6309_FIRQ_LINE 1 /* FIRQ line number */
/* PUBLIC FUNCTIONS */
diff --git a/src/emu/cpu/i386/cycles.h b/src/emu/cpu/i386/cycles.h
index 2bbb75fec5f..62fcb8f20c1 100644
--- a/src/emu/cpu/i386/cycles.h
+++ b/src/emu/cpu/i386/cycles.h
@@ -170,23 +170,23 @@ enum X86_CYCLES
CYCLES_BTS_IMM_MEM,
CYCLES_BTS_REG_REG,
CYCLES_BTS_REG_MEM,
- CYCLES_CALL, // E8
- CYCLES_CALL_REG, // FF /2
- CYCLES_CALL_MEM, // FF /2
- CYCLES_CALL_INTERSEG, // 9A
- CYCLES_CALL_REG_INTERSEG, // FF /3
- CYCLES_CALL_MEM_INTERSEG, // FF /3
- CYCLES_JMP_SHORT, // EB
- CYCLES_JMP, // E9
- CYCLES_JMP_REG, // FF /4
- CYCLES_JMP_MEM, // FF /4
- CYCLES_JMP_INTERSEG, // EA
- CYCLES_JMP_REG_INTERSEG, // FF /5
- CYCLES_JMP_MEM_INTERSEG, // FF /5
- CYCLES_RET, // C3
- CYCLES_RET_IMM, // C2
- CYCLES_RET_INTERSEG, // CB
- CYCLES_RET_IMM_INTERSEG, // CA
+ CYCLES_CALL, // E8
+ CYCLES_CALL_REG, // FF /2
+ CYCLES_CALL_MEM, // FF /2
+ CYCLES_CALL_INTERSEG, // 9A
+ CYCLES_CALL_REG_INTERSEG, // FF /3
+ CYCLES_CALL_MEM_INTERSEG, // FF /3
+ CYCLES_JMP_SHORT, // EB
+ CYCLES_JMP, // E9
+ CYCLES_JMP_REG, // FF /4
+ CYCLES_JMP_MEM, // FF /4
+ CYCLES_JMP_INTERSEG, // EA
+ CYCLES_JMP_REG_INTERSEG, // FF /5
+ CYCLES_JMP_MEM_INTERSEG, // FF /5
+ CYCLES_RET, // C3
+ CYCLES_RET_IMM, // C2
+ CYCLES_RET_INTERSEG, // CB
+ CYCLES_RET_IMM_INTERSEG, // CA
CYCLES_JCC_DISP8,
CYCLES_JCC_FULL_DISP,
CYCLES_JCC_DISP8_NOBRANCH,
@@ -330,11 +330,11 @@ enum X86_CYCLES
};
-#define X86_NUM_CPUS 4
-#define CPU_CYCLES_I386 0
-#define CPU_CYCLES_I486 1
-#define CPU_CYCLES_PENTIUM 2
-#define CPU_CYCLES_MEDIAGX 3
+#define X86_NUM_CPUS 4
+#define CPU_CYCLES_I386 0
+#define CPU_CYCLES_I486 1
+#define CPU_CYCLES_PENTIUM 2
+#define CPU_CYCLES_MEDIAGX 3
struct X86_CYCLE_TABLE
@@ -347,328 +347,328 @@ static const X86_CYCLE_TABLE x86_cycle_table[] =
{
// opcode rm/pmode
// i386 i486 pentium mediagx
- { CYCLES_MOV_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_MOV_REG_MEM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_MOV_MEM_REG, { { 4, 4 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_MOV_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_MOV_IMM_MEM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_MOV_ACC_MEM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_MOV_MEM_ACC, { { 4, 4 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_MOV_REG_SREG, { { 2, 18 }, { 3, 3 }, { 2, 2 }, { 1, 6 } } },
- { CYCLES_MOV_MEM_SREG, { { 5, 19 }, { 9, 9 }, { 3, 3 }, { 1, 6 } } },
- { CYCLES_MOV_SREG_REG, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 6 } } },
- { CYCLES_MOV_SREG_MEM, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 6 } } },
- { CYCLES_MOVSX_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_MOVSX_MEM_REG, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_MOVZX_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_MOVZX_MEM_REG, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_PUSH_RM, { { 5, 5 }, { 4, 4 }, { 2, 2 }, { 3, 3 } } },
- { CYCLES_PUSH_REG_SHORT, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_PUSH_SREG, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_PUSH_IMM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_PUSHA, { { 18, 18 }, { 11, 11 }, { 5, 5 }, { 11, 11 } } },
- { CYCLES_POP_RM, { { 5, 5 }, { 4, 4 }, { 3, 3 }, { 4, 4 } } },
- { CYCLES_POP_REG_SHORT, { { 4, 4 }, { 4, 4 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_POP_SREG, { { 7, 21 }, { 3, 3 }, { 3, 3 }, { 1, 6 } } },
- { CYCLES_POPA, { { 24, 24 }, { 9, 9 }, { 5, 5 }, { 9, 9 } } },
- { CYCLES_XCHG_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_XCHG_REG_MEM, { { 5, 5 }, { 5, 5 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_IN, { { 12, 26 }, { 14, 27 }, { 7, 19 }, { 8, 8 } } },
- { CYCLES_IN_VAR, { { 13, 27 }, { 14, 27 }, { 7, 19 }, { 8, 8 } } },
- { CYCLES_OUT, { { 10, 24 }, { 16, 29 }, { 12, 24 }, { 14, 14 } } },
- { CYCLES_OUT_VAR, { { 11, 25 }, { 16, 29 }, { 12, 24 }, { 14, 14 } } },
- { CYCLES_LEA, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_LDS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
- { CYCLES_LES, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
- { CYCLES_LFS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
- { CYCLES_LGS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
- { CYCLES_LSS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 10 } } },
- { CYCLES_CLC, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_CLD, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 4, 4 } } },
- { CYCLES_CLI, { { 8, 8 }, { 5, 5 }, { 7, 7 }, { 6, 6 } } },
- { CYCLES_CLTS, { { 6, 6 }, { 7, 7 }, { 10, 10 }, { 7, 7 } } },
- { CYCLES_CMC, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 3, 3 } } },
- { CYCLES_LAHF, { { 2, 2 }, { 3, 3 }, { 2, 2 }, { 2, 2 } } },
- { CYCLES_POPF, { { 5, 5 }, { 9, 9 }, { 6, 6 }, { 8, 8 } } },
- { CYCLES_PUSHF, { { 4, 4 }, { 4, 4 }, { 9, 9 }, { 2, 2 } } },
- { CYCLES_SAHF, { { 3, 3 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_STC, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_STD, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 4, 4 } } },
- { CYCLES_STI, { { 8, 8 }, { 5, 5 }, { 7, 7 }, { 6, 6 } } },
- { CYCLES_ALU_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_ALU_REG_MEM, { { 7, 7 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_ALU_MEM_REG, { { 6, 6 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_ALU_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_ALU_IMM_MEM, { { 7, 7 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_ALU_IMM_ACC, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_INC_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_INC_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_DEC_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_DEC_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_CMP_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_CMP_REG_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_CMP_MEM_REG, { { 6, 6 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_CMP_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_CMP_IMM_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_CMP_IMM_ACC, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_TEST_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_TEST_REG_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_TEST_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_TEST_IMM_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_TEST_IMM_ACC, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_NEG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_NEG_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_AAA, { { 4, 4 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
- { CYCLES_AAS, { { 4, 4 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
- { CYCLES_DAA, { { 4, 4 }, { 2, 2 }, { 3, 3 }, { 2, 2 } } },
- { CYCLES_DAS, { { 4, 4 }, { 2, 2 }, { 3, 3 }, { 2, 2 } } },
- { CYCLES_MUL8_ACC_REG, { { 17, 17 }, { 13, 13 }, { 11, 11 }, { 4, 4 } } },
- { CYCLES_MUL8_ACC_MEM, { { 20, 20 }, { 13, 13 }, { 11, 11 }, { 4, 4 } } },
- { CYCLES_MUL16_ACC_REG, { { 25, 25 }, { 13, 13 }, { 11, 11 }, { 5, 5 } } },
- { CYCLES_MUL16_ACC_MEM, { { 28, 28 }, { 13, 13 }, { 11, 11 }, { 5, 5 } } },
- { CYCLES_MUL32_ACC_REG, { { 41, 41 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
- { CYCLES_MUL32_ACC_MEM, { { 44, 44 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
- { CYCLES_IMUL8_ACC_REG, { { 17, 17 }, { 18, 18 }, { 11, 11 }, { 4, 4 } } },
- { CYCLES_IMUL8_ACC_MEM, { { 20, 20 }, { 18, 18 }, { 11, 11 }, { 4, 4 } } },
- { CYCLES_IMUL16_ACC_REG, { { 25, 25 }, { 26, 26 }, { 11, 11 }, { 5, 5 } } },
- { CYCLES_IMUL16_ACC_MEM, { { 28, 28 }, { 26, 26 }, { 11, 11 }, { 5, 5 } } },
- { CYCLES_IMUL32_ACC_REG, { { 41, 41 }, { 42, 42 }, { 10, 10 }, { 15, 15 } } },
- { CYCLES_IMUL32_ACC_MEM, { { 44, 44 }, { 42, 42 }, { 10, 10 }, { 15, 15 } } },
- { CYCLES_IMUL8_REG_REG, { { 17, 17 }, { 13, 13 }, { 10, 10 }, { 4, 4 } } },
- { CYCLES_IMUL8_REG_MEM, { { 20, 20 }, { 13, 13 }, { 10, 10 }, { 4, 4 } } },
- { CYCLES_IMUL16_REG_REG, { { 25, 25 }, { 13, 13 }, { 10, 10 }, { 5, 5 } } },
- { CYCLES_IMUL16_REG_MEM, { { 28, 28 }, { 13, 13 }, { 10, 10 }, { 5, 5 } } },
- { CYCLES_IMUL32_REG_REG, { { 41, 41 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
- { CYCLES_IMUL32_REG_MEM, { { 44, 44 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
- { CYCLES_IMUL16_REG_IMM_REG,{ { 26, 26 }, { 26, 26 }, { 10, 10 }, { 6, 6 } } },
- { CYCLES_IMUL16_MEM_IMM_REG,{ { 27, 27 }, { 26, 26 }, { 10, 10 }, { 6, 6 } } },
- { CYCLES_IMUL32_REG_IMM_REG,{ { 42, 42 }, { 42, 42 }, { 10, 10 }, { 16, 16 } } },
- { CYCLES_IMUL32_MEM_IMM_REG,{ { 43, 43 }, { 42, 42 }, { 10, 10 }, { 16, 16 } } },
- { CYCLES_DIV8_ACC_REG, { { 14, 14 }, { 16, 16 }, { 17, 17 }, { 20, 20 } } },
- { CYCLES_DIV8_ACC_MEM, { { 17, 17 }, { 16, 16 }, { 17, 17 }, { 20, 20 } } },
- { CYCLES_DIV16_ACC_REG, { { 22, 22 }, { 24, 24 }, { 25, 25 }, { 29, 29 } } },
- { CYCLES_DIV16_ACC_MEM, { { 25, 25 }, { 24, 24 }, { 25, 25 }, { 29, 29 } } },
- { CYCLES_DIV32_ACC_REG, { { 38, 38 }, { 40, 40 }, { 41, 41 }, { 45, 45 } } },
- { CYCLES_DIV32_ACC_MEM, { { 41, 41 }, { 40, 40 }, { 41, 41 }, { 45, 45 } } },
- { CYCLES_IDIV8_ACC_REG, { { 19, 19 }, { 19, 19 }, { 22, 22 }, { 20, 20 } } },
- { CYCLES_IDIV8_ACC_MEM, { { 22, 22 }, { 20, 20 }, { 22, 22 }, { 20, 20 } } },
- { CYCLES_IDIV16_ACC_REG, { { 27, 27 }, { 27, 27 }, { 30, 30 }, { 29, 29 } } },
- { CYCLES_IDIV16_ACC_MEM, { { 30, 30 }, { 28, 28 }, { 30, 30 }, { 29, 29 } } },
- { CYCLES_IDIV32_ACC_REG, { { 43, 43 }, { 43, 43 }, { 46, 46 }, { 45, 45 } } },
- { CYCLES_IDIV32_ACC_MEM, { { 46, 46 }, { 44, 44 }, { 46, 46 }, { 45, 45 } } },
- { CYCLES_AAD, { { 19, 19 }, { 14, 14 }, { 10, 10 }, { 7, 7 } } },
- { CYCLES_AAM, { { 17, 17 }, { 15, 15 }, { 18, 18 }, { 19, 19 } } },
- { CYCLES_CBW, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
- { CYCLES_CWD, { { 2, 2 }, { 3, 3 }, { 2, 2 }, { 2, 2 } } },
- { CYCLES_ROTATE_REG, { { 3, 3 }, { 3, 3 }, { 1, 1 }, { 2, 2 } } },
- { CYCLES_ROTATE_MEM, { { 7, 7 }, { 4, 4 }, { 3, 3 }, { 2, 2 } } },
- { CYCLES_ROTATE_CARRY_REG, { { 9, 9 }, { 8, 8 }, { 7, 7 }, { 8, 8 } } },
- { CYCLES_ROTATE_CARRY_MEM, { { 10, 10 }, { 9, 9 }, { 8, 8 }, { 8, 8 } } },
- { CYCLES_SHLD_REG, { { 3, 3 }, { 2, 2 }, { 4, 4 }, { 3, 3 } } },
- { CYCLES_SHLD_MEM, { { 7, 7 }, { 3, 3 }, { 4, 4 }, { 6, 6 } } },
- { CYCLES_SHRD_REG, { { 3, 3 }, { 2, 2 }, { 4, 4 }, { 3, 3 } } },
- { CYCLES_SHRD_MEM, { { 7, 7 }, { 3, 3 }, { 4, 4 }, { 6, 6 } } },
- { CYCLES_NOT_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_NOT_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_CMPS, { { 10, 10 }, { 8, 8 }, { 5, 5 }, { 6, 6 } } },
- { CYCLES_INS, { { 15, 29 }, { 17, 30 }, { 9, 22 }, { 11, 11 } } },
- { CYCLES_LODS, { { 5, 5 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
- { CYCLES_MOVS, { { 8, 8 }, { 7, 7 }, { 4, 4 }, { 6, 6 } } },
- { CYCLES_OUTS, { { 14, 28 }, { 17, 30 }, { 13, 25 }, { 15, 15 } } },
- { CYCLES_SCAS, { { 8, 8 }, { 6, 6 }, { 4, 4 }, { 2, 2 } } },
- { CYCLES_STOS, { { 5, 5 }, { 5, 5 }, { 3, 3 }, { 2, 2 } } },
- { CYCLES_XLAT, { { 5, 5 }, { 4, 4 }, { 4, 4 }, { 5, 5 } } },
- { CYCLES_REP_CMPS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 11, 11 } } },
- { CYCLES_REP_INS_BASE, { { 14, 8 }, { 0, 0 }, { 0, 0 }, { 17, 17 } } },
- { CYCLES_REP_LODS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 9, 9 } } },
- { CYCLES_REP_MOVS_BASE, { { 8, 8 }, { 0, 0 }, { 0, 0 }, { 12, 12 } } },
- { CYCLES_REP_OUTS_BASE, { { 12, 6 }, { 0, 0 }, { 0, 0 }, { 24, 24 } } },
- { CYCLES_REP_SCAS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 9, 9 } } },
- { CYCLES_REP_STOS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 9, 9 } } },
- { CYCLES_REP_CMPS, { { 5, 5 }, { 8, 8 }, { 5, 5 }, { 4, 4 } } },
- { CYCLES_REP_INS, { { 14, 8 }, { 17, 30 }, { 9, 22 }, { 4, 4 } } },
- { CYCLES_REP_LODS, { { 5, 5 }, { 5, 5 }, { 2, 2 }, { 2, 2 } } },
- { CYCLES_REP_MOVS, { { 8, 8 }, { 7, 7 }, { 4, 4 }, { 2, 2 } } },
- { CYCLES_REP_OUTS, { { 12, 6 }, { 17, 30 }, { 13, 25 }, { 4, 4 } } },
- { CYCLES_REP_SCAS, { { 5, 5 }, { 6, 6 }, { 4, 4 }, { 3, 3 } } },
- { CYCLES_REP_STOS, { { 5, 5 }, { 5, 5 }, { 3, 3 }, { 2, 2 } } },
- { CYCLES_BSF_BASE, { { 11, 11 }, { 6, 6 }, { 6, 6 }, { 4, 4 } } },
- { CYCLES_BSF, { { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_BSR_BASE, { { 9, 9 }, { 6, 6 }, { 7, 7 }, { 4, 4 } } },
- { CYCLES_BSR, { { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_BT_IMM_REG, { { 3, 3 }, { 3, 3 }, { 4, 4 }, { 1, 1 } } },
- { CYCLES_BT_IMM_MEM, { { 6, 6 }, { 6, 6 }, { 4, 4 }, { 1, 1 } } },
- { CYCLES_BT_REG_REG, { { 3, 3 }, { 3, 3 }, { 4, 4 }, { 1, 1 } } },
- { CYCLES_BT_REG_MEM, { { 12, 12 }, { 12, 12 }, { 9, 9 }, { 7, 7 } } },
- { CYCLES_BTC_IMM_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
- { CYCLES_BTC_IMM_MEM, { { 8, 8 }, { 8, 8 }, { 8, 8 }, { 2, 2 } } },
- { CYCLES_BTC_REG_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
- { CYCLES_BTC_REG_MEM, { { 13, 13 }, { 13, 13 }, { 13, 13 }, { 8, 8 } } },
- { CYCLES_BTR_IMM_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
- { CYCLES_BTR_IMM_MEM, { { 8, 8 }, { 8, 8 }, { 8, 8 }, { 2, 2 } } },
- { CYCLES_BTR_REG_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
- { CYCLES_BTR_REG_MEM, { { 13, 13 }, { 13, 13 }, { 13, 13 }, { 8, 8 } } },
- { CYCLES_BTS_IMM_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
- { CYCLES_BTS_IMM_MEM, { { 8, 8 }, { 8, 8 }, { 8, 8 }, { 2, 2 } } },
- { CYCLES_BTS_REG_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
- { CYCLES_BTS_REG_MEM, { { 13, 13 }, { 13, 13 }, { 13, 13 }, { 8, 8 } } },
- { CYCLES_CALL, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 3, 3 } } },
- { CYCLES_CALL_REG, { { 7, 7 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
- { CYCLES_CALL_MEM, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 4, 4 } } },
- { CYCLES_CALL_INTERSEG, { { 17, 34 }, { 18, 20 }, { 4, 13 }, { 9, 14 } } },
- { CYCLES_CALL_REG_INTERSEG, { { 22, 38 }, { 17, 20 }, { 4, 14 }, { 11, 15 } } },
- { CYCLES_CALL_MEM_INTERSEG, { { 22, 38 }, { 17, 20 }, { 4, 14 }, { 11, 15 } } },
- { CYCLES_JMP_SHORT, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_JMP, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_JMP_REG, { { 7, 7 }, { 5, 5 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_JMP_MEM, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
- { CYCLES_JMP_INTERSEG, { { 12, 27 }, { 17, 19 }, { 3, 3 }, { 8, 12 } } },
- { CYCLES_JMP_REG_INTERSEG, { { 17, 31 }, { 13, 18 }, { 4, 4 }, { 10, 10 } } },
- { CYCLES_JMP_MEM_INTERSEG, { { 17, 31 }, { 13, 18 }, { 4, 4 }, { 10, 13 } } },
- { CYCLES_RET, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
- { CYCLES_RET_IMM, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
- { CYCLES_RET_INTERSEG, { { 18, 32 }, { 13, 13 }, { 4, 4 }, { 10, 13 } } },
- { CYCLES_RET_IMM_INTERSEG, { { 18, 32 }, { 14, 14 }, { 4, 4 }, { 10, 13 } } },
- { CYCLES_JCC_DISP8, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_JCC_FULL_DISP, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_JCC_DISP8_NOBRANCH,{ { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_JCC_FULL_DISP_NOBRANCH,{ { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_JCXZ, { { 9, 9 }, { 1, 1 }, { 1, 1 }, { 2, 2 } } },
- { CYCLES_JCXZ_NOBRANCH, { { 5, 5 }, { 1, 1 }, { 1, 1 }, { 2, 2 } } },
- { CYCLES_LOOP, { { 11, 11 }, { 6, 6 }, { 5, 5 }, { 2, 2 } } },
- { CYCLES_LOOPZ, { { 11, 11 }, { 9, 9 }, { 8, 8 }, { 2, 2 } } },
- { CYCLES_LOOPNZ, { { 11, 11 }, { 9, 9 }, { 8, 8 }, { 2, 2 } } },
- { CYCLES_SETCC_REG, { { 4, 4 }, { 3, 3 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_SETCC_MEM, { { 5, 5 }, { 4, 4 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_ENTER, { { 10, 10 }, { 14, 14 }, { 11, 11 }, { 13, 13 } } },
- { CYCLES_LEAVE, { { 4, 4 }, { 5, 5 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_INT, { { 37, 37 }, { 30, 30 }, { 16, 16 }, { 19, 19 } } },
- { CYCLES_INT3, { { 33, 33 }, { 26, 26 }, { 13, 13 }, { 19, 19 } } },
- { CYCLES_INTO_OF1, { { 35, 35 }, { 28, 28 }, { 13, 13 }, { 19, 19 } } },
- { CYCLES_INTO_OF0, { { 3, 3 }, { 3, 3 }, { 4, 4 }, { 4, 4 } } },
- { CYCLES_BOUND_IN_RANGE, { { 10, 10 }, { 7, 7 }, { 8, 8 }, { 7, 7 } } },
- { CYCLES_BOUND_OUT_RANGE, { { 44, 44 }, { 7, 7 }, { 8, 8 }, { 8, 8 } } },
- { CYCLES_IRET, { { 22, 22 }, { 15, 15 }, { 8, 8 }, { 13, 13 } } },
- { CYCLES_HLT, { { 5, 5 }, { 4, 4 }, { 4, 4 }, { 10, 10 } } },
- { CYCLES_MOV_REG_CR0, { { 11, 11 }, { 16, 16 }, { 16, 16 }, { 20, 18 } } },
- { CYCLES_MOV_REG_CR2, { { 4, 4 }, { 4, 4 }, { 4, 4 }, { 5, 5 } } },
- { CYCLES_MOV_REG_CR3, { { 5, 5 }, { 4, 4 }, { 4, 4 }, { 5, 6 } } },
- { CYCLES_MOV_CR_REG, { { 6, 6 }, { 4, 4 }, { 4, 4 }, { 6, 6 } } },
- { CYCLES_MOV_REG_DR0_3, { { 22, 22 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } },
- { CYCLES_MOV_REG_DR6_7, { { 16, 16 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } },
- { CYCLES_MOV_DR6_7_REG, { { 14, 14 }, { 11, 11 }, { 11, 11 }, { 9, 9 } } },
- { CYCLES_MOV_DR0_3_REG, { { 22, 22 }, { 11, 11 }, { 11, 11 }, { 9, 9 } } },
- { CYCLES_MOV_REG_TR6_7, { { 12, 12 }, { 4, 4 }, { 4, 4 }, { 11, 11 } } },
- { CYCLES_MOV_TR6_7_REG, { { 12, 12 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
- { CYCLES_NOP, { { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_WAIT, { { 7, 7 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_ARPL_REG, { { 0, 20 }, { 0, 9 }, { 0, 7 }, { 0, 9 } } },
- { CYCLES_ARPL_MEM, { { 0, 21 }, { 0, 9 }, { 0, 7 }, { 0, 9 } } },
- { CYCLES_LAR_REG, { { 0, 15 }, { 11, 11 }, { 8, 8 }, { 0, 9 } } },
- { CYCLES_LAR_MEM, { { 0, 16 }, { 11, 11 }, { 8, 8 }, { 0, 9 } } },
- { CYCLES_LGDT, { { 11, 11 }, { 11, 11 }, { 6, 6 }, { 10, 10 } } },
- { CYCLES_LIDT, { { 11, 11 }, { 11, 11 }, { 6, 6 }, { 10, 10 } } },
- { CYCLES_LLDT_REG, { { 0, 20 }, { 11, 11 }, { 9, 9 }, { 0, 8 } } },
- { CYCLES_LLDT_MEM, { { 0, 24 }, { 11, 11 }, { 9, 9 }, { 0, 8 } } },
- { CYCLES_LMSW_REG, { { 11, 11 }, { 13, 13 }, { 8, 8 }, { 11, 11 } } },
- { CYCLES_LMSW_MEM, { { 14, 14 }, { 13, 13 }, { 8, 8 }, { 11, 11 } } },
- { CYCLES_LSL_REG, { { 0, 21 }, { 10, 10 }, { 8, 8 }, { 0, 9 } } },
- { CYCLES_LSL_MEM, { { 0, 22 }, { 10, 10 }, { 8, 8 }, { 0, 9 } } },
- { CYCLES_LTR_REG, { { 0, 23 }, { 20, 20 }, { 10, 10 }, { 0, 9 } } },
- { CYCLES_LTR_MEM, { { 0, 27 }, { 20, 20 }, { 10, 10 }, { 0, 9 } } },
- { CYCLES_SGDT, { { 9, 9 }, { 10, 10 }, { 4, 4 }, { 6, 6 } } },
- { CYCLES_SIDT, { { 9, 9 }, { 10, 10 }, { 4, 4 }, { 6, 6 } } },
- { CYCLES_SLDT_REG, { { 0, 2 }, { 2, 2 }, { 2, 2 }, { 0, 1 } } },
- { CYCLES_SLDT_MEM, { { 0, 2 }, { 3, 3 }, { 2, 2 }, { 0, 1 } } },
- { CYCLES_SMSW_REG, { { 2, 2 }, { 2, 2 }, { 4, 4 }, { 4, 4 } } },
- { CYCLES_SMSW_MEM, { { 2, 2 }, { 3, 3 }, { 4, 4 }, { 4, 4 } } },
- { CYCLES_STR_REG, { { 0, 2 }, { 2, 2 }, { 2, 2 }, { 0, 3 } } },
- { CYCLES_STR_MEM, { { 0, 2 }, { 3, 3 }, { 2, 2 }, { 0, 3 } } },
- { CYCLES_VERR_REG, { { 0, 10 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
- { CYCLES_VERR_MEM, { { 0, 11 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
- { CYCLES_VERW_REG, { { 0, 15 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
- { CYCLES_VERW_MEM, { { 0, 16 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
- { CYCLES_LOCK, { { 0, 0 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_REG_MEM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_MEM_REG, { { 4, 4 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_IMM_MEM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_ACC_MEM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_MEM_ACC, { { 4, 4 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_MOV_REG_SREG, { { 2, 18 }, { 3, 3 }, { 2, 2 }, { 1, 6 } } },
+ { CYCLES_MOV_MEM_SREG, { { 5, 19 }, { 9, 9 }, { 3, 3 }, { 1, 6 } } },
+ { CYCLES_MOV_SREG_REG, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 6 } } },
+ { CYCLES_MOV_SREG_MEM, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 6 } } },
+ { CYCLES_MOVSX_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_MOVSX_MEM_REG, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_MOVZX_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_MOVZX_MEM_REG, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_PUSH_RM, { { 5, 5 }, { 4, 4 }, { 2, 2 }, { 3, 3 } } },
+ { CYCLES_PUSH_REG_SHORT, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_PUSH_SREG, { { 2, 2 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_PUSH_IMM, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_PUSHA, { { 18, 18 }, { 11, 11 }, { 5, 5 }, { 11, 11 } } },
+ { CYCLES_POP_RM, { { 5, 5 }, { 4, 4 }, { 3, 3 }, { 4, 4 } } },
+ { CYCLES_POP_REG_SHORT, { { 4, 4 }, { 4, 4 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_POP_SREG, { { 7, 21 }, { 3, 3 }, { 3, 3 }, { 1, 6 } } },
+ { CYCLES_POPA, { { 24, 24 }, { 9, 9 }, { 5, 5 }, { 9, 9 } } },
+ { CYCLES_XCHG_REG_REG, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_XCHG_REG_MEM, { { 5, 5 }, { 5, 5 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_IN, { { 12, 26 }, { 14, 27 }, { 7, 19 }, { 8, 8 } } },
+ { CYCLES_IN_VAR, { { 13, 27 }, { 14, 27 }, { 7, 19 }, { 8, 8 } } },
+ { CYCLES_OUT, { { 10, 24 }, { 16, 29 }, { 12, 24 }, { 14, 14 } } },
+ { CYCLES_OUT_VAR, { { 11, 25 }, { 16, 29 }, { 12, 24 }, { 14, 14 } } },
+ { CYCLES_LEA, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_LDS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
+ { CYCLES_LES, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
+ { CYCLES_LFS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
+ { CYCLES_LGS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 9 } } },
+ { CYCLES_LSS, { { 7, 22 }, { 6, 12 }, { 4, 4 }, { 4, 10 } } },
+ { CYCLES_CLC, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_CLD, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 4, 4 } } },
+ { CYCLES_CLI, { { 8, 8 }, { 5, 5 }, { 7, 7 }, { 6, 6 } } },
+ { CYCLES_CLTS, { { 6, 6 }, { 7, 7 }, { 10, 10 }, { 7, 7 } } },
+ { CYCLES_CMC, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 3, 3 } } },
+ { CYCLES_LAHF, { { 2, 2 }, { 3, 3 }, { 2, 2 }, { 2, 2 } } },
+ { CYCLES_POPF, { { 5, 5 }, { 9, 9 }, { 6, 6 }, { 8, 8 } } },
+ { CYCLES_PUSHF, { { 4, 4 }, { 4, 4 }, { 9, 9 }, { 2, 2 } } },
+ { CYCLES_SAHF, { { 3, 3 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_STC, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_STD, { { 2, 2 }, { 2, 2 }, { 2, 2 }, { 4, 4 } } },
+ { CYCLES_STI, { { 8, 8 }, { 5, 5 }, { 7, 7 }, { 6, 6 } } },
+ { CYCLES_ALU_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_ALU_REG_MEM, { { 7, 7 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_ALU_MEM_REG, { { 6, 6 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_ALU_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_ALU_IMM_MEM, { { 7, 7 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_ALU_IMM_ACC, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_INC_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_INC_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_DEC_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_DEC_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_CMP_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_CMP_REG_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_CMP_MEM_REG, { { 6, 6 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_CMP_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_CMP_IMM_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_CMP_IMM_ACC, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_TEST_REG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_TEST_REG_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_TEST_IMM_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_TEST_IMM_MEM, { { 5, 5 }, { 2, 2 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_TEST_IMM_ACC, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_NEG_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_NEG_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_AAA, { { 4, 4 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
+ { CYCLES_AAS, { { 4, 4 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
+ { CYCLES_DAA, { { 4, 4 }, { 2, 2 }, { 3, 3 }, { 2, 2 } } },
+ { CYCLES_DAS, { { 4, 4 }, { 2, 2 }, { 3, 3 }, { 2, 2 } } },
+ { CYCLES_MUL8_ACC_REG, { { 17, 17 }, { 13, 13 }, { 11, 11 }, { 4, 4 } } },
+ { CYCLES_MUL8_ACC_MEM, { { 20, 20 }, { 13, 13 }, { 11, 11 }, { 4, 4 } } },
+ { CYCLES_MUL16_ACC_REG, { { 25, 25 }, { 13, 13 }, { 11, 11 }, { 5, 5 } } },
+ { CYCLES_MUL16_ACC_MEM, { { 28, 28 }, { 13, 13 }, { 11, 11 }, { 5, 5 } } },
+ { CYCLES_MUL32_ACC_REG, { { 41, 41 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
+ { CYCLES_MUL32_ACC_MEM, { { 44, 44 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
+ { CYCLES_IMUL8_ACC_REG, { { 17, 17 }, { 18, 18 }, { 11, 11 }, { 4, 4 } } },
+ { CYCLES_IMUL8_ACC_MEM, { { 20, 20 }, { 18, 18 }, { 11, 11 }, { 4, 4 } } },
+ { CYCLES_IMUL16_ACC_REG, { { 25, 25 }, { 26, 26 }, { 11, 11 }, { 5, 5 } } },
+ { CYCLES_IMUL16_ACC_MEM, { { 28, 28 }, { 26, 26 }, { 11, 11 }, { 5, 5 } } },
+ { CYCLES_IMUL32_ACC_REG, { { 41, 41 }, { 42, 42 }, { 10, 10 }, { 15, 15 } } },
+ { CYCLES_IMUL32_ACC_MEM, { { 44, 44 }, { 42, 42 }, { 10, 10 }, { 15, 15 } } },
+ { CYCLES_IMUL8_REG_REG, { { 17, 17 }, { 13, 13 }, { 10, 10 }, { 4, 4 } } },
+ { CYCLES_IMUL8_REG_MEM, { { 20, 20 }, { 13, 13 }, { 10, 10 }, { 4, 4 } } },
+ { CYCLES_IMUL16_REG_REG, { { 25, 25 }, { 13, 13 }, { 10, 10 }, { 5, 5 } } },
+ { CYCLES_IMUL16_REG_MEM, { { 28, 28 }, { 13, 13 }, { 10, 10 }, { 5, 5 } } },
+ { CYCLES_IMUL32_REG_REG, { { 41, 41 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
+ { CYCLES_IMUL32_REG_MEM, { { 44, 44 }, { 13, 13 }, { 10, 10 }, { 15, 15 } } },
+ { CYCLES_IMUL16_REG_IMM_REG,{ { 26, 26 }, { 26, 26 }, { 10, 10 }, { 6, 6 } } },
+ { CYCLES_IMUL16_MEM_IMM_REG,{ { 27, 27 }, { 26, 26 }, { 10, 10 }, { 6, 6 } } },
+ { CYCLES_IMUL32_REG_IMM_REG,{ { 42, 42 }, { 42, 42 }, { 10, 10 }, { 16, 16 } } },
+ { CYCLES_IMUL32_MEM_IMM_REG,{ { 43, 43 }, { 42, 42 }, { 10, 10 }, { 16, 16 } } },
+ { CYCLES_DIV8_ACC_REG, { { 14, 14 }, { 16, 16 }, { 17, 17 }, { 20, 20 } } },
+ { CYCLES_DIV8_ACC_MEM, { { 17, 17 }, { 16, 16 }, { 17, 17 }, { 20, 20 } } },
+ { CYCLES_DIV16_ACC_REG, { { 22, 22 }, { 24, 24 }, { 25, 25 }, { 29, 29 } } },
+ { CYCLES_DIV16_ACC_MEM, { { 25, 25 }, { 24, 24 }, { 25, 25 }, { 29, 29 } } },
+ { CYCLES_DIV32_ACC_REG, { { 38, 38 }, { 40, 40 }, { 41, 41 }, { 45, 45 } } },
+ { CYCLES_DIV32_ACC_MEM, { { 41, 41 }, { 40, 40 }, { 41, 41 }, { 45, 45 } } },
+ { CYCLES_IDIV8_ACC_REG, { { 19, 19 }, { 19, 19 }, { 22, 22 }, { 20, 20 } } },
+ { CYCLES_IDIV8_ACC_MEM, { { 22, 22 }, { 20, 20 }, { 22, 22 }, { 20, 20 } } },
+ { CYCLES_IDIV16_ACC_REG, { { 27, 27 }, { 27, 27 }, { 30, 30 }, { 29, 29 } } },
+ { CYCLES_IDIV16_ACC_MEM, { { 30, 30 }, { 28, 28 }, { 30, 30 }, { 29, 29 } } },
+ { CYCLES_IDIV32_ACC_REG, { { 43, 43 }, { 43, 43 }, { 46, 46 }, { 45, 45 } } },
+ { CYCLES_IDIV32_ACC_MEM, { { 46, 46 }, { 44, 44 }, { 46, 46 }, { 45, 45 } } },
+ { CYCLES_AAD, { { 19, 19 }, { 14, 14 }, { 10, 10 }, { 7, 7 } } },
+ { CYCLES_AAM, { { 17, 17 }, { 15, 15 }, { 18, 18 }, { 19, 19 } } },
+ { CYCLES_CBW, { { 3, 3 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
+ { CYCLES_CWD, { { 2, 2 }, { 3, 3 }, { 2, 2 }, { 2, 2 } } },
+ { CYCLES_ROTATE_REG, { { 3, 3 }, { 3, 3 }, { 1, 1 }, { 2, 2 } } },
+ { CYCLES_ROTATE_MEM, { { 7, 7 }, { 4, 4 }, { 3, 3 }, { 2, 2 } } },
+ { CYCLES_ROTATE_CARRY_REG, { { 9, 9 }, { 8, 8 }, { 7, 7 }, { 8, 8 } } },
+ { CYCLES_ROTATE_CARRY_MEM, { { 10, 10 }, { 9, 9 }, { 8, 8 }, { 8, 8 } } },
+ { CYCLES_SHLD_REG, { { 3, 3 }, { 2, 2 }, { 4, 4 }, { 3, 3 } } },
+ { CYCLES_SHLD_MEM, { { 7, 7 }, { 3, 3 }, { 4, 4 }, { 6, 6 } } },
+ { CYCLES_SHRD_REG, { { 3, 3 }, { 2, 2 }, { 4, 4 }, { 3, 3 } } },
+ { CYCLES_SHRD_MEM, { { 7, 7 }, { 3, 3 }, { 4, 4 }, { 6, 6 } } },
+ { CYCLES_NOT_REG, { { 2, 2 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_NOT_MEM, { { 6, 6 }, { 3, 3 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_CMPS, { { 10, 10 }, { 8, 8 }, { 5, 5 }, { 6, 6 } } },
+ { CYCLES_INS, { { 15, 29 }, { 17, 30 }, { 9, 22 }, { 11, 11 } } },
+ { CYCLES_LODS, { { 5, 5 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
+ { CYCLES_MOVS, { { 8, 8 }, { 7, 7 }, { 4, 4 }, { 6, 6 } } },
+ { CYCLES_OUTS, { { 14, 28 }, { 17, 30 }, { 13, 25 }, { 15, 15 } } },
+ { CYCLES_SCAS, { { 8, 8 }, { 6, 6 }, { 4, 4 }, { 2, 2 } } },
+ { CYCLES_STOS, { { 5, 5 }, { 5, 5 }, { 3, 3 }, { 2, 2 } } },
+ { CYCLES_XLAT, { { 5, 5 }, { 4, 4 }, { 4, 4 }, { 5, 5 } } },
+ { CYCLES_REP_CMPS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 11, 11 } } },
+ { CYCLES_REP_INS_BASE, { { 14, 8 }, { 0, 0 }, { 0, 0 }, { 17, 17 } } },
+ { CYCLES_REP_LODS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 9, 9 } } },
+ { CYCLES_REP_MOVS_BASE, { { 8, 8 }, { 0, 0 }, { 0, 0 }, { 12, 12 } } },
+ { CYCLES_REP_OUTS_BASE, { { 12, 6 }, { 0, 0 }, { 0, 0 }, { 24, 24 } } },
+ { CYCLES_REP_SCAS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 9, 9 } } },
+ { CYCLES_REP_STOS_BASE, { { 5, 5 }, { 0, 0 }, { 0, 0 }, { 9, 9 } } },
+ { CYCLES_REP_CMPS, { { 5, 5 }, { 8, 8 }, { 5, 5 }, { 4, 4 } } },
+ { CYCLES_REP_INS, { { 14, 8 }, { 17, 30 }, { 9, 22 }, { 4, 4 } } },
+ { CYCLES_REP_LODS, { { 5, 5 }, { 5, 5 }, { 2, 2 }, { 2, 2 } } },
+ { CYCLES_REP_MOVS, { { 8, 8 }, { 7, 7 }, { 4, 4 }, { 2, 2 } } },
+ { CYCLES_REP_OUTS, { { 12, 6 }, { 17, 30 }, { 13, 25 }, { 4, 4 } } },
+ { CYCLES_REP_SCAS, { { 5, 5 }, { 6, 6 }, { 4, 4 }, { 3, 3 } } },
+ { CYCLES_REP_STOS, { { 5, 5 }, { 5, 5 }, { 3, 3 }, { 2, 2 } } },
+ { CYCLES_BSF_BASE, { { 11, 11 }, { 6, 6 }, { 6, 6 }, { 4, 4 } } },
+ { CYCLES_BSF, { { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_BSR_BASE, { { 9, 9 }, { 6, 6 }, { 7, 7 }, { 4, 4 } } },
+ { CYCLES_BSR, { { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_BT_IMM_REG, { { 3, 3 }, { 3, 3 }, { 4, 4 }, { 1, 1 } } },
+ { CYCLES_BT_IMM_MEM, { { 6, 6 }, { 6, 6 }, { 4, 4 }, { 1, 1 } } },
+ { CYCLES_BT_REG_REG, { { 3, 3 }, { 3, 3 }, { 4, 4 }, { 1, 1 } } },
+ { CYCLES_BT_REG_MEM, { { 12, 12 }, { 12, 12 }, { 9, 9 }, { 7, 7 } } },
+ { CYCLES_BTC_IMM_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
+ { CYCLES_BTC_IMM_MEM, { { 8, 8 }, { 8, 8 }, { 8, 8 }, { 2, 2 } } },
+ { CYCLES_BTC_REG_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
+ { CYCLES_BTC_REG_MEM, { { 13, 13 }, { 13, 13 }, { 13, 13 }, { 8, 8 } } },
+ { CYCLES_BTR_IMM_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
+ { CYCLES_BTR_IMM_MEM, { { 8, 8 }, { 8, 8 }, { 8, 8 }, { 2, 2 } } },
+ { CYCLES_BTR_REG_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
+ { CYCLES_BTR_REG_MEM, { { 13, 13 }, { 13, 13 }, { 13, 13 }, { 8, 8 } } },
+ { CYCLES_BTS_IMM_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
+ { CYCLES_BTS_IMM_MEM, { { 8, 8 }, { 8, 8 }, { 8, 8 }, { 2, 2 } } },
+ { CYCLES_BTS_REG_REG, { { 6, 6 }, { 6, 6 }, { 7, 7 }, { 2, 2 } } },
+ { CYCLES_BTS_REG_MEM, { { 13, 13 }, { 13, 13 }, { 13, 13 }, { 8, 8 } } },
+ { CYCLES_CALL, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 3, 3 } } },
+ { CYCLES_CALL_REG, { { 7, 7 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
+ { CYCLES_CALL_MEM, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 4, 4 } } },
+ { CYCLES_CALL_INTERSEG, { { 17, 34 }, { 18, 20 }, { 4, 13 }, { 9, 14 } } },
+ { CYCLES_CALL_REG_INTERSEG, { { 22, 38 }, { 17, 20 }, { 4, 14 }, { 11, 15 } } },
+ { CYCLES_CALL_MEM_INTERSEG, { { 22, 38 }, { 17, 20 }, { 4, 14 }, { 11, 15 } } },
+ { CYCLES_JMP_SHORT, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_JMP, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_JMP_REG, { { 7, 7 }, { 5, 5 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_JMP_MEM, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
+ { CYCLES_JMP_INTERSEG, { { 12, 27 }, { 17, 19 }, { 3, 3 }, { 8, 12 } } },
+ { CYCLES_JMP_REG_INTERSEG, { { 17, 31 }, { 13, 18 }, { 4, 4 }, { 10, 10 } } },
+ { CYCLES_JMP_MEM_INTERSEG, { { 17, 31 }, { 13, 18 }, { 4, 4 }, { 10, 13 } } },
+ { CYCLES_RET, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
+ { CYCLES_RET_IMM, { { 10, 10 }, { 5, 5 }, { 2, 2 }, { 3, 3 } } },
+ { CYCLES_RET_INTERSEG, { { 18, 32 }, { 13, 13 }, { 4, 4 }, { 10, 13 } } },
+ { CYCLES_RET_IMM_INTERSEG, { { 18, 32 }, { 14, 14 }, { 4, 4 }, { 10, 13 } } },
+ { CYCLES_JCC_DISP8, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_JCC_FULL_DISP, { { 7, 7 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_JCC_DISP8_NOBRANCH,{ { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_JCC_FULL_DISP_NOBRANCH,{ { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_JCXZ, { { 9, 9 }, { 1, 1 }, { 1, 1 }, { 2, 2 } } },
+ { CYCLES_JCXZ_NOBRANCH, { { 5, 5 }, { 1, 1 }, { 1, 1 }, { 2, 2 } } },
+ { CYCLES_LOOP, { { 11, 11 }, { 6, 6 }, { 5, 5 }, { 2, 2 } } },
+ { CYCLES_LOOPZ, { { 11, 11 }, { 9, 9 }, { 8, 8 }, { 2, 2 } } },
+ { CYCLES_LOOPNZ, { { 11, 11 }, { 9, 9 }, { 8, 8 }, { 2, 2 } } },
+ { CYCLES_SETCC_REG, { { 4, 4 }, { 3, 3 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_SETCC_MEM, { { 5, 5 }, { 4, 4 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_ENTER, { { 10, 10 }, { 14, 14 }, { 11, 11 }, { 13, 13 } } },
+ { CYCLES_LEAVE, { { 4, 4 }, { 5, 5 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_INT, { { 37, 37 }, { 30, 30 }, { 16, 16 }, { 19, 19 } } },
+ { CYCLES_INT3, { { 33, 33 }, { 26, 26 }, { 13, 13 }, { 19, 19 } } },
+ { CYCLES_INTO_OF1, { { 35, 35 }, { 28, 28 }, { 13, 13 }, { 19, 19 } } },
+ { CYCLES_INTO_OF0, { { 3, 3 }, { 3, 3 }, { 4, 4 }, { 4, 4 } } },
+ { CYCLES_BOUND_IN_RANGE, { { 10, 10 }, { 7, 7 }, { 8, 8 }, { 7, 7 } } },
+ { CYCLES_BOUND_OUT_RANGE, { { 44, 44 }, { 7, 7 }, { 8, 8 }, { 8, 8 } } },
+ { CYCLES_IRET, { { 22, 22 }, { 15, 15 }, { 8, 8 }, { 13, 13 } } },
+ { CYCLES_HLT, { { 5, 5 }, { 4, 4 }, { 4, 4 }, { 10, 10 } } },
+ { CYCLES_MOV_REG_CR0, { { 11, 11 }, { 16, 16 }, { 16, 16 }, { 20, 18 } } },
+ { CYCLES_MOV_REG_CR2, { { 4, 4 }, { 4, 4 }, { 4, 4 }, { 5, 5 } } },
+ { CYCLES_MOV_REG_CR3, { { 5, 5 }, { 4, 4 }, { 4, 4 }, { 5, 6 } } },
+ { CYCLES_MOV_CR_REG, { { 6, 6 }, { 4, 4 }, { 4, 4 }, { 6, 6 } } },
+ { CYCLES_MOV_REG_DR0_3, { { 22, 22 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } },
+ { CYCLES_MOV_REG_DR6_7, { { 16, 16 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } },
+ { CYCLES_MOV_DR6_7_REG, { { 14, 14 }, { 11, 11 }, { 11, 11 }, { 9, 9 } } },
+ { CYCLES_MOV_DR0_3_REG, { { 22, 22 }, { 11, 11 }, { 11, 11 }, { 9, 9 } } },
+ { CYCLES_MOV_REG_TR6_7, { { 12, 12 }, { 4, 4 }, { 4, 4 }, { 11, 11 } } },
+ { CYCLES_MOV_TR6_7_REG, { { 12, 12 }, { 3, 3 }, { 3, 3 }, { 3, 3 } } },
+ { CYCLES_NOP, { { 3, 3 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_WAIT, { { 7, 7 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_ARPL_REG, { { 0, 20 }, { 0, 9 }, { 0, 7 }, { 0, 9 } } },
+ { CYCLES_ARPL_MEM, { { 0, 21 }, { 0, 9 }, { 0, 7 }, { 0, 9 } } },
+ { CYCLES_LAR_REG, { { 0, 15 }, { 11, 11 }, { 8, 8 }, { 0, 9 } } },
+ { CYCLES_LAR_MEM, { { 0, 16 }, { 11, 11 }, { 8, 8 }, { 0, 9 } } },
+ { CYCLES_LGDT, { { 11, 11 }, { 11, 11 }, { 6, 6 }, { 10, 10 } } },
+ { CYCLES_LIDT, { { 11, 11 }, { 11, 11 }, { 6, 6 }, { 10, 10 } } },
+ { CYCLES_LLDT_REG, { { 0, 20 }, { 11, 11 }, { 9, 9 }, { 0, 8 } } },
+ { CYCLES_LLDT_MEM, { { 0, 24 }, { 11, 11 }, { 9, 9 }, { 0, 8 } } },
+ { CYCLES_LMSW_REG, { { 11, 11 }, { 13, 13 }, { 8, 8 }, { 11, 11 } } },
+ { CYCLES_LMSW_MEM, { { 14, 14 }, { 13, 13 }, { 8, 8 }, { 11, 11 } } },
+ { CYCLES_LSL_REG, { { 0, 21 }, { 10, 10 }, { 8, 8 }, { 0, 9 } } },
+ { CYCLES_LSL_MEM, { { 0, 22 }, { 10, 10 }, { 8, 8 }, { 0, 9 } } },
+ { CYCLES_LTR_REG, { { 0, 23 }, { 20, 20 }, { 10, 10 }, { 0, 9 } } },
+ { CYCLES_LTR_MEM, { { 0, 27 }, { 20, 20 }, { 10, 10 }, { 0, 9 } } },
+ { CYCLES_SGDT, { { 9, 9 }, { 10, 10 }, { 4, 4 }, { 6, 6 } } },
+ { CYCLES_SIDT, { { 9, 9 }, { 10, 10 }, { 4, 4 }, { 6, 6 } } },
+ { CYCLES_SLDT_REG, { { 0, 2 }, { 2, 2 }, { 2, 2 }, { 0, 1 } } },
+ { CYCLES_SLDT_MEM, { { 0, 2 }, { 3, 3 }, { 2, 2 }, { 0, 1 } } },
+ { CYCLES_SMSW_REG, { { 2, 2 }, { 2, 2 }, { 4, 4 }, { 4, 4 } } },
+ { CYCLES_SMSW_MEM, { { 2, 2 }, { 3, 3 }, { 4, 4 }, { 4, 4 } } },
+ { CYCLES_STR_REG, { { 0, 2 }, { 2, 2 }, { 2, 2 }, { 0, 3 } } },
+ { CYCLES_STR_MEM, { { 0, 2 }, { 3, 3 }, { 2, 2 }, { 0, 3 } } },
+ { CYCLES_VERR_REG, { { 0, 10 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
+ { CYCLES_VERR_MEM, { { 0, 11 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
+ { CYCLES_VERW_REG, { { 0, 15 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
+ { CYCLES_VERW_MEM, { { 0, 16 }, { 11, 11 }, { 7, 7 }, { 0, 8 } } },
+ { CYCLES_LOCK, { { 0, 0 }, { 1, 1 }, { 1, 1 }, { 1, 1 } } },
// i486+
- { CYCLES_BSWAP, { { 0, 0 }, { 1, 1 }, { 1, 1 }, { 6, 6 } } },
- { CYCLES_CMPXCHG, { { 0, 0 }, { 6, 6 }, { 5, 5 }, { 6, 6 } } },
- { CYCLES_INVD, { { 0, 0 }, { 4, 4 }, { 15, 15 }, { 20, 20 } } },
- { CYCLES_XADD, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 2, 2 } } },
+ { CYCLES_BSWAP, { { 0, 0 }, { 1, 1 }, { 1, 1 }, { 6, 6 } } },
+ { CYCLES_CMPXCHG, { { 0, 0 }, { 6, 6 }, { 5, 5 }, { 6, 6 } } },
+ { CYCLES_INVD, { { 0, 0 }, { 4, 4 }, { 15, 15 }, { 20, 20 } } },
+ { CYCLES_XADD, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 2, 2 } } },
// Pentium+
- { CYCLES_CMPXCHG8B, { { 0, 0 }, { 0, 0 }, { 10, 10 }, { 6, 6 } } },
- { CYCLES_CPUID, { { 0, 0 }, { 0, 0 }, { 14, 14 }, { 12, 12 } } },
- { CYCLES_CPUID_EAX1, { { 0, 0 }, { 0, 0 }, { 14, 14 }, { 12, 12 } } },
- { CYCLES_RDTSC, { { 0, 0 }, { 0, 0 }, { 20, 20 }, { 1, 1 } } },
- { CYCLES_RSM, { { 0, 0 }, { 0, 0 }, { 82, 82 }, { 57, 57 } } },
- { CYCLES_RDMSR, { { 0, 0 }, { 0, 0 }, { 20, 20 }, { 1, 1 } } },
+ { CYCLES_CMPXCHG8B, { { 0, 0 }, { 0, 0 }, { 10, 10 }, { 6, 6 } } },
+ { CYCLES_CPUID, { { 0, 0 }, { 0, 0 }, { 14, 14 }, { 12, 12 } } },
+ { CYCLES_CPUID_EAX1, { { 0, 0 }, { 0, 0 }, { 14, 14 }, { 12, 12 } } },
+ { CYCLES_RDTSC, { { 0, 0 }, { 0, 0 }, { 20, 20 }, { 1, 1 } } },
+ { CYCLES_RSM, { { 0, 0 }, { 0, 0 }, { 82, 82 }, { 57, 57 } } },
+ { CYCLES_RDMSR, { { 0, 0 }, { 0, 0 }, { 20, 20 }, { 1, 1 } } },
// FPU
- { CYCLES_FABS, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FADD, { { 0, 0 }, { 8, 8 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_FBLD, { { 0, 0 }, { 70, 70 }, { 48, 48 }, { 1, 1 } } },
- { CYCLES_FBSTP, { { 0, 0 }, {172,172 }, {148,148 }, { 1, 1 } } },
- { CYCLES_FCHS, { { 0, 0 }, { 6, 6 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FCLEX, { { 0, 0 }, { 7, 7 }, { 9, 9 }, { 1, 1 } } },
- { CYCLES_FCOM, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 1, 1 } } },
- { CYCLES_FCOS, { { 0, 0 }, {255,255 }, {124,124 }, { 1, 1 } } },
- { CYCLES_FDECSTP, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FDISI, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FDIV, { { 0, 0 }, { 73, 73 }, { 39, 39 }, { 1, 1 } } },
- { CYCLES_FDIVR, { { 0, 0 }, { 73, 73 }, { 39, 39 }, { 1, 1 } } },
- { CYCLES_FENI, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FFREE, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FIADD, { { 0, 0 }, { 20, 20 }, { 7, 7 }, { 1, 1 } } },
- { CYCLES_FICOM, { { 0, 0 }, { 16, 16 }, { 8, 8 }, { 1, 1 } } },
- { CYCLES_FIDIV, { { 0, 0 }, { 85, 85 }, { 42, 42 }, { 1, 1 } } },
- { CYCLES_FILD, { { 0, 0 }, { 13, 13 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_FIMUL, { { 0, 0 }, { 23, 23 }, { 7, 7 }, { 1, 1 } } },
- { CYCLES_FINCSTP, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FINIT, { { 0, 0 }, { 17, 17 }, { 16, 16 }, { 1, 1 } } },
- { CYCLES_FIST, { { 0, 0 }, { 29, 29 }, { 6, 6 }, { 1, 1 } } },
- { CYCLES_FISUB, { { 0, 0 }, { 20, 20 }, { 7, 7 }, { 1, 1 } } },
- { CYCLES_FLD, { { 0, 0 }, { 4, 4 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FLDZ, { { 0, 0 }, { 4, 4 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_FLD1, { { 0, 0 }, { 4, 4 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_FLDL2E, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
- { CYCLES_FLDL2T, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
- { CYCLES_FLDLG2, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
- { CYCLES_FLDLN2, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
- { CYCLES_FLDPI, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
- { CYCLES_FLDCW, { { 0, 0 }, { 4, 4 }, { 7, 7 }, { 1, 1 } } },
- { CYCLES_FLDENV, { { 0, 0 }, { 44, 44 }, { 37, 37 }, { 1, 1 } } },
- { CYCLES_FMUL, { { 0, 0 }, { 16, 16 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_FNOP, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FPATAN, { { 0, 0 }, {218,218 }, {173,173 }, { 1, 1 } } },
- { CYCLES_FPREM, { { 0, 0 }, { 70, 70 }, { 16, 16 }, { 1, 1 } } },
- { CYCLES_FPREM1, { { 0, 0 }, { 72, 72 }, { 20, 20 }, { 1, 1 } } },
- { CYCLES_FPTAN, { { 0, 0 }, {200,200 }, {173,173 }, { 1, 1 } } },
- { CYCLES_FRNDINT, { { 0, 0 }, { 21, 21 }, { 9, 9 }, { 1, 1 } } },
- { CYCLES_FRSTOR, { { 0, 0 }, {131,131 }, { 75, 75 }, { 1, 1 } } },
- { CYCLES_FSAVE, { { 0, 0 }, {154,154 }, {127,127 }, { 1, 1 } } },
- { CYCLES_FSCALE, { { 0, 0 }, { 30, 30 }, { 20, 20 }, { 1, 1 } } },
- { CYCLES_FSETPM, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FSIN, { { 0, 0 }, {255,255 }, {126,126 }, { 1, 1 } } },
- { CYCLES_FSINCOS, { { 0, 0 }, {255,255 }, {137,137 }, { 1, 1 } } },
- { CYCLES_FSQRT, { { 0, 0 }, { 83, 83 }, { 70, 70 }, { 1, 1 } } },
- { CYCLES_FST, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FSTCW, { { 0, 0 }, { 3, 3 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_FSTENV, { { 0, 0 }, { 67, 67 }, { 48, 48 }, { 1, 1 } } },
- { CYCLES_FSTSW, { { 0, 0 }, { 3, 3 }, { 2, 2 }, { 1, 1 } } },
- { CYCLES_FSUB, { { 0, 0 }, { 8, 8 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_FSUBR, { { 0, 0 }, { 8, 8 }, { 3, 3 }, { 1, 1 } } },
- { CYCLES_FTST, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 1, 1 } } },
- { CYCLES_FUCOM, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 1, 1 } } },
- { CYCLES_FXAM, { { 0, 0 }, { 8, 8 }, { 21, 21 }, { 1, 1 } } },
- { CYCLES_FXCH, { { 0, 0 }, { 4, 4 }, { 1, 1 }, { 1, 1 } } },
- { CYCLES_FXTRACT, { { 0, 0 }, { 16, 16 }, { 13, 13 }, { 1, 1 } } },
- { CYCLES_FYL2X, { { 0, 0 }, {196,196 }, {111,111 }, { 1, 1 } } },
- { CYCLES_FYL2XPI, { { 0, 0 }, {171,171 }, {103,103 }, { 1, 1 } } },
- { CYCLES_CMPXCHG_REG_REG_T, { { 0, 0 }, { 6, 6 }, { 6, 6 }, { 6, 6 } } },
- { CYCLES_CMPXCHG_REG_REG_F, { { 0, 0 }, { 9, 9 }, { 9, 9 }, { 9, 9 } } },
- { CYCLES_CMPXCHG_REG_MEM_T, { { 0, 0 }, { 7, 7 }, { 7, 7 }, { 7, 7 } } },
- { CYCLES_CMPXCHG_REG_MEM_F, { { 0, 0 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } },
+ { CYCLES_FABS, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FADD, { { 0, 0 }, { 8, 8 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_FBLD, { { 0, 0 }, { 70, 70 }, { 48, 48 }, { 1, 1 } } },
+ { CYCLES_FBSTP, { { 0, 0 }, {172,172 }, {148,148 }, { 1, 1 } } },
+ { CYCLES_FCHS, { { 0, 0 }, { 6, 6 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FCLEX, { { 0, 0 }, { 7, 7 }, { 9, 9 }, { 1, 1 } } },
+ { CYCLES_FCOM, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 1, 1 } } },
+ { CYCLES_FCOS, { { 0, 0 }, {255,255 }, {124,124 }, { 1, 1 } } },
+ { CYCLES_FDECSTP, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FDISI, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FDIV, { { 0, 0 }, { 73, 73 }, { 39, 39 }, { 1, 1 } } },
+ { CYCLES_FDIVR, { { 0, 0 }, { 73, 73 }, { 39, 39 }, { 1, 1 } } },
+ { CYCLES_FENI, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FFREE, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FIADD, { { 0, 0 }, { 20, 20 }, { 7, 7 }, { 1, 1 } } },
+ { CYCLES_FICOM, { { 0, 0 }, { 16, 16 }, { 8, 8 }, { 1, 1 } } },
+ { CYCLES_FIDIV, { { 0, 0 }, { 85, 85 }, { 42, 42 }, { 1, 1 } } },
+ { CYCLES_FILD, { { 0, 0 }, { 13, 13 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_FIMUL, { { 0, 0 }, { 23, 23 }, { 7, 7 }, { 1, 1 } } },
+ { CYCLES_FINCSTP, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FINIT, { { 0, 0 }, { 17, 17 }, { 16, 16 }, { 1, 1 } } },
+ { CYCLES_FIST, { { 0, 0 }, { 29, 29 }, { 6, 6 }, { 1, 1 } } },
+ { CYCLES_FISUB, { { 0, 0 }, { 20, 20 }, { 7, 7 }, { 1, 1 } } },
+ { CYCLES_FLD, { { 0, 0 }, { 4, 4 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FLDZ, { { 0, 0 }, { 4, 4 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_FLD1, { { 0, 0 }, { 4, 4 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_FLDL2E, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
+ { CYCLES_FLDL2T, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
+ { CYCLES_FLDLG2, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
+ { CYCLES_FLDLN2, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
+ { CYCLES_FLDPI, { { 0, 0 }, { 8, 8 }, { 5, 5 }, { 1, 1 } } },
+ { CYCLES_FLDCW, { { 0, 0 }, { 4, 4 }, { 7, 7 }, { 1, 1 } } },
+ { CYCLES_FLDENV, { { 0, 0 }, { 44, 44 }, { 37, 37 }, { 1, 1 } } },
+ { CYCLES_FMUL, { { 0, 0 }, { 16, 16 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_FNOP, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FPATAN, { { 0, 0 }, {218,218 }, {173,173 }, { 1, 1 } } },
+ { CYCLES_FPREM, { { 0, 0 }, { 70, 70 }, { 16, 16 }, { 1, 1 } } },
+ { CYCLES_FPREM1, { { 0, 0 }, { 72, 72 }, { 20, 20 }, { 1, 1 } } },
+ { CYCLES_FPTAN, { { 0, 0 }, {200,200 }, {173,173 }, { 1, 1 } } },
+ { CYCLES_FRNDINT, { { 0, 0 }, { 21, 21 }, { 9, 9 }, { 1, 1 } } },
+ { CYCLES_FRSTOR, { { 0, 0 }, {131,131 }, { 75, 75 }, { 1, 1 } } },
+ { CYCLES_FSAVE, { { 0, 0 }, {154,154 }, {127,127 }, { 1, 1 } } },
+ { CYCLES_FSCALE, { { 0, 0 }, { 30, 30 }, { 20, 20 }, { 1, 1 } } },
+ { CYCLES_FSETPM, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FSIN, { { 0, 0 }, {255,255 }, {126,126 }, { 1, 1 } } },
+ { CYCLES_FSINCOS, { { 0, 0 }, {255,255 }, {137,137 }, { 1, 1 } } },
+ { CYCLES_FSQRT, { { 0, 0 }, { 83, 83 }, { 70, 70 }, { 1, 1 } } },
+ { CYCLES_FST, { { 0, 0 }, { 3, 3 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FSTCW, { { 0, 0 }, { 3, 3 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_FSTENV, { { 0, 0 }, { 67, 67 }, { 48, 48 }, { 1, 1 } } },
+ { CYCLES_FSTSW, { { 0, 0 }, { 3, 3 }, { 2, 2 }, { 1, 1 } } },
+ { CYCLES_FSUB, { { 0, 0 }, { 8, 8 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_FSUBR, { { 0, 0 }, { 8, 8 }, { 3, 3 }, { 1, 1 } } },
+ { CYCLES_FTST, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 1, 1 } } },
+ { CYCLES_FUCOM, { { 0, 0 }, { 4, 4 }, { 4, 4 }, { 1, 1 } } },
+ { CYCLES_FXAM, { { 0, 0 }, { 8, 8 }, { 21, 21 }, { 1, 1 } } },
+ { CYCLES_FXCH, { { 0, 0 }, { 4, 4 }, { 1, 1 }, { 1, 1 } } },
+ { CYCLES_FXTRACT, { { 0, 0 }, { 16, 16 }, { 13, 13 }, { 1, 1 } } },
+ { CYCLES_FYL2X, { { 0, 0 }, {196,196 }, {111,111 }, { 1, 1 } } },
+ { CYCLES_FYL2XPI, { { 0, 0 }, {171,171 }, {103,103 }, { 1, 1 } } },
+ { CYCLES_CMPXCHG_REG_REG_T, { { 0, 0 }, { 6, 6 }, { 6, 6 }, { 6, 6 } } },
+ { CYCLES_CMPXCHG_REG_REG_F, { { 0, 0 }, { 9, 9 }, { 9, 9 }, { 9, 9 } } },
+ { CYCLES_CMPXCHG_REG_MEM_T, { { 0, 0 }, { 7, 7 }, { 7, 7 }, { 7, 7 } } },
+ { CYCLES_CMPXCHG_REG_MEM_F, { { 0, 0 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } },
};
#endif /* __CYCLES_H__ */
diff --git a/src/emu/cpu/i386/i386.c b/src/emu/cpu/i386/i386.c
index e0abe35bc80..ecf03598dd2 100644
--- a/src/emu/cpu/i386/i386.c
+++ b/src/emu/cpu/i386/i386.c
@@ -37,7 +37,7 @@ static void i386_task_switch(i386_state* cpustate, UINT16 selector, UINT8 nested
/*************************************************************************/
-#define INT_DEBUG 1
+#define INT_DEBUG 1
static UINT32 i386_load_protected_mode_segment(i386_state *cpustate, I386_SREG *seg, UINT64 *desc )
{
@@ -582,25 +582,25 @@ static void i386_sreg_load(i386_state *cpustate, UINT16 selector, UINT8 reg, boo
static void i386_trap(i386_state *cpustate,int irq, int irq_gate, int trap_level)
{
/* I386 Interrupts/Traps/Faults:
- *
- * 0x00 Divide by zero
- * 0x01 Debug exception
- * 0x02 NMI
- * 0x03 Int3
- * 0x04 Overflow
- * 0x05 Array bounds check
- * 0x06 Illegal Opcode
- * 0x07 FPU not available
- * 0x08 Double fault
- * 0x09 Coprocessor segment overrun
- * 0x0a Invalid task state
- * 0x0b Segment not present
- * 0x0c Stack exception
- * 0x0d General Protection Fault
- * 0x0e Page fault
- * 0x0f Reserved
- * 0x10 Coprocessor error
- */
+ *
+ * 0x00 Divide by zero
+ * 0x01 Debug exception
+ * 0x02 NMI
+ * 0x03 Int3
+ * 0x04 Overflow
+ * 0x05 Array bounds check
+ * 0x06 Illegal Opcode
+ * 0x07 FPU not available
+ * 0x08 Double fault
+ * 0x09 Coprocessor segment overrun
+ * 0x0a Invalid task state
+ * 0x0b Segment not present
+ * 0x0c Stack exception
+ * 0x0d General Protection Fault
+ * 0x0e Page fault
+ * 0x0f Reserved
+ * 0x10 Coprocessor error
+ */
UINT32 v1, v2;
UINT32 offset, oldflags = get_flags(cpustate);
UINT16 segment;
@@ -1088,7 +1088,7 @@ static void i286_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested
}
/* For nested tasks, we write the outgoing task's selector to the back-link field of the new TSS,
- and set the NT flag in the EFLAGS register */
+ and set the NT flag in the EFLAGS register */
if(nested != 0)
{
WRITE16(cpustate,tss+0,old_task);
@@ -1203,7 +1203,7 @@ static void i386_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested
}
/* For nested tasks, we write the outgoing task's selector to the back-link field of the new TSS,
- and set the NT flag in the EFLAGS register */
+ and set the NT flag in the EFLAGS register */
if(nested != 0)
{
WRITE32(cpustate,tss+0,old_task);
@@ -2643,7 +2643,7 @@ static void i386_protected_mode_iret(i386_state* cpustate, int operand32)
static UINT8 *cycle_table_rm[X86_NUM_CPUS];
static UINT8 *cycle_table_pm[X86_NUM_CPUS];
-#define CYCLES_NUM(x) (cpustate->cycles -= (x))
+#define CYCLES_NUM(x) (cpustate->cycles -= (x))
INLINE void CYCLES(i386_state *cpustate,int x)
{
@@ -2797,7 +2797,7 @@ static UINT8 read8_debug(i386_state *cpustate, UINT32 ea, UINT8 *data)
{
UINT32 address = ea, error;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,-1,&address,&error))
return 0;
@@ -3004,7 +3004,7 @@ static CPU_INIT( i386 )
cpustate->direct = &cpustate->program->direct();
cpustate->io = &device->space(AS_IO);
- device->save_item(NAME( cpustate->reg.d));
+ device->save_item(NAME( cpustate->reg.d));
device->save_item(NAME(cpustate->sreg[ES].selector));
device->save_item(NAME(cpustate->sreg[ES].base));
device->save_item(NAME(cpustate->sreg[ES].limit));
@@ -3040,9 +3040,9 @@ static CPU_INIT( i386 )
device->save_item(NAME(cpustate->AF));
device->save_item(NAME(cpustate->IF));
device->save_item(NAME(cpustate->TF));
- device->save_item(NAME( cpustate->cr));
- device->save_item(NAME( cpustate->dr));
- device->save_item(NAME( cpustate->tr));
+ device->save_item(NAME( cpustate->cr));
+ device->save_item(NAME( cpustate->dr));
+ device->save_item(NAME( cpustate->tr));
device->save_item(NAME(cpustate->idtr.base));
device->save_item(NAME(cpustate->idtr.limit));
device->save_item(NAME(cpustate->gdtr.base));
@@ -3129,9 +3129,9 @@ static CPU_RESET( i386 )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
- cpustate->sreg[CS].valid = true;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].valid = true;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
cpustate->sreg[DS].limit = cpustate->sreg[ES].limit = cpustate->sreg[FS].limit = cpustate->sreg[GS].limit = cpustate->sreg[SS].limit = 0xffff;
@@ -3296,86 +3296,86 @@ static CPU_SET_INFO( i386 )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + I386_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + I386_EIP: cpustate->eip = info->i; CHANGE_PC(cpustate,cpustate->eip); break;
- case CPUINFO_INT_REGISTER + I386_AL: REG8(AL) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_AH: REG8(AH) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_BL: REG8(BL) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_BH: REG8(BH) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CL: REG8(CL) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CH: REG8(CH) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DL: REG8(DL) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DH: REG8(DH) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_AX: REG16(AX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_BX: REG16(BX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CX: REG16(CX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DX: REG16(DX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_SI: REG16(SI) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DI: REG16(DI) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_BP: REG16(BP) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_SP: REG16(SP) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_IP: cpustate->eip = (cpustate->eip & ~0xFFFF) | (info->i & 0xFFFF); CHANGE_PC(cpustate,cpustate->eip); break;
- case CPUINFO_INT_REGISTER + I386_EAX: REG32(EAX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_EBX: REG32(EBX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_ECX: REG32(ECX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_EDX: REG32(EDX) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_EBP: REG32(EBP) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_EIP: cpustate->eip = info->i; CHANGE_PC(cpustate,cpustate->eip); break;
+ case CPUINFO_INT_REGISTER + I386_AL: REG8(AL) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_AH: REG8(AH) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_BL: REG8(BL) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_BH: REG8(BH) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CL: REG8(CL) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CH: REG8(CH) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DL: REG8(DL) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DH: REG8(DH) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_AX: REG16(AX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_BX: REG16(BX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CX: REG16(CX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DX: REG16(DX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_SI: REG16(SI) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DI: REG16(DI) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_BP: REG16(BP) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_SP: REG16(SP) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_IP: cpustate->eip = (cpustate->eip & ~0xFFFF) | (info->i & 0xFFFF); CHANGE_PC(cpustate,cpustate->eip); break;
+ case CPUINFO_INT_REGISTER + I386_EAX: REG32(EAX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_EBX: REG32(EBX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_ECX: REG32(ECX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_EDX: REG32(EDX) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_EBP: REG32(EBP) = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + I386_ESP: REG32(ESP) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_ESI: REG32(ESI) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_EDI: REG32(EDI) = info->i; break;
- case CPUINFO_INT_REGISTER + I386_EFLAGS: cpustate->eflags = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CS: cpustate->sreg[CS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,CS); break;
- case CPUINFO_INT_REGISTER + I386_CS_BASE: cpustate->sreg[CS].base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CS_LIMIT: cpustate->sreg[CS].limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CS_FLAGS: cpustate->sreg[CS].flags = info->i & 0xf0ff; break;
- case CPUINFO_INT_REGISTER + I386_SS: cpustate->sreg[SS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,SS); break;
- case CPUINFO_INT_REGISTER + I386_SS_BASE: cpustate->sreg[SS].base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_SS_LIMIT: cpustate->sreg[SS].limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_SS_FLAGS: cpustate->sreg[SS].flags = info->i & 0xf0ff; break;
- case CPUINFO_INT_REGISTER + I386_DS: cpustate->sreg[DS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,DS); break;
- case CPUINFO_INT_REGISTER + I386_DS_BASE: cpustate->sreg[DS].base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DS_LIMIT: cpustate->sreg[DS].limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DS_FLAGS: cpustate->sreg[DS].flags = info->i & 0xf0ff; break;
- case CPUINFO_INT_REGISTER + I386_ES: cpustate->sreg[ES].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,ES); break;
- case CPUINFO_INT_REGISTER + I386_ES_BASE: cpustate->sreg[ES].base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_ES_LIMIT: cpustate->sreg[ES].limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_ES_FLAGS: cpustate->sreg[ES].flags = info->i & 0xf0ff; break;
- case CPUINFO_INT_REGISTER + I386_FS: cpustate->sreg[FS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,FS); break;
- case CPUINFO_INT_REGISTER + I386_FS_BASE: cpustate->sreg[FS].base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_FS_LIMIT: cpustate->sreg[FS].limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_FS_FLAGS: cpustate->sreg[FS].flags = info->i & 0xf0ff; break;
- case CPUINFO_INT_REGISTER + I386_GS: cpustate->sreg[GS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,GS); break;
- case CPUINFO_INT_REGISTER + I386_GS_BASE: cpustate->sreg[GS].base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_GS_LIMIT: cpustate->sreg[GS].limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_GS_FLAGS: cpustate->sreg[GS].flags = info->i & 0xf0ff; break;
- case CPUINFO_INT_REGISTER + I386_CR0: cpustate->cr[0] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CR1: cpustate->cr[1] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CR2: cpustate->cr[2] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CR3: cpustate->cr[3] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_CR4: cpustate->cr[4] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR0: cpustate->dr[0] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR1: cpustate->dr[1] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR2: cpustate->dr[2] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR3: cpustate->dr[3] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR4: cpustate->dr[4] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR5: cpustate->dr[5] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR6: cpustate->dr[6] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_DR7: cpustate->dr[7] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_TR6: cpustate->tr[6] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_TR7: cpustate->tr[7] = info->i; break;
- case CPUINFO_INT_REGISTER + I386_GDTR_BASE: cpustate->gdtr.base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_GDTR_LIMIT: cpustate->gdtr.limit = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + I386_IDTR_BASE: cpustate->idtr.base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_IDTR_LIMIT: cpustate->idtr.limit = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + I386_TR: cpustate->task.segment = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + I386_TR_BASE: cpustate->task.base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_TR_LIMIT: cpustate->task.limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_TR_FLAGS: cpustate->task.flags = info->i & 0xf0ff; break;
- case CPUINFO_INT_REGISTER + I386_LDTR: cpustate->ldtr.segment = info->i & 0xffff; break;
- case CPUINFO_INT_REGISTER + I386_LDTR_BASE: cpustate->ldtr.base = info->i; break;
- case CPUINFO_INT_REGISTER + I386_LDTR_LIMIT: cpustate->ldtr.limit = info->i; break;
- case CPUINFO_INT_REGISTER + I386_LDTR_FLAGS: cpustate->ldtr.flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_ESP: REG32(ESP) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_ESI: REG32(ESI) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_EDI: REG32(EDI) = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_EFLAGS: cpustate->eflags = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CS: cpustate->sreg[CS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,CS); break;
+ case CPUINFO_INT_REGISTER + I386_CS_BASE: cpustate->sreg[CS].base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CS_LIMIT: cpustate->sreg[CS].limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CS_FLAGS: cpustate->sreg[CS].flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_SS: cpustate->sreg[SS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,SS); break;
+ case CPUINFO_INT_REGISTER + I386_SS_BASE: cpustate->sreg[SS].base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_SS_LIMIT: cpustate->sreg[SS].limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_SS_FLAGS: cpustate->sreg[SS].flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_DS: cpustate->sreg[DS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,DS); break;
+ case CPUINFO_INT_REGISTER + I386_DS_BASE: cpustate->sreg[DS].base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DS_LIMIT: cpustate->sreg[DS].limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DS_FLAGS: cpustate->sreg[DS].flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_ES: cpustate->sreg[ES].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,ES); break;
+ case CPUINFO_INT_REGISTER + I386_ES_BASE: cpustate->sreg[ES].base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_ES_LIMIT: cpustate->sreg[ES].limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_ES_FLAGS: cpustate->sreg[ES].flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_FS: cpustate->sreg[FS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,FS); break;
+ case CPUINFO_INT_REGISTER + I386_FS_BASE: cpustate->sreg[FS].base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_FS_LIMIT: cpustate->sreg[FS].limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_FS_FLAGS: cpustate->sreg[FS].flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_GS: cpustate->sreg[GS].selector = info->i & 0xffff; i386_load_segment_descriptor(cpustate,GS); break;
+ case CPUINFO_INT_REGISTER + I386_GS_BASE: cpustate->sreg[GS].base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_GS_LIMIT: cpustate->sreg[GS].limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_GS_FLAGS: cpustate->sreg[GS].flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_CR0: cpustate->cr[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CR1: cpustate->cr[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CR2: cpustate->cr[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CR3: cpustate->cr[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_CR4: cpustate->cr[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR0: cpustate->dr[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR1: cpustate->dr[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR2: cpustate->dr[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR3: cpustate->dr[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR4: cpustate->dr[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR5: cpustate->dr[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR6: cpustate->dr[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_DR7: cpustate->dr[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_TR6: cpustate->tr[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_TR7: cpustate->tr[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_GDTR_BASE: cpustate->gdtr.base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_GDTR_LIMIT: cpustate->gdtr.limit = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + I386_IDTR_BASE: cpustate->idtr.base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_IDTR_LIMIT: cpustate->idtr.limit = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + I386_TR: cpustate->task.segment = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + I386_TR_BASE: cpustate->task.base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_TR_LIMIT: cpustate->task.limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_TR_FLAGS: cpustate->task.flags = info->i & 0xf0ff; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR: cpustate->ldtr.segment = info->i & 0xffff; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR_BASE: cpustate->ldtr.base = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR_LIMIT: cpustate->ldtr.limit = info->i; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR_FLAGS: cpustate->ldtr.flags = info->i & 0xf0ff; break;
}
}
@@ -3386,214 +3386,214 @@ CPU_GET_INFO( i386 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i386_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 32; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 15; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 12; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i386_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 32; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 15; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 12; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + I386_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + I386_EIP: info->i = cpustate->eip; break;
- case CPUINFO_INT_REGISTER + I386_AL: info->i = REG8(AL); break;
- case CPUINFO_INT_REGISTER + I386_AH: info->i = REG8(AH); break;
- case CPUINFO_INT_REGISTER + I386_BL: info->i = REG8(BL); break;
- case CPUINFO_INT_REGISTER + I386_BH: info->i = REG8(BH); break;
- case CPUINFO_INT_REGISTER + I386_CL: info->i = REG8(CL); break;
- case CPUINFO_INT_REGISTER + I386_CH: info->i = REG8(CH); break;
- case CPUINFO_INT_REGISTER + I386_DL: info->i = REG8(DL); break;
- case CPUINFO_INT_REGISTER + I386_DH: info->i = REG8(DH); break;
- case CPUINFO_INT_REGISTER + I386_AX: info->i = REG16(AX); break;
- case CPUINFO_INT_REGISTER + I386_BX: info->i = REG16(BX); break;
- case CPUINFO_INT_REGISTER + I386_CX: info->i = REG16(CX); break;
- case CPUINFO_INT_REGISTER + I386_DX: info->i = REG16(DX); break;
- case CPUINFO_INT_REGISTER + I386_SI: info->i = REG16(SI); break;
- case CPUINFO_INT_REGISTER + I386_DI: info->i = REG16(DI); break;
- case CPUINFO_INT_REGISTER + I386_BP: info->i = REG16(BP); break;
- case CPUINFO_INT_REGISTER + I386_SP: info->i = REG16(SP); break;
- case CPUINFO_INT_REGISTER + I386_IP: info->i = cpustate->eip & 0xFFFF; break;
- case CPUINFO_INT_REGISTER + I386_EAX: info->i = REG32(EAX); break;
- case CPUINFO_INT_REGISTER + I386_EBX: info->i = REG32(EBX); break;
- case CPUINFO_INT_REGISTER + I386_ECX: info->i = REG32(ECX); break;
- case CPUINFO_INT_REGISTER + I386_EDX: info->i = REG32(EDX); break;
- case CPUINFO_INT_REGISTER + I386_EBP: info->i = REG32(EBP); break;
- case CPUINFO_INT_REGISTER + I386_ESP: info->i = REG32(ESP); break;
- case CPUINFO_INT_REGISTER + I386_ESI: info->i = REG32(ESI); break;
- case CPUINFO_INT_REGISTER + I386_EDI: info->i = REG32(EDI); break;
- case CPUINFO_INT_REGISTER + I386_EFLAGS: info->i = cpustate->eflags; break;
- case CPUINFO_INT_REGISTER + I386_CS: info->i = cpustate->sreg[CS].selector; break;
- case CPUINFO_INT_REGISTER + I386_CS_BASE: info->i = cpustate->sreg[CS].base; break;
- case CPUINFO_INT_REGISTER + I386_CS_LIMIT: info->i = cpustate->sreg[CS].limit; break;
- case CPUINFO_INT_REGISTER + I386_CS_FLAGS: info->i = cpustate->sreg[CS].flags; break;
- case CPUINFO_INT_REGISTER + I386_SS: info->i = cpustate->sreg[SS].selector; break;
- case CPUINFO_INT_REGISTER + I386_SS_BASE: info->i = cpustate->sreg[SS].base; break;
- case CPUINFO_INT_REGISTER + I386_SS_LIMIT: info->i = cpustate->sreg[SS].limit; break;
- case CPUINFO_INT_REGISTER + I386_SS_FLAGS: info->i = cpustate->sreg[SS].flags; break;
- case CPUINFO_INT_REGISTER + I386_DS: info->i = cpustate->sreg[DS].selector; break;
- case CPUINFO_INT_REGISTER + I386_DS_BASE: info->i = cpustate->sreg[DS].base; break;
- case CPUINFO_INT_REGISTER + I386_DS_LIMIT: info->i = cpustate->sreg[DS].limit; break;
- case CPUINFO_INT_REGISTER + I386_DS_FLAGS: info->i = cpustate->sreg[DS].flags; break;
- case CPUINFO_INT_REGISTER + I386_ES: info->i = cpustate->sreg[ES].selector; break;
- case CPUINFO_INT_REGISTER + I386_ES_BASE: info->i = cpustate->sreg[ES].base; break;
- case CPUINFO_INT_REGISTER + I386_ES_LIMIT: info->i = cpustate->sreg[ES].limit; break;
- case CPUINFO_INT_REGISTER + I386_ES_FLAGS: info->i = cpustate->sreg[ES].flags; break;
- case CPUINFO_INT_REGISTER + I386_FS: info->i = cpustate->sreg[FS].selector; break;
- case CPUINFO_INT_REGISTER + I386_FS_BASE: info->i = cpustate->sreg[FS].base; break;
- case CPUINFO_INT_REGISTER + I386_FS_LIMIT: info->i = cpustate->sreg[FS].limit; break;
- case CPUINFO_INT_REGISTER + I386_FS_FLAGS: info->i = cpustate->sreg[FS].flags; break;
- case CPUINFO_INT_REGISTER + I386_GS: info->i = cpustate->sreg[GS].selector; break;
- case CPUINFO_INT_REGISTER + I386_GS_BASE: info->i = cpustate->sreg[GS].base; break;
- case CPUINFO_INT_REGISTER + I386_GS_LIMIT: info->i = cpustate->sreg[GS].limit; break;
- case CPUINFO_INT_REGISTER + I386_GS_FLAGS: info->i = cpustate->sreg[GS].flags; break;
- case CPUINFO_INT_REGISTER + I386_CR0: info->i = cpustate->cr[0]; break;
- case CPUINFO_INT_REGISTER + I386_CR1: info->i = cpustate->cr[1]; break;
- case CPUINFO_INT_REGISTER + I386_CR2: info->i = cpustate->cr[2]; break;
- case CPUINFO_INT_REGISTER + I386_CR3: info->i = cpustate->cr[3]; break;
- case CPUINFO_INT_REGISTER + I386_CR4: info->i = cpustate->cr[4]; break;
- case CPUINFO_INT_REGISTER + I386_DR0: info->i = cpustate->dr[0]; break;
- case CPUINFO_INT_REGISTER + I386_DR1: info->i = cpustate->dr[1]; break;
- case CPUINFO_INT_REGISTER + I386_DR2: info->i = cpustate->dr[2]; break;
- case CPUINFO_INT_REGISTER + I386_DR3: info->i = cpustate->dr[3]; break;
- case CPUINFO_INT_REGISTER + I386_DR4: info->i = cpustate->dr[4]; break;
- case CPUINFO_INT_REGISTER + I386_DR5: info->i = cpustate->dr[5]; break;
- case CPUINFO_INT_REGISTER + I386_DR6: info->i = cpustate->dr[6]; break;
- case CPUINFO_INT_REGISTER + I386_DR7: info->i = cpustate->dr[7]; break;
- case CPUINFO_INT_REGISTER + I386_TR6: info->i = cpustate->tr[6]; break;
- case CPUINFO_INT_REGISTER + I386_TR7: info->i = cpustate->tr[7]; break;
- case CPUINFO_INT_REGISTER + I386_GDTR_BASE: info->i = cpustate->gdtr.base; break;
- case CPUINFO_INT_REGISTER + I386_GDTR_LIMIT: info->i = cpustate->gdtr.limit; break;
- case CPUINFO_INT_REGISTER + I386_IDTR_BASE: info->i = cpustate->idtr.base; break;
- case CPUINFO_INT_REGISTER + I386_IDTR_LIMIT: info->i = cpustate->idtr.limit; break;
- case CPUINFO_INT_REGISTER + I386_TR: info->i = cpustate->task.segment; break;
- case CPUINFO_INT_REGISTER + I386_TR_BASE: info->i = cpustate->task.base; break;
- case CPUINFO_INT_REGISTER + I386_TR_LIMIT: info->i = cpustate->task.limit; break;
- case CPUINFO_INT_REGISTER + I386_TR_FLAGS: info->i = cpustate->task.flags; break;
- case CPUINFO_INT_REGISTER + I386_LDTR: info->i = cpustate->ldtr.segment; break;
- case CPUINFO_INT_REGISTER + I386_LDTR_BASE: info->i = cpustate->ldtr.base; break;
- case CPUINFO_INT_REGISTER + I386_LDTR_LIMIT: info->i = cpustate->ldtr.limit; break;
- case CPUINFO_INT_REGISTER + I386_LDTR_FLAGS: info->i = cpustate->ldtr.flags; break;
+ case CPUINFO_INT_REGISTER + I386_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + I386_EIP: info->i = cpustate->eip; break;
+ case CPUINFO_INT_REGISTER + I386_AL: info->i = REG8(AL); break;
+ case CPUINFO_INT_REGISTER + I386_AH: info->i = REG8(AH); break;
+ case CPUINFO_INT_REGISTER + I386_BL: info->i = REG8(BL); break;
+ case CPUINFO_INT_REGISTER + I386_BH: info->i = REG8(BH); break;
+ case CPUINFO_INT_REGISTER + I386_CL: info->i = REG8(CL); break;
+ case CPUINFO_INT_REGISTER + I386_CH: info->i = REG8(CH); break;
+ case CPUINFO_INT_REGISTER + I386_DL: info->i = REG8(DL); break;
+ case CPUINFO_INT_REGISTER + I386_DH: info->i = REG8(DH); break;
+ case CPUINFO_INT_REGISTER + I386_AX: info->i = REG16(AX); break;
+ case CPUINFO_INT_REGISTER + I386_BX: info->i = REG16(BX); break;
+ case CPUINFO_INT_REGISTER + I386_CX: info->i = REG16(CX); break;
+ case CPUINFO_INT_REGISTER + I386_DX: info->i = REG16(DX); break;
+ case CPUINFO_INT_REGISTER + I386_SI: info->i = REG16(SI); break;
+ case CPUINFO_INT_REGISTER + I386_DI: info->i = REG16(DI); break;
+ case CPUINFO_INT_REGISTER + I386_BP: info->i = REG16(BP); break;
+ case CPUINFO_INT_REGISTER + I386_SP: info->i = REG16(SP); break;
+ case CPUINFO_INT_REGISTER + I386_IP: info->i = cpustate->eip & 0xFFFF; break;
+ case CPUINFO_INT_REGISTER + I386_EAX: info->i = REG32(EAX); break;
+ case CPUINFO_INT_REGISTER + I386_EBX: info->i = REG32(EBX); break;
+ case CPUINFO_INT_REGISTER + I386_ECX: info->i = REG32(ECX); break;
+ case CPUINFO_INT_REGISTER + I386_EDX: info->i = REG32(EDX); break;
+ case CPUINFO_INT_REGISTER + I386_EBP: info->i = REG32(EBP); break;
+ case CPUINFO_INT_REGISTER + I386_ESP: info->i = REG32(ESP); break;
+ case CPUINFO_INT_REGISTER + I386_ESI: info->i = REG32(ESI); break;
+ case CPUINFO_INT_REGISTER + I386_EDI: info->i = REG32(EDI); break;
+ case CPUINFO_INT_REGISTER + I386_EFLAGS: info->i = cpustate->eflags; break;
+ case CPUINFO_INT_REGISTER + I386_CS: info->i = cpustate->sreg[CS].selector; break;
+ case CPUINFO_INT_REGISTER + I386_CS_BASE: info->i = cpustate->sreg[CS].base; break;
+ case CPUINFO_INT_REGISTER + I386_CS_LIMIT: info->i = cpustate->sreg[CS].limit; break;
+ case CPUINFO_INT_REGISTER + I386_CS_FLAGS: info->i = cpustate->sreg[CS].flags; break;
+ case CPUINFO_INT_REGISTER + I386_SS: info->i = cpustate->sreg[SS].selector; break;
+ case CPUINFO_INT_REGISTER + I386_SS_BASE: info->i = cpustate->sreg[SS].base; break;
+ case CPUINFO_INT_REGISTER + I386_SS_LIMIT: info->i = cpustate->sreg[SS].limit; break;
+ case CPUINFO_INT_REGISTER + I386_SS_FLAGS: info->i = cpustate->sreg[SS].flags; break;
+ case CPUINFO_INT_REGISTER + I386_DS: info->i = cpustate->sreg[DS].selector; break;
+ case CPUINFO_INT_REGISTER + I386_DS_BASE: info->i = cpustate->sreg[DS].base; break;
+ case CPUINFO_INT_REGISTER + I386_DS_LIMIT: info->i = cpustate->sreg[DS].limit; break;
+ case CPUINFO_INT_REGISTER + I386_DS_FLAGS: info->i = cpustate->sreg[DS].flags; break;
+ case CPUINFO_INT_REGISTER + I386_ES: info->i = cpustate->sreg[ES].selector; break;
+ case CPUINFO_INT_REGISTER + I386_ES_BASE: info->i = cpustate->sreg[ES].base; break;
+ case CPUINFO_INT_REGISTER + I386_ES_LIMIT: info->i = cpustate->sreg[ES].limit; break;
+ case CPUINFO_INT_REGISTER + I386_ES_FLAGS: info->i = cpustate->sreg[ES].flags; break;
+ case CPUINFO_INT_REGISTER + I386_FS: info->i = cpustate->sreg[FS].selector; break;
+ case CPUINFO_INT_REGISTER + I386_FS_BASE: info->i = cpustate->sreg[FS].base; break;
+ case CPUINFO_INT_REGISTER + I386_FS_LIMIT: info->i = cpustate->sreg[FS].limit; break;
+ case CPUINFO_INT_REGISTER + I386_FS_FLAGS: info->i = cpustate->sreg[FS].flags; break;
+ case CPUINFO_INT_REGISTER + I386_GS: info->i = cpustate->sreg[GS].selector; break;
+ case CPUINFO_INT_REGISTER + I386_GS_BASE: info->i = cpustate->sreg[GS].base; break;
+ case CPUINFO_INT_REGISTER + I386_GS_LIMIT: info->i = cpustate->sreg[GS].limit; break;
+ case CPUINFO_INT_REGISTER + I386_GS_FLAGS: info->i = cpustate->sreg[GS].flags; break;
+ case CPUINFO_INT_REGISTER + I386_CR0: info->i = cpustate->cr[0]; break;
+ case CPUINFO_INT_REGISTER + I386_CR1: info->i = cpustate->cr[1]; break;
+ case CPUINFO_INT_REGISTER + I386_CR2: info->i = cpustate->cr[2]; break;
+ case CPUINFO_INT_REGISTER + I386_CR3: info->i = cpustate->cr[3]; break;
+ case CPUINFO_INT_REGISTER + I386_CR4: info->i = cpustate->cr[4]; break;
+ case CPUINFO_INT_REGISTER + I386_DR0: info->i = cpustate->dr[0]; break;
+ case CPUINFO_INT_REGISTER + I386_DR1: info->i = cpustate->dr[1]; break;
+ case CPUINFO_INT_REGISTER + I386_DR2: info->i = cpustate->dr[2]; break;
+ case CPUINFO_INT_REGISTER + I386_DR3: info->i = cpustate->dr[3]; break;
+ case CPUINFO_INT_REGISTER + I386_DR4: info->i = cpustate->dr[4]; break;
+ case CPUINFO_INT_REGISTER + I386_DR5: info->i = cpustate->dr[5]; break;
+ case CPUINFO_INT_REGISTER + I386_DR6: info->i = cpustate->dr[6]; break;
+ case CPUINFO_INT_REGISTER + I386_DR7: info->i = cpustate->dr[7]; break;
+ case CPUINFO_INT_REGISTER + I386_TR6: info->i = cpustate->tr[6]; break;
+ case CPUINFO_INT_REGISTER + I386_TR7: info->i = cpustate->tr[7]; break;
+ case CPUINFO_INT_REGISTER + I386_GDTR_BASE: info->i = cpustate->gdtr.base; break;
+ case CPUINFO_INT_REGISTER + I386_GDTR_LIMIT: info->i = cpustate->gdtr.limit; break;
+ case CPUINFO_INT_REGISTER + I386_IDTR_BASE: info->i = cpustate->idtr.base; break;
+ case CPUINFO_INT_REGISTER + I386_IDTR_LIMIT: info->i = cpustate->idtr.limit; break;
+ case CPUINFO_INT_REGISTER + I386_TR: info->i = cpustate->task.segment; break;
+ case CPUINFO_INT_REGISTER + I386_TR_BASE: info->i = cpustate->task.base; break;
+ case CPUINFO_INT_REGISTER + I386_TR_LIMIT: info->i = cpustate->task.limit; break;
+ case CPUINFO_INT_REGISTER + I386_TR_FLAGS: info->i = cpustate->task.flags; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR: info->i = cpustate->ldtr.segment; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR_BASE: info->i = cpustate->ldtr.base; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR_LIMIT: info->i = cpustate->ldtr.limit; break;
+ case CPUINFO_INT_REGISTER + I386_LDTR_FLAGS: info->i = cpustate->ldtr.flags; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i386); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i386); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i386); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i386); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->cycles; break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(i386); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i386); break;
- case CPUINFO_FCT_DEBUG_INIT: info->debug_init = CPU_DEBUG_INIT_NAME(i386); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i386); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i386); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i386); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i386); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->cycles; break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(i386); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i386); break;
+ case CPUINFO_FCT_DEBUG_INIT: info->debug_init = CPU_DEBUG_INIT_NAME(i386); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "I386"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 386"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
-
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%08X", get_flags(cpustate)); break;
-
- case CPUINFO_STR_REGISTER + I386_PC: sprintf(info->s, "PC: %08X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + I386_EIP: sprintf(info->s, "EIP: %08X", cpustate->eip); break;
- case CPUINFO_STR_REGISTER + I386_AL: sprintf(info->s, "~AL: %02X", REG8(AL)); break;
- case CPUINFO_STR_REGISTER + I386_AH: sprintf(info->s, "~AH: %02X", REG8(AH)); break;
- case CPUINFO_STR_REGISTER + I386_BL: sprintf(info->s, "~BL: %02X", REG8(BL)); break;
- case CPUINFO_STR_REGISTER + I386_BH: sprintf(info->s, "~BH: %02X", REG8(BH)); break;
- case CPUINFO_STR_REGISTER + I386_CL: sprintf(info->s, "~CL: %02X", REG8(CL)); break;
- case CPUINFO_STR_REGISTER + I386_CH: sprintf(info->s, "~CH: %02X", REG8(CH)); break;
- case CPUINFO_STR_REGISTER + I386_DL: sprintf(info->s, "~DL: %02X", REG8(DL)); break;
- case CPUINFO_STR_REGISTER + I386_DH: sprintf(info->s, "~DH: %02X", REG8(DH)); break;
- case CPUINFO_STR_REGISTER + I386_AX: sprintf(info->s, "~AX: %04X", REG16(AX)); break;
- case CPUINFO_STR_REGISTER + I386_BX: sprintf(info->s, "~BX: %04X", REG16(BX)); break;
- case CPUINFO_STR_REGISTER + I386_CX: sprintf(info->s, "~CX: %04X", REG16(CX)); break;
- case CPUINFO_STR_REGISTER + I386_DX: sprintf(info->s, "~DX: %04X", REG16(DX)); break;
- case CPUINFO_STR_REGISTER + I386_SI: sprintf(info->s, "~SI: %04X", REG16(SI)); break;
- case CPUINFO_STR_REGISTER + I386_DI: sprintf(info->s, "~DI: %04X", REG16(DI)); break;
- case CPUINFO_STR_REGISTER + I386_BP: sprintf(info->s, "~BP: %04X", REG16(BP)); break;
- case CPUINFO_STR_REGISTER + I386_SP: sprintf(info->s, "~SP: %04X", REG16(SP)); break;
- case CPUINFO_STR_REGISTER + I386_IP: sprintf(info->s, "~IP: %04X", cpustate->eip & 0xFFFF); break;
- case CPUINFO_STR_REGISTER + I386_EAX: sprintf(info->s, "EAX: %08X", cpustate->reg.d[EAX]); break;
- case CPUINFO_STR_REGISTER + I386_EBX: sprintf(info->s, "EBX: %08X", cpustate->reg.d[EBX]); break;
- case CPUINFO_STR_REGISTER + I386_ECX: sprintf(info->s, "ECX: %08X", cpustate->reg.d[ECX]); break;
- case CPUINFO_STR_REGISTER + I386_EDX: sprintf(info->s, "EDX: %08X", cpustate->reg.d[EDX]); break;
- case CPUINFO_STR_REGISTER + I386_EBP: sprintf(info->s, "EBP: %08X", cpustate->reg.d[EBP]); break;
- case CPUINFO_STR_REGISTER + I386_ESP: sprintf(info->s, "ESP: %08X", cpustate->reg.d[ESP]); break;
- case CPUINFO_STR_REGISTER + I386_ESI: sprintf(info->s, "ESI: %08X", cpustate->reg.d[ESI]); break;
- case CPUINFO_STR_REGISTER + I386_EDI: sprintf(info->s, "EDI: %08X", cpustate->reg.d[EDI]); break;
- case CPUINFO_STR_REGISTER + I386_EFLAGS: sprintf(info->s, "EFLAGS: %08X", cpustate->eflags); break;
- case CPUINFO_STR_REGISTER + I386_CS: sprintf(info->s, "CS: %04X", cpustate->sreg[CS].selector); break;
- case CPUINFO_STR_REGISTER + I386_CS_BASE: sprintf(info->s, "CSBASE: %08X", cpustate->sreg[CS].base); break;
- case CPUINFO_STR_REGISTER + I386_CS_LIMIT: sprintf(info->s, "CSLIMIT: %08X", cpustate->sreg[CS].limit); break;
- case CPUINFO_STR_REGISTER + I386_CS_FLAGS: sprintf(info->s, "CSFLAGS: %04X", cpustate->sreg[CS].flags); break;
- case CPUINFO_STR_REGISTER + I386_SS: sprintf(info->s, "SS: %04X", cpustate->sreg[SS].selector); break;
- case CPUINFO_STR_REGISTER + I386_SS_BASE: sprintf(info->s, "SSBASE: %08X", cpustate->sreg[SS].base); break;
- case CPUINFO_STR_REGISTER + I386_SS_LIMIT: sprintf(info->s, "SSLIMIT: %08X", cpustate->sreg[SS].limit); break;
- case CPUINFO_STR_REGISTER + I386_SS_FLAGS: sprintf(info->s, "SSFLAGS: %04X", cpustate->sreg[SS].flags); break;
- case CPUINFO_STR_REGISTER + I386_DS: sprintf(info->s, "DS: %04X", cpustate->sreg[DS].selector); break;
- case CPUINFO_STR_REGISTER + I386_DS_BASE: sprintf(info->s, "DSBASE: %08X", cpustate->sreg[DS].base); break;
- case CPUINFO_STR_REGISTER + I386_DS_LIMIT: sprintf(info->s, "DSLIMIT: %08X", cpustate->sreg[DS].limit); break;
- case CPUINFO_STR_REGISTER + I386_DS_FLAGS: sprintf(info->s, "DSFLAGS: %04X", cpustate->sreg[DS].flags); break;
- case CPUINFO_STR_REGISTER + I386_ES: sprintf(info->s, "ES: %04X", cpustate->sreg[ES].selector); break;
- case CPUINFO_STR_REGISTER + I386_ES_BASE: sprintf(info->s, "ESBASE: %08X", cpustate->sreg[ES].base); break;
- case CPUINFO_STR_REGISTER + I386_ES_LIMIT: sprintf(info->s, "ESLIMIT: %08X", cpustate->sreg[ES].limit); break;
- case CPUINFO_STR_REGISTER + I386_ES_FLAGS: sprintf(info->s, "ESFLAGS: %04X", cpustate->sreg[ES].flags); break;
- case CPUINFO_STR_REGISTER + I386_FS: sprintf(info->s, "FS: %04X", cpustate->sreg[FS].selector); break;
- case CPUINFO_STR_REGISTER + I386_FS_BASE: sprintf(info->s, "FSBASE: %08X", cpustate->sreg[FS].base); break;
- case CPUINFO_STR_REGISTER + I386_FS_LIMIT: sprintf(info->s, "FSLIMIT: %08X", cpustate->sreg[FS].limit); break;
- case CPUINFO_STR_REGISTER + I386_FS_FLAGS: sprintf(info->s, "FSFLAGS: %04X", cpustate->sreg[FS].flags); break;
- case CPUINFO_STR_REGISTER + I386_GS: sprintf(info->s, "GS: %04X", cpustate->sreg[GS].selector); break;
- case CPUINFO_STR_REGISTER + I386_GS_BASE: sprintf(info->s, "GSBASE: %08X", cpustate->sreg[GS].base); break;
- case CPUINFO_STR_REGISTER + I386_GS_LIMIT: sprintf(info->s, "GSLIMIT: %08X", cpustate->sreg[GS].limit); break;
- case CPUINFO_STR_REGISTER + I386_GS_FLAGS: sprintf(info->s, "GSFLAGS: %04X", cpustate->sreg[GS].flags); break;
- case CPUINFO_STR_REGISTER + I386_CR0: sprintf(info->s, "CR0: %08X", cpustate->cr[0]); break;
- case CPUINFO_STR_REGISTER + I386_CR1: sprintf(info->s, "CR1: %08X", cpustate->cr[1]); break;
- case CPUINFO_STR_REGISTER + I386_CR2: sprintf(info->s, "CR2: %08X", cpustate->cr[2]); break;
- case CPUINFO_STR_REGISTER + I386_CR3: sprintf(info->s, "CR3: %08X", cpustate->cr[3]); break;
- case CPUINFO_STR_REGISTER + I386_CR4: sprintf(info->s, "CR4: %08X", cpustate->cr[4]); break;
- case CPUINFO_STR_REGISTER + I386_DR0: sprintf(info->s, "DR0: %08X", cpustate->dr[0]); break;
- case CPUINFO_STR_REGISTER + I386_DR1: sprintf(info->s, "DR1: %08X", cpustate->dr[1]); break;
- case CPUINFO_STR_REGISTER + I386_DR2: sprintf(info->s, "DR2: %08X", cpustate->dr[2]); break;
- case CPUINFO_STR_REGISTER + I386_DR3: sprintf(info->s, "DR3: %08X", cpustate->dr[3]); break;
- case CPUINFO_STR_REGISTER + I386_DR4: sprintf(info->s, "DR4: %08X", cpustate->dr[4]); break;
- case CPUINFO_STR_REGISTER + I386_DR5: sprintf(info->s, "DR5: %08X", cpustate->dr[5]); break;
- case CPUINFO_STR_REGISTER + I386_DR6: sprintf(info->s, "DR6: %08X", cpustate->dr[6]); break;
- case CPUINFO_STR_REGISTER + I386_DR7: sprintf(info->s, "DR7: %08X", cpustate->dr[7]); break;
- case CPUINFO_STR_REGISTER + I386_TR6: sprintf(info->s, "TR6: %08X", cpustate->tr[6]); break;
- case CPUINFO_STR_REGISTER + I386_TR7: sprintf(info->s, "TR7: %08X", cpustate->tr[7]); break;
- case CPUINFO_STR_REGISTER + I386_GDTR_BASE: sprintf(info->s, "GDTRBASE: %08X", cpustate->gdtr.base); break;
- case CPUINFO_STR_REGISTER + I386_GDTR_LIMIT: sprintf(info->s, "GDTRLIMIT: %04X", cpustate->gdtr.limit); break;
- case CPUINFO_STR_REGISTER + I386_IDTR_BASE: sprintf(info->s, "IDTRBASE: %08X", cpustate->idtr.base); break;
- case CPUINFO_STR_REGISTER + I386_IDTR_LIMIT: sprintf(info->s, "IDTRLIMIT: %04X", cpustate->idtr.limit); break;
- case CPUINFO_STR_REGISTER + I386_LDTR: sprintf(info->s, "LDTR: %04X", cpustate->ldtr.segment); break;
- case CPUINFO_STR_REGISTER + I386_LDTR_BASE: sprintf(info->s, "LDTRBASE: %08X", cpustate->ldtr.base); break;
- case CPUINFO_STR_REGISTER + I386_LDTR_LIMIT: sprintf(info->s, "LDTRLIMIT: %08X", cpustate->ldtr.limit); break;
- case CPUINFO_STR_REGISTER + I386_LDTR_FLAGS: sprintf(info->s, "LDTRFLAGS: %04X", cpustate->ldtr.flags); break;
- case CPUINFO_STR_REGISTER + I386_TR: sprintf(info->s, "TR: %04X", cpustate->task.segment); break;
- case CPUINFO_STR_REGISTER + I386_TR_BASE: sprintf(info->s, "TRBASE: %08X", cpustate->task.base); break;
- case CPUINFO_STR_REGISTER + I386_TR_LIMIT: sprintf(info->s, "TRLIMIT: %08X", cpustate->task.limit); break;
- case CPUINFO_STR_REGISTER + I386_TR_FLAGS: sprintf(info->s, "TRFLAGS: %04X", cpustate->task.flags); break;
- case CPUINFO_STR_REGISTER + I386_CPL: sprintf(info->s, "CPL: %01X", cpustate->CPL); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I386"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 386"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
+
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%08X", get_flags(cpustate)); break;
+
+ case CPUINFO_STR_REGISTER + I386_PC: sprintf(info->s, "PC: %08X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + I386_EIP: sprintf(info->s, "EIP: %08X", cpustate->eip); break;
+ case CPUINFO_STR_REGISTER + I386_AL: sprintf(info->s, "~AL: %02X", REG8(AL)); break;
+ case CPUINFO_STR_REGISTER + I386_AH: sprintf(info->s, "~AH: %02X", REG8(AH)); break;
+ case CPUINFO_STR_REGISTER + I386_BL: sprintf(info->s, "~BL: %02X", REG8(BL)); break;
+ case CPUINFO_STR_REGISTER + I386_BH: sprintf(info->s, "~BH: %02X", REG8(BH)); break;
+ case CPUINFO_STR_REGISTER + I386_CL: sprintf(info->s, "~CL: %02X", REG8(CL)); break;
+ case CPUINFO_STR_REGISTER + I386_CH: sprintf(info->s, "~CH: %02X", REG8(CH)); break;
+ case CPUINFO_STR_REGISTER + I386_DL: sprintf(info->s, "~DL: %02X", REG8(DL)); break;
+ case CPUINFO_STR_REGISTER + I386_DH: sprintf(info->s, "~DH: %02X", REG8(DH)); break;
+ case CPUINFO_STR_REGISTER + I386_AX: sprintf(info->s, "~AX: %04X", REG16(AX)); break;
+ case CPUINFO_STR_REGISTER + I386_BX: sprintf(info->s, "~BX: %04X", REG16(BX)); break;
+ case CPUINFO_STR_REGISTER + I386_CX: sprintf(info->s, "~CX: %04X", REG16(CX)); break;
+ case CPUINFO_STR_REGISTER + I386_DX: sprintf(info->s, "~DX: %04X", REG16(DX)); break;
+ case CPUINFO_STR_REGISTER + I386_SI: sprintf(info->s, "~SI: %04X", REG16(SI)); break;
+ case CPUINFO_STR_REGISTER + I386_DI: sprintf(info->s, "~DI: %04X", REG16(DI)); break;
+ case CPUINFO_STR_REGISTER + I386_BP: sprintf(info->s, "~BP: %04X", REG16(BP)); break;
+ case CPUINFO_STR_REGISTER + I386_SP: sprintf(info->s, "~SP: %04X", REG16(SP)); break;
+ case CPUINFO_STR_REGISTER + I386_IP: sprintf(info->s, "~IP: %04X", cpustate->eip & 0xFFFF); break;
+ case CPUINFO_STR_REGISTER + I386_EAX: sprintf(info->s, "EAX: %08X", cpustate->reg.d[EAX]); break;
+ case CPUINFO_STR_REGISTER + I386_EBX: sprintf(info->s, "EBX: %08X", cpustate->reg.d[EBX]); break;
+ case CPUINFO_STR_REGISTER + I386_ECX: sprintf(info->s, "ECX: %08X", cpustate->reg.d[ECX]); break;
+ case CPUINFO_STR_REGISTER + I386_EDX: sprintf(info->s, "EDX: %08X", cpustate->reg.d[EDX]); break;
+ case CPUINFO_STR_REGISTER + I386_EBP: sprintf(info->s, "EBP: %08X", cpustate->reg.d[EBP]); break;
+ case CPUINFO_STR_REGISTER + I386_ESP: sprintf(info->s, "ESP: %08X", cpustate->reg.d[ESP]); break;
+ case CPUINFO_STR_REGISTER + I386_ESI: sprintf(info->s, "ESI: %08X", cpustate->reg.d[ESI]); break;
+ case CPUINFO_STR_REGISTER + I386_EDI: sprintf(info->s, "EDI: %08X", cpustate->reg.d[EDI]); break;
+ case CPUINFO_STR_REGISTER + I386_EFLAGS: sprintf(info->s, "EFLAGS: %08X", cpustate->eflags); break;
+ case CPUINFO_STR_REGISTER + I386_CS: sprintf(info->s, "CS: %04X", cpustate->sreg[CS].selector); break;
+ case CPUINFO_STR_REGISTER + I386_CS_BASE: sprintf(info->s, "CSBASE: %08X", cpustate->sreg[CS].base); break;
+ case CPUINFO_STR_REGISTER + I386_CS_LIMIT: sprintf(info->s, "CSLIMIT: %08X", cpustate->sreg[CS].limit); break;
+ case CPUINFO_STR_REGISTER + I386_CS_FLAGS: sprintf(info->s, "CSFLAGS: %04X", cpustate->sreg[CS].flags); break;
+ case CPUINFO_STR_REGISTER + I386_SS: sprintf(info->s, "SS: %04X", cpustate->sreg[SS].selector); break;
+ case CPUINFO_STR_REGISTER + I386_SS_BASE: sprintf(info->s, "SSBASE: %08X", cpustate->sreg[SS].base); break;
+ case CPUINFO_STR_REGISTER + I386_SS_LIMIT: sprintf(info->s, "SSLIMIT: %08X", cpustate->sreg[SS].limit); break;
+ case CPUINFO_STR_REGISTER + I386_SS_FLAGS: sprintf(info->s, "SSFLAGS: %04X", cpustate->sreg[SS].flags); break;
+ case CPUINFO_STR_REGISTER + I386_DS: sprintf(info->s, "DS: %04X", cpustate->sreg[DS].selector); break;
+ case CPUINFO_STR_REGISTER + I386_DS_BASE: sprintf(info->s, "DSBASE: %08X", cpustate->sreg[DS].base); break;
+ case CPUINFO_STR_REGISTER + I386_DS_LIMIT: sprintf(info->s, "DSLIMIT: %08X", cpustate->sreg[DS].limit); break;
+ case CPUINFO_STR_REGISTER + I386_DS_FLAGS: sprintf(info->s, "DSFLAGS: %04X", cpustate->sreg[DS].flags); break;
+ case CPUINFO_STR_REGISTER + I386_ES: sprintf(info->s, "ES: %04X", cpustate->sreg[ES].selector); break;
+ case CPUINFO_STR_REGISTER + I386_ES_BASE: sprintf(info->s, "ESBASE: %08X", cpustate->sreg[ES].base); break;
+ case CPUINFO_STR_REGISTER + I386_ES_LIMIT: sprintf(info->s, "ESLIMIT: %08X", cpustate->sreg[ES].limit); break;
+ case CPUINFO_STR_REGISTER + I386_ES_FLAGS: sprintf(info->s, "ESFLAGS: %04X", cpustate->sreg[ES].flags); break;
+ case CPUINFO_STR_REGISTER + I386_FS: sprintf(info->s, "FS: %04X", cpustate->sreg[FS].selector); break;
+ case CPUINFO_STR_REGISTER + I386_FS_BASE: sprintf(info->s, "FSBASE: %08X", cpustate->sreg[FS].base); break;
+ case CPUINFO_STR_REGISTER + I386_FS_LIMIT: sprintf(info->s, "FSLIMIT: %08X", cpustate->sreg[FS].limit); break;
+ case CPUINFO_STR_REGISTER + I386_FS_FLAGS: sprintf(info->s, "FSFLAGS: %04X", cpustate->sreg[FS].flags); break;
+ case CPUINFO_STR_REGISTER + I386_GS: sprintf(info->s, "GS: %04X", cpustate->sreg[GS].selector); break;
+ case CPUINFO_STR_REGISTER + I386_GS_BASE: sprintf(info->s, "GSBASE: %08X", cpustate->sreg[GS].base); break;
+ case CPUINFO_STR_REGISTER + I386_GS_LIMIT: sprintf(info->s, "GSLIMIT: %08X", cpustate->sreg[GS].limit); break;
+ case CPUINFO_STR_REGISTER + I386_GS_FLAGS: sprintf(info->s, "GSFLAGS: %04X", cpustate->sreg[GS].flags); break;
+ case CPUINFO_STR_REGISTER + I386_CR0: sprintf(info->s, "CR0: %08X", cpustate->cr[0]); break;
+ case CPUINFO_STR_REGISTER + I386_CR1: sprintf(info->s, "CR1: %08X", cpustate->cr[1]); break;
+ case CPUINFO_STR_REGISTER + I386_CR2: sprintf(info->s, "CR2: %08X", cpustate->cr[2]); break;
+ case CPUINFO_STR_REGISTER + I386_CR3: sprintf(info->s, "CR3: %08X", cpustate->cr[3]); break;
+ case CPUINFO_STR_REGISTER + I386_CR4: sprintf(info->s, "CR4: %08X", cpustate->cr[4]); break;
+ case CPUINFO_STR_REGISTER + I386_DR0: sprintf(info->s, "DR0: %08X", cpustate->dr[0]); break;
+ case CPUINFO_STR_REGISTER + I386_DR1: sprintf(info->s, "DR1: %08X", cpustate->dr[1]); break;
+ case CPUINFO_STR_REGISTER + I386_DR2: sprintf(info->s, "DR2: %08X", cpustate->dr[2]); break;
+ case CPUINFO_STR_REGISTER + I386_DR3: sprintf(info->s, "DR3: %08X", cpustate->dr[3]); break;
+ case CPUINFO_STR_REGISTER + I386_DR4: sprintf(info->s, "DR4: %08X", cpustate->dr[4]); break;
+ case CPUINFO_STR_REGISTER + I386_DR5: sprintf(info->s, "DR5: %08X", cpustate->dr[5]); break;
+ case CPUINFO_STR_REGISTER + I386_DR6: sprintf(info->s, "DR6: %08X", cpustate->dr[6]); break;
+ case CPUINFO_STR_REGISTER + I386_DR7: sprintf(info->s, "DR7: %08X", cpustate->dr[7]); break;
+ case CPUINFO_STR_REGISTER + I386_TR6: sprintf(info->s, "TR6: %08X", cpustate->tr[6]); break;
+ case CPUINFO_STR_REGISTER + I386_TR7: sprintf(info->s, "TR7: %08X", cpustate->tr[7]); break;
+ case CPUINFO_STR_REGISTER + I386_GDTR_BASE: sprintf(info->s, "GDTRBASE: %08X", cpustate->gdtr.base); break;
+ case CPUINFO_STR_REGISTER + I386_GDTR_LIMIT: sprintf(info->s, "GDTRLIMIT: %04X", cpustate->gdtr.limit); break;
+ case CPUINFO_STR_REGISTER + I386_IDTR_BASE: sprintf(info->s, "IDTRBASE: %08X", cpustate->idtr.base); break;
+ case CPUINFO_STR_REGISTER + I386_IDTR_LIMIT: sprintf(info->s, "IDTRLIMIT: %04X", cpustate->idtr.limit); break;
+ case CPUINFO_STR_REGISTER + I386_LDTR: sprintf(info->s, "LDTR: %04X", cpustate->ldtr.segment); break;
+ case CPUINFO_STR_REGISTER + I386_LDTR_BASE: sprintf(info->s, "LDTRBASE: %08X", cpustate->ldtr.base); break;
+ case CPUINFO_STR_REGISTER + I386_LDTR_LIMIT: sprintf(info->s, "LDTRLIMIT: %08X", cpustate->ldtr.limit); break;
+ case CPUINFO_STR_REGISTER + I386_LDTR_FLAGS: sprintf(info->s, "LDTRFLAGS: %04X", cpustate->ldtr.flags); break;
+ case CPUINFO_STR_REGISTER + I386_TR: sprintf(info->s, "TR: %04X", cpustate->task.segment); break;
+ case CPUINFO_STR_REGISTER + I386_TR_BASE: sprintf(info->s, "TRBASE: %08X", cpustate->task.base); break;
+ case CPUINFO_STR_REGISTER + I386_TR_LIMIT: sprintf(info->s, "TRLIMIT: %08X", cpustate->task.limit); break;
+ case CPUINFO_STR_REGISTER + I386_TR_FLAGS: sprintf(info->s, "TRFLAGS: %04X", cpustate->task.flags); break;
+ case CPUINFO_STR_REGISTER + I386_CPL: sprintf(info->s, "CPL: %01X", cpustate->CPL); break;
}
}
@@ -3620,8 +3620,8 @@ static CPU_RESET( i486 )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -3664,11 +3664,11 @@ static CPU_SET_INFO( i486 )
i386_state *cpustate = get_safe_token(device);
switch (state)
{
- case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->x87_cw = info->i; break;
- case CPUINFO_INT_REGISTER + X87_STATUS: cpustate->x87_sw = info->i; break;
- case CPUINFO_INT_REGISTER + X87_TAG: cpustate->x87_tw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->x87_cw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_STATUS: cpustate->x87_sw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_TAG: cpustate->x87_tw = info->i; break;
- default: CPU_SET_INFO_CALL(i386); break;
+ default: CPU_SET_INFO_CALL(i386); break;
}
}
@@ -3677,30 +3677,30 @@ CPU_GET_INFO( i486 )
i386_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i486);break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i486); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i486); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(i486); break;
-
- case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->x87_cw; break;
- case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->x87_sw; break;
- case CPUINFO_INT_REGISTER + X87_TAG: info->i = cpustate->x87_tw; break;
-
- case CPUINFO_STR_NAME: strcpy(info->s, "I486"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 486"); break;
- case CPUINFO_STR_REGISTER + X87_CTRL: sprintf(info->s, "x87_CW: %04X", cpustate->x87_cw); break;
- case CPUINFO_STR_REGISTER + X87_STATUS: sprintf(info->s, "x87_SW: %04X", cpustate->x87_sw); break;
- case CPUINFO_STR_REGISTER + X87_TAG: sprintf(info->s, "x87_TAG:%04X", cpustate->x87_tw); break;
- case CPUINFO_STR_REGISTER + X87_ST0: sprintf(info->s, "ST0: %f", fx80_to_double(ST(0))); break;
- case CPUINFO_STR_REGISTER + X87_ST1: sprintf(info->s, "ST1: %f", fx80_to_double(ST(1))); break;
- case CPUINFO_STR_REGISTER + X87_ST2: sprintf(info->s, "ST2: %f", fx80_to_double(ST(2))); break;
- case CPUINFO_STR_REGISTER + X87_ST3: sprintf(info->s, "ST3: %f", fx80_to_double(ST(3))); break;
- case CPUINFO_STR_REGISTER + X87_ST4: sprintf(info->s, "ST4: %f", fx80_to_double(ST(4))); break;
- case CPUINFO_STR_REGISTER + X87_ST5: sprintf(info->s, "ST5: %f", fx80_to_double(ST(5))); break;
- case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", fx80_to_double(ST(6))); break;
- case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", fx80_to_double(ST(7))); break;
-
- default: CPU_GET_INFO_CALL(i386); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i486);break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i486); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i486); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(i486); break;
+
+ case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->x87_cw; break;
+ case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->x87_sw; break;
+ case CPUINFO_INT_REGISTER + X87_TAG: info->i = cpustate->x87_tw; break;
+
+ case CPUINFO_STR_NAME: strcpy(info->s, "I486"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 486"); break;
+ case CPUINFO_STR_REGISTER + X87_CTRL: sprintf(info->s, "x87_CW: %04X", cpustate->x87_cw); break;
+ case CPUINFO_STR_REGISTER + X87_STATUS: sprintf(info->s, "x87_SW: %04X", cpustate->x87_sw); break;
+ case CPUINFO_STR_REGISTER + X87_TAG: sprintf(info->s, "x87_TAG:%04X", cpustate->x87_tw); break;
+ case CPUINFO_STR_REGISTER + X87_ST0: sprintf(info->s, "ST0: %f", fx80_to_double(ST(0))); break;
+ case CPUINFO_STR_REGISTER + X87_ST1: sprintf(info->s, "ST1: %f", fx80_to_double(ST(1))); break;
+ case CPUINFO_STR_REGISTER + X87_ST2: sprintf(info->s, "ST2: %f", fx80_to_double(ST(2))); break;
+ case CPUINFO_STR_REGISTER + X87_ST3: sprintf(info->s, "ST3: %f", fx80_to_double(ST(3))); break;
+ case CPUINFO_STR_REGISTER + X87_ST4: sprintf(info->s, "ST4: %f", fx80_to_double(ST(4))); break;
+ case CPUINFO_STR_REGISTER + X87_ST5: sprintf(info->s, "ST5: %f", fx80_to_double(ST(5))); break;
+ case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", fx80_to_double(ST(6))); break;
+ case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", fx80_to_double(ST(7))); break;
+
+ default: CPU_GET_INFO_CALL(i386); break;
}
}
@@ -3727,8 +3727,8 @@ static CPU_RESET( pentium )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -3760,9 +3760,9 @@ static CPU_RESET( pentium )
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM];
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM];
- cpustate->cpuid_id0 = 0x756e6547; // Genu
- cpustate->cpuid_id1 = 0x49656e69; // ineI
- cpustate->cpuid_id2 = 0x6c65746e; // ntel
+ cpustate->cpuid_id0 = 0x756e6547; // Genu
+ cpustate->cpuid_id1 = 0x49656e69; // ineI
+ cpustate->cpuid_id2 = 0x6c65746e; // ntel
cpustate->cpuid_max_input_value_eax = 0x01;
cpustate->cpu_version = REG32(EDX);
@@ -3787,11 +3787,11 @@ static CPU_SET_INFO( pentium )
i386_state *cpustate = get_safe_token(device);
switch (state)
{
- case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->x87_cw = info->i; break;
- case CPUINFO_INT_REGISTER + X87_STATUS: cpustate->x87_sw = info->i; break;
- case CPUINFO_INT_REGISTER + X87_TAG: cpustate->x87_tw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->x87_cw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_STATUS: cpustate->x87_sw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_TAG: cpustate->x87_tw = info->i; break;
- default: CPU_SET_INFO_CALL(i386); break;
+ default: CPU_SET_INFO_CALL(i386); break;
}
}
@@ -3800,30 +3800,30 @@ CPU_GET_INFO( pentium )
i386_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium); break;
-
- case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->x87_cw; break;
- case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->x87_sw; break;
- case CPUINFO_INT_REGISTER + X87_TAG: info->i = cpustate->x87_tw; break;
-
- case CPUINFO_STR_NAME: strcpy(info->s, "PENTIUM"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium"); break;
- case CPUINFO_STR_REGISTER + X87_CTRL: sprintf(info->s, "x87_CW: %04X", cpustate->x87_cw); break;
- case CPUINFO_STR_REGISTER + X87_STATUS: sprintf(info->s, "x87_SW: %04X", cpustate->x87_sw); break;
- case CPUINFO_STR_REGISTER + X87_TAG: sprintf(info->s, "x87_TAG:%04X", cpustate->x87_tw); break;
- case CPUINFO_STR_REGISTER + X87_ST0: sprintf(info->s, "ST0: %f", fx80_to_double(ST(0))); break;
- case CPUINFO_STR_REGISTER + X87_ST1: sprintf(info->s, "ST1: %f", fx80_to_double(ST(1))); break;
- case CPUINFO_STR_REGISTER + X87_ST2: sprintf(info->s, "ST2: %f", fx80_to_double(ST(2))); break;
- case CPUINFO_STR_REGISTER + X87_ST3: sprintf(info->s, "ST3: %f", fx80_to_double(ST(3))); break;
- case CPUINFO_STR_REGISTER + X87_ST4: sprintf(info->s, "ST4: %f", fx80_to_double(ST(4))); break;
- case CPUINFO_STR_REGISTER + X87_ST5: sprintf(info->s, "ST5: %f", fx80_to_double(ST(5))); break;
- case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", fx80_to_double(ST(6))); break;
- case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", fx80_to_double(ST(7))); break;
-
- default: CPU_GET_INFO_CALL(i386); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium); break;
+
+ case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->x87_cw; break;
+ case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->x87_sw; break;
+ case CPUINFO_INT_REGISTER + X87_TAG: info->i = cpustate->x87_tw; break;
+
+ case CPUINFO_STR_NAME: strcpy(info->s, "PENTIUM"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium"); break;
+ case CPUINFO_STR_REGISTER + X87_CTRL: sprintf(info->s, "x87_CW: %04X", cpustate->x87_cw); break;
+ case CPUINFO_STR_REGISTER + X87_STATUS: sprintf(info->s, "x87_SW: %04X", cpustate->x87_sw); break;
+ case CPUINFO_STR_REGISTER + X87_TAG: sprintf(info->s, "x87_TAG:%04X", cpustate->x87_tw); break;
+ case CPUINFO_STR_REGISTER + X87_ST0: sprintf(info->s, "ST0: %f", fx80_to_double(ST(0))); break;
+ case CPUINFO_STR_REGISTER + X87_ST1: sprintf(info->s, "ST1: %f", fx80_to_double(ST(1))); break;
+ case CPUINFO_STR_REGISTER + X87_ST2: sprintf(info->s, "ST2: %f", fx80_to_double(ST(2))); break;
+ case CPUINFO_STR_REGISTER + X87_ST3: sprintf(info->s, "ST3: %f", fx80_to_double(ST(3))); break;
+ case CPUINFO_STR_REGISTER + X87_ST4: sprintf(info->s, "ST4: %f", fx80_to_double(ST(4))); break;
+ case CPUINFO_STR_REGISTER + X87_ST5: sprintf(info->s, "ST5: %f", fx80_to_double(ST(5))); break;
+ case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", fx80_to_double(ST(6))); break;
+ case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", fx80_to_double(ST(7))); break;
+
+ default: CPU_GET_INFO_CALL(i386); break;
}
}
@@ -3850,8 +3850,8 @@ static CPU_RESET( mediagx )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -3875,16 +3875,16 @@ static CPU_RESET( mediagx )
// [ 3:0] Stepping ID
// Family 4, Model 4 (MediaGX)
REG32(EAX) = 0;
- REG32(EDX) = (4 << 8) | (4 << 4) | (1); /* TODO: is this correct? */
+ REG32(EDX) = (4 << 8) | (4 << 4) | (1); /* TODO: is this correct? */
build_x87_opcode_table(get_safe_token(device));
build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_CYRIX);
cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_MEDIAGX];
cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_MEDIAGX];
- cpustate->cpuid_id0 = 0x69727943; // Cyri
- cpustate->cpuid_id1 = 0x736e4978; // xIns
- cpustate->cpuid_id2 = 0x6d616574; // tead
+ cpustate->cpuid_id0 = 0x69727943; // Cyri
+ cpustate->cpuid_id1 = 0x736e4978; // xIns
+ cpustate->cpuid_id2 = 0x6d616574; // tead
cpustate->cpuid_max_input_value_eax = 0x01;
cpustate->cpu_version = REG32(EDX);
@@ -3904,10 +3904,10 @@ static CPU_SET_INFO( mediagx )
i386_state *cpustate = get_safe_token(device);
switch (state)
{
- case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->x87_cw = info->i; break;
- case CPUINFO_INT_REGISTER + X87_STATUS: cpustate->x87_sw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_CTRL: cpustate->x87_cw = info->i; break;
+ case CPUINFO_INT_REGISTER + X87_STATUS: cpustate->x87_sw = info->i; break;
- default: CPU_SET_INFO_CALL(i386); break;
+ default: CPU_SET_INFO_CALL(i386); break;
}
}
@@ -3916,30 +3916,30 @@ CPU_GET_INFO( mediagx )
i386_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mediagx); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mediagx); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mediagx); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mediagx); break;
-
- case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->x87_cw; break;
- case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->x87_sw; break;
- case CPUINFO_INT_REGISTER + X87_TAG: info->i = cpustate->x87_tw; break;
-
- case CPUINFO_STR_NAME: strcpy(info->s, "MEDIAGX"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Cyrix MediaGX"); break;
- case CPUINFO_STR_REGISTER + X87_CTRL: sprintf(info->s, "x87_CW: %04X", cpustate->x87_cw); break;
- case CPUINFO_STR_REGISTER + X87_STATUS: sprintf(info->s, "x87_SW: %04X", cpustate->x87_sw); break;
- case CPUINFO_STR_REGISTER + X87_TAG: sprintf(info->s, "x87_TAG: %04X", cpustate->x87_tw); break;
- case CPUINFO_STR_REGISTER + X87_ST0: sprintf(info->s, "ST0: %f", fx80_to_double(ST(0))); break;
- case CPUINFO_STR_REGISTER + X87_ST1: sprintf(info->s, "ST1: %f", fx80_to_double(ST(1))); break;
- case CPUINFO_STR_REGISTER + X87_ST2: sprintf(info->s, "ST2: %f", fx80_to_double(ST(2))); break;
- case CPUINFO_STR_REGISTER + X87_ST3: sprintf(info->s, "ST3: %f", fx80_to_double(ST(3))); break;
- case CPUINFO_STR_REGISTER + X87_ST4: sprintf(info->s, "ST4: %f", fx80_to_double(ST(4))); break;
- case CPUINFO_STR_REGISTER + X87_ST5: sprintf(info->s, "ST5: %f", fx80_to_double(ST(5))); break;
- case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", fx80_to_double(ST(6))); break;
- case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", fx80_to_double(ST(7))); break;
-
- default: CPU_GET_INFO_CALL(i386); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mediagx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mediagx); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mediagx); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mediagx); break;
+
+ case CPUINFO_INT_REGISTER + X87_CTRL: info->i = cpustate->x87_cw; break;
+ case CPUINFO_INT_REGISTER + X87_STATUS: info->i = cpustate->x87_sw; break;
+ case CPUINFO_INT_REGISTER + X87_TAG: info->i = cpustate->x87_tw; break;
+
+ case CPUINFO_STR_NAME: strcpy(info->s, "MEDIAGX"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Cyrix MediaGX"); break;
+ case CPUINFO_STR_REGISTER + X87_CTRL: sprintf(info->s, "x87_CW: %04X", cpustate->x87_cw); break;
+ case CPUINFO_STR_REGISTER + X87_STATUS: sprintf(info->s, "x87_SW: %04X", cpustate->x87_sw); break;
+ case CPUINFO_STR_REGISTER + X87_TAG: sprintf(info->s, "x87_TAG: %04X", cpustate->x87_tw); break;
+ case CPUINFO_STR_REGISTER + X87_ST0: sprintf(info->s, "ST0: %f", fx80_to_double(ST(0))); break;
+ case CPUINFO_STR_REGISTER + X87_ST1: sprintf(info->s, "ST1: %f", fx80_to_double(ST(1))); break;
+ case CPUINFO_STR_REGISTER + X87_ST2: sprintf(info->s, "ST2: %f", fx80_to_double(ST(2))); break;
+ case CPUINFO_STR_REGISTER + X87_ST3: sprintf(info->s, "ST3: %f", fx80_to_double(ST(3))); break;
+ case CPUINFO_STR_REGISTER + X87_ST4: sprintf(info->s, "ST4: %f", fx80_to_double(ST(4))); break;
+ case CPUINFO_STR_REGISTER + X87_ST5: sprintf(info->s, "ST5: %f", fx80_to_double(ST(5))); break;
+ case CPUINFO_STR_REGISTER + X87_ST6: sprintf(info->s, "ST6: %f", fx80_to_double(ST(6))); break;
+ case CPUINFO_STR_REGISTER + X87_ST7: sprintf(info->s, "ST7: %f", fx80_to_double(ST(7))); break;
+
+ default: CPU_GET_INFO_CALL(i386); break;
}
}
@@ -3965,8 +3965,8 @@ static CPU_RESET( pentium_pro )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -3991,22 +3991,22 @@ static CPU_RESET( pentium_pro )
// [ 3:0] Stepping ID
// Family 6, Model 1 (Pentium Pro)
REG32(EAX) = 0;
- REG32(EDX) = (6 << 8) | (1 << 4) | (1); /* TODO: is this correct? */
+ REG32(EDX) = (6 << 8) | (1 << 4) | (1); /* TODO: is this correct? */
build_x87_opcode_table(get_safe_token(device));
build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO);
- cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cpuid_id0 = 0x756e6547; // Genu
- cpustate->cpuid_id1 = 0x49656e69; // ineI
- cpustate->cpuid_id2 = 0x6c65746e; // ntel
+ cpustate->cpuid_id0 = 0x756e6547; // Genu
+ cpustate->cpuid_id1 = 0x49656e69; // ineI
+ cpustate->cpuid_id2 = 0x6c65746e; // ntel
cpustate->cpuid_max_input_value_eax = 0x02;
cpustate->cpu_version = REG32(EDX);
// [ 0:0] FPU on chip
- cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
+ cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
CHANGE_PC(cpustate,cpustate->eip);
}
@@ -4019,7 +4019,7 @@ static CPU_SET_INFO( pentium_pro )
{
switch (state)
{
- default: CPU_SET_INFO_CALL(pentium); break;
+ default: CPU_SET_INFO_CALL(pentium); break;
}
}
@@ -4027,15 +4027,15 @@ CPU_GET_INFO( pentium_pro )
{
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium_pro); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium_pro); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium_pro); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium_pro); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium_pro); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium_pro); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium_pro); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium_pro); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "Pentium Pro"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium Pro"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Pentium Pro"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium Pro"); break;
- default: CPU_GET_INFO_CALL(pentium); break;
+ default: CPU_GET_INFO_CALL(pentium); break;
}
}
@@ -4061,8 +4061,8 @@ static CPU_RESET( pentium_mmx )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -4091,18 +4091,18 @@ static CPU_RESET( pentium_mmx )
build_x87_opcode_table(get_safe_token(device));
build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_MMX);
- cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cpuid_id0 = 0x756e6547; // Genu
- cpustate->cpuid_id1 = 0x49656e69; // ineI
- cpustate->cpuid_id2 = 0x6c65746e; // ntel
+ cpustate->cpuid_id0 = 0x756e6547; // Genu
+ cpustate->cpuid_id1 = 0x49656e69; // ineI
+ cpustate->cpuid_id2 = 0x6c65746e; // ntel
cpustate->cpuid_max_input_value_eax = 0x01;
cpustate->cpu_version = REG32(EDX);
// [ 0:0] FPU on chip
- cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
+ cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
CHANGE_PC(cpustate,cpustate->eip);
}
@@ -4115,7 +4115,7 @@ static CPU_SET_INFO( pentium_mmx )
{
switch (state)
{
- default: CPU_SET_INFO_CALL(pentium); break;
+ default: CPU_SET_INFO_CALL(pentium); break;
}
}
@@ -4123,15 +4123,15 @@ CPU_GET_INFO( pentium_mmx )
{
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium_mmx); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium_mmx); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium_mmx); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium_mmx); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium_mmx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium_mmx); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium_mmx); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium_mmx); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "Pentium MMX"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Pentium MMX"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium"); break;
- default: CPU_GET_INFO_CALL(pentium); break;
+ default: CPU_GET_INFO_CALL(pentium); break;
}
}
@@ -4157,8 +4157,8 @@ static CPU_RESET( pentium2 )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -4183,22 +4183,22 @@ static CPU_RESET( pentium2 )
// [ 3:0] Stepping ID
// Family 6, Model 3 (Pentium II / Klamath)
REG32(EAX) = 0;
- REG32(EDX) = (6 << 8) | (3 << 4) | (1); /* TODO: is this correct? */
+ REG32(EDX) = (6 << 8) | (3 << 4) | (1); /* TODO: is this correct? */
build_x87_opcode_table(get_safe_token(device));
build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX);
- cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cpuid_id0 = 0x756e6547; // Genu
- cpustate->cpuid_id1 = 0x49656e69; // ineI
- cpustate->cpuid_id2 = 0x6c65746e; // ntel
+ cpustate->cpuid_id0 = 0x756e6547; // Genu
+ cpustate->cpuid_id1 = 0x49656e69; // ineI
+ cpustate->cpuid_id2 = 0x6c65746e; // ntel
cpustate->cpuid_max_input_value_eax = 0x02;
cpustate->cpu_version = REG32(EDX);
// [ 0:0] FPU on chip
- cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
+ cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
CHANGE_PC(cpustate,cpustate->eip);
}
@@ -4211,7 +4211,7 @@ static CPU_SET_INFO( pentium2 )
{
switch (state)
{
- default: CPU_SET_INFO_CALL(pentium); break;
+ default: CPU_SET_INFO_CALL(pentium); break;
}
}
@@ -4219,15 +4219,15 @@ CPU_GET_INFO( pentium2 )
{
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium2); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium2); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium2); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium2); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium2); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium2); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium2); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium2); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "Pentium II"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium II"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Pentium II"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium II"); break;
- default: CPU_GET_INFO_CALL(pentium2); break;
+ default: CPU_GET_INFO_CALL(pentium2); break;
}
}
@@ -4253,8 +4253,8 @@ static CPU_RESET( pentium3 )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -4283,12 +4283,12 @@ static CPU_RESET( pentium3 )
build_x87_opcode_table(get_safe_token(device));
build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX | OP_SSE);
- cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cpuid_id0 = 0x756e6547; // Genu
- cpustate->cpuid_id1 = 0x49656e69; // ineI
- cpustate->cpuid_id2 = 0x6c65746e; // ntel
+ cpustate->cpuid_id0 = 0x756e6547; // Genu
+ cpustate->cpuid_id1 = 0x49656e69; // ineI
+ cpustate->cpuid_id2 = 0x6c65746e; // ntel
cpustate->cpuid_max_input_value_eax = 0x03;
cpustate->cpu_version = REG32(EDX);
@@ -4296,7 +4296,7 @@ static CPU_RESET( pentium3 )
// [ 0:0] FPU on chip
// [ 4:4] Time Stamp Counter
// [ D:D] PTE Global Bit
- cpustate->feature_flags = 0x00002011; // TODO: enable relevant flags here
+ cpustate->feature_flags = 0x00002011; // TODO: enable relevant flags here
CHANGE_PC(cpustate,cpustate->eip);
}
@@ -4309,7 +4309,7 @@ static CPU_SET_INFO( pentium3 )
{
switch (state)
{
- default: CPU_SET_INFO_CALL(pentium); break;
+ default: CPU_SET_INFO_CALL(pentium); break;
}
}
@@ -4317,15 +4317,15 @@ CPU_GET_INFO( pentium3 )
{
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium3); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium3); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium3); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium3); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium3); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium3); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium3); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium3); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "Pentium III"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium III"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Pentium III"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium III"); break;
- default: CPU_GET_INFO_CALL(pentium); break;
+ default: CPU_GET_INFO_CALL(pentium); break;
}
}
@@ -4351,8 +4351,8 @@ static CPU_RESET( pentium4 )
cpustate->io = &device->space(AS_IO);
cpustate->sreg[CS].selector = 0xf000;
- cpustate->sreg[CS].base = 0xffff0000;
- cpustate->sreg[CS].limit = 0xffff;
+ cpustate->sreg[CS].base = 0xffff0000;
+ cpustate->sreg[CS].limit = 0xffff;
cpustate->sreg[CS].flags = 0x009b;
cpustate->sreg[DS].base = cpustate->sreg[ES].base = cpustate->sreg[FS].base = cpustate->sreg[GS].base = cpustate->sreg[SS].base = 0x00000000;
@@ -4384,18 +4384,18 @@ static CPU_RESET( pentium4 )
build_x87_opcode_table(get_safe_token(device));
build_opcode_table(cpustate, OP_I386 | OP_FPU | OP_I486 | OP_PENTIUM | OP_PPRO | OP_MMX | OP_SSE | OP_SSE2);
- cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_rm = cycle_table_rm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
+ cpustate->cycle_table_pm = cycle_table_pm[CPU_CYCLES_PENTIUM]; // TODO: generate own cycle tables
- cpustate->cpuid_id0 = 0x756e6547; // Genu
- cpustate->cpuid_id1 = 0x49656e69; // ineI
- cpustate->cpuid_id2 = 0x6c65746e; // ntel
+ cpustate->cpuid_id0 = 0x756e6547; // Genu
+ cpustate->cpuid_id1 = 0x49656e69; // ineI
+ cpustate->cpuid_id2 = 0x6c65746e; // ntel
cpustate->cpuid_max_input_value_eax = 0x02;
cpustate->cpu_version = REG32(EDX);
// [ 0:0] FPU on chip
- cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
+ cpustate->feature_flags = 0x00000001; // TODO: enable relevant flags here
CHANGE_PC(cpustate,cpustate->eip);
}
@@ -4408,7 +4408,7 @@ static CPU_SET_INFO( pentium4 )
{
switch (state)
{
- default: CPU_SET_INFO_CALL(pentium); break;
+ default: CPU_SET_INFO_CALL(pentium); break;
}
}
@@ -4416,15 +4416,15 @@ CPU_GET_INFO( pentium4 )
{
switch (state)
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium4); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium4); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium4); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium4); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pentium4); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pentium4); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pentium4); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pentium4); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "Pentium 4"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium 4"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Pentium 4"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium 4"); break;
- default: CPU_GET_INFO_CALL(pentium); break;
+ default: CPU_GET_INFO_CALL(pentium); break;
}
}
@@ -4438,4 +4438,3 @@ DEFINE_LEGACY_CPU_DEVICE(PENTIUM_MMX, pentium_mmx);
DEFINE_LEGACY_CPU_DEVICE(PENTIUM2, pentium2);
DEFINE_LEGACY_CPU_DEVICE(PENTIUM3, pentium3);
DEFINE_LEGACY_CPU_DEVICE(PENTIUM4, pentium4);
-
diff --git a/src/emu/cpu/i386/i386.h b/src/emu/cpu/i386/i386.h
index e5b4bbe9e0a..149066e715b 100644
--- a/src/emu/cpu/i386/i386.h
+++ b/src/emu/cpu/i386/i386.h
@@ -3,7 +3,7 @@
#ifndef __I386INTF_H__
#define __I386INTF_H__
-#define INPUT_LINE_A20 1
+#define INPUT_LINE_A20 1
// mingw has this defined for 32-bit compiles
diff --git a/src/emu/cpu/i386/i386dasm.c b/src/emu/cpu/i386/i386dasm.c
index 5a9b408612c..3d422b30f80 100644
--- a/src/emu/cpu/i386/i386dasm.c
+++ b/src/emu/cpu/i386/i386dasm.c
@@ -8,44 +8,44 @@
enum
{
- PARAM_REG = 1, /* 16 or 32-bit register */
- PARAM_REG8, /* 8-bit register */
- PARAM_REG16, /* 16-bit register */
- PARAM_REG32, /* 32-bit register */
- PARAM_REG3264, /* 32-bit or 64-bit register */
- PARAM_REG2_32, /* 32-bit register */
- PARAM_MMX, /* MMX register */
- PARAM_XMM, /* XMM register */
- PARAM_RM, /* 16 or 32-bit memory or register */
- PARAM_RM8, /* 8-bit memory or register */
- PARAM_RM16, /* 16-bit memory or register */
- PARAM_RM32, /* 32-bit memory or register */
- PARAM_RMPTR, /* 16 or 32-bit memory or register */
- PARAM_RMPTR8, /* 8-bit memory or register */
- PARAM_RMPTR16, /* 16-bit memory or register */
- PARAM_RMPTR32, /* 32-bit memory or register */
- PARAM_RMXMM, /* 32 or 64-bit memory or register */
- PARAM_REGORXMM, /* 32 or 64-bit register or XMM register */
- PARAM_M64, /* 64-bit memory */
- PARAM_M64PTR, /* 64-bit memory */
- PARAM_MMXM, /* 64-bit memory or MMX register */
- PARAM_XMMM, /* 128-bit memory or XMM register */
- PARAM_I4, /* 4-bit signed immediate */
- PARAM_I8, /* 8-bit signed immediate */
- PARAM_I16, /* 16-bit signed immediate */
- PARAM_UI8, /* 8-bit unsigned immediate */
- PARAM_UI16, /* 16-bit unsigned immediate */
- PARAM_IMM, /* 16 or 32-bit immediate */
- PARAM_IMM64, /* 16, 32 or 64-bit immediate */
- PARAM_ADDR, /* 16:16 or 16:32 address */
- PARAM_REL, /* 16 or 32-bit PC-relative displacement */
- PARAM_REL8, /* 8-bit PC-relative displacement */
- PARAM_MEM_OFFS, /* 16 or 32-bit mem offset */
- PARAM_SREG, /* segment register */
- PARAM_CREG, /* control register */
- PARAM_DREG, /* debug register */
- PARAM_TREG, /* test register */
- PARAM_1, /* used by shift/rotate instructions */
+ PARAM_REG = 1, /* 16 or 32-bit register */
+ PARAM_REG8, /* 8-bit register */
+ PARAM_REG16, /* 16-bit register */
+ PARAM_REG32, /* 32-bit register */
+ PARAM_REG3264, /* 32-bit or 64-bit register */
+ PARAM_REG2_32, /* 32-bit register */
+ PARAM_MMX, /* MMX register */
+ PARAM_XMM, /* XMM register */
+ PARAM_RM, /* 16 or 32-bit memory or register */
+ PARAM_RM8, /* 8-bit memory or register */
+ PARAM_RM16, /* 16-bit memory or register */
+ PARAM_RM32, /* 32-bit memory or register */
+ PARAM_RMPTR, /* 16 or 32-bit memory or register */
+ PARAM_RMPTR8, /* 8-bit memory or register */
+ PARAM_RMPTR16, /* 16-bit memory or register */
+ PARAM_RMPTR32, /* 32-bit memory or register */
+ PARAM_RMXMM, /* 32 or 64-bit memory or register */
+ PARAM_REGORXMM, /* 32 or 64-bit register or XMM register */
+ PARAM_M64, /* 64-bit memory */
+ PARAM_M64PTR, /* 64-bit memory */
+ PARAM_MMXM, /* 64-bit memory or MMX register */
+ PARAM_XMMM, /* 128-bit memory or XMM register */
+ PARAM_I4, /* 4-bit signed immediate */
+ PARAM_I8, /* 8-bit signed immediate */
+ PARAM_I16, /* 16-bit signed immediate */
+ PARAM_UI8, /* 8-bit unsigned immediate */
+ PARAM_UI16, /* 16-bit unsigned immediate */
+ PARAM_IMM, /* 16 or 32-bit immediate */
+ PARAM_IMM64, /* 16, 32 or 64-bit immediate */
+ PARAM_ADDR, /* 16:16 or 16:32 address */
+ PARAM_REL, /* 16 or 32-bit PC-relative displacement */
+ PARAM_REL8, /* 8-bit PC-relative displacement */
+ PARAM_MEM_OFFS, /* 16 or 32-bit mem offset */
+ PARAM_SREG, /* segment register */
+ PARAM_CREG, /* control register */
+ PARAM_DREG, /* debug register */
+ PARAM_TREG, /* test register */
+ PARAM_1, /* used by shift/rotate instructions */
PARAM_AL,
PARAM_CL,
PARAM_DL,
@@ -55,18 +55,18 @@ enum
PARAM_DH,
PARAM_BH,
PARAM_DX,
- PARAM_EAX, /* EAX or AX */
- PARAM_ECX, /* ECX or CX */
- PARAM_EDX, /* EDX or DX */
- PARAM_EBX, /* EBX or BX */
- PARAM_ESP, /* ESP or SP */
- PARAM_EBP, /* EBP or BP */
- PARAM_ESI, /* ESI or SI */
- PARAM_EDI, /* EDI or DI */
+ PARAM_EAX, /* EAX or AX */
+ PARAM_ECX, /* ECX or CX */
+ PARAM_EDX, /* EDX or DX */
+ PARAM_EBX, /* EBX or BX */
+ PARAM_ESP, /* ESP or SP */
+ PARAM_EBP, /* EBP or BP */
+ PARAM_ESI, /* ESI or SI */
+ PARAM_EDI, /* EDI or DI */
PARAM_XMM0,
- PARAM_XMM64, /* 64-bit memory or XMM register */
- PARAM_XMM32, /* 32-bit memory or XMM register */
- PARAM_XMM16, /* 16-bit memory or XMM register */
+ PARAM_XMM64, /* 64-bit memory or XMM register */
+ PARAM_XMM32, /* 32-bit memory or XMM register */
+ PARAM_XMM16, /* 16-bit memory or XMM register */
};
enum
@@ -85,15 +85,15 @@ enum
SEG_GS,
SEG_SS,
ISREX,
- THREE_BYTE /* [prefix] 0f op1 op2 and then mod/rm */
+ THREE_BYTE /* [prefix] 0f op1 op2 and then mod/rm */
};
-#define FLAGS_MASK 0x0ff
-#define VAR_NAME 0x100
-#define VAR_NAME4 0x200
-#define ALWAYS64 0x400
-#define SPECIAL64 0x800
-#define SPECIAL64_ENT(x) (SPECIAL64 | ((x) << 24))
+#define FLAGS_MASK 0x0ff
+#define VAR_NAME 0x100
+#define VAR_NAME4 0x200
+#define ALWAYS64 0x400
+#define SPECIAL64 0x800
+#define SPECIAL64_ENT(x) (SPECIAL64 | ((x) << 24))
struct I386_OPCODE {
const char *mnemonic;
@@ -115,1810 +115,1810 @@ static const UINT8 *opcode_ptr_base;
static const I386_OPCODE i386_opcode_table1[256] =
{
// 0x00
- {"add", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"add", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"add", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"add", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"add", 0, PARAM_AL, PARAM_UI8, 0 },
- {"add", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"push es", 0, 0, 0, 0 },
- {"pop es", 0, 0, 0, 0 },
- {"or", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"or", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"or", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"or", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"or", 0, PARAM_AL, PARAM_UI8, 0 },
- {"or", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"push cs", 0, 0, 0, 0 },
- {"two_byte", TWO_BYTE, 0, 0, 0 },
+ {"add", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"add", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"add", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"add", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"add", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"add", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"push es", 0, 0, 0, 0 },
+ {"pop es", 0, 0, 0, 0 },
+ {"or", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"or", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"or", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"or", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"or", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"or", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"push cs", 0, 0, 0, 0 },
+ {"two_byte", TWO_BYTE, 0, 0, 0 },
// 0x10
- {"adc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"adc", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"adc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"adc", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"adc", 0, PARAM_AL, PARAM_UI8, 0 },
- {"adc", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"push ss", 0, 0, 0, 0 },
- {"pop ss", 0, 0, 0, 0 },
- {"sbb", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"sbb", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"sbb", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"sbb", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"sbb", 0, PARAM_AL, PARAM_UI8, 0 },
- {"sbb", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"push ds", 0, 0, 0, 0 },
- {"pop ds", 0, 0, 0, 0 },
+ {"adc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"adc", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"adc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"adc", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"adc", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"adc", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"push ss", 0, 0, 0, 0 },
+ {"pop ss", 0, 0, 0, 0 },
+ {"sbb", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"sbb", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"sbb", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"sbb", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"sbb", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"sbb", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"push ds", 0, 0, 0, 0 },
+ {"pop ds", 0, 0, 0, 0 },
// 0x20
- {"and", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"and", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"and", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"and", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"and", 0, PARAM_AL, PARAM_UI8, 0 },
- {"and", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"seg_es", SEG_ES, 0, 0, 0 },
- {"daa", 0, 0, 0, 0 },
- {"sub", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"sub", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"sub", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"sub", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"sub", 0, PARAM_AL, PARAM_I8, 0 },
- {"sub", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"seg_cs", SEG_CS, 0, 0, 0 },
- {"das", 0, 0, 0, 0 },
+ {"and", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"and", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"and", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"and", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"and", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"and", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"seg_es", SEG_ES, 0, 0, 0 },
+ {"daa", 0, 0, 0, 0 },
+ {"sub", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"sub", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"sub", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"sub", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"sub", 0, PARAM_AL, PARAM_I8, 0 },
+ {"sub", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"seg_cs", SEG_CS, 0, 0, 0 },
+ {"das", 0, 0, 0, 0 },
// 0x30
- {"xor", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"xor", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"xor", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"xor", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"xor", 0, PARAM_AL, PARAM_UI8, 0 },
- {"xor", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"seg_ss", SEG_SS, 0, 0, 0 },
- {"aaa", 0, 0, 0, 0 },
- {"cmp", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"cmp", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"cmp", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"cmp", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmp", 0, PARAM_AL, PARAM_UI8, 0 },
- {"cmp", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"seg_ds", SEG_DS, 0, 0, 0 },
- {"aas", 0, 0, 0, 0 },
+ {"xor", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"xor", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"xor", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"xor", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"xor", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"xor", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"seg_ss", SEG_SS, 0, 0, 0 },
+ {"aaa", 0, 0, 0, 0 },
+ {"cmp", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"cmp", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"cmp", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"cmp", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmp", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"cmp", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"seg_ds", SEG_DS, 0, 0, 0 },
+ {"aas", 0, 0, 0, 0 },
// 0x40
- {"inc", ISREX, PARAM_EAX, 0, 0 },
- {"inc", ISREX, PARAM_ECX, 0, 0 },
- {"inc", ISREX, PARAM_EDX, 0, 0 },
- {"inc", ISREX, PARAM_EBX, 0, 0 },
- {"inc", ISREX, PARAM_ESP, 0, 0 },
- {"inc", ISREX, PARAM_EBP, 0, 0 },
- {"inc", ISREX, PARAM_ESI, 0, 0 },
- {"inc", ISREX, PARAM_EDI, 0, 0 },
- {"dec", ISREX, PARAM_EAX, 0, 0 },
- {"dec", ISREX, PARAM_ECX, 0, 0 },
- {"dec", ISREX, PARAM_EDX, 0, 0 },
- {"dec", ISREX, PARAM_EBX, 0, 0 },
- {"dec", ISREX, PARAM_ESP, 0, 0 },
- {"dec", ISREX, PARAM_EBP, 0, 0 },
- {"dec", ISREX, PARAM_ESI, 0, 0 },
- {"dec", ISREX, PARAM_EDI, 0, 0 },
+ {"inc", ISREX, PARAM_EAX, 0, 0 },
+ {"inc", ISREX, PARAM_ECX, 0, 0 },
+ {"inc", ISREX, PARAM_EDX, 0, 0 },
+ {"inc", ISREX, PARAM_EBX, 0, 0 },
+ {"inc", ISREX, PARAM_ESP, 0, 0 },
+ {"inc", ISREX, PARAM_EBP, 0, 0 },
+ {"inc", ISREX, PARAM_ESI, 0, 0 },
+ {"inc", ISREX, PARAM_EDI, 0, 0 },
+ {"dec", ISREX, PARAM_EAX, 0, 0 },
+ {"dec", ISREX, PARAM_ECX, 0, 0 },
+ {"dec", ISREX, PARAM_EDX, 0, 0 },
+ {"dec", ISREX, PARAM_EBX, 0, 0 },
+ {"dec", ISREX, PARAM_ESP, 0, 0 },
+ {"dec", ISREX, PARAM_EBP, 0, 0 },
+ {"dec", ISREX, PARAM_ESI, 0, 0 },
+ {"dec", ISREX, PARAM_EDI, 0, 0 },
// 0x50
- {"push", ALWAYS64, PARAM_EAX, 0, 0 },
- {"push", ALWAYS64, PARAM_ECX, 0, 0 },
- {"push", ALWAYS64, PARAM_EDX, 0, 0 },
- {"push", ALWAYS64, PARAM_EBX, 0, 0 },
- {"push", ALWAYS64, PARAM_ESP, 0, 0 },
- {"push", ALWAYS64, PARAM_EBP, 0, 0 },
- {"push", ALWAYS64, PARAM_ESI, 0, 0 },
- {"push", ALWAYS64, PARAM_EDI, 0, 0 },
- {"pop", ALWAYS64, PARAM_EAX, 0, 0 },
- {"pop", ALWAYS64, PARAM_ECX, 0, 0 },
- {"pop", ALWAYS64, PARAM_EDX, 0, 0 },
- {"pop", ALWAYS64, PARAM_EBX, 0, 0 },
- {"pop", ALWAYS64, PARAM_ESP, 0, 0 },
- {"pop", ALWAYS64, PARAM_EBP, 0, 0 },
- {"pop", ALWAYS64, PARAM_ESI, 0, 0 },
- {"pop", ALWAYS64, PARAM_EDI, 0, 0 },
+ {"push", ALWAYS64, PARAM_EAX, 0, 0 },
+ {"push", ALWAYS64, PARAM_ECX, 0, 0 },
+ {"push", ALWAYS64, PARAM_EDX, 0, 0 },
+ {"push", ALWAYS64, PARAM_EBX, 0, 0 },
+ {"push", ALWAYS64, PARAM_ESP, 0, 0 },
+ {"push", ALWAYS64, PARAM_EBP, 0, 0 },
+ {"push", ALWAYS64, PARAM_ESI, 0, 0 },
+ {"push", ALWAYS64, PARAM_EDI, 0, 0 },
+ {"pop", ALWAYS64, PARAM_EAX, 0, 0 },
+ {"pop", ALWAYS64, PARAM_ECX, 0, 0 },
+ {"pop", ALWAYS64, PARAM_EDX, 0, 0 },
+ {"pop", ALWAYS64, PARAM_EBX, 0, 0 },
+ {"pop", ALWAYS64, PARAM_ESP, 0, 0 },
+ {"pop", ALWAYS64, PARAM_EBP, 0, 0 },
+ {"pop", ALWAYS64, PARAM_ESI, 0, 0 },
+ {"pop", ALWAYS64, PARAM_EDI, 0, 0 },
// 0x60
- {"pusha\0pushad\0<invalid>",VAR_NAME,0, 0, 0 },
- {"popa\0popad\0<invalid>", VAR_NAME,0, 0, 0 },
- {"bound", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"arpl", MODRM | SPECIAL64_ENT(0),PARAM_RM, PARAM_REG16, 0 },
- {"seg_fs", SEG_FS, 0, 0, 0 },
- {"seg_gs", SEG_GS, 0, 0, 0 },
- {"op_size", OP_SIZE, 0, 0, 0 },
- {"addr_size", ADDR_SIZE, 0, 0, 0 },
- {"push", 0, PARAM_IMM, 0, 0 },
- {"imul", MODRM, PARAM_REG, PARAM_RM, PARAM_IMM },
- {"push", 0, PARAM_I8, 0, 0 },
- {"imul", MODRM, PARAM_REG, PARAM_RM, PARAM_I8 },
- {"insb", 0, 0, 0, 0 },
- {"insw\0insd\0insd",VAR_NAME, 0, 0, 0 },
- {"outsb", 0, 0, 0, 0 },
- {"outsw\0outsd\0outsd",VAR_NAME, 0, 0, 0 },
+ {"pusha\0pushad\0<invalid>",VAR_NAME,0, 0, 0 },
+ {"popa\0popad\0<invalid>", VAR_NAME,0, 0, 0 },
+ {"bound", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"arpl", MODRM | SPECIAL64_ENT(0),PARAM_RM, PARAM_REG16, 0 },
+ {"seg_fs", SEG_FS, 0, 0, 0 },
+ {"seg_gs", SEG_GS, 0, 0, 0 },
+ {"op_size", OP_SIZE, 0, 0, 0 },
+ {"addr_size", ADDR_SIZE, 0, 0, 0 },
+ {"push", 0, PARAM_IMM, 0, 0 },
+ {"imul", MODRM, PARAM_REG, PARAM_RM, PARAM_IMM },
+ {"push", 0, PARAM_I8, 0, 0 },
+ {"imul", MODRM, PARAM_REG, PARAM_RM, PARAM_I8 },
+ {"insb", 0, 0, 0, 0 },
+ {"insw\0insd\0insd",VAR_NAME, 0, 0, 0 },
+ {"outsb", 0, 0, 0, 0 },
+ {"outsw\0outsd\0outsd",VAR_NAME, 0, 0, 0 },
// 0x70
- {"jo", 0, PARAM_REL8, 0, 0 },
- {"jno", 0, PARAM_REL8, 0, 0 },
- {"jb", 0, PARAM_REL8, 0, 0 },
- {"jae", 0, PARAM_REL8, 0, 0 },
- {"je", 0, PARAM_REL8, 0, 0 },
- {"jne", 0, PARAM_REL8, 0, 0 },
- {"jbe", 0, PARAM_REL8, 0, 0 },
- {"ja", 0, PARAM_REL8, 0, 0 },
- {"js", 0, PARAM_REL8, 0, 0 },
- {"jns", 0, PARAM_REL8, 0, 0 },
- {"jp", 0, PARAM_REL8, 0, 0 },
- {"jnp", 0, PARAM_REL8, 0, 0 },
- {"jl", 0, PARAM_REL8, 0, 0 },
- {"jge", 0, PARAM_REL8, 0, 0 },
- {"jle", 0, PARAM_REL8, 0, 0 },
- {"jg", 0, PARAM_REL8, 0, 0 },
+ {"jo", 0, PARAM_REL8, 0, 0 },
+ {"jno", 0, PARAM_REL8, 0, 0 },
+ {"jb", 0, PARAM_REL8, 0, 0 },
+ {"jae", 0, PARAM_REL8, 0, 0 },
+ {"je", 0, PARAM_REL8, 0, 0 },
+ {"jne", 0, PARAM_REL8, 0, 0 },
+ {"jbe", 0, PARAM_REL8, 0, 0 },
+ {"ja", 0, PARAM_REL8, 0, 0 },
+ {"js", 0, PARAM_REL8, 0, 0 },
+ {"jns", 0, PARAM_REL8, 0, 0 },
+ {"jp", 0, PARAM_REL8, 0, 0 },
+ {"jnp", 0, PARAM_REL8, 0, 0 },
+ {"jl", 0, PARAM_REL8, 0, 0 },
+ {"jge", 0, PARAM_REL8, 0, 0 },
+ {"jle", 0, PARAM_REL8, 0, 0 },
+ {"jg", 0, PARAM_REL8, 0, 0 },
// 0x80
- {"group80", GROUP, 0, 0, 0 },
- {"group81", GROUP, 0, 0, 0 },
- {"group80", GROUP, 0, 0, 0 },
- {"group83", GROUP, 0, 0, 0 },
- {"test", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"test", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"xchg", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"xchg", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"mov", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"mov", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"mov", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"mov", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"mov", MODRM, PARAM_RM, PARAM_SREG, 0 },
- {"lea", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"mov", MODRM, PARAM_SREG, PARAM_RM, 0 },
- {"pop", MODRM, PARAM_RM, 0, 0 },
+ {"group80", GROUP, 0, 0, 0 },
+ {"group81", GROUP, 0, 0, 0 },
+ {"group80", GROUP, 0, 0, 0 },
+ {"group83", GROUP, 0, 0, 0 },
+ {"test", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"test", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"xchg", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"xchg", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"mov", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"mov", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"mov", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"mov", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"mov", MODRM, PARAM_RM, PARAM_SREG, 0 },
+ {"lea", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"mov", MODRM, PARAM_SREG, PARAM_RM, 0 },
+ {"pop", MODRM, PARAM_RM, 0, 0 },
// 0x90
- {"nop\0???\0???\0pause", VAR_NAME4, 0, 0, 0 },
- {"xchg", 0, PARAM_EAX, PARAM_ECX, 0 },
- {"xchg", 0, PARAM_EAX, PARAM_EDX, 0 },
- {"xchg", 0, PARAM_EAX, PARAM_EBX, 0 },
- {"xchg", 0, PARAM_EAX, PARAM_ESP, 0 },
- {"xchg", 0, PARAM_EAX, PARAM_EBP, 0 },
- {"xchg", 0, PARAM_EAX, PARAM_ESI, 0 },
- {"xchg", 0, PARAM_EAX, PARAM_EDI, 0 },
- {"cbw\0cwde\0cdqe", VAR_NAME, 0, 0, 0 },
- {"cwd\0cdq\0cqo", VAR_NAME, 0, 0, 0 },
- {"call", ALWAYS64, PARAM_ADDR, 0, 0, DASMFLAG_STEP_OVER},
- {"wait", 0, 0, 0, 0 },
- {"pushf\0pushfd\0pushfq",VAR_NAME, 0, 0, 0 },
- {"popf\0popfd\0popfq",VAR_NAME, 0, 0, 0 },
- {"sahf", 0, 0, 0, 0 },
- {"lahf", 0, 0, 0, 0 },
+ {"nop\0???\0???\0pause", VAR_NAME4, 0, 0, 0 },
+ {"xchg", 0, PARAM_EAX, PARAM_ECX, 0 },
+ {"xchg", 0, PARAM_EAX, PARAM_EDX, 0 },
+ {"xchg", 0, PARAM_EAX, PARAM_EBX, 0 },
+ {"xchg", 0, PARAM_EAX, PARAM_ESP, 0 },
+ {"xchg", 0, PARAM_EAX, PARAM_EBP, 0 },
+ {"xchg", 0, PARAM_EAX, PARAM_ESI, 0 },
+ {"xchg", 0, PARAM_EAX, PARAM_EDI, 0 },
+ {"cbw\0cwde\0cdqe", VAR_NAME, 0, 0, 0 },
+ {"cwd\0cdq\0cqo", VAR_NAME, 0, 0, 0 },
+ {"call", ALWAYS64, PARAM_ADDR, 0, 0, DASMFLAG_STEP_OVER},
+ {"wait", 0, 0, 0, 0 },
+ {"pushf\0pushfd\0pushfq",VAR_NAME, 0, 0, 0 },
+ {"popf\0popfd\0popfq",VAR_NAME, 0, 0, 0 },
+ {"sahf", 0, 0, 0, 0 },
+ {"lahf", 0, 0, 0, 0 },
// 0xa0
- {"mov", 0, PARAM_AL, PARAM_MEM_OFFS, 0 },
- {"mov", 0, PARAM_EAX, PARAM_MEM_OFFS, 0 },
- {"mov", 0, PARAM_MEM_OFFS, PARAM_AL, 0 },
- {"mov", 0, PARAM_MEM_OFFS, PARAM_EAX, 0 },
- {"movsb", 0, 0, 0, 0 },
- {"movsw\0movsd\0movsq",VAR_NAME, 0, 0, 0 },
- {"cmpsb", 0, 0, 0, 0 },
- {"cmpsw\0cmpsd\0cmpsq",VAR_NAME, 0, 0, 0 },
- {"test", 0, PARAM_AL, PARAM_UI8, 0 },
- {"test", 0, PARAM_EAX, PARAM_IMM, 0 },
- {"stosb", 0, 0, 0, 0 },
- {"stosw\0stosd\0stosq",VAR_NAME, 0, 0, 0 },
- {"lodsb", 0, 0, 0, 0 },
- {"lodsw\0lodsd\0lodsq",VAR_NAME, 0, 0, 0 },
- {"scasb", 0, 0, 0, 0 },
- {"scasw\0scasd\0scasq",VAR_NAME, 0, 0, 0 },
+ {"mov", 0, PARAM_AL, PARAM_MEM_OFFS, 0 },
+ {"mov", 0, PARAM_EAX, PARAM_MEM_OFFS, 0 },
+ {"mov", 0, PARAM_MEM_OFFS, PARAM_AL, 0 },
+ {"mov", 0, PARAM_MEM_OFFS, PARAM_EAX, 0 },
+ {"movsb", 0, 0, 0, 0 },
+ {"movsw\0movsd\0movsq",VAR_NAME, 0, 0, 0 },
+ {"cmpsb", 0, 0, 0, 0 },
+ {"cmpsw\0cmpsd\0cmpsq",VAR_NAME, 0, 0, 0 },
+ {"test", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"test", 0, PARAM_EAX, PARAM_IMM, 0 },
+ {"stosb", 0, 0, 0, 0 },
+ {"stosw\0stosd\0stosq",VAR_NAME, 0, 0, 0 },
+ {"lodsb", 0, 0, 0, 0 },
+ {"lodsw\0lodsd\0lodsq",VAR_NAME, 0, 0, 0 },
+ {"scasb", 0, 0, 0, 0 },
+ {"scasw\0scasd\0scasq",VAR_NAME, 0, 0, 0 },
// 0xb0
- {"mov", 0, PARAM_AL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_CL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_DL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_BL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_AH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_CH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_DH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_BH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_EAX, PARAM_IMM64, 0 },
- {"mov", 0, PARAM_ECX, PARAM_IMM64, 0 },
- {"mov", 0, PARAM_EDX, PARAM_IMM64, 0 },
- {"mov", 0, PARAM_EBX, PARAM_IMM64, 0 },
- {"mov", 0, PARAM_ESP, PARAM_IMM64, 0 },
- {"mov", 0, PARAM_EBP, PARAM_IMM64, 0 },
- {"mov", 0, PARAM_ESI, PARAM_IMM64, 0 },
- {"mov", 0, PARAM_EDI, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_CL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_DL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_BL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_AH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_CH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_DH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_BH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_EAX, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_ECX, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_EDX, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_EBX, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_ESP, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_EBP, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_ESI, PARAM_IMM64, 0 },
+ {"mov", 0, PARAM_EDI, PARAM_IMM64, 0 },
// 0xc0
- {"groupC0", GROUP, 0, 0, 0 },
- {"groupC1", GROUP, 0, 0, 0 },
- {"ret", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
- {"ret", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
- {"les", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"lds", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"mov", MODRM, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"mov", MODRM, PARAM_RMPTR, PARAM_IMM, 0 },
- {"enter", 0, PARAM_I16, PARAM_UI8, 0 },
- {"leave", 0, 0, 0, 0 },
- {"retf", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
- {"retf", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
- {"int 3", 0, 0, 0, 0, DASMFLAG_STEP_OVER},
- {"int", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER},
- {"into", 0, 0, 0, 0 },
- {"iret", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {"groupC0", GROUP, 0, 0, 0 },
+ {"groupC1", GROUP, 0, 0, 0 },
+ {"ret", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
+ {"ret", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {"les", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"lds", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"mov", MODRM, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"mov", MODRM, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"enter", 0, PARAM_I16, PARAM_UI8, 0 },
+ {"leave", 0, 0, 0, 0 },
+ {"retf", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
+ {"retf", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {"int 3", 0, 0, 0, 0, DASMFLAG_STEP_OVER},
+ {"int", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER},
+ {"into", 0, 0, 0, 0 },
+ {"iret", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
// 0xd0
- {"groupD0", GROUP, 0, 0, 0 },
- {"groupD1", GROUP, 0, 0, 0 },
- {"groupD2", GROUP, 0, 0, 0 },
- {"groupD3", GROUP, 0, 0, 0 },
- {"aam", 0, PARAM_I8, 0, 0 },
- {"aad", 0, PARAM_I8, 0, 0 },
- {"salc", 0, 0, 0, 0 }, //AMD docs name it
- {"xlat", 0, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
+ {"groupD0", GROUP, 0, 0, 0 },
+ {"groupD1", GROUP, 0, 0, 0 },
+ {"groupD2", GROUP, 0, 0, 0 },
+ {"groupD3", GROUP, 0, 0, 0 },
+ {"aam", 0, PARAM_I8, 0, 0 },
+ {"aad", 0, PARAM_I8, 0, 0 },
+ {"salc", 0, 0, 0, 0 }, //AMD docs name it
+ {"xlat", 0, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
// 0xe0
- {"loopne", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"loopz", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"loop", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"jcxz\0jecxz\0jrcxz",VAR_NAME, PARAM_REL8, 0, 0 },
- {"in", 0, PARAM_AL, PARAM_UI8, 0 },
- {"in", 0, PARAM_EAX, PARAM_UI8, 0 },
- {"out", 0, PARAM_UI8, PARAM_AL, 0 },
- {"out", 0, PARAM_UI8, PARAM_EAX, 0 },
- {"call", 0, PARAM_REL, 0, 0, DASMFLAG_STEP_OVER},
- {"jmp", 0, PARAM_REL, 0, 0 },
- {"jmp", 0, PARAM_ADDR, 0, 0 },
- {"jmp", 0, PARAM_REL8, 0, 0 },
- {"in", 0, PARAM_AL, PARAM_DX, 0 },
- {"in", 0, PARAM_EAX, PARAM_DX, 0 },
- {"out", 0, PARAM_DX, PARAM_AL, 0 },
- {"out", 0, PARAM_DX, PARAM_EAX, 0 },
+ {"loopne", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {"loopz", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {"loop", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {"jcxz\0jecxz\0jrcxz",VAR_NAME, PARAM_REL8, 0, 0 },
+ {"in", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"in", 0, PARAM_EAX, PARAM_UI8, 0 },
+ {"out", 0, PARAM_UI8, PARAM_AL, 0 },
+ {"out", 0, PARAM_UI8, PARAM_EAX, 0 },
+ {"call", 0, PARAM_REL, 0, 0, DASMFLAG_STEP_OVER},
+ {"jmp", 0, PARAM_REL, 0, 0 },
+ {"jmp", 0, PARAM_ADDR, 0, 0 },
+ {"jmp", 0, PARAM_REL8, 0, 0 },
+ {"in", 0, PARAM_AL, PARAM_DX, 0 },
+ {"in", 0, PARAM_EAX, PARAM_DX, 0 },
+ {"out", 0, PARAM_DX, PARAM_AL, 0 },
+ {"out", 0, PARAM_DX, PARAM_EAX, 0 },
// 0xf0
- {"lock", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"repne", PREFIX, 0, 0, 0 },
- {"rep", PREFIX, 0, 0, 0 },
- {"hlt", 0, 0, 0, 0 },
- {"cmc", 0, 0, 0, 0 },
- {"groupF6", GROUP, 0, 0, 0 },
- {"groupF7", GROUP, 0, 0, 0 },
- {"clc", 0, 0, 0, 0 },
- {"stc", 0, 0, 0, 0 },
- {"cli", 0, 0, 0, 0 },
- {"sti", 0, 0, 0, 0 },
- {"cld", 0, 0, 0, 0 },
- {"std", 0, 0, 0, 0 },
- {"groupFE", GROUP, 0, 0, 0 },
- {"groupFF", GROUP, 0, 0, 0 }
+ {"lock", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"repne", PREFIX, 0, 0, 0 },
+ {"rep", PREFIX, 0, 0, 0 },
+ {"hlt", 0, 0, 0, 0 },
+ {"cmc", 0, 0, 0, 0 },
+ {"groupF6", GROUP, 0, 0, 0 },
+ {"groupF7", GROUP, 0, 0, 0 },
+ {"clc", 0, 0, 0, 0 },
+ {"stc", 0, 0, 0, 0 },
+ {"cli", 0, 0, 0, 0 },
+ {"sti", 0, 0, 0, 0 },
+ {"cld", 0, 0, 0, 0 },
+ {"std", 0, 0, 0, 0 },
+ {"groupFE", GROUP, 0, 0, 0 },
+ {"groupFF", GROUP, 0, 0, 0 }
};
static const I386_OPCODE x64_opcode_alt[] =
{
- {"movsxd", MODRM | ALWAYS64,PARAM_REG, PARAM_RMPTR32, 0 },
+ {"movsxd", MODRM | ALWAYS64,PARAM_REG, PARAM_RMPTR32, 0 },
};
static const I386_OPCODE i386_opcode_table2[256] =
{
// 0x00
- {"group0F00", GROUP, 0, 0, 0 },
- {"group0F01", GROUP, 0, 0, 0 },
- {"lar", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"lsl", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"???", 0, 0, 0, 0 },
- {"syscall", 0, 0, 0, 0 },
- {"clts", 0, 0, 0, 0 },
- {"sysret", 0, 0, 0, 0 },
- {"invd", 0, 0, 0, 0 },
- {"wbinvd", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"ud2", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"group0F0D", GROUP, 0, 0, 0 }, //AMD only
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"group0F00", GROUP, 0, 0, 0 },
+ {"group0F01", GROUP, 0, 0, 0 },
+ {"lar", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"lsl", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"syscall", 0, 0, 0, 0 },
+ {"clts", 0, 0, 0, 0 },
+ {"sysret", 0, 0, 0, 0 },
+ {"invd", 0, 0, 0, 0 },
+ {"wbinvd", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"ud2", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"group0F0D", GROUP, 0, 0, 0 }, //AMD only
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x10
{"movups\0"
- "movupd\0"
- "movsd\0"
- "movss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "movupd\0"
+ "movsd\0"
+ "movss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"movups\0"
- "movupd\0"
- "movsd\0"
- "movss", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
+ "movupd\0"
+ "movsd\0"
+ "movss", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
{"movlps\0"
- "movlpd\0"
- "movddup\0"
- "movsldup", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "movlpd\0"
+ "movddup\0"
+ "movsldup", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"movlps\0"
- "movlpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
+ "movlpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
{"unpcklps\0"
- "unpcklpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "unpcklpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"unpckhps\0"
- "unpckhpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "unpckhpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"movhps\0"
- "movhpd\0"
- "???\0"
- "movshdup", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
+ "movhpd\0"
+ "???\0"
+ "movshdup", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
{"movhps\0"
- "movhpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
- {"group0F18", GROUP, 0, 0, 0 },
- {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
- {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
- {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
- {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
- {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
- {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
- {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
+ "movhpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ {"group0F18", GROUP, 0, 0, 0 },
+ {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
+ {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
+ {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
+ {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
+ {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
+ {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
+ {"nop_hint", 0, PARAM_RMPTR8, 0, 0 },
// 0x20
- {"mov", MODRM, PARAM_REG2_32, PARAM_CREG, 0 },
- {"mov", MODRM, PARAM_REG2_32, PARAM_DREG, 0 },
- {"mov", MODRM, PARAM_CREG, PARAM_REG2_32, 0 },
- {"mov", MODRM, PARAM_DREG, PARAM_REG2_32, 0 },
- {"mov", MODRM, PARAM_REG2_32, PARAM_TREG, 0 },
- {"???", 0, 0, 0, 0 },
- {"mov", MODRM, PARAM_TREG, PARAM_REG2_32, 0 },
- {"???", 0, 0, 0, 0 },
+ {"mov", MODRM, PARAM_REG2_32, PARAM_CREG, 0 },
+ {"mov", MODRM, PARAM_REG2_32, PARAM_DREG, 0 },
+ {"mov", MODRM, PARAM_CREG, PARAM_REG2_32, 0 },
+ {"mov", MODRM, PARAM_DREG, PARAM_REG2_32, 0 },
+ {"mov", MODRM, PARAM_REG2_32, PARAM_TREG, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"mov", MODRM, PARAM_TREG, PARAM_REG2_32, 0 },
+ {"???", 0, 0, 0, 0 },
{"movaps\0"
- "movapd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "movapd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"movaps\0"
- "movapd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
+ "movapd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
{"cvtpi2ps\0"
- "cvtpi2pd\0"
- "cvtsi2sd\0"
- "cvtsi2ss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_RMXMM, 0 },
+ "cvtpi2pd\0"
+ "cvtsi2sd\0"
+ "cvtsi2ss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_RMXMM, 0 },
{"movntps\0"
- "movntpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
+ "movntpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMMM, PARAM_XMM, 0 },
{"cvttps2pi\0"
- "cvttpd2pi\0"
- "cvttsd2si\0"
- "cvttss2si", MODRM|VAR_NAME4,PARAM_REGORXMM, PARAM_XMMM, 0 },
+ "cvttpd2pi\0"
+ "cvttsd2si\0"
+ "cvttss2si", MODRM|VAR_NAME4,PARAM_REGORXMM, PARAM_XMMM, 0 },
{"cvtps2pi\0"
- "cvtpd2pi\0"
- "cvtsd2si\0"
- "cvtss2si", MODRM|VAR_NAME4,PARAM_REGORXMM, PARAM_XMMM, 0 },
+ "cvtpd2pi\0"
+ "cvtsd2si\0"
+ "cvtss2si", MODRM|VAR_NAME4,PARAM_REGORXMM, PARAM_XMMM, 0 },
{"ucomiss\0"
- "ucomisd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "ucomisd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"comiss\0"
- "comisd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "comisd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
// 0x30
- {"wrmsr", 0, 0, 0, 0 },
- {"rdtsc", 0, 0, 0, 0 },
- {"rdmsr", 0, 0, 0, 0 },
- {"rdpmc", 0, 0, 0, 0 },
- {"sysenter", 0, 0, 0, 0 },
- {"sysexit", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"three_byte", THREE_BYTE, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"three_byte", THREE_BYTE, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"wrmsr", 0, 0, 0, 0 },
+ {"rdtsc", 0, 0, 0, 0 },
+ {"rdmsr", 0, 0, 0, 0 },
+ {"rdpmc", 0, 0, 0, 0 },
+ {"sysenter", 0, 0, 0, 0 },
+ {"sysexit", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"three_byte", THREE_BYTE, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"three_byte", THREE_BYTE, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x40
- {"cmovo", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovno", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovb", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovae", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmove", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovne", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovbe", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmova", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovs", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovns", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovpe", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovpo", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovl", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovge", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovle", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"cmovg", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovo", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovno", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovb", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovae", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmove", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovne", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovbe", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmova", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovs", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovns", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovpe", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovpo", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovl", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovge", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovle", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"cmovg", MODRM, PARAM_REG, PARAM_RM, 0 },
// 0x50
{"movmskps\0"
- "movmskpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_REG3264, PARAM_XMMM, 0 },
+ "movmskpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_REG3264, PARAM_XMMM, 0 },
{"sqrtps\0"
- "sqrtpd\0"
- "sqrtsd\0"
- "sqrtss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "sqrtpd\0"
+ "sqrtsd\0"
+ "sqrtss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"rsqrtps\0"
- "???\0"
- "???\0"
- "rsqrtss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "???\0"
+ "???\0"
+ "rsqrtss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"rcpps\0"
- "???\0"
- "???\0"
- "rcpss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "???\0"
+ "???\0"
+ "rcpss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"andps\0"
- "andpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "andpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"andnps\0"
- "andnpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "andnpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"orps\0"
- "orpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "orpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"xorps\0"
- "xorpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "xorpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"addps\0"
- "addpd\0"
- "addsd\0"
- "addss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "addpd\0"
+ "addsd\0"
+ "addss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"mulps\0"
- "mulpd\0"
- "mulsd\0"
- "mulss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "mulpd\0"
+ "mulsd\0"
+ "mulss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"cvtps2pd\0"
- "cvtpd2ps\0"
- "cvtsd2ss\0"
- "cvtss2sd", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "cvtpd2ps\0"
+ "cvtsd2ss\0"
+ "cvtss2sd", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"cvtdq2ps\0"
- "cvtps2dq\0"
- "???\0"
- "cvttps2dq", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "cvtps2dq\0"
+ "???\0"
+ "cvttps2dq", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"subps\0"
- "subpd\0"
- "subsd\0"
- "subss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "subpd\0"
+ "subsd\0"
+ "subss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"minps\0"
- "minpd\0"
- "minsd\0"
- "minss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "minpd\0"
+ "minsd\0"
+ "minss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"divps\0"
- "divpd\0"
- "divsd\0"
- "divss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "divpd\0"
+ "divsd\0"
+ "divss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"maxps\0"
- "maxpd\0"
- "maxsd\0"
- "maxss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ "maxpd\0"
+ "maxsd\0"
+ "maxss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
// 0x60
- {"punpcklbw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"punpcklwd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"punpckldq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"packsswb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pcmpgtb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pcmpgtw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pcmpgtd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"packuswb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"punpckhbw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"punpckhwd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"punpckhdq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"packssdw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"???\0"
- "punpcklqdq\0"
- "???\0"
- "???\0", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "punpckhqdq\0"
- "???\0"
- "???\0", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"movd", MODRM, PARAM_MMX, PARAM_RM, 0 },
+ {"punpcklbw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"punpcklwd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"punpckldq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"packsswb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pcmpgtb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pcmpgtw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pcmpgtd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"packuswb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"punpckhbw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"punpckhwd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"punpckhdq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"packssdw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"???\0"
+ "punpcklqdq\0"
+ "???\0"
+ "???\0", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "punpckhqdq\0"
+ "???\0"
+ "???\0", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"movd", MODRM, PARAM_MMX, PARAM_RM, 0 },
{"movq\0"
- "movdqa\0"
- "???\0"
- "movdqu", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
+ "movdqa\0"
+ "???\0"
+ "movdqu", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
// 0x70
{"pshufw\0"
- "pshufd\0"
- "pshuflw\0"
- "pshufhw", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, PARAM_I8 },
- {"group0F71", GROUP, 0, 0, 0 },
- {"group0F72", GROUP, 0, 0, 0 },
- {"group0F73", GROUP, 0, 0, 0 },
- {"pcmpeqb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pcmpeqw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pcmpeqd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"emms", 0, 0, 0, 0 },
- {"vmread", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"vmwrite", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "haddpd\0"
- "haddps\0"
- "???", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
- {"???\0"
- "hsubpd\0"
- "hsubps\0"
- "???", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
+ "pshufd\0"
+ "pshuflw\0"
+ "pshufhw", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, PARAM_I8 },
+ {"group0F71", GROUP, 0, 0, 0 },
+ {"group0F72", GROUP, 0, 0, 0 },
+ {"group0F73", GROUP, 0, 0, 0 },
+ {"pcmpeqb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pcmpeqw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pcmpeqd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"emms", 0, 0, 0, 0 },
+ {"vmread", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"vmwrite", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "haddpd\0"
+ "haddps\0"
+ "???", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
+ {"???\0"
+ "hsubpd\0"
+ "hsubps\0"
+ "???", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
{"movd\0"
- "movd\0"
- "???\0"
- "movq", MODRM|VAR_NAME4,PARAM_RM, PARAM_MMX, 0 },
+ "movd\0"
+ "???\0"
+ "movq", MODRM|VAR_NAME4,PARAM_RM, PARAM_MMX, 0 },
{"movq\0"
- "movdqa\0"
- "???\0"
- "movdqu", MODRM|VAR_NAME4,PARAM_MMXM, PARAM_MMX, 0 },
+ "movdqa\0"
+ "???\0"
+ "movdqu", MODRM|VAR_NAME4,PARAM_MMXM, PARAM_MMX, 0 },
// 0x80
- {"jo", 0, PARAM_REL, 0, 0 },
- {"jno", 0, PARAM_REL, 0, 0 },
- {"jb", 0, PARAM_REL, 0, 0 },
- {"jae", 0, PARAM_REL, 0, 0 },
- {"je", 0, PARAM_REL, 0, 0 },
- {"jne", 0, PARAM_REL, 0, 0 },
- {"jbe", 0, PARAM_REL, 0, 0 },
- {"ja", 0, PARAM_REL, 0, 0 },
- {"js", 0, PARAM_REL, 0, 0 },
- {"jns", 0, PARAM_REL, 0, 0 },
- {"jp", 0, PARAM_REL, 0, 0 },
- {"jnp", 0, PARAM_REL, 0, 0 },
- {"jl", 0, PARAM_REL, 0, 0 },
- {"jge", 0, PARAM_REL, 0, 0 },
- {"jle", 0, PARAM_REL, 0, 0 },
- {"jg", 0, PARAM_REL, 0, 0 },
+ {"jo", 0, PARAM_REL, 0, 0 },
+ {"jno", 0, PARAM_REL, 0, 0 },
+ {"jb", 0, PARAM_REL, 0, 0 },
+ {"jae", 0, PARAM_REL, 0, 0 },
+ {"je", 0, PARAM_REL, 0, 0 },
+ {"jne", 0, PARAM_REL, 0, 0 },
+ {"jbe", 0, PARAM_REL, 0, 0 },
+ {"ja", 0, PARAM_REL, 0, 0 },
+ {"js", 0, PARAM_REL, 0, 0 },
+ {"jns", 0, PARAM_REL, 0, 0 },
+ {"jp", 0, PARAM_REL, 0, 0 },
+ {"jnp", 0, PARAM_REL, 0, 0 },
+ {"jl", 0, PARAM_REL, 0, 0 },
+ {"jge", 0, PARAM_REL, 0, 0 },
+ {"jle", 0, PARAM_REL, 0, 0 },
+ {"jg", 0, PARAM_REL, 0, 0 },
// 0x90
- {"seto", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setno", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setb", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setae", MODRM, PARAM_RMPTR8, 0, 0 },
- {"sete", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setne", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setbe", MODRM, PARAM_RMPTR8, 0, 0 },
- {"seta", MODRM, PARAM_RMPTR8, 0, 0 },
- {"sets", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setns", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setp", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setnp", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setl", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setge", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setle", MODRM, PARAM_RMPTR8, 0, 0 },
- {"setg", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"seto", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setno", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setb", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setae", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"sete", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setne", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setbe", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"seta", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"sets", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setns", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setp", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setnp", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setl", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setge", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setle", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"setg", MODRM, PARAM_RMPTR8, 0, 0 },
// 0xa0
- {"push fs", 0, 0, 0, 0 },
- {"pop fs", 0, 0, 0, 0 },
- {"cpuid", 0, 0, 0, 0 },
- {"bt", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"shld", MODRM, PARAM_RM, PARAM_REG, PARAM_I8 },
- {"shld", MODRM, PARAM_RM, PARAM_REG, PARAM_CL },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"push gs", 0, 0, 0, 0 },
- {"pop gs", 0, 0, 0, 0 },
- {"rsm", 0, 0, 0, 0 },
- {"bts", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"shrd", MODRM, PARAM_RM, PARAM_REG, PARAM_I8 },
- {"shrd", MODRM, PARAM_RM, PARAM_REG, PARAM_CL },
- {"group0FAE", GROUP, 0, 0, 0 },
- {"imul", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"push fs", 0, 0, 0, 0 },
+ {"pop fs", 0, 0, 0, 0 },
+ {"cpuid", 0, 0, 0, 0 },
+ {"bt", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"shld", MODRM, PARAM_RM, PARAM_REG, PARAM_I8 },
+ {"shld", MODRM, PARAM_RM, PARAM_REG, PARAM_CL },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"push gs", 0, 0, 0, 0 },
+ {"pop gs", 0, 0, 0, 0 },
+ {"rsm", 0, 0, 0, 0 },
+ {"bts", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"shrd", MODRM, PARAM_RM, PARAM_REG, PARAM_I8 },
+ {"shrd", MODRM, PARAM_RM, PARAM_REG, PARAM_CL },
+ {"group0FAE", GROUP, 0, 0, 0 },
+ {"imul", MODRM, PARAM_REG, PARAM_RM, 0 },
// 0xb0
- {"cmpxchg", MODRM, PARAM_RM8, PARAM_REG, 0 },
- {"cmpxchg", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"lss", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"btr", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"lfs", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"lgs", MODRM, PARAM_REG, PARAM_RM, 0 },
- {"movzx", MODRM, PARAM_REG, PARAM_RMPTR8, 0 },
- {"movzx", MODRM, PARAM_REG, PARAM_RMPTR16, 0 },
- {"???\0"
- "???\0"
- "???\0"
- "popcnt", MODRM|VAR_NAME4, PARAM_REG, PARAM_RM16, 0 },
- {"ud2", 0, 0, 0, 0 },
- {"group0FBA", GROUP, 0, 0, 0 },
- {"btc", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"cmpxchg", MODRM, PARAM_RM8, PARAM_REG, 0 },
+ {"cmpxchg", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"lss", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"btr", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"lfs", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"lgs", MODRM, PARAM_REG, PARAM_RM, 0 },
+ {"movzx", MODRM, PARAM_REG, PARAM_RMPTR8, 0 },
+ {"movzx", MODRM, PARAM_REG, PARAM_RMPTR16, 0 },
+ {"???\0"
+ "???\0"
+ "???\0"
+ "popcnt", MODRM|VAR_NAME4, PARAM_REG, PARAM_RM16, 0 },
+ {"ud2", 0, 0, 0, 0 },
+ {"group0FBA", GROUP, 0, 0, 0 },
+ {"btc", MODRM, PARAM_RM, PARAM_REG, 0 },
{"bsf\0"
- "???\0"
- "???\0"
- "tzcnt", MODRM|VAR_NAME4, PARAM_REG, PARAM_RM, 0 },
+ "???\0"
+ "???\0"
+ "tzcnt", MODRM|VAR_NAME4, PARAM_REG, PARAM_RM, 0 },
{"bsr\0"
- "???\0"
- "???\0"
- "lzcnt", MODRM|VAR_NAME4, PARAM_REG, PARAM_RM, 0, DASMFLAG_STEP_OVER},
- {"movsx", MODRM, PARAM_REG, PARAM_RMPTR8, 0 },
- {"movsx", MODRM, PARAM_REG, PARAM_RMPTR16, 0 },
+ "???\0"
+ "???\0"
+ "lzcnt", MODRM|VAR_NAME4, PARAM_REG, PARAM_RM, 0, DASMFLAG_STEP_OVER},
+ {"movsx", MODRM, PARAM_REG, PARAM_RMPTR8, 0 },
+ {"movsx", MODRM, PARAM_REG, PARAM_RMPTR16, 0 },
// 0xc0
- {"xadd", MODRM, PARAM_RM8, PARAM_REG, 0 },
- {"xadd", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"xadd", MODRM, PARAM_RM8, PARAM_REG, 0 },
+ {"xadd", MODRM, PARAM_RM, PARAM_REG, 0 },
{"cmpps\0"
- "cmppd\0"
- "cmpsd\0"
- "cmpss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
- {"movnti", MODRM, PARAM_RM, PARAM_REG, 0 },
- {"pinsrw", MODRM, PARAM_MMX, PARAM_MMXM, PARAM_I8 },
- {"pextrw", MODRM, PARAM_MMX, PARAM_MMXM, PARAM_I8 },
+ "cmppd\0"
+ "cmpsd\0"
+ "cmpss", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ {"movnti", MODRM, PARAM_RM, PARAM_REG, 0 },
+ {"pinsrw", MODRM, PARAM_MMX, PARAM_MMXM, PARAM_I8 },
+ {"pextrw", MODRM, PARAM_MMX, PARAM_MMXM, PARAM_I8 },
{"shufps\0"
- "shufpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, PARAM_I8 },
- {"group0FC7", GROUP, 0, 0, 0 },
- {"bswap", 0, PARAM_EAX, 0, 0 },
- {"bswap", 0, PARAM_ECX, 0, 0 },
- {"bswap", 0, PARAM_EDX, 0, 0 },
- {"bswap", 0, PARAM_EBX, 0, 0 },
- {"bswap", 0, PARAM_ESP, 0, 0 },
- {"bswap", 0, PARAM_EBP, 0, 0 },
- {"bswap", 0, PARAM_ESI, 0, 0 },
- {"bswap", 0, PARAM_EDI, 0, 0 },
+ "shufpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, PARAM_I8 },
+ {"group0FC7", GROUP, 0, 0, 0 },
+ {"bswap", 0, PARAM_EAX, 0, 0 },
+ {"bswap", 0, PARAM_ECX, 0, 0 },
+ {"bswap", 0, PARAM_EDX, 0, 0 },
+ {"bswap", 0, PARAM_EBX, 0, 0 },
+ {"bswap", 0, PARAM_ESP, 0, 0 },
+ {"bswap", 0, PARAM_EBP, 0, 0 },
+ {"bswap", 0, PARAM_ESI, 0, 0 },
+ {"bswap", 0, PARAM_EDI, 0, 0 },
// 0xd0
{"???\0"
- "addsubpd\0"
- "addsubps\0"
- "???\0", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
- {"psrlw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psrld", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psrlq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pmullw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"???\0"
- "movq\0"
- "movdq2q\0"
- "movq2dq", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
- {"pmovmskb", MODRM, PARAM_REG3264, PARAM_MMXM, 0 },
- {"psubusb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psubusw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pminub", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pand", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddusb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddusw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pmaxub", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pandn", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ "addsubpd\0"
+ "addsubps\0"
+ "???\0", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ {"psrlw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psrld", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psrlq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmullw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"???\0"
+ "movq\0"
+ "movdq2q\0"
+ "movq2dq", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmovmskb", MODRM, PARAM_REG3264, PARAM_MMXM, 0 },
+ {"psubusb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psubusw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pminub", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pand", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddusb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddusw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmaxub", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pandn", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
// 0xe0
- {"pavgb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psraw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psrad", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pavgw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pmulhuw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pmulhw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"???\0"
- "cvttpd2dq\0"
- "cvtpd2dq\0"
- "cvtdq2pd", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ {"pavgb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psraw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psrad", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pavgw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmulhuw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmulhw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"???\0"
+ "cvttpd2dq\0"
+ "cvtpd2dq\0"
+ "cvtdq2pd", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
{"movntq\0"
- "movntdq\0"
- "???\0"
- "???\0", MODRM|VAR_NAME4, PARAM_M64, PARAM_MMX, 0 },
- {"psubsb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psubsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pminsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"por", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddsb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pmaxsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pxor", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ "movntdq\0"
+ "???\0"
+ "???\0", MODRM|VAR_NAME4, PARAM_M64, PARAM_MMX, 0 },
+ {"psubsb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psubsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pminsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"por", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddsb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmaxsw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pxor", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
// 0xf0
{"???\0"
- "???\0"
- "lddqu\0"
- "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
- {"psllw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pslld", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psllq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pmuludq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"pmaddwd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psadbw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ "???\0"
+ "lddqu\0"
+ "???", MODRM|VAR_NAME4,PARAM_XMM, PARAM_XMMM, 0 },
+ {"psllw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pslld", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psllq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmuludq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"pmaddwd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psadbw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
{"maskmovq\0"
- "maskmovdqu\0"
- "???\0"
- "???", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
- {"psubb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psubw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psubd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"psubq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"paddd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
- {"???", 0, 0, 0, 0 }
+ "maskmovdqu\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4,PARAM_MMX, PARAM_MMXM, 0 },
+ {"psubb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psubw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psubd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"psubq", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddb", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddw", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"paddd", MODRM, PARAM_MMX, PARAM_MMXM, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE i386_opcode_table0F38[256] =
{
// 0x00
{"pshufb\0"
- "pshufb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pshufb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"phaddw\0"
- "phaddw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "phaddw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"phaddd\0"
- "phadd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "phadd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"phaddsw\0"
- "phaddsw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "phaddsw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"pmaddubsw\0"
- "pmaddubsw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pmaddubsw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"phsubw\0"
- "phsubw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "phsubw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"phsubd\0"
- "phsubd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "phsubd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"phsubsw\0"
- "phsubsw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "phsubsw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"psignb\0"
- "psignb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "psignb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"psignw\0"
- "psignw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "psignw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"psignd\0"
- "psignd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "psignd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"pmulhrsw\0"
- "pmulhrsw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "pmulhrsw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x10
{"???\0"
- "pblendvb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_XMM0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "blendvps\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_XMM0 },
- {"???\0"
- "blendvpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_XMM0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "ptest\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "pblendvb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_XMM0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "blendvps\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_XMM0 },
+ {"???\0"
+ "blendvpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_XMM0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "ptest\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
{"pabsb\0"
- "pabsb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pabsb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"pabsw\0"
- "pabsw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pabsw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"pabsd\0"
- "pabsd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???", 0, 0, 0, 0 },
+ "pabsd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x20
{"???\0"
- "pmovsxbw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
- {"???\0"
- "pmovsxbd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
- {"???\0"
- "pmovsxbq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM16, 0 },
- {"???\0"
- "pmovsxwd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
- {"???\0"
- "pmovsxwq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
- {"???\0"
- "pmovsxdq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "pmuldq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "pcmpeqq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "movntdqa\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "packusdw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "pmovsxbw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
+ {"???\0"
+ "pmovsxbd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
+ {"???\0"
+ "pmovsxbq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM16, 0 },
+ {"???\0"
+ "pmovsxwd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
+ {"???\0"
+ "pmovsxwq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
+ {"???\0"
+ "pmovsxdq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "pmuldq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "pcmpeqq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "movntdqa\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "packusdw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x30
{"???\0"
- "pmovzxbw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
+ "pmovzxbw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
{"???\0"
- "pmovzxbd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
+ "pmovzxbd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
{"???\0"
- "pmovzxbq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM16, 0 },
+ "pmovzxbq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM16, 0 },
{"???\0"
- "pmovzxwd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
+ "pmovzxwd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
{"???\0"
- "pmovzxwq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
+ "pmovzxwq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM32, 0 },
{"???\0"
- "pmovzxdq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
- {"???", 0, 0, 0, 0 },
+ "pmovzxdq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMM64, 0 },
+ {"???", 0, 0, 0, 0 },
{"???\0"
- "pcmpgtq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pcmpgtq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pminsb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pminsb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pminsd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pminsd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pminuw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pminuw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pminud\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pminud\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pmaxsb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pmaxsb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pmaxsd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pmaxsd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pmaxuw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pmaxuw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
{"???\0"
- "pmaxud\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ "pmaxud\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
// 0x40
{"???\0"
- "pmulld\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "phminposuw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "pmulld\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "phminposuw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x50
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x60
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x70
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x80
{"???\0"
- "invept\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_XMMM, 0 },
- {"???\0"
- "invvpid\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_XMMM, 0 },
- {"???\0"
- "invpcid\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_XMMM, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "invept\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_XMMM, 0 },
+ {"???\0"
+ "invvpid\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_XMMM, 0 },
+ {"???\0"
+ "invpcid\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_XMMM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x90
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xa0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xb0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xc0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xd0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "aesimc\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "aesenc\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "aesenclast\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "aesdec\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
- {"???\0"
- "aesdeclast\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "aesimc\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "aesenc\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "aesenclast\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "aesdec\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
+ {"???\0"
+ "aesdeclast\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, 0 },
// 0xe0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xf0
{"movbe\0"
- "???\0"
- "crc32\0"
- "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_RMPTR, 0 }, // not quite correct
+ "???\0"
+ "crc32\0"
+ "???", MODRM|VAR_NAME4, PARAM_REG32, PARAM_RMPTR, 0 }, // not quite correct
{"movbe\0"
- "???\0"
- "crc32\0"
- "???", MODRM|VAR_NAME4, PARAM_RMPTR, PARAM_REG32, 0 }, // not quite correct
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "???\0"
+ "crc32\0"
+ "???", MODRM|VAR_NAME4, PARAM_RMPTR, PARAM_REG32, 0 }, // not quite correct
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
};
static const I386_OPCODE i386_opcode_table0F3A[256] =
{
// 0x00
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "roundps\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "roundpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "roundss\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "roundsd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "blendps\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "blendpd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "pblendw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "roundps\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "roundpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "roundss\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "roundsd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "blendps\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "blendpd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "pblendw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
{"palignr\0"
- "palignr\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ "palignr\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
// 0x10
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "pextrb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_RM8, PARAM_XMM, PARAM_UI8 },
- {"???\0"
- "pextrw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_RM16, PARAM_XMM, PARAM_UI8 },
- {"???\0"
- "pextrd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_RM8, PARAM_XMM, PARAM_UI8 },
- {"???\0"
- "extractps\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_RM32, PARAM_XMM, PARAM_UI8 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "pextrb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_RM8, PARAM_XMM, PARAM_UI8 },
+ {"???\0"
+ "pextrw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_RM16, PARAM_XMM, PARAM_UI8 },
+ {"???\0"
+ "pextrd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_RM8, PARAM_XMM, PARAM_UI8 },
+ {"???\0"
+ "extractps\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_RM32, PARAM_XMM, PARAM_UI8 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x20
{"???\0"
- "pinsrb\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_RM8, PARAM_UI8 },
- {"???\0"
- "insertps\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_RM8, PARAM_UI8 },
- {"???\0"
- "pinsrd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_RM32, PARAM_UI8 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "pinsrb\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_RM8, PARAM_UI8 },
+ {"???\0"
+ "insertps\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_RM8, PARAM_UI8 },
+ {"???\0"
+ "pinsrd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_RM32, PARAM_UI8 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x30
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x40
{"???\0"
- "dpps\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "dppd\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "mpsadbw\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "pclmulqdq\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "dpps\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "dppd\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "mpsadbw\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "pclmulqdq\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x50
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x60
{"???\0"
- "pcmestrm\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "pcmestri\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "pcmistrm\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???\0"
- "pcmistri\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ "pcmestrm\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "pcmestri\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "pcmistrm\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???\0"
+ "pcmistri\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x70
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x80
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x90
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xa0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xb0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xc0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xd0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???\0"
- "aeskeygenassist\0"
- "???\0"
- "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???\0"
+ "aeskeygenassist\0"
+ "???\0"
+ "???", MODRM|VAR_NAME4, PARAM_XMM, PARAM_XMMM, PARAM_UI8 },
// 0xe0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xf0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
};
static const I386_OPCODE group80_table[8] =
{
- {"add", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"or", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"adc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"sbb", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"and", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"sub", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"xor", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"cmp", 0, PARAM_RMPTR8, PARAM_I8, 0 }
+ {"add", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"or", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"adc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"sbb", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"and", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"sub", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"xor", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"cmp", 0, PARAM_RMPTR8, PARAM_I8, 0 }
};
static const I386_OPCODE group81_table[8] =
{
- {"add", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"or", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"adc", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"sbb", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"and", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"sub", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"xor", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"cmp", 0, PARAM_RMPTR, PARAM_IMM, 0 }
+ {"add", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"or", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"adc", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"sbb", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"and", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"sub", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"xor", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"cmp", 0, PARAM_RMPTR, PARAM_IMM, 0 }
};
static const I386_OPCODE group83_table[8] =
{
- {"add", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"or", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"adc", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"sbb", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"and", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"sub", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"xor", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"cmp", 0, PARAM_RMPTR, PARAM_I8, 0 }
+ {"add", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"or", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"adc", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"sbb", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"and", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"sub", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"xor", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"cmp", 0, PARAM_RMPTR, PARAM_I8, 0 }
};
static const I386_OPCODE groupC0_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"rcl", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"rcr", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"sal", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"sar", 0, PARAM_RMPTR8, PARAM_I8, 0 }
+ {"rol", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"ror", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"rcl", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"rcr", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"shl", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"shr", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"sal", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"sar", 0, PARAM_RMPTR8, PARAM_I8, 0 }
};
static const I386_OPCODE groupC1_table[8] =
{
- {"rol", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"ror", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"rcl", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"rcr", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"shl", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"shr", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"sal", 0, PARAM_RMPTR, PARAM_I8, 0 },
- {"sar", 0, PARAM_RMPTR, PARAM_I8, 0 }
+ {"rol", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"ror", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"rcl", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"rcr", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"shl", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"shr", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"sal", 0, PARAM_RMPTR, PARAM_I8, 0 },
+ {"sar", 0, PARAM_RMPTR, PARAM_I8, 0 }
};
static const I386_OPCODE groupD0_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"rcl", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"rcr", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"sal", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"sar", 0, PARAM_RMPTR8, PARAM_1, 0 }
+ {"rol", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"ror", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"rcl", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"rcr", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"shl", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"shr", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"sal", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"sar", 0, PARAM_RMPTR8, PARAM_1, 0 }
};
static const I386_OPCODE groupD1_table[8] =
{
- {"rol", 0, PARAM_RMPTR, PARAM_1, 0 },
- {"ror", 0, PARAM_RMPTR, PARAM_1, 0 },
- {"rcl", 0, PARAM_RMPTR, PARAM_1, 0 },
- {"rcr", 0, PARAM_RMPTR, PARAM_1, 0 },
- {"shl", 0, PARAM_RMPTR, PARAM_1, 0 },
- {"shr", 0, PARAM_RMPTR, PARAM_1, 0 },
- {"sal", 0, PARAM_RMPTR, PARAM_1, 0 },
- {"sar", 0, PARAM_RMPTR, PARAM_1, 0 }
+ {"rol", 0, PARAM_RMPTR, PARAM_1, 0 },
+ {"ror", 0, PARAM_RMPTR, PARAM_1, 0 },
+ {"rcl", 0, PARAM_RMPTR, PARAM_1, 0 },
+ {"rcr", 0, PARAM_RMPTR, PARAM_1, 0 },
+ {"shl", 0, PARAM_RMPTR, PARAM_1, 0 },
+ {"shr", 0, PARAM_RMPTR, PARAM_1, 0 },
+ {"sal", 0, PARAM_RMPTR, PARAM_1, 0 },
+ {"sar", 0, PARAM_RMPTR, PARAM_1, 0 }
};
static const I386_OPCODE groupD2_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"rcl", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"rcr", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"sal", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"sar", 0, PARAM_RMPTR8, PARAM_CL, 0 }
+ {"rol", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"ror", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"rcl", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"rcr", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"shl", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"shr", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"sal", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"sar", 0, PARAM_RMPTR8, PARAM_CL, 0 }
};
static const I386_OPCODE groupD3_table[8] =
{
- {"rol", 0, PARAM_RMPTR, PARAM_CL, 0 },
- {"ror", 0, PARAM_RMPTR, PARAM_CL, 0 },
- {"rcl", 0, PARAM_RMPTR, PARAM_CL, 0 },
- {"rcr", 0, PARAM_RMPTR, PARAM_CL, 0 },
- {"shl", 0, PARAM_RMPTR, PARAM_CL, 0 },
- {"shr", 0, PARAM_RMPTR, PARAM_CL, 0 },
- {"sal", 0, PARAM_RMPTR, PARAM_CL, 0 },
- {"sar", 0, PARAM_RMPTR, PARAM_CL, 0 }
+ {"rol", 0, PARAM_RMPTR, PARAM_CL, 0 },
+ {"ror", 0, PARAM_RMPTR, PARAM_CL, 0 },
+ {"rcl", 0, PARAM_RMPTR, PARAM_CL, 0 },
+ {"rcr", 0, PARAM_RMPTR, PARAM_CL, 0 },
+ {"shl", 0, PARAM_RMPTR, PARAM_CL, 0 },
+ {"shr", 0, PARAM_RMPTR, PARAM_CL, 0 },
+ {"sal", 0, PARAM_RMPTR, PARAM_CL, 0 },
+ {"sar", 0, PARAM_RMPTR, PARAM_CL, 0 }
};
static const I386_OPCODE groupF6_table[8] =
{
- {"test", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"test", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"not", 0, PARAM_RMPTR8, 0, 0 },
- {"neg", 0, PARAM_RMPTR8, 0, 0 },
- {"mul", 0, PARAM_RMPTR8, 0, 0 },
- {"imul", 0, PARAM_RMPTR8, 0, 0 },
- {"div", 0, PARAM_RMPTR8, 0, 0 },
- {"idiv", 0, PARAM_RMPTR8, 0, 0 }
+ {"test", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"test", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"not", 0, PARAM_RMPTR8, 0, 0 },
+ {"neg", 0, PARAM_RMPTR8, 0, 0 },
+ {"mul", 0, PARAM_RMPTR8, 0, 0 },
+ {"imul", 0, PARAM_RMPTR8, 0, 0 },
+ {"div", 0, PARAM_RMPTR8, 0, 0 },
+ {"idiv", 0, PARAM_RMPTR8, 0, 0 }
};
static const I386_OPCODE groupF7_table[8] =
{
- {"test", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"test", 0, PARAM_RMPTR, PARAM_IMM, 0 },
- {"not", 0, PARAM_RMPTR, 0, 0 },
- {"neg", 0, PARAM_RMPTR, 0, 0 },
- {"mul", 0, PARAM_RMPTR, 0, 0 },
- {"imul", 0, PARAM_RMPTR, 0, 0 },
- {"div", 0, PARAM_RMPTR, 0, 0 },
- {"idiv", 0, PARAM_RMPTR, 0, 0 }
+ {"test", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"test", 0, PARAM_RMPTR, PARAM_IMM, 0 },
+ {"not", 0, PARAM_RMPTR, 0, 0 },
+ {"neg", 0, PARAM_RMPTR, 0, 0 },
+ {"mul", 0, PARAM_RMPTR, 0, 0 },
+ {"imul", 0, PARAM_RMPTR, 0, 0 },
+ {"div", 0, PARAM_RMPTR, 0, 0 },
+ {"idiv", 0, PARAM_RMPTR, 0, 0 }
};
static const I386_OPCODE groupFE_table[8] =
{
- {"inc", 0, PARAM_RMPTR8, 0, 0 },
- {"dec", 0, PARAM_RMPTR8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {"inc", 0, PARAM_RMPTR8, 0, 0 },
+ {"dec", 0, PARAM_RMPTR8, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE groupFF_table[8] =
{
- {"inc", 0, PARAM_RMPTR, 0, 0 },
- {"dec", 0, PARAM_RMPTR, 0, 0 },
- {"call", ALWAYS64, PARAM_RMPTR, 0, 0, DASMFLAG_STEP_OVER},
- {"call far ptr ",0, PARAM_RM, 0, 0, DASMFLAG_STEP_OVER},
- {"jmp", ALWAYS64, PARAM_RMPTR, 0, 0 },
- {"jmp far ptr ",0, PARAM_RM, 0, 0 },
- {"push", 0, PARAM_RMPTR, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {"inc", 0, PARAM_RMPTR, 0, 0 },
+ {"dec", 0, PARAM_RMPTR, 0, 0 },
+ {"call", ALWAYS64, PARAM_RMPTR, 0, 0, DASMFLAG_STEP_OVER},
+ {"call far ptr ",0, PARAM_RM, 0, 0, DASMFLAG_STEP_OVER},
+ {"jmp", ALWAYS64, PARAM_RMPTR, 0, 0 },
+ {"jmp far ptr ",0, PARAM_RM, 0, 0 },
+ {"push", 0, PARAM_RMPTR, 0, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE group0F00_table[8] =
{
- {"sldt", 0, PARAM_RM, 0, 0 },
- {"str", 0, PARAM_RM, 0, 0 },
- {"lldt", 0, PARAM_RM, 0, 0 },
- {"ltr", 0, PARAM_RM, 0, 0 },
- {"verr", 0, PARAM_RM, 0, 0 },
- {"verw", 0, PARAM_RM, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {"sldt", 0, PARAM_RM, 0, 0 },
+ {"str", 0, PARAM_RM, 0, 0 },
+ {"lldt", 0, PARAM_RM, 0, 0 },
+ {"ltr", 0, PARAM_RM, 0, 0 },
+ {"verr", 0, PARAM_RM, 0, 0 },
+ {"verw", 0, PARAM_RM, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE group0F01_table[8] =
{
- {"sgdt", 0, PARAM_RM, 0, 0 },
- {"sidt", 0, PARAM_RM, 0, 0 },
- {"lgdt", 0, PARAM_RM, 0, 0 },
- {"lidt", 0, PARAM_RM, 0, 0 },
- {"smsw", 0, PARAM_RM, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"lmsw", 0, PARAM_RM, 0, 0 },
- {"invlpg", 0, PARAM_RM, 0, 0 }
+ {"sgdt", 0, PARAM_RM, 0, 0 },
+ {"sidt", 0, PARAM_RM, 0, 0 },
+ {"lgdt", 0, PARAM_RM, 0, 0 },
+ {"lidt", 0, PARAM_RM, 0, 0 },
+ {"smsw", 0, PARAM_RM, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"lmsw", 0, PARAM_RM, 0, 0 },
+ {"invlpg", 0, PARAM_RM, 0, 0 }
};
static const I386_OPCODE group0F0D_table[8] =
{
- {"prefetch", 0, PARAM_RM8, 0, 0 },
- {"prefetchw", 0, PARAM_RM8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {"prefetch", 0, PARAM_RM8, 0, 0 },
+ {"prefetchw", 0, PARAM_RM8, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE group0F18_table[8] =
{
- {"prefetchnta", 0, PARAM_RM8, 0, 0 },
- {"prefetch0", 0, PARAM_RM8, 0, 0 },
- {"prefetch1", 0, PARAM_RM8, 0, 0 },
- {"prefetch2", 0, PARAM_RM8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {"prefetchnta", 0, PARAM_RM8, 0, 0 },
+ {"prefetch0", 0, PARAM_RM8, 0, 0 },
+ {"prefetch1", 0, PARAM_RM8, 0, 0 },
+ {"prefetch2", 0, PARAM_RM8, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE group0F71_table[8] =
{
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"psrlw", 0, PARAM_MMX, PARAM_I8, 0 },
- {"???", 0, 0, 0, 0 },
- {"psraw", 0, PARAM_MMX, PARAM_I8, 0 },
- {"???", 0, 0, 0, 0 },
- {"psllw", 0, PARAM_MMX, PARAM_I8, 0 },
- {"???", 0, 0, 0, 0 }
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"psrlw", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"psraw", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"psllw", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE group0F72_table[8] =
{
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"psrld", 0, PARAM_MMX, PARAM_I8, 0 },
- {"psrldq", 0, PARAM_MMX, PARAM_I8, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"pslld", 0, PARAM_MMX, PARAM_I8, 0 },
- {"pslldq", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"psrld", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"psrldq", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"pslld", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"pslldq", 0, PARAM_MMX, PARAM_I8, 0 },
};
static const I386_OPCODE group0F73_table[8] =
{
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"psrlq", 0, PARAM_MMX, PARAM_I8, 0 },
- {"???", 0, 0, 0, 0 },
- {"psraq", 0, PARAM_MMX, PARAM_I8, 0 },
- {"???", 0, 0, 0, 0 },
- {"psllq", 0, PARAM_MMX, PARAM_I8, 0 },
- {"???", 0, 0, 0, 0 }
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"psrlq", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"psraq", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"psllq", 0, PARAM_MMX, PARAM_I8, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE group0FAE_table[8] =
{
- {"fxsave", 0, PARAM_RM, 0, 0 },
- {"fxrstor", 0, PARAM_RM, 0, 0 },
- {"ldmxcsr", 0, PARAM_RM, 0, 0 },
- {"stmxscr", 0, PARAM_RM, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"lfence", 0, 0, 0, 0 },
- {"mfence", 0, 0, 0, 0 },
- {"sfence", 0, 0, 0, 0 }
+ {"fxsave", 0, PARAM_RM, 0, 0 },
+ {"fxrstor", 0, PARAM_RM, 0, 0 },
+ {"ldmxcsr", 0, PARAM_RM, 0, 0 },
+ {"stmxscr", 0, PARAM_RM, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"lfence", 0, 0, 0, 0 },
+ {"mfence", 0, 0, 0, 0 },
+ {"sfence", 0, 0, 0, 0 }
};
static const I386_OPCODE group0FBA_table[8] =
{
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"bt", 0, PARAM_RM, PARAM_I8, 0 },
- {"bts", 0, PARAM_RM, PARAM_I8, 0 },
- {"btr", 0, PARAM_RM, PARAM_I8, 0 },
- {"btc", 0, PARAM_RM, PARAM_I8, 0 }
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"bt", 0, PARAM_RM, PARAM_I8, 0 },
+ {"bts", 0, PARAM_RM, PARAM_I8, 0 },
+ {"btr", 0, PARAM_RM, PARAM_I8, 0 },
+ {"btc", 0, PARAM_RM, PARAM_I8, 0 }
};
static const I386_OPCODE group0FC7_table[8] =
{
- {"???", 0, 0, 0, 0 },
- {"cmpxchg8b", MODRM, PARAM_M64PTR, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"cmpxchg8b", MODRM, PARAM_M64PTR, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
{"vmptrld\0"
- "vmclear\0"
- "???\0"
- "vmxon", MODRM|VAR_NAME4, PARAM_M64PTR, 0, 0 },
- {"vmptrtst", MODRM, PARAM_M64PTR, 0, 0 }
+ "vmclear\0"
+ "???\0"
+ "vmxon", MODRM|VAR_NAME4, PARAM_M64PTR, 0, 0 },
+ {"vmptrtst", MODRM, PARAM_M64PTR, 0, 0 }
};
static const GROUP_OP group_op_table[] =
{
- { "group80", group80_table },
- { "group81", group81_table },
- { "group83", group83_table },
- { "groupC0", groupC0_table },
- { "groupC1", groupC1_table },
- { "groupD0", groupD0_table },
- { "groupD1", groupD1_table },
- { "groupD2", groupD2_table },
- { "groupD3", groupD3_table },
- { "groupF6", groupF6_table },
- { "groupF7", groupF7_table },
- { "groupFE", groupFE_table },
- { "groupFF", groupFF_table },
- { "group0F00", group0F00_table },
- { "group0F01", group0F01_table },
- { "group0F0D", group0F0D_table },
- { "group0F18", group0F18_table },
- { "group0F71", group0F71_table },
- { "group0F72", group0F72_table },
- { "group0F73", group0F73_table },
- { "group0FAE", group0FAE_table },
- { "group0FBA", group0FBA_table },
- { "group0FC7", group0FC7_table }
+ { "group80", group80_table },
+ { "group81", group81_table },
+ { "group83", group83_table },
+ { "groupC0", groupC0_table },
+ { "groupC1", groupC1_table },
+ { "groupD0", groupD0_table },
+ { "groupD1", groupD1_table },
+ { "groupD2", groupD2_table },
+ { "groupD3", groupD3_table },
+ { "groupF6", groupF6_table },
+ { "groupF7", groupF7_table },
+ { "groupFE", groupFE_table },
+ { "groupFF", groupFF_table },
+ { "group0F00", group0F00_table },
+ { "group0F01", group0F01_table },
+ { "group0F0D", group0F0D_table },
+ { "group0F18", group0F18_table },
+ { "group0F71", group0F71_table },
+ { "group0F72", group0F72_table },
+ { "group0F73", group0F73_table },
+ { "group0FAE", group0FAE_table },
+ { "group0FBA", group0FBA_table },
+ { "group0FC7", group0FC7_table }
};
@@ -1948,8 +1948,8 @@ static UINT8 rex, regex, sibex, rmex;
static UINT8 pre0f;
static UINT8 curmode;
-#define MODRM_REG1 ((modrm >> 3) & 0x7)
-#define MODRM_REG2 (modrm & 0x7)
+#define MODRM_REG1 ((modrm >> 3) & 0x7)
+#define MODRM_REG2 (modrm & 0x7)
INLINE UINT8 FETCH(void)
{
@@ -2472,11 +2472,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
{
switch (op1 & 0x7)
{
- case 0: // Group D8
+ case 0: // Group D8
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -2508,11 +2508,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 1: // Group D9
+ case 1: // Group D9
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -2572,11 +2572,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 2: // Group DA
+ case 2: // Group DA
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -2616,11 +2616,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 3: // Group DB
+ case 3: // Group DB
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -2666,11 +2666,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 4: // Group DC
+ case 4: // Group DC
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -2713,11 +2713,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 5: // Group DD
+ case 5: // Group DD
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -2757,11 +2757,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 6: // Group DE
+ case 6: // Group DE
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -2806,11 +2806,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 7: // Group DF
+ case 7: // Group DF
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -3001,7 +3001,7 @@ int i386_dasm_one_ex(char *buffer, UINT64 eip, const UINT8 *oprom, int mode)
case 1: /* 8086/8088/80186/80188 */
address_size = 0;
operand_size = 0;
- max_length = 8; /* maximum without redundant prefixes - not enforced by chip */
+ max_length = 8; /* maximum without redundant prefixes - not enforced by chip */
break;
case 2: /* 80286 */
address_size = 0;
diff --git a/src/emu/cpu/i386/i386op16.c b/src/emu/cpu/i386/i386op16.c
index 46a9ec58f74..e009e6e6bcf 100644
--- a/src/emu/cpu/i386/i386op16.c
+++ b/src/emu/cpu/i386/i386op16.c
@@ -9,31 +9,31 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm16, 1 */
+ case 0: /* ROL rm16, 1 */
cpustate->CF = (src & 0x8000) ? 1 : 0;
dst = (src << 1) + cpustate->CF;
cpustate->OF = ((src ^ dst) & 0x8000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm16, 1 */
+ case 1: /* ROR rm16, 1 */
cpustate->CF = (src & 0x1) ? 1 : 0;
dst = (cpustate->CF << 15) | (src >> 1);
cpustate->OF = ((src ^ dst) & 0x8000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm16, 1 */
+ case 2: /* RCL rm16, 1 */
dst = (src << 1) + cpustate->CF;
cpustate->CF = (src & 0x8000) ? 1 : 0;
cpustate->OF = ((src ^ dst) & 0x8000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm16, 1 */
+ case 3: /* RCR rm16, 1 */
dst = (cpustate->CF << 15) | (src >> 1);
cpustate->CF = src & 0x1;
cpustate->OF = ((src ^ dst) & 0x8000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm16, 1 */
+ case 4: /* SHL/SAL rm16, 1 */
case 6:
dst = src << 1;
cpustate->CF = (src & 0x8000) ? 1 : 0;
@@ -41,14 +41,14 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
SetSZPF16(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm16, 1 */
+ case 5: /* SHR rm16, 1 */
dst = src >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = (dst & 0x8000) ? 1 : 0;
SetSZPF16(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm16, 1 */
+ case 7: /* SAR rm16, 1 */
dst = (INT16)(src) >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = 0;
@@ -60,7 +60,7 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm16, i8 */
+ case 0: /* ROL rm16, i8 */
if(!(shift & 15))
{
if(shift & 16)
@@ -72,12 +72,12 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
}
shift &= 15;
dst = ((src & ((UINT16)0xffff >> shift)) << shift) |
- ((src & ((UINT16)0xffff << (16-shift))) >> (16-shift));
+ ((src & ((UINT16)0xffff << (16-shift))) >> (16-shift));
cpustate->CF = dst & 0x1;
cpustate->OF = (dst & 1) ^ (dst >> 15);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm16, i8 */
+ case 1: /* ROR rm16, i8 */
if(!(shift & 15))
{
if(shift & 16)
@@ -89,30 +89,30 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
}
shift &= 15;
dst = ((src & ((UINT16)0xffff << shift)) >> shift) |
- ((src & ((UINT16)0xffff >> (16-shift))) << (16-shift));
+ ((src & ((UINT16)0xffff >> (16-shift))) << (16-shift));
cpustate->CF = (dst >> 15) & 1;
cpustate->OF = ((dst >> 15) ^ (dst >> 14)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm16, i8 */
+ case 2: /* RCL rm16, i8 */
shift %= 17;
dst = ((src & ((UINT16)0xffff >> shift)) << shift) |
- ((src & ((UINT16)0xffff << (17-shift))) >> (17-shift)) |
- (cpustate->CF << (shift-1));
+ ((src & ((UINT16)0xffff << (17-shift))) >> (17-shift)) |
+ (cpustate->CF << (shift-1));
if(shift) cpustate->CF = (src >> (16-shift)) & 0x1;
cpustate->OF = cpustate->CF ^ ((dst >> 15) & 1);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm16, i8 */
+ case 3: /* RCR rm16, i8 */
shift %= 17;
dst = ((src & ((UINT16)0xffff << shift)) >> shift) |
- ((src & ((UINT16)0xffff >> (16-shift))) << (17-shift)) |
- (cpustate->CF << (16-shift));
+ ((src & ((UINT16)0xffff >> (16-shift))) << (17-shift)) |
+ (cpustate->CF << (16-shift));
if(shift) cpustate->CF = (src >> (shift-1)) & 0x1;
cpustate->OF = ((dst >> 15) ^ (dst >> 14)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm16, i8 */
+ case 4: /* SHL/SAL rm16, i8 */
case 6:
shift &= 31;
dst = src << shift;
@@ -120,14 +120,14 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
SetSZPF16(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm16, i8 */
+ case 5: /* SHR rm16, i8 */
shift &= 31;
dst = src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF16(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm16, i8 */
+ case 7: /* SAR rm16, i8 */
shift &= 31;
dst = (INT16)src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
@@ -142,7 +142,7 @@ static UINT16 I386OP(shift_rotate16)(i386_state *cpustate, UINT8 modrm, UINT32 v
-static void I386OP(adc_rm16_r16)(i386_state *cpustate) // Opcode 0x11
+static void I386OP(adc_rm16_r16)(i386_state *cpustate) // Opcode 0x11
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -162,7 +162,7 @@ static void I386OP(adc_rm16_r16)(i386_state *cpustate) // Opcode 0x11
}
}
-static void I386OP(adc_r16_rm16)(i386_state *cpustate) // Opcode 0x13
+static void I386OP(adc_r16_rm16)(i386_state *cpustate) // Opcode 0x13
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -182,7 +182,7 @@ static void I386OP(adc_r16_rm16)(i386_state *cpustate) // Opcode 0x13
}
}
-static void I386OP(adc_ax_i16)(i386_state *cpustate) // Opcode 0x15
+static void I386OP(adc_ax_i16)(i386_state *cpustate) // Opcode 0x15
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -192,7 +192,7 @@ static void I386OP(adc_ax_i16)(i386_state *cpustate) // Opcode 0x15
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(add_rm16_r16)(i386_state *cpustate) // Opcode 0x01
+static void I386OP(add_rm16_r16)(i386_state *cpustate) // Opcode 0x01
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -212,7 +212,7 @@ static void I386OP(add_rm16_r16)(i386_state *cpustate) // Opcode 0x01
}
}
-static void I386OP(add_r16_rm16)(i386_state *cpustate) // Opcode 0x03
+static void I386OP(add_r16_rm16)(i386_state *cpustate) // Opcode 0x03
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -232,7 +232,7 @@ static void I386OP(add_r16_rm16)(i386_state *cpustate) // Opcode 0x03
}
}
-static void I386OP(add_ax_i16)(i386_state *cpustate) // Opcode 0x05
+static void I386OP(add_ax_i16)(i386_state *cpustate) // Opcode 0x05
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -242,7 +242,7 @@ static void I386OP(add_ax_i16)(i386_state *cpustate) // Opcode 0x05
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(and_rm16_r16)(i386_state *cpustate) // Opcode 0x21
+static void I386OP(and_rm16_r16)(i386_state *cpustate) // Opcode 0x21
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -262,7 +262,7 @@ static void I386OP(and_rm16_r16)(i386_state *cpustate) // Opcode 0x21
}
}
-static void I386OP(and_r16_rm16)(i386_state *cpustate) // Opcode 0x23
+static void I386OP(and_r16_rm16)(i386_state *cpustate) // Opcode 0x23
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -282,7 +282,7 @@ static void I386OP(and_r16_rm16)(i386_state *cpustate) // Opcode 0x23
}
}
-static void I386OP(and_ax_i16)(i386_state *cpustate) // Opcode 0x25
+static void I386OP(and_ax_i16)(i386_state *cpustate) // Opcode 0x25
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -292,7 +292,7 @@ static void I386OP(and_ax_i16)(i386_state *cpustate) // Opcode 0x25
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(bsf_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bc
+static void I386OP(bsf_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bc
{
UINT16 src, dst, temp;
UINT8 modrm = FETCH(cpustate);
@@ -321,7 +321,7 @@ static void I386OP(bsf_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bc
CYCLES(cpustate,CYCLES_BSF_BASE);
}
-static void I386OP(bsr_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bd
+static void I386OP(bsr_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bd
{
UINT16 src, dst, temp;
UINT8 modrm = FETCH(cpustate);
@@ -351,7 +351,7 @@ static void I386OP(bsr_r16_rm16)(i386_state *cpustate) // Opcode 0x0f bd
}
-static void I386OP(bt_rm16_r16)(i386_state *cpustate) // Opcode 0x0f a3
+static void I386OP(bt_rm16_r16)(i386_state *cpustate) // Opcode 0x0f a3
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -382,7 +382,7 @@ static void I386OP(bt_rm16_r16)(i386_state *cpustate) // Opcode 0x0f a3
}
}
-static void I386OP(btc_rm16_r16)(i386_state *cpustate) // Opcode 0x0f bb
+static void I386OP(btc_rm16_r16)(i386_state *cpustate) // Opcode 0x0f bb
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -417,7 +417,7 @@ static void I386OP(btc_rm16_r16)(i386_state *cpustate) // Opcode 0x0f bb
}
}
-static void I386OP(btr_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b3
+static void I386OP(btr_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b3
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -452,7 +452,7 @@ static void I386OP(btr_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b3
}
}
-static void I386OP(bts_rm16_r16)(i386_state *cpustate) // Opcode 0x0f ab
+static void I386OP(bts_rm16_r16)(i386_state *cpustate) // Opcode 0x0f ab
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -487,7 +487,7 @@ static void I386OP(bts_rm16_r16)(i386_state *cpustate) // Opcode 0x0f ab
}
}
-static void I386OP(call_abs16)(i386_state *cpustate) // Opcode 0x9a
+static void I386OP(call_abs16)(i386_state *cpustate) // Opcode 0x9a
{
UINT16 offset = FETCH16(cpustate);
UINT16 ptr = FETCH16(cpustate);
@@ -505,11 +505,11 @@ static void I386OP(call_abs16)(i386_state *cpustate) // Opcode 0x9a
cpustate->eip = offset;
i386_load_segment_descriptor(cpustate,CS);
}
- CYCLES(cpustate,CYCLES_CALL_INTERSEG); /* TODO: Timing = 17 + m */
+ CYCLES(cpustate,CYCLES_CALL_INTERSEG); /* TODO: Timing = 17 + m */
CHANGE_PC(cpustate,cpustate->eip);
}
-static void I386OP(call_rel16)(i386_state *cpustate) // Opcode 0xe8
+static void I386OP(call_rel16)(i386_state *cpustate) // Opcode 0xe8
{
INT16 disp = FETCH16(cpustate);
@@ -523,16 +523,16 @@ static void I386OP(call_rel16)(i386_state *cpustate) // Opcode 0xe8
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_CALL); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_CALL); /* TODO: Timing = 7 + m */
}
-static void I386OP(cbw)(i386_state *cpustate) // Opcode 0x98
+static void I386OP(cbw)(i386_state *cpustate) // Opcode 0x98
{
REG16(AX) = (INT16)((INT8)REG8(AL));
CYCLES(cpustate,CYCLES_CBW);
}
-static void I386OP(cmp_rm16_r16)(i386_state *cpustate) // Opcode 0x39
+static void I386OP(cmp_rm16_r16)(i386_state *cpustate) // Opcode 0x39
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -550,7 +550,7 @@ static void I386OP(cmp_rm16_r16)(i386_state *cpustate) // Opcode 0x39
}
}
-static void I386OP(cmp_r16_rm16)(i386_state *cpustate) // Opcode 0x3b
+static void I386OP(cmp_r16_rm16)(i386_state *cpustate) // Opcode 0x3b
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -568,7 +568,7 @@ static void I386OP(cmp_r16_rm16)(i386_state *cpustate) // Opcode 0x3b
}
}
-static void I386OP(cmp_ax_i16)(i386_state *cpustate) // Opcode 0x3d
+static void I386OP(cmp_ax_i16)(i386_state *cpustate) // Opcode 0x3d
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -577,7 +577,7 @@ static void I386OP(cmp_ax_i16)(i386_state *cpustate) // Opcode 0x3d
CYCLES(cpustate,CYCLES_CMP_IMM_ACC);
}
-static void I386OP(cmpsw)(i386_state *cpustate) // Opcode 0xa7
+static void I386OP(cmpsw)(i386_state *cpustate) // Opcode 0xa7
{
UINT32 eas, ead;
UINT16 src, dst;
@@ -595,7 +595,7 @@ static void I386OP(cmpsw)(i386_state *cpustate) // Opcode 0xa7
CYCLES(cpustate,CYCLES_CMPS);
}
-static void I386OP(cwd)(i386_state *cpustate) // Opcode 0x99
+static void I386OP(cwd)(i386_state *cpustate) // Opcode 0x99
{
if( REG16(AX) & 0x8000 ) {
REG16(DX) = 0xffff;
@@ -605,66 +605,66 @@ static void I386OP(cwd)(i386_state *cpustate) // Opcode 0x99
CYCLES(cpustate,CYCLES_CWD);
}
-static void I386OP(dec_ax)(i386_state *cpustate) // Opcode 0x48
+static void I386OP(dec_ax)(i386_state *cpustate) // Opcode 0x48
{
REG16(AX) = DEC16(cpustate, REG16(AX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_cx)(i386_state *cpustate) // Opcode 0x49
+static void I386OP(dec_cx)(i386_state *cpustate) // Opcode 0x49
{
REG16(CX) = DEC16(cpustate, REG16(CX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_dx)(i386_state *cpustate) // Opcode 0x4a
+static void I386OP(dec_dx)(i386_state *cpustate) // Opcode 0x4a
{
REG16(DX) = DEC16(cpustate, REG16(DX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_bx)(i386_state *cpustate) // Opcode 0x4b
+static void I386OP(dec_bx)(i386_state *cpustate) // Opcode 0x4b
{
REG16(BX) = DEC16(cpustate, REG16(BX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_sp)(i386_state *cpustate) // Opcode 0x4c
+static void I386OP(dec_sp)(i386_state *cpustate) // Opcode 0x4c
{
REG16(SP) = DEC16(cpustate, REG16(SP) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_bp)(i386_state *cpustate) // Opcode 0x4d
+static void I386OP(dec_bp)(i386_state *cpustate) // Opcode 0x4d
{
REG16(BP) = DEC16(cpustate, REG16(BP) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_si)(i386_state *cpustate) // Opcode 0x4e
+static void I386OP(dec_si)(i386_state *cpustate) // Opcode 0x4e
{
REG16(SI) = DEC16(cpustate, REG16(SI) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_di)(i386_state *cpustate) // Opcode 0x4f
+static void I386OP(dec_di)(i386_state *cpustate) // Opcode 0x4f
{
REG16(DI) = DEC16(cpustate, REG16(DI) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(imul_r16_rm16)(i386_state *cpustate) // Opcode 0x0f af
+static void I386OP(imul_r16_rm16)(i386_state *cpustate) // Opcode 0x0f af
{
UINT8 modrm = FETCH(cpustate);
INT32 result;
INT32 src, dst;
if( modrm >= 0xc0 ) {
src = (INT32)(INT16)LOAD_RM16(modrm);
- CYCLES(cpustate,CYCLES_IMUL16_REG_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_REG_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = (INT32)(INT16)READ16(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL16_REG_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_REG_MEM); /* TODO: Correct multiply timing */
}
dst = (INT32)(INT16)LOAD_REG16(modrm);
@@ -675,18 +675,18 @@ static void I386OP(imul_r16_rm16)(i386_state *cpustate) // Opcode 0x0f af
cpustate->CF = cpustate->OF = !(result == (INT32)(INT16)result);
}
-static void I386OP(imul_r16_rm16_i16)(i386_state *cpustate) // Opcode 0x69
+static void I386OP(imul_r16_rm16_i16)(i386_state *cpustate) // Opcode 0x69
{
UINT8 modrm = FETCH(cpustate);
INT32 result;
INT32 src, dst;
if( modrm >= 0xc0 ) {
dst = (INT32)(INT16)LOAD_RM16(modrm);
- CYCLES(cpustate,CYCLES_IMUL16_REG_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
dst = (INT32)(INT16)READ16(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL16_MEM_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
src = (INT32)(INT16)FETCH16(cpustate);
@@ -697,18 +697,18 @@ static void I386OP(imul_r16_rm16_i16)(i386_state *cpustate) // Opcode 0x69
cpustate->CF = cpustate->OF = !(result == (INT32)(INT16)result);
}
-static void I386OP(imul_r16_rm16_i8)(i386_state *cpustate) // Opcode 0x6b
+static void I386OP(imul_r16_rm16_i8)(i386_state *cpustate) // Opcode 0x6b
{
UINT8 modrm = FETCH(cpustate);
INT32 result;
INT32 src, dst;
if( modrm >= 0xc0 ) {
dst = (INT32)(INT16)LOAD_RM16(modrm);
- CYCLES(cpustate,CYCLES_IMUL16_REG_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
dst = (INT32)(INT16)READ16(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL16_MEM_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
src = (INT32)(INT8)FETCH(cpustate);
@@ -719,7 +719,7 @@ static void I386OP(imul_r16_rm16_i8)(i386_state *cpustate) // Opcode 0x6b
cpustate->CF = cpustate->OF = !(result == (INT32)(INT16)result);
}
-static void I386OP(in_ax_i8)(i386_state *cpustate) // Opcode 0xe5
+static void I386OP(in_ax_i8)(i386_state *cpustate) // Opcode 0xe5
{
UINT16 port = FETCH(cpustate);
UINT16 data = READPORT16(cpustate, port);
@@ -727,7 +727,7 @@ static void I386OP(in_ax_i8)(i386_state *cpustate) // Opcode 0xe5
CYCLES(cpustate,CYCLES_IN_VAR);
}
-static void I386OP(in_ax_dx)(i386_state *cpustate) // Opcode 0xed
+static void I386OP(in_ax_dx)(i386_state *cpustate) // Opcode 0xed
{
UINT16 port = REG16(DX);
UINT16 data = READPORT16(cpustate, port);
@@ -735,55 +735,55 @@ static void I386OP(in_ax_dx)(i386_state *cpustate) // Opcode 0xed
CYCLES(cpustate,CYCLES_IN);
}
-static void I386OP(inc_ax)(i386_state *cpustate) // Opcode 0x40
+static void I386OP(inc_ax)(i386_state *cpustate) // Opcode 0x40
{
REG16(AX) = INC16(cpustate, REG16(AX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_cx)(i386_state *cpustate) // Opcode 0x41
+static void I386OP(inc_cx)(i386_state *cpustate) // Opcode 0x41
{
REG16(CX) = INC16(cpustate, REG16(CX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_dx)(i386_state *cpustate) // Opcode 0x42
+static void I386OP(inc_dx)(i386_state *cpustate) // Opcode 0x42
{
REG16(DX) = INC16(cpustate, REG16(DX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_bx)(i386_state *cpustate) // Opcode 0x43
+static void I386OP(inc_bx)(i386_state *cpustate) // Opcode 0x43
{
REG16(BX) = INC16(cpustate, REG16(BX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_sp)(i386_state *cpustate) // Opcode 0x44
+static void I386OP(inc_sp)(i386_state *cpustate) // Opcode 0x44
{
REG16(SP) = INC16(cpustate, REG16(SP) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_bp)(i386_state *cpustate) // Opcode 0x45
+static void I386OP(inc_bp)(i386_state *cpustate) // Opcode 0x45
{
REG16(BP) = INC16(cpustate, REG16(BP) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_si)(i386_state *cpustate) // Opcode 0x46
+static void I386OP(inc_si)(i386_state *cpustate) // Opcode 0x46
{
REG16(SI) = INC16(cpustate, REG16(SI) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_di)(i386_state *cpustate) // Opcode 0x47
+static void I386OP(inc_di)(i386_state *cpustate) // Opcode 0x47
{
REG16(DI) = INC16(cpustate, REG16(DI) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(iret16)(i386_state *cpustate) // Opcode 0xcf
+static void I386OP(iret16)(i386_state *cpustate) // Opcode 0xcf
{
if( PROTECTED_MODE )
{
@@ -802,7 +802,7 @@ static void I386OP(iret16)(i386_state *cpustate) // Opcode 0xcf
CYCLES(cpustate,CYCLES_IRET);
}
-static void I386OP(ja_rel16)(i386_state *cpustate) // Opcode 0x0f 87
+static void I386OP(ja_rel16)(i386_state *cpustate) // Opcode 0x0f 87
{
INT16 disp = FETCH16(cpustate);
if( cpustate->CF == 0 && cpustate->ZF == 0 ) {
@@ -815,13 +815,13 @@ static void I386OP(ja_rel16)(i386_state *cpustate) // Opcode 0x0f 87
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jbe_rel16)(i386_state *cpustate) // Opcode 0x0f 86
+static void I386OP(jbe_rel16)(i386_state *cpustate) // Opcode 0x0f 86
{
INT16 disp = FETCH16(cpustate);
if( cpustate->CF != 0 || cpustate->ZF != 0 ) {
@@ -834,13 +834,13 @@ static void I386OP(jbe_rel16)(i386_state *cpustate) // Opcode 0x0f 86
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jc_rel16)(i386_state *cpustate) // Opcode 0x0f 82
+static void I386OP(jc_rel16)(i386_state *cpustate) // Opcode 0x0f 82
{
INT16 disp = FETCH16(cpustate);
if( cpustate->CF != 0 ) {
@@ -853,13 +853,13 @@ static void I386OP(jc_rel16)(i386_state *cpustate) // Opcode 0x0f 82
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jg_rel16)(i386_state *cpustate) // Opcode 0x0f 8f
+static void I386OP(jg_rel16)(i386_state *cpustate) // Opcode 0x0f 8f
{
INT16 disp = FETCH16(cpustate);
if( cpustate->ZF == 0 && (cpustate->SF == cpustate->OF) ) {
@@ -872,13 +872,13 @@ static void I386OP(jg_rel16)(i386_state *cpustate) // Opcode 0x0f 8f
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jge_rel16)(i386_state *cpustate) // Opcode 0x0f 8d
+static void I386OP(jge_rel16)(i386_state *cpustate) // Opcode 0x0f 8d
{
INT16 disp = FETCH16(cpustate);
if(cpustate->SF == cpustate->OF) {
@@ -891,13 +891,13 @@ static void I386OP(jge_rel16)(i386_state *cpustate) // Opcode 0x0f 8d
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jl_rel16)(i386_state *cpustate) // Opcode 0x0f 8c
+static void I386OP(jl_rel16)(i386_state *cpustate) // Opcode 0x0f 8c
{
INT16 disp = FETCH16(cpustate);
if( (cpustate->SF != cpustate->OF) ) {
@@ -910,13 +910,13 @@ static void I386OP(jl_rel16)(i386_state *cpustate) // Opcode 0x0f 8c
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jle_rel16)(i386_state *cpustate) // Opcode 0x0f 8e
+static void I386OP(jle_rel16)(i386_state *cpustate) // Opcode 0x0f 8e
{
INT16 disp = FETCH16(cpustate);
if( cpustate->ZF != 0 || (cpustate->SF != cpustate->OF) ) {
@@ -929,13 +929,13 @@ static void I386OP(jle_rel16)(i386_state *cpustate) // Opcode 0x0f 8e
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jnc_rel16)(i386_state *cpustate) // Opcode 0x0f 83
+static void I386OP(jnc_rel16)(i386_state *cpustate) // Opcode 0x0f 83
{
INT16 disp = FETCH16(cpustate);
if( cpustate->CF == 0 ) {
@@ -948,13 +948,13 @@ static void I386OP(jnc_rel16)(i386_state *cpustate) // Opcode 0x0f 83
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jno_rel16)(i386_state *cpustate) // Opcode 0x0f 81
+static void I386OP(jno_rel16)(i386_state *cpustate) // Opcode 0x0f 81
{
INT16 disp = FETCH16(cpustate);
if( cpustate->OF == 0 ) {
@@ -967,13 +967,13 @@ static void I386OP(jno_rel16)(i386_state *cpustate) // Opcode 0x0f 81
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jnp_rel16)(i386_state *cpustate) // Opcode 0x0f 8b
+static void I386OP(jnp_rel16)(i386_state *cpustate) // Opcode 0x0f 8b
{
INT16 disp = FETCH16(cpustate);
if( cpustate->PF == 0 ) {
@@ -986,13 +986,13 @@ static void I386OP(jnp_rel16)(i386_state *cpustate) // Opcode 0x0f 8b
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jns_rel16)(i386_state *cpustate) // Opcode 0x0f 89
+static void I386OP(jns_rel16)(i386_state *cpustate) // Opcode 0x0f 89
{
INT16 disp = FETCH16(cpustate);
if( cpustate->SF == 0 ) {
@@ -1005,13 +1005,13 @@ static void I386OP(jns_rel16)(i386_state *cpustate) // Opcode 0x0f 89
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jnz_rel16)(i386_state *cpustate) // Opcode 0x0f 85
+static void I386OP(jnz_rel16)(i386_state *cpustate) // Opcode 0x0f 85
{
INT16 disp = FETCH16(cpustate);
if( cpustate->ZF == 0 ) {
@@ -1024,13 +1024,13 @@ static void I386OP(jnz_rel16)(i386_state *cpustate) // Opcode 0x0f 85
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jo_rel16)(i386_state *cpustate) // Opcode 0x0f 80
+static void I386OP(jo_rel16)(i386_state *cpustate) // Opcode 0x0f 80
{
INT16 disp = FETCH16(cpustate);
if( cpustate->OF != 0 ) {
@@ -1043,13 +1043,13 @@ static void I386OP(jo_rel16)(i386_state *cpustate) // Opcode 0x0f 80
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jp_rel16)(i386_state *cpustate) // Opcode 0x0f 8a
+static void I386OP(jp_rel16)(i386_state *cpustate) // Opcode 0x0f 8a
{
INT16 disp = FETCH16(cpustate);
if( cpustate->PF != 0 ) {
@@ -1062,13 +1062,13 @@ static void I386OP(jp_rel16)(i386_state *cpustate) // Opcode 0x0f 8a
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(js_rel16)(i386_state *cpustate) // Opcode 0x0f 88
+static void I386OP(js_rel16)(i386_state *cpustate) // Opcode 0x0f 88
{
INT16 disp = FETCH16(cpustate);
if( cpustate->SF != 0 ) {
@@ -1081,13 +1081,13 @@ static void I386OP(js_rel16)(i386_state *cpustate) // Opcode 0x0f 88
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jz_rel16)(i386_state *cpustate) // Opcode 0x0f 84
+static void I386OP(jz_rel16)(i386_state *cpustate) // Opcode 0x0f 84
{
INT16 disp = FETCH16(cpustate);
if( cpustate->ZF != 0 ) {
@@ -1100,13 +1100,13 @@ static void I386OP(jz_rel16)(i386_state *cpustate) // Opcode 0x0f 84
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jcxz16)(i386_state *cpustate) // Opcode 0xe3
+static void I386OP(jcxz16)(i386_state *cpustate) // Opcode 0xe3
{
INT8 disp = FETCH(cpustate);
int val = (cpustate->address_size)?(REG32(ECX) == 0):(REG16(CX) == 0);
@@ -1120,13 +1120,13 @@ static void I386OP(jcxz16)(i386_state *cpustate) // Opcode 0xe3
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCXZ); /* TODO: Timing = 9 + m */
+ CYCLES(cpustate,CYCLES_JCXZ); /* TODO: Timing = 9 + m */
} else {
CYCLES(cpustate,CYCLES_JCXZ_NOBRANCH);
}
}
-static void I386OP(jmp_rel16)(i386_state *cpustate) // Opcode 0xe9
+static void I386OP(jmp_rel16)(i386_state *cpustate) // Opcode 0xe9
{
INT16 disp = FETCH16(cpustate);
@@ -1139,10 +1139,10 @@ static void I386OP(jmp_rel16)(i386_state *cpustate) // Opcode 0xe9
cpustate->eip = (cpustate->eip + disp) & 0xffff;
}
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JMP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JMP); /* TODO: Timing = 7 + m */
}
-static void I386OP(jmp_abs16)(i386_state *cpustate) // Opcode 0xea
+static void I386OP(jmp_abs16)(i386_state *cpustate) // Opcode 0xea
{
UINT16 address = FETCH16(cpustate);
UINT16 segment = FETCH16(cpustate);
@@ -1162,7 +1162,7 @@ static void I386OP(jmp_abs16)(i386_state *cpustate) // Opcode 0xea
CYCLES(cpustate,CYCLES_JMP_INTERSEG);
}
-static void I386OP(lea16)(i386_state *cpustate) // Opcode 0x8d
+static void I386OP(lea16)(i386_state *cpustate) // Opcode 0x8d
{
UINT8 modrm = FETCH(cpustate);
UINT32 ea = GetNonTranslatedEA(cpustate,modrm,NULL);
@@ -1170,7 +1170,7 @@ static void I386OP(lea16)(i386_state *cpustate) // Opcode 0x8d
CYCLES(cpustate,CYCLES_LEA);
}
-static void I386OP(enter16)(i386_state *cpustate) // Opcode 0xc8
+static void I386OP(enter16)(i386_state *cpustate) // Opcode 0xc8
{
UINT16 framesize = FETCH16(cpustate);
UINT8 level = FETCH(cpustate) % 32;
@@ -1200,7 +1200,7 @@ static void I386OP(enter16)(i386_state *cpustate) // Opcode 0xc8
CYCLES(cpustate,CYCLES_ENTER);
}
-static void I386OP(leave16)(i386_state *cpustate) // Opcode 0xc9
+static void I386OP(leave16)(i386_state *cpustate) // Opcode 0xc9
{
if(!STACK_32BIT)
REG16(SP) = REG16(BP);
@@ -1210,7 +1210,7 @@ static void I386OP(leave16)(i386_state *cpustate) // Opcode 0xc9
CYCLES(cpustate,CYCLES_LEAVE);
}
-static void I386OP(lodsw)(i386_state *cpustate) // Opcode 0xad
+static void I386OP(lodsw)(i386_state *cpustate) // Opcode 0xad
{
UINT32 eas;
if( cpustate->segment_prefix ) {
@@ -1223,7 +1223,7 @@ static void I386OP(lodsw)(i386_state *cpustate) // Opcode 0xad
CYCLES(cpustate,CYCLES_LODS);
}
-static void I386OP(loop16)(i386_state *cpustate) // Opcode 0xe2
+static void I386OP(loop16)(i386_state *cpustate) // Opcode 0xe2
{
INT8 disp = FETCH(cpustate);
INT32 val = (cpustate->address_size)?(--REG32(ECX)):(--REG16(CX));
@@ -1238,10 +1238,10 @@ static void I386OP(loop16)(i386_state *cpustate) // Opcode 0xe2
}
CHANGE_PC(cpustate,cpustate->eip);
}
- CYCLES(cpustate,CYCLES_LOOP); /* TODO: Timing = 11 + m */
+ CYCLES(cpustate,CYCLES_LOOP); /* TODO: Timing = 11 + m */
}
-static void I386OP(loopne16)(i386_state *cpustate) // Opcode 0xe0
+static void I386OP(loopne16)(i386_state *cpustate) // Opcode 0xe0
{
INT8 disp = FETCH(cpustate);
INT32 val = (cpustate->address_size)?(--REG32(ECX)):(--REG16(CX));
@@ -1256,10 +1256,10 @@ static void I386OP(loopne16)(i386_state *cpustate) // Opcode 0xe0
}
CHANGE_PC(cpustate,cpustate->eip);
}
- CYCLES(cpustate,CYCLES_LOOPNZ); /* TODO: Timing = 11 + m */
+ CYCLES(cpustate,CYCLES_LOOPNZ); /* TODO: Timing = 11 + m */
}
-static void I386OP(loopz16)(i386_state *cpustate) // Opcode 0xe1
+static void I386OP(loopz16)(i386_state *cpustate) // Opcode 0xe1
{
INT8 disp = FETCH(cpustate);
INT32 val = (cpustate->address_size)?(--REG32(ECX)):(--REG16(CX));
@@ -1274,10 +1274,10 @@ static void I386OP(loopz16)(i386_state *cpustate) // Opcode 0xe1
}
CHANGE_PC(cpustate,cpustate->eip);
}
- CYCLES(cpustate,CYCLES_LOOPZ); /* TODO: Timing = 11 + m */
+ CYCLES(cpustate,CYCLES_LOOPZ); /* TODO: Timing = 11 + m */
}
-static void I386OP(mov_rm16_r16)(i386_state *cpustate) // Opcode 0x89
+static void I386OP(mov_rm16_r16)(i386_state *cpustate) // Opcode 0x89
{
UINT16 src;
UINT8 modrm = FETCH(cpustate);
@@ -1293,7 +1293,7 @@ static void I386OP(mov_rm16_r16)(i386_state *cpustate) // Opcode 0x89
}
}
-static void I386OP(mov_r16_rm16)(i386_state *cpustate) // Opcode 0x8b
+static void I386OP(mov_r16_rm16)(i386_state *cpustate) // Opcode 0x8b
{
UINT16 src;
UINT8 modrm = FETCH(cpustate);
@@ -1309,7 +1309,7 @@ static void I386OP(mov_r16_rm16)(i386_state *cpustate) // Opcode 0x8b
}
}
-static void I386OP(mov_rm16_i16)(i386_state *cpustate) // Opcode 0xc7
+static void I386OP(mov_rm16_i16)(i386_state *cpustate) // Opcode 0xc7
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1324,7 +1324,7 @@ static void I386OP(mov_rm16_i16)(i386_state *cpustate) // Opcode 0xc7
}
}
-static void I386OP(mov_ax_m16)(i386_state *cpustate) // Opcode 0xa1
+static void I386OP(mov_ax_m16)(i386_state *cpustate) // Opcode 0xa1
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -1342,7 +1342,7 @@ static void I386OP(mov_ax_m16)(i386_state *cpustate) // Opcode 0xa1
CYCLES(cpustate,CYCLES_MOV_MEM_ACC);
}
-static void I386OP(mov_m16_ax)(i386_state *cpustate) // Opcode 0xa3
+static void I386OP(mov_m16_ax)(i386_state *cpustate) // Opcode 0xa3
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -1360,55 +1360,55 @@ static void I386OP(mov_m16_ax)(i386_state *cpustate) // Opcode 0xa3
CYCLES(cpustate,CYCLES_MOV_ACC_MEM);
}
-static void I386OP(mov_ax_i16)(i386_state *cpustate) // Opcode 0xb8
+static void I386OP(mov_ax_i16)(i386_state *cpustate) // Opcode 0xb8
{
REG16(AX) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_cx_i16)(i386_state *cpustate) // Opcode 0xb9
+static void I386OP(mov_cx_i16)(i386_state *cpustate) // Opcode 0xb9
{
REG16(CX) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_dx_i16)(i386_state *cpustate) // Opcode 0xba
+static void I386OP(mov_dx_i16)(i386_state *cpustate) // Opcode 0xba
{
REG16(DX) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_bx_i16)(i386_state *cpustate) // Opcode 0xbb
+static void I386OP(mov_bx_i16)(i386_state *cpustate) // Opcode 0xbb
{
REG16(BX) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_sp_i16)(i386_state *cpustate) // Opcode 0xbc
+static void I386OP(mov_sp_i16)(i386_state *cpustate) // Opcode 0xbc
{
REG16(SP) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_bp_i16)(i386_state *cpustate) // Opcode 0xbd
+static void I386OP(mov_bp_i16)(i386_state *cpustate) // Opcode 0xbd
{
REG16(BP) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_si_i16)(i386_state *cpustate) // Opcode 0xbe
+static void I386OP(mov_si_i16)(i386_state *cpustate) // Opcode 0xbe
{
REG16(SI) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_di_i16)(i386_state *cpustate) // Opcode 0xbf
+static void I386OP(mov_di_i16)(i386_state *cpustate) // Opcode 0xbf
{
REG16(DI) = FETCH16(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(movsw)(i386_state *cpustate) // Opcode 0xa5
+static void I386OP(movsw)(i386_state *cpustate) // Opcode 0xa5
{
UINT32 eas, ead;
UINT16 v;
@@ -1425,7 +1425,7 @@ static void I386OP(movsw)(i386_state *cpustate) // Opcode 0xa5
CYCLES(cpustate,CYCLES_MOVS);
}
-static void I386OP(movsx_r16_rm8)(i386_state *cpustate) // Opcode 0x0f be
+static void I386OP(movsx_r16_rm8)(i386_state *cpustate) // Opcode 0x0f be
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1440,7 +1440,7 @@ static void I386OP(movsx_r16_rm8)(i386_state *cpustate) // Opcode 0x0f be
}
}
-static void I386OP(movzx_r16_rm8)(i386_state *cpustate) // Opcode 0x0f b6
+static void I386OP(movzx_r16_rm8)(i386_state *cpustate) // Opcode 0x0f b6
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1455,7 +1455,7 @@ static void I386OP(movzx_r16_rm8)(i386_state *cpustate) // Opcode 0x0f b6
}
}
-static void I386OP(or_rm16_r16)(i386_state *cpustate) // Opcode 0x09
+static void I386OP(or_rm16_r16)(i386_state *cpustate) // Opcode 0x09
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1475,7 +1475,7 @@ static void I386OP(or_rm16_r16)(i386_state *cpustate) // Opcode 0x09
}
}
-static void I386OP(or_r16_rm16)(i386_state *cpustate) // Opcode 0x0b
+static void I386OP(or_r16_rm16)(i386_state *cpustate) // Opcode 0x0b
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1495,7 +1495,7 @@ static void I386OP(or_r16_rm16)(i386_state *cpustate) // Opcode 0x0b
}
}
-static void I386OP(or_ax_i16)(i386_state *cpustate) // Opcode 0x0d
+static void I386OP(or_ax_i16)(i386_state *cpustate) // Opcode 0x0d
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -1505,7 +1505,7 @@ static void I386OP(or_ax_i16)(i386_state *cpustate) // Opcode 0x0d
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(out_ax_i8)(i386_state *cpustate) // Opcode 0xe7
+static void I386OP(out_ax_i8)(i386_state *cpustate) // Opcode 0xe7
{
UINT16 port = FETCH(cpustate);
UINT16 data = REG16(AX);
@@ -1513,7 +1513,7 @@ static void I386OP(out_ax_i8)(i386_state *cpustate) // Opcode 0xe7
CYCLES(cpustate,CYCLES_OUT_VAR);
}
-static void I386OP(out_ax_dx)(i386_state *cpustate) // Opcode 0xef
+static void I386OP(out_ax_dx)(i386_state *cpustate) // Opcode 0xef
{
UINT16 port = REG16(DX);
UINT16 data = REG16(AX);
@@ -1521,7 +1521,7 @@ static void I386OP(out_ax_dx)(i386_state *cpustate) // Opcode 0xef
CYCLES(cpustate,CYCLES_OUT);
}
-static void I386OP(pop_ax)(i386_state *cpustate) // Opcode 0x58
+static void I386OP(pop_ax)(i386_state *cpustate) // Opcode 0x58
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1531,7 +1531,7 @@ static void I386OP(pop_ax)(i386_state *cpustate) // Opcode 0x58
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_cx)(i386_state *cpustate) // Opcode 0x59
+static void I386OP(pop_cx)(i386_state *cpustate) // Opcode 0x59
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1541,7 +1541,7 @@ static void I386OP(pop_cx)(i386_state *cpustate) // Opcode 0x59
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_dx)(i386_state *cpustate) // Opcode 0x5a
+static void I386OP(pop_dx)(i386_state *cpustate) // Opcode 0x5a
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1551,7 +1551,7 @@ static void I386OP(pop_dx)(i386_state *cpustate) // Opcode 0x5a
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_bx)(i386_state *cpustate) // Opcode 0x5b
+static void I386OP(pop_bx)(i386_state *cpustate) // Opcode 0x5b
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1561,7 +1561,7 @@ static void I386OP(pop_bx)(i386_state *cpustate) // Opcode 0x5b
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_sp)(i386_state *cpustate) // Opcode 0x5c
+static void I386OP(pop_sp)(i386_state *cpustate) // Opcode 0x5c
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1571,7 +1571,7 @@ static void I386OP(pop_sp)(i386_state *cpustate) // Opcode 0x5c
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_bp)(i386_state *cpustate) // Opcode 0x5d
+static void I386OP(pop_bp)(i386_state *cpustate) // Opcode 0x5d
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1581,7 +1581,7 @@ static void I386OP(pop_bp)(i386_state *cpustate) // Opcode 0x5d
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_si)(i386_state *cpustate) // Opcode 0x5e
+static void I386OP(pop_si)(i386_state *cpustate) // Opcode 0x5e
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1591,7 +1591,7 @@ static void I386OP(pop_si)(i386_state *cpustate) // Opcode 0x5e
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_di)(i386_state *cpustate) // Opcode 0x5f
+static void I386OP(pop_di)(i386_state *cpustate) // Opcode 0x5f
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+1) == 0)
@@ -1627,27 +1627,27 @@ static bool I386OP(pop_seg16)(i386_state *cpustate, int segment)
return true;
}
-static void I386OP(pop_ds16)(i386_state *cpustate) // Opcode 0x1f
+static void I386OP(pop_ds16)(i386_state *cpustate) // Opcode 0x1f
{
I386OP(pop_seg16)(cpustate, DS);
}
-static void I386OP(pop_es16)(i386_state *cpustate) // Opcode 0x07
+static void I386OP(pop_es16)(i386_state *cpustate) // Opcode 0x07
{
I386OP(pop_seg16)(cpustate, ES);
}
-static void I386OP(pop_fs16)(i386_state *cpustate) // Opcode 0x0f a1
+static void I386OP(pop_fs16)(i386_state *cpustate) // Opcode 0x0f a1
{
I386OP(pop_seg16)(cpustate, FS);
}
-static void I386OP(pop_gs16)(i386_state *cpustate) // Opcode 0x0f a9
+static void I386OP(pop_gs16)(i386_state *cpustate) // Opcode 0x0f a9
{
I386OP(pop_seg16)(cpustate, GS);
}
-static void I386OP(pop_ss16)(i386_state *cpustate) // Opcode 0x17
+static void I386OP(pop_ss16)(i386_state *cpustate) // Opcode 0x17
{
if(!I386OP(pop_seg16)(cpustate, SS)) return;
if(cpustate->IF != 0) // if external interrupts are enabled
@@ -1657,7 +1657,7 @@ static void I386OP(pop_ss16)(i386_state *cpustate) // Opcode 0x17
}
}
-static void I386OP(pop_rm16)(i386_state *cpustate) // Opcode 0x8f
+static void I386OP(pop_rm16)(i386_state *cpustate) // Opcode 0x8f
{
UINT8 modrm = FETCH(cpustate);
UINT16 value;
@@ -1688,7 +1688,7 @@ static void I386OP(pop_rm16)(i386_state *cpustate) // Opcode 0x8f
CYCLES(cpustate,CYCLES_POP_RM);
}
-static void I386OP(popa)(i386_state *cpustate) // Opcode 0x61
+static void I386OP(popa)(i386_state *cpustate) // Opcode 0x61
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
@@ -1708,7 +1708,7 @@ static void I386OP(popa)(i386_state *cpustate) // Opcode 0x61
CYCLES(cpustate,CYCLES_POPA);
}
-static void I386OP(popf)(i386_state *cpustate) // Opcode 0x9d
+static void I386OP(popf)(i386_state *cpustate) // Opcode 0x9d
{
UINT32 value;
UINT32 current = get_flags(cpustate);
@@ -1744,7 +1744,7 @@ static void I386OP(popf)(i386_state *cpustate) // Opcode 0x9d
CYCLES(cpustate,CYCLES_POPF);
}
-static void I386OP(push_ax)(i386_state *cpustate) // Opcode 0x50
+static void I386OP(push_ax)(i386_state *cpustate) // Opcode 0x50
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1754,7 +1754,7 @@ static void I386OP(push_ax)(i386_state *cpustate) // Opcode 0x50
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_cx)(i386_state *cpustate) // Opcode 0x51
+static void I386OP(push_cx)(i386_state *cpustate) // Opcode 0x51
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1764,7 +1764,7 @@ static void I386OP(push_cx)(i386_state *cpustate) // Opcode 0x51
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_dx)(i386_state *cpustate) // Opcode 0x52
+static void I386OP(push_dx)(i386_state *cpustate) // Opcode 0x52
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1774,7 +1774,7 @@ static void I386OP(push_dx)(i386_state *cpustate) // Opcode 0x52
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_bx)(i386_state *cpustate) // Opcode 0x53
+static void I386OP(push_bx)(i386_state *cpustate) // Opcode 0x53
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1784,7 +1784,7 @@ static void I386OP(push_bx)(i386_state *cpustate) // Opcode 0x53
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_sp)(i386_state *cpustate) // Opcode 0x54
+static void I386OP(push_sp)(i386_state *cpustate) // Opcode 0x54
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1794,7 +1794,7 @@ static void I386OP(push_sp)(i386_state *cpustate) // Opcode 0x54
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_bp)(i386_state *cpustate) // Opcode 0x55
+static void I386OP(push_bp)(i386_state *cpustate) // Opcode 0x55
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1804,7 +1804,7 @@ static void I386OP(push_bp)(i386_state *cpustate) // Opcode 0x55
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_si)(i386_state *cpustate) // Opcode 0x56
+static void I386OP(push_si)(i386_state *cpustate) // Opcode 0x56
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1814,7 +1814,7 @@ static void I386OP(push_si)(i386_state *cpustate) // Opcode 0x56
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_di)(i386_state *cpustate) // Opcode 0x57
+static void I386OP(push_di)(i386_state *cpustate) // Opcode 0x57
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1824,7 +1824,7 @@ static void I386OP(push_di)(i386_state *cpustate) // Opcode 0x57
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_cs16)(i386_state *cpustate) // Opcode 0x0e
+static void I386OP(push_cs16)(i386_state *cpustate) // Opcode 0x0e
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1834,7 +1834,7 @@ static void I386OP(push_cs16)(i386_state *cpustate) // Opcode 0x0e
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_ds16)(i386_state *cpustate) // Opcode 0x1e
+static void I386OP(push_ds16)(i386_state *cpustate) // Opcode 0x1e
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1844,7 +1844,7 @@ static void I386OP(push_ds16)(i386_state *cpustate) // Opcode 0x1e
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_es16)(i386_state *cpustate) // Opcode 0x06
+static void I386OP(push_es16)(i386_state *cpustate) // Opcode 0x06
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1854,7 +1854,7 @@ static void I386OP(push_es16)(i386_state *cpustate) // Opcode 0x06
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_fs16)(i386_state *cpustate) // Opcode 0x0f a0
+static void I386OP(push_fs16)(i386_state *cpustate) // Opcode 0x0f a0
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1864,7 +1864,7 @@ static void I386OP(push_fs16)(i386_state *cpustate) // Opcode 0x0f a0
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_gs16)(i386_state *cpustate) // Opcode 0x0f a8
+static void I386OP(push_gs16)(i386_state *cpustate) // Opcode 0x0f a8
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1874,7 +1874,7 @@ static void I386OP(push_gs16)(i386_state *cpustate) // Opcode 0x0f a8
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_ss16)(i386_state *cpustate) // Opcode 0x16
+static void I386OP(push_ss16)(i386_state *cpustate) // Opcode 0x16
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1884,7 +1884,7 @@ static void I386OP(push_ss16)(i386_state *cpustate) // Opcode 0x16
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_i16)(i386_state *cpustate) // Opcode 0x68
+static void I386OP(push_i16)(i386_state *cpustate) // Opcode 0x68
{
UINT16 value = FETCH16(cpustate);
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
@@ -1895,7 +1895,7 @@ static void I386OP(push_i16)(i386_state *cpustate) // Opcode 0x68
CYCLES(cpustate,CYCLES_PUSH_IMM);
}
-static void I386OP(pusha)(i386_state *cpustate) // Opcode 0x60
+static void I386OP(pusha)(i386_state *cpustate) // Opcode 0x60
{
UINT16 temp = REG16(SP);
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
@@ -1915,7 +1915,7 @@ static void I386OP(pusha)(i386_state *cpustate) // Opcode 0x60
CYCLES(cpustate,CYCLES_PUSHA);
}
-static void I386OP(pushf)(i386_state *cpustate) // Opcode 0x9c
+static void I386OP(pushf)(i386_state *cpustate) // Opcode 0x9c
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-2) == 0)
@@ -1925,23 +1925,23 @@ static void I386OP(pushf)(i386_state *cpustate) // Opcode 0x9c
CYCLES(cpustate,CYCLES_PUSHF);
}
-static void I386OP(ret_near16_i16)(i386_state *cpustate) // Opcode 0xc2
+static void I386OP(ret_near16_i16)(i386_state *cpustate) // Opcode 0xc2
{
INT16 disp = FETCH16(cpustate);
cpustate->eip = POP16(cpustate);
REG16(SP) += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_RET_IMM); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_RET_IMM); /* TODO: Timing = 10 + m */
}
-static void I386OP(ret_near16)(i386_state *cpustate) // Opcode 0xc3
+static void I386OP(ret_near16)(i386_state *cpustate) // Opcode 0xc3
{
cpustate->eip = POP16(cpustate);
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_RET); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_RET); /* TODO: Timing = 10 + m */
}
-static void I386OP(sbb_rm16_r16)(i386_state *cpustate) // Opcode 0x19
+static void I386OP(sbb_rm16_r16)(i386_state *cpustate) // Opcode 0x19
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1961,7 +1961,7 @@ static void I386OP(sbb_rm16_r16)(i386_state *cpustate) // Opcode 0x19
}
}
-static void I386OP(sbb_r16_rm16)(i386_state *cpustate) // Opcode 0x1b
+static void I386OP(sbb_r16_rm16)(i386_state *cpustate) // Opcode 0x1b
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1981,7 +1981,7 @@ static void I386OP(sbb_r16_rm16)(i386_state *cpustate) // Opcode 0x1b
}
}
-static void I386OP(sbb_ax_i16)(i386_state *cpustate) // Opcode 0x1d
+static void I386OP(sbb_ax_i16)(i386_state *cpustate) // Opcode 0x1d
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -1991,7 +1991,7 @@ static void I386OP(sbb_ax_i16)(i386_state *cpustate) // Opcode 0x1d
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(scasw)(i386_state *cpustate) // Opcode 0xaf
+static void I386OP(scasw)(i386_state *cpustate) // Opcode 0xaf
{
UINT32 eas;
UINT16 src, dst;
@@ -2003,7 +2003,7 @@ static void I386OP(scasw)(i386_state *cpustate) // Opcode 0xaf
CYCLES(cpustate,CYCLES_SCAS);
}
-static void I386OP(shld16_i8)(i386_state *cpustate) // Opcode 0x0f a4
+static void I386OP(shld16_i8)(i386_state *cpustate) // Opcode 0x0f a4
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -2051,7 +2051,7 @@ static void I386OP(shld16_i8)(i386_state *cpustate) // Opcode 0x0f a4
}
}
-static void I386OP(shld16_cl)(i386_state *cpustate) // Opcode 0x0f a5
+static void I386OP(shld16_cl)(i386_state *cpustate) // Opcode 0x0f a5
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -2098,7 +2098,7 @@ static void I386OP(shld16_cl)(i386_state *cpustate) // Opcode 0x0f a5
}
}
-static void I386OP(shrd16_i8)(i386_state *cpustate) // Opcode 0x0f ac
+static void I386OP(shrd16_i8)(i386_state *cpustate) // Opcode 0x0f ac
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -2145,7 +2145,7 @@ static void I386OP(shrd16_i8)(i386_state *cpustate) // Opcode 0x0f ac
}
}
-static void I386OP(shrd16_cl)(i386_state *cpustate) // Opcode 0x0f ad
+static void I386OP(shrd16_cl)(i386_state *cpustate) // Opcode 0x0f ad
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -2192,7 +2192,7 @@ static void I386OP(shrd16_cl)(i386_state *cpustate) // Opcode 0x0f ad
}
}
-static void I386OP(stosw)(i386_state *cpustate) // Opcode 0xab
+static void I386OP(stosw)(i386_state *cpustate) // Opcode 0xab
{
UINT32 ead;
ead = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI), 1 );
@@ -2201,7 +2201,7 @@ static void I386OP(stosw)(i386_state *cpustate) // Opcode 0xab
CYCLES(cpustate,CYCLES_STOS);
}
-static void I386OP(sub_rm16_r16)(i386_state *cpustate) // Opcode 0x29
+static void I386OP(sub_rm16_r16)(i386_state *cpustate) // Opcode 0x29
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2221,7 +2221,7 @@ static void I386OP(sub_rm16_r16)(i386_state *cpustate) // Opcode 0x29
}
}
-static void I386OP(sub_r16_rm16)(i386_state *cpustate) // Opcode 0x2b
+static void I386OP(sub_r16_rm16)(i386_state *cpustate) // Opcode 0x2b
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2241,7 +2241,7 @@ static void I386OP(sub_r16_rm16)(i386_state *cpustate) // Opcode 0x2b
}
}
-static void I386OP(sub_ax_i16)(i386_state *cpustate) // Opcode 0x2d
+static void I386OP(sub_ax_i16)(i386_state *cpustate) // Opcode 0x2d
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -2251,7 +2251,7 @@ static void I386OP(sub_ax_i16)(i386_state *cpustate) // Opcode 0x2d
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(test_ax_i16)(i386_state *cpustate) // Opcode 0xa9
+static void I386OP(test_ax_i16)(i386_state *cpustate) // Opcode 0xa9
{
UINT16 src = FETCH16(cpustate);
UINT16 dst = REG16(AX);
@@ -2262,7 +2262,7 @@ static void I386OP(test_ax_i16)(i386_state *cpustate) // Opcode 0xa9
CYCLES(cpustate,CYCLES_TEST_IMM_ACC);
}
-static void I386OP(test_rm16_r16)(i386_state *cpustate) // Opcode 0x85
+static void I386OP(test_rm16_r16)(i386_state *cpustate) // Opcode 0x85
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2286,7 +2286,7 @@ static void I386OP(test_rm16_r16)(i386_state *cpustate) // Opcode 0x85
}
}
-static void I386OP(xchg_ax_cx)(i386_state *cpustate) // Opcode 0x91
+static void I386OP(xchg_ax_cx)(i386_state *cpustate) // Opcode 0x91
{
UINT16 temp;
temp = REG16(AX);
@@ -2295,7 +2295,7 @@ static void I386OP(xchg_ax_cx)(i386_state *cpustate) // Opcode 0x91
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_ax_dx)(i386_state *cpustate) // Opcode 0x92
+static void I386OP(xchg_ax_dx)(i386_state *cpustate) // Opcode 0x92
{
UINT16 temp;
temp = REG16(AX);
@@ -2304,7 +2304,7 @@ static void I386OP(xchg_ax_dx)(i386_state *cpustate) // Opcode 0x92
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_ax_bx)(i386_state *cpustate) // Opcode 0x93
+static void I386OP(xchg_ax_bx)(i386_state *cpustate) // Opcode 0x93
{
UINT16 temp;
temp = REG16(AX);
@@ -2313,7 +2313,7 @@ static void I386OP(xchg_ax_bx)(i386_state *cpustate) // Opcode 0x93
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_ax_sp)(i386_state *cpustate) // Opcode 0x94
+static void I386OP(xchg_ax_sp)(i386_state *cpustate) // Opcode 0x94
{
UINT16 temp;
temp = REG16(AX);
@@ -2322,7 +2322,7 @@ static void I386OP(xchg_ax_sp)(i386_state *cpustate) // Opcode 0x94
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_ax_bp)(i386_state *cpustate) // Opcode 0x95
+static void I386OP(xchg_ax_bp)(i386_state *cpustate) // Opcode 0x95
{
UINT16 temp;
temp = REG16(AX);
@@ -2331,7 +2331,7 @@ static void I386OP(xchg_ax_bp)(i386_state *cpustate) // Opcode 0x95
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_ax_si)(i386_state *cpustate) // Opcode 0x96
+static void I386OP(xchg_ax_si)(i386_state *cpustate) // Opcode 0x96
{
UINT16 temp;
temp = REG16(AX);
@@ -2340,7 +2340,7 @@ static void I386OP(xchg_ax_si)(i386_state *cpustate) // Opcode 0x96
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_ax_di)(i386_state *cpustate) // Opcode 0x97
+static void I386OP(xchg_ax_di)(i386_state *cpustate) // Opcode 0x97
{
UINT16 temp;
temp = REG16(AX);
@@ -2349,7 +2349,7 @@ static void I386OP(xchg_ax_di)(i386_state *cpustate) // Opcode 0x97
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_r16_rm16)(i386_state *cpustate) // Opcode 0x87
+static void I386OP(xchg_r16_rm16)(i386_state *cpustate) // Opcode 0x87
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -2368,7 +2368,7 @@ static void I386OP(xchg_r16_rm16)(i386_state *cpustate) // Opcode 0x87
}
}
-static void I386OP(xor_rm16_r16)(i386_state *cpustate) // Opcode 0x31
+static void I386OP(xor_rm16_r16)(i386_state *cpustate) // Opcode 0x31
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2388,7 +2388,7 @@ static void I386OP(xor_rm16_r16)(i386_state *cpustate) // Opcode 0x31
}
}
-static void I386OP(xor_r16_rm16)(i386_state *cpustate) // Opcode 0x33
+static void I386OP(xor_r16_rm16)(i386_state *cpustate) // Opcode 0x33
{
UINT16 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2408,7 +2408,7 @@ static void I386OP(xor_r16_rm16)(i386_state *cpustate) // Opcode 0x33
}
}
-static void I386OP(xor_ax_i16)(i386_state *cpustate) // Opcode 0x35
+static void I386OP(xor_ax_i16)(i386_state *cpustate) // Opcode 0x35
{
UINT16 src, dst;
src = FETCH16(cpustate);
@@ -2420,7 +2420,7 @@ static void I386OP(xor_ax_i16)(i386_state *cpustate) // Opcode 0x35
-static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
+static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
{
UINT32 ea;
UINT16 src, dst;
@@ -2428,7 +2428,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
switch( (modrm >> 3) & 0x7 )
{
- case 0: // ADD Rm16, i16
+ case 0: // ADD Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2444,7 +2444,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 1: // OR Rm16, i16
+ case 1: // OR Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2460,7 +2460,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 2: // ADC Rm16, i16
+ case 2: // ADC Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2476,7 +2476,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 3: // SBB Rm16, i16
+ case 3: // SBB Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2492,7 +2492,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 4: // AND Rm16, i16
+ case 4: // AND Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2508,7 +2508,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 5: // SUB Rm16, i16
+ case 5: // SUB Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2524,7 +2524,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 6: // XOR Rm16, i16
+ case 6: // XOR Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2540,7 +2540,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 7: // CMP Rm16, i16
+ case 7: // CMP Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = FETCH16(cpustate);
@@ -2557,7 +2557,7 @@ static void I386OP(group81_16)(i386_state *cpustate) // Opcode 0x81
}
}
-static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
+static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
{
UINT32 ea;
UINT16 src, dst;
@@ -2565,7 +2565,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
switch( (modrm >> 3) & 0x7 )
{
- case 0: // ADD Rm16, i16
+ case 0: // ADD Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = (UINT16)(INT16)(INT8)FETCH(cpustate);
@@ -2581,7 +2581,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 1: // OR Rm16, i16
+ case 1: // OR Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = (UINT16)(INT16)(INT8)FETCH(cpustate);
@@ -2597,7 +2597,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 2: // ADC Rm16, i16
+ case 2: // ADC Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = (UINT16)(INT16)(INT8)FETCH(cpustate);
@@ -2613,7 +2613,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 3: // SBB Rm16, i16
+ case 3: // SBB Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = ((UINT16)(INT16)(INT8)FETCH(cpustate));
@@ -2629,7 +2629,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 4: // AND Rm16, i16
+ case 4: // AND Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = (UINT16)(INT16)(INT8)FETCH(cpustate);
@@ -2645,7 +2645,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 5: // SUB Rm16, i16
+ case 5: // SUB Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = (UINT16)(INT16)(INT8)FETCH(cpustate);
@@ -2661,7 +2661,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 6: // XOR Rm16, i16
+ case 6: // XOR Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = (UINT16)(INT16)(INT8)FETCH(cpustate);
@@ -2677,7 +2677,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 7: // CMP Rm16, i16
+ case 7: // CMP Rm16, i16
if( modrm >= 0xc0 ) {
dst = LOAD_RM16(modrm);
src = (UINT16)(INT16)(INT8)FETCH(cpustate);
@@ -2694,7 +2694,7 @@ static void I386OP(group83_16)(i386_state *cpustate) // Opcode 0x83
}
}
-static void I386OP(groupC1_16)(i386_state *cpustate) // Opcode 0xc1
+static void I386OP(groupC1_16)(i386_state *cpustate) // Opcode 0xc1
{
UINT16 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2714,7 +2714,7 @@ static void I386OP(groupC1_16)(i386_state *cpustate) // Opcode 0xc1
}
}
-static void I386OP(groupD1_16)(i386_state *cpustate) // Opcode 0xd1
+static void I386OP(groupD1_16)(i386_state *cpustate) // Opcode 0xd1
{
UINT16 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2731,7 +2731,7 @@ static void I386OP(groupD1_16)(i386_state *cpustate) // Opcode 0xd1
}
}
-static void I386OP(groupD3_16)(i386_state *cpustate) // Opcode 0xd3
+static void I386OP(groupD3_16)(i386_state *cpustate) // Opcode 0xd3
{
UINT16 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2748,13 +2748,13 @@ static void I386OP(groupD3_16)(i386_state *cpustate) // Opcode 0xd3
}
}
-static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
+static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* TEST Rm16, i16 */
+ case 0: /* TEST Rm16, i16 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT16 src = FETCH16(cpustate);
@@ -2772,7 +2772,7 @@ static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
CYCLES(cpustate,CYCLES_TEST_IMM_MEM);
}
break;
- case 2: /* NOT Rm16 */
+ case 2: /* NOT Rm16 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
dst = ~dst;
@@ -2786,7 +2786,7 @@ static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
CYCLES(cpustate,CYCLES_NOT_MEM);
}
break;
- case 3: /* NEG Rm16 */
+ case 3: /* NEG Rm16 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
dst = SUB16(cpustate, 0, dst );
@@ -2800,17 +2800,17 @@ static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
CYCLES(cpustate,CYCLES_NEG_MEM);
}
break;
- case 4: /* MUL AX, Rm16 */
+ case 4: /* MUL AX, Rm16 */
{
UINT32 result;
UINT16 src, dst;
if( modrm >= 0xc0 ) {
src = LOAD_RM16(modrm);
- CYCLES(cpustate,CYCLES_MUL16_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL16_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = READ16(cpustate,ea);
- CYCLES(cpustate,CYCLES_MUL16_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL16_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = REG16(AX);
@@ -2821,17 +2821,17 @@ static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
cpustate->CF = cpustate->OF = (REG16(DX) != 0);
}
break;
- case 5: /* IMUL AX, Rm16 */
+ case 5: /* IMUL AX, Rm16 */
{
INT32 result;
INT32 src, dst;
if( modrm >= 0xc0 ) {
src = (INT32)(INT16)LOAD_RM16(modrm);
- CYCLES(cpustate,CYCLES_IMUL16_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = (INT32)(INT16)READ16(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL16_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL16_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = (INT32)(INT16)REG16(AX);
@@ -2843,7 +2843,7 @@ static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
cpustate->CF = cpustate->OF = !(result == (INT32)(INT16)result);
}
break;
- case 6: /* DIV AX, Rm16 */
+ case 6: /* DIV AX, Rm16 */
{
UINT32 quotient, remainder, result;
UINT16 src;
@@ -2875,7 +2875,7 @@ static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
}
}
break;
- case 7: /* IDIV AX, Rm16 */
+ case 7: /* IDIV AX, Rm16 */
{
INT32 quotient, remainder, result;
UINT16 src;
@@ -2910,13 +2910,13 @@ static void I386OP(groupF7_16)(i386_state *cpustate) // Opcode 0xf7
}
}
-static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
+static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* INC Rm16 */
+ case 0: /* INC Rm16 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
dst = INC16(cpustate,dst);
@@ -2930,7 +2930,7 @@ static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
CYCLES(cpustate,CYCLES_INC_MEM);
}
break;
- case 1: /* DEC Rm16 */
+ case 1: /* DEC Rm16 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
dst = DEC16(cpustate,dst);
@@ -2944,23 +2944,23 @@ static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
CYCLES(cpustate,CYCLES_DEC_MEM);
}
break;
- case 2: /* CALL Rm16 */
+ case 2: /* CALL Rm16 */
{
UINT16 address;
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
- CYCLES(cpustate,CYCLES_CALL_REG); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_CALL_REG); /* TODO: Timing = 7 + m */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ16(cpustate,ea);
- CYCLES(cpustate,CYCLES_CALL_MEM); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_CALL_MEM); /* TODO: Timing = 10 + m */
}
PUSH16(cpustate, cpustate->eip );
cpustate->eip = address;
CHANGE_PC(cpustate,cpustate->eip);
}
break;
- case 3: /* CALL FAR Rm16 */
+ case 3: /* CALL FAR Rm16 */
{
UINT16 address, selector;
if( modrm >= 0xc0 )
@@ -2972,7 +2972,7 @@ static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ16(cpustate,ea + 0);
selector = READ16(cpustate,ea + 2);
- CYCLES(cpustate,CYCLES_CALL_MEM_INTERSEG); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_CALL_MEM_INTERSEG); /* TODO: Timing = 10 + m */
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -2991,22 +2991,22 @@ static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
}
}
break;
- case 4: /* JMP Rm16 */
+ case 4: /* JMP Rm16 */
{
UINT16 address;
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
- CYCLES(cpustate,CYCLES_JMP_REG); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JMP_REG); /* TODO: Timing = 7 + m */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ16(cpustate,ea);
- CYCLES(cpustate,CYCLES_JMP_MEM); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_JMP_MEM); /* TODO: Timing = 10 + m */
}
cpustate->eip = address;
CHANGE_PC(cpustate,cpustate->eip);
}
break;
- case 5: /* JMP FAR Rm16 */
+ case 5: /* JMP FAR Rm16 */
{
UINT16 address, selector;
@@ -3019,7 +3019,7 @@ static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ16(cpustate,ea + 0);
selector = READ16(cpustate,ea + 2);
- CYCLES(cpustate,CYCLES_JMP_MEM_INTERSEG); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_JMP_MEM_INTERSEG); /* TODO: Timing = 10 + m */
if(PROTECTED_MODE && !V8086_MODE)
{
i386_protected_mode_jump(cpustate,selector,address,1,0);
@@ -3035,7 +3035,7 @@ static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
}
}
break;
- case 6: /* PUSH Rm16 */
+ case 6: /* PUSH Rm16 */
{
UINT16 value;
if( modrm >= 0xc0 ) {
@@ -3057,7 +3057,7 @@ static void I386OP(groupFF_16)(i386_state *cpustate) // Opcode 0xff
}
}
-static void I386OP(group0F00_16)(i386_state *cpustate) // Opcode 0x0f 00
+static void I386OP(group0F00_16)(i386_state *cpustate) // Opcode 0x0f 00
{
UINT32 address, ea;
UINT8 modrm = FETCH(cpustate);
@@ -3066,7 +3066,7 @@ static void I386OP(group0F00_16)(i386_state *cpustate) // Opcode 0x0f 00
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* SLDT */
+ case 0: /* SLDT */
if ( PROTECTED_MODE && !V8086_MODE )
{
if( modrm >= 0xc0 ) {
@@ -3083,7 +3083,7 @@ static void I386OP(group0F00_16)(i386_state *cpustate) // Opcode 0x0f 00
i386_trap(cpustate,6, 0, 0);
}
break;
- case 1: /* STR */
+ case 1: /* STR */
if ( PROTECTED_MODE && !V8086_MODE )
{
if( modrm >= 0xc0 ) {
@@ -3100,7 +3100,7 @@ static void I386OP(group0F00_16)(i386_state *cpustate) // Opcode 0x0f 00
i386_trap(cpustate,6, 0, 0);
}
break;
- case 2: /* LLDT */
+ case 2: /* LLDT */
if ( PROTECTED_MODE && !V8086_MODE )
{
if(cpustate->CPL)
@@ -3127,7 +3127,7 @@ static void I386OP(group0F00_16)(i386_state *cpustate) // Opcode 0x0f 00
}
break;
- case 3: /* LTR */
+ case 3: /* LTR */
if ( PROTECTED_MODE && !V8086_MODE )
{
if(cpustate->CPL)
@@ -3251,7 +3251,7 @@ static void I386OP(group0F00_16)(i386_state *cpustate) // Opcode 0x0f 00
}
}
-static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
+static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
{
UINT8 modrm = FETCH(cpustate);
UINT16 address;
@@ -3259,7 +3259,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* SGDT */
+ case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
@@ -3272,7 +3272,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SGDT);
break;
}
- case 1: /* SIDT */
+ case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
@@ -3288,7 +3288,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SIDT);
break;
}
- case 2: /* LGDT */
+ case 2: /* LGDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -3303,7 +3303,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LGDT);
break;
}
- case 3: /* LIDT */
+ case 3: /* LIDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -3318,7 +3318,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LIDT);
break;
}
- case 4: /* SMSW */
+ case 4: /* SMSW */
{
if( modrm >= 0xc0 ) {
STORE_RM16(modrm, cpustate->cr[0]);
@@ -3330,7 +3330,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
}
break;
}
- case 6: /* LMSW */
+ case 6: /* LMSW */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -3355,13 +3355,13 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
}
}
-static void I386OP(group0FBA_16)(i386_state *cpustate) // Opcode 0x0f ba
+static void I386OP(group0FBA_16)(i386_state *cpustate) // Opcode 0x0f ba
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 4: /* BT Rm16, i8 */
+ case 4: /* BT Rm16, i8 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3385,7 +3385,7 @@ static void I386OP(group0FBA_16)(i386_state *cpustate) // Opcode 0x0f ba
CYCLES(cpustate,CYCLES_BT_IMM_MEM);
}
break;
- case 5: /* BTS Rm16, i8 */
+ case 5: /* BTS Rm16, i8 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3413,7 +3413,7 @@ static void I386OP(group0FBA_16)(i386_state *cpustate) // Opcode 0x0f ba
CYCLES(cpustate,CYCLES_BTS_IMM_MEM);
}
break;
- case 6: /* BTR Rm16, i8 */
+ case 6: /* BTR Rm16, i8 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3441,7 +3441,7 @@ static void I386OP(group0FBA_16)(i386_state *cpustate) // Opcode 0x0f ba
CYCLES(cpustate,CYCLES_BTR_IMM_MEM);
}
break;
- case 7: /* BTC Rm16, i8 */
+ case 7: /* BTC Rm16, i8 */
if( modrm >= 0xc0 ) {
UINT16 dst = LOAD_RM16(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3603,7 +3603,7 @@ static void I386OP(lsl_r16_rm16)(i386_state *cpustate) // Opcode 0x0f 0x03
i386_trap(cpustate,6, 0, 0);
}
-static void I386OP(bound_r16_m16_m16)(i386_state *cpustate) // Opcode 0x62
+static void I386OP(bound_r16_m16_m16)(i386_state *cpustate) // Opcode 0x62
{
UINT8 modrm;
INT16 val, low, high;
@@ -3633,7 +3633,7 @@ static void I386OP(bound_r16_m16_m16)(i386_state *cpustate) // Opcode 0x62
}
}
-static void I386OP(retf16)(i386_state *cpustate) // Opcode 0xcb
+static void I386OP(retf16)(i386_state *cpustate) // Opcode 0xcb
{
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -3650,7 +3650,7 @@ static void I386OP(retf16)(i386_state *cpustate) // Opcode 0xcb
CYCLES(cpustate,CYCLES_RET_INTERSEG);
}
-static void I386OP(retf_i16)(i386_state *cpustate) // Opcode 0xca
+static void I386OP(retf_i16)(i386_state *cpustate) // Opcode 0xca
{
UINT16 count = FETCH16(cpustate);
@@ -3685,33 +3685,32 @@ static void I386OP(load_far_pointer16)(i386_state *cpustate, int s)
}
}
-static void I386OP(lds16)(i386_state *cpustate) // Opcode 0xc5
+static void I386OP(lds16)(i386_state *cpustate) // Opcode 0xc5
{
I386OP(load_far_pointer16)(cpustate, DS);
CYCLES(cpustate,CYCLES_LDS);
}
-static void I386OP(lss16)(i386_state *cpustate) // Opcode 0x0f 0xb2
+static void I386OP(lss16)(i386_state *cpustate) // Opcode 0x0f 0xb2
{
I386OP(load_far_pointer16)(cpustate, SS);
CYCLES(cpustate,CYCLES_LSS);
}
-static void I386OP(les16)(i386_state *cpustate) // Opcode 0xc4
+static void I386OP(les16)(i386_state *cpustate) // Opcode 0xc4
{
I386OP(load_far_pointer16)(cpustate, ES);
CYCLES(cpustate,CYCLES_LES);
}
-static void I386OP(lfs16)(i386_state *cpustate) // Opcode 0x0f 0xb4
+static void I386OP(lfs16)(i386_state *cpustate) // Opcode 0x0f 0xb4
{
I386OP(load_far_pointer16)(cpustate, FS);
CYCLES(cpustate,CYCLES_LFS);
}
-static void I386OP(lgs16)(i386_state *cpustate) // Opcode 0x0f 0xb5
+static void I386OP(lgs16)(i386_state *cpustate) // Opcode 0x0f 0xb5
{
I386OP(load_far_pointer16)(cpustate, GS);
CYCLES(cpustate,CYCLES_LGS);
}
-
diff --git a/src/emu/cpu/i386/i386op32.c b/src/emu/cpu/i386/i386op32.c
index 1ae5e221a64..a139ba884c9 100644
--- a/src/emu/cpu/i386/i386op32.c
+++ b/src/emu/cpu/i386/i386op32.c
@@ -10,31 +10,31 @@ static UINT32 I386OP(shift_rotate32)(i386_state *cpustate, UINT8 modrm, UINT32 v
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm32, 1 */
+ case 0: /* ROL rm32, 1 */
cpustate->CF = (src & 0x80000000) ? 1 : 0;
dst = (src << 1) + cpustate->CF;
cpustate->OF = ((src ^ dst) & 0x80000000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm32, 1 */
+ case 1: /* ROR rm32, 1 */
cpustate->CF = (src & 0x1) ? 1 : 0;
dst = (cpustate->CF << 31) | (src >> 1);
cpustate->OF = ((src ^ dst) & 0x80000000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm32, 1 */
+ case 2: /* RCL rm32, 1 */
dst = (src << 1) + cpustate->CF;
cpustate->CF = (src & 0x80000000) ? 1 : 0;
cpustate->OF = ((src ^ dst) & 0x80000000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm32, 1 */
+ case 3: /* RCR rm32, 1 */
dst = (cpustate->CF << 31) | (src >> 1);
cpustate->CF = src & 0x1;
cpustate->OF = ((src ^ dst) & 0x80000000) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm32, 1 */
+ case 4: /* SHL/SAL rm32, 1 */
case 6:
dst = src << 1;
cpustate->CF = (src & 0x80000000) ? 1 : 0;
@@ -42,14 +42,14 @@ static UINT32 I386OP(shift_rotate32)(i386_state *cpustate, UINT8 modrm, UINT32 v
SetSZPF32(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm32, 1 */
+ case 5: /* SHR rm32, 1 */
dst = src >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = (src & 0x80000000) ? 1 : 0;
SetSZPF32(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm32, 1 */
+ case 7: /* SAR rm32, 1 */
dst = (INT32)(src) >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = 0;
@@ -62,50 +62,50 @@ static UINT32 I386OP(shift_rotate32)(i386_state *cpustate, UINT8 modrm, UINT32 v
shift &= 31;
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm32, i8 */
+ case 0: /* ROL rm32, i8 */
dst = ((src & ((UINT32)0xffffffff >> shift)) << shift) |
- ((src & ((UINT32)0xffffffff << (32-shift))) >> (32-shift));
+ ((src & ((UINT32)0xffffffff << (32-shift))) >> (32-shift));
cpustate->CF = dst & 0x1;
cpustate->OF = (dst & 1) ^ (dst >> 31);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm32, i8 */
+ case 1: /* ROR rm32, i8 */
dst = ((src & ((UINT32)0xffffffff << shift)) >> shift) |
- ((src & ((UINT32)0xffffffff >> (32-shift))) << (32-shift));
+ ((src & ((UINT32)0xffffffff >> (32-shift))) << (32-shift));
cpustate->CF = (dst >> 31) & 0x1;
cpustate->OF = ((dst >> 31) ^ (dst >> 30)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm32, i8 */
+ case 2: /* RCL rm32, i8 */
dst = ((src & ((UINT32)0xffffffff >> shift)) << shift) |
- ((src & ((UINT32)0xffffffff << (33-shift))) >> (33-shift)) |
- (cpustate->CF << (shift-1));
+ ((src & ((UINT32)0xffffffff << (33-shift))) >> (33-shift)) |
+ (cpustate->CF << (shift-1));
cpustate->CF = (src >> (32-shift)) & 0x1;
cpustate->OF = cpustate->CF ^ ((dst >> 31) & 1);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm32, i8 */
+ case 3: /* RCR rm32, i8 */
dst = ((src & ((UINT32)0xffffffff << shift)) >> shift) |
- ((src & ((UINT32)0xffffffff >> (32-shift))) << (33-shift)) |
- (cpustate->CF << (32-shift));
+ ((src & ((UINT32)0xffffffff >> (32-shift))) << (33-shift)) |
+ (cpustate->CF << (32-shift));
cpustate->CF = (src >> (shift-1)) & 0x1;
cpustate->OF = ((dst >> 31) ^ (dst >> 30)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm32, i8 */
+ case 4: /* SHL/SAL rm32, i8 */
case 6:
dst = src << shift;
cpustate->CF = (src & (1 << (32-shift))) ? 1 : 0;
SetSZPF32(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm32, i8 */
+ case 5: /* SHR rm32, i8 */
dst = src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF32(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm32, i8 */
+ case 7: /* SAR rm32, i8 */
dst = (INT32)src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF32(dst);
@@ -119,7 +119,7 @@ static UINT32 I386OP(shift_rotate32)(i386_state *cpustate, UINT8 modrm, UINT32 v
-static void I386OP(adc_rm32_r32)(i386_state *cpustate) // Opcode 0x11
+static void I386OP(adc_rm32_r32)(i386_state *cpustate) // Opcode 0x11
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -139,7 +139,7 @@ static void I386OP(adc_rm32_r32)(i386_state *cpustate) // Opcode 0x11
}
}
-static void I386OP(adc_r32_rm32)(i386_state *cpustate) // Opcode 0x13
+static void I386OP(adc_r32_rm32)(i386_state *cpustate) // Opcode 0x13
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -159,7 +159,7 @@ static void I386OP(adc_r32_rm32)(i386_state *cpustate) // Opcode 0x13
}
}
-static void I386OP(adc_eax_i32)(i386_state *cpustate) // Opcode 0x15
+static void I386OP(adc_eax_i32)(i386_state *cpustate) // Opcode 0x15
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -169,7 +169,7 @@ static void I386OP(adc_eax_i32)(i386_state *cpustate) // Opcode 0x15
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(add_rm32_r32)(i386_state *cpustate) // Opcode 0x01
+static void I386OP(add_rm32_r32)(i386_state *cpustate) // Opcode 0x01
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -189,7 +189,7 @@ static void I386OP(add_rm32_r32)(i386_state *cpustate) // Opcode 0x01
}
}
-static void I386OP(add_r32_rm32)(i386_state *cpustate) // Opcode 0x03
+static void I386OP(add_r32_rm32)(i386_state *cpustate) // Opcode 0x03
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -209,7 +209,7 @@ static void I386OP(add_r32_rm32)(i386_state *cpustate) // Opcode 0x03
}
}
-static void I386OP(add_eax_i32)(i386_state *cpustate) // Opcode 0x05
+static void I386OP(add_eax_i32)(i386_state *cpustate) // Opcode 0x05
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -219,7 +219,7 @@ static void I386OP(add_eax_i32)(i386_state *cpustate) // Opcode 0x05
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(and_rm32_r32)(i386_state *cpustate) // Opcode 0x21
+static void I386OP(and_rm32_r32)(i386_state *cpustate) // Opcode 0x21
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -239,7 +239,7 @@ static void I386OP(and_rm32_r32)(i386_state *cpustate) // Opcode 0x21
}
}
-static void I386OP(and_r32_rm32)(i386_state *cpustate) // Opcode 0x23
+static void I386OP(and_r32_rm32)(i386_state *cpustate) // Opcode 0x23
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -259,7 +259,7 @@ static void I386OP(and_r32_rm32)(i386_state *cpustate) // Opcode 0x23
}
}
-static void I386OP(and_eax_i32)(i386_state *cpustate) // Opcode 0x25
+static void I386OP(and_eax_i32)(i386_state *cpustate) // Opcode 0x25
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -269,7 +269,7 @@ static void I386OP(and_eax_i32)(i386_state *cpustate) // Opcode 0x25
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(bsf_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bc
+static void I386OP(bsf_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bc
{
UINT32 src, dst, temp;
UINT8 modrm = FETCH(cpustate);
@@ -298,7 +298,7 @@ static void I386OP(bsf_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bc
CYCLES(cpustate,CYCLES_BSF_BASE);
}
-static void I386OP(bsr_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bd
+static void I386OP(bsr_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bd
{
UINT32 src, dst, temp;
UINT8 modrm = FETCH(cpustate);
@@ -327,7 +327,7 @@ static void I386OP(bsr_r32_rm32)(i386_state *cpustate) // Opcode 0x0f bd
CYCLES(cpustate,CYCLES_BSR_BASE);
}
-static void I386OP(bt_rm32_r32)(i386_state *cpustate) // Opcode 0x0f a3
+static void I386OP(bt_rm32_r32)(i386_state *cpustate) // Opcode 0x0f a3
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -358,7 +358,7 @@ static void I386OP(bt_rm32_r32)(i386_state *cpustate) // Opcode 0x0f a3
}
}
-static void I386OP(btc_rm32_r32)(i386_state *cpustate) // Opcode 0x0f bb
+static void I386OP(btc_rm32_r32)(i386_state *cpustate) // Opcode 0x0f bb
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -393,7 +393,7 @@ static void I386OP(btc_rm32_r32)(i386_state *cpustate) // Opcode 0x0f bb
}
}
-static void I386OP(btr_rm32_r32)(i386_state *cpustate) // Opcode 0x0f b3
+static void I386OP(btr_rm32_r32)(i386_state *cpustate) // Opcode 0x0f b3
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -428,7 +428,7 @@ static void I386OP(btr_rm32_r32)(i386_state *cpustate) // Opcode 0x0f b3
}
}
-static void I386OP(bts_rm32_r32)(i386_state *cpustate) // Opcode 0x0f ab
+static void I386OP(bts_rm32_r32)(i386_state *cpustate) // Opcode 0x0f ab
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -463,7 +463,7 @@ static void I386OP(bts_rm32_r32)(i386_state *cpustate) // Opcode 0x0f ab
}
}
-static void I386OP(call_abs32)(i386_state *cpustate) // Opcode 0x9a
+static void I386OP(call_abs32)(i386_state *cpustate) // Opcode 0x9a
{
UINT32 offset = FETCH32(cpustate);
UINT16 ptr = FETCH16(cpustate);
@@ -485,16 +485,16 @@ static void I386OP(call_abs32)(i386_state *cpustate) // Opcode 0x9a
CHANGE_PC(cpustate,cpustate->eip);
}
-static void I386OP(call_rel32)(i386_state *cpustate) // Opcode 0xe8
+static void I386OP(call_rel32)(i386_state *cpustate) // Opcode 0xe8
{
INT32 disp = FETCH32(cpustate);
PUSH32(cpustate, cpustate->eip );
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_CALL); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_CALL); /* TODO: Timing = 7 + m */
}
-static void I386OP(cdq)(i386_state *cpustate) // Opcode 0x99
+static void I386OP(cdq)(i386_state *cpustate) // Opcode 0x99
{
if( REG32(EAX) & 0x80000000 ) {
REG32(EDX) = 0xffffffff;
@@ -504,7 +504,7 @@ static void I386OP(cdq)(i386_state *cpustate) // Opcode 0x99
CYCLES(cpustate,CYCLES_CWD);
}
-static void I386OP(cmp_rm32_r32)(i386_state *cpustate) // Opcode 0x39
+static void I386OP(cmp_rm32_r32)(i386_state *cpustate) // Opcode 0x39
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -522,7 +522,7 @@ static void I386OP(cmp_rm32_r32)(i386_state *cpustate) // Opcode 0x39
}
}
-static void I386OP(cmp_r32_rm32)(i386_state *cpustate) // Opcode 0x3b
+static void I386OP(cmp_r32_rm32)(i386_state *cpustate) // Opcode 0x3b
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -540,7 +540,7 @@ static void I386OP(cmp_r32_rm32)(i386_state *cpustate) // Opcode 0x3b
}
}
-static void I386OP(cmp_eax_i32)(i386_state *cpustate) // Opcode 0x3d
+static void I386OP(cmp_eax_i32)(i386_state *cpustate) // Opcode 0x3d
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -549,7 +549,7 @@ static void I386OP(cmp_eax_i32)(i386_state *cpustate) // Opcode 0x3d
CYCLES(cpustate,CYCLES_CMP_IMM_ACC);
}
-static void I386OP(cmpsd)(i386_state *cpustate) // Opcode 0xa7
+static void I386OP(cmpsd)(i386_state *cpustate) // Opcode 0xa7
{
UINT32 eas, ead, src, dst;
if( cpustate->segment_prefix ) {
@@ -566,72 +566,72 @@ static void I386OP(cmpsd)(i386_state *cpustate) // Opcode 0xa7
CYCLES(cpustate,CYCLES_CMPS);
}
-static void I386OP(cwde)(i386_state *cpustate) // Opcode 0x98
+static void I386OP(cwde)(i386_state *cpustate) // Opcode 0x98
{
REG32(EAX) = (INT32)((INT16)REG16(AX));
CYCLES(cpustate,CYCLES_CBW);
}
-static void I386OP(dec_eax)(i386_state *cpustate) // Opcode 0x48
+static void I386OP(dec_eax)(i386_state *cpustate) // Opcode 0x48
{
REG32(EAX) = DEC32(cpustate, REG32(EAX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_ecx)(i386_state *cpustate) // Opcode 0x49
+static void I386OP(dec_ecx)(i386_state *cpustate) // Opcode 0x49
{
REG32(ECX) = DEC32(cpustate, REG32(ECX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_edx)(i386_state *cpustate) // Opcode 0x4a
+static void I386OP(dec_edx)(i386_state *cpustate) // Opcode 0x4a
{
REG32(EDX) = DEC32(cpustate, REG32(EDX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_ebx)(i386_state *cpustate) // Opcode 0x4b
+static void I386OP(dec_ebx)(i386_state *cpustate) // Opcode 0x4b
{
REG32(EBX) = DEC32(cpustate, REG32(EBX) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_esp)(i386_state *cpustate) // Opcode 0x4c
+static void I386OP(dec_esp)(i386_state *cpustate) // Opcode 0x4c
{
REG32(ESP) = DEC32(cpustate, REG32(ESP) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_ebp)(i386_state *cpustate) // Opcode 0x4d
+static void I386OP(dec_ebp)(i386_state *cpustate) // Opcode 0x4d
{
REG32(EBP) = DEC32(cpustate, REG32(EBP) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_esi)(i386_state *cpustate) // Opcode 0x4e
+static void I386OP(dec_esi)(i386_state *cpustate) // Opcode 0x4e
{
REG32(ESI) = DEC32(cpustate, REG32(ESI) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(dec_edi)(i386_state *cpustate) // Opcode 0x4f
+static void I386OP(dec_edi)(i386_state *cpustate) // Opcode 0x4f
{
REG32(EDI) = DEC32(cpustate, REG32(EDI) );
CYCLES(cpustate,CYCLES_DEC_REG);
}
-static void I386OP(imul_r32_rm32)(i386_state *cpustate) // Opcode 0x0f af
+static void I386OP(imul_r32_rm32)(i386_state *cpustate) // Opcode 0x0f af
{
UINT8 modrm = FETCH(cpustate);
INT64 result;
INT64 src, dst;
if( modrm >= 0xc0 ) {
src = (INT64)(INT32)LOAD_RM32(modrm);
- CYCLES(cpustate,CYCLES_IMUL32_REG_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_REG_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = (INT64)(INT32)READ32(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL32_REG_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_REG_REG); /* TODO: Correct multiply timing */
}
dst = (INT64)(INT32)LOAD_REG32(modrm);
@@ -642,18 +642,18 @@ static void I386OP(imul_r32_rm32)(i386_state *cpustate) // Opcode 0x0f af
cpustate->CF = cpustate->OF = !(result == (INT64)(INT32)result);
}
-static void I386OP(imul_r32_rm32_i32)(i386_state *cpustate) // Opcode 0x69
+static void I386OP(imul_r32_rm32_i32)(i386_state *cpustate) // Opcode 0x69
{
UINT8 modrm = FETCH(cpustate);
INT64 result;
INT64 src, dst;
if( modrm >= 0xc0 ) {
dst = (INT64)(INT32)LOAD_RM32(modrm);
- CYCLES(cpustate,CYCLES_IMUL32_REG_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
dst = (INT64)(INT32)READ32(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL32_MEM_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
src = (INT64)(INT32)FETCH32(cpustate);
@@ -664,18 +664,18 @@ static void I386OP(imul_r32_rm32_i32)(i386_state *cpustate) // Opcode 0x69
cpustate->CF = cpustate->OF = !(result == (INT64)(INT32)result);
}
-static void I386OP(imul_r32_rm32_i8)(i386_state *cpustate) // Opcode 0x6b
+static void I386OP(imul_r32_rm32_i8)(i386_state *cpustate) // Opcode 0x6b
{
UINT8 modrm = FETCH(cpustate);
INT64 result;
INT64 src, dst;
if( modrm >= 0xc0 ) {
dst = (INT64)(INT32)LOAD_RM32(modrm);
- CYCLES(cpustate,CYCLES_IMUL32_REG_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_REG_IMM_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
dst = (INT64)(INT32)READ32(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL32_MEM_IMM_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_MEM_IMM_REG); /* TODO: Correct multiply timing */
}
src = (INT64)(INT8)FETCH(cpustate);
@@ -686,7 +686,7 @@ static void I386OP(imul_r32_rm32_i8)(i386_state *cpustate) // Opcode 0x6b
cpustate->CF = cpustate->OF = !(result == (INT64)(INT32)result);
}
-static void I386OP(in_eax_i8)(i386_state *cpustate) // Opcode 0xe5
+static void I386OP(in_eax_i8)(i386_state *cpustate) // Opcode 0xe5
{
UINT16 port = FETCH(cpustate);
UINT32 data = READPORT32(cpustate, port);
@@ -694,7 +694,7 @@ static void I386OP(in_eax_i8)(i386_state *cpustate) // Opcode 0xe5
CYCLES(cpustate,CYCLES_IN_VAR);
}
-static void I386OP(in_eax_dx)(i386_state *cpustate) // Opcode 0xed
+static void I386OP(in_eax_dx)(i386_state *cpustate) // Opcode 0xed
{
UINT16 port = REG16(DX);
UINT32 data = READPORT32(cpustate, port);
@@ -702,55 +702,55 @@ static void I386OP(in_eax_dx)(i386_state *cpustate) // Opcode 0xed
CYCLES(cpustate,CYCLES_IN);
}
-static void I386OP(inc_eax)(i386_state *cpustate) // Opcode 0x40
+static void I386OP(inc_eax)(i386_state *cpustate) // Opcode 0x40
{
REG32(EAX) = INC32(cpustate, REG32(EAX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_ecx)(i386_state *cpustate) // Opcode 0x41
+static void I386OP(inc_ecx)(i386_state *cpustate) // Opcode 0x41
{
REG32(ECX) = INC32(cpustate, REG32(ECX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_edx)(i386_state *cpustate) // Opcode 0x42
+static void I386OP(inc_edx)(i386_state *cpustate) // Opcode 0x42
{
REG32(EDX) = INC32(cpustate, REG32(EDX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_ebx)(i386_state *cpustate) // Opcode 0x43
+static void I386OP(inc_ebx)(i386_state *cpustate) // Opcode 0x43
{
REG32(EBX) = INC32(cpustate, REG32(EBX) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_esp)(i386_state *cpustate) // Opcode 0x44
+static void I386OP(inc_esp)(i386_state *cpustate) // Opcode 0x44
{
REG32(ESP) = INC32(cpustate, REG32(ESP) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_ebp)(i386_state *cpustate) // Opcode 0x45
+static void I386OP(inc_ebp)(i386_state *cpustate) // Opcode 0x45
{
REG32(EBP) = INC32(cpustate, REG32(EBP) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_esi)(i386_state *cpustate) // Opcode 0x46
+static void I386OP(inc_esi)(i386_state *cpustate) // Opcode 0x46
{
REG32(ESI) = INC32(cpustate, REG32(ESI) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(inc_edi)(i386_state *cpustate) // Opcode 0x47
+static void I386OP(inc_edi)(i386_state *cpustate) // Opcode 0x47
{
REG32(EDI) = INC32(cpustate, REG32(EDI) );
CYCLES(cpustate,CYCLES_INC_REG);
}
-static void I386OP(iret32)(i386_state *cpustate) // Opcode 0xcf
+static void I386OP(iret32)(i386_state *cpustate) // Opcode 0xcf
{
if( PROTECTED_MODE )
{
@@ -769,221 +769,221 @@ static void I386OP(iret32)(i386_state *cpustate) // Opcode 0xcf
CYCLES(cpustate,CYCLES_IRET);
}
-static void I386OP(ja_rel32)(i386_state *cpustate) // Opcode 0x0f 87
+static void I386OP(ja_rel32)(i386_state *cpustate) // Opcode 0x0f 87
{
INT32 disp = FETCH32(cpustate);
if( cpustate->CF == 0 && cpustate->ZF == 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jbe_rel32)(i386_state *cpustate) // Opcode 0x0f 86
+static void I386OP(jbe_rel32)(i386_state *cpustate) // Opcode 0x0f 86
{
INT32 disp = FETCH32(cpustate);
if( cpustate->CF != 0 || cpustate->ZF != 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jc_rel32)(i386_state *cpustate) // Opcode 0x0f 82
+static void I386OP(jc_rel32)(i386_state *cpustate) // Opcode 0x0f 82
{
INT32 disp = FETCH32(cpustate);
if( cpustate->CF != 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jg_rel32)(i386_state *cpustate) // Opcode 0x0f 8f
+static void I386OP(jg_rel32)(i386_state *cpustate) // Opcode 0x0f 8f
{
INT32 disp = FETCH32(cpustate);
if( cpustate->ZF == 0 && (cpustate->SF == cpustate->OF) ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jge_rel32)(i386_state *cpustate) // Opcode 0x0f 8d
+static void I386OP(jge_rel32)(i386_state *cpustate) // Opcode 0x0f 8d
{
INT32 disp = FETCH32(cpustate);
if(cpustate->SF == cpustate->OF) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jl_rel32)(i386_state *cpustate) // Opcode 0x0f 8c
+static void I386OP(jl_rel32)(i386_state *cpustate) // Opcode 0x0f 8c
{
INT32 disp = FETCH32(cpustate);
if( (cpustate->SF != cpustate->OF) ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jle_rel32)(i386_state *cpustate) // Opcode 0x0f 8e
+static void I386OP(jle_rel32)(i386_state *cpustate) // Opcode 0x0f 8e
{
INT32 disp = FETCH32(cpustate);
if( cpustate->ZF != 0 || (cpustate->SF != cpustate->OF) ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jnc_rel32)(i386_state *cpustate) // Opcode 0x0f 83
+static void I386OP(jnc_rel32)(i386_state *cpustate) // Opcode 0x0f 83
{
INT32 disp = FETCH32(cpustate);
if( cpustate->CF == 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jno_rel32)(i386_state *cpustate) // Opcode 0x0f 81
+static void I386OP(jno_rel32)(i386_state *cpustate) // Opcode 0x0f 81
{
INT32 disp = FETCH32(cpustate);
if( cpustate->OF == 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jnp_rel32)(i386_state *cpustate) // Opcode 0x0f 8b
+static void I386OP(jnp_rel32)(i386_state *cpustate) // Opcode 0x0f 8b
{
INT32 disp = FETCH32(cpustate);
if( cpustate->PF == 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jns_rel32)(i386_state *cpustate) // Opcode 0x0f 89
+static void I386OP(jns_rel32)(i386_state *cpustate) // Opcode 0x0f 89
{
INT32 disp = FETCH32(cpustate);
if( cpustate->SF == 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jnz_rel32)(i386_state *cpustate) // Opcode 0x0f 85
+static void I386OP(jnz_rel32)(i386_state *cpustate) // Opcode 0x0f 85
{
INT32 disp = FETCH32(cpustate);
if( cpustate->ZF == 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jo_rel32)(i386_state *cpustate) // Opcode 0x0f 80
+static void I386OP(jo_rel32)(i386_state *cpustate) // Opcode 0x0f 80
{
INT32 disp = FETCH32(cpustate);
if( cpustate->OF != 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jp_rel32)(i386_state *cpustate) // Opcode 0x0f 8a
+static void I386OP(jp_rel32)(i386_state *cpustate) // Opcode 0x0f 8a
{
INT32 disp = FETCH32(cpustate);
if( cpustate->PF != 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(js_rel32)(i386_state *cpustate) // Opcode 0x0f 88
+static void I386OP(js_rel32)(i386_state *cpustate) // Opcode 0x0f 88
{
INT32 disp = FETCH32(cpustate);
if( cpustate->SF != 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jz_rel32)(i386_state *cpustate) // Opcode 0x0f 84
+static void I386OP(jz_rel32)(i386_state *cpustate) // Opcode 0x0f 84
{
INT32 disp = FETCH32(cpustate);
if( cpustate->ZF != 0 ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_FULL_DISP); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_FULL_DISP_NOBRANCH);
}
}
-static void I386OP(jcxz32)(i386_state *cpustate) // Opcode 0xe3
+static void I386OP(jcxz32)(i386_state *cpustate) // Opcode 0xe3
{
INT8 disp = FETCH(cpustate);
int val = (cpustate->address_size)?(REG32(ECX) == 0):(REG16(CX) == 0);
if( val ) {
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JCXZ); /* TODO: Timing = 9 + m */
+ CYCLES(cpustate,CYCLES_JCXZ); /* TODO: Timing = 9 + m */
} else {
CYCLES(cpustate,CYCLES_JCXZ_NOBRANCH);
}
}
-static void I386OP(jmp_rel32)(i386_state *cpustate) // Opcode 0xe9
+static void I386OP(jmp_rel32)(i386_state *cpustate) // Opcode 0xe9
{
UINT32 disp = FETCH32(cpustate);
/* TODO: Segment limit */
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_JMP); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JMP); /* TODO: Timing = 7 + m */
}
-static void I386OP(jmp_abs32)(i386_state *cpustate) // Opcode 0xea
+static void I386OP(jmp_abs32)(i386_state *cpustate) // Opcode 0xea
{
UINT32 address = FETCH32(cpustate);
UINT16 segment = FETCH16(cpustate);
@@ -1003,7 +1003,7 @@ static void I386OP(jmp_abs32)(i386_state *cpustate) // Opcode 0xea
CYCLES(cpustate,CYCLES_JMP_INTERSEG);
}
-static void I386OP(lea32)(i386_state *cpustate) // Opcode 0x8d
+static void I386OP(lea32)(i386_state *cpustate) // Opcode 0x8d
{
UINT8 modrm = FETCH(cpustate);
UINT32 ea = GetNonTranslatedEA(cpustate,modrm,NULL);
@@ -1015,7 +1015,7 @@ static void I386OP(lea32)(i386_state *cpustate) // Opcode 0x8d
CYCLES(cpustate,CYCLES_LEA);
}
-static void I386OP(enter32)(i386_state *cpustate) // Opcode 0xc8
+static void I386OP(enter32)(i386_state *cpustate) // Opcode 0xc8
{
UINT16 framesize = FETCH16(cpustate);
UINT8 level = FETCH(cpustate) % 32;
@@ -1044,7 +1044,7 @@ static void I386OP(enter32)(i386_state *cpustate) // Opcode 0xc8
CYCLES(cpustate,CYCLES_ENTER);
}
-static void I386OP(leave32)(i386_state *cpustate) // Opcode 0xc9
+static void I386OP(leave32)(i386_state *cpustate) // Opcode 0xc9
{
if(!STACK_32BIT)
REG16(SP) = REG16(BP);
@@ -1054,7 +1054,7 @@ static void I386OP(leave32)(i386_state *cpustate) // Opcode 0xc9
CYCLES(cpustate,CYCLES_LEAVE);
}
-static void I386OP(lodsd)(i386_state *cpustate) // Opcode 0xad
+static void I386OP(lodsd)(i386_state *cpustate) // Opcode 0xad
{
UINT32 eas;
if( cpustate->segment_prefix ) {
@@ -1067,7 +1067,7 @@ static void I386OP(lodsd)(i386_state *cpustate) // Opcode 0xad
CYCLES(cpustate,CYCLES_LODS);
}
-static void I386OP(loop32)(i386_state *cpustate) // Opcode 0xe2
+static void I386OP(loop32)(i386_state *cpustate) // Opcode 0xe2
{
INT8 disp = FETCH(cpustate);
INT32 reg = (cpustate->address_size)?--REG32(ECX):--REG16(CX);
@@ -1075,10 +1075,10 @@ static void I386OP(loop32)(i386_state *cpustate) // Opcode 0xe2
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
}
- CYCLES(cpustate,CYCLES_LOOP); /* TODO: Timing = 11 + m */
+ CYCLES(cpustate,CYCLES_LOOP); /* TODO: Timing = 11 + m */
}
-static void I386OP(loopne32)(i386_state *cpustate) // Opcode 0xe0
+static void I386OP(loopne32)(i386_state *cpustate) // Opcode 0xe0
{
INT8 disp = FETCH(cpustate);
INT32 reg = (cpustate->address_size)?--REG32(ECX):--REG16(CX);
@@ -1086,10 +1086,10 @@ static void I386OP(loopne32)(i386_state *cpustate) // Opcode 0xe0
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
}
- CYCLES(cpustate,CYCLES_LOOPNZ); /* TODO: Timing = 11 + m */
+ CYCLES(cpustate,CYCLES_LOOPNZ); /* TODO: Timing = 11 + m */
}
-static void I386OP(loopz32)(i386_state *cpustate) // Opcode 0xe1
+static void I386OP(loopz32)(i386_state *cpustate) // Opcode 0xe1
{
INT8 disp = FETCH(cpustate);
INT32 reg = (cpustate->address_size)?--REG32(ECX):--REG16(CX);
@@ -1097,10 +1097,10 @@ static void I386OP(loopz32)(i386_state *cpustate) // Opcode 0xe1
cpustate->eip += disp;
CHANGE_PC(cpustate,cpustate->eip);
}
- CYCLES(cpustate,CYCLES_LOOPZ); /* TODO: Timing = 11 + m */
+ CYCLES(cpustate,CYCLES_LOOPZ); /* TODO: Timing = 11 + m */
}
-static void I386OP(mov_rm32_r32)(i386_state *cpustate) // Opcode 0x89
+static void I386OP(mov_rm32_r32)(i386_state *cpustate) // Opcode 0x89
{
UINT32 src;
UINT8 modrm = FETCH(cpustate);
@@ -1116,7 +1116,7 @@ static void I386OP(mov_rm32_r32)(i386_state *cpustate) // Opcode 0x89
}
}
-static void I386OP(mov_r32_rm32)(i386_state *cpustate) // Opcode 0x8b
+static void I386OP(mov_r32_rm32)(i386_state *cpustate) // Opcode 0x8b
{
UINT32 src;
UINT8 modrm = FETCH(cpustate);
@@ -1132,7 +1132,7 @@ static void I386OP(mov_r32_rm32)(i386_state *cpustate) // Opcode 0x8b
}
}
-static void I386OP(mov_rm32_i32)(i386_state *cpustate) // Opcode 0xc7
+static void I386OP(mov_rm32_i32)(i386_state *cpustate) // Opcode 0xc7
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1147,7 +1147,7 @@ static void I386OP(mov_rm32_i32)(i386_state *cpustate) // Opcode 0xc7
}
}
-static void I386OP(mov_eax_m32)(i386_state *cpustate) // Opcode 0xa1
+static void I386OP(mov_eax_m32)(i386_state *cpustate) // Opcode 0xa1
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -1164,7 +1164,7 @@ static void I386OP(mov_eax_m32)(i386_state *cpustate) // Opcode 0xa1
CYCLES(cpustate,CYCLES_MOV_MEM_ACC);
}
-static void I386OP(mov_m32_eax)(i386_state *cpustate) // Opcode 0xa3
+static void I386OP(mov_m32_eax)(i386_state *cpustate) // Opcode 0xa3
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -1181,55 +1181,55 @@ static void I386OP(mov_m32_eax)(i386_state *cpustate) // Opcode 0xa3
CYCLES(cpustate,CYCLES_MOV_ACC_MEM);
}
-static void I386OP(mov_eax_i32)(i386_state *cpustate) // Opcode 0xb8
+static void I386OP(mov_eax_i32)(i386_state *cpustate) // Opcode 0xb8
{
REG32(EAX) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_ecx_i32)(i386_state *cpustate) // Opcode 0xb9
+static void I386OP(mov_ecx_i32)(i386_state *cpustate) // Opcode 0xb9
{
REG32(ECX) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_edx_i32)(i386_state *cpustate) // Opcode 0xba
+static void I386OP(mov_edx_i32)(i386_state *cpustate) // Opcode 0xba
{
REG32(EDX) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_ebx_i32)(i386_state *cpustate) // Opcode 0xbb
+static void I386OP(mov_ebx_i32)(i386_state *cpustate) // Opcode 0xbb
{
REG32(EBX) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_esp_i32)(i386_state *cpustate) // Opcode 0xbc
+static void I386OP(mov_esp_i32)(i386_state *cpustate) // Opcode 0xbc
{
REG32(ESP) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_ebp_i32)(i386_state *cpustate) // Opcode 0xbd
+static void I386OP(mov_ebp_i32)(i386_state *cpustate) // Opcode 0xbd
{
REG32(EBP) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_esi_i32)(i386_state *cpustate) // Opcode 0xbe
+static void I386OP(mov_esi_i32)(i386_state *cpustate) // Opcode 0xbe
{
REG32(ESI) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_edi_i32)(i386_state *cpustate) // Opcode 0xbf
+static void I386OP(mov_edi_i32)(i386_state *cpustate) // Opcode 0xbf
{
REG32(EDI) = FETCH32(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(movsd)(i386_state *cpustate) // Opcode 0xa5
+static void I386OP(movsd)(i386_state *cpustate) // Opcode 0xa5
{
UINT32 eas, ead, v;
if( cpustate->segment_prefix ) {
@@ -1245,7 +1245,7 @@ static void I386OP(movsd)(i386_state *cpustate) // Opcode 0xa5
CYCLES(cpustate,CYCLES_MOVS);
}
-static void I386OP(movsx_r32_rm8)(i386_state *cpustate) // Opcode 0x0f be
+static void I386OP(movsx_r32_rm8)(i386_state *cpustate) // Opcode 0x0f be
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1260,7 +1260,7 @@ static void I386OP(movsx_r32_rm8)(i386_state *cpustate) // Opcode 0x0f be
}
}
-static void I386OP(movsx_r32_rm16)(i386_state *cpustate) // Opcode 0x0f bf
+static void I386OP(movsx_r32_rm16)(i386_state *cpustate) // Opcode 0x0f bf
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1275,7 +1275,7 @@ static void I386OP(movsx_r32_rm16)(i386_state *cpustate) // Opcode 0x0f bf
}
}
-static void I386OP(movzx_r32_rm8)(i386_state *cpustate) // Opcode 0x0f b6
+static void I386OP(movzx_r32_rm8)(i386_state *cpustate) // Opcode 0x0f b6
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1290,7 +1290,7 @@ static void I386OP(movzx_r32_rm8)(i386_state *cpustate) // Opcode 0x0f b6
}
}
-static void I386OP(movzx_r32_rm16)(i386_state *cpustate) // Opcode 0x0f b7
+static void I386OP(movzx_r32_rm16)(i386_state *cpustate) // Opcode 0x0f b7
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1305,7 +1305,7 @@ static void I386OP(movzx_r32_rm16)(i386_state *cpustate) // Opcode 0x0f b7
}
}
-static void I386OP(or_rm32_r32)(i386_state *cpustate) // Opcode 0x09
+static void I386OP(or_rm32_r32)(i386_state *cpustate) // Opcode 0x09
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1325,7 +1325,7 @@ static void I386OP(or_rm32_r32)(i386_state *cpustate) // Opcode 0x09
}
}
-static void I386OP(or_r32_rm32)(i386_state *cpustate) // Opcode 0x0b
+static void I386OP(or_r32_rm32)(i386_state *cpustate) // Opcode 0x0b
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1345,7 +1345,7 @@ static void I386OP(or_r32_rm32)(i386_state *cpustate) // Opcode 0x0b
}
}
-static void I386OP(or_eax_i32)(i386_state *cpustate) // Opcode 0x0d
+static void I386OP(or_eax_i32)(i386_state *cpustate) // Opcode 0x0d
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -1355,7 +1355,7 @@ static void I386OP(or_eax_i32)(i386_state *cpustate) // Opcode 0x0d
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(out_eax_i8)(i386_state *cpustate) // Opcode 0xe7
+static void I386OP(out_eax_i8)(i386_state *cpustate) // Opcode 0xe7
{
UINT16 port = FETCH(cpustate);
UINT32 data = REG32(EAX);
@@ -1363,7 +1363,7 @@ static void I386OP(out_eax_i8)(i386_state *cpustate) // Opcode 0xe7
CYCLES(cpustate,CYCLES_OUT_VAR);
}
-static void I386OP(out_eax_dx)(i386_state *cpustate) // Opcode 0xef
+static void I386OP(out_eax_dx)(i386_state *cpustate) // Opcode 0xef
{
UINT16 port = REG16(DX);
UINT32 data = REG32(EAX);
@@ -1371,7 +1371,7 @@ static void I386OP(out_eax_dx)(i386_state *cpustate) // Opcode 0xef
CYCLES(cpustate,CYCLES_OUT);
}
-static void I386OP(pop_eax)(i386_state *cpustate) // Opcode 0x58
+static void I386OP(pop_eax)(i386_state *cpustate) // Opcode 0x58
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1381,7 +1381,7 @@ static void I386OP(pop_eax)(i386_state *cpustate) // Opcode 0x58
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_ecx)(i386_state *cpustate) // Opcode 0x59
+static void I386OP(pop_ecx)(i386_state *cpustate) // Opcode 0x59
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1391,7 +1391,7 @@ static void I386OP(pop_ecx)(i386_state *cpustate) // Opcode 0x59
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_edx)(i386_state *cpustate) // Opcode 0x5a
+static void I386OP(pop_edx)(i386_state *cpustate) // Opcode 0x5a
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1401,7 +1401,7 @@ static void I386OP(pop_edx)(i386_state *cpustate) // Opcode 0x5a
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_ebx)(i386_state *cpustate) // Opcode 0x5b
+static void I386OP(pop_ebx)(i386_state *cpustate) // Opcode 0x5b
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1411,7 +1411,7 @@ static void I386OP(pop_ebx)(i386_state *cpustate) // Opcode 0x5b
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_esp)(i386_state *cpustate) // Opcode 0x5c
+static void I386OP(pop_esp)(i386_state *cpustate) // Opcode 0x5c
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1421,7 +1421,7 @@ static void I386OP(pop_esp)(i386_state *cpustate) // Opcode 0x5c
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_ebp)(i386_state *cpustate) // Opcode 0x5d
+static void I386OP(pop_ebp)(i386_state *cpustate) // Opcode 0x5d
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1431,7 +1431,7 @@ static void I386OP(pop_ebp)(i386_state *cpustate) // Opcode 0x5d
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_esi)(i386_state *cpustate) // Opcode 0x5e
+static void I386OP(pop_esi)(i386_state *cpustate) // Opcode 0x5e
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1441,7 +1441,7 @@ static void I386OP(pop_esi)(i386_state *cpustate) // Opcode 0x5e
CYCLES(cpustate,CYCLES_POP_REG_SHORT);
}
-static void I386OP(pop_edi)(i386_state *cpustate) // Opcode 0x5f
+static void I386OP(pop_edi)(i386_state *cpustate) // Opcode 0x5f
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+3) == 0)
@@ -1477,27 +1477,27 @@ static bool I386OP(pop_seg32)(i386_state *cpustate, int segment)
return true;
}
-static void I386OP(pop_ds32)(i386_state *cpustate) // Opcode 0x1f
+static void I386OP(pop_ds32)(i386_state *cpustate) // Opcode 0x1f
{
I386OP(pop_seg32)(cpustate, DS);
}
-static void I386OP(pop_es32)(i386_state *cpustate) // Opcode 0x07
+static void I386OP(pop_es32)(i386_state *cpustate) // Opcode 0x07
{
I386OP(pop_seg32)(cpustate, ES);
}
-static void I386OP(pop_fs32)(i386_state *cpustate) // Opcode 0x0f a1
+static void I386OP(pop_fs32)(i386_state *cpustate) // Opcode 0x0f a1
{
I386OP(pop_seg32)(cpustate, FS);
}
-static void I386OP(pop_gs32)(i386_state *cpustate) // Opcode 0x0f a9
+static void I386OP(pop_gs32)(i386_state *cpustate) // Opcode 0x0f a9
{
I386OP(pop_seg32)(cpustate, GS);
}
-static void I386OP(pop_ss32)(i386_state *cpustate) // Opcode 0x17
+static void I386OP(pop_ss32)(i386_state *cpustate) // Opcode 0x17
{
if(!I386OP(pop_seg32)(cpustate, SS)) return;
if(cpustate->IF != 0) // if external interrupts are enabled
@@ -1507,7 +1507,7 @@ static void I386OP(pop_ss32)(i386_state *cpustate) // Opcode 0x17
}
}
-static void I386OP(pop_rm32)(i386_state *cpustate) // Opcode 0x8f
+static void I386OP(pop_rm32)(i386_state *cpustate) // Opcode 0x8f
{
UINT8 modrm = FETCH(cpustate);
UINT32 value;
@@ -1540,7 +1540,7 @@ static void I386OP(pop_rm32)(i386_state *cpustate) // Opcode 0x8f
CYCLES(cpustate,CYCLES_POP_RM);
}
-static void I386OP(popad)(i386_state *cpustate) // Opcode 0x61
+static void I386OP(popad)(i386_state *cpustate) // Opcode 0x61
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset+31) == 0)
@@ -1559,7 +1559,7 @@ static void I386OP(popad)(i386_state *cpustate) // Opcode 0x61
CYCLES(cpustate,CYCLES_POPA);
}
-static void I386OP(popfd)(i386_state *cpustate) // Opcode 0x9d
+static void I386OP(popfd)(i386_state *cpustate) // Opcode 0x9d
{
UINT32 value;
UINT32 current = get_flags(cpustate);
@@ -1596,7 +1596,7 @@ static void I386OP(popfd)(i386_state *cpustate) // Opcode 0x9d
CYCLES(cpustate,CYCLES_POPF);
}
-static void I386OP(push_eax)(i386_state *cpustate) // Opcode 0x50
+static void I386OP(push_eax)(i386_state *cpustate) // Opcode 0x50
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1606,7 +1606,7 @@ static void I386OP(push_eax)(i386_state *cpustate) // Opcode 0x50
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_ecx)(i386_state *cpustate) // Opcode 0x51
+static void I386OP(push_ecx)(i386_state *cpustate) // Opcode 0x51
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1616,7 +1616,7 @@ static void I386OP(push_ecx)(i386_state *cpustate) // Opcode 0x51
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_edx)(i386_state *cpustate) // Opcode 0x52
+static void I386OP(push_edx)(i386_state *cpustate) // Opcode 0x52
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1626,7 +1626,7 @@ static void I386OP(push_edx)(i386_state *cpustate) // Opcode 0x52
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_ebx)(i386_state *cpustate) // Opcode 0x53
+static void I386OP(push_ebx)(i386_state *cpustate) // Opcode 0x53
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1636,7 +1636,7 @@ static void I386OP(push_ebx)(i386_state *cpustate) // Opcode 0x53
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_esp)(i386_state *cpustate) // Opcode 0x54
+static void I386OP(push_esp)(i386_state *cpustate) // Opcode 0x54
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1646,7 +1646,7 @@ static void I386OP(push_esp)(i386_state *cpustate) // Opcode 0x54
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_ebp)(i386_state *cpustate) // Opcode 0x55
+static void I386OP(push_ebp)(i386_state *cpustate) // Opcode 0x55
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1656,7 +1656,7 @@ static void I386OP(push_ebp)(i386_state *cpustate) // Opcode 0x55
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_esi)(i386_state *cpustate) // Opcode 0x56
+static void I386OP(push_esi)(i386_state *cpustate) // Opcode 0x56
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1666,7 +1666,7 @@ static void I386OP(push_esi)(i386_state *cpustate) // Opcode 0x56
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_edi)(i386_state *cpustate) // Opcode 0x57
+static void I386OP(push_edi)(i386_state *cpustate) // Opcode 0x57
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1676,7 +1676,7 @@ static void I386OP(push_edi)(i386_state *cpustate) // Opcode 0x57
CYCLES(cpustate,CYCLES_PUSH_REG_SHORT);
}
-static void I386OP(push_cs32)(i386_state *cpustate) // Opcode 0x0e
+static void I386OP(push_cs32)(i386_state *cpustate) // Opcode 0x0e
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1686,7 +1686,7 @@ static void I386OP(push_cs32)(i386_state *cpustate) // Opcode 0x0e
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_ds32)(i386_state *cpustate) // Opcode 0x1e
+static void I386OP(push_ds32)(i386_state *cpustate) // Opcode 0x1e
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1696,7 +1696,7 @@ static void I386OP(push_ds32)(i386_state *cpustate) // Opcode 0x1e
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_es32)(i386_state *cpustate) // Opcode 0x06
+static void I386OP(push_es32)(i386_state *cpustate) // Opcode 0x06
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1706,7 +1706,7 @@ static void I386OP(push_es32)(i386_state *cpustate) // Opcode 0x06
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_fs32)(i386_state *cpustate) // Opcode 0x0f a0
+static void I386OP(push_fs32)(i386_state *cpustate) // Opcode 0x0f a0
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1716,7 +1716,7 @@ static void I386OP(push_fs32)(i386_state *cpustate) // Opcode 0x0f a0
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_gs32)(i386_state *cpustate) // Opcode 0x0f a8
+static void I386OP(push_gs32)(i386_state *cpustate) // Opcode 0x0f a8
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1726,7 +1726,7 @@ static void I386OP(push_gs32)(i386_state *cpustate) // Opcode 0x0f a8
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_ss32)(i386_state *cpustate) // Opcode 0x16
+static void I386OP(push_ss32)(i386_state *cpustate) // Opcode 0x16
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1736,7 +1736,7 @@ static void I386OP(push_ss32)(i386_state *cpustate) // Opcode 0x16
CYCLES(cpustate,CYCLES_PUSH_SREG);
}
-static void I386OP(push_i32)(i386_state *cpustate) // Opcode 0x68
+static void I386OP(push_i32)(i386_state *cpustate) // Opcode 0x68
{
UINT32 value = FETCH32(cpustate);
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
@@ -1747,7 +1747,7 @@ static void I386OP(push_i32)(i386_state *cpustate) // Opcode 0x68
CYCLES(cpustate,CYCLES_PUSH_IMM);
}
-static void I386OP(pushad)(i386_state *cpustate) // Opcode 0x60
+static void I386OP(pushad)(i386_state *cpustate) // Opcode 0x60
{
UINT32 temp = REG32(ESP);
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
@@ -1767,7 +1767,7 @@ static void I386OP(pushad)(i386_state *cpustate) // Opcode 0x60
CYCLES(cpustate,CYCLES_PUSHA);
}
-static void I386OP(pushfd)(i386_state *cpustate) // Opcode 0x9c
+static void I386OP(pushfd)(i386_state *cpustate) // Opcode 0x9c
{
UINT32 offset = (STACK_32BIT ? REG32(ESP) : REG16(SP));
if(i386_limit_check(cpustate,SS,offset-4) == 0)
@@ -1777,23 +1777,23 @@ static void I386OP(pushfd)(i386_state *cpustate) // Opcode 0x9c
CYCLES(cpustate,CYCLES_PUSHF);
}
-static void I386OP(ret_near32_i16)(i386_state *cpustate) // Opcode 0xc2
+static void I386OP(ret_near32_i16)(i386_state *cpustate) // Opcode 0xc2
{
INT16 disp = FETCH16(cpustate);
cpustate->eip = POP32(cpustate);
REG32(ESP) += disp;
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_RET_IMM); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_RET_IMM); /* TODO: Timing = 10 + m */
}
-static void I386OP(ret_near32)(i386_state *cpustate) // Opcode 0xc3
+static void I386OP(ret_near32)(i386_state *cpustate) // Opcode 0xc3
{
cpustate->eip = POP32(cpustate);
CHANGE_PC(cpustate,cpustate->eip);
- CYCLES(cpustate,CYCLES_RET); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_RET); /* TODO: Timing = 10 + m */
}
-static void I386OP(sbb_rm32_r32)(i386_state *cpustate) // Opcode 0x19
+static void I386OP(sbb_rm32_r32)(i386_state *cpustate) // Opcode 0x19
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1813,7 +1813,7 @@ static void I386OP(sbb_rm32_r32)(i386_state *cpustate) // Opcode 0x19
}
}
-static void I386OP(sbb_r32_rm32)(i386_state *cpustate) // Opcode 0x1b
+static void I386OP(sbb_r32_rm32)(i386_state *cpustate) // Opcode 0x1b
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1833,7 +1833,7 @@ static void I386OP(sbb_r32_rm32)(i386_state *cpustate) // Opcode 0x1b
}
}
-static void I386OP(sbb_eax_i32)(i386_state *cpustate) // Opcode 0x1d
+static void I386OP(sbb_eax_i32)(i386_state *cpustate) // Opcode 0x1d
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -1843,7 +1843,7 @@ static void I386OP(sbb_eax_i32)(i386_state *cpustate) // Opcode 0x1d
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(scasd)(i386_state *cpustate) // Opcode 0xaf
+static void I386OP(scasd)(i386_state *cpustate) // Opcode 0xaf
{
UINT32 eas, src, dst;
eas = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI), 0 );
@@ -1854,7 +1854,7 @@ static void I386OP(scasd)(i386_state *cpustate) // Opcode 0xaf
CYCLES(cpustate,CYCLES_SCAS);
}
-static void I386OP(shld32_i8)(i386_state *cpustate) // Opcode 0x0f a4
+static void I386OP(shld32_i8)(i386_state *cpustate) // Opcode 0x0f a4
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1891,7 +1891,7 @@ static void I386OP(shld32_i8)(i386_state *cpustate) // Opcode 0x0f a4
}
}
-static void I386OP(shld32_cl)(i386_state *cpustate) // Opcode 0x0f a5
+static void I386OP(shld32_cl)(i386_state *cpustate) // Opcode 0x0f a5
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1928,7 +1928,7 @@ static void I386OP(shld32_cl)(i386_state *cpustate) // Opcode 0x0f a5
}
}
-static void I386OP(shrd32_i8)(i386_state *cpustate) // Opcode 0x0f ac
+static void I386OP(shrd32_i8)(i386_state *cpustate) // Opcode 0x0f ac
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1965,7 +1965,7 @@ static void I386OP(shrd32_i8)(i386_state *cpustate) // Opcode 0x0f ac
}
}
-static void I386OP(shrd32_cl)(i386_state *cpustate) // Opcode 0x0f ad
+static void I386OP(shrd32_cl)(i386_state *cpustate) // Opcode 0x0f ad
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -2002,7 +2002,7 @@ static void I386OP(shrd32_cl)(i386_state *cpustate) // Opcode 0x0f ad
}
}
-static void I386OP(stosd)(i386_state *cpustate) // Opcode 0xab
+static void I386OP(stosd)(i386_state *cpustate) // Opcode 0xab
{
UINT32 eas = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI), 1 );
WRITE32(cpustate,eas, REG32(EAX));
@@ -2010,7 +2010,7 @@ static void I386OP(stosd)(i386_state *cpustate) // Opcode 0xab
CYCLES(cpustate,CYCLES_STOS);
}
-static void I386OP(sub_rm32_r32)(i386_state *cpustate) // Opcode 0x29
+static void I386OP(sub_rm32_r32)(i386_state *cpustate) // Opcode 0x29
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2030,7 +2030,7 @@ static void I386OP(sub_rm32_r32)(i386_state *cpustate) // Opcode 0x29
}
}
-static void I386OP(sub_r32_rm32)(i386_state *cpustate) // Opcode 0x2b
+static void I386OP(sub_r32_rm32)(i386_state *cpustate) // Opcode 0x2b
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2050,7 +2050,7 @@ static void I386OP(sub_r32_rm32)(i386_state *cpustate) // Opcode 0x2b
}
}
-static void I386OP(sub_eax_i32)(i386_state *cpustate) // Opcode 0x2d
+static void I386OP(sub_eax_i32)(i386_state *cpustate) // Opcode 0x2d
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -2060,7 +2060,7 @@ static void I386OP(sub_eax_i32)(i386_state *cpustate) // Opcode 0x2d
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(test_eax_i32)(i386_state *cpustate) // Opcode 0xa9
+static void I386OP(test_eax_i32)(i386_state *cpustate) // Opcode 0xa9
{
UINT32 src = FETCH32(cpustate);
UINT32 dst = REG32(EAX);
@@ -2071,7 +2071,7 @@ static void I386OP(test_eax_i32)(i386_state *cpustate) // Opcode 0xa9
CYCLES(cpustate,CYCLES_TEST_IMM_ACC);
}
-static void I386OP(test_rm32_r32)(i386_state *cpustate) // Opcode 0x85
+static void I386OP(test_rm32_r32)(i386_state *cpustate) // Opcode 0x85
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2095,7 +2095,7 @@ static void I386OP(test_rm32_r32)(i386_state *cpustate) // Opcode 0x85
}
}
-static void I386OP(xchg_eax_ecx)(i386_state *cpustate) // Opcode 0x91
+static void I386OP(xchg_eax_ecx)(i386_state *cpustate) // Opcode 0x91
{
UINT32 temp;
temp = REG32(EAX);
@@ -2104,7 +2104,7 @@ static void I386OP(xchg_eax_ecx)(i386_state *cpustate) // Opcode 0x91
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_eax_edx)(i386_state *cpustate) // Opcode 0x92
+static void I386OP(xchg_eax_edx)(i386_state *cpustate) // Opcode 0x92
{
UINT32 temp;
temp = REG32(EAX);
@@ -2113,7 +2113,7 @@ static void I386OP(xchg_eax_edx)(i386_state *cpustate) // Opcode 0x92
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_eax_ebx)(i386_state *cpustate) // Opcode 0x93
+static void I386OP(xchg_eax_ebx)(i386_state *cpustate) // Opcode 0x93
{
UINT32 temp;
temp = REG32(EAX);
@@ -2122,7 +2122,7 @@ static void I386OP(xchg_eax_ebx)(i386_state *cpustate) // Opcode 0x93
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_eax_esp)(i386_state *cpustate) // Opcode 0x94
+static void I386OP(xchg_eax_esp)(i386_state *cpustate) // Opcode 0x94
{
UINT32 temp;
temp = REG32(EAX);
@@ -2131,7 +2131,7 @@ static void I386OP(xchg_eax_esp)(i386_state *cpustate) // Opcode 0x94
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_eax_ebp)(i386_state *cpustate) // Opcode 0x95
+static void I386OP(xchg_eax_ebp)(i386_state *cpustate) // Opcode 0x95
{
UINT32 temp;
temp = REG32(EAX);
@@ -2140,7 +2140,7 @@ static void I386OP(xchg_eax_ebp)(i386_state *cpustate) // Opcode 0x95
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_eax_esi)(i386_state *cpustate) // Opcode 0x96
+static void I386OP(xchg_eax_esi)(i386_state *cpustate) // Opcode 0x96
{
UINT32 temp;
temp = REG32(EAX);
@@ -2149,7 +2149,7 @@ static void I386OP(xchg_eax_esi)(i386_state *cpustate) // Opcode 0x96
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_eax_edi)(i386_state *cpustate) // Opcode 0x97
+static void I386OP(xchg_eax_edi)(i386_state *cpustate) // Opcode 0x97
{
UINT32 temp;
temp = REG32(EAX);
@@ -2158,7 +2158,7 @@ static void I386OP(xchg_eax_edi)(i386_state *cpustate) // Opcode 0x97
CYCLES(cpustate,CYCLES_XCHG_REG_REG);
}
-static void I386OP(xchg_r32_rm32)(i386_state *cpustate) // Opcode 0x87
+static void I386OP(xchg_r32_rm32)(i386_state *cpustate) // Opcode 0x87
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -2177,7 +2177,7 @@ static void I386OP(xchg_r32_rm32)(i386_state *cpustate) // Opcode 0x87
}
}
-static void I386OP(xor_rm32_r32)(i386_state *cpustate) // Opcode 0x31
+static void I386OP(xor_rm32_r32)(i386_state *cpustate) // Opcode 0x31
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2197,7 +2197,7 @@ static void I386OP(xor_rm32_r32)(i386_state *cpustate) // Opcode 0x31
}
}
-static void I386OP(xor_r32_rm32)(i386_state *cpustate) // Opcode 0x33
+static void I386OP(xor_r32_rm32)(i386_state *cpustate) // Opcode 0x33
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -2217,7 +2217,7 @@ static void I386OP(xor_r32_rm32)(i386_state *cpustate) // Opcode 0x33
}
}
-static void I386OP(xor_eax_i32)(i386_state *cpustate) // Opcode 0x35
+static void I386OP(xor_eax_i32)(i386_state *cpustate) // Opcode 0x35
{
UINT32 src, dst;
src = FETCH32(cpustate);
@@ -2229,7 +2229,7 @@ static void I386OP(xor_eax_i32)(i386_state *cpustate) // Opcode 0x35
-static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
+static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
{
UINT32 ea;
UINT32 src, dst;
@@ -2237,7 +2237,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
switch( (modrm >> 3) & 0x7 )
{
- case 0: // ADD Rm32, i32
+ case 0: // ADD Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2253,7 +2253,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 1: // OR Rm32, i32
+ case 1: // OR Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2269,7 +2269,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 2: // ADC Rm32, i32
+ case 2: // ADC Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2285,7 +2285,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 3: // SBB Rm32, i32
+ case 3: // SBB Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2301,7 +2301,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 4: // AND Rm32, i32
+ case 4: // AND Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2317,7 +2317,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 5: // SUB Rm32, i32
+ case 5: // SUB Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2333,7 +2333,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 6: // XOR Rm32, i32
+ case 6: // XOR Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2349,7 +2349,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 7: // CMP Rm32, i32
+ case 7: // CMP Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = FETCH32(cpustate);
@@ -2366,7 +2366,7 @@ static void I386OP(group81_32)(i386_state *cpustate) // Opcode 0x81
}
}
-static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
+static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
{
UINT32 ea;
UINT32 src, dst;
@@ -2374,7 +2374,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
switch( (modrm >> 3) & 0x7 )
{
- case 0: // ADD Rm32, i32
+ case 0: // ADD Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = (UINT32)(INT32)(INT8)FETCH(cpustate);
@@ -2390,7 +2390,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 1: // OR Rm32, i32
+ case 1: // OR Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = (UINT32)(INT32)(INT8)FETCH(cpustate);
@@ -2406,7 +2406,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 2: // ADC Rm32, i32
+ case 2: // ADC Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = (UINT32)(INT32)(INT8)FETCH(cpustate);
@@ -2422,7 +2422,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 3: // SBB Rm32, i32
+ case 3: // SBB Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = ((UINT32)(INT32)(INT8)FETCH(cpustate));
@@ -2438,7 +2438,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 4: // AND Rm32, i32
+ case 4: // AND Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = (UINT32)(INT32)(INT8)FETCH(cpustate);
@@ -2454,7 +2454,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 5: // SUB Rm32, i32
+ case 5: // SUB Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = (UINT32)(INT32)(INT8)FETCH(cpustate);
@@ -2470,7 +2470,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 6: // XOR Rm32, i32
+ case 6: // XOR Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = (UINT32)(INT32)(INT8)FETCH(cpustate);
@@ -2486,7 +2486,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 7: // CMP Rm32, i32
+ case 7: // CMP Rm32, i32
if( modrm >= 0xc0 ) {
dst = LOAD_RM32(modrm);
src = (UINT32)(INT32)(INT8)FETCH(cpustate);
@@ -2503,7 +2503,7 @@ static void I386OP(group83_32)(i386_state *cpustate) // Opcode 0x83
}
}
-static void I386OP(groupC1_32)(i386_state *cpustate) // Opcode 0xc1
+static void I386OP(groupC1_32)(i386_state *cpustate) // Opcode 0xc1
{
UINT32 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2523,7 +2523,7 @@ static void I386OP(groupC1_32)(i386_state *cpustate) // Opcode 0xc1
}
}
-static void I386OP(groupD1_32)(i386_state *cpustate) // Opcode 0xd1
+static void I386OP(groupD1_32)(i386_state *cpustate) // Opcode 0xd1
{
UINT32 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2540,7 +2540,7 @@ static void I386OP(groupD1_32)(i386_state *cpustate) // Opcode 0xd1
}
}
-static void I386OP(groupD3_32)(i386_state *cpustate) // Opcode 0xd3
+static void I386OP(groupD3_32)(i386_state *cpustate) // Opcode 0xd3
{
UINT32 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2557,13 +2557,13 @@ static void I386OP(groupD3_32)(i386_state *cpustate) // Opcode 0xd3
}
}
-static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
+static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* TEST Rm32, i32 */
+ case 0: /* TEST Rm32, i32 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
UINT32 src = FETCH32(cpustate);
@@ -2581,7 +2581,7 @@ static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
CYCLES(cpustate,CYCLES_TEST_IMM_MEM);
}
break;
- case 2: /* NOT Rm32 */
+ case 2: /* NOT Rm32 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
dst = ~dst;
@@ -2595,7 +2595,7 @@ static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
CYCLES(cpustate,CYCLES_NOT_MEM);
}
break;
- case 3: /* NEG Rm32 */
+ case 3: /* NEG Rm32 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
dst = SUB32(cpustate, 0, dst );
@@ -2609,17 +2609,17 @@ static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
CYCLES(cpustate,CYCLES_NEG_MEM);
}
break;
- case 4: /* MUL EAX, Rm32 */
+ case 4: /* MUL EAX, Rm32 */
{
UINT64 result;
UINT32 src, dst;
if( modrm >= 0xc0 ) {
src = LOAD_RM32(modrm);
- CYCLES(cpustate,CYCLES_MUL32_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL32_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = READ32(cpustate,ea);
- CYCLES(cpustate,CYCLES_MUL32_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL32_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = REG32(EAX);
@@ -2630,17 +2630,17 @@ static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
cpustate->CF = cpustate->OF = (REG32(EDX) != 0);
}
break;
- case 5: /* IMUL EAX, Rm32 */
+ case 5: /* IMUL EAX, Rm32 */
{
INT64 result;
INT64 src, dst;
if( modrm >= 0xc0 ) {
src = (INT64)(INT32)LOAD_RM32(modrm);
- CYCLES(cpustate,CYCLES_IMUL32_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = (INT64)(INT32)READ32(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL32_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL32_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = (INT64)(INT32)REG32(EAX);
@@ -2652,7 +2652,7 @@ static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
cpustate->CF = cpustate->OF = !(result == (INT64)(INT32)result);
}
break;
- case 6: /* DIV EAX, Rm32 */
+ case 6: /* DIV EAX, Rm32 */
{
UINT64 quotient, remainder, result;
UINT32 src;
@@ -2680,7 +2680,7 @@ static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
}
}
break;
- case 7: /* IDIV EAX, Rm32 */
+ case 7: /* IDIV EAX, Rm32 */
{
INT64 quotient, remainder, result;
UINT32 src;
@@ -2711,13 +2711,13 @@ static void I386OP(groupF7_32)(i386_state *cpustate) // Opcode 0xf7
}
}
-static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
+static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* INC Rm32 */
+ case 0: /* INC Rm32 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
dst = INC32(cpustate,dst);
@@ -2731,7 +2731,7 @@ static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
CYCLES(cpustate,CYCLES_INC_MEM);
}
break;
- case 1: /* DEC Rm32 */
+ case 1: /* DEC Rm32 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
dst = DEC32(cpustate,dst);
@@ -2745,23 +2745,23 @@ static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
CYCLES(cpustate,CYCLES_DEC_MEM);
}
break;
- case 2: /* CALL Rm32 */
+ case 2: /* CALL Rm32 */
{
UINT32 address;
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
- CYCLES(cpustate,CYCLES_CALL_REG); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_CALL_REG); /* TODO: Timing = 7 + m */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ32(cpustate,ea);
- CYCLES(cpustate,CYCLES_CALL_MEM); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_CALL_MEM); /* TODO: Timing = 10 + m */
}
PUSH32(cpustate, cpustate->eip );
cpustate->eip = address;
CHANGE_PC(cpustate,cpustate->eip);
}
break;
- case 3: /* CALL FAR Rm32 */
+ case 3: /* CALL FAR Rm32 */
{
UINT16 selector;
UINT32 address;
@@ -2775,7 +2775,7 @@ static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ32(cpustate,ea + 0);
selector = READ16(cpustate,ea + 4);
- CYCLES(cpustate,CYCLES_CALL_MEM_INTERSEG); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_CALL_MEM_INTERSEG); /* TODO: Timing = 10 + m */
if(PROTECTED_MODE && !V8086_MODE)
{
i386_protected_mode_call(cpustate,selector,address,1,1);
@@ -2793,22 +2793,22 @@ static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
}
}
break;
- case 4: /* JMP Rm32 */
+ case 4: /* JMP Rm32 */
{
UINT32 address;
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
- CYCLES(cpustate,CYCLES_JMP_REG); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JMP_REG); /* TODO: Timing = 7 + m */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ32(cpustate,ea);
- CYCLES(cpustate,CYCLES_JMP_MEM); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_JMP_MEM); /* TODO: Timing = 10 + m */
}
cpustate->eip = address;
CHANGE_PC(cpustate,cpustate->eip);
}
break;
- case 5: /* JMP FAR Rm32 */
+ case 5: /* JMP FAR Rm32 */
{
UINT16 selector;
UINT32 address;
@@ -2822,7 +2822,7 @@ static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
UINT32 ea = GetEA(cpustate,modrm,0);
address = READ32(cpustate,ea + 0);
selector = READ16(cpustate,ea + 4);
- CYCLES(cpustate,CYCLES_JMP_MEM_INTERSEG); /* TODO: Timing = 10 + m */
+ CYCLES(cpustate,CYCLES_JMP_MEM_INTERSEG); /* TODO: Timing = 10 + m */
if(PROTECTED_MODE && !V8086_MODE)
{
i386_protected_mode_jump(cpustate,selector,address,1,1);
@@ -2838,7 +2838,7 @@ static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
}
}
break;
- case 6: /* PUSH Rm32 */
+ case 6: /* PUSH Rm32 */
{
UINT32 value;
if( modrm >= 0xc0 ) {
@@ -2857,7 +2857,7 @@ static void I386OP(groupFF_32)(i386_state *cpustate) // Opcode 0xff
}
}
-static void I386OP(group0F00_32)(i386_state *cpustate) // Opcode 0x0f 00
+static void I386OP(group0F00_32)(i386_state *cpustate) // Opcode 0x0f 00
{
UINT32 address, ea;
UINT8 modrm = FETCH(cpustate);
@@ -2866,7 +2866,7 @@ static void I386OP(group0F00_32)(i386_state *cpustate) // Opcode 0x0f 00
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* SLDT */
+ case 0: /* SLDT */
if ( PROTECTED_MODE && !V8086_MODE )
{
if( modrm >= 0xc0 ) {
@@ -2883,7 +2883,7 @@ static void I386OP(group0F00_32)(i386_state *cpustate) // Opcode 0x0f 00
i386_trap(cpustate,6, 0, 0);
}
break;
- case 1: /* STR */
+ case 1: /* STR */
if ( PROTECTED_MODE && !V8086_MODE )
{
if( modrm >= 0xc0 ) {
@@ -2900,7 +2900,7 @@ static void I386OP(group0F00_32)(i386_state *cpustate) // Opcode 0x0f 00
i386_trap(cpustate,6, 0, 0);
}
break;
- case 2: /* LLDT */
+ case 2: /* LLDT */
if ( PROTECTED_MODE && !V8086_MODE )
{
if(cpustate->CPL)
@@ -2927,7 +2927,7 @@ static void I386OP(group0F00_32)(i386_state *cpustate) // Opcode 0x0f 00
}
break;
- case 3: /* LTR */
+ case 3: /* LTR */
if ( PROTECTED_MODE && !V8086_MODE )
{
if(cpustate->CPL)
@@ -3049,14 +3049,14 @@ static void I386OP(group0F00_32)(i386_state *cpustate) // Opcode 0x0f 00
}
}
-static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
+static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
{
UINT8 modrm = FETCH(cpustate);
UINT32 address, ea;
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* SGDT */
+ case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
@@ -3069,7 +3069,7 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SGDT);
break;
}
- case 1: /* SIDT */
+ case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
@@ -3085,7 +3085,7 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SIDT);
break;
}
- case 2: /* LGDT */
+ case 2: /* LGDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -3100,7 +3100,7 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LGDT);
break;
}
- case 3: /* LIDT */
+ case 3: /* LIDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -3115,7 +3115,7 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LIDT);
break;
}
- case 4: /* SMSW */
+ case 4: /* SMSW */
{
if( modrm >= 0xc0 ) {
STORE_RM32(modrm, cpustate->cr[0] & 0xffff);
@@ -3128,7 +3128,7 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
}
break;
}
- case 6: /* LMSW */
+ case 6: /* LMSW */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -3153,13 +3153,13 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
}
}
-static void I386OP(group0FBA_32)(i386_state *cpustate) // Opcode 0x0f ba
+static void I386OP(group0FBA_32)(i386_state *cpustate) // Opcode 0x0f ba
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 4: /* BT Rm32, i8 */
+ case 4: /* BT Rm32, i8 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3183,7 +3183,7 @@ static void I386OP(group0FBA_32)(i386_state *cpustate) // Opcode 0x0f ba
CYCLES(cpustate,CYCLES_BT_IMM_MEM);
}
break;
- case 5: /* BTS Rm32, i8 */
+ case 5: /* BTS Rm32, i8 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3211,7 +3211,7 @@ static void I386OP(group0FBA_32)(i386_state *cpustate) // Opcode 0x0f ba
CYCLES(cpustate,CYCLES_BTS_IMM_MEM);
}
break;
- case 6: /* BTR Rm32, i8 */
+ case 6: /* BTR Rm32, i8 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3239,7 +3239,7 @@ static void I386OP(group0FBA_32)(i386_state *cpustate) // Opcode 0x0f ba
CYCLES(cpustate,CYCLES_BTR_IMM_MEM);
}
break;
- case 7: /* BTC Rm32, i8 */
+ case 7: /* BTC Rm32, i8 */
if( modrm >= 0xc0 ) {
UINT32 dst = LOAD_RM32(modrm);
UINT8 bit = FETCH(cpustate);
@@ -3401,7 +3401,7 @@ static void I386OP(lsl_r32_rm32)(i386_state *cpustate) // Opcode 0x0f 0x03
i386_trap(cpustate,6, 0, 0);
}
-static void I386OP(bound_r32_m32_m32)(i386_state *cpustate) // Opcode 0x62
+static void I386OP(bound_r32_m32_m32)(i386_state *cpustate) // Opcode 0x62
{
UINT8 modrm;
INT32 val, low, high;
@@ -3431,7 +3431,7 @@ static void I386OP(bound_r32_m32_m32)(i386_state *cpustate) // Opcode 0x62
}
}
-static void I386OP(retf32)(i386_state *cpustate) // Opcode 0xcb
+static void I386OP(retf32)(i386_state *cpustate) // Opcode 0xcb
{
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -3448,7 +3448,7 @@ static void I386OP(retf32)(i386_state *cpustate) // Opcode 0xcb
CYCLES(cpustate,CYCLES_RET_INTERSEG);
}
-static void I386OP(retf_i32)(i386_state *cpustate) // Opcode 0xca
+static void I386OP(retf_i32)(i386_state *cpustate) // Opcode 0xca
{
UINT16 count = FETCH16(cpustate);
@@ -3483,31 +3483,31 @@ static void I386OP(load_far_pointer32)(i386_state *cpustate, int s)
}
}
-static void I386OP(lds32)(i386_state *cpustate) // Opcode 0xc5
+static void I386OP(lds32)(i386_state *cpustate) // Opcode 0xc5
{
I386OP(load_far_pointer32)(cpustate, DS);
CYCLES(cpustate,CYCLES_LDS);
}
-static void I386OP(lss32)(i386_state *cpustate) // Opcode 0x0f 0xb2
+static void I386OP(lss32)(i386_state *cpustate) // Opcode 0x0f 0xb2
{
I386OP(load_far_pointer32)(cpustate, SS);
CYCLES(cpustate,CYCLES_LSS);
}
-static void I386OP(les32)(i386_state *cpustate) // Opcode 0xc4
+static void I386OP(les32)(i386_state *cpustate) // Opcode 0xc4
{
I386OP(load_far_pointer32)(cpustate, ES);
CYCLES(cpustate,CYCLES_LES);
}
-static void I386OP(lfs32)(i386_state *cpustate) // Opcode 0x0f 0xb4
+static void I386OP(lfs32)(i386_state *cpustate) // Opcode 0x0f 0xb4
{
I386OP(load_far_pointer32)(cpustate, FS);
CYCLES(cpustate,CYCLES_LFS);
}
-static void I386OP(lgs32)(i386_state *cpustate) // Opcode 0x0f 0xb5
+static void I386OP(lgs32)(i386_state *cpustate) // Opcode 0x0f 0xb5
{
I386OP(load_far_pointer32)(cpustate, GS);
CYCLES(cpustate,CYCLES_LGS);
diff --git a/src/emu/cpu/i386/i386ops.c b/src/emu/cpu/i386/i386ops.c
index c51301ef22f..6f653bee2e9 100644
--- a/src/emu/cpu/i386/i386ops.c
+++ b/src/emu/cpu/i386/i386ops.c
@@ -9,31 +9,31 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm8, 1 */
+ case 0: /* ROL rm8, 1 */
cpustate->CF = (src & 0x80) ? 1 : 0;
dst = (src << 1) + cpustate->CF;
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm8, 1 */
+ case 1: /* ROR rm8, 1 */
cpustate->CF = (src & 0x1) ? 1 : 0;
dst = (cpustate->CF << 7) | (src >> 1);
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm8, 1 */
+ case 2: /* RCL rm8, 1 */
dst = (src << 1) + cpustate->CF;
cpustate->CF = (src & 0x80) ? 1 : 0;
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm8, 1 */
+ case 3: /* RCR rm8, 1 */
dst = (cpustate->CF << 7) | (src >> 1);
cpustate->CF = src & 0x1;
cpustate->OF = ((src ^ dst) & 0x80) ? 1 : 0;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm8, 1 */
+ case 4: /* SHL/SAL rm8, 1 */
case 6:
dst = src << 1;
cpustate->CF = (src & 0x80) ? 1 : 0;
@@ -41,14 +41,14 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm8, 1 */
+ case 5: /* SHR rm8, 1 */
dst = src >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = (dst & 0x80) ? 1 : 0;
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm8, 1 */
+ case 7: /* SAR rm8, 1 */
dst = (INT8)(src) >> 1;
cpustate->CF = src & 0x1;
cpustate->OF = 0;
@@ -61,7 +61,7 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* ROL rm8, i8 */
+ case 0: /* ROL rm8, i8 */
if(!(shift & 7))
{
if(shift & 0x18)
@@ -73,12 +73,12 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
}
shift &= 7;
dst = ((src & ((UINT8)0xff >> shift)) << shift) |
- ((src & ((UINT8)0xff << (8-shift))) >> (8-shift));
+ ((src & ((UINT8)0xff << (8-shift))) >> (8-shift));
cpustate->CF = dst & 0x1;
cpustate->OF = (dst & 1) ^ (dst >> 7);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 1: /* ROR rm8, i8 */
+ case 1: /* ROR rm8, i8 */
if(!(shift & 7))
{
if(shift & 0x18)
@@ -90,30 +90,30 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
}
shift &= 7;
dst = ((src & ((UINT8)0xff << shift)) >> shift) |
- ((src & ((UINT8)0xff >> (8-shift))) << (8-shift));
+ ((src & ((UINT8)0xff >> (8-shift))) << (8-shift));
cpustate->CF = (dst >> 7) & 1;
cpustate->OF = ((dst >> 7) ^ (dst >> 6)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 2: /* RCL rm8, i8 */
+ case 2: /* RCL rm8, i8 */
shift %= 9;
dst = ((src & ((UINT8)0xff >> shift)) << shift) |
- ((src & ((UINT8)0xff << (9-shift))) >> (9-shift)) |
- (cpustate->CF << (shift-1));
+ ((src & ((UINT8)0xff << (9-shift))) >> (9-shift)) |
+ (cpustate->CF << (shift-1));
if(shift) cpustate->CF = (src >> (8-shift)) & 0x1;
cpustate->OF = cpustate->CF ^ ((dst >> 7) & 1);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 3: /* RCR rm8, i8 */
+ case 3: /* RCR rm8, i8 */
shift %= 9;
dst = ((src & ((UINT8)0xff << shift)) >> shift) |
- ((src & ((UINT8)0xff >> (8-shift))) << (9-shift)) |
- (cpustate->CF << (8-shift));
+ ((src & ((UINT8)0xff >> (8-shift))) << (9-shift)) |
+ (cpustate->CF << (8-shift));
if(shift) cpustate->CF = (src >> (shift-1)) & 0x1;
cpustate->OF = ((dst >> 7) ^ (dst >> 6)) & 1;
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_CARRY_REG, CYCLES_ROTATE_CARRY_MEM);
break;
- case 4: /* SHL/SAL rm8, i8 */
+ case 4: /* SHL/SAL rm8, i8 */
case 6:
shift &= 31;
dst = src << shift;
@@ -121,14 +121,14 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 5: /* SHR rm8, i8 */
+ case 5: /* SHR rm8, i8 */
shift &= 31;
dst = src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
SetSZPF8(dst);
CYCLES_RM(cpustate,modrm, CYCLES_ROTATE_REG, CYCLES_ROTATE_MEM);
break;
- case 7: /* SAR rm8, i8 */
+ case 7: /* SAR rm8, i8 */
shift &= 31;
dst = (INT8)src >> shift;
cpustate->CF = (src & (1 << (shift-1))) ? 1 : 0;
@@ -143,7 +143,7 @@ static UINT8 I386OP(shift_rotate8)(i386_state *cpustate, UINT8 modrm, UINT32 val
-static void I386OP(adc_rm8_r8)(i386_state *cpustate) // Opcode 0x10
+static void I386OP(adc_rm8_r8)(i386_state *cpustate) // Opcode 0x10
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -163,7 +163,7 @@ static void I386OP(adc_rm8_r8)(i386_state *cpustate) // Opcode 0x10
}
}
-static void I386OP(adc_r8_rm8)(i386_state *cpustate) // Opcode 0x12
+static void I386OP(adc_r8_rm8)(i386_state *cpustate) // Opcode 0x12
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -183,7 +183,7 @@ static void I386OP(adc_r8_rm8)(i386_state *cpustate) // Opcode 0x12
}
}
-static void I386OP(adc_al_i8)(i386_state *cpustate) // Opcode 0x14
+static void I386OP(adc_al_i8)(i386_state *cpustate) // Opcode 0x14
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -193,7 +193,7 @@ static void I386OP(adc_al_i8)(i386_state *cpustate) // Opcode 0x14
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(add_rm8_r8)(i386_state *cpustate) // Opcode 0x00
+static void I386OP(add_rm8_r8)(i386_state *cpustate) // Opcode 0x00
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -213,7 +213,7 @@ static void I386OP(add_rm8_r8)(i386_state *cpustate) // Opcode 0x00
}
}
-static void I386OP(add_r8_rm8)(i386_state *cpustate) // Opcode 0x02
+static void I386OP(add_r8_rm8)(i386_state *cpustate) // Opcode 0x02
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -233,7 +233,7 @@ static void I386OP(add_r8_rm8)(i386_state *cpustate) // Opcode 0x02
}
}
-static void I386OP(add_al_i8)(i386_state *cpustate) // Opcode 0x04
+static void I386OP(add_al_i8)(i386_state *cpustate) // Opcode 0x04
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -243,7 +243,7 @@ static void I386OP(add_al_i8)(i386_state *cpustate) // Opcode 0x04
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(and_rm8_r8)(i386_state *cpustate) // Opcode 0x20
+static void I386OP(and_rm8_r8)(i386_state *cpustate) // Opcode 0x20
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -263,7 +263,7 @@ static void I386OP(and_rm8_r8)(i386_state *cpustate) // Opcode 0x20
}
}
-static void I386OP(and_r8_rm8)(i386_state *cpustate) // Opcode 0x22
+static void I386OP(and_r8_rm8)(i386_state *cpustate) // Opcode 0x22
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -283,7 +283,7 @@ static void I386OP(and_r8_rm8)(i386_state *cpustate) // Opcode 0x22
}
}
-static void I386OP(and_al_i8)(i386_state *cpustate) // Opcode 0x24
+static void I386OP(and_al_i8)(i386_state *cpustate) // Opcode 0x24
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -293,19 +293,19 @@ static void I386OP(and_al_i8)(i386_state *cpustate) // Opcode 0x24
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(clc)(i386_state *cpustate) // Opcode 0xf8
+static void I386OP(clc)(i386_state *cpustate) // Opcode 0xf8
{
cpustate->CF = 0;
CYCLES(cpustate,CYCLES_CLC);
}
-static void I386OP(cld)(i386_state *cpustate) // Opcode 0xfc
+static void I386OP(cld)(i386_state *cpustate) // Opcode 0xfc
{
cpustate->DF = 0;
CYCLES(cpustate,CYCLES_CLD);
}
-static void I386OP(cli)(i386_state *cpustate) // Opcode 0xfa
+static void I386OP(cli)(i386_state *cpustate) // Opcode 0xfa
{
if(PROTECTED_MODE)
{
@@ -317,13 +317,13 @@ static void I386OP(cli)(i386_state *cpustate) // Opcode 0xfa
CYCLES(cpustate,CYCLES_CLI);
}
-static void I386OP(cmc)(i386_state *cpustate) // Opcode 0xf5
+static void I386OP(cmc)(i386_state *cpustate) // Opcode 0xf5
{
cpustate->CF ^= 1;
CYCLES(cpustate,CYCLES_CMC);
}
-static void I386OP(cmp_rm8_r8)(i386_state *cpustate) // Opcode 0x38
+static void I386OP(cmp_rm8_r8)(i386_state *cpustate) // Opcode 0x38
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -341,7 +341,7 @@ static void I386OP(cmp_rm8_r8)(i386_state *cpustate) // Opcode 0x38
}
}
-static void I386OP(cmp_r8_rm8)(i386_state *cpustate) // Opcode 0x3a
+static void I386OP(cmp_r8_rm8)(i386_state *cpustate) // Opcode 0x3a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -359,7 +359,7 @@ static void I386OP(cmp_r8_rm8)(i386_state *cpustate) // Opcode 0x3a
}
}
-static void I386OP(cmp_al_i8)(i386_state *cpustate) // Opcode 0x3c
+static void I386OP(cmp_al_i8)(i386_state *cpustate) // Opcode 0x3c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -368,7 +368,7 @@ static void I386OP(cmp_al_i8)(i386_state *cpustate) // Opcode 0x3c
CYCLES(cpustate,CYCLES_CMP_IMM_ACC);
}
-static void I386OP(cmpsb)(i386_state *cpustate) // Opcode 0xa6
+static void I386OP(cmpsb)(i386_state *cpustate) // Opcode 0xa6
{
UINT32 eas, ead;
UINT8 src, dst;
@@ -386,7 +386,7 @@ static void I386OP(cmpsb)(i386_state *cpustate) // Opcode 0xa6
CYCLES(cpustate,CYCLES_CMPS);
}
-static void I386OP(in_al_i8)(i386_state *cpustate) // Opcode 0xe4
+static void I386OP(in_al_i8)(i386_state *cpustate) // Opcode 0xe4
{
UINT16 port = FETCH(cpustate);
UINT8 data = READPORT8(cpustate, port);
@@ -394,7 +394,7 @@ static void I386OP(in_al_i8)(i386_state *cpustate) // Opcode 0xe4
CYCLES(cpustate,CYCLES_IN_VAR);
}
-static void I386OP(in_al_dx)(i386_state *cpustate) // Opcode 0xec
+static void I386OP(in_al_dx)(i386_state *cpustate) // Opcode 0xec
{
UINT16 port = REG16(DX);
UINT8 data = READPORT8(cpustate, port);
@@ -402,196 +402,196 @@ static void I386OP(in_al_dx)(i386_state *cpustate) // Opcode 0xec
CYCLES(cpustate,CYCLES_IN);
}
-static void I386OP(ja_rel8)(i386_state *cpustate) // Opcode 0x77
+static void I386OP(ja_rel8)(i386_state *cpustate) // Opcode 0x77
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF == 0 && cpustate->ZF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jbe_rel8)(i386_state *cpustate) // Opcode 0x76
+static void I386OP(jbe_rel8)(i386_state *cpustate) // Opcode 0x76
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF != 0 || cpustate->ZF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jc_rel8)(i386_state *cpustate) // Opcode 0x72
+static void I386OP(jc_rel8)(i386_state *cpustate) // Opcode 0x72
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jg_rel8)(i386_state *cpustate) // Opcode 0x7f
+static void I386OP(jg_rel8)(i386_state *cpustate) // Opcode 0x7f
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF == 0 && (cpustate->SF == cpustate->OF) ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jge_rel8)(i386_state *cpustate) // Opcode 0x7d
+static void I386OP(jge_rel8)(i386_state *cpustate) // Opcode 0x7d
{
INT8 disp = FETCH(cpustate);
if(cpustate->SF == cpustate->OF) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jl_rel8)(i386_state *cpustate) // Opcode 0x7c
+static void I386OP(jl_rel8)(i386_state *cpustate) // Opcode 0x7c
{
INT8 disp = FETCH(cpustate);
if( (cpustate->SF != cpustate->OF) ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jle_rel8)(i386_state *cpustate) // Opcode 0x7e
+static void I386OP(jle_rel8)(i386_state *cpustate) // Opcode 0x7e
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF != 0 || (cpustate->SF != cpustate->OF) ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jnc_rel8)(i386_state *cpustate) // Opcode 0x73
+static void I386OP(jnc_rel8)(i386_state *cpustate) // Opcode 0x73
{
INT8 disp = FETCH(cpustate);
if( cpustate->CF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jno_rel8)(i386_state *cpustate) // Opcode 0x71
+static void I386OP(jno_rel8)(i386_state *cpustate) // Opcode 0x71
{
INT8 disp = FETCH(cpustate);
if( cpustate->OF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jnp_rel8)(i386_state *cpustate) // Opcode 0x7b
+static void I386OP(jnp_rel8)(i386_state *cpustate) // Opcode 0x7b
{
INT8 disp = FETCH(cpustate);
if( cpustate->PF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jns_rel8)(i386_state *cpustate) // Opcode 0x79
+static void I386OP(jns_rel8)(i386_state *cpustate) // Opcode 0x79
{
INT8 disp = FETCH(cpustate);
if( cpustate->SF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jnz_rel8)(i386_state *cpustate) // Opcode 0x75
+static void I386OP(jnz_rel8)(i386_state *cpustate) // Opcode 0x75
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF == 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jo_rel8)(i386_state *cpustate) // Opcode 0x70
+static void I386OP(jo_rel8)(i386_state *cpustate) // Opcode 0x70
{
INT8 disp = FETCH(cpustate);
if( cpustate->OF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jp_rel8)(i386_state *cpustate) // Opcode 0x7a
+static void I386OP(jp_rel8)(i386_state *cpustate) // Opcode 0x7a
{
INT8 disp = FETCH(cpustate);
if( cpustate->PF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(js_rel8)(i386_state *cpustate) // Opcode 0x78
+static void I386OP(js_rel8)(i386_state *cpustate) // Opcode 0x78
{
INT8 disp = FETCH(cpustate);
if( cpustate->SF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jz_rel8)(i386_state *cpustate) // Opcode 0x74
+static void I386OP(jz_rel8)(i386_state *cpustate) // Opcode 0x74
{
INT8 disp = FETCH(cpustate);
if( cpustate->ZF != 0 ) {
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JCC_DISP8); /* TODO: Timing = 7 + m */
} else {
CYCLES(cpustate,CYCLES_JCC_DISP8_NOBRANCH);
}
}
-static void I386OP(jmp_rel8)(i386_state *cpustate) // Opcode 0xeb
+static void I386OP(jmp_rel8)(i386_state *cpustate) // Opcode 0xeb
{
INT8 disp = FETCH(cpustate);
NEAR_BRANCH(cpustate,disp);
- CYCLES(cpustate,CYCLES_JMP_SHORT); /* TODO: Timing = 7 + m */
+ CYCLES(cpustate,CYCLES_JMP_SHORT); /* TODO: Timing = 7 + m */
}
-static void I386OP(lahf)(i386_state *cpustate) // Opcode 0x9f
+static void I386OP(lahf)(i386_state *cpustate) // Opcode 0x9f
{
REG8(AH) = get_flags(cpustate) & 0xd7;
CYCLES(cpustate,CYCLES_LAHF);
}
-static void I386OP(lodsb)(i386_state *cpustate) // Opcode 0xac
+static void I386OP(lodsb)(i386_state *cpustate) // Opcode 0xac
{
UINT32 eas;
if( cpustate->segment_prefix ) {
@@ -604,7 +604,7 @@ static void I386OP(lodsb)(i386_state *cpustate) // Opcode 0xac
CYCLES(cpustate,CYCLES_LODS);
}
-static void I386OP(mov_rm8_r8)(i386_state *cpustate) // Opcode 0x88
+static void I386OP(mov_rm8_r8)(i386_state *cpustate) // Opcode 0x88
{
UINT8 src;
UINT8 modrm = FETCH(cpustate);
@@ -620,7 +620,7 @@ static void I386OP(mov_rm8_r8)(i386_state *cpustate) // Opcode 0x88
}
}
-static void I386OP(mov_r8_rm8)(i386_state *cpustate) // Opcode 0x8a
+static void I386OP(mov_r8_rm8)(i386_state *cpustate) // Opcode 0x8a
{
UINT8 src;
UINT8 modrm = FETCH(cpustate);
@@ -636,7 +636,7 @@ static void I386OP(mov_r8_rm8)(i386_state *cpustate) // Opcode 0x8a
}
}
-static void I386OP(mov_rm8_i8)(i386_state *cpustate) // Opcode 0xc6
+static void I386OP(mov_rm8_i8)(i386_state *cpustate) // Opcode 0xc6
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -651,7 +651,7 @@ static void I386OP(mov_rm8_i8)(i386_state *cpustate) // Opcode 0xc6
}
}
-static void I386OP(mov_r32_cr)(i386_state *cpustate) // Opcode 0x0f 20
+static void I386OP(mov_r32_cr)(i386_state *cpustate) // Opcode 0x0f 20
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -662,7 +662,7 @@ static void I386OP(mov_r32_cr)(i386_state *cpustate) // Opcode 0x0f 20
CYCLES(cpustate,CYCLES_MOV_CR_REG);
}
-static void I386OP(mov_r32_dr)(i386_state *cpustate) // Opcode 0x0f 21
+static void I386OP(mov_r32_dr)(i386_state *cpustate) // Opcode 0x0f 21
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -685,7 +685,7 @@ static void I386OP(mov_r32_dr)(i386_state *cpustate) // Opcode 0x0f 21
}
}
-static void I386OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
+static void I386OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -708,7 +708,7 @@ static void I386OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
cpustate->cr[cr] = data;
}
-static void I386OP(mov_dr_r32)(i386_state *cpustate) // Opcode 0x0f 23
+static void I386OP(mov_dr_r32)(i386_state *cpustate) // Opcode 0x0f 23
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
@@ -734,7 +734,7 @@ static void I386OP(mov_dr_r32)(i386_state *cpustate) // Opcode 0x0f 23
}
}
-static void I386OP(mov_al_m8)(i386_state *cpustate) // Opcode 0xa0
+static void I386OP(mov_al_m8)(i386_state *cpustate) // Opcode 0xa0
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -752,7 +752,7 @@ static void I386OP(mov_al_m8)(i386_state *cpustate) // Opcode 0xa0
CYCLES(cpustate,CYCLES_MOV_IMM_MEM);
}
-static void I386OP(mov_m8_al)(i386_state *cpustate) // Opcode 0xa2
+static void I386OP(mov_m8_al)(i386_state *cpustate) // Opcode 0xa2
{
UINT32 offset, ea;
if( cpustate->address_size ) {
@@ -770,7 +770,7 @@ static void I386OP(mov_m8_al)(i386_state *cpustate) // Opcode 0xa2
CYCLES(cpustate,CYCLES_MOV_MEM_ACC);
}
-static void I386OP(mov_rm16_sreg)(i386_state *cpustate) // Opcode 0x8c
+static void I386OP(mov_rm16_sreg)(i386_state *cpustate) // Opcode 0x8c
{
UINT8 modrm = FETCH(cpustate);
int s = (modrm >> 3) & 0x7;
@@ -788,7 +788,7 @@ static void I386OP(mov_rm16_sreg)(i386_state *cpustate) // Opcode 0x8c
}
}
-static void I386OP(mov_sreg_rm16)(i386_state *cpustate) // Opcode 0x8e
+static void I386OP(mov_sreg_rm16)(i386_state *cpustate) // Opcode 0x8e
{
UINT16 selector;
UINT8 modrm = FETCH(cpustate);
@@ -815,55 +815,55 @@ static void I386OP(mov_sreg_rm16)(i386_state *cpustate) // Opcode 0x8e
}
}
-static void I386OP(mov_al_i8)(i386_state *cpustate) // Opcode 0xb0
+static void I386OP(mov_al_i8)(i386_state *cpustate) // Opcode 0xb0
{
REG8(AL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_cl_i8)(i386_state *cpustate) // Opcode 0xb1
+static void I386OP(mov_cl_i8)(i386_state *cpustate) // Opcode 0xb1
{
REG8(CL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_dl_i8)(i386_state *cpustate) // Opcode 0xb2
+static void I386OP(mov_dl_i8)(i386_state *cpustate) // Opcode 0xb2
{
REG8(DL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_bl_i8)(i386_state *cpustate) // Opcode 0xb3
+static void I386OP(mov_bl_i8)(i386_state *cpustate) // Opcode 0xb3
{
REG8(BL) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_ah_i8)(i386_state *cpustate) // Opcode 0xb4
+static void I386OP(mov_ah_i8)(i386_state *cpustate) // Opcode 0xb4
{
REG8(AH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_ch_i8)(i386_state *cpustate) // Opcode 0xb5
+static void I386OP(mov_ch_i8)(i386_state *cpustate) // Opcode 0xb5
{
REG8(CH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_dh_i8)(i386_state *cpustate) // Opcode 0xb6
+static void I386OP(mov_dh_i8)(i386_state *cpustate) // Opcode 0xb6
{
REG8(DH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(mov_bh_i8)(i386_state *cpustate) // Opcode 0xb7
+static void I386OP(mov_bh_i8)(i386_state *cpustate) // Opcode 0xb7
{
REG8(BH) = FETCH(cpustate);
CYCLES(cpustate,CYCLES_MOV_IMM_REG);
}
-static void I386OP(movsb)(i386_state *cpustate) // Opcode 0xa4
+static void I386OP(movsb)(i386_state *cpustate) // Opcode 0xa4
{
UINT32 eas, ead;
UINT8 v;
@@ -880,7 +880,7 @@ static void I386OP(movsb)(i386_state *cpustate) // Opcode 0xa4
CYCLES(cpustate,CYCLES_MOVS);
}
-static void I386OP(or_rm8_r8)(i386_state *cpustate) // Opcode 0x08
+static void I386OP(or_rm8_r8)(i386_state *cpustate) // Opcode 0x08
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -900,7 +900,7 @@ static void I386OP(or_rm8_r8)(i386_state *cpustate) // Opcode 0x08
}
}
-static void I386OP(or_r8_rm8)(i386_state *cpustate) // Opcode 0x0a
+static void I386OP(or_r8_rm8)(i386_state *cpustate) // Opcode 0x0a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -920,7 +920,7 @@ static void I386OP(or_r8_rm8)(i386_state *cpustate) // Opcode 0x0a
}
}
-static void I386OP(or_al_i8)(i386_state *cpustate) // Opcode 0x0c
+static void I386OP(or_al_i8)(i386_state *cpustate) // Opcode 0x0c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -930,7 +930,7 @@ static void I386OP(or_al_i8)(i386_state *cpustate) // Opcode 0x0c
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(out_al_i8)(i386_state *cpustate) // Opcode 0xe6
+static void I386OP(out_al_i8)(i386_state *cpustate) // Opcode 0xe6
{
UINT16 port = FETCH(cpustate);
UINT8 data = REG8(AL);
@@ -938,7 +938,7 @@ static void I386OP(out_al_i8)(i386_state *cpustate) // Opcode 0xe6
CYCLES(cpustate,CYCLES_OUT_VAR);
}
-static void I386OP(out_al_dx)(i386_state *cpustate) // Opcode 0xee
+static void I386OP(out_al_dx)(i386_state *cpustate) // Opcode 0xee
{
UINT16 port = REG16(DX);
UINT8 data = REG8(AL);
@@ -955,7 +955,7 @@ static void I386OP(arpl)(i386_state *cpustate) // Opcode 0x63
if(PROTECTED_MODE && !V8086_MODE)
{
- if( modrm >= 0xc0 ) {
+ if( modrm >= 0xc0 ) {
src = LOAD_REG16(modrm);
dst = LOAD_RM16(modrm);
if( (dst&0x3) < (src&0x3) ) {
@@ -979,7 +979,7 @@ static void I386OP(arpl)(i386_state *cpustate) // Opcode 0x63
i386_trap(cpustate, 6, 0, 0); // invalid opcode in real mode or v8086 mode
}
-static void I386OP(push_i8)(i386_state *cpustate) // Opcode 0x6a
+static void I386OP(push_i8)(i386_state *cpustate) // Opcode 0x6a
{
UINT8 value = FETCH(cpustate);
PUSH8(cpustate,value);
@@ -1014,20 +1014,20 @@ static void I386OP(ins_generic)(i386_state *cpustate, int size)
REG32(EDI) += ((cpustate->DF) ? -1 : 1) * size;
else
REG16(DI) += ((cpustate->DF) ? -1 : 1) * size;
- CYCLES(cpustate,CYCLES_INS); // TODO: Confirm this value
+ CYCLES(cpustate,CYCLES_INS); // TODO: Confirm this value
}
-static void I386OP(insb)(i386_state *cpustate) // Opcode 0x6c
+static void I386OP(insb)(i386_state *cpustate) // Opcode 0x6c
{
I386OP(ins_generic)(cpustate, 1);
}
-static void I386OP(insw)(i386_state *cpustate) // Opcode 0x6d
+static void I386OP(insw)(i386_state *cpustate) // Opcode 0x6d
{
I386OP(ins_generic)(cpustate, 2);
}
-static void I386OP(insd)(i386_state *cpustate) // Opcode 0x6d
+static void I386OP(insd)(i386_state *cpustate) // Opcode 0x6d
{
I386OP(ins_generic)(cpustate, 4);
}
@@ -1064,20 +1064,20 @@ static void I386OP(outs_generic)(i386_state *cpustate, int size)
REG32(ESI) += ((cpustate->DF) ? -1 : 1) * size;
else
REG16(SI) += ((cpustate->DF) ? -1 : 1) * size;
- CYCLES(cpustate,CYCLES_OUTS); // TODO: Confirm this value
+ CYCLES(cpustate,CYCLES_OUTS); // TODO: Confirm this value
}
-static void I386OP(outsb)(i386_state *cpustate) // Opcode 0x6e
+static void I386OP(outsb)(i386_state *cpustate) // Opcode 0x6e
{
I386OP(outs_generic)(cpustate, 1);
}
-static void I386OP(outsw)(i386_state *cpustate) // Opcode 0x6f
+static void I386OP(outsw)(i386_state *cpustate) // Opcode 0x6f
{
I386OP(outs_generic)(cpustate, 2);
}
-static void I386OP(outsd)(i386_state *cpustate) // Opcode 0x6f
+static void I386OP(outsd)(i386_state *cpustate) // Opcode 0x6f
{
I386OP(outs_generic)(cpustate, 4);
}
@@ -1106,27 +1106,27 @@ static void I386OP(repeat)(i386_state *cpustate, int invert_flag)
I386OP(decode_three_bytef2)(cpustate); // sse f2 0f
return;
case 0x26:
- cpustate->segment_override=ES;
+ cpustate->segment_override=ES;
cpustate->segment_prefix=1;
break;
case 0x2e:
- cpustate->segment_override=CS;
+ cpustate->segment_override=CS;
cpustate->segment_prefix=1;
break;
case 0x36:
- cpustate->segment_override=SS;
+ cpustate->segment_override=SS;
cpustate->segment_prefix=1;
break;
case 0x3e:
- cpustate->segment_override=DS;
+ cpustate->segment_override=DS;
cpustate->segment_prefix=1;
break;
case 0x64:
- cpustate->segment_override=FS;
+ cpustate->segment_override=FS;
cpustate->segment_prefix=1;
break;
case 0x65:
- cpustate->segment_override=GS;
+ cpustate->segment_override=GS;
cpustate->segment_prefix=1;
break;
case 0x66:
@@ -1135,7 +1135,7 @@ static void I386OP(repeat)(i386_state *cpustate, int invert_flag)
case 0x67:
cpustate->address_size ^= 1;
break;
- default:
+ default:
prefix_flag=0;
}
} while (prefix_flag);
@@ -1257,8 +1257,8 @@ static void I386OP(repeat)(i386_state *cpustate, int invert_flag)
outofcycles:
/* if we run out of cycles to execute, and we are still in the repeat, we need
- * to exit this instruction in such a way to go right back into it when we have
- * time to execute cycles */
+ * to exit this instruction in such a way to go right back into it when we have
+ * time to execute cycles */
if(flag && (invert_flag ? *flag : !*flag))
return;
cpustate->eip = cpustate->prev_eip;
@@ -1266,23 +1266,23 @@ outofcycles:
CYCLES_NUM(-cycle_base);
}
-static void I386OP(rep)(i386_state *cpustate) // Opcode 0xf3
+static void I386OP(rep)(i386_state *cpustate) // Opcode 0xf3
{
I386OP(repeat)(cpustate, 0);
}
-static void I386OP(repne)(i386_state *cpustate) // Opcode 0xf2
+static void I386OP(repne)(i386_state *cpustate) // Opcode 0xf2
{
I386OP(repeat)(cpustate, 1);
}
-static void I386OP(sahf)(i386_state *cpustate) // Opcode 0x9e
+static void I386OP(sahf)(i386_state *cpustate) // Opcode 0x9e
{
set_flags(cpustate, (get_flags(cpustate) & 0xffffff00) | (REG8(AH) & 0xd7) );
CYCLES(cpustate,CYCLES_SAHF);
}
-static void I386OP(sbb_rm8_r8)(i386_state *cpustate) // Opcode 0x18
+static void I386OP(sbb_rm8_r8)(i386_state *cpustate) // Opcode 0x18
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1302,7 +1302,7 @@ static void I386OP(sbb_rm8_r8)(i386_state *cpustate) // Opcode 0x18
}
}
-static void I386OP(sbb_r8_rm8)(i386_state *cpustate) // Opcode 0x1a
+static void I386OP(sbb_r8_rm8)(i386_state *cpustate) // Opcode 0x1a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1322,7 +1322,7 @@ static void I386OP(sbb_r8_rm8)(i386_state *cpustate) // Opcode 0x1a
}
}
-static void I386OP(sbb_al_i8)(i386_state *cpustate) // Opcode 0x1c
+static void I386OP(sbb_al_i8)(i386_state *cpustate) // Opcode 0x1c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -1332,7 +1332,7 @@ static void I386OP(sbb_al_i8)(i386_state *cpustate) // Opcode 0x1c
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(scasb)(i386_state *cpustate) // Opcode 0xae
+static void I386OP(scasb)(i386_state *cpustate) // Opcode 0xae
{
UINT32 eas;
UINT8 src, dst;
@@ -1344,7 +1344,7 @@ static void I386OP(scasb)(i386_state *cpustate) // Opcode 0xae
CYCLES(cpustate,CYCLES_SCAS);
}
-static void I386OP(setalc)(i386_state *cpustate) // Opcode 0xd6 (undocumented)
+static void I386OP(setalc)(i386_state *cpustate) // Opcode 0xd6 (undocumented)
{
if( cpustate->CF ) {
REG8(AL) = 0xff;
@@ -1354,7 +1354,7 @@ static void I386OP(setalc)(i386_state *cpustate) // Opcode 0xd6 (undocumented)
CYCLES(cpustate,3);
}
-static void I386OP(seta_rm8)(i386_state *cpustate) // Opcode 0x0f 97
+static void I386OP(seta_rm8)(i386_state *cpustate) // Opcode 0x0f 97
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1371,7 +1371,7 @@ static void I386OP(seta_rm8)(i386_state *cpustate) // Opcode 0x0f 97
}
}
-static void I386OP(setbe_rm8)(i386_state *cpustate) // Opcode 0x0f 96
+static void I386OP(setbe_rm8)(i386_state *cpustate) // Opcode 0x0f 96
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1388,7 +1388,7 @@ static void I386OP(setbe_rm8)(i386_state *cpustate) // Opcode 0x0f 96
}
}
-static void I386OP(setc_rm8)(i386_state *cpustate) // Opcode 0x0f 92
+static void I386OP(setc_rm8)(i386_state *cpustate) // Opcode 0x0f 92
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1405,7 +1405,7 @@ static void I386OP(setc_rm8)(i386_state *cpustate) // Opcode 0x0f 92
}
}
-static void I386OP(setg_rm8)(i386_state *cpustate) // Opcode 0x0f 9f
+static void I386OP(setg_rm8)(i386_state *cpustate) // Opcode 0x0f 9f
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1422,7 +1422,7 @@ static void I386OP(setg_rm8)(i386_state *cpustate) // Opcode 0x0f 9f
}
}
-static void I386OP(setge_rm8)(i386_state *cpustate) // Opcode 0x0f 9d
+static void I386OP(setge_rm8)(i386_state *cpustate) // Opcode 0x0f 9d
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1439,7 +1439,7 @@ static void I386OP(setge_rm8)(i386_state *cpustate) // Opcode 0x0f 9d
}
}
-static void I386OP(setl_rm8)(i386_state *cpustate) // Opcode 0x0f 9c
+static void I386OP(setl_rm8)(i386_state *cpustate) // Opcode 0x0f 9c
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1456,7 +1456,7 @@ static void I386OP(setl_rm8)(i386_state *cpustate) // Opcode 0x0f 9c
}
}
-static void I386OP(setle_rm8)(i386_state *cpustate) // Opcode 0x0f 9e
+static void I386OP(setle_rm8)(i386_state *cpustate) // Opcode 0x0f 9e
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1473,7 +1473,7 @@ static void I386OP(setle_rm8)(i386_state *cpustate) // Opcode 0x0f 9e
}
}
-static void I386OP(setnc_rm8)(i386_state *cpustate) // Opcode 0x0f 93
+static void I386OP(setnc_rm8)(i386_state *cpustate) // Opcode 0x0f 93
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1490,7 +1490,7 @@ static void I386OP(setnc_rm8)(i386_state *cpustate) // Opcode 0x0f 93
}
}
-static void I386OP(setno_rm8)(i386_state *cpustate) // Opcode 0x0f 91
+static void I386OP(setno_rm8)(i386_state *cpustate) // Opcode 0x0f 91
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1507,7 +1507,7 @@ static void I386OP(setno_rm8)(i386_state *cpustate) // Opcode 0x0f 91
}
}
-static void I386OP(setnp_rm8)(i386_state *cpustate) // Opcode 0x0f 9b
+static void I386OP(setnp_rm8)(i386_state *cpustate) // Opcode 0x0f 9b
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1524,7 +1524,7 @@ static void I386OP(setnp_rm8)(i386_state *cpustate) // Opcode 0x0f 9b
}
}
-static void I386OP(setns_rm8)(i386_state *cpustate) // Opcode 0x0f 99
+static void I386OP(setns_rm8)(i386_state *cpustate) // Opcode 0x0f 99
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1541,7 +1541,7 @@ static void I386OP(setns_rm8)(i386_state *cpustate) // Opcode 0x0f 99
}
}
-static void I386OP(setnz_rm8)(i386_state *cpustate) // Opcode 0x0f 95
+static void I386OP(setnz_rm8)(i386_state *cpustate) // Opcode 0x0f 95
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1558,7 +1558,7 @@ static void I386OP(setnz_rm8)(i386_state *cpustate) // Opcode 0x0f 95
}
}
-static void I386OP(seto_rm8)(i386_state *cpustate) // Opcode 0x0f 90
+static void I386OP(seto_rm8)(i386_state *cpustate) // Opcode 0x0f 90
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1575,7 +1575,7 @@ static void I386OP(seto_rm8)(i386_state *cpustate) // Opcode 0x0f 90
}
}
-static void I386OP(setp_rm8)(i386_state *cpustate) // Opcode 0x0f 9a
+static void I386OP(setp_rm8)(i386_state *cpustate) // Opcode 0x0f 9a
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1592,7 +1592,7 @@ static void I386OP(setp_rm8)(i386_state *cpustate) // Opcode 0x0f 9a
}
}
-static void I386OP(sets_rm8)(i386_state *cpustate) // Opcode 0x0f 98
+static void I386OP(sets_rm8)(i386_state *cpustate) // Opcode 0x0f 98
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1609,7 +1609,7 @@ static void I386OP(sets_rm8)(i386_state *cpustate) // Opcode 0x0f 98
}
}
-static void I386OP(setz_rm8)(i386_state *cpustate) // Opcode 0x0f 94
+static void I386OP(setz_rm8)(i386_state *cpustate) // Opcode 0x0f 94
{
UINT8 modrm = FETCH(cpustate);
UINT8 value = 0;
@@ -1626,19 +1626,19 @@ static void I386OP(setz_rm8)(i386_state *cpustate) // Opcode 0x0f 94
}
}
-static void I386OP(stc)(i386_state *cpustate) // Opcode 0xf9
+static void I386OP(stc)(i386_state *cpustate) // Opcode 0xf9
{
cpustate->CF = 1;
CYCLES(cpustate,CYCLES_STC);
}
-static void I386OP(std)(i386_state *cpustate) // Opcode 0xfd
+static void I386OP(std)(i386_state *cpustate) // Opcode 0xfd
{
cpustate->DF = 1;
CYCLES(cpustate,CYCLES_STD);
}
-static void I386OP(sti)(i386_state *cpustate) // Opcode 0xfb
+static void I386OP(sti)(i386_state *cpustate) // Opcode 0xfb
{
if(PROTECTED_MODE)
{
@@ -1650,7 +1650,7 @@ static void I386OP(sti)(i386_state *cpustate) // Opcode 0xfb
CYCLES(cpustate,CYCLES_STI);
}
-static void I386OP(stosb)(i386_state *cpustate) // Opcode 0xaa
+static void I386OP(stosb)(i386_state *cpustate) // Opcode 0xaa
{
UINT32 ead;
ead = i386_translate(cpustate, ES, cpustate->address_size ? REG32(EDI) : REG16(DI), 1 );
@@ -1659,7 +1659,7 @@ static void I386OP(stosb)(i386_state *cpustate) // Opcode 0xaa
CYCLES(cpustate,CYCLES_STOS);
}
-static void I386OP(sub_rm8_r8)(i386_state *cpustate) // Opcode 0x28
+static void I386OP(sub_rm8_r8)(i386_state *cpustate) // Opcode 0x28
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1679,7 +1679,7 @@ static void I386OP(sub_rm8_r8)(i386_state *cpustate) // Opcode 0x28
}
}
-static void I386OP(sub_r8_rm8)(i386_state *cpustate) // Opcode 0x2a
+static void I386OP(sub_r8_rm8)(i386_state *cpustate) // Opcode 0x2a
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1699,7 +1699,7 @@ static void I386OP(sub_r8_rm8)(i386_state *cpustate) // Opcode 0x2a
}
}
-static void I386OP(sub_al_i8)(i386_state *cpustate) // Opcode 0x2c
+static void I386OP(sub_al_i8)(i386_state *cpustate) // Opcode 0x2c
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -1709,7 +1709,7 @@ static void I386OP(sub_al_i8)(i386_state *cpustate) // Opcode 0x2c
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(test_al_i8)(i386_state *cpustate) // Opcode 0xa8
+static void I386OP(test_al_i8)(i386_state *cpustate) // Opcode 0xa8
{
UINT8 src = FETCH(cpustate);
UINT8 dst = REG8(AL);
@@ -1720,7 +1720,7 @@ static void I386OP(test_al_i8)(i386_state *cpustate) // Opcode 0xa8
CYCLES(cpustate,CYCLES_ALU_IMM_ACC);
}
-static void I386OP(test_rm8_r8)(i386_state *cpustate) // Opcode 0x84
+static void I386OP(test_rm8_r8)(i386_state *cpustate) // Opcode 0x84
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1744,7 +1744,7 @@ static void I386OP(test_rm8_r8)(i386_state *cpustate) // Opcode 0x84
}
}
-static void I386OP(xchg_r8_rm8)(i386_state *cpustate) // Opcode 0x86
+static void I386OP(xchg_r8_rm8)(i386_state *cpustate) // Opcode 0x86
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -1763,7 +1763,7 @@ static void I386OP(xchg_r8_rm8)(i386_state *cpustate) // Opcode 0x86
}
}
-static void I386OP(xor_rm8_r8)(i386_state *cpustate) // Opcode 0x30
+static void I386OP(xor_rm8_r8)(i386_state *cpustate) // Opcode 0x30
{
UINT8 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1783,7 +1783,7 @@ static void I386OP(xor_rm8_r8)(i386_state *cpustate) // Opcode 0x30
}
}
-static void I386OP(xor_r8_rm8)(i386_state *cpustate) // Opcode 0x32
+static void I386OP(xor_r8_rm8)(i386_state *cpustate) // Opcode 0x32
{
UINT32 src, dst;
UINT8 modrm = FETCH(cpustate);
@@ -1803,7 +1803,7 @@ static void I386OP(xor_r8_rm8)(i386_state *cpustate) // Opcode 0x32
}
}
-static void I386OP(xor_al_i8)(i386_state *cpustate) // Opcode 0x34
+static void I386OP(xor_al_i8)(i386_state *cpustate) // Opcode 0x34
{
UINT8 src, dst;
src = FETCH(cpustate);
@@ -1815,7 +1815,7 @@ static void I386OP(xor_al_i8)(i386_state *cpustate) // Opcode 0x34
-static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
+static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
{
UINT32 ea;
UINT8 src, dst;
@@ -1823,7 +1823,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
switch( (modrm >> 3) & 0x7 )
{
- case 0: // ADD Rm8, i8
+ case 0: // ADD Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1839,7 +1839,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 1: // OR Rm8, i8
+ case 1: // OR Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1855,7 +1855,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 2: // ADC Rm8, i8
+ case 2: // ADC Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1871,7 +1871,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 3: // SBB Rm8, i8
+ case 3: // SBB Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1887,7 +1887,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 4: // AND Rm8, i8
+ case 4: // AND Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1903,7 +1903,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 5: // SUB Rm8, i8
+ case 5: // SUB Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1919,7 +1919,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 6: // XOR Rm8, i8
+ case 6: // XOR Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1935,7 +1935,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
CYCLES(cpustate,CYCLES_ALU_REG_MEM);
}
break;
- case 7: // CMP Rm8, i8
+ case 7: // CMP Rm8, i8
if( modrm >= 0xc0 ) {
dst = LOAD_RM8(modrm);
src = FETCH(cpustate);
@@ -1952,7 +1952,7 @@ static void I386OP(group80_8)(i386_state *cpustate) // Opcode 0x80
}
}
-static void I386OP(groupC0_8)(i386_state *cpustate) // Opcode 0xc0
+static void I386OP(groupC0_8)(i386_state *cpustate) // Opcode 0xc0
{
UINT8 dst;
UINT8 modrm = FETCH(cpustate);
@@ -1972,7 +1972,7 @@ static void I386OP(groupC0_8)(i386_state *cpustate) // Opcode 0xc0
}
}
-static void I386OP(groupD0_8)(i386_state *cpustate) // Opcode 0xd0
+static void I386OP(groupD0_8)(i386_state *cpustate) // Opcode 0xd0
{
UINT8 dst;
UINT8 modrm = FETCH(cpustate);
@@ -1989,7 +1989,7 @@ static void I386OP(groupD0_8)(i386_state *cpustate) // Opcode 0xd0
}
}
-static void I386OP(groupD2_8)(i386_state *cpustate) // Opcode 0xd2
+static void I386OP(groupD2_8)(i386_state *cpustate) // Opcode 0xd2
{
UINT8 dst;
UINT8 modrm = FETCH(cpustate);
@@ -2006,13 +2006,13 @@ static void I386OP(groupD2_8)(i386_state *cpustate) // Opcode 0xd2
}
}
-static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
+static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* TEST Rm8, i8 */
+ case 0: /* TEST Rm8, i8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
UINT8 src = FETCH(cpustate);
@@ -2030,7 +2030,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
CYCLES(cpustate,CYCLES_TEST_IMM_MEM);
}
break;
- case 2: /* NOT Rm8 */
+ case 2: /* NOT Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = ~dst;
@@ -2044,7 +2044,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
CYCLES(cpustate,CYCLES_NOT_MEM);
}
break;
- case 3: /* NEG Rm8 */
+ case 3: /* NEG Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = SUB8(cpustate, 0, dst );
@@ -2058,17 +2058,17 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
CYCLES(cpustate,CYCLES_NEG_MEM);
}
break;
- case 4: /* MUL AL, Rm8 */
+ case 4: /* MUL AL, Rm8 */
{
UINT16 result;
UINT8 src, dst;
if( modrm >= 0xc0 ) {
src = LOAD_RM8(modrm);
- CYCLES(cpustate,CYCLES_MUL8_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL8_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = READ8(cpustate,ea);
- CYCLES(cpustate,CYCLES_MUL8_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_MUL8_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = REG8(AL);
@@ -2078,17 +2078,17 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
cpustate->CF = cpustate->OF = (REG16(AX) > 0xff);
}
break;
- case 5: /* IMUL AL, Rm8 */
+ case 5: /* IMUL AL, Rm8 */
{
INT16 result;
INT16 src, dst;
if( modrm >= 0xc0 ) {
src = (INT16)(INT8)LOAD_RM8(modrm);
- CYCLES(cpustate,CYCLES_IMUL8_ACC_REG); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL8_ACC_REG); /* TODO: Correct multiply timing */
} else {
UINT32 ea = GetEA(cpustate,modrm,0);
src = (INT16)(INT8)READ8(cpustate,ea);
- CYCLES(cpustate,CYCLES_IMUL8_ACC_MEM); /* TODO: Correct multiply timing */
+ CYCLES(cpustate,CYCLES_IMUL8_ACC_MEM); /* TODO: Correct multiply timing */
}
dst = (INT16)(INT8)REG8(AL);
@@ -2099,7 +2099,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
cpustate->CF = cpustate->OF = !(result == (INT16)(INT8)result);
}
break;
- case 6: /* DIV AL, Rm8 */
+ case 6: /* DIV AL, Rm8 */
{
UINT16 quotient, remainder, result;
UINT8 src;
@@ -2131,7 +2131,7 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
}
}
break;
- case 7: /* IDIV AL, Rm8 */
+ case 7: /* IDIV AL, Rm8 */
{
INT16 quotient, remainder, result;
UINT8 src;
@@ -2166,13 +2166,13 @@ static void I386OP(groupF6_8)(i386_state *cpustate) // Opcode 0xf6
}
}
-static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
+static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
{
UINT8 modrm = FETCH(cpustate);
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* INC Rm8 */
+ case 0: /* INC Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = INC8(cpustate,dst);
@@ -2186,7 +2186,7 @@ static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
CYCLES(cpustate,CYCLES_INC_MEM);
}
break;
- case 1: /* DEC Rm8 */
+ case 1: /* DEC Rm8 */
if( modrm >= 0xc0 ) {
UINT8 dst = LOAD_RM8(modrm);
dst = DEC8(cpustate,dst);
@@ -2200,7 +2200,7 @@ static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
CYCLES(cpustate,CYCLES_DEC_MEM);
}
break;
- case 6: /* PUSH Rm8 */
+ case 6: /* PUSH Rm8 */
{
UINT8 value;
if( modrm >= 0xc0 ) {
@@ -2225,7 +2225,7 @@ static void I386OP(groupFE_8)(i386_state *cpustate) // Opcode 0xfe
-static void I386OP(segment_CS)(i386_state *cpustate) // Opcode 0x2e
+static void I386OP(segment_CS)(i386_state *cpustate) // Opcode 0x2e
{
cpustate->segment_prefix = 1;
cpustate->segment_override = CS;
@@ -2233,47 +2233,47 @@ static void I386OP(segment_CS)(i386_state *cpustate) // Opcode 0x2e
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_DS)(i386_state *cpustate) // Opcode 0x3e
+static void I386OP(segment_DS)(i386_state *cpustate) // Opcode 0x3e
{
cpustate->segment_prefix = 1;
cpustate->segment_override = DS;
- CYCLES(cpustate,0); // TODO: Specify cycle count
+ CYCLES(cpustate,0); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_ES)(i386_state *cpustate) // Opcode 0x26
+static void I386OP(segment_ES)(i386_state *cpustate) // Opcode 0x26
{
cpustate->segment_prefix = 1;
cpustate->segment_override = ES;
- CYCLES(cpustate,0); // TODO: Specify cycle count
+ CYCLES(cpustate,0); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_FS)(i386_state *cpustate) // Opcode 0x64
+static void I386OP(segment_FS)(i386_state *cpustate) // Opcode 0x64
{
cpustate->segment_prefix = 1;
cpustate->segment_override = FS;
- CYCLES(cpustate,1); // TODO: Specify cycle count
+ CYCLES(cpustate,1); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_GS)(i386_state *cpustate) // Opcode 0x65
+static void I386OP(segment_GS)(i386_state *cpustate) // Opcode 0x65
{
cpustate->segment_prefix = 1;
cpustate->segment_override = GS;
- CYCLES(cpustate,1); // TODO: Specify cycle count
+ CYCLES(cpustate,1); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(segment_SS)(i386_state *cpustate) // Opcode 0x36
+static void I386OP(segment_SS)(i386_state *cpustate) // Opcode 0x36
{
cpustate->segment_prefix = 1;
cpustate->segment_override = SS;
- CYCLES(cpustate,0); // TODO: Specify cycle count
+ CYCLES(cpustate,0); // TODO: Specify cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(operand_size)(i386_state *cpustate) // Opcode prefix 0x66
+static void I386OP(operand_size)(i386_state *cpustate) // Opcode prefix 0x66
{
if(cpustate->operand_prefix == 0)
{
@@ -2292,7 +2292,7 @@ static void I386OP(operand_size)(i386_state *cpustate) // Opcode prefix 0x66
}
}
-static void I386OP(address_size)(i386_state *cpustate) // Opcode 0x67
+static void I386OP(address_size)(i386_state *cpustate) // Opcode 0x67
{
if(cpustate->address_prefix == 0)
{
@@ -2302,12 +2302,12 @@ static void I386OP(address_size)(i386_state *cpustate) // Opcode 0x67
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(nop)(i386_state *cpustate) // Opcode 0x90
+static void I386OP(nop)(i386_state *cpustate) // Opcode 0x90
{
CYCLES(cpustate,CYCLES_NOP);
}
-static void I386OP(int3)(i386_state *cpustate) // Opcode 0xcc
+static void I386OP(int3)(i386_state *cpustate) // Opcode 0xcc
{
CYCLES(cpustate,CYCLES_INT3);
cpustate->ext = 0; // not an external interrupt
@@ -2315,7 +2315,7 @@ static void I386OP(int3)(i386_state *cpustate) // Opcode 0xcc
cpustate->ext = 1;
}
-static void I386OP(int)(i386_state *cpustate) // Opcode 0xcd
+static void I386OP(int)(i386_state *cpustate) // Opcode 0xcd
{
int interrupt = FETCH(cpustate);
CYCLES(cpustate,CYCLES_INT);
@@ -2324,7 +2324,7 @@ static void I386OP(int)(i386_state *cpustate) // Opcode 0xcd
cpustate->ext = 1;
}
-static void I386OP(into)(i386_state *cpustate) // Opcode 0xce
+static void I386OP(into)(i386_state *cpustate) // Opcode 0xce
{
if( cpustate->OF ) {
cpustate->ext = 0;
@@ -2338,19 +2338,19 @@ static void I386OP(into)(i386_state *cpustate) // Opcode 0xce
}
}
-static UINT32 i386_escape_ea; // hack around GCC 4.6 error because we need the side effects of GetEA()
-static void I386OP(escape)(i386_state *cpustate) // Opcodes 0xd8 - 0xdf
+static UINT32 i386_escape_ea; // hack around GCC 4.6 error because we need the side effects of GetEA()
+static void I386OP(escape)(i386_state *cpustate) // Opcodes 0xd8 - 0xdf
{
UINT8 modrm = FETCH(cpustate);
if(modrm < 0xc0)
{
i386_escape_ea = GetEA(cpustate,modrm,0);
}
- CYCLES(cpustate,3); // TODO: confirm this
+ CYCLES(cpustate,3); // TODO: confirm this
(void) LOAD_RM8(modrm);
}
-static void I386OP(hlt)(i386_state *cpustate) // Opcode 0xf4
+static void I386OP(hlt)(i386_state *cpustate) // Opcode 0xf4
{
if(PROTECTED_MODE && cpustate->CPL != 0)
FAULT(FAULT_GP,0);
@@ -2385,19 +2385,19 @@ static void I386OP(decimal_adjust)(i386_state *cpustate, int direction)
SetSZPF8(REG8(AL));
}
-static void I386OP(daa)(i386_state *cpustate) // Opcode 0x27
+static void I386OP(daa)(i386_state *cpustate) // Opcode 0x27
{
I386OP(decimal_adjust)(cpustate, +1);
CYCLES(cpustate,CYCLES_DAA);
}
-static void I386OP(das)(i386_state *cpustate) // Opcode 0x2f
+static void I386OP(das)(i386_state *cpustate) // Opcode 0x2f
{
I386OP(decimal_adjust)(cpustate, -1);
CYCLES(cpustate,CYCLES_DAS);
}
-static void I386OP(aaa)(i386_state *cpustate) // Opcode 0x37
+static void I386OP(aaa)(i386_state *cpustate) // Opcode 0x37
{
if( ( (REG8(AL) & 0x0f) > 9) || (cpustate->AF != 0) ) {
REG16(AX) = REG16(AX) + 6;
@@ -2412,25 +2412,25 @@ static void I386OP(aaa)(i386_state *cpustate) // Opcode 0x37
CYCLES(cpustate,CYCLES_AAA);
}
-static void I386OP(aas)(i386_state *cpustate) // Opcode 0x3f
+static void I386OP(aas)(i386_state *cpustate) // Opcode 0x3f
{
if (cpustate->AF || ((REG8(AL) & 0xf) > 9))
- {
+ {
REG16(AX) -= 6;
REG8(AH) -= 1;
cpustate->AF = 1;
cpustate->CF = 1;
- }
+ }
else
{
cpustate->AF = 0;
cpustate->CF = 0;
- }
+ }
REG8(AL) &= 0x0f;
CYCLES(cpustate,CYCLES_AAS);
}
-static void I386OP(aad)(i386_state *cpustate) // Opcode 0xd5
+static void I386OP(aad)(i386_state *cpustate) // Opcode 0xd5
{
UINT8 tempAL = REG8(AL);
UINT8 tempAH = REG8(AH);
@@ -2442,7 +2442,7 @@ static void I386OP(aad)(i386_state *cpustate) // Opcode 0xd5
CYCLES(cpustate,CYCLES_AAD);
}
-static void I386OP(aam)(i386_state *cpustate) // Opcode 0xd4
+static void I386OP(aam)(i386_state *cpustate) // Opcode 0xd4
{
UINT8 tempAL = REG8(AL);
UINT8 i = FETCH(cpustate);
@@ -2453,44 +2453,44 @@ static void I386OP(aam)(i386_state *cpustate) // Opcode 0xd4
CYCLES(cpustate,CYCLES_AAM);
}
-static void I386OP(clts)(i386_state *cpustate) // Opcode 0x0f 0x06
+static void I386OP(clts)(i386_state *cpustate) // Opcode 0x0f 0x06
{
// Privileged instruction, CPL must be zero. Can be used in real or v86 mode.
if(PROTECTED_MODE && cpustate->CPL != 0)
FAULT(FAULT_GP,0)
- cpustate->cr[0] &= ~0x08; /* clear TS bit */
+ cpustate->cr[0] &= ~0x08; /* clear TS bit */
CYCLES(cpustate,CYCLES_CLTS);
}
-static void I386OP(wait)(i386_state *cpustate) // Opcode 0x9B
+static void I386OP(wait)(i386_state *cpustate) // Opcode 0x9B
{
// TODO
}
-static void I386OP(lock)(i386_state *cpustate) // Opcode 0xf0
+static void I386OP(lock)(i386_state *cpustate) // Opcode 0xf0
{
// lock doesn't depend on iopl on 386
// TODO: lock causes UD on unlockable opcodes
- CYCLES(cpustate,CYCLES_LOCK); // TODO: Determine correct cycle count
+ CYCLES(cpustate,CYCLES_LOCK); // TODO: Determine correct cycle count
I386OP(decode_opcode)(cpustate);
}
-static void I386OP(mov_r32_tr)(i386_state *cpustate) // Opcode 0x0f 24
+static void I386OP(mov_r32_tr)(i386_state *cpustate) // Opcode 0x0f 24
{
FETCH(cpustate);
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
-static void I386OP(mov_tr_r32)(i386_state *cpustate) // Opcode 0x0f 26
+static void I386OP(mov_tr_r32)(i386_state *cpustate) // Opcode 0x0f 26
{
FETCH(cpustate);
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
-static void I386OP(loadall)(i386_state *cpustate) // Opcode 0x0f 0x07 (0x0f 0x05 on 80286), undocumented
+static void I386OP(loadall)(i386_state *cpustate) // Opcode 0x0f 0x07 (0x0f 0x05 on 80286), undocumented
{
popmessage("LOADALL instruction hit!");
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
static void I386OP(unimplemented)(i386_state *cpustate)
@@ -2504,7 +2504,7 @@ static void I386OP(invalid)(i386_state *cpustate)
i386_trap(cpustate, 6, 0, 0);
}
-static void I386OP(xlat)(i386_state *cpustate) // Opcode 0xd7
+static void I386OP(xlat)(i386_state *cpustate) // Opcode 0xd7
{
UINT32 ea;
if( cpustate->segment_prefix ) {
diff --git a/src/emu/cpu/i386/i386ops.h b/src/emu/cpu/i386/i386ops.h
index c2050671cfa..05cff366717 100644
--- a/src/emu/cpu/i386/i386ops.h
+++ b/src/emu/cpu/i386/i386ops.h
@@ -5,387 +5,387 @@ struct X86_OPCODE {
void (*handler32)(i386_state *cpustate);
};
-#define OP_I386 0x1
-#define OP_FPU 0x2
-#define OP_I486 0x4
-#define OP_PENTIUM 0x8
-#define OP_MMX 0x10
-#define OP_PPRO 0x20
-#define OP_SSE 0x40
-#define OP_SSE2 0x80
-#define OP_SSE3 0x100
-#define OP_CYRIX 0x8000
-#define OP_2BYTE 0x80000000
-#define OP_3BYTE66 0x40000000
-#define OP_3BYTEF2 0x20000000
-#define OP_3BYTEF3 0x10000000
+#define OP_I386 0x1
+#define OP_FPU 0x2
+#define OP_I486 0x4
+#define OP_PENTIUM 0x8
+#define OP_MMX 0x10
+#define OP_PPRO 0x20
+#define OP_SSE 0x40
+#define OP_SSE2 0x80
+#define OP_SSE3 0x100
+#define OP_CYRIX 0x8000
+#define OP_2BYTE 0x80000000
+#define OP_3BYTE66 0x40000000
+#define OP_3BYTEF2 0x20000000
+#define OP_3BYTEF3 0x10000000
static const X86_OPCODE x86_opcode_table[] =
{
// Opcode Flags 16-bit handler 32-bit handler
- { 0x00, OP_I386, I386OP(add_rm8_r8), I386OP(add_rm8_r8), },
- { 0x01, OP_I386, I386OP(add_rm16_r16), I386OP(add_rm32_r32), },
- { 0x02, OP_I386, I386OP(add_r8_rm8), I386OP(add_r8_rm8), },
- { 0x03, OP_I386, I386OP(add_r16_rm16), I386OP(add_r32_rm32), },
- { 0x04, OP_I386, I386OP(add_al_i8), I386OP(add_al_i8), },
- { 0x05, OP_I386, I386OP(add_ax_i16), I386OP(add_eax_i32), },
- { 0x06, OP_I386, I386OP(push_es16), I386OP(push_es32), },
- { 0x07, OP_I386, I386OP(pop_es16), I386OP(pop_es32), },
- { 0x08, OP_I386, I386OP(or_rm8_r8), I386OP(or_rm8_r8), },
- { 0x09, OP_I386, I386OP(or_rm16_r16), I386OP(or_rm32_r32), },
- { 0x0A, OP_I386, I386OP(or_r8_rm8), I386OP(or_r8_rm8), },
- { 0x0B, OP_I386, I386OP(or_r16_rm16), I386OP(or_r32_rm32), },
- { 0x0C, OP_I386, I386OP(or_al_i8), I386OP(or_al_i8), },
- { 0x0D, OP_I386, I386OP(or_ax_i16), I386OP(or_eax_i32), },
- { 0x0E, OP_I386, I386OP(push_cs16), I386OP(push_cs32), },
- { 0x0F, OP_I386, I386OP(decode_two_byte), I386OP(decode_two_byte), },
- { 0x10, OP_I386, I386OP(adc_rm8_r8), I386OP(adc_rm8_r8), },
- { 0x11, OP_I386, I386OP(adc_rm16_r16), I386OP(adc_rm32_r32), },
- { 0x12, OP_I386, I386OP(adc_r8_rm8), I386OP(adc_r8_rm8), },
- { 0x13, OP_I386, I386OP(adc_r16_rm16), I386OP(adc_r32_rm32), },
- { 0x14, OP_I386, I386OP(adc_al_i8), I386OP(adc_al_i8), },
- { 0x15, OP_I386, I386OP(adc_ax_i16), I386OP(adc_eax_i32), },
- { 0x16, OP_I386, I386OP(push_ss16), I386OP(push_ss32), },
- { 0x17, OP_I386, I386OP(pop_ss16), I386OP(pop_ss32), },
- { 0x18, OP_I386, I386OP(sbb_rm8_r8), I386OP(sbb_rm8_r8), },
- { 0x19, OP_I386, I386OP(sbb_rm16_r16), I386OP(sbb_rm32_r32), },
- { 0x1A, OP_I386, I386OP(sbb_r8_rm8), I386OP(sbb_r8_rm8), },
- { 0x1B, OP_I386, I386OP(sbb_r16_rm16), I386OP(sbb_r32_rm32), },
- { 0x1C, OP_I386, I386OP(sbb_al_i8), I386OP(sbb_al_i8), },
- { 0x1D, OP_I386, I386OP(sbb_ax_i16), I386OP(sbb_eax_i32), },
- { 0x1E, OP_I386, I386OP(push_ds16), I386OP(push_ds32), },
- { 0x1F, OP_I386, I386OP(pop_ds16), I386OP(pop_ds32), },
- { 0x20, OP_I386, I386OP(and_rm8_r8), I386OP(and_rm8_r8), },
- { 0x21, OP_I386, I386OP(and_rm16_r16), I386OP(and_rm32_r32), },
- { 0x22, OP_I386, I386OP(and_r8_rm8), I386OP(and_r8_rm8), },
- { 0x23, OP_I386, I386OP(and_r16_rm16), I386OP(and_r32_rm32), },
- { 0x24, OP_I386, I386OP(and_al_i8), I386OP(and_al_i8), },
- { 0x25, OP_I386, I386OP(and_ax_i16), I386OP(and_eax_i32), },
- { 0x26, OP_I386, I386OP(segment_ES), I386OP(segment_ES), },
- { 0x27, OP_I386, I386OP(daa), I386OP(daa), },
- { 0x28, OP_I386, I386OP(sub_rm8_r8), I386OP(sub_rm8_r8), },
- { 0x29, OP_I386, I386OP(sub_rm16_r16), I386OP(sub_rm32_r32), },
- { 0x2A, OP_I386, I386OP(sub_r8_rm8), I386OP(sub_r8_rm8), },
- { 0x2B, OP_I386, I386OP(sub_r16_rm16), I386OP(sub_r32_rm32), },
- { 0x2C, OP_I386, I386OP(sub_al_i8), I386OP(sub_al_i8), },
- { 0x2D, OP_I386, I386OP(sub_ax_i16), I386OP(sub_eax_i32), },
- { 0x2E, OP_I386, I386OP(segment_CS), I386OP(segment_CS), },
- { 0x2F, OP_I386, I386OP(das), I386OP(das), },
- { 0x30, OP_I386, I386OP(xor_rm8_r8), I386OP(xor_rm8_r8), },
- { 0x31, OP_I386, I386OP(xor_rm16_r16), I386OP(xor_rm32_r32), },
- { 0x32, OP_I386, I386OP(xor_r8_rm8), I386OP(xor_r8_rm8), },
- { 0x33, OP_I386, I386OP(xor_r16_rm16), I386OP(xor_r32_rm32), },
- { 0x34, OP_I386, I386OP(xor_al_i8), I386OP(xor_al_i8), },
- { 0x35, OP_I386, I386OP(xor_ax_i16), I386OP(xor_eax_i32), },
- { 0x36, OP_I386, I386OP(segment_SS), I386OP(segment_SS), },
- { 0x37, OP_I386, I386OP(aaa), I386OP(aaa), },
- { 0x38, OP_I386, I386OP(cmp_rm8_r8), I386OP(cmp_rm8_r8), },
- { 0x39, OP_I386, I386OP(cmp_rm16_r16), I386OP(cmp_rm32_r32), },
- { 0x3A, OP_I386, I386OP(cmp_r8_rm8), I386OP(cmp_r8_rm8), },
- { 0x3B, OP_I386, I386OP(cmp_r16_rm16), I386OP(cmp_r32_rm32), },
- { 0x3C, OP_I386, I386OP(cmp_al_i8), I386OP(cmp_al_i8), },
- { 0x3D, OP_I386, I386OP(cmp_ax_i16), I386OP(cmp_eax_i32), },
- { 0x3E, OP_I386, I386OP(segment_DS), I386OP(segment_DS), },
- { 0x3F, OP_I386, I386OP(aas), I386OP(aas), },
- { 0x40, OP_I386, I386OP(inc_ax), I386OP(inc_eax), },
- { 0x41, OP_I386, I386OP(inc_cx), I386OP(inc_ecx), },
- { 0x42, OP_I386, I386OP(inc_dx), I386OP(inc_edx), },
- { 0x43, OP_I386, I386OP(inc_bx), I386OP(inc_ebx), },
- { 0x44, OP_I386, I386OP(inc_sp), I386OP(inc_esp), },
- { 0x45, OP_I386, I386OP(inc_bp), I386OP(inc_ebp), },
- { 0x46, OP_I386, I386OP(inc_si), I386OP(inc_esi), },
- { 0x47, OP_I386, I386OP(inc_di), I386OP(inc_edi), },
- { 0x48, OP_I386, I386OP(dec_ax), I386OP(dec_eax), },
- { 0x49, OP_I386, I386OP(dec_cx), I386OP(dec_ecx), },
- { 0x4A, OP_I386, I386OP(dec_dx), I386OP(dec_edx), },
- { 0x4B, OP_I386, I386OP(dec_bx), I386OP(dec_ebx), },
- { 0x4C, OP_I386, I386OP(dec_sp), I386OP(dec_esp), },
- { 0x4D, OP_I386, I386OP(dec_bp), I386OP(dec_ebp), },
- { 0x4E, OP_I386, I386OP(dec_si), I386OP(dec_esi), },
- { 0x4F, OP_I386, I386OP(dec_di), I386OP(dec_edi), },
- { 0x50, OP_I386, I386OP(push_ax), I386OP(push_eax), },
- { 0x51, OP_I386, I386OP(push_cx), I386OP(push_ecx), },
- { 0x52, OP_I386, I386OP(push_dx), I386OP(push_edx), },
- { 0x53, OP_I386, I386OP(push_bx), I386OP(push_ebx), },
- { 0x54, OP_I386, I386OP(push_sp), I386OP(push_esp), },
- { 0x55, OP_I386, I386OP(push_bp), I386OP(push_ebp), },
- { 0x56, OP_I386, I386OP(push_si), I386OP(push_esi), },
- { 0x57, OP_I386, I386OP(push_di), I386OP(push_edi), },
- { 0x58, OP_I386, I386OP(pop_ax), I386OP(pop_eax), },
- { 0x59, OP_I386, I386OP(pop_cx), I386OP(pop_ecx), },
- { 0x5A, OP_I386, I386OP(pop_dx), I386OP(pop_edx), },
- { 0x5B, OP_I386, I386OP(pop_bx), I386OP(pop_ebx), },
- { 0x5C, OP_I386, I386OP(pop_sp), I386OP(pop_esp), },
- { 0x5D, OP_I386, I386OP(pop_bp), I386OP(pop_ebp), },
- { 0x5E, OP_I386, I386OP(pop_si), I386OP(pop_esi), },
- { 0x5F, OP_I386, I386OP(pop_di), I386OP(pop_edi), },
- { 0x60, OP_I386, I386OP(pusha), I386OP(pushad), },
- { 0x61, OP_I386, I386OP(popa), I386OP(popad), },
- { 0x62, OP_I386, I386OP(bound_r16_m16_m16), I386OP(bound_r32_m32_m32), },
- { 0x63, OP_I386, I386OP(arpl), I386OP(arpl), },
- { 0x64, OP_I386, I386OP(segment_FS), I386OP(segment_FS), },
- { 0x65, OP_I386, I386OP(segment_GS), I386OP(segment_GS), },
- { 0x66, OP_I386, I386OP(operand_size), I386OP(operand_size), },
- { 0x67, OP_I386, I386OP(address_size), I386OP(address_size), },
- { 0x68, OP_I386, I386OP(push_i16), I386OP(push_i32), },
- { 0x69, OP_I386, I386OP(imul_r16_rm16_i16), I386OP(imul_r32_rm32_i32), },
- { 0x6A, OP_I386, I386OP(push_i8), I386OP(push_i8), },
- { 0x6B, OP_I386, I386OP(imul_r16_rm16_i8), I386OP(imul_r32_rm32_i8), },
- { 0x6C, OP_I386, I386OP(insb), I386OP(insb), },
- { 0x6D, OP_I386, I386OP(insw), I386OP(insd), },
- { 0x6E, OP_I386, I386OP(outsb), I386OP(outsb), },
- { 0x6F, OP_I386, I386OP(outsw), I386OP(outsd), },
- { 0x70, OP_I386, I386OP(jo_rel8), I386OP(jo_rel8), },
- { 0x71, OP_I386, I386OP(jno_rel8), I386OP(jno_rel8), },
- { 0x72, OP_I386, I386OP(jc_rel8), I386OP(jc_rel8), },
- { 0x73, OP_I386, I386OP(jnc_rel8), I386OP(jnc_rel8), },
- { 0x74, OP_I386, I386OP(jz_rel8), I386OP(jz_rel8), },
- { 0x75, OP_I386, I386OP(jnz_rel8), I386OP(jnz_rel8), },
- { 0x76, OP_I386, I386OP(jbe_rel8), I386OP(jbe_rel8), },
- { 0x77, OP_I386, I386OP(ja_rel8), I386OP(ja_rel8), },
- { 0x78, OP_I386, I386OP(js_rel8), I386OP(js_rel8), },
- { 0x79, OP_I386, I386OP(jns_rel8), I386OP(jns_rel8), },
- { 0x7A, OP_I386, I386OP(jp_rel8), I386OP(jp_rel8), },
- { 0x7B, OP_I386, I386OP(jnp_rel8), I386OP(jnp_rel8), },
- { 0x7C, OP_I386, I386OP(jl_rel8), I386OP(jl_rel8), },
- { 0x7D, OP_I386, I386OP(jge_rel8), I386OP(jge_rel8), },
- { 0x7E, OP_I386, I386OP(jle_rel8), I386OP(jle_rel8), },
- { 0x7F, OP_I386, I386OP(jg_rel8), I386OP(jg_rel8), },
- { 0x80, OP_I386, I386OP(group80_8), I386OP(group80_8), },
- { 0x81, OP_I386, I386OP(group81_16), I386OP(group81_32), },
- { 0x82, OP_I386, I386OP(group80_8), I386OP(group80_8), },
- { 0x83, OP_I386, I386OP(group83_16), I386OP(group83_32), },
- { 0x84, OP_I386, I386OP(test_rm8_r8), I386OP(test_rm8_r8), },
- { 0x85, OP_I386, I386OP(test_rm16_r16), I386OP(test_rm32_r32), },
- { 0x86, OP_I386, I386OP(xchg_r8_rm8), I386OP(xchg_r8_rm8), },
- { 0x87, OP_I386, I386OP(xchg_r16_rm16), I386OP(xchg_r32_rm32), },
- { 0x88, OP_I386, I386OP(mov_rm8_r8), I386OP(mov_rm8_r8), },
- { 0x89, OP_I386, I386OP(mov_rm16_r16), I386OP(mov_rm32_r32), },
- { 0x8A, OP_I386, I386OP(mov_r8_rm8), I386OP(mov_r8_rm8), },
- { 0x8B, OP_I386, I386OP(mov_r16_rm16), I386OP(mov_r32_rm32), },
- { 0x8C, OP_I386, I386OP(mov_rm16_sreg), I386OP(mov_rm16_sreg), },
- { 0x8D, OP_I386, I386OP(lea16), I386OP(lea32), },
- { 0x8E, OP_I386, I386OP(mov_sreg_rm16), I386OP(mov_sreg_rm16), },
- { 0x8F, OP_I386, I386OP(pop_rm16), I386OP(pop_rm32), },
- { 0x90, OP_I386, I386OP(nop), I386OP(nop), },
- { 0x91, OP_I386, I386OP(xchg_ax_cx), I386OP(xchg_eax_ecx), },
- { 0x92, OP_I386, I386OP(xchg_ax_dx), I386OP(xchg_eax_edx), },
- { 0x93, OP_I386, I386OP(xchg_ax_bx), I386OP(xchg_eax_ebx), },
- { 0x94, OP_I386, I386OP(xchg_ax_sp), I386OP(xchg_eax_esp), },
- { 0x95, OP_I386, I386OP(xchg_ax_bp), I386OP(xchg_eax_ebp), },
- { 0x96, OP_I386, I386OP(xchg_ax_si), I386OP(xchg_eax_esi), },
- { 0x97, OP_I386, I386OP(xchg_ax_di), I386OP(xchg_eax_edi), },
- { 0x98, OP_I386, I386OP(cbw), I386OP(cwde), },
- { 0x99, OP_I386, I386OP(cwd), I386OP(cdq), },
- { 0x9A, OP_I386, I386OP(call_abs16), I386OP(call_abs32), },
- { 0x9B, OP_I386, I386OP(wait), I386OP(wait), },
- { 0x9C, OP_I386, I386OP(pushf), I386OP(pushfd), },
- { 0x9D, OP_I386, I386OP(popf), I386OP(popfd), },
- { 0x9E, OP_I386, I386OP(sahf), I386OP(sahf), },
- { 0x9F, OP_I386, I386OP(lahf), I386OP(lahf), },
- { 0xA0, OP_I386, I386OP(mov_al_m8), I386OP(mov_al_m8), },
- { 0xA1, OP_I386, I386OP(mov_ax_m16), I386OP(mov_eax_m32), },
- { 0xA2, OP_I386, I386OP(mov_m8_al), I386OP(mov_m8_al), },
- { 0xA3, OP_I386, I386OP(mov_m16_ax), I386OP(mov_m32_eax), },
- { 0xA4, OP_I386, I386OP(movsb), I386OP(movsb), },
- { 0xA5, OP_I386, I386OP(movsw), I386OP(movsd), },
- { 0xA6, OP_I386, I386OP(cmpsb), I386OP(cmpsb), },
- { 0xA7, OP_I386, I386OP(cmpsw), I386OP(cmpsd), },
- { 0xA8, OP_I386, I386OP(test_al_i8), I386OP(test_al_i8), },
- { 0xA9, OP_I386, I386OP(test_ax_i16), I386OP(test_eax_i32), },
- { 0xAA, OP_I386, I386OP(stosb), I386OP(stosb), },
- { 0xAB, OP_I386, I386OP(stosw), I386OP(stosd), },
- { 0xAC, OP_I386, I386OP(lodsb), I386OP(lodsb), },
- { 0xAD, OP_I386, I386OP(lodsw), I386OP(lodsd), },
- { 0xAE, OP_I386, I386OP(scasb), I386OP(scasb), },
- { 0xAF, OP_I386, I386OP(scasw), I386OP(scasd), },
- { 0xB0, OP_I386, I386OP(mov_al_i8), I386OP(mov_al_i8), },
- { 0xB1, OP_I386, I386OP(mov_cl_i8), I386OP(mov_cl_i8), },
- { 0xB2, OP_I386, I386OP(mov_dl_i8), I386OP(mov_dl_i8), },
- { 0xB3, OP_I386, I386OP(mov_bl_i8), I386OP(mov_bl_i8), },
- { 0xB4, OP_I386, I386OP(mov_ah_i8), I386OP(mov_ah_i8), },
- { 0xB5, OP_I386, I386OP(mov_ch_i8), I386OP(mov_ch_i8), },
- { 0xB6, OP_I386, I386OP(mov_dh_i8), I386OP(mov_dh_i8), },
- { 0xB7, OP_I386, I386OP(mov_bh_i8), I386OP(mov_bh_i8), },
- { 0xB8, OP_I386, I386OP(mov_ax_i16), I386OP(mov_eax_i32), },
- { 0xB9, OP_I386, I386OP(mov_cx_i16), I386OP(mov_ecx_i32), },
- { 0xBA, OP_I386, I386OP(mov_dx_i16), I386OP(mov_edx_i32), },
- { 0xBB, OP_I386, I386OP(mov_bx_i16), I386OP(mov_ebx_i32), },
- { 0xBC, OP_I386, I386OP(mov_sp_i16), I386OP(mov_esp_i32), },
- { 0xBD, OP_I386, I386OP(mov_bp_i16), I386OP(mov_ebp_i32), },
- { 0xBE, OP_I386, I386OP(mov_si_i16), I386OP(mov_esi_i32), },
- { 0xBF, OP_I386, I386OP(mov_di_i16), I386OP(mov_edi_i32), },
- { 0xC0, OP_I386, I386OP(groupC0_8), I386OP(groupC0_8), },
- { 0xC1, OP_I386, I386OP(groupC1_16), I386OP(groupC1_32), },
- { 0xC2, OP_I386, I386OP(ret_near16_i16), I386OP(ret_near32_i16), },
- { 0xC3, OP_I386, I386OP(ret_near16), I386OP(ret_near32), },
- { 0xC4, OP_I386, I386OP(les16), I386OP(les32), },
- { 0xC5, OP_I386, I386OP(lds16), I386OP(lds32), },
- { 0xC6, OP_I386, I386OP(mov_rm8_i8), I386OP(mov_rm8_i8), },
- { 0xC7, OP_I386, I386OP(mov_rm16_i16), I386OP(mov_rm32_i32), },
- { 0xC8, OP_I386, I386OP(enter16), I386OP(enter32), },
- { 0xC9, OP_I386, I386OP(leave16), I386OP(leave32), },
- { 0xCA, OP_I386, I386OP(retf_i16), I386OP(retf_i32), },
- { 0xCB, OP_I386, I386OP(retf16), I386OP(retf32), },
- { 0xCC, OP_I386, I386OP(int3), I386OP(int3), },
- { 0xCD, OP_I386, I386OP(int), I386OP(int), },
- { 0xCE, OP_I386, I386OP(into), I386OP(into), },
- { 0xCF, OP_I386, I386OP(iret16), I386OP(iret32), },
- { 0xD0, OP_I386, I386OP(groupD0_8), I386OP(groupD0_8), },
- { 0xD1, OP_I386, I386OP(groupD1_16), I386OP(groupD1_32), },
- { 0xD2, OP_I386, I386OP(groupD2_8), I386OP(groupD2_8), },
- { 0xD3, OP_I386, I386OP(groupD3_16), I386OP(groupD3_32), },
- { 0xD4, OP_I386, I386OP(aam), I386OP(aam), },
- { 0xD5, OP_I386, I386OP(aad), I386OP(aad), },
- { 0xD6, OP_I386, I386OP(setalc), I386OP(setalc), },
- { 0xD7, OP_I386, I386OP(xlat), I386OP(xlat), },
- { 0xD8, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xD9, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xDA, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xDB, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xDC, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xDD, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xDE, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xDF, OP_I386, I386OP(escape), I386OP(escape), },
- { 0xD8, OP_FPU, I386OP(x87_group_d8), I386OP(x87_group_d8), },
- { 0xD9, OP_FPU, I386OP(x87_group_d9), I386OP(x87_group_d9), },
- { 0xDA, OP_FPU, I386OP(x87_group_da), I386OP(x87_group_da), },
- { 0xDB, OP_FPU, I386OP(x87_group_db), I386OP(x87_group_db), },
- { 0xDC, OP_FPU, I386OP(x87_group_dc), I386OP(x87_group_dc), },
- { 0xDD, OP_FPU, I386OP(x87_group_dd), I386OP(x87_group_dd), },
- { 0xDE, OP_FPU, I386OP(x87_group_de), I386OP(x87_group_de), },
- { 0xDF, OP_FPU, I386OP(x87_group_df), I386OP(x87_group_df), },
- { 0xE0, OP_I386, I386OP(loopne16), I386OP(loopne32), },
- { 0xE1, OP_I386, I386OP(loopz16), I386OP(loopz32), },
- { 0xE2, OP_I386, I386OP(loop16), I386OP(loop32), },
- { 0xE3, OP_I386, I386OP(jcxz16), I386OP(jcxz32), },
- { 0xE4, OP_I386, I386OP(in_al_i8), I386OP(in_al_i8), },
- { 0xE5, OP_I386, I386OP(in_ax_i8), I386OP(in_eax_i8), },
- { 0xE6, OP_I386, I386OP(out_al_i8), I386OP(out_al_i8), },
- { 0xE7, OP_I386, I386OP(out_ax_i8), I386OP(out_eax_i8), },
- { 0xE8, OP_I386, I386OP(call_rel16), I386OP(call_rel32), },
- { 0xE9, OP_I386, I386OP(jmp_rel16), I386OP(jmp_rel32), },
- { 0xEA, OP_I386, I386OP(jmp_abs16), I386OP(jmp_abs32), },
- { 0xEB, OP_I386, I386OP(jmp_rel8), I386OP(jmp_rel8), },
- { 0xEC, OP_I386, I386OP(in_al_dx), I386OP(in_al_dx), },
- { 0xED, OP_I386, I386OP(in_ax_dx), I386OP(in_eax_dx), },
- { 0xEE, OP_I386, I386OP(out_al_dx), I386OP(out_al_dx), },
- { 0xEF, OP_I386, I386OP(out_ax_dx), I386OP(out_eax_dx), },
- { 0xF0, OP_I386, I386OP(lock), I386OP(lock), },
- { 0xF1, OP_I386, I386OP(invalid), I386OP(invalid), },
- { 0xF2, OP_I386, I386OP(repne), I386OP(repne), },
- { 0xF3, OP_I386, I386OP(rep), I386OP(rep), },
- { 0xF4, OP_I386, I386OP(hlt), I386OP(hlt), },
- { 0xF5, OP_I386, I386OP(cmc), I386OP(cmc), },
- { 0xF6, OP_I386, I386OP(groupF6_8), I386OP(groupF6_8), },
- { 0xF7, OP_I386, I386OP(groupF7_16), I386OP(groupF7_32), },
- { 0xF8, OP_I386, I386OP(clc), I386OP(clc), },
- { 0xF9, OP_I386, I386OP(stc), I386OP(stc), },
- { 0xFA, OP_I386, I386OP(cli), I386OP(cli), },
- { 0xFB, OP_I386, I386OP(sti), I386OP(sti), },
- { 0xFC, OP_I386, I386OP(cld), I386OP(cld), },
- { 0xFD, OP_I386, I386OP(std), I386OP(std), },
- { 0xFE, OP_I386, I386OP(groupFE_8), I386OP(groupFE_8), },
- { 0xFF, OP_I386, I386OP(groupFF_16), I386OP(groupFF_32), },
+ { 0x00, OP_I386, I386OP(add_rm8_r8), I386OP(add_rm8_r8), },
+ { 0x01, OP_I386, I386OP(add_rm16_r16), I386OP(add_rm32_r32), },
+ { 0x02, OP_I386, I386OP(add_r8_rm8), I386OP(add_r8_rm8), },
+ { 0x03, OP_I386, I386OP(add_r16_rm16), I386OP(add_r32_rm32), },
+ { 0x04, OP_I386, I386OP(add_al_i8), I386OP(add_al_i8), },
+ { 0x05, OP_I386, I386OP(add_ax_i16), I386OP(add_eax_i32), },
+ { 0x06, OP_I386, I386OP(push_es16), I386OP(push_es32), },
+ { 0x07, OP_I386, I386OP(pop_es16), I386OP(pop_es32), },
+ { 0x08, OP_I386, I386OP(or_rm8_r8), I386OP(or_rm8_r8), },
+ { 0x09, OP_I386, I386OP(or_rm16_r16), I386OP(or_rm32_r32), },
+ { 0x0A, OP_I386, I386OP(or_r8_rm8), I386OP(or_r8_rm8), },
+ { 0x0B, OP_I386, I386OP(or_r16_rm16), I386OP(or_r32_rm32), },
+ { 0x0C, OP_I386, I386OP(or_al_i8), I386OP(or_al_i8), },
+ { 0x0D, OP_I386, I386OP(or_ax_i16), I386OP(or_eax_i32), },
+ { 0x0E, OP_I386, I386OP(push_cs16), I386OP(push_cs32), },
+ { 0x0F, OP_I386, I386OP(decode_two_byte), I386OP(decode_two_byte), },
+ { 0x10, OP_I386, I386OP(adc_rm8_r8), I386OP(adc_rm8_r8), },
+ { 0x11, OP_I386, I386OP(adc_rm16_r16), I386OP(adc_rm32_r32), },
+ { 0x12, OP_I386, I386OP(adc_r8_rm8), I386OP(adc_r8_rm8), },
+ { 0x13, OP_I386, I386OP(adc_r16_rm16), I386OP(adc_r32_rm32), },
+ { 0x14, OP_I386, I386OP(adc_al_i8), I386OP(adc_al_i8), },
+ { 0x15, OP_I386, I386OP(adc_ax_i16), I386OP(adc_eax_i32), },
+ { 0x16, OP_I386, I386OP(push_ss16), I386OP(push_ss32), },
+ { 0x17, OP_I386, I386OP(pop_ss16), I386OP(pop_ss32), },
+ { 0x18, OP_I386, I386OP(sbb_rm8_r8), I386OP(sbb_rm8_r8), },
+ { 0x19, OP_I386, I386OP(sbb_rm16_r16), I386OP(sbb_rm32_r32), },
+ { 0x1A, OP_I386, I386OP(sbb_r8_rm8), I386OP(sbb_r8_rm8), },
+ { 0x1B, OP_I386, I386OP(sbb_r16_rm16), I386OP(sbb_r32_rm32), },
+ { 0x1C, OP_I386, I386OP(sbb_al_i8), I386OP(sbb_al_i8), },
+ { 0x1D, OP_I386, I386OP(sbb_ax_i16), I386OP(sbb_eax_i32), },
+ { 0x1E, OP_I386, I386OP(push_ds16), I386OP(push_ds32), },
+ { 0x1F, OP_I386, I386OP(pop_ds16), I386OP(pop_ds32), },
+ { 0x20, OP_I386, I386OP(and_rm8_r8), I386OP(and_rm8_r8), },
+ { 0x21, OP_I386, I386OP(and_rm16_r16), I386OP(and_rm32_r32), },
+ { 0x22, OP_I386, I386OP(and_r8_rm8), I386OP(and_r8_rm8), },
+ { 0x23, OP_I386, I386OP(and_r16_rm16), I386OP(and_r32_rm32), },
+ { 0x24, OP_I386, I386OP(and_al_i8), I386OP(and_al_i8), },
+ { 0x25, OP_I386, I386OP(and_ax_i16), I386OP(and_eax_i32), },
+ { 0x26, OP_I386, I386OP(segment_ES), I386OP(segment_ES), },
+ { 0x27, OP_I386, I386OP(daa), I386OP(daa), },
+ { 0x28, OP_I386, I386OP(sub_rm8_r8), I386OP(sub_rm8_r8), },
+ { 0x29, OP_I386, I386OP(sub_rm16_r16), I386OP(sub_rm32_r32), },
+ { 0x2A, OP_I386, I386OP(sub_r8_rm8), I386OP(sub_r8_rm8), },
+ { 0x2B, OP_I386, I386OP(sub_r16_rm16), I386OP(sub_r32_rm32), },
+ { 0x2C, OP_I386, I386OP(sub_al_i8), I386OP(sub_al_i8), },
+ { 0x2D, OP_I386, I386OP(sub_ax_i16), I386OP(sub_eax_i32), },
+ { 0x2E, OP_I386, I386OP(segment_CS), I386OP(segment_CS), },
+ { 0x2F, OP_I386, I386OP(das), I386OP(das), },
+ { 0x30, OP_I386, I386OP(xor_rm8_r8), I386OP(xor_rm8_r8), },
+ { 0x31, OP_I386, I386OP(xor_rm16_r16), I386OP(xor_rm32_r32), },
+ { 0x32, OP_I386, I386OP(xor_r8_rm8), I386OP(xor_r8_rm8), },
+ { 0x33, OP_I386, I386OP(xor_r16_rm16), I386OP(xor_r32_rm32), },
+ { 0x34, OP_I386, I386OP(xor_al_i8), I386OP(xor_al_i8), },
+ { 0x35, OP_I386, I386OP(xor_ax_i16), I386OP(xor_eax_i32), },
+ { 0x36, OP_I386, I386OP(segment_SS), I386OP(segment_SS), },
+ { 0x37, OP_I386, I386OP(aaa), I386OP(aaa), },
+ { 0x38, OP_I386, I386OP(cmp_rm8_r8), I386OP(cmp_rm8_r8), },
+ { 0x39, OP_I386, I386OP(cmp_rm16_r16), I386OP(cmp_rm32_r32), },
+ { 0x3A, OP_I386, I386OP(cmp_r8_rm8), I386OP(cmp_r8_rm8), },
+ { 0x3B, OP_I386, I386OP(cmp_r16_rm16), I386OP(cmp_r32_rm32), },
+ { 0x3C, OP_I386, I386OP(cmp_al_i8), I386OP(cmp_al_i8), },
+ { 0x3D, OP_I386, I386OP(cmp_ax_i16), I386OP(cmp_eax_i32), },
+ { 0x3E, OP_I386, I386OP(segment_DS), I386OP(segment_DS), },
+ { 0x3F, OP_I386, I386OP(aas), I386OP(aas), },
+ { 0x40, OP_I386, I386OP(inc_ax), I386OP(inc_eax), },
+ { 0x41, OP_I386, I386OP(inc_cx), I386OP(inc_ecx), },
+ { 0x42, OP_I386, I386OP(inc_dx), I386OP(inc_edx), },
+ { 0x43, OP_I386, I386OP(inc_bx), I386OP(inc_ebx), },
+ { 0x44, OP_I386, I386OP(inc_sp), I386OP(inc_esp), },
+ { 0x45, OP_I386, I386OP(inc_bp), I386OP(inc_ebp), },
+ { 0x46, OP_I386, I386OP(inc_si), I386OP(inc_esi), },
+ { 0x47, OP_I386, I386OP(inc_di), I386OP(inc_edi), },
+ { 0x48, OP_I386, I386OP(dec_ax), I386OP(dec_eax), },
+ { 0x49, OP_I386, I386OP(dec_cx), I386OP(dec_ecx), },
+ { 0x4A, OP_I386, I386OP(dec_dx), I386OP(dec_edx), },
+ { 0x4B, OP_I386, I386OP(dec_bx), I386OP(dec_ebx), },
+ { 0x4C, OP_I386, I386OP(dec_sp), I386OP(dec_esp), },
+ { 0x4D, OP_I386, I386OP(dec_bp), I386OP(dec_ebp), },
+ { 0x4E, OP_I386, I386OP(dec_si), I386OP(dec_esi), },
+ { 0x4F, OP_I386, I386OP(dec_di), I386OP(dec_edi), },
+ { 0x50, OP_I386, I386OP(push_ax), I386OP(push_eax), },
+ { 0x51, OP_I386, I386OP(push_cx), I386OP(push_ecx), },
+ { 0x52, OP_I386, I386OP(push_dx), I386OP(push_edx), },
+ { 0x53, OP_I386, I386OP(push_bx), I386OP(push_ebx), },
+ { 0x54, OP_I386, I386OP(push_sp), I386OP(push_esp), },
+ { 0x55, OP_I386, I386OP(push_bp), I386OP(push_ebp), },
+ { 0x56, OP_I386, I386OP(push_si), I386OP(push_esi), },
+ { 0x57, OP_I386, I386OP(push_di), I386OP(push_edi), },
+ { 0x58, OP_I386, I386OP(pop_ax), I386OP(pop_eax), },
+ { 0x59, OP_I386, I386OP(pop_cx), I386OP(pop_ecx), },
+ { 0x5A, OP_I386, I386OP(pop_dx), I386OP(pop_edx), },
+ { 0x5B, OP_I386, I386OP(pop_bx), I386OP(pop_ebx), },
+ { 0x5C, OP_I386, I386OP(pop_sp), I386OP(pop_esp), },
+ { 0x5D, OP_I386, I386OP(pop_bp), I386OP(pop_ebp), },
+ { 0x5E, OP_I386, I386OP(pop_si), I386OP(pop_esi), },
+ { 0x5F, OP_I386, I386OP(pop_di), I386OP(pop_edi), },
+ { 0x60, OP_I386, I386OP(pusha), I386OP(pushad), },
+ { 0x61, OP_I386, I386OP(popa), I386OP(popad), },
+ { 0x62, OP_I386, I386OP(bound_r16_m16_m16), I386OP(bound_r32_m32_m32), },
+ { 0x63, OP_I386, I386OP(arpl), I386OP(arpl), },
+ { 0x64, OP_I386, I386OP(segment_FS), I386OP(segment_FS), },
+ { 0x65, OP_I386, I386OP(segment_GS), I386OP(segment_GS), },
+ { 0x66, OP_I386, I386OP(operand_size), I386OP(operand_size), },
+ { 0x67, OP_I386, I386OP(address_size), I386OP(address_size), },
+ { 0x68, OP_I386, I386OP(push_i16), I386OP(push_i32), },
+ { 0x69, OP_I386, I386OP(imul_r16_rm16_i16), I386OP(imul_r32_rm32_i32), },
+ { 0x6A, OP_I386, I386OP(push_i8), I386OP(push_i8), },
+ { 0x6B, OP_I386, I386OP(imul_r16_rm16_i8), I386OP(imul_r32_rm32_i8), },
+ { 0x6C, OP_I386, I386OP(insb), I386OP(insb), },
+ { 0x6D, OP_I386, I386OP(insw), I386OP(insd), },
+ { 0x6E, OP_I386, I386OP(outsb), I386OP(outsb), },
+ { 0x6F, OP_I386, I386OP(outsw), I386OP(outsd), },
+ { 0x70, OP_I386, I386OP(jo_rel8), I386OP(jo_rel8), },
+ { 0x71, OP_I386, I386OP(jno_rel8), I386OP(jno_rel8), },
+ { 0x72, OP_I386, I386OP(jc_rel8), I386OP(jc_rel8), },
+ { 0x73, OP_I386, I386OP(jnc_rel8), I386OP(jnc_rel8), },
+ { 0x74, OP_I386, I386OP(jz_rel8), I386OP(jz_rel8), },
+ { 0x75, OP_I386, I386OP(jnz_rel8), I386OP(jnz_rel8), },
+ { 0x76, OP_I386, I386OP(jbe_rel8), I386OP(jbe_rel8), },
+ { 0x77, OP_I386, I386OP(ja_rel8), I386OP(ja_rel8), },
+ { 0x78, OP_I386, I386OP(js_rel8), I386OP(js_rel8), },
+ { 0x79, OP_I386, I386OP(jns_rel8), I386OP(jns_rel8), },
+ { 0x7A, OP_I386, I386OP(jp_rel8), I386OP(jp_rel8), },
+ { 0x7B, OP_I386, I386OP(jnp_rel8), I386OP(jnp_rel8), },
+ { 0x7C, OP_I386, I386OP(jl_rel8), I386OP(jl_rel8), },
+ { 0x7D, OP_I386, I386OP(jge_rel8), I386OP(jge_rel8), },
+ { 0x7E, OP_I386, I386OP(jle_rel8), I386OP(jle_rel8), },
+ { 0x7F, OP_I386, I386OP(jg_rel8), I386OP(jg_rel8), },
+ { 0x80, OP_I386, I386OP(group80_8), I386OP(group80_8), },
+ { 0x81, OP_I386, I386OP(group81_16), I386OP(group81_32), },
+ { 0x82, OP_I386, I386OP(group80_8), I386OP(group80_8), },
+ { 0x83, OP_I386, I386OP(group83_16), I386OP(group83_32), },
+ { 0x84, OP_I386, I386OP(test_rm8_r8), I386OP(test_rm8_r8), },
+ { 0x85, OP_I386, I386OP(test_rm16_r16), I386OP(test_rm32_r32), },
+ { 0x86, OP_I386, I386OP(xchg_r8_rm8), I386OP(xchg_r8_rm8), },
+ { 0x87, OP_I386, I386OP(xchg_r16_rm16), I386OP(xchg_r32_rm32), },
+ { 0x88, OP_I386, I386OP(mov_rm8_r8), I386OP(mov_rm8_r8), },
+ { 0x89, OP_I386, I386OP(mov_rm16_r16), I386OP(mov_rm32_r32), },
+ { 0x8A, OP_I386, I386OP(mov_r8_rm8), I386OP(mov_r8_rm8), },
+ { 0x8B, OP_I386, I386OP(mov_r16_rm16), I386OP(mov_r32_rm32), },
+ { 0x8C, OP_I386, I386OP(mov_rm16_sreg), I386OP(mov_rm16_sreg), },
+ { 0x8D, OP_I386, I386OP(lea16), I386OP(lea32), },
+ { 0x8E, OP_I386, I386OP(mov_sreg_rm16), I386OP(mov_sreg_rm16), },
+ { 0x8F, OP_I386, I386OP(pop_rm16), I386OP(pop_rm32), },
+ { 0x90, OP_I386, I386OP(nop), I386OP(nop), },
+ { 0x91, OP_I386, I386OP(xchg_ax_cx), I386OP(xchg_eax_ecx), },
+ { 0x92, OP_I386, I386OP(xchg_ax_dx), I386OP(xchg_eax_edx), },
+ { 0x93, OP_I386, I386OP(xchg_ax_bx), I386OP(xchg_eax_ebx), },
+ { 0x94, OP_I386, I386OP(xchg_ax_sp), I386OP(xchg_eax_esp), },
+ { 0x95, OP_I386, I386OP(xchg_ax_bp), I386OP(xchg_eax_ebp), },
+ { 0x96, OP_I386, I386OP(xchg_ax_si), I386OP(xchg_eax_esi), },
+ { 0x97, OP_I386, I386OP(xchg_ax_di), I386OP(xchg_eax_edi), },
+ { 0x98, OP_I386, I386OP(cbw), I386OP(cwde), },
+ { 0x99, OP_I386, I386OP(cwd), I386OP(cdq), },
+ { 0x9A, OP_I386, I386OP(call_abs16), I386OP(call_abs32), },
+ { 0x9B, OP_I386, I386OP(wait), I386OP(wait), },
+ { 0x9C, OP_I386, I386OP(pushf), I386OP(pushfd), },
+ { 0x9D, OP_I386, I386OP(popf), I386OP(popfd), },
+ { 0x9E, OP_I386, I386OP(sahf), I386OP(sahf), },
+ { 0x9F, OP_I386, I386OP(lahf), I386OP(lahf), },
+ { 0xA0, OP_I386, I386OP(mov_al_m8), I386OP(mov_al_m8), },
+ { 0xA1, OP_I386, I386OP(mov_ax_m16), I386OP(mov_eax_m32), },
+ { 0xA2, OP_I386, I386OP(mov_m8_al), I386OP(mov_m8_al), },
+ { 0xA3, OP_I386, I386OP(mov_m16_ax), I386OP(mov_m32_eax), },
+ { 0xA4, OP_I386, I386OP(movsb), I386OP(movsb), },
+ { 0xA5, OP_I386, I386OP(movsw), I386OP(movsd), },
+ { 0xA6, OP_I386, I386OP(cmpsb), I386OP(cmpsb), },
+ { 0xA7, OP_I386, I386OP(cmpsw), I386OP(cmpsd), },
+ { 0xA8, OP_I386, I386OP(test_al_i8), I386OP(test_al_i8), },
+ { 0xA9, OP_I386, I386OP(test_ax_i16), I386OP(test_eax_i32), },
+ { 0xAA, OP_I386, I386OP(stosb), I386OP(stosb), },
+ { 0xAB, OP_I386, I386OP(stosw), I386OP(stosd), },
+ { 0xAC, OP_I386, I386OP(lodsb), I386OP(lodsb), },
+ { 0xAD, OP_I386, I386OP(lodsw), I386OP(lodsd), },
+ { 0xAE, OP_I386, I386OP(scasb), I386OP(scasb), },
+ { 0xAF, OP_I386, I386OP(scasw), I386OP(scasd), },
+ { 0xB0, OP_I386, I386OP(mov_al_i8), I386OP(mov_al_i8), },
+ { 0xB1, OP_I386, I386OP(mov_cl_i8), I386OP(mov_cl_i8), },
+ { 0xB2, OP_I386, I386OP(mov_dl_i8), I386OP(mov_dl_i8), },
+ { 0xB3, OP_I386, I386OP(mov_bl_i8), I386OP(mov_bl_i8), },
+ { 0xB4, OP_I386, I386OP(mov_ah_i8), I386OP(mov_ah_i8), },
+ { 0xB5, OP_I386, I386OP(mov_ch_i8), I386OP(mov_ch_i8), },
+ { 0xB6, OP_I386, I386OP(mov_dh_i8), I386OP(mov_dh_i8), },
+ { 0xB7, OP_I386, I386OP(mov_bh_i8), I386OP(mov_bh_i8), },
+ { 0xB8, OP_I386, I386OP(mov_ax_i16), I386OP(mov_eax_i32), },
+ { 0xB9, OP_I386, I386OP(mov_cx_i16), I386OP(mov_ecx_i32), },
+ { 0xBA, OP_I386, I386OP(mov_dx_i16), I386OP(mov_edx_i32), },
+ { 0xBB, OP_I386, I386OP(mov_bx_i16), I386OP(mov_ebx_i32), },
+ { 0xBC, OP_I386, I386OP(mov_sp_i16), I386OP(mov_esp_i32), },
+ { 0xBD, OP_I386, I386OP(mov_bp_i16), I386OP(mov_ebp_i32), },
+ { 0xBE, OP_I386, I386OP(mov_si_i16), I386OP(mov_esi_i32), },
+ { 0xBF, OP_I386, I386OP(mov_di_i16), I386OP(mov_edi_i32), },
+ { 0xC0, OP_I386, I386OP(groupC0_8), I386OP(groupC0_8), },
+ { 0xC1, OP_I386, I386OP(groupC1_16), I386OP(groupC1_32), },
+ { 0xC2, OP_I386, I386OP(ret_near16_i16), I386OP(ret_near32_i16), },
+ { 0xC3, OP_I386, I386OP(ret_near16), I386OP(ret_near32), },
+ { 0xC4, OP_I386, I386OP(les16), I386OP(les32), },
+ { 0xC5, OP_I386, I386OP(lds16), I386OP(lds32), },
+ { 0xC6, OP_I386, I386OP(mov_rm8_i8), I386OP(mov_rm8_i8), },
+ { 0xC7, OP_I386, I386OP(mov_rm16_i16), I386OP(mov_rm32_i32), },
+ { 0xC8, OP_I386, I386OP(enter16), I386OP(enter32), },
+ { 0xC9, OP_I386, I386OP(leave16), I386OP(leave32), },
+ { 0xCA, OP_I386, I386OP(retf_i16), I386OP(retf_i32), },
+ { 0xCB, OP_I386, I386OP(retf16), I386OP(retf32), },
+ { 0xCC, OP_I386, I386OP(int3), I386OP(int3), },
+ { 0xCD, OP_I386, I386OP(int), I386OP(int), },
+ { 0xCE, OP_I386, I386OP(into), I386OP(into), },
+ { 0xCF, OP_I386, I386OP(iret16), I386OP(iret32), },
+ { 0xD0, OP_I386, I386OP(groupD0_8), I386OP(groupD0_8), },
+ { 0xD1, OP_I386, I386OP(groupD1_16), I386OP(groupD1_32), },
+ { 0xD2, OP_I386, I386OP(groupD2_8), I386OP(groupD2_8), },
+ { 0xD3, OP_I386, I386OP(groupD3_16), I386OP(groupD3_32), },
+ { 0xD4, OP_I386, I386OP(aam), I386OP(aam), },
+ { 0xD5, OP_I386, I386OP(aad), I386OP(aad), },
+ { 0xD6, OP_I386, I386OP(setalc), I386OP(setalc), },
+ { 0xD7, OP_I386, I386OP(xlat), I386OP(xlat), },
+ { 0xD8, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xD9, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xDA, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xDB, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xDC, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xDD, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xDE, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xDF, OP_I386, I386OP(escape), I386OP(escape), },
+ { 0xD8, OP_FPU, I386OP(x87_group_d8), I386OP(x87_group_d8), },
+ { 0xD9, OP_FPU, I386OP(x87_group_d9), I386OP(x87_group_d9), },
+ { 0xDA, OP_FPU, I386OP(x87_group_da), I386OP(x87_group_da), },
+ { 0xDB, OP_FPU, I386OP(x87_group_db), I386OP(x87_group_db), },
+ { 0xDC, OP_FPU, I386OP(x87_group_dc), I386OP(x87_group_dc), },
+ { 0xDD, OP_FPU, I386OP(x87_group_dd), I386OP(x87_group_dd), },
+ { 0xDE, OP_FPU, I386OP(x87_group_de), I386OP(x87_group_de), },
+ { 0xDF, OP_FPU, I386OP(x87_group_df), I386OP(x87_group_df), },
+ { 0xE0, OP_I386, I386OP(loopne16), I386OP(loopne32), },
+ { 0xE1, OP_I386, I386OP(loopz16), I386OP(loopz32), },
+ { 0xE2, OP_I386, I386OP(loop16), I386OP(loop32), },
+ { 0xE3, OP_I386, I386OP(jcxz16), I386OP(jcxz32), },
+ { 0xE4, OP_I386, I386OP(in_al_i8), I386OP(in_al_i8), },
+ { 0xE5, OP_I386, I386OP(in_ax_i8), I386OP(in_eax_i8), },
+ { 0xE6, OP_I386, I386OP(out_al_i8), I386OP(out_al_i8), },
+ { 0xE7, OP_I386, I386OP(out_ax_i8), I386OP(out_eax_i8), },
+ { 0xE8, OP_I386, I386OP(call_rel16), I386OP(call_rel32), },
+ { 0xE9, OP_I386, I386OP(jmp_rel16), I386OP(jmp_rel32), },
+ { 0xEA, OP_I386, I386OP(jmp_abs16), I386OP(jmp_abs32), },
+ { 0xEB, OP_I386, I386OP(jmp_rel8), I386OP(jmp_rel8), },
+ { 0xEC, OP_I386, I386OP(in_al_dx), I386OP(in_al_dx), },
+ { 0xED, OP_I386, I386OP(in_ax_dx), I386OP(in_eax_dx), },
+ { 0xEE, OP_I386, I386OP(out_al_dx), I386OP(out_al_dx), },
+ { 0xEF, OP_I386, I386OP(out_ax_dx), I386OP(out_eax_dx), },
+ { 0xF0, OP_I386, I386OP(lock), I386OP(lock), },
+ { 0xF1, OP_I386, I386OP(invalid), I386OP(invalid), },
+ { 0xF2, OP_I386, I386OP(repne), I386OP(repne), },
+ { 0xF3, OP_I386, I386OP(rep), I386OP(rep), },
+ { 0xF4, OP_I386, I386OP(hlt), I386OP(hlt), },
+ { 0xF5, OP_I386, I386OP(cmc), I386OP(cmc), },
+ { 0xF6, OP_I386, I386OP(groupF6_8), I386OP(groupF6_8), },
+ { 0xF7, OP_I386, I386OP(groupF7_16), I386OP(groupF7_32), },
+ { 0xF8, OP_I386, I386OP(clc), I386OP(clc), },
+ { 0xF9, OP_I386, I386OP(stc), I386OP(stc), },
+ { 0xFA, OP_I386, I386OP(cli), I386OP(cli), },
+ { 0xFB, OP_I386, I386OP(sti), I386OP(sti), },
+ { 0xFC, OP_I386, I386OP(cld), I386OP(cld), },
+ { 0xFD, OP_I386, I386OP(std), I386OP(std), },
+ { 0xFE, OP_I386, I386OP(groupFE_8), I386OP(groupFE_8), },
+ { 0xFF, OP_I386, I386OP(groupFF_16), I386OP(groupFF_32), },
/* 0F ?? */
- { 0x00, OP_2BYTE|OP_I386, I386OP(group0F00_16), I386OP(group0F00_32), },
- { 0x01, OP_2BYTE|OP_I386, I386OP(group0F01_16), I386OP(group0F01_32), },
- { 0x01, OP_2BYTE|OP_I486, I486OP(group0F01_16), I486OP(group0F01_32), },
- { 0x02, OP_2BYTE|OP_I386, I386OP(lar_r16_rm16), I386OP(lar_r32_rm32), },
- { 0x03, OP_2BYTE|OP_I386, I386OP(lsl_r16_rm16), I386OP(lsl_r32_rm32), },
- { 0x06, OP_2BYTE|OP_I386, I386OP(clts), I386OP(clts), },
- { 0x07, OP_2BYTE|OP_I386, I386OP(loadall), I386OP(loadall), },
- { 0x08, OP_2BYTE|OP_I486, I486OP(invd), I486OP(invd), },
- { 0x09, OP_2BYTE|OP_I486, I486OP(wbinvd), I486OP(wbinvd), },
- { 0x0B, OP_2BYTE|OP_PENTIUM, PENTIUMOP(ud2), PENTIUMOP(ud2), },
- { 0x20, OP_2BYTE|OP_I386, I386OP(mov_r32_cr), I386OP(mov_r32_cr), },
- { 0x21, OP_2BYTE|OP_I386, I386OP(mov_r32_dr), I386OP(mov_r32_dr), },
- { 0x22, OP_2BYTE|OP_I386, I386OP(mov_cr_r32), I386OP(mov_cr_r32), },
- { 0x22, OP_2BYTE|OP_I486, I486OP(mov_cr_r32), I486OP(mov_cr_r32), },
- { 0x23, OP_2BYTE|OP_I386, I386OP(mov_dr_r32), I386OP(mov_dr_r32), },
- { 0x24, OP_2BYTE|OP_I386, I386OP(mov_r32_tr), I386OP(mov_r32_tr), },
- { 0x26, OP_2BYTE|OP_I386, I386OP(mov_tr_r32), I386OP(mov_tr_r32), },
- { 0x28, OP_2BYTE|OP_SSE, SSEOP(movaps_r128_rm128), SSEOP(movaps_r128_rm128), },
- { 0x29, OP_2BYTE|OP_SSE, SSEOP(movaps_rm128_r128), SSEOP(movaps_rm128_r128), },
- { 0x30, OP_2BYTE|OP_PENTIUM, PENTIUMOP(wrmsr), PENTIUMOP(wrmsr), },
- { 0x31, OP_2BYTE|OP_PENTIUM, PENTIUMOP(rdtsc), PENTIUMOP(rdtsc), },
- { 0x32, OP_2BYTE|OP_PENTIUM, PENTIUMOP(rdmsr), PENTIUMOP(rdmsr), },
- { 0x58, OP_2BYTE|OP_SSE, SSEOP(addps), SSEOP(addps), },
- { 0x59, OP_2BYTE|OP_SSE, SSEOP(mulps), SSEOP(mulps), },
- { 0x74, OP_2BYTE|OP_CYRIX, I386OP(cyrix_unknown), I386OP(cyrix_unknown), },
- { 0x77, OP_2BYTE|OP_MMX, MMXOP(emms), MMXOP(emms), },
- { 0x80, OP_2BYTE|OP_I386, I386OP(jo_rel16), I386OP(jo_rel32), },
- { 0x81, OP_2BYTE|OP_I386, I386OP(jno_rel16), I386OP(jno_rel32), },
- { 0x82, OP_2BYTE|OP_I386, I386OP(jc_rel16), I386OP(jc_rel32), },
- { 0x83, OP_2BYTE|OP_I386, I386OP(jnc_rel16), I386OP(jnc_rel32), },
- { 0x84, OP_2BYTE|OP_I386, I386OP(jz_rel16), I386OP(jz_rel32), },
- { 0x85, OP_2BYTE|OP_I386, I386OP(jnz_rel16), I386OP(jnz_rel32), },
- { 0x86, OP_2BYTE|OP_I386, I386OP(jbe_rel16), I386OP(jbe_rel32), },
- { 0x87, OP_2BYTE|OP_I386, I386OP(ja_rel16), I386OP(ja_rel32), },
- { 0x88, OP_2BYTE|OP_I386, I386OP(js_rel16), I386OP(js_rel32), },
- { 0x89, OP_2BYTE|OP_I386, I386OP(jns_rel16), I386OP(jns_rel32), },
- { 0x8A, OP_2BYTE|OP_I386, I386OP(jp_rel16), I386OP(jp_rel32), },
- { 0x8B, OP_2BYTE|OP_I386, I386OP(jnp_rel16), I386OP(jnp_rel32), },
- { 0x8C, OP_2BYTE|OP_I386, I386OP(jl_rel16), I386OP(jl_rel32), },
- { 0x8D, OP_2BYTE|OP_I386, I386OP(jge_rel16), I386OP(jge_rel32), },
- { 0x8E, OP_2BYTE|OP_I386, I386OP(jle_rel16), I386OP(jle_rel32), },
- { 0x8F, OP_2BYTE|OP_I386, I386OP(jg_rel16), I386OP(jg_rel32), },
- { 0x90, OP_2BYTE|OP_I386, I386OP(seto_rm8), I386OP(seto_rm8), },
- { 0x91, OP_2BYTE|OP_I386, I386OP(setno_rm8), I386OP(setno_rm8), },
- { 0x92, OP_2BYTE|OP_I386, I386OP(setc_rm8), I386OP(setc_rm8), },
- { 0x93, OP_2BYTE|OP_I386, I386OP(setnc_rm8), I386OP(setnc_rm8), },
- { 0x94, OP_2BYTE|OP_I386, I386OP(setz_rm8), I386OP(setz_rm8), },
- { 0x95, OP_2BYTE|OP_I386, I386OP(setnz_rm8), I386OP(setnz_rm8), },
- { 0x96, OP_2BYTE|OP_I386, I386OP(setbe_rm8), I386OP(setbe_rm8), },
- { 0x97, OP_2BYTE|OP_I386, I386OP(seta_rm8), I386OP(seta_rm8), },
- { 0x98, OP_2BYTE|OP_I386, I386OP(sets_rm8), I386OP(sets_rm8), },
- { 0x99, OP_2BYTE|OP_I386, I386OP(setns_rm8), I386OP(setns_rm8), },
- { 0x9A, OP_2BYTE|OP_I386, I386OP(setp_rm8), I386OP(setp_rm8), },
- { 0x9B, OP_2BYTE|OP_I386, I386OP(setnp_rm8), I386OP(setnp_rm8), },
- { 0x9C, OP_2BYTE|OP_I386, I386OP(setl_rm8), I386OP(setl_rm8), },
- { 0x9D, OP_2BYTE|OP_I386, I386OP(setge_rm8), I386OP(setge_rm8), },
- { 0x9E, OP_2BYTE|OP_I386, I386OP(setle_rm8), I386OP(setle_rm8), },
- { 0x9F, OP_2BYTE|OP_I386, I386OP(setg_rm8), I386OP(setg_rm8), },
- { 0xA0, OP_2BYTE|OP_I386, I386OP(push_fs16), I386OP(push_fs32), },
- { 0xA1, OP_2BYTE|OP_I386, I386OP(pop_fs16), I386OP(pop_fs32), },
- { 0xA2, OP_2BYTE|OP_I486, I486OP(cpuid), I486OP(cpuid), },
- { 0xA3, OP_2BYTE|OP_I386, I386OP(bt_rm16_r16), I386OP(bt_rm32_r32), },
- { 0xA4, OP_2BYTE|OP_I386, I386OP(shld16_i8), I386OP(shld32_i8), },
- { 0xA5, OP_2BYTE|OP_I386, I386OP(shld16_cl), I386OP(shld32_cl), },
- { 0xA8, OP_2BYTE|OP_I386, I386OP(push_gs16), I386OP(push_gs32), },
- { 0xA9, OP_2BYTE|OP_I386, I386OP(pop_gs16), I386OP(pop_gs32), },
- { 0xAA, OP_2BYTE|OP_I386, I386OP(unimplemented), I386OP(unimplemented), },
- { 0xAB, OP_2BYTE|OP_I386, I386OP(bts_rm16_r16), I386OP(bts_rm32_r32), },
- { 0xAC, OP_2BYTE|OP_I386, I386OP(shrd16_i8), I386OP(shrd32_i8), },
- { 0xAD, OP_2BYTE|OP_I386, I386OP(shrd16_cl), I386OP(shrd32_cl), },
- { 0xAE, OP_2BYTE|OP_SSE, SSEOP(sse_group0fae), SSEOP(sse_group0fae), },
- { 0xAF, OP_2BYTE|OP_I386, I386OP(imul_r16_rm16), I386OP(imul_r32_rm32), },
- { 0xB0, OP_2BYTE|OP_I486, I486OP(cmpxchg_rm8_r8), I486OP(cmpxchg_rm8_r8), },
- { 0xB1, OP_2BYTE|OP_I486, I486OP(cmpxchg_rm16_r16), I486OP(cmpxchg_rm32_r32), },
- { 0xB2, OP_2BYTE|OP_I386, I386OP(lss16), I386OP(lss32), },
- { 0xB3, OP_2BYTE|OP_I386, I386OP(btr_rm16_r16), I386OP(btr_rm32_r32), },
- { 0xB4, OP_2BYTE|OP_I386, I386OP(lfs16), I386OP(lfs32), },
- { 0xB5, OP_2BYTE|OP_I386, I386OP(lgs16), I386OP(lgs32), },
- { 0xB6, OP_2BYTE|OP_I386, I386OP(movzx_r16_rm8), I386OP(movzx_r32_rm8), },
- { 0xB7, OP_2BYTE|OP_I386, I386OP(invalid), I386OP(movzx_r32_rm16), },
- { 0xBA, OP_2BYTE|OP_I386, I386OP(group0FBA_16), I386OP(group0FBA_32), },
- { 0xBB, OP_2BYTE|OP_I386, I386OP(btc_rm16_r16), I386OP(btc_rm32_r32), },
- { 0xBC, OP_2BYTE|OP_I386, I386OP(bsf_r16_rm16), I386OP(bsf_r32_rm32), },
- { 0xBD, OP_2BYTE|OP_I386, I386OP(bsr_r16_rm16), I386OP(bsr_r32_rm32), },
- { 0xBE, OP_2BYTE|OP_I386, I386OP(movsx_r16_rm8), I386OP(movsx_r32_rm8), },
- { 0xBF, OP_2BYTE|OP_I386, I386OP(invalid), I386OP(movsx_r32_rm16), },
- { 0xC0, OP_2BYTE|OP_I486, I486OP(xadd_rm8_r8), I486OP(xadd_rm8_r8), },
- { 0xC1, OP_2BYTE|OP_I486, I486OP(xadd_rm16_r16), I486OP(xadd_rm32_r32), },
- { 0xc6, OP_2BYTE|OP_SSE, SSEOP(shufps), SSEOP(shufps), },
- { 0xC7, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmpxchg8b_m64), PENTIUMOP(cmpxchg8b_m64), },
- { 0xC8, OP_2BYTE|OP_I486, I486OP(bswap_eax), I486OP(bswap_eax), },
- { 0xC9, OP_2BYTE|OP_I486, I486OP(bswap_ecx), I486OP(bswap_ecx), },
- { 0xCA, OP_2BYTE|OP_I486, I486OP(bswap_edx), I486OP(bswap_edx), },
- { 0xCB, OP_2BYTE|OP_I486, I486OP(bswap_ebx), I486OP(bswap_ebx), },
- { 0xCC, OP_2BYTE|OP_I486, I486OP(bswap_esp), I486OP(bswap_esp), },
- { 0xCD, OP_2BYTE|OP_I486, I486OP(bswap_ebp), I486OP(bswap_ebp), },
- { 0xCE, OP_2BYTE|OP_I486, I486OP(bswap_esi), I486OP(bswap_esi), },
- { 0xCF, OP_2BYTE|OP_I486, I486OP(bswap_edi), I486OP(bswap_edi), },
+ { 0x00, OP_2BYTE|OP_I386, I386OP(group0F00_16), I386OP(group0F00_32), },
+ { 0x01, OP_2BYTE|OP_I386, I386OP(group0F01_16), I386OP(group0F01_32), },
+ { 0x01, OP_2BYTE|OP_I486, I486OP(group0F01_16), I486OP(group0F01_32), },
+ { 0x02, OP_2BYTE|OP_I386, I386OP(lar_r16_rm16), I386OP(lar_r32_rm32), },
+ { 0x03, OP_2BYTE|OP_I386, I386OP(lsl_r16_rm16), I386OP(lsl_r32_rm32), },
+ { 0x06, OP_2BYTE|OP_I386, I386OP(clts), I386OP(clts), },
+ { 0x07, OP_2BYTE|OP_I386, I386OP(loadall), I386OP(loadall), },
+ { 0x08, OP_2BYTE|OP_I486, I486OP(invd), I486OP(invd), },
+ { 0x09, OP_2BYTE|OP_I486, I486OP(wbinvd), I486OP(wbinvd), },
+ { 0x0B, OP_2BYTE|OP_PENTIUM, PENTIUMOP(ud2), PENTIUMOP(ud2), },
+ { 0x20, OP_2BYTE|OP_I386, I386OP(mov_r32_cr), I386OP(mov_r32_cr), },
+ { 0x21, OP_2BYTE|OP_I386, I386OP(mov_r32_dr), I386OP(mov_r32_dr), },
+ { 0x22, OP_2BYTE|OP_I386, I386OP(mov_cr_r32), I386OP(mov_cr_r32), },
+ { 0x22, OP_2BYTE|OP_I486, I486OP(mov_cr_r32), I486OP(mov_cr_r32), },
+ { 0x23, OP_2BYTE|OP_I386, I386OP(mov_dr_r32), I386OP(mov_dr_r32), },
+ { 0x24, OP_2BYTE|OP_I386, I386OP(mov_r32_tr), I386OP(mov_r32_tr), },
+ { 0x26, OP_2BYTE|OP_I386, I386OP(mov_tr_r32), I386OP(mov_tr_r32), },
+ { 0x28, OP_2BYTE|OP_SSE, SSEOP(movaps_r128_rm128), SSEOP(movaps_r128_rm128), },
+ { 0x29, OP_2BYTE|OP_SSE, SSEOP(movaps_rm128_r128), SSEOP(movaps_rm128_r128), },
+ { 0x30, OP_2BYTE|OP_PENTIUM, PENTIUMOP(wrmsr), PENTIUMOP(wrmsr), },
+ { 0x31, OP_2BYTE|OP_PENTIUM, PENTIUMOP(rdtsc), PENTIUMOP(rdtsc), },
+ { 0x32, OP_2BYTE|OP_PENTIUM, PENTIUMOP(rdmsr), PENTIUMOP(rdmsr), },
+ { 0x58, OP_2BYTE|OP_SSE, SSEOP(addps), SSEOP(addps), },
+ { 0x59, OP_2BYTE|OP_SSE, SSEOP(mulps), SSEOP(mulps), },
+ { 0x74, OP_2BYTE|OP_CYRIX, I386OP(cyrix_unknown), I386OP(cyrix_unknown), },
+ { 0x77, OP_2BYTE|OP_MMX, MMXOP(emms), MMXOP(emms), },
+ { 0x80, OP_2BYTE|OP_I386, I386OP(jo_rel16), I386OP(jo_rel32), },
+ { 0x81, OP_2BYTE|OP_I386, I386OP(jno_rel16), I386OP(jno_rel32), },
+ { 0x82, OP_2BYTE|OP_I386, I386OP(jc_rel16), I386OP(jc_rel32), },
+ { 0x83, OP_2BYTE|OP_I386, I386OP(jnc_rel16), I386OP(jnc_rel32), },
+ { 0x84, OP_2BYTE|OP_I386, I386OP(jz_rel16), I386OP(jz_rel32), },
+ { 0x85, OP_2BYTE|OP_I386, I386OP(jnz_rel16), I386OP(jnz_rel32), },
+ { 0x86, OP_2BYTE|OP_I386, I386OP(jbe_rel16), I386OP(jbe_rel32), },
+ { 0x87, OP_2BYTE|OP_I386, I386OP(ja_rel16), I386OP(ja_rel32), },
+ { 0x88, OP_2BYTE|OP_I386, I386OP(js_rel16), I386OP(js_rel32), },
+ { 0x89, OP_2BYTE|OP_I386, I386OP(jns_rel16), I386OP(jns_rel32), },
+ { 0x8A, OP_2BYTE|OP_I386, I386OP(jp_rel16), I386OP(jp_rel32), },
+ { 0x8B, OP_2BYTE|OP_I386, I386OP(jnp_rel16), I386OP(jnp_rel32), },
+ { 0x8C, OP_2BYTE|OP_I386, I386OP(jl_rel16), I386OP(jl_rel32), },
+ { 0x8D, OP_2BYTE|OP_I386, I386OP(jge_rel16), I386OP(jge_rel32), },
+ { 0x8E, OP_2BYTE|OP_I386, I386OP(jle_rel16), I386OP(jle_rel32), },
+ { 0x8F, OP_2BYTE|OP_I386, I386OP(jg_rel16), I386OP(jg_rel32), },
+ { 0x90, OP_2BYTE|OP_I386, I386OP(seto_rm8), I386OP(seto_rm8), },
+ { 0x91, OP_2BYTE|OP_I386, I386OP(setno_rm8), I386OP(setno_rm8), },
+ { 0x92, OP_2BYTE|OP_I386, I386OP(setc_rm8), I386OP(setc_rm8), },
+ { 0x93, OP_2BYTE|OP_I386, I386OP(setnc_rm8), I386OP(setnc_rm8), },
+ { 0x94, OP_2BYTE|OP_I386, I386OP(setz_rm8), I386OP(setz_rm8), },
+ { 0x95, OP_2BYTE|OP_I386, I386OP(setnz_rm8), I386OP(setnz_rm8), },
+ { 0x96, OP_2BYTE|OP_I386, I386OP(setbe_rm8), I386OP(setbe_rm8), },
+ { 0x97, OP_2BYTE|OP_I386, I386OP(seta_rm8), I386OP(seta_rm8), },
+ { 0x98, OP_2BYTE|OP_I386, I386OP(sets_rm8), I386OP(sets_rm8), },
+ { 0x99, OP_2BYTE|OP_I386, I386OP(setns_rm8), I386OP(setns_rm8), },
+ { 0x9A, OP_2BYTE|OP_I386, I386OP(setp_rm8), I386OP(setp_rm8), },
+ { 0x9B, OP_2BYTE|OP_I386, I386OP(setnp_rm8), I386OP(setnp_rm8), },
+ { 0x9C, OP_2BYTE|OP_I386, I386OP(setl_rm8), I386OP(setl_rm8), },
+ { 0x9D, OP_2BYTE|OP_I386, I386OP(setge_rm8), I386OP(setge_rm8), },
+ { 0x9E, OP_2BYTE|OP_I386, I386OP(setle_rm8), I386OP(setle_rm8), },
+ { 0x9F, OP_2BYTE|OP_I386, I386OP(setg_rm8), I386OP(setg_rm8), },
+ { 0xA0, OP_2BYTE|OP_I386, I386OP(push_fs16), I386OP(push_fs32), },
+ { 0xA1, OP_2BYTE|OP_I386, I386OP(pop_fs16), I386OP(pop_fs32), },
+ { 0xA2, OP_2BYTE|OP_I486, I486OP(cpuid), I486OP(cpuid), },
+ { 0xA3, OP_2BYTE|OP_I386, I386OP(bt_rm16_r16), I386OP(bt_rm32_r32), },
+ { 0xA4, OP_2BYTE|OP_I386, I386OP(shld16_i8), I386OP(shld32_i8), },
+ { 0xA5, OP_2BYTE|OP_I386, I386OP(shld16_cl), I386OP(shld32_cl), },
+ { 0xA8, OP_2BYTE|OP_I386, I386OP(push_gs16), I386OP(push_gs32), },
+ { 0xA9, OP_2BYTE|OP_I386, I386OP(pop_gs16), I386OP(pop_gs32), },
+ { 0xAA, OP_2BYTE|OP_I386, I386OP(unimplemented), I386OP(unimplemented), },
+ { 0xAB, OP_2BYTE|OP_I386, I386OP(bts_rm16_r16), I386OP(bts_rm32_r32), },
+ { 0xAC, OP_2BYTE|OP_I386, I386OP(shrd16_i8), I386OP(shrd32_i8), },
+ { 0xAD, OP_2BYTE|OP_I386, I386OP(shrd16_cl), I386OP(shrd32_cl), },
+ { 0xAE, OP_2BYTE|OP_SSE, SSEOP(sse_group0fae), SSEOP(sse_group0fae), },
+ { 0xAF, OP_2BYTE|OP_I386, I386OP(imul_r16_rm16), I386OP(imul_r32_rm32), },
+ { 0xB0, OP_2BYTE|OP_I486, I486OP(cmpxchg_rm8_r8), I486OP(cmpxchg_rm8_r8), },
+ { 0xB1, OP_2BYTE|OP_I486, I486OP(cmpxchg_rm16_r16), I486OP(cmpxchg_rm32_r32), },
+ { 0xB2, OP_2BYTE|OP_I386, I386OP(lss16), I386OP(lss32), },
+ { 0xB3, OP_2BYTE|OP_I386, I386OP(btr_rm16_r16), I386OP(btr_rm32_r32), },
+ { 0xB4, OP_2BYTE|OP_I386, I386OP(lfs16), I386OP(lfs32), },
+ { 0xB5, OP_2BYTE|OP_I386, I386OP(lgs16), I386OP(lgs32), },
+ { 0xB6, OP_2BYTE|OP_I386, I386OP(movzx_r16_rm8), I386OP(movzx_r32_rm8), },
+ { 0xB7, OP_2BYTE|OP_I386, I386OP(invalid), I386OP(movzx_r32_rm16), },
+ { 0xBA, OP_2BYTE|OP_I386, I386OP(group0FBA_16), I386OP(group0FBA_32), },
+ { 0xBB, OP_2BYTE|OP_I386, I386OP(btc_rm16_r16), I386OP(btc_rm32_r32), },
+ { 0xBC, OP_2BYTE|OP_I386, I386OP(bsf_r16_rm16), I386OP(bsf_r32_rm32), },
+ { 0xBD, OP_2BYTE|OP_I386, I386OP(bsr_r16_rm16), I386OP(bsr_r32_rm32), },
+ { 0xBE, OP_2BYTE|OP_I386, I386OP(movsx_r16_rm8), I386OP(movsx_r32_rm8), },
+ { 0xBF, OP_2BYTE|OP_I386, I386OP(invalid), I386OP(movsx_r32_rm16), },
+ { 0xC0, OP_2BYTE|OP_I486, I486OP(xadd_rm8_r8), I486OP(xadd_rm8_r8), },
+ { 0xC1, OP_2BYTE|OP_I486, I486OP(xadd_rm16_r16), I486OP(xadd_rm32_r32), },
+ { 0xc6, OP_2BYTE|OP_SSE, SSEOP(shufps), SSEOP(shufps), },
+ { 0xC7, OP_2BYTE|OP_PENTIUM, PENTIUMOP(cmpxchg8b_m64), PENTIUMOP(cmpxchg8b_m64), },
+ { 0xC8, OP_2BYTE|OP_I486, I486OP(bswap_eax), I486OP(bswap_eax), },
+ { 0xC9, OP_2BYTE|OP_I486, I486OP(bswap_ecx), I486OP(bswap_ecx), },
+ { 0xCA, OP_2BYTE|OP_I486, I486OP(bswap_edx), I486OP(bswap_edx), },
+ { 0xCB, OP_2BYTE|OP_I486, I486OP(bswap_ebx), I486OP(bswap_ebx), },
+ { 0xCC, OP_2BYTE|OP_I486, I486OP(bswap_esp), I486OP(bswap_esp), },
+ { 0xCD, OP_2BYTE|OP_I486, I486OP(bswap_ebp), I486OP(bswap_ebp), },
+ { 0xCE, OP_2BYTE|OP_I486, I486OP(bswap_esi), I486OP(bswap_esi), },
+ { 0xCF, OP_2BYTE|OP_I486, I486OP(bswap_edi), I486OP(bswap_edi), },
/* F3 0F ?? */
- { 0x2C, OP_3BYTEF3|OP_SSE, SSEOP(cvttss2si), SSEOP(cvttss2si), }
+ { 0x2C, OP_3BYTEF3|OP_SSE, SSEOP(cvttss2si), SSEOP(cvttss2si), }
};
diff --git a/src/emu/cpu/i386/i386priv.h b/src/emu/cpu/i386/i386priv.h
index 49715970467..4db9148b919 100644
--- a/src/emu/cpu/i386/i386priv.h
+++ b/src/emu/cpu/i386/i386priv.h
@@ -9,11 +9,11 @@
//#define DEBUG_MISSING_OPCODE
-#define I386OP(XX) i386_##XX
-#define I486OP(XX) i486_##XX
-#define PENTIUMOP(XX) pentium_##XX
-#define MMXOP(XX) mmx_##XX
-#define SSEOP(XX) sse_##XX
+#define I386OP(XX) i386_##XX
+#define I486OP(XX) i486_##XX
+#define PENTIUMOP(XX) pentium_##XX
+#define MMXOP(XX) mmx_##XX
+#define SSEOP(XX) sse_##XX
extern int i386_dasm_one(char *buffer, UINT32 pc, const UINT8 *oprom, int mode);
@@ -202,7 +202,7 @@ struct I386_SREG {
UINT16 flags;
UINT32 base;
UINT32 limit;
- int d; // Operand size
+ int d; // Operand size
bool valid;
};
@@ -283,14 +283,14 @@ struct i386_state
UINT8 performed_intersegment_jump;
UINT8 delayed_interrupt_enable;
- UINT32 cr[5]; // Control registers
- UINT32 dr[8]; // Debug registers
- UINT32 tr[8]; // Test registers
+ UINT32 cr[5]; // Control registers
+ UINT32 dr[8]; // Debug registers
+ UINT32 tr[8]; // Test registers
- I386_SYS_TABLE gdtr; // Global Descriptor Table Register
- I386_SYS_TABLE idtr; // Interrupt Descriptor Table Register
- I386_SEG_DESC task; // Task register
- I386_SEG_DESC ldtr; // Local Descriptor Table Register
+ I386_SYS_TABLE gdtr; // Global Descriptor Table Register
+ I386_SYS_TABLE idtr; // Interrupt Descriptor Table Register
+ I386_SEG_DESC task; // Task register
+ I386_SEG_DESC ldtr; // Local Descriptor Table Register
UINT8 ext; // external interrupt
@@ -372,14 +372,14 @@ INLINE i386_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I386 ||
- device->type() == I486 ||
- device->type() == PENTIUM ||
- device->type() == MEDIAGX ||
- device->type() == PENTIUM_PRO ||
- device->type() == PENTIUM_MMX ||
- device->type() == PENTIUM2 ||
- device->type() == PENTIUM3 ||
- device->type() == PENTIUM4);
+ device->type() == I486 ||
+ device->type() == PENTIUM ||
+ device->type() == MEDIAGX ||
+ device->type() == PENTIUM_PRO ||
+ device->type() == PENTIUM_MMX ||
+ device->type() == PENTIUM2 ||
+ device->type() == PENTIUM3 ||
+ device->type() == PENTIUM4);
return (i386_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -389,35 +389,35 @@ static int i386_limit_check(i386_state *cpustate, int seg, UINT32 offset);
#define FAULT_THROW(fault,error) { throw (UINT64)(fault | (UINT64)error << 32); }
#define PF_THROW(error) { cpustate->cr[2] = address; FAULT_THROW(FAULT_PF,error); }
-#define PROTECTED_MODE (cpustate->cr[0] & 0x1)
-#define STACK_32BIT (cpustate->sreg[SS].d)
-#define V8086_MODE (cpustate->VM)
-#define NESTED_TASK (cpustate->NT)
-#define WP (cpustate->cr[0] & 0x10000)
+#define PROTECTED_MODE (cpustate->cr[0] & 0x1)
+#define STACK_32BIT (cpustate->sreg[SS].d)
+#define V8086_MODE (cpustate->VM)
+#define NESTED_TASK (cpustate->NT)
+#define WP (cpustate->cr[0] & 0x10000)
-#define SetOF_Add32(r,s,d) (cpustate->OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x80000000) ? 1: 0)
-#define SetOF_Add16(r,s,d) (cpustate->OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x8000) ? 1 : 0)
-#define SetOF_Add8(r,s,d) (cpustate->OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x80) ? 1 : 0)
+#define SetOF_Add32(r,s,d) (cpustate->OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x80000000) ? 1: 0)
+#define SetOF_Add16(r,s,d) (cpustate->OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x8000) ? 1 : 0)
+#define SetOF_Add8(r,s,d) (cpustate->OF = (((r) ^ (s)) & ((r) ^ (d)) & 0x80) ? 1 : 0)
-#define SetOF_Sub32(r,s,d) (cpustate->OF = (((d) ^ (s)) & ((d) ^ (r)) & 0x80000000) ? 1 : 0)
-#define SetOF_Sub16(r,s,d) (cpustate->OF = (((d) ^ (s)) & ((d) ^ (r)) & 0x8000) ? 1 : 0)
-#define SetOF_Sub8(r,s,d) (cpustate->OF = (((d) ^ (s)) & ((d) ^ (r)) & 0x80) ? 1 : 0)
+#define SetOF_Sub32(r,s,d) (cpustate->OF = (((d) ^ (s)) & ((d) ^ (r)) & 0x80000000) ? 1 : 0)
+#define SetOF_Sub16(r,s,d) (cpustate->OF = (((d) ^ (s)) & ((d) ^ (r)) & 0x8000) ? 1 : 0)
+#define SetOF_Sub8(r,s,d) (cpustate->OF = (((d) ^ (s)) & ((d) ^ (r)) & 0x80) ? 1 : 0)
-#define SetCF8(x) {cpustate->CF = ((x) & 0x100) ? 1 : 0; }
-#define SetCF16(x) {cpustate->CF = ((x) & 0x10000) ? 1 : 0; }
-#define SetCF32(x) {cpustate->CF = ((x) & (((UINT64)1) << 32)) ? 1 : 0; }
+#define SetCF8(x) {cpustate->CF = ((x) & 0x100) ? 1 : 0; }
+#define SetCF16(x) {cpustate->CF = ((x) & 0x10000) ? 1 : 0; }
+#define SetCF32(x) {cpustate->CF = ((x) & (((UINT64)1) << 32)) ? 1 : 0; }
-#define SetSF(x) (cpustate->SF = (x))
-#define SetZF(x) (cpustate->ZF = (x))
-#define SetAF(x,y,z) (cpustate->AF = (((x) ^ ((y) ^ (z))) & 0x10) ? 1 : 0)
-#define SetPF(x) (cpustate->PF = i386_parity_table[(x) & 0xFF])
+#define SetSF(x) (cpustate->SF = (x))
+#define SetZF(x) (cpustate->ZF = (x))
+#define SetAF(x,y,z) (cpustate->AF = (((x) ^ ((y) ^ (z))) & 0x10) ? 1 : 0)
+#define SetPF(x) (cpustate->PF = i386_parity_table[(x) & 0xFF])
-#define SetSZPF8(x) {cpustate->ZF = ((UINT8)(x)==0); cpustate->SF = ((x)&0x80) ? 1 : 0; cpustate->PF = i386_parity_table[x & 0xFF]; }
-#define SetSZPF16(x) {cpustate->ZF = ((UINT16)(x)==0); cpustate->SF = ((x)&0x8000) ? 1 : 0; cpustate->PF = i386_parity_table[x & 0xFF]; }
-#define SetSZPF32(x) {cpustate->ZF = ((UINT32)(x)==0); cpustate->SF = ((x)&0x80000000) ? 1 : 0; cpustate->PF = i386_parity_table[x & 0xFF]; }
+#define SetSZPF8(x) {cpustate->ZF = ((UINT8)(x)==0); cpustate->SF = ((x)&0x80) ? 1 : 0; cpustate->PF = i386_parity_table[x & 0xFF]; }
+#define SetSZPF16(x) {cpustate->ZF = ((UINT16)(x)==0); cpustate->SF = ((x)&0x8000) ? 1 : 0; cpustate->PF = i386_parity_table[x & 0xFF]; }
+#define SetSZPF32(x) {cpustate->ZF = ((UINT32)(x)==0); cpustate->SF = ((x)&0x80000000) ? 1 : 0; cpustate->PF = i386_parity_table[x & 0xFF]; }
-#define MMX(n) cpustate->fpu_reg[(n)].i
-#define XMM(n) cpustate->sse_reg[(n)]
+#define MMX(n) cpustate->fpu_reg[(n)].i
+#define XMM(n) cpustate->sse_reg[(n)]
/***********************************************************************************/
@@ -436,23 +436,23 @@ struct MODRM_TABLE {
extern MODRM_TABLE i386_MODRM_table[256];
-#define REG8(x) (cpustate->reg.b[x])
-#define REG16(x) (cpustate->reg.w[x])
-#define REG32(x) (cpustate->reg.d[x])
+#define REG8(x) (cpustate->reg.b[x])
+#define REG16(x) (cpustate->reg.w[x])
+#define REG32(x) (cpustate->reg.d[x])
-#define LOAD_REG8(x) (REG8(i386_MODRM_table[x].reg.b))
-#define LOAD_REG16(x) (REG16(i386_MODRM_table[x].reg.w))
-#define LOAD_REG32(x) (REG32(i386_MODRM_table[x].reg.d))
-#define LOAD_RM8(x) (REG8(i386_MODRM_table[x].rm.b))
-#define LOAD_RM16(x) (REG16(i386_MODRM_table[x].rm.w))
-#define LOAD_RM32(x) (REG32(i386_MODRM_table[x].rm.d))
+#define LOAD_REG8(x) (REG8(i386_MODRM_table[x].reg.b))
+#define LOAD_REG16(x) (REG16(i386_MODRM_table[x].reg.w))
+#define LOAD_REG32(x) (REG32(i386_MODRM_table[x].reg.d))
+#define LOAD_RM8(x) (REG8(i386_MODRM_table[x].rm.b))
+#define LOAD_RM16(x) (REG16(i386_MODRM_table[x].rm.w))
+#define LOAD_RM32(x) (REG32(i386_MODRM_table[x].rm.d))
-#define STORE_REG8(x, value) (REG8(i386_MODRM_table[x].reg.b) = value)
-#define STORE_REG16(x, value) (REG16(i386_MODRM_table[x].reg.w) = value)
-#define STORE_REG32(x, value) (REG32(i386_MODRM_table[x].reg.d) = value)
-#define STORE_RM8(x, value) (REG8(i386_MODRM_table[x].rm.b) = value)
-#define STORE_RM16(x, value) (REG16(i386_MODRM_table[x].rm.w) = value)
-#define STORE_RM32(x, value) (REG32(i386_MODRM_table[x].rm.d) = value)
+#define STORE_REG8(x, value) (REG8(i386_MODRM_table[x].reg.b) = value)
+#define STORE_REG16(x, value) (REG16(i386_MODRM_table[x].reg.w) = value)
+#define STORE_REG32(x, value) (REG32(i386_MODRM_table[x].reg.d) = value)
+#define STORE_RM8(x, value) (REG8(i386_MODRM_table[x].rm.b) = value)
+#define STORE_RM16(x, value) (REG16(i386_MODRM_table[x].rm.w) = value)
+#define STORE_RM32(x, value) (REG32(i386_MODRM_table[x].rm.d) = value)
#define SWITCH_ENDIAN_32(x) (((((x) << 24) & (0xff << 24)) | (((x) << 8) & (0xff << 16)) | (((x) >> 8) & (0xff << 8)) | (((x) >> 24) & (0xff << 0))))
@@ -575,7 +575,7 @@ INLINE void CHANGE_PC(i386_state *cpustate, UINT32 pc)
address = cpustate->pc;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
translate_address(cpustate,-1,&address,&error);
}
@@ -590,7 +590,7 @@ INLINE void NEAR_BRANCH(i386_state *cpustate, INT32 offs)
address = cpustate->pc;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
translate_address(cpustate,-1,&address,&error);
}
@@ -601,7 +601,7 @@ INLINE UINT8 FETCH(i386_state *cpustate)
UINT8 value;
UINT32 address = cpustate->pc, error;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,0,&address,&error))
PF_THROW(error);
@@ -621,11 +621,11 @@ INLINE UINT16 FETCH16(i386_state *cpustate)
UINT16 value;
UINT32 address = cpustate->pc, error;
- if( address & 0x1 ) { /* Unaligned read */
+ if( address & 0x1 ) { /* Unaligned read */
value = (FETCH(cpustate) << 0) |
(FETCH(cpustate) << 8);
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,0,&address,&error))
PF_THROW(error);
@@ -642,13 +642,13 @@ INLINE UINT32 FETCH32(i386_state *cpustate)
UINT32 value;
UINT32 address = cpustate->pc, error;
- if( cpustate->pc & 0x3 ) { /* Unaligned read */
+ if( cpustate->pc & 0x3 ) { /* Unaligned read */
value = (FETCH(cpustate) << 0) |
(FETCH(cpustate) << 8) |
(FETCH(cpustate) << 16) |
(FETCH(cpustate) << 24);
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,0,&address,&error))
PF_THROW(error);
@@ -666,7 +666,7 @@ INLINE UINT8 READ8(i386_state *cpustate,UINT32 ea)
{
UINT32 address = ea, error;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,0,&address,&error))
PF_THROW(error);
@@ -680,11 +680,11 @@ INLINE UINT16 READ16(i386_state *cpustate,UINT32 ea)
UINT16 value;
UINT32 address = ea, error;
- if( ea & 0x1 ) { /* Unaligned read */
+ if( ea & 0x1 ) { /* Unaligned read */
value = (READ8( cpustate, address+0 ) << 0) |
(READ8( cpustate, address+1 ) << 8);
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,0,&address,&error))
PF_THROW(error);
@@ -700,13 +700,13 @@ INLINE UINT32 READ32(i386_state *cpustate,UINT32 ea)
UINT32 value;
UINT32 address = ea, error;
- if( ea & 0x3 ) { /* Unaligned read */
+ if( ea & 0x3 ) { /* Unaligned read */
value = (READ8( cpustate, address+0 ) << 0) |
(READ8( cpustate, address+1 ) << 8) |
(READ8( cpustate, address+2 ) << 16) |
(READ8( cpustate, address+3 ) << 24);
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,0,&address,&error))
PF_THROW(error);
@@ -723,7 +723,7 @@ INLINE UINT64 READ64(i386_state *cpustate,UINT32 ea)
UINT64 value;
UINT32 address = ea, error;
- if( ea & 0x7 ) { /* Unaligned read */
+ if( ea & 0x7 ) { /* Unaligned read */
value = (((UINT64) READ8( cpustate, address+0 )) << 0) |
(((UINT64) READ8( cpustate, address+1 )) << 8) |
(((UINT64) READ8( cpustate, address+2 )) << 16) |
@@ -733,7 +733,7 @@ INLINE UINT64 READ64(i386_state *cpustate,UINT32 ea)
(((UINT64) READ8( cpustate, address+6 )) << 48) |
(((UINT64) READ8( cpustate, address+7 )) << 56);
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,0,&address,&error))
PF_THROW(error);
@@ -749,7 +749,7 @@ INLINE UINT8 READ8PL0(i386_state *cpustate,UINT32 ea)
{
UINT32 address = ea, error;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,-2,&address,&error))
PF_THROW(error);
@@ -763,11 +763,11 @@ INLINE UINT16 READ16PL0(i386_state *cpustate,UINT32 ea)
UINT16 value;
UINT32 address = ea, error;
- if( ea & 0x1 ) { /* Unaligned read */
+ if( ea & 0x1 ) { /* Unaligned read */
value = (READ8PL0( cpustate, address+0 ) << 0) |
(READ8PL0( cpustate, address+1 ) << 8);
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,-2,&address,&error))
PF_THROW(error);
@@ -783,13 +783,13 @@ INLINE UINT32 READ32PL0(i386_state *cpustate,UINT32 ea)
UINT32 value;
UINT32 address = ea, error;
- if( ea & 0x3 ) { /* Unaligned read */
+ if( ea & 0x3 ) { /* Unaligned read */
value = (READ8PL0( cpustate, address+0 ) << 0) |
(READ8PL0( cpustate, address+1 ) << 8) |
(READ8PL0( cpustate, address+2 ) << 16) |
(READ8PL0( cpustate, address+3 ) << 24);
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,-2,&address,&error))
PF_THROW(error);
@@ -804,7 +804,7 @@ INLINE UINT32 READ32PL0(i386_state *cpustate,UINT32 ea)
INLINE void WRITE_TEST(i386_state *cpustate,UINT32 ea)
{
UINT32 address = ea, error;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,1,&address,&error))
PF_THROW(error);
@@ -815,7 +815,7 @@ INLINE void WRITE8(i386_state *cpustate,UINT32 ea, UINT8 value)
{
UINT32 address = ea, error;
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,1,&address,&error))
PF_THROW(error);
@@ -828,11 +828,11 @@ INLINE void WRITE16(i386_state *cpustate,UINT32 ea, UINT16 value)
{
UINT32 address = ea, error;
- if( ea & 0x1 ) { /* Unaligned write */
+ if( ea & 0x1 ) { /* Unaligned write */
WRITE8( cpustate, address+0, value & 0xff );
WRITE8( cpustate, address+1, (value >> 8) & 0xff );
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,1,&address,&error))
PF_THROW(error);
@@ -846,13 +846,13 @@ INLINE void WRITE32(i386_state *cpustate,UINT32 ea, UINT32 value)
{
UINT32 address = ea, error;
- if( ea & 0x3 ) { /* Unaligned write */
+ if( ea & 0x3 ) { /* Unaligned write */
WRITE8( cpustate, address+0, value & 0xff );
WRITE8( cpustate, address+1, (value >> 8) & 0xff );
WRITE8( cpustate, address+2, (value >> 16) & 0xff );
WRITE8( cpustate, address+3, (value >> 24) & 0xff );
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,1,&address,&error))
PF_THROW(error);
@@ -867,7 +867,7 @@ INLINE void WRITE64(i386_state *cpustate,UINT32 ea, UINT64 value)
{
UINT32 address = ea, error;
- if( ea & 0x7 ) { /* Unaligned write */
+ if( ea & 0x7 ) { /* Unaligned write */
WRITE8( cpustate, address+0, value & 0xff );
WRITE8( cpustate, address+1, (value >> 8) & 0xff );
WRITE8( cpustate, address+2, (value >> 16) & 0xff );
@@ -877,7 +877,7 @@ INLINE void WRITE64(i386_state *cpustate,UINT32 ea, UINT64 value)
WRITE8( cpustate, address+6, (value >> 48) & 0xff );
WRITE8( cpustate, address+7, (value >> 56) & 0xff );
} else {
- if (cpustate->cr[0] & 0x80000000) // page translation enabled
+ if (cpustate->cr[0] & 0x80000000) // page translation enabled
{
if(!translate_address(cpustate,1,&address,&error))
PF_THROW(error);
@@ -1232,7 +1232,7 @@ INLINE UINT16 READPORT16(i386_state *cpustate, offs_t port)
if (port & 1)
{
return READPORT8(cpustate, port) |
- (READPORT8(cpustate, port + 1) << 8);
+ (READPORT8(cpustate, port + 1) << 8);
}
else
{
@@ -1260,9 +1260,9 @@ INLINE UINT32 READPORT32(i386_state *cpustate, offs_t port)
if (port & 3)
{
return READPORT8(cpustate, port) |
- (READPORT8(cpustate, port + 1) << 8) |
- (READPORT8(cpustate, port + 2) << 16) |
- (READPORT8(cpustate, port + 3) << 24);
+ (READPORT8(cpustate, port + 1) << 8) |
+ (READPORT8(cpustate, port + 2) << 16) |
+ (READPORT8(cpustate, port + 3) << 24);
}
else
{
diff --git a/src/emu/cpu/i386/i486ops.c b/src/emu/cpu/i386/i486ops.c
index d5fef38940f..2f68de15153 100644
--- a/src/emu/cpu/i386/i486ops.c
+++ b/src/emu/cpu/i386/i486ops.c
@@ -1,6 +1,6 @@
// Intel 486+ specific opcodes
-static void I486OP(cpuid)(i386_state *cpustate) // Opcode 0x0F A2
+static void I486OP(cpuid)(i386_state *cpustate) // Opcode 0x0F A2
{
if (cpustate->cpuid_id0 == 0)
{
@@ -33,18 +33,18 @@ static void I486OP(cpuid)(i386_state *cpustate) // Opcode 0x0F A2
}
}
-static void I486OP(invd)(i386_state *cpustate) // Opcode 0x0f 08
+static void I486OP(invd)(i386_state *cpustate) // Opcode 0x0f 08
{
// Nothing to do ?
CYCLES(cpustate,CYCLES_INVD);
}
-static void I486OP(wbinvd)(i386_state *cpustate) // Opcode 0x0f 09
+static void I486OP(wbinvd)(i386_state *cpustate) // Opcode 0x0f 09
{
// Nothing to do ?
}
-static void I486OP(cmpxchg_rm8_r8)(i386_state *cpustate) // Opcode 0x0f b0
+static void I486OP(cmpxchg_rm8_r8)(i386_state *cpustate) // Opcode 0x0f b0
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -78,7 +78,7 @@ static void I486OP(cmpxchg_rm8_r8)(i386_state *cpustate) // Opcode 0x0f b0
}
}
-static void I486OP(cmpxchg_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b1
+static void I486OP(cmpxchg_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b1
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -111,7 +111,7 @@ static void I486OP(cmpxchg_rm16_r16)(i386_state *cpustate) // Opcode 0x0f b1
}
}
-static void I486OP(cmpxchg_rm32_r32)(i386_state *cpustate) // Opcode 0x0f b1
+static void I486OP(cmpxchg_rm32_r32)(i386_state *cpustate) // Opcode 0x0f b1
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -144,7 +144,7 @@ static void I486OP(cmpxchg_rm32_r32)(i386_state *cpustate) // Opcode 0x0f b1
}
}
-static void I486OP(xadd_rm8_r8)(i386_state *cpustate) // Opcode 0x0f c0
+static void I486OP(xadd_rm8_r8)(i386_state *cpustate) // Opcode 0x0f c0
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -163,7 +163,7 @@ static void I486OP(xadd_rm8_r8)(i386_state *cpustate) // Opcode 0x0f c0
}
}
-static void I486OP(xadd_rm16_r16)(i386_state *cpustate) // Opcode 0x0f c1
+static void I486OP(xadd_rm16_r16)(i386_state *cpustate) // Opcode 0x0f c1
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -182,7 +182,7 @@ static void I486OP(xadd_rm16_r16)(i386_state *cpustate) // Opcode 0x0f c1
}
}
-static void I486OP(xadd_rm32_r32)(i386_state *cpustate) // Opcode 0x0f c1
+static void I486OP(xadd_rm32_r32)(i386_state *cpustate) // Opcode 0x0f c1
{
UINT8 modrm = FETCH(cpustate);
if( modrm >= 0xc0 ) {
@@ -201,7 +201,7 @@ static void I486OP(xadd_rm32_r32)(i386_state *cpustate) // Opcode 0x0f c1
}
}
-static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
+static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
{
UINT8 modrm = FETCH(cpustate);
UINT16 address;
@@ -209,7 +209,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* SGDT */
+ case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM16(modrm);
@@ -222,7 +222,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SGDT);
break;
}
- case 1: /* SIDT */
+ case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
@@ -238,7 +238,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SIDT);
break;
}
- case 2: /* LGDT */
+ case 2: /* LGDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -253,7 +253,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LGDT);
break;
}
- case 3: /* LIDT */
+ case 3: /* LIDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -268,7 +268,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LIDT);
break;
}
- case 4: /* SMSW */
+ case 4: /* SMSW */
{
if( modrm >= 0xc0 ) {
STORE_RM16(modrm, cpustate->cr[0]);
@@ -280,7 +280,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
}
break;
}
- case 6: /* LMSW */
+ case 6: /* LMSW */
{
UINT16 b;
if(PROTECTED_MODE && cpustate->CPL)
@@ -299,7 +299,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
cpustate->cr[0] |= b & 0x0000000f;
break;
}
- case 7: /* INVLPG */
+ case 7: /* INVLPG */
{
// Nothing to do ?
break;
@@ -310,14 +310,14 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01
}
}
-static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
+static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
{
UINT8 modrm = FETCH(cpustate);
UINT32 address, ea;
switch( (modrm >> 3) & 0x7 )
{
- case 0: /* SGDT */
+ case 0: /* SGDT */
{
if( modrm >= 0xc0 ) {
address = LOAD_RM32(modrm);
@@ -330,7 +330,7 @@ static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SGDT);
break;
}
- case 1: /* SIDT */
+ case 1: /* SIDT */
{
if (modrm >= 0xc0)
{
@@ -346,7 +346,7 @@ static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_SIDT);
break;
}
- case 2: /* LGDT */
+ case 2: /* LGDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -361,7 +361,7 @@ static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LGDT);
break;
}
- case 3: /* LIDT */
+ case 3: /* LIDT */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -376,7 +376,7 @@ static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
CYCLES(cpustate,CYCLES_LIDT);
break;
}
- case 4: /* SMSW */
+ case 4: /* SMSW */
{
if( modrm >= 0xc0 ) {
STORE_RM32(modrm, cpustate->cr[0] & 0xffff);
@@ -389,7 +389,7 @@ static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
}
break;
}
- case 6: /* LMSW */
+ case 6: /* LMSW */
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP,0)
@@ -408,7 +408,7 @@ static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
cpustate->cr[0] |= b & 0x0000000f;
break;
}
- case 7: /* INVLPG */
+ case 7: /* INVLPG */
{
// Nothing to do ?
break;
@@ -419,55 +419,55 @@ static void I486OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01
}
}
-static void I486OP(bswap_eax)(i386_state *cpustate) // Opcode 0x0f 38
+static void I486OP(bswap_eax)(i386_state *cpustate) // Opcode 0x0f 38
{
REG32(EAX) = SWITCH_ENDIAN_32(REG32(EAX));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(bswap_ecx)(i386_state *cpustate) // Opcode 0x0f 39
+static void I486OP(bswap_ecx)(i386_state *cpustate) // Opcode 0x0f 39
{
REG32(ECX) = SWITCH_ENDIAN_32(REG32(ECX));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(bswap_edx)(i386_state *cpustate) // Opcode 0x0f 3A
+static void I486OP(bswap_edx)(i386_state *cpustate) // Opcode 0x0f 3A
{
REG32(EDX) = SWITCH_ENDIAN_32(REG32(EDX));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(bswap_ebx)(i386_state *cpustate) // Opcode 0x0f 3B
+static void I486OP(bswap_ebx)(i386_state *cpustate) // Opcode 0x0f 3B
{
REG32(EBX) = SWITCH_ENDIAN_32(REG32(EBX));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(bswap_esp)(i386_state *cpustate) // Opcode 0x0f 3C
+static void I486OP(bswap_esp)(i386_state *cpustate) // Opcode 0x0f 3C
{
REG32(ESP) = SWITCH_ENDIAN_32(REG32(ESP));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(bswap_ebp)(i386_state *cpustate) // Opcode 0x0f 3D
+static void I486OP(bswap_ebp)(i386_state *cpustate) // Opcode 0x0f 3D
{
REG32(EBP) = SWITCH_ENDIAN_32(REG32(EBP));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(bswap_esi)(i386_state *cpustate) // Opcode 0x0f 3E
+static void I486OP(bswap_esi)(i386_state *cpustate) // Opcode 0x0f 3E
{
REG32(ESI) = SWITCH_ENDIAN_32(REG32(ESI));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(bswap_edi)(i386_state *cpustate) // Opcode 0x0f 3F
+static void I486OP(bswap_edi)(i386_state *cpustate) // Opcode 0x0f 3F
{
REG32(EDI) = SWITCH_ENDIAN_32(REG32(EDI));
- CYCLES(cpustate,1); // TODO
+ CYCLES(cpustate,1); // TODO
}
-static void I486OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
+static void I486OP(mov_cr_r32)(i386_state *cpustate) // Opcode 0x0f 22
{
if(PROTECTED_MODE && cpustate->CPL)
FAULT(FAULT_GP, 0);
diff --git a/src/emu/cpu/i386/pentops.c b/src/emu/cpu/i386/pentops.c
index dc3df7aa9d6..47b84a6b0af 100644
--- a/src/emu/cpu/i386/pentops.c
+++ b/src/emu/cpu/i386/pentops.c
@@ -24,7 +24,7 @@ INLINE void MMXPROLOG(i386_state *cpustate)
cpustate->x87_tw = 0; // tag word = 0
}
-static void PENTIUMOP(rdmsr)(i386_state *cpustate) // Opcode 0x0f 32
+static void PENTIUMOP(rdmsr)(i386_state *cpustate) // Opcode 0x0f 32
{
UINT64 data;
UINT8 valid_msr = 0;
@@ -39,7 +39,7 @@ static void PENTIUMOP(rdmsr)(i386_state *cpustate) // Opcode 0x0f 32
CYCLES(cpustate,CYCLES_RDMSR);
}
-static void PENTIUMOP(wrmsr)(i386_state *cpustate) // Opcode 0x0f 30
+static void PENTIUMOP(wrmsr)(i386_state *cpustate) // Opcode 0x0f 30
{
UINT64 data;
UINT8 valid_msr = 0;
@@ -52,10 +52,10 @@ static void PENTIUMOP(wrmsr)(i386_state *cpustate) // Opcode 0x0f 30
if(cpustate->CPL != 0 || valid_msr == 0) // if current privilege level isn't 0 or the register isn't recognized
FAULT(FAULT_GP,0) // ... throw a general exception fault
- CYCLES(cpustate,1); // TODO: correct cycle count (~30-45)
+ CYCLES(cpustate,1); // TODO: correct cycle count (~30-45)
}
-static void PENTIUMOP(rdtsc)(i386_state *cpustate) // Opcode 0x0f 31
+static void PENTIUMOP(rdtsc)(i386_state *cpustate) // Opcode 0x0f 31
{
UINT64 ts = cpustate->tsc + (cpustate->base_cycles - cpustate->cycles);
REG32(EAX) = (UINT32)(ts);
@@ -64,14 +64,14 @@ static void PENTIUMOP(rdtsc)(i386_state *cpustate) // Opcode 0x0f 31
CYCLES(cpustate,CYCLES_RDTSC);
}
-static void I386OP(cyrix_unknown)(i386_state *cpustate) // Opcode 0x0f 74
+static void I386OP(cyrix_unknown)(i386_state *cpustate) // Opcode 0x0f 74
{
logerror("Unemulated 0x0f 0x74 opcode called\n");
CYCLES(cpustate,1);
}
-static void PENTIUMOP(cmpxchg8b_m64)(i386_state *cpustate) // Opcode 0x0f c7
+static void PENTIUMOP(cmpxchg8b_m64)(i386_state *cpustate) // Opcode 0x0f c7
{
UINT8 modm = FETCH(cpustate);
if( modm >= 0xc0 ) {
@@ -106,7 +106,7 @@ INLINE void WRITEXMM(i386_state *cpustate,UINT32 ea,XMM_REG &r)
WRITE64(cpustate, ea+8, r.q[1]);
}
-static void SSEOP(sse_group0fae)(i386_state *cpustate) // Opcode 0f ae
+static void SSEOP(sse_group0fae)(i386_state *cpustate) // Opcode 0f ae
{
UINT8 modm = FETCH(cpustate);
if( modm == 0xf8 ) {
@@ -139,7 +139,7 @@ static void SSEOP(sse_group0fae)(i386_state *cpustate) // Opcode 0f ae
}
}
-static void PENTIUMOP(ud2)(i386_state *cpustate) // Opcode 0x0f 0b
+static void PENTIUMOP(ud2)(i386_state *cpustate) // Opcode 0x0f 0b
{
i386_trap(cpustate, 6, 0, 0);
}
@@ -156,7 +156,7 @@ static void SSEOP(cvttss2si)(i386_state *cpustate) // Opcode f3 0f 2c
}
STORE_REG32(modrm, (INT32)FPU_INT32_SINGLE(src));
// TODO
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
static void SSEOP(movaps_r128_rm128)(i386_state *cpustate) // Opcode 0f 28
@@ -255,5 +255,5 @@ static void MMXOP(emms)(i386_state *cpustate) // Opcode 0f 77
{
cpustate->x87_tw = 0xffff; // tag word = 0xffff
// TODO
- CYCLES(cpustate,1); // TODO: correct cycle count
+ CYCLES(cpustate,1); // TODO: correct cycle count
}
diff --git a/src/emu/cpu/i386/x87ops.c b/src/emu/cpu/i386/x87ops.c
index 010b1c83cbb..edab482aea3 100644
--- a/src/emu/cpu/i386/x87ops.c
+++ b/src/emu/cpu/i386/x87ops.c
@@ -25,45 +25,45 @@
*
*************************************/
-#define X87_SW_IE 0x0001
-#define X87_SW_DE 0x0002
-#define X87_SW_ZE 0x0004
-#define X87_SW_OE 0x0008
-#define X87_SW_UE 0x0010
-#define X87_SW_PE 0x0020
-#define X87_SW_SF 0x0040
-#define X87_SW_ES 0x0080
-#define X87_SW_C0 0x0100
-#define X87_SW_C1 0x0200
-#define X87_SW_C2 0x0400
-#define X87_SW_TOP_SHIFT 11
-#define X87_SW_TOP_MASK 7
-#define X87_SW_C3 0x4000
-#define X87_SW_BUSY 0x8000
-
-#define X87_CW_IM 0x0001
-#define X87_CW_DM 0x0002
-#define X87_CW_ZM 0x0004
-#define X87_CW_OM 0x0008
-#define X87_CW_UM 0x0010
-#define X87_CW_PM 0x0020
-#define X87_CW_PC_SHIFT 8
-#define X87_CW_PC_MASK 3
-#define X87_CW_PC_SINGLE 0
-#define X87_CW_PC_DOUBLE 2
-#define X87_CW_PC_EXTEND 3
-#define X87_CW_RC_SHIFT 10
-#define X87_CW_RC_MASK 3
-#define X87_CW_RC_NEAREST 0
-#define X87_CW_RC_DOWN 1
-#define X87_CW_RC_UP 2
-#define X87_CW_RC_ZERO 3
-
-#define X87_TW_MASK 3
-#define X87_TW_VALID 0
-#define X87_TW_ZERO 1
-#define X87_TW_SPECIAL 2
-#define X87_TW_EMPTY 3
+#define X87_SW_IE 0x0001
+#define X87_SW_DE 0x0002
+#define X87_SW_ZE 0x0004
+#define X87_SW_OE 0x0008
+#define X87_SW_UE 0x0010
+#define X87_SW_PE 0x0020
+#define X87_SW_SF 0x0040
+#define X87_SW_ES 0x0080
+#define X87_SW_C0 0x0100
+#define X87_SW_C1 0x0200
+#define X87_SW_C2 0x0400
+#define X87_SW_TOP_SHIFT 11
+#define X87_SW_TOP_MASK 7
+#define X87_SW_C3 0x4000
+#define X87_SW_BUSY 0x8000
+
+#define X87_CW_IM 0x0001
+#define X87_CW_DM 0x0002
+#define X87_CW_ZM 0x0004
+#define X87_CW_OM 0x0008
+#define X87_CW_UM 0x0010
+#define X87_CW_PM 0x0020
+#define X87_CW_PC_SHIFT 8
+#define X87_CW_PC_MASK 3
+#define X87_CW_PC_SINGLE 0
+#define X87_CW_PC_DOUBLE 2
+#define X87_CW_PC_EXTEND 3
+#define X87_CW_RC_SHIFT 10
+#define X87_CW_RC_MASK 3
+#define X87_CW_RC_NEAREST 0
+#define X87_CW_RC_DOWN 1
+#define X87_CW_RC_UP 2
+#define X87_CW_RC_ZERO 3
+
+#define X87_TW_MASK 3
+#define X87_TW_VALID 0
+#define X87_TW_ZERO 1
+#define X87_TW_SPECIAL 2
+#define X87_TW_EMPTY 3
/*************************************
@@ -72,15 +72,15 @@
*
*************************************/
-#define ST_TO_PHYS(x) (((cpustate->x87_sw >> X87_SW_TOP_SHIFT) + (x)) & X87_SW_TOP_MASK)
-#define ST(x) (cpustate->x87_reg[ST_TO_PHYS(x)])
-#define X87_TW_FIELD_SHIFT(x) ((x) << 1)
-#define X87_TAG(x) ((cpustate->x87_tw >> X87_TW_FIELD_SHIFT(x)) & X87_TW_MASK)
-#define X87_RC ((cpustate->x87_cw >> X87_CW_RC_SHIFT) & X87_CW_RC_MASK)
-#define X87_IS_ST_EMPTY(x) (X87_TAG(ST_TO_PHYS(x)) == X87_TW_EMPTY)
-#define X87_SW_C3_0 X87_SW_C0
+#define ST_TO_PHYS(x) (((cpustate->x87_sw >> X87_SW_TOP_SHIFT) + (x)) & X87_SW_TOP_MASK)
+#define ST(x) (cpustate->x87_reg[ST_TO_PHYS(x)])
+#define X87_TW_FIELD_SHIFT(x) ((x) << 1)
+#define X87_TAG(x) ((cpustate->x87_tw >> X87_TW_FIELD_SHIFT(x)) & X87_TW_MASK)
+#define X87_RC ((cpustate->x87_cw >> X87_CW_RC_SHIFT) & X87_CW_RC_MASK)
+#define X87_IS_ST_EMPTY(x) (X87_TAG(ST_TO_PHYS(x)) == X87_TW_EMPTY)
+#define X87_SW_C3_0 X87_SW_C0
-#define UNIMPLEMENTED fatalerror("Unimplemented x87 op: %s (PC:%x)\n", __FUNCTION__, cpustate->pc)
+#define UNIMPLEMENTED fatalerror("Unimplemented x87 op: %s (PC:%x)\n", __FUNCTION__, cpustate->pc)
/*************************************
@@ -89,19 +89,19 @@
*
*************************************/
-static const floatx80 fx80_zero = { 0x0000, U64(0x0000000000000000) };
-static const floatx80 fx80_one = { 0x3fff, U64(0x8000000000000000) };
+static const floatx80 fx80_zero = { 0x0000, U64(0x0000000000000000) };
+static const floatx80 fx80_one = { 0x3fff, U64(0x8000000000000000) };
-static const floatx80 fx80_ninf = { 0xffff, U64(0x8000000000000000) };
-static const floatx80 fx80_inan = { 0xffff, U64(0xc000000000000000) };
+static const floatx80 fx80_ninf = { 0xffff, U64(0x8000000000000000) };
+static const floatx80 fx80_inan = { 0xffff, U64(0xc000000000000000) };
/* Maps x87 round modes to SoftFloat round modes */
static const int x87_to_sf_rc[4] =
{
- float_round_nearest_even,
- float_round_down,
- float_round_up,
- float_round_to_zero,
+ float_round_nearest_even,
+ float_round_down,
+ float_round_up,
+ float_round_to_zero,
};
@@ -2028,7 +2028,7 @@ void x87_fsqrt(i386_state *cpustate, UINT8 modrm)
floatx80 value = ST(0);
if ((!floatx80_is_zero(value) && (value.high & 0x8000)) ||
- floatx80_is_denormal(value))
+ floatx80_is_denormal(value))
{
cpustate->x87_sw |= X87_SW_IE;
result = fx80_inan;
@@ -4327,28 +4327,28 @@ void build_x87_opcode_table_d8(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fadd_m32real; break;
- case 0x01: ptr = x87_fmul_m32real; break;
- case 0x02: ptr = x87_fcom_m32real; break;
- case 0x03: ptr = x87_fcomp_m32real; break;
- case 0x04: ptr = x87_fsub_m32real; break;
- case 0x05: ptr = x87_fsubr_m32real; break;
- case 0x06: ptr = x87_fdiv_m32real; break;
- case 0x07: ptr = x87_fdivr_m32real; break;
+ case 0x00: ptr = x87_fadd_m32real; break;
+ case 0x01: ptr = x87_fmul_m32real; break;
+ case 0x02: ptr = x87_fcom_m32real; break;
+ case 0x03: ptr = x87_fcomp_m32real; break;
+ case 0x04: ptr = x87_fsub_m32real; break;
+ case 0x05: ptr = x87_fsubr_m32real; break;
+ case 0x06: ptr = x87_fdiv_m32real; break;
+ case 0x07: ptr = x87_fdivr_m32real; break;
}
}
else
{
switch (modrm)
{
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_fadd_st_sti; break;
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fmul_st_sti; break;
- case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7: ptr = x87_fcom_sti; break;
- case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf: ptr = x87_fcomp_sti; break;
- case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fsub_st_sti; break;
- case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fsubr_st_sti; break;
- case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: ptr = x87_fdiv_st_sti; break;
- case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: ptr = x87_fdivr_st_sti; break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_fadd_st_sti; break;
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fmul_st_sti; break;
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7: ptr = x87_fcom_sti; break;
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf: ptr = x87_fcomp_sti; break;
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fsub_st_sti; break;
+ case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fsubr_st_sti; break;
+ case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: ptr = x87_fdiv_st_sti; break;
+ case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: ptr = x87_fdivr_st_sti; break;
}
}
@@ -4369,13 +4369,13 @@ void build_x87_opcode_table_d9(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fld_m32real; break;
- case 0x02: ptr = x87_fst_m32real; break;
- case 0x03: ptr = x87_fstp_m32real; break;
- case 0x04: ptr = x87_fldenv; break;
- case 0x05: ptr = x87_fldcw; break;
- case 0x06: ptr = x87_fstenv; break;
- case 0x07: ptr = x87_fstcw; break;
+ case 0x00: ptr = x87_fld_m32real; break;
+ case 0x02: ptr = x87_fst_m32real; break;
+ case 0x03: ptr = x87_fstp_m32real; break;
+ case 0x04: ptr = x87_fldenv; break;
+ case 0x05: ptr = x87_fldcw; break;
+ case 0x06: ptr = x87_fstenv; break;
+ case 0x07: ptr = x87_fstcw; break;
}
}
else
@@ -4389,7 +4389,7 @@ void build_x87_opcode_table_d9(i386_state *cpustate)
case 0xc4:
case 0xc5:
case 0xc6:
- case 0xc7: ptr = x87_fld_sti; break;
+ case 0xc7: ptr = x87_fld_sti; break;
case 0xc8:
case 0xc9:
@@ -4398,36 +4398,36 @@ void build_x87_opcode_table_d9(i386_state *cpustate)
case 0xcc:
case 0xcd:
case 0xce:
- case 0xcf: ptr = x87_fxch_sti; break;
-
- case 0xd0: ptr = x87_fnop; break;
- case 0xe0: ptr = x87_fchs; break;
- case 0xe1: ptr = x87_fabs; break;
- case 0xe4: ptr = x87_ftst; break;
- case 0xe5: ptr = x87_fxam; break;
- case 0xe8: ptr = x87_fld1; break;
- case 0xe9: ptr = x87_fldl2t; break;
- case 0xea: ptr = x87_fldl2e; break;
- case 0xeb: ptr = x87_fldpi; break;
- case 0xec: ptr = x87_fldlg2; break;
- case 0xed: ptr = x87_fldln2; break;
- case 0xee: ptr = x87_fldz; break;
- case 0xf0: ptr = x87_f2xm1; break;
- case 0xf1: ptr = x87_fyl2x; break;
- case 0xf2: ptr = x87_fptan; break;
- case 0xf3: ptr = x87_fpatan; break;
- case 0xf4: ptr = x87_fxtract; break;
- case 0xf5: ptr = x87_fprem1; break;
- case 0xf6: ptr = x87_fdecstp; break;
- case 0xf7: ptr = x87_fincstp; break;
- case 0xf8: ptr = x87_fprem; break;
- case 0xf9: ptr = x87_fyl2xp1; break;
- case 0xfa: ptr = x87_fsqrt; break;
- case 0xfb: ptr = x87_fsincos; break;
- case 0xfc: ptr = x87_frndint; break;
- case 0xfd: ptr = x87_fscale; break;
- case 0xfe: ptr = x87_fsin; break;
- case 0xff: ptr = x87_fcos; break;
+ case 0xcf: ptr = x87_fxch_sti; break;
+
+ case 0xd0: ptr = x87_fnop; break;
+ case 0xe0: ptr = x87_fchs; break;
+ case 0xe1: ptr = x87_fabs; break;
+ case 0xe4: ptr = x87_ftst; break;
+ case 0xe5: ptr = x87_fxam; break;
+ case 0xe8: ptr = x87_fld1; break;
+ case 0xe9: ptr = x87_fldl2t; break;
+ case 0xea: ptr = x87_fldl2e; break;
+ case 0xeb: ptr = x87_fldpi; break;
+ case 0xec: ptr = x87_fldlg2; break;
+ case 0xed: ptr = x87_fldln2; break;
+ case 0xee: ptr = x87_fldz; break;
+ case 0xf0: ptr = x87_f2xm1; break;
+ case 0xf1: ptr = x87_fyl2x; break;
+ case 0xf2: ptr = x87_fptan; break;
+ case 0xf3: ptr = x87_fpatan; break;
+ case 0xf4: ptr = x87_fxtract; break;
+ case 0xf5: ptr = x87_fprem1; break;
+ case 0xf6: ptr = x87_fdecstp; break;
+ case 0xf7: ptr = x87_fincstp; break;
+ case 0xf8: ptr = x87_fprem; break;
+ case 0xf9: ptr = x87_fyl2xp1; break;
+ case 0xfa: ptr = x87_fsqrt; break;
+ case 0xfb: ptr = x87_fsincos; break;
+ case 0xfc: ptr = x87_frndint; break;
+ case 0xfd: ptr = x87_fscale; break;
+ case 0xfe: ptr = x87_fsin; break;
+ case 0xff: ptr = x87_fcos; break;
}
}
@@ -4447,21 +4447,21 @@ void build_x87_opcode_table_da(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fiadd_m32int; break;
- case 0x01: ptr = x87_fimul_m32int; break;
- case 0x02: ptr = x87_ficom_m32int; break;
- case 0x03: ptr = x87_ficomp_m32int; break;
- case 0x04: ptr = x87_fisub_m32int; break;
- case 0x05: ptr = x87_fisubr_m32int; break;
- case 0x06: ptr = x87_fidiv_m32int; break;
- case 0x07: ptr = x87_fidivr_m32int; break;
+ case 0x00: ptr = x87_fiadd_m32int; break;
+ case 0x01: ptr = x87_fimul_m32int; break;
+ case 0x02: ptr = x87_ficom_m32int; break;
+ case 0x03: ptr = x87_ficomp_m32int; break;
+ case 0x04: ptr = x87_fisub_m32int; break;
+ case 0x05: ptr = x87_fisubr_m32int; break;
+ case 0x06: ptr = x87_fidiv_m32int; break;
+ case 0x07: ptr = x87_fidivr_m32int; break;
}
}
else
{
switch (modrm)
{
- case 0xe9: ptr = x87_fucompp; break;
+ case 0xe9: ptr = x87_fucompp; break;
}
}
@@ -4482,22 +4482,22 @@ void build_x87_opcode_table_db(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fild_m32int; break;
- case 0x02: ptr = x87_fist_m32int; break;
- case 0x03: ptr = x87_fistp_m32int; break;
- case 0x05: ptr = x87_fld_m80real; break;
- case 0x07: ptr = x87_fstp_m80real; break;
+ case 0x00: ptr = x87_fild_m32int; break;
+ case 0x02: ptr = x87_fist_m32int; break;
+ case 0x03: ptr = x87_fistp_m32int; break;
+ case 0x05: ptr = x87_fld_m80real; break;
+ case 0x07: ptr = x87_fstp_m80real; break;
}
}
else
{
switch (modrm)
{
- case 0xe0: ptr = x87_fnop; break; /* FENI */
- case 0xe1: ptr = x87_fnop; break; /* FDISI */
- case 0xe2: ptr = x87_fclex; break;
- case 0xe3: ptr = x87_finit; break;
- case 0xe4: ptr = x87_fnop; break; /* FSETPM */
+ case 0xe0: ptr = x87_fnop; break; /* FENI */
+ case 0xe1: ptr = x87_fnop; break; /* FDISI */
+ case 0xe2: ptr = x87_fclex; break;
+ case 0xe3: ptr = x87_finit; break;
+ case 0xe4: ptr = x87_fnop; break; /* FSETPM */
}
}
@@ -4518,26 +4518,26 @@ void build_x87_opcode_table_dc(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fadd_m64real; break;
- case 0x01: ptr = x87_fmul_m64real; break;
- case 0x02: ptr = x87_fcom_m64real; break;
- case 0x03: ptr = x87_fcomp_m64real; break;
- case 0x04: ptr = x87_fsub_m64real; break;
- case 0x05: ptr = x87_fsubr_m64real; break;
- case 0x06: ptr = x87_fdiv_m64real; break;
- case 0x07: ptr = x87_fdivr_m64real; break;
+ case 0x00: ptr = x87_fadd_m64real; break;
+ case 0x01: ptr = x87_fmul_m64real; break;
+ case 0x02: ptr = x87_fcom_m64real; break;
+ case 0x03: ptr = x87_fcomp_m64real; break;
+ case 0x04: ptr = x87_fsub_m64real; break;
+ case 0x05: ptr = x87_fsubr_m64real; break;
+ case 0x06: ptr = x87_fdiv_m64real; break;
+ case 0x07: ptr = x87_fdivr_m64real; break;
}
}
else
{
switch (modrm)
{
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_fadd_sti_st; break;
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fmul_sti_st; break;
- case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fsubr_sti_st; break;
- case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fsub_sti_st; break;
- case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: ptr = x87_fdivr_sti_st; break;
- case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: ptr = x87_fdiv_sti_st; break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_fadd_sti_st; break;
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fmul_sti_st; break;
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fsubr_sti_st; break;
+ case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fsub_sti_st; break;
+ case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: ptr = x87_fdivr_sti_st; break;
+ case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: ptr = x87_fdiv_sti_st; break;
}
}
@@ -4558,24 +4558,24 @@ void build_x87_opcode_table_dd(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fld_m64real; break;
- case 0x02: ptr = x87_fst_m64real; break;
- case 0x03: ptr = x87_fstp_m64real; break;
- case 0x04: ptr = x87_frstor; break;
- case 0x06: ptr = x87_fsave; break;
- case 0x07: ptr = x87_fstsw_m2byte; break;
+ case 0x00: ptr = x87_fld_m64real; break;
+ case 0x02: ptr = x87_fst_m64real; break;
+ case 0x03: ptr = x87_fstp_m64real; break;
+ case 0x04: ptr = x87_frstor; break;
+ case 0x06: ptr = x87_fsave; break;
+ case 0x07: ptr = x87_fstsw_m2byte; break;
}
}
else
{
switch (modrm)
{
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_ffree; break;
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fxch_sti; break;
- case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7: ptr = x87_fst_sti; break;
- case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf: ptr = x87_fstp_sti; break;
- case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fucom_sti; break;
- case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fucomp_sti; break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_ffree; break;
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fxch_sti; break;
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7: ptr = x87_fst_sti; break;
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf: ptr = x87_fstp_sti; break;
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fucom_sti; break;
+ case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fucomp_sti; break;
}
}
@@ -4596,27 +4596,27 @@ void build_x87_opcode_table_de(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fiadd_m16int; break;
- case 0x01: ptr = x87_fimul_m16int; break;
- case 0x02: ptr = x87_ficom_m16int; break;
- case 0x03: ptr = x87_ficomp_m16int; break;
- case 0x04: ptr = x87_fisub_m16int; break;
- case 0x05: ptr = x87_fisubr_m16int; break;
- case 0x06: ptr = x87_fidiv_m16int; break;
- case 0x07: ptr = x87_fidivr_m16int; break;
+ case 0x00: ptr = x87_fiadd_m16int; break;
+ case 0x01: ptr = x87_fimul_m16int; break;
+ case 0x02: ptr = x87_ficom_m16int; break;
+ case 0x03: ptr = x87_ficomp_m16int; break;
+ case 0x04: ptr = x87_fisub_m16int; break;
+ case 0x05: ptr = x87_fisubr_m16int; break;
+ case 0x06: ptr = x87_fidiv_m16int; break;
+ case 0x07: ptr = x87_fidivr_m16int; break;
}
}
else
{
switch (modrm)
{
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_faddp; break;
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fmulp; break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: ptr = x87_faddp; break;
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: ptr = x87_fmulp; break;
case 0xd9: ptr = x87_fcompp; break;
- case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fsubrp; break;
- case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fsubp; break;
- case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: ptr = x87_fdivrp; break;
- case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: ptr = x87_fdivp; break;
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7: ptr = x87_fsubrp; break;
+ case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef: ptr = x87_fsubp; break;
+ case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7: ptr = x87_fdivrp; break;
+ case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe: case 0xff: ptr = x87_fdivp; break;
}
}
@@ -4637,20 +4637,20 @@ void build_x87_opcode_table_df(i386_state *cpustate)
{
switch ((modrm >> 3) & 0x7)
{
- case 0x00: ptr = x87_fild_m16int; break;
- case 0x02: ptr = x87_fist_m16int; break;
- case 0x03: ptr = x87_fistp_m16int; break;
- case 0x04: ptr = x87_fbld; break;
- case 0x05: ptr = x87_fild_m64int; break;
- case 0x06: ptr = x87_fbstp; break;
- case 0x07: ptr = x87_fistp_m64int; break;
+ case 0x00: ptr = x87_fild_m16int; break;
+ case 0x02: ptr = x87_fist_m16int; break;
+ case 0x03: ptr = x87_fistp_m16int; break;
+ case 0x04: ptr = x87_fbld; break;
+ case 0x05: ptr = x87_fild_m64int; break;
+ case 0x06: ptr = x87_fbstp; break;
+ case 0x07: ptr = x87_fistp_m64int; break;
}
}
else
{
switch (modrm)
{
- case 0xe0: ptr = x87_fstsw_ax; break;
+ case 0xe0: ptr = x87_fstsw_ax; break;
}
}
@@ -4669,4 +4669,3 @@ void build_x87_opcode_table(i386_state *cpustate)
build_x87_opcode_table_de(cpustate);
build_x87_opcode_table_df(cpustate);
}
-
diff --git a/src/emu/cpu/i4004/4004dasm.c b/src/emu/cpu/i4004/4004dasm.c
index bf94e274e92..82675df7186 100644
--- a/src/emu/cpu/i4004/4004dasm.c
+++ b/src/emu/cpu/i4004/4004dasm.c
@@ -21,13 +21,13 @@ CPU_DISASSEMBLE( i4004 )
UINT16 page = PC & 0x0f00;
switch (op = OP(pc++))
{
- case 0x00: sprintf (buffer,"nop"); break;
- case 0x11: sprintf (buffer,"jnt $%03x",page | ARG(pc)); pc++; break;
- case 0x12: sprintf (buffer,"jc $%03x",page | ARG(pc)); pc++; break;
- case 0x14: sprintf (buffer,"jz $%03x",page | ARG(pc)); pc++; break;
- case 0x19: sprintf (buffer,"jt $%03x",page | ARG(pc)); pc++; break;
- case 0x1a: sprintf (buffer,"jnc $%03x",page | ARG(pc)); pc++; break;
- case 0x1c: sprintf (buffer,"jnz $%03x",page | ARG(pc)); pc++; break;
+ case 0x00: sprintf (buffer,"nop"); break;
+ case 0x11: sprintf (buffer,"jnt $%03x",page | ARG(pc)); pc++; break;
+ case 0x12: sprintf (buffer,"jc $%03x",page | ARG(pc)); pc++; break;
+ case 0x14: sprintf (buffer,"jz $%03x",page | ARG(pc)); pc++; break;
+ case 0x19: sprintf (buffer,"jt $%03x",page | ARG(pc)); pc++; break;
+ case 0x1a: sprintf (buffer,"jnc $%03x",page | ARG(pc)); pc++; break;
+ case 0x1c: sprintf (buffer,"jnz $%03x",page | ARG(pc)); pc++; break;
case 0x10: case 0x13: case 0x15: case 0x16:
case 0x17: case 0x18: case 0x1b: case 0x1d:
case 0x1e: case 0x1f:
@@ -95,37 +95,37 @@ CPU_DISASSEMBLE( i4004 )
case 0xdc: case 0xdd: case 0xde: case 0xdf:
sprintf (buffer,"ldm $%01x",op & 0x0f); break;
- case 0xe0: sprintf (buffer,"wrm"); break;
- case 0xe1: sprintf (buffer,"wmp"); break;
- case 0xe2: sprintf (buffer,"wrr"); break;
- case 0xe3: sprintf (buffer,"wpm"); break;
- case 0xe4: sprintf (buffer,"wr0"); break;
- case 0xe5: sprintf (buffer,"wr1"); break;
- case 0xe6: sprintf (buffer,"wr2"); break;
- case 0xe7: sprintf (buffer,"wr3"); break;
- case 0xe8: sprintf (buffer,"sbm"); break;
- case 0xe9: sprintf (buffer,"rdm"); break;
- case 0xea: sprintf (buffer,"rdr"); break;
- case 0xeb: sprintf (buffer,"adm"); break;
- case 0xec: sprintf (buffer,"rd0"); break;
- case 0xed: sprintf (buffer,"rd1"); break;
- case 0xee: sprintf (buffer,"rd2"); break;
- case 0xef: sprintf (buffer,"rd3"); break;
+ case 0xe0: sprintf (buffer,"wrm"); break;
+ case 0xe1: sprintf (buffer,"wmp"); break;
+ case 0xe2: sprintf (buffer,"wrr"); break;
+ case 0xe3: sprintf (buffer,"wpm"); break;
+ case 0xe4: sprintf (buffer,"wr0"); break;
+ case 0xe5: sprintf (buffer,"wr1"); break;
+ case 0xe6: sprintf (buffer,"wr2"); break;
+ case 0xe7: sprintf (buffer,"wr3"); break;
+ case 0xe8: sprintf (buffer,"sbm"); break;
+ case 0xe9: sprintf (buffer,"rdm"); break;
+ case 0xea: sprintf (buffer,"rdr"); break;
+ case 0xeb: sprintf (buffer,"adm"); break;
+ case 0xec: sprintf (buffer,"rd0"); break;
+ case 0xed: sprintf (buffer,"rd1"); break;
+ case 0xee: sprintf (buffer,"rd2"); break;
+ case 0xef: sprintf (buffer,"rd3"); break;
- case 0xf0: sprintf (buffer,"clb"); break;
- case 0xf1: sprintf (buffer,"clc"); break;
- case 0xf2: sprintf (buffer,"iac"); break;
- case 0xf3: sprintf (buffer,"cmc"); break;
- case 0xf4: sprintf (buffer,"cma"); break;
- case 0xf5: sprintf (buffer,"ral"); break;
- case 0xf6: sprintf (buffer,"rar"); break;
- case 0xf7: sprintf (buffer,"tcc"); break;
- case 0xf8: sprintf (buffer,"dac"); break;
- case 0xf9: sprintf (buffer,"tcs"); break;
- case 0xfa: sprintf (buffer,"stc"); break;
- case 0xfb: sprintf (buffer,"daa"); break;
- case 0xfc: sprintf (buffer,"kbp"); break;
- case 0xfd: sprintf (buffer,"dcl"); break;
+ case 0xf0: sprintf (buffer,"clb"); break;
+ case 0xf1: sprintf (buffer,"clc"); break;
+ case 0xf2: sprintf (buffer,"iac"); break;
+ case 0xf3: sprintf (buffer,"cmc"); break;
+ case 0xf4: sprintf (buffer,"cma"); break;
+ case 0xf5: sprintf (buffer,"ral"); break;
+ case 0xf6: sprintf (buffer,"rar"); break;
+ case 0xf7: sprintf (buffer,"tcc"); break;
+ case 0xf8: sprintf (buffer,"dac"); break;
+ case 0xf9: sprintf (buffer,"tcs"); break;
+ case 0xfa: sprintf (buffer,"stc"); break;
+ case 0xfb: sprintf (buffer,"daa"); break;
+ case 0xfc: sprintf (buffer,"kbp"); break;
+ case 0xfd: sprintf (buffer,"dcl"); break;
default : sprintf (buffer,"illegal"); break;
}
diff --git a/src/emu/cpu/i4004/i4004.c b/src/emu/cpu/i4004/i4004.c
index 424212714a9..0d0a74ffbb8 100644
--- a/src/emu/cpu/i4004/i4004.c
+++ b/src/emu/cpu/i4004/i4004.c
@@ -23,29 +23,29 @@ static const UINT8 kbp_table[] = { 0x00,0x01,0x02,0x0f,0x03,0x0f,0x0f,0x0f,0x04,
struct i4004_state
{
- UINT8 A; // Accumulator
- UINT8 R[8];
- PAIR ADDR[4]; // Address registers
- PAIR RAM;
- UINT8 C; // Carry flag
- UINT8 TEST; // Test PIN status
- PAIR PC; // It is in fact one of ADDR regs
- UINT8 flags; // used for I/O only
+ UINT8 A; // Accumulator
+ UINT8 R[8];
+ PAIR ADDR[4]; // Address registers
+ PAIR RAM;
+ UINT8 C; // Carry flag
+ UINT8 TEST; // Test PIN status
+ PAIR PC; // It is in fact one of ADDR regs
+ UINT8 flags; // used for I/O only
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *data;
address_space *io;
- int icount;
- int pc_pos; // PC possition in ADDR
- int addr_mask;
+ int icount;
+ int pc_pos; // PC possition in ADDR
+ int addr_mask;
};
/***************************************************************************
MACROS
***************************************************************************/
-#define GET_PC (cpustate->ADDR[cpustate->pc_pos])
+#define GET_PC (cpustate->ADDR[cpustate->pc_pos])
/***************************************************************************
INLINE FUNCTIONS
@@ -165,7 +165,7 @@ static void execute_one(i4004_state *cpustate, int opcode)
cpustate->icount -= 8;
switch (opcode)
{
- case 0x00: /* NOP */
+ case 0x00: /* NOP */
/* no op */
break;
case 0x10: case 0x11: case 0x12: case 0x13:
@@ -288,9 +288,9 @@ static void execute_one(i4004_state *cpustate, int opcode)
case 0xc4: case 0xc5: case 0xc6: case 0xc7:
case 0xc8: case 0xc9: case 0xca: case 0xcb:
case 0xcc: case 0xcd: case 0xce: case 0xcf: /* BBL */
- POP_STACK(cpustate);
- cpustate->A = opcode & 0x0f;
- cpustate->PC = GET_PC;
+ POP_STACK(cpustate);
+ cpustate->A = opcode & 0x0f;
+ cpustate->PC = GET_PC;
break;
case 0xd0: case 0xd1: case 0xd2: case 0xd3:
case 0xd4: case 0xd5: case 0xd6: case 0xd7:
@@ -535,8 +535,8 @@ static CPU_EXPORT_STATE( i4004 )
{
case STATE_GENFLAGS:
cpustate->flags = ((cpustate->A == 0) ? 0x04 : 0x00) |
- (cpustate->C ? 0x02 : 0x00) |
- (cpustate->TEST ? 0x01 : 0x00);
+ (cpustate->C ? 0x02 : 0x00) |
+ (cpustate->TEST ? 0x01 : 0x00);
break;
}
}
@@ -573,50 +573,50 @@ CPU_GET_INFO( i4004 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i4004_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 8; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break; // Only lower 4 bits used
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 6; break; // 4 I/O for each ROM chip and 4 OUT for each RAM
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break; // There could be 4 chips in 16 banks for RAM
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i4004_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 8; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break; // Only lower 4 bits used
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 6; break; // 4 I/O for each ROM chip and 4 OUT for each RAM
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break; // There could be 4 chips in 16 banks for RAM
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i4004); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i4004); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i4004); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i4004); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i4004); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(i4004); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(i4004); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(i4004); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i4004); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i4004); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i4004); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i4004); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i4004); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(i4004); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(i4004); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(i4004); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "4004"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 4004"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "4004"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 4004"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
- case CPUINFO_IS_OCTAL: info->i = true; break;
+ case CPUINFO_IS_OCTAL: info->i = true; break;
}
}
diff --git a/src/emu/cpu/i8008/8008dasm.c b/src/emu/cpu/i8008/8008dasm.c
index 221ac3c3230..f14f4b7829d 100644
--- a/src/emu/cpu/i8008/8008dasm.c
+++ b/src/emu/cpu/i8008/8008dasm.c
@@ -23,17 +23,17 @@ CPU_DISASSEMBLE( i8008 )
UINT8 op = OP(pc++);
switch (op >> 6)
{
- case 0x03: // starting with 11
+ case 0x03: // starting with 11
if (op==0xff) {
sprintf (buffer,"hlt");
} else {
sprintf (buffer,"l%c%c",reg[(op >> 3) & 7],reg[op & 7]);
}
break;
- case 0x00: // starting with 00
+ case 0x00: // starting with 00
switch(op & 7) {
- case 0 : if(((op >> 3) & 7)==0) {
- sprintf (buffer,"hlt");
+ case 0 : if(((op >> 3) & 7)==0) {
+ sprintf (buffer,"hlt");
} else {
if(((op >> 3) & 7)==7) {
sprintf (buffer,"illegal");
@@ -42,8 +42,8 @@ CPU_DISASSEMBLE( i8008 )
}
}
break;
- case 1 : if(((op >> 3) & 7)==0) {
- sprintf (buffer,"hlt");
+ case 1 : if(((op >> 3) & 7)==0) {
+ sprintf (buffer,"hlt");
} else {
if(((op >> 3) & 7)==7) {
sprintf (buffer,"illegal");
@@ -52,45 +52,45 @@ CPU_DISASSEMBLE( i8008 )
}
}
break;
- case 2 : {
+ case 2 : {
switch((op >> 3) & 7) {
- case 0 : sprintf (buffer,"rlc"); break;
- case 1 : sprintf (buffer,"rrc"); break;
- case 2 : sprintf (buffer,"ral"); break;
- case 3 : sprintf (buffer,"rar"); break;
- default : sprintf (buffer,"illegal"); break;
+ case 0 : sprintf (buffer,"rlc"); break;
+ case 1 : sprintf (buffer,"rrc"); break;
+ case 2 : sprintf (buffer,"ral"); break;
+ case 3 : sprintf (buffer,"rar"); break;
+ default : sprintf (buffer,"illegal"); break;
}
}
break;
- case 3 : sprintf (buffer,"r%c%c",(BIT(op,5) ? 't' : 'f'),flag_names[(op>>3)&3]); break;
- case 4 : {
+ case 3 : sprintf (buffer,"r%c%c",(BIT(op,5) ? 't' : 'f'),flag_names[(op>>3)&3]); break;
+ case 4 : {
switch((op >> 3) & 7) {
- case 0 : sprintf (buffer,"adi %02x",ARG(pc)); pc++; break;
- case 1 : sprintf (buffer,"aci %02x",ARG(pc)); pc++; break;
- case 2 : sprintf (buffer,"sui %02x",ARG(pc)); pc++; break;
- case 3 : sprintf (buffer,"sbi %02x",ARG(pc)); pc++; break;
- case 4 : sprintf (buffer,"ndi %02x",ARG(pc)); pc++; break;
- case 5 : sprintf (buffer,"xri %02x",ARG(pc)); pc++; break;
- case 6 : sprintf (buffer,"ori %02x",ARG(pc)); pc++; break;
- case 7 : sprintf (buffer,"cpi %02x",ARG(pc)); pc++; break;
+ case 0 : sprintf (buffer,"adi %02x",ARG(pc)); pc++; break;
+ case 1 : sprintf (buffer,"aci %02x",ARG(pc)); pc++; break;
+ case 2 : sprintf (buffer,"sui %02x",ARG(pc)); pc++; break;
+ case 3 : sprintf (buffer,"sbi %02x",ARG(pc)); pc++; break;
+ case 4 : sprintf (buffer,"ndi %02x",ARG(pc)); pc++; break;
+ case 5 : sprintf (buffer,"xri %02x",ARG(pc)); pc++; break;
+ case 6 : sprintf (buffer,"ori %02x",ARG(pc)); pc++; break;
+ case 7 : sprintf (buffer,"cpi %02x",ARG(pc)); pc++; break;
}
}
break;
- case 5 : sprintf (buffer,"rst %02x",(op>>3) & 7); break;
- case 6 : sprintf (buffer,"l%ci %02x",reg[(op >> 3) & 7],ARG(pc)); pc++; break;
- case 7 : sprintf (buffer,"ret"); break;
+ case 5 : sprintf (buffer,"rst %02x",(op>>3) & 7); break;
+ case 6 : sprintf (buffer,"l%ci %02x",reg[(op >> 3) & 7],ARG(pc)); pc++; break;
+ case 7 : sprintf (buffer,"ret"); break;
}
break;
- case 0x01: // starting with 01
+ case 0x01: // starting with 01
switch(op & 7) {
- case 0 : sprintf (buffer,"j%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
- case 2 : sprintf (buffer,"c%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
- case 4 : sprintf (buffer,"jmp %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
- case 6 : sprintf (buffer,"cal %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
+ case 0 : sprintf (buffer,"j%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
+ case 2 : sprintf (buffer,"c%c%c %02x%02x",(BIT(op,5)? 't' : 'f'),flag_names[(op>>3)&3], ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
+ case 4 : sprintf (buffer,"jmp %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
+ case 6 : sprintf (buffer,"cal %02x%02x",ARG(pc+1) & 0x3f,ARG(pc)); pc+=2; break;
case 1 :
case 3 :
case 5 :
- case 7 : if (((op>>4)&3)==0) {
+ case 7 : if (((op>>4)&3)==0) {
sprintf (buffer,"inp %02x",(op >> 1) & 0x07);
} else {
sprintf (buffer,"out %02x",(op >> 1) & 0x1f);
@@ -98,16 +98,16 @@ CPU_DISASSEMBLE( i8008 )
break;
}
break;
- case 0x02: // starting with 10
+ case 0x02: // starting with 10
switch((op >> 3) & 7) {
- case 0 : sprintf (buffer,"ad%c",reg[op & 7]); break;
- case 1 : sprintf (buffer,"ac%c",reg[op & 7]); break;
- case 2 : sprintf (buffer,"su%c",reg[op & 7]); break;
- case 3 : sprintf (buffer,"sb%c",reg[op & 7]); break;
- case 4 : sprintf (buffer,"nd%c",reg[op & 7]); break;
- case 5 : sprintf (buffer,"xr%c",reg[op & 7]); break;
- case 6 : sprintf (buffer,"or%c",reg[op & 7]); break;
- case 7 : sprintf (buffer,"cp%c",reg[op & 7]); break;
+ case 0 : sprintf (buffer,"ad%c",reg[op & 7]); break;
+ case 1 : sprintf (buffer,"ac%c",reg[op & 7]); break;
+ case 2 : sprintf (buffer,"su%c",reg[op & 7]); break;
+ case 3 : sprintf (buffer,"sb%c",reg[op & 7]); break;
+ case 4 : sprintf (buffer,"nd%c",reg[op & 7]); break;
+ case 5 : sprintf (buffer,"xr%c",reg[op & 7]); break;
+ case 6 : sprintf (buffer,"or%c",reg[op & 7]); break;
+ case 7 : sprintf (buffer,"cp%c",reg[op & 7]); break;
}
break;
}
diff --git a/src/emu/cpu/i8008/i8008.c b/src/emu/cpu/i8008/i8008.c
index 63f4103fe3f..68aa6c58279 100644
--- a/src/emu/cpu/i8008/i8008.c
+++ b/src/emu/cpu/i8008/i8008.c
@@ -15,9 +15,9 @@
// MACROS
//**************************************************************************
-#define REG_1 ((opcode >> 3) & 7)
-#define REG_2 (opcode & 7)
-#define GET_PC (m_ADDR[m_pc_pos])
+#define REG_1 ((opcode >> 3) & 7)
+#define REG_2 (opcode & 7)
+#define GET_PC (m_ADDR[m_pc_pos])
//**************************************************************************
// GLOBAL VARIABLES
@@ -35,10 +35,10 @@ const device_type I8008 = &device_creator<i8008_device>;
//-------------------------------------------------
i8008_device::i8008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, I8008, "i8008", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 8, 14),
- m_io_config("io", ENDIANNESS_LITTLE, 8, 8),
- m_program(0),
- m_direct(0)
+ m_program_config("program", ENDIANNESS_LITTLE, 8, 14),
+ m_io_config("io", ENDIANNESS_LITTLE, 8, 8),
+ m_program(0),
+ m_direct(0)
{
// set our instruction counter
m_icountptr = &m_icount;
@@ -141,7 +141,7 @@ void i8008_device::device_reset()
const address_space_config *i8008_device::memory_space_config(address_spacenum spacenum) const
{
- return (spacenum == AS_PROGRAM) ? &m_program_config :
+ return (spacenum == AS_PROGRAM) ? &m_program_config :
(spacenum == AS_IO) ? &m_io_config :
NULL;
}
@@ -175,9 +175,9 @@ void i8008_device::state_export(const device_state_entry &entry)
{
case STATE_GENFLAGS:
m_flags = (m_CF ? 0x08 : 0x00) |
- (m_ZF ? 0x04 : 0x00) |
- (m_SF ? 0x02 : 0x00) |
- (m_PF ? 0x01 : 0x00);
+ (m_ZF ? 0x04 : 0x00) |
+ (m_SF ? 0x02 : 0x00) |
+ (m_PF ? 0x01 : 0x00);
break;
}
}
@@ -306,7 +306,7 @@ inline void i8008_device::execute_one(int opcode)
switch (opcode >> 6)
{
- case 0x03: // starting with 11
+ case 0x03: // starting with 11
if (opcode==0xff) {
// HLT
m_icount -= 4;
@@ -321,10 +321,10 @@ inline void i8008_device::execute_one(int opcode)
set_reg(REG_1, get_reg(REG_2));
}
break;
- case 0x00: // starting with 00
+ case 0x00: // starting with 00
switch(opcode & 7) {
- case 0 : if(((opcode >> 3) & 7)==0) {
- // HLT
+ case 0 : if(((opcode >> 3) & 7)==0) {
+ // HLT
m_icount -= 4;
GET_PC.w.l = GET_PC.w.l - 1;
m_PC = GET_PC;
@@ -343,8 +343,8 @@ inline void i8008_device::execute_one(int opcode)
}
}
break;
- case 1 : if(((opcode >> 3) & 7)==0) {
- // HLT
+ case 1 : if(((opcode >> 3) & 7)==0) {
+ // HLT
m_icount -= 4;
GET_PC.w.l = GET_PC.w.l - 1;
m_PC = GET_PC;
@@ -363,7 +363,7 @@ inline void i8008_device::execute_one(int opcode)
}
}
break;
- case 2 : {
+ case 2 : {
// All instuction from this group have same timing
m_icount -= 5;
switch((opcode >> 3) & 7) {
@@ -409,7 +409,7 @@ inline void i8008_device::execute_one(int opcode)
}
}
break;
- case 4 : {
+ case 4 : {
m_icount -= 8;
switch((opcode >> 3) & 7) {
case 0 :
@@ -470,18 +470,18 @@ inline void i8008_device::execute_one(int opcode)
}
}
break;
- case 5 : // RST
+ case 5 : // RST
m_icount -= 5;
push_stack();
GET_PC.w.l = opcode & 0x38;
m_PC = GET_PC;
break;
- case 6 : // LrI
+ case 6 : // LrI
m_icount -= 8;
if (REG_1==7) m_icount -= 1; // LMI
set_reg(REG_1, arg());
break;
- case 7 : // RET
+ case 7 : // RET
m_icount -= 5;
pop_stack();
m_PC = GET_PC;
@@ -489,7 +489,7 @@ inline void i8008_device::execute_one(int opcode)
}
break;
- case 0x01: // starting with 01
+ case 0x01: // starting with 01
switch(opcode & 7) {
case 0 :
// Jcc
@@ -539,7 +539,7 @@ inline void i8008_device::execute_one(int opcode)
break;
}
break;
- case 0x02: // starting with 10
+ case 0x02: // starting with 10
m_icount -= 5;
if ((opcode & 7)==7) m_icount -= 3; // operations with memory
switch((opcode >> 3) & 7) {
diff --git a/src/emu/cpu/i8008/i8008.h b/src/emu/cpu/i8008/i8008.h
index eb662d69f83..4c19faab93e 100644
--- a/src/emu/cpu/i8008/i8008.h
+++ b/src/emu/cpu/i8008/i8008.h
@@ -69,24 +69,24 @@ protected:
void take_interrupt();
void init_tables(void);
- int m_pc_pos; // PC possition in ADDR
- int m_icount;
+ int m_pc_pos; // PC possition in ADDR
+ int m_icount;
// configuration
- const address_space_config m_program_config;
- const address_space_config m_io_config;
-
- UINT8 m_A,m_B,m_C,m_D,m_E,m_H,m_L;
- PAIR m_PC; // It is in fact one of ADDR regs
- PAIR m_ADDR[8]; // Address registers
- UINT8 m_CF; // Carry flag
- UINT8 m_ZF; // Zero flag
- UINT8 m_SF; // Sign flag
- UINT8 m_PF; // Parity flag
- UINT8 m_HALT;
- UINT8 m_flags; // temporary I/O only
-
- UINT8 m_irq_state;
+ const address_space_config m_program_config;
+ const address_space_config m_io_config;
+
+ UINT8 m_A,m_B,m_C,m_D,m_E,m_H,m_L;
+ PAIR m_PC; // It is in fact one of ADDR regs
+ PAIR m_ADDR[8]; // Address registers
+ UINT8 m_CF; // Carry flag
+ UINT8 m_ZF; // Zero flag
+ UINT8 m_SF; // Sign flag
+ UINT8 m_PF; // Parity flag
+ UINT8 m_HALT;
+ UINT8 m_flags; // temporary I/O only
+
+ UINT8 m_irq_state;
UINT8 m_PARITY[256];
diff --git a/src/emu/cpu/i8085/8085dasm.c b/src/emu/cpu/i8085/8085dasm.c
index 5ce3d81dc58..9f84643415f 100644
--- a/src/emu/cpu/i8085/8085dasm.c
+++ b/src/emu/cpu/i8085/8085dasm.c
@@ -578,4 +578,3 @@ CPU_DISASSEMBLE( i8085 )
}
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/i8085/i8085.c b/src/emu/cpu/i8085/i8085.c
index 404fca5db01..0ae95b15bcb 100644
--- a/src/emu/cpu/i8085/i8085.c
+++ b/src/emu/cpu/i8085/i8085.c
@@ -145,8 +145,8 @@
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define CPUTYPE_8080 0
-#define CPUTYPE_8085 1
+#define CPUTYPE_8080 0
+#define CPUTYPE_8085 1
@@ -156,34 +156,34 @@
struct i8085_state
{
- i8085_config config;
+ i8085_config config;
- devcb_resolved_write8 out_status_func;
- devcb_resolved_write_line out_inte_func;
- devcb_resolved_read_line in_sid_func;
- devcb_resolved_write_line out_sod_func;
+ devcb_resolved_write8 out_status_func;
+ devcb_resolved_write_line out_inte_func;
+ devcb_resolved_read_line in_sid_func;
+ devcb_resolved_write_line out_sod_func;
- int cputype; /* 0 8080, 1 8085A */
- PAIR PC,SP,AF,BC,DE,HL,WZ;
- UINT8 HALT;
- UINT8 IM; /* interrupt mask (8085A only) */
- UINT8 STATUS; /* status word */
+ int cputype; /* 0 8080, 1 8085A */
+ PAIR PC,SP,AF,BC,DE,HL,WZ;
+ UINT8 HALT;
+ UINT8 IM; /* interrupt mask (8085A only) */
+ UINT8 STATUS; /* status word */
- UINT8 after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
- UINT8 nmi_state; /* raw NMI line state */
- UINT8 irq_state[4]; /* raw IRQ line states */
- UINT8 trap_pending; /* TRAP interrupt latched? */
- UINT8 trap_im_copy; /* copy of IM register when TRAP was taken */
- UINT8 sod_state; /* state of the SOD line */
+ UINT8 after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
+ UINT8 nmi_state; /* raw NMI line state */
+ UINT8 irq_state[4]; /* raw IRQ line states */
+ UINT8 trap_pending; /* TRAP interrupt latched? */
+ UINT8 trap_im_copy; /* copy of IM register when TRAP was taken */
+ UINT8 sod_state; /* state of the SOD line */
- UINT8 ietemp; /* import/export temp space */
+ UINT8 ietemp; /* import/export temp space */
- device_irq_acknowledge_callback irq_callback;
+ device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *io;
- int icount;
+ int icount;
};
@@ -192,8 +192,8 @@ struct i8085_state
MACROS
***************************************************************************/
-#define IS_8080(c) ((c)->cputype == CPUTYPE_8080)
-#define IS_8085(c) ((c)->cputype == CPUTYPE_8085)
+#define IS_8080(c) ((c)->cputype == CPUTYPE_8080)
+#define IS_8085(c) ((c)->cputype == CPUTYPE_8085)
@@ -273,8 +273,8 @@ INLINE i8085_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8080 ||
- device->type() == I8080A||
- device->type() == I8085A);
+ device->type() == I8080A||
+ device->type() == I8085A);
return (i8085_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -341,10 +341,10 @@ INLINE void break_halt_for_interrupt(i8085_state *cpustate)
{
cpustate->PC.w.l++;
cpustate->HALT = 0;
- set_status(cpustate, 0x26); /* int ack while halt */
+ set_status(cpustate, 0x26); /* int ack while halt */
}
else
- set_status(cpustate, 0x23); /* int ack */
+ set_status(cpustate, 0x23); /* int ack */
}
@@ -388,7 +388,7 @@ static void check_for_interrupts(i8085_state *cpustate)
if (cpustate->trap_pending)
{
/* the first RIM after a TRAP reflects the original IE state; remember it here,
- setting the high bit to indicate it is valid */
+ setting the high bit to indicate it is valid */
cpustate->trap_im_copy = cpustate->IM | 0x80;
/* reset the pending state */
@@ -468,10 +468,10 @@ static void check_for_interrupts(i8085_state *cpustate)
set_inte(cpustate, 0);
switch (vector & 0xff0000)
{
- case 0xcd0000: /* CALL nnnn */
+ case 0xcd0000: /* CALL nnnn */
cpustate->icount -= 7;
M_PUSH(PC);
- case 0xc30000: /* JMP nnnn */
+ case 0xc30000: /* JMP nnnn */
cpustate->icount -= 10;
cpustate->PC.d = vector & 0xffff;
break;
@@ -491,81 +491,81 @@ static void execute_one(i8085_state *cpustate, int opcode)
switch (opcode)
{
- case 0x00: break; /* NOP */
- case 0x01: cpustate->BC.w.l = ARG16(cpustate); break; /* LXI B,nnnn */
- case 0x02: WM(cpustate, cpustate->BC.d, cpustate->AF.b.h); break; /* STAX B */
- case 0x03: cpustate->BC.w.l++; /* INX B */
+ case 0x00: break; /* NOP */
+ case 0x01: cpustate->BC.w.l = ARG16(cpustate); break; /* LXI B,nnnn */
+ case 0x02: WM(cpustate, cpustate->BC.d, cpustate->AF.b.h); break; /* STAX B */
+ case 0x03: cpustate->BC.w.l++; /* INX B */
if (IS_8085(cpustate)) { if (cpustate->BC.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x04: M_INR(cpustate->BC.b.h); break; /* INR B */
- case 0x05: M_DCR(cpustate->BC.b.h); break; /* DCR B */
- case 0x06: M_MVI(cpustate->BC.b.h); break; /* MVI B,nn */
- case 0x07: M_RLC; break; /* RLC */
+ case 0x04: M_INR(cpustate->BC.b.h); break; /* INR B */
+ case 0x05: M_DCR(cpustate->BC.b.h); break; /* DCR B */
+ case 0x06: M_MVI(cpustate->BC.b.h); break; /* MVI B,nn */
+ case 0x07: M_RLC; break; /* RLC */
- case 0x08: if (IS_8085(cpustate)) { M_DSUB(cpustate); } /* DSUB */
- /* else { ; } */ /* NOP undocumented */
+ case 0x08: if (IS_8085(cpustate)) { M_DSUB(cpustate); } /* DSUB */
+ /* else { ; } */ /* NOP undocumented */
break;
- case 0x09: M_DAD(BC); break; /* DAD B */
- case 0x0a: cpustate->AF.b.h = RM(cpustate, cpustate->BC.d); break; /* LDAX B */
- case 0x0b: cpustate->BC.w.l--; /* DCX B */
+ case 0x09: M_DAD(BC); break; /* DAD B */
+ case 0x0a: cpustate->AF.b.h = RM(cpustate, cpustate->BC.d); break; /* LDAX B */
+ case 0x0b: cpustate->BC.w.l--; /* DCX B */
if (IS_8085(cpustate)) { if (cpustate->BC.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x0c: M_INR(cpustate->BC.b.l); break; /* INR C */
- case 0x0d: M_DCR(cpustate->BC.b.l); break; /* DCR C */
- case 0x0e: M_MVI(cpustate->BC.b.l); break; /* MVI C,nn */
- case 0x0f: M_RRC; break; /* RRC */
+ case 0x0c: M_INR(cpustate->BC.b.l); break; /* INR C */
+ case 0x0d: M_DCR(cpustate->BC.b.l); break; /* DCR C */
+ case 0x0e: M_MVI(cpustate->BC.b.l); break; /* MVI C,nn */
+ case 0x0f: M_RRC; break; /* RRC */
- case 0x10: if (IS_8085(cpustate)) { /* ASRH */
+ case 0x10: if (IS_8085(cpustate)) { /* ASRH */
cpustate->AF.b.l = (cpustate->AF.b.l & ~CF) | (cpustate->HL.b.l & CF);
cpustate->HL.w.l = (cpustate->HL.w.l >> 1);
- } /* else { ; } */ /* NOP undocumented */
+ } /* else { ; } */ /* NOP undocumented */
break;
- case 0x11: cpustate->DE.w.l = ARG16(cpustate); break; /* LXI D,nnnn */
- case 0x12: WM(cpustate, cpustate->DE.d, cpustate->AF.b.h); break; /* STAX D */
- case 0x13: cpustate->DE.w.l++; /* INX D */
+ case 0x11: cpustate->DE.w.l = ARG16(cpustate); break; /* LXI D,nnnn */
+ case 0x12: WM(cpustate, cpustate->DE.d, cpustate->AF.b.h); break; /* STAX D */
+ case 0x13: cpustate->DE.w.l++; /* INX D */
if (IS_8085(cpustate)) { if (cpustate->DE.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x14: M_INR(cpustate->DE.b.h); break; /* INR D */
- case 0x15: M_DCR(cpustate->DE.b.h); break; /* DCR D */
- case 0x16: M_MVI(cpustate->DE.b.h); break; /* MVI D,nn */
- case 0x17: M_RAL; break; /* RAL */
+ case 0x14: M_INR(cpustate->DE.b.h); break; /* INR D */
+ case 0x15: M_DCR(cpustate->DE.b.h); break; /* DCR D */
+ case 0x16: M_MVI(cpustate->DE.b.h); break; /* MVI D,nn */
+ case 0x17: M_RAL; break; /* RAL */
- case 0x18: if (IS_8085(cpustate)) { /* RLDE */
+ case 0x18: if (IS_8085(cpustate)) { /* RLDE */
cpustate->AF.b.l = (cpustate->AF.b.l & ~(CF | VF)) | (cpustate->DE.b.h >> 7);
cpustate->DE.w.l = (cpustate->DE.w.l << 1) | (cpustate->DE.w.l >> 15);
if (0 != (((cpustate->DE.w.l >> 15) ^ cpustate->AF.b.l) & CF)) cpustate->AF.b.l |= VF;
- } /* else { ; } */ /* NOP undocumented */
+ } /* else { ; } */ /* NOP undocumented */
break;
- case 0x19: M_DAD(DE); break; /* DAD D */
- case 0x1a: cpustate->AF.b.h = RM(cpustate, cpustate->DE.d); break; /* LDAX D */
- case 0x1b: cpustate->DE.w.l--; /* DCX D */
+ case 0x19: M_DAD(DE); break; /* DAD D */
+ case 0x1a: cpustate->AF.b.h = RM(cpustate, cpustate->DE.d); break; /* LDAX D */
+ case 0x1b: cpustate->DE.w.l--; /* DCX D */
if (IS_8085(cpustate)) { if (cpustate->DE.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x1c: M_INR(cpustate->DE.b.l); break; /* INR E */
- case 0x1d: M_DCR(cpustate->DE.b.l); break; /* DCR E */
- case 0x1e: M_MVI(cpustate->DE.b.l); break; /* MVI E,nn */
- case 0x1f: M_RAR; break; /* RAR */
+ case 0x1c: M_INR(cpustate->DE.b.l); break; /* INR E */
+ case 0x1d: M_DCR(cpustate->DE.b.l); break; /* DCR E */
+ case 0x1e: M_MVI(cpustate->DE.b.l); break; /* MVI E,nn */
+ case 0x1f: M_RAR; break; /* RAR */
- case 0x20: if (IS_8085(cpustate)) { /* RIM */
+ case 0x20: if (IS_8085(cpustate)) { /* RIM */
cpustate->AF.b.h = get_rim_value(cpustate);
/* if we have remembered state from taking a TRAP, fix up the IE flag here */
if (cpustate->trap_im_copy & 0x80) cpustate->AF.b.h = (cpustate->AF.b.h & ~IM_IE) | (cpustate->trap_im_copy & IM_IE);
cpustate->trap_im_copy = 0;
- } /* else { ; } */ /* NOP undocumented */
+ } /* else { ; } */ /* NOP undocumented */
break;
- case 0x21: cpustate->HL.w.l = ARG16(cpustate); break; /* LXI H,nnnn */
- case 0x22: cpustate->WZ.w.l = ARG16(cpustate); /* SHLD nnnn */
+ case 0x21: cpustate->HL.w.l = ARG16(cpustate); break; /* LXI H,nnnn */
+ case 0x22: cpustate->WZ.w.l = ARG16(cpustate); /* SHLD nnnn */
WM(cpustate, cpustate->WZ.d, cpustate->HL.b.l); cpustate->WZ.w.l++;
WM(cpustate, cpustate->WZ.d, cpustate->HL.b.h);
break;
- case 0x23: cpustate->HL.w.l++; /* INX H */
+ case 0x23: cpustate->HL.w.l++; /* INX H */
if (IS_8085(cpustate)) { if (cpustate->HL.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x24: M_INR(cpustate->HL.b.h); break; /* INR H */
- case 0x25: M_DCR(cpustate->HL.b.h); break; /* DCR H */
- case 0x26: M_MVI(cpustate->HL.b.h); break; /* MVI H,nn */
- case 0x27: cpustate->WZ.b.h = cpustate->AF.b.h; /* DAA */
+ case 0x24: M_INR(cpustate->HL.b.h); break; /* INR H */
+ case 0x25: M_DCR(cpustate->HL.b.h); break; /* DCR H */
+ case 0x26: M_MVI(cpustate->HL.b.h); break; /* MVI H,nn */
+ case 0x27: cpustate->WZ.b.h = cpustate->AF.b.h; /* DAA */
if (IS_8085(cpustate) && cpustate->AF.b.l&VF) {
if ((cpustate->AF.b.l&HF) | ((cpustate->AF.b.h&0xf)>9)) cpustate->WZ.b.h-=6;
if ((cpustate->AF.b.l&CF) | (cpustate->AF.b.h>0x99)) cpustate->WZ.b.h-=0x60;
@@ -579,27 +579,27 @@ static void execute_one(i8085_state *cpustate, int opcode)
cpustate->AF.b.h=cpustate->WZ.b.h;
break;
- case 0x28: if (IS_8085(cpustate)) { /* LDEH nn */
+ case 0x28: if (IS_8085(cpustate)) { /* LDEH nn */
cpustate->WZ.d = ARG(cpustate);
cpustate->DE.d = (cpustate->HL.d + cpustate->WZ.d) & 0xffff;
- } /* else { ; } */ /* NOP undocumented */
+ } /* else { ; } */ /* NOP undocumented */
break;
- case 0x29: M_DAD(HL); break; /* DAD H */
- case 0x2a: cpustate->WZ.d = ARG16(cpustate); /* LHLD nnnn */
+ case 0x29: M_DAD(HL); break; /* DAD H */
+ case 0x2a: cpustate->WZ.d = ARG16(cpustate); /* LHLD nnnn */
cpustate->HL.b.l = RM(cpustate, cpustate->WZ.d); cpustate->WZ.w.l++;
cpustate->HL.b.h = RM(cpustate, cpustate->WZ.d);
break;
- case 0x2b: cpustate->HL.w.l--; /* DCX H */
+ case 0x2b: cpustate->HL.w.l--; /* DCX H */
if (IS_8085(cpustate)) { if (cpustate->HL.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x2c: M_INR(cpustate->HL.b.l); break; /* INR L */
- case 0x2d: M_DCR(cpustate->HL.b.l); break; /* DCR L */
- case 0x2e: M_MVI(cpustate->HL.b.l); break; /* MVI L,nn */
- case 0x2f: cpustate->AF.b.h ^= 0xff; /* CMA */
+ case 0x2c: M_INR(cpustate->HL.b.l); break; /* INR L */
+ case 0x2d: M_DCR(cpustate->HL.b.l); break; /* DCR L */
+ case 0x2e: M_MVI(cpustate->HL.b.l); break; /* MVI L,nn */
+ case 0x2f: cpustate->AF.b.h ^= 0xff; /* CMA */
if (IS_8085(cpustate)) cpustate->AF.b.l |= HF | VF;
break;
- case 0x30: if (IS_8085(cpustate)) { /* SIM */
+ case 0x30: if (IS_8085(cpustate)) { /* SIM */
/* if bit 3 is set, bits 0-2 become the new masks */
if (cpustate->AF.b.h & 0x08) {
cpustate->IM &= ~(IM_M55 | IM_M65 | IM_M75 | IM_I55 | IM_I65);
@@ -618,286 +618,286 @@ static void execute_one(i8085_state *cpustate, int opcode)
/* check for revealed interrupts */
check_for_interrupts(cpustate);
- } /* else { ; } */ /* NOP undocumented */
+ } /* else { ; } */ /* NOP undocumented */
break;
- case 0x31: cpustate->SP.w.l = ARG16(cpustate); break; /* LXI SP,nnnn */
- case 0x32: cpustate->WZ.d = ARG16(cpustate); /* STAX nnnn */
+ case 0x31: cpustate->SP.w.l = ARG16(cpustate); break; /* LXI SP,nnnn */
+ case 0x32: cpustate->WZ.d = ARG16(cpustate); /* STAX nnnn */
WM(cpustate, cpustate->WZ.d, cpustate->AF.b.h);
break;
- case 0x33: cpustate->SP.w.l++; /* INX SP */
+ case 0x33: cpustate->SP.w.l++; /* INX SP */
if (IS_8085(cpustate)) { if (cpustate->SP.w.l == 0x0000) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x34: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); /* INR M */
+ case 0x34: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); /* INR M */
M_INR(cpustate->WZ.b.l);
WM(cpustate, cpustate->HL.d, cpustate->WZ.b.l);
break;
- case 0x35: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); /* DCR M */
+ case 0x35: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); /* DCR M */
M_DCR(cpustate->WZ.b.l);
WM(cpustate, cpustate->HL.d, cpustate->WZ.b.l);
break;
- case 0x36: cpustate->WZ.b.l = ARG(cpustate); /* MVI M,nn */
+ case 0x36: cpustate->WZ.b.l = ARG(cpustate); /* MVI M,nn */
WM(cpustate, cpustate->HL.d, cpustate->WZ.b.l);
break;
- case 0x37: cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | CF; break; /* STC */
+ case 0x37: cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | CF; break; /* STC */
- case 0x38: if (IS_8085(cpustate)) { /* LDES nn */
+ case 0x38: if (IS_8085(cpustate)) { /* LDES nn */
cpustate->WZ.d = ARG(cpustate);
cpustate->DE.d = (cpustate->SP.d + cpustate->WZ.d) & 0xffff;
- } /* else { ; } */ /* NOP undocumented */
+ } /* else { ; } */ /* NOP undocumented */
break;
- case 0x39: M_DAD(SP); break; /* DAD SP */
- case 0x3a: cpustate->WZ.d = ARG16(cpustate); /* LDAX nnnn */
+ case 0x39: M_DAD(SP); break; /* DAD SP */
+ case 0x3a: cpustate->WZ.d = ARG16(cpustate); /* LDAX nnnn */
cpustate->AF.b.h = RM(cpustate, cpustate->WZ.d);
break;
- case 0x3b: cpustate->SP.w.l--; /* DCX SP */
+ case 0x3b: cpustate->SP.w.l--; /* DCX SP */
if (IS_8085(cpustate)) { if (cpustate->SP.w.l == 0xffff) cpustate->AF.b.l |= X5F; else cpustate->AF.b.l &= ~X5F; }
break;
- case 0x3c: M_INR(cpustate->AF.b.h); break; /* INR A */
- case 0x3d: M_DCR(cpustate->AF.b.h); break; /* DCR A */
- case 0x3e: M_MVI(cpustate->AF.b.h); break; /* MVI A,nn */
- case 0x3f: cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (~cpustate->AF.b.l & CF); break; /* CMC */
-
- case 0x40: break; /* MOV B,B */
- case 0x41: cpustate->BC.b.h = cpustate->BC.b.l; break; /* MOV B,C */
- case 0x42: cpustate->BC.b.h = cpustate->DE.b.h; break; /* MOV B,D */
- case 0x43: cpustate->BC.b.h = cpustate->DE.b.l; break; /* MOV B,E */
- case 0x44: cpustate->BC.b.h = cpustate->HL.b.h; break; /* MOV B,H */
- case 0x45: cpustate->BC.b.h = cpustate->HL.b.l; break; /* MOV B,L */
- case 0x46: cpustate->BC.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV B,M */
- case 0x47: cpustate->BC.b.h = cpustate->AF.b.h; break; /* MOV B,A */
-
- case 0x48: cpustate->BC.b.l = cpustate->BC.b.h; break; /* MOV C,B */
- case 0x49: break; /* MOV C,C */
- case 0x4a: cpustate->BC.b.l = cpustate->DE.b.h; break; /* MOV C,D */
- case 0x4b: cpustate->BC.b.l = cpustate->DE.b.l; break; /* MOV C,E */
- case 0x4c: cpustate->BC.b.l = cpustate->HL.b.h; break; /* MOV C,H */
- case 0x4d: cpustate->BC.b.l = cpustate->HL.b.l; break; /* MOV C,L */
- case 0x4e: cpustate->BC.b.l = RM(cpustate, cpustate->HL.d); break; /* MOV C,M */
- case 0x4f: cpustate->BC.b.l = cpustate->AF.b.h; break; /* MOV C,A */
-
- case 0x50: cpustate->DE.b.h = cpustate->BC.b.h; break; /* MOV D,B */
- case 0x51: cpustate->DE.b.h = cpustate->BC.b.l; break; /* MOV D,C */
- case 0x52: break; /* MOV D,D */
- case 0x53: cpustate->DE.b.h = cpustate->DE.b.l; break; /* MOV D,E */
- case 0x54: cpustate->DE.b.h = cpustate->HL.b.h; break; /* MOV D,H */
- case 0x55: cpustate->DE.b.h = cpustate->HL.b.l; break; /* MOV D,L */
- case 0x56: cpustate->DE.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV D,M */
- case 0x57: cpustate->DE.b.h = cpustate->AF.b.h; break; /* MOV D,A */
-
- case 0x58: cpustate->DE.b.l = cpustate->BC.b.h; break; /* MOV E,B */
- case 0x59: cpustate->DE.b.l = cpustate->BC.b.l; break; /* MOV E,C */
- case 0x5a: cpustate->DE.b.l = cpustate->DE.b.h; break; /* MOV E,D */
- case 0x5b: break; /* MOV E,E */
- case 0x5c: cpustate->DE.b.l = cpustate->HL.b.h; break; /* MOV E,H */
- case 0x5d: cpustate->DE.b.l = cpustate->HL.b.l; break; /* MOV E,L */
- case 0x5e: cpustate->DE.b.l = RM(cpustate, cpustate->HL.d); break; /* MOV E,M */
- case 0x5f: cpustate->DE.b.l = cpustate->AF.b.h; break; /* MOV E,A */
-
- case 0x60: cpustate->HL.b.h = cpustate->BC.b.h; break; /* MOV H,B */
- case 0x61: cpustate->HL.b.h = cpustate->BC.b.l; break; /* MOV H,C */
- case 0x62: cpustate->HL.b.h = cpustate->DE.b.h; break; /* MOV H,D */
- case 0x63: cpustate->HL.b.h = cpustate->DE.b.l; break; /* MOV H,E */
- case 0x64: break; /* MOV H,H */
- case 0x65: cpustate->HL.b.h = cpustate->HL.b.l; break; /* MOV H,L */
- case 0x66: cpustate->HL.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV H,M */
- case 0x67: cpustate->HL.b.h = cpustate->AF.b.h; break; /* MOV H,A */
-
- case 0x68: cpustate->HL.b.l = cpustate->BC.b.h; break; /* MOV L,B */
- case 0x69: cpustate->HL.b.l = cpustate->BC.b.l; break; /* MOV L,C */
- case 0x6a: cpustate->HL.b.l = cpustate->DE.b.h; break; /* MOV L,D */
- case 0x6b: cpustate->HL.b.l = cpustate->DE.b.l; break; /* MOV L,E */
- case 0x6c: cpustate->HL.b.l = cpustate->HL.b.h; break; /* MOV L,H */
- case 0x6d: break; /* MOV L,L */
- case 0x6e: cpustate->HL.b.l = RM(cpustate, cpustate->HL.d); break; /* MOV L,M */
- case 0x6f: cpustate->HL.b.l = cpustate->AF.b.h; break; /* MOV L,A */
-
- case 0x70: WM(cpustate, cpustate->HL.d, cpustate->BC.b.h); break; /* MOV M,B */
- case 0x71: WM(cpustate, cpustate->HL.d, cpustate->BC.b.l); break; /* MOV M,C */
- case 0x72: WM(cpustate, cpustate->HL.d, cpustate->DE.b.h); break; /* MOV M,D */
- case 0x73: WM(cpustate, cpustate->HL.d, cpustate->DE.b.l); break; /* MOV M,E */
- case 0x74: WM(cpustate, cpustate->HL.d, cpustate->HL.b.h); break; /* MOV M,H */
- case 0x75: WM(cpustate, cpustate->HL.d, cpustate->HL.b.l); break; /* MOV M,L */
- case 0x76: cpustate->PC.w.l--; cpustate->HALT = 1; /* HLT */
+ case 0x3c: M_INR(cpustate->AF.b.h); break; /* INR A */
+ case 0x3d: M_DCR(cpustate->AF.b.h); break; /* DCR A */
+ case 0x3e: M_MVI(cpustate->AF.b.h); break; /* MVI A,nn */
+ case 0x3f: cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (~cpustate->AF.b.l & CF); break; /* CMC */
+
+ case 0x40: break; /* MOV B,B */
+ case 0x41: cpustate->BC.b.h = cpustate->BC.b.l; break; /* MOV B,C */
+ case 0x42: cpustate->BC.b.h = cpustate->DE.b.h; break; /* MOV B,D */
+ case 0x43: cpustate->BC.b.h = cpustate->DE.b.l; break; /* MOV B,E */
+ case 0x44: cpustate->BC.b.h = cpustate->HL.b.h; break; /* MOV B,H */
+ case 0x45: cpustate->BC.b.h = cpustate->HL.b.l; break; /* MOV B,L */
+ case 0x46: cpustate->BC.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV B,M */
+ case 0x47: cpustate->BC.b.h = cpustate->AF.b.h; break; /* MOV B,A */
+
+ case 0x48: cpustate->BC.b.l = cpustate->BC.b.h; break; /* MOV C,B */
+ case 0x49: break; /* MOV C,C */
+ case 0x4a: cpustate->BC.b.l = cpustate->DE.b.h; break; /* MOV C,D */
+ case 0x4b: cpustate->BC.b.l = cpustate->DE.b.l; break; /* MOV C,E */
+ case 0x4c: cpustate->BC.b.l = cpustate->HL.b.h; break; /* MOV C,H */
+ case 0x4d: cpustate->BC.b.l = cpustate->HL.b.l; break; /* MOV C,L */
+ case 0x4e: cpustate->BC.b.l = RM(cpustate, cpustate->HL.d); break; /* MOV C,M */
+ case 0x4f: cpustate->BC.b.l = cpustate->AF.b.h; break; /* MOV C,A */
+
+ case 0x50: cpustate->DE.b.h = cpustate->BC.b.h; break; /* MOV D,B */
+ case 0x51: cpustate->DE.b.h = cpustate->BC.b.l; break; /* MOV D,C */
+ case 0x52: break; /* MOV D,D */
+ case 0x53: cpustate->DE.b.h = cpustate->DE.b.l; break; /* MOV D,E */
+ case 0x54: cpustate->DE.b.h = cpustate->HL.b.h; break; /* MOV D,H */
+ case 0x55: cpustate->DE.b.h = cpustate->HL.b.l; break; /* MOV D,L */
+ case 0x56: cpustate->DE.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV D,M */
+ case 0x57: cpustate->DE.b.h = cpustate->AF.b.h; break; /* MOV D,A */
+
+ case 0x58: cpustate->DE.b.l = cpustate->BC.b.h; break; /* MOV E,B */
+ case 0x59: cpustate->DE.b.l = cpustate->BC.b.l; break; /* MOV E,C */
+ case 0x5a: cpustate->DE.b.l = cpustate->DE.b.h; break; /* MOV E,D */
+ case 0x5b: break; /* MOV E,E */
+ case 0x5c: cpustate->DE.b.l = cpustate->HL.b.h; break; /* MOV E,H */
+ case 0x5d: cpustate->DE.b.l = cpustate->HL.b.l; break; /* MOV E,L */
+ case 0x5e: cpustate->DE.b.l = RM(cpustate, cpustate->HL.d); break; /* MOV E,M */
+ case 0x5f: cpustate->DE.b.l = cpustate->AF.b.h; break; /* MOV E,A */
+
+ case 0x60: cpustate->HL.b.h = cpustate->BC.b.h; break; /* MOV H,B */
+ case 0x61: cpustate->HL.b.h = cpustate->BC.b.l; break; /* MOV H,C */
+ case 0x62: cpustate->HL.b.h = cpustate->DE.b.h; break; /* MOV H,D */
+ case 0x63: cpustate->HL.b.h = cpustate->DE.b.l; break; /* MOV H,E */
+ case 0x64: break; /* MOV H,H */
+ case 0x65: cpustate->HL.b.h = cpustate->HL.b.l; break; /* MOV H,L */
+ case 0x66: cpustate->HL.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV H,M */
+ case 0x67: cpustate->HL.b.h = cpustate->AF.b.h; break; /* MOV H,A */
+
+ case 0x68: cpustate->HL.b.l = cpustate->BC.b.h; break; /* MOV L,B */
+ case 0x69: cpustate->HL.b.l = cpustate->BC.b.l; break; /* MOV L,C */
+ case 0x6a: cpustate->HL.b.l = cpustate->DE.b.h; break; /* MOV L,D */
+ case 0x6b: cpustate->HL.b.l = cpustate->DE.b.l; break; /* MOV L,E */
+ case 0x6c: cpustate->HL.b.l = cpustate->HL.b.h; break; /* MOV L,H */
+ case 0x6d: break; /* MOV L,L */
+ case 0x6e: cpustate->HL.b.l = RM(cpustate, cpustate->HL.d); break; /* MOV L,M */
+ case 0x6f: cpustate->HL.b.l = cpustate->AF.b.h; break; /* MOV L,A */
+
+ case 0x70: WM(cpustate, cpustate->HL.d, cpustate->BC.b.h); break; /* MOV M,B */
+ case 0x71: WM(cpustate, cpustate->HL.d, cpustate->BC.b.l); break; /* MOV M,C */
+ case 0x72: WM(cpustate, cpustate->HL.d, cpustate->DE.b.h); break; /* MOV M,D */
+ case 0x73: WM(cpustate, cpustate->HL.d, cpustate->DE.b.l); break; /* MOV M,E */
+ case 0x74: WM(cpustate, cpustate->HL.d, cpustate->HL.b.h); break; /* MOV M,H */
+ case 0x75: WM(cpustate, cpustate->HL.d, cpustate->HL.b.l); break; /* MOV M,L */
+ case 0x76: cpustate->PC.w.l--; cpustate->HALT = 1; /* HLT */
set_status(cpustate, 0x8a); // halt acknowledge
break;
- case 0x77: WM(cpustate, cpustate->HL.d, cpustate->AF.b.h); break; /* MOV M,A */
-
- case 0x78: cpustate->AF.b.h = cpustate->BC.b.h; break; /* MOV A,B */
- case 0x79: cpustate->AF.b.h = cpustate->BC.b.l; break; /* MOV A,C */
- case 0x7a: cpustate->AF.b.h = cpustate->DE.b.h; break; /* MOV A,D */
- case 0x7b: cpustate->AF.b.h = cpustate->DE.b.l; break; /* MOV A,E */
- case 0x7c: cpustate->AF.b.h = cpustate->HL.b.h; break; /* MOV A,H */
- case 0x7d: cpustate->AF.b.h = cpustate->HL.b.l; break; /* MOV A,L */
- case 0x7e: cpustate->AF.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV A,M */
- case 0x7f: break; /* MOV A,A */
-
- case 0x80: M_ADD(cpustate->BC.b.h); break; /* ADD B */
- case 0x81: M_ADD(cpustate->BC.b.l); break; /* ADD C */
- case 0x82: M_ADD(cpustate->DE.b.h); break; /* ADD D */
- case 0x83: M_ADD(cpustate->DE.b.l); break; /* ADD E */
- case 0x84: M_ADD(cpustate->HL.b.h); break; /* ADD H */
- case 0x85: M_ADD(cpustate->HL.b.l); break; /* ADD L */
- case 0x86: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ADD(cpustate->WZ.b.l); break; /* ADD M */
- case 0x87: M_ADD(cpustate->AF.b.h); break; /* ADD A */
-
- case 0x88: M_ADC(cpustate->BC.b.h); break; /* ADC B */
- case 0x89: M_ADC(cpustate->BC.b.l); break; /* ADC C */
- case 0x8a: M_ADC(cpustate->DE.b.h); break; /* ADC D */
- case 0x8b: M_ADC(cpustate->DE.b.l); break; /* ADC E */
- case 0x8c: M_ADC(cpustate->HL.b.h); break; /* ADC H */
- case 0x8d: M_ADC(cpustate->HL.b.l); break; /* ADC L */
- case 0x8e: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ADC(cpustate->WZ.b.l); break; /* ADC M */
- case 0x8f: M_ADC(cpustate->AF.b.h); break; /* ADC A */
-
- case 0x90: M_SUB(cpustate->BC.b.h); break; /* SUB B */
- case 0x91: M_SUB(cpustate->BC.b.l); break; /* SUB C */
- case 0x92: M_SUB(cpustate->DE.b.h); break; /* SUB D */
- case 0x93: M_SUB(cpustate->DE.b.l); break; /* SUB E */
- case 0x94: M_SUB(cpustate->HL.b.h); break; /* SUB H */
- case 0x95: M_SUB(cpustate->HL.b.l); break; /* SUB L */
- case 0x96: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_SUB(cpustate->WZ.b.l); break; /* SUB M */
- case 0x97: M_SUB(cpustate->AF.b.h); break; /* SUB A */
-
- case 0x98: M_SBB(cpustate->BC.b.h); break; /* SBB B */
- case 0x99: M_SBB(cpustate->BC.b.l); break; /* SBB C */
- case 0x9a: M_SBB(cpustate->DE.b.h); break; /* SBB D */
- case 0x9b: M_SBB(cpustate->DE.b.l); break; /* SBB E */
- case 0x9c: M_SBB(cpustate->HL.b.h); break; /* SBB H */
- case 0x9d: M_SBB(cpustate->HL.b.l); break; /* SBB L */
- case 0x9e: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_SBB(cpustate->WZ.b.l); break; /* SBB M */
- case 0x9f: M_SBB(cpustate->AF.b.h); break; /* SBB A */
-
- case 0xa0: M_ANA(cpustate->BC.b.h); break; /* ANA B */
- case 0xa1: M_ANA(cpustate->BC.b.l); break; /* ANA C */
- case 0xa2: M_ANA(cpustate->DE.b.h); break; /* ANA D */
- case 0xa3: M_ANA(cpustate->DE.b.l); break; /* ANA E */
- case 0xa4: M_ANA(cpustate->HL.b.h); break; /* ANA H */
- case 0xa5: M_ANA(cpustate->HL.b.l); break; /* ANA L */
- case 0xa6: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ANA(cpustate->WZ.b.l); break; /* ANA M */
- case 0xa7: M_ANA(cpustate->AF.b.h); break; /* ANA A */
-
- case 0xa8: M_XRA(cpustate->BC.b.h); break; /* XRA B */
- case 0xa9: M_XRA(cpustate->BC.b.l); break; /* XRA C */
- case 0xaa: M_XRA(cpustate->DE.b.h); break; /* XRA D */
- case 0xab: M_XRA(cpustate->DE.b.l); break; /* XRA E */
- case 0xac: M_XRA(cpustate->HL.b.h); break; /* XRA H */
- case 0xad: M_XRA(cpustate->HL.b.l); break; /* XRA L */
- case 0xae: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_XRA(cpustate->WZ.b.l); break; /* XRA M */
- case 0xaf: M_XRA(cpustate->AF.b.h); break; /* XRA A */
-
- case 0xb0: M_ORA(cpustate->BC.b.h); break; /* ORA B */
- case 0xb1: M_ORA(cpustate->BC.b.l); break; /* ORA C */
- case 0xb2: M_ORA(cpustate->DE.b.h); break; /* ORA D */
- case 0xb3: M_ORA(cpustate->DE.b.l); break; /* ORA E */
- case 0xb4: M_ORA(cpustate->HL.b.h); break; /* ORA H */
- case 0xb5: M_ORA(cpustate->HL.b.l); break; /* ORA L */
- case 0xb6: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ORA(cpustate->WZ.b.l); break; /* ORA M */
- case 0xb7: M_ORA(cpustate->AF.b.h); break; /* ORA A */
-
- case 0xb8: M_CMP(cpustate->BC.b.h); break; /* CMP B */
- case 0xb9: M_CMP(cpustate->BC.b.l); break; /* CMP C */
- case 0xba: M_CMP(cpustate->DE.b.h); break; /* CMP D */
- case 0xbb: M_CMP(cpustate->DE.b.l); break; /* CMP E */
- case 0xbc: M_CMP(cpustate->HL.b.h); break; /* CMP H */
- case 0xbd: M_CMP(cpustate->HL.b.l); break; /* CMP L */
- case 0xbe: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_CMP(cpustate->WZ.b.l); break; /* CMP M */
- case 0xbf: M_CMP(cpustate->AF.b.h); break; /* CMP A */
-
- case 0xc0: M_RET( !(cpustate->AF.b.l & ZF) ); break; /* RNZ */
- case 0xc1: M_POP(BC); break; /* POP B */
- case 0xc2: M_JMP( !(cpustate->AF.b.l & ZF) ); break; /* JNZ nnnn */
- case 0xc3: M_JMP(1); break; /* JMP nnnn */
- case 0xc4: M_CALL( !(cpustate->AF.b.l & ZF) ); break; /* CNZ nnnn */
- case 0xc5: M_PUSH(BC); break; /* PUSH B */
- case 0xc6: cpustate->WZ.b.l = ARG(cpustate); M_ADD(cpustate->WZ.b.l); break; /* ADI nn */
- case 0xc7: M_RST(0); break; /* RST 0 */
-
- case 0xc8: M_RET( cpustate->AF.b.l & ZF ); break; /* RZ */
- case 0xc9: M_POP(PC); break; /* RET */
- case 0xca: M_JMP( cpustate->AF.b.l & ZF ); break; /* JZ nnnn */
- case 0xcb: if (IS_8085(cpustate)) { /* RST V */
+ case 0x77: WM(cpustate, cpustate->HL.d, cpustate->AF.b.h); break; /* MOV M,A */
+
+ case 0x78: cpustate->AF.b.h = cpustate->BC.b.h; break; /* MOV A,B */
+ case 0x79: cpustate->AF.b.h = cpustate->BC.b.l; break; /* MOV A,C */
+ case 0x7a: cpustate->AF.b.h = cpustate->DE.b.h; break; /* MOV A,D */
+ case 0x7b: cpustate->AF.b.h = cpustate->DE.b.l; break; /* MOV A,E */
+ case 0x7c: cpustate->AF.b.h = cpustate->HL.b.h; break; /* MOV A,H */
+ case 0x7d: cpustate->AF.b.h = cpustate->HL.b.l; break; /* MOV A,L */
+ case 0x7e: cpustate->AF.b.h = RM(cpustate, cpustate->HL.d); break; /* MOV A,M */
+ case 0x7f: break; /* MOV A,A */
+
+ case 0x80: M_ADD(cpustate->BC.b.h); break; /* ADD B */
+ case 0x81: M_ADD(cpustate->BC.b.l); break; /* ADD C */
+ case 0x82: M_ADD(cpustate->DE.b.h); break; /* ADD D */
+ case 0x83: M_ADD(cpustate->DE.b.l); break; /* ADD E */
+ case 0x84: M_ADD(cpustate->HL.b.h); break; /* ADD H */
+ case 0x85: M_ADD(cpustate->HL.b.l); break; /* ADD L */
+ case 0x86: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ADD(cpustate->WZ.b.l); break; /* ADD M */
+ case 0x87: M_ADD(cpustate->AF.b.h); break; /* ADD A */
+
+ case 0x88: M_ADC(cpustate->BC.b.h); break; /* ADC B */
+ case 0x89: M_ADC(cpustate->BC.b.l); break; /* ADC C */
+ case 0x8a: M_ADC(cpustate->DE.b.h); break; /* ADC D */
+ case 0x8b: M_ADC(cpustate->DE.b.l); break; /* ADC E */
+ case 0x8c: M_ADC(cpustate->HL.b.h); break; /* ADC H */
+ case 0x8d: M_ADC(cpustate->HL.b.l); break; /* ADC L */
+ case 0x8e: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ADC(cpustate->WZ.b.l); break; /* ADC M */
+ case 0x8f: M_ADC(cpustate->AF.b.h); break; /* ADC A */
+
+ case 0x90: M_SUB(cpustate->BC.b.h); break; /* SUB B */
+ case 0x91: M_SUB(cpustate->BC.b.l); break; /* SUB C */
+ case 0x92: M_SUB(cpustate->DE.b.h); break; /* SUB D */
+ case 0x93: M_SUB(cpustate->DE.b.l); break; /* SUB E */
+ case 0x94: M_SUB(cpustate->HL.b.h); break; /* SUB H */
+ case 0x95: M_SUB(cpustate->HL.b.l); break; /* SUB L */
+ case 0x96: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_SUB(cpustate->WZ.b.l); break; /* SUB M */
+ case 0x97: M_SUB(cpustate->AF.b.h); break; /* SUB A */
+
+ case 0x98: M_SBB(cpustate->BC.b.h); break; /* SBB B */
+ case 0x99: M_SBB(cpustate->BC.b.l); break; /* SBB C */
+ case 0x9a: M_SBB(cpustate->DE.b.h); break; /* SBB D */
+ case 0x9b: M_SBB(cpustate->DE.b.l); break; /* SBB E */
+ case 0x9c: M_SBB(cpustate->HL.b.h); break; /* SBB H */
+ case 0x9d: M_SBB(cpustate->HL.b.l); break; /* SBB L */
+ case 0x9e: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_SBB(cpustate->WZ.b.l); break; /* SBB M */
+ case 0x9f: M_SBB(cpustate->AF.b.h); break; /* SBB A */
+
+ case 0xa0: M_ANA(cpustate->BC.b.h); break; /* ANA B */
+ case 0xa1: M_ANA(cpustate->BC.b.l); break; /* ANA C */
+ case 0xa2: M_ANA(cpustate->DE.b.h); break; /* ANA D */
+ case 0xa3: M_ANA(cpustate->DE.b.l); break; /* ANA E */
+ case 0xa4: M_ANA(cpustate->HL.b.h); break; /* ANA H */
+ case 0xa5: M_ANA(cpustate->HL.b.l); break; /* ANA L */
+ case 0xa6: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ANA(cpustate->WZ.b.l); break; /* ANA M */
+ case 0xa7: M_ANA(cpustate->AF.b.h); break; /* ANA A */
+
+ case 0xa8: M_XRA(cpustate->BC.b.h); break; /* XRA B */
+ case 0xa9: M_XRA(cpustate->BC.b.l); break; /* XRA C */
+ case 0xaa: M_XRA(cpustate->DE.b.h); break; /* XRA D */
+ case 0xab: M_XRA(cpustate->DE.b.l); break; /* XRA E */
+ case 0xac: M_XRA(cpustate->HL.b.h); break; /* XRA H */
+ case 0xad: M_XRA(cpustate->HL.b.l); break; /* XRA L */
+ case 0xae: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_XRA(cpustate->WZ.b.l); break; /* XRA M */
+ case 0xaf: M_XRA(cpustate->AF.b.h); break; /* XRA A */
+
+ case 0xb0: M_ORA(cpustate->BC.b.h); break; /* ORA B */
+ case 0xb1: M_ORA(cpustate->BC.b.l); break; /* ORA C */
+ case 0xb2: M_ORA(cpustate->DE.b.h); break; /* ORA D */
+ case 0xb3: M_ORA(cpustate->DE.b.l); break; /* ORA E */
+ case 0xb4: M_ORA(cpustate->HL.b.h); break; /* ORA H */
+ case 0xb5: M_ORA(cpustate->HL.b.l); break; /* ORA L */
+ case 0xb6: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_ORA(cpustate->WZ.b.l); break; /* ORA M */
+ case 0xb7: M_ORA(cpustate->AF.b.h); break; /* ORA A */
+
+ case 0xb8: M_CMP(cpustate->BC.b.h); break; /* CMP B */
+ case 0xb9: M_CMP(cpustate->BC.b.l); break; /* CMP C */
+ case 0xba: M_CMP(cpustate->DE.b.h); break; /* CMP D */
+ case 0xbb: M_CMP(cpustate->DE.b.l); break; /* CMP E */
+ case 0xbc: M_CMP(cpustate->HL.b.h); break; /* CMP H */
+ case 0xbd: M_CMP(cpustate->HL.b.l); break; /* CMP L */
+ case 0xbe: cpustate->WZ.b.l = RM(cpustate, cpustate->HL.d); M_CMP(cpustate->WZ.b.l); break; /* CMP M */
+ case 0xbf: M_CMP(cpustate->AF.b.h); break; /* CMP A */
+
+ case 0xc0: M_RET( !(cpustate->AF.b.l & ZF) ); break; /* RNZ */
+ case 0xc1: M_POP(BC); break; /* POP B */
+ case 0xc2: M_JMP( !(cpustate->AF.b.l & ZF) ); break; /* JNZ nnnn */
+ case 0xc3: M_JMP(1); break; /* JMP nnnn */
+ case 0xc4: M_CALL( !(cpustate->AF.b.l & ZF) ); break; /* CNZ nnnn */
+ case 0xc5: M_PUSH(BC); break; /* PUSH B */
+ case 0xc6: cpustate->WZ.b.l = ARG(cpustate); M_ADD(cpustate->WZ.b.l); break; /* ADI nn */
+ case 0xc7: M_RST(0); break; /* RST 0 */
+
+ case 0xc8: M_RET( cpustate->AF.b.l & ZF ); break; /* RZ */
+ case 0xc9: M_POP(PC); break; /* RET */
+ case 0xca: M_JMP( cpustate->AF.b.l & ZF ); break; /* JZ nnnn */
+ case 0xcb: if (IS_8085(cpustate)) { /* RST V */
if (cpustate->AF.b.l & VF) { M_RST(8); }
else cpustate->icount += 6; // RST not taken
- } else { M_JMP(1); } /* JMP nnnn undocumented */
+ } else { M_JMP(1); } /* JMP nnnn undocumented */
break;
- case 0xcc: M_CALL( cpustate->AF.b.l & ZF ); break; /* CZ nnnn */
- case 0xcd: M_CALL(1); break; /* CALL nnnn */
- case 0xce: cpustate->WZ.b.l = ARG(cpustate); M_ADC(cpustate->WZ.b.l); break; /* ACI nn */
- case 0xcf: M_RST(1); break; /* RST 1 */
-
- case 0xd0: M_RET( !(cpustate->AF.b.l & CF) ); break; /* RNC */
- case 0xd1: M_POP(DE); break; /* POP D */
- case 0xd2: M_JMP( !(cpustate->AF.b.l & CF) ); break; /* JNC nnnn */
- case 0xd3: M_OUT; break; /* OUT nn */
- case 0xd4: M_CALL( !(cpustate->AF.b.l & CF) ); break; /* CNC nnnn */
- case 0xd5: M_PUSH(DE); break; /* PUSH D */
- case 0xd6: cpustate->WZ.b.l = ARG(cpustate); M_SUB(cpustate->WZ.b.l); break; /* SUI nn */
- case 0xd7: M_RST(2); break; /* RST 2 */
-
- case 0xd8: M_RET( cpustate->AF.b.l & CF ); break; /* RC */
- case 0xd9: if (IS_8085(cpustate)) { /* SHLX */
+ case 0xcc: M_CALL( cpustate->AF.b.l & ZF ); break; /* CZ nnnn */
+ case 0xcd: M_CALL(1); break; /* CALL nnnn */
+ case 0xce: cpustate->WZ.b.l = ARG(cpustate); M_ADC(cpustate->WZ.b.l); break; /* ACI nn */
+ case 0xcf: M_RST(1); break; /* RST 1 */
+
+ case 0xd0: M_RET( !(cpustate->AF.b.l & CF) ); break; /* RNC */
+ case 0xd1: M_POP(DE); break; /* POP D */
+ case 0xd2: M_JMP( !(cpustate->AF.b.l & CF) ); break; /* JNC nnnn */
+ case 0xd3: M_OUT; break; /* OUT nn */
+ case 0xd4: M_CALL( !(cpustate->AF.b.l & CF) ); break; /* CNC nnnn */
+ case 0xd5: M_PUSH(DE); break; /* PUSH D */
+ case 0xd6: cpustate->WZ.b.l = ARG(cpustate); M_SUB(cpustate->WZ.b.l); break; /* SUI nn */
+ case 0xd7: M_RST(2); break; /* RST 2 */
+
+ case 0xd8: M_RET( cpustate->AF.b.l & CF ); break; /* RC */
+ case 0xd9: if (IS_8085(cpustate)) { /* SHLX */
cpustate->WZ.w.l = cpustate->DE.w.l;
WM(cpustate, cpustate->WZ.d, cpustate->HL.b.l); cpustate->WZ.w.l++;
WM(cpustate, cpustate->WZ.d, cpustate->HL.b.h);
- } else { M_POP(PC); } /* RET undocumented */
+ } else { M_POP(PC); } /* RET undocumented */
break;
- case 0xda: M_JMP( cpustate->AF.b.l & CF ); break; /* JC nnnn */
- case 0xdb: M_IN; break; /* IN nn */
- case 0xdc: M_CALL( cpustate->AF.b.l & CF ); break; /* CC nnnn */
- case 0xdd: if (IS_8085(cpustate)) { M_JMP( !(cpustate->AF.b.l & X5F) ); } /* JNX nnnn */
- else { M_CALL(1); } /* CALL nnnn undocumented */
+ case 0xda: M_JMP( cpustate->AF.b.l & CF ); break; /* JC nnnn */
+ case 0xdb: M_IN; break; /* IN nn */
+ case 0xdc: M_CALL( cpustate->AF.b.l & CF ); break; /* CC nnnn */
+ case 0xdd: if (IS_8085(cpustate)) { M_JMP( !(cpustate->AF.b.l & X5F) ); } /* JNX nnnn */
+ else { M_CALL(1); } /* CALL nnnn undocumented */
break;
- case 0xde: cpustate->WZ.b.l = ARG(cpustate); M_SBB(cpustate->WZ.b.l); break; /* SBI nn */
- case 0xdf: M_RST(3); break; /* RST 3 */
+ case 0xde: cpustate->WZ.b.l = ARG(cpustate); M_SBB(cpustate->WZ.b.l); break; /* SBI nn */
+ case 0xdf: M_RST(3); break; /* RST 3 */
- case 0xe0: M_RET( !(cpustate->AF.b.l & PF) ); break; /* RPO */
- case 0xe1: M_POP(HL); break; /* POP H */
- case 0xe2: M_JMP( !(cpustate->AF.b.l & PF) ); break; /* JPO nnnn */
- case 0xe3: M_POP(WZ); M_PUSH(HL); /* XTHL */
+ case 0xe0: M_RET( !(cpustate->AF.b.l & PF) ); break; /* RPO */
+ case 0xe1: M_POP(HL); break; /* POP H */
+ case 0xe2: M_JMP( !(cpustate->AF.b.l & PF) ); break; /* JPO nnnn */
+ case 0xe3: M_POP(WZ); M_PUSH(HL); /* XTHL */
cpustate->HL.d = cpustate->WZ.d;
break;
- case 0xe4: M_CALL( !(cpustate->AF.b.l & PF) ); break; /* CPO nnnn */
- case 0xe5: M_PUSH(HL); break; /* PUSH H */
- case 0xe6: cpustate->WZ.b.l = ARG(cpustate); M_ANA(cpustate->WZ.b.l); break; /* ANI nn */
- case 0xe7: M_RST(4); break; /* RST 4 */
-
- case 0xe8: M_RET( cpustate->AF.b.l & PF ); break; /* RPE */
- case 0xe9: cpustate->PC.d = cpustate->HL.w.l; break; /* PCHL */
- case 0xea: M_JMP( cpustate->AF.b.l & PF ); break; /* JPE nnnn */
- case 0xeb: cpustate->WZ.d = cpustate->DE.d; /* XCHG */
+ case 0xe4: M_CALL( !(cpustate->AF.b.l & PF) ); break; /* CPO nnnn */
+ case 0xe5: M_PUSH(HL); break; /* PUSH H */
+ case 0xe6: cpustate->WZ.b.l = ARG(cpustate); M_ANA(cpustate->WZ.b.l); break; /* ANI nn */
+ case 0xe7: M_RST(4); break; /* RST 4 */
+
+ case 0xe8: M_RET( cpustate->AF.b.l & PF ); break; /* RPE */
+ case 0xe9: cpustate->PC.d = cpustate->HL.w.l; break; /* PCHL */
+ case 0xea: M_JMP( cpustate->AF.b.l & PF ); break; /* JPE nnnn */
+ case 0xeb: cpustate->WZ.d = cpustate->DE.d; /* XCHG */
cpustate->DE.d = cpustate->HL.d;
cpustate->HL.d = cpustate->WZ.d;
break;
- case 0xec: M_CALL( cpustate->AF.b.l & PF ); break; /* CPE nnnn */
- case 0xed: if (IS_8085(cpustate)) { /* LHLX */
+ case 0xec: M_CALL( cpustate->AF.b.l & PF ); break; /* CPE nnnn */
+ case 0xed: if (IS_8085(cpustate)) { /* LHLX */
cpustate->WZ.w.l = cpustate->DE.w.l;
cpustate->HL.b.l = RM(cpustate, cpustate->WZ.d); cpustate->WZ.w.l++;
cpustate->HL.b.h = RM(cpustate, cpustate->WZ.d);
- } else { M_CALL(1); } /* CALL nnnn undocumented */
+ } else { M_CALL(1); } /* CALL nnnn undocumented */
break;
- case 0xee: cpustate->WZ.b.l = ARG(cpustate); M_XRA(cpustate->WZ.b.l); break; /* XRI nn */
- case 0xef: M_RST(5); break; /* RST 5 */
-
- case 0xf0: M_RET( !(cpustate->AF.b.l&SF) ); break; /* RP */
- case 0xf1: M_POP(AF); break; /* POP A */
- case 0xf2: M_JMP( !(cpustate->AF.b.l & SF) ); break; /* JP nnnn */
- case 0xf3: set_inte(cpustate, 0); break; /* DI */
- case 0xf4: M_CALL( !(cpustate->AF.b.l & SF) ); break; /* CP nnnn */
- case 0xf5: if (IS_8080(cpustate)) cpustate->AF.b.l = (cpustate->AF.b.l&~(X3F|X5F))|VF; // on 8080, VF=1 and X3F=0 and X5F=0 always! (we don't have to check for it elsewhere)
- M_PUSH(AF); break; /* PUSH A */
- case 0xf6: cpustate->WZ.b.l = ARG(cpustate); M_ORA(cpustate->WZ.b.l); break; /* ORI nn */
- case 0xf7: M_RST(6); break; /* RST 6 */
-
- case 0xf8: M_RET( cpustate->AF.b.l & SF ); break; /* RM */
- case 0xf9: cpustate->SP.d = cpustate->HL.d; break; /* SPHL */
- case 0xfa: M_JMP( cpustate->AF.b.l & SF ); break; /* JM nnnn */
- case 0xfb: set_inte(cpustate, 1); cpustate->after_ei = 2; break; /* EI */
- case 0xfc: M_CALL( cpustate->AF.b.l & SF ); break; /* CM nnnn */
- case 0xfd: if (IS_8085(cpustate)) { M_JMP( cpustate->AF.b.l & X5F ); } /* JX nnnn */
- else { M_CALL(1); } /* CALL nnnn undocumented */
+ case 0xee: cpustate->WZ.b.l = ARG(cpustate); M_XRA(cpustate->WZ.b.l); break; /* XRI nn */
+ case 0xef: M_RST(5); break; /* RST 5 */
+
+ case 0xf0: M_RET( !(cpustate->AF.b.l&SF) ); break; /* RP */
+ case 0xf1: M_POP(AF); break; /* POP A */
+ case 0xf2: M_JMP( !(cpustate->AF.b.l & SF) ); break; /* JP nnnn */
+ case 0xf3: set_inte(cpustate, 0); break; /* DI */
+ case 0xf4: M_CALL( !(cpustate->AF.b.l & SF) ); break; /* CP nnnn */
+ case 0xf5: if (IS_8080(cpustate)) cpustate->AF.b.l = (cpustate->AF.b.l&~(X3F|X5F))|VF; // on 8080, VF=1 and X3F=0 and X5F=0 always! (we don't have to check for it elsewhere)
+ M_PUSH(AF); break; /* PUSH A */
+ case 0xf6: cpustate->WZ.b.l = ARG(cpustate); M_ORA(cpustate->WZ.b.l); break; /* ORI nn */
+ case 0xf7: M_RST(6); break; /* RST 6 */
+
+ case 0xf8: M_RET( cpustate->AF.b.l & SF ); break; /* RM */
+ case 0xf9: cpustate->SP.d = cpustate->HL.d; break; /* SPHL */
+ case 0xfa: M_JMP( cpustate->AF.b.l & SF ); break; /* JM nnnn */
+ case 0xfb: set_inte(cpustate, 1); cpustate->after_ei = 2; break; /* EI */
+ case 0xfc: M_CALL( cpustate->AF.b.l & SF ); break; /* CM nnnn */
+ case 0xfd: if (IS_8085(cpustate)) { M_JMP( cpustate->AF.b.l & X5F ); } /* JX nnnn */
+ else { M_CALL(1); } /* CALL nnnn undocumented */
break;
- case 0xfe: cpustate->WZ.b.l = ARG(cpustate); M_CMP(cpustate->WZ.b.l); break; /* CPI nn */
- case 0xff: M_RST(7); break; /* RST 7 */
+ case 0xfe: cpustate->WZ.b.l = ARG(cpustate); M_CMP(cpustate->WZ.b.l); break; /* CPI nn */
+ case 0xff: M_RST(7); break; /* RST 7 */
}
}
@@ -919,7 +919,7 @@ static CPU_EXECUTE( i808x )
debugger_instruction_hook(device, cpustate->PC.d);
/* the instruction after an EI does not take an interrupt, so
- we cannot check immediately; handle post-EI behavior here */
+ we cannot check immediately; handle post-EI behavior here */
if (cpustate->after_ei != 0 && --cpustate->after_ei == 0)
check_for_interrupts(cpustate);
@@ -1199,43 +1199,43 @@ CPU_GET_INFO( i8085 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i8085_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i8085_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i808x); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8085); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i808x); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i808x); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8085); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(i808x); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(i808x); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(i808x); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i808x); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8085); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i808x); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i808x); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8085); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(i808x); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(i808x); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(i808x); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "8085A"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-85"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "8085A"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-85"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
}
}
@@ -1249,17 +1249,17 @@ CPU_GET_INFO( i8080 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8080); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8080); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "8080"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-80"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "8080"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-80"); break;
- default: CPU_GET_INFO_CALL(i8085); break;
+ default: CPU_GET_INFO_CALL(i8085); break;
}
}
@@ -1273,17 +1273,17 @@ CPU_GET_INFO( i8080a )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8080); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8080); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "8080A"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-80"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "8080A"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-80"); break;
- default: CPU_GET_INFO_CALL(i8085); break;
+ default: CPU_GET_INFO_CALL(i8085); break;
}
}
diff --git a/src/emu/cpu/i8085/i8085.h b/src/emu/cpu/i8085/i8085.h
index 5c3f7a26b3b..852df325f9a 100644
--- a/src/emu/cpu/i8085/i8085.h
+++ b/src/emu/cpu/i8085/i8085.h
@@ -19,18 +19,18 @@ enum
};
#define I8085_INTR_LINE 0
-#define I8085_RST55_LINE 1
-#define I8085_RST65_LINE 2
-#define I8085_RST75_LINE 3
-
-#define I8085_STATUS_INTA 0x01
-#define I8085_STATUS_WO 0x02
-#define I8085_STATUS_STACK 0x04
-#define I8085_STATUS_HLTA 0x08
-#define I8085_STATUS_OUT 0x10
-#define I8085_STATUS_M1 0x20
-#define I8085_STATUS_INP 0x40
-#define I8085_STATUS_MEMR 0x80
+#define I8085_RST55_LINE 1
+#define I8085_RST65_LINE 2
+#define I8085_RST75_LINE 3
+
+#define I8085_STATUS_INTA 0x01
+#define I8085_STATUS_WO 0x02
+#define I8085_STATUS_STACK 0x04
+#define I8085_STATUS_HLTA 0x08
+#define I8085_STATUS_OUT 0x10
+#define I8085_STATUS_M1 0x20
+#define I8085_STATUS_INP 0x40
+#define I8085_STATUS_MEMR 0x80
/***************************************************************************
TYPE DEFINITIONS
@@ -38,10 +38,10 @@ enum
struct i8085_config
{
- devcb_write8 out_status_func; /* STATUS changed callback */
- devcb_write_line out_inte_func; /* INTE changed callback */
- devcb_read_line in_sid_func; /* SID changed callback (8085A only) */
- devcb_write_line out_sod_func; /* SOD changed callback (8085A only) */
+ devcb_write8 out_status_func; /* STATUS changed callback */
+ devcb_write_line out_inte_func; /* INTE changed callback */
+ devcb_read_line in_sid_func; /* SID changed callback (8085A only) */
+ devcb_write_line out_sod_func; /* SOD changed callback (8085A only) */
};
#define I8085_CONFIG(name) const i8085_config (name) =
@@ -55,6 +55,6 @@ DECLARE_LEGACY_CPU_DEVICE(I8085A, i8085);
CPU_DISASSEMBLE( i8085 );
-#define i8085_set_sid(cpu, sid) (cpu)->state().set_state_int(I8085_SID, sid)
+#define i8085_set_sid(cpu, sid) (cpu)->state().set_state_int(I8085_SID, sid)
#endif
diff --git a/src/emu/cpu/i8085/i8085cpu.h b/src/emu/cpu/i8085/i8085cpu.h
index bc4a5297082..f3f776ade46 100644
--- a/src/emu/cpu/i8085/i8085cpu.h
+++ b/src/emu/cpu/i8085/i8085cpu.h
@@ -39,26 +39,26 @@
#define M_MVI(R) R=ARG(cpustate)
/* rotate */
-#define M_RLC { \
- cpustate->AF.b.h = (cpustate->AF.b.h << 1) | (cpustate->AF.b.h >> 7); \
- cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h & CF); \
+#define M_RLC { \
+ cpustate->AF.b.h = (cpustate->AF.b.h << 1) | (cpustate->AF.b.h >> 7); \
+ cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h & CF); \
}
-#define M_RRC { \
- cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h & CF); \
- cpustate->AF.b.h = (cpustate->AF.b.h >> 1) | (cpustate->AF.b.h << 7); \
+#define M_RRC { \
+ cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h & CF); \
+ cpustate->AF.b.h = (cpustate->AF.b.h >> 1) | (cpustate->AF.b.h << 7); \
}
-#define M_RAL { \
- int c = cpustate->AF.b.l&CF; \
- cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h >> 7); \
- cpustate->AF.b.h = (cpustate->AF.b.h << 1) | c; \
+#define M_RAL { \
+ int c = cpustate->AF.b.l&CF; \
+ cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h >> 7); \
+ cpustate->AF.b.h = (cpustate->AF.b.h << 1) | c; \
}
-#define M_RAR { \
- int c = (cpustate->AF.b.l&CF) << 7; \
- cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h & CF); \
- cpustate->AF.b.h = (cpustate->AF.b.h >> 1) | c; \
+#define M_RAR { \
+ int c = (cpustate->AF.b.l&CF) << 7; \
+ cpustate->AF.b.l = (cpustate->AF.b.l & 0xfe) | (cpustate->AF.b.h & CF); \
+ cpustate->AF.b.h = (cpustate->AF.b.h >> 1) | c; \
}
/* logical */
@@ -71,117 +71,116 @@
#define M_DCR(R) {UINT8 hc = ((R & 0x0f) != 0x00) ? HF : 0; --R; cpustate->AF.b.l= (cpustate->AF.b.l & CF ) | ZSP[R] | hc | VF; }
/* arithmetic */
-#define M_ADD(R) { \
- int q = cpustate->AF.b.h+R; \
- cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|((cpustate->AF.b.h^q^R)&HF); \
- cpustate->AF.b.h=q; \
+#define M_ADD(R) { \
+ int q = cpustate->AF.b.h+R; \
+ cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|((cpustate->AF.b.h^q^R)&HF); \
+ cpustate->AF.b.h=q; \
}
-#define M_ADC(R) { \
- int q = cpustate->AF.b.h+R+(cpustate->AF.b.l&CF); \
- cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|((cpustate->AF.b.h^q^R)&HF); \
- cpustate->AF.b.h=q; \
+#define M_ADC(R) { \
+ int q = cpustate->AF.b.h+R+(cpustate->AF.b.l&CF); \
+ cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|((cpustate->AF.b.h^q^R)&HF); \
+ cpustate->AF.b.h=q; \
}
-#define M_SUB(R) { \
- int q = cpustate->AF.b.h-R; \
- cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(cpustate->AF.b.h^q^R)&HF)|VF; \
- cpustate->AF.b.h=q; \
+#define M_SUB(R) { \
+ int q = cpustate->AF.b.h-R; \
+ cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(cpustate->AF.b.h^q^R)&HF)|VF; \
+ cpustate->AF.b.h=q; \
}
-#define M_SBB(R) { \
- int q = cpustate->AF.b.h-R-(cpustate->AF.b.l&CF); \
- cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(cpustate->AF.b.h^q^R)&HF)|VF; \
- cpustate->AF.b.h=q; \
+#define M_SBB(R) { \
+ int q = cpustate->AF.b.h-R-(cpustate->AF.b.l&CF); \
+ cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(cpustate->AF.b.h^q^R)&HF)|VF; \
+ cpustate->AF.b.h=q; \
}
-#define M_CMP(R) { \
- int q = cpustate->AF.b.h-R; \
- cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(cpustate->AF.b.h^q^R)&HF)|VF; \
+#define M_CMP(R) { \
+ int q = cpustate->AF.b.h-R; \
+ cpustate->AF.b.l=ZSP[q&255]|((q>>8)&CF)|(~(cpustate->AF.b.h^q^R)&HF)|VF; \
}
-#define M_DAD(R) { \
- int q = cpustate->HL.d + cpustate->R.d; \
- cpustate->AF.b.l = (cpustate->AF.b.l & ~CF) | (q>>16 & CF ); \
- cpustate->HL.w.l = q; \
+#define M_DAD(R) { \
+ int q = cpustate->HL.d + cpustate->R.d; \
+ cpustate->AF.b.l = (cpustate->AF.b.l & ~CF) | (q>>16 & CF ); \
+ cpustate->HL.w.l = q; \
}
// DSUB is 8085-only, not sure if H flag handling is correct
-#define M_DSUB(cpustate) { \
- int q = cpustate->HL.b.l-cpustate->BC.b.l; \
- cpustate->AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
- ((cpustate->HL.b.l^q^cpustate->BC.b.l)&HF)| \
- (((cpustate->BC.b.l^cpustate->HL.b.l)&(cpustate->HL.b.l^q)&SF)>>5); \
- cpustate->HL.b.l=q; \
- q = cpustate->HL.b.h-cpustate->BC.b.h-(cpustate->AF.b.l&CF); \
- cpustate->AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
- ((cpustate->HL.b.h^q^cpustate->BC.b.h)&HF)| \
- (((cpustate->BC.b.h^cpustate->HL.b.h)&(cpustate->HL.b.h^q)&SF)>>5); \
- if (cpustate->HL.b.l!=0) cpustate->AF.b.l&=~ZF; \
+#define M_DSUB(cpustate) { \
+ int q = cpustate->HL.b.l-cpustate->BC.b.l; \
+ cpustate->AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
+ ((cpustate->HL.b.l^q^cpustate->BC.b.l)&HF)| \
+ (((cpustate->BC.b.l^cpustate->HL.b.l)&(cpustate->HL.b.l^q)&SF)>>5); \
+ cpustate->HL.b.l=q; \
+ q = cpustate->HL.b.h-cpustate->BC.b.h-(cpustate->AF.b.l&CF); \
+ cpustate->AF.b.l=ZS[q&255]|((q>>8)&CF)|VF| \
+ ((cpustate->HL.b.h^q^cpustate->BC.b.h)&HF)| \
+ (((cpustate->BC.b.h^cpustate->HL.b.h)&(cpustate->HL.b.h^q)&SF)>>5); \
+ if (cpustate->HL.b.l!=0) cpustate->AF.b.l&=~ZF; \
}
/* i/o */
-#define M_IN \
- cpustate->STATUS = 0x42; \
- cpustate->WZ.d=ARG(cpustate); \
+#define M_IN \
+ cpustate->STATUS = 0x42; \
+ cpustate->WZ.d=ARG(cpustate); \
cpustate->AF.b.h=cpustate->io->read_byte(cpustate->WZ.d);
-#define M_OUT \
- cpustate->STATUS = 0x10; \
- cpustate->WZ.d=ARG(cpustate); \
+#define M_OUT \
+ cpustate->STATUS = 0x10; \
+ cpustate->WZ.d=ARG(cpustate); \
cpustate->io->write_byte(cpustate->WZ.d,cpustate->AF.b.h)
/* stack */
-#define M_PUSH(R) { \
- cpustate->STATUS = 0x04; \
- cpustate->program->write_byte(--cpustate->SP.w.l, cpustate->R.b.h); \
- cpustate->program->write_byte(--cpustate->SP.w.l, cpustate->R.b.l); \
+#define M_PUSH(R) { \
+ cpustate->STATUS = 0x04; \
+ cpustate->program->write_byte(--cpustate->SP.w.l, cpustate->R.b.h); \
+ cpustate->program->write_byte(--cpustate->SP.w.l, cpustate->R.b.l); \
}
-#define M_POP(R) { \
- cpustate->STATUS = 0x86; \
- cpustate->R.b.l = cpustate->program->read_byte(cpustate->SP.w.l++); \
- cpustate->R.b.h = cpustate->program->read_byte(cpustate->SP.w.l++); \
+#define M_POP(R) { \
+ cpustate->STATUS = 0x86; \
+ cpustate->R.b.l = cpustate->program->read_byte(cpustate->SP.w.l++); \
+ cpustate->R.b.h = cpustate->program->read_byte(cpustate->SP.w.l++); \
}
/* jumps */
// On 8085 jump if condition is not satisfied is shorter
-#define M_JMP(cc) { \
- if (cc) { \
- cpustate->PC.w.l = ARG16(cpustate); \
- } else { \
- cpustate->PC.w.l += 2; \
- cpustate->icount += (IS_8085(cpustate)) ? 3 : 0; \
- } \
+#define M_JMP(cc) { \
+ if (cc) { \
+ cpustate->PC.w.l = ARG16(cpustate); \
+ } else { \
+ cpustate->PC.w.l += 2; \
+ cpustate->icount += (IS_8085(cpustate)) ? 3 : 0; \
+ } \
}
// On 8085 call if condition is not satisfied is 9 ticks
-#define M_CALL(cc) \
-{ \
- if (cc) \
- { \
- UINT16 a = ARG16(cpustate); \
- cpustate->icount -= (IS_8085(cpustate)) ? 7 : 6 ; \
- M_PUSH(PC); \
- cpustate->PC.d = a; \
- } else { \
- cpustate->PC.w.l += 2; \
- cpustate->icount += (IS_8085(cpustate)) ? 2 : 0; \
- } \
+#define M_CALL(cc) \
+{ \
+ if (cc) \
+ { \
+ UINT16 a = ARG16(cpustate); \
+ cpustate->icount -= (IS_8085(cpustate)) ? 7 : 6 ; \
+ M_PUSH(PC); \
+ cpustate->PC.d = a; \
+ } else { \
+ cpustate->PC.w.l += 2; \
+ cpustate->icount += (IS_8085(cpustate)) ? 2 : 0; \
+ } \
}
// conditional RET only
-#define M_RET(cc) \
-{ \
- if (cc) \
- { \
- cpustate->icount -= 6; \
- M_POP(PC); \
- } \
+#define M_RET(cc) \
+{ \
+ if (cc) \
+ { \
+ cpustate->icount -= 6; \
+ M_POP(PC); \
+ } \
}
-#define M_RST(nn) { \
- M_PUSH(PC); \
- cpustate->PC.d = 8 * nn; \
+#define M_RST(nn) { \
+ M_PUSH(PC); \
+ cpustate->PC.d = 8 * nn; \
}
-
diff --git a/src/emu/cpu/i86/i286.c b/src/emu/cpu/i86/i286.c
index 95b075a2616..350c0ea6e2b 100644
--- a/src/emu/cpu/i86/i286.c
+++ b/src/emu/cpu/i86/i286.c
@@ -12,10 +12,10 @@
#define LOG(x) do { if (VERBOSE) mame_printf_debug x; } while (0)
/* All post-i286 CPUs have a 16MB address space */
-#define AMASK cpustate->amask
+#define AMASK cpustate->amask
-#define INPUT_LINE_A20 1
+#define INPUT_LINE_A20 1
#include "i286.h"
@@ -28,22 +28,22 @@
/* I86 registers */
union i80286basicregs
{ /* eight general registers */
- UINT16 w[8]; /* viewed as 16 bits registers */
- UINT8 b[16]; /* or as 8 bit registers */
+ UINT16 w[8]; /* viewed as 16 bits registers */
+ UINT8 b[16]; /* or as 8 bit registers */
};
struct i80286_state
{
- i80286basicregs regs;
- offs_t fetch_xor;
- UINT32 amask; /* address mask */
- UINT32 pc;
- UINT32 prevpc;
- UINT16 flags;
- UINT16 msw;
- UINT32 base[4];
- UINT16 sregs[4];
- UINT16 limit[4];
+ i80286basicregs regs;
+ offs_t fetch_xor;
+ UINT32 amask; /* address mask */
+ UINT32 pc;
+ UINT32 prevpc;
+ UINT16 flags;
+ UINT16 msw;
+ UINT32 base[4];
+ UINT16 sregs[4];
+ UINT16 limit[4];
UINT8 rights[4];
bool valid[4];
struct {
@@ -61,25 +61,25 @@ struct i80286_state
address_space *program;
direct_read_data *direct;
address_space *io;
- INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */
- UINT8 ParityVal;
- UINT8 TF, IF; /* 0 or 1 valued flags */
- UINT8 int_vector;
- INT8 nmi_state;
- INT8 irq_state;
- INT8 test_state;
+ INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */
+ UINT8 ParityVal;
+ UINT8 TF, IF; /* 0 or 1 valued flags */
+ UINT8 int_vector;
+ INT8 nmi_state;
+ INT8 irq_state;
+ INT8 test_state;
UINT8 rep_in_progress;
- INT32 extra_cycles; /* extra cycles for interrupts */
+ INT32 extra_cycles; /* extra cycles for interrupts */
int halted; /* Is the CPU halted ? */
int trap_level;
int icount;
char seg_prefix;
- UINT8 prefix_seg;
+ UINT8 prefix_seg;
unsigned ea;
UINT16 eo; /* HJB 12/13/98 effective offset of the address (before segment is added) */
- UINT8 ea_seg; /* effective segment of the address */
+ UINT8 ea_seg; /* effective segment of the address */
};
INLINE i80286_state *get_safe_token(device_t *device)
@@ -254,7 +254,7 @@ static CPU_EXECUTE( i80286 )
{
i80286_trap2(cpustate,e);
}
- }
+ }
/* adjust for any interrupts that came in */
cpustate->icount -= cpustate->extra_cycles;
@@ -340,10 +340,10 @@ static CPU_SET_INFO( i80286 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_A20: i80286_set_a20_line(cpustate, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_A20: i80286_set_a20_line(cpustate, info->i); break;
case CPUINFO_INT_PC:
case CPUINFO_INT_REGISTER + I80286_PC:
@@ -362,7 +362,7 @@ static CPU_SET_INFO( i80286 )
}
break;
- case CPUINFO_INT_REGISTER + I80286_IP: cpustate->pc = cpustate->base[CS] + info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_IP: cpustate->pc = cpustate->base[CS] + info->i; break;
case CPUINFO_INT_SP:
if (PM)
{
@@ -383,20 +383,20 @@ static CPU_SET_INFO( i80286 )
}
break;
- case CPUINFO_INT_REGISTER + I80286_SP: cpustate->regs.w[SP] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = info->i; ExpandFlags(info->i); break;
- case CPUINFO_INT_REGISTER + I80286_AX: cpustate->regs.w[AX] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_CX: cpustate->regs.w[CX] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_DX: cpustate->regs.w[DX] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_BX: cpustate->regs.w[BX] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_BP: cpustate->regs.w[BP] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_SI: cpustate->regs.w[SI] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_DI: cpustate->regs.w[DI] = info->i; break;
- case CPUINFO_INT_REGISTER + I80286_ES: cpustate->sregs[ES] = info->i; cpustate->base[ES] = SegBase(ES); break;
- case CPUINFO_INT_REGISTER + I80286_CS: cpustate->sregs[CS] = info->i; cpustate->base[CS] = SegBase(CS); break;
- case CPUINFO_INT_REGISTER + I80286_SS: cpustate->sregs[SS] = info->i; cpustate->base[SS] = SegBase(SS); break;
- case CPUINFO_INT_REGISTER + I80286_DS: cpustate->sregs[DS] = info->i; cpustate->base[DS] = SegBase(DS); break;
- case CPUINFO_INT_REGISTER + I80286_VECTOR: cpustate->int_vector = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_SP: cpustate->regs.w[SP] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = info->i; ExpandFlags(info->i); break;
+ case CPUINFO_INT_REGISTER + I80286_AX: cpustate->regs.w[AX] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_CX: cpustate->regs.w[CX] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_DX: cpustate->regs.w[DX] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_BX: cpustate->regs.w[BX] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_BP: cpustate->regs.w[BP] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_SI: cpustate->regs.w[SI] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_DI: cpustate->regs.w[DI] = info->i; break;
+ case CPUINFO_INT_REGISTER + I80286_ES: cpustate->sregs[ES] = info->i; cpustate->base[ES] = SegBase(ES); break;
+ case CPUINFO_INT_REGISTER + I80286_CS: cpustate->sregs[CS] = info->i; cpustate->base[CS] = SegBase(CS); break;
+ case CPUINFO_INT_REGISTER + I80286_SS: cpustate->sregs[SS] = info->i; cpustate->base[SS] = SegBase(SS); break;
+ case CPUINFO_INT_REGISTER + I80286_DS: cpustate->sregs[DS] = info->i; cpustate->base[DS] = SegBase(DS); break;
+ case CPUINFO_INT_REGISTER + I80286_VECTOR: cpustate->int_vector = info->i; break;
}
}
@@ -413,76 +413,76 @@ CPU_GET_INFO( i80286 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i80286_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prevpc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i80286_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prevpc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + I80286_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + I80286_IP: info->i = cpustate->pc - cpustate->base[CS]; break;
- case CPUINFO_INT_SP: info->i = cpustate->base[SS] + cpustate->regs.w[SP]; break;
- case CPUINFO_INT_REGISTER + I80286_SP: info->i = cpustate->regs.w[SP]; break;
- case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = CompressFlags(); info->i = cpustate->flags; break;
- case CPUINFO_INT_REGISTER + I80286_AX: info->i = cpustate->regs.w[AX]; break;
- case CPUINFO_INT_REGISTER + I80286_CX: info->i = cpustate->regs.w[CX]; break;
- case CPUINFO_INT_REGISTER + I80286_DX: info->i = cpustate->regs.w[DX]; break;
- case CPUINFO_INT_REGISTER + I80286_BX: info->i = cpustate->regs.w[BX]; break;
- case CPUINFO_INT_REGISTER + I80286_BP: info->i = cpustate->regs.w[BP]; break;
- case CPUINFO_INT_REGISTER + I80286_SI: info->i = cpustate->regs.w[SI]; break;
- case CPUINFO_INT_REGISTER + I80286_DI: info->i = cpustate->regs.w[DI]; break;
- case CPUINFO_INT_REGISTER + I80286_ES: info->i = cpustate->sregs[ES]; break;
- case CPUINFO_INT_REGISTER + I80286_CS: info->i = cpustate->sregs[CS]; break;
- case CPUINFO_INT_REGISTER + I80286_SS: info->i = cpustate->sregs[SS]; break;
- case CPUINFO_INT_REGISTER + I80286_DS: info->i = cpustate->sregs[DS]; break;
- case CPUINFO_INT_REGISTER + I80286_VECTOR: info->i = cpustate->int_vector; break;
- case CPUINFO_INT_REGISTER + I80286_MSW: info->i = cpustate->msw; break;
- case CPUINFO_INT_REGISTER + I80286_GDTR_BASE: info->i = cpustate->gdtr.base; break;
- case CPUINFO_INT_REGISTER + I80286_GDTR_LIMIT: info->i = cpustate->gdtr.limit; break;
- case CPUINFO_INT_REGISTER + I80286_IDTR_BASE: info->i = cpustate->idtr.base; break;
- case CPUINFO_INT_REGISTER + I80286_IDTR_LIMIT: info->i = cpustate->idtr.limit; break;
- case CPUINFO_INT_REGISTER + I80286_LDTR_BASE: info->i = cpustate->ldtr.base; break;
- case CPUINFO_INT_REGISTER + I80286_LDTR_LIMIT: info->i = cpustate->ldtr.limit; break;
- case CPUINFO_INT_REGISTER + I80286_TR_BASE: info->i = cpustate->tr.base; break;
- case CPUINFO_INT_REGISTER + I80286_TR_LIMIT: info->i = cpustate->tr.limit; break;
+ case CPUINFO_INT_REGISTER + I80286_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + I80286_IP: info->i = cpustate->pc - cpustate->base[CS]; break;
+ case CPUINFO_INT_SP: info->i = cpustate->base[SS] + cpustate->regs.w[SP]; break;
+ case CPUINFO_INT_REGISTER + I80286_SP: info->i = cpustate->regs.w[SP]; break;
+ case CPUINFO_INT_REGISTER + I80286_FLAGS: cpustate->flags = CompressFlags(); info->i = cpustate->flags; break;
+ case CPUINFO_INT_REGISTER + I80286_AX: info->i = cpustate->regs.w[AX]; break;
+ case CPUINFO_INT_REGISTER + I80286_CX: info->i = cpustate->regs.w[CX]; break;
+ case CPUINFO_INT_REGISTER + I80286_DX: info->i = cpustate->regs.w[DX]; break;
+ case CPUINFO_INT_REGISTER + I80286_BX: info->i = cpustate->regs.w[BX]; break;
+ case CPUINFO_INT_REGISTER + I80286_BP: info->i = cpustate->regs.w[BP]; break;
+ case CPUINFO_INT_REGISTER + I80286_SI: info->i = cpustate->regs.w[SI]; break;
+ case CPUINFO_INT_REGISTER + I80286_DI: info->i = cpustate->regs.w[DI]; break;
+ case CPUINFO_INT_REGISTER + I80286_ES: info->i = cpustate->sregs[ES]; break;
+ case CPUINFO_INT_REGISTER + I80286_CS: info->i = cpustate->sregs[CS]; break;
+ case CPUINFO_INT_REGISTER + I80286_SS: info->i = cpustate->sregs[SS]; break;
+ case CPUINFO_INT_REGISTER + I80286_DS: info->i = cpustate->sregs[DS]; break;
+ case CPUINFO_INT_REGISTER + I80286_VECTOR: info->i = cpustate->int_vector; break;
+ case CPUINFO_INT_REGISTER + I80286_MSW: info->i = cpustate->msw; break;
+ case CPUINFO_INT_REGISTER + I80286_GDTR_BASE: info->i = cpustate->gdtr.base; break;
+ case CPUINFO_INT_REGISTER + I80286_GDTR_LIMIT: info->i = cpustate->gdtr.limit; break;
+ case CPUINFO_INT_REGISTER + I80286_IDTR_BASE: info->i = cpustate->idtr.base; break;
+ case CPUINFO_INT_REGISTER + I80286_IDTR_LIMIT: info->i = cpustate->idtr.limit; break;
+ case CPUINFO_INT_REGISTER + I80286_LDTR_BASE: info->i = cpustate->ldtr.base; break;
+ case CPUINFO_INT_REGISTER + I80286_LDTR_LIMIT: info->i = cpustate->ldtr.limit; break;
+ case CPUINFO_INT_REGISTER + I80286_TR_BASE: info->i = cpustate->tr.base; break;
+ case CPUINFO_INT_REGISTER + I80286_TR_LIMIT: info->i = cpustate->tr.limit; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i80286); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80286); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i80286); break;
- case CPUINFO_FCT_EXIT: info->exit = NULL; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80286); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80286); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i80286); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80286); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i80286); break;
+ case CPUINFO_FCT_EXIT: info->exit = NULL; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80286); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80286); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "80286"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 80286"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.4"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Real mode i286 emulator v1.4 by Fabrice Frances\n(initial work cpustate->based on David Hedley's pcemu)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "80286"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 80286"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.4"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Real mode i286 emulator v1.4 by Fabrice Frances\n(initial work cpustate->based on David Hedley's pcemu)"); break;
case CPUINFO_STR_FLAGS:
cpustate->flags = CompressFlags();
@@ -505,35 +505,35 @@ CPU_GET_INFO( i80286 )
cpustate->flags & 0x0001 ? 'C' : '.');
break;
- case CPUINFO_STR_REGISTER + I80286_PC: sprintf(info->s, "PC:%06X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + I80286_IP: sprintf(info->s, "IP: %04X", cpustate->pc - cpustate->base[CS]); break;
- case CPUINFO_STR_REGISTER + I80286_SP: sprintf(info->s, "SP: %04X", cpustate->regs.w[SP]); break;
- case CPUINFO_STR_REGISTER + I80286_FLAGS: sprintf(info->s, "F:%04X", cpustate->flags); break;
- case CPUINFO_STR_REGISTER + I80286_AX: sprintf(info->s, "AX:%04X", cpustate->regs.w[AX]); break;
- case CPUINFO_STR_REGISTER + I80286_CX: sprintf(info->s, "CX:%04X", cpustate->regs.w[CX]); break;
- case CPUINFO_STR_REGISTER + I80286_DX: sprintf(info->s, "DX:%04X", cpustate->regs.w[DX]); break;
- case CPUINFO_STR_REGISTER + I80286_BX: sprintf(info->s, "BX:%04X", cpustate->regs.w[BX]); break;
- case CPUINFO_STR_REGISTER + I80286_BP: sprintf(info->s, "BP:%04X", cpustate->regs.w[BP]); break;
- case CPUINFO_STR_REGISTER + I80286_SI: sprintf(info->s, "SI: %04X", cpustate->regs.w[SI]); break;
- case CPUINFO_STR_REGISTER + I80286_DI: sprintf(info->s, "DI: %04X", cpustate->regs.w[DI]); break;
- case CPUINFO_STR_REGISTER + I80286_CS: sprintf(info->s, "CS: %04X %02X", cpustate->sregs[CS], cpustate->rights[CS]); break;
- case CPUINFO_STR_REGISTER + I80286_CS_2: sprintf(info->s, "CSDESC: %06X %04X", cpustate->base[CS], cpustate->limit[CS]); break;
- case CPUINFO_STR_REGISTER + I80286_SS: sprintf(info->s, "SS: %04X %02X", cpustate->sregs[SS], cpustate->rights[SS]); break;
- case CPUINFO_STR_REGISTER + I80286_SS_2: sprintf(info->s, "SSDESC: %06X %04X", cpustate->base[SS], cpustate->limit[SS]); break;
- case CPUINFO_STR_REGISTER + I80286_DS: sprintf(info->s, "DS: %04X %02X", cpustate->sregs[DS], cpustate->rights[DS]); break;
- case CPUINFO_STR_REGISTER + I80286_DS_2: sprintf(info->s, "DSDESC: %06X %04X", cpustate->base[DS], cpustate->limit[DS]); break;
- case CPUINFO_STR_REGISTER + I80286_ES: sprintf(info->s, "ES: %04X %02X", cpustate->sregs[ES], cpustate->rights[ES]); break;
- case CPUINFO_STR_REGISTER + I80286_ES_2: sprintf(info->s, "ESDESC: %06X %04X", cpustate->base[ES], cpustate->limit[ES]); break;
- case CPUINFO_STR_REGISTER + I80286_VECTOR: sprintf(info->s, "V:%02X", cpustate->int_vector); break;
- case CPUINFO_STR_REGISTER + I80286_MSW: sprintf(info->s, "MSW:%04X", cpustate->msw); break;
- case CPUINFO_STR_REGISTER + I80286_TR_BASE: sprintf(info->s, "TRBASE: %06X", cpustate->tr.base); break;
- case CPUINFO_STR_REGISTER + I80286_TR_LIMIT: sprintf(info->s, "TRLIM: %04X", cpustate->tr.limit); break;
- case CPUINFO_STR_REGISTER + I80286_GDTR_BASE: sprintf(info->s, "GDTRBASE: %06X", cpustate->gdtr.base); break;
- case CPUINFO_STR_REGISTER + I80286_GDTR_LIMIT: sprintf(info->s, "GDTRLIM: %04X", cpustate->gdtr.limit); break;
- case CPUINFO_STR_REGISTER + I80286_LDTR_BASE: sprintf(info->s, "LDTR: %04X %02X", cpustate->ldtr.sel, cpustate->ldtr.rights); break;
- case CPUINFO_STR_REGISTER + I80286_LDTR_LIMIT: sprintf(info->s, "LDTRDESC: %06X %04X", cpustate->ldtr.base, cpustate->ldtr.limit); break;
- case CPUINFO_STR_REGISTER + I80286_IDTR_BASE: sprintf(info->s, "IDTRBASE: %06X", cpustate->idtr.base); break;
- case CPUINFO_STR_REGISTER + I80286_IDTR_LIMIT: sprintf(info->s, "IDTRLIM: %04X", cpustate->idtr.limit); break;
+ case CPUINFO_STR_REGISTER + I80286_PC: sprintf(info->s, "PC:%06X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + I80286_IP: sprintf(info->s, "IP: %04X", cpustate->pc - cpustate->base[CS]); break;
+ case CPUINFO_STR_REGISTER + I80286_SP: sprintf(info->s, "SP: %04X", cpustate->regs.w[SP]); break;
+ case CPUINFO_STR_REGISTER + I80286_FLAGS: sprintf(info->s, "F:%04X", cpustate->flags); break;
+ case CPUINFO_STR_REGISTER + I80286_AX: sprintf(info->s, "AX:%04X", cpustate->regs.w[AX]); break;
+ case CPUINFO_STR_REGISTER + I80286_CX: sprintf(info->s, "CX:%04X", cpustate->regs.w[CX]); break;
+ case CPUINFO_STR_REGISTER + I80286_DX: sprintf(info->s, "DX:%04X", cpustate->regs.w[DX]); break;
+ case CPUINFO_STR_REGISTER + I80286_BX: sprintf(info->s, "BX:%04X", cpustate->regs.w[BX]); break;
+ case CPUINFO_STR_REGISTER + I80286_BP: sprintf(info->s, "BP:%04X", cpustate->regs.w[BP]); break;
+ case CPUINFO_STR_REGISTER + I80286_SI: sprintf(info->s, "SI: %04X", cpustate->regs.w[SI]); break;
+ case CPUINFO_STR_REGISTER + I80286_DI: sprintf(info->s, "DI: %04X", cpustate->regs.w[DI]); break;
+ case CPUINFO_STR_REGISTER + I80286_CS: sprintf(info->s, "CS: %04X %02X", cpustate->sregs[CS], cpustate->rights[CS]); break;
+ case CPUINFO_STR_REGISTER + I80286_CS_2: sprintf(info->s, "CSDESC: %06X %04X", cpustate->base[CS], cpustate->limit[CS]); break;
+ case CPUINFO_STR_REGISTER + I80286_SS: sprintf(info->s, "SS: %04X %02X", cpustate->sregs[SS], cpustate->rights[SS]); break;
+ case CPUINFO_STR_REGISTER + I80286_SS_2: sprintf(info->s, "SSDESC: %06X %04X", cpustate->base[SS], cpustate->limit[SS]); break;
+ case CPUINFO_STR_REGISTER + I80286_DS: sprintf(info->s, "DS: %04X %02X", cpustate->sregs[DS], cpustate->rights[DS]); break;
+ case CPUINFO_STR_REGISTER + I80286_DS_2: sprintf(info->s, "DSDESC: %06X %04X", cpustate->base[DS], cpustate->limit[DS]); break;
+ case CPUINFO_STR_REGISTER + I80286_ES: sprintf(info->s, "ES: %04X %02X", cpustate->sregs[ES], cpustate->rights[ES]); break;
+ case CPUINFO_STR_REGISTER + I80286_ES_2: sprintf(info->s, "ESDESC: %06X %04X", cpustate->base[ES], cpustate->limit[ES]); break;
+ case CPUINFO_STR_REGISTER + I80286_VECTOR: sprintf(info->s, "V:%02X", cpustate->int_vector); break;
+ case CPUINFO_STR_REGISTER + I80286_MSW: sprintf(info->s, "MSW:%04X", cpustate->msw); break;
+ case CPUINFO_STR_REGISTER + I80286_TR_BASE: sprintf(info->s, "TRBASE: %06X", cpustate->tr.base); break;
+ case CPUINFO_STR_REGISTER + I80286_TR_LIMIT: sprintf(info->s, "TRLIM: %04X", cpustate->tr.limit); break;
+ case CPUINFO_STR_REGISTER + I80286_GDTR_BASE: sprintf(info->s, "GDTRBASE: %06X", cpustate->gdtr.base); break;
+ case CPUINFO_STR_REGISTER + I80286_GDTR_LIMIT: sprintf(info->s, "GDTRLIM: %04X", cpustate->gdtr.limit); break;
+ case CPUINFO_STR_REGISTER + I80286_LDTR_BASE: sprintf(info->s, "LDTR: %04X %02X", cpustate->ldtr.sel, cpustate->ldtr.rights); break;
+ case CPUINFO_STR_REGISTER + I80286_LDTR_LIMIT: sprintf(info->s, "LDTRDESC: %06X %04X", cpustate->ldtr.base, cpustate->ldtr.limit); break;
+ case CPUINFO_STR_REGISTER + I80286_IDTR_BASE: sprintf(info->s, "IDTRBASE: %06X", cpustate->idtr.base); break;
+ case CPUINFO_STR_REGISTER + I80286_IDTR_LIMIT: sprintf(info->s, "IDTRLIM: %04X", cpustate->idtr.limit); break;
}
}
diff --git a/src/emu/cpu/i86/i86.c b/src/emu/cpu/i86/i86.c
index 910bf09b509..c55097955e4 100644
--- a/src/emu/cpu/i86/i86.c
+++ b/src/emu/cpu/i86/i86.c
@@ -18,14 +18,14 @@ extern int i386_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, int mode)
/* All pre-i286 CPUs have a 1MB address space */
-#define AMASK 0xfffff
+#define AMASK 0xfffff
/* I86 registers */
union i8086basicregs
-{ /* eight general registers */
- UINT16 w[8]; /* viewed as 16 bits registers */
- UINT8 b[16]; /* or as 8 bit registers */
+{ /* eight general registers */
+ UINT16 w[8]; /* viewed as 16 bits registers */
+ UINT8 b[16]; /* or as 8 bit registers */
};
struct i8086_state
@@ -38,10 +38,10 @@ struct i8086_state
UINT16 sregs[4];
UINT16 flags;
device_irq_acknowledge_callback irq_callback;
- INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */
+ INT32 AuxVal, OverVal, SignVal, ZeroVal, CarryVal, DirVal; /* 0 or non-0 valued flags */
UINT8 ParityVal;
- UINT8 TF, IF; /* 0 or 1 valued flags */
- UINT8 MF; /* V30 mode flag */
+ UINT8 TF, IF; /* 0 or 1 valued flags */
+ UINT8 MF; /* V30 mode flag */
UINT8 int_vector;
INT8 nmi_state;
INT8 irq_state;
@@ -60,23 +60,23 @@ struct i8086_state
address_space *io;
int icount;
- char seg_prefix; /* prefix segment indicator */
- UINT8 prefix_seg; /* The prefixed segment */
+ char seg_prefix; /* prefix segment indicator */
+ UINT8 prefix_seg; /* The prefixed segment */
unsigned ea;
UINT16 eo; /* HJB 12/13/98 effective offset of the address (before segment is added) */
- UINT8 ea_seg; /* effective segment of the address */
+ UINT8 ea_seg; /* effective segment of the address */
- devcb_resolved_write_line out_tmrout0_func;
- devcb_resolved_write_line out_tmrout1_func;
+ devcb_resolved_write_line out_tmrout0_func;
+ devcb_resolved_write_line out_tmrout1_func;
};
INLINE i8086_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8086 ||
- device->type() == I8088 ||
- device->type() == I80186 ||
- device->type() == I80188);
+ device->type() == I8088 ||
+ device->type() == I80186 ||
+ device->type() == I80188);
return (i8086_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -133,8 +133,8 @@ static void i8086_state_register(device_t *device)
device->save_item(NAME(cpustate->irq_state));
device->save_item(NAME(cpustate->extra_cycles));
device->save_item(NAME(cpustate->halted));
- device->save_item(NAME(cpustate->test_state)); /* PJB 03/05 */
- device->save_item(NAME(cpustate->rep_in_progress)); /* PJB 03/05 */
+ device->save_item(NAME(cpustate->test_state)); /* PJB 03/05 */
+ device->save_item(NAME(cpustate->rep_in_progress)); /* PJB 03/05 */
}
static CPU_INIT( i8086 )
@@ -375,7 +375,7 @@ static CPU_EXECUTE( i80186 )
while (cpustate->icount > 0)
{
LOG(("[%04x:%04x]=%02x\tAX=%04x\tBX=%04x\tCX=%04x\tDX=%04x\n", cpustate->sregs[CS], cpustate->pc, ReadByte(cpustate->pc), cpustate->regs.w[AX],
- cpustate->regs.w[BX], cpustate->regs.w[CX], cpustate->regs.w[DX]));
+ cpustate->regs.w[BX], cpustate->regs.w[CX], cpustate->regs.w[DX]));
debugger_instruction_hook(device, cpustate->pc);
cpustate->seg_prefix = FALSE;
@@ -529,9 +529,9 @@ static CPU_SET_INFO( i8086 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: set_test_line(cpustate, info->i); break; /* PJB 03/05 */
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: set_test_line(cpustate, info->i); break; /* PJB 03/05 */
}
}
@@ -548,53 +548,53 @@ CPU_GET_INFO( i8086 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i8086_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
-
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: info->i = cpustate->test_state; break; /* PJB 03/05 */
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prevpc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i8086_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 50; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
+
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: info->i = cpustate->test_state; break; /* PJB 03/05 */
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prevpc; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8086); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8086); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i8086); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(i8086); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8086); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8086); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(i8086); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(i8086); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(i8086);break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i8086); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8086); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i8086); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(i8086); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i8086); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8086); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(i8086); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(i8086); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(i8086);break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "8086"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 80x86"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.4"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Real mode i286 emulator v1.4 by Fabrice Frances\n(initial work cpustate->based on David Hedley's pcemu)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "8086"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 80x86"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.4"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Real mode i286 emulator v1.4 by Fabrice Frances\n(initial work cpustate->based on David Hedley's pcemu)"); break;
}
}
@@ -608,16 +608,16 @@ CPU_GET_INFO( i8088 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8088); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8088); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "8088"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "8088"); break;
- default: CPU_GET_INFO_CALL(i8086); break;
+ default: CPU_GET_INFO_CALL(i8086); break;
}
}
@@ -633,16 +633,16 @@ static CPU_SET_INFO( i80186 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT0: set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT1: set_irq_line(cpustate, 1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT2: set_irq_line(cpustate, 2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT3: set_irq_line(cpustate, 3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_DRQ0: set_drq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_DRQ1: set_drq_line(cpustate, 1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TMRIN0: set_tmrin_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TMRIN1: set_tmrin_line(cpustate, 1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: set_test_line(cpustate, info->i); break; /* PJB 03/05 */
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT0: set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT1: set_irq_line(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT2: set_irq_line(cpustate, 2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT3: set_irq_line(cpustate, 3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_DRQ0: set_drq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_DRQ1: set_drq_line(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TMRIN0: set_tmrin_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TMRIN1: set_tmrin_line(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: set_test_line(cpustate, info->i); break; /* PJB 03/05 */
}
}
@@ -651,18 +651,18 @@ CPU_GET_INFO( i80186 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i80186); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80186); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i80186); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80186); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "80186"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "80186"); break;
- default: CPU_GET_INFO_CALL(i8086); break;
+ default: CPU_GET_INFO_CALL(i8086); break;
}
}
@@ -676,17 +676,17 @@ CPU_GET_INFO( i80188 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8088); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186);break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8088); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186);break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "80188"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "80188"); break;
- default: CPU_GET_INFO_CALL(i8086); break;
+ default: CPU_GET_INFO_CALL(i8086); break;
}
}
diff --git a/src/emu/cpu/i86/i86.h b/src/emu/cpu/i86/i86.h
index afd0d2599e7..c7ce86af343 100644
--- a/src/emu/cpu/i86/i86.h
+++ b/src/emu/cpu/i86/i86.h
@@ -5,21 +5,21 @@
#define __I86INTF_H__
-#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
-#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
-#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
-#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
-#define INPUT_LINE_TEST 20 /* PJB 03/05 */
-#define INPUT_LINE_DRQ0 21
-#define INPUT_LINE_DRQ1 22
-#define INPUT_LINE_TMRIN0 23
-#define INPUT_LINE_TMRIN1 24
+#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
+#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
+#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
+#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
+#define INPUT_LINE_TEST 20 /* PJB 03/05 */
+#define INPUT_LINE_DRQ0 21
+#define INPUT_LINE_DRQ1 22
+#define INPUT_LINE_TMRIN0 23
+#define INPUT_LINE_TMRIN1 24
struct i80186_interface
{
- devcb_write_line out_tmrout0_func;
- devcb_write_line out_tmrout1_func;
+ devcb_write_line out_tmrout0_func;
+ devcb_write_line out_tmrout1_func;
};
#define I80186_INTERFACE(name) const i80186_interface (name) =
diff --git a/src/emu/cpu/i86/i86priv.h b/src/emu/cpu/i86/i86priv.h
index c2dcbfbdc3c..0995e13b91f 100644
--- a/src/emu/cpu/i86/i86priv.h
+++ b/src/emu/cpu/i86/i86priv.h
@@ -20,44 +20,44 @@ enum WREGS { AX, CX, DX, BX, SP, BP, SI, DI };
enum BREGS {
- AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1),
- AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0),
- CL = NATIVE_ENDIAN_VALUE_LE_BE(0x2, 0x3),
- CH = NATIVE_ENDIAN_VALUE_LE_BE(0x3, 0x2),
- DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5),
- DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
- BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
- BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6),
- SPL = NATIVE_ENDIAN_VALUE_LE_BE(0x8, 0x9),
- SPH = NATIVE_ENDIAN_VALUE_LE_BE(0x9, 0x8),
- BPL = NATIVE_ENDIAN_VALUE_LE_BE(0xa, 0xb),
- BPH = NATIVE_ENDIAN_VALUE_LE_BE(0xb, 0xa),
- SIL = NATIVE_ENDIAN_VALUE_LE_BE(0xc, 0xd),
- SIH = NATIVE_ENDIAN_VALUE_LE_BE(0xd, 0xc),
- DIL = NATIVE_ENDIAN_VALUE_LE_BE(0xe, 0xf),
- DIH = NATIVE_ENDIAN_VALUE_LE_BE(0xf, 0xe)
+ AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1),
+ AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0),
+ CL = NATIVE_ENDIAN_VALUE_LE_BE(0x2, 0x3),
+ CH = NATIVE_ENDIAN_VALUE_LE_BE(0x3, 0x2),
+ DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5),
+ DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
+ BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
+ BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6),
+ SPL = NATIVE_ENDIAN_VALUE_LE_BE(0x8, 0x9),
+ SPH = NATIVE_ENDIAN_VALUE_LE_BE(0x9, 0x8),
+ BPL = NATIVE_ENDIAN_VALUE_LE_BE(0xa, 0xb),
+ BPH = NATIVE_ENDIAN_VALUE_LE_BE(0xb, 0xa),
+ SIL = NATIVE_ENDIAN_VALUE_LE_BE(0xc, 0xd),
+ SIH = NATIVE_ENDIAN_VALUE_LE_BE(0xd, 0xc),
+ DIL = NATIVE_ENDIAN_VALUE_LE_BE(0xe, 0xf),
+ DIH = NATIVE_ENDIAN_VALUE_LE_BE(0xf, 0xe)
};
/* parameter x = result, y = source 1, z = source 2 */
-#define SetTF(x) (cpustate->TF = (x))
-#define SetIF(x) (cpustate->IF = (x))
-#define SetDF(x) (cpustate->DirVal = (x) ? -1 : 1)
+#define SetTF(x) (cpustate->TF = (x))
+#define SetIF(x) (cpustate->IF = (x))
+#define SetDF(x) (cpustate->DirVal = (x) ? -1 : 1)
-#define SetOFW_Add(x,y,z) (cpustate->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
-#define SetOFB_Add(x,y,z) (cpustate->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
-#define SetOFW_Sub(x,y,z) (cpustate->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
-#define SetOFB_Sub(x,y,z) (cpustate->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
+#define SetOFW_Add(x,y,z) (cpustate->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
+#define SetOFB_Add(x,y,z) (cpustate->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
+#define SetOFW_Sub(x,y,z) (cpustate->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
+#define SetOFB_Sub(x,y,z) (cpustate->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
-#define SetCFB(x) (cpustate->CarryVal = (x) & 0x100)
-#define SetCFW(x) (cpustate->CarryVal = (x) & 0x10000)
-#define SetAF(x,y,z) (cpustate->AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
-#define SetSF(x) (cpustate->SignVal = (x))
-#define SetZF(x) (cpustate->ZeroVal = (x))
-#define SetPF(x) (cpustate->ParityVal = (x))
+#define SetCFB(x) (cpustate->CarryVal = (x) & 0x100)
+#define SetCFW(x) (cpustate->CarryVal = (x) & 0x10000)
+#define SetAF(x,y,z) (cpustate->AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
+#define SetSF(x) (cpustate->SignVal = (x))
+#define SetZF(x) (cpustate->ZeroVal = (x))
+#define SetPF(x) (cpustate->ParityVal = (x))
-#define SetSZPF_Byte(x) (cpustate->ParityVal = cpustate->SignVal = cpustate->ZeroVal = (INT8)(x))
-#define SetSZPF_Word(x) (cpustate->ParityVal = cpustate->SignVal = cpustate->ZeroVal = (INT16)(x))
+#define SetSZPF_Byte(x) (cpustate->ParityVal = cpustate->SignVal = cpustate->ZeroVal = (INT8)(x))
+#define SetSZPF_Word(x) (cpustate->ParityVal = cpustate->SignVal = cpustate->ZeroVal = (INT16)(x))
#define ADDB(dst,src) { unsigned res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
#define ADDW(dst,src) { unsigned res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
@@ -72,71 +72,71 @@ enum BREGS {
#define SBBB(dst,src,tmpcf) { unsigned res=dst-src; tmpcf = res & 0x100; SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
#define SBBW(dst,src,tmpcf) { unsigned res=dst-src; tmpcf = res & 0x10000; SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
-#define ORB(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst)
-#define ORW(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst)
+#define ORB(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst)
+#define ORW(dst,src) dst |= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst)
-#define ANDB(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst)
-#define ANDW(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst)
+#define ANDB(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst)
+#define ANDW(dst,src) dst &= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst)
-#define XORB(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst)
-#define XORW(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst)
+#define XORB(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Byte(dst)
+#define XORW(dst,src) dst ^= src; cpustate->CarryVal = cpustate->OverVal = cpustate->AuxVal = 0; SetSZPF_Word(dst)
-#define CF (int)(cpustate->CarryVal != 0)
-#define SF (int)(cpustate->SignVal < 0)
-#define ZF (int)(cpustate->ZeroVal == 0)
-#define PF parity_table[cpustate->ParityVal&0xff]
-#define AF (int)(cpustate->AuxVal != 0)
-#define OF (int)(cpustate->OverVal != 0)
-#define DF (int)(cpustate->DirVal < 0)
+#define CF (int)(cpustate->CarryVal != 0)
+#define SF (int)(cpustate->SignVal < 0)
+#define ZF (int)(cpustate->ZeroVal == 0)
+#define PF parity_table[cpustate->ParityVal&0xff]
+#define AF (int)(cpustate->AuxVal != 0)
+#define OF (int)(cpustate->OverVal != 0)
+#define DF (int)(cpustate->DirVal < 0)
/************************************************************************/
-#define read_mem_byte(a) cpustate->program->read_byte(a)
-#define read_mem_word(a) cpustate->program->read_word_unaligned(a)
-#define write_mem_byte(a,d) cpustate->program->write_byte((a),(d))
-#define write_mem_word(a,d) cpustate->program->write_word_unaligned((a),(d))
+#define read_mem_byte(a) cpustate->program->read_byte(a)
+#define read_mem_word(a) cpustate->program->read_word_unaligned(a)
+#define write_mem_byte(a,d) cpustate->program->write_byte((a),(d))
+#define write_mem_word(a,d) cpustate->program->write_word_unaligned((a),(d))
-#define read_port_byte(a) cpustate->io->read_byte(a)
-#define read_port_word(a) cpustate->io->read_word_unaligned(a)
-#define write_port_byte(a,d) cpustate->io->write_byte((a),(d))
-#define write_port_word(a,d) cpustate->io->write_word_unaligned((a),(d))
+#define read_port_byte(a) cpustate->io->read_byte(a)
+#define read_port_word(a) cpustate->io->read_word_unaligned(a)
+#define write_port_byte(a,d) cpustate->io->write_byte((a),(d))
+#define write_port_word(a,d) cpustate->io->write_word_unaligned((a),(d))
/************************************************************************/
-#define SegBase(Seg) (cpustate->sregs[Seg] << 4)
+#define SegBase(Seg) (cpustate->sregs[Seg] << 4)
-#define DefaultSeg(Seg) ((cpustate->seg_prefix && (Seg == DS || Seg == SS)) ? cpustate->prefix_seg : Seg)
-#define DefaultBase(Seg) ((cpustate->seg_prefix && (Seg == DS || Seg == SS)) ? cpustate->base[cpustate->prefix_seg] : cpustate->base[Seg])
+#define DefaultSeg(Seg) ((cpustate->seg_prefix && (Seg == DS || Seg == SS)) ? cpustate->prefix_seg : Seg)
+#define DefaultBase(Seg) ((cpustate->seg_prefix && (Seg == DS || Seg == SS)) ? cpustate->base[cpustate->prefix_seg] : cpustate->base[Seg])
#ifdef I80286
-#define GetMemB(Seg,Off) (read_mem_byte(GetMemAddr(cpustate,Seg,Off,1,I80286_READ)))
-#define GetMemW(Seg,Off) (read_mem_word(GetMemAddr(cpustate,Seg,Off,2,I80286_READ)))
-#define PutMemB(Seg,Off,x) write_mem_byte(GetMemAddr(cpustate,Seg,Off,1,I80286_WRITE), (x))
-#define PutMemW(Seg,Off,x) write_mem_word(GetMemAddr(cpustate,Seg,Off,2,I80286_WRITE), (x))
+#define GetMemB(Seg,Off) (read_mem_byte(GetMemAddr(cpustate,Seg,Off,1,I80286_READ)))
+#define GetMemW(Seg,Off) (read_mem_word(GetMemAddr(cpustate,Seg,Off,2,I80286_READ)))
+#define PutMemB(Seg,Off,x) write_mem_byte(GetMemAddr(cpustate,Seg,Off,1,I80286_WRITE), (x))
+#define PutMemW(Seg,Off,x) write_mem_word(GetMemAddr(cpustate,Seg,Off,2,I80286_WRITE), (x))
#else
-#define GetMemB(Seg,Off) (read_mem_byte((DefaultBase(Seg) + (Off)) & AMASK))
-#define GetMemW(Seg,Off) (read_mem_word((DefaultBase(Seg) + (Off)) & AMASK))
-#define PutMemB(Seg,Off,x) write_mem_byte((DefaultBase(Seg) + (Off)) & AMASK, (x))
-#define PutMemW(Seg,Off,x) write_mem_word((DefaultBase(Seg) + (Off)) & AMASK, (x))
+#define GetMemB(Seg,Off) (read_mem_byte((DefaultBase(Seg) + (Off)) & AMASK))
+#define GetMemW(Seg,Off) (read_mem_word((DefaultBase(Seg) + (Off)) & AMASK))
+#define PutMemB(Seg,Off,x) write_mem_byte((DefaultBase(Seg) + (Off)) & AMASK, (x))
+#define PutMemW(Seg,Off,x) write_mem_word((DefaultBase(Seg) + (Off)) & AMASK, (x))
#endif
-#define PEEKBYTE(ea) (read_mem_byte((ea) & AMASK))
-#define ReadByte(ea) (read_mem_byte((ea) & AMASK))
-#define ReadWord(ea) (read_mem_word((ea) & AMASK))
-#define WriteByte(ea,val) write_mem_byte((ea) & AMASK, val);
-#define WriteWord(ea,val) write_mem_word((ea) & AMASK, val);
+#define PEEKBYTE(ea) (read_mem_byte((ea) & AMASK))
+#define ReadByte(ea) (read_mem_byte((ea) & AMASK))
+#define ReadWord(ea) (read_mem_word((ea) & AMASK))
+#define WriteByte(ea,val) write_mem_byte((ea) & AMASK, val);
+#define WriteWord(ea,val) write_mem_word((ea) & AMASK, val);
-#define FETCH (cpustate->direct->read_raw_byte(cpustate->pc++, cpustate->fetch_xor))
-#define FETCHOP (cpustate->direct->read_decrypted_byte(cpustate->pc++, cpustate->fetch_xor))
-#define PEEKOP(addr) (cpustate->direct->read_decrypted_byte(addr, cpustate->fetch_xor))
-#define FETCHWORD(var) { var = cpustate->direct->read_raw_byte(cpustate->pc, cpustate->fetch_xor); var += (cpustate->direct->read_raw_byte(cpustate->pc + 1, cpustate->fetch_xor) << 8); cpustate->pc += 2; }
+#define FETCH (cpustate->direct->read_raw_byte(cpustate->pc++, cpustate->fetch_xor))
+#define FETCHOP (cpustate->direct->read_decrypted_byte(cpustate->pc++, cpustate->fetch_xor))
+#define PEEKOP(addr) (cpustate->direct->read_decrypted_byte(addr, cpustate->fetch_xor))
+#define FETCHWORD(var) { var = cpustate->direct->read_raw_byte(cpustate->pc, cpustate->fetch_xor); var += (cpustate->direct->read_raw_byte(cpustate->pc + 1, cpustate->fetch_xor) << 8); cpustate->pc += 2; }
#define CHANGE_PC(addr)
#ifdef I80286
-#define PUSH(val) { if(PM) i80286_check_permission(cpustate, SS, cpustate->regs.w[SP]-2, I80286_WORD, I80286_WRITE); cpustate->regs.w[SP] -= 2; WriteWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK), val); }
-#define POP(var) { if(PM) i80286_check_permission(cpustate, SS, cpustate->regs.w[SP], I80286_WORD, I80286_READ); cpustate->regs.w[SP] += 2; var = ReadWord(((cpustate->base[SS] + ((cpustate->regs.w[SP]-2) & 0xffff)) & AMASK)); }
+#define PUSH(val) { if(PM) i80286_check_permission(cpustate, SS, cpustate->regs.w[SP]-2, I80286_WORD, I80286_WRITE); cpustate->regs.w[SP] -= 2; WriteWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK), val); }
+#define POP(var) { if(PM) i80286_check_permission(cpustate, SS, cpustate->regs.w[SP], I80286_WORD, I80286_READ); cpustate->regs.w[SP] += 2; var = ReadWord(((cpustate->base[SS] + ((cpustate->regs.w[SP]-2) & 0xffff)) & AMASK)); }
#else
-#define PUSH(val) { cpustate->regs.w[SP] -= 2; WriteWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK), val); }
-#define POP(var) { cpustate->regs.w[SP] += 2; var = ReadWord(((cpustate->base[SS] + ((cpustate->regs.w[SP]-2) & 0xffff)) & AMASK)); }
+#define PUSH(val) { cpustate->regs.w[SP] -= 2; WriteWord(((cpustate->base[SS] + cpustate->regs.w[SP]) & AMASK), val); }
+#define POP(var) { cpustate->regs.w[SP] += 2; var = ReadWord(((cpustate->base[SS] + ((cpustate->regs.w[SP]-2) & 0xffff)) & AMASK)); }
#endif
/************************************************************************/
#ifdef I80286
@@ -155,14 +155,14 @@ enum BREGS {
#define ExpandFlags(f) \
{ \
- cpustate->CarryVal = (f) & 1; \
- cpustate->ParityVal = !((f) & 4); \
- cpustate->AuxVal = (f) & 16; \
- cpustate->ZeroVal = !((f) & 64); \
- cpustate->SignVal = ((f) & 128) ? -1 : 0; \
- cpustate->TF = ((f) & 256) >> 8; \
- cpustate->IF = ((f) & 512) >> 9; \
- cpustate->DirVal = ((f) & 1024) ? -1 : 1; \
- cpustate->OverVal = (f) & 2048; \
+ cpustate->CarryVal = (f) & 1; \
+ cpustate->ParityVal = !((f) & 4); \
+ cpustate->AuxVal = (f) & 16; \
+ cpustate->ZeroVal = !((f) & 64); \
+ cpustate->SignVal = ((f) & 128) ? -1 : 0; \
+ cpustate->TF = ((f) & 256) >> 8; \
+ cpustate->IF = ((f) & 512) >> 9; \
+ cpustate->DirVal = ((f) & 1024) ? -1 : 1; \
+ cpustate->OverVal = (f) & 2048; \
}
#endif /* __I86_H__ */
diff --git a/src/emu/cpu/i86/i86time.c b/src/emu/cpu/i86/i86time.c
index e9b6d4b0b28..ab7de816402 100644
--- a/src/emu/cpu/i86/i86time.c
+++ b/src/emu/cpu/i86/i86time.c
@@ -5,80 +5,80 @@
struct i80x86_timing
{
- int id;
-
- UINT8 exception, iret; /* exception, IRET */
- UINT8 int3, int_imm, into_nt, into_t; /* INTs */
- UINT8 override; /* segment overrides */
- UINT8 flag_ops, lahf, sahf; /* flag operations */
- UINT8 aaa, aas, aam, aad; /* arithmetic adjusts */
- UINT8 daa, das; /* decimal adjusts */
- UINT8 cbw, cwd; /* sign extension */
- UINT8 hlt, load_ptr, lea, nop, wait, xlat; /* misc */
-
- UINT8 jmp_short, jmp_near, jmp_far; /* direct JMPs */
- UINT8 jmp_r16, jmp_m16, jmp_m32; /* indirect JMPs */
- UINT8 call_near, call_far; /* direct CALLs */
- UINT8 call_r16, call_m16, call_m32; /* indirect CALLs */
- UINT8 ret_near, ret_far, ret_near_imm, ret_far_imm; /* returns */
- UINT8 jcc_nt, jcc_t, jcxz_nt, jcxz_t; /* conditional JMPs */
- UINT8 loop_nt, loop_t, loope_nt, loope_t; /* loops */
-
- UINT8 in_imm8, in_imm16, in_dx8, in_dx16; /* port reads */
- UINT8 out_imm8, out_imm16, out_dx8, out_dx16; /* port writes */
-
- UINT8 mov_rr8, mov_rm8, mov_mr8; /* move, 8-bit */
- UINT8 mov_ri8, mov_mi8; /* move, 8-bit immediate */
- UINT8 mov_rr16, mov_rm16, mov_mr16; /* move, 16-bit */
- UINT8 mov_ri16, mov_mi16; /* move, 16-bit immediate */
- UINT8 mov_am8, mov_am16, mov_ma8, mov_ma16; /* move, AL/AX memory */
- UINT8 mov_sr, mov_sm, mov_rs, mov_ms; /* move, segment registers */
- UINT8 xchg_rr8, xchg_rm8; /* exchange, 8-bit */
- UINT8 xchg_rr16, xchg_rm16, xchg_ar16; /* exchange, 16-bit */
-
- UINT8 push_r16, push_m16, push_seg, pushf; /* pushes */
- UINT8 pop_r16, pop_m16, pop_seg, popf; /* pops */
-
- UINT8 alu_rr8, alu_rm8, alu_mr8; /* ALU ops, 8-bit */
- UINT8 alu_ri8, alu_mi8, alu_mi8_ro; /* ALU ops, 8-bit immediate */
- UINT8 alu_rr16, alu_rm16, alu_mr16; /* ALU ops, 16-bit */
- UINT8 alu_ri16, alu_mi16, alu_mi16_ro; /* ALU ops, 16-bit immediate */
- UINT8 alu_r16i8, alu_m16i8, alu_m16i8_ro; /* ALU ops, 16-bit w/8-bit immediate */
- UINT8 mul_r8, mul_r16, mul_m8, mul_m16; /* MUL */
- UINT8 imul_r8, imul_r16, imul_m8, imul_m16; /* IMUL */
- UINT8 div_r8, div_r16, div_m8, div_m16; /* DIV */
- UINT8 idiv_r8, idiv_r16, idiv_m8, idiv_m16; /* IDIV */
- UINT8 incdec_r8, incdec_r16, incdec_m8, incdec_m16; /* INC/DEC */
- UINT8 negnot_r8, negnot_r16, negnot_m8, negnot_m16; /* NEG/NOT */
-
- UINT8 rot_reg_1, rot_reg_base, rot_reg_bit; /* reg shift/rotate */
- UINT8 rot_m8_1, rot_m8_base, rot_m8_bit; /* m8 shift/rotate */
- UINT8 rot_m16_1, rot_m16_base, rot_m16_bit; /* m16 shift/rotate */
-
- UINT8 cmps8, rep_cmps8_base, rep_cmps8_count; /* CMPS 8-bit */
- UINT8 cmps16, rep_cmps16_base, rep_cmps16_count; /* CMPS 16-bit */
- UINT8 scas8, rep_scas8_base, rep_scas8_count; /* SCAS 8-bit */
- UINT8 scas16, rep_scas16_base, rep_scas16_count; /* SCAS 16-bit */
- UINT8 lods8, rep_lods8_base, rep_lods8_count; /* LODS 8-bit */
- UINT8 lods16, rep_lods16_base, rep_lods16_count; /* LODS 16-bit */
- UINT8 stos8, rep_stos8_base, rep_stos8_count; /* STOS 8-bit */
- UINT8 stos16, rep_stos16_base, rep_stos16_count; /* STOS 16-bit */
- UINT8 movs8, rep_movs8_base, rep_movs8_count; /* MOVS 8-bit */
- UINT8 movs16, rep_movs16_base, rep_movs16_count; /* MOVS 16-bit */
-
- void * check1; /* marker to make sure we line up */
-
- UINT8 ins8, rep_ins8_base, rep_ins8_count; /* (80186) INS 8-bit */
- UINT8 ins16, rep_ins16_base, rep_ins16_count; /* (80186) INS 16-bit */
- UINT8 outs8, rep_outs8_base, rep_outs8_count; /* (80186) OUTS 8-bit */
- UINT8 outs16, rep_outs16_base, rep_outs16_count; /* (80186) OUTS 16-bit */
- UINT8 push_imm, pusha, popa; /* (80186) PUSH immediate, PUSHA/POPA */
- UINT8 imul_rri8, imul_rmi8; /* (80186) IMUL immediate 8-bit */
- UINT8 imul_rri16, imul_rmi16; /* (80186) IMUL immediate 16-bit */
- UINT8 enter0, enter1, enter_base, enter_count, leave; /* (80186) ENTER/LEAVE */
- UINT8 bound; /* (80186) BOUND */
-
- void * check2; /* marker to make sure we line up */
+ int id;
+
+ UINT8 exception, iret; /* exception, IRET */
+ UINT8 int3, int_imm, into_nt, into_t; /* INTs */
+ UINT8 override; /* segment overrides */
+ UINT8 flag_ops, lahf, sahf; /* flag operations */
+ UINT8 aaa, aas, aam, aad; /* arithmetic adjusts */
+ UINT8 daa, das; /* decimal adjusts */
+ UINT8 cbw, cwd; /* sign extension */
+ UINT8 hlt, load_ptr, lea, nop, wait, xlat; /* misc */
+
+ UINT8 jmp_short, jmp_near, jmp_far; /* direct JMPs */
+ UINT8 jmp_r16, jmp_m16, jmp_m32; /* indirect JMPs */
+ UINT8 call_near, call_far; /* direct CALLs */
+ UINT8 call_r16, call_m16, call_m32; /* indirect CALLs */
+ UINT8 ret_near, ret_far, ret_near_imm, ret_far_imm; /* returns */
+ UINT8 jcc_nt, jcc_t, jcxz_nt, jcxz_t; /* conditional JMPs */
+ UINT8 loop_nt, loop_t, loope_nt, loope_t; /* loops */
+
+ UINT8 in_imm8, in_imm16, in_dx8, in_dx16; /* port reads */
+ UINT8 out_imm8, out_imm16, out_dx8, out_dx16; /* port writes */
+
+ UINT8 mov_rr8, mov_rm8, mov_mr8; /* move, 8-bit */
+ UINT8 mov_ri8, mov_mi8; /* move, 8-bit immediate */
+ UINT8 mov_rr16, mov_rm16, mov_mr16; /* move, 16-bit */
+ UINT8 mov_ri16, mov_mi16; /* move, 16-bit immediate */
+ UINT8 mov_am8, mov_am16, mov_ma8, mov_ma16; /* move, AL/AX memory */
+ UINT8 mov_sr, mov_sm, mov_rs, mov_ms; /* move, segment registers */
+ UINT8 xchg_rr8, xchg_rm8; /* exchange, 8-bit */
+ UINT8 xchg_rr16, xchg_rm16, xchg_ar16; /* exchange, 16-bit */
+
+ UINT8 push_r16, push_m16, push_seg, pushf; /* pushes */
+ UINT8 pop_r16, pop_m16, pop_seg, popf; /* pops */
+
+ UINT8 alu_rr8, alu_rm8, alu_mr8; /* ALU ops, 8-bit */
+ UINT8 alu_ri8, alu_mi8, alu_mi8_ro; /* ALU ops, 8-bit immediate */
+ UINT8 alu_rr16, alu_rm16, alu_mr16; /* ALU ops, 16-bit */
+ UINT8 alu_ri16, alu_mi16, alu_mi16_ro; /* ALU ops, 16-bit immediate */
+ UINT8 alu_r16i8, alu_m16i8, alu_m16i8_ro; /* ALU ops, 16-bit w/8-bit immediate */
+ UINT8 mul_r8, mul_r16, mul_m8, mul_m16; /* MUL */
+ UINT8 imul_r8, imul_r16, imul_m8, imul_m16; /* IMUL */
+ UINT8 div_r8, div_r16, div_m8, div_m16; /* DIV */
+ UINT8 idiv_r8, idiv_r16, idiv_m8, idiv_m16; /* IDIV */
+ UINT8 incdec_r8, incdec_r16, incdec_m8, incdec_m16; /* INC/DEC */
+ UINT8 negnot_r8, negnot_r16, negnot_m8, negnot_m16; /* NEG/NOT */
+
+ UINT8 rot_reg_1, rot_reg_base, rot_reg_bit; /* reg shift/rotate */
+ UINT8 rot_m8_1, rot_m8_base, rot_m8_bit; /* m8 shift/rotate */
+ UINT8 rot_m16_1, rot_m16_base, rot_m16_bit; /* m16 shift/rotate */
+
+ UINT8 cmps8, rep_cmps8_base, rep_cmps8_count; /* CMPS 8-bit */
+ UINT8 cmps16, rep_cmps16_base, rep_cmps16_count; /* CMPS 16-bit */
+ UINT8 scas8, rep_scas8_base, rep_scas8_count; /* SCAS 8-bit */
+ UINT8 scas16, rep_scas16_base, rep_scas16_count; /* SCAS 16-bit */
+ UINT8 lods8, rep_lods8_base, rep_lods8_count; /* LODS 8-bit */
+ UINT8 lods16, rep_lods16_base, rep_lods16_count; /* LODS 16-bit */
+ UINT8 stos8, rep_stos8_base, rep_stos8_count; /* STOS 8-bit */
+ UINT8 stos16, rep_stos16_base, rep_stos16_count; /* STOS 16-bit */
+ UINT8 movs8, rep_movs8_base, rep_movs8_count; /* MOVS 8-bit */
+ UINT8 movs16, rep_movs16_base, rep_movs16_count; /* MOVS 16-bit */
+
+ void * check1; /* marker to make sure we line up */
+
+ UINT8 ins8, rep_ins8_base, rep_ins8_count; /* (80186) INS 8-bit */
+ UINT8 ins16, rep_ins16_base, rep_ins16_count; /* (80186) INS 16-bit */
+ UINT8 outs8, rep_outs8_base, rep_outs8_count; /* (80186) OUTS 8-bit */
+ UINT8 outs16, rep_outs16_base, rep_outs16_count; /* (80186) OUTS 16-bit */
+ UINT8 push_imm, pusha, popa; /* (80186) PUSH immediate, PUSHA/POPA */
+ UINT8 imul_rri8, imul_rmi8; /* (80186) IMUL immediate 8-bit */
+ UINT8 imul_rri16, imul_rmi16; /* (80186) IMUL immediate 16-bit */
+ UINT8 enter0, enter1, enter_base, enter_count, leave; /* (80186) ENTER/LEAVE */
+ UINT8 bound; /* (80186) BOUND */
+
+ void * check2; /* marker to make sure we line up */
};
@@ -88,66 +88,66 @@ static const struct i80x86_timing i8086_cycles =
{
8086,
- 51,32, /* exception, IRET */
- 2, 0, 4, 2, /* INTs */
- 2, /* segment overrides */
- 2, 4, 4, /* flag operations */
- 4, 4,83,60, /* arithmetic adjusts */
- 4, 4, /* decimal adjusts */
- 2, 5, /* sign extension */
- 2,24, 2, 2, 3,11, /* misc */
-
- 15,15,15, /* direct JMPs */
- 11,18,24, /* indirect JMPs */
- 19,28, /* direct CALLs */
- 16,21,37, /* indirect CALLs */
- 20,32,24,31, /* returns */
- 4,16, 6,18, /* conditional JMPs */
- 5,17, 6,18, /* loops */
-
- 10,14, 8,12, /* port reads */
- 10,14, 8,12, /* port writes */
-
- 2, 8, 9, /* move, 8-bit */
- 4,10, /* move, 8-bit immediate */
- 2, 8, 9, /* move, 16-bit */
- 4,10, /* move, 16-bit immediate */
- 10,10,10,10, /* move, AL/AX memory */
- 2, 8, 2, 9, /* move, segment registers */
- 4,17, /* exchange, 8-bit */
- 4,17, 3, /* exchange, 16-bit */
-
- 15,24,14,14, /* pushes */
- 12,25,12,12, /* pops */
-
- 3, 9,16, /* ALU ops, 8-bit */
- 4,17,10, /* ALU ops, 8-bit immediate */
- 3, 9,16, /* ALU ops, 16-bit */
- 4,17,10, /* ALU ops, 16-bit immediate */
- 4,17,10, /* ALU ops, 16-bit w/8-bit immediate */
- 70,118,76,128, /* MUL */
- 80,128,86,138, /* IMUL */
- 80,144,86,154, /* DIV */
+ 51,32, /* exception, IRET */
+ 2, 0, 4, 2, /* INTs */
+ 2, /* segment overrides */
+ 2, 4, 4, /* flag operations */
+ 4, 4,83,60, /* arithmetic adjusts */
+ 4, 4, /* decimal adjusts */
+ 2, 5, /* sign extension */
+ 2,24, 2, 2, 3,11, /* misc */
+
+ 15,15,15, /* direct JMPs */
+ 11,18,24, /* indirect JMPs */
+ 19,28, /* direct CALLs */
+ 16,21,37, /* indirect CALLs */
+ 20,32,24,31, /* returns */
+ 4,16, 6,18, /* conditional JMPs */
+ 5,17, 6,18, /* loops */
+
+ 10,14, 8,12, /* port reads */
+ 10,14, 8,12, /* port writes */
+
+ 2, 8, 9, /* move, 8-bit */
+ 4,10, /* move, 8-bit immediate */
+ 2, 8, 9, /* move, 16-bit */
+ 4,10, /* move, 16-bit immediate */
+ 10,10,10,10, /* move, AL/AX memory */
+ 2, 8, 2, 9, /* move, segment registers */
+ 4,17, /* exchange, 8-bit */
+ 4,17, 3, /* exchange, 16-bit */
+
+ 15,24,14,14, /* pushes */
+ 12,25,12,12, /* pops */
+
+ 3, 9,16, /* ALU ops, 8-bit */
+ 4,17,10, /* ALU ops, 8-bit immediate */
+ 3, 9,16, /* ALU ops, 16-bit */
+ 4,17,10, /* ALU ops, 16-bit immediate */
+ 4,17,10, /* ALU ops, 16-bit w/8-bit immediate */
+ 70,118,76,128, /* MUL */
+ 80,128,86,138, /* IMUL */
+ 80,144,86,154, /* DIV */
101,165,107,175,/* IDIV */
- 3, 2,15,15, /* INC/DEC */
- 3, 3,16,16, /* NEG/NOT */
-
- 2, 8, 4, /* reg shift/rotate */
- 15,20, 4, /* m8 shift/rotate */
- 15,20, 4, /* m16 shift/rotate */
-
- 22, 9,21, /* CMPS 8-bit */
- 22, 9,21, /* CMPS 16-bit */
- 15, 9,14, /* SCAS 8-bit */
- 15, 9,14, /* SCAS 16-bit */
- 12, 9,11, /* LODS 8-bit */
- 12, 9,11, /* LODS 16-bit */
- 11, 9,10, /* STOS 8-bit */
- 11, 9,10, /* STOS 16-bit */
- 18, 9,17, /* MOVS 8-bit */
- 18, 9,17, /* MOVS 16-bit */
-
- (void *)-1 /* marker to make sure we line up */
+ 3, 2,15,15, /* INC/DEC */
+ 3, 3,16,16, /* NEG/NOT */
+
+ 2, 8, 4, /* reg shift/rotate */
+ 15,20, 4, /* m8 shift/rotate */
+ 15,20, 4, /* m16 shift/rotate */
+
+ 22, 9,21, /* CMPS 8-bit */
+ 22, 9,21, /* CMPS 16-bit */
+ 15, 9,14, /* SCAS 8-bit */
+ 15, 9,14, /* SCAS 16-bit */
+ 12, 9,11, /* LODS 8-bit */
+ 12, 9,11, /* LODS 16-bit */
+ 11, 9,10, /* STOS 8-bit */
+ 11, 9,10, /* STOS 16-bit */
+ 18, 9,17, /* MOVS 8-bit */
+ 18, 9,17, /* MOVS 16-bit */
+
+ (void *)-1 /* marker to make sure we line up */
};
/* these come from the Intel 80186 datasheet */
@@ -155,78 +155,78 @@ static const struct i80x86_timing i80186_cycles =
{
80186,
- 45,28, /* exception, IRET */
- 0, 2, 4, 3, /* INTs */
- 2, /* segment overrides */
- 2, 2, 3, /* flag operations */
- 8, 7,19,15, /* arithmetic adjusts */
- 4, 4, /* decimal adjusts */
- 2, 4, /* sign extension */
- 2,18, 6, 2, 6,11, /* misc */
-
- 14,14,14, /* direct JMPs */
- 11,17,26, /* indirect JMPs */
- 15,23, /* direct CALLs */
- 13,19,38, /* indirect CALLs */
- 16,22,18,25, /* returns */
- 4,13, 5,15, /* conditional JMPs */
- 6,16, 6,16, /* loops */
-
- 10,10, 8, 8, /* port reads */
- 9, 9, 7, 7, /* port writes */
-
- 2, 9,12, /* move, 8-bit */
- 3,12, /* move, 8-bit immediate */
- 2, 9,12, /* move, 16-bit */
- 4,13, /* move, 16-bit immediate */
- 8, 8, 9, 9, /* move, AL/AX memory */
- 2,11, 2,11, /* move, segment registers */
- 4,17, /* exchange, 8-bit */
- 4,17, 3, /* exchange, 16-bit */
-
- 10,16, 9, 9, /* pushes */
- 10,20, 8, 8, /* pops */
-
- 3,10,10, /* ALU ops, 8-bit */
- 4,16,10, /* ALU ops, 8-bit immediate */
- 3,10,10, /* ALU ops, 16-bit */
- 4,16,10, /* ALU ops, 16-bit immediate */
- 4,16,10, /* ALU ops, 16-bit w/8-bit immediate */
- 26,35,32,41, /* MUL */
- 25,34,31,40, /* IMUL */
- 29,38,35,44, /* DIV */
- 44,53,50,59, /* IDIV */
- 3, 3,15,15, /* INC/DEC */
- 3, 3,10,10, /* NEG/NOT */
-
- 2, 5, 1, /* reg shift/rotate */
- 15,17, 1, /* m8 shift/rotate */
- 15,17, 1, /* m16 shift/rotate */
-
- 22, 5,22, /* CMPS 8-bit */
- 22, 5,22, /* CMPS 16-bit */
- 15, 5,15, /* SCAS 8-bit */
- 15, 5,15, /* SCAS 16-bit */
- 12, 6,11, /* LODS 8-bit */
- 12, 6,11, /* LODS 16-bit */
- 10, 6, 9, /* STOS 8-bit */
- 10, 6, 9, /* STOS 16-bit */
- 14, 8, 8, /* MOVS 8-bit */
- 14, 8, 8, /* MOVS 16-bit */
-
- (void *)-1, /* marker to make sure we line up */
-
- 14, 8, 8, /* (80186) INS 8-bit */
- 14, 8, 8, /* (80186) INS 16-bit */
- 14, 8, 8, /* (80186) OUTS 8-bit */
- 14, 8, 8, /* (80186) OUTS 16-bit */
- 14,68,83, /* (80186) PUSH immediate, PUSHA/POPA */
- 22,29, /* (80186) IMUL immediate 8-bit */
- 25,32, /* (80186) IMUL immediate 16-bit */
- 15,25,4,16, 8, /* (80186) ENTER/LEAVE */
- 33, /* (80186) BOUND */
-
- (void *)-1 /* marker to make sure we line up */
+ 45,28, /* exception, IRET */
+ 0, 2, 4, 3, /* INTs */
+ 2, /* segment overrides */
+ 2, 2, 3, /* flag operations */
+ 8, 7,19,15, /* arithmetic adjusts */
+ 4, 4, /* decimal adjusts */
+ 2, 4, /* sign extension */
+ 2,18, 6, 2, 6,11, /* misc */
+
+ 14,14,14, /* direct JMPs */
+ 11,17,26, /* indirect JMPs */
+ 15,23, /* direct CALLs */
+ 13,19,38, /* indirect CALLs */
+ 16,22,18,25, /* returns */
+ 4,13, 5,15, /* conditional JMPs */
+ 6,16, 6,16, /* loops */
+
+ 10,10, 8, 8, /* port reads */
+ 9, 9, 7, 7, /* port writes */
+
+ 2, 9,12, /* move, 8-bit */
+ 3,12, /* move, 8-bit immediate */
+ 2, 9,12, /* move, 16-bit */
+ 4,13, /* move, 16-bit immediate */
+ 8, 8, 9, 9, /* move, AL/AX memory */
+ 2,11, 2,11, /* move, segment registers */
+ 4,17, /* exchange, 8-bit */
+ 4,17, 3, /* exchange, 16-bit */
+
+ 10,16, 9, 9, /* pushes */
+ 10,20, 8, 8, /* pops */
+
+ 3,10,10, /* ALU ops, 8-bit */
+ 4,16,10, /* ALU ops, 8-bit immediate */
+ 3,10,10, /* ALU ops, 16-bit */
+ 4,16,10, /* ALU ops, 16-bit immediate */
+ 4,16,10, /* ALU ops, 16-bit w/8-bit immediate */
+ 26,35,32,41, /* MUL */
+ 25,34,31,40, /* IMUL */
+ 29,38,35,44, /* DIV */
+ 44,53,50,59, /* IDIV */
+ 3, 3,15,15, /* INC/DEC */
+ 3, 3,10,10, /* NEG/NOT */
+
+ 2, 5, 1, /* reg shift/rotate */
+ 15,17, 1, /* m8 shift/rotate */
+ 15,17, 1, /* m16 shift/rotate */
+
+ 22, 5,22, /* CMPS 8-bit */
+ 22, 5,22, /* CMPS 16-bit */
+ 15, 5,15, /* SCAS 8-bit */
+ 15, 5,15, /* SCAS 16-bit */
+ 12, 6,11, /* LODS 8-bit */
+ 12, 6,11, /* LODS 16-bit */
+ 10, 6, 9, /* STOS 8-bit */
+ 10, 6, 9, /* STOS 16-bit */
+ 14, 8, 8, /* MOVS 8-bit */
+ 14, 8, 8, /* MOVS 16-bit */
+
+ (void *)-1, /* marker to make sure we line up */
+
+ 14, 8, 8, /* (80186) INS 8-bit */
+ 14, 8, 8, /* (80186) INS 16-bit */
+ 14, 8, 8, /* (80186) OUTS 8-bit */
+ 14, 8, 8, /* (80186) OUTS 16-bit */
+ 14,68,83, /* (80186) PUSH immediate, PUSHA/POPA */
+ 22,29, /* (80186) IMUL immediate 8-bit */
+ 25,32, /* (80186) IMUL immediate 16-bit */
+ 15,25,4,16, 8, /* (80186) ENTER/LEAVE */
+ 33, /* (80186) BOUND */
+
+ (void *)-1 /* marker to make sure we line up */
};
/* these come from the 80286 timings in OPCODE.LST */
@@ -235,76 +235,76 @@ static const struct i80x86_timing i80286_cycles =
{
80286,
- 23,17, /* exception, IRET */
- 0, 2, 3, 1, /* INTs */
- 2, /* segment overrides */
- 2, 2, 2, /* flag operations */
- 3, 3,16,14, /* arithmetic adjusts */
- 3, 3, /* decimal adjusts */
- 2, 2, /* sign extension */
- 2, 7, 3, 3, 3, 5, /* misc */
-
- 7, 7,11, /* direct JMPs */
- 7,11,26, /* indirect JMPs */
- 7,13, /* direct CALLs */
- 7,11,29, /* indirect CALLs */
- 11,15,11,15, /* returns */
- 3, 7, 4, 8, /* conditional JMPs */
- 4, 8, 4, 8, /* loops */
-
- 5, 5, 5, 5, /* port reads */
- 3, 3, 3, 3, /* port writes */
-
- 2, 3, 3, /* move, 8-bit */
- 2, 3, /* move, 8-bit immediate */
- 2, 3, 3, /* move, 16-bit */
- 2, 3, /* move, 16-bit immediate */
- 5, 5, 3, 3, /* move, AL/AX memory */
- 2, 5, 2, 3, /* move, segment registers */
- 3, 5, /* exchange, 8-bit */
- 3, 5, 3, /* exchange, 16-bit */
-
- 5, 5, 3, 3, /* pushes */
- 5, 5, 5, 5, /* pops */
-
- 2, 7, 7, /* ALU ops, 8-bit */
- 3, 7, 7, /* ALU ops, 8-bit immediate */
- 2, 7, 7, /* ALU ops, 16-bit */
- 3, 7, 7, /* ALU ops, 16-bit immediate */
- 3, 7, 7, /* ALU ops, 16-bit w/8-bit immediate */
- 13,21,16,24, /* MUL */
- 13,21,16,24, /* IMUL */
- 14,22,17,25, /* DIV */
- 17,25,20,28, /* IDIV */
- 2, 2, 7, 7, /* INC/DEC */
- 2, 2, 7, 7, /* NEG/NOT */
-
- 2, 5, 1, /* reg shift/rotate */
- 7, 8, 1, /* m8 shift/rotate */
- 7, 8, 1, /* m16 shift/rotate */
-
- 13, 5,12, /* CMPS 8-bit */
- 13, 5,12, /* CMPS 16-bit */
- 9, 5, 8, /* SCAS 8-bit */
- 9, 5, 8, /* SCAS 16-bit */
- 5, 5, 4, /* LODS 8-bit */
- 5, 5, 4, /* LODS 16-bit */
- 4, 4, 3, /* STOS 8-bit */
- 4, 4, 3, /* STOS 16-bit */
- 5, 5, 4, /* MOVS 8-bit */
- 5, 5, 4, /* MOVS 16-bit */
-
- (void *)-1, /* marker to make sure we line up */
-
- 5, 5, 4, /* (80186) INS 8-bit */
- 5, 5, 4, /* (80186) INS 16-bit */
- 5, 5, 4, /* (80186) OUTS 8-bit */
- 5, 5, 4, /* (80186) OUTS 16-bit */
- 3,17,19, /* (80186) PUSH immediate, PUSHA/POPA */
- 21,24, /* (80186) IMUL immediate 8-bit */
- 21,24, /* (80186) IMUL immediate 16-bit */
- 11,15,12, 4, 5, /* (80186) ENTER/LEAVE */
- 13, /* (80186) BOUND */
-
- (void *)-1 /* marker to make sure we line up */
+ 23,17, /* exception, IRET */
+ 0, 2, 3, 1, /* INTs */
+ 2, /* segment overrides */
+ 2, 2, 2, /* flag operations */
+ 3, 3,16,14, /* arithmetic adjusts */
+ 3, 3, /* decimal adjusts */
+ 2, 2, /* sign extension */
+ 2, 7, 3, 3, 3, 5, /* misc */
+
+ 7, 7,11, /* direct JMPs */
+ 7,11,26, /* indirect JMPs */
+ 7,13, /* direct CALLs */
+ 7,11,29, /* indirect CALLs */
+ 11,15,11,15, /* returns */
+ 3, 7, 4, 8, /* conditional JMPs */
+ 4, 8, 4, 8, /* loops */
+
+ 5, 5, 5, 5, /* port reads */
+ 3, 3, 3, 3, /* port writes */
+
+ 2, 3, 3, /* move, 8-bit */
+ 2, 3, /* move, 8-bit immediate */
+ 2, 3, 3, /* move, 16-bit */
+ 2, 3, /* move, 16-bit immediate */
+ 5, 5, 3, 3, /* move, AL/AX memory */
+ 2, 5, 2, 3, /* move, segment registers */
+ 3, 5, /* exchange, 8-bit */
+ 3, 5, 3, /* exchange, 16-bit */
+
+ 5, 5, 3, 3, /* pushes */
+ 5, 5, 5, 5, /* pops */
+
+ 2, 7, 7, /* ALU ops, 8-bit */
+ 3, 7, 7, /* ALU ops, 8-bit immediate */
+ 2, 7, 7, /* ALU ops, 16-bit */
+ 3, 7, 7, /* ALU ops, 16-bit immediate */
+ 3, 7, 7, /* ALU ops, 16-bit w/8-bit immediate */
+ 13,21,16,24, /* MUL */
+ 13,21,16,24, /* IMUL */
+ 14,22,17,25, /* DIV */
+ 17,25,20,28, /* IDIV */
+ 2, 2, 7, 7, /* INC/DEC */
+ 2, 2, 7, 7, /* NEG/NOT */
+
+ 2, 5, 1, /* reg shift/rotate */
+ 7, 8, 1, /* m8 shift/rotate */
+ 7, 8, 1, /* m16 shift/rotate */
+
+ 13, 5,12, /* CMPS 8-bit */
+ 13, 5,12, /* CMPS 16-bit */
+ 9, 5, 8, /* SCAS 8-bit */
+ 9, 5, 8, /* SCAS 16-bit */
+ 5, 5, 4, /* LODS 8-bit */
+ 5, 5, 4, /* LODS 16-bit */
+ 4, 4, 3, /* STOS 8-bit */
+ 4, 4, 3, /* STOS 16-bit */
+ 5, 5, 4, /* MOVS 8-bit */
+ 5, 5, 4, /* MOVS 16-bit */
+
+ (void *)-1, /* marker to make sure we line up */
+
+ 5, 5, 4, /* (80186) INS 8-bit */
+ 5, 5, 4, /* (80186) INS 16-bit */
+ 5, 5, 4, /* (80186) OUTS 8-bit */
+ 5, 5, 4, /* (80186) OUTS 16-bit */
+ 3,17,19, /* (80186) PUSH immediate, PUSHA/POPA */
+ 21,24, /* (80186) IMUL immediate 8-bit */
+ 21,24, /* (80186) IMUL immediate 16-bit */
+ 11,15,12, 4, 5, /* (80186) ENTER/LEAVE */
+ 13, /* (80186) BOUND */
+
+ (void *)-1 /* marker to make sure we line up */
};
diff --git a/src/emu/cpu/i86/instr186.c b/src/emu/cpu/i86/instr186.c
index 3863dccd088..aa3cfe9bf59 100644
--- a/src/emu/cpu/i86/instr186.c
+++ b/src/emu/cpu/i86/instr186.c
@@ -24,7 +24,7 @@ static void PREFIX186(_pusha)(i8086_state *cpustate) /* Opcode 0x60 */
PUSH(cpustate->regs.w[CX]);
PUSH(cpustate->regs.w[DX]);
PUSH(cpustate->regs.w[BX]);
- PUSH(tmp);
+ PUSH(tmp);
PUSH(cpustate->regs.w[BP]);
PUSH(cpustate->regs.w[SI]);
PUSH(cpustate->regs.w[DI]);
@@ -52,7 +52,7 @@ static void PREFIX186(_bound)(i8086_state *cpustate) /* Opcode 0x62 */
{
unsigned ModRM = FETCHOP;
int low = (INT16)GetRMWord(ModRM);
- int high= (INT16)GetnextRMWord;
+ int high= (INT16)GetnextRMWord;
int tmp= (INT16)RegWord(ModRM);
if (tmp<low || tmp>high) {
cpustate->pc-= ( cpustate->seg_prefix ? 3 : 2 );
diff --git a/src/emu/cpu/i86/instr286.c b/src/emu/cpu/i86/instr286.c
index e1cd5759c66..4b2a33f5097 100644
--- a/src/emu/cpu/i86/instr286.c
+++ b/src/emu/cpu/i86/instr286.c
@@ -159,10 +159,10 @@ static void i80286_data_descriptor_full(i80286_state *cpustate, int reg, UINT16
UINT8 r;
UINT32 addr;
/* selector format
- 15..3 number/address in descriptor table
- 2: 0 global, 1 local descriptor table
- 1,0: requested privileg level
- must be higher or same as current privileg level in code selector */
+ 15..3 number/address in descriptor table
+ 2: 0 global, 1 local descriptor table
+ 1,0: requested privileg level
+ must be higher or same as current privileg level in code selector */
if ((reg != SS) && !IDXTBL(selector)) {
cpustate->sregs[reg]=0;
cpustate->limit[reg]=0;
@@ -324,10 +324,10 @@ static void i80286_code_descriptor(i80286_state *cpustate, UINT16 selector, UINT
UINT8 r;
UINT32 addr;
/* selector format
- 15..3 number/address in descriptor table
- 2: 0 global, 1 local descriptor table
- 1,0: requested privileg level
- must be higher or same as current privileg level in code selector */
+ 15..3 number/address in descriptor table
+ 2: 0 global, 1 local descriptor table
+ 1,0: requested privileg level
+ must be higher or same as current privileg level in code selector */
if ((addr = i80286_selector_address(cpustate,selector)) == -1) throw TRAP(GENERAL_PROTECTION_FAULT,IDXTBL(selector));
desc[0] = ReadWord(addr);
desc[1] = ReadWord(addr+2);
@@ -574,7 +574,7 @@ static void PREFIX286(_0fpre)(i8086_state *cpustate)
break;
case 1:
/* lgdt, lldt in protected mode privilege level 0 required else common protection
- failure 0xd */
+ failure 0xd */
ModRM = FETCHOP;
switch (ModRM&0x38) {
case 0: /* sgdt */
@@ -648,7 +648,7 @@ static void PREFIX286(_0fpre)(i8086_state *cpustate)
if (PM&&(CPL!=0)) throw TRAP(GENERAL_PROTECTION_FAULT,0);
cpustate->msw = (cpustate->msw&1)|ReadWord(0x806);
cpustate->tr.sel = ReadWord(0x816);
- tmp = ReadWord(0x818);
+ tmp = ReadWord(0x818);
ExpandFlags(tmp);
cpustate->flags = tmp;
cpustate->flags = CompressFlags();
@@ -839,7 +839,7 @@ static void PREFIX286(_escape)(i8086_state *cpustate) /* Opcodes 0xd8, 0xd9,
if ((cpustate->msw&8) || (cpustate->msw&4)) throw TRAP(FPU_UNAVAILABLE,-1);
unsigned ModRM = FETCH;
ICOUNT -= timing.nop;
- GetRMByte(ModRM);
+ GetRMByte(ModRM);
}
static void PREFIX286(_escape_7)(i8086_state *cpustate) /* Opcode 0xdf */
@@ -847,7 +847,7 @@ static void PREFIX286(_escape_7)(i8086_state *cpustate) /* Opcode 0xdf */
if ((cpustate->msw&8) || (cpustate->msw&4)) throw TRAP(FPU_UNAVAILABLE,-1);
unsigned ModRM = FETCH;
ICOUNT -= timing.nop;
- GetRMByte(ModRM);
+ GetRMByte(ModRM);
if (ModRM == 0xe0) cpustate->regs.w[AX] = 0xffff; // FPU not present
}
@@ -865,4 +865,3 @@ static void i80286_check_permission(i8086_state *cpustate, UINT8 check_seg, UINT
if (trap) throw TRAP(trap, 0);
}
}
-
diff --git a/src/emu/cpu/i86/instr86.c b/src/emu/cpu/i86/instr86.c
index d4064a38b02..0cdba2eff38 100644
--- a/src/emu/cpu/i86/instr86.c
+++ b/src/emu/cpu/i86/instr86.c
@@ -85,31 +85,31 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
switch (ModRM & 0x38)
{
- case 0x00: /* ROL eb,1 */
+ case 0x00: /* ROL eb,1 */
cpustate->CarryVal = src & 0x80;
dst=(src<<1)+CF;
PutbackRMByte(ModRM,dst);
cpustate->OverVal = (src^dst)&0x80;
break;
- case 0x08: /* ROR eb,1 */
+ case 0x08: /* ROR eb,1 */
cpustate->CarryVal = src & 0x01;
dst = ((CF<<8)+src) >> 1;
PutbackRMByte(ModRM,dst);
cpustate->OverVal = (src^dst)&0x80;
break;
- case 0x10: /* RCL eb,1 */
+ case 0x10: /* RCL eb,1 */
dst=(src<<1)+CF;
PutbackRMByte(ModRM,dst);
SetCFB(dst);
cpustate->OverVal = (src^dst)&0x80;
break;
- case 0x18: /* RCR eb,1 */
+ case 0x18: /* RCR eb,1 */
dst = ((CF<<8)+src) >> 1;
PutbackRMByte(ModRM,dst);
cpustate->CarryVal = src & 0x01;
cpustate->OverVal = (src^dst)&0x80;
break;
- case 0x20: /* SHL eb,1 */
+ case 0x20: /* SHL eb,1 */
case 0x30:
dst = src << 1;
PutbackRMByte(ModRM,dst);
@@ -118,7 +118,7 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
cpustate->AuxVal = 1;
SetSZPF_Byte(dst);
break;
- case 0x28: /* SHR eb,1 */
+ case 0x28: /* SHR eb,1 */
dst = src >> 1;
PutbackRMByte(ModRM,dst);
cpustate->CarryVal = src & 0x01;
@@ -126,7 +126,7 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
cpustate->AuxVal = 1;
SetSZPF_Byte(dst);
break;
- case 0x38: /* SAR eb,1 */
+ case 0x38: /* SAR eb,1 */
dst = ((INT8)src) >> 1;
PutbackRMByte(ModRM,dst);
cpustate->CarryVal = src & 0x01;
@@ -143,7 +143,7 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
switch (ModRM & 0x38)
{
- case 0x00: /* ROL eb,count */
+ case 0x00: /* ROL eb,count */
for (; count > 0; count--)
{
cpustate->CarryVal = dst & 0x80;
@@ -151,7 +151,7 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
}
PutbackRMByte(ModRM,(BYTE)dst);
break;
- case 0x08: /* ROR eb,count */
+ case 0x08: /* ROR eb,count */
for (; count > 0; count--)
{
cpustate->CarryVal = dst & 0x01;
@@ -159,7 +159,7 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
}
PutbackRMByte(ModRM,(BYTE)dst);
break;
- case 0x10: /* RCL eb,count */
+ case 0x10: /* RCL eb,count */
for (; count > 0; count--)
{
dst = (dst << 1) + tmpcf;
@@ -168,7 +168,7 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
PutbackRMByte(ModRM,(BYTE)dst);
cpustate->CarryVal = tmpcf;
break;
- case 0x18: /* RCR eb,count */
+ case 0x18: /* RCR eb,count */
for (; count > 0; count--)
{
dst = (tmpcf<<8)+dst;
@@ -179,14 +179,14 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
cpustate->CarryVal = tmpcf;
break;
case 0x20:
- case 0x30: /* SHL eb,count */
+ case 0x30: /* SHL eb,count */
for(int i=0;i<count;i++) dst<<= 1;
SetCFB(dst);
cpustate->AuxVal = 1;
SetSZPF_Byte(dst);
PutbackRMByte(ModRM,(BYTE)dst);
break;
- case 0x28: /* SHR eb,count */
+ case 0x28: /* SHR eb,count */
for(int i=0;i<count-1;i++) dst>>= 1;
cpustate->CarryVal = dst & 0x1;
dst >>= 1;
@@ -194,7 +194,7 @@ static void PREFIX86(_rotate_shift_Byte)(i8086_state *cpustate, unsigned ModRM,
cpustate->AuxVal = 1;
PutbackRMByte(ModRM,(BYTE)dst);
break;
- case 0x38: /* SAR eb,count */
+ case 0x38: /* SAR eb,count */
for(int i=0;i<count-1;i++) dst = ((INT8)dst) >> 1;
cpustate->CarryVal = dst & 0x1;
dst = ((INT8)((BYTE)dst)) >> 1;
@@ -222,42 +222,42 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
switch (ModRM & 0x38)
{
#if 0
- case 0x00: /* ROL ew,1 */
+ case 0x00: /* ROL ew,1 */
tmp2 = (tmp << 1) + CF;
SetCFW(tmp2);
cpustate->OverVal = !(!(tmp & 0x4000)) != CF;
PutbackRMWord(ModRM,tmp2);
break;
- case 0x08: /* ROR ew,1 */
+ case 0x08: /* ROR ew,1 */
cpustate->CarryVal = tmp & 0x01;
tmp2 = (tmp >> 1) + ((unsigned)CF << 15);
cpustate->OverVal = !(!(tmp & 0x8000)) != CF;
PutbackRMWord(ModRM,tmp2);
break;
- case 0x10: /* RCL ew,1 */
+ case 0x10: /* RCL ew,1 */
tmp2 = (tmp << 1) + CF;
SetCFW(tmp2);
cpustate->OverVal = (tmp ^ (tmp << 1)) & 0x8000;
PutbackRMWord(ModRM,tmp2);
break;
- case 0x18: /* RCR ew,1 */
+ case 0x18: /* RCR ew,1 */
tmp2 = (tmp >> 1) + ((unsigned)CF << 15);
cpustate->OverVal = !(!(tmp & 0x8000)) != CF;
cpustate->CarryVal = tmp & 0x01;
PutbackRMWord(ModRM,tmp2);
break;
- case 0x20: /* SHL ew,1 */
+ case 0x20: /* SHL ew,1 */
case 0x30:
tmp <<= 1;
- SetCFW(tmp);
+ SetCFW(tmp);
SetOFW_Add(tmp,tmp2,tmp2);
cpustate->AuxVal = 1;
SetSZPF_Word(tmp);
PutbackRMWord(ModRM,tmp);
break;
- case 0x28: /* SHR ew,1 */
+ case 0x28: /* SHR ew,1 */
cpustate->CarryVal = tmp & 0x01;
cpustate->OverVal = tmp & 0x8000;
@@ -267,7 +267,7 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
cpustate->AuxVal = 1;
PutbackRMWord(ModRM,tmp2);
break;
- case 0x38: /* SAR ew,1 */
+ case 0x38: /* SAR ew,1 */
cpustate->CarryVal = tmp & 0x01;
cpustate->OverVal = 0;
@@ -278,31 +278,31 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
PutbackRMWord(ModRM,tmp2);
break;
#else
- case 0x00: /* ROL ew,1 */
+ case 0x00: /* ROL ew,1 */
cpustate->CarryVal = src & 0x8000;
dst=(src<<1)+CF;
PutbackRMWord(ModRM,dst);
cpustate->OverVal = (src^dst)&0x8000;
break;
- case 0x08: /* ROR ew,1 */
+ case 0x08: /* ROR ew,1 */
cpustate->CarryVal = src & 0x01;
dst = ((CF<<16)+src) >> 1;
PutbackRMWord(ModRM,dst);
cpustate->OverVal = (src^dst)&0x8000;
break;
- case 0x10: /* RCL ew,1 */
+ case 0x10: /* RCL ew,1 */
dst=(src<<1)+CF;
PutbackRMWord(ModRM,dst);
SetCFW(dst);
cpustate->OverVal = (src^dst)&0x8000;
break;
- case 0x18: /* RCR ew,1 */
+ case 0x18: /* RCR ew,1 */
dst = ((CF<<16)+src) >> 1;
PutbackRMWord(ModRM,dst);
cpustate->CarryVal = src & 0x01;
cpustate->OverVal = (src^dst)&0x8000;
break;
- case 0x20: /* SHL ew,1 */
+ case 0x20: /* SHL ew,1 */
case 0x30:
dst = src << 1;
PutbackRMWord(ModRM,dst);
@@ -311,7 +311,7 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
cpustate->AuxVal = 1;
SetSZPF_Word(dst);
break;
- case 0x28: /* SHR ew,1 */
+ case 0x28: /* SHR ew,1 */
dst = src >> 1;
PutbackRMWord(ModRM,dst);
cpustate->CarryVal = src & 0x01;
@@ -319,7 +319,7 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
cpustate->AuxVal = 1;
SetSZPF_Word(dst);
break;
- case 0x38: /* SAR ew,1 */
+ case 0x38: /* SAR ew,1 */
dst = ((INT16)src) >> 1;
PutbackRMWord(ModRM,dst);
cpustate->CarryVal = src & 0x01;
@@ -337,7 +337,7 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
switch (ModRM & 0x38)
{
- case 0x00: /* ROL ew,count */
+ case 0x00: /* ROL ew,count */
for (; count > 0; count--)
{
cpustate->CarryVal = dst & 0x8000;
@@ -345,7 +345,7 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
}
PutbackRMWord(ModRM,dst);
break;
- case 0x08: /* ROR ew,count */
+ case 0x08: /* ROR ew,count */
for (; count > 0; count--)
{
cpustate->CarryVal = dst & 0x01;
@@ -362,7 +362,7 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
PutbackRMWord(ModRM,dst);
cpustate->CarryVal = tmpcf;
break;
- case 0x18: /* RCR ew,count */
+ case 0x18: /* RCR ew,count */
for (; count > 0; count--)
{
dst = dst + (tmpcf << 16);
@@ -373,14 +373,14 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
cpustate->CarryVal = tmpcf;
break;
case 0x20:
- case 0x30: /* SHL ew,count */
+ case 0x30: /* SHL ew,count */
for(int i=0;i<count;i++) dst<<= 1;
SetCFW(dst);
cpustate->AuxVal = 1;
SetSZPF_Word(dst);
PutbackRMWord(ModRM,dst);
break;
- case 0x28: /* SHR ew,count */
+ case 0x28: /* SHR ew,count */
for(int i=0;i<count-1;i++) dst>>= 1;
cpustate->CarryVal = dst & 0x1;
dst >>= 1;
@@ -388,7 +388,7 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
cpustate->AuxVal = 1;
PutbackRMWord(ModRM,dst);
break;
- case 0x38: /* SAR ew,count */
+ case 0x38: /* SAR ew,count */
for(int i=0;i<count-1;i++) dst = ((INT16)dst) >> 1;
cpustate->CarryVal = dst & 0x01;
dst = ((INT16)((WORD)dst)) >> 1;
@@ -403,13 +403,13 @@ static void PREFIX86(_rotate_shift_Word)(i8086_state *cpustate, unsigned ModRM,
static void PREFIX(rep)(i8086_state *cpustate,int flagval)
{
- /* Handles rep- and repnz- prefixes. flagval is the value of ZF for the
- loop to continue for CMPS and SCAS instructions. */
+ /* Handles rep- and repnz- prefixes. flagval is the value of ZF for the
+ loop to continue for CMPS and SCAS instructions. */
unsigned next = FETCHOP;
- switch(next)
- {
+ switch(next)
+ {
case 0x26: /* ES: */
cpustate->seg_prefix = TRUE;
cpustate->prefix_seg = ES;
@@ -439,7 +439,7 @@ static void PREFIX(rep)(i8086_state *cpustate,int flagval)
PREFIX(rep)(cpustate, flagval);
break;
#ifndef I8086
- case 0x6c: /* REP INSB */
+ case 0x6c: /* REP INSB */
#ifdef I80286
if (PM && (CPL>IOPL)) throw TRAP(GENERAL_PROTECTION_FAULT, 0);
#endif
@@ -550,7 +550,7 @@ static void PREFIX(rep)(i8086_state *cpustate,int flagval)
if (ICOUNT <= 0) { cpustate->pc = cpustate->prevpc; cpustate->rep_in_progress = TRUE; break; }
dst = GetMemB(ES, cpustate->regs.w[DI]);
src = GetMemB(DS, cpustate->regs.w[SI]);
- SUBB(src,dst); /* opposite of the usual convention */
+ SUBB(src,dst); /* opposite of the usual convention */
cpustate->regs.w[CX]--;
cpustate->regs.w[DI] += cpustate->DirVal;
cpustate->regs.w[SI] += cpustate->DirVal;
@@ -569,7 +569,7 @@ static void PREFIX(rep)(i8086_state *cpustate,int flagval)
if (ICOUNT <= 0) { cpustate->pc = cpustate->prevpc; cpustate->rep_in_progress = TRUE; break; }
dst = GetMemW(ES, cpustate->regs.w[DI]);
src = GetMemW(DS, cpustate->regs.w[SI]);
- SUBW(src,dst); /* opposite of the usual convention */
+ SUBW(src,dst); /* opposite of the usual convention */
cpustate->regs.w[CX]--;
cpustate->regs.w[DI] += 2 * cpustate->DirVal;
cpustate->regs.w[SI] += 2 * cpustate->DirVal;
@@ -640,7 +640,7 @@ static void PREFIX(rep)(i8086_state *cpustate,int flagval)
if (ICOUNT <= 0) { cpustate->pc = cpustate->prevpc; cpustate->rep_in_progress = TRUE; break; }
src = GetMemB(ES, cpustate->regs.w[DI]);
dst = cpustate->regs.b[AL];
- SUBB(dst,src);
+ SUBB(dst,src);
cpustate->regs.w[CX]--;
cpustate->regs.w[DI] += cpustate->DirVal;
ICOUNT -= timing.rep_scas8_count;
@@ -658,7 +658,7 @@ static void PREFIX(rep)(i8086_state *cpustate,int flagval)
if (ICOUNT <= 0) { cpustate->pc = cpustate->prevpc; cpustate->rep_in_progress = TRUE; break; }
src = GetMemW(ES, cpustate->regs.w[DI]);
dst = cpustate->regs.w[AX];
- SUBW(dst,src);
+ SUBW(dst,src);
cpustate->regs.w[CX]--;
cpustate->regs.w[DI] += 2 * cpustate->DirVal;
ICOUNT -= timing.rep_scas16_count;
@@ -675,12 +675,12 @@ static void PREFIX86(_add_br8)(i8086_state *cpustate) /* Opcode 0x00 */
DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8;
ADDB(dst,src);
- PutbackRMByte(ModRM,dst);
+ PutbackRMByte(ModRM,dst);
}
static void PREFIX86(_add_wr16)(i8086_state *cpustate) /* Opcode 0x01 */
{
- DEF_wr16(dst,src);
+ DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16;
ADDW(dst,src);
PutbackRMWord(ModRM,dst);
@@ -690,13 +690,13 @@ static void PREFIX86(_add_r8b)(i8086_state *cpustate) /* Opcode 0x02 */
{
DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
- ADDB(dst,src);
- RegByte(ModRM)=dst;
+ ADDB(dst,src);
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_add_r16w)(i8086_state *cpustate) /* Opcode 0x03 */
{
- DEF_r16w(dst,src);
+ DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
ADDW(dst,src);
RegWord(ModRM)=dst;
@@ -705,16 +705,16 @@ static void PREFIX86(_add_r16w)(i8086_state *cpustate) /* Opcode 0x03 */
static void PREFIX86(_add_ald8)(i8086_state *cpustate) /* Opcode 0x04 */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- ADDB(dst,src);
+ ADDB(dst,src);
cpustate->regs.b[AL]=dst;
}
static void PREFIX86(_add_axd16)(i8086_state *cpustate) /* Opcode 0x05 */
{
- DEF_axd16(dst,src);
+ DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
ADDW(dst,src);
cpustate->regs.w[AX]=dst;
@@ -741,47 +741,47 @@ static void PREFIX86(_pop_es)(i8086_state *cpustate) /* Opcode 0x07 */
static void PREFIX86(_or_br8)(i8086_state *cpustate) /* Opcode 0x08 */
{
- DEF_br8(dst,src);
+ DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8;
ORB(dst,src);
- PutbackRMByte(ModRM,dst);
+ PutbackRMByte(ModRM,dst);
}
static void PREFIX86(_or_wr16)(i8086_state *cpustate) /* Opcode 0x09 */
{
DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16;
- ORW(dst,src);
- PutbackRMWord(ModRM,dst);
+ ORW(dst,src);
+ PutbackRMWord(ModRM,dst);
}
static void PREFIX86(_or_r8b)(i8086_state *cpustate) /* Opcode 0x0a */
{
DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
- ORB(dst,src);
- RegByte(ModRM)=dst;
+ ORB(dst,src);
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_or_r16w)(i8086_state *cpustate) /* Opcode 0x0b */
{
- DEF_r16w(dst,src);
+ DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
- ORW(dst,src);
- RegWord(ModRM)=dst;
+ ORW(dst,src);
+ RegWord(ModRM)=dst;
}
static void PREFIX86(_or_ald8)(i8086_state *cpustate) /* Opcode 0x0c */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- ORB(dst,src);
+ ORB(dst,src);
cpustate->regs.b[AL]=dst;
}
static void PREFIX86(_or_axd16)(i8086_state *cpustate) /* Opcode 0x0d */
{
- DEF_axd16(dst,src);
+ DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
ORW(dst,src);
cpustate->regs.w[AX]=dst;
@@ -807,50 +807,50 @@ static void PREFIX86(_pop_cs)(i8086_state *cpustate) /* Opcode 0x0f */
static void PREFIX86(_adc_br8)(i8086_state *cpustate) /* Opcode 0x10 */
{
- int tmpcf;
+ int tmpcf;
DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8;
- src+=CF;
- ADCB(dst,src,tmpcf);
- PutbackRMByte(ModRM,dst);
+ src+=CF;
+ ADCB(dst,src,tmpcf);
+ PutbackRMByte(ModRM,dst);
cpustate->CarryVal = tmpcf;
}
static void PREFIX86(_adc_wr16)(i8086_state *cpustate) /* Opcode 0x11 */
{
- int tmpcf;
+ int tmpcf;
DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16;
- src+=CF;
- ADCW(dst,src,tmpcf);
+ src+=CF;
+ ADCW(dst,src,tmpcf);
PutbackRMWord(ModRM,dst);
cpustate->CarryVal = tmpcf;
}
static void PREFIX86(_adc_r8b)(i8086_state *cpustate) /* Opcode 0x12 */
{
- DEF_r8b(dst,src);
+ DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
src+=CF;
- ADDB(dst,src);
- RegByte(ModRM)=dst;
+ ADDB(dst,src);
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_adc_r16w)(i8086_state *cpustate) /* Opcode 0x13 */
{
- DEF_r16w(dst,src);
+ DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
src+=CF;
- ADDW(dst,src);
- RegWord(ModRM)=dst;
+ ADDW(dst,src);
+ RegWord(ModRM)=dst;
}
static void PREFIX86(_adc_ald8)(i8086_state *cpustate) /* Opcode 0x14 */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- src+=CF;
- ADDB(dst,src);
+ src+=CF;
+ ADDB(dst,src);
cpustate->regs.b[AL] = dst;
}
@@ -859,7 +859,7 @@ static void PREFIX86(_adc_axd16)(i8086_state *cpustate) /* Opcode 0x15 */
DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
src+=CF;
- ADDW(dst,src);
+ ADDW(dst,src);
cpustate->regs.w[AX]=dst;
}
@@ -871,21 +871,21 @@ static void PREFIX86(_push_ss)(i8086_state *cpustate) /* Opcode 0x16 */
static void PREFIX86(_sbb_br8)(i8086_state *cpustate) /* Opcode 0x18 */
{
- int tmpcf;
+ int tmpcf;
DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8;
- src+=CF;
- SBBB(dst,src,tmpcf);
- PutbackRMByte(ModRM,dst);
+ src+=CF;
+ SBBB(dst,src,tmpcf);
+ PutbackRMByte(ModRM,dst);
cpustate->CarryVal = tmpcf;
}
static void PREFIX86(_sbb_wr16)(i8086_state *cpustate) /* Opcode 0x19 */
{
- int tmpcf;
- DEF_wr16(dst,src);
+ int tmpcf;
+ DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16;
- src+=CF;
+ src+=CF;
SBBW(dst,src,tmpcf);
PutbackRMWord(ModRM,dst);
cpustate->CarryVal = tmpcf;
@@ -896,34 +896,34 @@ static void PREFIX86(_sbb_r8b)(i8086_state *cpustate) /* Opcode 0x1a */
DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
src+=CF;
- SUBB(dst,src);
- RegByte(ModRM)=dst;
+ SUBB(dst,src);
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_sbb_r16w)(i8086_state *cpustate) /* Opcode 0x1b */
{
- DEF_r16w(dst,src);
+ DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
src+=CF;
- SUBW(dst,src);
- RegWord(ModRM)= dst;
+ SUBW(dst,src);
+ RegWord(ModRM)= dst;
}
static void PREFIX86(_sbb_ald8)(i8086_state *cpustate) /* Opcode 0x1c */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- src+=CF;
- SUBB(dst,src);
+ src+=CF;
+ SUBB(dst,src);
cpustate->regs.b[AL] = dst;
}
static void PREFIX86(_sbb_axd16)(i8086_state *cpustate) /* Opcode 0x1d */
{
- DEF_axd16(dst,src);
+ DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
src+=CF;
- SUBW(dst,src);
+ SUBW(dst,src);
cpustate->regs.w[AX]=dst;
}
@@ -946,49 +946,49 @@ static void PREFIX86(_pop_ds)(i8086_state *cpustate) /* Opcode 0x1f */
static void PREFIX86(_and_br8)(i8086_state *cpustate) /* Opcode 0x20 */
{
- DEF_br8(dst,src);
+ DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8;
- ANDB(dst,src);
- PutbackRMByte(ModRM,dst);
+ ANDB(dst,src);
+ PutbackRMByte(ModRM,dst);
}
static void PREFIX86(_and_wr16)(i8086_state *cpustate) /* Opcode 0x21 */
{
- DEF_wr16(dst,src);
+ DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16;
- ANDW(dst,src);
- PutbackRMWord(ModRM,dst);
+ ANDW(dst,src);
+ PutbackRMWord(ModRM,dst);
}
static void PREFIX86(_and_r8b)(i8086_state *cpustate) /* Opcode 0x22 */
{
- DEF_r8b(dst,src);
+ DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
- ANDB(dst,src);
- RegByte(ModRM)=dst;
+ ANDB(dst,src);
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_and_r16w)(i8086_state *cpustate) /* Opcode 0x23 */
{
- DEF_r16w(dst,src);
+ DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
ANDW(dst,src);
- RegWord(ModRM)=dst;
+ RegWord(ModRM)=dst;
}
static void PREFIX86(_and_ald8)(i8086_state *cpustate) /* Opcode 0x24 */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- ANDB(dst,src);
+ ANDB(dst,src);
cpustate->regs.b[AL] = dst;
}
static void PREFIX86(_and_axd16)(i8086_state *cpustate) /* Opcode 0x25 */
{
- DEF_axd16(dst,src);
+ DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
- ANDW(dst,src);
+ ANDW(dst,src);
cpustate->regs.w[AX]=dst;
}
@@ -1014,41 +1014,41 @@ static void PREFIX86(_daa)(i8086_state *cpustate) /* Opcode 0x27 */
static void PREFIX86(_sub_br8)(i8086_state *cpustate) /* Opcode 0x28 */
{
- DEF_br8(dst,src);
+ DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8;
- SUBB(dst,src);
- PutbackRMByte(ModRM,dst);
+ SUBB(dst,src);
+ PutbackRMByte(ModRM,dst);
}
static void PREFIX86(_sub_wr16)(i8086_state *cpustate) /* Opcode 0x29 */
{
- DEF_wr16(dst,src);
+ DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16;
- SUBW(dst,src);
- PutbackRMWord(ModRM,dst);
+ SUBW(dst,src);
+ PutbackRMWord(ModRM,dst);
}
static void PREFIX86(_sub_r8b)(i8086_state *cpustate) /* Opcode 0x2a */
{
- DEF_r8b(dst,src);
+ DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
SUBB(dst,src);
- RegByte(ModRM)=dst;
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_sub_r16w)(i8086_state *cpustate) /* Opcode 0x2b */
{
- DEF_r16w(dst,src);
+ DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
- SUBW(dst,src);
- RegWord(ModRM)=dst;
+ SUBW(dst,src);
+ RegWord(ModRM)=dst;
}
static void PREFIX86(_sub_ald8)(i8086_state *cpustate) /* Opcode 0x2c */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- SUBB(dst,src);
+ SUBB(dst,src);
cpustate->regs.b[AL] = dst;
}
@@ -1056,7 +1056,7 @@ static void PREFIX86(_sub_axd16)(i8086_state *cpustate) /* Opcode 0x2d */
{
DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
- SUBW(dst,src);
+ SUBW(dst,src);
cpustate->regs.w[AX]=dst;
}
@@ -1083,9 +1083,9 @@ static void PREFIX86(_das)(i8086_state *cpustate) /* Opcode 0x2f */
static void PREFIX86(_xor_br8)(i8086_state *cpustate) /* Opcode 0x30 */
{
- DEF_br8(dst,src);
+ DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_mr8;
- XORB(dst,src);
+ XORB(dst,src);
PutbackRMByte(ModRM,dst);
}
@@ -1094,22 +1094,22 @@ static void PREFIX86(_xor_wr16)(i8086_state *cpustate) /* Opcode 0x31 */
DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_mr16;
XORW(dst,src);
- PutbackRMWord(ModRM,dst);
+ PutbackRMWord(ModRM,dst);
}
static void PREFIX86(_xor_r8b)(i8086_state *cpustate) /* Opcode 0x32 */
{
- DEF_r8b(dst,src);
+ DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
- XORB(dst,src);
- RegByte(ModRM)=dst;
+ XORB(dst,src);
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_xor_r16w)(i8086_state *cpustate) /* Opcode 0x33 */
{
- DEF_r16w(dst,src);
+ DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
- XORW(dst,src);
+ XORW(dst,src);
RegWord(ModRM)=dst;
}
@@ -1117,15 +1117,15 @@ static void PREFIX86(_xor_ald8)(i8086_state *cpustate) /* Opcode 0x34 */
{
DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- XORB(dst,src);
+ XORB(dst,src);
cpustate->regs.b[AL] = dst;
}
static void PREFIX86(_xor_axd16)(i8086_state *cpustate) /* Opcode 0x35 */
{
- DEF_axd16(dst,src);
+ DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
- XORW(dst,src);
+ XORW(dst,src);
cpustate->regs.w[AX]=dst;
}
@@ -1135,61 +1135,61 @@ static void PREFIX86(_aaa)(i8086_state *cpustate) /* Opcode 0x37 */
if (cpustate->regs.b[AL]>0xf9) ALcarry=2;
if (AF || ((cpustate->regs.b[AL] & 0xf) > 9))
- {
+ {
cpustate->regs.b[AL] += 6;
cpustate->regs.b[AH] += ALcarry;
cpustate->AuxVal = 1;
cpustate->CarryVal = 1;
- }
+ }
else
{
cpustate->AuxVal = 0;
cpustate->CarryVal = 0;
- }
+ }
cpustate->regs.b[AL] &= 0x0F;
ICOUNT -= timing.aaa;
}
static void PREFIX86(_cmp_br8)(i8086_state *cpustate) /* Opcode 0x38 */
{
- DEF_br8(dst,src);
+ DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
- SUBB(dst,src);
+ SUBB(dst,src);
}
static void PREFIX86(_cmp_wr16)(i8086_state *cpustate) /* Opcode 0x39 */
{
DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
- SUBW(dst,src);
+ SUBW(dst,src);
}
static void PREFIX86(_cmp_r8b)(i8086_state *cpustate) /* Opcode 0x3a */
{
- DEF_r8b(dst,src);
+ DEF_r8b(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
- SUBB(dst,src);
+ SUBB(dst,src);
}
static void PREFIX86(_cmp_r16w)(i8086_state *cpustate) /* Opcode 0x3b */
{
DEF_r16w(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
- SUBW(dst,src);
+ SUBW(dst,src);
}
static void PREFIX86(_cmp_ald8)(i8086_state *cpustate) /* Opcode 0x3c */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- SUBB(dst,src);
+ SUBB(dst,src);
}
static void PREFIX86(_cmp_axd16)(i8086_state *cpustate) /* Opcode 0x3d */
{
- DEF_axd16(dst,src);
+ DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
- SUBW(dst,src);
+ SUBW(dst,src);
}
static void PREFIX86(_aas)(i8086_state *cpustate) /* Opcode 0x3f */
@@ -1198,40 +1198,40 @@ static void PREFIX86(_aas)(i8086_state *cpustate) /* Opcode 0x3f */
// if (cpustate->regs.b[AL]>0xf9) ALcarry=2;
if (AF || ((cpustate->regs.b[AL] & 0xf) > 9))
- {
+ {
cpustate->regs.b[AL] -= 6;
cpustate->regs.b[AH] -= 1;
cpustate->AuxVal = 1;
cpustate->CarryVal = 1;
- }
+ }
else
{
cpustate->AuxVal = 0;
cpustate->CarryVal = 0;
- }
+ }
cpustate->regs.b[AL] &= 0x0F;
ICOUNT -= timing.aas;
}
-#define IncWordReg(Reg) \
-{ \
+#define IncWordReg(Reg) \
+{ \
unsigned tmp = (unsigned)cpustate->regs.w[Reg]; \
- unsigned tmp1 = tmp+1; \
- SetOFW_Add(tmp1,tmp,1); \
- SetAF(tmp1,tmp,1); \
- SetSZPF_Word(tmp1); \
- cpustate->regs.w[Reg]=tmp1; \
- ICOUNT -= timing.incdec_r16; \
+ unsigned tmp1 = tmp+1; \
+ SetOFW_Add(tmp1,tmp,1); \
+ SetAF(tmp1,tmp,1); \
+ SetSZPF_Word(tmp1); \
+ cpustate->regs.w[Reg]=tmp1; \
+ ICOUNT -= timing.incdec_r16; \
}
static void PREFIX86(_inc_ax)(i8086_state *cpustate) /* Opcode 0x40 */
{
- IncWordReg(AX);
+ IncWordReg(AX);
}
static void PREFIX86(_inc_cx)(i8086_state *cpustate) /* Opcode 0x41 */
{
- IncWordReg(CX);
+ IncWordReg(CX);
}
static void PREFIX86(_inc_dx)(i8086_state *cpustate) /* Opcode 0x42 */
@@ -1246,7 +1246,7 @@ static void PREFIX(_inc_bx)(i8086_state *cpustate) /* Opcode 0x43 */
static void PREFIX86(_inc_sp)(i8086_state *cpustate) /* Opcode 0x44 */
{
- IncWordReg(SP);
+ IncWordReg(SP);
}
static void PREFIX86(_inc_bp)(i8086_state *cpustate) /* Opcode 0x45 */
@@ -1261,23 +1261,23 @@ static void PREFIX86(_inc_si)(i8086_state *cpustate) /* Opcode 0x46 */
static void PREFIX86(_inc_di)(i8086_state *cpustate) /* Opcode 0x47 */
{
- IncWordReg(DI);
+ IncWordReg(DI);
}
-#define DecWordReg(Reg) \
-{ \
+#define DecWordReg(Reg) \
+{ \
unsigned tmp = (unsigned)cpustate->regs.w[Reg]; \
- unsigned tmp1 = tmp-1; \
- SetOFW_Sub(tmp1,1,tmp); \
- SetAF(tmp1,tmp,1); \
- SetSZPF_Word(tmp1); \
- cpustate->regs.w[Reg]=tmp1; \
- ICOUNT -= timing.incdec_r16; \
+ unsigned tmp1 = tmp-1; \
+ SetOFW_Sub(tmp1,1,tmp); \
+ SetAF(tmp1,tmp,1); \
+ SetSZPF_Word(tmp1); \
+ cpustate->regs.w[Reg]=tmp1; \
+ ICOUNT -= timing.incdec_r16; \
}
static void PREFIX86(_dec_ax)(i8086_state *cpustate) /* Opcode 0x48 */
{
- DecWordReg(AX);
+ DecWordReg(AX);
}
static void PREFIX86(_dec_cx)(i8086_state *cpustate) /* Opcode 0x49 */
@@ -1297,22 +1297,22 @@ static void PREFIX86(_dec_bx)(i8086_state *cpustate) /* Opcode 0x4b */
static void PREFIX86(_dec_sp)(i8086_state *cpustate) /* Opcode 0x4c */
{
- DecWordReg(SP);
+ DecWordReg(SP);
}
static void PREFIX86(_dec_bp)(i8086_state *cpustate) /* Opcode 0x4d */
{
- DecWordReg(BP);
+ DecWordReg(BP);
}
static void PREFIX86(_dec_si)(i8086_state *cpustate) /* Opcode 0x4e */
{
- DecWordReg(SI);
+ DecWordReg(SI);
}
static void PREFIX86(_dec_di)(i8086_state *cpustate) /* Opcode 0x4f */
{
- DecWordReg(DI);
+ DecWordReg(DI);
}
static void PREFIX86(_push_ax)(i8086_state *cpustate) /* Opcode 0x50 */
@@ -1486,7 +1486,7 @@ static void PREFIX86(_jnz)(i8086_state *cpustate) /* Opcode 0x75 */
static void PREFIX86(_jbe)(i8086_state *cpustate) /* Opcode 0x76 */
{
int tmp = (int)((INT8)FETCH);
- if (CF || ZF) {
+ if (CF || ZF) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1508,7 +1508,7 @@ static void PREFIX86(_jnbe)(i8086_state *cpustate) /* Opcode 0x77 */
static void PREFIX86(_js)(i8086_state *cpustate) /* Opcode 0x78 */
{
int tmp = (int)((INT8)FETCH);
- if (SF) {
+ if (SF) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1519,7 +1519,7 @@ static void PREFIX86(_js)(i8086_state *cpustate) /* Opcode 0x78 */
static void PREFIX86(_jns)(i8086_state *cpustate) /* Opcode 0x79 */
{
int tmp = (int)((INT8)FETCH);
- if (!SF) {
+ if (!SF) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1530,7 +1530,7 @@ static void PREFIX86(_jns)(i8086_state *cpustate) /* Opcode 0x79 */
static void PREFIX86(_jp)(i8086_state *cpustate) /* Opcode 0x7a */
{
int tmp = (int)((INT8)FETCH);
- if (PF) {
+ if (PF) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1541,7 +1541,7 @@ static void PREFIX86(_jp)(i8086_state *cpustate) /* Opcode 0x7a */
static void PREFIX86(_jnp)(i8086_state *cpustate) /* Opcode 0x7b */
{
int tmp = (int)((INT8)FETCH);
- if (!PF) {
+ if (!PF) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1552,7 +1552,7 @@ static void PREFIX86(_jnp)(i8086_state *cpustate) /* Opcode 0x7b */
static void PREFIX86(_jl)(i8086_state *cpustate) /* Opcode 0x7c */
{
int tmp = (int)((INT8)FETCH);
- if ((SF!=OF)&&!ZF) {
+ if ((SF!=OF)&&!ZF) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1563,7 +1563,7 @@ static void PREFIX86(_jl)(i8086_state *cpustate) /* Opcode 0x7c */
static void PREFIX86(_jnl)(i8086_state *cpustate) /* Opcode 0x7d */
{
int tmp = (int)((INT8)FETCH);
- if (ZF||(SF==OF)) {
+ if (ZF||(SF==OF)) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1574,7 +1574,7 @@ static void PREFIX86(_jnl)(i8086_state *cpustate) /* Opcode 0x7d */
static void PREFIX86(_jle)(i8086_state *cpustate) /* Opcode 0x7e */
{
int tmp = (int)((INT8)FETCH);
- if (ZF||(SF!=OF)) {
+ if (ZF||(SF!=OF)) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1585,7 +1585,7 @@ static void PREFIX86(_jle)(i8086_state *cpustate) /* Opcode 0x7e */
static void PREFIX86(_jnle)(i8086_state *cpustate) /* Opcode 0x7f */
{
int tmp = (int)((INT8)FETCH);
- if ((SF==OF)&&!ZF) {
+ if ((SF==OF)&&!ZF) {
cpustate->pc += tmp;
ICOUNT -= timing.jcc_t;
/* ASG - can probably assume this is safe
@@ -1597,53 +1597,53 @@ static void PREFIX86(_80pre)(i8086_state *cpustate) /* Opcode 0x80 */
{
unsigned ModRM = FETCHOP;
unsigned dst = GetRMByte(ModRM);
- unsigned src = FETCH;
+ unsigned src = FETCH;
int tmpcf;
- switch (ModRM & 0x38)
+ switch (ModRM & 0x38)
{
- case 0x00: /* ADD eb,d8 */
- ADDB(dst,src);
- PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ case 0x00: /* ADD eb,d8 */
+ ADDB(dst,src);
+ PutbackRMByte(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x08: /* OR eb,d8 */
- ORB(dst,src);
+ case 0x08: /* OR eb,d8 */
+ ORB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x10: /* ADC eb,d8 */
- src+=CF;
- ADCB(dst,src,tmpcf);
+ case 0x10: /* ADC eb,d8 */
+ src+=CF;
+ ADCB(dst,src,tmpcf);
PutbackRMByte(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x18: /* SBB eb,b8 */
+ case 0x18: /* SBB eb,b8 */
src+=CF;
SBBB(dst,src,tmpcf);
- PutbackRMByte(ModRM,dst);
+ PutbackRMByte(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x20: /* AND eb,d8 */
- ANDB(dst,src);
+ case 0x20: /* AND eb,d8 */
+ ANDB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x28: /* SUB eb,d8 */
- SUBB(dst,src);
- PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ case 0x28: /* SUB eb,d8 */
+ SUBB(dst,src);
+ PutbackRMByte(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x30: /* XOR eb,d8 */
- XORB(dst,src);
+ case 0x30: /* XOR eb,d8 */
+ XORB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x38: /* CMP eb,d8 */
- SUBB(dst,src);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro;
+ case 0x38: /* CMP eb,d8 */
+ SUBB(dst,src);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro;
break;
}
}
@@ -1653,59 +1653,59 @@ static void PREFIX86(_81pre)(i8086_state *cpustate) /* Opcode 0x81 */
{
unsigned ModRM = FETCH;
unsigned dst = GetRMWord(ModRM);
- unsigned src = FETCH;
+ unsigned src = FETCH;
int tmpcf;
- src+= (FETCH << 8);
+ src+= (FETCH << 8);
switch (ModRM & 0x38)
- {
- case 0x00: /* ADD ew,d16 */
+ {
+ case 0x00: /* ADD ew,d16 */
ADDW(dst,src);
PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
break;
- case 0x08: /* OR ew,d16 */
- ORW(dst,src);
- PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
+ case 0x08: /* OR ew,d16 */
+ ORW(dst,src);
+ PutbackRMWord(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
break;
- case 0x10: /* ADC ew,d16 */
+ case 0x10: /* ADC ew,d16 */
src+=CF;
ADCW(dst,src,tmpcf);
- PutbackRMWord(ModRM,dst);
+ PutbackRMWord(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
break;
- case 0x18: /* SBB ew,d16 */
- src+=CF;
+ case 0x18: /* SBB ew,d16 */
+ src+=CF;
SBBW(dst,src,tmpcf);
- PutbackRMWord(ModRM,dst);
+ PutbackRMWord(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
break;
- case 0x20: /* AND ew,d16 */
- ANDW(dst,src);
+ case 0x20: /* AND ew,d16 */
+ ANDW(dst,src);
PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
break;
- case 0x28: /* SUB ew,d16 */
- SUBW(dst,src);
- PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
+ case 0x28: /* SUB ew,d16 */
+ SUBW(dst,src);
+ PutbackRMWord(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
break;
- case 0x30: /* XOR ew,d16 */
+ case 0x30: /* XOR ew,d16 */
XORW(dst,src);
- PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
+ PutbackRMWord(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16;
break;
- case 0x38: /* CMP ew,d16 */
- SUBW(dst,src);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16_ro;
+ case 0x38: /* CMP ew,d16 */
+ SUBW(dst,src);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16_ro;
break;
- }
+ }
}
-static void PREFIX86(_82pre)(i8086_state *cpustate) /* Opcode 0x82 */
+static void PREFIX86(_82pre)(i8086_state *cpustate) /* Opcode 0x82 */
{
unsigned ModRM = FETCH;
unsigned dst = GetRMByte(ModRM);
@@ -1714,48 +1714,48 @@ static void PREFIX86(_82pre)(i8086_state *cpustate) /* Opcode 0x82 */
switch (ModRM & 0x38)
{
- case 0x00: /* ADD eb,d8 */
+ case 0x00: /* ADD eb,d8 */
ADDB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x08: /* OR eb,d8 */
+ case 0x08: /* OR eb,d8 */
ORB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x10: /* ADC eb,d8 */
+ case 0x10: /* ADC eb,d8 */
src+=CF;
ADCB(dst,src,tmpcf);
PutbackRMByte(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x18: /* SBB eb,d8 */
- src+=CF;
+ case 0x18: /* SBB eb,d8 */
+ src+=CF;
SBBB(dst,src,tmpcf);
PutbackRMByte(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x20: /* AND eb,d8 */
+ case 0x20: /* AND eb,d8 */
ANDB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x28: /* SUB eb,d8 */
+ case 0x28: /* SUB eb,d8 */
SUBB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x30: /* XOR eb,d8 */
+ case 0x30: /* XOR eb,d8 */
XORB(dst,src);
PutbackRMByte(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8;
break;
- case 0x38: /* CMP eb,d8 */
+ case 0x38: /* CMP eb,d8 */
SUBB(dst,src);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro;
break;
}
}
@@ -1763,110 +1763,110 @@ static void PREFIX86(_82pre)(i8086_state *cpustate) /* Opcode 0x82 */
static void PREFIX86(_83pre)(i8086_state *cpustate) /* Opcode 0x83 */
{
unsigned ModRM = FETCH;
- unsigned dst = GetRMWord(ModRM);
- unsigned src = (WORD)((INT16)((INT8)FETCH));
+ unsigned dst = GetRMWord(ModRM);
+ unsigned src = (WORD)((INT16)((INT8)FETCH));
int tmpcf;
switch (ModRM & 0x38)
- {
- case 0x00: /* ADD ew,d16 */
- ADDW(dst,src);
- PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
+ {
+ case 0x00: /* ADD ew,d16 */
+ ADDW(dst,src);
+ PutbackRMWord(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
break;
- case 0x08: /* OR ew,d16 */
+ case 0x08: /* OR ew,d16 */
ORW(dst,src);
- PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
+ PutbackRMWord(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
break;
- case 0x10: /* ADC ew,d16 */
- src+=CF;
+ case 0x10: /* ADC ew,d16 */
+ src+=CF;
ADCW(dst,src,tmpcf);
- PutbackRMWord(ModRM,dst);
+ PutbackRMWord(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
break;
- case 0x18: /* SBB ew,d16 */
+ case 0x18: /* SBB ew,d16 */
src+=CF;
- SBBW(dst,src,tmpcf);
- PutbackRMWord(ModRM,dst);
+ SBBW(dst,src,tmpcf);
+ PutbackRMWord(ModRM,dst);
cpustate->CarryVal = tmpcf;
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
break;
- case 0x20: /* AND ew,d16 */
- ANDW(dst,src);
- PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
+ case 0x20: /* AND ew,d16 */
+ ANDW(dst,src);
+ PutbackRMWord(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
break;
- case 0x28: /* SUB ew,d16 */
+ case 0x28: /* SUB ew,d16 */
SUBW(dst,src);
PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
break;
- case 0x30: /* XOR ew,d16 */
+ case 0x30: /* XOR ew,d16 */
XORW(dst,src);
- PutbackRMWord(ModRM,dst);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
+ PutbackRMWord(ModRM,dst);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8;
break;
- case 0x38: /* CMP ew,d16 */
- SUBW(dst,src);
- ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8_ro;
+ case 0x38: /* CMP ew,d16 */
+ SUBW(dst,src);
+ ICOUNT -= (ModRM >= 0xc0) ? timing.alu_r16i8 : timing.alu_m16i8_ro;
break;
- }
+ }
}
static void PREFIX86(_test_br8)(i8086_state *cpustate) /* Opcode 0x84 */
{
- DEF_br8(dst,src);
+ DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr8 : timing.alu_rm8;
- ANDB(dst,src);
+ ANDB(dst,src);
}
static void PREFIX86(_test_wr16)(i8086_state *cpustate) /* Opcode 0x85 */
{
- DEF_wr16(dst,src);
+ DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_rr16 : timing.alu_rm16;
ANDW(dst,src);
}
static void PREFIX86(_xchg_br8)(i8086_state *cpustate) /* Opcode 0x86 */
{
- DEF_br8(dst,src);
+ DEF_br8(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.xchg_rr8 : timing.xchg_rm8;
- PutbackRMByte(ModRM,src);
- RegByte(ModRM)=dst;
+ PutbackRMByte(ModRM,src);
+ RegByte(ModRM)=dst;
}
static void PREFIX86(_xchg_wr16)(i8086_state *cpustate) /* Opcode 0x87 */
{
- DEF_wr16(dst,src);
+ DEF_wr16(dst,src);
ICOUNT -= (ModRM >= 0xc0) ? timing.xchg_rr16 : timing.xchg_rm16;
- PutbackRMWord(ModRM,src);
- RegWord(ModRM)=dst;
+ PutbackRMWord(ModRM,src);
+ RegWord(ModRM)=dst;
}
static void PREFIX86(_mov_br8)(i8086_state *cpustate) /* Opcode 0x88 */
{
unsigned ModRM = FETCH;
- BYTE src = RegByte(ModRM);
+ BYTE src = RegByte(ModRM);
ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_mr8;
- PutRMByte(ModRM,src);
+ PutRMByte(ModRM,src);
}
static void PREFIX86(_mov_wr16)(i8086_state *cpustate) /* Opcode 0x89 */
{
unsigned ModRM = FETCH;
- WORD src = RegWord(ModRM);
+ WORD src = RegWord(ModRM);
ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rr16 : timing.mov_mr16;
- PutRMWord(ModRM,src);
+ PutRMWord(ModRM,src);
}
static void PREFIX86(_mov_r8b)(i8086_state *cpustate) /* Opcode 0x8a */
{
unsigned ModRM = FETCH;
- BYTE src = GetRMByte(ModRM);
+ BYTE src = GetRMByte(ModRM);
ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rr8 : timing.mov_rm8;
- RegByte(ModRM)=src;
+ RegByte(ModRM)=src;
}
static void PREFIX86(_mov_r16w)(i8086_state *cpustate) /* Opcode 0x8b */
@@ -1881,7 +1881,7 @@ static void PREFIX86(_mov_wsreg)(i8086_state *cpustate) /* Opcode 0x8c */
{
unsigned ModRM = FETCH;
ICOUNT -= (ModRM >= 0xc0) ? timing.mov_rs : timing.mov_ms;
- if (ModRM & 0x20) { /* HJB 12/13/98 1xx is invalid */
+ if (ModRM & 0x20) { /* HJB 12/13/98 1xx is invalid */
cpustate->pc = cpustate->prevpc;
return PREFIX86(_invalid)(cpustate);
}
@@ -1894,13 +1894,13 @@ static void PREFIX86(_lea)(i8086_state *cpustate) /* Opcode 0x8d */
unsigned ModRM = FETCH;
ICOUNT -= timing.lea;
(void)(*GetEA[ModRM])(cpustate);
- RegWord(ModRM)=cpustate->eo; /* HJB 12/13/98 effective offset (no segment part) */
+ RegWord(ModRM)=cpustate->eo; /* HJB 12/13/98 effective offset (no segment part) */
}
static void PREFIX86(_popw)(i8086_state *cpustate) /* Opcode 0x8f */
{
unsigned ModRM = FETCH;
- WORD tmp;
+ WORD tmp;
tmp = ReadWord(cpustate->base[SS] + cpustate->regs.w[SP]);
ICOUNT -= (ModRM >= 0xc0) ? timing.pop_r16 : timing.pop_m16;
PutRMWord(ModRM,tmp);
@@ -1908,19 +1908,19 @@ static void PREFIX86(_popw)(i8086_state *cpustate) /* Opcode 0x8f */
}
-#define XchgAXReg(Reg) \
-{ \
- WORD tmp; \
- tmp = cpustate->regs.w[Reg]; \
- cpustate->regs.w[Reg] = cpustate->regs.w[AX]; \
- cpustate->regs.w[AX] = tmp; \
- ICOUNT -= timing.xchg_ar16; \
+#define XchgAXReg(Reg) \
+{ \
+ WORD tmp; \
+ tmp = cpustate->regs.w[Reg]; \
+ cpustate->regs.w[Reg] = cpustate->regs.w[AX]; \
+ cpustate->regs.w[AX] = tmp; \
+ ICOUNT -= timing.xchg_ar16; \
}
static void PREFIX86(_nop)(i8086_state *cpustate) /* Opcode 0x90 */
{
- /* this is XchgAXReg(AX); */
+ /* this is XchgAXReg(AX); */
ICOUNT -= timing.nop;
}
@@ -1931,7 +1931,7 @@ static void PREFIX86(_xchg_axcx)(i8086_state *cpustate) /* Opcode 0x91 */
static void PREFIX86(_xchg_axdx)(i8086_state *cpustate) /* Opcode 0x92 */
{
- XchgAXReg(DX);
+ XchgAXReg(DX);
}
static void PREFIX86(_xchg_axbx)(i8086_state *cpustate) /* Opcode 0x93 */
@@ -1946,7 +1946,7 @@ static void PREFIX86(_xchg_axsp)(i8086_state *cpustate) /* Opcode 0x94 */
static void PREFIX86(_xchg_axbp)(i8086_state *cpustate) /* Opcode 0x95 */
{
- XchgAXReg(BP);
+ XchgAXReg(BP);
}
static void PREFIX86(_xchg_axsi)(i8086_state *cpustate) /* Opcode 0x96 */
@@ -2019,9 +2019,9 @@ static void PREFIX86(_pushf)(i8086_state *cpustate) /* Opcode 0x9c */
tmp = CompressFlags();
#ifdef I80286
- if(!PM) ( tmp &= ~0xf000 );
+ if(!PM) ( tmp &= ~0xf000 );
#endif
- PUSH( tmp );
+ PUSH( tmp );
}
#ifndef I80286
@@ -2047,7 +2047,7 @@ static void PREFIX86(_sahf)(i8086_state *cpustate) /* Opcode 0x9e */
{
unsigned tmp = (CompressFlags() & 0xff00) | (cpustate->regs.b[AH] & 0xd5);
ICOUNT -= timing.sahf;
- ExpandFlags(tmp);
+ ExpandFlags(tmp);
}
static void PREFIX86(_lahf)(i8086_state *cpustate) /* Opcode 0x9f */
@@ -2081,7 +2081,7 @@ static void PREFIX86(_mov_axdisp)(i8086_state *cpustate) /* Opcode 0xa1 */
static void PREFIX86(_mov_dispal)(i8086_state *cpustate) /* Opcode 0xa2 */
{
- unsigned addr;
+ unsigned addr;
addr = FETCH;
addr += FETCH << 8;
@@ -2123,7 +2123,7 @@ static void PREFIX86(_cmpsb)(i8086_state *cpustate) /* Opcode 0xa6 */
{
unsigned dst = GetMemB(ES, cpustate->regs.w[DI]);
unsigned src = GetMemB(DS, cpustate->regs.w[SI]);
- SUBB(src,dst); /* opposite of the usual convention */
+ SUBB(src,dst); /* opposite of the usual convention */
cpustate->regs.w[DI] += cpustate->DirVal;
cpustate->regs.w[SI] += cpustate->DirVal;
ICOUNT -= timing.cmps8;
@@ -2141,16 +2141,16 @@ static void PREFIX86(_cmpsw)(i8086_state *cpustate) /* Opcode 0xa7 */
static void PREFIX86(_test_ald8)(i8086_state *cpustate) /* Opcode 0xa8 */
{
- DEF_ald8(dst,src);
+ DEF_ald8(dst,src);
ICOUNT -= timing.alu_ri8;
- ANDB(dst,src);
+ ANDB(dst,src);
}
static void PREFIX86(_test_axd16)(i8086_state *cpustate) /* Opcode 0xa9 */
{
- DEF_axd16(dst,src);
+ DEF_axd16(dst,src);
ICOUNT -= timing.alu_ri16;
- ANDW(dst,src);
+ ANDW(dst,src);
}
static void PREFIX86(_stosb)(i8086_state *cpustate) /* Opcode 0xaa */
@@ -2185,7 +2185,7 @@ static void PREFIX86(_scasb)(i8086_state *cpustate) /* Opcode 0xae */
{
unsigned src = GetMemB(ES, cpustate->regs.w[DI]);
unsigned dst = cpustate->regs.b[AL];
- SUBB(dst,src);
+ SUBB(dst,src);
cpustate->regs.w[DI] += cpustate->DirVal;
ICOUNT -= timing.scas8;
}
@@ -2194,7 +2194,7 @@ static void PREFIX86(_scasw)(i8086_state *cpustate) /* Opcode 0xaf */
{
unsigned src = GetMemW(ES, cpustate->regs.w[DI]);
unsigned dst = cpustate->regs.w[AX];
- SUBW(dst,src);
+ SUBW(dst,src);
cpustate->regs.w[DI] += 2 * cpustate->DirVal;
ICOUNT -= timing.scas16;
}
@@ -2325,7 +2325,7 @@ static void PREFIX86(_ret)(i8086_state *cpustate) /* Opcode 0xc3 */
static void PREFIX86(_les_dw)(i8086_state *cpustate) /* Opcode 0xc4 */
{
unsigned ModRM = FETCH;
- WORD tmp = GetRMWord(ModRM);
+ WORD tmp = GetRMWord(ModRM);
#ifdef I80286
i80286_data_descriptor(cpustate,ES,GetnextRMWord);
@@ -2340,7 +2340,7 @@ static void PREFIX86(_les_dw)(i8086_state *cpustate) /* Opcode 0xc4 */
static void PREFIX86(_lds_dw)(i8086_state *cpustate) /* Opcode 0xc5 */
{
unsigned ModRM = FETCH;
- WORD tmp = GetRMWord(ModRM);
+ WORD tmp = GetRMWord(ModRM);
#ifdef I80286
i80286_data_descriptor(cpustate,DS,GetnextRMWord);
@@ -2421,7 +2421,7 @@ static void PREFIX86(_iret)(i8086_state *cpustate) /* Opcode 0xcf */
POP(cpustate->sregs[CS]);
cpustate->base[CS] = SegBase(CS);
cpustate->pc = (cpustate->pc + cpustate->base[CS]) & AMASK;
- PREFIX(_popf)(cpustate);
+ PREFIX(_popf)(cpustate);
CHANGE_PC(cpustate->pc);
/* if the IF is set, and an interrupt is pending, signal an interrupt */
@@ -2505,7 +2505,7 @@ static void PREFIX86(_escape)(i8086_state *cpustate) /* Opcodes 0xd8, 0xd9, 0
{
unsigned ModRM = FETCH;
ICOUNT -= timing.nop;
- GetRMByte(ModRM);
+ GetRMByte(ModRM);
}
#endif
@@ -2516,7 +2516,7 @@ static void PREFIX86(_loopne)(i8086_state *cpustate) /* Opcode 0xe0 */
cpustate->regs.w[CX]=tmp;
- if (!ZF && tmp) {
+ if (!ZF && tmp) {
ICOUNT -= timing.loop_t;
cpustate->pc += disp;
/* ASG - can probably assume this is safe
@@ -2533,7 +2533,7 @@ static void PREFIX86(_loope)(i8086_state *cpustate) /* Opcode 0xe1 */
if (ZF && tmp) {
ICOUNT -= timing.loope_t;
- cpustate->pc += disp;
+ cpustate->pc += disp;
/* ASG - can probably assume this is safe
CHANGE_PC(cpustate->pc);*/
} else ICOUNT -= timing.loope_nt;
@@ -2546,7 +2546,7 @@ static void PREFIX86(_loop)(i8086_state *cpustate) /* Opcode 0xe2 */
cpustate->regs.w[CX]=tmp;
- if (tmp) {
+ if (tmp) {
ICOUNT -= timing.loop_t;
cpustate->pc += disp;
/* ASG - can probably assume this is safe
@@ -2740,7 +2740,7 @@ static void PREFIX(_es)(i8086_state *cpustate) /* Opcode 0x26 */
static void PREFIX(_cs)(i8086_state *cpustate) /* Opcode 0x2e */
{
- cpustate->seg_prefix = TRUE;
+ cpustate->seg_prefix = TRUE;
cpustate->prefix_seg = CS;
ICOUNT -= timing.override;
PREFIX(_instruction)[FETCHOP](cpustate);
@@ -2765,45 +2765,45 @@ static void PREFIX(_ds)(i8086_state *cpustate) /* Opcode 0x3e */
static void PREFIX(_mov_sregw)(i8086_state *cpustate) /* Opcode 0x8e */
{
unsigned ModRM = FETCH;
- WORD src = GetRMWord(ModRM);
+ WORD src = GetRMWord(ModRM);
ICOUNT -= (ModRM >= 0xc0) ? timing.mov_sr : timing.mov_sm;
#ifdef I80286
- switch (ModRM & 0x38)
- {
- case 0x00: /* mov es,ew */
+ switch (ModRM & 0x38)
+ {
+ case 0x00: /* mov es,ew */
i80286_data_descriptor(cpustate,ES,src);
break;
- case 0x18: /* mov ds,ew */
+ case 0x18: /* mov ds,ew */
i80286_data_descriptor(cpustate,DS,src);
break;
- case 0x10: /* mov ss,ew */
+ case 0x10: /* mov ss,ew */
i80286_data_descriptor(cpustate,SS,src);
cpustate->seg_prefix = FALSE;
PREFIX(_instruction)[FETCHOP](cpustate);
break;
- case 0x08: /* mov cs,ew */
+ case 0x08: /* mov cs,ew */
PREFIX(_invalid)(cpustate);
break; /* doesn't do a jump far */
- }
+ }
#else
- switch (ModRM & 0x38)
- {
- case 0x00: /* mov es,ew */
+ switch (ModRM & 0x38)
+ {
+ case 0x00: /* mov es,ew */
cpustate->sregs[ES] = src;
cpustate->base[ES] = SegBase(ES);
break;
- case 0x18: /* mov ds,ew */
+ case 0x18: /* mov ds,ew */
cpustate->sregs[DS] = src;
cpustate->base[DS] = SegBase(DS);
break;
- case 0x10: /* mov ss,ew */
+ case 0x10: /* mov ss,ew */
cpustate->sregs[SS] = src;
cpustate->base[SS] = SegBase(SS); /* no interrupt allowed before next instr */
cpustate->seg_prefix = FALSE;
PREFIX(_instruction)[FETCHOP](cpustate);
break;
- case 0x08: /* mov cs,ew */
+ case 0x08: /* mov cs,ew */
#ifndef I80186
int ip = cpustate->pc - cpustate->base[CS];
cpustate->sregs[CS] = src;
@@ -2812,13 +2812,13 @@ static void PREFIX(_mov_sregw)(i8086_state *cpustate) /* Opcode 0x8e */
CHANGE_PC(cpustate->pc);
#endif
break;
- }
+ }
#endif
}
static void PREFIX(_repne)(i8086_state *cpustate) /* Opcode 0xf2 */
{
- PREFIX(rep)(cpustate, 0);
+ PREFIX(rep)(cpustate, 0);
}
static void PREFIX(_repe)(i8086_state *cpustate) /* Opcode 0xf3 */
@@ -2864,14 +2864,14 @@ static void PREFIX86(_f6pre)(i8086_state *cpustate)
{
/* Opcode 0xf6 */
unsigned ModRM = FETCH;
- unsigned tmp = (unsigned)GetRMByte(ModRM);
- unsigned tmp2;
+ unsigned tmp = (unsigned)GetRMByte(ModRM);
+ unsigned tmp2;
- switch (ModRM & 0x38)
- {
- case 0x00: /* TEST Eb, data8 */
- case 0x08: /* ??? */
+ switch (ModRM & 0x38)
+ {
+ case 0x00: /* TEST Eb, data8 */
+ case 0x08: /* ??? */
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri8 : timing.alu_mi8_ro;
tmp &= FETCH;
@@ -2879,18 +2879,18 @@ static void PREFIX86(_f6pre)(i8086_state *cpustate)
SetSZPF_Byte(tmp);
break;
- case 0x10: /* NOT Eb */
+ case 0x10: /* NOT Eb */
ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r8 : timing.negnot_m8;
PutbackRMByte(ModRM,~tmp);
break;
- case 0x18: /* NEG Eb */
+ case 0x18: /* NEG Eb */
ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r8 : timing.negnot_m8;
- tmp2=0;
- SUBB(tmp2,tmp);
- PutbackRMByte(ModRM,tmp2);
+ tmp2=0;
+ SUBB(tmp2,tmp);
+ PutbackRMByte(ModRM,tmp2);
break;
- case 0x20: /* MUL AL, Eb */
+ case 0x20: /* MUL AL, Eb */
ICOUNT -= (ModRM >= 0xc0) ? timing.mul_r8 : timing.mul_m8;
{
UINT16 result;
@@ -2906,7 +2906,7 @@ static void PREFIX86(_f6pre)(i8086_state *cpustate)
cpustate->CarryVal = cpustate->OverVal = (cpustate->regs.b[AH] != 0);
}
break;
- case 0x28: /* IMUL AL, Eb */
+ case 0x28: /* IMUL AL, Eb */
ICOUNT -= (ModRM >= 0xc0) ? timing.imul_r8 : timing.imul_m8;
{
INT16 result;
@@ -2924,7 +2924,7 @@ static void PREFIX86(_f6pre)(i8086_state *cpustate)
cpustate->CarryVal = cpustate->OverVal = (result >> 7 != 0) && (result >> 7 != -1);
}
break;
- case 0x30: /* DIV AL, Ew */
+ case 0x30: /* DIV AL, Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.div_r8 : timing.div_m8;
{
UINT16 result;
@@ -2951,7 +2951,7 @@ static void PREFIX86(_f6pre)(i8086_state *cpustate)
}
}
break;
- case 0x38: /* IDIV AL, Ew */
+ case 0x38: /* IDIV AL, Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.idiv_r8 : timing.idiv_m8;
{
@@ -2981,7 +2981,7 @@ static void PREFIX86(_f6pre)(i8086_state *cpustate)
}
}
break;
- }
+ }
}
@@ -2989,14 +2989,14 @@ static void PREFIX86(_f7pre)(i8086_state *cpustate)
{
/* Opcode 0xf7 */
unsigned ModRM = FETCH;
- unsigned tmp = GetRMWord(ModRM);
- unsigned tmp2;
+ unsigned tmp = GetRMWord(ModRM);
+ unsigned tmp2;
- switch (ModRM & 0x38)
- {
- case 0x00: /* TEST Ew, data16 */
- case 0x08: /* ??? */
+ switch (ModRM & 0x38)
+ {
+ case 0x00: /* TEST Ew, data16 */
+ case 0x08: /* ??? */
ICOUNT -= (ModRM >= 0xc0) ? timing.alu_ri16 : timing.alu_mi16_ro;
tmp2 = FETCH;
tmp2 += FETCH << 8;
@@ -3007,19 +3007,19 @@ static void PREFIX86(_f7pre)(i8086_state *cpustate)
SetSZPF_Word(tmp);
break;
- case 0x10: /* NOT Ew */
+ case 0x10: /* NOT Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r16 : timing.negnot_m16;
tmp = ~tmp;
PutbackRMWord(ModRM,tmp);
break;
- case 0x18: /* NEG Ew */
+ case 0x18: /* NEG Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.negnot_r16 : timing.negnot_m16;
- tmp2 = 0;
- SUBW(tmp2,tmp);
- PutbackRMWord(ModRM,tmp2);
+ tmp2 = 0;
+ SUBW(tmp2,tmp);
+ PutbackRMWord(ModRM,tmp2);
break;
- case 0x20: /* MUL AX, Ew */
+ case 0x20: /* MUL AX, Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.mul_r16 : timing.mul_m16;
{
UINT32 result;
@@ -3030,7 +3030,7 @@ static void PREFIX86(_f7pre)(i8086_state *cpustate)
result = (UINT32)tmp2*tmp;
cpustate->regs.w[AX]=(WORD)result;
- result >>= 16;
+ result >>= 16;
cpustate->regs.w[DX]=result;
SetZF(cpustate->regs.w[AX] | cpustate->regs.w[DX]);
@@ -3038,7 +3038,7 @@ static void PREFIX86(_f7pre)(i8086_state *cpustate)
}
break;
- case 0x28: /* IMUL AX, Ew */
+ case 0x28: /* IMUL AX, Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.imul_r16 : timing.imul_m16;
{
INT32 result;
@@ -3058,7 +3058,7 @@ static void PREFIX86(_f7pre)(i8086_state *cpustate)
SetZF(cpustate->regs.w[AX] | cpustate->regs.w[DX]);
}
break;
- case 0x30: /* DIV AX, Ew */
+ case 0x30: /* DIV AX, Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.div_r16 : timing.div_m16;
{
UINT32 result;
@@ -3087,7 +3087,7 @@ static void PREFIX86(_f7pre)(i8086_state *cpustate)
}
}
break;
- case 0x38: /* IDIV AX, Ew */
+ case 0x38: /* IDIV AX, Ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.idiv_r16 : timing.idiv_m16;
{
INT32 result;
@@ -3115,7 +3115,7 @@ static void PREFIX86(_f7pre)(i8086_state *cpustate)
}
}
break;
- }
+ }
}
@@ -3156,37 +3156,37 @@ static void PREFIX86(_fepre)(i8086_state *cpustate) /* Opcode 0xfe */
{
unsigned ModRM = FETCH;
unsigned tmp = GetRMByte(ModRM);
- unsigned tmp1;
+ unsigned tmp1;
ICOUNT -= (ModRM >= 0xc0) ? timing.incdec_r8 : timing.incdec_m8;
- if ((ModRM & 0x38) == 0) /* INC eb */
+ if ((ModRM & 0x38) == 0) /* INC eb */
{
tmp1 = tmp+1;
SetOFB_Add(tmp1,tmp,1);
- }
+ }
else /* DEC eb */
- {
+ {
tmp1 = tmp-1;
SetOFB_Sub(tmp1,1,tmp);
- }
+ }
- SetAF(tmp1,tmp,1);
- SetSZPF_Byte(tmp1);
+ SetAF(tmp1,tmp,1);
+ SetSZPF_Byte(tmp1);
- PutbackRMByte(ModRM,(BYTE)tmp1);
+ PutbackRMByte(ModRM,(BYTE)tmp1);
}
static void PREFIX86(_ffpre)(i8086_state *cpustate) /* Opcode 0xff */
{
unsigned ModRM = FETCHOP;
- unsigned tmp;
- unsigned tmp1;
- WORD ip;
+ unsigned tmp;
+ unsigned tmp1;
+ WORD ip;
- switch(ModRM & 0x38)
- {
- case 0x00: /* INC ew */
+ switch(ModRM & 0x38)
+ {
+ case 0x00: /* INC ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.incdec_r16 : timing.incdec_m16;
tmp = GetRMWord(ModRM);
tmp1 = tmp+1;
@@ -3198,7 +3198,7 @@ static void PREFIX86(_ffpre)(i8086_state *cpustate) /* Opcode 0xff */
PutbackRMWord(ModRM,(WORD)tmp1);
break;
- case 0x08: /* DEC ew */
+ case 0x08: /* DEC ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.incdec_r16 : timing.incdec_m16;
tmp = GetRMWord(ModRM);
tmp1 = tmp-1;
@@ -3210,7 +3210,7 @@ static void PREFIX86(_ffpre)(i8086_state *cpustate) /* Opcode 0xff */
PutbackRMWord(ModRM,(WORD)tmp1);
break;
- case 0x10: /* CALL ew */
+ case 0x10: /* CALL ew */
ICOUNT -= (ModRM >= 0xc0) ? timing.call_r16 : timing.call_m16;
tmp = GetRMWord(ModRM);
ip = cpustate->pc - cpustate->base[CS];
@@ -3221,7 +3221,7 @@ static void PREFIX86(_ffpre)(i8086_state *cpustate) /* Opcode 0xff */
case 0x18: /* CALL FAR ea */
ICOUNT -= timing.call_m32;
- tmp = cpustate->sregs[CS]; /* HJB 12/13/98 need to skip displacements of cpustate->ea */
+ tmp = cpustate->sregs[CS]; /* HJB 12/13/98 need to skip displacements of cpustate->ea */
tmp1 = GetRMWord(ModRM);
ip = cpustate->pc - cpustate->base[CS];
#ifdef I80286
@@ -3236,14 +3236,14 @@ static void PREFIX86(_ffpre)(i8086_state *cpustate) /* Opcode 0xff */
CHANGE_PC(cpustate->pc);
break;
- case 0x20: /* JMP ea */
+ case 0x20: /* JMP ea */
ICOUNT -= (ModRM >= 0xc0) ? timing.jmp_r16 : timing.jmp_m16;
ip = GetRMWord(ModRM);
cpustate->pc = (cpustate->base[CS] + ip) & AMASK;
CHANGE_PC(cpustate->pc);
break;
- case 0x28: /* JMP FAR ea */
+ case 0x28: /* JMP FAR ea */
ICOUNT -= timing.jmp_m32;
#ifdef I80286
@@ -3258,7 +3258,7 @@ static void PREFIX86(_ffpre)(i8086_state *cpustate) /* Opcode 0xff */
CHANGE_PC(cpustate->pc);
break;
- case 0x30: /* PUSH ea */
+ case 0x30: /* PUSH ea */
ICOUNT -= (ModRM >= 0xc0) ? timing.push_r16 : timing.push_m16;
tmp = GetRMWord(ModRM);
PUSH(tmp);
@@ -3292,4 +3292,3 @@ static void PREFIX86(_invalid_2b)(i8086_state *cpustate)
}
#endif
#endif
-
diff --git a/src/emu/cpu/i86/modrm.h b/src/emu/cpu/i86/modrm.h
index 5919ebf230a..d7e92ae2150 100644
--- a/src/emu/cpu/i86/modrm.h
+++ b/src/emu/cpu/i86/modrm.h
@@ -21,7 +21,7 @@ static struct
#define PutbackRMWord(ModRM,val) \
{ \
if (ModRM >= 0xc0) cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \
- else WriteWord(cpustate->ea,val); \
+ else WriteWord(cpustate->ea,val); \
}
#define GetnextRMWord ReadWord(cpustate->ea+2)
@@ -32,14 +32,14 @@ static struct
#define GetRMByteOffset(offs) \
ReadByte(cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs))
-#define PutRMWord(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \
- else { \
- (*GetEA[ModRM])(cpustate); \
- WriteWord( cpustate->ea ,val); \
- } \
+#define PutRMWord(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \
+ else { \
+ (*GetEA[ModRM])(cpustate); \
+ WriteWord( cpustate->ea ,val); \
+ } \
}
#define PutRMWordOffset(offs, val) \
@@ -48,72 +48,72 @@ static struct
#define PutRMByteOffset(offs, val) \
WriteByte( cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs), val)
-#define PutImmRMWord(ModRM) \
-{ \
- WORD val; \
- if (ModRM >= 0xc0) \
+#define PutImmRMWord(ModRM) \
+{ \
+ WORD val; \
+ if (ModRM >= 0xc0) \
FETCHWORD(cpustate->regs.w[Mod_RM.RM.w[ModRM]]) \
- else { \
- (*GetEA[ModRM])(cpustate); \
- FETCHWORD(val) \
- WriteWord( cpustate->ea , val); \
- } \
+ else { \
+ (*GetEA[ModRM])(cpustate); \
+ FETCHWORD(val) \
+ WriteWord( cpustate->ea , val); \
+ } \
}
#define GetRMByte(ModRM) \
((ModRM) >= 0xc0 ? cpustate->regs.b[Mod_RM.RM.b[ModRM]] : ReadByte( (*GetEA[ModRM])(cpustate) ))
-#define PutRMByte(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
- else \
+#define PutRMByte(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
+ else \
WriteByte( (*GetEA[ModRM])(cpustate) ,val); \
}
-#define PutImmRMByte(ModRM) \
-{ \
- if (ModRM >= 0xc0) \
+#define PutImmRMByte(ModRM) \
+{ \
+ if (ModRM >= 0xc0) \
cpustate->regs.b[Mod_RM.RM.b[ModRM]]=FETCH; \
- else { \
- (*GetEA[ModRM])(cpustate); \
- WriteByte( cpustate->ea , FETCH ); \
- } \
+ else { \
+ (*GetEA[ModRM])(cpustate); \
+ WriteByte( cpustate->ea , FETCH ); \
+ } \
}
-#define PutbackRMByte(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
- else \
- WriteByte(cpustate->ea,val); \
+#define PutbackRMByte(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
+ else \
+ WriteByte(cpustate->ea,val); \
}
-#define DEF_br8(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned src = RegByte(ModRM); \
- unsigned dst = GetRMByte(ModRM)
+#define DEF_br8(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned src = RegByte(ModRM); \
+ unsigned dst = GetRMByte(ModRM)
-#define DEF_wr16(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned src = RegWord(ModRM); \
- unsigned dst = GetRMWord(ModRM)
+#define DEF_wr16(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned src = RegWord(ModRM); \
+ unsigned dst = GetRMWord(ModRM)
-#define DEF_r8b(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned dst = RegByte(ModRM); \
- unsigned src = GetRMByte(ModRM)
+#define DEF_r8b(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned dst = RegByte(ModRM); \
+ unsigned src = GetRMByte(ModRM)
-#define DEF_r16w(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned dst = RegWord(ModRM); \
- unsigned src = GetRMWord(ModRM)
+#define DEF_r16w(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned dst = RegWord(ModRM); \
+ unsigned src = GetRMWord(ModRM)
-#define DEF_ald8(dst,src) \
- unsigned src = FETCHOP; \
+#define DEF_ald8(dst,src) \
+ unsigned src = FETCHOP; \
unsigned dst = cpustate->regs.b[AL]
-#define DEF_axd16(dst,src) \
- unsigned src = FETCHOP; \
- unsigned dst = cpustate->regs.w[AX]; \
- src += (FETCH << 8)
+#define DEF_axd16(dst,src) \
+ unsigned src = FETCHOP; \
+ unsigned dst = cpustate->regs.w[AX]; \
+ src += (FETCH << 8)
diff --git a/src/emu/cpu/i86/modrm286.h b/src/emu/cpu/i86/modrm286.h
index 18c2495b7d8..6939e91bd03 100644
--- a/src/emu/cpu/i86/modrm286.h
+++ b/src/emu/cpu/i86/modrm286.h
@@ -18,128 +18,128 @@ static struct
#define GetRMWord(ModRM) \
((ModRM) >= 0xc0 ? cpustate->regs.w[Mod_RM.RM.w[ModRM]] : ( (*GetEA[ModRM])(cpustate), i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_WORD, I80286_READ), ReadWord( cpustate->ea ) ))
-#define PutbackRMWord(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \
- else \
- { \
- i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_WORD, I80286_WRITE); \
- WriteWord(cpustate->ea,val); \
- } \
+#define PutbackRMWord(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \
+ else \
+ { \
+ i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_WORD, I80286_WRITE); \
+ WriteWord(cpustate->ea,val); \
+ } \
}
-#define GetnextRMWord \
- ( \
- i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->ea + 2 - cpustate->base[cpustate->ea_seg], I80286_WORD, I80286_READ), \
- ReadWord(cpustate->ea+2) \
+#define GetnextRMWord \
+ ( \
+ i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->ea + 2 - cpustate->base[cpustate->ea_seg], I80286_WORD, I80286_READ), \
+ ReadWord(cpustate->ea+2) \
)
-#define GetRMWordOffset(offs) \
- ( \
- i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_WORD, I80286_READ), \
- ReadWord(cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs)) \
+#define GetRMWordOffset(offs) \
+ ( \
+ i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_WORD, I80286_READ), \
+ ReadWord(cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs)) \
)
-#define GetRMByteOffset(offs) \
- ( \
- i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_BYTE, I80286_READ), \
- ReadByte(cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs)) \
+#define GetRMByteOffset(offs) \
+ ( \
+ i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_BYTE, I80286_READ), \
+ ReadByte(cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs)) \
)
-#define PutRMWord(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \
- else { \
- (*GetEA[ModRM])(cpustate); \
- i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_WORD, I80286_WRITE); \
- WriteWord( cpustate->ea ,val); \
- } \
+#define PutRMWord(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ cpustate->regs.w[Mod_RM.RM.w[ModRM]]=val; \
+ else { \
+ (*GetEA[ModRM])(cpustate); \
+ i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_WORD, I80286_WRITE); \
+ WriteWord( cpustate->ea ,val); \
+ } \
}
-#define PutRMWordOffset(offs, val) \
- i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_WORD, I80286_WRITE); \
+#define PutRMWordOffset(offs, val) \
+ i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_WORD, I80286_WRITE); \
WriteWord( cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs), val)
-#define PutRMByteOffset(offs, val) \
- i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_BYTE, I80286_WRITE); \
+#define PutRMByteOffset(offs, val) \
+ i80286_check_permission(cpustate, cpustate->ea_seg, (UINT16)(cpustate->eo+offs), I80286_BYTE, I80286_WRITE); \
WriteByte( cpustate->ea-cpustate->eo+(UINT16)(cpustate->eo+offs), val)
-#define PutImmRMWord(ModRM) \
-{ \
- WORD val; \
- if (ModRM >= 0xc0) \
- FETCHWORD(cpustate->regs.w[Mod_RM.RM.w[ModRM]]) \
- else { \
- (*GetEA[ModRM])(cpustate); \
- i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_WORD, I80286_WRITE); \
- FETCHWORD(val) \
- WriteWord( cpustate->ea , val); \
- } \
+#define PutImmRMWord(ModRM) \
+{ \
+ WORD val; \
+ if (ModRM >= 0xc0) \
+ FETCHWORD(cpustate->regs.w[Mod_RM.RM.w[ModRM]]) \
+ else { \
+ (*GetEA[ModRM])(cpustate); \
+ i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_WORD, I80286_WRITE); \
+ FETCHWORD(val) \
+ WriteWord( cpustate->ea , val); \
+ } \
}
#define GetRMByte(ModRM) \
((ModRM) >= 0xc0 ? cpustate->regs.b[Mod_RM.RM.b[ModRM]] : ( (*GetEA[ModRM])(cpustate), i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_BYTE, I80286_READ), ReadByte( cpustate->ea )) )
-#define PutRMByte(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
- else \
- { \
- (*GetEA[ModRM])(cpustate); \
- i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_BYTE, I80286_WRITE); \
- WriteByte( cpustate->ea,val); \
- } \
+#define PutRMByte(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
+ else \
+ { \
+ (*GetEA[ModRM])(cpustate); \
+ i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_BYTE, I80286_WRITE); \
+ WriteByte( cpustate->ea,val); \
+ } \
}
-#define PutImmRMByte(ModRM) \
-{ \
- if (ModRM >= 0xc0) \
- cpustate->regs.b[Mod_RM.RM.b[ModRM]]=FETCH; \
- else { \
- (*GetEA[ModRM])(cpustate); \
- i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_BYTE, I80286_WRITE); \
- WriteByte( cpustate->ea , FETCH ); \
- } \
+#define PutImmRMByte(ModRM) \
+{ \
+ if (ModRM >= 0xc0) \
+ cpustate->regs.b[Mod_RM.RM.b[ModRM]]=FETCH; \
+ else { \
+ (*GetEA[ModRM])(cpustate); \
+ i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_BYTE, I80286_WRITE); \
+ WriteByte( cpustate->ea , FETCH ); \
+ } \
}
-#define PutbackRMByte(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
- else \
- { \
- i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_BYTE, I80286_WRITE); \
- WriteByte(cpustate->ea,val); \
- } \
+#define PutbackRMByte(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ cpustate->regs.b[Mod_RM.RM.b[ModRM]]=val; \
+ else \
+ { \
+ i80286_check_permission(cpustate, cpustate->ea_seg, cpustate->eo, I80286_BYTE, I80286_WRITE); \
+ WriteByte(cpustate->ea,val); \
+ } \
}
-#define DEF_br8(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned src = RegByte(ModRM); \
- unsigned dst = GetRMByte(ModRM)
+#define DEF_br8(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned src = RegByte(ModRM); \
+ unsigned dst = GetRMByte(ModRM)
-#define DEF_wr16(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned src = RegWord(ModRM); \
- unsigned dst = GetRMWord(ModRM)
+#define DEF_wr16(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned src = RegWord(ModRM); \
+ unsigned dst = GetRMWord(ModRM)
-#define DEF_r8b(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned dst = RegByte(ModRM); \
- unsigned src = GetRMByte(ModRM)
+#define DEF_r8b(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned dst = RegByte(ModRM); \
+ unsigned src = GetRMByte(ModRM)
-#define DEF_r16w(dst,src) \
- unsigned ModRM = FETCHOP; \
- unsigned dst = RegWord(ModRM); \
- unsigned src = GetRMWord(ModRM)
+#define DEF_r16w(dst,src) \
+ unsigned ModRM = FETCHOP; \
+ unsigned dst = RegWord(ModRM); \
+ unsigned src = GetRMWord(ModRM)
-#define DEF_ald8(dst,src) \
- unsigned src = FETCHOP; \
+#define DEF_ald8(dst,src) \
+ unsigned src = FETCHOP; \
unsigned dst = cpustate->regs.b[AL]
-#define DEF_axd16(dst,src) \
- unsigned src = FETCHOP; \
- unsigned dst = cpustate->regs.w[AX]; \
- src += (FETCH << 8)
+#define DEF_axd16(dst,src) \
+ unsigned src = FETCHOP; \
+ unsigned dst = cpustate->regs.w[AX]; \
+ src += (FETCH << 8)
diff --git a/src/emu/cpu/i86/table186.h b/src/emu/cpu/i86/table186.h
index e531d156380..231d7eeb82a 100644
--- a/src/emu/cpu/i86/table186.h
+++ b/src/emu/cpu/i86/table186.h
@@ -1,265 +1,265 @@
static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) =
{
- PREFIX86(_add_br8), /* 0x00 */
- PREFIX86(_add_wr16), /* 0x01 */
- PREFIX86(_add_r8b), /* 0x02 */
- PREFIX86(_add_r16w), /* 0x03 */
- PREFIX86(_add_ald8), /* 0x04 */
- PREFIX86(_add_axd16), /* 0x05 */
- PREFIX86(_push_es), /* 0x06 */
- PREFIX86(_pop_es), /* 0x07 */
- PREFIX86(_or_br8), /* 0x08 */
- PREFIX86(_or_wr16), /* 0x09 */
- PREFIX86(_or_r8b), /* 0x0a */
- PREFIX86(_or_r16w), /* 0x0b */
- PREFIX86(_or_ald8), /* 0x0c */
- PREFIX86(_or_axd16), /* 0x0d */
- PREFIX86(_push_cs), /* 0x0e */
- PREFIX86(_invalid),
- PREFIX86(_adc_br8), /* 0x10 */
- PREFIX86(_adc_wr16), /* 0x11 */
- PREFIX86(_adc_r8b), /* 0x12 */
- PREFIX86(_adc_r16w), /* 0x13 */
- PREFIX86(_adc_ald8), /* 0x14 */
- PREFIX86(_adc_axd16), /* 0x15 */
- PREFIX86(_push_ss), /* 0x16 */
- PREFIX186(_pop_ss), /* 0x17 */
- PREFIX86(_sbb_br8), /* 0x18 */
- PREFIX86(_sbb_wr16), /* 0x19 */
- PREFIX86(_sbb_r8b), /* 0x1a */
- PREFIX86(_sbb_r16w), /* 0x1b */
- PREFIX86(_sbb_ald8), /* 0x1c */
- PREFIX86(_sbb_axd16), /* 0x1d */
- PREFIX86(_push_ds), /* 0x1e */
- PREFIX86(_pop_ds), /* 0x1f */
- PREFIX86(_and_br8), /* 0x20 */
- PREFIX86(_and_wr16), /* 0x21 */
- PREFIX86(_and_r8b), /* 0x22 */
- PREFIX86(_and_r16w), /* 0x23 */
- PREFIX86(_and_ald8), /* 0x24 */
- PREFIX86(_and_axd16), /* 0x25 */
- PREFIX186(_es), /* 0x26 */
- PREFIX86(_daa), /* 0x27 */
- PREFIX86(_sub_br8), /* 0x28 */
- PREFIX86(_sub_wr16), /* 0x29 */
- PREFIX86(_sub_r8b), /* 0x2a */
- PREFIX86(_sub_r16w), /* 0x2b */
- PREFIX86(_sub_ald8), /* 0x2c */
- PREFIX86(_sub_axd16), /* 0x2d */
- PREFIX186(_cs), /* 0x2e */
- PREFIX86(_das), /* 0x2f */
- PREFIX86(_xor_br8), /* 0x30 */
- PREFIX86(_xor_wr16), /* 0x31 */
- PREFIX86(_xor_r8b), /* 0x32 */
- PREFIX86(_xor_r16w), /* 0x33 */
- PREFIX86(_xor_ald8), /* 0x34 */
- PREFIX86(_xor_axd16), /* 0x35 */
- PREFIX186(_ss), /* 0x36 */
- PREFIX86(_aaa), /* 0x37 */
- PREFIX86(_cmp_br8), /* 0x38 */
- PREFIX86(_cmp_wr16), /* 0x39 */
- PREFIX86(_cmp_r8b), /* 0x3a */
- PREFIX86(_cmp_r16w), /* 0x3b */
- PREFIX86(_cmp_ald8), /* 0x3c */
- PREFIX86(_cmp_axd16), /* 0x3d */
- PREFIX186(_ds), /* 0x3e */
- PREFIX86(_aas), /* 0x3f */
- PREFIX86(_inc_ax), /* 0x40 */
- PREFIX86(_inc_cx), /* 0x41 */
- PREFIX86(_inc_dx), /* 0x42 */
- PREFIX86(_inc_bx), /* 0x43 */
- PREFIX86(_inc_sp), /* 0x44 */
- PREFIX86(_inc_bp), /* 0x45 */
- PREFIX86(_inc_si), /* 0x46 */
- PREFIX86(_inc_di), /* 0x47 */
- PREFIX86(_dec_ax), /* 0x48 */
- PREFIX86(_dec_cx), /* 0x49 */
- PREFIX86(_dec_dx), /* 0x4a */
- PREFIX86(_dec_bx), /* 0x4b */
- PREFIX86(_dec_sp), /* 0x4c */
- PREFIX86(_dec_bp), /* 0x4d */
- PREFIX86(_dec_si), /* 0x4e */
- PREFIX86(_dec_di), /* 0x4f */
- PREFIX86(_push_ax), /* 0x50 */
- PREFIX86(_push_cx), /* 0x51 */
- PREFIX86(_push_dx), /* 0x52 */
- PREFIX86(_push_bx), /* 0x53 */
- PREFIX86(_push_sp), /* 0x54 */
- PREFIX86(_push_bp), /* 0x55 */
- PREFIX86(_push_si), /* 0x56 */
- PREFIX86(_push_di), /* 0x57 */
- PREFIX86(_pop_ax), /* 0x58 */
- PREFIX86(_pop_cx), /* 0x59 */
- PREFIX86(_pop_dx), /* 0x5a */
- PREFIX86(_pop_bx), /* 0x5b */
- PREFIX86(_pop_sp), /* 0x5c */
- PREFIX86(_pop_bp), /* 0x5d */
- PREFIX86(_pop_si), /* 0x5e */
- PREFIX86(_pop_di), /* 0x5f */
- PREFIX186(_pusha), /* 0x60 */
- PREFIX186(_popa), /* 0x61 */
- PREFIX186(_bound), /* 0x62 */
- PREFIX86(_invalid),
- PREFIX86(_invalid),
- PREFIX86(_invalid),
- PREFIX86(_invalid),
- PREFIX86(_invalid),
- PREFIX186(_push_d16), /* 0x68 */
- PREFIX186(_imul_d16), /* 0x69 */
- PREFIX186(_push_d8), /* 0x6a */
- PREFIX186(_imul_d8), /* 0x6b */
- PREFIX186(_insb), /* 0x6c */
- PREFIX186(_insw), /* 0x6d */
- PREFIX186(_outsb), /* 0x6e */
- PREFIX186(_outsw), /* 0x6f */
- PREFIX86(_jo), /* 0x70 */
- PREFIX86(_jno), /* 0x71 */
- PREFIX86(_jb), /* 0x72 */
- PREFIX86(_jnb), /* 0x73 */
- PREFIX86(_jz), /* 0x74 */
- PREFIX86(_jnz), /* 0x75 */
- PREFIX86(_jbe), /* 0x76 */
- PREFIX86(_jnbe), /* 0x77 */
- PREFIX86(_js), /* 0x78 */
- PREFIX86(_jns), /* 0x79 */
- PREFIX86(_jp), /* 0x7a */
- PREFIX86(_jnp), /* 0x7b */
- PREFIX86(_jl), /* 0x7c */
- PREFIX86(_jnl), /* 0x7d */
- PREFIX86(_jle), /* 0x7e */
- PREFIX86(_jnle), /* 0x7f */
- PREFIX86(_80pre), /* 0x80 */
- PREFIX86(_81pre), /* 0x81 */
- PREFIX86(_82pre), /* 0x82 */
- PREFIX86(_83pre), /* 0x83 */
- PREFIX86(_test_br8), /* 0x84 */
- PREFIX86(_test_wr16), /* 0x85 */
- PREFIX86(_xchg_br8), /* 0x86 */
- PREFIX86(_xchg_wr16), /* 0x87 */
- PREFIX86(_mov_br8), /* 0x88 */
- PREFIX86(_mov_wr16), /* 0x89 */
- PREFIX86(_mov_r8b), /* 0x8a */
- PREFIX86(_mov_r16w), /* 0x8b */
- PREFIX86(_mov_wsreg), /* 0x8c */
- PREFIX86(_lea), /* 0x8d */
- PREFIX186(_mov_sregw), /* 0x8e */
- PREFIX86(_popw), /* 0x8f */
- PREFIX86(_nop), /* 0x90 */
- PREFIX86(_xchg_axcx), /* 0x91 */
- PREFIX86(_xchg_axdx), /* 0x92 */
- PREFIX86(_xchg_axbx), /* 0x93 */
- PREFIX86(_xchg_axsp), /* 0x94 */
- PREFIX86(_xchg_axbp), /* 0x95 */
- PREFIX86(_xchg_axsi), /* 0x97 */
- PREFIX86(_xchg_axdi), /* 0x97 */
- PREFIX86(_cbw), /* 0x98 */
- PREFIX86(_cwd), /* 0x99 */
- PREFIX86(_call_far), /* 0x9a */
- PREFIX86(_wait), /* 0x9b */
- PREFIX86(_pushf), /* 0x9c */
- PREFIX86(_popf), /* 0x9d */
- PREFIX86(_sahf), /* 0x9e */
- PREFIX86(_lahf), /* 0x9f */
- PREFIX86(_mov_aldisp), /* 0xa0 */
- PREFIX86(_mov_axdisp), /* 0xa1 */
- PREFIX86(_mov_dispal), /* 0xa2 */
- PREFIX86(_mov_dispax), /* 0xa3 */
- PREFIX86(_movsb), /* 0xa4 */
- PREFIX86(_movsw), /* 0xa5 */
- PREFIX86(_cmpsb), /* 0xa6 */
- PREFIX86(_cmpsw), /* 0xa7 */
- PREFIX86(_test_ald8), /* 0xa8 */
- PREFIX86(_test_axd16), /* 0xa9 */
- PREFIX86(_stosb), /* 0xaa */
- PREFIX86(_stosw), /* 0xab */
- PREFIX86(_lodsb), /* 0xac */
- PREFIX86(_lodsw), /* 0xad */
- PREFIX86(_scasb), /* 0xae */
- PREFIX86(_scasw), /* 0xaf */
- PREFIX86(_mov_ald8), /* 0xb0 */
- PREFIX86(_mov_cld8), /* 0xb1 */
- PREFIX86(_mov_dld8), /* 0xb2 */
- PREFIX86(_mov_bld8), /* 0xb3 */
- PREFIX86(_mov_ahd8), /* 0xb4 */
- PREFIX86(_mov_chd8), /* 0xb5 */
- PREFIX86(_mov_dhd8), /* 0xb6 */
- PREFIX86(_mov_bhd8), /* 0xb7 */
- PREFIX86(_mov_axd16), /* 0xb8 */
- PREFIX86(_mov_cxd16), /* 0xb9 */
- PREFIX86(_mov_dxd16), /* 0xba */
- PREFIX86(_mov_bxd16), /* 0xbb */
- PREFIX86(_mov_spd16), /* 0xbc */
- PREFIX86(_mov_bpd16), /* 0xbd */
- PREFIX86(_mov_sid16), /* 0xbe */
- PREFIX86(_mov_did16), /* 0xbf */
- PREFIX186(_rotshft_bd8), /* 0xc0 */
- PREFIX186(_rotshft_wd8), /* 0xc1 */
- PREFIX86(_ret_d16), /* 0xc2 */
- PREFIX86(_ret), /* 0xc3 */
- PREFIX86(_les_dw), /* 0xc4 */
- PREFIX86(_lds_dw), /* 0xc5 */
- PREFIX86(_mov_bd8), /* 0xc6 */
- PREFIX86(_mov_wd16), /* 0xc7 */
- PREFIX186(_enter), /* 0xc8 */
- PREFIX186(_leave), /* 0xc9 */
- PREFIX86(_retf_d16), /* 0xca */
- PREFIX86(_retf), /* 0xcb */
- PREFIX86(_int3), /* 0xcc */
- PREFIX86(_int), /* 0xcd */
- PREFIX86(_into), /* 0xce */
- PREFIX86(_iret), /* 0xcf */
- PREFIX86(_rotshft_b), /* 0xd0 */
- PREFIX86(_rotshft_w), /* 0xd1 */
- PREFIX186(_rotshft_bcl), /* 0xd2 */
- PREFIX186(_rotshft_wcl), /* 0xd3 */
- PREFIX86(_aam), /* 0xd4 */
- PREFIX86(_aad), /* 0xd5 */
- PREFIX86(_invalid),
- PREFIX86(_xlat), /* 0xd7 */
- PREFIX86(_escape), /* 0xd8 */
- PREFIX86(_escape), /* 0xd9 */
- PREFIX86(_escape), /* 0xda */
- PREFIX86(_escape), /* 0xdb */
- PREFIX86(_escape), /* 0xdc */
- PREFIX86(_escape), /* 0xdd */
- PREFIX86(_escape), /* 0xde */
- PREFIX86(_escape), /* 0xdf */
- PREFIX86(_loopne), /* 0xe0 */
- PREFIX86(_loope), /* 0xe1 */
- PREFIX86(_loop), /* 0xe2 */
- PREFIX86(_jcxz), /* 0xe3 */
- PREFIX86(_inal), /* 0xe4 */
- PREFIX86(_inax), /* 0xe5 */
- PREFIX86(_outal), /* 0xe6 */
- PREFIX86(_outax), /* 0xe7 */
- PREFIX86(_call_d16), /* 0xe8 */
- PREFIX86(_jmp_d16), /* 0xe9 */
- PREFIX86(_jmp_far), /* 0xea */
- PREFIX86(_jmp_d8), /* 0xeb */
- PREFIX86(_inaldx), /* 0xec */
- PREFIX86(_inaxdx), /* 0xed */
- PREFIX86(_outdxal), /* 0xee */
- PREFIX86(_outdxax), /* 0xef */
- PREFIX86(_lock), /* 0xf0 */
- PREFIX86(_invalid), /* 0xf1 */
- PREFIX186(_repne), /* 0xf2 */
- PREFIX186(_repe), /* 0xf3 */
- PREFIX86(_hlt), /* 0xf4 */
- PREFIX86(_cmc), /* 0xf5 */
- PREFIX86(_f6pre), /* 0xf6 */
- PREFIX86(_f7pre), /* 0xf7 */
- PREFIX86(_clc), /* 0xf8 */
- PREFIX86(_stc), /* 0xf9 */
- PREFIX86(_cli), /* 0xfa */
- PREFIX186(_sti), /* 0xfb */
- PREFIX86(_cld), /* 0xfc */
- PREFIX86(_std), /* 0xfd */
- PREFIX86(_fepre), /* 0xfe */
- PREFIX86(_ffpre) /* 0xff */
+ PREFIX86(_add_br8), /* 0x00 */
+ PREFIX86(_add_wr16), /* 0x01 */
+ PREFIX86(_add_r8b), /* 0x02 */
+ PREFIX86(_add_r16w), /* 0x03 */
+ PREFIX86(_add_ald8), /* 0x04 */
+ PREFIX86(_add_axd16), /* 0x05 */
+ PREFIX86(_push_es), /* 0x06 */
+ PREFIX86(_pop_es), /* 0x07 */
+ PREFIX86(_or_br8), /* 0x08 */
+ PREFIX86(_or_wr16), /* 0x09 */
+ PREFIX86(_or_r8b), /* 0x0a */
+ PREFIX86(_or_r16w), /* 0x0b */
+ PREFIX86(_or_ald8), /* 0x0c */
+ PREFIX86(_or_axd16), /* 0x0d */
+ PREFIX86(_push_cs), /* 0x0e */
+ PREFIX86(_invalid),
+ PREFIX86(_adc_br8), /* 0x10 */
+ PREFIX86(_adc_wr16), /* 0x11 */
+ PREFIX86(_adc_r8b), /* 0x12 */
+ PREFIX86(_adc_r16w), /* 0x13 */
+ PREFIX86(_adc_ald8), /* 0x14 */
+ PREFIX86(_adc_axd16), /* 0x15 */
+ PREFIX86(_push_ss), /* 0x16 */
+ PREFIX186(_pop_ss), /* 0x17 */
+ PREFIX86(_sbb_br8), /* 0x18 */
+ PREFIX86(_sbb_wr16), /* 0x19 */
+ PREFIX86(_sbb_r8b), /* 0x1a */
+ PREFIX86(_sbb_r16w), /* 0x1b */
+ PREFIX86(_sbb_ald8), /* 0x1c */
+ PREFIX86(_sbb_axd16), /* 0x1d */
+ PREFIX86(_push_ds), /* 0x1e */
+ PREFIX86(_pop_ds), /* 0x1f */
+ PREFIX86(_and_br8), /* 0x20 */
+ PREFIX86(_and_wr16), /* 0x21 */
+ PREFIX86(_and_r8b), /* 0x22 */
+ PREFIX86(_and_r16w), /* 0x23 */
+ PREFIX86(_and_ald8), /* 0x24 */
+ PREFIX86(_and_axd16), /* 0x25 */
+ PREFIX186(_es), /* 0x26 */
+ PREFIX86(_daa), /* 0x27 */
+ PREFIX86(_sub_br8), /* 0x28 */
+ PREFIX86(_sub_wr16), /* 0x29 */
+ PREFIX86(_sub_r8b), /* 0x2a */
+ PREFIX86(_sub_r16w), /* 0x2b */
+ PREFIX86(_sub_ald8), /* 0x2c */
+ PREFIX86(_sub_axd16), /* 0x2d */
+ PREFIX186(_cs), /* 0x2e */
+ PREFIX86(_das), /* 0x2f */
+ PREFIX86(_xor_br8), /* 0x30 */
+ PREFIX86(_xor_wr16), /* 0x31 */
+ PREFIX86(_xor_r8b), /* 0x32 */
+ PREFIX86(_xor_r16w), /* 0x33 */
+ PREFIX86(_xor_ald8), /* 0x34 */
+ PREFIX86(_xor_axd16), /* 0x35 */
+ PREFIX186(_ss), /* 0x36 */
+ PREFIX86(_aaa), /* 0x37 */
+ PREFIX86(_cmp_br8), /* 0x38 */
+ PREFIX86(_cmp_wr16), /* 0x39 */
+ PREFIX86(_cmp_r8b), /* 0x3a */
+ PREFIX86(_cmp_r16w), /* 0x3b */
+ PREFIX86(_cmp_ald8), /* 0x3c */
+ PREFIX86(_cmp_axd16), /* 0x3d */
+ PREFIX186(_ds), /* 0x3e */
+ PREFIX86(_aas), /* 0x3f */
+ PREFIX86(_inc_ax), /* 0x40 */
+ PREFIX86(_inc_cx), /* 0x41 */
+ PREFIX86(_inc_dx), /* 0x42 */
+ PREFIX86(_inc_bx), /* 0x43 */
+ PREFIX86(_inc_sp), /* 0x44 */
+ PREFIX86(_inc_bp), /* 0x45 */
+ PREFIX86(_inc_si), /* 0x46 */
+ PREFIX86(_inc_di), /* 0x47 */
+ PREFIX86(_dec_ax), /* 0x48 */
+ PREFIX86(_dec_cx), /* 0x49 */
+ PREFIX86(_dec_dx), /* 0x4a */
+ PREFIX86(_dec_bx), /* 0x4b */
+ PREFIX86(_dec_sp), /* 0x4c */
+ PREFIX86(_dec_bp), /* 0x4d */
+ PREFIX86(_dec_si), /* 0x4e */
+ PREFIX86(_dec_di), /* 0x4f */
+ PREFIX86(_push_ax), /* 0x50 */
+ PREFIX86(_push_cx), /* 0x51 */
+ PREFIX86(_push_dx), /* 0x52 */
+ PREFIX86(_push_bx), /* 0x53 */
+ PREFIX86(_push_sp), /* 0x54 */
+ PREFIX86(_push_bp), /* 0x55 */
+ PREFIX86(_push_si), /* 0x56 */
+ PREFIX86(_push_di), /* 0x57 */
+ PREFIX86(_pop_ax), /* 0x58 */
+ PREFIX86(_pop_cx), /* 0x59 */
+ PREFIX86(_pop_dx), /* 0x5a */
+ PREFIX86(_pop_bx), /* 0x5b */
+ PREFIX86(_pop_sp), /* 0x5c */
+ PREFIX86(_pop_bp), /* 0x5d */
+ PREFIX86(_pop_si), /* 0x5e */
+ PREFIX86(_pop_di), /* 0x5f */
+ PREFIX186(_pusha), /* 0x60 */
+ PREFIX186(_popa), /* 0x61 */
+ PREFIX186(_bound), /* 0x62 */
+ PREFIX86(_invalid),
+ PREFIX86(_invalid),
+ PREFIX86(_invalid),
+ PREFIX86(_invalid),
+ PREFIX86(_invalid),
+ PREFIX186(_push_d16), /* 0x68 */
+ PREFIX186(_imul_d16), /* 0x69 */
+ PREFIX186(_push_d8), /* 0x6a */
+ PREFIX186(_imul_d8), /* 0x6b */
+ PREFIX186(_insb), /* 0x6c */
+ PREFIX186(_insw), /* 0x6d */
+ PREFIX186(_outsb), /* 0x6e */
+ PREFIX186(_outsw), /* 0x6f */
+ PREFIX86(_jo), /* 0x70 */
+ PREFIX86(_jno), /* 0x71 */
+ PREFIX86(_jb), /* 0x72 */
+ PREFIX86(_jnb), /* 0x73 */
+ PREFIX86(_jz), /* 0x74 */
+ PREFIX86(_jnz), /* 0x75 */
+ PREFIX86(_jbe), /* 0x76 */
+ PREFIX86(_jnbe), /* 0x77 */
+ PREFIX86(_js), /* 0x78 */
+ PREFIX86(_jns), /* 0x79 */
+ PREFIX86(_jp), /* 0x7a */
+ PREFIX86(_jnp), /* 0x7b */
+ PREFIX86(_jl), /* 0x7c */
+ PREFIX86(_jnl), /* 0x7d */
+ PREFIX86(_jle), /* 0x7e */
+ PREFIX86(_jnle), /* 0x7f */
+ PREFIX86(_80pre), /* 0x80 */
+ PREFIX86(_81pre), /* 0x81 */
+ PREFIX86(_82pre), /* 0x82 */
+ PREFIX86(_83pre), /* 0x83 */
+ PREFIX86(_test_br8), /* 0x84 */
+ PREFIX86(_test_wr16), /* 0x85 */
+ PREFIX86(_xchg_br8), /* 0x86 */
+ PREFIX86(_xchg_wr16), /* 0x87 */
+ PREFIX86(_mov_br8), /* 0x88 */
+ PREFIX86(_mov_wr16), /* 0x89 */
+ PREFIX86(_mov_r8b), /* 0x8a */
+ PREFIX86(_mov_r16w), /* 0x8b */
+ PREFIX86(_mov_wsreg), /* 0x8c */
+ PREFIX86(_lea), /* 0x8d */
+ PREFIX186(_mov_sregw), /* 0x8e */
+ PREFIX86(_popw), /* 0x8f */
+ PREFIX86(_nop), /* 0x90 */
+ PREFIX86(_xchg_axcx), /* 0x91 */
+ PREFIX86(_xchg_axdx), /* 0x92 */
+ PREFIX86(_xchg_axbx), /* 0x93 */
+ PREFIX86(_xchg_axsp), /* 0x94 */
+ PREFIX86(_xchg_axbp), /* 0x95 */
+ PREFIX86(_xchg_axsi), /* 0x97 */
+ PREFIX86(_xchg_axdi), /* 0x97 */
+ PREFIX86(_cbw), /* 0x98 */
+ PREFIX86(_cwd), /* 0x99 */
+ PREFIX86(_call_far), /* 0x9a */
+ PREFIX86(_wait), /* 0x9b */
+ PREFIX86(_pushf), /* 0x9c */
+ PREFIX86(_popf), /* 0x9d */
+ PREFIX86(_sahf), /* 0x9e */
+ PREFIX86(_lahf), /* 0x9f */
+ PREFIX86(_mov_aldisp), /* 0xa0 */
+ PREFIX86(_mov_axdisp), /* 0xa1 */
+ PREFIX86(_mov_dispal), /* 0xa2 */
+ PREFIX86(_mov_dispax), /* 0xa3 */
+ PREFIX86(_movsb), /* 0xa4 */
+ PREFIX86(_movsw), /* 0xa5 */
+ PREFIX86(_cmpsb), /* 0xa6 */
+ PREFIX86(_cmpsw), /* 0xa7 */
+ PREFIX86(_test_ald8), /* 0xa8 */
+ PREFIX86(_test_axd16), /* 0xa9 */
+ PREFIX86(_stosb), /* 0xaa */
+ PREFIX86(_stosw), /* 0xab */
+ PREFIX86(_lodsb), /* 0xac */
+ PREFIX86(_lodsw), /* 0xad */
+ PREFIX86(_scasb), /* 0xae */
+ PREFIX86(_scasw), /* 0xaf */
+ PREFIX86(_mov_ald8), /* 0xb0 */
+ PREFIX86(_mov_cld8), /* 0xb1 */
+ PREFIX86(_mov_dld8), /* 0xb2 */
+ PREFIX86(_mov_bld8), /* 0xb3 */
+ PREFIX86(_mov_ahd8), /* 0xb4 */
+ PREFIX86(_mov_chd8), /* 0xb5 */
+ PREFIX86(_mov_dhd8), /* 0xb6 */
+ PREFIX86(_mov_bhd8), /* 0xb7 */
+ PREFIX86(_mov_axd16), /* 0xb8 */
+ PREFIX86(_mov_cxd16), /* 0xb9 */
+ PREFIX86(_mov_dxd16), /* 0xba */
+ PREFIX86(_mov_bxd16), /* 0xbb */
+ PREFIX86(_mov_spd16), /* 0xbc */
+ PREFIX86(_mov_bpd16), /* 0xbd */
+ PREFIX86(_mov_sid16), /* 0xbe */
+ PREFIX86(_mov_did16), /* 0xbf */
+ PREFIX186(_rotshft_bd8), /* 0xc0 */
+ PREFIX186(_rotshft_wd8), /* 0xc1 */
+ PREFIX86(_ret_d16), /* 0xc2 */
+ PREFIX86(_ret), /* 0xc3 */
+ PREFIX86(_les_dw), /* 0xc4 */
+ PREFIX86(_lds_dw), /* 0xc5 */
+ PREFIX86(_mov_bd8), /* 0xc6 */
+ PREFIX86(_mov_wd16), /* 0xc7 */
+ PREFIX186(_enter), /* 0xc8 */
+ PREFIX186(_leave), /* 0xc9 */
+ PREFIX86(_retf_d16), /* 0xca */
+ PREFIX86(_retf), /* 0xcb */
+ PREFIX86(_int3), /* 0xcc */
+ PREFIX86(_int), /* 0xcd */
+ PREFIX86(_into), /* 0xce */
+ PREFIX86(_iret), /* 0xcf */
+ PREFIX86(_rotshft_b), /* 0xd0 */
+ PREFIX86(_rotshft_w), /* 0xd1 */
+ PREFIX186(_rotshft_bcl), /* 0xd2 */
+ PREFIX186(_rotshft_wcl), /* 0xd3 */
+ PREFIX86(_aam), /* 0xd4 */
+ PREFIX86(_aad), /* 0xd5 */
+ PREFIX86(_invalid),
+ PREFIX86(_xlat), /* 0xd7 */
+ PREFIX86(_escape), /* 0xd8 */
+ PREFIX86(_escape), /* 0xd9 */
+ PREFIX86(_escape), /* 0xda */
+ PREFIX86(_escape), /* 0xdb */
+ PREFIX86(_escape), /* 0xdc */
+ PREFIX86(_escape), /* 0xdd */
+ PREFIX86(_escape), /* 0xde */
+ PREFIX86(_escape), /* 0xdf */
+ PREFIX86(_loopne), /* 0xe0 */
+ PREFIX86(_loope), /* 0xe1 */
+ PREFIX86(_loop), /* 0xe2 */
+ PREFIX86(_jcxz), /* 0xe3 */
+ PREFIX86(_inal), /* 0xe4 */
+ PREFIX86(_inax), /* 0xe5 */
+ PREFIX86(_outal), /* 0xe6 */
+ PREFIX86(_outax), /* 0xe7 */
+ PREFIX86(_call_d16), /* 0xe8 */
+ PREFIX86(_jmp_d16), /* 0xe9 */
+ PREFIX86(_jmp_far), /* 0xea */
+ PREFIX86(_jmp_d8), /* 0xeb */
+ PREFIX86(_inaldx), /* 0xec */
+ PREFIX86(_inaxdx), /* 0xed */
+ PREFIX86(_outdxal), /* 0xee */
+ PREFIX86(_outdxax), /* 0xef */
+ PREFIX86(_lock), /* 0xf0 */
+ PREFIX86(_invalid), /* 0xf1 */
+ PREFIX186(_repne), /* 0xf2 */
+ PREFIX186(_repe), /* 0xf3 */
+ PREFIX86(_hlt), /* 0xf4 */
+ PREFIX86(_cmc), /* 0xf5 */
+ PREFIX86(_f6pre), /* 0xf6 */
+ PREFIX86(_f7pre), /* 0xf7 */
+ PREFIX86(_clc), /* 0xf8 */
+ PREFIX86(_stc), /* 0xf9 */
+ PREFIX86(_cli), /* 0xfa */
+ PREFIX186(_sti), /* 0xfb */
+ PREFIX86(_cld), /* 0xfc */
+ PREFIX86(_std), /* 0xfd */
+ PREFIX86(_fepre), /* 0xfe */
+ PREFIX86(_ffpre) /* 0xff */
};
#if defined(BIGCASE) && !defined(RS6000)
- /* Some compilers cannot handle large case statements */
+ /* Some compilers cannot handle large case statements */
#define TABLE186 \
switch(FETCHOP)\
{\
@@ -359,22 +359,22 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) =
case 0x5d: PREFIX86(_pop_bp)(cpustate); break;\
case 0x5e: PREFIX86(_pop_si)(cpustate); break;\
case 0x5f: PREFIX86(_pop_di)(cpustate); break;\
- case 0x60: PREFIX186(_pusha)(cpustate); break;\
- case 0x61: PREFIX186(_popa)(cpustate); break;\
- case 0x62: PREFIX186(_bound)(cpustate); break;\
+ case 0x60: PREFIX186(_pusha)(cpustate); break;\
+ case 0x61: PREFIX186(_popa)(cpustate); break;\
+ case 0x62: PREFIX186(_bound)(cpustate); break;\
case 0x63: PREFIX86(_invalid)(cpustate); break;\
case 0x64: PREFIX86(_invalid)(cpustate); break;\
- case 0x65: PREFIX86(_invalid)(cpustate); break;\
+ case 0x65: PREFIX86(_invalid)(cpustate); break;\
case 0x66: PREFIX86(_invalid)(cpustate); break;\
case 0x67: PREFIX86(_invalid)(cpustate); break;\
- case 0x68: PREFIX186(_push_d16)(cpustate); break;\
- case 0x69: PREFIX186(_imul_d16)(cpustate); break;\
- case 0x6a: PREFIX186(_push_d8)(cpustate); break;\
- case 0x6b: PREFIX186(_imul_d8)(cpustate); break;\
- case 0x6c: PREFIX186(_insb)(cpustate); break;\
- case 0x6d: PREFIX186(_insw)(cpustate); break;\
- case 0x6e: PREFIX186(_outsb)(cpustate); break;\
- case 0x6f: PREFIX186(_outsw)(cpustate); break;\
+ case 0x68: PREFIX186(_push_d16)(cpustate); break;\
+ case 0x69: PREFIX186(_imul_d16)(cpustate); break;\
+ case 0x6a: PREFIX186(_push_d8)(cpustate); break;\
+ case 0x6b: PREFIX186(_imul_d8)(cpustate); break;\
+ case 0x6c: PREFIX186(_insb)(cpustate); break;\
+ case 0x6d: PREFIX186(_insw)(cpustate); break;\
+ case 0x6e: PREFIX186(_outsb)(cpustate); break;\
+ case 0x6f: PREFIX186(_outsw)(cpustate); break;\
case 0x70: PREFIX86(_jo)(cpustate); break;\
case 0x71: PREFIX86(_jno)(cpustate); break;\
case 0x72: PREFIX86(_jb)(cpustate); break;\
@@ -393,7 +393,7 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) =
case 0x7f: PREFIX86(_jnle)(cpustate); break;\
case 0x80: PREFIX86(_80pre)(cpustate); break;\
case 0x81: PREFIX86(_81pre)(cpustate); break;\
- case 0x82: PREFIX86(_82pre)(cpustate); break;\
+ case 0x82: PREFIX86(_82pre)(cpustate); break;\
case 0x83: PREFIX86(_83pre)(cpustate); break;\
case 0x84: PREFIX86(_test_br8)(cpustate); break;\
case 0x85: PREFIX86(_test_wr16)(cpustate); break;\
@@ -455,26 +455,26 @@ static void (*const PREFIX186(_instruction)[256])(i8086_state *cpustate) =
case 0xbd: PREFIX86(_mov_bpd16)(cpustate); break;\
case 0xbe: PREFIX86(_mov_sid16)(cpustate); break;\
case 0xbf: PREFIX86(_mov_did16)(cpustate); break;\
- case 0xc0: PREFIX186(_rotshft_bd8)(cpustate); break;\
- case 0xc1: PREFIX186(_rotshft_wd8)(cpustate); break;\
+ case 0xc0: PREFIX186(_rotshft_bd8)(cpustate); break;\
+ case 0xc1: PREFIX186(_rotshft_wd8)(cpustate); break;\
case 0xc2: PREFIX86(_ret_d16)(cpustate); break;\
case 0xc3: PREFIX86(_ret)(cpustate); break;\
case 0xc4: PREFIX86(_les_dw)(cpustate); break;\
case 0xc5: PREFIX86(_lds_dw)(cpustate); break;\
case 0xc6: PREFIX86(_mov_bd8)(cpustate); break;\
case 0xc7: PREFIX86(_mov_wd16)(cpustate); break;\
- case 0xc8: PREFIX186(_enter)(cpustate); break;\
- case 0xc9: PREFIX186(_leave)(cpustate); break;\
+ case 0xc8: PREFIX186(_enter)(cpustate); break;\
+ case 0xc9: PREFIX186(_leave)(cpustate); break;\
case 0xca: PREFIX86(_retf_d16)(cpustate); break;\
case 0xcb: PREFIX86(_retf)(cpustate); break;\
case 0xcc: PREFIX86(_int3)(cpustate); break;\
case 0xcd: PREFIX86(_int)(cpustate); break;\
case 0xce: PREFIX86(_into)(cpustate); break;\
case 0xcf: PREFIX86(_iret)(cpustate); break;\
- case 0xd0: PREFIX86(_rotshft_b)(cpustate); break;\
- case 0xd1: PREFIX86(_rotshft_w)(cpustate); break;\
- case 0xd2: PREFIX186(_rotshft_bcl)(cpustate); break;\
- case 0xd3: PREFIX186(_rotshft_wcl)(cpustate); break;\
+ case 0xd0: PREFIX86(_rotshft_b)(cpustate); break;\
+ case 0xd1: PREFIX86(_rotshft_w)(cpustate); break;\
+ case 0xd2: PREFIX186(_rotshft_bcl)(cpustate); break;\
+ case 0xd3: PREFIX186(_rotshft_wcl)(cpustate); break;\
case 0xd4: PREFIX86(_aam)(cpustate); break;\
case 0xd5: PREFIX86(_aad)(cpustate); break;\
case 0xd6: PREFIX86(_invalid)(cpustate); break;\
diff --git a/src/emu/cpu/i86/table286.h b/src/emu/cpu/i86/table286.h
index 0ac2afa7570..58c5a7d00d8 100644
--- a/src/emu/cpu/i86/table286.h
+++ b/src/emu/cpu/i86/table286.h
@@ -5,266 +5,266 @@
static void (*const PREFIX286(_instruction)[256])(i8086_state *cpustate) =
{
- PREFIX86(_add_br8), /* 0x00 */
- PREFIX86(_add_wr16), /* 0x01 */
- PREFIX86(_add_r8b), /* 0x02 */
- PREFIX86(_add_r16w), /* 0x03 */
- PREFIX86(_add_ald8), /* 0x04 */
- PREFIX86(_add_axd16), /* 0x05 */
- PREFIX86(_push_es), /* 0x06 */
- PREFIX86(_pop_es), /* 0x07 */
- PREFIX86(_or_br8), /* 0x08 */
- PREFIX86(_or_wr16), /* 0x09 */
- PREFIX86(_or_r8b), /* 0x0a */
- PREFIX86(_or_r16w), /* 0x0b */
- PREFIX86(_or_ald8), /* 0x0c */
- PREFIX86(_or_axd16), /* 0x0d */
- PREFIX86(_push_cs), /* 0x0e */
- PREFIX286(_0fpre),
- PREFIX86(_adc_br8), /* 0x10 */
- PREFIX86(_adc_wr16), /* 0x11 */
- PREFIX86(_adc_r8b), /* 0x12 */
- PREFIX86(_adc_r16w), /* 0x13 */
- PREFIX86(_adc_ald8), /* 0x14 */
- PREFIX86(_adc_axd16), /* 0x15 */
- PREFIX86(_push_ss), /* 0x16 */
- PREFIX86(_pop_ss), /* 0x17 */
- PREFIX86(_sbb_br8), /* 0x18 */
- PREFIX86(_sbb_wr16), /* 0x19 */
- PREFIX86(_sbb_r8b), /* 0x1a */
- PREFIX86(_sbb_r16w), /* 0x1b */
- PREFIX86(_sbb_ald8), /* 0x1c */
- PREFIX86(_sbb_axd16), /* 0x1d */
- PREFIX86(_push_ds), /* 0x1e */
- PREFIX86(_pop_ds), /* 0x1f */
- PREFIX86(_and_br8), /* 0x20 */
- PREFIX86(_and_wr16), /* 0x21 */
- PREFIX86(_and_r8b), /* 0x22 */
- PREFIX86(_and_r16w), /* 0x23 */
- PREFIX86(_and_ald8), /* 0x24 */
- PREFIX86(_and_axd16), /* 0x25 */
- PREFIX86(_es), /* 0x26 */
- PREFIX86(_daa), /* 0x27 */
- PREFIX86(_sub_br8), /* 0x28 */
- PREFIX86(_sub_wr16), /* 0x29 */
- PREFIX86(_sub_r8b), /* 0x2a */
- PREFIX86(_sub_r16w), /* 0x2b */
- PREFIX86(_sub_ald8), /* 0x2c */
- PREFIX86(_sub_axd16), /* 0x2d */
- PREFIX86(_cs), /* 0x2e */
- PREFIX86(_das), /* 0x2f */
- PREFIX86(_xor_br8), /* 0x30 */
- PREFIX86(_xor_wr16), /* 0x31 */
- PREFIX86(_xor_r8b), /* 0x32 */
- PREFIX86(_xor_r16w), /* 0x33 */
- PREFIX86(_xor_ald8), /* 0x34 */
- PREFIX86(_xor_axd16), /* 0x35 */
- PREFIX86(_ss), /* 0x36 */
- PREFIX86(_aaa), /* 0x37 */
- PREFIX86(_cmp_br8), /* 0x38 */
- PREFIX86(_cmp_wr16), /* 0x39 */
- PREFIX86(_cmp_r8b), /* 0x3a */
- PREFIX86(_cmp_r16w), /* 0x3b */
- PREFIX86(_cmp_ald8), /* 0x3c */
- PREFIX86(_cmp_axd16), /* 0x3d */
- PREFIX86(_ds), /* 0x3e */
- PREFIX86(_aas), /* 0x3f */
- PREFIX86(_inc_ax), /* 0x40 */
- PREFIX86(_inc_cx), /* 0x41 */
- PREFIX86(_inc_dx), /* 0x42 */
- PREFIX86(_inc_bx), /* 0x43 */
- PREFIX86(_inc_sp), /* 0x44 */
- PREFIX86(_inc_bp), /* 0x45 */
- PREFIX86(_inc_si), /* 0x46 */
- PREFIX86(_inc_di), /* 0x47 */
- PREFIX86(_dec_ax), /* 0x48 */
- PREFIX86(_dec_cx), /* 0x49 */
- PREFIX86(_dec_dx), /* 0x4a */
- PREFIX86(_dec_bx), /* 0x4b */
- PREFIX86(_dec_sp), /* 0x4c */
- PREFIX86(_dec_bp), /* 0x4d */
- PREFIX86(_dec_si), /* 0x4e */
- PREFIX86(_dec_di), /* 0x4f */
- PREFIX86(_push_ax), /* 0x50 */
- PREFIX86(_push_cx), /* 0x51 */
- PREFIX86(_push_dx), /* 0x52 */
- PREFIX86(_push_bx), /* 0x53 */
- PREFIX86(_push_sp), /* 0x54 */
- PREFIX86(_push_bp), /* 0x55 */
- PREFIX86(_push_si), /* 0x56 */
- PREFIX86(_push_di), /* 0x57 */
- PREFIX86(_pop_ax), /* 0x58 */
- PREFIX86(_pop_cx), /* 0x59 */
- PREFIX86(_pop_dx), /* 0x5a */
- PREFIX86(_pop_bx), /* 0x5b */
- PREFIX86(_pop_sp), /* 0x5c */
- PREFIX86(_pop_bp), /* 0x5d */
- PREFIX86(_pop_si), /* 0x5e */
- PREFIX86(_pop_di), /* 0x5f */
- PREFIX186(_pusha), /* 0x60 */
- PREFIX186(_popa), /* 0x61 */
- PREFIX186(_bound), /* 0x62 */
- PREFIX286(_arpl), /* 0x63 */
- PREFIX286(_invalid),
- PREFIX286(_invalid),
- PREFIX286(_invalid),
- PREFIX286(_invalid),
- PREFIX186(_push_d16), /* 0x68 */
- PREFIX186(_imul_d16), /* 0x69 */
- PREFIX186(_push_d8), /* 0x6a */
- PREFIX186(_imul_d8), /* 0x6b */
- PREFIX186(_insb), /* 0x6c */
- PREFIX186(_insw), /* 0x6d */
- PREFIX186(_outsb), /* 0x6e */
- PREFIX186(_outsw), /* 0x6f */
- PREFIX86(_jo), /* 0x70 */
- PREFIX86(_jno), /* 0x71 */
- PREFIX86(_jb), /* 0x72 */
- PREFIX86(_jnb), /* 0x73 */
- PREFIX86(_jz), /* 0x74 */
- PREFIX86(_jnz), /* 0x75 */
- PREFIX86(_jbe), /* 0x76 */
- PREFIX86(_jnbe), /* 0x77 */
- PREFIX86(_js), /* 0x78 */
- PREFIX86(_jns), /* 0x79 */
- PREFIX86(_jp), /* 0x7a */
- PREFIX86(_jnp), /* 0x7b */
- PREFIX86(_jl), /* 0x7c */
- PREFIX86(_jnl), /* 0x7d */
- PREFIX86(_jle), /* 0x7e */
- PREFIX86(_jnle), /* 0x7f */
- PREFIX86(_80pre), /* 0x80 */
- PREFIX86(_81pre), /* 0x81 */
- PREFIX86(_82pre), /* 0x82 */
- PREFIX86(_83pre), /* 0x83 */
- PREFIX86(_test_br8), /* 0x84 */
- PREFIX86(_test_wr16), /* 0x85 */
- PREFIX86(_xchg_br8), /* 0x86 */
- PREFIX86(_xchg_wr16), /* 0x87 */
- PREFIX86(_mov_br8), /* 0x88 */
- PREFIX86(_mov_wr16), /* 0x89 */
- PREFIX86(_mov_r8b), /* 0x8a */
- PREFIX86(_mov_r16w), /* 0x8b */
- PREFIX86(_mov_wsreg), /* 0x8c */
- PREFIX86(_lea), /* 0x8d */
- PREFIX86(_mov_sregw), /* 0x8e */
- PREFIX86(_popw), /* 0x8f */
- PREFIX86(_nop), /* 0x90 */
- PREFIX86(_xchg_axcx), /* 0x91 */
- PREFIX86(_xchg_axdx), /* 0x92 */
- PREFIX86(_xchg_axbx), /* 0x93 */
- PREFIX86(_xchg_axsp), /* 0x94 */
- PREFIX86(_xchg_axbp), /* 0x95 */
- PREFIX86(_xchg_axsi), /* 0x97 */
- PREFIX86(_xchg_axdi), /* 0x97 */
- PREFIX86(_cbw), /* 0x98 */
- PREFIX86(_cwd), /* 0x99 */
- PREFIX86(_call_far), /* 0x9a */
- PREFIX86(_wait), /* 0x9b */
- PREFIX86(_pushf), /* 0x9c */
- PREFIX286(_popf), /* 0x9d */
- PREFIX86(_sahf), /* 0x9e */
- PREFIX86(_lahf), /* 0x9f */
- PREFIX86(_mov_aldisp), /* 0xa0 */
- PREFIX86(_mov_axdisp), /* 0xa1 */
- PREFIX86(_mov_dispal), /* 0xa2 */
- PREFIX86(_mov_dispax), /* 0xa3 */
- PREFIX86(_movsb), /* 0xa4 */
- PREFIX86(_movsw), /* 0xa5 */
- PREFIX86(_cmpsb), /* 0xa6 */
- PREFIX86(_cmpsw), /* 0xa7 */
- PREFIX86(_test_ald8), /* 0xa8 */
- PREFIX86(_test_axd16), /* 0xa9 */
- PREFIX86(_stosb), /* 0xaa */
- PREFIX86(_stosw), /* 0xab */
- PREFIX86(_lodsb), /* 0xac */
- PREFIX86(_lodsw), /* 0xad */
- PREFIX86(_scasb), /* 0xae */
- PREFIX86(_scasw), /* 0xaf */
- PREFIX86(_mov_ald8), /* 0xb0 */
- PREFIX86(_mov_cld8), /* 0xb1 */
- PREFIX86(_mov_dld8), /* 0xb2 */
- PREFIX86(_mov_bld8), /* 0xb3 */
- PREFIX86(_mov_ahd8), /* 0xb4 */
- PREFIX86(_mov_chd8), /* 0xb5 */
- PREFIX86(_mov_dhd8), /* 0xb6 */
- PREFIX86(_mov_bhd8), /* 0xb7 */
- PREFIX86(_mov_axd16), /* 0xb8 */
- PREFIX86(_mov_cxd16), /* 0xb9 */
- PREFIX86(_mov_dxd16), /* 0xba */
- PREFIX86(_mov_bxd16), /* 0xbb */
- PREFIX86(_mov_spd16), /* 0xbc */
- PREFIX86(_mov_bpd16), /* 0xbd */
- PREFIX86(_mov_sid16), /* 0xbe */
- PREFIX86(_mov_did16), /* 0xbf */
- PREFIX186(_rotshft_bd8), /* 0xc0 */
- PREFIX186(_rotshft_wd8), /* 0xc1 */
- PREFIX86(_ret_d16), /* 0xc2 */
- PREFIX86(_ret), /* 0xc3 */
- PREFIX86(_les_dw), /* 0xc4 */
- PREFIX86(_lds_dw), /* 0xc5 */
- PREFIX86(_mov_bd8), /* 0xc6 */
- PREFIX86(_mov_wd16), /* 0xc7 */
- PREFIX186(_enter), /* 0xc8 */
- PREFIX186(_leave), /* 0xc9 */
- PREFIX286(_retf_d16), /* 0xca */
- PREFIX286(_retf), /* 0xcb */
- PREFIX86(_int3), /* 0xcc */
- PREFIX86(_int), /* 0xcd */
- PREFIX86(_into), /* 0xce */
- PREFIX286(_iret), /* 0xcf */
- PREFIX86(_rotshft_b), /* 0xd0 */
- PREFIX86(_rotshft_w), /* 0xd1 */
- PREFIX186(_rotshft_bcl), /* 0xd2 */
- PREFIX186(_rotshft_wcl), /* 0xd3 */
- PREFIX86(_aam), /* 0xd4 */
- PREFIX86(_aad), /* 0xd5 */
- PREFIX286(_invalid),
- PREFIX86(_xlat), /* 0xd7 */
- PREFIX286(_escape), /* 0xd8 */
- PREFIX286(_escape), /* 0xd9 */
- PREFIX286(_escape), /* 0xda */
- PREFIX286(_escape), /* 0xdb */
- PREFIX286(_escape), /* 0xdc */
- PREFIX286(_escape), /* 0xdd */
- PREFIX286(_escape), /* 0xde */
- PREFIX286(_escape_7), /* 0xdf */
- PREFIX86(_loopne), /* 0xe0 */
- PREFIX86(_loope), /* 0xe1 */
- PREFIX86(_loop), /* 0xe2 */
- PREFIX86(_jcxz), /* 0xe3 */
- PREFIX86(_inal), /* 0xe4 */
- PREFIX86(_inax), /* 0xe5 */
- PREFIX86(_outal), /* 0xe6 */
- PREFIX86(_outax), /* 0xe7 */
- PREFIX86(_call_d16), /* 0xe8 */
- PREFIX86(_jmp_d16), /* 0xe9 */
- PREFIX86(_jmp_far), /* 0xea */
- PREFIX86(_jmp_d8), /* 0xeb */
- PREFIX86(_inaldx), /* 0xec */
- PREFIX86(_inaxdx), /* 0xed */
- PREFIX86(_outdxal), /* 0xee */
- PREFIX86(_outdxax), /* 0xef */
- PREFIX86(_lock), /* 0xf0 */
- PREFIX286(_invalid), /* 0xf1 */
- PREFIX186(_repne), /* 0xf2 */
- PREFIX186(_repe), /* 0xf3 */
- PREFIX86(_hlt), /* 0xf4 */
- PREFIX86(_cmc), /* 0xf5 */
- PREFIX86(_f6pre), /* 0xf6 */
- PREFIX86(_f7pre), /* 0xf7 */
- PREFIX86(_clc), /* 0xf8 */
- PREFIX86(_stc), /* 0xf9 */
- PREFIX86(_cli), /* 0xfa */
- PREFIX86(_sti), /* 0xfb */
- PREFIX86(_cld), /* 0xfc */
- PREFIX86(_std), /* 0xfd */
- PREFIX86(_fepre), /* 0xfe */
- PREFIX86(_ffpre) /* 0xff */
+ PREFIX86(_add_br8), /* 0x00 */
+ PREFIX86(_add_wr16), /* 0x01 */
+ PREFIX86(_add_r8b), /* 0x02 */
+ PREFIX86(_add_r16w), /* 0x03 */
+ PREFIX86(_add_ald8), /* 0x04 */
+ PREFIX86(_add_axd16), /* 0x05 */
+ PREFIX86(_push_es), /* 0x06 */
+ PREFIX86(_pop_es), /* 0x07 */
+ PREFIX86(_or_br8), /* 0x08 */
+ PREFIX86(_or_wr16), /* 0x09 */
+ PREFIX86(_or_r8b), /* 0x0a */
+ PREFIX86(_or_r16w), /* 0x0b */
+ PREFIX86(_or_ald8), /* 0x0c */
+ PREFIX86(_or_axd16), /* 0x0d */
+ PREFIX86(_push_cs), /* 0x0e */
+ PREFIX286(_0fpre),
+ PREFIX86(_adc_br8), /* 0x10 */
+ PREFIX86(_adc_wr16), /* 0x11 */
+ PREFIX86(_adc_r8b), /* 0x12 */
+ PREFIX86(_adc_r16w), /* 0x13 */
+ PREFIX86(_adc_ald8), /* 0x14 */
+ PREFIX86(_adc_axd16), /* 0x15 */
+ PREFIX86(_push_ss), /* 0x16 */
+ PREFIX86(_pop_ss), /* 0x17 */
+ PREFIX86(_sbb_br8), /* 0x18 */
+ PREFIX86(_sbb_wr16), /* 0x19 */
+ PREFIX86(_sbb_r8b), /* 0x1a */
+ PREFIX86(_sbb_r16w), /* 0x1b */
+ PREFIX86(_sbb_ald8), /* 0x1c */
+ PREFIX86(_sbb_axd16), /* 0x1d */
+ PREFIX86(_push_ds), /* 0x1e */
+ PREFIX86(_pop_ds), /* 0x1f */
+ PREFIX86(_and_br8), /* 0x20 */
+ PREFIX86(_and_wr16), /* 0x21 */
+ PREFIX86(_and_r8b), /* 0x22 */
+ PREFIX86(_and_r16w), /* 0x23 */
+ PREFIX86(_and_ald8), /* 0x24 */
+ PREFIX86(_and_axd16), /* 0x25 */
+ PREFIX86(_es), /* 0x26 */
+ PREFIX86(_daa), /* 0x27 */
+ PREFIX86(_sub_br8), /* 0x28 */
+ PREFIX86(_sub_wr16), /* 0x29 */
+ PREFIX86(_sub_r8b), /* 0x2a */
+ PREFIX86(_sub_r16w), /* 0x2b */
+ PREFIX86(_sub_ald8), /* 0x2c */
+ PREFIX86(_sub_axd16), /* 0x2d */
+ PREFIX86(_cs), /* 0x2e */
+ PREFIX86(_das), /* 0x2f */
+ PREFIX86(_xor_br8), /* 0x30 */
+ PREFIX86(_xor_wr16), /* 0x31 */
+ PREFIX86(_xor_r8b), /* 0x32 */
+ PREFIX86(_xor_r16w), /* 0x33 */
+ PREFIX86(_xor_ald8), /* 0x34 */
+ PREFIX86(_xor_axd16), /* 0x35 */
+ PREFIX86(_ss), /* 0x36 */
+ PREFIX86(_aaa), /* 0x37 */
+ PREFIX86(_cmp_br8), /* 0x38 */
+ PREFIX86(_cmp_wr16), /* 0x39 */
+ PREFIX86(_cmp_r8b), /* 0x3a */
+ PREFIX86(_cmp_r16w), /* 0x3b */
+ PREFIX86(_cmp_ald8), /* 0x3c */
+ PREFIX86(_cmp_axd16), /* 0x3d */
+ PREFIX86(_ds), /* 0x3e */
+ PREFIX86(_aas), /* 0x3f */
+ PREFIX86(_inc_ax), /* 0x40 */
+ PREFIX86(_inc_cx), /* 0x41 */
+ PREFIX86(_inc_dx), /* 0x42 */
+ PREFIX86(_inc_bx), /* 0x43 */
+ PREFIX86(_inc_sp), /* 0x44 */
+ PREFIX86(_inc_bp), /* 0x45 */
+ PREFIX86(_inc_si), /* 0x46 */
+ PREFIX86(_inc_di), /* 0x47 */
+ PREFIX86(_dec_ax), /* 0x48 */
+ PREFIX86(_dec_cx), /* 0x49 */
+ PREFIX86(_dec_dx), /* 0x4a */
+ PREFIX86(_dec_bx), /* 0x4b */
+ PREFIX86(_dec_sp), /* 0x4c */
+ PREFIX86(_dec_bp), /* 0x4d */
+ PREFIX86(_dec_si), /* 0x4e */
+ PREFIX86(_dec_di), /* 0x4f */
+ PREFIX86(_push_ax), /* 0x50 */
+ PREFIX86(_push_cx), /* 0x51 */
+ PREFIX86(_push_dx), /* 0x52 */
+ PREFIX86(_push_bx), /* 0x53 */
+ PREFIX86(_push_sp), /* 0x54 */
+ PREFIX86(_push_bp), /* 0x55 */
+ PREFIX86(_push_si), /* 0x56 */
+ PREFIX86(_push_di), /* 0x57 */
+ PREFIX86(_pop_ax), /* 0x58 */
+ PREFIX86(_pop_cx), /* 0x59 */
+ PREFIX86(_pop_dx), /* 0x5a */
+ PREFIX86(_pop_bx), /* 0x5b */
+ PREFIX86(_pop_sp), /* 0x5c */
+ PREFIX86(_pop_bp), /* 0x5d */
+ PREFIX86(_pop_si), /* 0x5e */
+ PREFIX86(_pop_di), /* 0x5f */
+ PREFIX186(_pusha), /* 0x60 */
+ PREFIX186(_popa), /* 0x61 */
+ PREFIX186(_bound), /* 0x62 */
+ PREFIX286(_arpl), /* 0x63 */
+ PREFIX286(_invalid),
+ PREFIX286(_invalid),
+ PREFIX286(_invalid),
+ PREFIX286(_invalid),
+ PREFIX186(_push_d16), /* 0x68 */
+ PREFIX186(_imul_d16), /* 0x69 */
+ PREFIX186(_push_d8), /* 0x6a */
+ PREFIX186(_imul_d8), /* 0x6b */
+ PREFIX186(_insb), /* 0x6c */
+ PREFIX186(_insw), /* 0x6d */
+ PREFIX186(_outsb), /* 0x6e */
+ PREFIX186(_outsw), /* 0x6f */
+ PREFIX86(_jo), /* 0x70 */
+ PREFIX86(_jno), /* 0x71 */
+ PREFIX86(_jb), /* 0x72 */
+ PREFIX86(_jnb), /* 0x73 */
+ PREFIX86(_jz), /* 0x74 */
+ PREFIX86(_jnz), /* 0x75 */
+ PREFIX86(_jbe), /* 0x76 */
+ PREFIX86(_jnbe), /* 0x77 */
+ PREFIX86(_js), /* 0x78 */
+ PREFIX86(_jns), /* 0x79 */
+ PREFIX86(_jp), /* 0x7a */
+ PREFIX86(_jnp), /* 0x7b */
+ PREFIX86(_jl), /* 0x7c */
+ PREFIX86(_jnl), /* 0x7d */
+ PREFIX86(_jle), /* 0x7e */
+ PREFIX86(_jnle), /* 0x7f */
+ PREFIX86(_80pre), /* 0x80 */
+ PREFIX86(_81pre), /* 0x81 */
+ PREFIX86(_82pre), /* 0x82 */
+ PREFIX86(_83pre), /* 0x83 */
+ PREFIX86(_test_br8), /* 0x84 */
+ PREFIX86(_test_wr16), /* 0x85 */
+ PREFIX86(_xchg_br8), /* 0x86 */
+ PREFIX86(_xchg_wr16), /* 0x87 */
+ PREFIX86(_mov_br8), /* 0x88 */
+ PREFIX86(_mov_wr16), /* 0x89 */
+ PREFIX86(_mov_r8b), /* 0x8a */
+ PREFIX86(_mov_r16w), /* 0x8b */
+ PREFIX86(_mov_wsreg), /* 0x8c */
+ PREFIX86(_lea), /* 0x8d */
+ PREFIX86(_mov_sregw), /* 0x8e */
+ PREFIX86(_popw), /* 0x8f */
+ PREFIX86(_nop), /* 0x90 */
+ PREFIX86(_xchg_axcx), /* 0x91 */
+ PREFIX86(_xchg_axdx), /* 0x92 */
+ PREFIX86(_xchg_axbx), /* 0x93 */
+ PREFIX86(_xchg_axsp), /* 0x94 */
+ PREFIX86(_xchg_axbp), /* 0x95 */
+ PREFIX86(_xchg_axsi), /* 0x97 */
+ PREFIX86(_xchg_axdi), /* 0x97 */
+ PREFIX86(_cbw), /* 0x98 */
+ PREFIX86(_cwd), /* 0x99 */
+ PREFIX86(_call_far), /* 0x9a */
+ PREFIX86(_wait), /* 0x9b */
+ PREFIX86(_pushf), /* 0x9c */
+ PREFIX286(_popf), /* 0x9d */
+ PREFIX86(_sahf), /* 0x9e */
+ PREFIX86(_lahf), /* 0x9f */
+ PREFIX86(_mov_aldisp), /* 0xa0 */
+ PREFIX86(_mov_axdisp), /* 0xa1 */
+ PREFIX86(_mov_dispal), /* 0xa2 */
+ PREFIX86(_mov_dispax), /* 0xa3 */
+ PREFIX86(_movsb), /* 0xa4 */
+ PREFIX86(_movsw), /* 0xa5 */
+ PREFIX86(_cmpsb), /* 0xa6 */
+ PREFIX86(_cmpsw), /* 0xa7 */
+ PREFIX86(_test_ald8), /* 0xa8 */
+ PREFIX86(_test_axd16), /* 0xa9 */
+ PREFIX86(_stosb), /* 0xaa */
+ PREFIX86(_stosw), /* 0xab */
+ PREFIX86(_lodsb), /* 0xac */
+ PREFIX86(_lodsw), /* 0xad */
+ PREFIX86(_scasb), /* 0xae */
+ PREFIX86(_scasw), /* 0xaf */
+ PREFIX86(_mov_ald8), /* 0xb0 */
+ PREFIX86(_mov_cld8), /* 0xb1 */
+ PREFIX86(_mov_dld8), /* 0xb2 */
+ PREFIX86(_mov_bld8), /* 0xb3 */
+ PREFIX86(_mov_ahd8), /* 0xb4 */
+ PREFIX86(_mov_chd8), /* 0xb5 */
+ PREFIX86(_mov_dhd8), /* 0xb6 */
+ PREFIX86(_mov_bhd8), /* 0xb7 */
+ PREFIX86(_mov_axd16), /* 0xb8 */
+ PREFIX86(_mov_cxd16), /* 0xb9 */
+ PREFIX86(_mov_dxd16), /* 0xba */
+ PREFIX86(_mov_bxd16), /* 0xbb */
+ PREFIX86(_mov_spd16), /* 0xbc */
+ PREFIX86(_mov_bpd16), /* 0xbd */
+ PREFIX86(_mov_sid16), /* 0xbe */
+ PREFIX86(_mov_did16), /* 0xbf */
+ PREFIX186(_rotshft_bd8), /* 0xc0 */
+ PREFIX186(_rotshft_wd8), /* 0xc1 */
+ PREFIX86(_ret_d16), /* 0xc2 */
+ PREFIX86(_ret), /* 0xc3 */
+ PREFIX86(_les_dw), /* 0xc4 */
+ PREFIX86(_lds_dw), /* 0xc5 */
+ PREFIX86(_mov_bd8), /* 0xc6 */
+ PREFIX86(_mov_wd16), /* 0xc7 */
+ PREFIX186(_enter), /* 0xc8 */
+ PREFIX186(_leave), /* 0xc9 */
+ PREFIX286(_retf_d16), /* 0xca */
+ PREFIX286(_retf), /* 0xcb */
+ PREFIX86(_int3), /* 0xcc */
+ PREFIX86(_int), /* 0xcd */
+ PREFIX86(_into), /* 0xce */
+ PREFIX286(_iret), /* 0xcf */
+ PREFIX86(_rotshft_b), /* 0xd0 */
+ PREFIX86(_rotshft_w), /* 0xd1 */
+ PREFIX186(_rotshft_bcl), /* 0xd2 */
+ PREFIX186(_rotshft_wcl), /* 0xd3 */
+ PREFIX86(_aam), /* 0xd4 */
+ PREFIX86(_aad), /* 0xd5 */
+ PREFIX286(_invalid),
+ PREFIX86(_xlat), /* 0xd7 */
+ PREFIX286(_escape), /* 0xd8 */
+ PREFIX286(_escape), /* 0xd9 */
+ PREFIX286(_escape), /* 0xda */
+ PREFIX286(_escape), /* 0xdb */
+ PREFIX286(_escape), /* 0xdc */
+ PREFIX286(_escape), /* 0xdd */
+ PREFIX286(_escape), /* 0xde */
+ PREFIX286(_escape_7), /* 0xdf */
+ PREFIX86(_loopne), /* 0xe0 */
+ PREFIX86(_loope), /* 0xe1 */
+ PREFIX86(_loop), /* 0xe2 */
+ PREFIX86(_jcxz), /* 0xe3 */
+ PREFIX86(_inal), /* 0xe4 */
+ PREFIX86(_inax), /* 0xe5 */
+ PREFIX86(_outal), /* 0xe6 */
+ PREFIX86(_outax), /* 0xe7 */
+ PREFIX86(_call_d16), /* 0xe8 */
+ PREFIX86(_jmp_d16), /* 0xe9 */
+ PREFIX86(_jmp_far), /* 0xea */
+ PREFIX86(_jmp_d8), /* 0xeb */
+ PREFIX86(_inaldx), /* 0xec */
+ PREFIX86(_inaxdx), /* 0xed */
+ PREFIX86(_outdxal), /* 0xee */
+ PREFIX86(_outdxax), /* 0xef */
+ PREFIX86(_lock), /* 0xf0 */
+ PREFIX286(_invalid), /* 0xf1 */
+ PREFIX186(_repne), /* 0xf2 */
+ PREFIX186(_repe), /* 0xf3 */
+ PREFIX86(_hlt), /* 0xf4 */
+ PREFIX86(_cmc), /* 0xf5 */
+ PREFIX86(_f6pre), /* 0xf6 */
+ PREFIX86(_f7pre), /* 0xf7 */
+ PREFIX86(_clc), /* 0xf8 */
+ PREFIX86(_stc), /* 0xf9 */
+ PREFIX86(_cli), /* 0xfa */
+ PREFIX86(_sti), /* 0xfb */
+ PREFIX86(_cld), /* 0xfc */
+ PREFIX86(_std), /* 0xfd */
+ PREFIX86(_fepre), /* 0xfe */
+ PREFIX86(_ffpre) /* 0xff */
};
#if defined(BIGCASE) && !defined(RS6000)
- /* Some compilers cannot handle large case statements */
+ /* Some compilers cannot handle large case statements */
#define TABLE286 \
switch(FETCHOP)\
{\
diff --git a/src/emu/cpu/i86/table86.h b/src/emu/cpu/i86/table86.h
index b5b9be110a2..23eca7ff259 100644
--- a/src/emu/cpu/i86/table86.h
+++ b/src/emu/cpu/i86/table86.h
@@ -1,265 +1,265 @@
static void (*const PREFIX86(_instruction)[256])(i8086_state *cpustate) =
{
- PREFIX86(_add_br8), /* 0x00 */
- PREFIX86(_add_wr16), /* 0x01 */
- PREFIX86(_add_r8b), /* 0x02 */
- PREFIX86(_add_r16w), /* 0x03 */
- PREFIX86(_add_ald8), /* 0x04 */
- PREFIX86(_add_axd16), /* 0x05 */
- PREFIX86(_push_es), /* 0x06 */
- PREFIX86(_pop_es), /* 0x07 */
- PREFIX86(_or_br8), /* 0x08 */
- PREFIX86(_or_wr16), /* 0x09 */
- PREFIX86(_or_r8b), /* 0x0a */
- PREFIX86(_or_r16w), /* 0x0b */
- PREFIX86(_or_ald8), /* 0x0c */
- PREFIX86(_or_axd16), /* 0x0d */
- PREFIX86(_push_cs), /* 0x0e */
- PREFIX86(_pop_cs), /* 0x0f */
- PREFIX86(_adc_br8), /* 0x10 */
- PREFIX86(_adc_wr16), /* 0x11 */
- PREFIX86(_adc_r8b), /* 0x12 */
- PREFIX86(_adc_r16w), /* 0x13 */
- PREFIX86(_adc_ald8), /* 0x14 */
- PREFIX86(_adc_axd16), /* 0x15 */
- PREFIX86(_push_ss), /* 0x16 */
- PREFIX86(_pop_ss), /* 0x17 */
- PREFIX86(_sbb_br8), /* 0x18 */
- PREFIX86(_sbb_wr16), /* 0x19 */
- PREFIX86(_sbb_r8b), /* 0x1a */
- PREFIX86(_sbb_r16w), /* 0x1b */
- PREFIX86(_sbb_ald8), /* 0x1c */
- PREFIX86(_sbb_axd16), /* 0x1d */
- PREFIX86(_push_ds), /* 0x1e */
- PREFIX86(_pop_ds), /* 0x1f */
- PREFIX86(_and_br8), /* 0x20 */
- PREFIX86(_and_wr16), /* 0x21 */
- PREFIX86(_and_r8b), /* 0x22 */
- PREFIX86(_and_r16w), /* 0x23 */
- PREFIX86(_and_ald8), /* 0x24 */
- PREFIX86(_and_axd16), /* 0x25 */
- PREFIX86(_es), /* 0x26 */
- PREFIX86(_daa), /* 0x27 */
- PREFIX86(_sub_br8), /* 0x28 */
- PREFIX86(_sub_wr16), /* 0x29 */
- PREFIX86(_sub_r8b), /* 0x2a */
- PREFIX86(_sub_r16w), /* 0x2b */
- PREFIX86(_sub_ald8), /* 0x2c */
- PREFIX86(_sub_axd16), /* 0x2d */
- PREFIX86(_cs), /* 0x2e */
- PREFIX86(_das), /* 0x2f */
- PREFIX86(_xor_br8), /* 0x30 */
- PREFIX86(_xor_wr16), /* 0x31 */
- PREFIX86(_xor_r8b), /* 0x32 */
- PREFIX86(_xor_r16w), /* 0x33 */
- PREFIX86(_xor_ald8), /* 0x34 */
- PREFIX86(_xor_axd16), /* 0x35 */
- PREFIX86(_ss), /* 0x36 */
- PREFIX86(_aaa), /* 0x37 */
- PREFIX86(_cmp_br8), /* 0x38 */
- PREFIX86(_cmp_wr16), /* 0x39 */
- PREFIX86(_cmp_r8b), /* 0x3a */
- PREFIX86(_cmp_r16w), /* 0x3b */
- PREFIX86(_cmp_ald8), /* 0x3c */
- PREFIX86(_cmp_axd16), /* 0x3d */
- PREFIX86(_ds), /* 0x3e */
- PREFIX86(_aas), /* 0x3f */
- PREFIX86(_inc_ax), /* 0x40 */
- PREFIX86(_inc_cx), /* 0x41 */
- PREFIX86(_inc_dx), /* 0x42 */
- PREFIX86(_inc_bx), /* 0x43 */
- PREFIX86(_inc_sp), /* 0x44 */
- PREFIX86(_inc_bp), /* 0x45 */
- PREFIX86(_inc_si), /* 0x46 */
- PREFIX86(_inc_di), /* 0x47 */
- PREFIX86(_dec_ax), /* 0x48 */
- PREFIX86(_dec_cx), /* 0x49 */
- PREFIX86(_dec_dx), /* 0x4a */
- PREFIX86(_dec_bx), /* 0x4b */
- PREFIX86(_dec_sp), /* 0x4c */
- PREFIX86(_dec_bp), /* 0x4d */
- PREFIX86(_dec_si), /* 0x4e */
- PREFIX86(_dec_di), /* 0x4f */
- PREFIX86(_push_ax), /* 0x50 */
- PREFIX86(_push_cx), /* 0x51 */
- PREFIX86(_push_dx), /* 0x52 */
- PREFIX86(_push_bx), /* 0x53 */
- PREFIX86(_push_sp), /* 0x54 */
- PREFIX86(_push_bp), /* 0x55 */
- PREFIX86(_push_si), /* 0x56 */
- PREFIX86(_push_di), /* 0x57 */
- PREFIX86(_pop_ax), /* 0x58 */
- PREFIX86(_pop_cx), /* 0x59 */
- PREFIX86(_pop_dx), /* 0x5a */
- PREFIX86(_pop_bx), /* 0x5b */
- PREFIX86(_pop_sp), /* 0x5c */
- PREFIX86(_pop_bp), /* 0x5d */
- PREFIX86(_pop_si), /* 0x5e */
- PREFIX86(_pop_di), /* 0x5f */
- PREFIX86(_invalid_2b), // PREFIX86(_pusha), /* 0x60 */
- PREFIX86(_invalid_2b), // PREFIX86(_popa), /* 0x61 */
- PREFIX86(_invalid_2b), // PREFIX86(_bound), /* 0x62 */
- PREFIX86(_invalid_2b),
- PREFIX86(_invalid_2b),
- PREFIX86(_invalid_2b),
- PREFIX86(_invalid_2b),
- PREFIX86(_invalid_2b),
- PREFIX86(_invalid_2b), //i_push_d16), /* 0x68 */
- PREFIX86(_invalid_2b), //i_imul_d16), /* 0x69 */
- PREFIX86(_invalid_2b), //i_push_d8), /* 0x6a */
- PREFIX86(_invalid_2b), //i_imul_d8), /* 0x6b */
- PREFIX86(_invalid_2b), //i_insb), /* 0x6c */
- PREFIX86(_invalid_2b), //i_insw), /* 0x6d */
- PREFIX86(_invalid_2b), //i_outsb), /* 0x6e */
- PREFIX86(_invalid_2b), //i_outsw), /* 0x6f */
- PREFIX86(_jo), /* 0x70 */
- PREFIX86(_jno), /* 0x71 */
- PREFIX86(_jb), /* 0x72 */
- PREFIX86(_jnb), /* 0x73 */
- PREFIX86(_jz), /* 0x74 */
- PREFIX86(_jnz), /* 0x75 */
- PREFIX86(_jbe), /* 0x76 */
- PREFIX86(_jnbe), /* 0x77 */
- PREFIX86(_js), /* 0x78 */
- PREFIX86(_jns), /* 0x79 */
- PREFIX86(_jp), /* 0x7a */
- PREFIX86(_jnp), /* 0x7b */
- PREFIX86(_jl), /* 0x7c */
- PREFIX86(_jnl), /* 0x7d */
- PREFIX86(_jle), /* 0x7e */
- PREFIX86(_jnle), /* 0x7f */
- PREFIX86(_80pre), /* 0x80 */
- PREFIX86(_81pre), /* 0x81 */
- PREFIX86(_82pre), /* 0x82 */
- PREFIX86(_83pre), /* 0x83 */
- PREFIX86(_test_br8), /* 0x84 */
- PREFIX86(_test_wr16), /* 0x85 */
- PREFIX86(_xchg_br8), /* 0x86 */
- PREFIX86(_xchg_wr16), /* 0x87 */
- PREFIX86(_mov_br8), /* 0x88 */
- PREFIX86(_mov_wr16), /* 0x89 */
- PREFIX86(_mov_r8b), /* 0x8a */
- PREFIX86(_mov_r16w), /* 0x8b */
- PREFIX86(_mov_wsreg), /* 0x8c */
- PREFIX86(_lea), /* 0x8d */
- PREFIX86(_mov_sregw), /* 0x8e */
- PREFIX86(_popw), /* 0x8f */
- PREFIX86(_nop), /* 0x90 */
- PREFIX86(_xchg_axcx), /* 0x91 */
- PREFIX86(_xchg_axdx), /* 0x92 */
- PREFIX86(_xchg_axbx), /* 0x93 */
- PREFIX86(_xchg_axsp), /* 0x94 */
- PREFIX86(_xchg_axbp), /* 0x95 */
- PREFIX86(_xchg_axsi), /* 0x97 */
- PREFIX86(_xchg_axdi), /* 0x97 */
- PREFIX86(_cbw), /* 0x98 */
- PREFIX86(_cwd), /* 0x99 */
- PREFIX86(_call_far), /* 0x9a */
- PREFIX86(_wait), /* 0x9b */
- PREFIX86(_pushf), /* 0x9c */
- PREFIX86(_popf), /* 0x9d */
- PREFIX86(_sahf), /* 0x9e */
- PREFIX86(_lahf), /* 0x9f */
- PREFIX86(_mov_aldisp), /* 0xa0 */
- PREFIX86(_mov_axdisp), /* 0xa1 */
- PREFIX86(_mov_dispal), /* 0xa2 */
- PREFIX86(_mov_dispax), /* 0xa3 */
- PREFIX86(_movsb), /* 0xa4 */
- PREFIX86(_movsw), /* 0xa5 */
- PREFIX86(_cmpsb), /* 0xa6 */
- PREFIX86(_cmpsw), /* 0xa7 */
- PREFIX86(_test_ald8), /* 0xa8 */
- PREFIX86(_test_axd16), /* 0xa9 */
- PREFIX86(_stosb), /* 0xaa */
- PREFIX86(_stosw), /* 0xab */
- PREFIX86(_lodsb), /* 0xac */
- PREFIX86(_lodsw), /* 0xad */
- PREFIX86(_scasb), /* 0xae */
- PREFIX86(_scasw), /* 0xaf */
- PREFIX86(_mov_ald8), /* 0xb0 */
- PREFIX86(_mov_cld8), /* 0xb1 */
- PREFIX86(_mov_dld8), /* 0xb2 */
- PREFIX86(_mov_bld8), /* 0xb3 */
- PREFIX86(_mov_ahd8), /* 0xb4 */
- PREFIX86(_mov_chd8), /* 0xb5 */
- PREFIX86(_mov_dhd8), /* 0xb6 */
- PREFIX86(_mov_bhd8), /* 0xb7 */
- PREFIX86(_mov_axd16), /* 0xb8 */
- PREFIX86(_mov_cxd16), /* 0xb9 */
- PREFIX86(_mov_dxd16), /* 0xba */
- PREFIX86(_mov_bxd16), /* 0xbb */
- PREFIX86(_mov_spd16), /* 0xbc */
- PREFIX86(_mov_bpd16), /* 0xbd */
- PREFIX86(_mov_sid16), /* 0xbe */
- PREFIX86(_mov_did16), /* 0xbf */
- PREFIX86(_invalid), // PREFIX86(_rotshft_bd8), /* 0xc0 */
- PREFIX86(_invalid), // PREFIX86(_rotshft_wd8), /* 0xc1 */
- PREFIX86(_ret_d16), /* 0xc2 */
- PREFIX86(_ret), /* 0xc3 */
- PREFIX86(_les_dw), /* 0xc4 */
- PREFIX86(_lds_dw), /* 0xc5 */
- PREFIX86(_mov_bd8), /* 0xc6 */
- PREFIX86(_mov_wd16), /* 0xc7 */
- PREFIX86(_invalid), //i_enter), /* 0xc8 */
- PREFIX86(_invalid), //leave), /* 0xc9 */
- PREFIX86(_retf_d16), /* 0xca */
- PREFIX86(_retf), /* 0xcb */
- PREFIX86(_int3), /* 0xcc */
- PREFIX86(_int), /* 0xcd */
- PREFIX86(_into), /* 0xce */
- PREFIX86(_iret), /* 0xcf */
- PREFIX86(_rotshft_b), /* 0xd0 */
- PREFIX86(_rotshft_w), /* 0xd1 */
- PREFIX86(_rotshft_bcl), /* 0xd2 */
- PREFIX86(_rotshft_wcl), /* 0xd3 */
- PREFIX86(_aam), /* 0xd4 */
- PREFIX86(_aad), /* 0xd5 */
- PREFIX86(_invalid),
- PREFIX86(_xlat), /* 0xd7 */
- PREFIX86(_escape), /* 0xd8 */
- PREFIX86(_escape), /* 0xd9 */
- PREFIX86(_escape), /* 0xda */
- PREFIX86(_escape), /* 0xdb */
- PREFIX86(_escape), /* 0xdc */
- PREFIX86(_escape), /* 0xdd */
- PREFIX86(_escape), /* 0xde */
- PREFIX86(_escape), /* 0xdf */
- PREFIX86(_loopne), /* 0xe0 */
- PREFIX86(_loope), /* 0xe1 */
- PREFIX86(_loop), /* 0xe2 */
- PREFIX86(_jcxz), /* 0xe3 */
- PREFIX86(_inal), /* 0xe4 */
- PREFIX86(_inax), /* 0xe5 */
- PREFIX86(_outal), /* 0xe6 */
- PREFIX86(_outax), /* 0xe7 */
- PREFIX86(_call_d16), /* 0xe8 */
- PREFIX86(_jmp_d16), /* 0xe9 */
- PREFIX86(_jmp_far), /* 0xea */
- PREFIX86(_jmp_d8), /* 0xeb */
- PREFIX86(_inaldx), /* 0xec */
- PREFIX86(_inaxdx), /* 0xed */
- PREFIX86(_outdxal), /* 0xee */
- PREFIX86(_outdxax), /* 0xef */
- PREFIX86(_lock), /* 0xf0 */
- PREFIX86(_invalid), /* 0xf1 */
- PREFIX86(_repne), /* 0xf2 */
- PREFIX86(_repe), /* 0xf3 */
- PREFIX86(_hlt), /* 0xf4 */
- PREFIX86(_cmc), /* 0xf5 */
- PREFIX86(_f6pre), /* 0xf6 */
- PREFIX86(_f7pre), /* 0xf7 */
- PREFIX86(_clc), /* 0xf8 */
- PREFIX86(_stc), /* 0xf9 */
- PREFIX86(_cli), /* 0xfa */
- PREFIX86(_sti), /* 0xfb */
- PREFIX86(_cld), /* 0xfc */
- PREFIX86(_std), /* 0xfd */
- PREFIX86(_fepre), /* 0xfe */
- PREFIX86(_ffpre) /* 0xff */
+ PREFIX86(_add_br8), /* 0x00 */
+ PREFIX86(_add_wr16), /* 0x01 */
+ PREFIX86(_add_r8b), /* 0x02 */
+ PREFIX86(_add_r16w), /* 0x03 */
+ PREFIX86(_add_ald8), /* 0x04 */
+ PREFIX86(_add_axd16), /* 0x05 */
+ PREFIX86(_push_es), /* 0x06 */
+ PREFIX86(_pop_es), /* 0x07 */
+ PREFIX86(_or_br8), /* 0x08 */
+ PREFIX86(_or_wr16), /* 0x09 */
+ PREFIX86(_or_r8b), /* 0x0a */
+ PREFIX86(_or_r16w), /* 0x0b */
+ PREFIX86(_or_ald8), /* 0x0c */
+ PREFIX86(_or_axd16), /* 0x0d */
+ PREFIX86(_push_cs), /* 0x0e */
+ PREFIX86(_pop_cs), /* 0x0f */
+ PREFIX86(_adc_br8), /* 0x10 */
+ PREFIX86(_adc_wr16), /* 0x11 */
+ PREFIX86(_adc_r8b), /* 0x12 */
+ PREFIX86(_adc_r16w), /* 0x13 */
+ PREFIX86(_adc_ald8), /* 0x14 */
+ PREFIX86(_adc_axd16), /* 0x15 */
+ PREFIX86(_push_ss), /* 0x16 */
+ PREFIX86(_pop_ss), /* 0x17 */
+ PREFIX86(_sbb_br8), /* 0x18 */
+ PREFIX86(_sbb_wr16), /* 0x19 */
+ PREFIX86(_sbb_r8b), /* 0x1a */
+ PREFIX86(_sbb_r16w), /* 0x1b */
+ PREFIX86(_sbb_ald8), /* 0x1c */
+ PREFIX86(_sbb_axd16), /* 0x1d */
+ PREFIX86(_push_ds), /* 0x1e */
+ PREFIX86(_pop_ds), /* 0x1f */
+ PREFIX86(_and_br8), /* 0x20 */
+ PREFIX86(_and_wr16), /* 0x21 */
+ PREFIX86(_and_r8b), /* 0x22 */
+ PREFIX86(_and_r16w), /* 0x23 */
+ PREFIX86(_and_ald8), /* 0x24 */
+ PREFIX86(_and_axd16), /* 0x25 */
+ PREFIX86(_es), /* 0x26 */
+ PREFIX86(_daa), /* 0x27 */
+ PREFIX86(_sub_br8), /* 0x28 */
+ PREFIX86(_sub_wr16), /* 0x29 */
+ PREFIX86(_sub_r8b), /* 0x2a */
+ PREFIX86(_sub_r16w), /* 0x2b */
+ PREFIX86(_sub_ald8), /* 0x2c */
+ PREFIX86(_sub_axd16), /* 0x2d */
+ PREFIX86(_cs), /* 0x2e */
+ PREFIX86(_das), /* 0x2f */
+ PREFIX86(_xor_br8), /* 0x30 */
+ PREFIX86(_xor_wr16), /* 0x31 */
+ PREFIX86(_xor_r8b), /* 0x32 */
+ PREFIX86(_xor_r16w), /* 0x33 */
+ PREFIX86(_xor_ald8), /* 0x34 */
+ PREFIX86(_xor_axd16), /* 0x35 */
+ PREFIX86(_ss), /* 0x36 */
+ PREFIX86(_aaa), /* 0x37 */
+ PREFIX86(_cmp_br8), /* 0x38 */
+ PREFIX86(_cmp_wr16), /* 0x39 */
+ PREFIX86(_cmp_r8b), /* 0x3a */
+ PREFIX86(_cmp_r16w), /* 0x3b */
+ PREFIX86(_cmp_ald8), /* 0x3c */
+ PREFIX86(_cmp_axd16), /* 0x3d */
+ PREFIX86(_ds), /* 0x3e */
+ PREFIX86(_aas), /* 0x3f */
+ PREFIX86(_inc_ax), /* 0x40 */
+ PREFIX86(_inc_cx), /* 0x41 */
+ PREFIX86(_inc_dx), /* 0x42 */
+ PREFIX86(_inc_bx), /* 0x43 */
+ PREFIX86(_inc_sp), /* 0x44 */
+ PREFIX86(_inc_bp), /* 0x45 */
+ PREFIX86(_inc_si), /* 0x46 */
+ PREFIX86(_inc_di), /* 0x47 */
+ PREFIX86(_dec_ax), /* 0x48 */
+ PREFIX86(_dec_cx), /* 0x49 */
+ PREFIX86(_dec_dx), /* 0x4a */
+ PREFIX86(_dec_bx), /* 0x4b */
+ PREFIX86(_dec_sp), /* 0x4c */
+ PREFIX86(_dec_bp), /* 0x4d */
+ PREFIX86(_dec_si), /* 0x4e */
+ PREFIX86(_dec_di), /* 0x4f */
+ PREFIX86(_push_ax), /* 0x50 */
+ PREFIX86(_push_cx), /* 0x51 */
+ PREFIX86(_push_dx), /* 0x52 */
+ PREFIX86(_push_bx), /* 0x53 */
+ PREFIX86(_push_sp), /* 0x54 */
+ PREFIX86(_push_bp), /* 0x55 */
+ PREFIX86(_push_si), /* 0x56 */
+ PREFIX86(_push_di), /* 0x57 */
+ PREFIX86(_pop_ax), /* 0x58 */
+ PREFIX86(_pop_cx), /* 0x59 */
+ PREFIX86(_pop_dx), /* 0x5a */
+ PREFIX86(_pop_bx), /* 0x5b */
+ PREFIX86(_pop_sp), /* 0x5c */
+ PREFIX86(_pop_bp), /* 0x5d */
+ PREFIX86(_pop_si), /* 0x5e */
+ PREFIX86(_pop_di), /* 0x5f */
+ PREFIX86(_invalid_2b), // PREFIX86(_pusha), /* 0x60 */
+ PREFIX86(_invalid_2b), // PREFIX86(_popa), /* 0x61 */
+ PREFIX86(_invalid_2b), // PREFIX86(_bound), /* 0x62 */
+ PREFIX86(_invalid_2b),
+ PREFIX86(_invalid_2b),
+ PREFIX86(_invalid_2b),
+ PREFIX86(_invalid_2b),
+ PREFIX86(_invalid_2b),
+ PREFIX86(_invalid_2b), //i_push_d16), /* 0x68 */
+ PREFIX86(_invalid_2b), //i_imul_d16), /* 0x69 */
+ PREFIX86(_invalid_2b), //i_push_d8), /* 0x6a */
+ PREFIX86(_invalid_2b), //i_imul_d8), /* 0x6b */
+ PREFIX86(_invalid_2b), //i_insb), /* 0x6c */
+ PREFIX86(_invalid_2b), //i_insw), /* 0x6d */
+ PREFIX86(_invalid_2b), //i_outsb), /* 0x6e */
+ PREFIX86(_invalid_2b), //i_outsw), /* 0x6f */
+ PREFIX86(_jo), /* 0x70 */
+ PREFIX86(_jno), /* 0x71 */
+ PREFIX86(_jb), /* 0x72 */
+ PREFIX86(_jnb), /* 0x73 */
+ PREFIX86(_jz), /* 0x74 */
+ PREFIX86(_jnz), /* 0x75 */
+ PREFIX86(_jbe), /* 0x76 */
+ PREFIX86(_jnbe), /* 0x77 */
+ PREFIX86(_js), /* 0x78 */
+ PREFIX86(_jns), /* 0x79 */
+ PREFIX86(_jp), /* 0x7a */
+ PREFIX86(_jnp), /* 0x7b */
+ PREFIX86(_jl), /* 0x7c */
+ PREFIX86(_jnl), /* 0x7d */
+ PREFIX86(_jle), /* 0x7e */
+ PREFIX86(_jnle), /* 0x7f */
+ PREFIX86(_80pre), /* 0x80 */
+ PREFIX86(_81pre), /* 0x81 */
+ PREFIX86(_82pre), /* 0x82 */
+ PREFIX86(_83pre), /* 0x83 */
+ PREFIX86(_test_br8), /* 0x84 */
+ PREFIX86(_test_wr16), /* 0x85 */
+ PREFIX86(_xchg_br8), /* 0x86 */
+ PREFIX86(_xchg_wr16), /* 0x87 */
+ PREFIX86(_mov_br8), /* 0x88 */
+ PREFIX86(_mov_wr16), /* 0x89 */
+ PREFIX86(_mov_r8b), /* 0x8a */
+ PREFIX86(_mov_r16w), /* 0x8b */
+ PREFIX86(_mov_wsreg), /* 0x8c */
+ PREFIX86(_lea), /* 0x8d */
+ PREFIX86(_mov_sregw), /* 0x8e */
+ PREFIX86(_popw), /* 0x8f */
+ PREFIX86(_nop), /* 0x90 */
+ PREFIX86(_xchg_axcx), /* 0x91 */
+ PREFIX86(_xchg_axdx), /* 0x92 */
+ PREFIX86(_xchg_axbx), /* 0x93 */
+ PREFIX86(_xchg_axsp), /* 0x94 */
+ PREFIX86(_xchg_axbp), /* 0x95 */
+ PREFIX86(_xchg_axsi), /* 0x97 */
+ PREFIX86(_xchg_axdi), /* 0x97 */
+ PREFIX86(_cbw), /* 0x98 */
+ PREFIX86(_cwd), /* 0x99 */
+ PREFIX86(_call_far), /* 0x9a */
+ PREFIX86(_wait), /* 0x9b */
+ PREFIX86(_pushf), /* 0x9c */
+ PREFIX86(_popf), /* 0x9d */
+ PREFIX86(_sahf), /* 0x9e */
+ PREFIX86(_lahf), /* 0x9f */
+ PREFIX86(_mov_aldisp), /* 0xa0 */
+ PREFIX86(_mov_axdisp), /* 0xa1 */
+ PREFIX86(_mov_dispal), /* 0xa2 */
+ PREFIX86(_mov_dispax), /* 0xa3 */
+ PREFIX86(_movsb), /* 0xa4 */
+ PREFIX86(_movsw), /* 0xa5 */
+ PREFIX86(_cmpsb), /* 0xa6 */
+ PREFIX86(_cmpsw), /* 0xa7 */
+ PREFIX86(_test_ald8), /* 0xa8 */
+ PREFIX86(_test_axd16), /* 0xa9 */
+ PREFIX86(_stosb), /* 0xaa */
+ PREFIX86(_stosw), /* 0xab */
+ PREFIX86(_lodsb), /* 0xac */
+ PREFIX86(_lodsw), /* 0xad */
+ PREFIX86(_scasb), /* 0xae */
+ PREFIX86(_scasw), /* 0xaf */
+ PREFIX86(_mov_ald8), /* 0xb0 */
+ PREFIX86(_mov_cld8), /* 0xb1 */
+ PREFIX86(_mov_dld8), /* 0xb2 */
+ PREFIX86(_mov_bld8), /* 0xb3 */
+ PREFIX86(_mov_ahd8), /* 0xb4 */
+ PREFIX86(_mov_chd8), /* 0xb5 */
+ PREFIX86(_mov_dhd8), /* 0xb6 */
+ PREFIX86(_mov_bhd8), /* 0xb7 */
+ PREFIX86(_mov_axd16), /* 0xb8 */
+ PREFIX86(_mov_cxd16), /* 0xb9 */
+ PREFIX86(_mov_dxd16), /* 0xba */
+ PREFIX86(_mov_bxd16), /* 0xbb */
+ PREFIX86(_mov_spd16), /* 0xbc */
+ PREFIX86(_mov_bpd16), /* 0xbd */
+ PREFIX86(_mov_sid16), /* 0xbe */
+ PREFIX86(_mov_did16), /* 0xbf */
+ PREFIX86(_invalid), // PREFIX86(_rotshft_bd8), /* 0xc0 */
+ PREFIX86(_invalid), // PREFIX86(_rotshft_wd8), /* 0xc1 */
+ PREFIX86(_ret_d16), /* 0xc2 */
+ PREFIX86(_ret), /* 0xc3 */
+ PREFIX86(_les_dw), /* 0xc4 */
+ PREFIX86(_lds_dw), /* 0xc5 */
+ PREFIX86(_mov_bd8), /* 0xc6 */
+ PREFIX86(_mov_wd16), /* 0xc7 */
+ PREFIX86(_invalid), //i_enter), /* 0xc8 */
+ PREFIX86(_invalid), //leave), /* 0xc9 */
+ PREFIX86(_retf_d16), /* 0xca */
+ PREFIX86(_retf), /* 0xcb */
+ PREFIX86(_int3), /* 0xcc */
+ PREFIX86(_int), /* 0xcd */
+ PREFIX86(_into), /* 0xce */
+ PREFIX86(_iret), /* 0xcf */
+ PREFIX86(_rotshft_b), /* 0xd0 */
+ PREFIX86(_rotshft_w), /* 0xd1 */
+ PREFIX86(_rotshft_bcl), /* 0xd2 */
+ PREFIX86(_rotshft_wcl), /* 0xd3 */
+ PREFIX86(_aam), /* 0xd4 */
+ PREFIX86(_aad), /* 0xd5 */
+ PREFIX86(_invalid),
+ PREFIX86(_xlat), /* 0xd7 */
+ PREFIX86(_escape), /* 0xd8 */
+ PREFIX86(_escape), /* 0xd9 */
+ PREFIX86(_escape), /* 0xda */
+ PREFIX86(_escape), /* 0xdb */
+ PREFIX86(_escape), /* 0xdc */
+ PREFIX86(_escape), /* 0xdd */
+ PREFIX86(_escape), /* 0xde */
+ PREFIX86(_escape), /* 0xdf */
+ PREFIX86(_loopne), /* 0xe0 */
+ PREFIX86(_loope), /* 0xe1 */
+ PREFIX86(_loop), /* 0xe2 */
+ PREFIX86(_jcxz), /* 0xe3 */
+ PREFIX86(_inal), /* 0xe4 */
+ PREFIX86(_inax), /* 0xe5 */
+ PREFIX86(_outal), /* 0xe6 */
+ PREFIX86(_outax), /* 0xe7 */
+ PREFIX86(_call_d16), /* 0xe8 */
+ PREFIX86(_jmp_d16), /* 0xe9 */
+ PREFIX86(_jmp_far), /* 0xea */
+ PREFIX86(_jmp_d8), /* 0xeb */
+ PREFIX86(_inaldx), /* 0xec */
+ PREFIX86(_inaxdx), /* 0xed */
+ PREFIX86(_outdxal), /* 0xee */
+ PREFIX86(_outdxax), /* 0xef */
+ PREFIX86(_lock), /* 0xf0 */
+ PREFIX86(_invalid), /* 0xf1 */
+ PREFIX86(_repne), /* 0xf2 */
+ PREFIX86(_repe), /* 0xf3 */
+ PREFIX86(_hlt), /* 0xf4 */
+ PREFIX86(_cmc), /* 0xf5 */
+ PREFIX86(_f6pre), /* 0xf6 */
+ PREFIX86(_f7pre), /* 0xf7 */
+ PREFIX86(_clc), /* 0xf8 */
+ PREFIX86(_stc), /* 0xf9 */
+ PREFIX86(_cli), /* 0xfa */
+ PREFIX86(_sti), /* 0xfb */
+ PREFIX86(_cld), /* 0xfc */
+ PREFIX86(_std), /* 0xfd */
+ PREFIX86(_fepre), /* 0xfe */
+ PREFIX86(_ffpre) /* 0xff */
};
#if defined(BIGCASE) && !defined(RS6000)
- /* Some compilers cannot handle large case statements */
+ /* Some compilers cannot handle large case statements */
#define TABLE86 \
switch(FETCHOP)\
{\
@@ -359,22 +359,22 @@ static void (*const PREFIX86(_instruction)[256])(i8086_state *cpustate) =
case 0x5d: PREFIX86(_pop_bp)(cpustate); break;\
case 0x5e: PREFIX86(_pop_si)(cpustate); break;\
case 0x5f: PREFIX86(_pop_di)(cpustate); break;\
- case 0x60: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x61: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x62: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x60: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x61: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x62: PREFIX86(_invalid_2b)(cpustate); break;\
case 0x63: PREFIX86(_invalid_2b)(cpustate); break;\
case 0x64: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x65: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x65: PREFIX86(_invalid_2b)(cpustate); break;\
case 0x66: PREFIX86(_invalid_2b)(cpustate); break;\
case 0x67: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x68: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x69: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x6a: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x6b: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x6c: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x6d: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x6e: PREFIX86(_invalid_2b)(cpustate); break;\
- case 0x6f: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x68: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x69: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x6a: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x6b: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x6c: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x6d: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x6e: PREFIX86(_invalid_2b)(cpustate); break;\
+ case 0x6f: PREFIX86(_invalid_2b)(cpustate); break;\
case 0x70: PREFIX86(_jo)(cpustate); break;\
case 0x71: PREFIX86(_jno)(cpustate); break;\
case 0x72: PREFIX86(_jb)(cpustate); break;\
@@ -393,7 +393,7 @@ static void (*const PREFIX86(_instruction)[256])(i8086_state *cpustate) =
case 0x7f: PREFIX86(_jnle)(cpustate); break;\
case 0x80: PREFIX86(_80pre)(cpustate); break;\
case 0x81: PREFIX86(_81pre)(cpustate); break;\
- case 0x82: PREFIX86(_82pre)(cpustate); break;\
+ case 0x82: PREFIX86(_82pre)(cpustate); break;\
case 0x83: PREFIX86(_83pre)(cpustate); break;\
case 0x84: PREFIX86(_test_br8)(cpustate); break;\
case 0x85: PREFIX86(_test_wr16)(cpustate); break;\
@@ -455,26 +455,26 @@ static void (*const PREFIX86(_instruction)[256])(i8086_state *cpustate) =
case 0xbd: PREFIX86(_mov_bpd16)(cpustate); break;\
case 0xbe: PREFIX86(_mov_sid16)(cpustate); break;\
case 0xbf: PREFIX86(_mov_did16)(cpustate); break;\
- case 0xc0: PREFIX86(_invalid)(cpustate); break;\
- case 0xc1: PREFIX86(_invalid)(cpustate); break;\
+ case 0xc0: PREFIX86(_invalid)(cpustate); break;\
+ case 0xc1: PREFIX86(_invalid)(cpustate); break;\
case 0xc2: PREFIX86(_ret_d16)(cpustate); break;\
case 0xc3: PREFIX86(_ret)(cpustate); break;\
case 0xc4: PREFIX86(_les_dw)(cpustate); break;\
case 0xc5: PREFIX86(_lds_dw)(cpustate); break;\
case 0xc6: PREFIX86(_mov_bd8)(cpustate); break;\
case 0xc7: PREFIX86(_mov_wd16)(cpustate); break;\
- case 0xc8: PREFIX86(_invalid)(cpustate); break;\
- case 0xc9: PREFIX86(_invalid)(cpustate); break;\
+ case 0xc8: PREFIX86(_invalid)(cpustate); break;\
+ case 0xc9: PREFIX86(_invalid)(cpustate); break;\
case 0xca: PREFIX86(_retf_d16)(cpustate); break;\
case 0xcb: PREFIX86(_retf)(cpustate); break;\
case 0xcc: PREFIX86(_int3)(cpustate); break;\
case 0xcd: PREFIX86(_int)(cpustate); break;\
case 0xce: PREFIX86(_into)(cpustate); break;\
case 0xcf: PREFIX86(_iret)(cpustate); break;\
- case 0xd0: PREFIX86(_rotshft_b)(cpustate); break;\
- case 0xd1: PREFIX86(_rotshft_w)(cpustate); break;\
- case 0xd2: PREFIX86(_rotshft_bcl)(cpustate); break;\
- case 0xd3: PREFIX86(_rotshft_wcl)(cpustate); break;\
+ case 0xd0: PREFIX86(_rotshft_b)(cpustate); break;\
+ case 0xd1: PREFIX86(_rotshft_w)(cpustate); break;\
+ case 0xd2: PREFIX86(_rotshft_bcl)(cpustate); break;\
+ case 0xd3: PREFIX86(_rotshft_wcl)(cpustate); break;\
case 0xd4: PREFIX86(_aam)(cpustate); break;\
case 0xd5: PREFIX86(_aad)(cpustate); break;\
case 0xd6: PREFIX86(_invalid)(cpustate); break;\
diff --git a/src/emu/cpu/i860/i860.c b/src/emu/cpu/i860/i860.c
index 92cf61fea1c..a5fe46e9fba 100644
--- a/src/emu/cpu/i860/i860.c
+++ b/src/emu/cpu/i860/i860.c
@@ -59,9 +59,9 @@ static CPU_DISASSEMBLE( i860 )
/* Hard-coded little endian for now. */
return disasm_i860(buffer, pc, (oprom[0] << 0) |
- (oprom[1] << 8) |
- (oprom[2] << 16) |
- (oprom[3] << 24));
+ (oprom[1] << 8) |
+ (oprom[2] << 16) |
+ (oprom[3] << 24));
}
@@ -76,9 +76,9 @@ static CPU_DISASSEMBLE( i860 )
**************************************************************************/
#define CPU_SET_INFO_F(fnum) cpustate->frg[0+(4*fnum)] = (info->i & 0x000000ff); \
- cpustate->frg[1+(4*fnum)] = (info->i & 0x0000ff00) >> 8; \
- cpustate->frg[2+(4*fnum)] = (info->i & 0x00ff0000) >> 16; \
- cpustate->frg[3+(4*fnum)] = (info->i & 0xff000000) >> 24;
+ cpustate->frg[1+(4*fnum)] = (info->i & 0x0000ff00) >> 8; \
+ cpustate->frg[2+(4*fnum)] = (info->i & 0x00ff0000) >> 16; \
+ cpustate->frg[3+(4*fnum)] = (info->i & 0xff000000) >> 24;
static CPU_SET_INFO( i860 )
{
@@ -87,80 +87,80 @@ static CPU_SET_INFO( i860 )
switch(state)
{
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + I860_PC: cpustate->pc = info->i & 0xffffffff; break;
-
- case CPUINFO_INT_REGISTER + I860_FIR: cpustate->cregs[CR_FIR] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_PSR: cpustate->cregs[CR_PSR] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_DIRBASE: cpustate->cregs[CR_DIRBASE] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_DB: cpustate->cregs[CR_DB] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_FSR: cpustate->cregs[CR_FSR] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_EPSR: cpustate->cregs[CR_EPSR] = info->i & 0xffffffff; break;
-
- case CPUINFO_INT_REGISTER + I860_R0: cpustate->iregs[0] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R1: cpustate->iregs[1] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R2: cpustate->iregs[2] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R3: cpustate->iregs[3] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R4: cpustate->iregs[4] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R5: cpustate->iregs[5] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R6: cpustate->iregs[6] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R7: cpustate->iregs[7] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R8: cpustate->iregs[8] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R9: cpustate->iregs[9] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R10: cpustate->iregs[10] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R11: cpustate->iregs[11] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R12: cpustate->iregs[12] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R13: cpustate->iregs[13] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R14: cpustate->iregs[14] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R15: cpustate->iregs[15] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R16: cpustate->iregs[16] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R17: cpustate->iregs[17] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R18: cpustate->iregs[18] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R19: cpustate->iregs[19] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R20: cpustate->iregs[20] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R21: cpustate->iregs[21] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R22: cpustate->iregs[22] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R23: cpustate->iregs[23] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R24: cpustate->iregs[24] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R25: cpustate->iregs[25] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R26: cpustate->iregs[26] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R27: cpustate->iregs[27] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R28: cpustate->iregs[28] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R29: cpustate->iregs[29] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R30: cpustate->iregs[30] = info->i & 0xffffffff; break;
- case CPUINFO_INT_REGISTER + I860_R31: cpustate->iregs[31] = info->i & 0xffffffff; break;
-
- case CPUINFO_INT_REGISTER + I860_F0: CPU_SET_INFO_F(0); break;
- case CPUINFO_INT_REGISTER + I860_F1: CPU_SET_INFO_F(1); break;
- case CPUINFO_INT_REGISTER + I860_F2: CPU_SET_INFO_F(2); break;
- case CPUINFO_INT_REGISTER + I860_F3: CPU_SET_INFO_F(3); break;
- case CPUINFO_INT_REGISTER + I860_F4: CPU_SET_INFO_F(4); break;
- case CPUINFO_INT_REGISTER + I860_F5: CPU_SET_INFO_F(5); break;
- case CPUINFO_INT_REGISTER + I860_F6: CPU_SET_INFO_F(6); break;
- case CPUINFO_INT_REGISTER + I860_F7: CPU_SET_INFO_F(7); break;
- case CPUINFO_INT_REGISTER + I860_F8: CPU_SET_INFO_F(8); break;
- case CPUINFO_INT_REGISTER + I860_F9: CPU_SET_INFO_F(9); break;
- case CPUINFO_INT_REGISTER + I860_F10: CPU_SET_INFO_F(10); break;
- case CPUINFO_INT_REGISTER + I860_F11: CPU_SET_INFO_F(11); break;
- case CPUINFO_INT_REGISTER + I860_F12: CPU_SET_INFO_F(12); break;
- case CPUINFO_INT_REGISTER + I860_F13: CPU_SET_INFO_F(13); break;
- case CPUINFO_INT_REGISTER + I860_F14: CPU_SET_INFO_F(14); break;
- case CPUINFO_INT_REGISTER + I860_F15: CPU_SET_INFO_F(15); break;
- case CPUINFO_INT_REGISTER + I860_F16: CPU_SET_INFO_F(16); break;
- case CPUINFO_INT_REGISTER + I860_F17: CPU_SET_INFO_F(17); break;
- case CPUINFO_INT_REGISTER + I860_F18: CPU_SET_INFO_F(18); break;
- case CPUINFO_INT_REGISTER + I860_F19: CPU_SET_INFO_F(19); break;
- case CPUINFO_INT_REGISTER + I860_F20: CPU_SET_INFO_F(20); break;
- case CPUINFO_INT_REGISTER + I860_F21: CPU_SET_INFO_F(21); break;
- case CPUINFO_INT_REGISTER + I860_F22: CPU_SET_INFO_F(22); break;
- case CPUINFO_INT_REGISTER + I860_F23: CPU_SET_INFO_F(23); break;
- case CPUINFO_INT_REGISTER + I860_F24: CPU_SET_INFO_F(24); break;
- case CPUINFO_INT_REGISTER + I860_F25: CPU_SET_INFO_F(25); break;
- case CPUINFO_INT_REGISTER + I860_F26: CPU_SET_INFO_F(26); break;
- case CPUINFO_INT_REGISTER + I860_F27: CPU_SET_INFO_F(27); break;
- case CPUINFO_INT_REGISTER + I860_F28: CPU_SET_INFO_F(28); break;
- case CPUINFO_INT_REGISTER + I860_F29: CPU_SET_INFO_F(29); break;
- case CPUINFO_INT_REGISTER + I860_F30: CPU_SET_INFO_F(30); break;
- case CPUINFO_INT_REGISTER + I860_F31: CPU_SET_INFO_F(31); break;
+ case CPUINFO_INT_REGISTER + I860_PC: cpustate->pc = info->i & 0xffffffff; break;
+
+ case CPUINFO_INT_REGISTER + I860_FIR: cpustate->cregs[CR_FIR] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_PSR: cpustate->cregs[CR_PSR] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_DIRBASE: cpustate->cregs[CR_DIRBASE] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_DB: cpustate->cregs[CR_DB] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_FSR: cpustate->cregs[CR_FSR] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_EPSR: cpustate->cregs[CR_EPSR] = info->i & 0xffffffff; break;
+
+ case CPUINFO_INT_REGISTER + I860_R0: cpustate->iregs[0] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R1: cpustate->iregs[1] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R2: cpustate->iregs[2] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R3: cpustate->iregs[3] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R4: cpustate->iregs[4] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R5: cpustate->iregs[5] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R6: cpustate->iregs[6] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R7: cpustate->iregs[7] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R8: cpustate->iregs[8] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R9: cpustate->iregs[9] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R10: cpustate->iregs[10] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R11: cpustate->iregs[11] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R12: cpustate->iregs[12] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R13: cpustate->iregs[13] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R14: cpustate->iregs[14] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R15: cpustate->iregs[15] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R16: cpustate->iregs[16] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R17: cpustate->iregs[17] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R18: cpustate->iregs[18] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R19: cpustate->iregs[19] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R20: cpustate->iregs[20] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R21: cpustate->iregs[21] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R22: cpustate->iregs[22] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R23: cpustate->iregs[23] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R24: cpustate->iregs[24] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R25: cpustate->iregs[25] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R26: cpustate->iregs[26] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R27: cpustate->iregs[27] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R28: cpustate->iregs[28] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R29: cpustate->iregs[29] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R30: cpustate->iregs[30] = info->i & 0xffffffff; break;
+ case CPUINFO_INT_REGISTER + I860_R31: cpustate->iregs[31] = info->i & 0xffffffff; break;
+
+ case CPUINFO_INT_REGISTER + I860_F0: CPU_SET_INFO_F(0); break;
+ case CPUINFO_INT_REGISTER + I860_F1: CPU_SET_INFO_F(1); break;
+ case CPUINFO_INT_REGISTER + I860_F2: CPU_SET_INFO_F(2); break;
+ case CPUINFO_INT_REGISTER + I860_F3: CPU_SET_INFO_F(3); break;
+ case CPUINFO_INT_REGISTER + I860_F4: CPU_SET_INFO_F(4); break;
+ case CPUINFO_INT_REGISTER + I860_F5: CPU_SET_INFO_F(5); break;
+ case CPUINFO_INT_REGISTER + I860_F6: CPU_SET_INFO_F(6); break;
+ case CPUINFO_INT_REGISTER + I860_F7: CPU_SET_INFO_F(7); break;
+ case CPUINFO_INT_REGISTER + I860_F8: CPU_SET_INFO_F(8); break;
+ case CPUINFO_INT_REGISTER + I860_F9: CPU_SET_INFO_F(9); break;
+ case CPUINFO_INT_REGISTER + I860_F10: CPU_SET_INFO_F(10); break;
+ case CPUINFO_INT_REGISTER + I860_F11: CPU_SET_INFO_F(11); break;
+ case CPUINFO_INT_REGISTER + I860_F12: CPU_SET_INFO_F(12); break;
+ case CPUINFO_INT_REGISTER + I860_F13: CPU_SET_INFO_F(13); break;
+ case CPUINFO_INT_REGISTER + I860_F14: CPU_SET_INFO_F(14); break;
+ case CPUINFO_INT_REGISTER + I860_F15: CPU_SET_INFO_F(15); break;
+ case CPUINFO_INT_REGISTER + I860_F16: CPU_SET_INFO_F(16); break;
+ case CPUINFO_INT_REGISTER + I860_F17: CPU_SET_INFO_F(17); break;
+ case CPUINFO_INT_REGISTER + I860_F18: CPU_SET_INFO_F(18); break;
+ case CPUINFO_INT_REGISTER + I860_F19: CPU_SET_INFO_F(19); break;
+ case CPUINFO_INT_REGISTER + I860_F20: CPU_SET_INFO_F(20); break;
+ case CPUINFO_INT_REGISTER + I860_F21: CPU_SET_INFO_F(21); break;
+ case CPUINFO_INT_REGISTER + I860_F22: CPU_SET_INFO_F(22); break;
+ case CPUINFO_INT_REGISTER + I860_F23: CPU_SET_INFO_F(23); break;
+ case CPUINFO_INT_REGISTER + I860_F24: CPU_SET_INFO_F(24); break;
+ case CPUINFO_INT_REGISTER + I860_F25: CPU_SET_INFO_F(25); break;
+ case CPUINFO_INT_REGISTER + I860_F26: CPU_SET_INFO_F(26); break;
+ case CPUINFO_INT_REGISTER + I860_F27: CPU_SET_INFO_F(27); break;
+ case CPUINFO_INT_REGISTER + I860_F28: CPU_SET_INFO_F(28); break;
+ case CPUINFO_INT_REGISTER + I860_F29: CPU_SET_INFO_F(29); break;
+ case CPUINFO_INT_REGISTER + I860_F30: CPU_SET_INFO_F(30); break;
+ case CPUINFO_INT_REGISTER + I860_F31: CPU_SET_INFO_F(31); break;
}
}
@@ -170,9 +170,9 @@ static CPU_SET_INFO( i860 )
cpustate->frg[3+(4*fnum)] << 24)
#define CPU_GET_INFO_STR_F(fnum) (sprintf(info->s, "F%d : %08x", fnum, cpustate->frg[0+(4*fnum)] | \
- cpustate->frg[1+(4*fnum)] << 8 | \
- cpustate->frg[2+(4*fnum)] << 16 | \
- cpustate->frg[3+(4*fnum)] << 24))
+ cpustate->frg[1+(4*fnum)] << 8 | \
+ cpustate->frg[2+(4*fnum)] << 16 | \
+ cpustate->frg[3+(4*fnum)] << 24))
CPU_GET_INFO( i860 )
{
@@ -181,203 +181,203 @@ CPU_GET_INFO( i860 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i860_state_t); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0x00000000; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 8; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i860_state_t); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0x00000000; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 8; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + I860_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc; break;
-
- case CPUINFO_INT_REGISTER + I860_FIR: info->i = cpustate->cregs[CR_FIR]; break;
- case CPUINFO_INT_REGISTER + I860_PSR: info->i = cpustate->cregs[CR_PSR]; break;
- case CPUINFO_INT_REGISTER + I860_DIRBASE: info->i = cpustate->cregs[CR_DIRBASE]; break;
- case CPUINFO_INT_REGISTER + I860_DB: info->i = cpustate->cregs[CR_DB]; break;
- case CPUINFO_INT_REGISTER + I860_FSR: info->i = cpustate->cregs[CR_FSR]; break;
- case CPUINFO_INT_REGISTER + I860_EPSR: info->i = cpustate->cregs[CR_EPSR]; break;
-
- case CPUINFO_INT_REGISTER + I860_R0: info->i = cpustate->iregs[0]; break;
- case CPUINFO_INT_REGISTER + I860_R1: info->i = cpustate->iregs[1]; break;
- case CPUINFO_INT_REGISTER + I860_R2: info->i = cpustate->iregs[2]; break;
- case CPUINFO_INT_REGISTER + I860_R3: info->i = cpustate->iregs[3]; break;
- case CPUINFO_INT_REGISTER + I860_R4: info->i = cpustate->iregs[4]; break;
- case CPUINFO_INT_REGISTER + I860_R5: info->i = cpustate->iregs[5]; break;
- case CPUINFO_INT_REGISTER + I860_R6: info->i = cpustate->iregs[6]; break;
- case CPUINFO_INT_REGISTER + I860_R7: info->i = cpustate->iregs[7]; break;
- case CPUINFO_INT_REGISTER + I860_R8: info->i = cpustate->iregs[8]; break;
- case CPUINFO_INT_REGISTER + I860_R9: info->i = cpustate->iregs[9]; break;
- case CPUINFO_INT_REGISTER + I860_R10: info->i = cpustate->iregs[10]; break;
- case CPUINFO_INT_REGISTER + I860_R11: info->i = cpustate->iregs[11]; break;
- case CPUINFO_INT_REGISTER + I860_R12: info->i = cpustate->iregs[12]; break;
- case CPUINFO_INT_REGISTER + I860_R13: info->i = cpustate->iregs[13]; break;
- case CPUINFO_INT_REGISTER + I860_R14: info->i = cpustate->iregs[14]; break;
- case CPUINFO_INT_REGISTER + I860_R15: info->i = cpustate->iregs[15]; break;
- case CPUINFO_INT_REGISTER + I860_R16: info->i = cpustate->iregs[16]; break;
- case CPUINFO_INT_REGISTER + I860_R17: info->i = cpustate->iregs[17]; break;
- case CPUINFO_INT_REGISTER + I860_R18: info->i = cpustate->iregs[18]; break;
- case CPUINFO_INT_REGISTER + I860_R19: info->i = cpustate->iregs[19]; break;
- case CPUINFO_INT_REGISTER + I860_R20: info->i = cpustate->iregs[20]; break;
- case CPUINFO_INT_REGISTER + I860_R21: info->i = cpustate->iregs[21]; break;
- case CPUINFO_INT_REGISTER + I860_R22: info->i = cpustate->iregs[22]; break;
- case CPUINFO_INT_REGISTER + I860_R23: info->i = cpustate->iregs[23]; break;
- case CPUINFO_INT_REGISTER + I860_R24: info->i = cpustate->iregs[24]; break;
- case CPUINFO_INT_REGISTER + I860_R25: info->i = cpustate->iregs[25]; break;
- case CPUINFO_INT_REGISTER + I860_R26: info->i = cpustate->iregs[26]; break;
- case CPUINFO_INT_REGISTER + I860_R27: info->i = cpustate->iregs[27]; break;
- case CPUINFO_INT_REGISTER + I860_R28: info->i = cpustate->iregs[28]; break;
- case CPUINFO_INT_REGISTER + I860_R29: info->i = cpustate->iregs[29]; break;
- case CPUINFO_INT_REGISTER + I860_R30: info->i = cpustate->iregs[30]; break;
- case CPUINFO_INT_REGISTER + I860_R31: info->i = cpustate->iregs[31]; break;
-
- case CPUINFO_INT_REGISTER + I860_F0: CPU_GET_INFO_INT_F(0); break;
- case CPUINFO_INT_REGISTER + I860_F1: CPU_GET_INFO_INT_F(1); break;
- case CPUINFO_INT_REGISTER + I860_F2: CPU_GET_INFO_INT_F(2); break;
- case CPUINFO_INT_REGISTER + I860_F3: CPU_GET_INFO_INT_F(3); break;
- case CPUINFO_INT_REGISTER + I860_F4: CPU_GET_INFO_INT_F(4); break;
- case CPUINFO_INT_REGISTER + I860_F5: CPU_GET_INFO_INT_F(5); break;
- case CPUINFO_INT_REGISTER + I860_F6: CPU_GET_INFO_INT_F(6); break;
- case CPUINFO_INT_REGISTER + I860_F7: CPU_GET_INFO_INT_F(7); break;
- case CPUINFO_INT_REGISTER + I860_F8: CPU_GET_INFO_INT_F(8); break;
- case CPUINFO_INT_REGISTER + I860_F9: CPU_GET_INFO_INT_F(9); break;
- case CPUINFO_INT_REGISTER + I860_F10: CPU_GET_INFO_INT_F(10); break;
- case CPUINFO_INT_REGISTER + I860_F11: CPU_GET_INFO_INT_F(11); break;
- case CPUINFO_INT_REGISTER + I860_F12: CPU_GET_INFO_INT_F(12); break;
- case CPUINFO_INT_REGISTER + I860_F13: CPU_GET_INFO_INT_F(13); break;
- case CPUINFO_INT_REGISTER + I860_F14: CPU_GET_INFO_INT_F(14); break;
- case CPUINFO_INT_REGISTER + I860_F15: CPU_GET_INFO_INT_F(15); break;
- case CPUINFO_INT_REGISTER + I860_F16: CPU_GET_INFO_INT_F(16); break;
- case CPUINFO_INT_REGISTER + I860_F17: CPU_GET_INFO_INT_F(17); break;
- case CPUINFO_INT_REGISTER + I860_F18: CPU_GET_INFO_INT_F(18); break;
- case CPUINFO_INT_REGISTER + I860_F19: CPU_GET_INFO_INT_F(19); break;
- case CPUINFO_INT_REGISTER + I860_F20: CPU_GET_INFO_INT_F(20); break;
- case CPUINFO_INT_REGISTER + I860_F21: CPU_GET_INFO_INT_F(21); break;
- case CPUINFO_INT_REGISTER + I860_F22: CPU_GET_INFO_INT_F(22); break;
- case CPUINFO_INT_REGISTER + I860_F23: CPU_GET_INFO_INT_F(23); break;
- case CPUINFO_INT_REGISTER + I860_F24: CPU_GET_INFO_INT_F(24); break;
- case CPUINFO_INT_REGISTER + I860_F25: CPU_GET_INFO_INT_F(25); break;
- case CPUINFO_INT_REGISTER + I860_F26: CPU_GET_INFO_INT_F(26); break;
- case CPUINFO_INT_REGISTER + I860_F27: CPU_GET_INFO_INT_F(27); break;
- case CPUINFO_INT_REGISTER + I860_F28: CPU_GET_INFO_INT_F(28); break;
- case CPUINFO_INT_REGISTER + I860_F29: CPU_GET_INFO_INT_F(29); break;
- case CPUINFO_INT_REGISTER + I860_F30: CPU_GET_INFO_INT_F(30); break;
- case CPUINFO_INT_REGISTER + I860_F31: CPU_GET_INFO_INT_F(31); break;
+ case CPUINFO_INT_REGISTER + I860_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc; break;
+
+ case CPUINFO_INT_REGISTER + I860_FIR: info->i = cpustate->cregs[CR_FIR]; break;
+ case CPUINFO_INT_REGISTER + I860_PSR: info->i = cpustate->cregs[CR_PSR]; break;
+ case CPUINFO_INT_REGISTER + I860_DIRBASE: info->i = cpustate->cregs[CR_DIRBASE]; break;
+ case CPUINFO_INT_REGISTER + I860_DB: info->i = cpustate->cregs[CR_DB]; break;
+ case CPUINFO_INT_REGISTER + I860_FSR: info->i = cpustate->cregs[CR_FSR]; break;
+ case CPUINFO_INT_REGISTER + I860_EPSR: info->i = cpustate->cregs[CR_EPSR]; break;
+
+ case CPUINFO_INT_REGISTER + I860_R0: info->i = cpustate->iregs[0]; break;
+ case CPUINFO_INT_REGISTER + I860_R1: info->i = cpustate->iregs[1]; break;
+ case CPUINFO_INT_REGISTER + I860_R2: info->i = cpustate->iregs[2]; break;
+ case CPUINFO_INT_REGISTER + I860_R3: info->i = cpustate->iregs[3]; break;
+ case CPUINFO_INT_REGISTER + I860_R4: info->i = cpustate->iregs[4]; break;
+ case CPUINFO_INT_REGISTER + I860_R5: info->i = cpustate->iregs[5]; break;
+ case CPUINFO_INT_REGISTER + I860_R6: info->i = cpustate->iregs[6]; break;
+ case CPUINFO_INT_REGISTER + I860_R7: info->i = cpustate->iregs[7]; break;
+ case CPUINFO_INT_REGISTER + I860_R8: info->i = cpustate->iregs[8]; break;
+ case CPUINFO_INT_REGISTER + I860_R9: info->i = cpustate->iregs[9]; break;
+ case CPUINFO_INT_REGISTER + I860_R10: info->i = cpustate->iregs[10]; break;
+ case CPUINFO_INT_REGISTER + I860_R11: info->i = cpustate->iregs[11]; break;
+ case CPUINFO_INT_REGISTER + I860_R12: info->i = cpustate->iregs[12]; break;
+ case CPUINFO_INT_REGISTER + I860_R13: info->i = cpustate->iregs[13]; break;
+ case CPUINFO_INT_REGISTER + I860_R14: info->i = cpustate->iregs[14]; break;
+ case CPUINFO_INT_REGISTER + I860_R15: info->i = cpustate->iregs[15]; break;
+ case CPUINFO_INT_REGISTER + I860_R16: info->i = cpustate->iregs[16]; break;
+ case CPUINFO_INT_REGISTER + I860_R17: info->i = cpustate->iregs[17]; break;
+ case CPUINFO_INT_REGISTER + I860_R18: info->i = cpustate->iregs[18]; break;
+ case CPUINFO_INT_REGISTER + I860_R19: info->i = cpustate->iregs[19]; break;
+ case CPUINFO_INT_REGISTER + I860_R20: info->i = cpustate->iregs[20]; break;
+ case CPUINFO_INT_REGISTER + I860_R21: info->i = cpustate->iregs[21]; break;
+ case CPUINFO_INT_REGISTER + I860_R22: info->i = cpustate->iregs[22]; break;
+ case CPUINFO_INT_REGISTER + I860_R23: info->i = cpustate->iregs[23]; break;
+ case CPUINFO_INT_REGISTER + I860_R24: info->i = cpustate->iregs[24]; break;
+ case CPUINFO_INT_REGISTER + I860_R25: info->i = cpustate->iregs[25]; break;
+ case CPUINFO_INT_REGISTER + I860_R26: info->i = cpustate->iregs[26]; break;
+ case CPUINFO_INT_REGISTER + I860_R27: info->i = cpustate->iregs[27]; break;
+ case CPUINFO_INT_REGISTER + I860_R28: info->i = cpustate->iregs[28]; break;
+ case CPUINFO_INT_REGISTER + I860_R29: info->i = cpustate->iregs[29]; break;
+ case CPUINFO_INT_REGISTER + I860_R30: info->i = cpustate->iregs[30]; break;
+ case CPUINFO_INT_REGISTER + I860_R31: info->i = cpustate->iregs[31]; break;
+
+ case CPUINFO_INT_REGISTER + I860_F0: CPU_GET_INFO_INT_F(0); break;
+ case CPUINFO_INT_REGISTER + I860_F1: CPU_GET_INFO_INT_F(1); break;
+ case CPUINFO_INT_REGISTER + I860_F2: CPU_GET_INFO_INT_F(2); break;
+ case CPUINFO_INT_REGISTER + I860_F3: CPU_GET_INFO_INT_F(3); break;
+ case CPUINFO_INT_REGISTER + I860_F4: CPU_GET_INFO_INT_F(4); break;
+ case CPUINFO_INT_REGISTER + I860_F5: CPU_GET_INFO_INT_F(5); break;
+ case CPUINFO_INT_REGISTER + I860_F6: CPU_GET_INFO_INT_F(6); break;
+ case CPUINFO_INT_REGISTER + I860_F7: CPU_GET_INFO_INT_F(7); break;
+ case CPUINFO_INT_REGISTER + I860_F8: CPU_GET_INFO_INT_F(8); break;
+ case CPUINFO_INT_REGISTER + I860_F9: CPU_GET_INFO_INT_F(9); break;
+ case CPUINFO_INT_REGISTER + I860_F10: CPU_GET_INFO_INT_F(10); break;
+ case CPUINFO_INT_REGISTER + I860_F11: CPU_GET_INFO_INT_F(11); break;
+ case CPUINFO_INT_REGISTER + I860_F12: CPU_GET_INFO_INT_F(12); break;
+ case CPUINFO_INT_REGISTER + I860_F13: CPU_GET_INFO_INT_F(13); break;
+ case CPUINFO_INT_REGISTER + I860_F14: CPU_GET_INFO_INT_F(14); break;
+ case CPUINFO_INT_REGISTER + I860_F15: CPU_GET_INFO_INT_F(15); break;
+ case CPUINFO_INT_REGISTER + I860_F16: CPU_GET_INFO_INT_F(16); break;
+ case CPUINFO_INT_REGISTER + I860_F17: CPU_GET_INFO_INT_F(17); break;
+ case CPUINFO_INT_REGISTER + I860_F18: CPU_GET_INFO_INT_F(18); break;
+ case CPUINFO_INT_REGISTER + I860_F19: CPU_GET_INFO_INT_F(19); break;
+ case CPUINFO_INT_REGISTER + I860_F20: CPU_GET_INFO_INT_F(20); break;
+ case CPUINFO_INT_REGISTER + I860_F21: CPU_GET_INFO_INT_F(21); break;
+ case CPUINFO_INT_REGISTER + I860_F22: CPU_GET_INFO_INT_F(22); break;
+ case CPUINFO_INT_REGISTER + I860_F23: CPU_GET_INFO_INT_F(23); break;
+ case CPUINFO_INT_REGISTER + I860_F24: CPU_GET_INFO_INT_F(24); break;
+ case CPUINFO_INT_REGISTER + I860_F25: CPU_GET_INFO_INT_F(25); break;
+ case CPUINFO_INT_REGISTER + I860_F26: CPU_GET_INFO_INT_F(26); break;
+ case CPUINFO_INT_REGISTER + I860_F27: CPU_GET_INFO_INT_F(27); break;
+ case CPUINFO_INT_REGISTER + I860_F28: CPU_GET_INFO_INT_F(28); break;
+ case CPUINFO_INT_REGISTER + I860_F29: CPU_GET_INFO_INT_F(29); break;
+ case CPUINFO_INT_REGISTER + I860_F30: CPU_GET_INFO_INT_F(30); break;
+ case CPUINFO_INT_REGISTER + I860_F31: CPU_GET_INFO_INT_F(31); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i860); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i860); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i860); break;
- case CPUINFO_FCT_EXIT: info->exit = NULL; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i860); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i860); break;
- case CPUINFO_FCT_DEBUG_INIT: info->debug_init = NULL; break;
- case CPUINFO_FCT_TRANSLATE: info->translate = NULL; break;
- case CPUINFO_FCT_READ: info->read = NULL; break;
- case CPUINFO_FCT_WRITE: info->write = NULL; break;
- case CPUINFO_FCT_READOP: info->readop = NULL; break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i860); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i860); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i860); break;
+ case CPUINFO_FCT_EXIT: info->exit = NULL; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i860); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i860); break;
+ case CPUINFO_FCT_DEBUG_INIT: info->debug_init = NULL; break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = NULL; break;
+ case CPUINFO_FCT_READ: info->read = NULL; break;
+ case CPUINFO_FCT_WRITE: info->write = NULL; break;
+ case CPUINFO_FCT_READOP: info->readop = NULL; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "i860XR"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel i860"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Jason Eckhardt"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "i860XR"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel i860"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "0.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Jason Eckhardt"); break;
case CPUINFO_STR_FLAGS:
strcpy(info->s, ""); break;
- case CPUINFO_STR_REGISTER + I860_PC: sprintf(info->s, "PC : %08x", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + I860_FIR: sprintf(info->s, "FIR : %08x", cpustate->cregs[CR_FIR]); break;
- case CPUINFO_STR_REGISTER + I860_PSR: sprintf(info->s, "PSR : %08x", cpustate->cregs[CR_PSR]); break;
- case CPUINFO_STR_REGISTER + I860_DIRBASE: sprintf(info->s, "DIRBASE : %08x", cpustate->cregs[CR_DIRBASE]);break;
- case CPUINFO_STR_REGISTER + I860_DB: sprintf(info->s, "DB : %08x", cpustate->cregs[CR_DB]); break;
- case CPUINFO_STR_REGISTER + I860_FSR: sprintf(info->s, "FSR : %08x", cpustate->cregs[CR_FSR]); break;
- case CPUINFO_STR_REGISTER + I860_EPSR: sprintf(info->s, "EPSR : %08x", cpustate->cregs[CR_EPSR]); break;
-
- case CPUINFO_STR_REGISTER + I860_R0: sprintf(info->s, "R0 : %08x", cpustate->iregs[0]); break;
- case CPUINFO_STR_REGISTER + I860_R1: sprintf(info->s, "R1 : %08x", cpustate->iregs[1]); break;
- case CPUINFO_STR_REGISTER + I860_R2: sprintf(info->s, "R2 : %08x", cpustate->iregs[2]); break;
- case CPUINFO_STR_REGISTER + I860_R3: sprintf(info->s, "R3 : %08x", cpustate->iregs[3]); break;
- case CPUINFO_STR_REGISTER + I860_R4: sprintf(info->s, "R4 : %08x", cpustate->iregs[4]); break;
- case CPUINFO_STR_REGISTER + I860_R5: sprintf(info->s, "R5 : %08x", cpustate->iregs[5]); break;
- case CPUINFO_STR_REGISTER + I860_R6: sprintf(info->s, "R6 : %08x", cpustate->iregs[6]); break;
- case CPUINFO_STR_REGISTER + I860_R7: sprintf(info->s, "R7 : %08x", cpustate->iregs[7]); break;
- case CPUINFO_STR_REGISTER + I860_R8: sprintf(info->s, "R8 : %08x", cpustate->iregs[8]); break;
- case CPUINFO_STR_REGISTER + I860_R9: sprintf(info->s, "R9 : %08x", cpustate->iregs[9]); break;
- case CPUINFO_STR_REGISTER + I860_R10: sprintf(info->s, "R10 : %08x", cpustate->iregs[10]); break;
- case CPUINFO_STR_REGISTER + I860_R11: sprintf(info->s, "R11 : %08x", cpustate->iregs[11]); break;
- case CPUINFO_STR_REGISTER + I860_R12: sprintf(info->s, "R12 : %08x", cpustate->iregs[12]); break;
- case CPUINFO_STR_REGISTER + I860_R13: sprintf(info->s, "R13 : %08x", cpustate->iregs[13]); break;
- case CPUINFO_STR_REGISTER + I860_R14: sprintf(info->s, "R14 : %08x", cpustate->iregs[14]); break;
- case CPUINFO_STR_REGISTER + I860_R15: sprintf(info->s, "R15 : %08x", cpustate->iregs[15]); break;
- case CPUINFO_STR_REGISTER + I860_R16: sprintf(info->s, "R16 : %08x", cpustate->iregs[16]); break;
- case CPUINFO_STR_REGISTER + I860_R17: sprintf(info->s, "R17 : %08x", cpustate->iregs[17]); break;
- case CPUINFO_STR_REGISTER + I860_R18: sprintf(info->s, "R18 : %08x", cpustate->iregs[18]); break;
- case CPUINFO_STR_REGISTER + I860_R19: sprintf(info->s, "R19 : %08x", cpustate->iregs[19]); break;
- case CPUINFO_STR_REGISTER + I860_R20: sprintf(info->s, "R20 : %08x", cpustate->iregs[20]); break;
- case CPUINFO_STR_REGISTER + I860_R21: sprintf(info->s, "R21 : %08x", cpustate->iregs[21]); break;
- case CPUINFO_STR_REGISTER + I860_R22: sprintf(info->s, "R22 : %08x", cpustate->iregs[22]); break;
- case CPUINFO_STR_REGISTER + I860_R23: sprintf(info->s, "R23 : %08x", cpustate->iregs[23]); break;
- case CPUINFO_STR_REGISTER + I860_R24: sprintf(info->s, "R24 : %08x", cpustate->iregs[24]); break;
- case CPUINFO_STR_REGISTER + I860_R25: sprintf(info->s, "R25 : %08x", cpustate->iregs[25]); break;
- case CPUINFO_STR_REGISTER + I860_R26: sprintf(info->s, "R26 : %08x", cpustate->iregs[26]); break;
- case CPUINFO_STR_REGISTER + I860_R27: sprintf(info->s, "R27 : %08x", cpustate->iregs[27]); break;
- case CPUINFO_STR_REGISTER + I860_R28: sprintf(info->s, "R28 : %08x", cpustate->iregs[28]); break;
- case CPUINFO_STR_REGISTER + I860_R29: sprintf(info->s, "R29 : %08x", cpustate->iregs[29]); break;
- case CPUINFO_STR_REGISTER + I860_R30: sprintf(info->s, "R30 : %08x", cpustate->iregs[30]); break;
- case CPUINFO_STR_REGISTER + I860_R31: sprintf(info->s, "R31 : %08x", cpustate->iregs[31]); break;
-
- case CPUINFO_STR_REGISTER + I860_F0: CPU_GET_INFO_STR_F(0); break;
- case CPUINFO_STR_REGISTER + I860_F1: CPU_GET_INFO_STR_F(1); break;
- case CPUINFO_STR_REGISTER + I860_F2: CPU_GET_INFO_STR_F(2); break;
- case CPUINFO_STR_REGISTER + I860_F3: CPU_GET_INFO_STR_F(3); break;
- case CPUINFO_STR_REGISTER + I860_F4: CPU_GET_INFO_STR_F(4); break;
- case CPUINFO_STR_REGISTER + I860_F5: CPU_GET_INFO_STR_F(5); break;
- case CPUINFO_STR_REGISTER + I860_F6: CPU_GET_INFO_STR_F(6); break;
- case CPUINFO_STR_REGISTER + I860_F7: CPU_GET_INFO_STR_F(7); break;
- case CPUINFO_STR_REGISTER + I860_F8: CPU_GET_INFO_STR_F(8); break;
- case CPUINFO_STR_REGISTER + I860_F9: CPU_GET_INFO_STR_F(9); break;
- case CPUINFO_STR_REGISTER + I860_F10: CPU_GET_INFO_STR_F(10); break;
- case CPUINFO_STR_REGISTER + I860_F11: CPU_GET_INFO_STR_F(11); break;
- case CPUINFO_STR_REGISTER + I860_F12: CPU_GET_INFO_STR_F(12); break;
- case CPUINFO_STR_REGISTER + I860_F13: CPU_GET_INFO_STR_F(13); break;
- case CPUINFO_STR_REGISTER + I860_F14: CPU_GET_INFO_STR_F(14); break;
- case CPUINFO_STR_REGISTER + I860_F15: CPU_GET_INFO_STR_F(15); break;
- case CPUINFO_STR_REGISTER + I860_F16: CPU_GET_INFO_STR_F(16); break;
- case CPUINFO_STR_REGISTER + I860_F17: CPU_GET_INFO_STR_F(17); break;
- case CPUINFO_STR_REGISTER + I860_F18: CPU_GET_INFO_STR_F(18); break;
- case CPUINFO_STR_REGISTER + I860_F19: CPU_GET_INFO_STR_F(19); break;
- case CPUINFO_STR_REGISTER + I860_F20: CPU_GET_INFO_STR_F(20); break;
- case CPUINFO_STR_REGISTER + I860_F21: CPU_GET_INFO_STR_F(21); break;
- case CPUINFO_STR_REGISTER + I860_F22: CPU_GET_INFO_STR_F(22); break;
- case CPUINFO_STR_REGISTER + I860_F23: CPU_GET_INFO_STR_F(23); break;
- case CPUINFO_STR_REGISTER + I860_F24: CPU_GET_INFO_STR_F(24); break;
- case CPUINFO_STR_REGISTER + I860_F25: CPU_GET_INFO_STR_F(25); break;
- case CPUINFO_STR_REGISTER + I860_F26: CPU_GET_INFO_STR_F(26); break;
- case CPUINFO_STR_REGISTER + I860_F27: CPU_GET_INFO_STR_F(27); break;
- case CPUINFO_STR_REGISTER + I860_F28: CPU_GET_INFO_STR_F(28); break;
- case CPUINFO_STR_REGISTER + I860_F29: CPU_GET_INFO_STR_F(29); break;
- case CPUINFO_STR_REGISTER + I860_F30: CPU_GET_INFO_STR_F(30); break;
- case CPUINFO_STR_REGISTER + I860_F31: CPU_GET_INFO_STR_F(31); break;
+ case CPUINFO_STR_REGISTER + I860_PC: sprintf(info->s, "PC : %08x", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + I860_FIR: sprintf(info->s, "FIR : %08x", cpustate->cregs[CR_FIR]); break;
+ case CPUINFO_STR_REGISTER + I860_PSR: sprintf(info->s, "PSR : %08x", cpustate->cregs[CR_PSR]); break;
+ case CPUINFO_STR_REGISTER + I860_DIRBASE: sprintf(info->s, "DIRBASE : %08x", cpustate->cregs[CR_DIRBASE]);break;
+ case CPUINFO_STR_REGISTER + I860_DB: sprintf(info->s, "DB : %08x", cpustate->cregs[CR_DB]); break;
+ case CPUINFO_STR_REGISTER + I860_FSR: sprintf(info->s, "FSR : %08x", cpustate->cregs[CR_FSR]); break;
+ case CPUINFO_STR_REGISTER + I860_EPSR: sprintf(info->s, "EPSR : %08x", cpustate->cregs[CR_EPSR]); break;
+
+ case CPUINFO_STR_REGISTER + I860_R0: sprintf(info->s, "R0 : %08x", cpustate->iregs[0]); break;
+ case CPUINFO_STR_REGISTER + I860_R1: sprintf(info->s, "R1 : %08x", cpustate->iregs[1]); break;
+ case CPUINFO_STR_REGISTER + I860_R2: sprintf(info->s, "R2 : %08x", cpustate->iregs[2]); break;
+ case CPUINFO_STR_REGISTER + I860_R3: sprintf(info->s, "R3 : %08x", cpustate->iregs[3]); break;
+ case CPUINFO_STR_REGISTER + I860_R4: sprintf(info->s, "R4 : %08x", cpustate->iregs[4]); break;
+ case CPUINFO_STR_REGISTER + I860_R5: sprintf(info->s, "R5 : %08x", cpustate->iregs[5]); break;
+ case CPUINFO_STR_REGISTER + I860_R6: sprintf(info->s, "R6 : %08x", cpustate->iregs[6]); break;
+ case CPUINFO_STR_REGISTER + I860_R7: sprintf(info->s, "R7 : %08x", cpustate->iregs[7]); break;
+ case CPUINFO_STR_REGISTER + I860_R8: sprintf(info->s, "R8 : %08x", cpustate->iregs[8]); break;
+ case CPUINFO_STR_REGISTER + I860_R9: sprintf(info->s, "R9 : %08x", cpustate->iregs[9]); break;
+ case CPUINFO_STR_REGISTER + I860_R10: sprintf(info->s, "R10 : %08x", cpustate->iregs[10]); break;
+ case CPUINFO_STR_REGISTER + I860_R11: sprintf(info->s, "R11 : %08x", cpustate->iregs[11]); break;
+ case CPUINFO_STR_REGISTER + I860_R12: sprintf(info->s, "R12 : %08x", cpustate->iregs[12]); break;
+ case CPUINFO_STR_REGISTER + I860_R13: sprintf(info->s, "R13 : %08x", cpustate->iregs[13]); break;
+ case CPUINFO_STR_REGISTER + I860_R14: sprintf(info->s, "R14 : %08x", cpustate->iregs[14]); break;
+ case CPUINFO_STR_REGISTER + I860_R15: sprintf(info->s, "R15 : %08x", cpustate->iregs[15]); break;
+ case CPUINFO_STR_REGISTER + I860_R16: sprintf(info->s, "R16 : %08x", cpustate->iregs[16]); break;
+ case CPUINFO_STR_REGISTER + I860_R17: sprintf(info->s, "R17 : %08x", cpustate->iregs[17]); break;
+ case CPUINFO_STR_REGISTER + I860_R18: sprintf(info->s, "R18 : %08x", cpustate->iregs[18]); break;
+ case CPUINFO_STR_REGISTER + I860_R19: sprintf(info->s, "R19 : %08x", cpustate->iregs[19]); break;
+ case CPUINFO_STR_REGISTER + I860_R20: sprintf(info->s, "R20 : %08x", cpustate->iregs[20]); break;
+ case CPUINFO_STR_REGISTER + I860_R21: sprintf(info->s, "R21 : %08x", cpustate->iregs[21]); break;
+ case CPUINFO_STR_REGISTER + I860_R22: sprintf(info->s, "R22 : %08x", cpustate->iregs[22]); break;
+ case CPUINFO_STR_REGISTER + I860_R23: sprintf(info->s, "R23 : %08x", cpustate->iregs[23]); break;
+ case CPUINFO_STR_REGISTER + I860_R24: sprintf(info->s, "R24 : %08x", cpustate->iregs[24]); break;
+ case CPUINFO_STR_REGISTER + I860_R25: sprintf(info->s, "R25 : %08x", cpustate->iregs[25]); break;
+ case CPUINFO_STR_REGISTER + I860_R26: sprintf(info->s, "R26 : %08x", cpustate->iregs[26]); break;
+ case CPUINFO_STR_REGISTER + I860_R27: sprintf(info->s, "R27 : %08x", cpustate->iregs[27]); break;
+ case CPUINFO_STR_REGISTER + I860_R28: sprintf(info->s, "R28 : %08x", cpustate->iregs[28]); break;
+ case CPUINFO_STR_REGISTER + I860_R29: sprintf(info->s, "R29 : %08x", cpustate->iregs[29]); break;
+ case CPUINFO_STR_REGISTER + I860_R30: sprintf(info->s, "R30 : %08x", cpustate->iregs[30]); break;
+ case CPUINFO_STR_REGISTER + I860_R31: sprintf(info->s, "R31 : %08x", cpustate->iregs[31]); break;
+
+ case CPUINFO_STR_REGISTER + I860_F0: CPU_GET_INFO_STR_F(0); break;
+ case CPUINFO_STR_REGISTER + I860_F1: CPU_GET_INFO_STR_F(1); break;
+ case CPUINFO_STR_REGISTER + I860_F2: CPU_GET_INFO_STR_F(2); break;
+ case CPUINFO_STR_REGISTER + I860_F3: CPU_GET_INFO_STR_F(3); break;
+ case CPUINFO_STR_REGISTER + I860_F4: CPU_GET_INFO_STR_F(4); break;
+ case CPUINFO_STR_REGISTER + I860_F5: CPU_GET_INFO_STR_F(5); break;
+ case CPUINFO_STR_REGISTER + I860_F6: CPU_GET_INFO_STR_F(6); break;
+ case CPUINFO_STR_REGISTER + I860_F7: CPU_GET_INFO_STR_F(7); break;
+ case CPUINFO_STR_REGISTER + I860_F8: CPU_GET_INFO_STR_F(8); break;
+ case CPUINFO_STR_REGISTER + I860_F9: CPU_GET_INFO_STR_F(9); break;
+ case CPUINFO_STR_REGISTER + I860_F10: CPU_GET_INFO_STR_F(10); break;
+ case CPUINFO_STR_REGISTER + I860_F11: CPU_GET_INFO_STR_F(11); break;
+ case CPUINFO_STR_REGISTER + I860_F12: CPU_GET_INFO_STR_F(12); break;
+ case CPUINFO_STR_REGISTER + I860_F13: CPU_GET_INFO_STR_F(13); break;
+ case CPUINFO_STR_REGISTER + I860_F14: CPU_GET_INFO_STR_F(14); break;
+ case CPUINFO_STR_REGISTER + I860_F15: CPU_GET_INFO_STR_F(15); break;
+ case CPUINFO_STR_REGISTER + I860_F16: CPU_GET_INFO_STR_F(16); break;
+ case CPUINFO_STR_REGISTER + I860_F17: CPU_GET_INFO_STR_F(17); break;
+ case CPUINFO_STR_REGISTER + I860_F18: CPU_GET_INFO_STR_F(18); break;
+ case CPUINFO_STR_REGISTER + I860_F19: CPU_GET_INFO_STR_F(19); break;
+ case CPUINFO_STR_REGISTER + I860_F20: CPU_GET_INFO_STR_F(20); break;
+ case CPUINFO_STR_REGISTER + I860_F21: CPU_GET_INFO_STR_F(21); break;
+ case CPUINFO_STR_REGISTER + I860_F22: CPU_GET_INFO_STR_F(22); break;
+ case CPUINFO_STR_REGISTER + I860_F23: CPU_GET_INFO_STR_F(23); break;
+ case CPUINFO_STR_REGISTER + I860_F24: CPU_GET_INFO_STR_F(24); break;
+ case CPUINFO_STR_REGISTER + I860_F25: CPU_GET_INFO_STR_F(25); break;
+ case CPUINFO_STR_REGISTER + I860_F26: CPU_GET_INFO_STR_F(26); break;
+ case CPUINFO_STR_REGISTER + I860_F27: CPU_GET_INFO_STR_F(27); break;
+ case CPUINFO_STR_REGISTER + I860_F28: CPU_GET_INFO_STR_F(28); break;
+ case CPUINFO_STR_REGISTER + I860_F29: CPU_GET_INFO_STR_F(29); break;
+ case CPUINFO_STR_REGISTER + I860_F30: CPU_GET_INFO_STR_F(30); break;
+ case CPUINFO_STR_REGISTER + I860_F31: CPU_GET_INFO_STR_F(31); break;
}
}
diff --git a/src/emu/cpu/i860/i860.h b/src/emu/cpu/i860/i860.h
index 773be12beb5..6d5578e74f5 100644
--- a/src/emu/cpu/i860/i860.h
+++ b/src/emu/cpu/i860/i860.h
@@ -34,14 +34,14 @@ enum
I860_FSR,
I860_EPSR,
- I860_R0, I860_R1, I860_R2, I860_R3, I860_R4, I860_R5, I860_R6, I860_R7, I860_R8, I860_R9,
- I860_R10, I860_R11, I860_R12, I860_R13, I860_R14, I860_R15, I860_R16, I860_R17, I860_R18, I860_R19,
- I860_R20, I860_R21, I860_R22, I860_R23, I860_R24, I860_R25, I860_R26, I860_R27, I860_R28, I860_R29,
+ I860_R0, I860_R1, I860_R2, I860_R3, I860_R4, I860_R5, I860_R6, I860_R7, I860_R8, I860_R9,
+ I860_R10, I860_R11, I860_R12, I860_R13, I860_R14, I860_R15, I860_R16, I860_R17, I860_R18, I860_R19,
+ I860_R20, I860_R21, I860_R22, I860_R23, I860_R24, I860_R25, I860_R26, I860_R27, I860_R28, I860_R29,
I860_R30, I860_R31,
- I860_F0, I860_F1, I860_F2, I860_F3, I860_F4, I860_F5, I860_F6, I860_F7, I860_F8, I860_F9,
- I860_F10, I860_F11, I860_F12, I860_F13, I860_F14, I860_F15, I860_F16, I860_F17, I860_F18, I860_F19,
- I860_F20, I860_F21, I860_F22, I860_F23, I860_F24, I860_F25, I860_F26, I860_F27, I860_F28, I860_F29,
+ I860_F0, I860_F1, I860_F2, I860_F3, I860_F4, I860_F5, I860_F6, I860_F7, I860_F8, I860_F9,
+ I860_F10, I860_F11, I860_F12, I860_F13, I860_F14, I860_F15, I860_F16, I860_F17, I860_F18, I860_F19,
+ I860_F20, I860_F21, I860_F22, I860_F23, I860_F24, I860_F25, I860_F26, I860_F27, I860_F28, I860_F29,
I860_F30, I860_F31,
};
@@ -60,8 +60,8 @@ struct i860_state_t {
UINT32 iregs[32];
/* Floating point registers (32 x 32-bits, 16 x 64 bits, or 8 x 128 bits).
- When referenced as pairs or quads, the higher numbered registers
- are the upper bits. E.g., double precision f0 is f1:f0. */
+ When referenced as pairs or quads, the higher numbered registers
+ are the upper bits. E.g., double precision f0 is f1:f0. */
UINT8 frg[32 * 4];
/* Control registers (6 x 32-bits). */
@@ -95,7 +95,7 @@ struct i860_state_t {
} A[3];
/* The multiplier pipeline. 3 stages for single precision, 2 stages
- for double precision, and confusing for mixed precision. */
+ for double precision, and confusing for mixed precision. */
struct {
/* The stage contents. */
union {
@@ -145,8 +145,8 @@ struct i860_state_t {
int pin_reset;
/*
- * Other emulator state.
- */
+ * Other emulator state.
+ */
int exiting_readmem;
int exiting_ifetch;
@@ -154,20 +154,20 @@ struct i860_state_t {
int pc_updated;
/* Indicate an instruction just generated a trap, so we know the PC
- needs to go to the trap address. */
+ needs to go to the trap address. */
int pending_trap;
/* This is 1 if the next fir load gets the trap address, otherwise
- it is 0 to get the ld.c address. This is set to 1 only when a
- non-reset trap occurs. */
+ it is 0 to get the ld.c address. This is set to 1 only when a
+ non-reset trap occurs. */
int fir_gets_trap_addr;
/* Single stepping flag for internal use. */
int single_stepping;
/*
- * MAME-specific stuff.
- */
+ * MAME-specific stuff.
+ */
legacy_cpu_device *device;
address_space *program;
UINT32 ppc;
@@ -200,8 +200,8 @@ extern void reset_i860(i860_state_t*);
/* i860 pins. */
enum {
- DEC_PIN_BUS_HOLD, /* Bus HOLD pin. */
- DEC_PIN_RESET /* System reset pin. */
+ DEC_PIN_BUS_HOLD, /* Bus HOLD pin. */
+ DEC_PIN_RESET /* System reset pin. */
};
@@ -220,4 +220,3 @@ enum {
*/
#endif /* __I860_H__ */
-
diff --git a/src/emu/cpu/i860/i860dasm.c b/src/emu/cpu/i860/i860dasm.c
index 3440236c822..5ab52d019ec 100644
--- a/src/emu/cpu/i860/i860dasm.c
+++ b/src/emu/cpu/i860/i860dasm.c
@@ -64,49 +64,49 @@ CPU_DISASSEMBLE( i860 )
case 0x00:
case 0x01:
case 0x04:
- case 0x05: i860_dasm_ldx(op, tempB); break;
+ case 0x05: i860_dasm_ldx(op, tempB); break;
case 0x03:
- case 0x07: i860_dasm_stx(op, tempB); break;
+ case 0x07: i860_dasm_stx(op, tempB); break;
- case 0x02: i860_dasm_ixfr(op, tempB); break;
+ case 0x02: i860_dasm_ixfr(op, tempB); break;
- case 0x06: sprintf(tempB, "(reserved)"); break;
+ case 0x06: sprintf(tempB, "(reserved)"); break;
case 0x08:
case 0x09:
case 0x0a:
- case 0x0b: i860_dasm_fid_fst(op, tempB); break;
+ case 0x0b: i860_dasm_fid_fst(op, tempB); break;
- case 0x0d: i860_dasm_flush(op, tempB); break;
+ case 0x0d: i860_dasm_flush(op, tempB); break;
- case 0x0f: i860_dasm_pstd(op, tempB); break;
+ case 0x0f: i860_dasm_pstd(op, tempB); break;
case 0x0c:
- case 0x0e: i860_dasm_ldc_sdc(op, tempB); break;
+ case 0x0e: i860_dasm_ldc_sdc(op, tempB); break;
- case 0x10: i860_dasm_bri(op, tempB); break;
+ case 0x10: i860_dasm_bri(op, tempB); break;
- case 0x11: i860_dasm_trap(op, tempB); break;
+ case 0x11: i860_dasm_trap(op, tempB); break;
- case 0x12: i860_dasm_floating_point_dasm(op, tempB); break; /* Floating point operation sub-group */
+ case 0x12: i860_dasm_floating_point_dasm(op, tempB); break; /* Floating point operation sub-group */
- case 0x13: i860_dasm_core_dasm(op, tempB); break; /* Core operation sub-group */
+ case 0x13: i860_dasm_core_dasm(op, tempB); break; /* Core operation sub-group */
case 0x14:
case 0x15:
case 0x16:
- case 0x17: i860_dasm_bte_btne(op, tempB); break;
+ case 0x17: i860_dasm_bte_btne(op, tempB); break;
case 0x18:
- case 0x19: i860_dasm_pfidy(op, tempB); break;
+ case 0x19: i860_dasm_pfidy(op, tempB); break;
case 0x1a:
case 0x1b:
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: i860_dasm_CTRL_dasm(op, tempB); break; /* CTRL operation sub-group */
+ case 0x1f: i860_dasm_CTRL_dasm(op, tempB); break; /* CTRL operation sub-group */
case 0x20:
case 0x21:
@@ -115,24 +115,24 @@ CPU_DISASSEMBLE( i860 )
case 0x24:
case 0x25:
case 0x26:
- case 0x27: i860_dasm_addu_subu(op, tempB); break;
+ case 0x27: i860_dasm_addu_subu(op, tempB); break;
case 0x28:
case 0x29:
case 0x2a:
- case 0x2b: i860_dasm_shl_shr(op, tempB); break;
+ case 0x2b: i860_dasm_shl_shr(op, tempB); break;
- case 0x2c: i860_dasm_shrd(op, tempB); break;
+ case 0x2c: i860_dasm_shrd(op, tempB); break;
- case 0x2d: i860_dasm_bla(op, tempB); break;
+ case 0x2d: i860_dasm_bla(op, tempB); break;
case 0x2e:
- case 0x2f: i860_dasm_shra(op, tempB); break;
+ case 0x2f: i860_dasm_shra(op, tempB); break;
case 0x30:
case 0x31:
case 0x32:
- case 0x33: i860_dasm_and_andh(op, tempB); break;
+ case 0x33: i860_dasm_and_andh(op, tempB); break;
case 0x34:
case 0x35:
@@ -142,14 +142,14 @@ CPU_DISASSEMBLE( i860 )
case 0x38:
case 0x39:
case 0x3a:
- case 0x3b: i860_dasm_or_orh(op, tempB); break;
+ case 0x3b: i860_dasm_or_orh(op, tempB); break;
case 0x3c:
case 0x3d:
case 0x3e:
- case 0x3f: i860_dasm_xor_xorh(op, tempB); break;
+ case 0x3f: i860_dasm_xor_xorh(op, tempB); break;
- default: sprintf(tempB, "(reserved)"); break;
+ default: sprintf(tempB, "(reserved)"); break;
}
/* More Debug */
@@ -183,12 +183,12 @@ static void i860_dasm_core_dasm(const UINT32 op, char* buffer)
switch(op & 0x0000001f)
{
- case 0x01: i860_dasm_CORE_lock(op, buffer); break;
+ case 0x01: i860_dasm_CORE_lock(op, buffer); break;
case 0x02: i860_dasm_CORE_calli(op, buffer); break;
case 0x04: i860_dasm_CORE_intovr(op, buffer); break;
case 0x07: i860_dasm_CORE_unlock(op, buffer); break;
- default: sprintf(buffer, "(reserved)"); break;
+ default: sprintf(buffer, "(reserved)"); break;
}
}
@@ -203,12 +203,12 @@ static void i860_dasm_CTRL_dasm(const UINT32 op, char* buffer)
switch(opc)
{
- case 0x02: i860_dasm_CTRL_br(op, buffer); break;
- case 0x03: i860_dasm_CTRL_call(op, buffer); break;
+ case 0x02: i860_dasm_CTRL_br(op, buffer); break;
+ case 0x03: i860_dasm_CTRL_call(op, buffer); break;
case 0x04: case 0x05: i860_dasm_CTRL_bc_bct(op, buffer); break;
case 0x06: case 0x07: i860_dasm_CTRL_bnc_bnct(op, buffer); break;
- default: sprintf(buffer, "(reserved)"); break;
+ default: sprintf(buffer, "(reserved)"); break;
}
}
@@ -374,4 +374,3 @@ static void i860_dasm_CTRL_bnc_bnct(const UINT32 op, char* buffer)
/*******************************/
/* Floating-Point Instructions */
/*******************************/
-
diff --git a/src/emu/cpu/i860/i860dec.c b/src/emu/cpu/i860/i860dec.c
index 05d2c109331..b09ce21a138 100644
--- a/src/emu/cpu/i860/i860dec.c
+++ b/src/emu/cpu/i860/i860dec.c
@@ -176,12 +176,12 @@ INLINE void set_fregval_d (i860s *cpustate, int fr, double d)
/* Control register numbers. */
enum {
- CR_FIR = 0,
- CR_PSR = 1,
- CR_DIRBASE = 2,
- CR_DB = 3,
- CR_FSR = 4,
- CR_EPSR = 5
+ CR_FIR = 0,
+ CR_PSR = 1,
+ CR_DIRBASE = 2,
+ CR_DB = 3,
+ CR_FSR = 4,
+ CR_EPSR = 5
};
/* A mask for all the trap bits of the PSR (FT, DAT, IAT, IN, IT, or
@@ -326,8 +326,8 @@ void i860_set_pin (device_t *device, int pin, int val)
void i860_gen_interrupt (i860s *cpustate)
{
/* If interrupts are enabled, then set PSR.IN and prepare for trap.
- Otherwise, the external interrupt is ignored. We also set
- bit EPSR.INT (which tracks the INT pin). */
+ Otherwise, the external interrupt is ignored. We also set
+ bit EPSR.INT (which tracks the INT pin). */
if (GET_PSR_IM ())
{
SET_PSR_IN (1);
@@ -340,7 +340,7 @@ void i860_gen_interrupt (i860s *cpustate)
if (GET_PSR_IM ())
fprintf (stderr, "[PSR.IN set, preparing to trap]\n");
else
- fprintf (stderr, "[ignored (interrupts disabled)]\n");
+ fprintf (stderr, "[ignored (interrupts disabled)]\n");
#endif
}
@@ -356,7 +356,7 @@ static UINT32 ifetch (i860s *cpustate, UINT32 pc)
/* If virtual mode, get translation. */
if (GET_DIRBASE_ATE ())
{
- phys_pc = get_address_translation (cpustate, pc, 0 /* is_dataref */, 0 /* is_write */);
+ phys_pc = get_address_translation (cpustate, pc, 0 /* is_dataref */, 0 /* is_write */);
cpustate->exiting_ifetch = 0;
if (cpustate->pending_trap && (GET_PSR_DAT () || GET_PSR_IAT ()))
{
@@ -365,10 +365,10 @@ static UINT32 ifetch (i860s *cpustate, UINT32 pc)
}
}
else
- phys_pc = pc;
+ phys_pc = pc;
/* Since i860 instructions are always stored LSB first (regardless of
- the BE bit), we need to adjust the instruction below on MSB hosts. */
+ the BE bit), we need to adjust the instruction below on MSB hosts. */
w1 = cpustate->program->read_dword(phys_pc);
#ifdef HOST_MSB
BYTE_REV32 (w1);
@@ -419,7 +419,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
if (is_dataref)
SET_PSR_DAT (1);
else
- SET_PSR_IAT (1);
+ SET_PSR_IAT (1);
cpustate->pending_trap = 1;
/* Dummy return. */
@@ -428,7 +428,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
/* PDE Check for write protection violations. */
if (is_write && is_dataref
- && !(pg_dir_entry & 2) /* W = 0. */
+ && !(pg_dir_entry & 2) /* W = 0. */
&& (GET_PSR_U () || GET_EPSR_WP ())) /* PSR_U = 1 or EPSR_WP = 1. */
{
SET_PSR_DAT (1);
@@ -439,12 +439,12 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
/* PDE Check for user-mode access to supervisor pages. */
if (GET_PSR_U ()
- && !(pg_dir_entry & 4)) /* U = 0. */
+ && !(pg_dir_entry & 4)) /* U = 0. */
{
if (is_dataref)
SET_PSR_DAT (1);
else
- SET_PSR_IAT (1);
+ SET_PSR_IAT (1);
cpustate->pending_trap = 1;
/* Dummy return. */
return 0;
@@ -467,7 +467,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
if (is_dataref)
SET_PSR_DAT (1);
else
- SET_PSR_IAT (1);
+ SET_PSR_IAT (1);
cpustate->pending_trap = 1;
/* Dummy return. */
@@ -476,7 +476,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
/* PTE Check for write protection violations. */
if (is_write && is_dataref
- && !(pg_tbl_entry & 2) /* W = 0. */
+ && !(pg_tbl_entry & 2) /* W = 0. */
&& (GET_PSR_U () || GET_EPSR_WP ())) /* PSR_U = 1 or EPSR_WP = 1. */
{
SET_PSR_DAT (1);
@@ -487,12 +487,12 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
/* PTE Check for user-mode access to supervisor pages. */
if (GET_PSR_U ()
- && !(pg_tbl_entry & 4)) /* U = 0. */
+ && !(pg_tbl_entry & 4)) /* U = 0. */
{
if (is_dataref)
SET_PSR_DAT (1);
else
- SET_PSR_IAT (1);
+ SET_PSR_IAT (1);
cpustate->pending_trap = 1;
/* Dummy return. */
return 0;
@@ -511,7 +511,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
if (is_write && is_dataref && (pg_tbl_entry & 0x40) == 0)
{
/* fprintf(stderr, "DAT trap on write without dirty bit v0x%08x/p0x%08x\n",
- vaddr, (pg_tbl_entry & ~0xfff)|voffset); */
+ vaddr, (pg_tbl_entry & ~0xfff)|voffset); */
SET_PSR_DAT (1);
cpustate->pending_trap = 1;
/* Dummy return. */
@@ -523,7 +523,7 @@ static UINT32 get_address_translation (i860s *cpustate, UINT32 vaddr, int is_dat
#ifdef TRACE_ADDR_TRANSLATION
fprintf (stderr, "get_address_translation: virt(0x%08x) -> phys(0x%08x)\n",
- vaddr, ret);
+ vaddr, ret);
#endif
return ret;
@@ -537,7 +537,7 @@ static UINT32 readmemi_emu (i860s *cpustate, UINT32 addr, int size)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "readmemi_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
- GET_DIRBASE_ATE (), addr, size);
+ GET_DIRBASE_ATE (), addr, size);
#endif
/* If virtual mode, do translation. */
@@ -548,7 +548,7 @@ static UINT32 readmemi_emu (i860s *cpustate, UINT32 addr, int size)
{
#ifdef TRACE_PAGE_FAULT
fprintf (stderr, "0x%08x: ## Page fault (readmemi_emu).\n",
- cpustate->pc);
+ cpustate->pc);
#endif
cpustate->exiting_readmem = 1;
return 0;
@@ -601,7 +601,7 @@ static void writememi_emu (i860s *cpustate, UINT32 addr, int size, UINT32 data)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "writememi_emu: (ATE=%d) addr = 0x%08x, size = %d, data = 0x%08x\n",
- GET_DIRBASE_ATE (), addr, size, data);
+ GET_DIRBASE_ATE (), addr, size, data);
#endif
/* If virtual mode, do translation. */
@@ -612,7 +612,7 @@ static void writememi_emu (i860s *cpustate, UINT32 addr, int size, UINT32 data)
{
#ifdef TRACE_PAGE_FAULT
fprintf (stderr, "0x%08x: ## Page fault (writememi_emu).\n",
- cpustate->pc);
+ cpustate->pc);
#endif
cpustate->exiting_readmem = 2;
return;
@@ -658,7 +658,7 @@ static void fp_readmem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *dest)
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "fp_readmem_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
- GET_DIRBASE_ATE (), addr, size);
+ GET_DIRBASE_ATE (), addr, size);
#endif
assert (size == 4 || size == 8 || size == 16);
@@ -671,7 +671,7 @@ static void fp_readmem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *dest)
{
#ifdef TRACE_PAGE_FAULT
fprintf (stderr, "0x%08x: ## Page fault (fp_readmem_emu).\n",
- cpustate->pc);
+ cpustate->pc);
#endif
cpustate->exiting_readmem = 3;
return;
@@ -725,7 +725,7 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
{
#ifdef TRACE_RDWR_MEM
fprintf (stderr, "fp_writemem_emu: (ATE=%d) addr = 0x%08x, size = %d\n",
- GET_DIRBASE_ATE (), addr, size);
+ GET_DIRBASE_ATE (), addr, size);
#endif
assert (size == 4 || size == 8 || size == 16);
@@ -738,7 +738,7 @@ static void fp_writemem_emu (i860s *cpustate, UINT32 addr, int size, UINT8 *data
{
#ifdef TRACE_PAGE_FAULT
fprintf (stderr, "0x%08x: ## Page fault (fp_writememi_emu).\n",
- cpustate->pc);
+ cpustate->pc);
#endif
cpustate->exiting_readmem = 4;
return;
@@ -820,10 +820,10 @@ static void dump_pipe (i860s *cpustate, int type)
{
if (cpustate->A[i].stat.arp)
fprintf (stderr, "[%dd] 0x%016llx ", i + 1,
- *(UINT64 *)(&cpustate->A[i].val.d));
+ *(UINT64 *)(&cpustate->A[i].val.d));
else
- fprintf (stderr, "[%ds] 0x%08x ", i + 1,
- *(UINT32 *)(&cpustate->A[i].val.s));
+ fprintf (stderr, "[%ds] 0x%08x ", i + 1,
+ *(UINT32 *)(&cpustate->A[i].val.s));
}
fprintf (stderr, "\n");
}
@@ -837,10 +837,10 @@ static void dump_pipe (i860s *cpustate, int type)
{
if (cpustate->M[i].stat.mrp)
fprintf (stderr, "[%dd] 0x%016llx ", i + 1,
- *(UINT64 *)(&cpustate->M[i].val.d));
+ *(UINT64 *)(&cpustate->M[i].val.d));
else
- fprintf (stderr, "[%ds] 0x%08x ", i + 1,
- *(UINT32 *)(&cpustate->M[i].val.s));
+ fprintf (stderr, "[%ds] 0x%08x ", i + 1,
+ *(UINT32 *)(&cpustate->M[i].val.s));
}
fprintf (stderr, "\n");
}
@@ -853,10 +853,10 @@ static void dump_pipe (i860s *cpustate, int type)
{
if (cpustate->L[i].stat.lrp)
fprintf (stderr, "[%dd] 0x%016llx ", i + 1,
- *(UINT64 *)(&cpustate->L[i].val.d));
+ *(UINT64 *)(&cpustate->L[i].val.d));
else
- fprintf (stderr, "[%ds] 0x%08x ", i + 1,
- *(UINT32 *)(&cpustate->L[i].val.s));
+ fprintf (stderr, "[%ds] 0x%08x ", i + 1,
+ *(UINT32 *)(&cpustate->L[i].val.s));
}
fprintf (stderr, "\n");
}
@@ -867,10 +867,10 @@ static void dump_pipe (i860s *cpustate, int type)
fprintf (stderr, " I: ");
if (cpustate->G.stat.irp)
fprintf (stderr, "[1d] 0x%016llx\n",
- *(UINT64 *)(&cpustate->G.val.d));
+ *(UINT64 *)(&cpustate->G.val.d));
else
- fprintf (stderr, "[1s] 0x%08x\n",
- *(UINT32 *)(&cpustate->G.val.s));
+ fprintf (stderr, "[1s] 0x%08x\n",
+ *(UINT32 *)(&cpustate->G.val.s));
}
}
@@ -900,16 +900,16 @@ static void dump_state (i860s *cpustate)
fprintf (stderr, "\n");
fprintf (stderr, " psr: CC = %d, LCC = %d, SC = %d, IM = %d, U = %d\n",
- GET_PSR_CC (), GET_PSR_LCC (), GET_PSR_SC (), GET_PSR_IM (),
- GET_PSR_U ());
+ GET_PSR_CC (), GET_PSR_LCC (), GET_PSR_SC (), GET_PSR_IM (),
+ GET_PSR_U ());
fprintf (stderr, " IT/FT/IAT/DAT/IN = %d/%d/%d/%d/%d\n",
- GET_PSR_IT (), GET_PSR_FT (), GET_PSR_IAT (),
- GET_PSR_DAT (), GET_PSR_IN ());
+ GET_PSR_IT (), GET_PSR_FT (), GET_PSR_IAT (),
+ GET_PSR_DAT (), GET_PSR_IN ());
fprintf (stderr, "epsr: INT = %d, OF = %d, BE = %d\n",
- GET_EPSR_INT (), GET_EPSR_OF (), GET_EPSR_BE ());
+ GET_EPSR_INT (), GET_EPSR_OF (), GET_EPSR_BE ());
fprintf (stderr, " fir: 0x%08x dirbase: 0x%08x fsr: 0x%08x\n",
- cpustate->cregs[CR_FIR], cpustate->cregs[CR_DIRBASE],
- cpustate->cregs[CR_FSR]);
+ cpustate->cregs[CR_FIR], cpustate->cregs[CR_DIRBASE],
+ cpustate->cregs[CR_FSR]);
fprintf (stderr, " pc: 0x%08x\n", cpustate->pc);
}
#endif
@@ -946,8 +946,8 @@ static void insn_ld_ctrl (i860s *cpustate, UINT32 insn)
#endif
/* If this is a load of the fir, then there are two cases:
- 1. First load of fir after a trap = usual value.
- 2. Not first load of fir after a trap = address of the ld.c insn. */
+ 1. First load of fir after a trap = usual value.
+ 2. Not first load of fir after a trap = address of the ld.c insn. */
if (csrc2 == CR_FIR)
{
if (cpustate->fir_gets_trap_addr)
@@ -960,7 +960,7 @@ static void insn_ld_ctrl (i860s *cpustate, UINT32 insn)
cpustate->fir_gets_trap_addr = 0;
}
else
- set_iregval (idest, cpustate->cregs[csrc2]);
+ set_iregval (idest, cpustate->cregs[csrc2]);
}
@@ -980,11 +980,11 @@ static void insn_st_ctrl (i860s *cpustate, UINT32 insn)
#endif
/* Look for ITI bit turned on (but it never actually is written --
- it always appears to be 0). */
+ it always appears to be 0). */
if (csrc2 == CR_DIRBASE && (get_iregval (isrc1) & 0x20))
{
/* NOTE: The actual icache and TLB flush are unimplemented for
- the MAME version. */
+ the MAME version. */
/* Make sure ITI isn't actually written. */
set_iregval (isrc1, (get_iregval (isrc1) & ~0x20));
@@ -1001,8 +1001,8 @@ static void insn_st_ctrl (i860s *cpustate, UINT32 insn)
{
UINT32 enew = 0, tmp = 0;
/* Make sure unchangeable EPSR bits stay unchanged (DCS, stepping,
- and type). Also, some bits are only writeable in supervisor
- mode. */
+ and type). Also, some bits are only writeable in supervisor
+ mode. */
if (GET_PSR_U ())
{
enew = get_iregval (isrc1) & ~(0x003e1fff | 0x00c06000);
@@ -1067,13 +1067,13 @@ static void insn_ldx (i860s *cpustate, UINT32 insn)
eff = (UINT32)(immsrc1 + (INT32)(get_iregval (isrc2)));
}
else
- eff = get_iregval (isrc1) + get_iregval (isrc2);
+ eff = get_iregval (isrc1) + get_iregval (isrc2);
#ifdef TRACE_UNALIGNED_MEM
if (eff & (size - 1))
{
fprintf (stderr, "0x%08x: Unaligned access detected (0x%08x).\n",
- cpustate->pc, eff);
+ cpustate->pc, eff);
SET_PSR_DAT (1);
cpustate->pending_trap = 1;
return;
@@ -1082,9 +1082,9 @@ static void insn_ldx (i860s *cpustate, UINT32 insn)
/* The i860 sign-extends 8- or 16-bit integer loads.
- Below, the readmemi_emu() needs to happen outside of the
- set_iregval macro (otherwise the readmem won't occur if r0
- is the target register). */
+ Below, the readmemi_emu() needs to happen outside of the
+ set_iregval macro (otherwise the readmem won't occur if r0
+ is the target register). */
if (size < 4)
{
UINT32 readval = sign_ext (readmemi_emu (cpustate, eff, size), size * 8);
@@ -1160,7 +1160,7 @@ static void insn_fsty (i860s *cpustate, UINT32 insn)
form_disp_reg = (insn & 0x04000000);
/* FIXME: Check for undefined behavior, non-even or non-quad
- register operands for fst.d and fst.q respectively. */
+ register operands for fst.d and fst.q respectively. */
/* Get effective address depending on disp+reg or reg+reg form. */
if (form_disp_reg)
@@ -1170,13 +1170,13 @@ static void insn_fsty (i860s *cpustate, UINT32 insn)
eff = (UINT32)(immsrc1 + (INT32)(get_iregval (isrc2)));
}
else
- eff = get_iregval (isrc1) + get_iregval (isrc2);
+ eff = get_iregval (isrc1) + get_iregval (isrc2);
#ifdef TRACE_UNALIGNED_MEM
if (eff & (size - 1))
{
fprintf (stderr, "0x%08x: Unaligned access detected (0x%08x).\n",
- cpustate->pc, eff);
+ cpustate->pc, eff);
SET_PSR_DAT (1);
cpustate->pending_trap = 1;
return;
@@ -1204,7 +1204,7 @@ static void insn_fsty (i860s *cpustate, UINT32 insn)
else if (size == 8)
fp_writemem_emu (cpustate, eff, size, (UINT8 *)(&cpustate->frg[4 * (31 - (fdest + 1))]), 0xff);
else
- fp_writemem_emu (cpustate, eff, size, (UINT8 *)(&cpustate->frg[4 * (31 - (fdest + 3))]), 0xff);
+ fp_writemem_emu (cpustate, eff, size, (UINT8 *)(&cpustate->frg[4 * (31 - (fdest + 3))]), 0xff);
}
@@ -1240,7 +1240,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
}
/* FIXME: Check for undefined behavior, non-even or non-quad
- register operands for fld.d and fld.q respectively. */
+ register operands for fld.d and fld.q respectively. */
/* Get effective address depending on disp+reg or reg+reg form. */
if (form_disp_reg)
@@ -1250,7 +1250,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
eff = (UINT32)(immsrc1 + (INT32)(get_iregval (isrc2)));
}
else
- eff = get_iregval (isrc1) + get_iregval (isrc2);
+ eff = get_iregval (isrc1) + get_iregval (isrc2);
/* Do (post) auto-increment. */
if (auto_inc)
@@ -1271,7 +1271,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
if (eff & (size - 1))
{
fprintf (stderr, "0x%08x: Unaligned access detected (0x%08x).\n",
- cpustate->pc, eff);
+ cpustate->pc, eff);
SET_PSR_DAT (1);
cpustate->pending_trap = 1;
return;
@@ -1284,7 +1284,7 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
{
/* Scalar version writes the current result to fdest. */
/* Read data at 'eff' into freg 'fdest' (reads to f0 or f1 are
- thrown away). */
+ thrown away). */
if (fdest > 1)
{
if (size == 4)
@@ -1298,17 +1298,17 @@ static void insn_fldy (i860s *cpustate, UINT32 insn)
else
{
/* Read the data into a temp space first. This way we can test
- for any traps before updating the pipeline. The pipeline must
- stay unaffected after a trap so that the instruction can be
- properly restarted. */
+ for any traps before updating the pipeline. The pipeline must
+ stay unaffected after a trap so that the instruction can be
+ properly restarted. */
UINT8 bebuf[8];
fp_readmem_emu (cpustate, eff, size, bebuf);
if (cpustate->pending_trap && cpustate->exiting_readmem)
goto ab_op;
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the LRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the LRP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage LRP to FSR. */
if (cpustate->L[1 /* 2 */].stat.lrp)
@@ -1368,7 +1368,7 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
int orig_pm = pm;
/* Get the pixel size, where:
- PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
+ PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
int ps = GET_PSR_PS ();
#ifdef TRACE_UNDEFINED_I860
@@ -1378,7 +1378,7 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
#ifdef TRACE_UNDEFINED_I860
/* Bits 2 and 1 determine the operand size, which must always be
- zero (indicating a 64-bit operand). */
+ zero (indicating a 64-bit operand). */
if (insn & 0x6)
{
/* Undefined i860XR behavior. */
@@ -1396,7 +1396,7 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
if (eff & (8 - 1))
{
fprintf (stderr, "0x%08x: Unaligned access detected (0x%08x).\n",
- cpustate->pc, eff);
+ cpustate->pc, eff);
SET_PSR_DAT (1);
cpustate->pending_trap = 1;
return;
@@ -1408,7 +1408,7 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
set_iregval (isrc2, eff);
/* Update the the pixel mask depending on the pixel size. Shift PM
- right by 8/2^ps bits. */
+ right by 8/2^ps bits. */
if (ps == 0)
pm = (pm >> 8) & 0x00;
else if (ps == 1)
@@ -1418,8 +1418,8 @@ static void insn_pstd (i860s *cpustate, UINT32 insn)
SET_PSR_PM (pm);
/* Write data (value of freg fdest) to memory at eff-- but only those
- bytes that are enabled by the bits in PSR.PM. Bit 0 of PM selects
- the pixel at the lowest address. */
+ bytes that are enabled by the bits in PSR.PM. Bit 0 of PM selects
+ the pixel at the lowest address. */
wmask = 0;
for (i = 0; i < 8; )
{
@@ -1478,15 +1478,15 @@ static void insn_addu (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = bit 31 carry
- CC = bit 31 carry.
- */
+ For unsigned:
+ OF = bit 31 carry
+ CC = bit 31 carry.
+ */
tmp = (UINT64)src1val + (UINT64)(get_iregval (isrc2));
if ((tmp >> 32) & 1)
{
@@ -1516,15 +1516,15 @@ static void insn_addu_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = bit 31 carry
- CC = bit 31 carry.
- */
+ For unsigned:
+ OF = bit 31 carry
+ CC = bit 31 carry.
+ */
tmp = (UINT64)src1val + (UINT64)(get_iregval (isrc2));
if ((tmp >> 32) & 1)
{
@@ -1554,23 +1554,23 @@ static void insn_adds (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 < -isrc1
- CC clear if isrc2 >= -isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 < -isrc1
+ CC clear if isrc2 >= -isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
if (sa != sb && sa != sres)
SET_EPSR_OF (1);
else
- SET_EPSR_OF (0);
+ SET_EPSR_OF (0);
if ((INT32)get_iregval (isrc2) < -(INT32)(src1val))
SET_PSR_CC (1);
@@ -1594,23 +1594,23 @@ static void insn_adds_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val + get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 < -isrc1
- CC clear if isrc2 >= -isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 < -isrc1
+ CC clear if isrc2 >= -isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
if (sa != sb && sa != sres)
SET_EPSR_OF (1);
else
- SET_EPSR_OF (0);
+ SET_EPSR_OF (0);
if ((INT32)get_iregval (isrc2) < -(INT32)(src1val))
SET_PSR_CC (1);
@@ -1633,17 +1633,17 @@ static void insn_subu (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = NOT(bit 31 carry)
- CC = bit 31 carry.
- (i.e. CC set if isrc2 <= isrc1
- CC clear if isrc2 > isrc1
- */
+ For unsigned:
+ OF = NOT(bit 31 carry)
+ CC = bit 31 carry.
+ (i.e. CC set if isrc2 <= isrc1
+ CC clear if isrc2 > isrc1
+ */
if ((UINT32)get_iregval (isrc2) <= (UINT32)src1val)
{
SET_PSR_CC (1);
@@ -1671,17 +1671,17 @@ static void insn_subu_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For unsigned:
- OF = NOT(bit 31 carry)
- CC = bit 31 carry.
- (i.e. CC set if isrc2 <= isrc1
- CC clear if isrc2 > isrc1
- */
+ For unsigned:
+ OF = NOT(bit 31 carry)
+ CC = bit 31 carry.
+ (i.e. CC set if isrc2 <= isrc1
+ CC clear if isrc2 > isrc1
+ */
if ((UINT32)get_iregval (isrc2) <= (UINT32)src1val)
{
SET_PSR_CC (1);
@@ -1710,23 +1710,23 @@ static void insn_subs (i860s *cpustate, UINT32 insn)
src1val = get_iregval (get_isrc1 (insn));
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 > isrc1
- CC clear if isrc2 <= isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 > isrc1
+ CC clear if isrc2 <= isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
if (sa != sb && sa != sres)
SET_EPSR_OF (1);
else
- SET_EPSR_OF (0);
+ SET_EPSR_OF (0);
if ((INT32)get_iregval (isrc2) > (INT32)(src1val))
SET_PSR_CC (1);
@@ -1750,23 +1750,23 @@ static void insn_subs_imm (i860s *cpustate, UINT32 insn)
src1val = sign_ext (get_imm16 (insn), 16);
/* We don't update the actual idest register now because below we
- need to test the original src1 and src2 if either happens to
- be the destination register. */
+ need to test the original src1 and src2 if either happens to
+ be the destination register. */
tmp_dest_val = src1val - get_iregval (isrc2);
/* Set OF and CC flags.
- For signed:
- OF = standard signed overflow.
- CC set if isrc2 > isrc1
- CC clear if isrc2 <= isrc1
- */
+ For signed:
+ OF = standard signed overflow.
+ CC set if isrc2 > isrc1
+ CC clear if isrc2 <= isrc1
+ */
sa = src1val & 0x80000000;
sb = get_iregval (isrc2) & 0x80000000;
sres = tmp_dest_val & 0x80000000;
if (sa != sb && sa != sres)
SET_EPSR_OF (1);
else
- SET_EPSR_OF (0);
+ SET_EPSR_OF (0);
if ((INT32)get_iregval (isrc2) > (INT32)(src1val))
SET_PSR_CC (1);
@@ -1874,7 +1874,7 @@ static void insn_shrd (i860s *cpustate, UINT32 insn)
UINT32 tmp;
/* Do the operation:
- idest = low_32(isrc1ni:isrc2 >> sc). */
+ idest = low_32(isrc1ni:isrc2 >> sc). */
if (sc == 0)
tmp = get_iregval (isrc2);
else
@@ -2202,7 +2202,7 @@ static void insn_bte_imm (i860s *cpustate, UINT32 insn)
INT32 sbroff = 0;
int res = 0;
- src1val = (insn >> 11) & 0x1f; /* 5-bit field, zero-extended. */
+ src1val = (insn >> 11) & 0x1f; /* 5-bit field, zero-extended. */
/* Compute the target address from the sbroff field. */
sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
@@ -2258,7 +2258,7 @@ static void insn_btne_imm (i860s *cpustate, UINT32 insn)
INT32 sbroff = 0;
int res = 0;
- src1val = (insn >> 11) & 0x1f; /* 5-bit field, zero-extended. */
+ src1val = (insn >> 11) & 0x1f; /* 5-bit field, zero-extended. */
/* Compute the target address from the sbroff field. */
sbroff = sign_ext ((((insn >> 5) & 0xf800) | (insn & 0x07ff)), 16);
@@ -2316,7 +2316,7 @@ static void insn_bnc (i860s *cpustate, UINT32 insn)
res = (GET_PSR_CC () == 0);
/* Branch routines always update the PC, since pc_updated is set
- in the decode routine. */
+ in the decode routine. */
if (res)
cpustate->pc = target_addr;
else
@@ -2342,7 +2342,7 @@ static void insn_bct (i860s *cpustate, UINT32 insn)
res = (GET_PSR_CC () == 1);
/* Careful. Unlike bla, the delay slot instruction is only executed
- if the branch is taken. */
+ if the branch is taken. */
if (res)
{
/* Execute delay slot instruction. */
@@ -2357,7 +2357,7 @@ static void insn_bct (i860s *cpustate, UINT32 insn)
}
/* Since this branch is delayed, we must jump 2 instructions if
- if isn't taken. */
+ if isn't taken. */
if (res)
cpustate->pc = target_addr;
else
@@ -2386,7 +2386,7 @@ static void insn_bnct (i860s *cpustate, UINT32 insn)
res = (GET_PSR_CC () == 0);
/* Careful. Unlike bla, the delay slot instruction is only executed
- if the branch is taken. */
+ if the branch is taken. */
if (res)
{
/* Execute delay slot instruction. */
@@ -2401,7 +2401,7 @@ static void insn_bnct (i860s *cpustate, UINT32 insn)
}
/* Since this branch is delayed, we must jump 2 instructions if
- if isn't taken. */
+ if isn't taken. */
if (res)
cpustate->pc = target_addr;
else
@@ -2502,10 +2502,10 @@ static void insn_bri (i860s *cpustate, UINT32 insn)
}
/* If any trap bits are set, we need to do the return from
- trap work. Note, we must use the PSR value that existed
- before the delay slot instruction was executed since the
- delay slot instruction might itself cause a trap bit to
- be set. */
+ trap work. Note, we must use the PSR value that existed
+ before the delay slot instruction was executed since the
+ delay slot instruction might itself cause a trap bit to
+ be set. */
if (orig_psr & PSR_ALL_TRAP_BITS_MASK)
{
/* Restore U and IM from their previous copies. */
@@ -2605,7 +2605,7 @@ static void insn_bla (i860s *cpustate, UINT32 insn)
else
{
/* Since this branch is delayed, we must jump 2 instructions if
- if isn't taken. */
+ if isn't taken. */
cpustate->pc += 8;
}
SET_PSR_LCC (lcc_tmp);
@@ -2624,14 +2624,14 @@ static void insn_flush (i860s *cpustate, UINT32 insn)
UINT32 eff = 0;
/* Technically, idest should be encoded as r0 because idest
- is undefined after the instruction. We don't currently
- check for this.
+ is undefined after the instruction. We don't currently
+ check for this.
- Flush D$ block at address #const+isrc2. Block is undefined
- after. The effective address must be 16-byte aligned.
+ Flush D$ block at address #const+isrc2. Block is undefined
+ after. The effective address must be 16-byte aligned.
- FIXME: Need to examine RB and RC and do this right.
- */
+ FIXME: Need to examine RB and RC and do this right.
+ */
/* Chop off lower bits of displacement to 16-byte alignment. */
src1val &= ~(16-1);
@@ -2643,8 +2643,8 @@ static void insn_flush (i860s *cpustate, UINT32 insn)
if (GET_PSR_U () == 0)
{
/* If line is dirty, write it to memory and invalidate.
- NOTE: The actual dirty write is unimplemented in the MAME version
- as we don't emulate the dcache. */
+ NOTE: The actual dirty write is unimplemented in the MAME version
+ as we don't emulate the dcache. */
}
}
@@ -2659,9 +2659,9 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
float sgl_tmp_dest = 0.0;
double dbl_last_stage_contents = 0.0;
@@ -2684,28 +2684,28 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
}
/* For pipelined version, retrieve the contents of the last stage
- of the pipeline, whose precision is specified by the MRP bit
- of the stage's result-status bits. Note for pfmul, the number
- of stages is determined by the source precision of the current
- operation. */
+ of the pipeline, whose precision is specified by the MRP bit
+ of the stage's result-status bits. Note for pfmul, the number
+ of stages is determined by the source precision of the current
+ operation. */
if (piped)
{
if (cpustate->M[num_stages - 1].stat.mrp)
dbl_last_stage_contents = cpustate->M[num_stages - 1].val.d;
else
- sgl_last_stage_contents = cpustate->M[num_stages - 1].val.s;
+ sgl_last_stage_contents = cpustate->M[num_stages - 1].val.s;
}
/* Do the operation, being careful about source and result
- precision. */
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
double v2 = get_fregval_d (cpustate, fsrc2);
/* For pipelined mul, if fsrc2 is the same as fdest, then the last
- stage is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ stage is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && piped && fdest != 0 && fsrc1 == fdest)
v1 = dbl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2722,8 +2722,8 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
float v2 = get_fregval_s (cpustate, fsrc2);
/* For pipelined mul, if fsrc2 is the same as fdest, then the last
- stage is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ stage is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && piped && fdest != 0 && fsrc1 == fdest)
v1 = sgl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2736,13 +2736,13 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
}
/* FIXME: Set result-status bits besides MRP. And copy to fsr from
- last stage. */
+ last stage. */
/* FIXME: Scalar version flows through all stages. */
/* FIXME: Mixed precision (only weird for pfmul). */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -2751,10 +2751,10 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline. */
+ stage of the pipeline. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage MRP to FSR. */
- if (cpustate->M[num_stages - 2 /* 1 */].stat.mrp)
+ if (cpustate->M[num_stages - 2 /* 1 */].stat.mrp)
cpustate->cregs[CR_FSR] |= 0x10000000;
else
cpustate->cregs[CR_FSR] &= ~0x10000000;
@@ -2766,14 +2766,14 @@ static void insn_fmul (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, sgl_last_stage_contents);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
if (num_stages == 3)
{
cpustate->M[2] = cpustate->M[1];
cpustate->M[1] = cpustate->M[0];
}
else
- cpustate->M[1] = cpustate->M[0];
+ cpustate->M[1] = cpustate->M[0];
if (res_prec)
{
@@ -2810,9 +2810,9 @@ static void insn_fmlow (i860s *cpustate, UINT32 insn)
}
/* The lower 32-bits are obvious. What exactly goes in the upper
- bits?
- Technically, the upper-most 10 bits are undefined, but i'd like
- to be undefined in the same way as the real i860 if possible. */
+ bits?
+ Technically, the upper-most 10 bits are undefined, but i'd like
+ to be undefined in the same way as the real i860 if possible. */
/* Keep lower 53 bits of multiply. */
tmp = i1 * i2;
@@ -2828,10 +2828,10 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
- int is_sub = insn & 1; /* 1 = sub, 0 = add. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int is_sub = insn & 1; /* 1 = sub, 0 = add. */
double dbl_tmp_dest = 0.0;
float sgl_tmp_dest = 0.0;
double dbl_last_stage_contents = 0.0;
@@ -2845,27 +2845,27 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
}
/* For pipelined version, retrieve the contents of the last stage
- of the pipeline, whose precision is specified by the ARP bit
- of the stage's result-status bits. There are always three stages
- for pfadd/pfsub. */
+ of the pipeline, whose precision is specified by the ARP bit
+ of the stage's result-status bits. There are always three stages
+ for pfadd/pfsub. */
if (piped)
{
if (cpustate->A[2].stat.arp)
dbl_last_stage_contents = cpustate->A[2].val.d;
else
- sgl_last_stage_contents = cpustate->A[2].val.s;
+ sgl_last_stage_contents = cpustate->A[2].val.s;
}
/* Do the operation, being careful about source and result
- precision. */
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
double v2 = get_fregval_d (cpustate, fsrc2);
/* For pipelined add/sub, if fsrc1 is the same as fdest, then the last
- stage is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ stage is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (piped && fdest != 0 && fsrc1 == fdest)
v1 = dbl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2882,8 +2882,8 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
float v2 = get_fregval_s (cpustate, fsrc2);
/* For pipelined add/sub, if fsrc1 is the same as fdest, then the last
- stage is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ stage is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (piped && fdest != 0 && fsrc1 == fdest)
v1 = sgl_last_stage_contents;
if (piped && fdest != 0 && fsrc2 == fdest)
@@ -2896,12 +2896,12 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
}
/* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ last stage. */
/* FIXME: Scalar version flows through all stages. */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -2910,8 +2910,8 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -2925,7 +2925,7 @@ static void insn_fadd_sub (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, sgl_last_stage_contents);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (res_prec)
@@ -3081,10 +3081,10 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
- int is_pfam = insn & 0x400; /* 1 = pfam, 0 = pfmam. */
- int is_sub = insn & 0x10; /* 1 = pf[m]sm, 0 = pf[m]am. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int is_pfam = insn & 0x400; /* 1 = pfam, 0 = pfmam. */
+ int is_sub = insn & 0x10; /* 1 = pf[m]sm, 0 = pf[m]am. */
double dbl_tmp_dest_mul = 0.0;
float sgl_tmp_dest_mul = 0.0;
double dbl_tmp_dest_add = 0.0;
@@ -3120,7 +3120,7 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
}
/* PFMAM table adjustments (M_unit_op1 is never a pipe stage,
- so no adjustment made for it). */
+ so no adjustment made for it). */
M_unit_op2 = (M_unit_op2 & FLAGM) ? OP_MPIPE : M_unit_op2;
A_unit_op1 = (A_unit_op1 & FLAGM) ? OP_MPIPE : A_unit_op1;
A_unit_op2 = (A_unit_op2 & FLAGM) ? OP_MPIPE : A_unit_op2;
@@ -3129,9 +3129,9 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
/* FIXME: Check for fsrc1/fdest overlap for some mul DPC combinations. */
/* Retrieve the contents of the last stage of the multiplier pipeline,
- whose precision is specified by the MRP bit of the stage's result-
- status bits. Note for multiply, the number of stages is determined
- by the source precision of the current operation. */
+ whose precision is specified by the MRP bit of the stage's result-
+ status bits. Note for multiply, the number of stages is determined
+ by the source precision of the current operation. */
if (cpustate->M[num_mul_stages - 1].stat.mrp)
dbl_last_Mstage_contents = cpustate->M[num_mul_stages - 1].val.d;
else
@@ -3144,15 +3144,15 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
sgl_last_Astage_contents = cpustate->A[2].val.s;
/* Do the mul operation, being careful about source and result
- precision. */
+ precision. */
if (src_prec)
{
double v1 = get_fval_from_optype_d (cpustate, insn, M_unit_op1);
double v2 = get_fval_from_optype_d (cpustate, insn, M_unit_op2);
/* For mul, if fsrc2 is the same as fdest, then the last stage
- is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && M_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? dbl_last_Astage_contents : dbl_last_Mstage_contents;
if (M_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3169,8 +3169,8 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
float v2 = get_fval_from_optype_s (cpustate, insn, M_unit_op2);
/* For mul, if fsrc2 is the same as fdest, then the last stage
- is bypassed to fsrc2 (rather than using the value in fsrc2).
- This bypass is not available for fsrc1, and is undefined behavior. */
+ is bypassed to fsrc2 (rather than using the value in fsrc2).
+ This bypass is not available for fsrc1, and is undefined behavior. */
if (0 && M_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? sgl_last_Astage_contents : sgl_last_Mstage_contents;
if (M_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3183,16 +3183,16 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
}
/* Do the add operation, being careful about source and result
- precision. Remember, the R bit indicates source and result precision
- here. */
+ precision. Remember, the R bit indicates source and result precision
+ here. */
if (res_prec)
{
double v1 = get_fval_from_optype_d (cpustate, insn, A_unit_op1);
double v2 = get_fval_from_optype_d (cpustate, insn, A_unit_op2);
/* For add/sub, if fsrc1 is the same as fdest, then the last stage
- is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (A_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? dbl_last_Astage_contents : dbl_last_Mstage_contents;
if (A_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3209,8 +3209,8 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
float v2 = get_fval_from_optype_s (cpustate, insn, A_unit_op2);
/* For add/sub, if fsrc1 is the same as fdest, then the last stage
- is bypassed to fsrc1 (rather than using the value in fsrc1).
- Likewise for fsrc2. */
+ is bypassed to fsrc1 (rather than using the value in fsrc1).
+ Likewise for fsrc2. */
if (A_unit_op1 == OP_SRC1 && fdest != 0 && fsrc1 == fdest)
v1 = is_pfam ? sgl_last_Astage_contents : sgl_last_Mstage_contents;
if (A_unit_op2 == OP_SRC2 && fdest != 0 && fsrc2 == fdest)
@@ -3241,26 +3241,26 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
if (src_prec)
cpustate->KI.d = get_fregval_d (cpustate, fsrc1);
else
- cpustate->KI.s = get_fregval_s (cpustate, fsrc1);
+ cpustate->KI.s = get_fregval_s (cpustate, fsrc1);
}
else if (M_unit_op1 == OP_KR)
{
if (src_prec)
cpustate->KR.d = get_fregval_d (cpustate, fsrc1);
else
- cpustate->KR.s = get_fregval_s (cpustate, fsrc1);
+ cpustate->KR.s = get_fregval_s (cpustate, fsrc1);
}
else
assert (0);
}
/* Now update fdest (either from adder pipe or multiplier pipe,
- depending on whether the instruction is pfam or pfmam). */
+ depending on whether the instruction is pfam or pfmam). */
if (is_pfam)
{
/* Update fdest with the result from the last stage of the
- adder pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ adder pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
if (cpustate->A[2].stat.arp)
set_fregval_d (cpustate, fdest, dbl_last_Astage_contents);
else
@@ -3269,8 +3269,8 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
else
{
/* Update fdest with the result from the last stage of the
- multiplier pipeline, with precision specified by the MRP
- bit of the stage's result-status bits. */
+ multiplier pipeline, with precision specified by the MRP
+ bit of the stage's result-status bits. */
if (cpustate->M[num_mul_stages - 1].stat.mrp)
set_fregval_d (cpustate, fdest, dbl_last_Mstage_contents);
else
@@ -3278,25 +3278,25 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
}
/* FIXME: Set result-status bits besides MRP. And copy to fsr from
- last stage. */
+ last stage. */
/* FIXME: Mixed precision (only weird for pfmul). */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage MRP to FSR. */
- if (cpustate->M[num_mul_stages - 2 /* 1 */].stat.mrp)
+ if (cpustate->M[num_mul_stages - 2 /* 1 */].stat.mrp)
cpustate->cregs[CR_FSR] |= 0x10000000;
else
cpustate->cregs[CR_FSR] &= ~0x10000000;
#endif
/* Now advance multiplier pipeline and write current calculation to
- first stage. */
+ first stage. */
if (num_mul_stages == 3)
{
cpustate->M[2] = cpustate->M[1];
cpustate->M[1] = cpustate->M[0];
}
else
- cpustate->M[1] = cpustate->M[0];
+ cpustate->M[1] = cpustate->M[0];
if (res_prec)
{
@@ -3310,7 +3310,7 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
}
/* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ last stage. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -3320,7 +3320,7 @@ static void insn_dualop (i860s *cpustate, UINT32 insn)
#endif
/* Now advance adder pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (res_prec)
@@ -3341,11 +3341,11 @@ static void insn_frcp (i860s *cpustate, UINT32 insn)
{
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
/* Do the operation, being careful about source and result
- precision. */
+ precision. */
if (src_prec)
{
double v = get_fregval_d (cpustate, fsrc2);
@@ -3364,7 +3364,7 @@ static void insn_frcp (i860s *cpustate, UINT32 insn)
else
{
/* Real i860 isn't a precise as a real divide, but this should
- be okay. */
+ be okay. */
SET_FSR_SE (0);
*((UINT64 *)&v) &= 0xfffff00000000000ULL;
res = (double)1.0/v;
@@ -3393,7 +3393,7 @@ static void insn_frcp (i860s *cpustate, UINT32 insn)
else
{
/* Real i860 isn't a precise as a real divide, but this should
- be okay. */
+ be okay. */
SET_FSR_SE (0);
*((UINT32 *)&v) &= 0xffff8000;
res = (float)1.0/v;
@@ -3412,8 +3412,8 @@ static void insn_frsqr (i860s *cpustate, UINT32 insn)
{
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
/* Check for invalid .ds combination. */
if ((insn & 0x180) == 0x100)
@@ -3430,7 +3430,7 @@ static void insn_frsqr (i860s *cpustate, UINT32 insn)
}
/* Do the operation, being careful about source and result
- precision. */
+ precision. */
if (src_prec)
{
double v = get_fregval_d (cpustate, fsrc2);
@@ -3513,9 +3513,9 @@ static void insn_ftrunc (i860s *cpustate, UINT32 insn)
{
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
/* Check for invalid .ds or .ss combinations. */
if ((insn & 0x080) == 0)
@@ -3525,14 +3525,14 @@ static void insn_ftrunc (i860s *cpustate, UINT32 insn)
}
/* Do the operation, being careful about source and result
- precision. Operation: fdest = integer part of fsrc1 in
- lower 32-bits. */
+ precision. Operation: fdest = integer part of fsrc1 in
+ lower 32-bits. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
INT32 iv = (INT32)v1;
/* We always write a single, since the lower 32-bits of fdest
- get the result (and the even numbered reg is the lower). */
+ get the result (and the even numbered reg is the lower). */
set_fregval_s (cpustate, fdest, *(float *)&iv);
}
else
@@ -3540,7 +3540,7 @@ static void insn_ftrunc (i860s *cpustate, UINT32 insn)
float v1 = get_fregval_s (cpustate, fsrc1);
INT32 iv = (INT32)v1;
/* We always write a single, since the lower 32-bits of fdest
- get the result (and the even numbered reg is the lower). */
+ get the result (and the even numbered reg is the lower). */
set_fregval_s (cpustate, fdest, *(float *)&iv);
}
@@ -3562,14 +3562,14 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
{
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
double sgl_tmp_dest = 0.0;
/* Do the operation, being careful about source and result
- precision. */
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
@@ -3588,12 +3588,12 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
}
/* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ last stage. */
/* FIXME: Scalar version flows through all stages. */
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -3602,8 +3602,8 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -3617,7 +3617,7 @@ static void insn_famov (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, cpustate->A[2].val.s);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (res_prec)
@@ -3640,10 +3640,10 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
- int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
- int is_sub = insn & 0x4; /* 1 = sub, 0 = add. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int res_prec = insn & 0x080; /* 1 = double, 0 = single. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int is_sub = insn & 0x4; /* 1 = sub, 0 = add. */
double dbl_tmp_dest = 0.0;
float sgl_tmp_dest = 0.0;
@@ -3656,7 +3656,7 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
}
/* Do the operation, being careful about source and result
- precision. */
+ precision. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
@@ -3671,7 +3671,7 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
if (res_prec)
dbl_tmp_dest = *(double *)&r;
else
- assert (0); /* .ds not allowed. */
+ assert (0); /* .ds not allowed. */
}
else
{
@@ -3685,7 +3685,7 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
else
r = (UINT32)(iv1 + iv2);
if (res_prec)
- assert (0); /* .sd not allowed. */
+ assert (0); /* .sd not allowed. */
else
sgl_tmp_dest = *(float *)&r;
}
@@ -3695,7 +3695,7 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, with precision specified by the R bit. */
+ register, with precision specified by the R bit. */
if (res_prec)
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
else
@@ -3704,8 +3704,8 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy stage IRP to FSR. */
if (res_prec)
@@ -3713,7 +3713,7 @@ static void insn_fiadd_sub (i860s *cpustate, UINT32 insn)
else
cpustate->cregs[CR_FSR] &= ~0x08000000;
#endif
- if (cpustate->G.stat.irp) /* 1st (and last) stage. */
+ if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
set_fregval_s (cpustate, fdest, cpustate->G.val.s);
@@ -3740,7 +3740,7 @@ static void insn_fcmp (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
+ int src_prec = insn & 0x100; /* 1 = double, 0 = single. */
double dbl_tmp_dest = 0.0;
double sgl_tmp_dest = 0.0;
/* int is_eq = insn & 1; */
@@ -3748,41 +3748,41 @@ static void insn_fcmp (i860s *cpustate, UINT32 insn)
int is_le = ((insn & 0x81) == 0x80);
/* Do the operation. Source and result precision must be the same.
- pfgt: CC set if fsrc1 > fsrc2, else cleared.
- pfle: CC cleared if fsrc1 <= fsrc2, else set.
- pfeq: CC set if fsrc1 = fsrc2, else cleared.
+ pfgt: CC set if fsrc1 > fsrc2, else cleared.
+ pfle: CC cleared if fsrc1 <= fsrc2, else set.
+ pfeq: CC set if fsrc1 = fsrc2, else cleared.
- Note that the compares write an undefined (but non-exceptional)
- result into the first stage of the adder pipeline. We'll model
- this by just pushing in dbl_ or sgl_tmp_dest which equal 0.0. */
+ Note that the compares write an undefined (but non-exceptional)
+ result into the first stage of the adder pipeline. We'll model
+ this by just pushing in dbl_ or sgl_tmp_dest which equal 0.0. */
if (src_prec)
{
double v1 = get_fregval_d (cpustate, fsrc1);
double v2 = get_fregval_d (cpustate, fsrc2);
- if (is_gt) /* gt. */
+ if (is_gt) /* gt. */
SET_PSR_CC (v1 > v2 ? 1 : 0);
- else if (is_le) /* le. */
+ else if (is_le) /* le. */
SET_PSR_CC (v1 <= v2 ? 0 : 1);
- else /* eq. */
+ else /* eq. */
SET_PSR_CC (v1 == v2 ? 1 : 0);
}
else
{
float v1 = get_fregval_s (cpustate, fsrc1);
float v2 = get_fregval_s (cpustate, fsrc2);
- if (is_gt) /* gt. */
+ if (is_gt) /* gt. */
SET_PSR_CC (v1 > v2 ? 1 : 0);
- else if (is_le) /* le. */
+ else if (is_le) /* le. */
SET_PSR_CC (v1 <= v2 ? 0 : 1);
- else /* eq. */
+ else /* eq. */
SET_PSR_CC (v1 == v2 ? 1 : 0);
}
/* FIXME: Set result-status bits besides ARP. And copy to fsr from
- last stage. */
+ last stage. */
/* These write fdest with the result from the last
- stage of the pipeline, with precision specified by the ARP
- bit of the stage's result-status bits. */
+ stage of the pipeline, with precision specified by the ARP
+ bit of the stage's result-status bits. */
#if 1 /* FIXME: WIP on FSR update. This may not be correct. */
/* Copy 3rd stage ARP to FSR. */
if (cpustate->A[1 /* 2 */].stat.arp)
@@ -3796,7 +3796,7 @@ static void insn_fcmp (i860s *cpustate, UINT32 insn)
set_fregval_s (cpustate, fdest, cpustate->A[2].val.s);
/* Now advance pipeline and write current calculation to
- first stage. */
+ first stage. */
cpustate->A[2] = cpustate->A[1];
cpustate->A[1] = cpustate->A[0];
if (src_prec)
@@ -3819,8 +3819,8 @@ static void insn_fzchk (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
- int is_fzchks = insn & 8; /* 1 = fzchks, 0 = fzchkl. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int is_fzchks = insn & 8; /* 1 = fzchks, 0 = fzchkl. */
double dbl_tmp_dest = 0.0;
int i;
double v1 = get_fregval_d (cpustate, fsrc1);
@@ -3838,8 +3838,8 @@ static void insn_fzchk (i860s *cpustate, UINT32 insn)
}
/* Do the operation. The fzchks version operates in parallel on
- four 16-bit pixels, while the fzchkl operates on two 32-bit
- pixels (pixels are unsigned ordinals in this context). */
+ four 16-bit pixels, while the fzchkl operates on two 32-bit
+ pixels (pixels are unsigned ordinals in this context). */
if (is_fzchks)
{
pm = (pm >> 4) & 0x0f;
@@ -3888,15 +3888,15 @@ static void insn_fzchk (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
- if (cpustate->G.stat.irp) /* 1st (and last) stage. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
+ if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
set_fregval_s (cpustate, fdest, cpustate->G.val.s);
@@ -3914,7 +3914,7 @@ static void insn_form (i860s *cpustate, UINT32 insn)
{
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fdest = get_fdest (insn);
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
double v1 = get_fregval_d (cpustate, fsrc1);
UINT64 iv1 = *(UINT64 *)&v1;
@@ -3935,15 +3935,15 @@ static void insn_form (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
- if (cpustate->G.stat.irp) /* 1st (and last) stage. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
+ if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
set_fregval_s (cpustate, fdest, cpustate->G.val.s);
@@ -3961,7 +3961,7 @@ static void insn_faddp (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
double v1 = get_fregval_d (cpustate, fsrc1);
double v2 = get_fregval_d (cpustate, fsrc2);
@@ -3974,7 +3974,7 @@ static void insn_faddp (i860s *cpustate, UINT32 insn)
dbl_tmp_dest = *(double *)&r;
/* Update the merge register depending on the pixel size.
- PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
+ PS: 0 = 8 bits, 1 = 16 bits, 2 = 32-bits. */
if (ps == 0)
{
cpustate->merge = ((cpustate->merge >> 8) & ~0xff00ff00ff00ff00ULL);
@@ -3992,7 +3992,7 @@ static void insn_faddp (i860s *cpustate, UINT32 insn)
}
#ifdef TRACE_UNDEFINED_I860
else
- fprintf (stderr, "insn_faddp: Undefined i860XR behavior, invalid value %d for pixel size.\n", ps);
+ fprintf (stderr, "insn_faddp: Undefined i860XR behavior, invalid value %d for pixel size.\n", ps);
#endif
/* FIXME: Copy result-status bit IRP to fsr from last stage. */
@@ -4000,15 +4000,15 @@ static void insn_faddp (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
- if (cpustate->G.stat.irp) /* 1st (and last) stage. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
+ if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
set_fregval_s (cpustate, fdest, cpustate->G.val.s);
@@ -4026,7 +4026,7 @@ static void insn_faddz (i860s *cpustate, UINT32 insn)
UINT32 fsrc1 = get_fsrc1 (insn);
UINT32 fsrc2 = get_fsrc2 (insn);
UINT32 fdest = get_fdest (insn);
- int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
+ int piped = insn & 0x400; /* 1 = pipelined, 0 = scalar. */
double dbl_tmp_dest = 0.0;
double v1 = get_fregval_d (cpustate, fsrc1);
double v2 = get_fregval_d (cpustate, fsrc2);
@@ -4046,15 +4046,15 @@ static void insn_faddz (i860s *cpustate, UINT32 insn)
if (!piped)
{
/* Scalar version writes the current calculation to the fdest
- register, always with double precision. */
+ register, always with double precision. */
set_fregval_d (cpustate, fdest, dbl_tmp_dest);
}
else
{
/* Pipelined version writes fdest with the result from the last
- stage of the pipeline, with precision specified by the IRP
- bit of the stage's result-status bits. */
- if (cpustate->G.stat.irp) /* 1st (and last) stage. */
+ stage of the pipeline, with precision specified by the IRP
+ bit of the stage's result-status bits. */
+ if (cpustate->G.stat.irp) /* 1st (and last) stage. */
set_fregval_d (cpustate, fdest, cpustate->G.val.d);
else
set_fregval_s (cpustate, fdest, cpustate->G.val.s);
@@ -4085,8 +4085,8 @@ struct decode_tbl_t {
/* First-level decode table (i.e., for the 6 primary opcode bits). */
static const decode_tbl_t decode_tbl[64] = {
/* A slight bit of decoding for loads and stores is done in the
- execution routines (operand size and addressing mode), which
- is why their respective entries are identical. */
+ execution routines (operand size and addressing mode), which
+ is why their respective entries are identical. */
{ insn_ldx, DEC_DECODED}, /* ld.b isrc1(isrc2),idest. */
{ insn_ldx, DEC_DECODED}, /* ld.b #const(isrc2),idest. */
{ insn_ixfr, DEC_DECODED}, /* ixfr isrc1ni,fdest. */
@@ -4157,23 +4157,23 @@ static const decode_tbl_t decode_tbl[64] = {
/* Second-level decode table (i.e., for the 3 core escape opcode bits). */
static const decode_tbl_t core_esc_decode_tbl[8] = {
{ 0, 0},
- { 0, 0}, /* lock (FIXME: unimplemented). */
+ { 0, 0}, /* lock (FIXME: unimplemented). */
{ insn_calli, DEC_DECODED}, /* calli isrc1ni. */
{ 0, 0},
{ insn_intovr, DEC_DECODED}, /* intovr. */
{ 0, 0},
{ 0, 0},
- { 0, 0}, /* unlock (FIXME: unimplemented). */
+ { 0, 0}, /* unlock (FIXME: unimplemented). */
};
/* Second-level decode table (i.e., for the 7 FP extended opcode bits). */
static const decode_tbl_t fp_decode_tbl[128] = {
/* Floating point instructions. The least significant 7 bits are
- the (extended) opcode and bits 10:7 are P,D,S,R respectively
- ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
- For some operations, I defer decoding the P,S,R bits to the
- emulation routine for them. */
+ the (extended) opcode and bits 10:7 are P,D,S,R respectively
+ ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
+ For some operations, I defer decoding the P,S,R bits to the
+ emulation routine for them. */
{ insn_dualop, DEC_DECODED}, /* 0x00 pf[m]am */
{ insn_dualop, DEC_DECODED}, /* 0x01 pf[m]am */
{ insn_dualop, DEC_DECODED}, /* 0x02 pf[m]am */
@@ -4211,97 +4211,97 @@ static const decode_tbl_t fp_decode_tbl[128] = {
{ insn_frcp, DEC_DECODED}, /* 0x22 frcp.{ss,sd,dd} */
{ insn_frsqr, DEC_DECODED}, /* 0x23 frsqr.{ss,sd,dd} */
{ insn_fmul, DEC_DECODED}, /* 0x24 pfmul3.dd */
- { 0, 0}, /* 0x25 */
- { 0, 0}, /* 0x26 */
- { 0, 0}, /* 0x27 */
- { 0, 0}, /* 0x28 */
- { 0, 0}, /* 0x29 */
- { 0, 0}, /* 0x2A */
- { 0, 0}, /* 0x2B */
- { 0, 0}, /* 0x2C */
- { 0, 0}, /* 0x2D */
- { 0, 0}, /* 0x2E */
- { 0, 0}, /* 0x2F */
+ { 0, 0}, /* 0x25 */
+ { 0, 0}, /* 0x26 */
+ { 0, 0}, /* 0x27 */
+ { 0, 0}, /* 0x28 */
+ { 0, 0}, /* 0x29 */
+ { 0, 0}, /* 0x2A */
+ { 0, 0}, /* 0x2B */
+ { 0, 0}, /* 0x2C */
+ { 0, 0}, /* 0x2D */
+ { 0, 0}, /* 0x2E */
+ { 0, 0}, /* 0x2F */
{ insn_fadd_sub, DEC_DECODED}, /* 0x30, [p]fadd.{ss,sd,dd} */
{ insn_fadd_sub, DEC_DECODED}, /* 0x31, [p]fsub.{ss,sd,dd} */
- { 0, 0}, /* 0x32, [p]fix.{ss,sd,dd} FIXME: nyi. */
+ { 0, 0}, /* 0x32, [p]fix.{ss,sd,dd} FIXME: nyi. */
{ insn_famov, DEC_DECODED}, /* 0x33, [p]famov.{ss,sd,ds,dd} */
{ insn_fcmp, DEC_DECODED}, /* 0x34, pf{gt,le}.{ss,dd} */
{ insn_fcmp, DEC_DECODED}, /* 0x35, pfeq.{ss,dd} */
- { 0, 0}, /* 0x36 */
- { 0, 0}, /* 0x37 */
- { 0, 0}, /* 0x38 */
- { 0, 0}, /* 0x39 */
+ { 0, 0}, /* 0x36 */
+ { 0, 0}, /* 0x37 */
+ { 0, 0}, /* 0x38 */
+ { 0, 0}, /* 0x39 */
{ insn_ftrunc, DEC_DECODED}, /* 0x3A, [p]ftrunc.{ss,sd,dd} */
- { 0, 0}, /* 0x3B */
- { 0, 0}, /* 0x3C */
- { 0, 0}, /* 0x3D */
- { 0, 0}, /* 0x3E */
- { 0, 0}, /* 0x3F */
+ { 0, 0}, /* 0x3B */
+ { 0, 0}, /* 0x3C */
+ { 0, 0}, /* 0x3D */
+ { 0, 0}, /* 0x3E */
+ { 0, 0}, /* 0x3F */
{ insn_fxfr, DEC_DECODED}, /* 0x40, fxfr */
- { 0, 0}, /* 0x41 */
- { 0, 0}, /* 0x42 */
- { 0, 0}, /* 0x43 */
- { 0, 0}, /* 0x44 */
- { 0, 0}, /* 0x45 */
- { 0, 0}, /* 0x46 */
- { 0, 0}, /* 0x47 */
- { 0, 0}, /* 0x48 */
+ { 0, 0}, /* 0x41 */
+ { 0, 0}, /* 0x42 */
+ { 0, 0}, /* 0x43 */
+ { 0, 0}, /* 0x44 */
+ { 0, 0}, /* 0x45 */
+ { 0, 0}, /* 0x46 */
+ { 0, 0}, /* 0x47 */
+ { 0, 0}, /* 0x48 */
{ insn_fiadd_sub, DEC_DECODED}, /* 0x49, [p]fiadd.{ss,dd} */
- { 0, 0}, /* 0x4A */
- { 0, 0}, /* 0x4B */
- { 0, 0}, /* 0x4C */
+ { 0, 0}, /* 0x4A */
+ { 0, 0}, /* 0x4B */
+ { 0, 0}, /* 0x4C */
{ insn_fiadd_sub, DEC_DECODED}, /* 0x4D, [p]fisub.{ss,dd} */
- { 0, 0}, /* 0x4E */
- { 0, 0}, /* 0x4F */
+ { 0, 0}, /* 0x4E */
+ { 0, 0}, /* 0x4F */
{ insn_faddp, DEC_DECODED}, /* 0x50, [p]faddp */
{ insn_faddz, DEC_DECODED}, /* 0x51, [p]faddz */
- { 0, 0}, /* 0x52 */
- { 0, 0}, /* 0x53 */
- { 0, 0}, /* 0x54 */
- { 0, 0}, /* 0x55 */
- { 0, 0}, /* 0x56 */
+ { 0, 0}, /* 0x52 */
+ { 0, 0}, /* 0x53 */
+ { 0, 0}, /* 0x54 */
+ { 0, 0}, /* 0x55 */
+ { 0, 0}, /* 0x56 */
{ insn_fzchk, DEC_DECODED}, /* 0x57, [p]fzchkl */
- { 0, 0}, /* 0x58 */
- { 0, 0}, /* 0x59 */
+ { 0, 0}, /* 0x58 */
+ { 0, 0}, /* 0x59 */
{ insn_form, DEC_DECODED}, /* 0x5A, [p]form.dd */
- { 0, 0}, /* 0x5B */
- { 0, 0}, /* 0x5C */
- { 0, 0}, /* 0x5D */
- { 0, 0}, /* 0x5E */
+ { 0, 0}, /* 0x5B */
+ { 0, 0}, /* 0x5C */
+ { 0, 0}, /* 0x5D */
+ { 0, 0}, /* 0x5E */
{ insn_fzchk, DEC_DECODED}, /* 0x5F, [p]fzchks */
- { 0, 0}, /* 0x60 */
- { 0, 0}, /* 0x61 */
- { 0, 0}, /* 0x62 */
- { 0, 0}, /* 0x63 */
- { 0, 0}, /* 0x64 */
- { 0, 0}, /* 0x65 */
- { 0, 0}, /* 0x66 */
- { 0, 0}, /* 0x67 */
- { 0, 0}, /* 0x68 */
- { 0, 0}, /* 0x69 */
- { 0, 0}, /* 0x6A */
- { 0, 0}, /* 0x6B */
- { 0, 0}, /* 0x6C */
- { 0, 0}, /* 0x6D */
- { 0, 0}, /* 0x6E */
- { 0, 0}, /* 0x6F */
- { 0, 0}, /* 0x70 */
- { 0, 0}, /* 0x71 */
- { 0, 0}, /* 0x72 */
- { 0, 0}, /* 0x73 */
- { 0, 0}, /* 0x74 */
- { 0, 0}, /* 0x75 */
- { 0, 0}, /* 0x76 */
- { 0, 0}, /* 0x77 */
- { 0, 0}, /* 0x78 */
- { 0, 0}, /* 0x79 */
- { 0, 0}, /* 0x7A */
- { 0, 0}, /* 0x7B */
- { 0, 0}, /* 0x7C */
- { 0, 0}, /* 0x7D */
- { 0, 0}, /* 0x7E */
- { 0, 0}, /* 0x7F */
+ { 0, 0}, /* 0x60 */
+ { 0, 0}, /* 0x61 */
+ { 0, 0}, /* 0x62 */
+ { 0, 0}, /* 0x63 */
+ { 0, 0}, /* 0x64 */
+ { 0, 0}, /* 0x65 */
+ { 0, 0}, /* 0x66 */
+ { 0, 0}, /* 0x67 */
+ { 0, 0}, /* 0x68 */
+ { 0, 0}, /* 0x69 */
+ { 0, 0}, /* 0x6A */
+ { 0, 0}, /* 0x6B */
+ { 0, 0}, /* 0x6C */
+ { 0, 0}, /* 0x6D */
+ { 0, 0}, /* 0x6E */
+ { 0, 0}, /* 0x6F */
+ { 0, 0}, /* 0x70 */
+ { 0, 0}, /* 0x71 */
+ { 0, 0}, /* 0x72 */
+ { 0, 0}, /* 0x73 */
+ { 0, 0}, /* 0x74 */
+ { 0, 0}, /* 0x75 */
+ { 0, 0}, /* 0x76 */
+ { 0, 0}, /* 0x77 */
+ { 0, 0}, /* 0x78 */
+ { 0, 0}, /* 0x79 */
+ { 0, 0}, /* 0x7A */
+ { 0, 0}, /* 0x7B */
+ { 0, 0}, /* 0x7C */
+ { 0, 0}, /* 0x7D */
+ { 0, 0}, /* 0x7E */
+ { 0, 0}, /* 0x7F */
};
@@ -4360,7 +4360,7 @@ static void decode_exec (i860s *cpustate, UINT32 insn, UINT32 non_shadow)
unrecog_opcode (cpustate->pc, insn);
/* For now, just treat every instruction as taking the same number of
- clocks-- a major oversimplification. */
+ clocks-- a major oversimplification. */
cpustate->icount -= 9;
}
@@ -4370,22 +4370,22 @@ void reset_i860 (i860s *cpustate)
{
int i;
/* On power-up/reset, i860 has values:
- PC = 0xffffff00.
- Integer registers: r0 = 0, others = undefined.
- FP registers: f0:f1 = 0, others undefined.
- psr: U = IM = BR = BW = 0; others = undefined.
- epsr: IL = WP = PBM = BE = 0; processor type, stepping, and
- DCS are proper and read-only; others = undefined.
- db: undefined.
- dirbase: DPS, BL, ATE = 0
- fir, fsr, KR, KI, MERGE: undefined. (what about T?)
-
- I$: flushed.
- D$: undefined (all modified bits = 0).
- TLB: flushed.
-
- Note that any undefined values are set to 0x55aa55aa patterns to
- try to detect defective i860 software. */
+ PC = 0xffffff00.
+ Integer registers: r0 = 0, others = undefined.
+ FP registers: f0:f1 = 0, others undefined.
+ psr: U = IM = BR = BW = 0; others = undefined.
+ epsr: IL = WP = PBM = BE = 0; processor type, stepping, and
+ DCS are proper and read-only; others = undefined.
+ db: undefined.
+ dirbase: DPS, BL, ATE = 0
+ fir, fsr, KR, KI, MERGE: undefined. (what about T?)
+
+ I$: flushed.
+ D$: undefined (all modified bits = 0).
+ TLB: flushed.
+
+ Note that any undefined values are set to 0x55aa55aa patterns to
+ try to detect defective i860 software. */
/* PC is at trap address after reset. */
cpustate->pc = 0xffffff00;
@@ -4401,19 +4401,19 @@ void reset_i860 (i860s *cpustate)
set_fregval_s (cpustate, 1, 0.0);
/* Set whole psr to 0. This sets the proper bits to 0 as specified
- above, and zeroes the undefined bits. */
+ above, and zeroes the undefined bits. */
cpustate->cregs[CR_PSR] = 0;
/* Set most of the epsr bits to 0 (as specified above), leaving
- undefined as zero as well. Then properly set processor type,
- step, and DCS. Type = EPSR[7..0], step = EPSR[12..8],
- DCS = EPSR[21..18] (2^[12+dcs] = cache size).
- We'll pretend to be stepping D0, since it has the fewest bugs
- (and I don't want to emulate the many defects in the earlier
- steppings).
- Proc type: 1 = XR, 2 = XP (XR has 8KB data cache -> DCS = 1).
- Steppings (XR): 3,4,5,6,7 = (B2, C0, B3, C1, D0 respectively).
- Steppings (XP): 0, 2, 3, 4 = (A0, B0, B1, B2) (any others?). */
+ undefined as zero as well. Then properly set processor type,
+ step, and DCS. Type = EPSR[7..0], step = EPSR[12..8],
+ DCS = EPSR[21..18] (2^[12+dcs] = cache size).
+ We'll pretend to be stepping D0, since it has the fewest bugs
+ (and I don't want to emulate the many defects in the earlier
+ steppings).
+ Proc type: 1 = XR, 2 = XP (XR has 8KB data cache -> DCS = 1).
+ Steppings (XR): 3,4,5,6,7 = (B2, C0, B3, C1, D0 respectively).
+ Steppings (XP): 0, 2, 3, 4 = (A0, B0, B1, B2) (any others?). */
cpustate->cregs[CR_EPSR] = 0x00040701;
/* Set DPS, BL, ATE = 0 and the undefined parts also to 0. */
@@ -4444,7 +4444,7 @@ static CPU_EXECUTE( i860 )
i860_state_t *cpustate = get_safe_token(device);
/* Check if the data bus is held by another device, and bail if so.
- Also check for reset. */
+ Also check for reset. */
if (cpustate->pin_reset)
reset_i860 (cpustate);
if (cpustate->pin_bus_hold)
@@ -4471,7 +4471,7 @@ static CPU_EXECUTE( i860 )
cpustate->single_stepping = 0;
}
else if (cpustate->pc == 0xfffc0384 ||
- cpustate->pc == 0xfffc03b8)
+ cpustate->pc == 0xfffc03b8)
{
fprintf(stderr, "(%s) 0x%08x: passed 0x20000000\n", cpustate->device->tag(), cpustate->pc);
cpustate->single_stepping = 0;
@@ -4479,7 +4479,7 @@ static CPU_EXECUTE( i860 )
#endif
savepc = cpustate->pc;
- debugger_instruction_hook(cpustate->device, cpustate->pc);
+ debugger_instruction_hook(cpustate->device, cpustate->pc);
decode_exec (cpustate, ifetch (cpustate, cpustate->pc), 1);
cpustate->exiting_ifetch = 0;
@@ -4488,8 +4488,8 @@ static CPU_EXECUTE( i860 )
if (cpustate->pending_trap)
{
/* If we need to trap, change PC to trap address.
- Also set supervisor mode, copy U and IM to their
- previous versions, clear IM. */
+ Also set supervisor mode, copy U and IM to their
+ previous versions, clear IM. */
if ((cpustate->pending_trap & TRAP_WAS_EXTERNAL) || (GET_EPSR_INT () && GET_PSR_IN ()))
{
if (!cpustate->pc_updated)
@@ -4517,12 +4517,12 @@ static CPU_EXECUTE( i860 )
else if (!cpustate->pc_updated)
{
/* If the PC wasn't updated by a control flow instruction, just
- bump to next sequential instruction. */
+ bump to next sequential instruction. */
cpustate->pc += 4;
}
/*if (cpustate->single_stepping)
- debugger (cpustate); */
+ debugger (cpustate); */
}
}
/*=================================================================*/
@@ -4547,10 +4547,10 @@ static void disasm (i860s *cpustate, UINT32 addr, int len)
char buf[256];
UINT32 phys_addr = addr;
if (GET_DIRBASE_ATE ())
- phys_addr = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
+ phys_addr = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
/* Note that we print the incoming (possibly virtual) address as the
- PC rather than the translated address. */
+ PC rather than the translated address. */
fprintf (stderr, " (%s) 0x%08x: ", cpustate->device->tag(), addr);
insn = cpustate->program->read_dword(phys_addr);
#ifdef HOST_MSB
@@ -4576,13 +4576,13 @@ static void dbg_db (i860s *cpustate, UINT32 addr, int len)
while (len > 0)
{
/* Note that we print the incoming (possibly virtual) address
- rather than the translated address. */
+ rather than the translated address. */
fprintf (stderr, "0x%08x: ", addr);
for (i = 0; i < 16; i++)
{
UINT32 phys_addr = addr;
if (GET_DIRBASE_ATE ())
- phys_addr = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
+ phys_addr = get_address_translation (cpustate, addr, 1 /* is_dataref */, 0 /* is_write */);
b[i] = cpustate->program->read_byte(phys_addr);
fprintf (stderr, "%02x ", b[i]);
@@ -4594,7 +4594,7 @@ static void dbg_db (i860s *cpustate, UINT32 addr, int len)
if (isprint (b[i]))
fprintf (stderr, "%c", b[i]);
else
- fprintf (stderr, ".");
+ fprintf (stderr, ".");
}
fprintf (stderr, "\n");
len -= 16;
@@ -4623,7 +4623,7 @@ void debugger (i860s *cpustate)
disasm (cpustate, cpustate->pc + 4, 1);
}
else
- fprintf (stderr, "\nEmulator: internal debugger started (? for help).\n");
+ fprintf (stderr, "\nEmulator: internal debugger started (? for help).\n");
fflush (stdin);
@@ -4657,8 +4657,8 @@ void debugger (i860s *cpustate)
break;
buf[1] = 0;
fprintf (stderr, "go until pc = 0x%08x.\n",
- cpustate->single_stepping);
- cpustate->single_stepping = 0; /* HACK */
+ cpustate->single_stepping);
+ cpustate->single_stepping = 0; /* HACK */
}
else if (buf[0] == 'r')
dump_state (cpustate);
@@ -4693,9 +4693,9 @@ void debugger (i860s *cpustate)
sscanf (buf + 1, "%x", &v);
if (GET_DIRBASE_ATE ())
fprintf (stderr, "vma 0x%08x ==> phys 0x%08x\n", v,
- get_address_translation (cpustate, v, 1, 0));
+ get_address_translation (cpustate, v, 1, 0));
else
- fprintf (stderr, "not in virtual address mode.\n");
+ fprintf (stderr, "not in virtual address mode.\n");
}
else if (buf[0] == 'B')
{
@@ -4707,7 +4707,7 @@ void debugger (i860s *cpustate)
fprintf (stderr, " db: dump bytes (db[0xaddress])\n r: dump registers\n s: single-step\n g: go back to emulator (g[0xaddress])\n u: disassemble (u[0xaddress])\n p: dump pipelines (p{0-4} for all, add, mul, load, graphics)\n l: load an ELF binary (lpath)\n x: give virt->phys translation (x{0xaddress})\n");
}
else
- fprintf (stderr, "Bad command '%s'.\n", buf);
+ fprintf (stderr, "Bad command '%s'.\n", buf);
}
/* Less noise when single-stepping. */
diff --git a/src/emu/cpu/i860/i860dis.c b/src/emu/cpu/i860/i860dis.c
index b1386f7cefe..22e2c7260ad 100644
--- a/src/emu/cpu/i860/i860dis.c
+++ b/src/emu/cpu/i860/i860dis.c
@@ -64,7 +64,7 @@ static void int_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
static void int_i2d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
{
/* Sign extend the 16-bit immediate.
- Print as hex for the bitwise operations. */
+ Print as hex for the bitwise operations. */
int upper_6bits = (insn >> 26) & 0x3f;
if (upper_6bits >= 0x30 && upper_6bits <= 0x3f)
sprintf(buf, "%s\t0x%04x,%%r%d,%%r%d", mnemonic,
@@ -122,8 +122,8 @@ static void flop_12d(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
prefix_d = (insn & 0x200) ? "d." : "";
/* Special case: pf[m]am and pf[m]sm families are always pipelined, so they
- do not have a prefix. Also, for the pfmam and pfmsm families, replace
- any 'a' in the mnemonic with 'm' and prepend an 'm'. */
+ do not have a prefix. Also, for the pfmam and pfmsm families, replace
+ any 'a' in the mnemonic with 'm' and prepend an 'm'. */
if ((insn & 0x7f) < 0x20)
{
int is_pfam = insn & 0x400;
@@ -308,7 +308,7 @@ static void int_fldst(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
const char *const piped_suff[2] = { "", "p" };
int upper_6bits = (insn >> 26) & 0x3f;
int is_load = (upper_6bits == 8 || upper_6bits == 9 || upper_6bits == 24
- || upper_6bits == 25);
+ || upper_6bits == 25);
/* Bits 2 and 1 determine the operand size. */
idx = ((insn >> 1) & 3);
@@ -316,10 +316,10 @@ static void int_fldst(char *buf, char *mnemonic, UINT32 pc, UINT32 insn)
/* There is no pipelined load quad on XR. */
if (piped && size == 16)
- {
+ {
sprintf (buf, ".long\t%#08x; *", insn);
return;
- }
+ }
/* There is only a 64-bit pixel store. */
if ((upper_6bits == 15) && size != 8)
@@ -377,14 +377,14 @@ enum
struct decode_tbl_t
{
/* Disassembly function for this opcode.
- Call with buffer, mnemonic, pc, insn. */
+ Call with buffer, mnemonic, pc, insn. */
void (*insn_dis)(char *, char *, UINT32, UINT32);
- /* Flags for this opcode. */
+ /* Flags for this opcode. */
char flags;
- /* Mnemonic of this opcode (sometimes partial when more decode is
- done in disassembly routines-- e.g., loads and stores). */
+ /* Mnemonic of this opcode (sometimes partial when more decode is
+ done in disassembly routines-- e.g., loads and stores). */
const char *mnemonic;
};
@@ -393,8 +393,8 @@ struct decode_tbl_t
static const decode_tbl_t decode_tbl[64] =
{
/* A slight bit of decoding for loads and stores is done in the
- execution routines (operand size and addressing mode), which
- is why their respective entries are identical. */
+ execution routines (operand size and addressing mode), which
+ is why their respective entries are identical. */
{ int_ldx, DEC_DECODED, "ld." }, /* ld.b isrc1(isrc2),idest. */
{ int_ldx, DEC_DECODED, "ld." }, /* ld.b #const(isrc2),idest. */
{ int_1d, DEC_DECODED, "ixfr" }, /* ixfr isrc1ni,fdest. */
@@ -480,10 +480,10 @@ static const decode_tbl_t core_esc_decode_tbl[8] =
static const decode_tbl_t fp_decode_tbl[128] =
{
/* Floating point instructions. The least significant 7 bits are
- the (extended) opcode and bits 10:7 are P,D,S,R respectively
- ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
- For some operations, I defer decoding the P,S,R bits to the
- emulation routine for them. */
+ the (extended) opcode and bits 10:7 are P,D,S,R respectively
+ ([p]ipelined, [d]ual, [s]ource prec., [r]esult prec.).
+ For some operations, I defer decoding the P,S,R bits to the
+ emulation routine for them. */
{ flop_12d, DEC_DECODED, "r2p1." }, /* 0x00 pf[m]am */
{ flop_12d, DEC_DECODED, "r2pt." }, /* 0x01 pf[m]am */
{ flop_12d, DEC_DECODED, "r2ap1." }, /* 0x02 pf[m]am */
diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c
index 059f262e312..bf9fb82210d 100644
--- a/src/emu/cpu/i960/i960.c
+++ b/src/emu/cpu/i960/i960.c
@@ -415,15 +415,15 @@ INLINE const char *i960_get_strflags(i960_state_t *i960)
// interrupt dispatch
static void take_interrupt(i960_state_t *i960, int vector, int lvl)
{
- int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
- int int_SP = i960->program->read_dword(i960->PRCB+24); // interrupt stack
+ int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
+ int int_SP = i960->program->read_dword(i960->PRCB+24); // interrupt stack
int SP;
UINT32 IRQV;
IRQV = i960->program->read_dword(int_tab + 36 + (vector-8)*4);
// start the process
- if(!(i960->PC & 0x2000)) // if this is a nested interrupt, don't re-get int_SP
+ if(!(i960->PC & 0x2000)) // if this is a nested interrupt, don't re-get int_SP
{
SP = int_SP;
}
@@ -433,7 +433,7 @@ static void take_interrupt(i960_state_t *i960, int vector, int lvl)
}
SP = (SP + 63) & ~63;
- SP += 128; // emulate ElSemi's core, this fixes the crash in sonic the fighters
+ SP += 128; // emulate ElSemi's core, this fixes the crash in sonic the fighters
do_call(i960, IRQV, 7, SP);
@@ -443,21 +443,21 @@ static void take_interrupt(i960_state_t *i960, int vector, int lvl)
// store the vector
i960->program->write_dword(i960->r[I960_FP]-8, vector-8);
- i960->PC &= ~0x1f00; // clear priority, state, trace-fault pending, and trace enable
- i960->PC |= (lvl<<16); // set CPU level to current IRQ level
- i960->PC |= 0x2002; // set supervisor mode & interrupt flag
+ i960->PC &= ~0x1f00; // clear priority, state, trace-fault pending, and trace enable
+ i960->PC |= (lvl<<16); // set CPU level to current IRQ level
+ i960->PC |= 0x2002; // set supervisor mode & interrupt flag
}
static void check_irqs(i960_state_t *i960)
{
- int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
+ int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
int cpu_pri = (i960->PC>>16)&0x1f;
int pending_pri;
int lvl, irq, take = -1;
int vword;
static const UINT32 lvlmask[4] = { 0x000000ff, 0x0000ff00, 0x00ff0000, 0xff000000 };
- pending_pri = i960->program->read_dword(int_tab); // read pending priorities
+ pending_pri = i960->program->read_dword(int_tab); // read pending priorities
if ((i960->immediate_irq) && ((cpu_pri < i960->immediate_pri) || (i960->immediate_pri == 31)))
{
@@ -471,7 +471,7 @@ static void check_irqs(i960_state_t *i960)
int word, wordl, wordh;
// figure out which word contains this level's priorities
- word = ((lvl / 4) * 4) + 4; // (lvl/4) = word address, *4 for byte address, +4 to skip pending priorities
+ word = ((lvl / 4) * 4) + 4; // (lvl/4) = word address, *4 for byte address, +4 to skip pending priorities
wordl = (lvl % 4) * 8;
wordh = (wordl + 8) - 1;
@@ -533,7 +533,7 @@ static void do_call(i960_state_t *i960, UINT32 adr, int type, UINT32 stack)
i960->program->write_dword(FP + (i*4), i960->r[i]);
}
}
- else // a cache entry is available, use it
+ else // a cache entry is available, use it
{
memcpy(&i960->rcache[i960->rcache_pos][0], i960->r, 0x10 * sizeof(UINT32));
i960->rcache_frame_addr[i960->rcache_pos] = i960->r[I960_FP] & ~0x3f;
@@ -544,7 +544,7 @@ static void do_call(i960_state_t *i960, UINT32 adr, int type, UINT32 stack)
i960->r[I960_PFP] = i960->r[I960_FP] & ~7;
i960->r[I960_PFP] |= type;
- if(type == 7) { // interrupts need special handling
+ if(type == 7) { // interrupts need special handling
// set the stack to the passed-in value to properly handle nested interrupts
// (can't set it externally or the original program's SP will be lost)
i960->r[I960_SP] = stack;
@@ -1122,7 +1122,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
case 0x5b:
switch((opcode >> 7) & 0xf) {
- case 0x0: // addc
+ case 0x0: // addc
{
UINT64 res;
@@ -1132,7 +1132,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
res = t2+(t1+((i960->AC>>1)&1));
set_ri(i960, opcode, res&0xffffffff);
- i960->AC &= ~0x3; // clear C and V
+ i960->AC &= ~0x3; // clear C and V
// set carry
i960->AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
// set overflow
@@ -1140,7 +1140,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
}
break;
- case 0x2: // subc
+ case 0x2: // subc
{
UINT64 res;
@@ -1150,7 +1150,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
res = t2-(t1+((i960->AC>>1)&1));
set_ri(i960, opcode, res&0xffffffff);
- i960->AC &= ~0x3; // clear C and V
+ i960->AC &= ~0x3; // clear C and V
// set carry
i960->AC |= ((res) & (((UINT64)1) << 32)) ? 0x2 : 0;
// set overflow
@@ -1427,7 +1427,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
break;
case 0x3: // remr
- i960->icount -= 67; // (67 to 75878 depending on opcodes!!!)
+ i960->icount -= 67; // (67 to 75878 depending on opcodes!!!)
t1f = get_1_rif(i960, opcode);
t2f = get_2_rif(i960, opcode);
set_rif(i960, opcode, fmod(t2f, t1f));
@@ -1669,7 +1669,7 @@ INLINE void execute_op(i960_state_t *i960, UINT32 opcode)
i960->icount -= 37;
t1 = get_1_ri(i960, opcode);
t2 = get_2_ri(i960, opcode);
- if (t1 == 0) // HACK!
+ if (t1 == 0) // HACK!
set_ri(i960, opcode, 0);
else
set_ri(i960, opcode, t2/t1);
@@ -1973,7 +1973,7 @@ static CPU_EXECUTE( i960 )
static void set_irq_line(i960_state_t *i960, int irqline, int state)
{
- int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
+ int int_tab = i960->program->read_dword(i960->PRCB+20); // interrupt table
int cpu_pri = (i960->PC>>16)&0x1f;
int vector =0;
int priority;
@@ -2050,11 +2050,11 @@ static CPU_SET_INFO( i960 )
switch(state) {
// Interfacing
- case CPUINFO_INT_REGISTER + I960_IP: i960->IP = info->i; break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ0: set_irq_line(i960, I960_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ1: set_irq_line(i960, I960_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ2: set_irq_line(i960, I960_IRQ2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + I960_IRQ3: set_irq_line(i960, I960_IRQ3, info->i); break;
+ case CPUINFO_INT_REGISTER + I960_IP: i960->IP = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ0: set_irq_line(i960, I960_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ1: set_irq_line(i960, I960_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ2: set_irq_line(i960, I960_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + I960_IRQ3: set_irq_line(i960, I960_IRQ3, info->i); break;
default:
fatalerror("i960_set_info %x\n", state);
@@ -2091,7 +2091,7 @@ static CPU_RESET( i960 )
i960->IP = i960->program->read_dword(12);
i960->PC = 0x001f2002;
i960->AC = 0;
- i960->ICR = 0xff000000;
+ i960->ICR = 0xff000000;
i960->bursting = 0;
i960->immediate_irq = 0;
@@ -2114,100 +2114,100 @@ CPU_GET_INFO( i960 )
switch(state) {
// Interface functions and variables
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i960); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i960); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i960); break;
- case CPUINFO_FCT_EXIT: info->exit = 0; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i960); break;
- case CPUINFO_FCT_BURN: info->burn = 0; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i960); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i960->icount; break;
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i960_state_t); break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i960); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i960); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(i960); break;
+ case CPUINFO_FCT_EXIT: info->exit = 0; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i960); break;
+ case CPUINFO_FCT_BURN: info->burn = 0; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i960); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &i960->icount; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(i960_state_t); break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
// Bus sizes
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_IO: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_IO: info->i = 0; break;
// Internal maps
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = NULL;break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map32 = NULL;break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map32 = NULL;break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = NULL;break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map32 = NULL;break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map32 = NULL;break;
// CPU misc parameters
- case CPUINFO_STR_NAME: strcpy(info->s, "i960KB"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_FLAGS: strcpy(info->s, i960_get_strflags(i960)); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "i960KB"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_FLAGS: strcpy(info->s, i960_get_strflags(i960)); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
// CPU main state
- case CPUINFO_INT_PC: info->i = i960->IP; break;
- case CPUINFO_INT_SP: info->i = i960->r[I960_SP]; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = i960->PIP; break;
+ case CPUINFO_INT_PC: info->i = i960->IP; break;
+ case CPUINFO_INT_SP: info->i = i960->r[I960_SP]; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = i960->PIP; break;
- case CPUINFO_INT_REGISTER + I960_SAT: info->i = i960->SAT; break;
- case CPUINFO_INT_REGISTER + I960_PRCB: info->i = i960->PRCB; break;
- case CPUINFO_INT_REGISTER + I960_PC: info->i = i960->PC; break;
- case CPUINFO_INT_REGISTER + I960_AC: info->i = i960->AC; break;
- case CPUINFO_INT_REGISTER + I960_IP: info->i = i960->IP; break;
- case CPUINFO_INT_REGISTER + I960_PIP: info->i = i960->PIP; break;
+ case CPUINFO_INT_REGISTER + I960_SAT: info->i = i960->SAT; break;
+ case CPUINFO_INT_REGISTER + I960_PRCB: info->i = i960->PRCB; break;
+ case CPUINFO_INT_REGISTER + I960_PC: info->i = i960->PC; break;
+ case CPUINFO_INT_REGISTER + I960_AC: info->i = i960->AC; break;
+ case CPUINFO_INT_REGISTER + I960_IP: info->i = i960->IP; break;
+ case CPUINFO_INT_REGISTER + I960_PIP: info->i = i960->PIP; break;
// CPU debug stuff
- case CPUINFO_STR_REGISTER + I960_SAT: sprintf(info->s, "sat :%08x", i960->SAT); break;
- case CPUINFO_STR_REGISTER + I960_PRCB: sprintf(info->s, "prcb :%08x", i960->PRCB); break;
- case CPUINFO_STR_REGISTER + I960_PC: sprintf(info->s, "pc :%08x", i960->PC); break;
- case CPUINFO_STR_REGISTER + I960_AC: sprintf(info->s, "ac :%08x", i960->AC); break;
- case CPUINFO_STR_REGISTER + I960_IP: sprintf(info->s, "ip :%08x", i960->IP); break;
- case CPUINFO_STR_REGISTER + I960_PIP: sprintf(info->s, "pip :%08x", i960->PIP); break;
-
- case CPUINFO_STR_REGISTER + I960_R0: sprintf(info->s, "pfp :%08x", i960->r[ 0]); break;
- case CPUINFO_STR_REGISTER + I960_R1: sprintf(info->s, "sp :%08x", i960->r[ 1]); break;
- case CPUINFO_STR_REGISTER + I960_R2: sprintf(info->s, "rip :%08x", i960->r[ 2]); break;
- case CPUINFO_STR_REGISTER + I960_R3: sprintf(info->s, "r3 :%08x", i960->r[ 3]); break;
- case CPUINFO_STR_REGISTER + I960_R4: sprintf(info->s, "r4 :%08x", i960->r[ 4]); break;
- case CPUINFO_STR_REGISTER + I960_R5: sprintf(info->s, "r5 :%08x", i960->r[ 5]); break;
- case CPUINFO_STR_REGISTER + I960_R6: sprintf(info->s, "r6 :%08x", i960->r[ 6]); break;
- case CPUINFO_STR_REGISTER + I960_R7: sprintf(info->s, "r7 :%08x", i960->r[ 7]); break;
- case CPUINFO_STR_REGISTER + I960_R8: sprintf(info->s, "r8 :%08x", i960->r[ 8]); break;
- case CPUINFO_STR_REGISTER + I960_R9: sprintf(info->s, "r9 :%08x", i960->r[ 9]); break;
- case CPUINFO_STR_REGISTER + I960_R10: sprintf(info->s, "r10 :%08x", i960->r[10]); break;
- case CPUINFO_STR_REGISTER + I960_R11: sprintf(info->s, "r11 :%08x", i960->r[11]); break;
- case CPUINFO_STR_REGISTER + I960_R12: sprintf(info->s, "r12 :%08x", i960->r[12]); break;
- case CPUINFO_STR_REGISTER + I960_R13: sprintf(info->s, "r13 :%08x", i960->r[13]); break;
- case CPUINFO_STR_REGISTER + I960_R14: sprintf(info->s, "r14 :%08x", i960->r[14]); break;
- case CPUINFO_STR_REGISTER + I960_R15: sprintf(info->s, "r15 :%08x", i960->r[15]); break;
-
- case CPUINFO_STR_REGISTER + I960_G0: sprintf(info->s, "g0 :%08x", i960->r[16]); break;
- case CPUINFO_STR_REGISTER + I960_G1: sprintf(info->s, "g1 :%08x", i960->r[17]); break;
- case CPUINFO_STR_REGISTER + I960_G2: sprintf(info->s, "g2 :%08x", i960->r[18]); break;
- case CPUINFO_STR_REGISTER + I960_G3: sprintf(info->s, "g3 :%08x", i960->r[19]); break;
- case CPUINFO_STR_REGISTER + I960_G4: sprintf(info->s, "g4 :%08x", i960->r[20]); break;
- case CPUINFO_STR_REGISTER + I960_G5: sprintf(info->s, "g5 :%08x", i960->r[21]); break;
- case CPUINFO_STR_REGISTER + I960_G6: sprintf(info->s, "g6 :%08x", i960->r[22]); break;
- case CPUINFO_STR_REGISTER + I960_G7: sprintf(info->s, "g7 :%08x", i960->r[23]); break;
- case CPUINFO_STR_REGISTER + I960_G8: sprintf(info->s, "g8 :%08x", i960->r[24]); break;
- case CPUINFO_STR_REGISTER + I960_G9: sprintf(info->s, "g9 :%08x", i960->r[25]); break;
- case CPUINFO_STR_REGISTER + I960_G10: sprintf(info->s, "g10 :%08x", i960->r[26]); break;
- case CPUINFO_STR_REGISTER + I960_G11: sprintf(info->s, "g11 :%08x", i960->r[27]); break;
- case CPUINFO_STR_REGISTER + I960_G12: sprintf(info->s, "g12 :%08x", i960->r[28]); break;
- case CPUINFO_STR_REGISTER + I960_G13: sprintf(info->s, "g13 :%08x", i960->r[29]); break;
- case CPUINFO_STR_REGISTER + I960_G14: sprintf(info->s, "g14 :%08x", i960->r[30]); break;
- case CPUINFO_STR_REGISTER + I960_G15: sprintf(info->s, "fp :%08x", i960->r[31]); break;
+ case CPUINFO_STR_REGISTER + I960_SAT: sprintf(info->s, "sat :%08x", i960->SAT); break;
+ case CPUINFO_STR_REGISTER + I960_PRCB: sprintf(info->s, "prcb :%08x", i960->PRCB); break;
+ case CPUINFO_STR_REGISTER + I960_PC: sprintf(info->s, "pc :%08x", i960->PC); break;
+ case CPUINFO_STR_REGISTER + I960_AC: sprintf(info->s, "ac :%08x", i960->AC); break;
+ case CPUINFO_STR_REGISTER + I960_IP: sprintf(info->s, "ip :%08x", i960->IP); break;
+ case CPUINFO_STR_REGISTER + I960_PIP: sprintf(info->s, "pip :%08x", i960->PIP); break;
+
+ case CPUINFO_STR_REGISTER + I960_R0: sprintf(info->s, "pfp :%08x", i960->r[ 0]); break;
+ case CPUINFO_STR_REGISTER + I960_R1: sprintf(info->s, "sp :%08x", i960->r[ 1]); break;
+ case CPUINFO_STR_REGISTER + I960_R2: sprintf(info->s, "rip :%08x", i960->r[ 2]); break;
+ case CPUINFO_STR_REGISTER + I960_R3: sprintf(info->s, "r3 :%08x", i960->r[ 3]); break;
+ case CPUINFO_STR_REGISTER + I960_R4: sprintf(info->s, "r4 :%08x", i960->r[ 4]); break;
+ case CPUINFO_STR_REGISTER + I960_R5: sprintf(info->s, "r5 :%08x", i960->r[ 5]); break;
+ case CPUINFO_STR_REGISTER + I960_R6: sprintf(info->s, "r6 :%08x", i960->r[ 6]); break;
+ case CPUINFO_STR_REGISTER + I960_R7: sprintf(info->s, "r7 :%08x", i960->r[ 7]); break;
+ case CPUINFO_STR_REGISTER + I960_R8: sprintf(info->s, "r8 :%08x", i960->r[ 8]); break;
+ case CPUINFO_STR_REGISTER + I960_R9: sprintf(info->s, "r9 :%08x", i960->r[ 9]); break;
+ case CPUINFO_STR_REGISTER + I960_R10: sprintf(info->s, "r10 :%08x", i960->r[10]); break;
+ case CPUINFO_STR_REGISTER + I960_R11: sprintf(info->s, "r11 :%08x", i960->r[11]); break;
+ case CPUINFO_STR_REGISTER + I960_R12: sprintf(info->s, "r12 :%08x", i960->r[12]); break;
+ case CPUINFO_STR_REGISTER + I960_R13: sprintf(info->s, "r13 :%08x", i960->r[13]); break;
+ case CPUINFO_STR_REGISTER + I960_R14: sprintf(info->s, "r14 :%08x", i960->r[14]); break;
+ case CPUINFO_STR_REGISTER + I960_R15: sprintf(info->s, "r15 :%08x", i960->r[15]); break;
+
+ case CPUINFO_STR_REGISTER + I960_G0: sprintf(info->s, "g0 :%08x", i960->r[16]); break;
+ case CPUINFO_STR_REGISTER + I960_G1: sprintf(info->s, "g1 :%08x", i960->r[17]); break;
+ case CPUINFO_STR_REGISTER + I960_G2: sprintf(info->s, "g2 :%08x", i960->r[18]); break;
+ case CPUINFO_STR_REGISTER + I960_G3: sprintf(info->s, "g3 :%08x", i960->r[19]); break;
+ case CPUINFO_STR_REGISTER + I960_G4: sprintf(info->s, "g4 :%08x", i960->r[20]); break;
+ case CPUINFO_STR_REGISTER + I960_G5: sprintf(info->s, "g5 :%08x", i960->r[21]); break;
+ case CPUINFO_STR_REGISTER + I960_G6: sprintf(info->s, "g6 :%08x", i960->r[22]); break;
+ case CPUINFO_STR_REGISTER + I960_G7: sprintf(info->s, "g7 :%08x", i960->r[23]); break;
+ case CPUINFO_STR_REGISTER + I960_G8: sprintf(info->s, "g8 :%08x", i960->r[24]); break;
+ case CPUINFO_STR_REGISTER + I960_G9: sprintf(info->s, "g9 :%08x", i960->r[25]); break;
+ case CPUINFO_STR_REGISTER + I960_G10: sprintf(info->s, "g10 :%08x", i960->r[26]); break;
+ case CPUINFO_STR_REGISTER + I960_G11: sprintf(info->s, "g11 :%08x", i960->r[27]); break;
+ case CPUINFO_STR_REGISTER + I960_G12: sprintf(info->s, "g12 :%08x", i960->r[28]); break;
+ case CPUINFO_STR_REGISTER + I960_G13: sprintf(info->s, "g13 :%08x", i960->r[29]); break;
+ case CPUINFO_STR_REGISTER + I960_G14: sprintf(info->s, "g14 :%08x", i960->r[30]); break;
+ case CPUINFO_STR_REGISTER + I960_G15: sprintf(info->s, "fp :%08x", i960->r[31]); break;
// default:
// fatalerror("i960_get_info %x \n", state);
diff --git a/src/emu/cpu/i960/i960.h b/src/emu/cpu/i960/i960.h
index 3b06f5bf437..0a93665a395 100644
--- a/src/emu/cpu/i960/i960.h
+++ b/src/emu/cpu/i960/i960.h
@@ -6,58 +6,58 @@
enum
{
- I960_PFP = 0,
- I960_SP = 1,
- I960_RIP = 2,
- I960_FP = 31,
+ I960_PFP = 0,
+ I960_SP = 1,
+ I960_RIP = 2,
+ I960_FP = 31,
- I960_R0 = 0,
- I960_R1 = 1,
- I960_R2 = 2,
- I960_R3 = 3,
- I960_R4 = 4,
- I960_R5 = 5,
- I960_R6 = 6,
- I960_R7 = 7,
- I960_R8 = 8,
- I960_R9 = 9,
- I960_R10 = 10,
- I960_R11 = 11,
- I960_R12 = 12,
- I960_R13 = 13,
- I960_R14 = 14,
- I960_R15 = 15,
- I960_G0 = 16,
- I960_G1 = 17,
- I960_G2 = 18,
- I960_G3 = 19,
- I960_G4 = 20,
- I960_G5 = 21,
- I960_G6 = 22,
- I960_G7 = 23,
- I960_G8 = 24,
- I960_G9 = 25,
- I960_G10 = 26,
- I960_G11 = 27,
- I960_G12 = 28,
- I960_G13 = 29,
- I960_G14 = 30,
- I960_G15 = 31,
+ I960_R0 = 0,
+ I960_R1 = 1,
+ I960_R2 = 2,
+ I960_R3 = 3,
+ I960_R4 = 4,
+ I960_R5 = 5,
+ I960_R6 = 6,
+ I960_R7 = 7,
+ I960_R8 = 8,
+ I960_R9 = 9,
+ I960_R10 = 10,
+ I960_R11 = 11,
+ I960_R12 = 12,
+ I960_R13 = 13,
+ I960_R14 = 14,
+ I960_R15 = 15,
+ I960_G0 = 16,
+ I960_G1 = 17,
+ I960_G2 = 18,
+ I960_G3 = 19,
+ I960_G4 = 20,
+ I960_G5 = 21,
+ I960_G6 = 22,
+ I960_G7 = 23,
+ I960_G8 = 24,
+ I960_G9 = 25,
+ I960_G10 = 26,
+ I960_G11 = 27,
+ I960_G12 = 28,
+ I960_G13 = 29,
+ I960_G14 = 30,
+ I960_G15 = 31,
- I960_SAT = 32,
- I960_PRCB = 33,
- I960_PC = 34,
- I960_AC = 35,
- I960_IP = 36,
- I960_PIP = 37
+ I960_SAT = 32,
+ I960_PRCB = 33,
+ I960_PC = 34,
+ I960_AC = 35,
+ I960_IP = 36,
+ I960_PIP = 37
};
enum
{
- I960_IRQ0 = 0,
- I960_IRQ1 = 1,
- I960_IRQ2 = 2,
- I960_IRQ3 = 3
+ I960_IRQ0 = 0,
+ I960_IRQ1 = 1,
+ I960_IRQ2 = 2,
+ I960_IRQ3 = 3
};
DECLARE_LEGACY_CPU_DEVICE(I960, i960);
diff --git a/src/emu/cpu/i960/i960dis.c b/src/emu/cpu/i960/i960dis.c
index eec297fdebd..e88ef9da2e6 100644
--- a/src/emu/cpu/i960/i960dis.c
+++ b/src/emu/cpu/i960/i960dis.c
@@ -10,8 +10,8 @@
struct mnemonic_t
{
- const char *mnem;
- unsigned short type;
+ const char *mnem;
+ unsigned short type;
};
@@ -103,12 +103,12 @@ static const char *const regnames[32] =
"g0","g1","g2","g3", "g4","g5","g6","g7", "g8","g9","g10","g11", "g12","g13","g14","fp",
};
-#define REG_DST regnames[dst]
-#define REG_ABASE regnames[abase]
-#define REG_REG2 regnames[reg2]
-#define REG_COBR_SRC1 ((iCode & 0x2000) ? constnames[COBRSRC1] : regnames[COBRSRC1])
-#define REG_COBR_SRC2 regnames[COBRSRC2]
-#define NEM mnemonic[op].mnem
+#define REG_DST regnames[dst]
+#define REG_ABASE regnames[abase]
+#define REG_REG2 regnames[reg2]
+#define REG_COBR_SRC1 ((iCode & 0x2000) ? constnames[COBRSRC1] : regnames[COBRSRC1])
+#define REG_COBR_SRC2 regnames[COBRSRC2]
+#define NEM mnemonic[op].mnem
// REG format
#define SRC1 (iCode & 0x1f)
@@ -135,17 +135,17 @@ static char *dis_decode_reg(unsigned long iCode, char* tmpStr,unsigned char cnt)
if (S1) src1[0] = 0;
else
{
- if(M1) sprintf(src1,"0x%lx",SRC1);
- else sprintf(src1,"%s",regnames[SRC1]);
+ if(M1) sprintf(src1,"0x%lx",SRC1);
+ else sprintf(src1,"%s",regnames[SRC1]);
}
if (S2) sprintf(src2,"reserved");
else
{
- if(M2) sprintf(src2,"0x%lx,",SRC2);
- else sprintf(src2,"%s,",regnames[SRC2]);
+ if(M2) sprintf(src2,"0x%lx,",SRC2);
+ else sprintf(src2,"%s,",regnames[SRC2]);
}
- if(M3) dst[0] = 0;
- else sprintf(dst,"%s,",regnames[DST]);
+ if(M3) dst[0] = 0;
+ else sprintf(dst,"%s,",regnames[DST]);
if (cnt == 1)
sprintf(tmpStr,"%s%s",dst,src1);
else
@@ -302,4 +302,3 @@ CPU_DISASSEMBLE( i960 )
return dis.IPinc | dis.disflags | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/i960/i960dis.h b/src/emu/cpu/i960/i960dis.h
index 3ab93e21867..3429a9f19d6 100644
--- a/src/emu/cpu/i960/i960dis.h
+++ b/src/emu/cpu/i960/i960dis.h
@@ -3,9 +3,9 @@
struct disassemble_t
{
- char *buffer; // output buffer
- unsigned long IP;
- unsigned long IPinc;
+ char *buffer; // output buffer
+ unsigned long IP;
+ unsigned long IPinc;
const UINT8 *oprom;
UINT32 disflags;
};
diff --git a/src/emu/cpu/jaguar/jagdasm.c b/src/emu/cpu/jaguar/jagdasm.c
index cc0a8f678b0..a7e8cdf65e2 100644
--- a/src/emu/cpu/jaguar/jagdasm.c
+++ b/src/emu/cpu/jaguar/jagdasm.c
@@ -14,7 +14,7 @@
MEMORY ACCESSORS
***************************************************************************/
-#define ROPCODE(offs) ((oprom[offs] << 8) | oprom[(offs) + 1])
+#define ROPCODE(offs) ((oprom[offs] << 8) | oprom[(offs) + 1])
/***************************************************************************
@@ -88,93 +88,93 @@ static unsigned dasmjag(int variant, char *buffer, unsigned pc, const UINT8 *opr
pc += 2;
switch (op >> 10)
{
- case 0: sprintf(buffer, "add r%d,r%d", reg1, reg2); break;
- case 1: sprintf(buffer, "addc r%d,r%d", reg1, reg2); break;
- case 2: sprintf(buffer, "addq $%x,r%d", convert_zero[reg1], reg2); break;
- case 3: sprintf(buffer, "addqt $%x,r%d", convert_zero[reg1], reg2); break;
- case 4: sprintf(buffer, "sub r%d,r%d", reg1, reg2); break;
- case 5: sprintf(buffer, "subc r%d,r%d", reg1, reg2); break;
- case 6: sprintf(buffer, "subq $%x,r%d", convert_zero[reg1], reg2); break;
- case 7: sprintf(buffer, "subqt $%x,r%d", convert_zero[reg1], reg2); break;
- case 8: sprintf(buffer, "neg r%d", reg2); break;
- case 9: sprintf(buffer, "and r%d,r%d", reg1, reg2); break;
- case 10: sprintf(buffer, "or r%d,r%d", reg1, reg2); break;
- case 11: sprintf(buffer, "xor r%d,r%d", reg1, reg2); break;
- case 12: sprintf(buffer, "not r%d", reg2); break;
- case 13: sprintf(buffer, "btst $%x,r%d", reg1, reg2); break;
- case 14: sprintf(buffer, "bset $%x,r%d", reg1, reg2); break;
- case 15: sprintf(buffer, "bclr $%x,r%d", reg1, reg2); break;
- case 16: sprintf(buffer, "mult r%d,r%d", reg1, reg2); break;
- case 17: sprintf(buffer, "imult r%d,r%d", reg1, reg2); break;
- case 18: sprintf(buffer, "imultn r%d,r%d", reg1, reg2); break;
- case 19: sprintf(buffer, "resmac r%d", reg2); break;
- case 20: sprintf(buffer, "imacn r%d,r%d", reg1, reg2); break;
- case 21: sprintf(buffer, "div r%d,r%d", reg1, reg2); break;
- case 22: sprintf(buffer, "abs r%d", reg2); break;
- case 23: sprintf(buffer, "sh r%d,r%d", reg1, reg2); break;
- case 24: sprintf(buffer, "shlq $%x,r%d", 32 - convert_zero[reg1], reg2); break;
- case 25: sprintf(buffer, "shrq $%x,r%d", convert_zero[reg1], reg2); break;
- case 26: sprintf(buffer, "sha r%d,r%d", reg1, reg2); break;
- case 27: sprintf(buffer, "sharq $%x,r%d", convert_zero[reg1], reg2); break;
- case 28: sprintf(buffer, "ror r%d,r%d", reg1, reg2); break;
- case 29: sprintf(buffer, "rorq $%x,r%d", convert_zero[reg1], reg2); break;
- case 30: sprintf(buffer, "cmp r%d,r%d", reg1, reg2); break;
- case 31: sprintf(buffer, "cmpq %s,r%d", signed_16bit((INT16)(reg1 << 11) >> 11), reg2);break;
- case 32: if (variant == JAGUAR_VARIANT_GPU)
+ case 0: sprintf(buffer, "add r%d,r%d", reg1, reg2); break;
+ case 1: sprintf(buffer, "addc r%d,r%d", reg1, reg2); break;
+ case 2: sprintf(buffer, "addq $%x,r%d", convert_zero[reg1], reg2); break;
+ case 3: sprintf(buffer, "addqt $%x,r%d", convert_zero[reg1], reg2); break;
+ case 4: sprintf(buffer, "sub r%d,r%d", reg1, reg2); break;
+ case 5: sprintf(buffer, "subc r%d,r%d", reg1, reg2); break;
+ case 6: sprintf(buffer, "subq $%x,r%d", convert_zero[reg1], reg2); break;
+ case 7: sprintf(buffer, "subqt $%x,r%d", convert_zero[reg1], reg2); break;
+ case 8: sprintf(buffer, "neg r%d", reg2); break;
+ case 9: sprintf(buffer, "and r%d,r%d", reg1, reg2); break;
+ case 10: sprintf(buffer, "or r%d,r%d", reg1, reg2); break;
+ case 11: sprintf(buffer, "xor r%d,r%d", reg1, reg2); break;
+ case 12: sprintf(buffer, "not r%d", reg2); break;
+ case 13: sprintf(buffer, "btst $%x,r%d", reg1, reg2); break;
+ case 14: sprintf(buffer, "bset $%x,r%d", reg1, reg2); break;
+ case 15: sprintf(buffer, "bclr $%x,r%d", reg1, reg2); break;
+ case 16: sprintf(buffer, "mult r%d,r%d", reg1, reg2); break;
+ case 17: sprintf(buffer, "imult r%d,r%d", reg1, reg2); break;
+ case 18: sprintf(buffer, "imultn r%d,r%d", reg1, reg2); break;
+ case 19: sprintf(buffer, "resmac r%d", reg2); break;
+ case 20: sprintf(buffer, "imacn r%d,r%d", reg1, reg2); break;
+ case 21: sprintf(buffer, "div r%d,r%d", reg1, reg2); break;
+ case 22: sprintf(buffer, "abs r%d", reg2); break;
+ case 23: sprintf(buffer, "sh r%d,r%d", reg1, reg2); break;
+ case 24: sprintf(buffer, "shlq $%x,r%d", 32 - convert_zero[reg1], reg2); break;
+ case 25: sprintf(buffer, "shrq $%x,r%d", convert_zero[reg1], reg2); break;
+ case 26: sprintf(buffer, "sha r%d,r%d", reg1, reg2); break;
+ case 27: sprintf(buffer, "sharq $%x,r%d", convert_zero[reg1], reg2); break;
+ case 28: sprintf(buffer, "ror r%d,r%d", reg1, reg2); break;
+ case 29: sprintf(buffer, "rorq $%x,r%d", convert_zero[reg1], reg2); break;
+ case 30: sprintf(buffer, "cmp r%d,r%d", reg1, reg2); break;
+ case 31: sprintf(buffer, "cmpq %s,r%d", signed_16bit((INT16)(reg1 << 11) >> 11), reg2);break;
+ case 32: if (variant == JAGUAR_VARIANT_GPU)
sprintf(buffer, "sat8 r%d", reg2);
else
sprintf(buffer, "subqmod $%x,r%d", convert_zero[reg1], reg2);
break;
- case 33: if (variant == JAGUAR_VARIANT_GPU)
+ case 33: if (variant == JAGUAR_VARIANT_GPU)
sprintf(buffer, "sat16 r%d", reg2);
else
sprintf(buffer, "sat16s r%d", reg2);
break;
- case 34: sprintf(buffer, "move r%d,r%d", reg1, reg2); break;
- case 35: sprintf(buffer, "moveq %d,r%d", reg1, reg2); break;
- case 36: sprintf(buffer, "moveta r%d,r%d", reg1, reg2); break;
- case 37: sprintf(buffer, "movefa r%d,r%d", reg1, reg2); break;
- case 38: sprintf(buffer, "movei $%x,r%d", ROPCODE(2) | (ROPCODE(4)<<16), reg2); size = 6; break;
- case 39: sprintf(buffer, "loadb (r%d),r%d", reg1, reg2); break;
- case 40: sprintf(buffer, "loadw (r%d),r%d", reg1, reg2); break;
- case 41: sprintf(buffer, "load (r%d),r%d", reg1, reg2); break;
- case 42: if (variant == JAGUAR_VARIANT_GPU)
+ case 34: sprintf(buffer, "move r%d,r%d", reg1, reg2); break;
+ case 35: sprintf(buffer, "moveq %d,r%d", reg1, reg2); break;
+ case 36: sprintf(buffer, "moveta r%d,r%d", reg1, reg2); break;
+ case 37: sprintf(buffer, "movefa r%d,r%d", reg1, reg2); break;
+ case 38: sprintf(buffer, "movei $%x,r%d", ROPCODE(2) | (ROPCODE(4)<<16), reg2); size = 6; break;
+ case 39: sprintf(buffer, "loadb (r%d),r%d", reg1, reg2); break;
+ case 40: sprintf(buffer, "loadw (r%d),r%d", reg1, reg2); break;
+ case 41: sprintf(buffer, "load (r%d),r%d", reg1, reg2); break;
+ case 42: if (variant == JAGUAR_VARIANT_GPU)
sprintf(buffer, "loadp (r%d),r%d", reg1, reg2);
else
sprintf(buffer, "sat32s r%d", reg2);
break;
- case 43: sprintf(buffer, "load (r14+$%x),r%d", convert_zero[reg1]*4, reg2);break;
- case 44: sprintf(buffer, "load (r15+$%x),r%d", convert_zero[reg1]*4, reg2);break;
- case 45: sprintf(buffer, "storeb r%d,(r%d)", reg2, reg1); break;
- case 46: sprintf(buffer, "storew r%d,(r%d)", reg2, reg1); break;
- case 47: sprintf(buffer, "store r%d,(r%d)", reg2, reg1); break;
- case 48: if (variant == JAGUAR_VARIANT_GPU)
+ case 43: sprintf(buffer, "load (r14+$%x),r%d", convert_zero[reg1]*4, reg2);break;
+ case 44: sprintf(buffer, "load (r15+$%x),r%d", convert_zero[reg1]*4, reg2);break;
+ case 45: sprintf(buffer, "storeb r%d,(r%d)", reg2, reg1); break;
+ case 46: sprintf(buffer, "storew r%d,(r%d)", reg2, reg1); break;
+ case 47: sprintf(buffer, "store r%d,(r%d)", reg2, reg1); break;
+ case 48: if (variant == JAGUAR_VARIANT_GPU)
sprintf(buffer, "storep r%d,(r%d)", reg2, reg1);
else
sprintf(buffer, "mirror r%d", reg2);
break;
- case 49: sprintf(buffer, "store r%d,(r14+$%x)", reg2, convert_zero[reg1]*4);break;
- case 50: sprintf(buffer, "store r%d,(r15+$%x)", reg2, convert_zero[reg1]*4);break;
- case 51: sprintf(buffer, "move pc,r%d", reg2); break;
- case 52: sprintf(buffer, "jump %s(r%d)", condition[reg2], reg1); break;
- case 53: sprintf(buffer, "jr %s%08X", condition[reg2], pc + ((INT8)(reg1 << 3) >> 2)); break;
- case 54: sprintf(buffer, "mmult r%d,r%d", reg1, reg2); break;
- case 55: sprintf(buffer, "mtoi r%d,r%d", reg1, reg2); break;
- case 56: sprintf(buffer, "normi r%d,r%d", reg1, reg2); break;
- case 57: sprintf(buffer, "nop"); break;
- case 58: sprintf(buffer, "load (r14+r%d),r%d", reg1, reg2); break;
- case 59: sprintf(buffer, "load (r15+r%d),r%d", reg1, reg2); break;
- case 60: sprintf(buffer, "store r%d,(r14+r%d)", reg2, reg1); break;
- case 61: sprintf(buffer, "store r%d,(r15+r%d)", reg2, reg1); break;
- case 62: if (variant == JAGUAR_VARIANT_GPU)
+ case 49: sprintf(buffer, "store r%d,(r14+$%x)", reg2, convert_zero[reg1]*4);break;
+ case 50: sprintf(buffer, "store r%d,(r15+$%x)", reg2, convert_zero[reg1]*4);break;
+ case 51: sprintf(buffer, "move pc,r%d", reg2); break;
+ case 52: sprintf(buffer, "jump %s(r%d)", condition[reg2], reg1); break;
+ case 53: sprintf(buffer, "jr %s%08X", condition[reg2], pc + ((INT8)(reg1 << 3) >> 2)); break;
+ case 54: sprintf(buffer, "mmult r%d,r%d", reg1, reg2); break;
+ case 55: sprintf(buffer, "mtoi r%d,r%d", reg1, reg2); break;
+ case 56: sprintf(buffer, "normi r%d,r%d", reg1, reg2); break;
+ case 57: sprintf(buffer, "nop"); break;
+ case 58: sprintf(buffer, "load (r14+r%d),r%d", reg1, reg2); break;
+ case 59: sprintf(buffer, "load (r15+r%d),r%d", reg1, reg2); break;
+ case 60: sprintf(buffer, "store r%d,(r14+r%d)", reg2, reg1); break;
+ case 61: sprintf(buffer, "store r%d,(r15+r%d)", reg2, reg1); break;
+ case 62: if (variant == JAGUAR_VARIANT_GPU)
sprintf(buffer, "sat24 r%d", reg2);
else
sprintf(buffer, "illegal");
break;
- case 63: if (variant == JAGUAR_VARIANT_GPU)
+ case 63: if (variant == JAGUAR_VARIANT_GPU)
sprintf(buffer, reg1 ?
- "unpack r%d" :
- "pack r%d", reg2);
+ "unpack r%d" :
+ "pack r%d", reg2);
else
sprintf(buffer, "addqmod $%x,r%d", convert_zero[reg1], reg2);
break;
@@ -185,13 +185,10 @@ static unsigned dasmjag(int variant, char *buffer, unsigned pc, const UINT8 *opr
CPU_DISASSEMBLE( jaguargpu )
{
- return dasmjag(JAGUAR_VARIANT_GPU, buffer, pc, oprom);
+ return dasmjag(JAGUAR_VARIANT_GPU, buffer, pc, oprom);
}
CPU_DISASSEMBLE( jaguardsp )
{
- return dasmjag(JAGUAR_VARIANT_DSP, buffer, pc, oprom);
+ return dasmjag(JAGUAR_VARIANT_DSP, buffer, pc, oprom);
}
-
-
-
diff --git a/src/emu/cpu/jaguar/jaguar.c b/src/emu/cpu/jaguar/jaguar.c
index f5fdaec6d11..b408c18ef8b 100644
--- a/src/emu/cpu/jaguar/jaguar.c
+++ b/src/emu/cpu/jaguar/jaguar.c
@@ -13,45 +13,45 @@
CPU_DISASSEMBLE( jaguargpu );
CPU_DISASSEMBLE( jaguardsp );
-#define LOG_GPU_IO 0
-#define LOG_DSP_IO 0
+#define LOG_GPU_IO 0
+#define LOG_DSP_IO 0
/***************************************************************************
CONSTANTS
***************************************************************************/
-#define ZFLAG 0x00001
-#define CFLAG 0x00002
-#define NFLAG 0x00004
-#define IFLAG 0x00008
-#define EINT0FLAG 0x00010
-#define EINT1FLAG 0x00020
-#define EINT2FLAG 0x00040
-#define EINT3FLAG 0x00080
-#define EINT4FLAG 0x00100
-#define EINT04FLAGS (EINT0FLAG | EINT1FLAG | EINT2FLAG | EINT3FLAG | EINT4FLAG)
-#define CINT0FLAG 0x00200
-#define CINT1FLAG 0x00400
-#define CINT2FLAG 0x00800
-#define CINT3FLAG 0x01000
-#define CINT4FLAG 0x02000
-#define CINT04FLAGS (CINT0FLAG | CINT1FLAG | CINT2FLAG | CINT3FLAG | CINT4FLAG)
-#define RPAGEFLAG 0x04000
-#define DMAFLAG 0x08000
-#define EINT5FLAG 0x10000 /* DSP only */
-#define CINT5FLAG 0x20000 /* DSP only */
-
-#define CLR_Z(J) ((J)->FLAGS &= ~ZFLAG)
-#define CLR_ZN(J) ((J)->FLAGS &= ~(ZFLAG | NFLAG))
-#define CLR_ZNC(J) ((J)->FLAGS &= ~(CFLAG | ZFLAG | NFLAG))
-#define SET_Z(J,r) ((J)->FLAGS |= ((r) == 0))
-#define SET_C_ADD(J,a,b) ((J)->FLAGS |= ((UINT32)(b) > (UINT32)(~(a))) << 1)
-#define SET_C_SUB(J,a,b) ((J)->FLAGS |= ((UINT32)(b) > (UINT32)(a)) << 1)
-#define SET_N(J,r) ((J)->FLAGS |= (((UINT32)(r) >> 29) & 4))
-#define SET_ZN(J,r) SET_N(J,r); SET_Z(J,r)
-#define SET_ZNC_ADD(J,a,b,r) SET_N(J,r); SET_Z(J,r); SET_C_ADD(J,a,b)
-#define SET_ZNC_SUB(J,a,b,r) SET_N(J,r); SET_Z(J,r); SET_C_SUB(J,a,b)
+#define ZFLAG 0x00001
+#define CFLAG 0x00002
+#define NFLAG 0x00004
+#define IFLAG 0x00008
+#define EINT0FLAG 0x00010
+#define EINT1FLAG 0x00020
+#define EINT2FLAG 0x00040
+#define EINT3FLAG 0x00080
+#define EINT4FLAG 0x00100
+#define EINT04FLAGS (EINT0FLAG | EINT1FLAG | EINT2FLAG | EINT3FLAG | EINT4FLAG)
+#define CINT0FLAG 0x00200
+#define CINT1FLAG 0x00400
+#define CINT2FLAG 0x00800
+#define CINT3FLAG 0x01000
+#define CINT4FLAG 0x02000
+#define CINT04FLAGS (CINT0FLAG | CINT1FLAG | CINT2FLAG | CINT3FLAG | CINT4FLAG)
+#define RPAGEFLAG 0x04000
+#define DMAFLAG 0x08000
+#define EINT5FLAG 0x10000 /* DSP only */
+#define CINT5FLAG 0x20000 /* DSP only */
+
+#define CLR_Z(J) ((J)->FLAGS &= ~ZFLAG)
+#define CLR_ZN(J) ((J)->FLAGS &= ~(ZFLAG | NFLAG))
+#define CLR_ZNC(J) ((J)->FLAGS &= ~(CFLAG | ZFLAG | NFLAG))
+#define SET_Z(J,r) ((J)->FLAGS |= ((r) == 0))
+#define SET_C_ADD(J,a,b) ((J)->FLAGS |= ((UINT32)(b) > (UINT32)(~(a))) << 1)
+#define SET_C_SUB(J,a,b) ((J)->FLAGS |= ((UINT32)(b) > (UINT32)(a)) << 1)
+#define SET_N(J,r) ((J)->FLAGS |= (((UINT32)(r) >> 29) & 4))
+#define SET_ZN(J,r) SET_N(J,r); SET_Z(J,r)
+#define SET_ZNC_ADD(J,a,b,r) SET_N(J,r); SET_Z(J,r); SET_C_ADD(J,a,b)
+#define SET_ZNC_SUB(J,a,b,r) SET_N(J,r); SET_Z(J,r); SET_C_SUB(J,a,b)
@@ -59,18 +59,18 @@ CPU_DISASSEMBLE( jaguardsp );
MACROS
***************************************************************************/
-#define PC ctrl[G_PC]
-#define FLAGS ctrl[G_FLAGS]
+#define PC ctrl[G_PC]
+#define FLAGS ctrl[G_FLAGS]
-#define CONDITION(x) condition_table[(x) + ((jaguar->FLAGS & 7) << 5)]
+#define CONDITION(x) condition_table[(x) + ((jaguar->FLAGS & 7) << 5)]
-#define READBYTE(J,a) (J)->program->read_byte(a)
-#define READWORD(J,a) (J)->program->read_word(a)
-#define READLONG(J,a) (J)->program->read_dword(a)
+#define READBYTE(J,a) (J)->program->read_byte(a)
+#define READWORD(J,a) (J)->program->read_word(a)
+#define READLONG(J,a) (J)->program->read_dword(a)
-#define WRITEBYTE(J,a,v) (J)->program->write_byte(a, v)
-#define WRITEWORD(J,a,v) (J)->program->write_word(a, v)
-#define WRITELONG(J,a,v) (J)->program->write_dword(a, v)
+#define WRITEBYTE(J,a,v) (J)->program->write_byte(a, v)
+#define WRITEWORD(J,a,v) (J)->program->write_word(a, v)
+#define WRITELONG(J,a,v) (J)->program->write_dword(a, v)
@@ -82,21 +82,21 @@ CPU_DISASSEMBLE( jaguardsp );
struct jaguar_cpu_state
{
/* core registers */
- UINT32 r[32];
- UINT32 a[32];
- UINT32 * b0;
- UINT32 * b1;
+ UINT32 r[32];
+ UINT32 a[32];
+ UINT32 * b0;
+ UINT32 * b1;
/* control registers */
- UINT32 ctrl[G_CTRLMAX];
- UINT32 ppc;
- UINT64 accum;
+ UINT32 ctrl[G_CTRLMAX];
+ UINT32 ppc;
+ UINT64 accum;
/* internal stuff */
- int isdsp;
- int icount;
- int bankswitch_icount;
- void (*const *table)(jaguar_cpu_state *jaguar, UINT16 op);
+ int isdsp;
+ int icount;
+ int bankswitch_icount;
+ void (*const *table)(jaguar_cpu_state *jaguar, UINT16 op);
device_irq_acknowledge_callback irq_callback;
jaguar_int_func cpu_interrupt;
legacy_cpu_device *device;
@@ -110,9 +110,9 @@ struct jaguar_cpu_state
PRIVATE GLOBAL VARIABLES
***************************************************************************/
-static UINT32 table_refcount;
-static UINT16 * mirror_table;
-static UINT8 * condition_table;
+static UINT32 table_refcount;
+static UINT16 * mirror_table;
+static UINT8 * condition_table;
static const UINT32 convert_zero[32] =
{ 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
@@ -127,7 +127,7 @@ static void abs_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void add_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void addc_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void addq_n_rn(jaguar_cpu_state *jaguar, UINT16 op);
-static void addqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
+static void addqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
static void addqt_n_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void and_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void bclr_n_rn(jaguar_cpu_state *jaguar, UINT16 op);
@@ -149,8 +149,8 @@ static void load_r14rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void load_r15rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void loadb_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void loadw_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
-static void loadp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
-static void mirror_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
+static void loadp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
+static void mirror_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
static void mmult_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void move_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void move_pc_rn(jaguar_cpu_state *jaguar, UINT16 op);
@@ -165,15 +165,15 @@ static void nop(jaguar_cpu_state *jaguar, UINT16 op);
static void normi_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void not_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void or_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
-static void pack_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
+static void pack_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
static void resmac_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void ror_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void rorq_n_rn(jaguar_cpu_state *jaguar, UINT16 op);
-static void sat8_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
-static void sat16_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
-static void sat16s_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
-static void sat24_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
-static void sat32s_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
+static void sat8_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
+static void sat16_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
+static void sat16s_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
+static void sat24_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
+static void sat32s_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
static void sh_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void sha_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void sharq_n_rn(jaguar_cpu_state *jaguar, UINT16 op);
@@ -186,52 +186,52 @@ static void store_rn_r14rn(jaguar_cpu_state *jaguar, UINT16 op);
static void store_rn_r15rn(jaguar_cpu_state *jaguar, UINT16 op);
static void storeb_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void storew_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
-static void storep_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
+static void storep_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */
static void sub_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void subc_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void subq_n_rn(jaguar_cpu_state *jaguar, UINT16 op);
-static void subqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
+static void subqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */
static void subqt_n_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void xor_rn_rn(jaguar_cpu_state *jaguar, UINT16 op);
static void (*const gpu_op_table[64])(jaguar_cpu_state *jaguar, UINT16 op) =
{
- /* 00-03 */ add_rn_rn, addc_rn_rn, addq_n_rn, addqt_n_rn,
- /* 04-07 */ sub_rn_rn, subc_rn_rn, subq_n_rn, subqt_n_rn,
- /* 08-11 */ neg_rn, and_rn_rn, or_rn_rn, xor_rn_rn,
- /* 12-15 */ not_rn, btst_n_rn, bset_n_rn, bclr_n_rn,
- /* 16-19 */ mult_rn_rn, imult_rn_rn, imultn_rn_rn, resmac_rn,
- /* 20-23 */ imacn_rn_rn, div_rn_rn, abs_rn, sh_rn_rn,
- /* 24-27 */ shlq_n_rn, shrq_n_rn, sha_rn_rn, sharq_n_rn,
- /* 28-31 */ ror_rn_rn, rorq_n_rn, cmp_rn_rn, cmpq_n_rn,
- /* 32-35 */ sat8_rn, sat16_rn, move_rn_rn, moveq_n_rn,
- /* 36-39 */ moveta_rn_rn, movefa_rn_rn, movei_n_rn, loadb_rn_rn,
- /* 40-43 */ loadw_rn_rn, load_rn_rn, loadp_rn_rn, load_r14n_rn,
- /* 44-47 */ load_r15n_rn, storeb_rn_rn, storew_rn_rn, store_rn_rn,
- /* 48-51 */ storep_rn_rn, store_rn_r14n, store_rn_r15n, move_pc_rn,
- /* 52-55 */ jump_cc_rn, jr_cc_n, mmult_rn_rn, mtoi_rn_rn,
- /* 56-59 */ normi_rn_rn, nop, load_r14rn_rn, load_r15rn_rn,
- /* 60-63 */ store_rn_r14rn, store_rn_r15rn, sat24_rn, pack_rn
+ /* 00-03 */ add_rn_rn, addc_rn_rn, addq_n_rn, addqt_n_rn,
+ /* 04-07 */ sub_rn_rn, subc_rn_rn, subq_n_rn, subqt_n_rn,
+ /* 08-11 */ neg_rn, and_rn_rn, or_rn_rn, xor_rn_rn,
+ /* 12-15 */ not_rn, btst_n_rn, bset_n_rn, bclr_n_rn,
+ /* 16-19 */ mult_rn_rn, imult_rn_rn, imultn_rn_rn, resmac_rn,
+ /* 20-23 */ imacn_rn_rn, div_rn_rn, abs_rn, sh_rn_rn,
+ /* 24-27 */ shlq_n_rn, shrq_n_rn, sha_rn_rn, sharq_n_rn,
+ /* 28-31 */ ror_rn_rn, rorq_n_rn, cmp_rn_rn, cmpq_n_rn,
+ /* 32-35 */ sat8_rn, sat16_rn, move_rn_rn, moveq_n_rn,
+ /* 36-39 */ moveta_rn_rn, movefa_rn_rn, movei_n_rn, loadb_rn_rn,
+ /* 40-43 */ loadw_rn_rn, load_rn_rn, loadp_rn_rn, load_r14n_rn,
+ /* 44-47 */ load_r15n_rn, storeb_rn_rn, storew_rn_rn, store_rn_rn,
+ /* 48-51 */ storep_rn_rn, store_rn_r14n, store_rn_r15n, move_pc_rn,
+ /* 52-55 */ jump_cc_rn, jr_cc_n, mmult_rn_rn, mtoi_rn_rn,
+ /* 56-59 */ normi_rn_rn, nop, load_r14rn_rn, load_r15rn_rn,
+ /* 60-63 */ store_rn_r14rn, store_rn_r15rn, sat24_rn, pack_rn
};
static void (*const dsp_op_table[64])(jaguar_cpu_state *jaguar, UINT16 op) =
{
- /* 00-03 */ add_rn_rn, addc_rn_rn, addq_n_rn, addqt_n_rn,
- /* 04-07 */ sub_rn_rn, subc_rn_rn, subq_n_rn, subqt_n_rn,
- /* 08-11 */ neg_rn, and_rn_rn, or_rn_rn, xor_rn_rn,
- /* 12-15 */ not_rn, btst_n_rn, bset_n_rn, bclr_n_rn,
- /* 16-19 */ mult_rn_rn, imult_rn_rn, imultn_rn_rn, resmac_rn,
- /* 20-23 */ imacn_rn_rn, div_rn_rn, abs_rn, sh_rn_rn,
- /* 24-27 */ shlq_n_rn, shrq_n_rn, sha_rn_rn, sharq_n_rn,
- /* 28-31 */ ror_rn_rn, rorq_n_rn, cmp_rn_rn, cmpq_n_rn,
- /* 32-35 */ subqmod_n_rn, sat16s_rn, move_rn_rn, moveq_n_rn,
- /* 36-39 */ moveta_rn_rn, movefa_rn_rn, movei_n_rn, loadb_rn_rn,
- /* 40-43 */ loadw_rn_rn, load_rn_rn, sat32s_rn, load_r14n_rn,
- /* 44-47 */ load_r15n_rn, storeb_rn_rn, storew_rn_rn, store_rn_rn,
- /* 48-51 */ mirror_rn, store_rn_r14n, store_rn_r15n, move_pc_rn,
- /* 52-55 */ jump_cc_rn, jr_cc_n, mmult_rn_rn, mtoi_rn_rn,
- /* 56-59 */ normi_rn_rn, nop, load_r14rn_rn, load_r15rn_rn,
- /* 60-63 */ store_rn_r14rn, store_rn_r15rn, illegal, addqmod_n_rn
+ /* 00-03 */ add_rn_rn, addc_rn_rn, addq_n_rn, addqt_n_rn,
+ /* 04-07 */ sub_rn_rn, subc_rn_rn, subq_n_rn, subqt_n_rn,
+ /* 08-11 */ neg_rn, and_rn_rn, or_rn_rn, xor_rn_rn,
+ /* 12-15 */ not_rn, btst_n_rn, bset_n_rn, bclr_n_rn,
+ /* 16-19 */ mult_rn_rn, imult_rn_rn, imultn_rn_rn, resmac_rn,
+ /* 20-23 */ imacn_rn_rn, div_rn_rn, abs_rn, sh_rn_rn,
+ /* 24-27 */ shlq_n_rn, shrq_n_rn, sha_rn_rn, sharq_n_rn,
+ /* 28-31 */ ror_rn_rn, rorq_n_rn, cmp_rn_rn, cmpq_n_rn,
+ /* 32-35 */ subqmod_n_rn, sat16s_rn, move_rn_rn, moveq_n_rn,
+ /* 36-39 */ moveta_rn_rn, movefa_rn_rn, movei_n_rn, loadb_rn_rn,
+ /* 40-43 */ loadw_rn_rn, load_rn_rn, sat32s_rn, load_r14n_rn,
+ /* 44-47 */ load_r15n_rn, storeb_rn_rn, storew_rn_rn, store_rn_rn,
+ /* 48-51 */ mirror_rn, store_rn_r14n, store_rn_r15n, move_pc_rn,
+ /* 52-55 */ jump_cc_rn, jr_cc_n, mmult_rn_rn, mtoi_rn_rn,
+ /* 56-59 */ normi_rn_rn, nop, load_r14rn_rn, load_r15rn_rn,
+ /* 60-63 */ store_rn_r14rn, store_rn_r15rn, illegal, addqmod_n_rn
};
@@ -240,7 +240,7 @@ static void (*const dsp_op_table[64])(jaguar_cpu_state *jaguar, UINT16 op) =
MEMORY ACCESSORS
***************************************************************************/
-#define ROPCODE(J,pc) ((J)->direct->read_decrypted_word(pc, WORD_XOR_BE(0)))
+#define ROPCODE(J,pc) ((J)->direct->read_decrypted_word(pc, WORD_XOR_BE(0)))
@@ -252,7 +252,7 @@ INLINE jaguar_cpu_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == JAGUARGPU ||
- device->type() == JAGUARDSP);
+ device->type() == JAGUARDSP);
return (jaguar_cpu_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -371,13 +371,13 @@ static void init_tables(void)
mirror_table = global_alloc_array(UINT16, 65536);
for (i = 0; i < 65536; i++)
mirror_table[i] = ((i >> 15) & 0x0001) | ((i >> 13) & 0x0002) |
- ((i >> 11) & 0x0004) | ((i >> 9) & 0x0008) |
- ((i >> 7) & 0x0010) | ((i >> 5) & 0x0020) |
- ((i >> 3) & 0x0040) | ((i >> 1) & 0x0080) |
- ((i << 1) & 0x0100) | ((i << 3) & 0x0200) |
- ((i << 5) & 0x0400) | ((i << 7) & 0x0800) |
- ((i << 9) & 0x1000) | ((i << 11) & 0x2000) |
- ((i << 13) & 0x4000) | ((i << 15) & 0x8000);
+ ((i >> 11) & 0x0004) | ((i >> 9) & 0x0008) |
+ ((i >> 7) & 0x0010) | ((i >> 5) & 0x0020) |
+ ((i >> 3) & 0x0040) | ((i >> 1) & 0x0080) |
+ ((i << 1) & 0x0100) | ((i << 3) & 0x0200) |
+ ((i << 5) & 0x0400) | ((i << 7) & 0x0800) |
+ ((i << 9) & 0x1000) | ((i << 11) & 0x2000) |
+ ((i << 13) & 0x4000) | ((i << 15) & 0x8000);
/* fill in the condition table */
condition_table = global_alloc_array(UINT8, 32 * 8);
@@ -598,7 +598,7 @@ void addq_n_rn(jaguar_cpu_state *jaguar, UINT16 op)
CLR_ZNC(jaguar); SET_ZNC_ADD(jaguar, r2, r1, res);
}
-void addqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
+void addqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
{
int dreg = op & 31;
UINT32 r1 = convert_zero[(op >> 5) & 31];
@@ -751,7 +751,7 @@ void jr_cc_n(jaguar_cpu_state *jaguar, UINT16 op)
jaguar->PC = newpc;
(*jaguar->table[op >> 10])(jaguar, op);
- jaguar->icount -= 3; /* 3 wait states guaranteed */
+ jaguar->icount -= 3; /* 3 wait states guaranteed */
}
}
@@ -768,7 +768,7 @@ void jump_cc_rn(jaguar_cpu_state *jaguar, UINT16 op)
jaguar->PC = newpc;
(*jaguar->table[op >> 10])(jaguar, op);
- jaguar->icount -= 3; /* 3 wait states guaranteed */
+ jaguar->icount -= 3; /* 3 wait states guaranteed */
}
}
@@ -814,14 +814,14 @@ void loadw_rn_rn(jaguar_cpu_state *jaguar, UINT16 op)
jaguar->r[op & 31] = READWORD(jaguar, r1);
}
-void loadp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
+void loadp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
{
UINT32 r1 = jaguar->r[(op >> 5) & 31];
jaguar->ctrl[G_HIDATA] = READWORD(jaguar, r1);
jaguar->r[op & 31] = READWORD(jaguar, r1+4);
}
-void mirror_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
+void mirror_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
{
int dreg = op & 31;
UINT32 r1 = jaguar->r[dreg];
@@ -959,15 +959,15 @@ void or_rn_rn(jaguar_cpu_state *jaguar, UINT16 op)
CLR_ZN(jaguar); SET_ZN(jaguar, res);
}
-void pack_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
+void pack_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
{
int dreg = op & 31;
UINT32 r1 = jaguar->r[(op >> 5) & 31];
UINT32 r2 = jaguar->r[dreg];
UINT32 res;
- if (r1 == 0) /* PACK */
+ if (r1 == 0) /* PACK */
res = ((r2 >> 10) & 0xf000) | ((r2 >> 5) & 0x0f00) | (r2 & 0xff);
- else /* UNPACK */
+ else /* UNPACK */
res = ((r2 & 0xf000) << 10) | ((r2 & 0x0f00) << 5) | (r2 & 0xff);
jaguar->r[dreg] = res;
CLR_ZN(jaguar); SET_ZN(jaguar, res);
@@ -998,7 +998,7 @@ void rorq_n_rn(jaguar_cpu_state *jaguar, UINT16 op)
CLR_ZNC(jaguar); SET_ZN(jaguar, res); jaguar->FLAGS |= (r2 >> 30) & 2;
}
-void sat8_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
+void sat8_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
{
int dreg = op & 31;
INT32 r2 = jaguar->r[dreg];
@@ -1007,7 +1007,7 @@ void sat8_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
CLR_ZN(jaguar); SET_ZN(jaguar, res);
}
-void sat16_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
+void sat16_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
{
int dreg = op & 31;
INT32 r2 = jaguar->r[dreg];
@@ -1016,7 +1016,7 @@ void sat16_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
CLR_ZN(jaguar); SET_ZN(jaguar, res);
}
-void sat16s_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
+void sat16s_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
{
int dreg = op & 31;
INT32 r2 = jaguar->r[dreg];
@@ -1025,7 +1025,7 @@ void sat16s_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
CLR_ZN(jaguar); SET_ZN(jaguar, res);
}
-void sat24_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
+void sat24_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
{
int dreg = op & 31;
INT32 r2 = jaguar->r[dreg];
@@ -1034,7 +1034,7 @@ void sat24_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
CLR_ZN(jaguar); SET_ZN(jaguar, res);
}
-void sat32s_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
+void sat32s_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
{
int dreg = op & 31;
INT32 r2 = (UINT32)jaguar->r[dreg];
@@ -1160,7 +1160,7 @@ void storew_rn_rn(jaguar_cpu_state *jaguar, UINT16 op)
WRITEWORD(jaguar, r1, jaguar->r[op & 31]);
}
-void storep_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
+void storep_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */
{
UINT32 r1 = jaguar->r[(op >> 5) & 31];
WRITELONG(jaguar, r1, jaguar->ctrl[G_HIDATA]);
@@ -1197,7 +1197,7 @@ void subq_n_rn(jaguar_cpu_state *jaguar, UINT16 op)
CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, r2, r1, res);
}
-void subqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
+void subqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */
{
int dreg = op & 31;
UINT32 r1 = convert_zero[(op >> 5) & 31];
@@ -1434,49 +1434,49 @@ static CPU_SET_INFO( jaguargpu )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ0: set_irq_line(jaguar, JAGUAR_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ1: set_irq_line(jaguar, JAGUAR_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ2: set_irq_line(jaguar, JAGUAR_IRQ2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ3: set_irq_line(jaguar, JAGUAR_IRQ3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ4: set_irq_line(jaguar, JAGUAR_IRQ4, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ0: set_irq_line(jaguar, JAGUAR_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ1: set_irq_line(jaguar, JAGUAR_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ2: set_irq_line(jaguar, JAGUAR_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ3: set_irq_line(jaguar, JAGUAR_IRQ3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ4: set_irq_line(jaguar, JAGUAR_IRQ4, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + JAGUAR_PC: jaguar->PC = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_FLAGS: jaguar->FLAGS = info->i; break;
-
- case CPUINFO_INT_REGISTER + JAGUAR_R0: jaguar->r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R1: jaguar->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R2: jaguar->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R3: jaguar->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R4: jaguar->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R5: jaguar->r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R6: jaguar->r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R7: jaguar->r[7] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R8: jaguar->r[8] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R9: jaguar->r[9] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R10: jaguar->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R11: jaguar->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R12: jaguar->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R13: jaguar->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R14: jaguar->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R15: jaguar->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R16: jaguar->r[16] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R17: jaguar->r[17] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R18: jaguar->r[18] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R19: jaguar->r[19] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R20: jaguar->r[20] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R21: jaguar->r[21] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R22: jaguar->r[22] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R23: jaguar->r[23] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R24: jaguar->r[24] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R25: jaguar->r[25] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R26: jaguar->r[26] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R27: jaguar->r[27] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R28: jaguar->r[28] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R29: jaguar->r[29] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R30: jaguar->r[30] = info->i; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R31: jaguar->r[31] = info->i; break;
- case CPUINFO_INT_SP: jaguar->b0[31] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_PC: jaguar->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_FLAGS: jaguar->FLAGS = info->i; break;
+
+ case CPUINFO_INT_REGISTER + JAGUAR_R0: jaguar->r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R1: jaguar->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R2: jaguar->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R3: jaguar->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R4: jaguar->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R5: jaguar->r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R6: jaguar->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R7: jaguar->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R8: jaguar->r[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R9: jaguar->r[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R10: jaguar->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R11: jaguar->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R12: jaguar->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R13: jaguar->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R14: jaguar->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R15: jaguar->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R16: jaguar->r[16] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R17: jaguar->r[17] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R18: jaguar->r[18] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R19: jaguar->r[19] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R20: jaguar->r[20] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R21: jaguar->r[21] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R22: jaguar->r[22] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R23: jaguar->r[23] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R24: jaguar->r[24] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R25: jaguar->r[25] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R26: jaguar->r[26] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R27: jaguar->r[27] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R28: jaguar->r[28] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R29: jaguar->r[29] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R30: jaguar->r[30] = info->i; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R31: jaguar->r[31] = info->i; break;
+ case CPUINFO_INT_SP: jaguar->b0[31] = info->i; break;
}
}
@@ -1492,85 +1492,85 @@ CPU_GET_INFO( jaguargpu )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(jaguar_cpu_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ0: info->i = (jaguar->ctrl[G_CTRL] & 0x40) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ1: info->i = (jaguar->ctrl[G_CTRL] & 0x80) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ2: info->i = (jaguar->ctrl[G_CTRL] & 0x100) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ3: info->i = (jaguar->ctrl[G_CTRL] & 0x200) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ4: info->i = (jaguar->ctrl[G_CTRL] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = jaguar->ppc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(jaguar_cpu_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ0: info->i = (jaguar->ctrl[G_CTRL] & 0x40) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ1: info->i = (jaguar->ctrl[G_CTRL] & 0x80) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ2: info->i = (jaguar->ctrl[G_CTRL] & 0x100) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ3: info->i = (jaguar->ctrl[G_CTRL] & 0x200) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ4: info->i = (jaguar->ctrl[G_CTRL] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = jaguar->ppc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + JAGUAR_PC: info->i = jaguar->PC; break;
- case CPUINFO_INT_REGISTER + JAGUAR_FLAGS: info->i = jaguar->FLAGS; break;
-
- case CPUINFO_INT_REGISTER + JAGUAR_R0: info->i = jaguar->r[0]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R1: info->i = jaguar->r[1]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R2: info->i = jaguar->r[2]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R3: info->i = jaguar->r[3]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R4: info->i = jaguar->r[4]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R5: info->i = jaguar->r[5]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R6: info->i = jaguar->r[6]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R7: info->i = jaguar->r[7]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R8: info->i = jaguar->r[8]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R9: info->i = jaguar->r[9]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R10: info->i = jaguar->r[10]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R11: info->i = jaguar->r[11]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R12: info->i = jaguar->r[12]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R13: info->i = jaguar->r[13]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R14: info->i = jaguar->r[14]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R15: info->i = jaguar->r[15]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R16: info->i = jaguar->r[16]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R17: info->i = jaguar->r[17]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R18: info->i = jaguar->r[18]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R19: info->i = jaguar->r[19]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R20: info->i = jaguar->r[20]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R21: info->i = jaguar->r[21]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R22: info->i = jaguar->r[22]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R23: info->i = jaguar->r[23]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R24: info->i = jaguar->r[24]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R25: info->i = jaguar->r[25]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R26: info->i = jaguar->r[26]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R27: info->i = jaguar->r[27]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R28: info->i = jaguar->r[28]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R29: info->i = jaguar->r[29]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R30: info->i = jaguar->r[30]; break;
- case CPUINFO_INT_REGISTER + JAGUAR_R31: info->i = jaguar->r[31]; break;
- case CPUINFO_INT_SP: info->i = jaguar->b0[31]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_PC: info->i = jaguar->PC; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_FLAGS: info->i = jaguar->FLAGS; break;
+
+ case CPUINFO_INT_REGISTER + JAGUAR_R0: info->i = jaguar->r[0]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R1: info->i = jaguar->r[1]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R2: info->i = jaguar->r[2]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R3: info->i = jaguar->r[3]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R4: info->i = jaguar->r[4]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R5: info->i = jaguar->r[5]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R6: info->i = jaguar->r[6]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R7: info->i = jaguar->r[7]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R8: info->i = jaguar->r[8]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R9: info->i = jaguar->r[9]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R10: info->i = jaguar->r[10]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R11: info->i = jaguar->r[11]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R12: info->i = jaguar->r[12]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R13: info->i = jaguar->r[13]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R14: info->i = jaguar->r[14]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R15: info->i = jaguar->r[15]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R16: info->i = jaguar->r[16]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R17: info->i = jaguar->r[17]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R18: info->i = jaguar->r[18]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R19: info->i = jaguar->r[19]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R20: info->i = jaguar->r[20]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R21: info->i = jaguar->r[21]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R22: info->i = jaguar->r[22]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R23: info->i = jaguar->r[23]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R24: info->i = jaguar->r[24]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R25: info->i = jaguar->r[25]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R26: info->i = jaguar->r[26]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R27: info->i = jaguar->r[27]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R28: info->i = jaguar->r[28]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R29: info->i = jaguar->r[29]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R30: info->i = jaguar->r[30]; break;
+ case CPUINFO_INT_REGISTER + JAGUAR_R31: info->i = jaguar->r[31]; break;
+ case CPUINFO_INT_SP: info->i = jaguar->b0[31]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(jaguargpu); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(jaguargpu); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(jaguar); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(jaguar); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguargpu); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(jaguargpu);break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &jaguar->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(jaguargpu); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(jaguargpu); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(jaguar); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(jaguar); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguargpu); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(jaguargpu);break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &jaguar->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Jaguar GPU"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Atari Jaguar"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Jaguar GPU"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Atari Jaguar"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c",
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c",
jaguar->FLAGS & 0x8000 ? 'D':'.',
jaguar->FLAGS & 0x4000 ? 'A':'.',
jaguar->FLAGS & 0x0100 ? '4':'.',
@@ -1581,42 +1581,42 @@ CPU_GET_INFO( jaguargpu )
jaguar->FLAGS & 0x0008 ? 'I':'.',
jaguar->FLAGS & 0x0004 ? 'N':'.',
jaguar->FLAGS & 0x0002 ? 'C':'.',
- jaguar->FLAGS & 0x0001 ? 'Z':'.'); break;
-
- case CPUINFO_STR_REGISTER + JAGUAR_PC: sprintf(info->s, "PC: %08X", jaguar->PC); break;
- case CPUINFO_STR_REGISTER + JAGUAR_FLAGS: sprintf(info->s, "FLAGS: %08X", jaguar->FLAGS); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R0: sprintf(info->s, "R0: %08X", jaguar->r[0]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R1: sprintf(info->s, "R1: %08X", jaguar->r[1]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R2: sprintf(info->s, "R2: %08X", jaguar->r[2]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R3: sprintf(info->s, "R3: %08X", jaguar->r[3]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R4: sprintf(info->s, "R4: %08X", jaguar->r[4]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R5: sprintf(info->s, "R5: %08X", jaguar->r[5]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R6: sprintf(info->s, "R6: %08X", jaguar->r[6]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R7: sprintf(info->s, "R7: %08X", jaguar->r[7]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R8: sprintf(info->s, "R8: %08X", jaguar->r[8]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R9: sprintf(info->s, "R9: %08X", jaguar->r[9]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R10: sprintf(info->s, "R10:%08X", jaguar->r[10]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R11: sprintf(info->s, "R11:%08X", jaguar->r[11]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R12: sprintf(info->s, "R12:%08X", jaguar->r[12]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R13: sprintf(info->s, "R13:%08X", jaguar->r[13]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R14: sprintf(info->s, "R14:%08X", jaguar->r[14]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R15: sprintf(info->s, "R15:%08X", jaguar->r[15]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R16: sprintf(info->s, "R16:%08X", jaguar->r[16]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R17: sprintf(info->s, "R17:%08X", jaguar->r[17]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R18: sprintf(info->s, "R18:%08X", jaguar->r[18]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R19: sprintf(info->s, "R19:%08X", jaguar->r[19]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R20: sprintf(info->s, "R20:%08X", jaguar->r[20]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R21: sprintf(info->s, "R21:%08X", jaguar->r[21]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R22: sprintf(info->s, "R22:%08X", jaguar->r[22]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R23: sprintf(info->s, "R23:%08X", jaguar->r[23]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R24: sprintf(info->s, "R24:%08X", jaguar->r[24]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R25: sprintf(info->s, "R25:%08X", jaguar->r[25]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R26: sprintf(info->s, "R26:%08X", jaguar->r[26]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R27: sprintf(info->s, "R27:%08X", jaguar->r[27]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R28: sprintf(info->s, "R28:%08X", jaguar->r[28]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R29: sprintf(info->s, "R29:%08X", jaguar->r[29]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R30: sprintf(info->s, "R30:%08X", jaguar->r[30]); break;
- case CPUINFO_STR_REGISTER + JAGUAR_R31: sprintf(info->s, "R31:%08X", jaguar->r[31]); break;
+ jaguar->FLAGS & 0x0001 ? 'Z':'.'); break;
+
+ case CPUINFO_STR_REGISTER + JAGUAR_PC: sprintf(info->s, "PC: %08X", jaguar->PC); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_FLAGS: sprintf(info->s, "FLAGS: %08X", jaguar->FLAGS); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R0: sprintf(info->s, "R0: %08X", jaguar->r[0]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R1: sprintf(info->s, "R1: %08X", jaguar->r[1]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R2: sprintf(info->s, "R2: %08X", jaguar->r[2]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R3: sprintf(info->s, "R3: %08X", jaguar->r[3]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R4: sprintf(info->s, "R4: %08X", jaguar->r[4]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R5: sprintf(info->s, "R5: %08X", jaguar->r[5]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R6: sprintf(info->s, "R6: %08X", jaguar->r[6]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R7: sprintf(info->s, "R7: %08X", jaguar->r[7]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R8: sprintf(info->s, "R8: %08X", jaguar->r[8]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R9: sprintf(info->s, "R9: %08X", jaguar->r[9]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R10: sprintf(info->s, "R10:%08X", jaguar->r[10]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R11: sprintf(info->s, "R11:%08X", jaguar->r[11]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R12: sprintf(info->s, "R12:%08X", jaguar->r[12]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R13: sprintf(info->s, "R13:%08X", jaguar->r[13]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R14: sprintf(info->s, "R14:%08X", jaguar->r[14]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R15: sprintf(info->s, "R15:%08X", jaguar->r[15]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R16: sprintf(info->s, "R16:%08X", jaguar->r[16]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R17: sprintf(info->s, "R17:%08X", jaguar->r[17]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R18: sprintf(info->s, "R18:%08X", jaguar->r[18]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R19: sprintf(info->s, "R19:%08X", jaguar->r[19]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R20: sprintf(info->s, "R20:%08X", jaguar->r[20]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R21: sprintf(info->s, "R21:%08X", jaguar->r[21]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R22: sprintf(info->s, "R22:%08X", jaguar->r[22]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R23: sprintf(info->s, "R23:%08X", jaguar->r[23]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R24: sprintf(info->s, "R24:%08X", jaguar->r[24]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R25: sprintf(info->s, "R25:%08X", jaguar->r[25]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R26: sprintf(info->s, "R26:%08X", jaguar->r[26]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R27: sprintf(info->s, "R27:%08X", jaguar->r[27]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R28: sprintf(info->s, "R28:%08X", jaguar->r[28]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R29: sprintf(info->s, "R29:%08X", jaguar->r[29]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R30: sprintf(info->s, "R30:%08X", jaguar->r[30]); break;
+ case CPUINFO_STR_REGISTER + JAGUAR_R31: sprintf(info->s, "R31:%08X", jaguar->r[31]); break;
}
}
@@ -1631,11 +1631,11 @@ static CPU_SET_INFO( jaguardsp )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ5: set_irq_line(jaguar, JAGUAR_IRQ5, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ5: set_irq_line(jaguar, JAGUAR_IRQ5, info->i); break;
/* --- the following bits of info are set as pointers to data or functions --- */
- default: CPU_SET_INFO_CALL(jaguargpu); break;
+ default: CPU_SET_INFO_CALL(jaguargpu); break;
}
}
@@ -1645,19 +1645,19 @@ CPU_GET_INFO( jaguardsp )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
- case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ5: info->i = (jaguar->ctrl[G_CTRL] & 0x10000) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
+ case CPUINFO_INT_INPUT_STATE + JAGUAR_IRQ5: info->i = (jaguar->ctrl[G_CTRL] & 0x10000) ? ASSERT_LINE : CLEAR_LINE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(jaguardsp); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(jaguardsp); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguardsp); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(jaguardsp);break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(jaguardsp); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(jaguardsp); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(jaguardsp); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(jaguardsp);break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Jaguar DSP"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Jaguar DSP"); break;
- default: CPU_GET_INFO_CALL(jaguargpu); break;
+ default: CPU_GET_INFO_CALL(jaguargpu); break;
}
}
diff --git a/src/emu/cpu/jaguar/jaguar.h b/src/emu/cpu/jaguar/jaguar.h
index 4247c714f7c..b5191a69ffa 100644
--- a/src/emu/cpu/jaguar/jaguar.h
+++ b/src/emu/cpu/jaguar/jaguar.h
@@ -17,8 +17,8 @@
GLOBAL CONSTANTS
***************************************************************************/
-#define JAGUAR_VARIANT_GPU 0
-#define JAGUAR_VARIANT_DSP 1
+#define JAGUAR_VARIANT_GPU 0
+#define JAGUAR_VARIANT_DSP 1
@@ -76,7 +76,7 @@ typedef void (*jaguar_int_func)(device_t *device);
struct jaguar_cpu_config
{
- jaguar_int_func cpu_int_callback;
+ jaguar_int_func cpu_int_callback;
};
@@ -85,12 +85,12 @@ struct jaguar_cpu_config
INTERRUPT CONSTANTS
***************************************************************************/
-#define JAGUAR_IRQ0 0 /* IRQ0 */
-#define JAGUAR_IRQ1 1 /* IRQ1 */
-#define JAGUAR_IRQ2 2 /* IRQ2 */
-#define JAGUAR_IRQ3 3 /* IRQ3 */
-#define JAGUAR_IRQ4 4 /* IRQ4 */
-#define JAGUAR_IRQ5 5 /* IRQ5 */
+#define JAGUAR_IRQ0 0 /* IRQ0 */
+#define JAGUAR_IRQ1 1 /* IRQ1 */
+#define JAGUAR_IRQ2 2 /* IRQ2 */
+#define JAGUAR_IRQ3 3 /* IRQ3 */
+#define JAGUAR_IRQ4 4 /* IRQ4 */
+#define JAGUAR_IRQ5 5 /* IRQ5 */
diff --git a/src/emu/cpu/konami/knmidasm.c b/src/emu/cpu/konami/knmidasm.c
index 511e8b230b3..779307d8dab 100644
--- a/src/emu/cpu/konami/knmidasm.c
+++ b/src/emu/cpu/konami/knmidasm.c
@@ -3,8 +3,8 @@
#include "konami.h"
#ifndef TRUE
-#define TRUE -1
-#define FALSE 0
+#define TRUE -1
+#define FALSE 0
#endif
/*
@@ -1587,277 +1587,277 @@ struct konami_opcode_def {
};
static const konami_opcode_def op_table[256] = {
- /* 00 */ { illegal, 0 },
- /* 01 */ { illegal, 0 },
- /* 02 */ { illegal, 0 },
- /* 03 */ { illegal, 0 },
- /* 04 */ { illegal, 0 },
- /* 05 */ { illegal, 0 },
- /* 06 */ { illegal, 0 },
- /* 07 */ { illegal, 0 },
- /* 08 */ { leax, 1 },
- /* 09 */ { leay, 1 },
- /* 0a */ { leau, 1 },
- /* 0b */ { leas, 0 },
- /* 0c */ { pushs, 1 },
- /* 0d */ { pushu, 0 },
- /* 0e */ { pulls, 1 },
- /* 0f */ { pullu, 0 },
-
- /* 10 */ { lda, 1 },
- /* 11 */ { ldb, 1 },
- /* 12 */ { lda2, 1 },
- /* 13 */ { ldb2, 1 },
- /* 14 */ { adda, 1 },
- /* 15 */ { addb, 1 },
- /* 16 */ { adda2, 1 },
- /* 17 */ { addb2, 1 },
- /* 18 */ { adca, 1 },
- /* 19 */ { adcb, 1 },
- /* 1a */ { adca2, 1 },
- /* 1b */ { adcb2, 1 },
- /* 1c */ { suba, 1 },
- /* 1d */ { subb, 1 },
- /* 1e */ { suba2, 1 },
- /* 1f */ { subb2, 1 },
-
- /* 20 */ { sbca, 0 },
- /* 21 */ { sbcb, 0 },
- /* 22 */ { sbca2, 0 },
- /* 23 */ { sbcb2, 0 },
- /* 24 */ { anda, 1 },
- /* 25 */ { andb, 1 },
- /* 26 */ { anda2, 1 },
- /* 27 */ { andb2, 1 },
- /* 28 */ { bita, 0 },
- /* 29 */ { bitb, 0 },
- /* 2a */ { bita2, 0 },
- /* 2b */ { bitb2, 0 },
- /* 2c */ { eora, 0 },
- /* 2d */ { eorb, 0 },
- /* 2e */ { eora2, 0 },
- /* 2f */ { eorb2, 0 },
-
- /* 30 */ { ora, 1 },
- /* 31 */ { orb, 1 },
- /* 32 */ { ora2, 1 },
- /* 33 */ { orb2, 1 },
- /* 34 */ { cmpa, 1 },
- /* 35 */ { cmpb, 1 },
- /* 36 */ { cmpa2, 1 },
- /* 37 */ { cmpb2, 1 },
- /* 38 */ { setlines, 0 },
- /* 39 */ { setlines2, 0 },
- /* 3a */ { sta2, 1 },
- /* 3b */ { stb2, 1 },
- /* 3c */ { andcc, 1 },
- /* 3d */ { orcc, 0 },
- /* 3e */ { exg, 0 },
- /* 3f */ { tfr, 0 },
-
- /* 40 */ { ldd, 1 },
- /* 41 */ { ldd2, 1 },
- /* 42 */ { ldx, 1 },
- /* 43 */ { ldx2, 1 },
- /* 44 */ { ldy, 1 },
- /* 45 */ { ldy2, 1 },
- /* 46 */ { ldu, 1 },
- /* 47 */ { ldu2, 1 },
- /* 48 */ { lds, 1 },
- /* 49 */ { lds2, 1 },
- /* 4a */ { cmpd, 1 },
- /* 4b */ { cmpd2, 1 },
- /* 4c */ { cmpx, 1 },
- /* 4d */ { cmpx2, 1 },
- /* 4e */ { cmpy, 1 },
- /* 4f */ { cmpy2, 1 },
-
- /* 50 */ { cmpu, 1 },
- /* 51 */ { cmpu2, 1 },
- /* 52 */ { cmps, 1 },
- /* 53 */ { cmps2, 1 },
- /* 54 */ { addd, 0 },
- /* 55 */ { addd2, 0 },
- /* 56 */ { subd, 1 },
- /* 57 */ { subd2, 0 },
- /* 58 */ { std2, 1 },
- /* 59 */ { stx2, 1 },
- /* 5a */ { sty2, 1 },
- /* 5b */ { stu2, 1 },
- /* 5c */ { sts2, 1 },
- /* 5d */ { illegal, 0 },
- /* 5e */ { illegal, 0 },
- /* 5f */ { illegal, 0 },
-
- /* 60 */ { bra, 1 },
- /* 61 */ { bhi, 1 },
- /* 62 */ { bcc, 1 },
- /* 63 */ { bne, 1 },
- /* 64 */ { bvc, 1 },
- /* 65 */ { bpl, 1 },
- /* 66 */ { bge, 1 },
- /* 67 */ { bgt, 1 },
- /* 68 */ { lbra, 1 },
- /* 69 */ { lbhi, 1 },
- /* 6a */ { lbcc, 1 },
- /* 6b */ { lbne, 1 },
- /* 6c */ { lbvc, 1 },
- /* 6d */ { lbpl, 1 },
- /* 6e */ { lbge, 1 },
- /* 6f */ { lbgt, 1 },
-
- /* 70 */ { brn, 1 },
- /* 71 */ { bls, 1 },
- /* 72 */ { bcs, 1 },
- /* 73 */ { beq, 1 },
- /* 74 */ { bvs, 1 },
- /* 75 */ { bmi, 1 },
- /* 76 */ { blt, 1 },
- /* 77 */ { ble, 1 },
- /* 78 */ { lbrn, 1 },
- /* 79 */ { lbls, 1 },
- /* 7a */ { lbcs, 1 },
- /* 7b */ { lbeq, 1 },
- /* 7c */ { lbvs, 1 },
- /* 7d */ { lbmi, 1 },
- /* 7e */ { lblt, 1 },
- /* 7f */ { lble, 1 },
-
- /* 80 */ { clra, 1 },
- /* 81 */ { clrb, 1 },
- /* 82 */ { clr2, 1 },
- /* 83 */ { coma, 1 },
- /* 84 */ { comb, 0 },
- /* 85 */ { com2, 0 },
- /* 86 */ { nega, 0 },
- /* 87 */ { negb, 0 },
- /* 88 */ { neg2, 0 },
- /* 89 */ { inca, 1 },
- /* 8a */ { incb, 1 },
- /* 8b */ { inc2, 1 },
- /* 8c */ { deca, 1 },
- /* 8d */ { decb, 1 },
- /* 8e */ { dec2, 1 },
- /* 8f */ { rts, 1 },
-
- /* 90 */ { tsta, 0 },
- /* 91 */ { tstb, 0 },
- /* 92 */ { tst2, 0 },
- /* 93 */ { lsra, 1 },
- /* 94 */ { lsrb, 1 },
- /* 95 */ { lsr2, 0 },
- /* 96 */ { rora, 0 },
- /* 97 */ { rorb, 0 },
- /* 98 */ { ror2, 0 },
- /* 99 */ { asra, 0 },
- /* 9a */ { asrb, 0 },
- /* 9b */ { asr2, 0 },
- /* 9c */ { asla, 1 },
- /* 9d */ { aslb, 1 },
- /* 9e */ { asl2, 0 },
- /* 9f */ { rti, 1 },
-
- /* a0 */ { rola, 1 },
- /* a1 */ { rolb, 0 },
- /* a2 */ { rol2, 0 },
- /* a3 */ { lsrw, 0 },
- /* a4 */ { rorw, 0 },
- /* a5 */ { asrw, 0 },
- /* a6 */ { aslw, 0 },
- /* a7 */ { rolw, 0 },
- /* a8 */ { jmp2, 1 },
- /* a9 */ { jsr2, 1 },
- /* aa */ { bsr, 1 },
- /* ab */ { lbsr, 1 },
- /* ac */ { decbjnz, 0 },
- /* ad */ { decxjnz, 0 },
- /* ae */ { nop, 0 },
- /* af */ { illegal, 0 },
-
- /* b0 */ { abx, 0 },
- /* b1 */ { daa, 0 },
- /* b2 */ { sex, 0 },
- /* b3 */ { mul, 1 },
- /* b4 */ { lmul, 0 },
- /* b5 */ { divx, 0 },
- /* b6 */ { bmove, 1 },
- /* b7 */ { move, 0 },
- /* b8 */ { lsrd, 0 },
- /* b9 */ { lsrd2, 0 },
- /* ba */ { rord, 0 },
- /* bb */ { rord2, 0 },
- /* bc */ { asrd, 0 },
- /* bd */ { asrd2, 0 },
- /* be */ { asld, 0 },
- /* bf */ { asld2, 0 },
-
- /* c0 */ { rold, 0 },
- /* c1 */ { rold2, 0 },
- /* c2 */ { clrd, 1 },
- /* c3 */ { clrw, 0 },
- /* c4 */ { negd, 0 },
- /* c5 */ { negw, 0 },
- /* c6 */ { incd, 0 },
- /* c7 */ { incw, 0 },
- /* c8 */ { decd, 0 },
- /* c9 */ { decw, 0 },
- /* ca */ { tstd, 0 },
- /* cb */ { tstw, 0 },
- /* cc */ { absa, 0 },
- /* cd */ { absb, 0 },
- /* ce */ { absd, 0 },
- /* cf */ { bset, 0 },
-
- /* d0 */ { bset2, 0 },
- /* d1 */ { illegal, 0 },
- /* d2 */ { illegal, 0 },
- /* d3 */ { illegal, 0 },
- /* d4 */ { illegal, 0 },
- /* d5 */ { illegal, 0 },
- /* d6 */ { illegal, 0 },
- /* d7 */ { illegal, 0 },
- /* d8 */ { illegal, 0 },
- /* d9 */ { illegal, 0 },
- /* da */ { illegal, 0 },
- /* db */ { illegal, 0 },
- /* dc */ { illegal, 0 },
- /* dd */ { illegal, 0 },
- /* de */ { illegal, 0 },
- /* df */ { illegal, 0 },
-
- /* e0 */ { illegal, 0 },
- /* e1 */ { illegal, 0 },
- /* e2 */ { illegal, 0 },
- /* e3 */ { illegal, 0 },
- /* e4 */ { illegal, 0 },
- /* e5 */ { illegal, 0 },
- /* e6 */ { illegal, 0 },
- /* e7 */ { illegal, 0 },
- /* e8 */ { illegal, 0 },
- /* e9 */ { illegal, 0 },
- /* ea */ { illegal, 0 },
- /* eb */ { illegal, 0 },
- /* ec */ { illegal, 0 },
- /* ed */ { illegal, 0 },
- /* ee */ { illegal, 0 },
- /* ef */ { illegal, 0 },
-
- /* f0 */ { illegal, 0 },
- /* f1 */ { illegal, 0 },
- /* f2 */ { illegal, 0 },
- /* f3 */ { illegal, 0 },
- /* f4 */ { illegal, 0 },
- /* f5 */ { illegal, 0 },
- /* f6 */ { illegal, 0 },
- /* f7 */ { illegal, 0 },
- /* f8 */ { illegal, 0 },
- /* f9 */ { illegal, 0 },
- /* fa */ { illegal, 0 },
- /* fb */ { illegal, 0 },
- /* fc */ { illegal, 0 },
- /* fd */ { illegal, 0 },
- /* fe */ { illegal, 0 },
- /* ff */ { illegal, 0 }
+ /* 00 */ { illegal, 0 },
+ /* 01 */ { illegal, 0 },
+ /* 02 */ { illegal, 0 },
+ /* 03 */ { illegal, 0 },
+ /* 04 */ { illegal, 0 },
+ /* 05 */ { illegal, 0 },
+ /* 06 */ { illegal, 0 },
+ /* 07 */ { illegal, 0 },
+ /* 08 */ { leax, 1 },
+ /* 09 */ { leay, 1 },
+ /* 0a */ { leau, 1 },
+ /* 0b */ { leas, 0 },
+ /* 0c */ { pushs, 1 },
+ /* 0d */ { pushu, 0 },
+ /* 0e */ { pulls, 1 },
+ /* 0f */ { pullu, 0 },
+
+ /* 10 */ { lda, 1 },
+ /* 11 */ { ldb, 1 },
+ /* 12 */ { lda2, 1 },
+ /* 13 */ { ldb2, 1 },
+ /* 14 */ { adda, 1 },
+ /* 15 */ { addb, 1 },
+ /* 16 */ { adda2, 1 },
+ /* 17 */ { addb2, 1 },
+ /* 18 */ { adca, 1 },
+ /* 19 */ { adcb, 1 },
+ /* 1a */ { adca2, 1 },
+ /* 1b */ { adcb2, 1 },
+ /* 1c */ { suba, 1 },
+ /* 1d */ { subb, 1 },
+ /* 1e */ { suba2, 1 },
+ /* 1f */ { subb2, 1 },
+
+ /* 20 */ { sbca, 0 },
+ /* 21 */ { sbcb, 0 },
+ /* 22 */ { sbca2, 0 },
+ /* 23 */ { sbcb2, 0 },
+ /* 24 */ { anda, 1 },
+ /* 25 */ { andb, 1 },
+ /* 26 */ { anda2, 1 },
+ /* 27 */ { andb2, 1 },
+ /* 28 */ { bita, 0 },
+ /* 29 */ { bitb, 0 },
+ /* 2a */ { bita2, 0 },
+ /* 2b */ { bitb2, 0 },
+ /* 2c */ { eora, 0 },
+ /* 2d */ { eorb, 0 },
+ /* 2e */ { eora2, 0 },
+ /* 2f */ { eorb2, 0 },
+
+ /* 30 */ { ora, 1 },
+ /* 31 */ { orb, 1 },
+ /* 32 */ { ora2, 1 },
+ /* 33 */ { orb2, 1 },
+ /* 34 */ { cmpa, 1 },
+ /* 35 */ { cmpb, 1 },
+ /* 36 */ { cmpa2, 1 },
+ /* 37 */ { cmpb2, 1 },
+ /* 38 */ { setlines, 0 },
+ /* 39 */ { setlines2, 0 },
+ /* 3a */ { sta2, 1 },
+ /* 3b */ { stb2, 1 },
+ /* 3c */ { andcc, 1 },
+ /* 3d */ { orcc, 0 },
+ /* 3e */ { exg, 0 },
+ /* 3f */ { tfr, 0 },
+
+ /* 40 */ { ldd, 1 },
+ /* 41 */ { ldd2, 1 },
+ /* 42 */ { ldx, 1 },
+ /* 43 */ { ldx2, 1 },
+ /* 44 */ { ldy, 1 },
+ /* 45 */ { ldy2, 1 },
+ /* 46 */ { ldu, 1 },
+ /* 47 */ { ldu2, 1 },
+ /* 48 */ { lds, 1 },
+ /* 49 */ { lds2, 1 },
+ /* 4a */ { cmpd, 1 },
+ /* 4b */ { cmpd2, 1 },
+ /* 4c */ { cmpx, 1 },
+ /* 4d */ { cmpx2, 1 },
+ /* 4e */ { cmpy, 1 },
+ /* 4f */ { cmpy2, 1 },
+
+ /* 50 */ { cmpu, 1 },
+ /* 51 */ { cmpu2, 1 },
+ /* 52 */ { cmps, 1 },
+ /* 53 */ { cmps2, 1 },
+ /* 54 */ { addd, 0 },
+ /* 55 */ { addd2, 0 },
+ /* 56 */ { subd, 1 },
+ /* 57 */ { subd2, 0 },
+ /* 58 */ { std2, 1 },
+ /* 59 */ { stx2, 1 },
+ /* 5a */ { sty2, 1 },
+ /* 5b */ { stu2, 1 },
+ /* 5c */ { sts2, 1 },
+ /* 5d */ { illegal, 0 },
+ /* 5e */ { illegal, 0 },
+ /* 5f */ { illegal, 0 },
+
+ /* 60 */ { bra, 1 },
+ /* 61 */ { bhi, 1 },
+ /* 62 */ { bcc, 1 },
+ /* 63 */ { bne, 1 },
+ /* 64 */ { bvc, 1 },
+ /* 65 */ { bpl, 1 },
+ /* 66 */ { bge, 1 },
+ /* 67 */ { bgt, 1 },
+ /* 68 */ { lbra, 1 },
+ /* 69 */ { lbhi, 1 },
+ /* 6a */ { lbcc, 1 },
+ /* 6b */ { lbne, 1 },
+ /* 6c */ { lbvc, 1 },
+ /* 6d */ { lbpl, 1 },
+ /* 6e */ { lbge, 1 },
+ /* 6f */ { lbgt, 1 },
+
+ /* 70 */ { brn, 1 },
+ /* 71 */ { bls, 1 },
+ /* 72 */ { bcs, 1 },
+ /* 73 */ { beq, 1 },
+ /* 74 */ { bvs, 1 },
+ /* 75 */ { bmi, 1 },
+ /* 76 */ { blt, 1 },
+ /* 77 */ { ble, 1 },
+ /* 78 */ { lbrn, 1 },
+ /* 79 */ { lbls, 1 },
+ /* 7a */ { lbcs, 1 },
+ /* 7b */ { lbeq, 1 },
+ /* 7c */ { lbvs, 1 },
+ /* 7d */ { lbmi, 1 },
+ /* 7e */ { lblt, 1 },
+ /* 7f */ { lble, 1 },
+
+ /* 80 */ { clra, 1 },
+ /* 81 */ { clrb, 1 },
+ /* 82 */ { clr2, 1 },
+ /* 83 */ { coma, 1 },
+ /* 84 */ { comb, 0 },
+ /* 85 */ { com2, 0 },
+ /* 86 */ { nega, 0 },
+ /* 87 */ { negb, 0 },
+ /* 88 */ { neg2, 0 },
+ /* 89 */ { inca, 1 },
+ /* 8a */ { incb, 1 },
+ /* 8b */ { inc2, 1 },
+ /* 8c */ { deca, 1 },
+ /* 8d */ { decb, 1 },
+ /* 8e */ { dec2, 1 },
+ /* 8f */ { rts, 1 },
+
+ /* 90 */ { tsta, 0 },
+ /* 91 */ { tstb, 0 },
+ /* 92 */ { tst2, 0 },
+ /* 93 */ { lsra, 1 },
+ /* 94 */ { lsrb, 1 },
+ /* 95 */ { lsr2, 0 },
+ /* 96 */ { rora, 0 },
+ /* 97 */ { rorb, 0 },
+ /* 98 */ { ror2, 0 },
+ /* 99 */ { asra, 0 },
+ /* 9a */ { asrb, 0 },
+ /* 9b */ { asr2, 0 },
+ /* 9c */ { asla, 1 },
+ /* 9d */ { aslb, 1 },
+ /* 9e */ { asl2, 0 },
+ /* 9f */ { rti, 1 },
+
+ /* a0 */ { rola, 1 },
+ /* a1 */ { rolb, 0 },
+ /* a2 */ { rol2, 0 },
+ /* a3 */ { lsrw, 0 },
+ /* a4 */ { rorw, 0 },
+ /* a5 */ { asrw, 0 },
+ /* a6 */ { aslw, 0 },
+ /* a7 */ { rolw, 0 },
+ /* a8 */ { jmp2, 1 },
+ /* a9 */ { jsr2, 1 },
+ /* aa */ { bsr, 1 },
+ /* ab */ { lbsr, 1 },
+ /* ac */ { decbjnz, 0 },
+ /* ad */ { decxjnz, 0 },
+ /* ae */ { nop, 0 },
+ /* af */ { illegal, 0 },
+
+ /* b0 */ { abx, 0 },
+ /* b1 */ { daa, 0 },
+ /* b2 */ { sex, 0 },
+ /* b3 */ { mul, 1 },
+ /* b4 */ { lmul, 0 },
+ /* b5 */ { divx, 0 },
+ /* b6 */ { bmove, 1 },
+ /* b7 */ { move, 0 },
+ /* b8 */ { lsrd, 0 },
+ /* b9 */ { lsrd2, 0 },
+ /* ba */ { rord, 0 },
+ /* bb */ { rord2, 0 },
+ /* bc */ { asrd, 0 },
+ /* bd */ { asrd2, 0 },
+ /* be */ { asld, 0 },
+ /* bf */ { asld2, 0 },
+
+ /* c0 */ { rold, 0 },
+ /* c1 */ { rold2, 0 },
+ /* c2 */ { clrd, 1 },
+ /* c3 */ { clrw, 0 },
+ /* c4 */ { negd, 0 },
+ /* c5 */ { negw, 0 },
+ /* c6 */ { incd, 0 },
+ /* c7 */ { incw, 0 },
+ /* c8 */ { decd, 0 },
+ /* c9 */ { decw, 0 },
+ /* ca */ { tstd, 0 },
+ /* cb */ { tstw, 0 },
+ /* cc */ { absa, 0 },
+ /* cd */ { absb, 0 },
+ /* ce */ { absd, 0 },
+ /* cf */ { bset, 0 },
+
+ /* d0 */ { bset2, 0 },
+ /* d1 */ { illegal, 0 },
+ /* d2 */ { illegal, 0 },
+ /* d3 */ { illegal, 0 },
+ /* d4 */ { illegal, 0 },
+ /* d5 */ { illegal, 0 },
+ /* d6 */ { illegal, 0 },
+ /* d7 */ { illegal, 0 },
+ /* d8 */ { illegal, 0 },
+ /* d9 */ { illegal, 0 },
+ /* da */ { illegal, 0 },
+ /* db */ { illegal, 0 },
+ /* dc */ { illegal, 0 },
+ /* dd */ { illegal, 0 },
+ /* de */ { illegal, 0 },
+ /* df */ { illegal, 0 },
+
+ /* e0 */ { illegal, 0 },
+ /* e1 */ { illegal, 0 },
+ /* e2 */ { illegal, 0 },
+ /* e3 */ { illegal, 0 },
+ /* e4 */ { illegal, 0 },
+ /* e5 */ { illegal, 0 },
+ /* e6 */ { illegal, 0 },
+ /* e7 */ { illegal, 0 },
+ /* e8 */ { illegal, 0 },
+ /* e9 */ { illegal, 0 },
+ /* ea */ { illegal, 0 },
+ /* eb */ { illegal, 0 },
+ /* ec */ { illegal, 0 },
+ /* ed */ { illegal, 0 },
+ /* ee */ { illegal, 0 },
+ /* ef */ { illegal, 0 },
+
+ /* f0 */ { illegal, 0 },
+ /* f1 */ { illegal, 0 },
+ /* f2 */ { illegal, 0 },
+ /* f3 */ { illegal, 0 },
+ /* f4 */ { illegal, 0 },
+ /* f5 */ { illegal, 0 },
+ /* f6 */ { illegal, 0 },
+ /* f7 */ { illegal, 0 },
+ /* f8 */ { illegal, 0 },
+ /* f9 */ { illegal, 0 },
+ /* fa */ { illegal, 0 },
+ /* fb */ { illegal, 0 },
+ /* fc */ { illegal, 0 },
+ /* fd */ { illegal, 0 },
+ /* fe */ { illegal, 0 },
+ /* ff */ { illegal, 0 }
};
CPU_DISASSEMBLE( konami )
diff --git a/src/emu/cpu/konami/konami.c b/src/emu/cpu/konami/konami.c
index 1a11ec36bb1..956006358c3 100644
--- a/src/emu/cpu/konami/konami.c
+++ b/src/emu/cpu/konami/konami.c
@@ -40,26 +40,26 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* Konami Registers */
struct konami_state
{
- PAIR pc; /* Program counter */
- PAIR ppc; /* Previous program counter */
- PAIR d; /* Accumulator a and b */
- PAIR dp; /* Direct Page register (page in MSB) */
- PAIR u, s; /* Stack pointers */
- PAIR x, y; /* Index registers */
- PAIR ea;
- UINT8 cc;
- UINT8 ireg;
- UINT8 irq_state[2];
+ PAIR pc; /* Program counter */
+ PAIR ppc; /* Previous program counter */
+ PAIR d; /* Accumulator a and b */
+ PAIR dp; /* Direct Page register (page in MSB) */
+ PAIR u, s; /* Stack pointers */
+ PAIR x, y; /* Index registers */
+ PAIR ea;
+ UINT8 cc;
+ UINT8 ireg;
+ UINT8 irq_state[2];
device_irq_acknowledge_callback irq_callback;
- UINT8 int_state; /* SYNC and CWAI flags */
- UINT8 nmi_state;
- UINT8 nmi_pending;
- int icount;
+ UINT8 int_state; /* SYNC and CWAI flags */
+ UINT8 nmi_state;
+ UINT8 nmi_pending;
+ int icount;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
@@ -84,50 +84,50 @@ INLINE konami_state *get_safe_token(device_t *device)
#define CC_E 0x80 /* entire state pushed */
/* Konami registers */
-#define pPPC cpustate->ppc
-#define pPC cpustate->pc
-#define pU cpustate->u
-#define pS cpustate->s
-#define pX cpustate->x
-#define pY cpustate->y
-#define pD cpustate->d
-
-#define PPC cpustate->ppc.w.l
-#define PC cpustate->pc.w.l
-#define PCD cpustate->pc.d
-#define U cpustate->u.w.l
-#define UD cpustate->u.d
-#define S cpustate->s.w.l
-#define SD cpustate->s.d
-#define X cpustate->x.w.l
-#define XD cpustate->x.d
-#define Y cpustate->y.w.l
-#define YD cpustate->y.d
-#define D cpustate->d.w.l
-#define A cpustate->d.b.h
-#define B cpustate->d.b.l
-#define DP cpustate->dp.b.h
-#define DPD cpustate->dp.d
-#define CC cpustate->cc
-
-#define EAB cpustate->ea.b.l
-#define EA cpustate->ea.w.l
-#define EAD cpustate->ea.d
-
-#define KONAMI_CWAI 8 /* set when CWAI is waiting for an interrupt */
-#define KONAMI_SYNC 16 /* set when SYNC is waiting for an interrupt */
-#define KONAMI_LDS 32 /* set when LDS occurred at least once */
-
-#define RM(cs,Addr) (cs)->program->read_byte(Addr)
-#define WM(cs,Addr,Value) (cs)->program->write_byte(Addr,Value)
-#define ROP(cs,Addr) (cs)->direct->read_decrypted_byte(Addr)
-#define ROP_ARG(cs,Addr) (cs)->direct->read_raw_byte(Addr)
-
-#define SIGNED(a) (UINT16)(INT16)(INT8)(a)
+#define pPPC cpustate->ppc
+#define pPC cpustate->pc
+#define pU cpustate->u
+#define pS cpustate->s
+#define pX cpustate->x
+#define pY cpustate->y
+#define pD cpustate->d
+
+#define PPC cpustate->ppc.w.l
+#define PC cpustate->pc.w.l
+#define PCD cpustate->pc.d
+#define U cpustate->u.w.l
+#define UD cpustate->u.d
+#define S cpustate->s.w.l
+#define SD cpustate->s.d
+#define X cpustate->x.w.l
+#define XD cpustate->x.d
+#define Y cpustate->y.w.l
+#define YD cpustate->y.d
+#define D cpustate->d.w.l
+#define A cpustate->d.b.h
+#define B cpustate->d.b.l
+#define DP cpustate->dp.b.h
+#define DPD cpustate->dp.d
+#define CC cpustate->cc
+
+#define EAB cpustate->ea.b.l
+#define EA cpustate->ea.w.l
+#define EAD cpustate->ea.d
+
+#define KONAMI_CWAI 8 /* set when CWAI is waiting for an interrupt */
+#define KONAMI_SYNC 16 /* set when SYNC is waiting for an interrupt */
+#define KONAMI_LDS 32 /* set when LDS occurred at least once */
+
+#define RM(cs,Addr) (cs)->program->read_byte(Addr)
+#define WM(cs,Addr,Value) (cs)->program->write_byte(Addr,Value)
+#define ROP(cs,Addr) (cs)->direct->read_decrypted_byte(Addr)
+#define ROP_ARG(cs,Addr) (cs)->direct->read_raw_byte(Addr)
+
+#define SIGNED(a) (UINT16)(INT16)(INT8)(a)
/* macros to access memory */
-#define IMMBYTE(cs,b) { b = ROP_ARG(cs,PCD); PC++; }
-#define IMMWORD(cs,w) { w.d = (ROP_ARG(cs,PCD)<<8) | ROP_ARG(cs,PCD+1); PC += 2; }
+#define IMMBYTE(cs,b) { b = ROP_ARG(cs,PCD); PC++; }
+#define IMMWORD(cs,w) { w.d = (ROP_ARG(cs,PCD)<<8) | ROP_ARG(cs,PCD+1); PC += 2; }
#define PUSHBYTE(cs,b) --S; WM(cs,SD,b)
#define PUSHWORD(cs,w) --S; WM(cs,SD,w.b.l); --S; WM(cs,SD,w.b.h)
@@ -139,28 +139,28 @@ INLINE konami_state *get_safe_token(device_t *device)
#define PULUBYTE(cs,b) b=RM(cs,UD); U++
#define PULUWORD(cs,w) w=RM(cs,UD)<<8; U++; w|=RM(cs,UD); U++
-#define CLR_HNZVC CC&=~(CC_H|CC_N|CC_Z|CC_V|CC_C)
-#define CLR_NZV CC&=~(CC_N|CC_Z|CC_V)
-#define CLR_NZ CC&=~(CC_N|CC_Z)
-#define CLR_HNZC CC&=~(CC_H|CC_N|CC_Z|CC_C)
-#define CLR_NZVC CC&=~(CC_N|CC_Z|CC_V|CC_C)
-#define CLR_Z CC&=~(CC_Z)
-#define CLR_NZC CC&=~(CC_N|CC_Z|CC_C)
-#define CLR_ZC CC&=~(CC_Z|CC_C)
+#define CLR_HNZVC CC&=~(CC_H|CC_N|CC_Z|CC_V|CC_C)
+#define CLR_NZV CC&=~(CC_N|CC_Z|CC_V)
+#define CLR_NZ CC&=~(CC_N|CC_Z)
+#define CLR_HNZC CC&=~(CC_H|CC_N|CC_Z|CC_C)
+#define CLR_NZVC CC&=~(CC_N|CC_Z|CC_V|CC_C)
+#define CLR_Z CC&=~(CC_Z)
+#define CLR_NZC CC&=~(CC_N|CC_Z|CC_C)
+#define CLR_ZC CC&=~(CC_Z|CC_C)
/* macros for CC -- CC bits affected should be reset before calling */
-#define SET_Z(a) if(!a)SEZ
-#define SET_Z8(a) SET_Z((UINT8)a)
-#define SET_Z16(a) SET_Z((UINT16)a)
-#define SET_N8(a) CC|=((a&0x80)>>4)
-#define SET_N16(a) CC|=((a&0x8000)>>12)
-#define SET_H(a,b,r) CC|=(((a^b^r)&0x10)<<1)
-#define SET_C8(a) CC|=((a&0x100)>>8)
-#define SET_C16(a) CC|=((a&0x10000)>>16)
-#define SET_V8(a,b,r) CC|=(((a^b^r^(r>>1))&0x80)>>6)
-#define SET_V16(a,b,r) CC|=(((a^b^r^(r>>1))&0x8000)>>14)
-
-static const UINT8 flags8i[256]= /* increment */
+#define SET_Z(a) if(!a)SEZ
+#define SET_Z8(a) SET_Z((UINT8)a)
+#define SET_Z16(a) SET_Z((UINT16)a)
+#define SET_N8(a) CC|=((a&0x80)>>4)
+#define SET_N16(a) CC|=((a&0x8000)>>12)
+#define SET_H(a,b,r) CC|=(((a^b^r)&0x10)<<1)
+#define SET_C8(a) CC|=((a&0x100)>>8)
+#define SET_C16(a) CC|=((a&0x10000)>>16)
+#define SET_V8(a,b,r) CC|=(((a^b^r^(r>>1))&0x80)>>6)
+#define SET_V16(a,b,r) CC|=(((a^b^r^(r>>1))&0x8000)>>14)
+
+static const UINT8 flags8i[256]= /* increment */
{
CC_Z,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -198,19 +198,19 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
};
-#define SET_FLAGS8I(a) {CC|=flags8i[(a)&0xff];}
-#define SET_FLAGS8D(a) {CC|=flags8d[(a)&0xff];}
+#define SET_FLAGS8I(a) {CC|=flags8i[(a)&0xff];}
+#define SET_FLAGS8D(a) {CC|=flags8d[(a)&0xff];}
/* combos */
-#define SET_NZ8(a) {SET_N8(a);SET_Z(a);}
-#define SET_NZ16(a) {SET_N16(a);SET_Z(a);}
-#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
-#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
+#define SET_NZ8(a) {SET_N8(a);SET_Z(a);}
+#define SET_NZ16(a) {SET_N16(a);SET_Z(a);}
+#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
+#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
/* macros for addressing modes (postbytes have their own code) */
-#define DIRECT(cs) EAD = DPD; IMMBYTE(cs,EAB)
-#define IMM8(cs) EAD = PCD; PC++
-#define IMM16(cs) EAD = PCD; PC+=2
+#define DIRECT(cs) EAD = DPD; IMMBYTE(cs,EAB)
+#define IMM8(cs) EAD = PCD; PC++
+#define IMM16(cs) EAD = PCD; PC+=2
#define EXTENDED(cs) IMMWORD(cs,(cs)->ea)
/* macros to set status flags */
@@ -235,47 +235,47 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
#define EXTWORD(cs,w) EXTENDED(cs); w.d=RM16(cs,EAD)
/* macros for branch instructions */
-#define BRANCH(cs,f) { \
- UINT8 t; \
- IMMBYTE(cs,t); \
- if( f ) \
- { \
- PC += SIGNED(t); \
- } \
+#define BRANCH(cs,f) { \
+ UINT8 t; \
+ IMMBYTE(cs,t); \
+ if( f ) \
+ { \
+ PC += SIGNED(t); \
+ } \
}
#define LBRANCH(cs,f) { \
- PAIR t; \
- IMMWORD(cs,t); \
- if( f ) \
- { \
- cpustate->icount -= 1; \
- PC += t.w.l; \
- } \
+ PAIR t; \
+ IMMWORD(cs,t); \
+ if( f ) \
+ { \
+ cpustate->icount -= 1; \
+ PC += t.w.l; \
+ } \
}
#define NXORV ((CC&CC_N)^((CC&CC_V)<<2))
/* macros for setting/getting registers in TFR/EXG instructions */
-#define GETREG(val,reg) \
- switch(reg) { \
- case 0: val = A; break; \
- case 1: val = B; break; \
- case 2: val = X; break; \
- case 3: val = Y; break; \
- case 4: val = S; break; /* ? */ \
- case 5: val = U; break; \
+#define GETREG(val,reg) \
+ switch(reg) { \
+ case 0: val = A; break; \
+ case 1: val = B; break; \
+ case 2: val = X; break; \
+ case 3: val = Y; break; \
+ case 4: val = S; break; /* ? */ \
+ case 5: val = U; break; \
default: val = 0xff; logerror("Unknown TFR/EXG idx at PC:%04x\n", PC ); break; \
}
-#define SETREG(val,reg) \
- switch(reg) { \
- case 0: A = val; break; \
- case 1: B = val; break; \
- case 2: X = val; break; \
- case 3: Y = val; break; \
- case 4: S = val; break; /* ? */ \
- case 5: U = val; break; \
+#define SETREG(val,reg) \
+ switch(reg) { \
+ case 0: A = val; break; \
+ case 1: B = val; break; \
+ case 2: X = val; break; \
+ case 3: Y = val; break; \
+ case 4: S = val; break; /* ? */ \
+ case 5: U = val; break; \
default: logerror("Unknown TFR/EXG idx at PC:%04x\n", PC ); break; \
}
@@ -283,22 +283,22 @@ CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
static const UINT8 cycles1[] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
- /*0*/ 1, 1, 1, 1, 1, 1, 1, 1, 4, 4, 4, 4, 5, 5, 5, 5,
- /*1*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- /*2*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- /*3*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 7, 6,
- /*4*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 3, 3, 4, 4,
- /*5*/ 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1,
- /*6*/ 3, 3, 3, 3, 3, 3, 3, 3, 5, 5, 5, 5, 5, 5, 5, 5,
- /*7*/ 3, 3, 3, 3, 3, 3, 3, 3, 5, 5, 5, 5, 5, 5, 5, 5,
- /*8*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 5,
- /*9*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 6,
- /*A*/ 2, 2, 2, 4, 4, 4, 4, 4, 2, 2, 2, 2, 3, 3, 2, 1,
- /*B*/ 3, 2, 2,11,22,11, 2, 4, 3, 3, 3, 3, 3, 3, 3, 3,
- /*C*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 3, 2,
- /*D*/ 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- /*E*/ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- /*F*/ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
+ /*0*/ 1, 1, 1, 1, 1, 1, 1, 1, 4, 4, 4, 4, 5, 5, 5, 5,
+ /*1*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ /*2*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ /*3*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 7, 6,
+ /*4*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 3, 3, 4, 4,
+ /*5*/ 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1,
+ /*6*/ 3, 3, 3, 3, 3, 3, 3, 3, 5, 5, 5, 5, 5, 5, 5, 5,
+ /*7*/ 3, 3, 3, 3, 3, 3, 3, 3, 5, 5, 5, 5, 5, 5, 5, 5,
+ /*8*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 5,
+ /*9*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 6,
+ /*A*/ 2, 2, 2, 4, 4, 4, 4, 4, 2, 2, 2, 2, 3, 3, 2, 1,
+ /*B*/ 3, 2, 2,11,22,11, 2, 4, 3, 3, 3, 3, 3, 3, 3, 3,
+ /*C*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 3, 2,
+ /*D*/ 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ /*E*/ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ /*F*/ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
};
INLINE UINT32 RM16( konami_state *cpustate, UINT32 Addr )
@@ -325,10 +325,10 @@ static void check_irq_lines(konami_state *cpustate)
{
cpustate->int_state &= ~KONAMI_CWAI;
cpustate->icount -= 7;
- }
+ }
else
{
- CC |= CC_E; /* save entire state */
+ CC |= CC_E; /* save entire state */
PUSHWORD(cpustate, pPC);
PUSHWORD(cpustate, pU);
PUSHWORD(cpustate, pY);
@@ -339,7 +339,7 @@ static void check_irq_lines(konami_state *cpustate)
PUSHBYTE(cpustate, CC);
cpustate->icount -= 19;
}
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD = RM16(cpustate, 0xfffc);
(void)(*cpustate->irq_callback)(cpustate->device, INPUT_LINE_NMI);
}
@@ -352,15 +352,15 @@ static void check_irq_lines(konami_state *cpustate)
{
cpustate->int_state &= ~KONAMI_CWAI; /* clear CWAI */
cpustate->icount -= 7;
- }
+ }
else
{
- CC &= ~CC_E; /* save 'short' state */
+ CC &= ~CC_E; /* save 'short' state */
PUSHWORD(cpustate, pPC);
PUSHBYTE(cpustate, CC);
cpustate->icount -= 10;
}
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD = RM16(cpustate, 0xfff6);
(void)(*cpustate->irq_callback)(cpustate->device, KONAMI_FIRQ_LINE);
}
@@ -376,7 +376,7 @@ static void check_irq_lines(konami_state *cpustate)
}
else
{
- CC |= CC_E; /* save entire state */
+ CC |= CC_E; /* save entire state */
PUSHWORD(cpustate, pPC);
PUSHWORD(cpustate, pU);
PUSHWORD(cpustate, pY);
@@ -387,7 +387,7 @@ static void check_irq_lines(konami_state *cpustate)
PUSHBYTE(cpustate, CC);
cpustate->icount -= 19;
}
- CC |= CC_II; /* inhibit IRQ */
+ CC |= CC_II; /* inhibit IRQ */
PCD = RM16(cpustate, 0xfff8);
(void)(*cpustate->irq_callback)(cpustate->device, KONAMI_IRQ_LINE);
}
@@ -431,10 +431,10 @@ static CPU_RESET( konami )
cpustate->irq_state[0] = CLEAR_LINE;
cpustate->irq_state[1] = CLEAR_LINE;
- DPD = 0; /* Reset direct page register */
+ DPD = 0; /* Reset direct page register */
- CC |= CC_II; /* IRQ disabled */
- CC |= CC_IF; /* FIRQ disabled */
+ CC |= CC_II; /* IRQ disabled */
+ CC |= CC_IF; /* FIRQ disabled */
PCD = RM16(cpustate, 0xfffe);
}
@@ -492,12 +492,12 @@ static CPU_EXECUTE( konami )
cpustate->ireg = ireg = ROP(cpustate, PCD);
PC++;
- (*konami_main[ireg])(cpustate);
+ (*konami_main[ireg])(cpustate);
- cpustate->icount -= cycles1[ireg];
+ cpustate->icount -= cycles1[ireg];
- } while( cpustate->icount > 0 );
- }
+ } while( cpustate->icount > 0 );
+ }
}
@@ -518,21 +518,21 @@ static CPU_SET_INFO( konami )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + KONAMI_IRQ_LINE: set_irq_line(cpustate, KONAMI_IRQ_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + KONAMI_IRQ_LINE: set_irq_line(cpustate, KONAMI_IRQ_LINE, info->i); break;
case CPUINFO_INT_INPUT_STATE + KONAMI_FIRQ_LINE:set_irq_line(cpustate, KONAMI_FIRQ_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + KONAMI_PC: PC = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_PC: PC = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + KONAMI_S: S = info->i; break;
- case CPUINFO_INT_REGISTER + KONAMI_CC: CC = info->i; break;
- case CPUINFO_INT_REGISTER + KONAMI_U: U = info->i; break;
- case CPUINFO_INT_REGISTER + KONAMI_A: A = info->i; break;
- case CPUINFO_INT_REGISTER + KONAMI_B: B = info->i; break;
- case CPUINFO_INT_REGISTER + KONAMI_X: X = info->i; break;
- case CPUINFO_INT_REGISTER + KONAMI_Y: Y = info->i; break;
- case CPUINFO_INT_REGISTER + KONAMI_DP: DP = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_S: S = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_CC: CC = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_U: U = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_A: A = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_B: B = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_X: X = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_Y: Y = info->i; break;
+ case CPUINFO_INT_REGISTER + KONAMI_DP: DP = info->i; break;
}
}
@@ -548,83 +548,83 @@ CPU_GET_INFO( konami )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(konami_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 13; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + KONAMI_IRQ_LINE: info->i = cpustate->irq_state[KONAMI_IRQ_LINE]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(konami_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 13; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + KONAMI_IRQ_LINE: info->i = cpustate->irq_state[KONAMI_IRQ_LINE]; break;
case CPUINFO_INT_INPUT_STATE + KONAMI_FIRQ_LINE:info->i = cpustate->irq_state[KONAMI_FIRQ_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + KONAMI_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + KONAMI_PC: info->i = PC; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + KONAMI_S: info->i = S; break;
- case CPUINFO_INT_REGISTER + KONAMI_CC: info->i = CC; break;
- case CPUINFO_INT_REGISTER + KONAMI_U: info->i = U; break;
- case CPUINFO_INT_REGISTER + KONAMI_A: info->i = A; break;
- case CPUINFO_INT_REGISTER + KONAMI_B: info->i = B; break;
- case CPUINFO_INT_REGISTER + KONAMI_X: info->i = X; break;
- case CPUINFO_INT_REGISTER + KONAMI_Y: info->i = Y; break;
- case CPUINFO_INT_REGISTER + KONAMI_DP: info->i = DP; break;
+ case CPUINFO_INT_REGISTER + KONAMI_S: info->i = S; break;
+ case CPUINFO_INT_REGISTER + KONAMI_CC: info->i = CC; break;
+ case CPUINFO_INT_REGISTER + KONAMI_U: info->i = U; break;
+ case CPUINFO_INT_REGISTER + KONAMI_A: info->i = A; break;
+ case CPUINFO_INT_REGISTER + KONAMI_B: info->i = B; break;
+ case CPUINFO_INT_REGISTER + KONAMI_X: info->i = X; break;
+ case CPUINFO_INT_REGISTER + KONAMI_Y: info->i = Y; break;
+ case CPUINFO_INT_REGISTER + KONAMI_DP: info->i = DP; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(konami); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(konami); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(konami); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(konami); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(konami); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(konami);break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(konami); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(konami); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(konami); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(konami); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(konami); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(konami);break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "KONAMI"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "KONAMI 5000x"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "KONAMI"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "KONAMI 5000x"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
cpustate->cc & 0x80 ? 'E':'.',
cpustate->cc & 0x40 ? 'F':'.',
- cpustate->cc & 0x20 ? 'H':'.',
- cpustate->cc & 0x10 ? 'I':'.',
- cpustate->cc & 0x08 ? 'N':'.',
- cpustate->cc & 0x04 ? 'Z':'.',
- cpustate->cc & 0x02 ? 'V':'.',
- cpustate->cc & 0x01 ? 'C':'.');
- break;
-
- case CPUINFO_STR_REGISTER + KONAMI_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
- case CPUINFO_STR_REGISTER + KONAMI_S: sprintf(info->s, "S:%04X", cpustate->s.w.l); break;
- case CPUINFO_STR_REGISTER + KONAMI_CC: sprintf(info->s, "CC:%02X", cpustate->cc); break;
- case CPUINFO_STR_REGISTER + KONAMI_U: sprintf(info->s, "U:%04X", cpustate->u.w.l); break;
- case CPUINFO_STR_REGISTER + KONAMI_A: sprintf(info->s, "A:%02X", cpustate->d.b.h); break;
- case CPUINFO_STR_REGISTER + KONAMI_B: sprintf(info->s, "B:%02X", cpustate->d.b.l); break;
- case CPUINFO_STR_REGISTER + KONAMI_X: sprintf(info->s, "X:%04X", cpustate->x.w.l); break;
- case CPUINFO_STR_REGISTER + KONAMI_Y: sprintf(info->s, "Y:%04X", cpustate->y.w.l); break;
- case CPUINFO_STR_REGISTER + KONAMI_DP: sprintf(info->s, "DP:%02X", cpustate->dp.b.h); break;
+ cpustate->cc & 0x20 ? 'H':'.',
+ cpustate->cc & 0x10 ? 'I':'.',
+ cpustate->cc & 0x08 ? 'N':'.',
+ cpustate->cc & 0x04 ? 'Z':'.',
+ cpustate->cc & 0x02 ? 'V':'.',
+ cpustate->cc & 0x01 ? 'C':'.');
+ break;
+
+ case CPUINFO_STR_REGISTER + KONAMI_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
+ case CPUINFO_STR_REGISTER + KONAMI_S: sprintf(info->s, "S:%04X", cpustate->s.w.l); break;
+ case CPUINFO_STR_REGISTER + KONAMI_CC: sprintf(info->s, "CC:%02X", cpustate->cc); break;
+ case CPUINFO_STR_REGISTER + KONAMI_U: sprintf(info->s, "U:%04X", cpustate->u.w.l); break;
+ case CPUINFO_STR_REGISTER + KONAMI_A: sprintf(info->s, "A:%02X", cpustate->d.b.h); break;
+ case CPUINFO_STR_REGISTER + KONAMI_B: sprintf(info->s, "B:%02X", cpustate->d.b.l); break;
+ case CPUINFO_STR_REGISTER + KONAMI_X: sprintf(info->s, "X:%04X", cpustate->x.w.l); break;
+ case CPUINFO_STR_REGISTER + KONAMI_Y: sprintf(info->s, "Y:%04X", cpustate->y.w.l); break;
+ case CPUINFO_STR_REGISTER + KONAMI_DP: sprintf(info->s, "DP:%02X", cpustate->dp.b.h); break;
}
}
diff --git a/src/emu/cpu/konami/konami.h b/src/emu/cpu/konami/konami.h
index cb49648d4da..7cc5f58dd7e 100644
--- a/src/emu/cpu/konami/konami.h
+++ b/src/emu/cpu/konami/konami.h
@@ -16,7 +16,7 @@ enum
#define KONAMI_SETLINES_CALLBACK(name) void name(device_t *device, int lines)
-#define KONAMI_IRQ_LINE 0 /* IRQ line number */
+#define KONAMI_IRQ_LINE 0 /* IRQ line number */
#define KONAMI_FIRQ_LINE 1 /* FIRQ line number */
/* PUBLIC FUNCTIONS */
diff --git a/src/emu/cpu/konami/konamops.c b/src/emu/cpu/konami/konamops.c
index 1049e18e28e..59e99cdc429 100644
--- a/src/emu/cpu/konami/konamops.c
+++ b/src/emu/cpu/konami/konamops.c
@@ -145,7 +145,7 @@ INLINE void tst_di( konami_state *cpustate )
/* $0E JMP direct ----- */
INLINE void jmp_di( konami_state *cpustate )
{
- DIRECT(cpustate);
+ DIRECT(cpustate);
PCD=EAD;
}
@@ -177,7 +177,7 @@ INLINE void sync( konami_state *cpustate )
cpustate->int_state |= KONAMI_SYNC;
check_irq_lines(cpustate);
/* if KONAMI_SYNC has not been cleared by check_irq_lines,
- * stop execution until the interrupt lines change. */
+ * stop execution until the interrupt lines change. */
if( (cpustate->int_state & KONAMI_SYNC) && cpustate->icount > 0 )
cpustate->icount = 0;
}
@@ -225,7 +225,7 @@ INLINE void daa( konami_state *cpustate )
UINT16 t;
t = A;
if (CC & CC_H) t+=0x06;
- if ((t&0x0f)>9) t+=0x06; /* ASG -- this code is broken! $66+$99=$FF -> DAA should = $65, we get $05! */
+ if ((t&0x0f)>9) t+=0x06; /* ASG -- this code is broken! $66+$99=$FF -> DAA should = $65, we get $05! */
if (CC & CC_C) t+=0x60;
if ((t&0xf0)>0x90) t+=0x60;
if (t&0x100) SEC;
@@ -300,7 +300,7 @@ INLINE void bra( konami_state *cpustate )
}
/* $21 BRN relative ----- */
-static UINT8 konami_brn_t; // hack around GCC 4.6 error because we need the side effects of IMMBYTE
+static UINT8 konami_brn_t; // hack around GCC 4.6 error because we need the side effects of IMMBYTE
INLINE void brn( konami_state *cpustate )
{
IMMBYTE(cpustate, konami_brn_t);
@@ -595,7 +595,7 @@ INLINE void rti( konami_state *cpustate )
PULLBYTE(cpustate, CC);
if( CC & CC_E ) /* entire state saved? */
{
- cpustate->icount -= 9;
+ cpustate->icount -= 9;
PULLBYTE(cpustate, A);
PULLBYTE(cpustate, B);
PULLBYTE(cpustate, DP);
@@ -614,11 +614,11 @@ INLINE void cwai( konami_state *cpustate )
IMMBYTE(cpustate, t);
CC &= t;
/*
- * CWAI stacks the entire machine state on the hardware stack,
- * then waits for an interrupt; when the interrupt is taken
- * later, the state is *not* saved again after CWAI.
- */
- CC |= CC_E; /* HJB 990225: save entire state */
+ * CWAI stacks the entire machine state on the hardware stack,
+ * then waits for an interrupt; when the interrupt is taken
+ * later, the state is *not* saved again after CWAI.
+ */
+ CC |= CC_E; /* HJB 990225: save entire state */
PUSHWORD(cpustate, pPC);
PUSHWORD(cpustate, pU);
PUSHWORD(cpustate, pY);
@@ -647,7 +647,7 @@ INLINE void mul( konami_state *cpustate )
/* $3F SWI (SWI2 SWI3) absolute indirect ----- */
INLINE void swi( konami_state *cpustate )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(cpustate, pPC);
PUSHWORD(cpustate, pU);
PUSHWORD(cpustate, pY);
@@ -656,14 +656,14 @@ INLINE void swi( konami_state *cpustate )
PUSHBYTE(cpustate, B);
PUSHBYTE(cpustate, A);
PUSHBYTE(cpustate, CC);
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD=RM16(cpustate, 0xfffa);
}
/* $103F SWI2 absolute indirect ----- */
INLINE void swi2( konami_state *cpustate )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(cpustate, pPC);
PUSHWORD(cpustate, pU);
PUSHWORD(cpustate, pY);
@@ -671,14 +671,14 @@ INLINE void swi2( konami_state *cpustate )
PUSHBYTE(cpustate, DP);
PUSHBYTE(cpustate, B);
PUSHBYTE(cpustate, A);
- PUSHBYTE(cpustate, CC);
+ PUSHBYTE(cpustate, CC);
PCD=RM16(cpustate, 0xfff4);
}
/* $113F SWI3 absolute indirect ----- */
INLINE void swi3( konami_state *cpustate )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(cpustate, pPC);
PUSHWORD(cpustate, pU);
PUSHWORD(cpustate, pY);
@@ -686,7 +686,7 @@ INLINE void swi3( konami_state *cpustate )
PUSHBYTE(cpustate, DP);
PUSHBYTE(cpustate, B);
PUSHBYTE(cpustate, A);
- PUSHBYTE(cpustate, CC);
+ PUSHBYTE(cpustate, CC);
PCD=RM16(cpustate, 0xfff2);
}
@@ -1165,7 +1165,7 @@ INLINE void suba_im( konami_state *cpustate )
/* $81 CMPA immediate ?**** */
INLINE void cmpa_im( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(cpustate, t);
r = A - t;
CLR_NZVC;
@@ -1175,7 +1175,7 @@ INLINE void cmpa_im( konami_state *cpustate )
/* $82 SBCA immediate ?**** */
INLINE void sbca_im( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(cpustate, t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -1386,7 +1386,7 @@ INLINE void sty_im( konami_state *cpustate )
/* $90 SUBA direct ?**** */
INLINE void suba_di( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(cpustate, t);
r = A - t;
CLR_NZVC;
@@ -1397,7 +1397,7 @@ INLINE void suba_di( konami_state *cpustate )
/* $91 CMPA direct ?**** */
INLINE void cmpa_di( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(cpustate, t);
r = A - t;
CLR_NZVC;
@@ -1407,7 +1407,7 @@ INLINE void cmpa_di( konami_state *cpustate )
/* $92 SBCA direct ?**** */
INLINE void sbca_di( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(cpustate, t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -1635,7 +1635,7 @@ INLINE void cmpa_ix( konami_state *cpustate )
/* $a2 SBCA indexed ?**** */
INLINE void sbca_ix( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
t = RM(cpustate, EAD);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -1830,7 +1830,7 @@ INLINE void sty_ix( konami_state *cpustate )
/* $b0 SUBA extended ?**** */
INLINE void suba_ex( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(cpustate, t);
r = A - t;
CLR_NZVC;
@@ -1841,7 +1841,7 @@ INLINE void suba_ex( konami_state *cpustate )
/* $b1 CMPA extended ?**** */
INLINE void cmpa_ex( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(cpustate, t);
r = A - t;
CLR_NZVC;
@@ -1851,7 +1851,7 @@ INLINE void cmpa_ex( konami_state *cpustate )
/* $b2 SBCA extended ?**** */
INLINE void sbca_ex( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(cpustate, t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -2057,7 +2057,7 @@ INLINE void sty_ex( konami_state *cpustate )
/* $c0 SUBB immediate ?**** */
INLINE void subb_im( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(cpustate, t);
r = B - t;
CLR_NZVC;
@@ -2068,7 +2068,7 @@ INLINE void subb_im( konami_state *cpustate )
/* $c1 CMPB immediate ?**** */
INLINE void cmpb_im( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(cpustate, t);
r = B - t;
CLR_NZVC; SET_FLAGS8(B,t,r);
@@ -2077,7 +2077,7 @@ INLINE void cmpb_im( konami_state *cpustate )
/* $c2 SBCB immediate ?**** */
INLINE void sbcb_im( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(cpustate, t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -2194,7 +2194,7 @@ INLINE void std_im( konami_state *cpustate )
{
CLR_NZV;
SET_NZ16(D);
- IMM16(cpustate);
+ IMM16(cpustate);
WM16(cpustate, EAD,&pD);
}
@@ -2221,7 +2221,7 @@ INLINE void stu_im( konami_state *cpustate )
{
CLR_NZV;
SET_NZ16(U);
- IMM16(cpustate);
+ IMM16(cpustate);
WM16(cpustate, EAD,&pU);
}
@@ -2231,14 +2231,14 @@ INLINE void sts_im( konami_state *cpustate )
{
CLR_NZV;
SET_NZ16(S);
- IMM16(cpustate);
+ IMM16(cpustate);
WM16(cpustate, EAD,&pS);
}
/* $d0 SUBB direct ?**** */
INLINE void subb_di( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(cpustate, t);
r = B - t;
CLR_NZVC;
@@ -2249,7 +2249,7 @@ INLINE void subb_di( konami_state *cpustate )
/* $d1 CMPB direct ?**** */
INLINE void cmpb_di( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(cpustate, t);
r = B - t;
CLR_NZVC;
@@ -2259,7 +2259,7 @@ INLINE void cmpb_di( konami_state *cpustate )
/* $d2 SBCB direct ?**** */
INLINE void sbcb_di( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(cpustate, t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -2374,7 +2374,7 @@ INLINE void std_di( konami_state *cpustate )
{
CLR_NZV;
SET_NZ16(D);
- DIRECT(cpustate);
+ DIRECT(cpustate);
WM16(cpustate, EAD,&pD);
}
@@ -2416,7 +2416,7 @@ INLINE void sts_di( konami_state *cpustate )
/* $e0 SUBB indexed ?**** */
INLINE void subb_ix( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
t = RM(cpustate, EAD);
r = B - t;
CLR_NZVC;
@@ -2427,7 +2427,7 @@ INLINE void subb_ix( konami_state *cpustate )
/* $e1 CMPB indexed ?**** */
INLINE void cmpb_ix( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
t = RM(cpustate, EAD);
r = B - t;
CLR_NZVC;
@@ -2437,7 +2437,7 @@ INLINE void cmpb_ix( konami_state *cpustate )
/* $e2 SBCB indexed ?**** */
INLINE void sbcb_ix( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
t = RM(cpustate, EAD);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -2582,7 +2582,7 @@ INLINE void sts_ix( konami_state *cpustate )
/* $f0 SUBB extended ?**** */
INLINE void subb_ex( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(cpustate, t);
r = B - t;
CLR_NZVC;
@@ -2593,7 +2593,7 @@ INLINE void subb_ex( konami_state *cpustate )
/* $f1 CMPB extended ?**** */
INLINE void cmpb_ex( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(cpustate, t);
r = B - t;
CLR_NZVC;
@@ -2603,7 +2603,7 @@ INLINE void cmpb_ex( konami_state *cpustate )
/* $f2 SBCB extended ?**** */
INLINE void sbcb_ex( konami_state *cpustate )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(cpustate, t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -2718,7 +2718,7 @@ INLINE void std_ex( konami_state *cpustate )
{
CLR_NZV;
SET_NZ16(D);
- EXTENDED(cpustate);
+ EXTENDED(cpustate);
WM16(cpustate, EAD,&pD);
}
@@ -2795,7 +2795,7 @@ INLINE void setline_ex( konami_state *cpustate )
INLINE void bmove( konami_state *cpustate )
{
- UINT8 t;
+ UINT8 t;
while( U != 0 ) {
t = RM(cpustate, Y);
@@ -2809,7 +2809,7 @@ INLINE void bmove( konami_state *cpustate )
INLINE void move( konami_state *cpustate )
{
- UINT8 t;
+ UINT8 t;
t = RM(cpustate, Y);
WM(cpustate, X,t);
@@ -2906,8 +2906,8 @@ INLINE void asrd( konami_state *cpustate )
/* ASLD immediate ?**** */
INLINE void asld( konami_state *cpustate )
{
- UINT32 r;
- UINT8 t;
+ UINT32 r;
+ UINT8 t;
IMMBYTE(cpustate, t );
@@ -2951,13 +2951,13 @@ INLINE void decxjnz( konami_state *cpustate )
{
--X;
CLR_NZV;
- SET_NZ16(X); /* should affect V as well? */
+ SET_NZ16(X); /* should affect V as well? */
BRANCH(cpustate, !(CC&CC_Z) );
}
INLINE void bset( konami_state *cpustate )
{
- UINT8 t;
+ UINT8 t;
while( U != 0 ) {
t = A;
@@ -3442,8 +3442,8 @@ INLINE void asrd_di( konami_state *cpustate )
/* ASLD direct ?**** */
INLINE void asld_di( konami_state *cpustate )
{
- UINT32 r;
- UINT8 t;
+ UINT32 r;
+ UINT8 t;
DIRBYTE(cpustate, t );
@@ -3524,8 +3524,8 @@ INLINE void asrd_ix( konami_state *cpustate )
/* ASLD indexed ?**** */
INLINE void asld_ix( konami_state *cpustate )
{
- UINT32 r;
- UINT8 t;
+ UINT32 r;
+ UINT8 t;
t=RM(cpustate, EA);
@@ -3606,8 +3606,8 @@ INLINE void asrd_ex( konami_state *cpustate )
/* ASLD extended ?**** */
INLINE void asld_ex( konami_state *cpustate )
{
- UINT32 r;
- UINT8 t;
+ UINT32 r;
+ UINT8 t;
EXTBYTE(cpustate, t);
@@ -3653,7 +3653,7 @@ INLINE void opcode2( konami_state *cpustate )
case 0x07:
EAD=0;
(*konami_extended[cpustate->ireg])(cpustate);
- cpustate->icount -= 2;
+ cpustate->icount -= 2;
return;
// case 0x08: EA=0; break; /* indirect - auto increment */
// case 0x09: EA=0; break; /* indirect - double auto increment */
@@ -3662,10 +3662,10 @@ INLINE void opcode2( konami_state *cpustate )
// case 0x0c: EA=0; break; /* indirect - postbyte offs */
// case 0x0d: EA=0; break; /* indirect - postword offs */
// case 0x0e: EA=0; break; /* indirect - normal */
- case 0x0f: /* indirect - extended */
+ case 0x0f: /* indirect - extended */
IMMWORD(cpustate, cpustate->ea);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
// case 0x10: EA=0; break; /* auto increment */
// case 0x11: EA=0; break; /* double auto increment */
@@ -3685,158 +3685,158 @@ INLINE void opcode2( konami_state *cpustate )
// case 0x1f: EA=0; break; /* indirect - extended */
/* base X */
- case 0x20: /* auto increment */
+ case 0x20: /* auto increment */
EA=X;
X++;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x21: /* double auto increment */
+ case 0x21: /* double auto increment */
EA=X;
X+=2;
- cpustate->icount-=3;
- break;
- case 0x22: /* auto decrement */
+ cpustate->icount-=3;
+ break;
+ case 0x22: /* auto decrement */
X--;
EA=X;
- cpustate->icount-=2;
- break;
- case 0x23: /* double auto decrement */
+ cpustate->icount-=2;
+ break;
+ case 0x23: /* double auto decrement */
X-=2;
EA=X;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x24: /* postbyte offs */
+ case 0x24: /* postbyte offs */
IMMBYTE(cpustate, EA);
EA=X+SIGNED(EA);
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x25: /* postword offs */
+ case 0x25: /* postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=X;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x26: /* normal */
+ case 0x26: /* normal */
EA=X;
break;
// case 0x27: EA=0; break; /* extended */
- case 0x28: /* indirect - auto increment */
+ case 0x28: /* indirect - auto increment */
EA=X;
X++;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x29: /* indirect - double auto increment */
+ case 0x29: /* indirect - double auto increment */
EA=X;
X+=2;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x2a: /* indirect - auto decrement */
+ case 0x2a: /* indirect - auto decrement */
X--;
EA=X;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x2b: /* indirect - double auto decrement */
+ case 0x2b: /* indirect - double auto decrement */
X-=2;
EA=X;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x2c: /* indirect - postbyte offs */
+ case 0x2c: /* indirect - postbyte offs */
IMMBYTE(cpustate, EA);
EA=X+SIGNED(EA);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x2d: /* indirect - postword offs */
+ case 0x2d: /* indirect - postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=X;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
- case 0x2e: /* indirect - normal */
+ case 0x2e: /* indirect - normal */
EA=X;
EA=RM16(cpustate, EAD);
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
// case 0x2f: EA=0; break; /* indirect - extended */
/* base Y */
- case 0x30: /* auto increment */
+ case 0x30: /* auto increment */
EA=Y;
Y++;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x31: /* double auto increment */
+ case 0x31: /* double auto increment */
EA=Y;
Y+=2;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x32: /* auto decrement */
+ case 0x32: /* auto decrement */
Y--;
EA=Y;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x33: /* double auto decrement */
+ case 0x33: /* double auto decrement */
Y-=2;
EA=Y;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x34: /* postbyte offs */
+ case 0x34: /* postbyte offs */
IMMBYTE(cpustate, EA);
EA=Y+SIGNED(EA);
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x35: /* postword offs */
+ case 0x35: /* postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=Y;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x36: /* normal */
+ case 0x36: /* normal */
EA=Y;
break;
// case 0x37: EA=0; break; /* extended */
- case 0x38: /* indirect - auto increment */
+ case 0x38: /* indirect - auto increment */
EA=Y;
Y++;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x39: /* indirect - double auto increment */
+ case 0x39: /* indirect - double auto increment */
EA=Y;
Y+=2;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x3a: /* indirect - auto decrement */
+ case 0x3a: /* indirect - auto decrement */
Y--;
EA=Y;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x3b: /* indirect - double auto decrement */
+ case 0x3b: /* indirect - double auto decrement */
Y-=2;
EA=Y;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x3c: /* indirect - postbyte offs */
+ case 0x3c: /* indirect - postbyte offs */
IMMBYTE(cpustate, EA);
EA=Y+SIGNED(EA);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x3d: /* indirect - postword offs */
+ case 0x3d: /* indirect - postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=Y;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
- case 0x3e: /* indirect - normal */
+ case 0x3e: /* indirect - normal */
EA=Y;
EA=RM16(cpustate, EAD);
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
// case 0x3f: EA=0; break; /* indirect - extended */
@@ -3858,236 +3858,236 @@ INLINE void opcode2( konami_state *cpustate )
// case 0x4f: EA=0; break; /* indirect - extended */
/* base U */
- case 0x50: /* auto increment */
+ case 0x50: /* auto increment */
EA=U;
U++;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x51: /* double auto increment */
+ case 0x51: /* double auto increment */
EA=U;
U+=2;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x52: /* auto decrement */
+ case 0x52: /* auto decrement */
U--;
EA=U;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x53: /* double auto decrement */
+ case 0x53: /* double auto decrement */
U-=2;
EA=U;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x54: /* postbyte offs */
+ case 0x54: /* postbyte offs */
IMMBYTE(cpustate, EA);
EA=U+SIGNED(EA);
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x55: /* postword offs */
+ case 0x55: /* postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=U;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x56: /* normal */
+ case 0x56: /* normal */
EA=U;
break;
// case 0x57: EA=0; break; /* extended */
- case 0x58: /* indirect - auto increment */
+ case 0x58: /* indirect - auto increment */
EA=U;
U++;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x59: /* indirect - double auto increment */
+ case 0x59: /* indirect - double auto increment */
EA=U;
U+=2;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x5a: /* indirect - auto decrement */
+ case 0x5a: /* indirect - auto decrement */
U--;
EA=U;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x5b: /* indirect - double auto decrement */
+ case 0x5b: /* indirect - double auto decrement */
U-=2;
EA=U;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x5c: /* indirect - postbyte offs */
+ case 0x5c: /* indirect - postbyte offs */
IMMBYTE(cpustate, EA);
EA=U+SIGNED(EA);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x5d: /* indirect - postword offs */
+ case 0x5d: /* indirect - postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=U;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
- case 0x5e: /* indirect - normal */
+ case 0x5e: /* indirect - normal */
EA=U;
EA=RM16(cpustate, EAD);
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
// case 0x5f: EA=0; break; /* indirect - extended */
/* base S */
- case 0x60: /* auto increment */
+ case 0x60: /* auto increment */
EAD=SD;
S++;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x61: /* double auto increment */
+ case 0x61: /* double auto increment */
EAD=SD;
S+=2;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x62: /* auto decrement */
+ case 0x62: /* auto decrement */
S--;
EAD=SD;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x63: /* double auto decrement */
+ case 0x63: /* double auto decrement */
S-=2;
EAD=SD;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x64: /* postbyte offs */
+ case 0x64: /* postbyte offs */
IMMBYTE(cpustate, EA);
EA=S+SIGNED(EA);
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x65: /* postword offs */
+ case 0x65: /* postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=S;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x66: /* normal */
+ case 0x66: /* normal */
EAD=SD;
break;
// case 0x67: EA=0; break; /* extended */
- case 0x68: /* indirect - auto increment */
+ case 0x68: /* indirect - auto increment */
EAD=SD;
S++;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x69: /* indirect - double auto increment */
+ case 0x69: /* indirect - double auto increment */
EAD=SD;
S+=2;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x6a: /* indirect - auto decrement */
+ case 0x6a: /* indirect - auto decrement */
S--;
EAD=SD;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x6b: /* indirect - double auto decrement */
+ case 0x6b: /* indirect - double auto decrement */
S-=2;
EAD=SD;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x6c: /* indirect - postbyte offs */
+ case 0x6c: /* indirect - postbyte offs */
IMMBYTE(cpustate, EA);
EA=S+SIGNED(EA);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x6d: /* indirect - postword offs */
+ case 0x6d: /* indirect - postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=S;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
- case 0x6e: /* indirect - normal */
+ case 0x6e: /* indirect - normal */
EAD=SD;
EA=RM16(cpustate, EAD);
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
// case 0x6f: EA=0; break; /* indirect - extended */
/* base PC */
- case 0x70: /* auto increment */
+ case 0x70: /* auto increment */
EAD=PCD;
PC++;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x71: /* double auto increment */
+ case 0x71: /* double auto increment */
EAD=PCD;
PC+=2;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x72: /* auto decrement */
+ case 0x72: /* auto decrement */
PC--;
EAD=PCD;
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x73: /* double auto decrement */
+ case 0x73: /* double auto decrement */
PC-=2;
EAD=PCD;
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
- case 0x74: /* postbyte offs */
+ case 0x74: /* postbyte offs */
IMMBYTE(cpustate, EA);
EA=PC-1+SIGNED(EA);
- cpustate->icount-=2;
+ cpustate->icount-=2;
break;
- case 0x75: /* postword offs */
+ case 0x75: /* postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=PC-2;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x76: /* normal */
+ case 0x76: /* normal */
EAD=PCD;
break;
// case 0x77: EA=0; break; /* extended */
- case 0x78: /* indirect - auto increment */
+ case 0x78: /* indirect - auto increment */
EAD=PCD;
PC++;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x79: /* indirect - double auto increment */
+ case 0x79: /* indirect - double auto increment */
EAD=PCD;
PC+=2;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x7a: /* indirect - auto decrement */
+ case 0x7a: /* indirect - auto decrement */
PC--;
EAD=PCD;
EA=RM16(cpustate, EAD);
- cpustate->icount-=5;
+ cpustate->icount-=5;
break;
- case 0x7b: /* indirect - double auto decrement */
+ case 0x7b: /* indirect - double auto decrement */
PC-=2;
EAD=PCD;
EA=RM16(cpustate, EAD);
- cpustate->icount-=6;
+ cpustate->icount-=6;
break;
- case 0x7c: /* indirect - postbyte offs */
+ case 0x7c: /* indirect - postbyte offs */
IMMBYTE(cpustate, EA);
EA=PC-1+SIGNED(EA);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0x7d: /* indirect - postword offs */
+ case 0x7d: /* indirect - postword offs */
IMMWORD(cpustate, cpustate->ea);
EA+=PC-2;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
- case 0x7e: /* indirect - normal */
+ case 0x7e: /* indirect - normal */
EAD=PCD;
EA=RM16(cpustate, EAD);
- cpustate->icount-=3;
+ cpustate->icount-=3;
break;
// case 0x7f: EA=0; break; /* indirect - extended */
@@ -4123,79 +4123,79 @@ INLINE void opcode2( konami_state *cpustate )
// case 0x9d: EA=0; break; /* indirect - ???? */
// case 0x9e: EA=0; break; /* indirect - register d */
// case 0x9f: EA=0; break; /* indirect - ???? */
- case 0xa0: /* register a */
+ case 0xa0: /* register a */
EA=X+SIGNED(A);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
- case 0xa1: /* register b */
+ case 0xa1: /* register b */
EA=X+SIGNED(B);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
// case 0xa2: EA=0; break; /* ???? */
// case 0xa3: EA=0; break; /* ???? */
// case 0xa4: EA=0; break; /* ???? */
// case 0xa5: EA=0; break; /* ???? */
// case 0xa6: EA=0; break; /* ???? */
- case 0xa7: /* register d */
+ case 0xa7: /* register d */
EA=X+D;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xa8: /* indirect - register a */
+ case 0xa8: /* indirect - register a */
EA=X+SIGNED(A);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xa9: /* indirect - register b */
+ case 0xa9: /* indirect - register b */
EA=X+SIGNED(B);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
// case 0xaa: EA=0; break; /* indirect - ???? */
// case 0xab: EA=0; break; /* indirect - ???? */
// case 0xac: EA=0; break; /* indirect - ???? */
// case 0xad: EA=0; break; /* indirect - ???? */
// case 0xae: EA=0; break; /* indirect - ???? */
- case 0xaf: /* indirect - register d */
+ case 0xaf: /* indirect - register d */
EA=X+D;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
- case 0xb0: /* register a */
+ case 0xb0: /* register a */
EA=Y+SIGNED(A);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
- case 0xb1: /* register b */
+ case 0xb1: /* register b */
EA=Y+SIGNED(B);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
// case 0xb2: EA=0; break; /* ???? */
// case 0xb3: EA=0; break; /* ???? */
// case 0xb4: EA=0; break; /* ???? */
// case 0xb5: EA=0; break; /* ???? */
// case 0xb6: EA=0; break; /* ???? */
- case 0xb7: /* register d */
+ case 0xb7: /* register d */
EA=Y+D;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xb8: /* indirect - register a */
+ case 0xb8: /* indirect - register a */
EA=Y+SIGNED(A);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xb9: /* indirect - register b */
+ case 0xb9: /* indirect - register b */
EA=Y+SIGNED(B);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
// case 0xba: EA=0; break; /* indirect - ???? */
// case 0xbb: EA=0; break; /* indirect - ???? */
// case 0xbc: EA=0; break; /* indirect - ???? */
// case 0xbd: EA=0; break; /* indirect - ???? */
// case 0xbe: EA=0; break; /* indirect - ???? */
- case 0xbf: /* indirect - register d */
+ case 0xbf: /* indirect - register d */
EA=Y+D;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
// case 0xc0: EA=0; break; /* register a */
// case 0xc1: EA=0; break; /* register b */
@@ -4204,7 +4204,7 @@ INLINE void opcode2( konami_state *cpustate )
case 0xc4:
EAD=0;
(*konami_direct[cpustate->ireg])(cpustate);
- cpustate->icount -= 1;
+ cpustate->icount -= 1;
return;
// case 0xc5: EA=0; break; /* ???? */
// case 0xc6: EA=0; break; /* ???? */
@@ -4213,127 +4213,127 @@ INLINE void opcode2( konami_state *cpustate )
// case 0xc9: EA=0; break; /* indirect - register b */
// case 0xca: EA=0; break; /* indirect - ???? */
// case 0xcb: EA=0; break; /* indirect - ???? */
- case 0xcc: /* indirect - direct */
+ case 0xcc: /* indirect - direct */
DIRWORD(cpustate, cpustate->ea);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
// case 0xcd: EA=0; break; /* indirect - ???? */
// case 0xce: EA=0; break; /* indirect - register d */
// case 0xcf: EA=0; break; /* indirect - ???? */
- case 0xd0: /* register a */
+ case 0xd0: /* register a */
EA=U+SIGNED(A);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
- case 0xd1: /* register b */
+ case 0xd1: /* register b */
EA=U+SIGNED(B);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
// case 0xd2: EA=0; break; /* ???? */
// case 0xd3: EA=0; break; /* ???? */
// case 0xd4: EA=0; break; /* ???? */
// case 0xd5: EA=0; break; /* ???? */
// case 0xd6: EA=0; break; /* ???? */
- case 0xd7: /* register d */
+ case 0xd7: /* register d */
EA=U+D;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xd8: /* indirect - register a */
+ case 0xd8: /* indirect - register a */
EA=U+SIGNED(A);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xd9: /* indirect - register b */
+ case 0xd9: /* indirect - register b */
EA=U+SIGNED(B);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
// case 0xda: EA=0; break; /* indirect - ???? */
// case 0xdb: EA=0; break; /* indirect - ???? */
// case 0xdc: EA=0; break; /* indirect - ???? */
// case 0xdd: EA=0; break; /* indirect - ???? */
// case 0xde: EA=0; break; /* indirect - ???? */
- case 0xdf: /* indirect - register d */
+ case 0xdf: /* indirect - register d */
EA=U+D;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
- break;
- case 0xe0: /* register a */
+ cpustate->icount-=7;
+ break;
+ case 0xe0: /* register a */
EA=S+SIGNED(A);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
- case 0xe1: /* register b */
+ case 0xe1: /* register b */
EA=S+SIGNED(B);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
// case 0xe2: EA=0; break; /* ???? */
// case 0xe3: EA=0; break; /* ???? */
// case 0xe4: EA=0; break; /* ???? */
// case 0xe5: EA=0; break; /* ???? */
// case 0xe6: EA=0; break; /* ???? */
- case 0xe7: /* register d */
+ case 0xe7: /* register d */
EA=S+D;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xe8: /* indirect - register a */
+ case 0xe8: /* indirect - register a */
EA=S+SIGNED(A);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xe9: /* indirect - register b */
+ case 0xe9: /* indirect - register b */
EA=S+SIGNED(B);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
// case 0xea: EA=0; break; /* indirect - ???? */
// case 0xeb: EA=0; break; /* indirect - ???? */
// case 0xec: EA=0; break; /* indirect - ???? */
// case 0xed: EA=0; break; /* indirect - ???? */
// case 0xee: EA=0; break; /* indirect - ???? */
- case 0xef: /* indirect - register d */
+ case 0xef: /* indirect - register d */
EA=S+D;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
- case 0xf0: /* register a */
+ case 0xf0: /* register a */
EA=PC+SIGNED(A);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
- case 0xf1: /* register b */
+ case 0xf1: /* register b */
EA=PC+SIGNED(B);
- cpustate->icount-=1;
+ cpustate->icount-=1;
break;
// case 0xf2: EA=0; break; /* ???? */
// case 0xf3: EA=0; break; /* ???? */
// case 0xf4: EA=0; break; /* ???? */
// case 0xf5: EA=0; break; /* ???? */
// case 0xf6: EA=0; break; /* ???? */
- case 0xf7: /* register d */
+ case 0xf7: /* register d */
EA=PC+D;
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xf8: /* indirect - register a */
+ case 0xf8: /* indirect - register a */
EA=PC+SIGNED(A);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
- case 0xf9: /* indirect - register b */
+ case 0xf9: /* indirect - register b */
EA=PC+SIGNED(B);
EA=RM16(cpustate, EAD);
- cpustate->icount-=4;
+ cpustate->icount-=4;
break;
// case 0xfa: EA=0; break; /* indirect - ???? */
// case 0xfb: EA=0; break; /* indirect - ???? */
// case 0xfc: EA=0; break; /* indirect - ???? */
// case 0xfd: EA=0; break; /* indirect - ???? */
// case 0xfe: EA=0; break; /* indirect - ???? */
- case 0xff: /* indirect - register d */
+ case 0xff: /* indirect - register d */
EA=PC+D;
EA=RM16(cpustate, EAD);
- cpustate->icount-=7;
+ cpustate->icount-=7;
break;
default:
logerror("KONAMI: Unknown/Invalid postbyte at PC = %04x\n", PC -1 );
- EAD = 0;
+ EAD = 0;
}
(*konami_indexed[cpustate->ireg])(cpustate);
}
diff --git a/src/emu/cpu/konami/konamtbl.c b/src/emu/cpu/konami/konamtbl.c
index 4f2d0388263..52655c52dd8 100644
--- a/src/emu/cpu/konami/konamtbl.c
+++ b/src/emu/cpu/konami/konamtbl.c
@@ -351,141 +351,141 @@ INLINE void absd(konami_state *cpustate);
INLINE void opcode2(konami_state *cpustate);
static void (*const konami_main[0x100])(konami_state *cpustate) = {
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
opcode2,opcode2,opcode2,opcode2,pshs ,pshu ,puls ,pulu ,
- lda_im ,ldb_im ,opcode2,opcode2,adda_im,addb_im,opcode2,opcode2, /* 10 */
+ lda_im ,ldb_im ,opcode2,opcode2,adda_im,addb_im,opcode2,opcode2, /* 10 */
adca_im,adcb_im,opcode2,opcode2,suba_im,subb_im,opcode2,opcode2,
- sbca_im,sbcb_im,opcode2,opcode2,anda_im,andb_im,opcode2,opcode2, /* 20 */
+ sbca_im,sbcb_im,opcode2,opcode2,anda_im,andb_im,opcode2,opcode2, /* 20 */
bita_im,bitb_im,opcode2,opcode2,eora_im,eorb_im,opcode2,opcode2,
- ora_im ,orb_im ,opcode2,opcode2,cmpa_im,cmpb_im,opcode2,opcode2, /* 30 */
+ ora_im ,orb_im ,opcode2,opcode2,cmpa_im,cmpb_im,opcode2,opcode2, /* 30 */
setline_im,opcode2,opcode2,opcode2,andcc,orcc ,exg ,tfr ,
- ldd_im ,opcode2,ldx_im ,opcode2,ldy_im ,opcode2,ldu_im ,opcode2, /* 40 */
+ ldd_im ,opcode2,ldx_im ,opcode2,ldy_im ,opcode2,ldu_im ,opcode2, /* 40 */
lds_im ,opcode2,cmpd_im,opcode2,cmpx_im,opcode2,cmpy_im,opcode2,
- cmpu_im,opcode2,cmps_im,opcode2,addd_im,opcode2,subd_im,opcode2, /* 50 */
+ cmpu_im,opcode2,cmps_im,opcode2,addd_im,opcode2,subd_im,opcode2, /* 50 */
opcode2,opcode2,opcode2,opcode2,opcode2,illegal,illegal,illegal,
- bra ,bhi ,bcc ,bne ,bvc ,bpl ,bge ,bgt , /* 60 */
+ bra ,bhi ,bcc ,bne ,bvc ,bpl ,bge ,bgt , /* 60 */
lbra ,lbhi ,lbcc ,lbne ,lbvc ,lbpl ,lbge ,lbgt ,
- brn ,bls ,bcs ,beq ,bvs ,bmi ,blt ,ble , /* 70 */
+ brn ,bls ,bcs ,beq ,bvs ,bmi ,blt ,ble , /* 70 */
lbrn ,lbls ,lbcs ,lbeq ,lbvs ,lbmi ,lblt ,lble ,
- clra ,clrb ,opcode2,coma ,comb ,opcode2,nega ,negb , /* 80 */
+ clra ,clrb ,opcode2,coma ,comb ,opcode2,nega ,negb , /* 80 */
opcode2,inca ,incb ,opcode2,deca ,decb ,opcode2,rts ,
- tsta ,tstb ,opcode2,lsra ,lsrb ,opcode2,rora ,rorb , /* 90 */
+ tsta ,tstb ,opcode2,lsra ,lsrb ,opcode2,rora ,rorb , /* 90 */
opcode2,asra ,asrb ,opcode2,asla ,aslb ,opcode2,rti ,
- rola ,rolb ,opcode2,opcode2,opcode2,opcode2,opcode2,opcode2, /* a0 */
+ rola ,rolb ,opcode2,opcode2,opcode2,opcode2,opcode2,opcode2, /* a0 */
opcode2,opcode2,bsr ,lbsr ,decbjnz,decxjnz,nop ,illegal,
- abx ,daa ,sex ,mul ,lmul ,divx ,bmove ,move , /* b0 */
+ abx ,daa ,sex ,mul ,lmul ,divx ,bmove ,move , /* b0 */
lsrd ,opcode2,rord ,opcode2,asrd ,opcode2,asld ,opcode2,
- rold ,opcode2,clrd ,opcode2,negd ,opcode2,incd ,opcode2, /* c0 */
+ rold ,opcode2,clrd ,opcode2,negd ,opcode2,incd ,opcode2, /* c0 */
decd ,opcode2,tstd ,opcode2,absa ,absb ,absd ,bset ,
- bset2 ,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
+ bset2 ,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal
};
static void (*const konami_indexed[0x100])(konami_state *cpustate) = {
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
leax ,leay ,leau ,leas ,illegal,illegal,illegal,illegal,
- illegal,illegal,lda_ix ,ldb_ix ,illegal,illegal,adda_ix,addb_ix, /* 10 */
+ illegal,illegal,lda_ix ,ldb_ix ,illegal,illegal,adda_ix,addb_ix, /* 10 */
illegal,illegal,adca_ix,adcb_ix,illegal,illegal,suba_ix,subb_ix,
- illegal,illegal,sbca_ix,sbcb_ix,illegal,illegal,anda_ix,andb_ix, /* 20 */
+ illegal,illegal,sbca_ix,sbcb_ix,illegal,illegal,anda_ix,andb_ix, /* 20 */
illegal,illegal,bita_ix,bitb_ix,illegal,illegal,eora_ix,eorb_ix,
- illegal,illegal,ora_ix ,orb_ix ,illegal,illegal,cmpa_ix,cmpb_ix, /* 30 */
+ illegal,illegal,ora_ix ,orb_ix ,illegal,illegal,cmpa_ix,cmpb_ix, /* 30 */
illegal,setline_ix,sta_ix,stb_ix,illegal,illegal,illegal,illegal,
- illegal,ldd_ix ,illegal,ldx_ix ,illegal,ldy_ix ,illegal,ldu_ix , /* 40 */
+ illegal,ldd_ix ,illegal,ldx_ix ,illegal,ldy_ix ,illegal,ldu_ix , /* 40 */
illegal,lds_ix ,illegal,cmpd_ix,illegal,cmpx_ix,illegal,cmpy_ix,
- illegal,cmpu_ix,illegal,cmps_ix,illegal,addd_ix,illegal,subd_ix, /* 50 */
+ illegal,cmpu_ix,illegal,cmps_ix,illegal,addd_ix,illegal,subd_ix, /* 50 */
std_ix ,stx_ix ,sty_ix ,stu_ix ,sts_ix ,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 60 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 60 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 70 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 70 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,clr_ix ,illegal,illegal,com_ix ,illegal,illegal, /* 80 */
+ illegal,illegal,clr_ix ,illegal,illegal,com_ix ,illegal,illegal, /* 80 */
neg_ix ,illegal,illegal,inc_ix ,illegal,illegal,dec_ix ,illegal,
- illegal,illegal,tst_ix ,illegal,illegal,lsr_ix ,illegal,illegal, /* 90 */
+ illegal,illegal,tst_ix ,illegal,illegal,lsr_ix ,illegal,illegal, /* 90 */
ror_ix ,illegal,illegal,asr_ix ,illegal,illegal,asl_ix ,illegal,
- illegal,illegal,rol_ix ,lsrw_ix,rorw_ix,asrw_ix,aslw_ix,rolw_ix, /* a0 */
+ illegal,illegal,rol_ix ,lsrw_ix,rorw_ix,asrw_ix,aslw_ix,rolw_ix, /* a0 */
jmp_ix ,jsr_ix ,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* b0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* b0 */
illegal,lsrd_ix,illegal,rord_ix,illegal,asrd_ix,illegal,asld_ix,
- illegal,rold_ix,illegal,clrw_ix,illegal,negw_ix,illegal,incw_ix, /* c0 */
+ illegal,rold_ix,illegal,clrw_ix,illegal,negw_ix,illegal,incw_ix, /* c0 */
illegal,decw_ix,illegal,tstw_ix,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal
};
static void (*const konami_direct[0x100])(konami_state *cpustate) = {
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,lda_di ,ldb_di ,illegal,illegal,adda_di,addb_di, /* 10 */
+ illegal,illegal,lda_di ,ldb_di ,illegal,illegal,adda_di,addb_di, /* 10 */
illegal,illegal,adca_di,adcb_di,illegal,illegal,suba_di,subb_di,
- illegal,illegal,sbca_di,sbcb_di,illegal,illegal,anda_di,andb_di, /* 20 */
+ illegal,illegal,sbca_di,sbcb_di,illegal,illegal,anda_di,andb_di, /* 20 */
illegal,illegal,bita_di,bitb_di,illegal,illegal,eora_di,eorb_di,
- illegal,illegal,ora_di ,orb_di ,illegal,illegal,cmpa_di,cmpb_di, /* 30 */
+ illegal,illegal,ora_di ,orb_di ,illegal,illegal,cmpa_di,cmpb_di, /* 30 */
illegal,setline_di,sta_di,stb_di,illegal,illegal,illegal,illegal,
- illegal,ldd_di ,illegal,ldx_di ,illegal,ldy_di ,illegal,ldu_di , /* 40 */
+ illegal,ldd_di ,illegal,ldx_di ,illegal,ldy_di ,illegal,ldu_di , /* 40 */
illegal,lds_di ,illegal,cmpd_di,illegal,cmpx_di,illegal,cmpy_di,
- illegal,cmpu_di,illegal,cmps_di,illegal,addd_di,illegal,subd_di, /* 50 */
+ illegal,cmpu_di,illegal,cmps_di,illegal,addd_di,illegal,subd_di, /* 50 */
std_di ,stx_di ,sty_di ,stu_di ,sts_di ,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 60 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 60 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 70 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 70 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,clr_di ,illegal,illegal,com_di ,illegal,illegal, /* 80 */
+ illegal,illegal,clr_di ,illegal,illegal,com_di ,illegal,illegal, /* 80 */
neg_di ,illegal,illegal,inc_di ,illegal,illegal,dec_di ,illegal,
- illegal,illegal,tst_di ,illegal,illegal,lsr_di ,illegal,illegal, /* 90 */
+ illegal,illegal,tst_di ,illegal,illegal,lsr_di ,illegal,illegal, /* 90 */
ror_di ,illegal,illegal,asr_di ,illegal,illegal,asl_di ,illegal,
- illegal,illegal,rol_di ,lsrw_di,rorw_di,asrw_di,aslw_di,rolw_di, /* a0 */
+ illegal,illegal,rol_di ,lsrw_di,rorw_di,asrw_di,aslw_di,rolw_di, /* a0 */
jmp_di ,jsr_di ,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* b0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* b0 */
illegal,lsrd_di,illegal,rord_di,illegal,asrd_di,illegal,asld_di,
- illegal,rold_di,illegal,clrw_di,illegal,negw_di,illegal,incw_di, /* c0 */
+ illegal,rold_di,illegal,clrw_di,illegal,negw_di,illegal,incw_di, /* c0 */
illegal,decw_di,illegal,tstw_di,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal
};
static void (*const konami_extended[0x100])(konami_state *cpustate) = {
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 00 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,lda_ex ,ldb_ex ,illegal,illegal,adda_ex,addb_ex, /* 10 */
+ illegal,illegal,lda_ex ,ldb_ex ,illegal,illegal,adda_ex,addb_ex, /* 10 */
illegal,illegal,adca_ex,adcb_ex,illegal,illegal,suba_ex,subb_ex,
- illegal,illegal,sbca_ex,sbcb_ex,illegal,illegal,anda_ex,andb_ex, /* 20 */
+ illegal,illegal,sbca_ex,sbcb_ex,illegal,illegal,anda_ex,andb_ex, /* 20 */
illegal,illegal,bita_ex,bitb_ex,illegal,illegal,eora_ex,eorb_ex,
- illegal,illegal,ora_ex ,orb_ex ,illegal,illegal,cmpa_ex,cmpb_ex, /* 30 */
+ illegal,illegal,ora_ex ,orb_ex ,illegal,illegal,cmpa_ex,cmpb_ex, /* 30 */
illegal,setline_ex,sta_ex,stb_ex,illegal,illegal,illegal,illegal,
- illegal,ldd_ex ,illegal,ldx_ex ,illegal,ldy_ex ,illegal,ldu_ex , /* 40 */
+ illegal,ldd_ex ,illegal,ldx_ex ,illegal,ldy_ex ,illegal,ldu_ex , /* 40 */
illegal,lds_ex ,illegal,cmpd_ex,illegal,cmpx_ex,illegal,cmpy_ex,
- illegal,cmpu_ex,illegal,cmps_ex,illegal,addd_ex,illegal,subd_ex, /* 50 */
+ illegal,cmpu_ex,illegal,cmps_ex,illegal,addd_ex,illegal,subd_ex, /* 50 */
std_ex ,stx_ex ,sty_ex ,stu_ex ,sts_ex ,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 60 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 60 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 70 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* 70 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,clr_ex ,illegal,illegal,com_ex ,illegal,illegal, /* 80 */
+ illegal,illegal,clr_ex ,illegal,illegal,com_ex ,illegal,illegal, /* 80 */
neg_ex ,illegal,illegal,inc_ex ,illegal,illegal,dec_ex ,illegal,
- illegal,illegal,tst_ex ,illegal,illegal,lsr_ex ,illegal,illegal, /* 90 */
+ illegal,illegal,tst_ex ,illegal,illegal,lsr_ex ,illegal,illegal, /* 90 */
ror_ex ,illegal,illegal,asr_ex ,illegal,illegal,asl_ex ,illegal,
- illegal,illegal,rol_ex ,lsrw_ex,rorw_ex,asrw_ex,aslw_ex,rolw_ex, /* a0 */
+ illegal,illegal,rol_ex ,lsrw_ex,rorw_ex,asrw_ex,aslw_ex,rolw_ex, /* a0 */
jmp_ex ,jsr_ex ,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* b0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* b0 */
illegal,lsrd_ex,illegal,rord_ex,illegal,asrd_ex,illegal,asld_ex,
- illegal,rold_ex,illegal,clrw_ex,illegal,negw_ex,illegal,incw_ex, /* c0 */
+ illegal,rold_ex,illegal,clrw_ex,illegal,negw_ex,illegal,incw_ex, /* c0 */
illegal,decw_ex,illegal,tstw_ex,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* d0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* e0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal,
- illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
+ illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal, /* f0 */
illegal,illegal,illegal,illegal,illegal,illegal,illegal,illegal
};
diff --git a/src/emu/cpu/lc8670/lc8670.c b/src/emu/cpu/lc8670/lc8670.c
index 55f6f706c21..be6ab9db5c1 100644
--- a/src/emu/cpu/lc8670/lc8670.c
+++ b/src/emu/cpu/lc8670/lc8670.c
@@ -21,8 +21,8 @@
// DEBUGGING
//***************************************************************************
-#define LOG_TIMERS 0
-#define LOG_IRQ 0
+#define LOG_TIMERS 0
+#define LOG_IRQ 0
//**************************************************************************
@@ -37,80 +37,80 @@ const device_type LC8670 = &device_creator<lc8670_cpu_device>;
//**************************************************************************
// registers
-#define REG_A m_sfr[0x00]
-#define REG_PSW m_sfr[0x01]
-#define REG_B m_sfr[0x02]
-#define REG_C m_sfr[0x03]
-#define REG_TRL m_sfr[0x04]
-#define REG_TRH m_sfr[0x05]
-#define REG_SP m_sfr[0x06]
-#define REG_PCON m_sfr[0x07]
-#define REG_IE m_sfr[0x08]
-#define REG_IP m_sfr[0x09]
-#define REG_EXT m_sfr[0x0d]
-#define REG_OCR m_sfr[0x0e]
-#define REG_T0CNT m_sfr[0x10]
-#define REG_T0PRR m_sfr[0x11]
-#define REG_T0LR m_sfr[0x13]
-#define REG_T0HR m_sfr[0x15]
-#define REG_T1CNT m_sfr[0x18]
-#define REG_T1LC m_sfr[0x1a]
-#define REG_T1LR m_sfr[0x1b]
-#define REG_T1HC m_sfr[0x1c]
-#define REG_T1HR m_sfr[0x1d]
-#define REG_MCR m_sfr[0x20]
-#define REG_STAD m_sfr[0x22]
-#define REG_CNR m_sfr[0x23]
-#define REG_TDR m_sfr[0x24]
-#define REG_XBNK m_sfr[0x25]
-#define REG_VCCR m_sfr[0x27]
-#define REG_SCON0 m_sfr[0x30]
-#define REG_SBUF0 m_sfr[0x31]
-#define REG_SBR m_sfr[0x32]
-#define REG_SCON1 m_sfr[0x34]
-#define REG_SBUF1 m_sfr[0x35]
-#define REG_P1 m_sfr[0x44]
-#define REG_P1DDR m_sfr[0x45]
-#define REG_P1FCR m_sfr[0x46]
-#define REG_P3 m_sfr[0x4c]
-#define REG_P3DDR m_sfr[0x4d]
-#define REG_P3INT m_sfr[0x4e]
-#define REG_FPR m_sfr[0x54]
-#define REG_I01CR m_sfr[0x5d]
-#define REG_I23CR m_sfr[0x5e]
-#define REG_ISL m_sfr[0x5f]
-#define REG_VSEL m_sfr[0x63]
-#define REG_VRMAD1 m_sfr[0x64]
-#define REG_VRMAD2 m_sfr[0x65]
-#define REG_BTCR m_sfr[0x7f]
+#define REG_A m_sfr[0x00]
+#define REG_PSW m_sfr[0x01]
+#define REG_B m_sfr[0x02]
+#define REG_C m_sfr[0x03]
+#define REG_TRL m_sfr[0x04]
+#define REG_TRH m_sfr[0x05]
+#define REG_SP m_sfr[0x06]
+#define REG_PCON m_sfr[0x07]
+#define REG_IE m_sfr[0x08]
+#define REG_IP m_sfr[0x09]
+#define REG_EXT m_sfr[0x0d]
+#define REG_OCR m_sfr[0x0e]
+#define REG_T0CNT m_sfr[0x10]
+#define REG_T0PRR m_sfr[0x11]
+#define REG_T0LR m_sfr[0x13]
+#define REG_T0HR m_sfr[0x15]
+#define REG_T1CNT m_sfr[0x18]
+#define REG_T1LC m_sfr[0x1a]
+#define REG_T1LR m_sfr[0x1b]
+#define REG_T1HC m_sfr[0x1c]
+#define REG_T1HR m_sfr[0x1d]
+#define REG_MCR m_sfr[0x20]
+#define REG_STAD m_sfr[0x22]
+#define REG_CNR m_sfr[0x23]
+#define REG_TDR m_sfr[0x24]
+#define REG_XBNK m_sfr[0x25]
+#define REG_VCCR m_sfr[0x27]
+#define REG_SCON0 m_sfr[0x30]
+#define REG_SBUF0 m_sfr[0x31]
+#define REG_SBR m_sfr[0x32]
+#define REG_SCON1 m_sfr[0x34]
+#define REG_SBUF1 m_sfr[0x35]
+#define REG_P1 m_sfr[0x44]
+#define REG_P1DDR m_sfr[0x45]
+#define REG_P1FCR m_sfr[0x46]
+#define REG_P3 m_sfr[0x4c]
+#define REG_P3DDR m_sfr[0x4d]
+#define REG_P3INT m_sfr[0x4e]
+#define REG_FPR m_sfr[0x54]
+#define REG_I01CR m_sfr[0x5d]
+#define REG_I23CR m_sfr[0x5e]
+#define REG_ISL m_sfr[0x5f]
+#define REG_VSEL m_sfr[0x63]
+#define REG_VRMAD1 m_sfr[0x64]
+#define REG_VRMAD2 m_sfr[0x65]
+#define REG_BTCR m_sfr[0x7f]
// addressing modes
-#define GET_D9 (((m_op & 0x01)<<8) | fetch())
-#define GET_D9B3 (((m_op & 0x10)<<4) | fetch())
-#define GET_I8 fetch()
-#define GET_R8 fetch()
-#define GET_RI (m_op & 0x03)
-#define GET_B3 (m_op & 0x07)
-#define GET_A12 (((m_op & 0x10)<<7) | ((m_op & 0x07)<<8) | fetch())
-#define SIGNED(v) ((v) - (BIT(v,7) ? 0x100 : 0))
+#define GET_D9 (((m_op & 0x01)<<8) | fetch())
+#define GET_D9B3 (((m_op & 0x10)<<4) | fetch())
+#define GET_I8 fetch()
+#define GET_R8 fetch()
+#define GET_RI (m_op & 0x03)
+#define GET_B3 (m_op & 0x07)
+#define GET_A12 (((m_op & 0x10)<<7) | ((m_op & 0x07)<<8) | fetch())
+#define SIGNED(v) ((v) - (BIT(v,7) ? 0x100 : 0))
// flags
-#define FLAG_CY 0x80
-#define FLAG_AC 0x40
-#define FLAG_OV 0x04
-#define FLAG_P 0x01
-#define GET_CY BIT(REG_PSW,7)
-#define GET_AC BIT(REG_PSW,6)
-#define GET_OV BIT(REG_PSW,2)
-#define GET_P BIT(REG_PSW,0)
-#define SET_CY(v) { if (v) REG_PSW |= FLAG_CY; else REG_PSW &= ~FLAG_CY; } while(0)
-#define SET_AC(v) { if (v) REG_PSW |= FLAG_AC; else REG_PSW &= ~FLAG_AC; } while(0)
-#define SET_OV(v) { if (v) REG_PSW |= FLAG_OV; else REG_PSW &= ~FLAG_OV; } while(0)
-#define CHECK_P() check_p_flag()
+#define FLAG_CY 0x80
+#define FLAG_AC 0x40
+#define FLAG_OV 0x04
+#define FLAG_P 0x01
+#define GET_CY BIT(REG_PSW,7)
+#define GET_AC BIT(REG_PSW,6)
+#define GET_OV BIT(REG_PSW,2)
+#define GET_P BIT(REG_PSW,0)
+#define SET_CY(v) { if (v) REG_PSW |= FLAG_CY; else REG_PSW &= ~FLAG_CY; } while(0)
+#define SET_AC(v) { if (v) REG_PSW |= FLAG_AC; else REG_PSW &= ~FLAG_AC; } while(0)
+#define SET_OV(v) { if (v) REG_PSW |= FLAG_OV; else REG_PSW &= ~FLAG_OV; } while(0)
+#define CHECK_P() check_p_flag()
// CPU state
-#define HALT_MODE 0x01
-#define HOLD_MODE 0x02
+#define HALT_MODE 0x01
+#define HOLD_MODE 0x02
//**************************************************************************
@@ -119,22 +119,22 @@ const device_type LC8670 = &device_creator<lc8670_cpu_device>;
const lc8670_cpu_device::op_handler lc8670_cpu_device::s_opcode_table[] =
{
- &lc8670_cpu_device::op_nop , &lc8670_cpu_device::op_br , &lc8670_cpu_device::op_ld , &lc8670_cpu_device::op_ld , &lc8670_cpu_device::op_call, // 0x0*
- &lc8670_cpu_device::op_callr, &lc8670_cpu_device::op_brf , &lc8670_cpu_device::op_st , &lc8670_cpu_device::op_st , &lc8670_cpu_device::op_call, // 0x1*
- &lc8670_cpu_device::op_callf, &lc8670_cpu_device::op_jmpf, &lc8670_cpu_device::op_mov , &lc8670_cpu_device::op_mov , &lc8670_cpu_device::op_jmp, // 0x2*
- &lc8670_cpu_device::op_mul , &lc8670_cpu_device::op_be , &lc8670_cpu_device::op_be , &lc8670_cpu_device::op_be_ri, &lc8670_cpu_device::op_jmp, // 0x3*
- &lc8670_cpu_device::op_div , &lc8670_cpu_device::op_bne , &lc8670_cpu_device::op_bne , &lc8670_cpu_device::op_bne_ri, &lc8670_cpu_device::op_bpc, // 0x4*
- &lc8670_cpu_device::op_ldf , &lc8670_cpu_device::op_stf , &lc8670_cpu_device::op_dbnz, &lc8670_cpu_device::op_dbnz, &lc8670_cpu_device::op_bpc, // 0x5*
- &lc8670_cpu_device::op_push , &lc8670_cpu_device::op_push, &lc8670_cpu_device::op_inc , &lc8670_cpu_device::op_inc , &lc8670_cpu_device::op_bp, // 0x6*
- &lc8670_cpu_device::op_pop , &lc8670_cpu_device::op_pop , &lc8670_cpu_device::op_dec , &lc8670_cpu_device::op_dec , &lc8670_cpu_device::op_bp, // 0x7*
- &lc8670_cpu_device::op_bz , &lc8670_cpu_device::op_add , &lc8670_cpu_device::op_add , &lc8670_cpu_device::op_add , &lc8670_cpu_device::op_bn, // 0x8*
- &lc8670_cpu_device::op_bnz , &lc8670_cpu_device::op_addc, &lc8670_cpu_device::op_addc, &lc8670_cpu_device::op_addc, &lc8670_cpu_device::op_bn, // 0x9*
- &lc8670_cpu_device::op_ret , &lc8670_cpu_device::op_sub , &lc8670_cpu_device::op_sub , &lc8670_cpu_device::op_sub , &lc8670_cpu_device::op_not1, // 0xa*
- &lc8670_cpu_device::op_reti , &lc8670_cpu_device::op_subc, &lc8670_cpu_device::op_subc, &lc8670_cpu_device::op_subc, &lc8670_cpu_device::op_not1, // 0xb*
- &lc8670_cpu_device::op_ror , &lc8670_cpu_device::op_ldc , &lc8670_cpu_device::op_xch , &lc8670_cpu_device::op_xch , &lc8670_cpu_device::op_clr1, // 0xc*
- &lc8670_cpu_device::op_rorc , &lc8670_cpu_device::op_or , &lc8670_cpu_device::op_or , &lc8670_cpu_device::op_or , &lc8670_cpu_device::op_clr1, // 0xd*
- &lc8670_cpu_device::op_rol , &lc8670_cpu_device::op_and , &lc8670_cpu_device::op_and , &lc8670_cpu_device::op_and , &lc8670_cpu_device::op_set1, // 0xe*
- &lc8670_cpu_device::op_rolc , &lc8670_cpu_device::op_xor , &lc8670_cpu_device::op_xor , &lc8670_cpu_device::op_xor , &lc8670_cpu_device::op_set1, // 0xf*
+ &lc8670_cpu_device::op_nop , &lc8670_cpu_device::op_br , &lc8670_cpu_device::op_ld , &lc8670_cpu_device::op_ld , &lc8670_cpu_device::op_call, // 0x0*
+ &lc8670_cpu_device::op_callr, &lc8670_cpu_device::op_brf , &lc8670_cpu_device::op_st , &lc8670_cpu_device::op_st , &lc8670_cpu_device::op_call, // 0x1*
+ &lc8670_cpu_device::op_callf, &lc8670_cpu_device::op_jmpf, &lc8670_cpu_device::op_mov , &lc8670_cpu_device::op_mov , &lc8670_cpu_device::op_jmp, // 0x2*
+ &lc8670_cpu_device::op_mul , &lc8670_cpu_device::op_be , &lc8670_cpu_device::op_be , &lc8670_cpu_device::op_be_ri, &lc8670_cpu_device::op_jmp, // 0x3*
+ &lc8670_cpu_device::op_div , &lc8670_cpu_device::op_bne , &lc8670_cpu_device::op_bne , &lc8670_cpu_device::op_bne_ri, &lc8670_cpu_device::op_bpc, // 0x4*
+ &lc8670_cpu_device::op_ldf , &lc8670_cpu_device::op_stf , &lc8670_cpu_device::op_dbnz, &lc8670_cpu_device::op_dbnz, &lc8670_cpu_device::op_bpc, // 0x5*
+ &lc8670_cpu_device::op_push , &lc8670_cpu_device::op_push, &lc8670_cpu_device::op_inc , &lc8670_cpu_device::op_inc , &lc8670_cpu_device::op_bp, // 0x6*
+ &lc8670_cpu_device::op_pop , &lc8670_cpu_device::op_pop , &lc8670_cpu_device::op_dec , &lc8670_cpu_device::op_dec , &lc8670_cpu_device::op_bp, // 0x7*
+ &lc8670_cpu_device::op_bz , &lc8670_cpu_device::op_add , &lc8670_cpu_device::op_add , &lc8670_cpu_device::op_add , &lc8670_cpu_device::op_bn, // 0x8*
+ &lc8670_cpu_device::op_bnz , &lc8670_cpu_device::op_addc, &lc8670_cpu_device::op_addc, &lc8670_cpu_device::op_addc, &lc8670_cpu_device::op_bn, // 0x9*
+ &lc8670_cpu_device::op_ret , &lc8670_cpu_device::op_sub , &lc8670_cpu_device::op_sub , &lc8670_cpu_device::op_sub , &lc8670_cpu_device::op_not1, // 0xa*
+ &lc8670_cpu_device::op_reti , &lc8670_cpu_device::op_subc, &lc8670_cpu_device::op_subc, &lc8670_cpu_device::op_subc, &lc8670_cpu_device::op_not1, // 0xb*
+ &lc8670_cpu_device::op_ror , &lc8670_cpu_device::op_ldc , &lc8670_cpu_device::op_xch , &lc8670_cpu_device::op_xch , &lc8670_cpu_device::op_clr1, // 0xc*
+ &lc8670_cpu_device::op_rorc , &lc8670_cpu_device::op_or , &lc8670_cpu_device::op_or , &lc8670_cpu_device::op_or , &lc8670_cpu_device::op_clr1, // 0xd*
+ &lc8670_cpu_device::op_rol , &lc8670_cpu_device::op_and , &lc8670_cpu_device::op_and , &lc8670_cpu_device::op_and , &lc8670_cpu_device::op_set1, // 0xe*
+ &lc8670_cpu_device::op_rolc , &lc8670_cpu_device::op_xor , &lc8670_cpu_device::op_xor , &lc8670_cpu_device::op_xor , &lc8670_cpu_device::op_set1, // 0xf*
};
@@ -170,10 +170,10 @@ ADDRESS_MAP_END
lc8670_cpu_device::lc8670_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, LC8670, "Sanyo LC8670", tag, owner, clock),
- m_program_config("program", ENDIANNESS_BIG, 8, 16, 0),
- m_data_config("data", ENDIANNESS_BIG, 8, 9, 0, ADDRESS_MAP_NAME(lc8670_internal_map)),
- m_io_config("io", ENDIANNESS_BIG, 8, 8, 0),
- m_bankswitch_func(*this)
+ m_program_config("program", ENDIANNESS_BIG, 8, 16, 0),
+ m_data_config("data", ENDIANNESS_BIG, 8, 9, 0, ADDRESS_MAP_NAME(lc8670_internal_map)),
+ m_io_config("io", ENDIANNESS_BIG, 8, 8, 0),
+ m_bankswitch_func(*this)
{
}
@@ -392,7 +392,7 @@ void lc8670_cpu_device::state_string_export(const device_state_entry &entry, ast
const address_space_config * lc8670_cpu_device::memory_space_config(address_spacenum spacenum) const
{
- return (spacenum == AS_PROGRAM) ? &m_program_config :
+ return (spacenum == AS_PROGRAM) ? &m_program_config :
(spacenum == AS_DATA) ? &m_data_config :
(spacenum == AS_IO) ? &m_io_config :
NULL;
@@ -451,25 +451,25 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state)
switch(inputnum)
{
case LC8670_EXT_INT0:
- if ((REG_I01CR & 0x0c) == 0x00 && m_input_lines[inputnum] && !state) // falling edge
+ if ((REG_I01CR & 0x0c) == 0x00 && m_input_lines[inputnum] && !state) // falling edge
{
REG_I01CR |= 0x02;
if (REG_I01CR & 0x01)
set_irq_flag(1);
}
- else if ((REG_I01CR & 0x0c) == 0x04 && !state) // low level
+ else if ((REG_I01CR & 0x0c) == 0x04 && !state) // low level
{
REG_I01CR |= 0x02;
if (REG_I01CR & 0x01)
set_irq_flag(1);
}
- else if ((REG_I01CR & 0x0c) == 0x08 && !m_input_lines[inputnum] && state) // rising edge
+ else if ((REG_I01CR & 0x0c) == 0x08 && !m_input_lines[inputnum] && state) // rising edge
{
REG_I01CR |= 0x02;
if (REG_I01CR & 0x01)
set_irq_flag(1);
}
- else if ((REG_I01CR & 0x0c) == 0x0c && state) // high level
+ else if ((REG_I01CR & 0x0c) == 0x0c && state) // high level
{
REG_I01CR |= 0x02;
if (REG_I01CR & 0x01)
@@ -477,25 +477,25 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state)
}
break;
case LC8670_EXT_INT1:
- if ((REG_I01CR & 0xc0) == 0x00 && m_input_lines[inputnum] && !state) // falling edge
+ if ((REG_I01CR & 0xc0) == 0x00 && m_input_lines[inputnum] && !state) // falling edge
{
REG_I01CR |= 0x20;
if (REG_I01CR & 0x10)
set_irq_flag(2);
}
- else if ((REG_I01CR & 0xc0) == 0x40 && !state) // low level
+ else if ((REG_I01CR & 0xc0) == 0x40 && !state) // low level
{
REG_I01CR |= 0x20;
if (REG_I01CR & 0x10)
set_irq_flag(2);
}
- else if ((REG_I01CR & 0xc0) == 0x80 && !m_input_lines[inputnum] && state) // rising edge
+ else if ((REG_I01CR & 0xc0) == 0x80 && !m_input_lines[inputnum] && state) // rising edge
{
REG_I01CR |= 0x20;
if (REG_I01CR & 0x10)
set_irq_flag(2);
}
- else if ((REG_I01CR & 0xc0) == 0xc0 && state) // high level
+ else if ((REG_I01CR & 0xc0) == 0xc0 && state) // high level
{
REG_I01CR |= 0x20;
if (REG_I01CR & 0x10)
@@ -503,7 +503,7 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state)
}
break;
case LC8670_EXT_INT2:
- if ((REG_I23CR & 0x04) && m_input_lines[inputnum] && !state) // falling edge
+ if ((REG_I23CR & 0x04) && m_input_lines[inputnum] && !state) // falling edge
{
if (!(REG_ISL & 0x01))
timer0_tick(true);
@@ -512,7 +512,7 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state)
if (REG_I23CR & 0x01)
set_irq_flag(3);
}
- if ((REG_I23CR & 0x08) && !m_input_lines[inputnum] && state) // rising edge
+ if ((REG_I23CR & 0x08) && !m_input_lines[inputnum] && state) // rising edge
{
if (!(REG_ISL & 0x01))
timer0_tick(true);
@@ -523,7 +523,7 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state)
}
break;
case LC8670_EXT_INT3:
- if ((REG_I23CR & 0x40) && m_input_lines[inputnum] && !state) // falling edge
+ if ((REG_I23CR & 0x40) && m_input_lines[inputnum] && !state) // falling edge
{
if (REG_ISL & 0x01)
timer0_tick(true);
@@ -532,7 +532,7 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state)
if (REG_I23CR & 0x10)
set_irq_flag(4);
}
- if ((REG_I23CR & 0x80) && !m_input_lines[inputnum] && state) // rising edge
+ if ((REG_I23CR & 0x80) && !m_input_lines[inputnum] && state) // rising edge
{
if (REG_ISL & 0x01)
timer0_tick(true);
@@ -624,13 +624,13 @@ void lc8670_cpu_device::check_irqs()
// IRQ with less priority of current interrupt are not executed until the end of the current interrupt routine
if (irq != 0 && ((m_irq_lev & (1<<priority)) || (priority == 0 && (m_irq_lev & 0x06)) || (priority == 1 && (m_irq_lev & 0x04))))
{
- if (LOG_IRQ) logerror("%s: interrupt %d (Priority=%d, Level=%d) delayed\n", tag(), irq, priority, m_irq_lev);
+ if (LOG_IRQ) logerror("%s: interrupt %d (Priority=%d, Level=%d) delayed\n", tag(), irq, priority, m_irq_lev);
irq = 0;
}
if (irq != 0)
{
- if (LOG_IRQ) logerror("%s: interrupt %d (Priority=%d, Level=%d) executed\n", tag(), irq, priority, m_irq_lev);
+ if (LOG_IRQ) logerror("%s: interrupt %d (Priority=%d, Level=%d) executed\n", tag(), irq, priority, m_irq_lev);
m_irq_lev |= (1<<priority);
@@ -639,7 +639,7 @@ void lc8670_cpu_device::check_irqs()
set_pc(s_irq_vectors[irq]);
- REG_PCON &= ~HALT_MODE; // interrupts resume from HALT state
+ REG_PCON &= ~HALT_MODE; // interrupts resume from HALT state
// clear the IRQ flag
m_irq_flag &= ~(1<<irq);
@@ -664,14 +664,14 @@ void lc8670_cpu_device::base_timer_tick()
UINT16 base_counter_l = m_base_timer[0] + 1;
UINT16 base_counter_h = m_base_timer[1];
- if (REG_BTCR & 0x80) // 6-bit mode
+ if (REG_BTCR & 0x80) // 6-bit mode
base_counter_h++;
else if (base_counter_l & 0x100)
base_counter_h++;
if (base_counter_h & 0x40)
{
- if (LOG_TIMERS) logerror("%s: base timer 0 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR,0));
+ if (LOG_TIMERS) logerror("%s: base timer 0 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR,0));
REG_BTCR |= 0x02;
if (REG_BTCR & 0x01)
set_irq_flag(4);
@@ -700,7 +700,7 @@ void lc8670_cpu_device::base_timer_tick()
if (bt1_req)
{
- if (LOG_TIMERS) logerror("%s: base timer 1 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR,3));
+ if (LOG_TIMERS) logerror("%s: base timer 1 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR,3));
REG_BTCR |= 0x08;
if (REG_BTCR & 0x04)
set_irq_flag(4);
@@ -725,7 +725,7 @@ void lc8670_cpu_device::timer0_prescaler_tick()
UINT16 prescaler = m_timer0_prescaler + 1;
if (prescaler & 0x100)
{
- if (LOG_TIMERS) logerror("%s: timer0 prescaler overflow\n", tag());
+ if (LOG_TIMERS) logerror("%s: timer0 prescaler overflow\n", tag());
if ((REG_ISL & 0x30) == 0x30)
base_timer_tick();
@@ -757,7 +757,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line)
if (timer0 & 0x10000)
{
- if (LOG_TIMERS) logerror("%s: timer0 long overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3));
+ if (LOG_TIMERS) logerror("%s: timer0 long overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3));
m_timer0[0] = REG_T0LR;
m_timer0[1] = REG_T0HR;
REG_T0CNT |= 0x0a;
@@ -780,7 +780,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line)
if (timer0l & 0x100)
{
- if (LOG_TIMERS) logerror("%s: timer0 low overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,0));
+ if (LOG_TIMERS) logerror("%s: timer0 low overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,0));
m_timer0[0] = REG_T0LR;
REG_T0CNT |= 0x02;
if (REG_T0CNT & 0x01)
@@ -796,7 +796,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line)
UINT16 timer0h = m_timer0[1] + 1;
if (timer0h & 0x100)
{
- if (LOG_TIMERS) logerror("%s: timer0 high overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3));
+ if (LOG_TIMERS) logerror("%s: timer0 high overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3));
m_timer0[1] = REG_T0HR;
REG_T0CNT |= 0x08;
if (REG_T0CNT & 0x04)
@@ -833,7 +833,7 @@ void lc8670_cpu_device::timer1_tick()
if (timer1h & 0x100)
{
- if (LOG_TIMERS) logerror("%s: timer1 long overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,3));
+ if (LOG_TIMERS) logerror("%s: timer1 long overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,3));
m_timer1[1] = REG_T1HR;
REG_T1CNT |= 0x08;
if (REG_T1CNT & 0x05)
@@ -862,7 +862,7 @@ void lc8670_cpu_device::timer1_tick()
if (timer1l & 0x100)
{
- if (LOG_TIMERS) logerror("%s: timer1 low overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,0));
+ if (LOG_TIMERS) logerror("%s: timer1 low overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,0));
m_timer1[0] = REG_T1LR;
update_port1(m_p1_data & 0x7f);
REG_T1CNT |= 0x02;
@@ -880,7 +880,7 @@ void lc8670_cpu_device::timer1_tick()
if (timer1h & 0x100)
{
- if (LOG_TIMERS) logerror("%s: timer1 high overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,3));
+ if (LOG_TIMERS) logerror("%s: timer1 high overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,3));
m_timer1[1] = REG_T1HR;
REG_T1CNT |= 0x08;
if (REG_T1CNT & 0x04)
@@ -912,7 +912,7 @@ WRITE8_MEMBER(lc8670_cpu_device::mram_w)
READ8_MEMBER(lc8670_cpu_device::xram_r)
{
- if (!(REG_VCCR & 0x40) || space.debugger_access()) // XRAM access enabled
+ if (!(REG_VCCR & 0x40) || space.debugger_access()) // XRAM access enabled
{
UINT8 * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
@@ -935,7 +935,7 @@ READ8_MEMBER(lc8670_cpu_device::xram_r)
WRITE8_MEMBER(lc8670_cpu_device::xram_w)
{
- if (!(REG_VCCR & 0x40) || space.debugger_access()) // XRAM access enabled
+ if (!(REG_VCCR & 0x40) || space.debugger_access()) // XRAM access enabled
{
UINT8 * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60;
@@ -971,7 +971,7 @@ READ8_MEMBER(lc8670_cpu_device::regs_r)
case 0x4c:
return (REG_P3 & REG_P3DDR) | (m_io->read_byte(LC8670_PORT3) & (REG_P3DDR ^ 0xff));
case 0x5c:
- return m_io->read_byte(LC8670_PORT7) | 0xf0; // 4-bit read-only port
+ return m_io->read_byte(LC8670_PORT7) | 0xf0; // 4-bit read-only port
case 0x66:
{
UINT8 data = m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff];
@@ -987,7 +987,7 @@ READ8_MEMBER(lc8670_cpu_device::regs_r)
// write-only registers
case 0x20: case 0x23: case 0x24: case 0x27:
case 0x45: case 0x46: case 0x4d:
- if(!space.debugger_access()) logerror("%s: read write-only SFR %04x\n", machine().describe_context(), offset);
+ if(!space.debugger_access()) logerror("%s: read write-only SFR %04x\n", machine().describe_context(), offset);
return 0xff;
}
return m_sfr[offset];
@@ -1051,12 +1051,12 @@ WRITE8_MEMBER(lc8670_cpu_device::regs_w)
break;
case 0x7f:
if (!(data & 0x40))
- m_base_timer[0] = m_base_timer[1] = 0; // stop the timer clear the counter
+ m_base_timer[0] = m_base_timer[1] = 0; // stop the timer clear the counter
break;
// read-only registers
case 0x12: case 0x14: case 0x5c:
- if(!space.debugger_access()) logerror("%s: write read-only SFR %04x = %02x\n", machine().describe_context(), offset, data);
+ if(!space.debugger_access()) logerror("%s: write read-only SFR %04x = %02x\n", machine().describe_context(), offset, data);
return;
}
@@ -1210,7 +1210,7 @@ inline void lc8670_cpu_device::check_p3int()
inline void lc8670_cpu_device::set_irq_flag(int source)
{
- if (LOG_IRQ) logerror("%s: set interrupt flag: %d\n", tag(), source);
+ if (LOG_IRQ) logerror("%s: set interrupt flag: %d\n", tag(), source);
m_irq_flag |= 1<<source;
}
@@ -1643,7 +1643,7 @@ int lc8670_cpu_device::op_reti()
new_pc |= pop();
set_pc(new_pc);
- if (LOG_IRQ) logerror("%s: RETI from level %d\n", machine().describe_context(), m_irq_lev);
+ if (LOG_IRQ) logerror("%s: RETI from level %d\n", machine().describe_context(), m_irq_lev);
for(int i=2; i>=0; i--)
if (m_irq_lev & (1<<i))
{
diff --git a/src/emu/cpu/lc8670/lc8670.h b/src/emu/cpu/lc8670/lc8670.h
index 4f9175291cf..852105830d1 100644
--- a/src/emu/cpu/lc8670/lc8670.h
+++ b/src/emu/cpu/lc8670/lc8670.h
@@ -23,18 +23,18 @@ enum
// input ports
enum
{
- LC8670_PORT1, // 8-bit I/O port
- LC8670_PORT3, // 8-bit I/O port
- LC8670_PORT7 // 4-bit I port
+ LC8670_PORT1, // 8-bit I/O port
+ LC8670_PORT3, // 8-bit I/O port
+ LC8670_PORT7 // 4-bit I port
};
// external input lines
enum
{
- LC8670_EXT_INT0 = 0, // P70
- LC8670_EXT_INT1, // P71
- LC8670_EXT_INT2, // P72
- LC8670_EXT_INT3 // P73
+ LC8670_EXT_INT0 = 0, // P70
+ LC8670_EXT_INT1, // P71
+ LC8670_EXT_INT2, // P72
+ LC8670_EXT_INT3 // P73
};
// clock sources
@@ -198,45 +198,45 @@ private:
address_space_config m_data_config;
address_space_config m_io_config;
- address_space * m_program; // program space (ROM or flash)
- address_space * m_data; // internal RAM/register
- address_space * m_io; // I/O ports
- direct_read_data * m_direct;
+ address_space * m_program; // program space (ROM or flash)
+ address_space * m_data; // internal RAM/register
+ address_space * m_io; // I/O ports
+ direct_read_data * m_direct;
// timers
static const device_timer_id BASE_TIMER = 1;
static const device_timer_id CLOCK_TIMER = 2;
- emu_timer * m_basetimer;
- emu_timer * m_clocktimer;
+ emu_timer * m_basetimer;
+ emu_timer * m_clocktimer;
// internal state
- int m_icount;
- UINT16 m_pc;
- UINT16 m_ppc;
- UINT8 m_op;
- UINT8 * m_sfr; // special function registers
- UINT8 * m_mram; // main RAM
- UINT8 * m_xram; // XRAM
- UINT8 * m_vtrbf; // work RAM
- UINT16 m_irq_flag;
- UINT8 m_irq_lev;
- bool m_after_reti;
- UINT8 m_p1_data;
- UINT8 m_timer0_prescaler;
- UINT8 m_timer0[2];
- UINT8 m_timer1[2];
- UINT8 m_timer1_comparator[2];
- UINT8 m_base_timer[2];
- bool m_clock_changed;
- int m_input_lines[4];
+ int m_icount;
+ UINT16 m_pc;
+ UINT16 m_ppc;
+ UINT8 m_op;
+ UINT8 * m_sfr; // special function registers
+ UINT8 * m_mram; // main RAM
+ UINT8 * m_xram; // XRAM
+ UINT8 * m_vtrbf; // work RAM
+ UINT16 m_irq_flag;
+ UINT8 m_irq_lev;
+ bool m_after_reti;
+ UINT8 m_p1_data;
+ UINT8 m_timer0_prescaler;
+ UINT8 m_timer0[2];
+ UINT8 m_timer1[2];
+ UINT8 m_timer1_comparator[2];
+ UINT8 m_base_timer[2];
+ bool m_clock_changed;
+ int m_input_lines[4];
// configuration
- UINT32 m_clocks[3]; // clock sources
- devcb2_write8 m_bankswitch_func; // bankswitch CB
- lc8670_lcd_update m_lcd_update_func; // LCD update CB
+ UINT32 m_clocks[3]; // clock sources
+ devcb2_write8 m_bankswitch_func; // bankswitch CB
+ lc8670_lcd_update m_lcd_update_func; // LCD update CB
// interrupts vectors
- static const UINT16 s_irq_vectors[16];
+ static const UINT16 s_irq_vectors[16];
// opcodes table
typedef int (lc8670_cpu_device::*op_handler)();
@@ -263,9 +263,9 @@ private:
struct dasm_entry
{
const char *str;
- UINT8 arg1;
- UINT8 arg2;
- bool inv;
+ UINT8 arg1;
+ UINT8 arg2;
+ bool inv;
};
static const dasm_entry s_dasm_table[80];
};
diff --git a/src/emu/cpu/lc8670/lc8670dsm.c b/src/emu/cpu/lc8670/lc8670dsm.c
index 9b3c070f110..7337f68a820 100644
--- a/src/emu/cpu/lc8670/lc8670dsm.c
+++ b/src/emu/cpu/lc8670/lc8670dsm.c
@@ -10,82 +10,82 @@
const lc8670_cpu_device::dasm_entry lc8670_cpu_device::s_dasm_table[] =
{
- { "NOP" , OP_NULL, OP_NULL, 0 }, // 0x0*
+ { "NOP" , OP_NULL, OP_NULL, 0 }, // 0x0*
{ "BR" , OP_R8 , OP_NULL, 0 },
{ "LD" , OP_D9 , OP_NULL, 0 },
{ "LD" , OP_RI , OP_NULL, 0 },
{ "CALL", OP_A12 , OP_NULL, 0 },
- { "CALLR", OP_R16 , OP_NULL, 0 }, // 0x1*
+ { "CALLR", OP_R16 , OP_NULL, 0 }, // 0x1*
{ "BRF" , OP_R16 , OP_NULL, 0 },
{ "ST" , OP_D9 , OP_NULL, 0 },
{ "ST" , OP_RI , OP_NULL, 0 },
{ "CALL", OP_A12 , OP_NULL, 0 },
- { "CALLF", OP_A16 , OP_NULL, 0 }, // 0x2*
+ { "CALLF", OP_A16 , OP_NULL, 0 }, // 0x2*
{ "JMPF", OP_A16 , OP_NULL, 0 },
{ "MOV" , OP_D9 , OP_I8 , 1 },
{ "MOV" , OP_RI , OP_I8 , 1 },
{ "JMP" , OP_A12 , OP_NULL, 0 },
- { "MUL" , OP_NULL, OP_NULL, 0 }, // 0x3*
+ { "MUL" , OP_NULL, OP_NULL, 0 }, // 0x3*
{ "BE" , OP_I8 , OP_R8 , 0 },
{ "BE" , OP_D9 , OP_R8 , 0 },
{ "BE" , OP_RII8, OP_R8 , 0 },
{ "JMP" , OP_A12 , OP_NULL, 0 },
- { "DIV" , OP_NULL, OP_NULL, 0 }, // 0x4*
+ { "DIV" , OP_NULL, OP_NULL, 0 }, // 0x4*
{ "BNE" , OP_I8 , OP_R8 , 0 },
{ "BNE" , OP_D9 , OP_R8 , 0 },
{ "BNE" , OP_RII8, OP_R8 , 0 },
{ "BPC" , OP_D9B3, OP_R8 , 0 },
- { "LDF" , OP_NULL, OP_NULL, 0 }, // 0x5*
+ { "LDF" , OP_NULL, OP_NULL, 0 }, // 0x5*
{ "STF" , OP_NULL, OP_NULL, 0 },
{ "DBNZ", OP_D9 , OP_R8 , 0 },
{ "DBNZ", OP_RI , OP_R8RI, 0 },
{ "BPC" , OP_D9B3, OP_R8 , 0 },
- { "PUSH", OP_D9 , OP_NULL, 0 }, // 0x6*
+ { "PUSH", OP_D9 , OP_NULL, 0 }, // 0x6*
{ "PUSH", OP_D9 , OP_NULL, 0 },
{ "INC" , OP_D9 , OP_NULL, 0 },
{ "INC" , OP_RI , OP_NULL, 0 },
{ "BP" , OP_D9B3, OP_R8 , 0 },
- { "POP" , OP_D9 , OP_NULL, 0 }, // 0x7*
+ { "POP" , OP_D9 , OP_NULL, 0 }, // 0x7*
{ "POP" , OP_D9 , OP_NULL, 0 },
{ "DEC" , OP_D9 , OP_NULL, 0 },
{ "DEC" , OP_RI , OP_NULL, 0 },
{ "BP" , OP_D9B3, OP_R8 , 0 },
- { "BZ" , OP_R8 , OP_NULL, 0 }, // 0x8*
+ { "BZ" , OP_R8 , OP_NULL, 0 }, // 0x8*
{ "ADD" , OP_I8 , OP_NULL, 0 },
{ "ADD" , OP_D9 , OP_NULL, 0 },
{ "ADD" , OP_RI , OP_NULL, 0 },
{ "BN" , OP_D9B3, OP_R8 , 0 },
- { "BNZ" , OP_R8 , OP_NULL, 0 }, // 0x9*
+ { "BNZ" , OP_R8 , OP_NULL, 0 }, // 0x9*
{ "ADDC", OP_I8 , OP_NULL, 0 },
{ "ADDC", OP_D9 , OP_NULL, 0 },
{ "ADDC", OP_RI , OP_NULL, 0 },
{ "BN" , OP_D9B3, OP_R8 , 0 },
- { "RET" , OP_NULL, OP_NULL, 0 }, // 0xa*
+ { "RET" , OP_NULL, OP_NULL, 0 }, // 0xa*
{ "SUB" , OP_I8 , OP_NULL, 0 },
{ "SUB" , OP_D9 , OP_NULL, 0 },
{ "SUB" , OP_RI , OP_NULL, 0 },
{ "NOT1", OP_D9B3, OP_NULL, 0 },
- { "RETI", OP_NULL, OP_NULL, 0 }, // 0xb*
+ { "RETI", OP_NULL, OP_NULL, 0 }, // 0xb*
{ "SUBC", OP_I8 , OP_NULL, 0 },
{ "SUBC", OP_D9 , OP_NULL, 0 },
{ "SUBC", OP_RI , OP_NULL, 0 },
{ "NOT1", OP_D9B3, OP_NULL, 0 },
- { "ROR" , OP_NULL, OP_NULL, 0 }, // 0xc*
+ { "ROR" , OP_NULL, OP_NULL, 0 }, // 0xc*
{ "LDC" , OP_NULL, OP_NULL, 0 },
{ "XCH" , OP_D9 , OP_NULL, 0 },
{ "XCH" , OP_RI , OP_NULL, 0 },
{ "CLR1", OP_D9B3, OP_NULL, 0 },
- { "RORC", OP_NULL, OP_NULL, 0 }, // 0xd*
+ { "RORC", OP_NULL, OP_NULL, 0 }, // 0xd*
{ "OR" , OP_I8 , OP_NULL, 0 },
{ "OR" , OP_D9 , OP_NULL, 0 },
{ "OR" , OP_RI , OP_NULL, 0 },
{ "CLR1", OP_D9B3, OP_NULL, 0 },
- { "ROL" , OP_NULL, OP_NULL, 0 }, // 0xe*
+ { "ROL" , OP_NULL, OP_NULL, 0 }, // 0xe*
{ "AND" , OP_I8 , OP_NULL, 0 },
{ "AND" , OP_D9 , OP_NULL, 0 },
{ "AND" , OP_RI , OP_NULL, 0 },
{ "SET1", OP_D9B3, OP_NULL, 0 },
- { "ROLC", OP_NULL, OP_NULL, 0 }, // 0xf*
+ { "ROLC", OP_NULL, OP_NULL, 0 }, // 0xf*
{ "XOR" , OP_I8 , OP_NULL, 0 },
{ "XOR" , OP_D9 , OP_NULL, 0 },
{ "XOR" , OP_RI , OP_NULL, 0 },
diff --git a/src/emu/cpu/lh5801/5801tbl.c b/src/emu/cpu/lh5801/5801tbl.c
index 65701c50f4a..ef373570fc1 100644
--- a/src/emu/cpu/lh5801/5801tbl.c
+++ b/src/emu/cpu/lh5801/5801tbl.c
@@ -71,7 +71,7 @@ INLINE UINT8 lh5801_decimaladd_generic(lh5801_state *cpustate, int left, int rig
da = 0xa0;
else if ((cpustate->t&C) && !(cpustate->t&H))
da = 0xfa;
- else //if ((cpustate->t&C) && (cpustate->t&H))
+ else //if ((cpustate->t&C) && (cpustate->t&H))
da = 0x00;
return res + da;
@@ -79,7 +79,7 @@ INLINE UINT8 lh5801_decimaladd_generic(lh5801_state *cpustate, int left, int rig
INLINE void lh5801_dca(lh5801_state *cpustate, UINT8 data)
{
- cpustate->a += 0x66; //taken from official documentation
+ cpustate->a += 0x66; //taken from official documentation
cpustate->a=lh5801_decimaladd_generic(cpustate, cpustate->a, data, cpustate->t&C);
}
@@ -689,4 +689,3 @@ static void lh5801_instruction(lh5801_state *cpustate)
}
}
-
diff --git a/src/emu/cpu/lh5801/lh5801.c b/src/emu/cpu/lh5801/lh5801.c
index 56c37e05184..febcc7fe05b 100644
--- a/src/emu/cpu/lh5801/lh5801.c
+++ b/src/emu/cpu/lh5801/lh5801.c
@@ -33,7 +33,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
enum
{
@@ -58,8 +58,8 @@ struct lh5801_state
{
const lh5801_cpu_core *config;
legacy_cpu_device *device;
- address_space *program; //ME0
- address_space *io; //ME1
+ address_space *program; //ME0
+ address_space *io; //ME1
direct_read_data *direct;
PAIR s, p, u, x, y;
@@ -73,8 +73,8 @@ struct lh5801_state
int irq_state;
- UINT8 ir_flipflop[3]; //interrupt request flipflop: IR0, IR1, IR2
- int lines_status[2]; //MI and NMI lines status
+ UINT8 ir_flipflop[3]; //interrupt request flipflop: IR0, IR1, IR2
+ int lines_status[2]; //MI and NMI lines status
int idle;
int icount;
@@ -227,22 +227,22 @@ static CPU_SET_INFO( lh5801 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + LH5801_LINE_MI: set_irq_line(cpustate, LH5801_LINE_MI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + LH5801_LINE_MI: set_irq_line(cpustate, LH5801_LINE_MI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + LH5801_P: P = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_P: P = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + LH5801_S: S = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_U: U = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_X: X = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_Y: Y = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_T: cpustate->t = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_TM: cpustate->tm = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_BF: cpustate->bf = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_PV: cpustate->pv = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_PU: cpustate->pu = info->i; break;
- case CPUINFO_INT_REGISTER + LH5801_DP: cpustate->dp = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_S: S = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_U: U = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_X: X = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_Y: Y = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_T: cpustate->t = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_TM: cpustate->tm = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_BF: cpustate->bf = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_PV: cpustate->pv = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_PU: cpustate->pu = info->i; break;
+ case CPUINFO_INT_REGISTER + LH5801_DP: cpustate->dp = info->i; break;
}
}
@@ -259,62 +259,62 @@ CPU_GET_INFO( lh5801 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(lh5801_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 19; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = cpustate->irq_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(lh5801_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 19; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = cpustate->irq_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + LH5801_P: info->i = P; break;
+ case CPUINFO_INT_REGISTER + LH5801_P: info->i = P; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + LH5801_S: info->i = S; break;
- case CPUINFO_INT_REGISTER + LH5801_U: info->i = U; break;
- case CPUINFO_INT_REGISTER + LH5801_X: info->i = X; break;
- case CPUINFO_INT_REGISTER + LH5801_Y: info->i = Y; break;
- case CPUINFO_INT_REGISTER + LH5801_T: info->i = cpustate->t; break;
- case CPUINFO_INT_REGISTER + LH5801_TM: info->i = cpustate->tm; break;
- case CPUINFO_INT_REGISTER + LH5801_IN: info->i = cpustate->config->in(device); break;
- case CPUINFO_INT_REGISTER + LH5801_BF: info->i = cpustate->bf; break;
- case CPUINFO_INT_REGISTER + LH5801_PV: info->i = cpustate->pv; break;
- case CPUINFO_INT_REGISTER + LH5801_PU: info->i = cpustate->pu; break;
- case CPUINFO_INT_REGISTER + LH5801_DP: info->i = cpustate->dp; break;
+ case CPUINFO_INT_REGISTER + LH5801_S: info->i = S; break;
+ case CPUINFO_INT_REGISTER + LH5801_U: info->i = U; break;
+ case CPUINFO_INT_REGISTER + LH5801_X: info->i = X; break;
+ case CPUINFO_INT_REGISTER + LH5801_Y: info->i = Y; break;
+ case CPUINFO_INT_REGISTER + LH5801_T: info->i = cpustate->t; break;
+ case CPUINFO_INT_REGISTER + LH5801_TM: info->i = cpustate->tm; break;
+ case CPUINFO_INT_REGISTER + LH5801_IN: info->i = cpustate->config->in(device); break;
+ case CPUINFO_INT_REGISTER + LH5801_BF: info->i = cpustate->bf; break;
+ case CPUINFO_INT_REGISTER + LH5801_PV: info->i = cpustate->pv; break;
+ case CPUINFO_INT_REGISTER + LH5801_PU: info->i = cpustate->pu; break;
+ case CPUINFO_INT_REGISTER + LH5801_DP: info->i = cpustate->dp; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(lh5801); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(lh5801); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(lh5801); break;
- case CPUINFO_FCT_EXIT: info->exit = NULL; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(lh5801); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(lh5801); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(lh5801); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(lh5801); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(lh5801); break;
+ case CPUINFO_FCT_EXIT: info->exit = NULL; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(lh5801); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(lh5801); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "LH5801"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "LH5801"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0alpha"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "LH5801"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "LH5801"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0alpha"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%s%s%s%s%s%s%s%s",
@@ -328,19 +328,19 @@ CPU_GET_INFO( lh5801 )
cpustate->t&1?"C":".");
break;
- case CPUINFO_STR_REGISTER + LH5801_P: sprintf(info->s, "P:%04X", cpustate->p.w.l); break;
- case CPUINFO_STR_REGISTER + LH5801_S: sprintf(info->s, "S:%04X", cpustate->s.w.l); break;
- case CPUINFO_STR_REGISTER + LH5801_U: sprintf(info->s, "U:%04X", cpustate->u.w.l); break;
- case CPUINFO_STR_REGISTER + LH5801_X: sprintf(info->s, "X:%04X", cpustate->x.w.l); break;
- case CPUINFO_STR_REGISTER + LH5801_Y: sprintf(info->s, "Y:%04X", cpustate->y.w.l); break;
- case CPUINFO_STR_REGISTER + LH5801_T: sprintf(info->s, "T:%02X", cpustate->t); break;
- case CPUINFO_STR_REGISTER + LH5801_A: sprintf(info->s, "A:%02X", cpustate->a); break;
- case CPUINFO_STR_REGISTER + LH5801_TM: sprintf(info->s, "TM:%03X", cpustate->tm); break;
- case CPUINFO_STR_REGISTER + LH5801_IN: sprintf(info->s, "IN:%02X", cpustate->config->in(device)); break;
- case CPUINFO_STR_REGISTER + LH5801_PV: sprintf(info->s, "PV:%04X", cpustate->pv); break;
- case CPUINFO_STR_REGISTER + LH5801_PU: sprintf(info->s, "PU:%04X", cpustate->pu); break;
- case CPUINFO_STR_REGISTER + LH5801_BF: sprintf(info->s, "BF:%04X", cpustate->bf); break;
- case CPUINFO_STR_REGISTER + LH5801_DP: sprintf(info->s, "DP:%04X", cpustate->dp); break;
+ case CPUINFO_STR_REGISTER + LH5801_P: sprintf(info->s, "P:%04X", cpustate->p.w.l); break;
+ case CPUINFO_STR_REGISTER + LH5801_S: sprintf(info->s, "S:%04X", cpustate->s.w.l); break;
+ case CPUINFO_STR_REGISTER + LH5801_U: sprintf(info->s, "U:%04X", cpustate->u.w.l); break;
+ case CPUINFO_STR_REGISTER + LH5801_X: sprintf(info->s, "X:%04X", cpustate->x.w.l); break;
+ case CPUINFO_STR_REGISTER + LH5801_Y: sprintf(info->s, "Y:%04X", cpustate->y.w.l); break;
+ case CPUINFO_STR_REGISTER + LH5801_T: sprintf(info->s, "T:%02X", cpustate->t); break;
+ case CPUINFO_STR_REGISTER + LH5801_A: sprintf(info->s, "A:%02X", cpustate->a); break;
+ case CPUINFO_STR_REGISTER + LH5801_TM: sprintf(info->s, "TM:%03X", cpustate->tm); break;
+ case CPUINFO_STR_REGISTER + LH5801_IN: sprintf(info->s, "IN:%02X", cpustate->config->in(device)); break;
+ case CPUINFO_STR_REGISTER + LH5801_PV: sprintf(info->s, "PV:%04X", cpustate->pv); break;
+ case CPUINFO_STR_REGISTER + LH5801_PU: sprintf(info->s, "PU:%04X", cpustate->pu); break;
+ case CPUINFO_STR_REGISTER + LH5801_BF: sprintf(info->s, "BF:%04X", cpustate->bf); break;
+ case CPUINFO_STR_REGISTER + LH5801_DP: sprintf(info->s, "DP:%04X", cpustate->dp); break;
}
}
diff --git a/src/emu/cpu/lh5801/lh5801.h b/src/emu/cpu/lh5801/lh5801.h
index c6362b94ed9..4501f41381d 100644
--- a/src/emu/cpu/lh5801/lh5801.h
+++ b/src/emu/cpu/lh5801/lh5801.h
@@ -69,13 +69,13 @@ typedef UINT8 (*lh5801_in_func)(device_t *device);
struct lh5801_cpu_core
{
- lh5801_in_func in;
+ lh5801_in_func in;
};
// input lines
enum
{
- LH5801_LINE_MI, //maskable interrupt
+ LH5801_LINE_MI, //maskable interrupt
};
DECLARE_LEGACY_CPU_DEVICE(LH5801, lh5801);
diff --git a/src/emu/cpu/lr35902/lr35902.c b/src/emu/cpu/lr35902/lr35902.c
index 0940542c656..71412f04f8f 100644
--- a/src/emu/cpu/lr35902/lr35902.c
+++ b/src/emu/cpu/lr35902/lr35902.c
@@ -55,7 +55,7 @@ const device_type LR35902 = &device_creator<lr35902_cpu_device>;
lr35902_cpu_device::lr35902_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, LR35902, "LR35902", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
+ m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
{
c_regs = NULL;
c_features = 0;
@@ -243,16 +243,16 @@ void lr35902_cpu_device::check_interrupts()
}
/*
- logerror("Attempting to process LR35902 Interrupt IRQ $%02X\n", irq);
- logerror("Attempting to process LR35902 Interrupt IE $%02X\n", m_IE);
- logerror("Attempting to process LR35902 Interrupt IF $%02X\n", m_IF);
- */
+ logerror("Attempting to process LR35902 Interrupt IRQ $%02X\n", irq);
+ logerror("Attempting to process LR35902 Interrupt IE $%02X\n", m_IE);
+ logerror("Attempting to process LR35902 Interrupt IF $%02X\n", m_IF);
+ */
if (irq)
{
int irqline = 0;
/*
- logerror("LR35902 Interrupt IRQ $%02X\n", irq);
- */
+ logerror("LR35902 Interrupt IRQ $%02X\n", irq);
+ */
for( ; irqline < 5; irqline++ )
{
@@ -301,7 +301,7 @@ void lr35902_cpu_device::execute_run()
do
{
if ( m_execution_state ) {
- UINT8 x;
+ UINT8 x;
/* Execute instruction */
switch( m_op ) {
#include "opc_main.h"
@@ -350,4 +350,3 @@ void lr35902_cpu_device::set_speed( UINT8 speed_request )
{
m_gb_speed_change_pending = speed_request & 0x01;
}
-
diff --git a/src/emu/cpu/lr35902/lr35902.h b/src/emu/cpu/lr35902/lr35902.h
index 47e03e1ae87..dfe4499e8a0 100644
--- a/src/emu/cpu/lr35902/lr35902.h
+++ b/src/emu/cpu/lr35902/lr35902.h
@@ -14,8 +14,8 @@ typedef void (*lr35902_timer_fired_func)(lr35902_cpu_device *device, int cycles)
struct lr35902_config
{
- const UINT16 *c_regs;
- UINT8 c_features;
+ const UINT16 *c_regs;
+ UINT8 c_features;
lr35902_timer_fired_func c_timer_expired_func;
};
@@ -30,10 +30,10 @@ enum
};
// This and the features configuration could be removed if we introduce proper subclasses
-#define LR35902_FEATURE_HALT_BUG 0x01
+#define LR35902_FEATURE_HALT_BUG 0x01
-class lr35902_cpu_device : public cpu_device,
+class lr35902_cpu_device : public cpu_device,
public lr35902_config
{
public:
@@ -96,24 +96,24 @@ protected:
UINT16 m_SP;
UINT16 m_PC;
/* Interrupt related */
- UINT8 m_IE;
- UINT8 m_IF;
- int m_irq_state;
- int m_ei_delay;
+ UINT8 m_IE;
+ UINT8 m_IF;
+ int m_irq_state;
+ int m_ei_delay;
lr35902_cpu_device *m_device;
address_space *m_program;
int m_icount;
/* Timer stuff */
lr35902_timer_fired_func m_timer_expired_func;
/* Fetch & execute related */
- int m_execution_state;
- UINT8 m_op;
+ int m_execution_state;
+ UINT8 m_op;
/* Others */
int m_gb_speed;
int m_gb_speed_change_pending;
int m_enable;
int m_doHALTbug;
- UINT8 m_features;
+ UINT8 m_features;
const struct lr35902_config *m_config;
/* Flag bit definitions */
diff --git a/src/emu/cpu/lr35902/lr35902d.c b/src/emu/cpu/lr35902/lr35902d.c
index fc1a0958962..b2922a97c45 100644
--- a/src/emu/cpu/lr35902/lr35902d.c
+++ b/src/emu/cpu/lr35902/lr35902d.c
@@ -25,12 +25,12 @@
enum e_mnemonics
{
- zADC, zADD, zAND, zBIT, zCALL, zCCF, zCP,
- zCPL, zDAA, zDB, zDEC, zDI, zEI, zHLT,
- zIN, zINC, zJP, zJR, zLD, zNOP, zOR,
- zPOP, zPUSH, zRES, zRET, zRETI, zRL, zRLA,
- zRLC, zRLCA, zRR, zRRA, zRRC, zRRCA, zRST,
- zSBC, zSCF, zSET, zSLA, zSLL, zSRA, zSRL,
+ zADC, zADD, zAND, zBIT, zCALL, zCCF, zCP,
+ zCPL, zDAA, zDB, zDEC, zDI, zEI, zHLT,
+ zIN, zINC, zJP, zJR, zLD, zNOP, zOR,
+ zPOP, zPUSH, zRES, zRET, zRETI, zRL, zRLA,
+ zRLC, zRLCA, zRR, zRRA, zRRC, zRRCA, zRST,
+ zSBC, zSCF, zSET, zSLA, zSLL, zSRA, zSRL,
zSTOP, zSUB, zXOR, zSWAP
};
@@ -60,7 +60,7 @@ static const UINT32 s_flags[] = {
struct lr35902dasm
{
- UINT8 mnemonic;
+ UINT8 mnemonic;
const char *arguments;
};
@@ -132,11 +132,11 @@ static const lr35902dasm mnemonic_cb[256] = {
};
static const lr35902dasm mnemonic_main[256]= {
- {zNOP,0}, {zLD,"bc,N"}, {zLD,"(bc),a"}, {zINC,"bc"},
+ {zNOP,0}, {zLD,"bc,N"}, {zLD,"(bc),a"}, {zINC,"bc"},
{zINC,"b"}, {zDEC,"b"}, {zLD,"b,B"}, {zRLCA,0},
{zLD,"(W),sp"}, {zADD,"hl,bc"}, {zLD,"a,(bc)"}, {zDEC,"bc"},
{zINC,"c"}, {zDEC,"c"}, {zLD,"c,B"}, {zRRCA,0},
- {zSTOP,0}, {zLD,"de,N"}, {zLD,"(de),a"}, {zINC,"de"},
+ {zSTOP,0}, {zLD,"de,N"}, {zLD,"(de),a"}, {zINC,"de"},
{zINC,"d"}, {zDEC,"d"}, {zLD,"d,B"}, {zRLA,0},
{zJR,"O"}, {zADD,"hl,de"}, {zLD,"a,(de)"}, {zDEC,"de"},
{zINC,"e"}, {zDEC,"e"}, {zLD,"e,B"}, {zRRA,0},
diff --git a/src/emu/cpu/lr35902/opc_cb.h b/src/emu/cpu/lr35902/opc_cb.h
index e01dd029246..53d0257f8ff 100644
--- a/src/emu/cpu/lr35902/opc_cb.h
+++ b/src/emu/cpu/lr35902/opc_cb.h
@@ -1,137 +1,137 @@
-#define RLC_8BIT(x) \
-{ \
- register UINT8 f; \
- (x)=(UINT8)(((x)<<1)|((x)>>7)); \
- if( (x)&1 ) \
- f=FLAG_C; \
- else \
- f=0; \
- if( (x)==0 ) \
- f|=FLAG_Z; \
- m_F=f; \
+#define RLC_8BIT(x) \
+{ \
+ register UINT8 f; \
+ (x)=(UINT8)(((x)<<1)|((x)>>7)); \
+ if( (x)&1 ) \
+ f=FLAG_C; \
+ else \
+ f=0; \
+ if( (x)==0 ) \
+ f|=FLAG_Z; \
+ m_F=f; \
}
-#define RL_8BIT(x) \
-{ \
- register UINT8 r; \
- r=((x)&0x80)?FLAG_C:0; \
- (x)=(UINT8)(((x)<<1)|((m_F&FLAG_C)?1:0)); \
- if( (x)==0 ) \
- r|=FLAG_Z; \
- m_F=r; \
+#define RL_8BIT(x) \
+{ \
+ register UINT8 r; \
+ r=((x)&0x80)?FLAG_C:0; \
+ (x)=(UINT8)(((x)<<1)|((m_F&FLAG_C)?1:0)); \
+ if( (x)==0 ) \
+ r|=FLAG_Z; \
+ m_F=r; \
}
-#define RRC_8BIT(x) \
-{ \
- register UINT8 f; \
- (x)=(UINT8)(((x)>>1)|((x)<<7)); \
- if( (x)&0x80 ) \
- f=FLAG_C; \
- else \
- f=0; \
- if( (x)==0 ) \
- f|=FLAG_Z; \
- m_F=f; \
+#define RRC_8BIT(x) \
+{ \
+ register UINT8 f; \
+ (x)=(UINT8)(((x)>>1)|((x)<<7)); \
+ if( (x)&0x80 ) \
+ f=FLAG_C; \
+ else \
+ f=0; \
+ if( (x)==0 ) \
+ f|=FLAG_Z; \
+ m_F=f; \
}
-#define RR_8BIT(x) \
-{ \
- register UINT8 r; \
- r=((x)&1)?FLAG_C:0; \
- (x)=(UINT8)(((x)>>1)|((m_F&FLAG_C)?0x80:0)); \
- if( (x)==0 ) \
- r|=FLAG_Z; \
- m_F=r; \
+#define RR_8BIT(x) \
+{ \
+ register UINT8 r; \
+ r=((x)&1)?FLAG_C:0; \
+ (x)=(UINT8)(((x)>>1)|((m_F&FLAG_C)?0x80:0)); \
+ if( (x)==0 ) \
+ r|=FLAG_Z; \
+ m_F=r; \
}
-#define SLA_8BIT(x) \
-{ \
- register UINT8 f; \
- if( (x)&0x80 ) \
- f=FLAG_C; \
- else \
- f=0; \
- (x)<<=1; \
- if( (x)==0 ) \
- f|=FLAG_Z; \
- m_F=f; \
+#define SLA_8BIT(x) \
+{ \
+ register UINT8 f; \
+ if( (x)&0x80 ) \
+ f=FLAG_C; \
+ else \
+ f=0; \
+ (x)<<=1; \
+ if( (x)==0 ) \
+ f|=FLAG_Z; \
+ m_F=f; \
}
-#define SRA_8BIT(x) \
-{ \
- register UINT8 f; \
- if( (x)&1 ) \
- f=FLAG_C; \
- else \
- f=0; \
- (x)=(UINT8)(((char)(x))>>1); \
- if( (x)==0 ) \
- f|=FLAG_Z; \
- m_F=f; \
+#define SRA_8BIT(x) \
+{ \
+ register UINT8 f; \
+ if( (x)&1 ) \
+ f=FLAG_C; \
+ else \
+ f=0; \
+ (x)=(UINT8)(((char)(x))>>1); \
+ if( (x)==0 ) \
+ f|=FLAG_Z; \
+ m_F=f; \
}
-#define SWAP_8BIT(x) \
- (x)=(UINT8)(((x)>>4)|((x)<<4)); \
- if( (x)==0 ) \
- m_F=FLAG_Z; \
- else \
+#define SWAP_8BIT(x) \
+ (x)=(UINT8)(((x)>>4)|((x)<<4)); \
+ if( (x)==0 ) \
+ m_F=FLAG_Z; \
+ else \
m_F=0;
-#define SRL_8BIT(x) \
-{ \
- register UINT8 f; \
- if( (x)&1 ) \
- f=FLAG_C; \
- else \
- f=0; \
- (x)>>=1; \
- if( (x)==0 ) \
- f|=FLAG_Z; \
- m_F=f; \
+#define SRL_8BIT(x) \
+{ \
+ register UINT8 f; \
+ if( (x)&1 ) \
+ f=FLAG_C; \
+ else \
+ f=0; \
+ (x)>>=1; \
+ if( (x)==0 ) \
+ f|=FLAG_Z; \
+ m_F=f; \
}
-#define BIT_8BIT(n,x) \
- if( (x)&(1<<(n)) ) \
+#define BIT_8BIT(n,x) \
+ if( (x)&(1<<(n)) ) \
m_F=(UINT8)(FLAG_H|(m_F&FLAG_C)); \
- else \
+ else \
m_F=(UINT8)(FLAG_Z|FLAG_H|(m_F&FLAG_C));
-#define RES_8BIT(n,x) (x)&=~(1<<(n));
+#define RES_8BIT(n,x) (x)&=~(1<<(n));
-#define SET_8BIT(n,x) (x)|=(1<<(n));
+#define SET_8BIT(n,x) (x)|=(1<<(n));
case 0x00:
- /* RLC B */
+ /* RLC B */
- RLC_8BIT (m_B)
- break;
+ RLC_8BIT (m_B)
+ break;
case 0x01:
- /* RLC C */
+ /* RLC C */
- RLC_8BIT (m_C)
- break;
+ RLC_8BIT (m_C)
+ break;
case 0x02:
- /* RLC D */
+ /* RLC D */
- RLC_8BIT (m_D)
- break;
+ RLC_8BIT (m_D)
+ break;
case 0x03:
- /* RLC E */
+ /* RLC E */
- RLC_8BIT (m_E)
- break;
+ RLC_8BIT (m_E)
+ break;
case 0x04:
- /* RLC H */
+ /* RLC H */
- RLC_8BIT (m_H)
- break;
+ RLC_8BIT (m_H)
+ break;
case 0x05:
- /* RLC L */
+ /* RLC L */
- RLC_8BIT (m_L)
- break;
+ RLC_8BIT (m_L)
+ break;
case 0x06:
/* RLC (HL) */
{
@@ -143,40 +143,40 @@ case 0x06:
}
break;
case 0x07:
- /* RLC A */
+ /* RLC A */
- RLC_8BIT (m_A)
- break;
+ RLC_8BIT (m_A)
+ break;
case 0x08:
- /* RRC B */
+ /* RRC B */
- RRC_8BIT (m_B)
- break;
+ RRC_8BIT (m_B)
+ break;
case 0x09:
- /* RRC C */
+ /* RRC C */
- RRC_8BIT (m_C)
- break;
+ RRC_8BIT (m_C)
+ break;
case 0x0A:
- /* RRC D */
+ /* RRC D */
- RRC_8BIT (m_D)
- break;
+ RRC_8BIT (m_D)
+ break;
case 0x0B:
- /* RRC E */
+ /* RRC E */
- RRC_8BIT (m_E)
- break;
+ RRC_8BIT (m_E)
+ break;
case 0x0C:
- /* RRC H */
+ /* RRC H */
- RRC_8BIT (m_H)
- break;
+ RRC_8BIT (m_H)
+ break;
case 0x0D:
- /* RRC L */
+ /* RRC L */
- RRC_8BIT (m_L)
- break;
+ RRC_8BIT (m_L)
+ break;
case 0x0E:
/* RRC (HL) */
{
@@ -188,40 +188,40 @@ case 0x0E:
}
break;
case 0x0F:
- /* RRC A */
+ /* RRC A */
- RRC_8BIT (m_A)
- break;
+ RRC_8BIT (m_A)
+ break;
case 0x10:
- /* RL B */
+ /* RL B */
- RL_8BIT (m_B)
- break;
+ RL_8BIT (m_B)
+ break;
case 0x11:
- /* RL C */
+ /* RL C */
- RL_8BIT (m_C)
- break;
+ RL_8BIT (m_C)
+ break;
case 0x12:
- /* RL D */
+ /* RL D */
- RL_8BIT (m_D)
- break;
+ RL_8BIT (m_D)
+ break;
case 0x13:
- /* RL E */
+ /* RL E */
- RL_8BIT (m_E)
- break;
+ RL_8BIT (m_E)
+ break;
case 0x14:
- /* RL H */
+ /* RL H */
- RL_8BIT (m_H)
- break;
+ RL_8BIT (m_H)
+ break;
case 0x15:
- /* RL L */
+ /* RL L */
- RL_8BIT (m_L)
- break;
+ RL_8BIT (m_L)
+ break;
case 0x16:
/* RL (HL) */
{
@@ -233,40 +233,40 @@ case 0x16:
}
break;
case 0x17:
- /* RL A */
+ /* RL A */
- RL_8BIT (m_A)
- break;
+ RL_8BIT (m_A)
+ break;
case 0x18:
- /* RR B */
+ /* RR B */
- RR_8BIT (m_B)
- break;
+ RR_8BIT (m_B)
+ break;
case 0x19:
- /* RR C */
+ /* RR C */
- RR_8BIT (m_C)
- break;
+ RR_8BIT (m_C)
+ break;
case 0x1A:
- /* RR D */
+ /* RR D */
- RR_8BIT (m_D)
- break;
+ RR_8BIT (m_D)
+ break;
case 0x1B:
- /* RR E */
+ /* RR E */
- RR_8BIT (m_E)
- break;
+ RR_8BIT (m_E)
+ break;
case 0x1C:
- /* RR H */
+ /* RR H */
- RR_8BIT (m_H)
- break;
+ RR_8BIT (m_H)
+ break;
case 0x1D:
- /* RR L */
+ /* RR L */
- RR_8BIT (m_L)
- break;
+ RR_8BIT (m_L)
+ break;
case 0x1E:
/* RR (HL) */
{
@@ -278,40 +278,40 @@ case 0x1E:
}
break;
case 0x1F:
- /* RR A */
+ /* RR A */
- RR_8BIT (m_A)
- break;
+ RR_8BIT (m_A)
+ break;
case 0x20:
- /* SLA B */
+ /* SLA B */
- SLA_8BIT (m_B)
- break;
+ SLA_8BIT (m_B)
+ break;
case 0x21:
- /* SLA C */
+ /* SLA C */
- SLA_8BIT (m_C)
- break;
+ SLA_8BIT (m_C)
+ break;
case 0x22:
- /* SLA D */
+ /* SLA D */
- SLA_8BIT (m_D)
- break;
+ SLA_8BIT (m_D)
+ break;
case 0x23:
- /* SLA E */
+ /* SLA E */
- SLA_8BIT (m_E)
- break;
+ SLA_8BIT (m_E)
+ break;
case 0x24:
- /* SLA H */
+ /* SLA H */
- SLA_8BIT (m_H)
- break;
+ SLA_8BIT (m_H)
+ break;
case 0x25:
- /* SLA L */
+ /* SLA L */
- SLA_8BIT (m_L)
- break;
+ SLA_8BIT (m_L)
+ break;
case 0x26:
/* SLA (HL) */
{
@@ -323,40 +323,40 @@ case 0x26:
}
break;
case 0x27:
- /* SLA A */
+ /* SLA A */
- SLA_8BIT (m_A)
- break;
+ SLA_8BIT (m_A)
+ break;
case 0x28:
- /* SRA B */
+ /* SRA B */
- SRA_8BIT (m_B)
- break;
+ SRA_8BIT (m_B)
+ break;
case 0x29:
- /* SRA C */
+ /* SRA C */
- SRA_8BIT (m_C)
- break;
+ SRA_8BIT (m_C)
+ break;
case 0x2A:
- /* SRA D */
+ /* SRA D */
- SRA_8BIT (m_D)
- break;
+ SRA_8BIT (m_D)
+ break;
case 0x2B:
- /* SRA E */
+ /* SRA E */
- SRA_8BIT (m_E)
- break;
+ SRA_8BIT (m_E)
+ break;
case 0x2C:
- /* SRA H */
+ /* SRA H */
- SRA_8BIT (m_H)
- break;
+ SRA_8BIT (m_H)
+ break;
case 0x2D:
- /* SRA L */
+ /* SRA L */
- SRA_8BIT (m_L)
- break;
+ SRA_8BIT (m_L)
+ break;
case 0x2E:
/* SRA (HL) */
{
@@ -368,40 +368,40 @@ case 0x2E:
}
break;
case 0x2F:
- /* SRA A */
+ /* SRA A */
- SRA_8BIT (m_A)
- break;
+ SRA_8BIT (m_A)
+ break;
case 0x30:
- /* SWAP B */
+ /* SWAP B */
- SWAP_8BIT (m_B)
- break;
+ SWAP_8BIT (m_B)
+ break;
case 0x31:
- /* SWAP C */
+ /* SWAP C */
- SWAP_8BIT (m_C)
- break;
+ SWAP_8BIT (m_C)
+ break;
case 0x32:
- /* SWAP D */
+ /* SWAP D */
- SWAP_8BIT (m_D)
- break;
+ SWAP_8BIT (m_D)
+ break;
case 0x33:
- /* SWAP E */
+ /* SWAP E */
- SWAP_8BIT (m_E)
- break;
+ SWAP_8BIT (m_E)
+ break;
case 0x34:
- /* SWAP H */
+ /* SWAP H */
- SWAP_8BIT (m_H)
- break;
+ SWAP_8BIT (m_H)
+ break;
case 0x35:
- /* SWAP L */
+ /* SWAP L */
- SWAP_8BIT (m_L)
- break;
+ SWAP_8BIT (m_L)
+ break;
case 0x36:
/* SWAP (HL) */
{
@@ -413,40 +413,40 @@ case 0x36:
}
break;
case 0x37:
- /* SWAP A */
+ /* SWAP A */
- SWAP_8BIT (m_A)
- break;
+ SWAP_8BIT (m_A)
+ break;
case 0x38:
- /* SRL B */
+ /* SRL B */
- SRL_8BIT (m_B)
- break;
+ SRL_8BIT (m_B)
+ break;
case 0x39:
- /* SRL C */
+ /* SRL C */
- SRL_8BIT (m_C)
- break;
+ SRL_8BIT (m_C)
+ break;
case 0x3A:
- /* SRL D */
+ /* SRL D */
- SRL_8BIT (m_D)
- break;
+ SRL_8BIT (m_D)
+ break;
case 0x3B:
- /* SRL E */
+ /* SRL E */
- SRL_8BIT (m_E)
- break;
+ SRL_8BIT (m_E)
+ break;
case 0x3C:
- /* SRL H */
+ /* SRL H */
- SRL_8BIT (m_H)
- break;
+ SRL_8BIT (m_H)
+ break;
case 0x3D:
- /* SRL L */
+ /* SRL L */
- SRL_8BIT (m_L)
- break;
+ SRL_8BIT (m_L)
+ break;
case 0x3E:
/* SRL (HL) */
{
@@ -458,40 +458,40 @@ case 0x3E:
}
break;
case 0x3F:
- /* SRL A */
+ /* SRL A */
- SRL_8BIT (m_A)
- break;
+ SRL_8BIT (m_A)
+ break;
case 0x40:
- /* BIT 0,B */
+ /* BIT 0,B */
- BIT_8BIT (0, m_B)
- break;
+ BIT_8BIT (0, m_B)
+ break;
case 0x41:
- /* BIT 0,C */
+ /* BIT 0,C */
- BIT_8BIT (0, m_C)
- break;
+ BIT_8BIT (0, m_C)
+ break;
case 0x42:
- /* BIT 0,D */
+ /* BIT 0,D */
- BIT_8BIT (0, m_D)
- break;
+ BIT_8BIT (0, m_D)
+ break;
case 0x43:
- /* BIT 0,E */
+ /* BIT 0,E */
- BIT_8BIT (0, m_E)
- break;
+ BIT_8BIT (0, m_E)
+ break;
case 0x44:
- /* BIT 0,H */
+ /* BIT 0,H */
- BIT_8BIT (0, m_H)
- break;
+ BIT_8BIT (0, m_H)
+ break;
case 0x45:
- /* BIT 0,L */
+ /* BIT 0,L */
- BIT_8BIT (0, m_L)
- break;
+ BIT_8BIT (0, m_L)
+ break;
case 0x46:
/* BIT 0,(HL) */
{
@@ -502,40 +502,40 @@ case 0x46:
}
break;
case 0x47:
- /* BIT 0,A */
+ /* BIT 0,A */
- BIT_8BIT (0, m_A)
- break;
+ BIT_8BIT (0, m_A)
+ break;
case 0x48:
- /* BIT 1,B */
+ /* BIT 1,B */
- BIT_8BIT (1, m_B)
- break;
+ BIT_8BIT (1, m_B)
+ break;
case 0x49:
- /* BIT 1,C */
+ /* BIT 1,C */
- BIT_8BIT (1, m_C)
- break;
+ BIT_8BIT (1, m_C)
+ break;
case 0x4A:
- /* BIT 1,D */
+ /* BIT 1,D */
- BIT_8BIT (1, m_D)
- break;
+ BIT_8BIT (1, m_D)
+ break;
case 0x4B:
- /* BIT 1,E */
+ /* BIT 1,E */
- BIT_8BIT (1, m_E)
- break;
+ BIT_8BIT (1, m_E)
+ break;
case 0x4C:
- /* BIT 1,H */
+ /* BIT 1,H */
- BIT_8BIT (1, m_H)
- break;
+ BIT_8BIT (1, m_H)
+ break;
case 0x4D:
- /* BIT 1,L */
+ /* BIT 1,L */
- BIT_8BIT (1, m_L)
- break;
+ BIT_8BIT (1, m_L)
+ break;
case 0x4E:
/* BIT 1,(HL) */
{
@@ -546,40 +546,40 @@ case 0x4E:
}
break;
case 0x4F:
- /* BIT 1,A */
+ /* BIT 1,A */
- BIT_8BIT (1, m_A)
- break;
+ BIT_8BIT (1, m_A)
+ break;
case 0x50:
- /* BIT 2,B */
+ /* BIT 2,B */
- BIT_8BIT (2, m_B)
- break;
+ BIT_8BIT (2, m_B)
+ break;
case 0x51:
- /* BIT 2,C */
+ /* BIT 2,C */
- BIT_8BIT (2, m_C)
- break;
+ BIT_8BIT (2, m_C)
+ break;
case 0x52:
- /* BIT 2,D */
+ /* BIT 2,D */
- BIT_8BIT (2, m_D)
- break;
+ BIT_8BIT (2, m_D)
+ break;
case 0x53:
- /* BIT 2,E */
+ /* BIT 2,E */
- BIT_8BIT (2, m_E)
- break;
+ BIT_8BIT (2, m_E)
+ break;
case 0x54:
- /* BIT 2,H */
+ /* BIT 2,H */
- BIT_8BIT (2, m_H)
- break;
+ BIT_8BIT (2, m_H)
+ break;
case 0x55:
- /* BIT 2,L */
+ /* BIT 2,L */
- BIT_8BIT (2, m_L)
- break;
+ BIT_8BIT (2, m_L)
+ break;
case 0x56:
/* BIT 2,(HL) */
{
@@ -590,40 +590,40 @@ case 0x56:
}
break;
case 0x57:
- /* BIT 2,A */
+ /* BIT 2,A */
- BIT_8BIT (2, m_A)
- break;
+ BIT_8BIT (2, m_A)
+ break;
case 0x58:
- /* BIT 3,B */
+ /* BIT 3,B */
- BIT_8BIT (3, m_B)
- break;
+ BIT_8BIT (3, m_B)
+ break;
case 0x59:
- /* BIT 3,C */
+ /* BIT 3,C */
- BIT_8BIT (3, m_C)
- break;
+ BIT_8BIT (3, m_C)
+ break;
case 0x5A:
- /* BIT 3,D */
+ /* BIT 3,D */
- BIT_8BIT (3, m_D)
- break;
+ BIT_8BIT (3, m_D)
+ break;
case 0x5B:
- /* BIT 3,E */
+ /* BIT 3,E */
- BIT_8BIT (3, m_E)
- break;
+ BIT_8BIT (3, m_E)
+ break;
case 0x5C:
- /* BIT 3,H */
+ /* BIT 3,H */
- BIT_8BIT (3, m_H)
- break;
+ BIT_8BIT (3, m_H)
+ break;
case 0x5D:
- /* BIT 3,L */
+ /* BIT 3,L */
- BIT_8BIT (3, m_L)
- break;
+ BIT_8BIT (3, m_L)
+ break;
case 0x5E:
/* BIT 3,(HL) */
{
@@ -634,40 +634,40 @@ case 0x5E:
}
break;
case 0x5F:
- /* BIT 3,A */
+ /* BIT 3,A */
- BIT_8BIT (3, m_A)
- break;
+ BIT_8BIT (3, m_A)
+ break;
case 0x60:
- /* BIT 4,B */
+ /* BIT 4,B */
- BIT_8BIT (4, m_B)
- break;
+ BIT_8BIT (4, m_B)
+ break;
case 0x61:
- /* BIT 4,C */
+ /* BIT 4,C */
- BIT_8BIT (4, m_C)
- break;
+ BIT_8BIT (4, m_C)
+ break;
case 0x62:
- /* BIT 4,D */
+ /* BIT 4,D */
- BIT_8BIT (4, m_D)
- break;
+ BIT_8BIT (4, m_D)
+ break;
case 0x63:
- /* BIT 4,E */
+ /* BIT 4,E */
- BIT_8BIT (4, m_E)
- break;
+ BIT_8BIT (4, m_E)
+ break;
case 0x64:
- /* BIT 4,H */
+ /* BIT 4,H */
- BIT_8BIT (4, m_H)
- break;
+ BIT_8BIT (4, m_H)
+ break;
case 0x65:
- /* BIT 4,L */
+ /* BIT 4,L */
- BIT_8BIT (4, m_L)
- break;
+ BIT_8BIT (4, m_L)
+ break;
case 0x66:
/* BIT 4,(HL) */
{
@@ -678,40 +678,40 @@ case 0x66:
}
break;
case 0x67:
- /* BIT 4,A */
+ /* BIT 4,A */
- BIT_8BIT (4, m_A)
- break;
+ BIT_8BIT (4, m_A)
+ break;
case 0x68:
- /* BIT 5,B */
+ /* BIT 5,B */
- BIT_8BIT (5, m_B)
- break;
+ BIT_8BIT (5, m_B)
+ break;
case 0x69:
- /* BIT 5,C */
+ /* BIT 5,C */
- BIT_8BIT (5, m_C)
- break;
+ BIT_8BIT (5, m_C)
+ break;
case 0x6A:
- /* BIT 5,D */
+ /* BIT 5,D */
- BIT_8BIT (5, m_D)
- break;
+ BIT_8BIT (5, m_D)
+ break;
case 0x6B:
- /* BIT 5,E */
+ /* BIT 5,E */
- BIT_8BIT (5, m_E)
- break;
+ BIT_8BIT (5, m_E)
+ break;
case 0x6C:
- /* BIT 5,H */
+ /* BIT 5,H */
- BIT_8BIT (5, m_H)
- break;
+ BIT_8BIT (5, m_H)
+ break;
case 0x6D:
- /* BIT 5,L */
+ /* BIT 5,L */
- BIT_8BIT (5, m_L)
- break;
+ BIT_8BIT (5, m_L)
+ break;
case 0x6E:
/* BIT 5,(HL) */
{
@@ -722,40 +722,40 @@ case 0x6E:
}
break;
case 0x6F:
- /* BIT 5,A */
+ /* BIT 5,A */
- BIT_8BIT (5, m_A)
- break;
+ BIT_8BIT (5, m_A)
+ break;
case 0x70:
- /* BIT 6,B */
+ /* BIT 6,B */
- BIT_8BIT (6, m_B)
- break;
+ BIT_8BIT (6, m_B)
+ break;
case 0x71:
- /* BIT 6,C */
+ /* BIT 6,C */
- BIT_8BIT (6, m_C)
- break;
+ BIT_8BIT (6, m_C)
+ break;
case 0x72:
- /* BIT 6,D */
+ /* BIT 6,D */
- BIT_8BIT (6, m_D)
- break;
+ BIT_8BIT (6, m_D)
+ break;
case 0x73:
- /* BIT 6,E */
+ /* BIT 6,E */
- BIT_8BIT (6, m_E)
- break;
+ BIT_8BIT (6, m_E)
+ break;
case 0x74:
- /* BIT 6,H */
+ /* BIT 6,H */
- BIT_8BIT (6, m_H)
- break;
+ BIT_8BIT (6, m_H)
+ break;
case 0x75:
- /* BIT 6,L */
+ /* BIT 6,L */
- BIT_8BIT (6, m_L)
- break;
+ BIT_8BIT (6, m_L)
+ break;
case 0x76:
/* BIT 6,(HL) */
{
@@ -766,40 +766,40 @@ case 0x76:
}
break;
case 0x77:
- /* BIT 6,A */
+ /* BIT 6,A */
- BIT_8BIT (6, m_A)
- break;
+ BIT_8BIT (6, m_A)
+ break;
case 0x78:
- /* BIT 7,B */
+ /* BIT 7,B */
- BIT_8BIT (7, m_B)
- break;
+ BIT_8BIT (7, m_B)
+ break;
case 0x79:
- /* BIT 7,C */
+ /* BIT 7,C */
- BIT_8BIT (7, m_C)
- break;
+ BIT_8BIT (7, m_C)
+ break;
case 0x7A:
- /* BIT 7,D */
+ /* BIT 7,D */
- BIT_8BIT (7, m_D)
- break;
+ BIT_8BIT (7, m_D)
+ break;
case 0x7B:
- /* BIT 7,E */
+ /* BIT 7,E */
- BIT_8BIT (7, m_E)
- break;
+ BIT_8BIT (7, m_E)
+ break;
case 0x7C:
- /* BIT 7,H */
+ /* BIT 7,H */
- BIT_8BIT (7, m_H)
- break;
+ BIT_8BIT (7, m_H)
+ break;
case 0x7D:
- /* BIT 7,L */
+ /* BIT 7,L */
- BIT_8BIT (7, m_L)
- break;
+ BIT_8BIT (7, m_L)
+ break;
case 0x7E:
/* BIT 7,(HL) */
{
@@ -810,40 +810,40 @@ case 0x7E:
}
break;
case 0x7F:
- /* BIT 7,A */
+ /* BIT 7,A */
- BIT_8BIT (7, m_A)
- break;
+ BIT_8BIT (7, m_A)
+ break;
case 0x80:
- /* RES 0,B */
+ /* RES 0,B */
- RES_8BIT (0, m_B)
- break;
+ RES_8BIT (0, m_B)
+ break;
case 0x81:
- /* RES 0,C */
+ /* RES 0,C */
- RES_8BIT (0, m_C)
- break;
+ RES_8BIT (0, m_C)
+ break;
case 0x82:
- /* RES 0,D */
+ /* RES 0,D */
- RES_8BIT (0, m_D)
- break;
+ RES_8BIT (0, m_D)
+ break;
case 0x83:
- /* RES 0,E */
+ /* RES 0,E */
- RES_8BIT (0, m_E)
- break;
+ RES_8BIT (0, m_E)
+ break;
case 0x84:
- /* RES 0,H */
+ /* RES 0,H */
- RES_8BIT (0, m_H)
- break;
+ RES_8BIT (0, m_H)
+ break;
case 0x85:
- /* RES 0,L */
+ /* RES 0,L */
- RES_8BIT (0, m_L)
- break;
+ RES_8BIT (0, m_L)
+ break;
case 0x86:
/* RES 0,(HL) */
{
@@ -855,40 +855,40 @@ case 0x86:
}
break;
case 0x87:
- /* RES 0,A */
+ /* RES 0,A */
- RES_8BIT (0, m_A)
- break;
+ RES_8BIT (0, m_A)
+ break;
case 0x88:
- /* RES 1,B */
+ /* RES 1,B */
- RES_8BIT (1, m_B)
- break;
+ RES_8BIT (1, m_B)
+ break;
case 0x89:
- /* RES 1,C */
+ /* RES 1,C */
- RES_8BIT (1, m_C)
- break;
+ RES_8BIT (1, m_C)
+ break;
case 0x8A:
- /* RES 1,D */
+ /* RES 1,D */
- RES_8BIT (1, m_D)
- break;
+ RES_8BIT (1, m_D)
+ break;
case 0x8B:
- /* RES 1,E */
+ /* RES 1,E */
- RES_8BIT (1, m_E)
- break;
+ RES_8BIT (1, m_E)
+ break;
case 0x8C:
- /* RES 1,H */
+ /* RES 1,H */
- RES_8BIT (1, m_H)
- break;
+ RES_8BIT (1, m_H)
+ break;
case 0x8D:
- /* RES 1,L */
+ /* RES 1,L */
- RES_8BIT (1, m_L)
- break;
+ RES_8BIT (1, m_L)
+ break;
case 0x8E:
/* RES 1,(HL) */
{
@@ -900,40 +900,40 @@ case 0x8E:
}
break;
case 0x8F:
- /* RES 1,A */
+ /* RES 1,A */
- RES_8BIT (1, m_A)
- break;
+ RES_8BIT (1, m_A)
+ break;
case 0x90:
- /* RES 2,B */
+ /* RES 2,B */
- RES_8BIT (2, m_B)
- break;
+ RES_8BIT (2, m_B)
+ break;
case 0x91:
- /* RES 2,C */
+ /* RES 2,C */
- RES_8BIT (2, m_C)
- break;
+ RES_8BIT (2, m_C)
+ break;
case 0x92:
- /* RES 2,D */
+ /* RES 2,D */
- RES_8BIT (2, m_D)
- break;
+ RES_8BIT (2, m_D)
+ break;
case 0x93:
- /* RES 2,E */
+ /* RES 2,E */
- RES_8BIT (2, m_E)
- break;
+ RES_8BIT (2, m_E)
+ break;
case 0x94:
- /* RES 2,H */
+ /* RES 2,H */
- RES_8BIT (2, m_H)
- break;
+ RES_8BIT (2, m_H)
+ break;
case 0x95:
- /* RES 2,L */
+ /* RES 2,L */
- RES_8BIT (2, m_L)
- break;
+ RES_8BIT (2, m_L)
+ break;
case 0x96:
/* RES 2,(HL) */
{
@@ -945,40 +945,40 @@ case 0x96:
}
break;
case 0x97:
- /* RES 2,A */
+ /* RES 2,A */
- RES_8BIT (2, m_A)
- break;
+ RES_8BIT (2, m_A)
+ break;
case 0x98:
- /* RES 3,B */
+ /* RES 3,B */
- RES_8BIT (3, m_B)
- break;
+ RES_8BIT (3, m_B)
+ break;
case 0x99:
- /* RES 3,C */
+ /* RES 3,C */
- RES_8BIT (3, m_C)
- break;
+ RES_8BIT (3, m_C)
+ break;
case 0x9A:
- /* RES 3,D */
+ /* RES 3,D */
- RES_8BIT (3, m_D)
- break;
+ RES_8BIT (3, m_D)
+ break;
case 0x9B:
- /* RES 3,E */
+ /* RES 3,E */
- RES_8BIT (3, m_E)
- break;
+ RES_8BIT (3, m_E)
+ break;
case 0x9C:
- /* RES 3,H */
+ /* RES 3,H */
- RES_8BIT (3, m_H)
- break;
+ RES_8BIT (3, m_H)
+ break;
case 0x9D:
- /* RES 3,L */
+ /* RES 3,L */
- RES_8BIT (3, m_L)
- break;
+ RES_8BIT (3, m_L)
+ break;
case 0x9E:
/* RES 3,(HL) */
{
@@ -990,40 +990,40 @@ case 0x9E:
}
break;
case 0x9F:
- /* RES 3,A */
+ /* RES 3,A */
- RES_8BIT (3, m_A)
- break;
+ RES_8BIT (3, m_A)
+ break;
case 0xA0:
- /* RES 4,B */
+ /* RES 4,B */
- RES_8BIT (4, m_B)
- break;
+ RES_8BIT (4, m_B)
+ break;
case 0xA1:
- /* RES 4,C */
+ /* RES 4,C */
- RES_8BIT (4, m_C)
- break;
+ RES_8BIT (4, m_C)
+ break;
case 0xA2:
- /* RES 4,D */
+ /* RES 4,D */
- RES_8BIT (4, m_D)
- break;
+ RES_8BIT (4, m_D)
+ break;
case 0xA3:
- /* RES 4,E */
+ /* RES 4,E */
- RES_8BIT (4, m_E)
- break;
+ RES_8BIT (4, m_E)
+ break;
case 0xA4:
- /* RES 4,H */
+ /* RES 4,H */
- RES_8BIT (4, m_H)
- break;
+ RES_8BIT (4, m_H)
+ break;
case 0xA5:
- /* RES 4,L */
+ /* RES 4,L */
- RES_8BIT (4, m_L)
- break;
+ RES_8BIT (4, m_L)
+ break;
case 0xA6:
/* RES 4,(HL) */
{
@@ -1035,40 +1035,40 @@ case 0xA6:
}
break;
case 0xA7:
- /* RES 4,A */
+ /* RES 4,A */
- RES_8BIT (4, m_A)
- break;
+ RES_8BIT (4, m_A)
+ break;
case 0xA8:
- /* RES 5,B */
+ /* RES 5,B */
- RES_8BIT (5, m_B)
- break;
+ RES_8BIT (5, m_B)
+ break;
case 0xA9:
- /* RES 5,C */
+ /* RES 5,C */
- RES_8BIT (5, m_C)
- break;
+ RES_8BIT (5, m_C)
+ break;
case 0xAA:
- /* RES 5,D */
+ /* RES 5,D */
- RES_8BIT (5, m_D)
- break;
+ RES_8BIT (5, m_D)
+ break;
case 0xAB:
- /* RES 5,E */
+ /* RES 5,E */
- RES_8BIT (5, m_E)
- break;
+ RES_8BIT (5, m_E)
+ break;
case 0xAC:
- /* RES 5,H */
+ /* RES 5,H */
- RES_8BIT (5, m_H)
- break;
+ RES_8BIT (5, m_H)
+ break;
case 0xAD:
- /* RES 5,L */
+ /* RES 5,L */
- RES_8BIT (5, m_L)
- break;
+ RES_8BIT (5, m_L)
+ break;
case 0xAE:
/* RES 5,(HL) */
{
@@ -1080,40 +1080,40 @@ case 0xAE:
}
break;
case 0xAF:
- /* RES 5,A */
+ /* RES 5,A */
- RES_8BIT (5, m_A)
- break;
+ RES_8BIT (5, m_A)
+ break;
case 0xB0:
- /* RES 6,B */
+ /* RES 6,B */
- RES_8BIT (6, m_B)
- break;
+ RES_8BIT (6, m_B)
+ break;
case 0xB1:
- /* RES 6,C */
+ /* RES 6,C */
- RES_8BIT (6, m_C)
- break;
+ RES_8BIT (6, m_C)
+ break;
case 0xB2:
- /* RES 6,D */
+ /* RES 6,D */
- RES_8BIT (6, m_D)
- break;
+ RES_8BIT (6, m_D)
+ break;
case 0xB3:
- /* RES 6,E */
+ /* RES 6,E */
- RES_8BIT (6, m_E)
- break;
+ RES_8BIT (6, m_E)
+ break;
case 0xB4:
- /* RES 6,H */
+ /* RES 6,H */
- RES_8BIT (6, m_H)
- break;
+ RES_8BIT (6, m_H)
+ break;
case 0xB5:
- /* RES 6,L */
+ /* RES 6,L */
- RES_8BIT (6, m_L)
- break;
+ RES_8BIT (6, m_L)
+ break;
case 0xB6:
/* RES 6,(HL) */
{
@@ -1125,40 +1125,40 @@ case 0xB6:
}
break;
case 0xB7:
- /* RES 6,A */
+ /* RES 6,A */
- RES_8BIT (6, m_A)
- break;
+ RES_8BIT (6, m_A)
+ break;
case 0xB8:
- /* RES 7,B */
+ /* RES 7,B */
- RES_8BIT (7, m_B)
- break;
+ RES_8BIT (7, m_B)
+ break;
case 0xB9:
- /* RES 7,C */
+ /* RES 7,C */
- RES_8BIT (7, m_C)
- break;
+ RES_8BIT (7, m_C)
+ break;
case 0xBA:
- /* RES 7,D */
+ /* RES 7,D */
- RES_8BIT (7, m_D)
- break;
+ RES_8BIT (7, m_D)
+ break;
case 0xBB:
- /* RES 7,E */
+ /* RES 7,E */
- RES_8BIT (7, m_E)
- break;
+ RES_8BIT (7, m_E)
+ break;
case 0xBC:
- /* RES 7,H */
+ /* RES 7,H */
- RES_8BIT (7, m_H)
- break;
+ RES_8BIT (7, m_H)
+ break;
case 0xBD:
- /* RES 7,L */
+ /* RES 7,L */
- RES_8BIT (7, m_L)
- break;
+ RES_8BIT (7, m_L)
+ break;
case 0xBE:
/* RES 7,(HL) */
{
@@ -1170,40 +1170,40 @@ case 0xBE:
}
break;
case 0xBF:
- /* RES 7,A */
+ /* RES 7,A */
- RES_8BIT (7, m_A)
- break;
+ RES_8BIT (7, m_A)
+ break;
case 0xC0:
- /* SET 0,B */
+ /* SET 0,B */
- SET_8BIT (0, m_B)
- break;
+ SET_8BIT (0, m_B)
+ break;
case 0xC1:
- /* SET 0,C */
+ /* SET 0,C */
- SET_8BIT (0, m_C)
- break;
+ SET_8BIT (0, m_C)
+ break;
case 0xC2:
- /* SET 0,D */
+ /* SET 0,D */
- SET_8BIT (0, m_D)
- break;
+ SET_8BIT (0, m_D)
+ break;
case 0xC3:
- /* SET 0,E */
+ /* SET 0,E */
- SET_8BIT (0, m_E)
- break;
+ SET_8BIT (0, m_E)
+ break;
case 0xC4:
- /* SET 0,H */
+ /* SET 0,H */
- SET_8BIT (0, m_H)
- break;
+ SET_8BIT (0, m_H)
+ break;
case 0xC5:
- /* SET 0,L */
+ /* SET 0,L */
- SET_8BIT (0, m_L)
- break;
+ SET_8BIT (0, m_L)
+ break;
case 0xC6:
/* SET 0,(HL) */
{
@@ -1215,40 +1215,40 @@ case 0xC6:
}
break;
case 0xC7:
- /* SET 0,A */
+ /* SET 0,A */
- SET_8BIT (0, m_A)
- break;
+ SET_8BIT (0, m_A)
+ break;
case 0xC8:
- /* SET 1,B */
+ /* SET 1,B */
- SET_8BIT (1, m_B)
- break;
+ SET_8BIT (1, m_B)
+ break;
case 0xC9:
- /* SET 1,C */
+ /* SET 1,C */
- SET_8BIT (1, m_C)
- break;
+ SET_8BIT (1, m_C)
+ break;
case 0xCA:
- /* SET 1,D */
+ /* SET 1,D */
- SET_8BIT (1, m_D)
- break;
+ SET_8BIT (1, m_D)
+ break;
case 0xCB:
- /* SET 1,E */
+ /* SET 1,E */
- SET_8BIT (1, m_E)
- break;
+ SET_8BIT (1, m_E)
+ break;
case 0xCC:
- /* SET 1,H */
+ /* SET 1,H */
- SET_8BIT (1, m_H)
- break;
+ SET_8BIT (1, m_H)
+ break;
case 0xCD:
- /* SET 1,L */
+ /* SET 1,L */
- SET_8BIT (1, m_L)
- break;
+ SET_8BIT (1, m_L)
+ break;
case 0xCE:
/* SET 1,(HL) */
{
@@ -1260,40 +1260,40 @@ case 0xCE:
}
break;
case 0xCF:
- /* SET 1,A */
+ /* SET 1,A */
- SET_8BIT (1, m_A)
- break;
+ SET_8BIT (1, m_A)
+ break;
case 0xD0:
- /* SET 2,B */
+ /* SET 2,B */
- SET_8BIT (2, m_B)
- break;
+ SET_8BIT (2, m_B)
+ break;
case 0xD1:
- /* SET 2,C */
+ /* SET 2,C */
- SET_8BIT (2, m_C)
- break;
+ SET_8BIT (2, m_C)
+ break;
case 0xD2:
- /* SET 2,D */
+ /* SET 2,D */
- SET_8BIT (2, m_D)
- break;
+ SET_8BIT (2, m_D)
+ break;
case 0xD3:
- /* SET 2,E */
+ /* SET 2,E */
- SET_8BIT (2, m_E)
- break;
+ SET_8BIT (2, m_E)
+ break;
case 0xD4:
- /* SET 2,H */
+ /* SET 2,H */
- SET_8BIT (2, m_H)
- break;
+ SET_8BIT (2, m_H)
+ break;
case 0xD5:
- /* SET 2,L */
+ /* SET 2,L */
- SET_8BIT (2, m_L)
- break;
+ SET_8BIT (2, m_L)
+ break;
case 0xD6:
/* SET 2,(HL) */
{
@@ -1305,40 +1305,40 @@ case 0xD6:
}
break;
case 0xD7:
- /* SET 2,A */
+ /* SET 2,A */
- SET_8BIT (2, m_A)
- break;
+ SET_8BIT (2, m_A)
+ break;
case 0xD8:
- /* SET 3,B */
+ /* SET 3,B */
- SET_8BIT (3, m_B)
- break;
+ SET_8BIT (3, m_B)
+ break;
case 0xD9:
- /* SET 3,C */
+ /* SET 3,C */
- SET_8BIT (3, m_C)
- break;
+ SET_8BIT (3, m_C)
+ break;
case 0xDA:
- /* SET 3,D */
+ /* SET 3,D */
- SET_8BIT (3, m_D)
- break;
+ SET_8BIT (3, m_D)
+ break;
case 0xDB:
- /* SET 3,E */
+ /* SET 3,E */
- SET_8BIT (3, m_E)
- break;
+ SET_8BIT (3, m_E)
+ break;
case 0xDC:
- /* SET 3,H */
+ /* SET 3,H */
- SET_8BIT (3, m_H)
- break;
+ SET_8BIT (3, m_H)
+ break;
case 0xDD:
- /* SET 3,L */
+ /* SET 3,L */
- SET_8BIT (3, m_L)
- break;
+ SET_8BIT (3, m_L)
+ break;
case 0xDE:
/* SET 3,(HL) */
{
@@ -1350,40 +1350,40 @@ case 0xDE:
}
break;
case 0xDF:
- /* SET 3,A */
+ /* SET 3,A */
- SET_8BIT (3, m_A)
- break;
+ SET_8BIT (3, m_A)
+ break;
case 0xE0:
- /* SET 4,B */
+ /* SET 4,B */
- SET_8BIT (4, m_B)
- break;
+ SET_8BIT (4, m_B)
+ break;
case 0xE1:
- /* SET 4,C */
+ /* SET 4,C */
- SET_8BIT (4, m_C)
- break;
+ SET_8BIT (4, m_C)
+ break;
case 0xE2:
- /* SET 4,D */
+ /* SET 4,D */
- SET_8BIT (4, m_D)
- break;
+ SET_8BIT (4, m_D)
+ break;
case 0xE3:
- /* SET 4,E */
+ /* SET 4,E */
- SET_8BIT (4, m_E)
- break;
+ SET_8BIT (4, m_E)
+ break;
case 0xE4:
- /* SET 4,H */
+ /* SET 4,H */
- SET_8BIT (4, m_H)
- break;
+ SET_8BIT (4, m_H)
+ break;
case 0xE5:
- /* SET 4,L */
+ /* SET 4,L */
- SET_8BIT (4, m_L)
- break;
+ SET_8BIT (4, m_L)
+ break;
case 0xE6:
/* SET 4,(HL) */
{
@@ -1395,40 +1395,40 @@ case 0xE6:
}
break;
case 0xE7:
- /* SET 4,A */
+ /* SET 4,A */
- SET_8BIT (4, m_A)
- break;
+ SET_8BIT (4, m_A)
+ break;
case 0xE8:
- /* SET 5,B */
+ /* SET 5,B */
- SET_8BIT (5, m_B)
- break;
+ SET_8BIT (5, m_B)
+ break;
case 0xE9:
- /* SET 5,C */
+ /* SET 5,C */
- SET_8BIT (5, m_C)
- break;
+ SET_8BIT (5, m_C)
+ break;
case 0xEA:
- /* SET 5,D */
+ /* SET 5,D */
- SET_8BIT (5, m_D)
- break;
+ SET_8BIT (5, m_D)
+ break;
case 0xEB:
- /* SET 5,E */
+ /* SET 5,E */
- SET_8BIT (5, m_E)
- break;
+ SET_8BIT (5, m_E)
+ break;
case 0xEC:
- /* SET 5,H */
+ /* SET 5,H */
- SET_8BIT (5, m_H)
- break;
+ SET_8BIT (5, m_H)
+ break;
case 0xED:
- /* SET 5,L */
+ /* SET 5,L */
- SET_8BIT (5, m_L)
- break;
+ SET_8BIT (5, m_L)
+ break;
case 0xEE:
/* SET 5,(HL) */
{
@@ -1440,40 +1440,40 @@ case 0xEE:
}
break;
case 0xEF:
- /* SET 5,A */
+ /* SET 5,A */
- SET_8BIT (5, m_A)
- break;
+ SET_8BIT (5, m_A)
+ break;
case 0xF0:
- /* SET 6,B */
+ /* SET 6,B */
- SET_8BIT (6, m_B)
- break;
+ SET_8BIT (6, m_B)
+ break;
case 0xF1:
- /* SET 6,C */
+ /* SET 6,C */
- SET_8BIT (6, m_C)
- break;
+ SET_8BIT (6, m_C)
+ break;
case 0xF2:
- /* SET 6,D */
+ /* SET 6,D */
- SET_8BIT (6, m_D)
- break;
+ SET_8BIT (6, m_D)
+ break;
case 0xF3:
- /* SET 6,E */
+ /* SET 6,E */
- SET_8BIT (6, m_E)
- break;
+ SET_8BIT (6, m_E)
+ break;
case 0xF4:
- /* SET 6,H */
+ /* SET 6,H */
- SET_8BIT (6, m_H)
- break;
+ SET_8BIT (6, m_H)
+ break;
case 0xF5:
- /* SET 6,L */
+ /* SET 6,L */
- SET_8BIT (6, m_L)
- break;
+ SET_8BIT (6, m_L)
+ break;
case 0xF6:
/* SET 6,(HL) */
{
@@ -1485,40 +1485,40 @@ case 0xF6:
}
break;
case 0xF7:
- /* SET 6,A */
+ /* SET 6,A */
- SET_8BIT (6, m_A)
- break;
+ SET_8BIT (6, m_A)
+ break;
case 0xF8:
- /* SET 7,B */
+ /* SET 7,B */
- SET_8BIT (7, m_B)
- break;
+ SET_8BIT (7, m_B)
+ break;
case 0xF9:
- /* SET 7,C */
+ /* SET 7,C */
- SET_8BIT (7, m_C)
- break;
+ SET_8BIT (7, m_C)
+ break;
case 0xFA:
- /* SET 7,D */
+ /* SET 7,D */
- SET_8BIT (7, m_D)
- break;
+ SET_8BIT (7, m_D)
+ break;
case 0xFB:
- /* SET 7,E */
+ /* SET 7,E */
- SET_8BIT (7, m_E)
- break;
+ SET_8BIT (7, m_E)
+ break;
case 0xFC:
- /* SET 7,H */
+ /* SET 7,H */
- SET_8BIT (7, m_H)
- break;
+ SET_8BIT (7, m_H)
+ break;
case 0xFD:
- /* SET 7,L */
+ /* SET 7,L */
- SET_8BIT (7, m_L)
- break;
+ SET_8BIT (7, m_L)
+ break;
case 0xFE:
/* SET 7,(HL) */
{
@@ -1530,7 +1530,7 @@ case 0xFE:
}
break;
case 0xFF:
- /* SET 7,A */
+ /* SET 7,A */
- SET_8BIT (7, m_A)
- break;
+ SET_8BIT (7, m_A)
+ break;
diff --git a/src/emu/cpu/lr35902/opc_main.h b/src/emu/cpu/lr35902/opc_main.h
index 82a00dd8643..2edab7cbb0e 100644
--- a/src/emu/cpu/lr35902/opc_main.h
+++ b/src/emu/cpu/lr35902/opc_main.h
@@ -1,65 +1,65 @@
-#define INC_8BIT(x) \
+#define INC_8BIT(x) \
{ \
- register UINT8 r,f; \
- x++; \
- r=(x); \
- f=(UINT8)(m_F&FLAG_C); \
- if( r==0 ) f|=FLAG_Z; \
- if( (r&0xF)==0 ) f|=FLAG_H; \
- m_F=f; \
+ register UINT8 r,f; \
+ x++; \
+ r=(x); \
+ f=(UINT8)(m_F&FLAG_C); \
+ if( r==0 ) f|=FLAG_Z; \
+ if( (r&0xF)==0 ) f|=FLAG_H; \
+ m_F=f; \
}
-#define DEC_8BIT(x) \
+#define DEC_8BIT(x) \
{ \
- register UINT8 r,f; \
- x--; \
- r=(x); \
- f=(UINT8)((m_F&FLAG_C)|FLAG_N); \
- if( r==0 ) f|=FLAG_Z; \
- if( (r&0xF)==0xF ) f|=FLAG_H; \
- m_F=f; \
+ register UINT8 r,f; \
+ x--; \
+ r=(x); \
+ f=(UINT8)((m_F&FLAG_C)|FLAG_N); \
+ if( r==0 ) f|=FLAG_Z; \
+ if( (r&0xF)==0xF ) f|=FLAG_H; \
+ m_F=f; \
}
-#define ADD_HL_RR(x) \
+#define ADD_HL_RR(x) \
{ \
- register UINT32 r1,r2; \
- register UINT8 f; \
- r1=((m_H<<8)|m_L)+(x); \
- r2=(((m_H<<8)|m_L)&0xFFF)+((x)&0xFFF); \
- f=(UINT8)(m_F&FLAG_Z); \
- if( r1>0xFFFF ) f|=FLAG_C; \
- if( r2>0x0FFF ) f|=FLAG_H; \
- m_L = r1; \
- m_H = r1 >> 8; \
- m_F=f; \
+ register UINT32 r1,r2; \
+ register UINT8 f; \
+ r1=((m_H<<8)|m_L)+(x); \
+ r2=(((m_H<<8)|m_L)&0xFFF)+((x)&0xFFF); \
+ f=(UINT8)(m_F&FLAG_Z); \
+ if( r1>0xFFFF ) f|=FLAG_C; \
+ if( r2>0x0FFF ) f|=FLAG_H; \
+ m_L = r1; \
+ m_H = r1 >> 8; \
+ m_F=f; \
}
-#define ADD_A_X(x) \
+#define ADD_A_X(x) \
{ \
- register UINT16 r1,r2; \
- register UINT8 f; \
- r1=(UINT16)((m_A&0xF)+((x)&0xF)); \
- r2=(UINT16)(m_A+(x)); \
- m_A=(UINT8)r2; \
- if( ((UINT8)r2)==0 ) f=FLAG_Z; \
- else f=0; \
- if( r2>0xFF ) f|=FLAG_C; \
- if( r1>0xF ) f|=FLAG_H; \
- m_F=f; \
+ register UINT16 r1,r2; \
+ register UINT8 f; \
+ r1=(UINT16)((m_A&0xF)+((x)&0xF)); \
+ r2=(UINT16)(m_A+(x)); \
+ m_A=(UINT8)r2; \
+ if( ((UINT8)r2)==0 ) f=FLAG_Z; \
+ else f=0; \
+ if( r2>0xFF ) f|=FLAG_C; \
+ if( r1>0xF ) f|=FLAG_H; \
+ m_F=f; \
}
-#define SUB_A_X(x) \
+#define SUB_A_X(x) \
{ \
- register UINT16 r1,r2; \
- register UINT8 f; \
- r1=(UINT16)((m_A&0xF)-((x)&0xF)); \
- r2=(UINT16)(m_A-(x)); \
- m_A=(UINT8)r2; \
- if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
- else f=FLAG_N; \
- if( r2>0xFF ) f|=FLAG_C; \
- if( r1>0xF ) f|=FLAG_H; \
- m_F=f; \
+ register UINT16 r1,r2; \
+ register UINT8 f; \
+ r1=(UINT16)((m_A&0xF)-((x)&0xF)); \
+ r2=(UINT16)(m_A-(x)); \
+ m_A=(UINT8)r2; \
+ if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
+ else f=FLAG_N; \
+ if( r2>0xFF ) f|=FLAG_C; \
+ if( r1>0xF ) f|=FLAG_H; \
+ m_F=f; \
}
/*
@@ -79,63 +79,63 @@
}
*/
-#define CP_A_X(x) \
+#define CP_A_X(x) \
{ \
- register UINT16 r1,r2; \
- register UINT8 f; \
- r1=(UINT16)((m_A&0xF)-((x)&0xF)); \
- r2=(UINT16)(m_A-(x)); \
- if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
- else f=FLAG_N; \
- if( r2>0xFF ) f|=FLAG_C; \
- if( r1>0xF ) f|=FLAG_H; \
- m_F=f; \
+ register UINT16 r1,r2; \
+ register UINT8 f; \
+ r1=(UINT16)((m_A&0xF)-((x)&0xF)); \
+ r2=(UINT16)(m_A-(x)); \
+ if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
+ else f=FLAG_N; \
+ if( r2>0xFF ) f|=FLAG_C; \
+ if( r1>0xF ) f|=FLAG_H; \
+ m_F=f; \
}
-#define SBC_A_X(x) \
+#define SBC_A_X(x) \
{ \
- register UINT16 r1,r2; \
- register UINT8 f; \
- r1=(UINT16)((m_A&0xF)-((x)&0xF)-((m_F&FLAG_C)?1:0)); \
- r2=(UINT16)(m_A-(x)-((m_F&FLAG_C)?1:0)); \
- m_A=(UINT8)r2; \
- if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
- else f=FLAG_N; \
- if( r2>0xFF ) f|=FLAG_C; \
- if( r1>0xF ) f|=FLAG_H; \
- m_F=f; \
+ register UINT16 r1,r2; \
+ register UINT8 f; \
+ r1=(UINT16)((m_A&0xF)-((x)&0xF)-((m_F&FLAG_C)?1:0)); \
+ r2=(UINT16)(m_A-(x)-((m_F&FLAG_C)?1:0)); \
+ m_A=(UINT8)r2; \
+ if( ((UINT8)r2)==0 ) f=FLAG_N|FLAG_Z; \
+ else f=FLAG_N; \
+ if( r2>0xFF ) f|=FLAG_C; \
+ if( r1>0xF ) f|=FLAG_H; \
+ m_F=f; \
}
-#define ADC_A_X(x) \
+#define ADC_A_X(x) \
{ \
- register UINT16 r1,r2; \
- register UINT8 f; \
- r1=(UINT16)((m_A&0xF)+((x)&0xF)+((m_F&FLAG_C)?1:0)); \
- r2=(UINT16)(m_A+(x)+((m_F&FLAG_C)?1:0)); \
- if( (m_A=(UINT8)r2)==0 ) f=FLAG_Z; \
- else f=0; \
- if( r2>0xFF ) f|=FLAG_C; \
- if( r1>0xF ) f|=FLAG_H; \
- m_F=f; \
+ register UINT16 r1,r2; \
+ register UINT8 f; \
+ r1=(UINT16)((m_A&0xF)+((x)&0xF)+((m_F&FLAG_C)?1:0)); \
+ r2=(UINT16)(m_A+(x)+((m_F&FLAG_C)?1:0)); \
+ if( (m_A=(UINT8)r2)==0 ) f=FLAG_Z; \
+ else f=0; \
+ if( r2>0xFF ) f|=FLAG_C; \
+ if( r1>0xF ) f|=FLAG_H; \
+ m_F=f; \
}
-#define AND_A_X(x) \
- if( (m_A&=(x))==0 ) \
- m_F=FLAG_H|FLAG_Z; \
- else \
- m_F=FLAG_H;
+#define AND_A_X(x) \
+ if( (m_A&=(x))==0 ) \
+ m_F=FLAG_H|FLAG_Z; \
+ else \
+ m_F=FLAG_H;
#define XOR_A_X(x) \
- if( (m_A^=(x))==0 ) \
- m_F=FLAG_Z; \
- else \
- m_F=0;
+ if( (m_A^=(x))==0 ) \
+ m_F=FLAG_Z; \
+ else \
+ m_F=0;
-#define OR_A_X(x) \
- if( (m_A|=(x))==0 ) \
- m_F=FLAG_Z; \
- else \
- m_F=0;
+#define OR_A_X(x) \
+ if( (m_A|=(x))==0 ) \
+ m_F=FLAG_Z; \
+ else \
+ m_F=0;
#define POP(x,y) \
y = mem_read_byte( m_SP++ ); \
@@ -160,11 +160,11 @@ case 0x02: /* LD (BC),A */
break;
case 0x03: /* INC BC */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_B == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_B == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_C++;
if ( m_C == 0 )
@@ -178,8 +178,8 @@ case 0x04: /* INC B */
break;
case 0x05: /* DEC B */
- DEC_8BIT (m_B)
- break;
+ DEC_8BIT (m_B)
+ break;
case 0x06: /* LD B,n8 */
m_B = mem_read_byte( m_PC++ );
@@ -187,16 +187,16 @@ case 0x06: /* LD B,n8 */
case 0x07: /* RLCA */
- m_A = (UINT8) ((m_A << 1) | (m_A >> 7));
- if (m_A & 1)
- {
- m_F = FLAG_C;
- }
- else
- {
- m_F = 0;
- }
- break;
+ m_A = (UINT8) ((m_A << 1) | (m_A >> 7));
+ if (m_A & 1)
+ {
+ m_F = FLAG_C;
+ }
+ else
+ {
+ m_F = 0;
+ }
+ break;
case 0x08: /* LD (n16),SP */
mem_write_word (mem_read_word (m_PC), m_SP);
@@ -209,15 +209,15 @@ case 0x09: /* ADD HL,BC */
break;
case 0x0A: /* LD A,(BC) */
- m_A = mem_read_byte ( (m_B<<8)|m_C );
- break;
+ m_A = mem_read_byte ( (m_B<<8)|m_C );
+ break;
case 0x0B: /* DEC BC */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_B == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_B == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_C--;
if ( m_C == 0xFF )
@@ -228,45 +228,45 @@ case 0x0B: /* DEC BC */
break;
case 0x0C: /* INC C */
- INC_8BIT (m_C)
- break;
+ INC_8BIT (m_C)
+ break;
case 0x0D: /* DEC C */
- DEC_8BIT (m_C)
- break;
+ DEC_8BIT (m_C)
+ break;
case 0x0E: /* LD C,n8 */
- m_C = mem_read_byte ( m_PC++ );
- break;
+ m_C = mem_read_byte ( m_PC++ );
+ break;
case 0x0F: /* RRCA */
- m_A = (UINT8) ((m_A >> 1) | (m_A << 7));
- m_F = 0;
- if (m_A & 0x80)
- {
- m_F |= FLAG_C;
- }
- break;
+ m_A = (UINT8) ((m_A >> 1) | (m_A << 7));
+ m_F = 0;
+ if (m_A & 0x80)
+ {
+ m_F |= FLAG_C;
+ }
+ break;
case 0x10: /* STOP */
- if ( m_gb_speed_change_pending ) {
- m_gb_speed = ( m_gb_speed == 1 ) ? 2 : 1;
- }
- m_gb_speed_change_pending = 0;
- break;
+ if ( m_gb_speed_change_pending ) {
+ m_gb_speed = ( m_gb_speed == 1 ) ? 2 : 1;
+ }
+ m_gb_speed_change_pending = 0;
+ break;
case 0x11: /* LD DE,n16 */
m_E = mem_read_byte( m_PC++ );
m_D = mem_read_byte( m_PC++ );
break;
case 0x12: /* LD (DE),A */
- mem_write_byte( ( m_D << 8 ) | m_E, m_A );
- break;
+ mem_write_byte( ( m_D << 8 ) | m_E, m_A );
+ break;
case 0x13: /* INC DE */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_D == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_D == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_E++;
if ( m_E == 0 )
@@ -277,47 +277,47 @@ case 0x13: /* INC DE */
break;
case 0x14: /* INC D */
- INC_8BIT (m_D)
- break;
+ INC_8BIT (m_D)
+ break;
case 0x15: /* DEC D */
- DEC_8BIT (m_D)
- break;
+ DEC_8BIT (m_D)
+ break;
case 0x16: /* LD D,n8 */
- m_D = mem_read_byte ( m_PC++ );
- break;
+ m_D = mem_read_byte ( m_PC++ );
+ break;
case 0x17: /* RLA */
- x = (m_A & 0x80) ? FLAG_C : 0;
+ x = (m_A & 0x80) ? FLAG_C : 0;
- m_A = (UINT8) ((m_A << 1) | ((m_F & FLAG_C) ? 1 : 0));
- m_F = x;
- break;
+ m_A = (UINT8) ((m_A << 1) | ((m_F & FLAG_C) ? 1 : 0));
+ m_F = x;
+ break;
case 0x18: /* JR n8 */
- {
+ {
INT8 offset;
- offset = mem_read_byte( m_PC++ );
- m_PC += offset;
+ offset = mem_read_byte( m_PC++ );
+ m_PC += offset;
cycles_passed( 4 );
- }
- break;
+ }
+ break;
case 0x19: /* ADD HL,DE */
ADD_HL_RR (( m_D << 8 ) | m_E)
cycles_passed( 4 );
break;
case 0x1A: /* LD A,(DE) */
- m_A = mem_read_byte( ( m_D << 8 ) | m_E );
- break;
+ m_A = mem_read_byte( ( m_D << 8 ) | m_E );
+ break;
case 0x1B: /* DEC DE */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_D == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_D == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_E--;
if ( m_E == 0xFF )
@@ -328,23 +328,23 @@ case 0x1B: /* DEC DE */
break;
case 0x1C: /* INC E */
- INC_8BIT (m_E)
- break;
+ INC_8BIT (m_E)
+ break;
case 0x1D: /* DEC E */
- DEC_8BIT (m_E)
- break;
+ DEC_8BIT (m_E)
+ break;
case 0x1E: /* LD E,n8 */
- m_E = mem_read_byte( m_PC++ );
- break;
+ m_E = mem_read_byte( m_PC++ );
+ break;
case 0x1F: /* RRA */
- x = (m_A & 1) ? FLAG_C : 0;
+ x = (m_A & 1) ? FLAG_C : 0;
- m_A = (UINT8) ((m_A >> 1) | ((m_F & FLAG_C) ? 0x80 : 0));
- m_F = x;
- break;
+ m_A = (UINT8) ((m_A >> 1) | ((m_F & FLAG_C) ? 0x80 : 0));
+ m_F = x;
+ break;
case 0x20: /* JR NZ,n8 */
{
INT8 offset = mem_read_byte( m_PC++ );
@@ -361,11 +361,11 @@ case 0x21: /* LD HL,n16 */
break;
case 0x22: /* LD (HL+),A */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_H == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_H == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
mem_write_byte( (m_H << 8 ) | m_L, m_A );
m_L++;
@@ -376,11 +376,11 @@ case 0x22: /* LD (HL+),A */
break;
case 0x23: /* INC HL */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_H == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_H == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_L++;
if ( m_L == 0 )
@@ -391,16 +391,16 @@ case 0x23: /* INC HL */
break;
case 0x24: /* INC H */
- INC_8BIT (m_H);
- break;
+ INC_8BIT (m_H);
+ break;
case 0x25: /* DEC H */
- DEC_8BIT (m_H);
- break;
+ DEC_8BIT (m_H);
+ break;
case 0x26: /* LD H,n8 */
- m_H = mem_read_byte( m_PC++ );
- break;
+ m_H = mem_read_byte( m_PC++ );
+ break;
case 0x27: /* DAA */
{
int tmp = m_A;
@@ -426,7 +426,7 @@ case 0x27: /* DAA */
if ( ! m_A )
m_F |= FLAG_Z;
}
- break;
+ break;
case 0x28: /* JR Z,n8 */
{
INT8 offset = mem_read_byte( m_PC++ );
@@ -443,11 +443,11 @@ case 0x29: /* ADD HL,HL */
cycles_passed( 4 );
break;
case 0x2A: /* LD A,(HL+) */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_H == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_H == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_A = mem_read_byte( ( m_H << 8 ) | m_L );
m_L++;
@@ -458,11 +458,11 @@ case 0x2A: /* LD A,(HL+) */
break;
case 0x2B: /* DEC HL */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_H == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_H == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_L--;
if ( m_L == 0xFF )
@@ -473,21 +473,21 @@ case 0x2B: /* DEC HL */
break;
case 0x2C: /* INC L */
- INC_8BIT (m_L);
- break;
+ INC_8BIT (m_L);
+ break;
case 0x2D: /* DEC L */
- DEC_8BIT (m_L);
- break;
+ DEC_8BIT (m_L);
+ break;
case 0x2E: /* LD L,n8 */
- m_L = mem_read_byte( m_PC++ );
- break;
+ m_L = mem_read_byte( m_PC++ );
+ break;
case 0x2F: /* CPL */
- m_A = ~m_A;
- m_F |= FLAG_N | FLAG_H;
- break;
+ m_A = ~m_A;
+ m_F |= FLAG_N | FLAG_H;
+ break;
case 0x30: /* JR NC,n8 */
{
INT8 offset = mem_read_byte( m_PC++ );
@@ -501,16 +501,16 @@ case 0x30: /* JR NC,n8 */
break;
case 0x31: /* LD SP,n16 */
- m_SP = mem_read_word( m_PC );
- m_PC += 2;
- break;
+ m_SP = mem_read_word( m_PC );
+ m_PC += 2;
+ break;
case 0x32: /* LD (HL-),A */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_H == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_H == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
mem_write_byte( ( m_H << 8 ) | m_L, m_A );
m_L--;
@@ -569,8 +569,8 @@ case 0x36: /* LD (HL),n8 */
break;
case 0x37: /* SCF */
- m_F = (UINT8) ((m_F & FLAG_Z) | FLAG_C);
- break;
+ m_F = (UINT8) ((m_F & FLAG_Z) | FLAG_C);
+ break;
case 0x38: /* JR C,n8 */
{
INT8 offset = mem_read_byte( m_PC++ );
@@ -587,11 +587,11 @@ case 0x39: /* ADD HL,SP */
cycles_passed( 4 );
break;
case 0x3A: /* LD A,(HL-) */
-#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
- if (m_H == 0xFE)
- {
- trash_sprites (state);
- }
+#if 0 /* FIXME ?? do we want to support this? (bug emulation) */
+ if (m_H == 0xFE)
+ {
+ trash_sprites (state);
+ }
#endif
m_A = mem_read_byte( ( m_H << 8 ) | m_L );
m_L--;
@@ -606,72 +606,72 @@ case 0x3B: /* DEC SP */
break;
case 0x3C: /* INC A */
- INC_8BIT (m_A);
- break;
+ INC_8BIT (m_A);
+ break;
case 0x3D: /* DEC A */
- DEC_8BIT (m_A);
- break;
+ DEC_8BIT (m_A);
+ break;
case 0x3E: /* LD A,n8 */
- m_A = mem_read_byte( m_PC++ );
- break;
+ m_A = mem_read_byte( m_PC++ );
+ break;
case 0x3F: /* CCF */
- m_F = (UINT8) ((m_F & FLAG_Z) | ((m_F & FLAG_C) ? 0 : FLAG_C));
- break;
+ m_F = (UINT8) ((m_F & FLAG_Z) | ((m_F & FLAG_C) ? 0 : FLAG_C));
+ break;
case 0x40: /* LD B,B */
- break;
+ break;
case 0x41: /* LD B,C */
- m_B = m_C;
- break;
+ m_B = m_C;
+ break;
case 0x42: /* LD B,D */
- m_B = m_D;
- break;
+ m_B = m_D;
+ break;
case 0x43: /* LD B,E */
- m_B = m_E;
- break;
+ m_B = m_E;
+ break;
case 0x44: /* LD B,H */
- m_B = m_H;
- break;
+ m_B = m_H;
+ break;
case 0x45: /* LD B,L */
- m_B = m_L;
- break;
+ m_B = m_L;
+ break;
case 0x46: /* LD B,(HL) */
m_B = mem_read_byte( ( m_H << 8 ) | m_L) ;
break;
case 0x47: /* LD B,A */
- m_B = m_A;
- break;
+ m_B = m_A;
+ break;
case 0x48: /* LD C,B */
- m_C = m_B;
- break;
+ m_C = m_B;
+ break;
case 0x49: /* LD C,C */
- break;
+ break;
case 0x4A: /* LD C,D */
- m_C = m_D;
- break;
+ m_C = m_D;
+ break;
case 0x4B: /* LD C,E */
- m_C = m_E;
- break;
+ m_C = m_E;
+ break;
case 0x4C: /* LD C,H */
- m_C = m_H;
- break;
+ m_C = m_H;
+ break;
case 0x4D: /* LD C,L */
- m_C = m_L;
- break;
+ m_C = m_L;
+ break;
case 0x4E: /* LD C,(HL) */
m_C = mem_read_byte( ( m_H << 8 ) | m_L );
@@ -679,127 +679,127 @@ case 0x4E: /* LD C,(HL) */
case 0x4F: /* LD C,A */
- m_C = m_A;
- break;
+ m_C = m_A;
+ break;
case 0x50: /* LD D,B */
- m_D = m_B;
- break;
+ m_D = m_B;
+ break;
case 0x51: /* LD D,C */
- m_D = m_C;
- break;
+ m_D = m_C;
+ break;
case 0x52: /* LD D,D */
- break;
+ break;
case 0x53: /* LD D,E */
- m_D = m_E;
- break;
+ m_D = m_E;
+ break;
case 0x54: /* LD D,H */
- m_D = m_H;
- break;
+ m_D = m_H;
+ break;
case 0x55: /* LD D,L */
- m_D = m_L;
- break;
+ m_D = m_L;
+ break;
case 0x56: /* LD D,(HL) */
- m_D = mem_read_byte( ( m_H << 8 ) | m_L );
- break;
+ m_D = mem_read_byte( ( m_H << 8 ) | m_L );
+ break;
case 0x57: /* LD D,A */
- m_D = m_A;
- break;
+ m_D = m_A;
+ break;
case 0x58: /* LD E,B */
- m_E = m_B;
- break;
+ m_E = m_B;
+ break;
case 0x59: /* LD E,C */
- m_E = m_C;
- break;
+ m_E = m_C;
+ break;
case 0x5A: /* LD E,D */
- m_E = m_D;
- break;
+ m_E = m_D;
+ break;
case 0x5B: /* LD E,E */
- break;
+ break;
case 0x5C: /* LD E,H */
- m_E = m_H;
- break;
+ m_E = m_H;
+ break;
case 0x5D: /* LD E,L */
- m_E = m_L;
- break;
+ m_E = m_L;
+ break;
case 0x5E: /* LD E,(HL) */
- m_E = mem_read_byte( ( m_H << 8 ) | m_L );
- break;
+ m_E = mem_read_byte( ( m_H << 8 ) | m_L );
+ break;
case 0x5F: /* LD E,A */
- m_E = m_A;
- break;
+ m_E = m_A;
+ break;
case 0x60: /* LD H,B */
- m_H = m_B;
- break;
+ m_H = m_B;
+ break;
case 0x61: /* LD H,C */
- m_H = m_C;
- break;
+ m_H = m_C;
+ break;
case 0x62: /* LD H,D */
- m_H = m_D;
- break;
+ m_H = m_D;
+ break;
case 0x63: /* LD H,E */
- m_H = m_E;
- break;
+ m_H = m_E;
+ break;
case 0x64: /* LD H,H */
- break;
+ break;
case 0x65: /* LD H,L */
- m_H = m_L;
- break;
+ m_H = m_L;
+ break;
case 0x66: /* LD H,(HL) */
- m_H = mem_read_byte( ( m_H << 8 ) | m_L );
- break;
+ m_H = mem_read_byte( ( m_H << 8 ) | m_L );
+ break;
case 0x67: /* LD H,A */
- m_H = m_A;
- break;
+ m_H = m_A;
+ break;
case 0x68: /* LD L,B */
- m_L = m_B;
- break;
+ m_L = m_B;
+ break;
case 0x69: /* LD L,C */
- m_L = m_C;
- break;
+ m_L = m_C;
+ break;
case 0x6A: /* LD L,D */
- m_L = m_D;
- break;
+ m_L = m_D;
+ break;
case 0x6B: /* LD L,E */
- m_L = m_E;
- break;
+ m_L = m_E;
+ break;
case 0x6C: /* LD L,H */
- m_L = m_H;
- break;
+ m_L = m_H;
+ break;
case 0x6D: /* LD L,L */
- break;
+ break;
case 0x6E: /* LD L,(HL) */
- m_L = mem_read_byte( ( m_H << 8 ) | m_L );
- break;
+ m_L = mem_read_byte( ( m_H << 8 ) | m_L );
+ break;
case 0x6F: /* LD L,A */
- m_L = m_A;
- break;
+ m_L = m_A;
+ break;
case 0x70: /* LD (HL),B */
mem_write_byte( ( m_H << 8 ) | m_L, m_B );
@@ -829,307 +829,307 @@ case 0x77: /* LD (HL),A */
break;
case 0x78: /* LD A,B */
- m_A = m_B;
- break;
+ m_A = m_B;
+ break;
case 0x79: /* LD A,C */
- m_A = m_C;
- break;
+ m_A = m_C;
+ break;
case 0x7A: /* LD A,D */
- m_A = m_D;
- break;
+ m_A = m_D;
+ break;
case 0x7B: /* LD A,E */
- m_A = m_E;
- break;
+ m_A = m_E;
+ break;
case 0x7C: /* LD A,H */
- m_A = m_H;
- break;
+ m_A = m_H;
+ break;
case 0x7D: /* LD A,L */
- m_A = m_L;
- break;
+ m_A = m_L;
+ break;
case 0x7E: /* LD A,(HL) */
- m_A = mem_read_byte( ( m_H << 8 ) | m_L );
- break;
+ m_A = mem_read_byte( ( m_H << 8 ) | m_L );
+ break;
case 0x7F: /* LD A,A */
- break;
+ break;
case 0x80: /* ADD A,B */
- ADD_A_X (m_B)
- break;
+ ADD_A_X (m_B)
+ break;
case 0x81: /* ADD A,C */
- ADD_A_X (m_C)
- break;
+ ADD_A_X (m_C)
+ break;
case 0x82: /* ADD A,D */
- ADD_A_X (m_D)
- break;
+ ADD_A_X (m_D)
+ break;
case 0x83: /* ADD A,E */
- ADD_A_X (m_E)
- break;
+ ADD_A_X (m_E)
+ break;
case 0x84: /* ADD A,H */
- ADD_A_X (m_H)
- break;
+ ADD_A_X (m_H)
+ break;
case 0x85: /* ADD A,L */
- ADD_A_X (m_L)
- break;
+ ADD_A_X (m_L)
+ break;
case 0x86: /* ADD A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- ADD_A_X (x)
- break;
+ ADD_A_X (x)
+ break;
case 0x87: /* ADD A,A */
- ADD_A_X (m_A)
- break;
+ ADD_A_X (m_A)
+ break;
case 0x88: /* ADC A,B */
- ADC_A_X (m_B)
- break;
+ ADC_A_X (m_B)
+ break;
case 0x89: /* ADC A,C */
- ADC_A_X (m_C)
- break;
+ ADC_A_X (m_C)
+ break;
case 0x8A: /* ADC A,D */
- ADC_A_X (m_D)
- break;
+ ADC_A_X (m_D)
+ break;
case 0x8B: /* ADC A,E */
- ADC_A_X (m_E)
- break;
+ ADC_A_X (m_E)
+ break;
case 0x8C: /* ADC A,H */
- ADC_A_X (m_H)
- break;
+ ADC_A_X (m_H)
+ break;
case 0x8D: /* ADC A,L */
- ADC_A_X (m_L)
- break;
+ ADC_A_X (m_L)
+ break;
case 0x8E: /* ADC A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- ADC_A_X (x)
- break;
+ ADC_A_X (x)
+ break;
case 0x8F: /* ADC A,A */
- ADC_A_X (m_A)
- break;
+ ADC_A_X (m_A)
+ break;
case 0x90: /* SUB A,B */
- SUB_A_X (m_B)
- break;
+ SUB_A_X (m_B)
+ break;
case 0x91: /* SUB A,C */
- SUB_A_X (m_C)
- break;
+ SUB_A_X (m_C)
+ break;
case 0x92: /* SUB A,D */
- SUB_A_X (m_D)
- break;
+ SUB_A_X (m_D)
+ break;
case 0x93: /* SUB A,E */
- SUB_A_X (m_E)
- break;
+ SUB_A_X (m_E)
+ break;
case 0x94: /* SUB A,H */
- SUB_A_X (m_H)
- break;
+ SUB_A_X (m_H)
+ break;
case 0x95: /* SUB A,L */
- SUB_A_X (m_L)
- break;
+ SUB_A_X (m_L)
+ break;
case 0x96: /* SUB A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- SUB_A_X (x)
- break;
+ SUB_A_X (x)
+ break;
case 0x97: /* SUB A,A */
- SUB_A_X (m_A)
- break;
+ SUB_A_X (m_A)
+ break;
case 0x98: /* SBC A,B */
- SBC_A_X (m_B)
- break;
+ SBC_A_X (m_B)
+ break;
case 0x99: /* SBC A,C */
- SBC_A_X (m_C)
- break;
+ SBC_A_X (m_C)
+ break;
case 0x9A: /* SBC A,D */
- SBC_A_X (m_D)
- break;
+ SBC_A_X (m_D)
+ break;
case 0x9B: /* SBC A,E */
- SBC_A_X (m_E)
- break;
+ SBC_A_X (m_E)
+ break;
case 0x9C: /* SBC A,H */
- SBC_A_X (m_H)
- break;
+ SBC_A_X (m_H)
+ break;
case 0x9D: /* SBC A,L */
- SBC_A_X (m_L)
- break;
+ SBC_A_X (m_L)
+ break;
case 0x9E: /* SBC A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- SBC_A_X (x)
- break;
+ SBC_A_X (x)
+ break;
case 0x9F: /* SBC A,A */
- SBC_A_X (m_A)
- break;
+ SBC_A_X (m_A)
+ break;
case 0xA0: /* AND A,B */
- AND_A_X (m_B)
- break;
+ AND_A_X (m_B)
+ break;
case 0xA1: /* AND A,C */
- AND_A_X (m_C)
- break;
+ AND_A_X (m_C)
+ break;
case 0xA2: /* AND A,D */
- AND_A_X (m_D)
- break;
+ AND_A_X (m_D)
+ break;
case 0xA3: /* AND A,E */
- AND_A_X (m_E)
- break;
+ AND_A_X (m_E)
+ break;
case 0xA4: /* AND A,H */
- AND_A_X (m_H)
- break;
+ AND_A_X (m_H)
+ break;
case 0xA5: /* AND A,L */
- AND_A_X (m_L)
- break;
+ AND_A_X (m_L)
+ break;
case 0xA6: /* AND A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- AND_A_X (x)
- break;
+ AND_A_X (x)
+ break;
case 0xA7: /* AND A,A */
- m_F = (m_A == 0) ? (FLAG_H | FLAG_Z) : FLAG_H;
- break;
+ m_F = (m_A == 0) ? (FLAG_H | FLAG_Z) : FLAG_H;
+ break;
case 0xA8: /* XOR A,B */
- XOR_A_X (m_B)
- break;
+ XOR_A_X (m_B)
+ break;
case 0xA9: /* XOR A,C */
- XOR_A_X (m_C)
- break;
+ XOR_A_X (m_C)
+ break;
case 0xAA: /* XOR A,D */
- XOR_A_X (m_D)
- break;
+ XOR_A_X (m_D)
+ break;
case 0xAB: /* XOR A,E */
- XOR_A_X (m_E)
- break;
+ XOR_A_X (m_E)
+ break;
case 0xAC: /* XOR A,H */
- XOR_A_X (m_H)
- break;
+ XOR_A_X (m_H)
+ break;
case 0xAD: /* XOR A,L */
- XOR_A_X (m_L)
- break;
+ XOR_A_X (m_L)
+ break;
case 0xAE: /* XOR A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- XOR_A_X (x)
- break;
+ XOR_A_X (x)
+ break;
case 0xAF: /* XOR A,A */
- XOR_A_X (m_A)
- break;
+ XOR_A_X (m_A)
+ break;
case 0xB0: /* OR A,B */
- OR_A_X (m_B)
- break;
+ OR_A_X (m_B)
+ break;
case 0xB1: /* OR A,C */
- OR_A_X (m_C)
- break;
+ OR_A_X (m_C)
+ break;
case 0xB2: /* OR A,D */
- OR_A_X (m_D)
- break;
+ OR_A_X (m_D)
+ break;
case 0xB3: /* OR A,E */
- OR_A_X (m_E)
- break;
+ OR_A_X (m_E)
+ break;
case 0xB4: /* OR A,H */
- OR_A_X (m_H)
- break;
+ OR_A_X (m_H)
+ break;
case 0xB5: /* OR A,L */
- OR_A_X (m_L)
- break;
+ OR_A_X (m_L)
+ break;
case 0xB6: /* OR A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- OR_A_X (x)
- break;
+ OR_A_X (x)
+ break;
case 0xB7: /* OR A,A */
- OR_A_X (m_A)
- break;
+ OR_A_X (m_A)
+ break;
case 0xB8: /* CP A,B */
- CP_A_X (m_B)
- break;
+ CP_A_X (m_B)
+ break;
case 0xB9: /* CP A,C */
- CP_A_X (m_C)
- break;
+ CP_A_X (m_C)
+ break;
case 0xBA: /* CP A,D */
- CP_A_X (m_D)
- break;
+ CP_A_X (m_D)
+ break;
case 0xBB: /* CP A,E */
- CP_A_X (m_E)
- break;
+ CP_A_X (m_E)
+ break;
case 0xBC: /* CP A,H */
- CP_A_X (m_H)
- break;
+ CP_A_X (m_H)
+ break;
case 0xBD: /* CP A,L */
- CP_A_X (m_L)
- break;
+ CP_A_X (m_L)
+ break;
case 0xBE: /* CP A,(HL) */
- x = mem_read_byte( ( m_H << 8 ) | m_L );
+ x = mem_read_byte( ( m_H << 8 ) | m_L );
- CP_A_X (x)
- break;
+ CP_A_X (x)
+ break;
case 0xBF: /* CP A,A */
- CP_A_X (m_A)
- break;
+ CP_A_X (m_A)
+ break;
case 0xC0: /* RET NZ */
cycles_passed( 4 );
if (!(m_F & FLAG_Z))
@@ -1178,9 +1178,9 @@ case 0xC5: /* PUSH BC */
break;
case 0xC6: /* ADD A,n8 */
- x = mem_read_byte( m_PC++ );
- ADD_A_X (x)
- break;
+ x = mem_read_byte( m_PC++ );
+ ADD_A_X (x)
+ break;
case 0xC7: /* RST 0 */
m_SP -= 2;
mem_write_word( m_SP, m_PC );
@@ -1214,12 +1214,12 @@ case 0xCA: /* JP Z,n16 */
}
break;
case 0xCB: /* PREFIX! */
- x = mem_read_byte( m_PC++ );
- switch (x)
- {
- #include "opc_cb.h"
- }
- break;
+ x = mem_read_byte( m_PC++ );
+ switch (x)
+ {
+ #include "opc_cb.h"
+ }
+ break;
case 0xCC: /* CALL Z,n16 */
{
UINT16 addr = mem_read_word( m_PC );
@@ -1247,9 +1247,9 @@ case 0xCD: /* CALL n16 */
break;
case 0xCE: /* ADC A,n8 */
- x = mem_read_byte( m_PC++ );
- ADC_A_X (x)
- break;
+ x = mem_read_byte( m_PC++ );
+ ADC_A_X (x)
+ break;
case 0xCF: /* RST 8 */
m_SP -= 2;
mem_write_word( m_SP, m_PC );
@@ -1281,7 +1281,7 @@ case 0xD2: /* JP NC,n16 */
}
break;
case 0xD3: /* EH? */
- break;
+ break;
case 0xD4: /* CALL NC,n16 */
{
UINT16 addr = mem_read_word( m_PC );
@@ -1302,9 +1302,9 @@ case 0xD5: /* PUSH DE */
break;
case 0xD6: /* SUB A,n8 */
- x = mem_read_byte( m_PC++ );
- SUB_A_X (x)
- break;
+ x = mem_read_byte( m_PC++ );
+ SUB_A_X (x)
+ break;
case 0xD7: /* RST $10 */
m_SP -= 2;
mem_write_word( m_SP, m_PC );
@@ -1339,7 +1339,7 @@ case 0xDA: /* JP C,n16 */
}
break;
case 0xDB: /* EH? */
- break;
+ break;
case 0xDC: /* CALL C,n16 */
{
UINT16 addr = mem_read_word( m_PC );
@@ -1355,12 +1355,12 @@ case 0xDC: /* CALL C,n16 */
}
break;
case 0xDD: /* EH? */
- break;
+ break;
case 0xDE: /* SBC A,n8 */
- x = mem_read_byte( m_PC++ );
- SBC_A_X (x)
- break;
+ x = mem_read_byte( m_PC++ );
+ SBC_A_X (x)
+ break;
case 0xDF: /* RST $18 */
m_SP -= 2;
mem_write_word( m_SP, m_PC );
@@ -1368,31 +1368,31 @@ case 0xDF: /* RST $18 */
cycles_passed( 4 );
break;
case 0xE0: /* LD ($FF00+n8),A */
- {
+ {
UINT8 v = mem_read_byte( m_PC++ );
mem_write_byte( 0xFF00 + v, m_A );
- }
- break;
+ }
+ break;
case 0xE1: /* POP HL */
POP( m_H, m_L );
break;
case 0xE2: /* LD ($FF00+C),A */
- mem_write_byte( 0xFF00 + m_C, m_A );
- break;
+ mem_write_byte( 0xFF00 + m_C, m_A );
+ break;
case 0xE3: /* EH? */
- break;
+ break;
case 0xE4: /* EH? */
- break;
+ break;
case 0xE5: /* PUSH HL */
PUSH( m_H, m_L );
cycles_passed( 4 );
break;
case 0xE6: /* AND A,n8 */
- x = mem_read_byte( m_PC++ );
- AND_A_X (x)
- break;
+ x = mem_read_byte( m_PC++ );
+ AND_A_X (x)
+ break;
case 0xE7: /* RST $20 */
m_SP -= 2;
mem_write_word( m_SP, m_PC );
@@ -1407,48 +1407,48 @@ case 0xE8: /* ADD SP,n8 */
* C - Set or reset according to operation.
*/
- {
+ {
register INT32 n;
n = (INT8) mem_read_byte( m_PC++ );
if ( ( m_SP & 0xFF ) + (UINT8)(n & 0xFF) > 0xFF )
- {
- m_F = FLAG_C;
- }
- else
- {
- m_F = 0;
- }
-
- if ( ( m_SP & 0x0F ) + ( n & 0x0F ) > 0x0F )
- {
- m_F |= FLAG_H;
- }
+ {
+ m_F = FLAG_C;
+ }
+ else
+ {
+ m_F = 0;
+ }
+
+ if ( ( m_SP & 0x0F ) + ( n & 0x0F ) > 0x0F )
+ {
+ m_F |= FLAG_H;
+ }
m_SP = (UINT16) ( m_SP + n );
- }
- cycles_passed( 8 );
- break;
+ }
+ cycles_passed( 8 );
+ break;
case 0xE9: /* JP (HL) */
m_PC = ( m_H << 8 ) | m_L;
break;
case 0xEA: /* LD (n16),A */
- mem_write_byte( mem_read_word( m_PC ), m_A );
- m_PC += 2;
- break;
+ mem_write_byte( mem_read_word( m_PC ), m_A );
+ m_PC += 2;
+ break;
case 0xEB: /* EH? */
- break;
+ break;
case 0xEC: /* EH? */
- break;
+ break;
case 0xED: /* EH? */
- break;
+ break;
case 0xEE: /* XOR A,n8 */
- x = mem_read_byte( m_PC++ );
- XOR_A_X (x)
- break;
+ x = mem_read_byte( m_PC++ );
+ XOR_A_X (x)
+ break;
case 0xEF: /* RST $28 */
m_SP -= 2;
mem_write_word( m_SP, m_PC );
@@ -1456,25 +1456,25 @@ case 0xEF: /* RST $28 */
cycles_passed( 4 );
break;
case 0xF0: /* LD A,($FF00+n8) */
- {
+ {
UINT8 v = mem_read_byte( m_PC++ );
m_A = mem_read_byte( 0xFF00 + v );
- }
- break;
+ }
+ break;
case 0xF1: /* POP AF */
POP( m_A, m_F );
m_F &= 0xF0;
break;
case 0xF2: /* LD A,($FF00+C) */
- m_A = mem_read_byte( 0xFF00 + m_C );
- break;
+ m_A = mem_read_byte( 0xFF00 + m_C );
+ break;
case 0xF3: /* DI */
- m_ei_delay = 0;
- m_enable &= ~IME;
- break;
+ m_ei_delay = 0;
+ m_enable &= ~IME;
+ break;
case 0xF4: /* EH? */
- break;
+ break;
case 0xF5: /* PUSH AF */
m_F &= 0xF0;
PUSH( m_A, m_F );
@@ -1482,9 +1482,9 @@ case 0xF5: /* PUSH AF */
break;
case 0xF6: /* OR A,n8 */
- x = mem_read_byte( m_PC++ );
- OR_A_X (x)
- break;
+ x = mem_read_byte( m_PC++ );
+ OR_A_X (x)
+ break;
case 0xF7: /* RST $30 */
m_SP -= 2;
mem_write_word( m_SP, m_PC );
@@ -1502,32 +1502,32 @@ case 0xF8: /* LD HL,SP+n8 */
*
*/
- {
+ {
register INT32 n;
n = (INT8) mem_read_byte( m_PC++ );
if ( ( m_SP & 0xFF ) + (UINT8)(n & 0xFF) > 0xFF )
- {
- m_F = FLAG_C;
- }
- else
- {
- m_F = 0;
- }
+ {
+ m_F = FLAG_C;
+ }
+ else
+ {
+ m_F = 0;
+ }
if ( ( m_SP & 0x0F ) + ( n & 0x0F ) > 0x0F )
- {
- m_F |= FLAG_H;
- }
+ {
+ m_F |= FLAG_H;
+ }
UINT16 res = m_SP + n;
m_L = res & 0xFF;
m_H = res >> 8;
- }
- cycles_passed( 4 );
- break;
+ }
+ cycles_passed( 4 );
+ break;
case 0xF9: /* LD SP,HL */
m_SP = ( m_H << 8 ) | m_L;
cycles_passed( 4 );
diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c
index e80159a51c3..aa73ec1392d 100644
--- a/src/emu/cpu/m37710/m37710.c
+++ b/src/emu/cpu/m37710/m37710.c
@@ -56,7 +56,7 @@
#include "m37710.h"
#include "m37710cm.h"
-#define M37710_DEBUG (0) // enables verbose logging for peripherals, etc.
+#define M37710_DEBUG (0) // enables verbose logging for peripherals, etc.
static void m37710_set_irq_line(m37710i_cpu_struct *cpustate, int line, int state);
@@ -66,29 +66,29 @@ extern const int m37710_irq_levels[M37710_LINE_MAX];
const int m37710_irq_levels[M37710_LINE_MAX] =
{
// maskable
- 0x70, // ADC 0
- 0x73, // UART 1 XMIT 1
- 0x74, // UART 1 RECV 2
- 0x71, // UART 0 XMIT 3
- 0x72, // UART 0 RECV 4
- 0x7c, // Timer B2 5
- 0x7b, // Timer B1 6
- 0x7a, // Timer B0 7
- 0x79, // Timer A4 8
- 0x78, // Timer A3 9
- 0x77, // Timer A2 10
- 0x76, // Timer A1 11
- 0x75, // Timer A0 12
- 0x7f, // IRQ 2 13
- 0x7e, // IRQ 1 14
- 0x7d, // IRQ 0 15
+ 0x70, // ADC 0
+ 0x73, // UART 1 XMIT 1
+ 0x74, // UART 1 RECV 2
+ 0x71, // UART 0 XMIT 3
+ 0x72, // UART 0 RECV 4
+ 0x7c, // Timer B2 5
+ 0x7b, // Timer B1 6
+ 0x7a, // Timer B0 7
+ 0x79, // Timer A4 8
+ 0x78, // Timer A3 9
+ 0x77, // Timer A2 10
+ 0x76, // Timer A1 11
+ 0x75, // Timer A0 12
+ 0x7f, // IRQ 2 13
+ 0x7e, // IRQ 1 14
+ 0x7d, // IRQ 0 15
// non-maskable
- 0, // watchdog
- 0, // debugger control
- 0, // BRK
- 0, // divide by zero
- 0, // reset
+ 0, // watchdog
+ 0, // debugger control
+ 0, // BRK
+ 0, // divide by zero
+ 0, // reset
};
static const int m37710_irq_vectors[M37710_LINE_MAX] =
@@ -98,7 +98,7 @@ static const int m37710_irq_vectors[M37710_LINE_MAX] =
0xffd8, // UART1 transmit
0xffda, // UART1 receive
0xffdc, // UART0 transmit
- 0xffde, // UART0 receive
+ 0xffde, // UART0 receive
0xffe0, // Timer B2
0xffe2, // Timer B1
0xffe4, // Timer B0
@@ -113,10 +113,10 @@ static const int m37710_irq_vectors[M37710_LINE_MAX] =
// non-maskable
0xfff6, // watchdog timer
- 0xfff8, // debugger control (not used in shipping ICs?)
+ 0xfff8, // debugger control (not used in shipping ICs?)
0xfffa, // BRK
0xfffc, // divide by zero
- 0xfffe, // RESET
+ 0xfffe, // RESET
};
// M37710 internal peripherals
@@ -140,7 +140,7 @@ static const char *const m37710_rnames[128] =
"Port P5 dir reg",
"Port P6 reg",
"Port P7 reg",
- "Port P6 dir reg", // 16 (0x10)
+ "Port P6 dir reg", // 16 (0x10)
"Port P7 dir reg",
"Port P8 reg",
"",
@@ -156,7 +156,7 @@ static const char *const m37710_rnames[128] =
"",
"A/D control reg",
"A/D sweep pin select",
- "A/D 0", // 32 (0x20)
+ "A/D 0", // 32 (0x20)
"",
"A/D 1",
"",
@@ -172,15 +172,15 @@ static const char *const m37710_rnames[128] =
"",
"A/D 7",
"",
- "UART0 transmit/recv mode", // 48 (0x30)
- "UART0 baud rate", // 0x31
- "UART0 transmit buf L", // 0x32
- "UART0 transmit buf H", // 0x33
- "UART0 transmit/recv ctrl 0", // 0x34
- "UART0 transmit/recv ctrl 1", // 0x35
- "UART0 recv buf L", // 0x36
- "UART0 recv buf H", // 0x37
- "UART1 transmit/recv mode", // 0x38
+ "UART0 transmit/recv mode", // 48 (0x30)
+ "UART0 baud rate", // 0x31
+ "UART0 transmit buf L", // 0x32
+ "UART0 transmit buf H", // 0x33
+ "UART0 transmit/recv ctrl 0", // 0x34
+ "UART0 transmit/recv ctrl 1", // 0x35
+ "UART0 recv buf L", // 0x36
+ "UART0 recv buf H", // 0x37
+ "UART1 transmit/recv mode", // 0x38
"UART1 baud rate",
"UART1 transmit buf L",
"UART1 transmit buf H",
@@ -327,7 +327,7 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer)
{
switch (cpustate->m37710_regs[0x56+timer] & 0x3)
{
- case 0: // timer mode
+ case 0: // timer mode
time = attotime::from_hz(cpustate->device->unscaled_clock()) * tscales[cpustate->m37710_regs[0x56+timer]>>6];
time *= (tval + 1);
@@ -339,19 +339,19 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer)
cpustate->reload[timer] = time;
break;
- case 1: // event counter mode
+ case 1: // event counter mode
#if M37710_DEBUG
logerror("Timer %d in event counter mode\n", timer);
#endif
break;
- case 2: // one-shot pulse mode
+ case 2: // one-shot pulse mode
#if M37710_DEBUG
logerror("Timer %d in one-shot mode\n", timer);
#endif
break;
- case 3: // PWM mode
+ case 3: // PWM mode
#if M37710_DEBUG
logerror("Timer %d in PWM mode\n", timer);
#endif
@@ -362,7 +362,7 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer)
{
switch (cpustate->m37710_regs[0x56+timer] & 0x3)
{
- case 0: // timer mode
+ case 0: // timer mode
time = attotime::from_hz(cpustate->device->unscaled_clock()) * tscales[cpustate->m37710_regs[0x56+timer]>>6];
time *= (tval + 1);
@@ -374,13 +374,13 @@ static void m37710_recalc_timer(m37710i_cpu_struct *cpustate, int timer)
cpustate->reload[timer] = time;
break;
- case 1: // event counter mode
+ case 1: // event counter mode
#if M37710_DEBUG
logerror("Timer %d in event counter mode\n", timer);
#endif
break;
- case 2: // pulse period/pulse width measurement mode
+ case 2: // pulse period/pulse width measurement mode
#if M37710_DEBUG
logerror("Timer %d in pulse period/width measurement mode\n", timer);
#endif
@@ -512,7 +512,7 @@ static void m37710_internal_w(m37710i_cpu_struct *cpustate, int offset, UINT8 da
UINT8 d;
#if M37710_DEBUG
- if (offset != 0x60) // filter out watchdog
+ if (offset != 0x60) // filter out watchdog
logerror("m37710_internal_w %x to %02x: %s = %x\n", data, (int)offset, m37710_rnames[(int)offset], cpustate->m37710_regs[offset]);
#endif
@@ -568,7 +568,7 @@ static void m37710_internal_w(m37710i_cpu_struct *cpustate, int offset, UINT8 da
cpustate->io->write_byte(M37710_PORT8, data&d);
break;
- case 0x40: // count start
+ case 0x40: // count start
for (i = 0; i < 8; i++)
{
if ((data & (1<<i)) && !(prevdata & (1<<i)))
@@ -724,13 +724,13 @@ INLINE void m37710i_push_16(m37710i_cpu_struct *cpustate, uint value)
INLINE uint m37710i_get_reg_p(m37710i_cpu_struct *cpustate)
{
- return (FLAG_N&0x80) |
- ((FLAG_V>>1)&0x40) |
- FLAG_M |
- FLAG_X |
- FLAG_D |
- FLAG_I |
- ((!FLAG_Z)<<1) |
+ return (FLAG_N&0x80) |
+ ((FLAG_V>>1)&0x40) |
+ FLAG_M |
+ FLAG_X |
+ FLAG_D |
+ FLAG_I |
+ ((!FLAG_Z)<<1) |
((FLAG_C>>8)&1);
}
@@ -763,7 +763,7 @@ void m37710i_update_irqs(m37710i_cpu_struct *cpustate)
// non-maskable
wantedIRQ = curirq;
curpri = 7;
- break; // no more processing, NMIs always win
+ break; // no more processing, NMIs always win
}
}
}
@@ -793,7 +793,7 @@ void m37710i_update_irqs(m37710i_cpu_struct *cpustate)
// then PB=0, PC=(vector)
REG_PB = 0;
REG_PC = m37710_read_8(m37710_irq_vectors[wantedIRQ]) |
- m37710_read_8(m37710_irq_vectors[wantedIRQ]+1)<<8;
+ m37710_read_8(m37710_irq_vectors[wantedIRQ]+1)<<8;
// logerror("IRQ @ %06x\n", REG_PB | REG_PC);
m37710i_jumping(REG_PB | REG_PC);
}
@@ -1046,10 +1046,10 @@ static CPU_SET_INFO( m37710 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_ADC: m37710_set_irq_line(cpustate, M37710_LINE_ADC, info->i); break;
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: m37710_set_irq_line(cpustate, M37710_LINE_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: m37710_set_irq_line(cpustate, M37710_LINE_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: m37710_set_irq_line(cpustate, M37710_LINE_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_ADC: m37710_set_irq_line(cpustate, M37710_LINE_ADC, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: m37710_set_irq_line(cpustate, M37710_LINE_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: m37710_set_irq_line(cpustate, M37710_LINE_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: m37710_set_irq_line(cpustate, M37710_LINE_IRQ2, info->i); break;
case CPUINFO_INT_INPUT_STATE + M37710_LINE_TIMERA0TICK: m37710_external_tick(cpustate, state - CPUINFO_INT_INPUT_STATE - M37710_LINE_TIMERA0TICK, info->i); break;
case CPUINFO_INT_INPUT_STATE + M37710_LINE_TIMERA1TICK: m37710_external_tick(cpustate, state - CPUINFO_INT_INPUT_STATE - M37710_LINE_TIMERA0TICK, info->i); break;
@@ -1060,21 +1060,21 @@ static CPU_SET_INFO( m37710 )
case CPUINFO_INT_INPUT_STATE + M37710_LINE_TIMERB1TICK: m37710_external_tick(cpustate, state - CPUINFO_INT_INPUT_STATE - M37710_LINE_TIMERA0TICK, info->i); break;
case CPUINFO_INT_INPUT_STATE + M37710_LINE_TIMERB2TICK: m37710_external_tick(cpustate, state - CPUINFO_INT_INPUT_STATE - M37710_LINE_TIMERA0TICK, info->i); break;
- case CPUINFO_INT_PC: REG_PB = info->i & 0xff0000; m37710_set_pc(cpustate, info->i & 0xffff); break;
- case CPUINFO_INT_SP: m37710_set_sp(cpustate, info->i); break;
-
- case CPUINFO_INT_REGISTER + M37710_PC: m37710_set_reg(cpustate, M37710_PC, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_S: m37710_set_reg(cpustate, M37710_S, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_P: m37710_set_reg(cpustate, M37710_P, info->i&0xff); cpustate->ipl = (info->i>>8)&0xff; break;
- case CPUINFO_INT_REGISTER + M37710_A: m37710_set_reg(cpustate, M37710_A, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_X: m37710_set_reg(cpustate, M37710_X, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_Y: m37710_set_reg(cpustate, M37710_Y, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_PB: m37710_set_reg(cpustate, M37710_PB, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_DB: m37710_set_reg(cpustate, M37710_DB, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_D: m37710_set_reg(cpustate, M37710_D, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_E: m37710_set_reg(cpustate, M37710_E, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_NMI_STATE: m37710_set_reg(cpustate, M37710_NMI_STATE, info->i); break;
- case CPUINFO_INT_REGISTER + M37710_IRQ_STATE: m37710_set_reg(cpustate, M37710_IRQ_STATE, info->i); break;
+ case CPUINFO_INT_PC: REG_PB = info->i & 0xff0000; m37710_set_pc(cpustate, info->i & 0xffff); break;
+ case CPUINFO_INT_SP: m37710_set_sp(cpustate, info->i); break;
+
+ case CPUINFO_INT_REGISTER + M37710_PC: m37710_set_reg(cpustate, M37710_PC, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_S: m37710_set_reg(cpustate, M37710_S, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_P: m37710_set_reg(cpustate, M37710_P, info->i&0xff); cpustate->ipl = (info->i>>8)&0xff; break;
+ case CPUINFO_INT_REGISTER + M37710_A: m37710_set_reg(cpustate, M37710_A, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_X: m37710_set_reg(cpustate, M37710_X, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_Y: m37710_set_reg(cpustate, M37710_Y, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_PB: m37710_set_reg(cpustate, M37710_PB, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_DB: m37710_set_reg(cpustate, M37710_DB, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_D: m37710_set_reg(cpustate, M37710_D, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_E: m37710_set_reg(cpustate, M37710_E, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_NMI_STATE: m37710_set_reg(cpustate, M37710_NMI_STATE, info->i); break;
+ case CPUINFO_INT_REGISTER + M37710_IRQ_STATE: m37710_set_reg(cpustate, M37710_IRQ_STATE, info->i); break;
}
}
@@ -1095,70 +1095,70 @@ CPU_GET_INFO( m37710 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m37710i_cpu_struct); break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
- case CPUINFO_INT_INPUT_LINES: info->i = M37710_LINE_MAX; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + M37710_LINE_RESET: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = REG_PPC; break;
- case CPUINFO_INT_PC: info->i = (REG_PB | REG_PC); break;
- case CPUINFO_INT_SP: info->i = m37710_get_sp(cpustate); break;
-
- case CPUINFO_INT_REGISTER + M37710_PC: info->i = m37710_get_reg(cpustate, M37710_PC); break;
- case CPUINFO_INT_REGISTER + M37710_S: info->i = m37710_get_reg(cpustate, M37710_S); break;
- case CPUINFO_INT_REGISTER + M37710_P: info->i = m37710_get_reg(cpustate, M37710_P) | (cpustate->ipl<<8); break;
- case CPUINFO_INT_REGISTER + M37710_A: info->i = m37710_get_reg(cpustate, M37710_A); break;
- case CPUINFO_INT_REGISTER + M37710_B: info->i = m37710_get_reg(cpustate, M37710_B); break;
- case CPUINFO_INT_REGISTER + M37710_X: info->i = m37710_get_reg(cpustate, M37710_X); break;
- case CPUINFO_INT_REGISTER + M37710_Y: info->i = m37710_get_reg(cpustate, M37710_Y); break;
- case CPUINFO_INT_REGISTER + M37710_PB: info->i = m37710_get_reg(cpustate, M37710_PB); break;
- case CPUINFO_INT_REGISTER + M37710_DB: info->i = m37710_get_reg(cpustate, M37710_DB); break;
- case CPUINFO_INT_REGISTER + M37710_D: info->i = m37710_get_reg(cpustate, M37710_D); break;
- case CPUINFO_INT_REGISTER + M37710_E: info->i = m37710_get_reg(cpustate, M37710_E); break;
- case CPUINFO_INT_REGISTER + M37710_NMI_STATE: info->i = m37710_get_reg(cpustate, M37710_NMI_STATE); break;
- case CPUINFO_INT_REGISTER + M37710_IRQ_STATE: info->i = m37710_get_reg(cpustate, M37710_IRQ_STATE); break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m37710i_cpu_struct); break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
+ case CPUINFO_INT_INPUT_LINES: info->i = M37710_LINE_MAX; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ0: info->i = 0; break;
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ1: info->i = 0; break;
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_IRQ2: info->i = 0; break;
+ case CPUINFO_INT_INPUT_STATE + M37710_LINE_RESET: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = REG_PPC; break;
+ case CPUINFO_INT_PC: info->i = (REG_PB | REG_PC); break;
+ case CPUINFO_INT_SP: info->i = m37710_get_sp(cpustate); break;
+
+ case CPUINFO_INT_REGISTER + M37710_PC: info->i = m37710_get_reg(cpustate, M37710_PC); break;
+ case CPUINFO_INT_REGISTER + M37710_S: info->i = m37710_get_reg(cpustate, M37710_S); break;
+ case CPUINFO_INT_REGISTER + M37710_P: info->i = m37710_get_reg(cpustate, M37710_P) | (cpustate->ipl<<8); break;
+ case CPUINFO_INT_REGISTER + M37710_A: info->i = m37710_get_reg(cpustate, M37710_A); break;
+ case CPUINFO_INT_REGISTER + M37710_B: info->i = m37710_get_reg(cpustate, M37710_B); break;
+ case CPUINFO_INT_REGISTER + M37710_X: info->i = m37710_get_reg(cpustate, M37710_X); break;
+ case CPUINFO_INT_REGISTER + M37710_Y: info->i = m37710_get_reg(cpustate, M37710_Y); break;
+ case CPUINFO_INT_REGISTER + M37710_PB: info->i = m37710_get_reg(cpustate, M37710_PB); break;
+ case CPUINFO_INT_REGISTER + M37710_DB: info->i = m37710_get_reg(cpustate, M37710_DB); break;
+ case CPUINFO_INT_REGISTER + M37710_D: info->i = m37710_get_reg(cpustate, M37710_D); break;
+ case CPUINFO_INT_REGISTER + M37710_E: info->i = m37710_get_reg(cpustate, M37710_E); break;
+ case CPUINFO_INT_REGISTER + M37710_NMI_STATE: info->i = m37710_get_reg(cpustate, M37710_NMI_STATE); break;
+ case CPUINFO_INT_REGISTER + M37710_IRQ_STATE: info->i = m37710_get_reg(cpustate, M37710_IRQ_STATE); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m37710); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m37710); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(m37710); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(m37710); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(m37710); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m37710); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->ICount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m37710); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m37710); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(m37710); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(m37710); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(m37710); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m37710); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->ICount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(m37710_internal_map); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map8 = NULL; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "M37710"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "M7700"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.2"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright R. Belmont, based on G65816 by Karl Stenerud"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "M37710"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "M7700"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.2"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright R. Belmont, based on G65816 by Karl Stenerud"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -1172,26 +1172,26 @@ CPU_GET_INFO( m37710 )
cpustate->flag_c & CFLAG_SET ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + M37710_PC: sprintf(info->s, "PC:%04X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + M37710_PB: sprintf(info->s, "PB:%02X", cpustate->pb>>16); break;
- case CPUINFO_STR_REGISTER + M37710_DB: sprintf(info->s, "DB:%02X", cpustate->db>>16); break;
- case CPUINFO_STR_REGISTER + M37710_D: sprintf(info->s, "D:%04X", cpustate->d); break;
- case CPUINFO_STR_REGISTER + M37710_S: sprintf(info->s, "S:%04X", cpustate->s); break;
- case CPUINFO_STR_REGISTER + M37710_P: sprintf(info->s, "P:%04X",
- (cpustate->flag_n&0x80) |
- ((cpustate->flag_v>>1)&0x40) |
- cpustate->flag_m |
- cpustate->flag_x |
- cpustate->flag_d |
- cpustate->flag_i |
- ((!cpustate->flag_z)<<1) |
+ case CPUINFO_STR_REGISTER + M37710_PC: sprintf(info->s, "PC:%04X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + M37710_PB: sprintf(info->s, "PB:%02X", cpustate->pb>>16); break;
+ case CPUINFO_STR_REGISTER + M37710_DB: sprintf(info->s, "DB:%02X", cpustate->db>>16); break;
+ case CPUINFO_STR_REGISTER + M37710_D: sprintf(info->s, "D:%04X", cpustate->d); break;
+ case CPUINFO_STR_REGISTER + M37710_S: sprintf(info->s, "S:%04X", cpustate->s); break;
+ case CPUINFO_STR_REGISTER + M37710_P: sprintf(info->s, "P:%04X",
+ (cpustate->flag_n&0x80) |
+ ((cpustate->flag_v>>1)&0x40) |
+ cpustate->flag_m |
+ cpustate->flag_x |
+ cpustate->flag_d |
+ cpustate->flag_i |
+ ((!cpustate->flag_z)<<1) |
((cpustate->flag_c>>8)&1) | (cpustate->ipl<<8)); break;
- case CPUINFO_STR_REGISTER + M37710_E: sprintf(info->s, "E:%d", cpustate->flag_e); break;
- case CPUINFO_STR_REGISTER + M37710_A: sprintf(info->s, "A:%04X", cpustate->a | cpustate->b); break;
- case CPUINFO_STR_REGISTER + M37710_B: sprintf(info->s, "B:%04X", cpustate->ba | cpustate->bb); break;
- case CPUINFO_STR_REGISTER + M37710_X: sprintf(info->s, "X:%04X", cpustate->x); break;
- case CPUINFO_STR_REGISTER + M37710_Y: sprintf(info->s, "Y:%04X", cpustate->y); break;
- case CPUINFO_STR_REGISTER + M37710_IRQ_STATE: sprintf(info->s, "IRQ:%X", cpustate->line_irq); break;
+ case CPUINFO_STR_REGISTER + M37710_E: sprintf(info->s, "E:%d", cpustate->flag_e); break;
+ case CPUINFO_STR_REGISTER + M37710_A: sprintf(info->s, "A:%04X", cpustate->a | cpustate->b); break;
+ case CPUINFO_STR_REGISTER + M37710_B: sprintf(info->s, "B:%04X", cpustate->ba | cpustate->bb); break;
+ case CPUINFO_STR_REGISTER + M37710_X: sprintf(info->s, "X:%04X", cpustate->x); break;
+ case CPUINFO_STR_REGISTER + M37710_Y: sprintf(info->s, "Y:%04X", cpustate->y); break;
+ case CPUINFO_STR_REGISTER + M37710_IRQ_STATE: sprintf(info->s, "IRQ:%X", cpustate->line_irq); break;
}
}
diff --git a/src/emu/cpu/m37710/m37710cm.h b/src/emu/cpu/m37710/m37710cm.h
index 8ce598e0615..a22de90f1c4 100644
--- a/src/emu/cpu/m37710/m37710cm.h
+++ b/src/emu/cpu/m37710/m37710cm.h
@@ -21,12 +21,12 @@
#undef M37710_CALL_DEBUGGER
-#define M37710_CALL_DEBUGGER(x) debugger_instruction_hook(cpustate->device, x)
-#define m37710_read_8(addr) cpustate->program->read_byte(addr)
-#define m37710_write_8(addr,data) cpustate->program->write_byte(addr,data)
-#define m37710_read_8_immediate(A) cpustate->program->read_byte(A)
-#define m37710_read_16(addr) cpustate->program->read_word(addr)
-#define m37710_write_16(addr,data) cpustate->program->write_word(addr,data)
+#define M37710_CALL_DEBUGGER(x) debugger_instruction_hook(cpustate->device, x)
+#define m37710_read_8(addr) cpustate->program->read_byte(addr)
+#define m37710_write_8(addr,data) cpustate->program->write_byte(addr,data)
+#define m37710_read_8_immediate(A) cpustate->program->read_byte(A)
+#define m37710_read_16(addr) cpustate->program->read_word(addr)
+#define m37710_write_16(addr,data) cpustate->program->write_word(addr,data)
#define m37710_jumping(A)
#define m37710_branching(A)
@@ -58,14 +58,14 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
#define MAKE_UINT_24(A) ((A)&0xffffff)
/* Bits */
-#define BIT_0 0x01
-#define BIT_1 0x02
-#define BIT_2 0x04
-#define BIT_3 0x08
-#define BIT_4 0x10
-#define BIT_5 0x20
-#define BIT_6 0x40
-#define BIT_7 0x80
+#define BIT_0 0x01
+#define BIT_1 0x02
+#define BIT_2 0x04
+#define BIT_3 0x08
+#define BIT_4 0x10
+#define BIT_5 0x20
+#define BIT_6 0x40
+#define BIT_7 0x80
/* ======================================================================== */
/* ================================== CPU ================================= */
@@ -74,49 +74,49 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
/* CPU Structure */
struct m37710i_cpu_struct
{
- uint a; /* Accumulator */
- uint b; /* holds high byte of accumulator */
- uint ba; /* Secondary Accumulator */
- uint bb; /* holds high byte of secondary accumulator */
- uint x; /* Index Register X */
- uint y; /* Index Register Y */
- uint xh; /* holds high byte of x */
- uint yh; /* holds high byte of y */
- uint s; /* Stack Pointer */
- uint pc; /* Program Counter */
- uint ppc; /* Previous Program Counter */
- uint pb; /* Program Bank (shifted left 16) */
- uint db; /* Data Bank (shifted left 16) */
- uint d; /* Direct Register */
- uint flag_e; /* Emulation Mode Flag */
- uint flag_m; /* Memory/Accumulator Select Flag */
- uint flag_x; /* Index Select Flag */
- uint flag_n; /* Negative Flag */
- uint flag_v; /* Overflow Flag */
- uint flag_d; /* Decimal Mode Flag */
- uint flag_i; /* Interrupt Mask Flag */
- uint flag_z; /* Zero Flag (inverted) */
- uint flag_c; /* Carry Flag */
- uint line_irq; /* Bitmask of pending IRQs */
- uint ipl; /* Interrupt priority level (top of PSW) */
- uint ir; /* Instruction Register */
- uint im; /* Immediate load value */
- uint im2; /* Immediate load target */
- uint im3; /* Immediate load target */
- uint im4; /* Immediate load target */
- uint irq_delay; /* delay 1 instruction before checking irq */
- uint irq_level; /* irq level */
- int ICount; /* cycle count */
- uint source; /* temp register */
- uint destination; /* temp register */
+ uint a; /* Accumulator */
+ uint b; /* holds high byte of accumulator */
+ uint ba; /* Secondary Accumulator */
+ uint bb; /* holds high byte of secondary accumulator */
+ uint x; /* Index Register X */
+ uint y; /* Index Register Y */
+ uint xh; /* holds high byte of x */
+ uint yh; /* holds high byte of y */
+ uint s; /* Stack Pointer */
+ uint pc; /* Program Counter */
+ uint ppc; /* Previous Program Counter */
+ uint pb; /* Program Bank (shifted left 16) */
+ uint db; /* Data Bank (shifted left 16) */
+ uint d; /* Direct Register */
+ uint flag_e; /* Emulation Mode Flag */
+ uint flag_m; /* Memory/Accumulator Select Flag */
+ uint flag_x; /* Index Select Flag */
+ uint flag_n; /* Negative Flag */
+ uint flag_v; /* Overflow Flag */
+ uint flag_d; /* Decimal Mode Flag */
+ uint flag_i; /* Interrupt Mask Flag */
+ uint flag_z; /* Zero Flag (inverted) */
+ uint flag_c; /* Carry Flag */
+ uint line_irq; /* Bitmask of pending IRQs */
+ uint ipl; /* Interrupt priority level (top of PSW) */
+ uint ir; /* Instruction Register */
+ uint im; /* Immediate load value */
+ uint im2; /* Immediate load target */
+ uint im3; /* Immediate load target */
+ uint im4; /* Immediate load target */
+ uint irq_delay; /* delay 1 instruction before checking irq */
+ uint irq_level; /* irq level */
+ int ICount; /* cycle count */
+ uint source; /* temp register */
+ uint destination; /* temp register */
device_irq_acknowledge_callback int_ack;
legacy_cpu_device *device;
address_space *program;
address_space *io;
- uint stopped; /* Sets how the CPU is stopped */
- void (*const *opcodes)(m37710i_cpu_struct *cpustate); /* opcodes with no prefix */
- void (*const *opcodes42)(m37710i_cpu_struct *cpustate); /* opcodes with 0x42 prefix */
- void (*const *opcodes89)(m37710i_cpu_struct *cpustate); /* opcodes with 0x89 prefix */
+ uint stopped; /* Sets how the CPU is stopped */
+ void (*const *opcodes)(m37710i_cpu_struct *cpustate); /* opcodes with no prefix */
+ void (*const *opcodes42)(m37710i_cpu_struct *cpustate); /* opcodes with 0x42 prefix */
+ void (*const *opcodes89)(m37710i_cpu_struct *cpustate); /* opcodes with 0x89 prefix */
uint (*get_reg)(m37710i_cpu_struct *cpustate, int regnum);
void (*set_reg)(m37710i_cpu_struct *cpustate, int regnum, uint val);
void (*set_line)(m37710i_cpu_struct *cpustate, int line, int state);
@@ -132,7 +132,7 @@ INLINE m37710i_cpu_struct *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M37710 ||
- device->type() == M37702);
+ device->type() == M37702);
return (m37710i_cpu_struct *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -147,53 +147,53 @@ extern void (*const m37710i_set_reg[])(m37710i_cpu_struct *cpustate,int regnum,
extern void (*const m37710i_set_line[])(m37710i_cpu_struct *cpustate,int line, int state);
extern int (*const m37710i_execute[])(m37710i_cpu_struct *cpustate, int cycles);
-#define REG_A cpustate->a /* Accumulator */
-#define REG_B cpustate->b /* Accumulator hi byte */
-#define REG_BA cpustate->ba /* Secondary Accumulator */
-#define REG_BB cpustate->bb /* Secondary Accumulator hi byte */
-#define REG_X cpustate->x /* Index X Register */
-#define REG_Y cpustate->y /* Index Y Register */
-#define REG_XH cpustate->xh /* X high byte */
-#define REG_YH cpustate->yh /* Y high byte */
-#define REG_S cpustate->s /* Stack Pointer */
-#define REG_PC cpustate->pc /* Program Counter */
-#define REG_PPC cpustate->ppc /* Previous Program Counter */
-#define REG_PB cpustate->pb /* Program Bank */
-#define REG_DB cpustate->db /* Data Bank */
-#define REG_D cpustate->d /* Direct Register */
-#define FLAG_M cpustate->flag_m /* Memory/Accumulator Select Flag */
-#define FLAG_X cpustate->flag_x /* Index Select Flag */
-#define FLAG_N cpustate->flag_n /* Negative Flag */
-#define FLAG_V cpustate->flag_v /* Overflow Flag */
-#define FLAG_D cpustate->flag_d /* Decimal Mode Flag */
-#define FLAG_I cpustate->flag_i /* Interrupt Mask Flag */
-#define FLAG_Z cpustate->flag_z /* Zero Flag (inverted) */
-#define FLAG_C cpustate->flag_c /* Carry Flag */
-#define LINE_IRQ cpustate->line_irq /* Status of the IRQ line */
-#define REG_IR cpustate->ir /* Instruction Register */
-#define REG_IM cpustate->im /* Immediate load value */
-#define REG_IM2 cpustate->im2 /* Immediate load target */
-#define REG_IM3 cpustate->im3 /* Immediate load target */
-#define REG_IM4 cpustate->im4 /* Immediate load target */
-#define INT_ACK cpustate->int_ack /* Interrupt Acknowledge function pointer */
-#define CLOCKS cpustate->ICount /* Clock cycles remaining */
-#define IRQ_DELAY cpustate->irq_delay /* Delay 1 instruction before checking IRQ */
-#define CPU_STOPPED cpustate->stopped /* Stopped status of the CPU */
-
-#define FTABLE_GET_REG cpustate->get_reg
-#define FTABLE_SET_REG cpustate->set_reg
-#define FTABLE_SET_LINE cpustate->set_line
-
-#define SRC cpustate->source /* Source Operand */
-#define DST cpustate->destination /* Destination Operand */
-
-#define STOP_LEVEL_WAI 1
-#define STOP_LEVEL_STOP 2
-
-#define EXECUTION_MODE_M0X0 0
-#define EXECUTION_MODE_M0X1 1
-#define EXECUTION_MODE_M1X0 2
-#define EXECUTION_MODE_M1X1 3
+#define REG_A cpustate->a /* Accumulator */
+#define REG_B cpustate->b /* Accumulator hi byte */
+#define REG_BA cpustate->ba /* Secondary Accumulator */
+#define REG_BB cpustate->bb /* Secondary Accumulator hi byte */
+#define REG_X cpustate->x /* Index X Register */
+#define REG_Y cpustate->y /* Index Y Register */
+#define REG_XH cpustate->xh /* X high byte */
+#define REG_YH cpustate->yh /* Y high byte */
+#define REG_S cpustate->s /* Stack Pointer */
+#define REG_PC cpustate->pc /* Program Counter */
+#define REG_PPC cpustate->ppc /* Previous Program Counter */
+#define REG_PB cpustate->pb /* Program Bank */
+#define REG_DB cpustate->db /* Data Bank */
+#define REG_D cpustate->d /* Direct Register */
+#define FLAG_M cpustate->flag_m /* Memory/Accumulator Select Flag */
+#define FLAG_X cpustate->flag_x /* Index Select Flag */
+#define FLAG_N cpustate->flag_n /* Negative Flag */
+#define FLAG_V cpustate->flag_v /* Overflow Flag */
+#define FLAG_D cpustate->flag_d /* Decimal Mode Flag */
+#define FLAG_I cpustate->flag_i /* Interrupt Mask Flag */
+#define FLAG_Z cpustate->flag_z /* Zero Flag (inverted) */
+#define FLAG_C cpustate->flag_c /* Carry Flag */
+#define LINE_IRQ cpustate->line_irq /* Status of the IRQ line */
+#define REG_IR cpustate->ir /* Instruction Register */
+#define REG_IM cpustate->im /* Immediate load value */
+#define REG_IM2 cpustate->im2 /* Immediate load target */
+#define REG_IM3 cpustate->im3 /* Immediate load target */
+#define REG_IM4 cpustate->im4 /* Immediate load target */
+#define INT_ACK cpustate->int_ack /* Interrupt Acknowledge function pointer */
+#define CLOCKS cpustate->ICount /* Clock cycles remaining */
+#define IRQ_DELAY cpustate->irq_delay /* Delay 1 instruction before checking IRQ */
+#define CPU_STOPPED cpustate->stopped /* Stopped status of the CPU */
+
+#define FTABLE_GET_REG cpustate->get_reg
+#define FTABLE_SET_REG cpustate->set_reg
+#define FTABLE_SET_LINE cpustate->set_line
+
+#define SRC cpustate->source /* Source Operand */
+#define DST cpustate->destination /* Destination Operand */
+
+#define STOP_LEVEL_WAI 1
+#define STOP_LEVEL_STOP 2
+
+#define EXECUTION_MODE_M0X0 0
+#define EXECUTION_MODE_M0X1 1
+#define EXECUTION_MODE_M1X0 2
+#define EXECUTION_MODE_M1X1 3
INLINE void m37710i_set_execution_mode(m37710i_cpu_struct *cpustate, uint mode)
{
@@ -210,61 +210,61 @@ INLINE void m37710i_set_execution_mode(m37710i_cpu_struct *cpustate, uint mode)
/* ================================= CLOCK ================================ */
/* ======================================================================== */
-#define CLK_OP 1
-#define CLK_R8 1
-#define CLK_R16 2
-#define CLK_R24 3
-#define CLK_W8 1
-#define CLK_W16 2
-#define CLK_W24 3
-#define CLK_RMW8 3
-#define CLK_RMW16 5
-
-#define CLK_IMPLIED 1
-#define CLK_IMPLIED 1
-#define CLK_RELATIVE_8 1
-#define CLK_RELATIVE_16 2
-#define CLK_IMM 0
-#define CLK_AI 4
-#define CLK_AXI 4
-#define CLK_A 2
-#define CLK_AL 3
-#define CLK_ALX 3
-#define CLK_AX 2
-#define CLK_AY 2
-#define CLK_D 1
-#define CLK_DI 3
-#define CLK_DIY 3
-#define CLK_DLI 4
-#define CLK_DLIY 4
-#define CLK_DX 2
-#define CLK_DXI 4
-#define CLK_DY 2
-#define CLK_S 2
-#define CLK_SIY 5
+#define CLK_OP 1
+#define CLK_R8 1
+#define CLK_R16 2
+#define CLK_R24 3
+#define CLK_W8 1
+#define CLK_W16 2
+#define CLK_W24 3
+#define CLK_RMW8 3
+#define CLK_RMW16 5
+
+#define CLK_IMPLIED 1
+#define CLK_IMPLIED 1
+#define CLK_RELATIVE_8 1
+#define CLK_RELATIVE_16 2
+#define CLK_IMM 0
+#define CLK_AI 4
+#define CLK_AXI 4
+#define CLK_A 2
+#define CLK_AL 3
+#define CLK_ALX 3
+#define CLK_AX 2
+#define CLK_AY 2
+#define CLK_D 1
+#define CLK_DI 3
+#define CLK_DIY 3
+#define CLK_DLI 4
+#define CLK_DLIY 4
+#define CLK_DX 2
+#define CLK_DXI 4
+#define CLK_DY 2
+#define CLK_S 2
+#define CLK_SIY 5
/* AX and AY addressing modes take 1 extra cycle when writing */
-#define CLK_W_IMM 0
-#define CLK_W_AI 4
-#define CLK_W_AXI 4
-#define CLK_W_A 2
-#define CLK_W_AL 3
-#define CLK_W_ALX 3
-#define CLK_W_AX 3
-#define CLK_W_AY 3
-#define CLK_W_D 1
-#define CLK_W_DI 3
-#define CLK_W_DIY 3
-#define CLK_W_DLI 4
-#define CLK_W_DLIY 4
-#define CLK_W_DX 2
-#define CLK_W_DXI 4
-#define CLK_W_DY 2
-#define CLK_W_S 2
-#define CLK_W_SIY 5
-
-#define CLK(A) CLOCKS -= (A)
-#define USE_ALL_CLKS() CLOCKS = 0
+#define CLK_W_IMM 0
+#define CLK_W_AI 4
+#define CLK_W_AXI 4
+#define CLK_W_A 2
+#define CLK_W_AL 3
+#define CLK_W_ALX 3
+#define CLK_W_AX 3
+#define CLK_W_AY 3
+#define CLK_W_D 1
+#define CLK_W_DI 3
+#define CLK_W_DIY 3
+#define CLK_W_DLI 4
+#define CLK_W_DLIY 4
+#define CLK_W_DX 2
+#define CLK_W_DXI 4
+#define CLK_W_DY 2
+#define CLK_W_S 2
+#define CLK_W_SIY 5
+
+#define CLK(A) CLOCKS -= (A)
+#define USE_ALL_CLKS() CLOCKS = 0
/* ======================================================================== */
@@ -273,62 +273,62 @@ INLINE void m37710i_set_execution_mode(m37710i_cpu_struct *cpustate, uint mode)
/* Flag positions in Processor Status Register */
/* common */
-#define FLAGPOS_N BIT_7 /* Negative */
-#define FLAGPOS_V BIT_6 /* Overflow */
-#define FLAGPOS_D BIT_3 /* Decimal Mode */
-#define FLAGPOS_I BIT_2 /* Interrupt Mask */
-#define FLAGPOS_Z BIT_1 /* Zero */
-#define FLAGPOS_C BIT_0 /* Carry */
+#define FLAGPOS_N BIT_7 /* Negative */
+#define FLAGPOS_V BIT_6 /* Overflow */
+#define FLAGPOS_D BIT_3 /* Decimal Mode */
+#define FLAGPOS_I BIT_2 /* Interrupt Mask */
+#define FLAGPOS_Z BIT_1 /* Zero */
+#define FLAGPOS_C BIT_0 /* Carry */
/* emulation */
-#define FLAGPOS_R BIT_5 /* Reserved */
-#define FLAGPOS_B BIT_4 /* BRK Instruction */
+#define FLAGPOS_R BIT_5 /* Reserved */
+#define FLAGPOS_B BIT_4 /* BRK Instruction */
/* native */
-#define FLAGPOS_M BIT_5 /* Mem/Reg Select */
-#define FLAGPOS_X BIT_4 /* Index Select */
-
-#define EFLAG_SET 1
-#define EFLAG_CLEAR 0
-#define MFLAG_SET FLAGPOS_M
-#define MFLAG_CLEAR 0
-#define XFLAG_SET FLAGPOS_X
-#define XFLAG_CLEAR 0
-#define NFLAG_SET 0x80
-#define NFLAG_CLEAR 0
-#define VFLAG_SET 0x80
-#define VFLAG_CLEAR 0
-#define DFLAG_SET FLAGPOS_D
-#define DFLAG_CLEAR 0
-#define IFLAG_SET FLAGPOS_I
-#define IFLAG_CLEAR 0
-#define BFLAG_SET FLAGPOS_B
-#define BFLAG_CLEAR 0
-#define ZFLAG_SET 0
-#define ZFLAG_CLEAR 1
-#define CFLAG_SET 0x100
-#define CFLAG_CLEAR 0
+#define FLAGPOS_M BIT_5 /* Mem/Reg Select */
+#define FLAGPOS_X BIT_4 /* Index Select */
+
+#define EFLAG_SET 1
+#define EFLAG_CLEAR 0
+#define MFLAG_SET FLAGPOS_M
+#define MFLAG_CLEAR 0
+#define XFLAG_SET FLAGPOS_X
+#define XFLAG_CLEAR 0
+#define NFLAG_SET 0x80
+#define NFLAG_CLEAR 0
+#define VFLAG_SET 0x80
+#define VFLAG_CLEAR 0
+#define DFLAG_SET FLAGPOS_D
+#define DFLAG_CLEAR 0
+#define IFLAG_SET FLAGPOS_I
+#define IFLAG_CLEAR 0
+#define BFLAG_SET FLAGPOS_B
+#define BFLAG_CLEAR 0
+#define ZFLAG_SET 0
+#define ZFLAG_CLEAR 1
+#define CFLAG_SET 0x100
+#define CFLAG_CLEAR 0
/* Codition code tests */
-#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
-#define COND_CS() (FLAG_C&0x100) /* Carry Set */
-#define COND_EQ() (!FLAG_Z) /* Equal */
-#define COND_NE() FLAG_Z /* Not Equal */
-#define COND_MI() (FLAG_N&0x80) /* Minus */
-#define COND_PL() (!(FLAG_N&0x80)) /* Plus */
-#define COND_VC() (!(FLAG_V&0x80)) /* Overflow Clear */
-#define COND_VS() (FLAG_V&0x80) /* Overflow Set */
+#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
+#define COND_CS() (FLAG_C&0x100) /* Carry Set */
+#define COND_EQ() (!FLAG_Z) /* Equal */
+#define COND_NE() FLAG_Z /* Not Equal */
+#define COND_MI() (FLAG_N&0x80) /* Minus */
+#define COND_PL() (!(FLAG_N&0x80)) /* Plus */
+#define COND_VC() (!(FLAG_V&0x80)) /* Overflow Clear */
+#define COND_VS() (FLAG_V&0x80) /* Overflow Set */
/* Set Overflow flag in math operations */
-#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
-#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
-#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
-#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
+#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
+#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
+#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
+#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
-#define CFLAG_8(A) (A)
-#define CFLAG_16(A) ((A)>>8)
-#define NFLAG_8(A) (A)
-#define NFLAG_16(A) ((A)>>8)
+#define CFLAG_8(A) (A)
+#define CFLAG_16(A) ((A)>>8)
+#define NFLAG_8(A) (A)
+#define NFLAG_16(A) ((A)>>8)
-#define CFLAG_AS_1() ((FLAG_C>>8)&1)
+#define CFLAG_AS_1() ((FLAG_C>>8)&1)
/* update IRQ state (internal use only) */
void m37710i_update_irqs(m37710i_cpu_struct *cpustate);
diff --git a/src/emu/cpu/m37710/m37710op.h b/src/emu/cpu/m37710/m37710op.h
index 3f17ea89f00..5255f667bce 100644
--- a/src/emu/cpu/m37710/m37710op.h
+++ b/src/emu/cpu/m37710/m37710op.h
@@ -108,19 +108,19 @@ INLINE void m37710i_write_16_direct(m37710i_cpu_struct *cpustate, uint address,
INLINE uint m37710i_read_24_normal(m37710i_cpu_struct *cpustate, uint address)
{
- return m37710i_read_16_normal(cpustate, address) |
+ return m37710i_read_16_normal(cpustate, address) |
(m37710i_read_8_normal(cpustate, address+2)<<16);
}
INLINE uint m37710i_read_24_immediate(m37710i_cpu_struct *cpustate, uint address)
{
- return m37710i_read_16_immediate(cpustate, address) |
+ return m37710i_read_16_immediate(cpustate, address) |
(m37710i_read_8_immediate(cpustate, address+2)<<16);
}
INLINE uint m37710i_read_24_direct(m37710i_cpu_struct *cpustate, uint address)
{
- return m37710i_read_16_direct(cpustate, address) |
+ return m37710i_read_16_direct(cpustate, address) |
(m37710i_read_8_direct(cpustate, address+2)<<16);
}
@@ -267,13 +267,13 @@ INLINE void m37710i_set_flag_i(m37710i_cpu_struct *cpustate, uint value)
/* Get the Processor Status Register */
INLINE uint m37710i_get_reg_p(m37710i_cpu_struct *cpustate)
{
- return (FLAG_N&0x80) |
- ((FLAG_V>>1)&0x40) |
- FLAG_M |
- FLAG_X |
- FLAG_D |
- FLAG_I |
- ((!FLAG_Z)<<1) |
+ return (FLAG_N&0x80) |
+ ((FLAG_V>>1)&0x40) |
+ FLAG_M |
+ FLAG_X |
+ FLAG_D |
+ FLAG_I |
+ ((!FLAG_Z)<<1) |
((FLAG_C>>8)&1);
}
@@ -314,169 +314,169 @@ INLINE void m37710i_interrupt_software(m37710i_cpu_struct *cpustate, uint vector
/* ======================================================================== */
/* Effective-address based memory access macros */
-#define read_8_NORM(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_IMM(A) m37710i_read_8_immediate(cpustate, A)
-#define read_8_D(A) m37710i_read_8_direct(cpustate, A)
-#define read_8_A(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_AL(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_DX(A) m37710i_read_8_direct(cpustate, A)
-#define read_8_DY(A) m37710i_read_8_direct(cpustate, A)
-#define read_8_AX(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_ALX(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_AY(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_DI(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_DLI(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_AI(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_ALI(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_DXI(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_DIY(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_DLIY(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_AXI(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_S(A) m37710i_read_8_normal(cpustate, A)
-#define read_8_SIY(A) m37710i_read_8_normal(cpustate, A)
-
-#define read_16_NORM(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_IMM(A) m37710i_read_16_immediate(cpustate, A)
-#define read_16_D(A) m37710i_read_16_direct(cpustate, A)
-#define read_16_A(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_AL(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_DX(A) m37710i_read_16_direct(cpustate, A)
-#define read_16_DY(A) m37710i_read_16_direct(cpustate, A)
-#define read_16_AX(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_ALX(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_AY(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_DI(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_DLI(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_AI(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_ALI(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_DXI(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_DIY(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_DLIY(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_AXI(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_S(A) m37710i_read_16_normal(cpustate, A)
-#define read_16_SIY(A) m37710i_read_16_normal(cpustate, A)
-
-#define read_24_NORM(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_IMM(A) m37710i_read_24_immediate(cpustate, A)
-#define read_24_D(A) m37710i_read_24_direct(cpustate, A)
-#define read_24_A(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_AL(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_DX(A) m37710i_read_24_direct(cpustate, A)
-#define read_24_DY(A) m37710i_read_24_direct(cpustate, A)
-#define read_24_AX(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_ALX(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_AY(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_DI(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_DLI(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_AI(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_ALI(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_DXI(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_DIY(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_DLIY(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_AXI(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_S(A) m37710i_read_24_normal(cpustate, A)
-#define read_24_SIY(A) m37710i_read_24_normal(cpustate, A)
-
-#define write_8_NORM(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_D(A, V) m37710i_write_8_direct(cpustate, A, V)
-#define write_8_A(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_AL(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_DX(A, V) m37710i_write_8_direct(cpustate, A, V)
-#define write_8_DY(A, V) m37710i_write_8_direct(cpustate, A, V)
-#define write_8_AX(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_ALX(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_AY(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_DI(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_DLI(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_AI(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_ALI(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_DXI(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_DIY(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_DLIY(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_AXI(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_S(A, V) m37710i_write_8_normal(cpustate, A, V)
-#define write_8_SIY(A, V) m37710i_write_8_normal(cpustate, A, V)
-
-#define write_16_NORM(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_D(A, V) m37710i_write_16_direct(cpustate, A, V)
-#define write_16_A(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_AL(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_DX(A, V) m37710i_write_16_direct(cpustate, A, V)
-#define write_16_DY(A, V) m37710i_write_16_direct(cpustate, A, V)
-#define write_16_AX(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_ALX(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_AY(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_DI(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_DLI(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_AI(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_ALI(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_DXI(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_DIY(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_DLIY(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_AXI(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_S(A, V) m37710i_write_16_normal(cpustate, A, V)
-#define write_16_SIY(A, V) m37710i_write_16_normal(cpustate, A, V)
-
-
-#define OPER_8_IMM(cpustate) read_8_IMM(EA_IMM8(cpustate))
-#define OPER_8_D(cpustate) read_8_D(EA_D(cpustate))
-#define OPER_8_A(cpustate) read_8_A(EA_A(cpustate))
-#define OPER_8_AL(cpustate) read_8_AL(EA_AL(cpustate))
-#define OPER_8_DX(cpustate) read_8_DX(EA_DX(cpustate))
-#define OPER_8_DY(cpustate) read_8_DY(EA_DY(cpustate))
-#define OPER_8_AX(cpustate) read_8_AX(EA_AX(cpustate))
-#define OPER_8_ALX(cpustate) read_8_ALX(EA_ALX(cpustate))
-#define OPER_8_AY(cpustate) read_8_AY(EA_AY(cpustate))
-#define OPER_8_DI(cpustate) read_8_DI(EA_DI(cpustate))
-#define OPER_8_DLI(cpustate) read_8_DLI(EA_DLI(cpustate))
-#define OPER_8_AI(cpustate) read_8_AI(EA_AI(cpustate))
-#define OPER_8_ALI(cpustate) read_8_ALI(EA_ALI(cpustate))
-#define OPER_8_DXI(cpustate) read_8_DXI(EA_DXI(cpustate))
-#define OPER_8_DIY(cpustate) read_8_DIY(EA_DIY(cpustate))
-#define OPER_8_DLIY(cpustate) read_8_DLIY(EA_DLIY(cpustate))
-#define OPER_8_AXI(cpustate) read_8_AXI(EA_AXI(cpustate))
-#define OPER_8_S(cpustate) read_8_S(EA_S(cpustate))
-#define OPER_8_SIY(cpustate) read_8_SIY(EA_SIY(cpustate))
-
-#define OPER_16_IMM(cpustate) read_16_IMM(EA_IMM16(cpustate))
-#define OPER_16_D(cpustate) read_16_D(EA_D(cpustate))
-#define OPER_16_A(cpustate) read_16_A(EA_A(cpustate))
-#define OPER_16_AL(cpustate) read_16_AL(EA_AL(cpustate))
-#define OPER_16_DX(cpustate) read_16_DX(EA_DX(cpustate))
-#define OPER_16_DY(cpustate) read_16_DY(EA_DY(cpustate))
-#define OPER_16_AX(cpustate) read_16_AX(EA_AX(cpustate))
-#define OPER_16_ALX(cpustate) read_16_ALX(EA_ALX(cpustate))
-#define OPER_16_AY(cpustate) read_16_AY(EA_AY(cpustate))
-#define OPER_16_DI(cpustate) read_16_DI(EA_DI(cpustate))
-#define OPER_16_DLI(cpustate) read_16_DLI(EA_DLI(cpustate))
-#define OPER_16_AI(cpustate) read_16_AI(EA_AI(cpustate))
-#define OPER_16_ALI(cpustate) read_16_ALI(EA_ALI(cpustate))
-#define OPER_16_DXI(cpustate) read_16_DXI(EA_DXI(cpustate))
-#define OPER_16_DIY(cpustate) read_16_DIY(EA_DIY(cpustate))
-#define OPER_16_DLIY(cpustate) read_16_DLIY(EA_DLIY(cpustate))
-#define OPER_16_AXI(cpustate) read_16_AXI(EA_AXI(cpustate))
-#define OPER_16_S(cpustate) read_16_S(EA_S(cpustate))
-#define OPER_16_SIY(cpustate) read_16_SIY(EA_SIY(cpustate))
-
-#define OPER_24_IMM(cpustate) read_24_IMM(EA_IMM24(cpustate))
-#define OPER_24_D(cpustate) read_24_D(EA_D(cpustate))
-#define OPER_24_A(cpustate) read_24_A(EA_A(cpustate))
-#define OPER_24_AL(cpustate) read_24_AL(EA_AL(cpustate))
-#define OPER_24_DX(cpustate) read_24_DX(EA_DX(cpustate))
-#define OPER_24_DY(cpustate) read_24_DY(EA_DY(cpustate))
-#define OPER_24_AX(cpustate) read_24_AX(EA_AX(cpustate))
-#define OPER_24_ALX(cpustate) read_24_ALX(EA_ALX(cpustate))
-#define OPER_24_AY(cpustate) read_24_AY(EA_AY(cpustate))
-#define OPER_24_DI(cpustate) read_24_DI(EA_DI(cpustate))
-#define OPER_24_DLI(cpustate) read_24_DLI(EA_DLI(cpustate))
-#define OPER_24_AI(cpustate) read_24_AI(EA_AI(cpustate))
-#define OPER_24_ALI(cpustate) read_24_ALI(EA_ALI())
-#define OPER_24_DXI(cpustate) read_24_DXI(EA_DXI(cpustate))
-#define OPER_24_DIY(cpustate) read_24_DIY(EA_DIY(cpustate))
-#define OPER_24_DLIY(cpustate) read_24_DLIY(EA_DLIY(cpustate))
-#define OPER_24_AXI(cpustate) read_24_AXI(EA_AXI(cpustate))
-#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate))
-#define OPER_24_SIY(cpustate) read_24_SIY(EA_SIY(cpustate))
+#define read_8_NORM(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_IMM(A) m37710i_read_8_immediate(cpustate, A)
+#define read_8_D(A) m37710i_read_8_direct(cpustate, A)
+#define read_8_A(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_AL(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_DX(A) m37710i_read_8_direct(cpustate, A)
+#define read_8_DY(A) m37710i_read_8_direct(cpustate, A)
+#define read_8_AX(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_ALX(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_AY(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_DI(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_DLI(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_AI(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_ALI(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_DXI(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_DIY(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_DLIY(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_AXI(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_S(A) m37710i_read_8_normal(cpustate, A)
+#define read_8_SIY(A) m37710i_read_8_normal(cpustate, A)
+
+#define read_16_NORM(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_IMM(A) m37710i_read_16_immediate(cpustate, A)
+#define read_16_D(A) m37710i_read_16_direct(cpustate, A)
+#define read_16_A(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_AL(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_DX(A) m37710i_read_16_direct(cpustate, A)
+#define read_16_DY(A) m37710i_read_16_direct(cpustate, A)
+#define read_16_AX(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_ALX(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_AY(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_DI(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_DLI(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_AI(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_ALI(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_DXI(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_DIY(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_DLIY(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_AXI(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_S(A) m37710i_read_16_normal(cpustate, A)
+#define read_16_SIY(A) m37710i_read_16_normal(cpustate, A)
+
+#define read_24_NORM(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_IMM(A) m37710i_read_24_immediate(cpustate, A)
+#define read_24_D(A) m37710i_read_24_direct(cpustate, A)
+#define read_24_A(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_AL(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_DX(A) m37710i_read_24_direct(cpustate, A)
+#define read_24_DY(A) m37710i_read_24_direct(cpustate, A)
+#define read_24_AX(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_ALX(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_AY(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_DI(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_DLI(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_AI(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_ALI(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_DXI(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_DIY(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_DLIY(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_AXI(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_S(A) m37710i_read_24_normal(cpustate, A)
+#define read_24_SIY(A) m37710i_read_24_normal(cpustate, A)
+
+#define write_8_NORM(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_D(A, V) m37710i_write_8_direct(cpustate, A, V)
+#define write_8_A(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_AL(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_DX(A, V) m37710i_write_8_direct(cpustate, A, V)
+#define write_8_DY(A, V) m37710i_write_8_direct(cpustate, A, V)
+#define write_8_AX(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_ALX(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_AY(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_DI(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_DLI(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_AI(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_ALI(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_DXI(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_DIY(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_DLIY(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_AXI(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_S(A, V) m37710i_write_8_normal(cpustate, A, V)
+#define write_8_SIY(A, V) m37710i_write_8_normal(cpustate, A, V)
+
+#define write_16_NORM(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_D(A, V) m37710i_write_16_direct(cpustate, A, V)
+#define write_16_A(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_AL(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_DX(A, V) m37710i_write_16_direct(cpustate, A, V)
+#define write_16_DY(A, V) m37710i_write_16_direct(cpustate, A, V)
+#define write_16_AX(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_ALX(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_AY(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_DI(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_DLI(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_AI(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_ALI(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_DXI(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_DIY(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_DLIY(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_AXI(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_S(A, V) m37710i_write_16_normal(cpustate, A, V)
+#define write_16_SIY(A, V) m37710i_write_16_normal(cpustate, A, V)
+
+
+#define OPER_8_IMM(cpustate) read_8_IMM(EA_IMM8(cpustate))
+#define OPER_8_D(cpustate) read_8_D(EA_D(cpustate))
+#define OPER_8_A(cpustate) read_8_A(EA_A(cpustate))
+#define OPER_8_AL(cpustate) read_8_AL(EA_AL(cpustate))
+#define OPER_8_DX(cpustate) read_8_DX(EA_DX(cpustate))
+#define OPER_8_DY(cpustate) read_8_DY(EA_DY(cpustate))
+#define OPER_8_AX(cpustate) read_8_AX(EA_AX(cpustate))
+#define OPER_8_ALX(cpustate) read_8_ALX(EA_ALX(cpustate))
+#define OPER_8_AY(cpustate) read_8_AY(EA_AY(cpustate))
+#define OPER_8_DI(cpustate) read_8_DI(EA_DI(cpustate))
+#define OPER_8_DLI(cpustate) read_8_DLI(EA_DLI(cpustate))
+#define OPER_8_AI(cpustate) read_8_AI(EA_AI(cpustate))
+#define OPER_8_ALI(cpustate) read_8_ALI(EA_ALI(cpustate))
+#define OPER_8_DXI(cpustate) read_8_DXI(EA_DXI(cpustate))
+#define OPER_8_DIY(cpustate) read_8_DIY(EA_DIY(cpustate))
+#define OPER_8_DLIY(cpustate) read_8_DLIY(EA_DLIY(cpustate))
+#define OPER_8_AXI(cpustate) read_8_AXI(EA_AXI(cpustate))
+#define OPER_8_S(cpustate) read_8_S(EA_S(cpustate))
+#define OPER_8_SIY(cpustate) read_8_SIY(EA_SIY(cpustate))
+
+#define OPER_16_IMM(cpustate) read_16_IMM(EA_IMM16(cpustate))
+#define OPER_16_D(cpustate) read_16_D(EA_D(cpustate))
+#define OPER_16_A(cpustate) read_16_A(EA_A(cpustate))
+#define OPER_16_AL(cpustate) read_16_AL(EA_AL(cpustate))
+#define OPER_16_DX(cpustate) read_16_DX(EA_DX(cpustate))
+#define OPER_16_DY(cpustate) read_16_DY(EA_DY(cpustate))
+#define OPER_16_AX(cpustate) read_16_AX(EA_AX(cpustate))
+#define OPER_16_ALX(cpustate) read_16_ALX(EA_ALX(cpustate))
+#define OPER_16_AY(cpustate) read_16_AY(EA_AY(cpustate))
+#define OPER_16_DI(cpustate) read_16_DI(EA_DI(cpustate))
+#define OPER_16_DLI(cpustate) read_16_DLI(EA_DLI(cpustate))
+#define OPER_16_AI(cpustate) read_16_AI(EA_AI(cpustate))
+#define OPER_16_ALI(cpustate) read_16_ALI(EA_ALI(cpustate))
+#define OPER_16_DXI(cpustate) read_16_DXI(EA_DXI(cpustate))
+#define OPER_16_DIY(cpustate) read_16_DIY(EA_DIY(cpustate))
+#define OPER_16_DLIY(cpustate) read_16_DLIY(EA_DLIY(cpustate))
+#define OPER_16_AXI(cpustate) read_16_AXI(EA_AXI(cpustate))
+#define OPER_16_S(cpustate) read_16_S(EA_S(cpustate))
+#define OPER_16_SIY(cpustate) read_16_SIY(EA_SIY(cpustate))
+
+#define OPER_24_IMM(cpustate) read_24_IMM(EA_IMM24(cpustate))
+#define OPER_24_D(cpustate) read_24_D(EA_D(cpustate))
+#define OPER_24_A(cpustate) read_24_A(EA_A(cpustate))
+#define OPER_24_AL(cpustate) read_24_AL(EA_AL(cpustate))
+#define OPER_24_DX(cpustate) read_24_DX(EA_DX(cpustate))
+#define OPER_24_DY(cpustate) read_24_DY(EA_DY(cpustate))
+#define OPER_24_AX(cpustate) read_24_AX(EA_AX(cpustate))
+#define OPER_24_ALX(cpustate) read_24_ALX(EA_ALX(cpustate))
+#define OPER_24_AY(cpustate) read_24_AY(EA_AY(cpustate))
+#define OPER_24_DI(cpustate) read_24_DI(EA_DI(cpustate))
+#define OPER_24_DLI(cpustate) read_24_DLI(EA_DLI(cpustate))
+#define OPER_24_AI(cpustate) read_24_AI(EA_AI(cpustate))
+#define OPER_24_ALI(cpustate) read_24_ALI(EA_ALI())
+#define OPER_24_DXI(cpustate) read_24_DXI(EA_DXI(cpustate))
+#define OPER_24_DIY(cpustate) read_24_DIY(EA_DIY(cpustate))
+#define OPER_24_DLIY(cpustate) read_24_DLIY(EA_DLIY(cpustate))
+#define OPER_24_AXI(cpustate) read_24_AXI(EA_AXI(cpustate))
+#define OPER_24_S(cpustate) read_24_S(EA_S(cpustate))
+#define OPER_24_SIY(cpustate) read_24_SIY(EA_SIY(cpustate))
INLINE uint EA_IMM8(m37710i_cpu_struct *cpustate) {REG_PC += 1; return REG_PB | MAKE_UINT_16(REG_PC-1);}
INLINE uint EA_IMM16(m37710i_cpu_struct *cpustate) {REG_PC += 2; return REG_PB | MAKE_UINT_16(REG_PC-2);}
@@ -510,415 +510,415 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#if FLAG_SET_M
#if FLAG_SET_X
-#define OP_PSH(MODE) \
- SRC = OPER_8_##MODE(cpustate); \
+#define OP_PSH(MODE) \
+ SRC = OPER_8_##MODE(cpustate); \
CLK(12); \
- if (SRC&0x1) \
+ if (SRC&0x1) \
{ m37710i_push_8(cpustate, REG_A); CLK(2); } \
- if (SRC&0x2) \
+ if (SRC&0x2) \
{ m37710i_push_8(cpustate, REG_BA); CLK(2); } \
- if (SRC&0x4) \
+ if (SRC&0x4) \
{ m37710i_push_8(cpustate, REG_X); CLK(2); } \
- if (SRC&0x8) \
+ if (SRC&0x8) \
{ m37710i_push_8(cpustate, REG_Y); CLK(2); } \
- if (SRC&0x10) \
+ if (SRC&0x10) \
{ m37710i_push_16(cpustate, REG_D); CLK(2); } \
- if (SRC&0x20) \
+ if (SRC&0x20) \
{ m37710i_push_8(cpustate, REG_DB>>16); CLK(1); } \
- if (SRC&0x40) \
+ if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
- if (SRC&0x80) \
+ if (SRC&0x80) \
{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
-#else // FLAG_SET_X
-#define OP_PSH(MODE) \
- SRC = OPER_8_##MODE(cpustate); \
+#else // FLAG_SET_X
+#define OP_PSH(MODE) \
+ SRC = OPER_8_##MODE(cpustate); \
CLK(12); \
- if (SRC&0x1) \
+ if (SRC&0x1) \
{ m37710i_push_8(cpustate, REG_A); CLK(2); } \
- if (SRC&0x2) \
+ if (SRC&0x2) \
{ m37710i_push_8(cpustate, REG_BA); CLK(2); } \
- if (SRC&0x4) \
+ if (SRC&0x4) \
{ m37710i_push_16(cpustate, REG_X); CLK(2); } \
- if (SRC&0x8) \
+ if (SRC&0x8) \
{ m37710i_push_16(cpustate, REG_Y); CLK(2); } \
- if (SRC&0x10) \
+ if (SRC&0x10) \
{ m37710i_push_16(cpustate, REG_D); CLK(2); } \
- if (SRC&0x20) \
+ if (SRC&0x20) \
{ m37710i_push_8(cpustate, REG_DB>>16); CLK(1); } \
- if (SRC&0x40) \
+ if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
- if (SRC&0x80) \
+ if (SRC&0x80) \
{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
-#endif // FLAG_SET_X
-#else // FLAG_SET_M
+#endif // FLAG_SET_X
+#else // FLAG_SET_M
#if FLAG_SET_X
-#define OP_PSH(MODE) \
- SRC = OPER_8_##MODE(cpustate); \
+#define OP_PSH(MODE) \
+ SRC = OPER_8_##MODE(cpustate); \
CLK(12); \
- if (SRC&0x1) \
+ if (SRC&0x1) \
{ m37710i_push_16(cpustate, REG_A); CLK(2); } \
- if (SRC&0x2) \
+ if (SRC&0x2) \
{ m37710i_push_16(cpustate, REG_BA); CLK(2); } \
- if (SRC&0x4) \
+ if (SRC&0x4) \
{ m37710i_push_8(cpustate, REG_X); CLK(2); } \
- if (SRC&0x8) \
+ if (SRC&0x8) \
{ m37710i_push_8(cpustate, REG_Y); CLK(2); } \
- if (SRC&0x10) \
+ if (SRC&0x10) \
{ m37710i_push_16(cpustate, REG_D); CLK(2); } \
- if (SRC&0x20) \
+ if (SRC&0x20) \
{ m37710i_push_8(cpustate, REG_DB>>16); CLK(1); } \
- if (SRC&0x40) \
+ if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
- if (SRC&0x80) \
+ if (SRC&0x80) \
{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
-#else // FLAG_SET_X
-#define OP_PSH(MODE) \
- SRC = OPER_8_##MODE(cpustate); \
+#else // FLAG_SET_X
+#define OP_PSH(MODE) \
+ SRC = OPER_8_##MODE(cpustate); \
CLK(12); \
- if (SRC&0x1) \
+ if (SRC&0x1) \
{ m37710i_push_16(cpustate, REG_A); CLK(2); } \
- if (SRC&0x2) \
+ if (SRC&0x2) \
{ m37710i_push_16(cpustate, REG_BA); CLK(2);} \
- if (SRC&0x4) \
+ if (SRC&0x4) \
{ m37710i_push_16(cpustate, REG_X); CLK(2); } \
- if (SRC&0x8) \
+ if (SRC&0x8) \
{ m37710i_push_16(cpustate, REG_Y); CLK(2); } \
- if (SRC&0x10) \
+ if (SRC&0x10) \
{ m37710i_push_16(cpustate, REG_D); CLK(2); } \
- if (SRC&0x20) \
+ if (SRC&0x20) \
{ m37710i_push_8(cpustate, REG_DB>>16); CLK(1); } \
- if (SRC&0x40) \
+ if (SRC&0x40) \
{ m37710i_push_8(cpustate, REG_PB>>16); CLK(1); } \
- if (SRC&0x80) \
+ if (SRC&0x80) \
{ m37710i_push_8(cpustate, cpustate->ipl); m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate)); CLK(2); }
-#endif // FLAG_SET_X
-#endif // FLAG_SET_M
+#endif // FLAG_SET_X
+#endif // FLAG_SET_M
/* M37710 Pull all */
/* Unusual behavior: bit 6 has no effect */
#undef OP_PUL
-#define OP_PUL(MODE) \
- SRC = OPER_8_##MODE(cpustate); \
+#define OP_PUL(MODE) \
+ SRC = OPER_8_##MODE(cpustate); \
CLK(14); \
- if (SRC&0x80) \
+ if (SRC&0x80) \
{ m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); CLK(3); } \
- if (SRC&0x20) \
+ if (SRC&0x20) \
{ REG_DB = m37710i_pull_8(cpustate) << 16; CLK(3); } \
- if (SRC&0x10) \
+ if (SRC&0x10) \
{ REG_D = m37710i_pull_16(cpustate); CLK(4); } \
if (m37710i_get_reg_p(cpustate) & XFLAG_SET) \
{ \
- if (SRC&0x8) \
+ if (SRC&0x8) \
{ REG_Y = m37710i_pull_8(cpustate); CLK(3); } \
- if (SRC&0x4) \
+ if (SRC&0x4) \
{ REG_X = m37710i_pull_8(cpustate); CLK(3); } \
} \
else \
{ \
- if (SRC&0x8) \
+ if (SRC&0x8) \
{ REG_Y = m37710i_pull_16(cpustate); CLK(3); } \
- if (SRC&0x4) \
+ if (SRC&0x4) \
{ REG_X = m37710i_pull_16(cpustate); CLK(3); } \
} \
if (m37710i_get_reg_p(cpustate) & MFLAG_SET) \
{ \
- if (SRC&0x2) \
+ if (SRC&0x2) \
{ REG_BA = m37710i_pull_8(cpustate); CLK(3); } \
- if (SRC&0x1) \
+ if (SRC&0x1) \
{ REG_A = m37710i_pull_8(cpustate); CLK(3); } \
} \
else \
{ \
- if (SRC&0x2) \
+ if (SRC&0x2) \
{ REG_BA = m37710i_pull_16(cpustate); CLK(3); } \
- if (SRC&0x1) \
+ if (SRC&0x1) \
{ REG_A = m37710i_pull_16(cpustate); CLK(3); } \
- } \
+ } \
m37710i_update_irqs(cpustate)
/* M37710 Multiply */
#undef OP_MPY
#if FLAG_SET_M
-#define OP_MPY(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE + 14); \
- SRC = OPER_8_##MODE(cpustate); \
+#define OP_MPY(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE + 14); \
+ SRC = OPER_8_##MODE(cpustate); \
{ UINT16 temp = SRC * (REG_A&0xff); REG_A = temp & 0xff; REG_BA = (temp>>8)&0xff; FLAG_Z = temp; FLAG_N = (temp & 0x8000) ? 1 : 0; FLAG_C = 0; }
#else
-#define OP_MPY(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE + 14+8); \
- SRC = OPER_16_##MODE(cpustate); \
+#define OP_MPY(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE + 14+8); \
+ SRC = OPER_16_##MODE(cpustate); \
{ UINT32 temp = SRC * REG_A; REG_A = temp & 0xffff; REG_BA = (temp>>16)&0xffff; FLAG_Z = temp; FLAG_N = (temp & 0x80000000) ? 1 : 0; FLAG_C = 0; }
#endif
/* M37710 Divide */
#undef OP_DIV
#if FLAG_SET_M
-#define OP_DIV(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE + 17); \
- SRC = (REG_BA&0xff)<<8 | (REG_A & 0xff); \
- DST = OPER_8_##MODE(cpustate); \
- if (DST != 0) \
- { \
- UINT16 tempa = SRC / DST; UINT16 tempb = SRC % DST; \
- FLAG_V = ((tempa | tempb) & 0xff00) ? VFLAG_SET : 0; \
- FLAG_C = FLAG_V ? CFLAG_SET : 0; \
- if (!FLAG_V) { FLAG_N = (tempa & 0x80) ? 1 : 0; } \
- FLAG_Z = REG_A = tempa & 0xff; REG_BA = tempb & 0xff; \
- CLK(8); \
+#define OP_DIV(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE + 17); \
+ SRC = (REG_BA&0xff)<<8 | (REG_A & 0xff); \
+ DST = OPER_8_##MODE(cpustate); \
+ if (DST != 0) \
+ { \
+ UINT16 tempa = SRC / DST; UINT16 tempb = SRC % DST; \
+ FLAG_V = ((tempa | tempb) & 0xff00) ? VFLAG_SET : 0; \
+ FLAG_C = FLAG_V ? CFLAG_SET : 0; \
+ if (!FLAG_V) { FLAG_N = (tempa & 0x80) ? 1 : 0; } \
+ FLAG_Z = REG_A = tempa & 0xff; REG_BA = tempb & 0xff; \
+ CLK(8); \
} else m37710i_interrupt_software(cpustate, 0xfffc)
#else
-#define OP_DIV(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE + 17); \
- SRC = (REG_BA<<16) | REG_A; \
- DST = OPER_16_##MODE(cpustate); \
- if (DST != 0) \
- { \
- UINT32 tempa = SRC / DST; UINT32 tempb = SRC % DST; \
- FLAG_V = ((tempa | tempb) & 0xffff0000) ? VFLAG_SET : 0; \
- FLAG_C = FLAG_V ? CFLAG_SET : 0; \
- if (!FLAG_V) { FLAG_N = (tempa & 0x8000) ? 1 : 0; } \
- FLAG_Z = REG_A = tempa & 0xffff; REG_BA = tempb & 0xffff; \
- CLK(8+15); \
+#define OP_DIV(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE + 17); \
+ SRC = (REG_BA<<16) | REG_A; \
+ DST = OPER_16_##MODE(cpustate); \
+ if (DST != 0) \
+ { \
+ UINT32 tempa = SRC / DST; UINT32 tempb = SRC % DST; \
+ FLAG_V = ((tempa | tempb) & 0xffff0000) ? VFLAG_SET : 0; \
+ FLAG_C = FLAG_V ? CFLAG_SET : 0; \
+ if (!FLAG_V) { FLAG_N = (tempa & 0x8000) ? 1 : 0; } \
+ FLAG_Z = REG_A = tempa & 0xffff; REG_BA = tempb & 0xffff; \
+ CLK(8+15); \
} else m37710i_interrupt_software(cpustate, 0xfffc)
#endif
/* M37710 Add With Carry */
#undef OP_ADC
#if FLAG_SET_M
-#define OP_ADC(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- SRC = OPER_8_##MODE(cpustate); \
- FLAG_C = REG_A + SRC + CFLAG_AS_1(); \
- if(FLAG_D) \
- { \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C+=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C+=0x60; \
- } \
- FLAG_V = VFLAG_ADD_8(SRC, REG_A, FLAG_C); \
+#define OP_ADC(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ SRC = OPER_8_##MODE(cpustate); \
+ FLAG_C = REG_A + SRC + CFLAG_AS_1(); \
+ if(FLAG_D) \
+ { \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C+=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C+=0x60; \
+ } \
+ FLAG_V = VFLAG_ADD_8(SRC, REG_A, FLAG_C); \
FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(FLAG_C)
#else
-#define OP_ADC(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- SRC = OPER_16_##MODE(cpustate); \
- if(!FLAG_D) \
- { \
- FLAG_C = REG_A + SRC + CFLAG_AS_1(); \
- FLAG_V = VFLAG_ADD_16(SRC, REG_A, FLAG_C); \
- FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(REG_A); \
- FLAG_C = CFLAG_16(FLAG_C); \
- BREAKOUT; \
- } \
- FLAG_C = MAKE_UINT_8(REG_A) + MAKE_UINT_8(SRC) + CFLAG_AS_1(); \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C+=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C+=0x60; \
- FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_ADC(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ SRC = OPER_16_##MODE(cpustate); \
+ if(!FLAG_D) \
+ { \
+ FLAG_C = REG_A + SRC + CFLAG_AS_1(); \
+ FLAG_V = VFLAG_ADD_16(SRC, REG_A, FLAG_C); \
+ FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(REG_A); \
+ FLAG_C = CFLAG_16(FLAG_C); \
+ BREAKOUT; \
+ } \
+ FLAG_C = MAKE_UINT_8(REG_A) + MAKE_UINT_8(SRC) + CFLAG_AS_1(); \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C+=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C+=0x60; \
+ FLAG_Z = MAKE_UINT_8(FLAG_C); \
\
- FLAG_C = MAKE_UINT_8(REG_A>>8) + MAKE_UINT_8(SRC>>8) + CFLAG_AS_1(); \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C+=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C+=0x60; \
- FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- FLAG_V = VFLAG_ADD_16(SRC, REG_A, FLAG_C); \
+ FLAG_C = MAKE_UINT_8(REG_A>>8) + MAKE_UINT_8(SRC>>8) + CFLAG_AS_1(); \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C+=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C+=0x60; \
+ FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ FLAG_V = VFLAG_ADD_16(SRC, REG_A, FLAG_C); \
REG_A = FLAG_Z
#endif
/* M37710 Add With Carry - B accumulator*/
#undef OP_ADCB
#if FLAG_SET_M
-#define OP_ADCB(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- SRC = OPER_8_##MODE(cpustate); \
- FLAG_C = REG_BA + SRC + CFLAG_AS_1(); \
- if(FLAG_D) \
- { \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C+=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C+=0x60; \
- } \
- FLAG_V = VFLAG_ADD_8(SRC, REG_BA, FLAG_C); \
+#define OP_ADCB(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ SRC = OPER_8_##MODE(cpustate); \
+ FLAG_C = REG_BA + SRC + CFLAG_AS_1(); \
+ if(FLAG_D) \
+ { \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C+=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C+=0x60; \
+ } \
+ FLAG_V = VFLAG_ADD_8(SRC, REG_BA, FLAG_C); \
FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(FLAG_C)
#else
-#define OP_ADCB(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- SRC = OPER_16_##MODE(cpustate); \
- if(!FLAG_D) \
- { \
- FLAG_C = REG_BA + SRC + CFLAG_AS_1(); \
- FLAG_V = VFLAG_ADD_16(SRC, REG_BA, FLAG_C); \
- FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(REG_BA); \
- FLAG_C = CFLAG_16(FLAG_C); \
- BREAKOUT; \
- } \
- FLAG_C = MAKE_UINT_8(REG_BA) + MAKE_UINT_8(SRC) + CFLAG_AS_1(); \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C+=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C+=0x60; \
- FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_ADCB(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ SRC = OPER_16_##MODE(cpustate); \
+ if(!FLAG_D) \
+ { \
+ FLAG_C = REG_BA + SRC + CFLAG_AS_1(); \
+ FLAG_V = VFLAG_ADD_16(SRC, REG_BA, FLAG_C); \
+ FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(REG_BA); \
+ FLAG_C = CFLAG_16(FLAG_C); \
+ BREAKOUT; \
+ } \
+ FLAG_C = MAKE_UINT_8(REG_BA) + MAKE_UINT_8(SRC) + CFLAG_AS_1(); \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C+=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C+=0x60; \
+ FLAG_Z = MAKE_UINT_8(FLAG_C); \
\
- FLAG_C = MAKE_UINT_8(REG_BA>>8) + MAKE_UINT_8(SRC>>8) + CFLAG_AS_1(); \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C+=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C+=0x60; \
- FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- FLAG_V = VFLAG_ADD_16(SRC, REG_BA, FLAG_C); \
+ FLAG_C = MAKE_UINT_8(REG_BA>>8) + MAKE_UINT_8(SRC>>8) + CFLAG_AS_1(); \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C+=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C+=0x60; \
+ FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ FLAG_V = VFLAG_ADD_16(SRC, REG_BA, FLAG_C); \
REG_BA = FLAG_Z
#endif
/* M37710 Logical AND with accumulator */
#undef OP_AND
#if FLAG_SET_M
-#define OP_AND(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_AND(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_A &= OPER_8_##MODE(cpustate)
#else
-#define OP_AND(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_A &= OPER_16_##MODE(cpustate); \
+#define OP_AND(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_A &= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_A)
#endif
/* M37710 Logical AND with B accumulator */
#undef OP_ANDB
#if FLAG_SET_M
-#define OP_ANDB(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_ANDB(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_BA &= OPER_8_##MODE(cpustate)
#else
-#define OP_ANDB(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_BA &= OPER_16_##MODE(cpustate); \
+#define OP_ANDB(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_BA &= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_BA)
#endif
/* M37710 Arithmetic Shift Left accumulator */
#undef OP_ASL
#if FLAG_SET_M
-#define OP_ASL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = REG_A << 1; \
+#define OP_ASL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = REG_A << 1; \
FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(FLAG_C)
#else
-#define OP_ASL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = REG_A << 1; \
- FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_ASL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = REG_A << 1; \
+ FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = CFLAG_16(FLAG_C)
#endif
/* M37710 Arithmetic Shift Left B accumulator */
#undef OP_BSL
#if FLAG_SET_M
-#define OP_BSL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = REG_BA << 1; \
+#define OP_BSL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = REG_BA << 1; \
FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(FLAG_C)
#else
-#define OP_BSL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = REG_BA << 1; \
- FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_BSL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = REG_BA << 1; \
+ FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = CFLAG_16(FLAG_C)
#endif
/* M37710 Arithmetic Shift Left operand */
#undef OP_ASLM
#if FLAG_SET_M
-#define OP_ASLM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = read_8_##MODE(DST) << 1; \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_ASLM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = read_8_##MODE(DST) << 1; \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_ASLM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = read_16_##MODE(DST) << 1; \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
- FLAG_C = CFLAG_16(FLAG_C); \
+#define OP_ASLM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = read_16_##MODE(DST) << 1; \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
+ FLAG_C = CFLAG_16(FLAG_C); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M37710 Branch on Condition Code */
#undef OP_BCC
-#define OP_BCC(COND) \
- DST = OPER_8_IMM(cpustate); \
- if(COND) \
- { \
- CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
- m37710i_branch_8(cpustate, DST); \
- BREAKOUT; \
- } \
- CLK(CLK_OP + CLK_RELATIVE_8); \
+#define OP_BCC(COND) \
+ DST = OPER_8_IMM(cpustate); \
+ if(COND) \
+ { \
+ CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
+ m37710i_branch_8(cpustate, DST); \
+ BREAKOUT; \
+ } \
+ CLK(CLK_OP + CLK_RELATIVE_8); \
/* M37710 Cause a Break interrupt */
#undef OP_BRK
-#define OP_BRK() \
- REG_PC++; CLK(CLK_OP + CLK_R8 + CLK_IMM); \
- logerror("error M37710: BRK at PC=%06x\n", REG_PB|REG_PC); \
+#define OP_BRK() \
+ REG_PC++; CLK(CLK_OP + CLK_R8 + CLK_IMM); \
+ logerror("error M37710: BRK at PC=%06x\n", REG_PB|REG_PC); \
m37710i_interrupt_software(cpustate, 0xfffa)
/* M37710 Branch Always */
#undef OP_BRA
-#define OP_BRA() \
- CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_8); \
+#define OP_BRA() \
+ CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_8); \
m37710i_branch_8(cpustate, OPER_8_IMM(cpustate))
/* M37710 Branch Always Long */
#undef OP_BRL
-#define OP_BRL() \
- CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_16); \
+#define OP_BRL() \
+ CLK(CLK_OP + CLK_IMPLIED + CLK_RELATIVE_16); \
m37710i_branch_16(cpustate, OPER_16_IMM(cpustate))
/* M37710 Clear Carry flag */
#undef OP_CLC
-#define OP_CLC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_CLC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_C = CFLAG_CLEAR
/* M37710 Clear Interrupt Mask flag */
#undef OP_CLI
-#define OP_CLI() \
- CLK(CLK_OP + CLK_IMPLIED); \
- m37710i_set_flag_i(cpustate, IFLAG_CLEAR); \
+#define OP_CLI() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ m37710i_set_flag_i(cpustate, IFLAG_CLEAR); \
m37710i_update_irqs(cpustate)
/* M37710 Clear oVerflow flag */
#undef OP_CLV
-#define OP_CLV() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_CLV() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_V = VFLAG_CLEAR
/* M37710 Compare operand to accumulator */
/* Unusual behavior: C flag is inverted */
#undef OP_CMP
#if FLAG_SET_M
-#define OP_CMP(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- FLAG_C = REG_A - OPER_8_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_CMP(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ FLAG_C = REG_A - OPER_8_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
FLAG_C ^= CFLAG_SET
#else
-#define OP_CMP(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_C = REG_A - OPER_16_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_CMP(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_C = REG_A - OPER_16_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = ~CFLAG_16(FLAG_C)
#endif
@@ -926,17 +926,17 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* Unusual behavior: C flag is inverted */
#undef OP_CMPB
#if FLAG_SET_M
-#define OP_CMPB(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- FLAG_C = REG_BA - OPER_8_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_CMPB(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ FLAG_C = REG_BA - OPER_8_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
FLAG_C ^= CFLAG_SET
#else
-#define OP_CMPB(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_C = REG_BA - OPER_16_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_CMPB(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_C = REG_BA - OPER_16_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = ~CFLAG_16(FLAG_C)
#endif
@@ -944,412 +944,412 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* Unusual behavior: C flag is inverted */
#undef OP_CMPX
#if FLAG_SET_X
-#define OP_CMPX(REG, MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- FLAG_C = REG - OPER_8_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_CMPX(REG, MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ FLAG_C = REG - OPER_8_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
FLAG_C ^= CFLAG_SET
#else
-#define OP_CMPX(REG, MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_C = REG - OPER_16_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_CMPX(REG, MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_C = REG - OPER_16_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = ~CFLAG_16(FLAG_C)
#endif
/* M37710 Decrement accumulator */
#undef OP_DEC
#if FLAG_SET_M
-#define OP_DEC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_DEC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(REG_A - 1)
#else
-#define OP_DEC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_A = MAKE_UINT_16(REG_A - 1); \
+#define OP_DEC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_A = MAKE_UINT_16(REG_A - 1); \
FLAG_N = NFLAG_16(REG_A)
#endif
/* M37710 Decrement B accumulator */
#undef OP_DECB
#if FLAG_SET_M
-#define OP_DECB() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_DECB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(REG_BA - 1)
#else
-#define OP_DECB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_BA = MAKE_UINT_16(REG_BA - 1); \
+#define OP_DECB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_BA = MAKE_UINT_16(REG_BA - 1); \
FLAG_N = NFLAG_16(REG_BA)
#endif
/* M37710 Decrement operand */
#undef OP_DECM
#if FLAG_SET_M
-#define OP_DECM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) - 1); \
+#define OP_DECM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) - 1); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_DECM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) - 1); \
- FLAG_N = NFLAG_16(FLAG_Z); \
+#define OP_DECM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) - 1); \
+ FLAG_N = NFLAG_16(FLAG_Z); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M37710 Decrement index register */
#undef OP_DECX
#if FLAG_SET_X
-#define OP_DECX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_DECX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG = MAKE_UINT_8(REG - 1)
#else
-#define OP_DECX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = MAKE_UINT_16(REG - 1); \
+#define OP_DECX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = MAKE_UINT_16(REG - 1); \
FLAG_N = NFLAG_16(REG)
#endif
/* M37710 Exclusive Or operand to accumulator */
#undef OP_EOR
#if FLAG_SET_M
-#define OP_EOR(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_EOR(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_A ^= OPER_8_##MODE(cpustate)
#else
-#define OP_EOR(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_A ^= OPER_16_##MODE(cpustate); \
+#define OP_EOR(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_A ^= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_A)
#endif
/* M37710 Exclusive Or operand to accumulator B */
#undef OP_EORB
#if FLAG_SET_M
-#define OP_EORB(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_EORB(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_BA ^= OPER_8_##MODE(cpustate)
#else
-#define OP_EORB(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_BA ^= OPER_16_##MODE(cpustate); \
+#define OP_EORB(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_BA ^= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_BA)
#endif
/* M37710 Increment accumulator */
#undef OP_INC
#if FLAG_SET_M
-#define OP_INC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_INC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(REG_A + 1)
#else
-#define OP_INC() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_A = MAKE_UINT_16(REG_A + 1); \
+#define OP_INC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_A = MAKE_UINT_16(REG_A + 1); \
FLAG_N = NFLAG_16(REG_A)
#endif
/* M37710 Increment B accumulator */
#undef OP_INCB
#if FLAG_SET_M
-#define OP_INCB() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_INCB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(REG_BA + 1)
#else
-#define OP_INCB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_BA = MAKE_UINT_16(REG_BA + 1); \
+#define OP_INCB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_BA = MAKE_UINT_16(REG_BA + 1); \
FLAG_N = NFLAG_16(REG_BA)
#endif
/* M37710 Increment operand */
#undef OP_INCM
#if FLAG_SET_M
-#define OP_INCM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) + 1); \
+#define OP_INCM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(read_8_##MODE(DST) + 1); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_INCM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) + 1); \
- FLAG_N = NFLAG_16(FLAG_Z); \
+#define OP_INCM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = MAKE_UINT_16(read_16_##MODE(DST) + 1); \
+ FLAG_N = NFLAG_16(FLAG_Z); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M37710 Increment index register */
#undef OP_INCX
#if FLAG_SET_X
-#define OP_INCX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_INCX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_N = FLAG_Z = REG = MAKE_UINT_8(REG + 1)
#else
-#define OP_INCX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = MAKE_UINT_16(REG + 1); \
+#define OP_INCX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = MAKE_UINT_16(REG + 1); \
FLAG_N = NFLAG_16(REG)
#endif
/* M37710 Jump Long */
#undef OP_JMLAI
-#define OP_JMLAI() \
- CLK(CLK_OP + CLK_AI + 1); \
+#define OP_JMLAI() \
+ CLK(CLK_OP + CLK_AI + 1); \
m37710i_jump_24(cpustate, read_24_A(OPER_16_IMM(cpustate)))
/* M37710 Jump */
#undef OP_JMP
-#define OP_JMP(MODE) \
- CLK(CLK_OP + CLK_##MODE); \
+#define OP_JMP(MODE) \
+ CLK(CLK_OP + CLK_##MODE); \
m37710i_jump_16(cpustate, EA_##MODE(cpustate))
/* M37710 Jump absolute indexed indirect */
#undef OP_JMPAXI
-#define OP_JMPAXI() \
- CLK(CLK_OP + CLK_AXI); \
+#define OP_JMPAXI() \
+ CLK(CLK_OP + CLK_AXI); \
m37710i_jump_16(cpustate, read_16_AXI(REG_PB | (MAKE_UINT_16(OPER_16_IMM(cpustate) + REG_X))))
/* M37710 Jump absolute long */
#undef OP_JMPAL
-#define OP_JMPAL() \
- CLK(CLK_OP + CLK_AL); \
+#define OP_JMPAL() \
+ CLK(CLK_OP + CLK_AL); \
m37710i_jump_24(cpustate, EA_AL(cpustate))
/* M37710 Jump to Subroutine Long */
#undef OP_JSL
-#define OP_JSL(MODE) \
- CLK(CLK_OP + CLK_W24 + CLK_##MODE + 1); \
- DST = EA_##MODE(cpustate); \
- m37710i_push_8(cpustate, REG_PB>>16); \
- m37710i_push_16(cpustate, REG_PC); \
+#define OP_JSL(MODE) \
+ CLK(CLK_OP + CLK_W24 + CLK_##MODE + 1); \
+ DST = EA_##MODE(cpustate); \
+ m37710i_push_8(cpustate, REG_PB>>16); \
+ m37710i_push_16(cpustate, REG_PC); \
m37710i_jump_24(cpustate, DST)
/* M37710 Jump to Subroutine */
#undef OP_JSR
-#define OP_JSR(MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_##MODE); \
- DST = EA_##MODE(cpustate); \
- m37710i_push_16(cpustate, REG_PC); \
+#define OP_JSR(MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ m37710i_push_16(cpustate, REG_PC); \
m37710i_jump_16(cpustate, DST)
/* M37710 Jump to Subroutine */
#undef OP_JSRAXI
-#define OP_JSRAXI() \
- CLK(CLK_OP + CLK_W16 + CLK_AXI); \
+#define OP_JSRAXI() \
+ CLK(CLK_OP + CLK_W16 + CLK_AXI); \
DST = read_16_AXI(REG_PB | (MAKE_UINT_16(OPER_16_IMM(cpustate) + REG_X))); \
- m37710i_push_16(cpustate, REG_PC); \
+ m37710i_push_16(cpustate, REG_PC); \
m37710i_jump_16(cpustate, DST)
/* M37710 Load accumulator with operand */
#undef OP_LDA
#if FLAG_SET_M
-#define OP_LDA(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_LDA(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_A = OPER_8_##MODE(cpustate)
#else
-#define OP_LDA(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_A = OPER_16_##MODE(cpustate); \
+#define OP_LDA(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_A = OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_A)
#endif
/* M37710 Load B accumulator with operand */
#undef OP_LDB
#if FLAG_SET_M
-#define OP_LDB(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_LDB(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_BA = OPER_8_##MODE(cpustate)
#else
-#define OP_LDB(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_BA = OPER_16_##MODE(cpustate); \
+#define OP_LDB(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_BA = OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_BA)
#endif
/* M37710 Load memory with operand */
#undef OP_LDM
#if FLAG_SET_M
-#define OP_LDM(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- REG_IM2 = EA_##MODE(cpustate); \
- REG_IM = read_8_NORM(REG_PB|REG_PC); \
- REG_PC++; \
+#define OP_LDM(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ REG_IM2 = EA_##MODE(cpustate); \
+ REG_IM = read_8_NORM(REG_PB|REG_PC); \
+ REG_PC++; \
write_8_##MODE(REG_IM2, REG_IM)
#else
-#define OP_LDM(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- REG_IM2 = EA_##MODE(cpustate); \
- REG_IM = read_16_NORM(REG_PB|REG_PC); \
- REG_PC+=2; \
+#define OP_LDM(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ REG_IM2 = EA_##MODE(cpustate); \
+ REG_IM = read_16_NORM(REG_PB|REG_PC); \
+ REG_PC+=2; \
write_16_##MODE(REG_IM2, REG_IM)
#endif
/* M37710 Branch if bits set */
#undef OP_BBS
#if FLAG_SET_M
-#define OP_BBS(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- REG_IM2 = read_8_NORM(EA_##MODE(cpustate)); \
- REG_IM = read_8_NORM(REG_PB | REG_PC); \
- REG_PC++; \
- DST = OPER_8_IMM(cpustate); \
- if ((REG_IM2 & REG_IM) == REG_IM) \
- { \
- CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
- m37710i_branch_8(cpustate, DST); \
- BREAKOUT; \
+#define OP_BBS(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ REG_IM2 = read_8_NORM(EA_##MODE(cpustate)); \
+ REG_IM = read_8_NORM(REG_PB | REG_PC); \
+ REG_PC++; \
+ DST = OPER_8_IMM(cpustate); \
+ if ((REG_IM2 & REG_IM) == REG_IM) \
+ { \
+ CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
+ m37710i_branch_8(cpustate, DST); \
+ BREAKOUT; \
}
#else
-#define OP_BBS(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \
- REG_IM = read_16_NORM(REG_PB | REG_PC); \
- REG_PC++; \
- REG_PC++; \
- DST = OPER_8_IMM(cpustate); \
- if ((REG_IM2 & REG_IM) == REG_IM) \
- { \
- CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
- m37710i_branch_8(cpustate, DST); \
- BREAKOUT; \
+#define OP_BBS(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \
+ REG_IM = read_16_NORM(REG_PB | REG_PC); \
+ REG_PC++; \
+ REG_PC++; \
+ DST = OPER_8_IMM(cpustate); \
+ if ((REG_IM2 & REG_IM) == REG_IM) \
+ { \
+ CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
+ m37710i_branch_8(cpustate, DST); \
+ BREAKOUT; \
}
#endif
/* M37710 Branch if bits clear */
#undef OP_BBC
#if FLAG_SET_M
-#define OP_BBC(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- REG_IM2 = read_8_NORM(EA_##MODE(cpustate)); \
- REG_IM = read_8_NORM(REG_PB | REG_PC); \
- REG_PC++; \
- DST = OPER_8_IMM(cpustate); \
- if ((REG_IM2 & REG_IM) == 0) \
- { \
- CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
- m37710i_branch_8(cpustate, DST); \
- BREAKOUT; \
+#define OP_BBC(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ REG_IM2 = read_8_NORM(EA_##MODE(cpustate)); \
+ REG_IM = read_8_NORM(REG_PB | REG_PC); \
+ REG_PC++; \
+ DST = OPER_8_IMM(cpustate); \
+ if ((REG_IM2 & REG_IM) == 0) \
+ { \
+ CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
+ m37710i_branch_8(cpustate, DST); \
+ BREAKOUT; \
}
#else
-#define OP_BBC(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \
- REG_IM = read_16_NORM(REG_PB | REG_PC); \
- REG_PC++; \
- REG_PC++; \
- DST = OPER_8_IMM(cpustate); \
- if ((REG_IM2 & REG_IM) == 0) \
- { \
- CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
- m37710i_branch_8(cpustate, DST); \
- BREAKOUT; \
+#define OP_BBC(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ REG_IM2 = read_16_NORM(EA_##MODE(cpustate)); \
+ REG_IM = read_16_NORM(REG_PB | REG_PC); \
+ REG_PC++; \
+ REG_PC++; \
+ DST = OPER_8_IMM(cpustate); \
+ if ((REG_IM2 & REG_IM) == 0) \
+ { \
+ CLK(CLK_OP + CLK_RELATIVE_8 + 1); \
+ m37710i_branch_8(cpustate, DST); \
+ BREAKOUT; \
}
#endif
/* M37710 Swap accumulators */
#undef OP_XAB
#if FLAG_SET_M
-#define OP_XAB() \
- CLK(6); \
- DST = REG_A; \
- FLAG_N = FLAG_Z = REG_A = REG_BA; \
+#define OP_XAB() \
+ CLK(6); \
+ DST = REG_A; \
+ FLAG_N = FLAG_Z = REG_A = REG_BA; \
REG_BA = DST;
#else
-#define OP_XAB() \
- CLK(6); \
- DST = REG_A; \
- FLAG_Z = REG_A = REG_BA; \
- FLAG_N = NFLAG_16(REG_A); \
+#define OP_XAB() \
+ CLK(6); \
+ DST = REG_A; \
+ FLAG_Z = REG_A = REG_BA; \
+ FLAG_N = NFLAG_16(REG_A); \
REG_BA = DST;
#endif
/* M37710 Load index register with operand */
#undef OP_LDX
#if FLAG_SET_X
-#define OP_LDX(REG, MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_LDX(REG, MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG = OPER_8_##MODE(cpustate)
#else
-#define OP_LDX(REG, MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG = OPER_16_##MODE(cpustate); \
+#define OP_LDX(REG, MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG = OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG)
#endif
/* M37710 Logical Shift Right accumulator */
#undef OP_LSR
#if FLAG_SET_M
-#define OP_LSR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_N = 0; \
- FLAG_C = REG_A << 8; \
+#define OP_LSR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_N = 0; \
+ FLAG_C = REG_A << 8; \
FLAG_Z = REG_A >>= 1
#else
-#define OP_LSR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_N = 0; \
- FLAG_C = REG_A << 8; \
+#define OP_LSR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_N = 0; \
+ FLAG_C = REG_A << 8; \
FLAG_Z = REG_A >>= 1
#endif
/* M37710 Logical Shift Right B accumulator */
#undef OP_LSRB
#if FLAG_SET_M
-#define OP_LSRB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_N = 0; \
- FLAG_C = REG_BA << 8; \
+#define OP_LSRB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_N = 0; \
+ FLAG_C = REG_BA << 8; \
FLAG_Z = REG_BA >>= 1
#else
-#define OP_LSRB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_N = 0; \
- FLAG_C = REG_BA << 8; \
+#define OP_LSRB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_N = 0; \
+ FLAG_C = REG_BA << 8; \
FLAG_Z = REG_BA >>= 1
#endif
/* M37710 Logical Shift Right operand */
#undef OP_LSRM
#if FLAG_SET_M
-#define OP_LSRM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = 0; \
- FLAG_Z = read_8_##MODE(DST); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_Z >>= 1; \
+#define OP_LSRM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = 0; \
+ FLAG_Z = read_8_##MODE(DST); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_Z >>= 1; \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_LSRM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_N = 0; \
- FLAG_Z = read_16_##MODE(DST); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_Z >>= 1; \
+#define OP_LSRM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_N = 0; \
+ FLAG_Z = read_16_##MODE(DST); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_Z >>= 1; \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M37710 Move Block Negative */
#undef OP_MVN
#if FLAG_SET_X
-#define OP_MVN() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REG_DB = DST; \
- REG_A |= REG_B; \
- CLK(7); \
- if (REG_A > 0) \
- { \
- write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
- REG_X = MAKE_UINT_8(REG_X+1); \
- REG_Y = MAKE_UINT_8(REG_Y+1); \
- REG_A--; \
+#define OP_MVN() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REG_DB = DST; \
+ REG_A |= REG_B; \
+ CLK(7); \
+ if (REG_A > 0) \
+ { \
+ write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
+ REG_X = MAKE_UINT_8(REG_X+1); \
+ REG_Y = MAKE_UINT_8(REG_Y+1); \
+ REG_A--; \
if ((REG_A&0xffff) != 0) \
{\
REG_PC -= 3; \
@@ -1360,26 +1360,26 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
{ \
REG_A = 0xff; \
REG_B = 0xff00; \
- } \
+ } \
else \
- { \
- REG_A = 0xffff; \
- } \
+ { \
+ REG_A = 0xffff; \
+ } \
} \
}
#else
-#define OP_MVN() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REG_DB = DST; \
- REG_A |= REG_B; \
- CLK(7); \
- if (REG_A > 0) \
- { \
- write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
- REG_X = MAKE_UINT_16(REG_X+1); \
- REG_Y = MAKE_UINT_16(REG_Y+1); \
- REG_A--; \
+#define OP_MVN() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REG_DB = DST; \
+ REG_A |= REG_B; \
+ CLK(7); \
+ if (REG_A > 0) \
+ { \
+ write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
+ REG_X = MAKE_UINT_16(REG_X+1); \
+ REG_Y = MAKE_UINT_16(REG_Y+1); \
+ REG_A--; \
if ((REG_A&0xffff) != 0) \
{\
REG_PC -= 3; \
@@ -1390,11 +1390,11 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
{ \
REG_A = 0xff; \
REG_B = 0xff00; \
- } \
+ } \
else \
- { \
- REG_A = 0xffff; \
- } \
+ { \
+ REG_A = 0xffff; \
+ } \
} \
}
#endif
@@ -1402,18 +1402,18 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* M37710 Move Block Positive */
#undef OP_MVP
#if FLAG_SET_X
-#define OP_MVP() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REG_DB = DST; \
- REG_A |= REG_B; \
- CLK(7); \
- if (REG_A > 0) \
- { \
- write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
- REG_X = MAKE_UINT_8(REG_X-1); \
- REG_Y = MAKE_UINT_8(REG_Y-1); \
- REG_A--; \
+#define OP_MVP() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REG_DB = DST; \
+ REG_A |= REG_B; \
+ CLK(7); \
+ if (REG_A > 0) \
+ { \
+ write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
+ REG_X = MAKE_UINT_8(REG_X-1); \
+ REG_Y = MAKE_UINT_8(REG_Y-1); \
+ REG_A--; \
if ((REG_A&0xffff) != 0) \
{\
REG_PC -= 3; \
@@ -1424,26 +1424,26 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
{ \
REG_A = 0xff; \
REG_B = 0xff00; \
- } \
+ } \
else \
- { \
- REG_A = 0xffff; \
- } \
+ { \
+ REG_A = 0xffff; \
+ } \
} \
}
#else
-#define OP_MVP() \
- DST = OPER_8_IMM(cpustate)<<16; \
- SRC = OPER_8_IMM(cpustate)<<16; \
- REG_DB = DST; \
- REG_A |= REG_B; \
- CLK(7); \
- if (REG_A > 0) \
- { \
- write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
- REG_X = MAKE_UINT_16(REG_X-1); \
- REG_Y = MAKE_UINT_16(REG_Y-1); \
- REG_A--; \
+#define OP_MVP() \
+ DST = OPER_8_IMM(cpustate)<<16; \
+ SRC = OPER_8_IMM(cpustate)<<16; \
+ REG_DB = DST; \
+ REG_A |= REG_B; \
+ CLK(7); \
+ if (REG_A > 0) \
+ { \
+ write_8_NORM(DST | REG_Y, read_8_NORM(SRC | REG_X)); \
+ REG_X = MAKE_UINT_16(REG_X-1); \
+ REG_Y = MAKE_UINT_16(REG_Y-1); \
+ REG_A--; \
if ((REG_A&0xffff) != 0) \
{\
REG_PC -= 3; \
@@ -1454,396 +1454,396 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
{ \
REG_A = 0xff; \
REG_B = 0xff00; \
- } \
+ } \
else \
- { \
- REG_A = 0xffff; \
- } \
+ { \
+ REG_A = 0xffff; \
+ } \
} \
}
#endif
/* M37710 No Operation */
#undef OP_NOP
-#define OP_NOP() \
+#define OP_NOP() \
CLK(CLK_OP + CLK_IMPLIED)
/* M37710 Logical OR operand to accumulator */
#undef OP_ORA
#if FLAG_SET_M
-#define OP_ORA(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_ORA(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_A |= OPER_8_ ## MODE(cpustate)
#else
-#define OP_ORA(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_A |= OPER_16_##MODE(cpustate); \
+#define OP_ORA(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_A |= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_A)
#endif
/* M37710 Logical OR operand to B accumulator */
#undef OP_ORB
#if FLAG_SET_M
-#define OP_ORB(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_ORB(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
FLAG_N = FLAG_Z = REG_BA |= OPER_8_ ## MODE(cpustate)
#else
-#define OP_ORB(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- FLAG_Z = REG_BA |= OPER_16_##MODE(cpustate); \
+#define OP_ORB(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ FLAG_Z = REG_BA |= OPER_16_##MODE(cpustate); \
FLAG_N = NFLAG_16(REG_BA)
#endif
/* M37710 Push Effective Address */
#undef OP_PEA
-#define OP_PEA() \
- CLK(CLK_OP + CLK_R16 + CLK_W16); \
+#define OP_PEA() \
+ CLK(CLK_OP + CLK_R16 + CLK_W16); \
m37710i_push_16(cpustate, OPER_16_IMM(cpustate))
/* M37710 Push Effective Indirect Address */
#undef OP_PEI
-#define OP_PEI() \
- CLK(CLK_OP + CLK_R16 + CLK_W16 + CLK_D); \
+#define OP_PEI() \
+ CLK(CLK_OP + CLK_R16 + CLK_W16 + CLK_D); \
m37710i_push_16(cpustate, EA_DI(cpustate))
/* M37710 Push Effective PC-Relative Address */
#undef OP_PER
-#define OP_PER() \
- CLK(CLK_OP + CLK_R16 + CLK_W16 + 1); \
- SRC = OPER_16_IMM(cpustate); \
+#define OP_PER() \
+ CLK(CLK_OP + CLK_R16 + CLK_W16 + 1); \
+ SRC = OPER_16_IMM(cpustate); \
m37710i_push_16(cpustate, REG_PC + SRC)
/* M37710 Push accumulator to the stack */
#undef OP_PHA
#if FLAG_SET_M
-#define OP_PHA() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHA() \
+ CLK(CLK_OP + CLK_W8 + 1); \
m37710i_push_8(cpustate, REG_A)
#else
-#define OP_PHA() \
- CLK(CLK_OP + CLK_W16 + 1); \
+#define OP_PHA() \
+ CLK(CLK_OP + CLK_W16 + 1); \
m37710i_push_16(cpustate, REG_A)
#endif
/* M37710 Push B accumulator to the stack */
#undef OP_PHAB
#if FLAG_SET_M
-#define OP_PHAB() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHAB() \
+ CLK(CLK_OP + CLK_W8 + 1); \
m37710i_push_8(cpustate, REG_BA)
#else
-#define OP_PHAB() \
- CLK(CLK_OP + CLK_W16 + 1); \
+#define OP_PHAB() \
+ CLK(CLK_OP + CLK_W16 + 1); \
m37710i_push_16(cpustate, REG_BA)
#endif
/* M37710 Push index register to the stack */
#undef OP_PHX
#if FLAG_SET_X
-#define OP_PHX(REG) \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHX(REG) \
+ CLK(CLK_OP + CLK_W8 + 1); \
m37710i_push_8(cpustate, REG)
#else
-#define OP_PHX(REG) \
- CLK(CLK_OP + CLK_W16 + 1); \
+#define OP_PHX(REG) \
+ CLK(CLK_OP + CLK_W16 + 1); \
m37710i_push_16(cpustate, REG)
#endif
/* M37710 Push data bank register */
#undef OP_PHT
-#define OP_PHT() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHT() \
+ CLK(CLK_OP + CLK_W8 + 1); \
m37710i_push_8(cpustate, REG_DB>>16)
/* M37710 Push direct register */
#undef OP_PHD
-#define OP_PHD() \
- CLK(CLK_OP + CLK_W16 + 1); \
+#define OP_PHD() \
+ CLK(CLK_OP + CLK_W16 + 1); \
m37710i_push_16(cpustate, REG_D)
/* M37710 Push program bank register */
#undef OP_PHK
-#define OP_PHK() \
- CLK(CLK_OP + CLK_W8 + 1); \
+#define OP_PHK() \
+ CLK(CLK_OP + CLK_W8 + 1); \
m37710i_push_8(cpustate, REG_PB>>16)
/* M37710 Push the Processor Status Register to the stack */
#undef OP_PHP
-#define OP_PHP() \
- CLK(CLK_OP + CLK_W8 + 1); \
- m37710i_push_8(cpustate, cpustate->ipl); \
+#define OP_PHP() \
+ CLK(CLK_OP + CLK_W8 + 1); \
+ m37710i_push_8(cpustate, cpustate->ipl); \
m37710i_push_8(cpustate, m37710i_get_reg_p(cpustate))
/* M37710 Pull accumulator from the stack */
#undef OP_PLA
#if FLAG_SET_M
-#define OP_PLA() \
- CLK(CLK_OP + CLK_R8 + 2); \
+#define OP_PLA() \
+ CLK(CLK_OP + CLK_R8 + 2); \
FLAG_N = FLAG_Z = REG_A = m37710i_pull_8(cpustate)
#else
-#define OP_PLA() \
- CLK(CLK_OP + CLK_R16 + 2); \
- FLAG_Z = REG_A = m37710i_pull_16(cpustate); \
+#define OP_PLA() \
+ CLK(CLK_OP + CLK_R16 + 2); \
+ FLAG_Z = REG_A = m37710i_pull_16(cpustate); \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Pull B accumulator from the stack */
#undef OP_PLAB
#if FLAG_SET_M
-#define OP_PLAB() \
- CLK(CLK_OP + CLK_R8 + 2); \
+#define OP_PLAB() \
+ CLK(CLK_OP + CLK_R8 + 2); \
FLAG_N = FLAG_Z = REG_BA = m37710i_pull_8(cpustate)
#else
-#define OP_PLAB() \
- CLK(CLK_OP + CLK_R16 + 2); \
- FLAG_Z = REG_BA = m37710i_pull_16(cpustate); \
+#define OP_PLAB() \
+ CLK(CLK_OP + CLK_R16 + 2); \
+ FLAG_Z = REG_BA = m37710i_pull_16(cpustate); \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Pull index register from the stack */
#undef OP_PLX
#if FLAG_SET_X
-#define OP_PLX(REG) \
- CLK(CLK_OP + CLK_R8 + 2); \
+#define OP_PLX(REG) \
+ CLK(CLK_OP + CLK_R8 + 2); \
FLAG_N = FLAG_Z = REG = m37710i_pull_8(cpustate)
#else
-#define OP_PLX(REG) \
- CLK(CLK_OP + CLK_R16 + 2); \
- FLAG_Z = REG = m37710i_pull_16(cpustate); \
+#define OP_PLX(REG) \
+ CLK(CLK_OP + CLK_R16 + 2); \
+ FLAG_Z = REG = m37710i_pull_16(cpustate); \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Pull data bank register */
#undef OP_PLT
-#define OP_PLT() \
- CLK(CLK_OP + CLK_R8 + 2); \
- FLAG_N = FLAG_Z = m37710i_pull_8(cpustate); \
+#define OP_PLT() \
+ CLK(CLK_OP + CLK_R8 + 2); \
+ FLAG_N = FLAG_Z = m37710i_pull_8(cpustate); \
REG_DB = FLAG_Z << 16
/* M37710 Pull direct register */
#undef OP_PLD
-#define OP_PLD() \
- CLK(CLK_OP + CLK_R16 + 2); \
+#define OP_PLD() \
+ CLK(CLK_OP + CLK_R16 + 2); \
REG_D = m37710i_pull_16(cpustate)
/* M37710 Pull the Processor Status Register from the stack */
#undef OP_PLP
-#define OP_PLP() \
- CLK(CLK_OP + CLK_R8 + 2); \
- m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); \
- m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); \
+#define OP_PLP() \
+ CLK(CLK_OP + CLK_R8 + 2); \
+ m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); \
+ m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); \
m37710i_update_irqs(cpustate)
/* M37710 Reset Program status word */
#undef OP_REP
-#define OP_REP() \
- CLK(CLK_OP + CLK_R8 + 1); \
- m37710i_set_reg_p(cpustate, m37710i_get_reg_p(cpustate) & ~OPER_8_IMM(cpustate)); \
+#define OP_REP() \
+ CLK(CLK_OP + CLK_R8 + 1); \
+ m37710i_set_reg_p(cpustate, m37710i_get_reg_p(cpustate) & ~OPER_8_IMM(cpustate)); \
m37710i_update_irqs(cpustate)
/* M37710 Clear "M" status bit */
#undef OP_CLM
-#define OP_CLM() \
- CLK(CLK_OP + CLK_R8 + 1); \
+#define OP_CLM() \
+ CLK(CLK_OP + CLK_R8 + 1); \
m37710i_set_reg_p(cpustate, m37710i_get_reg_p(cpustate) & ~FLAGPOS_M)
/* M37710 Rotate Left the accumulator */
#undef OP_ROL
#if FLAG_SET_M
-#define OP_ROL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = (REG_A<<1) | CFLAG_AS_1(); \
+#define OP_ROL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = (REG_A<<1) | CFLAG_AS_1(); \
FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(FLAG_C)
#else
-#define OP_ROL() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = (REG_A<<1) | CFLAG_AS_1(); \
- FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_ROL() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = (REG_A<<1) | CFLAG_AS_1(); \
+ FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = CFLAG_16(FLAG_C)
#endif
/* M37710 Rotate Left the B accumulator */
#undef OP_ROLB
#if FLAG_SET_M
-#define OP_ROLB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = (REG_BA<<1) | CFLAG_AS_1(); \
+#define OP_ROLB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = (REG_BA<<1) | CFLAG_AS_1(); \
FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(FLAG_C)
#else
-#define OP_ROLB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_C = (REG_BA<<1) | CFLAG_AS_1(); \
- FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
+#define OP_ROLB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_C = (REG_BA<<1) | CFLAG_AS_1(); \
+ FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
FLAG_C = CFLAG_16(FLAG_C)
#endif
/* M37710 Rotate Left the accumulator by a specified amount */
#undef OP_RLA
#if FLAG_SET_M
-#define OP_RLA(MODE) \
+#define OP_RLA(MODE) \
{ int cnt = OPER_8_##MODE(cpustate); while (cnt > 0) { CLK(6); REG_A=((REG_A<<1)|(REG_A>>7&1))&0xff; cnt--; } }
#else
-#define OP_RLA(MODE) \
+#define OP_RLA(MODE) \
{ int cnt = OPER_16_##MODE(cpustate); while (cnt > 0) { CLK(6); REG_A=((REG_A<<1)|(REG_A>>15&1))&0xffff; cnt--; } }
#endif
/* M37710 Rotate Left an operand */
#undef OP_ROLM
#if FLAG_SET_M
-#define OP_ROLM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = (read_8_##MODE(DST)<<1) | CFLAG_AS_1(); \
- FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
+#define OP_ROLM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = (read_8_##MODE(DST)<<1) | CFLAG_AS_1(); \
+ FLAG_N = FLAG_Z = MAKE_UINT_8(FLAG_C); \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_ROLM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = (read_16_##MODE(DST)<<1) | CFLAG_AS_1(); \
- FLAG_Z = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(FLAG_C); \
- FLAG_C = CFLAG_16(FLAG_C); \
+#define OP_ROLM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = (read_16_##MODE(DST)<<1) | CFLAG_AS_1(); \
+ FLAG_Z = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(FLAG_C); \
+ FLAG_C = CFLAG_16(FLAG_C); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M37710 Rotate Right the accumulator */
#undef OP_ROR
#if FLAG_SET_M
-#define OP_ROR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- REG_A |= FLAG_C & 0x100; \
- FLAG_C = REG_A << 8; \
+#define OP_ROR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ REG_A |= FLAG_C & 0x100; \
+ FLAG_C = REG_A << 8; \
FLAG_N = FLAG_Z = REG_A >>= 1
#else
-#define OP_ROR() \
- CLK(CLK_OP + CLK_IMPLIED); \
- REG_A |= (FLAG_C<<8) & 0x10000; \
- FLAG_C = REG_A << 8; \
- FLAG_Z = REG_A >>= 1; \
+#define OP_ROR() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ REG_A |= (FLAG_C<<8) & 0x10000; \
+ FLAG_C = REG_A << 8; \
+ FLAG_Z = REG_A >>= 1; \
FLAG_N = NFLAG_16(REG_A)
#endif
/* M37710 Rotate Right the B accumulator */
#undef OP_RORB
#if FLAG_SET_M
-#define OP_RORB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- REG_BA |= FLAG_C & 0x100; \
- FLAG_C = REG_BA << 8; \
+#define OP_RORB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ REG_BA |= FLAG_C & 0x100; \
+ FLAG_C = REG_BA << 8; \
FLAG_N = FLAG_Z = REG_BA >>= 1
#else
-#define OP_RORB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- REG_BA |= (FLAG_C<<8) & 0x10000; \
- FLAG_C = REG_BA << 8; \
- FLAG_Z = REG_BA >>= 1; \
+#define OP_RORB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ REG_BA |= (FLAG_C<<8) & 0x10000; \
+ FLAG_C = REG_BA << 8; \
+ FLAG_Z = REG_BA >>= 1; \
FLAG_N = NFLAG_16(REG_BA)
#endif
/* M37710 Rotate Right an operand */
#undef OP_RORM
#if FLAG_SET_M
-#define OP_RORM(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_8_##MODE(DST) | (FLAG_C & 0x100); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_N = FLAG_Z >>= 1; \
+#define OP_RORM(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_8_##MODE(DST) | (FLAG_C & 0x100); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_N = FLAG_Z >>= 1; \
write_8_##MODE(DST, FLAG_Z)
#else
-#define OP_RORM(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- FLAG_Z = read_16_##MODE(DST) | ((FLAG_C<<8) & 0x10000); \
- FLAG_C = FLAG_Z << 8; \
- FLAG_Z >>= 1; \
- FLAG_N = NFLAG_16(FLAG_Z); \
+#define OP_RORM(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_Z = read_16_##MODE(DST) | ((FLAG_C<<8) & 0x10000); \
+ FLAG_C = FLAG_Z << 8; \
+ FLAG_Z >>= 1; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
write_16_##MODE(DST, FLAG_Z)
#endif
/* M37710 Return from Interrupt */
#undef OP_RTI
-#define OP_RTI() \
- CLK(8); \
- m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); \
- m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); \
- m37710i_jump_16(cpustate, m37710i_pull_16(cpustate)); \
- REG_PB = m37710i_pull_8(cpustate) << 16; \
- m37710i_jumping(REG_PB | REG_PC); \
+#define OP_RTI() \
+ CLK(8); \
+ m37710i_set_reg_p(cpustate, m37710i_pull_8(cpustate)); \
+ m37710i_set_reg_ipl(cpustate, m37710i_pull_8(cpustate)); \
+ m37710i_jump_16(cpustate, m37710i_pull_16(cpustate)); \
+ REG_PB = m37710i_pull_8(cpustate) << 16; \
+ m37710i_jumping(REG_PB | REG_PC); \
m37710i_update_irqs(cpustate)
/* M37710 Return from Subroutine Long */
#undef OP_RTL
-#define OP_RTL() \
- CLK(6); \
+#define OP_RTL() \
+ CLK(6); \
m37710i_jump_24(cpustate, m37710i_pull_24(cpustate))
/* M37710 Return from Subroutine */
#undef OP_RTS
-#define OP_RTS() \
- CLK(6); \
- DST = m37710i_pull_16(cpustate); \
+#define OP_RTS() \
+ CLK(6); \
+ DST = m37710i_pull_16(cpustate); \
m37710i_jump_16(cpustate, DST)
/* M37710 Subtract with Carry */
/* Unusual behavior: C flag is inverted */
#undef OP_SBC
#if FLAG_SET_M
-#define OP_SBC(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- SRC = OPER_8_##MODE(cpustate); \
- FLAG_C = ~FLAG_C; \
- if(!FLAG_D) \
- { \
- FLAG_C = REG_A - SRC - CFLAG_AS_1(); \
- FLAG_V = VFLAG_SUB_8(SRC, REG_A, FLAG_C); \
- FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(FLAG_C); \
- FLAG_C = ~FLAG_C; \
- BREAKOUT; \
- } \
- DST = CFLAG_AS_1(); \
- FLAG_C = REG_A - SRC - DST; \
- FLAG_V = VFLAG_SUB_8(SRC, REG_A, FLAG_C); \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C-=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C-=0x60; \
- FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(FLAG_C); \
+#define OP_SBC(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ SRC = OPER_8_##MODE(cpustate); \
+ FLAG_C = ~FLAG_C; \
+ if(!FLAG_D) \
+ { \
+ FLAG_C = REG_A - SRC - CFLAG_AS_1(); \
+ FLAG_V = VFLAG_SUB_8(SRC, REG_A, FLAG_C); \
+ FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(FLAG_C); \
+ FLAG_C = ~FLAG_C; \
+ BREAKOUT; \
+ } \
+ DST = CFLAG_AS_1(); \
+ FLAG_C = REG_A - SRC - DST; \
+ FLAG_V = VFLAG_SUB_8(SRC, REG_A, FLAG_C); \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C-=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C-=0x60; \
+ FLAG_N = FLAG_Z = REG_A = MAKE_UINT_8(FLAG_C); \
FLAG_C = ~FLAG_C
#else
-#define OP_SBC(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- SRC = OPER_16_##MODE(cpustate); \
- FLAG_C = ~FLAG_C; \
- if(!FLAG_D) \
- { \
- FLAG_C = REG_A - SRC - CFLAG_AS_1(); \
- FLAG_V = VFLAG_SUB_16(SRC, REG_A, FLAG_C); \
- FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(REG_A); \
- FLAG_C = ~CFLAG_16(FLAG_C); \
- BREAKOUT; \
- } \
- DST = CFLAG_AS_1(); \
- FLAG_C = MAKE_UINT_8(REG_A) - MAKE_UINT_8(SRC) - DST; \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C-=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C-=0x60; \
- FLAG_Z = MAKE_UINT_8(FLAG_C); \
- DST = CFLAG_AS_1(); \
- FLAG_C = MAKE_UINT_8(REG_A>>8) - MAKE_UINT_8(SRC>>8) - DST; \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C-=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C-=0x60; \
- FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- FLAG_V = VFLAG_SUB_16(SRC, REG_A, FLAG_Z); \
- REG_A = FLAG_Z; \
+#define OP_SBC(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ SRC = OPER_16_##MODE(cpustate); \
+ FLAG_C = ~FLAG_C; \
+ if(!FLAG_D) \
+ { \
+ FLAG_C = REG_A - SRC - CFLAG_AS_1(); \
+ FLAG_V = VFLAG_SUB_16(SRC, REG_A, FLAG_C); \
+ FLAG_Z = REG_A = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(REG_A); \
+ FLAG_C = ~CFLAG_16(FLAG_C); \
+ BREAKOUT; \
+ } \
+ DST = CFLAG_AS_1(); \
+ FLAG_C = MAKE_UINT_8(REG_A) - MAKE_UINT_8(SRC) - DST; \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C-=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C-=0x60; \
+ FLAG_Z = MAKE_UINT_8(FLAG_C); \
+ DST = CFLAG_AS_1(); \
+ FLAG_C = MAKE_UINT_8(REG_A>>8) - MAKE_UINT_8(SRC>>8) - DST; \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C-=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C-=0x60; \
+ FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ FLAG_V = VFLAG_SUB_16(SRC, REG_A, FLAG_Z); \
+ REG_A = FLAG_Z; \
FLAG_C = ~FLAG_C
#endif
@@ -1851,151 +1851,151 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* Unusual behavior: C flag is inverted */
#undef OP_SBCB
#if FLAG_SET_M
-#define OP_SBCB(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
- SRC = OPER_8_##MODE(cpustate); \
- FLAG_C = ~FLAG_C; \
- if(!FLAG_D) \
- { \
- FLAG_C = REG_BA - SRC - CFLAG_AS_1(); \
- FLAG_V = VFLAG_SUB_8(SRC, REG_BA, FLAG_C); \
- FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(FLAG_C); \
- FLAG_C = ~FLAG_C; \
- BREAKOUT; \
- } \
- DST = CFLAG_AS_1(); \
- FLAG_C = REG_BA - SRC - DST; \
- FLAG_V = VFLAG_SUB_8(SRC, REG_BA, FLAG_C); \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C-=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C-=0x60; \
- FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(FLAG_C); \
+#define OP_SBCB(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+ SRC = OPER_8_##MODE(cpustate); \
+ FLAG_C = ~FLAG_C; \
+ if(!FLAG_D) \
+ { \
+ FLAG_C = REG_BA - SRC - CFLAG_AS_1(); \
+ FLAG_V = VFLAG_SUB_8(SRC, REG_BA, FLAG_C); \
+ FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(FLAG_C); \
+ FLAG_C = ~FLAG_C; \
+ BREAKOUT; \
+ } \
+ DST = CFLAG_AS_1(); \
+ FLAG_C = REG_BA - SRC - DST; \
+ FLAG_V = VFLAG_SUB_8(SRC, REG_BA, FLAG_C); \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C-=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C-=0x60; \
+ FLAG_N = FLAG_Z = REG_BA = MAKE_UINT_8(FLAG_C); \
FLAG_C = ~FLAG_C
#else
-#define OP_SBCB(MODE) \
- CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
- SRC = OPER_16_##MODE(cpustate); \
- FLAG_C = ~FLAG_C; \
- if(!FLAG_D) \
- { \
- FLAG_C = REG_BA - SRC - CFLAG_AS_1(); \
- FLAG_V = VFLAG_SUB_16(SRC, REG_BA, FLAG_C); \
- FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
- FLAG_N = NFLAG_16(REG_BA); \
- FLAG_C = ~CFLAG_16(FLAG_C); \
- BREAKOUT; \
- } \
- DST = CFLAG_AS_1(); \
- FLAG_C = MAKE_UINT_8(REG_BA) - MAKE_UINT_8(SRC) - DST; \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C-=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C-=0x60; \
- FLAG_Z = MAKE_UINT_8(FLAG_C); \
- DST = CFLAG_AS_1(); \
- FLAG_C = MAKE_UINT_8(REG_A>>8) - MAKE_UINT_8(SRC>>8) - DST; \
- if((FLAG_C & 0xf) > 9) \
- FLAG_C-=6; \
- if((FLAG_C & 0xf0) > 0x90) \
- FLAG_C-=0x60; \
- FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- FLAG_V = VFLAG_SUB_16(SRC, REG_BA, FLAG_Z); \
- REG_BA = FLAG_Z; \
+#define OP_SBCB(MODE) \
+ CLK(CLK_OP + CLK_R16 + CLK_##MODE); \
+ SRC = OPER_16_##MODE(cpustate); \
+ FLAG_C = ~FLAG_C; \
+ if(!FLAG_D) \
+ { \
+ FLAG_C = REG_BA - SRC - CFLAG_AS_1(); \
+ FLAG_V = VFLAG_SUB_16(SRC, REG_BA, FLAG_C); \
+ FLAG_Z = REG_BA = MAKE_UINT_16(FLAG_C); \
+ FLAG_N = NFLAG_16(REG_BA); \
+ FLAG_C = ~CFLAG_16(FLAG_C); \
+ BREAKOUT; \
+ } \
+ DST = CFLAG_AS_1(); \
+ FLAG_C = MAKE_UINT_8(REG_BA) - MAKE_UINT_8(SRC) - DST; \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C-=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C-=0x60; \
+ FLAG_Z = MAKE_UINT_8(FLAG_C); \
+ DST = CFLAG_AS_1(); \
+ FLAG_C = MAKE_UINT_8(REG_A>>8) - MAKE_UINT_8(SRC>>8) - DST; \
+ if((FLAG_C & 0xf) > 9) \
+ FLAG_C-=6; \
+ if((FLAG_C & 0xf0) > 0x90) \
+ FLAG_C-=0x60; \
+ FLAG_Z |= MAKE_UINT_8(FLAG_C) << 8; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ FLAG_V = VFLAG_SUB_16(SRC, REG_BA, FLAG_Z); \
+ REG_BA = FLAG_Z; \
FLAG_C = ~FLAG_C
#endif
/* M37710 Set Carry flag */
#undef OP_SEC
-#define OP_SEC() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_SEC() \
+ CLK(CLK_OP + CLK_IMPLIED); \
FLAG_C = CFLAG_SET
/* M37710 Set Interrupt Mask flag */
#undef OP_SEI
-#define OP_SEI() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_SEI() \
+ CLK(CLK_OP + CLK_IMPLIED); \
m37710i_set_flag_i(cpustate, IFLAG_SET)
/* M37710 Set Program status word */
#undef OP_SEP
-#define OP_SEP() \
- CLK(CLK_OP + CLK_R8 + 1); \
+#define OP_SEP() \
+ CLK(CLK_OP + CLK_R8 + 1); \
m37710i_set_reg_p(cpustate, m37710i_get_reg_p(cpustate) | OPER_8_IMM(cpustate))
/* M37710 Set "M" status bit */
#undef OP_SEM
-#define OP_SEM() \
- CLK(CLK_OP + CLK_R8 + 1); \
+#define OP_SEM() \
+ CLK(CLK_OP + CLK_R8 + 1); \
m37710i_set_reg_p(cpustate, m37710i_get_reg_p(cpustate) | FLAGPOS_M)
/* M37710 Store accumulator to memory */
#undef OP_STA
#if FLAG_SET_M
-#define OP_STA(MODE) \
- CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
+#define OP_STA(MODE) \
+ CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
write_8_##MODE(EA_##MODE(cpustate), REG_A)
#else
-#define OP_STA(MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
+#define OP_STA(MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
write_16_##MODE(EA_##MODE(cpustate), REG_A)
#endif
/* M37710 Store B accumulator to memory */
#undef OP_STB
#if FLAG_SET_M
-#define OP_STB(MODE) \
- CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
+#define OP_STB(MODE) \
+ CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
write_8_##MODE(EA_##MODE(cpustate), REG_BA)
#else
-#define OP_STB(MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
+#define OP_STB(MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
write_16_##MODE(EA_##MODE(cpustate), REG_BA)
#endif
/* M37710 Store index register to memory */
#undef OP_STX
#if FLAG_SET_X
-#define OP_STX(REG, MODE) \
- CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
+#define OP_STX(REG, MODE) \
+ CLK(CLK_OP + CLK_W8 + CLK_W_##MODE); \
write_8_##MODE(EA_##MODE(cpustate), REG)
#else
-#define OP_STX(REG, MODE) \
- CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
+#define OP_STX(REG, MODE) \
+ CLK(CLK_OP + CLK_W16 + CLK_W_##MODE); \
write_16_##MODE(EA_##MODE(cpustate), REG)
#endif
/* M37710 Stop the clock */
#undef OP_STP
-#define OP_STP() \
- USE_ALL_CLKS(); \
+#define OP_STP() \
+ USE_ALL_CLKS(); \
CPU_STOPPED |= STOP_LEVEL_STOP
/* M37710 Transfer accumulator to index */
#undef OP_TAX
#if FLAG_SET_M
#if FLAG_SET_X
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REG_A; \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REG_A; \
FLAG_N = NFLAG_8(FLAG_Z)
#else /* FLAG_SET_X */
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REG_B | REG_A; \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REG_B | REG_A; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif /* FLAG_SET_X */
#else /* FLAG_SET_M */
#if FLAG_SET_X
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = MAKE_UINT_8(REG_A); \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = MAKE_UINT_8(REG_A); \
FLAG_N = NFLAG_8(FLAG_Z)
#else /* FLAG_SET_X */
-#define OP_TAX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REG_A; \
+#define OP_TAX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REG_A; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif /* FLAG_SET_X */
#endif /* FLAG_SET_M */
@@ -2005,26 +2005,26 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#undef OP_TBX
#if FLAG_SET_M
#if FLAG_SET_X
-#define OP_TBX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REG_BA; \
+#define OP_TBX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REG_BA; \
FLAG_N = NFLAG_8(FLAG_Z)
#else /* FLAG_SET_X */
-#define OP_TBX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REG_BB | REG_BA; \
+#define OP_TBX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REG_BB | REG_BA; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif /* FLAG_SET_X */
#else /* FLAG_SET_M */
#if FLAG_SET_X
-#define OP_TBX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = MAKE_UINT_8(REG_BA); \
+#define OP_TBX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = MAKE_UINT_8(REG_BA); \
FLAG_N = NFLAG_8(FLAG_Z)
#else /* FLAG_SET_X */
-#define OP_TBX(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG = REG_BA; \
+#define OP_TBX(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG = REG_BA; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif /* FLAG_SET_X */
#endif /* FLAG_SET_M */
@@ -2032,271 +2032,271 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
/* M37710 Transfer index to accumulator */
#undef OP_TXA
#if FLAG_SET_M
-#define OP_TXA(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_A = MAKE_UINT_8(REG); \
+#define OP_TXA(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_A = MAKE_UINT_8(REG); \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TXA(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_A = REG; \
+#define OP_TXA(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_A = REG; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer index to accumulator B */
#undef OP_TXB
#if FLAG_SET_M
-#define OP_TXB(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_BA = MAKE_UINT_8(REG); \
+#define OP_TXB(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_BA = MAKE_UINT_8(REG); \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TXB(REG) \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_BA = REG; \
+#define OP_TXB(REG) \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_BA = REG; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer accumulator to direct register */
#undef OP_TAD
#if FLAG_SET_M
-#define OP_TAD() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TAD() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_D = REG_A | REG_B
#else
-#define OP_TAD() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TAD() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_D = REG_A
#endif
/* M37710 Transfer accumulator B to direct register */
#undef OP_TBD
#if FLAG_SET_M
-#define OP_TBD() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TBD() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_D = REG_BA | REG_BB
#else
-#define OP_TBD() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TBD() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_D = REG_BA
#endif
/* M37710 Transfer direct register to accumulator */
#undef OP_TDA
#if FLAG_SET_M
-#define OP_TDA() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_D; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- REG_A = MAKE_UINT_8(REG_D); \
+#define OP_TDA() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_D; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ REG_A = MAKE_UINT_8(REG_D); \
REG_B = REG_D & 0xff00
#else
-#define OP_TDA() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_A = REG_D; \
+#define OP_TDA() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_A = REG_D; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer direct register to accumulator B */
#undef OP_TDB
#if FLAG_SET_M
-#define OP_TDB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_D; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- REG_BA = MAKE_UINT_8(REG_D); \
+#define OP_TDB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_D; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ REG_BA = MAKE_UINT_8(REG_D); \
REG_BB = REG_D & 0xff00
#else
-#define OP_TDB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_BA = REG_D; \
+#define OP_TDB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_BA = REG_D; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer accumulator to stack pointer */
#undef OP_TAS
#if FLAG_SET_M
-#define OP_TAS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TAS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_S = REG_A | REG_B
#else
-#define OP_TAS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TAS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_S = REG_A
#endif
/* M37710 Transfer accumulator B to stack pointer */
#undef OP_TBS
#if FLAG_SET_M
-#define OP_TBS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TBS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_S = REG_BA | REG_BB
#else
-#define OP_TBS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TBS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_S = REG_BA
#endif
/* M37710 Transfer stack pointer to accumulator */
#undef OP_TSA
#if FLAG_SET_M
-#define OP_TSA() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_S; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- REG_A = MAKE_UINT_8(REG_S); \
+#define OP_TSA() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_S; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ REG_A = MAKE_UINT_8(REG_S); \
REG_B = REG_S & 0xff00
#else
-#define OP_TSA() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_A = REG_S; \
+#define OP_TSA() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_A = REG_S; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer stack pointer to accumulator B */
#undef OP_TSB
#if FLAG_SET_M
-#define OP_TSB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_S; \
- FLAG_N = NFLAG_16(FLAG_Z); \
- REG_BA = MAKE_UINT_8(REG_S); \
+#define OP_TSB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_S; \
+ FLAG_N = NFLAG_16(FLAG_Z); \
+ REG_BA = MAKE_UINT_8(REG_S); \
REG_BB = REG_S & 0xff00
#else
-#define OP_TSB() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_BA = REG_S; \
+#define OP_TSB() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_BA = REG_S; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer stack pointer to X */
#undef OP_TSX
#if FLAG_SET_X
-#define OP_TSX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_X = MAKE_UINT_8(REG_S); \
+#define OP_TSX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_X = MAKE_UINT_8(REG_S); \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TSX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_X = REG_S; \
+#define OP_TSX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_X = REG_S; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer X to stack pointer */
#undef OP_TXS
#if FLAG_SET_X
-#define OP_TXS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TXS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_S = MAKE_UINT_8(REG_X)
#else
-#define OP_TXS() \
- CLK(CLK_OP + CLK_IMPLIED); \
+#define OP_TXS() \
+ CLK(CLK_OP + CLK_IMPLIED); \
REG_S = REG_X
#endif
/* M37710 Transfer X to Y */
#undef OP_TXY
#if FLAG_SET_X
-#define OP_TXY() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_Y = REG_X; \
+#define OP_TXY() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_Y = REG_X; \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TXY() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_Y = REG_X; \
+#define OP_TXY() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_Y = REG_X; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 Transfer Y to X */
#undef OP_TYX
#if FLAG_SET_X
-#define OP_TYX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_X = REG_Y; \
+#define OP_TYX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_X = REG_Y; \
FLAG_N = NFLAG_8(FLAG_Z)
#else
-#define OP_TYX() \
- CLK(CLK_OP + CLK_IMPLIED); \
- FLAG_Z = REG_X = REG_Y; \
+#define OP_TYX() \
+ CLK(CLK_OP + CLK_IMPLIED); \
+ FLAG_Z = REG_X = REG_Y; \
FLAG_N = NFLAG_16(FLAG_Z)
#endif
/* M37710 clear bit */
#undef OP_CLB
#if FLAG_SET_M
-#define OP_CLB(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- REG_IM = read_8_##MODE(DST); \
- REG_IM2 = read_8_NORM(REG_PB | REG_PC); \
- REG_PC++; \
+#define OP_CLB(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ REG_IM = read_8_##MODE(DST); \
+ REG_IM2 = read_8_NORM(REG_PB | REG_PC); \
+ REG_PC++; \
write_8_##MODE(DST, REG_IM & ~REG_IM2);
#else
-#define OP_CLB(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- REG_IM = read_16_##MODE(DST); \
- REG_IM2 = read_16_NORM(REG_PB | REG_PC); \
- REG_PC+=2; \
+#define OP_CLB(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ REG_IM = read_16_##MODE(DST); \
+ REG_IM2 = read_16_NORM(REG_PB | REG_PC); \
+ REG_PC+=2; \
write_16_##MODE(DST, REG_IM & ~REG_IM2);
#endif
/* M37710 set bit */
#undef OP_SEB
#if FLAG_SET_M
-#define OP_SEB(MODE) \
- CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- REG_IM = read_8_##MODE(DST); \
- REG_IM2 = read_8_NORM(REG_PB | REG_PC); \
- REG_PC++; \
+#define OP_SEB(MODE) \
+ CLK(CLK_OP + CLK_RMW8 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ REG_IM = read_8_##MODE(DST); \
+ REG_IM2 = read_8_NORM(REG_PB | REG_PC); \
+ REG_PC++; \
write_8_##MODE(DST, REG_IM | REG_IM2);
#else
-#define OP_SEB(MODE) \
- CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
- DST = EA_##MODE(cpustate); \
- REG_IM = read_16_##MODE(DST); \
- REG_IM2 = read_16_NORM(REG_PB | REG_PC); \
- REG_PC+=2; \
+#define OP_SEB(MODE) \
+ CLK(CLK_OP + CLK_RMW16 + CLK_W_##MODE); \
+ DST = EA_##MODE(cpustate); \
+ REG_IM = read_16_##MODE(DST); \
+ REG_IM2 = read_16_NORM(REG_PB | REG_PC); \
+ REG_PC+=2; \
write_16_##MODE(DST, REG_IM | REG_IM2);
#endif
/* M37710 Wait for interrupt */
#undef OP_WAI
-#define OP_WAI() \
- USE_ALL_CLKS(); \
+#define OP_WAI() \
+ USE_ALL_CLKS(); \
CPU_STOPPED |= STOP_LEVEL_WAI
/* M37710 load data bank register */
#undef OP_LDT
-#define OP_LDT(MODE) \
- CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
+#define OP_LDT(MODE) \
+ CLK(CLK_OP + CLK_R8 + CLK_##MODE); \
REG_DB = OPER_8_##MODE(cpustate)<<16;
/* M37710 prefix for B accumulator (0x42) */
/* There is a 2 cycle penalty for all instructions using this prefix */
#undef OP_PFB
-#define OP_PFB() \
- CLK(2); \
- REG_IR = read_8_IMM(REG_PB | REG_PC); \
- REG_PC++; \
+#define OP_PFB() \
+ CLK(2); \
+ REG_IR = read_8_IMM(REG_PB | REG_PC); \
+ REG_PC++; \
cpustate->opcodes42[REG_IR](cpustate);
/* M37710 prefix for multiply / divide instructions (0x89) */
#undef OP_PFXM
-#define OP_PFXM() \
- REG_IR = read_8_IMM(REG_PB | REG_PC); \
- REG_PC++; \
+#define OP_PFXM() \
+ REG_IR = read_8_IMM(REG_PB | REG_PC); \
+ REG_PC++; \
cpustate->opcodes89[REG_IR](cpustate);
/* M37710 unimplemented opcode */
#undef OP_UNIMP
-#define OP_UNIMP() \
+#define OP_UNIMP() \
logerror("error M37710: UNIMPLEMENTED OPCODE! K=%x PC=%x\n", REG_PB, REG_PPC);
/* ======================================================================== */
@@ -2314,7 +2314,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#define TABLE_OPCODES void (*const m37710i_opcodes_M0X0[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M0X0[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M0X0[256])(m37710i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M0X0 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M0X0 ARGS
#elif !FLAG_SET_M && FLAG_SET_X
@@ -2323,7 +2323,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#define TABLE_OPCODES void (*const m37710i_opcodes_M0X1[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M0X1[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M0X1[256])(m37710i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M0X1 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M0X1 ARGS
#elif FLAG_SET_M && !FLAG_SET_X
@@ -2332,7 +2332,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#define TABLE_OPCODES void (*const m37710i_opcodes_M1X0[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M1X0[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M1X0[256])(m37710i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M1X0 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M1X0 ARGS
#elif FLAG_SET_M && FLAG_SET_X
@@ -2341,7 +2341,7 @@ INLINE uint EA_SIY(m37710i_cpu_struct *cpustate) {return MAKE_UINT_16(read_16_
#define TABLE_OPCODES void (*const m37710i_opcodes_M1X1[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES2 void (*const m37710i_opcodes42_M1X1[256])(m37710i_cpu_struct *cpustate)
#define TABLE_OPCODES3 void (*const m37710i_opcodes89_M1X1[256])(m37710i_cpu_struct *cpustate)
-#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M1X1 ARGS
+#define TABLE_FUNCTION(RTYPE, NAME, ARGS) RTYPE m37710i_ ## NAME ## _M1X1 ARGS
#endif
@@ -2785,37 +2785,37 @@ TABLE_OPCODES =
// 00 01 02 03 04 05 06 07
// 08 09 0a 0b 0c 0d 0e 0f
{
- O(00), O(01), O(02), O(03), O(04), O(05), O(06), O(07), // 00
+ O(00), O(01), O(02), O(03), O(04), O(05), O(06), O(07), // 00
O(08), O(09), O(0a), O(0b), O(0c), O(0d), O(0e), O(0f),
- O(10), O(11), O(12), O(13), O(14), O(15), O(16), O(17), // 10
+ O(10), O(11), O(12), O(13), O(14), O(15), O(16), O(17), // 10
O(18), O(19), O(1a), O(1b), O(1c), O(1d), O(1e), O(1f),
- O(20), O(21), O(22), O(23), O(24), O(25), O(26), O(27), // 20
+ O(20), O(21), O(22), O(23), O(24), O(25), O(26), O(27), // 20
O(28), O(29), O(2a), O(2b), O(2c), O(2d), O(2e), O(2f),
- O(30), O(31), O(32), O(33), O(34), O(35), O(36), O(37), // 30
+ O(30), O(31), O(32), O(33), O(34), O(35), O(36), O(37), // 30
O(38), O(39), O(3a), O(3b), O(3c), O(3d), O(3e), O(3f),
- O(40), O(41), O(42), O(43), O(44), O(45), O(46), O(47), // 40
+ O(40), O(41), O(42), O(43), O(44), O(45), O(46), O(47), // 40
O(48), O(49), O(4a), O(4b), O(4c), O(4d), O(4e), O(4f),
- O(50), O(51), O(52), O(53), O(54), O(55), O(56), O(57), // 50
+ O(50), O(51), O(52), O(53), O(54), O(55), O(56), O(57), // 50
O(58), O(59), O(5a), O(5b), O(5c), O(5d), O(5e), O(5f),
- O(60), O(61), O(62), O(63), O(64), O(65), O(66), O(67), // 60
+ O(60), O(61), O(62), O(63), O(64), O(65), O(66), O(67), // 60
O(68), O(69), O(6a), O(6b), O(6c), O(6d), O(6e), O(6f),
- O(70), O(71), O(72), O(73), O(74), O(75), O(76), O(77), // 70
+ O(70), O(71), O(72), O(73), O(74), O(75), O(76), O(77), // 70
O(78), O(79), O(7a), O(7b), O(7c), O(7d), O(7e), O(7f),
- O(80), O(81), O(82), O(83), O(84), O(85), O(86), O(87), // 80
+ O(80), O(81), O(82), O(83), O(84), O(85), O(86), O(87), // 80
O(88), O(89), O(8a), O(8b), O(8c), O(8d), O(8e), O(8f),
- O(90), O(91), O(92), O(93), O(94), O(95), O(96), O(97), // 90
+ O(90), O(91), O(92), O(93), O(94), O(95), O(96), O(97), // 90
O(98), O(99), O(9a), O(9b), O(9c), O(9d), O(9e), O(9f),
- O(a0), O(a1), O(a2), O(a3), O(a4), O(a5), O(a6), O(a7), // a0
+ O(a0), O(a1), O(a2), O(a3), O(a4), O(a5), O(a6), O(a7), // a0
O(a8), O(a9), O(aa), O(ab), O(ac), O(ad), O(ae), O(af),
- O(b0), O(b1), O(b2), O(b3), O(b4), O(b5), O(b6), O(b7), // b0
+ O(b0), O(b1), O(b2), O(b3), O(b4), O(b5), O(b6), O(b7), // b0
O(b8), O(b9), O(ba), O(bb), O(bc), O(bd), O(be), O(bf),
- O(c0), O(c1), O(c2), O(c3), O(c4), O(c5), O(c6), O(c7), // c0
+ O(c0), O(c1), O(c2), O(c3), O(c4), O(c5), O(c6), O(c7), // c0
O(c8), O(c9), O(ca), O(cb), O(cc), O(cd), O(ce), O(cf),
- O(d0), O(d1), O(d2), O(d3), O(d4), O(d5), O(d6), O(d7), // d0
+ O(d0), O(d1), O(d2), O(d3), O(d4), O(d5), O(d6), O(d7), // d0
O(d8), O(d9), O(da), O(db), O(dc), O(dd), O(de), O(df),
- O(e0), O(e1), O(e2), O(e3), O(e4), O(e5), O(e6), O(e7), // e0
+ O(e0), O(e1), O(e2), O(e3), O(e4), O(e5), O(e6), O(e7), // e0
O(e8), O(e9), O(ea), O(eb), O(ec), O(ed), O(ee), O(ef),
- O(f0), O(f1), O(f2), O(f3), O(f4), O(f5), O(f6), O(f7), // f0
+ O(f0), O(f1), O(f2), O(f3), O(f4), O(f5), O(f6), O(f7), // f0
O(f8), O(f9), O(fa), O(fb), O(fc), O(fd), O(fe), O(ff)
};
@@ -2824,37 +2824,37 @@ TABLE_OPCODES2 =
// 00 01 02 03 04 05 06 07
// 08 09 0a 0b 0c 0d 0e 0f
{
- O(200),O(101),O(200),O(103),O(200),O(105),O(200),O(107), // 00
+ O(200),O(101),O(200),O(103),O(200),O(105),O(200),O(107), // 00
O(200),O(109),O(10a),O(200),O(200),O(10d),O(200),O(10f),
- O(200),O(111),O(112),O(113),O(200),O(115),O(200),O(117), // 10
+ O(200),O(111),O(112),O(113),O(200),O(115),O(200),O(117), // 10
O(200),O(119),O(11a),O(11b),O(200),O(11d),O(200),O(11f),
- O(200),O(121),O(200),O(123),O(200),O(125),O(200),O(127), // 20
+ O(200),O(121),O(200),O(123),O(200),O(125),O(200),O(127), // 20
O(200),O(129),O(12a),O(200),O(200),O(12d),O(200),O(12f),
- O(200),O(131),O(132),O(133),O(200),O(135),O(200),O(137), // 30
+ O(200),O(131),O(132),O(133),O(200),O(135),O(200),O(137), // 30
O(200),O(139),O(13a),O(13b),O(200),O(13d),O(200),O(13f),
- O(200),O(141),O(200),O(143),O(200),O(145),O(200),O(147), // 40
+ O(200),O(141),O(200),O(143),O(200),O(145),O(200),O(147), // 40
O(148),O(149),O(14a),O(200),O(200),O(14d),O(200),O(14f),
- O(200),O(151),O(152),O(153),O(200),O(155),O(200),O(157), // 50
+ O(200),O(151),O(152),O(153),O(200),O(155),O(200),O(157), // 50
O(200),O(159),O(200),O(15b),O(200),O(15d),O(200),O(15f),
- O(200),O(161),O(200),O(163),O(200),O(165),O(200),O(167), // 60
+ O(200),O(161),O(200),O(163),O(200),O(165),O(200),O(167), // 60
O(168),O(169),O(16a),O(200),O(200),O(16d),O(200),O(16f),
- O(200),O(171),O(172),O(173),O(200),O(175),O(200),O(177), // 70
+ O(200),O(171),O(172),O(173),O(200),O(175),O(200),O(177), // 70
O(200),O(179),O(200),O(17b),O(200),O(17d),O(200),O(17f),
- O(200),O(181),O(200),O(183),O(200),O(185),O(200),O(187), // 80
+ O(200),O(181),O(200),O(183),O(200),O(185),O(200),O(187), // 80
O(200),O(200),O(18a),O(200),O(200),O(18d),O(200),O(18f),
- O(200),O(191),O(192),O(193),O(200),O(195),O(200),O(197), // 90
+ O(200),O(191),O(192),O(193),O(200),O(195),O(200),O(197), // 90
O(198),O(199),O(200),O(200),O(200),O(19d),O(200),O(19f),
- O(200),O(1a1),O(200),O(1a3),O(200),O(1a5),O(200),O(1a7), // a0
+ O(200),O(1a1),O(200),O(1a3),O(200),O(1a5),O(200),O(1a7), // a0
O(1a8),O(1a9),O(1aa),O(200),O(200),O(1ad),O(200),O(1af),
- O(200),O(1b1),O(1b2),O(1b3),O(200),O(1b5),O(200),O(1b7), // b0
+ O(200),O(1b1),O(1b2),O(1b3),O(200),O(1b5),O(200),O(1b7), // b0
O(200),O(1b9),O(200),O(200),O(200),O(1bd),O(200),O(1bf),
- O(200),O(1c1),O(200),O(1c3),O(200),O(1c5),O(200),O(1c7), // c0
+ O(200),O(1c1),O(200),O(1c3),O(200),O(1c5),O(200),O(1c7), // c0
O(200),O(1c9),O(200),O(200),O(200),O(1cd),O(200),O(1cf),
- O(200),O(1d1),O(1d2),O(1d3),O(200),O(1d5),O(200),O(1d7), // d0
+ O(200),O(1d1),O(1d2),O(1d3),O(200),O(1d5),O(200),O(1d7), // d0
O(200),O(1d9),O(200),O(200),O(200),O(1dd),O(200),O(1df),
- O(200),O(1e1),O(200),O(1e3),O(200),O(1e5),O(200),O(1e7), // e0
+ O(200),O(1e1),O(200),O(1e3),O(200),O(1e5),O(200),O(1e7), // e0
O(200),O(1e9),O(200),O(200),O(200),O(1ed),O(200),O(1ef),
- O(200),O(1f1),O(1f2),O(1f3),O(200),O(1f5),O(200),O(1f7), // f0
+ O(200),O(1f1),O(1f2),O(1f3),O(200),O(1f5),O(200),O(1f7), // f0
O(200),O(1f9),O(200),O(200),O(200),O(1fd),O(200),O(1ff)
};
@@ -2863,37 +2863,37 @@ TABLE_OPCODES3 =
// 00 01 02 03 04 05 06 07
// 08 09 0a 0b 0c 0d 0e 0f
{
- O(200),O(201),O(200),O(203),O(200),O(205),O(200),O(207), // 00
+ O(200),O(201),O(200),O(203),O(200),O(205),O(200),O(207), // 00
O(200),O(209),O(200),O(200),O(200),O(20d),O(200),O(20f),
- O(200),O(211),O(212),O(213),O(200),O(215),O(200),O(217), // 10
+ O(200),O(211),O(212),O(213),O(200),O(215),O(200),O(217), // 10
O(200),O(219),O(200),O(200),O(200),O(21d),O(200),O(21f),
- O(200),O(221),O(200),O(223),O(200),O(225),O(200),O(227), // 20
+ O(200),O(221),O(200),O(223),O(200),O(225),O(200),O(227), // 20
O(228),O(229),O(200),O(200),O(200),O(22d),O(200),O(22f),
- O(200),O(231),O(232),O(233),O(200),O(235),O(200),O(237), // 30
+ O(200),O(231),O(232),O(233),O(200),O(235),O(200),O(237), // 30
O(200),O(239),O(200),O(200),O(200),O(23d),O(200),O(23f),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 40
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 40
O(200),O(249),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 50
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 50
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 60
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 60
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 70
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 70
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 80
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 80
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 90
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // 90
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // a0
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // a0
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // b0
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // b0
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(2c2),O(200),O(200),O(200),O(200),O(200), // c0
+ O(200),O(200),O(2c2),O(200),O(200),O(200),O(200),O(200), // c0
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // d0
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // d0
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // e0
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // e0
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200),
- O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // f0
+ O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200), // f0
O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200)
};
diff --git a/src/emu/cpu/m37710/m7700ds.c b/src/emu/cpu/m37710/m7700ds.c
index f531de100d4..eae9be9d293 100644
--- a/src/emu/cpu/m37710/m7700ds.c
+++ b/src/emu/cpu/m37710/m7700ds.c
@@ -40,34 +40,34 @@ enum
enum
{
- ADC , AND , ASL , BCC , BCS , BEQ , BIT , BMI , BNE , BPL , BRA ,
- BRK , BRL , BVC , BVS , CLC , CLD , CLI , CLV , CMP , COP , CPX ,
- CPY , DEA , DEC , DEX , DEY , EOR , INA , INC , INX , INY , JML ,
- JMP , JSL , JSR , LDA , LDX , LDY , LSR , MVN , MVP , NOP , ORA ,
- PEA , PEI , PER , PHA , PHT , PHD , PHK , PHP , PHX , PHY , PLA ,
- PLB , PLD , PLP , PLX , PLY , CLP , ROL , ROR , RTI , RTL , RTS ,
- SBC , SEC , SED , SEI , SEP , STA , STP , STX , STY , STZ , TAX ,
- TAY , TCS , TCD , TDC , TRB , TSB , TSC , TSX , TXA , TXS , TXY ,
- TYA , TYX , WAI , WDM , XBA , XCE , MPY , DIV , MPYS, DIVS, RLA ,
- EXTS, EXTZ , LDT , LDM , UNK , SEB , SEM , CLM , STB , LDB , ADCB ,
- SBCB, EORB , TBX , CMPB, INB , DEB , TXB , TYB , LSRB, ORB , CLB ,
- BBC, BBS, TBY, ANDB, PUL , PSH , PLAB, XAB , PHB
+ ADC , AND , ASL , BCC , BCS , BEQ , BIT , BMI , BNE , BPL , BRA ,
+ BRK , BRL , BVC , BVS , CLC , CLD , CLI , CLV , CMP , COP , CPX ,
+ CPY , DEA , DEC , DEX , DEY , EOR , INA , INC , INX , INY , JML ,
+ JMP , JSL , JSR , LDA , LDX , LDY , LSR , MVN , MVP , NOP , ORA ,
+ PEA , PEI , PER , PHA , PHT , PHD , PHK , PHP , PHX , PHY , PLA ,
+ PLB , PLD , PLP , PLX , PLY , CLP , ROL , ROR , RTI , RTL , RTS ,
+ SBC , SEC , SED , SEI , SEP , STA , STP , STX , STY , STZ , TAX ,
+ TAY , TCS , TCD , TDC , TRB , TSB , TSC , TSX , TXA , TXS , TXY ,
+ TYA , TYX , WAI , WDM , XBA , XCE , MPY , DIV , MPYS, DIVS, RLA ,
+ EXTS, EXTZ , LDT , LDM , UNK , SEB , SEM , CLM , STB , LDB , ADCB ,
+ SBCB, EORB , TBX , CMPB, INB , DEB , TXB , TYB , LSRB, ORB , CLB ,
+ BBC, BBS, TBY, ANDB, PUL , PSH , PLAB, XAB , PHB
};
static const char *const g_opnames[] =
{
- "ADC", "AND", "ASL", "BCC", "BCS", "BEQ", "BIT", "BMI", "BNE", "BPL", "BRA",
- "BRK", "BRL", "BVC", "BVS", "CLC", "CLD", "CLI", "CLV", "CMP", "COP", "CPX",
- "CPY", "DEA", "DEC", "DEX", "DEY", "EOR", "INA", "INC", "INX", "INY", "JML",
- "JMP", "JSL", "JSR", "LDA", "LDX", "LDY", "LSR", "MVN", "MVP", "NOP", "ORA",
- "PEA", "PEI", "PER", "PHA", "PHT", "PHD", "PHK", "PHP", "PHX", "PHY", "PLA",
- "PLT", "PLD", "PLP", "PLX", "PLY", "CLP", "ROL", "ROR", "RTI", "RTL", "RTS",
- "SBC", "SEC", "SED", "SEI", "SEP", "STA", "STP", "STX", "STY", "STZ", "TAX",
- "TAY", "TCS", "TCD", "TDC", "TRB", "TSB", "TSC", "TSX", "TXA", "TXS", "TXY",
- "TYA", "TYX", "WAI", "WDM", "XBA", "XCE", "MPY", "DIV", "MPYS", "DIVS", "RLA",
- "EXTS","EXTZ","LDT", "LDM", "UNK", "SEB", "SEM", "CLM", "STB", "LDB", "ADCB",
- "SBCB","EORB","TBX", "CMPB","INB", "DEB", "TXB", "TYB", "LSRB", "ORB", "CLB",
- "BBC", "BBS", "TBY", "ANDB","PUL", "PSH", "PLB", "XAB", "PHB",
+ "ADC", "AND", "ASL", "BCC", "BCS", "BEQ", "BIT", "BMI", "BNE", "BPL", "BRA",
+ "BRK", "BRL", "BVC", "BVS", "CLC", "CLD", "CLI", "CLV", "CMP", "COP", "CPX",
+ "CPY", "DEA", "DEC", "DEX", "DEY", "EOR", "INA", "INC", "INX", "INY", "JML",
+ "JMP", "JSL", "JSR", "LDA", "LDX", "LDY", "LSR", "MVN", "MVP", "NOP", "ORA",
+ "PEA", "PEI", "PER", "PHA", "PHT", "PHD", "PHK", "PHP", "PHX", "PHY", "PLA",
+ "PLT", "PLD", "PLP", "PLX", "PLY", "CLP", "ROL", "ROR", "RTI", "RTL", "RTS",
+ "SBC", "SEC", "SED", "SEI", "SEP", "STA", "STP", "STX", "STY", "STZ", "TAX",
+ "TAY", "TCS", "TCD", "TDC", "TRB", "TSB", "TSC", "TSX", "TXA", "TXS", "TXY",
+ "TYA", "TYX", "WAI", "WDM", "XBA", "XCE", "MPY", "DIV", "MPYS", "DIVS", "RLA",
+ "EXTS","EXTZ","LDT", "LDM", "UNK", "SEB", "SEM", "CLM", "STB", "LDB", "ADCB",
+ "SBCB","EORB","TBX", "CMPB","INB", "DEB", "TXB", "TYB", "LSRB", "ORB", "CLB",
+ "BBC", "BBS", "TBY", "ANDB","PUL", "PSH", "PLB", "XAB", "PHB",
};
static const opcode_struct g_opcodes[256] =
@@ -339,30 +339,30 @@ INLINE unsigned int read_24(const UINT8 *oprom, unsigned int offset)
INLINE char* int_8_str(unsigned int val)
{
- static char str[20];
+ static char str[20];
- val &= 0xff;
+ val &= 0xff;
- if(val & 0x80)
- sprintf(str, "-$%x", (0-val) & 0x7f);
- else
- sprintf(str, "$%x", val & 0x7f);
+ if(val & 0x80)
+ sprintf(str, "-$%x", (0-val) & 0x7f);
+ else
+ sprintf(str, "$%x", val & 0x7f);
- return str;
+ return str;
}
INLINE char* int_16_str(unsigned int val)
{
- static char str[20];
+ static char str[20];
- val &= 0xffff;
+ val &= 0xffff;
- if(val & 0x8000)
- sprintf(str, "-$%x", (0-val) & 0x7fff);
- else
- sprintf(str, "$%x", val & 0x7fff);
+ if(val & 0x8000)
+ sprintf(str, "-$%x", (0-val) & 0x7fff);
+ else
+ sprintf(str, "$%x", val & 0x7fff);
- return str;
+ return str;
}
@@ -613,4 +613,3 @@ CPU_DISASSEMBLE( m37710_generic )
{
return m7700_disassemble(buffer, (pc&0xffff), pc>>16, oprom, 0, 0);
}
-
diff --git a/src/emu/cpu/m6502/ddeco16.lst b/src/emu/cpu/m6502/ddeco16.lst
index 3a41088c777..b57f2614cf0 100644
--- a/src/emu/cpu/m6502/ddeco16.lst
+++ b/src/emu/cpu/m6502/ddeco16.lst
@@ -1,18 +1,18 @@
# deco16 - deco variant
-brk_16_imp ora_idx ill_non ill_non ill_non ora_zpg asl_zpg ill_non php_imp ora_imm asl_acc u0B_zpg ill_non ora_aba asl_aba ill_non
-bpl_rel ora_idy ill_non u13_zpg ill_non ora_zpx asl_zpx ill_non clc_imp ora_aby ill_non ill_non ill_non ora_abx asl_abx ill_non
-jsr_adr and_idx ill_non u23_zpg bit_zpg and_zpg rol_zpg ill_non plp_imp and_imm rol_acc ill_non bit_aba and_aba rol_aba ill_non
-bmi_rel and_idy ill_non ill_non ill_non and_zpx rol_zpx ill_non sec_imp and_aby ill_non ill_non ill_non and_abx rol_abx u3F_zpg
-rti_imp eor_idx ill_non ill_non ill_non eor_zpg lsr_zpg ill_non pha_imp eor_imm lsr_acc u4B_zpg jmp_adr eor_aba lsr_aba ill_non
-bvc_rel eor_idy ill_non ill_non ill_non eor_zpx lsr_zpx ill_non cli_imp eor_aby ill_non ill_non ill_non eor_abx lsr_abx ill_non
-rts_imp adc_idx ill_non ill_non ill_non adc_zpg ror_zpg vbl_zpg pla_imp adc_imm ror_acc ill_non jmp_ind adc_aba ror_aba ill_non
-bvs_rel adc_idy ill_non ill_non ill_non adc_zpx ror_zpx ill_non sei_imp adc_aby ill_non ill_non ill_non adc_abx ror_abx ill_non
-ill_non sta_idx ill_non ill_non sty_zpg sta_zpg stx_zpg u87_zpg dey_imp ill_non txa_imp ill_non sty_aba sta_aba stx_aba u8F_zpg
-bcc_rel sta_idy ill_non ill_non sty_zpx sta_zpx stx_zpy ill_non tya_imp sta_aby txs_imp ill_non ill_non sta_abx ill_non ill_non
-ldy_imm lda_idx ldx_imm uA3_zpg ldy_zpg lda_zpg ldx_zpg ill_non tay_imp lda_imm tax_imp ill_non ldy_aba lda_aba ldx_aba ill_non
-bcs_rel lda_idy ill_non ill_non ldy_zpx lda_zpx ldx_zpy ill_non clv_imp lda_aby tsx_imp uBB_zpg ldy_abx lda_abx ldx_aby ill_non
-cpy_imm cmp_idx ill_non ill_non cpy_zpg cmp_zpg dec_zpg ill_non iny_imp cmp_imm dex_imp ill_non cpy_aba cmp_aba dec_aba ill_non
-bne_rel cmp_idy ill_non ill_non ill_non cmp_zpx dec_zpx ill_non cld_imp cmp_aby ill_non ill_non ill_non cmp_abx dec_abx ill_non
-cpx_imm sbc_idx ill_non ill_non cpx_zpg sbc_zpg inc_zpg ill_non inx_imp sbc_imm nop_imp ill_non cpx_aba sbc_aba inc_aba ill_non
-beq_rel sbc_idy ill_non ill_non ill_non sbc_zpx inc_zpx ill_non sed_imp sbc_aby ill_non ill_non ill_non sbc_abx inc_abx ill_non
+brk_16_imp ora_idx ill_non ill_non ill_non ora_zpg asl_zpg ill_non php_imp ora_imm asl_acc u0B_zpg ill_non ora_aba asl_aba ill_non
+bpl_rel ora_idy ill_non u13_zpg ill_non ora_zpx asl_zpx ill_non clc_imp ora_aby ill_non ill_non ill_non ora_abx asl_abx ill_non
+jsr_adr and_idx ill_non u23_zpg bit_zpg and_zpg rol_zpg ill_non plp_imp and_imm rol_acc ill_non bit_aba and_aba rol_aba ill_non
+bmi_rel and_idy ill_non ill_non ill_non and_zpx rol_zpx ill_non sec_imp and_aby ill_non ill_non ill_non and_abx rol_abx u3F_zpg
+rti_imp eor_idx ill_non ill_non ill_non eor_zpg lsr_zpg ill_non pha_imp eor_imm lsr_acc u4B_zpg jmp_adr eor_aba lsr_aba ill_non
+bvc_rel eor_idy ill_non ill_non ill_non eor_zpx lsr_zpx ill_non cli_imp eor_aby ill_non ill_non ill_non eor_abx lsr_abx ill_non
+rts_imp adc_idx ill_non ill_non ill_non adc_zpg ror_zpg vbl_zpg pla_imp adc_imm ror_acc ill_non jmp_ind adc_aba ror_aba ill_non
+bvs_rel adc_idy ill_non ill_non ill_non adc_zpx ror_zpx ill_non sei_imp adc_aby ill_non ill_non ill_non adc_abx ror_abx ill_non
+ill_non sta_idx ill_non ill_non sty_zpg sta_zpg stx_zpg u87_zpg dey_imp ill_non txa_imp ill_non sty_aba sta_aba stx_aba u8F_zpg
+bcc_rel sta_idy ill_non ill_non sty_zpx sta_zpx stx_zpy ill_non tya_imp sta_aby txs_imp ill_non ill_non sta_abx ill_non ill_non
+ldy_imm lda_idx ldx_imm uA3_zpg ldy_zpg lda_zpg ldx_zpg ill_non tay_imp lda_imm tax_imp ill_non ldy_aba lda_aba ldx_aba ill_non
+bcs_rel lda_idy ill_non ill_non ldy_zpx lda_zpx ldx_zpy ill_non clv_imp lda_aby tsx_imp uBB_zpg ldy_abx lda_abx ldx_aby ill_non
+cpy_imm cmp_idx ill_non ill_non cpy_zpg cmp_zpg dec_zpg ill_non iny_imp cmp_imm dex_imp ill_non cpy_aba cmp_aba dec_aba ill_non
+bne_rel cmp_idy ill_non ill_non ill_non cmp_zpx dec_zpx ill_non cld_imp cmp_aby ill_non ill_non ill_non cmp_abx dec_abx ill_non
+cpx_imm sbc_idx ill_non ill_non cpx_zpg sbc_zpg inc_zpg ill_non inx_imp sbc_imm nop_imp ill_non cpx_aba sbc_aba inc_aba ill_non
+beq_rel sbc_idy ill_non ill_non ill_non sbc_zpx inc_zpx ill_non sed_imp sbc_aby ill_non ill_non ill_non sbc_abx inc_abx ill_non
reset_16
diff --git a/src/emu/cpu/m6502/dm4510.lst b/src/emu/cpu/m6502/dm4510.lst
index 63de577c42a..6de7627ebc7 100644
--- a/src/emu/cpu/m6502/dm4510.lst
+++ b/src/emu/cpu/m6502/dm4510.lst
@@ -1,18 +1,18 @@
# m4510 - 65ce02 with a mmu
-brk_ce_imp ora_ce_idx cle_imp see_imp tsb_ce_zpg ora_ce_zpg asl_ce_zpg rmb_ce_bzp php_ce_imp ora_imm asl_ce_acc tsy_imp tsb_ce_aba ora_aba asl_ce_aba bbr_ce_zpb
-bpl_ce_rel ora_ce_idy ora_idz bpl_rw2 trb_ce_zpg ora_ce_zpx asl_ce_zpx rmb_ce_bzp clc_ce_imp ora_ce_aby inc_ce_acc inz_imp trb_ce_aba ora_ce_abx asl_ce_abx bbr_ce_zpb
-jsr_ce_adr and_ce_idx jsr_ind jsr_iax bit_ce_zpg and_ce_zpg rol_ce_zpg rmb_ce_bzp plp_ce_imp and_imm rol_ce_acc tys_imp bit_aba and_aba rol_ce_aba bbr_ce_zpb
-bmi_ce_rel and_ce_idy and_idz bmi_rw2 bit_ce_zpx and_ce_zpx rol_ce_zpx rmb_ce_bzp sec_ce_imp and_ce_aby dec_ce_acc dez_imp bit_ce_abx and_ce_abx rol_ce_abx bbr_ce_zpb
-rti_ce_imp eor_ce_idx neg_acc asr_acc asr_zpg eor_ce_zpg lsr_ce_zpg rmb_ce_bzp pha_ce_imp eor_imm lsr_ce_acc taz_imp jmp_adr eor_aba lsr_ce_aba bbr_ce_zpb
-bvc_ce_rel eor_ce_idy eor_idz bvc_rw2 asr_zpx eor_ce_zpx lsr_ce_zpx rmb_ce_bzp cli_ce_imp eor_ce_aby phy_ce_imp tab_imp map_imp eor_ce_abx lsr_ce_abx bbr_ce_zpb
-rts_ce_imp adc_ce_idx rtn_imm bsr_rw2 stz_ce_zpg adc_ce_zpg ror_ce_zpg rmb_ce_bzp pla_ce_imp adc_ce_imm ror_ce_acc tza_imp jmp_ce_ind adc_ce_aba ror_ce_aba bbr_ce_zpb
-bvs_ce_rel adc_ce_idy adc_idz bvs_rw2 stz_ce_zpx adc_ce_zpx ror_ce_zpx rmb_ce_bzp sei_ce_imp adc_ce_aby ply_ce_imp tba_imp jmp_ce_iax adc_ce_abx ror_ce_abx bbr_ce_zpb
-bra_ce_rel sta_ce_idx sta_isy bra_rw2 sty_ce_zpg sta_ce_zpg stx_ce_zpg smb_ce_bzp dey_ce_imp bit_ce_imm txa_ce_imp sty_abx sty_aba sta_aba stx_aba bbs_ce_zpb
-bcc_ce_rel sta_ce_idy sta_idz bcc_rw2 sty_ce_zpx sta_ce_zpx stx_ce_zpy smb_ce_bzp tya_ce_imp sta_ce_aby txs_ce_imp stx_aby stz_ce_aba sta_ce_abx stz_ce_abx bbs_ce_zpb
-ldy_imm lda_ce_idx ldx_imm ldz_imm ldy_ce_zpg lda_ce_zpg ldx_ce_zpg smb_ce_bzp tay_ce_imp lda_imm tax_ce_imp ldz_aba ldy_aba lda_aba ldx_aba bbs_ce_zpb
-bcs_ce_rel lda_ce_idy lda_idz bcs_rw2 ldy_ce_zpx lda_ce_zpx ldx_ce_zpy smb_ce_bzp clv_ce_imp lda_ce_aby tsx_ce_imp ldz_abx ldy_ce_abx lda_ce_abx ldx_ce_aby bbs_ce_zpb
-cpy_imm cmp_ce_idx cpz_imm dew_zpg cpy_ce_zpg cmp_ce_zpg dec_ce_zpg smb_ce_bzp iny_ce_imp cmp_imm dex_ce_imp asw_aba cpy_aba cmp_aba dec_ce_aba bbs_ce_zpb
-bne_ce_rel cmp_ce_idy cmp_idz bne_rw2 cpz_zpg cmp_ce_zpx dec_ce_zpx smb_ce_bzp cld_ce_imp cmp_ce_aby phx_ce_imp phz_imp cpz_aba cmp_ce_abx dec_ce_abx bbs_ce_zpb
-cpx_imm sbc_ce_idx lda_isy inw_zpg cpx_ce_zpg sbc_ce_zpg inc_ce_zpg smb_ce_bzp inx_ce_imp sbc_ce_imm eom_imp row_aba cpx_aba sbc_ce_aba inc_ce_aba bbs_ce_zpb
-beq_ce_rel sbc_ce_idy sbc_idz beq_rw2 phw_iw2 sbc_ce_zpx inc_ce_zpx smb_ce_bzp sed_ce_imp sbc_ce_aby plx_ce_imp plz_imp phw_aba sbc_ce_abx inc_ce_abx bbs_ce_zpb
+brk_ce_imp ora_ce_idx cle_imp see_imp tsb_ce_zpg ora_ce_zpg asl_ce_zpg rmb_ce_bzp php_ce_imp ora_imm asl_ce_acc tsy_imp tsb_ce_aba ora_aba asl_ce_aba bbr_ce_zpb
+bpl_ce_rel ora_ce_idy ora_idz bpl_rw2 trb_ce_zpg ora_ce_zpx asl_ce_zpx rmb_ce_bzp clc_ce_imp ora_ce_aby inc_ce_acc inz_imp trb_ce_aba ora_ce_abx asl_ce_abx bbr_ce_zpb
+jsr_ce_adr and_ce_idx jsr_ind jsr_iax bit_ce_zpg and_ce_zpg rol_ce_zpg rmb_ce_bzp plp_ce_imp and_imm rol_ce_acc tys_imp bit_aba and_aba rol_ce_aba bbr_ce_zpb
+bmi_ce_rel and_ce_idy and_idz bmi_rw2 bit_ce_zpx and_ce_zpx rol_ce_zpx rmb_ce_bzp sec_ce_imp and_ce_aby dec_ce_acc dez_imp bit_ce_abx and_ce_abx rol_ce_abx bbr_ce_zpb
+rti_ce_imp eor_ce_idx neg_acc asr_acc asr_zpg eor_ce_zpg lsr_ce_zpg rmb_ce_bzp pha_ce_imp eor_imm lsr_ce_acc taz_imp jmp_adr eor_aba lsr_ce_aba bbr_ce_zpb
+bvc_ce_rel eor_ce_idy eor_idz bvc_rw2 asr_zpx eor_ce_zpx lsr_ce_zpx rmb_ce_bzp cli_ce_imp eor_ce_aby phy_ce_imp tab_imp map_imp eor_ce_abx lsr_ce_abx bbr_ce_zpb
+rts_ce_imp adc_ce_idx rtn_imm bsr_rw2 stz_ce_zpg adc_ce_zpg ror_ce_zpg rmb_ce_bzp pla_ce_imp adc_ce_imm ror_ce_acc tza_imp jmp_ce_ind adc_ce_aba ror_ce_aba bbr_ce_zpb
+bvs_ce_rel adc_ce_idy adc_idz bvs_rw2 stz_ce_zpx adc_ce_zpx ror_ce_zpx rmb_ce_bzp sei_ce_imp adc_ce_aby ply_ce_imp tba_imp jmp_ce_iax adc_ce_abx ror_ce_abx bbr_ce_zpb
+bra_ce_rel sta_ce_idx sta_isy bra_rw2 sty_ce_zpg sta_ce_zpg stx_ce_zpg smb_ce_bzp dey_ce_imp bit_ce_imm txa_ce_imp sty_abx sty_aba sta_aba stx_aba bbs_ce_zpb
+bcc_ce_rel sta_ce_idy sta_idz bcc_rw2 sty_ce_zpx sta_ce_zpx stx_ce_zpy smb_ce_bzp tya_ce_imp sta_ce_aby txs_ce_imp stx_aby stz_ce_aba sta_ce_abx stz_ce_abx bbs_ce_zpb
+ldy_imm lda_ce_idx ldx_imm ldz_imm ldy_ce_zpg lda_ce_zpg ldx_ce_zpg smb_ce_bzp tay_ce_imp lda_imm tax_ce_imp ldz_aba ldy_aba lda_aba ldx_aba bbs_ce_zpb
+bcs_ce_rel lda_ce_idy lda_idz bcs_rw2 ldy_ce_zpx lda_ce_zpx ldx_ce_zpy smb_ce_bzp clv_ce_imp lda_ce_aby tsx_ce_imp ldz_abx ldy_ce_abx lda_ce_abx ldx_ce_aby bbs_ce_zpb
+cpy_imm cmp_ce_idx cpz_imm dew_zpg cpy_ce_zpg cmp_ce_zpg dec_ce_zpg smb_ce_bzp iny_ce_imp cmp_imm dex_ce_imp asw_aba cpy_aba cmp_aba dec_ce_aba bbs_ce_zpb
+bne_ce_rel cmp_ce_idy cmp_idz bne_rw2 cpz_zpg cmp_ce_zpx dec_ce_zpx smb_ce_bzp cld_ce_imp cmp_ce_aby phx_ce_imp phz_imp cpz_aba cmp_ce_abx dec_ce_abx bbs_ce_zpb
+cpx_imm sbc_ce_idx lda_isy inw_zpg cpx_ce_zpg sbc_ce_zpg inc_ce_zpg smb_ce_bzp inx_ce_imp sbc_ce_imm eom_imp row_aba cpx_aba sbc_ce_aba inc_ce_aba bbs_ce_zpb
+beq_ce_rel sbc_ce_idy sbc_idz beq_rw2 phw_iw2 sbc_ce_zpx inc_ce_zpx smb_ce_bzp sed_ce_imp sbc_ce_aby plx_ce_imp plz_imp phw_aba sbc_ce_abx inc_ce_abx bbs_ce_zpb
reset
diff --git a/src/emu/cpu/m6502/dm6502.lst b/src/emu/cpu/m6502/dm6502.lst
index 5dfe9cb0333..591cf9c599e 100644
--- a/src/emu/cpu/m6502/dm6502.lst
+++ b/src/emu/cpu/m6502/dm6502.lst
@@ -1,18 +1,18 @@
# m6502_family_device - 6502, 6504
-brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
-bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
-jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
-bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
-rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
-bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
-rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_imm jmp_ind adc_aba ror_aba rra_aba
-bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
-nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
-bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
-ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
-bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
-cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
-bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
-cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
-beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
+brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
+bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
+jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
+bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
+rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
+bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
+rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_imm jmp_ind adc_aba ror_aba rra_aba
+bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
+nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
+bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
+ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
+bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
+cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
+bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
+cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
+beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
reset
diff --git a/src/emu/cpu/m6502/dm6509.lst b/src/emu/cpu/m6502/dm6509.lst
index a0be552a85b..b46c25fda14 100644
--- a/src/emu/cpu/m6502/dm6509.lst
+++ b/src/emu/cpu/m6502/dm6509.lst
@@ -1,18 +1,18 @@
# m6509 - special banking on two specific instructions, and banking in general
-brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
-bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
-jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
-bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
-rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
-bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
-rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_imm jmp_ind adc_aba ror_aba rra_aba
-bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
-nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
-bcc_rel sta_9_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
-ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
-bcs_rel lda_9_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
-cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
-bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
-cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
-beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
+brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
+bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
+jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
+bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
+rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
+bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
+rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_imm jmp_ind adc_aba ror_aba rra_aba
+bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
+nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
+bcc_rel sta_9_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
+ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
+bcs_rel lda_9_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
+cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
+bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
+cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
+beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
reset
diff --git a/src/emu/cpu/m6502/dm6510.lst b/src/emu/cpu/m6502/dm6510.lst
index f0cb4d065be..72ba28bce69 100644
--- a/src/emu/cpu/m6502/dm6510.lst
+++ b/src/emu/cpu/m6502/dm6510.lst
@@ -1,18 +1,18 @@
# m6510_family - identical to 6502, except for some undocumented instructions that have to be handled specifically
-brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_10_imm nop_aba ora_aba asl_aba slo_aba
-bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
-jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_10_imm bit_aba and_aba rol_aba rla_aba
-bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
-rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_10_imm jmp_adr eor_aba lsr_aba sre_aba
-bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
-rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_10_imm jmp_ind adc_aba ror_aba rra_aba
-bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
-nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_10_imm sty_aba sta_aba stx_aba sax_aba
-bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
-ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_10_imm ldy_aba lda_aba ldx_aba lax_aba
-bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_10_aby ldy_abx lda_abx ldx_aby lax_aby
-cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
-bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
-cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
-beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
+brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_10_imm nop_aba ora_aba asl_aba slo_aba
+bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
+jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_10_imm bit_aba and_aba rol_aba rla_aba
+bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
+rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_10_imm jmp_adr eor_aba lsr_aba sre_aba
+bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
+rts_imp adc_idx kil_non rra_idx nop_zpg adc_zpg ror_zpg rra_zpg pla_imp adc_imm ror_acc arr_10_imm jmp_ind adc_aba ror_aba rra_aba
+bvs_rel adc_idy kil_non rra_idy nop_zpx adc_zpx ror_zpx rra_zpx sei_imp adc_aby nop_imp rra_aby nop_abx adc_abx ror_abx rra_abx
+nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_10_imm sty_aba sta_aba stx_aba sax_aba
+bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
+ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_10_imm ldy_aba lda_aba ldx_aba lax_aba
+bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_10_aby ldy_abx lda_abx ldx_aby lax_aby
+cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
+bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
+cpx_imm sbc_idx nop_imm isb_idx cpx_zpg sbc_zpg inc_zpg isb_zpg inx_imp sbc_imm nop_imp sbc_imm cpx_aba sbc_aba inc_aba isb_aba
+beq_rel sbc_idy kil_non isb_idy nop_zpx sbc_zpx inc_zpx isb_zpx sed_imp sbc_aby nop_imp isb_aby nop_abx sbc_abx inc_abx isb_abx
reset
diff --git a/src/emu/cpu/m6502/dm65c02.lst b/src/emu/cpu/m6502/dm65c02.lst
index 85e6784056d..4b0cd1f2db4 100644
--- a/src/emu/cpu/m6502/dm65c02.lst
+++ b/src/emu/cpu/m6502/dm65c02.lst
@@ -1,18 +1,18 @@
# m65c02
-brk_c_imp ora_idx nop_imm nop_c_imp tsb_zpg ora_zpg asl_zpg nop_c_imp php_imp ora_imm asl_acc nop_c_imp tsb_aba ora_aba asl_aba nop_c_imp
-bpl_rel ora_idy ora_zpi nop_c_imp trb_zpg ora_zpx asl_zpx nop_c_imp clc_imp ora_aby inc_acc nop_c_imp trb_aba ora_abx asl_c_abx nop_c_imp
-jsr_adr and_idx nop_imm nop_c_imp bit_zpg and_zpg rol_zpg nop_c_imp plp_imp and_imm rol_acc nop_c_imp bit_aba and_aba rol_aba nop_c_imp
-bmi_rel and_idy and_zpi nop_c_imp bit_zpx and_zpx rol_zpx nop_c_imp sec_imp and_aby dec_acc nop_c_imp bit_abx and_abx rol_c_abx nop_c_imp
-rti_imp eor_idx nop_imm nop_c_imp nop_zpg eor_zpg lsr_zpg nop_c_imp pha_imp eor_imm lsr_acc nop_c_imp jmp_adr eor_aba lsr_aba nop_c_imp
-bvc_rel eor_idy eor_zpi nop_c_imp nop_zpx eor_zpx lsr_zpx nop_c_imp cli_imp eor_aby phy_imp nop_c_imp nop_c_aba eor_abx lsr_c_abx nop_c_imp
-rts_imp adc_c_idx nop_imm nop_c_imp stz_zpg adc_c_zpg ror_zpg nop_c_imp pla_imp adc_c_imm ror_acc nop_c_imp jmp_c_ind adc_c_aba ror_aba nop_c_imp
-bvs_rel adc_c_idy adc_c_zpi nop_c_imp stz_zpx adc_c_zpx ror_zpx nop_c_imp sei_imp adc_c_aby ply_imp nop_c_imp jmp_iax adc_c_abx ror_c_abx nop_c_imp
-bra_rel sta_idx nop_imm nop_c_imp sty_zpg sta_zpg stx_zpg nop_c_imp dey_imp bit_imm txa_imp nop_c_imp sty_aba sta_aba stx_aba nop_c_imp
-bcc_rel sta_idy sta_zpi nop_c_imp sty_zpx sta_zpx stx_zpy nop_c_imp tya_imp sta_aby txs_imp nop_c_imp stz_aba sta_abx stz_abx nop_c_imp
-ldy_imm lda_idx ldx_imm nop_c_imp ldy_zpg lda_zpg ldx_zpg nop_c_imp tay_imp lda_imm tax_imp nop_c_imp ldy_aba lda_aba ldx_aba nop_c_imp
-bcs_rel lda_idy lda_zpi nop_c_imp ldy_zpx lda_zpx ldx_zpy nop_c_imp clv_imp lda_aby tsx_imp nop_c_imp ldy_abx lda_abx ldx_aby nop_c_imp
-cpy_imm cmp_idx nop_imm nop_c_imp cpy_zpg cmp_zpg dec_zpg nop_c_imp iny_imp cmp_imm dex_imp nop_c_imp cpy_aba cmp_aba dec_aba nop_c_imp
-bne_rel cmp_idy cmp_zpi nop_c_imp nop_zpx cmp_zpx dec_zpx nop_c_imp cld_imp cmp_aby phx_imp nop_c_imp nop_c_abx cmp_abx dec_abx nop_c_imp
-cpx_imm sbc_c_idx nop_imm nop_c_imp cpx_zpg sbc_c_zpg inc_zpg nop_c_imp inx_imp sbc_c_imm nop_imp nop_c_imp cpx_aba sbc_c_aba inc_aba nop_c_imp
-beq_rel sbc_c_idy sbc_c_zpi nop_c_imp nop_zpx sbc_c_zpx inc_zpx nop_c_imp sed_imp sbc_c_aby plx_imp nop_c_imp nop_c_abx sbc_c_abx inc_abx nop_c_imp
+brk_c_imp ora_idx nop_imm nop_c_imp tsb_zpg ora_zpg asl_zpg nop_c_imp php_imp ora_imm asl_acc nop_c_imp tsb_aba ora_aba asl_aba nop_c_imp
+bpl_rel ora_idy ora_zpi nop_c_imp trb_zpg ora_zpx asl_zpx nop_c_imp clc_imp ora_aby inc_acc nop_c_imp trb_aba ora_abx asl_c_abx nop_c_imp
+jsr_adr and_idx nop_imm nop_c_imp bit_zpg and_zpg rol_zpg nop_c_imp plp_imp and_imm rol_acc nop_c_imp bit_aba and_aba rol_aba nop_c_imp
+bmi_rel and_idy and_zpi nop_c_imp bit_zpx and_zpx rol_zpx nop_c_imp sec_imp and_aby dec_acc nop_c_imp bit_abx and_abx rol_c_abx nop_c_imp
+rti_imp eor_idx nop_imm nop_c_imp nop_zpg eor_zpg lsr_zpg nop_c_imp pha_imp eor_imm lsr_acc nop_c_imp jmp_adr eor_aba lsr_aba nop_c_imp
+bvc_rel eor_idy eor_zpi nop_c_imp nop_zpx eor_zpx lsr_zpx nop_c_imp cli_imp eor_aby phy_imp nop_c_imp nop_c_aba eor_abx lsr_c_abx nop_c_imp
+rts_imp adc_c_idx nop_imm nop_c_imp stz_zpg adc_c_zpg ror_zpg nop_c_imp pla_imp adc_c_imm ror_acc nop_c_imp jmp_c_ind adc_c_aba ror_aba nop_c_imp
+bvs_rel adc_c_idy adc_c_zpi nop_c_imp stz_zpx adc_c_zpx ror_zpx nop_c_imp sei_imp adc_c_aby ply_imp nop_c_imp jmp_iax adc_c_abx ror_c_abx nop_c_imp
+bra_rel sta_idx nop_imm nop_c_imp sty_zpg sta_zpg stx_zpg nop_c_imp dey_imp bit_imm txa_imp nop_c_imp sty_aba sta_aba stx_aba nop_c_imp
+bcc_rel sta_idy sta_zpi nop_c_imp sty_zpx sta_zpx stx_zpy nop_c_imp tya_imp sta_aby txs_imp nop_c_imp stz_aba sta_abx stz_abx nop_c_imp
+ldy_imm lda_idx ldx_imm nop_c_imp ldy_zpg lda_zpg ldx_zpg nop_c_imp tay_imp lda_imm tax_imp nop_c_imp ldy_aba lda_aba ldx_aba nop_c_imp
+bcs_rel lda_idy lda_zpi nop_c_imp ldy_zpx lda_zpx ldx_zpy nop_c_imp clv_imp lda_aby tsx_imp nop_c_imp ldy_abx lda_abx ldx_aby nop_c_imp
+cpy_imm cmp_idx nop_imm nop_c_imp cpy_zpg cmp_zpg dec_zpg nop_c_imp iny_imp cmp_imm dex_imp nop_c_imp cpy_aba cmp_aba dec_aba nop_c_imp
+bne_rel cmp_idy cmp_zpi nop_c_imp nop_zpx cmp_zpx dec_zpx nop_c_imp cld_imp cmp_aby phx_imp nop_c_imp nop_c_abx cmp_abx dec_abx nop_c_imp
+cpx_imm sbc_c_idx nop_imm nop_c_imp cpx_zpg sbc_c_zpg inc_zpg nop_c_imp inx_imp sbc_c_imm nop_imp nop_c_imp cpx_aba sbc_c_aba inc_aba nop_c_imp
+beq_rel sbc_c_idy sbc_c_zpi nop_c_imp nop_zpx sbc_c_zpx inc_zpx nop_c_imp sed_imp sbc_c_aby plx_imp nop_c_imp nop_c_abx sbc_c_abx inc_abx nop_c_imp
reset
diff --git a/src/emu/cpu/m6502/dm65ce02.lst b/src/emu/cpu/m6502/dm65ce02.lst
index bbf12afe435..b2fafe67203 100644
--- a/src/emu/cpu/m6502/dm65ce02.lst
+++ b/src/emu/cpu/m6502/dm65ce02.lst
@@ -1,18 +1,18 @@
# m65ce02 - Adds the B and Z registers to the r65c02, a bunch of instructions, and changes most of the timings
-brk_ce_imp ora_ce_idx cle_imp see_imp tsb_ce_zpg ora_ce_zpg asl_ce_zpg rmb_ce_bzp php_ce_imp ora_imm asl_ce_acc tsy_imp tsb_ce_aba ora_aba asl_ce_aba bbr_ce_zpb
-bpl_ce_rel ora_ce_idy ora_idz bpl_rw2 trb_ce_zpg ora_ce_zpx asl_ce_zpx rmb_ce_bzp clc_ce_imp ora_ce_aby inc_ce_acc inz_imp trb_ce_aba ora_ce_abx asl_ce_abx bbr_ce_zpb
-jsr_ce_adr and_ce_idx jsr_ind jsr_iax bit_ce_zpg and_ce_zpg rol_ce_zpg rmb_ce_bzp plp_ce_imp and_imm rol_ce_acc tys_imp bit_aba and_aba rol_ce_aba bbr_ce_zpb
-bmi_ce_rel and_ce_idy and_idz bmi_rw2 bit_ce_zpx and_ce_zpx rol_ce_zpx rmb_ce_bzp sec_ce_imp and_ce_aby dec_ce_acc dez_imp bit_ce_abx and_ce_abx rol_ce_abx bbr_ce_zpb
-rti_ce_imp eor_ce_idx neg_acc asr_acc asr_zpg eor_ce_zpg lsr_ce_zpg rmb_ce_bzp pha_ce_imp eor_imm lsr_ce_acc taz_imp jmp_adr eor_aba lsr_ce_aba bbr_ce_zpb
-bvc_ce_rel eor_ce_idy eor_idz bvc_rw2 asr_zpx eor_ce_zpx lsr_ce_zpx rmb_ce_bzp cli_ce_imp eor_ce_aby phy_ce_imp tab_imp aug_iw3 eor_ce_abx lsr_ce_abx bbr_ce_zpb
-rts_ce_imp adc_ce_idx rtn_imm bsr_rw2 stz_ce_zpg adc_ce_zpg ror_ce_zpg rmb_ce_bzp pla_ce_imp adc_ce_imm ror_ce_acc tza_imp jmp_ce_ind adc_ce_aba ror_ce_aba bbr_ce_zpb
-bvs_ce_rel adc_ce_idy adc_idz bvs_rw2 stz_ce_zpx adc_ce_zpx ror_ce_zpx rmb_ce_bzp sei_ce_imp adc_ce_aby ply_ce_imp tba_imp jmp_ce_iax adc_ce_abx ror_ce_abx bbr_ce_zpb
-bra_ce_rel sta_ce_idx sta_isy bra_rw2 sty_ce_zpg sta_ce_zpg stx_ce_zpg smb_ce_bzp dey_ce_imp bit_ce_imm txa_ce_imp sty_abx sty_aba sta_aba stx_aba bbs_ce_zpb
-bcc_ce_rel sta_ce_idy sta_idz bcc_rw2 sty_ce_zpx sta_ce_zpx stx_ce_zpy smb_ce_bzp tya_ce_imp sta_ce_aby txs_ce_imp stx_aby stz_ce_aba sta_ce_abx stz_ce_abx bbs_ce_zpb
-ldy_imm lda_ce_idx ldx_imm ldz_imm ldy_ce_zpg lda_ce_zpg ldx_ce_zpg smb_ce_bzp tay_ce_imp lda_imm tax_ce_imp ldz_aba ldy_aba lda_aba ldx_aba bbs_ce_zpb
-bcs_ce_rel lda_ce_idy lda_idz bcs_rw2 ldy_ce_zpx lda_ce_zpx ldx_ce_zpy smb_ce_bzp clv_ce_imp lda_ce_aby tsx_ce_imp ldz_abx ldy_ce_abx lda_ce_abx ldx_ce_aby bbs_ce_zpb
-cpy_imm cmp_ce_idx cpz_imm dew_zpg cpy_ce_zpg cmp_ce_zpg dec_ce_zpg smb_ce_bzp iny_ce_imp cmp_imm dex_ce_imp asw_aba cpy_aba cmp_aba dec_ce_aba bbs_ce_zpb
-bne_ce_rel cmp_ce_idy cmp_idz bne_rw2 cpz_zpg cmp_ce_zpx dec_ce_zpx smb_ce_bzp cld_ce_imp cmp_ce_aby phx_ce_imp phz_imp cpz_aba cmp_ce_abx dec_ce_abx bbs_ce_zpb
-cpx_imm sbc_ce_idx lda_isy inw_zpg cpx_ce_zpg sbc_ce_zpg inc_ce_zpg smb_ce_bzp inx_ce_imp sbc_ce_imm nop_c_imp row_aba cpx_aba sbc_ce_aba inc_ce_aba bbs_ce_zpb
-beq_ce_rel sbc_ce_idy sbc_idz beq_rw2 phw_iw2 sbc_ce_zpx inc_ce_zpx smb_ce_bzp sed_ce_imp sbc_ce_aby plx_ce_imp plz_imp phw_aba sbc_ce_abx inc_ce_abx bbs_ce_zpb
+brk_ce_imp ora_ce_idx cle_imp see_imp tsb_ce_zpg ora_ce_zpg asl_ce_zpg rmb_ce_bzp php_ce_imp ora_imm asl_ce_acc tsy_imp tsb_ce_aba ora_aba asl_ce_aba bbr_ce_zpb
+bpl_ce_rel ora_ce_idy ora_idz bpl_rw2 trb_ce_zpg ora_ce_zpx asl_ce_zpx rmb_ce_bzp clc_ce_imp ora_ce_aby inc_ce_acc inz_imp trb_ce_aba ora_ce_abx asl_ce_abx bbr_ce_zpb
+jsr_ce_adr and_ce_idx jsr_ind jsr_iax bit_ce_zpg and_ce_zpg rol_ce_zpg rmb_ce_bzp plp_ce_imp and_imm rol_ce_acc tys_imp bit_aba and_aba rol_ce_aba bbr_ce_zpb
+bmi_ce_rel and_ce_idy and_idz bmi_rw2 bit_ce_zpx and_ce_zpx rol_ce_zpx rmb_ce_bzp sec_ce_imp and_ce_aby dec_ce_acc dez_imp bit_ce_abx and_ce_abx rol_ce_abx bbr_ce_zpb
+rti_ce_imp eor_ce_idx neg_acc asr_acc asr_zpg eor_ce_zpg lsr_ce_zpg rmb_ce_bzp pha_ce_imp eor_imm lsr_ce_acc taz_imp jmp_adr eor_aba lsr_ce_aba bbr_ce_zpb
+bvc_ce_rel eor_ce_idy eor_idz bvc_rw2 asr_zpx eor_ce_zpx lsr_ce_zpx rmb_ce_bzp cli_ce_imp eor_ce_aby phy_ce_imp tab_imp aug_iw3 eor_ce_abx lsr_ce_abx bbr_ce_zpb
+rts_ce_imp adc_ce_idx rtn_imm bsr_rw2 stz_ce_zpg adc_ce_zpg ror_ce_zpg rmb_ce_bzp pla_ce_imp adc_ce_imm ror_ce_acc tza_imp jmp_ce_ind adc_ce_aba ror_ce_aba bbr_ce_zpb
+bvs_ce_rel adc_ce_idy adc_idz bvs_rw2 stz_ce_zpx adc_ce_zpx ror_ce_zpx rmb_ce_bzp sei_ce_imp adc_ce_aby ply_ce_imp tba_imp jmp_ce_iax adc_ce_abx ror_ce_abx bbr_ce_zpb
+bra_ce_rel sta_ce_idx sta_isy bra_rw2 sty_ce_zpg sta_ce_zpg stx_ce_zpg smb_ce_bzp dey_ce_imp bit_ce_imm txa_ce_imp sty_abx sty_aba sta_aba stx_aba bbs_ce_zpb
+bcc_ce_rel sta_ce_idy sta_idz bcc_rw2 sty_ce_zpx sta_ce_zpx stx_ce_zpy smb_ce_bzp tya_ce_imp sta_ce_aby txs_ce_imp stx_aby stz_ce_aba sta_ce_abx stz_ce_abx bbs_ce_zpb
+ldy_imm lda_ce_idx ldx_imm ldz_imm ldy_ce_zpg lda_ce_zpg ldx_ce_zpg smb_ce_bzp tay_ce_imp lda_imm tax_ce_imp ldz_aba ldy_aba lda_aba ldx_aba bbs_ce_zpb
+bcs_ce_rel lda_ce_idy lda_idz bcs_rw2 ldy_ce_zpx lda_ce_zpx ldx_ce_zpy smb_ce_bzp clv_ce_imp lda_ce_aby tsx_ce_imp ldz_abx ldy_ce_abx lda_ce_abx ldx_ce_aby bbs_ce_zpb
+cpy_imm cmp_ce_idx cpz_imm dew_zpg cpy_ce_zpg cmp_ce_zpg dec_ce_zpg smb_ce_bzp iny_ce_imp cmp_imm dex_ce_imp asw_aba cpy_aba cmp_aba dec_ce_aba bbs_ce_zpb
+bne_ce_rel cmp_ce_idy cmp_idz bne_rw2 cpz_zpg cmp_ce_zpx dec_ce_zpx smb_ce_bzp cld_ce_imp cmp_ce_aby phx_ce_imp phz_imp cpz_aba cmp_ce_abx dec_ce_abx bbs_ce_zpb
+cpx_imm sbc_ce_idx lda_isy inw_zpg cpx_ce_zpg sbc_ce_zpg inc_ce_zpg smb_ce_bzp inx_ce_imp sbc_ce_imm nop_c_imp row_aba cpx_aba sbc_ce_aba inc_ce_aba bbs_ce_zpb
+beq_ce_rel sbc_ce_idy sbc_idz beq_rw2 phw_iw2 sbc_ce_zpx inc_ce_zpx smb_ce_bzp sed_ce_imp sbc_ce_aby plx_ce_imp plz_imp phw_aba sbc_ce_abx inc_ce_abx bbs_ce_zpb
reset
diff --git a/src/emu/cpu/m6502/dm740.lst b/src/emu/cpu/m6502/dm740.lst
index 9cdd516e69b..d7716c22c05 100644
--- a/src/emu/cpu/m6502/dm740.lst
+++ b/src/emu/cpu/m6502/dm740.lst
@@ -1,18 +1,18 @@
# m740 device
-brk_imp ora_idx kil_non bbs_acc nop_zpg ora_zpg asl_zpg bbs_biz php_imp ora_imm asl_acc seb_acc nop_aba ora_aba asl_aba seb_biz
-bpl_rel ora_idy clt_imp bbc_acc nop_zpx ora_zpx asl_zpx bbc_biz clc_imp ora_aby nop_imp clb_acc nop_abx ora_abx asl_abx clb_biz
-jsr_adr and_idx jsr_spg bbs_acc bit_zpg and_zpg rol_zpg bbs_biz plp_imp and_imm rol_acc seb_acc bit_aba and_aba rol_aba seb_biz
-bmi_rel and_idy set_imp bbc_acc nop_zpx and_zpx rol_zpx bbc_biz sec_imp and_aby nop_imp clb_acc ldm_imz and_abx rol_abx clb_biz
-rti_imp eor_idx kil_non bbs_acc nop_zpg eor_zpg lsr_zpg bbs_biz pha_imp eor_imm lsr_acc seb_acc jmp_adr eor_aba lsr_aba seb_biz
-bvc_rel eor_idy kil_non bbc_acc nop_zpx eor_zpx lsr_zpx bbc_biz cli_imp eor_aby nop_imp clb_acc nop_abx eor_abx lsr_abx clb_biz
-rts_imp adc_idx kil_non bbs_acc nop_zpg adc_zpg ror_zpg bbs_biz pla_imp adc_imm ror_acc seb_acc jmp_ind adc_aba ror_aba seb_biz
-bvs_rel adc_idy kil_non bbc_acc nop_zpx adc_zpx ror_zpx bbc_biz sei_imp adc_aby nop_imp clb_acc nop_abx adc_abx ror_abx clb_biz
-bra_rel sta_idx rrf_zpg bbs_acc sty_zpg sta_zpg stx_zpg bbs_biz dey_imp nop_imm txa_imp seb_acc sty_aba sta_aba stx_aba seb_biz
-bcc_rel sta_idy kil_non bbc_acc sty_zpx sta_zpx stx_zpy bbc_biz tya_imp sta_aby txs_imp clb_acc shy_abx sta_abx shx_aby clb_biz
-ldy_imm lda_idx ldx_imm bbs_acc ldy_zpg lda_zpg ldx_zpg bbs_biz tay_imp lda_imm tax_imp seb_acc ldy_aba lda_aba ldx_aba seb_biz
-bcs_rel lda_idy kil_non bbc_acc ldy_zpx lda_zpx ldx_zpy bbc_biz clv_imp lda_aby tsx_imp clb_acc ldy_abx lda_abx ldx_aby clb_biz
-cpy_imm cmp_idx nop_imm bbs_acc cpy_zpg cmp_zpg dec_zpg bbs_biz iny_imp cmp_imm dex_imp seb_acc cpy_aba cmp_aba dec_aba seb_biz
-bne_rel cmp_idy kil_non bbc_acc nop_zpx cmp_zpx dec_zpx bbc_biz cld_imp cmp_aby nop_imp clb_acc nop_abx cmp_abx dec_abx clb_biz
-cpx_imm sbc_idx nop_imm bbs_acc cpx_zpg sbc_zpg inc_zpg bbs_biz inx_imp sbc_imm nop_imp seb_acc cpx_aba sbc_aba inc_aba seb_biz
-beq_rel sbc_idy kil_non bbc_acc nop_zpx sbc_zpx inc_zpx bbc_biz sed_imp sbc_aby nop_imp clb_acc nop_abx sbc_abx inc_abx clb_biz
+brk_imp ora_idx kil_non bbs_acc nop_zpg ora_zpg asl_zpg bbs_biz php_imp ora_imm asl_acc seb_acc nop_aba ora_aba asl_aba seb_biz
+bpl_rel ora_idy clt_imp bbc_acc nop_zpx ora_zpx asl_zpx bbc_biz clc_imp ora_aby nop_imp clb_acc nop_abx ora_abx asl_abx clb_biz
+jsr_adr and_idx jsr_spg bbs_acc bit_zpg and_zpg rol_zpg bbs_biz plp_imp and_imm rol_acc seb_acc bit_aba and_aba rol_aba seb_biz
+bmi_rel and_idy set_imp bbc_acc nop_zpx and_zpx rol_zpx bbc_biz sec_imp and_aby nop_imp clb_acc ldm_imz and_abx rol_abx clb_biz
+rti_imp eor_idx kil_non bbs_acc nop_zpg eor_zpg lsr_zpg bbs_biz pha_imp eor_imm lsr_acc seb_acc jmp_adr eor_aba lsr_aba seb_biz
+bvc_rel eor_idy kil_non bbc_acc nop_zpx eor_zpx lsr_zpx bbc_biz cli_imp eor_aby nop_imp clb_acc nop_abx eor_abx lsr_abx clb_biz
+rts_imp adc_idx kil_non bbs_acc nop_zpg adc_zpg ror_zpg bbs_biz pla_imp adc_imm ror_acc seb_acc jmp_ind adc_aba ror_aba seb_biz
+bvs_rel adc_idy kil_non bbc_acc nop_zpx adc_zpx ror_zpx bbc_biz sei_imp adc_aby nop_imp clb_acc nop_abx adc_abx ror_abx clb_biz
+bra_rel sta_idx rrf_zpg bbs_acc sty_zpg sta_zpg stx_zpg bbs_biz dey_imp nop_imm txa_imp seb_acc sty_aba sta_aba stx_aba seb_biz
+bcc_rel sta_idy kil_non bbc_acc sty_zpx sta_zpx stx_zpy bbc_biz tya_imp sta_aby txs_imp clb_acc shy_abx sta_abx shx_aby clb_biz
+ldy_imm lda_idx ldx_imm bbs_acc ldy_zpg lda_zpg ldx_zpg bbs_biz tay_imp lda_imm tax_imp seb_acc ldy_aba lda_aba ldx_aba seb_biz
+bcs_rel lda_idy kil_non bbc_acc ldy_zpx lda_zpx ldx_zpy bbc_biz clv_imp lda_aby tsx_imp clb_acc ldy_abx lda_abx ldx_aby clb_biz
+cpy_imm cmp_idx nop_imm bbs_acc cpy_zpg cmp_zpg dec_zpg bbs_biz iny_imp cmp_imm dex_imp seb_acc cpy_aba cmp_aba dec_aba seb_biz
+bne_rel cmp_idy kil_non bbc_acc nop_zpx cmp_zpx dec_zpx bbc_biz cld_imp cmp_aby nop_imp clb_acc nop_abx cmp_abx dec_abx clb_biz
+cpx_imm sbc_idx nop_imm bbs_acc cpx_zpg sbc_zpg inc_zpg bbs_biz inx_imp sbc_imm nop_imp seb_acc cpx_aba sbc_aba inc_aba seb_biz
+beq_rel sbc_idy kil_non bbc_acc nop_zpx sbc_zpx inc_zpx bbc_biz sed_imp sbc_aby nop_imp clb_acc nop_abx sbc_abx inc_abx clb_biz
reset740
diff --git a/src/emu/cpu/m6502/dn2a03.lst b/src/emu/cpu/m6502/dn2a03.lst
index cc858c5c35a..8b1bb314c48 100644
--- a/src/emu/cpu/m6502/dn2a03.lst
+++ b/src/emu/cpu/m6502/dn2a03.lst
@@ -1,18 +1,18 @@
# n2a03 - D flag is disabled but present in the P register
-brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
-bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
-jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
-bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
-rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
-bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
-rts_imp adc_nd_idx kil_non rra_nd_idx nop_zpg adc_nd_zpg ror_zpg rra_nd_zpg pla_imp adc_nd_imm ror_acc arr_nd_imm jmp_ind adc_nd_aba ror_aba rra_nd_aba
-bvs_rel adc_nd_idy kil_non rra_nd_idy nop_zpx adc_nd_zpx ror_zpx rra_nd_zpx sei_imp adc_nd_aby nop_imp rra_nd_aby nop_abx adc_nd_abx ror_abx rra_nd_abx
-nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
-bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
-ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
-bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
-cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
-bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
-cpx_imm sbc_nd_idx nop_imm isb_nd_idx cpx_zpg sbc_nd_zpg inc_zpg isb_nd_zpg inx_imp sbc_nd_imm nop_imp sbc_nd_imm cpx_aba sbc_nd_aba inc_aba isb_nd_aba
-beq_rel sbc_nd_idy kil_non isb_nd_idy nop_zpx sbc_nd_zpx inc_zpx isb_nd_zpx sed_imp sbc_nd_aby nop_imp isb_nd_aby nop_abx sbc_nd_abx inc_abx isb_nd_abx
+brk_imp ora_idx kil_non slo_idx nop_zpg ora_zpg asl_zpg slo_zpg php_imp ora_imm asl_acc anc_imm nop_aba ora_aba asl_aba slo_aba
+bpl_rel ora_idy kil_non slo_idy nop_zpx ora_zpx asl_zpx slo_zpx clc_imp ora_aby nop_imp slo_aby nop_abx ora_abx asl_abx slo_abx
+jsr_adr and_idx kil_non rla_idx bit_zpg and_zpg rol_zpg rla_zpg plp_imp and_imm rol_acc anc_imm bit_aba and_aba rol_aba rla_aba
+bmi_rel and_idy kil_non rla_idy nop_zpx and_zpx rol_zpx rla_zpx sec_imp and_aby nop_imp rla_aby nop_abx and_abx rol_abx rla_abx
+rti_imp eor_idx kil_non sre_idx nop_zpg eor_zpg lsr_zpg sre_zpg pha_imp eor_imm lsr_acc asr_imm jmp_adr eor_aba lsr_aba sre_aba
+bvc_rel eor_idy kil_non sre_idy nop_zpx eor_zpx lsr_zpx sre_zpx cli_imp eor_aby nop_imp sre_aby nop_abx eor_abx lsr_abx sre_abx
+rts_imp adc_nd_idx kil_non rra_nd_idx nop_zpg adc_nd_zpg ror_zpg rra_nd_zpg pla_imp adc_nd_imm ror_acc arr_nd_imm jmp_ind adc_nd_aba ror_aba rra_nd_aba
+bvs_rel adc_nd_idy kil_non rra_nd_idy nop_zpx adc_nd_zpx ror_zpx rra_nd_zpx sei_imp adc_nd_aby nop_imp rra_nd_aby nop_abx adc_nd_abx ror_abx rra_nd_abx
+nop_imp sta_idx nop_imm sax_idx sty_zpg sta_zpg stx_zpg sax_zpg dey_imp nop_imm txa_imp ane_imm sty_aba sta_aba stx_aba sax_aba
+bcc_rel sta_idy kil_non sha_idy sty_zpx sta_zpx stx_zpy sax_zpy tya_imp sta_aby txs_imp shs_aby shy_abx sta_abx shx_aby sha_aby
+ldy_imm lda_idx ldx_imm lax_idx ldy_zpg lda_zpg ldx_zpg lax_zpg tay_imp lda_imm tax_imp lxa_imm ldy_aba lda_aba ldx_aba lax_aba
+bcs_rel lda_idy kil_non lax_idy ldy_zpx lda_zpx ldx_zpy lax_zpy clv_imp lda_aby tsx_imp las_aby ldy_abx lda_abx ldx_aby lax_aby
+cpy_imm cmp_idx nop_imm dcp_idx cpy_zpg cmp_zpg dec_zpg dcp_zpg iny_imp cmp_imm dex_imp sbx_imm cpy_aba cmp_aba dec_aba dcp_aba
+bne_rel cmp_idy kil_non dcp_idy nop_zpx cmp_zpx dec_zpx dcp_zpx cld_imp cmp_aby nop_imp dcp_aby nop_abx cmp_abx dec_abx dcp_abx
+cpx_imm sbc_nd_idx nop_imm isb_nd_idx cpx_zpg sbc_nd_zpg inc_zpg isb_nd_zpg inx_imp sbc_nd_imm nop_imp sbc_nd_imm cpx_aba sbc_nd_aba inc_aba isb_nd_aba
+beq_rel sbc_nd_idy kil_non isb_nd_idy nop_zpx sbc_nd_zpx inc_zpx isb_nd_zpx sed_imp sbc_nd_aby nop_imp isb_nd_aby nop_abx sbc_nd_abx inc_abx isb_nd_abx
reset
diff --git a/src/emu/cpu/m6502/dr65c02.lst b/src/emu/cpu/m6502/dr65c02.lst
index 64b38466738..fa4a97bda56 100644
--- a/src/emu/cpu/m6502/dr65c02.lst
+++ b/src/emu/cpu/m6502/dr65c02.lst
@@ -1,18 +1,18 @@
# r65c02 - rockwell variant, with the bitwise instructions and stp/wai
-brk_c_imp ora_idx nop_imm nop_c_imp tsb_zpg ora_zpg asl_zpg rmb_bzp php_imp ora_imm asl_acc nop_c_imp tsb_aba ora_aba asl_aba bbr_zpb
-bpl_rel ora_idy ora_zpi nop_c_imp trb_zpg ora_zpx asl_zpx rmb_bzp clc_imp ora_aby inc_acc nop_c_imp trb_aba ora_abx asl_c_abx bbr_zpb
-jsr_adr and_idx nop_imm nop_c_imp bit_zpg and_zpg rol_zpg rmb_bzp plp_imp and_imm rol_acc nop_c_imp bit_aba and_aba rol_aba bbr_zpb
-bmi_rel and_idy and_zpi nop_c_imp bit_zpx and_zpx rol_zpx rmb_bzp sec_imp and_aby dec_acc nop_c_imp bit_abx and_abx rol_c_abx bbr_zpb
-rti_imp eor_idx nop_imm nop_c_imp nop_zpg eor_zpg lsr_zpg rmb_bzp pha_imp eor_imm lsr_acc nop_c_imp jmp_adr eor_aba lsr_aba bbr_zpb
-bvc_rel eor_idy eor_zpi nop_c_imp nop_zpx eor_zpx lsr_zpx rmb_bzp cli_imp eor_aby phy_imp nop_c_imp nop_c_aba eor_abx lsr_c_abx bbr_zpb
-rts_imp adc_c_idx nop_imm nop_c_imp stz_zpg adc_c_zpg ror_zpg rmb_bzp pla_imp adc_c_imm ror_acc nop_c_imp jmp_c_ind adc_c_aba ror_aba bbr_zpb
-bvs_rel adc_c_idy adc_c_zpi nop_c_imp stz_zpx adc_c_zpx ror_zpx rmb_bzp sei_imp adc_c_aby ply_imp nop_c_imp jmp_iax adc_c_abx ror_c_abx bbr_zpb
-bra_rel sta_idx nop_imm nop_c_imp sty_zpg sta_zpg stx_zpg smb_bzp dey_imp bit_imm txa_imp nop_c_imp sty_aba sta_aba stx_aba bbs_zpb
-bcc_rel sta_idy sta_zpi nop_c_imp sty_zpx sta_zpx stx_zpy smb_bzp tya_imp sta_aby txs_imp nop_c_imp stz_aba sta_abx stz_abx bbs_zpb
-ldy_imm lda_idx ldx_imm nop_c_imp ldy_zpg lda_zpg ldx_zpg smb_bzp tay_imp lda_imm tax_imp nop_c_imp ldy_aba lda_aba ldx_aba bbs_zpb
-bcs_rel lda_idy lda_zpi nop_c_imp ldy_zpx lda_zpx ldx_zpy smb_bzp clv_imp lda_aby tsx_imp nop_c_imp ldy_abx lda_abx ldx_aby bbs_zpb
-cpy_imm cmp_idx nop_imm nop_c_imp cpy_zpg cmp_zpg dec_zpg smb_bzp iny_imp cmp_imm dex_imp wai_imp cpy_aba cmp_aba dec_aba bbs_zpb
-bne_rel cmp_idy cmp_zpi nop_c_imp nop_zpx cmp_zpx dec_zpx smb_bzp cld_imp cmp_aby phx_imp stp_imp nop_c_abx cmp_abx dec_abx bbs_zpb
-cpx_imm sbc_c_idx nop_imm nop_c_imp cpx_zpg sbc_c_zpg inc_zpg smb_bzp inx_imp sbc_c_imm nop_imp nop_c_imp cpx_aba sbc_c_aba inc_aba bbs_zpb
-beq_rel sbc_c_idy sbc_c_zpi nop_c_imp nop_zpx sbc_c_zpx inc_zpx smb_bzp sed_imp sbc_c_aby plx_imp nop_c_imp nop_c_abx sbc_c_abx inc_abx bbs_zpb
+brk_c_imp ora_idx nop_imm nop_c_imp tsb_zpg ora_zpg asl_zpg rmb_bzp php_imp ora_imm asl_acc nop_c_imp tsb_aba ora_aba asl_aba bbr_zpb
+bpl_rel ora_idy ora_zpi nop_c_imp trb_zpg ora_zpx asl_zpx rmb_bzp clc_imp ora_aby inc_acc nop_c_imp trb_aba ora_abx asl_c_abx bbr_zpb
+jsr_adr and_idx nop_imm nop_c_imp bit_zpg and_zpg rol_zpg rmb_bzp plp_imp and_imm rol_acc nop_c_imp bit_aba and_aba rol_aba bbr_zpb
+bmi_rel and_idy and_zpi nop_c_imp bit_zpx and_zpx rol_zpx rmb_bzp sec_imp and_aby dec_acc nop_c_imp bit_abx and_abx rol_c_abx bbr_zpb
+rti_imp eor_idx nop_imm nop_c_imp nop_zpg eor_zpg lsr_zpg rmb_bzp pha_imp eor_imm lsr_acc nop_c_imp jmp_adr eor_aba lsr_aba bbr_zpb
+bvc_rel eor_idy eor_zpi nop_c_imp nop_zpx eor_zpx lsr_zpx rmb_bzp cli_imp eor_aby phy_imp nop_c_imp nop_c_aba eor_abx lsr_c_abx bbr_zpb
+rts_imp adc_c_idx nop_imm nop_c_imp stz_zpg adc_c_zpg ror_zpg rmb_bzp pla_imp adc_c_imm ror_acc nop_c_imp jmp_c_ind adc_c_aba ror_aba bbr_zpb
+bvs_rel adc_c_idy adc_c_zpi nop_c_imp stz_zpx adc_c_zpx ror_zpx rmb_bzp sei_imp adc_c_aby ply_imp nop_c_imp jmp_iax adc_c_abx ror_c_abx bbr_zpb
+bra_rel sta_idx nop_imm nop_c_imp sty_zpg sta_zpg stx_zpg smb_bzp dey_imp bit_imm txa_imp nop_c_imp sty_aba sta_aba stx_aba bbs_zpb
+bcc_rel sta_idy sta_zpi nop_c_imp sty_zpx sta_zpx stx_zpy smb_bzp tya_imp sta_aby txs_imp nop_c_imp stz_aba sta_abx stz_abx bbs_zpb
+ldy_imm lda_idx ldx_imm nop_c_imp ldy_zpg lda_zpg ldx_zpg smb_bzp tay_imp lda_imm tax_imp nop_c_imp ldy_aba lda_aba ldx_aba bbs_zpb
+bcs_rel lda_idy lda_zpi nop_c_imp ldy_zpx lda_zpx ldx_zpy smb_bzp clv_imp lda_aby tsx_imp nop_c_imp ldy_abx lda_abx ldx_aby bbs_zpb
+cpy_imm cmp_idx nop_imm nop_c_imp cpy_zpg cmp_zpg dec_zpg smb_bzp iny_imp cmp_imm dex_imp wai_imp cpy_aba cmp_aba dec_aba bbs_zpb
+bne_rel cmp_idy cmp_zpi nop_c_imp nop_zpx cmp_zpx dec_zpx smb_bzp cld_imp cmp_aby phx_imp stp_imp nop_c_abx cmp_abx dec_abx bbs_zpb
+cpx_imm sbc_c_idx nop_imm nop_c_imp cpx_zpg sbc_c_zpg inc_zpg smb_bzp inx_imp sbc_c_imm nop_imp nop_c_imp cpx_aba sbc_c_aba inc_aba bbs_zpb
+beq_rel sbc_c_idy sbc_c_zpi nop_c_imp nop_zpx sbc_c_zpx inc_zpx smb_bzp sed_imp sbc_c_aby plx_imp nop_c_imp nop_c_abx sbc_c_abx inc_abx bbs_zpb
reset
diff --git a/src/emu/cpu/m6502/m6502.c b/src/emu/cpu/m6502/m6502.c
index de518e7c153..f44a7181c37 100644
--- a/src/emu/cpu/m6502/m6502.c
+++ b/src/emu/cpu/m6502/m6502.c
@@ -456,12 +456,12 @@ void m6502_device::state_string_export(const device_state_entry &entry, astring
case STATE_GENFLAGS:
case M6502_P:
string.printf("%c%c%c%c%c%c",
- P & F_N ? 'N' : '.',
- P & F_V ? 'V' : '.',
- P & F_D ? 'D' : '.',
- P & F_I ? 'I' : '.',
- P & F_Z ? 'Z' : '.',
- P & F_C ? 'C' : '.');
+ P & F_N ? 'N' : '.',
+ P & F_V ? 'V' : '.',
+ P & F_D ? 'D' : '.',
+ P & F_I ? 'I' : '.',
+ P & F_Z ? 'Z' : '.',
+ P & F_C ? 'C' : '.');
break;
}
}
diff --git a/src/emu/cpu/m6502/m6502.h b/src/emu/cpu/m6502/m6502.h
index be346723834..31b1666cee9 100644
--- a/src/emu/cpu/m6502/m6502.h
+++ b/src/emu/cpu/m6502/m6502.h
@@ -102,32 +102,32 @@ protected:
enum {
DASM_non, /* no additional arguments */
- DASM_aba, /* absolute */
- DASM_abx, /* absolute + X */
- DASM_aby, /* absolute + Y */
- DASM_acc, /* accumulator */
- DASM_adr, /* absolute address (jmp,jsr) */
- DASM_bzp, /* zero page with bit selection */
- DASM_iax, /* indirect + X (65c02 jmp) */
- DASM_idx, /* zero page pre indexed */
- DASM_idy, /* zero page post indexed */
- DASM_idz, /* zero page post indexed (65ce02) */
- DASM_imm, /* immediate */
- DASM_imp, /* implicit */
- DASM_ind, /* indirect (jmp) */
- DASM_isy, /* zero page pre indexed sp and post indexed Y (65ce02) */
- DASM_iw2, /* immediate word (65ce02) */
- DASM_iw3, /* augment (65ce02) */
- DASM_rel, /* relative */
- DASM_rw2, /* relative word (65cs02, 65ce02) */
- DASM_zpb, /* zero page and branch (65c02 bbr, bbs) */
- DASM_zpg, /* zero page */
- DASM_zpi, /* zero page indirect (65c02) */
- DASM_zpx, /* zero page + X */
- DASM_zpy, /* zero page + Y */
- DASM_imz, /* load immediate byte, store to zero page address (M740) */
- DASM_spg, /* "special page": implied FF00 plus immediate value (M740)*/
- DASM_biz /* bit, zero page (M740) */
+ DASM_aba, /* absolute */
+ DASM_abx, /* absolute + X */
+ DASM_aby, /* absolute + Y */
+ DASM_acc, /* accumulator */
+ DASM_adr, /* absolute address (jmp,jsr) */
+ DASM_bzp, /* zero page with bit selection */
+ DASM_iax, /* indirect + X (65c02 jmp) */
+ DASM_idx, /* zero page pre indexed */
+ DASM_idy, /* zero page post indexed */
+ DASM_idz, /* zero page post indexed (65ce02) */
+ DASM_imm, /* immediate */
+ DASM_imp, /* implicit */
+ DASM_ind, /* indirect (jmp) */
+ DASM_isy, /* zero page pre indexed sp and post indexed Y (65ce02) */
+ DASM_iw2, /* immediate word (65ce02) */
+ DASM_iw3, /* augment (65ce02) */
+ DASM_rel, /* relative */
+ DASM_rw2, /* relative word (65cs02, 65ce02) */
+ DASM_zpb, /* zero page and branch (65c02 bbr, bbs) */
+ DASM_zpg, /* zero page */
+ DASM_zpi, /* zero page indirect (65c02) */
+ DASM_zpx, /* zero page + X */
+ DASM_zpy, /* zero page + Y */
+ DASM_imz, /* load immediate byte, store to zero page address (M740) */
+ DASM_spg, /* "special page": implied FF00 plus immediate value (M740)*/
+ DASM_biz /* bit, zero page (M740) */
};
enum {
diff --git a/src/emu/cpu/m6502/m65ce02.c b/src/emu/cpu/m6502/m65ce02.c
index 581396b1b3b..f05dc5b2a07 100644
--- a/src/emu/cpu/m6502/m65ce02.c
+++ b/src/emu/cpu/m6502/m65ce02.c
@@ -110,13 +110,13 @@ void m65ce02_device::state_string_export(const device_state_entry &entry, astrin
case STATE_GENFLAGS:
case M6502_P:
string.printf("%c%c%c%c%c%c%c",
- P & F_N ? 'N' : '.',
- P & F_V ? 'V' : '.',
- P & F_E ? 'E' : '.',
- P & F_D ? 'D' : '.',
- P & F_I ? 'I' : '.',
- P & F_Z ? 'Z' : '.',
- P & F_C ? 'C' : '.');
+ P & F_N ? 'N' : '.',
+ P & F_V ? 'V' : '.',
+ P & F_E ? 'E' : '.',
+ P & F_D ? 'D' : '.',
+ P & F_I ? 'I' : '.',
+ P & F_Z ? 'Z' : '.',
+ P & F_C ? 'C' : '.');
break;
case M65CE02_B:
string.printf("%02x", B >> 8);
diff --git a/src/emu/cpu/m6502/om740.lst b/src/emu/cpu/m6502/om740.lst
index 0f4b9f5760f..642bd45ed5f 100644
--- a/src/emu/cpu/m6502/om740.lst
+++ b/src/emu/cpu/m6502/om740.lst
@@ -107,4 +107,3 @@ reset740
PC = set_h(PC, read_direct(0xffff));
prefetch();
inst_state = -1;
-
diff --git a/src/emu/cpu/m6800/6800dasm.c b/src/emu/cpu/m6800/6800dasm.c
index 712de231159..e19d680b84a 100644
--- a/src/emu/cpu/m6800/6800dasm.c
+++ b/src/emu/cpu/m6800/6800dasm.c
@@ -22,35 +22,35 @@
#include "m6800.h"
enum addr_mode {
- inh, /* inherent */
- rel, /* relative */
- imb, /* immediate (byte) */
- imw, /* immediate (word) */
- dir, /* direct address */
- imd, /* HD63701YO: immediate, direct address */
- ext, /* extended address */
- idx, /* x + byte offset */
- imx, /* HD63701YO: immediate, x + byte offset */
- sx1 /* HD63701YO: undocumented opcodes: byte from (s+1) */
+ inh, /* inherent */
+ rel, /* relative */
+ imb, /* immediate (byte) */
+ imw, /* immediate (word) */
+ dir, /* direct address */
+ imd, /* HD63701YO: immediate, direct address */
+ ext, /* extended address */
+ idx, /* x + byte offset */
+ imx, /* HD63701YO: immediate, x + byte offset */
+ sx1 /* HD63701YO: undocumented opcodes: byte from (s+1) */
};
enum op_names {
- aba=0, abx, adca, adcb, adda, addb, addd, aim,
- anda, andb, asl, asla, aslb, asld, asr, asra,
- asrb, bcc, bcs, beq, bge, bgt, bhi, bita,
- bitb, ble, bls, blt, bmi, bne, bpl, bra,
- brn, bsr, bvc, bvs, cba, clc, cli, clr,
- clra, clrb, clv, cmpa, cmpb, cmpx, com, coma,
- comb, daa, dec, deca, decb, des, dex, eim,
- eora, eorb, ill, inc, inca, incb, ins, inx,
- jmp, jsr, lda, ldb, ldd, lds, ldx, lsr,
- lsra, lsrb, lsrd, mul, neg, nega, negb, nop,
- oim, ora, orb, psha, pshb, pshx, pula, pulb,
- pulx, rol, rola, rolb, ror, rora, rorb, rti,
- rts, sba, sbca, sbcb, sec, sev, sta, stb,
- _std, sei, sts, stx, suba, subb, subd, swi,
- wai, tab, tap, tba, tim, tpa, tst, tsta,
- tstb, tsx, txs, asx1, asx2, xgdx, addx, adcx
+ aba=0, abx, adca, adcb, adda, addb, addd, aim,
+ anda, andb, asl, asla, aslb, asld, asr, asra,
+ asrb, bcc, bcs, beq, bge, bgt, bhi, bita,
+ bitb, ble, bls, blt, bmi, bne, bpl, bra,
+ brn, bsr, bvc, bvs, cba, clc, cli, clr,
+ clra, clrb, clv, cmpa, cmpb, cmpx, com, coma,
+ comb, daa, dec, deca, decb, des, dex, eim,
+ eora, eorb, ill, inc, inca, incb, ins, inx,
+ jmp, jsr, lda, ldb, ldd, lds, ldx, lsr,
+ lsra, lsrb, lsrd, mul, neg, nega, negb, nop,
+ oim, ora, orb, psha, pshb, pshx, pula, pulb,
+ pulx, rol, rola, rolb, ror, rora, rorb, rti,
+ rts, sba, sbca, sbcb, sec, sev, sta, stb,
+ _std, sei, sts, stx, suba, subb, subd, swi,
+ wai, tab, tap, tba, tim, tpa, tst, tsta,
+ tstb, tsx, txs, asx1, asx2, xgdx, addx, adcx
};
static const char *const op_name_str[] = {
@@ -156,7 +156,7 @@ static const UINT8 table[0x102][3] = {
#define OP oprom[0]
#define ARG1 opram[1]
#define ARG2 opram[2]
-#define ARGW (opram[1]<<8) + opram[2]
+#define ARGW (opram[1]<<8) + opram[2]
static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *oprom, const UINT8 *opram)
{
@@ -197,7 +197,7 @@ static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *opro
else if (opcode == rti || opcode == rts)
flags = DASMFLAG_STEP_OUT;
- if ( invalid & invalid_mask ) /* invalid for this cpu type ? */
+ if ( invalid & invalid_mask ) /* invalid for this cpu type ? */
{
strcpy(buf, "illegal");
return 1 | flags | DASMFLAG_SUPPORTED;
@@ -218,7 +218,7 @@ static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *opro
return 3 | flags | DASMFLAG_SUPPORTED;
case idx: /* indexed + byte offset */
sprintf (buf, "(x+$%02X)", ARG1 );
- return 2 | flags | DASMFLAG_SUPPORTED;
+ return 2 | flags | DASMFLAG_SUPPORTED;
case imx: /* immediate, indexed + byte offset */
sprintf (buf, "#$%02X,(x+$%02x)", ARG1, ARG2 );
return 3 | flags | DASMFLAG_SUPPORTED;
@@ -227,14 +227,14 @@ static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *opro
return 2 | flags | DASMFLAG_SUPPORTED;
case imd: /* immediate, direct address */
sprintf (buf, "#$%02X,$%02X", ARG1, ARG2);
- return 3 | flags | DASMFLAG_SUPPORTED;
+ return 3 | flags | DASMFLAG_SUPPORTED;
case ext: /* extended address */
sprintf (buf, "$%04X", ARGW);
return 3 | flags | DASMFLAG_SUPPORTED;
case sx1: /* byte from address (s + 1) */
- sprintf (buf, "(s+1)");
- return 1 | flags | DASMFLAG_SUPPORTED;
- default:
+ sprintf (buf, "(s+1)");
+ return 1 | flags | DASMFLAG_SUPPORTED;
+ default:
return 1 | flags | DASMFLAG_SUPPORTED;
}
}
diff --git a/src/emu/cpu/m6800/6800ops.c b/src/emu/cpu/m6800/6800ops.c
index 97aab2f8dba..0163837c7c2 100644
--- a/src/emu/cpu/m6800/6800ops.c
+++ b/src/emu/cpu/m6800/6800ops.c
@@ -434,9 +434,9 @@ OP_HANDLER( mul )
OP_HANDLER( wai )
{
/*
- * WAI stacks the entire machine state on the
- * hardware stack, then waits for an interrupt.
- */
+ * WAI stacks the entire machine state on the
+ * hardware stack, then waits for an interrupt.
+ */
cpustate->wai_state |= M6800_WAI;
PUSHWORD(pPC);
PUSHWORD(pX);
@@ -454,8 +454,8 @@ OP_HANDLER( swi )
PUSHWORD(pX);
PUSHBYTE(A);
PUSHBYTE(B);
- PUSHBYTE(CC);
- SEI;
+ PUSHBYTE(CC);
+ SEI;
PCD = RM16(cpustate, 0xfffa);
}
@@ -949,7 +949,7 @@ OP_HANDLER( clr_ex )
/* $80 SUBA immediate ?**** */
OP_HANDLER( suba_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -958,7 +958,7 @@ OP_HANDLER( suba_im )
/* $81 CMPA immediate ?**** */
OP_HANDLER( cmpa_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
}
@@ -966,7 +966,7 @@ OP_HANDLER( cmpa_im )
/* $82 SBCA immediate ?**** */
OP_HANDLER( sbca_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t); r = A-t-(CC&0x01);
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1103,7 +1103,7 @@ OP_HANDLER( sts_im )
/* $90 SUBA direct ?**** */
OP_HANDLER( suba_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1112,7 +1112,7 @@ OP_HANDLER( suba_di )
/* $91 CMPA direct ?**** */
OP_HANDLER( cmpa_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
}
@@ -1120,7 +1120,7 @@ OP_HANDLER( cmpa_di )
/* $92 SBCA direct ?**** */
OP_HANDLER( sbca_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t); r = A-t-(CC&0x01);
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1269,7 +1269,7 @@ OP_HANDLER( sts_di )
/* $a0 SUBA indexed ?**** */
OP_HANDLER( suba_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1280,7 +1280,7 @@ OP_HANDLER( suba_ix )
/* $a1 CMPA indexed ?**** */
OP_HANDLER( cmpa_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1290,7 +1290,7 @@ OP_HANDLER( cmpa_ix )
/* $a2 SBCA indexed ?**** */
OP_HANDLER( sbca_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = A - t - (CC&0x01);
CLR_NZVC;
@@ -1443,7 +1443,7 @@ OP_HANDLER( sts_ix )
/* $b0 SUBA extended ?**** */
OP_HANDLER( suba_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1454,7 +1454,7 @@ OP_HANDLER( suba_ex )
/* $b1 CMPA extended ?**** */
OP_HANDLER( cmpa_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A-t;
CLR_NZVC;
@@ -1464,7 +1464,7 @@ OP_HANDLER( cmpa_ex )
/* $b2 SBCA extended ?**** */
OP_HANDLER( sbca_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A-t-(CC&0x01);
CLR_NZVC;
@@ -1619,7 +1619,7 @@ OP_HANDLER( sts_ex )
/* $c0 SUBB immediate ?**** */
OP_HANDLER( subb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1630,7 +1630,7 @@ OP_HANDLER( subb_im )
/* $c1 CMPB immediate ?**** */
OP_HANDLER( cmpb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1640,7 +1640,7 @@ OP_HANDLER( cmpb_im )
/* $c2 SBCB immediate ?**** */
OP_HANDLER( sbcb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -1781,7 +1781,7 @@ OP_HANDLER( stx_im )
/* $d0 SUBB direct ?**** */
OP_HANDLER( subb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1792,7 +1792,7 @@ OP_HANDLER( subb_di )
/* $d1 CMPB direct ?**** */
OP_HANDLER( cmpb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1802,7 +1802,7 @@ OP_HANDLER( cmpb_di )
/* $d2 SBCB direct ?**** */
OP_HANDLER( sbcb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -1941,7 +1941,7 @@ OP_HANDLER( stx_di )
/* $e0 SUBB indexed ?**** */
OP_HANDLER( subb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1952,7 +1952,7 @@ OP_HANDLER( subb_ix )
/* $e1 CMPB indexed ?**** */
OP_HANDLER( cmpb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1962,7 +1962,7 @@ OP_HANDLER( cmpb_ix )
/* $e2 SBCB indexed ?**** */
OP_HANDLER( sbcb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -2113,7 +2113,7 @@ OP_HANDLER( stx_ix )
/* $f0 SUBB extended ?**** */
OP_HANDLER( subb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B-t;
CLR_NZVC;
@@ -2124,7 +2124,7 @@ OP_HANDLER( subb_ex )
/* $f1 CMPB extended ?**** */
OP_HANDLER( cmpb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B-t;
CLR_NZVC;
@@ -2134,7 +2134,7 @@ OP_HANDLER( cmpb_ex )
/* $f2 SBCB extended ?**** */
OP_HANDLER( sbcb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
diff --git a/src/emu/cpu/m6800/6800tbl.c b/src/emu/cpu/m6800/6800tbl.c
index eae581b0671..63e8df59c7a 100644
--- a/src/emu/cpu/m6800/6800tbl.c
+++ b/src/emu/cpu/m6800/6800tbl.c
@@ -246,24 +246,24 @@ INLINE void cpx_ix(m6800_state *cpustate);
INLINE void trap(m6800_state *cpustate);
static void (*const m6800_insn[0x100])(m6800_state *cpustate) = {
-illegal,nop, illegal,illegal,illegal,illegal,tap, tpa,
-inx, dex, clv, sev, clc, sec, cli, sei,
-sba, cba, illegal,illegal,illegal,illegal,tab, tba,
-illegal,daa, illegal,aba, illegal,illegal,illegal,illegal,
-bra, brn, bhi, bls, bcc, bcs, bne, beq,
-bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
-tsx, ins, pula, pulb, des, txs, psha, pshb,
-illegal,rts, illegal,rti, illegal,illegal,wai, swi,
-nega, illegal,illegal,coma, lsra, illegal,rora, asra,
-asla, rola, deca, illegal,inca, tsta, illegal,clra,
-negb, illegal,illegal,comb, lsrb, illegal,rorb, asrb,
-aslb, rolb, decb, illegal,incb, tstb, illegal,clrb,
+illegal,nop, illegal,illegal,illegal,illegal,tap, tpa,
+inx, dex, clv, sev, clc, sec, cli, sei,
+sba, cba, illegal,illegal,illegal,illegal,tab, tba,
+illegal,daa, illegal,aba, illegal,illegal,illegal,illegal,
+bra, brn, bhi, bls, bcc, bcs, bne, beq,
+bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
+tsx, ins, pula, pulb, des, txs, psha, pshb,
+illegal,rts, illegal,rti, illegal,illegal,wai, swi,
+nega, illegal,illegal,coma, lsra, illegal,rora, asra,
+asla, rola, deca, illegal,inca, tsta, illegal,clra,
+negb, illegal,illegal,comb, lsrb, illegal,rorb, asrb,
+aslb, rolb, decb, illegal,incb, tstb, illegal,clrb,
neg_ix, illegal,illegal,com_ix, lsr_ix, illegal,ror_ix, asr_ix,
asl_ix, rol_ix, dec_ix, illegal,inc_ix, tst_ix, jmp_ix, clr_ix,
neg_ex, illegal,illegal,com_ex, lsr_ex, illegal,ror_ex, asr_ex,
asl_ex, rol_ex, dec_ex, illegal,inc_ex, tst_ex, jmp_ex, clr_ex,
suba_im,cmpa_im,sbca_im,illegal,anda_im,bita_im,lda_im, sta_im,
-eora_im,adca_im,ora_im, adda_im,cmpx_im,bsr, lds_im, sts_im,
+eora_im,adca_im,ora_im, adda_im,cmpx_im,bsr, lds_im, sts_im,
suba_di,cmpa_di,sbca_di,illegal,anda_di,bita_di,lda_di, sta_di,
eora_di,adca_di,ora_di, adda_di,cmpx_di,jsr_di, lds_di, sts_di,
suba_ix,cmpa_ix,sbca_ix,illegal,anda_ix,bita_ix,lda_ix, sta_ix,
@@ -281,24 +281,24 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,illegal,illegal,ldx_ex, stx_ex
};
static void (*const m6803_insn[0x100])(m6800_state *cpustate) = {
-illegal,nop, illegal,illegal,lsrd, asld, tap, tpa,
-inx, dex, clv, sev, clc, sec, cli, sei,
-sba, cba, illegal,illegal,illegal,illegal,tab, tba,
-illegal,daa, illegal,aba, illegal,illegal,illegal,illegal,
-bra, brn, bhi, bls, bcc, bcs, bne, beq,
-bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
-tsx, ins, pula, pulb, des, txs, psha, pshb,
-pulx, rts, abx, rti, pshx, mul, wai, swi,
-nega, illegal,illegal,coma, lsra, illegal,rora, asra,
-asla, rola, deca, illegal,inca, tsta, illegal,clra,
-negb, illegal,illegal,comb, lsrb, illegal,rorb, asrb,
-aslb, rolb, decb, illegal,incb, tstb, illegal,clrb,
+illegal,nop, illegal,illegal,lsrd, asld, tap, tpa,
+inx, dex, clv, sev, clc, sec, cli, sei,
+sba, cba, illegal,illegal,illegal,illegal,tab, tba,
+illegal,daa, illegal,aba, illegal,illegal,illegal,illegal,
+bra, brn, bhi, bls, bcc, bcs, bne, beq,
+bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
+tsx, ins, pula, pulb, des, txs, psha, pshb,
+pulx, rts, abx, rti, pshx, mul, wai, swi,
+nega, illegal,illegal,coma, lsra, illegal,rora, asra,
+asla, rola, deca, illegal,inca, tsta, illegal,clra,
+negb, illegal,illegal,comb, lsrb, illegal,rorb, asrb,
+aslb, rolb, decb, illegal,incb, tstb, illegal,clrb,
neg_ix, illegal,illegal,com_ix, lsr_ix, illegal,ror_ix, asr_ix,
asl_ix, rol_ix, dec_ix, illegal,inc_ix, tst_ix, jmp_ix, clr_ix,
neg_ex, illegal,illegal,com_ex, lsr_ex, illegal,ror_ex, asr_ex,
asl_ex, rol_ex, dec_ex, illegal,inc_ex, tst_ex, jmp_ex, clr_ex,
suba_im,cmpa_im,sbca_im,subd_im,anda_im,bita_im,lda_im, sta_im,
-eora_im,adca_im,ora_im, adda_im,cpx_im ,bsr, lds_im, sts_im,
+eora_im,adca_im,ora_im, adda_im,cpx_im ,bsr, lds_im, sts_im,
suba_di,cmpa_di,sbca_di,subd_di,anda_di,bita_di,lda_di, sta_di,
eora_di,adca_di,ora_di, adda_di,cpx_di ,jsr_di, lds_di, sts_di,
suba_ix,cmpa_ix,sbca_ix,subd_ix,anda_ix,bita_ix,lda_ix, sta_ix,
@@ -316,24 +316,24 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,ldd_ex, std_ex, ldx_ex, stx_ex
};
static void (*const hd63701_insn[0x100])(m6800_state *cpustate) = {
-trap, nop, trap, trap, lsrd, asld, tap, tpa,
-inx, dex, clv, sev, clc, sec, cli, sei,
-sba, cba, undoc1, undoc2, trap, trap, tab, tba,
-xgdx, daa, slp, aba, trap, trap, trap, trap,
-bra, brn, bhi, bls, bcc, bcs, bne, beq,
-bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
-tsx, ins, pula, pulb, des, txs, psha, pshb,
-pulx, rts, abx, rti, pshx, mul, wai, swi,
-nega, trap, trap, coma, lsra, trap, rora, asra,
-asla, rola, deca, trap, inca, tsta, trap, clra,
-negb, trap, trap, comb, lsrb, trap, rorb, asrb,
-aslb, rolb, decb, trap, incb, tstb, trap, clrb,
+trap, nop, trap, trap, lsrd, asld, tap, tpa,
+inx, dex, clv, sev, clc, sec, cli, sei,
+sba, cba, undoc1, undoc2, trap, trap, tab, tba,
+xgdx, daa, slp, aba, trap, trap, trap, trap,
+bra, brn, bhi, bls, bcc, bcs, bne, beq,
+bvc, bvs, bpl, bmi, bge, blt, bgt, ble,
+tsx, ins, pula, pulb, des, txs, psha, pshb,
+pulx, rts, abx, rti, pshx, mul, wai, swi,
+nega, trap, trap, coma, lsra, trap, rora, asra,
+asla, rola, deca, trap, inca, tsta, trap, clra,
+negb, trap, trap, comb, lsrb, trap, rorb, asrb,
+aslb, rolb, decb, trap, incb, tstb, trap, clrb,
neg_ix, aim_ix, oim_ix, com_ix, lsr_ix, eim_ix, ror_ix, asr_ix,
asl_ix, rol_ix, dec_ix, tim_ix, inc_ix, tst_ix, jmp_ix, clr_ix,
neg_ex, aim_di, oim_di, com_ex, lsr_ex, eim_di, ror_ex, asr_ex,
asl_ex, rol_ex, dec_ex, tim_di, inc_ex, tst_ex, jmp_ex, clr_ex,
suba_im,cmpa_im,sbca_im,subd_im,anda_im,bita_im,lda_im, sta_im,
-eora_im,adca_im,ora_im, adda_im,cpx_im ,bsr, lds_im, sts_im,
+eora_im,adca_im,ora_im, adda_im,cpx_im ,bsr, lds_im, sts_im,
suba_di,cmpa_di,sbca_di,subd_di,anda_di,bita_di,lda_di, sta_di,
eora_di,adca_di,ora_di, adda_di,cpx_di ,jsr_di, lds_di, sts_di,
suba_ix,cmpa_ix,sbca_ix,subd_ix,anda_ix,bita_ix,lda_ix, sta_ix,
@@ -351,29 +351,29 @@ eorb_ex,adcb_ex,orb_ex, addb_ex,ldd_ex, std_ex, ldx_ex, stx_ex
};
static void (*const nsc8105_insn[0x100])(m6800_state *cpustate) = {
-illegal,illegal,nop, illegal,illegal,tap, illegal,tpa,
-inx, clv, dex, sev, clc, cli, sec, sei,
-sba, illegal,cba, illegal,illegal,tab, illegal,tba,
-illegal,illegal,daa, aba, illegal,illegal,illegal,illegal,
-bra, bhi, brn, bls, bcc, bne, bcs, beq,
-bvc, bpl, bvs, bmi, bge, bgt, blt, ble,
-tsx, pula, ins, pulb, des, psha, txs, pshb,
-illegal,illegal,rts, rti, illegal,wai, illegal,swi,
+illegal,illegal,nop, illegal,illegal,tap, illegal,tpa,
+inx, clv, dex, sev, clc, cli, sec, sei,
+sba, illegal,cba, illegal,illegal,tab, illegal,tba,
+illegal,illegal,daa, aba, illegal,illegal,illegal,illegal,
+bra, bhi, brn, bls, bcc, bne, bcs, beq,
+bvc, bpl, bvs, bmi, bge, bgt, blt, ble,
+tsx, pula, ins, pulb, des, psha, txs, pshb,
+illegal,illegal,rts, rti, illegal,wai, illegal,swi,
suba_im,sbca_im,cmpa_im,illegal,anda_im,lda_im, bita_im,sta_im,
-eora_im,ora_im, adca_im,adda_im,cmpx_im,lds_im, bsr, sts_im,
+eora_im,ora_im, adca_im,adda_im,cmpx_im,lds_im, bsr, sts_im,
suba_di,sbca_di,cmpa_di,illegal,anda_di,lda_di, bita_di,sta_di,
eora_di,ora_di, adca_di,adda_di,cmpx_di,lds_di, jsr_di, sts_di,
suba_ix,sbca_ix,cmpa_ix,illegal,anda_ix,lda_ix, bita_ix,sta_ix,
eora_ix,ora_ix, adca_ix,adda_ix,cmpx_ix,lds_ix, jsr_ix, sts_ix,
suba_ex,sbca_ex,cmpa_ex,illegal,anda_ex,lda_ex, bita_ex,sta_ex,
eora_ex,ora_ex, adca_ex,adda_ex,cmpx_ex,lds_ex, jsr_ex, sts_ex,
-nega, illegal,illegal,coma, lsra, rora, illegal,asra,
-asla, deca, rola, illegal,inca, illegal,tsta, clra,
-negb, illegal,illegal,comb, lsrb, rorb, illegal,asrb,
-aslb, decb, rolb, illegal,incb, illegal,tstb, clrb,
-neg_ix, illegal,illegal,com_ix, lsr_ix, ror_ix, illegal,asr_ix,
+nega, illegal,illegal,coma, lsra, rora, illegal,asra,
+asla, deca, rola, illegal,inca, illegal,tsta, clra,
+negb, illegal,illegal,comb, lsrb, rorb, illegal,asrb,
+aslb, decb, rolb, illegal,incb, illegal,tstb, clrb,
+neg_ix, illegal,illegal,com_ix, lsr_ix, ror_ix, illegal,asr_ix,
asl_ix, dec_ix, rol_ix, illegal,inc_ix, jmp_ix, tst_ix, clr_ix,
-neg_ex, illegal,illegal,com_ex, lsr_ex, ror_ex, illegal,asr_ex,
+neg_ex, illegal,illegal,com_ex, lsr_ex, ror_ex, illegal,asr_ex,
asl_ex, dec_ex, rol_ex, illegal,inc_ex, jmp_ex, tst_ex, clr_ex,
subb_im,sbcb_im,cmpb_im,illegal,andb_im,ldb_im, bitb_im,stb_im,
eorb_im,orb_im, adcb_im,addb_im,illegal,ldx_im, illegal,stx_im,
diff --git a/src/emu/cpu/m6800/m6800.c b/src/emu/cpu/m6800/m6800.c
index 1fc105b7081..ffa4a70b5e9 100644
--- a/src/emu/cpu/m6800/m6800.c
+++ b/src/emu/cpu/m6800/m6800.c
@@ -88,7 +88,7 @@ TODO:
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
#if 0
/* CPU subtypes, needed for extra insn after TAP/CLI/SEI */
@@ -109,78 +109,78 @@ enum
struct m6800_state
{
// int subtype; /* CPU subtype */
- PAIR ppc; /* Previous program counter */
- PAIR pc; /* Program counter */
- PAIR s; /* Stack pointer */
- PAIR x; /* Index register */
- PAIR d; /* Accumulators */
- UINT8 cc; /* Condition codes */
- UINT8 wai_state; /* WAI opcode state ,(or sleep opcode state) */
- UINT8 nmi_state; /* NMI line state */
- UINT8 nmi_pending; /* NMI pending */
- UINT8 irq_state[3]; /* IRQ line state [IRQ1,TIN,SC1] */
- UINT8 ic_eddge; /* InputCapture eddge , b.0=fall,b.1=raise */
- int sc1_state;
+ PAIR ppc; /* Previous program counter */
+ PAIR pc; /* Program counter */
+ PAIR s; /* Stack pointer */
+ PAIR x; /* Index register */
+ PAIR d; /* Accumulators */
+ UINT8 cc; /* Condition codes */
+ UINT8 wai_state; /* WAI opcode state ,(or sleep opcode state) */
+ UINT8 nmi_state; /* NMI line state */
+ UINT8 nmi_pending; /* NMI pending */
+ UINT8 irq_state[3]; /* IRQ line state [IRQ1,TIN,SC1] */
+ UINT8 ic_eddge; /* InputCapture eddge , b.0=fall,b.1=raise */
+ int sc1_state;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
/* Memory spaces */
- address_space *program;
- direct_read_data *direct;
- address_space *data;
- address_space *io;
+ address_space *program;
+ direct_read_data *direct;
+ address_space *data;
+ address_space *io;
- void (* const * insn)(m6800_state *); /* instruction table */
- const UINT8 *cycles; /* clock cycle of instruction table */
+ void (* const * insn)(m6800_state *); /* instruction table */
+ const UINT8 *cycles; /* clock cycle of instruction table */
/* internal registers */
- UINT8 port1_ddr;
- UINT8 port2_ddr;
- UINT8 port3_ddr;
- UINT8 port4_ddr;
- UINT8 port1_data;
- UINT8 port2_data;
- UINT8 port3_data;
- UINT8 port4_data;
- UINT8 p3csr; // Port 3 Control/Status Register
- UINT8 tcsr; /* Timer Control and Status Register */
- UINT8 pending_tcsr; /* pending IRQ flag for clear IRQflag process */
- UINT8 irq2; /* IRQ2 flags */
- UINT8 ram_ctrl;
- PAIR counter; /* free running counter */
- PAIR output_compare; /* output compare */
- UINT16 input_capture; /* input capture */
- int p3csr_is3_flag_read;
- int port3_latched;
-
- int clock;
- UINT8 trcsr, rmcr, rdr, tdr, rsr, tsr;
- int rxbits, txbits, txstate, trcsr_read_tdre, trcsr_read_orfe, trcsr_read_rdrf, tx;
- int port2_written;
-
- int icount;
- int latch09;
-
- PAIR timer_over;
+ UINT8 port1_ddr;
+ UINT8 port2_ddr;
+ UINT8 port3_ddr;
+ UINT8 port4_ddr;
+ UINT8 port1_data;
+ UINT8 port2_data;
+ UINT8 port3_data;
+ UINT8 port4_data;
+ UINT8 p3csr; // Port 3 Control/Status Register
+ UINT8 tcsr; /* Timer Control and Status Register */
+ UINT8 pending_tcsr; /* pending IRQ flag for clear IRQflag process */
+ UINT8 irq2; /* IRQ2 flags */
+ UINT8 ram_ctrl;
+ PAIR counter; /* free running counter */
+ PAIR output_compare; /* output compare */
+ UINT16 input_capture; /* input capture */
+ int p3csr_is3_flag_read;
+ int port3_latched;
+
+ int clock;
+ UINT8 trcsr, rmcr, rdr, tdr, rsr, tsr;
+ int rxbits, txbits, txstate, trcsr_read_tdre, trcsr_read_orfe, trcsr_read_rdrf, tx;
+ int port2_written;
+
+ int icount;
+ int latch09;
+
+ PAIR timer_over;
emu_timer *sci_timer;
- PAIR ea; /* effective address */
+ PAIR ea; /* effective address */
- devcb_resolved_write_line out_sc2_func;
+ devcb_resolved_write_line out_sc2_func;
};
INLINE m6800_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M6800 ||
- device->type() == M6801 ||
- device->type() == M6802 ||
- device->type() == M6803 ||
- device->type() == M6808 ||
- device->type() == HD6301 ||
- device->type() == HD63701 ||
- device->type() == NSC8105 ||
- device->type() == HD6303R ||
- device->type() == HD6303Y);
+ device->type() == M6801 ||
+ device->type() == M6802 ||
+ device->type() == M6803 ||
+ device->type() == M6808 ||
+ device->type() == HD6301 ||
+ device->type() == HD63701 ||
+ device->type() == NSC8105 ||
+ device->type() == HD6303R ||
+ device->type() == HD6303Y);
return (m6800_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -188,33 +188,33 @@ INLINE m6800_state *get_safe_token(device_t *device)
static void hd63701_trap_pc(m6800_state *cpustate);
#endif
-#define pPPC cpustate->ppc
-#define pPC cpustate->pc
-#define pS cpustate->s
-#define pX cpustate->x
-#define pD cpustate->d
-
-#define PC cpustate->pc.w.l
-#define PCD cpustate->pc.d
-#define S cpustate->s.w.l
-#define SD cpustate->s.d
-#define X cpustate->x.w.l
-#define D cpustate->d.w.l
-#define A cpustate->d.b.h
-#define B cpustate->d.b.l
-#define CC cpustate->cc
-
-#define CT cpustate->counter.w.l
-#define CTH cpustate->counter.w.h
-#define CTD cpustate->counter.d
-#define OC cpustate->output_compare.w.l
-#define OCH cpustate->output_compare.w.h
-#define OCD cpustate->output_compare.d
-#define TOH cpustate->timer_over.w.l
-#define TOD cpustate->timer_over.d
-
-#define EAD cpustate->ea.d
-#define EA cpustate->ea.w.l
+#define pPPC cpustate->ppc
+#define pPC cpustate->pc
+#define pS cpustate->s
+#define pX cpustate->x
+#define pD cpustate->d
+
+#define PC cpustate->pc.w.l
+#define PCD cpustate->pc.d
+#define S cpustate->s.w.l
+#define SD cpustate->s.d
+#define X cpustate->x.w.l
+#define D cpustate->d.w.l
+#define A cpustate->d.b.h
+#define B cpustate->d.b.l
+#define CC cpustate->cc
+
+#define CT cpustate->counter.w.l
+#define CTH cpustate->counter.w.h
+#define CTD cpustate->counter.d
+#define OC cpustate->output_compare.w.l
+#define OCH cpustate->output_compare.w.h
+#define OCD cpustate->output_compare.d
+#define TOH cpustate->timer_over.w.l
+#define TOD cpustate->timer_over.d
+
+#define EAD cpustate->ea.d
+#define EA cpustate->ea.w.l
/* point of next timer event */
static UINT32 timer_next;
@@ -246,34 +246,34 @@ static UINT32 timer_next;
#define M_RDOP_ARG(Addr) ((unsigned)cpustate->direct->read_raw_byte(Addr))
/* macros to access memory */
-#define IMMBYTE(b) b = M_RDOP_ARG(PCD); PC++
-#define IMMWORD(w) w.d = (M_RDOP_ARG(PCD)<<8) | M_RDOP_ARG((PCD+1)&0xffff); PC+=2
+#define IMMBYTE(b) b = M_RDOP_ARG(PCD); PC++
+#define IMMWORD(w) w.d = (M_RDOP_ARG(PCD)<<8) | M_RDOP_ARG((PCD+1)&0xffff); PC+=2
#define PUSHBYTE(b) WM(SD,b); --S
#define PUSHWORD(w) WM(SD,w.b.l); --S; WM(SD,w.b.h); --S
#define PULLBYTE(b) S++; b = RM(SD)
#define PULLWORD(w) S++; w.d = RM(SD)<<8; S++; w.d |= RM(SD)
-#define MODIFIED_tcsr { \
+#define MODIFIED_tcsr { \
cpustate->irq2 = (cpustate->tcsr&(cpustate->tcsr<<3))&(TCSR_ICF|TCSR_OCF|TCSR_TOF); \
}
-#define SET_TIMER_EVENT { \
- timer_next = (OCD - CTD < TOD - CTD) ? OCD : TOD; \
+#define SET_TIMER_EVENT { \
+ timer_next = (OCD - CTD < TOD - CTD) ? OCD : TOD; \
}
/* cleanup high-word of counters */
-#define CLEANUP_COUNTERS() { \
- OCH -= CTH; \
- TOH -= CTH; \
- CTH = 0; \
- SET_TIMER_EVENT; \
+#define CLEANUP_COUNTERS() { \
+ OCH -= CTH; \
+ TOH -= CTH; \
+ CTH = 0; \
+ SET_TIMER_EVENT; \
}
/* when change freerunningcounter or outputcapture */
-#define MODIFIED_counters { \
- OCH = (OC >= CT) ? CTH : CTH+1; \
- SET_TIMER_EVENT; \
+#define MODIFIED_counters { \
+ OCH = (OC >= CT) ? CTH : CTH+1; \
+ SET_TIMER_EVENT; \
}
// I/O registers
@@ -316,34 +316,34 @@ enum
// serial I/O
-#define M6800_RMCR_SS_MASK 0x03 // Speed Select
-#define M6800_RMCR_SS_4096 0x03 // E / 4096
-#define M6800_RMCR_SS_1024 0x02 // E / 1024
-#define M6800_RMCR_SS_128 0x01 // E / 128
-#define M6800_RMCR_SS_16 0x00 // E / 16
-#define M6800_RMCR_CC_MASK 0x0c // Clock Control/Format Select
-
-#define M6800_TRCSR_RDRF 0x80 // Receive Data Register Full
-#define M6800_TRCSR_ORFE 0x40 // Over Run Framing Error
-#define M6800_TRCSR_TDRE 0x20 // Transmit Data Register Empty
-#define M6800_TRCSR_RIE 0x10 // Receive Interrupt Enable
-#define M6800_TRCSR_RE 0x08 // Receive Enable
-#define M6800_TRCSR_TIE 0x04 // Transmit Interrupt Enable
-#define M6800_TRCSR_TE 0x02 // Transmit Enable
-#define M6800_TRCSR_WU 0x01 // Wake Up
-
-#define M6800_PORT2_IO4 0x10
-#define M6800_PORT2_IO3 0x08
-
-#define M6801_P3CSR_LE 0x08
-#define M6801_P3CSR_OSS 0x10
-#define M6801_P3CSR_IS3_ENABLE 0x40
-#define M6801_P3CSR_IS3_FLAG 0x80
+#define M6800_RMCR_SS_MASK 0x03 // Speed Select
+#define M6800_RMCR_SS_4096 0x03 // E / 4096
+#define M6800_RMCR_SS_1024 0x02 // E / 1024
+#define M6800_RMCR_SS_128 0x01 // E / 128
+#define M6800_RMCR_SS_16 0x00 // E / 16
+#define M6800_RMCR_CC_MASK 0x0c // Clock Control/Format Select
+
+#define M6800_TRCSR_RDRF 0x80 // Receive Data Register Full
+#define M6800_TRCSR_ORFE 0x40 // Over Run Framing Error
+#define M6800_TRCSR_TDRE 0x20 // Transmit Data Register Empty
+#define M6800_TRCSR_RIE 0x10 // Receive Interrupt Enable
+#define M6800_TRCSR_RE 0x08 // Receive Enable
+#define M6800_TRCSR_TIE 0x04 // Transmit Interrupt Enable
+#define M6800_TRCSR_TE 0x02 // Transmit Enable
+#define M6800_TRCSR_WU 0x01 // Wake Up
+
+#define M6800_PORT2_IO4 0x10
+#define M6800_PORT2_IO3 0x08
+
+#define M6801_P3CSR_LE 0x08
+#define M6801_P3CSR_OSS 0x10
+#define M6801_P3CSR_IS3_ENABLE 0x40
+#define M6801_P3CSR_IS3_FLAG 0x80
static const int M6800_RMCR_SS[] = { 16, 128, 1024, 4096 };
-#define M6800_SERIAL_START 0
-#define M6800_SERIAL_STOP 9
+#define M6800_SERIAL_START 0
+#define M6800_SERIAL_STOP 9
enum
{
@@ -359,40 +359,40 @@ enum
#define TAKE_TRAP enter_interrupt(cpustate, "M6800 '%s' take TRAP\n",0xffee)
/* operate one instruction for */
-#define ONE_MORE_INSN() { \
- UINT8 ireg; \
- pPPC = pPC; \
- debugger_instruction_hook(cpustate->device, PCD); \
- ireg=M_RDOP(PCD); \
- PC++; \
- (*cpustate->insn[ireg])(cpustate); \
- increment_counter(cpustate, cpustate->cycles[ireg]); \
+#define ONE_MORE_INSN() { \
+ UINT8 ireg; \
+ pPPC = pPC; \
+ debugger_instruction_hook(cpustate->device, PCD); \
+ ireg=M_RDOP(PCD); \
+ PC++; \
+ (*cpustate->insn[ireg])(cpustate); \
+ increment_counter(cpustate, cpustate->cycles[ireg]); \
}
/* CC masks HI NZVC
7654 3210 */
-#define CLR_HNZVC CC&=0xd0
-#define CLR_NZV CC&=0xf1
-#define CLR_HNZC CC&=0xd2
-#define CLR_NZVC CC&=0xf0
-#define CLR_Z CC&=0xfb
-#define CLR_NZC CC&=0xf2
-#define CLR_ZC CC&=0xfa
-#define CLR_C CC&=0xfe
+#define CLR_HNZVC CC&=0xd0
+#define CLR_NZV CC&=0xf1
+#define CLR_HNZC CC&=0xd2
+#define CLR_NZVC CC&=0xf0
+#define CLR_Z CC&=0xfb
+#define CLR_NZC CC&=0xf2
+#define CLR_ZC CC&=0xfa
+#define CLR_C CC&=0xfe
/* macros for CC -- CC bits affected should be reset before calling */
-#define SET_Z(a) if(!(a))SEZ
-#define SET_Z8(a) SET_Z((UINT8)(a))
-#define SET_Z16(a) SET_Z((UINT16)(a))
-#define SET_N8(a) CC|=(((a)&0x80)>>4)
-#define SET_N16(a) CC|=(((a)&0x8000)>>12)
-#define SET_H(a,b,r) CC|=((((a)^(b)^(r))&0x10)<<1)
-#define SET_C8(a) CC|=(((a)&0x100)>>8)
-#define SET_C16(a) CC|=(((a)&0x10000)>>16)
-#define SET_V8(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x80)>>6)
-#define SET_V16(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x8000)>>14)
-
-static const UINT8 flags8i[256]= /* increment */
+#define SET_Z(a) if(!(a))SEZ
+#define SET_Z8(a) SET_Z((UINT8)(a))
+#define SET_Z16(a) SET_Z((UINT16)(a))
+#define SET_N8(a) CC|=(((a)&0x80)>>4)
+#define SET_N16(a) CC|=(((a)&0x8000)>>12)
+#define SET_H(a,b,r) CC|=((((a)^(b)^(r))&0x10)<<1)
+#define SET_C8(a) CC|=(((a)&0x100)>>8)
+#define SET_C16(a) CC|=(((a)&0x10000)>>16)
+#define SET_V8(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x80)>>6)
+#define SET_V16(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x8000)>>14)
+
+static const UINT8 flags8i[256]= /* increment */
{
0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -430,14 +430,14 @@ static const UINT8 flags8d[256]= /* decrement */
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08
};
-#define SET_FLAGS8I(a) {CC|=flags8i[(a)&0xff];}
-#define SET_FLAGS8D(a) {CC|=flags8d[(a)&0xff];}
+#define SET_FLAGS8I(a) {CC|=flags8i[(a)&0xff];}
+#define SET_FLAGS8D(a) {CC|=flags8d[(a)&0xff];}
/* combos */
-#define SET_NZ8(a) {SET_N8(a);SET_Z8(a);}
-#define SET_NZ16(a) {SET_N16(a);SET_Z16(a);}
-#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
-#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
+#define SET_NZ8(a) {SET_N8(a);SET_Z8(a);}
+#define SET_NZ16(a) {SET_N16(a);SET_Z16(a);}
+#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
+#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
/* for treating an UINT8 as a signed INT16 */
#define SIGNED(b) ((INT16)(b&0x80?b|0xff00:b))
@@ -489,8 +489,8 @@ static const UINT8 flags8d[256]= /* decrement */
#define BRANCH(f) {IMMBYTE(t);if(f){PC+=SIGNED(t);}}
#define NXORV ((CC&0x08)^((CC&0x02)<<2))
-#define M6800_WAI 8 /* set when WAI is waiting for an interrupt */
-#define M6800_SLP 0x10 /* HD63701 only */
+#define M6800_WAI 8 /* set when WAI is waiting for an interrupt */
+#define M6800_SLP 0x10 /* HD63701 only */
/* Note: don't use 0 cycles here for invalid opcodes so that we don't */
/* hang in an infinite loop if we hit one */
@@ -580,16 +580,16 @@ static const UINT8 cycles_nsc8105[] =
};
#undef XX // /invalid opcode unknown cc
-#define EAT_CYCLES \
-{ \
- int cycles_to_eat; \
+#define EAT_CYCLES \
+{ \
+ int cycles_to_eat; \
\
- cycles_to_eat = timer_next - CTD; \
- if( cycles_to_eat > cpustate->icount) cycles_to_eat = cpustate->icount; \
- if (cycles_to_eat > 0) \
- { \
- increment_counter(cpustate, cycles_to_eat); \
- } \
+ cycles_to_eat = timer_next - CTD; \
+ if( cycles_to_eat > cpustate->icount) cycles_to_eat = cpustate->icount; \
+ if (cycles_to_eat > 0) \
+ { \
+ increment_counter(cpustate, cycles_to_eat); \
+ } \
}
INLINE UINT32 RM16(m6800_state *cpustate, UINT32 Addr )
@@ -646,8 +646,8 @@ static void m6800_check_irq2(m6800_state *cpustate)
TAKE_TOI;
}
else if (((cpustate->trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) == (M6800_TRCSR_RIE|M6800_TRCSR_RDRF)) ||
- ((cpustate->trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) == (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) ||
- ((cpustate->trcsr & (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)) == (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)))
+ ((cpustate->trcsr & (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) == (M6800_TRCSR_RIE|M6800_TRCSR_ORFE)) ||
+ ((cpustate->trcsr & (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)) == (M6800_TRCSR_TIE|M6800_TRCSR_TDRE)))
{
//logerror("M6800 '%s' SCI interrupt\n", cpustate->device->tag());
TAKE_SCI;
@@ -671,7 +671,7 @@ INLINE void CHECK_IRQ_LINES(m6800_state *cpustate)
else
{
if( cpustate->irq_state[M6800_IRQ_LINE] != CLEAR_LINE )
- { /* standard IRQ */
+ { /* standard IRQ */
if(cpustate->wai_state & M6800_SLP)
cpustate->wai_state &= ~M6800_SLP;
@@ -694,7 +694,7 @@ static void check_timer_event(m6800_state *cpustate)
/* OCI */
if( CTD >= OCD)
{
- OCH++; // next IRQ point
+ OCH++; // next IRQ point
cpustate->tcsr |= TCSR_OCF;
cpustate->pending_tcsr |= TCSR_OCF;
MODIFIED_tcsr;
@@ -706,7 +706,7 @@ static void check_timer_event(m6800_state *cpustate)
/* TOI */
if( CTD >= TOD)
{
- TOH++; // next IRQ point
+ TOH++; // next IRQ point
#if 0
CLEANUP_COUNTERS();
#endif
@@ -763,7 +763,7 @@ INLINE void write_port2(m6800_state *cpustate)
if ((ddr != 0x1f) && ddr)
{
- data = (cpustate->port2_data & ddr) | (ddr ^ 0xff);
+ data = (cpustate->port2_data & ddr) | (ddr ^ 0xff);
}
if (cpustate->trcsr & M6800_TRCSR_TE)
@@ -981,7 +981,7 @@ static void serial_receive(m6800_state *cpustate)
static TIMER_CALLBACK( sci_tick )
{
- m6800_state *cpustate = (m6800_state *)ptr;
+ m6800_state *cpustate = (m6800_state *)ptr;
serial_transmit(cpustate);
serial_receive(cpustate);
@@ -1064,7 +1064,7 @@ static CPU_RESET( m6800 )
m6800_state *cpustate = get_safe_token(device);
cpustate->cc = 0xc0;
- SEI; /* IRQ disabled */
+ SEI; /* IRQ disabled */
PCD = RM16(cpustate, 0xfffe );
cpustate->wai_state = 0;
@@ -1732,13 +1732,13 @@ WRITE8_HANDLER( m6801_io_w )
case IO_CH:
//logerror("M6801 '%s' Counter High Register: %02x\n", space.device().tag(), data);
- cpustate->latch09 = data & 0xff; /* 6301 only */
+ cpustate->latch09 = data & 0xff; /* 6301 only */
CT = 0xfff8;
TOH = CTH;
MODIFIED_counters;
break;
- case IO_CL: /* 6301 only */
+ case IO_CL: /* 6301 only */
//logerror("M6801 '%s' Counter Low Register: %02x\n", space.device().tag(), data);
CT = (cpustate->latch09 << 8) | (data & 0xff);
@@ -1848,19 +1848,19 @@ static CPU_SET_INFO( m6800 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: set_irq_line(cpustate, M6800_IRQ_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + M6801_TIN_LINE: set_irq_line(cpustate, M6801_TIN_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + M6801_SC1_LINE: set_irq_line(cpustate, M6801_SC1_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
-
- case CPUINFO_INT_PC: PC = info->i; break;
- case CPUINFO_INT_REGISTER + M6800_PC: cpustate->pc.w.l = info->i; break;
- case CPUINFO_INT_SP: S = info->i; break;
- case CPUINFO_INT_REGISTER + M6800_S: cpustate->s.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + M6800_CC: cpustate->cc = info->i; break;
- case CPUINFO_INT_REGISTER + M6800_A: cpustate->d.b.h = info->i; break;
- case CPUINFO_INT_REGISTER + M6800_B: cpustate->d.b.l = info->i; break;
- case CPUINFO_INT_REGISTER + M6800_X: cpustate->x.w.l = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: set_irq_line(cpustate, M6800_IRQ_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + M6801_TIN_LINE: set_irq_line(cpustate, M6801_TIN_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + M6801_SC1_LINE: set_irq_line(cpustate, M6801_SC1_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+
+ case CPUINFO_INT_PC: PC = info->i; break;
+ case CPUINFO_INT_REGISTER + M6800_PC: cpustate->pc.w.l = info->i; break;
+ case CPUINFO_INT_SP: S = info->i; break;
+ case CPUINFO_INT_REGISTER + M6800_S: cpustate->s.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + M6800_CC: cpustate->cc = info->i; break;
+ case CPUINFO_INT_REGISTER + M6800_A: cpustate->d.b.h = info->i; break;
+ case CPUINFO_INT_REGISTER + M6800_B: cpustate->d.b.l = info->i; break;
+ case CPUINFO_INT_REGISTER + M6800_X: cpustate->x.w.l = info->i; break;
}
}
@@ -1876,60 +1876,60 @@ CPU_GET_INFO( m6800 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6800_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 12; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = cpustate->irq_state[M6800_IRQ_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + M6801_TIN_LINE: info->i = cpustate->irq_state[M6801_TIN_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + M6801_SC1_LINE: info->i = cpustate->irq_state[M6801_SC1_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break;
-
- case CPUINFO_INT_PC: info->i = PC; break;
- case CPUINFO_INT_REGISTER + M6800_PC: info->i = cpustate->pc.w.l; break;
- case CPUINFO_INT_SP: info->i = S; break;
- case CPUINFO_INT_REGISTER + M6800_S: info->i = cpustate->s.w.l; break;
- case CPUINFO_INT_REGISTER + M6800_CC: info->i = cpustate->cc; break;
- case CPUINFO_INT_REGISTER + M6800_A: info->i = cpustate->d.b.h; break;
- case CPUINFO_INT_REGISTER + M6800_B: info->i = cpustate->d.b.l; break;
- case CPUINFO_INT_REGISTER + M6800_X: info->i = cpustate->x.w.l; break;
- case CPUINFO_INT_REGISTER + M6800_WAI_STATE: info->i = cpustate->wai_state; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m6800_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 12; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + M6800_IRQ_LINE: info->i = cpustate->irq_state[M6800_IRQ_LINE]; break;
+ case CPUINFO_INT_INPUT_STATE + M6801_TIN_LINE: info->i = cpustate->irq_state[M6801_TIN_LINE]; break;
+ case CPUINFO_INT_INPUT_STATE + M6801_SC1_LINE: info->i = cpustate->irq_state[M6801_SC1_LINE]; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break;
+
+ case CPUINFO_INT_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + M6800_PC: info->i = cpustate->pc.w.l; break;
+ case CPUINFO_INT_SP: info->i = S; break;
+ case CPUINFO_INT_REGISTER + M6800_S: info->i = cpustate->s.w.l; break;
+ case CPUINFO_INT_REGISTER + M6800_CC: info->i = cpustate->cc; break;
+ case CPUINFO_INT_REGISTER + M6800_A: info->i = cpustate->d.b.h; break;
+ case CPUINFO_INT_REGISTER + M6800_B: info->i = cpustate->d.b.l; break;
+ case CPUINFO_INT_REGISTER + M6800_X: info->i = cpustate->x.w.l; break;
+ case CPUINFO_INT_REGISTER + M6800_WAI_STATE: info->i = cpustate->wai_state; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6800); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6800); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(m6800); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(m6800); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6800); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6800); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m6800); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6800); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(m6800); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(m6800); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(m6800); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6800); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "M6800"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola 6800"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "The MAME team."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "M6800"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola 6800"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "The MAME team."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -1943,13 +1943,13 @@ CPU_GET_INFO( m6800 )
cpustate->cc & 0x01 ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + M6800_A: sprintf(info->s, "A:%02X", cpustate->d.b.h); break;
- case CPUINFO_STR_REGISTER + M6800_B: sprintf(info->s, "B:%02X", cpustate->d.b.l); break;
- case CPUINFO_STR_REGISTER + M6800_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
- case CPUINFO_STR_REGISTER + M6800_S: sprintf(info->s, "S:%04X", cpustate->s.w.l); break;
- case CPUINFO_STR_REGISTER + M6800_X: sprintf(info->s, "X:%04X", cpustate->x.w.l); break;
- case CPUINFO_STR_REGISTER + M6800_CC: sprintf(info->s, "CC:%02X", cpustate->cc); break;
- case CPUINFO_STR_REGISTER + M6800_WAI_STATE: sprintf(info->s, "WAI:%X", cpustate->wai_state); break;
+ case CPUINFO_STR_REGISTER + M6800_A: sprintf(info->s, "A:%02X", cpustate->d.b.h); break;
+ case CPUINFO_STR_REGISTER + M6800_B: sprintf(info->s, "B:%02X", cpustate->d.b.l); break;
+ case CPUINFO_STR_REGISTER + M6800_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
+ case CPUINFO_STR_REGISTER + M6800_S: sprintf(info->s, "S:%04X", cpustate->s.w.l); break;
+ case CPUINFO_STR_REGISTER + M6800_X: sprintf(info->s, "X:%04X", cpustate->x.w.l); break;
+ case CPUINFO_STR_REGISTER + M6800_CC: sprintf(info->s, "CC:%02X", cpustate->cc); break;
+ case CPUINFO_STR_REGISTER + M6800_WAI_STATE: sprintf(info->s, "WAI:%X", cpustate->wai_state); break;
}
}
@@ -1963,18 +1963,18 @@ CPU_GET_INFO( m6801 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6801); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6801); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6801); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6801); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "M6801"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "M6801"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -1988,16 +1988,16 @@ CPU_GET_INFO( m6802 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6802); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6802); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6802); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6802); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "M6802"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "M6802"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2011,20 +2011,20 @@ CPU_GET_INFO( m6803 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6803); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6803); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6803); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6803); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(m6803_mem); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "M6803"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "M6803"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2038,16 +2038,16 @@ CPU_GET_INFO( m6808 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6808); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6808); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m6808); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m6808); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "M6808"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "M6808"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2061,18 +2061,18 @@ CPU_GET_INFO( hd6301 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6301); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6301); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6301); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6301); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "HD6301"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "HD6301"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2086,18 +2086,18 @@ CPU_GET_INFO( hd6303r )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6301); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6301); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6301); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6301); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "HD6303R"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "HD6303R"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2112,18 +2112,18 @@ CPU_GET_INFO( hd6303y )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6301); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6301); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd6301); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd6301); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "HD6303Y"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "HD6303Y"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2136,18 +2136,18 @@ CPU_GET_INFO( hd63701 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd63701); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd63701); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hd63701); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hd63701); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "HD63701"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "HD63701"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2161,16 +2161,16 @@ CPU_GET_INFO( nsc8105 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(nsc8105); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(nsc8105); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(nsc8105); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(nsc8105); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "NSC8105"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "NSC8105"); break;
- default: CPU_GET_INFO_CALL(m6800); break;
+ default: CPU_GET_INFO_CALL(m6800); break;
}
}
@@ -2193,6 +2193,3 @@ DEFINE_LEGACY_CPU_DEVICE(HD6303R, hd6303r);
// FP-64A package: HD6303YH, HD63A03YH, HD63B03YH, HD63C03YH
// CP-68 package: HD6303YCP, HD63A03YCP, HD63B03YCP, HD63C03YCP
DEFINE_LEGACY_CPU_DEVICE(HD6303Y, hd6303y);
-
-
-
diff --git a/src/emu/cpu/m6800/m6800.h b/src/emu/cpu/m6800/m6800.h
index eb8deb8840f..e4473983907 100644
--- a/src/emu/cpu/m6800/m6800.h
+++ b/src/emu/cpu/m6800/m6800.h
@@ -8,7 +8,7 @@
struct m6801_interface
{
- devcb_write_line out_sc2_func;
+ devcb_write_line out_sc2_func;
};
#define M6801_INTERFACE(name) const m6801_interface (name) =
@@ -21,8 +21,8 @@ enum
enum
{
- M6800_IRQ_LINE = 0, /* IRQ line number */
- M6801_TIN_LINE, /* P20/Tin Input Capture line (eddge sense) */
+ M6800_IRQ_LINE = 0, /* IRQ line number */
+ M6801_TIN_LINE, /* P20/Tin Input Capture line (eddge sense) */
/* Active eddge is selecrable by internal reg. */
/* raise eddge : CLEAR_LINE -> ASSERT_LINE */
/* fall eddge : ASSERT_LINE -> CLEAR_LINE */
@@ -76,4 +76,3 @@ CPU_DISASSEMBLE( hd63701 );
CPU_DISASSEMBLE( nsc8105 );
#endif /* __M6800_H__ */
-
diff --git a/src/emu/cpu/m68000/68307bus.h b/src/emu/cpu/m68000/68307bus.h
index 7a0bdb43e0f..3b15c0e1bb1 100644
--- a/src/emu/cpu/m68000/68307bus.h
+++ b/src/emu/cpu/m68000/68307bus.h
@@ -18,4 +18,3 @@ class m68307_mbus
void reset(void);
};
-
diff --git a/src/emu/cpu/m68000/68307ser.c b/src/emu/cpu/m68000/68307ser.c
index ef4279fd398..50b552bc543 100644
--- a/src/emu/cpu/m68000/68307ser.c
+++ b/src/emu/cpu/m68000/68307ser.c
@@ -172,4 +172,3 @@ void m68307_serial::reset(void)
{
}
-
diff --git a/src/emu/cpu/m68000/68307ser.h b/src/emu/cpu/m68000/68307ser.h
index 9467676a5a7..b1eddc37816 100644
--- a/src/emu/cpu/m68000/68307ser.h
+++ b/src/emu/cpu/m68000/68307ser.h
@@ -34,4 +34,3 @@ class m68307_serial
device_t* m_duart68681;
};
-
diff --git a/src/emu/cpu/m68000/68307sim.c b/src/emu/cpu/m68000/68307sim.c
index a53a7e21a1e..e7a2c6ee15e 100644
--- a/src/emu/cpu/m68000/68307sim.c
+++ b/src/emu/cpu/m68000/68307sim.c
@@ -21,14 +21,14 @@ READ16_HANDLER( m68307_internal_sim_r )
case m68307SIM_LICR2: return (sim->m_licr2);
- case m68307SIM_BR0: return (sim->m_br[0]);
- case m68307SIM_OR0: return (sim->m_or[0]);
- case m68307SIM_BR1: return (sim->m_br[1]);
- case m68307SIM_OR1: return (sim->m_or[1]);
- case m68307SIM_BR2: return (sim->m_br[2]);
- case m68307SIM_OR2: return (sim->m_or[2]);
- case m68307SIM_BR3: return (sim->m_br[3]);
- case m68307SIM_OR3: return (sim->m_or[3]);
+ case m68307SIM_BR0: return (sim->m_br[0]);
+ case m68307SIM_OR0: return (sim->m_or[0]);
+ case m68307SIM_BR1: return (sim->m_br[1]);
+ case m68307SIM_OR1: return (sim->m_or[1]);
+ case m68307SIM_BR2: return (sim->m_br[2]);
+ case m68307SIM_OR2: return (sim->m_or[2]);
+ case m68307SIM_BR3: return (sim->m_br[3]);
+ case m68307SIM_OR3: return (sim->m_or[3]);
default:
logerror("%08x m68307_internal_sim_r %08x, (%04x)\n", pc, offset*2,mem_mask);
diff --git a/src/emu/cpu/m68000/68307tmu.c b/src/emu/cpu/m68000/68307tmu.c
index bf1916a4566..23aebd6714d 100644
--- a/src/emu/cpu/m68000/68307tmu.c
+++ b/src/emu/cpu/m68000/68307tmu.c
@@ -242,4 +242,3 @@ void m68307_timer::reset(void)
}
-
diff --git a/src/emu/cpu/m68000/68307tmu.h b/src/emu/cpu/m68000/68307tmu.h
index 5515965d1b5..2bfd98433b7 100644
--- a/src/emu/cpu/m68000/68307tmu.h
+++ b/src/emu/cpu/m68000/68307tmu.h
@@ -35,4 +35,3 @@ class m68307_timer
void init(legacy_cpu_device *device);
void reset(void);
};
-
diff --git a/src/emu/cpu/m68000/68340dma.h b/src/emu/cpu/m68000/68340dma.h
index d9e5033cb06..f001098ad9e 100644
--- a/src/emu/cpu/m68000/68340dma.h
+++ b/src/emu/cpu/m68000/68340dma.h
@@ -7,4 +7,3 @@ class m68340_dma
public:
void reset(void);
};
-
diff --git a/src/emu/cpu/m68000/68340ser.h b/src/emu/cpu/m68000/68340ser.h
index 3d21cee9679..fcfdaa19001 100644
--- a/src/emu/cpu/m68000/68340ser.h
+++ b/src/emu/cpu/m68000/68340ser.h
@@ -7,4 +7,3 @@ class m68340_serial
public:
void reset(void);
};
-
diff --git a/src/emu/cpu/m68000/68340sim.c b/src/emu/cpu/m68000/68340sim.c
index c407ca9baeb..dbe530da08a 100644
--- a/src/emu/cpu/m68000/68340sim.c
+++ b/src/emu/cpu/m68000/68340sim.c
@@ -123,14 +123,14 @@ READ32_HANDLER( m68340_internal_sim_cs_r )
switch (offset<<2)
{
- case m68340SIM_AM_CS0: return sim->m_am[0];
- case m68340SIM_BA_CS0: return sim->m_ba[0];
- case m68340SIM_AM_CS1: return sim->m_am[1];
- case m68340SIM_BA_CS1: return sim->m_ba[1];
- case m68340SIM_AM_CS2: return sim->m_am[2];
- case m68340SIM_BA_CS2: return sim->m_ba[2];
- case m68340SIM_AM_CS3: return sim->m_am[3];
- case m68340SIM_BA_CS3: return sim->m_ba[3];
+ case m68340SIM_AM_CS0: return sim->m_am[0];
+ case m68340SIM_BA_CS0: return sim->m_ba[0];
+ case m68340SIM_AM_CS1: return sim->m_am[1];
+ case m68340SIM_BA_CS1: return sim->m_ba[1];
+ case m68340SIM_AM_CS2: return sim->m_am[2];
+ case m68340SIM_BA_CS2: return sim->m_ba[2];
+ case m68340SIM_AM_CS3: return sim->m_am[3];
+ case m68340SIM_BA_CS3: return sim->m_ba[3];
default:
logerror("%08x m68340_internal_sim_r %08x, (%08x)\n", pc, offset*4,mem_mask);
diff --git a/src/emu/cpu/m68000/68340sim.h b/src/emu/cpu/m68000/68340sim.h
index 76fc7b95a67..02e93dd9281 100644
--- a/src/emu/cpu/m68000/68340sim.h
+++ b/src/emu/cpu/m68000/68340sim.h
@@ -61,4 +61,3 @@ class m68340_sim
void reset(void);
};
-
diff --git a/src/emu/cpu/m68000/68340tmu.h b/src/emu/cpu/m68000/68340tmu.h
index 2a8e9fb9759..a6188176890 100644
--- a/src/emu/cpu/m68000/68340tmu.h
+++ b/src/emu/cpu/m68000/68340tmu.h
@@ -7,4 +7,3 @@ class m68340_timer
public:
void reset(void);
};
-
diff --git a/src/emu/cpu/m68000/m68000.h b/src/emu/cpu/m68000/m68000.h
index 8f6a6e577f3..e177ac507f8 100644
--- a/src/emu/cpu/m68000/m68000.h
+++ b/src/emu/cpu/m68000/m68000.h
@@ -45,7 +45,7 @@ enum
M68K_CPU_TYPE_68040,
M68K_CPU_TYPE_SCC68070,
M68K_CPU_TYPE_68340,
- M68K_CPU_TYPE_COLDFIRE
+ M68K_CPU_TYPE_COLDFIRE
};
// function codes
@@ -59,9 +59,9 @@ enum
};
/* HMMU enable types for use with m68k_set_hmmu_enable() */
-#define M68K_HMMU_DISABLE 0 /* no translation */
-#define M68K_HMMU_ENABLE_II 1 /* Mac II style fixed translation */
-#define M68K_HMMU_ENABLE_LC 2 /* Mac LC style fixed translation */
+#define M68K_HMMU_DISABLE 0 /* no translation */
+#define M68K_HMMU_ENABLE_II 1 /* Mac II style fixed translation */
+#define M68K_HMMU_ENABLE_LC 2 /* Mac LC style fixed translation */
/* Special interrupt acknowledge values.
* Use these as special returns from the interrupt acknowledge callback
diff --git a/src/emu/cpu/m68000/m68k_in.c b/src/emu/cpu/m68000/m68k_in.c
index 9144143b6b0..021906eb4fa 100644
--- a/src/emu/cpu/m68000/m68k_in.c
+++ b/src/emu/cpu/m68000/m68k_in.c
@@ -361,7 +361,7 @@ cpu cycles: Base number of cycles required to execute this opcode on the
*/
- spec spec allowed ea mode 3 C cpu cycles
+ spec spec allowed ea mode 3 C cpu cycles
name size proc ea bit pattern A+-DXWLdxI 0 1 2 3 4 2 F 000 010 020 030 040 340 CLF comments
====== ==== ==== ==== ================ ========== = = = = = = = === === === === === === === ==========
M68KMAKE_TABLE_START
@@ -1843,7 +1843,7 @@ M68KMAKE_OP(andi, 16, tos, .)
if((mc68kcpu)->s_flag)
{
UINT32 src = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) & src);
return;
}
@@ -2282,7 +2282,7 @@ M68KMAKE_OP(bcc, 8, ., .)
{
if(M68KMAKE_CC)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
return;
}
@@ -2296,7 +2296,7 @@ M68KMAKE_OP(bcc, 16, ., .)
{
UINT32 offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
return;
}
@@ -2313,7 +2313,7 @@ M68KMAKE_OP(bcc, 32, ., .)
{
UINT32 offset = OPER_I_32(mc68kcpu);
REG_PC(mc68kcpu) -= 4;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32((mc68kcpu), offset);
return;
}
@@ -2324,7 +2324,7 @@ M68KMAKE_OP(bcc, 32, ., .)
{
if(M68KMAKE_CC)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
return;
}
@@ -3167,7 +3167,7 @@ M68KMAKE_OP(bkpt, 0, ., .)
M68KMAKE_OP(bra, 8, ., .)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
(mc68kcpu)->remaining_cycles = 0;
@@ -3178,7 +3178,7 @@ M68KMAKE_OP(bra, 16, ., .)
{
UINT32 offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
(mc68kcpu)->remaining_cycles = 0;
@@ -3191,7 +3191,7 @@ M68KMAKE_OP(bra, 32, ., .)
{
UINT32 offset = OPER_I_32(mc68kcpu);
REG_PC(mc68kcpu) -= 4;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32((mc68kcpu), offset);
if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
(mc68kcpu)->remaining_cycles = 0;
@@ -3199,7 +3199,7 @@ M68KMAKE_OP(bra, 32, ., .)
}
else
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
(mc68kcpu)->remaining_cycles = 0;
@@ -3251,7 +3251,7 @@ M68KMAKE_OP(bset, 8, s, .)
M68KMAKE_OP(bsr, 8, ., .)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
}
@@ -3260,7 +3260,7 @@ M68KMAKE_OP(bsr, 8, ., .)
M68KMAKE_OP(bsr, 16, ., .)
{
UINT32 offset = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
REG_PC(mc68kcpu) -= 2;
m68ki_branch_16((mc68kcpu), offset);
@@ -3272,7 +3272,7 @@ M68KMAKE_OP(bsr, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
UINT32 offset = OPER_I_32(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
REG_PC(mc68kcpu) -= 4;
m68ki_branch_32((mc68kcpu), offset);
@@ -3280,7 +3280,7 @@ M68KMAKE_OP(bsr, 32, ., .)
}
else
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
m68ki_branch_8((mc68kcpu), MASK_OUT_ABOVE_8((mc68kcpu)->ir));
}
@@ -3320,11 +3320,11 @@ M68KMAKE_OP(callm, 32, ., .)
{
UINT32 ea = M68KMAKE_GET_EA_AY_32;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
REG_PC(mc68kcpu) += 2;
-(void)ea; /* just to avoid an 'unused variable' warning */
+(void)ea; /* just to avoid an 'unused variable' warning */
logerror("%s at %08x: called unimplemented instruction %04x (callm)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_illegal(mc68kcpu);
@@ -3341,7 +3341,7 @@ M68KMAKE_OP(cas, 8, ., .)
UINT32* compare = &REG_D(mc68kcpu)[word2 & 7];
UINT32 res = dest - MASK_OUT_ABOVE_8(*compare);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_8(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_8(res);
(mc68kcpu)->v_flag = VFLAG_SUB_8(*compare, dest, res);
@@ -3370,7 +3370,7 @@ M68KMAKE_OP(cas, 16, ., .)
UINT32* compare = &REG_D(mc68kcpu)[word2 & 7];
UINT32 res = dest - MASK_OUT_ABOVE_16(*compare);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_16(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res);
(mc68kcpu)->v_flag = VFLAG_SUB_16(*compare, dest, res);
@@ -3399,7 +3399,7 @@ M68KMAKE_OP(cas, 32, ., .)
UINT32* compare = &REG_D(mc68kcpu)[word2 & 7];
UINT32 res = dest - *compare;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_32(res);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res);
(mc68kcpu)->v_flag = VFLAG_SUB_32(*compare, dest, res);
@@ -3432,7 +3432,7 @@ M68KMAKE_OP(cas2, 16, ., .)
UINT32 dest2 = m68ki_read_16((mc68kcpu), ea2);
UINT32 res2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_16(res1);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_16(res1);
(mc68kcpu)->v_flag = VFLAG_SUB_16(*compare1, dest1, res1);
@@ -3477,7 +3477,7 @@ M68KMAKE_OP(cas2, 32, ., .)
UINT32 dest2 = m68ki_read_32((mc68kcpu), ea2);
UINT32 res2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->n_flag = NFLAG_32(res1);
(mc68kcpu)->not_z_flag = MASK_OUT_ABOVE_32(res1);
(mc68kcpu)->v_flag = VFLAG_SUB_32(*compare1, dest1, res1);
@@ -4402,7 +4402,7 @@ M68KMAKE_OP(cpbcc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
logerror("%s at %08x: called unimplemented instruction %04x (cpbcc)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_1111(mc68kcpu);
@@ -4414,7 +4414,7 @@ M68KMAKE_OP(cpdbcc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
logerror("%s at %08x: called unimplemented instruction %04x (cpdbcc)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_1111(mc68kcpu);
@@ -4426,7 +4426,7 @@ M68KMAKE_OP(cpgen, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type) && (mc68kcpu->has_fpu || mc68kcpu->has_pmmu))
{
logerror("%s at %08x: called unimplemented instruction %04x (cpgen)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_1111(mc68kcpu);
@@ -4438,7 +4438,7 @@ M68KMAKE_OP(cpscc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
logerror("%s at %08x: called unimplemented instruction %04x (cpscc)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_1111(mc68kcpu);
@@ -4450,7 +4450,7 @@ M68KMAKE_OP(cptrapcc, 32, ., .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
logerror("%s at %08x: called unimplemented instruction %04x (cptrapcc)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_1111(mc68kcpu);
@@ -4472,7 +4472,7 @@ M68KMAKE_OP(dbf, 16, ., .)
{
UINT32 offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
(mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp;
return;
@@ -4494,7 +4494,7 @@ M68KMAKE_OP(dbcc, 16, ., .)
{
UINT32 offset = OPER_I_16(mc68kcpu);
REG_PC(mc68kcpu) -= 2;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16((mc68kcpu), offset);
(mc68kcpu)->remaining_cycles -= (mc68kcpu)->cyc_dbcc_f_noexp;
return;
@@ -4647,13 +4647,13 @@ M68KMAKE_OP(divl, 32, ., d)
if(divisor != 0)
{
- if(BIT_A(word2)) /* 64 bit */
+ if(BIT_A(word2)) /* 64 bit */
{
dividend = REG_D(mc68kcpu)[word2 & 7];
dividend <<= 32;
dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7];
- if(BIT_B(word2)) /* signed */
+ if(BIT_B(word2)) /* signed */
{
quotient = (UINT64)((INT64)dividend / (INT64)((INT32)divisor));
remainder = (UINT64)((INT64)dividend % (INT64)((INT32)divisor));
@@ -4663,7 +4663,7 @@ M68KMAKE_OP(divl, 32, ., d)
return;
}
}
- else /* unsigned */
+ else /* unsigned */
{
quotient = dividend / divisor;
if(quotient > 0xffffffff)
@@ -4674,15 +4674,15 @@ M68KMAKE_OP(divl, 32, ., d)
remainder = dividend % divisor;
}
}
- else /* 32 bit */
+ else /* 32 bit */
{
dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7];
- if(BIT_B(word2)) /* signed */
+ if(BIT_B(word2)) /* signed */
{
quotient = (UINT64)((INT64)((INT32)dividend) / (INT64)((INT32)divisor));
remainder = (UINT64)((INT64)((INT32)dividend) % (INT64)((INT32)divisor));
}
- else /* unsigned */
+ else /* unsigned */
{
quotient = dividend / divisor;
remainder = dividend % divisor;
@@ -4717,13 +4717,13 @@ M68KMAKE_OP(divl, 32, ., .)
if(divisor != 0)
{
- if(BIT_A(word2)) /* 64 bit */
+ if(BIT_A(word2)) /* 64 bit */
{
dividend = REG_D(mc68kcpu)[word2 & 7];
dividend <<= 32;
dividend |= REG_D(mc68kcpu)[(word2 >> 12) & 7];
- if(BIT_B(word2)) /* signed */
+ if(BIT_B(word2)) /* signed */
{
quotient = (UINT64)((INT64)dividend / (INT64)((INT32)divisor));
remainder = (UINT64)((INT64)dividend % (INT64)((INT32)divisor));
@@ -4733,7 +4733,7 @@ M68KMAKE_OP(divl, 32, ., .)
return;
}
}
- else /* unsigned */
+ else /* unsigned */
{
quotient = dividend / divisor;
if(quotient > 0xffffffff)
@@ -4744,15 +4744,15 @@ M68KMAKE_OP(divl, 32, ., .)
remainder = dividend % divisor;
}
}
- else /* 32 bit */
+ else /* 32 bit */
{
dividend = REG_D(mc68kcpu)[(word2 >> 12) & 7];
- if(BIT_B(word2)) /* signed */
+ if(BIT_B(word2)) /* signed */
{
quotient = (UINT64)((INT64)((INT32)dividend) / (INT64)((INT32)divisor));
remainder = (UINT64)((INT64)((INT32)dividend) % (INT64)((INT32)divisor));
}
- else /* unsigned */
+ else /* unsigned */
{
quotient = dividend / divisor;
remainder = dividend % divisor;
@@ -4939,7 +4939,7 @@ M68KMAKE_OP(eori, 16, tos, .)
if((mc68kcpu)->s_flag)
{
UINT32 src = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) ^ src);
return;
}
@@ -5029,7 +5029,7 @@ M68KMAKE_OP(illegal, 0, ., .)
M68KMAKE_OP(jmp, 32, ., .)
{
m68ki_jump((mc68kcpu), M68KMAKE_GET_EA_AY_32);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
if(REG_PC(mc68kcpu) == REG_PPC(mc68kcpu) && (mc68kcpu)->remaining_cycles > 0)
(mc68kcpu)->remaining_cycles = 0;
}
@@ -5038,7 +5038,7 @@ M68KMAKE_OP(jmp, 32, ., .)
M68KMAKE_OP(jsr, 32, ., .)
{
UINT32 ea = M68KMAKE_GET_EA_AY_32;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_push_32((mc68kcpu), REG_PC(mc68kcpu));
m68ki_jump((mc68kcpu), ea);
}
@@ -6487,7 +6487,7 @@ M68KMAKE_OP(move, 16, toc, .)
M68KMAKE_OP(move, 16, frs, d)
{
- if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */
+ if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */
{
DY(mc68kcpu) = MASK_OUT_BELOW_16(DY(mc68kcpu)) | m68ki_get_sr(mc68kcpu);
return;
@@ -6498,7 +6498,7 @@ M68KMAKE_OP(move, 16, frs, d)
M68KMAKE_OP(move, 16, frs, .)
{
- if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */
+ if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type) || (mc68kcpu)->s_flag) /* NS990408 */
{
UINT32 ea = M68KMAKE_GET_EA_AY_16;
m68ki_write_16((mc68kcpu), ea, m68ki_get_sr(mc68kcpu));
@@ -6524,7 +6524,7 @@ M68KMAKE_OP(move, 16, tos, .)
if((mc68kcpu)->s_flag)
{
UINT32 new_sr = M68KMAKE_GET_OPER_AY_16;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), new_sr);
return;
}
@@ -6547,7 +6547,7 @@ M68KMAKE_OP(move, 32, tou, .)
{
if((mc68kcpu)->s_flag)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
REG_USP(mc68kcpu) = AY(mc68kcpu);
return;
}
@@ -6563,29 +6563,29 @@ M68KMAKE_OP(movec, 32, cr, .)
{
UINT32 word2 = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
switch (word2 & 0xfff)
{
- case 0x000: /* SFC */
+ case 0x000: /* SFC */
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->sfc;
return;
- case 0x001: /* DFC */
+ case 0x001: /* DFC */
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->dfc;
return;
- case 0x002: /* CACR */
+ case 0x002: /* CACR */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->cacr;
return;
}
return;
- case 0x800: /* USP */
+ case 0x800: /* USP */
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = REG_USP(mc68kcpu);
return;
- case 0x801: /* VBR */
+ case 0x801: /* VBR */
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->vbr;
return;
- case 0x802: /* CAAR */
+ case 0x802: /* CAAR */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->caar;
@@ -6593,7 +6593,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
break;
- case 0x803: /* MSP */
+ case 0x803: /* MSP */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->m_flag ? REG_SP(mc68kcpu) : REG_MSP(mc68kcpu);
@@ -6601,7 +6601,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x804: /* ISP */
+ case 0x804: /* ISP */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = (mc68kcpu)->m_flag ? REG_ISP(mc68kcpu) : REG_SP(mc68kcpu);
@@ -6609,7 +6609,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x003: /* TC */
+ case 0x003: /* TC */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_tc;
@@ -6617,7 +6617,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x004: /* ITT0 (040+, ACR0 on ColdFire) */
+ case 0x004: /* ITT0 (040+, ACR0 on ColdFire) */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_itt0;
@@ -6630,7 +6630,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x005: /* ITT1 (040+, ACR1 on ColdFire) */
+ case 0x005: /* ITT1 (040+, ACR1 on ColdFire) */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_itt1;
@@ -6643,7 +6643,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x006: /* DTT0 */
+ case 0x006: /* DTT0 */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_dtt0;
@@ -6656,7 +6656,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x007: /* DTT1 */
+ case 0x007: /* DTT1 */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_dtt1;
@@ -6669,7 +6669,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x805: /* MMUSR */
+ case 0x805: /* MMUSR */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_sr_040;
@@ -6677,7 +6677,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x806: /* URP */
+ case 0x806: /* URP */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_urp_aptr;
@@ -6685,7 +6685,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x807: /* SRP */
+ case 0x807: /* SRP */
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
REG_DA(mc68kcpu)[(word2 >> 12) & 15] = mc68kcpu->mmu_srp_aptr;
@@ -6693,7 +6693,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc00: // ROMBAR0
+ case 0xc00: // ROMBAR0
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6701,7 +6701,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc01: // ROMBAR1
+ case 0xc01: // ROMBAR1
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6709,7 +6709,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc04: // RAMBAR0
+ case 0xc04: // RAMBAR0
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6717,7 +6717,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc05: // RAMBAR1
+ case 0xc05: // RAMBAR1
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6725,7 +6725,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0c: // MPCR
+ case 0xc0c: // MPCR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6733,7 +6733,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0d: // EDRAMBAR
+ case 0xc0d: // EDRAMBAR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6741,7 +6741,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0e: // SECMBAR
+ case 0xc0e: // SECMBAR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6749,7 +6749,7 @@ M68KMAKE_OP(movec, 32, cr, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0f: // MBAR
+ case 0xc0f: // MBAR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6777,16 +6777,16 @@ M68KMAKE_OP(movec, 32, rc, .)
{
UINT32 word2 = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
switch (word2 & 0xfff)
{
- case 0x000: /* SFC */
+ case 0x000: /* SFC */
(mc68kcpu)->sfc = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 7;
return;
- case 0x001: /* DFC */
+ case 0x001: /* DFC */
(mc68kcpu)->dfc = REG_DA(mc68kcpu)[(word2 >> 12) & 15] & 7;
return;
- case 0x002: /* CACR */
+ case 0x002: /* CACR */
/* Only EC020 and later have CACR */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
@@ -6813,13 +6813,13 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x800: /* USP */
+ case 0x800: /* USP */
REG_USP(mc68kcpu) = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
return;
- case 0x801: /* VBR */
+ case 0x801: /* VBR */
(mc68kcpu)->vbr = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
return;
- case 0x802: /* CAAR */
+ case 0x802: /* CAAR */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
(mc68kcpu)->caar = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6827,7 +6827,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x803: /* MSP */
+ case 0x803: /* MSP */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
/* we are in supervisor mode so just check for M flag */
@@ -6841,7 +6841,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x804: /* ISP */
+ case 0x804: /* ISP */
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
if(!(mc68kcpu)->m_flag)
@@ -6854,7 +6854,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x003: /* TC */
+ case 0x003: /* TC */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_tc = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6871,7 +6871,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x004: /* ITT0 */
+ case 0x004: /* ITT0 */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_itt0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6884,7 +6884,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x005: /* ITT1 */
+ case 0x005: /* ITT1 */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_itt1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6897,7 +6897,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x006: /* DTT0 */
+ case 0x006: /* DTT0 */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_dtt0 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6910,7 +6910,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x007: /* DTT1 */
+ case 0x007: /* DTT1 */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_dtt1 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6923,7 +6923,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x805: /* MMUSR */
+ case 0x805: /* MMUSR */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_sr_040 = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6931,7 +6931,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x806: /* URP */
+ case 0x806: /* URP */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_urp_aptr = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6939,7 +6939,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0x807: /* SRP */
+ case 0x807: /* SRP */
if (CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
mc68kcpu->mmu_srp_aptr = REG_DA(mc68kcpu)[(word2 >> 12) & 15];
@@ -6947,7 +6947,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc00: // ROMBAR0
+ case 0xc00: // ROMBAR0
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6955,7 +6955,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc01: // ROMBAR1
+ case 0xc01: // ROMBAR1
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6963,7 +6963,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc04: // RAMBAR0
+ case 0xc04: // RAMBAR0
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6971,7 +6971,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc05: // RAMBAR1
+ case 0xc05: // RAMBAR1
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6979,7 +6979,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0c: // MPCR
+ case 0xc0c: // MPCR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6987,7 +6987,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0d: // EDRAMBAR
+ case 0xc0d: // EDRAMBAR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -6995,7 +6995,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0e: // SECMBAR
+ case 0xc0e: // SECMBAR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -7003,7 +7003,7 @@ M68KMAKE_OP(movec, 32, rc, .)
}
m68ki_exception_illegal(mc68kcpu);
return;
- case 0xc0f: // MBAR
+ case 0xc0f: // MBAR
if(CPU_TYPE_IS_COLDFIRE((mc68kcpu)->cpu_type))
{
/* TODO */
@@ -7305,13 +7305,13 @@ M68KMAKE_OP(moves, 8, ., .)
UINT32 word2 = OPER_I_16(mc68kcpu);
UINT32 ea = M68KMAKE_GET_EA_AY_8;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- if(BIT_B(word2)) /* Register to memory */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
{
m68ki_write_8_fc((mc68kcpu), ea, (mc68kcpu)->dfc, MASK_OUT_ABOVE_8(REG_DA(mc68kcpu)[(word2 >> 12) & 15]));
return;
}
- if(BIT_F(word2)) /* Memory to address register */
+ if(BIT_F(word2)) /* Memory to address register */
{
REG_A(mc68kcpu)[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc((mc68kcpu), ea, (mc68kcpu)->sfc));
if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type))
@@ -7340,13 +7340,13 @@ M68KMAKE_OP(moves, 16, ., .)
UINT32 word2 = OPER_I_16(mc68kcpu);
UINT32 ea = M68KMAKE_GET_EA_AY_16;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- if(BIT_B(word2)) /* Register to memory */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
{
m68ki_write_16_fc((mc68kcpu), ea, (mc68kcpu)->dfc, MASK_OUT_ABOVE_16(REG_DA(mc68kcpu)[(word2 >> 12) & 15]));
return;
}
- if(BIT_F(word2)) /* Memory to address register */
+ if(BIT_F(word2)) /* Memory to address register */
{
REG_A(mc68kcpu)[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc((mc68kcpu), ea, (mc68kcpu)->sfc));
if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type))
@@ -7375,8 +7375,8 @@ M68KMAKE_OP(moves, 32, ., .)
UINT32 word2 = OPER_I_16(mc68kcpu);
UINT32 ea = M68KMAKE_GET_EA_AY_32;
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
- if(BIT_B(word2)) /* Register to memory */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ if(BIT_B(word2)) /* Register to memory */
{
m68ki_write_32_fc((mc68kcpu), ea, (mc68kcpu)->dfc, REG_DA(mc68kcpu)[(word2 >> 12) & 15]);
if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type))
@@ -7489,7 +7489,7 @@ M68KMAKE_OP(mull, 32, ., d)
(mc68kcpu)->c_flag = CFLAG_CLEAR;
- if(BIT_B(word2)) /* signed */
+ if(BIT_B(word2)) /* signed */
{
res = (INT64)((INT32)src) * (INT64)((INT32)dst);
if(!BIT_A(word2))
@@ -7539,7 +7539,7 @@ M68KMAKE_OP(mull, 32, ., .)
(mc68kcpu)->c_flag = CFLAG_CLEAR;
- if(BIT_B(word2)) /* signed */
+ if(BIT_B(word2)) /* signed */
{
res = (INT64)((INT32)src) * (INT64)((INT32)dst);
if(!BIT_A(word2))
@@ -7607,7 +7607,7 @@ M68KMAKE_OP(nbcd, 8, ., d)
(mc68kcpu)->c_flag = CFLAG_CLEAR;
(mc68kcpu)->x_flag = XFLAG_CLEAR;
}
- (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
+ (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
}
@@ -7640,7 +7640,7 @@ M68KMAKE_OP(nbcd, 8, ., .)
(mc68kcpu)->c_flag = CFLAG_CLEAR;
(mc68kcpu)->x_flag = XFLAG_CLEAR;
}
- (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
+ (mc68kcpu)->n_flag = NFLAG_8(res); /* Undefined N behavior */
}
@@ -7832,7 +7832,7 @@ M68KMAKE_OP(negx, 32, ., .)
M68KMAKE_OP(nop, 0, ., .)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
}
@@ -8115,7 +8115,7 @@ M68KMAKE_OP(ori, 16, tos, .)
if((mc68kcpu)->s_flag)
{
UINT32 src = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_sr((mc68kcpu), m68ki_get_sr(mc68kcpu) | src);
return;
}
@@ -8950,7 +8950,7 @@ M68KMAKE_OP(rtd, 32, ., .)
{
UINT32 new_pc = m68ki_pull_32(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
REG_A(mc68kcpu)[7] = MASK_OUT_ABOVE_32(REG_A(mc68kcpu)[7] + MAKE_INT_16(OPER_I_16(mc68kcpu)));
m68ki_jump((mc68kcpu), new_pc);
return;
@@ -8969,7 +8969,7 @@ M68KMAKE_OP(rte, 32, ., .)
if ((mc68kcpu)->rte_instr_callback != NULL)
(*(mc68kcpu)->rte_instr_callback)((mc68kcpu)->device);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
if(CPU_TYPE_IS_000((mc68kcpu)->cpu_type))
{
@@ -8991,7 +8991,7 @@ M68KMAKE_OP(rte, 32, ., .)
{
new_sr = m68ki_pull_16(mc68kcpu);
new_pc = m68ki_pull_32(mc68kcpu);
- m68ki_fake_pull_16(mc68kcpu); /* format word */
+ m68ki_fake_pull_16(mc68kcpu); /* format word */
m68ki_jump((mc68kcpu), new_pc);
m68ki_set_sr((mc68kcpu), new_sr);
(mc68kcpu)->instr_mode = INSTRUCTION_YES;
@@ -9013,7 +9013,7 @@ rte_loop:
case 0: /* Normal */
new_sr = m68ki_pull_16(mc68kcpu);
new_pc = m68ki_pull_32(mc68kcpu);
- m68ki_fake_pull_16(mc68kcpu); /* format word */
+ m68ki_fake_pull_16(mc68kcpu); /* format word */
m68ki_jump((mc68kcpu), new_pc);
m68ki_set_sr((mc68kcpu), new_sr);
(mc68kcpu)->instr_mode = INSTRUCTION_YES;
@@ -9021,15 +9021,15 @@ rte_loop:
return;
case 1: /* Throwaway */
new_sr = m68ki_pull_16(mc68kcpu);
- m68ki_fake_pull_32(mc68kcpu); /* program counter */
- m68ki_fake_pull_16(mc68kcpu); /* format word */
+ m68ki_fake_pull_32(mc68kcpu); /* program counter */
+ m68ki_fake_pull_16(mc68kcpu); /* format word */
m68ki_set_sr_noint((mc68kcpu), new_sr);
goto rte_loop;
case 2: /* Trap */
new_sr = m68ki_pull_16(mc68kcpu);
new_pc = m68ki_pull_32(mc68kcpu);
- m68ki_fake_pull_16(mc68kcpu); /* format word */
- m68ki_fake_pull_32(mc68kcpu); /* address */
+ m68ki_fake_pull_16(mc68kcpu); /* format word */
+ m68ki_fake_pull_32(mc68kcpu); /* address */
m68ki_jump((mc68kcpu), new_pc);
m68ki_set_sr((mc68kcpu), new_sr);
(mc68kcpu)->instr_mode = INSTRUCTION_YES;
@@ -9038,22 +9038,22 @@ rte_loop:
case 7: /* 68040 access error */
new_sr = m68ki_pull_16(mc68kcpu);
new_pc = m68ki_pull_32(mc68kcpu);
- m68ki_fake_pull_16(mc68kcpu); /* $06: format word */
- m68ki_fake_pull_32(mc68kcpu); /* $08: effective address */
- m68ki_fake_pull_16(mc68kcpu); /* $0c: special status word */
- m68ki_fake_pull_16(mc68kcpu); /* $0e: wb3s */
- m68ki_fake_pull_16(mc68kcpu); /* $10: wb2s */
- m68ki_fake_pull_16(mc68kcpu); /* $12: wb1s */
- m68ki_fake_pull_32(mc68kcpu); /* $14: data fault address */
- m68ki_fake_pull_32(mc68kcpu); /* $18: wb3a */
- m68ki_fake_pull_32(mc68kcpu); /* $1c: wb3d */
- m68ki_fake_pull_32(mc68kcpu); /* $20: wb2a */
- m68ki_fake_pull_32(mc68kcpu); /* $24: wb2d */
- m68ki_fake_pull_32(mc68kcpu); /* $28: wb1a */
- m68ki_fake_pull_32(mc68kcpu); /* $2c: wb1d/pd0 */
- m68ki_fake_pull_32(mc68kcpu); /* $30: pd1 */
- m68ki_fake_pull_32(mc68kcpu); /* $34: pd2 */
- m68ki_fake_pull_32(mc68kcpu); /* $38: pd3 */
+ m68ki_fake_pull_16(mc68kcpu); /* $06: format word */
+ m68ki_fake_pull_32(mc68kcpu); /* $08: effective address */
+ m68ki_fake_pull_16(mc68kcpu); /* $0c: special status word */
+ m68ki_fake_pull_16(mc68kcpu); /* $0e: wb3s */
+ m68ki_fake_pull_16(mc68kcpu); /* $10: wb2s */
+ m68ki_fake_pull_16(mc68kcpu); /* $12: wb1s */
+ m68ki_fake_pull_32(mc68kcpu); /* $14: data fault address */
+ m68ki_fake_pull_32(mc68kcpu); /* $18: wb3a */
+ m68ki_fake_pull_32(mc68kcpu); /* $1c: wb3d */
+ m68ki_fake_pull_32(mc68kcpu); /* $20: wb2a */
+ m68ki_fake_pull_32(mc68kcpu); /* $24: wb2d */
+ m68ki_fake_pull_32(mc68kcpu); /* $28: wb1a */
+ m68ki_fake_pull_32(mc68kcpu); /* $2c: wb1d/pd0 */
+ m68ki_fake_pull_32(mc68kcpu); /* $30: pd1 */
+ m68ki_fake_pull_32(mc68kcpu); /* $34: pd2 */
+ m68ki_fake_pull_32(mc68kcpu); /* $38: pd3 */
m68ki_jump((mc68kcpu), new_pc);
m68ki_set_sr((mc68kcpu), new_sr);
(mc68kcpu)->instr_mode = INSTRUCTION_YES;
@@ -9063,15 +9063,15 @@ rte_loop:
case 0x0a: /* Bus Error at instruction boundary */
new_sr = m68ki_pull_16(mc68kcpu);
new_pc = m68ki_pull_32(mc68kcpu);
- m68ki_fake_pull_16(mc68kcpu); /* $06: format word */
- m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */
- m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */
- m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */
- m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */
- m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */
- m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */
- m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */
- m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */
+ m68ki_fake_pull_16(mc68kcpu); /* $06: format word */
+ m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */
+ m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */
+ m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */
+ m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */
+ m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */
+ m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */
+ m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */
+ m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */
m68ki_jump((mc68kcpu), new_pc);
m68ki_set_sr((mc68kcpu), new_sr);
@@ -9081,31 +9081,31 @@ rte_loop:
case 0x0b: /* Bus Error - Instruction Execution in Progress */
new_sr = m68ki_pull_16(mc68kcpu);
new_pc = m68ki_pull_32(mc68kcpu);
- m68ki_fake_pull_16(mc68kcpu); /* $06: format word */
- m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */
- m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */
- m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */
- m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */
- m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */
- m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */
- m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */
- m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */
- m68ki_fake_pull_32(mc68kcpu); /* $20: */
- m68ki_fake_pull_32(mc68kcpu); /* $24: stage B address */
- m68ki_fake_pull_32(mc68kcpu); /* $28: */
- m68ki_fake_pull_32(mc68kcpu); /* $2c: data input buffer */
- m68ki_fake_pull_32(mc68kcpu); /* $30: */
- m68ki_fake_pull_16(mc68kcpu); /* $34: */
- m68ki_fake_pull_16(mc68kcpu); /* $36: version #, internal information */
- m68ki_fake_pull_32(mc68kcpu); /* $38: */
- m68ki_fake_pull_32(mc68kcpu); /* $3c: */
- m68ki_fake_pull_32(mc68kcpu); /* $40: */
- m68ki_fake_pull_32(mc68kcpu); /* $44: */
- m68ki_fake_pull_32(mc68kcpu); /* $48: */
- m68ki_fake_pull_32(mc68kcpu); /* $4c: */
- m68ki_fake_pull_32(mc68kcpu); /* $50: */
- m68ki_fake_pull_32(mc68kcpu); /* $54: */
- m68ki_fake_pull_32(mc68kcpu); /* $58: */
+ m68ki_fake_pull_16(mc68kcpu); /* $06: format word */
+ m68ki_fake_pull_16(mc68kcpu); /* $08: internal register */
+ m68ki_fake_pull_16(mc68kcpu); /* $0a: special status word */
+ m68ki_fake_pull_16(mc68kcpu); /* $0c: instruction pipe stage c */
+ m68ki_fake_pull_16(mc68kcpu); /* $0e: instruction pipe stage b */
+ m68ki_fake_pull_32(mc68kcpu); /* $10: data fault address */
+ m68ki_fake_pull_32(mc68kcpu); /* $14: internal registers */
+ m68ki_fake_pull_32(mc68kcpu); /* $18: data output buffer */
+ m68ki_fake_pull_32(mc68kcpu); /* $1c: internal registers */
+ m68ki_fake_pull_32(mc68kcpu); /* $20: */
+ m68ki_fake_pull_32(mc68kcpu); /* $24: stage B address */
+ m68ki_fake_pull_32(mc68kcpu); /* $28: */
+ m68ki_fake_pull_32(mc68kcpu); /* $2c: data input buffer */
+ m68ki_fake_pull_32(mc68kcpu); /* $30: */
+ m68ki_fake_pull_16(mc68kcpu); /* $34: */
+ m68ki_fake_pull_16(mc68kcpu); /* $36: version #, internal information */
+ m68ki_fake_pull_32(mc68kcpu); /* $38: */
+ m68ki_fake_pull_32(mc68kcpu); /* $3c: */
+ m68ki_fake_pull_32(mc68kcpu); /* $40: */
+ m68ki_fake_pull_32(mc68kcpu); /* $44: */
+ m68ki_fake_pull_32(mc68kcpu); /* $48: */
+ m68ki_fake_pull_32(mc68kcpu); /* $4c: */
+ m68ki_fake_pull_32(mc68kcpu); /* $50: */
+ m68ki_fake_pull_32(mc68kcpu); /* $54: */
+ m68ki_fake_pull_32(mc68kcpu); /* $58: */
m68ki_jump((mc68kcpu), new_pc);
m68ki_set_sr((mc68kcpu), new_sr);
@@ -9127,9 +9127,9 @@ M68KMAKE_OP(rtm, 32, ., .)
{
if(CPU_TYPE_IS_020_VARIANT((mc68kcpu)->cpu_type))
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
logerror("%s at %08x: called unimplemented instruction %04x (rtm)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_illegal(mc68kcpu);
@@ -9138,7 +9138,7 @@ M68KMAKE_OP(rtm, 32, ., .)
M68KMAKE_OP(rtr, 32, ., .)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_set_ccr((mc68kcpu), m68ki_pull_16(mc68kcpu));
m68ki_jump((mc68kcpu), m68ki_pull_32(mc68kcpu));
}
@@ -9146,7 +9146,7 @@ M68KMAKE_OP(rtr, 32, ., .)
M68KMAKE_OP(rts, 32, ., .)
{
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
m68ki_jump((mc68kcpu), m68ki_pull_32(mc68kcpu));
}
@@ -9159,7 +9159,7 @@ M68KMAKE_OP(sbcd, 8, rr, .)
UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */
+ (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to assume cleared. */
if(res > 9)
res -= 6;
@@ -9168,7 +9168,7 @@ M68KMAKE_OP(sbcd, 8, rr, .)
{
res += 0xa0;
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
}
else
(mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0;
@@ -9191,7 +9191,7 @@ M68KMAKE_OP(sbcd, 8, mm, ax7)
UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+ (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
if(res > 9)
res -= 6;
@@ -9200,7 +9200,7 @@ M68KMAKE_OP(sbcd, 8, mm, ax7)
{
res += 0xa0;
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
}
else
(mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0;
@@ -9223,7 +9223,7 @@ M68KMAKE_OP(sbcd, 8, mm, ay7)
UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+ (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
if(res > 9)
res -= 6;
@@ -9232,7 +9232,7 @@ M68KMAKE_OP(sbcd, 8, mm, ay7)
{
res += 0xa0;
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
}
else
(mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0;
@@ -9255,7 +9255,7 @@ M68KMAKE_OP(sbcd, 8, mm, axy7)
UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+ (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
if(res > 9)
res -= 6;
@@ -9264,7 +9264,7 @@ M68KMAKE_OP(sbcd, 8, mm, axy7)
{
res += 0xa0;
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
}
else
(mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0;
@@ -9287,7 +9287,7 @@ M68KMAKE_OP(sbcd, 8, mm, .)
UINT32 res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1(mc68kcpu);
// (mc68kcpu)->v_flag = ~res; /* Undefined V behavior */
- (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
+ (mc68kcpu)->v_flag = VFLAG_CLEAR; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to return zero. */
if(res > 9)
res -= 6;
@@ -9296,7 +9296,7 @@ M68KMAKE_OP(sbcd, 8, mm, .)
{
res += 0xa0;
(mc68kcpu)->x_flag = (mc68kcpu)->c_flag = CFLAG_SET;
- (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
+ (mc68kcpu)->n_flag = NFLAG_SET; /* Undefined in Motorola's M68000PM/AD rev.1 and safer to follow carry. */
}
else
(mc68kcpu)->n_flag = (mc68kcpu)->x_flag = (mc68kcpu)->c_flag = 0;
@@ -9358,7 +9358,7 @@ M68KMAKE_OP(stop, 0, ., .)
if((mc68kcpu)->s_flag)
{
UINT32 new_sr = OPER_I_16(mc68kcpu);
- m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(mc68kcpu); /* auto-disable (see m68kcpu.h) */
(mc68kcpu)->stopped |= STOP_LEVEL_STOP;
m68ki_set_sr((mc68kcpu), new_sr);
(mc68kcpu)->remaining_cycles = 0;
@@ -10002,9 +10002,9 @@ M68KMAKE_OP(tas, 8, ., .)
(mc68kcpu)->c_flag = CFLAG_CLEAR;
/* The Genesis/Megadrive games Gargoyles and Ex-Mutants need the TAS writeback
- disabled in order to function properly. Some Amiga software may also rely
- on (mc68kcpu), but only when accessing specific addresses so additional functionality
- will be needed. */
+ disabled in order to function properly. Some Amiga software may also rely
+ on (mc68kcpu), but only when accessing specific addresses so additional functionality
+ will be needed. */
if ((mc68kcpu)->tas_instr_callback != NULL)
allow_writeback = (*(mc68kcpu)->tas_instr_callback)((mc68kcpu)->device);
@@ -10016,7 +10016,7 @@ M68KMAKE_OP(tas, 8, ., .)
M68KMAKE_OP(trap, 0, ., .)
{
/* Trap#n stacks exception frame type 0 */
- m68ki_exception_trapN((mc68kcpu), EXCEPTION_TRAP_BASE + ((mc68kcpu)->ir & 0xf)); /* HJB 990403 */
+ m68ki_exception_trapN((mc68kcpu), EXCEPTION_TRAP_BASE + ((mc68kcpu)->ir & 0xf)); /* HJB 990403 */
}
@@ -10024,7 +10024,7 @@ M68KMAKE_OP(trapt, 0, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
+ m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
return;
}
m68ki_exception_illegal(mc68kcpu);
@@ -10035,7 +10035,7 @@ M68KMAKE_OP(trapt, 16, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
+ m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
return;
}
m68ki_exception_illegal(mc68kcpu);
@@ -10046,7 +10046,7 @@ M68KMAKE_OP(trapt, 32, ., .)
{
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
- m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
+ m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
return;
}
m68ki_exception_illegal(mc68kcpu);
@@ -10090,7 +10090,7 @@ M68KMAKE_OP(trapcc, 0, ., .)
if(CPU_TYPE_IS_EC020_PLUS((mc68kcpu)->cpu_type))
{
if(M68KMAKE_CC)
- m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
+ m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
return;
}
m68ki_exception_illegal(mc68kcpu);
@@ -10103,7 +10103,7 @@ M68KMAKE_OP(trapcc, 16, ., .)
{
if(M68KMAKE_CC)
{
- m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
+ m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
return;
}
REG_PC(mc68kcpu) += 2;
@@ -10119,7 +10119,7 @@ M68KMAKE_OP(trapcc, 32, ., .)
{
if(M68KMAKE_CC)
{
- m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
+ m68ki_exception_trap((mc68kcpu), EXCEPTION_TRAPV); /* HJB 990403 */
return;
}
REG_PC(mc68kcpu) += 4;
@@ -10511,7 +10511,7 @@ M68KMAKE_OP(cpush, 32, ., .)
if(CPU_TYPE_IS_040_PLUS((mc68kcpu)->cpu_type))
{
logerror("%s at %08x: called unimplemented instruction %04x (cpush)\n",
- (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
+ (mc68kcpu)->device->tag(), REG_PC(mc68kcpu) - 2, (mc68kcpu)->ir);
return;
}
m68ki_exception_1111(mc68kcpu);
diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c
index 157c72da02c..75bdf8ce5a8 100644
--- a/src/emu/cpu/m68000/m68kcpu.c
+++ b/src/emu/cpu/m68000/m68kcpu.c
@@ -92,536 +92,536 @@ const UINT32 m68ki_shift_32_table[65] =
const UINT8 m68ki_exception_cycle_table[7][256] =
{
{ /* 000 */
- 40, /* 0: Reset - Initial Stack Pointer */
- 4, /* 1: Reset - Initial Program Counter */
- 50, /* 2: Bus Error (unemulated) */
- 50, /* 3: Address Error (unemulated) */
- 34, /* 4: Illegal Instruction */
- 38, /* 5: Divide by Zero */
- 40, /* 6: CHK */
- 34, /* 7: TRAPV */
- 34, /* 8: Privilege Violation */
- 34, /* 9: Trace */
- 4, /* 10: 1010 */
- 4, /* 11: 1111 */
- 4, /* 12: RESERVED */
- 4, /* 13: Coprocessor Protocol Violation (unemulated) */
- 4, /* 14: Format Error */
- 44, /* 15: Uninitialized Interrupt */
- 4, /* 16: RESERVED */
- 4, /* 17: RESERVED */
- 4, /* 18: RESERVED */
- 4, /* 19: RESERVED */
- 4, /* 20: RESERVED */
- 4, /* 21: RESERVED */
- 4, /* 22: RESERVED */
- 4, /* 23: RESERVED */
- 44, /* 24: Spurious Interrupt */
- 44, /* 25: Level 1 Interrupt Autovector */
- 44, /* 26: Level 2 Interrupt Autovector */
- 44, /* 27: Level 3 Interrupt Autovector */
- 44, /* 28: Level 4 Interrupt Autovector */
- 44, /* 29: Level 5 Interrupt Autovector */
- 44, /* 30: Level 6 Interrupt Autovector */
- 44, /* 31: Level 7 Interrupt Autovector */
- 34, /* 32: TRAP #0 */
- 34, /* 33: TRAP #1 */
- 34, /* 34: TRAP #2 */
- 34, /* 35: TRAP #3 */
- 34, /* 36: TRAP #4 */
- 34, /* 37: TRAP #5 */
- 34, /* 38: TRAP #6 */
- 34, /* 39: TRAP #7 */
- 34, /* 40: TRAP #8 */
- 34, /* 41: TRAP #9 */
- 34, /* 42: TRAP #10 */
- 34, /* 43: TRAP #11 */
- 34, /* 44: TRAP #12 */
- 34, /* 45: TRAP #13 */
- 34, /* 46: TRAP #14 */
- 34, /* 47: TRAP #15 */
- 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
- 4, /* 49: FP Inexact Result (unemulated) */
- 4, /* 50: FP Divide by Zero (unemulated) */
- 4, /* 51: FP Underflow (unemulated) */
- 4, /* 52: FP Operand Error (unemulated) */
- 4, /* 53: FP Overflow (unemulated) */
- 4, /* 54: FP Signaling NAN (unemulated) */
- 4, /* 55: FP Unimplemented Data Type (unemulated) */
- 4, /* 56: MMU Configuration Error (unemulated) */
- 4, /* 57: MMU Illegal Operation Error (unemulated) */
- 4, /* 58: MMU Access Level Violation Error (unemulated) */
- 4, /* 59: RESERVED */
- 4, /* 60: RESERVED */
- 4, /* 61: RESERVED */
- 4, /* 62: RESERVED */
- 4, /* 63: RESERVED */
- /* 64-255: User Defined */
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ 40, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 34, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero */
+ 40, /* 6: CHK */
+ 34, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 34, /* 9: Trace */
+ 4, /* 10: 1010 */
+ 4, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 44, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 44, /* 24: Spurious Interrupt */
+ 44, /* 25: Level 1 Interrupt Autovector */
+ 44, /* 26: Level 2 Interrupt Autovector */
+ 44, /* 27: Level 3 Interrupt Autovector */
+ 44, /* 28: Level 4 Interrupt Autovector */
+ 44, /* 29: Level 5 Interrupt Autovector */
+ 44, /* 30: Level 6 Interrupt Autovector */
+ 44, /* 31: Level 7 Interrupt Autovector */
+ 34, /* 32: TRAP #0 */
+ 34, /* 33: TRAP #1 */
+ 34, /* 34: TRAP #2 */
+ 34, /* 35: TRAP #3 */
+ 34, /* 36: TRAP #4 */
+ 34, /* 37: TRAP #5 */
+ 34, /* 38: TRAP #6 */
+ 34, /* 39: TRAP #7 */
+ 34, /* 40: TRAP #8 */
+ 34, /* 41: TRAP #9 */
+ 34, /* 42: TRAP #10 */
+ 34, /* 43: TRAP #11 */
+ 34, /* 44: TRAP #12 */
+ 34, /* 45: TRAP #13 */
+ 34, /* 46: TRAP #14 */
+ 34, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 010 */
- 40, /* 0: Reset - Initial Stack Pointer */
- 4, /* 1: Reset - Initial Program Counter */
+ 40, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
126, /* 2: Bus Error (unemulated) */
126, /* 3: Address Error (unemulated) */
- 38, /* 4: Illegal Instruction */
- 44, /* 5: Divide by Zero */
- 44, /* 6: CHK */
- 34, /* 7: TRAPV */
- 38, /* 8: Privilege Violation */
- 38, /* 9: Trace */
- 4, /* 10: 1010 */
- 4, /* 11: 1111 */
- 4, /* 12: RESERVED */
- 4, /* 13: Coprocessor Protocol Violation (unemulated) */
- 4, /* 14: Format Error */
- 44, /* 15: Uninitialized Interrupt */
- 4, /* 16: RESERVED */
- 4, /* 17: RESERVED */
- 4, /* 18: RESERVED */
- 4, /* 19: RESERVED */
- 4, /* 20: RESERVED */
- 4, /* 21: RESERVED */
- 4, /* 22: RESERVED */
- 4, /* 23: RESERVED */
- 46, /* 24: Spurious Interrupt */
- 46, /* 25: Level 1 Interrupt Autovector */
- 46, /* 26: Level 2 Interrupt Autovector */
- 46, /* 27: Level 3 Interrupt Autovector */
- 46, /* 28: Level 4 Interrupt Autovector */
- 46, /* 29: Level 5 Interrupt Autovector */
- 46, /* 30: Level 6 Interrupt Autovector */
- 46, /* 31: Level 7 Interrupt Autovector */
- 38, /* 32: TRAP #0 */
- 38, /* 33: TRAP #1 */
- 38, /* 34: TRAP #2 */
- 38, /* 35: TRAP #3 */
- 38, /* 36: TRAP #4 */
- 38, /* 37: TRAP #5 */
- 38, /* 38: TRAP #6 */
- 38, /* 39: TRAP #7 */
- 38, /* 40: TRAP #8 */
- 38, /* 41: TRAP #9 */
- 38, /* 42: TRAP #10 */
- 38, /* 43: TRAP #11 */
- 38, /* 44: TRAP #12 */
- 38, /* 45: TRAP #13 */
- 38, /* 46: TRAP #14 */
- 38, /* 47: TRAP #15 */
- 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
- 4, /* 49: FP Inexact Result (unemulated) */
- 4, /* 50: FP Divide by Zero (unemulated) */
- 4, /* 51: FP Underflow (unemulated) */
- 4, /* 52: FP Operand Error (unemulated) */
- 4, /* 53: FP Overflow (unemulated) */
- 4, /* 54: FP Signaling NAN (unemulated) */
- 4, /* 55: FP Unimplemented Data Type (unemulated) */
- 4, /* 56: MMU Configuration Error (unemulated) */
- 4, /* 57: MMU Illegal Operation Error (unemulated) */
- 4, /* 58: MMU Access Level Violation Error (unemulated) */
- 4, /* 59: RESERVED */
- 4, /* 60: RESERVED */
- 4, /* 61: RESERVED */
- 4, /* 62: RESERVED */
- 4, /* 63: RESERVED */
- /* 64-255: User Defined */
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ 38, /* 4: Illegal Instruction */
+ 44, /* 5: Divide by Zero */
+ 44, /* 6: CHK */
+ 34, /* 7: TRAPV */
+ 38, /* 8: Privilege Violation */
+ 38, /* 9: Trace */
+ 4, /* 10: 1010 */
+ 4, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 44, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 46, /* 24: Spurious Interrupt */
+ 46, /* 25: Level 1 Interrupt Autovector */
+ 46, /* 26: Level 2 Interrupt Autovector */
+ 46, /* 27: Level 3 Interrupt Autovector */
+ 46, /* 28: Level 4 Interrupt Autovector */
+ 46, /* 29: Level 5 Interrupt Autovector */
+ 46, /* 30: Level 6 Interrupt Autovector */
+ 46, /* 31: Level 7 Interrupt Autovector */
+ 38, /* 32: TRAP #0 */
+ 38, /* 33: TRAP #1 */
+ 38, /* 34: TRAP #2 */
+ 38, /* 35: TRAP #3 */
+ 38, /* 36: TRAP #4 */
+ 38, /* 37: TRAP #5 */
+ 38, /* 38: TRAP #6 */
+ 38, /* 39: TRAP #7 */
+ 38, /* 40: TRAP #8 */
+ 38, /* 41: TRAP #9 */
+ 38, /* 42: TRAP #10 */
+ 38, /* 43: TRAP #11 */
+ 38, /* 44: TRAP #12 */
+ 38, /* 45: TRAP #13 */
+ 38, /* 46: TRAP #14 */
+ 38, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 020 */
- 4, /* 0: Reset - Initial Stack Pointer */
- 4, /* 1: Reset - Initial Program Counter */
- 50, /* 2: Bus Error (unemulated) */
- 50, /* 3: Address Error (unemulated) */
- 20, /* 4: Illegal Instruction */
- 38, /* 5: Divide by Zero */
- 40, /* 6: CHK */
- 20, /* 7: TRAPV */
- 34, /* 8: Privilege Violation */
- 25, /* 9: Trace */
- 20, /* 10: 1010 */
- 20, /* 11: 1111 */
- 4, /* 12: RESERVED */
- 4, /* 13: Coprocessor Protocol Violation (unemulated) */
- 4, /* 14: Format Error */
- 30, /* 15: Uninitialized Interrupt */
- 4, /* 16: RESERVED */
- 4, /* 17: RESERVED */
- 4, /* 18: RESERVED */
- 4, /* 19: RESERVED */
- 4, /* 20: RESERVED */
- 4, /* 21: RESERVED */
- 4, /* 22: RESERVED */
- 4, /* 23: RESERVED */
- 30, /* 24: Spurious Interrupt */
- 30, /* 25: Level 1 Interrupt Autovector */
- 30, /* 26: Level 2 Interrupt Autovector */
- 30, /* 27: Level 3 Interrupt Autovector */
- 30, /* 28: Level 4 Interrupt Autovector */
- 30, /* 29: Level 5 Interrupt Autovector */
- 30, /* 30: Level 6 Interrupt Autovector */
- 30, /* 31: Level 7 Interrupt Autovector */
- 20, /* 32: TRAP #0 */
- 20, /* 33: TRAP #1 */
- 20, /* 34: TRAP #2 */
- 20, /* 35: TRAP #3 */
- 20, /* 36: TRAP #4 */
- 20, /* 37: TRAP #5 */
- 20, /* 38: TRAP #6 */
- 20, /* 39: TRAP #7 */
- 20, /* 40: TRAP #8 */
- 20, /* 41: TRAP #9 */
- 20, /* 42: TRAP #10 */
- 20, /* 43: TRAP #11 */
- 20, /* 44: TRAP #12 */
- 20, /* 45: TRAP #13 */
- 20, /* 46: TRAP #14 */
- 20, /* 47: TRAP #15 */
- 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
- 4, /* 49: FP Inexact Result (unemulated) */
- 4, /* 50: FP Divide by Zero (unemulated) */
- 4, /* 51: FP Underflow (unemulated) */
- 4, /* 52: FP Operand Error (unemulated) */
- 4, /* 53: FP Overflow (unemulated) */
- 4, /* 54: FP Signaling NAN (unemulated) */
- 4, /* 55: FP Unimplemented Data Type (unemulated) */
- 4, /* 56: MMU Configuration Error (unemulated) */
- 4, /* 57: MMU Illegal Operation Error (unemulated) */
- 4, /* 58: MMU Access Level Violation Error (unemulated) */
- 4, /* 59: RESERVED */
- 4, /* 60: RESERVED */
- 4, /* 61: RESERVED */
- 4, /* 62: RESERVED */
- 4, /* 63: RESERVED */
- /* 64-255: User Defined */
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 20, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero */
+ 40, /* 6: CHK */
+ 20, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 25, /* 9: Trace */
+ 20, /* 10: 1010 */
+ 20, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 30, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 30, /* 24: Spurious Interrupt */
+ 30, /* 25: Level 1 Interrupt Autovector */
+ 30, /* 26: Level 2 Interrupt Autovector */
+ 30, /* 27: Level 3 Interrupt Autovector */
+ 30, /* 28: Level 4 Interrupt Autovector */
+ 30, /* 29: Level 5 Interrupt Autovector */
+ 30, /* 30: Level 6 Interrupt Autovector */
+ 30, /* 31: Level 7 Interrupt Autovector */
+ 20, /* 32: TRAP #0 */
+ 20, /* 33: TRAP #1 */
+ 20, /* 34: TRAP #2 */
+ 20, /* 35: TRAP #3 */
+ 20, /* 36: TRAP #4 */
+ 20, /* 37: TRAP #5 */
+ 20, /* 38: TRAP #6 */
+ 20, /* 39: TRAP #7 */
+ 20, /* 40: TRAP #8 */
+ 20, /* 41: TRAP #9 */
+ 20, /* 42: TRAP #10 */
+ 20, /* 43: TRAP #11 */
+ 20, /* 44: TRAP #12 */
+ 20, /* 45: TRAP #13 */
+ 20, /* 46: TRAP #14 */
+ 20, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 030 - not correct */
- 4, /* 0: Reset - Initial Stack Pointer */
- 4, /* 1: Reset - Initial Program Counter */
- 50, /* 2: Bus Error (unemulated) */
- 50, /* 3: Address Error (unemulated) */
- 20, /* 4: Illegal Instruction */
- 38, /* 5: Divide by Zero */
- 40, /* 6: CHK */
- 20, /* 7: TRAPV */
- 34, /* 8: Privilege Violation */
- 25, /* 9: Trace */
- 20, /* 10: 1010 */
- 20, /* 11: 1111 */
- 4, /* 12: RESERVED */
- 4, /* 13: Coprocessor Protocol Violation (unemulated) */
- 4, /* 14: Format Error */
- 30, /* 15: Uninitialized Interrupt */
- 4, /* 16: RESERVED */
- 4, /* 17: RESERVED */
- 4, /* 18: RESERVED */
- 4, /* 19: RESERVED */
- 4, /* 20: RESERVED */
- 4, /* 21: RESERVED */
- 4, /* 22: RESERVED */
- 4, /* 23: RESERVED */
- 30, /* 24: Spurious Interrupt */
- 30, /* 25: Level 1 Interrupt Autovector */
- 30, /* 26: Level 2 Interrupt Autovector */
- 30, /* 27: Level 3 Interrupt Autovector */
- 30, /* 28: Level 4 Interrupt Autovector */
- 30, /* 29: Level 5 Interrupt Autovector */
- 30, /* 30: Level 6 Interrupt Autovector */
- 30, /* 31: Level 7 Interrupt Autovector */
- 20, /* 32: TRAP #0 */
- 20, /* 33: TRAP #1 */
- 20, /* 34: TRAP #2 */
- 20, /* 35: TRAP #3 */
- 20, /* 36: TRAP #4 */
- 20, /* 37: TRAP #5 */
- 20, /* 38: TRAP #6 */
- 20, /* 39: TRAP #7 */
- 20, /* 40: TRAP #8 */
- 20, /* 41: TRAP #9 */
- 20, /* 42: TRAP #10 */
- 20, /* 43: TRAP #11 */
- 20, /* 44: TRAP #12 */
- 20, /* 45: TRAP #13 */
- 20, /* 46: TRAP #14 */
- 20, /* 47: TRAP #15 */
- 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
- 4, /* 49: FP Inexact Result (unemulated) */
- 4, /* 50: FP Divide by Zero (unemulated) */
- 4, /* 51: FP Underflow (unemulated) */
- 4, /* 52: FP Operand Error (unemulated) */
- 4, /* 53: FP Overflow (unemulated) */
- 4, /* 54: FP Signaling NAN (unemulated) */
- 4, /* 55: FP Unimplemented Data Type (unemulated) */
- 4, /* 56: MMU Configuration Error (unemulated) */
- 4, /* 57: MMU Illegal Operation Error (unemulated) */
- 4, /* 58: MMU Access Level Violation Error (unemulated) */
- 4, /* 59: RESERVED */
- 4, /* 60: RESERVED */
- 4, /* 61: RESERVED */
- 4, /* 62: RESERVED */
- 4, /* 63: RESERVED */
- /* 64-255: User Defined */
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 20, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero */
+ 40, /* 6: CHK */
+ 20, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 25, /* 9: Trace */
+ 20, /* 10: 1010 */
+ 20, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 30, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 30, /* 24: Spurious Interrupt */
+ 30, /* 25: Level 1 Interrupt Autovector */
+ 30, /* 26: Level 2 Interrupt Autovector */
+ 30, /* 27: Level 3 Interrupt Autovector */
+ 30, /* 28: Level 4 Interrupt Autovector */
+ 30, /* 29: Level 5 Interrupt Autovector */
+ 30, /* 30: Level 6 Interrupt Autovector */
+ 30, /* 31: Level 7 Interrupt Autovector */
+ 20, /* 32: TRAP #0 */
+ 20, /* 33: TRAP #1 */
+ 20, /* 34: TRAP #2 */
+ 20, /* 35: TRAP #3 */
+ 20, /* 36: TRAP #4 */
+ 20, /* 37: TRAP #5 */
+ 20, /* 38: TRAP #6 */
+ 20, /* 39: TRAP #7 */
+ 20, /* 40: TRAP #8 */
+ 20, /* 41: TRAP #9 */
+ 20, /* 42: TRAP #10 */
+ 20, /* 43: TRAP #11 */
+ 20, /* 44: TRAP #12 */
+ 20, /* 45: TRAP #13 */
+ 20, /* 46: TRAP #14 */
+ 20, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 040 */ // TODO: these values are not correct
- 4, /* 0: Reset - Initial Stack Pointer */
- 4, /* 1: Reset - Initial Program Counter */
- 50, /* 2: Bus Error (unemulated) */
- 50, /* 3: Address Error (unemulated) */
- 20, /* 4: Illegal Instruction */
- 38, /* 5: Divide by Zero */
- 40, /* 6: CHK */
- 20, /* 7: TRAPV */
- 34, /* 8: Privilege Violation */
- 25, /* 9: Trace */
- 20, /* 10: 1010 */
- 20, /* 11: 1111 */
- 4, /* 12: RESERVED */
- 4, /* 13: Coprocessor Protocol Violation (unemulated) */
- 4, /* 14: Format Error */
- 30, /* 15: Uninitialized Interrupt */
- 4, /* 16: RESERVED */
- 4, /* 17: RESERVED */
- 4, /* 18: RESERVED */
- 4, /* 19: RESERVED */
- 4, /* 20: RESERVED */
- 4, /* 21: RESERVED */
- 4, /* 22: RESERVED */
- 4, /* 23: RESERVED */
- 30, /* 24: Spurious Interrupt */
- 30, /* 25: Level 1 Interrupt Autovector */
- 30, /* 26: Level 2 Interrupt Autovector */
- 30, /* 27: Level 3 Interrupt Autovector */
- 30, /* 28: Level 4 Interrupt Autovector */
- 30, /* 29: Level 5 Interrupt Autovector */
- 30, /* 30: Level 6 Interrupt Autovector */
- 30, /* 31: Level 7 Interrupt Autovector */
- 20, /* 32: TRAP #0 */
- 20, /* 33: TRAP #1 */
- 20, /* 34: TRAP #2 */
- 20, /* 35: TRAP #3 */
- 20, /* 36: TRAP #4 */
- 20, /* 37: TRAP #5 */
- 20, /* 38: TRAP #6 */
- 20, /* 39: TRAP #7 */
- 20, /* 40: TRAP #8 */
- 20, /* 41: TRAP #9 */
- 20, /* 42: TRAP #10 */
- 20, /* 43: TRAP #11 */
- 20, /* 44: TRAP #12 */
- 20, /* 45: TRAP #13 */
- 20, /* 46: TRAP #14 */
- 20, /* 47: TRAP #15 */
- 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
- 4, /* 49: FP Inexact Result (unemulated) */
- 4, /* 50: FP Divide by Zero (unemulated) */
- 4, /* 51: FP Underflow (unemulated) */
- 4, /* 52: FP Operand Error (unemulated) */
- 4, /* 53: FP Overflow (unemulated) */
- 4, /* 54: FP Signaling NAN (unemulated) */
- 4, /* 55: FP Unimplemented Data Type (unemulated) */
- 4, /* 56: MMU Configuration Error (unemulated) */
- 4, /* 57: MMU Illegal Operation Error (unemulated) */
- 4, /* 58: MMU Access Level Violation Error (unemulated) */
- 4, /* 59: RESERVED */
- 4, /* 60: RESERVED */
- 4, /* 61: RESERVED */
- 4, /* 62: RESERVED */
- 4, /* 63: RESERVED */
- /* 64-255: User Defined */
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 20, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero */
+ 40, /* 6: CHK */
+ 20, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 25, /* 9: Trace */
+ 20, /* 10: 1010 */
+ 20, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 30, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 30, /* 24: Spurious Interrupt */
+ 30, /* 25: Level 1 Interrupt Autovector */
+ 30, /* 26: Level 2 Interrupt Autovector */
+ 30, /* 27: Level 3 Interrupt Autovector */
+ 30, /* 28: Level 4 Interrupt Autovector */
+ 30, /* 29: Level 5 Interrupt Autovector */
+ 30, /* 30: Level 6 Interrupt Autovector */
+ 30, /* 31: Level 7 Interrupt Autovector */
+ 20, /* 32: TRAP #0 */
+ 20, /* 33: TRAP #1 */
+ 20, /* 34: TRAP #2 */
+ 20, /* 35: TRAP #3 */
+ 20, /* 36: TRAP #4 */
+ 20, /* 37: TRAP #5 */
+ 20, /* 38: TRAP #6 */
+ 20, /* 39: TRAP #7 */
+ 20, /* 40: TRAP #8 */
+ 20, /* 41: TRAP #9 */
+ 20, /* 42: TRAP #10 */
+ 20, /* 43: TRAP #11 */
+ 20, /* 44: TRAP #12 */
+ 20, /* 45: TRAP #13 */
+ 20, /* 46: TRAP #14 */
+ 20, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* 68340 */
- 4, /* 0: Reset - Initial Stack Pointer */
- 4, /* 1: Reset - Initial Program Counter */
- 50, /* 2: Bus Error (unemulated) */
- 50, /* 3: Address Error (unemulated) */
- 20, /* 4: Illegal Instruction */
- 38, /* 5: Divide by Zero */
- 40, /* 6: CHK */
- 20, /* 7: TRAPV */
- 34, /* 8: Privilege Violation */
- 25, /* 9: Trace */
- 20, /* 10: 1010 */
- 20, /* 11: 1111 */
- 4, /* 12: RESERVED */
- 4, /* 13: Coprocessor Protocol Violation (unemulated) */
- 4, /* 14: Format Error */
- 30, /* 15: Uninitialized Interrupt */
- 4, /* 16: RESERVED */
- 4, /* 17: RESERVED */
- 4, /* 18: RESERVED */
- 4, /* 19: RESERVED */
- 4, /* 20: RESERVED */
- 4, /* 21: RESERVED */
- 4, /* 22: RESERVED */
- 4, /* 23: RESERVED */
- 30, /* 24: Spurious Interrupt */
- 30, /* 25: Level 1 Interrupt Autovector */
- 30, /* 26: Level 2 Interrupt Autovector */
- 30, /* 27: Level 3 Interrupt Autovector */
- 30, /* 28: Level 4 Interrupt Autovector */
- 30, /* 29: Level 5 Interrupt Autovector */
- 30, /* 30: Level 6 Interrupt Autovector */
- 30, /* 31: Level 7 Interrupt Autovector */
- 20, /* 32: TRAP #0 */
- 20, /* 33: TRAP #1 */
- 20, /* 34: TRAP #2 */
- 20, /* 35: TRAP #3 */
- 20, /* 36: TRAP #4 */
- 20, /* 37: TRAP #5 */
- 20, /* 38: TRAP #6 */
- 20, /* 39: TRAP #7 */
- 20, /* 40: TRAP #8 */
- 20, /* 41: TRAP #9 */
- 20, /* 42: TRAP #10 */
- 20, /* 43: TRAP #11 */
- 20, /* 44: TRAP #12 */
- 20, /* 45: TRAP #13 */
- 20, /* 46: TRAP #14 */
- 20, /* 47: TRAP #15 */
- 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
- 4, /* 49: FP Inexact Result (unemulated) */
- 4, /* 50: FP Divide by Zero (unemulated) */
- 4, /* 51: FP Underflow (unemulated) */
- 4, /* 52: FP Operand Error (unemulated) */
- 4, /* 53: FP Overflow (unemulated) */
- 4, /* 54: FP Signaling NAN (unemulated) */
- 4, /* 55: FP Unimplemented Data Type (unemulated) */
- 4, /* 56: MMU Configuration Error (unemulated) */
- 4, /* 57: MMU Illegal Operation Error (unemulated) */
- 4, /* 58: MMU Access Level Violation Error (unemulated) */
- 4, /* 59: RESERVED */
- 4, /* 60: RESERVED */
- 4, /* 61: RESERVED */
- 4, /* 62: RESERVED */
- 4, /* 63: RESERVED */
- /* 64-255: User Defined */
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 20, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero */
+ 40, /* 6: CHK */
+ 20, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 25, /* 9: Trace */
+ 20, /* 10: 1010 */
+ 20, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 30, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 30, /* 24: Spurious Interrupt */
+ 30, /* 25: Level 1 Interrupt Autovector */
+ 30, /* 26: Level 2 Interrupt Autovector */
+ 30, /* 27: Level 3 Interrupt Autovector */
+ 30, /* 28: Level 4 Interrupt Autovector */
+ 30, /* 29: Level 5 Interrupt Autovector */
+ 30, /* 30: Level 6 Interrupt Autovector */
+ 30, /* 31: Level 7 Interrupt Autovector */
+ 20, /* 32: TRAP #0 */
+ 20, /* 33: TRAP #1 */
+ 20, /* 34: TRAP #2 */
+ 20, /* 35: TRAP #3 */
+ 20, /* 36: TRAP #4 */
+ 20, /* 37: TRAP #5 */
+ 20, /* 38: TRAP #6 */
+ 20, /* 39: TRAP #7 */
+ 20, /* 40: TRAP #8 */
+ 20, /* 41: TRAP #9 */
+ 20, /* 42: TRAP #10 */
+ 20, /* 43: TRAP #11 */
+ 20, /* 44: TRAP #12 */
+ 20, /* 45: TRAP #13 */
+ 20, /* 46: TRAP #14 */
+ 20, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
{ /* ColdFire - not correct */
- 4, /* 0: Reset - Initial Stack Pointer */
- 4, /* 1: Reset - Initial Program Counter */
- 50, /* 2: Bus Error (unemulated) */
- 50, /* 3: Address Error (unemulated) */
- 20, /* 4: Illegal Instruction */
- 38, /* 5: Divide by Zero */
- 40, /* 6: CHK */
- 20, /* 7: TRAPV */
- 34, /* 8: Privilege Violation */
- 25, /* 9: Trace */
- 20, /* 10: 1010 */
- 20, /* 11: 1111 */
- 4, /* 12: RESERVED */
- 4, /* 13: Coprocessor Protocol Violation (unemulated) */
- 4, /* 14: Format Error */
- 30, /* 15: Uninitialized Interrupt */
- 4, /* 16: RESERVED */
- 4, /* 17: RESERVED */
- 4, /* 18: RESERVED */
- 4, /* 19: RESERVED */
- 4, /* 20: RESERVED */
- 4, /* 21: RESERVED */
- 4, /* 22: RESERVED */
- 4, /* 23: RESERVED */
- 30, /* 24: Spurious Interrupt */
- 30, /* 25: Level 1 Interrupt Autovector */
- 30, /* 26: Level 2 Interrupt Autovector */
- 30, /* 27: Level 3 Interrupt Autovector */
- 30, /* 28: Level 4 Interrupt Autovector */
- 30, /* 29: Level 5 Interrupt Autovector */
- 30, /* 30: Level 6 Interrupt Autovector */
- 30, /* 31: Level 7 Interrupt Autovector */
- 20, /* 32: TRAP #0 */
- 20, /* 33: TRAP #1 */
- 20, /* 34: TRAP #2 */
- 20, /* 35: TRAP #3 */
- 20, /* 36: TRAP #4 */
- 20, /* 37: TRAP #5 */
- 20, /* 38: TRAP #6 */
- 20, /* 39: TRAP #7 */
- 20, /* 40: TRAP #8 */
- 20, /* 41: TRAP #9 */
- 20, /* 42: TRAP #10 */
- 20, /* 43: TRAP #11 */
- 20, /* 44: TRAP #12 */
- 20, /* 45: TRAP #13 */
- 20, /* 46: TRAP #14 */
- 20, /* 47: TRAP #15 */
- 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
- 4, /* 49: FP Inexact Result (unemulated) */
- 4, /* 50: FP Divide by Zero (unemulated) */
- 4, /* 51: FP Underflow (unemulated) */
- 4, /* 52: FP Operand Error (unemulated) */
- 4, /* 53: FP Overflow (unemulated) */
- 4, /* 54: FP Signaling NAN (unemulated) */
- 4, /* 55: FP Unimplemented Data Type (unemulated) */
- 4, /* 56: MMU Configuration Error (unemulated) */
- 4, /* 57: MMU Illegal Operation Error (unemulated) */
- 4, /* 58: MMU Access Level Violation Error (unemulated) */
- 4, /* 59: RESERVED */
- 4, /* 60: RESERVED */
- 4, /* 61: RESERVED */
- 4, /* 62: RESERVED */
- 4, /* 63: RESERVED */
- /* 64-255: User Defined */
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
- 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
+ 4, /* 0: Reset - Initial Stack Pointer */
+ 4, /* 1: Reset - Initial Program Counter */
+ 50, /* 2: Bus Error (unemulated) */
+ 50, /* 3: Address Error (unemulated) */
+ 20, /* 4: Illegal Instruction */
+ 38, /* 5: Divide by Zero */
+ 40, /* 6: CHK */
+ 20, /* 7: TRAPV */
+ 34, /* 8: Privilege Violation */
+ 25, /* 9: Trace */
+ 20, /* 10: 1010 */
+ 20, /* 11: 1111 */
+ 4, /* 12: RESERVED */
+ 4, /* 13: Coprocessor Protocol Violation (unemulated) */
+ 4, /* 14: Format Error */
+ 30, /* 15: Uninitialized Interrupt */
+ 4, /* 16: RESERVED */
+ 4, /* 17: RESERVED */
+ 4, /* 18: RESERVED */
+ 4, /* 19: RESERVED */
+ 4, /* 20: RESERVED */
+ 4, /* 21: RESERVED */
+ 4, /* 22: RESERVED */
+ 4, /* 23: RESERVED */
+ 30, /* 24: Spurious Interrupt */
+ 30, /* 25: Level 1 Interrupt Autovector */
+ 30, /* 26: Level 2 Interrupt Autovector */
+ 30, /* 27: Level 3 Interrupt Autovector */
+ 30, /* 28: Level 4 Interrupt Autovector */
+ 30, /* 29: Level 5 Interrupt Autovector */
+ 30, /* 30: Level 6 Interrupt Autovector */
+ 30, /* 31: Level 7 Interrupt Autovector */
+ 20, /* 32: TRAP #0 */
+ 20, /* 33: TRAP #1 */
+ 20, /* 34: TRAP #2 */
+ 20, /* 35: TRAP #3 */
+ 20, /* 36: TRAP #4 */
+ 20, /* 37: TRAP #5 */
+ 20, /* 38: TRAP #6 */
+ 20, /* 39: TRAP #7 */
+ 20, /* 40: TRAP #8 */
+ 20, /* 41: TRAP #9 */
+ 20, /* 42: TRAP #10 */
+ 20, /* 43: TRAP #11 */
+ 20, /* 44: TRAP #12 */
+ 20, /* 45: TRAP #13 */
+ 20, /* 46: TRAP #14 */
+ 20, /* 47: TRAP #15 */
+ 4, /* 48: FP Branch or Set on Unknown Condition (unemulated) */
+ 4, /* 49: FP Inexact Result (unemulated) */
+ 4, /* 50: FP Divide by Zero (unemulated) */
+ 4, /* 51: FP Underflow (unemulated) */
+ 4, /* 52: FP Operand Error (unemulated) */
+ 4, /* 53: FP Overflow (unemulated) */
+ 4, /* 54: FP Signaling NAN (unemulated) */
+ 4, /* 55: FP Unimplemented Data Type (unemulated) */
+ 4, /* 56: MMU Configuration Error (unemulated) */
+ 4, /* 57: MMU Illegal Operation Error (unemulated) */
+ 4, /* 58: MMU Access Level Violation Error (unemulated) */
+ 4, /* 59: RESERVED */
+ 4, /* 60: RESERVED */
+ 4, /* 61: RESERVED */
+ 4, /* 62: RESERVED */
+ 4, /* 63: RESERVED */
+ /* 64-255: User Defined */
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,
+ 4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4
},
};
const UINT8 m68ki_ea_idx_cycle_table[64] =
{
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, /* ..01.000 no memory indirect, base NULL */
- 5, /* ..01..01 memory indirect, base NULL, outer NULL */
- 7, /* ..01..10 memory indirect, base NULL, outer 16 */
- 7, /* ..01..11 memory indirect, base NULL, outer 32 */
- 0, 5, 7, 7, 0, 5, 7, 7, 0, 5, 7, 7,
- 2, /* ..10.000 no memory indirect, base 16 */
- 7, /* ..10..01 memory indirect, base 16, outer NULL */
- 9, /* ..10..10 memory indirect, base 16, outer 16 */
- 9, /* ..10..11 memory indirect, base 16, outer 32 */
- 0, 7, 9, 9, 0, 7, 9, 9, 0, 7, 9, 9,
- 6, /* ..11.000 no memory indirect, base 32 */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, /* ..01.000 no memory indirect, base NULL */
+ 5, /* ..01..01 memory indirect, base NULL, outer NULL */
+ 7, /* ..01..10 memory indirect, base NULL, outer 16 */
+ 7, /* ..01..11 memory indirect, base NULL, outer 32 */
+ 0, 5, 7, 7, 0, 5, 7, 7, 0, 5, 7, 7,
+ 2, /* ..10.000 no memory indirect, base 16 */
+ 7, /* ..10..01 memory indirect, base 16, outer NULL */
+ 9, /* ..10..10 memory indirect, base 16, outer 16 */
+ 9, /* ..10..11 memory indirect, base 16, outer 32 */
+ 0, 7, 9, 9, 0, 7, 9, 9, 0, 7, 9, 9,
+ 6, /* ..11.000 no memory indirect, base 32 */
11, /* ..11..01 memory indirect, base 32, outer NULL */
13, /* ..11..10 memory indirect, base 32, outer 16 */
13, /* ..11..11 memory indirect, base 32, outer 32 */
- 0, 11, 13, 13, 0, 11, 13, 13, 0, 11, 13, 13
+ 0, 11, 13, 13, 0, 11, 13, 13, 0, 11, 13, 13
};
@@ -630,13 +630,13 @@ const UINT8 m68ki_ea_idx_cycle_table[64] =
CPU STATE DESCRIPTION
***************************************************************************/
-#define MASK_ALL (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340 )
-#define MASK_24BIT_SPACE (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)
-#define MASK_32BIT_SPACE (CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340 )
-#define MASK_010_OR_LATER (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_68340)
-#define MASK_020_OR_LATER (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340)
-#define MASK_030_OR_LATER (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)
-#define MASK_040_OR_LATER (CPU_TYPE_040 | CPU_TYPE_EC040)
+#define MASK_ALL (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340 )
+#define MASK_24BIT_SPACE (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020)
+#define MASK_32BIT_SPACE (CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340 )
+#define MASK_010_OR_LATER (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040 | CPU_TYPE_68340)
+#define MASK_020_OR_LATER (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_EC030 | CPU_TYPE_030 | CPU_TYPE_EC040 | CPU_TYPE_040 | CPU_TYPE_68340)
+#define MASK_030_OR_LATER (CPU_TYPE_030 | CPU_TYPE_EC030 | CPU_TYPE_040 | CPU_TYPE_EC040)
+#define MASK_040_OR_LATER (CPU_TYPE_040 | CPU_TYPE_EC040)
@@ -679,7 +679,7 @@ static void m68k_postload(m68ki_cpu_core *m68k)
{
m68ki_set_sr_noint_nosp(m68k, m68k->save_sr);
m68k->stopped = m68k->save_stopped ? STOP_LEVEL_STOP : 0
- | m68k->save_halted ? STOP_LEVEL_HALT : 0;
+ | m68k->save_halted ? STOP_LEVEL_HALT : 0;
m68ki_jump(m68k, REG_PC(m68k));
}
@@ -782,7 +782,7 @@ static CPU_EXECUTE( m68k )
/* Make sure we're not stopped */
if(!m68k->stopped)
{
- /* Return point if we had an address error */
+ /* Return point if we had an address error */
m68ki_set_address_error_trap(m68k); /* auto-disable (see m68kcpu.h) */
/* Main loop. Keep going until we run out of clock cycles */
@@ -902,8 +902,8 @@ static CPU_INIT( m68k )
m68k->int_ack_callback = irqcallback;
/* disable all MMUs */
- m68k->has_pmmu = 0;
- m68k->has_hmmu = 0;
+ m68k->has_pmmu = 0;
+ m68k->has_hmmu = 0;
m68k->pmmu_enabled = 0;
m68k->hmmu_enabled = 0;
@@ -1192,50 +1192,50 @@ static CPU_GET_INFO( m68k )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m68ki_cpu_core); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; /* there is no level 0 */ break;
- case CPUINFO_INT_INPUT_STATE + 1: info->i = (m68k->virq_state >> 1) & 1; break;
- case CPUINFO_INT_INPUT_STATE + 2: info->i = (m68k->virq_state >> 2) & 1; break;
- case CPUINFO_INT_INPUT_STATE + 3: info->i = (m68k->virq_state >> 3) & 1; break;
- case CPUINFO_INT_INPUT_STATE + 4: info->i = (m68k->virq_state >> 4) & 1; break;
- case CPUINFO_INT_INPUT_STATE + 5: info->i = (m68k->virq_state >> 5) & 1; break;
- case CPUINFO_INT_INPUT_STATE + 6: info->i = (m68k->virq_state >> 6) & 1; break;
- case CPUINFO_INT_INPUT_STATE + 7: info->i = (m68k->virq_state >> 7) & 1; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(m68ki_cpu_core); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 4; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; /* there is no level 0 */ break;
+ case CPUINFO_INT_INPUT_STATE + 1: info->i = (m68k->virq_state >> 1) & 1; break;
+ case CPUINFO_INT_INPUT_STATE + 2: info->i = (m68k->virq_state >> 2) & 1; break;
+ case CPUINFO_INT_INPUT_STATE + 3: info->i = (m68k->virq_state >> 3) & 1; break;
+ case CPUINFO_INT_INPUT_STATE + 4: info->i = (m68k->virq_state >> 4) & 1; break;
+ case CPUINFO_INT_INPUT_STATE + 5: info->i = (m68k->virq_state >> 5) & 1; break;
+ case CPUINFO_INT_INPUT_STATE + 6: info->i = (m68k->virq_state >> 6) & 1; break;
+ case CPUINFO_INT_INPUT_STATE + 7: info->i = (m68k->virq_state >> 7) & 1; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68k); break;
- case CPUINFO_FCT_INIT: /* set per-core */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(m68k); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68k); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68k); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(m68k); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(m68k); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(m68k); break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68k); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(m68k); break;
+ case CPUINFO_FCT_INIT: /* set per-core */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(m68k); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(m68k); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(m68k); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(m68k); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(m68k); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(m68k); break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68k); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &m68k->remaining_cycles; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: /* set per-core */ break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola 68K"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "4.95"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Karl Stenerud. All rights reserved. (2.1 fixes HJB, FPU+MMU by RB+HO+OG)"); break;
+ case CPUINFO_STR_NAME: /* set per-core */ break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola 68K"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "4.95"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Karl Stenerud. All rights reserved. (2.1 fixes HJB, FPU+MMU by RB+HO+OG)"); break;
}
}
@@ -1260,7 +1260,7 @@ void m68k_set_instruction_hook(device_t *device, instruction_hook_t ihook)
{
m68ki_cpu_core *m68k = m68k_get_safe_token(device);
- m68k->instruction_hook = ihook;
+ m68k->instruction_hook = ihook;
}
/****************************************************************************
@@ -1944,9 +1944,9 @@ static CPU_INIT( m68000 )
m68k->cyc_movem_l = 3;
m68k->cyc_shift = 1;
m68k->cyc_reset = 132;
- m68k->has_pmmu = 0;
- m68k->has_hmmu = 0;
- m68k->has_fpu = 0;
+ m68k->has_pmmu = 0;
+ m68k->has_hmmu = 0;
+ m68k->has_fpu = 0;
define_state(device);
}
@@ -1956,12 +1956,12 @@ CPU_GET_INFO( m68000 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68000); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68000); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68000"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68000"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -1980,12 +1980,12 @@ CPU_GET_INFO( m68301 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68301); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68301); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68301"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68301"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2048,8 +2048,8 @@ static CPU_INIT( m68307 )
CPU_INIT_CALL(m68000);
/* basic CS logic, timers, mbus, serial logic
- set via remappable register
- */
+ set via remappable register
+ */
new(&m68k->memory) m68k_memory_interface;
m68k->memory.init16_m68307(*m68k->program);
@@ -2108,10 +2108,10 @@ static WRITE16_HANDLER( m68307_internal_base_w )
base = (m68k->m68307_base & 0x0fff) << 12;
//mask = (m68k->m68307_base & 0xe000) >> 13;
//if ( m68k->m68307_base & 0x1000 ) mask |= 7;
- m68k->internal->unmap_readwrite(base+0x000, base+0x04f);
- m68k->internal->unmap_readwrite(base+0x100, base+0x11f);
- m68k->internal->unmap_readwrite(base+0x120, base+0x13f);
- m68k->internal->unmap_readwrite(base+0x140, base+0x149);
+ m68k->internal->unmap_readwrite(base+0x000, base+0x04f);
+ m68k->internal->unmap_readwrite(base+0x100, base+0x11f);
+ m68k->internal->unmap_readwrite(base+0x120, base+0x13f);
+ m68k->internal->unmap_readwrite(base+0x140, base+0x149);
/* store new base address */
COMBINE_DATA(&m68k->m68307_base);
@@ -2149,18 +2149,18 @@ CPU_GET_INFO( m68307 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68307); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68307); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68307"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68307"); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(m68307_internal_map); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2195,8 +2195,8 @@ static CPU_INIT( m68008 )
m68k->cyc_movem_l = 3;
m68k->cyc_shift = 1;
m68k->cyc_reset = 132;
- m68k->has_pmmu = 0;
- m68k->has_fpu = 0;
+ m68k->has_pmmu = 0;
+ m68k->has_fpu = 0;
define_state(device);
}
@@ -2206,16 +2206,16 @@ CPU_GET_INFO( m68008 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68008); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68008); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68008"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68008"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2224,16 +2224,16 @@ CPU_GET_INFO( m68008plcc )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 22; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 22; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68008); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68008); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68008"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68008"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2268,8 +2268,8 @@ static CPU_INIT( m68010 )
m68k->cyc_movem_l = 3;
m68k->cyc_shift = 1;
m68k->cyc_reset = 130;
- m68k->has_pmmu = 0;
- m68k->has_fpu = 0;
+ m68k->has_pmmu = 0;
+ m68k->has_fpu = 0;
define_state(device);
}
@@ -2279,12 +2279,12 @@ CPU_GET_INFO( m68010 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68010); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68010); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68010"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68010"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2328,20 +2328,20 @@ CPU_GET_INFO( m68020 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68020); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68020); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68020"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68020"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2352,8 +2352,8 @@ static CPU_INIT( m68020pmmu )
CPU_INIT_CALL(m68020);
- m68k->has_pmmu = 1;
- m68k->has_fpu = 1;
+ m68k->has_pmmu = 1;
+ m68k->has_fpu = 1;
// hack alert: we use placement new to ensure we are properly initialized
// because we live in the device state which is allocated as bytes
@@ -2367,12 +2367,12 @@ CPU_GET_INFO( m68020pmmu )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68020pmmu); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68020pmmu); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68020, 68851"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68020, 68851"); break;
- default: CPU_GET_INFO_CALL(m68020); break;
+ default: CPU_GET_INFO_CALL(m68020); break;
}
}
@@ -2397,13 +2397,13 @@ CPU_GET_INFO( m68020hmmu )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68020hmmu); break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68khmmu); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68020hmmu); break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(m68khmmu); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68020, Apple HMMU"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68020, Apple HMMU"); break;
- default: CPU_GET_INFO_CALL(m68020); break;
+ default: CPU_GET_INFO_CALL(m68020); break;
}
}
@@ -2437,8 +2437,8 @@ static CPU_INIT( m68ec020 )
m68k->cyc_movem_l = 2;
m68k->cyc_shift = 0;
m68k->cyc_reset = 518;
- m68k->has_pmmu = 0;
- m68k->has_fpu = 0;
+ m68k->has_pmmu = 0;
+ m68k->has_fpu = 0;
define_state(device);
}
@@ -2448,15 +2448,15 @@ CPU_GET_INFO( m68ec020 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68ec020); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68ec020); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68EC020"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68EC020"); break;
- default: CPU_GET_INFO_CALL(m68020); break;
+ default: CPU_GET_INFO_CALL(m68020); break;
}
}
@@ -2490,8 +2490,8 @@ static CPU_INIT( m68030 )
m68k->cyc_movem_l = 2;
m68k->cyc_shift = 0;
m68k->cyc_reset = 518;
- m68k->has_pmmu = 1;
- m68k->has_fpu = 1;
+ m68k->has_pmmu = 1;
+ m68k->has_fpu = 1;
define_state(device);
}
@@ -2501,20 +2501,20 @@ CPU_GET_INFO( m68030 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68030); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68030); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68030"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68030"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2549,8 +2549,8 @@ static CPU_INIT( m68ec030 )
m68k->cyc_movem_l = 2;
m68k->cyc_shift = 0;
m68k->cyc_reset = 518;
- m68k->has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */
- m68k->has_fpu = 1;
+ m68k->has_pmmu = 0; /* EC030 lacks the PMMU and is effectively a die-shrink 68020 */
+ m68k->has_fpu = 1;
define_state(device);
}
@@ -2560,12 +2560,12 @@ CPU_GET_INFO( m68ec030 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68ec030); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68ec030); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68EC030"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68EC030"); break;
- default: CPU_GET_INFO_CALL(m68030); break;
+ default: CPU_GET_INFO_CALL(m68030); break;
}
}
@@ -2599,8 +2599,8 @@ static CPU_INIT( m68040 )
m68k->cyc_movem_l = 2;
m68k->cyc_shift = 0;
m68k->cyc_reset = 518;
- m68k->has_pmmu = 1;
- m68k->has_fpu = 1;
+ m68k->has_pmmu = 1;
+ m68k->has_fpu = 1;
define_state(device);
}
@@ -2610,20 +2610,20 @@ CPU_GET_INFO( m68040 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68040); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68040); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68040"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68040"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2657,8 +2657,8 @@ static CPU_INIT( m68ec040 )
m68k->cyc_movem_l = 2;
m68k->cyc_shift = 0;
m68k->cyc_reset = 518;
- m68k->has_pmmu = 0;
- m68k->has_fpu = 0;
+ m68k->has_pmmu = 0;
+ m68k->has_fpu = 0;
define_state(device);
}
@@ -2668,12 +2668,12 @@ CPU_GET_INFO( m68ec040 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68ec040); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68ec040); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68EC040"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68EC040"); break;
- default: CPU_GET_INFO_CALL(m68040); break;
+ default: CPU_GET_INFO_CALL(m68040); break;
}
}
@@ -2707,8 +2707,8 @@ static CPU_INIT( m68lc040 )
m68k->cyc_movem_l = 2;
m68k->cyc_shift = 0;
m68k->cyc_reset = 518;
- m68k->has_pmmu = 1;
- m68k->has_fpu = 0;
+ m68k->has_pmmu = 1;
+ m68k->has_fpu = 0;
define_state(device);
}
@@ -2718,12 +2718,12 @@ CPU_GET_INFO( m68lc040 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68lc040); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68lc040); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "68LC040"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "68LC040"); break;
- default: CPU_GET_INFO_CALL(m68040); break;
+ default: CPU_GET_INFO_CALL(m68040); break;
}
}
@@ -2745,15 +2745,15 @@ CPU_GET_INFO( scc68070 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(scc68070); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(scc68070); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SCC68070"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SCC68070"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2872,22 +2872,22 @@ CPU_GET_INFO( m68340 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(m68340_internal_map); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68340); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(m68340); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Freescale 68340"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Freescale 68340"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
@@ -2931,20 +2931,20 @@ CPU_GET_INFO( mcf5206e )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 158; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(coldfire); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(coldfire); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MCF5206E"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MCF5206E"); break;
- default: CPU_GET_INFO_CALL(m68k); break;
+ default: CPU_GET_INFO_CALL(m68k); break;
}
}
diff --git a/src/emu/cpu/m68000/m68kcpu.h b/src/emu/cpu/m68000/m68kcpu.h
index a264f2cf21a..7c87d0d7b48 100644
--- a/src/emu/cpu/m68000/m68kcpu.h
+++ b/src/emu/cpu/m68000/m68kcpu.h
@@ -74,7 +74,7 @@ typedef class _m68ki_cpu_core m68ki_cpu_core;
#define FUNCTION_CODE_CPU_SPACE 7
/* CPU types for deciding what to emulate */
-#define CPU_TYPE_000 (0x00000001)
+#define CPU_TYPE_000 (0x00000001)
#define CPU_TYPE_008 (0x00000002)
#define CPU_TYPE_010 (0x00000004)
#define CPU_TYPE_EC020 (0x00000008)
@@ -102,7 +102,7 @@ typedef class _m68ki_cpu_core m68ki_cpu_core;
#define RUN_MODE_BERR_AERR_RESET 1
/* MMU constants */
-#define MMU_ATC_ENTRIES (22) // 68851 has 64, 030 has 22
+#define MMU_ATC_ENTRIES (22) // 68851 has 64, 030 has 22
/* instruction cache constants */
#define M68K_IC_SIZE 128
@@ -215,7 +215,7 @@ typedef class _m68ki_cpu_core m68ki_cpu_core;
#define REG_DA(M) (M)->dar /* easy access to data and address regs */
#define REG_D(M) (M)->dar
#define REG_A(M) ((M)->dar+8)
-#define REG_PPC(M) (M)->ppc
+#define REG_PPC(M) (M)->ppc
#define REG_PC(M) (M)->pc
#define REG_SP_BASE(M) (M)->sp
#define REG_USP(M) (M)->sp[0]
@@ -476,52 +476,52 @@ typedef class _m68ki_cpu_core m68ki_cpu_core;
/* Get the condition code register */
-#define m68ki_get_ccr(M) ((COND_XS(M) >> 4) | \
- (COND_MI(M) >> 4) | \
- (COND_EQ(M) << 2) | \
- (COND_VS(M) >> 6) | \
- (COND_CS(M) >> 8))
+#define m68ki_get_ccr(M) ((COND_XS(M) >> 4) | \
+ (COND_MI(M) >> 4) | \
+ (COND_EQ(M) << 2) | \
+ (COND_VS(M) >> 6) | \
+ (COND_CS(M) >> 8))
/* Get the status register */
-#define m68ki_get_sr(M) ((M)->t1_flag | \
- (M)->t0_flag | \
- ((M)->s_flag << 11) | \
- ((M)->m_flag << 11) | \
- (M)->int_mask | \
- m68ki_get_ccr(M))
+#define m68ki_get_sr(M) ((M)->t1_flag | \
+ (M)->t0_flag | \
+ ((M)->s_flag << 11) | \
+ ((M)->m_flag << 11) | \
+ (M)->int_mask | \
+ m68ki_get_ccr(M))
/* ----------------------------- Read / Write ----------------------------- */
/* Read from the current address space */
-#define m68ki_read_8(M, A) m68ki_read_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
-#define m68ki_read_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
-#define m68ki_read_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_8(M, A) m68ki_read_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
/* Write to the current data space */
-#define m68ki_write_8(M, A, V) m68ki_write_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
-#define m68ki_write_16(M, A, V) m68ki_write_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
-#define m68ki_write_32(M, A, V) m68ki_write_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
-#define m68ki_write_32_pd(M, A, V) m68ki_write_32_pd_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
+#define m68ki_write_8(M, A, V) m68ki_write_8_fc (M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
+#define m68ki_write_16(M, A, V) m68ki_write_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
+#define m68ki_write_32(M, A, V) m68ki_write_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
+#define m68ki_write_32_pd(M, A, V) m68ki_write_32_pd_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA, V)
/* map read immediate 8 to read immediate 16 */
-#define m68ki_read_imm_8(M) MASK_OUT_ABOVE_8(m68ki_read_imm_16(M))
+#define m68ki_read_imm_8(M) MASK_OUT_ABOVE_8(m68ki_read_imm_16(M))
/* Map PC-relative reads */
-#define m68ki_read_pcrel_8(M, A) m68k_read_pcrelative_8(M, A)
-#define m68ki_read_pcrel_16(M, A) m68k_read_pcrelative_16(M, A)
-#define m68ki_read_pcrel_32(M, A) m68k_read_pcrelative_32(M, A)
+#define m68ki_read_pcrel_8(M, A) m68k_read_pcrelative_8(M, A)
+#define m68ki_read_pcrel_16(M, A) m68k_read_pcrelative_16(M, A)
+#define m68ki_read_pcrel_32(M, A) m68k_read_pcrelative_32(M, A)
/* Read from the program space */
-#define m68ki_read_program_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM)
+#define m68ki_read_program_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM)
#define m68ki_read_program_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM)
#define m68ki_read_program_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_PROGRAM)
/* Read from the data space */
-#define m68ki_read_data_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
-#define m68ki_read_data_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
-#define m68ki_read_data_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_data_8(M, A) m68ki_read_8_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_data_16(M, A) m68ki_read_16_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
+#define m68ki_read_data_32(M, A) m68ki_read_32_fc(M, A, (M)->s_flag | FUNCTION_CODE_USER_DATA)
@@ -555,8 +555,8 @@ public:
void init32mmu(address_space &space);
void init32hmmu(address_space &space);
- offs_t opcode_xor; // Address Calculation
- m68k_readimm16_delegate readimm16; // Immediate read 16 bit
+ offs_t opcode_xor; // Address Calculation
+ m68k_readimm16_delegate readimm16; // Immediate read 16 bit
m68k_read8_delegate read8;
m68k_read16_delegate read16;
m68k_read32_delegate read32;
@@ -603,9 +603,9 @@ class _m68ki_cpu_core
public:
UINT32 cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
- UINT32 dasm_type; /* disassembly type */
+ UINT32 dasm_type; /* disassembly type */
UINT32 dar[16]; /* Data and Address Registers */
- UINT32 ppc; /* Previous program counter */
+ UINT32 ppc; /* Previous program counter */
UINT32 pc; /* Program Counter */
UINT32 sp[7]; /* User, Interrupt, and Master Stack Pointers */
UINT32 vbr; /* Vector Base Register (m68010+) */
@@ -676,7 +676,7 @@ public:
const UINT8* cyc_exception;
/* Callbacks to host */
- device_irq_acknowledge_callback int_ack_callback; /* Interrupt Acknowledge */
+ device_irq_acknowledge_callback int_ack_callback; /* Interrupt Acknowledge */
m68k_bkpt_ack_func bkpt_ack_callback; /* Breakpoint Acknowledge */
m68k_reset_func reset_instr_callback; /* Called when a RESET instruction is encountered */
m68k_cmpild_func cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
@@ -689,7 +689,7 @@ public:
offs_t encrypted_start;
offs_t encrypted_end;
- UINT32 iotemp;
+ UINT32 iotemp;
/* save state data */
UINT16 save_sr;
@@ -699,7 +699,7 @@ public:
/* PMMU registers */
UINT32 mmu_crp_aptr, mmu_crp_limit;
UINT32 mmu_srp_aptr, mmu_srp_limit;
- UINT32 mmu_urp_aptr; /* 040 only */
+ UINT32 mmu_urp_aptr; /* 040 only */
UINT32 mmu_tc;
UINT16 mmu_sr;
UINT32 mmu_sr_040;
@@ -733,8 +733,8 @@ public:
int m68307_currentcs;
/* 68340 peripheral modules */
- m68340_sim* m68340SIM;
- m68340_dma* m68340DMA;
+ m68340_sim* m68340SIM;
+ m68340_dma* m68340DMA;
m68340_serial* m68340SERIAL;
m68340_timer* m68340TIMER;
@@ -766,22 +766,22 @@ INLINE m68ki_cpu_core *m68k_get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == M68000 ||
- device->type() == M68301 ||
- device->type() == M68307 ||
- device->type() == M68008 ||
- device->type() == M68008PLCC ||
- device->type() == M68010 ||
- device->type() == M68EC020 ||
- device->type() == M68020 ||
- device->type() == M68020HMMU ||
- device->type() == M68020PMMU ||
- device->type() == M68EC030 ||
- device->type() == M68030 ||
- device->type() == M68EC040 ||
- device->type() == M68040 ||
- device->type() == SCC68070 ||
- device->type() == MCF5206E ||
- device->type() == M68340);
+ device->type() == M68301 ||
+ device->type() == M68307 ||
+ device->type() == M68008 ||
+ device->type() == M68008PLCC ||
+ device->type() == M68010 ||
+ device->type() == M68EC020 ||
+ device->type() == M68020 ||
+ device->type() == M68020HMMU ||
+ device->type() == M68020PMMU ||
+ device->type() == M68EC030 ||
+ device->type() == M68030 ||
+ device->type() == M68EC040 ||
+ device->type() == M68040 ||
+ device->type() == SCC68070 ||
+ device->type() == MCF5206E ||
+ device->type() == M68340);
return (m68ki_cpu_core *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -1567,12 +1567,12 @@ INLINE void m68ki_stack_frame_buserr(m68ki_cpu_core *m68k, UINT32 sr)
m68ki_push_32(m68k, REG_PC(m68k));
m68ki_push_16(m68k, sr);
m68ki_push_16(m68k, m68k->ir);
- m68ki_push_32(m68k, m68k->aerr_address); /* access address */
+ m68ki_push_32(m68k, m68k->aerr_address); /* access address */
/* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
- * R/W 0 = write, 1 = read
- * I/N 0 = instruction, 1 = not
- * FC 3-bit function code
- */
+ * R/W 0 = write, 1 = read
+ * I/N 0 = instruction, 1 = not
+ * FC 3-bit function code
+ */
m68ki_push_16(m68k, m68k->aerr_write_mode | m68k->instr_mode | m68k->aerr_fc);
}
@@ -1582,9 +1582,9 @@ INLINE void m68ki_stack_frame_buserr(m68ki_cpu_core *m68k, UINT32 sr)
INLINE void m68ki_stack_frame_1000(m68ki_cpu_core *m68k, UINT32 pc, UINT32 sr, UINT32 vector)
{
/* VERSION
- * NUMBER
- * INTERNAL INFORMATION, 16 WORDS
- */
+ * NUMBER
+ * INTERNAL INFORMATION, 16 WORDS
+ */
m68ki_fake_push_32(m68k);
m68ki_fake_push_32(m68k);
m68ki_fake_push_32(m68k);
@@ -1635,7 +1635,7 @@ INLINE void m68ki_stack_frame_1000(m68ki_cpu_core *m68k, UINT32 pc, UINT32 sr, U
*/
INLINE void m68ki_stack_frame_1010(m68ki_cpu_core *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address)
{
- int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
+ int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
int orig_fc = m68k->mmu_tmp_buserror_fc;
/* INTERNAL REGISTER */
@@ -1687,7 +1687,7 @@ INLINE void m68ki_stack_frame_1010(m68ki_cpu_core *m68k, UINT32 sr, UINT32 vecto
*/
INLINE void m68ki_stack_frame_1011(m68ki_cpu_core *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address)
{
- int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
+ int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
int orig_fc = m68k->mmu_tmp_buserror_fc;
/* INTERNAL REGISTERS (18 words) */
@@ -1761,7 +1761,7 @@ INLINE void m68ki_stack_frame_1011(m68ki_cpu_core *m68k, UINT32 sr, UINT32 vecto
*/
INLINE void m68ki_stack_frame_0111(m68ki_cpu_core *m68k, UINT32 sr, UINT32 vector, UINT32 pc, UINT32 fault_address, bool in_mmu)
{
- int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
+ int orig_rw = m68k->mmu_tmp_buserror_rw; // this gets splatted by the following pushes, so save it now
int orig_fc = m68k->mmu_tmp_buserror_fc;
/* INTERNAL REGISTERS (18 words) */
@@ -1932,9 +1932,9 @@ INLINE void m68ki_exception_address_error(m68ki_cpu_core *m68k)
UINT32 sr = m68ki_init_exception(m68k);
/* If we were processing a bus error, address error, or reset,
- * this is a catastrophic failure.
- * Halt the CPU
- */
+ * this is a catastrophic failure.
+ * Halt the CPU
+ */
if(m68k->run_mode == RUN_MODE_BERR_AERR_RESET)
{
m68k->memory.read8(0x00ffff01);
@@ -2003,7 +2003,7 @@ INLINE void m68ki_exception_interrupt(m68ki_cpu_core *m68k, UINT32 int_level)
if(m68k->m_flag && CPU_TYPE_IS_EC020_PLUS(m68k->cpu_type))
{
/* Create throwaway frame */
- m68ki_set_sm_flag(m68k, m68k->s_flag); /* clear M */
+ m68ki_set_sm_flag(m68k, m68k->s_flag); /* clear M */
sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
m68ki_stack_frame_0001(m68k, REG_PC(m68k), sr, vector);
}
diff --git a/src/emu/cpu/m68000/m68kdasm.c b/src/emu/cpu/m68000/m68kdasm.c
index 112ebbb29d2..887f84b7cfd 100644
--- a/src/emu/cpu/m68000/m68kdasm.c
+++ b/src/emu/cpu/m68000/m68kdasm.c
@@ -82,26 +82,26 @@
#define TYPE_68020 8
#define TYPE_68030 16
#define TYPE_68040 32
-#define TYPE_68340 64 // (CPU32)
+#define TYPE_68340 64 // (CPU32)
#define TYPE_COLDFIRE 128
-#define M68000_ONLY (TYPE_68000 | TYPE_68008)
+#define M68000_ONLY (TYPE_68000 | TYPE_68008)
-#define M68010_ONLY TYPE_68010
-#define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010)
-#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE)
+#define M68010_ONLY TYPE_68010
+#define M68010_LESS (TYPE_68000 | TYPE_68008 | TYPE_68010)
+#define M68010_PLUS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE)
-#define M68020_ONLY (TYPE_68020 | TYPE_68340)
-#define M68020_LESS (TYPE_68010 | TYPE_68020 | TYPE_68340)
-#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE)
+#define M68020_ONLY (TYPE_68020 | TYPE_68340)
+#define M68020_LESS (TYPE_68010 | TYPE_68020 | TYPE_68340)
+#define M68020_PLUS (TYPE_68020 | TYPE_68030 | TYPE_68040 | TYPE_68340 | TYPE_COLDFIRE)
-#define M68030_ONLY TYPE_68030
-#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68340 )
-#define M68030_PLUS (TYPE_68030 | TYPE_68040)
+#define M68030_ONLY TYPE_68030
+#define M68030_LESS (TYPE_68010 | TYPE_68020 | TYPE_68030 | TYPE_68340 )
+#define M68030_PLUS (TYPE_68030 | TYPE_68040)
-#define M68040_PLUS TYPE_68040
+#define M68040_PLUS TYPE_68040
-#define COLDFIRE TYPE_COLDFIRE
+#define COLDFIRE TYPE_COLDFIRE
/* Extension word formats */
#define EXT_8BIT_DISPLACEMENT(A) ((A)&0xff)
@@ -125,7 +125,7 @@
/* Opcode flags */
-#define SET_OPCODE_FLAGS(x) g_opcode_type = x;
+#define SET_OPCODE_FLAGS(x) g_opcode_type = x;
#define COMBINE_OPCODE_FLAGS(x) ((x) | g_opcode_type | DASMFLAG_SUPPORTED)
@@ -216,14 +216,14 @@ static const char *const g_cc[16] =
static const char *const g_cpcc[64] =
{/* 000 001 010 011 100 101 110 111 */
- "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
- "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
- "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */
- "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
- "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
- "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
- "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
- "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
+ "f", "eq", "ogt", "oge", "olt", "ole", "ogl", "or", /* 000 */
+ "un", "ueq", "ugt", "uge", "ult", "ule", "ne", "t", /* 001 */
+ "sf", "seq", "gt", "ge", "lt", "le", "gl" "gle", /* 010 */
+ "ngle", "ngl", "nle", "nlt", "nge", "ngt", "sne", "st", /* 011 */
+ "?", "?", "?", "?", "?", "?", "?", "?", /* 100 */
+ "?", "?", "?", "?", "?", "?", "?", "?", /* 101 */
+ "?", "?", "?", "?", "?", "?", "?", "?", /* 110 */
+ "?", "?", "?", "?", "?", "?", "?", "?" /* 111 */
};
static const char *const g_mmuregs[8] =
@@ -241,13 +241,13 @@ static const char *const g_mmucond[16] =
/* =========================== UTILITY FUNCTIONS ========================== */
/* ======================================================================== */
-#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \
- if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \
- { \
- if((g_cpu_ir & 0xf000) == 0xf000) \
- d68000_1111(); \
- else d68000_illegal(); \
- return; \
+#define LIMIT_CPU_TYPES(ALLOWED_CPU_TYPES) \
+ if(!(g_cpu_type & ALLOWED_CPU_TYPES)) \
+ { \
+ if((g_cpu_ir & 0xf000) == 0xf000) \
+ d68000_1111(); \
+ else d68000_illegal(); \
+ return; \
}
static UINT32 dasm_read_imm_8(UINT32 advance)
@@ -262,7 +262,7 @@ static UINT32 dasm_read_imm_16(UINT32 advance)
{
UINT32 result;
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 8) |
- g_rawop[g_cpu_pc + 1 - g_rawbasepc];
+ g_rawop[g_cpu_pc + 1 - g_rawbasepc];
g_cpu_pc += advance;
return result;
}
@@ -271,9 +271,9 @@ static UINT32 dasm_read_imm_32(UINT32 advance)
{
UINT32 result;
result = (g_rawop[g_cpu_pc + 0 - g_rawbasepc] << 24) |
- (g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |
- (g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |
- g_rawop[g_cpu_pc + 3 - g_rawbasepc];
+ (g_rawop[g_cpu_pc + 1 - g_rawbasepc] << 16) |
+ (g_rawop[g_cpu_pc + 2 - g_rawbasepc] << 8) |
+ g_rawop[g_cpu_pc + 3 - g_rawbasepc];
g_cpu_pc += advance;
return result;
}
@@ -1747,61 +1747,61 @@ static void d68040_fpu(void)
{
switch(w2 & 0x7f)
{
- case 0x00: sprintf(mnemonic, "fmove"); break;
- case 0x01: sprintf(mnemonic, "fint"); break;
- case 0x02: sprintf(mnemonic, "fsinh"); break;
- case 0x03: sprintf(mnemonic, "fintrz"); break;
- case 0x04: sprintf(mnemonic, "fsqrt"); break;
- case 0x06: sprintf(mnemonic, "flognp1"); break;
- case 0x08: sprintf(mnemonic, "fetoxm1"); break;
- case 0x09: sprintf(mnemonic, "ftanh1"); break;
- case 0x0a: sprintf(mnemonic, "fatan"); break;
- case 0x0c: sprintf(mnemonic, "fasin"); break;
- case 0x0d: sprintf(mnemonic, "fatanh"); break;
- case 0x0e: sprintf(mnemonic, "fsin"); break;
- case 0x0f: sprintf(mnemonic, "ftan"); break;
- case 0x10: sprintf(mnemonic, "fetox"); break;
- case 0x11: sprintf(mnemonic, "ftwotox"); break;
- case 0x12: sprintf(mnemonic, "ftentox"); break;
- case 0x14: sprintf(mnemonic, "flogn"); break;
- case 0x15: sprintf(mnemonic, "flog10"); break;
- case 0x16: sprintf(mnemonic, "flog2"); break;
- case 0x18: sprintf(mnemonic, "fabs"); break;
- case 0x19: sprintf(mnemonic, "fcosh"); break;
- case 0x1a: sprintf(mnemonic, "fneg"); break;
- case 0x1c: sprintf(mnemonic, "facos"); break;
- case 0x1d: sprintf(mnemonic, "fcos"); break;
- case 0x1e: sprintf(mnemonic, "fgetexp"); break;
- case 0x1f: sprintf(mnemonic, "fgetman"); break;
- case 0x20: sprintf(mnemonic, "fdiv"); break;
- case 0x21: sprintf(mnemonic, "fmod"); break;
- case 0x22: sprintf(mnemonic, "fadd"); break;
- case 0x23: sprintf(mnemonic, "fmul"); break;
- case 0x24: sprintf(mnemonic, "fsgldiv"); break;
- case 0x25: sprintf(mnemonic, "frem"); break;
- case 0x26: sprintf(mnemonic, "fscale"); break;
- case 0x27: sprintf(mnemonic, "fsglmul"); break;
- case 0x28: sprintf(mnemonic, "fsub"); break;
+ case 0x00: sprintf(mnemonic, "fmove"); break;
+ case 0x01: sprintf(mnemonic, "fint"); break;
+ case 0x02: sprintf(mnemonic, "fsinh"); break;
+ case 0x03: sprintf(mnemonic, "fintrz"); break;
+ case 0x04: sprintf(mnemonic, "fsqrt"); break;
+ case 0x06: sprintf(mnemonic, "flognp1"); break;
+ case 0x08: sprintf(mnemonic, "fetoxm1"); break;
+ case 0x09: sprintf(mnemonic, "ftanh1"); break;
+ case 0x0a: sprintf(mnemonic, "fatan"); break;
+ case 0x0c: sprintf(mnemonic, "fasin"); break;
+ case 0x0d: sprintf(mnemonic, "fatanh"); break;
+ case 0x0e: sprintf(mnemonic, "fsin"); break;
+ case 0x0f: sprintf(mnemonic, "ftan"); break;
+ case 0x10: sprintf(mnemonic, "fetox"); break;
+ case 0x11: sprintf(mnemonic, "ftwotox"); break;
+ case 0x12: sprintf(mnemonic, "ftentox"); break;
+ case 0x14: sprintf(mnemonic, "flogn"); break;
+ case 0x15: sprintf(mnemonic, "flog10"); break;
+ case 0x16: sprintf(mnemonic, "flog2"); break;
+ case 0x18: sprintf(mnemonic, "fabs"); break;
+ case 0x19: sprintf(mnemonic, "fcosh"); break;
+ case 0x1a: sprintf(mnemonic, "fneg"); break;
+ case 0x1c: sprintf(mnemonic, "facos"); break;
+ case 0x1d: sprintf(mnemonic, "fcos"); break;
+ case 0x1e: sprintf(mnemonic, "fgetexp"); break;
+ case 0x1f: sprintf(mnemonic, "fgetman"); break;
+ case 0x20: sprintf(mnemonic, "fdiv"); break;
+ case 0x21: sprintf(mnemonic, "fmod"); break;
+ case 0x22: sprintf(mnemonic, "fadd"); break;
+ case 0x23: sprintf(mnemonic, "fmul"); break;
+ case 0x24: sprintf(mnemonic, "fsgldiv"); break;
+ case 0x25: sprintf(mnemonic, "frem"); break;
+ case 0x26: sprintf(mnemonic, "fscale"); break;
+ case 0x27: sprintf(mnemonic, "fsglmul"); break;
+ case 0x28: sprintf(mnemonic, "fsub"); break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
sprintf(mnemonic, "fsincos"); break;
- case 0x38: sprintf(mnemonic, "fcmp"); break;
- case 0x3a: sprintf(mnemonic, "ftst"); break;
- case 0x41: sprintf(mnemonic, "fssqrt"); break;
- case 0x45: sprintf(mnemonic, "fdsqrt"); break;
- case 0x58: sprintf(mnemonic, "fsabs"); break;
- case 0x5a: sprintf(mnemonic, "fsneg"); break;
- case 0x5c: sprintf(mnemonic, "fdabs"); break;
- case 0x5e: sprintf(mnemonic, "fdneg"); break;
- case 0x60: sprintf(mnemonic, "fsdiv"); break;
- case 0x62: sprintf(mnemonic, "fsadd"); break;
- case 0x63: sprintf(mnemonic, "fsmul"); break;
- case 0x64: sprintf(mnemonic, "fddiv"); break;
- case 0x66: sprintf(mnemonic, "fdadd"); break;
- case 0x67: sprintf(mnemonic, "fdmul"); break;
- case 0x68: sprintf(mnemonic, "fssub"); break;
- case 0x6c: sprintf(mnemonic, "fdsub"); break;
-
- default: sprintf(mnemonic, "FPU (?)"); break;
+ case 0x38: sprintf(mnemonic, "fcmp"); break;
+ case 0x3a: sprintf(mnemonic, "ftst"); break;
+ case 0x41: sprintf(mnemonic, "fssqrt"); break;
+ case 0x45: sprintf(mnemonic, "fdsqrt"); break;
+ case 0x58: sprintf(mnemonic, "fsabs"); break;
+ case 0x5a: sprintf(mnemonic, "fsneg"); break;
+ case 0x5c: sprintf(mnemonic, "fdabs"); break;
+ case 0x5e: sprintf(mnemonic, "fdneg"); break;
+ case 0x60: sprintf(mnemonic, "fsdiv"); break;
+ case 0x62: sprintf(mnemonic, "fsadd"); break;
+ case 0x63: sprintf(mnemonic, "fsmul"); break;
+ case 0x64: sprintf(mnemonic, "fddiv"); break;
+ case 0x66: sprintf(mnemonic, "fdadd"); break;
+ case 0x67: sprintf(mnemonic, "fdmul"); break;
+ case 0x68: sprintf(mnemonic, "fssub"); break;
+ case 0x6c: sprintf(mnemonic, "fdsub"); break;
+
+ default: sprintf(mnemonic, "FPU (?)"); break;
}
if (w2 & 0x4000)
@@ -1819,11 +1819,11 @@ static void d68040_fpu(void)
{
switch ((w2>>10)&7)
{
- case 3: // packed decimal w/fixed k-factor
+ case 3: // packed decimal w/fixed k-factor
sprintf(g_dasm_str, "fmove%s FP%d, %s {#%d}", float_data_format[(w2>>10)&7], dst_reg, get_ea_mode_str_32(g_cpu_ir), sext_7bit_int(w2&0x7f));
break;
- case 7: // packed decimal w/dynamic k-factor (register)
+ case 7: // packed decimal w/dynamic k-factor (register)
sprintf(g_dasm_str, "fmove%s FP%d, %s {D%d}", float_data_format[(w2>>10)&7], dst_reg, get_ea_mode_str_32(g_cpu_ir), (w2>>4)&7);
break;
@@ -1834,7 +1834,7 @@ static void d68040_fpu(void)
break;
}
- case 0x4: // ea to control
+ case 0x4: // ea to control
{
sprintf(g_dasm_str, "fmovem.l %s, ", get_ea_mode_str_32(g_cpu_ir));
if (w2 & 0x1000) strcat(g_dasm_str, "fpcr");
@@ -1843,7 +1843,7 @@ static void d68040_fpu(void)
break;
}
- case 0x5: // control to ea
+ case 0x5: // control to ea
{
strcpy(g_dasm_str, "fmovem.l ");
@@ -1855,15 +1855,15 @@ static void d68040_fpu(void)
break;
}
- case 0x6: // memory to FPU, list
+ case 0x6: // memory to FPU, list
{
char temp[32];
- if ((w2>>11) & 1) // dynamic register list
+ if ((w2>>11) & 1) // dynamic register list
{
sprintf(g_dasm_str, "fmovem.x %s, D%d", get_ea_mode_str_32(g_cpu_ir), (w2>>4)&7);
}
- else // static register list
+ else // static register list
{
int i;
@@ -1873,11 +1873,11 @@ static void d68040_fpu(void)
{
if (w2 & (1<<i))
{
- if ((w2>>12) & 1) // postincrement or control
+ if ((w2>>12) & 1) // postincrement or control
{
sprintf(temp, "FP%d ", 7-i);
}
- else // predecrement
+ else // predecrement
{
sprintf(temp, "FP%d ", i);
}
@@ -1888,15 +1888,15 @@ static void d68040_fpu(void)
break;
}
- case 0x7: // FPU to memory, list
+ case 0x7: // FPU to memory, list
{
char temp[32];
- if ((w2>>11) & 1) // dynamic register list
+ if ((w2>>11) & 1) // dynamic register list
{
sprintf(g_dasm_str, "fmovem.x D%d, %s", (w2>>4)&7, get_ea_mode_str_32(g_cpu_ir));
}
- else // static register list
+ else // static register list
{
int i;
@@ -1906,11 +1906,11 @@ static void d68040_fpu(void)
{
if (w2 & (1<<i))
{
- if ((w2>>12) & 1) // postincrement or control
+ if ((w2>>12) & 1) // postincrement or control
{
sprintf(temp, "FP%d ", 7-i);
}
- else // predecrement
+ else // predecrement
{
sprintf(temp, "FP%d ", i);
}
@@ -3239,7 +3239,7 @@ static void d68851_p000(void)
// do this after fetching the second PMOVE word so we properly get the 3rd if necessary
str = get_ea_mode_str_32(g_cpu_ir);
- if ((modes & 0xfde0) == 0x2000) // PLOAD
+ if ((modes & 0xfde0) == 0x2000) // PLOAD
{
if (modes & 0x0200)
{
@@ -3252,30 +3252,30 @@ static void d68851_p000(void)
return;
}
- if ((modes & 0xe200) == 0x2000) // PFLUSH
+ if ((modes & 0xe200) == 0x2000) // PFLUSH
{
sprintf(g_dasm_str, "pflushr %x, %x, %s", modes & 0x1f, (modes>>5)&0xf, str);
return;
}
- if (modes == 0xa000) // PFLUSHR
+ if (modes == 0xa000) // PFLUSHR
{
sprintf(g_dasm_str, "pflushr %s", str);
}
- if (modes == 0x2800) // PVALID (FORMAT 1)
+ if (modes == 0x2800) // PVALID (FORMAT 1)
{
sprintf(g_dasm_str, "pvalid VAL, %s", str);
return;
}
- if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2)
+ if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2)
{
sprintf(g_dasm_str, "pvalid A%d, %s", modes & 0xf, str);
return;
}
- if ((modes & 0xe000) == 0x8000) // PTEST
+ if ((modes & 0xe000) == 0x8000) // PTEST
{
sprintf(g_dasm_str, "ptest #%d, %s", modes & 0x1f, str);
return;
@@ -3283,8 +3283,8 @@ static void d68851_p000(void)
switch ((modes>>13) & 0x7)
{
- case 0: // MC68030/040 form with FD bit
- case 2: // MC68881 form, FD never set
+ case 0: // MC68030/040 form with FD bit
+ case 2: // MC68881 form, FD never set
if (modes & 0x0100)
{
if (modes & 0x0200)
@@ -3309,7 +3309,7 @@ static void d68851_p000(void)
}
break;
- case 3: // MC68030 to/from status reg
+ case 3: // MC68030 to/from status reg
if (modes & 0x0200)
{
sprintf(g_dasm_str, "pmove mmusr, %s", str);
@@ -3770,9 +3770,9 @@ static void build_opcode_table(void)
{
/* Handle destination ea for move instructions */
if((ostruct->opcode_handler == d68000_move_8 ||
- ostruct->opcode_handler == d68000_move_16 ||
- ostruct->opcode_handler == d68000_move_32) &&
- !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))
+ ostruct->opcode_handler == d68000_move_16 ||
+ ostruct->opcode_handler == d68000_move_32) &&
+ !valid_ea(((opcode>>9)&7) | ((opcode>>3)&0x38), 0xbf8))
continue;
if(valid_ea(opcode, ostruct->ea_mask))
{
@@ -4062,8 +4062,8 @@ unsigned int m68k_is_valid_instruction(unsigned int instruction, unsigned int cp
return 0;
}
if(cpu_type != M68K_CPU_TYPE_68020 && cpu_type != M68K_CPU_TYPE_68EC020 &&
- (g_instruction_table[instruction] == d68020_callm ||
- g_instruction_table[instruction] == d68020_rtm))
+ (g_instruction_table[instruction] == d68020_callm ||
+ g_instruction_table[instruction] == d68020_rtm))
return 0;
return 1;
diff --git a/src/emu/cpu/m68000/m68kfpu.c b/src/emu/cpu/m68000/m68kfpu.c
index 2f44c22f863..6ecbb1ecd11 100644
--- a/src/emu/cpu/m68000/m68kfpu.c
+++ b/src/emu/cpu/m68000/m68kfpu.c
@@ -1,16 +1,16 @@
#include <math.h>
-#define FPCC_N 0x08000000
-#define FPCC_Z 0x04000000
-#define FPCC_I 0x02000000
-#define FPCC_NAN 0x01000000
+#define FPCC_N 0x08000000
+#define FPCC_Z 0x04000000
+#define FPCC_I 0x02000000
+#define FPCC_NAN 0x01000000
-#define FPES_OE 0x00002000
-#define FPAE_IOP 0x00000080
+#define FPES_OE 0x00002000
+#define FPAE_IOP 0x00000080
-#define DOUBLE_INFINITY U64(0x7ff0000000000000)
-#define DOUBLE_EXPONENT U64(0x7ff0000000000000)
-#define DOUBLE_MANTISSA U64(0x000fffffffffffff)
+#define DOUBLE_INFINITY U64(0x7ff0000000000000)
+#define DOUBLE_EXPONENT U64(0x7ff0000000000000)
+#define DOUBLE_MANTISSA U64(0x000fffffffffffff)
extern flag floatx80_is_nan( floatx80 a );
@@ -87,7 +87,7 @@ INLINE floatx80 load_pack_float80(m68ki_cpu_core *m68k, UINT32 ea)
dw3 = m68ki_read_32(m68k, ea+8);
ch = &str[0];
- if (dw1 & 0x80000000) // mantissa sign
+ if (dw1 & 0x80000000) // mantissa sign
{
*ch++ = '-';
}
@@ -110,7 +110,7 @@ INLINE floatx80 load_pack_float80(m68ki_cpu_core *m68k, UINT32 ea)
*ch++ = (char)(((dw3 >> 4) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 0) & 0xf) + '0');
*ch++ = 'E';
- if (dw1 & 0x40000000) // exponent sign
+ if (dw1 & 0x40000000) // exponent sign
{
*ch++ = '-';
}
@@ -300,54 +300,54 @@ INLINE int TEST_CONDITION(m68ki_cpu_core *m68k, int condition)
switch (condition)
{
case 0x10:
- case 0x00: return 0; // False
+ case 0x00: return 0; // False
case 0x11:
- case 0x01: return (z); // Equal
+ case 0x01: return (z); // Equal
case 0x12:
- case 0x02: return (!(nan || z || n)); // Greater Than
+ case 0x02: return (!(nan || z || n)); // Greater Than
case 0x13:
- case 0x03: return (z || !(nan || n)); // Greater or Equal
+ case 0x03: return (z || !(nan || n)); // Greater or Equal
case 0x14:
- case 0x04: return (n && !(nan || z)); // Less Than
+ case 0x04: return (n && !(nan || z)); // Less Than
case 0x15:
- case 0x05: return (z || (n && !nan)); // Less Than or Equal
+ case 0x05: return (z || (n && !nan)); // Less Than or Equal
case 0x16:
- case 0x06: return !nan && !z;
+ case 0x06: return !nan && !z;
case 0x17:
- case 0x07: return !nan;
+ case 0x07: return !nan;
case 0x18:
- case 0x08: return nan;
+ case 0x08: return nan;
case 0x19:
- case 0x09: return nan || z;
+ case 0x09: return nan || z;
case 0x1a:
- case 0x0a: return (nan || !(n || z)); // Not Less Than or Equal
+ case 0x0a: return (nan || !(n || z)); // Not Less Than or Equal
case 0x1b:
- case 0x0b: return (nan || z || !n); // Not Less Than
+ case 0x0b: return (nan || z || !n); // Not Less Than
case 0x1c:
- case 0x0c: return (nan || (n && !z)); // Not Greater or Equal Than
+ case 0x0c: return (nan || (n && !z)); // Not Greater or Equal Than
case 0x1d:
- case 0x0d: return (nan || z || n); // Not Greater Than
+ case 0x0d: return (nan || z || n); // Not Greater Than
case 0x1e:
- case 0x0e: return (!z); // Not Equal
+ case 0x0e: return (!z); // Not Equal
case 0x1f:
- case 0x0f: return 1; // True
+ case 0x0f: return 1; // True
- default: fatalerror("M68kFPU: test_condition: unhandled condition %02X\n", condition);
+ default: fatalerror("M68kFPU: test_condition: unhandled condition %02X\n", condition);
}
return r;
@@ -360,31 +360,31 @@ static UINT8 READ_EA_8(m68ki_cpu_core *m68k, int ea)
switch (mode)
{
- case 0: // Dn
+ case 0: // Dn
{
return REG_D(m68k)[reg];
}
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
return m68ki_read_8(m68k, ea);
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = EA_AY_PI_8(m68k);
return m68ki_read_8(m68k, ea);
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = EA_AY_PD_8(m68k);
return m68ki_read_8(m68k, ea);
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_8(m68k);
return m68ki_read_8(m68k, ea);
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_8(m68k);
return m68ki_read_8(m68k, ea);
@@ -393,37 +393,37 @@ static UINT8 READ_EA_8(m68ki_cpu_core *m68k, int ea)
{
switch (reg)
{
- case 0: // (xxx).W
+ case 0: // (xxx).W
{
UINT32 ea = (UINT32)OPER_I_16(m68k);
return m68ki_read_8(m68k, ea);
}
- case 1: // (xxx).L
+ case 1: // (xxx).L
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
UINT32 ea = (d1 << 16) | d2;
return m68ki_read_8(m68k, ea);
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_8(m68k);
return m68ki_read_8(m68k, ea);
}
- case 3: // (PC) + (Xn) + d8
+ case 3: // (PC) + (Xn) + d8
{
UINT32 ea = EA_PCIX_8(m68k);
return m68ki_read_8(m68k, ea);
}
- case 4: // #<data>
+ case 4: // #<data>
{
return OPER_I_8(m68k);
}
- default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
return 0;
@@ -436,31 +436,31 @@ static UINT16 READ_EA_16(m68ki_cpu_core *m68k, int ea)
switch (mode)
{
- case 0: // Dn
+ case 0: // Dn
{
return (UINT16)(REG_D(m68k)[reg]);
}
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
return m68ki_read_16(m68k, ea);
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = EA_AY_PI_16(m68k);
return m68ki_read_16(m68k, ea);
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = EA_AY_PD_16(m68k);
return m68ki_read_16(m68k, ea);
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_16(m68k);
return m68ki_read_16(m68k, ea);
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_16(m68k);
return m68ki_read_16(m68k, ea);
@@ -469,38 +469,38 @@ static UINT16 READ_EA_16(m68ki_cpu_core *m68k, int ea)
{
switch (reg)
{
- case 0: // (xxx).W
+ case 0: // (xxx).W
{
UINT32 ea = (UINT32)OPER_I_16(m68k);
return m68ki_read_16(m68k, ea);
}
- case 1: // (xxx).L
+ case 1: // (xxx).L
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
UINT32 ea = (d1 << 16) | d2;
return m68ki_read_16(m68k, ea);
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_16(m68k);
return m68ki_read_16(m68k, ea);
}
- case 3: // (PC) + (Xn) + d8
+ case 3: // (PC) + (Xn) + d8
{
UINT32 ea = EA_PCIX_16(m68k);
return m68ki_read_16(m68k, ea);
}
- case 4: // #<data>
+ case 4: // #<data>
{
return OPER_I_16(m68k);
}
- default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
return 0;
@@ -513,31 +513,31 @@ static UINT32 READ_EA_32(m68ki_cpu_core *m68k, int ea)
switch (mode)
{
- case 0: // Dn
+ case 0: // Dn
{
return REG_D(m68k)[reg];
}
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
return m68ki_read_32(m68k, ea);
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = EA_AY_PI_32(m68k);
return m68ki_read_32(m68k, ea);
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = EA_AY_PD_32(m68k);
return m68ki_read_32(m68k, ea);
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_32(m68k);
return m68ki_read_32(m68k, ea);
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_32(m68k);
return m68ki_read_32(m68k, ea);
@@ -546,37 +546,37 @@ static UINT32 READ_EA_32(m68ki_cpu_core *m68k, int ea)
{
switch (reg)
{
- case 0: // (xxx).W
+ case 0: // (xxx).W
{
UINT32 ea = (UINT32)OPER_I_16(m68k);
return m68ki_read_32(m68k, ea);
}
- case 1: // (xxx).L
+ case 1: // (xxx).L
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
UINT32 ea = (d1 << 16) | d2;
return m68ki_read_32(m68k, ea);
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_32(m68k);
return m68ki_read_32(m68k, ea);
}
- case 3: // (PC) + (Xn) + d8
+ case 3: // (PC) + (Xn) + d8
{
UINT32 ea = EA_PCIX_32(m68k);
return m68ki_read_32(m68k, ea);
}
- case 4: // #<data>
+ case 4: // #<data>
{
return OPER_I_32(m68k);
}
- default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
return 0;
}
@@ -589,14 +589,14 @@ static UINT64 READ_EA_64(m68ki_cpu_core *m68k, int ea)
switch (mode)
{
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
return (UINT64)(h1) << 32 | (UINT64)(h2);
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 8;
@@ -604,7 +604,7 @@ static UINT64 READ_EA_64(m68ki_cpu_core *m68k, int ea)
h2 = m68ki_read_32(m68k, ea+4);
return (UINT64)(h1) << 32 | (UINT64)(h2);
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = REG_A(m68k)[reg]-8;
REG_A(m68k)[reg] -= 8;
@@ -612,14 +612,14 @@ static UINT64 READ_EA_64(m68ki_cpu_core *m68k, int ea)
h2 = m68ki_read_32(m68k, ea+4);
return (UINT64)(h1) << 32 | (UINT64)(h2);
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
return (UINT64)(h1) << 32 | (UINT64)(h2);
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
@@ -630,38 +630,38 @@ static UINT64 READ_EA_64(m68ki_cpu_core *m68k, int ea)
{
switch (reg)
{
- case 1: // (xxx).L
+ case 1: // (xxx).L
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
UINT32 ea = (d1 << 16) | d2;
return (UINT64)(m68ki_read_32(m68k, ea)) << 32 | (UINT64)(m68ki_read_32(m68k, ea+4));
}
- case 3: // (PC) + (Xn) + d8
+ case 3: // (PC) + (Xn) + d8
{
UINT32 ea = EA_PCIX_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
return (UINT64)(h1) << 32 | (UINT64)(h2);
}
- case 4: // #<data>
+ case 4: // #<data>
{
h1 = OPER_I_32(m68k);
h2 = OPER_I_32(m68k);
return (UINT64)(h1) << 32 | (UINT64)(h2);
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_32(m68k);
h1 = m68ki_read_32(m68k, ea+0);
h2 = m68ki_read_32(m68k, ea+4);
return (UINT64)(h1) << 32 | (UINT64)(h2);
}
- default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
return 0;
@@ -676,35 +676,35 @@ static floatx80 READ_EA_FPE(m68ki_cpu_core *m68k, int ea)
switch (mode)
{
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
fpr = load_extended_float80(m68k, ea);
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 12;
fpr = load_extended_float80(m68k, ea);
break;
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = REG_A(m68k)[reg]-12;
REG_A(m68k)[reg] -= 12;
fpr = load_extended_float80(m68k, ea);
break;
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
// FIXME: will fail for fmovem
UINT32 ea = EA_AY_DI_32(m68k);
fpr = load_extended_float80(m68k, ea);
break;
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
// FIXME: will fail for fmovem
UINT32 ea = EA_AY_IX_32(m68k);
@@ -712,18 +712,18 @@ static floatx80 READ_EA_FPE(m68ki_cpu_core *m68k, int ea)
break;
}
- case 7: // extended modes
+ case 7: // extended modes
{
switch (reg)
{
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_32(m68k);
fpr = load_extended_float80(m68k, ea);
}
break;
- case 3: // (d16,PC,Dx.w)
+ case 3: // (d16,PC,Dx.w)
{
UINT32 ea = EA_PCIX_32(m68k);
fpr = load_extended_float80(m68k, ea);
@@ -737,7 +737,7 @@ static floatx80 READ_EA_FPE(m68ki_cpu_core *m68k, int ea)
}
break;
- default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break;
+ default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break;
}
return fpr;
@@ -751,14 +751,14 @@ static floatx80 READ_EA_PACK(m68ki_cpu_core *m68k, int ea)
switch (mode)
{
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
fpr = load_pack_float80(m68k, ea);
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 12;
@@ -766,11 +766,11 @@ static floatx80 READ_EA_PACK(m68ki_cpu_core *m68k, int ea)
break;
}
- case 7: // extended modes
+ case 7: // extended modes
{
switch (reg)
{
- case 3: // (d16,PC,Dx.w)
+ case 3: // (d16,PC,Dx.w)
{
UINT32 ea = EA_PCIX_32(m68k);
fpr = load_pack_float80(m68k, ea);
@@ -784,7 +784,7 @@ static floatx80 READ_EA_PACK(m68ki_cpu_core *m68k, int ea)
}
break;
- default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break;
+ default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k)); break;
}
return fpr;
@@ -797,36 +797,36 @@ static void WRITE_EA_8(m68ki_cpu_core *m68k, int ea, UINT8 data)
switch (mode)
{
- case 0: // Dn
+ case 0: // Dn
{
REG_D(m68k)[reg] = data;
break;
}
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
m68ki_write_8(m68k, ea, data);
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = EA_AY_PI_8(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = EA_AY_PD_8(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_8(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_8(m68k);
m68ki_write_8(m68k, ea, data);
@@ -836,7 +836,7 @@ static void WRITE_EA_8(m68ki_cpu_core *m68k, int ea, UINT8 data)
{
switch (reg)
{
- case 1: // (xxx).B
+ case 1: // (xxx).B
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
@@ -844,17 +844,17 @@ static void WRITE_EA_8(m68ki_cpu_core *m68k, int ea, UINT8 data)
m68ki_write_8(m68k, ea, data);
break;
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_16(m68k);
m68ki_write_8(m68k, ea, data);
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
}
}
@@ -865,36 +865,36 @@ static void WRITE_EA_16(m68ki_cpu_core *m68k, int ea, UINT16 data)
switch (mode)
{
- case 0: // Dn
+ case 0: // Dn
{
REG_D(m68k)[reg] = data;
break;
}
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
m68ki_write_16(m68k, ea, data);
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = EA_AY_PI_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = EA_AY_PD_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_16(m68k);
m68ki_write_16(m68k, ea, data);
@@ -904,7 +904,7 @@ static void WRITE_EA_16(m68ki_cpu_core *m68k, int ea, UINT16 data)
{
switch (reg)
{
- case 1: // (xxx).W
+ case 1: // (xxx).W
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
@@ -912,17 +912,17 @@ static void WRITE_EA_16(m68ki_cpu_core *m68k, int ea, UINT16 data)
m68ki_write_16(m68k, ea, data);
break;
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_16(m68k);
m68ki_write_16(m68k, ea, data);
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
}
}
@@ -933,41 +933,41 @@ static void WRITE_EA_32(m68ki_cpu_core *m68k, int ea, UINT32 data)
switch (mode)
{
- case 0: // Dn
+ case 0: // Dn
{
REG_D(m68k)[reg] = data;
break;
}
- case 1: // An
+ case 1: // An
{
REG_A(m68k)[reg] = data;
break;
}
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
m68ki_write_32(m68k, ea, data);
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = EA_AY_PI_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea = EA_AY_PD_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_32(m68k);
m68ki_write_32(m68k, ea, data);
@@ -977,7 +977,7 @@ static void WRITE_EA_32(m68ki_cpu_core *m68k, int ea, UINT32 data)
{
switch (reg)
{
- case 1: // (xxx).L
+ case 1: // (xxx).L
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
@@ -985,17 +985,17 @@ static void WRITE_EA_32(m68ki_cpu_core *m68k, int ea, UINT32 data)
m68ki_write_32(m68k, ea, data);
break;
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_32(m68k);
m68ki_write_32(m68k, ea, data);
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC(m68k));
}
}
@@ -1006,14 +1006,14 @@ static void WRITE_EA_64(m68ki_cpu_core *m68k, int ea, UINT64 data)
switch (mode)
{
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea = REG_A(m68k)[reg];
m68ki_write_32(m68k, ea, (UINT32)(data >> 32));
m68ki_write_32(m68k, ea+4, (UINT32)(data));
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = REG_A(m68k)[reg];
REG_A(m68k)[reg] += 8;
@@ -1021,7 +1021,7 @@ static void WRITE_EA_64(m68ki_cpu_core *m68k, int ea, UINT64 data)
m68ki_write_32(m68k, ea+4, (UINT32)(data));
break;
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea;
REG_A(m68k)[reg] -= 8;
@@ -1030,14 +1030,14 @@ static void WRITE_EA_64(m68ki_cpu_core *m68k, int ea, UINT64 data)
m68ki_write_32(m68k, ea+4, (UINT32)(data));
break;
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_32(m68k);
m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
m68ki_write_32(m68k, ea+4, (UINT32)(data));
break;
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_32(m68k);
m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
@@ -1048,7 +1048,7 @@ static void WRITE_EA_64(m68ki_cpu_core *m68k, int ea, UINT64 data)
{
switch (reg)
{
- case 1: // (xxx).L
+ case 1: // (xxx).L
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
@@ -1057,18 +1057,18 @@ static void WRITE_EA_64(m68ki_cpu_core *m68k, int ea, UINT64 data)
m68ki_write_32(m68k, ea+4, (UINT32)(data));
break;
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_32(m68k);
m68ki_write_32(m68k, ea+0, (UINT32)(data >> 32));
m68ki_write_32(m68k, ea+4, (UINT32)(data));
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (UINT32)(data >> 32), (UINT32)(data), REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (UINT32)(data >> 32), (UINT32)(data), REG_PC(m68k));
}
}
@@ -1079,7 +1079,7 @@ static void WRITE_EA_FPE(m68ki_cpu_core *m68k, int ea, floatx80 fpr)
switch (mode)
{
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea;
ea = REG_A(m68k)[reg];
@@ -1087,7 +1087,7 @@ static void WRITE_EA_FPE(m68ki_cpu_core *m68k, int ea, floatx80 fpr)
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea;
ea = REG_A(m68k)[reg];
@@ -1096,7 +1096,7 @@ static void WRITE_EA_FPE(m68ki_cpu_core *m68k, int ea, floatx80 fpr)
break;
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea;
REG_A(m68k)[reg] -= 12;
@@ -1109,10 +1109,10 @@ static void WRITE_EA_FPE(m68ki_cpu_core *m68k, int ea, floatx80 fpr)
{
switch (reg)
{
- default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
}
}
- default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
}
}
@@ -1123,7 +1123,7 @@ static void WRITE_EA_PACK(m68ki_cpu_core *m68k, int ea, int k, floatx80 fpr)
switch (mode)
{
- case 2: // (An)
+ case 2: // (An)
{
UINT32 ea;
ea = REG_A(m68k)[reg];
@@ -1131,7 +1131,7 @@ static void WRITE_EA_PACK(m68ki_cpu_core *m68k, int ea, int k, floatx80 fpr)
break;
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea;
ea = REG_A(m68k)[reg];
@@ -1140,7 +1140,7 @@ static void WRITE_EA_PACK(m68ki_cpu_core *m68k, int ea, int k, floatx80 fpr)
break;
}
- case 4: // -(An)
+ case 4: // -(An)
{
UINT32 ea;
REG_A(m68k)[reg] -= 12;
@@ -1153,10 +1153,10 @@ static void WRITE_EA_PACK(m68ki_cpu_core *m68k, int ea, int k, floatx80 fpr)
{
switch (reg)
{
- default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
}
}
- default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("M68kFPU: WRITE_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC(m68k));
}
}
@@ -1175,154 +1175,154 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
{
switch (src)
{
- case 0: // Long-Word Integer
+ case 0: // Long-Word Integer
{
INT32 d = READ_EA_32(m68k, ea);
source = int32_to_floatx80(d);
break;
}
- case 1: // Single-precision Real
+ case 1: // Single-precision Real
{
UINT32 d = READ_EA_32(m68k, ea);
source = float32_to_floatx80(d);
break;
}
- case 2: // Extended-precision Real
+ case 2: // Extended-precision Real
{
source = READ_EA_FPE(m68k, ea);
break;
}
- case 3: // Packed-decimal Real
+ case 3: // Packed-decimal Real
{
source = READ_EA_PACK(m68k, ea);
break;
}
- case 4: // Word Integer
+ case 4: // Word Integer
{
INT16 d = READ_EA_16(m68k, ea);
source = int32_to_floatx80((INT32)d);
break;
}
- case 5: // Double-precision Real
+ case 5: // Double-precision Real
{
UINT64 d = READ_EA_64(m68k, ea);
source = float64_to_floatx80(d);
break;
}
- case 6: // Byte Integer
+ case 6: // Byte Integer
{
INT8 d = READ_EA_8(m68k, ea);
source = int32_to_floatx80((INT32)d);
break;
}
- case 7: // FMOVECR load from constant ROM
+ case 7: // FMOVECR load from constant ROM
{
switch (w2 & 0x7f)
{
- case 0x0: // Pi
+ case 0x0: // Pi
source.high = 0x4000;
source.low = U64(0xc90fdaa22168c235);
break;
- case 0xb: // log10(2)
+ case 0xb: // log10(2)
source.high = 0x3ffd;
source.low = U64(0x9a209a84fbcff798);
break;
- case 0xc: // e
+ case 0xc: // e
source.high = 0x4000;
source.low = U64(0xadf85458a2bb4a9b);
break;
- case 0xd: // log2(e)
+ case 0xd: // log2(e)
source.high = 0x3fff;
source.low = U64(0xb8aa3b295c17f0bc);
break;
- case 0xe: // log10(e)
+ case 0xe: // log10(e)
source.high = 0x3ffd;
source.low = U64(0xde5bd8a937287195);
break;
- case 0xf: // 0.0
+ case 0xf: // 0.0
source = int32_to_floatx80((INT32)0);
break;
- case 0x30: // ln(2)
+ case 0x30: // ln(2)
source.high = 0x3ffe;
source.low = U64(0xb17217f7d1cf79ac);
break;
- case 0x31: // ln(10)
+ case 0x31: // ln(10)
source.high = 0x4000;
source.low = U64(0x935d8dddaaa8ac17);
break;
- case 0x32: // 1 (or 100? manuals are unclear, but 1 would make more sense)
+ case 0x32: // 1 (or 100? manuals are unclear, but 1 would make more sense)
source = int32_to_floatx80((INT32)1);
break;
- case 0x33: // 10^1
+ case 0x33: // 10^1
source = int32_to_floatx80((INT32)10);
break;
- case 0x34: // 10^2
+ case 0x34: // 10^2
source = int32_to_floatx80((INT32)10*10);
break;
- case 0x35: // 10^4
- source = int32_to_floatx80((INT32)1000*10);
- break;
-
- case 0x36: // 1.0e8
- source = int32_to_floatx80((INT32)10000000*10);
- break;
-
- case 0x37: // 1.0e16 - can't get the right precision from INT32 so go "direct" with constants from h/w
- source.high = 0x4034;
- source.low = U64(0x8e1bc9bf04000000);
- break;
-
- case 0x38: // 1.0e32
- source.high = 0x4069;
- source.low = U64(0x9dc5ada82b70b59e);
- break;
-
- case 0x39: // 1.0e64
- source.high = 0x40d3;
- source.low = U64(0xc2781f49ffcfa6d5);
- break;
-
- case 0x3a: // 1.0e128
- source.high = 0x41a8;
- source.low = U64(0x93ba47c980e98ce0);
- break;
-
- case 0x3b: // 1.0e256
- source.high = 0x4351;
- source.low = U64(0xaa7eebfb9df9de8e);
- break;
-
- case 0x3c: // 1.0e512
- source.high = 0x46a3;
- source.low = U64(0xe319a0aea60e91c7);
- break;
-
- case 0x3d: // 1.0e1024
- source.high = 0x4d48;
- source.low = U64(0xc976758681750c17);
- break;
-
- case 0x3e: // 1.0e2048
- source.high = 0x5a92;
- source.low = U64(0x9e8b3b5dc53d5de5);
- break;
-
- case 0x3f: // 1.0e4096
- source.high = 0x7525;
- source.low = U64(0xc46052028a20979b);
- break;
+ case 0x35: // 10^4
+ source = int32_to_floatx80((INT32)1000*10);
+ break;
+
+ case 0x36: // 1.0e8
+ source = int32_to_floatx80((INT32)10000000*10);
+ break;
+
+ case 0x37: // 1.0e16 - can't get the right precision from INT32 so go "direct" with constants from h/w
+ source.high = 0x4034;
+ source.low = U64(0x8e1bc9bf04000000);
+ break;
+
+ case 0x38: // 1.0e32
+ source.high = 0x4069;
+ source.low = U64(0x9dc5ada82b70b59e);
+ break;
+
+ case 0x39: // 1.0e64
+ source.high = 0x40d3;
+ source.low = U64(0xc2781f49ffcfa6d5);
+ break;
+
+ case 0x3a: // 1.0e128
+ source.high = 0x41a8;
+ source.low = U64(0x93ba47c980e98ce0);
+ break;
+
+ case 0x3b: // 1.0e256
+ source.high = 0x4351;
+ source.low = U64(0xaa7eebfb9df9de8e);
+ break;
+
+ case 0x3c: // 1.0e512
+ source.high = 0x46a3;
+ source.low = U64(0xe319a0aea60e91c7);
+ break;
+
+ case 0x3d: // 1.0e1024
+ source.high = 0x4d48;
+ source.low = U64(0xc976758681750c17);
+ break;
+
+ case 0x3e: // 1.0e2048
+ source.high = 0x5a92;
+ source.low = U64(0x9e8b3b5dc53d5de5);
+ break;
+
+ case 0x3f: // 1.0e4096
+ source.high = 0x7525;
+ source.low = U64(0xc46052028a20979b);
+ break;
default:
fatalerror("fmove_rm_reg: unknown constant ROM offset %x at %08x\n", w2&0x7f, REG_PC(m68k)-4);
@@ -1334,7 +1334,7 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 4;
return;
}
- default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, REG_PC(m68k)-4);
+ default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, REG_PC(m68k)-4);
}
}
else
@@ -1346,35 +1346,35 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
switch (opmode)
{
- case 0x00: // FMOVE
+ case 0x00: // FMOVE
{
REG_FP(m68k)[dst] = source;
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 4;
break;
}
- case 0x01: // FINT
+ case 0x01: // FINT
{
INT32 temp;
temp = floatx80_to_int32(source);
REG_FP(m68k)[dst] = int32_to_floatx80(temp);
break;
}
- case 0x03: // FINTRZ
+ case 0x03: // FINTRZ
{
INT32 temp;
temp = floatx80_to_int32_round_to_zero(source);
REG_FP(m68k)[dst] = int32_to_floatx80(temp);
break;
}
- case 0x04: // FSQRT
+ case 0x04: // FSQRT
{
REG_FP(m68k)[dst] = floatx80_sqrt(source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 109;
break;
}
- case 0x06: // FLOGNP1
+ case 0x06: // FLOGNP1
{
REG_FP(m68k)[dst] = floatx80_flognp1 (source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
@@ -1389,7 +1389,7 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 75;
break;
}
- case 0x0f: // FTAN
+ case 0x0f: // FTAN
{
REG_FP(m68k)[dst] = source;
floatx80_ftan(REG_FP(m68k)[dst]);
@@ -1397,28 +1397,28 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 75;
break;
}
- case 0x14: // FLOGN
+ case 0x14: // FLOGN
{
REG_FP(m68k)[dst] = floatx80_flogn (source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 548; // for MC68881
break;
}
- case 0x15: // FLOG10
+ case 0x15: // FLOG10
{
REG_FP(m68k)[dst] = floatx80_flog10 (source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 604; // for MC68881
break;
}
- case 0x16: // FLOG2
+ case 0x16: // FLOG2
{
REG_FP(m68k)[dst] = floatx80_flog2 (source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 604; // for MC68881
break;
}
- case 0x18: // FABS
+ case 0x18: // FABS
{
REG_FP(m68k)[dst] = source;
REG_FP(m68k)[dst].high &= 0x7fff;
@@ -1426,7 +1426,7 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 3;
break;
}
- case 0x1a: // FNEG
+ case 0x1a: // FNEG
{
REG_FP(m68k)[dst] = source;
REG_FP(m68k)[dst].high ^= 0x8000;
@@ -1442,38 +1442,38 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 75;
break;
}
- case 0x1e: // FGETEXP
+ case 0x1e: // FGETEXP
{
INT16 temp2;
- temp2 = source.high; // get the exponent
- temp2 -= 0x3fff; // take off the bias
+ temp2 = source.high; // get the exponent
+ temp2 -= 0x3fff; // take off the bias
REG_FP(m68k)[dst] = double_to_fx80((double)temp2);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 6;
break;
}
- case 0x20: // FDIV
+ case 0x20: // FDIV
{
REG_FP(m68k)[dst] = floatx80_div(REG_FP(m68k)[dst], source);
m68k->remaining_cycles -= 43;
break;
}
- case 0x22: // FADD
+ case 0x22: // FADD
{
REG_FP(m68k)[dst] = floatx80_add(REG_FP(m68k)[dst], source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 9;
break;
}
- case 0x23: // FMUL
+ case 0x23: // FMUL
{
REG_FP(m68k)[dst] = floatx80_mul(REG_FP(m68k)[dst], source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 11;
break;
}
- case 0x24: // FSGLDIV
+ case 0x24: // FSGLDIV
{
float32 a = floatx80_to_float32( REG_FP(m68k)[dst] );
float32 b = floatx80_to_float32( source );
@@ -1481,14 +1481,14 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 43; // // ? (value is from FDIV)
break;
}
- case 0x25: // FREM
+ case 0x25: // FREM
{
REG_FP(m68k)[dst] = floatx80_rem(REG_FP(m68k)[dst], source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
- m68k->remaining_cycles -= 43; // guess
+ m68k->remaining_cycles -= 43; // guess
break;
}
- case 0x27: // FSGLMUL
+ case 0x27: // FSGLMUL
{
float32 a = floatx80_to_float32( REG_FP(m68k)[dst] );
float32 b = floatx80_to_float32( source );
@@ -1497,14 +1497,14 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 11; // ? (value is from FMUL)
break;
}
- case 0x28: // FSUB
+ case 0x28: // FSUB
{
REG_FP(m68k)[dst] = floatx80_sub(REG_FP(m68k)[dst], source);
SET_CONDITION_CODES(m68k, REG_FP(m68k)[dst]);
m68k->remaining_cycles -= 9;
break;
}
- case 0x38: // FCMP
+ case 0x38: // FCMP
{
floatx80 res;
res = floatx80_sub(REG_FP(m68k)[dst], source);
@@ -1512,7 +1512,7 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
m68k->remaining_cycles -= 7;
break;
}
- case 0x3a: // FTST
+ case 0x3a: // FTST
{
floatx80 res;
res = source;
@@ -1521,7 +1521,7 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2)
break;
}
- default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, REG_PPC(m68k));
+ default: fatalerror("fpgen_rm_reg: unimplemented opmode %02X at %08X\n", opmode, REG_PPC(m68k));
}
}
@@ -1534,31 +1534,31 @@ static void fmove_reg_mem(m68ki_cpu_core *m68k, UINT16 w2)
switch (dst)
{
- case 0: // Long-Word Integer
+ case 0: // Long-Word Integer
{
INT32 d = (INT32)floatx80_to_int32(REG_FP(m68k)[src]);
WRITE_EA_32(m68k, ea, d);
break;
}
- case 1: // Single-precision Real
+ case 1: // Single-precision Real
{
UINT32 d = floatx80_to_float32(REG_FP(m68k)[src]);
WRITE_EA_32(m68k, ea, d);
break;
}
- case 2: // Extended-precision Real
+ case 2: // Extended-precision Real
{
WRITE_EA_FPE(m68k, ea, REG_FP(m68k)[src]);
break;
}
- case 3: // Packed-decimal Real with Static K-factor
+ case 3: // Packed-decimal Real with Static K-factor
{
// sign-extend k
k = (k & 0x40) ? (k | 0xffffff80) : (k & 0x7f);
WRITE_EA_PACK(m68k, ea, k, REG_FP(m68k)[src]);
break;
}
- case 4: // Word Integer
+ case 4: // Word Integer
{
int32 value = floatx80_to_int32(REG_FP(m68k)[src]);
if (value > 0x7fff || value < -0x8000 )
@@ -1568,7 +1568,7 @@ static void fmove_reg_mem(m68ki_cpu_core *m68k, UINT16 w2)
WRITE_EA_16(m68k, ea, (INT16)value);
break;
}
- case 5: // Double-precision Real
+ case 5: // Double-precision Real
{
UINT64 d;
@@ -1577,7 +1577,7 @@ static void fmove_reg_mem(m68ki_cpu_core *m68k, UINT16 w2)
WRITE_EA_64(m68k, ea, d);
break;
}
- case 6: // Byte Integer
+ case 6: // Byte Integer
{
int32 value = floatx80_to_int32(REG_FP(m68k)[src]);
if (value > 127 || value < -128)
@@ -1587,7 +1587,7 @@ static void fmove_reg_mem(m68ki_cpu_core *m68k, UINT16 w2)
WRITE_EA_8(m68k, ea, (INT8) value);
break;
}
- case 7: // Packed-decimal Real with Dynamic K-factor
+ case 7: // Packed-decimal Real with Dynamic K-factor
{
WRITE_EA_PACK(m68k, ea, REG_D(m68k)[k>>4], REG_FP(m68k)[src]);
break;
@@ -1606,7 +1606,7 @@ static void fmove_fpcr(m68ki_cpu_core *m68k, UINT16 w2)
if ((mode == 5) || (mode == 6))
{
- UINT32 address = 0xffffffff; // force a bus error if this doesn't get assigned
+ UINT32 address = 0xffffffff; // force a bus error if this doesn't get assigned
if (mode == 5)
{
@@ -1617,13 +1617,13 @@ static void fmove_fpcr(m68ki_cpu_core *m68k, UINT16 w2)
address = EA_AY_IX_32(m68k);
}
- if (dir) // From system control reg to <ea>
+ if (dir) // From system control reg to <ea>
{
if (regsel & 4) { m68ki_write_32(m68k, address, REG_FPCR(m68k)); address += 4; }
if (regsel & 2) { m68ki_write_32(m68k, address, REG_FPSR(m68k)); address += 4; }
if (regsel & 1) { m68ki_write_32(m68k, address, REG_FPIAR(m68k)); address += 4; }
}
- else // From <ea> to system control reg
+ else // From <ea> to system control reg
{
if (regsel & 4) { REG_FPCR(m68k) = m68ki_read_32(m68k, address); address += 4; }
if (regsel & 2) { REG_FPSR(m68k) = m68ki_read_32(m68k, address); address += 4; }
@@ -1632,13 +1632,13 @@ static void fmove_fpcr(m68ki_cpu_core *m68k, UINT16 w2)
}
else
{
- if (dir) // From system control reg to <ea>
+ if (dir) // From system control reg to <ea>
{
if (regsel & 4) WRITE_EA_32(m68k, ea, REG_FPCR(m68k));
if (regsel & 2) WRITE_EA_32(m68k, ea, REG_FPSR(m68k));
if (regsel & 1) WRITE_EA_32(m68k, ea, REG_FPIAR(m68k));
}
- else // From <ea> to system control reg
+ else // From <ea> to system control reg
{
if (regsel & 4) REG_FPCR(m68k) = READ_EA_32(m68k, ea);
if (regsel & 2) REG_FPSR(m68k) = READ_EA_32(m68k, ea);
@@ -1710,15 +1710,15 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
UINT32 mem_addr = 0;
switch (ea >> 3)
{
- case 5: // (d16, An)
+ case 5: // (d16, An)
mem_addr= EA_AY_DI_32(m68k);
break;
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
mem_addr= EA_AY_IX_32(m68k);
break;
}
- if (dir) // From FP regs to mem
+ if (dir) // From FP regs to mem
{
switch (mode)
{
@@ -1726,7 +1726,7 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
// FIXME: not really tested, but seems to work
reglist = REG_D(m68k)[(reglist >> 4) & 7];
- case 0: // Static register list, predecrement or control addressing mode
+ case 0: // Static register list, predecrement or control addressing mode
{
for (i=0; i < 8; i++)
{
@@ -1734,8 +1734,8 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
{
switch (ea >> 3)
{
- case 5: // (d16, An)
- case 6: // (An) + (Xn) + d8
+ case 5: // (d16, An)
+ case 6: // (An) + (Xn) + d8
store_extended_float80(m68k, mem_addr, REG_FP(m68k)[i]);
mem_addr += 12;
break;
@@ -1750,7 +1750,7 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
break;
}
- case 2: // Static register list, postdecrement or control addressing mode
+ case 2: // Static register list, postdecrement or control addressing mode
{
for (i=0; i < 8; i++)
{
@@ -1758,8 +1758,8 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
{
switch (ea >> 3)
{
- case 5: // (d16, An)
- case 6: // (An) + (Xn) + d8
+ case 5: // (d16, An)
+ case 6: // (An) + (Xn) + d8
store_extended_float80(m68k, mem_addr, REG_FP(m68k)[7-i]);
mem_addr += 12;
break;
@@ -1774,10 +1774,10 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
break;
}
- default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4);
+ default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4);
}
}
- else // From mem to FP regs
+ else // From mem to FP regs
{
switch (mode)
{
@@ -1785,7 +1785,7 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
// FIXME: not really tested, but seems to work
reglist = REG_D(m68k)[(reglist >> 4) & 7];
- case 2: // Static register list, postincrement or control addressing mode
+ case 2: // Static register list, postincrement or control addressing mode
{
for (i=0; i < 8; i++)
{
@@ -1793,8 +1793,8 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
{
switch (ea >> 3)
{
- case 5: // (d16, An)
- case 6: // (An) + (Xn) + d8
+ case 5: // (d16, An)
+ case 6: // (An) + (Xn) + d8
REG_FP(m68k)[7-i] = load_extended_float80(m68k, mem_addr);
mem_addr += 12;
break;
@@ -1808,7 +1808,7 @@ static void fmovem(m68ki_cpu_core *m68k, UINT16 w2)
break;
}
- default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4);
+ default: fatalerror("M680x0: FMOVEM: mode %d unimplemented at %08X\n", mode, REG_PC(m68k)-4);
}
}
}
@@ -1832,7 +1832,7 @@ static void fbcc16(m68ki_cpu_core *m68k)
// TODO: condition and jump!!!
if (TEST_CONDITION(m68k, condition))
{
- m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16(m68k, offset-2);
}
@@ -1849,7 +1849,7 @@ static void fbcc32(m68ki_cpu_core *m68k)
// TODO: condition and jump!!!
if (TEST_CONDITION(m68k, condition))
{
- m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */
+ m68ki_trace_t0(m68k); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32(m68k, offset-4);
}
@@ -1868,39 +1868,39 @@ void m68040_fpu_op0(m68ki_cpu_core *m68k)
UINT16 w2 = OPER_I_16(m68k);
switch ((w2 >> 13) & 0x7)
{
- case 0x0: // FPU ALU FP, FP
- case 0x2: // FPU ALU ea, FP
+ case 0x0: // FPU ALU FP, FP
+ case 0x2: // FPU ALU ea, FP
{
fpgen_rm_reg(m68k, w2);
break;
}
- case 0x3: // FMOVE FP, ea
+ case 0x3: // FMOVE FP, ea
{
fmove_reg_mem(m68k, w2);
break;
}
- case 0x4: // FMOVEM ea, FPCR
- case 0x5: // FMOVEM FPCR, ea
+ case 0x4: // FMOVEM ea, FPCR
+ case 0x5: // FMOVEM FPCR, ea
{
fmove_fpcr(m68k, w2);
break;
}
- case 0x6: // FMOVEM ea, list
- case 0x7: // FMOVEM list, ea
+ case 0x6: // FMOVEM ea, list
+ case 0x7: // FMOVEM list, ea
{
fmovem(m68k, w2);
break;
}
- default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, REG_PC(m68k)-4);
+ default: fatalerror("M68kFPU: unimplemented subop %d at %08X\n", (w2 >> 13) & 0x7, REG_PC(m68k)-4);
}
break;
}
- case 1: // FBcc disp16
+ case 1: // FBcc disp16
{
switch ((m68k->ir >> 3) & 0x7) {
case 1: // FDBcc
@@ -1913,18 +1913,18 @@ void m68040_fpu_op0(m68ki_cpu_core *m68k)
fatalerror("M68kFPU: unimplemented main op %d with mode %d at %08X\n", (m68k->ir >> 6) & 0x3, (m68k->ir >> 3) & 0x7, REG_PPC(m68k));
}
- case 2: // FBcc disp16
+ case 2: // FBcc disp16
{
fbcc16(m68k);
break;
}
- case 3: // FBcc disp32
+ case 3: // FBcc disp32
{
fbcc32(m68k);
break;
}
- default: fatalerror("M68kFPU: unimplemented main op %d\n", (m68k->ir >> 6) & 0x3);
+ default: fatalerror("M68kFPU: unimplemented main op %d\n", (m68k->ir >> 6) & 0x3);
}
}
@@ -2050,7 +2050,7 @@ void m68040_fpu_op1(m68ki_cpu_core *m68k)
switch ((m68k->ir >> 6) & 0x3)
{
- case 0: // FSAVE <ea>
+ case 0: // FSAVE <ea>
{
switch (mode)
{
@@ -2059,7 +2059,7 @@ void m68040_fpu_op1(m68ki_cpu_core *m68k)
m68040_do_fsave(m68k, addr, -1, 1);
break;
- case 3: // (An)+
+ case 3: // (An)+
addr = EA_AY_PI_32(m68k);
m68040_do_fsave(m68k, addr, reg, 1);
break;
@@ -2077,13 +2077,13 @@ void m68040_fpu_op1(m68ki_cpu_core *m68k)
case 7: //
switch (reg)
{
- case 1: // (abs32)
+ case 1: // (abs32)
{
addr = EA_AL_32(m68k);
m68040_do_fsave(m68k, addr, -1, 1);
break;
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
addr = EA_PCDI_16(m68k);
m68040_do_fsave(m68k, addr, -1, 1);
@@ -2102,7 +2102,7 @@ void m68040_fpu_op1(m68ki_cpu_core *m68k)
}
break;
- case 1: // FRESTORE <ea>
+ case 1: // FRESTORE <ea>
{
switch (mode)
{
@@ -2111,7 +2111,7 @@ void m68040_fpu_op1(m68ki_cpu_core *m68k)
m68040_do_frestore(m68k, addr, -1);
break;
- case 3: // (An)+
+ case 3: // (An)+
addr = EA_AY_PI_32(m68k);
m68040_do_frestore(m68k, addr, reg);
break;
@@ -2124,13 +2124,13 @@ void m68040_fpu_op1(m68ki_cpu_core *m68k)
case 7: //
switch (reg)
{
- case 1: // (abs32)
+ case 1: // (abs32)
{
addr = EA_AL_32(m68k);
m68040_do_frestore(m68k, addr, -1);
break;
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
addr = EA_PCDI_16(m68k);
m68040_do_frestore(m68k, addr, -1);
@@ -2149,9 +2149,6 @@ void m68040_fpu_op1(m68ki_cpu_core *m68k)
}
break;
- default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m68k->ir >> 6) & 0x3, REG_PC(m68k)-2);
+ default: fatalerror("m68040_fpu_op1: unimplemented op %d at %08X\n", (m68k->ir >> 6) & 0x3, REG_PC(m68k)-2);
}
}
-
-
-
diff --git a/src/emu/cpu/m68000/m68kmake.c b/src/emu/cpu/m68000/m68kmake.c
index fd3322fa631..64f0577949f 100644
--- a/src/emu/cpu/m68000/m68kmake.c
+++ b/src/emu/cpu/m68000/m68kmake.c
@@ -75,16 +75,16 @@ static const char g_version[] = "4.90";
#define M68K_MAX_PATH 1024
#define M68K_MAX_DIR 1024
-#define MAX_LINE_LENGTH 200 /* length of 1 line */
-#define MAX_BODY_LENGTH 300 /* Number of lines in 1 function */
-#define MAX_REPLACE_LENGTH 30 /* Max number of replace strings */
-#define MAX_INSERT_LENGTH 5000 /* Max size of insert piece */
-#define MAX_NAME_LENGTH 96 /* Max length of ophandler name */
-#define MAX_SPEC_PROC_LENGTH 4 /* Max length of special processing str */
-#define MAX_SPEC_EA_LENGTH 5 /* Max length of specified EA str */
-#define EA_ALLOWED_LENGTH 11 /* Max length of ea allowed str */
-#define MAX_OPCODE_INPUT_TABLE_LENGTH 1000 /* Max length of opcode handler tbl */
-#define MAX_OPCODE_OUTPUT_TABLE_LENGTH 3000 /* Max length of opcode handler tbl */
+#define MAX_LINE_LENGTH 200 /* length of 1 line */
+#define MAX_BODY_LENGTH 300 /* Number of lines in 1 function */
+#define MAX_REPLACE_LENGTH 30 /* Max number of replace strings */
+#define MAX_INSERT_LENGTH 5000 /* Max size of insert piece */
+#define MAX_NAME_LENGTH 96 /* Max length of ophandler name */
+#define MAX_SPEC_PROC_LENGTH 4 /* Max length of special processing str */
+#define MAX_SPEC_EA_LENGTH 5 /* Max length of specified EA str */
+#define EA_ALLOWED_LENGTH 11 /* Max length of ea allowed str */
+#define MAX_OPCODE_INPUT_TABLE_LENGTH 1000 /* Max length of opcode handler tbl */
+#define MAX_OPCODE_OUTPUT_TABLE_LENGTH 3000 /* Max length of opcode handler tbl */
/* Default filenames */
#define FILENAME_INPUT "m68k_in.c"
@@ -137,7 +137,7 @@ enum
CPU_TYPE_030, // 3
CPU_TYPE_040, // 4
CPU_TYPE_68340, // 5
- CPU_TYPE_COLDFIRE, // 6
+ CPU_TYPE_COLDFIRE, // 6
NUM_CPUS
};
@@ -158,19 +158,19 @@ enum
enum
{
- EA_MODE_NONE, /* No special addressing mode */
- EA_MODE_AI, /* Address register indirect */
- EA_MODE_PI, /* Address register indirect with postincrement */
- EA_MODE_PI7, /* Address register 7 indirect with postincrement */
- EA_MODE_PD, /* Address register indirect with predecrement */
- EA_MODE_PD7, /* Address register 7 indirect with predecrement */
- EA_MODE_DI, /* Address register indirect with displacement */
- EA_MODE_IX, /* Address register indirect with index */
- EA_MODE_AW, /* Absolute word */
- EA_MODE_AL, /* Absolute long */
- EA_MODE_PCDI, /* Program counter indirect with displacement */
- EA_MODE_PCIX, /* Program counter indirect with index */
- EA_MODE_I /* Immediate */
+ EA_MODE_NONE, /* No special addressing mode */
+ EA_MODE_AI, /* Address register indirect */
+ EA_MODE_PI, /* Address register indirect with postincrement */
+ EA_MODE_PI7, /* Address register 7 indirect with postincrement */
+ EA_MODE_PD, /* Address register indirect with predecrement */
+ EA_MODE_PD7, /* Address register 7 indirect with predecrement */
+ EA_MODE_DI, /* Address register indirect with displacement */
+ EA_MODE_IX, /* Address register indirect with index */
+ EA_MODE_AW, /* Absolute word */
+ EA_MODE_AL, /* Absolute long */
+ EA_MODE_PCDI, /* Program counter indirect with displacement */
+ EA_MODE_PCIX, /* Program counter indirect with index */
+ EA_MODE_I /* Immediate */
};
@@ -311,10 +311,10 @@ static const char *const g_cc_table[16][2] =
/* size to index translator (0 -> 0, 8 and 16 -> 1, 32 -> 2) */
static const int g_size_select_table[33] =
{
- 0, /* unsized */
- 0, 0, 0, 0, 0, 0, 0, 1, /* 8 */
- 0, 0, 0, 0, 0, 0, 0, 1, /* 16 */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2 /* 32 */
+ 0, /* unsized */
+ 0, 0, 0, 0, 0, 0, 0, 1, /* 8 */
+ 0, 0, 0, 0, 0, 0, 0, 1, /* 16 */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2 /* 32 */
};
/* Extra cycles required for certain EA modes */
@@ -339,91 +339,91 @@ static const int g_ea_cycle_table[13][NUM_CPUS][3] =
/* Extra cycles for JMP instruction (000, 010) */
static const int g_jmp_cycle_table[13] =
{
- 0, /* EA_MODE_NONE */
- 4, /* EA_MODE_AI */
- 0, /* EA_MODE_PI */
- 0, /* EA_MODE_PI7 */
- 0, /* EA_MODE_PD */
- 0, /* EA_MODE_PD7 */
- 6, /* EA_MODE_DI */
+ 0, /* EA_MODE_NONE */
+ 4, /* EA_MODE_AI */
+ 0, /* EA_MODE_PI */
+ 0, /* EA_MODE_PI7 */
+ 0, /* EA_MODE_PD */
+ 0, /* EA_MODE_PD7 */
+ 6, /* EA_MODE_DI */
10, /* EA_MODE_IX */
- 6, /* EA_MODE_AW */
- 8, /* EA_MODE_AL */
- 6, /* EA_MODE_PCDI */
+ 6, /* EA_MODE_AW */
+ 8, /* EA_MODE_AL */
+ 6, /* EA_MODE_PCDI */
10, /* EA_MODE_PCIX */
- 0, /* EA_MODE_I */
+ 0, /* EA_MODE_I */
};
/* Extra cycles for JSR instruction (000, 010) */
static const int g_jsr_cycle_table[13] =
{
- 0, /* EA_MODE_NONE */
- 4, /* EA_MODE_AI */
- 0, /* EA_MODE_PI */
- 0, /* EA_MODE_PI7 */
- 0, /* EA_MODE_PD */
- 0, /* EA_MODE_PD7 */
- 6, /* EA_MODE_DI */
+ 0, /* EA_MODE_NONE */
+ 4, /* EA_MODE_AI */
+ 0, /* EA_MODE_PI */
+ 0, /* EA_MODE_PI7 */
+ 0, /* EA_MODE_PD */
+ 0, /* EA_MODE_PD7 */
+ 6, /* EA_MODE_DI */
10, /* EA_MODE_IX */
- 6, /* EA_MODE_AW */
- 8, /* EA_MODE_AL */
- 6, /* EA_MODE_PCDI */
+ 6, /* EA_MODE_AW */
+ 8, /* EA_MODE_AL */
+ 6, /* EA_MODE_PCDI */
10, /* EA_MODE_PCIX */
- 0, /* EA_MODE_I */
+ 0, /* EA_MODE_I */
};
/* Extra cycles for LEA instruction (000, 010) */
static const int g_lea_cycle_table[13] =
{
- 0, /* EA_MODE_NONE */
- 4, /* EA_MODE_AI */
- 0, /* EA_MODE_PI */
- 0, /* EA_MODE_PI7 */
- 0, /* EA_MODE_PD */
- 0, /* EA_MODE_PD7 */
- 8, /* EA_MODE_DI */
+ 0, /* EA_MODE_NONE */
+ 4, /* EA_MODE_AI */
+ 0, /* EA_MODE_PI */
+ 0, /* EA_MODE_PI7 */
+ 0, /* EA_MODE_PD */
+ 0, /* EA_MODE_PD7 */
+ 8, /* EA_MODE_DI */
12, /* EA_MODE_IX */
- 8, /* EA_MODE_AW */
+ 8, /* EA_MODE_AW */
12, /* EA_MODE_AL */
- 8, /* EA_MODE_PCDI */
+ 8, /* EA_MODE_PCDI */
12, /* EA_MODE_PCIX */
- 0, /* EA_MODE_I */
+ 0, /* EA_MODE_I */
};
/* Extra cycles for PEA instruction (000, 010) */
static const int g_pea_cycle_table[13] =
{
- 0, /* EA_MODE_NONE */
- 6, /* EA_MODE_AI */
- 0, /* EA_MODE_PI */
- 0, /* EA_MODE_PI7 */
- 0, /* EA_MODE_PD */
- 0, /* EA_MODE_PD7 */
+ 0, /* EA_MODE_NONE */
+ 6, /* EA_MODE_AI */
+ 0, /* EA_MODE_PI */
+ 0, /* EA_MODE_PI7 */
+ 0, /* EA_MODE_PD */
+ 0, /* EA_MODE_PD7 */
10, /* EA_MODE_DI */
14, /* EA_MODE_IX */
10, /* EA_MODE_AW */
14, /* EA_MODE_AL */
10, /* EA_MODE_PCDI */
14, /* EA_MODE_PCIX */
- 0, /* EA_MODE_I */
+ 0, /* EA_MODE_I */
};
/* Extra cycles for MOVEM instruction (000, 010) */
static const int g_movem_cycle_table[13] =
{
- 0, /* EA_MODE_NONE */
- 0, /* EA_MODE_AI */
- 0, /* EA_MODE_PI */
- 0, /* EA_MODE_PI7 */
- 0, /* EA_MODE_PD */
- 0, /* EA_MODE_PD7 */
- 4, /* EA_MODE_DI */
- 6, /* EA_MODE_IX */
- 4, /* EA_MODE_AW */
- 8, /* EA_MODE_AL */
- 0, /* EA_MODE_PCDI */
- 0, /* EA_MODE_PCIX */
- 0, /* EA_MODE_I */
+ 0, /* EA_MODE_NONE */
+ 0, /* EA_MODE_AI */
+ 0, /* EA_MODE_PI */
+ 0, /* EA_MODE_PI7 */
+ 0, /* EA_MODE_PD */
+ 0, /* EA_MODE_PD7 */
+ 4, /* EA_MODE_DI */
+ 6, /* EA_MODE_IX */
+ 4, /* EA_MODE_AW */
+ 8, /* EA_MODE_AL */
+ 0, /* EA_MODE_PCDI */
+ 0, /* EA_MODE_PCIX */
+ 0, /* EA_MODE_I */
};
/* Extra cycles for MOVES instruction (010) */
@@ -560,10 +560,10 @@ static int skip_spaces(char* str)
/* Count the number of set bits in a value */
static int num_bits(int value)
{
- value = ((value & 0xaaaa) >> 1) + (value & 0x5555);
- value = ((value & 0xcccc) >> 2) + (value & 0x3333);
- value = ((value & 0xf0f0) >> 4) + (value & 0x0f0f);
- value = ((value & 0xff00) >> 8) + (value & 0x00ff);
+ value = ((value & 0xaaaa) >> 1) + (value & 0x5555);
+ value = ((value & 0xcccc) >> 2) + (value & 0x3333);
+ value = ((value & 0xf0f0) >> 4) + (value & 0x0f0f);
+ value = ((value & 0xff00) >> 8) + (value & 0x00ff);
return value;
}
@@ -637,7 +637,7 @@ static int get_oper_cycles(opcode_struct* op, int ea_mode, int cpu_type)
/* ASG: added these cases -- immediate modes take 2 extra cycles here */
/* SV: but only when operating on long, and also on register direct mode */
if(cpu_type == CPU_TYPE_000 && (ea_mode == EA_MODE_I || ea_mode == EA_MODE_NONE) && op->size == 32 &&
- ((strcmp(op->name, "add") == 0 && strcmp(op->spec_proc, "er") == 0) ||
+ ((strcmp(op->name, "add") == 0 && strcmp(op->spec_proc, "er") == 0) ||
strcmp(op->name, "adda") == 0 ||
(strcmp(op->name, "and") == 0 && strcmp(op->spec_proc, "er") == 0) ||
(strcmp(op->name, "or") == 0 && strcmp(op->spec_proc, "er") == 0) ||
@@ -667,7 +667,7 @@ static opcode_struct* find_opcode(char* name, int size, char* spec_proc, char* s
for(op = g_opcode_input_table;op->name != NULL;op++)
{
- if( strcmp(name, op->name) == 0 &&
+ if( strcmp(name, op->name) == 0 &&
(size == op->size) &&
strcmp(spec_proc, op->spec_proc) == 0 &&
strcmp(spec_ea, op->spec_ea) == 0)
@@ -709,7 +709,7 @@ static int extract_opcode_info(char* src, char* name, int* size, char* spec_proc
*size = atoi(ptr);
ptr = strstr(ptr, ",");
if(ptr == NULL) return 0;
- ptr++;
+ ptr++;
ptr += skip_spaces(ptr);
ptr += check_strcncpy(spec_proc, ptr, ',', MAX_SPEC_PROC_LENGTH);
diff --git a/src/emu/cpu/m68000/m68kmmu.h b/src/emu/cpu/m68000/m68kmmu.h
index 9f05c956612..e5ae91fc6c0 100644
--- a/src/emu/cpu/m68000/m68kmmu.h
+++ b/src/emu/cpu/m68000/m68kmmu.h
@@ -54,21 +54,21 @@ static UINT32 DECODE_EA_32(m68ki_cpu_core *m68k, int ea)
switch (mode)
{
- case 2: // (An)
+ case 2: // (An)
{
return REG_A(m68k)[reg];
}
- case 3: // (An)+
+ case 3: // (An)+
{
UINT32 ea = EA_AY_PI_32(m68k);
return ea;
}
- case 5: // (d16, An)
+ case 5: // (d16, An)
{
UINT32 ea = EA_AY_DI_32(m68k);
return ea;
}
- case 6: // (An) + (Xn) + d8
+ case 6: // (An) + (Xn) + d8
{
UINT32 ea = EA_AY_IX_32(m68k);
return ea;
@@ -77,28 +77,28 @@ static UINT32 DECODE_EA_32(m68ki_cpu_core *m68k, int ea)
{
switch (reg)
{
- case 0: // (xxx).W
+ case 0: // (xxx).W
{
UINT32 ea = (UINT32)OPER_I_16(m68k);
return ea;
}
- case 1: // (xxx).L
+ case 1: // (xxx).L
{
UINT32 d1 = OPER_I_16(m68k);
UINT32 d2 = OPER_I_16(m68k);
UINT32 ea = (d1 << 16) | d2;
return ea;
}
- case 2: // (d16, PC)
+ case 2: // (d16, PC)
{
UINT32 ea = EA_PCDI_32(m68k);
return ea;
}
- default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
break;
}
- default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
+ default: fatalerror("m68k: DECODE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC(m68k));
}
return 0;
}
@@ -148,7 +148,7 @@ void pmmu_atc_add(m68ki_cpu_core *m68k, UINT32 logical, UINT32 physical, int fc)
}
// add the entry
- // printf("ATC[%2d] add: log %08x -> phys %08x (fc=%d)\n", found, (logical>>ps) << ps, (physical >> ps) << ps, fc);
+ // printf("ATC[%2d] add: log %08x -> phys %08x (fc=%d)\n", found, (logical>>ps) << ps, (physical >> ps) << ps, fc);
m68k->mmu_atc_tag[found] = atc_tag;
m68k->mmu_atc_data[found] = (physical >> ps) << (ps-8);
@@ -166,7 +166,7 @@ void pmmu_atc_add(m68ki_cpu_core *m68k, UINT32 logical, UINT32 physical, int fc)
void pmmu_atc_flush(m68ki_cpu_core *m68k)
{
int i;
- // printf("ATC flush: pc=%08x\n", REG_PPC(m68k));
+ // printf("ATC flush: pc=%08x\n", REG_PPC(m68k));
for (i = 0; i < MMU_ATC_ENTRIES; i++)
{
@@ -322,7 +322,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
root_aptr = m68k->mmu_srp_aptr;
root_limit = m68k->mmu_srp_limit;
}
- else // else use the CRP
+ else // else use the CRP
{
root_aptr = m68k->mmu_crp_aptr;
root_limit = m68k->mmu_crp_limit;
@@ -344,16 +344,16 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
// find out what format table A is
switch (root_limit & M68K_MMU_DF_DT)
{
- case M68K_MMU_DF_DT0: // invalid, will cause MMU exception
+ case M68K_MMU_DF_DT0: // invalid, will cause MMU exception
m68k->mmu_tmp_sr |= M68K_MMU_SR_INVALID;
return root_aptr;
- case M68K_MMU_DF_DT1: // page descriptor, will cause direct mapping
+ case M68K_MMU_DF_DT1: // page descriptor, will cause direct mapping
addr_out = tptr + addr_in;
// printf("PMMU: PC=%x root mode %d (addr_in %08x -> %08x)\n", m68k->ppc, M68K_MMU_DF_DT1, addr_in, addr_out);
return addr_out;
- case M68K_MMU_DF_DT2: // valid 4 byte descriptors
+ case M68K_MMU_DF_DT2: // valid 4 byte descriptors
tofs *= 4;
// if (verbose) printf("PMMU: reading table A entry at %08x\n", tofs + tptr);
tbl_entry = get_dt2_table_entry(m68k, tptr + tofs, ptest);
@@ -403,7 +403,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
// if (verbose) printf("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
break;
- case M68K_MMU_DF_DT1: // early termination descriptor
+ case M68K_MMU_DF_DT1: // early termination descriptor
tbl_entry &= (~0 << ps);
shift = is+abits;
@@ -423,7 +423,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
switch (tbmode)
{
- case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (but not for ptest)
+ case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (but not for ptest)
m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_2);
// last valid pointer (for ptest)
addr_out = last_entry_ptr;
@@ -460,7 +460,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
{
switch (tcmode)
{
- case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (unless ptest)
+ case M68K_MMU_DF_DT0: // invalid, will cause MMU exception (unless ptest)
m68k->mmu_tmp_sr |= (M68K_MMU_SR_INVALID | M68K_MMU_SR_LEVEL_3);
addr_out = tptr + tofs;
resolved = 1;
@@ -481,7 +481,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
}
}
- if (!ptest)
+ if (!ptest)
{
if (m68k->mmu_tmp_sr & M68K_MMU_SR_INVALID)
{
@@ -536,12 +536,12 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
// transparent translation registers are always in force even if the PMMU itself is disabled
// they don't do much in emulation because we never write out of order, but the write-protect and cache control features
// are emulatable, and apparently transparent translation regions skip the page table lookup.
- if (fc & 1) // data, use DTT0/DTT1
+ if (fc & 1) // data, use DTT0/DTT1
{
tt0 = m68k->mmu_dtt0;
tt1 = m68k->mmu_dtt1;
}
- else if (fc & 2) // program, use ITT0/ITT1
+ else if (fc & 2) // program, use ITT0/ITT1
{
tt0 = m68k->mmu_itt0;
tt1 = m68k->mmu_itt1;
@@ -562,7 +562,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
if ((addr_in & mask) == (tt0 & mask) && (fc & fcmask[(tt0 >> 13) & 3]) == fcmatch[(tt0 >> 13) & 3])
{
// fprintf(stderr, "TT0 match on address %08x (TT0 = %08x, mask = %08x)\n", addr_in, tt0, mask);
- if ((tt0 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect?
+ if ((tt0 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect?
{
if (++m68k->mmu_tmp_buserror_occurred == 1)
{
@@ -587,7 +587,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
if ((addr_in & mask) == (tt1 & mask) && (fc & fcmask[(tt1 >> 13) & 3]) == fcmatch[(tt1 >> 13) & 3])
{
// fprintf(stderr, "TT1 match on address %08x (TT0 = %08x, mask = %08x)\n", addr_in, tt1, mask);
- if ((tt1 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect?
+ if ((tt1 & 4) && !m68k->mmu_tmp_rw && !ptest) // write protect?
{
if (++m68k->mmu_tmp_buserror_occurred == 1)
{
@@ -677,7 +677,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
}
// now do the page lookup
- if (m68k->mmu_tc & 0x4000) // 8k pages?
+ if (m68k->mmu_tc & 0x4000) // 8k pages?
{
page_idx = (addr_in >> 13) & 0x1f;
page = addr_in & 0x1fff;
@@ -685,7 +685,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
// logerror("8k pages: index %x page %x\n", page_idx, page);
}
- else // 4k pages
+ else // 4k pages
{
page_idx = (addr_in >> 12) & 0x3f;
page = addr_in & 0xfff;
@@ -720,7 +720,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
switch (page_entry & 3)
{
- case 0: // invalid
+ case 0: // invalid
// fprintf(stderr, "Invalid page entry! PC=%x, addr=%x\n", m68k->ppc, addr_in);
if (!ptest)
{
@@ -735,8 +735,8 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
return addr_in;
case 1:
- case 3: // normal
- if (m68k->mmu_tc & 0x4000) // 8k pages?
+ case 3: // normal
+ if (m68k->mmu_tc & 0x4000) // 8k pages?
{
addr_out = (page_entry & ~0x1fff) | page;
}
@@ -748,7 +748,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 fc, U
break;
- case 2: // shouldn't happen
+ case 2: // shouldn't happen
fatalerror("68040: got indirect final page pointer, shouldn't be possible\n");
break;
}
@@ -810,14 +810,14 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
// logerror("68040 pflush: pc=%08x ir=%04x opmode=%d register=%d\n", REG_PPC(m68k), m68k->ir, (m68k->ir >> 3) & 3, m68k->ir & 7);
pmmu_atc_flush(m68k);
}
- else // the rest are 1111000xxxXXXXXX where xxx is the instruction family
+ else // the rest are 1111000xxxXXXXXX where xxx is the instruction family
{
switch ((m68k->ir>>9) & 0x7)
{
case 0:
modes = OPER_I_16(m68k);
- if ((modes & 0xfde0) == 0x2000) // PLOAD
+ if ((modes & 0xfde0) == 0x2000) // PLOAD
{
UINT32 ltmp = DECODE_EA_32(m68k, ea);
UINT32 ptmp;
@@ -840,27 +840,27 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
pmmu_atc_add(m68k, ltmp, ptmp, modes & 0x07);
return;
}
- else if ((modes & 0xe200) == 0x2000) // PFLUSH
+ else if ((modes & 0xe200) == 0x2000) // PFLUSH
{
pmmu_atc_flush(m68k);
return;
}
- else if (modes == 0xa000) // PFLUSHR
+ else if (modes == 0xa000) // PFLUSHR
{
pmmu_atc_flush(m68k);
return;
}
- else if (modes == 0x2800) // PVALID (FORMAT 1)
+ else if (modes == 0x2800) // PVALID (FORMAT 1)
{
printf("680x0: unhandled PVALID1\n");
return;
}
- else if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2)
+ else if ((modes & 0xfff8) == 0x2c00) // PVALID (FORMAT 2)
{
printf("680x0: unhandled PVALID2\n");
return;
}
- else if ((modes & 0xe000) == 0x8000) // PTEST
+ else if ((modes & 0xe000) == 0x8000) // PTEST
{
UINT32 v_addr = DECODE_EA_32(m68k, ea);
UINT32 p_addr;
@@ -901,8 +901,8 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
{
switch ((modes>>13) & 0x7)
{
- case 0: // MC68030/040 form with FD bit
- case 2: // MC68881 form, FD never set
+ case 0: // MC68030/040 form with FD bit
+ case 2: // MC68881 form, FD never set
if (modes & 0x200)
{
switch ((modes>>10) & 0x3f)
@@ -915,7 +915,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
WRITE_EA_32(m68k, ea, m68k->mmu_tt1);
// printf("PMMU: pc=%x PMOVE from mmu_tt1=%08x\n", m68k->ppc, m68k->mmu_tt1);
break;
- case 0x10: // translation control register
+ case 0x10: // translation control register
WRITE_EA_32(m68k, ea, m68k->mmu_tc);
// printf("PMMU: pc=%x PMOVE from mmu_tc=%08x\n", m68k->ppc, m68k->mmu_tc);
break;
@@ -936,7 +936,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
}
}
- else // top 3 bits of modes: 010 for this, 011 for status, 000 for transparent translation regs
+ else // top 3 bits of modes: 010 for this, 011 for status, 000 for transparent translation regs
{
switch ((modes>>13) & 7)
{
@@ -962,7 +962,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
case 2:
switch ((modes>>10) & 7)
{
- case 0: // translation control register
+ case 0: // translation control register
m68k->mmu_tc = READ_EA_32(m68k, ea);
// printf("PMMU: TC = %08x\n", m68k->mmu_tc);
@@ -977,13 +977,13 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
// printf("PMMU disabled\n");
}
- if (!(modes & 0x100)) // flush ATC on moves to TC, SRP, CRP with FD bit clear
+ if (!(modes & 0x100)) // flush ATC on moves to TC, SRP, CRP with FD bit clear
{
pmmu_atc_flush(m68k);
}
break;
- case 2: // supervisor root pointer
+ case 2: // supervisor root pointer
temp64 = READ_EA_64(m68k, ea);
m68k->mmu_srp_limit = (temp64>>32) & 0xffffffff;
m68k->mmu_srp_aptr = temp64 & 0xffffffff;
@@ -994,7 +994,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
}
break;
- case 3: // CPU root pointer
+ case 3: // CPU root pointer
temp64 = READ_EA_64(m68k, ea);
m68k->mmu_crp_limit = (temp64>>32) & 0xffffffff;
m68k->mmu_crp_aptr = temp64 & 0xffffffff;
@@ -1025,7 +1025,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
}
break;
- case 3: // MMU status
+ case 3: // MMU status
{
UINT32 temp = READ_EA_32(m68k, ea);
printf("680x0: unsupported PMOVE %x to MMU status, PC %x\n", temp, m68k->pc);
@@ -1035,7 +1035,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
}
break;
- case 3: // MC68030 to/from status reg
+ case 3: // MC68030 to/from status reg
if (modes & 0x200)
{
WRITE_EA_16(m68k, ea, m68k->mmu_sr);
@@ -1074,23 +1074,23 @@ INLINE UINT32 hmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
{
addr_out = addr_in & 0xffffff;
}
- else if (m68k->hmmu_enabled == M68K_HMMU_ENABLE_II) // the original II does a more complex translation
+ else if (m68k->hmmu_enabled == M68K_HMMU_ENABLE_II) // the original II does a more complex translation
{
addr_out = addr_in & 0xffffff;
if ((addr_out >= 0x800000) && (addr_out <= 0x8fffff))
{
- addr_out |= 0x40000000; // ROM
+ addr_out |= 0x40000000; // ROM
}
else if ((addr_out >= 0x900000) && (addr_out <= 0xefffff))
{
- addr_out = 0xf0000000; // NuBus
+ addr_out = 0xf0000000; // NuBus
addr_out |= ((addr_in & 0xf00000)<<4);
addr_out |= (addr_in & 0xfffff);
}
else if (addr_out >= 0xf00000)
{
- addr_out |= 0x50000000; // I/O
+ addr_out |= 0x50000000; // I/O
}
// (RAM is at 0 and doesn't need special massaging)
diff --git a/src/emu/cpu/m6805/6805dasm.c b/src/emu/cpu/m6805/6805dasm.c
index 74e9c740b7d..ce90dd06b02 100644
--- a/src/emu/cpu/m6805/6805dasm.c
+++ b/src/emu/cpu/m6805/6805dasm.c
@@ -13,30 +13,30 @@
#include "m6805.h"
enum addr_mode {
- _imp=0, /* implicit */
- _btr, /* bit test and relative */
- _bit, /* bit set/clear */
- _rel, /* relative */
- _imm, /* immediate */
- _dir, /* direct address */
- _ext, /* extended address */
- _idx, /* indexed */
- _ix1, /* indexed + byte offset */
- _ix2 /* indexed + word offset */
+ _imp=0, /* implicit */
+ _btr, /* bit test and relative */
+ _bit, /* bit set/clear */
+ _rel, /* relative */
+ _imm, /* immediate */
+ _dir, /* direct address */
+ _ext, /* extended address */
+ _idx, /* indexed */
+ _ix1, /* indexed + byte offset */
+ _ix2 /* indexed + word offset */
};
enum op_names {
- adca=0, adda, anda, asl, asla, aslx, asr, asra,
- asrx, bcc, bclr, bcs, beq, bhcc, bhcs, bhi,
- bih, bil, bita, bls, bmc, bmi, bms, bne,
- bpl, bra, brclr, brn, brset, bset, bsr, clc,
- cli, clr, clra, clrx, cmpa, com, coma, comx,
- cpx, dec, deca, decx, eora, ill, inc, inca,
- incx, jmp, jsr, lda, ldx, lsr, lsra, lsrx,
- neg, nega, negx, nop, ora, rol, rola, rolx,
- ror, rora, rorx, rsp, rti, rts, sbca, sec,
- sei, sta, stx, suba, swi, tax, tst, tsta,
- tstx, txa
+ adca=0, adda, anda, asl, asla, aslx, asr, asra,
+ asrx, bcc, bclr, bcs, beq, bhcc, bhcs, bhi,
+ bih, bil, bita, bls, bmc, bmi, bms, bne,
+ bpl, bra, brclr, brn, brset, bset, bsr, clc,
+ cli, clr, clra, clrx, cmpa, com, coma, comx,
+ cpx, dec, deca, decx, eora, ill, inc, inca,
+ incx, jmp, jsr, lda, ldx, lsr, lsra, lsrx,
+ neg, nega, negx, nop, ora, rol, rola, rolx,
+ ror, rora, rorx, rsp, rti, rts, sbca, sec,
+ sei, sta, stx, suba, swi, tax, tst, tsta,
+ tstx, txa
};
static const char *const op_name_str[] = {
@@ -123,44 +123,44 @@ static const unsigned char disasm[0x100][2] = {
#if 0
static const char *const opcode_strings[0x0100] =
{
- "brset0", "brclr0", "brset1", "brclr1", "brset2", "brclr2", "brset3", "brclr3", /*00*/
- "brset4", "brclr4", "brset5", "brclr5", "brset6", "brclr6", "brset7", "brclr7",
- "bset0", "bclr0", "bset1", "bclr1", "bset2", "bclr2", "bset3", "bclr3", /*10*/
- "bset4", "bclr4", "bset5", "bclr5", "bset6", "bclr6", "bset7", "bclr7",
- "bra", "brn", "bhi", "bls", "bcc", "bcs", "bne", "beq", /*20*/
- "bhcc", "bhcs", "bpl", "bmi", "bmc", "bms", "bil", "bih",
+ "brset0", "brclr0", "brset1", "brclr1", "brset2", "brclr2", "brset3", "brclr3", /*00*/
+ "brset4", "brclr4", "brset5", "brclr5", "brset6", "brclr6", "brset7", "brclr7",
+ "bset0", "bclr0", "bset1", "bclr1", "bset2", "bclr2", "bset3", "bclr3", /*10*/
+ "bset4", "bclr4", "bset5", "bclr5", "bset6", "bclr6", "bset7", "bclr7",
+ "bra", "brn", "bhi", "bls", "bcc", "bcs", "bne", "beq", /*20*/
+ "bhcc", "bhcs", "bpl", "bmi", "bmc", "bms", "bil", "bih",
"neg_di", "illegal", "illegal", "com_di", "lsr_di", "illegal", "ror_di", "asr_di", /*30*/
- "asl_di", "rol_di", "dec_di", "illegal", "inc_di", "tst_di", "illegal", "clr_di",
- "nega", "illegal", "illegal", "coma", "lsra", "illegal", "rora", "asra", /*40*/
- "asla", "rola", "deca", "illegal", "inca", "tsta", "illegal", "clra",
- "negx", "illegal", "illegal", "comx", "lsrx", "illegal", "rorx", "asrx", /*50*/
- "aslx", "rolx", "decx", "illegal", "incx", "tstx", "illegal", "clrx",
- "neg_ix1", "illegal", "illegal", "com_ix1", "lsr_ix1", "illegal", "ror_ix1", "asr_ix1", /*60*/
- "asl_ix1", "rol_ix1", "dec_ix1", "illegal", "inc_ix1", "tst_ix1", "jmp_ix1", "clr_ix1",
- "neg_ix", "illegal", "illegal", "com_ix", "lsr_ix", "illegal", "ror_ix", "asr_ix", /*70*/
- "asl_ix", "rol_ix", "dec_ix", "illegal", "inc_ix", "tst_ix", "jmp_ix", "clr_ix",
- "rti", "rts", "illegal", "swi", "illegal", "illegal", "illegal", "illegal", /*80*/
- "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal",
- "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "tax", /*90*/
- "clc", "sec", "cli", "sei", "rsp", "nop", "illegal", "txa",
- "suba_im", "cmpa_im", "sbca_im", "cpx_im", "anda_im", "bita_im", "lda_im", "illegal", /*A0*/
- "eora_im", "adca_im", "ora_im", "adda_im", "illegal", "bsr", "ldx_im", "illegal",
- "suba_di", "cmpa_di", "sbca_di", "cpx_di", "anda_di", "bita_di", "lda_di", "sta_di", /*B0*/
- "eora_di", "adca_di", "ora_di", "adda_di", "jmp_di", "jsr_di", "ldx_di", "stx_di",
- "suba_ex", "cmpa_ex", "sbca_ex", "cpx_ex", "anda_ex", "bita_ex", "lda_ex", "sta_ex", /*C0*/
- "eora_ex", "adca_ex", "ora_ex", "adda_ex", "jmp_ex", "jsr_ex", "ldx_ex", "stx_ex",
- "suba_ix2", "cmpa_ix2", "sbca_ix2", "cpx_ix2", "anda_ix2", "bita_ix2", "lda_ix2", "sta_ix2", /*D0*/
- "eora_ix2", "adca_ix2", "ora_ix2", "adda_ix2", "jmp_ix2", "jsr_ix2", "ldx_ix2", "stx_ix2",
- "suba_ix1", "cmpa_ix1", "sbca_ix1", "cpx_ix1", "anda_ix1", "bita_ix1", "lda_ix1", "sta_ix1", /*E0*/
- "eora_ix1", "adca_ix1", "ora_ix1", "adda_ix1", "jmp_ix1", "jsr_ix1", "ldx_ix1", "stx_ix1",
- "suba_ix", "cmpa_ix", "sbca_ix", "cpx_ix", "anda_ix", "bita_ix", "lda_ix", "sta_ix", /*F0*/
- "eora_ix", "adca_ix", "ora_ix", "adda_ix", "jmp_ix", "jsr_ix", "ldx_ix", "stx_ix"
+ "asl_di", "rol_di", "dec_di", "illegal", "inc_di", "tst_di", "illegal", "clr_di",
+ "nega", "illegal", "illegal", "coma", "lsra", "illegal", "rora", "asra", /*40*/
+ "asla", "rola", "deca", "illegal", "inca", "tsta", "illegal", "clra",
+ "negx", "illegal", "illegal", "comx", "lsrx", "illegal", "rorx", "asrx", /*50*/
+ "aslx", "rolx", "decx", "illegal", "incx", "tstx", "illegal", "clrx",
+ "neg_ix1", "illegal", "illegal", "com_ix1", "lsr_ix1", "illegal", "ror_ix1", "asr_ix1", /*60*/
+ "asl_ix1", "rol_ix1", "dec_ix1", "illegal", "inc_ix1", "tst_ix1", "jmp_ix1", "clr_ix1",
+ "neg_ix", "illegal", "illegal", "com_ix", "lsr_ix", "illegal", "ror_ix", "asr_ix", /*70*/
+ "asl_ix", "rol_ix", "dec_ix", "illegal", "inc_ix", "tst_ix", "jmp_ix", "clr_ix",
+ "rti", "rts", "illegal", "swi", "illegal", "illegal", "illegal", "illegal", /*80*/
+ "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal",
+ "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "tax", /*90*/
+ "clc", "sec", "cli", "sei", "rsp", "nop", "illegal", "txa",
+ "suba_im", "cmpa_im", "sbca_im", "cpx_im", "anda_im", "bita_im", "lda_im", "illegal", /*A0*/
+ "eora_im", "adca_im", "ora_im", "adda_im", "illegal", "bsr", "ldx_im", "illegal",
+ "suba_di", "cmpa_di", "sbca_di", "cpx_di", "anda_di", "bita_di", "lda_di", "sta_di", /*B0*/
+ "eora_di", "adca_di", "ora_di", "adda_di", "jmp_di", "jsr_di", "ldx_di", "stx_di",
+ "suba_ex", "cmpa_ex", "sbca_ex", "cpx_ex", "anda_ex", "bita_ex", "lda_ex", "sta_ex", /*C0*/
+ "eora_ex", "adca_ex", "ora_ex", "adda_ex", "jmp_ex", "jsr_ex", "ldx_ex", "stx_ex",
+ "suba_ix2", "cmpa_ix2", "sbca_ix2", "cpx_ix2", "anda_ix2", "bita_ix2", "lda_ix2", "sta_ix2", /*D0*/
+ "eora_ix2", "adca_ix2", "ora_ix2", "adda_ix2", "jmp_ix2", "jsr_ix2", "ldx_ix2", "stx_ix2",
+ "suba_ix1", "cmpa_ix1", "sbca_ix1", "cpx_ix1", "anda_ix1", "bita_ix1", "lda_ix1", "sta_ix1", /*E0*/
+ "eora_ix1", "adca_ix1", "ora_ix1", "adda_ix1", "jmp_ix1", "jsr_ix1", "ldx_ix1", "stx_ix1",
+ "suba_ix", "cmpa_ix", "sbca_ix", "cpx_ix", "anda_ix", "bita_ix", "lda_ix", "sta_ix", /*F0*/
+ "eora_ix", "adca_ix", "ora_ix", "adda_ix", "jmp_ix", "jsr_ix", "ldx_ix", "stx_ix"
};
#endif
CPU_DISASSEMBLE( m6805 )
{
- int code, bit;
+ int code, bit;
UINT16 ea;
UINT32 flags = 0;
@@ -175,38 +175,38 @@ CPU_DISASSEMBLE( m6805 )
switch( disasm[code][1] )
{
- case _btr: /* bit test and relative branch */
+ case _btr: /* bit test and relative branch */
bit = (code >> 1) & 7;
sprintf (buffer, "%d,$%02X,$%03X", bit, opram[1], pc + 3 + (INT8)opram[2]);
return 3 | flags | DASMFLAG_SUPPORTED;
- case _bit: /* bit test */
+ case _bit: /* bit test */
bit = (code >> 1) & 7;
sprintf (buffer, "%d,$%03X", bit, opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
- case _rel: /* relative */
+ case _rel: /* relative */
sprintf (buffer, "$%03X", pc + 2 + (INT8)opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
- case _imm: /* immediate */
+ case _imm: /* immediate */
sprintf (buffer, "#$%02X", opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
- case _dir: /* direct (zero page address) */
- sprintf (buffer, "$%02X", opram[1]);
+ case _dir: /* direct (zero page address) */
+ sprintf (buffer, "$%02X", opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
- case _ext: /* extended (16 bit address) */
+ case _ext: /* extended (16 bit address) */
ea = (opram[1] << 8) + opram[2];
sprintf (buffer, "$%04X", ea);
return 3 | flags | DASMFLAG_SUPPORTED;
- case _idx: /* indexed */
+ case _idx: /* indexed */
sprintf (buffer, "(x)");
return 1 | flags | DASMFLAG_SUPPORTED;
- case _ix1: /* indexed + byte (zero page) */
+ case _ix1: /* indexed + byte (zero page) */
sprintf (buffer, "(x+$%02X)", opram[1]);
return 2 | flags | DASMFLAG_SUPPORTED;
- case _ix2: /* indexed + word (16 bit address) */
+ case _ix2: /* indexed + word (16 bit address) */
ea = (opram[1] << 8) + opram[2];
sprintf (buffer, "(x+$%04X)", ea);
return 3 | flags | DASMFLAG_SUPPORTED;
- default: /* implicit */
+ default: /* implicit */
return 1 | flags | DASMFLAG_SUPPORTED;
- }
+ }
}
diff --git a/src/emu/cpu/m6805/6805ops.c b/src/emu/cpu/m6805/6805ops.c
index a9058c5dd11..59ae9089d6a 100644
--- a/src/emu/cpu/m6805/6805ops.c
+++ b/src/emu/cpu/m6805/6805ops.c
@@ -897,7 +897,7 @@ OP_HANDLER( txa )
/* $a0 SUBA immediate ?*** */
OP_HANDLER( suba_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = A - t;
CLR_NZC;
@@ -908,7 +908,7 @@ OP_HANDLER( suba_im )
/* $a1 CMPA immediate ?*** */
OP_HANDLER( cmpa_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = A - t;
CLR_NZC;
@@ -918,7 +918,7 @@ OP_HANDLER( cmpa_im )
/* $a2 SBCA immediate ?*** */
OP_HANDLER( sbca_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -929,7 +929,7 @@ OP_HANDLER( sbca_im )
/* $a3 CPX immediate -*** */
OP_HANDLER( cpx_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = X - t;
CLR_NZC;
@@ -1034,7 +1034,7 @@ OP_HANDLER( ldx_im )
/* $b0 SUBA direct ?*** */
OP_HANDLER( suba_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t;
CLR_NZC;
@@ -1045,7 +1045,7 @@ OP_HANDLER( suba_di )
/* $b1 CMPA direct ?*** */
OP_HANDLER( cmpa_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t;
CLR_NZC;
@@ -1055,7 +1055,7 @@ OP_HANDLER( cmpa_di )
/* $b2 SBCA direct ?*** */
OP_HANDLER( sbca_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1066,7 +1066,7 @@ OP_HANDLER( sbca_di )
/* $b3 CPX direct -*** */
OP_HANDLER( cpx_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = X - t;
CLR_NZC;
@@ -1189,7 +1189,7 @@ OP_HANDLER( stx_di )
/* $c0 SUBA extended ?*** */
OP_HANDLER( suba_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZC;
@@ -1200,7 +1200,7 @@ OP_HANDLER( suba_ex )
/* $c1 CMPA extended ?*** */
OP_HANDLER( cmpa_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZC;
@@ -1210,7 +1210,7 @@ OP_HANDLER( cmpa_ex )
/* $c2 SBCA extended ?*** */
OP_HANDLER( sbca_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1221,7 +1221,7 @@ OP_HANDLER( sbca_ex )
/* $c3 CPX extended -*** */
OP_HANDLER( cpx_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = X - t;
CLR_NZC;
@@ -1344,7 +1344,7 @@ OP_HANDLER( stx_ex )
/* $d0 SUBA indexed, 2 byte offset ?*** */
OP_HANDLER( suba_ix2 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX2BYTE(t);
r = A - t;
CLR_NZC;
@@ -1355,7 +1355,7 @@ OP_HANDLER( suba_ix2 )
/* $d1 CMPA indexed, 2 byte offset ?*** */
OP_HANDLER( cmpa_ix2 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX2BYTE(t);
r = A - t;
CLR_NZC;
@@ -1365,7 +1365,7 @@ OP_HANDLER( cmpa_ix2 )
/* $d2 SBCA indexed, 2 byte offset ?*** */
OP_HANDLER( sbca_ix2 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX2BYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1376,7 +1376,7 @@ OP_HANDLER( sbca_ix2 )
/* $d3 CPX indexed, 2 byte offset -*** */
OP_HANDLER( cpx_ix2 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX2BYTE(t);
r = X - t;
CLR_NZC;
@@ -1499,7 +1499,7 @@ OP_HANDLER( stx_ix2 )
/* $e0 SUBA indexed, 1 byte offset ?*** */
OP_HANDLER( suba_ix1 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX1BYTE(t);
r = A - t;
CLR_NZC;
@@ -1510,7 +1510,7 @@ OP_HANDLER( suba_ix1 )
/* $e1 CMPA indexed, 1 byte offset ?*** */
OP_HANDLER( cmpa_ix1 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX1BYTE(t);
r = A - t;
CLR_NZC;
@@ -1520,7 +1520,7 @@ OP_HANDLER( cmpa_ix1 )
/* $e2 SBCA indexed, 1 byte offset ?*** */
OP_HANDLER( sbca_ix1 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX1BYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1531,7 +1531,7 @@ OP_HANDLER( sbca_ix1 )
/* $e3 CPX indexed, 1 byte offset -*** */
OP_HANDLER( cpx_ix1 )
{
- UINT16 t,r;
+ UINT16 t,r;
IDX1BYTE(t);
r = X - t;
CLR_NZC;
@@ -1654,7 +1654,7 @@ OP_HANDLER( stx_ix1 )
/* $f0 SUBA indexed ?*** */
OP_HANDLER( suba_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = A - t;
CLR_NZC;
@@ -1665,7 +1665,7 @@ OP_HANDLER( suba_ix )
/* $f1 CMPA indexed ?*** */
OP_HANDLER( cmpa_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = A - t;
CLR_NZC;
@@ -1675,7 +1675,7 @@ OP_HANDLER( cmpa_ix )
/* $f2 SBCA indexed ?*** */
OP_HANDLER( sbca_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = A - t - (CC & 0x01);
CLR_NZC;
@@ -1686,7 +1686,7 @@ OP_HANDLER( sbca_ix )
/* $f3 CPX indexed -*** */
OP_HANDLER( cpx_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
IDXBYTE(t);
r = X - t;
CLR_NZC;
diff --git a/src/emu/cpu/m6805/m6805.c b/src/emu/cpu/m6805/m6805.c
index c0ec5b6bfdb..d234affae48 100644
--- a/src/emu/cpu/m6805/m6805.c
+++ b/src/emu/cpu/m6805/m6805.c
@@ -60,27 +60,27 @@
/****************************************************************************/
#define M6805_RDOP_ARG(addr) ((unsigned)m_direct->read_raw_byte(addr))
-#define SP_MASK m_sp_mask /* stack pointer mask */
-#define SP_LOW m_sp_low /* stack pointer low water mark */
-#define PC m_pc.w.l /* program counter lower word */
-#define S m_s.w.l /* stack pointer lower word */
-#define A m_a /* accumulator */
-#define X m_x /* index register */
-#define CC m_cc /* condition codes */
+#define SP_MASK m_sp_mask /* stack pointer mask */
+#define SP_LOW m_sp_low /* stack pointer low water mark */
+#define PC m_pc.w.l /* program counter lower word */
+#define S m_s.w.l /* stack pointer lower word */
+#define A m_a /* accumulator */
+#define X m_x /* index register */
+#define CC m_cc /* condition codes */
#define EAD m_ea.d
#define EA m_ea.w.l
/* DS -- THESE ARE RE-DEFINED IN m6805.h TO RAM, ROM or FUNCTIONS IN cpuintrf.c */
-#define RM(addr) M6805_RDMEM(addr)
-#define WM(addr, value) M6805_WRMEM(addr, value)
+#define RM(addr) M6805_RDMEM(addr)
+#define WM(addr, value) M6805_WRMEM(addr, value)
#define M_RDOP(addr) M6805_RDOP(addr)
-#define M_RDOP_ARG(addr) M6805_RDOP_ARG(addr)
+#define M_RDOP_ARG(addr) M6805_RDOP_ARG(addr)
/* macros to tweak the PC and SP */
-#define SP_INC if( ++S > SP_MASK) S = SP_LOW
-#define SP_DEC if( --S < SP_LOW) S = SP_MASK
+#define SP_INC if( ++S > SP_MASK) S = SP_LOW
+#define SP_DEC if( --S < SP_LOW) S = SP_MASK
#define SP_ADJUST(s) ( ( (s) & SP_MASK ) | SP_LOW )
/* macros to access memory */
@@ -100,20 +100,20 @@
#define IFLAG 0x08
#define HFLAG 0x10
-#define CLR_NZ CC&=~(NFLAG|ZFLAG)
+#define CLR_NZ CC&=~(NFLAG|ZFLAG)
#define CLR_HNZC CC&=~(HFLAG|NFLAG|ZFLAG|CFLAG)
-#define CLR_Z CC&=~(ZFLAG)
+#define CLR_Z CC&=~(ZFLAG)
#define CLR_NZC CC&=~(NFLAG|ZFLAG|CFLAG)
-#define CLR_ZC CC&=~(ZFLAG|CFLAG)
+#define CLR_ZC CC&=~(ZFLAG|CFLAG)
/* macros for CC -- CC bits affected should be reset before calling */
#define SET_Z(a) if(!a)SEZ
-#define SET_Z8(a) SET_Z((UINT8)a)
-#define SET_N8(a) CC|=((a&0x80)>>5)
+#define SET_Z8(a) SET_Z((UINT8)a)
+#define SET_N8(a) CC|=((a&0x80)>>5)
#define SET_H(a,b,r) CC|=((a^b^r)&0x10)
-#define SET_C8(a) CC|=((a&0x100)>>8)
+#define SET_C8(a) CC|=((a&0x100)>>8)
-const UINT8 m6805_base_device::m_flags8i[256]= /* increment */
+const UINT8 m6805_base_device::m_flags8i[256]= /* increment */
{
0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -152,12 +152,12 @@ const UINT8 m6805_base_device::m_flags8d[256]= /* decrement */
0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,
0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x04
};
-#define SET_FLAGS8I(a) {CC |= m_flags8i[(a) & 0xff];}
-#define SET_FLAGS8D(a) {CC |= m_flags8d[(a) & 0xff];}
+#define SET_FLAGS8I(a) {CC |= m_flags8i[(a) & 0xff];}
+#define SET_FLAGS8D(a) {CC |= m_flags8d[(a) & 0xff];}
/* combos */
-#define SET_NZ8(a) {SET_N8(a); SET_Z(a);}
-#define SET_FLAGS8(a,b,r) {SET_N8(r); SET_Z8(r); SET_C8(r);}
+#define SET_NZ8(a) {SET_N8(a); SET_Z(a);}
+#define SET_FLAGS8(a,b,r) {SET_N8(r); SET_Z8(r); SET_C8(r);}
/* for treating an unsigned UINT8 as a signed INT16 */
#define SIGNED(b) ((INT16)(b & 0x80 ? b | 0xff00 : b))
@@ -197,23 +197,23 @@ const UINT8 m6805_base_device::m_flags8d[256]= /* decrement */
/* what they say it is ... */
const UINT8 m6805_base_device::m_cycles1[] =
{
- /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
- /*0*/ 10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,
- /*1*/ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
- /*2*/ 4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- /*3*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 6, 0, 6, 6, 0,
- /*4*/ 4, 0, 0, 4, 4, 0, 4, 4, 4, 4, 4, 0, 4, 4, 0, 4,
- /*5*/ 4, 0, 0, 4, 4, 0, 4, 4, 4, 4, 4, 0, 4, 4, 0, 4,
- /*6*/ 7, 0, 0, 7, 7, 0, 7, 7, 7, 7, 7, 0, 7, 7, 0, 7,
- /*7*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 6, 0, 6,
- /*8*/ 9, 6, 0,11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- /*9*/ 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 0, 2,
- /*A*/ 2, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 2, 0, 8, 2, 0,
- /*B*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5,
- /*C*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 8, 5, 6,
- /*D*/ 6, 6, 6, 6, 6, 6, 6, 7, 6, 6, 6, 6, 5, 9, 6, 7,
- /*E*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 8, 5, 6,
- /*F*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5
+ /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
+ /*0*/ 10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,
+ /*1*/ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
+ /*2*/ 4, 0, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
+ /*3*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 6, 0, 6, 6, 0,
+ /*4*/ 4, 0, 0, 4, 4, 0, 4, 4, 4, 4, 4, 0, 4, 4, 0, 4,
+ /*5*/ 4, 0, 0, 4, 4, 0, 4, 4, 4, 4, 4, 0, 4, 4, 0, 4,
+ /*6*/ 7, 0, 0, 7, 7, 0, 7, 7, 7, 7, 7, 0, 7, 7, 0, 7,
+ /*7*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 6, 0, 6,
+ /*8*/ 9, 6, 0,11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ /*9*/ 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 0, 2,
+ /*A*/ 2, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 2, 0, 8, 2, 0,
+ /*B*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5,
+ /*C*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 8, 5, 6,
+ /*D*/ 6, 6, 6, 6, 6, 6, 6, 7, 6, 6, 6, 6, 5, 9, 6, 7,
+ /*E*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 8, 5, 6,
+ /*F*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5
};
@@ -244,16 +244,16 @@ void m6805_base_device::wr_s_handler_b(UINT8 *b)
void m6805_base_device::wr_s_handler_w(PAIR *p)
{
WM( S, p->b.l );
- SP_DEC;
+ SP_DEC;
WM( S, p->b.h );
- SP_DEC;
+ SP_DEC;
}
void m6805_base_device::RM16(UINT32 addr, PAIR *p)
{
CLEAR_PAIR(p);
- p->b.h = RM(addr);
- ++addr;
+ p->b.h = RM(addr);
+ ++addr;
// if( ++addr > AMASK ) addr = 0;
p->b.l = RM(addr);
}
@@ -418,10 +418,10 @@ void m6805_base_device::device_start()
astring tempstr;
state_add(STATE_GENPC, "GENPC", m_pc.w.l).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_cc).callimport().callexport().formatstr("%8s").noshow();
- state_add(M6805_A, "A", m_a).mask(0xff);
- state_add(M6805_PC, "PC", m_pc.w.l).mask(0xffff);
- state_add(M6805_S, "S", m_s.w.l).mask(0xff);
- state_add(M6805_X, "X", m_x).mask(0xff);
+ state_add(M6805_A, "A", m_a).mask(0xff);
+ state_add(M6805_PC, "PC", m_pc.w.l).mask(0xffff);
+ state_add(M6805_S, "S", m_s.w.l).mask(0xff);
+ state_add(M6805_X, "X", m_x).mask(0xff);
state_add(M6805_CC, "CC", m_cc).mask(0xff);
save_item(NAME(A));
@@ -462,9 +462,9 @@ void m6805_base_device::device_reset()
m_direct = &m_program->direct();
/* IRQ disabled */
- SEI;
+ SEI;
- RM16(0xfffe, &m_pc);
+ RM16(0xfffe, &m_pc);
}
@@ -495,14 +495,14 @@ void m6805_base_device::state_string_export(const device_state_entry &entry, ast
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c%c%c",
- (m_cc & 0x80) ? '?' : '.',
- (m_cc & 0x40) ? '?' : '.',
- (m_cc & 0x20) ? '?' : '.',
- (m_cc & 0x10) ? 'H' : '.',
- (m_cc & 0x08) ? 'I' : '.',
- (m_cc & 0x04) ? 'N' : '.',
- (m_cc & 0x02) ? 'Z' : '.',
- (m_cc & 0x01) ? 'C' : '.');
+ (m_cc & 0x80) ? '?' : '.',
+ (m_cc & 0x40) ? '?' : '.',
+ (m_cc & 0x20) ? '?' : '.',
+ (m_cc & 0x10) ? 'H' : '.',
+ (m_cc & 0x08) ? 'I' : '.',
+ (m_cc & 0x04) ? 'N' : '.',
+ (m_cc & 0x02) ? 'Z' : '.',
+ (m_cc & 0x01) ? 'C' : '.');
break;
}
}
@@ -619,7 +619,7 @@ void m6805_base_device::execute_run()
{
UINT8 ireg;
- S = SP_ADJUST( S ); /* Taken from CPU_SET_CONTEXT when pointer'afying */
+ S = SP_ADJUST( S ); /* Taken from CPU_SET_CONTEXT when pointer'afying */
do
{
diff --git a/src/emu/cpu/m6805/m6805.h b/src/emu/cpu/m6805/m6805.h
index 427f7561556..70b3d1e53dd 100644
--- a/src/emu/cpu/m6805/m6805.h
+++ b/src/emu/cpu/m6805/m6805.h
@@ -263,27 +263,27 @@ protected:
const address_space_config m_program_config;
// CPU registers
- PAIR m_ea; /* effective address */
+ PAIR m_ea; /* effective address */
- UINT32 m_sp_mask; /* Stack pointer address mask */
- UINT32 m_sp_low; /* Stack pointer low water mark (or floor) */
- PAIR m_pc; /* Program counter */
- PAIR m_s; /* Stack pointer */
- UINT8 m_a; /* Accumulator */
- UINT8 m_x; /* Index register */
- UINT8 m_cc; /* Condition codes */
+ UINT32 m_sp_mask; /* Stack pointer address mask */
+ UINT32 m_sp_low; /* Stack pointer low water mark (or floor) */
+ PAIR m_pc; /* Program counter */
+ PAIR m_s; /* Stack pointer */
+ UINT8 m_a; /* Accumulator */
+ UINT8 m_x; /* Index register */
+ UINT8 m_cc; /* Condition codes */
- UINT16 m_pending_interrupts; /* MB */
+ UINT16 m_pending_interrupts; /* MB */
- int m_irq_state[9]; /* KW Additional lines for HD63705 */
- int m_nmi_state;
+ int m_irq_state[9]; /* KW Additional lines for HD63705 */
+ int m_nmi_state;
// other internal states
- int m_icount;
+ int m_icount;
// address spaces
- address_space *m_program;
- direct_read_data *m_direct;
+ address_space *m_program;
+ direct_read_data *m_direct;
};
// ======================> m6805_device
@@ -293,7 +293,7 @@ class m6805_device : public m6805_base_device
public:
// construction/destruction
m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : m6805_base_device(mconfig, tag, owner, clock, M6805, "M6805", 12) { }
+ : m6805_base_device(mconfig, tag, owner, clock, M6805, "M6805", 12) { }
protected:
virtual void execute_set_input(int inputnum, int state);
@@ -306,7 +306,7 @@ class m68hc05eg_device : public m6805_base_device
public:
// construction/destruction
m68hc05eg_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : m6805_base_device(mconfig, tag, owner, clock, M68HC05EG, "M68HC05EG", 13) { }
+ : m6805_base_device(mconfig, tag, owner, clock, M68HC05EG, "M68HC05EG", 13) { }
protected:
// device-level overrides
@@ -324,7 +324,7 @@ class m68705_device : public m6805_base_device
public:
// construction/destruction
m68705_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : m6805_base_device(mconfig, tag, owner, clock, M68705, "M68705", 12) { }
+ : m6805_base_device(mconfig, tag, owner, clock, M68705, "M68705", 12) { }
protected:
// device-level overrides
@@ -342,7 +342,7 @@ class hd63705_device : public m6805_base_device
public:
// construction/destruction
hd63705_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : m6805_base_device(mconfig, tag, owner, clock, HD63705, "HD63705", 16) { }
+ : m6805_base_device(mconfig, tag, owner, clock, HD63705, "HD63705", 16) { }
protected:
// device-level overrides
@@ -360,56 +360,56 @@ protected:
enum { M6805_PC=1, M6805_S, M6805_CC, M6805_A, M6805_X, M6805_IRQ_STATE };
-#define M6805_IRQ_LINE 0
+#define M6805_IRQ_LINE 0
/****************************************************************************
* 68HC05EG section
****************************************************************************/
-#define M68HC05EG_INT_IRQ (M6805_IRQ_LINE)
-#define M68HC05EG_INT_TIMER (M6805_IRQ_LINE+1)
-#define M68HC05EG_INT_CPI (M6805_IRQ_LINE+2)
+#define M68HC05EG_INT_IRQ (M6805_IRQ_LINE)
+#define M68HC05EG_INT_TIMER (M6805_IRQ_LINE+1)
+#define M68HC05EG_INT_CPI (M6805_IRQ_LINE+2)
/****************************************************************************
* 68705 section
****************************************************************************/
-#define M68705_A M6805_A
-#define M68705_PC M6805_PC
-#define M68705_S M6805_S
-#define M68705_X M6805_X
-#define M68705_CC M6805_CC
-#define M68705_IRQ_STATE M6805_IRQ_STATE
+#define M68705_A M6805_A
+#define M68705_PC M6805_PC
+#define M68705_S M6805_S
+#define M68705_X M6805_X
+#define M68705_CC M6805_CC
+#define M68705_IRQ_STATE M6805_IRQ_STATE
-#define M68705_INT_MASK 0x03
-#define M68705_IRQ_LINE M6805_IRQ_LINE
-#define M68705_INT_TIMER 0x01
+#define M68705_INT_MASK 0x03
+#define M68705_IRQ_LINE M6805_IRQ_LINE
+#define M68705_INT_TIMER 0x01
/****************************************************************************
* HD63705 section
****************************************************************************/
-#define HD63705_A M6805_A
-#define HD63705_PC M6805_PC
-#define HD63705_S M6805_S
-#define HD63705_X M6805_X
-#define HD63705_CC M6805_CC
-#define HD63705_NMI_STATE M6805_IRQ_STATE
-#define HD63705_IRQ1_STATE M6805_IRQ_STATE+1
-#define HD63705_IRQ2_STATE M6805_IRQ_STATE+2
-#define HD63705_ADCONV_STATE M6805_IRQ_STATE+3
-
-#define HD63705_INT_MASK 0x1ff
-
-#define HD63705_INT_IRQ1 0x00
-#define HD63705_INT_IRQ2 0x01
-#define HD63705_INT_TIMER1 0x02
-#define HD63705_INT_TIMER2 0x03
-#define HD63705_INT_TIMER3 0x04
-#define HD63705_INT_PCI 0x05
-#define HD63705_INT_SCI 0x06
-#define HD63705_INT_ADCONV 0x07
-#define HD63705_INT_NMI 0x08
+#define HD63705_A M6805_A
+#define HD63705_PC M6805_PC
+#define HD63705_S M6805_S
+#define HD63705_X M6805_X
+#define HD63705_CC M6805_CC
+#define HD63705_NMI_STATE M6805_IRQ_STATE
+#define HD63705_IRQ1_STATE M6805_IRQ_STATE+1
+#define HD63705_IRQ2_STATE M6805_IRQ_STATE+2
+#define HD63705_ADCONV_STATE M6805_IRQ_STATE+3
+
+#define HD63705_INT_MASK 0x1ff
+
+#define HD63705_INT_IRQ1 0x00
+#define HD63705_INT_IRQ2 0x01
+#define HD63705_INT_TIMER1 0x02
+#define HD63705_INT_TIMER2 0x03
+#define HD63705_INT_TIMER3 0x04
+#define HD63705_INT_PCI 0x05
+#define HD63705_INT_SCI 0x06
+#define HD63705_INT_ADCONV 0x07
+#define HD63705_INT_NMI 0x08
CPU_DISASSEMBLE( m6805 );
diff --git a/src/emu/cpu/m6809/6809dasm.c b/src/emu/cpu/m6809/6809dasm.c
index 07174798550..7bbcaae9515 100644
--- a/src/emu/cpu/m6809/6809dasm.c
+++ b/src/emu/cpu/m6809/6809dasm.c
@@ -22,25 +22,25 @@
// Opcode structure
struct opcodeinfo
{
- UINT8 opcode; // 8-bit opcode value
- UINT8 length; // Opcode length in bytes
- char name[6]; // Opcode name
- UINT8 mode; // Addressing mode
- unsigned flags; // Disassembly flags
+ UINT8 opcode; // 8-bit opcode value
+ UINT8 length; // Opcode length in bytes
+ char name[6]; // Opcode name
+ UINT8 mode; // Addressing mode
+ unsigned flags; // Disassembly flags
};
enum m6809_addressing_modes
{
- INH, // Inherent
- DIR, // Direct
- IND, // Indexed
- REL, // Relative (8 bit)
- LREL, // Long relative (16 bit)
- EXT, // Extended
- IMM, // Immediate
- IMM_RR, // Register-to-register
- PG1, // Switch to page 1 opcodes
- PG2 // Switch to page 2 opcodes
+ INH, // Inherent
+ DIR, // Direct
+ IND, // Indexed
+ REL, // Relative (8 bit)
+ LREL, // Long relative (16 bit)
+ EXT, // Extended
+ IMM, // Immediate
+ IMM_RR, // Register-to-register
+ PG1, // Switch to page 1 opcodes
+ PG2 // Switch to page 2 opcodes
};
// Page 0 opcodes (single byte)
@@ -422,28 +422,28 @@ offs_t m6809_disassemble(legacy_cpu_device *device, char *buffer, offs_t pc, con
case INH:
switch (opcode)
{
- case 0x34: // PSHS
- case 0x36: // PSHU
+ case 0x34: // PSHS
+ case 0x36: // PSHU
pb = operandarray[0];
if (pb & 0x80)
buffer += sprintf(buffer, "PC");
if (pb & 0x40)
buffer += sprintf(buffer, "%s%s", (pb&0x80)?",":"", (opcode==0x34)?"U":"S");
if (pb & 0x20)
- buffer += sprintf(buffer, "%sY", (pb&0xc0)?",":"");
+ buffer += sprintf(buffer, "%sY", (pb&0xc0)?",":"");
if (pb & 0x10)
- buffer += sprintf(buffer, "%sX", (pb&0xe0)?",":"");
+ buffer += sprintf(buffer, "%sX", (pb&0xe0)?",":"");
if (pb & 0x08)
- buffer += sprintf(buffer, "%sDP", (pb&0xf0)?",":"");
+ buffer += sprintf(buffer, "%sDP", (pb&0xf0)?",":"");
if (pb & 0x04)
- buffer += sprintf(buffer, "%sB", (pb&0xf8)?",":"");
+ buffer += sprintf(buffer, "%sB", (pb&0xf8)?",":"");
if (pb & 0x02)
buffer += sprintf(buffer, "%sA", (pb&0xfc)?",":"");
if (pb & 0x01)
buffer += sprintf(buffer, "%sCC", (pb&0xfe)?",":"");
break;
- case 0x35: // PULS
- case 0x37: // PULU
+ case 0x35: // PULS
+ case 0x37: // PULU
pb = operandarray[0];
if (pb & 0x01)
buffer += sprintf(buffer, "CC");
@@ -500,37 +500,37 @@ offs_t m6809_disassemble(legacy_cpu_device *device, char *buffer, offs_t pc, con
switch (pbm)
{
- case 0x80: // ,R+
+ case 0x80: // ,R+
if (indirect)
strcpy(buffer, "Illegal Postbyte");
else
buffer += sprintf(buffer, ",%s+", m6809_regs[reg]);
break;
- case 0x81: // ,R++
+ case 0x81: // ,R++
buffer += sprintf(buffer, ",%s++", m6809_regs[reg]);
break;
- case 0x82: // ,-R
+ case 0x82: // ,-R
if (indirect)
strcpy(buffer, "Illegal Postbyte");
else
buffer += sprintf(buffer, ",-%s", m6809_regs[reg]);
break;
- case 0x83: // ,--R
+ case 0x83: // ,--R
buffer += sprintf(buffer, ",--%s", m6809_regs[reg]);
break;
- case 0x84: // ,R
+ case 0x84: // ,R
buffer += sprintf(buffer, ",%s", m6809_regs[reg]);
break;
- case 0x85: // (+/- B),R
+ case 0x85: // (+/- B),R
buffer += sprintf(buffer, "B,%s", m6809_regs[reg]);
break;
- case 0x86: // (+/- A),R
+ case 0x86: // (+/- A),R
buffer += sprintf(buffer, "A,%s", m6809_regs[reg]);
break;
@@ -538,14 +538,14 @@ offs_t m6809_disassemble(legacy_cpu_device *device, char *buffer, offs_t pc, con
strcpy(buffer, "Illegal Postbyte");
break;
- case 0x88: // (+/- 7 bit offset),R
+ case 0x88: // (+/- 7 bit offset),R
offset = (INT8)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,", (offset < 0) ? -offset : offset);
buffer += sprintf(buffer, "%s", m6809_regs[reg]);
break;
- case 0x89: // (+/- 15 bit offset),R
+ case 0x89: // (+/- 15 bit offset),R
offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
@@ -557,17 +557,17 @@ offs_t m6809_disassemble(legacy_cpu_device *device, char *buffer, offs_t pc, con
strcpy(buffer, "Illegal Postbyte");
break;
- case 0x8b: // (+/- D),R
+ case 0x8b: // (+/- D),R
buffer += sprintf(buffer, "D,%s", m6809_regs[reg]);
break;
- case 0x8c: // (+/- 7 bit offset),PC
+ case 0x8c: // (+/- 7 bit offset),PC
offset = (INT8)opram[p++];
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
buffer += sprintf(buffer, "$%02X,PC", (offset < 0) ? -offset : offset);
break;
- case 0x8d: // (+/- 15 bit offset),PC
+ case 0x8d: // (+/- 15 bit offset),PC
offset = (INT16)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "%s", (offset < 0) ? "-" : "");
@@ -578,13 +578,13 @@ offs_t m6809_disassemble(legacy_cpu_device *device, char *buffer, offs_t pc, con
strcpy(buffer, "Illegal Postbyte");
break;
- case 0x8f: // address
+ case 0x8f: // address
ea = (UINT16)((opram[p+0] << 8) + opram[p+1]);
p += 2;
buffer += sprintf(buffer, "$%04X", ea);
break;
- default: // (+/- 4 bit offset),R
+ default: // (+/- 4 bit offset),R
offset = pb & 0x1f;
if (offset > 15)
offset = offset - 32;
diff --git a/src/emu/cpu/m6809/6809ops.c b/src/emu/cpu/m6809/6809ops.c
index be0dff62830..6ad168939f6 100644
--- a/src/emu/cpu/m6809/6809ops.c
+++ b/src/emu/cpu/m6809/6809ops.c
@@ -21,7 +21,7 @@ OP_HANDLER( illegal )
void m6809_base_device::IIError()
{
- illegal(); // Vector to Trap handler
+ illegal(); // Vector to Trap handler
}
/* $00 NEG direct ?**** */
@@ -178,10 +178,10 @@ OP_HANDLER( sync )
/* SYNC stops processing instructions until an interrupt request happens. */
/* This doesn't require the corresponding interrupt to be enabled: if it */
/* is disabled, execution continues with the next instruction. */
- m_int_state |= M6809_SYNC; /* HJB 990227 */
+ m_int_state |= M6809_SYNC; /* HJB 990227 */
check_irq_lines();
/* if M6809_SYNC has not been cleared by check_irq_lines(),
- * stop execution until the interrupt lines change. */
+ * stop execution until the interrupt lines change. */
if( m_int_state & M6809_SYNC )
if (m_icount > 0) m_icount = 0;
}
@@ -228,7 +228,7 @@ OP_HANDLER( orcc )
UINT8 t;
IMMBYTE(t);
CC |= t;
- check_irq_lines(); /* HJB 990116 */
+ check_irq_lines(); /* HJB 990116 */
}
/* $1B ILLEGAL */
@@ -239,7 +239,7 @@ OP_HANDLER( andcc )
UINT8 t;
IMMBYTE(t);
CC &= t;
- check_irq_lines(); /* HJB 990116 */
+ check_irq_lines(); /* HJB 990116 */
}
/* $1D SEX inherent -**-- */
@@ -260,7 +260,7 @@ OP_HANDLER( exg )
UINT8 tb;
IMMBYTE(tb);
- if( (tb^(tb>>4)) & 0x08 ) /* HJB 990225: mixed 8/16 bit case? */
+ if( (tb^(tb>>4)) & 0x08 ) /* HJB 990225: mixed 8/16 bit case? */
{
/* transfer $ff to both registers */
t1 = t2 = 0xff;
@@ -292,7 +292,7 @@ OP_HANDLER( exg )
case 10: t2 = CC; break;
case 11: t2 = DP; break;
default: t2 = 0xff;
- }
+ }
}
switch(tb>>4) {
case 0: D = t2; break;
@@ -327,11 +327,11 @@ OP_HANDLER( tfr )
UINT16 t;
IMMBYTE(tb);
- if( (tb^(tb>>4)) & 0x08 ) /* HJB 990225: mixed 8/16 bit case? */
+ if( (tb^(tb>>4)) & 0x08 ) /* HJB 990225: mixed 8/16 bit case? */
{
/* transfer $ff to register */
t = 0xff;
- }
+ }
else
{
switch(tb>>4) {
@@ -346,7 +346,7 @@ OP_HANDLER( tfr )
case 10: t = CC; break;
case 11: t = DP; break;
default: t = 0xff;
- }
+ }
}
switch(tb&15) {
case 0: D = t; break;
@@ -359,7 +359,7 @@ OP_HANDLER( tfr )
case 9: B = t; break;
case 10: CC = t; break;
case 11: DP = t; break;
- }
+ }
}
/* $20 BRA relative ----- */
@@ -669,7 +669,7 @@ OP_HANDLER( rti )
{
UINT8 t;
PULLBYTE(CC);
- t = CC & CC_E; /* HJB 990225: entire state saved? */
+ t = CC & CC_E; /* HJB 990225: entire state saved? */
if(t)
{
m_icount -= 9;
@@ -681,7 +681,7 @@ OP_HANDLER( rti )
PULLWORD(UD);
}
PULLWORD(PCD);
- check_irq_lines(); /* HJB 990116 */
+ check_irq_lines(); /* HJB 990116 */
}
/* $3C CWAI inherent ----1 */
@@ -691,11 +691,11 @@ OP_HANDLER( cwai )
IMMBYTE(t);
CC &= t;
/*
- * CWAI stacks the entire machine state on the hardware stack,
- * then waits for an interrupt; when the interrupt is taken
- * later, the state is *not* saved again after CWAI.
- */
- CC |= CC_E; /* HJB 990225: save entire state */
+ * CWAI stacks the entire machine state on the hardware stack,
+ * then waits for an interrupt; when the interrupt is taken
+ * later, the state is *not* saved again after CWAI.
+ */
+ CC |= CC_E; /* HJB 990225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -704,7 +704,7 @@ OP_HANDLER( cwai )
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- m_int_state |= M6809_CWAI; /* HJB 990228 */
+ m_int_state |= M6809_CWAI; /* HJB 990228 */
check_irq_lines(); /* HJB 990116 */
if( m_int_state & M6809_CWAI )
if( m_icount > 0 )
@@ -725,7 +725,7 @@ OP_HANDLER( mul )
/* $3F SWI (SWI2 SWI3) absolute indirect ----- */
OP_HANDLER( swi )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -734,14 +734,14 @@ OP_HANDLER( swi )
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD=RM16(0xfffa);
}
/* $103F SWI2 absolute indirect ----- */
OP_HANDLER( swi2 )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -756,7 +756,7 @@ OP_HANDLER( swi2 )
/* $113F SWI3 absolute indirect ----- */
OP_HANDLER( swi3 )
{
- CC |= CC_E; /* HJB 980225: save entire state */
+ CC |= CC_E; /* HJB 980225: save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -1257,7 +1257,7 @@ OP_HANDLER( suba_im )
/* $81 CMPA immediate ?**** */
OP_HANDLER( cmpa_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1267,7 +1267,7 @@ OP_HANDLER( cmpa_im )
/* $82 SBCA immediate ?**** */
OP_HANDLER( sbca_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -1478,7 +1478,7 @@ OP_HANDLER( sty_im )
/* $90 SUBA direct ?**** */
OP_HANDLER( suba_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1489,7 +1489,7 @@ OP_HANDLER( suba_di )
/* $91 CMPA direct ?**** */
OP_HANDLER( cmpa_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1499,7 +1499,7 @@ OP_HANDLER( cmpa_di )
/* $92 SBCA direct ?**** */
OP_HANDLER( sbca_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -1729,7 +1729,7 @@ OP_HANDLER( cmpa_ix )
/* $a2 SBCA indexed ?**** */
OP_HANDLER( sbca_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address();
t = RM(EAD);
r = A - t - (CC & CC_C);
@@ -1944,7 +1944,7 @@ OP_HANDLER( sty_ix )
/* $b0 SUBA extended ?**** */
OP_HANDLER( suba_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1955,7 +1955,7 @@ OP_HANDLER( suba_ex )
/* $b1 CMPA extended ?**** */
OP_HANDLER( cmpa_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1965,7 +1965,7 @@ OP_HANDLER( cmpa_ex )
/* $b2 SBCA extended ?**** */
OP_HANDLER( sbca_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = A - t - (CC & CC_C);
CLR_NZVC;
@@ -2171,7 +2171,7 @@ OP_HANDLER( sty_ex )
/* $c0 SUBB immediate ?**** */
OP_HANDLER( subb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B - t;
CLR_NZVC;
@@ -2182,7 +2182,7 @@ OP_HANDLER( subb_im )
/* $c1 CMPB immediate ?**** */
OP_HANDLER( cmpb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B - t;
CLR_NZVC; SET_FLAGS8(B,t,r);
@@ -2191,7 +2191,7 @@ OP_HANDLER( cmpb_im )
/* $c2 SBCB immediate ?**** */
OP_HANDLER( sbcb_im )
{
- UINT16 t,r;
+ UINT16 t,r;
IMMBYTE(t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -2308,7 +2308,7 @@ OP_HANDLER( std_im )
{
CLR_NZV;
SET_NZ16(D);
- IMM16;
+ IMM16;
WM16(EAD,&pD);
}
@@ -2335,7 +2335,7 @@ OP_HANDLER( stu_im )
{
CLR_NZV;
SET_NZ16(U);
- IMM16;
+ IMM16;
WM16(EAD,&pU);
}
@@ -2345,14 +2345,14 @@ OP_HANDLER( sts_im )
{
CLR_NZV;
SET_NZ16(S);
- IMM16;
+ IMM16;
WM16(EAD,&pS);
}
/* $d0 SUBB direct ?**** */
OP_HANDLER( subb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B - t;
CLR_NZVC;
@@ -2363,7 +2363,7 @@ OP_HANDLER( subb_di )
/* $d1 CMPB direct ?**** */
OP_HANDLER( cmpb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B - t;
CLR_NZVC;
@@ -2373,7 +2373,7 @@ OP_HANDLER( cmpb_di )
/* $d2 SBCB direct ?**** */
OP_HANDLER( sbcb_di )
{
- UINT16 t,r;
+ UINT16 t,r;
DIRBYTE(t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -2530,7 +2530,7 @@ OP_HANDLER( sts_di )
/* $e0 SUBB indexed ?**** */
OP_HANDLER( subb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address();
t = RM(EAD);
r = B - t;
@@ -2542,7 +2542,7 @@ OP_HANDLER( subb_ix )
/* $e1 CMPB indexed ?**** */
OP_HANDLER( cmpb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address();
t = RM(EAD);
r = B - t;
@@ -2553,7 +2553,7 @@ OP_HANDLER( cmpb_ix )
/* $e2 SBCB indexed ?**** */
OP_HANDLER( sbcb_ix )
{
- UINT16 t,r;
+ UINT16 t,r;
fetch_effective_address();
t = RM(EAD);
r = B - t - (CC & CC_C);
@@ -2566,8 +2566,8 @@ OP_HANDLER( sbcb_ix )
OP_HANDLER( addd_ix )
{
UINT32 r,d;
- PAIR b;
- fetch_effective_address();
+ PAIR b;
+ fetch_effective_address();
b.d=RM16(EAD);
d = D;
r = d + b.d;
@@ -2608,7 +2608,7 @@ OP_HANDLER( ldb_ix )
OP_HANDLER( stb_ix )
{
fetch_effective_address();
- CLR_NZV;
+ CLR_NZV;
SET_NZ8(B);
WM(EAD,B);
}
@@ -2714,7 +2714,7 @@ OP_HANDLER( sts_ix )
/* $f0 SUBB extended ?**** */
OP_HANDLER( subb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B - t;
CLR_NZVC;
@@ -2725,7 +2725,7 @@ OP_HANDLER( subb_ex )
/* $f1 CMPB extended ?**** */
OP_HANDLER( cmpb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B - t;
CLR_NZVC;
@@ -2735,7 +2735,7 @@ OP_HANDLER( cmpb_ex )
/* $f2 SBCB extended ?**** */
OP_HANDLER( sbcb_ex )
{
- UINT16 t,r;
+ UINT16 t,r;
EXTBYTE(t);
r = B - t - (CC & CC_C);
CLR_NZVC;
@@ -2896,57 +2896,57 @@ OP_HANDLER( pref10 )
PC++;
switch( ireg2 )
{
- case 0x21: lbrn(); m_icount-=5; break;
- case 0x22: lbhi(); m_icount-=5; break;
- case 0x23: lbls(); m_icount-=5; break;
- case 0x24: lbcc(); m_icount-=5; break;
- case 0x25: lbcs(); m_icount-=5; break;
- case 0x26: lbne(); m_icount-=5; break;
- case 0x27: lbeq(); m_icount-=5; break;
- case 0x28: lbvc(); m_icount-=5; break;
- case 0x29: lbvs(); m_icount-=5; break;
- case 0x2a: lbpl(); m_icount-=5; break;
- case 0x2b: lbmi(); m_icount-=5; break;
- case 0x2c: lbge(); m_icount-=5; break;
- case 0x2d: lblt(); m_icount-=5; break;
- case 0x2e: lbgt(); m_icount-=5; break;
- case 0x2f: lble(); m_icount-=5; break;
-
- case 0x3f: swi2(); m_icount-=20; break;
-
- case 0x83: cmpd_im(); m_icount-=5; break;
- case 0x8c: cmpy_im(); m_icount-=5; break;
- case 0x8e: ldy_im(); m_icount-=4; break;
- case 0x8f: sty_im(); m_icount-=4; break;
-
- case 0x93: cmpd_di(); m_icount-=7; break;
- case 0x9c: cmpy_di(); m_icount-=7; break;
- case 0x9e: ldy_di(); m_icount-=6; break;
- case 0x9f: sty_di(); m_icount-=6; break;
-
- case 0xa3: cmpd_ix(); m_icount-=7; break;
- case 0xac: cmpy_ix(); m_icount-=7; break;
- case 0xae: ldy_ix(); m_icount-=6; break;
- case 0xaf: sty_ix(); m_icount-=6; break;
-
- case 0xb3: cmpd_ex(); m_icount-=8; break;
- case 0xbc: cmpy_ex(); m_icount-=8; break;
- case 0xbe: ldy_ex(); m_icount-=7; break;
- case 0xbf: sty_ex(); m_icount-=7; break;
-
- case 0xce: lds_im(); m_icount-=4; break;
- case 0xcf: sts_im(); m_icount-=4; break;
-
- case 0xde: lds_di(); m_icount-=6; break;
- case 0xdf: sts_di(); m_icount-=6; break;
-
- case 0xee: lds_ix(); m_icount-=6; break;
- case 0xef: sts_ix(); m_icount-=6; break;
-
- case 0xfe: lds_ex(); m_icount-=7; break;
- case 0xff: sts_ex(); m_icount-=7; break;
-
- default: IIError(); break;
+ case 0x21: lbrn(); m_icount-=5; break;
+ case 0x22: lbhi(); m_icount-=5; break;
+ case 0x23: lbls(); m_icount-=5; break;
+ case 0x24: lbcc(); m_icount-=5; break;
+ case 0x25: lbcs(); m_icount-=5; break;
+ case 0x26: lbne(); m_icount-=5; break;
+ case 0x27: lbeq(); m_icount-=5; break;
+ case 0x28: lbvc(); m_icount-=5; break;
+ case 0x29: lbvs(); m_icount-=5; break;
+ case 0x2a: lbpl(); m_icount-=5; break;
+ case 0x2b: lbmi(); m_icount-=5; break;
+ case 0x2c: lbge(); m_icount-=5; break;
+ case 0x2d: lblt(); m_icount-=5; break;
+ case 0x2e: lbgt(); m_icount-=5; break;
+ case 0x2f: lble(); m_icount-=5; break;
+
+ case 0x3f: swi2(); m_icount-=20; break;
+
+ case 0x83: cmpd_im(); m_icount-=5; break;
+ case 0x8c: cmpy_im(); m_icount-=5; break;
+ case 0x8e: ldy_im(); m_icount-=4; break;
+ case 0x8f: sty_im(); m_icount-=4; break;
+
+ case 0x93: cmpd_di(); m_icount-=7; break;
+ case 0x9c: cmpy_di(); m_icount-=7; break;
+ case 0x9e: ldy_di(); m_icount-=6; break;
+ case 0x9f: sty_di(); m_icount-=6; break;
+
+ case 0xa3: cmpd_ix(); m_icount-=7; break;
+ case 0xac: cmpy_ix(); m_icount-=7; break;
+ case 0xae: ldy_ix(); m_icount-=6; break;
+ case 0xaf: sty_ix(); m_icount-=6; break;
+
+ case 0xb3: cmpd_ex(); m_icount-=8; break;
+ case 0xbc: cmpy_ex(); m_icount-=8; break;
+ case 0xbe: ldy_ex(); m_icount-=7; break;
+ case 0xbf: sty_ex(); m_icount-=7; break;
+
+ case 0xce: lds_im(); m_icount-=4; break;
+ case 0xcf: sts_im(); m_icount-=4; break;
+
+ case 0xde: lds_di(); m_icount-=6; break;
+ case 0xdf: sts_di(); m_icount-=6; break;
+
+ case 0xee: lds_ix(); m_icount-=6; break;
+ case 0xef: sts_ix(); m_icount-=6; break;
+
+ case 0xfe: lds_ex(); m_icount-=7; break;
+ case 0xff: sts_ex(); m_icount-=7; break;
+
+ default: IIError(); break;
}
}
@@ -2957,21 +2957,20 @@ OP_HANDLER( pref11 )
PC++;
switch( ireg2 )
{
- case 0x3f: swi3(); m_icount-=20; break;
+ case 0x3f: swi3(); m_icount-=20; break;
- case 0x83: cmpu_im(); m_icount-=5; break;
- case 0x8c: cmps_im(); m_icount-=5; break;
+ case 0x83: cmpu_im(); m_icount-=5; break;
+ case 0x8c: cmps_im(); m_icount-=5; break;
- case 0x93: cmpu_di(); m_icount-=7; break;
- case 0x9c: cmps_di(); m_icount-=7; break;
+ case 0x93: cmpu_di(); m_icount-=7; break;
+ case 0x9c: cmps_di(); m_icount-=7; break;
- case 0xa3: cmpu_ix(); m_icount-=7; break;
- case 0xac: cmps_ix(); m_icount-=7; break;
+ case 0xa3: cmpu_ix(); m_icount-=7; break;
+ case 0xac: cmps_ix(); m_icount-=7; break;
- case 0xb3: cmpu_ex(); m_icount-=8; break;
- case 0xbc: cmps_ex(); m_icount-=8; break;
+ case 0xb3: cmpu_ex(); m_icount-=8; break;
+ case 0xbc: cmps_ex(); m_icount-=8; break;
- default: IIError(); break;
+ default: IIError(); break;
}
}
-
diff --git a/src/emu/cpu/m6809/6809tbl.c b/src/emu/cpu/m6809/6809tbl.c
index 95bbda40293..3cfcabd8874 100644
--- a/src/emu/cpu/m6809/6809tbl.c
+++ b/src/emu/cpu/m6809/6809tbl.c
@@ -1,21 +1,21 @@
const UINT8 m6809_base_device::m_flags8i[256] = /* increment */
{
- CC_Z, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ CC_Z, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
CC_N|CC_V,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
- CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
- CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
- CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
- CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
- CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
- CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
- CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
+ CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
+ CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
+ CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
+ CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
+ CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
+ CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,
+ CC_N, CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N,CC_N
};
const UINT8 m6809_base_device::m_flags8d[256] = /* decrement */
@@ -64,20 +64,20 @@ const UINT8 m6809_base_device::m_index_cycle_em[256] = { /* Index Loopup
const UINT8 m6809_base_device::m_cycles1[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
- /*0*/ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 3, 6,
- /*1*/ 0, 0, 2, 4, 2, 2, 5, 9, 2, 2, 3, 2, 3, 2, 8, 6,
- /*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- /*3*/ 4, 4, 4, 4, 5, 5, 5, 5, 2, 5, 3, 6,20,11, 2,19,
- /*4*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- /*5*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- /*6*/ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 3, 6,
- /*7*/ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 4, 7,
- /*8*/ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 4, 7, 3, 2,
- /*9*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5,
- /*A*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5,
- /*B*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 7, 8, 6, 6,
- /*C*/ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 3, 2, 3, 3,
- /*D*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
- /*E*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
- /*F*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6
+ /*0*/ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 3, 6,
+ /*1*/ 0, 0, 2, 4, 2, 2, 5, 9, 2, 2, 3, 2, 3, 2, 8, 6,
+ /*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ /*3*/ 4, 4, 4, 4, 5, 5, 5, 5, 2, 5, 3, 6,20,11, 2,19,
+ /*4*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ /*5*/ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ /*6*/ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 3, 6,
+ /*7*/ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 4, 7,
+ /*8*/ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 4, 7, 3, 2,
+ /*9*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5,
+ /*A*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5,
+ /*B*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 7, 8, 6, 6,
+ /*C*/ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 3, 2, 3, 3,
+ /*D*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
+ /*E*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
+ /*F*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6
};
diff --git a/src/emu/cpu/m6809/m6809.c b/src/emu/cpu/m6809/m6809.c
index fde51ecc714..251de613d90 100644
--- a/src/emu/cpu/m6809/m6809.c
+++ b/src/emu/cpu/m6809/m6809.c
@@ -76,11 +76,11 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* flag bits in the cc register */
-#define CC_C 0x01 /* Carry */
-#define CC_V 0x02 /* Overflow */
+#define CC_C 0x01 /* Carry */
+#define CC_V 0x02 /* Overflow */
#define CC_Z 0x04 /* Zero */
#define CC_N 0x08 /* Negative */
#define CC_II 0x10 /* Inhibit IRQ */
@@ -89,38 +89,38 @@
#define CC_E 0x80 /* entire state pushed */
#define pPPC m_ppc
-#define pPC m_pc
-#define pU m_u
-#define pS m_s
-#define pX m_x
-#define pY m_y
-#define pD m_d
-
-#define PPC m_ppc.w.l
-#define PC m_pc.w.l
-#define PCD m_pc.d
-#define U m_u.w.l
-#define UD m_u.d
-#define S m_s.w.l
-#define SD m_s.d
-#define X m_x.w.l
-#define XD m_x.d
-#define Y m_y.w.l
-#define YD m_y.d
-#define D m_d.w.l
-#define A m_d.b.h
-#define B m_d.b.l
-#define DP m_dp.b.h
-#define DPD m_dp.d
-#define CC m_cc
-
-#define EA m_ea.w.l
-#define EAD m_ea.d
-#define EAP m_ea
-
-#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */
-#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */
-#define M6809_LDS 32 /* set when LDS occurred at least once */
+#define pPC m_pc
+#define pU m_u
+#define pS m_s
+#define pX m_x
+#define pY m_y
+#define pD m_d
+
+#define PPC m_ppc.w.l
+#define PC m_pc.w.l
+#define PCD m_pc.d
+#define U m_u.w.l
+#define UD m_u.d
+#define S m_s.w.l
+#define SD m_s.d
+#define X m_x.w.l
+#define XD m_x.d
+#define Y m_y.w.l
+#define YD m_y.d
+#define D m_d.w.l
+#define A m_d.b.h
+#define B m_d.b.l
+#define DP m_dp.b.h
+#define DPD m_dp.d
+#define CC m_cc
+
+#define EA m_ea.w.l
+#define EAD m_ea.d
+#define EAP m_ea
+
+#define M6809_CWAI 8 /* set when CWAI is waiting for an interrupt */
+#define M6809_SYNC 16 /* set when SYNC is waiting for an interrupt */
+#define M6809_LDS 32 /* set when LDS occurred at least once */
/****************************************************************************/
@@ -148,8 +148,8 @@
#define ROP_ARG(addr) ((unsigned)m_direct->read_raw_byte(addr))
/* macros to access memory */
-#define IMMBYTE(b) b = ROP_ARG(PCD); PC++
-#define IMMWORD(w) w.d = (ROP_ARG(PCD)<<8) | ROP_ARG((PCD+1)&0xffff); PC+=2
+#define IMMBYTE(b) b = ROP_ARG(PCD); PC++
+#define IMMWORD(w) w.d = (ROP_ARG(PCD)<<8) | ROP_ARG((PCD+1)&0xffff); PC+=2
#define PUSHBYTE(b) --S; WM(SD,b)
#define PUSHWORD(w) --S; WM(SD,w.b.l); --S; WM(SD,w.b.h)
@@ -162,44 +162,44 @@
#define PULUWORD(w) w = RM(UD)<<8; U++; w |= RM(UD); U++
#define CLR_HNZVC CC&=~(CC_H|CC_N|CC_Z|CC_V|CC_C)
-#define CLR_NZV CC&=~(CC_N|CC_Z|CC_V)
-#define CLR_NZ CC&=~(CC_N|CC_Z)
-#define CLR_HNZC CC&=~(CC_H|CC_N|CC_Z|CC_C)
-#define CLR_NZVC CC&=~(CC_N|CC_Z|CC_V|CC_C)
-#define CLR_Z CC&=~(CC_Z)
-#define CLR_NZC CC&=~(CC_N|CC_Z|CC_C)
-#define CLR_ZC CC&=~(CC_Z|CC_C)
+#define CLR_NZV CC&=~(CC_N|CC_Z|CC_V)
+#define CLR_NZ CC&=~(CC_N|CC_Z)
+#define CLR_HNZC CC&=~(CC_H|CC_N|CC_Z|CC_C)
+#define CLR_NZVC CC&=~(CC_N|CC_Z|CC_V|CC_C)
+#define CLR_Z CC&=~(CC_Z)
+#define CLR_NZC CC&=~(CC_N|CC_Z|CC_C)
+#define CLR_ZC CC&=~(CC_Z|CC_C)
/* macros for CC -- CC bits affected should be reset before calling */
-#define SET_Z(a) if(!a)SEZ
-#define SET_Z8(a) SET_Z((UINT8)a)
-#define SET_Z16(a) SET_Z((UINT16)a)
-#define SET_N8(a) CC|=((a&0x80)>>4)
-#define SET_N16(a) CC|=((a&0x8000)>>12)
-#define SET_H(a,b,r) CC|=(((a^b^r)&0x10)<<1)
-#define SET_C8(a) CC|=((a&0x100)>>8)
-#define SET_C16(a) CC|=((a&0x10000)>>16)
-#define SET_V8(a,b,r) CC|=(((a^b^r^(r>>1))&0x80)>>6)
-#define SET_V16(a,b,r) CC|=(((a^b^r^(r>>1))&0x8000)>>14)
-
-#define SET_FLAGS8I(a) {CC|=m_flags8i[(a)&0xff];}
-#define SET_FLAGS8D(a) {CC|=m_flags8d[(a)&0xff];}
+#define SET_Z(a) if(!a)SEZ
+#define SET_Z8(a) SET_Z((UINT8)a)
+#define SET_Z16(a) SET_Z((UINT16)a)
+#define SET_N8(a) CC|=((a&0x80)>>4)
+#define SET_N16(a) CC|=((a&0x8000)>>12)
+#define SET_H(a,b,r) CC|=(((a^b^r)&0x10)<<1)
+#define SET_C8(a) CC|=((a&0x100)>>8)
+#define SET_C16(a) CC|=((a&0x10000)>>16)
+#define SET_V8(a,b,r) CC|=(((a^b^r^(r>>1))&0x80)>>6)
+#define SET_V16(a,b,r) CC|=(((a^b^r^(r>>1))&0x8000)>>14)
+
+#define SET_FLAGS8I(a) {CC|=m_flags8i[(a)&0xff];}
+#define SET_FLAGS8D(a) {CC|=m_flags8d[(a)&0xff];}
/* combos */
-#define SET_NZ8(a) {SET_N8(a);SET_Z(a);}
-#define SET_NZ16(a) {SET_N16(a);SET_Z(a);}
-#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
-#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
+#define SET_NZ8(a) {SET_N8(a);SET_Z(a);}
+#define SET_NZ16(a) {SET_N16(a);SET_Z(a);}
+#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
+#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
-#define NXORV ((CC&CC_N)^((CC&CC_V)<<2))
+#define NXORV ((CC&CC_N)^((CC&CC_V)<<2))
/* for treating an unsigned byte as a signed word */
#define SIGNED(b) ((UINT16)(b&0x80?b|0xff00:b))
/* macros for addressing modes (postbytes have their own code) */
-#define DIRECT EAD = DPD; IMMBYTE(m_ea.b.l)
-#define IMM8 EAD = PCD; PC++
-#define IMM16 EAD = PCD; PC+=2
+#define DIRECT EAD = DPD; IMMBYTE(m_ea.b.l)
+#define IMM8 EAD = PCD; PC++
+#define IMM16 EAD = PCD; PC+=2
#define EXTENDED IMMWORD(EAP)
/* macros to set status flags */
@@ -224,23 +224,23 @@
#define EXTWORD(w) {EXTENDED;w.d=RM16(EAD);}
/* macros for branch instructions */
-#define BRANCH(f) { \
- UINT8 t; \
- IMMBYTE(t); \
- if( f ) \
- { \
- PC += SIGNED(t); \
- } \
+#define BRANCH(f) { \
+ UINT8 t; \
+ IMMBYTE(t); \
+ if( f ) \
+ { \
+ PC += SIGNED(t); \
+ } \
}
#define LBRANCH(f) { \
- PAIR t; \
- IMMWORD(t); \
- if( f ) \
- { \
- m_icount -= 1; \
- PC += t.w.l; \
- } \
+ PAIR t; \
+ IMMWORD(t); \
+ if( f ) \
+ { \
+ m_icount -= 1; \
+ PC += t.w.l; \
+ } \
}
/* macros for setting/getting registers in TFR/EXG instructions */
@@ -274,16 +274,16 @@ void m6809_base_device::check_irq_lines()
if( m_int_state & M6809_CWAI )
{
m_int_state &= ~M6809_CWAI; /* clear CWAI */
- m_extra_cycles += 7; /* subtract +7 cycles */
- }
+ m_extra_cycles += 7; /* subtract +7 cycles */
+ }
else
{
- CC &= ~CC_E; /* save 'short' state */
+ CC &= ~CC_E; /* save 'short' state */
PUSHWORD(pPC);
PUSHBYTE(CC);
- m_extra_cycles += 10; /* subtract +10 cycles */
+ m_extra_cycles += 10; /* subtract +10 cycles */
}
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD=RM16(0xfff6);
standard_irq_callback(M6809_FIRQ_LINE);
}
@@ -295,11 +295,11 @@ void m6809_base_device::check_irq_lines()
if( m_int_state & M6809_CWAI )
{
m_int_state &= ~M6809_CWAI; /* clear CWAI flag */
- m_extra_cycles += 7; /* subtract +7 cycles */
+ m_extra_cycles += 7; /* subtract +7 cycles */
}
else
{
- CC |= CC_E; /* save entire state */
+ CC |= CC_E; /* save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -308,9 +308,9 @@ void m6809_base_device::check_irq_lines()
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- m_extra_cycles += 19; /* subtract +19 cycles */
+ m_extra_cycles += 19; /* subtract +19 cycles */
}
- CC |= CC_II; /* inhibit IRQ */
+ CC |= CC_II; /* inhibit IRQ */
PCD=RM16(0xfff8);
standard_irq_callback(M6809_IRQ_LINE);
}
@@ -357,84 +357,84 @@ m6809_base_device::m6809_base_device(const machine_config &mconfig, const char *
const m6809_base_device::ophandler m6809_base_device::s_opcodetable[256] =
{
- // 0xX0/4/8/C, 0xX1/5/9/D, 0xX2/6/A/E, 0xX3/7/B/F
-
- /* 0x0X */ &m6809_base_device::neg_di, &m6809_base_device::neg_di, &m6809_base_device::com_di, &m6809_base_device::com_di,
- &m6809_base_device::lsr_di, &m6809_base_device::lsr_di, &m6809_base_device::ror_di, &m6809_base_device::asr_di,
- &m6809_base_device::asl_di, &m6809_base_device::rol_di, &m6809_base_device::dec_di, &m6809_base_device::dec_di,
- &m6809_base_device::inc_di, &m6809_base_device::tst_di, &m6809_base_device::jmp_di, &m6809_base_device::clr_di,
-
- /* 0x1X */ &m6809_base_device::pref10, &m6809_base_device::pref11, &m6809_base_device::nop, &m6809_base_device::sync,
- &m6809_base_device::illegal,&m6809_base_device::illegal,&m6809_base_device::lbra, &m6809_base_device::lbsr,
- &m6809_base_device::illegal,&m6809_base_device::daa, &m6809_base_device::orcc, &m6809_base_device::illegal,
- &m6809_base_device::andcc, &m6809_base_device::sex, &m6809_base_device::exg, &m6809_base_device::tfr,
-
- /* 0x2X */ &m6809_base_device::bra, &m6809_base_device::brn, &m6809_base_device::bhi, &m6809_base_device::bls,
- &m6809_base_device::bcc, &m6809_base_device::bcs, &m6809_base_device::bne, &m6809_base_device::beq,
- &m6809_base_device::bvc, &m6809_base_device::bvs, &m6809_base_device::bpl, &m6809_base_device::bmi,
- &m6809_base_device::bge, &m6809_base_device::blt, &m6809_base_device::bgt, &m6809_base_device::ble,
-
- /* 0x3X */ &m6809_base_device::leax, &m6809_base_device::leay, &m6809_base_device::leas, &m6809_base_device::leau,
- &m6809_base_device::pshs, &m6809_base_device::puls, &m6809_base_device::pshu, &m6809_base_device::pulu,
- &m6809_base_device::illegal,&m6809_base_device::rts, &m6809_base_device::abx, &m6809_base_device::rti,
- &m6809_base_device::cwai, &m6809_base_device::mul, &m6809_base_device::illegal,&m6809_base_device::swi,
-
- /* 0x4X */ &m6809_base_device::nega, &m6809_base_device::nega, &m6809_base_device::coma, &m6809_base_device::coma,
- &m6809_base_device::lsra, &m6809_base_device::lsra, &m6809_base_device::rora, &m6809_base_device::asra,
- &m6809_base_device::asla, &m6809_base_device::rola, &m6809_base_device::deca, &m6809_base_device::deca,
- &m6809_base_device::inca, &m6809_base_device::tsta, &m6809_base_device::clra, &m6809_base_device::clra,
-
- /* 0x5X */ &m6809_base_device::negb, &m6809_base_device::negb, &m6809_base_device::comb, &m6809_base_device::comb,
- &m6809_base_device::lsrb, &m6809_base_device::lsrb, &m6809_base_device::rorb, &m6809_base_device::asrb,
- &m6809_base_device::aslb, &m6809_base_device::rolb, &m6809_base_device::decb, &m6809_base_device::decb,
- &m6809_base_device::incb, &m6809_base_device::tstb, &m6809_base_device::clrb, &m6809_base_device::clrb,
-
- /* 0x6X */ &m6809_base_device::neg_ix, &m6809_base_device::neg_ix, &m6809_base_device::com_ix, &m6809_base_device::com_ix,
- &m6809_base_device::lsr_ix, &m6809_base_device::lsr_ix, &m6809_base_device::ror_ix, &m6809_base_device::asr_ix,
- &m6809_base_device::asl_ix, &m6809_base_device::rol_ix, &m6809_base_device::dec_ix, &m6809_base_device::dec_ix,
- &m6809_base_device::inc_ix, &m6809_base_device::tst_ix, &m6809_base_device::jmp_ix, &m6809_base_device::clr_ix,
-
- /* 0x7X */ &m6809_base_device::neg_ex, &m6809_base_device::neg_ex, &m6809_base_device::com_ex, &m6809_base_device::com_ex,
+ // 0xX0/4/8/C, 0xX1/5/9/D, 0xX2/6/A/E, 0xX3/7/B/F
+
+ /* 0x0X */ &m6809_base_device::neg_di, &m6809_base_device::neg_di, &m6809_base_device::com_di, &m6809_base_device::com_di,
+ &m6809_base_device::lsr_di, &m6809_base_device::lsr_di, &m6809_base_device::ror_di, &m6809_base_device::asr_di,
+ &m6809_base_device::asl_di, &m6809_base_device::rol_di, &m6809_base_device::dec_di, &m6809_base_device::dec_di,
+ &m6809_base_device::inc_di, &m6809_base_device::tst_di, &m6809_base_device::jmp_di, &m6809_base_device::clr_di,
+
+ /* 0x1X */ &m6809_base_device::pref10, &m6809_base_device::pref11, &m6809_base_device::nop, &m6809_base_device::sync,
+ &m6809_base_device::illegal,&m6809_base_device::illegal,&m6809_base_device::lbra, &m6809_base_device::lbsr,
+ &m6809_base_device::illegal,&m6809_base_device::daa, &m6809_base_device::orcc, &m6809_base_device::illegal,
+ &m6809_base_device::andcc, &m6809_base_device::sex, &m6809_base_device::exg, &m6809_base_device::tfr,
+
+ /* 0x2X */ &m6809_base_device::bra, &m6809_base_device::brn, &m6809_base_device::bhi, &m6809_base_device::bls,
+ &m6809_base_device::bcc, &m6809_base_device::bcs, &m6809_base_device::bne, &m6809_base_device::beq,
+ &m6809_base_device::bvc, &m6809_base_device::bvs, &m6809_base_device::bpl, &m6809_base_device::bmi,
+ &m6809_base_device::bge, &m6809_base_device::blt, &m6809_base_device::bgt, &m6809_base_device::ble,
+
+ /* 0x3X */ &m6809_base_device::leax, &m6809_base_device::leay, &m6809_base_device::leas, &m6809_base_device::leau,
+ &m6809_base_device::pshs, &m6809_base_device::puls, &m6809_base_device::pshu, &m6809_base_device::pulu,
+ &m6809_base_device::illegal,&m6809_base_device::rts, &m6809_base_device::abx, &m6809_base_device::rti,
+ &m6809_base_device::cwai, &m6809_base_device::mul, &m6809_base_device::illegal,&m6809_base_device::swi,
+
+ /* 0x4X */ &m6809_base_device::nega, &m6809_base_device::nega, &m6809_base_device::coma, &m6809_base_device::coma,
+ &m6809_base_device::lsra, &m6809_base_device::lsra, &m6809_base_device::rora, &m6809_base_device::asra,
+ &m6809_base_device::asla, &m6809_base_device::rola, &m6809_base_device::deca, &m6809_base_device::deca,
+ &m6809_base_device::inca, &m6809_base_device::tsta, &m6809_base_device::clra, &m6809_base_device::clra,
+
+ /* 0x5X */ &m6809_base_device::negb, &m6809_base_device::negb, &m6809_base_device::comb, &m6809_base_device::comb,
+ &m6809_base_device::lsrb, &m6809_base_device::lsrb, &m6809_base_device::rorb, &m6809_base_device::asrb,
+ &m6809_base_device::aslb, &m6809_base_device::rolb, &m6809_base_device::decb, &m6809_base_device::decb,
+ &m6809_base_device::incb, &m6809_base_device::tstb, &m6809_base_device::clrb, &m6809_base_device::clrb,
+
+ /* 0x6X */ &m6809_base_device::neg_ix, &m6809_base_device::neg_ix, &m6809_base_device::com_ix, &m6809_base_device::com_ix,
+ &m6809_base_device::lsr_ix, &m6809_base_device::lsr_ix, &m6809_base_device::ror_ix, &m6809_base_device::asr_ix,
+ &m6809_base_device::asl_ix, &m6809_base_device::rol_ix, &m6809_base_device::dec_ix, &m6809_base_device::dec_ix,
+ &m6809_base_device::inc_ix, &m6809_base_device::tst_ix, &m6809_base_device::jmp_ix, &m6809_base_device::clr_ix,
+
+ /* 0x7X */ &m6809_base_device::neg_ex, &m6809_base_device::neg_ex, &m6809_base_device::com_ex, &m6809_base_device::com_ex,
&m6809_base_device::lsr_ex, &m6809_base_device::lsr_ex, &m6809_base_device::ror_ex, &m6809_base_device::asr_ex,
&m6809_base_device::asl_ex, &m6809_base_device::rol_ex, &m6809_base_device::dec_ex, &m6809_base_device::dec_ex,
&m6809_base_device::inc_ex, &m6809_base_device::tst_ex, &m6809_base_device::jmp_ex, &m6809_base_device::clr_ex,
- /* 0x8X */ &m6809_base_device::suba_im,&m6809_base_device::cmpa_im,&m6809_base_device::sbca_im,&m6809_base_device::subd_im,
+ /* 0x8X */ &m6809_base_device::suba_im,&m6809_base_device::cmpa_im,&m6809_base_device::sbca_im,&m6809_base_device::subd_im,
&m6809_base_device::anda_im,&m6809_base_device::bita_im,&m6809_base_device::lda_im, &m6809_base_device::sta_im,
&m6809_base_device::eora_im,&m6809_base_device::adca_im,&m6809_base_device::ora_im, &m6809_base_device::adda_im,
- &m6809_base_device::cmpx_im,&m6809_base_device::bsr, &m6809_base_device::ldx_im, &m6809_base_device::stx_im,
+ &m6809_base_device::cmpx_im,&m6809_base_device::bsr, &m6809_base_device::ldx_im, &m6809_base_device::stx_im,
- /* 0x9X */ &m6809_base_device::suba_di,&m6809_base_device::cmpa_di,&m6809_base_device::sbca_di,&m6809_base_device::subd_di,
+ /* 0x9X */ &m6809_base_device::suba_di,&m6809_base_device::cmpa_di,&m6809_base_device::sbca_di,&m6809_base_device::subd_di,
&m6809_base_device::anda_di,&m6809_base_device::bita_di,&m6809_base_device::lda_di, &m6809_base_device::sta_di,
&m6809_base_device::eora_di,&m6809_base_device::adca_di,&m6809_base_device::ora_di, &m6809_base_device::adda_di,
&m6809_base_device::cmpx_di,&m6809_base_device::jsr_di, &m6809_base_device::ldx_di, &m6809_base_device::stx_di,
- /* 0xAX */ &m6809_base_device::suba_ix,&m6809_base_device::cmpa_ix,&m6809_base_device::sbca_ix,&m6809_base_device::subd_ix,
+ /* 0xAX */ &m6809_base_device::suba_ix,&m6809_base_device::cmpa_ix,&m6809_base_device::sbca_ix,&m6809_base_device::subd_ix,
&m6809_base_device::anda_ix,&m6809_base_device::bita_ix,&m6809_base_device::lda_ix, &m6809_base_device::sta_ix,
&m6809_base_device::eora_ix,&m6809_base_device::adca_ix,&m6809_base_device::ora_ix, &m6809_base_device::adda_ix,
&m6809_base_device::cmpx_ix,&m6809_base_device::jsr_ix, &m6809_base_device::ldx_ix, &m6809_base_device::stx_ix,
- /* 0xBX */ &m6809_base_device::suba_ex,&m6809_base_device::cmpa_ex,&m6809_base_device::sbca_ex,&m6809_base_device::subd_ex,
+ /* 0xBX */ &m6809_base_device::suba_ex,&m6809_base_device::cmpa_ex,&m6809_base_device::sbca_ex,&m6809_base_device::subd_ex,
&m6809_base_device::anda_ex,&m6809_base_device::bita_ex,&m6809_base_device::lda_ex, &m6809_base_device::sta_ex,
&m6809_base_device::eora_ex,&m6809_base_device::adca_ex,&m6809_base_device::ora_ex, &m6809_base_device::adda_ex,
&m6809_base_device::cmpx_ex,&m6809_base_device::jsr_ex, &m6809_base_device::ldx_ex, &m6809_base_device::stx_ex,
- /* 0xCX */ &m6809_base_device::subb_im,&m6809_base_device::cmpb_im,&m6809_base_device::sbcb_im,&m6809_base_device::addd_im,
+ /* 0xCX */ &m6809_base_device::subb_im,&m6809_base_device::cmpb_im,&m6809_base_device::sbcb_im,&m6809_base_device::addd_im,
&m6809_base_device::andb_im,&m6809_base_device::bitb_im,&m6809_base_device::ldb_im, &m6809_base_device::stb_im,
&m6809_base_device::eorb_im,&m6809_base_device::adcb_im,&m6809_base_device::orb_im, &m6809_base_device::addb_im,
&m6809_base_device::ldd_im, &m6809_base_device::std_im, &m6809_base_device::ldu_im, &m6809_base_device::stu_im,
- /* 0xDX */ &m6809_base_device::subb_di,&m6809_base_device::cmpb_di,&m6809_base_device::sbcb_di,&m6809_base_device::addd_di,
+ /* 0xDX */ &m6809_base_device::subb_di,&m6809_base_device::cmpb_di,&m6809_base_device::sbcb_di,&m6809_base_device::addd_di,
&m6809_base_device::andb_di,&m6809_base_device::bitb_di,&m6809_base_device::ldb_di, &m6809_base_device::stb_di,
&m6809_base_device::eorb_di,&m6809_base_device::adcb_di,&m6809_base_device::orb_di, &m6809_base_device::addb_di,
&m6809_base_device::ldd_di, &m6809_base_device::std_di, &m6809_base_device::ldu_di, &m6809_base_device::stu_di,
- /* 0xEX */ &m6809_base_device::subb_ix,&m6809_base_device::cmpb_ix,&m6809_base_device::sbcb_ix,&m6809_base_device::addd_ix,
+ /* 0xEX */ &m6809_base_device::subb_ix,&m6809_base_device::cmpb_ix,&m6809_base_device::sbcb_ix,&m6809_base_device::addd_ix,
&m6809_base_device::andb_ix,&m6809_base_device::bitb_ix,&m6809_base_device::ldb_ix, &m6809_base_device::stb_ix,
&m6809_base_device::eorb_ix,&m6809_base_device::adcb_ix,&m6809_base_device::orb_ix, &m6809_base_device::addb_ix,
&m6809_base_device::ldd_ix, &m6809_base_device::std_ix, &m6809_base_device::ldu_ix, &m6809_base_device::stu_ix,
- /* 0xFX */ &m6809_base_device::subb_ex,&m6809_base_device::cmpb_ex,&m6809_base_device::sbcb_ex,&m6809_base_device::addd_ex,
+ /* 0xFX */ &m6809_base_device::subb_ex,&m6809_base_device::cmpb_ex,&m6809_base_device::sbcb_ex,&m6809_base_device::addd_ex,
&m6809_base_device::andb_ex,&m6809_base_device::bitb_ex,&m6809_base_device::ldb_ex, &m6809_base_device::stb_ex,
&m6809_base_device::eorb_ex,&m6809_base_device::adcb_ex,&m6809_base_device::orb_ex, &m6809_base_device::addb_ex,
&m6809_base_device::ldd_ex, &m6809_base_device::std_ex, &m6809_base_device::ldu_ex, &m6809_base_device::stu_ex
@@ -464,14 +464,14 @@ void m6809_base_device::device_start()
astring tempstr;
state_add(STATE_GENPC, "GENPC", m_pc.w.l).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_cc).callimport().callexport().formatstr("%8s").noshow();
- state_add(M6809_PC, "PC", m_pc.w.l).mask(0xffff);
- state_add(M6809_S, "S", m_s.w.l).mask(0xffff);
+ state_add(M6809_PC, "PC", m_pc.w.l).mask(0xffff);
+ state_add(M6809_S, "S", m_s.w.l).mask(0xffff);
state_add(M6809_CC, "CC", m_cc).mask(0xff);
- state_add(M6809_U, "U", m_u.w.l).mask(0xffff);
- state_add(M6809_A, "A", m_d.b.h).mask(0xff);
- state_add(M6809_B, "B", m_d.b.l).mask(0xff);
- state_add(M6809_X, "X", m_x.w.l).mask(0xffff);
- state_add(M6809_Y, "Y", m_y.w.l).mask(0xffff);
+ state_add(M6809_U, "U", m_u.w.l).mask(0xffff);
+ state_add(M6809_A, "A", m_d.b.h).mask(0xff);
+ state_add(M6809_B, "B", m_d.b.l).mask(0xff);
+ state_add(M6809_X, "X", m_x.w.l).mask(0xffff);
+ state_add(M6809_Y, "Y", m_y.w.l).mask(0xffff);
state_add(M6809_DP, "DP", m_dp.w.l).mask(0xffff);
// setup regtable
@@ -504,7 +504,7 @@ void m6809_base_device::device_reset()
m_irq_state[0] = CLEAR_LINE;
m_irq_state[1] = CLEAR_LINE;
- DPD = 0; /* Reset direct page register */
+ DPD = 0; /* Reset direct page register */
CC |= CC_II; /* IRQ disabled */
CC |= CC_IF; /* FIRQ disabled */
@@ -541,14 +541,14 @@ void m6809_base_device::state_string_export(const device_state_entry &entry, ast
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c%c%c",
- (m_cc & 0x80) ? 'E' : '.',
- (m_cc & 0x40) ? 'F' : '.',
- (m_cc & 0x20) ? 'H' : '.',
- (m_cc & 0x10) ? 'I' : '.',
- (m_cc & 0x08) ? 'N' : '.',
- (m_cc & 0x04) ? 'Z' : '.',
- (m_cc & 0x02) ? 'V' : '.',
- (m_cc & 0x01) ? 'C' : '.');
+ (m_cc & 0x80) ? 'E' : '.',
+ (m_cc & 0x40) ? 'F' : '.',
+ (m_cc & 0x20) ? 'H' : '.',
+ (m_cc & 0x10) ? 'I' : '.',
+ (m_cc & 0x08) ? 'N' : '.',
+ (m_cc & 0x04) ? 'Z' : '.',
+ (m_cc & 0x02) ? 'V' : '.',
+ (m_cc & 0x01) ? 'C' : '.');
break;
}
}
@@ -602,18 +602,18 @@ void m6809_base_device::set_irq_line(int irqline, int state)
if( state == CLEAR_LINE ) return;
/* if the stack was not yet initialized */
- if( !(m_int_state & M6809_LDS) ) return;
+ if( !(m_int_state & M6809_LDS) ) return;
- m_int_state &= ~M6809_SYNC;
+ m_int_state &= ~M6809_SYNC;
/* HJB 990225: state already saved by CWAI? */
if( m_int_state & M6809_CWAI )
{
m_int_state &= ~M6809_CWAI;
- m_extra_cycles += 7; /* subtract +7 cycles next time */
- }
+ m_extra_cycles += 7; /* subtract +7 cycles next time */
+ }
else
{
- CC |= CC_E; /* save entire state */
+ CC |= CC_E; /* save entire state */
PUSHWORD(pPC);
PUSHWORD(pU);
PUSHWORD(pY);
@@ -622,14 +622,14 @@ void m6809_base_device::set_irq_line(int irqline, int state)
PUSHBYTE(B);
PUSHBYTE(A);
PUSHBYTE(CC);
- m_extra_cycles += 19; /* subtract +19 cycles next time */
+ m_extra_cycles += 19; /* subtract +19 cycles next time */
}
- CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
+ CC |= CC_IF | CC_II; /* inhibit FIRQ and IRQ */
PCD = RM16(0xfffc);
}
else if (irqline < 2)
{
- LOG(("M6809 '%s' set_irq_line %d, %d\n", m_tag, irqline, state));
+ LOG(("M6809 '%s' set_irq_line %d, %d\n", m_tag, irqline, state));
m_irq_state[irqline] = state;
if (state == CLEAR_LINE) return;
check_irq_lines();
@@ -731,7 +731,7 @@ void m6809_base_device::execute_set_input(int inputnum, int state)
void m6809_base_device::execute_run()
{
- m_icount -= m_extra_cycles;
+ m_icount -= m_extra_cycles;
m_extra_cycles = 0;
check_irq_lines();
@@ -751,14 +751,14 @@ void m6809_base_device::execute_run()
m_ireg = ROP(PCD);
PC++;
- (this->*m_opcode[m_ireg])();
+ (this->*m_opcode[m_ireg])();
m_icount -= m_cycles1[m_ireg];
} while( m_icount > 0 );
- m_icount -= m_extra_cycles;
+ m_icount -= m_extra_cycles;
m_extra_cycles = 0;
- }
+ }
}
void m6809_base_device::fetch_effective_address()
@@ -768,277 +768,277 @@ void m6809_base_device::fetch_effective_address()
switch(postbyte)
{
- case 0x00: EA=X; break;
- case 0x01: EA=X+1; break;
- case 0x02: EA=X+2; break;
- case 0x03: EA=X+3; break;
- case 0x04: EA=X+4; break;
- case 0x05: EA=X+5; break;
- case 0x06: EA=X+6; break;
- case 0x07: EA=X+7; break;
- case 0x08: EA=X+8; break;
- case 0x09: EA=X+9; break;
- case 0x0a: EA=X+10; break;
- case 0x0b: EA=X+11; break;
- case 0x0c: EA=X+12; break;
- case 0x0d: EA=X+13; break;
- case 0x0e: EA=X+14; break;
- case 0x0f: EA=X+15; break;
-
- case 0x10: EA=X-16; break;
- case 0x11: EA=X-15; break;
- case 0x12: EA=X-14; break;
- case 0x13: EA=X-13; break;
- case 0x14: EA=X-12; break;
- case 0x15: EA=X-11; break;
- case 0x16: EA=X-10; break;
- case 0x17: EA=X-9; break;
- case 0x18: EA=X-8; break;
- case 0x19: EA=X-7; break;
- case 0x1a: EA=X-6; break;
- case 0x1b: EA=X-5; break;
- case 0x1c: EA=X-4; break;
- case 0x1d: EA=X-3; break;
- case 0x1e: EA=X-2; break;
- case 0x1f: EA=X-1; break;
-
- case 0x20: EA=Y; break;
- case 0x21: EA=Y+1; break;
- case 0x22: EA=Y+2; break;
- case 0x23: EA=Y+3; break;
- case 0x24: EA=Y+4; break;
- case 0x25: EA=Y+5; break;
- case 0x26: EA=Y+6; break;
- case 0x27: EA=Y+7; break;
- case 0x28: EA=Y+8; break;
- case 0x29: EA=Y+9; break;
- case 0x2a: EA=Y+10; break;
- case 0x2b: EA=Y+11; break;
- case 0x2c: EA=Y+12; break;
- case 0x2d: EA=Y+13; break;
- case 0x2e: EA=Y+14; break;
- case 0x2f: EA=Y+15; break;
-
- case 0x30: EA=Y-16; break;
- case 0x31: EA=Y-15; break;
- case 0x32: EA=Y-14; break;
- case 0x33: EA=Y-13; break;
- case 0x34: EA=Y-12; break;
- case 0x35: EA=Y-11; break;
- case 0x36: EA=Y-10; break;
- case 0x37: EA=Y-9; break;
- case 0x38: EA=Y-8; break;
- case 0x39: EA=Y-7; break;
- case 0x3a: EA=Y-6; break;
- case 0x3b: EA=Y-5; break;
- case 0x3c: EA=Y-4; break;
- case 0x3d: EA=Y-3; break;
- case 0x3e: EA=Y-2; break;
- case 0x3f: EA=Y-1; break;
-
- case 0x40: EA=U; break;
- case 0x41: EA=U+1; break;
- case 0x42: EA=U+2; break;
- case 0x43: EA=U+3; break;
- case 0x44: EA=U+4; break;
- case 0x45: EA=U+5; break;
- case 0x46: EA=U+6; break;
- case 0x47: EA=U+7; break;
- case 0x48: EA=U+8; break;
- case 0x49: EA=U+9; break;
- case 0x4a: EA=U+10; break;
- case 0x4b: EA=U+11; break;
- case 0x4c: EA=U+12; break;
- case 0x4d: EA=U+13; break;
- case 0x4e: EA=U+14; break;
- case 0x4f: EA=U+15; break;
-
- case 0x50: EA=U-16; break;
- case 0x51: EA=U-15; break;
- case 0x52: EA=U-14; break;
- case 0x53: EA=U-13; break;
- case 0x54: EA=U-12; break;
- case 0x55: EA=U-11; break;
- case 0x56: EA=U-10; break;
- case 0x57: EA=U-9; break;
- case 0x58: EA=U-8; break;
- case 0x59: EA=U-7; break;
- case 0x5a: EA=U-6; break;
- case 0x5b: EA=U-5; break;
- case 0x5c: EA=U-4; break;
- case 0x5d: EA=U-3; break;
- case 0x5e: EA=U-2; break;
- case 0x5f: EA=U-1; break;
-
- case 0x60: EA=S; break;
- case 0x61: EA=S+1; break;
- case 0x62: EA=S+2; break;
- case 0x63: EA=S+3; break;
- case 0x64: EA=S+4; break;
- case 0x65: EA=S+5; break;
- case 0x66: EA=S+6; break;
- case 0x67: EA=S+7; break;
- case 0x68: EA=S+8; break;
- case 0x69: EA=S+9; break;
- case 0x6a: EA=S+10; break;
- case 0x6b: EA=S+11; break;
- case 0x6c: EA=S+12; break;
- case 0x6d: EA=S+13; break;
- case 0x6e: EA=S+14; break;
- case 0x6f: EA=S+15; break;
-
- case 0x70: EA=S-16; break;
- case 0x71: EA=S-15; break;
- case 0x72: EA=S-14; break;
- case 0x73: EA=S-13; break;
- case 0x74: EA=S-12; break;
- case 0x75: EA=S-11; break;
- case 0x76: EA=S-10; break;
- case 0x77: EA=S-9; break;
- case 0x78: EA=S-8; break;
- case 0x79: EA=S-7; break;
- case 0x7a: EA=S-6; break;
- case 0x7b: EA=S-5; break;
- case 0x7c: EA=S-4; break;
- case 0x7d: EA=S-3; break;
- case 0x7e: EA=S-2; break;
- case 0x7f: EA=S-1; break;
-
- case 0x80: EA=X; X++; break;
- case 0x81: EA=X; X+=2; break;
- case 0x82: X--; EA=X; break;
- case 0x83: X-=2; EA=X; break;
- case 0x84: EA=X; break;
- case 0x85: EA=X+SIGNED(B); break;
- case 0x86: EA=X+SIGNED(A); break;
- case 0x87: EA=0; break; /* ILLEGAL*/
- case 0x88: IMMBYTE(EA); EA=X+SIGNED(EA); break;
- case 0x89: IMMWORD(EAP); EA+=X; break;
- case 0x8a: EA=0; break; /* IIError*/
- case 0x8b: EA=X+D; break;
- case 0x8c: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0x8d: IMMWORD(EAP); EA+=PC; break;
- case 0x8e: EA=0; break; /* ILLEGAL*/
- case 0x8f: IMMWORD(EAP); break;
-
- case 0x90: EA=X; X++; EAD=RM16(EAD); break; /* Indirect ,R+ not in my specs */
- case 0x91: EA=X; X+=2; EAD=RM16(EAD); break;
- case 0x92: X--; EA=X; EAD=RM16(EAD); break;
- case 0x93: X-=2; EA=X; EAD=RM16(EAD); break;
- case 0x94: EA=X; EAD=RM16(EAD); break;
- case 0x95: EA=X+SIGNED(B); EAD=RM16(EAD); break;
- case 0x96: EA=X+SIGNED(A); EAD=RM16(EAD); break;
- case 0x97: EA=0; break; /* ILLEGAL*/
- case 0x98: IMMBYTE(EA); EA=X+SIGNED(EA); EAD=RM16(EAD); break;
- case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(EAD); break;
- case 0x9a: EA=0; break; /* ILLEGAL*/
- case 0x9b: EA=X+D; EAD=RM16(EAD); break;
- case 0x9c: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
- case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
- case 0x9e: EA=0; break; /* ILLEGAL*/
- case 0x9f: IMMWORD(EAP); EAD=RM16(EAD); break;
-
- case 0xa0: EA=Y; Y++; break;
- case 0xa1: EA=Y; Y+=2; break;
- case 0xa2: Y--; EA=Y; break;
- case 0xa3: Y-=2; EA=Y; break;
- case 0xa4: EA=Y; break;
- case 0xa5: EA=Y+SIGNED(B); break;
- case 0xa6: EA=Y+SIGNED(A); break;
- case 0xa7: EA=0; break; /* ILLEGAL*/
- case 0xa8: IMMBYTE(EA); EA=Y+SIGNED(EA); break;
- case 0xa9: IMMWORD(EAP); EA+=Y; break;
- case 0xaa: EA=0; break; /* ILLEGAL*/
- case 0xab: EA=Y+D; break;
- case 0xac: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0xad: IMMWORD(EAP); EA+=PC; break;
- case 0xae: EA=0; break; /* ILLEGAL*/
- case 0xaf: IMMWORD(EAP); break;
-
- case 0xb0: EA=Y; Y++; EAD=RM16(EAD); break;
- case 0xb1: EA=Y; Y+=2; EAD=RM16(EAD); break;
- case 0xb2: Y--; EA=Y; EAD=RM16(EAD); break;
- case 0xb3: Y-=2; EA=Y; EAD=RM16(EAD); break;
- case 0xb4: EA=Y; EAD=RM16(EAD); break;
- case 0xb5: EA=Y+SIGNED(B); EAD=RM16(EAD); break;
- case 0xb6: EA=Y+SIGNED(A); EAD=RM16(EAD); break;
- case 0xb7: EA=0; break; /* ILLEGAL*/
- case 0xb8: IMMBYTE(EA); EA=Y+SIGNED(EA); EAD=RM16(EAD); break;
- case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(EAD); break;
- case 0xba: EA=0; break; /* ILLEGAL*/
- case 0xbb: EA=Y+D; EAD=RM16(EAD); break;
- case 0xbc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
- case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
- case 0xbe: EA=0; break; /* ILLEGAL*/
- case 0xbf: IMMWORD(EAP); EAD=RM16(EAD); break;
-
- case 0xc0: EA=U; U++; break;
- case 0xc1: EA=U; U+=2; break;
- case 0xc2: U--; EA=U; break;
- case 0xc3: U-=2; EA=U; break;
- case 0xc4: EA=U; break;
- case 0xc5: EA=U+SIGNED(B); break;
- case 0xc6: EA=U+SIGNED(A); break;
- case 0xc7: EA=0; break; /*ILLEGAL*/
- case 0xc8: IMMBYTE(EA); EA=U+SIGNED(EA); break;
- case 0xc9: IMMWORD(EAP); EA+=U; break;
- case 0xca: EA=0; break; /*ILLEGAL*/
- case 0xcb: EA=U+D; break;
- case 0xcc: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0xcd: IMMWORD(EAP); EA+=PC; break;
- case 0xce: EA=0; break; /*ILLEGAL*/
- case 0xcf: IMMWORD(EAP); break;
-
- case 0xd0: EA=U; U++; EAD=RM16(EAD); break;
- case 0xd1: EA=U; U+=2; EAD=RM16(EAD); break;
- case 0xd2: U--; EA=U; EAD=RM16(EAD); break;
- case 0xd3: U-=2; EA=U; EAD=RM16(EAD); break;
- case 0xd4: EA=U; EAD=RM16(EAD); break;
- case 0xd5: EA=U+SIGNED(B); EAD=RM16(EAD); break;
- case 0xd6: EA=U+SIGNED(A); EAD=RM16(EAD); break;
- case 0xd7: EA=0; break; /*ILLEGAL*/
- case 0xd8: IMMBYTE(EA); EA=U+SIGNED(EA); EAD=RM16(EAD); break;
- case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(EAD); break;
- case 0xda: EA=0; break; /*ILLEGAL*/
- case 0xdb: EA=U+D; EAD=RM16(EAD); break;
- case 0xdc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
- case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
- case 0xde: EA=0; break; /*ILLEGAL*/
- case 0xdf: IMMWORD(EAP); EAD=RM16(EAD); break;
-
- case 0xe0: EA=S; S++; break;
- case 0xe1: EA=S; S+=2; break;
- case 0xe2: S--; EA=S; break;
- case 0xe3: S-=2; EA=S; break;
- case 0xe4: EA=S; break;
- case 0xe5: EA=S+SIGNED(B); break;
- case 0xe6: EA=S+SIGNED(A); break;
- case 0xe7: EA=0; break; /*ILLEGAL*/
- case 0xe8: IMMBYTE(EA); EA=S+SIGNED(EA); break;
- case 0xe9: IMMWORD(EAP); EA+=S; break;
- case 0xea: EA=0; break; /*ILLEGAL*/
- case 0xeb: EA=S+D; break;
- case 0xec: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
- case 0xed: IMMWORD(EAP); EA+=PC; break;
- case 0xee: EA=0; break; /*ILLEGAL*/
- case 0xef: IMMWORD(EAP); break;
-
- case 0xf0: EA=S; S++; EAD=RM16(EAD); break;
- case 0xf1: EA=S; S+=2; EAD=RM16(EAD); break;
- case 0xf2: S--; EA=S; EAD=RM16(EAD); break;
- case 0xf3: S-=2; EA=S; EAD=RM16(EAD); break;
- case 0xf4: EA=S; EAD=RM16(EAD); break;
- case 0xf5: EA=S+SIGNED(B); EAD=RM16(EAD); break;
- case 0xf6: EA=S+SIGNED(A); EAD=RM16(EAD); break;
- case 0xf7: EA=0; break; /*ILLEGAL*/
- case 0xf8: IMMBYTE(EA); EA=S+SIGNED(EA); EAD=RM16(EAD); break;
- case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(EAD); break;
- case 0xfa: EA=0; break; /*ILLEGAL*/
- case 0xfb: EA=S+D; EAD=RM16(EAD); break;
- case 0xfc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
- case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
- case 0xfe: EA=0; break; /*ILLEGAL*/
- case 0xff: IMMWORD(EAP); EAD=RM16(EAD); break;
+ case 0x00: EA=X; break;
+ case 0x01: EA=X+1; break;
+ case 0x02: EA=X+2; break;
+ case 0x03: EA=X+3; break;
+ case 0x04: EA=X+4; break;
+ case 0x05: EA=X+5; break;
+ case 0x06: EA=X+6; break;
+ case 0x07: EA=X+7; break;
+ case 0x08: EA=X+8; break;
+ case 0x09: EA=X+9; break;
+ case 0x0a: EA=X+10; break;
+ case 0x0b: EA=X+11; break;
+ case 0x0c: EA=X+12; break;
+ case 0x0d: EA=X+13; break;
+ case 0x0e: EA=X+14; break;
+ case 0x0f: EA=X+15; break;
+
+ case 0x10: EA=X-16; break;
+ case 0x11: EA=X-15; break;
+ case 0x12: EA=X-14; break;
+ case 0x13: EA=X-13; break;
+ case 0x14: EA=X-12; break;
+ case 0x15: EA=X-11; break;
+ case 0x16: EA=X-10; break;
+ case 0x17: EA=X-9; break;
+ case 0x18: EA=X-8; break;
+ case 0x19: EA=X-7; break;
+ case 0x1a: EA=X-6; break;
+ case 0x1b: EA=X-5; break;
+ case 0x1c: EA=X-4; break;
+ case 0x1d: EA=X-3; break;
+ case 0x1e: EA=X-2; break;
+ case 0x1f: EA=X-1; break;
+
+ case 0x20: EA=Y; break;
+ case 0x21: EA=Y+1; break;
+ case 0x22: EA=Y+2; break;
+ case 0x23: EA=Y+3; break;
+ case 0x24: EA=Y+4; break;
+ case 0x25: EA=Y+5; break;
+ case 0x26: EA=Y+6; break;
+ case 0x27: EA=Y+7; break;
+ case 0x28: EA=Y+8; break;
+ case 0x29: EA=Y+9; break;
+ case 0x2a: EA=Y+10; break;
+ case 0x2b: EA=Y+11; break;
+ case 0x2c: EA=Y+12; break;
+ case 0x2d: EA=Y+13; break;
+ case 0x2e: EA=Y+14; break;
+ case 0x2f: EA=Y+15; break;
+
+ case 0x30: EA=Y-16; break;
+ case 0x31: EA=Y-15; break;
+ case 0x32: EA=Y-14; break;
+ case 0x33: EA=Y-13; break;
+ case 0x34: EA=Y-12; break;
+ case 0x35: EA=Y-11; break;
+ case 0x36: EA=Y-10; break;
+ case 0x37: EA=Y-9; break;
+ case 0x38: EA=Y-8; break;
+ case 0x39: EA=Y-7; break;
+ case 0x3a: EA=Y-6; break;
+ case 0x3b: EA=Y-5; break;
+ case 0x3c: EA=Y-4; break;
+ case 0x3d: EA=Y-3; break;
+ case 0x3e: EA=Y-2; break;
+ case 0x3f: EA=Y-1; break;
+
+ case 0x40: EA=U; break;
+ case 0x41: EA=U+1; break;
+ case 0x42: EA=U+2; break;
+ case 0x43: EA=U+3; break;
+ case 0x44: EA=U+4; break;
+ case 0x45: EA=U+5; break;
+ case 0x46: EA=U+6; break;
+ case 0x47: EA=U+7; break;
+ case 0x48: EA=U+8; break;
+ case 0x49: EA=U+9; break;
+ case 0x4a: EA=U+10; break;
+ case 0x4b: EA=U+11; break;
+ case 0x4c: EA=U+12; break;
+ case 0x4d: EA=U+13; break;
+ case 0x4e: EA=U+14; break;
+ case 0x4f: EA=U+15; break;
+
+ case 0x50: EA=U-16; break;
+ case 0x51: EA=U-15; break;
+ case 0x52: EA=U-14; break;
+ case 0x53: EA=U-13; break;
+ case 0x54: EA=U-12; break;
+ case 0x55: EA=U-11; break;
+ case 0x56: EA=U-10; break;
+ case 0x57: EA=U-9; break;
+ case 0x58: EA=U-8; break;
+ case 0x59: EA=U-7; break;
+ case 0x5a: EA=U-6; break;
+ case 0x5b: EA=U-5; break;
+ case 0x5c: EA=U-4; break;
+ case 0x5d: EA=U-3; break;
+ case 0x5e: EA=U-2; break;
+ case 0x5f: EA=U-1; break;
+
+ case 0x60: EA=S; break;
+ case 0x61: EA=S+1; break;
+ case 0x62: EA=S+2; break;
+ case 0x63: EA=S+3; break;
+ case 0x64: EA=S+4; break;
+ case 0x65: EA=S+5; break;
+ case 0x66: EA=S+6; break;
+ case 0x67: EA=S+7; break;
+ case 0x68: EA=S+8; break;
+ case 0x69: EA=S+9; break;
+ case 0x6a: EA=S+10; break;
+ case 0x6b: EA=S+11; break;
+ case 0x6c: EA=S+12; break;
+ case 0x6d: EA=S+13; break;
+ case 0x6e: EA=S+14; break;
+ case 0x6f: EA=S+15; break;
+
+ case 0x70: EA=S-16; break;
+ case 0x71: EA=S-15; break;
+ case 0x72: EA=S-14; break;
+ case 0x73: EA=S-13; break;
+ case 0x74: EA=S-12; break;
+ case 0x75: EA=S-11; break;
+ case 0x76: EA=S-10; break;
+ case 0x77: EA=S-9; break;
+ case 0x78: EA=S-8; break;
+ case 0x79: EA=S-7; break;
+ case 0x7a: EA=S-6; break;
+ case 0x7b: EA=S-5; break;
+ case 0x7c: EA=S-4; break;
+ case 0x7d: EA=S-3; break;
+ case 0x7e: EA=S-2; break;
+ case 0x7f: EA=S-1; break;
+
+ case 0x80: EA=X; X++; break;
+ case 0x81: EA=X; X+=2; break;
+ case 0x82: X--; EA=X; break;
+ case 0x83: X-=2; EA=X; break;
+ case 0x84: EA=X; break;
+ case 0x85: EA=X+SIGNED(B); break;
+ case 0x86: EA=X+SIGNED(A); break;
+ case 0x87: EA=0; break; /* ILLEGAL*/
+ case 0x88: IMMBYTE(EA); EA=X+SIGNED(EA); break;
+ case 0x89: IMMWORD(EAP); EA+=X; break;
+ case 0x8a: EA=0; break; /* IIError*/
+ case 0x8b: EA=X+D; break;
+ case 0x8c: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0x8d: IMMWORD(EAP); EA+=PC; break;
+ case 0x8e: EA=0; break; /* ILLEGAL*/
+ case 0x8f: IMMWORD(EAP); break;
+
+ case 0x90: EA=X; X++; EAD=RM16(EAD); break; /* Indirect ,R+ not in my specs */
+ case 0x91: EA=X; X+=2; EAD=RM16(EAD); break;
+ case 0x92: X--; EA=X; EAD=RM16(EAD); break;
+ case 0x93: X-=2; EA=X; EAD=RM16(EAD); break;
+ case 0x94: EA=X; EAD=RM16(EAD); break;
+ case 0x95: EA=X+SIGNED(B); EAD=RM16(EAD); break;
+ case 0x96: EA=X+SIGNED(A); EAD=RM16(EAD); break;
+ case 0x97: EA=0; break; /* ILLEGAL*/
+ case 0x98: IMMBYTE(EA); EA=X+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0x99: IMMWORD(EAP); EA+=X; EAD=RM16(EAD); break;
+ case 0x9a: EA=0; break; /* ILLEGAL*/
+ case 0x9b: EA=X+D; EAD=RM16(EAD); break;
+ case 0x9c: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0x9d: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
+ case 0x9e: EA=0; break; /* ILLEGAL*/
+ case 0x9f: IMMWORD(EAP); EAD=RM16(EAD); break;
+
+ case 0xa0: EA=Y; Y++; break;
+ case 0xa1: EA=Y; Y+=2; break;
+ case 0xa2: Y--; EA=Y; break;
+ case 0xa3: Y-=2; EA=Y; break;
+ case 0xa4: EA=Y; break;
+ case 0xa5: EA=Y+SIGNED(B); break;
+ case 0xa6: EA=Y+SIGNED(A); break;
+ case 0xa7: EA=0; break; /* ILLEGAL*/
+ case 0xa8: IMMBYTE(EA); EA=Y+SIGNED(EA); break;
+ case 0xa9: IMMWORD(EAP); EA+=Y; break;
+ case 0xaa: EA=0; break; /* ILLEGAL*/
+ case 0xab: EA=Y+D; break;
+ case 0xac: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0xad: IMMWORD(EAP); EA+=PC; break;
+ case 0xae: EA=0; break; /* ILLEGAL*/
+ case 0xaf: IMMWORD(EAP); break;
+
+ case 0xb0: EA=Y; Y++; EAD=RM16(EAD); break;
+ case 0xb1: EA=Y; Y+=2; EAD=RM16(EAD); break;
+ case 0xb2: Y--; EA=Y; EAD=RM16(EAD); break;
+ case 0xb3: Y-=2; EA=Y; EAD=RM16(EAD); break;
+ case 0xb4: EA=Y; EAD=RM16(EAD); break;
+ case 0xb5: EA=Y+SIGNED(B); EAD=RM16(EAD); break;
+ case 0xb6: EA=Y+SIGNED(A); EAD=RM16(EAD); break;
+ case 0xb7: EA=0; break; /* ILLEGAL*/
+ case 0xb8: IMMBYTE(EA); EA=Y+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0xb9: IMMWORD(EAP); EA+=Y; EAD=RM16(EAD); break;
+ case 0xba: EA=0; break; /* ILLEGAL*/
+ case 0xbb: EA=Y+D; EAD=RM16(EAD); break;
+ case 0xbc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0xbd: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
+ case 0xbe: EA=0; break; /* ILLEGAL*/
+ case 0xbf: IMMWORD(EAP); EAD=RM16(EAD); break;
+
+ case 0xc0: EA=U; U++; break;
+ case 0xc1: EA=U; U+=2; break;
+ case 0xc2: U--; EA=U; break;
+ case 0xc3: U-=2; EA=U; break;
+ case 0xc4: EA=U; break;
+ case 0xc5: EA=U+SIGNED(B); break;
+ case 0xc6: EA=U+SIGNED(A); break;
+ case 0xc7: EA=0; break; /*ILLEGAL*/
+ case 0xc8: IMMBYTE(EA); EA=U+SIGNED(EA); break;
+ case 0xc9: IMMWORD(EAP); EA+=U; break;
+ case 0xca: EA=0; break; /*ILLEGAL*/
+ case 0xcb: EA=U+D; break;
+ case 0xcc: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0xcd: IMMWORD(EAP); EA+=PC; break;
+ case 0xce: EA=0; break; /*ILLEGAL*/
+ case 0xcf: IMMWORD(EAP); break;
+
+ case 0xd0: EA=U; U++; EAD=RM16(EAD); break;
+ case 0xd1: EA=U; U+=2; EAD=RM16(EAD); break;
+ case 0xd2: U--; EA=U; EAD=RM16(EAD); break;
+ case 0xd3: U-=2; EA=U; EAD=RM16(EAD); break;
+ case 0xd4: EA=U; EAD=RM16(EAD); break;
+ case 0xd5: EA=U+SIGNED(B); EAD=RM16(EAD); break;
+ case 0xd6: EA=U+SIGNED(A); EAD=RM16(EAD); break;
+ case 0xd7: EA=0; break; /*ILLEGAL*/
+ case 0xd8: IMMBYTE(EA); EA=U+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0xd9: IMMWORD(EAP); EA+=U; EAD=RM16(EAD); break;
+ case 0xda: EA=0; break; /*ILLEGAL*/
+ case 0xdb: EA=U+D; EAD=RM16(EAD); break;
+ case 0xdc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0xdd: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
+ case 0xde: EA=0; break; /*ILLEGAL*/
+ case 0xdf: IMMWORD(EAP); EAD=RM16(EAD); break;
+
+ case 0xe0: EA=S; S++; break;
+ case 0xe1: EA=S; S+=2; break;
+ case 0xe2: S--; EA=S; break;
+ case 0xe3: S-=2; EA=S; break;
+ case 0xe4: EA=S; break;
+ case 0xe5: EA=S+SIGNED(B); break;
+ case 0xe6: EA=S+SIGNED(A); break;
+ case 0xe7: EA=0; break; /*ILLEGAL*/
+ case 0xe8: IMMBYTE(EA); EA=S+SIGNED(EA); break;
+ case 0xe9: IMMWORD(EAP); EA+=S; break;
+ case 0xea: EA=0; break; /*ILLEGAL*/
+ case 0xeb: EA=S+D; break;
+ case 0xec: IMMBYTE(EA); EA=PC+SIGNED(EA); break;
+ case 0xed: IMMWORD(EAP); EA+=PC; break;
+ case 0xee: EA=0; break; /*ILLEGAL*/
+ case 0xef: IMMWORD(EAP); break;
+
+ case 0xf0: EA=S; S++; EAD=RM16(EAD); break;
+ case 0xf1: EA=S; S+=2; EAD=RM16(EAD); break;
+ case 0xf2: S--; EA=S; EAD=RM16(EAD); break;
+ case 0xf3: S-=2; EA=S; EAD=RM16(EAD); break;
+ case 0xf4: EA=S; EAD=RM16(EAD); break;
+ case 0xf5: EA=S+SIGNED(B); EAD=RM16(EAD); break;
+ case 0xf6: EA=S+SIGNED(A); EAD=RM16(EAD); break;
+ case 0xf7: EA=0; break; /*ILLEGAL*/
+ case 0xf8: IMMBYTE(EA); EA=S+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0xf9: IMMWORD(EAP); EA+=S; EAD=RM16(EAD); break;
+ case 0xfa: EA=0; break; /*ILLEGAL*/
+ case 0xfb: EA=S+D; EAD=RM16(EAD); break;
+ case 0xfc: IMMBYTE(EA); EA=PC+SIGNED(EA); EAD=RM16(EAD); break;
+ case 0xfd: IMMWORD(EAP); EA+=PC; EAD=RM16(EAD); break;
+ case 0xfe: EA=0; break; /*ILLEGAL*/
+ case 0xff: IMMWORD(EAP); EAD=RM16(EAD); break;
}
m_icount -= m_index_cycle_em[postbyte];
}
diff --git a/src/emu/cpu/m6809/m6809.h b/src/emu/cpu/m6809/m6809.h
index 62006dec1ad..c6a9dbd84d6 100644
--- a/src/emu/cpu/m6809/m6809.h
+++ b/src/emu/cpu/m6809/m6809.h
@@ -34,7 +34,7 @@ extern const device_type M6809E;
// Used by core CPU interface
class m6809_base_device : public cpu_device,
- public m6809_config
+ public m6809_config
{
public:
// construction/destruction
@@ -102,29 +102,29 @@ protected:
const address_space_config m_program_config;
// CPU registers
- PAIR m_pc; /* Program counter */
- PAIR m_ppc; /* Previous program counter */
- PAIR m_d; /* Accumulator a and b */
- PAIR m_dp; /* Direct Page register (page in MSB) */
- PAIR m_u, m_s; /* Stack pointers */
- PAIR m_x, m_y; /* Index registers */
- UINT8 m_cc;
- UINT8 m_ireg; /* First opcode */
- UINT8 m_irq_state[2];
+ PAIR m_pc; /* Program counter */
+ PAIR m_ppc; /* Previous program counter */
+ PAIR m_d; /* Accumulator a and b */
+ PAIR m_dp; /* Direct Page register (page in MSB) */
+ PAIR m_u, m_s; /* Stack pointers */
+ PAIR m_x, m_y; /* Index registers */
+ UINT8 m_cc;
+ UINT8 m_ireg; /* First opcode */
+ UINT8 m_irq_state[2];
- int m_extra_cycles; /* cycles used up by interrupts */
+ int m_extra_cycles; /* cycles used up by interrupts */
- PAIR m_ea; /* effective address */
+ PAIR m_ea; /* effective address */
// other internal states
- int m_icount;
- UINT8 m_int_state; /* SYNC and CWAI flags */
- UINT8 m_nmi_state;
- int m_clock_divider;
+ int m_icount;
+ UINT8 m_int_state; /* SYNC and CWAI flags */
+ UINT8 m_nmi_state;
+ int m_clock_divider;
// address spaces
- address_space *m_program;
- direct_read_data *m_direct;
+ address_space *m_program;
+ direct_read_data *m_direct;
};
// ======================> m6809_device
@@ -134,7 +134,7 @@ class m6809_device : public m6809_base_device
public:
// construction/destruction
m6809_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : m6809_base_device(mconfig, tag, owner, clock, M6809, 1) { }
+ : m6809_base_device(mconfig, tag, owner, clock, M6809, 1) { }
};
// ======================> m6809e_device
@@ -144,7 +144,7 @@ class m6809e_device : public m6809_base_device
public:
// construction/destruction
m6809e_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : m6809_base_device(mconfig, tag, owner, clock, M6809E, 4) { }
+ : m6809_base_device(mconfig, tag, owner, clock, M6809E, 4) { }
};
enum
@@ -153,7 +153,7 @@ enum
M6809_DP
};
-#define M6809_IRQ_LINE 0 /* IRQ line number */
+#define M6809_IRQ_LINE 0 /* IRQ line number */
#define M6809_FIRQ_LINE 1 /* FIRQ line number */
/* M6809e has LIC line to indicate opcode/data fetch */
diff --git a/src/emu/cpu/mb86233/mb86233.c b/src/emu/cpu/mb86233/mb86233.c
index 0369412ae87..d5f31d15fb6 100644
--- a/src/emu/cpu/mb86233/mb86233.c
+++ b/src/emu/cpu/mb86233/mb86233.c
@@ -25,29 +25,29 @@ CPU_DISASSEMBLE( mb86233 );
union MB86233_REG
{
- INT32 i;
- UINT32 u;
- float f;
+ INT32 i;
+ UINT32 u;
+ float f;
};
struct mb86233_state
{
- UINT16 pc;
- MB86233_REG a;
- MB86233_REG b;
- MB86233_REG d;
- MB86233_REG p;
-
- UINT16 reps;
- UINT16 pcs[4];
- UINT8 pcsp;
- UINT32 eb;
- UINT32 shift;
- UINT32 repcnt;
- UINT16 sr;
-
- UINT32 gpr[16];
- UINT32 extport[0x30];
+ UINT16 pc;
+ MB86233_REG a;
+ MB86233_REG b;
+ MB86233_REG d;
+ MB86233_REG p;
+
+ UINT16 reps;
+ UINT16 pcs[4];
+ UINT8 pcsp;
+ UINT32 eb;
+ UINT32 shift;
+ UINT32 repcnt;
+ UINT16 sr;
+
+ UINT32 gpr[16];
+ UINT32 extport[0x30];
legacy_cpu_device *device;
address_space *program;
@@ -55,14 +55,14 @@ struct mb86233_state
int icount;
/* FIFO */
- int fifo_wait;
+ int fifo_wait;
mb86233_fifo_read_func fifo_read_cb;
mb86233_fifo_write_func fifo_write_cb;
/* internal RAM */
- UINT32 *RAM;
- UINT32 *ARAM, *BRAM;
- UINT32 *Tables;
+ UINT32 *RAM;
+ UINT32 *ARAM, *BRAM;
+ UINT32 *Tables;
};
INLINE mb86233_state *get_safe_token(device_t *device)
@@ -76,28 +76,28 @@ INLINE mb86233_state *get_safe_token(device_t *device)
MACROS
***************************************************************************/
-#define GETPC() cpustate->pc
-#define GETA() cpustate->a
-#define GETB() cpustate->b
-#define GETD() cpustate->d
-#define GETP() cpustate->p
-#define GETSR() cpustate->sr
-#define GETGPR(a) cpustate->gpr[a]
-#define GETSHIFT() cpustate->shift
-#define GETPCS() cpustate->pcs
-#define GETPCSP() cpustate->pcsp
-#define GETEB() cpustate->eb
-#define GETREPS() cpustate->reps
-#define GETEXTPORT() cpustate->extport
-#define GETFIFOWAIT() cpustate->fifo_wait
-#define GETARAM() cpustate->ARAM
-#define GETBRAM() cpustate->BRAM
-#define ALU(cs,a) mb86233_alu(cs,a)
-#define GETREPCNT() cpustate->repcnt
-
-#define ROPCODE(a) cpustate->direct->read_decrypted_dword(a<<2)
-#define RDMEM(a) cpustate->program->read_dword((a<<2))
-#define WRMEM(a,v) cpustate->program->write_dword((a<<2), v)
+#define GETPC() cpustate->pc
+#define GETA() cpustate->a
+#define GETB() cpustate->b
+#define GETD() cpustate->d
+#define GETP() cpustate->p
+#define GETSR() cpustate->sr
+#define GETGPR(a) cpustate->gpr[a]
+#define GETSHIFT() cpustate->shift
+#define GETPCS() cpustate->pcs
+#define GETPCSP() cpustate->pcsp
+#define GETEB() cpustate->eb
+#define GETREPS() cpustate->reps
+#define GETEXTPORT() cpustate->extport
+#define GETFIFOWAIT() cpustate->fifo_wait
+#define GETARAM() cpustate->ARAM
+#define GETBRAM() cpustate->BRAM
+#define ALU(cs,a) mb86233_alu(cs,a)
+#define GETREPCNT() cpustate->repcnt
+
+#define ROPCODE(a) cpustate->direct->read_decrypted_dword(a<<2)
+#define RDMEM(a) cpustate->program->read_dword((a<<2))
+#define WRMEM(a,v) cpustate->program->write_dword((a<<2), v)
/***************************************************************************
Initialization and Shutdown
@@ -121,7 +121,7 @@ static CPU_INIT( mb86233 )
cpustate->Tables = (UINT32*) device->machine().root_device().memregion(_config->tablergn)->base();
}
- cpustate->RAM = auto_alloc_array(device->machine(), UINT32, 2 * 0x200); /* 2x 2KB */
+ cpustate->RAM = auto_alloc_array(device->machine(), UINT32, 2 * 0x200); /* 2x 2KB */
memset( cpustate->RAM, 0, 2 * 0x200 * sizeof(UINT32) );
cpustate->ARAM = &cpustate->RAM[0];
cpustate->BRAM = &cpustate->RAM[0x200];
@@ -148,9 +148,9 @@ static CPU_RESET( mb86233 )
Status Register
***************************************************************************/
-#define ZERO_FLAG (1 << 0)
-#define SIGN_FLAG (1 << 1)
-#define EXTERNAL_FLAG (1 << 2) //This seems to be a flag coming from some external circuit??
+#define ZERO_FLAG (1 << 0)
+#define SIGN_FLAG (1 << 1)
+#define EXTERNAL_FLAG (1 << 2) //This seems to be a flag coming from some external circuit??
static void FLAGSF( mb86233_state *cpustate, float v )
{
@@ -184,36 +184,36 @@ static int COND( mb86233_state *cpustate, UINT32 cond )
{
switch( cond )
{
- case 0x00: /* eq */
+ case 0x00: /* eq */
if ( (GETSR() & ZERO_FLAG) ) return 1;
break;
- case 0x01: /* ge */
+ case 0x01: /* ge */
if ( (GETSR() & ZERO_FLAG) || ((GETSR() & SIGN_FLAG)==0) ) return 1;
break;
- case 0x02: /* le */
+ case 0x02: /* le */
if ( (GETSR() & ZERO_FLAG) || (GETSR() & SIGN_FLAG) ) return 1;
break;
- case 0x06: /* never */
+ case 0x06: /* never */
break;
case 0x0a:
if(GETSR() & EXTERNAL_FLAG) return 1;
break;
- case 0x10: /* --r12 != 0 */
+ case 0x10: /* --r12 != 0 */
GETGPR(12)--;
if ( GETGPR(12) != 0 ) return 1;
break;
- case 0x11: /* --r13 != 0 */
+ case 0x11: /* --r13 != 0 */
GETGPR(13)--;
if ( GETGPR(13) != 0 ) return 1;
break;
- case 0x16: /* always */
+ case 0x16: /* always */
return 1;
default:
@@ -232,142 +232,142 @@ static int COND( mb86233_state *cpustate, UINT32 cond )
static void ALU( mb86233_state *cpustate, UINT32 alu)
{
- float ftmp;
+ float ftmp;
switch(alu)
{
- case 0x00: /* NOP */
+ case 0x00: /* NOP */
break;
- case 0x01: /* D = D & A */
+ case 0x01: /* D = D & A */
GETD().u &= GETA().u;
FLAGSI(cpustate, GETD().u);
break;
- case 0x02: /* D = D | A */
+ case 0x02: /* D = D | A */
GETD().u |= GETA().u;
FLAGSI(cpustate, GETD().u);
break;
- case 0x03: /* D = D ^ A */
+ case 0x03: /* D = D ^ A */
GETD().u ^= GETA().u;
FLAGSI(cpustate, GETD().u);
break;
- case 0x05: /* CMP D,A */
+ case 0x05: /* CMP D,A */
ftmp = GETD().f - GETA().f;
FLAGSF(cpustate, ftmp);
cpustate->icount--;
break;
- case 0x06: /* D = D + A */
+ case 0x06: /* D = D + A */
GETD().f += GETA().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x07: /* D = D - A */
+ case 0x07: /* D = D - A */
GETD().f -= GETA().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x08: /* P = A * B */
+ case 0x08: /* P = A * B */
GETP().f = GETA().f * GETB().f;
cpustate->icount--;
break;
- case 0x09: /* D = D + P; P = A * B */
+ case 0x09: /* D = D + P; P = A * B */
GETD().f += GETP().f;
GETP().f = GETA().f * GETB().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x0A: /* D = D - P; P = A * B */
+ case 0x0A: /* D = D - P; P = A * B */
GETD().f -= GETP().f;
GETP().f = GETA().f * GETB().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x0B: /* D = fabs(D) */
+ case 0x0B: /* D = fabs(D) */
GETD().f = fabs( GETD().f );
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x0C: /* D = D + P */
+ case 0x0C: /* D = D + P */
GETD().f += GETP().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x0D: /* D = P; P = A * B */
+ case 0x0D: /* D = P; P = A * B */
GETD().f = GETP().f;
GETP().f = GETA().f * GETB().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x0E: /* D = float(D) */
+ case 0x0E: /* D = float(D) */
GETD().f = (float)GETD().i;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x0F: /* D = int(D) */
+ case 0x0F: /* D = int(D) */
GETD().i = (INT32)GETD().f;
FLAGSI(cpustate, GETD().u);
break;
- case 0x10: /* D = D / A */
+ case 0x10: /* D = D / A */
if ( GETA().u != 0 )
GETD().f = GETD().f / GETA().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x11: /* D = -D */
+ case 0x11: /* D = -D */
GETD().f = -GETD().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x13: /* D = A + B */
+ case 0x13: /* D = A + B */
GETD().f = GETA().f + GETB().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x14: /* D = B - A */
+ case 0x14: /* D = B - A */
GETD().f = GETB().f - GETA().f;
FLAGSF(cpustate, GETD().f);
cpustate->icount--;
break;
- case 0x16: /* LSR D, SHIFT */
+ case 0x16: /* LSR D, SHIFT */
GETD().u >>= GETSHIFT();
FLAGSI(cpustate, GETD().u);
break;
- case 0x17: /* LSL D, SHIFT */
+ case 0x17: /* LSL D, SHIFT */
GETD().u <<= GETSHIFT();
FLAGSI(cpustate, GETD().u);
break;
- case 0x18: /* ASR D, SHIFT */
+ case 0x18: /* ASR D, SHIFT */
// GETD().u = (GETD().u & 0x80000000) | (GETD().u >> GETSHIFT());
GETD().i >>= GETSHIFT();
FLAGSI(cpustate, GETD().u);
break;
- case 0x1A: /* D = D + A */
+ case 0x1A: /* D = D + A */
GETD().i += GETA().i;
FLAGSI(cpustate, GETD().u);
break;
- case 0x1B: /* D = D - A */
+ case 0x1B: /* D = D - A */
GETD().i -= GETA().i;
FLAGSI(cpustate, GETD().u);
break;
@@ -395,11 +395,11 @@ static UINT32 ScaleExp(unsigned int v,int scale)
static UINT32 GETEXTERNAL( mb86233_state *cpustate, UINT32 EB, UINT32 offset )
{
- UINT32 addr;
+ UINT32 addr;
- if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
+ if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
{
- if(offset>=0x20 && offset<=0x23) //SIN from value at RAM(0x20) in 0x4000/PI steps
+ if(offset>=0x20 && offset<=0x23) //SIN from value at RAM(0x20) in 0x4000/PI steps
{
UINT32 r;
UINT32 value=GETEXTPORT()[0x20];
@@ -454,7 +454,7 @@ static UINT32 GETEXTERNAL( mb86233_state *cpustate, UINT32 EB, UINT32 offset )
}
if((a.u^b.u)&0x80000000)
- sign=16; //the negative values are in the high word
+ sign=16; //the negative values are in the high word
if((exp&0x70)!=0x70)
index=0;
@@ -484,15 +484,15 @@ static UINT32 GETEXTERNAL( mb86233_state *cpustate, UINT32 EB, UINT32 offset )
res=0x4000-res;
- if((a.u&0x80000000) && (b.u&0x80000000)) //3rd quadrant
+ if((a.u&0x80000000) && (b.u&0x80000000)) //3rd quadrant
{
res=0x8000|res;
}
- else if((a.u&0x80000000) && !(b.u&0x80000000)) //2nd quadrant
+ else if((a.u&0x80000000) && !(b.u&0x80000000)) //2nd quadrant
{
res=res&0x7fff;
}
- else if(!(a.u&0x80000000) && (b.u&0x80000000)) //2nd quadrant
+ else if(!(a.u&0x80000000) && (b.u&0x80000000)) //2nd quadrant
{
res=0x8000|res;
}
@@ -556,9 +556,9 @@ static UINT32 GETEXTERNAL( mb86233_state *cpustate, UINT32 EB, UINT32 offset )
static void SETEXTERNAL( mb86233_state *cpustate, UINT32 EB, UINT32 offset, UINT32 value )
{
- UINT32 addr;
+ UINT32 addr;
- if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
+ if ( EB == 0 && offset >= 0x20 && offset <= 0x2f ) /* TGP Tables in ROM - FIXME - */
{
GETEXTPORT()[offset] = value;
@@ -589,7 +589,7 @@ static void SETEXTERNAL( mb86233_state *cpustate, UINT32 EB, UINT32 offset, UINT
static UINT32 GETREGS( mb86233_state *cpustate, UINT32 reg, int source )
{
- UINT32 mode = ( reg >> 6 ) & 0x07;
+ UINT32 mode = ( reg >> 6 ) & 0x07;
reg &= 0x3f;
@@ -602,52 +602,52 @@ static UINT32 GETREGS( mb86233_state *cpustate, UINT32 reg, int source )
switch( reg )
{
- case 0x10: /* A */
+ case 0x10: /* A */
return GETA().u;
- case 0x11: /* A.e */
+ case 0x11: /* A.e */
return (GETA().u >> 23) & 0xff;
- case 0x12: /* A.m */
+ case 0x12: /* A.m */
return (GETA().u & 0x7fffff) | ((GETA().u&0x80000000) >> 8);
- case 0x13: /* B */
+ case 0x13: /* B */
return GETB().u;
- case 0x14: /* B.e */
+ case 0x14: /* B.e */
return (GETB().u >> 23) & 0xff;
- case 0x15: /* B.m */
+ case 0x15: /* B.m */
return (GETB().u & 0x7fffff) | ((GETB().u&0x80000000) >> 8);
- case 0x19: /* D */
+ case 0x19: /* D */
return GETD().u;
- case 0x1A: /* D.e */
+ case 0x1A: /* D.e */
return (GETD().u >> 23) & 0xff;
- case 0x1B: /* D.m */
+ case 0x1B: /* D.m */
return (GETD().u & 0x7fffff) | ((GETD().u&0x80000000) >> 8);
- case 0x1C: /* P */
+ case 0x1C: /* P */
return GETP().u;
- case 0x1D: /* P.e */
+ case 0x1D: /* P.e */
return (GETP().u >> 23) & 0xff;
- case 0x1E: /* P.m */
+ case 0x1E: /* P.m */
return (GETP().u & 0x7fffff) | ((GETP().u&0x80000000) >> 8);
- case 0x1F: /* Shift */
+ case 0x1F: /* Shift */
return GETSHIFT();
- case 0x20: /* Parallel Port */
+ case 0x20: /* Parallel Port */
logerror( "TGP: Parallel port read at PC:%04x\n", GETPC() );
return 0;
- case 0x21: /* FIn */
+ case 0x21: /* FIn */
{
- UINT32 fifo_data;
+ UINT32 fifo_data;
if ( cpustate->fifo_read_cb )
{
@@ -661,10 +661,10 @@ static UINT32 GETREGS( mb86233_state *cpustate, UINT32 reg, int source )
return 0;
}
- case 0x22: /* FOut */
+ case 0x22: /* FOut */
return 0;
- case 0x23: /* EB */
+ case 0x23: /* EB */
return GETEB();
case 0x34:
@@ -675,9 +675,9 @@ static UINT32 GETREGS( mb86233_state *cpustate, UINT32 reg, int source )
break;
}
}
- else if ( mode == 2 ) /* Indexed */
+ else if ( mode == 2 ) /* Indexed */
{
- UINT32 addr = reg & 0x1f;
+ UINT32 addr = reg & 0x1f;
if ( source )
{
@@ -696,9 +696,9 @@ static UINT32 GETREGS( mb86233_state *cpustate, UINT32 reg, int source )
return addr;
}
- else if( mode == 6 ) /* Indexed with postop */
+ else if( mode == 6 ) /* Indexed with postop */
{
- UINT32 addr = 0;
+ UINT32 addr = 0;
if ( source )
{
@@ -742,7 +742,7 @@ static UINT32 GETREGS( mb86233_state *cpustate, UINT32 reg, int source )
static void SETREGS( mb86233_state *cpustate, UINT32 reg, UINT32 val )
{
- int mode = ( reg >> 6) & 0x07;
+ int mode = ( reg >> 6) & 0x07;
reg &= 0x3f;
@@ -759,61 +759,61 @@ static void SETREGS( mb86233_state *cpustate, UINT32 reg, UINT32 val )
switch( reg )
{
- case 0x10: /* A */
+ case 0x10: /* A */
GETA().u = val;
break;
- case 0x11: /* A.e */
+ case 0x11: /* A.e */
GETA().u &= ~((0x0000007f) << 23);
GETA().u |= (( val & 0xff ) << 23 );
break;
- case 0x12: /* A.m */
+ case 0x12: /* A.m */
GETA().u &= ~( 0x807fffff );
GETA().u |= ( val & 0x7fffff );
GETA().u |= ( val & 0x800000 ) << 8;
break;
- case 0x13: /* B */
+ case 0x13: /* B */
GETB().u = val;
break;
- case 0x14: /* B.e */
+ case 0x14: /* B.e */
GETB().u &= ~((0x0000007f) << 23);
GETB().u |= (( val & 0xff ) << 23 );
break;
- case 0x15: /* B.m */
+ case 0x15: /* B.m */
GETB().u &= ~( 0x807fffff );
GETB().u |= ( val & 0x7fffff );
GETB().u |= ( val & 0x800000 ) << 8;
break;
- case 0x19: /* D */
+ case 0x19: /* D */
GETD().u = val;
break;
- case 0x1A: /* D.e */
+ case 0x1A: /* D.e */
GETD().u &= ~((0x0000007f) << 23);
GETD().u |= (( val & 0xff ) << 23 );
break;
- case 0x1B: /* B.m */
+ case 0x1B: /* B.m */
GETD().u &= ~( 0x807fffff );
GETD().u |= ( val & 0x7fffff );
GETD().u |= ( val & 0x800000 ) << 8;
break;
- case 0x1C: /* P */
+ case 0x1C: /* P */
GETP().u = val;
break;
- case 0x1D: /* P.e */
+ case 0x1D: /* P.e */
GETP().u &= ~((0x0000007f) << 23);
GETP().u |= (( val & 0xff ) << 23 );
break;
- case 0x1E: /* P.m */
+ case 0x1E: /* P.m */
GETP().u &= ~( 0x807fffff );
GETP().u |= ( val & 0x7fffff );
GETP().u |= ( val & 0x800000 ) << 8;
@@ -862,7 +862,7 @@ static void SETREGS( mb86233_state *cpustate, UINT32 reg, UINT32 val )
static UINT32 INDIRECT( mb86233_state *cpustate, UINT32 reg, int source )
{
- UINT32 mode = ( reg >> 6 ) & 0x07;
+ UINT32 mode = ( reg >> 6 ) & 0x07;
if ( mode == 0 || mode == 1 || mode == 3 )
{
@@ -870,7 +870,7 @@ static UINT32 INDIRECT( mb86233_state *cpustate, UINT32 reg, int source )
}
else if ( mode == 2 )
{
- UINT32 addr = reg & 0x1f;
+ UINT32 addr = reg & 0x1f;
if ( source )
{
@@ -891,7 +891,7 @@ static UINT32 INDIRECT( mb86233_state *cpustate, UINT32 reg, int source )
}
else if ( mode == 6 || mode == 7 )
{
- UINT32 addr = 0;
+ UINT32 addr = 0;
if ( source )
{
@@ -943,8 +943,8 @@ static CPU_EXECUTE( mb86233 )
while( cpustate->icount > 0 )
{
- UINT32 val;
- UINT32 opcode;
+ UINT32 val;
+ UINT32 opcode;
debugger_instruction_hook(device, GETPC());
@@ -954,12 +954,12 @@ static CPU_EXECUTE( mb86233 )
switch( (opcode >> 26) & 0x3f )
{
- case 0x00: /* dual move */
+ case 0x00: /* dual move */
{
- UINT32 r1 = opcode & 0x1ff;
- UINT32 r2 = ( opcode >> 9 ) & 0x7f;
- UINT32 alu = ( opcode >> 21 ) & 0x1f;
- UINT32 op = ( opcode >> 16 ) & 0x1f;
+ UINT32 r1 = opcode & 0x1ff;
+ UINT32 r2 = ( opcode >> 9 ) & 0x7f;
+ UINT32 alu = ( opcode >> 21 ) & 0x1f;
+ UINT32 op = ( opcode >> 16 ) & 0x1f;
ALU( cpustate, alu );
@@ -997,30 +997,30 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x7: /* LD/MOV */
+ case 0x7: /* LD/MOV */
{
- UINT32 r1 = opcode & 0x1ff;
- UINT32 r2 = ( opcode >> 9 ) & 0x7f;
- UINT32 alu = ( opcode >> 21 ) & 0x1f;
- UINT32 op = ( opcode >> 16 ) & 0x1f;
+ UINT32 r1 = opcode & 0x1ff;
+ UINT32 r2 = ( opcode >> 9 ) & 0x7f;
+ UINT32 alu = ( opcode >> 21 ) & 0x1f;
+ UINT32 op = ( opcode >> 16 ) & 0x1f;
switch( op )
{
- case 0x04: /* MOV RAM->External */
+ case 0x04: /* MOV RAM->External */
{
SETEXTERNAL(cpustate, GETEB(), r2, GETARAM()[r1]);
ALU(cpustate, alu);
}
break;
- case 0x0c: /* MOV RAM->BRAM */
+ case 0x0c: /* MOV RAM->BRAM */
{
GETBRAM()[r2] = GETARAM()[r1];
ALU(cpustate, alu);
}
break;
- case 0x1d: /* MOV RAM->Reg */
+ case 0x1d: /* MOV RAM->Reg */
{
if ( r1 & 0x180 )
{
@@ -1061,7 +1061,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x1f: /* MOV Reg->Reg */
+ case 0x1f: /* MOV Reg->Reg */
{
if ( r1 == 0x10 && r2 == 0xf )
{
@@ -1082,7 +1082,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x0f: /* MOV RAMInd->BRAMInd */
+ case 0x0f: /* MOV RAMInd->BRAMInd */
{
val = GETARAM()[INDIRECT(cpustate,r1,1)];
ALU(cpustate, alu);
@@ -1090,7 +1090,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x13: /* MOV BRAMInd->RAMInd */
+ case 0x13: /* MOV BRAMInd->RAMInd */
{
val = GETBRAM()[INDIRECT(cpustate,r1,1)];
ALU(cpustate, alu);
@@ -1098,7 +1098,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x10: /* MOV RAMInd->RAM */
+ case 0x10: /* MOV RAMInd->RAM */
{
val = GETBRAM()[INDIRECT(cpustate,r1,1)];
ALU(cpustate, alu);
@@ -1106,9 +1106,9 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x1e: /* External->Reg */
+ case 0x1e: /* External->Reg */
{
- UINT32 offset;
+ UINT32 offset;
if ( ( r2 >> 6 ) & 1 )
offset = INDIRECT(cpustate,r1,1);
@@ -1121,7 +1121,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x03: /* RAM->External Ind */
+ case 0x03: /* RAM->External Ind */
{
val = GETARAM()[r1];
ALU(cpustate, alu);
@@ -1129,7 +1129,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x07: /* RAMInd->External */
+ case 0x07: /* RAMInd->External */
{
val = GETARAM()[INDIRECT(cpustate,r1,1)];
ALU(cpustate, alu);
@@ -1137,7 +1137,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x08: /* External->RAM */
+ case 0x08: /* External->RAM */
{
val = GETEXTERNAL(cpustate, GETEB(),INDIRECT(cpustate,r1,1));
ALU(cpustate, alu);
@@ -1145,7 +1145,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x0b: /* External->RAMInd */
+ case 0x0b: /* External->RAMInd */
{
val = GETEXTERNAL(cpustate, GETEB(),INDIRECT(cpustate,r1,1));
ALU(cpustate, alu);
@@ -1160,10 +1160,10 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x0e: /* LDIMM24 */
+ case 0x0e: /* LDIMM24 */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffffff;
/* sign extend 24->32 */
if ( imm & 0x800000 )
@@ -1190,16 +1190,16 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x0f: /* REP/CLEAR/FLAGS */
+ case 0x0f: /* REP/CLEAR/FLAGS */
{
- UINT32 alu = ( opcode >> 20 ) & 0x1f;
- UINT32 sub2 = ( opcode >> 16 ) & 0x0f;
+ UINT32 alu = ( opcode >> 20 ) & 0x1f;
+ UINT32 sub2 = ( opcode >> 16 ) & 0x0f;
ALU(cpustate, alu );
- if( sub2 == 0x00 ) /* CLEAR reg */
+ if( sub2 == 0x00 ) /* CLEAR reg */
{
- UINT32 reg = opcode & 0x1f;
+ UINT32 reg = opcode & 0x1f;
switch( reg )
{
@@ -1216,9 +1216,9 @@ static CPU_EXECUTE( mb86233 )
break;
}
}
- else if ( sub2 == 0x04 ) /* REP xxx */
+ else if ( sub2 == 0x04 ) /* REP xxx */
{
- UINT32 sub3 = ( opcode >> 12 ) & 0x0f;
+ UINT32 sub3 = ( opcode >> 12 ) & 0x0f;
if ( sub3 == 0 )
{
@@ -1235,30 +1235,30 @@ static CPU_EXECUTE( mb86233 )
GETPC()++;
}
}
- else if ( sub2 == 0x02 ) /* CLRFLAGS */
+ else if ( sub2 == 0x02 ) /* CLRFLAGS */
{
GETSR() &= ~(opcode&0xfff);
}
- else if ( sub2 == 0x06 ) /* SETFLAGS */
+ else if ( sub2 == 0x06 ) /* SETFLAGS */
{
GETSR() |= (opcode&0xfff);
}
}
break;
- case 0x10: /* LDIMM rx */
+ case 0x10: /* LDIMM rx */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffff;
GETGPR(sub) = imm;
}
break;
- case 0x13: /* LDIMM r1x */
+ case 0x13: /* LDIMM r1x */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffffff;
if ( sub == 0 ) /* R12 */
GETGPR(12) = imm & 0xff;
@@ -1269,10 +1269,10 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x14: /* LDIMM m,e */
+ case 0x14: /* LDIMM m,e */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffffff;
if ( sub == 0 ) /* A */
{
@@ -1295,10 +1295,10 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x15: /* LDIMM m,e */
+ case 0x15: /* LDIMM m,e */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffffff;
if ( sub == 0 ) /* B.e again? */
{
@@ -1323,10 +1323,10 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x16: /* LDIMM m,e */
+ case 0x16: /* LDIMM m,e */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffffff;
if ( sub == 1 ) /* clear + D.m */
{
@@ -1349,10 +1349,10 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x17: /* LDIMM special reg */
+ case 0x17: /* LDIMM special reg */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffffff;
if ( sub == 0x03 )
{
@@ -1365,10 +1365,10 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x18: /* LDIMM external reg */
+ case 0x18: /* LDIMM external reg */
{
- UINT32 sub = (opcode>>24) & 0x03;
- UINT32 imm = opcode & 0xffffff;
+ UINT32 sub = (opcode>>24) & 0x03;
+ UINT32 imm = opcode & 0xffffff;
if ( sub == 0x03 )
{
@@ -1381,7 +1381,7 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x1d: //LDIMM to Rep regs
+ case 0x1d: //LDIMM to Rep regs
{
UINT32 sub = (opcode>>24)&0x3;
UINT32 imm = opcode&0xffffff;
@@ -1396,21 +1396,21 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x2f: /* Conditional Branches */
+ case 0x2f: /* Conditional Branches */
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ UINT32 cond = ( opcode >> 20 ) & 0x1f;
+ UINT32 subtype = ( opcode >> 16 ) & 0x0f;
+ UINT32 data = opcode & 0xffff;
if( COND(cpustate, cond) )
{
switch( subtype )
{
- case 0x00: /* BRIF <addr> */
+ case 0x00: /* BRIF <addr> */
GETPC() = data - 1;
break;
- case 0x02: /* BRIF indirect */
+ case 0x02: /* BRIF indirect */
if ( data & 0x4000 )
data = GETREGS(cpustate,data&0x3f,0) - 1;
else
@@ -1423,13 +1423,13 @@ static CPU_EXECUTE( mb86233 )
GETPC() = data;
break;
- case 0x04: /* BSIF <addr> */
+ case 0x04: /* BSIF <addr> */
GETPCS()[GETPCSP()] = GETPC();
GETPCSP()++;
GETPC() = data - 1;
break;
- case 0x06: /* BSIF indirect */
+ case 0x06: /* BSIF indirect */
GETPCS()[GETPCSP()] = GETPC();
GETPCSP()++;
if ( data & 0x4000 )
@@ -1444,16 +1444,16 @@ static CPU_EXECUTE( mb86233 )
GETPC() = data;
break;
- case 0x0a: /* RTIF */
+ case 0x0a: /* RTIF */
--GETPCSP();
GETPC() = GETPCS()[GETPCSP()];
break;
- case 0x0c: /* LDIF */
+ case 0x0c: /* LDIF */
SETREGS(cpustate,((data>>9)&0x3f), GETARAM()[data&0x1FF] );
break;
- case 0x0e: /* RIIF */
+ case 0x0e: /* RIIF */
logerror( "TGP: RIIF unimplemented at PC:%04x\n", GETPC() );
break;
@@ -1465,21 +1465,21 @@ static CPU_EXECUTE( mb86233 )
}
break;
- case 0x3f: /* Inverse Conditional Branches */
+ case 0x3f: /* Inverse Conditional Branches */
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ UINT32 cond = ( opcode >> 20 ) & 0x1f;
+ UINT32 subtype = ( opcode >> 16 ) & 0x0f;
+ UINT32 data = opcode & 0xffff;
if( !COND(cpustate, cond) )
{
switch( subtype )
{
- case 0x00: /* BRUL <addr> */
+ case 0x00: /* BRUL <addr> */
GETPC() = data - 1;
break;
- case 0x02: /* BRUL indirect */
+ case 0x02: /* BRUL indirect */
if ( data & 0x4000 )
data = GETREGS(cpustate,data&0x3f,0) - 1;
else
@@ -1492,13 +1492,13 @@ static CPU_EXECUTE( mb86233 )
GETPC() = data;
break;
- case 0x04: /* BSUL <addr> */
+ case 0x04: /* BSUL <addr> */
GETPCS()[GETPCSP()] = GETPC();
GETPCSP()++;
GETPC() = data - 1;
break;
- case 0x06: /* BSUL indirect */
+ case 0x06: /* BSUL indirect */
GETPCS()[GETPCSP()] = GETPC();
GETPCSP()++;
if ( data & 0x4000 )
@@ -1513,16 +1513,16 @@ static CPU_EXECUTE( mb86233 )
GETPC() = data;
break;
- case 0x0a: /* RTUL */
+ case 0x0a: /* RTUL */
--GETPCSP();
GETPC() = GETPCS()[GETPCSP()];
break;
- case 0x0c: /* LDUL */
+ case 0x0c: /* LDUL */
SETREGS(cpustate,((data>>9)&0x3f), GETARAM()[data&0x1FF] );
break;
- case 0x0e: /* RIUL */
+ case 0x0e: /* RIUL */
logerror( "TGP: RIIF unimplemented at PC:%04x\n", GETPC() );
break;
@@ -1566,33 +1566,33 @@ static CPU_SET_INFO( mb86233 )
switch (state)
{
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + MB86233_PC: GETPC() = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_A: GETA().u = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_B: GETB().u = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_P: GETP().u = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_D: GETD().u = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_REP: GETREPS() = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_PC: GETPC() = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_A: GETA().u = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_B: GETB().u = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_P: GETP().u = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_D: GETD().u = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_REP: GETREPS() = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + MB86233_SP: GETPCSP() = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_EB: GETEB() = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_SHIFT: GETSHIFT() = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_FLAGS: GETSR() = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R0: GETGPR(0) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R1: GETGPR(1) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R2: GETGPR(2) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R3: GETGPR(3) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R4: GETGPR(4) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R5: GETGPR(5) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R6: GETGPR(6) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R7: GETGPR(7) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R8: GETGPR(8) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R9: GETGPR(9) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R10: GETGPR(10) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R11: GETGPR(11) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R12: GETGPR(12) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R13: GETGPR(13) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R14: GETGPR(14) = info->i; break;
- case CPUINFO_INT_REGISTER + MB86233_R15: GETGPR(15) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_SP: GETPCSP() = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_EB: GETEB() = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_SHIFT: GETSHIFT() = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_FLAGS: GETSR() = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R0: GETGPR(0) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R1: GETGPR(1) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R2: GETGPR(2) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R3: GETGPR(3) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R4: GETGPR(4) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R5: GETGPR(5) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R6: GETGPR(6) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R7: GETGPR(7) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R8: GETGPR(8) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R9: GETGPR(9) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R10: GETGPR(10) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R11: GETGPR(11) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R12: GETGPR(12) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R13: GETGPR(13) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R14: GETGPR(14) = info->i; break;
+ case CPUINFO_INT_REGISTER + MB86233_R15: GETGPR(15) = info->i; break;
}
}
@@ -1607,108 +1607,108 @@ CPU_GET_INFO( mb86233 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mb86233_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -2; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mb86233_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -2; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + MB86233_PC: info->i = GETPC(); break;
- case CPUINFO_INT_REGISTER + MB86233_A: info->i = GETA().u; break;
- case CPUINFO_INT_REGISTER + MB86233_B: info->i = GETB().u; break;
- case CPUINFO_INT_REGISTER + MB86233_P: info->i = GETP().u; break;
- case CPUINFO_INT_REGISTER + MB86233_D: info->i = GETD().u; break;
- case CPUINFO_INT_REGISTER + MB86233_REP: info->i = GETREPS(); break;
+ case CPUINFO_INT_REGISTER + MB86233_PC: info->i = GETPC(); break;
+ case CPUINFO_INT_REGISTER + MB86233_A: info->i = GETA().u; break;
+ case CPUINFO_INT_REGISTER + MB86233_B: info->i = GETB().u; break;
+ case CPUINFO_INT_REGISTER + MB86233_P: info->i = GETP().u; break;
+ case CPUINFO_INT_REGISTER + MB86233_D: info->i = GETD().u; break;
+ case CPUINFO_INT_REGISTER + MB86233_REP: info->i = GETREPS(); break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + MB86233_SP: info->i = GETPCSP(); break;
- case CPUINFO_INT_REGISTER + MB86233_EB: info->i = GETEB(); break;
- case CPUINFO_INT_REGISTER + MB86233_SHIFT: info->i = GETSHIFT(); break;
- case CPUINFO_INT_REGISTER + MB86233_FLAGS: info->i = GETSR(); break;
- case CPUINFO_INT_REGISTER + MB86233_R0: info->i = GETGPR(0); break;
- case CPUINFO_INT_REGISTER + MB86233_R1: info->i = GETGPR(1); break;
- case CPUINFO_INT_REGISTER + MB86233_R2: info->i = GETGPR(2); break;
- case CPUINFO_INT_REGISTER + MB86233_R3: info->i = GETGPR(3); break;
- case CPUINFO_INT_REGISTER + MB86233_R4: info->i = GETGPR(4); break;
- case CPUINFO_INT_REGISTER + MB86233_R5: info->i = GETGPR(5); break;
- case CPUINFO_INT_REGISTER + MB86233_R6: info->i = GETGPR(6); break;
- case CPUINFO_INT_REGISTER + MB86233_R7: info->i = GETGPR(7); break;
- case CPUINFO_INT_REGISTER + MB86233_R8: info->i = GETGPR(8); break;
- case CPUINFO_INT_REGISTER + MB86233_R9: info->i = GETGPR(9); break;
- case CPUINFO_INT_REGISTER + MB86233_R10: info->i = GETGPR(10); break;
- case CPUINFO_INT_REGISTER + MB86233_R11: info->i = GETGPR(11); break;
- case CPUINFO_INT_REGISTER + MB86233_R12: info->i = GETGPR(12); break;
- case CPUINFO_INT_REGISTER + MB86233_R13: info->i = GETGPR(13); break;
- case CPUINFO_INT_REGISTER + MB86233_R14: info->i = GETGPR(14); break;
- case CPUINFO_INT_REGISTER + MB86233_R15: info->i = GETGPR(15); break;
+ case CPUINFO_INT_REGISTER + MB86233_SP: info->i = GETPCSP(); break;
+ case CPUINFO_INT_REGISTER + MB86233_EB: info->i = GETEB(); break;
+ case CPUINFO_INT_REGISTER + MB86233_SHIFT: info->i = GETSHIFT(); break;
+ case CPUINFO_INT_REGISTER + MB86233_FLAGS: info->i = GETSR(); break;
+ case CPUINFO_INT_REGISTER + MB86233_R0: info->i = GETGPR(0); break;
+ case CPUINFO_INT_REGISTER + MB86233_R1: info->i = GETGPR(1); break;
+ case CPUINFO_INT_REGISTER + MB86233_R2: info->i = GETGPR(2); break;
+ case CPUINFO_INT_REGISTER + MB86233_R3: info->i = GETGPR(3); break;
+ case CPUINFO_INT_REGISTER + MB86233_R4: info->i = GETGPR(4); break;
+ case CPUINFO_INT_REGISTER + MB86233_R5: info->i = GETGPR(5); break;
+ case CPUINFO_INT_REGISTER + MB86233_R6: info->i = GETGPR(6); break;
+ case CPUINFO_INT_REGISTER + MB86233_R7: info->i = GETGPR(7); break;
+ case CPUINFO_INT_REGISTER + MB86233_R8: info->i = GETGPR(8); break;
+ case CPUINFO_INT_REGISTER + MB86233_R9: info->i = GETGPR(9); break;
+ case CPUINFO_INT_REGISTER + MB86233_R10: info->i = GETGPR(10); break;
+ case CPUINFO_INT_REGISTER + MB86233_R11: info->i = GETGPR(11); break;
+ case CPUINFO_INT_REGISTER + MB86233_R12: info->i = GETGPR(12); break;
+ case CPUINFO_INT_REGISTER + MB86233_R13: info->i = GETGPR(13); break;
+ case CPUINFO_INT_REGISTER + MB86233_R14: info->i = GETGPR(14); break;
+ case CPUINFO_INT_REGISTER + MB86233_R15: info->i = GETGPR(15); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mb86233); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mb86233); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mb86233); break;
- case CPUINFO_FCT_EXIT: info->exit = NULL; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb86233); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mb86233); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mb86233); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mb86233); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mb86233); break;
+ case CPUINFO_FCT_EXIT: info->exit = NULL; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb86233); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mb86233); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MB86233"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Fujitsu MB86233"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miguel Angel Horna and Ernesto Corvi"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MB86233"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Fujitsu MB86233"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miguel Angel Horna and Ernesto Corvi"); break;
case CPUINFO_STR_FLAGS:
- sprintf(info->s, "%c%c", (GETSR()&SIGN_FLAG) ? 'N' : 'n', (GETSR()&ZERO_FLAG) ? 'Z' : 'z' );
- break;
-
- case CPUINFO_STR_REGISTER + MB86233_FLAGS:
- sprintf(info->s, "FL:%c%c", (GETSR()&SIGN_FLAG) ? 'N' : 'n', (GETSR()&ZERO_FLAG) ? 'Z' : 'z' );
- break;
-
- case CPUINFO_STR_REGISTER + MB86233_PC: sprintf(info->s, "PC:%04X", GETPC()); break;
- case CPUINFO_STR_REGISTER + MB86233_A: sprintf(info->s, "PA:%08X (%f)", GETA().u, GETA().f); break;
- case CPUINFO_STR_REGISTER + MB86233_B: sprintf(info->s, "PB:%08X (%f)", GETB().u, GETB().f); break;
- case CPUINFO_STR_REGISTER + MB86233_P: sprintf(info->s, "PP:%08X (%f)", GETP().u, GETP().f); break;
- case CPUINFO_STR_REGISTER + MB86233_D: sprintf(info->s, "PD:%08X (%f)", GETD().u, GETD().f); break;
- case CPUINFO_STR_REGISTER + MB86233_REP: sprintf(info->s, "REPS:%08X", GETREPS()); break;
- case CPUINFO_STR_REGISTER + MB86233_SP: sprintf(info->s, "PCSP:%1X", GETPCSP()); break;
- case CPUINFO_STR_REGISTER + MB86233_EB: sprintf(info->s, "EB:%08X", GETEB()); break;
- case CPUINFO_STR_REGISTER + MB86233_SHIFT: sprintf(info->s, "SHIFT:%08X", GETSHIFT()); break;
- case CPUINFO_STR_REGISTER + MB86233_R0: sprintf(info->s, "R0:%08X", GETGPR(0)); break;
- case CPUINFO_STR_REGISTER + MB86233_R1: sprintf(info->s, "R1:%08X", GETGPR(1)); break;
- case CPUINFO_STR_REGISTER + MB86233_R2: sprintf(info->s, "R2:%08X", GETGPR(2)); break;
- case CPUINFO_STR_REGISTER + MB86233_R3: sprintf(info->s, "R3:%08X", GETGPR(3)); break;
- case CPUINFO_STR_REGISTER + MB86233_R4: sprintf(info->s, "R4:%08X", GETGPR(4)); break;
- case CPUINFO_STR_REGISTER + MB86233_R5: sprintf(info->s, "R5:%08X", GETGPR(5)); break;
- case CPUINFO_STR_REGISTER + MB86233_R6: sprintf(info->s, "R6:%08X", GETGPR(6)); break;
- case CPUINFO_STR_REGISTER + MB86233_R7: sprintf(info->s, "R7:%08X", GETGPR(7)); break;
- case CPUINFO_STR_REGISTER + MB86233_R8: sprintf(info->s, "R8:%08X", GETGPR(8)); break;
- case CPUINFO_STR_REGISTER + MB86233_R9: sprintf(info->s, "R9:%08X", GETGPR(9)); break;
- case CPUINFO_STR_REGISTER + MB86233_R10: sprintf(info->s, "R10:%08X", GETGPR(10)); break;
- case CPUINFO_STR_REGISTER + MB86233_R11: sprintf(info->s, "R11:%08X", GETGPR(11)); break;
- case CPUINFO_STR_REGISTER + MB86233_R12: sprintf(info->s, "R12:%08X", GETGPR(12)); break;
- case CPUINFO_STR_REGISTER + MB86233_R13: sprintf(info->s, "R13:%08X", GETGPR(13)); break;
- case CPUINFO_STR_REGISTER + MB86233_R14: sprintf(info->s, "R14:%08X", GETGPR(14)); break;
- case CPUINFO_STR_REGISTER + MB86233_R15: sprintf(info->s, "R15:%08X", GETGPR(15)); break;
+ sprintf(info->s, "%c%c", (GETSR()&SIGN_FLAG) ? 'N' : 'n', (GETSR()&ZERO_FLAG) ? 'Z' : 'z' );
+ break;
+
+ case CPUINFO_STR_REGISTER + MB86233_FLAGS:
+ sprintf(info->s, "FL:%c%c", (GETSR()&SIGN_FLAG) ? 'N' : 'n', (GETSR()&ZERO_FLAG) ? 'Z' : 'z' );
+ break;
+
+ case CPUINFO_STR_REGISTER + MB86233_PC: sprintf(info->s, "PC:%04X", GETPC()); break;
+ case CPUINFO_STR_REGISTER + MB86233_A: sprintf(info->s, "PA:%08X (%f)", GETA().u, GETA().f); break;
+ case CPUINFO_STR_REGISTER + MB86233_B: sprintf(info->s, "PB:%08X (%f)", GETB().u, GETB().f); break;
+ case CPUINFO_STR_REGISTER + MB86233_P: sprintf(info->s, "PP:%08X (%f)", GETP().u, GETP().f); break;
+ case CPUINFO_STR_REGISTER + MB86233_D: sprintf(info->s, "PD:%08X (%f)", GETD().u, GETD().f); break;
+ case CPUINFO_STR_REGISTER + MB86233_REP: sprintf(info->s, "REPS:%08X", GETREPS()); break;
+ case CPUINFO_STR_REGISTER + MB86233_SP: sprintf(info->s, "PCSP:%1X", GETPCSP()); break;
+ case CPUINFO_STR_REGISTER + MB86233_EB: sprintf(info->s, "EB:%08X", GETEB()); break;
+ case CPUINFO_STR_REGISTER + MB86233_SHIFT: sprintf(info->s, "SHIFT:%08X", GETSHIFT()); break;
+ case CPUINFO_STR_REGISTER + MB86233_R0: sprintf(info->s, "R0:%08X", GETGPR(0)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R1: sprintf(info->s, "R1:%08X", GETGPR(1)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R2: sprintf(info->s, "R2:%08X", GETGPR(2)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R3: sprintf(info->s, "R3:%08X", GETGPR(3)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R4: sprintf(info->s, "R4:%08X", GETGPR(4)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R5: sprintf(info->s, "R5:%08X", GETGPR(5)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R6: sprintf(info->s, "R6:%08X", GETGPR(6)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R7: sprintf(info->s, "R7:%08X", GETGPR(7)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R8: sprintf(info->s, "R8:%08X", GETGPR(8)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R9: sprintf(info->s, "R9:%08X", GETGPR(9)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R10: sprintf(info->s, "R10:%08X", GETGPR(10)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R11: sprintf(info->s, "R11:%08X", GETGPR(11)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R12: sprintf(info->s, "R12:%08X", GETGPR(12)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R13: sprintf(info->s, "R13:%08X", GETGPR(13)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R14: sprintf(info->s, "R14:%08X", GETGPR(14)); break;
+ case CPUINFO_STR_REGISTER + MB86233_R15: sprintf(info->s, "R15:%08X", GETGPR(15)); break;
}
}
diff --git a/src/emu/cpu/mb86233/mb86233d.c b/src/emu/cpu/mb86233/mb86233d.c
index 40c41adb410..4d81970e1af 100644
--- a/src/emu/cpu/mb86233/mb86233d.c
+++ b/src/emu/cpu/mb86233/mb86233d.c
@@ -10,8 +10,8 @@ static char * COND(unsigned int cond)
bufindex &= 3;
- switch(cond)
- {
+ switch(cond)
+ {
case 0x16:
sprintf(buf,"always");
return buf;
@@ -39,9 +39,9 @@ static char * COND(unsigned int cond)
case 0x11:
sprintf(buf,"(--r13)!=0");
return buf;
- }
+ }
- sprintf(buf,"unk (%x)",cond);
+ sprintf(buf,"unk (%x)",cond);
return buf;
}
@@ -50,18 +50,18 @@ static char * REGS( UINT32 reg, int IsSource )
static char bufs[4][256];
static int bufindex = 0;
char *buf = &bufs[bufindex++][0];
- int mode = (reg >> 6 ) & 0x07;
+ int mode = (reg >> 6 ) & 0x07;
bufindex &= 3;
reg &= 0x3f;
if ( mode == 0 || mode == 1 || mode == 3 )
- {
- if ( reg < 0x10 )
+ {
+ if ( reg < 0x10 )
{
sprintf(buf,"r%d",reg);
- return buf;
+ return buf;
}
switch(reg)
@@ -138,7 +138,7 @@ static char * REGS( UINT32 reg, int IsSource )
sprintf(buf,"Unkreg (%x)",reg);
break;
}
- }
+ }
else if ( mode == 2 )
{
char *p = buf;
@@ -160,7 +160,7 @@ static char * REGS( UINT32 reg, int IsSource )
p += sprintf(p,"r3");
}
}
- else if ( mode == 6 )
+ else if ( mode == 6 )
{
char *p = buf;
@@ -183,26 +183,26 @@ static char * REGS( UINT32 reg, int IsSource )
p += sprintf(p,"--%d", 0x20 - ( reg & 0x1f ) );
else
p += sprintf(p,"++%d", reg & 0x1f );
- }
- else
- {
+ }
+ else
+ {
sprintf(buf,"UNKMOD %x (0x%x)", mode, reg);
- }
+ }
return buf;
}
static char * INDIRECT( UINT32 reg, int IsSource )
{
- static char bufs[4][256];
+ static char bufs[4][256];
static int bufindex = 0;
char *buf = &bufs[bufindex++][0];
- int mode = ( reg >> 6 ) & 0x07;
+ int mode = ( reg >> 6 ) & 0x07;
bufindex &= 3;
- if ( mode == 0 || mode == 3 || mode == 1)
- {
+ if ( mode == 0 || mode == 3 || mode == 1)
+ {
sprintf(buf,"0x%x",reg);
}
else if ( mode == 2 )
@@ -226,8 +226,8 @@ static char * INDIRECT( UINT32 reg, int IsSource )
p += sprintf(p,"r3");
}
}
- else if ( mode == 6 || mode == 7 )
- {
+ else if ( mode == 6 || mode == 7 )
+ {
char *p = buf;
if ( IsSource )
@@ -249,11 +249,11 @@ static char * INDIRECT( UINT32 reg, int IsSource )
p += sprintf(p,"--%d",0x20 - ( reg & 0x1f ));
else
p += sprintf(p,"++%d",reg & 0x1f);
- }
- else
- {
+ }
+ else
+ {
sprintf(buf,"UNKMOD %x (0x%x)", mode, reg);
- }
+ }
return buf;
}
@@ -267,108 +267,108 @@ static char * ALU( UINT32 alu)
bufindex &= 3;
- switch( alu )
- {
+ switch( alu )
+ {
case 0x0:
buf[0] = 0;
- break;
+ break;
case 0x1:
sprintf(buf,"d=d&a");
- break;
+ break;
case 0x2:
sprintf(buf,"d=d|a");
- break;
+ break;
- case 0x3:
+ case 0x3:
sprintf(buf,"d=d^a");
- break;
+ break;
case 0x5:
sprintf(buf,"cmp d,a");
- break;
+ break;
case 0x6:
sprintf(buf,"d=d+a");
- break;
+ break;
case 0x7:
sprintf(buf,"d=d-a");
- break;
+ break;
case 0x8:
sprintf(buf,"p=a*b");
- break;
+ break;
case 0x9:
sprintf(buf,"d=d+p, p=a*b");
- break;
+ break;
case 0xa:
sprintf(buf,"d=d-p, p=a*b");
- break;
+ break;
case 0xb:
sprintf(buf,"d=fabs d");
- break;
+ break;
case 0xc:
sprintf(buf,"d=d+p");
- break;
+ break;
case 0xd:
sprintf(buf,"d=p, p=a*b");
- break;
+ break;
case 0xe:
sprintf(buf,"d=float(d)");
- break;
+ break;
case 0xf:
sprintf(buf,"d=int(d)");
- break;
+ break;
case 0x10:
sprintf(buf,"d=d/a");
- break;
+ break;
case 0x11:
sprintf(buf,"d=-d");
- break;
+ break;
- case 0x13:
+ case 0x13:
sprintf(buf,"d=a+b");
- break;
+ break;
case 0x14:
sprintf(buf,"d=b-a");
- break;
+ break;
case 0x16:
sprintf(buf,"d=(lsr d,shift)");
- break;
+ break;
case 0x17:
sprintf(buf,"d=(lsl d,shift)");
- break;
+ break;
case 0x18:
sprintf(buf,"d=(asr d,shift)");
- break;
+ break;
case 0x1a:
sprintf(buf,"d=d+a (int)");
- break;
+ break;
case 0x1b:
sprintf(buf,"d=d-a (int)");
- break;
+ break;
default:
sprintf(buf,"ALU UNK(%x)",alu);
- break;
- }
+ break;
+ }
return buf;
}
@@ -376,11 +376,11 @@ static char * ALU( UINT32 alu)
static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
{
char *p = buffer;
- UINT32 grp = ( opcode >> 26 ) & 0x3f;
+ UINT32 grp = ( opcode >> 26 ) & 0x3f;
switch( grp )
{
- case 0x0: /* Dual move */
+ case 0x0: /* Dual move */
{
UINT32 r1=opcode & 0x1ff;
UINT32 r2=(opcode>>9) & 0x7f;
@@ -392,19 +392,19 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
switch( op )
{
- case 0x0c: /* a = RAM[addr], b = BRAM[addr] */
+ case 0x0c: /* a = RAM[addr], b = BRAM[addr] */
p += sprintf(p,"LAB RAM(0x%x)->a,BRAM(0x%x)->b",r1,r2);
break;
- case 0x0d: /* a = RAM[addr], b = BRAM[addr] */
+ case 0x0d: /* a = RAM[addr], b = BRAM[addr] */
p += sprintf(p,"LAB RAM(0x%x)->a,BRAM(%s)->b",r1,INDIRECT(r2|(2<<6),0));
break;
- case 0x0f: /* a = RAM[addr], b = BRAM[reg] */
+ case 0x0f: /* a = RAM[addr], b = BRAM[reg] */
p += sprintf(p,"LAB RAM(0x%x)->a,BRAM(%s)->b",r1,INDIRECT(r2|(6<<6),0));
break;
- case 0x10: /* a = BRAM[reg], b = RAM[addr] */
+ case 0x10: /* a = BRAM[reg], b = RAM[addr] */
p += sprintf(p,"LAB BRAM(%s)->a,RAM(0x%x)->b",INDIRECT(r1,1),r2);
break;
@@ -415,9 +415,9 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
}
break;
- case 0x7: /* LD/MOV */
+ case 0x7: /* LD/MOV */
{
- UINT32 r1=opcode & 0x1ff;
+ UINT32 r1=opcode & 0x1ff;
UINT32 r2=(opcode>>9) & 0x7f;
UINT32 alu=(opcode>>21) & 0x1f;
UINT32 op=(opcode>>16) & 0x1f;
@@ -430,35 +430,35 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
p += sprintf(p, ", ");
}
- switch(op)
- {
- case 0x03: /* RAM->External Indirect */
+ switch(op)
+ {
+ case 0x03: /* RAM->External Indirect */
{
p += sprintf(p,"MOV RAM(0x%x)->E(EB+%s)",r1,INDIRECT(r2|(6<<6),0));
}
break;
- case 0x04: /* MOV RAM->External */
+ case 0x04: /* MOV RAM->External */
{
p += sprintf(p,"MOV RAM(0x%x)->E(EB+0x%x)",r1,r2);
}
break;
- case 0x07: /* RAMInd->External */
+ case 0x07: /* RAMInd->External */
{
p += sprintf(p,"MOV RAM(%s)->E(EB+%s)",INDIRECT(r1,1),INDIRECT(r2|(6<<6),0));
}
- break;
+ break;
- case 0x08: /* External->RAM */
+ case 0x08: /* External->RAM */
{
p += sprintf(p,"MOV EXT(EB+");
p += sprintf(p,"%s",INDIRECT(r1,1));
- p += sprintf(p,")->RAM(0x%x)",r2);
+ p += sprintf(p,")->RAM(0x%x)",r2);
}
- break;
+ break;
- case 0x0b: /* External->RAMInd */
+ case 0x0b: /* External->RAMInd */
{
int mode = ( r1 >> 6 ) & 0x07;
@@ -472,23 +472,23 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
if ( mode == 0 || mode == 3 || mode == 1)
p += sprintf(p,")");
- p += sprintf(p,")->RAM(%s)",INDIRECT(r2|(6<<6),0));
+ p += sprintf(p,")->RAM(%s)",INDIRECT(r2|(6<<6),0));
}
- break;
+ break;
- case 0x0c: /* MOV RAM->BRAM */
+ case 0x0c: /* MOV RAM->BRAM */
p += sprintf(p,"MOV RAM(0x%x)->BRAM(0x%x)",r1,r2);
break;
- case 0x0f: /* MOV RAMInd->BRAMInd */
+ case 0x0f: /* MOV RAMInd->BRAMInd */
p += sprintf(p,"MOV RAM(%s)->BRAM(%s)",INDIRECT(r1,1),INDIRECT(r2|(6<<6),0));
break;
- case 0x10: /* MOV BRAMInd->RAM */
+ case 0x10: /* MOV BRAMInd->RAM */
p += sprintf(p,"MOV BRAM(%s)->RAM(0x%x)",INDIRECT(r1,1),r2);
break;
- case 0x13: /* MOV BRAMInd->RAMInd */
+ case 0x13: /* MOV BRAMInd->RAMInd */
p += sprintf(p,"MOV BRAM(%s)->RAM(%s)",INDIRECT(r1,1),INDIRECT(r2|(6<<6),0));
break;
@@ -501,9 +501,9 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
{
p += sprintf(p,"MOV %s->RAM(%s)",REGS(r2,1),INDIRECT(r1,0));
}
- break;
+ break;
- case 0x1d: /* MOV RAM->Reg */
+ case 0x1d: /* MOV RAM->Reg */
{
if ( r1 & 0x180 )
{
@@ -514,16 +514,16 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
p += sprintf(p,"MOV RAM(0x%x)->%s",r1,REGS(r2,0));
}
}
- break;
+ break;
- case 0x1e: /* External->Reg */
+ case 0x1e: /* External->Reg */
{
- int mode2 = (r2 >> 6) & 1;
+ int mode2 = (r2 >> 6) & 1;
p += sprintf(p,"MOV EXT(EB+%s)->%s",INDIRECT(r1,mode2),REGS(r2,0));
}
- break;
+ break;
- case 0x1f: /* MOV Reg->Reg */
+ case 0x1f: /* MOV Reg->Reg */
if ( !(r1 == 0x10 && r2 == 0x0f) )
{
p += sprintf(p,"MOV %s->%s",REGS(r1,1),REGS(r2,0));
@@ -532,12 +532,12 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
default:
p += sprintf(p,"UNKMV (0x%x)",op);
- break;
- }
+ break;
+ }
}
break;
- case 0x0e: /* Load 24 bit val */
+ case 0x0e: /* Load 24 bit val */
{
UINT32 sub=(opcode>>24)&0x3;
static const char regs[4] = { 'p', 'a', 'b', 'd' };
@@ -546,10 +546,10 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
}
break;
- case 0x0f: /* repeat */
+ case 0x0f: /* repeat */
{
- UINT32 alu = ( opcode >> 20 ) & 0x1f;
- UINT32 sub2 = ( opcode >> 16 ) & 0x0f;
+ UINT32 alu = ( opcode >> 20 ) & 0x1f;
+ UINT32 sub2 = ( opcode >> 16 ) & 0x0f;
if ( alu != 0 )
p += sprintf(p, "%s, ", ALU(alu) );
@@ -580,14 +580,14 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
}
break;
- case 0x10:
+ case 0x10:
{
- UINT32 dst=(opcode>>24)&0xf;
- UINT32 imm=(opcode)&0xFFFF;
+ UINT32 dst=(opcode>>24)&0xf;
+ UINT32 imm=(opcode)&0xFFFF;
- if ( dst <= 3 )
+ if ( dst <= 3 )
p += sprintf(p,"LDIMM 0x%x->r%d",imm,dst);
- else
+ else
p += sprintf(p,"LDIMM 0x%x->UNKDST(0x%x)",imm,dst);
}
break;
@@ -596,7 +596,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
{
UINT32 sub = ( opcode >> 24 ) & 0x03;
- p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
+ p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
if ( sub == 0 ) p += sprintf(p,"r12");
else if ( sub == 1 ) p += sprintf(p,"r13");
@@ -621,7 +621,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
{
UINT32 sub = ( opcode >> 24 ) & 0x03;
- p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
+ p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
if ( sub == 0 ) p += sprintf(p,"b.exp");
else if ( sub == 1 ) p += sprintf(p,"b.e");
@@ -632,7 +632,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0x16:
{
- UINT32 sub = ( opcode >> 24 ) & 0x03;
+ UINT32 sub = ( opcode >> 24 ) & 0x03;
p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
@@ -646,7 +646,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
{
UINT32 sub = ( opcode >> 24 ) & 0x03;
- p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
+ p += sprintf(p,"LDIMM 0x%X->",opcode&0xffffff);
if ( sub == 0x03 ) p += sprintf(p,"shift");
else p += sprintf(p,"UNKREG(%x)", sub);
@@ -664,17 +664,17 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
}
break;
- case 0x2f:
+ case 0x2f:
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ UINT32 cond = ( opcode >> 20 ) & 0x1f;
+ UINT32 subtype = ( opcode >> 16 ) & 0x0f;
+ UINT32 data = opcode & 0xffff;
- switch( subtype )
- {
+ switch( subtype )
+ {
case 0:
p += sprintf(p,"BRIF %s 0x%X", COND(cond), data);
- break;
+ break;
case 2:
p += sprintf(p,"BRIF %s ", COND(cond));
@@ -682,11 +682,11 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
p += sprintf(p,"%s",REGS(data&0x3f,0));
else
p += sprintf(p,"RAM(0x%x)",data);
- break;
+ break;
case 4:
p += sprintf(p,"BSIF %s 0x%X", COND(cond), data);
- break;
+ break;
case 0x6:
p += sprintf(p,"BSIF %s ", COND(cond));
@@ -698,7 +698,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0xa:
p += sprintf(p,"RTIF %s", COND(cond));
- break;
+ break;
case 0xc:
p += sprintf(p,"LDIF %s RAM(0x%x)->%s", COND(cond),data&0x1ff,REGS((data>>9)&0x3f,0));
@@ -706,26 +706,26 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0xe:
p += sprintf(p,"RIIF %s", COND(cond));
- break;
+ break;
default:
p += sprintf(p,"UNKG5 (%x cond %x)",subtype,cond);
- break;
- }
+ break;
+ }
}
break;
case 0x3f:
{
- UINT32 cond = ( opcode >> 20 ) & 0x1f;
- UINT32 subtype = ( opcode >> 16 ) & 0x0f;
- UINT32 data = opcode & 0xffff;
+ UINT32 cond = ( opcode >> 20 ) & 0x1f;
+ UINT32 subtype = ( opcode >> 16 ) & 0x0f;
+ UINT32 data = opcode & 0xffff;
- switch( subtype )
- {
+ switch( subtype )
+ {
case 0:
p += sprintf(p,"BRUL %s 0x%X", COND(cond), data);
- break;
+ break;
case 2:
p += sprintf(p,"BRUL %s ", COND(cond));
@@ -733,11 +733,11 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
p += sprintf(p,"%s",REGS(data&0x3f,0));
else
p += sprintf(p,"RAM(0x%x)",data);
- break;
+ break;
case 4:
p += sprintf(p,"BSUL %s 0x%X", COND(cond), data);
- break;
+ break;
case 0x6:
p += sprintf(p,"BSUL %s ", COND(cond));
@@ -749,7 +749,7 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0xa:
p += sprintf(p,"RTUL %s", COND(cond));
- break;
+ break;
case 0xc:
p += sprintf(p,"LDUL %s RAM(0x%x)->%s", COND(cond),data&0x1ff,REGS((data>>9)&0x3f,0));
@@ -757,12 +757,12 @@ static unsigned dasm_mb86233(char *buffer, UINT32 opcode )
case 0xe:
p += sprintf(p,"RIUL %s", COND(cond));
- break;
+ break;
default:
p += sprintf(p,"UNKG5 (%x cond %x)",subtype,cond);
- break;
- }
+ break;
+ }
}
break;
diff --git a/src/emu/cpu/mb88xx/mb88xx.c b/src/emu/cpu/mb88xx/mb88xx.c
index 9d5227d5ee7..b89d3ff7527 100644
--- a/src/emu/cpu/mb88xx/mb88xx.c
+++ b/src/emu/cpu/mb88xx/mb88xx.c
@@ -22,14 +22,14 @@
CONSTANTS
***************************************************************************/
-#define SERIAL_PRESCALE 6 /* guess */
-#define TIMER_PRESCALE 32 /* guess */
+#define SERIAL_PRESCALE 6 /* guess */
+#define TIMER_PRESCALE 32 /* guess */
-#define SERIAL_DISABLE_THRESH 1000 /* at this value, we give up driving the serial port */
+#define SERIAL_DISABLE_THRESH 1000 /* at this value, we give up driving the serial port */
-#define INT_CAUSE_SERIAL 0x01
-#define INT_CAUSE_TIMER 0x02
-#define INT_CAUSE_EXTERNAL 0x04
+#define INT_CAUSE_SERIAL 0x01
+#define INT_CAUSE_TIMER 0x02
+#define INT_CAUSE_EXTERNAL 0x04
@@ -39,56 +39,56 @@
struct mb88_state
{
- UINT8 PC; /* Program Counter: 6 bits */
- UINT8 PA; /* Page Address: 4 bits */
- UINT16 SP[4]; /* Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq */
- UINT8 SI; /* Stack index: 2 bits */
- UINT8 A; /* Accumulator: 4 bits */
- UINT8 X; /* Index X: 4 bits */
- UINT8 Y; /* Index Y: 4 bits */
- UINT8 st; /* State flag: 1 bit */
- UINT8 zf; /* Zero flag: 1 bit */
- UINT8 cf; /* Carry flag: 1 bit */
- UINT8 vf; /* Timer overflow flag: 1 bit */
- UINT8 sf; /* Serial Full/Empty flag: 1 bit */
- UINT8 nf; /* Interrupt flag: 1 bit */
-
- /* Peripheral Control */
- UINT8 pio; /* Peripheral enable bits: 8 bits */
-
- /* Timer registers */
- UINT8 TH; /* Timer High: 4 bits */
- UINT8 TL; /* Timer Low: 4 bits */
- UINT8 TP; /* Timer Prescale: 6 bits? */
- UINT8 ctr; /* current external counter value */
-
- /* Serial registers */
- UINT8 SB; /* Serial buffer: 4 bits */
- UINT16 SBcount; /* number of bits received */
- emu_timer *serial;
-
- /* PLA configuration */
- UINT8 * PLA;
-
- /* IRQ handling */
- UINT8 pending_interrupt;
- device_irq_acknowledge_callback irqcallback;
- legacy_cpu_device *device;
- address_space *program;
- direct_read_data *direct;
- address_space *data;
- address_space *io;
- int icount;
+ UINT8 PC; /* Program Counter: 6 bits */
+ UINT8 PA; /* Page Address: 4 bits */
+ UINT16 SP[4]; /* Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq */
+ UINT8 SI; /* Stack index: 2 bits */
+ UINT8 A; /* Accumulator: 4 bits */
+ UINT8 X; /* Index X: 4 bits */
+ UINT8 Y; /* Index Y: 4 bits */
+ UINT8 st; /* State flag: 1 bit */
+ UINT8 zf; /* Zero flag: 1 bit */
+ UINT8 cf; /* Carry flag: 1 bit */
+ UINT8 vf; /* Timer overflow flag: 1 bit */
+ UINT8 sf; /* Serial Full/Empty flag: 1 bit */
+ UINT8 nf; /* Interrupt flag: 1 bit */
+
+ /* Peripheral Control */
+ UINT8 pio; /* Peripheral enable bits: 8 bits */
+
+ /* Timer registers */
+ UINT8 TH; /* Timer High: 4 bits */
+ UINT8 TL; /* Timer Low: 4 bits */
+ UINT8 TP; /* Timer Prescale: 6 bits? */
+ UINT8 ctr; /* current external counter value */
+
+ /* Serial registers */
+ UINT8 SB; /* Serial buffer: 4 bits */
+ UINT16 SBcount; /* number of bits received */
+ emu_timer *serial;
+
+ /* PLA configuration */
+ UINT8 * PLA;
+
+ /* IRQ handling */
+ UINT8 pending_interrupt;
+ device_irq_acknowledge_callback irqcallback;
+ legacy_cpu_device *device;
+ address_space *program;
+ direct_read_data *direct;
+ address_space *data;
+ address_space *io;
+ int icount;
};
INLINE mb88_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == MB88 ||
- device->type() == MB8841 ||
- device->type() == MB8842 ||
- device->type() == MB8843 ||
- device->type() == MB8844);
+ device->type() == MB8841 ||
+ device->type() == MB8842 ||
+ device->type() == MB8843 ||
+ device->type() == MB8844);
return (mb88_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -98,33 +98,33 @@ static TIMER_CALLBACK( serial_timer );
MACROS
***************************************************************************/
-#define READOP(a) (cpustate->direct->read_decrypted_byte(a))
+#define READOP(a) (cpustate->direct->read_decrypted_byte(a))
-#define RDMEM(a) (cpustate->data->read_byte(a))
-#define WRMEM(a,v) (cpustate->data->write_byte((a), (v)))
+#define RDMEM(a) (cpustate->data->read_byte(a))
+#define WRMEM(a,v) (cpustate->data->write_byte((a), (v)))
-#define READPORT(a) (cpustate->io->read_byte(a))
-#define WRITEPORT(a,v) (cpustate->io->write_byte((a), (v)))
+#define READPORT(a) (cpustate->io->read_byte(a))
+#define WRITEPORT(a,v) (cpustate->io->write_byte((a), (v)))
-#define TEST_ST() (cpustate->st & 1)
-#define TEST_ZF() (cpustate->zf & 1)
-#define TEST_CF() (cpustate->cf & 1)
-#define TEST_VF() (cpustate->vf & 1)
-#define TEST_SF() (cpustate->sf & 1)
-#define TEST_NF() (cpustate->nf & 1)
+#define TEST_ST() (cpustate->st & 1)
+#define TEST_ZF() (cpustate->zf & 1)
+#define TEST_CF() (cpustate->cf & 1)
+#define TEST_VF() (cpustate->vf & 1)
+#define TEST_SF() (cpustate->sf & 1)
+#define TEST_NF() (cpustate->nf & 1)
-#define UPDATE_ST_C(v) cpustate->st=(v&0x10) ? 0 : 1
-#define UPDATE_ST_Z(v) cpustate->st=(v==0) ? 0 : 1
+#define UPDATE_ST_C(v) cpustate->st=(v&0x10) ? 0 : 1
+#define UPDATE_ST_Z(v) cpustate->st=(v==0) ? 0 : 1
-#define UPDATE_CF(v) cpustate->cf=((v&0x10)==0) ? 0 : 1
-#define UPDATE_ZF(v) cpustate->zf=(v!=0) ? 0 : 1
+#define UPDATE_CF(v) cpustate->cf=((v&0x10)==0) ? 0 : 1
+#define UPDATE_ZF(v) cpustate->zf=(v!=0) ? 0 : 1
-#define CYCLES(x) do { cpustate->icount -= (x); } while (0)
+#define CYCLES(x) do { cpustate->icount -= (x); } while (0)
-#define GETPC() (((int)cpustate->PA << 6)+cpustate->PC)
-#define GETEA() ((cpustate->X << 4)+cpustate->Y)
+#define GETPC() (((int)cpustate->PA << 6)+cpustate->PC)
+#define GETEA() ((cpustate->X << 4)+cpustate->Y)
-#define INCPC() do { cpustate->PC++; if ( cpustate->PC >= 0x40 ) { cpustate->PC = 0; cpustate->PA++; } } while (0)
+#define INCPC() do { cpustate->PC++; if ( cpustate->PC >= 0x40 ) { cpustate->PC = 0; cpustate->PA++; } } while (0)
/***************************************************************************
@@ -188,7 +188,7 @@ static CPU_RESET( mb88 )
cpustate->A = 0;
cpustate->X = 0;
cpustate->Y = 0;
- cpustate->st = 1; /* start off with st=1 */
+ cpustate->st = 1; /* start off with st=1 */
cpustate->zf = 0;
cpustate->cf = 0;
cpustate->vf = 0;
@@ -214,12 +214,12 @@ static TIMER_CALLBACK( serial_timer )
cpustate->SBcount++;
/* if we get too many interrupts with no servicing, disable the timer
- until somebody does something */
+ until somebody does something */
if (cpustate->SBcount >= SERIAL_DISABLE_THRESH)
cpustate->serial->adjust(attotime::never);
/* only read if not full; this is needed by the Namco 52xx to ensure that
- the program can write to S and recover the value even if serial is enabled */
+ the program can write to S and recover the value even if serial is enabled */
if (!cpustate->sf)
{
cpustate->SB = (cpustate->SB >> 1) | (READPORT(MB88_PORTSI) ? 8 : 0);
@@ -309,7 +309,7 @@ static void update_pio( mb88_state *cpustate, int cycles )
cpustate->SI = ( cpustate->SI + 1 ) & 3;
/* the datasheet doesn't mention interrupt vectors but
- the Arabian MCU program expects the following */
+ the Arabian MCU program expects the following */
if (cpustate->pending_interrupt & cpustate->pio & INT_CAUSE_EXTERNAL)
{
/* if we have a live external source, call the irqcallback */
@@ -726,30 +726,30 @@ static CPU_EXECUTE( mb88 )
cpustate->st = 1;
break;
- case 0x40: case 0x41: case 0x42: case 0x43: /* setD ZCS:... */
+ case 0x40: case 0x41: case 0x42: case 0x43: /* setD ZCS:... */
arg = READPORT(MB88_PORTR0);
arg |= (1 << (opcode&3));
WRITEPORT(MB88_PORTR0,arg);
cpustate->st = 1;
break;
- case 0x44: case 0x45: case 0x46: case 0x47: /* rstD ZCS:... */
+ case 0x44: case 0x45: case 0x46: case 0x47: /* rstD ZCS:... */
arg = READPORT(MB88_PORTR0);
arg &= ~(1 << (opcode&3));
WRITEPORT(MB88_PORTR0,arg);
cpustate->st = 1;
break;
- case 0x48: case 0x49: case 0x4a: case 0x4b: /* tstD ZCS:..x */
+ case 0x48: case 0x49: case 0x4a: case 0x4b: /* tstD ZCS:..x */
arg = READPORT(MB88_PORTR2);
cpustate->st = (arg & (1 << (opcode&3))) ? 0 : 1;
break;
- case 0x4c: case 0x4d: case 0x4e: case 0x4f: /* tba ZCS:..x */
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f: /* tba ZCS:..x */
cpustate->st = (cpustate->A & (1 << (opcode&3))) ? 0 : 1;
break;
- case 0x50: case 0x51: case 0x52: case 0x53: /* xd ZCS:x.. */
+ case 0x50: case 0x51: case 0x52: case 0x53: /* xd ZCS:x.. */
arg = RDMEM(opcode&3);
WRMEM((opcode&3),cpustate->A);
cpustate->A = arg;
@@ -757,7 +757,7 @@ static CPU_EXECUTE( mb88 )
cpustate->st = 1;
break;
- case 0x54: case 0x55: case 0x56: case 0x57: /* xyd ZCS:x.. */
+ case 0x54: case 0x55: case 0x56: case 0x57: /* xyd ZCS:x.. */
arg = RDMEM((opcode&3)+4);
WRMEM((opcode&3)+4,cpustate->Y);
cpustate->Y = arg;
@@ -765,15 +765,15 @@ static CPU_EXECUTE( mb88 )
cpustate->st = 1;
break;
- case 0x58: case 0x59: case 0x5a: case 0x5b:
- case 0x5c: case 0x5d: case 0x5e: case 0x5f: /* lxi ZCS:x.. */
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f: /* lxi ZCS:x.. */
cpustate->X = opcode & 7;
UPDATE_ZF(cpustate->X);
cpustate->st = 1;
break;
- case 0x60: case 0x61: case 0x62: case 0x63:
- case 0x64: case 0x65: case 0x66: case 0x67: /* call imm ZCS:..x */
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x65: case 0x66: case 0x67: /* call imm ZCS:..x */
arg = READOP(GETPC());
INCPC();
oc = 2;
@@ -787,8 +787,8 @@ static CPU_EXECUTE( mb88 )
cpustate->st = 1;
break;
- case 0x68: case 0x69: case 0x6a: case 0x6b:
- case 0x6c: case 0x6d: case 0x6e: case 0x6f: /* jpl imm ZCS:..x */
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f: /* jpl imm ZCS:..x */
arg = READOP(GETPC());
INCPC();
oc = 2;
@@ -800,10 +800,10 @@ static CPU_EXECUTE( mb88 )
cpustate->st = 1;
break;
- case 0x70: case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- case 0x78: case 0x79: case 0x7a: case 0x7b:
- case 0x7c: case 0x7d: case 0x7e: case 0x7f: /* ai ZCS:xxx */
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f: /* ai ZCS:xxx */
arg = opcode & 0x0f;
arg += cpustate->A;
UPDATE_ST_C(arg);
@@ -812,28 +812,28 @@ static CPU_EXECUTE( mb88 )
UPDATE_ZF(cpustate->A);
break;
- case 0x80: case 0x81: case 0x82: case 0x83:
- case 0x84: case 0x85: case 0x86: case 0x87:
- case 0x88: case 0x89: case 0x8a: case 0x8b:
- case 0x8c: case 0x8d: case 0x8e: case 0x8f: /* lxi ZCS:x.. */
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x85: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f: /* lxi ZCS:x.. */
cpustate->Y = opcode & 0x0f;
UPDATE_ZF(cpustate->Y);
cpustate->st = 1;
break;
- case 0x90: case 0x91: case 0x92: case 0x93:
- case 0x94: case 0x95: case 0x96: case 0x97:
- case 0x98: case 0x99: case 0x9a: case 0x9b:
- case 0x9c: case 0x9d: case 0x9e: case 0x9f: /* li ZCS:x.. */
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f: /* li ZCS:x.. */
cpustate->A = opcode & 0x0f;
UPDATE_ZF(cpustate->A);
cpustate->st = 1;
break;
- case 0xa0: case 0xa1: case 0xa2: case 0xa3:
- case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- case 0xa8: case 0xa9: case 0xaa: case 0xab:
- case 0xac: case 0xad: case 0xae: case 0xaf: /* cyi ZCS:xxx */
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ case 0xac: case 0xad: case 0xae: case 0xaf: /* cyi ZCS:xxx */
arg = (opcode & 0x0f) - cpustate->Y;
UPDATE_CF(arg);
arg &= 0x0f;
@@ -841,10 +841,10 @@ static CPU_EXECUTE( mb88 )
cpustate->zf = cpustate->st ^ 1;
break;
- case 0xb0: case 0xb1: case 0xb2: case 0xb3:
- case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- case 0xb8: case 0xb9: case 0xba: case 0xbb:
- case 0xbc: case 0xbd: case 0xbe: case 0xbf: /* ci ZCS:xxx */
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf: /* ci ZCS:xxx */
arg = (opcode & 0x0f) - cpustate->A;
UPDATE_CF(arg);
arg &= 0x0f;
@@ -900,14 +900,14 @@ static CPU_SET_INFO( mb88 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + MB88_IRQ_LINE: set_irq_line(cpustate, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MB88_IRQ_LINE: set_irq_line(cpustate, info->i); break;
case CPUINFO_INT_PC:
cpustate->PC = info->i & 0x3f;
cpustate->PA = (info->i >> 6) & 0x1f;
break;
- case CPUINFO_INT_REGISTER + MB88_PC: cpustate->PC = info->i; break;
- case CPUINFO_INT_REGISTER + MB88_PA: cpustate->PA = info->i; break;
+ case CPUINFO_INT_REGISTER + MB88_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + MB88_PA: cpustate->PA = info->i; break;
case CPUINFO_INT_REGISTER + MB88_FLAGS:
cpustate->st = (info->i & 0x01) ? 1 : 0;
cpustate->zf = (info->i & 0x02) ? 1 : 0;
@@ -917,14 +917,14 @@ static CPU_SET_INFO( mb88 )
cpustate->nf = (info->i & 0x20) ? 1 : 0;
break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + MB88_SI: cpustate->SI = info->i & 0x03; break;
- case CPUINFO_INT_REGISTER + MB88_A: cpustate->A = info->i & 0x0f; break;
- case CPUINFO_INT_REGISTER + MB88_X: cpustate->X = info->i & 0x0f; break;
- case CPUINFO_INT_REGISTER + MB88_Y: cpustate->Y = info->i & 0x0f; break;
- case CPUINFO_INT_REGISTER + MB88_PIO: cpustate->pio = info->i & 0xff; break;
- case CPUINFO_INT_REGISTER + MB88_TH: cpustate->TH = info->i & 0x0f; break;
- case CPUINFO_INT_REGISTER + MB88_TL: cpustate->TL = info->i & 0x0f; break;
- case CPUINFO_INT_REGISTER + MB88_SB: cpustate->SB = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + MB88_SI: cpustate->SI = info->i & 0x03; break;
+ case CPUINFO_INT_REGISTER + MB88_A: cpustate->A = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + MB88_X: cpustate->X = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + MB88_Y: cpustate->Y = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + MB88_PIO: cpustate->pio = info->i & 0xff; break;
+ case CPUINFO_INT_REGISTER + MB88_TH: cpustate->TH = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + MB88_TL: cpustate->TL = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + MB88_SB: cpustate->SB = info->i & 0x0f; break;
}
}
@@ -939,35 +939,35 @@ CPU_GET_INFO( mb88 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mb88_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 6; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 3; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + MB88_IRQ_LINE: info->i = cpustate->pending_interrupt ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
-
- case CPUINFO_INT_PC: info->i = GETPC(); break;
- case CPUINFO_INT_REGISTER + MB88_PC: info->i = cpustate->PC; break;
- case CPUINFO_INT_REGISTER + MB88_PA: info->i = cpustate->PA; break;
- case CPUINFO_INT_REGISTER + MB88_FLAGS: info->i = 0;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mb88_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 6; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 3; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + MB88_IRQ_LINE: info->i = cpustate->pending_interrupt ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+
+ case CPUINFO_INT_PC: info->i = GETPC(); break;
+ case CPUINFO_INT_REGISTER + MB88_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + MB88_PA: info->i = cpustate->PA; break;
+ case CPUINFO_INT_REGISTER + MB88_FLAGS: info->i = 0;
if (TEST_ST()) info->i |= 0x01;
if (TEST_ZF()) info->i |= 0x02;
if (TEST_CF()) info->i |= 0x04;
@@ -976,64 +976,64 @@ CPU_GET_INFO( mb88 )
if (TEST_NF()) info->i |= 0x20;
break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + MB88_SI: info->i = cpustate->SI; break;
- case CPUINFO_INT_REGISTER + MB88_A: info->i = cpustate->A; break;
- case CPUINFO_INT_REGISTER + MB88_X: info->i = cpustate->X; break;
- case CPUINFO_INT_REGISTER + MB88_Y: info->i = cpustate->Y; break;
- case CPUINFO_INT_REGISTER + MB88_PIO: info->i = cpustate->pio; break;
- case CPUINFO_INT_REGISTER + MB88_TH: info->i = cpustate->TH; break;
- case CPUINFO_INT_REGISTER + MB88_TL: info->i = cpustate->TL; break;
- case CPUINFO_INT_REGISTER + MB88_SB: info->i = cpustate->SB; break;
+ case CPUINFO_INT_REGISTER + MB88_SI: info->i = cpustate->SI; break;
+ case CPUINFO_INT_REGISTER + MB88_A: info->i = cpustate->A; break;
+ case CPUINFO_INT_REGISTER + MB88_X: info->i = cpustate->X; break;
+ case CPUINFO_INT_REGISTER + MB88_Y: info->i = cpustate->Y; break;
+ case CPUINFO_INT_REGISTER + MB88_PIO: info->i = cpustate->pio; break;
+ case CPUINFO_INT_REGISTER + MB88_TH: info->i = cpustate->TH; break;
+ case CPUINFO_INT_REGISTER + MB88_TL: info->i = cpustate->TL; break;
+ case CPUINFO_INT_REGISTER + MB88_SB: info->i = cpustate->SB; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mb88); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mb88); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mb88); break;
- case CPUINFO_FCT_EXIT: info->exit = NULL; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb88); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mb88); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mb88); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mb88); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mb88); break;
+ case CPUINFO_FCT_EXIT: info->exit = NULL; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mb88); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mb88); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MB88xx"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Fujitsu MB88xx"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ernesto Corvi"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MB88xx"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Fujitsu MB88xx"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ernesto Corvi"); break;
case CPUINFO_STR_FLAGS:
- sprintf(info->s, "%c%c%c%c%c%c",
- TEST_ST() ? 'T' : 't',
- TEST_ZF() ? 'Z' : 'z',
- TEST_CF() ? 'C' : 'c',
- TEST_VF() ? 'V' : 'v',
- TEST_SF() ? 'S' : 's',
- TEST_NF() ? 'I' : 'i');
- break;
-
- case CPUINFO_STR_REGISTER + MB88_FLAGS:
- sprintf(info->s, "FL:%c%c%c%c%c%c",
- TEST_ST() ? 'T' : 't',
- TEST_ZF() ? 'Z' : 'z',
- TEST_CF() ? 'C' : 'c',
- TEST_VF() ? 'V' : 'v',
- TEST_SF() ? 'S' : 's',
- TEST_NF() ? 'I' : 'i');
- break;
-
- case CPUINFO_STR_REGISTER + MB88_PC: sprintf(info->s, "PC:%02X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + MB88_PA: sprintf(info->s, "PA:%02X", cpustate->PA); break;
- case CPUINFO_STR_REGISTER + MB88_SI: sprintf(info->s, "SI:%1X", cpustate->SI); break;
- case CPUINFO_STR_REGISTER + MB88_A: sprintf(info->s, "A:%1X", cpustate->A); break;
- case CPUINFO_STR_REGISTER + MB88_X: sprintf(info->s, "X:%1X", cpustate->X); break;
- case CPUINFO_STR_REGISTER + MB88_Y: sprintf(info->s, "Y:%1X", cpustate->Y); break;
- case CPUINFO_STR_REGISTER + MB88_PIO: sprintf(info->s, "PIO:%02X", cpustate->pio); break;
- case CPUINFO_STR_REGISTER + MB88_TH: sprintf(info->s, "TH:%1X", cpustate->TH); break;
- case CPUINFO_STR_REGISTER + MB88_TL: sprintf(info->s, "TL:%1X", cpustate->TL); break;
- case CPUINFO_STR_REGISTER + MB88_SB: sprintf(info->s, "SB:%1X", cpustate->SB); break;
+ sprintf(info->s, "%c%c%c%c%c%c",
+ TEST_ST() ? 'T' : 't',
+ TEST_ZF() ? 'Z' : 'z',
+ TEST_CF() ? 'C' : 'c',
+ TEST_VF() ? 'V' : 'v',
+ TEST_SF() ? 'S' : 's',
+ TEST_NF() ? 'I' : 'i');
+ break;
+
+ case CPUINFO_STR_REGISTER + MB88_FLAGS:
+ sprintf(info->s, "FL:%c%c%c%c%c%c",
+ TEST_ST() ? 'T' : 't',
+ TEST_ZF() ? 'Z' : 'z',
+ TEST_CF() ? 'C' : 'c',
+ TEST_VF() ? 'V' : 'v',
+ TEST_SF() ? 'S' : 's',
+ TEST_NF() ? 'I' : 'i');
+ break;
+
+ case CPUINFO_STR_REGISTER + MB88_PC: sprintf(info->s, "PC:%02X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + MB88_PA: sprintf(info->s, "PA:%02X", cpustate->PA); break;
+ case CPUINFO_STR_REGISTER + MB88_SI: sprintf(info->s, "SI:%1X", cpustate->SI); break;
+ case CPUINFO_STR_REGISTER + MB88_A: sprintf(info->s, "A:%1X", cpustate->A); break;
+ case CPUINFO_STR_REGISTER + MB88_X: sprintf(info->s, "X:%1X", cpustate->X); break;
+ case CPUINFO_STR_REGISTER + MB88_Y: sprintf(info->s, "Y:%1X", cpustate->Y); break;
+ case CPUINFO_STR_REGISTER + MB88_PIO: sprintf(info->s, "PIO:%02X", cpustate->pio); break;
+ case CPUINFO_STR_REGISTER + MB88_TH: sprintf(info->s, "TH:%1X", cpustate->TH); break;
+ case CPUINFO_STR_REGISTER + MB88_TL: sprintf(info->s, "TL:%1X", cpustate->TL); break;
+ case CPUINFO_STR_REGISTER + MB88_SB: sprintf(info->s, "SB:%1X", cpustate->SB); break;
}
}
@@ -1042,17 +1042,17 @@ CPU_GET_INFO( mb8841 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MB8841"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MB8841"); break;
- default: CPU_GET_INFO_CALL(mb88); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
@@ -1061,17 +1061,17 @@ CPU_GET_INFO( mb8842 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_11bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MB8842"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MB8842"); break;
- default: CPU_GET_INFO_CALL(mb88); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
@@ -1080,17 +1080,17 @@ CPU_GET_INFO( mb8843 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MB8843"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MB8843"); break;
- default: CPU_GET_INFO_CALL(mb88); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
@@ -1099,17 +1099,17 @@ CPU_GET_INFO( mb8844 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_10bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_6bit); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MB8844"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MB8844"); break;
- default: CPU_GET_INFO_CALL(mb88); break;
+ default: CPU_GET_INFO_CALL(mb88); break;
}
}
diff --git a/src/emu/cpu/mb88xx/mb88xx.h b/src/emu/cpu/mb88xx/mb88xx.h
index 5976ad00a60..23bf3f56d85 100644
--- a/src/emu/cpu/mb88xx/mb88xx.h
+++ b/src/emu/cpu/mb88xx/mb88xx.h
@@ -10,7 +10,7 @@
#pragma once
#ifndef __MB88XX_H__
-#define __MB88XX_H__
+#define __MB88XX_H__
/***************************************************************************
@@ -19,14 +19,14 @@
enum
{
- MB88_PORTK = 0, /* input only, 4 bits */
- MB88_PORTO, /* output only, PLA function output */
- MB88_PORTP, /* 4 bits */
- MB88_PORTR0, /* R0-R3, 4 bits */
- MB88_PORTR1, /* R4-R7, 4 bits */
- MB88_PORTR2, /* R8-R11, 4 bits */
- MB88_PORTR3, /* R12-R15, 4 bits */
- MB88_PORTSI /* SI, 1 bit */
+ MB88_PORTK = 0, /* input only, 4 bits */
+ MB88_PORTO, /* output only, PLA function output */
+ MB88_PORTP, /* 4 bits */
+ MB88_PORTR0, /* R0-R3, 4 bits */
+ MB88_PORTR1, /* R4-R7, 4 bits */
+ MB88_PORTR2, /* R8-R11, 4 bits */
+ MB88_PORTR3, /* R12-R15, 4 bits */
+ MB88_PORTSI /* SI, 1 bit */
};
/***************************************************************************
@@ -48,7 +48,7 @@ enum
MB88_SB
};
-#define MB88_IRQ_LINE 0
+#define MB88_IRQ_LINE 0
/***************************************************************************
CONFIG STRUCTURE
@@ -56,7 +56,7 @@ enum
struct mb88_cpu_core
{
- UINT8 *PLA_config; /* PLA configuration (32 byte values), if NULL assume direct output */
+ UINT8 *PLA_config; /* PLA configuration (32 byte values), if NULL assume direct output */
};
/***************************************************************************
diff --git a/src/emu/cpu/mc68hc11/hc11dasm.c b/src/emu/cpu/mc68hc11/hc11dasm.c
index ae6683ffb9d..d45f40daecf 100644
--- a/src/emu/cpu/mc68hc11/hc11dasm.c
+++ b/src/emu/cpu/mc68hc11/hc11dasm.c
@@ -34,277 +34,277 @@ struct M68HC11_OPCODE {
static const M68HC11_OPCODE opcode_table[256] =
{
/* 0x00 - 0x0f */
- { "test", 0, },
- { "nop", 0, },
- { "idiv", 0, },
- { "fdiv", 0, },
- { "lsrd", 0, },
- { "asld", 0, },
- { "tap", 0, },
- { "tpa", 0, },
- { "inx", 0, },
- { "dex", 0, },
- { "clv", 0, },
- { "sev", 0, },
- { "clc", 0, },
- { "sec", 0, },
- { "cli", 0, },
- { "sei", 0, },
+ { "test", 0, },
+ { "nop", 0, },
+ { "idiv", 0, },
+ { "fdiv", 0, },
+ { "lsrd", 0, },
+ { "asld", 0, },
+ { "tap", 0, },
+ { "tpa", 0, },
+ { "inx", 0, },
+ { "dex", 0, },
+ { "clv", 0, },
+ { "sev", 0, },
+ { "clc", 0, },
+ { "sec", 0, },
+ { "cli", 0, },
+ { "sei", 0, },
/* 0x10 - 0x1f */
- { "sba", 0, },
- { "cba", 0, },
- { "brset", EA_DIRECT_IMM8_REL, },
- { "brclr", EA_DIRECT_IMM8_REL, },
- { "bset", EA_DIRECT_IMM8, },
- { "bclr", EA_DIRECT_IMM8, },
- { "tab", 0, },
- { "tba", 0, },
- { "page2", PAGE2, },
- { "daa", 0, },
- { "page3", PAGE3, },
- { "aba", 0, },
- { "bset", EA_IND_X_IMM8, },
- { "bclr", EA_IND_X_IMM8, },
- { "brset", EA_IND_X_IMM8_REL, },
- { "brclr", EA_IND_X_IMM8_REL, },
+ { "sba", 0, },
+ { "cba", 0, },
+ { "brset", EA_DIRECT_IMM8_REL, },
+ { "brclr", EA_DIRECT_IMM8_REL, },
+ { "bset", EA_DIRECT_IMM8, },
+ { "bclr", EA_DIRECT_IMM8, },
+ { "tab", 0, },
+ { "tba", 0, },
+ { "page2", PAGE2, },
+ { "daa", 0, },
+ { "page3", PAGE3, },
+ { "aba", 0, },
+ { "bset", EA_IND_X_IMM8, },
+ { "bclr", EA_IND_X_IMM8, },
+ { "brset", EA_IND_X_IMM8_REL, },
+ { "brclr", EA_IND_X_IMM8_REL, },
/* 0x20 - 0x2f */
- { "bra", EA_REL, },
- { "brn", EA_REL, },
- { "bhi", EA_REL, },
- { "bls", EA_REL, },
- { "bcc", EA_REL, },
- { "bcs", EA_REL, },
- { "bne", EA_REL, },
- { "beq", EA_REL, },
- { "bvc", EA_REL, },
- { "bvs", EA_REL, },
- { "bpl", EA_REL, },
- { "bmi", EA_REL, },
- { "bge", EA_REL, },
- { "blt", EA_REL, },
- { "bgt", EA_REL, },
- { "ble", EA_REL, },
+ { "bra", EA_REL, },
+ { "brn", EA_REL, },
+ { "bhi", EA_REL, },
+ { "bls", EA_REL, },
+ { "bcc", EA_REL, },
+ { "bcs", EA_REL, },
+ { "bne", EA_REL, },
+ { "beq", EA_REL, },
+ { "bvc", EA_REL, },
+ { "bvs", EA_REL, },
+ { "bpl", EA_REL, },
+ { "bmi", EA_REL, },
+ { "bge", EA_REL, },
+ { "blt", EA_REL, },
+ { "bgt", EA_REL, },
+ { "ble", EA_REL, },
/* 0x30 - 0x3f */
- { "tsx", 0, },
- { "ins", 0, },
- { "pula", 0, },
- { "pulb", 0, },
- { "des", 0, },
- { "txs", 0, },
- { "psha", 0, },
- { "pshb", 0, },
- { "pulx", 0, },
- { "rts", 0, },
- { "abx", 0, },
- { "rti", 0, },
- { "pshx", 0, },
- { "mul", 0, },
- { "wai", 0, },
- { "swi", 0, },
+ { "tsx", 0, },
+ { "ins", 0, },
+ { "pula", 0, },
+ { "pulb", 0, },
+ { "des", 0, },
+ { "txs", 0, },
+ { "psha", 0, },
+ { "pshb", 0, },
+ { "pulx", 0, },
+ { "rts", 0, },
+ { "abx", 0, },
+ { "rti", 0, },
+ { "pshx", 0, },
+ { "mul", 0, },
+ { "wai", 0, },
+ { "swi", 0, },
/* 0x40 - 0x4f */
- { "nega", 0, },
- { "?", 0, },
- { "?", 0, },
- { "coma", 0, },
- { "lsra", 0, },
- { "?", 0, },
- { "rora", 0, },
- { "asra", 0, },
- { "asla", 0, },
- { "rola", 0, },
- { "deca", 0, },
- { "?", 0, },
- { "inca", 0, },
- { "tsta", 0, },
- { "?", 0, },
- { "clra", 0, },
+ { "nega", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "coma", 0, },
+ { "lsra", 0, },
+ { "?", 0, },
+ { "rora", 0, },
+ { "asra", 0, },
+ { "asla", 0, },
+ { "rola", 0, },
+ { "deca", 0, },
+ { "?", 0, },
+ { "inca", 0, },
+ { "tsta", 0, },
+ { "?", 0, },
+ { "clra", 0, },
/* 0x50 - 0x5f */
- { "negb", 0, },
- { "?", 0, },
- { "?", 0, },
- { "comb", 0, },
- { "lsrb", 0, },
- { "?", 0, },
- { "rorb", 0, },
- { "asrb", 0, },
- { "aslb", 0, },
- { "rolb", 0, },
- { "decb", 0, },
- { "?", 0, },
- { "incb", 0, },
- { "tstb", 0, },
- { "?", 0, },
- { "clrb", 0, },
+ { "negb", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "comb", 0, },
+ { "lsrb", 0, },
+ { "?", 0, },
+ { "rorb", 0, },
+ { "asrb", 0, },
+ { "aslb", 0, },
+ { "rolb", 0, },
+ { "decb", 0, },
+ { "?", 0, },
+ { "incb", 0, },
+ { "tstb", 0, },
+ { "?", 0, },
+ { "clrb", 0, },
/* 0x60 - 0x6f */
- { "neg", EA_IND_X, },
- { "?", 0, },
- { "?", 0, },
- { "com", EA_IND_X, },
- { "lsr", EA_IND_X, },
- { "?", 0, },
- { "ror", EA_IND_X, },
- { "asr", EA_IND_X, },
- { "asl", EA_IND_X, },
- { "rol", EA_IND_X, },
- { "dec", EA_IND_X, },
- { "?", 0, },
- { "inc", EA_IND_X, },
- { "tst", EA_IND_X, },
- { "jmp", EA_IND_X, },
- { "clr", EA_IND_X, },
+ { "neg", EA_IND_X, },
+ { "?", 0, },
+ { "?", 0, },
+ { "com", EA_IND_X, },
+ { "lsr", EA_IND_X, },
+ { "?", 0, },
+ { "ror", EA_IND_X, },
+ { "asr", EA_IND_X, },
+ { "asl", EA_IND_X, },
+ { "rol", EA_IND_X, },
+ { "dec", EA_IND_X, },
+ { "?", 0, },
+ { "inc", EA_IND_X, },
+ { "tst", EA_IND_X, },
+ { "jmp", EA_IND_X, },
+ { "clr", EA_IND_X, },
/* 0x70 - 0x7f */
- { "neg", EA_EXT, },
- { "?", 0, },
- { "?", 0, },
- { "com", EA_EXT, },
- { "lsr", EA_EXT, },
- { "?", 0, },
- { "ror", EA_EXT, },
- { "asr", EA_EXT, },
- { "asl", EA_EXT, },
- { "rol", EA_EXT, },
- { "dec", EA_EXT, },
- { "?", 0, },
- { "inc", EA_EXT, },
- { "tst", EA_EXT, },
- { "jmp", EA_EXT, },
- { "clr", EA_EXT, },
+ { "neg", EA_EXT, },
+ { "?", 0, },
+ { "?", 0, },
+ { "com", EA_EXT, },
+ { "lsr", EA_EXT, },
+ { "?", 0, },
+ { "ror", EA_EXT, },
+ { "asr", EA_EXT, },
+ { "asl", EA_EXT, },
+ { "rol", EA_EXT, },
+ { "dec", EA_EXT, },
+ { "?", 0, },
+ { "inc", EA_EXT, },
+ { "tst", EA_EXT, },
+ { "jmp", EA_EXT, },
+ { "clr", EA_EXT, },
/* 0x80 - 0x8f */
- { "suba", EA_IMM8, },
- { "cmpa", EA_IMM8, },
- { "sbca", EA_IMM8, },
- { "subd", EA_IMM16, },
- { "anda", EA_IMM8, },
- { "bita", EA_IMM8, },
- { "ldaa", EA_IMM8, },
- { "?", 0, },
- { "eora", EA_IMM8, },
- { "adca", EA_IMM8, },
- { "oraa", EA_IMM8, },
- { "adda", EA_IMM8, },
- { "cpx", EA_IMM16, },
- { "bsr", EA_REL, },
- { "lds", EA_IMM16, },
- { "xgdx", 0, },
+ { "suba", EA_IMM8, },
+ { "cmpa", EA_IMM8, },
+ { "sbca", EA_IMM8, },
+ { "subd", EA_IMM16, },
+ { "anda", EA_IMM8, },
+ { "bita", EA_IMM8, },
+ { "ldaa", EA_IMM8, },
+ { "?", 0, },
+ { "eora", EA_IMM8, },
+ { "adca", EA_IMM8, },
+ { "oraa", EA_IMM8, },
+ { "adda", EA_IMM8, },
+ { "cpx", EA_IMM16, },
+ { "bsr", EA_REL, },
+ { "lds", EA_IMM16, },
+ { "xgdx", 0, },
/* 0x90 - 0x9f */
- { "suba", EA_DIRECT, },
- { "cmpa", EA_DIRECT, },
- { "sbca", EA_DIRECT, },
- { "subd", EA_DIRECT, },
- { "anda", EA_DIRECT, },
- { "bita", EA_DIRECT, },
- { "ldaa", EA_DIRECT, },
- { "staa", EA_DIRECT, },
- { "eora", EA_DIRECT, },
- { "adca", EA_DIRECT, },
- { "oraa", EA_DIRECT, },
- { "adda", EA_DIRECT, },
- { "cpx", EA_DIRECT, },
- { "jsr", EA_DIRECT, },
- { "lds", EA_DIRECT, },
- { "sts", EA_DIRECT, },
+ { "suba", EA_DIRECT, },
+ { "cmpa", EA_DIRECT, },
+ { "sbca", EA_DIRECT, },
+ { "subd", EA_DIRECT, },
+ { "anda", EA_DIRECT, },
+ { "bita", EA_DIRECT, },
+ { "ldaa", EA_DIRECT, },
+ { "staa", EA_DIRECT, },
+ { "eora", EA_DIRECT, },
+ { "adca", EA_DIRECT, },
+ { "oraa", EA_DIRECT, },
+ { "adda", EA_DIRECT, },
+ { "cpx", EA_DIRECT, },
+ { "jsr", EA_DIRECT, },
+ { "lds", EA_DIRECT, },
+ { "sts", EA_DIRECT, },
/* 0xa0 - 0xaf */
- { "suba", EA_IND_X, },
- { "cmpa", EA_IND_X, },
- { "sbca", EA_IND_X, },
- { "subd", EA_IND_X, },
- { "anda", EA_IND_X, },
- { "bita", EA_IND_X, },
- { "ldaa", EA_IND_X, },
- { "staa", EA_IND_X, },
- { "eora", EA_IND_X, },
- { "adca", EA_IND_X, },
- { "oraa", EA_IND_X, },
- { "adda", EA_IND_X, },
- { "cpx", EA_IND_X, },
- { "jsr", EA_IND_X, },
- { "lds", EA_IND_X, },
- { "sts", EA_IND_X, },
+ { "suba", EA_IND_X, },
+ { "cmpa", EA_IND_X, },
+ { "sbca", EA_IND_X, },
+ { "subd", EA_IND_X, },
+ { "anda", EA_IND_X, },
+ { "bita", EA_IND_X, },
+ { "ldaa", EA_IND_X, },
+ { "staa", EA_IND_X, },
+ { "eora", EA_IND_X, },
+ { "adca", EA_IND_X, },
+ { "oraa", EA_IND_X, },
+ { "adda", EA_IND_X, },
+ { "cpx", EA_IND_X, },
+ { "jsr", EA_IND_X, },
+ { "lds", EA_IND_X, },
+ { "sts", EA_IND_X, },
/* 0xb0 - 0xbf */
- { "suba", EA_EXT, },
- { "cmpa", EA_EXT, },
- { "sbca", EA_EXT, },
- { "subd", EA_EXT, },
- { "anda", EA_EXT, },
- { "bita", EA_EXT, },
- { "ldaa", EA_EXT, },
- { "staa", EA_EXT, },
- { "eora", EA_EXT, },
- { "adca", EA_EXT, },
- { "oraa", EA_EXT, },
- { "adda", EA_EXT, },
- { "cpx", EA_EXT, },
- { "jsr", EA_EXT, },
- { "lds", EA_EXT, },
- { "sts", EA_EXT, },
+ { "suba", EA_EXT, },
+ { "cmpa", EA_EXT, },
+ { "sbca", EA_EXT, },
+ { "subd", EA_EXT, },
+ { "anda", EA_EXT, },
+ { "bita", EA_EXT, },
+ { "ldaa", EA_EXT, },
+ { "staa", EA_EXT, },
+ { "eora", EA_EXT, },
+ { "adca", EA_EXT, },
+ { "oraa", EA_EXT, },
+ { "adda", EA_EXT, },
+ { "cpx", EA_EXT, },
+ { "jsr", EA_EXT, },
+ { "lds", EA_EXT, },
+ { "sts", EA_EXT, },
/* 0xc0 - 0xcf */
- { "subb", EA_IMM8, },
- { "cmpb", EA_IMM8, },
- { "sbcb", EA_IMM8, },
- { "addd", EA_IMM16, },
- { "andb", EA_IMM8, },
- { "bitb", EA_IMM8, },
- { "ldab", EA_IMM8, },
- { "?", 0, },
- { "eorb", EA_IMM8, },
- { "adcb", EA_IMM8, },
- { "orab", EA_IMM8, },
- { "addb", EA_IMM8, },
- { "ldd", EA_IMM16, },
- { "page4", PAGE4, },
- { "ldx", EA_IMM16, },
- { "stop", 0, },
+ { "subb", EA_IMM8, },
+ { "cmpb", EA_IMM8, },
+ { "sbcb", EA_IMM8, },
+ { "addd", EA_IMM16, },
+ { "andb", EA_IMM8, },
+ { "bitb", EA_IMM8, },
+ { "ldab", EA_IMM8, },
+ { "?", 0, },
+ { "eorb", EA_IMM8, },
+ { "adcb", EA_IMM8, },
+ { "orab", EA_IMM8, },
+ { "addb", EA_IMM8, },
+ { "ldd", EA_IMM16, },
+ { "page4", PAGE4, },
+ { "ldx", EA_IMM16, },
+ { "stop", 0, },
/* 0xd0 - 0xdf */
- { "subb", EA_DIRECT, },
- { "cmpb", EA_DIRECT, },
- { "sbcb", EA_DIRECT, },
- { "addd", EA_DIRECT, },
- { "andb", EA_DIRECT, },
- { "bitb", EA_DIRECT, },
- { "ldab", EA_DIRECT, },
- { "stab", EA_DIRECT, },
- { "eorb", EA_DIRECT, },
- { "adcb", EA_DIRECT, },
- { "orab", EA_DIRECT, },
- { "addb", EA_DIRECT, },
- { "ldd", EA_DIRECT, },
- { "std", EA_DIRECT, },
- { "ldx", EA_DIRECT, },
- { "stx", EA_DIRECT, },
+ { "subb", EA_DIRECT, },
+ { "cmpb", EA_DIRECT, },
+ { "sbcb", EA_DIRECT, },
+ { "addd", EA_DIRECT, },
+ { "andb", EA_DIRECT, },
+ { "bitb", EA_DIRECT, },
+ { "ldab", EA_DIRECT, },
+ { "stab", EA_DIRECT, },
+ { "eorb", EA_DIRECT, },
+ { "adcb", EA_DIRECT, },
+ { "orab", EA_DIRECT, },
+ { "addb", EA_DIRECT, },
+ { "ldd", EA_DIRECT, },
+ { "std", EA_DIRECT, },
+ { "ldx", EA_DIRECT, },
+ { "stx", EA_DIRECT, },
/* 0xe0 - 0xef */
- { "subb", EA_IND_X, },
- { "cmpb", EA_IND_X, },
- { "sbcb", EA_IND_X, },
- { "addd", EA_IND_X, },
- { "andb", EA_IND_X, },
- { "bitb", EA_IND_X, },
- { "ldab", EA_IND_X, },
- { "stab", EA_IND_X, },
- { "eorb", EA_IND_X, },
- { "adcb", EA_IND_X, },
- { "orab", EA_IND_X, },
- { "addb", EA_IND_X, },
- { "ldd", EA_IND_X, },
- { "std", EA_IND_X, },
- { "ldx", EA_IND_X, },
- { "stx", EA_IND_X, },
+ { "subb", EA_IND_X, },
+ { "cmpb", EA_IND_X, },
+ { "sbcb", EA_IND_X, },
+ { "addd", EA_IND_X, },
+ { "andb", EA_IND_X, },
+ { "bitb", EA_IND_X, },
+ { "ldab", EA_IND_X, },
+ { "stab", EA_IND_X, },
+ { "eorb", EA_IND_X, },
+ { "adcb", EA_IND_X, },
+ { "orab", EA_IND_X, },
+ { "addb", EA_IND_X, },
+ { "ldd", EA_IND_X, },
+ { "std", EA_IND_X, },
+ { "ldx", EA_IND_X, },
+ { "stx", EA_IND_X, },
/* 0xf0 - 0xff */
- { "subb", EA_EXT, },
- { "cmpb", EA_EXT, },
- { "sbcb", EA_EXT, },
- { "addd", EA_EXT, },
- { "andb", EA_EXT, },
- { "bitb", EA_EXT, },
- { "ldab", EA_EXT, },
- { "stab", EA_EXT, },
- { "eorb", EA_EXT, },
- { "adcb", EA_EXT, },
- { "orab", EA_EXT, },
- { "addb", EA_EXT, },
- { "ldd", EA_EXT, },
- { "std", EA_EXT, },
- { "ldx", EA_EXT, },
- { "stx", EA_EXT, },
+ { "subb", EA_EXT, },
+ { "cmpb", EA_EXT, },
+ { "sbcb", EA_EXT, },
+ { "addd", EA_EXT, },
+ { "andb", EA_EXT, },
+ { "bitb", EA_EXT, },
+ { "ldab", EA_EXT, },
+ { "stab", EA_EXT, },
+ { "eorb", EA_EXT, },
+ { "adcb", EA_EXT, },
+ { "orab", EA_EXT, },
+ { "addb", EA_EXT, },
+ { "ldd", EA_EXT, },
+ { "std", EA_EXT, },
+ { "ldx", EA_EXT, },
+ { "stx", EA_EXT, },
};
@@ -314,277 +314,277 @@ static const M68HC11_OPCODE opcode_table[256] =
static const M68HC11_OPCODE opcode_table_page2[256] =
{
/* 0x00 - 0x0f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "iny", 0, },
- { "dey", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "iny", 0, },
+ { "dey", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x10 - 0x1f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "bset", EA_IND_Y_IMM8, },
- { "bclr", EA_IND_Y_IMM8, },
- { "brset", EA_IND_Y_IMM8_REL, },
- { "brlcr", EA_IND_Y_IMM8_REL, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "bset", EA_IND_Y_IMM8, },
+ { "bclr", EA_IND_Y_IMM8, },
+ { "brset", EA_IND_Y_IMM8_REL, },
+ { "brlcr", EA_IND_Y_IMM8_REL, },
/* 0x20 - 0x2f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x30 - 0x3f */
- { "tsy", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "tys", 0, },
- { "?", 0, },
- { "?", 0, },
- { "puly", 0, },
- { "?", 0, },
- { "aby", 0, },
- { "?", 0, },
- { "pshy", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "tsy", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "tys", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "puly", 0, },
+ { "?", 0, },
+ { "aby", 0, },
+ { "?", 0, },
+ { "pshy", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x40 - 0x4f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x50 - 0x5f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x60 - 0x6f */
- { "neg", EA_IND_Y, },
- { "?", 0, },
- { "?", 0, },
- { "com", EA_IND_Y, },
- { "lsr", EA_IND_Y, },
- { "?", 0, },
- { "ror", EA_IND_Y, },
- { "asr", EA_IND_Y, },
- { "asl", EA_IND_Y, },
- { "rol", EA_IND_Y, },
- { "dec", EA_IND_Y, },
- { "?", 0, },
- { "inc", EA_IND_Y, },
- { "tst", EA_IND_Y, },
- { "jmp", EA_IND_Y, },
- { "clr", EA_IND_Y, },
+ { "neg", EA_IND_Y, },
+ { "?", 0, },
+ { "?", 0, },
+ { "com", EA_IND_Y, },
+ { "lsr", EA_IND_Y, },
+ { "?", 0, },
+ { "ror", EA_IND_Y, },
+ { "asr", EA_IND_Y, },
+ { "asl", EA_IND_Y, },
+ { "rol", EA_IND_Y, },
+ { "dec", EA_IND_Y, },
+ { "?", 0, },
+ { "inc", EA_IND_Y, },
+ { "tst", EA_IND_Y, },
+ { "jmp", EA_IND_Y, },
+ { "clr", EA_IND_Y, },
/* 0x70 - 0x7f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x80 - 0x8f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpy", EA_IMM16, },
- { "?", 0, },
- { "?", 0, },
- { "xgdy", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpy", EA_IMM16, },
+ { "?", 0, },
+ { "?", 0, },
+ { "xgdy", 0, },
/* 0x90 - 0x9f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpy", EA_DIRECT, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpy", EA_DIRECT, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xa0 - 0xaf */
- { "suba", EA_IND_Y, },
- { "cmpa", EA_IND_Y, },
- { "sbca", EA_IND_Y, },
- { "subd", EA_IND_Y, },
- { "anda", EA_IND_Y, },
- { "bita", EA_IND_Y, },
- { "ldaa", EA_IND_Y, },
- { "staa", EA_IND_Y, },
- { "eora", EA_IND_Y, },
- { "adca", EA_IND_Y, },
- { "oraa", EA_IND_Y, },
- { "adda", EA_IND_Y, },
- { "cpy", EA_IND_Y, },
- { "jsr", EA_IND_Y, },
- { "lds", EA_IND_Y, },
- { "sts", EA_IND_Y, },
+ { "suba", EA_IND_Y, },
+ { "cmpa", EA_IND_Y, },
+ { "sbca", EA_IND_Y, },
+ { "subd", EA_IND_Y, },
+ { "anda", EA_IND_Y, },
+ { "bita", EA_IND_Y, },
+ { "ldaa", EA_IND_Y, },
+ { "staa", EA_IND_Y, },
+ { "eora", EA_IND_Y, },
+ { "adca", EA_IND_Y, },
+ { "oraa", EA_IND_Y, },
+ { "adda", EA_IND_Y, },
+ { "cpy", EA_IND_Y, },
+ { "jsr", EA_IND_Y, },
+ { "lds", EA_IND_Y, },
+ { "sts", EA_IND_Y, },
/* 0xb0 - 0xbf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpy", EA_EXT, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpy", EA_EXT, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xc0 - 0xcf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "ldy", EA_IMM16, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "ldy", EA_IMM16, },
+ { "?", 0, },
/* 0xd0 - 0xdf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "ldy", EA_DIRECT, },
- { "sty", EA_DIRECT, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "ldy", EA_DIRECT, },
+ { "sty", EA_DIRECT, },
/* 0xe0 - 0xef */
- { "subb", EA_IND_Y, },
- { "cmpb", EA_IND_Y, },
- { "sbcb", EA_IND_Y, },
- { "addd", EA_IND_Y, },
- { "andb", EA_IND_Y, },
- { "bitb", EA_IND_Y, },
- { "ldab", EA_IND_Y, },
- { "stab", EA_IND_Y, },
- { "eorb", EA_IND_Y, },
- { "adcb", EA_IND_Y, },
- { "orab", EA_IND_Y, },
- { "addb", EA_IND_Y, },
- { "ldd", EA_IND_Y, },
- { "std", EA_IND_Y, },
- { "ldy", EA_IND_Y, },
- { "sty", EA_IND_Y, },
+ { "subb", EA_IND_Y, },
+ { "cmpb", EA_IND_Y, },
+ { "sbcb", EA_IND_Y, },
+ { "addd", EA_IND_Y, },
+ { "andb", EA_IND_Y, },
+ { "bitb", EA_IND_Y, },
+ { "ldab", EA_IND_Y, },
+ { "stab", EA_IND_Y, },
+ { "eorb", EA_IND_Y, },
+ { "adcb", EA_IND_Y, },
+ { "orab", EA_IND_Y, },
+ { "addb", EA_IND_Y, },
+ { "ldd", EA_IND_Y, },
+ { "std", EA_IND_Y, },
+ { "ldy", EA_IND_Y, },
+ { "sty", EA_IND_Y, },
/* 0xf0 - 0xff */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "ldy", EA_EXT, },
- { "sty", EA_EXT, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "ldy", EA_EXT, },
+ { "sty", EA_EXT, },
};
@@ -594,277 +594,277 @@ static const M68HC11_OPCODE opcode_table_page2[256] =
static const M68HC11_OPCODE opcode_table_page3[256] =
{
/* 0x00 - 0x0f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x10 - 0x1f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x20 - 0x2f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x30 - 0x3f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x40 - 0x4f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x50 - 0x5f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x60 - 0x6f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x70 - 0x7f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x80 - 0x8f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpd", EA_IMM16, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpd", EA_IMM16, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x90 - 0x9f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpd", EA_DIRECT, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpd", EA_DIRECT, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xa0 - 0xaf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpd", EA_IND_X, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpy", EA_IND_X, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpd", EA_IND_X, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpy", EA_IND_X, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xb0 - 0xbf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpd", EA_EXT, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpd", EA_EXT, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xc0 - 0xcf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xd0 - 0xdf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xe0 - 0xef */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "ldy", EA_IND_X, },
- { "sty", EA_IND_X, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "ldy", EA_IND_X, },
+ { "sty", EA_IND_X, },
/* 0xf0 - 0xff */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
};
@@ -874,277 +874,277 @@ static const M68HC11_OPCODE opcode_table_page3[256] =
static const M68HC11_OPCODE opcode_table_page4[256] =
{
/* 0x00 - 0x0f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x10 - 0x1f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x20 - 0x2f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x30 - 0x3f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x40 - 0x4f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x50 - 0x5f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x60 - 0x6f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x70 - 0x7f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x80 - 0x8f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0x90 - 0x9f */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xa0 - 0xaf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpd", EA_IND_Y, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "cpx", EA_IND_Y, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpd", EA_IND_Y, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "cpx", EA_IND_Y, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xb0 - 0xbf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xc0 - 0xcf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xd0 - 0xdf */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
/* 0xe0 - 0xef */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "ldx", EA_IND_Y, },
- { "stx", EA_IND_Y, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "ldx", EA_IND_Y, },
+ { "stx", EA_IND_Y, },
/* 0xf0 - 0xff */
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
- { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
+ { "?", 0, },
};
diff --git a/src/emu/cpu/mc68hc11/hc11ops.c b/src/emu/cpu/mc68hc11/hc11ops.c
index 5a5dc0ca73f..ffdd452f43a 100644
--- a/src/emu/cpu/mc68hc11/hc11ops.c
+++ b/src/emu/cpu/mc68hc11/hc11ops.c
@@ -1,28 +1,28 @@
-#define SET_Z8(r) (cpustate->ccr |= ((UINT8)r == 0) ? CC_Z : 0)
-#define SET_Z16(r) (cpustate->ccr |= ((UINT16)r == 0) ? CC_Z : 0)
-#define SET_N8(r) (cpustate->ccr |= (r & 0x80) ? CC_N : 0)
-#define SET_N16(r) (cpustate->ccr |= (r & 0x8000) ? CC_N : 0)
-#define SET_V_ADD8(r,s,d) (cpustate->ccr |= (((r) ^ (s)) & ((r) ^ (d)) & 0x80) ? CC_V : 0)
-#define SET_V_SUB8(r,s,d) (cpustate->ccr |= (((d) ^ (s)) & ((d) ^ (r)) & 0x80) ? CC_V : 0)
-#define SET_V_ADD16(r,s,d) (cpustate->ccr |= (((r) ^ (s)) & ((r) ^ (d)) & 0x8000) ? CC_V : 0)
-#define SET_V_SUB16(r,s,d) (cpustate->ccr |= (((d) ^ (s)) & ((d) ^ (r)) & 0x8000) ? CC_V : 0)
-#define SET_H(r,s,d) (cpustate->ccr |= (((r) ^ (s) ^ (d)) & 0x10) ? CC_H : 0)
-#define SET_C8(x) (cpustate->ccr |= ((x) & 0x100) ? CC_C : 0)
-#define SET_C16(x) (cpustate->ccr |= ((x) & 0x10000) ? CC_C : 0)
-#define CLEAR_Z(cpustate) (cpustate->ccr &= ~(CC_Z))
-#define CLEAR_C(cpustate) (cpustate->ccr &= ~(CC_C))
-#define CLEAR_NZV(cpustate) (cpustate->ccr &= ~(CC_N | CC_Z | CC_V))
-#define CLEAR_ZVC(cpustate) (cpustate->ccr &= ~(CC_Z | CC_V | CC_C))
-#define CLEAR_NZVC(cpustate) (cpustate->ccr &= ~(CC_N | CC_Z | CC_V | CC_C))
-#define CLEAR_HNZVC(cpustate) (cpustate->ccr &= ~(CC_H | CC_N | CC_Z | CC_V | CC_C))
-
-#define SET_ZFLAG(cpustate) (cpustate->ccr |= CC_Z)
-#define SET_NFLAG(cpustate) (cpustate->ccr |= CC_N)
-#define SET_VFLAG(cpustate) (cpustate->ccr |= CC_V)
-
-#define REG_A cpustate->d.d8.a
-#define REG_B cpustate->d.d8.b
-#define REG_D cpustate->d.d16
+#define SET_Z8(r) (cpustate->ccr |= ((UINT8)r == 0) ? CC_Z : 0)
+#define SET_Z16(r) (cpustate->ccr |= ((UINT16)r == 0) ? CC_Z : 0)
+#define SET_N8(r) (cpustate->ccr |= (r & 0x80) ? CC_N : 0)
+#define SET_N16(r) (cpustate->ccr |= (r & 0x8000) ? CC_N : 0)
+#define SET_V_ADD8(r,s,d) (cpustate->ccr |= (((r) ^ (s)) & ((r) ^ (d)) & 0x80) ? CC_V : 0)
+#define SET_V_SUB8(r,s,d) (cpustate->ccr |= (((d) ^ (s)) & ((d) ^ (r)) & 0x80) ? CC_V : 0)
+#define SET_V_ADD16(r,s,d) (cpustate->ccr |= (((r) ^ (s)) & ((r) ^ (d)) & 0x8000) ? CC_V : 0)
+#define SET_V_SUB16(r,s,d) (cpustate->ccr |= (((d) ^ (s)) & ((d) ^ (r)) & 0x8000) ? CC_V : 0)
+#define SET_H(r,s,d) (cpustate->ccr |= (((r) ^ (s) ^ (d)) & 0x10) ? CC_H : 0)
+#define SET_C8(x) (cpustate->ccr |= ((x) & 0x100) ? CC_C : 0)
+#define SET_C16(x) (cpustate->ccr |= ((x) & 0x10000) ? CC_C : 0)
+#define CLEAR_Z(cpustate) (cpustate->ccr &= ~(CC_Z))
+#define CLEAR_C(cpustate) (cpustate->ccr &= ~(CC_C))
+#define CLEAR_NZV(cpustate) (cpustate->ccr &= ~(CC_N | CC_Z | CC_V))
+#define CLEAR_ZVC(cpustate) (cpustate->ccr &= ~(CC_Z | CC_V | CC_C))
+#define CLEAR_NZVC(cpustate) (cpustate->ccr &= ~(CC_N | CC_Z | CC_V | CC_C))
+#define CLEAR_HNZVC(cpustate) (cpustate->ccr &= ~(CC_H | CC_N | CC_Z | CC_V | CC_C))
+
+#define SET_ZFLAG(cpustate) (cpustate->ccr |= CC_Z)
+#define SET_NFLAG(cpustate) (cpustate->ccr |= CC_N)
+#define SET_VFLAG(cpustate) (cpustate->ccr |= CC_V)
+
+#define REG_A cpustate->d.d8.a
+#define REG_B cpustate->d.d8.b
+#define REG_D cpustate->d.d16
INLINE void CYCLES(hc11_state *cpustate, int cycles)
{
@@ -789,7 +789,7 @@ static void HC11OP(bitb_indy)(hc11_state *cpustate)
static void HC11OP(bcc)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if ((cpustate->ccr & CC_C) == 0) /* Branch if C flag clear */
+ if ((cpustate->ccr & CC_C) == 0) /* Branch if C flag clear */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -827,7 +827,7 @@ static void HC11OP(bclr_indx)(hc11_state *cpustate)
static void HC11OP(bcs)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if (cpustate->ccr & CC_C) /* Branch if C flag set */
+ if (cpustate->ccr & CC_C) /* Branch if C flag set */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -839,7 +839,7 @@ static void HC11OP(bcs)(hc11_state *cpustate)
static void HC11OP(beq)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if (cpustate->ccr & CC_Z) /* Branch if Z flag set */
+ if (cpustate->ccr & CC_Z) /* Branch if Z flag set */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -851,7 +851,7 @@ static void HC11OP(beq)(hc11_state *cpustate)
static void HC11OP(bhi)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if (((cpustate->ccr & CC_C) == 0) && ((cpustate->ccr & CC_Z) == 0)) /* Branch if C and Z flag clear */
+ if (((cpustate->ccr & CC_C) == 0) && ((cpustate->ccr & CC_Z) == 0)) /* Branch if C and Z flag clear */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -863,7 +863,7 @@ static void HC11OP(bhi)(hc11_state *cpustate)
static void HC11OP(bne)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if ((cpustate->ccr & CC_Z) == 0) /* Branch if Z flag clear */
+ if ((cpustate->ccr & CC_Z) == 0) /* Branch if Z flag clear */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -877,7 +877,7 @@ static void HC11OP(ble)(hc11_state *cpustate)
UINT8 n = (cpustate->ccr & CC_N) ? 1 : 0;
UINT8 v = (cpustate->ccr & CC_V) ? 1 : 0;
INT8 rel = FETCH(cpustate);
- if ((cpustate->ccr & CC_Z) || (n ^ v)) /* Branch if Z flag set or (N ^ V) */
+ if ((cpustate->ccr & CC_Z) || (n ^ v)) /* Branch if Z flag set or (N ^ V) */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -888,7 +888,7 @@ static void HC11OP(ble)(hc11_state *cpustate)
static void HC11OP(bls)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if (cpustate->ccr & CC_C || cpustate->ccr & CC_Z) /* Branch if C or Z flag set */
+ if (cpustate->ccr & CC_C || cpustate->ccr & CC_Z) /* Branch if C or Z flag set */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -899,7 +899,7 @@ static void HC11OP(bls)(hc11_state *cpustate)
static void HC11OP(bmi)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if (cpustate->ccr & CC_N) /* Branch if N flag set */
+ if (cpustate->ccr & CC_N) /* Branch if N flag set */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -910,7 +910,7 @@ static void HC11OP(bmi)(hc11_state *cpustate)
static void HC11OP(bpl)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if ((cpustate->ccr & CC_N) == 0) /* Branch if N flag clear */
+ if ((cpustate->ccr & CC_N) == 0) /* Branch if N flag clear */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -1042,7 +1042,7 @@ static void HC11OP(bsr)(hc11_state *cpustate)
static void HC11OP(bvc)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if ((cpustate->ccr & CC_V) == 0) /* Branch if V flag clear */
+ if ((cpustate->ccr & CC_V) == 0) /* Branch if V flag clear */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
@@ -1053,7 +1053,7 @@ static void HC11OP(bvc)(hc11_state *cpustate)
static void HC11OP(bvs)(hc11_state *cpustate)
{
INT8 rel = FETCH(cpustate);
- if (cpustate->ccr & CC_V) /* Branch if V flag set */
+ if (cpustate->ccr & CC_V) /* Branch if V flag set */
{
SET_PC(cpustate, cpustate->ppc + rel + 2);
}
diff --git a/src/emu/cpu/mc68hc11/hc11ops.h b/src/emu/cpu/mc68hc11/hc11ops.h
index 20238f0bcb3..e814314f189 100644
--- a/src/emu/cpu/mc68hc11/hc11ops.h
+++ b/src/emu/cpu/mc68hc11/hc11ops.h
@@ -8,46 +8,46 @@ struct hc11_opcode_list_struct
static const hc11_opcode_list_struct hc11_opcode_list[] =
{
/* page opcode handler */
- { 0, 0x1b, HC11OP(aba) },
- { 0, 0x3a, HC11OP(abx) },
- { 0x18, 0x3a, HC11OP(aby) },
- { 0, 0x89, HC11OP(adca_imm) },
- { 0, 0x99, HC11OP(adca_dir) },
- { 0, 0xb9, HC11OP(adca_ext) },
- { 0, 0xa9, HC11OP(adca_indx) },
- { 0x18, 0xa9, HC11OP(adca_indy) },
- { 0, 0xc9, HC11OP(adcb_imm) },
- { 0, 0xd9, HC11OP(adcb_dir) },
- { 0, 0xf9, HC11OP(adcb_ext) },
- { 0, 0xe9, HC11OP(adcb_indx) },
- { 0x18, 0xe9, HC11OP(adcb_indy) },
- { 0, 0x8b, HC11OP(adda_imm) },
- { 0, 0x9b, HC11OP(adda_dir) },
- { 0, 0xbb, HC11OP(adda_ext) },
- { 0, 0xab, HC11OP(adda_indx) },
- { 0x18, 0xab, HC11OP(adda_indy) },
- { 0, 0xcb, HC11OP(addb_imm) },
- { 0, 0xdb, HC11OP(addb_dir) },
- { 0, 0xfb, HC11OP(addb_ext) },
- { 0, 0xeb, HC11OP(addb_indx) },
- { 0x18, 0xeb, HC11OP(addb_indy) },
- { 0, 0xc3, HC11OP(addd_imm) },
- { 0, 0xd3, HC11OP(addd_dir) },
- { 0, 0xf3, HC11OP(addd_ext) },
- { 0, 0xe3, HC11OP(addd_indx) },
- { 0x18, 0xe3, HC11OP(addd_indy) },
- { 0, 0x84, HC11OP(anda_imm) },
- { 0, 0x94, HC11OP(anda_dir) },
- { 0, 0xb4, HC11OP(anda_ext) },
- { 0, 0xa4, HC11OP(anda_indx) },
- { 0x18, 0xa4, HC11OP(anda_indy) },
- { 0, 0xc4, HC11OP(andb_imm) },
- { 0, 0xd4, HC11OP(andb_dir) },
- { 0, 0xf4, HC11OP(andb_ext) },
- { 0, 0xe4, HC11OP(andb_indx) },
- { 0x18, 0xe4, HC11OP(andb_indy) },
- { 0, 0x48, HC11OP(asla) },
- { 0, 0x58, HC11OP(aslb) },
+ { 0, 0x1b, HC11OP(aba) },
+ { 0, 0x3a, HC11OP(abx) },
+ { 0x18, 0x3a, HC11OP(aby) },
+ { 0, 0x89, HC11OP(adca_imm) },
+ { 0, 0x99, HC11OP(adca_dir) },
+ { 0, 0xb9, HC11OP(adca_ext) },
+ { 0, 0xa9, HC11OP(adca_indx) },
+ { 0x18, 0xa9, HC11OP(adca_indy) },
+ { 0, 0xc9, HC11OP(adcb_imm) },
+ { 0, 0xd9, HC11OP(adcb_dir) },
+ { 0, 0xf9, HC11OP(adcb_ext) },
+ { 0, 0xe9, HC11OP(adcb_indx) },
+ { 0x18, 0xe9, HC11OP(adcb_indy) },
+ { 0, 0x8b, HC11OP(adda_imm) },
+ { 0, 0x9b, HC11OP(adda_dir) },
+ { 0, 0xbb, HC11OP(adda_ext) },
+ { 0, 0xab, HC11OP(adda_indx) },
+ { 0x18, 0xab, HC11OP(adda_indy) },
+ { 0, 0xcb, HC11OP(addb_imm) },
+ { 0, 0xdb, HC11OP(addb_dir) },
+ { 0, 0xfb, HC11OP(addb_ext) },
+ { 0, 0xeb, HC11OP(addb_indx) },
+ { 0x18, 0xeb, HC11OP(addb_indy) },
+ { 0, 0xc3, HC11OP(addd_imm) },
+ { 0, 0xd3, HC11OP(addd_dir) },
+ { 0, 0xf3, HC11OP(addd_ext) },
+ { 0, 0xe3, HC11OP(addd_indx) },
+ { 0x18, 0xe3, HC11OP(addd_indy) },
+ { 0, 0x84, HC11OP(anda_imm) },
+ { 0, 0x94, HC11OP(anda_dir) },
+ { 0, 0xb4, HC11OP(anda_ext) },
+ { 0, 0xa4, HC11OP(anda_indx) },
+ { 0x18, 0xa4, HC11OP(anda_indy) },
+ { 0, 0xc4, HC11OP(andb_imm) },
+ { 0, 0xd4, HC11OP(andb_dir) },
+ { 0, 0xf4, HC11OP(andb_ext) },
+ { 0, 0xe4, HC11OP(andb_indx) },
+ { 0x18, 0xe4, HC11OP(andb_indy) },
+ { 0, 0x48, HC11OP(asla) },
+ { 0, 0x58, HC11OP(aslb) },
{ 0, 0x78, HC11OP(asl_ext) },
// { 0, 0x68, HC11OP(asl_indx) },
// { 0x18, 0x68, HC11OP(asl_indy) },
@@ -56,268 +56,268 @@ static const hc11_opcode_list_struct hc11_opcode_list[] =
// { 0, 0x77, HC11OP(asr_ext) },
// { 0, 0x67, HC11OP(asr_indx) },
// { 0x18, 0x67, HC11OP(asr_indy) },
- { 0, 0x24, HC11OP(bcc) },
+ { 0, 0x24, HC11OP(bcc) },
{ 0, 0x15, HC11OP(bclr_dir) },
- { 0, 0x1d, HC11OP(bclr_indx) },
+ { 0, 0x1d, HC11OP(bclr_indx) },
// { 0x18, 0x1d, HC11OP(bclr_indy) },
- { 0, 0x25, HC11OP(bcs) },
- { 0, 0x27, HC11OP(beq) },
+ { 0, 0x25, HC11OP(bcs) },
+ { 0, 0x27, HC11OP(beq) },
// { 0, 0x2c, HC11OP(bge) },
// { 0, 0x2e, HC11OP(bgt) },
- { 0, 0x22, HC11OP(bhi) },
- { 0, 0x85, HC11OP(bita_imm) },
- { 0, 0x95, HC11OP(bita_dir) },
- { 0, 0xb5, HC11OP(bita_ext) },
- { 0, 0xa5, HC11OP(bita_indx) },
- { 0x18, 0xa5, HC11OP(bita_indy) },
- { 0, 0xc5, HC11OP(bitb_imm) },
- { 0, 0xd5, HC11OP(bitb_dir) },
- { 0, 0xf5, HC11OP(bitb_ext) },
- { 0, 0xe5, HC11OP(bitb_indx) },
- { 0x18, 0xe5, HC11OP(bitb_indy) },
- { 0, 0x2f, HC11OP(ble) },
- { 0, 0x23, HC11OP(bls) },
+ { 0, 0x22, HC11OP(bhi) },
+ { 0, 0x85, HC11OP(bita_imm) },
+ { 0, 0x95, HC11OP(bita_dir) },
+ { 0, 0xb5, HC11OP(bita_ext) },
+ { 0, 0xa5, HC11OP(bita_indx) },
+ { 0x18, 0xa5, HC11OP(bita_indy) },
+ { 0, 0xc5, HC11OP(bitb_imm) },
+ { 0, 0xd5, HC11OP(bitb_dir) },
+ { 0, 0xf5, HC11OP(bitb_ext) },
+ { 0, 0xe5, HC11OP(bitb_indx) },
+ { 0x18, 0xe5, HC11OP(bitb_indy) },
+ { 0, 0x2f, HC11OP(ble) },
+ { 0, 0x23, HC11OP(bls) },
// { 0, 0x2d, HC11OP(blt) },
- { 0, 0x2b, HC11OP(bmi) },
- { 0, 0x26, HC11OP(bne) },
- { 0, 0x2a, HC11OP(bpl) },
- { 0, 0x20, HC11OP(bra) },
- { 0, 0x13, HC11OP(brclr_dir) },
- { 0, 0x1f, HC11OP(brclr_indx) },
+ { 0, 0x2b, HC11OP(bmi) },
+ { 0, 0x26, HC11OP(bne) },
+ { 0, 0x2a, HC11OP(bpl) },
+ { 0, 0x20, HC11OP(bra) },
+ { 0, 0x13, HC11OP(brclr_dir) },
+ { 0, 0x1f, HC11OP(brclr_indx) },
// { 0x18, 0x1f, HC11OP(brclr_indy) },
- { 0, 0x21, HC11OP(brn) },
- { 0, 0x12, HC11OP(brset_dir) },
- { 0, 0x1e, HC11OP(brset_indx) },
+ { 0, 0x21, HC11OP(brn) },
+ { 0, 0x12, HC11OP(brset_dir) },
+ { 0, 0x1e, HC11OP(brset_indx) },
// { 0x18, 0x1e, HC11OP(brset_indy) },
{ 0, 0x14, HC11OP(bset_dir) },
- { 0, 0x1c, HC11OP(bset_indx) },
+ { 0, 0x1c, HC11OP(bset_indx) },
// { 0x18, 0x1c, HC11OP(bset_indy) },
- { 0, 0x8d, HC11OP(bsr) },
- { 0, 0x28, HC11OP(bvc) },
- { 0, 0x29, HC11OP(bvs) },
- { 0, 0x11, HC11OP(cba) },
- { 0, 0x0c, HC11OP(clc) },
- { 0, 0x0e, HC11OP(cli) },
- { 0, 0x4f, HC11OP(clra) },
- { 0, 0x5f, HC11OP(clrb) },
- { 0, 0x7f, HC11OP(clr_ext) },
- { 0, 0x6f, HC11OP(clr_indx) },
- { 0x18, 0x6f, HC11OP(clr_indy) },
- { 0, 0x0a, HC11OP(clv) },
- { 0, 0x81, HC11OP(cmpa_imm) },
- { 0, 0x91, HC11OP(cmpa_dir) },
- { 0, 0xb1, HC11OP(cmpa_ext) },
- { 0, 0xa1, HC11OP(cmpa_indx) },
- { 0x18, 0xa1, HC11OP(cmpa_indy) },
- { 0, 0xc1, HC11OP(cmpb_imm) },
- { 0, 0xd1, HC11OP(cmpb_dir) },
- { 0, 0xf1, HC11OP(cmpb_ext) },
- { 0, 0xe1, HC11OP(cmpb_indx) },
- { 0x18, 0xe1, HC11OP(cmpb_indy) },
- { 0, 0x43, HC11OP(coma) },
- { 0, 0x53, HC11OP(comb) },
+ { 0, 0x8d, HC11OP(bsr) },
+ { 0, 0x28, HC11OP(bvc) },
+ { 0, 0x29, HC11OP(bvs) },
+ { 0, 0x11, HC11OP(cba) },
+ { 0, 0x0c, HC11OP(clc) },
+ { 0, 0x0e, HC11OP(cli) },
+ { 0, 0x4f, HC11OP(clra) },
+ { 0, 0x5f, HC11OP(clrb) },
+ { 0, 0x7f, HC11OP(clr_ext) },
+ { 0, 0x6f, HC11OP(clr_indx) },
+ { 0x18, 0x6f, HC11OP(clr_indy) },
+ { 0, 0x0a, HC11OP(clv) },
+ { 0, 0x81, HC11OP(cmpa_imm) },
+ { 0, 0x91, HC11OP(cmpa_dir) },
+ { 0, 0xb1, HC11OP(cmpa_ext) },
+ { 0, 0xa1, HC11OP(cmpa_indx) },
+ { 0x18, 0xa1, HC11OP(cmpa_indy) },
+ { 0, 0xc1, HC11OP(cmpb_imm) },
+ { 0, 0xd1, HC11OP(cmpb_dir) },
+ { 0, 0xf1, HC11OP(cmpb_ext) },
+ { 0, 0xe1, HC11OP(cmpb_indx) },
+ { 0x18, 0xe1, HC11OP(cmpb_indy) },
+ { 0, 0x43, HC11OP(coma) },
+ { 0, 0x53, HC11OP(comb) },
// { 0, 0x73, HC11OP(com_ext) },
// { 0, 0x63, HC11OP(com_indx) },
// { 0x18, 0x63, HC11OP(com_indy) },
- { 0x1a, 0x83, HC11OP(cpd_imm) },
- { 0x1a, 0x93, HC11OP(cpd_dir) },
- { 0x1a, 0xb3, HC11OP(cpd_ext) },
- { 0x1a, 0xa3, HC11OP(cpd_indx) },
- { 0xcd, 0xa3, HC11OP(cpd_indy) },
- { 0, 0x8c, HC11OP(cpx_imm) },
- { 0, 0x9c, HC11OP(cpx_dir) },
- { 0, 0xbc, HC11OP(cpx_ext) },
- { 0, 0xac, HC11OP(cpx_indx) },
- { 0xcd, 0xac, HC11OP(cpx_indy) },
- { 0x18, 0x8c, HC11OP(cpy_imm) },
- { 0x18, 0x9c, HC11OP(cpy_dir) },
- { 0x18, 0xbc, HC11OP(cpy_ext) },
- { 0x1a, 0xac, HC11OP(cpy_indx) },
- { 0x18, 0xac, HC11OP(cpy_indy) },
+ { 0x1a, 0x83, HC11OP(cpd_imm) },
+ { 0x1a, 0x93, HC11OP(cpd_dir) },
+ { 0x1a, 0xb3, HC11OP(cpd_ext) },
+ { 0x1a, 0xa3, HC11OP(cpd_indx) },
+ { 0xcd, 0xa3, HC11OP(cpd_indy) },
+ { 0, 0x8c, HC11OP(cpx_imm) },
+ { 0, 0x9c, HC11OP(cpx_dir) },
+ { 0, 0xbc, HC11OP(cpx_ext) },
+ { 0, 0xac, HC11OP(cpx_indx) },
+ { 0xcd, 0xac, HC11OP(cpx_indy) },
+ { 0x18, 0x8c, HC11OP(cpy_imm) },
+ { 0x18, 0x9c, HC11OP(cpy_dir) },
+ { 0x18, 0xbc, HC11OP(cpy_ext) },
+ { 0x1a, 0xac, HC11OP(cpy_indx) },
+ { 0x18, 0xac, HC11OP(cpy_indy) },
// { 0, 0x19, HC11OP(daa) },
- { 0, 0x4a, HC11OP(deca) },
- { 0, 0x5a, HC11OP(decb) },
- { 0, 0x7a, HC11OP(dec_ext) },
- { 0, 0x6a, HC11OP(dec_indx) },
- { 0x18, 0x6a, HC11OP(dec_indy) },
+ { 0, 0x4a, HC11OP(deca) },
+ { 0, 0x5a, HC11OP(decb) },
+ { 0, 0x7a, HC11OP(dec_ext) },
+ { 0, 0x6a, HC11OP(dec_indx) },
+ { 0x18, 0x6a, HC11OP(dec_indy) },
// { 0, 0x34, HC11OP(des) },
- { 0, 0x09, HC11OP(dex) },
- { 0x18, 0x09, HC11OP(dey) },
- { 0, 0x88, HC11OP(eora_imm) },
- { 0, 0x98, HC11OP(eora_dir) },
- { 0, 0xb8, HC11OP(eora_ext) },
- { 0, 0xa8, HC11OP(eora_indx) },
- { 0x18, 0xa8, HC11OP(eora_indy) },
- { 0, 0xc8, HC11OP(eorb_imm) },
- { 0, 0xd8, HC11OP(eorb_dir) },
- { 0, 0xf8, HC11OP(eorb_ext) },
- { 0, 0xe8, HC11OP(eorb_indx) },
- { 0x18, 0xe8, HC11OP(eorb_indy) },
+ { 0, 0x09, HC11OP(dex) },
+ { 0x18, 0x09, HC11OP(dey) },
+ { 0, 0x88, HC11OP(eora_imm) },
+ { 0, 0x98, HC11OP(eora_dir) },
+ { 0, 0xb8, HC11OP(eora_ext) },
+ { 0, 0xa8, HC11OP(eora_indx) },
+ { 0x18, 0xa8, HC11OP(eora_indy) },
+ { 0, 0xc8, HC11OP(eorb_imm) },
+ { 0, 0xd8, HC11OP(eorb_dir) },
+ { 0, 0xf8, HC11OP(eorb_ext) },
+ { 0, 0xe8, HC11OP(eorb_indx) },
+ { 0x18, 0xe8, HC11OP(eorb_indy) },
// { 0, 0x03, HC11OP(fdiv) },
- { 0, 0x02, HC11OP(idiv) },
- { 0, 0x4c, HC11OP(inca) },
- { 0, 0x5c, HC11OP(incb) },
- { 0, 0x7c, HC11OP(inc_ext) },
- { 0, 0x6c, HC11OP(inc_indx) },
- { 0x18, 0x6c, HC11OP(inc_indy) },
+ { 0, 0x02, HC11OP(idiv) },
+ { 0, 0x4c, HC11OP(inca) },
+ { 0, 0x5c, HC11OP(incb) },
+ { 0, 0x7c, HC11OP(inc_ext) },
+ { 0, 0x6c, HC11OP(inc_indx) },
+ { 0x18, 0x6c, HC11OP(inc_indy) },
// { 0, 0x31, HC11OP(ins) },
- { 0, 0x08, HC11OP(inx) },
- { 0x18, 0x08, HC11OP(iny) },
- { 0, 0x7e, HC11OP(jmp_ext) },
- { 0, 0x6e, HC11OP(jmp_indx) },
- { 0x18, 0x6e, HC11OP(jmp_indy) },
- { 0, 0x9d, HC11OP(jsr_dir) },
- { 0, 0xbd, HC11OP(jsr_ext) },
- { 0, 0xad, HC11OP(jsr_indx) },
- { 0x18, 0xad, HC11OP(jsr_indy) },
- { 0, 0x86, HC11OP(ldaa_imm) },
- { 0, 0x96, HC11OP(ldaa_dir) },
- { 0, 0xb6, HC11OP(ldaa_ext) },
- { 0, 0xa6, HC11OP(ldaa_indx) },
- { 0x18, 0xa6, HC11OP(ldaa_indy) },
- { 0, 0xc6, HC11OP(ldab_imm) },
- { 0, 0xd6, HC11OP(ldab_dir) },
- { 0, 0xf6, HC11OP(ldab_ext) },
- { 0, 0xe6, HC11OP(ldab_indx) },
- { 0x18, 0xe6, HC11OP(ldab_indy) },
- { 0, 0xcc, HC11OP(ldd_imm) },
- { 0, 0xdc, HC11OP(ldd_dir) },
- { 0, 0xfc, HC11OP(ldd_ext) },
- { 0, 0xec, HC11OP(ldd_indx) },
- { 0x18, 0xec, HC11OP(ldd_indy) },
- { 0, 0x8e, HC11OP(lds_imm) },
- { 0, 0x9e, HC11OP(lds_dir) },
- { 0, 0xbe, HC11OP(lds_ext) },
- { 0, 0xae, HC11OP(lds_indx) },
- { 0x18, 0xae, HC11OP(lds_indy) },
- { 0, 0xce, HC11OP(ldx_imm) },
- { 0, 0xde, HC11OP(ldx_dir) },
- { 0, 0xfe, HC11OP(ldx_ext) },
- { 0, 0xee, HC11OP(ldx_indx) },
- { 0xcd, 0xee, HC11OP(ldx_indy) },
- { 0x18, 0xce, HC11OP(ldy_imm) },
- { 0x18, 0xde, HC11OP(ldy_dir) },
- { 0x18, 0xfe, HC11OP(ldy_ext) },
- { 0x1a, 0xee, HC11OP(ldy_indx) },
- { 0x18, 0xee, HC11OP(ldy_indy) },
- { 0, 0x05, HC11OP(lsld) },
- { 0, 0x44, HC11OP(lsra) },
- { 0, 0x54, HC11OP(lsrb) },
+ { 0, 0x08, HC11OP(inx) },
+ { 0x18, 0x08, HC11OP(iny) },
+ { 0, 0x7e, HC11OP(jmp_ext) },
+ { 0, 0x6e, HC11OP(jmp_indx) },
+ { 0x18, 0x6e, HC11OP(jmp_indy) },
+ { 0, 0x9d, HC11OP(jsr_dir) },
+ { 0, 0xbd, HC11OP(jsr_ext) },
+ { 0, 0xad, HC11OP(jsr_indx) },
+ { 0x18, 0xad, HC11OP(jsr_indy) },
+ { 0, 0x86, HC11OP(ldaa_imm) },
+ { 0, 0x96, HC11OP(ldaa_dir) },
+ { 0, 0xb6, HC11OP(ldaa_ext) },
+ { 0, 0xa6, HC11OP(ldaa_indx) },
+ { 0x18, 0xa6, HC11OP(ldaa_indy) },
+ { 0, 0xc6, HC11OP(ldab_imm) },
+ { 0, 0xd6, HC11OP(ldab_dir) },
+ { 0, 0xf6, HC11OP(ldab_ext) },
+ { 0, 0xe6, HC11OP(ldab_indx) },
+ { 0x18, 0xe6, HC11OP(ldab_indy) },
+ { 0, 0xcc, HC11OP(ldd_imm) },
+ { 0, 0xdc, HC11OP(ldd_dir) },
+ { 0, 0xfc, HC11OP(ldd_ext) },
+ { 0, 0xec, HC11OP(ldd_indx) },
+ { 0x18, 0xec, HC11OP(ldd_indy) },
+ { 0, 0x8e, HC11OP(lds_imm) },
+ { 0, 0x9e, HC11OP(lds_dir) },
+ { 0, 0xbe, HC11OP(lds_ext) },
+ { 0, 0xae, HC11OP(lds_indx) },
+ { 0x18, 0xae, HC11OP(lds_indy) },
+ { 0, 0xce, HC11OP(ldx_imm) },
+ { 0, 0xde, HC11OP(ldx_dir) },
+ { 0, 0xfe, HC11OP(ldx_ext) },
+ { 0, 0xee, HC11OP(ldx_indx) },
+ { 0xcd, 0xee, HC11OP(ldx_indy) },
+ { 0x18, 0xce, HC11OP(ldy_imm) },
+ { 0x18, 0xde, HC11OP(ldy_dir) },
+ { 0x18, 0xfe, HC11OP(ldy_ext) },
+ { 0x1a, 0xee, HC11OP(ldy_indx) },
+ { 0x18, 0xee, HC11OP(ldy_indy) },
+ { 0, 0x05, HC11OP(lsld) },
+ { 0, 0x44, HC11OP(lsra) },
+ { 0, 0x54, HC11OP(lsrb) },
// { 0, 0x74, HC11OP(lsr_ext) },
// { 0, 0x64, HC11OP(lsr_indx) },
// { 0x18, 0x64, HC11OP(lsr_indy) },
- { 0, 0x04, HC11OP(lsrd) },
- { 0, 0x3d, HC11OP(mul) },
- { 0, 0x40, HC11OP(nega) },
- { 0, 0x50, HC11OP(negb) },
- { 0, 0x70, HC11OP(neg_ext) },
- { 0, 0x60, HC11OP(neg_indx) },
- { 0x18, 0x60, HC11OP(neg_indy) },
- { 0, 0x01, HC11OP(nop) },
- { 0, 0x8a, HC11OP(oraa_imm) },
- { 0, 0x9a, HC11OP(oraa_dir) },
- { 0, 0xba, HC11OP(oraa_ext) },
- { 0, 0xaa, HC11OP(oraa_indx) },
- { 0x18, 0xaa, HC11OP(oraa_indy) },
- { 0, 0xca, HC11OP(orab_imm) },
- { 0, 0xda, HC11OP(orab_dir) },
- { 0, 0xfa, HC11OP(orab_ext) },
- { 0, 0xea, HC11OP(orab_indx) },
- { 0x18, 0xea, HC11OP(orab_indy) },
- { 0, 0x36, HC11OP(psha) },
- { 0, 0x37, HC11OP(pshb) },
- { 0, 0x3c, HC11OP(pshx) },
- { 0x18, 0x3c, HC11OP(pshy) },
- { 0, 0x32, HC11OP(pula) },
- { 0, 0x33, HC11OP(pulb) },
- { 0, 0x38, HC11OP(pulx) },
- { 0x18, 0x38, HC11OP(puly) },
- { 0, 0x49, HC11OP(rola) },
- { 0, 0x59, HC11OP(rolb) },
+ { 0, 0x04, HC11OP(lsrd) },
+ { 0, 0x3d, HC11OP(mul) },
+ { 0, 0x40, HC11OP(nega) },
+ { 0, 0x50, HC11OP(negb) },
+ { 0, 0x70, HC11OP(neg_ext) },
+ { 0, 0x60, HC11OP(neg_indx) },
+ { 0x18, 0x60, HC11OP(neg_indy) },
+ { 0, 0x01, HC11OP(nop) },
+ { 0, 0x8a, HC11OP(oraa_imm) },
+ { 0, 0x9a, HC11OP(oraa_dir) },
+ { 0, 0xba, HC11OP(oraa_ext) },
+ { 0, 0xaa, HC11OP(oraa_indx) },
+ { 0x18, 0xaa, HC11OP(oraa_indy) },
+ { 0, 0xca, HC11OP(orab_imm) },
+ { 0, 0xda, HC11OP(orab_dir) },
+ { 0, 0xfa, HC11OP(orab_ext) },
+ { 0, 0xea, HC11OP(orab_indx) },
+ { 0x18, 0xea, HC11OP(orab_indy) },
+ { 0, 0x36, HC11OP(psha) },
+ { 0, 0x37, HC11OP(pshb) },
+ { 0, 0x3c, HC11OP(pshx) },
+ { 0x18, 0x3c, HC11OP(pshy) },
+ { 0, 0x32, HC11OP(pula) },
+ { 0, 0x33, HC11OP(pulb) },
+ { 0, 0x38, HC11OP(pulx) },
+ { 0x18, 0x38, HC11OP(puly) },
+ { 0, 0x49, HC11OP(rola) },
+ { 0, 0x59, HC11OP(rolb) },
{ 0, 0x79, HC11OP(rol_ext) },
{ 0, 0x69, HC11OP(rol_indx) },
{ 0x18, 0x69, HC11OP(rol_indy) },
- { 0, 0x46, HC11OP(rora) },
- { 0, 0x56, HC11OP(rorb) },
+ { 0, 0x46, HC11OP(rora) },
+ { 0, 0x56, HC11OP(rorb) },
// { 0, 0x76, HC11OP(ror_ext) },
// { 0, 0x66, HC11OP(ror_indx) },
// { 0x18, 0x66, HC11OP(ror_indy) },
- { 0, 0x3b, HC11OP(rti) },
- { 0, 0x39, HC11OP(rts) },
- { 0, 0x10, HC11OP(sba) },
- { 0, 0x82, HC11OP(sbca_imm) },
+ { 0, 0x3b, HC11OP(rti) },
+ { 0, 0x39, HC11OP(rts) },
+ { 0, 0x10, HC11OP(sba) },
+ { 0, 0x82, HC11OP(sbca_imm) },
// { 0, 0x92, HC11OP(sbca_dir) },
// { 0, 0xb2, HC11OP(sbca_ext) },
- { 0, 0xa2, HC11OP(sbca_indx) },
- { 0x18, 0xa2, HC11OP(sbca_indy) },
- { 0, 0xc2, HC11OP(sbcb_imm) },
+ { 0, 0xa2, HC11OP(sbca_indx) },
+ { 0x18, 0xa2, HC11OP(sbca_indy) },
+ { 0, 0xc2, HC11OP(sbcb_imm) },
// { 0, 0xd2, HC11OP(sbcb_dir) },
// { 0, 0xf2, HC11OP(sbcb_ext) },
- { 0, 0xe2, HC11OP(sbcb_indx) },
- { 0x18, 0xe2, HC11OP(sbcb_indy) },
- { 0, 0x0d, HC11OP(sec) },
- { 0, 0x0f, HC11OP(sei) },
- { 0, 0x0b, HC11OP(sev) },
- { 0, 0x97, HC11OP(staa_dir) },
- { 0, 0xb7, HC11OP(staa_ext) },
- { 0, 0xa7, HC11OP(staa_indx) },
- { 0x18, 0xa7, HC11OP(staa_indy) },
- { 0, 0xd7, HC11OP(stab_dir) },
- { 0, 0xf7, HC11OP(stab_ext) },
- { 0, 0xe7, HC11OP(stab_indx) },
- { 0x18, 0xe7, HC11OP(stab_indy) },
- { 0, 0xdd, HC11OP(std_dir) },
- { 0, 0xfd, HC11OP(std_ext) },
- { 0, 0xed, HC11OP(std_indx) },
- { 0x18, 0xed, HC11OP(std_indy) },
+ { 0, 0xe2, HC11OP(sbcb_indx) },
+ { 0x18, 0xe2, HC11OP(sbcb_indy) },
+ { 0, 0x0d, HC11OP(sec) },
+ { 0, 0x0f, HC11OP(sei) },
+ { 0, 0x0b, HC11OP(sev) },
+ { 0, 0x97, HC11OP(staa_dir) },
+ { 0, 0xb7, HC11OP(staa_ext) },
+ { 0, 0xa7, HC11OP(staa_indx) },
+ { 0x18, 0xa7, HC11OP(staa_indy) },
+ { 0, 0xd7, HC11OP(stab_dir) },
+ { 0, 0xf7, HC11OP(stab_ext) },
+ { 0, 0xe7, HC11OP(stab_indx) },
+ { 0x18, 0xe7, HC11OP(stab_indy) },
+ { 0, 0xdd, HC11OP(std_dir) },
+ { 0, 0xfd, HC11OP(std_ext) },
+ { 0, 0xed, HC11OP(std_indx) },
+ { 0x18, 0xed, HC11OP(std_indy) },
{ 0, 0x9f, HC11OP(sts_dir) },
// { 0, 0xbf, HC11OP(sts_ext) },
// { 0, 0xaf, HC11OP(sts_indx) },
// { 0x18, 0xaf, HC11OP(sts_indy) },
{ 0, 0xdf, HC11OP(stx_dir) },
- { 0, 0xff, HC11OP(stx_ext) },
- { 0, 0xef, HC11OP(stx_indx) },
- { 0xcd, 0xef, HC11OP(stx_indy) },
+ { 0, 0xff, HC11OP(stx_ext) },
+ { 0, 0xef, HC11OP(stx_indx) },
+ { 0xcd, 0xef, HC11OP(stx_indy) },
{ 0x18, 0xdf, HC11OP(sty_dir) },
- { 0x18, 0xff, HC11OP(sty_ext) },
- { 0x1a, 0xef, HC11OP(sty_indx) },
- { 0x18, 0xef, HC11OP(sty_indy) },
- { 0, 0xcf, HC11OP(stop) },
- { 0, 0x80, HC11OP(suba_imm) },
- { 0, 0x90, HC11OP(suba_dir) },
- { 0, 0xb0, HC11OP(suba_ext) },
- { 0, 0xa0, HC11OP(suba_indx) },
- { 0x18, 0xa0, HC11OP(suba_indy) },
- { 0, 0xc0, HC11OP(subb_imm) },
- { 0, 0xd0, HC11OP(subb_dir) },
- { 0, 0xf0, HC11OP(subb_ext) },
- { 0, 0xe0, HC11OP(subb_indx) },
- { 0x18, 0xe0, HC11OP(subb_indy) },
- { 0, 0x83, HC11OP(subd_imm) },
+ { 0x18, 0xff, HC11OP(sty_ext) },
+ { 0x1a, 0xef, HC11OP(sty_indx) },
+ { 0x18, 0xef, HC11OP(sty_indy) },
+ { 0, 0xcf, HC11OP(stop) },
+ { 0, 0x80, HC11OP(suba_imm) },
+ { 0, 0x90, HC11OP(suba_dir) },
+ { 0, 0xb0, HC11OP(suba_ext) },
+ { 0, 0xa0, HC11OP(suba_indx) },
+ { 0x18, 0xa0, HC11OP(suba_indy) },
+ { 0, 0xc0, HC11OP(subb_imm) },
+ { 0, 0xd0, HC11OP(subb_dir) },
+ { 0, 0xf0, HC11OP(subb_ext) },
+ { 0, 0xe0, HC11OP(subb_indx) },
+ { 0x18, 0xe0, HC11OP(subb_indy) },
+ { 0, 0x83, HC11OP(subd_imm) },
{ 0, 0x93, HC11OP(subd_dir) },
{ 0, 0xb3, HC11OP(subd_ext) },
- { 0, 0xa3, HC11OP(subd_indx) },
- { 0x18, 0xa3, HC11OP(subd_indy) },
- { 0, 0x3f, HC11OP(swi) },
- { 0, 0x16, HC11OP(tab) },
- { 0, 0x06, HC11OP(tap) },
- { 0, 0x17, HC11OP(tba) },
- { 0, 0x00, HC11OP(test) },
- { 0, 0x07, HC11OP(tpa) },
- { 0, 0x4d, HC11OP(tsta) },
- { 0, 0x5d, HC11OP(tstb) },
- { 0, 0x7d, HC11OP(tst_ext) },
- { 0, 0x6d, HC11OP(tst_indx) },
- { 0x18, 0x6d, HC11OP(tst_indy) },
- { 0, 0x30, HC11OP(tsx) },
- { 0x18, 0x30, HC11OP(tsy) },
- { 0, 0x35, HC11OP(txs) },
- { 0x18, 0x35, HC11OP(tys) },
- { 0, 0x3e, HC11OP(wai) },
- { 0, 0x8f, HC11OP(xgdx) },
- { 0x18, 0x8f, HC11OP(xgdy) },
+ { 0, 0xa3, HC11OP(subd_indx) },
+ { 0x18, 0xa3, HC11OP(subd_indy) },
+ { 0, 0x3f, HC11OP(swi) },
+ { 0, 0x16, HC11OP(tab) },
+ { 0, 0x06, HC11OP(tap) },
+ { 0, 0x17, HC11OP(tba) },
+ { 0, 0x00, HC11OP(test) },
+ { 0, 0x07, HC11OP(tpa) },
+ { 0, 0x4d, HC11OP(tsta) },
+ { 0, 0x5d, HC11OP(tstb) },
+ { 0, 0x7d, HC11OP(tst_ext) },
+ { 0, 0x6d, HC11OP(tst_indx) },
+ { 0x18, 0x6d, HC11OP(tst_indy) },
+ { 0, 0x30, HC11OP(tsx) },
+ { 0x18, 0x30, HC11OP(tsy) },
+ { 0, 0x35, HC11OP(txs) },
+ { 0x18, 0x35, HC11OP(tys) },
+ { 0, 0x3e, HC11OP(wai) },
+ { 0, 0x8f, HC11OP(xgdx) },
+ { 0x18, 0x8f, HC11OP(xgdy) },
- { 0, 0x18, HC11OP(page2) },
- { 0, 0x1a, HC11OP(page3) },
- { 0, 0xcd, HC11OP(page4) },
+ { 0, 0x18, HC11OP(page2) },
+ { 0, 0x1a, HC11OP(page3) },
+ { 0, 0xcd, HC11OP(page4) },
};
diff --git a/src/emu/cpu/mc68hc11/mc68hc11.c b/src/emu/cpu/mc68hc11/mc68hc11.c
index 3c9882972f4..0a06445c1dd 100644
--- a/src/emu/cpu/mc68hc11/mc68hc11.c
+++ b/src/emu/cpu/mc68hc11/mc68hc11.c
@@ -25,14 +25,14 @@ enum
HC11_IY
};
-#define CC_S 0x80
-#define CC_X 0x40
-#define CC_H 0x20
-#define CC_I 0x10
-#define CC_N 0x08
-#define CC_Z 0x04
-#define CC_V 0x02
-#define CC_C 0x01
+#define CC_S 0x80
+#define CC_X 0x40
+#define CC_H 0x20
+#define CC_I 0x10
+#define CC_N 0x08
+#define CC_Z 0x04
+#define CC_V 0x02
+#define CC_C 0x01
static const int div_tab[4] = { 1, 4, 8, 16 };
@@ -95,7 +95,7 @@ INLINE hc11_state *get_safe_token(device_t *device)
return (hc11_state *)downcast<legacy_cpu_device *>(device)->token();
}
-#define HC11OP(XX) hc11_##XX
+#define HC11OP(XX) hc11_##XX
/*****************************************************************************/
/* Internal registers */
@@ -106,37 +106,37 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
switch(reg)
{
- case 0x00: /* PORTA */
+ case 0x00: /* PORTA */
return cpustate->io->read_byte(MC68HC11_IO_PORTA);
- case 0x01: /* DDRA */
+ case 0x01: /* DDRA */
return 0;
- case 0x02: /* PIOC */
+ case 0x02: /* PIOC */
return 0;
- case 0x03: /* PORTC */
+ case 0x03: /* PORTC */
return cpustate->io->read_byte(MC68HC11_IO_PORTC);
- case 0x04: /* PORTB */
+ case 0x04: /* PORTB */
return cpustate->io->read_byte(MC68HC11_IO_PORTB);
- case 0x08: /* PORTD */
+ case 0x08: /* PORTD */
return cpustate->io->read_byte(MC68HC11_IO_PORTD);
- case 0x09: /* DDRD */
+ case 0x09: /* DDRD */
return 0;
- case 0x0a: /* PORTE */
+ case 0x0a: /* PORTE */
return cpustate->io->read_byte(MC68HC11_IO_PORTE);
- case 0x0e: /* TCNT */
+ case 0x0e: /* TCNT */
return cpustate->tcnt >> 8;
case 0x0f:
return cpustate->tcnt & 0xff;
- case 0x16: /* TOC1 */
+ case 0x16: /* TOC1 */
return cpustate->toc1 >> 8;
case 0x17:
return cpustate->toc1 & 0xff;
case 0x23:
return cpustate->tflg1;
- case 0x28: /* SPCR1 */
+ case 0x28: /* SPCR1 */
return 0;
- case 0x30: /* ADCTL */
+ case 0x30: /* ADCTL */
return 0x80;
- case 0x31: /* ADR1 */
+ case 0x31: /* ADR1 */
{
if (cpustate->adctl & 0x10)
{
@@ -147,7 +147,7 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
- case 0x32: /* ADR2 */
+ case 0x32: /* ADR2 */
{
if (cpustate->adctl & 0x10)
{
@@ -158,7 +158,7 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
- case 0x33: /* ADR3 */
+ case 0x33: /* ADR3 */
{
if (cpustate->adctl & 0x10)
{
@@ -169,7 +169,7 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
- case 0x34: /* ADR4 */
+ case 0x34: /* ADR4 */
{
if (cpustate->adctl & 0x10)
{
@@ -180,33 +180,33 @@ static UINT8 hc11_regs_r(hc11_state *cpustate, UINT32 address)
return cpustate->io->read_byte((cpustate->adctl & 0x7) + MC68HC11_IO_AD0);
}
}
- case 0x38: /* OPT2 */
+ case 0x38: /* OPT2 */
return 0;
- case 0x70: /* SCBDH */
+ case 0x70: /* SCBDH */
return 0;
- case 0x71: /* SCBDL */
+ case 0x71: /* SCBDL */
return 0;
- case 0x72: /* SCCR1 */
+ case 0x72: /* SCCR1 */
return 0;
- case 0x73: /* SCCR2 */
+ case 0x73: /* SCCR2 */
return 0;
- case 0x74: /* SCSR1 */
+ case 0x74: /* SCSR1 */
return 0x40;
- case 0x7c: /* PORTH */
+ case 0x7c: /* PORTH */
return cpustate->io->read_byte(MC68HC11_IO_PORTH);
- case 0x7e: /* PORTG */
+ case 0x7e: /* PORTG */
return cpustate->io->read_byte(MC68HC11_IO_PORTG);
- case 0x7f: /* DDRG */
+ case 0x7f: /* DDRG */
return 0;
- case 0x88: /* SPCR2 */
+ case 0x88: /* SPCR2 */
return 0;
- case 0x89: /* SPSR2 */
+ case 0x89: /* SPSR2 */
return 0x80;
- case 0x8a: /* SPDR2 */
+ case 0x8a: /* SPDR2 */
return cpustate->io->read_byte(MC68HC11_IO_SPI2_DATA);
- case 0x8b: /* OPT4 */
+ case 0x8b: /* OPT4 */
return 0;
}
@@ -220,60 +220,60 @@ static void hc11_regs_w(hc11_state *cpustate, UINT32 address, UINT8 value)
switch(reg)
{
- case 0x00: /* PORTA */
+ case 0x00: /* PORTA */
cpustate->io->write_byte(MC68HC11_IO_PORTA, value);
return;
- case 0x01: /* DDRA */
+ case 0x01: /* DDRA */
//mame_printf_debug("HC11: ddra = %02X\n", value);
return;
- case 0x03: /* PORTC */
+ case 0x03: /* PORTC */
cpustate->io->write_byte(MC68HC11_IO_PORTC, value);
return;
- case 0x04: /* PORTC */
+ case 0x04: /* PORTC */
cpustate->io->write_byte(MC68HC11_IO_PORTB, value);
return;
- case 0x08: /* PORTD */
+ case 0x08: /* PORTD */
cpustate->io->write_byte(MC68HC11_IO_PORTD, value); //mask & 0x3f?
return;
- case 0x09: /* DDRD */
+ case 0x09: /* DDRD */
//mame_printf_debug("HC11: ddrd = %02X\n", value);
return;
- case 0x0a: /* PORTE */
+ case 0x0a: /* PORTE */
cpustate->io->write_byte(MC68HC11_IO_PORTE, value);
return;
- case 0x0e: /* TCNT */
+ case 0x0e: /* TCNT */
case 0x0f:
logerror("HC11: TCNT register write %02x %02x!\n",address,value);
return;
- case 0x16: /* TOC1 */
+ case 0x16: /* TOC1 */
/* TODO: inhibit for one bus cycle */
cpustate->toc1 = (value << 8) | (cpustate->toc1 & 0xff);
return;
case 0x17:
cpustate->toc1 = (value & 0xff) | (cpustate->toc1 & 0xff00);
return;
- case 0x22: /* TMSK1 */
+ case 0x22: /* TMSK1 */
cpustate->tmsk1 = value;
return;
case 0x23:
cpustate->tflg1 &= ~value;
return;
- case 0x24: /* TMSK2 */
+ case 0x24: /* TMSK2 */
cpustate->pr = value & 3;
return;
- case 0x28: /* SPCR1 */
+ case 0x28: /* SPCR1 */
return;
- case 0x30: /* ADCTL */
+ case 0x30: /* ADCTL */
cpustate->adctl = value;
return;
- case 0x38: /* OPT2 */
+ case 0x38: /* OPT2 */
return;
- case 0x39: /* OPTION */
+ case 0x39: /* OPTION */
return;
- case 0x3a: /* COPRST (watchdog) */
+ case 0x3a: /* COPRST (watchdog) */
return;
- case 0x3d: /* INIT */
+ case 0x3d: /* INIT */
{
int reg_page = value & 0xf;
int ram_page = (value >> 4) & 0xf;
@@ -288,41 +288,41 @@ static void hc11_regs_w(hc11_state *cpustate, UINT32 address, UINT8 value)
return;
}
- case 0x3f: /* CONFIG */
+ case 0x3f: /* CONFIG */
return;
- case 0x70: /* SCBDH */
+ case 0x70: /* SCBDH */
return;
- case 0x71: /* SCBDL */
+ case 0x71: /* SCBDL */
return;
- case 0x72: /* SCCR1 */
+ case 0x72: /* SCCR1 */
return;
- case 0x73: /* SCCR2 */
+ case 0x73: /* SCCR2 */
return;
- case 0x77: /* SCDRL */
+ case 0x77: /* SCDRL */
return;
- case 0x7c: /* PORTH */
+ case 0x7c: /* PORTH */
cpustate->io->write_byte(MC68HC11_IO_PORTH, value);
return;
- case 0x7d: /* DDRH */
+ case 0x7d: /* DDRH */
//mame_printf_debug("HC11: ddrh = %02X at %04X\n", value, cpustate->pc);
return;
- case 0x7e: /* PORTG */
+ case 0x7e: /* PORTG */
cpustate->io->write_byte(MC68HC11_IO_PORTG, value);
return;
- case 0x7f: /* DDRG */
+ case 0x7f: /* DDRG */
//mame_printf_debug("HC11: ddrg = %02X at %04X\n", value, cpustate->pc);
return;
- case 0x88: /* SPCR2 */
+ case 0x88: /* SPCR2 */
return;
- case 0x89: /* SPSR2 */
+ case 0x89: /* SPSR2 */
return;
- case 0x8a: /* SPDR2 */
+ case 0x8a: /* SPDR2 */
cpustate->io->write_byte(MC68HC11_IO_SPI2_DATA, value);
return;
- case 0x8b: /* OPT4 */
+ case 0x8b: /* OPT4 */
return;
}
@@ -627,17 +627,17 @@ static CPU_SET_INFO( mc68hc11 )
switch (state)
{
- case CPUINFO_INT_INPUT_STATE + MC68HC11_IRQ_LINE: set_irq_line(cpustate, MC68HC11_IRQ_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MC68HC11_TOC1_LINE: set_irq_line(cpustate, MC68HC11_TOC1_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MC68HC11_IRQ_LINE: set_irq_line(cpustate, MC68HC11_IRQ_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MC68HC11_TOC1_LINE: set_irq_line(cpustate, MC68HC11_TOC1_LINE, info->i); break;
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + HC11_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + HC11_SP: cpustate->sp = info->i; break;
- case CPUINFO_INT_REGISTER + HC11_A: cpustate->d.d8.a = info->i; break;
- case CPUINFO_INT_REGISTER + HC11_B: cpustate->d.d8.b = info->i; break;
- case CPUINFO_INT_REGISTER + HC11_IX: cpustate->ix = info->i; break;
- case CPUINFO_INT_REGISTER + HC11_IY: cpustate->iy = info->i; break;
+ case CPUINFO_INT_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + HC11_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + HC11_SP: cpustate->sp = info->i; break;
+ case CPUINFO_INT_REGISTER + HC11_A: cpustate->d.d8.a = info->i; break;
+ case CPUINFO_INT_REGISTER + HC11_B: cpustate->d.d8.b = info->i; break;
+ case CPUINFO_INT_REGISTER + HC11_IX: cpustate->ix = info->i; break;
+ case CPUINFO_INT_REGISTER + HC11_IY: cpustate->iy = info->i; break;
}
}
@@ -648,56 +648,56 @@ CPU_GET_INFO( mc68hc11 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(hc11_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 41; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + MC68HC11_IRQ_LINE: info->i = cpustate->irq_state[MC68HC11_IRQ_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + MC68HC11_TOC1_LINE: info->i = cpustate->irq_state[MC68HC11_TOC1_LINE]; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
-
- case CPUINFO_INT_PC: /* intentional fallthrough */
- case CPUINFO_INT_REGISTER + HC11_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + HC11_SP: info->i = cpustate->sp; break;
- case CPUINFO_INT_REGISTER + HC11_A: info->i = cpustate->d.d8.a; break;
- case CPUINFO_INT_REGISTER + HC11_B: info->i = cpustate->d.d8.b; break;
- case CPUINFO_INT_REGISTER + HC11_IX: info->i = cpustate->ix; break;
- case CPUINFO_INT_REGISTER + HC11_IY: info->i = cpustate->iy; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(hc11_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 41; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + MC68HC11_IRQ_LINE: info->i = cpustate->irq_state[MC68HC11_IRQ_LINE]; break;
+ case CPUINFO_INT_INPUT_STATE + MC68HC11_TOC1_LINE: info->i = cpustate->irq_state[MC68HC11_TOC1_LINE]; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+
+ case CPUINFO_INT_PC: /* intentional fallthrough */
+ case CPUINFO_INT_REGISTER + HC11_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + HC11_SP: info->i = cpustate->sp; break;
+ case CPUINFO_INT_REGISTER + HC11_A: info->i = cpustate->d.d8.a; break;
+ case CPUINFO_INT_REGISTER + HC11_B: info->i = cpustate->d.d8.b; break;
+ case CPUINFO_INT_REGISTER + HC11_IX: info->i = cpustate->ix; break;
+ case CPUINFO_INT_REGISTER + HC11_IY: info->i = cpustate->iy; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mc68hc11); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hc11); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(hc11); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(hc11); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(hc11); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hc11); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mc68hc11); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(hc11); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(hc11); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(hc11); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(hc11); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(hc11); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MC68HC11"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola MC68HC11"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MC68HC11"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Motorola MC68HC11"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -711,12 +711,12 @@ CPU_GET_INFO( mc68hc11 )
(cpustate->ccr & CC_C) ? 'C' : '.');
break;
- case CPUINFO_STR_REGISTER + HC11_PC: sprintf(info->s, "PC: %04X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + HC11_SP: sprintf(info->s, "SP: %04X", cpustate->sp); break;
- case CPUINFO_STR_REGISTER + HC11_A: sprintf(info->s, "A: %02X", cpustate->d.d8.a); break;
- case CPUINFO_STR_REGISTER + HC11_B: sprintf(info->s, "B: %02X", cpustate->d.d8.b); break;
- case CPUINFO_STR_REGISTER + HC11_IX: sprintf(info->s, "IX: %04X", cpustate->ix); break;
- case CPUINFO_STR_REGISTER + HC11_IY: sprintf(info->s, "IY: %04X", cpustate->iy); break;
+ case CPUINFO_STR_REGISTER + HC11_PC: sprintf(info->s, "PC: %04X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + HC11_SP: sprintf(info->s, "SP: %04X", cpustate->sp); break;
+ case CPUINFO_STR_REGISTER + HC11_A: sprintf(info->s, "A: %02X", cpustate->d.d8.a); break;
+ case CPUINFO_STR_REGISTER + HC11_B: sprintf(info->s, "B: %02X", cpustate->d.d8.b); break;
+ case CPUINFO_STR_REGISTER + HC11_IX: sprintf(info->s, "IX: %04X", cpustate->ix); break;
+ case CPUINFO_STR_REGISTER + HC11_IY: sprintf(info->s, "IY: %04X", cpustate->iy); break;
}
}
diff --git a/src/emu/cpu/mc68hc11/mc68hc11.h b/src/emu/cpu/mc68hc11/mc68hc11.h
index dd31004c7e3..1fa4cd7a1a9 100644
--- a/src/emu/cpu/mc68hc11/mc68hc11.h
+++ b/src/emu/cpu/mc68hc11/mc68hc11.h
@@ -9,27 +9,27 @@ CPU_DISASSEMBLE( hc11 );
DECLARE_LEGACY_CPU_DEVICE(MC68HC11, mc68hc11);
-#define MC68HC11_IO_PORTA 0x00
-#define MC68HC11_IO_PORTB 0x01
-#define MC68HC11_IO_PORTC 0x02
-#define MC68HC11_IO_PORTD 0x03
-#define MC68HC11_IO_PORTE 0x04
-#define MC68HC11_IO_PORTF 0x05
-#define MC68HC11_IO_PORTG 0x06
-#define MC68HC11_IO_PORTH 0x07
-#define MC68HC11_IO_SPI1_DATA 0x08
-#define MC68HC11_IO_SPI2_DATA 0x09
-#define MC68HC11_IO_AD0 0x10
-#define MC68HC11_IO_AD1 0x11
-#define MC68HC11_IO_AD2 0x12
-#define MC68HC11_IO_AD3 0x13
-#define MC68HC11_IO_AD4 0x14
-#define MC68HC11_IO_AD5 0x15
-#define MC68HC11_IO_AD6 0x16
-#define MC68HC11_IO_AD7 0x17
-
-#define MC68HC11_IRQ_LINE 0
-#define MC68HC11_TOC1_LINE 1
+#define MC68HC11_IO_PORTA 0x00
+#define MC68HC11_IO_PORTB 0x01
+#define MC68HC11_IO_PORTC 0x02
+#define MC68HC11_IO_PORTD 0x03
+#define MC68HC11_IO_PORTE 0x04
+#define MC68HC11_IO_PORTF 0x05
+#define MC68HC11_IO_PORTG 0x06
+#define MC68HC11_IO_PORTH 0x07
+#define MC68HC11_IO_SPI1_DATA 0x08
+#define MC68HC11_IO_SPI2_DATA 0x09
+#define MC68HC11_IO_AD0 0x10
+#define MC68HC11_IO_AD1 0x11
+#define MC68HC11_IO_AD2 0x12
+#define MC68HC11_IO_AD3 0x13
+#define MC68HC11_IO_AD4 0x14
+#define MC68HC11_IO_AD5 0x15
+#define MC68HC11_IO_AD6 0x16
+#define MC68HC11_IO_AD7 0x17
+
+#define MC68HC11_IRQ_LINE 0
+#define MC68HC11_TOC1_LINE 1
struct hc11_config
{
diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c
index 5567026d267..f64adefb16e 100644
--- a/src/emu/cpu/mcs48/mcs48.c
+++ b/src/emu/cpu/mcs48/mcs48.c
@@ -82,34 +82,34 @@ T0 output clock
***************************************************************************/
/* timer/counter enable bits */
-#define TIMER_ENABLED 0x01
-#define COUNTER_ENABLED 0x02
+#define TIMER_ENABLED 0x01
+#define COUNTER_ENABLED 0x02
/* flag bits */
-#define C_FLAG 0x80
-#define A_FLAG 0x40
-#define F_FLAG 0x20
-#define B_FLAG 0x10
+#define C_FLAG 0x80
+#define A_FLAG 0x40
+#define F_FLAG 0x20
+#define B_FLAG 0x10
/* status bits (UPI-41) */
-#define STS_F1 0x08
-#define STS_F0 0x04
-#define STS_IBF 0x02
-#define STS_OBF 0x01
+#define STS_F1 0x08
+#define STS_F0 0x04
+#define STS_IBF 0x02
+#define STS_OBF 0x01
/* port 2 bits (UPI-41) */
-#define P2_OBF 0x10
-#define P2_NIBF 0x20
-#define P2_DRQ 0x40
-#define P2_NDACK 0x80
+#define P2_OBF 0x10
+#define P2_NIBF 0x20
+#define P2_DRQ 0x40
+#define P2_NDACK 0x80
/* enable bits (UPI-41) */
-#define ENABLE_FLAGS 0x01
-#define ENABLE_DMA 0x02
+#define ENABLE_FLAGS 0x01
+#define ENABLE_DMA 0x02
/* feature masks */
-#define MCS48_FEATURE 0x01
-#define UPI41_FEATURE 0x02
+#define MCS48_FEATURE 0x01
+#define UPI41_FEATURE 0x02
@@ -120,48 +120,48 @@ T0 output clock
/* live processor state */
struct mcs48_state
{
- UINT16 prevpc; /* 16-bit previous program counter */
- UINT16 pc; /* 16-bit program counter */
-
- UINT8 a; /* 8-bit accumulator */
- UINT8 * regptr; /* pointer to r0-r7 */
- UINT8 psw; /* 8-bit cpustate->psw */
- UINT8 p1; /* 8-bit latched port 1 */
- UINT8 p2; /* 8-bit latched port 2 */
- UINT8 ea; /* 1-bit latched ea input */
- UINT8 timer; /* 8-bit timer */
- UINT8 prescaler; /* 5-bit timer prescaler */
- UINT8 t1_history; /* 8-bit history of the T1 input */
- UINT8 sts; /* 8-bit status register (UPI-41 only, except for F1) */
- UINT8 dbbi; /* 8-bit input data buffer (UPI-41 only) */
- UINT8 dbbo; /* 8-bit output data buffer (UPI-41 only) */
-
- UINT8 irq_state; /* TRUE if an IRQ is pending */
- UINT8 irq_in_progress; /* TRUE if an IRQ is in progress */
- UINT8 timer_overflow; /* TRUE on a timer overflow; cleared by taking interrupt */
- UINT8 timer_flag; /* TRUE on a timer overflow; cleared on JTF */
- UINT8 tirq_enabled; /* TRUE if the timer IRQ is enabled */
- UINT8 xirq_enabled; /* TRUE if the external IRQ is enabled */
- UINT8 timecount_enabled; /* bitmask of timer/counter enabled */
- UINT8 flags_enabled; /* TRUE if I/O flags have been enabled (UPI-41 only) */
- UINT8 dma_enabled; /* TRUE if DMA has been enabled (UPI-41 only) */
-
- UINT16 a11; /* A11 value, either 0x000 or 0x800 */
+ UINT16 prevpc; /* 16-bit previous program counter */
+ UINT16 pc; /* 16-bit program counter */
+
+ UINT8 a; /* 8-bit accumulator */
+ UINT8 * regptr; /* pointer to r0-r7 */
+ UINT8 psw; /* 8-bit cpustate->psw */
+ UINT8 p1; /* 8-bit latched port 1 */
+ UINT8 p2; /* 8-bit latched port 2 */
+ UINT8 ea; /* 1-bit latched ea input */
+ UINT8 timer; /* 8-bit timer */
+ UINT8 prescaler; /* 5-bit timer prescaler */
+ UINT8 t1_history; /* 8-bit history of the T1 input */
+ UINT8 sts; /* 8-bit status register (UPI-41 only, except for F1) */
+ UINT8 dbbi; /* 8-bit input data buffer (UPI-41 only) */
+ UINT8 dbbo; /* 8-bit output data buffer (UPI-41 only) */
+
+ UINT8 irq_state; /* TRUE if an IRQ is pending */
+ UINT8 irq_in_progress; /* TRUE if an IRQ is in progress */
+ UINT8 timer_overflow; /* TRUE on a timer overflow; cleared by taking interrupt */
+ UINT8 timer_flag; /* TRUE on a timer overflow; cleared on JTF */
+ UINT8 tirq_enabled; /* TRUE if the timer IRQ is enabled */
+ UINT8 xirq_enabled; /* TRUE if the external IRQ is enabled */
+ UINT8 timecount_enabled; /* bitmask of timer/counter enabled */
+ UINT8 flags_enabled; /* TRUE if I/O flags have been enabled (UPI-41 only) */
+ UINT8 dma_enabled; /* TRUE if DMA has been enabled (UPI-41 only) */
+
+ UINT16 a11; /* A11 value, either 0x000 or 0x800 */
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
- int icount;
+ int icount;
/* Memory spaces */
- address_space *program;
- direct_read_data *direct;
- address_space *data;
- address_space *io;
+ address_space *program;
+ direct_read_data *direct;
+ address_space *data;
+ address_space *io;
- UINT8 feature_mask; /* processor feature flags */
- UINT16 int_rom_size; /* internal rom size */
+ UINT8 feature_mask; /* processor feature flags */
+ UINT16 int_rom_size; /* internal rom size */
- UINT8 rtemp; /* temporary for import/export */
+ UINT8 rtemp; /* temporary for import/export */
};
@@ -175,33 +175,33 @@ typedef int (*mcs48_ophandler)(mcs48_state *state);
***************************************************************************/
/* ROM is mapped to AS_PROGRAM */
-#define program_r(a) cpustate->program->read_byte(a)
+#define program_r(a) cpustate->program->read_byte(a)
/* RAM is mapped to AS_DATA */
-#define ram_r(a) cpustate->data->read_byte(a)
-#define ram_w(a,V) cpustate->data->write_byte(a, V)
+#define ram_r(a) cpustate->data->read_byte(a)
+#define ram_w(a,V) cpustate->data->write_byte(a, V)
/* ports are mapped to AS_IO */
-#define ext_r(a) cpustate->io->read_byte(a)
-#define ext_w(a,V) cpustate->io->write_byte(a, V)
-#define port_r(a) cpustate->io->read_byte(MCS48_PORT_P0 + a)
-#define port_w(a,V) cpustate->io->write_byte(MCS48_PORT_P0 + a, V)
-#define test_r(a) cpustate->io->read_byte(MCS48_PORT_T0 + a)
-#define test_w(a,V) cpustate->io->write_byte(MCS48_PORT_T0 + a, V)
-#define bus_r() cpustate->io->read_byte(MCS48_PORT_BUS)
-#define bus_w(V) cpustate->io->write_byte(MCS48_PORT_BUS, V)
-#define ea_r() cpustate->io->read_byte(MCS48_PORT_EA)
-#define prog_w(V) cpustate->io->write_byte(MCS48_PORT_PROG, V)
+#define ext_r(a) cpustate->io->read_byte(a)
+#define ext_w(a,V) cpustate->io->write_byte(a, V)
+#define port_r(a) cpustate->io->read_byte(MCS48_PORT_P0 + a)
+#define port_w(a,V) cpustate->io->write_byte(MCS48_PORT_P0 + a, V)
+#define test_r(a) cpustate->io->read_byte(MCS48_PORT_T0 + a)
+#define test_w(a,V) cpustate->io->write_byte(MCS48_PORT_T0 + a, V)
+#define bus_r() cpustate->io->read_byte(MCS48_PORT_BUS)
+#define bus_w(V) cpustate->io->write_byte(MCS48_PORT_BUS, V)
+#define ea_r() cpustate->io->read_byte(MCS48_PORT_EA)
+#define prog_w(V) cpustate->io->write_byte(MCS48_PORT_PROG, V)
/* r0-r7 map to memory via the regptr */
-#define R0 regptr[0]
-#define R1 regptr[1]
-#define R2 regptr[2]
-#define R3 regptr[3]
-#define R4 regptr[4]
-#define R5 regptr[5]
-#define R6 regptr[6]
-#define R7 regptr[7]
+#define R0 regptr[0]
+#define R1 regptr[1]
+#define R2 regptr[2]
+#define R3 regptr[3]
+#define R4 regptr[4]
+#define R5 regptr[5]
+#define R6 regptr[6]
+#define R7 regptr[7]
@@ -221,24 +221,24 @@ INLINE mcs48_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8021 ||
- device->type() == I8022 ||
- device->type() == I8035 ||
- device->type() == I8048 ||
- device->type() == I8648 ||
- device->type() == I8748 ||
- device->type() == I8039 ||
- device->type() == I8049 ||
- device->type() == I8749 ||
- device->type() == I8040 ||
- device->type() == I8050 ||
- device->type() == I8041 ||
- device->type() == I8741 ||
- device->type() == I8042 ||
- device->type() == I8242 ||
- device->type() == I8742 ||
- device->type() == MB8884 ||
- device->type() == N7751 ||
- device->type() == M58715);
+ device->type() == I8022 ||
+ device->type() == I8035 ||
+ device->type() == I8048 ||
+ device->type() == I8648 ||
+ device->type() == I8748 ||
+ device->type() == I8039 ||
+ device->type() == I8049 ||
+ device->type() == I8749 ||
+ device->type() == I8040 ||
+ device->type() == I8050 ||
+ device->type() == I8041 ||
+ device->type() == I8741 ||
+ device->type() == I8042 ||
+ device->type() == I8242 ||
+ device->type() == I8742 ||
+ device->type() == MB8884 ||
+ device->type() == N7751 ||
+ device->type() == M58715);
return (mcs48_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -451,68 +451,68 @@ OPHANDLER( illegal )
return 1;
}
-OPHANDLER( add_a_r0 ) { execute_add(cpustate, cpustate->R0); return 1; }
-OPHANDLER( add_a_r1 ) { execute_add(cpustate, cpustate->R1); return 1; }
-OPHANDLER( add_a_r2 ) { execute_add(cpustate, cpustate->R2); return 1; }
-OPHANDLER( add_a_r3 ) { execute_add(cpustate, cpustate->R3); return 1; }
-OPHANDLER( add_a_r4 ) { execute_add(cpustate, cpustate->R4); return 1; }
-OPHANDLER( add_a_r5 ) { execute_add(cpustate, cpustate->R5); return 1; }
-OPHANDLER( add_a_r6 ) { execute_add(cpustate, cpustate->R6); return 1; }
-OPHANDLER( add_a_r7 ) { execute_add(cpustate, cpustate->R7); return 1; }
-OPHANDLER( add_a_xr0 ) { execute_add(cpustate, ram_r(cpustate->R0)); return 1; }
-OPHANDLER( add_a_xr1 ) { execute_add(cpustate, ram_r(cpustate->R1)); return 1; }
-OPHANDLER( add_a_n ) { execute_add(cpustate, argument_fetch(cpustate)); return 2; }
-
-OPHANDLER( adc_a_r0 ) { execute_addc(cpustate, cpustate->R0); return 1; }
-OPHANDLER( adc_a_r1 ) { execute_addc(cpustate, cpustate->R1); return 1; }
-OPHANDLER( adc_a_r2 ) { execute_addc(cpustate, cpustate->R2); return 1; }
-OPHANDLER( adc_a_r3 ) { execute_addc(cpustate, cpustate->R3); return 1; }
-OPHANDLER( adc_a_r4 ) { execute_addc(cpustate, cpustate->R4); return 1; }
-OPHANDLER( adc_a_r5 ) { execute_addc(cpustate, cpustate->R5); return 1; }
-OPHANDLER( adc_a_r6 ) { execute_addc(cpustate, cpustate->R6); return 1; }
-OPHANDLER( adc_a_r7 ) { execute_addc(cpustate, cpustate->R7); return 1; }
-OPHANDLER( adc_a_xr0 ) { execute_addc(cpustate, ram_r(cpustate->R0)); return 1; }
-OPHANDLER( adc_a_xr1 ) { execute_addc(cpustate, ram_r(cpustate->R1)); return 1; }
-OPHANDLER( adc_a_n ) { execute_addc(cpustate, argument_fetch(cpustate)); return 2; }
-
-OPHANDLER( anl_a_r0 ) { cpustate->a &= cpustate->R0; return 1; }
-OPHANDLER( anl_a_r1 ) { cpustate->a &= cpustate->R1; return 1; }
-OPHANDLER( anl_a_r2 ) { cpustate->a &= cpustate->R2; return 1; }
-OPHANDLER( anl_a_r3 ) { cpustate->a &= cpustate->R3; return 1; }
-OPHANDLER( anl_a_r4 ) { cpustate->a &= cpustate->R4; return 1; }
-OPHANDLER( anl_a_r5 ) { cpustate->a &= cpustate->R5; return 1; }
-OPHANDLER( anl_a_r6 ) { cpustate->a &= cpustate->R6; return 1; }
-OPHANDLER( anl_a_r7 ) { cpustate->a &= cpustate->R7; return 1; }
-OPHANDLER( anl_a_xr0 ) { cpustate->a &= ram_r(cpustate->R0); return 1; }
-OPHANDLER( anl_a_xr1 ) { cpustate->a &= ram_r(cpustate->R1); return 1; }
-OPHANDLER( anl_a_n ) { cpustate->a &= argument_fetch(cpustate); return 2; }
-
-OPHANDLER( anl_bus_n ) { bus_w(bus_r() & argument_fetch(cpustate)); return 2; }
-OPHANDLER( anl_p1_n ) { port_w(1, cpustate->p1 &= argument_fetch(cpustate)); return 2; }
-OPHANDLER( anl_p2_n ) { port_w(2, cpustate->p2 &= argument_fetch(cpustate) | ~p2_mask(cpustate)); return 2; }
-OPHANDLER( anld_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 4); return 2; }
-OPHANDLER( anld_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 5); return 2; }
-OPHANDLER( anld_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 6); return 2; }
-OPHANDLER( anld_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 7); return 2; }
-
-OPHANDLER( call_0 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x000); return 2; }
-OPHANDLER( call_1 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x100); return 2; }
-OPHANDLER( call_2 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x200); return 2; }
-OPHANDLER( call_3 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x300); return 2; }
-OPHANDLER( call_4 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x400); return 2; }
-OPHANDLER( call_5 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x500); return 2; }
-OPHANDLER( call_6 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x600); return 2; }
-OPHANDLER( call_7 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x700); return 2; }
-
-OPHANDLER( clr_a ) { cpustate->a = 0; return 1; }
-OPHANDLER( clr_c ) { cpustate->psw &= ~C_FLAG; return 1; }
-OPHANDLER( clr_f0 ) { cpustate->psw &= ~F_FLAG; cpustate->sts &= ~STS_F0; return 1; }
-OPHANDLER( clr_f1 ) { cpustate->sts &= ~STS_F1; return 1; }
-
-OPHANDLER( cpl_a ) { cpustate->a ^= 0xff; return 1; }
-OPHANDLER( cpl_c ) { cpustate->psw ^= C_FLAG; return 1; }
-OPHANDLER( cpl_f0 ) { cpustate->psw ^= F_FLAG; cpustate->sts ^= STS_F0; return 1; }
-OPHANDLER( cpl_f1 ) { cpustate->sts ^= STS_F1; return 1; }
+OPHANDLER( add_a_r0 ) { execute_add(cpustate, cpustate->R0); return 1; }
+OPHANDLER( add_a_r1 ) { execute_add(cpustate, cpustate->R1); return 1; }
+OPHANDLER( add_a_r2 ) { execute_add(cpustate, cpustate->R2); return 1; }
+OPHANDLER( add_a_r3 ) { execute_add(cpustate, cpustate->R3); return 1; }
+OPHANDLER( add_a_r4 ) { execute_add(cpustate, cpustate->R4); return 1; }
+OPHANDLER( add_a_r5 ) { execute_add(cpustate, cpustate->R5); return 1; }
+OPHANDLER( add_a_r6 ) { execute_add(cpustate, cpustate->R6); return 1; }
+OPHANDLER( add_a_r7 ) { execute_add(cpustate, cpustate->R7); return 1; }
+OPHANDLER( add_a_xr0 ) { execute_add(cpustate, ram_r(cpustate->R0)); return 1; }
+OPHANDLER( add_a_xr1 ) { execute_add(cpustate, ram_r(cpustate->R1)); return 1; }
+OPHANDLER( add_a_n ) { execute_add(cpustate, argument_fetch(cpustate)); return 2; }
+
+OPHANDLER( adc_a_r0 ) { execute_addc(cpustate, cpustate->R0); return 1; }
+OPHANDLER( adc_a_r1 ) { execute_addc(cpustate, cpustate->R1); return 1; }
+OPHANDLER( adc_a_r2 ) { execute_addc(cpustate, cpustate->R2); return 1; }
+OPHANDLER( adc_a_r3 ) { execute_addc(cpustate, cpustate->R3); return 1; }
+OPHANDLER( adc_a_r4 ) { execute_addc(cpustate, cpustate->R4); return 1; }
+OPHANDLER( adc_a_r5 ) { execute_addc(cpustate, cpustate->R5); return 1; }
+OPHANDLER( adc_a_r6 ) { execute_addc(cpustate, cpustate->R6); return 1; }
+OPHANDLER( adc_a_r7 ) { execute_addc(cpustate, cpustate->R7); return 1; }
+OPHANDLER( adc_a_xr0 ) { execute_addc(cpustate, ram_r(cpustate->R0)); return 1; }
+OPHANDLER( adc_a_xr1 ) { execute_addc(cpustate, ram_r(cpustate->R1)); return 1; }
+OPHANDLER( adc_a_n ) { execute_addc(cpustate, argument_fetch(cpustate)); return 2; }
+
+OPHANDLER( anl_a_r0 ) { cpustate->a &= cpustate->R0; return 1; }
+OPHANDLER( anl_a_r1 ) { cpustate->a &= cpustate->R1; return 1; }
+OPHANDLER( anl_a_r2 ) { cpustate->a &= cpustate->R2; return 1; }
+OPHANDLER( anl_a_r3 ) { cpustate->a &= cpustate->R3; return 1; }
+OPHANDLER( anl_a_r4 ) { cpustate->a &= cpustate->R4; return 1; }
+OPHANDLER( anl_a_r5 ) { cpustate->a &= cpustate->R5; return 1; }
+OPHANDLER( anl_a_r6 ) { cpustate->a &= cpustate->R6; return 1; }
+OPHANDLER( anl_a_r7 ) { cpustate->a &= cpustate->R7; return 1; }
+OPHANDLER( anl_a_xr0 ) { cpustate->a &= ram_r(cpustate->R0); return 1; }
+OPHANDLER( anl_a_xr1 ) { cpustate->a &= ram_r(cpustate->R1); return 1; }
+OPHANDLER( anl_a_n ) { cpustate->a &= argument_fetch(cpustate); return 2; }
+
+OPHANDLER( anl_bus_n ) { bus_w(bus_r() & argument_fetch(cpustate)); return 2; }
+OPHANDLER( anl_p1_n ) { port_w(1, cpustate->p1 &= argument_fetch(cpustate)); return 2; }
+OPHANDLER( anl_p2_n ) { port_w(2, cpustate->p2 &= argument_fetch(cpustate) | ~p2_mask(cpustate)); return 2; }
+OPHANDLER( anld_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 4); return 2; }
+OPHANDLER( anld_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 5); return 2; }
+OPHANDLER( anld_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 6); return 2; }
+OPHANDLER( anld_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_AND, 7); return 2; }
+
+OPHANDLER( call_0 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x000); return 2; }
+OPHANDLER( call_1 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x100); return 2; }
+OPHANDLER( call_2 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x200); return 2; }
+OPHANDLER( call_3 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x300); return 2; }
+OPHANDLER( call_4 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x400); return 2; }
+OPHANDLER( call_5 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x500); return 2; }
+OPHANDLER( call_6 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x600); return 2; }
+OPHANDLER( call_7 ) { execute_call(cpustate, argument_fetch(cpustate) | 0x700); return 2; }
+
+OPHANDLER( clr_a ) { cpustate->a = 0; return 1; }
+OPHANDLER( clr_c ) { cpustate->psw &= ~C_FLAG; return 1; }
+OPHANDLER( clr_f0 ) { cpustate->psw &= ~F_FLAG; cpustate->sts &= ~STS_F0; return 1; }
+OPHANDLER( clr_f1 ) { cpustate->sts &= ~STS_F1; return 1; }
+
+OPHANDLER( cpl_a ) { cpustate->a ^= 0xff; return 1; }
+OPHANDLER( cpl_c ) { cpustate->psw ^= C_FLAG; return 1; }
+OPHANDLER( cpl_f0 ) { cpustate->psw ^= F_FLAG; cpustate->sts ^= STS_F0; return 1; }
+OPHANDLER( cpl_f1 ) { cpustate->sts ^= STS_F1; return 1; }
OPHANDLER( da_a )
{
@@ -532,41 +532,41 @@ OPHANDLER( da_a )
return 1;
}
-OPHANDLER( dec_a ) { cpustate->a--; return 1; }
-OPHANDLER( dec_r0 ) { cpustate->R0--; return 1; }
-OPHANDLER( dec_r1 ) { cpustate->R1--; return 1; }
-OPHANDLER( dec_r2 ) { cpustate->R2--; return 1; }
-OPHANDLER( dec_r3 ) { cpustate->R3--; return 1; }
-OPHANDLER( dec_r4 ) { cpustate->R4--; return 1; }
-OPHANDLER( dec_r5 ) { cpustate->R5--; return 1; }
-OPHANDLER( dec_r6 ) { cpustate->R6--; return 1; }
-OPHANDLER( dec_r7 ) { cpustate->R7--; return 1; }
-
-OPHANDLER( dis_i ) { cpustate->xirq_enabled = FALSE; return 1; }
-OPHANDLER( dis_tcnti ) { cpustate->tirq_enabled = FALSE; cpustate->timer_overflow = FALSE; return 1; }
-
-OPHANDLER( djnz_r0 ) { execute_jcc(cpustate, --cpustate->R0 != 0); return 2; }
-OPHANDLER( djnz_r1 ) { execute_jcc(cpustate, --cpustate->R1 != 0); return 2; }
-OPHANDLER( djnz_r2 ) { execute_jcc(cpustate, --cpustate->R2 != 0); return 2; }
-OPHANDLER( djnz_r3 ) { execute_jcc(cpustate, --cpustate->R3 != 0); return 2; }
-OPHANDLER( djnz_r4 ) { execute_jcc(cpustate, --cpustate->R4 != 0); return 2; }
-OPHANDLER( djnz_r5 ) { execute_jcc(cpustate, --cpustate->R5 != 0); return 2; }
-OPHANDLER( djnz_r6 ) { execute_jcc(cpustate, --cpustate->R6 != 0); return 2; }
-OPHANDLER( djnz_r7 ) { execute_jcc(cpustate, --cpustate->R7 != 0); return 2; }
-
-OPHANDLER( en_i ) { cpustate->xirq_enabled = TRUE; return 1 + check_irqs(cpustate); }
-OPHANDLER( en_tcnti ) { cpustate->tirq_enabled = TRUE; return 1 + check_irqs(cpustate); }
-OPHANDLER( en_dma ) { cpustate->dma_enabled = TRUE; port_w(2, cpustate->p2); return 1; }
-OPHANDLER( en_flags ) { cpustate->flags_enabled = TRUE; port_w(2, cpustate->p2); return 1; }
+OPHANDLER( dec_a ) { cpustate->a--; return 1; }
+OPHANDLER( dec_r0 ) { cpustate->R0--; return 1; }
+OPHANDLER( dec_r1 ) { cpustate->R1--; return 1; }
+OPHANDLER( dec_r2 ) { cpustate->R2--; return 1; }
+OPHANDLER( dec_r3 ) { cpustate->R3--; return 1; }
+OPHANDLER( dec_r4 ) { cpustate->R4--; return 1; }
+OPHANDLER( dec_r5 ) { cpustate->R5--; return 1; }
+OPHANDLER( dec_r6 ) { cpustate->R6--; return 1; }
+OPHANDLER( dec_r7 ) { cpustate->R7--; return 1; }
+
+OPHANDLER( dis_i ) { cpustate->xirq_enabled = FALSE; return 1; }
+OPHANDLER( dis_tcnti ) { cpustate->tirq_enabled = FALSE; cpustate->timer_overflow = FALSE; return 1; }
+
+OPHANDLER( djnz_r0 ) { execute_jcc(cpustate, --cpustate->R0 != 0); return 2; }
+OPHANDLER( djnz_r1 ) { execute_jcc(cpustate, --cpustate->R1 != 0); return 2; }
+OPHANDLER( djnz_r2 ) { execute_jcc(cpustate, --cpustate->R2 != 0); return 2; }
+OPHANDLER( djnz_r3 ) { execute_jcc(cpustate, --cpustate->R3 != 0); return 2; }
+OPHANDLER( djnz_r4 ) { execute_jcc(cpustate, --cpustate->R4 != 0); return 2; }
+OPHANDLER( djnz_r5 ) { execute_jcc(cpustate, --cpustate->R5 != 0); return 2; }
+OPHANDLER( djnz_r6 ) { execute_jcc(cpustate, --cpustate->R6 != 0); return 2; }
+OPHANDLER( djnz_r7 ) { execute_jcc(cpustate, --cpustate->R7 != 0); return 2; }
+
+OPHANDLER( en_i ) { cpustate->xirq_enabled = TRUE; return 1 + check_irqs(cpustate); }
+OPHANDLER( en_tcnti ) { cpustate->tirq_enabled = TRUE; return 1 + check_irqs(cpustate); }
+OPHANDLER( en_dma ) { cpustate->dma_enabled = TRUE; port_w(2, cpustate->p2); return 1; }
+OPHANDLER( en_flags ) { cpustate->flags_enabled = TRUE; port_w(2, cpustate->p2); return 1; }
OPHANDLER( ent0_clk )
{
logerror("MCS-48 PC:%04X - Unimplemented opcode = %02x\n", cpustate->pc - 1, program_r(cpustate->pc - 1));
return 1;
}
-OPHANDLER( in_a_p1 ) { cpustate->a = port_r(1) & cpustate->p1; return 2; }
-OPHANDLER( in_a_p2 ) { cpustate->a = port_r(2) & cpustate->p2; return 2; }
-OPHANDLER( ins_a_bus ) { cpustate->a = bus_r(); return 2; }
+OPHANDLER( in_a_p1 ) { cpustate->a = port_r(1) & cpustate->p1; return 2; }
+OPHANDLER( in_a_p2 ) { cpustate->a = port_r(2) & cpustate->p2; return 2; }
+OPHANDLER( ins_a_bus ) { cpustate->a = bus_r(); return 2; }
OPHANDLER( in_a_dbb )
{
/* acknowledge the IBF IRQ and clear the bit in STS */
@@ -581,131 +581,131 @@ OPHANDLER( in_a_dbb )
return 2;
}
-OPHANDLER( inc_a ) { cpustate->a++; return 1; }
-OPHANDLER( inc_r0 ) { cpustate->R0++; return 1; }
-OPHANDLER( inc_r1 ) { cpustate->R1++; return 1; }
-OPHANDLER( inc_r2 ) { cpustate->R2++; return 1; }
-OPHANDLER( inc_r3 ) { cpustate->R3++; return 1; }
-OPHANDLER( inc_r4 ) { cpustate->R4++; return 1; }
-OPHANDLER( inc_r5 ) { cpustate->R5++; return 1; }
-OPHANDLER( inc_r6 ) { cpustate->R6++; return 1; }
-OPHANDLER( inc_r7 ) { cpustate->R7++; return 1; }
-OPHANDLER( inc_xr0 ) { ram_w(cpustate->R0, ram_r(cpustate->R0) + 1); return 1; }
-OPHANDLER( inc_xr1 ) { ram_w(cpustate->R1, ram_r(cpustate->R1) + 1); return 1; }
-
-OPHANDLER( jb_0 ) { execute_jcc(cpustate, (cpustate->a & 0x01) != 0); return 2; }
-OPHANDLER( jb_1 ) { execute_jcc(cpustate, (cpustate->a & 0x02) != 0); return 2; }
-OPHANDLER( jb_2 ) { execute_jcc(cpustate, (cpustate->a & 0x04) != 0); return 2; }
-OPHANDLER( jb_3 ) { execute_jcc(cpustate, (cpustate->a & 0x08) != 0); return 2; }
-OPHANDLER( jb_4 ) { execute_jcc(cpustate, (cpustate->a & 0x10) != 0); return 2; }
-OPHANDLER( jb_5 ) { execute_jcc(cpustate, (cpustate->a & 0x20) != 0); return 2; }
-OPHANDLER( jb_6 ) { execute_jcc(cpustate, (cpustate->a & 0x40) != 0); return 2; }
-OPHANDLER( jb_7 ) { execute_jcc(cpustate, (cpustate->a & 0x80) != 0); return 2; }
-OPHANDLER( jc ) { execute_jcc(cpustate, (cpustate->psw & C_FLAG) != 0); return 2; }
-OPHANDLER( jf0 ) { execute_jcc(cpustate, (cpustate->psw & F_FLAG) != 0); return 2; }
-OPHANDLER( jf1 ) { execute_jcc(cpustate, (cpustate->sts & STS_F1) != 0); return 2; }
-OPHANDLER( jnc ) { execute_jcc(cpustate, (cpustate->psw & C_FLAG) == 0); return 2; }
-OPHANDLER( jni ) { execute_jcc(cpustate, cpustate->irq_state != 0); return 2; }
-OPHANDLER( jnibf ) { execute_jcc(cpustate, (cpustate->sts & STS_IBF) == 0); return 2; }
-OPHANDLER( jnt_0 ) { execute_jcc(cpustate, test_r(0) == 0); return 2; }
-OPHANDLER( jnt_1 ) { execute_jcc(cpustate, test_r(1) == 0); return 2; }
-OPHANDLER( jnz ) { execute_jcc(cpustate, cpustate->a != 0); return 2; }
-OPHANDLER( jobf ) { execute_jcc(cpustate, (cpustate->sts & STS_OBF) != 0); return 2; }
-OPHANDLER( jtf ) { execute_jcc(cpustate, cpustate->timer_flag); cpustate->timer_flag = FALSE; return 2; }
-OPHANDLER( jt_0 ) { execute_jcc(cpustate, test_r(0) != 0); return 2; }
-OPHANDLER( jt_1 ) { execute_jcc(cpustate, test_r(1) != 0); return 2; }
-OPHANDLER( jz ) { execute_jcc(cpustate, cpustate->a == 0); return 2; }
-
-OPHANDLER( jmp_0 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x000); return 2; }
-OPHANDLER( jmp_1 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x100); return 2; }
-OPHANDLER( jmp_2 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x200); return 2; }
-OPHANDLER( jmp_3 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x300); return 2; }
-OPHANDLER( jmp_4 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x400); return 2; }
-OPHANDLER( jmp_5 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x500); return 2; }
-OPHANDLER( jmp_6 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x600); return 2; }
-OPHANDLER( jmp_7 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x700); return 2; }
-OPHANDLER( jmpp_xa ) { cpustate->pc &= 0xf00; cpustate->pc |= program_r(cpustate->pc | cpustate->a); return 2; }
-
-OPHANDLER( mov_a_n ) { cpustate->a = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_a_psw ) { cpustate->a = cpustate->psw; return 1; }
-OPHANDLER( mov_a_r0 ) { cpustate->a = cpustate->R0; return 1; }
-OPHANDLER( mov_a_r1 ) { cpustate->a = cpustate->R1; return 1; }
-OPHANDLER( mov_a_r2 ) { cpustate->a = cpustate->R2; return 1; }
-OPHANDLER( mov_a_r3 ) { cpustate->a = cpustate->R3; return 1; }
-OPHANDLER( mov_a_r4 ) { cpustate->a = cpustate->R4; return 1; }
-OPHANDLER( mov_a_r5 ) { cpustate->a = cpustate->R5; return 1; }
-OPHANDLER( mov_a_r6 ) { cpustate->a = cpustate->R6; return 1; }
-OPHANDLER( mov_a_r7 ) { cpustate->a = cpustate->R7; return 1; }
-OPHANDLER( mov_a_xr0 ) { cpustate->a = ram_r(cpustate->R0); return 1; }
-OPHANDLER( mov_a_xr1 ) { cpustate->a = ram_r(cpustate->R1); return 1; }
-OPHANDLER( mov_a_t ) { cpustate->a = cpustate->timer; return 1; }
-
-OPHANDLER( mov_psw_a ) { cpustate->psw = cpustate->a; update_regptr(cpustate); return 1; }
-OPHANDLER( mov_sts_a ) { cpustate->sts = (cpustate->sts & 0x0f) | (cpustate->a & 0xf0); return 1; }
-OPHANDLER( mov_r0_a ) { cpustate->R0 = cpustate->a; return 1; }
-OPHANDLER( mov_r1_a ) { cpustate->R1 = cpustate->a; return 1; }
-OPHANDLER( mov_r2_a ) { cpustate->R2 = cpustate->a; return 1; }
-OPHANDLER( mov_r3_a ) { cpustate->R3 = cpustate->a; return 1; }
-OPHANDLER( mov_r4_a ) { cpustate->R4 = cpustate->a; return 1; }
-OPHANDLER( mov_r5_a ) { cpustate->R5 = cpustate->a; return 1; }
-OPHANDLER( mov_r6_a ) { cpustate->R6 = cpustate->a; return 1; }
-OPHANDLER( mov_r7_a ) { cpustate->R7 = cpustate->a; return 1; }
-OPHANDLER( mov_r0_n ) { cpustate->R0 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_r1_n ) { cpustate->R1 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_r2_n ) { cpustate->R2 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_r3_n ) { cpustate->R3 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_r4_n ) { cpustate->R4 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_r5_n ) { cpustate->R5 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_r6_n ) { cpustate->R6 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_r7_n ) { cpustate->R7 = argument_fetch(cpustate); return 2; }
-OPHANDLER( mov_t_a ) { cpustate->timer = cpustate->a; return 1; }
-OPHANDLER( mov_xr0_a ) { ram_w(cpustate->R0, cpustate->a); return 1; }
-OPHANDLER( mov_xr1_a ) { ram_w(cpustate->R1, cpustate->a); return 1; }
-OPHANDLER( mov_xr0_n ) { ram_w(cpustate->R0, argument_fetch(cpustate)); return 2; }
-OPHANDLER( mov_xr1_n ) { ram_w(cpustate->R1, argument_fetch(cpustate)); return 2; }
-
-OPHANDLER( movd_a_p4 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 4); return 2; }
-OPHANDLER( movd_a_p5 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 5); return 2; }
-OPHANDLER( movd_a_p6 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 6); return 2; }
-OPHANDLER( movd_a_p7 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 7); return 2; }
-OPHANDLER( movd_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 4); return 2; }
-OPHANDLER( movd_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 5); return 2; }
-OPHANDLER( movd_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 6); return 2; }
-OPHANDLER( movd_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 7); return 2; }
-
-OPHANDLER( movp_a_xa ) { cpustate->a = program_r((cpustate->pc & 0xf00) | cpustate->a); return 2; }
-OPHANDLER( movp3_a_xa ) { cpustate->a = program_r(0x300 | cpustate->a); return 2; }
-
-OPHANDLER( movx_a_xr0 ) { cpustate->a = ext_r(cpustate->R0); return 2; }
-OPHANDLER( movx_a_xr1 ) { cpustate->a = ext_r(cpustate->R1); return 2; }
-OPHANDLER( movx_xr0_a ) { ext_w(cpustate->R0, cpustate->a); return 2; }
-OPHANDLER( movx_xr1_a ) { ext_w(cpustate->R1, cpustate->a); return 2; }
-
-OPHANDLER( nop ) { return 1; }
-
-OPHANDLER( orl_a_r0 ) { cpustate->a |= cpustate->R0; return 1; }
-OPHANDLER( orl_a_r1 ) { cpustate->a |= cpustate->R1; return 1; }
-OPHANDLER( orl_a_r2 ) { cpustate->a |= cpustate->R2; return 1; }
-OPHANDLER( orl_a_r3 ) { cpustate->a |= cpustate->R3; return 1; }
-OPHANDLER( orl_a_r4 ) { cpustate->a |= cpustate->R4; return 1; }
-OPHANDLER( orl_a_r5 ) { cpustate->a |= cpustate->R5; return 1; }
-OPHANDLER( orl_a_r6 ) { cpustate->a |= cpustate->R6; return 1; }
-OPHANDLER( orl_a_r7 ) { cpustate->a |= cpustate->R7; return 1; }
-OPHANDLER( orl_a_xr0 ) { cpustate->a |= ram_r(cpustate->R0); return 1; }
-OPHANDLER( orl_a_xr1 ) { cpustate->a |= ram_r(cpustate->R1); return 1; }
-OPHANDLER( orl_a_n ) { cpustate->a |= argument_fetch(cpustate); return 2; }
-
-OPHANDLER( orl_bus_n ) { bus_w(bus_r() | argument_fetch(cpustate)); return 2; }
-OPHANDLER( orl_p1_n ) { port_w(1, cpustate->p1 |= argument_fetch(cpustate)); return 2; }
-OPHANDLER( orl_p2_n ) { port_w(2, cpustate->p2 |= argument_fetch(cpustate) & p2_mask(cpustate)); return 2; }
-OPHANDLER( orld_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 4); return 2; }
-OPHANDLER( orld_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 5); return 2; }
-OPHANDLER( orld_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 6); return 2; }
-OPHANDLER( orld_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 7); return 2; }
-
-OPHANDLER( outl_bus_a ) { bus_w(cpustate->a); return 2; }
-OPHANDLER( outl_p1_a ) { port_w(1, cpustate->p1 = cpustate->a); return 2; }
-OPHANDLER( outl_p2_a ) { UINT8 mask = p2_mask(cpustate); port_w(2, cpustate->p2 = (cpustate->p2 & ~mask) | (cpustate->a & mask)); return 2; }
+OPHANDLER( inc_a ) { cpustate->a++; return 1; }
+OPHANDLER( inc_r0 ) { cpustate->R0++; return 1; }
+OPHANDLER( inc_r1 ) { cpustate->R1++; return 1; }
+OPHANDLER( inc_r2 ) { cpustate->R2++; return 1; }
+OPHANDLER( inc_r3 ) { cpustate->R3++; return 1; }
+OPHANDLER( inc_r4 ) { cpustate->R4++; return 1; }
+OPHANDLER( inc_r5 ) { cpustate->R5++; return 1; }
+OPHANDLER( inc_r6 ) { cpustate->R6++; return 1; }
+OPHANDLER( inc_r7 ) { cpustate->R7++; return 1; }
+OPHANDLER( inc_xr0 ) { ram_w(cpustate->R0, ram_r(cpustate->R0) + 1); return 1; }
+OPHANDLER( inc_xr1 ) { ram_w(cpustate->R1, ram_r(cpustate->R1) + 1); return 1; }
+
+OPHANDLER( jb_0 ) { execute_jcc(cpustate, (cpustate->a & 0x01) != 0); return 2; }
+OPHANDLER( jb_1 ) { execute_jcc(cpustate, (cpustate->a & 0x02) != 0); return 2; }
+OPHANDLER( jb_2 ) { execute_jcc(cpustate, (cpustate->a & 0x04) != 0); return 2; }
+OPHANDLER( jb_3 ) { execute_jcc(cpustate, (cpustate->a & 0x08) != 0); return 2; }
+OPHANDLER( jb_4 ) { execute_jcc(cpustate, (cpustate->a & 0x10) != 0); return 2; }
+OPHANDLER( jb_5 ) { execute_jcc(cpustate, (cpustate->a & 0x20) != 0); return 2; }
+OPHANDLER( jb_6 ) { execute_jcc(cpustate, (cpustate->a & 0x40) != 0); return 2; }
+OPHANDLER( jb_7 ) { execute_jcc(cpustate, (cpustate->a & 0x80) != 0); return 2; }
+OPHANDLER( jc ) { execute_jcc(cpustate, (cpustate->psw & C_FLAG) != 0); return 2; }
+OPHANDLER( jf0 ) { execute_jcc(cpustate, (cpustate->psw & F_FLAG) != 0); return 2; }
+OPHANDLER( jf1 ) { execute_jcc(cpustate, (cpustate->sts & STS_F1) != 0); return 2; }
+OPHANDLER( jnc ) { execute_jcc(cpustate, (cpustate->psw & C_FLAG) == 0); return 2; }
+OPHANDLER( jni ) { execute_jcc(cpustate, cpustate->irq_state != 0); return 2; }
+OPHANDLER( jnibf ) { execute_jcc(cpustate, (cpustate->sts & STS_IBF) == 0); return 2; }
+OPHANDLER( jnt_0 ) { execute_jcc(cpustate, test_r(0) == 0); return 2; }
+OPHANDLER( jnt_1 ) { execute_jcc(cpustate, test_r(1) == 0); return 2; }
+OPHANDLER( jnz ) { execute_jcc(cpustate, cpustate->a != 0); return 2; }
+OPHANDLER( jobf ) { execute_jcc(cpustate, (cpustate->sts & STS_OBF) != 0); return 2; }
+OPHANDLER( jtf ) { execute_jcc(cpustate, cpustate->timer_flag); cpustate->timer_flag = FALSE; return 2; }
+OPHANDLER( jt_0 ) { execute_jcc(cpustate, test_r(0) != 0); return 2; }
+OPHANDLER( jt_1 ) { execute_jcc(cpustate, test_r(1) != 0); return 2; }
+OPHANDLER( jz ) { execute_jcc(cpustate, cpustate->a == 0); return 2; }
+
+OPHANDLER( jmp_0 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x000); return 2; }
+OPHANDLER( jmp_1 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x100); return 2; }
+OPHANDLER( jmp_2 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x200); return 2; }
+OPHANDLER( jmp_3 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x300); return 2; }
+OPHANDLER( jmp_4 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x400); return 2; }
+OPHANDLER( jmp_5 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x500); return 2; }
+OPHANDLER( jmp_6 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x600); return 2; }
+OPHANDLER( jmp_7 ) { execute_jmp(cpustate, argument_fetch(cpustate) | 0x700); return 2; }
+OPHANDLER( jmpp_xa ) { cpustate->pc &= 0xf00; cpustate->pc |= program_r(cpustate->pc | cpustate->a); return 2; }
+
+OPHANDLER( mov_a_n ) { cpustate->a = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_a_psw ) { cpustate->a = cpustate->psw; return 1; }
+OPHANDLER( mov_a_r0 ) { cpustate->a = cpustate->R0; return 1; }
+OPHANDLER( mov_a_r1 ) { cpustate->a = cpustate->R1; return 1; }
+OPHANDLER( mov_a_r2 ) { cpustate->a = cpustate->R2; return 1; }
+OPHANDLER( mov_a_r3 ) { cpustate->a = cpustate->R3; return 1; }
+OPHANDLER( mov_a_r4 ) { cpustate->a = cpustate->R4; return 1; }
+OPHANDLER( mov_a_r5 ) { cpustate->a = cpustate->R5; return 1; }
+OPHANDLER( mov_a_r6 ) { cpustate->a = cpustate->R6; return 1; }
+OPHANDLER( mov_a_r7 ) { cpustate->a = cpustate->R7; return 1; }
+OPHANDLER( mov_a_xr0 ) { cpustate->a = ram_r(cpustate->R0); return 1; }
+OPHANDLER( mov_a_xr1 ) { cpustate->a = ram_r(cpustate->R1); return 1; }
+OPHANDLER( mov_a_t ) { cpustate->a = cpustate->timer; return 1; }
+
+OPHANDLER( mov_psw_a ) { cpustate->psw = cpustate->a; update_regptr(cpustate); return 1; }
+OPHANDLER( mov_sts_a ) { cpustate->sts = (cpustate->sts & 0x0f) | (cpustate->a & 0xf0); return 1; }
+OPHANDLER( mov_r0_a ) { cpustate->R0 = cpustate->a; return 1; }
+OPHANDLER( mov_r1_a ) { cpustate->R1 = cpustate->a; return 1; }
+OPHANDLER( mov_r2_a ) { cpustate->R2 = cpustate->a; return 1; }
+OPHANDLER( mov_r3_a ) { cpustate->R3 = cpustate->a; return 1; }
+OPHANDLER( mov_r4_a ) { cpustate->R4 = cpustate->a; return 1; }
+OPHANDLER( mov_r5_a ) { cpustate->R5 = cpustate->a; return 1; }
+OPHANDLER( mov_r6_a ) { cpustate->R6 = cpustate->a; return 1; }
+OPHANDLER( mov_r7_a ) { cpustate->R7 = cpustate->a; return 1; }
+OPHANDLER( mov_r0_n ) { cpustate->R0 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_r1_n ) { cpustate->R1 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_r2_n ) { cpustate->R2 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_r3_n ) { cpustate->R3 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_r4_n ) { cpustate->R4 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_r5_n ) { cpustate->R5 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_r6_n ) { cpustate->R6 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_r7_n ) { cpustate->R7 = argument_fetch(cpustate); return 2; }
+OPHANDLER( mov_t_a ) { cpustate->timer = cpustate->a; return 1; }
+OPHANDLER( mov_xr0_a ) { ram_w(cpustate->R0, cpustate->a); return 1; }
+OPHANDLER( mov_xr1_a ) { ram_w(cpustate->R1, cpustate->a); return 1; }
+OPHANDLER( mov_xr0_n ) { ram_w(cpustate->R0, argument_fetch(cpustate)); return 2; }
+OPHANDLER( mov_xr1_n ) { ram_w(cpustate->R1, argument_fetch(cpustate)); return 2; }
+
+OPHANDLER( movd_a_p4 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 4); return 2; }
+OPHANDLER( movd_a_p5 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 5); return 2; }
+OPHANDLER( movd_a_p6 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 6); return 2; }
+OPHANDLER( movd_a_p7 ) { expander_operation(cpustate, MCS48_EXPANDER_OP_READ, 7); return 2; }
+OPHANDLER( movd_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 4); return 2; }
+OPHANDLER( movd_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 5); return 2; }
+OPHANDLER( movd_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 6); return 2; }
+OPHANDLER( movd_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_WRITE, 7); return 2; }
+
+OPHANDLER( movp_a_xa ) { cpustate->a = program_r((cpustate->pc & 0xf00) | cpustate->a); return 2; }
+OPHANDLER( movp3_a_xa ) { cpustate->a = program_r(0x300 | cpustate->a); return 2; }
+
+OPHANDLER( movx_a_xr0 ) { cpustate->a = ext_r(cpustate->R0); return 2; }
+OPHANDLER( movx_a_xr1 ) { cpustate->a = ext_r(cpustate->R1); return 2; }
+OPHANDLER( movx_xr0_a ) { ext_w(cpustate->R0, cpustate->a); return 2; }
+OPHANDLER( movx_xr1_a ) { ext_w(cpustate->R1, cpustate->a); return 2; }
+
+OPHANDLER( nop ) { return 1; }
+
+OPHANDLER( orl_a_r0 ) { cpustate->a |= cpustate->R0; return 1; }
+OPHANDLER( orl_a_r1 ) { cpustate->a |= cpustate->R1; return 1; }
+OPHANDLER( orl_a_r2 ) { cpustate->a |= cpustate->R2; return 1; }
+OPHANDLER( orl_a_r3 ) { cpustate->a |= cpustate->R3; return 1; }
+OPHANDLER( orl_a_r4 ) { cpustate->a |= cpustate->R4; return 1; }
+OPHANDLER( orl_a_r5 ) { cpustate->a |= cpustate->R5; return 1; }
+OPHANDLER( orl_a_r6 ) { cpustate->a |= cpustate->R6; return 1; }
+OPHANDLER( orl_a_r7 ) { cpustate->a |= cpustate->R7; return 1; }
+OPHANDLER( orl_a_xr0 ) { cpustate->a |= ram_r(cpustate->R0); return 1; }
+OPHANDLER( orl_a_xr1 ) { cpustate->a |= ram_r(cpustate->R1); return 1; }
+OPHANDLER( orl_a_n ) { cpustate->a |= argument_fetch(cpustate); return 2; }
+
+OPHANDLER( orl_bus_n ) { bus_w(bus_r() | argument_fetch(cpustate)); return 2; }
+OPHANDLER( orl_p1_n ) { port_w(1, cpustate->p1 |= argument_fetch(cpustate)); return 2; }
+OPHANDLER( orl_p2_n ) { port_w(2, cpustate->p2 |= argument_fetch(cpustate) & p2_mask(cpustate)); return 2; }
+OPHANDLER( orld_p4_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 4); return 2; }
+OPHANDLER( orld_p5_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 5); return 2; }
+OPHANDLER( orld_p6_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 6); return 2; }
+OPHANDLER( orld_p7_a ) { expander_operation(cpustate, MCS48_EXPANDER_OP_OR, 7); return 2; }
+
+OPHANDLER( outl_bus_a ) { bus_w(cpustate->a); return 2; }
+OPHANDLER( outl_p1_a ) { port_w(1, cpustate->p1 = cpustate->a); return 2; }
+OPHANDLER( outl_p2_a ) { UINT8 mask = p2_mask(cpustate); port_w(2, cpustate->p2 = (cpustate->p2 & ~mask) | (cpustate->a & mask)); return 2; }
OPHANDLER( out_dbb_a )
{
/* copy to the DBBO and update the bit in STS */
@@ -719,7 +719,7 @@ OPHANDLER( out_dbb_a )
}
-OPHANDLER( ret ) { pull_pc(cpustate); return 2; }
+OPHANDLER( ret ) { pull_pc(cpustate); return 2; }
OPHANDLER( retr )
{
pull_pc_psw(cpustate);
@@ -729,50 +729,50 @@ OPHANDLER( retr )
return 2 + check_irqs(cpustate);
}
-OPHANDLER( rl_a ) { cpustate->a = (cpustate->a << 1) | (cpustate->a >> 7); return 1; }
-OPHANDLER( rlc_a ) { UINT8 newc = cpustate->a & C_FLAG; cpustate->a = (cpustate->a << 1) | (cpustate->psw >> 7); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; }
+OPHANDLER( rl_a ) { cpustate->a = (cpustate->a << 1) | (cpustate->a >> 7); return 1; }
+OPHANDLER( rlc_a ) { UINT8 newc = cpustate->a & C_FLAG; cpustate->a = (cpustate->a << 1) | (cpustate->psw >> 7); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; }
-OPHANDLER( rr_a ) { cpustate->a = (cpustate->a >> 1) | (cpustate->a << 7); return 1; }
-OPHANDLER( rrc_a ) { UINT8 newc = (cpustate->a << 7) & C_FLAG; cpustate->a = (cpustate->a >> 1) | (cpustate->psw & C_FLAG); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; }
+OPHANDLER( rr_a ) { cpustate->a = (cpustate->a >> 1) | (cpustate->a << 7); return 1; }
+OPHANDLER( rrc_a ) { UINT8 newc = (cpustate->a << 7) & C_FLAG; cpustate->a = (cpustate->a >> 1) | (cpustate->psw & C_FLAG); cpustate->psw = (cpustate->psw & ~C_FLAG) | newc; return 1; }
-OPHANDLER( sel_mb0 ) { cpustate->a11 = 0x000; return 1; }
-OPHANDLER( sel_mb1 ) { cpustate->a11 = 0x800; return 1; }
+OPHANDLER( sel_mb0 ) { cpustate->a11 = 0x000; return 1; }
+OPHANDLER( sel_mb1 ) { cpustate->a11 = 0x800; return 1; }
-OPHANDLER( sel_rb0 ) { cpustate->psw &= ~B_FLAG; update_regptr(cpustate); return 1; }
-OPHANDLER( sel_rb1 ) { cpustate->psw |= B_FLAG; update_regptr(cpustate); return 1; }
+OPHANDLER( sel_rb0 ) { cpustate->psw &= ~B_FLAG; update_regptr(cpustate); return 1; }
+OPHANDLER( sel_rb1 ) { cpustate->psw |= B_FLAG; update_regptr(cpustate); return 1; }
-OPHANDLER( stop_tcnt ) { cpustate->timecount_enabled = 0; return 1; }
+OPHANDLER( stop_tcnt ) { cpustate->timecount_enabled = 0; return 1; }
-OPHANDLER( strt_cnt ) { cpustate->timecount_enabled = COUNTER_ENABLED; cpustate->t1_history = test_r(1); return 1; }
-OPHANDLER( strt_t ) { cpustate->timecount_enabled = TIMER_ENABLED; cpustate->prescaler = 0; return 1; }
+OPHANDLER( strt_cnt ) { cpustate->timecount_enabled = COUNTER_ENABLED; cpustate->t1_history = test_r(1); return 1; }
+OPHANDLER( strt_t ) { cpustate->timecount_enabled = TIMER_ENABLED; cpustate->prescaler = 0; return 1; }
-OPHANDLER( swap_a ) { cpustate->a = (cpustate->a << 4) | (cpustate->a >> 4); return 1; }
+OPHANDLER( swap_a ) { cpustate->a = (cpustate->a << 4) | (cpustate->a >> 4); return 1; }
-OPHANDLER( xch_a_r0 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R0; cpustate->R0 = tmp; return 1; }
-OPHANDLER( xch_a_r1 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R1; cpustate->R1 = tmp; return 1; }
-OPHANDLER( xch_a_r2 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R2; cpustate->R2 = tmp; return 1; }
-OPHANDLER( xch_a_r3 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R3; cpustate->R3 = tmp; return 1; }
-OPHANDLER( xch_a_r4 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R4; cpustate->R4 = tmp; return 1; }
-OPHANDLER( xch_a_r5 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R5; cpustate->R5 = tmp; return 1; }
-OPHANDLER( xch_a_r6 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R6; cpustate->R6 = tmp; return 1; }
-OPHANDLER( xch_a_r7 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R7; cpustate->R7 = tmp; return 1; }
-OPHANDLER( xch_a_xr0 ) { UINT8 tmp = cpustate->a; cpustate->a = ram_r(cpustate->R0); ram_w(cpustate->R0, tmp); return 1; }
-OPHANDLER( xch_a_xr1 ) { UINT8 tmp = cpustate->a; cpustate->a = ram_r(cpustate->R1); ram_w(cpustate->R1, tmp); return 1; }
+OPHANDLER( xch_a_r0 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R0; cpustate->R0 = tmp; return 1; }
+OPHANDLER( xch_a_r1 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R1; cpustate->R1 = tmp; return 1; }
+OPHANDLER( xch_a_r2 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R2; cpustate->R2 = tmp; return 1; }
+OPHANDLER( xch_a_r3 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R3; cpustate->R3 = tmp; return 1; }
+OPHANDLER( xch_a_r4 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R4; cpustate->R4 = tmp; return 1; }
+OPHANDLER( xch_a_r5 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R5; cpustate->R5 = tmp; return 1; }
+OPHANDLER( xch_a_r6 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R6; cpustate->R6 = tmp; return 1; }
+OPHANDLER( xch_a_r7 ) { UINT8 tmp = cpustate->a; cpustate->a = cpustate->R7; cpustate->R7 = tmp; return 1; }
+OPHANDLER( xch_a_xr0 ) { UINT8 tmp = cpustate->a; cpustate->a = ram_r(cpustate->R0); ram_w(cpustate->R0, tmp); return 1; }
+OPHANDLER( xch_a_xr1 ) { UINT8 tmp = cpustate->a; cpustate->a = ram_r(cpustate->R1); ram_w(cpustate->R1, tmp); return 1; }
-OPHANDLER( xchd_a_xr0 ) { UINT8 oldram = ram_r(cpustate->R0); ram_w(cpustate->R0, (oldram & 0xf0) | (cpustate->a & 0x0f)); cpustate->a = (cpustate->a & 0xf0) | (oldram & 0x0f); return 1; }
-OPHANDLER( xchd_a_xr1 ) { UINT8 oldram = ram_r(cpustate->R1); ram_w(cpustate->R1, (oldram & 0xf0) | (cpustate->a & 0x0f)); cpustate->a = (cpustate->a & 0xf0) | (oldram & 0x0f); return 1; }
+OPHANDLER( xchd_a_xr0 ) { UINT8 oldram = ram_r(cpustate->R0); ram_w(cpustate->R0, (oldram & 0xf0) | (cpustate->a & 0x0f)); cpustate->a = (cpustate->a & 0xf0) | (oldram & 0x0f); return 1; }
+OPHANDLER( xchd_a_xr1 ) { UINT8 oldram = ram_r(cpustate->R1); ram_w(cpustate->R1, (oldram & 0xf0) | (cpustate->a & 0x0f)); cpustate->a = (cpustate->a & 0xf0) | (oldram & 0x0f); return 1; }
-OPHANDLER( xrl_a_r0 ) { cpustate->a ^= cpustate->R0; return 1; }
-OPHANDLER( xrl_a_r1 ) { cpustate->a ^= cpustate->R1; return 1; }
-OPHANDLER( xrl_a_r2 ) { cpustate->a ^= cpustate->R2; return 1; }
-OPHANDLER( xrl_a_r3 ) { cpustate->a ^= cpustate->R3; return 1; }
-OPHANDLER( xrl_a_r4 ) { cpustate->a ^= cpustate->R4; return 1; }
-OPHANDLER( xrl_a_r5 ) { cpustate->a ^= cpustate->R5; return 1; }
-OPHANDLER( xrl_a_r6 ) { cpustate->a ^= cpustate->R6; return 1; }
-OPHANDLER( xrl_a_r7 ) { cpustate->a ^= cpustate->R7; return 1; }
-OPHANDLER( xrl_a_xr0 ) { cpustate->a ^= ram_r(cpustate->R0); return 1; }
-OPHANDLER( xrl_a_xr1 ) { cpustate->a ^= ram_r(cpustate->R1); return 1; }
-OPHANDLER( xrl_a_n ) { cpustate->a ^= argument_fetch(cpustate); return 2; }
+OPHANDLER( xrl_a_r0 ) { cpustate->a ^= cpustate->R0; return 1; }
+OPHANDLER( xrl_a_r1 ) { cpustate->a ^= cpustate->R1; return 1; }
+OPHANDLER( xrl_a_r2 ) { cpustate->a ^= cpustate->R2; return 1; }
+OPHANDLER( xrl_a_r3 ) { cpustate->a ^= cpustate->R3; return 1; }
+OPHANDLER( xrl_a_r4 ) { cpustate->a ^= cpustate->R4; return 1; }
+OPHANDLER( xrl_a_r5 ) { cpustate->a ^= cpustate->R5; return 1; }
+OPHANDLER( xrl_a_r6 ) { cpustate->a ^= cpustate->R6; return 1; }
+OPHANDLER( xrl_a_r7 ) { cpustate->a ^= cpustate->R7; return 1; }
+OPHANDLER( xrl_a_xr0 ) { cpustate->a ^= ram_r(cpustate->R0); return 1; }
+OPHANDLER( xrl_a_xr1 ) { cpustate->a ^= ram_r(cpustate->R1); return 1; }
+OPHANDLER( xrl_a_n ) { cpustate->a ^= argument_fetch(cpustate); return 2; }
SPLIT_OPHANDLER( split_02, outl_bus_a, out_dbb_a )
SPLIT_OPHANDLER( split_08, ins_a_bus, illegal )
@@ -846,9 +846,9 @@ static void mcs48_init(legacy_cpu_device *device, device_irq_acknowledge_callbac
mcs48_state *cpustate = get_safe_token(device);
/* External access line
- * EA=1 : read from external rom
- * EA=0 : read from internal rom
- */
+ * EA=1 : read from external rom
+ * EA=0 : read from internal rom
+ */
/* FIXME: Current implementation suboptimal */
cpustate->ea = (romsize ? 0 : 1);
@@ -1345,8 +1345,8 @@ static CPU_SET_INFO( mcs48 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: cpustate->irq_state = (info->i != CLEAR_LINE); break;
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: cpustate->ea = (info->i != CLEAR_LINE); break;
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: cpustate->irq_state = (info->i != CLEAR_LINE); break;
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: cpustate->ea = (info->i != CLEAR_LINE); break;
}
}
@@ -1363,50 +1363,50 @@ static CPU_GET_INFO( mcs48 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs48_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = MCS48_INPUT_IRQ; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: /*info->i = 6 or 7 or 8;*/ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = cpustate->irq_state ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = cpustate->ea; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs48_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = MCS48_INPUT_IRQ; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: /*info->i = 6 or 7 or 8;*/ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ: info->i = cpustate->irq_state ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA: info->i = cpustate->ea; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs48); break;
- case CPUINFO_FCT_INIT: /* set per-core */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mcs48); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs48); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mcs48); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(mcs48); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(mcs48); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(mcs48); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs48); break;
+ case CPUINFO_FCT_INIT: /* set per-core */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mcs48); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs48); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mcs48); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(mcs48); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(mcs48); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(mcs48); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: /* set per-core */ break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: /* set per-core */ break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: /* set per-core */ break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: /* set per-core */ break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: /* set per-core */ break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 8039"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.2"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Mirko Buffoni\nBased on the original work Copyright Dan Boris"); break;
+ case CPUINFO_STR_NAME: /* set per-core */ break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Intel 8039"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.2"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Mirko Buffoni\nBased on the original work Copyright Dan Boris"); break;
}
}
@@ -1523,26 +1523,26 @@ CPU_GET_INFO( n7751 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATU
CPU_GET_INFO( m58715 ) { mcs48_generic_get_info(device, state, info, MCS48_FEATURE, 2048, 128, 5, "M58715"); }
/* Official Intel MCS-48 parts */
-DEFINE_LEGACY_CPU_DEVICE(I8021, i8021); /* 1k internal ROM, 64 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8022, i8022); /* 2k internal ROM, 128 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8035, i8035); /* external ROM, 64 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8048, i8048); /* 1k internal ROM, 64 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8648, i8648); /* 1k internal OTP ROM, 64 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8748, i8748); /* 1k internal EEPROM, 64 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8039, i8039); /* external ROM, 128 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8049, i8049); /* 2k internal ROM, 128 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8749, i8749); /* 2k internal EEPROM, 128 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8040, i8040); /* external ROM, 256 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8050, i8050); /* 4k internal ROM, 256 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8021, i8021); /* 1k internal ROM, 64 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8022, i8022); /* 2k internal ROM, 128 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8035, i8035); /* external ROM, 64 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8048, i8048); /* 1k internal ROM, 64 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8648, i8648); /* 1k internal OTP ROM, 64 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8748, i8748); /* 1k internal EEPROM, 64 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8039, i8039); /* external ROM, 128 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8049, i8049); /* 2k internal ROM, 128 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8749, i8749); /* 2k internal EEPROM, 128 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8040, i8040); /* external ROM, 256 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8050, i8050); /* 4k internal ROM, 256 bytes internal RAM */
/* Official Intel UPI-41 parts */
-DEFINE_LEGACY_CPU_DEVICE(I8041, i8041); /* 1k internal ROM, 128 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8741, i8741); /* 1k internal EEPROM, 128 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8042, i8042); /* 2k internal ROM, 256 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8242, i8242); /* 2k internal ROM, 256 bytes internal RAM */
-DEFINE_LEGACY_CPU_DEVICE(I8742, i8742); /* 2k internal EEPROM, 256 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8041, i8041); /* 1k internal ROM, 128 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8741, i8741); /* 1k internal EEPROM, 128 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8042, i8042); /* 2k internal ROM, 256 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8242, i8242); /* 2k internal ROM, 256 bytes internal RAM */
+DEFINE_LEGACY_CPU_DEVICE(I8742, i8742); /* 2k internal EEPROM, 256 bytes internal RAM */
/* Clones */
-DEFINE_LEGACY_CPU_DEVICE(MB8884, mb8884); /* 8035 clone */
-DEFINE_LEGACY_CPU_DEVICE(N7751, n7751); /* 8048 clone */
-DEFINE_LEGACY_CPU_DEVICE(M58715, m58715); /* 8049 clone */
+DEFINE_LEGACY_CPU_DEVICE(MB8884, mb8884); /* 8035 clone */
+DEFINE_LEGACY_CPU_DEVICE(N7751, n7751); /* 8048 clone */
+DEFINE_LEGACY_CPU_DEVICE(M58715, m58715); /* 8049 clone */
diff --git a/src/emu/cpu/mcs48/mcs48.h b/src/emu/cpu/mcs48/mcs48.h
index a31366e997b..67a45704ded 100644
--- a/src/emu/cpu/mcs48/mcs48.h
+++ b/src/emu/cpu/mcs48/mcs48.h
@@ -40,9 +40,9 @@ enum
MCS48_R6,
MCS48_R7,
MCS48_EA,
- MCS48_STS, /* UPI-41 systems only */
- MCS48_DBBO, /* UPI-41 systems only */
- MCS48_DBBI, /* UPI-41 systems only */
+ MCS48_STS, /* UPI-41 systems only */
+ MCS48_DBBO, /* UPI-41 systems only */
+ MCS48_DBBI, /* UPI-41 systems only */
MCS48_GENPC = STATE_GENPC,
MCS48_GENSP = STATE_GENSP,
@@ -62,13 +62,13 @@ enum
/* special I/O space ports */
enum
{
- MCS48_PORT_P0 = 0x100, /* Not used */
- MCS48_PORT_P1 = 0x101,
- MCS48_PORT_P2 = 0x102,
- MCS48_PORT_T0 = 0x110,
- MCS48_PORT_T1 = 0x111,
- MCS48_PORT_BUS = 0x120,
- MCS48_PORT_PROG = 0x121 /* PROG line to 8243 expander */
+ MCS48_PORT_P0 = 0x100, /* Not used */
+ MCS48_PORT_P1 = 0x101,
+ MCS48_PORT_P2 = 0x102,
+ MCS48_PORT_T0 = 0x110,
+ MCS48_PORT_T1 = 0x111,
+ MCS48_PORT_BUS = 0x120,
+ MCS48_PORT_PROG = 0x121 /* PROG line to 8243 expander */
};
@@ -91,29 +91,29 @@ enum
attotime::from_hz(_clock/(3*5))
/* Official Intel MCS-48 parts */
-DECLARE_LEGACY_CPU_DEVICE(I8021, i8021); /* 1k internal ROM, 64 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8022, i8022); /* 2k internal ROM, 128 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8035, i8035); /* external ROM, 64 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8048, i8048); /* 1k internal ROM, 64 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8648, i8648); /* 1k internal OTP ROM, 64 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8748, i8748); /* 1k internal EEPROM, 64 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8039, i8039); /* external ROM, 128 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8049, i8049); /* 2k internal ROM, 128 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8749, i8749); /* 2k internal EEPROM, 128 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8040, i8040); /* external ROM, 256 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8050, i8050); /* 4k internal ROM, 256 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8021, i8021); /* 1k internal ROM, 64 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8022, i8022); /* 2k internal ROM, 128 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8035, i8035); /* external ROM, 64 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8048, i8048); /* 1k internal ROM, 64 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8648, i8648); /* 1k internal OTP ROM, 64 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8748, i8748); /* 1k internal EEPROM, 64 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8039, i8039); /* external ROM, 128 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8049, i8049); /* 2k internal ROM, 128 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8749, i8749); /* 2k internal EEPROM, 128 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8040, i8040); /* external ROM, 256 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8050, i8050); /* 4k internal ROM, 256 bytes internal RAM */
/* Official Intel UPI-41 parts */
-DECLARE_LEGACY_CPU_DEVICE(I8041, i8041); /* 1k internal ROM, 128 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8741, i8741); /* 1k internal EEPROM, 128 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8042, i8042); /* 2k internal ROM, 256 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8242, i8242); /* 2k internal ROM, 256 bytes internal RAM */
-DECLARE_LEGACY_CPU_DEVICE(I8742, i8742); /* 2k internal EEPROM, 256 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8041, i8041); /* 1k internal ROM, 128 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8741, i8741); /* 1k internal EEPROM, 128 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8042, i8042); /* 2k internal ROM, 256 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8242, i8242); /* 2k internal ROM, 256 bytes internal RAM */
+DECLARE_LEGACY_CPU_DEVICE(I8742, i8742); /* 2k internal EEPROM, 256 bytes internal RAM */
/* Clones */
-DECLARE_LEGACY_CPU_DEVICE(MB8884, mb8884); /* 8035 clone */
-DECLARE_LEGACY_CPU_DEVICE(N7751, n7751); /* 8048 clone */
-DECLARE_LEGACY_CPU_DEVICE(M58715, m58715); /* 8049 clone */
+DECLARE_LEGACY_CPU_DEVICE(MB8884, mb8884); /* 8035 clone */
+DECLARE_LEGACY_CPU_DEVICE(N7751, n7751); /* 8048 clone */
+DECLARE_LEGACY_CPU_DEVICE(M58715, m58715); /* 8049 clone */
diff --git a/src/emu/cpu/mcs48/mcs48dsm.c b/src/emu/cpu/mcs48/mcs48dsm.c
index d527d190ff8..14991061733 100644
--- a/src/emu/cpu/mcs48/mcs48dsm.c
+++ b/src/emu/cpu/mcs48/mcs48dsm.c
@@ -18,280 +18,280 @@ static UINT32 common_dasm(device_t *device, char *buffer, offs_t pc, const UINT8
opram++;
switch (*oprom++)
{
- case 0x00: sprintf(buffer, "nop"); break;
- case 0x02: if (!upi41)
+ case 0x00: sprintf(buffer, "nop"); break;
+ case 0x02: if (!upi41)
sprintf(buffer, "out bus,a");
else
- sprintf(buffer, "out dbb,a"); break;
- case 0x03: sprintf(buffer, "add a,#$%02X", *opram++); break;
- case 0x04: sprintf(buffer, "jmp $0%02X", *opram++); break;
- case 0x05: sprintf(buffer, "en i"); break;
- case 0x07: sprintf(buffer, "dec a"); break;
- case 0x08: if (!upi41)
+ sprintf(buffer, "out dbb,a"); break;
+ case 0x03: sprintf(buffer, "add a,#$%02X", *opram++); break;
+ case 0x04: sprintf(buffer, "jmp $0%02X", *opram++); break;
+ case 0x05: sprintf(buffer, "en i"); break;
+ case 0x07: sprintf(buffer, "dec a"); break;
+ case 0x08: if (!upi41)
sprintf(buffer, "in a,bus");
else
- sprintf(buffer, "illegal"); break;
- case 0x09: sprintf(buffer, "in a,p1"); break;
- case 0x0a: sprintf(buffer, "in a,p2"); break;
- case 0x0c: sprintf(buffer, "movd a,p4"); break;
- case 0x0d: sprintf(buffer, "movd a,p5"); break;
- case 0x0e: sprintf(buffer, "movd a,p6"); break;
- case 0x0f: sprintf(buffer, "movd a,p7"); break;
- case 0x10: sprintf(buffer, "inc @r0"); break;
- case 0x11: sprintf(buffer, "inc @r1"); break;
- case 0x12: sprintf(buffer, "jb0 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x13: sprintf(buffer, "addc a,#$%02X", *opram++); break;
- case 0x14: sprintf(buffer, "call $0%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0x15: sprintf(buffer, "dis i"); break;
- case 0x16: sprintf(buffer, "jtf $%03X", (pc & 0xf00) | *opram++); break;
- case 0x17: sprintf(buffer, "inc a"); break;
- case 0x18: sprintf(buffer, "inc r0"); break;
- case 0x19: sprintf(buffer, "inc r1"); break;
- case 0x1a: sprintf(buffer, "inc r2"); break;
- case 0x1b: sprintf(buffer, "inc r3"); break;
- case 0x1c: sprintf(buffer, "inc r4"); break;
- case 0x1d: sprintf(buffer, "inc r5"); break;
- case 0x1e: sprintf(buffer, "inc r6"); break;
- case 0x1f: sprintf(buffer, "inc r7"); break;
- case 0x20: sprintf(buffer, "xch a,@r0"); break;
- case 0x21: sprintf(buffer, "xch a,@r1"); break;
- case 0x22: if (!upi41)
+ sprintf(buffer, "illegal"); break;
+ case 0x09: sprintf(buffer, "in a,p1"); break;
+ case 0x0a: sprintf(buffer, "in a,p2"); break;
+ case 0x0c: sprintf(buffer, "movd a,p4"); break;
+ case 0x0d: sprintf(buffer, "movd a,p5"); break;
+ case 0x0e: sprintf(buffer, "movd a,p6"); break;
+ case 0x0f: sprintf(buffer, "movd a,p7"); break;
+ case 0x10: sprintf(buffer, "inc @r0"); break;
+ case 0x11: sprintf(buffer, "inc @r1"); break;
+ case 0x12: sprintf(buffer, "jb0 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x13: sprintf(buffer, "addc a,#$%02X", *opram++); break;
+ case 0x14: sprintf(buffer, "call $0%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0x15: sprintf(buffer, "dis i"); break;
+ case 0x16: sprintf(buffer, "jtf $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x17: sprintf(buffer, "inc a"); break;
+ case 0x18: sprintf(buffer, "inc r0"); break;
+ case 0x19: sprintf(buffer, "inc r1"); break;
+ case 0x1a: sprintf(buffer, "inc r2"); break;
+ case 0x1b: sprintf(buffer, "inc r3"); break;
+ case 0x1c: sprintf(buffer, "inc r4"); break;
+ case 0x1d: sprintf(buffer, "inc r5"); break;
+ case 0x1e: sprintf(buffer, "inc r6"); break;
+ case 0x1f: sprintf(buffer, "inc r7"); break;
+ case 0x20: sprintf(buffer, "xch a,@r0"); break;
+ case 0x21: sprintf(buffer, "xch a,@r1"); break;
+ case 0x22: if (!upi41)
sprintf(buffer, "illegal");
else
- sprintf(buffer, "in a,dbb"); break;
- case 0x23: sprintf(buffer, "mov a,#$%02X", *opram++); break;
- case 0x24: sprintf(buffer, "jmp $1%02X", *opram++); break;
- case 0x25: sprintf(buffer, "en tcnti"); break;
- case 0x26: sprintf(buffer, "jnt0 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x27: sprintf(buffer, "clr a"); break;
- case 0x28: sprintf(buffer, "xch a,r0"); break;
- case 0x29: sprintf(buffer, "xch a,r1"); break;
- case 0x2a: sprintf(buffer, "xch a,r2"); break;
- case 0x2b: sprintf(buffer, "xch a,r3"); break;
- case 0x2c: sprintf(buffer, "xch a,r4"); break;
- case 0x2d: sprintf(buffer, "xch a,r5"); break;
- case 0x2e: sprintf(buffer, "xch a,r6"); break;
- case 0x2f: sprintf(buffer, "xch a,r7"); break;
- case 0x30: sprintf(buffer, "xchd a,@r0"); break;
- case 0x31: sprintf(buffer, "xchd a,@r1"); break;
- case 0x32: sprintf(buffer, "jb1 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x34: sprintf(buffer, "call $1%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0x35: sprintf(buffer, "dis tcnti"); break;
- case 0x36: sprintf(buffer, "jt0 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x37: sprintf(buffer, "cpl a"); break;
- case 0x39: sprintf(buffer, "outl p1,a"); break;
- case 0x3a: sprintf(buffer, "outl p2,a"); break;
- case 0x3c: sprintf(buffer, "movd p4,a"); break;
- case 0x3d: sprintf(buffer, "movd p5,a"); break;
- case 0x3e: sprintf(buffer, "movd p6,a"); break;
- case 0x3f: sprintf(buffer, "movd p7,a"); break;
- case 0x40: sprintf(buffer, "orl a,@r0"); break;
- case 0x41: sprintf(buffer, "orl a,@r1"); break;
- case 0x42: sprintf(buffer, "mov a,t"); break;
- case 0x43: sprintf(buffer, "orl a,#$%02X", *opram++); break;
- case 0x44: sprintf(buffer, "jmp $2%02X", *opram++); break;
- case 0x45: sprintf(buffer, "strt cnt"); break;
- case 0x46: sprintf(buffer, "jnt1 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x47: sprintf(buffer, "swap a"); break;
- case 0x48: sprintf(buffer, "orl a,r0"); break;
- case 0x49: sprintf(buffer, "orl a,r1"); break;
- case 0x4a: sprintf(buffer, "orl a,r2"); break;
- case 0x4b: sprintf(buffer, "orl a,r3"); break;
- case 0x4c: sprintf(buffer, "orl a,r4"); break;
- case 0x4d: sprintf(buffer, "orl a,r5"); break;
- case 0x4e: sprintf(buffer, "orl a,r6"); break;
- case 0x4f: sprintf(buffer, "orl a,r7"); break;
- case 0x50: sprintf(buffer, "anl a,@r0"); break;
- case 0x51: sprintf(buffer, "anl a,@r1"); break;
- case 0x52: sprintf(buffer, "jb2 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x53: sprintf(buffer, "anl a,#$%02X", *opram++); break;
- case 0x54: sprintf(buffer, "call $2%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0x55: sprintf(buffer, "strt t"); break;
- case 0x56: sprintf(buffer, "jt1 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x57: sprintf(buffer, "da a"); break;
- case 0x58: sprintf(buffer, "anl a,r0"); break;
- case 0x59: sprintf(buffer, "anl a,r1"); break;
- case 0x5a: sprintf(buffer, "anl a,r2"); break;
- case 0x5b: sprintf(buffer, "anl a,r3"); break;
- case 0x5c: sprintf(buffer, "anl a,r4"); break;
- case 0x5d: sprintf(buffer, "anl a,r5"); break;
- case 0x5e: sprintf(buffer, "anl a,r6"); break;
- case 0x5f: sprintf(buffer, "anl a,r7"); break;
- case 0x60: sprintf(buffer, "add a,@r0"); break;
- case 0x61: sprintf(buffer, "add a,@r1"); break;
- case 0x62: sprintf(buffer, "mov t,a"); break;
- case 0x64: sprintf(buffer, "jmp $3%02X", *opram++); break;
- case 0x65: sprintf(buffer, "stop tcnt"); break;
- case 0x67: sprintf(buffer, "rrc a"); break;
- case 0x68: sprintf(buffer, "add a,r0"); break;
- case 0x69: sprintf(buffer, "add a,r1"); break;
- case 0x6a: sprintf(buffer, "add a,r2"); break;
- case 0x6b: sprintf(buffer, "add a,r3"); break;
- case 0x6c: sprintf(buffer, "add a,r4"); break;
- case 0x6d: sprintf(buffer, "add a,r5"); break;
- case 0x6e: sprintf(buffer, "add a,r6"); break;
- case 0x6f: sprintf(buffer, "add a,r7"); break;
- case 0x70: sprintf(buffer, "addc a,@r0"); break;
- case 0x71: sprintf(buffer, "addc a,@r1"); break;
- case 0x72: sprintf(buffer, "jb3 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x74: sprintf(buffer, "call $3%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0x75: if (!upi41)
+ sprintf(buffer, "in a,dbb"); break;
+ case 0x23: sprintf(buffer, "mov a,#$%02X", *opram++); break;
+ case 0x24: sprintf(buffer, "jmp $1%02X", *opram++); break;
+ case 0x25: sprintf(buffer, "en tcnti"); break;
+ case 0x26: sprintf(buffer, "jnt0 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x27: sprintf(buffer, "clr a"); break;
+ case 0x28: sprintf(buffer, "xch a,r0"); break;
+ case 0x29: sprintf(buffer, "xch a,r1"); break;
+ case 0x2a: sprintf(buffer, "xch a,r2"); break;
+ case 0x2b: sprintf(buffer, "xch a,r3"); break;
+ case 0x2c: sprintf(buffer, "xch a,r4"); break;
+ case 0x2d: sprintf(buffer, "xch a,r5"); break;
+ case 0x2e: sprintf(buffer, "xch a,r6"); break;
+ case 0x2f: sprintf(buffer, "xch a,r7"); break;
+ case 0x30: sprintf(buffer, "xchd a,@r0"); break;
+ case 0x31: sprintf(buffer, "xchd a,@r1"); break;
+ case 0x32: sprintf(buffer, "jb1 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x34: sprintf(buffer, "call $1%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0x35: sprintf(buffer, "dis tcnti"); break;
+ case 0x36: sprintf(buffer, "jt0 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x37: sprintf(buffer, "cpl a"); break;
+ case 0x39: sprintf(buffer, "outl p1,a"); break;
+ case 0x3a: sprintf(buffer, "outl p2,a"); break;
+ case 0x3c: sprintf(buffer, "movd p4,a"); break;
+ case 0x3d: sprintf(buffer, "movd p5,a"); break;
+ case 0x3e: sprintf(buffer, "movd p6,a"); break;
+ case 0x3f: sprintf(buffer, "movd p7,a"); break;
+ case 0x40: sprintf(buffer, "orl a,@r0"); break;
+ case 0x41: sprintf(buffer, "orl a,@r1"); break;
+ case 0x42: sprintf(buffer, "mov a,t"); break;
+ case 0x43: sprintf(buffer, "orl a,#$%02X", *opram++); break;
+ case 0x44: sprintf(buffer, "jmp $2%02X", *opram++); break;
+ case 0x45: sprintf(buffer, "strt cnt"); break;
+ case 0x46: sprintf(buffer, "jnt1 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x47: sprintf(buffer, "swap a"); break;
+ case 0x48: sprintf(buffer, "orl a,r0"); break;
+ case 0x49: sprintf(buffer, "orl a,r1"); break;
+ case 0x4a: sprintf(buffer, "orl a,r2"); break;
+ case 0x4b: sprintf(buffer, "orl a,r3"); break;
+ case 0x4c: sprintf(buffer, "orl a,r4"); break;
+ case 0x4d: sprintf(buffer, "orl a,r5"); break;
+ case 0x4e: sprintf(buffer, "orl a,r6"); break;
+ case 0x4f: sprintf(buffer, "orl a,r7"); break;
+ case 0x50: sprintf(buffer, "anl a,@r0"); break;
+ case 0x51: sprintf(buffer, "anl a,@r1"); break;
+ case 0x52: sprintf(buffer, "jb2 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x53: sprintf(buffer, "anl a,#$%02X", *opram++); break;
+ case 0x54: sprintf(buffer, "call $2%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0x55: sprintf(buffer, "strt t"); break;
+ case 0x56: sprintf(buffer, "jt1 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x57: sprintf(buffer, "da a"); break;
+ case 0x58: sprintf(buffer, "anl a,r0"); break;
+ case 0x59: sprintf(buffer, "anl a,r1"); break;
+ case 0x5a: sprintf(buffer, "anl a,r2"); break;
+ case 0x5b: sprintf(buffer, "anl a,r3"); break;
+ case 0x5c: sprintf(buffer, "anl a,r4"); break;
+ case 0x5d: sprintf(buffer, "anl a,r5"); break;
+ case 0x5e: sprintf(buffer, "anl a,r6"); break;
+ case 0x5f: sprintf(buffer, "anl a,r7"); break;
+ case 0x60: sprintf(buffer, "add a,@r0"); break;
+ case 0x61: sprintf(buffer, "add a,@r1"); break;
+ case 0x62: sprintf(buffer, "mov t,a"); break;
+ case 0x64: sprintf(buffer, "jmp $3%02X", *opram++); break;
+ case 0x65: sprintf(buffer, "stop tcnt"); break;
+ case 0x67: sprintf(buffer, "rrc a"); break;
+ case 0x68: sprintf(buffer, "add a,r0"); break;
+ case 0x69: sprintf(buffer, "add a,r1"); break;
+ case 0x6a: sprintf(buffer, "add a,r2"); break;
+ case 0x6b: sprintf(buffer, "add a,r3"); break;
+ case 0x6c: sprintf(buffer, "add a,r4"); break;
+ case 0x6d: sprintf(buffer, "add a,r5"); break;
+ case 0x6e: sprintf(buffer, "add a,r6"); break;
+ case 0x6f: sprintf(buffer, "add a,r7"); break;
+ case 0x70: sprintf(buffer, "addc a,@r0"); break;
+ case 0x71: sprintf(buffer, "addc a,@r1"); break;
+ case 0x72: sprintf(buffer, "jb3 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x74: sprintf(buffer, "call $3%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0x75: if (!upi41)
sprintf(buffer, "ent0 clk");
else
- sprintf(buffer, "illegal"); break;
- case 0x76: sprintf(buffer, "jf1 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x77: sprintf(buffer, "rr a"); break;
- case 0x78: sprintf(buffer, "addc a,r0"); break;
- case 0x79: sprintf(buffer, "addc a,r1"); break;
- case 0x7a: sprintf(buffer, "addc a,r2"); break;
- case 0x7b: sprintf(buffer, "addc a,r3"); break;
- case 0x7c: sprintf(buffer, "addc a,r4"); break;
- case 0x7d: sprintf(buffer, "addc a,r5"); break;
- case 0x7e: sprintf(buffer, "addc a,r6"); break;
- case 0x7f: sprintf(buffer, "addc a,r7"); break;
- case 0x80: if (!upi41)
+ sprintf(buffer, "illegal"); break;
+ case 0x76: sprintf(buffer, "jf1 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x77: sprintf(buffer, "rr a"); break;
+ case 0x78: sprintf(buffer, "addc a,r0"); break;
+ case 0x79: sprintf(buffer, "addc a,r1"); break;
+ case 0x7a: sprintf(buffer, "addc a,r2"); break;
+ case 0x7b: sprintf(buffer, "addc a,r3"); break;
+ case 0x7c: sprintf(buffer, "addc a,r4"); break;
+ case 0x7d: sprintf(buffer, "addc a,r5"); break;
+ case 0x7e: sprintf(buffer, "addc a,r6"); break;
+ case 0x7f: sprintf(buffer, "addc a,r7"); break;
+ case 0x80: if (!upi41)
sprintf(buffer, "movx a,@r0");
else
- sprintf(buffer, "illegal"); break;
- case 0x81: if (!upi41)
+ sprintf(buffer, "illegal"); break;
+ case 0x81: if (!upi41)
sprintf(buffer, "movx a,@r1");
else
- sprintf(buffer, "illegal"); break;
- case 0x83: sprintf(buffer, "ret"); flags = DASMFLAG_STEP_OUT; break;
- case 0x84: sprintf(buffer, "jmp $4%02X", *opram++); break;
- case 0x85: sprintf(buffer, "clr f0"); break;
- case 0x86: if (!upi41)
+ sprintf(buffer, "illegal"); break;
+ case 0x83: sprintf(buffer, "ret"); flags = DASMFLAG_STEP_OUT; break;
+ case 0x84: sprintf(buffer, "jmp $4%02X", *opram++); break;
+ case 0x85: sprintf(buffer, "clr f0"); break;
+ case 0x86: if (!upi41)
sprintf(buffer, "jni $%03X", (pc & 0xf00) | *opram++);
else
- sprintf(buffer, "jobf $%03X", (pc & 0xf00) | *opram++); break;
- case 0x88: if (!upi41)
+ sprintf(buffer, "jobf $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x88: if (!upi41)
sprintf(buffer, "orl bus,#$%02X", *opram++);
else
- sprintf(buffer, "illegal"); break;
- case 0x89: sprintf(buffer, "orl p1,#$%02X", *opram++); break;
- case 0x8a: sprintf(buffer, "orl p2,#$%02X", *opram++); break;
- case 0x8c: sprintf(buffer, "orld p4,a"); break;
- case 0x8d: sprintf(buffer, "orld p5,a"); break;
- case 0x8e: sprintf(buffer, "orld p6,a"); break;
- case 0x8f: sprintf(buffer, "orld p7,a"); break;
- case 0x90: if (!upi41)
+ sprintf(buffer, "illegal"); break;
+ case 0x89: sprintf(buffer, "orl p1,#$%02X", *opram++); break;
+ case 0x8a: sprintf(buffer, "orl p2,#$%02X", *opram++); break;
+ case 0x8c: sprintf(buffer, "orld p4,a"); break;
+ case 0x8d: sprintf(buffer, "orld p5,a"); break;
+ case 0x8e: sprintf(buffer, "orld p6,a"); break;
+ case 0x8f: sprintf(buffer, "orld p7,a"); break;
+ case 0x90: if (!upi41)
sprintf(buffer, "movx @r0,a");
else
- sprintf(buffer, "mov sts,a"); break;
- case 0x91: if (!upi41)
+ sprintf(buffer, "mov sts,a"); break;
+ case 0x91: if (!upi41)
sprintf(buffer, "movx @r1,a");
else
- sprintf(buffer, "illegal"); break;
- case 0x92: sprintf(buffer, "jb4 $%03X", (pc & 0xf00) | *opram++); break;
- case 0x93: sprintf(buffer, "retr"); flags = DASMFLAG_STEP_OUT; break;
- case 0x94: sprintf(buffer, "call $4%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0x95: sprintf(buffer, "cpl f0"); break;
- case 0x96: sprintf(buffer, "jnz $%03X", (pc & 0xf00) | *opram++); break;
- case 0x97: sprintf(buffer, "clr c"); break;
- case 0x98: if (!upi41)
+ sprintf(buffer, "illegal"); break;
+ case 0x92: sprintf(buffer, "jb4 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x93: sprintf(buffer, "retr"); flags = DASMFLAG_STEP_OUT; break;
+ case 0x94: sprintf(buffer, "call $4%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0x95: sprintf(buffer, "cpl f0"); break;
+ case 0x96: sprintf(buffer, "jnz $%03X", (pc & 0xf00) | *opram++); break;
+ case 0x97: sprintf(buffer, "clr c"); break;
+ case 0x98: if (!upi41)
sprintf(buffer, "anl bus,#$%02X", *opram++);
else
- sprintf(buffer, "illegal"); break;
- case 0x99: sprintf(buffer, "anl p1,#$%02X", *opram++); break;
- case 0x9a: sprintf(buffer, "anl p2,#$%02X", *opram++); break;
- case 0x9c: sprintf(buffer, "anld p4,a"); break;
- case 0x9d: sprintf(buffer, "anld p5,a"); break;
- case 0x9e: sprintf(buffer, "anld p6,a"); break;
- case 0x9f: sprintf(buffer, "anld p7,a"); break;
- case 0xa0: sprintf(buffer, "mov @r0,a"); break;
- case 0xa1: sprintf(buffer, "mov @r1,a"); break;
- case 0xa3: sprintf(buffer, "movp a,@a"); break;
- case 0xa4: sprintf(buffer, "jmp $5%02X", *opram++); break;
- case 0xa5: sprintf(buffer, "clr f1"); break;
- case 0xa7: sprintf(buffer, "cpl c"); break;
- case 0xa8: sprintf(buffer, "mov r0,a"); break;
- case 0xa9: sprintf(buffer, "mov r1,a"); break;
- case 0xaa: sprintf(buffer, "mov r2,a"); break;
- case 0xab: sprintf(buffer, "mov r3,a"); break;
- case 0xac: sprintf(buffer, "mov r4,a"); break;
- case 0xad: sprintf(buffer, "mov r5,a"); break;
- case 0xae: sprintf(buffer, "mov r6,a"); break;
- case 0xaf: sprintf(buffer, "mov r7,a"); break;
- case 0xb0: sprintf(buffer, "mov @r0,#$%02X", *opram++); break;
- case 0xb1: sprintf(buffer, "mov @r1,#$%02X", *opram++); break;
- case 0xb2: sprintf(buffer, "jb5 $%03X", (pc & 0xf00) | *opram++); break;
- case 0xb3: sprintf(buffer, "jmpp @a"); break;
- case 0xb4: sprintf(buffer, "call $5%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xb5: sprintf(buffer, "cpl f1"); break;
- case 0xb6: sprintf(buffer, "jf0 $%03X", (pc & 0xf00) | *opram++); break;
- case 0xb8: sprintf(buffer, "mov r0,#$%02X", *opram++); break;
- case 0xb9: sprintf(buffer, "mov r1,#$%02X", *opram++); break;
- case 0xba: sprintf(buffer, "mov r2,#$%02X", *opram++); break;
- case 0xbb: sprintf(buffer, "mov r3,#$%02X", *opram++); break;
- case 0xbc: sprintf(buffer, "mov r4,#$%02X", *opram++); break;
- case 0xbd: sprintf(buffer, "mov r5,#$%02X", *opram++); break;
- case 0xbe: sprintf(buffer, "mov r6,#$%02X", *opram++); break;
- case 0xbf: sprintf(buffer, "mov r7,#$%02X", *opram++); break;
- case 0xc4: sprintf(buffer, "jmp $6%02X", *opram++); break;
- case 0xc5: sprintf(buffer, "sel rb0"); break;
- case 0xc6: sprintf(buffer, "jz $%03X", (pc & 0xf00) | *opram++); break;
- case 0xc7: sprintf(buffer, "mov a,psw"); break;
- case 0xc8: sprintf(buffer, "dec r0"); break;
- case 0xc9: sprintf(buffer, "dec r1"); break;
- case 0xca: sprintf(buffer, "dec r2"); break;
- case 0xcb: sprintf(buffer, "dec r3"); break;
- case 0xcc: sprintf(buffer, "dec r4"); break;
- case 0xcd: sprintf(buffer, "dec r5"); break;
- case 0xce: sprintf(buffer, "dec r6"); break;
- case 0xcf: sprintf(buffer, "dec r7"); break;
- case 0xd0: sprintf(buffer, "xrl a,@r0"); break;
- case 0xd1: sprintf(buffer, "xrl a,@r1"); break;
- case 0xd2: sprintf(buffer, "jb6 $%03X", (pc & 0xf00) | *opram++); break;
- case 0xd3: sprintf(buffer, "xrl a,#$%02X", *opram++); break;
- case 0xd4: sprintf(buffer, "call $6%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xd5: sprintf(buffer, "sel rb1"); break;
- case 0xd6: if (!upi41)
+ sprintf(buffer, "illegal"); break;
+ case 0x99: sprintf(buffer, "anl p1,#$%02X", *opram++); break;
+ case 0x9a: sprintf(buffer, "anl p2,#$%02X", *opram++); break;
+ case 0x9c: sprintf(buffer, "anld p4,a"); break;
+ case 0x9d: sprintf(buffer, "anld p5,a"); break;
+ case 0x9e: sprintf(buffer, "anld p6,a"); break;
+ case 0x9f: sprintf(buffer, "anld p7,a"); break;
+ case 0xa0: sprintf(buffer, "mov @r0,a"); break;
+ case 0xa1: sprintf(buffer, "mov @r1,a"); break;
+ case 0xa3: sprintf(buffer, "movp a,@a"); break;
+ case 0xa4: sprintf(buffer, "jmp $5%02X", *opram++); break;
+ case 0xa5: sprintf(buffer, "clr f1"); break;
+ case 0xa7: sprintf(buffer, "cpl c"); break;
+ case 0xa8: sprintf(buffer, "mov r0,a"); break;
+ case 0xa9: sprintf(buffer, "mov r1,a"); break;
+ case 0xaa: sprintf(buffer, "mov r2,a"); break;
+ case 0xab: sprintf(buffer, "mov r3,a"); break;
+ case 0xac: sprintf(buffer, "mov r4,a"); break;
+ case 0xad: sprintf(buffer, "mov r5,a"); break;
+ case 0xae: sprintf(buffer, "mov r6,a"); break;
+ case 0xaf: sprintf(buffer, "mov r7,a"); break;
+ case 0xb0: sprintf(buffer, "mov @r0,#$%02X", *opram++); break;
+ case 0xb1: sprintf(buffer, "mov @r1,#$%02X", *opram++); break;
+ case 0xb2: sprintf(buffer, "jb5 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xb3: sprintf(buffer, "jmpp @a"); break;
+ case 0xb4: sprintf(buffer, "call $5%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xb5: sprintf(buffer, "cpl f1"); break;
+ case 0xb6: sprintf(buffer, "jf0 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xb8: sprintf(buffer, "mov r0,#$%02X", *opram++); break;
+ case 0xb9: sprintf(buffer, "mov r1,#$%02X", *opram++); break;
+ case 0xba: sprintf(buffer, "mov r2,#$%02X", *opram++); break;
+ case 0xbb: sprintf(buffer, "mov r3,#$%02X", *opram++); break;
+ case 0xbc: sprintf(buffer, "mov r4,#$%02X", *opram++); break;
+ case 0xbd: sprintf(buffer, "mov r5,#$%02X", *opram++); break;
+ case 0xbe: sprintf(buffer, "mov r6,#$%02X", *opram++); break;
+ case 0xbf: sprintf(buffer, "mov r7,#$%02X", *opram++); break;
+ case 0xc4: sprintf(buffer, "jmp $6%02X", *opram++); break;
+ case 0xc5: sprintf(buffer, "sel rb0"); break;
+ case 0xc6: sprintf(buffer, "jz $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xc7: sprintf(buffer, "mov a,psw"); break;
+ case 0xc8: sprintf(buffer, "dec r0"); break;
+ case 0xc9: sprintf(buffer, "dec r1"); break;
+ case 0xca: sprintf(buffer, "dec r2"); break;
+ case 0xcb: sprintf(buffer, "dec r3"); break;
+ case 0xcc: sprintf(buffer, "dec r4"); break;
+ case 0xcd: sprintf(buffer, "dec r5"); break;
+ case 0xce: sprintf(buffer, "dec r6"); break;
+ case 0xcf: sprintf(buffer, "dec r7"); break;
+ case 0xd0: sprintf(buffer, "xrl a,@r0"); break;
+ case 0xd1: sprintf(buffer, "xrl a,@r1"); break;
+ case 0xd2: sprintf(buffer, "jb6 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xd3: sprintf(buffer, "xrl a,#$%02X", *opram++); break;
+ case 0xd4: sprintf(buffer, "call $6%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xd5: sprintf(buffer, "sel rb1"); break;
+ case 0xd6: if (!upi41)
sprintf(buffer, "illegal");
else
- sprintf(buffer, "jnibf $%03X", (pc & 0xf00) | *opram++); break;
- case 0xd7: sprintf(buffer, "mov psw,a"); break;
- case 0xd8: sprintf(buffer, "xrl a,r0"); break;
- case 0xd9: sprintf(buffer, "xrl a,r1"); break;
- case 0xda: sprintf(buffer, "xrl a,r2"); break;
- case 0xdb: sprintf(buffer, "xrl a,r3"); break;
- case 0xdc: sprintf(buffer, "xrl a,r4"); break;
- case 0xdd: sprintf(buffer, "xrl a,r5"); break;
- case 0xde: sprintf(buffer, "xrl a,r6"); break;
- case 0xdf: sprintf(buffer, "xrl a,r7"); break;
- case 0xe3: sprintf(buffer, "movp3 a,@a"); break;
- case 0xe4: sprintf(buffer, "jmp $7%02X", *opram++); break;
- case 0xe5: if (!upi41)
+ sprintf(buffer, "jnibf $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xd7: sprintf(buffer, "mov psw,a"); break;
+ case 0xd8: sprintf(buffer, "xrl a,r0"); break;
+ case 0xd9: sprintf(buffer, "xrl a,r1"); break;
+ case 0xda: sprintf(buffer, "xrl a,r2"); break;
+ case 0xdb: sprintf(buffer, "xrl a,r3"); break;
+ case 0xdc: sprintf(buffer, "xrl a,r4"); break;
+ case 0xdd: sprintf(buffer, "xrl a,r5"); break;
+ case 0xde: sprintf(buffer, "xrl a,r6"); break;
+ case 0xdf: sprintf(buffer, "xrl a,r7"); break;
+ case 0xe3: sprintf(buffer, "movp3 a,@a"); break;
+ case 0xe4: sprintf(buffer, "jmp $7%02X", *opram++); break;
+ case 0xe5: if (!upi41)
sprintf(buffer, "sel mb0");
else
- sprintf(buffer, "en dma"); break;
- case 0xe6: sprintf(buffer, "jnc $%03X", (pc & 0xf00) | *opram++); break;
- case 0xe7: sprintf(buffer, "rl a"); break;
- case 0xe8: sprintf(buffer, "djnz r0,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xe9: sprintf(buffer, "djnz r1,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xea: sprintf(buffer, "djnz r2,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xeb: sprintf(buffer, "djnz r3,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xec: sprintf(buffer, "djnz r4,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xed: sprintf(buffer, "djnz r5,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xee: sprintf(buffer, "djnz r6,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xef: sprintf(buffer, "djnz r7,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xf0: sprintf(buffer, "mov a,@r0"); break;
- case 0xf1: sprintf(buffer, "mov a,@r1"); break;
- case 0xf2: sprintf(buffer, "jb7 $%03X", (pc & 0xf00) | *opram++); break;
- case 0xf4: sprintf(buffer, "call $7%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
- case 0xf5: if (!upi41)
+ sprintf(buffer, "en dma"); break;
+ case 0xe6: sprintf(buffer, "jnc $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xe7: sprintf(buffer, "rl a"); break;
+ case 0xe8: sprintf(buffer, "djnz r0,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xe9: sprintf(buffer, "djnz r1,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xea: sprintf(buffer, "djnz r2,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xeb: sprintf(buffer, "djnz r3,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xec: sprintf(buffer, "djnz r4,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xed: sprintf(buffer, "djnz r5,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xee: sprintf(buffer, "djnz r6,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xef: sprintf(buffer, "djnz r7,$%03X", (pc & 0xf00) | *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xf0: sprintf(buffer, "mov a,@r0"); break;
+ case 0xf1: sprintf(buffer, "mov a,@r1"); break;
+ case 0xf2: sprintf(buffer, "jb7 $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xf4: sprintf(buffer, "call $7%02X", *opram++); flags = DASMFLAG_STEP_OVER; break;
+ case 0xf5: if (!upi41)
sprintf(buffer, "sel mb1");
else
- sprintf(buffer, "en flags"); break;
- case 0xf6: sprintf(buffer, "jc $%03X", (pc & 0xf00) | *opram++); break;
- case 0xf7: sprintf(buffer, "rlc a"); break;
- case 0xf8: sprintf(buffer, "mov a,r0"); break;
- case 0xf9: sprintf(buffer, "mov a,r1"); break;
- case 0xfa: sprintf(buffer, "mov a,r2"); break;
- case 0xfb: sprintf(buffer, "mov a,r3"); break;
- case 0xfc: sprintf(buffer, "mov a,r4"); break;
- case 0xfd: sprintf(buffer, "mov a,r5"); break;
- case 0xfe: sprintf(buffer, "mov a,r6"); break;
- case 0xff: sprintf(buffer, "mov a,r7"); break;
+ sprintf(buffer, "en flags"); break;
+ case 0xf6: sprintf(buffer, "jc $%03X", (pc & 0xf00) | *opram++); break;
+ case 0xf7: sprintf(buffer, "rlc a"); break;
+ case 0xf8: sprintf(buffer, "mov a,r0"); break;
+ case 0xf9: sprintf(buffer, "mov a,r1"); break;
+ case 0xfa: sprintf(buffer, "mov a,r2"); break;
+ case 0xfb: sprintf(buffer, "mov a,r3"); break;
+ case 0xfc: sprintf(buffer, "mov a,r4"); break;
+ case 0xfd: sprintf(buffer, "mov a,r5"); break;
+ case 0xfe: sprintf(buffer, "mov a,r6"); break;
+ case 0xff: sprintf(buffer, "mov a,r7"); break;
}
return (opram - startram) | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/mcs51/mcs51.c b/src/emu/cpu/mcs51/mcs51.c
index 23eabc3708a..b69930223ae 100644
--- a/src/emu/cpu/mcs51/mcs51.c
+++ b/src/emu/cpu/mcs51/mcs51.c
@@ -143,7 +143,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/***************************************************************************
CONSTANTS
@@ -151,64 +151,64 @@
enum
{
- FEATURE_NONE = 0x00,
- FEATURE_I8052 = 0x01,
- FEATURE_CMOS = 0x02,
- FEATURE_I80C52 = 0x04,
- FEATURE_DS5002FP = 0x08,
+ FEATURE_NONE = 0x00,
+ FEATURE_I8052 = 0x01,
+ FEATURE_CMOS = 0x02,
+ FEATURE_I80C52 = 0x04,
+ FEATURE_DS5002FP = 0x08,
};
/* Internal address in SFR of registers */
enum
{
- ADDR_PSW = 0xd0,
- ADDR_ACC = 0xe0,
- ADDR_B = 0xf0,
-
- ADDR_P0 = 0x80,
- ADDR_SP = 0x81,
- ADDR_DPL = 0x82,
- ADDR_DPH = 0x83,
- ADDR_PCON = 0x87,
- ADDR_TCON = 0x88,
- ADDR_TMOD = 0x89,
- ADDR_TL0 = 0x8a,
- ADDR_TL1 = 0x8b,
- ADDR_TH0 = 0x8c,
- ADDR_TH1 = 0x8d,
- ADDR_P1 = 0x90,
- ADDR_SCON = 0x98,
- ADDR_SBUF = 0x99,
- ADDR_P2 = 0xa0,
- ADDR_IE = 0xa8,
- ADDR_P3 = 0xb0,
- ADDR_IP = 0xb8,
+ ADDR_PSW = 0xd0,
+ ADDR_ACC = 0xe0,
+ ADDR_B = 0xf0,
+
+ ADDR_P0 = 0x80,
+ ADDR_SP = 0x81,
+ ADDR_DPL = 0x82,
+ ADDR_DPH = 0x83,
+ ADDR_PCON = 0x87,
+ ADDR_TCON = 0x88,
+ ADDR_TMOD = 0x89,
+ ADDR_TL0 = 0x8a,
+ ADDR_TL1 = 0x8b,
+ ADDR_TH0 = 0x8c,
+ ADDR_TH1 = 0x8d,
+ ADDR_P1 = 0x90,
+ ADDR_SCON = 0x98,
+ ADDR_SBUF = 0x99,
+ ADDR_P2 = 0xa0,
+ ADDR_IE = 0xa8,
+ ADDR_P3 = 0xb0,
+ ADDR_IP = 0xb8,
/* 8052 Only registers */
- ADDR_T2CON = 0xc8,
- ADDR_RCAP2L = 0xca,
- ADDR_RCAP2H = 0xcb,
- ADDR_TL2 = 0xcc,
- ADDR_TH2 = 0xcd,
+ ADDR_T2CON = 0xc8,
+ ADDR_RCAP2L = 0xca,
+ ADDR_RCAP2H = 0xcb,
+ ADDR_TL2 = 0xcc,
+ ADDR_TH2 = 0xcd,
/* 80C52 Only registers */
- ADDR_IPH = 0xb7,
- ADDR_SADDR = 0xa9,
- ADDR_SADEN = 0xb9,
+ ADDR_IPH = 0xb7,
+ ADDR_SADDR = 0xa9,
+ ADDR_SADEN = 0xb9,
/* Philips 80C52 */
- ADDR_AUXR = 0x8e,
- ADDR_AUXR1 = 0xa2,
+ ADDR_AUXR = 0x8e,
+ ADDR_AUXR1 = 0xa2,
/* DS5002FP */
- ADDR_CRCR = 0xc1,
- ADDR_CRCL = 0xc2,
- ADDR_CRCH = 0xc3,
- ADDR_MCON = 0xc6,
- ADDR_TA = 0xc7,
- ADDR_RNR = 0xcf,
- ADDR_RPCTL = 0xd8,
- ADDR_RPS = 0xda,
+ ADDR_CRCR = 0xc1,
+ ADDR_CRCL = 0xc2,
+ ADDR_CRCH = 0xc3,
+ ADDR_MCON = 0xc6,
+ ADDR_TA = 0xc7,
+ ADDR_RNR = 0xcf,
+ ADDR_RPCTL = 0xd8,
+ ADDR_RPS = 0xda,
};
@@ -216,18 +216,18 @@ enum
enum
{
- V_RESET = 0x000, /* power on address */
- V_IE0 = 0x003, /* External Interrupt 0 */
- V_TF0 = 0x00b, /* Timer 0 Overflow */
- V_IE1 = 0x013, /* External Interrupt 1 */
- V_TF1 = 0x01b, /* Timer 1 Overflow */
- V_RITI = 0x023, /* Serial Receive/Transmit */
+ V_RESET = 0x000, /* power on address */
+ V_IE0 = 0x003, /* External Interrupt 0 */
+ V_TF0 = 0x00b, /* Timer 0 Overflow */
+ V_IE1 = 0x013, /* External Interrupt 1 */
+ V_TF1 = 0x01b, /* Timer 1 Overflow */
+ V_RITI = 0x023, /* Serial Receive/Transmit */
/* 8052 Only Vectors */
- V_TF2 = 0x02b, /* Timer 2 Overflow */
+ V_TF2 = 0x02b, /* Timer 2 Overflow */
/* DS5002FP */
- V_PFI = 0x02b, /* Power Failure Interrupt */
+ V_PFI = 0x02b, /* Power Failure Interrupt */
};
/***************************************************************************
@@ -236,69 +236,69 @@ enum
struct mcs51_uart
{
- UINT8 data_out; //Data to send out
- UINT8 bits_to_send; //How many bits left to send when transmitting out the serial port
+ UINT8 data_out; //Data to send out
+ UINT8 bits_to_send; //How many bits left to send when transmitting out the serial port
- int smod_div; /* signal divided by 2^SMOD */
- int rx_clk; /* rx clock */
- int tx_clk; /* tx clock */
- UINT8 delay_cycles; //Gross Hack;
+ int smod_div; /* signal divided by 2^SMOD */
+ int rx_clk; /* rx clock */
+ int tx_clk; /* tx clock */
+ UINT8 delay_cycles; //Gross Hack;
};
struct mcs51_state_t
{
//Internal stuff
- UINT16 ppc; //previous pc
- UINT16 pc; //current pc
- UINT16 features; //features of this cpu
- UINT8 rwm; //Signals that the current instruction is a read/write/modify instruction
-
- int inst_cycles; /* cycles for the current instruction */
- int ram_mask; /* second ram bank for indirect access available ? */
- int num_interrupts; /* number of interrupts supported */
- int recalc_parity; /* recalculate parity before next instruction */
- UINT32 last_line_state; /* last state of input lines line */
- int t0_cnt; /* number of 0->1 transistions on T0 line */
- int t1_cnt; /* number of 0->1 transistions on T1 line */
- int t2_cnt; /* number of 0->1 transistions on T2 line */
- int t2ex_cnt; /* number of 0->1 transistions on T2EX line */
- int cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
- UINT8 irq_active; /* mask which irq levels are serviced */
- UINT8 irq_prio[8]; /* interrupt priority */
-
- int icount;
-
- mcs51_uart uart; /* internal uart */
+ UINT16 ppc; //previous pc
+ UINT16 pc; //current pc
+ UINT16 features; //features of this cpu
+ UINT8 rwm; //Signals that the current instruction is a read/write/modify instruction
+
+ int inst_cycles; /* cycles for the current instruction */
+ int ram_mask; /* second ram bank for indirect access available ? */
+ int num_interrupts; /* number of interrupts supported */
+ int recalc_parity; /* recalculate parity before next instruction */
+ UINT32 last_line_state; /* last state of input lines line */
+ int t0_cnt; /* number of 0->1 transistions on T0 line */
+ int t1_cnt; /* number of 0->1 transistions on T1 line */
+ int t2_cnt; /* number of 0->1 transistions on T2 line */
+ int t2ex_cnt; /* number of 0->1 transistions on T2EX line */
+ int cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
+ UINT8 irq_active; /* mask which irq levels are serviced */
+ UINT8 irq_prio[8]; /* interrupt priority */
+
+ int icount;
+
+ mcs51_uart uart; /* internal uart */
/* Internal Ram */
- UINT8 *internal_ram; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
- UINT8 *sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */
+ UINT8 *internal_ram; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
+ UINT8 *sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */
/* SFR Callbacks */
- void (*sfr_write)(mcs51_state_t *mcs51_state, size_t offset, UINT8 data);
- UINT8 (*sfr_read)(mcs51_state_t *mcs51_state, size_t offset);
+ void (*sfr_write)(mcs51_state_t *mcs51_state, size_t offset, UINT8 data);
+ UINT8 (*sfr_read)(mcs51_state_t *mcs51_state, size_t offset);
/* Interrupt Callback */
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
/* Memory spaces */
- address_space *program;
- direct_read_data *direct;
- address_space *data;
- address_space *io;
+ address_space *program;
+ direct_read_data *direct;
+ address_space *data;
+ address_space *io;
/* Serial Port TX/RX Callbacks */
// TODO: Move to special port r/w
- mcs51_serial_tx_func serial_tx_callback; //Call back funciton when sending data out of serial port
- mcs51_serial_rx_func serial_rx_callback; //Call back function to retrieve data when receiving serial port data
+ mcs51_serial_tx_func serial_tx_callback; //Call back funciton when sending data out of serial port
+ mcs51_serial_rx_func serial_rx_callback; //Call back function to retrieve data when receiving serial port data
/* DS5002FP */
struct {
- UINT8 previous_ta; /* Previous Timed Access value */
- UINT8 ta_window; /* Limed Access window */
- UINT8 range; /* Memory Range */
- const ds5002fp_config *config; /* Bootstrap Configuration */
+ UINT8 previous_ta; /* Previous Timed Access value */
+ UINT8 ta_window; /* Limed Access window */
+ UINT8 range; /* Memory Range */
+ const ds5002fp_config *config; /* Bootstrap Configuration */
} ds5002fp;
@@ -309,39 +309,39 @@ struct mcs51_state_t
***************************************************************************/
/* Read Opcode/Opcode Arguments from Program Code */
-#define ROP(pc) mcs51_state->direct->read_decrypted_byte(pc)
-#define ROP_ARG(pc) mcs51_state->direct->read_raw_byte(pc)
+#define ROP(pc) mcs51_state->direct->read_decrypted_byte(pc)
+#define ROP_ARG(pc) mcs51_state->direct->read_raw_byte(pc)
/* Read a byte from External Code Memory (Usually Program Rom(s) Space) */
-#define CODEMEM_R(a) (UINT8)mcs51_state->program->read_byte(a)
+#define CODEMEM_R(a) (UINT8)mcs51_state->program->read_byte(a)
/* Read/Write a byte from/to External Data Memory (Usually RAM or other I/O) */
-#define DATAMEM_R(a) (UINT8)mcs51_state->io->read_byte(a)
-#define DATAMEM_W(a,v) mcs51_state->io->write_byte(a, v)
+#define DATAMEM_R(a) (UINT8)mcs51_state->io->read_byte(a)
+#define DATAMEM_W(a,v) mcs51_state->io->write_byte(a, v)
/* Read/Write a byte from/to the Internal RAM */
-#define IRAM_R(a) iram_read(mcs51_state, a)
-#define IRAM_W(a, d) iram_write(mcs51_state, a, d)
+#define IRAM_R(a) iram_read(mcs51_state, a)
+#define IRAM_W(a, d) iram_write(mcs51_state, a, d)
/* Read/Write a byte from/to the Internal RAM indirectly */
/* (called from indirect addressing) */
INLINE UINT8 iram_iread(mcs51_state_t *mcs51_state, offs_t a) { return (a <= mcs51_state->ram_mask) ? mcs51_state->data->read_byte(a) : 0xff; }
INLINE void iram_iwrite(mcs51_state_t *mcs51_state, offs_t a, UINT8 d) { if (a <= mcs51_state->ram_mask) mcs51_state->data->write_byte(a, d); }
-#define IRAM_IR(a) iram_iread(mcs51_state, a)
-#define IRAM_IW(a, d) iram_iwrite(mcs51_state, a, d)
+#define IRAM_IR(a) iram_iread(mcs51_state, a)
+#define IRAM_IW(a, d) iram_iwrite(mcs51_state, a, d)
/* Form an Address to Read/Write to External RAM indirectly */
/* (called from indirect addressing) */
-#define ERAM_ADDR(a,m) external_ram_iaddr(mcs51_state, a,m)
+#define ERAM_ADDR(a,m) external_ram_iaddr(mcs51_state, a,m)
/* Read/Write a bit from Bit Addressable Memory */
-#define BIT_R(a) bit_address_r(mcs51_state, a)
-#define BIT_W(a,v) bit_address_w(mcs51_state, a, v)
+#define BIT_R(a) bit_address_r(mcs51_state, a)
+#define BIT_W(a,v) bit_address_w(mcs51_state, a, v)
/* Input/Output a byte from given I/O port */
-#define IN(port) ((UINT8)mcs51_state->io->read_byte(port))
+#define IN(port) ((UINT8)mcs51_state->io->read_byte(port))
#define OUT(port,value) mcs51_state->io->write_byte(port,value)
@@ -349,54 +349,54 @@ INLINE void iram_iwrite(mcs51_state_t *mcs51_state, offs_t a, UINT8 d) { if (a <
SHORTCUTS
***************************************************************************/
-#define PPC mcs51_state->ppc
-#define PC mcs51_state->pc
-#define RWM mcs51_state->rwm
+#define PPC mcs51_state->ppc
+#define PC mcs51_state->pc
+#define RWM mcs51_state->rwm
/* SFR Registers - These are accessed directly for speed on read */
/* Read accessors */
-#define SFR_A(a) mcs51_state->sfr_ram[(a)]
-#define SET_SFR_A(a,v) do { SFR_A(a) = (v); } while (0)
-
-#define ACC ((const UINT8) SFR_A(ADDR_ACC))
-#define PSW ((const UINT8) SFR_A(ADDR_PSW))
-
-#define P0 ((const UINT8) SFR_A(ADDR_P0))
-#define P1 ((const UINT8) SFR_A(ADDR_P1))
-#define P2 ((const UINT8) SFR_A(ADDR_P2))
-#define P3 ((const UINT8) SFR_A(ADDR_P3))
-
-#define SP SFR_A(ADDR_SP)
-#define DPL SFR_A(ADDR_DPL)
-#define DPH SFR_A(ADDR_DPH)
-#define PCON SFR_A(ADDR_PCON)
-#define TCON SFR_A(ADDR_TCON)
-#define TMOD SFR_A(ADDR_TMOD)
-#define TL0 SFR_A(ADDR_TL0)
-#define TL1 SFR_A(ADDR_TL1)
-#define TH0 SFR_A(ADDR_TH0)
-#define TH1 SFR_A(ADDR_TH1)
-#define SCON SFR_A(ADDR_SCON)
-#define IE SFR_A(ADDR_IE)
-#define IP SFR_A(ADDR_IP)
-#define B SFR_A(ADDR_B)
-#define SBUF SFR_A(ADDR_SBUF)
-
-#define R_REG(r) mcs51_state->internal_ram[(r) | (PSW & 0x18)]
-#define DPTR ((DPH<<8) | DPL)
+#define SFR_A(a) mcs51_state->sfr_ram[(a)]
+#define SET_SFR_A(a,v) do { SFR_A(a) = (v); } while (0)
+
+#define ACC ((const UINT8) SFR_A(ADDR_ACC))
+#define PSW ((const UINT8) SFR_A(ADDR_PSW))
+
+#define P0 ((const UINT8) SFR_A(ADDR_P0))
+#define P1 ((const UINT8) SFR_A(ADDR_P1))
+#define P2 ((const UINT8) SFR_A(ADDR_P2))
+#define P3 ((const UINT8) SFR_A(ADDR_P3))
+
+#define SP SFR_A(ADDR_SP)
+#define DPL SFR_A(ADDR_DPL)
+#define DPH SFR_A(ADDR_DPH)
+#define PCON SFR_A(ADDR_PCON)
+#define TCON SFR_A(ADDR_TCON)
+#define TMOD SFR_A(ADDR_TMOD)
+#define TL0 SFR_A(ADDR_TL0)
+#define TL1 SFR_A(ADDR_TL1)
+#define TH0 SFR_A(ADDR_TH0)
+#define TH1 SFR_A(ADDR_TH1)
+#define SCON SFR_A(ADDR_SCON)
+#define IE SFR_A(ADDR_IE)
+#define IP SFR_A(ADDR_IP)
+#define B SFR_A(ADDR_B)
+#define SBUF SFR_A(ADDR_SBUF)
+
+#define R_REG(r) mcs51_state->internal_ram[(r) | (PSW & 0x18)]
+#define DPTR ((DPH<<8) | DPL)
/* 8052 Only registers */
-#define T2CON SFR_A(ADDR_T2CON)
-#define RCAP2L SFR_A(ADDR_RCAP2L)
-#define RCAP2H SFR_A(ADDR_RCAP2H)
-#define TL2 SFR_A(ADDR_TL2)
-#define TH2 SFR_A(ADDR_TH2)
+#define T2CON SFR_A(ADDR_T2CON)
+#define RCAP2L SFR_A(ADDR_RCAP2L)
+#define RCAP2H SFR_A(ADDR_RCAP2H)
+#define TL2 SFR_A(ADDR_TL2)
+#define TH2 SFR_A(ADDR_TH2)
/* 80C52 Only registers */
-#define IPH SFR_A(ADDR_IPH)
-#define SADDR SFR_A(ADDR_SADDR)
-#define SADEN SFR_A(ADDR_SADEN)
+#define IPH SFR_A(ADDR_IPH)
+#define SADDR SFR_A(ADDR_SADDR)
+#define SADEN SFR_A(ADDR_SADEN)
/* Philips 80C52 */
/* ============= */
@@ -404,7 +404,7 @@ INLINE void iram_iwrite(mcs51_state_t *mcs51_state, offs_t a, UINT8 d) { if (a <
* The AO bit (AUXR.0) in the AUXR register when set disables the
* ALE output.
*/
-#define AUXR SFR_A(ADDR_AUXR)
+#define AUXR SFR_A(ADDR_AUXR)
/* The dual DPTR structure (see Figure 12) is a way by which the
* 80C52/54/58 will specify the address of an external data memory
@@ -412,224 +412,224 @@ INLINE void iram_iwrite(mcs51_state_t *mcs51_state, offs_t a, UINT8 d) { if (a <
* external memory, and a single bit called DPS = AUXR1/bit0 that
* allows the program code to switch between them.
*/
-#define AUXR1 SFR_A(ADDR_AUXR1)
+#define AUXR1 SFR_A(ADDR_AUXR1)
/* DS5002FP only registers */
-#define CRCR SFR_A(ADDR_CRCR)
-#define CRCL SFR_A(ADDR_CRCL)
-#define CRCH SFR_A(ADDR_CRCH)
-#define MCON SFR_A(ADDR_MCON)
-#define TA SFR_A(ADDR_TA)
-#define RNR SFR_A(ADDR_RNR)
-#define RPCTL SFR_A(ADDR_RPCTL)
-#define RPS SFR_A(ADDR_RPS)
+#define CRCR SFR_A(ADDR_CRCR)
+#define CRCL SFR_A(ADDR_CRCL)
+#define CRCH SFR_A(ADDR_CRCH)
+#define MCON SFR_A(ADDR_MCON)
+#define TA SFR_A(ADDR_TA)
+#define RNR SFR_A(ADDR_RNR)
+#define RPCTL SFR_A(ADDR_RPCTL)
+#define RPS SFR_A(ADDR_RPS)
/* WRITE accessors */
/* Shortcuts */
-#define SET_PSW(v) do { SFR_A(ADDR_PSW) = (v); SET_PARITY(); } while (0)
-#define SET_ACC(v) do { SFR_A(ADDR_ACC) = (v); SET_PARITY(); } while (0)
+#define SET_PSW(v) do { SFR_A(ADDR_PSW) = (v); SET_PARITY(); } while (0)
+#define SET_ACC(v) do { SFR_A(ADDR_ACC) = (v); SET_PARITY(); } while (0)
/* These trigger actions on modification and have to be written through SFR_W */
-#define SET_P0(v) IRAM_W(ADDR_P0, v)
-#define SET_P1(v) IRAM_W(ADDR_P1, v)
-#define SET_P2(v) IRAM_W(ADDR_P2, v)
-#define SET_P3(v) IRAM_W(ADDR_P3, v)
+#define SET_P0(v) IRAM_W(ADDR_P0, v)
+#define SET_P1(v) IRAM_W(ADDR_P1, v)
+#define SET_P2(v) IRAM_W(ADDR_P2, v)
+#define SET_P3(v) IRAM_W(ADDR_P3, v)
/* Within the cpu core, do not trigger a send */
-#define SET_SBUF(v) SET_SFR_A(ADDR_SBUF, v)
+#define SET_SBUF(v) SET_SFR_A(ADDR_SBUF, v)
/* No actions triggered on write */
-#define SET_REG(r, v) do { mcs51_state->internal_ram[(r) | (PSW & 0x18)] = (v); } while (0)
+#define SET_REG(r, v) do { mcs51_state->internal_ram[(r) | (PSW & 0x18)] = (v); } while (0)
-#define SET_DPTR(n) do { DPH = ((n) >> 8) & 0xff; DPL = (n) & 0xff; } while (0)
+#define SET_DPTR(n) do { DPH = ((n) >> 8) & 0xff; DPL = (n) & 0xff; } while (0)
/* Macros for Setting Flags */
#define SET_X(R, v) do { R = (v);} while (0)
-#define SET_CY(n) SET_PSW((PSW & 0x7f) | (n<<7)) //Carry Flag
-#define SET_AC(n) SET_PSW((PSW & 0xbf) | (n<<6)) //Aux.Carry Flag
-#define SET_FO(n) SET_PSW((PSW & 0xdf) | (n<<5)) //User Flag
-#define SET_RS(n) SET_PSW((PSW & 0xe7) | (n<<3)) //R Bank Select
-#define SET_OV(n) SET_PSW((PSW & 0xfb) | (n<<2)) //Overflow Flag
-#define SET_P(n) SET_PSW((PSW & 0xfe) | (n<<0)) //Parity Flag
+#define SET_CY(n) SET_PSW((PSW & 0x7f) | (n<<7)) //Carry Flag
+#define SET_AC(n) SET_PSW((PSW & 0xbf) | (n<<6)) //Aux.Carry Flag
+#define SET_FO(n) SET_PSW((PSW & 0xdf) | (n<<5)) //User Flag
+#define SET_RS(n) SET_PSW((PSW & 0xe7) | (n<<3)) //R Bank Select
+#define SET_OV(n) SET_PSW((PSW & 0xfb) | (n<<2)) //Overflow Flag
+#define SET_P(n) SET_PSW((PSW & 0xfe) | (n<<0)) //Parity Flag
#define SET_BIT(R, n, v) do { R = (R & ~(1<<(n))) | ((v) << (n));} while (0)
#define GET_BIT(R, n) (((R)>>(n)) & 0x01)
-#define SET_EA(n) SET_BIT(IE, 7, n) //Global Interrupt Enable/Disable
-#define SET_ES(n) SET_BIT(IE, 4, v) //Serial Interrupt Enable/Disable
-#define SET_ET1(n) SET_BIT(IE, 3, n) //Timer 1 Interrupt Enable/Disable
-#define SET_EX1(n) SET_BIT(IE, 2, n) //External Int 1 Interrupt Enable/Disable
-#define SET_ET0(n) SET_BIT(IE, 1, n) //Timer 0 Interrupt Enable/Disable
-#define SET_EX0(n) SET_BIT(IE, 0, n) //External Int 0 Interrupt Enable/Disable
+#define SET_EA(n) SET_BIT(IE, 7, n) //Global Interrupt Enable/Disable
+#define SET_ES(n) SET_BIT(IE, 4, v) //Serial Interrupt Enable/Disable
+#define SET_ET1(n) SET_BIT(IE, 3, n) //Timer 1 Interrupt Enable/Disable
+#define SET_EX1(n) SET_BIT(IE, 2, n) //External Int 1 Interrupt Enable/Disable
+#define SET_ET0(n) SET_BIT(IE, 1, n) //Timer 0 Interrupt Enable/Disable
+#define SET_EX0(n) SET_BIT(IE, 0, n) //External Int 0 Interrupt Enable/Disable
/* 8052 Only flags */
-#define SET_ET2(n) SET_BIT(IE, 5, n) //Timer 2 Interrupt Enable/Disable
+#define SET_ET2(n) SET_BIT(IE, 5, n) //Timer 2 Interrupt Enable/Disable
/* 8052 Only flags */
-#define SET_PT2(n) SET_BIT(IP, 5, n); //Set Timer 2 Priority Level
-
-#define SET_PS0(n) SET_BIT(IP, 4, n) //Set Serial Priority Level
-#define SET_PT1(n) SET_BIT(IP, 3, n) //Set Timer 1 Priority Level
-#define SET_PX1(n) SET_BIT(IP, 2, n) //Set External Int 1 Priority Level
-#define SET_PT0(n) SET_BIT(IP, 1, n) //Set Timer 0 Priority Level
-#define SET_PX0(n) SET_BIT(IP, 0, n) //Set External Int 0 Priority Level
-
-#define SET_TF1(n) SET_BIT(TCON, 7, n) //Indicated Timer 1 Overflow Int Triggered
-#define SET_TR1(n) SET_BIT(TCON, 6, n) //IndicateS Timer 1 is running
-#define SET_TF0(n) SET_BIT(TCON, 5, n) //Indicated Timer 0 Overflow Int Triggered
-#define SET_TR0(n) SET_BIT(TCON, 4, n) //IndicateS Timer 0 is running
-#define SET_IE1(n) SET_BIT(TCON, 3, n) //Indicated External Int 1 Triggered
-#define SET_IT1(n) SET_BIT(TCON, 2, n) //Indicates how External Int 1 is Triggered
-#define SET_IE0(n) SET_BIT(TCON, 1, n) //Indicated External Int 0 Triggered
-#define SET_IT0(n) SET_BIT(TCON, 0, n) //Indicates how External Int 0 is Triggered
-
-#define SET_SM0(n) SET_BIT(SCON, 7, n) //Sets Serial Port Mode
-#define SET_SM1(n) SET_BIT(SCON, 6, n) //Sets Serial Port Mode
-#define SET_SM2(n) SET_BIT(SCON, 5, n) //Sets Serial Port Mode (Multiprocesser mode)
-#define SET_REN(n) SET_BIT(SCON, 4, n) //Sets Serial Port Receive Enable
-#define SET_TB8(n) SET_BIT(SCON, 3, n) //Transmit 8th Bit
-#define SET_RB8(n) SET_BIT(SCON, 2, n) //Receive 8th Bit
-#define SET_TI(n) SET_BIT(SCON, 1, n) //Indicates Transmit Interrupt Occurred
-#define SET_RI(n) SET_BIT(SCON, 0, n) //Indicates Receive Interrupt Occurred
-
-#define SET_GATE1(n) SET_BIT(TMOD, 7, n) //Timer 1 Gate Mode
-#define SET_CT1(n) SET_BIT(TMOD, 6, n) //Timer 1 Counter Mode
-#define SET_M1_1(n) SET_BIT(TMOD, 5, n) //Timer 1 Timer Mode Bit 1
-#define SET_M1_0(n) SET_BIT(TMOD, 4, n) //Timer 1 Timer Mode Bit 0
-#define SET_GATE0(n) SET_BIT(TMOD, 3, n) //Timer 0 Gate Mode
-#define SET_CT0(n) SET_BIT(TMOD, 2, n) //Timer 0 Counter Mode
-#define SET_M0_1(n) SET_BIT(TMOD, 1, n) //Timer 0 Timer Mode Bit 1
-#define SET_M0_0(n) SET_BIT(TMOD, 0, n) //Timer 0 Timer Mode Bit 0
+#define SET_PT2(n) SET_BIT(IP, 5, n); //Set Timer 2 Priority Level
+
+#define SET_PS0(n) SET_BIT(IP, 4, n) //Set Serial Priority Level
+#define SET_PT1(n) SET_BIT(IP, 3, n) //Set Timer 1 Priority Level
+#define SET_PX1(n) SET_BIT(IP, 2, n) //Set External Int 1 Priority Level
+#define SET_PT0(n) SET_BIT(IP, 1, n) //Set Timer 0 Priority Level
+#define SET_PX0(n) SET_BIT(IP, 0, n) //Set External Int 0 Priority Level
+
+#define SET_TF1(n) SET_BIT(TCON, 7, n) //Indicated Timer 1 Overflow Int Triggered
+#define SET_TR1(n) SET_BIT(TCON, 6, n) //IndicateS Timer 1 is running
+#define SET_TF0(n) SET_BIT(TCON, 5, n) //Indicated Timer 0 Overflow Int Triggered
+#define SET_TR0(n) SET_BIT(TCON, 4, n) //IndicateS Timer 0 is running
+#define SET_IE1(n) SET_BIT(TCON, 3, n) //Indicated External Int 1 Triggered
+#define SET_IT1(n) SET_BIT(TCON, 2, n) //Indicates how External Int 1 is Triggered
+#define SET_IE0(n) SET_BIT(TCON, 1, n) //Indicated External Int 0 Triggered
+#define SET_IT0(n) SET_BIT(TCON, 0, n) //Indicates how External Int 0 is Triggered
+
+#define SET_SM0(n) SET_BIT(SCON, 7, n) //Sets Serial Port Mode
+#define SET_SM1(n) SET_BIT(SCON, 6, n) //Sets Serial Port Mode
+#define SET_SM2(n) SET_BIT(SCON, 5, n) //Sets Serial Port Mode (Multiprocesser mode)
+#define SET_REN(n) SET_BIT(SCON, 4, n) //Sets Serial Port Receive Enable
+#define SET_TB8(n) SET_BIT(SCON, 3, n) //Transmit 8th Bit
+#define SET_RB8(n) SET_BIT(SCON, 2, n) //Receive 8th Bit
+#define SET_TI(n) SET_BIT(SCON, 1, n) //Indicates Transmit Interrupt Occurred
+#define SET_RI(n) SET_BIT(SCON, 0, n) //Indicates Receive Interrupt Occurred
+
+#define SET_GATE1(n) SET_BIT(TMOD, 7, n) //Timer 1 Gate Mode
+#define SET_CT1(n) SET_BIT(TMOD, 6, n) //Timer 1 Counter Mode
+#define SET_M1_1(n) SET_BIT(TMOD, 5, n) //Timer 1 Timer Mode Bit 1
+#define SET_M1_0(n) SET_BIT(TMOD, 4, n) //Timer 1 Timer Mode Bit 0
+#define SET_GATE0(n) SET_BIT(TMOD, 3, n) //Timer 0 Gate Mode
+#define SET_CT0(n) SET_BIT(TMOD, 2, n) //Timer 0 Counter Mode
+#define SET_M0_1(n) SET_BIT(TMOD, 1, n) //Timer 0 Timer Mode Bit 1
+#define SET_M0_0(n) SET_BIT(TMOD, 0, n) //Timer 0 Timer Mode Bit 0
/* 8052 Only flags - T2CON Flags */
-#define SET_TF2(n) SET_BIT(T2CON, 7, n) //Indicated Timer 2 Overflow Int Triggered
-#define SET_EXF2(n) SET_BIT(T2CON, 6, n) //Indicates Timer 2 External Flag
-#define SET_RCLK(n) SET_BIT(T2CON, 5, n) //Receive Clock
-#define SET_TCLK(n) SET_BIT(T2CON, 4, n) //Transmit Clock
-#define SET_EXEN2(n) SET_BIT(T2CON, 3, n) //Timer 2 External Interrupt Enable
-#define SET_TR2(n) SET_BIT(T2CON, 2, n) //Indicates Timer 2 is running
-#define SET_CT2(n) SET_BIT(T2CON, 1, n) //Sets Timer 2 Counter/Timer Mode
-#define SET_CP(n) SET_BIT(T2CON, 0, n) //Sets Timer 2 Capture/Reload Mode
-
-#define SET_GF1(n) SET_BIT(PCON, 3, n)
-#define SET_GF0(n) SET_BIT(PCON, 2, n)
-#define SET_PD(n) SET_BIT(PCON, 1, n)
-#define SET_IDL(n) SET_BIT(PCON, 0, n)
+#define SET_TF2(n) SET_BIT(T2CON, 7, n) //Indicated Timer 2 Overflow Int Triggered
+#define SET_EXF2(n) SET_BIT(T2CON, 6, n) //Indicates Timer 2 External Flag
+#define SET_RCLK(n) SET_BIT(T2CON, 5, n) //Receive Clock
+#define SET_TCLK(n) SET_BIT(T2CON, 4, n) //Transmit Clock
+#define SET_EXEN2(n) SET_BIT(T2CON, 3, n) //Timer 2 External Interrupt Enable
+#define SET_TR2(n) SET_BIT(T2CON, 2, n) //Indicates Timer 2 is running
+#define SET_CT2(n) SET_BIT(T2CON, 1, n) //Sets Timer 2 Counter/Timer Mode
+#define SET_CP(n) SET_BIT(T2CON, 0, n) //Sets Timer 2 Capture/Reload Mode
+
+#define SET_GF1(n) SET_BIT(PCON, 3, n)
+#define SET_GF0(n) SET_BIT(PCON, 2, n)
+#define SET_PD(n) SET_BIT(PCON, 1, n)
+#define SET_IDL(n) SET_BIT(PCON, 0, n)
/* Macros for accessing flags */
-#define GET_CY GET_BIT(PSW, 7)
-#define GET_AC GET_BIT(PSW, 6)
-#define GET_FO GET_BIT(PSW, 5)
-#define GET_RS GET_BIT(PSW, 3)
-#define GET_OV GET_BIT(PSW, 2)
-#define GET_P GET_BIT(PSW, 0)
-
-#define GET_EA GET_BIT(IE, 7)
-#define GET_ET2 GET_BIT(IE, 5)
-#define GET_ES GET_BIT(IE, 4)
-#define GET_ET1 GET_BIT(IE, 3)
-#define GET_EX1 GET_BIT(IE, 2)
-#define GET_ET0 GET_BIT(IE, 1)
-#define GET_EX0 GET_BIT(IE, 0)
+#define GET_CY GET_BIT(PSW, 7)
+#define GET_AC GET_BIT(PSW, 6)
+#define GET_FO GET_BIT(PSW, 5)
+#define GET_RS GET_BIT(PSW, 3)
+#define GET_OV GET_BIT(PSW, 2)
+#define GET_P GET_BIT(PSW, 0)
+
+#define GET_EA GET_BIT(IE, 7)
+#define GET_ET2 GET_BIT(IE, 5)
+#define GET_ES GET_BIT(IE, 4)
+#define GET_ET1 GET_BIT(IE, 3)
+#define GET_EX1 GET_BIT(IE, 2)
+#define GET_ET0 GET_BIT(IE, 1)
+#define GET_EX0 GET_BIT(IE, 0)
/* 8052 Only flags */
-#define GET_PT2 GET_BIT(IP, 5)
-
-#define GET_PS GET_BIT(IP, 4)
-#define GET_PT1 GET_BIT(IP, 3)
-#define GET_PX1 GET_BIT(IP, 2)
-#define GET_PT0 GET_BIT(IP, 1)
-#define GET_PX0 GET_BIT(IP, 0)
-
-#define GET_TF1 GET_BIT(TCON, 7)
-#define GET_TR1 GET_BIT(TCON, 6)
-#define GET_TF0 GET_BIT(TCON, 5)
-#define GET_TR0 GET_BIT(TCON, 4)
-#define GET_IE1 GET_BIT(TCON, 3)
-#define GET_IT1 GET_BIT(TCON, 2)
-#define GET_IE0 GET_BIT(TCON, 1)
-#define GET_IT0 GET_BIT(TCON, 0)
-
-#define GET_SM0 GET_BIT(SCON, 7)
-#define GET_SM1 GET_BIT(SCON, 6)
-#define GET_SM2 GET_BIT(SCON, 5)
-#define GET_REN GET_BIT(SCON, 4)
-#define GET_TB8 GET_BIT(SCON, 3)
-#define GET_RB8 GET_BIT(SCON, 2)
-#define GET_TI GET_BIT(SCON, 1)
-#define GET_RI GET_BIT(SCON, 0)
-
-#define GET_GATE1 GET_BIT(TMOD, 7)
-#define GET_CT1 GET_BIT(TMOD, 6)
-#define GET_M1_1 GET_BIT(TMOD, 5)
-#define GET_M1_0 GET_BIT(TMOD, 4)
-#define GET_GATE0 GET_BIT(TMOD, 3)
-#define GET_CT0 GET_BIT(TMOD, 2)
-#define GET_M0_1 GET_BIT(TMOD, 1)
-#define GET_M0_0 GET_BIT(TMOD, 0)
-
-#define GET_SMOD GET_BIT(PCON, 7)
+#define GET_PT2 GET_BIT(IP, 5)
+
+#define GET_PS GET_BIT(IP, 4)
+#define GET_PT1 GET_BIT(IP, 3)
+#define GET_PX1 GET_BIT(IP, 2)
+#define GET_PT0 GET_BIT(IP, 1)
+#define GET_PX0 GET_BIT(IP, 0)
+
+#define GET_TF1 GET_BIT(TCON, 7)
+#define GET_TR1 GET_BIT(TCON, 6)
+#define GET_TF0 GET_BIT(TCON, 5)
+#define GET_TR0 GET_BIT(TCON, 4)
+#define GET_IE1 GET_BIT(TCON, 3)
+#define GET_IT1 GET_BIT(TCON, 2)
+#define GET_IE0 GET_BIT(TCON, 1)
+#define GET_IT0 GET_BIT(TCON, 0)
+
+#define GET_SM0 GET_BIT(SCON, 7)
+#define GET_SM1 GET_BIT(SCON, 6)
+#define GET_SM2 GET_BIT(SCON, 5)
+#define GET_REN GET_BIT(SCON, 4)
+#define GET_TB8 GET_BIT(SCON, 3)
+#define GET_RB8 GET_BIT(SCON, 2)
+#define GET_TI GET_BIT(SCON, 1)
+#define GET_RI GET_BIT(SCON, 0)
+
+#define GET_GATE1 GET_BIT(TMOD, 7)
+#define GET_CT1 GET_BIT(TMOD, 6)
+#define GET_M1_1 GET_BIT(TMOD, 5)
+#define GET_M1_0 GET_BIT(TMOD, 4)
+#define GET_GATE0 GET_BIT(TMOD, 3)
+#define GET_CT0 GET_BIT(TMOD, 2)
+#define GET_M0_1 GET_BIT(TMOD, 1)
+#define GET_M0_0 GET_BIT(TMOD, 0)
+
+#define GET_SMOD GET_BIT(PCON, 7)
/* Only in 80C51BH & other cmos */
-#define GET_GF1 GET_BIT(PCON, 3)
-#define GET_GF0 GET_BIT(PCON, 2)
-#define GET_PD GET_BIT(PCON, 1)
-#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) /* PD takes precedence! */
+#define GET_GF1 GET_BIT(PCON, 3)
+#define GET_GF0 GET_BIT(PCON, 2)
+#define GET_PD GET_BIT(PCON, 1)
+#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) /* PD takes precedence! */
/* 8052 Only flags */
-#define GET_TF2 GET_BIT(T2CON, 7)
-#define GET_EXF2 GET_BIT(T2CON, 6)
-#define GET_RCLK GET_BIT(T2CON, 5)
-#define GET_TCLK GET_BIT(T2CON, 4)
-#define GET_EXEN2 GET_BIT(T2CON, 3)
-#define GET_TR2 GET_BIT(T2CON, 2)
-#define GET_CT2 GET_BIT(T2CON, 1)
-#define GET_CP GET_BIT(T2CON, 0)
+#define GET_TF2 GET_BIT(T2CON, 7)
+#define GET_EXF2 GET_BIT(T2CON, 6)
+#define GET_RCLK GET_BIT(T2CON, 5)
+#define GET_TCLK GET_BIT(T2CON, 4)
+#define GET_EXEN2 GET_BIT(T2CON, 3)
+#define GET_TR2 GET_BIT(T2CON, 2)
+#define GET_CT2 GET_BIT(T2CON, 1)
+#define GET_CP GET_BIT(T2CON, 0)
/* DS5002FP Only flags */
/* PCON Flags - DS5002FP */
-#define GET_POR GET_BIT(PCON, 6)
-#define GET_PFW GET_BIT(PCON, 5)
-#define GET_WTR GET_BIT(PCON, 4)
-#define GET_EPFW GET_BIT(PCON, 3)
-#define GET_EWT GET_BIT(PCON, 2)
+#define GET_POR GET_BIT(PCON, 6)
+#define GET_PFW GET_BIT(PCON, 5)
+#define GET_WTR GET_BIT(PCON, 4)
+#define GET_EPFW GET_BIT(PCON, 3)
+#define GET_EWT GET_BIT(PCON, 2)
-#define SET_PFW(n) SET_BIT(PCON, 5, n)
+#define SET_PFW(n) SET_BIT(PCON, 5, n)
/* MCON Flags - DS5002FP */
-#define GET_PA ((MCON & 0xf0)>>4)
-#define GET_RG1 GET_BIT(MCON, 3)
-#define GET_PES GET_BIT(MCON, 2)
-#define GET_PM GET_BIT(MCON, 1)
-#define GET_SL GET_BIT(MCON, 0)
+#define GET_PA ((MCON & 0xf0)>>4)
+#define GET_RG1 GET_BIT(MCON, 3)
+#define GET_PES GET_BIT(MCON, 2)
+#define GET_PM GET_BIT(MCON, 1)
+#define GET_SL GET_BIT(MCON, 0)
/* RPCTL Flags - DS5002FP */
-#define GET_RNR GET_BIT(RPCTL, 7) /* Bit 6 ?? */
-#define GET_EXBS GET_BIT(RPCTL, 5)
-#define GET_AE GET_BIT(RPCTL, 4)
-#define GET_IBI GET_BIT(RPCTL, 3)
-#define GET_DMA GET_BIT(RPCTL, 2)
-#define GET_RPCON GET_BIT(RPCTL, 1)
-#define GET_RG0 GET_BIT(RPCTL, 0)
+#define GET_RNR GET_BIT(RPCTL, 7) /* Bit 6 ?? */
+#define GET_EXBS GET_BIT(RPCTL, 5)
+#define GET_AE GET_BIT(RPCTL, 4)
+#define GET_IBI GET_BIT(RPCTL, 3)
+#define GET_DMA GET_BIT(RPCTL, 2)
+#define GET_RPCON GET_BIT(RPCTL, 1)
+#define GET_RG0 GET_BIT(RPCTL, 0)
/*Add and Subtract Flag settings*/
-#define DO_ADD_FLAGS(a,d,c) do_add_flags(mcs51_state, a, d, c)
-#define DO_SUB_FLAGS(a,d,c) do_sub_flags(mcs51_state, a, d, c)
+#define DO_ADD_FLAGS(a,d,c) do_add_flags(mcs51_state, a, d, c)
+#define DO_SUB_FLAGS(a,d,c) do_sub_flags(mcs51_state, a, d, c)
-#define SET_PARITY() do {mcs51_state->recalc_parity |= 1;} while (0)
-#define PUSH_PC() push_pc(mcs51_state)
-#define POP_PC() pop_pc(mcs51_state)
+#define SET_PARITY() do {mcs51_state->recalc_parity |= 1;} while (0)
+#define PUSH_PC() push_pc(mcs51_state)
+#define POP_PC() pop_pc(mcs51_state)
/* Clear Current IRQ */
#define CLEAR_CURRENT_IRQ() clear_current_irq(mcs51_state)
@@ -651,19 +651,19 @@ INLINE mcs51_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == I8031 ||
- device->type() == I8032 ||
- device->type() == I8051 ||
- device->type() == I8751 ||
- device->type() == I8052 ||
- device->type() == I8752 ||
- device->type() == I80C31 ||
- device->type() == I80C32 ||
- device->type() == I80C51 ||
- device->type() == I80C52 ||
- device->type() == I87C51 ||
- device->type() == I87C52 ||
- device->type() == AT89C4051 ||
- device->type() == DS5002FP);
+ device->type() == I8032 ||
+ device->type() == I8051 ||
+ device->type() == I8751 ||
+ device->type() == I8052 ||
+ device->type() == I8752 ||
+ device->type() == I80C31 ||
+ device->type() == I80C32 ||
+ device->type() == I80C51 ||
+ device->type() == I80C52 ||
+ device->type() == I87C51 ||
+ device->type() == I87C52 ||
+ device->type() == AT89C4051 ||
+ device->type() == DS5002FP);
return (mcs51_state_t *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -731,7 +731,7 @@ INLINE offs_t external_ram_iaddr(mcs51_state_t *mcs51_state, offs_t offset, offs
/* Memory Partition Table (RG1 & RG0 @ MCON & RPCTL registers) */
static const UINT32 ds5002fp_partitions[16] = {
0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
- 0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000 };
+ 0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000 };
/* if partition mode is set, adjust offset based on the bus */
if (mcs51_state->features & FEATURE_DS5002FP)
@@ -770,20 +770,20 @@ INLINE void iram_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 data)
/*Push the current PC to the stack*/
INLINE void push_pc(mcs51_state_t *mcs51_state)
{
- UINT8 tmpSP = SP+1; //Grab and Increment Stack Pointer
- IRAM_IW(tmpSP, (PC & 0xff)); //Store low byte of PC to Internal Ram (Use IRAM_IW to store stack above 128 bytes)
- tmpSP++; // ""
- SP = tmpSP; // ""
- IRAM_IW(tmpSP, ( (PC & 0xff00) >> 8)); //Store hi byte of PC to next address in Internal Ram (Use IRAM_IW to store stack above 128 bytes)
+ UINT8 tmpSP = SP+1; //Grab and Increment Stack Pointer
+ IRAM_IW(tmpSP, (PC & 0xff)); //Store low byte of PC to Internal Ram (Use IRAM_IW to store stack above 128 bytes)
+ tmpSP++; // ""
+ SP = tmpSP; // ""
+ IRAM_IW(tmpSP, ( (PC & 0xff00) >> 8)); //Store hi byte of PC to next address in Internal Ram (Use IRAM_IW to store stack above 128 bytes)
}
/*Pop the current PC off the stack and into the pc*/
INLINE void pop_pc(mcs51_state_t *mcs51_state)
{
- UINT8 tmpSP = SP; //Grab Stack Pointer
- PC = (IRAM_IR(tmpSP--) & 0xff) << 8; //Store hi byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
- PC = PC | IRAM_IR(tmpSP--); //Store lo byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
- SP = tmpSP; //Decrement Stack Pointer
+ UINT8 tmpSP = SP; //Grab Stack Pointer
+ PC = (IRAM_IR(tmpSP--) & 0xff) << 8; //Store hi byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
+ PC = PC | IRAM_IR(tmpSP--); //Store lo byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
+ SP = tmpSP; //Decrement Stack Pointer
}
//Set the PSW Parity Flag
@@ -794,7 +794,7 @@ INLINE void set_parity(mcs51_state_t *mcs51_state)
int i;
UINT8 a = ACC;
- for (i=0; i<8; i++) { //Test for each of the 8 bits in the ACC!
+ for (i=0; i<8; i++) { //Test for each of the 8 bits in the ACC!
p ^= (a & 1);
a = (a >> 1);
}
@@ -804,10 +804,10 @@ INLINE void set_parity(mcs51_state_t *mcs51_state)
INLINE UINT8 bit_address_r(mcs51_state_t *mcs51_state, UINT8 offset)
{
- UINT8 word;
- UINT8 mask;
- int bit_pos;
- int distance; /* distance between bit addressable words */
+ UINT8 word;
+ UINT8 mask;
+ int bit_pos;
+ int distance; /* distance between bit addressable words */
/* 1 for normal bits, 8 for sfr bit addresses */
//User defined bit addresses 0x20-0x2f (values are 0x0-0x7f)
@@ -831,11 +831,11 @@ INLINE UINT8 bit_address_r(mcs51_state_t *mcs51_state, UINT8 offset)
INLINE void bit_address_w(mcs51_state_t *mcs51_state, UINT8 offset, UINT8 bit)
{
- int word;
- UINT8 mask;
- int bit_pos;
- UINT8 result;
- int distance;
+ int word;
+ UINT8 mask;
+ int bit_pos;
+ UINT8 result;
+ int distance;
/* User defined bit addresses 0x20-0x2f (values are 0x0-0x7f) */
if (offset < 0x80) {
@@ -971,13 +971,13 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles)
/* taken, reset */
mcs51_state->t0_cnt = 0;
/* TODO: Not sure about IE0. The manual specifies INT0=high,
- * which in turn means CLEAR_LINE.
- * IE0 may be edge triggered depending on IT0 */
+ * which in turn means CLEAR_LINE.
+ * IE0 may be edge triggered depending on IT0 */
if (GET_GATE0 && !GET_IE0)
delta = 0;
switch(mode) {
- case 0: /* 13 Bit Timer Mode */
+ case 0: /* 13 Bit Timer Mode */
count = ((TH0<<5) | ( TL0 & 0x1f ) );
count += delta;
if ( count & 0xffffe000 ) /* Check for overflow */
@@ -985,7 +985,7 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles)
TH0 = (count>>5) & 0xff;
TL0 = count & 0x1f ;
break;
- case 1: /* 16 Bit Timer Mode */
+ case 1: /* 16 Bit Timer Mode */
count = ((TH0<<8) | TL0);
count += delta;
if ( count & 0xffff0000 ) /* Check for overflow */
@@ -993,12 +993,12 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles)
TH0 = (count>>8) & 0xff;
TL0 = count & 0xff;
break;
- case 2: /* 8 Bit Autoreload */
+ case 2: /* 8 Bit Autoreload */
count = ((UINT32) TL0) + delta;
- if ( count & 0xffffff00 ) /* Check for overflow */
+ if ( count & 0xffffff00 ) /* Check for overflow */
{
SET_TF0(1);
- count += TH0; /* Reload timer */
+ count += TH0; /* Reload timer */
}
/* Update new values of the counter */
TL0 = count & 0xff;
@@ -1006,9 +1006,9 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles)
case 3:
/* Split Timer 1 */
count = ((UINT32) TL0) + delta;
- if ( count & 0xffffff00 ) /* Check for overflow */
+ if ( count & 0xffffff00 ) /* Check for overflow */
SET_TF0(1);
- TL0 = count & 0xff; /* Update new values of the counter */
+ TL0 = count & 0xff; /* Update new values of the counter */
break;
}
}
@@ -1018,10 +1018,10 @@ INLINE void update_timer_t0(mcs51_state_t *mcs51_state, int cycles)
{
case 3:
/* Split Timer 2 */
- count = ((UINT32) TH0) + cycles; /* No gate control or counting !*/
- if ( count & 0xffffff00 ) /* Check for overflow */
+ count = ((UINT32) TH0) + cycles; /* No gate control or counting !*/
+ if ( count & 0xffffff00 ) /* Check for overflow */
SET_TF1(1);
- TH0 = count & 0xff; /* Update new values of the counter */
+ TH0 = count & 0xff; /* Update new values of the counter */
break;
}
}
@@ -1061,32 +1061,32 @@ INLINE void update_timer_t1(mcs51_state_t *mcs51_state, int cycles)
/* taken, reset */
mcs51_state->t1_cnt = 0;
/* TODO: Not sure about IE0. The manual specifies INT0=high,
- * which in turn means CLEAR_LINE. Change to access last_state?
- * IE0 may be edge triggered depending on IT0 */
+ * which in turn means CLEAR_LINE. Change to access last_state?
+ * IE0 may be edge triggered depending on IT0 */
if (GET_GATE1 && !GET_IE1)
delta = 0;
switch(mode) {
- case 0: /* 13 Bit Timer Mode */
+ case 0: /* 13 Bit Timer Mode */
count = ((TH1<<5) | ( TL1 & 0x1f ) );
count += delta;
overflow = count & 0xffffe000; /* Check for overflow */
TH1 = (count>>5) & 0xff;
TL1 = count & 0x1f ;
break;
- case 1: /* 16 Bit Timer Mode */
+ case 1: /* 16 Bit Timer Mode */
count = ((TH1<<8) | TL1);
count += delta;
overflow = count & 0xffff0000; /* Check for overflow */
TH1 = (count>>8) & 0xff;
TL1 = count & 0xff;
break;
- case 2: /* 8 Bit Autoreload */
+ case 2: /* 8 Bit Autoreload */
count = ((UINT32) TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
if ( overflow )
{
- count += TH1; /* Reload timer */
+ count += TH1; /* Reload timer */
}
/* Update new values of the counter */
TL1 = count & 0xff;
@@ -1111,26 +1111,26 @@ INLINE void update_timer_t1(mcs51_state_t *mcs51_state, int cycles)
/* taken, reset */
mcs51_state->t1_cnt = 0;
switch(mode) {
- case 0: /* 13 Bit Timer Mode */
+ case 0: /* 13 Bit Timer Mode */
count = ((TH1<<5) | ( TL1 & 0x1f ) );
count += delta;
overflow = count & 0xffffe000; /* Check for overflow */
TH1 = (count>>5) & 0xff;
TL1 = count & 0x1f ;
break;
- case 1: /* 16 Bit Timer Mode */
+ case 1: /* 16 Bit Timer Mode */
count = ((TH1<<8) | TL1);
count += delta;
overflow = count & 0xffff0000; /* Check for overflow */
TH1 = (count>>8) & 0xff;
TL1 = count & 0xff;
break;
- case 2: /* 8 Bit Autoreload */
+ case 2: /* 8 Bit Autoreload */
count = ((UINT32) TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
if ( overflow )
{
- count += TH1; /* Reload timer */
+ count += TH1; /* Reload timer */
}
/* Update new values of the counter */
TL1 = count & 0xff;
@@ -1158,7 +1158,7 @@ INLINE void update_timer_t2(mcs51_state_t *mcs51_state, int cycles)
switch (mode)
{
- case 0: /* 16 Bit Auto Reload */
+ case 0: /* 16 Bit Auto Reload */
if ( count & 0xffff0000 )
{
SET_TF2(1);
@@ -1186,7 +1186,7 @@ INLINE void update_timer_t2(mcs51_state_t *mcs51_state, int cycles)
}
break;
case 2:
- case 3: /* Baud rate */
+ case 3: /* Baud rate */
if ( count & 0xffff0000 )
{
count += ((RCAP2H<<8) | RCAP2L);
@@ -1264,14 +1264,14 @@ INLINE void serial_receive(mcs51_state_t *mcs51_state)
}
/* Check and update status of serial port */
-INLINE void update_serial(mcs51_state_t *mcs51_state, int cycles)
+INLINE void update_serial(mcs51_state_t *mcs51_state, int cycles)
{
while (--cycles>=0)
transmit_receive(mcs51_state, 0);
}
/* Check and update status of serial port */
-INLINE void update_irq_prio(mcs51_state_t *mcs51_state, UINT8 ipl, UINT8 iph)
+INLINE void update_irq_prio(mcs51_state_t *mcs51_state, UINT8 ipl, UINT8 iph)
{
int i;
for (i=0; i<8; i++)
@@ -1315,15 +1315,15 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
switch( op )
{
- case 0x00: nop(mcs51_state, op); break; //NOP
- case 0x01: ajmp(mcs51_state, op); break; //AJMP code addr
- case 0x02: ljmp(mcs51_state, op); break; //LJMP code addr
- case 0x03: rr_a(mcs51_state, op); break; //RR A
- case 0x04: inc_a(mcs51_state, op); break; //INC A
- case 0x05: RWM=1; inc_mem(mcs51_state, op); RWM=0; break; //INC data addr
+ case 0x00: nop(mcs51_state, op); break; //NOP
+ case 0x01: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0x02: ljmp(mcs51_state, op); break; //LJMP code addr
+ case 0x03: rr_a(mcs51_state, op); break; //RR A
+ case 0x04: inc_a(mcs51_state, op); break; //INC A
+ case 0x05: RWM=1; inc_mem(mcs51_state, op); RWM=0; break; //INC data addr
case 0x06:
- case 0x07: inc_ir(mcs51_state,op&1); break; //INC @R0/@R1
+ case 0x07: inc_ir(mcs51_state,op&1); break; //INC @R0/@R1
case 0x08:
case 0x09:
@@ -1332,17 +1332,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x0c:
case 0x0d:
case 0x0e:
- case 0x0f: inc_r(mcs51_state, op&7); break; //INC R0 to R7
+ case 0x0f: inc_r(mcs51_state, op&7); break; //INC R0 to R7
- case 0x10: RWM=1; jbc(mcs51_state, op); RWM=0; break; //JBC bit addr, code addr
- case 0x11: acall(mcs51_state, op); break; //ACALL code addr
- case 0x12: lcall(mcs51_state, op); break; //LCALL code addr
- case 0x13: rrc_a(mcs51_state, op); break; //RRC A
- case 0x14: dec_a(mcs51_state, op); break; //DEC A
- case 0x15: RWM=1; dec_mem(mcs51_state, op); RWM=0; break; //DEC data addr
+ case 0x10: RWM=1; jbc(mcs51_state, op); RWM=0; break; //JBC bit addr, code addr
+ case 0x11: acall(mcs51_state, op); break; //ACALL code addr
+ case 0x12: lcall(mcs51_state, op); break; //LCALL code addr
+ case 0x13: rrc_a(mcs51_state, op); break; //RRC A
+ case 0x14: dec_a(mcs51_state, op); break; //DEC A
+ case 0x15: RWM=1; dec_mem(mcs51_state, op); RWM=0; break; //DEC data addr
case 0x16:
- case 0x17: dec_ir(mcs51_state, op&1); break; //DEC @R0/@R1
+ case 0x17: dec_ir(mcs51_state, op&1); break; //DEC @R0/@R1
case 0x18:
case 0x19:
@@ -1351,17 +1351,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: dec_r(mcs51_state, op&7); break; //DEC R0 to R7
+ case 0x1f: dec_r(mcs51_state, op&7); break; //DEC R0 to R7
- case 0x20: jb(mcs51_state, op); break; //JB bit addr, code addr
- case 0x21: ajmp(mcs51_state, op); break; //AJMP code addr
- case 0x22: ret(mcs51_state, op); break; //RET
- case 0x23: rl_a(mcs51_state, op); break; //RL A
- case 0x24: add_a_byte(mcs51_state, op); break; //ADD A, #data
- case 0x25: add_a_mem(mcs51_state, op); break; //ADD A, data addr
+ case 0x20: jb(mcs51_state, op); break; //JB bit addr, code addr
+ case 0x21: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0x22: ret(mcs51_state, op); break; //RET
+ case 0x23: rl_a(mcs51_state, op); break; //RL A
+ case 0x24: add_a_byte(mcs51_state, op); break; //ADD A, #data
+ case 0x25: add_a_mem(mcs51_state, op); break; //ADD A, data addr
case 0x26:
- case 0x27: add_a_ir(mcs51_state, op&1); break; //ADD A, @R0/@R1
+ case 0x27: add_a_ir(mcs51_state, op&1); break; //ADD A, @R0/@R1
case 0x28:
case 0x29:
@@ -1370,17 +1370,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x2c:
case 0x2d:
case 0x2e:
- case 0x2f: add_a_r(mcs51_state, op&7); break; //ADD A, R0 to R7
+ case 0x2f: add_a_r(mcs51_state, op&7); break; //ADD A, R0 to R7
- case 0x30: jnb(mcs51_state, op); break; //JNB bit addr, code addr
- case 0x31: acall(mcs51_state, op); break; //ACALL code addr
- case 0x32: reti(mcs51_state, op); break; //RETI
- case 0x33: rlc_a(mcs51_state, op); break; //RLC A
- case 0x34: addc_a_byte(mcs51_state, op); break; //ADDC A, #data
- case 0x35: addc_a_mem(mcs51_state, op); break; //ADDC A, data addr
+ case 0x30: jnb(mcs51_state, op); break; //JNB bit addr, code addr
+ case 0x31: acall(mcs51_state, op); break; //ACALL code addr
+ case 0x32: reti(mcs51_state, op); break; //RETI
+ case 0x33: rlc_a(mcs51_state, op); break; //RLC A
+ case 0x34: addc_a_byte(mcs51_state, op); break; //ADDC A, #data
+ case 0x35: addc_a_mem(mcs51_state, op); break; //ADDC A, data addr
case 0x36:
- case 0x37: addc_a_ir(mcs51_state, op&1); break; //ADDC A, @R0/@R1
+ case 0x37: addc_a_ir(mcs51_state, op&1); break; //ADDC A, @R0/@R1
case 0x38:
case 0x39:
@@ -1389,17 +1389,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x3c:
case 0x3d:
case 0x3e:
- case 0x3f: addc_a_r(mcs51_state, op&7); break; //ADDC A, R0 to R7
+ case 0x3f: addc_a_r(mcs51_state, op&7); break; //ADDC A, R0 to R7
- case 0x40: jc(mcs51_state, op); break; //JC code addr
- case 0x41: ajmp(mcs51_state, op); break; //AJMP code addr
- case 0x42: RWM=1; orl_mem_a(mcs51_state, op); RWM=0; break; //ORL data addr, A
- case 0x43: RWM=1; orl_mem_byte(mcs51_state, op); RWM=0; break; //ORL data addr, #data
- case 0x44: orl_a_byte(mcs51_state, op); break;
- case 0x45: orl_a_mem(mcs51_state, op); break; //ORL A, data addr
+ case 0x40: jc(mcs51_state, op); break; //JC code addr
+ case 0x41: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0x42: RWM=1; orl_mem_a(mcs51_state, op); RWM=0; break; //ORL data addr, A
+ case 0x43: RWM=1; orl_mem_byte(mcs51_state, op); RWM=0; break; //ORL data addr, #data
+ case 0x44: orl_a_byte(mcs51_state, op); break;
+ case 0x45: orl_a_mem(mcs51_state, op); break; //ORL A, data addr
case 0x46:
- case 0x47: orl_a_ir(mcs51_state, op&1); break; //ORL A, @RO/@R1
+ case 0x47: orl_a_ir(mcs51_state, op&1); break; //ORL A, @RO/@R1
case 0x48:
case 0x49:
@@ -1408,17 +1408,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x4c:
case 0x4d:
case 0x4e:
- case 0x4f: orl_a_r(mcs51_state, op&7); break; //ORL A, RO to R7
+ case 0x4f: orl_a_r(mcs51_state, op&7); break; //ORL A, RO to R7
- case 0x50: jnc(mcs51_state, op); break; //JNC code addr
- case 0x51: acall(mcs51_state, op); break; //ACALL code addr
- case 0x52: RWM=1; anl_mem_a(mcs51_state, op); RWM=0; break; //ANL data addr, A
- case 0x53: RWM=1; anl_mem_byte(mcs51_state, op); RWM=0; break; //ANL data addr, #data
- case 0x54: anl_a_byte(mcs51_state, op); break; //ANL A, #data
- case 0x55: anl_a_mem(mcs51_state, op); break; //ANL A, data addr
+ case 0x50: jnc(mcs51_state, op); break; //JNC code addr
+ case 0x51: acall(mcs51_state, op); break; //ACALL code addr
+ case 0x52: RWM=1; anl_mem_a(mcs51_state, op); RWM=0; break; //ANL data addr, A
+ case 0x53: RWM=1; anl_mem_byte(mcs51_state, op); RWM=0; break; //ANL data addr, #data
+ case 0x54: anl_a_byte(mcs51_state, op); break; //ANL A, #data
+ case 0x55: anl_a_mem(mcs51_state, op); break; //ANL A, data addr
case 0x56:
- case 0x57: anl_a_ir(mcs51_state, op&1); break; //ANL A, @RO/@R1
+ case 0x57: anl_a_ir(mcs51_state, op&1); break; //ANL A, @RO/@R1
case 0x58:
case 0x59:
@@ -1427,17 +1427,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x5c:
case 0x5d:
case 0x5e:
- case 0x5f: anl_a_r(mcs51_state, op&7); break; //ANL A, RO to R7
+ case 0x5f: anl_a_r(mcs51_state, op&7); break; //ANL A, RO to R7
- case 0x60: jz(mcs51_state, op); break; //JZ code addr
- case 0x61: ajmp(mcs51_state, op); break; //AJMP code addr
- case 0x62: RWM=1; xrl_mem_a(mcs51_state, op); RWM=0; break; //XRL data addr, A
- case 0x63: RWM=1; xrl_mem_byte(mcs51_state, op); RWM=0; break; //XRL data addr, #data
- case 0x64: xrl_a_byte(mcs51_state, op); break; //XRL A, #data
- case 0x65: xrl_a_mem(mcs51_state, op); break; //XRL A, data addr
+ case 0x60: jz(mcs51_state, op); break; //JZ code addr
+ case 0x61: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0x62: RWM=1; xrl_mem_a(mcs51_state, op); RWM=0; break; //XRL data addr, A
+ case 0x63: RWM=1; xrl_mem_byte(mcs51_state, op); RWM=0; break; //XRL data addr, #data
+ case 0x64: xrl_a_byte(mcs51_state, op); break; //XRL A, #data
+ case 0x65: xrl_a_mem(mcs51_state, op); break; //XRL A, data addr
case 0x66:
- case 0x67: xrl_a_ir(mcs51_state, op&1); break; //XRL A, @R0/@R1
+ case 0x67: xrl_a_ir(mcs51_state, op&1); break; //XRL A, @R0/@R1
case 0x68:
case 0x69:
@@ -1446,17 +1446,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x6c:
case 0x6d:
case 0x6e:
- case 0x6f: xrl_a_r(mcs51_state, op&7); break; //XRL A, R0 to R7
+ case 0x6f: xrl_a_r(mcs51_state, op&7); break; //XRL A, R0 to R7
- case 0x70: jnz(mcs51_state, op); break; //JNZ code addr
- case 0x71: acall(mcs51_state, op); break; //ACALL code addr
- case 0x72: orl_c_bitaddr(mcs51_state, op); break; //ORL C, bit addr
- case 0x73: jmp_iadptr(mcs51_state, op); break; //JMP @A+DPTR
- case 0x74: mov_a_byte(mcs51_state, op); break; //MOV A, #data
- case 0x75: mov_mem_byte(mcs51_state, op); break; //MOV data addr, #data
+ case 0x70: jnz(mcs51_state, op); break; //JNZ code addr
+ case 0x71: acall(mcs51_state, op); break; //ACALL code addr
+ case 0x72: orl_c_bitaddr(mcs51_state, op); break; //ORL C, bit addr
+ case 0x73: jmp_iadptr(mcs51_state, op); break; //JMP @A+DPTR
+ case 0x74: mov_a_byte(mcs51_state, op); break; //MOV A, #data
+ case 0x75: mov_mem_byte(mcs51_state, op); break; //MOV data addr, #data
case 0x76:
- case 0x77: mov_ir_byte(mcs51_state, op&1); break; //MOV @R0/@R1, #data
+ case 0x77: mov_ir_byte(mcs51_state, op&1); break; //MOV @R0/@R1, #data
case 0x78:
case 0x79:
@@ -1465,17 +1465,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x7c:
case 0x7d:
case 0x7e:
- case 0x7f: mov_r_byte(mcs51_state, op&7); break; //MOV R0 to R7, #data
+ case 0x7f: mov_r_byte(mcs51_state, op&7); break; //MOV R0 to R7, #data
- case 0x80: sjmp(mcs51_state, op); break; //SJMP code addr
- case 0x81: ajmp(mcs51_state, op); break; //AJMP code addr
- case 0x82: anl_c_bitaddr(mcs51_state, op); break; //ANL C, bit addr
- case 0x83: movc_a_iapc(mcs51_state, op); break; //MOVC A, @A + PC
- case 0x84: div_ab(mcs51_state, op); break; //DIV AB
- case 0x85: mov_mem_mem(mcs51_state, op); break; //MOV data addr, data addr
+ case 0x80: sjmp(mcs51_state, op); break; //SJMP code addr
+ case 0x81: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0x82: anl_c_bitaddr(mcs51_state, op); break; //ANL C, bit addr
+ case 0x83: movc_a_iapc(mcs51_state, op); break; //MOVC A, @A + PC
+ case 0x84: div_ab(mcs51_state, op); break; //DIV AB
+ case 0x85: mov_mem_mem(mcs51_state, op); break; //MOV data addr, data addr
case 0x86:
- case 0x87: mov_mem_ir(mcs51_state, op&1); break; //MOV data addr, @R0/@R1
+ case 0x87: mov_mem_ir(mcs51_state, op&1); break; //MOV data addr, @R0/@R1
case 0x88:
case 0x89:
@@ -1484,17 +1484,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x8c:
case 0x8d:
case 0x8e:
- case 0x8f: mov_mem_r(mcs51_state, op&7); break; //MOV data addr,R0 to R7
+ case 0x8f: mov_mem_r(mcs51_state, op&7); break; //MOV data addr,R0 to R7
- case 0x90: mov_dptr_byte(mcs51_state, op); break; //MOV DPTR, #data
- case 0x91: acall(mcs51_state, op); break; //ACALL code addr
- case 0x92: RWM = 1; mov_bitaddr_c(mcs51_state, op); RWM = 0; break; //MOV bit addr, C
- case 0x93: movc_a_iadptr(mcs51_state, op); break; //MOVC A, @A + DPTR
- case 0x94: subb_a_byte(mcs51_state, op); break; //SUBB A, #data
- case 0x95: subb_a_mem(mcs51_state, op); break; //SUBB A, data addr
+ case 0x90: mov_dptr_byte(mcs51_state, op); break; //MOV DPTR, #data
+ case 0x91: acall(mcs51_state, op); break; //ACALL code addr
+ case 0x92: RWM = 1; mov_bitaddr_c(mcs51_state, op); RWM = 0; break; //MOV bit addr, C
+ case 0x93: movc_a_iadptr(mcs51_state, op); break; //MOVC A, @A + DPTR
+ case 0x94: subb_a_byte(mcs51_state, op); break; //SUBB A, #data
+ case 0x95: subb_a_mem(mcs51_state, op); break; //SUBB A, data addr
case 0x96:
- case 0x97: subb_a_ir(mcs51_state, op&1); break; //SUBB A, @R0/@R1
+ case 0x97: subb_a_ir(mcs51_state, op&1); break; //SUBB A, @R0/@R1
case 0x98:
case 0x99:
@@ -1503,17 +1503,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0x9c:
case 0x9d:
case 0x9e:
- case 0x9f: subb_a_r(mcs51_state, op&7); break; //SUBB A, R0 to R7
+ case 0x9f: subb_a_r(mcs51_state, op&7); break; //SUBB A, R0 to R7
- case 0xa0: orl_c_nbitaddr(mcs51_state, op); break; //ORL C, /bit addr
- case 0xa1: ajmp(mcs51_state, op); break; //AJMP code addr
- case 0xa2: mov_c_bitaddr(mcs51_state, op); break; //MOV C, bit addr
- case 0xa3: inc_dptr(mcs51_state, op); break; //INC DPTR
- case 0xa4: mul_ab(mcs51_state, op); break; //MUL AB
- case 0xa5: illegal(mcs51_state, op); break; //reserved
+ case 0xa0: orl_c_nbitaddr(mcs51_state, op); break; //ORL C, /bit addr
+ case 0xa1: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0xa2: mov_c_bitaddr(mcs51_state, op); break; //MOV C, bit addr
+ case 0xa3: inc_dptr(mcs51_state, op); break; //INC DPTR
+ case 0xa4: mul_ab(mcs51_state, op); break; //MUL AB
+ case 0xa5: illegal(mcs51_state, op); break; //reserved
case 0xa6:
- case 0xa7: mov_ir_mem(mcs51_state, op&1); break; //MOV @R0/@R1, data addr
+ case 0xa7: mov_ir_mem(mcs51_state, op&1); break; //MOV @R0/@R1, data addr
case 0xa8:
case 0xa9:
@@ -1522,17 +1522,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0xac:
case 0xad:
case 0xae:
- case 0xaf: mov_r_mem(mcs51_state, op&7); break; //MOV R0 to R7, data addr
+ case 0xaf: mov_r_mem(mcs51_state, op&7); break; //MOV R0 to R7, data addr
- case 0xb0: anl_c_nbitaddr(mcs51_state, op); break; //ANL C,/bit addr
- case 0xb1: acall(mcs51_state, op); break; //ACALL code addr
- case 0xb2: RWM=1; cpl_bitaddr(mcs51_state, op); RWM=0; break; //CPL bit addr
- case 0xb3: cpl_c(mcs51_state, op); break; //CPL C
- case 0xb4: cjne_a_byte(mcs51_state, op); break; //CJNE A, #data, code addr
- case 0xb5: cjne_a_mem(mcs51_state, op); break; //CJNE A, data addr, code addr
+ case 0xb0: anl_c_nbitaddr(mcs51_state, op); break; //ANL C,/bit addr
+ case 0xb1: acall(mcs51_state, op); break; //ACALL code addr
+ case 0xb2: RWM=1; cpl_bitaddr(mcs51_state, op); RWM=0; break; //CPL bit addr
+ case 0xb3: cpl_c(mcs51_state, op); break; //CPL C
+ case 0xb4: cjne_a_byte(mcs51_state, op); break; //CJNE A, #data, code addr
+ case 0xb5: cjne_a_mem(mcs51_state, op); break; //CJNE A, data addr, code addr
case 0xb6:
- case 0xb7: cjne_ir_byte(mcs51_state, op&1); break; //CJNE @R0/@R1, #data, code addr
+ case 0xb7: cjne_ir_byte(mcs51_state, op&1); break; //CJNE @R0/@R1, #data, code addr
case 0xb8:
case 0xb9:
@@ -1541,17 +1541,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0xbc:
case 0xbd:
case 0xbe:
- case 0xbf: cjne_r_byte(mcs51_state, op&7); break; //CJNE R0 to R7, #data, code addr
+ case 0xbf: cjne_r_byte(mcs51_state, op&7); break; //CJNE R0 to R7, #data, code addr
- case 0xc0: push(mcs51_state, op); break; //PUSH data addr
- case 0xc1: ajmp(mcs51_state, op); break; //AJMP code addr
- case 0xc2: RWM=1; clr_bitaddr(mcs51_state, op); RWM=0; break; //CLR bit addr
- case 0xc3: clr_c(mcs51_state, op); break; //CLR C
- case 0xc4: swap_a(mcs51_state, op); break; //SWAP A
- case 0xc5: xch_a_mem(mcs51_state, op); break; //XCH A, data addr
+ case 0xc0: push(mcs51_state, op); break; //PUSH data addr
+ case 0xc1: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0xc2: RWM=1; clr_bitaddr(mcs51_state, op); RWM=0; break; //CLR bit addr
+ case 0xc3: clr_c(mcs51_state, op); break; //CLR C
+ case 0xc4: swap_a(mcs51_state, op); break; //SWAP A
+ case 0xc5: xch_a_mem(mcs51_state, op); break; //XCH A, data addr
case 0xc6:
- case 0xc7: xch_a_ir(mcs51_state, op&1); break; //XCH A, @RO/@R1
+ case 0xc7: xch_a_ir(mcs51_state, op&1); break; //XCH A, @RO/@R1
case 0xc8:
case 0xc9:
@@ -1560,17 +1560,17 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0xcc:
case 0xcd:
case 0xce:
- case 0xcf: xch_a_r(mcs51_state, op&7); break; //XCH A, RO to R7
+ case 0xcf: xch_a_r(mcs51_state, op&7); break; //XCH A, RO to R7
- case 0xd0: pop(mcs51_state, op); break; //POP data addr
- case 0xd1: acall(mcs51_state, op); break; //ACALL code addr
- case 0xd2: RWM=1; setb_bitaddr(mcs51_state, op); RWM=0; break; //SETB bit addr
- case 0xd3: setb_c(mcs51_state, op); break; //SETB C
- case 0xd4: da_a(mcs51_state, op); break; //DA A
- case 0xd5: RWM=1; djnz_mem(mcs51_state, op); RWM=0; break; //DJNZ data addr, code addr
+ case 0xd0: pop(mcs51_state, op); break; //POP data addr
+ case 0xd1: acall(mcs51_state, op); break; //ACALL code addr
+ case 0xd2: RWM=1; setb_bitaddr(mcs51_state, op); RWM=0; break; //SETB bit addr
+ case 0xd3: setb_c(mcs51_state, op); break; //SETB C
+ case 0xd4: da_a(mcs51_state, op); break; //DA A
+ case 0xd5: RWM=1; djnz_mem(mcs51_state, op); RWM=0; break; //DJNZ data addr, code addr
case 0xd6:
- case 0xd7: xchd_a_ir(mcs51_state, op&1); break; //XCHD A, @R0/@R1
+ case 0xd7: xchd_a_ir(mcs51_state, op&1); break; //XCHD A, @R0/@R1
case 0xd8:
case 0xd9:
@@ -1579,18 +1579,18 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0xdc:
case 0xdd:
case 0xde:
- case 0xdf: djnz_r(mcs51_state, op&7); break; //DJNZ R0 to R7,code addr
+ case 0xdf: djnz_r(mcs51_state, op&7); break; //DJNZ R0 to R7,code addr
- case 0xe0: movx_a_idptr(mcs51_state, op); break; //MOVX A,@DPTR
- case 0xe1: ajmp(mcs51_state, op); break; //AJMP code addr
+ case 0xe0: movx_a_idptr(mcs51_state, op); break; //MOVX A,@DPTR
+ case 0xe1: ajmp(mcs51_state, op); break; //AJMP code addr
case 0xe2:
- case 0xe3: movx_a_ir(mcs51_state, op&1); break; //MOVX A, @R0/@R1
+ case 0xe3: movx_a_ir(mcs51_state, op&1); break; //MOVX A, @R0/@R1
- case 0xe4: clr_a(mcs51_state, op); break; //CLR A
- case 0xe5: mov_a_mem(mcs51_state, op); break; //MOV A, data addr
+ case 0xe4: clr_a(mcs51_state, op); break; //CLR A
+ case 0xe5: mov_a_mem(mcs51_state, op); break; //MOV A, data addr
case 0xe6:
- case 0xe7: mov_a_ir(mcs51_state, op&1); break; //MOV A,@RO/@R1
+ case 0xe7: mov_a_ir(mcs51_state, op&1); break; //MOV A,@RO/@R1
case 0xe8:
case 0xe9:
@@ -1599,19 +1599,19 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0xec:
case 0xed:
case 0xee:
- case 0xef: mov_a_r(mcs51_state, op&7); break; //MOV A,R0 to R7
+ case 0xef: mov_a_r(mcs51_state, op&7); break; //MOV A,R0 to R7
- case 0xf0: movx_idptr_a(mcs51_state, op); break; //MOVX @DPTR,A
- case 0xf1: acall(mcs51_state, op); break; //ACALL code addr
+ case 0xf0: movx_idptr_a(mcs51_state, op); break; //MOVX @DPTR,A
+ case 0xf1: acall(mcs51_state, op); break; //ACALL code addr
case 0xf2:
- case 0xf3: movx_ir_a(mcs51_state, op&1); break; //MOVX @R0/@R1,A
+ case 0xf3: movx_ir_a(mcs51_state, op&1); break; //MOVX @R0/@R1,A
- case 0xf4: cpl_a(mcs51_state, op); break; //CPL A
- case 0xf5: mov_mem_a(mcs51_state, op); break; //MOV data addr, A
+ case 0xf4: cpl_a(mcs51_state, op); break; //CPL A
+ case 0xf5: mov_mem_a(mcs51_state, op); break; //MOV data addr, A
case 0xf6:
- case 0xf7: mov_ir_a(mcs51_state, op&1); break; //MOV @R0/@R1, A
+ case 0xf7: mov_ir_a(mcs51_state, op&1); break; //MOV @R0/@R1, A
case 0xf8:
case 0xf9:
@@ -1620,7 +1620,7 @@ static void execute_op(mcs51_state_t *mcs51_state, UINT8 op)
case 0xfc:
case 0xfd:
case 0xfe:
- case 0xff: mov_r_a(mcs51_state, op&7); break; //MOV R0 to R7, A
+ case 0xff: mov_r_a(mcs51_state, op&7); break; //MOV R0 to R7, A
default:
illegal(mcs51_state, op);
}
@@ -1685,7 +1685,7 @@ static void check_irqs(mcs51_state_t *mcs51_state)
if (mcs51_state->features & FEATURE_DS5002FP)
{
ints |= ((GET_PFW)<<5);
- mcs51_state->irq_prio[6] = 3; /* force highest priority */
+ mcs51_state->irq_prio[6] = 3; /* force highest priority */
/* mask out interrupts not enabled */
ints &= ((int_mask & 0x1f) | ((GET_EPFW)<<5));
}
@@ -1695,7 +1695,7 @@ static void check_irqs(mcs51_state_t *mcs51_state)
ints &= int_mask;
}
- if (!ints) return;
+ if (!ints) return;
/* CLear IDL - got enabled interrupt */
if (mcs51_state->features & FEATURE_CMOS)
@@ -1722,8 +1722,8 @@ static void check_irqs(mcs51_state_t *mcs51_state)
}
/* Skip the interrupt request if currently processing interrupt
- * and the new request does not have a higher priority
- */
+ * and the new request does not have a higher priority
+ */
LOG(("Request: %d\n", priority_request));
if (mcs51_state->irq_active && (priority_request <= mcs51_state->cur_irq_prio))
@@ -1787,9 +1787,9 @@ static void check_irqs(mcs51_state_t *mcs51_state)
break;
/* DS5002FP specific */
/* case V_PFI:
- * no flags are cleared, PFW is reset by software
- * This has the same vector as V_TF2.
- */
+ * no flags are cleared, PFW is reset by software
+ * This has the same vector as V_TF2.
+ */
}
}
@@ -1809,15 +1809,15 @@ INLINE void burn_cycles(mcs51_state_t *mcs51_state, int cycles)
static void mcs51_set_irq_line(mcs51_state_t *mcs51_state, int irqline, int state)
{
/* From the manual:
- *
- * <cite>In operation all the interrupt flags are latched into the
- * interrupt control system during State 5 of every machine cycle.
- * The samples are polled during the following machine cycle.</cite>
- *
- * ==> Since we do not emulate sub-states, this assumes that the signal is present
- * for at least one cycle (12 states)
- *
- */
+ *
+ * <cite>In operation all the interrupt flags are latched into the
+ * interrupt control system during State 5 of every machine cycle.
+ * The samples are polled during the following machine cycle.</cite>
+ *
+ * ==> Since we do not emulate sub-states, this assumes that the signal is present
+ * for at least one cycle (12 states)
+ *
+ */
UINT32 new_state = (mcs51_state->last_line_state & ~(1 << irqline)) | ((state != CLEAR_LINE) << irqline);
/* detect 0->1 transistions */
UINT32 tr_state = (~mcs51_state->last_line_state) & new_state;
@@ -1834,7 +1834,7 @@ static void mcs51_set_irq_line(mcs51_state_t *mcs51_state, int irqline, int stat
SET_IE0(1);
}
else
- SET_IE0(1); //Nope, just set it..
+ SET_IE0(1); //Nope, just set it..
}
else
{
@@ -1855,7 +1855,7 @@ static void mcs51_set_irq_line(mcs51_state_t *mcs51_state, int irqline, int stat
SET_IE1(1);
}
else
- SET_IE1(1); //Nope, just set it..
+ SET_IE1(1); //Nope, just set it..
}
else
{
@@ -1996,14 +1996,14 @@ static void mcs51_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8 dat
switch (offset)
{
- case ADDR_P0: OUT(MCS51_PORT_P0,data); break;
- case ADDR_P1: OUT(MCS51_PORT_P1,data); break;
- case ADDR_P2: OUT(MCS51_PORT_P2,data); break;
- case ADDR_P3: OUT(MCS51_PORT_P3,data); break;
- case ADDR_SBUF: serial_transmit(mcs51_state, data); break;
- case ADDR_PSW: SET_PARITY(); break;
- case ADDR_ACC: SET_PARITY(); break;
- case ADDR_IP: update_irq_prio(mcs51_state, data, 0); break;
+ case ADDR_P0: OUT(MCS51_PORT_P0,data); break;
+ case ADDR_P1: OUT(MCS51_PORT_P1,data); break;
+ case ADDR_P2: OUT(MCS51_PORT_P2,data); break;
+ case ADDR_P3: OUT(MCS51_PORT_P3,data); break;
+ case ADDR_SBUF: serial_transmit(mcs51_state, data); break;
+ case ADDR_PSW: SET_PARITY(); break;
+ case ADDR_ACC: SET_PARITY(); break;
+ case ADDR_IP: update_irq_prio(mcs51_state, data, 0); break;
/* R_SBUF = data; //This register is used only for "Receiving data coming in!" */
case ADDR_B:
@@ -2036,10 +2036,10 @@ static UINT8 mcs51_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
{
/* Read/Write/Modify operations read the port latch ! */
/* Move to memory map */
- case ADDR_P0: return RWM ? P0 : P0 & IN(MCS51_PORT_P0);
- case ADDR_P1: return RWM ? P1 : P1 & IN(MCS51_PORT_P1);
- case ADDR_P2: return RWM ? P2 : P2 & IN(MCS51_PORT_P2);
- case ADDR_P3: return RWM ? P3 : P3 & IN(MCS51_PORT_P3);
+ case ADDR_P0: return RWM ? P0 : P0 & IN(MCS51_PORT_P0);
+ case ADDR_P1: return RWM ? P1 : P1 & IN(MCS51_PORT_P1);
+ case ADDR_P2: return RWM ? P2 : P2 & IN(MCS51_PORT_P2);
+ case ADDR_P3: return RWM ? P3 : P3 & IN(MCS51_PORT_P3);
case ADDR_PSW:
case ADDR_ACC:
@@ -2081,8 +2081,8 @@ static CPU_INIT( mcs51 )
mcs51_state->io = &device->space(AS_IO);
mcs51_state->features = FEATURE_NONE;
- mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */
- mcs51_state->num_interrupts = 5; /* 5 interrupts */
+ mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */
+ mcs51_state->num_interrupts = 5; /* 5 interrupts */
mcs51_state->sfr_read = mcs51_sfr_read;
mcs51_state->sfr_write = mcs51_sfr_write;
@@ -2247,8 +2247,8 @@ static CPU_INIT( i8052 )
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL(mcs51);
- mcs51_state->ram_mask = 0xFF; /* 256 bytes of ram */
- mcs51_state->num_interrupts = 6; /* 6 interrupts */
+ mcs51_state->ram_mask = 0xFF; /* 256 bytes of ram */
+ mcs51_state->num_interrupts = 6; /* 6 interrupts */
mcs51_state->features |= FEATURE_I8052;
mcs51_state->sfr_read = i8052_sfr_read;
@@ -2310,7 +2310,7 @@ static CPU_INIT( i80c31 )
mcs51_state_t *mcs51_state = get_safe_token(device);
CPU_INIT_CALL(i8052);
- mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */
+ mcs51_state->ram_mask = 0x7F; /* 128 bytes of ram */
}
/****************************************************************************
@@ -2318,8 +2318,8 @@ static CPU_INIT( i80c31 )
****************************************************************************/
-#define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", mcs51_state->device->tag(), PC, d))
-#define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", mcs51_state->device->tag(), PC))
+#define DS5_LOGW(a, d) LOG(("ds5002fp '%s': write to " # a " register at 0x%04x, data=%x\n", mcs51_state->device->tag(), PC, d))
+#define DS5_LOGR(a, d) LOG(("ds5002fp '%s': read from " # a " register at 0x%04x\n", mcs51_state->device->tag(), PC))
INLINE UINT8 ds5002fp_protected(mcs51_state_t *mcs51_state, size_t offset, UINT8 data, UINT8 ta_mask, UINT8 mask)
{
@@ -2348,15 +2348,15 @@ static void ds5002fp_sfr_write(mcs51_state_t *mcs51_state, size_t offset, UINT8
LOG(("ds5002fp '%s': TA window initiated at 0x%04x\n", mcs51_state->device->tag(), PC));
}
break;
- case ADDR_MCON: data = ds5002fp_protected(mcs51_state, ADDR_MCON, data, 0x0f, 0xf7); DS5_LOGW(MCON, data); break;
- case ADDR_RPCTL: data = ds5002fp_protected(mcs51_state, ADDR_RPCTL, data, 0xef, 0xfe); DS5_LOGW(RPCTL, data); break;
- case ADDR_CRCR: data = ds5002fp_protected(mcs51_state, ADDR_CRCR, data, 0xff, 0x0f); DS5_LOGW(CRCR, data); break;
- case ADDR_PCON: data = ds5002fp_protected(mcs51_state, ADDR_PCON, data, 0xb9, 0xff); break;
- case ADDR_IP: data = ds5002fp_protected(mcs51_state, ADDR_IP, data, 0x7f, 0xff); break;
- case ADDR_CRCL: DS5_LOGW(CRCL, data); break;
- case ADDR_CRCH: DS5_LOGW(CRCH, data); break;
- case ADDR_RNR: DS5_LOGW(RNR, data); break;
- case ADDR_RPS: DS5_LOGW(RPS, data); break;
+ case ADDR_MCON: data = ds5002fp_protected(mcs51_state, ADDR_MCON, data, 0x0f, 0xf7); DS5_LOGW(MCON, data); break;
+ case ADDR_RPCTL: data = ds5002fp_protected(mcs51_state, ADDR_RPCTL, data, 0xef, 0xfe); DS5_LOGW(RPCTL, data); break;
+ case ADDR_CRCR: data = ds5002fp_protected(mcs51_state, ADDR_CRCR, data, 0xff, 0x0f); DS5_LOGW(CRCR, data); break;
+ case ADDR_PCON: data = ds5002fp_protected(mcs51_state, ADDR_PCON, data, 0xb9, 0xff); break;
+ case ADDR_IP: data = ds5002fp_protected(mcs51_state, ADDR_IP, data, 0x7f, 0xff); break;
+ case ADDR_CRCL: DS5_LOGW(CRCL, data); break;
+ case ADDR_CRCH: DS5_LOGW(CRCH, data); break;
+ case ADDR_RNR: DS5_LOGW(RNR, data); break;
+ case ADDR_RPS: DS5_LOGW(RPS, data); break;
default:
mcs51_sfr_write(mcs51_state, offset, data);
return;
@@ -2368,16 +2368,16 @@ static UINT8 ds5002fp_sfr_read(mcs51_state_t *mcs51_state, size_t offset)
{
switch (offset)
{
- case ADDR_CRCR: DS5_LOGR(CRCR, data); break;
- case ADDR_CRCL: DS5_LOGR(CRCL, data); break;
- case ADDR_CRCH: DS5_LOGR(CRCH, data); break;
- case ADDR_MCON: DS5_LOGR(MCON, data); break;
- case ADDR_TA: DS5_LOGR(TA, data); break;
- case ADDR_RNR: DS5_LOGR(RNR, data); break;
- case ADDR_RPCTL: DS5_LOGR(RPCTL, data); break;
- case ADDR_RPS: DS5_LOGR(RPS, data); break;
+ case ADDR_CRCR: DS5_LOGR(CRCR, data); break;
+ case ADDR_CRCL: DS5_LOGR(CRCL, data); break;
+ case ADDR_CRCH: DS5_LOGR(CRCH, data); break;
+ case ADDR_MCON: DS5_LOGR(MCON, data); break;
+ case ADDR_TA: DS5_LOGR(TA, data); break;
+ case ADDR_RNR: DS5_LOGR(RNR, data); break;
+ case ADDR_RPCTL: DS5_LOGR(RPCTL, data); break;
+ case ADDR_RPS: DS5_LOGR(RPS, data); break;
case ADDR_PCON:
- SET_PFW(0); /* reset PFW flag */
+ SET_PFW(0); /* reset PFW flag */
return mcs51_sfr_read(mcs51_state, offset);
default:
return mcs51_sfr_read(mcs51_state, offset);
@@ -2439,32 +2439,32 @@ static CPU_SET_INFO( mcs51 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_PC: PC = info->i; break;
- case CPUINFO_INT_SP: SP = info->i; break;
-
- case CPUINFO_INT_INPUT_STATE + MCS51_INT0_LINE: mcs51_set_irq_line(mcs51_state, MCS51_INT0_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MCS51_INT1_LINE: mcs51_set_irq_line(mcs51_state, MCS51_INT1_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MCS51_T0_LINE: mcs51_set_irq_line(mcs51_state, MCS51_T0_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MCS51_T1_LINE: mcs51_set_irq_line(mcs51_state, MCS51_T1_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MCS51_RX_LINE: mcs51_set_irq_line(mcs51_state, MCS51_RX_LINE, info->i); break;
-
- case CPUINFO_INT_REGISTER + MCS51_PC: PC = info->i; break;
- case CPUINFO_INT_REGISTER + MCS51_SP: SP = info->i; break;
- case CPUINFO_INT_REGISTER + MCS51_PSW: SET_PSW(info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_ACC: SET_ACC(info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_B: B = info->i; break;
- case CPUINFO_INT_REGISTER + MCS51_DPH: DPH = info->i; break;
- case CPUINFO_INT_REGISTER + MCS51_DPL: DPL = info->i; break;
- case CPUINFO_INT_REGISTER + MCS51_IE: IE = info->i; break;
- case CPUINFO_INT_REGISTER + MCS51_R0: SET_REG(0, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_R1: SET_REG(1, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_R2: SET_REG(2, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_R3: SET_REG(3, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_R4: SET_REG(4, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_R5: SET_REG(5, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_R6: SET_REG(6, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_R7: SET_REG(7, info->i); break;
- case CPUINFO_INT_REGISTER + MCS51_RB: SET_RS(info->i); break;
+ case CPUINFO_INT_PC: PC = info->i; break;
+ case CPUINFO_INT_SP: SP = info->i; break;
+
+ case CPUINFO_INT_INPUT_STATE + MCS51_INT0_LINE: mcs51_set_irq_line(mcs51_state, MCS51_INT0_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MCS51_INT1_LINE: mcs51_set_irq_line(mcs51_state, MCS51_INT1_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MCS51_T0_LINE: mcs51_set_irq_line(mcs51_state, MCS51_T0_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MCS51_T1_LINE: mcs51_set_irq_line(mcs51_state, MCS51_T1_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MCS51_RX_LINE: mcs51_set_irq_line(mcs51_state, MCS51_RX_LINE, info->i); break;
+
+ case CPUINFO_INT_REGISTER + MCS51_PC: PC = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS51_SP: SP = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS51_PSW: SET_PSW(info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_ACC: SET_ACC(info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_B: B = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS51_DPH: DPH = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS51_DPL: DPL = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS51_IE: IE = info->i; break;
+ case CPUINFO_INT_REGISTER + MCS51_R0: SET_REG(0, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_R1: SET_REG(1, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_R2: SET_REG(2, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_R3: SET_REG(3, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_R4: SET_REG(4, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_R5: SET_REG(5, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_R6: SET_REG(6, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_R7: SET_REG(7, info->i); break;
+ case CPUINFO_INT_REGISTER + MCS51_RB: SET_RS(info->i); break;
}
}
@@ -2481,68 +2481,68 @@ static CPU_GET_INFO( mcs51 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs51_state_t); break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 12; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
- case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 9; /* due to sfr mapping */ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 18; /* 128k for ds5002fp */ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
- case CPUINFO_INT_PC: info->i = PC; break;
- case CPUINFO_INT_SP: info->i = SP; break;
-
- case CPUINFO_INT_REGISTER + MCS51_PC: info->i = PC; break;
- case CPUINFO_INT_REGISTER + MCS51_SP: info->i = SP; break;
- case CPUINFO_INT_REGISTER + MCS51_PSW: info->i = PSW; break;
- case CPUINFO_INT_REGISTER + MCS51_ACC: info->i = ACC; break;
- case CPUINFO_INT_REGISTER + MCS51_B: info->i = B; break;
- case CPUINFO_INT_REGISTER + MCS51_DPH: info->i = DPH; break;
- case CPUINFO_INT_REGISTER + MCS51_DPL: info->i = DPL; break;
- case CPUINFO_INT_REGISTER + MCS51_IE: info->i = IE; break;
- case CPUINFO_INT_REGISTER + MCS51_R0: info->i = R_REG(0); break;
- case CPUINFO_INT_REGISTER + MCS51_R1: info->i = R_REG(1); break;
- case CPUINFO_INT_REGISTER + MCS51_R2: info->i = R_REG(2); break;
- case CPUINFO_INT_REGISTER + MCS51_R3: info->i = R_REG(3); break;
- case CPUINFO_INT_REGISTER + MCS51_R4: info->i = R_REG(4); break;
- case CPUINFO_INT_REGISTER + MCS51_R5: info->i = R_REG(5); break;
- case CPUINFO_INT_REGISTER + MCS51_R6: info->i = R_REG(6); break;
- case CPUINFO_INT_REGISTER + MCS51_R7: info->i = R_REG(7); break;
- case CPUINFO_INT_REGISTER + MCS51_RB: info->i = R_REG(8); break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mcs51_state_t); break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 12; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 20; /* rough guess */ break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 9; /* due to sfr mapping */ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 18; /* 128k for ds5002fp */ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
+ case CPUINFO_INT_PC: info->i = PC; break;
+ case CPUINFO_INT_SP: info->i = SP; break;
+
+ case CPUINFO_INT_REGISTER + MCS51_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + MCS51_SP: info->i = SP; break;
+ case CPUINFO_INT_REGISTER + MCS51_PSW: info->i = PSW; break;
+ case CPUINFO_INT_REGISTER + MCS51_ACC: info->i = ACC; break;
+ case CPUINFO_INT_REGISTER + MCS51_B: info->i = B; break;
+ case CPUINFO_INT_REGISTER + MCS51_DPH: info->i = DPH; break;
+ case CPUINFO_INT_REGISTER + MCS51_DPL: info->i = DPL; break;
+ case CPUINFO_INT_REGISTER + MCS51_IE: info->i = IE; break;
+ case CPUINFO_INT_REGISTER + MCS51_R0: info->i = R_REG(0); break;
+ case CPUINFO_INT_REGISTER + MCS51_R1: info->i = R_REG(1); break;
+ case CPUINFO_INT_REGISTER + MCS51_R2: info->i = R_REG(2); break;
+ case CPUINFO_INT_REGISTER + MCS51_R3: info->i = R_REG(3); break;
+ case CPUINFO_INT_REGISTER + MCS51_R4: info->i = R_REG(4); break;
+ case CPUINFO_INT_REGISTER + MCS51_R5: info->i = R_REG(5); break;
+ case CPUINFO_INT_REGISTER + MCS51_R6: info->i = R_REG(6); break;
+ case CPUINFO_INT_REGISTER + MCS51_R7: info->i = R_REG(7); break;
+ case CPUINFO_INT_REGISTER + MCS51_RB: info->i = R_REG(8); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs51); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mcs51); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mcs51); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mcs51); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs51); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8051); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs51_state->icount; break;
-
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map8 = NULL; break;
-
- case CPUINFO_STR_NAME: strcpy(info->s, "I8051"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-51"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Steve Ellenoff"); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mcs51); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mcs51); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mcs51); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mcs51); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mcs51); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8051); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mcs51_state->icount; break;
+
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map8 = NULL; break;
+
+ case CPUINFO_STR_NAME: strcpy(info->s, "I8051"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "MCS-51"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Steve Ellenoff"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -2556,23 +2556,23 @@ static CPU_GET_INFO( mcs51 )
PSW & 0x01 ? 'P':'.');
break;
- case CPUINFO_STR_REGISTER + MCS51_PC: sprintf(info->s, "PC:%04X", mcs51_state->pc); break;
- case CPUINFO_STR_REGISTER + MCS51_SP: sprintf(info->s, "SP:%02X", SP); break;
- case CPUINFO_STR_REGISTER + MCS51_PSW: sprintf(info->s, "PSW:%02X", PSW); break;
- case CPUINFO_STR_REGISTER + MCS51_ACC: sprintf(info->s, "A:%02X", ACC); break;
- case CPUINFO_STR_REGISTER + MCS51_B: sprintf(info->s, "B:%02X", B); break;
- case CPUINFO_STR_REGISTER + MCS51_DPH: sprintf(info->s, "DPH:%02X", DPH); break;
- case CPUINFO_STR_REGISTER + MCS51_DPL: sprintf(info->s, "DPL:%02X", DPL); break;
- case CPUINFO_STR_REGISTER + MCS51_IE: sprintf(info->s, "IE:%02X", IE); break;
- case CPUINFO_STR_REGISTER + MCS51_R0: sprintf(info->s, "R0:%02X", R_REG(0)); break;
- case CPUINFO_STR_REGISTER + MCS51_R1: sprintf(info->s, "R1:%02X", R_REG(1)); break;
- case CPUINFO_STR_REGISTER + MCS51_R2: sprintf(info->s, "R2:%02X", R_REG(2)); break;
- case CPUINFO_STR_REGISTER + MCS51_R3: sprintf(info->s, "R3:%02X", R_REG(3)); break;
- case CPUINFO_STR_REGISTER + MCS51_R4: sprintf(info->s, "R4:%02X", R_REG(4)); break;
- case CPUINFO_STR_REGISTER + MCS51_R5: sprintf(info->s, "R5:%02X", R_REG(5)); break;
- case CPUINFO_STR_REGISTER + MCS51_R6: sprintf(info->s, "R6:%02X", R_REG(6)); break;
- case CPUINFO_STR_REGISTER + MCS51_R7: sprintf(info->s, "R7:%02X", R_REG(7)); break;
- case CPUINFO_STR_REGISTER + MCS51_RB: sprintf(info->s, "RB:%02X", ((PSW & 0x18)>>3)); break;
+ case CPUINFO_STR_REGISTER + MCS51_PC: sprintf(info->s, "PC:%04X", mcs51_state->pc); break;
+ case CPUINFO_STR_REGISTER + MCS51_SP: sprintf(info->s, "SP:%02X", SP); break;
+ case CPUINFO_STR_REGISTER + MCS51_PSW: sprintf(info->s, "PSW:%02X", PSW); break;
+ case CPUINFO_STR_REGISTER + MCS51_ACC: sprintf(info->s, "A:%02X", ACC); break;
+ case CPUINFO_STR_REGISTER + MCS51_B: sprintf(info->s, "B:%02X", B); break;
+ case CPUINFO_STR_REGISTER + MCS51_DPH: sprintf(info->s, "DPH:%02X", DPH); break;
+ case CPUINFO_STR_REGISTER + MCS51_DPL: sprintf(info->s, "DPL:%02X", DPL); break;
+ case CPUINFO_STR_REGISTER + MCS51_IE: sprintf(info->s, "IE:%02X", IE); break;
+ case CPUINFO_STR_REGISTER + MCS51_R0: sprintf(info->s, "R0:%02X", R_REG(0)); break;
+ case CPUINFO_STR_REGISTER + MCS51_R1: sprintf(info->s, "R1:%02X", R_REG(1)); break;
+ case CPUINFO_STR_REGISTER + MCS51_R2: sprintf(info->s, "R2:%02X", R_REG(2)); break;
+ case CPUINFO_STR_REGISTER + MCS51_R3: sprintf(info->s, "R3:%02X", R_REG(3)); break;
+ case CPUINFO_STR_REGISTER + MCS51_R4: sprintf(info->s, "R4:%02X", R_REG(4)); break;
+ case CPUINFO_STR_REGISTER + MCS51_R5: sprintf(info->s, "R5:%02X", R_REG(5)); break;
+ case CPUINFO_STR_REGISTER + MCS51_R6: sprintf(info->s, "R6:%02X", R_REG(6)); break;
+ case CPUINFO_STR_REGISTER + MCS51_R7: sprintf(info->s, "R7:%02X", R_REG(7)); break;
+ case CPUINFO_STR_REGISTER + MCS51_RB: sprintf(info->s, "RB:%02X", ((PSW & 0x18)>>3)); break;
}
}
@@ -2584,9 +2584,9 @@ CPU_GET_INFO( i8031 )
{
switch (state)
{
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I8031"); break;
- default: CPU_GET_INFO_CALL(mcs51); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I8031"); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
/* --- the following bits of info are returned as NULL-terminated strings --- */
}
@@ -2595,10 +2595,10 @@ CPU_GET_INFO( i8051 )
{
switch (state)
{
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I8051"); break;
- default: CPU_GET_INFO_CALL(mcs51); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I8051"); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
/* --- the following bits of info are returned as NULL-terminated strings --- */
}
@@ -2607,11 +2607,11 @@ CPU_GET_INFO( i8032 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I8032"); break;
- default: CPU_GET_INFO_CALL(mcs51); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I8032"); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
@@ -2619,12 +2619,12 @@ CPU_GET_INFO( i8052 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I8052"); break;
- default: CPU_GET_INFO_CALL(mcs51); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I8052"); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
@@ -2632,10 +2632,10 @@ CPU_GET_INFO( i8751 )
{
switch (state)
{
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I8751"); break;
- default: CPU_GET_INFO_CALL(mcs51); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_12bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I8751"); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
@@ -2643,12 +2643,12 @@ CPU_GET_INFO( i8752 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I8752"); break;
- default: CPU_GET_INFO_CALL(mcs51); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i8052); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_13bit); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_8bit); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i8052); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I8752"); break;
+ default: CPU_GET_INFO_CALL(mcs51); break;
}
}
@@ -2659,15 +2659,15 @@ CPU_GET_INFO( i8752 )
CPU_GET_INFO( i80c31 )
{
/* according to PHILIPS datasheet this is a stripped down version
- * of i80c52 with 128 bytes internal ram */
+ * of i80c52 with 128 bytes internal ram */
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c31); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I80C31"); break;
- default: CPU_GET_INFO_CALL(i8031); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c31); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(data_7bit); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I80C31"); break;
+ default: CPU_GET_INFO_CALL(i8031); break;
}
}
@@ -2675,10 +2675,10 @@ CPU_GET_INFO( i80c51 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c51); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I80C51"); break;
- default: CPU_GET_INFO_CALL(i8051); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c51); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I80C51"); break;
+ default: CPU_GET_INFO_CALL(i8051); break;
}
}
@@ -2686,10 +2686,10 @@ CPU_GET_INFO( i80c32 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c52); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I80C32"); break;
- default: CPU_GET_INFO_CALL(i8032); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c52); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I80C32"); break;
+ default: CPU_GET_INFO_CALL(i8032); break;
}
}
@@ -2697,10 +2697,10 @@ CPU_GET_INFO( i80c52 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c52); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I80C52"); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
- default: CPU_GET_INFO_CALL(i8052); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c52); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I80C52"); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
+ default: CPU_GET_INFO_CALL(i8052); break;
}
}
@@ -2708,10 +2708,10 @@ CPU_GET_INFO( i87c51 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c51); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I87C51"); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
- default: CPU_GET_INFO_CALL(i8751); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c51); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I87C51"); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
+ default: CPU_GET_INFO_CALL(i8751); break;
}
}
@@ -2719,10 +2719,10 @@ CPU_GET_INFO( i87c52 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c52); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "I87C52"); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
- default: CPU_GET_INFO_CALL(i8752); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c52); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "I87C52"); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c52); break;
+ default: CPU_GET_INFO_CALL(i8752); break;
}
}
@@ -2734,10 +2734,10 @@ CPU_GET_INFO( at89c4051 )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c51); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "AT89C4051"); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
- default: CPU_GET_INFO_CALL(i8051); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80c51); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "AT89C4051"); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(i80c51); break;
+ default: CPU_GET_INFO_CALL(i8051); break;
}
}
@@ -2745,14 +2745,14 @@ CPU_GET_INFO( ds5002fp )
{
switch (state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ds5002fp); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "DS5002FP"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Dallas"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Manuel Abadia"); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ds5002fp); break;
- default: CPU_GET_INFO_CALL(i8051); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ds5002fp); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "DS5002FP"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Dallas"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Manuel Abadia"); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ds5002fp); break;
+ default: CPU_GET_INFO_CALL(i8051); break;
}
}
diff --git a/src/emu/cpu/mcs51/mcs51.h b/src/emu/cpu/mcs51/mcs51.h
index 2eeb072a6e3..8ef98573f11 100644
--- a/src/emu/cpu/mcs51/mcs51.h
+++ b/src/emu/cpu/mcs51/mcs51.h
@@ -50,26 +50,26 @@ enum
enum
{
- MCS51_INT0_LINE = 0, /* P3.2: External Interrupt 0 */
- MCS51_INT1_LINE, /* P3.3: External Interrupt 1 */
- MCS51_RX_LINE, /* P3.0: Serial Port Receive Line */
- MCS51_T0_LINE, /* P3,4: Timer 0 External Input */
- MCS51_T1_LINE, /* P3.5: Timer 1 External Input */
- MCS51_T2_LINE, /* P1.0: Timer 2 External Input */
- MCS51_T2EX_LINE, /* P1.1: Timer 2 Capture Reload Trigger */
-
- DS5002FP_PFI_LINE, /* DS5002FP Power fail interrupt */
+ MCS51_INT0_LINE = 0, /* P3.2: External Interrupt 0 */
+ MCS51_INT1_LINE, /* P3.3: External Interrupt 1 */
+ MCS51_RX_LINE, /* P3.0: Serial Port Receive Line */
+ MCS51_T0_LINE, /* P3,4: Timer 0 External Input */
+ MCS51_T1_LINE, /* P3.5: Timer 1 External Input */
+ MCS51_T2_LINE, /* P1.0: Timer 2 External Input */
+ MCS51_T2EX_LINE, /* P1.1: Timer 2 Capture Reload Trigger */
+
+ DS5002FP_PFI_LINE, /* DS5002FP Power fail interrupt */
};
/* special I/O space ports */
enum
{
- MCS51_PORT_P0 = 0x20000,
- MCS51_PORT_P1 = 0x20001,
- MCS51_PORT_P2 = 0x20002,
- MCS51_PORT_P3 = 0x20003,
- MCS51_PORT_TX = 0x20004, /* P3.1 */
+ MCS51_PORT_P0 = 0x20000,
+ MCS51_PORT_P1 = 0x20001,
+ MCS51_PORT_P2 = 0x20002,
+ MCS51_PORT_P3 = 0x20003,
+ MCS51_PORT_TX = 0x20004, /* P3.1 */
};
/***************************************************************************
@@ -79,9 +79,9 @@ enum
/* configuration of the DS5002FP */
struct ds5002fp_config
{
- UINT8 mcon; /* bootstrap loader MCON register */
- UINT8 rpctl; /* bootstrap loader RPCTL register */
- UINT8 crc; /* bootstrap loader CRC register */
+ UINT8 mcon; /* bootstrap loader MCON register */
+ UINT8 rpctl; /* bootstrap loader RPCTL register */
+ UINT8 crc; /* bootstrap loader CRC register */
};
/***************************************************************************
diff --git a/src/emu/cpu/mcs51/mcs51dasm.c b/src/emu/cpu/mcs51/mcs51dasm.c
index ac7b0854d94..25ba45998d8 100644
--- a/src/emu/cpu/mcs51/mcs51dasm.c
+++ b/src/emu/cpu/mcs51/mcs51dasm.c
@@ -39,16 +39,16 @@
enum
{
- FEATURE_NONE = 0x00,
- FEATURE_I8052 = 0x01,
- FEATURE_CMOS = 0x02,
- FEATURE_I80C52 = 0x04,
- FEATURE_DS5002FP = 0x08,
- FEATURE_I83C751 = 0x08,
+ FEATURE_NONE = 0x00,
+ FEATURE_I8052 = 0x01,
+ FEATURE_CMOS = 0x02,
+ FEATURE_I80C52 = 0x04,
+ FEATURE_DS5002FP = 0x08,
+ FEATURE_I83C751 = 0x08,
};
-#define SHOW_MEMORY_NAMES 1
+#define SHOW_MEMORY_NAMES 1
#ifdef SHOW_MEMORY_NAMES
@@ -95,167 +95,167 @@ static const struct {
{ FEATURE_NONE, 0x1e, "rb3r6" },
{ FEATURE_NONE, 0x1f, "rb3r7" },
- { FEATURE_NONE, 0x80, "p0" },
- { FEATURE_NONE, 0x81, "sp" },
- { FEATURE_NONE, 0x82, "dpl" },
- { FEATURE_NONE, 0x83, "dph" },
- { FEATURE_NONE, 0x87, "pcon" },
- { FEATURE_NONE, 0x88, "tcon" },
- { FEATURE_NONE, 0x89, "tmod" },
- { FEATURE_NONE, 0x8a, "tl0" },
- { FEATURE_NONE, 0x8b, "tl1" },
- { FEATURE_NONE, 0x8c, "th0" },
- { FEATURE_NONE, 0x8d, "th1" },
- { FEATURE_NONE, 0x90, "p1" },
- { FEATURE_NONE, 0x98, "scon" },
- { FEATURE_NONE, 0x99, "sbuf" },
- { FEATURE_NONE, 0xa0, "p2" },
- { FEATURE_NONE, 0xa8, "ie" },
- { FEATURE_NONE, 0xb0, "p3" },
- { FEATURE_NONE, 0xb8, "ip" },
- { FEATURE_NONE, 0xd0, "psw" },
- { FEATURE_NONE, 0xe0, "acc" },
- { FEATURE_NONE, 0xf0, "b" },
-
- { FEATURE_I8052, 0xc8, "t2con" },
- { FEATURE_I8052, 0xca, "rcap2l" },
- { FEATURE_I8052, 0xcb, "rcap2h" },
- { FEATURE_I8052, 0xcc, "tl2" },
- { FEATURE_I8052, 0xcd, "th2" },
-
- { FEATURE_I80C52, 0xb7, "iph" },
- { FEATURE_I80C52, 0xa9, "saddr" },
- { FEATURE_I80C52, 0xb9, "saden" },
-
- { FEATURE_DS5002FP, 0x8e, "pwcm" },
- { FEATURE_DS5002FP, 0x8f, "pwmp" },
- { FEATURE_DS5002FP, 0xc1, "crcr" },
- { FEATURE_DS5002FP, 0xc2, "crcl" },
- { FEATURE_DS5002FP, 0xc3, "crch" },
- { FEATURE_DS5002FP, 0xc6, "mcon" },
- { FEATURE_DS5002FP, 0xc7, "ta" },
- { FEATURE_DS5002FP, 0xcf, "rnr" },
- { FEATURE_DS5002FP, 0xd8, "rpctl" },
- { FEATURE_DS5002FP, 0xd9, "rps" },
-
- { FEATURE_I83C751, 0x98, "i2con" },
- { FEATURE_I83C751, 0x99, "i2dat" },
- { FEATURE_I83C751, 0xd8, "i2cfg" },
- { FEATURE_I83C751, 0xf8, "i2sta" }, /* read only */
+ { FEATURE_NONE, 0x80, "p0" },
+ { FEATURE_NONE, 0x81, "sp" },
+ { FEATURE_NONE, 0x82, "dpl" },
+ { FEATURE_NONE, 0x83, "dph" },
+ { FEATURE_NONE, 0x87, "pcon" },
+ { FEATURE_NONE, 0x88, "tcon" },
+ { FEATURE_NONE, 0x89, "tmod" },
+ { FEATURE_NONE, 0x8a, "tl0" },
+ { FEATURE_NONE, 0x8b, "tl1" },
+ { FEATURE_NONE, 0x8c, "th0" },
+ { FEATURE_NONE, 0x8d, "th1" },
+ { FEATURE_NONE, 0x90, "p1" },
+ { FEATURE_NONE, 0x98, "scon" },
+ { FEATURE_NONE, 0x99, "sbuf" },
+ { FEATURE_NONE, 0xa0, "p2" },
+ { FEATURE_NONE, 0xa8, "ie" },
+ { FEATURE_NONE, 0xb0, "p3" },
+ { FEATURE_NONE, 0xb8, "ip" },
+ { FEATURE_NONE, 0xd0, "psw" },
+ { FEATURE_NONE, 0xe0, "acc" },
+ { FEATURE_NONE, 0xf0, "b" },
+
+ { FEATURE_I8052, 0xc8, "t2con" },
+ { FEATURE_I8052, 0xca, "rcap2l" },
+ { FEATURE_I8052, 0xcb, "rcap2h" },
+ { FEATURE_I8052, 0xcc, "tl2" },
+ { FEATURE_I8052, 0xcd, "th2" },
+
+ { FEATURE_I80C52, 0xb7, "iph" },
+ { FEATURE_I80C52, 0xa9, "saddr" },
+ { FEATURE_I80C52, 0xb9, "saden" },
+
+ { FEATURE_DS5002FP, 0x8e, "pwcm" },
+ { FEATURE_DS5002FP, 0x8f, "pwmp" },
+ { FEATURE_DS5002FP, 0xc1, "crcr" },
+ { FEATURE_DS5002FP, 0xc2, "crcl" },
+ { FEATURE_DS5002FP, 0xc3, "crch" },
+ { FEATURE_DS5002FP, 0xc6, "mcon" },
+ { FEATURE_DS5002FP, 0xc7, "ta" },
+ { FEATURE_DS5002FP, 0xcf, "rnr" },
+ { FEATURE_DS5002FP, 0xd8, "rpctl" },
+ { FEATURE_DS5002FP, 0xd9, "rps" },
+
+ { FEATURE_I83C751, 0x98, "i2con" },
+ { FEATURE_I83C751, 0x99, "i2dat" },
+ { FEATURE_I83C751, 0xd8, "i2cfg" },
+ { FEATURE_I83C751, 0xf8, "i2sta" }, /* read only */
/* bit addresses */
- { FEATURE_NONE, 0x188, "it0" },
- { FEATURE_NONE, 0x189, "ie0" },
- { FEATURE_NONE, 0x18a, "it1" },
- { FEATURE_NONE, 0x18b, "ie1" },
- { FEATURE_NONE, 0x18c, "tr0" },
- { FEATURE_NONE, 0x18d, "tf0" },
- { FEATURE_NONE, 0x18e, "tr1" },
- { FEATURE_NONE, 0x18f, "tf1" },
-
- { FEATURE_NONE, 0x198, "ri" },
- { FEATURE_NONE, 0x199, "ti" },
- { FEATURE_NONE, 0x19a, "rb8" },
- { FEATURE_NONE, 0x19b, "tb8" },
- { FEATURE_NONE, 0x19c, "ren" },
- { FEATURE_NONE, 0x19d, "sm2" },
- { FEATURE_NONE, 0x19e, "sm1" },
- { FEATURE_NONE, 0x19f, "sm0" },
-
- { FEATURE_I83C751, 0x198, "xstp" }, /* read: no function */
- { FEATURE_I83C751, 0x199, "xstr" }, /* read: MASTER */
- { FEATURE_I83C751, 0x19a, "cstp" }, /* read: STP */
- { FEATURE_I83C751, 0x19b, "cstr" }, /* read: STR */
- { FEATURE_I83C751, 0x19c, "carl" }, /* read: ARL */
- { FEATURE_I83C751, 0x19d, "cdr" }, /* read: DRDY */
- { FEATURE_I83C751, 0x19e, "idle" }, /* read: ATN */
- { FEATURE_I83C751, 0x19f, "cxa" }, /* read: RDAT */
-
- { FEATURE_NONE, 0x1a8, "ex0" },
- { FEATURE_NONE, 0x1a9, "et0" },
- { FEATURE_NONE, 0x1aa, "ex1" },
- { FEATURE_NONE, 0x1ab, "et1" },
- { FEATURE_NONE, 0x1ac, "es" },
- { FEATURE_NONE, 0x1ad, "ie.5" },
- { FEATURE_NONE, 0x1ae, "ie.6" },
- { FEATURE_NONE, 0x1af, "ea" },
-
- { FEATURE_I83C751, 0x1ac, "ei2" },
- { FEATURE_I8052, 0x1ad, "et2" },
+ { FEATURE_NONE, 0x188, "it0" },
+ { FEATURE_NONE, 0x189, "ie0" },
+ { FEATURE_NONE, 0x18a, "it1" },
+ { FEATURE_NONE, 0x18b, "ie1" },
+ { FEATURE_NONE, 0x18c, "tr0" },
+ { FEATURE_NONE, 0x18d, "tf0" },
+ { FEATURE_NONE, 0x18e, "tr1" },
+ { FEATURE_NONE, 0x18f, "tf1" },
+
+ { FEATURE_NONE, 0x198, "ri" },
+ { FEATURE_NONE, 0x199, "ti" },
+ { FEATURE_NONE, 0x19a, "rb8" },
+ { FEATURE_NONE, 0x19b, "tb8" },
+ { FEATURE_NONE, 0x19c, "ren" },
+ { FEATURE_NONE, 0x19d, "sm2" },
+ { FEATURE_NONE, 0x19e, "sm1" },
+ { FEATURE_NONE, 0x19f, "sm0" },
+
+ { FEATURE_I83C751, 0x198, "xstp" }, /* read: no function */
+ { FEATURE_I83C751, 0x199, "xstr" }, /* read: MASTER */
+ { FEATURE_I83C751, 0x19a, "cstp" }, /* read: STP */
+ { FEATURE_I83C751, 0x19b, "cstr" }, /* read: STR */
+ { FEATURE_I83C751, 0x19c, "carl" }, /* read: ARL */
+ { FEATURE_I83C751, 0x19d, "cdr" }, /* read: DRDY */
+ { FEATURE_I83C751, 0x19e, "idle" }, /* read: ATN */
+ { FEATURE_I83C751, 0x19f, "cxa" }, /* read: RDAT */
+
+ { FEATURE_NONE, 0x1a8, "ex0" },
+ { FEATURE_NONE, 0x1a9, "et0" },
+ { FEATURE_NONE, 0x1aa, "ex1" },
+ { FEATURE_NONE, 0x1ab, "et1" },
+ { FEATURE_NONE, 0x1ac, "es" },
+ { FEATURE_NONE, 0x1ad, "ie.5" },
+ { FEATURE_NONE, 0x1ae, "ie.6" },
+ { FEATURE_NONE, 0x1af, "ea" },
+
+ { FEATURE_I83C751, 0x1ac, "ei2" },
+ { FEATURE_I8052, 0x1ad, "et2" },
/* FIXME: port 3 - depends on external circuits and not really
- * implemented in the core. TBD */
- { FEATURE_NONE, 0x1b0, "rxd" },
- { FEATURE_NONE, 0x1b1, "txd" },
- { FEATURE_NONE, 0x1b2, "int0" },
- { FEATURE_NONE, 0x1b3, "int1" },
- { FEATURE_NONE, 0x1b4, "t0" },
- { FEATURE_NONE, 0x1b5, "t1" },
- { FEATURE_NONE, 0x1b6, "wr" },
- { FEATURE_NONE, 0x1b7, "rd" },
-
- { FEATURE_NONE, 0x1b8, "px0" },
- { FEATURE_NONE, 0x1b9, "pt0" },
- { FEATURE_NONE, 0x1ba, "px1" },
- { FEATURE_NONE, 0x1bb, "pt1" },
- { FEATURE_NONE, 0x1bc, "ps" },
- { FEATURE_NONE, 0x1bd, "ip.5" },
- { FEATURE_NONE, 0x1be, "ip.6" },
- { FEATURE_NONE, 0x1bf, "ip.7" },
-
- { FEATURE_I8052, 0x1bd, "pt2" },
- { FEATURE_I83C751, 0x1bc, "pi2" },
-
- { FEATURE_I8052, 0x1c8, "cprl2" },
- { FEATURE_I8052, 0x1c9, "ct2" },
- { FEATURE_I8052, 0x1ca, "tr2" },
- { FEATURE_I8052, 0x1cb, "exen2" },
- { FEATURE_I8052, 0x1cc, "tclk" },
- { FEATURE_I8052, 0x1cd, "rclk" },
- { FEATURE_I8052, 0x1ce, "exf2" },
- { FEATURE_I8052, 0x1cf, "tf2" },
-
- { FEATURE_NONE, 0x1d0, "p" },
- { FEATURE_NONE, 0x1d1, "psw.1" },
- { FEATURE_NONE, 0x1d2, "ov" },
- { FEATURE_NONE, 0x1d3, "rs0" },
- { FEATURE_NONE, 0x1d4, "rs1" },
- { FEATURE_NONE, 0x1d5, "f0" },
- { FEATURE_NONE, 0x1d6, "ac" },
- { FEATURE_NONE, 0x1d7, "cy" },
-
- { FEATURE_DS5002FP, 0x1d8, "rg0" },
- { FEATURE_DS5002FP, 0x1d9, "rpc" },
- { FEATURE_DS5002FP, 0x1da, "dma" },
- { FEATURE_DS5002FP, 0x1db, "ibi" },
- { FEATURE_DS5002FP, 0x1dc, "ae" },
- { FEATURE_DS5002FP, 0x1dd, "exbs" },
- { FEATURE_DS5002FP, 0x1de, "d8.6" },
- { FEATURE_DS5002FP, 0x1df, "rnr" },
-
- { FEATURE_I83C751, 0x1d8, "ct0" },
- { FEATURE_I83C751, 0x1d9, "ct1" },
- { FEATURE_I83C751, 0x1da, "i2cfg.2" },
- { FEATURE_I83C751, 0x1db, "i2cfg.3" },
- { FEATURE_I83C751, 0x1dc, "tirun" },
- { FEATURE_I83C751, 0x1dd, "clrti" },
- { FEATURE_I83C751, 0x1de, "masterq" },
- { FEATURE_I83C751, 0x1df, "slaven" },
-
- { FEATURE_I83C751, 0x1f8, "xstp" },
- { FEATURE_I83C751, 0x1f9, "xstr" },
- { FEATURE_I83C751, 0x1fa, "makstp" },
- { FEATURE_I83C751, 0x1fb, "makstr" },
- { FEATURE_I83C751, 0x1fc, "xactv" },
- { FEATURE_I83C751, 0x1fd, "xdata" },
- { FEATURE_I83C751, 0x1fe, "idle" },
- { FEATURE_I83C751, 0x1ff, "i2sta.7" },
+ * implemented in the core. TBD */
+ { FEATURE_NONE, 0x1b0, "rxd" },
+ { FEATURE_NONE, 0x1b1, "txd" },
+ { FEATURE_NONE, 0x1b2, "int0" },
+ { FEATURE_NONE, 0x1b3, "int1" },
+ { FEATURE_NONE, 0x1b4, "t0" },
+ { FEATURE_NONE, 0x1b5, "t1" },
+ { FEATURE_NONE, 0x1b6, "wr" },
+ { FEATURE_NONE, 0x1b7, "rd" },
+
+ { FEATURE_NONE, 0x1b8, "px0" },
+ { FEATURE_NONE, 0x1b9, "pt0" },
+ { FEATURE_NONE, 0x1ba, "px1" },
+ { FEATURE_NONE, 0x1bb, "pt1" },
+ { FEATURE_NONE, 0x1bc, "ps" },
+ { FEATURE_NONE, 0x1bd, "ip.5" },
+ { FEATURE_NONE, 0x1be, "ip.6" },
+ { FEATURE_NONE, 0x1bf, "ip.7" },
+
+ { FEATURE_I8052, 0x1bd, "pt2" },
+ { FEATURE_I83C751, 0x1bc, "pi2" },
+
+ { FEATURE_I8052, 0x1c8, "cprl2" },
+ { FEATURE_I8052, 0x1c9, "ct2" },
+ { FEATURE_I8052, 0x1ca, "tr2" },
+ { FEATURE_I8052, 0x1cb, "exen2" },
+ { FEATURE_I8052, 0x1cc, "tclk" },
+ { FEATURE_I8052, 0x1cd, "rclk" },
+ { FEATURE_I8052, 0x1ce, "exf2" },
+ { FEATURE_I8052, 0x1cf, "tf2" },
+
+ { FEATURE_NONE, 0x1d0, "p" },
+ { FEATURE_NONE, 0x1d1, "psw.1" },
+ { FEATURE_NONE, 0x1d2, "ov" },
+ { FEATURE_NONE, 0x1d3, "rs0" },
+ { FEATURE_NONE, 0x1d4, "rs1" },
+ { FEATURE_NONE, 0x1d5, "f0" },
+ { FEATURE_NONE, 0x1d6, "ac" },
+ { FEATURE_NONE, 0x1d7, "cy" },
+
+ { FEATURE_DS5002FP, 0x1d8, "rg0" },
+ { FEATURE_DS5002FP, 0x1d9, "rpc" },
+ { FEATURE_DS5002FP, 0x1da, "dma" },
+ { FEATURE_DS5002FP, 0x1db, "ibi" },
+ { FEATURE_DS5002FP, 0x1dc, "ae" },
+ { FEATURE_DS5002FP, 0x1dd, "exbs" },
+ { FEATURE_DS5002FP, 0x1de, "d8.6" },
+ { FEATURE_DS5002FP, 0x1df, "rnr" },
+
+ { FEATURE_I83C751, 0x1d8, "ct0" },
+ { FEATURE_I83C751, 0x1d9, "ct1" },
+ { FEATURE_I83C751, 0x1da, "i2cfg.2" },
+ { FEATURE_I83C751, 0x1db, "i2cfg.3" },
+ { FEATURE_I83C751, 0x1dc, "tirun" },
+ { FEATURE_I83C751, 0x1dd, "clrti" },
+ { FEATURE_I83C751, 0x1de, "masterq" },
+ { FEATURE_I83C751, 0x1df, "slaven" },
+
+ { FEATURE_I83C751, 0x1f8, "xstp" },
+ { FEATURE_I83C751, 0x1f9, "xstr" },
+ { FEATURE_I83C751, 0x1fa, "makstp" },
+ { FEATURE_I83C751, 0x1fb, "makstr" },
+ { FEATURE_I83C751, 0x1fc, "xactv" },
+ { FEATURE_I83C751, 0x1fd, "xdata" },
+ { FEATURE_I83C751, 0x1fe, "idle" },
+ { FEATURE_I83C751, 0x1ff, "i2sta.7" },
/* unknown
- * "ibf", "obf", "idsm", "obfc", e8 - eb
- * "ma0", "ma1", "mb0", "mb1", ec - ef
- */
+ * "ibf", "obf", "idsm", "obfc", e8 - eb
+ * "ma0", "ma1", "mb0", "mb1", ec - ef
+ */
{ -1 }
};
@@ -346,7 +346,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
UINT32 flags = 0;
unsigned PC = pc;
const char *sym, *sym2;
- UINT8 op, data;
+ UINT8 op, data;
UINT16 addr;
INT8 rel;
@@ -354,7 +354,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
switch( op )
{
//NOP
- case 0x00: /* 1: 0000 0000 */
+ case 0x00: /* 1: 0000 0000 */
sprintf(dst, "nop");
break;
@@ -373,24 +373,24 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//LJMP code addr
- case 0x02: /* 1: 0000 0010 */
+ case 0x02: /* 1: 0000 0010 */
addr = (opram[PC++ - pc]<<8) & 0xff00;
addr|= opram[PC++ - pc];
sprintf(dst, "ljmp $%04X", addr);
break;
//RR A
- case 0x03: /* 1: 0000 0011 */
+ case 0x03: /* 1: 0000 0011 */
sprintf(dst, "rr a");
break;
//INC A
- case 0x04: /* 1: 0000 0100 */
+ case 0x04: /* 1: 0000 0100 */
sprintf(dst, "inc a");
break;
//INC data addr
- case 0x05: /* 1: 0000 0101 */
+ case 0x05: /* 1: 0000 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "inc %s", sym);
break;
@@ -414,7 +414,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//JBC bit addr, code addr
- case 0x10: /* 1: 0001 0000 */
+ case 0x10: /* 1: 0001 0000 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
rel = opram[PC++ - pc];
sprintf(dst, "jbc %s,$%04X", sym, PC + rel);
@@ -435,7 +435,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//LCALL code addr
- case 0x12: /* 1: 0001 0010 */
+ case 0x12: /* 1: 0001 0010 */
addr = (opram[PC++ - pc]<<8) & 0xff00;
addr|= opram[PC++ - pc];
sprintf(dst, "lcall $%04X", addr);
@@ -443,17 +443,17 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//RRC A
- case 0x13: /* 1: 0001 0011 */
+ case 0x13: /* 1: 0001 0011 */
sprintf(dst, "rrc a");
break;
//DEC A
- case 0x14: /* 1: 0001 0100 */
+ case 0x14: /* 1: 0001 0100 */
sprintf(dst, "dec a");
break;
//DEC data addr
- case 0x15: /* 1: 0001 0101 */
+ case 0x15: /* 1: 0001 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "dec %s", sym);
break;
@@ -478,30 +478,30 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//JB bit addr, code addr
- case 0x20: /* 1: 0010 0000 */
+ case 0x20: /* 1: 0010 0000 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
rel = opram[PC++ - pc];
sprintf(dst, "jb %s,$%04X", sym, (PC + rel));
break;
//RET
- case 0x22: /* 1: 0010 0010 */
+ case 0x22: /* 1: 0010 0010 */
sprintf(dst, "ret");
flags = DASMFLAG_STEP_OUT;
break;
//RL A
- case 0x23: /* 1: 0010 0011 */
+ case 0x23: /* 1: 0010 0011 */
sprintf(dst, "rl a");
break;
//ADD A, #data
- case 0x24: /* 1: 0010 0100 */
+ case 0x24: /* 1: 0010 0100 */
sprintf(dst, "add a,#$%02X", opram[PC++ - pc]);
break;
//ADD A, data addr
- case 0x25: /* 1: 0010 0101 */
+ case 0x25: /* 1: 0010 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "add a,%s", sym);
break;
@@ -526,30 +526,30 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//JNB bit addr, code addr
- case 0x30: /* 1: 0011 0000 */
+ case 0x30: /* 1: 0011 0000 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
rel = opram[PC++ - pc];
sprintf(dst, "jnb %s,$%04X", sym, (PC + rel));
break;
//RETI
- case 0x32: /* 1: 0011 0010 */
+ case 0x32: /* 1: 0011 0010 */
sprintf(dst, "reti");
flags = DASMFLAG_STEP_OUT;
break;
//RLC A
- case 0x33: /* 1: 0011 0011 */
+ case 0x33: /* 1: 0011 0011 */
sprintf(dst, "rlc a");
break;
//ADDC A, #data
- case 0x34: /* 1: 0011 0100 */
+ case 0x34: /* 1: 0011 0100 */
sprintf(dst, "addc a,#$%02X", opram[PC++ - pc]);
break;
//ADDC A, data addr
- case 0x35: /* 1: 0011 0101 */
+ case 0x35: /* 1: 0011 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "addc a,%s", sym);
break;
@@ -573,31 +573,31 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//JC code addr
- case 0x40: /* 1: 0100 0000 */
+ case 0x40: /* 1: 0100 0000 */
rel = opram[PC++ - pc];
sprintf(dst, "jc $%04X", PC + rel);
break;
//ORL data addr, A
- case 0x42: /* 1: 0100 0010 */
+ case 0x42: /* 1: 0100 0010 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "orl %s,a", sym);
break;
//ORL data addr, #data
- case 0x43: /* 1: 0100 0011 */
+ case 0x43: /* 1: 0100 0011 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "orl %s,#$%02X", sym, opram[PC++ - pc]);
break;
//Unable to Test
//ORL A, #data
- case 0x44: /* 1: 0100 0100 */
+ case 0x44: /* 1: 0100 0100 */
sprintf(dst, "orl a,#$%02X", opram[PC++ - pc]);
break;
//ORL A, data addr
- case 0x45: /* 1: 0100 0101 */
+ case 0x45: /* 1: 0100 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "orl a,%s", sym);
break;
@@ -621,32 +621,32 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//JNC code addr
- case 0x50: /* 1: 0101 0000 */
+ case 0x50: /* 1: 0101 0000 */
rel = opram[PC++ - pc];
sprintf(dst, "jnc $%04X", PC + rel);
break;
//Unable to test
//ANL data addr, A
- case 0x52: /* 1: 0101 0010 */
+ case 0x52: /* 1: 0101 0010 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "anl %s,a", sym);
break;
//Unable to test
//ANL data addr, #data
- case 0x53: /* 1: 0101 0011 */
+ case 0x53: /* 1: 0101 0011 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "anl %s,#$%02X", sym, opram[PC++ - pc]);
break;
//ANL A, #data
- case 0x54: /* 1: 0101 0100 */
+ case 0x54: /* 1: 0101 0100 */
sprintf(dst, "anl a,#$%02X", opram[PC++ - pc]);
break;
//ANL A, data addr
- case 0x55: /* 1: 0101 0101 */
+ case 0x55: /* 1: 0101 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "anl a,%s", sym);
break;
@@ -671,31 +671,31 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//JZ code addr
- case 0x60: /* 1: 0110 0000 */
+ case 0x60: /* 1: 0110 0000 */
rel = opram[PC++ - pc];
sprintf(dst, "jz $%04X", PC + rel);
break;
//Unable to test
//XRL data addr, A
- case 0x62: /* 1: 0110 0010 */
+ case 0x62: /* 1: 0110 0010 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "xrl %s,a", sym);
break;
//XRL data addr, #data
- case 0x63: /* 1: 0110 0011 */
+ case 0x63: /* 1: 0110 0011 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "xrl %s,#$%02X", sym, opram[PC++ - pc]);
break;
//XRL A, #data
- case 0x64: /* 1: 0110 0100 */
+ case 0x64: /* 1: 0110 0100 */
sprintf(dst, "xrl a,#$%02X", opram[PC++ - pc]);
break;
//XRL A, data addr
- case 0x65: /* 1: 0110 0101 */
+ case 0x65: /* 1: 0110 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "xrl a,%s", sym);
break;
@@ -720,31 +720,31 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//JNZ code addr
- case 0x70: /* 1: 0111 0000 */
+ case 0x70: /* 1: 0111 0000 */
rel = opram[PC++ - pc];
sprintf(dst, "jnz $%04X", PC + rel);
break;
//Unable to test
//ORL C, bit addr
- case 0x72: /* 1: 0111 0010 */
+ case 0x72: /* 1: 0111 0010 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "orl c,%s", sym);
break;
//Unable to test
//JMP @A+DPTR
- case 0x73: /* 1: 0111 0011 */
+ case 0x73: /* 1: 0111 0011 */
sprintf(dst, "jmp @a+dptr");
break;
//MOV A, #data
- case 0x74: /* 1: 0111 0100 */
+ case 0x74: /* 1: 0111 0100 */
sprintf(dst, "mov a,#$%02X", opram[PC++ - pc]);
break;
//MOV data addr, #data
- case 0x75: /* 1: 0111 0101 */
+ case 0x75: /* 1: 0111 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "mov %s,#$%02X", sym, opram[PC++ - pc]);
break;
@@ -769,29 +769,29 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//SJMP code addr
- case 0x80: /* 1: 1000 0000 */
+ case 0x80: /* 1: 1000 0000 */
rel = opram[PC++ - pc];
sprintf(dst, "sjmp $%04X", PC + rel);
break;
//ANL C, bit addr
- case 0x82: /* 1: 1000 0010 */
+ case 0x82: /* 1: 1000 0010 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "anl c,%s", sym);
break;
//MOVC A, @A + PC
- case 0x83: /* 1: 1000 0011 */
+ case 0x83: /* 1: 1000 0011 */
sprintf(dst, "movc a,@a+pc");
break;
//DIV AB
- case 0x84: /* 1: 1000 0100 */
+ case 0x84: /* 1: 1000 0100 */
sprintf(dst, "div ab");
break;
//MOV data addr, data addr (Note: 1st address is src, 2nd is dst, but the mov command works as mov dst,src)
- case 0x85: /* 1: 1000 0101 */
+ case 0x85: /* 1: 1000 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sym2 = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "mov %s,%s", sym2, sym);
@@ -819,30 +819,30 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//MOV DPTR, #data16
- case 0x90: /* 1: 1001 0000 */
+ case 0x90: /* 1: 1001 0000 */
addr = (opram[PC++ - pc]<<8) & 0xff00;
addr|= opram[PC++ - pc];
sprintf(dst, "mov dptr,#$%04X", addr);
break;
//MOV bit addr, C
- case 0x92: /* 1: 1001 0010 */
+ case 0x92: /* 1: 1001 0010 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "mov %s,c", sym);
break;
//MOVC A, @A + DPTR
- case 0x93: /* 1: 1001 0011 */
+ case 0x93: /* 1: 1001 0011 */
sprintf(dst, "movc a,@a+dptr");
break;
//SUBB A, #data
- case 0x94: /* 1: 1001 0100 */
+ case 0x94: /* 1: 1001 0100 */
sprintf(dst, "subb a,#$%02X", opram[PC++ - pc]);
break;
//SUBB A, data addr
- case 0x95: /* 1: 1001 0101 */
+ case 0x95: /* 1: 1001 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "subb a,%s", sym);
break;
@@ -868,29 +868,29 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
//Unable to test
//ORL C, /bit addr
- case 0xa0: /* 1: 1010 0000 */
+ case 0xa0: /* 1: 1010 0000 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "orl c,/%s", sym);
break;
//MOV C, bit addr
- case 0xa2: /* 1: 1010 0010 */
+ case 0xa2: /* 1: 1010 0010 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "mov c,%s", sym);
break;
//INC DPTR
- case 0xa3: /* 1: 1010 0011 */
+ case 0xa3: /* 1: 1010 0011 */
sprintf(dst, "inc dptr");
break;
//MUL AB
- case 0xa4: /* 1: 1010 0100 */
+ case 0xa4: /* 1: 1010 0100 */
sprintf(dst, "mul ab");
break;
//reserved
- case 0xa5: /* 1: 1010 0101 */
+ case 0xa5: /* 1: 1010 0101 */
sprintf(dst, "ill/rsv");
break;
@@ -916,32 +916,32 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//ANL C,/bit addr
- case 0xb0: /* 1: 1011 0000 */
+ case 0xb0: /* 1: 1011 0000 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "anl c,/%s", sym);
break;
//CPL bit addr
- case 0xb2: /* 1: 1011 0010 */
+ case 0xb2: /* 1: 1011 0010 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "cpl %s", sym);
break;
//Unable to test
//CPL C
- case 0xb3: /* 1: 1011 0011 */
+ case 0xb3: /* 1: 1011 0011 */
sprintf(dst, "cpl c");
break;
//CJNE A, #data, code addr
- case 0xb4: /* 1: 1011 0100 */
+ case 0xb4: /* 1: 1011 0100 */
data = opram[PC++ - pc];
rel = opram[PC++ - pc];
sprintf(dst, "cjne a,#$%02X,$%04X", data, PC + rel);
break;
//CJNE A, data addr, code addr
- case 0xb5: /* 1: 1011 0101 */
+ case 0xb5: /* 1: 1011 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
rel = opram[PC++ - pc];
sprintf(dst, "cjne a,%s,$%04X", sym, PC + rel);
@@ -971,29 +971,29 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//PUSH data addr
- case 0xc0: /* 1: 1100 0000 */
+ case 0xc0: /* 1: 1100 0000 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "push %s", sym);
break;
//CLR bit addr
- case 0xc2: /* 1: 1100 0010 */
+ case 0xc2: /* 1: 1100 0010 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "clr %s", sym);
break;
//CLR C
- case 0xc3: /* 1: 1100 0011 */
+ case 0xc3: /* 1: 1100 0011 */
sprintf(dst, "clr c");
break;
//SWAP A
- case 0xc4: /* 1: 1100 0100 */
+ case 0xc4: /* 1: 1100 0100 */
sprintf(dst, "swap a");
break;
//XCH A, data addr
- case 0xc5: /* 1: 1100 0101 */
+ case 0xc5: /* 1: 1100 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "xch a,%s", sym);
break;
@@ -1017,30 +1017,30 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//POP data addr
- case 0xd0: /* 1: 1101 0000 */
+ case 0xd0: /* 1: 1101 0000 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "pop %s", sym);
break;
//SETB bit addr
- case 0xd2: /* 1: 1101 0010 */
+ case 0xd2: /* 1: 1101 0010 */
sym = get_bit_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "setb %s", sym);
break;
//SETB C
- case 0xd3: /* 1: 1101 0011 */
+ case 0xd3: /* 1: 1101 0011 */
sprintf(dst, "setb c");
break;
//Unable to test
//DA A
- case 0xd4: /* 1: 1101 0100 */
+ case 0xd4: /* 1: 1101 0100 */
sprintf(dst, "da a");
break;
//DJNZ data addr, code addr
- case 0xd5: /* 1: 1101 0101 */
+ case 0xd5: /* 1: 1101 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
rel = opram[PC++ - pc];
sprintf(dst, "djnz %s,$%04X", sym, PC + rel);
@@ -1068,7 +1068,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//MOVX A,@DPTR
- case 0xe0: /* 1: 1110 0000 */
+ case 0xe0: /* 1: 1110 0000 */
sprintf(dst, "movx a,@dptr");
break;
@@ -1080,12 +1080,12 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//CLR A
- case 0xe4: /* 1: 1110 0100 */
+ case 0xe4: /* 1: 1110 0100 */
sprintf(dst, "clr a");
break;
//MOV A, data addr
- case 0xe5: /* 1: 1110 0101 */
+ case 0xe5: /* 1: 1110 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "mov a,%s", sym);
break;
@@ -1110,7 +1110,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//MOVX @DPTR,A
- case 0xf0: /* 1: 1111 0000 */
+ case 0xf0: /* 1: 1111 0000 */
sprintf(dst, "movx @dptr,a");
break;
@@ -1122,12 +1122,12 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
break;
//CPL A
- case 0xf4: /* 1: 1111 0100 */
+ case 0xf4: /* 1: 1111 0100 */
sprintf(dst, "cpl a");
break;
//MOV data addr, A
- case 0xf5: /* 1: 1111 0101 */
+ case 0xf5: /* 1: 1111 0101 */
sym = get_data_address(mem_names, opram[PC++ - pc]);
sprintf(dst, "mov %s,a", sym);
break;
@@ -1152,7 +1152,7 @@ static offs_t mcs51_dasm( const char **mem_names, char *dst, offs_t pc, const UI
default:
sprintf(dst, "illegal");
- }
+ }
return (PC - pc) | flags | DASMFLAG_SUPPORTED;
}
@@ -1164,8 +1164,8 @@ CPU_DISASSEMBLE( i8051 )
if (!mem_names_initialized)
{
- init_mem_names( FEATURE_NONE, mem_names);
- mem_names_initialized = 1;
+ init_mem_names( FEATURE_NONE, mem_names);
+ mem_names_initialized = 1;
}
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
@@ -1177,8 +1177,8 @@ CPU_DISASSEMBLE( i8052 )
if (!mem_names_initialized)
{
- init_mem_names( FEATURE_I8052, mem_names);
- mem_names_initialized = 1;
+ init_mem_names( FEATURE_I8052, mem_names);
+ mem_names_initialized = 1;
}
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
@@ -1190,8 +1190,8 @@ CPU_DISASSEMBLE( i80c51 )
if (!mem_names_initialized)
{
- init_mem_names( FEATURE_CMOS, mem_names);
- mem_names_initialized = 1;
+ init_mem_names( FEATURE_CMOS, mem_names);
+ mem_names_initialized = 1;
}
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
@@ -1203,8 +1203,8 @@ CPU_DISASSEMBLE( i80c52 )
if (!mem_names_initialized)
{
- init_mem_names( FEATURE_I8052 | FEATURE_CMOS | FEATURE_I80C52, mem_names);
- mem_names_initialized = 1;
+ init_mem_names( FEATURE_I8052 | FEATURE_CMOS | FEATURE_I80C52, mem_names);
+ mem_names_initialized = 1;
}
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
@@ -1216,8 +1216,8 @@ CPU_DISASSEMBLE( ds5002fp )
if (!mem_names_initialized)
{
- init_mem_names( FEATURE_DS5002FP | FEATURE_CMOS, mem_names);
- mem_names_initialized = 1;
+ init_mem_names( FEATURE_DS5002FP | FEATURE_CMOS, mem_names);
+ mem_names_initialized = 1;
}
return mcs51_dasm(mem_names, buffer, pc, oprom, opram);
}
diff --git a/src/emu/cpu/mcs51/mcs51ops.c b/src/emu/cpu/mcs51/mcs51ops.c
index 7cbaf78575c..efc3e727ce6 100644
--- a/src/emu/cpu/mcs51/mcs51ops.c
+++ b/src/emu/cpu/mcs51/mcs51ops.c
@@ -7,8 +7,8 @@
//ACALL code addr /* 1: aaa1 0001 */
OPHANDLER( acall )
{
- UINT8 addr = ROP_ARG(PC++); //Grab code address byte
- PUSH_PC(); //Save PC to the stack
+ UINT8 addr = ROP_ARG(PC++); //Grab code address byte
+ PUSH_PC(); //Save PC to the stack
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((r & 0xe0) << 3) | addr;
}
@@ -16,81 +16,81 @@ OPHANDLER( acall )
//ADD A, #data /* 1: 0010 0100 */
OPHANDLER( add_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ UINT8 result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, data addr /* 1: 0010 0101 */
OPHANDLER( add_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- UINT8 result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ UINT8 result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, @R0/@R1 /* 1: 0010 011i */
OPHANDLER( add_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- UINT8 result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ UINT8 result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, R0 to R7 /* 1: 0010 1rrr */
OPHANDLER( add_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- UINT8 result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = R_REG(r); //Grab data from R0 - R7
+ UINT8 result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, #data /* 1: 0011 0100 */
OPHANDLER( addc_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, data addr /* 1: 0011 0101 */
OPHANDLER( addc_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, @R0/@R1 /* 1: 0011 011i */
OPHANDLER( addc_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, R0 to R7 /* 1: 0011 1rrr */
OPHANDLER( addc_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = R_REG(r); //Grab data from R0 - R7
+ UINT8 result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//AJMP code addr /* 1: aaa0 0001 */
OPHANDLER( ajmp )
{
- UINT8 addr = ROP_ARG(PC++); //Grab code address byte
+ UINT8 addr = ROP_ARG(PC++); //Grab code address byte
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((r & 0xe0) << 3) | addr;
}
@@ -98,75 +98,75 @@ OPHANDLER( ajmp )
//ANL data addr, A /* 1: 0101 0010 */
OPHANDLER( anl_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,data & ACC); //Set data address value to it's value Logical AND with ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr,data & ACC); //Set data address value to it's value Logical AND with ACC
}
//ANL data addr, #data /* 1: 0101 0011 */
OPHANDLER( anl_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 srcdata = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,srcdata & data); //Set data address value to it's value Logical AND with Data
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ UINT8 srcdata = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr,srcdata & data); //Set data address value to it's value Logical AND with Data
}
//ANL A, #data /* 1: 0101 0100 */
OPHANDLER( anl_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, data addr /* 1: 0101 0101 */
OPHANDLER( anl_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, @RO/@R1 /* 1: 0101 011i */
OPHANDLER( anl_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, RO to R7 /* 1: 0101 1rrr */
OPHANDLER( anl_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ UINT8 data = R_REG(r); //Grab data from R0 - R7
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL C, bit addr /* 1: 1000 0010 */
OPHANDLER( anl_c_bitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
- SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Bit
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Bit
}
//ANL C,/bit addr /* 1: 1011 0000 */
OPHANDLER( anl_c_nbitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
- bit = ((~bit)&1); //Complement bit
- SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ bit = ((~bit)&1); //Complement bit
+ SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
}
//CJNE A, #data, code addr /* 1: 1011 0100 */
OPHANDLER( cjne_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(ACC != data) //Jump if values are not equal
+ if(ACC != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
@@ -178,11 +178,11 @@ OPHANDLER( cjne_a_byte )
//CJNE A, data addr, code addr /* 1: 1011 0101 */
OPHANDLER( cjne_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- UINT8 data = IRAM_R(addr); //Pull value from data address
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ UINT8 data = IRAM_R(addr); //Pull value from data address
- if(ACC != data) //Jump if values are not equal
+ if(ACC != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
@@ -194,11 +194,11 @@ OPHANDLER( cjne_a_mem )
//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
OPHANDLER( cjne_ir_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- UINT8 srcdata = IRAM_IR(R_REG(r)); //Grab value pointed to by R0 or R1
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ UINT8 srcdata = IRAM_IR(R_REG(r)); //Grab value pointed to by R0 or R1
- if(srcdata != data) //Jump if values are not equal
+ if(srcdata != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
@@ -210,11 +210,11 @@ OPHANDLER( cjne_ir_byte )
//CJNE R0 to R7, #data, code addr /* 1: 1011 1rrr */
OPHANDLER( cjne_r_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- UINT8 srcdata = R_REG(r); //Grab value of R0 - R7
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ UINT8 srcdata = R_REG(r); //Grab value of R0 - R7
- if(srcdata != data) //Jump if values are not equal
+ if(srcdata != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
@@ -226,34 +226,34 @@ OPHANDLER( cjne_r_byte )
//CLR bit addr /* 1: 1100 0010 */
OPHANDLER( clr_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- BIT_W(addr,0); //Clear bit at specified bit address
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ BIT_W(addr,0); //Clear bit at specified bit address
}
//CLR C /* 1: 1100 0011 */
OPHANDLER( clr_c )
{
- SET_CY(0); //Clear Carry Flag
+ SET_CY(0); //Clear Carry Flag
}
//CLR A /* 1: 1110 0100 */
OPHANDLER( clr_a )
{
- SET_ACC(0); //Clear Accumulator
+ SET_ACC(0); //Clear Accumulator
}
//CPL bit addr /* 1: 1011 0010 */
OPHANDLER( cpl_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
UINT8 data = (~BIT_R(addr))&1;
- BIT_W(addr,data); //Complement bit at specified bit address
+ BIT_W(addr,data); //Complement bit at specified bit address
}
//CPL C /* 1: 1011 0011 */
OPHANDLER( cpl_c )
{
- UINT8 bit = (~GET_CY)&1; //Complement Carry Flag
+ UINT8 bit = (~GET_CY)&1; //Complement Carry Flag
SET_CY(bit);
}
@@ -261,7 +261,7 @@ OPHANDLER( cpl_c )
OPHANDLER( cpl_a )
{
UINT8 data = ((~ACC)&0xff);
- SET_ACC(data); //Complement Accumulator
+ SET_ACC(data); //Complement Accumulator
}
//DA A /* 1: 1101 0100 */
@@ -275,13 +275,13 @@ OPHANDLER( da_a )
If the carry is set, OR the four high bits 4-7 exceed nine, six is added to the value of these bits.
The carry flag will be set if the result is > 0x99, but not cleared otherwise */
- UINT16 new_acc = ACC & 0xff;
- if(GET_AC || (new_acc & 0x0f) > 0x09)
- new_acc += 0x06;
- if(GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff))
- new_acc += 0x60;
- SET_ACC(new_acc&0xff);
- if(new_acc & ~0xff)
+ UINT16 new_acc = ACC & 0xff;
+ if(GET_AC || (new_acc & 0x0f) > 0x09)
+ new_acc += 0x06;
+ if(GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff))
+ new_acc += 0x60;
+ SET_ACC(new_acc&0xff);
+ if(new_acc & ~0xff)
SET_CY(1);
}
@@ -294,7 +294,7 @@ OPHANDLER( dec_a )
//DEC data addr /* 1: 0001 0101 */
OPHANDLER( dec_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr);
IRAM_W(addr,data-1);
}
@@ -338,10 +338,10 @@ OPHANDLER( div_ab )
//DJNZ data addr, code addr /* 1: 1101 0101 */
OPHANDLER( djnz_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- IRAM_W(addr,IRAM_R(addr) - 1); //Decrement value contained at data address
- if(IRAM_R(addr) != 0) //Branch if contents of data address is not 0
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ IRAM_W(addr,IRAM_R(addr) - 1); //Decrement value contained at data address
+ if(IRAM_R(addr) != 0) //Branch if contents of data address is not 0
{
PC = PC + rel_addr;
}
@@ -350,9 +350,9 @@ OPHANDLER( djnz_mem )
//DJNZ R0 to R7,code addr /* 1: 1101 1rrr */
OPHANDLER( djnz_r )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- SET_REG(r ,R_REG(r) - 1); //Decrement value
- if(R_REG(r) != 0) //Branch if contents of R0 - R7 is not 0
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ SET_REG(r ,R_REG(r) - 1); //Decrement value
+ if(R_REG(r) != 0) //Branch if contents of R0 - R7 is not 0
{
PC = PC + rel_addr;
}
@@ -367,7 +367,7 @@ OPHANDLER( inc_a )
//INC data addr /* 1: 0000 0101 */
OPHANDLER( inc_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
UINT8 data = IRAM_R(addr);
IRAM_W(addr,data+1);
}
@@ -396,9 +396,9 @@ OPHANDLER( inc_dptr )
//JB bit addr, code addr /* 1: 0010 0000 */
OPHANDLER( jb )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(BIT_R(addr)) //If bit set at specified bit address, jump
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if(BIT_R(addr)) //If bit set at specified bit address, jump
{
PC = PC + rel_addr;
}
@@ -407,19 +407,19 @@ OPHANDLER( jb )
//JBC bit addr, code addr /* 1: 0001 0000 */
OPHANDLER( jbc )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(BIT_R(addr)) { //If bit set at specified bit address, jump
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if(BIT_R(addr)) { //If bit set at specified bit address, jump
PC = PC + rel_addr;
- BIT_W(addr,0); //Clear Bit also
+ BIT_W(addr,0); //Clear Bit also
}
}
//JC code addr /* 1: 0100 0000 */
OPHANDLER( jc )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(GET_CY) //Jump if Carry Flag Set
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if(GET_CY) //Jump if Carry Flag Set
{
PC = PC + rel_addr;
}
@@ -434,9 +434,9 @@ OPHANDLER( jmp_iadptr )
//JNB bit addr, code addr /* 1: 0011 0000 */
OPHANDLER( jnb )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(!BIT_R(addr)) //If bit NOT set at specified bit address, jump
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if(!BIT_R(addr)) //If bit NOT set at specified bit address, jump
{
PC = PC + rel_addr;
}
@@ -445,8 +445,8 @@ OPHANDLER( jnb )
//JNC code addr /* 1: 0101 0000 */
OPHANDLER( jnc )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(!GET_CY) //Jump if Carry Flag not set
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if(!GET_CY) //Jump if Carry Flag not set
{
PC = PC + rel_addr;
}
@@ -455,8 +455,8 @@ OPHANDLER( jnc )
//JNZ code addr /* 1: 0111 0000 */
OPHANDLER( jnz )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(ACC != 0) //Branch if ACC is not 0
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if(ACC != 0) //Branch if ACC is not 0
{
PC = PC+rel_addr;
}
@@ -465,8 +465,8 @@ OPHANDLER( jnz )
//JZ code addr /* 1: 0110 0000 */
OPHANDLER( jz )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(ACC == 0) //Branch if ACC is 0
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if(ACC == 0) //Branch if ACC is 0
{
PC = PC+rel_addr;
}
@@ -494,35 +494,35 @@ OPHANDLER( ljmp )
//MOV A, #data /* 1: 0111 0100 */
OPHANDLER( mov_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- SET_ACC(data); //Store data to ACC
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ SET_ACC(data); //Store data to ACC
}
//MOV A, data addr /* 1: 1110 0101 */
OPHANDLER( mov_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- SET_ACC(IRAM_R(addr)); //Store contents of data address to ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ SET_ACC(IRAM_R(addr)); //Store contents of data address to ACC
}
//MOV A,@RO/@R1 /* 1: 1110 011i */
OPHANDLER( mov_a_ir )
{
- SET_ACC(IRAM_IR(R_REG(r))); //Store contents of address pointed by R0 or R1 to ACC
+ SET_ACC(IRAM_IR(R_REG(r))); //Store contents of address pointed by R0 or R1 to ACC
}
//MOV A,R0 to R7 /* 1: 1110 1rrr */
OPHANDLER( mov_a_r )
{
- SET_ACC(R_REG(r)); //Store contents of R0 - R7 to ACC
+ SET_ACC(R_REG(r)); //Store contents of R0 - R7 to ACC
}
//MOV data addr, #data /* 1: 0111 0101 */
OPHANDLER( mov_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
- IRAM_W(addr,data); //Store data to data address location
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ IRAM_W(addr,data); //Store data to data address location
}
//MOV data addr, data addr /* 1: 1000 0101 */
@@ -530,108 +530,108 @@ OPHANDLER( mov_mem_mem )
{
//1st address is src, 2nd is dst, but the mov command works as mov dst,src)
UINT8 src,dst;
- src = ROP_ARG(PC++); //Grab source data address
- dst = ROP_ARG(PC++); //Grab destination data address
- IRAM_W(dst,IRAM_R(src)); //Read source address contents and store to destination address
+ src = ROP_ARG(PC++); //Grab source data address
+ dst = ROP_ARG(PC++); //Grab destination data address
+ IRAM_W(dst,IRAM_R(src)); //Read source address contents and store to destination address
}
//MOV @R0/@R1, #data /* 1: 0111 011i */
OPHANDLER( mov_ir_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- IRAM_IW(R_REG(r),data); //Store data to address pointed by R0 or R1
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ IRAM_IW(R_REG(r),data); //Store data to address pointed by R0 or R1
}
//MOV R0 to R7, #data /* 1: 0111 1rrr */
OPHANDLER( mov_r_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- SET_REG(r, data); //Store to R0 - R7
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ SET_REG(r, data); //Store to R0 - R7
}
//MOV data addr, @R0/@R1 /* 1: 1000 011i */
OPHANDLER( mov_mem_ir )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- IRAM_W(addr,IRAM_IR(R_REG(r))); //Store contents pointed to by R0 or R1 to data address
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ IRAM_W(addr,IRAM_IR(R_REG(r))); //Store contents pointed to by R0 or R1 to data address
}
//MOV data addr,R0 to R7 /* 1: 1000 1rrr */
OPHANDLER( mov_mem_r )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- IRAM_W(addr,R_REG(r)); //Store contents of R0 - R7 to data address
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ IRAM_W(addr,R_REG(r)); //Store contents of R0 - R7 to data address
}
//MOV DPTR, #data16 /* 1: 1001 0000 */
OPHANDLER( mov_dptr_byte )
{
UINT8 data_hi, data_lo;
- data_hi = ROP_ARG(PC++); //Grab hi byte
- data_lo = ROP_ARG(PC++); //Grab lo byte
- SET_DPTR((UINT16)((data_hi<<8)|data_lo)); //Store to DPTR
+ data_hi = ROP_ARG(PC++); //Grab hi byte
+ data_lo = ROP_ARG(PC++); //Grab lo byte
+ SET_DPTR((UINT16)((data_hi<<8)|data_lo)); //Store to DPTR
}
//MOV bit addr, C /* 1: 1001 0010 */
OPHANDLER( mov_bitaddr_c )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- BIT_W(addr,GET_CY); //Store Carry Flag to Bit Address
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ BIT_W(addr,GET_CY); //Store Carry Flag to Bit Address
}
//MOV @R0/@R1, data addr /* 1: 1010 011i */
OPHANDLER( mov_ir_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- IRAM_IW(R_REG(r),IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ IRAM_IW(R_REG(r),IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
}
//MOV R0 to R7, data addr /* 1: 1010 1rrr */
OPHANDLER( mov_r_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- SET_REG(r, IRAM_R(addr)); //Store to R0 - R7
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ SET_REG(r, IRAM_R(addr)); //Store to R0 - R7
}
//MOV data addr, A /* 1: 1111 0101 */
OPHANDLER( mov_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- IRAM_W(addr,ACC); //Store A to data address
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ IRAM_W(addr,ACC); //Store A to data address
}
//MOV @R0/@R1, A /* 1: 1111 011i */
OPHANDLER( mov_ir_a )
{
- IRAM_IW(R_REG(r),ACC); //Store A to location pointed to by R0 or R1
+ IRAM_IW(R_REG(r),ACC); //Store A to location pointed to by R0 or R1
}
//MOV R0 to R7, A /* 1: 1111 1rrr */
OPHANDLER( mov_r_a )
{
- SET_REG(r, ACC); //Store A to R0-R7
+ SET_REG(r, ACC); //Store A to R0-R7
}
//MOVC A, @A + PC /* 1: 1000 0011 */
OPHANDLER( movc_a_iapc )
{
UINT8 data;
- data = CODEMEM_R(ACC+PC); //Move a byte from CODE(Program) Memory and store to ACC
+ data = CODEMEM_R(ACC+PC); //Move a byte from CODE(Program) Memory and store to ACC
SET_ACC(data);
}
//MOV C, bit addr /* 1: 1010 0010 */
OPHANDLER( mov_c_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- SET_CY( (BIT_R(addr)) ); //Store Bit from Bit Address to Carry Flag
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ SET_CY( (BIT_R(addr)) ); //Store Bit from Bit Address to Carry Flag
}
//MOVC A, @A + DPTR /* 1: 1001 0011 */
OPHANDLER( movc_a_iadptr )
{
UINT8 data;
- data = CODEMEM_R(ACC + DPTR); //Move a byte from CODE(Program) Memory and store to ACC
+ data = CODEMEM_R(ACC + DPTR); //Move a byte from CODE(Program) Memory and store to ACC
SET_ACC(data);
}
@@ -641,17 +641,17 @@ OPHANDLER( movx_a_idptr )
{
// UINT8 byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
UINT32 addr = ERAM_ADDR(DPTR, 0xFFFF);
- UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
- SET_ACC(byte); //Store to ACC
+ UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
+ SET_ACC(byte); //Store to ACC
}
//MOVX A, @R0/@R1 /* 1: 1110 001i */
//(Move External Ram 8 bit address to A)
OPHANDLER( movx_a_ir )
{
- UINT32 addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
- UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
- SET_ACC(byte); //Store to ACC
+ UINT32 addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
+ UINT8 byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
+ SET_ACC(byte); //Store to ACC
}
//MOVX @DPTR,A /* 1: 1111 0000 */
@@ -660,7 +660,7 @@ OPHANDLER( movx_idptr_a )
{
// DATAMEM_W(R_DPTR, ACC); //Store ACC to External DATA memory address pointed to by DPTR
UINT32 addr = ERAM_ADDR(DPTR, 0xFFFF);
- DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
+ DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
}
//MOVX @R0/@R1,A /* 1: 1111 001i */
@@ -668,7 +668,7 @@ OPHANDLER( movx_idptr_a )
OPHANDLER( movx_ir_a )
{
UINT32 addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
- DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address
+ DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address
}
//MUL AB /* 1: 1010 0100 */
@@ -679,8 +679,8 @@ OPHANDLER( mul_ab )
B = (UINT8) ((result & 0xFF00) >> 8);
SET_ACC((UINT8)(result & 0x00FF));
//Set flags
- SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
- SET_CY(0); //Carry Flag always cleared
+ SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
+ SET_CY(0); //Carry Flag always cleared
}
//NOP /* 1: 0000 0000 */
@@ -691,84 +691,84 @@ OPHANDLER( nop )
//ORL data addr, A /* 1: 0100 0010 */
OPHANDLER( orl_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,data | ACC); //Set data address value to it's value Logical OR with ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr,data | ACC); //Set data address value to it's value Logical OR with ACC
}
//ORL data addr, #data /* 1: 0100 0011 */
OPHANDLER( orl_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 srcdata = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,srcdata | data); //Set data address value to it's value Logical OR with Data
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ UINT8 srcdata = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr,srcdata | data); //Set data address value to it's value Logical OR with Data
}
//ORL A, #data /* 1: 0100 0100 */
OPHANDLER( orl_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, data addr /* 1: 0100 0101 */
OPHANDLER( orl_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, @RO/@R1 /* 1: 0100 011i */
OPHANDLER( orl_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, RO to R7 /* 1: 0100 1rrr */
OPHANDLER( orl_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ UINT8 data = R_REG(r); //Grab data from R0 - R7
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL C, bit addr /* 1: 0111 0010 */
OPHANDLER( orl_c_bitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
- SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Bit
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Bit
}
//ORL C, /bit addr /* 1: 1010 0000 */
OPHANDLER( orl_c_nbitaddr )
{
int cy = GET_CY;
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- UINT8 bit = BIT_R(addr); //Grab bit data from bit address
- bit = ((~bit)&1); //Complement bit
- SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ UINT8 bit = BIT_R(addr); //Grab bit data from bit address
+ bit = ((~bit)&1); //Complement bit
+ SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
}
//POP data addr /* 1: 1101 0000 */
OPHANDLER( pop )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- IRAM_W(addr, IRAM_IR(SP)); //Store to contents of data addr, data pointed to by Stack - IRAM_IR needed to access upper 128 bytes of stack
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ IRAM_W(addr, IRAM_IR(SP)); //Store to contents of data addr, data pointed to by Stack - IRAM_IR needed to access upper 128 bytes of stack
//IRAM_IW(addr, IRAM_IR(R_SP)); //Store to contents of data addr, data pointed to by Stack - doesn't work, sfr's are not restored this way and it's not an indirect access anyway
- SP = SP-1; //Decrement SP
+ SP = SP-1; //Decrement SP
}
//PUSH data addr /* 1: 1100 0000 */
OPHANDLER( push )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 tmpSP = SP+1; //Grab and Increment Stack Pointer
- SP = tmpSP; // ""
- IRAM_IW(tmpSP, IRAM_R(addr)); //Store to stack contents of data address - IRAM_IW needed to store to upper 128 bytes of stack, however, can't use IRAM_IR because that won't store the sfrs and it's not an indirect access anyway
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 tmpSP = SP+1; //Grab and Increment Stack Pointer
+ SP = tmpSP; // ""
+ IRAM_IW(tmpSP, IRAM_R(addr)); //Store to stack contents of data address - IRAM_IW needed to store to upper 128 bytes of stack, however, can't use IRAM_IR because that won't store the sfrs and it's not an indirect access anyway
}
//RET /* 1: 0010 0010 */
@@ -825,152 +825,152 @@ OPHANDLER( rrc_a )
//SETB C /* 1: 1101 0011 */
OPHANDLER( setb_c )
{
- SET_CY(1); //Set Carry Flag
+ SET_CY(1); //Set Carry Flag
}
//SETB bit addr /* 1: 1101 0010 */
OPHANDLER( setb_bitaddr )
{
- UINT8 addr = ROP_ARG(PC++); //Grab bit address
- BIT_W(addr,1); //Set Bit at Bit Address
+ UINT8 addr = ROP_ARG(PC++); //Grab bit address
+ BIT_W(addr,1); //Set Bit at Bit Address
}
//SJMP code addr /* 1: 1000 0000 */
OPHANDLER( sjmp )
{
- INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
- PC = PC + rel_addr; //Update PC
+ INT8 rel_addr = ROP_ARG(PC++); //Grab relative code address
+ PC = PC + rel_addr; //Update PC
}
//SUBB A, #data /* 1: 1001 0100 */
OPHANDLER( subb_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SUBB A, data addr /* 1: 1001 0101 */
OPHANDLER( subb_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SUBB A, @R0/@R1 /* 1: 1001 011i */
OPHANDLER( subb_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SUBB A, R0 to R7 /* 1: 1001 1rrr */
OPHANDLER( subb_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
- SET_ACC(result); //Store 8 bit result of addtion in ACC
+ UINT8 data = R_REG(r); //Grab data from R0 - R7
+ UINT8 result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SWAP A /* 1: 1100 0100 */
OPHANDLER( swap_a )
{
UINT8 a_nib_lo, a_nib_hi;
- a_nib_hi = (ACC & 0x0f) << 4; //Grab lo byte of ACC and move to hi
- a_nib_lo = (ACC & 0xf0) >> 4; //Grab hi byte of ACC and move to lo
+ a_nib_hi = (ACC & 0x0f) << 4; //Grab lo byte of ACC and move to hi
+ a_nib_lo = (ACC & 0xf0) >> 4; //Grab hi byte of ACC and move to lo
SET_ACC( a_nib_hi | a_nib_lo);
}
//XCH A, data addr /* 1: 1100 0101 */
OPHANDLER( xch_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data
- UINT8 oldACC = ACC; //Hold value of ACC
- SET_ACC(data); //Sets ACC to data
- IRAM_W(addr,oldACC); //Sets data address to old value of ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data
+ UINT8 oldACC = ACC; //Hold value of ACC
+ SET_ACC(data); //Sets ACC to data
+ IRAM_W(addr,oldACC); //Sets data address to old value of ACC
}
//XCH A, @RO/@R1 /* 1: 1100 011i */
OPHANDLER( xch_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
- UINT8 oldACC = ACC; //Hold value of ACC
- SET_ACC(data); //Sets ACC to data
- IRAM_W(R_REG(r),oldACC); //Sets data address to old value of ACC
+ UINT8 data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
+ UINT8 oldACC = ACC; //Hold value of ACC
+ SET_ACC(data); //Sets ACC to data
+ IRAM_W(R_REG(r),oldACC); //Sets data address to old value of ACC
}
//XCH A, RO to R7 /* 1: 1100 1rrr */
OPHANDLER( xch_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0-R7
- UINT8 oldACC = ACC; //Hold value of ACC
- SET_ACC(data); //Sets ACC to data
- SET_REG(r, oldACC); //Sets data address to old value of ACC
+ UINT8 data = R_REG(r); //Grab data from R0-R7
+ UINT8 oldACC = ACC; //Hold value of ACC
+ SET_ACC(data); //Sets ACC to data
+ SET_REG(r, oldACC); //Sets data address to old value of ACC
}
//XCHD A, @R0/@R1 /* 1: 1101 011i */
OPHANDLER( xchd_a_ir )
{
UINT8 acc, ir_data;
- ir_data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
- acc = ACC; //Grab ACC value
- SET_ACC( (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
- IRAM_W(R_REG(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
+ ir_data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
+ acc = ACC; //Grab ACC value
+ SET_ACC( (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
+ IRAM_W(R_REG(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
}
//XRL data addr, A /* 1: 0110 0010 */
OPHANDLER( xrl_mem_a )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,data ^ ACC); //Set data address value to it's value Logical XOR with ACC
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr,data ^ ACC); //Set data address value to it's value Logical XOR with ACC
}
//XRL data addr, #data /* 1: 0110 0011 */
OPHANDLER( xrl_mem_byte )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = ROP_ARG(PC++); //Grab data
- UINT8 srcdata = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,srcdata ^ data); //Set data address value to it's value Logical XOR with Data
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ UINT8 srcdata = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr,srcdata ^ data); //Set data address value to it's value Logical XOR with Data
}
//XRL A, #data /* 1: 0110 0100 */
OPHANDLER( xrl_a_byte )
{
- UINT8 data = ROP_ARG(PC++); //Grab data
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ UINT8 data = ROP_ARG(PC++); //Grab data
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, data addr /* 1: 0110 0101 */
OPHANDLER( xrl_a_mem )
{
- UINT8 addr = ROP_ARG(PC++); //Grab data address
- UINT8 data = IRAM_R(addr); //Grab data from data address
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ UINT8 addr = ROP_ARG(PC++); //Grab data address
+ UINT8 data = IRAM_R(addr); //Grab data from data address
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, @R0/@R1 /* 1: 0110 011i */
OPHANDLER( xrl_a_ir )
{
- UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ UINT8 data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, R0 to R7 /* 1: 0110 1rrr */
OPHANDLER( xrl_a_r )
{
- UINT8 data = R_REG(r); //Grab data from R0 - R7
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ UINT8 data = R_REG(r); //Grab data from R0 - R7
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//illegal opcodes
diff --git a/src/emu/cpu/mcs96/i8x9x.c b/src/emu/cpu/mcs96/i8x9x.c
index 74921d2aa34..d5098086019 100644
--- a/src/emu/cpu/mcs96/i8x9x.c
+++ b/src/emu/cpu/mcs96/i8x9x.c
@@ -305,7 +305,7 @@ void i8x9x_device::serial_w(UINT8 val)
UINT16 i8x9x_device::timer_value(int timer, UINT64 current_time) const
{
if(timer == 2)
- current_time -= base_timer2;
+ current_time -= base_timer2;
return current_time >> 3;
}
@@ -346,10 +346,10 @@ void i8x9x_device::internal_update(UINT64 current_time)
UINT8 cmd = hso_info[i].command;
UINT16 t = hso_info[i].time;
if(((cmd & 0x40) && t == current_timer2) ||
- (!(cmd & 0x40) && t == current_timer1)) {
+ (!(cmd & 0x40) && t == current_timer1)) {
if(cmd != 0x18 && cmd != 0x19)
logerror("%s: hso cam %02x %04x in slot %d triggered\n",
- tag(), cmd, t, i);
+ tag(), cmd, t, i);
trigger_cam(i, current_time);
}
}
diff --git a/src/emu/cpu/mcs96/i8xc196.h b/src/emu/cpu/mcs96/i8xc196.h
index 7a7fcd2b77d..082a87c3e8a 100644
--- a/src/emu/cpu/mcs96/i8xc196.h
+++ b/src/emu/cpu/mcs96/i8xc196.h
@@ -52,7 +52,7 @@ public:
virtual void do_exec_full();
virtual void do_exec_partial();
- virtual void next(int cycles);
+ virtual void next(int cycles);
virtual void io_w8(UINT8 adr, UINT8 data);
virtual void io_w16(UINT8 adr, UINT16 data);
virtual UINT8 io_r8(UINT8 adr);
diff --git a/src/emu/cpu/mcs96/mcs96.c b/src/emu/cpu/mcs96/mcs96.c
index 224cd944e27..d63e01fc428 100644
--- a/src/emu/cpu/mcs96/mcs96.c
+++ b/src/emu/cpu/mcs96/mcs96.c
@@ -65,7 +65,7 @@ void mcs96_device::device_start()
sprintf(buf, "R%02x", i*2+0x18);
state_add(MCS96_R+i, buf, R[i]);
}
-
+
memset(R, 0, sizeof(R));
}
@@ -162,22 +162,22 @@ void mcs96_device::state_string_export(const device_state_entry &entry, astring
switch(entry.index()) {
case STATE_GENFLAGS:
case MCS96_PSW:
- string.printf("%c%c%c%c%c%c%c %c%c%c%c%c%c%c%c",
- PSW & F_Z ? 'Z' : '.',
- PSW & F_N ? 'N' : '.',
- PSW & F_V ? 'V' : '.',
- PSW & F_VT ? 'v' : '.',
- PSW & F_C ? 'C' : '.',
- PSW & F_I ? 'I' : '.',
- PSW & F_ST ? 'S' : '.',
- PSW & 0x80 ? '7' : '.',
- PSW & 0x40 ? '6' : '.',
- PSW & 0x20 ? '5' : '.',
- PSW & 0x10 ? '4' : '.',
- PSW & 0x08 ? '3' : '.',
- PSW & 0x04 ? '2' : '.',
- PSW & 0x02 ? '1' : '.',
- PSW & 0x01 ? '0' : '.');
+ string.printf("%c%c%c%c%c%c%c %c%c%c%c%c%c%c%c",
+ PSW & F_Z ? 'Z' : '.',
+ PSW & F_N ? 'N' : '.',
+ PSW & F_V ? 'V' : '.',
+ PSW & F_VT ? 'v' : '.',
+ PSW & F_C ? 'C' : '.',
+ PSW & F_I ? 'I' : '.',
+ PSW & F_ST ? 'S' : '.',
+ PSW & 0x80 ? '7' : '.',
+ PSW & 0x40 ? '6' : '.',
+ PSW & 0x20 ? '5' : '.',
+ PSW & 0x10 ? '4' : '.',
+ PSW & 0x08 ? '3' : '.',
+ PSW & 0x04 ? '2' : '.',
+ PSW & 0x02 ? '1' : '.',
+ PSW & 0x01 ? '0' : '.');
break;
}
}
diff --git a/src/emu/cpu/mcs96/mcs96.h b/src/emu/cpu/mcs96/mcs96.h
index 570a48f78a7..f4f6bb23408 100644
--- a/src/emu/cpu/mcs96/mcs96.h
+++ b/src/emu/cpu/mcs96/mcs96.h
@@ -69,29 +69,29 @@ protected:
};
enum {
- DASM_none, /* No parameters */
- DASM_nop_2, /* One ignored parameter byte */
- DASM_rel8, /* Relative, 8 bits */
- DASM_rel11, /* Relative, 11 bits */
- DASM_rel16, /* Relative, 16 bits */
- DASM_rrel8, /* Register + relative, 8 bits */
- DASM_brrel8, /* Bit test + register + relative, 8 bits */
- DASM_direct_1, /* Register-direct references, 1 operator */
- DASM_direct_2, /* Register-direct references, 2 operators */
- DASM_direct_3, /* Register-direct references, 3 operators */
- DASM_immed_1b, /* Immediate references to byte, 1 operator */
- DASM_immed_2b, /* Immediate references to byte, 2 operators */
- DASM_immed_3b, /* Immediate references to byte, 3 operators */
- DASM_immed_1w, /* Immediate references to word, 1 operator */
- DASM_immed_2w, /* Immediate references to word, 2 operators */
- DASM_immed_3w, /* Immediate references to word, 3 operators */
- DASM_indirect_1n, /* Indirect normal, 1 operator */
- DASM_indirect_1, /* Indirect, normal or auto-incrementing, 1 operator */
- DASM_indirect_2, /* Indirect, normal or auto-incrementing, 2 operators */
- DASM_indirect_3, /* Indirect, normal or auto-incrementing, 3 operators */
- DASM_indexed_1, /* Indexed, short or long, 1 operator */
- DASM_indexed_2, /* Indexed, short or long, 2 operators */
- DASM_indexed_3, /* Indexed, short or long, 3 operators */
+ DASM_none, /* No parameters */
+ DASM_nop_2, /* One ignored parameter byte */
+ DASM_rel8, /* Relative, 8 bits */
+ DASM_rel11, /* Relative, 11 bits */
+ DASM_rel16, /* Relative, 16 bits */
+ DASM_rrel8, /* Register + relative, 8 bits */
+ DASM_brrel8, /* Bit test + register + relative, 8 bits */
+ DASM_direct_1, /* Register-direct references, 1 operator */
+ DASM_direct_2, /* Register-direct references, 2 operators */
+ DASM_direct_3, /* Register-direct references, 3 operators */
+ DASM_immed_1b, /* Immediate references to byte, 1 operator */
+ DASM_immed_2b, /* Immediate references to byte, 2 operators */
+ DASM_immed_3b, /* Immediate references to byte, 3 operators */
+ DASM_immed_1w, /* Immediate references to word, 1 operator */
+ DASM_immed_2w, /* Immediate references to word, 2 operators */
+ DASM_immed_3w, /* Immediate references to word, 3 operators */
+ DASM_indirect_1n, /* Indirect normal, 1 operator */
+ DASM_indirect_1, /* Indirect, normal or auto-incrementing, 1 operator */
+ DASM_indirect_2, /* Indirect, normal or auto-incrementing, 2 operators */
+ DASM_indirect_3, /* Indirect, normal or auto-incrementing, 3 operators */
+ DASM_indexed_1, /* Indexed, short or long, 1 operator */
+ DASM_indexed_2, /* Indexed, short or long, 2 operators */
+ DASM_indexed_3, /* Indexed, short or long, 3 operators */
};
// device-level overrides
diff --git a/src/emu/cpu/mcs96/mcs96ops.lst b/src/emu/cpu/mcs96/mcs96ops.lst
index 0eefa2e2d92..02b1c331a05 100644
--- a/src/emu/cpu/mcs96/mcs96ops.lst
+++ b/src/emu/cpu/mcs96/mcs96ops.lst
@@ -1496,7 +1496,7 @@ c0 st direct_2
next(4);
c1 bmov direct_2 196
-
+
c2 st indirect_2
any_w16(OP1, reg_r16(OP2));
post_indirect 2 7 8 // +4 when external
diff --git a/src/emu/cpu/minx/minx.c b/src/emu/cpu/minx/minx.c
index 52de6cdc71f..14e0e5dc644 100644
--- a/src/emu/cpu/minx/minx.c
+++ b/src/emu/cpu/minx/minx.c
@@ -67,31 +67,31 @@ TODO:
struct minx_state {
// MINX_CONFIG config;
- UINT16 PC;
- UINT16 SP;
- UINT16 BA;
- UINT16 HL;
- UINT16 X;
- UINT16 Y;
- UINT8 U;
- UINT8 V;
- UINT8 F;
- UINT8 E;
- UINT8 N;
- UINT8 I;
- UINT8 XI;
- UINT8 YI;
- UINT8 halted;
- UINT8 interrupt_pending;
+ UINT16 PC;
+ UINT16 SP;
+ UINT16 BA;
+ UINT16 HL;
+ UINT16 X;
+ UINT16 Y;
+ UINT8 U;
+ UINT8 V;
+ UINT8 F;
+ UINT8 E;
+ UINT8 N;
+ UINT8 I;
+ UINT8 XI;
+ UINT8 YI;
+ UINT8 halted;
+ UINT8 interrupt_pending;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
int icount;
};
-#define RD(offset) minx->program->read_byte( offset )
-#define WR(offset,data) minx->program->write_byte( offset, data )
-#define GET_MINX_PC ( ( minx->PC & 0x8000 ) ? ( minx->V << 15 ) | (minx->PC & 0x7FFF ) : minx->PC )
+#define RD(offset) minx->program->read_byte( offset )
+#define WR(offset,data) minx->program->write_byte( offset, data )
+#define GET_MINX_PC ( ( minx->PC & 0x8000 ) ? ( minx->V << 15 ) | (minx->PC & 0x7FFF ) : minx->PC )
INLINE minx_state *get_safe_token(device_t *device)
{
@@ -170,7 +170,7 @@ INLINE UINT16 rdop16( minx_state *minx )
static CPU_EXECUTE( minx )
{
// UINT32 oldpc;
- UINT8 op;
+ UINT8 op;
minx_state *minx = get_safe_token(device);
do
@@ -192,7 +192,7 @@ static CPU_EXECUTE( minx )
minx->F |= 0x80;
minx->V = 0;
minx->PC = rd16( minx, minx->irq_callback( minx->device, 0 ) << 1 );
- minx->icount -= 28; /* This cycle count is a guess */
+ minx->icount -= 28; /* This cycle count is a guess */
}
}
@@ -221,22 +221,22 @@ static unsigned minx_get_reg( minx_state *minx, int regnum )
{
switch( regnum )
{
- case STATE_GENPC: return GET_MINX_PC;
- case MINX_PC: return minx->PC;
+ case STATE_GENPC: return GET_MINX_PC;
+ case MINX_PC: return minx->PC;
case STATE_GENSP:
- case MINX_SP: return minx->SP;
- case MINX_BA: return minx->BA;
- case MINX_HL: return minx->HL;
- case MINX_X: return minx->X;
- case MINX_Y: return minx->Y;
- case MINX_U: return minx->U;
- case MINX_V: return minx->V;
- case MINX_F: return minx->F;
- case MINX_E: return minx->E;
- case MINX_N: return minx->N;
- case MINX_I: return minx->I;
- case MINX_XI: return minx->XI;
- case MINX_YI: return minx->YI;
+ case MINX_SP: return minx->SP;
+ case MINX_BA: return minx->BA;
+ case MINX_HL: return minx->HL;
+ case MINX_X: return minx->X;
+ case MINX_Y: return minx->Y;
+ case MINX_U: return minx->U;
+ case MINX_V: return minx->V;
+ case MINX_F: return minx->F;
+ case MINX_E: return minx->E;
+ case MINX_N: return minx->N;
+ case MINX_I: return minx->I;
+ case MINX_XI: return minx->XI;
+ case MINX_YI: return minx->YI;
}
return 0;
}
@@ -246,22 +246,22 @@ static void minx_set_reg( minx_state *minx, int regnum, unsigned val )
{
switch( regnum )
{
- case STATE_GENPC: break;
- case MINX_PC: minx->PC = val; break;
+ case STATE_GENPC: break;
+ case MINX_PC: minx->PC = val; break;
case STATE_GENSP:
- case MINX_SP: minx->SP = val; break;
- case MINX_BA: minx->BA = val; break;
- case MINX_HL: minx->HL = val; break;
- case MINX_X: minx->X = val; break;
- case MINX_Y: minx->Y = val; break;
- case MINX_U: minx->U = val; break;
- case MINX_V: minx->V = val; break;
- case MINX_F: minx->F = val; break;
- case MINX_E: minx->E = val; break;
- case MINX_N: minx->N = val; break;
- case MINX_I: minx->I = val; break;
- case MINX_XI: minx->XI = val; break;
- case MINX_YI: minx->YI = val; break;
+ case MINX_SP: minx->SP = val; break;
+ case MINX_BA: minx->BA = val; break;
+ case MINX_HL: minx->HL = val; break;
+ case MINX_X: minx->X = val; break;
+ case MINX_Y: minx->Y = val; break;
+ case MINX_U: minx->U = val; break;
+ case MINX_V: minx->V = val; break;
+ case MINX_F: minx->F = val; break;
+ case MINX_E: minx->E = val; break;
+ case MINX_N: minx->N = val; break;
+ case MINX_I: minx->I = val; break;
+ case MINX_XI: minx->XI = val; break;
+ case MINX_YI: minx->YI = val; break;
}
}
@@ -311,27 +311,27 @@ CPU_GET_INFO( minx )
minx_state *minx = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
switch( state )
{
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(minx_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0x00; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
- case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; break;
- case CPUINFO_INT_REGISTER + STATE_GENPC: info->i = GET_MINX_PC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(minx_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0x00; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = 0; break;
+ case CPUINFO_INT_REGISTER + STATE_GENPC: info->i = GET_MINX_PC; break;
case CPUINFO_INT_REGISTER + STATE_GENSP:
case CPUINFO_INT_REGISTER + MINX_PC:
case CPUINFO_INT_REGISTER + MINX_SP:
@@ -346,21 +346,21 @@ CPU_GET_INFO( minx )
case CPUINFO_INT_REGISTER + MINX_N:
case CPUINFO_INT_REGISTER + MINX_I:
case CPUINFO_INT_REGISTER + MINX_XI:
- case CPUINFO_INT_REGISTER + MINX_YI: info->i = minx_get_reg( minx, state - CPUINFO_INT_REGISTER ); break;
- case CPUINFO_INT_PREVIOUSPC: info->i = 0x0000; break;
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(minx); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(minx); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(minx); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(minx); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(minx); break;
- case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(minx); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(minx); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &minx->icount; break;
- case CPUINFO_STR_NAME: strcpy( info->s, "Minx" ); break;
- case CPUINFO_STR_FAMILY: strcpy( info->s, "Nintendo Minx" ); break;
- case CPUINFO_STR_VERSION: strcpy( info->s, "0.1" ); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
- case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright The MESS Team." ); break;
+ case CPUINFO_INT_REGISTER + MINX_YI: info->i = minx_get_reg( minx, state - CPUINFO_INT_REGISTER ); break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0x0000; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(minx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(minx); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(minx); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(minx); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(minx); break;
+ case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(minx); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(minx); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &minx->icount; break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "Minx" ); break;
+ case CPUINFO_STR_FAMILY: strcpy( info->s, "Nintendo Minx" ); break;
+ case CPUINFO_STR_VERSION: strcpy( info->s, "0.1" ); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
+ case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright The MESS Team." ); break;
case CPUINFO_STR_FLAGS:
sprintf( info->s, "%c%c%c%c%c%c%c%c-%c%c%c%c%c",
minx->F & FLAG_I ? 'I' : '.',
@@ -377,20 +377,20 @@ CPU_GET_INFO( minx )
minx->E & EXEC_DZ ? 'z' : '.',
minx->E & EXEC_EN ? 'E' : '.' );
break;
- case CPUINFO_STR_REGISTER + MINX_PC: sprintf( info->s, "PC:%04X", minx->PC ); break;
- case CPUINFO_STR_REGISTER + MINX_SP: sprintf( info->s, "SP:%04X", minx->SP ); break;
- case CPUINFO_STR_REGISTER + MINX_BA: sprintf( info->s, "BA:%04X", minx->BA ); break;
- case CPUINFO_STR_REGISTER + MINX_HL: sprintf( info->s, "HL:%04X", minx->HL ); break;
- case CPUINFO_STR_REGISTER + MINX_X: sprintf( info->s, "X:%04X", minx->X ); break;
- case CPUINFO_STR_REGISTER + MINX_Y: sprintf( info->s, "Y:%04X", minx->Y ); break;
- case CPUINFO_STR_REGISTER + MINX_U: sprintf( info->s, "U:%02X", minx->U ); break;
- case CPUINFO_STR_REGISTER + MINX_V: sprintf( info->s, "V:%02X", minx->V ); break;
- case CPUINFO_STR_REGISTER + MINX_F: sprintf( info->s, "F:%02X", minx->F ); break;
- case CPUINFO_STR_REGISTER + MINX_E: sprintf( info->s, "E:%02X", minx->E ); break;
- case CPUINFO_STR_REGISTER + MINX_N: sprintf( info->s, "N:%02X", minx->N ); break;
- case CPUINFO_STR_REGISTER + MINX_I: sprintf( info->s, "I:%02X", minx->I ); break;
- case CPUINFO_STR_REGISTER + MINX_XI: sprintf( info->s, "XI:%02X", minx->XI ); break;
- case CPUINFO_STR_REGISTER + MINX_YI: sprintf( info->s, "YI:%02X", minx->YI ); break;
+ case CPUINFO_STR_REGISTER + MINX_PC: sprintf( info->s, "PC:%04X", minx->PC ); break;
+ case CPUINFO_STR_REGISTER + MINX_SP: sprintf( info->s, "SP:%04X", minx->SP ); break;
+ case CPUINFO_STR_REGISTER + MINX_BA: sprintf( info->s, "BA:%04X", minx->BA ); break;
+ case CPUINFO_STR_REGISTER + MINX_HL: sprintf( info->s, "HL:%04X", minx->HL ); break;
+ case CPUINFO_STR_REGISTER + MINX_X: sprintf( info->s, "X:%04X", minx->X ); break;
+ case CPUINFO_STR_REGISTER + MINX_Y: sprintf( info->s, "Y:%04X", minx->Y ); break;
+ case CPUINFO_STR_REGISTER + MINX_U: sprintf( info->s, "U:%02X", minx->U ); break;
+ case CPUINFO_STR_REGISTER + MINX_V: sprintf( info->s, "V:%02X", minx->V ); break;
+ case CPUINFO_STR_REGISTER + MINX_F: sprintf( info->s, "F:%02X", minx->F ); break;
+ case CPUINFO_STR_REGISTER + MINX_E: sprintf( info->s, "E:%02X", minx->E ); break;
+ case CPUINFO_STR_REGISTER + MINX_N: sprintf( info->s, "N:%02X", minx->N ); break;
+ case CPUINFO_STR_REGISTER + MINX_I: sprintf( info->s, "I:%02X", minx->I ); break;
+ case CPUINFO_STR_REGISTER + MINX_XI: sprintf( info->s, "XI:%02X", minx->XI ); break;
+ case CPUINFO_STR_REGISTER + MINX_YI: sprintf( info->s, "YI:%02X", minx->YI ); break;
}
}
diff --git a/src/emu/cpu/minx/minx.h b/src/emu/cpu/minx/minx.h
index 5604c8cb055..16181d557c1 100644
--- a/src/emu/cpu/minx/minx.h
+++ b/src/emu/cpu/minx/minx.h
@@ -6,9 +6,9 @@
enum
{
- MINX_PC=1, MINX_SP, MINX_BA, MINX_HL, MINX_X, MINX_Y,
- MINX_U, MINX_V, MINX_F, MINX_E, MINX_N, MINX_I,
- MINX_XI, MINX_YI,
+ MINX_PC=1, MINX_SP, MINX_BA, MINX_HL, MINX_X, MINX_Y,
+ MINX_U, MINX_V, MINX_F, MINX_E, MINX_N, MINX_I,
+ MINX_XI, MINX_YI,
};
DECLARE_LEGACY_CPU_DEVICE(MINX, minx);
diff --git a/src/emu/cpu/minx/minxd.c b/src/emu/cpu/minx/minxd.c
index 305d3d55614..ebcaf789531 100644
--- a/src/emu/cpu/minx/minxd.c
+++ b/src/emu/cpu/minx/minxd.c
@@ -24,39 +24,39 @@ enum e_mnemonic {
};
enum e_operand {
- R_A=1, /* A */
- R_B, /* B */
- R_L, /* L */
- R_H, /* H */
- R_N, /* N */
- R_F, /* F */
- R_SP, /* SP */
- R_BA, /* BA */
- R_HL, /* HL */
- R_X, /* X */
- R_Y, /* Y */
- R_U, /* U */
- R_V, /* V */
- R_I, /* I */
- R_XI, /* XI */
- R_YI, /* YI */
- R_PC, /* PC */
- I_8, /* 8 bit immediate */
- I_16, /* 16 bit immediate */
- D_8, /* PC + 8 bit displacement (signed) */
- D_16, /* PC + 16 bit displacement */
- S_8, /* SP + 8 bit displacement (signed) */
- M_IHL, /* [I+HL] */
- M_N8, /* [I+N+ofs8] */
- M_I16, /* [I+ofs16] */
- M_X, /* [X] */
- M_Y, /* [Y] */
- M_X8, /* [X + 8 bit displacement (signed)] */
- M_Y8, /* [Y + 8 bit displacement (signed)] */
- M_XL, /* [X + L (signed)] */
- M_YL, /* [Y + L (signed)] */
- M_16, /* [16bit] */
- M_HL, /* [HL] */
+ R_A=1, /* A */
+ R_B, /* B */
+ R_L, /* L */
+ R_H, /* H */
+ R_N, /* N */
+ R_F, /* F */
+ R_SP, /* SP */
+ R_BA, /* BA */
+ R_HL, /* HL */
+ R_X, /* X */
+ R_Y, /* Y */
+ R_U, /* U */
+ R_V, /* V */
+ R_I, /* I */
+ R_XI, /* XI */
+ R_YI, /* YI */
+ R_PC, /* PC */
+ I_8, /* 8 bit immediate */
+ I_16, /* 16 bit immediate */
+ D_8, /* PC + 8 bit displacement (signed) */
+ D_16, /* PC + 16 bit displacement */
+ S_8, /* SP + 8 bit displacement (signed) */
+ M_IHL, /* [I+HL] */
+ M_N8, /* [I+N+ofs8] */
+ M_I16, /* [I+ofs16] */
+ M_X, /* [X] */
+ M_Y, /* [Y] */
+ M_X8, /* [X + 8 bit displacement (signed)] */
+ M_Y8, /* [Y + 8 bit displacement (signed)] */
+ M_XL, /* [X + L (signed)] */
+ M_YL, /* [Y + L (signed)] */
+ M_16, /* [16bit] */
+ M_HL, /* [HL] */
OP, OP1
};
@@ -92,9 +92,9 @@ static const UINT32 s_flags[] = {
};
struct minxdasm {
- UINT8 mnemonic;
- UINT8 argument1;
- UINT8 argument2;
+ UINT8 mnemonic;
+ UINT8 argument1;
+ UINT8 argument2;
};
static const minxdasm mnemonic[256] = {
@@ -346,76 +346,76 @@ static const minxdasm mnemonic_cf[256] = {
{zDB,OP1,OP}, {zDB,OP1,OP}, {zMOV,R_Y,R_SP}, {zDB,OP1,OP}
};
-#define HANDLE_ARGUMENT \
-case R_A: dst += sprintf( dst, "%cA", fill ); break; \
-case R_B: dst += sprintf( dst, "%cB", fill ); break; \
-case R_L: dst += sprintf( dst, "%cL", fill ); break; \
-case R_H: dst += sprintf( dst, "%cH", fill ); break; \
-case R_N: dst += sprintf( dst, "%cN", fill ); break; \
-case R_F: dst += sprintf( dst, "%cF", fill ); break; \
-case R_SP: dst += sprintf( dst, "%cSP", fill ); break; \
-case R_BA: dst += sprintf( dst, "%cBA", fill ); break; \
-case R_HL: dst += sprintf( dst, "%cHL", fill ); break; \
-case R_X: dst += sprintf( dst, "%cX", fill ); break; \
-case R_Y: dst += sprintf( dst, "%cY", fill ); break; \
-case R_U: dst += sprintf( dst, "%cU", fill ); break; \
-case R_V: dst += sprintf( dst, "%cV", fill ); break; \
-case R_I: dst += sprintf( dst, "%cI", fill ); break; \
-case R_XI: dst += sprintf( dst, "%cXI", fill ); break; \
-case R_YI: dst += sprintf( dst, "%cYI", fill ); break; \
-case R_PC: dst += sprintf( dst, "%cPC", fill ); break; \
-case I_8: /* 8 bit immediate */ \
- ea = oprom[pos++]; \
- dst += sprintf( dst, "%c$%02X", fill, ea ); \
- break; \
-case I_16: /* 16 bit immediate */ \
- ea = oprom[pos++]; \
- ea += oprom[pos++] << 8; \
- dst += sprintf( dst, "%c$%04X", fill, ea ); \
- break; \
-case D_8: /* PC + 8 bit displacement (signed) */ \
- ofs8 = oprom[pos++]; \
- dst += sprintf( dst, "%c$%04X", fill, pc + pos - 1 + ofs8 ); \
- break; \
-case D_16: /* PC + 16 bit displacement */ \
- ea = oprom[pos++]; \
- ea += oprom[pos++] << 8; \
- ea = ea - 1; \
- dst += sprintf( dst, "%c$%04X", fill, pc + pos + ea ); \
- break; \
-case S_8: /* SP + 8 bit displacement (signed) */ \
- ea = oprom[pos++]; \
- dst += sprintf( dst, "%cSP+$%02X", fill, ea ); \
- break; \
-case M_IHL: dst += sprintf( dst, "%c[I+HL]", fill ); break; \
-case M_N8: /* [I+N+ofs8] */ \
- ea = oprom[pos++]; \
- dst += sprintf( dst, "%c[I+N+$%02X]", fill, ea ); \
- break; \
-case M_I16: /* [I+ofs16] */ \
- ea = oprom[pos++]; \
- ea += oprom[pos++] << 8; \
- dst += sprintf( dst, "%c[I+$%04X]", fill, ea ); \
- break; \
-case M_X: dst += sprintf( dst, "%c[X]", fill ); break; \
-case M_Y: dst += sprintf( dst, "%c[Y]", fill ); break; \
-case M_X8: /* [X + 8 bit displacement (signed)] */ \
- ea = oprom[pos++]; \
- dst += sprintf( dst, "%c[X+$%02X]", fill, ea ); \
- break; \
-case M_Y8: /* [Y + 8 bit displacement (signed)] */ \
- ea = oprom[pos++]; \
- dst += sprintf( dst, "%c[Y+$%02X]", fill, ea ); \
- break; \
-case M_XL: dst += sprintf( dst, "%c[X+L]", fill ); break; \
-case M_YL: dst += sprintf( dst, "%c[Y+L]", fill ); break; \
-case M_16: /* [16bit] */ \
- ea = oprom[pos++]; \
- ea += oprom[pos++] << 8; \
- dst += sprintf( dst, "%c[$%04X]", fill, ea ); \
- break; \
-case M_HL: dst += sprintf( dst, "%c[HL]", fill ); break; \
-case OP: dst += sprintf( dst, "%c$%02X", fill, op ); break; \
+#define HANDLE_ARGUMENT \
+case R_A: dst += sprintf( dst, "%cA", fill ); break; \
+case R_B: dst += sprintf( dst, "%cB", fill ); break; \
+case R_L: dst += sprintf( dst, "%cL", fill ); break; \
+case R_H: dst += sprintf( dst, "%cH", fill ); break; \
+case R_N: dst += sprintf( dst, "%cN", fill ); break; \
+case R_F: dst += sprintf( dst, "%cF", fill ); break; \
+case R_SP: dst += sprintf( dst, "%cSP", fill ); break; \
+case R_BA: dst += sprintf( dst, "%cBA", fill ); break; \
+case R_HL: dst += sprintf( dst, "%cHL", fill ); break; \
+case R_X: dst += sprintf( dst, "%cX", fill ); break; \
+case R_Y: dst += sprintf( dst, "%cY", fill ); break; \
+case R_U: dst += sprintf( dst, "%cU", fill ); break; \
+case R_V: dst += sprintf( dst, "%cV", fill ); break; \
+case R_I: dst += sprintf( dst, "%cI", fill ); break; \
+case R_XI: dst += sprintf( dst, "%cXI", fill ); break; \
+case R_YI: dst += sprintf( dst, "%cYI", fill ); break; \
+case R_PC: dst += sprintf( dst, "%cPC", fill ); break; \
+case I_8: /* 8 bit immediate */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c$%02X", fill, ea ); \
+ break; \
+case I_16: /* 16 bit immediate */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ dst += sprintf( dst, "%c$%04X", fill, ea ); \
+ break; \
+case D_8: /* PC + 8 bit displacement (signed) */ \
+ ofs8 = oprom[pos++]; \
+ dst += sprintf( dst, "%c$%04X", fill, pc + pos - 1 + ofs8 ); \
+ break; \
+case D_16: /* PC + 16 bit displacement */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ ea = ea - 1; \
+ dst += sprintf( dst, "%c$%04X", fill, pc + pos + ea ); \
+ break; \
+case S_8: /* SP + 8 bit displacement (signed) */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%cSP+$%02X", fill, ea ); \
+ break; \
+case M_IHL: dst += sprintf( dst, "%c[I+HL]", fill ); break; \
+case M_N8: /* [I+N+ofs8] */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c[I+N+$%02X]", fill, ea ); \
+ break; \
+case M_I16: /* [I+ofs16] */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ dst += sprintf( dst, "%c[I+$%04X]", fill, ea ); \
+ break; \
+case M_X: dst += sprintf( dst, "%c[X]", fill ); break; \
+case M_Y: dst += sprintf( dst, "%c[Y]", fill ); break; \
+case M_X8: /* [X + 8 bit displacement (signed)] */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c[X+$%02X]", fill, ea ); \
+ break; \
+case M_Y8: /* [Y + 8 bit displacement (signed)] */ \
+ ea = oprom[pos++]; \
+ dst += sprintf( dst, "%c[Y+$%02X]", fill, ea ); \
+ break; \
+case M_XL: dst += sprintf( dst, "%c[X+L]", fill ); break; \
+case M_YL: dst += sprintf( dst, "%c[Y+L]", fill ); break; \
+case M_16: /* [16bit] */ \
+ ea = oprom[pos++]; \
+ ea += oprom[pos++] << 8; \
+ dst += sprintf( dst, "%c[$%04X]", fill, ea ); \
+ break; \
+case M_HL: dst += sprintf( dst, "%c[HL]", fill ); break; \
+case OP: dst += sprintf( dst, "%c$%02X", fill, op ); break; \
case OP1: dst += sprintf( dst, "%c$%02X", fill, op1 ); break;
CPU_DISASSEMBLE( minx )
@@ -461,7 +461,3 @@ CPU_DISASSEMBLE( minx )
}
return pos | s_flags[instr->mnemonic] | DASMFLAG_SUPPORTED;
}
-
-
-
-
diff --git a/src/emu/cpu/minx/minxfunc.h b/src/emu/cpu/minx/minxfunc.h
index 1716418def1..adae6a4543a 100644
--- a/src/emu/cpu/minx/minxfunc.h
+++ b/src/emu/cpu/minx/minxfunc.h
@@ -26,7 +26,7 @@ INLINE UINT16 ADD16( minx_state *minx, UINT16 arg1, UINT16 arg2 )
INLINE UINT8 ADDC8( minx_state *minx, UINT8 arg1, UINT8 arg2 )
{
- UINT32 res = arg1 + arg2 + ( ( minx->F & FLAG_C ) ? 1 : 0 );
+ UINT32 res = arg1 + arg2 + ( ( minx->F & FLAG_C ) ? 1 : 0 );
minx->F = ( minx->F & ~ ( FLAG_S | FLAG_O | FLAG_C | FLAG_Z ) )
| ( ( res & 0x80 ) ? FLAG_S : 0 )
| ( ( ( arg2 ^ arg1 ^ 0x80 ) & ( arg2 ^ res ) & 0x80 ) ? FLAG_O : 0 )
@@ -342,21 +342,21 @@ INLINE void CALL( minx_state *minx, UINT16 arg )
}
-#define AD1_IHL UINT32 addr1 = ( minx->I << 16 ) | minx->HL
-#define AD1_IN8 UINT32 addr1 = ( minx->I << 16 ) | ( minx->N << 8 ) | rdop(minx)
-#define AD1_I16 UINT32 addr1 = ( minx->I << 16 ) | rdop16(minx)
-#define AD1_XIX UINT32 addr1 = ( minx->XI << 16 ) | minx->X
-#define AD1_YIY UINT32 addr1 = ( minx->YI << 16 ) | minx->Y
-#define AD1_X8 UINT32 addr1 = ( minx->XI << 16 ) | ( minx->X + rdop(minx) )
-#define AD1_Y8 UINT32 addr1 = ( minx->YI << 16 ) | ( minx->Y + rdop(minx) )
-#define AD1_XL UINT32 addr1 = ( minx->XI << 16 ) | ( minx->X + ( minx->HL & 0x00FF ) )
-#define AD1_YL UINT32 addr1 = ( minx->YI << 16 ) | ( minx->Y + ( minx->HL & 0x00FF ) )
-#define AD2_IHL UINT32 addr2 = ( minx->I << 16 ) | minx->HL
-#define AD2_IN8 UINT32 addr2 = ( minx->I << 16 ) | ( minx->N << 8 ) | rdop(minx)
-#define AD2_I16 UINT32 addr2 = ( minx->I << 16 ) | rdop(minx); addr2 |= ( rdop(minx) << 8 )
-#define AD2_XIX UINT32 addr2 = ( minx->XI << 16 ) | minx->X
-#define AD2_YIY UINT32 addr2 = ( minx->YI << 16 ) | minx->Y
-#define AD2_X8 UINT32 addr2 = ( minx->XI << 16 ) | ( minx->X + rdop(minx) )
-#define AD2_Y8 UINT32 addr2 = ( minx->YI << 16 ) | ( minx->Y + rdop(minx) )
-#define AD2_XL UINT32 addr2 = ( minx->XI << 16 ) | ( minx->X + ( minx->HL & 0x00FF ) )
-#define AD2_YL UINT32 addr2 = ( minx->YI << 16 ) | ( minx->Y + ( minx->HL & 0x00FF ) )
+#define AD1_IHL UINT32 addr1 = ( minx->I << 16 ) | minx->HL
+#define AD1_IN8 UINT32 addr1 = ( minx->I << 16 ) | ( minx->N << 8 ) | rdop(minx)
+#define AD1_I16 UINT32 addr1 = ( minx->I << 16 ) | rdop16(minx)
+#define AD1_XIX UINT32 addr1 = ( minx->XI << 16 ) | minx->X
+#define AD1_YIY UINT32 addr1 = ( minx->YI << 16 ) | minx->Y
+#define AD1_X8 UINT32 addr1 = ( minx->XI << 16 ) | ( minx->X + rdop(minx) )
+#define AD1_Y8 UINT32 addr1 = ( minx->YI << 16 ) | ( minx->Y + rdop(minx) )
+#define AD1_XL UINT32 addr1 = ( minx->XI << 16 ) | ( minx->X + ( minx->HL & 0x00FF ) )
+#define AD1_YL UINT32 addr1 = ( minx->YI << 16 ) | ( minx->Y + ( minx->HL & 0x00FF ) )
+#define AD2_IHL UINT32 addr2 = ( minx->I << 16 ) | minx->HL
+#define AD2_IN8 UINT32 addr2 = ( minx->I << 16 ) | ( minx->N << 8 ) | rdop(minx)
+#define AD2_I16 UINT32 addr2 = ( minx->I << 16 ) | rdop(minx); addr2 |= ( rdop(minx) << 8 )
+#define AD2_XIX UINT32 addr2 = ( minx->XI << 16 ) | minx->X
+#define AD2_YIY UINT32 addr2 = ( minx->YI << 16 ) | minx->Y
+#define AD2_X8 UINT32 addr2 = ( minx->XI << 16 ) | ( minx->X + rdop(minx) )
+#define AD2_Y8 UINT32 addr2 = ( minx->YI << 16 ) | ( minx->Y + rdop(minx) )
+#define AD2_XL UINT32 addr2 = ( minx->XI << 16 ) | ( minx->X + ( minx->HL & 0x00FF ) )
+#define AD2_YL UINT32 addr2 = ( minx->YI << 16 ) | ( minx->Y + ( minx->HL & 0x00FF ) )
diff --git a/src/emu/cpu/minx/minxopce.h b/src/emu/cpu/minx/minxopce.h
index 282dccb3fab..705f6f146eb 100644
--- a/src/emu/cpu/minx/minxopce.h
+++ b/src/emu/cpu/minx/minxopce.h
@@ -317,14 +317,14 @@ static const int insnminx_cycles_CE[256] = {
16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
20, 20, 20, 20, 1, 1, 1, 1, 20, 20, 20, 20, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 20, 20, 20, 20, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 20, 20, 20, 20, 1, 1, 1, 1,
12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16,
12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16, 12, 12, 20, 16,
12, 12, 20, 16, 12, 12, 20, 16, 12, 1, 1, 1, 1, 1, 8, 8,
12, 12, 12, 1, 12, 12, 12, 1, 20, 20, 20, 20, 12, 12, 12, 1,
- 8, 8, 8, 12, 16, 12, 12, 12, 8, 8, 8, 8, 12, 8, 8, 8,
+ 8, 8, 8, 12, 16, 12, 12, 12, 8, 8, 8, 8, 12, 8, 8, 8,
20, 20, 20, 20, 20, 20, 20, 20, 48, 52, 1, 1, 1, 1, 1, 1,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12
diff --git a/src/emu/cpu/minx/minxopcf.h b/src/emu/cpu/minx/minxopcf.h
index ed606a2b68f..81781f59550 100644
--- a/src/emu/cpu/minx/minxopcf.h
+++ b/src/emu/cpu/minx/minxopcf.h
@@ -310,22 +310,22 @@ static void (*const insnminx_CF[256])(minx_state *minx) = {
static const int insnminx_cycles_CF[256] = {
16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 16, 16, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 16, 16, 1, 1, 1, 1,
16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
- 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 16, 16, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 16, 16, 1, 1, 1, 1,
16, 16, 16, 16, 16, 16, 1, 1, 16, 16, 16, 16, 16, 16, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 16, 16, 1, 1,
16, 16, 16, 16, 1, 1, 1, 1, 16, 1, 16, 1, 16, 1, 16, 1,
24, 24, 24, 24, 24, 24, 24, 24, 24, 1, 1, 1, 24, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
12, 12, 12, 12, 12, 12, 12, 12, 48, 60, 1, 1, 32, 40, 1, 1,
20, 20, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1,
20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 1, 1, 8, 8, 8, 1, 1, 1, 8, 1
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 1, 1, 8, 8, 8, 1, 1, 1, 8, 1
};
diff --git a/src/emu/cpu/minx/minxops.h b/src/emu/cpu/minx/minxops.h
index fce4bb70652..cf876ff19e6 100644
--- a/src/emu/cpu/minx/minxops.h
+++ b/src/emu/cpu/minx/minxops.h
@@ -309,23 +309,23 @@ static void (*const insnminx[256])(minx_state *minx) = {
};
static const int insnminx_cycles[256] = {
- 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
- 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
- 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
- 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
+ 8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
- 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
- 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
- 8, 8, 8, 8, 16, 12, 12, 12, 8, 8, 8, 8, 16, 12, 12, 12,
- 8, 8, 8, 8, 16, 12, 12, 12, 12, 12, 12, 12, 1, 16, 16, 16,
+ 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
+ 4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
+ 8, 8, 8, 8, 16, 12, 12, 12, 8, 8, 8, 8, 16, 12, 12, 12,
+ 8, 8, 8, 8, 16, 12, 12, 12, 12, 12, 12, 12, 1, 16, 16, 16,
- 8, 8, 8, 8, 8, 16, 12, 8, 8, 8, 8, 8, 8, 16, 12, 8,
- 8, 8, 8, 8, 8, 12, 8, 8, 8, 8, 8, 8, 12, 12, 12, 12,
+ 8, 8, 8, 8, 8, 16, 12, 8, 8, 8, 8, 8, 8, 16, 12, 8,
+ 8, 8, 8, 8, 8, 12, 8, 8, 8, 8, 8, 8, 12, 12, 12, 12,
16, 16, 16, 16, 12, 12, 16, 12, 12, 12, 12, 12, 8, 8, 12, 8,
- 8, 8, 8, 8, 8, 12, 12, 12, 20, 20, 20, 20, 1, 1, 1, 1,
+ 8, 8, 8, 8, 8, 12, 12, 12, 20, 20, 20, 20, 1, 1, 1, 1,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 8, 12, 0, 0,
12, 12, 12, 12, 12, 12, 12, 12, 20, 20, 20, 16, 16, 16, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 12, 12, 12, 12, 12, 12, 12, 12,
+ 8, 8, 8, 8, 8, 8, 8, 8, 12, 12, 12, 12, 12, 12, 12, 12,
20, 8, 24, 12, 8, 1, 8, 12, 8, 8, 8, 20, 20, 1, 1, 8
};
diff --git a/src/emu/cpu/mips/mips3.c b/src/emu/cpu/mips/mips3.c
index 6cd7c08b0b1..b86bc95027c 100644
--- a/src/emu/cpu/mips/mips3.c
+++ b/src/emu/cpu/mips/mips3.c
@@ -15,7 +15,7 @@
#include "mips3com.h"
-#define ENABLE_OVERFLOWS 0
+#define ENABLE_OVERFLOWS 0
#ifndef MIPS3_USE_DRC
@@ -23,61 +23,61 @@
HELPER MACROS
***************************************************************************/
-#define RSVAL32 ((UINT32)mips3.core.r[RSREG])
-#define RTVAL32 ((UINT32)mips3.core.r[RTREG])
-#define RDVAL32 ((UINT32)mips3.core.r[RDREG])
-
-#define RSVAL64 (mips3.core.r[RSREG])
-#define RTVAL64 (mips3.core.r[RTREG])
-#define RDVAL64 (mips3.core.r[RDREG])
-
-#define FRVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FRREG])
-#define FTVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FTREG])
-#define FSVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FSREG])
-#define FDVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FDREG])
-#define FSVALW_FR0 (((UINT32 *)&mips3.core.cpr[1][0])[FSREG])
-#define FDVALW_FR0 (((UINT32 *)&mips3.core.cpr[1][0])[FDREG])
-
-#define FRVALD_FR0 (*(double *)&mips3.core.cpr[1][FRREG/2])
-#define FTVALD_FR0 (*(double *)&mips3.core.cpr[1][FTREG/2])
-#define FSVALD_FR0 (*(double *)&mips3.core.cpr[1][FSREG/2])
-#define FDVALD_FR0 (*(double *)&mips3.core.cpr[1][FDREG/2])
-#define FSVALL_FR0 (((UINT64 *)&mips3.core.cpr[1][0])[FSREG/2])
-#define FDVALL_FR0 (((UINT64 *)&mips3.core.cpr[1][0])[FDREG/2])
-
-#define FRVALS_FR1 (((float *)&mips3.core.cpr[1][FRREG])[BYTE_XOR_LE(0)])
-#define FTVALS_FR1 (((float *)&mips3.core.cpr[1][FTREG])[BYTE_XOR_LE(0)])
-#define FSVALS_FR1 (((float *)&mips3.core.cpr[1][FSREG])[BYTE_XOR_LE(0)])
-#define FDVALS_FR1 (((float *)&mips3.core.cpr[1][FDREG])[BYTE_XOR_LE(0)])
-#define FSVALW_FR1 (((UINT32 *)&mips3.core.cpr[1][FSREG])[BYTE_XOR_LE(0)])
-#define FDVALW_FR1 (((UINT32 *)&mips3.core.cpr[1][FDREG])[BYTE_XOR_LE(0)])
-
-#define FRVALD_FR1 (*(double *)&mips3.core.cpr[1][FRREG])
-#define FTVALD_FR1 (*(double *)&mips3.core.cpr[1][FTREG])
-#define FSVALD_FR1 (*(double *)&mips3.core.cpr[1][FSREG])
-#define FDVALD_FR1 (*(double *)&mips3.core.cpr[1][FDREG])
-#define FSVALL_FR1 (*(UINT64 *)&mips3.core.cpr[1][FSREG])
-#define FDVALL_FR1 (*(UINT64 *)&mips3.core.cpr[1][FDREG])
-
-#define ADDPC(x) mips3.nextpc = mips3.core.pc + ((x) << 2)
-#define ADDPCL(x,l) { mips3.nextpc = mips3.core.pc + ((x) << 2); mips3.core.r[l] = (INT32)(mips3.core.pc + 4); }
-#define ABSPC(x) mips3.nextpc = (mips3.core.pc & 0xf0000000) | ((x) << 2)
-#define ABSPCL(x,l) { mips3.nextpc = (mips3.core.pc & 0xf0000000) | ((x) << 2); mips3.core.r[l] = (INT32)(mips3.core.pc + 4); }
-#define SETPC(x) mips3.nextpc = (x)
-#define SETPCL(x,l) { mips3.nextpc = (x); mips3.core.r[l] = (INT32)(mips3.core.pc + 4); }
-
-#define HIVAL (UINT32)mips3.core.r[REG_HI]
-#define LOVAL (UINT32)mips3.core.r[REG_LO]
-#define HIVAL64 mips3.core.r[REG_HI]
-#define LOVAL64 mips3.core.r[REG_LO]
-#define SR mips3.core.cpr[0][COP0_Status]
-#define CAUSE mips3.core.cpr[0][COP0_Cause]
-
-#define GET_FCC(n) (mips3.cf[1][n])
+#define RSVAL32 ((UINT32)mips3.core.r[RSREG])
+#define RTVAL32 ((UINT32)mips3.core.r[RTREG])
+#define RDVAL32 ((UINT32)mips3.core.r[RDREG])
+
+#define RSVAL64 (mips3.core.r[RSREG])
+#define RTVAL64 (mips3.core.r[RTREG])
+#define RDVAL64 (mips3.core.r[RDREG])
+
+#define FRVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FRREG])
+#define FTVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FTREG])
+#define FSVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FSREG])
+#define FDVALS_FR0 (((float *)&mips3.core.cpr[1][0])[FDREG])
+#define FSVALW_FR0 (((UINT32 *)&mips3.core.cpr[1][0])[FSREG])
+#define FDVALW_FR0 (((UINT32 *)&mips3.core.cpr[1][0])[FDREG])
+
+#define FRVALD_FR0 (*(double *)&mips3.core.cpr[1][FRREG/2])
+#define FTVALD_FR0 (*(double *)&mips3.core.cpr[1][FTREG/2])
+#define FSVALD_FR0 (*(double *)&mips3.core.cpr[1][FSREG/2])
+#define FDVALD_FR0 (*(double *)&mips3.core.cpr[1][FDREG/2])
+#define FSVALL_FR0 (((UINT64 *)&mips3.core.cpr[1][0])[FSREG/2])
+#define FDVALL_FR0 (((UINT64 *)&mips3.core.cpr[1][0])[FDREG/2])
+
+#define FRVALS_FR1 (((float *)&mips3.core.cpr[1][FRREG])[BYTE_XOR_LE(0)])
+#define FTVALS_FR1 (((float *)&mips3.core.cpr[1][FTREG])[BYTE_XOR_LE(0)])
+#define FSVALS_FR1 (((float *)&mips3.core.cpr[1][FSREG])[BYTE_XOR_LE(0)])
+#define FDVALS_FR1 (((float *)&mips3.core.cpr[1][FDREG])[BYTE_XOR_LE(0)])
+#define FSVALW_FR1 (((UINT32 *)&mips3.core.cpr[1][FSREG])[BYTE_XOR_LE(0)])
+#define FDVALW_FR1 (((UINT32 *)&mips3.core.cpr[1][FDREG])[BYTE_XOR_LE(0)])
+
+#define FRVALD_FR1 (*(double *)&mips3.core.cpr[1][FRREG])
+#define FTVALD_FR1 (*(double *)&mips3.core.cpr[1][FTREG])
+#define FSVALD_FR1 (*(double *)&mips3.core.cpr[1][FSREG])
+#define FDVALD_FR1 (*(double *)&mips3.core.cpr[1][FDREG])
+#define FSVALL_FR1 (*(UINT64 *)&mips3.core.cpr[1][FSREG])
+#define FDVALL_FR1 (*(UINT64 *)&mips3.core.cpr[1][FDREG])
+
+#define ADDPC(x) mips3.nextpc = mips3.core.pc + ((x) << 2)
+#define ADDPCL(x,l) { mips3.nextpc = mips3.core.pc + ((x) << 2); mips3.core.r[l] = (INT32)(mips3.core.pc + 4); }
+#define ABSPC(x) mips3.nextpc = (mips3.core.pc & 0xf0000000) | ((x) << 2)
+#define ABSPCL(x,l) { mips3.nextpc = (mips3.core.pc & 0xf0000000) | ((x) << 2); mips3.core.r[l] = (INT32)(mips3.core.pc + 4); }
+#define SETPC(x) mips3.nextpc = (x)
+#define SETPCL(x,l) { mips3.nextpc = (x); mips3.core.r[l] = (INT32)(mips3.core.pc + 4); }
+
+#define HIVAL (UINT32)mips3.core.r[REG_HI]
+#define LOVAL (UINT32)mips3.core.r[REG_LO]
+#define HIVAL64 mips3.core.r[REG_HI]
+#define LOVAL64 mips3.core.r[REG_LO]
+#define SR mips3.core.cpr[0][COP0_Status]
+#define CAUSE mips3.core.cpr[0][COP0_Cause]
+
+#define GET_FCC(n) (mips3.cf[1][n])
#define SET_FCC(n,v) (mips3.cf[1][n] = (v))
-#define IS_FR0 (!(SR & SR_FR))
-#define IS_FR1 (SR & SR_FR)
+#define IS_FR0 (!(SR & SR_FR))
+#define IS_FR1 (SR & SR_FR)
@@ -89,29 +89,29 @@
struct mips3_regs
{
/* core state */
- mips3_state core;
+ mips3_state core;
/* internal stuff */
- UINT32 ppc;
- UINT32 nextpc;
- UINT32 pcbase;
- UINT8 cf[4][8];
- int op;
- int interrupt_cycles;
- UINT32 ll_value;
- UINT64 lld_value;
- UINT32 badcop_value;
+ UINT32 ppc;
+ UINT32 nextpc;
+ UINT32 pcbase;
+ UINT8 cf[4][8];
+ int op;
+ int interrupt_cycles;
+ UINT32 ll_value;
+ UINT64 lld_value;
+ UINT32 badcop_value;
const vtlb_entry *tlb_table;
/* endian-dependent load/store */
- void (*lwl)(UINT32 op);
- void (*lwr)(UINT32 op);
- void (*swl)(UINT32 op);
- void (*swr)(UINT32 op);
- void (*ldl)(UINT32 op);
- void (*ldr)(UINT32 op);
- void (*sdl)(UINT32 op);
- void (*sdr)(UINT32 op);
+ void (*lwl)(UINT32 op);
+ void (*lwr)(UINT32 op);
+ void (*swl)(UINT32 op);
+ void (*swr)(UINT32 op);
+ void (*ldl)(UINT32 op);
+ void (*ldr)(UINT32 op);
+ void (*sdl)(UINT32 op);
+ void (*sdr)(UINT32 op);
};
@@ -156,7 +156,7 @@ static mips3_regs mips3;
MEMORY ACCESSORS
***************************************************************************/
-#define ROPCODE(pc) mips3.core.direct->read_decrypted_dword(pc)
+#define ROPCODE(pc) mips3.core.direct->read_decrypted_dword(pc)
/***************************************************************************
@@ -752,20 +752,20 @@ INLINE void handle_cop0(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop0_reg(RDREG); break;
- case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop0_reg(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop0_creg(RDREG); break;
- case 0x04: /* MTCz */ set_cop0_reg(RDREG, RTVAL32); break;
- case 0x05: /* DMTCz */ set_cop0_reg(RDREG, RTVAL64); break;
- case 0x06: /* CTCz */ set_cop0_creg(RDREG, RTVAL32); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop0_reg(RDREG); break;
+ case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop0_reg(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop0_creg(RDREG); break;
+ case 0x04: /* MTCz */ set_cop0_reg(RDREG, RTVAL32); break;
+ case 0x05: /* DMTCz */ set_cop0_reg(RDREG, RTVAL64); break;
+ case 0x06: /* CTCz */ set_cop0_creg(RDREG, RTVAL32); break;
+ case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!mips3.cf[0]) ADDPC(SIMMVAL); break;
- case 0x01: /* BCzF */ if (mips3.cf[0]) ADDPC(SIMMVAL); break;
- case 0x02: /* BCzFL */ invalid_instruction(op); break;
- case 0x03: /* BCzTL */ invalid_instruction(op); break;
- default: invalid_instruction(op); break;
+ case 0x00: /* BCzF */ if (!mips3.cf[0]) ADDPC(SIMMVAL); break;
+ case 0x01: /* BCzF */ if (mips3.cf[0]) ADDPC(SIMMVAL); break;
+ case 0x02: /* BCzFL */ invalid_instruction(op); break;
+ case 0x03: /* BCzTL */ invalid_instruction(op); break;
+ default: invalid_instruction(op); break;
}
break;
case 0x10:
@@ -783,32 +783,32 @@ INLINE void handle_cop0(UINT32 op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */
+ case 0x1f: /* COP */
switch (op & 0x01ffffff)
{
- case 0x01: /* TLBR */
+ case 0x01: /* TLBR */
mips3com_tlbr(&mips3.core);
break;
- case 0x02: /* TLBWI */
+ case 0x02: /* TLBWI */
mips3com_tlbwi(&mips3.core);
break;
- case 0x06: /* TLBWR */
+ case 0x06: /* TLBWR */
mips3com_tlbwr(&mips3.core);
break;
- case 0x08: /* TLBP */
+ case 0x08: /* TLBP */
mips3com_tlbp(&mips3.core);
break;
- case 0x10: /* RFE */ invalid_instruction(op); break;
- case 0x18: /* ERET */ logerror("ERET\n"); mips3.core.pc = mips3.core.cpr[0][COP0_EPC]; SR &= ~SR_EXL; check_irqs(); mips3.lld_value ^= 0xffffffff; mips3.ll_value ^= 0xffffffff; break;
- case 0x20: /* WAIT */ break;
- default: invalid_instruction(op); break;
+ case 0x10: /* RFE */ invalid_instruction(op); break;
+ case 0x18: /* ERET */ logerror("ERET\n"); mips3.core.pc = mips3.core.cpr[0][COP0_EPC]; SR &= ~SR_EXL; check_irqs(); mips3.lld_value ^= 0xffffffff; mips3.ll_value ^= 0xffffffff; break;
+ case 0x20: /* WAIT */ break;
+ default: invalid_instruction(op); break;
}
break;
- default: invalid_instruction(op); break;
+ default: invalid_instruction(op); break;
}
}
@@ -891,82 +891,82 @@ INLINE void handle_cop1_fr0(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_reg32(RDREG); break;
- case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop1_reg64(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_creg(RDREG); break;
- case 0x04: /* MTCz */ set_cop1_reg32(RDREG, RTVAL32); break;
- case 0x05: /* DMTCz */ set_cop1_reg64(RDREG, RTVAL64); break;
- case 0x06: /* CTCz */ set_cop1_creg(RDREG, RTVAL32); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_reg32(RDREG); break;
+ case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop1_reg64(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_creg(RDREG); break;
+ case 0x04: /* MTCz */ set_cop1_reg32(RDREG, RTVAL32); break;
+ case 0x05: /* DMTCz */ set_cop1_reg64(RDREG, RTVAL64); break;
+ case 0x06: /* CTCz */ set_cop1_creg(RDREG, RTVAL32); break;
+ case 0x08: /* BC */
switch ((op >> 16) & 3)
{
- case 0x00: /* BCzF */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
- case 0x01: /* BCzT */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
- case 0x02: /* BCzFL */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x03: /* BCzTL */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x00: /* BCzF */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
+ case 0x01: /* BCzT */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
+ case 0x02: /* BCzFL */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x03: /* BCzTL */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
}
break;
default:
switch (op & 0x3f)
{
case 0x00:
- if (IS_SINGLE(op)) /* ADD.S */
+ if (IS_SINGLE(op)) /* ADD.S */
FDVALS_FR0 = FSVALS_FR0 + FTVALS_FR0;
- else /* ADD.D */
+ else /* ADD.D */
FDVALD_FR0 = FSVALD_FR0 + FTVALD_FR0;
break;
case 0x01:
- if (IS_SINGLE(op)) /* SUB.S */
+ if (IS_SINGLE(op)) /* SUB.S */
FDVALS_FR0 = FSVALS_FR0 - FTVALS_FR0;
- else /* SUB.D */
+ else /* SUB.D */
FDVALD_FR0 = FSVALD_FR0 - FTVALD_FR0;
break;
case 0x02:
- if (IS_SINGLE(op)) /* MUL.S */
+ if (IS_SINGLE(op)) /* MUL.S */
FDVALS_FR0 = FSVALS_FR0 * FTVALS_FR0;
- else /* MUL.D */
+ else /* MUL.D */
FDVALD_FR0 = FSVALD_FR0 * FTVALD_FR0;
break;
case 0x03:
- if (IS_SINGLE(op)) /* DIV.S */
+ if (IS_SINGLE(op)) /* DIV.S */
FDVALS_FR0 = FSVALS_FR0 / FTVALS_FR0;
- else /* DIV.D */
+ else /* DIV.D */
FDVALD_FR0 = FSVALD_FR0 / FTVALD_FR0;
break;
case 0x04:
- if (IS_SINGLE(op)) /* SQRT.S */
+ if (IS_SINGLE(op)) /* SQRT.S */
FDVALS_FR0 = sqrt(FSVALS_FR0);
- else /* SQRT.D */
+ else /* SQRT.D */
FDVALD_FR0 = sqrt(FSVALD_FR0);
break;
case 0x05:
- if (IS_SINGLE(op)) /* ABS.S */
+ if (IS_SINGLE(op)) /* ABS.S */
FDVALS_FR0 = fabs(FSVALS_FR0);
- else /* ABS.D */
+ else /* ABS.D */
FDVALD_FR0 = fabs(FSVALD_FR0);
break;
case 0x06:
- if (IS_SINGLE(op)) /* MOV.S */
+ if (IS_SINGLE(op)) /* MOV.S */
FDVALS_FR0 = FSVALS_FR0;
- else /* MOV.D */
+ else /* MOV.D */
FDVALD_FR0 = FSVALD_FR0;
break;
case 0x07:
- if (IS_SINGLE(op)) /* NEG.S */
+ if (IS_SINGLE(op)) /* NEG.S */
FDVALS_FR0 = -FSVALS_FR0;
- else /* NEG.D */
+ else /* NEG.D */
FDVALD_FR0 = -FSVALD_FR0;
break;
case 0x08:
- if (IS_SINGLE(op)) /* ROUND.L.S */
+ if (IS_SINGLE(op)) /* ROUND.L.S */
{
double temp = FSVALS_FR0;
if (temp < 0)
@@ -975,7 +975,7 @@ INLINE void handle_cop1_fr0(UINT32 op)
temp = floor(temp + 0.5);
FDVALL_FR0 = (INT64)temp;
}
- else /* ROUND.L.D */
+ else /* ROUND.L.D */
{
double temp = FSVALD_FR0;
if (temp < 0)
@@ -987,7 +987,7 @@ INLINE void handle_cop1_fr0(UINT32 op)
break;
case 0x09:
- if (IS_SINGLE(op)) /* TRUNC.L.S */
+ if (IS_SINGLE(op)) /* TRUNC.L.S */
{
double temp = FSVALS_FR0;
if (temp < 0)
@@ -996,7 +996,7 @@ INLINE void handle_cop1_fr0(UINT32 op)
temp = floor(temp);
FDVALL_FR0 = (INT64)temp;
}
- else /* TRUNC.L.D */
+ else /* TRUNC.L.D */
{
double temp = FSVALD_FR0;
if (temp < 0)
@@ -1008,23 +1008,23 @@ INLINE void handle_cop1_fr0(UINT32 op)
break;
case 0x0a:
- if (IS_SINGLE(op)) /* CEIL.L.S */
+ if (IS_SINGLE(op)) /* CEIL.L.S */
dtemp = ceil(FSVALS_FR0);
- else /* CEIL.L.D */
+ else /* CEIL.L.D */
dtemp = ceil(FSVALD_FR0);
FDVALL_FR0 = (INT64)dtemp;
break;
case 0x0b:
- if (IS_SINGLE(op)) /* FLOOR.L.S */
+ if (IS_SINGLE(op)) /* FLOOR.L.S */
dtemp = floor(FSVALS_FR0);
- else /* FLOOR.L.D */
+ else /* FLOOR.L.D */
dtemp = floor(FSVALD_FR0);
FDVALL_FR0 = (INT64)dtemp;
break;
case 0x0c:
- if (IS_SINGLE(op)) /* ROUND.W.S */
+ if (IS_SINGLE(op)) /* ROUND.W.S */
{
dtemp = FSVALS_FR0;
if (dtemp < 0)
@@ -1033,7 +1033,7 @@ INLINE void handle_cop1_fr0(UINT32 op)
dtemp = floor(dtemp + 0.5);
FDVALW_FR0 = (INT32)dtemp;
}
- else /* ROUND.W.D */
+ else /* ROUND.W.D */
{
dtemp = FSVALD_FR0;
if (dtemp < 0)
@@ -1045,7 +1045,7 @@ INLINE void handle_cop1_fr0(UINT32 op)
break;
case 0x0d:
- if (IS_SINGLE(op)) /* TRUNC.W.S */
+ if (IS_SINGLE(op)) /* TRUNC.W.S */
{
dtemp = FSVALS_FR0;
if (dtemp < 0)
@@ -1054,7 +1054,7 @@ INLINE void handle_cop1_fr0(UINT32 op)
dtemp = floor(dtemp);
FDVALW_FR0 = (INT32)dtemp;
}
- else /* TRUNC.W.D */
+ else /* TRUNC.W.D */
{
dtemp = FSVALD_FR0;
if (dtemp < 0)
@@ -1066,164 +1066,164 @@ INLINE void handle_cop1_fr0(UINT32 op)
break;
case 0x0e:
- if (IS_SINGLE(op)) /* CEIL.W.S */
+ if (IS_SINGLE(op)) /* CEIL.W.S */
dtemp = ceil(FSVALS_FR0);
- else /* CEIL.W.D */
+ else /* CEIL.W.D */
dtemp = ceil(FSVALD_FR0);
FDVALW_FR0 = (INT32)dtemp;
break;
case 0x0f:
- if (IS_SINGLE(op)) /* FLOOR.W.S */
+ if (IS_SINGLE(op)) /* FLOOR.W.S */
dtemp = floor(FSVALS_FR0);
- else /* FLOOR.W.D */
+ else /* FLOOR.W.D */
dtemp = floor(FSVALD_FR0);
FDVALW_FR0 = (INT32)dtemp;
break;
- case 0x11: /* R5000 */
+ case 0x11: /* R5000 */
if (GET_FCC((op >> 18) & 7) == ((op >> 16) & 1))
{
- if (IS_SINGLE(op)) /* MOVT/F.S */
+ if (IS_SINGLE(op)) /* MOVT/F.S */
FDVALS_FR0 = FSVALS_FR0;
- else /* MOVT/F.D */
+ else /* MOVT/F.D */
FDVALD_FR0 = FSVALD_FR0;
}
break;
- case 0x12: /* R5000 */
+ case 0x12: /* R5000 */
if (RTVAL64 == 0)
{
- if (IS_SINGLE(op)) /* MOVZ.S */
+ if (IS_SINGLE(op)) /* MOVZ.S */
FDVALS_FR0 = FSVALS_FR0;
- else /* MOVZ.D */
+ else /* MOVZ.D */
FDVALD_FR0 = FSVALD_FR0;
}
break;
- case 0x13: /* R5000 */
+ case 0x13: /* R5000 */
if (RTVAL64 != 0)
{
- if (IS_SINGLE(op)) /* MOVN.S */
+ if (IS_SINGLE(op)) /* MOVN.S */
FDVALS_FR0 = FSVALS_FR0;
- else /* MOVN.D */
+ else /* MOVN.D */
FDVALD_FR0 = FSVALD_FR0;
}
break;
- case 0x15: /* R5000 */
- if (IS_SINGLE(op)) /* RECIP.S */
+ case 0x15: /* R5000 */
+ if (IS_SINGLE(op)) /* RECIP.S */
FDVALS_FR0 = 1.0f / FSVALS_FR0;
- else /* RECIP.D */
+ else /* RECIP.D */
FDVALD_FR0 = 1.0 / FSVALD_FR0;
break;
- case 0x16: /* R5000 */
- if (IS_SINGLE(op)) /* RSQRT.S */
+ case 0x16: /* R5000 */
+ if (IS_SINGLE(op)) /* RSQRT.S */
FDVALS_FR0 = 1.0f / sqrt(FSVALS_FR0);
- else /* RSQRT.D */
+ else /* RSQRT.D */
FDVALD_FR0 = 1.0 / sqrt(FSVALD_FR0);
break;
case 0x20:
if (IS_INTEGRAL(op))
{
- if (IS_SINGLE(op)) /* CVT.S.W */
+ if (IS_SINGLE(op)) /* CVT.S.W */
FDVALS_FR0 = (INT32)FSVALW_FR0;
- else /* CVT.S.L */
+ else /* CVT.S.L */
FDVALS_FR0 = (INT64)FSVALL_FR0;
}
- else /* CVT.S.D */
+ else /* CVT.S.D */
FDVALS_FR0 = FSVALD_FR0;
break;
case 0x21:
if (IS_INTEGRAL(op))
{
- if (IS_SINGLE(op)) /* CVT.D.W */
+ if (IS_SINGLE(op)) /* CVT.D.W */
FDVALD_FR0 = (INT32)FSVALW_FR0;
- else /* CVT.D.L */
+ else /* CVT.D.L */
FDVALD_FR0 = (INT64)FSVALL_FR0;
}
- else /* CVT.D.S */
+ else /* CVT.D.S */
FDVALD_FR0 = FSVALS_FR0;
break;
case 0x24:
- if (IS_SINGLE(op)) /* CVT.W.S */
+ if (IS_SINGLE(op)) /* CVT.W.S */
FDVALW_FR0 = (INT32)FSVALS_FR0;
else
FDVALW_FR0 = (INT32)FSVALD_FR0;
break;
case 0x25:
- if (IS_SINGLE(op)) /* CVT.L.S */
+ if (IS_SINGLE(op)) /* CVT.L.S */
FDVALL_FR0 = (INT64)FSVALS_FR0;
- else /* CVT.L.D */
+ else /* CVT.L.D */
FDVALL_FR0 = (INT64)FSVALD_FR0;
break;
case 0x30:
case 0x38:
- if (IS_SINGLE(op)) /* C.F.S */
+ if (IS_SINGLE(op)) /* C.F.S */
SET_FCC((op >> 8) & 7, 0);
- else /* C.F.D */
+ else /* C.F.D */
SET_FCC((op >> 8) & 7, 0);
break;
case 0x31:
case 0x39:
- if (IS_SINGLE(op)) /* C.UN.S */
+ if (IS_SINGLE(op)) /* C.UN.S */
SET_FCC((op >> 8) & 7, 0);
- else /* C.UN.D */
+ else /* C.UN.D */
SET_FCC((op >> 8) & 7, 0);
break;
case 0x32:
case 0x3a:
- if (IS_SINGLE(op)) /* C.EQ.S */
+ if (IS_SINGLE(op)) /* C.EQ.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR0 == FTVALS_FR0));
- else /* C.EQ.D */
+ else /* C.EQ.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR0 == FTVALD_FR0));
break;
case 0x33:
case 0x3b:
- if (IS_SINGLE(op)) /* C.UEQ.S */
+ if (IS_SINGLE(op)) /* C.UEQ.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR0 == FTVALS_FR0));
- else /* C.UEQ.D */
+ else /* C.UEQ.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR0 == FTVALD_FR0));
break;
case 0x34:
case 0x3c:
- if (IS_SINGLE(op)) /* C.OLT.S */
+ if (IS_SINGLE(op)) /* C.OLT.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR0 < FTVALS_FR0));
- else /* C.OLT.D */
+ else /* C.OLT.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR0 < FTVALD_FR0));
break;
case 0x35:
case 0x3d:
- if (IS_SINGLE(op)) /* C.ULT.S */
+ if (IS_SINGLE(op)) /* C.ULT.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR0 < FTVALS_FR0));
- else /* C.ULT.D */
+ else /* C.ULT.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR0 < FTVALD_FR0));
break;
case 0x36:
case 0x3e:
- if (IS_SINGLE(op)) /* C.OLE.S */
+ if (IS_SINGLE(op)) /* C.OLE.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR0 <= FTVALS_FR0));
- else /* C.OLE.D */
+ else /* C.OLE.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR0 <= FTVALD_FR0));
break;
case 0x37:
case 0x3f:
- if (IS_SINGLE(op)) /* C.ULE.S */
+ if (IS_SINGLE(op)) /* C.ULE.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR0 <= FTVALS_FR0));
- else /* C.ULE.D */
+ else /* C.ULE.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR0 <= FTVALD_FR0));
break;
@@ -1250,82 +1250,82 @@ INLINE void handle_cop1_fr1(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_reg32(RDREG); break;
- case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop1_reg64(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_creg(RDREG); break;
- case 0x04: /* MTCz */ set_cop1_reg32(RDREG, RTVAL32); break;
- case 0x05: /* DMTCz */ set_cop1_reg64(RDREG, RTVAL64); break;
- case 0x06: /* CTCz */ set_cop1_creg(RDREG, RTVAL32); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_reg32(RDREG); break;
+ case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop1_reg64(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop1_creg(RDREG); break;
+ case 0x04: /* MTCz */ set_cop1_reg32(RDREG, RTVAL32); break;
+ case 0x05: /* DMTCz */ set_cop1_reg64(RDREG, RTVAL64); break;
+ case 0x06: /* CTCz */ set_cop1_creg(RDREG, RTVAL32); break;
+ case 0x08: /* BC */
switch ((op >> 16) & 3)
{
- case 0x00: /* BCzF */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
- case 0x01: /* BCzT */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
- case 0x02: /* BCzFL */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x03: /* BCzTL */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x00: /* BCzF */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
+ case 0x01: /* BCzT */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); break;
+ case 0x02: /* BCzFL */ if (!GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x03: /* BCzTL */ if (GET_FCC((op >> 18) & 7)) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
}
break;
default:
switch (op & 0x3f)
{
case 0x00:
- if (IS_SINGLE(op)) /* ADD.S */
+ if (IS_SINGLE(op)) /* ADD.S */
FDVALS_FR1 = FSVALS_FR1 + FTVALS_FR1;
- else /* ADD.D */
+ else /* ADD.D */
FDVALD_FR1 = FSVALD_FR1 + FTVALD_FR1;
break;
case 0x01:
- if (IS_SINGLE(op)) /* SUB.S */
+ if (IS_SINGLE(op)) /* SUB.S */
FDVALS_FR1 = FSVALS_FR1 - FTVALS_FR1;
- else /* SUB.D */
+ else /* SUB.D */
FDVALD_FR1 = FSVALD_FR1 - FTVALD_FR1;
break;
case 0x02:
- if (IS_SINGLE(op)) /* MUL.S */
+ if (IS_SINGLE(op)) /* MUL.S */
FDVALS_FR1 = FSVALS_FR1 * FTVALS_FR1;
- else /* MUL.D */
+ else /* MUL.D */
FDVALD_FR1 = FSVALD_FR1 * FTVALD_FR1;
break;
case 0x03:
- if (IS_SINGLE(op)) /* DIV.S */
+ if (IS_SINGLE(op)) /* DIV.S */
FDVALS_FR1 = FSVALS_FR1 / FTVALS_FR1;
- else /* DIV.D */
+ else /* DIV.D */
FDVALD_FR1 = FSVALD_FR1 / FTVALD_FR1;
break;
case 0x04:
- if (IS_SINGLE(op)) /* SQRT.S */
+ if (IS_SINGLE(op)) /* SQRT.S */
FDVALS_FR1 = sqrt(FSVALS_FR1);
- else /* SQRT.D */
+ else /* SQRT.D */
FDVALD_FR1 = sqrt(FSVALD_FR1);
break;
case 0x05:
- if (IS_SINGLE(op)) /* ABS.S */
+ if (IS_SINGLE(op)) /* ABS.S */
FDVALS_FR1 = fabs(FSVALS_FR1);
- else /* ABS.D */
+ else /* ABS.D */
FDVALD_FR1 = fabs(FSVALD_FR1);
break;
case 0x06:
- if (IS_SINGLE(op)) /* MOV.S */
+ if (IS_SINGLE(op)) /* MOV.S */
FDVALS_FR1 = FSVALS_FR1;
- else /* MOV.D */
+ else /* MOV.D */
FDVALD_FR1 = FSVALD_FR1;
break;
case 0x07:
- if (IS_SINGLE(op)) /* NEG.S */
+ if (IS_SINGLE(op)) /* NEG.S */
FDVALS_FR1 = -FSVALS_FR1;
- else /* NEG.D */
+ else /* NEG.D */
FDVALD_FR1 = -FSVALD_FR1;
break;
case 0x08:
- if (IS_SINGLE(op)) /* ROUND.L.S */
+ if (IS_SINGLE(op)) /* ROUND.L.S */
{
double temp = FSVALS_FR1;
if (temp < 0)
@@ -1334,7 +1334,7 @@ INLINE void handle_cop1_fr1(UINT32 op)
temp = floor(temp + 0.5);
FDVALL_FR1 = (INT64)temp;
}
- else /* ROUND.L.D */
+ else /* ROUND.L.D */
{
double temp = FSVALD_FR1;
if (temp < 0)
@@ -1346,7 +1346,7 @@ INLINE void handle_cop1_fr1(UINT32 op)
break;
case 0x09:
- if (IS_SINGLE(op)) /* TRUNC.L.S */
+ if (IS_SINGLE(op)) /* TRUNC.L.S */
{
double temp = FSVALS_FR1;
if (temp < 0)
@@ -1355,7 +1355,7 @@ INLINE void handle_cop1_fr1(UINT32 op)
temp = floor(temp);
FDVALL_FR1 = (INT64)temp;
}
- else /* TRUNC.L.D */
+ else /* TRUNC.L.D */
{
double temp = FSVALD_FR1;
if (temp < 0)
@@ -1367,23 +1367,23 @@ INLINE void handle_cop1_fr1(UINT32 op)
break;
case 0x0a:
- if (IS_SINGLE(op)) /* CEIL.L.S */
+ if (IS_SINGLE(op)) /* CEIL.L.S */
dtemp = ceil(FSVALS_FR1);
- else /* CEIL.L.D */
+ else /* CEIL.L.D */
dtemp = ceil(FSVALD_FR1);
FDVALL_FR1 = (INT64)dtemp;
break;
case 0x0b:
- if (IS_SINGLE(op)) /* FLOOR.L.S */
+ if (IS_SINGLE(op)) /* FLOOR.L.S */
dtemp = floor(FSVALS_FR1);
- else /* FLOOR.L.D */
+ else /* FLOOR.L.D */
dtemp = floor(FSVALD_FR1);
FDVALL_FR1 = (INT64)dtemp;
break;
case 0x0c:
- if (IS_SINGLE(op)) /* ROUND.W.S */
+ if (IS_SINGLE(op)) /* ROUND.W.S */
{
dtemp = FSVALS_FR1;
if (dtemp < 0)
@@ -1392,7 +1392,7 @@ INLINE void handle_cop1_fr1(UINT32 op)
dtemp = floor(dtemp + 0.5);
FDVALW_FR1 = (INT32)dtemp;
}
- else /* ROUND.W.D */
+ else /* ROUND.W.D */
{
dtemp = FSVALD_FR1;
if (dtemp < 0)
@@ -1404,7 +1404,7 @@ INLINE void handle_cop1_fr1(UINT32 op)
break;
case 0x0d:
- if (IS_SINGLE(op)) /* TRUNC.W.S */
+ if (IS_SINGLE(op)) /* TRUNC.W.S */
{
dtemp = FSVALS_FR1;
if (dtemp < 0)
@@ -1413,7 +1413,7 @@ INLINE void handle_cop1_fr1(UINT32 op)
dtemp = floor(dtemp);
FDVALW_FR1 = (INT32)dtemp;
}
- else /* TRUNC.W.D */
+ else /* TRUNC.W.D */
{
dtemp = FSVALD_FR1;
if (dtemp < 0)
@@ -1425,164 +1425,164 @@ INLINE void handle_cop1_fr1(UINT32 op)
break;
case 0x0e:
- if (IS_SINGLE(op)) /* CEIL.W.S */
+ if (IS_SINGLE(op)) /* CEIL.W.S */
dtemp = ceil(FSVALS_FR1);
- else /* CEIL.W.D */
+ else /* CEIL.W.D */
dtemp = ceil(FSVALD_FR1);
FDVALW_FR1 = (INT32)dtemp;
break;
case 0x0f:
- if (IS_SINGLE(op)) /* FLOOR.W.S */
+ if (IS_SINGLE(op)) /* FLOOR.W.S */
dtemp = floor(FSVALS_FR1);
- else /* FLOOR.W.D */
+ else /* FLOOR.W.D */
dtemp = floor(FSVALD_FR1);
FDVALW_FR1 = (INT32)dtemp;
break;
- case 0x11: /* R5000 */
+ case 0x11: /* R5000 */
if (GET_FCC((op >> 18) & 7) == ((op >> 16) & 1))
{
- if (IS_SINGLE(op)) /* MOVT/F.S */
+ if (IS_SINGLE(op)) /* MOVT/F.S */
FDVALS_FR1 = FSVALS_FR1;
- else /* MOVT/F.D */
+ else /* MOVT/F.D */
FDVALD_FR1 = FSVALD_FR1;
}
break;
- case 0x12: /* R5000 */
+ case 0x12: /* R5000 */
if (RTVAL64 == 0)
{
- if (IS_SINGLE(op)) /* MOVZ.S */
+ if (IS_SINGLE(op)) /* MOVZ.S */
FDVALS_FR1 = FSVALS_FR1;
- else /* MOVZ.D */
+ else /* MOVZ.D */
FDVALD_FR1 = FSVALD_FR1;
}
break;
- case 0x13: /* R5000 */
+ case 0x13: /* R5000 */
if (RTVAL64 != 0)
{
- if (IS_SINGLE(op)) /* MOVN.S */
+ if (IS_SINGLE(op)) /* MOVN.S */
FDVALS_FR1 = FSVALS_FR1;
- else /* MOVN.D */
+ else /* MOVN.D */
FDVALD_FR1 = FSVALD_FR1;
}
break;
- case 0x15: /* R5000 */
- if (IS_SINGLE(op)) /* RECIP.S */
+ case 0x15: /* R5000 */
+ if (IS_SINGLE(op)) /* RECIP.S */
FDVALS_FR1 = 1.0f / FSVALS_FR1;
- else /* RECIP.D */
+ else /* RECIP.D */
FDVALD_FR1 = 1.0 / FSVALD_FR1;
break;
- case 0x16: /* R5000 */
- if (IS_SINGLE(op)) /* RSQRT.S */
+ case 0x16: /* R5000 */
+ if (IS_SINGLE(op)) /* RSQRT.S */
FDVALS_FR1 = 1.0f / sqrt(FSVALS_FR1);
- else /* RSQRT.D */
+ else /* RSQRT.D */
FDVALD_FR1 = 1.0 / sqrt(FSVALD_FR1);
break;
case 0x20:
if (IS_INTEGRAL(op))
{
- if (IS_SINGLE(op)) /* CVT.S.W */
+ if (IS_SINGLE(op)) /* CVT.S.W */
FDVALS_FR1 = (INT32)FSVALW_FR1;
- else /* CVT.S.L */
+ else /* CVT.S.L */
FDVALS_FR1 = (INT64)FSVALL_FR1;
}
- else /* CVT.S.D */
+ else /* CVT.S.D */
FDVALS_FR1 = FSVALD_FR1;
break;
case 0x21:
if (IS_INTEGRAL(op))
{
- if (IS_SINGLE(op)) /* CVT.D.W */
+ if (IS_SINGLE(op)) /* CVT.D.W */
FDVALD_FR1 = (INT32)FSVALW_FR1;
- else /* CVT.D.L */
+ else /* CVT.D.L */
FDVALD_FR1 = (INT64)FSVALL_FR1;
}
- else /* CVT.D.S */
+ else /* CVT.D.S */
FDVALD_FR1 = FSVALS_FR1;
break;
case 0x24:
- if (IS_SINGLE(op)) /* CVT.W.S */
+ if (IS_SINGLE(op)) /* CVT.W.S */
FDVALW_FR1 = (INT32)FSVALS_FR1;
else
FDVALW_FR1 = (INT32)FSVALD_FR1;
break;
case 0x25:
- if (IS_SINGLE(op)) /* CVT.L.S */
+ if (IS_SINGLE(op)) /* CVT.L.S */
FDVALL_FR1 = (INT64)FSVALS_FR1;
- else /* CVT.L.D */
+ else /* CVT.L.D */
FDVALL_FR1 = (INT64)FSVALD_FR1;
break;
case 0x30:
case 0x38:
- if (IS_SINGLE(op)) /* C.F.S */
+ if (IS_SINGLE(op)) /* C.F.S */
SET_FCC((op >> 8) & 7, 0);
- else /* C.F.D */
+ else /* C.F.D */
SET_FCC((op >> 8) & 7, 0);
break;
case 0x31:
case 0x39:
- if (IS_SINGLE(op)) /* C.UN.S */
+ if (IS_SINGLE(op)) /* C.UN.S */
SET_FCC((op >> 8) & 7, 0);
- else /* C.UN.D */
+ else /* C.UN.D */
SET_FCC((op >> 8) & 7, 0);
break;
case 0x32:
case 0x3a:
- if (IS_SINGLE(op)) /* C.EQ.S */
+ if (IS_SINGLE(op)) /* C.EQ.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR1 == FTVALS_FR1));
- else /* C.EQ.D */
+ else /* C.EQ.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR1 == FTVALD_FR1));
break;
case 0x33:
case 0x3b:
- if (IS_SINGLE(op)) /* C.UEQ.S */
+ if (IS_SINGLE(op)) /* C.UEQ.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR1 == FTVALS_FR1));
- else /* C.UEQ.D */
+ else /* C.UEQ.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR1 == FTVALD_FR1));
break;
case 0x34:
case 0x3c:
- if (IS_SINGLE(op)) /* C.OLT.S */
+ if (IS_SINGLE(op)) /* C.OLT.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR1 < FTVALS_FR1));
- else /* C.OLT.D */
+ else /* C.OLT.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR1 < FTVALD_FR1));
break;
case 0x35:
case 0x3d:
- if (IS_SINGLE(op)) /* C.ULT.S */
+ if (IS_SINGLE(op)) /* C.ULT.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR1 < FTVALS_FR1));
- else /* C.ULT.D */
+ else /* C.ULT.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR1 < FTVALD_FR1));
break;
case 0x36:
case 0x3e:
- if (IS_SINGLE(op)) /* C.OLE.S */
+ if (IS_SINGLE(op)) /* C.OLE.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR1 <= FTVALS_FR1));
- else /* C.OLE.D */
+ else /* C.OLE.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR1 <= FTVALD_FR1));
break;
case 0x37:
case 0x3f:
- if (IS_SINGLE(op)) /* C.ULE.S */
+ if (IS_SINGLE(op)) /* C.ULE.S */
SET_FCC((op >> 8) & 7, (FSVALS_FR1 <= FTVALS_FR1));
- else /* C.ULE.D */
+ else /* C.ULE.D */
SET_FCC((op >> 8) & 7, (FSVALD_FR1 <= FTVALD_FR1));
break;
@@ -1613,65 +1613,65 @@ INLINE void handle_cop1x_fr0(UINT32 op)
switch (op & 0x3f)
{
- case 0x00: /* LWXC1 */
+ case 0x00: /* LWXC1 */
if (RWORD(RSVAL32 + RTVAL32, &temp)) FDVALW_FR0 = temp;
break;
- case 0x01: /* LDXC1 */
+ case 0x01: /* LDXC1 */
if (RDOUBLE(RSVAL32 + RTVAL32, &temp64)) FDVALL_FR0 = temp64;
break;
- case 0x08: /* SWXC1 */
+ case 0x08: /* SWXC1 */
WWORD(RSVAL32 + RTVAL32, get_cop1_reg32(FDREG));
break;
- case 0x09: /* SDXC1 */
+ case 0x09: /* SDXC1 */
WDOUBLE(RSVAL32 + RTVAL32, get_cop1_reg64(FDREG));
break;
- case 0x0f: /* PREFX */
+ case 0x0f: /* PREFX */
break;
- case 0x20: /* MADD.S */
+ case 0x20: /* MADD.S */
FDVALS_FR0 = FSVALS_FR0 * FTVALS_FR0 + FRVALS_FR0;
break;
- case 0x21: /* MADD.D */
+ case 0x21: /* MADD.D */
FDVALD_FR0 = FSVALD_FR0 * FTVALD_FR0 + FRVALD_FR0;
break;
- case 0x28: /* MSUB.S */
+ case 0x28: /* MSUB.S */
FDVALS_FR0 = FSVALS_FR0 * FTVALS_FR0 - FRVALS_FR0;
break;
- case 0x29: /* MSUB.D */
+ case 0x29: /* MSUB.D */
FDVALD_FR0 = FSVALD_FR0 * FTVALD_FR0 - FRVALD_FR0;
break;
- case 0x30: /* NMADD.S */
+ case 0x30: /* NMADD.S */
FDVALS_FR0 = -(FSVALS_FR0 * FTVALS_FR0 + FRVALS_FR0);
break;
- case 0x31: /* NMADD.D */
+ case 0x31: /* NMADD.D */
FDVALD_FR0 = -(FSVALD_FR0 * FTVALD_FR0 + FRVALD_FR0);
break;
- case 0x38: /* NMSUB.S */
+ case 0x38: /* NMSUB.S */
FDVALS_FR0 = -(FSVALS_FR0 * FTVALS_FR0 - FRVALS_FR0);
break;
- case 0x39: /* NMSUB.D */
+ case 0x39: /* NMSUB.D */
FDVALD_FR0 = -(FSVALD_FR0 * FTVALD_FR0 - FRVALD_FR0);
break;
- case 0x24: /* MADD.W */
- case 0x25: /* MADD.L */
- case 0x2c: /* MSUB.W */
- case 0x2d: /* MSUB.L */
- case 0x34: /* NMADD.W */
- case 0x35: /* NMADD.L */
- case 0x3c: /* NMSUB.W */
- case 0x3d: /* NMSUB.L */
+ case 0x24: /* MADD.W */
+ case 0x25: /* MADD.L */
+ case 0x2c: /* MSUB.W */
+ case 0x2d: /* MSUB.L */
+ case 0x34: /* NMADD.W */
+ case 0x35: /* NMADD.L */
+ case 0x3c: /* NMSUB.W */
+ case 0x3d: /* NMSUB.L */
default:
fprintf(stderr, "cop1x %X\n", op);
break;
@@ -1692,65 +1692,65 @@ INLINE void handle_cop1x_fr1(UINT32 op)
switch (op & 0x3f)
{
- case 0x00: /* LWXC1 */
+ case 0x00: /* LWXC1 */
if (RWORD(RSVAL32 + RTVAL32, &temp)) FDVALW_FR1 = temp;
break;
- case 0x01: /* LDXC1 */
+ case 0x01: /* LDXC1 */
if (RDOUBLE(RSVAL32 + RTVAL32, &temp64)) FDVALL_FR1 = temp64;
break;
- case 0x08: /* SWXC1 */
+ case 0x08: /* SWXC1 */
WWORD(RSVAL32 + RTVAL32, get_cop1_reg32(FDREG));
break;
- case 0x09: /* SDXC1 */
+ case 0x09: /* SDXC1 */
WDOUBLE(RSVAL32 + RTVAL32, get_cop1_reg64(FDREG));
break;
- case 0x0f: /* PREFX */
+ case 0x0f: /* PREFX */
break;
- case 0x20: /* MADD.S */
+ case 0x20: /* MADD.S */
FDVALS_FR1 = FSVALS_FR1 * FTVALS_FR1 + FRVALS_FR1;
break;
- case 0x21: /* MADD.D */
+ case 0x21: /* MADD.D */
FDVALD_FR1 = FSVALD_FR1 * FTVALD_FR1 + FRVALD_FR1;
break;
- case 0x28: /* MSUB.S */
+ case 0x28: /* MSUB.S */
FDVALS_FR1 = FSVALS_FR1 * FTVALS_FR1 - FRVALS_FR1;
break;
- case 0x29: /* MSUB.D */
+ case 0x29: /* MSUB.D */
FDVALD_FR1 = FSVALD_FR1 * FTVALD_FR1 - FRVALD_FR1;
break;
- case 0x30: /* NMADD.S */
+ case 0x30: /* NMADD.S */
FDVALS_FR1 = -(FSVALS_FR1 * FTVALS_FR1 + FRVALS_FR1);
break;
- case 0x31: /* NMADD.D */
+ case 0x31: /* NMADD.D */
FDVALD_FR1 = -(FSVALD_FR1 * FTVALD_FR1 + FRVALD_FR1);
break;
- case 0x38: /* NMSUB.S */
+ case 0x38: /* NMSUB.S */
FDVALS_FR1 = -(FSVALS_FR1 * FTVALS_FR1 - FRVALS_FR1);
break;
- case 0x39: /* NMSUB.D */
+ case 0x39: /* NMSUB.D */
FDVALD_FR1 = -(FSVALD_FR1 * FTVALD_FR1 - FRVALD_FR1);
break;
- case 0x24: /* MADD.W */
- case 0x25: /* MADD.L */
- case 0x2c: /* MSUB.W */
- case 0x2d: /* MSUB.L */
- case 0x34: /* NMADD.W */
- case 0x35: /* NMADD.L */
- case 0x3c: /* NMSUB.W */
- case 0x3d: /* NMSUB.L */
+ case 0x24: /* MADD.W */
+ case 0x25: /* MADD.L */
+ case 0x2c: /* MSUB.W */
+ case 0x2d: /* MSUB.L */
+ case 0x34: /* NMADD.W */
+ case 0x35: /* NMADD.L */
+ case 0x3c: /* NMSUB.W */
+ case 0x3d: /* NMSUB.L */
default:
fprintf(stderr, "cop1x %X\n", op);
break;
@@ -1793,20 +1793,20 @@ INLINE void handle_cop2(UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop2_reg(RDREG); break;
- case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop2_reg(RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop2_creg(RDREG); break;
- case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break;
- case 0x05: /* DMTCz */ set_cop2_reg(RDREG, RTVAL64); break;
- case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) RTVAL64 = (INT32)get_cop2_reg(RDREG); break;
+ case 0x01: /* DMFCz */ if (RTREG) RTVAL64 = get_cop2_reg(RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) RTVAL64 = (INT32)get_cop2_creg(RDREG); break;
+ case 0x04: /* MTCz */ set_cop2_reg(RDREG, RTVAL32); break;
+ case 0x05: /* DMTCz */ set_cop2_reg(RDREG, RTVAL64); break;
+ case 0x06: /* CTCz */ set_cop2_creg(RDREG, RTVAL32); break;
+ case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!mips3.cf[2]) ADDPC(SIMMVAL); break;
- case 0x01: /* BCzF */ if (mips3.cf[2]) ADDPC(SIMMVAL); break;
- case 0x02: /* BCzFL */ invalid_instruction(op); break;
- case 0x03: /* BCzTL */ invalid_instruction(op); break;
- default: invalid_instruction(op); break;
+ case 0x00: /* BCzF */ if (!mips3.cf[2]) ADDPC(SIMMVAL); break;
+ case 0x01: /* BCzF */ if (mips3.cf[2]) ADDPC(SIMMVAL); break;
+ case 0x02: /* BCzFL */ invalid_instruction(op); break;
+ case 0x03: /* BCzTL */ invalid_instruction(op); break;
+ default: invalid_instruction(op); break;
}
break;
case 0x10:
@@ -1824,8 +1824,8 @@ INLINE void handle_cop2(UINT32 op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */ invalid_instruction(op); break;
- default: invalid_instruction(op); break;
+ case 0x1f: /* COP */ invalid_instruction(op); break;
+ default: invalid_instruction(op); break;
}
}
@@ -1876,43 +1876,43 @@ CPU_EXECUTE( mips3 )
/* parse the instruction */
switch (op >> 26)
{
- case 0x00: /* SPECIAL */
+ case 0x00: /* SPECIAL */
switch (op & 63)
{
- case 0x00: /* SLL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << SHIFT); break;
- case 0x01: /* MOVF - R5000*/if (RDREG && GET_FCC((op >> 18) & 7) == ((op >> 16) & 1)) RDVAL64 = RSVAL64; break;
- case 0x02: /* SRL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> SHIFT); break;
- case 0x03: /* SRA */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> SHIFT; break;
- case 0x04: /* SLLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << (RSVAL32 & 31)); break;
- case 0x06: /* SRLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> (RSVAL32 & 31)); break;
- case 0x07: /* SRAV */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> (RSVAL32 & 31); break;
- case 0x08: /* JR */ SETPC(RSVAL32); break;
- case 0x09: /* JALR */ SETPCL(RSVAL32,RDREG); break;
- case 0x0a: /* MOVZ - R5000 */if (RTVAL64 == 0) { if (RDREG) RDVAL64 = RSVAL64; } break;
- case 0x0b: /* MOVN - R5000 */if (RTVAL64 != 0) { if (RDREG) RDVAL64 = RSVAL64; } break;
- case 0x0c: /* SYSCALL */ generate_exception(EXCEPTION_SYSCALL, 1); break;
- case 0x0d: /* BREAK */ generate_exception(EXCEPTION_BREAK, 1); break;
- case 0x0f: /* SYNC */ /* effective no-op */ break;
- case 0x10: /* MFHI */ if (RDREG) RDVAL64 = HIVAL64; break;
- case 0x11: /* MTHI */ HIVAL64 = RSVAL64; break;
- case 0x12: /* MFLO */ if (RDREG) RDVAL64 = LOVAL64; break;
- case 0x13: /* MTLO */ LOVAL64 = RSVAL64; break;
- case 0x14: /* DSLLV */ if (RDREG) RDVAL64 = RTVAL64 << (RSVAL32 & 63); break;
- case 0x16: /* DSRLV */ if (RDREG) RDVAL64 = RTVAL64 >> (RSVAL32 & 63); break;
- case 0x17: /* DSRAV */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (RSVAL32 & 63); break;
- case 0x18: /* MULT */
+ case 0x00: /* SLL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << SHIFT); break;
+ case 0x01: /* MOVF - R5000*/if (RDREG && GET_FCC((op >> 18) & 7) == ((op >> 16) & 1)) RDVAL64 = RSVAL64; break;
+ case 0x02: /* SRL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> SHIFT); break;
+ case 0x03: /* SRA */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> SHIFT; break;
+ case 0x04: /* SLLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << (RSVAL32 & 31)); break;
+ case 0x06: /* SRLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> (RSVAL32 & 31)); break;
+ case 0x07: /* SRAV */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> (RSVAL32 & 31); break;
+ case 0x08: /* JR */ SETPC(RSVAL32); break;
+ case 0x09: /* JALR */ SETPCL(RSVAL32,RDREG); break;
+ case 0x0a: /* MOVZ - R5000 */if (RTVAL64 == 0) { if (RDREG) RDVAL64 = RSVAL64; } break;
+ case 0x0b: /* MOVN - R5000 */if (RTVAL64 != 0) { if (RDREG) RDVAL64 = RSVAL64; } break;
+ case 0x0c: /* SYSCALL */ generate_exception(EXCEPTION_SYSCALL, 1); break;
+ case 0x0d: /* BREAK */ generate_exception(EXCEPTION_BREAK, 1); break;
+ case 0x0f: /* SYNC */ /* effective no-op */ break;
+ case 0x10: /* MFHI */ if (RDREG) RDVAL64 = HIVAL64; break;
+ case 0x11: /* MTHI */ HIVAL64 = RSVAL64; break;
+ case 0x12: /* MFLO */ if (RDREG) RDVAL64 = LOVAL64; break;
+ case 0x13: /* MTLO */ LOVAL64 = RSVAL64; break;
+ case 0x14: /* DSLLV */ if (RDREG) RDVAL64 = RTVAL64 << (RSVAL32 & 63); break;
+ case 0x16: /* DSRLV */ if (RDREG) RDVAL64 = RTVAL64 >> (RSVAL32 & 63); break;
+ case 0x17: /* DSRAV */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (RSVAL32 & 63); break;
+ case 0x18: /* MULT */
temp64 = (INT64)(INT32)RSVAL32 * (INT64)(INT32)RTVAL32;
LOVAL64 = (INT32)temp64;
HIVAL64 = (INT32)(temp64 >> 32);
mips3.core.icount -= 3;
break;
- case 0x19: /* MULTU */
+ case 0x19: /* MULTU */
temp64 = (UINT64)RSVAL32 * (UINT64)RTVAL32;
LOVAL64 = (INT32)temp64;
HIVAL64 = (INT32)(temp64 >> 32);
mips3.core.icount -= 3;
break;
- case 0x1a: /* DIV */
+ case 0x1a: /* DIV */
if (RTVAL32)
{
LOVAL64 = (INT32)((INT32)RSVAL32 / (INT32)RTVAL32);
@@ -1920,7 +1920,7 @@ CPU_EXECUTE( mips3 )
}
mips3.core.icount -= 35;
break;
- case 0x1b: /* DIVU */
+ case 0x1b: /* DIVU */
if (RTVAL32)
{
LOVAL64 = (INT32)(RSVAL32 / RTVAL32);
@@ -1928,19 +1928,19 @@ CPU_EXECUTE( mips3 )
}
mips3.core.icount -= 35;
break;
- case 0x1c: /* DMULT */
+ case 0x1c: /* DMULT */
temp64 = (INT64)RSVAL64 * (INT64)RTVAL64;
LOVAL64 = temp64;
HIVAL64 = (INT64)temp64 >> 63;
mips3.core.icount -= 7;
break;
- case 0x1d: /* DMULTU */
+ case 0x1d: /* DMULTU */
temp64 = (UINT64)RSVAL64 * (UINT64)RTVAL64;
LOVAL64 = temp64;
HIVAL64 = 0;
mips3.core.icount -= 7;
break;
- case 0x1e: /* DDIV */
+ case 0x1e: /* DDIV */
if (RTVAL64)
{
LOVAL64 = (INT64)RSVAL64 / (INT64)RTVAL64;
@@ -1948,7 +1948,7 @@ CPU_EXECUTE( mips3 )
}
mips3.core.icount -= 67;
break;
- case 0x1f: /* DDIVU */
+ case 0x1f: /* DDIVU */
if (RTVAL64)
{
LOVAL64 = RSVAL64 / RTVAL64;
@@ -1956,102 +1956,102 @@ CPU_EXECUTE( mips3 )
}
mips3.core.icount -= 67;
break;
- case 0x20: /* ADD */
+ case 0x20: /* ADD */
if (ENABLE_OVERFLOWS && RSVAL32 > ~RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1);
else if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32);
break;
- case 0x21: /* ADDU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32); break;
- case 0x22: /* SUB */
+ case 0x21: /* ADDU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32); break;
+ case 0x22: /* SUB */
if (ENABLE_OVERFLOWS && RSVAL32 < RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1);
else if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32);
break;
- case 0x23: /* SUBU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32); break;
- case 0x24: /* AND */ if (RDREG) RDVAL64 = RSVAL64 & RTVAL64; break;
- case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break;
- case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break;
- case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break;
- case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (INT64)RSVAL64 < (INT64)RTVAL64; break;
- case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (UINT64)RSVAL64 < (UINT64)RTVAL64; break;
- case 0x2c: /* DADD */
+ case 0x23: /* SUBU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32); break;
+ case 0x24: /* AND */ if (RDREG) RDVAL64 = RSVAL64 & RTVAL64; break;
+ case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break;
+ case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break;
+ case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break;
+ case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (INT64)RSVAL64 < (INT64)RTVAL64; break;
+ case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (UINT64)RSVAL64 < (UINT64)RTVAL64; break;
+ case 0x2c: /* DADD */
if (ENABLE_OVERFLOWS && RSVAL64 > ~RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1);
else if (RDREG) RDVAL64 = RSVAL64 + RTVAL64;
break;
- case 0x2d: /* DADDU */ if (RDREG) RDVAL64 = RSVAL64 + RTVAL64; break;
- case 0x2e: /* DSUB */
+ case 0x2d: /* DADDU */ if (RDREG) RDVAL64 = RSVAL64 + RTVAL64; break;
+ case 0x2e: /* DSUB */
if (ENABLE_OVERFLOWS && RSVAL64 < RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1);
else if (RDREG) RDVAL64 = RSVAL64 - RTVAL64;
break;
- case 0x2f: /* DSUBU */ if (RDREG) RDVAL64 = RSVAL64 - RTVAL64; break;
- case 0x30: /* TGE */ if ((INT64)RSVAL64 >= (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x31: /* TGEU */ if (RSVAL64 >= RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x32: /* TLT */ if ((INT64)RSVAL64 < (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x33: /* TLTU */ if (RSVAL64 < RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x34: /* TEQ */ if (RSVAL64 == RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x36: /* TNE */ if (RSVAL64 != RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x38: /* DSLL */ if (RDREG) RDVAL64 = RTVAL64 << SHIFT; break;
- case 0x3a: /* DSRL */ if (RDREG) RDVAL64 = RTVAL64 >> SHIFT; break;
- case 0x3b: /* DSRA */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> SHIFT; break;
- case 0x3c: /* DSLL32 */ if (RDREG) RDVAL64 = RTVAL64 << (SHIFT + 32); break;
- case 0x3e: /* DSRL32 */ if (RDREG) RDVAL64 = RTVAL64 >> (SHIFT + 32); break;
- case 0x3f: /* DSRA32 */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (SHIFT + 32); break;
- default: /* ??? */ invalid_instruction(op); break;
+ case 0x2f: /* DSUBU */ if (RDREG) RDVAL64 = RSVAL64 - RTVAL64; break;
+ case 0x30: /* TGE */ if ((INT64)RSVAL64 >= (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x31: /* TGEU */ if (RSVAL64 >= RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x32: /* TLT */ if ((INT64)RSVAL64 < (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x33: /* TLTU */ if (RSVAL64 < RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x34: /* TEQ */ if (RSVAL64 == RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x36: /* TNE */ if (RSVAL64 != RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x38: /* DSLL */ if (RDREG) RDVAL64 = RTVAL64 << SHIFT; break;
+ case 0x3a: /* DSRL */ if (RDREG) RDVAL64 = RTVAL64 >> SHIFT; break;
+ case 0x3b: /* DSRA */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> SHIFT; break;
+ case 0x3c: /* DSLL32 */ if (RDREG) RDVAL64 = RTVAL64 << (SHIFT + 32); break;
+ case 0x3e: /* DSRL32 */ if (RDREG) RDVAL64 = RTVAL64 >> (SHIFT + 32); break;
+ case 0x3f: /* DSRA32 */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (SHIFT + 32); break;
+ default: /* ??? */ invalid_instruction(op); break;
}
break;
- case 0x01: /* REGIMM */
+ case 0x01: /* REGIMM */
switch (RTREG)
{
- case 0x00: /* BLTZ */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); break;
- case 0x01: /* BGEZ */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); break;
- case 0x02: /* BLTZL */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x03: /* BGEZL */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x08: /* TGEI */ if ((INT64)RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x09: /* TGEIU */ if (RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x0a: /* TLTI */ if ((INT64)RSVAL64 < SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x0b: /* TLTIU */ if (RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x0c: /* TEQI */ if (RSVAL64 == SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x0e: /* TNEI */ if (RSVAL64 != SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
- case 0x10: /* BLTZAL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31); break;
- case 0x11: /* BGEZAL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31); break;
- case 0x12: /* BLTZALL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31) else mips3.core.pc += 4; break;
- case 0x13: /* BGEZALL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31) else mips3.core.pc += 4; break;
- default: /* ??? */ invalid_instruction(op); break;
+ case 0x00: /* BLTZ */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); break;
+ case 0x01: /* BGEZ */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); break;
+ case 0x02: /* BLTZL */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x03: /* BGEZL */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x08: /* TGEI */ if ((INT64)RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x09: /* TGEIU */ if (RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x0a: /* TLTI */ if ((INT64)RSVAL64 < SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x0b: /* TLTIU */ if (RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x0c: /* TEQI */ if (RSVAL64 == SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x0e: /* TNEI */ if (RSVAL64 != SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break;
+ case 0x10: /* BLTZAL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31); break;
+ case 0x11: /* BGEZAL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31); break;
+ case 0x12: /* BLTZALL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31) else mips3.core.pc += 4; break;
+ case 0x13: /* BGEZALL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31) else mips3.core.pc += 4; break;
+ default: /* ??? */ invalid_instruction(op); break;
}
break;
- case 0x02: /* J */ ABSPC(LIMMVAL); break;
- case 0x03: /* JAL */ ABSPCL(LIMMVAL,31); break;
- case 0x04: /* BEQ */ if (RSVAL64 == RTVAL64) ADDPC(SIMMVAL); break;
- case 0x05: /* BNE */ if (RSVAL64 != RTVAL64) ADDPC(SIMMVAL); break;
- case 0x06: /* BLEZ */ if ((INT64)RSVAL64 <= 0) ADDPC(SIMMVAL); break;
- case 0x07: /* BGTZ */ if ((INT64)RSVAL64 > 0) ADDPC(SIMMVAL); break;
- case 0x08: /* ADDI */
+ case 0x02: /* J */ ABSPC(LIMMVAL); break;
+ case 0x03: /* JAL */ ABSPCL(LIMMVAL,31); break;
+ case 0x04: /* BEQ */ if (RSVAL64 == RTVAL64) ADDPC(SIMMVAL); break;
+ case 0x05: /* BNE */ if (RSVAL64 != RTVAL64) ADDPC(SIMMVAL); break;
+ case 0x06: /* BLEZ */ if ((INT64)RSVAL64 <= 0) ADDPC(SIMMVAL); break;
+ case 0x07: /* BGTZ */ if ((INT64)RSVAL64 > 0) ADDPC(SIMMVAL); break;
+ case 0x08: /* ADDI */
if (ENABLE_OVERFLOWS && RSVAL32 > ~SIMMVAL) generate_exception(EXCEPTION_OVERFLOW, 1);
else if (RTREG) RTVAL64 = (INT32)(RSVAL32 + SIMMVAL);
break;
- case 0x09: /* ADDIU */ if (RTREG) RTVAL64 = (INT32)(RSVAL32 + SIMMVAL); break;
- case 0x0a: /* SLTI */ if (RTREG) RTVAL64 = (INT64)RSVAL64 < (INT64)SIMMVAL; break;
- case 0x0b: /* SLTIU */ if (RTREG) RTVAL64 = (UINT64)RSVAL64 < (UINT64)SIMMVAL; break;
- case 0x0c: /* ANDI */ if (RTREG) RTVAL64 = RSVAL64 & UIMMVAL; break;
- case 0x0d: /* ORI */ if (RTREG) RTVAL64 = RSVAL64 | UIMMVAL; break;
- case 0x0e: /* XORI */ if (RTREG) RTVAL64 = RSVAL64 ^ UIMMVAL; break;
- case 0x0f: /* LUI */ if (RTREG) RTVAL64 = (INT32)(UIMMVAL << 16); break;
- case 0x10: /* COP0 */ handle_cop0(op); break;
- case 0x11: /* COP1 */ if (IS_FR0) handle_cop1_fr0(op); else handle_cop1_fr1(op); break;
- case 0x12: /* COP2 */ handle_cop2(op); break;
- case 0x13: /* COP1X - R5000 */if (IS_FR0) handle_cop1x_fr0(op); else handle_cop1x_fr1(op); break;
- case 0x14: /* BEQL */ if (RSVAL64 == RTVAL64) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x15: /* BNEL */ if (RSVAL64 != RTVAL64) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x16: /* BLEZL */ if ((INT64)RSVAL64 <= 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x17: /* BGTZL */ if ((INT64)RSVAL64 > 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
- case 0x18: /* DADDI */
+ case 0x09: /* ADDIU */ if (RTREG) RTVAL64 = (INT32)(RSVAL32 + SIMMVAL); break;
+ case 0x0a: /* SLTI */ if (RTREG) RTVAL64 = (INT64)RSVAL64 < (INT64)SIMMVAL; break;
+ case 0x0b: /* SLTIU */ if (RTREG) RTVAL64 = (UINT64)RSVAL64 < (UINT64)SIMMVAL; break;
+ case 0x0c: /* ANDI */ if (RTREG) RTVAL64 = RSVAL64 & UIMMVAL; break;
+ case 0x0d: /* ORI */ if (RTREG) RTVAL64 = RSVAL64 | UIMMVAL; break;
+ case 0x0e: /* XORI */ if (RTREG) RTVAL64 = RSVAL64 ^ UIMMVAL; break;
+ case 0x0f: /* LUI */ if (RTREG) RTVAL64 = (INT32)(UIMMVAL << 16); break;
+ case 0x10: /* COP0 */ handle_cop0(op); break;
+ case 0x11: /* COP1 */ if (IS_FR0) handle_cop1_fr0(op); else handle_cop1_fr1(op); break;
+ case 0x12: /* COP2 */ handle_cop2(op); break;
+ case 0x13: /* COP1X - R5000 */if (IS_FR0) handle_cop1x_fr0(op); else handle_cop1x_fr1(op); break;
+ case 0x14: /* BEQL */ if (RSVAL64 == RTVAL64) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x15: /* BNEL */ if (RSVAL64 != RTVAL64) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x16: /* BLEZL */ if ((INT64)RSVAL64 <= 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x17: /* BGTZL */ if ((INT64)RSVAL64 > 0) ADDPC(SIMMVAL); else mips3.core.pc += 4; break;
+ case 0x18: /* DADDI */
if (ENABLE_OVERFLOWS && RSVAL64 > ~SIMMVAL) generate_exception(EXCEPTION_OVERFLOW, 1);
else if (RTREG) RTVAL64 = RSVAL64 + (INT64)SIMMVAL;
break;
- case 0x19: /* DADDIU */ if (RTREG) RTVAL64 = RSVAL64 + (UINT64)SIMMVAL; break;
- case 0x1a: /* LDL */ (*mips3.ldl)(op); break;
- case 0x1b: /* LDR */ (*mips3.ldr)(op); break;
- case 0x1c: /* IDT-specific opcodes: mad/madu/mul on R4640/4650, msub on RC32364 */
+ case 0x19: /* DADDIU */ if (RTREG) RTVAL64 = RSVAL64 + (UINT64)SIMMVAL; break;
+ case 0x1a: /* LDL */ (*mips3.ldl)(op); break;
+ case 0x1b: /* LDR */ (*mips3.ldr)(op); break;
+ case 0x1c: /* IDT-specific opcodes: mad/madu/mul on R4640/4650, msub on RC32364 */
switch (op & 0x1f)
{
case 2: /* MUL */
@@ -2061,31 +2061,31 @@ CPU_EXECUTE( mips3 )
default: invalid_instruction(op);
}
break;
- case 0x20: /* LB */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT8)temp; break;
- case 0x21: /* LH */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT16)temp; break;
- case 0x22: /* LWL */ (*mips3.lwl)(op); break;
- case 0x23: /* LW */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT32)temp; break;
- case 0x24: /* LBU */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT8)temp; break;
- case 0x25: /* LHU */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT16)temp; break;
- case 0x26: /* LWR */ (*mips3.lwr)(op); break;
- case 0x27: /* LWU */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; break;
- case 0x28: /* SB */ WBYTE(SIMMVAL+RSVAL32, RTVAL32); break;
- case 0x29: /* SH */ WHALF(SIMMVAL+RSVAL32, RTVAL32); break;
- case 0x2a: /* SWL */ (*mips3.swl)(op); break;
- case 0x2b: /* SW */ WWORD(SIMMVAL+RSVAL32, RTVAL32); break;
- case 0x2c: /* SDL */ (*mips3.sdl)(op); break;
- case 0x2d: /* SDR */ (*mips3.sdr)(op); break;
- case 0x2e: /* SWR */ (*mips3.swr)(op); break;
- case 0x2f: /* CACHE */ /* effective no-op */ break;
- case 0x30: /* LL */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; mips3.ll_value = RTVAL32; break;
- case 0x31: /* LWC1 */ if (RWORD(SIMMVAL+RSVAL32, &temp)) set_cop1_reg32(RTREG, temp); break;
- case 0x32: /* LWC2 */ if (RWORD(SIMMVAL+RSVAL32, &temp)) set_cop2_reg(RTREG, temp); break;
- case 0x33: /* PREF */ /* effective no-op */ break;
- case 0x34: /* LLD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; mips3.lld_value = temp64; break;
- case 0x35: /* LDC1 */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop1_reg64(RTREG, temp64); break;
- case 0x36: /* LDC2 */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop2_reg(RTREG, temp64); break;
- case 0x37: /* LD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; break;
- case 0x38: /* SC */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG)
+ case 0x20: /* LB */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT8)temp; break;
+ case 0x21: /* LH */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT16)temp; break;
+ case 0x22: /* LWL */ (*mips3.lwl)(op); break;
+ case 0x23: /* LW */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (INT32)temp; break;
+ case 0x24: /* LBU */ if (RBYTE(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT8)temp; break;
+ case 0x25: /* LHU */ if (RHALF(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT16)temp; break;
+ case 0x26: /* LWR */ (*mips3.lwr)(op); break;
+ case 0x27: /* LWU */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; break;
+ case 0x28: /* SB */ WBYTE(SIMMVAL+RSVAL32, RTVAL32); break;
+ case 0x29: /* SH */ WHALF(SIMMVAL+RSVAL32, RTVAL32); break;
+ case 0x2a: /* SWL */ (*mips3.swl)(op); break;
+ case 0x2b: /* SW */ WWORD(SIMMVAL+RSVAL32, RTVAL32); break;
+ case 0x2c: /* SDL */ (*mips3.sdl)(op); break;
+ case 0x2d: /* SDR */ (*mips3.sdr)(op); break;
+ case 0x2e: /* SWR */ (*mips3.swr)(op); break;
+ case 0x2f: /* CACHE */ /* effective no-op */ break;
+ case 0x30: /* LL */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) RTVAL64 = (UINT32)temp; mips3.ll_value = RTVAL32; break;
+ case 0x31: /* LWC1 */ if (RWORD(SIMMVAL+RSVAL32, &temp)) set_cop1_reg32(RTREG, temp); break;
+ case 0x32: /* LWC2 */ if (RWORD(SIMMVAL+RSVAL32, &temp)) set_cop2_reg(RTREG, temp); break;
+ case 0x33: /* PREF */ /* effective no-op */ break;
+ case 0x34: /* LLD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; mips3.lld_value = temp64; break;
+ case 0x35: /* LDC1 */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop1_reg64(RTREG, temp64); break;
+ case 0x36: /* LDC2 */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop2_reg(RTREG, temp64); break;
+ case 0x37: /* LD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; break;
+ case 0x38: /* SC */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG)
{
if (temp == mips3.ll_value)
{
@@ -2098,10 +2098,10 @@ CPU_EXECUTE( mips3 )
}
}
break;
- case 0x39: /* SWC1 */ WWORD(SIMMVAL+RSVAL32, get_cop1_reg32(RTREG)); break;
- case 0x3a: /* SWC2 */ WWORD(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break;
- case 0x3b: /* SWC3 */ invalid_instruction(op); break;
- case 0x3c: /* SCD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG)
+ case 0x39: /* SWC1 */ WWORD(SIMMVAL+RSVAL32, get_cop1_reg32(RTREG)); break;
+ case 0x3a: /* SWC2 */ WWORD(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break;
+ case 0x3b: /* SWC3 */ invalid_instruction(op); break;
+ case 0x3c: /* SCD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG)
{
if (temp64 == mips3.lld_value)
{
@@ -2114,10 +2114,10 @@ CPU_EXECUTE( mips3 )
}
}
break;
- case 0x3d: /* SDC1 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop1_reg64(RTREG)); break;
- case 0x3e: /* SDC2 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break;
- case 0x3f: /* SD */ WDOUBLE(SIMMVAL+RSVAL32, RTVAL64); break;
- default: /* ??? */ invalid_instruction(op); break;
+ case 0x3d: /* SDC1 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop1_reg64(RTREG)); break;
+ case 0x3e: /* SDC2 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break;
+ case 0x3f: /* SD */ WDOUBLE(SIMMVAL+RSVAL32, RTVAL64); break;
+ default: /* ??? */ invalid_instruction(op); break;
}
mips3.core.icount--;
@@ -2305,22 +2305,22 @@ static CPU_GET_INFO( mips3 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mips3); break;
- case CPUINFO_INT_PREVIOUSPC: info->i = mips3.ppc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mips3); break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = mips3.ppc; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mips3); break;
- case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mips3); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mips3); break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(mips3); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mips3); break;
+ case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mips3); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mips3); break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(mips3); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
/* --- everything else is handled generically --- */
- default: mips3com_get_info(&mips3.core, state, info); break;
+ default: mips3com_get_info(&mips3.core, state, info); break;
}
}
@@ -2348,16 +2348,16 @@ CPU_GET_INFO( vr4300be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2366,16 +2366,16 @@ CPU_GET_INFO( vr4300le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2385,16 +2385,16 @@ CPU_GET_INFO( vr4310be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2403,16 +2403,16 @@ CPU_GET_INFO( vr4310le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2438,16 +2438,16 @@ CPU_GET_INFO( r4600be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2456,16 +2456,16 @@ CPU_GET_INFO( r4600le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2492,16 +2492,16 @@ CPU_GET_INFO( r4650be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2510,16 +2510,16 @@ CPU_GET_INFO( r4650le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2546,16 +2546,16 @@ CPU_GET_INFO( r4700be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2565,16 +2565,16 @@ CPU_GET_INFO( r4700le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2601,16 +2601,16 @@ CPU_GET_INFO( r5000be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2619,16 +2619,16 @@ CPU_GET_INFO( r5000le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2655,16 +2655,16 @@ CPU_GET_INFO( qed5271be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2673,16 +2673,16 @@ CPU_GET_INFO( qed5271le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2709,16 +2709,16 @@ CPU_GET_INFO( rm7000be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -2727,16 +2727,16 @@ CPU_GET_INFO( rm7000le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
diff --git a/src/emu/cpu/mips/mips3.h b/src/emu/cpu/mips/mips3.h
index 69d5d5a265a..d7bc0221045 100644
--- a/src/emu/cpu/mips/mips3.h
+++ b/src/emu/cpu/mips/mips3.h
@@ -171,8 +171,8 @@ enum
MIPS3_BADVADDR
};
-#define MIPS3_MAX_FASTRAM 4
-#define MIPS3_MAX_HOTSPOTS 16
+#define MIPS3_MAX_FASTRAM 4
+#define MIPS3_MAX_HOTSPOTS 16
enum
{
@@ -197,12 +197,12 @@ enum
INTERRUPT CONSTANTS
***************************************************************************/
-#define MIPS3_IRQ0 0 /* IRQ0 */
-#define MIPS3_IRQ1 1 /* IRQ1 */
-#define MIPS3_IRQ2 2 /* IRQ2 */
-#define MIPS3_IRQ3 3 /* IRQ3 */
-#define MIPS3_IRQ4 4 /* IRQ4 */
-#define MIPS3_IRQ5 5 /* IRQ5 */
+#define MIPS3_IRQ0 0 /* IRQ0 */
+#define MIPS3_IRQ1 1 /* IRQ1 */
+#define MIPS3_IRQ2 2 /* IRQ2 */
+#define MIPS3_IRQ3 3 /* IRQ3 */
+#define MIPS3_IRQ4 4 /* IRQ4 */
+#define MIPS3_IRQ5 5 /* IRQ5 */
@@ -212,9 +212,9 @@ enum
struct mips3_config
{
- size_t icache; /* code cache size */
- size_t dcache; /* data cache size */
- UINT32 system_clock; /* system clock rate */
+ size_t icache; /* code cache size */
+ size_t dcache; /* data cache size */
+ UINT32 system_clock; /* system clock rate */
};
@@ -257,14 +257,14 @@ DECLARE_LEGACY_CPU_DEVICE(RM7000LE, rm7000le);
***************************************************************************/
/* fix me -- how do we make this work?? */
-#define MIPS3DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
-#define MIPS3DRC_STRICT_COP1 0x0002 /* validate all COP1 instructions */
-#define MIPS3DRC_STRICT_COP2 0x0004 /* validate all COP2 instructions */
-#define MIPS3DRC_FLUSH_PC 0x0008 /* flush the PC value before each memory access */
-#define MIPS3DRC_CHECK_OVERFLOWS 0x0010 /* actually check overflows on add/sub instructions */
-
-#define MIPS3DRC_COMPATIBLE_OPTIONS (MIPS3DRC_STRICT_VERIFY | MIPS3DRC_STRICT_COP1 | MIPS3DRC_STRICT_COP2 | MIPS3DRC_FLUSH_PC)
-#define MIPS3DRC_FASTEST_OPTIONS (0)
+#define MIPS3DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
+#define MIPS3DRC_STRICT_COP1 0x0002 /* validate all COP1 instructions */
+#define MIPS3DRC_STRICT_COP2 0x0004 /* validate all COP2 instructions */
+#define MIPS3DRC_FLUSH_PC 0x0008 /* flush the PC value before each memory access */
+#define MIPS3DRC_CHECK_OVERFLOWS 0x0010 /* actually check overflows on add/sub instructions */
+
+#define MIPS3DRC_COMPATIBLE_OPTIONS (MIPS3DRC_STRICT_VERIFY | MIPS3DRC_STRICT_COP1 | MIPS3DRC_STRICT_COP2 | MIPS3DRC_FLUSH_PC)
+#define MIPS3DRC_FASTEST_OPTIONS (0)
diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c
index 1fe4829efc9..6ebd127439a 100644
--- a/src/emu/cpu/mips/mips3com.c
+++ b/src/emu/cpu/mips/mips3com.c
@@ -14,8 +14,8 @@
DEBUGGING
***************************************************************************/
-#define PRINTF_TLB (0)
-#define USE_ABI_REG_NAMES (1)
+#define PRINTF_TLB (0)
+#define USE_ABI_REG_NAMES (1)
/***************************************************************************
@@ -352,97 +352,97 @@ void mips3com_set_info(mips3_state *mips, UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ0: mips3com_set_irq_line(mips, MIPS3_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ1: mips3com_set_irq_line(mips, MIPS3_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ2: mips3com_set_irq_line(mips, MIPS3_IRQ2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ3: mips3com_set_irq_line(mips, MIPS3_IRQ3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ4: mips3com_set_irq_line(mips, MIPS3_IRQ4, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ5: mips3com_set_irq_line(mips, MIPS3_IRQ5, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ0: mips3com_set_irq_line(mips, MIPS3_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ1: mips3com_set_irq_line(mips, MIPS3_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ2: mips3com_set_irq_line(mips, MIPS3_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ3: mips3com_set_irq_line(mips, MIPS3_IRQ3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ4: mips3com_set_irq_line(mips, MIPS3_IRQ4, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ5: mips3com_set_irq_line(mips, MIPS3_IRQ5, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + MIPS3_PC: mips->pc = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_SR: mips->cpr[0][COP0_Status] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_EPC: mips->cpr[0][COP0_EPC] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_CAUSE: mips->cpr[0][COP0_Cause] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_COUNT: mips->cpr[0][COP0_Count] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_COMPARE: mips->cpr[0][COP0_Compare] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_INDEX: mips->cpr[0][COP0_Index] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_RANDOM: mips->cpr[0][COP0_Random] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_ENTRYHI: mips->cpr[0][COP0_EntryHi] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO0: mips->cpr[0][COP0_EntryLo0] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO1: mips->cpr[0][COP0_EntryLo1] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_PAGEMASK: mips->cpr[0][COP0_PageMask] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_WIRED: mips->cpr[0][COP0_Wired] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_BADVADDR: mips->cpr[0][COP0_BadVAddr] = info->i; break;
-
- case CPUINFO_INT_REGISTER + MIPS3_R0: /* can't change R0 */ break;
- case CPUINFO_INT_REGISTER + MIPS3_R1: mips->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R2: mips->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R3: mips->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R4: mips->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R5: mips->r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R6: mips->r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R7: mips->r[7] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R8: mips->r[8] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R9: mips->r[9] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R10: mips->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R11: mips->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R12: mips->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R13: mips->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R14: mips->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R15: mips->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R16: mips->r[16] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R17: mips->r[17] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R18: mips->r[18] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R19: mips->r[19] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R20: mips->r[20] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R21: mips->r[21] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R22: mips->r[22] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R23: mips->r[23] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R24: mips->r[24] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R25: mips->r[25] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R26: mips->r[26] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R27: mips->r[27] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R28: mips->r[28] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R29: mips->r[29] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_R30: mips->r[30] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_PC: mips->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_SR: mips->cpr[0][COP0_Status] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_EPC: mips->cpr[0][COP0_EPC] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_CAUSE: mips->cpr[0][COP0_Cause] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_COUNT: mips->cpr[0][COP0_Count] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_COMPARE: mips->cpr[0][COP0_Compare] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_INDEX: mips->cpr[0][COP0_Index] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_RANDOM: mips->cpr[0][COP0_Random] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_ENTRYHI: mips->cpr[0][COP0_EntryHi] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO0: mips->cpr[0][COP0_EntryLo0] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO1: mips->cpr[0][COP0_EntryLo1] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_PAGEMASK: mips->cpr[0][COP0_PageMask] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_WIRED: mips->cpr[0][COP0_Wired] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_BADVADDR: mips->cpr[0][COP0_BadVAddr] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + MIPS3_R0: /* can't change R0 */ break;
+ case CPUINFO_INT_REGISTER + MIPS3_R1: mips->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R2: mips->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R3: mips->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R4: mips->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R5: mips->r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R6: mips->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R7: mips->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R8: mips->r[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R9: mips->r[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R10: mips->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R11: mips->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R12: mips->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R13: mips->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R14: mips->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R15: mips->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R16: mips->r[16] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R17: mips->r[17] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R18: mips->r[18] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R19: mips->r[19] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R20: mips->r[20] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R21: mips->r[21] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R22: mips->r[22] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R23: mips->r[23] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R24: mips->r[24] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R25: mips->r[25] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R26: mips->r[26] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R27: mips->r[27] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R28: mips->r[28] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R29: mips->r[29] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R30: mips->r[30] = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + MIPS3_R31: mips->r[31] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_HI: mips->r[REG_HI] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_LO: mips->r[REG_LO] = info->i; break;
-
- case CPUINFO_INT_REGISTER + MIPS3_FPR0: mips->cpr[1][0] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR1: mips->cpr[1][1] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR2: mips->cpr[1][2] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR3: mips->cpr[1][3] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR4: mips->cpr[1][4] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR5: mips->cpr[1][5] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR6: mips->cpr[1][6] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR7: mips->cpr[1][7] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR8: mips->cpr[1][8] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR9: mips->cpr[1][9] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR10: mips->cpr[1][10] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR11: mips->cpr[1][11] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR12: mips->cpr[1][12] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR13: mips->cpr[1][13] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR14: mips->cpr[1][14] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR15: mips->cpr[1][15] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR16: mips->cpr[1][16] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR17: mips->cpr[1][17] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR18: mips->cpr[1][18] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR19: mips->cpr[1][19] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR20: mips->cpr[1][20] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR21: mips->cpr[1][21] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR22: mips->cpr[1][22] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR23: mips->cpr[1][23] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR24: mips->cpr[1][24] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR25: mips->cpr[1][25] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR26: mips->cpr[1][26] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR27: mips->cpr[1][27] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR28: mips->cpr[1][28] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR29: mips->cpr[1][29] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR30: mips->cpr[1][30] = info->i; break;
- case CPUINFO_INT_REGISTER + MIPS3_FPR31: mips->cpr[1][31] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R31: mips->r[31] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_HI: mips->r[REG_HI] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_LO: mips->r[REG_LO] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + MIPS3_FPR0: mips->cpr[1][0] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR1: mips->cpr[1][1] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR2: mips->cpr[1][2] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR3: mips->cpr[1][3] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR4: mips->cpr[1][4] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR5: mips->cpr[1][5] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR6: mips->cpr[1][6] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR7: mips->cpr[1][7] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR8: mips->cpr[1][8] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR9: mips->cpr[1][9] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR10: mips->cpr[1][10] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR11: mips->cpr[1][11] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR12: mips->cpr[1][12] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR13: mips->cpr[1][13] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR14: mips->cpr[1][14] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR15: mips->cpr[1][15] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR16: mips->cpr[1][16] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR17: mips->cpr[1][17] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR18: mips->cpr[1][18] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR19: mips->cpr[1][19] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR20: mips->cpr[1][20] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR21: mips->cpr[1][21] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR22: mips->cpr[1][22] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR23: mips->cpr[1][23] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR24: mips->cpr[1][24] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR25: mips->cpr[1][25] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR26: mips->cpr[1][26] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR27: mips->cpr[1][27] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR28: mips->cpr[1][28] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR29: mips->cpr[1][29] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR30: mips->cpr[1][30] = info->i; break;
+ case CPUINFO_INT_REGISTER + MIPS3_FPR31: mips->cpr[1][31] = info->i; break;
}
}
@@ -457,286 +457,286 @@ void mips3com_get_info(mips3_state *mips, UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: /* provided by core */ break;
- case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = mips->bigendian ? ENDIANNESS_BIG : ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = MIPS3_MAX_PADDR_SHIFT;break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = MIPS3_MIN_PAGE_SHIFT; break;
-
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ0: info->i = (mips->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ1: info->i = (mips->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ2: info->i = (mips->cpr[0][COP0_Cause] & 0x1000) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ3: info->i = (mips->cpr[0][COP0_Cause] & 0x2000) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ4: info->i = (mips->cpr[0][COP0_Cause] & 0x4000) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ5: info->i = (mips->cpr[0][COP0_Cause] & 0x8000) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* optionally implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: /* provided by core */ break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = mips->bigendian ? ENDIANNESS_BIG : ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = MIPS3_MAX_PADDR_SHIFT;break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = MIPS3_MIN_PAGE_SHIFT; break;
+
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ0: info->i = (mips->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ1: info->i = (mips->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ2: info->i = (mips->cpr[0][COP0_Cause] & 0x1000) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ3: info->i = (mips->cpr[0][COP0_Cause] & 0x2000) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ4: info->i = (mips->cpr[0][COP0_Cause] & 0x4000) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + MIPS3_IRQ5: info->i = (mips->cpr[0][COP0_Cause] & 0x8000) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* optionally implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + MIPS3_PC: info->i = mips->pc; break;
- case CPUINFO_INT_REGISTER + MIPS3_SR: info->i = mips->cpr[0][COP0_Status]; break;
- case CPUINFO_INT_REGISTER + MIPS3_EPC: info->i = mips->cpr[0][COP0_EPC]; break;
- case CPUINFO_INT_REGISTER + MIPS3_CAUSE: info->i = mips->cpr[0][COP0_Cause]; break;
- case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((mips->device->total_cycles() - mips->count_zero_time) / 2); break;
- case CPUINFO_INT_REGISTER + MIPS3_COMPARE: info->i = mips->cpr[0][COP0_Compare]; break;
- case CPUINFO_INT_REGISTER + MIPS3_INDEX: info->i = mips->cpr[0][COP0_Index]; break;
- case CPUINFO_INT_REGISTER + MIPS3_RANDOM: info->i = mips->cpr[0][COP0_Random]; break;
- case CPUINFO_INT_REGISTER + MIPS3_ENTRYHI: info->i = mips->cpr[0][COP0_EntryHi]; break;
- case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO0: info->i = mips->cpr[0][COP0_EntryLo0]; break;
- case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO1: info->i = mips->cpr[0][COP0_EntryLo1]; break;
- case CPUINFO_INT_REGISTER + MIPS3_PAGEMASK: info->i = mips->cpr[0][COP0_PageMask]; break;
- case CPUINFO_INT_REGISTER + MIPS3_WIRED: info->i = mips->cpr[0][COP0_Wired]; break;
- case CPUINFO_INT_REGISTER + MIPS3_BADVADDR: info->i = mips->cpr[0][COP0_BadVAddr]; break;
-
- case CPUINFO_INT_REGISTER + MIPS3_R0: info->i = mips->r[0]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R1: info->i = mips->r[1]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R2: info->i = mips->r[2]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R3: info->i = mips->r[3]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R4: info->i = mips->r[4]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R5: info->i = mips->r[5]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R6: info->i = mips->r[6]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R7: info->i = mips->r[7]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R8: info->i = mips->r[8]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R9: info->i = mips->r[9]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R10: info->i = mips->r[10]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R11: info->i = mips->r[11]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R12: info->i = mips->r[12]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R13: info->i = mips->r[13]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R14: info->i = mips->r[14]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R15: info->i = mips->r[15]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R16: info->i = mips->r[16]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R17: info->i = mips->r[17]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R18: info->i = mips->r[18]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R19: info->i = mips->r[19]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R20: info->i = mips->r[20]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R21: info->i = mips->r[21]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R22: info->i = mips->r[22]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R23: info->i = mips->r[23]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R24: info->i = mips->r[24]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R25: info->i = mips->r[25]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R26: info->i = mips->r[26]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R27: info->i = mips->r[27]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R28: info->i = mips->r[28]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R29: info->i = mips->r[29]; break;
- case CPUINFO_INT_REGISTER + MIPS3_R30: info->i = mips->r[30]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_PC: info->i = mips->pc; break;
+ case CPUINFO_INT_REGISTER + MIPS3_SR: info->i = mips->cpr[0][COP0_Status]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_EPC: info->i = mips->cpr[0][COP0_EPC]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_CAUSE: info->i = mips->cpr[0][COP0_Cause]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_COUNT: info->i = ((mips->device->total_cycles() - mips->count_zero_time) / 2); break;
+ case CPUINFO_INT_REGISTER + MIPS3_COMPARE: info->i = mips->cpr[0][COP0_Compare]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_INDEX: info->i = mips->cpr[0][COP0_Index]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_RANDOM: info->i = mips->cpr[0][COP0_Random]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_ENTRYHI: info->i = mips->cpr[0][COP0_EntryHi]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO0: info->i = mips->cpr[0][COP0_EntryLo0]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_ENTRYLO1: info->i = mips->cpr[0][COP0_EntryLo1]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_PAGEMASK: info->i = mips->cpr[0][COP0_PageMask]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_WIRED: info->i = mips->cpr[0][COP0_Wired]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_BADVADDR: info->i = mips->cpr[0][COP0_BadVAddr]; break;
+
+ case CPUINFO_INT_REGISTER + MIPS3_R0: info->i = mips->r[0]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R1: info->i = mips->r[1]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R2: info->i = mips->r[2]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R3: info->i = mips->r[3]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R4: info->i = mips->r[4]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R5: info->i = mips->r[5]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R6: info->i = mips->r[6]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R7: info->i = mips->r[7]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R8: info->i = mips->r[8]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R9: info->i = mips->r[9]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R10: info->i = mips->r[10]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R11: info->i = mips->r[11]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R12: info->i = mips->r[12]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R13: info->i = mips->r[13]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R14: info->i = mips->r[14]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R15: info->i = mips->r[15]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R16: info->i = mips->r[16]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R17: info->i = mips->r[17]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R18: info->i = mips->r[18]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R19: info->i = mips->r[19]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R20: info->i = mips->r[20]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R21: info->i = mips->r[21]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R22: info->i = mips->r[22]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R23: info->i = mips->r[23]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R24: info->i = mips->r[24]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R25: info->i = mips->r[25]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R26: info->i = mips->r[26]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R27: info->i = mips->r[27]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R28: info->i = mips->r[28]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R29: info->i = mips->r[29]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R30: info->i = mips->r[30]; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + MIPS3_R31: info->i = mips->r[31]; break;
- case CPUINFO_INT_REGISTER + MIPS3_HI: info->i = mips->r[REG_HI]; break;
- case CPUINFO_INT_REGISTER + MIPS3_LO: info->i = mips->r[REG_LO]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_R31: info->i = mips->r[31]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_HI: info->i = mips->r[REG_HI]; break;
+ case CPUINFO_INT_REGISTER + MIPS3_LO: info->i = mips->r[REG_LO]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: /* provided by core */ break;
- case CPUINFO_FCT_INIT: /* provided by core */ break;
- case CPUINFO_FCT_RESET: /* provided by core */ break;
- case CPUINFO_FCT_EXIT: /* provided by core */ break;
- case CPUINFO_FCT_EXECUTE: /* provided by core */ break;
- case CPUINFO_FCT_TRANSLATE: /* provided by core */ break;
- case CPUINFO_FCT_DISASSEMBLE: /* provided by core */ break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mips->icount; break;
+ case CPUINFO_FCT_SET_INFO: /* provided by core */ break;
+ case CPUINFO_FCT_INIT: /* provided by core */ break;
+ case CPUINFO_FCT_RESET: /* provided by core */ break;
+ case CPUINFO_FCT_EXIT: /* provided by core */ break;
+ case CPUINFO_FCT_EXECUTE: /* provided by core */ break;
+ case CPUINFO_FCT_TRANSLATE: /* provided by core */ break;
+ case CPUINFO_FCT_DISASSEMBLE: /* provided by core */ break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &mips->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MIPS III"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "MIPS III"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "3.0"); break;
- case CPUINFO_STR_SOURCE_FILE: /* provided by core */ break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + MIPS3_PC: sprintf(info->s, "PC: %08X", mips->pc); break;
- case CPUINFO_STR_REGISTER + MIPS3_SR: sprintf(info->s, "SR: %08X", (UINT32)mips->cpr[0][COP0_Status]); break;
- case CPUINFO_STR_REGISTER + MIPS3_EPC: sprintf(info->s, "EPC:%08X", (UINT32)mips->cpr[0][COP0_EPC]); break;
- case CPUINFO_STR_REGISTER + MIPS3_CAUSE: sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break;
- case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((mips->device->total_cycles() - mips->count_zero_time) / 2)); break;
- case CPUINFO_STR_REGISTER + MIPS3_COMPARE: sprintf(info->s, "Compare:%08X", (UINT32)mips->cpr[0][COP0_Compare]); break;
- case CPUINFO_STR_REGISTER + MIPS3_INDEX: sprintf(info->s, "Index:%08X", (UINT32)mips->cpr[0][COP0_Index]); break;
- case CPUINFO_STR_REGISTER + MIPS3_RANDOM: sprintf(info->s, "Random:%08X", (UINT32)mips->cpr[0][COP0_Random]); break;
- case CPUINFO_STR_REGISTER + MIPS3_ENTRYHI: sprintf(info->s, "EntryHi:%08X%08X", (UINT32)(mips->cpr[0][COP0_EntryHi] >> 32), (UINT32)mips->cpr[0][COP0_EntryHi]); break;
- case CPUINFO_STR_REGISTER + MIPS3_ENTRYLO0: sprintf(info->s, "EntryLo0:%08X%08X", (UINT32)(mips->cpr[0][COP0_EntryLo0] >> 32), (UINT32)mips->cpr[0][COP0_EntryLo0]); break;
- case CPUINFO_STR_REGISTER + MIPS3_ENTRYLO1: sprintf(info->s, "EntryLo1:%08X%08X", (UINT32)(mips->cpr[0][COP0_EntryLo1] >> 32), (UINT32)mips->cpr[0][COP0_EntryLo1]); break;
- case CPUINFO_STR_REGISTER + MIPS3_PAGEMASK: sprintf(info->s, "PageMask:%08X%08X", (UINT32)(mips->cpr[0][COP0_PageMask] >> 32), (UINT32)mips->cpr[0][COP0_PageMask]); break;
- case CPUINFO_STR_REGISTER + MIPS3_WIRED: sprintf(info->s, "Wired:%08X", (UINT32)mips->cpr[0][COP0_Wired]); break;
- case CPUINFO_STR_REGISTER + MIPS3_BADVADDR: sprintf(info->s, "BadVAddr:%08X", (UINT32)mips->cpr[0][COP0_BadVAddr]); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MIPS III"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "MIPS III"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "3.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: /* provided by core */ break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + MIPS3_PC: sprintf(info->s, "PC: %08X", mips->pc); break;
+ case CPUINFO_STR_REGISTER + MIPS3_SR: sprintf(info->s, "SR: %08X", (UINT32)mips->cpr[0][COP0_Status]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_EPC: sprintf(info->s, "EPC:%08X", (UINT32)mips->cpr[0][COP0_EPC]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_CAUSE: sprintf(info->s, "Cause:%08X", (UINT32)mips->cpr[0][COP0_Cause]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_COUNT: sprintf(info->s, "Count:%08X", (UINT32)((mips->device->total_cycles() - mips->count_zero_time) / 2)); break;
+ case CPUINFO_STR_REGISTER + MIPS3_COMPARE: sprintf(info->s, "Compare:%08X", (UINT32)mips->cpr[0][COP0_Compare]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_INDEX: sprintf(info->s, "Index:%08X", (UINT32)mips->cpr[0][COP0_Index]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_RANDOM: sprintf(info->s, "Random:%08X", (UINT32)mips->cpr[0][COP0_Random]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_ENTRYHI: sprintf(info->s, "EntryHi:%08X%08X", (UINT32)(mips->cpr[0][COP0_EntryHi] >> 32), (UINT32)mips->cpr[0][COP0_EntryHi]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_ENTRYLO0: sprintf(info->s, "EntryLo0:%08X%08X", (UINT32)(mips->cpr[0][COP0_EntryLo0] >> 32), (UINT32)mips->cpr[0][COP0_EntryLo0]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_ENTRYLO1: sprintf(info->s, "EntryLo1:%08X%08X", (UINT32)(mips->cpr[0][COP0_EntryLo1] >> 32), (UINT32)mips->cpr[0][COP0_EntryLo1]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_PAGEMASK: sprintf(info->s, "PageMask:%08X%08X", (UINT32)(mips->cpr[0][COP0_PageMask] >> 32), (UINT32)mips->cpr[0][COP0_PageMask]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_WIRED: sprintf(info->s, "Wired:%08X", (UINT32)mips->cpr[0][COP0_Wired]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_BADVADDR: sprintf(info->s, "BadVAddr:%08X", (UINT32)mips->cpr[0][COP0_BadVAddr]); break;
#if USE_ABI_REG_NAMES
- case CPUINFO_STR_REGISTER + MIPS3_R0: sprintf(info->s, "$zero: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R1: sprintf(info->s, " $at: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R2: sprintf(info->s, " $v0: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R3: sprintf(info->s, " $v1: %08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R4: sprintf(info->s, " $a0: %08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R5: sprintf(info->s, " $a1: %08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R6: sprintf(info->s, " $a2: %08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R7: sprintf(info->s, " $a3: %08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R8: sprintf(info->s, " $t0: %08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R9: sprintf(info->s, " $t1: %08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R10: sprintf(info->s, " $t2:%08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R11: sprintf(info->s, " $t3:%08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R12: sprintf(info->s, " $t4:%08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R13: sprintf(info->s, " $t5:%08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R14: sprintf(info->s, " $t6:%08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R15: sprintf(info->s, " $t7:%08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R16: sprintf(info->s, " $s0:%08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R17: sprintf(info->s, " $s1:%08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R18: sprintf(info->s, " $s2:%08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R19: sprintf(info->s, " $s3:%08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R20: sprintf(info->s, " $s4:%08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R21: sprintf(info->s, " $s5:%08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R22: sprintf(info->s, " $s6:%08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R23: sprintf(info->s, " $s7:%08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R24: sprintf(info->s, " $t8:%08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R25: sprintf(info->s, " $t9:%08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R26: sprintf(info->s, " $k0:%08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R27: sprintf(info->s, " $k1:%08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R28: sprintf(info->s, " $gp:%08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R29: sprintf(info->s, " $sp:%08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R30: sprintf(info->s, " $fp:%08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R31: sprintf(info->s, " $ra:%08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R0: sprintf(info->s, "$zero: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R1: sprintf(info->s, " $at: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R2: sprintf(info->s, " $v0: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R3: sprintf(info->s, " $v1: %08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R4: sprintf(info->s, " $a0: %08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R5: sprintf(info->s, " $a1: %08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R6: sprintf(info->s, " $a2: %08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R7: sprintf(info->s, " $a3: %08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R8: sprintf(info->s, " $t0: %08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R9: sprintf(info->s, " $t1: %08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R10: sprintf(info->s, " $t2:%08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R11: sprintf(info->s, " $t3:%08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R12: sprintf(info->s, " $t4:%08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R13: sprintf(info->s, " $t5:%08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R14: sprintf(info->s, " $t6:%08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R15: sprintf(info->s, " $t7:%08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R16: sprintf(info->s, " $s0:%08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R17: sprintf(info->s, " $s1:%08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R18: sprintf(info->s, " $s2:%08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R19: sprintf(info->s, " $s3:%08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R20: sprintf(info->s, " $s4:%08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R21: sprintf(info->s, " $s5:%08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R22: sprintf(info->s, " $s6:%08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R23: sprintf(info->s, " $s7:%08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R24: sprintf(info->s, " $t8:%08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R25: sprintf(info->s, " $t9:%08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R26: sprintf(info->s, " $k0:%08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R27: sprintf(info->s, " $k1:%08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R28: sprintf(info->s, " $gp:%08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R29: sprintf(info->s, " $sp:%08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R30: sprintf(info->s, " $fp:%08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R31: sprintf(info->s, " $ra:%08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
#else
- case CPUINFO_STR_REGISTER + MIPS3_R0: sprintf(info->s, " R0: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R1: sprintf(info->s, " R1: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R2: sprintf(info->s, " R2: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R3: sprintf(info->s, " R3: %08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R4: sprintf(info->s, " R4: %08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R5: sprintf(info->s, " R5: %08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R6: sprintf(info->s, " R6: %08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R7: sprintf(info->s, " R7: %08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R8: sprintf(info->s, " R8: %08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R9: sprintf(info->s, " R9: %08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R10: sprintf(info->s, "R10: %08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R11: sprintf(info->s, "R11: %08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R12: sprintf(info->s, "R12: %08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R13: sprintf(info->s, "R13: %08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R14: sprintf(info->s, "R14: %08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R15: sprintf(info->s, "R15: %08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R16: sprintf(info->s, "R16: %08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R17: sprintf(info->s, "R17: %08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R18: sprintf(info->s, "R18: %08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R19: sprintf(info->s, "R19: %08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R20: sprintf(info->s, "R20: %08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R21: sprintf(info->s, "R21: %08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R22: sprintf(info->s, "R22: %08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R23: sprintf(info->s, "R23: %08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R24: sprintf(info->s, "R24: %08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R25: sprintf(info->s, "R25: %08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R26: sprintf(info->s, "R26: %08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R27: sprintf(info->s, "R27: %08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R28: sprintf(info->s, "R28: %08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R29: sprintf(info->s, "R29: %08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R30: sprintf(info->s, "R30: %08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
- case CPUINFO_STR_REGISTER + MIPS3_R31: sprintf(info->s, "R31: %08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R0: sprintf(info->s, " R0: %08X%08X", (UINT32)(mips->r[0] >> 32), (UINT32)mips->r[0]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R1: sprintf(info->s, " R1: %08X%08X", (UINT32)(mips->r[1] >> 32), (UINT32)mips->r[1]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R2: sprintf(info->s, " R2: %08X%08X", (UINT32)(mips->r[2] >> 32), (UINT32)mips->r[2]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R3: sprintf(info->s, " R3: %08X%08X", (UINT32)(mips->r[3] >> 32), (UINT32)mips->r[3]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R4: sprintf(info->s, " R4: %08X%08X", (UINT32)(mips->r[4] >> 32), (UINT32)mips->r[4]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R5: sprintf(info->s, " R5: %08X%08X", (UINT32)(mips->r[5] >> 32), (UINT32)mips->r[5]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R6: sprintf(info->s, " R6: %08X%08X", (UINT32)(mips->r[6] >> 32), (UINT32)mips->r[6]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R7: sprintf(info->s, " R7: %08X%08X", (UINT32)(mips->r[7] >> 32), (UINT32)mips->r[7]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R8: sprintf(info->s, " R8: %08X%08X", (UINT32)(mips->r[8] >> 32), (UINT32)mips->r[8]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R9: sprintf(info->s, " R9: %08X%08X", (UINT32)(mips->r[9] >> 32), (UINT32)mips->r[9]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R10: sprintf(info->s, "R10: %08X%08X", (UINT32)(mips->r[10] >> 32), (UINT32)mips->r[10]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R11: sprintf(info->s, "R11: %08X%08X", (UINT32)(mips->r[11] >> 32), (UINT32)mips->r[11]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R12: sprintf(info->s, "R12: %08X%08X", (UINT32)(mips->r[12] >> 32), (UINT32)mips->r[12]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R13: sprintf(info->s, "R13: %08X%08X", (UINT32)(mips->r[13] >> 32), (UINT32)mips->r[13]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R14: sprintf(info->s, "R14: %08X%08X", (UINT32)(mips->r[14] >> 32), (UINT32)mips->r[14]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R15: sprintf(info->s, "R15: %08X%08X", (UINT32)(mips->r[15] >> 32), (UINT32)mips->r[15]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R16: sprintf(info->s, "R16: %08X%08X", (UINT32)(mips->r[16] >> 32), (UINT32)mips->r[16]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R17: sprintf(info->s, "R17: %08X%08X", (UINT32)(mips->r[17] >> 32), (UINT32)mips->r[17]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R18: sprintf(info->s, "R18: %08X%08X", (UINT32)(mips->r[18] >> 32), (UINT32)mips->r[18]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R19: sprintf(info->s, "R19: %08X%08X", (UINT32)(mips->r[19] >> 32), (UINT32)mips->r[19]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R20: sprintf(info->s, "R20: %08X%08X", (UINT32)(mips->r[20] >> 32), (UINT32)mips->r[20]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R21: sprintf(info->s, "R21: %08X%08X", (UINT32)(mips->r[21] >> 32), (UINT32)mips->r[21]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R22: sprintf(info->s, "R22: %08X%08X", (UINT32)(mips->r[22] >> 32), (UINT32)mips->r[22]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R23: sprintf(info->s, "R23: %08X%08X", (UINT32)(mips->r[23] >> 32), (UINT32)mips->r[23]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R24: sprintf(info->s, "R24: %08X%08X", (UINT32)(mips->r[24] >> 32), (UINT32)mips->r[24]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R25: sprintf(info->s, "R25: %08X%08X", (UINT32)(mips->r[25] >> 32), (UINT32)mips->r[25]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R26: sprintf(info->s, "R26: %08X%08X", (UINT32)(mips->r[26] >> 32), (UINT32)mips->r[26]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R27: sprintf(info->s, "R27: %08X%08X", (UINT32)(mips->r[27] >> 32), (UINT32)mips->r[27]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R28: sprintf(info->s, "R28: %08X%08X", (UINT32)(mips->r[28] >> 32), (UINT32)mips->r[28]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R29: sprintf(info->s, "R29: %08X%08X", (UINT32)(mips->r[29] >> 32), (UINT32)mips->r[29]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R30: sprintf(info->s, "R30: %08X%08X", (UINT32)(mips->r[30] >> 32), (UINT32)mips->r[30]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_R31: sprintf(info->s, "R31: %08X%08X", (UINT32)(mips->r[31] >> 32), (UINT32)mips->r[31]); break;
#endif
- case CPUINFO_STR_REGISTER + MIPS3_HI: sprintf(info->s, "HI: %08X%08X", (UINT32)(mips->r[REG_HI] >> 32), (UINT32)mips->r[REG_HI]); break;
- case CPUINFO_STR_REGISTER + MIPS3_LO: sprintf(info->s, "LO: %08X%08X", (UINT32)(mips->r[REG_LO] >> 32), (UINT32)mips->r[REG_LO]); break;
-
- case CPUINFO_STR_REGISTER + MIPS3_CCR1_31: sprintf(info->s, "CCR31:%08X", (UINT32)mips->ccr[1][31]); break;
-
- case CPUINFO_STR_REGISTER + MIPS3_FPR0: sprintf(info->s, "FPR0: %08X%08X", (UINT32)(mips->cpr[1][0] >> 32), (UINT32)mips->cpr[1][0]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS0: sprintf(info->s, "FPS0: !%16g", *(float *)&mips->cpr[1][0]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD0: sprintf(info->s, "FPD0: !%16g", *(double *)&mips->cpr[1][0]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR1: sprintf(info->s, "FPR1: %08X%08X", (UINT32)(mips->cpr[1][1] >> 32), (UINT32)mips->cpr[1][1]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS1: sprintf(info->s, "FPS1: !%16g", *(float *)&mips->cpr[1][1]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD1: sprintf(info->s, "FPD1: !%16g", *(double *)&mips->cpr[1][1]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR2: sprintf(info->s, "FPR2: %08X%08X", (UINT32)(mips->cpr[1][2] >> 32), (UINT32)mips->cpr[1][2]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS2: sprintf(info->s, "FPS2: !%16g", *(float *)&mips->cpr[1][2]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD2: sprintf(info->s, "FPD2: !%16g", *(double *)&mips->cpr[1][2]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR3: sprintf(info->s, "FPR3: %08X%08X", (UINT32)(mips->cpr[1][3] >> 32), (UINT32)mips->cpr[1][3]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS3: sprintf(info->s, "FPS3: !%16g", *(float *)&mips->cpr[1][3]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD3: sprintf(info->s, "FPD3: !%16g", *(double *)&mips->cpr[1][3]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR4: sprintf(info->s, "FPR4: %08X%08X", (UINT32)(mips->cpr[1][4] >> 32), (UINT32)mips->cpr[1][4]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS4: sprintf(info->s, "FPS4: !%16g", *(float *)&mips->cpr[1][4]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD4: sprintf(info->s, "FPD4: !%16g", *(double *)&mips->cpr[1][4]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR5: sprintf(info->s, "FPR5: %08X%08X", (UINT32)(mips->cpr[1][5] >> 32), (UINT32)mips->cpr[1][5]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS5: sprintf(info->s, "FPS5: !%16g", *(float *)&mips->cpr[1][5]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD5: sprintf(info->s, "FPD5: !%16g", *(double *)&mips->cpr[1][5]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR6: sprintf(info->s, "FPR6: %08X%08X", (UINT32)(mips->cpr[1][6] >> 32), (UINT32)mips->cpr[1][6]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS6: sprintf(info->s, "FPS6: !%16g", *(float *)&mips->cpr[1][6]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD6: sprintf(info->s, "FPD6: !%16g", *(double *)&mips->cpr[1][6]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR7: sprintf(info->s, "FPR7: %08X%08X", (UINT32)(mips->cpr[1][7] >> 32), (UINT32)mips->cpr[1][7]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS7: sprintf(info->s, "FPS7: !%16g", *(float *)&mips->cpr[1][7]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD7: sprintf(info->s, "FPD7: !%16g", *(double *)&mips->cpr[1][7]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR8: sprintf(info->s, "FPR8: %08X%08X", (UINT32)(mips->cpr[1][8] >> 32), (UINT32)mips->cpr[1][8]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS8: sprintf(info->s, "FPS8: !%16g", *(float *)&mips->cpr[1][8]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD8: sprintf(info->s, "FPD8: !%16g", *(double *)&mips->cpr[1][8]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR9: sprintf(info->s, "FPR9: %08X%08X", (UINT32)(mips->cpr[1][9] >> 32), (UINT32)mips->cpr[1][9]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS9: sprintf(info->s, "FPS9: !%16g", *(float *)&mips->cpr[1][9]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD9: sprintf(info->s, "FPD9: !%16g", *(double *)&mips->cpr[1][9]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR10: sprintf(info->s, "FPR10:%08X%08X", (UINT32)(mips->cpr[1][10] >> 32), (UINT32)mips->cpr[1][10]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS10: sprintf(info->s, "FPS10:!%16g", *(float *)&mips->cpr[1][10]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD10: sprintf(info->s, "FPD10:!%16g", *(double *)&mips->cpr[1][10]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR11: sprintf(info->s, "FPR11:%08X%08X", (UINT32)(mips->cpr[1][11] >> 32), (UINT32)mips->cpr[1][11]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS11: sprintf(info->s, "FPS11:!%16g", *(float *)&mips->cpr[1][11]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD11: sprintf(info->s, "FPD11:!%16g", *(double *)&mips->cpr[1][11]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR12: sprintf(info->s, "FPR12:%08X%08X", (UINT32)(mips->cpr[1][12] >> 32), (UINT32)mips->cpr[1][12]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS12: sprintf(info->s, "FPS12:!%16g", *(float *)&mips->cpr[1][12]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD12: sprintf(info->s, "FPD12:!%16g", *(double *)&mips->cpr[1][12]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR13: sprintf(info->s, "FPR13:%08X%08X", (UINT32)(mips->cpr[1][13] >> 32), (UINT32)mips->cpr[1][13]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS13: sprintf(info->s, "FPS13:!%16g", *(float *)&mips->cpr[1][13]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD13: sprintf(info->s, "FPD13:!%16g", *(double *)&mips->cpr[1][13]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR14: sprintf(info->s, "FPR14:%08X%08X", (UINT32)(mips->cpr[1][14] >> 32), (UINT32)mips->cpr[1][14]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS14: sprintf(info->s, "FPS14:!%16g", *(float *)&mips->cpr[1][14]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD14: sprintf(info->s, "FPD14:!%16g", *(double *)&mips->cpr[1][14]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR15: sprintf(info->s, "FPR15:%08X%08X", (UINT32)(mips->cpr[1][15] >> 32), (UINT32)mips->cpr[1][15]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS15: sprintf(info->s, "FPS15:!%16g", *(float *)&mips->cpr[1][15]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD15: sprintf(info->s, "FPD15:!%16g", *(double *)&mips->cpr[1][15]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR16: sprintf(info->s, "FPR16:%08X%08X", (UINT32)(mips->cpr[1][16] >> 32), (UINT32)mips->cpr[1][16]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS16: sprintf(info->s, "FPS16:!%16g", *(float *)&mips->cpr[1][16]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD16: sprintf(info->s, "FPD16:!%16g", *(double *)&mips->cpr[1][16]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR17: sprintf(info->s, "FPR17:%08X%08X", (UINT32)(mips->cpr[1][17] >> 32), (UINT32)mips->cpr[1][17]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS17: sprintf(info->s, "FPS17:!%16g", *(float *)&mips->cpr[1][17]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD17: sprintf(info->s, "FPD17:!%16g", *(double *)&mips->cpr[1][17]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR18: sprintf(info->s, "FPR18:%08X%08X", (UINT32)(mips->cpr[1][18] >> 32), (UINT32)mips->cpr[1][18]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS18: sprintf(info->s, "FPS18:!%16g", *(float *)&mips->cpr[1][18]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD18: sprintf(info->s, "FPD18:!%16g", *(double *)&mips->cpr[1][18]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR19: sprintf(info->s, "FPR19:%08X%08X", (UINT32)(mips->cpr[1][19] >> 32), (UINT32)mips->cpr[1][19]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS19: sprintf(info->s, "FPS19:!%16g", *(float *)&mips->cpr[1][19]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD19: sprintf(info->s, "FPD19:!%16g", *(double *)&mips->cpr[1][19]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR20: sprintf(info->s, "FPR20:%08X%08X", (UINT32)(mips->cpr[1][20] >> 32), (UINT32)mips->cpr[1][20]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS20: sprintf(info->s, "FPS20:!%16g", *(float *)&mips->cpr[1][20]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD20: sprintf(info->s, "FPD20:!%16g", *(double *)&mips->cpr[1][20]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR21: sprintf(info->s, "FPR21:%08X%08X", (UINT32)(mips->cpr[1][21] >> 32), (UINT32)mips->cpr[1][21]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS21: sprintf(info->s, "FPS21:!%16g", *(float *)&mips->cpr[1][21]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD21: sprintf(info->s, "FPD21:!%16g", *(double *)&mips->cpr[1][21]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR22: sprintf(info->s, "FPR22:%08X%08X", (UINT32)(mips->cpr[1][22] >> 32), (UINT32)mips->cpr[1][22]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS22: sprintf(info->s, "FPS22:!%16g", *(float *)&mips->cpr[1][22]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD22: sprintf(info->s, "FPD22:!%16g", *(double *)&mips->cpr[1][22]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR23: sprintf(info->s, "FPR23:%08X%08X", (UINT32)(mips->cpr[1][23] >> 32), (UINT32)mips->cpr[1][23]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS23: sprintf(info->s, "FPS23:!%16g", *(float *)&mips->cpr[1][23]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD23: sprintf(info->s, "FPD23:!%16g", *(double *)&mips->cpr[1][23]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR24: sprintf(info->s, "FPR24:%08X%08X", (UINT32)(mips->cpr[1][24] >> 32), (UINT32)mips->cpr[1][24]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS24: sprintf(info->s, "FPS24:!%16g", *(float *)&mips->cpr[1][24]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD24: sprintf(info->s, "FPD24:!%16g", *(double *)&mips->cpr[1][24]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR25: sprintf(info->s, "FPR25:%08X%08X", (UINT32)(mips->cpr[1][25] >> 32), (UINT32)mips->cpr[1][25]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS25: sprintf(info->s, "FPS25:!%16g", *(float *)&mips->cpr[1][25]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD25: sprintf(info->s, "FPD25:!%16g", *(double *)&mips->cpr[1][25]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR26: sprintf(info->s, "FPR26:%08X%08X", (UINT32)(mips->cpr[1][26] >> 32), (UINT32)mips->cpr[1][26]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS26: sprintf(info->s, "FPS26:!%16g", *(float *)&mips->cpr[1][26]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD26: sprintf(info->s, "FPD26:!%16g", *(double *)&mips->cpr[1][26]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR27: sprintf(info->s, "FPR27:%08X%08X", (UINT32)(mips->cpr[1][27] >> 32), (UINT32)mips->cpr[1][27]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS27: sprintf(info->s, "FPS27:!%16g", *(float *)&mips->cpr[1][27]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD27: sprintf(info->s, "FPD27:!%16g", *(double *)&mips->cpr[1][27]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR28: sprintf(info->s, "FPR28:%08X%08X", (UINT32)(mips->cpr[1][28] >> 32), (UINT32)mips->cpr[1][28]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS28: sprintf(info->s, "FPS28:!%16g", *(float *)&mips->cpr[1][28]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD28: sprintf(info->s, "FPD28:!%16g", *(double *)&mips->cpr[1][28]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR29: sprintf(info->s, "FPR29:%08X%08X", (UINT32)(mips->cpr[1][29] >> 32), (UINT32)mips->cpr[1][29]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS29: sprintf(info->s, "FPS29:!%16g", *(float *)&mips->cpr[1][29]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD29: sprintf(info->s, "FPD29:!%16g", *(double *)&mips->cpr[1][29]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR30: sprintf(info->s, "FPR30:%08X%08X", (UINT32)(mips->cpr[1][30] >> 32), (UINT32)mips->cpr[1][30]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS30: sprintf(info->s, "FPS30:!%16g", *(float *)&mips->cpr[1][30]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD30: sprintf(info->s, "FPD30:!%16g", *(double *)&mips->cpr[1][30]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPR31: sprintf(info->s, "FPR31:%08X%08X", (UINT32)(mips->cpr[1][31] >> 32), (UINT32)mips->cpr[1][31]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPS31: sprintf(info->s, "FPS31:!%16g", *(float *)&mips->cpr[1][31]); break;
- case CPUINFO_STR_REGISTER + MIPS3_FPD31: sprintf(info->s, "FPD31:!%16g", *(double *)&mips->cpr[1][31]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_HI: sprintf(info->s, "HI: %08X%08X", (UINT32)(mips->r[REG_HI] >> 32), (UINT32)mips->r[REG_HI]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_LO: sprintf(info->s, "LO: %08X%08X", (UINT32)(mips->r[REG_LO] >> 32), (UINT32)mips->r[REG_LO]); break;
+
+ case CPUINFO_STR_REGISTER + MIPS3_CCR1_31: sprintf(info->s, "CCR31:%08X", (UINT32)mips->ccr[1][31]); break;
+
+ case CPUINFO_STR_REGISTER + MIPS3_FPR0: sprintf(info->s, "FPR0: %08X%08X", (UINT32)(mips->cpr[1][0] >> 32), (UINT32)mips->cpr[1][0]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS0: sprintf(info->s, "FPS0: !%16g", *(float *)&mips->cpr[1][0]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD0: sprintf(info->s, "FPD0: !%16g", *(double *)&mips->cpr[1][0]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR1: sprintf(info->s, "FPR1: %08X%08X", (UINT32)(mips->cpr[1][1] >> 32), (UINT32)mips->cpr[1][1]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS1: sprintf(info->s, "FPS1: !%16g", *(float *)&mips->cpr[1][1]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD1: sprintf(info->s, "FPD1: !%16g", *(double *)&mips->cpr[1][1]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR2: sprintf(info->s, "FPR2: %08X%08X", (UINT32)(mips->cpr[1][2] >> 32), (UINT32)mips->cpr[1][2]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS2: sprintf(info->s, "FPS2: !%16g", *(float *)&mips->cpr[1][2]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD2: sprintf(info->s, "FPD2: !%16g", *(double *)&mips->cpr[1][2]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR3: sprintf(info->s, "FPR3: %08X%08X", (UINT32)(mips->cpr[1][3] >> 32), (UINT32)mips->cpr[1][3]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS3: sprintf(info->s, "FPS3: !%16g", *(float *)&mips->cpr[1][3]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD3: sprintf(info->s, "FPD3: !%16g", *(double *)&mips->cpr[1][3]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR4: sprintf(info->s, "FPR4: %08X%08X", (UINT32)(mips->cpr[1][4] >> 32), (UINT32)mips->cpr[1][4]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS4: sprintf(info->s, "FPS4: !%16g", *(float *)&mips->cpr[1][4]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD4: sprintf(info->s, "FPD4: !%16g", *(double *)&mips->cpr[1][4]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR5: sprintf(info->s, "FPR5: %08X%08X", (UINT32)(mips->cpr[1][5] >> 32), (UINT32)mips->cpr[1][5]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS5: sprintf(info->s, "FPS5: !%16g", *(float *)&mips->cpr[1][5]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD5: sprintf(info->s, "FPD5: !%16g", *(double *)&mips->cpr[1][5]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR6: sprintf(info->s, "FPR6: %08X%08X", (UINT32)(mips->cpr[1][6] >> 32), (UINT32)mips->cpr[1][6]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS6: sprintf(info->s, "FPS6: !%16g", *(float *)&mips->cpr[1][6]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD6: sprintf(info->s, "FPD6: !%16g", *(double *)&mips->cpr[1][6]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR7: sprintf(info->s, "FPR7: %08X%08X", (UINT32)(mips->cpr[1][7] >> 32), (UINT32)mips->cpr[1][7]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS7: sprintf(info->s, "FPS7: !%16g", *(float *)&mips->cpr[1][7]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD7: sprintf(info->s, "FPD7: !%16g", *(double *)&mips->cpr[1][7]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR8: sprintf(info->s, "FPR8: %08X%08X", (UINT32)(mips->cpr[1][8] >> 32), (UINT32)mips->cpr[1][8]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS8: sprintf(info->s, "FPS8: !%16g", *(float *)&mips->cpr[1][8]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD8: sprintf(info->s, "FPD8: !%16g", *(double *)&mips->cpr[1][8]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR9: sprintf(info->s, "FPR9: %08X%08X", (UINT32)(mips->cpr[1][9] >> 32), (UINT32)mips->cpr[1][9]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS9: sprintf(info->s, "FPS9: !%16g", *(float *)&mips->cpr[1][9]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD9: sprintf(info->s, "FPD9: !%16g", *(double *)&mips->cpr[1][9]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR10: sprintf(info->s, "FPR10:%08X%08X", (UINT32)(mips->cpr[1][10] >> 32), (UINT32)mips->cpr[1][10]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS10: sprintf(info->s, "FPS10:!%16g", *(float *)&mips->cpr[1][10]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD10: sprintf(info->s, "FPD10:!%16g", *(double *)&mips->cpr[1][10]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR11: sprintf(info->s, "FPR11:%08X%08X", (UINT32)(mips->cpr[1][11] >> 32), (UINT32)mips->cpr[1][11]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS11: sprintf(info->s, "FPS11:!%16g", *(float *)&mips->cpr[1][11]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD11: sprintf(info->s, "FPD11:!%16g", *(double *)&mips->cpr[1][11]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR12: sprintf(info->s, "FPR12:%08X%08X", (UINT32)(mips->cpr[1][12] >> 32), (UINT32)mips->cpr[1][12]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS12: sprintf(info->s, "FPS12:!%16g", *(float *)&mips->cpr[1][12]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD12: sprintf(info->s, "FPD12:!%16g", *(double *)&mips->cpr[1][12]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR13: sprintf(info->s, "FPR13:%08X%08X", (UINT32)(mips->cpr[1][13] >> 32), (UINT32)mips->cpr[1][13]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS13: sprintf(info->s, "FPS13:!%16g", *(float *)&mips->cpr[1][13]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD13: sprintf(info->s, "FPD13:!%16g", *(double *)&mips->cpr[1][13]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR14: sprintf(info->s, "FPR14:%08X%08X", (UINT32)(mips->cpr[1][14] >> 32), (UINT32)mips->cpr[1][14]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS14: sprintf(info->s, "FPS14:!%16g", *(float *)&mips->cpr[1][14]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD14: sprintf(info->s, "FPD14:!%16g", *(double *)&mips->cpr[1][14]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR15: sprintf(info->s, "FPR15:%08X%08X", (UINT32)(mips->cpr[1][15] >> 32), (UINT32)mips->cpr[1][15]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS15: sprintf(info->s, "FPS15:!%16g", *(float *)&mips->cpr[1][15]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD15: sprintf(info->s, "FPD15:!%16g", *(double *)&mips->cpr[1][15]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR16: sprintf(info->s, "FPR16:%08X%08X", (UINT32)(mips->cpr[1][16] >> 32), (UINT32)mips->cpr[1][16]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS16: sprintf(info->s, "FPS16:!%16g", *(float *)&mips->cpr[1][16]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD16: sprintf(info->s, "FPD16:!%16g", *(double *)&mips->cpr[1][16]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR17: sprintf(info->s, "FPR17:%08X%08X", (UINT32)(mips->cpr[1][17] >> 32), (UINT32)mips->cpr[1][17]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS17: sprintf(info->s, "FPS17:!%16g", *(float *)&mips->cpr[1][17]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD17: sprintf(info->s, "FPD17:!%16g", *(double *)&mips->cpr[1][17]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR18: sprintf(info->s, "FPR18:%08X%08X", (UINT32)(mips->cpr[1][18] >> 32), (UINT32)mips->cpr[1][18]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS18: sprintf(info->s, "FPS18:!%16g", *(float *)&mips->cpr[1][18]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD18: sprintf(info->s, "FPD18:!%16g", *(double *)&mips->cpr[1][18]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR19: sprintf(info->s, "FPR19:%08X%08X", (UINT32)(mips->cpr[1][19] >> 32), (UINT32)mips->cpr[1][19]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS19: sprintf(info->s, "FPS19:!%16g", *(float *)&mips->cpr[1][19]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD19: sprintf(info->s, "FPD19:!%16g", *(double *)&mips->cpr[1][19]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR20: sprintf(info->s, "FPR20:%08X%08X", (UINT32)(mips->cpr[1][20] >> 32), (UINT32)mips->cpr[1][20]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS20: sprintf(info->s, "FPS20:!%16g", *(float *)&mips->cpr[1][20]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD20: sprintf(info->s, "FPD20:!%16g", *(double *)&mips->cpr[1][20]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR21: sprintf(info->s, "FPR21:%08X%08X", (UINT32)(mips->cpr[1][21] >> 32), (UINT32)mips->cpr[1][21]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS21: sprintf(info->s, "FPS21:!%16g", *(float *)&mips->cpr[1][21]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD21: sprintf(info->s, "FPD21:!%16g", *(double *)&mips->cpr[1][21]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR22: sprintf(info->s, "FPR22:%08X%08X", (UINT32)(mips->cpr[1][22] >> 32), (UINT32)mips->cpr[1][22]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS22: sprintf(info->s, "FPS22:!%16g", *(float *)&mips->cpr[1][22]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD22: sprintf(info->s, "FPD22:!%16g", *(double *)&mips->cpr[1][22]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR23: sprintf(info->s, "FPR23:%08X%08X", (UINT32)(mips->cpr[1][23] >> 32), (UINT32)mips->cpr[1][23]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS23: sprintf(info->s, "FPS23:!%16g", *(float *)&mips->cpr[1][23]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD23: sprintf(info->s, "FPD23:!%16g", *(double *)&mips->cpr[1][23]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR24: sprintf(info->s, "FPR24:%08X%08X", (UINT32)(mips->cpr[1][24] >> 32), (UINT32)mips->cpr[1][24]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS24: sprintf(info->s, "FPS24:!%16g", *(float *)&mips->cpr[1][24]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD24: sprintf(info->s, "FPD24:!%16g", *(double *)&mips->cpr[1][24]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR25: sprintf(info->s, "FPR25:%08X%08X", (UINT32)(mips->cpr[1][25] >> 32), (UINT32)mips->cpr[1][25]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS25: sprintf(info->s, "FPS25:!%16g", *(float *)&mips->cpr[1][25]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD25: sprintf(info->s, "FPD25:!%16g", *(double *)&mips->cpr[1][25]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR26: sprintf(info->s, "FPR26:%08X%08X", (UINT32)(mips->cpr[1][26] >> 32), (UINT32)mips->cpr[1][26]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS26: sprintf(info->s, "FPS26:!%16g", *(float *)&mips->cpr[1][26]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD26: sprintf(info->s, "FPD26:!%16g", *(double *)&mips->cpr[1][26]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR27: sprintf(info->s, "FPR27:%08X%08X", (UINT32)(mips->cpr[1][27] >> 32), (UINT32)mips->cpr[1][27]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS27: sprintf(info->s, "FPS27:!%16g", *(float *)&mips->cpr[1][27]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD27: sprintf(info->s, "FPD27:!%16g", *(double *)&mips->cpr[1][27]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR28: sprintf(info->s, "FPR28:%08X%08X", (UINT32)(mips->cpr[1][28] >> 32), (UINT32)mips->cpr[1][28]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS28: sprintf(info->s, "FPS28:!%16g", *(float *)&mips->cpr[1][28]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD28: sprintf(info->s, "FPD28:!%16g", *(double *)&mips->cpr[1][28]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR29: sprintf(info->s, "FPR29:%08X%08X", (UINT32)(mips->cpr[1][29] >> 32), (UINT32)mips->cpr[1][29]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS29: sprintf(info->s, "FPS29:!%16g", *(float *)&mips->cpr[1][29]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD29: sprintf(info->s, "FPD29:!%16g", *(double *)&mips->cpr[1][29]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR30: sprintf(info->s, "FPR30:%08X%08X", (UINT32)(mips->cpr[1][30] >> 32), (UINT32)mips->cpr[1][30]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS30: sprintf(info->s, "FPS30:!%16g", *(float *)&mips->cpr[1][30]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD30: sprintf(info->s, "FPD30:!%16g", *(double *)&mips->cpr[1][30]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPR31: sprintf(info->s, "FPR31:%08X%08X", (UINT32)(mips->cpr[1][31] >> 32), (UINT32)mips->cpr[1][31]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPS31: sprintf(info->s, "FPS31:!%16g", *(float *)&mips->cpr[1][31]); break;
+ case CPUINFO_STR_REGISTER + MIPS3_FPD31: sprintf(info->s, "FPD31:!%16g", *(double *)&mips->cpr[1][31]); break;
}
}
@@ -772,23 +772,23 @@ static UINT32 compute_config_register(const mips3_state *mips)
if (mips->flavor == MIPS3_TYPE_VR4300)
{
/*
- For VR43xx, Config is as follows:
- bit 31 = always 0
- bits 28-30 = EC
- bits 24-27 = EP
- bits 16-23 = always b0000010
- bit 15 = endian indicator as standard MIPS III
- bits 4-14 = always b11001000110
- bit 3 = CU
- bits 0-2 = K0 ("Coherency algorithm of kseg0")
- */
+ For VR43xx, Config is as follows:
+ bit 31 = always 0
+ bits 28-30 = EC
+ bits 24-27 = EP
+ bits 16-23 = always b0000010
+ bit 15 = endian indicator as standard MIPS III
+ bits 4-14 = always b11001000110
+ bit 3 = CU
+ bits 0-2 = K0 ("Coherency algorithm of kseg0")
+ */
configreg = 0x6460;
}
else
{
/* set the data cache size */
- if (mips->icache_size <= 0x01000) configreg |= 0 << 6;
+ if (mips->icache_size <= 0x01000) configreg |= 0 << 6;
else if (mips->icache_size <= 0x02000) configreg |= 1 << 6;
else if (mips->icache_size <= 0x04000) configreg |= 2 << 6;
else if (mips->icache_size <= 0x08000) configreg |= 3 << 6;
@@ -798,7 +798,7 @@ static UINT32 compute_config_register(const mips3_state *mips)
else configreg |= 7 << 6;
/* set the instruction cache size */
- if (mips->icache_size <= 0x01000) configreg |= 0 << 9;
+ if (mips->icache_size <= 0x01000) configreg |= 0 << 9;
else if (mips->icache_size <= 0x02000) configreg |= 1 << 9;
else if (mips->icache_size <= 0x04000) configreg |= 2 << 9;
else if (mips->icache_size <= 0x08000) configreg |= 3 << 9;
diff --git a/src/emu/cpu/mips/mips3com.h b/src/emu/cpu/mips/mips3com.h
index 9402022a41f..af45954cb6f 100644
--- a/src/emu/cpu/mips/mips3com.h
+++ b/src/emu/cpu/mips/mips3com.h
@@ -22,15 +22,15 @@
#define MIPS3_USE_DRC
/* core parameters */
-#define MIPS3_MIN_PAGE_SHIFT 12
-#define MIPS3_MIN_PAGE_SIZE (1 << MIPS3_MIN_PAGE_SHIFT)
-#define MIPS3_MIN_PAGE_MASK (MIPS3_MIN_PAGE_SIZE - 1)
-#define MIPS3_MAX_PADDR_SHIFT 32
-#define MIPS3_MAX_TLB_ENTRIES 48
+#define MIPS3_MIN_PAGE_SHIFT 12
+#define MIPS3_MIN_PAGE_SIZE (1 << MIPS3_MIN_PAGE_SHIFT)
+#define MIPS3_MIN_PAGE_MASK (MIPS3_MIN_PAGE_SIZE - 1)
+#define MIPS3_MAX_PADDR_SHIFT 32
+#define MIPS3_MAX_TLB_ENTRIES 48
/* cycle parameters */
-#define MIPS3_COUNT_READ_CYCLES 250
-#define MIPS3_CAUSE_READ_CYCLES 250
+#define MIPS3_COUNT_READ_CYCLES 250
+#define MIPS3_CAUSE_READ_CYCLES 250
/* MIPS flavors */
enum mips3_flavor
@@ -50,86 +50,86 @@ enum mips3_flavor
};
/* TLB bits */
-#define TLB_GLOBAL 0x01
-#define TLB_VALID 0x02
-#define TLB_DIRTY 0x04
-#define TLB_PRESENT 0x08
+#define TLB_GLOBAL 0x01
+#define TLB_VALID 0x02
+#define TLB_DIRTY 0x04
+#define TLB_PRESENT 0x08
/* COP0 registers */
-#define COP0_Index 0
-#define COP0_Random 1
-#define COP0_EntryLo 2
-#define COP0_EntryLo0 2
-#define COP0_EntryLo1 3
-#define COP0_Context 4
-#define COP0_PageMask 5
-#define COP0_Wired 6
-#define COP0_BadVAddr 8
-#define COP0_Count 9
-#define COP0_EntryHi 10
-#define COP0_Compare 11
-#define COP0_Status 12
-#define COP0_Cause 13
-#define COP0_EPC 14
-#define COP0_PRId 15
-#define COP0_Config 16
-#define COP0_LLAddr 17
-#define COP0_XContext 20
-#define COP0_ECC 26
-#define COP0_CacheErr 27
-#define COP0_TagLo 28
-#define COP0_TagHi 29
-#define COP0_ErrorPC 30
+#define COP0_Index 0
+#define COP0_Random 1
+#define COP0_EntryLo 2
+#define COP0_EntryLo0 2
+#define COP0_EntryLo1 3
+#define COP0_Context 4
+#define COP0_PageMask 5
+#define COP0_Wired 6
+#define COP0_BadVAddr 8
+#define COP0_Count 9
+#define COP0_EntryHi 10
+#define COP0_Compare 11
+#define COP0_Status 12
+#define COP0_Cause 13
+#define COP0_EPC 14
+#define COP0_PRId 15
+#define COP0_Config 16
+#define COP0_LLAddr 17
+#define COP0_XContext 20
+#define COP0_ECC 26
+#define COP0_CacheErr 27
+#define COP0_TagLo 28
+#define COP0_TagHi 29
+#define COP0_ErrorPC 30
/* Status register bits */
-#define SR_IE 0x00000001
-#define SR_EXL 0x00000002
-#define SR_ERL 0x00000004
-#define SR_KSU_MASK 0x00000018
-#define SR_KSU_KERNEL 0x00000000
-#define SR_KSU_SUPERVISOR 0x00000008
-#define SR_KSU_USER 0x00000010
-#define SR_IMSW0 0x00000100
-#define SR_IMSW1 0x00000200
-#define SR_IMEX0 0x00000400
-#define SR_IMEX1 0x00000800
-#define SR_IMEX2 0x00001000
-#define SR_IMEX3 0x00002000
-#define SR_IMEX4 0x00004000
-#define SR_IMEX5 0x00008000
-#define SR_DE 0x00010000
-#define SR_CE 0x00020000
-#define SR_CH 0x00040000
-#define SR_SR 0x00100000
-#define SR_TS 0x00200000
-#define SR_BEV 0x00400000
-#define SR_ITS 0x01000000 /* VR4300 only, Application Note doesn't give purpose */
-#define SR_RE 0x02000000
-#define SR_FR 0x04000000
-#define SR_RP 0x08000000
-#define SR_COP0 0x10000000
-#define SR_COP1 0x20000000
-#define SR_COP2 0x40000000
-#define SR_COP3 0x80000000
+#define SR_IE 0x00000001
+#define SR_EXL 0x00000002
+#define SR_ERL 0x00000004
+#define SR_KSU_MASK 0x00000018
+#define SR_KSU_KERNEL 0x00000000
+#define SR_KSU_SUPERVISOR 0x00000008
+#define SR_KSU_USER 0x00000010
+#define SR_IMSW0 0x00000100
+#define SR_IMSW1 0x00000200
+#define SR_IMEX0 0x00000400
+#define SR_IMEX1 0x00000800
+#define SR_IMEX2 0x00001000
+#define SR_IMEX3 0x00002000
+#define SR_IMEX4 0x00004000
+#define SR_IMEX5 0x00008000
+#define SR_DE 0x00010000
+#define SR_CE 0x00020000
+#define SR_CH 0x00040000
+#define SR_SR 0x00100000
+#define SR_TS 0x00200000
+#define SR_BEV 0x00400000
+#define SR_ITS 0x01000000 /* VR4300 only, Application Note doesn't give purpose */
+#define SR_RE 0x02000000
+#define SR_FR 0x04000000
+#define SR_RP 0x08000000
+#define SR_COP0 0x10000000
+#define SR_COP1 0x20000000
+#define SR_COP2 0x40000000
+#define SR_COP3 0x80000000
/* exception types */
-#define EXCEPTION_INTERRUPT 0
-#define EXCEPTION_TLBMOD 1
-#define EXCEPTION_TLBLOAD 2
-#define EXCEPTION_TLBSTORE 3
-#define EXCEPTION_ADDRLOAD 4
-#define EXCEPTION_ADDRSTORE 5
-#define EXCEPTION_BUSINST 6
-#define EXCEPTION_BUSDATA 7
-#define EXCEPTION_SYSCALL 8
-#define EXCEPTION_BREAK 9
-#define EXCEPTION_INVALIDOP 10
-#define EXCEPTION_BADCOP 11
-#define EXCEPTION_OVERFLOW 12
-#define EXCEPTION_TRAP 13
-#define EXCEPTION_TLBLOAD_FILL 16
-#define EXCEPTION_TLBSTORE_FILL 17
-#define EXCEPTION_COUNT 18
+#define EXCEPTION_INTERRUPT 0
+#define EXCEPTION_TLBMOD 1
+#define EXCEPTION_TLBLOAD 2
+#define EXCEPTION_TLBSTORE 3
+#define EXCEPTION_ADDRLOAD 4
+#define EXCEPTION_ADDRSTORE 5
+#define EXCEPTION_BUSINST 6
+#define EXCEPTION_BUSDATA 7
+#define EXCEPTION_SYSCALL 8
+#define EXCEPTION_BREAK 9
+#define EXCEPTION_INVALIDOP 10
+#define EXCEPTION_BADCOP 11
+#define EXCEPTION_OVERFLOW 12
+#define EXCEPTION_TRAP 13
+#define EXCEPTION_TLBLOAD_FILL 16
+#define EXCEPTION_TLBSTORE_FILL 17
+#define EXCEPTION_COUNT 18
@@ -137,27 +137,27 @@ enum mips3_flavor
HELPER MACROS
***************************************************************************/
-#define REG_LO 32
-#define REG_HI 33
+#define REG_LO 32
+#define REG_HI 33
-#define RSREG ((op >> 21) & 31)
-#define RTREG ((op >> 16) & 31)
-#define RDREG ((op >> 11) & 31)
-#define SHIFT ((op >> 6) & 31)
+#define RSREG ((op >> 21) & 31)
+#define RTREG ((op >> 16) & 31)
+#define RDREG ((op >> 11) & 31)
+#define SHIFT ((op >> 6) & 31)
-#define FRREG ((op >> 21) & 31)
-#define FTREG ((op >> 16) & 31)
-#define FSREG ((op >> 11) & 31)
-#define FDREG ((op >> 6) & 31)
+#define FRREG ((op >> 21) & 31)
+#define FTREG ((op >> 16) & 31)
+#define FSREG ((op >> 11) & 31)
+#define FDREG ((op >> 6) & 31)
-#define IS_SINGLE(o) (((o) & (1 << 21)) == 0)
-#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0)
-#define IS_FLOAT(o) (((o) & (1 << 23)) == 0)
-#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0)
+#define IS_SINGLE(o) (((o) & (1 << 21)) == 0)
+#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0)
+#define IS_FLOAT(o) (((o) & (1 << 23)) == 0)
+#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0)
-#define SIMMVAL ((INT16)op)
-#define UIMMVAL ((UINT16)op)
-#define LIMMVAL (op & 0x03ffffff)
+#define SIMMVAL ((INT16)op)
+#define UIMMVAL ((UINT16)op)
+#define LIMMVAL (op & 0x03ffffff)
@@ -168,9 +168,9 @@ enum mips3_flavor
/* MIPS3 TLB entry */
struct mips3_tlb_entry
{
- UINT64 page_mask;
- UINT64 entry_hi;
- UINT64 entry_lo[2];
+ UINT64 page_mask;
+ UINT64 entry_hi;
+ UINT64 entry_lo[2];
};
@@ -182,41 +182,41 @@ struct mips3imp_state;
struct mips3_state
{
/* core registers */
- UINT32 pc;
- int icount;
- UINT64 r[35];
+ UINT32 pc;
+ int icount;
+ UINT64 r[35];
/* COP registers */
- UINT64 cpr[3][32];
- UINT64 ccr[3][32];
- UINT32 llbit;
+ UINT64 cpr[3][32];
+ UINT64 ccr[3][32];
+ UINT32 llbit;
/* internal stuff */
- mips3_flavor flavor;
+ mips3_flavor flavor;
device_irq_acknowledge_callback irq_callback;
- legacy_cpu_device * device;
+ legacy_cpu_device * device;
address_space *program;
direct_read_data *direct;
- UINT32 system_clock;
- UINT32 cpu_clock;
- UINT64 count_zero_time;
- UINT32 compare_armed;
- emu_timer * compare_int_timer;
+ UINT32 system_clock;
+ UINT32 cpu_clock;
+ UINT64 count_zero_time;
+ UINT32 compare_armed;
+ emu_timer * compare_int_timer;
/* derived info based on flavor */
- UINT32 pfnmask;
- UINT8 tlbentries;
+ UINT32 pfnmask;
+ UINT8 tlbentries;
/* memory accesses */
- UINT8 bigendian;
- data_accessors memory;
+ UINT8 bigendian;
+ data_accessors memory;
/* cache memory */
- size_t icache_size;
- size_t dcache_size;
+ size_t icache_size;
+ size_t dcache_size;
/* MMU */
- vtlb_state * vtlb;
+ vtlb_state * vtlb;
mips3_tlb_entry tlb[MIPS3_MAX_TLB_ENTRIES];
/* for use by specific implementations */
diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c
index cf6d12430ed..24b38f38f74 100644
--- a/src/emu/cpu/mips/mips3drc.c
+++ b/src/emu/cpu/mips/mips3drc.c
@@ -70,17 +70,17 @@ using namespace uml;
DEBUGGING
***************************************************************************/
-#define FORCE_C_BACKEND (0)
-#define LOG_UML (0)
-#define LOG_NATIVE (0)
+#define FORCE_C_BACKEND (0)
+#define LOG_UML (0)
+#define LOG_NATIVE (0)
-#define DISABLE_FAST_REGISTERS (0)
-#define SINGLE_INSTRUCTION_MODE (0)
+#define DISABLE_FAST_REGISTERS (0)
+#define SINGLE_INSTRUCTION_MODE (0)
-#define PRINTF_EXCEPTIONS (0)
-#define PRINTF_MMU (0)
+#define PRINTF_EXCEPTIONS (0)
+#define PRINTF_MMU (0)
-#define PROBE_ADDRESS ~0
+#define PROBE_ADDRESS ~0
@@ -89,28 +89,28 @@ using namespace uml;
***************************************************************************/
/* map variables */
-#define MAPVAR_PC M0
-#define MAPVAR_CYCLES M1
+#define MAPVAR_PC M0
+#define MAPVAR_CYCLES M1
/* modes */
-#define MODE_KERNEL 0
-#define MODE_SUPER 1
-#define MODE_USER 2
+#define MODE_KERNEL 0
+#define MODE_SUPER 1
+#define MODE_USER 2
/* size of the execution code cache */
-#define CACHE_SIZE (32 * 1024 * 1024)
+#define CACHE_SIZE (32 * 1024 * 1024)
/* compilation boundaries -- how far back/forward does the analysis extend? */
-#define COMPILE_BACKWARDS_BYTES 128
-#define COMPILE_FORWARDS_BYTES 512
-#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4))
-#define COMPILE_MAX_SEQUENCE 64
+#define COMPILE_BACKWARDS_BYTES 128
+#define COMPILE_FORWARDS_BYTES 512
+#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4))
+#define COMPILE_MAX_SEQUENCE 64
/* exit codes */
-#define EXECUTE_OUT_OF_CYCLES 0
-#define EXECUTE_MISSING_CODE 1
-#define EXECUTE_UNMAPPED_CODE 2
-#define EXECUTE_RESET_CACHE 3
+#define EXECUTE_OUT_OF_CYCLES 0
+#define EXECUTE_MISSING_CODE 1
+#define EXECUTE_UNMAPPED_CODE 2
+#define EXECUTE_RESET_CACHE 3
@@ -118,30 +118,30 @@ using namespace uml;
MACROS
***************************************************************************/
-#define LOPTR(x) ((UINT32 *)(x) + NATIVE_ENDIAN_VALUE_LE_BE(0,1))
+#define LOPTR(x) ((UINT32 *)(x) + NATIVE_ENDIAN_VALUE_LE_BE(0,1))
-#define R32(reg) mips3->impstate->regmaplo[reg]
-#define LO32 R32(REG_LO)
-#define HI32 R32(REG_HI)
-#define CPR032(reg) mem(LOPTR(&mips3->cpr[0][reg]))
-#define CCR032(reg) mem(LOPTR(&mips3->ccr[0][reg]))
-#define FPR32(reg) mem(((mips3->impstate->mode & 1) == 0) ? &((float *)&mips3->cpr[1][0])[reg] : (float *)&mips3->cpr[1][reg])
-#define CCR132(reg) mem(LOPTR(&mips3->ccr[1][reg]))
-#define CPR232(reg) mem(LOPTR(&mips3->cpr[2][reg]))
-#define CCR232(reg) mem(LOPTR(&mips3->ccr[2][reg]))
+#define R32(reg) mips3->impstate->regmaplo[reg]
+#define LO32 R32(REG_LO)
+#define HI32 R32(REG_HI)
+#define CPR032(reg) mem(LOPTR(&mips3->cpr[0][reg]))
+#define CCR032(reg) mem(LOPTR(&mips3->ccr[0][reg]))
+#define FPR32(reg) mem(((mips3->impstate->mode & 1) == 0) ? &((float *)&mips3->cpr[1][0])[reg] : (float *)&mips3->cpr[1][reg])
+#define CCR132(reg) mem(LOPTR(&mips3->ccr[1][reg]))
+#define CPR232(reg) mem(LOPTR(&mips3->cpr[2][reg]))
+#define CCR232(reg) mem(LOPTR(&mips3->ccr[2][reg]))
-#define R64(reg) mips3->impstate->regmap[reg]
-#define LO64 R64(REG_LO)
-#define HI64 R64(REG_HI)
-#define CPR064(reg) mem(&mips3->cpr[0][reg])
-#define CCR064(reg) mem(&mips3->ccr[0][reg])
-#define FPR64(reg) mem(((mips3->impstate->mode & 1) == 0) ? (double *)&mips3->cpr[1][(reg)/2] : (double *)&mips3->cpr[1][reg])
-#define CCR164(reg) mem(&mips3->ccr[1][reg])
-#define CPR264(reg) mem(&mips3->cpr[2][reg])
-#define CCR264(reg) mem(&mips3->ccr[2][reg])
+#define R64(reg) mips3->impstate->regmap[reg]
+#define LO64 R64(REG_LO)
+#define HI64 R64(REG_HI)
+#define CPR064(reg) mem(&mips3->cpr[0][reg])
+#define CCR064(reg) mem(&mips3->ccr[0][reg])
+#define FPR64(reg) mem(((mips3->impstate->mode & 1) == 0) ? (double *)&mips3->cpr[1][(reg)/2] : (double *)&mips3->cpr[1][reg])
+#define CCR164(reg) mem(&mips3->ccr[1][reg])
+#define CPR264(reg) mem(&mips3->cpr[2][reg])
+#define CCR264(reg) mem(&mips3->ccr[2][reg])
-#define FCCSHIFT(which) fcc_shift[(mips3->flavor < MIPS3_TYPE_MIPS_IV) ? 0 : ((which) & 7)]
-#define FCCMASK(which) ((UINT32)(1 << FCCSHIFT(which)))
+#define FCCSHIFT(which) fcc_shift[(mips3->flavor < MIPS3_TYPE_MIPS_IV) ? 0 : ((which) & 7)]
+#define FCCMASK(which) ((UINT32)(1 << FCCSHIFT(which)))
@@ -152,29 +152,29 @@ using namespace uml;
/* fast RAM info */
struct fast_ram_info
{
- offs_t start; /* start of the RAM block */
- offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
- void * base; /* base in memory where the RAM lives */
+ offs_t start; /* start of the RAM block */
+ offs_t end; /* end of the RAM block */
+ UINT8 readonly; /* TRUE if read-only */
+ void * base; /* base in memory where the RAM lives */
};
/* hotspot info */
struct hotspot_info
{
- offs_t pc; /* PC to consider */
- UINT32 opcode; /* required opcode at that PC */
- UINT32 cycles; /* number of cycles to eat when hit */
+ offs_t pc; /* PC to consider */
+ UINT32 opcode; /* required opcode at that PC */
+ UINT32 cycles; /* number of cycles to eat when hit */
};
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
- code_label labelnum; /* index for local labels */
+ UINT32 cycles; /* accumulated cycles */
+ UINT8 checkints; /* need to check interrupts before next instruction */
+ UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ code_label labelnum; /* index for local labels */
};
@@ -182,56 +182,56 @@ struct compiler_state
struct mips3imp_state
{
/* core state */
- drc_cache * cache; /* pointer to the DRC code cache */
- drcuml_state * drcuml; /* DRC UML generator state */
- mips3_frontend * drcfe; /* pointer to the DRC front-end state */
- UINT32 drcoptions; /* configurable DRC options */
+ drc_cache * cache; /* pointer to the DRC code cache */
+ drcuml_state * drcuml; /* DRC UML generator state */
+ mips3_frontend * drcfe; /* pointer to the DRC front-end state */
+ UINT32 drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
- UINT32 jmpdest; /* destination jump target */
+ UINT8 cache_dirty; /* true if we need to flush the cache */
+ UINT32 jmpdest; /* destination jump target */
/* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
- UINT32 mode; /* current global mode */
- const char * format; /* format string for print_debug */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
+ UINT64 numcycles; /* return value from gettotalcycles */
+ UINT32 mode; /* current global mode */
+ const char * format; /* format string for print_debug */
+ UINT32 arg0; /* print_debug argument 1 */
+ UINT32 arg1; /* print_debug argument 2 */
/* tables */
- UINT8 fpmode[4]; /* FPU mode table */
+ UINT8 fpmode[4]; /* FPU mode table */
/* register mappings */
- parameter regmap[34]; /* parameter to register mappings for all 32 integer registers */
- parameter regmaplo[34]; /* parameter to register mappings for all 32 integer registers */
+ parameter regmap[34]; /* parameter to register mappings for all 32 integer registers */
+ parameter regmaplo[34]; /* parameter to register mappings for all 32 integer registers */
/* subroutines */
- code_handle * entry; /* entry point */
- code_handle * nocode; /* nocode exception handler */
- code_handle * out_of_cycles; /* out of cycles exception handler */
- code_handle * tlb_mismatch; /* tlb mismatch handler */
- code_handle * read8[3]; /* read byte */
- code_handle * write8[3]; /* write byte */
- code_handle * read16[3]; /* read half */
- code_handle * write16[3]; /* write half */
- code_handle * read32[3]; /* read word */
- code_handle * read32mask[3]; /* read word masked */
- code_handle * write32[3]; /* write word */
- code_handle * write32mask[3]; /* write word masked */
- code_handle * read64[3]; /* read double */
- code_handle * read64mask[3]; /* read double masked */
- code_handle * write64[3]; /* write double */
- code_handle * write64mask[3]; /* write double masked */
- code_handle * exception[EXCEPTION_COUNT]; /* array of exception handlers */
- code_handle * exception_norecover[EXCEPTION_COUNT]; /* array of no-recover exception handlers */
+ code_handle * entry; /* entry point */
+ code_handle * nocode; /* nocode exception handler */
+ code_handle * out_of_cycles; /* out of cycles exception handler */
+ code_handle * tlb_mismatch; /* tlb mismatch handler */
+ code_handle * read8[3]; /* read byte */
+ code_handle * write8[3]; /* write byte */
+ code_handle * read16[3]; /* read half */
+ code_handle * write16[3]; /* write half */
+ code_handle * read32[3]; /* read word */
+ code_handle * read32mask[3]; /* read word masked */
+ code_handle * write32[3]; /* write word */
+ code_handle * write32mask[3]; /* write word masked */
+ code_handle * read64[3]; /* read double */
+ code_handle * read64mask[3]; /* read double masked */
+ code_handle * write64[3]; /* write double */
+ code_handle * write64mask[3]; /* write double masked */
+ code_handle * exception[EXCEPTION_COUNT]; /* array of exception handlers */
+ code_handle * exception_norecover[EXCEPTION_COUNT]; /* array of no-recover exception handlers */
/* fast RAM */
- UINT32 fastram_select;
- fast_ram_info fastram[MIPS3_MAX_FASTRAM];
+ UINT32 fastram_select;
+ fast_ram_info fastram[MIPS3_MAX_FASTRAM];
/* hotspots */
- UINT32 hotspot_select;
- hotspot_info hotspot[MIPS3_MAX_HOTSPOTS];
+ UINT32 hotspot_select;
+ hotspot_info hotspot[MIPS3_MAX_HOTSPOTS];
};
@@ -302,21 +302,21 @@ INLINE mips3_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == VR4300BE ||
- device->type() == VR4300LE ||
- device->type() == VR4310BE ||
- device->type() == VR4310LE ||
- device->type() == R4600BE ||
- device->type() == R4600LE ||
- device->type() == R4650BE ||
- device->type() == R4650LE ||
- device->type() == R4700BE ||
- device->type() == R4700LE ||
- device->type() == R5000BE ||
- device->type() == R5000LE ||
- device->type() == QED5271BE ||
- device->type() == QED5271LE ||
- device->type() == RM7000BE ||
- device->type() == RM7000LE);
+ device->type() == VR4300LE ||
+ device->type() == VR4310BE ||
+ device->type() == VR4310LE ||
+ device->type() == R4600BE ||
+ device->type() == R4600LE ||
+ device->type() == R4650BE ||
+ device->type() == R4650LE ||
+ device->type() == R4700BE ||
+ device->type() == R4700LE ||
+ device->type() == R5000BE ||
+ device->type() == R5000LE ||
+ device->type() == QED5271BE ||
+ device->type() == QED5271LE ||
+ device->type() == RM7000BE ||
+ device->type() == RM7000LE);
return *(mips3_state **)downcast<legacy_cpu_device *>(device)->token();
}
@@ -612,23 +612,23 @@ static CPU_GET_INFO( mips3 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mips3_state *); break;
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(mips3_state *); break;
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mips3); break;
- case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mips3); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mips3); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mips3);break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(mips3); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mips3); break;
+ case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(mips3); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mips3); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(mips3); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(mips3);break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(mips3); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
/* --- everything else is handled generically --- */
- default: mips3com_get_info(mips3, state, info); break;
+ default: mips3com_get_info(mips3, state, info); break;
}
}
@@ -784,7 +784,7 @@ static void code_compile_block(mips3_state *mips3, UINT8 mode, offs_t pc)
/* add a code log entry */
if (LOG_UML)
- block->append_comment("-------------------------"); // comment
+ block->append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != NULL; seqlast = seqlast->next())
@@ -794,20 +794,20 @@ static void code_compile_block(mips3_state *mips3, UINT8 mode, offs_t pc)
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
if (override || !drcuml->hash_exists(mode, seqhead->pc))
- UML_HASH(block, mode, seqhead->pc); // hash mode,pc
+ UML_HASH(block, mode, seqhead->pc); // hash mode,pc
/* if we already have a hash, and this is the first sequence, assume that we */
/* are recompiling due to being out of sync and allow future overrides */
else if (seqhead == desclist)
{
override = TRUE;
- UML_HASH(block, mode, seqhead->pc); // hash mode,pc
+ UML_HASH(block, mode, seqhead->pc); // hash mode,pc
}
/* otherwise, redispatch to that fixed PC and skip the rest of the processing */
else
{
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
UML_HASHJMP(block, mips3->impstate->mode, seqhead->pc, *mips3->impstate->nocode);
// hashjmp <mode>,seqhead->pc,nocode
continue;
@@ -819,7 +819,7 @@ static void code_compile_block(mips3_state *mips3, UINT8 mode, offs_t pc)
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
@@ -834,7 +834,7 @@ static void code_compile_block(mips3_state *mips3, UINT8 mode, offs_t pc)
nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
/* count off cycles and go there */
- generate_update_cycles(mips3, block, &compiler, nextpc, TRUE); // <subtract cycles>
+ generate_update_cycles(mips3, block, &compiler, nextpc, TRUE); // <subtract cycles>
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES)
@@ -991,28 +991,28 @@ static void static_generate_entry_point(mips3_state *mips3)
alloc_handle(drcuml, &mips3->impstate->nocode, "nocode");
alloc_handle(drcuml, &mips3->impstate->entry, "entry");
- UML_HANDLE(block, *mips3->impstate->entry); // handle entry
+ UML_HANDLE(block, *mips3->impstate->entry); // handle entry
/* reset the FPU mode */
- UML_AND(block, I0, CCR132(31), 3); // and i0,ccr1[31],3
+ UML_AND(block, I0, CCR132(31), 3); // and i0,ccr1[31],3
UML_LOAD(block, I0, &mips3->impstate->fpmode[0], I0, SIZE_BYTE, SCALE_x1);// load i0,fpmode,i0,byte
- UML_SETFMOD(block, I0); // setfmod i0
+ UML_SETFMOD(block, I0); // setfmod i0
/* load fast integer registers */
load_fast_iregs(mips3, block);
/* check for interrupts */
- UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
- UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00,Z
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
- UML_TEST(block, CPR032(COP0_Status), SR_IE); // test [Status],SR_IE
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
- UML_TEST(block, CPR032(COP0_Status), SR_EXL | SR_ERL); // test [Status],SR_EXL | SR_ERL
- UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
- UML_MOV(block, I0, mem(&mips3->pc)); // mov i0,pc
- UML_MOV(block, I1, 0); // mov i1,0
- UML_CALLH(block, *mips3->impstate->exception_norecover[EXCEPTION_INTERRUPT]); // callh exception_norecover
- UML_LABEL(block, skip); // skip:
+ UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
+ UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00,Z
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_TEST(block, CPR032(COP0_Status), SR_IE); // test [Status],SR_IE
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_TEST(block, CPR032(COP0_Status), SR_EXL | SR_ERL); // test [Status],SR_EXL | SR_ERL
+ UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
+ UML_MOV(block, I0, mem(&mips3->pc)); // mov i0,pc
+ UML_MOV(block, I1, 0); // mov i1,0
+ UML_CALLH(block, *mips3->impstate->exception_norecover[EXCEPTION_INTERRUPT]); // callh exception_norecover
+ UML_LABEL(block, skip); // skip:
/* generate a hash jump via the current mode and PC */
UML_HASHJMP(block, mem(&mips3->impstate->mode), mem(&mips3->pc), *mips3->impstate->nocode);
@@ -1036,11 +1036,11 @@ static void static_generate_nocode_handler(mips3_state *mips3)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &mips3->impstate->nocode, "nocode");
- UML_HANDLE(block, *mips3->impstate->nocode); // handle nocode
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&mips3->pc), I0); // mov [pc],i0
+ UML_HANDLE(block, *mips3->impstate->nocode); // handle nocode
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&mips3->pc), I0); // mov [pc],i0
save_fast_iregs(mips3, block);
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
block->end();
}
@@ -1061,11 +1061,11 @@ static void static_generate_out_of_cycles(mips3_state *mips3)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &mips3->impstate->out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *mips3->impstate->out_of_cycles); // handle out_of_cycles
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&mips3->pc), I0); // mov <pc>,i0
+ UML_HANDLE(block, *mips3->impstate->out_of_cycles); // handle out_of_cycles
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&mips3->pc), I0); // mov <pc>,i0
save_fast_iregs(mips3, block);
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
block->end();
}
@@ -1090,32 +1090,32 @@ static void static_generate_tlb_mismatch(mips3_state *mips3)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &mips3->impstate->tlb_mismatch, "tlb_mismatch");
- UML_HANDLE(block, *mips3->impstate->tlb_mismatch); // handle tlb_mismatch
- UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
- UML_MOV(block, mem(&mips3->pc), I0); // mov <pc>,i0
- UML_SHR(block, I1, I0, 12); // shr i1,i0,12
+ UML_HANDLE(block, *mips3->impstate->tlb_mismatch); // handle tlb_mismatch
+ UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
+ UML_MOV(block, mem(&mips3->pc), I0); // mov <pc>,i0
+ UML_SHR(block, I1, I0, 12); // shr i1,i0,12
UML_LOAD(block, I1, (void *)vtlb_table(mips3->vtlb), I1, SIZE_DWORD, SCALE_x4);// load i1,[vtlb_table],i1,dword
if (PRINTF_MMU)
{
static const char text[] = "TLB mismatch @ %08X (ent=%08X)\n";
- UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
- UML_MOV(block, mem(&mips3->impstate->arg0), I0); // mov [arg0],i0
- UML_MOV(block, mem(&mips3->impstate->arg1), I1); // mov [arg1],i1
- UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
+ UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
+ UML_MOV(block, mem(&mips3->impstate->arg0), I0); // mov [arg0],i0
+ UML_MOV(block, mem(&mips3->impstate->arg1), I1); // mov [arg1],i1
+ UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
}
- UML_TEST(block, I1, VTLB_FETCH_ALLOWED); // test i1,VTLB_FETCH_ALLOWED
- UML_JMPc(block, COND_NZ, 1); // jmp 1,nz
- UML_TEST(block, I1, VTLB_FLAG_FIXED); // test i1,VTLB_FLAG_FIXED
- UML_EXHc(block, COND_NZ, *mips3->impstate->exception[EXCEPTION_TLBLOAD], I0); // exh exception[TLBLOAD],i0,nz
- UML_EXH(block, *mips3->impstate->exception[EXCEPTION_TLBLOAD_FILL], I0); // exh exception[TLBLOAD_FILL],i0
- UML_LABEL(block, 1); // 1:
+ UML_TEST(block, I1, VTLB_FETCH_ALLOWED); // test i1,VTLB_FETCH_ALLOWED
+ UML_JMPc(block, COND_NZ, 1); // jmp 1,nz
+ UML_TEST(block, I1, VTLB_FLAG_FIXED); // test i1,VTLB_FLAG_FIXED
+ UML_EXHc(block, COND_NZ, *mips3->impstate->exception[EXCEPTION_TLBLOAD], I0); // exh exception[TLBLOAD],i0,nz
+ UML_EXH(block, *mips3->impstate->exception[EXCEPTION_TLBLOAD_FILL], I0); // exh exception[TLBLOAD_FILL],i0
+ UML_LABEL(block, 1); // 1:
save_fast_iregs(mips3, block);
// the saved PC may be set 1 instruction back with the low bit set to indicate
// a delay slot; in this path we want the original instruction address, so recover it
- UML_ADD(block, I0, mem(&mips3->pc), 3); // add i0,<pc>,3
- UML_AND(block, mem(&mips3->pc), I0, ~3); // and <pc>,i0,~3
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ UML_ADD(block, I0, mem(&mips3->pc), 3); // add i0,<pc>,3
+ UML_AND(block, mem(&mips3->pc), I0, ~3); // and <pc>,i0,~3
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
block->end();
}
@@ -1147,72 +1147,72 @@ static void static_generate_exception(mips3_state *mips3, UINT8 exception, int r
/* add a global entry for this */
alloc_handle(drcuml, &exception_handle, name);
- UML_HANDLE(block, *exception_handle); // handle name
+ UML_HANDLE(block, *exception_handle); // handle name
/* exception parameter is expected to be the fault address in this case */
if (exception == EXCEPTION_TLBLOAD || exception == EXCEPTION_TLBSTORE || exception == EXCEPTION_TLBMOD || exception == EXCEPTION_ADDRLOAD || exception == EXCEPTION_ADDRSTORE)
{
/* set BadVAddr to the fault address */
- UML_GETEXP(block, I0); // getexp i0
- UML_TEST(block, CPR032(COP0_Status), SR_EXL); // test [Status],SR_EXL
- UML_MOVc(block, COND_Z, CPR032(COP0_BadVAddr), I0); // mov [BadVAddr],i0,Z
+ UML_GETEXP(block, I0); // getexp i0
+ UML_TEST(block, CPR032(COP0_Status), SR_EXL); // test [Status],SR_EXL
+ UML_MOVc(block, COND_Z, CPR032(COP0_BadVAddr), I0); // mov [BadVAddr],i0,Z
}
if (exception == EXCEPTION_TLBLOAD || exception == EXCEPTION_TLBSTORE)
{
/* set the upper bits of EntryHi and the lower bits of Context to the fault page */
- UML_ROLINS(block, CPR032(COP0_EntryHi), I0, 0, 0xffffe000); // rolins [EntryHi],i0,0,0xffffe000
- UML_ROLINS(block, CPR032(COP0_Context), I0, 32-9, 0x7ffff0); // rolins [Context],i0,32-9,0x7ffff0
+ UML_ROLINS(block, CPR032(COP0_EntryHi), I0, 0, 0xffffe000); // rolins [EntryHi],i0,0,0xffffe000
+ UML_ROLINS(block, CPR032(COP0_Context), I0, 32-9, 0x7ffff0); // rolins [Context],i0,32-9,0x7ffff0
}
/* set the EPC and Cause registers */
if (recover)
{
- UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
- UML_RECOVER(block, I1, MAPVAR_CYCLES); // recover i1,CYCLES
+ UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
+ UML_RECOVER(block, I1, MAPVAR_CYCLES); // recover i1,CYCLES
}
- UML_AND(block, I2, CPR032(COP0_Cause), ~0x800000ff); // and i2,[Cause],~0x800000ff
- UML_TEST(block, I0, 1); // test i0,1
- UML_JMPc(block, COND_Z, next); // jz <next>
- UML_OR(block, I2, I2, 0x80000000); // or i2,i2,0x80000000
- UML_SUB(block, I0, I0, 1); // sub i0,i0,1
- UML_LABEL(block, next); // <next>:
- UML_MOV(block, I3, offset); // mov i3,offset
- UML_TEST(block, CPR032(COP0_Status), SR_EXL); // test [Status],SR_EXL
- UML_MOVc(block, COND_Z, CPR032(COP0_EPC), I0); // mov [EPC],i0,Z
- UML_MOVc(block, COND_NZ, I3, 0x180); // mov i3,0x180,NZ
- UML_OR(block, CPR032(COP0_Cause), I2, exception << 2); // or [Cause],i2,exception << 2
+ UML_AND(block, I2, CPR032(COP0_Cause), ~0x800000ff); // and i2,[Cause],~0x800000ff
+ UML_TEST(block, I0, 1); // test i0,1
+ UML_JMPc(block, COND_Z, next); // jz <next>
+ UML_OR(block, I2, I2, 0x80000000); // or i2,i2,0x80000000
+ UML_SUB(block, I0, I0, 1); // sub i0,i0,1
+ UML_LABEL(block, next); // <next>:
+ UML_MOV(block, I3, offset); // mov i3,offset
+ UML_TEST(block, CPR032(COP0_Status), SR_EXL); // test [Status],SR_EXL
+ UML_MOVc(block, COND_Z, CPR032(COP0_EPC), I0); // mov [EPC],i0,Z
+ UML_MOVc(block, COND_NZ, I3, 0x180); // mov i3,0x180,NZ
+ UML_OR(block, CPR032(COP0_Cause), I2, exception << 2); // or [Cause],i2,exception << 2
/* for BADCOP exceptions, we use the exception parameter to know which COP */
if (exception == EXCEPTION_BADCOP)
{
- UML_GETEXP(block, I0); // getexp i0
- UML_ROLINS(block, CPR032(COP0_Cause), I0, 28, 0x30000000); // rolins [Cause],i0,28,0x30000000
+ UML_GETEXP(block, I0); // getexp i0
+ UML_ROLINS(block, CPR032(COP0_Cause), I0, 28, 0x30000000); // rolins [Cause],i0,28,0x30000000
}
/* set EXL in the SR */
- UML_OR(block, I0, CPR032(COP0_Status), SR_EXL); // or i0,[Status],SR_EXL
- UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
+ UML_OR(block, I0, CPR032(COP0_Status), SR_EXL); // or i0,[Status],SR_EXL
+ UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
generate_update_mode(mips3, block);
/* optionally print exceptions */
if ((PRINTF_EXCEPTIONS && exception != EXCEPTION_INTERRUPT && exception != EXCEPTION_SYSCALL) ||
(PRINTF_MMU && (exception == EXCEPTION_TLBLOAD || exception == EXCEPTION_TLBSTORE)))
{
- UML_CALLC(block, cfunc_printf_exception, mips3); // callc cfunc_printf_exception,NULL
+ UML_CALLC(block, cfunc_printf_exception, mips3); // callc cfunc_printf_exception,NULL
}
/* choose our target PC */
- UML_ADD(block, I0, I3, 0xbfc00200); // add i0,i3,0xbfc00200
- UML_TEST(block, I1, SR_BEV); // test i1,SR_BEV
- UML_JMPc(block, COND_NZ, skip); // jnz <skip>
- UML_ADD(block, I0, I3, 0x80000000); // add i0,i3,0x80000000,z
- UML_LABEL(block, skip); // <skip>:
+ UML_ADD(block, I0, I3, 0xbfc00200); // add i0,i3,0xbfc00200
+ UML_TEST(block, I1, SR_BEV); // test i1,SR_BEV
+ UML_JMPc(block, COND_NZ, skip); // jnz <skip>
+ UML_ADD(block, I0, I3, 0x80000000); // add i0,i3,0x80000000,z
+ UML_LABEL(block, skip); // <skip>:
/* adjust cycles */
- UML_SUB(block, mem(&mips3->icount), mem(&mips3->icount), I1); // sub icount,icount,cycles,S
- UML_EXHc(block, COND_S, *mips3->impstate->out_of_cycles, I0); // exh out_of_cycles,i0
+ UML_SUB(block, mem(&mips3->icount), mem(&mips3->icount), I1); // sub icount,icount,cycles,S
+ UML_EXHc(block, COND_S, *mips3->impstate->out_of_cycles, I0); // exh out_of_cycles,i0
UML_HASHJMP(block, mem(&mips3->impstate->mode), I0, *mips3->impstate->nocode);// hashjmp <mode>,i0,nocode
@@ -1243,33 +1243,33 @@ static void static_generate_memory_accessor(mips3_state *mips3, int mode, int si
/* add a global entry for this */
alloc_handle(drcuml, handleptr, name);
- UML_HANDLE(block, **handleptr); // handle *handleptr
+ UML_HANDLE(block, **handleptr); // handle *handleptr
/* user mode? generate address exception if top bit is set */
if (mode == MODE_USER)
{
- UML_TEST(block, I0, 0x80000000); // test i0,0x80000000
- UML_EXHc(block, COND_NZ, exception_addrerr, I0); // exh addrerr,i0,nz
+ UML_TEST(block, I0, 0x80000000); // test i0,0x80000000
+ UML_EXHc(block, COND_NZ, exception_addrerr, I0); // exh addrerr,i0,nz
}
/* supervisor mode? generate address exception if not in user space or in $C0000000-DFFFFFFF */
if (mode == MODE_SUPER)
{
int addrok;
- UML_TEST(block, I0, 0x80000000); // test i0,0x80000000
- UML_JMPc(block, COND_Z, addrok = label++); // jz addrok
- UML_SHR(block, I3, I0, 29); // shr i3,i0,29
- UML_CMP(block, I3, 6); // cmp i3,6
- UML_EXHc(block, COND_NE, exception_addrerr, I0); // exh addrerr,i0,ne
- UML_LABEL(block, addrok); // addrok:
+ UML_TEST(block, I0, 0x80000000); // test i0,0x80000000
+ UML_JMPc(block, COND_Z, addrok = label++); // jz addrok
+ UML_SHR(block, I3, I0, 29); // shr i3,i0,29
+ UML_CMP(block, I3, 6); // cmp i3,6
+ UML_EXHc(block, COND_NE, exception_addrerr, I0); // exh addrerr,i0,ne
+ UML_LABEL(block, addrok); // addrok:
}
/* general case: assume paging and perform a translation */
- UML_SHR(block, I3, I0, 12); // shr i3,i0,12
+ UML_SHR(block, I3, I0, 12); // shr i3,i0,12
UML_LOAD(block, I3, (void *)vtlb_table(mips3->vtlb), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb_table],i3,dword
UML_TEST(block, I3, iswrite ? VTLB_WRITE_ALLOWED : VTLB_READ_ALLOWED);// test i3,iswrite ? VTLB_WRITE_ALLOWED : VTLB_READ_ALLOWED
- UML_JMPc(block, COND_Z, tlbmiss = label++); // jmp tlbmiss,z
- UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000
+ UML_JMPc(block, COND_Z, tlbmiss = label++); // jmp tlbmiss,z
+ UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000
if ((mips3->device->machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
for (ramnum = 0; ramnum < MIPS3_MAX_FASTRAM; ramnum++)
@@ -1279,13 +1279,13 @@ static void static_generate_memory_accessor(mips3_state *mips3, int mode, int si
UINT32 skip = label++;
if (mips3->impstate->fastram[ramnum].end != 0xffffffff)
{
- UML_CMP(block, I0, mips3->impstate->fastram[ramnum].end); // cmp i0,end
- UML_JMPc(block, COND_A, skip); // ja skip
+ UML_CMP(block, I0, mips3->impstate->fastram[ramnum].end); // cmp i0,end
+ UML_JMPc(block, COND_A, skip); // ja skip
}
if (mips3->impstate->fastram[ramnum].start != 0x00000000)
{
UML_CMP(block, I0, mips3->impstate->fastram[ramnum].start);// cmp i0,fastram_start
- UML_JMPc(block, COND_B, skip); // jb skip
+ UML_JMPc(block, COND_B, skip); // jb skip
}
if (!iswrite)
@@ -1294,25 +1294,25 @@ static void static_generate_memory_accessor(mips3_state *mips3, int mode, int si
{
UML_XOR(block, I0, I0, mips3->bigendian ? BYTE4_XOR_BE(0) : BYTE4_XOR_LE(0));
// xor i0,i0,bytexor
- UML_LOAD(block, I0, fastbase, I0, SIZE_BYTE, SCALE_x1); // load i0,fastbase,i0,byte
+ UML_LOAD(block, I0, fastbase, I0, SIZE_BYTE, SCALE_x1); // load i0,fastbase,i0,byte
}
else if (size == 2)
{
UML_XOR(block, I0, I0, mips3->bigendian ? WORD_XOR_BE(0) : WORD_XOR_LE(0));
// xor i0,i0,wordxor
- UML_LOAD(block, I0, fastbase, I0, SIZE_WORD, SCALE_x1); // load i0,fastbase,i0,word_x1
+ UML_LOAD(block, I0, fastbase, I0, SIZE_WORD, SCALE_x1); // load i0,fastbase,i0,word_x1
}
else if (size == 4)
{
- UML_LOAD(block, I0, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i0,fastbase,i0,dword_x1
+ UML_LOAD(block, I0, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i0,fastbase,i0,dword_x1
}
else if (size == 8)
{
- UML_DLOAD(block, I0, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i0,fastbase,i0,qword_x1
+ UML_DLOAD(block, I0, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i0,fastbase,i0,qword_x1
UML_DROR(block, I0, I0, 32 * (mips3->bigendian ? BYTE_XOR_BE(0) : BYTE_XOR_LE(0)));
// dror i0,i0,32*bytexor
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
}
else
{
@@ -1332,12 +1332,12 @@ static void static_generate_memory_accessor(mips3_state *mips3, int mode, int si
{
if (ismasked)
{
- UML_LOAD(block, I3, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i3,fastbase,i0,dword_x1
- UML_ROLINS(block, I3, I1, 0, I2); // rolins i3,i1,0,i2
- UML_STORE(block, fastbase, I0, I3, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i3,dword_x1
+ UML_LOAD(block, I3, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i3,fastbase,i0,dword_x1
+ UML_ROLINS(block, I3, I1, 0, I2); // rolins i3,i1,0,i2
+ UML_STORE(block, fastbase, I0, I3, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i3,dword_x1
}
else
- UML_STORE(block, fastbase, I0, I1, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i1,dword_x1
+ UML_STORE(block, fastbase, I0, I1, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i1,dword_x1
}
else if (size == 8)
{
@@ -1347,49 +1347,49 @@ static void static_generate_memory_accessor(mips3_state *mips3, int mode, int si
{
UML_DROR(block, I2, I2, 32 * (mips3->bigendian ? BYTE_XOR_BE(0) : BYTE_XOR_LE(0)));
// dror i2,i2,32*bytexor
- UML_DLOAD(block, I3, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i3,fastbase,i0,qword_x1
- UML_DROLINS(block, I3, I1, 0, I2); // drolins i3,i1,0,i2
- UML_DSTORE(block, fastbase, I0, I3, SIZE_QWORD, SCALE_x1); // dstore fastbase,i0,i3,qword_x1
+ UML_DLOAD(block, I3, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i3,fastbase,i0,qword_x1
+ UML_DROLINS(block, I3, I1, 0, I2); // drolins i3,i1,0,i2
+ UML_DSTORE(block, fastbase, I0, I3, SIZE_QWORD, SCALE_x1); // dstore fastbase,i0,i3,qword_x1
}
else
- UML_DSTORE(block, fastbase, I0, I1, SIZE_QWORD, SCALE_x1); // dstore fastbase,i0,i1,qword_x1
+ UML_DSTORE(block, fastbase, I0, I1, SIZE_QWORD, SCALE_x1); // dstore fastbase,i0,i1,qword_x1
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
}
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
switch (size)
{
case 1:
if (iswrite)
- UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); // write i0,i1,program_byte
+ UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); // write i0,i1,program_byte
else
- UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); // read i0,i0,program_byte
+ UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); // read i0,i0,program_byte
break;
case 2:
if (iswrite)
- UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); // write i0,i1,program_word
+ UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); // write i0,i1,program_word
else
- UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); // read i0,i0,program_word
+ UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); // read i0,i0,program_word
break;
case 4:
if (iswrite)
{
if (!ismasked)
- UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write i0,i1,program_dword
+ UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write i0,i1,program_dword
else
- UML_WRITEM(block, I0, I1, I2, SIZE_DWORD, SPACE_PROGRAM); // writem i0,i1,i2,program_dword
+ UML_WRITEM(block, I0, I1, I2, SIZE_DWORD, SPACE_PROGRAM); // writem i0,i1,i2,program_dword
}
else
{
if (!ismasked)
- UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read i0,i0,program_dword
+ UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read i0,i0,program_dword
else
- UML_READM(block, I0, I0, I2, SIZE_DWORD, SPACE_PROGRAM); // readm i0,i0,i2,program_dword
+ UML_READM(block, I0, I0, I2, SIZE_DWORD, SPACE_PROGRAM); // readm i0,i0,i2,program_dword
}
break;
@@ -1397,33 +1397,33 @@ static void static_generate_memory_accessor(mips3_state *mips3, int mode, int si
if (iswrite)
{
if (!ismasked)
- UML_DWRITE(block, I0, I1, SIZE_QWORD, SPACE_PROGRAM); // dwrite i0,i1,program_qword
+ UML_DWRITE(block, I0, I1, SIZE_QWORD, SPACE_PROGRAM); // dwrite i0,i1,program_qword
else
- UML_DWRITEM(block, I0, I1, I2, SIZE_QWORD, SPACE_PROGRAM); // dwritem i0,i1,i2,program_qword
+ UML_DWRITEM(block, I0, I1, I2, SIZE_QWORD, SPACE_PROGRAM); // dwritem i0,i1,i2,program_qword
}
else
{
if (!ismasked)
- UML_DREAD(block, I0, I0, SIZE_QWORD, SPACE_PROGRAM); // dread i0,i0,program_qword
+ UML_DREAD(block, I0, I0, SIZE_QWORD, SPACE_PROGRAM); // dread i0,i0,program_qword
else
- UML_DREADM(block, I0, I0, I2, SIZE_QWORD, SPACE_PROGRAM); // dreadm i0,i0,i2,program_qword
+ UML_DREADM(block, I0, I0, I2, SIZE_QWORD, SPACE_PROGRAM); // dreadm i0,i0,i2,program_qword
}
break;
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
if (tlbmiss != 0)
{
- UML_LABEL(block, tlbmiss); // tlbmiss:
+ UML_LABEL(block, tlbmiss); // tlbmiss:
if (iswrite)
{
- UML_TEST(block, I3, VTLB_READ_ALLOWED); // test i3,VTLB_READ_ALLOWED
+ UML_TEST(block, I3, VTLB_READ_ALLOWED); // test i3,VTLB_READ_ALLOWED
UML_EXHc(block, COND_NZ, *mips3->impstate->exception[EXCEPTION_TLBMOD], I0);
// exh tlbmod,i0,nz
}
- UML_TEST(block, I3, VTLB_FLAG_FIXED); // test i3,VTLB_FLAG_FIXED
- UML_EXHc(block, COND_NZ, exception_tlb, I0); // exh tlb,i0,nz
- UML_EXH(block, exception_tlbfill, I0); // exh tlbfill,i0
+ UML_TEST(block, I3, VTLB_FLAG_FIXED); // test i3,VTLB_FLAG_FIXED
+ UML_EXHc(block, COND_NZ, exception_tlb, I0); // exh tlb,i0,nz
+ UML_EXH(block, exception_tlbfill, I0); // exh tlbfill,i0
}
block->end();
@@ -1442,11 +1442,11 @@ static void static_generate_memory_accessor(mips3_state *mips3, int mode, int si
static void generate_update_mode(mips3_state *mips3, drcuml_block *block)
{
- UML_ROLAND(block, I2, I0, 32-2, 0x06); // roland i2,i0,32-2,0x06
- UML_TEST(block, I0, SR_EXL | SR_ERL); // test i0,SR_EXL | SR_ERL
- UML_MOVc(block, COND_NZ, I2, 0); // mov i2,0,nz
- UML_ROLINS(block, I2, I0, 32-26, 0x01); // rolins i2,i0,32-26,0x01
- UML_MOV(block, mem(&mips3->impstate->mode), I2); // mov [mode],i2
+ UML_ROLAND(block, I2, I0, 32-2, 0x06); // roland i2,i0,32-2,0x06
+ UML_TEST(block, I0, SR_EXL | SR_ERL); // test i0,SR_EXL | SR_ERL
+ UML_MOVc(block, COND_NZ, I2, 0); // mov i2,0,nz
+ UML_ROLINS(block, I2, I0, 32-26, 0x01); // rolins i2,i0,32-26,0x01
+ UML_MOV(block, mem(&mips3->impstate->mode), I2); // mov [mode],i2
}
@@ -1464,13 +1464,13 @@ static void generate_update_cycles(mips3_state *mips3, drcuml_block *block, comp
code_label skip;
compiler->checksoftints = FALSE;
- UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
- UML_AND(block, I0, I0, 0x0300); // and i0,i0,0x0300
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
- UML_MOV(block, I0, param); // mov i0,nextpc
- UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
+ UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
+ UML_AND(block, I0, I0, 0x0300); // and i0,i0,0x0300
+ UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ UML_MOV(block, I0, param); // mov i0,nextpc
+ UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
UML_CALLH(block, *mips3->impstate->exception_norecover[EXCEPTION_INTERRUPT]);// callh interrupt_norecover
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
/* check full interrupts if pending */
@@ -1479,24 +1479,24 @@ static void generate_update_cycles(mips3_state *mips3, drcuml_block *block, comp
code_label skip;
compiler->checkints = FALSE;
- UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
- UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
- UML_TEST(block, CPR032(COP0_Status), SR_IE); // test [Status],SR_IE
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
- UML_TEST(block, CPR032(COP0_Status), SR_EXL | SR_ERL); // test [Status],SR_EXL | SR_ERL
- UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
- UML_MOV(block, I0, param); // mov i0,nextpc
- UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
+ UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
+ UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00
+ UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ UML_TEST(block, CPR032(COP0_Status), SR_IE); // test [Status],SR_IE
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_TEST(block, CPR032(COP0_Status), SR_EXL | SR_ERL); // test [Status],SR_EXL | SR_ERL
+ UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
+ UML_MOV(block, I0, param); // mov i0,nextpc
+ UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
UML_CALLH(block, *mips3->impstate->exception_norecover[EXCEPTION_INTERRUPT]);// callh interrupt_norecover
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
/* account for cycles */
if (compiler->cycles > 0)
{
- UML_SUB(block, mem(&mips3->icount), mem(&mips3->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
- UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
+ UML_SUB(block, mem(&mips3->icount), mem(&mips3->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
if (allow_exception)
UML_EXHc(block, COND_S, *mips3->impstate->out_of_cycles, param);
// exh out_of_cycles,nextpc
@@ -1514,7 +1514,7 @@ static void generate_checksum_block(mips3_state *mips3, drcuml_block *block, com
{
const opcode_desc *curdesc;
if (LOG_UML)
- block->append_comment("[Validation for %08X]", seqhead->pc); // comment
+ block->append_comment("[Validation for %08X]", seqhead->pc); // comment
/* loose verify or single instruction: just compare and fail */
if (!(mips3->impstate->drcoptions & MIPS3DRC_STRICT_VERIFY) || seqhead->next() == NULL)
@@ -1523,19 +1523,19 @@ static void generate_checksum_block(mips3_state *mips3, drcuml_block *block, com
{
UINT32 sum = seqhead->opptr.l[0];
void *base = mips3->direct->read_decrypted_ptr(seqhead->physpc);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
if (seqhead->delay.first() != NULL && seqhead->physpc != seqhead->delay.first()->physpc)
{
base = mips3->direct->read_decrypted_ptr(seqhead->delay.first()->physpc);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += seqhead->delay.first()->opptr.l[0];
}
- UML_CMP(block, I0, sum); // cmp i0,opptr[0]
- UML_EXHc(block, COND_NE, *mips3->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_CMP(block, I0, sum); // cmp i0,opptr[0]
+ UML_EXHc(block, COND_NE, *mips3->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
}
@@ -1547,33 +1547,33 @@ static void generate_checksum_block(mips3_state *mips3, drcuml_block *block, com
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
void *base = mips3->direct->read_decrypted_ptr(seqhead->physpc);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
- UML_CMP(block, I0, curdesc->opptr.l[0]); // cmp i0,opptr[0]
- UML_EXHc(block, COND_NE, *mips3->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
+ UML_CMP(block, I0, curdesc->opptr.l[0]); // cmp i0,opptr[0]
+ UML_EXHc(block, COND_NE, *mips3->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
#else
UINT32 sum = 0;
void *base = mips3->direct->read_decrypted_ptr(seqhead->physpc);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
sum += seqhead->opptr.l[0];
for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
base = mips3->direct->read_decrypted_ptr(curdesc->physpc);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += curdesc->opptr.l[0];
if (curdesc->delay.first() != NULL && (curdesc == seqlast || (curdesc->next() != NULL && curdesc->next()->physpc != curdesc->delay.first()->physpc)))
{
base = mips3->direct->read_decrypted_ptr(curdesc->delay.first()->physpc);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += curdesc->delay.first()->opptr.l[0];
}
}
- UML_CMP(block, I0, sum); // cmp i0,sum
- UML_EXHc(block, COND_NE, *mips3->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_CMP(block, I0, sum); // cmp i0,sum
+ UML_EXHc(block, COND_NE, *mips3->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
#endif
}
}
@@ -1595,7 +1595,7 @@ static void generate_sequence_instruction(mips3_state *mips3, drcuml_block *bloc
/* set the PC map variable */
expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc;
- UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
+ UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
/* accumulate total cycles */
compiler->cycles += desc->cycles;
@@ -1609,29 +1609,29 @@ static void generate_sequence_instruction(mips3_state *mips3, drcuml_block *bloc
}
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
/* if we want a probe, add it here */
if (desc->pc == PROBE_ADDRESS)
{
- UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
- UML_CALLC(block, cfunc_printf_probe, mips3); // callc cfunc_printf_probe,mips3
+ UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
+ UML_CALLC(block, cfunc_printf_probe, mips3); // callc cfunc_printf_probe,mips3
}
/* if we are debugging, call the debugger */
if ((mips3->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
- UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(mips3, block);
- UML_DEBUG(block, desc->pc); // debug desc->pc
+ UML_DEBUG(block, desc->pc); // debug desc->pc
}
/* if we hit an unmapped address, fatal error */
if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
{
- UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(mips3, block);
- UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
+ UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
}
/* if we hit a compiler page fault, it's just like a TLB mismatch */
@@ -1640,11 +1640,11 @@ static void generate_sequence_instruction(mips3_state *mips3, drcuml_block *bloc
if (PRINTF_MMU)
{
static const char text[] = "Compiler page fault @ %08X";
- UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
- UML_MOV(block, mem(&mips3->impstate->arg0), desc->pc); // mov [arg0],desc->pc
- UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
+ UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
+ UML_MOV(block, mem(&mips3->impstate->arg0), desc->pc); // mov [arg0],desc->pc
+ UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
}
- UML_EXH(block, *mips3->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
+ UML_EXH(block, *mips3->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
}
/* validate our TLB entry at this PC; if we fail, we need to handle it */
@@ -1658,13 +1658,13 @@ static void generate_sequence_instruction(mips3_state *mips3, drcuml_block *bloc
if (PRINTF_MMU)
{
static const char text[] = "Checking TLB at @ %08X\n";
- UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
- UML_MOV(block, mem(&mips3->impstate->arg0), desc->pc); // mov [arg0],desc->pc
- UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
+ UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
+ UML_MOV(block, mem(&mips3->impstate->arg0), desc->pc); // mov [arg0],desc->pc
+ UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
}
- UML_LOAD(block, I0, &tlbtable[desc->pc >> 12], 0, SIZE_DWORD, SCALE_x4); // load i0,tlbtable[desc->pc >> 12],0,dword
- UML_CMP(block, I0, tlbtable[desc->pc >> 12]); // cmp i0,*tlbentry
- UML_EXHc(block, COND_NE, *mips3->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0,NE
+ UML_LOAD(block, I0, &tlbtable[desc->pc >> 12], 0, SIZE_DWORD, SCALE_x4); // load i0,tlbtable[desc->pc >> 12],0,dword
+ UML_CMP(block, I0, tlbtable[desc->pc >> 12]); // cmp i0,*tlbentry
+ UML_EXHc(block, COND_NE, *mips3->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0,NE
}
/* otherwise, we generate an unconditional exception */
@@ -1673,17 +1673,17 @@ static void generate_sequence_instruction(mips3_state *mips3, drcuml_block *bloc
if (PRINTF_MMU)
{
static const char text[] = "No valid TLB @ %08X\n";
- UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
- UML_MOV(block, mem(&mips3->impstate->arg0), desc->pc); // mov [arg0],desc->pc
- UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
+ UML_MOV(block, mem(&mips3->impstate->format), (FPTR)text); // mov [format],text
+ UML_MOV(block, mem(&mips3->impstate->arg0), desc->pc); // mov [arg0],desc->pc
+ UML_CALLC(block, cfunc_printf_debug, mips3); // callc printf_debug
}
- UML_EXH(block, *mips3->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
+ UML_EXH(block, *mips3->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
}
}
/* if this is an invalid opcode, generate the exception now */
if (desc->flags & OPFLAG_INVALID_OPCODE)
- UML_EXH(block, *mips3->impstate->exception[EXCEPTION_INVALIDOP], 0); // exh invalidop,0
+ UML_EXH(block, *mips3->impstate->exception[EXCEPTION_INVALIDOP], 0); // exh invalidop,0
/* otherwise, unless this is a virtual no-op, it's a regular instruction */
else if (!(desc->flags & OPFLAG_VIRTUAL_NOOP))
@@ -1691,9 +1691,9 @@ static void generate_sequence_instruction(mips3_state *mips3, drcuml_block *bloc
/* compile the instruction */
if (!generate_opcode(mips3, block, compiler, desc))
{
- UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
- UML_MOV(block, mem(&mips3->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_unimplemented, mips3); // callc cfunc_unimplemented
+ UML_MOV(block, mem(&mips3->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&mips3->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_unimplemented, mips3); // callc cfunc_unimplemented
}
}
}
@@ -1711,26 +1711,26 @@ static void generate_delay_slot_and_branch(mips3_state *mips3, drcuml_block *blo
/* fetch the target register if dynamic, in case it is modified by the delay slot */
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
{
- UML_MOV(block, mem(&mips3->impstate->jmpdest), R32(RSREG)); // mov [jmpdest],<rsreg>
+ UML_MOV(block, mem(&mips3->impstate->jmpdest), R32(RSREG)); // mov [jmpdest],<rsreg>
}
/* set the link if needed -- before the delay slot */
if (linkreg != 0)
{
- UML_DMOV(block, R64(linkreg), (INT32)(desc->pc + 8)); // dmov <linkreg>,desc->pc + 8
+ UML_DMOV(block, R64(linkreg), (INT32)(desc->pc + 8)); // dmov <linkreg>,desc->pc + 8
}
/* compile the delay slot using temporary compiler state */
assert(desc->delay.first() != NULL);
- generate_sequence_instruction(mips3, block, &compiler_temp, desc->delay.first()); // <next instruction>
+ generate_sequence_instruction(mips3, block, &compiler_temp, desc->delay.first()); // <next instruction>
/* update the cycles and jump through the hash table to the target */
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(mips3, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
+ generate_update_cycles(mips3, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
- UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000
+ UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000
else
UML_HASHJMP(block, mips3->impstate->mode, desc->targetpc, *mips3->impstate->nocode);
// hashjmp <mode>,desc->targetpc,nocode
@@ -1748,7 +1748,7 @@ static void generate_delay_slot_and_branch(mips3_state *mips3, drcuml_block *blo
/* reset the mapvar to the current cycles and account for skipped slots */
compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
}
@@ -1768,325 +1768,325 @@ static int generate_opcode(mips3_state *mips3, drcuml_block *block, compiler_sta
{
/* ----- sub-groups ----- */
- case 0x00: /* SPECIAL - MIPS I */
+ case 0x00: /* SPECIAL - MIPS I */
return generate_special(mips3, block, compiler, desc);
- case 0x01: /* REGIMM - MIPS I */
+ case 0x01: /* REGIMM - MIPS I */
return generate_regimm(mips3, block, compiler, desc);
- case 0x1c: /* IDT-specific */
+ case 0x1c: /* IDT-specific */
return generate_idt(mips3, block, compiler, desc);
/* ----- jumps and branches ----- */
- case 0x02: /* J - MIPS I */
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
+ case 0x02: /* J - MIPS I */
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
return TRUE;
- case 0x03: /* JAL - MIPS I */
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 31); // <next instruction + hashjmp>
+ case 0x03: /* JAL - MIPS I */
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 31); // <next instruction + hashjmp>
return TRUE;
- case 0x04: /* BEQ - MIPS I */
- case 0x14: /* BEQL - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ case 0x04: /* BEQ - MIPS I */
+ case 0x14: /* BEQL - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
return TRUE;
- case 0x05: /* BNE - MIPS I */
- case 0x15: /* BNEL - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ case 0x05: /* BNE - MIPS I */
+ case 0x15: /* BNEL - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
return TRUE;
- case 0x06: /* BLEZ - MIPS I */
- case 0x16: /* BLEZL - MIPS II */
+ case 0x06: /* BLEZ - MIPS I */
+ case 0x16: /* BLEZL - MIPS II */
if (RSREG != 0)
{
- UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
}
else
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
return TRUE;
- case 0x07: /* BGTZ - MIPS I */
- case 0x17: /* BGTZL - MIPS II */
- UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ case 0x07: /* BGTZ - MIPS I */
+ case 0x17: /* BGTZL - MIPS II */
+ UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
return TRUE;
/* ----- immediate arithmetic ----- */
- case 0x0f: /* LUI - MIPS I */
+ case 0x0f: /* LUI - MIPS I */
if (RTREG != 0)
- UML_DMOV(block, R64(RTREG), SIMMVAL << 16); // dmov <rtreg>,SIMMVAL << 16
+ UML_DMOV(block, R64(RTREG), SIMMVAL << 16); // dmov <rtreg>,SIMMVAL << 16
return TRUE;
- case 0x08: /* ADDI - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ case 0x08: /* ADDI - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
UML_EXHc(block, COND_V, *mips3->impstate->exception[EXCEPTION_OVERFLOW], 0);
// exh overflow,0
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
return TRUE;
- case 0x09: /* ADDIU - MIPS I */
+ case 0x09: /* ADDIU - MIPS I */
if (RTREG != 0)
{
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL,V
- UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL,V
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
}
return TRUE;
- case 0x18: /* DADDI - MIPS III */
- UML_DADD(block, I0, R64(RSREG), SIMMVAL); // dadd i0,<rsreg>,SIMMVAL
+ case 0x18: /* DADDI - MIPS III */
+ UML_DADD(block, I0, R64(RSREG), SIMMVAL); // dadd i0,<rsreg>,SIMMVAL
if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
UML_EXHc(block, COND_V, *mips3->impstate->exception[EXCEPTION_OVERFLOW], 0);
// exh overflow,0
if (RTREG != 0)
- UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
+ UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
return TRUE;
- case 0x19: /* DADDIU - MIPS III */
+ case 0x19: /* DADDIU - MIPS III */
if (RTREG != 0)
- UML_DADD(block, R64(RTREG), R64(RSREG), SIMMVAL); // dadd <rtreg>,<rsreg>,SIMMVAL
+ UML_DADD(block, R64(RTREG), R64(RSREG), SIMMVAL); // dadd <rtreg>,<rsreg>,SIMMVAL
return TRUE;
- case 0x0c: /* ANDI - MIPS I */
+ case 0x0c: /* ANDI - MIPS I */
if (RTREG != 0)
- UML_DAND(block, R64(RTREG), R64(RSREG), UIMMVAL); // dand <rtreg>,<rsreg>,UIMMVAL
+ UML_DAND(block, R64(RTREG), R64(RSREG), UIMMVAL); // dand <rtreg>,<rsreg>,UIMMVAL
return TRUE;
- case 0x0d: /* ORI - MIPS I */
+ case 0x0d: /* ORI - MIPS I */
if (RTREG != 0)
- UML_DOR(block, R64(RTREG), R64(RSREG), UIMMVAL); // dor <rtreg>,<rsreg>,UIMMVAL
+ UML_DOR(block, R64(RTREG), R64(RSREG), UIMMVAL); // dor <rtreg>,<rsreg>,UIMMVAL
return TRUE;
- case 0x0e: /* XORI - MIPS I */
+ case 0x0e: /* XORI - MIPS I */
if (RTREG != 0)
- UML_DXOR(block, R64(RTREG), R64(RSREG), UIMMVAL); // dxor <rtreg>,<rsreg>,UIMMVAL
+ UML_DXOR(block, R64(RTREG), R64(RSREG), UIMMVAL); // dxor <rtreg>,<rsreg>,UIMMVAL
return TRUE;
- case 0x0a: /* SLTI - MIPS I */
+ case 0x0a: /* SLTI - MIPS I */
if (RTREG != 0)
{
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
- UML_DSETc(block, COND_L, R64(RTREG)); // dset <rtreg>,l
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ UML_DSETc(block, COND_L, R64(RTREG)); // dset <rtreg>,l
}
return TRUE;
- case 0x0b: /* SLTIU - MIPS I */
+ case 0x0b: /* SLTIU - MIPS I */
if (RTREG != 0)
{
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
- UML_DSETc(block, COND_B, R64(RTREG)); // dset <rtreg>,b
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ UML_DSETc(block, COND_B, R64(RTREG)); // dset <rtreg>,b
}
return TRUE;
/* ----- memory load operations ----- */
- case 0x20: /* LB - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read8[mips3->impstate->mode >> 1]); // callh read8
+ case 0x20: /* LB - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read8[mips3->impstate->mode >> 1]); // callh read8
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), I0, SIZE_BYTE); // dsext <rtreg>,i0,byte
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_BYTE); // dsext <rtreg>,i0,byte
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x21: /* LH - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read16[mips3->impstate->mode >> 1]); // callh read16
+ case 0x21: /* LH - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read16[mips3->impstate->mode >> 1]); // callh read16
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), I0, SIZE_WORD); // dsext <rtreg>,i0,word
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_WORD); // dsext <rtreg>,i0,word
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x23: /* LW - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
+ case 0x23: /* LW - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
case 0x30: /* LL - MIPS II */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0
- UML_MOV(block, mem(&mips3->llbit), 1); // mov [llbit],1
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0
+ UML_MOV(block, mem(&mips3->llbit), 1); // mov [llbit],1
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x24: /* LBU - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read8[mips3->impstate->mode >> 1]); // callh read8
+ case 0x24: /* LBU - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read8[mips3->impstate->mode >> 1]); // callh read8
if (RTREG != 0)
- UML_DAND(block, R64(RTREG), I0, 0xff); // dand <rtreg>,i0,0xff
+ UML_DAND(block, R64(RTREG), I0, 0xff); // dand <rtreg>,i0,0xff
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x25: /* LHU - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read16[mips3->impstate->mode >> 1]); // callh read16
+ case 0x25: /* LHU - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read16[mips3->impstate->mode >> 1]); // callh read16
if (RTREG != 0)
- UML_DAND(block, R64(RTREG), I0, 0xffff); // dand <rtreg>,i0,0xffff
+ UML_DAND(block, R64(RTREG), I0, 0xffff); // dand <rtreg>,i0,0xffff
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x27: /* LWU - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
+ case 0x27: /* LWU - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
if (RTREG != 0)
- UML_DAND(block, R64(RTREG), I0, 0xffffffff); // dand <rtreg>,i0,0xffffffff
+ UML_DAND(block, R64(RTREG), I0, 0xffffffff); // dand <rtreg>,i0,0xffffffff
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x37: /* LD - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
+ case 0x37: /* LD - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
if (RTREG != 0)
- UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
+ UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
case 0x34: /* LLD - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
if (RTREG != 0)
- UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
- UML_MOV(block, mem(&mips3->llbit), 1); // mov [llbit],1
+ UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
+ UML_MOV(block, mem(&mips3->llbit), 1); // mov [llbit],1
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x22: /* LWL - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I1, I0, 3); // shl i1,i0,3
- UML_AND(block, I0, I0, ~3); // and i0,i0,~3
+ case 0x22: /* LWL - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I1, I0, 3); // shl i1,i0,3
+ UML_AND(block, I0, I0, ~3); // and i0,i0,~3
if (!mips3->bigendian)
- UML_XOR(block, I1, I1, 0x18); // xor i1,i1,0x18
- UML_SHR(block, I2, ~0, I1); // shr i2,~0,i1
+ UML_XOR(block, I1, I1, 0x18); // xor i1,i1,0x18
+ UML_SHR(block, I2, ~0, I1); // shr i2,~0,i1
UML_CALLH(block, *mips3->impstate->read32mask[mips3->impstate->mode >> 1]);
// callh read32mask
if (RTREG != 0)
{
- UML_SHL(block, I2, ~0, I1); // shl i2,~0,i1
- UML_MOV(block, I3, R32(RTREG)); // mov i3,<rtreg>
- UML_ROLINS(block, I3, I0, I1, I2); // rolins i3,i0,i1,i2
- UML_DSEXT(block, R64(RTREG), I3, SIZE_DWORD); // dsext <rtreg>,i3,dword
+ UML_SHL(block, I2, ~0, I1); // shl i2,~0,i1
+ UML_MOV(block, I3, R32(RTREG)); // mov i3,<rtreg>
+ UML_ROLINS(block, I3, I0, I1, I2); // rolins i3,i0,i1,i2
+ UML_DSEXT(block, R64(RTREG), I3, SIZE_DWORD); // dsext <rtreg>,i3,dword
}
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x26: /* LWR - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I1, I0, 3); // shl i1,i0,3
- UML_AND(block, I0, I0, ~3); // and i0,i0,~3
+ case 0x26: /* LWR - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I1, I0, 3); // shl i1,i0,3
+ UML_AND(block, I0, I0, ~3); // and i0,i0,~3
if (mips3->bigendian)
- UML_XOR(block, I1, I1, 0x18); // xor i1,i1,0x18
- UML_SHL(block, I2, ~0, I1); // shl i2,~0,i1
+ UML_XOR(block, I1, I1, 0x18); // xor i1,i1,0x18
+ UML_SHL(block, I2, ~0, I1); // shl i2,~0,i1
UML_CALLH(block, *mips3->impstate->read32mask[mips3->impstate->mode >> 1]);
// callh read32mask
if (RTREG != 0)
{
- UML_SHR(block, I2, ~0, I1); // shr i2,~0,i1
- UML_SUB(block, I1, 32, I1); // sub i1,32,i1
- UML_MOV(block, I3, R32(RTREG)); // mov i3,<rtreg>
- UML_ROLINS(block, I3, I0, I1, I2); // rolins i3,i0,i1,i2
- UML_DSEXT(block, R64(RTREG), I3, SIZE_DWORD); // dsext <rtreg>,i3,dword
+ UML_SHR(block, I2, ~0, I1); // shr i2,~0,i1
+ UML_SUB(block, I1, 32, I1); // sub i1,32,i1
+ UML_MOV(block, I3, R32(RTREG)); // mov i3,<rtreg>
+ UML_ROLINS(block, I3, I0, I1, I2); // rolins i3,i0,i1,i2
+ UML_DSEXT(block, R64(RTREG), I3, SIZE_DWORD); // dsext <rtreg>,i3,dword
}
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x1a: /* LDL - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I1, I0, 3); // shl i1,i0,3
- UML_AND(block, I0, I0, ~7); // and i0,i0,~7
+ case 0x1a: /* LDL - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I1, I0, 3); // shl i1,i0,3
+ UML_AND(block, I0, I0, ~7); // and i0,i0,~7
if (!mips3->bigendian)
- UML_XOR(block, I1, I1, 0x38); // xor i1,i1,0x38
- UML_DSHR(block, I2, (UINT64)~0, I1); // dshr i2,~0,i1
+ UML_XOR(block, I1, I1, 0x38); // xor i1,i1,0x38
+ UML_DSHR(block, I2, (UINT64)~0, I1); // dshr i2,~0,i1
UML_CALLH(block, *mips3->impstate->read64mask[mips3->impstate->mode >> 1]);
// callh read64mask
if (RTREG != 0)
{
- UML_DSHL(block, I2, (UINT64)~0, I1); // dshl i2,~0,i1
- UML_DROLINS(block, R64(RTREG), I0, I1, I2); // drolins <rtreg>,i0,i1,i2
+ UML_DSHL(block, I2, (UINT64)~0, I1); // dshl i2,~0,i1
+ UML_DROLINS(block, R64(RTREG), I0, I1, I2); // drolins <rtreg>,i0,i1,i2
}
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x1b: /* LDR - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I1, I0, 3); // shl i1,i0,3
- UML_AND(block, I0, I0, ~7); // and i0,i0,~7
+ case 0x1b: /* LDR - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I1, I0, 3); // shl i1,i0,3
+ UML_AND(block, I0, I0, ~7); // and i0,i0,~7
if (mips3->bigendian)
- UML_XOR(block, I1, I1, 0x38); // xor i1,i1,0x38
- UML_DSHL(block, I2, (UINT64)~0, I1); // dshl i2,~0,i1
+ UML_XOR(block, I1, I1, 0x38); // xor i1,i1,0x38
+ UML_DSHL(block, I2, (UINT64)~0, I1); // dshl i2,~0,i1
UML_CALLH(block, *mips3->impstate->read64mask[mips3->impstate->mode >> 1]);
// callh read64mask
if (RTREG != 0)
{
- UML_DSHR(block, I2, (UINT64)~0, I1); // dshr i2,~0,i1
- UML_SUB(block, I1, 64, I1); // sub i1,64,i1
- UML_DROLINS(block, R64(RTREG), I0, I1, I2); // drolins <rtreg>,i0,i1,i2
+ UML_DSHR(block, I2, (UINT64)~0, I1); // dshr i2,~0,i1
+ UML_SUB(block, I1, 64, I1); // sub i1,64,i1
+ UML_DROLINS(block, R64(RTREG), I0, I1, I2); // drolins <rtreg>,i0,i1,i2
}
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x31: /* LWC1 - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
- UML_MOV(block, FPR32(RTREG), I0); // mov <cpr1_rt>,i0
+ case 0x31: /* LWC1 - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
+ UML_MOV(block, FPR32(RTREG), I0); // mov <cpr1_rt>,i0
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x35: /* LDC1 - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
- UML_DMOV(block, FPR64(RTREG), I0); // dmov <cpr1_rt>,i0
+ case 0x35: /* LDC1 - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
+ UML_DMOV(block, FPR64(RTREG), I0); // dmov <cpr1_rt>,i0
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x32: /* LWC2 - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
- UML_DAND(block, CPR264(RTREG), I0, 0xffffffff); // dand <cpr2_rt>,i0,0xffffffff
+ case 0x32: /* LWC2 - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
+ UML_DAND(block, CPR264(RTREG), I0, 0xffffffff); // dand <cpr2_rt>,i0,0xffffffff
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x36: /* LDC2 - MIPS II */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
- UML_DMOV(block, CPR264(RTREG), I0); // dmov <cpr2_rt>,i0
+ case 0x36: /* LDC2 - MIPS II */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
+ UML_DMOV(block, CPR264(RTREG), I0); // dmov <cpr2_rt>,i0
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
@@ -2094,150 +2094,150 @@ static int generate_opcode(mips3_state *mips3, drcuml_block *block, compiler_sta
/* ----- memory store operations ----- */
- case 0x28: /* SB - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *mips3->impstate->write8[mips3->impstate->mode >> 1]); // callh write8
+ case 0x28: /* SB - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *mips3->impstate->write8[mips3->impstate->mode >> 1]); // callh write8
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x29: /* SH - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *mips3->impstate->write16[mips3->impstate->mode >> 1]); // callh write16
+ case 0x29: /* SH - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *mips3->impstate->write16[mips3->impstate->mode >> 1]); // callh write16
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x2b: /* SW - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
+ case 0x2b: /* SW - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
case 0x38: /* SC - MIPS II */
- UML_CMP(block, mem(&mips3->llbit), 0); // cmp [llbit],0
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // je skip
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
- UML_LABEL(block, skip); // skip:
- UML_DSEXT(block, R64(RTREG), mem(&mips3->llbit), SIZE_DWORD); // dsext <rtreg>,[llbit],dword
+ UML_CMP(block, mem(&mips3->llbit), 0); // cmp [llbit],0
+ UML_JMPc(block, COND_E, skip = compiler->labelnum++); // je skip
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
+ UML_LABEL(block, skip); // skip:
+ UML_DSEXT(block, R64(RTREG), mem(&mips3->llbit), SIZE_DWORD); // dsext <rtreg>,[llbit],dword
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x3f: /* SD - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
- UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
+ case 0x3f: /* SD - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
+ UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
case 0x3c: /* SCD - MIPS III */
- UML_CMP(block, mem(&mips3->llbit), 0); // cmp [llbit],0
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // je skip
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
- UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
- UML_LABEL(block, skip); // skip:
- UML_DSEXT(block, R64(RTREG), mem(&mips3->llbit), SIZE_DWORD); // dsext <rtreg>,[llbit],dword
+ UML_CMP(block, mem(&mips3->llbit), 0); // cmp [llbit],0
+ UML_JMPc(block, COND_E, skip = compiler->labelnum++); // je skip
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
+ UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
+ UML_LABEL(block, skip); // skip:
+ UML_DSEXT(block, R64(RTREG), mem(&mips3->llbit), SIZE_DWORD); // dsext <rtreg>,[llbit],dword
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x2a: /* SWL - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I3, I0, 3); // shl i3,i0,3
- UML_AND(block, I0, I0, ~3); // and i0,i0,~3
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ case 0x2a: /* SWL - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I3, I0, 3); // shl i3,i0,3
+ UML_AND(block, I0, I0, ~3); // and i0,i0,~3
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
if (!mips3->bigendian)
- UML_XOR(block, I3, I3, 0x18); // xor i3,i3,0x18
- UML_SHR(block, I2, ~0, I3); // shr i2,~0,i3
- UML_SHR(block, I1, I1, I3); // shr i1,i1,i3
+ UML_XOR(block, I3, I3, 0x18); // xor i3,i3,0x18
+ UML_SHR(block, I2, ~0, I3); // shr i2,~0,i3
+ UML_SHR(block, I1, I1, I3); // shr i1,i1,i3
UML_CALLH(block, *mips3->impstate->write32mask[mips3->impstate->mode >> 1]);
// callh write32mask
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x2e: /* SWR - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I3, I0, 3); // shl i3,i0,3
- UML_AND(block, I0, I0, ~3); // and i0,i0,~3
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ case 0x2e: /* SWR - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I3, I0, 3); // shl i3,i0,3
+ UML_AND(block, I0, I0, ~3); // and i0,i0,~3
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
if (mips3->bigendian)
- UML_XOR(block, I3, I3, 0x18); // xor i3,i3,0x18
- UML_SHL(block, I2, ~0, I3); // shl i2,~0,i3
- UML_SHL(block, I1, I1, I3); // shl i1,i1,i3
+ UML_XOR(block, I3, I3, 0x18); // xor i3,i3,0x18
+ UML_SHL(block, I2, ~0, I3); // shl i2,~0,i3
+ UML_SHL(block, I1, I1, I3); // shl i1,i1,i3
UML_CALLH(block, *mips3->impstate->write32mask[mips3->impstate->mode >> 1]);
// callh write32mask
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x2c: /* SDL - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I3, I0, 3); // shl i3,i0,3
- UML_AND(block, I0, I0, ~7); // and i0,i0,~7
- UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
+ case 0x2c: /* SDL - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I3, I0, 3); // shl i3,i0,3
+ UML_AND(block, I0, I0, ~7); // and i0,i0,~7
+ UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
if (!mips3->bigendian)
- UML_XOR(block, I3, I3, 0x38); // xor i3,i3,0x38
- UML_DSHR(block, I2, (UINT64)~0, I3); // dshr i2,~0,i3
- UML_DSHR(block, I1, I1, I3); // dshr i1,i1,i3
+ UML_XOR(block, I3, I3, 0x38); // xor i3,i3,0x38
+ UML_DSHR(block, I2, (UINT64)~0, I3); // dshr i2,~0,i3
+ UML_DSHR(block, I1, I1, I3); // dshr i1,i1,i3
UML_CALLH(block, *mips3->impstate->write64mask[mips3->impstate->mode >> 1]);
// callh write64mask
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x2d: /* SDR - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_SHL(block, I3, I0, 3); // shl i3,i0,3
- UML_AND(block, I0, I0, ~7); // and i0,i0,~7
- UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
+ case 0x2d: /* SDR - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_SHL(block, I3, I0, 3); // shl i3,i0,3
+ UML_AND(block, I0, I0, ~7); // and i0,i0,~7
+ UML_DMOV(block, I1, R64(RTREG)); // dmov i1,<rtreg>
if (mips3->bigendian)
- UML_XOR(block, I3, I3, 0x38); // xor i3,i3,0x38
- UML_DSHL(block, I2, (UINT64)~0, I3); // dshl i2,~0,i3
- UML_DSHL(block, I1, I1, I3); // dshl i1,i1,i3
+ UML_XOR(block, I3, I3, 0x38); // xor i3,i3,0x38
+ UML_DSHL(block, I2, (UINT64)~0, I3); // dshl i2,~0,i3
+ UML_DSHL(block, I1, I1, I3); // dshl i1,i1,i3
UML_CALLH(block, *mips3->impstate->write64mask[mips3->impstate->mode >> 1]);
// callh write64mask
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x39: /* SWC1 - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, FPR32(RTREG)); // mov i1,<cpr1_rt>
- UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
+ case 0x39: /* SWC1 - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, FPR32(RTREG)); // mov i1,<cpr1_rt>
+ UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x3d: /* SDC1 - MIPS III */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_DMOV(block, I1, FPR64(RTREG)); // dmov i1,<cpr1_rt>
- UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
+ case 0x3d: /* SDC1 - MIPS III */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_DMOV(block, I1, FPR64(RTREG)); // dmov i1,<cpr1_rt>
+ UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x3a: /* SWC2 - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, CPR232(RTREG)); // mov i1,<cpr2_rt>
- UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
+ case 0x3a: /* SWC2 - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, CPR232(RTREG)); // mov i1,<cpr2_rt>
+ UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x3e: /* SDC2 - MIPS II */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_DMOV(block, I1, CPR264(RTREG)); // dmov i1,<cpr2_rt>
- UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
+ case 0x3e: /* SDC2 - MIPS II */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_DMOV(block, I1, CPR264(RTREG)); // dmov i1,<cpr2_rt>
+ UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
@@ -2245,23 +2245,23 @@ static int generate_opcode(mips3_state *mips3, drcuml_block *block, compiler_sta
/* ----- effective no-ops ----- */
- case 0x2f: /* CACHE - MIPS II */
- case 0x33: /* PREF - MIPS IV */
+ case 0x2f: /* CACHE - MIPS II */
+ case 0x33: /* PREF - MIPS IV */
return TRUE;
/* ----- coprocessor instructions ----- */
- case 0x10: /* COP0 - MIPS I */
+ case 0x10: /* COP0 - MIPS I */
return generate_cop0(mips3, block, compiler, desc);
- case 0x11: /* COP1 - MIPS I */
+ case 0x11: /* COP1 - MIPS I */
return generate_cop1(mips3, block, compiler, desc);
- case 0x13: /* COP1X - MIPS IV */
+ case 0x13: /* COP1X - MIPS IV */
return generate_cop1x(mips3, block, compiler, desc);
- case 0x12: /* COP2 - MIPS I */
+ case 0x12: /* COP2 - MIPS I */
UML_EXH(block, *mips3->impstate->exception[EXCEPTION_INVALIDOP], 0);// exh invalidop,0
return TRUE;
@@ -2289,327 +2289,327 @@ static int generate_special(mips3_state *mips3, drcuml_block *block, compiler_st
{
/* ----- shift instructions ----- */
- case 0x00: /* SLL - MIPS I */
+ case 0x00: /* SLL - MIPS I */
if (RDREG != 0)
{
- UML_SHL(block, I0, R32(RTREG), SHIFT); // shl i0,<rtreg>,<shift>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SHL(block, I0, R32(RTREG), SHIFT); // shl i0,<rtreg>,<shift>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x02: /* SRL - MIPS I */
+ case 0x02: /* SRL - MIPS I */
if (RDREG != 0)
{
- UML_SHR(block, I0, R32(RTREG), SHIFT); // shr i0,<rtreg>,<shift>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SHR(block, I0, R32(RTREG), SHIFT); // shr i0,<rtreg>,<shift>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x03: /* SRA - MIPS I */
+ case 0x03: /* SRA - MIPS I */
if (RDREG != 0)
{
- UML_SAR(block, I0, R32(RTREG), SHIFT); // sar i0,<rtreg>,<shift>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SAR(block, I0, R32(RTREG), SHIFT); // sar i0,<rtreg>,<shift>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x04: /* SLLV - MIPS I */
+ case 0x04: /* SLLV - MIPS I */
if (RDREG != 0)
{
- UML_SHL(block, I0, R32(RTREG), R32(RSREG)); // shl i0,<rtreg>,<rsreg>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SHL(block, I0, R32(RTREG), R32(RSREG)); // shl i0,<rtreg>,<rsreg>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x06: /* SRLV - MIPS I */
+ case 0x06: /* SRLV - MIPS I */
if (RDREG != 0)
{
- UML_SHR(block, I0, R32(RTREG), R32(RSREG)); // shr i0,<rtreg>,<rsreg>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SHR(block, I0, R32(RTREG), R32(RSREG)); // shr i0,<rtreg>,<rsreg>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x07: /* SRAV - MIPS I */
+ case 0x07: /* SRAV - MIPS I */
if (RDREG != 0)
{
- UML_SAR(block, I0, R32(RTREG), R32(RSREG)); // sar i0,<rtreg>,<rsreg>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SAR(block, I0, R32(RTREG), R32(RSREG)); // sar i0,<rtreg>,<rsreg>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x38: /* DSLL - MIPS III */
+ case 0x38: /* DSLL - MIPS III */
if (RDREG != 0)
- UML_DSHL(block, R64(RDREG), R64(RTREG), SHIFT); // dshl <rdreg>,<rtreg>,<shift>
+ UML_DSHL(block, R64(RDREG), R64(RTREG), SHIFT); // dshl <rdreg>,<rtreg>,<shift>
return TRUE;
- case 0x3a: /* DSRL - MIPS III */
+ case 0x3a: /* DSRL - MIPS III */
if (RDREG != 0)
- UML_DSHR(block, R64(RDREG), R64(RTREG), SHIFT); // dshr <rdreg>,<rtreg>,<shift>
+ UML_DSHR(block, R64(RDREG), R64(RTREG), SHIFT); // dshr <rdreg>,<rtreg>,<shift>
return TRUE;
- case 0x3b: /* DSRA - MIPS III */
+ case 0x3b: /* DSRA - MIPS III */
if (RDREG != 0)
- UML_DSAR(block, R64(RDREG), R64(RTREG), SHIFT); // dsar <rdreg>,<rtreg>,<shift>
+ UML_DSAR(block, R64(RDREG), R64(RTREG), SHIFT); // dsar <rdreg>,<rtreg>,<shift>
return TRUE;
- case 0x3c: /* DSLL32 - MIPS III */
+ case 0x3c: /* DSLL32 - MIPS III */
if (RDREG != 0)
- UML_DSHL(block, R64(RDREG), R64(RTREG), SHIFT + 32); // dshl <rdreg>,<rtreg>,<shift>+32
+ UML_DSHL(block, R64(RDREG), R64(RTREG), SHIFT + 32); // dshl <rdreg>,<rtreg>,<shift>+32
return TRUE;
- case 0x3e: /* DSRL32 - MIPS III */
+ case 0x3e: /* DSRL32 - MIPS III */
if (RDREG != 0)
- UML_DSHR(block, R64(RDREG), R64(RTREG), SHIFT + 32); // dshr <rdreg>,<rtreg>,<shift>+32
+ UML_DSHR(block, R64(RDREG), R64(RTREG), SHIFT + 32); // dshr <rdreg>,<rtreg>,<shift>+32
return TRUE;
- case 0x3f: /* DSRA32 - MIPS III */
+ case 0x3f: /* DSRA32 - MIPS III */
if (RDREG != 0)
- UML_DSAR(block, R64(RDREG), R64(RTREG), SHIFT + 32); // dsar <rdreg>,<rtreg>,<shift>+32
+ UML_DSAR(block, R64(RDREG), R64(RTREG), SHIFT + 32); // dsar <rdreg>,<rtreg>,<shift>+32
return TRUE;
- case 0x14: /* DSLLV - MIPS III */
+ case 0x14: /* DSLLV - MIPS III */
if (RDREG != 0)
- UML_DSHL(block, R64(RDREG), R64(RTREG), R64(RSREG)); // dshl <rdreg>,<rtreg>,<rsreg>
+ UML_DSHL(block, R64(RDREG), R64(RTREG), R64(RSREG)); // dshl <rdreg>,<rtreg>,<rsreg>
return TRUE;
- case 0x16: /* DSRLV - MIPS III */
+ case 0x16: /* DSRLV - MIPS III */
if (RDREG != 0)
- UML_DSHR(block, R64(RDREG), R64(RTREG), R64(RSREG)); // dshr <rdreg>,<rtreg>,<rsreg>
+ UML_DSHR(block, R64(RDREG), R64(RTREG), R64(RSREG)); // dshr <rdreg>,<rtreg>,<rsreg>
return TRUE;
- case 0x17: /* DSRAV - MIPS III */
+ case 0x17: /* DSRAV - MIPS III */
if (RDREG != 0)
- UML_DSAR(block, R64(RDREG), R64(RTREG), R64(RSREG)); // dsar <rdreg>,<rtreg>,<rsreg>
+ UML_DSAR(block, R64(RDREG), R64(RTREG), R64(RSREG)); // dsar <rdreg>,<rtreg>,<rsreg>
return TRUE;
/* ----- basic arithmetic ----- */
- case 0x20: /* ADD - MIPS I */
+ case 0x20: /* ADD - MIPS I */
if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
{
- UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
+ UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
UML_EXHc(block, COND_V, *mips3->impstate->exception[EXCEPTION_OVERFLOW], 0);
// exh overflow,0,V
if (RDREG != 0)
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
else if (RDREG != 0)
{
- UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x21: /* ADDU - MIPS I */
+ case 0x21: /* ADDU - MIPS I */
if (RDREG != 0)
{
- UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x2c: /* DADD - MIPS III */
+ case 0x2c: /* DADD - MIPS III */
if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
{
- UML_DADD(block, I0, R64(RSREG), R64(RTREG)); // dadd i0,<rsreg>,<rtreg>
+ UML_DADD(block, I0, R64(RSREG), R64(RTREG)); // dadd i0,<rsreg>,<rtreg>
UML_EXHc(block, COND_V, *mips3->impstate->exception[EXCEPTION_OVERFLOW], 0);
// exh overflow,0,V
if (RDREG != 0)
- UML_DMOV(block, R64(RDREG), I0); // dmov <rdreg>,i0
+ UML_DMOV(block, R64(RDREG), I0); // dmov <rdreg>,i0
}
else if (RDREG != 0)
- UML_DADD(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dadd <rdreg>,<rsreg>,<rtreg>
+ UML_DADD(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dadd <rdreg>,<rsreg>,<rtreg>
return TRUE;
- case 0x2d: /* DADDU - MIPS III */
+ case 0x2d: /* DADDU - MIPS III */
if (RDREG != 0)
- UML_DADD(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dadd <rdreg>,<rsreg>,<rtreg>
+ UML_DADD(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dadd <rdreg>,<rsreg>,<rtreg>
return TRUE;
- case 0x22: /* SUB - MIPS I */
+ case 0x22: /* SUB - MIPS I */
if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
{
- UML_SUB(block, I0, R32(RSREG), R32(RTREG)); // sub i0,<rsreg>,<rtreg>
+ UML_SUB(block, I0, R32(RSREG), R32(RTREG)); // sub i0,<rsreg>,<rtreg>
UML_EXHc(block, COND_V, *mips3->impstate->exception[EXCEPTION_OVERFLOW], 0);
// exh overflow,0,V
if (RDREG != 0)
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
else if (RDREG != 0)
{
- UML_SUB(block, I0, R32(RSREG), R32(RTREG)); // sub i0,<rsreg>,<rtreg>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SUB(block, I0, R32(RSREG), R32(RTREG)); // sub i0,<rsreg>,<rtreg>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x23: /* SUBU - MIPS I */
+ case 0x23: /* SUBU - MIPS I */
if (RDREG != 0)
{
- UML_SUB(block, I0, R32(RSREG), R32(RTREG)); // sub i0,<rsreg>,<rtreg>
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
+ UML_SUB(block, I0, R32(RSREG), R32(RTREG)); // sub i0,<rsreg>,<rtreg>
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext <rdreg>,i0,dword
}
return TRUE;
- case 0x2e: /* DSUB - MIPS III */
+ case 0x2e: /* DSUB - MIPS III */
if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
{
- UML_DSUB(block, I0, R64(RSREG), R64(RTREG)); // dsub i0,<rsreg>,<rtreg>
+ UML_DSUB(block, I0, R64(RSREG), R64(RTREG)); // dsub i0,<rsreg>,<rtreg>
UML_EXHc(block, COND_V, *mips3->impstate->exception[EXCEPTION_OVERFLOW], 0);
// exh overflow,0,V
if (RDREG != 0)
- UML_DMOV(block, R64(RDREG), I0); // dmov <rdreg>,i0
+ UML_DMOV(block, R64(RDREG), I0); // dmov <rdreg>,i0
}
else if (RDREG != 0)
- UML_DSUB(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dsub <rdreg>,<rsreg>,<rtreg>
+ UML_DSUB(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dsub <rdreg>,<rsreg>,<rtreg>
return TRUE;
- case 0x2f: /* DSUBU - MIPS III */
+ case 0x2f: /* DSUBU - MIPS III */
if (RDREG != 0)
- UML_DSUB(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dsub <rdreg>,<rsreg>,<rtreg>
+ UML_DSUB(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dsub <rdreg>,<rsreg>,<rtreg>
return TRUE;
- case 0x18: /* MULT - MIPS I */
- UML_MULS(block, I0, I1, R32(RSREG), R32(RTREG)); // muls i0,i1,<rsreg>,<rtreg>
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ case 0x18: /* MULT - MIPS I */
+ UML_MULS(block, I0, I1, R32(RSREG), R32(RTREG)); // muls i0,i1,<rsreg>,<rtreg>
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
return TRUE;
- case 0x19: /* MULTU - MIPS I */
- UML_MULU(block, I0, I1, R32(RSREG), R32(RTREG)); // mulu i0,i1,<rsreg>,<rtreg>
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ case 0x19: /* MULTU - MIPS I */
+ UML_MULU(block, I0, I1, R32(RSREG), R32(RTREG)); // mulu i0,i1,<rsreg>,<rtreg>
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
return TRUE;
- case 0x1c: /* DMULT - MIPS III */
- UML_DMULS(block, LO64, HI64, R64(RSREG), R64(RTREG)); // dmuls lo,hi,<rsreg>,<rtreg>
+ case 0x1c: /* DMULT - MIPS III */
+ UML_DMULS(block, LO64, HI64, R64(RSREG), R64(RTREG)); // dmuls lo,hi,<rsreg>,<rtreg>
return TRUE;
- case 0x1d: /* DMULTU - MIPS III */
- UML_DMULU(block, LO64, HI64, R64(RSREG), R64(RTREG)); // dmulu lo,hi,<rsreg>,<rtreg>
+ case 0x1d: /* DMULTU - MIPS III */
+ UML_DMULU(block, LO64, HI64, R64(RSREG), R64(RTREG)); // dmulu lo,hi,<rsreg>,<rtreg>
return TRUE;
- case 0x1a: /* DIV - MIPS I */
- UML_DIVS(block, I0, I1, R32(RSREG), R32(RTREG)); // divs i0,i1,<rsreg>,<rtreg>
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ case 0x1a: /* DIV - MIPS I */
+ UML_DIVS(block, I0, I1, R32(RSREG), R32(RTREG)); // divs i0,i1,<rsreg>,<rtreg>
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
return TRUE;
- case 0x1b: /* DIVU - MIPS I */
- UML_DIVU(block, I0, I1, R32(RSREG), R32(RTREG)); // divu i0,i1,<rsreg>,<rtreg>
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ case 0x1b: /* DIVU - MIPS I */
+ UML_DIVU(block, I0, I1, R32(RSREG), R32(RTREG)); // divu i0,i1,<rsreg>,<rtreg>
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
return TRUE;
- case 0x1e: /* DDIV - MIPS III */
- UML_DDIVS(block, LO64, HI64, R64(RSREG), R64(RTREG)); // ddivs lo,hi,<rsreg>,<rtreg>
+ case 0x1e: /* DDIV - MIPS III */
+ UML_DDIVS(block, LO64, HI64, R64(RSREG), R64(RTREG)); // ddivs lo,hi,<rsreg>,<rtreg>
return TRUE;
- case 0x1f: /* DDIVU - MIPS III */
- UML_DDIVU(block, LO64, HI64, R64(RSREG), R64(RTREG)); // ddivu lo,hi,<rsreg>,<rtreg>
+ case 0x1f: /* DDIVU - MIPS III */
+ UML_DDIVU(block, LO64, HI64, R64(RSREG), R64(RTREG)); // ddivu lo,hi,<rsreg>,<rtreg>
return TRUE;
/* ----- basic logical ops ----- */
- case 0x24: /* AND - MIPS I */
+ case 0x24: /* AND - MIPS I */
if (RDREG != 0)
- UML_DAND(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dand <rdreg>,<rsreg>,<rtreg>
+ UML_DAND(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dand <rdreg>,<rsreg>,<rtreg>
return TRUE;
- case 0x25: /* OR - MIPS I */
+ case 0x25: /* OR - MIPS I */
if (RDREG != 0)
- UML_DOR(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dor <rdreg>,<rsreg>,<rtreg>
+ UML_DOR(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dor <rdreg>,<rsreg>,<rtreg>
return TRUE;
- case 0x26: /* XOR - MIPS I */
+ case 0x26: /* XOR - MIPS I */
if (RDREG != 0)
- UML_DXOR(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dxor <rdreg>,<rsreg>,<rtreg>
+ UML_DXOR(block, R64(RDREG), R64(RSREG), R64(RTREG)); // dxor <rdreg>,<rsreg>,<rtreg>
return TRUE;
- case 0x27: /* NOR - MIPS I */
+ case 0x27: /* NOR - MIPS I */
if (RDREG != 0)
{
- UML_DOR(block, I0, R64(RSREG), R64(RTREG)); // dor i0,<rsreg>,<rtreg>
- UML_DXOR(block, R64(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
+ UML_DOR(block, I0, R64(RSREG), R64(RTREG)); // dor i0,<rsreg>,<rtreg>
+ UML_DXOR(block, R64(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
}
return TRUE;
/* ----- basic comparisons ----- */
- case 0x2a: /* SLT - MIPS I */
+ case 0x2a: /* SLT - MIPS I */
if (RDREG != 0)
{
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_DSETc(block, COND_L, R64(RDREG)); // dset <rdreg>,l
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_DSETc(block, COND_L, R64(RDREG)); // dset <rdreg>,l
}
return TRUE;
- case 0x2b: /* SLTU - MIPS I */
+ case 0x2b: /* SLTU - MIPS I */
if (RDREG != 0)
{
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_DSETc(block, COND_B, R64(RDREG)); // dset <rdreg>,b
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_DSETc(block, COND_B, R64(RDREG)); // dset <rdreg>,b
}
return TRUE;
/* ----- conditional traps ----- */
- case 0x30: /* TGE - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ case 0x30: /* TGE - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
UML_EXHc(block, COND_GE, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,GE
return TRUE;
- case 0x31: /* TGEU - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ case 0x31: /* TGEU - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
UML_EXHc(block, COND_AE, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,AE
return TRUE;
- case 0x32: /* TLT - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ case 0x32: /* TLT - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
UML_EXHc(block, COND_L, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,LT
return TRUE;
- case 0x33: /* TLTU - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ case 0x33: /* TLTU - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
UML_EXHc(block, COND_B, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,B
return TRUE;
- case 0x34: /* TEQ - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ case 0x34: /* TEQ - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
UML_EXHc(block, COND_E, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,E
return TRUE;
- case 0x36: /* TNE - MIPS II */
- UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
+ case 0x36: /* TNE - MIPS II */
+ UML_DCMP(block, R64(RSREG), R64(RTREG)); // dcmp <rsreg>,<rtreg>
UML_EXHc(block, COND_NE, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,NE
return TRUE;
/* ----- conditional moves ----- */
- case 0x0a: /* MOVZ - MIPS IV */
+ case 0x0a: /* MOVZ - MIPS IV */
if (RDREG != 0)
{
- UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
- UML_DMOVc(block, COND_Z, R64(RDREG), R64(RSREG)); // dmov <rdreg>,<rsreg>,Z
+ UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
+ UML_DMOVc(block, COND_Z, R64(RDREG), R64(RSREG)); // dmov <rdreg>,<rsreg>,Z
}
return TRUE;
- case 0x0b: /* MOVN - MIPS IV */
+ case 0x0b: /* MOVN - MIPS IV */
if (RDREG != 0)
{
- UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
- UML_DMOVc(block, COND_NZ, R64(RDREG), R64(RSREG)); // dmov <rdreg>,<rsreg>,NZ
+ UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
+ UML_DMOVc(block, COND_NZ, R64(RDREG), R64(RSREG)); // dmov <rdreg>,<rsreg>,NZ
}
return TRUE;
- case 0x01: /* MOVF/MOVT - MIPS IV */
+ case 0x01: /* MOVF/MOVT - MIPS IV */
if (RDREG != 0)
{
- UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr31,fcc_mask[x]
+ UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr31,fcc_mask[x]
UML_DMOVc(block, ((op >> 16) & 1) ? COND_NZ : COND_Z, R64(RDREG), R64(RSREG));
// dmov <rdreg>,<rsreg>,NZ/Z
}
@@ -2618,50 +2618,50 @@ static int generate_special(mips3_state *mips3, drcuml_block *block, compiler_st
/* ----- jumps and branches ----- */
- case 0x08: /* JR - MIPS I */
- generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
+ case 0x08: /* JR - MIPS I */
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, 0); // <next instruction + hashjmp>
return TRUE;
- case 0x09: /* JALR - MIPS I */
- generate_delay_slot_and_branch(mips3, block, compiler, desc, RDREG); // <next instruction + hashjmp>
+ case 0x09: /* JALR - MIPS I */
+ generate_delay_slot_and_branch(mips3, block, compiler, desc, RDREG); // <next instruction + hashjmp>
return TRUE;
/* ----- system calls ----- */
- case 0x0c: /* SYSCALL - MIPS I */
- UML_EXH(block, *mips3->impstate->exception[EXCEPTION_SYSCALL], 0); // exh syscall,0
+ case 0x0c: /* SYSCALL - MIPS I */
+ UML_EXH(block, *mips3->impstate->exception[EXCEPTION_SYSCALL], 0); // exh syscall,0
return TRUE;
- case 0x0d: /* BREAK - MIPS I */
- UML_EXH(block, *mips3->impstate->exception[EXCEPTION_BREAK], 0); // exh break,0
+ case 0x0d: /* BREAK - MIPS I */
+ UML_EXH(block, *mips3->impstate->exception[EXCEPTION_BREAK], 0); // exh break,0
return TRUE;
/* ----- effective no-ops ----- */
- case 0x0f: /* SYNC - MIPS II */
+ case 0x0f: /* SYNC - MIPS II */
return TRUE;
/* ----- hi/lo register access ----- */
- case 0x10: /* MFHI - MIPS I */
+ case 0x10: /* MFHI - MIPS I */
if (RDREG != 0)
- UML_DMOV(block, R64(RDREG), HI64); // dmov <rdreg>,hi
+ UML_DMOV(block, R64(RDREG), HI64); // dmov <rdreg>,hi
return TRUE;
- case 0x11: /* MTHI - MIPS I */
- UML_DMOV(block, HI64, R64(RSREG)); // dmov hi,<rsreg>
+ case 0x11: /* MTHI - MIPS I */
+ UML_DMOV(block, HI64, R64(RSREG)); // dmov hi,<rsreg>
return TRUE;
- case 0x12: /* MFLO - MIPS I */
+ case 0x12: /* MFLO - MIPS I */
if (RDREG != 0)
- UML_DMOV(block, R64(RDREG), LO64); // dmov <rdreg>,lo
+ UML_DMOV(block, R64(RDREG), LO64); // dmov <rdreg>,lo
return TRUE;
- case 0x13: /* MTLO - MIPS I */
- UML_DMOV(block, LO64, R64(RSREG)); // dmov lo,<rsreg>
+ case 0x13: /* MTLO - MIPS I */
+ UML_DMOV(block, LO64, R64(RSREG)); // dmov lo,<rsreg>
return TRUE;
}
return FALSE;
@@ -2681,64 +2681,64 @@ static int generate_regimm(mips3_state *mips3, drcuml_block *block, compiler_sta
switch (opswitch)
{
- case 0x00: /* BLTZ */
- case 0x02: /* BLTZL */
- case 0x10: /* BLTZAL */
- case 0x12: /* BLTZALL */
+ case 0x00: /* BLTZ */
+ case 0x02: /* BLTZL */
+ case 0x10: /* BLTZAL */
+ case 0x12: /* BLTZALL */
if (RSREG != 0)
{
- UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
+ UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
generate_delay_slot_and_branch(mips3, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
// <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
return TRUE;
- case 0x01: /* BGEZ */
- case 0x03: /* BGEZL */
- case 0x11: /* BGEZAL */
- case 0x13: /* BGEZALL */
+ case 0x01: /* BGEZ */
+ case 0x03: /* BGEZL */
+ case 0x11: /* BGEZAL */
+ case 0x13: /* BGEZALL */
if (RSREG != 0)
{
- UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
+ UML_DCMP(block, R64(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
generate_delay_slot_and_branch(mips3, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
// <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
else
generate_delay_slot_and_branch(mips3, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
// <next instruction + hashjmp>
return TRUE;
- case 0x08: /* TGEI */
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ case 0x08: /* TGEI */
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
UML_EXHc(block, COND_GE, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,GE
return TRUE;
- case 0x09: /* TGEIU */
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ case 0x09: /* TGEIU */
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
UML_EXHc(block, COND_AE, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,AE
return TRUE;
- case 0x0a: /* TLTI */
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ case 0x0a: /* TLTI */
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
UML_EXHc(block, COND_L, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,L
return TRUE;
- case 0x0b: /* TLTIU */
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ case 0x0b: /* TLTIU */
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
UML_EXHc(block, COND_B, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,B
return TRUE;
- case 0x0c: /* TEQI */
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ case 0x0c: /* TEQI */
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
UML_EXHc(block, COND_E, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,E
return TRUE;
- case 0x0e: /* TNEI */
- UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ case 0x0e: /* TNEI */
+ UML_DCMP(block, R64(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
UML_EXHc(block, COND_NE, *mips3->impstate->exception[EXCEPTION_TRAP], 0);// exh trap,0,NE
return TRUE;
}
@@ -2765,30 +2765,30 @@ static int generate_idt(mips3_state *mips3, drcuml_block *block, compiler_state
case 0: /* MAD */
if (RSREG != 0 && RTREG != 0)
{
- UML_MULS(block, I0, I1, R32(RSREG), R32(RTREG)); // muls i0,i1,rsreg,rtreg
- UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
- UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ UML_MULS(block, I0, I1, R32(RSREG), R32(RTREG)); // muls i0,i1,rsreg,rtreg
+ UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
+ UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
}
return TRUE;
case 1: /* MADU */
if (RSREG != 0 && RTREG != 0)
{
- UML_MULU(block, I0, I1, R32(RSREG), R32(RTREG)); // mulu i0,i1,rsreg,rtreg
- UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
- UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
- UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
- UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
+ UML_MULU(block, I0, I1, R32(RSREG), R32(RTREG)); // mulu i0,i1,rsreg,rtreg
+ UML_ADD(block, I0, I0, LO32); // add i0,i0,lo
+ UML_ADDC(block, I1, I1, HI32); // addc i1,i1,hi
+ UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword
+ UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword
}
return TRUE;
case 2: /* MUL */
if (RDREG != 0)
{
- UML_MULS(block, I0, I0, R32(RSREG), R32(RTREG)); // muls i0,i0,rsreg,rtreg
- UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext rdreg,i0,dword
+ UML_MULS(block, I0, I0, R32(RSREG), R32(RTREG)); // muls i0,i0,rsreg,rtreg
+ UML_DSEXT(block, R64(RDREG), I0, SIZE_DWORD); // dsext rdreg,i0,dword
}
return TRUE;
}
@@ -2809,62 +2809,62 @@ static int generate_set_cop0_reg(mips3_state *mips3, drcuml_block *block, compil
switch (reg)
{
case COP0_Cause:
- UML_ROLINS(block, CPR032(COP0_Cause), I0, 0, ~0xfc00); // rolins [Cause],i0,0,~0xfc00
+ UML_ROLINS(block, CPR032(COP0_Cause), I0, 0, ~0xfc00); // rolins [Cause],i0,0,~0xfc00
compiler->checksoftints = TRUE;
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
case COP0_Status:
- generate_update_cycles(mips3, block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
- UML_MOV(block, I1, CPR032(COP0_Status)); // mov i1,[Status]
- UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
- generate_update_mode(mips3, block); // <update mode>
- UML_XOR(block, I0, I0, I1); // xor i0,i0,i1
- UML_TEST(block, I0, 0x8000); // test i0,0x8000
- UML_CALLCc(block, COND_NZ, (c_function)mips3com_update_cycle_counting, mips3); // callc mips3com_update_cycle_counting,mips.core,NZ
+ generate_update_cycles(mips3, block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
+ UML_MOV(block, I1, CPR032(COP0_Status)); // mov i1,[Status]
+ UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
+ generate_update_mode(mips3, block); // <update mode>
+ UML_XOR(block, I0, I0, I1); // xor i0,i0,i1
+ UML_TEST(block, I0, 0x8000); // test i0,0x8000
+ UML_CALLCc(block, COND_NZ, (c_function)mips3com_update_cycle_counting, mips3); // callc mips3com_update_cycle_counting,mips.core,NZ
compiler->checkints = TRUE;
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
case COP0_Count:
- generate_update_cycles(mips3, block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
- UML_MOV(block, CPR032(COP0_Count), I0); // mov [Count],i0
- UML_CALLC(block, cfunc_get_cycles, mips3); // callc cfunc_get_cycles,mips3
- UML_DAND(block, I0, I0, 0xffffffff); // and i0,i0,0xffffffff
- UML_DADD(block, I0, I0, I0); // dadd i0,i0,i0
+ generate_update_cycles(mips3, block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
+ UML_MOV(block, CPR032(COP0_Count), I0); // mov [Count],i0
+ UML_CALLC(block, cfunc_get_cycles, mips3); // callc cfunc_get_cycles,mips3
+ UML_DAND(block, I0, I0, 0xffffffff); // and i0,i0,0xffffffff
+ UML_DADD(block, I0, I0, I0); // dadd i0,i0,i0
UML_DSUB(block, mem(&mips3->count_zero_time), mem(&mips3->impstate->numcycles), I0);
// dsub [count_zero_time],[mips3->impstate->numcycles],i0
- UML_CALLC(block, (c_function)mips3com_update_cycle_counting, mips3); // callc mips3com_update_cycle_counting,mips.core
+ UML_CALLC(block, (c_function)mips3com_update_cycle_counting, mips3); // callc mips3com_update_cycle_counting,mips.core
return TRUE;
case COP0_Compare:
- UML_MOV(block, mem(&mips3->compare_armed), 1); // mov [compare_armed],1
- generate_update_cycles(mips3, block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
- UML_MOV(block, CPR032(COP0_Compare), I0); // mov [Compare],i0
- UML_AND(block, CPR032(COP0_Cause), CPR032(COP0_Cause), ~0x8000); // and [Cause],[Cause],~0x8000
- UML_CALLC(block, (c_function)mips3com_update_cycle_counting, mips3); // callc mips3com_update_cycle_counting,mips.core
+ UML_MOV(block, mem(&mips3->compare_armed), 1); // mov [compare_armed],1
+ generate_update_cycles(mips3, block, compiler, desc->pc, !in_delay_slot); // <subtract cycles>
+ UML_MOV(block, CPR032(COP0_Compare), I0); // mov [Compare],i0
+ UML_AND(block, CPR032(COP0_Cause), CPR032(COP0_Cause), ~0x8000); // and [Cause],[Cause],~0x8000
+ UML_CALLC(block, (c_function)mips3com_update_cycle_counting, mips3); // callc mips3com_update_cycle_counting,mips.core
return TRUE;
case COP0_PRId:
return TRUE;
case COP0_Config:
- UML_ROLINS(block, CPR032(COP0_Config), I0, 0, 0x0007); // rolins [Config],i0,0,0x0007
+ UML_ROLINS(block, CPR032(COP0_Config), I0, 0, 0x0007); // rolins [Config],i0,0,0x0007
return TRUE;
case COP0_EntryHi:
- UML_XOR(block, I1, I0, CPR032(reg)); // xor i1,i0,cpr0[reg]
- UML_MOV(block, CPR032(reg), I0); // mov cpr0[reg],i0
- UML_TEST(block, I1, 0xff); // test i1,0xff
- UML_JMPc(block, COND_Z, link = compiler->labelnum++); // jmp link,z
- UML_CALLC(block, (c_function)mips3com_asid_changed, mips3); // callc mips3com_asid_changed
- UML_LABEL(block, link); // link:
+ UML_XOR(block, I1, I0, CPR032(reg)); // xor i1,i0,cpr0[reg]
+ UML_MOV(block, CPR032(reg), I0); // mov cpr0[reg],i0
+ UML_TEST(block, I1, 0xff); // test i1,0xff
+ UML_JMPc(block, COND_Z, link = compiler->labelnum++); // jmp link,z
+ UML_CALLC(block, (c_function)mips3com_asid_changed, mips3); // callc mips3com_asid_changed
+ UML_LABEL(block, link); // link:
return TRUE;
default:
- UML_MOV(block, CPR032(reg), I0); // mov cpr0[reg],i0
+ UML_MOV(block, CPR032(reg), I0); // mov cpr0[reg],i0
return TRUE;
}
}
@@ -2882,34 +2882,34 @@ static int generate_get_cop0_reg(mips3_state *mips3, drcuml_block *block, compil
switch (reg)
{
case COP0_Count:
- generate_update_cycles(mips3, block, compiler, desc->pc, FALSE); // <subtract cycles>
- UML_CALLC(block, cfunc_get_cycles, mips3); // callc cfunc_get_cycles,mips3
+ generate_update_cycles(mips3, block, compiler, desc->pc, FALSE); // <subtract cycles>
+ UML_CALLC(block, cfunc_get_cycles, mips3); // callc cfunc_get_cycles,mips3
UML_DSUB(block, I0, mem(&mips3->impstate->numcycles), mem(&mips3->count_zero_time));
// dsub i0,[numcycles],[count_zero_time]
- UML_DSHR(block, I0, I0, 1); // dshr i0,i0,1
- UML_DSEXT(block, I0, I0, SIZE_DWORD); // dsext i0,i0,dword
+ UML_DSHR(block, I0, I0, 1); // dshr i0,i0,1
+ UML_DSEXT(block, I0, I0, SIZE_DWORD); // dsext i0,i0,dword
return TRUE;
case COP0_Random:
- generate_update_cycles(mips3, block, compiler, desc->pc, FALSE); // <subtract cycles>
- UML_CALLC(block, cfunc_get_cycles, mips3); // callc cfunc_get_cycles,mips3
+ generate_update_cycles(mips3, block, compiler, desc->pc, FALSE); // <subtract cycles>
+ UML_CALLC(block, cfunc_get_cycles, mips3); // callc cfunc_get_cycles,mips3
UML_DSUB(block, I0, mem(&mips3->impstate->numcycles), mem(&mips3->count_zero_time));
// dsub i0,[numcycles],[count_zero_time]
- UML_AND(block, I1, CPR032(COP0_Wired), 0x3f); // and i1,[Wired],0x3f
- UML_SUB(block, I2, 48, I1); // sub i2,48,i1
- UML_JMPc(block, COND_BE, link1 = compiler->labelnum++); // jmp link1,BE
- UML_DAND(block, I2, I2, 0xffffffff); // dand i2,i2,0xffffffff
- UML_DDIVU(block, I0, I2, I0, I2); // ddivu i0,i2,i0,i2
- UML_ADD(block, I0, I2, I1); // add i0,i2,i1
- UML_DAND(block, I0, I0, 0x3f); // dand i0,i0,0x3f
- UML_JMP(block, link2 = compiler->labelnum++); // jmp link2
- UML_LABEL(block, link1); // link1:
- UML_DMOV(block, I0, 47); // dmov i0,47
- UML_LABEL(block, link2); // link2:
+ UML_AND(block, I1, CPR032(COP0_Wired), 0x3f); // and i1,[Wired],0x3f
+ UML_SUB(block, I2, 48, I1); // sub i2,48,i1
+ UML_JMPc(block, COND_BE, link1 = compiler->labelnum++); // jmp link1,BE
+ UML_DAND(block, I2, I2, 0xffffffff); // dand i2,i2,0xffffffff
+ UML_DDIVU(block, I0, I2, I0, I2); // ddivu i0,i2,i0,i2
+ UML_ADD(block, I0, I2, I1); // add i0,i2,i1
+ UML_DAND(block, I0, I0, 0x3f); // dand i0,i0,0x3f
+ UML_JMP(block, link2 = compiler->labelnum++); // jmp link2
+ UML_LABEL(block, link1); // link1:
+ UML_DMOV(block, I0, 47); // dmov i0,47
+ UML_LABEL(block, link2); // link2:
return TRUE;
default:
- UML_DSEXT(block, I0, CPR032(reg), SIZE_DWORD); // dsext i0,cpr0[reg],dword
+ UML_DSEXT(block, I0, CPR032(reg), SIZE_DWORD); // dsext i0,cpr0[reg],dword
return TRUE;
}
}
@@ -2928,45 +2928,45 @@ static int generate_cop0(mips3_state *mips3, drcuml_block *block, compiler_state
/* generate an exception if COP0 is disabled unless we are in kernel mode */
if ((mips3->impstate->mode >> 1) != MODE_KERNEL)
{
- UML_TEST(block, CPR032(COP0_Status), SR_COP0); // test [Status],SR_COP0
+ UML_TEST(block, CPR032(COP0_Status), SR_COP0); // test [Status],SR_COP0
UML_EXHc(block, COND_Z, *mips3->impstate->exception[EXCEPTION_BADCOP], 0);// exh cop,0,Z
}
switch (opswitch)
{
- case 0x00: /* MFCz */
+ case 0x00: /* MFCz */
if (RTREG != 0)
{
- generate_get_cop0_reg(mips3, block, compiler, desc, RDREG); // <get cop0 reg>
- UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
+ generate_get_cop0_reg(mips3, block, compiler, desc, RDREG); // <get cop0 reg>
+ UML_DSEXT(block, R64(RTREG), I0, SIZE_DWORD); // dsext <rtreg>,i0,dword
}
return TRUE;
- case 0x01: /* DMFCz */
+ case 0x01: /* DMFCz */
if (RTREG != 0)
{
- generate_get_cop0_reg(mips3, block, compiler, desc, RDREG); // <get cop0 reg>
- UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
+ generate_get_cop0_reg(mips3, block, compiler, desc, RDREG); // <get cop0 reg>
+ UML_DMOV(block, R64(RTREG), I0); // dmov <rtreg>,i0
}
return TRUE;
- case 0x02: /* CFCz */
+ case 0x02: /* CFCz */
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), CCR032(RDREG), SIZE_DWORD); // dsext <rtreg>,ccr0[rdreg],dword
+ UML_DSEXT(block, R64(RTREG), CCR032(RDREG), SIZE_DWORD); // dsext <rtreg>,ccr0[rdreg],dword
return TRUE;
- case 0x04: /* MTCz */
- UML_DSEXT(block, I0, R32(RTREG), SIZE_DWORD); // dsext i0,<rtreg>,dword
- generate_set_cop0_reg(mips3, block, compiler, desc, RDREG); // <set cop0 reg>
+ case 0x04: /* MTCz */
+ UML_DSEXT(block, I0, R32(RTREG), SIZE_DWORD); // dsext i0,<rtreg>,dword
+ generate_set_cop0_reg(mips3, block, compiler, desc, RDREG); // <set cop0 reg>
return TRUE;
- case 0x05: /* DMTCz */
- UML_DMOV(block, I0, R64(RTREG)); // dmov i0,<rtreg>
- generate_set_cop0_reg(mips3, block, compiler, desc, RDREG); // <set cop0 reg>
+ case 0x05: /* DMTCz */
+ UML_DMOV(block, I0, R64(RTREG)); // dmov i0,<rtreg>
+ generate_set_cop0_reg(mips3, block, compiler, desc, RDREG); // <set cop0 reg>
return TRUE;
- case 0x06: /* CTCz */
- UML_DSEXT(block, CCR064(RDREG), R32(RTREG), SIZE_DWORD); // dsext ccr0[rdreg],<rtreg>,dword
+ case 0x06: /* CTCz */
+ UML_DSEXT(block, CCR064(RDREG), R32(RTREG), SIZE_DWORD); // dsext ccr0[rdreg],<rtreg>,dword
return TRUE;
case 0x10:
@@ -2984,40 +2984,40 @@ static int generate_cop0(mips3_state *mips3, drcuml_block *block, compiler_state
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */
+ case 0x1f: /* COP */
switch (op & 0x01ffffff)
{
- case 0x01: /* TLBR */
- UML_CALLC(block, (c_function)mips3com_tlbr, mips3); // callc mips3com_tlbr,mips3
+ case 0x01: /* TLBR */
+ UML_CALLC(block, (c_function)mips3com_tlbr, mips3); // callc mips3com_tlbr,mips3
return TRUE;
- case 0x02: /* TLBWI */
- UML_CALLC(block, (c_function)mips3com_tlbwi, mips3); // callc mips3com_tlbwi,mips3
+ case 0x02: /* TLBWI */
+ UML_CALLC(block, (c_function)mips3com_tlbwi, mips3); // callc mips3com_tlbwi,mips3
return TRUE;
- case 0x06: /* TLBWR */
- UML_CALLC(block, (c_function)mips3com_tlbwr, mips3); // callc mips3com_tlbwr,mips3
+ case 0x06: /* TLBWR */
+ UML_CALLC(block, (c_function)mips3com_tlbwr, mips3); // callc mips3com_tlbwr,mips3
return TRUE;
- case 0x08: /* TLBP */
- UML_CALLC(block, (c_function)mips3com_tlbp, mips3); // callc mips3com_tlbp,mips3
+ case 0x08: /* TLBP */
+ UML_CALLC(block, (c_function)mips3com_tlbp, mips3); // callc mips3com_tlbp,mips3
return TRUE;
- case 0x18: /* ERET */
- UML_MOV(block, mem(&mips3->llbit), 0); // mov [llbit],0
- UML_MOV(block, I0, CPR032(COP0_Status)); // mov i0,[Status]
- UML_TEST(block, I0, SR_ERL); // test i0,SR_ERL
- UML_JMPc(block, COND_NZ, skip = compiler->labelnum++); // jmp skip,nz
- UML_AND(block, I0, I0, ~SR_EXL); // and i0,i0,~SR_EXL
- UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
+ case 0x18: /* ERET */
+ UML_MOV(block, mem(&mips3->llbit), 0); // mov [llbit],0
+ UML_MOV(block, I0, CPR032(COP0_Status)); // mov i0,[Status]
+ UML_TEST(block, I0, SR_ERL); // test i0,SR_ERL
+ UML_JMPc(block, COND_NZ, skip = compiler->labelnum++); // jmp skip,nz
+ UML_AND(block, I0, I0, ~SR_EXL); // and i0,i0,~SR_EXL
+ UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
generate_update_mode(mips3, block);
compiler->checkints = TRUE;
generate_update_cycles(mips3, block, compiler, CPR032(COP0_EPC), TRUE);// <subtract cycles>
UML_HASHJMP(block, mem(&mips3->impstate->mode), CPR032(COP0_EPC), *mips3->impstate->nocode);
// hashjmp <mode>,[EPC],nocode
- UML_LABEL(block, skip); // skip:
- UML_AND(block, I0, I0, ~SR_ERL); // and i0,i0,~SR_ERL
- UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
+ UML_LABEL(block, skip); // skip:
+ UML_AND(block, I0, I0, ~SR_ERL); // and i0,i0,~SR_ERL
+ UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
generate_update_mode(mips3, block);
compiler->checkints = TRUE;
generate_update_cycles(mips3, block, compiler, CPR032(COP0_ErrorPC), TRUE);
@@ -3026,7 +3026,7 @@ static int generate_cop0(mips3_state *mips3, drcuml_block *block, compiler_state
// hashjmp <mode>,[EPC],nocode
return TRUE;
- case 0x20: /* WAIT */
+ case 0x20: /* WAIT */
return TRUE;
}
break;
@@ -3054,68 +3054,68 @@ static int generate_cop1(mips3_state *mips3, drcuml_block *block, compiler_state
/* generate an exception if COP1 is disabled */
if (mips3->impstate->drcoptions & MIPS3DRC_STRICT_COP1)
{
- UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1
+ UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1
UML_EXHc(block, COND_Z, *mips3->impstate->exception[EXCEPTION_BADCOP], 1);// exh cop,1,Z
}
switch (RSREG)
{
- case 0x00: /* MFCz - MIPS I */
+ case 0x00: /* MFCz - MIPS I */
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), FPR32(RDREG), SIZE_DWORD); // dsext <rtreg>,fpr[rdreg],dword
+ UML_DSEXT(block, R64(RTREG), FPR32(RDREG), SIZE_DWORD); // dsext <rtreg>,fpr[rdreg],dword
return TRUE;
- case 0x01: /* DMFCz - MIPS III */
+ case 0x01: /* DMFCz - MIPS III */
if (RTREG != 0)
- UML_DMOV(block, R64(RTREG), FPR64(RDREG)); // dmov <rtreg>,fpr[rdreg]
+ UML_DMOV(block, R64(RTREG), FPR64(RDREG)); // dmov <rtreg>,fpr[rdreg]
return TRUE;
- case 0x02: /* CFCz - MIPS I */
+ case 0x02: /* CFCz - MIPS I */
if (RTREG != 0)
- UML_DSEXT(block, R64(RTREG), CCR132(RDREG), SIZE_DWORD); // dsext <rtreg>,ccr132[rdreg],dword
+ UML_DSEXT(block, R64(RTREG), CCR132(RDREG), SIZE_DWORD); // dsext <rtreg>,ccr132[rdreg],dword
return TRUE;
- case 0x04: /* MTCz - MIPS I */
- UML_MOV(block, FPR32(RDREG), R32(RTREG)); // mov fpr[rdreg],<rtreg>
+ case 0x04: /* MTCz - MIPS I */
+ UML_MOV(block, FPR32(RDREG), R32(RTREG)); // mov fpr[rdreg],<rtreg>
return TRUE;
- case 0x05: /* DMTCz - MIPS III */
- UML_DMOV(block, FPR64(RDREG), R64(RTREG)); // dmov fpr[rdreg],<rtreg>
+ case 0x05: /* DMTCz - MIPS III */
+ UML_DMOV(block, FPR64(RDREG), R64(RTREG)); // dmov fpr[rdreg],<rtreg>
return TRUE;
- case 0x06: /* CTCz - MIPS I */
+ case 0x06: /* CTCz - MIPS I */
if (RDREG != 31)
- UML_DSEXT(block, CCR164(RDREG), R32(RTREG), SIZE_DWORD); // dsext ccr1[rdreg],<rtreg>,dword
+ UML_DSEXT(block, CCR164(RDREG), R32(RTREG), SIZE_DWORD); // dsext ccr1[rdreg],<rtreg>,dword
else
{
- UML_XOR(block, I0, CCR132(31), R32(RTREG)); // xor i0,ccr1[31],<rtreg>
- UML_DSEXT(block, CCR164(31), R32(RTREG), SIZE_DWORD); // dsext ccr1[31],<rtreg>,dword
- UML_TEST(block, I0, 3); // test i0,3
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
- UML_AND(block, I0, CCR132(31), 3); // and i0,ccr1[31],3
+ UML_XOR(block, I0, CCR132(31), R32(RTREG)); // xor i0,ccr1[31],<rtreg>
+ UML_DSEXT(block, CCR164(31), R32(RTREG), SIZE_DWORD); // dsext ccr1[31],<rtreg>,dword
+ UML_TEST(block, I0, 3); // test i0,3
+ UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ UML_AND(block, I0, CCR132(31), 3); // and i0,ccr1[31],3
UML_LOAD(block, I0, &mips3->impstate->fpmode[0], I0, SIZE_BYTE, SCALE_x1);// load i0,fpmode,i0,byte
- UML_SETFMOD(block, I0); // setfmod i0
- UML_LABEL(block, skip); // skip:
+ UML_SETFMOD(block, I0); // setfmod i0
+ UML_LABEL(block, skip); // skip:
}
return TRUE;
- case 0x08: /* BC */
+ case 0x08: /* BC */
switch ((op >> 16) & 3)
{
- case 0x00: /* BCzF - MIPS I */
- case 0x02: /* BCzFL - MIPS II */
- UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr1[31],fccmask[which]
- UML_JMPc(block, COND_NZ, skip = compiler->labelnum++); // jmp skip,NZ
+ case 0x00: /* BCzF - MIPS I */
+ case 0x02: /* BCzFL - MIPS II */
+ UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr1[31],fccmask[which]
+ UML_JMPc(block, COND_NZ, skip = compiler->labelnum++); // jmp skip,NZ
generate_delay_slot_and_branch(mips3, block, compiler, desc, 0);// <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
return TRUE;
- case 0x01: /* BCzT - MIPS I */
- case 0x03: /* BCzTL - MIPS II */
- UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr1[31],fccmask[which]
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ case 0x01: /* BCzT - MIPS I */
+ case 0x03: /* BCzTL - MIPS II */
+ UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr1[31],fccmask[which]
+ UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
generate_delay_slot_and_branch(mips3, block, compiler, desc, 0);// <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
return TRUE;
}
break;
@@ -3124,284 +3124,284 @@ static int generate_cop1(mips3_state *mips3, drcuml_block *block, compiler_state
switch (op & 0x3f)
{
case 0x00:
- if (IS_SINGLE(op)) /* ADD.S - MIPS I */
- UML_FSADD(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fsadd <fdreg>,<fsreg>,<ftreg>
- else /* ADD.D - MIPS I */
- UML_FDADD(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fdadd <fdreg>,<fsreg>,<ftreg>
+ if (IS_SINGLE(op)) /* ADD.S - MIPS I */
+ UML_FSADD(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fsadd <fdreg>,<fsreg>,<ftreg>
+ else /* ADD.D - MIPS I */
+ UML_FDADD(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fdadd <fdreg>,<fsreg>,<ftreg>
return TRUE;
case 0x01:
- if (IS_SINGLE(op)) /* SUB.S - MIPS I */
- UML_FSSUB(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fssub <fdreg>,<fsreg>,<ftreg>
- else /* SUB.D - MIPS I */
- UML_FDSUB(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fdsub <fdreg>,<fsreg>,<ftreg>
+ if (IS_SINGLE(op)) /* SUB.S - MIPS I */
+ UML_FSSUB(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fssub <fdreg>,<fsreg>,<ftreg>
+ else /* SUB.D - MIPS I */
+ UML_FDSUB(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fdsub <fdreg>,<fsreg>,<ftreg>
return TRUE;
case 0x02:
- if (IS_SINGLE(op)) /* MUL.S - MIPS I */
- UML_FSMUL(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fsmul <fdreg>,<fsreg>,<ftreg>
- else /* MUL.D - MIPS I */
- UML_FDMUL(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fdmul <fdreg>,<fsreg>,<ftreg>
+ if (IS_SINGLE(op)) /* MUL.S - MIPS I */
+ UML_FSMUL(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fsmul <fdreg>,<fsreg>,<ftreg>
+ else /* MUL.D - MIPS I */
+ UML_FDMUL(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fdmul <fdreg>,<fsreg>,<ftreg>
return TRUE;
case 0x03:
- if (IS_SINGLE(op)) /* DIV.S - MIPS I */
- UML_FSDIV(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fsdiv <fdreg>,<fsreg>,<ftreg>
- else /* DIV.D - MIPS I */
- UML_FDDIV(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fddiv <fdreg>,<fsreg>,<ftreg>
+ if (IS_SINGLE(op)) /* DIV.S - MIPS I */
+ UML_FSDIV(block, FPR32(FDREG), FPR32(FSREG), FPR32(FTREG)); // fsdiv <fdreg>,<fsreg>,<ftreg>
+ else /* DIV.D - MIPS I */
+ UML_FDDIV(block, FPR64(FDREG), FPR64(FSREG), FPR64(FTREG)); // fddiv <fdreg>,<fsreg>,<ftreg>
return TRUE;
case 0x04:
- if (IS_SINGLE(op)) /* SQRT.S - MIPS II */
- UML_FSSQRT(block, FPR32(FDREG), FPR32(FSREG)); // fssqrt <fdreg>,<fsreg>
- else /* SQRT.D - MIPS II */
- UML_FDSQRT(block, FPR64(FDREG), FPR64(FSREG)); // fdsqrt <fdreg>,<fsreg>
+ if (IS_SINGLE(op)) /* SQRT.S - MIPS II */
+ UML_FSSQRT(block, FPR32(FDREG), FPR32(FSREG)); // fssqrt <fdreg>,<fsreg>
+ else /* SQRT.D - MIPS II */
+ UML_FDSQRT(block, FPR64(FDREG), FPR64(FSREG)); // fdsqrt <fdreg>,<fsreg>
return TRUE;
case 0x05:
- if (IS_SINGLE(op)) /* ABS.S - MIPS I */
- UML_FSABS(block, FPR32(FDREG), FPR32(FSREG)); // fsabs <fdreg>,<fsreg>
- else /* ABS.D - MIPS I */
- UML_FDABS(block, FPR64(FDREG), FPR64(FSREG)); // fdabs <fdreg>,<fsreg>
+ if (IS_SINGLE(op)) /* ABS.S - MIPS I */
+ UML_FSABS(block, FPR32(FDREG), FPR32(FSREG)); // fsabs <fdreg>,<fsreg>
+ else /* ABS.D - MIPS I */
+ UML_FDABS(block, FPR64(FDREG), FPR64(FSREG)); // fdabs <fdreg>,<fsreg>
return TRUE;
case 0x06:
- if (IS_SINGLE(op)) /* MOV.S - MIPS I */
- UML_FSMOV(block, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>
- else /* MOV.D - MIPS I */
- UML_FDMOV(block, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>
+ if (IS_SINGLE(op)) /* MOV.S - MIPS I */
+ UML_FSMOV(block, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>
+ else /* MOV.D - MIPS I */
+ UML_FDMOV(block, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>
return TRUE;
case 0x07:
- if (IS_SINGLE(op)) /* NEG.S - MIPS I */
- UML_FSNEG(block, FPR32(FDREG), FPR32(FSREG)); // fsneg <fdreg>,<fsreg>
- else /* NEG.D - MIPS I */
- UML_FDNEG(block, FPR64(FDREG), FPR64(FSREG)); // fdneg <fdreg>,<fsreg>
+ if (IS_SINGLE(op)) /* NEG.S - MIPS I */
+ UML_FSNEG(block, FPR32(FDREG), FPR32(FSREG)); // fsneg <fdreg>,<fsreg>
+ else /* NEG.D - MIPS I */
+ UML_FDNEG(block, FPR64(FDREG), FPR64(FSREG)); // fdneg <fdreg>,<fsreg>
return TRUE;
case 0x08:
- if (IS_SINGLE(op)) /* ROUND.L.S - MIPS III */
+ if (IS_SINGLE(op)) /* ROUND.L.S - MIPS III */
UML_FSTOINT(block, FPR64(FDREG), FPR32(FSREG), SIZE_QWORD, ROUND_ROUND);// fstoint <fdreg>,<fsreg>,qword,round
- else /* ROUND.L.D - MIPS III */
+ else /* ROUND.L.D - MIPS III */
UML_FDTOINT(block, FPR64(FDREG), FPR64(FSREG), SIZE_QWORD, ROUND_ROUND);// fdtoint <fdreg>,<fsreg>,qword,round
return TRUE;
case 0x09:
- if (IS_SINGLE(op)) /* TRUNC.L.S - MIPS III */
+ if (IS_SINGLE(op)) /* TRUNC.L.S - MIPS III */
UML_FSTOINT(block, FPR64(FDREG), FPR32(FSREG), SIZE_QWORD, ROUND_TRUNC);// fstoint <fdreg>,<fsreg>,qword,trunc
- else /* TRUNC.L.D - MIPS III */
+ else /* TRUNC.L.D - MIPS III */
UML_FDTOINT(block, FPR64(FDREG), FPR64(FSREG), SIZE_QWORD, ROUND_TRUNC);// fdtoint <fdreg>,<fsreg>,qword,trunc
return TRUE;
case 0x0a:
- if (IS_SINGLE(op)) /* CEIL.L.S - MIPS III */
+ if (IS_SINGLE(op)) /* CEIL.L.S - MIPS III */
UML_FSTOINT(block, FPR64(FDREG), FPR32(FSREG), SIZE_QWORD, ROUND_CEIL);// fstoint <fdreg>,<fsreg>,qword,ceil
- else /* CEIL.L.D - MIPS III */
+ else /* CEIL.L.D - MIPS III */
UML_FDTOINT(block, FPR64(FDREG), FPR64(FSREG), SIZE_QWORD, ROUND_CEIL);// fdtoint <fdreg>,<fsreg>,qword,ceil
return TRUE;
case 0x0b:
- if (IS_SINGLE(op)) /* FLOOR.L.S - MIPS III */
+ if (IS_SINGLE(op)) /* FLOOR.L.S - MIPS III */
UML_FSTOINT(block, FPR64(FDREG), FPR32(FSREG), SIZE_QWORD, ROUND_FLOOR);// fstoint <fdreg>,<fsreg>,qword,floor
- else /* FLOOR.L.D - MIPS III */
+ else /* FLOOR.L.D - MIPS III */
UML_FDTOINT(block, FPR64(FDREG), FPR64(FSREG), SIZE_QWORD, ROUND_FLOOR);// fdtoint <fdreg>,<fsreg>,qword,floor
return TRUE;
case 0x0c:
- if (IS_SINGLE(op)) /* ROUND.W.S - MIPS II */
+ if (IS_SINGLE(op)) /* ROUND.W.S - MIPS II */
UML_FSTOINT(block, FPR32(FDREG), FPR32(FSREG), SIZE_DWORD, ROUND_ROUND);// fstoint <fdreg>,<fsreg>,dword,round
- else /* ROUND.W.D - MIPS II */
+ else /* ROUND.W.D - MIPS II */
UML_FDTOINT(block, FPR32(FDREG), FPR64(FSREG), SIZE_DWORD, ROUND_ROUND);// fdtoint <fdreg>,<fsreg>,dword,round
return TRUE;
case 0x0d:
- if (IS_SINGLE(op)) /* TRUNC.W.S - MIPS II */
+ if (IS_SINGLE(op)) /* TRUNC.W.S - MIPS II */
UML_FSTOINT(block, FPR32(FDREG), FPR32(FSREG), SIZE_DWORD, ROUND_TRUNC);// fstoint <fdreg>,<fsreg>,dword,trunc
- else /* TRUNC.W.D - MIPS II */
+ else /* TRUNC.W.D - MIPS II */
UML_FDTOINT(block, FPR32(FDREG), FPR64(FSREG), SIZE_DWORD, ROUND_TRUNC);// fdtoint <fdreg>,<fsreg>,dword,trunc
return TRUE;
case 0x0e:
- if (IS_SINGLE(op)) /* CEIL.W.S - MIPS II */
+ if (IS_SINGLE(op)) /* CEIL.W.S - MIPS II */
UML_FSTOINT(block, FPR32(FDREG), FPR32(FSREG), SIZE_DWORD, ROUND_CEIL);// fstoint <fdreg>,<fsreg>,dword,ceil
- else /* CEIL.W.D - MIPS II */
+ else /* CEIL.W.D - MIPS II */
UML_FDTOINT(block, FPR32(FDREG), FPR64(FSREG), SIZE_DWORD, ROUND_CEIL);// fdtoint <fdreg>,<fsreg>,dword,ceil
return TRUE;
case 0x0f:
- if (IS_SINGLE(op)) /* FLOOR.W.S - MIPS II */
+ if (IS_SINGLE(op)) /* FLOOR.W.S - MIPS II */
UML_FSTOINT(block, FPR32(FDREG), FPR32(FSREG), SIZE_DWORD, ROUND_FLOOR);// fstoint <fdreg>,<fsreg>,dword,floor
- else /* FLOOR.W.D - MIPS II */
+ else /* FLOOR.W.D - MIPS II */
UML_FDTOINT(block, FPR32(FDREG), FPR64(FSREG), SIZE_DWORD, ROUND_FLOOR);// fdtoint <fdreg>,<fsreg>,dword,floor
return TRUE;
case 0x11:
condition = ((op >> 16) & 1) ? COND_NZ : COND_Z;
- UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr31,fccmask[op]
- if (IS_SINGLE(op)) /* MOVT/F.S - MIPS IV */
- UML_FSMOVc(block, condition, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>,condition
- else /* MOVT/F.D - MIPS IV */
- UML_FDMOVc(block, condition, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>,condition
+ UML_TEST(block, CCR132(31), FCCMASK(op >> 18)); // test ccr31,fccmask[op]
+ if (IS_SINGLE(op)) /* MOVT/F.S - MIPS IV */
+ UML_FSMOVc(block, condition, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>,condition
+ else /* MOVT/F.D - MIPS IV */
+ UML_FDMOVc(block, condition, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>,condition
return TRUE;
case 0x12:
- UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
- if (IS_SINGLE(op)) /* MOVZ.S - MIPS IV */
- UML_FSMOVc(block, COND_Z, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>,Z
- else /* MOVZ.D - MIPS IV */
- UML_FDMOVc(block, COND_Z, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>,Z
+ UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
+ if (IS_SINGLE(op)) /* MOVZ.S - MIPS IV */
+ UML_FSMOVc(block, COND_Z, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>,Z
+ else /* MOVZ.D - MIPS IV */
+ UML_FDMOVc(block, COND_Z, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>,Z
return TRUE;
case 0x13:
- UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
- if (IS_SINGLE(op)) /* MOVN.S - MIPS IV */
- UML_FSMOVc(block, COND_NZ, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>,NZ
- else /* MOVN.D - MIPS IV */
- UML_FDMOVc(block, COND_NZ, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>,NZ
+ UML_DCMP(block, R64(RTREG), 0); // dcmp <rtreg>,0
+ if (IS_SINGLE(op)) /* MOVN.S - MIPS IV */
+ UML_FSMOVc(block, COND_NZ, FPR32(FDREG), FPR32(FSREG)); // fsmov <fdreg>,<fsreg>,NZ
+ else /* MOVN.D - MIPS IV */
+ UML_FDMOVc(block, COND_NZ, FPR64(FDREG), FPR64(FSREG)); // fdmov <fdreg>,<fsreg>,NZ
return TRUE;
case 0x15:
- if (IS_SINGLE(op)) /* RECIP.S - MIPS IV */
- UML_FSRECIP(block, FPR32(FDREG), FPR32(FSREG)); // fsrecip <fdreg>,<fsreg>
- else /* RECIP.D - MIPS IV */
- UML_FDRECIP(block, FPR64(FDREG), FPR64(FSREG)); // fdrecip <fdreg>,<fsreg>
+ if (IS_SINGLE(op)) /* RECIP.S - MIPS IV */
+ UML_FSRECIP(block, FPR32(FDREG), FPR32(FSREG)); // fsrecip <fdreg>,<fsreg>
+ else /* RECIP.D - MIPS IV */
+ UML_FDRECIP(block, FPR64(FDREG), FPR64(FSREG)); // fdrecip <fdreg>,<fsreg>
return TRUE;
case 0x16:
- if (IS_SINGLE(op)) /* RSQRT.S - MIPS IV */
- UML_FSRSQRT(block, FPR32(FDREG), FPR32(FSREG)); // fsrsqrt <fdreg>,<fsreg>
- else /* RSQRT.D - MIPS IV */
- UML_FDRSQRT(block, FPR64(FDREG), FPR64(FSREG)); // fdrsqrt <fdreg>,<fsreg>
+ if (IS_SINGLE(op)) /* RSQRT.S - MIPS IV */
+ UML_FSRSQRT(block, FPR32(FDREG), FPR32(FSREG)); // fsrsqrt <fdreg>,<fsreg>
+ else /* RSQRT.D - MIPS IV */
+ UML_FDRSQRT(block, FPR64(FDREG), FPR64(FSREG)); // fdrsqrt <fdreg>,<fsreg>
return TRUE;
case 0x20:
if (IS_INTEGRAL(op))
{
- if (IS_SINGLE(op)) /* CVT.S.W - MIPS I */
- UML_FSFRINT(block, FPR32(FDREG), FPR32(FSREG), SIZE_DWORD); // fsfrint <fdreg>,<fsreg>,dword
- else /* CVT.S.L - MIPS I */
- UML_FSFRINT(block, FPR32(FDREG), FPR64(FSREG), SIZE_QWORD); // fsfrint <fdreg>,<fsreg>,qword
+ if (IS_SINGLE(op)) /* CVT.S.W - MIPS I */
+ UML_FSFRINT(block, FPR32(FDREG), FPR32(FSREG), SIZE_DWORD); // fsfrint <fdreg>,<fsreg>,dword
+ else /* CVT.S.L - MIPS I */
+ UML_FSFRINT(block, FPR32(FDREG), FPR64(FSREG), SIZE_QWORD); // fsfrint <fdreg>,<fsreg>,qword
}
- else /* CVT.S.D - MIPS I */
- UML_FSFRFLT(block, FPR32(FDREG), FPR64(FSREG), SIZE_QWORD); // fsfrflt <fdreg>,<fsreg>,qword
+ else /* CVT.S.D - MIPS I */
+ UML_FSFRFLT(block, FPR32(FDREG), FPR64(FSREG), SIZE_QWORD); // fsfrflt <fdreg>,<fsreg>,qword
return TRUE;
case 0x21:
if (IS_INTEGRAL(op))
{
- if (IS_SINGLE(op)) /* CVT.D.W - MIPS I */
- UML_FDFRINT(block, FPR64(FDREG), FPR32(FSREG), SIZE_DWORD); // fdfrint <fdreg>,<fsreg>,dword
- else /* CVT.D.L - MIPS I */
- UML_FDFRINT(block, FPR64(FDREG), FPR64(FSREG), SIZE_QWORD); // fdfrint <fdreg>,<fsreg>,qword
+ if (IS_SINGLE(op)) /* CVT.D.W - MIPS I */
+ UML_FDFRINT(block, FPR64(FDREG), FPR32(FSREG), SIZE_DWORD); // fdfrint <fdreg>,<fsreg>,dword
+ else /* CVT.D.L - MIPS I */
+ UML_FDFRINT(block, FPR64(FDREG), FPR64(FSREG), SIZE_QWORD); // fdfrint <fdreg>,<fsreg>,qword
}
- else /* CVT.D.S - MIPS I */
- UML_FDFRFLT(block, FPR64(FDREG), FPR32(FSREG), SIZE_DWORD); // fdfrflt <fdreg>,<fsreg>,dword
+ else /* CVT.D.S - MIPS I */
+ UML_FDFRFLT(block, FPR64(FDREG), FPR32(FSREG), SIZE_DWORD); // fdfrflt <fdreg>,<fsreg>,dword
return TRUE;
case 0x24:
- if (IS_SINGLE(op)) /* CVT.W.S - MIPS I */
+ if (IS_SINGLE(op)) /* CVT.W.S - MIPS I */
UML_FSTOINT(block, FPR32(FDREG), FPR32(FSREG), SIZE_DWORD, ROUND_DEFAULT);// fstoint <fdreg>,<fsreg>,dword,default
- else /* CVT.W.D - MIPS I */
+ else /* CVT.W.D - MIPS I */
UML_FDTOINT(block, FPR32(FDREG), FPR64(FSREG), SIZE_DWORD, ROUND_DEFAULT);// fdtoint <fdreg>,<fsreg>,dword,default
return TRUE;
case 0x25:
- if (IS_SINGLE(op)) /* CVT.L.S - MIPS I */
+ if (IS_SINGLE(op)) /* CVT.L.S - MIPS I */
UML_FSTOINT(block, FPR64(FDREG), FPR32(FSREG), SIZE_QWORD, ROUND_DEFAULT);// fstoint <fdreg>,<fsreg>,qword,default
- else /* CVT.L.D - MIPS I */
+ else /* CVT.L.D - MIPS I */
UML_FDTOINT(block, FPR64(FDREG), FPR64(FSREG), SIZE_QWORD, ROUND_DEFAULT);// fdtoint <fdreg>,<fsreg>,qword,default
return TRUE;
case 0x30:
- case 0x38: /* C.F.S/D - MIPS I */
- UML_AND(block, CCR132(31), CCR132(31), ~FCCMASK(op >> 8)); // and ccr31,ccr31,~fccmask[op]
+ case 0x38: /* C.F.S/D - MIPS I */
+ UML_AND(block, CCR132(31), CCR132(31), ~FCCMASK(op >> 8)); // and ccr31,ccr31,~fccmask[op]
return TRUE;
case 0x31:
case 0x39:
- if (IS_SINGLE(op)) /* C.UN.S - MIPS I */
- UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
- else /* C.UN.D - MIPS I */
- UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
- UML_SETc(block, COND_U, I0); // set i0,u
+ if (IS_SINGLE(op)) /* C.UN.S - MIPS I */
+ UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
+ else /* C.UN.D - MIPS I */
+ UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
+ UML_SETc(block, COND_U, I0); // set i0,u
UML_ROLINS(block, CCR132(31), I0, FCCSHIFT(op >> 8), FCCMASK(op >> 8));
// rolins ccr31,i0,fccshift,fcc
return TRUE;
case 0x32:
case 0x3a:
- if (IS_SINGLE(op)) /* C.EQ.S - MIPS I */
- UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
- else /* C.EQ.D - MIPS I */
- UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
- UML_SETc(block, COND_E, I0); // set i0,e
- UML_SETc(block, COND_NU, I1); // set i1,nu
- UML_AND(block, I0, I0, I1); // and i0,i0,i1
+ if (IS_SINGLE(op)) /* C.EQ.S - MIPS I */
+ UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
+ else /* C.EQ.D - MIPS I */
+ UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
+ UML_SETc(block, COND_E, I0); // set i0,e
+ UML_SETc(block, COND_NU, I1); // set i1,nu
+ UML_AND(block, I0, I0, I1); // and i0,i0,i1
UML_ROLINS(block, CCR132(31), I0, FCCSHIFT(op >> 8), FCCMASK(op >> 8));
// rolins ccr31,i0,fccshift,fcc
return TRUE;
case 0x33:
case 0x3b:
- if (IS_SINGLE(op)) /* C.UEQ.S - MIPS I */
- UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
- else /* C.UEQ.D - MIPS I */
- UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
- UML_SETc(block, COND_U, I0); // set i0,u
- UML_SETc(block, COND_E, I1); // set i1,e
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ if (IS_SINGLE(op)) /* C.UEQ.S - MIPS I */
+ UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
+ else /* C.UEQ.D - MIPS I */
+ UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
+ UML_SETc(block, COND_U, I0); // set i0,u
+ UML_SETc(block, COND_E, I1); // set i1,e
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
UML_ROLINS(block, CCR132(31), I0, FCCSHIFT(op >> 8), FCCMASK(op >> 8));
// rolins ccr31,i0,fccshift,fcc
return TRUE;
case 0x34:
case 0x3c:
- if (IS_SINGLE(op)) /* C.OLT.S - MIPS I */
- UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
- else /* C.OLT.D - MIPS I */
- UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
- UML_SETc(block, COND_B, I0); // set i0,b
- UML_SETc(block, COND_NU, I1); // set i1,nu
- UML_AND(block, I0, I0, I1); // and i0,i0,i1
+ if (IS_SINGLE(op)) /* C.OLT.S - MIPS I */
+ UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
+ else /* C.OLT.D - MIPS I */
+ UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
+ UML_SETc(block, COND_B, I0); // set i0,b
+ UML_SETc(block, COND_NU, I1); // set i1,nu
+ UML_AND(block, I0, I0, I1); // and i0,i0,i1
UML_ROLINS(block, CCR132(31), I0, FCCSHIFT(op >> 8), FCCMASK(op >> 8));
// rolins ccr31,i0,fccshift,fcc
return TRUE;
case 0x35:
case 0x3d:
- if (IS_SINGLE(op)) /* C.ULT.S - MIPS I */
- UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
- else /* C.ULT.D - MIPS I */
- UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
- UML_SETc(block, COND_U, I0); // set i0,u
- UML_SETc(block, COND_B, I1); // set i1,b
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ if (IS_SINGLE(op)) /* C.ULT.S - MIPS I */
+ UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
+ else /* C.ULT.D - MIPS I */
+ UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
+ UML_SETc(block, COND_U, I0); // set i0,u
+ UML_SETc(block, COND_B, I1); // set i1,b
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
UML_ROLINS(block, CCR132(31), I0, FCCSHIFT(op >> 8), FCCMASK(op >> 8));
// rolins ccr31,i0,fccshift,fcc
return TRUE;
case 0x36:
case 0x3e:
- if (IS_SINGLE(op)) /* C.OLE.S - MIPS I */
- UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
- else /* C.OLE.D - MIPS I */
- UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
- UML_SETc(block, COND_BE, I0); // set i0,be
- UML_SETc(block, COND_NU, I1); // set i1,nu
- UML_AND(block, I0, I0, I1); // and i0,i0,i1
+ if (IS_SINGLE(op)) /* C.OLE.S - MIPS I */
+ UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
+ else /* C.OLE.D - MIPS I */
+ UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
+ UML_SETc(block, COND_BE, I0); // set i0,be
+ UML_SETc(block, COND_NU, I1); // set i1,nu
+ UML_AND(block, I0, I0, I1); // and i0,i0,i1
UML_ROLINS(block, CCR132(31), I0, FCCSHIFT(op >> 8), FCCMASK(op >> 8));
// rolins ccr31,i0,fccshift,fcc
return TRUE;
case 0x37:
case 0x3f:
- if (IS_SINGLE(op)) /* C.ULE.S - MIPS I */
- UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
- else /* C.ULE.D - MIPS I */
- UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
- UML_SETc(block, COND_U, I0); // set i0,u
- UML_SETc(block, COND_BE, I1); // set i1,be
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ if (IS_SINGLE(op)) /* C.ULE.S - MIPS I */
+ UML_FSCMP(block, FPR32(FSREG), FPR32(FTREG)); // fscmp <fsreg>,<ftreg>
+ else /* C.ULE.D - MIPS I */
+ UML_FDCMP(block, FPR64(FSREG), FPR64(FTREG)); // fdcmp <fsreg>,<ftreg>
+ UML_SETc(block, COND_U, I0); // set i0,u
+ UML_SETc(block, COND_BE, I1); // set i1,be
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
UML_ROLINS(block, CCR132(31), I0, FCCSHIFT(op >> 8), FCCMASK(op >> 8));
// rolins ccr31,i0,fccshift,fcc
return TRUE;
@@ -3428,87 +3428,87 @@ static int generate_cop1x(mips3_state *mips3, drcuml_block *block, compiler_stat
if (mips3->impstate->drcoptions & MIPS3DRC_STRICT_COP1)
{
- UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1
+ UML_TEST(block, CPR032(COP0_Status), SR_COP1); // test [Status],SR_COP1
UML_EXHc(block, COND_Z, *mips3->impstate->exception[EXCEPTION_BADCOP], 1);// exh cop,1,Z
}
switch (op & 0x3f)
{
- case 0x00: /* LWXC1 - MIPS IV */
- UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
- UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
- UML_MOV(block, FPR32(FDREG), I0); // mov <cpr1_fd>,i0
+ case 0x00: /* LWXC1 - MIPS IV */
+ UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
+ UML_CALLH(block, *mips3->impstate->read32[mips3->impstate->mode >> 1]); // callh read32
+ UML_MOV(block, FPR32(FDREG), I0); // mov <cpr1_fd>,i0
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x01: /* LDXC1 - MIPS IV */
- UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
- UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
- UML_DMOV(block, FPR64(FDREG), I0); // dmov <cpr1_fd>,i0
+ case 0x01: /* LDXC1 - MIPS IV */
+ UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
+ UML_CALLH(block, *mips3->impstate->read64[mips3->impstate->mode >> 1]); // callh read64
+ UML_DMOV(block, FPR64(FDREG), I0); // dmov <cpr1_fd>,i0
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x08: /* SWXC1 - MIPS IV */
- UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
- UML_MOV(block, I1, FPR32(FSREG)); // mov i1,<cpr1_fs>
- UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
+ case 0x08: /* SWXC1 - MIPS IV */
+ UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
+ UML_MOV(block, I1, FPR32(FSREG)); // mov i1,<cpr1_fs>
+ UML_CALLH(block, *mips3->impstate->write32[mips3->impstate->mode >> 1]); // callh write32
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x09: /* SDXC1 - MIPS IV */
- UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
- UML_DMOV(block, I1, FPR64(FSREG)); // dmov i1,<cpr1_fs>
- UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
+ case 0x09: /* SDXC1 - MIPS IV */
+ UML_ADD(block, I0, R32(RSREG), R32(RTREG)); // add i0,<rsreg>,<rtreg>
+ UML_DMOV(block, I1, FPR64(FSREG)); // dmov i1,<cpr1_fs>
+ UML_CALLH(block, *mips3->impstate->write64[mips3->impstate->mode >> 1]); // callh write64
if (!in_delay_slot)
generate_update_cycles(mips3, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x0f: /* PREFX */
+ case 0x0f: /* PREFX */
return TRUE;
- case 0x20: /* MADD.S - MIPS IV */
- UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
- UML_FSADD(block, FPR32(FDREG), F0, FPR32(FRREG)); // fsadd <fdreg>,f0,<frreg>
+ case 0x20: /* MADD.S - MIPS IV */
+ UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
+ UML_FSADD(block, FPR32(FDREG), F0, FPR32(FRREG)); // fsadd <fdreg>,f0,<frreg>
return TRUE;
- case 0x21: /* MADD.D - MIPS IV */
- UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
- UML_FDADD(block, FPR64(FDREG), F0, FPR64(FRREG)); // fdadd <fdreg>,f0,<frreg>
+ case 0x21: /* MADD.D - MIPS IV */
+ UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
+ UML_FDADD(block, FPR64(FDREG), F0, FPR64(FRREG)); // fdadd <fdreg>,f0,<frreg>
return TRUE;
- case 0x28: /* MSUB.S - MIPS IV */
- UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
- UML_FSSUB(block, FPR32(FDREG), F0, FPR32(FRREG)); // fssub <fdreg>,f0,<frreg>
+ case 0x28: /* MSUB.S - MIPS IV */
+ UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
+ UML_FSSUB(block, FPR32(FDREG), F0, FPR32(FRREG)); // fssub <fdreg>,f0,<frreg>
return TRUE;
- case 0x29: /* MSUB.D - MIPS IV */
- UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
- UML_FDSUB(block, FPR64(FDREG), F0, FPR64(FRREG)); // fdsub <fdreg>,f0,<frreg>
+ case 0x29: /* MSUB.D - MIPS IV */
+ UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
+ UML_FDSUB(block, FPR64(FDREG), F0, FPR64(FRREG)); // fdsub <fdreg>,f0,<frreg>
return TRUE;
- case 0x30: /* NMADD.S - MIPS IV */
- UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
- UML_FSADD(block, F0, F0, FPR32(FRREG)); // fsadd f0,f0,<frreg>
- UML_FSNEG(block, FPR32(FDREG), F0); // fsneg <fdreg>,f0
+ case 0x30: /* NMADD.S - MIPS IV */
+ UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
+ UML_FSADD(block, F0, F0, FPR32(FRREG)); // fsadd f0,f0,<frreg>
+ UML_FSNEG(block, FPR32(FDREG), F0); // fsneg <fdreg>,f0
return TRUE;
- case 0x31: /* NMADD.D - MIPS IV */
- UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
- UML_FDADD(block, F0, F0, FPR64(FRREG)); // fdadd f0,f0,<frreg>
- UML_FDNEG(block, FPR64(FDREG), F0); // fdneg <fdreg>,f0
+ case 0x31: /* NMADD.D - MIPS IV */
+ UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
+ UML_FDADD(block, F0, F0, FPR64(FRREG)); // fdadd f0,f0,<frreg>
+ UML_FDNEG(block, FPR64(FDREG), F0); // fdneg <fdreg>,f0
return TRUE;
- case 0x38: /* NMSUB.S - MIPS IV */
- UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
- UML_FSSUB(block, FPR32(FDREG), FPR32(FRREG), F0); // fssub <fdreg>,<frreg>,f0
+ case 0x38: /* NMSUB.S - MIPS IV */
+ UML_FSMUL(block, F0, FPR32(FSREG), FPR32(FTREG)); // fsmul f0,<fsreg>,<ftreg>
+ UML_FSSUB(block, FPR32(FDREG), FPR32(FRREG), F0); // fssub <fdreg>,<frreg>,f0
return TRUE;
- case 0x39: /* NMSUB.D - MIPS IV */
- UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
- UML_FDSUB(block, FPR64(FDREG), FPR64(FRREG), F0); // fdsub <fdreg>,<frreg>,f0
+ case 0x39: /* NMSUB.D - MIPS IV */
+ UML_FDMUL(block, F0, FPR64(FSREG), FPR64(FTREG)); // fdmul f0,<fsreg>,<ftreg>
+ UML_FDSUB(block, FPR64(FDREG), FPR64(FRREG), F0); // fdsub <fdreg>,<frreg>,f0
return TRUE;
default:
@@ -3534,7 +3534,7 @@ static void log_add_disasm_comment(mips3_state *mips3, drcuml_block *block, UINT
#if (LOG_UML)
char buffer[100];
dasmmips3(buffer, pc, op);
- block->append_comment("%08X: %s", pc, buffer); // comment
+ block->append_comment("%08X: %s", pc, buffer); // comment
#endif
}
@@ -3710,16 +3710,16 @@ CPU_GET_INFO( vr4300be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3728,16 +3728,16 @@ CPU_GET_INFO( vr4300le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4300 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3747,16 +3747,16 @@ CPU_GET_INFO( vr4310be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3765,16 +3765,16 @@ CPU_GET_INFO( vr4310le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(vr4300le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "VR4310 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3798,16 +3798,16 @@ CPU_GET_INFO( r4600be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3816,16 +3816,16 @@ CPU_GET_INFO( r4600le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4600le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4600 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3850,16 +3850,16 @@ CPU_GET_INFO( r4650be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3868,16 +3868,16 @@ CPU_GET_INFO( r4650le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4650le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "IDT R4650 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3902,16 +3902,16 @@ CPU_GET_INFO( r4700be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3920,16 +3920,16 @@ CPU_GET_INFO( r4700le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r4700le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R4700 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3954,16 +3954,16 @@ CPU_GET_INFO( r5000be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -3972,16 +3972,16 @@ CPU_GET_INFO( r5000le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r5000le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R5000 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -4006,16 +4006,16 @@ CPU_GET_INFO( qed5271be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -4024,16 +4024,16 @@ CPU_GET_INFO( qed5271le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(qed5271le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "QED5271 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -4058,16 +4058,16 @@ CPU_GET_INFO( rm7000be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000be); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (big)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -4076,16 +4076,16 @@ CPU_GET_INFO( rm7000le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000le); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rm7000le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "RM7000 (little)"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(mips3); break;
+ default: CPU_GET_INFO_CALL(mips3); break;
}
}
@@ -4112,5 +4112,4 @@ DEFINE_LEGACY_CPU_DEVICE(QED5271LE, qed5271le);
DEFINE_LEGACY_CPU_DEVICE(RM7000BE, rm7000be);
DEFINE_LEGACY_CPU_DEVICE(RM7000LE, rm7000le);
-#endif // MIPS3_USE_DRC
-
+#endif // MIPS3_USE_DRC
diff --git a/src/emu/cpu/mips/mips3dsm.c b/src/emu/cpu/mips/mips3dsm.c
index a392ef69427..7f59f14b568 100644
--- a/src/emu/cpu/mips/mips3dsm.c
+++ b/src/emu/cpu/mips/mips3dsm.c
@@ -13,18 +13,18 @@
#if USE_ABI_REG_NAMES
static const char *const reg[32] =
{
- "$0", "$at", "$v0", "$v1", "$a0", "$a1", "$a2", "$a3",
- "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7",
- "$s0", "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7",
- "$t8", "$t9", "$k0", "$k1", "$gp", "$sp", "$fp", "$ra"
+ "$0", "$at", "$v0", "$v1", "$a0", "$a1", "$a2", "$a3",
+ "$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7",
+ "$s0", "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7",
+ "$t8", "$t9", "$k0", "$k1", "$gp", "$sp", "$fp", "$ra"
};
#else
static const char *const reg[32] =
{
- "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
};
#endif
@@ -39,20 +39,20 @@ static const char *const cpreg[4][32] =
"cpr24","cpr25","ECC","CacheError","TagLo","TagHi","ErrorEPC","cpr31"
},
{
- "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
- "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
- "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
- "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
},
{
- "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
- "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
+ "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
+ "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
"cpr16","cpr17","cpr18","cpr19","cpr20","cpr21","cpr22","cpr23",
"cpr24","cpr25","cpr26","cpr27","cpr28","cpr29","cpr30","cpr31"
},
{
- "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
- "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
+ "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
+ "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
"cpr16","cpr17","cpr18","cpr19","cpr20","cpr21","cpr22","cpr23",
"cpr24","cpr25","cpr26","cpr27","cpr28","cpr29","cpr30","cpr31"
}
@@ -62,26 +62,26 @@ static const char *const cpreg[4][32] =
static const char *const ccreg[4][32] =
{
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
},
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
},
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
},
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
}
@@ -110,20 +110,20 @@ static UINT32 dasm_cop0(UINT32 pc, UINT32 op, char *buffer)
switch ((op >> 21) & 31)
{
- case 0x00: sprintf(buffer, "mfc0 %s,%s", reg[rt], cpreg[0][rd]); break;
- case 0x01: sprintf(buffer, "dmfc0 %s,%s", reg[rt], cpreg[0][rd]); break;
- case 0x02: sprintf(buffer, "cfc0 %s,%s", reg[rt], ccreg[0][rd]); break;
- case 0x04: sprintf(buffer, "mtc0 %s,%s", reg[rt], cpreg[0][rd]); break;
- case 0x05: sprintf(buffer, "dmtc0 %s,%s", reg[rt], cpreg[0][rd]); break;
- case 0x06: sprintf(buffer, "ctc0 %s,%s", reg[rt], ccreg[0][rd]); break;
- case 0x08: /* BC */
+ case 0x00: sprintf(buffer, "mfc0 %s,%s", reg[rt], cpreg[0][rd]); break;
+ case 0x01: sprintf(buffer, "dmfc0 %s,%s", reg[rt], cpreg[0][rd]); break;
+ case 0x02: sprintf(buffer, "cfc0 %s,%s", reg[rt], ccreg[0][rd]); break;
+ case 0x04: sprintf(buffer, "mtc0 %s,%s", reg[rt], cpreg[0][rd]); break;
+ case 0x05: sprintf(buffer, "dmtc0 %s,%s", reg[rt], cpreg[0][rd]); break;
+ case 0x06: sprintf(buffer, "ctc0 %s,%s", reg[rt], ccreg[0][rd]); break;
+ case 0x08: /* BC */
switch (rt)
{
- case 0x00: sprintf(buffer, "bc0f $%08x", pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bc0t $%08x", pc + 4 + ((INT16)op << 2)); break;
- case 0x02: sprintf(buffer, "bc0fl [invalid]"); break;
- case 0x03: sprintf(buffer, "bc0tl [invalid]"); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x00: sprintf(buffer, "bc0f $%08x", pc + 4 + ((INT16)op << 2)); break;
+ case 0x01: sprintf(buffer, "bc0t $%08x", pc + 4 + ((INT16)op << 2)); break;
+ case 0x02: sprintf(buffer, "bc0fl [invalid]"); break;
+ case 0x03: sprintf(buffer, "bc0tl [invalid]"); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
case 0x10:
@@ -141,19 +141,19 @@ static UINT32 dasm_cop0(UINT32 pc, UINT32 op, char *buffer)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */
+ case 0x1f: /* COP */
switch (op & 0x01ffffff)
{
- case 0x01: sprintf(buffer, "tlbr"); break;
- case 0x02: sprintf(buffer, "tlbwi"); break;
- case 0x06: sprintf(buffer, "tlbwr"); break;
- case 0x08: sprintf(buffer, "tlbp"); break;
- case 0x10: sprintf(buffer, "rfe"); flags = DASMFLAG_STEP_OUT; break;
- case 0x18: sprintf(buffer, "eret [invalid]"); break;
- default: sprintf(buffer, "cop0 $%07x", op & 0x01ffffff); break;
+ case 0x01: sprintf(buffer, "tlbr"); break;
+ case 0x02: sprintf(buffer, "tlbwi"); break;
+ case 0x06: sprintf(buffer, "tlbwr"); break;
+ case 0x08: sprintf(buffer, "tlbp"); break;
+ case 0x10: sprintf(buffer, "rfe"); flags = DASMFLAG_STEP_OUT; break;
+ case 0x18: sprintf(buffer, "eret [invalid]"); break;
+ default: sprintf(buffer, "cop0 $%07x", op & 0x01ffffff); break;
}
break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
return flags;
}
@@ -175,66 +175,66 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
switch ((op >> 21) & 31)
{
- case 0x00: sprintf(buffer, "mfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x01: sprintf(buffer, "dmfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x02: sprintf(buffer, "cfc1 %s,%s", reg[rt], ccreg[1][rd]); break;
- case 0x04: sprintf(buffer, "mtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x05: sprintf(buffer, "dmtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x06: sprintf(buffer, "ctc1 %s,%s", reg[rt], ccreg[1][rd]); break;
- case 0x08: /* BC */
+ case 0x00: sprintf(buffer, "mfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x01: sprintf(buffer, "dmfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x02: sprintf(buffer, "cfc1 %s,%s", reg[rt], ccreg[1][rd]); break;
+ case 0x04: sprintf(buffer, "mtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x05: sprintf(buffer, "dmtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x06: sprintf(buffer, "ctc1 %s,%s", reg[rt], ccreg[1][rd]); break;
+ case 0x08: /* BC */
switch (rt & 3)
{
- case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
+ case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
+ case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
}
break;
- default: /* COP */
+ default: /* COP */
switch (op & 0x3f)
{
- case 0x00: sprintf(buffer, "add.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x01: sprintf(buffer, "sub.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x02: sprintf(buffer, "mul.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x03: sprintf(buffer, "div.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x04: sprintf(buffer, "sqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x05: sprintf(buffer, "abs.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x06: sprintf(buffer, "mov.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x07: sprintf(buffer, "neg.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x08: sprintf(buffer, "round.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x09: sprintf(buffer, "trunc.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0a: sprintf(buffer, "ceil.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0b: sprintf(buffer, "floor.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0c: sprintf(buffer, "round.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0d: sprintf(buffer, "trunc.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0e: sprintf(buffer, "ceil.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0f: sprintf(buffer, "floor.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x11: sprintf(buffer, "mov%c.%s %s,%s,%d", ((op >> 16) & 1) ? 't' : 'f', fmt, cpreg[1][fd], cpreg[1][fs], (op >> 18) & 7); break;
- case 0x12: sprintf(buffer, "movz.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
- case 0x13: sprintf(buffer, "movn.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
- case 0x15: sprintf(buffer, "recip.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x16: sprintf(buffer, "rsqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x20: sprintf(buffer, "cvt.s.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x21: sprintf(buffer, "cvt.d.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x24: sprintf(buffer, "cvt.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x25: sprintf(buffer, "cvt.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x30: sprintf(buffer, "c.f.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x31: sprintf(buffer, "c.un.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x32: sprintf(buffer, "c.eq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x33: sprintf(buffer, "c.ueq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x34: sprintf(buffer, "c.olt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x35: sprintf(buffer, "c.ult.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x36: sprintf(buffer, "c.ole.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x37: sprintf(buffer, "c.ule.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x38: sprintf(buffer, "c.sf.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x39: sprintf(buffer, "c.ngle.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7);break;
- case 0x3a: sprintf(buffer, "c.seq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3b: sprintf(buffer, "c.ngl.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3c: sprintf(buffer, "c.lt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3d: sprintf(buffer, "c.nge.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3e: sprintf(buffer, "c.le.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3f: sprintf(buffer, "c.ngt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- default: sprintf(buffer, "cop1 $%07x", op & 0x01ffffff); break;
+ case 0x00: sprintf(buffer, "add.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x01: sprintf(buffer, "sub.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x02: sprintf(buffer, "mul.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x03: sprintf(buffer, "div.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x04: sprintf(buffer, "sqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x05: sprintf(buffer, "abs.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x06: sprintf(buffer, "mov.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x07: sprintf(buffer, "neg.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x08: sprintf(buffer, "round.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x09: sprintf(buffer, "trunc.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0a: sprintf(buffer, "ceil.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0b: sprintf(buffer, "floor.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0c: sprintf(buffer, "round.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0d: sprintf(buffer, "trunc.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0e: sprintf(buffer, "ceil.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0f: sprintf(buffer, "floor.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x11: sprintf(buffer, "mov%c.%s %s,%s,%d", ((op >> 16) & 1) ? 't' : 'f', fmt, cpreg[1][fd], cpreg[1][fs], (op >> 18) & 7); break;
+ case 0x12: sprintf(buffer, "movz.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
+ case 0x13: sprintf(buffer, "movn.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
+ case 0x15: sprintf(buffer, "recip.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x16: sprintf(buffer, "rsqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x20: sprintf(buffer, "cvt.s.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x21: sprintf(buffer, "cvt.d.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x24: sprintf(buffer, "cvt.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x25: sprintf(buffer, "cvt.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x30: sprintf(buffer, "c.f.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x31: sprintf(buffer, "c.un.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x32: sprintf(buffer, "c.eq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x33: sprintf(buffer, "c.ueq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x34: sprintf(buffer, "c.olt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x35: sprintf(buffer, "c.ult.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x36: sprintf(buffer, "c.ole.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x37: sprintf(buffer, "c.ule.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x38: sprintf(buffer, "c.sf.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x39: sprintf(buffer, "c.ngle.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7);break;
+ case 0x3a: sprintf(buffer, "c.seq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3b: sprintf(buffer, "c.ngl.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3c: sprintf(buffer, "c.lt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3d: sprintf(buffer, "c.nge.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3e: sprintf(buffer, "c.le.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3f: sprintf(buffer, "c.ngt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ default: sprintf(buffer, "cop1 $%07x", op & 0x01ffffff); break;
}
break;
}
@@ -259,11 +259,11 @@ static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
switch (op & 0x3f)
{
- case 0x00: sprintf(buffer, "lwxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
- case 0x01: sprintf(buffer, "ldxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
- case 0x08: sprintf(buffer, "swxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
- case 0x09: sprintf(buffer, "sdxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
- case 0x0f: sprintf(buffer, "prefx %d,%s(%s)", rd, reg[rt], reg[rs]); break;
+ case 0x00: sprintf(buffer, "lwxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
+ case 0x01: sprintf(buffer, "ldxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
+ case 0x08: sprintf(buffer, "swxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
+ case 0x09: sprintf(buffer, "sdxc1 %s,%s(%s)", cpreg[1][fd], reg[rt], reg[rs]); break;
+ case 0x0f: sprintf(buffer, "prefx %d,%s(%s)", rd, reg[rt], reg[rs]); break;
case 0x20:
case 0x21:
case 0x22:
@@ -271,7 +271,7 @@ static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
case 0x24:
case 0x25:
case 0x26:
- case 0x27: sprintf(buffer, "madd.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x27: sprintf(buffer, "madd.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
case 0x28:
case 0x29:
case 0x2a:
@@ -279,7 +279,7 @@ static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
case 0x2c:
case 0x2d:
case 0x2e:
- case 0x2f: sprintf(buffer, "msub.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x2f: sprintf(buffer, "msub.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
case 0x30:
case 0x31:
case 0x32:
@@ -287,7 +287,7 @@ static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
case 0x34:
case 0x35:
case 0x36:
- case 0x37: sprintf(buffer, "nmadd.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x37: sprintf(buffer, "nmadd.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
case 0x38:
case 0x39:
case 0x3a:
@@ -295,8 +295,8 @@ static UINT32 dasm_cop1x(UINT32 pc, UINT32 op, char *buffer)
case 0x3c:
case 0x3d:
case 0x3e:
- case 0x3f: sprintf(buffer, "nmsub.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
- default: sprintf(buffer, "cop1 $%07x", op & 0x01ffffff); break;
+ case 0x3f: sprintf(buffer, "nmsub.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
+ default: sprintf(buffer, "cop1 $%07x", op & 0x01ffffff); break;
}
return flags;
}
@@ -309,20 +309,20 @@ static UINT32 dasm_cop2(UINT32 pc, UINT32 op, char *buffer)
switch ((op >> 21) & 31)
{
- case 0x00: sprintf(buffer, "mfc2 %s,%s", reg[rt], cpreg[2][rd]); break;
- case 0x01: sprintf(buffer, "dmfc2 %s,%s", reg[rt], cpreg[2][rd]); break;
- case 0x02: sprintf(buffer, "cfc2 %s,%s", reg[rt], ccreg[2][rd]); break;
- case 0x04: sprintf(buffer, "mtc2 %s,%s", reg[rt], cpreg[2][rd]); break;
- case 0x05: sprintf(buffer, "dmtc2 %s,%s", reg[rt], cpreg[2][rd]); break;
- case 0x06: sprintf(buffer, "ctc2 %s,%s", reg[rt], ccreg[2][rd]); break;
- case 0x08: /* BC */
+ case 0x00: sprintf(buffer, "mfc2 %s,%s", reg[rt], cpreg[2][rd]); break;
+ case 0x01: sprintf(buffer, "dmfc2 %s,%s", reg[rt], cpreg[2][rd]); break;
+ case 0x02: sprintf(buffer, "cfc2 %s,%s", reg[rt], ccreg[2][rd]); break;
+ case 0x04: sprintf(buffer, "mtc2 %s,%s", reg[rt], cpreg[2][rd]); break;
+ case 0x05: sprintf(buffer, "dmtc2 %s,%s", reg[rt], cpreg[2][rd]); break;
+ case 0x06: sprintf(buffer, "ctc2 %s,%s", reg[rt], ccreg[2][rd]); break;
+ case 0x08: /* BC */
switch (rt)
{
- case 0x00: sprintf(buffer, "bc2f $%08x", pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bc2t $%08x", pc + 4 + ((INT16)op << 2)); break;
- case 0x02: sprintf(buffer, "bc2fl [invalid]"); break;
- case 0x03: sprintf(buffer, "bc2tl [invalid]"); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x00: sprintf(buffer, "bc2f $%08x", pc + 4 + ((INT16)op << 2)); break;
+ case 0x01: sprintf(buffer, "bc2t $%08x", pc + 4 + ((INT16)op << 2)); break;
+ case 0x02: sprintf(buffer, "bc2fl [invalid]"); break;
+ case 0x03: sprintf(buffer, "bc2tl [invalid]"); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
case 0x10:
@@ -340,10 +340,10 @@ static UINT32 dasm_cop2(UINT32 pc, UINT32 op, char *buffer)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */
+ case 0x1f: /* COP */
sprintf(buffer, "cop2 $%07x", op & 0x01ffffff);
break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
return flags;
}
@@ -358,166 +358,166 @@ unsigned dasmmips3(char *buffer, unsigned pc, UINT32 op)
switch (op >> 26)
{
- case 0x00: /* SPECIAL */
+ case 0x00: /* SPECIAL */
switch (op & 63)
{
- case 0x00: if (op == 0)
+ case 0x00: if (op == 0)
sprintf(buffer, "nop");
else
- sprintf(buffer, "sll %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x01: sprintf(buffer, "mov%c %s,%s,%d", ((op >> 16) & 1) ? 't' : 'f', reg[rd], reg[rs], (op >> 18) & 7); break;
- case 0x02: sprintf(buffer, "srl %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x03: sprintf(buffer, "sra %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x04: sprintf(buffer, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x06: sprintf(buffer, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x07: sprintf(buffer, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x08: sprintf(buffer, "jr %s", reg[rs]); if (rs == 31) flags = DASMFLAG_STEP_OUT; break;
- case 0x09: if (rd == 31)
+ sprintf(buffer, "sll %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x01: sprintf(buffer, "mov%c %s,%s,%d", ((op >> 16) & 1) ? 't' : 'f', reg[rd], reg[rs], (op >> 18) & 7); break;
+ case 0x02: sprintf(buffer, "srl %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x03: sprintf(buffer, "sra %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x04: sprintf(buffer, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x06: sprintf(buffer, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x07: sprintf(buffer, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x08: sprintf(buffer, "jr %s", reg[rs]); if (rs == 31) flags = DASMFLAG_STEP_OUT; break;
+ case 0x09: if (rd == 31)
sprintf(buffer, "jalr %s", reg[rs]);
else
sprintf(buffer, "jalr %s,%s", reg[rs], reg[rd]); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x0a: sprintf(buffer, "movz %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x0b: sprintf(buffer, "movn %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x0c: sprintf(buffer, "syscall"); flags = DASMFLAG_STEP_OVER; break;
- case 0x0d: sprintf(buffer, "break"); flags = DASMFLAG_STEP_OVER; break;
- case 0x0f: sprintf(buffer, "sync"); break;
- case 0x10: sprintf(buffer, "mfhi %s", reg[rd]); break;
- case 0x11: sprintf(buffer, "mthi %s", reg[rs]); break;
- case 0x12: sprintf(buffer, "mflo %s", reg[rd]); break;
- case 0x13: sprintf(buffer, "mtlo %s", reg[rs]); break;
- case 0x14: sprintf(buffer, "dsllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x16: sprintf(buffer, "dsrlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x17: sprintf(buffer, "dsrav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x18: sprintf(buffer, "mult %s,%s", reg[rs], reg[rt]); break;
- case 0x19: sprintf(buffer, "multu %s,%s", reg[rs], reg[rt]); break;
- case 0x1a: sprintf(buffer, "div %s,%s", reg[rs], reg[rt]); break;
- case 0x1b: sprintf(buffer, "divu %s,%s", reg[rs], reg[rt]); break;
- case 0x1c: sprintf(buffer, "dmult %s,%s", reg[rs], reg[rt]); break;
- case 0x1d: sprintf(buffer, "dmultu %s,%s", reg[rs], reg[rt]); break;
- case 0x1e: sprintf(buffer, "ddiv %s,%s", reg[rs], reg[rt]); break;
- case 0x1f: sprintf(buffer, "ddivu %s,%s", reg[rs], reg[rt]); break;
- case 0x20: sprintf(buffer, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x21: sprintf(buffer, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x22: sprintf(buffer, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x23: sprintf(buffer, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x24: sprintf(buffer, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x25: sprintf(buffer, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x26: sprintf(buffer, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x27: sprintf(buffer, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2a: sprintf(buffer, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2b: sprintf(buffer, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2c: sprintf(buffer, "dadd %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2d: sprintf(buffer, "daddu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2e: sprintf(buffer, "dsub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2f: sprintf(buffer, "dsubu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x30: sprintf(buffer, "tge %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
- case 0x31: sprintf(buffer, "tgeu %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
- case 0x32: sprintf(buffer, "tlt %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
- case 0x33: sprintf(buffer, "tltu %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
- case 0x34: sprintf(buffer, "teq %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
- case 0x36: sprintf(buffer, "tne %s,%s", reg[rs], reg[rt]) ;flags = DASMFLAG_STEP_OVER; break;
- case 0x38: sprintf(buffer, "dsll %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x3a: sprintf(buffer, "dsrl %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x3b: sprintf(buffer, "dsra %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x3c: sprintf(buffer, "dsll %s,%s,%d", reg[rd], reg[rt], shift+32); break;
- case 0x3e: sprintf(buffer, "dsrl %s,%s,%d", reg[rd], reg[rt], shift+32); break;
- case 0x3f: sprintf(buffer, "dsra %s,%s,%d", reg[rd], reg[rt], shift+32); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x0a: sprintf(buffer, "movz %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x0b: sprintf(buffer, "movn %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x0c: sprintf(buffer, "syscall"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0d: sprintf(buffer, "break"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0f: sprintf(buffer, "sync"); break;
+ case 0x10: sprintf(buffer, "mfhi %s", reg[rd]); break;
+ case 0x11: sprintf(buffer, "mthi %s", reg[rs]); break;
+ case 0x12: sprintf(buffer, "mflo %s", reg[rd]); break;
+ case 0x13: sprintf(buffer, "mtlo %s", reg[rs]); break;
+ case 0x14: sprintf(buffer, "dsllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x16: sprintf(buffer, "dsrlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x17: sprintf(buffer, "dsrav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x18: sprintf(buffer, "mult %s,%s", reg[rs], reg[rt]); break;
+ case 0x19: sprintf(buffer, "multu %s,%s", reg[rs], reg[rt]); break;
+ case 0x1a: sprintf(buffer, "div %s,%s", reg[rs], reg[rt]); break;
+ case 0x1b: sprintf(buffer, "divu %s,%s", reg[rs], reg[rt]); break;
+ case 0x1c: sprintf(buffer, "dmult %s,%s", reg[rs], reg[rt]); break;
+ case 0x1d: sprintf(buffer, "dmultu %s,%s", reg[rs], reg[rt]); break;
+ case 0x1e: sprintf(buffer, "ddiv %s,%s", reg[rs], reg[rt]); break;
+ case 0x1f: sprintf(buffer, "ddivu %s,%s", reg[rs], reg[rt]); break;
+ case 0x20: sprintf(buffer, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x21: sprintf(buffer, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x22: sprintf(buffer, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x23: sprintf(buffer, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x24: sprintf(buffer, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x25: sprintf(buffer, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x26: sprintf(buffer, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x27: sprintf(buffer, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2a: sprintf(buffer, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2b: sprintf(buffer, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2c: sprintf(buffer, "dadd %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2d: sprintf(buffer, "daddu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2e: sprintf(buffer, "dsub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2f: sprintf(buffer, "dsubu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x30: sprintf(buffer, "tge %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
+ case 0x31: sprintf(buffer, "tgeu %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
+ case 0x32: sprintf(buffer, "tlt %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
+ case 0x33: sprintf(buffer, "tltu %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
+ case 0x34: sprintf(buffer, "teq %s,%s", reg[rs], reg[rt]); flags = DASMFLAG_STEP_OVER; break;
+ case 0x36: sprintf(buffer, "tne %s,%s", reg[rs], reg[rt]) ;flags = DASMFLAG_STEP_OVER; break;
+ case 0x38: sprintf(buffer, "dsll %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x3a: sprintf(buffer, "dsrl %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x3b: sprintf(buffer, "dsra %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x3c: sprintf(buffer, "dsll %s,%s,%d", reg[rd], reg[rt], shift+32); break;
+ case 0x3e: sprintf(buffer, "dsrl %s,%s,%d", reg[rd], reg[rt], shift+32); break;
+ case 0x3f: sprintf(buffer, "dsra %s,%s,%d", reg[rd], reg[rt], shift+32); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
- case 0x01: /* REGIMM */
+ case 0x01: /* REGIMM */
switch ((op >> 16) & 31)
{
- case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x02: sprintf(buffer, "bltzl %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x03: sprintf(buffer, "bgezl %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x08: sprintf(buffer, "tgei %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
- case 0x09: sprintf(buffer, "tgeiu %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
- case 0x0a: sprintf(buffer, "tlti %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
- case 0x0b: sprintf(buffer, "tltiu %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
- case 0x0c: sprintf(buffer, "teqi %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
- case 0x0e: sprintf(buffer, "tnei %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
- case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x12: sprintf(buffer, "bltzall %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x13: sprintf(buffer, "bgezall %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x02: sprintf(buffer, "bltzl %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x03: sprintf(buffer, "bgezl %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x08: sprintf(buffer, "tgei %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x09: sprintf(buffer, "tgeiu %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0a: sprintf(buffer, "tlti %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0b: sprintf(buffer, "tltiu %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0c: sprintf(buffer, "teqi %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0e: sprintf(buffer, "tnei %s,%s", reg[rs], signed_16bit(op)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x12: sprintf(buffer, "bltzall %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x13: sprintf(buffer, "bgezall %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
- case 0x02: sprintf(buffer, "j $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break;
- case 0x03: sprintf(buffer, "jal $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x04: if (rs == 0 && rt == 0)
+ case 0x02: sprintf(buffer, "j $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break;
+ case 0x03: sprintf(buffer, "jal $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x04: if (rs == 0 && rt == 0)
sprintf(buffer, "b $%08x", pc + 4 + ((INT16)op << 2));
else
sprintf(buffer, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x08: sprintf(buffer, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x09: sprintf(buffer, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0a: sprintf(buffer, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0b: sprintf(buffer, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (UINT16)op); break;
- case 0x10: flags = dasm_cop0(pc, op, buffer); break;
- case 0x11: flags = dasm_cop1(pc, op, buffer); break;
- case 0x12: flags = dasm_cop2(pc, op, buffer); break;
- case 0x13: flags = dasm_cop1x(pc, op, buffer); break;
- case 0x14: sprintf(buffer, "beql %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x15: sprintf(buffer, "bnel %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x16: sprintf(buffer, "blezl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x17: sprintf(buffer, "bgtzl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x18: sprintf(buffer, "daddi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x19: sprintf(buffer, "daddiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x1a: sprintf(buffer, "ldl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x1b: sprintf(buffer, "ldr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x1c: /* IDT-specific opcodes: mad/madu/mul on R4640/4650, msub on RC32364 */
+ case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
+ case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x08: sprintf(buffer, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x09: sprintf(buffer, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x0a: sprintf(buffer, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x0b: sprintf(buffer, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
+ case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
+ case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
+ case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (UINT16)op); break;
+ case 0x10: flags = dasm_cop0(pc, op, buffer); break;
+ case 0x11: flags = dasm_cop1(pc, op, buffer); break;
+ case 0x12: flags = dasm_cop2(pc, op, buffer); break;
+ case 0x13: flags = dasm_cop1x(pc, op, buffer); break;
+ case 0x14: sprintf(buffer, "beql %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
+ case 0x15: sprintf(buffer, "bnel %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
+ case 0x16: sprintf(buffer, "blezl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
+ case 0x17: sprintf(buffer, "bgtzl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
+ case 0x18: sprintf(buffer, "daddi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x19: sprintf(buffer, "daddiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x1a: sprintf(buffer, "ldl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x1b: sprintf(buffer, "ldr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x1c: /* IDT-specific opcodes: mad/madu/mul on R4640/4650, msub on RC32364 */
switch (op & 0x1f)
{
case 0: sprintf(buffer, "mad %s,%s", reg[rs], reg[rt]); break;
case 1: sprintf(buffer, "madu %s,%s", reg[rs], reg[rt]); break;
case 2: sprintf(buffer, "mul %s,%s,%s", reg[rs], reg[rt], reg[rd]); break;
case 4: sprintf(buffer, "msub %s,%s", reg[rs], reg[rt]); break;
- default:sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ default:sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
- case 0x20: sprintf(buffer, "lb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x21: sprintf(buffer, "lh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x22: sprintf(buffer, "lwl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x23: sprintf(buffer, "lw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x24: sprintf(buffer, "lbu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x25: sprintf(buffer, "lhu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x26: sprintf(buffer, "lwr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x27: sprintf(buffer, "lwu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x28: sprintf(buffer, "sb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x29: sprintf(buffer, "sh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2a: sprintf(buffer, "swl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2b: sprintf(buffer, "sw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2c: sprintf(buffer, "sdl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2d: sprintf(buffer, "sdr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2e: sprintf(buffer, "swr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2f: sprintf(buffer, "cache %s(%s)", reg[rs], signed_16bit(op)); break;
- case 0x30: sprintf(buffer, "ll %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x31: sprintf(buffer, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
- case 0x32: sprintf(buffer, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
- case 0x33: sprintf(buffer, "pref $%x,%s(%s)", rt, signed_16bit(op), reg[rs]); break;
- case 0x34: sprintf(buffer, "lld %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x35: sprintf(buffer, "ldc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
- case 0x36: sprintf(buffer, "ldc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
- case 0x37: sprintf(buffer, "ld %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x38: sprintf(buffer, "sc %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x39: sprintf(buffer, "swc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
- case 0x3a: sprintf(buffer, "swc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
- case 0x3c: sprintf(buffer, "scd %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x3d: sprintf(buffer, "sdc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
- case 0x3e: sprintf(buffer, "sdc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
- case 0x3f: sprintf(buffer, "sd %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x20: sprintf(buffer, "lb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x21: sprintf(buffer, "lh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x22: sprintf(buffer, "lwl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x23: sprintf(buffer, "lw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x24: sprintf(buffer, "lbu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x25: sprintf(buffer, "lhu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x26: sprintf(buffer, "lwr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x27: sprintf(buffer, "lwu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x28: sprintf(buffer, "sb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x29: sprintf(buffer, "sh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2a: sprintf(buffer, "swl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2b: sprintf(buffer, "sw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2c: sprintf(buffer, "sdl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2d: sprintf(buffer, "sdr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2e: sprintf(buffer, "swr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2f: sprintf(buffer, "cache %s(%s)", reg[rs], signed_16bit(op)); break;
+ case 0x30: sprintf(buffer, "ll %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x31: sprintf(buffer, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
+ case 0x32: sprintf(buffer, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
+ case 0x33: sprintf(buffer, "pref $%x,%s(%s)", rt, signed_16bit(op), reg[rs]); break;
+ case 0x34: sprintf(buffer, "lld %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x35: sprintf(buffer, "ldc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
+ case 0x36: sprintf(buffer, "ldc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
+ case 0x37: sprintf(buffer, "ld %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x38: sprintf(buffer, "sc %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x39: sprintf(buffer, "swc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
+ case 0x3a: sprintf(buffer, "swc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
+ case 0x3c: sprintf(buffer, "scd %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x3d: sprintf(buffer, "sdc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
+ case 0x3e: sprintf(buffer, "sdc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
+ case 0x3f: sprintf(buffer, "sd %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
return 4 | flags | DASMFLAG_SUPPORTED;
}
@@ -537,5 +537,3 @@ CPU_DISASSEMBLE( mips3le )
op = LITTLE_ENDIANIZE_INT32(op);
return dasmmips3(buffer, pc, op);
}
-
-
diff --git a/src/emu/cpu/mips/mips3fe.c b/src/emu/cpu/mips/mips3fe.c
index 9f2b50a14e7..262534d805b 100644
--- a/src/emu/cpu/mips/mips3fe.c
+++ b/src/emu/cpu/mips/mips3fe.c
@@ -52,7 +52,7 @@
mips3_frontend::mips3_frontend(mips3_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
: drc_frontend(*state.device, window_start, window_end, max_sequence),
- m_context(state)
+ m_context(state)
{
}
@@ -88,46 +88,46 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
opswitch = op >> 26;
switch (opswitch)
{
- case 0x00: // SPECIAL
+ case 0x00: // SPECIAL
return describe_special(op, desc);
- case 0x01: // REGIMM
+ case 0x01: // REGIMM
return describe_regimm(op, desc);
- case 0x10: // COP0
+ case 0x10: // COP0
return describe_cop0(op, desc);
- case 0x11: // COP1
+ case 0x11: // COP1
return describe_cop1(op, desc);
- case 0x12: // COP2
+ case 0x12: // COP2
return describe_cop2(op, desc);
- case 0x13: // COP1X - MIPS IV
+ case 0x13: // COP1X - MIPS IV
if (m_context.flavor < MIPS3_TYPE_MIPS_IV)
return false;
return describe_cop1x(op, desc);
- case 0x1c: // IDT-specific opcodes: mad/madu/mul on R4640/4650, msub on RC32364
+ case 0x1c: // IDT-specific opcodes: mad/madu/mul on R4640/4650, msub on RC32364
return describe_idt(op, desc);
- case 0x02: // J
+ case 0x02: // J
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = (desc.pc & 0xf0000000) | (LIMMVAL << 2);
desc.delayslots = 1;
return true;
- case 0x03: // JAL
+ case 0x03: // JAL
desc.regout[0] |= REGFLAG_R(31);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = (desc.pc & 0xf0000000) | (LIMMVAL << 2);
desc.delayslots = 1;
return true;
- case 0x04: // BEQ
- case 0x05: // BNE
- case 0x14: // BEQL
- case 0x15: // BNEL
+ case 0x04: // BEQ
+ case 0x05: // BNE
+ case 0x14: // BEQL
+ case 0x15: // BNEL
if ((opswitch == 0x04 || opswitch == 0x14) && RSREG == RTREG)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -140,10 +140,10 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.skipslots = (opswitch & 0x10) ? 1 : 0;
return true;
- case 0x06: // BLEZ
- case 0x07: // BGTZ
- case 0x16: // BLEZL
- case 0x17: // BGTZL
+ case 0x06: // BLEZ
+ case 0x07: // BGTZ
+ case 0x16: // BLEZL
+ case 0x17: // BGTZL
if ((opswitch == 0x06 || opswitch == 0x16) && RSREG == 0)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -156,96 +156,96 @@ bool mips3_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.skipslots = (opswitch & 0x10) ? 1 : 0;
return true;
- case 0x08: // ADDI
- case 0x18: // DADDI
+ case 0x08: // ADDI
+ case 0x18: // DADDI
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RTREG);
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x09: // ADDIU
- case 0x0a: // SLTI
- case 0x0b: // SLTIU
- case 0x0c: // ANDI
- case 0x0d: // ORI
- case 0x0e: // XORI
- case 0x19: // DADDIU
+ case 0x09: // ADDIU
+ case 0x0a: // SLTI
+ case 0x0b: // SLTIU
+ case 0x0c: // ANDI
+ case 0x0d: // ORI
+ case 0x0e: // XORI
+ case 0x19: // DADDIU
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x0f: // LUI
+ case 0x0f: // LUI
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x1a: // LDL
- case 0x1b: // LDR
- case 0x22: // LWL
- case 0x26: // LWR
+ case 0x1a: // LDL
+ case 0x1b: // LDR
+ case 0x22: // LWL
+ case 0x26: // LWR
desc.regin[0] |= REGFLAG_R(RTREG);
- case 0x20: // LB
- case 0x21: // LH
- case 0x23: // LW
- case 0x24: // LBU
- case 0x25: // LHU
- case 0x27: // LWU
- case 0x30: // LL
- case 0x34: // LLD
- case 0x37: // LD
+ case 0x20: // LB
+ case 0x21: // LH
+ case 0x23: // LW
+ case 0x24: // LBU
+ case 0x25: // LHU
+ case 0x27: // LWU
+ case 0x30: // LL
+ case 0x34: // LLD
+ case 0x37: // LD
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RTREG);
desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x28: // SB
- case 0x29: // SH
- case 0x2a: // SWL
- case 0x2b: // SW
- case 0x2c: // SDL
- case 0x2d: // SDR
- case 0x2e: // SWR
- case 0x3f: // SD
+ case 0x28: // SB
+ case 0x29: // SH
+ case 0x2a: // SWL
+ case 0x2b: // SW
+ case 0x2c: // SDL
+ case 0x2d: // SDR
+ case 0x2e: // SWR
+ case 0x3f: // SD
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x38: // SC
- case 0x3c: // SCD
+ case 0x38: // SC
+ case 0x3c: // SCD
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[0] |= REGFLAG_R(RTREG);
desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x31: // LWC1
- case 0x35: // LDC1
+ case 0x31: // LWC1
+ case 0x35: // LDC1
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[1] |= REGFLAG_CPR1(RTREG);
desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x39: // SWC1
- case 0x3d: // SDC1
+ case 0x39: // SWC1
+ case 0x3d: // SDC1
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regin[1] |= REGFLAG_CPR1(RTREG);
desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x32: // LWC2
- case 0x36: // LDC2
+ case 0x32: // LWC2
+ case 0x36: // LDC2
desc.regin[0] |= REGFLAG_R(RSREG);
desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x3a: // SWC2
- case 0x3e: // SDC2
+ case 0x3a: // SWC2
+ case 0x3e: // SDC2
desc.regin[0] |= REGFLAG_R(RSREG);
desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x33: // PREF
+ case 0x33: // PREF
if (m_context.flavor < MIPS3_TYPE_MIPS_IV)
return false;
- case 0x2f: // CACHE
+ case 0x2f: // CACHE
// effective no-op
return true;
}
@@ -263,64 +263,64 @@ bool mips3_frontend::describe_special(UINT32 op, opcode_desc &desc)
{
switch (op & 63)
{
- case 0x00: // SLL
- case 0x02: // SRL
- case 0x03: // SRA
- case 0x38: // DSLL
- case 0x3a: // DSRL
- case 0x3b: // DSRA
- case 0x3c: // DSLL32
- case 0x3e: // DSRL32
- case 0x3f: // DSRA32
+ case 0x00: // SLL
+ case 0x02: // SRL
+ case 0x03: // SRA
+ case 0x38: // DSLL
+ case 0x3a: // DSRL
+ case 0x3b: // DSRA
+ case 0x3c: // DSLL32
+ case 0x3e: // DSRL32
+ case 0x3f: // DSRA32
desc.regin[0] |= REGFLAG_R(RTREG);
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x0a: // MOVZ - MIPS IV
- case 0x0b: // MOVN - MIPS IV
+ case 0x0a: // MOVZ - MIPS IV
+ case 0x0b: // MOVN - MIPS IV
if (m_context.flavor < MIPS3_TYPE_MIPS_IV)
return false;
desc.regin[0] |= REGFLAG_R(RDREG);
- case 0x04: // SLLV
- case 0x06: // SRLV
- case 0x07: // SRAV
- case 0x14: // DSLLV
- case 0x16: // DSRLV
- case 0x17: // DSRAV
- case 0x21: // ADDU
- case 0x23: // SUBU
- case 0x24: // AND
- case 0x25: // OR
- case 0x26: // XOR
- case 0x27: // NOR
- case 0x2a: // SLT
- case 0x2b: // SLTU
- case 0x2d: // DADDU
- case 0x2f: // DSUBU
+ case 0x04: // SLLV
+ case 0x06: // SRLV
+ case 0x07: // SRAV
+ case 0x14: // DSLLV
+ case 0x16: // DSRLV
+ case 0x17: // DSRAV
+ case 0x21: // ADDU
+ case 0x23: // SUBU
+ case 0x24: // AND
+ case 0x25: // OR
+ case 0x26: // XOR
+ case 0x27: // NOR
+ case 0x2a: // SLT
+ case 0x2b: // SLTU
+ case 0x2d: // DADDU
+ case 0x2f: // DSUBU
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x20: // ADD
- case 0x22: // SUB
- case 0x2c: // DADD
- case 0x2e: // DSUB
+ case 0x20: // ADD
+ case 0x22: // SUB
+ case 0x2c: // DADD
+ case 0x2e: // DSUB
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[0] |= REGFLAG_R(RDREG);
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x30: // TGE
- case 0x31: // TGEU
- case 0x32: // TLT
- case 0x33: // TLTU
- case 0x34: // TEQ
- case 0x36: // TNE
+ case 0x30: // TGE
+ case 0x31: // TGEU
+ case 0x32: // TLT
+ case 0x33: // TLTU
+ case 0x34: // TEQ
+ case 0x36: // TNE
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x01: // MOVF - MIPS IV
+ case 0x01: // MOVF - MIPS IV
if (m_context.flavor < MIPS3_TYPE_MIPS_IV)
return false;
desc.regin[0] |= REGFLAG_R(RSREG);
@@ -328,14 +328,14 @@ bool mips3_frontend::describe_special(UINT32 op, opcode_desc &desc)
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x08: // JR
+ case 0x08: // JR
desc.regin[0] |= REGFLAG_R(RSREG);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.delayslots = 1;
return true;
- case 0x09: // JALR
+ case 0x09: // JALR
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RDREG);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
@@ -343,60 +343,60 @@ bool mips3_frontend::describe_special(UINT32 op, opcode_desc &desc)
desc.delayslots = 1;
return true;
- case 0x10: // MFHI
+ case 0x10: // MFHI
desc.regin[0] |= REGFLAG_HI;
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x11: // MTHI
+ case 0x11: // MTHI
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_HI;
return true;
- case 0x12: // MFLO
+ case 0x12: // MFLO
desc.regin[2] |= REGFLAG_LO;
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x13: // MTLO
+ case 0x13: // MTLO
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[2] |= REGFLAG_LO;
return true;
- case 0x18: // MULT
- case 0x19: // MULTU
+ case 0x18: // MULT
+ case 0x19: // MULTU
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[2] |= REGFLAG_LO | REGFLAG_HI;
desc.cycles = 3;
return true;
- case 0x1a: // DIV
- case 0x1b: // DIVU
+ case 0x1a: // DIV
+ case 0x1b: // DIVU
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[2] |= REGFLAG_LO | REGFLAG_HI;
desc.cycles = 35;
return true;
- case 0x1c: // DMULT
- case 0x1d: // DMULTU
+ case 0x1c: // DMULT
+ case 0x1d: // DMULTU
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[2] |= REGFLAG_LO | REGFLAG_HI;
desc.cycles = 7;
return true;
- case 0x1e: // DDIV
- case 0x1f: // DDIVU
+ case 0x1e: // DDIV
+ case 0x1f: // DDIVU
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[2] |= REGFLAG_LO | REGFLAG_HI;
desc.cycles = 67;
return true;
- case 0x0c: // SYSCALL
- case 0x0d: // BREAK
+ case 0x0c: // SYSCALL
+ case 0x0d: // BREAK
desc.flags |= OPFLAG_WILL_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE;
return true;
- case 0x0f: // SYNC
+ case 0x0f: // SYNC
// effective no-op
return true;
}
@@ -414,10 +414,10 @@ bool mips3_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
{
switch (RTREG)
{
- case 0x00: // BLTZ
- case 0x01: // BGEZ
- case 0x02: // BLTZL
- case 0x03: // BGEZL
+ case 0x00: // BLTZ
+ case 0x01: // BGEZ
+ case 0x02: // BLTZL
+ case 0x03: // BGEZL
if (RTREG == 0x01 && RSREG == 0)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -430,20 +430,20 @@ bool mips3_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
desc.skipslots = (RTREG & 0x02) ? 1 : 0;
return true;
- case 0x08: // TGEI
- case 0x09: // TGEIU
- case 0x0a: // TLTI
- case 0x0b: // TLTIU
- case 0x0c: // TEQI
- case 0x0e: // TNEI
+ case 0x08: // TGEI
+ case 0x09: // TGEIU
+ case 0x0a: // TLTI
+ case 0x0b: // TLTIU
+ case 0x0c: // TEQI
+ case 0x0e: // TNEI
desc.regin[0] |= REGFLAG_R(RSREG);
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x10: // BLTZAL
- case 0x11: // BGEZAL
- case 0x12: // BLTZALL
- case 0x13: // BGEZALL
+ case 0x10: // BLTZAL
+ case 0x11: // BGEZAL
+ case 0x12: // BLTZALL
+ case 0x13: // BGEZALL
if (RTREG == 0x11 && RSREG == 0)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -505,8 +505,8 @@ bool mips3_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
switch (RSREG)
{
- case 0x00: // MFCz
- case 0x01: // DMFCz
+ case 0x00: // MFCz
+ case 0x01: // DMFCz
if (RDREG == COP0_Count)
desc.cycles += MIPS3_COUNT_READ_CYCLES;
if (RDREG == COP0_Cause)
@@ -514,13 +514,13 @@ bool mips3_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x02: // CFCz
+ case 0x02: // CFCz
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x04: // MTCz
- case 0x05: // DMTCz
- case 0x06: // CTCz
+ case 0x04: // MTCz
+ case 0x05: // DMTCz
+ case 0x06: // CTCz
desc.regin[0] |= REGFLAG_R(RTREG);
if (RSREG == 0x04 || RSREG == 0x05)
{
@@ -531,11 +531,11 @@ bool mips3_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
}
return true;
- case 0x08: // BC
+ case 0x08: // BC
switch (RTREG)
{
- case 0x00: // BCzF
- case 0x01: // BCzT
+ case 0x00: // BCzF
+ case 0x01: // BCzT
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + 4 + (SIMMVAL << 2);
desc.delayslots = 1;
@@ -543,21 +543,21 @@ bool mips3_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
}
return false;
- case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // COP
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // COP
switch (op & 0x01ffffff)
{
- case 0x01: // TLBR
- case 0x08: // TLBP
- case 0x20: // WAIT
+ case 0x01: // TLBR
+ case 0x08: // TLBP
+ case 0x20: // WAIT
return true;
- case 0x02: // TLBWI
- case 0x06: // TLBWR
+ case 0x02: // TLBWI
+ case 0x06: // TLBWR
desc.flags |= OPFLAG_MODIFIES_TRANSLATION;
return true;
- case 0x18: // ERET
+ case 0x18: // ERET
desc.flags |= OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
return true;
}
@@ -580,33 +580,33 @@ bool mips3_frontend::describe_cop1(UINT32 op, opcode_desc &desc)
switch (RSREG)
{
- case 0x00: // MFCz
- case 0x01: // DMFCz
+ case 0x00: // MFCz
+ case 0x01: // DMFCz
desc.regin[1] |= REGFLAG_CPR1(RDREG);
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x02: // CFCz
+ case 0x02: // CFCz
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x04: // MTCz
- case 0x05: // DMTCz
+ case 0x04: // MTCz
+ case 0x05: // DMTCz
desc.regin[0] |= REGFLAG_R(RTREG);
desc.regout[1] |= REGFLAG_CPR1(RDREG);
return true;
- case 0x06: // CTCz
+ case 0x06: // CTCz
desc.regin[0] |= REGFLAG_R(RTREG);
return true;
- case 0x08: // BC
+ case 0x08: // BC
switch (RTREG & 3)
{
- case 0x00: // BCzF
- case 0x01: // BCzT
- case 0x02: // BCzFL
- case 0x03: // BCzTL
+ case 0x00: // BCzF
+ case 0x01: // BCzT
+ case 0x02: // BCzFL
+ case 0x03: // BCzTL
desc.regin[2] |= REGFLAG_FCC;
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + 4 + (SIMMVAL << 2);
@@ -616,47 +616,47 @@ bool mips3_frontend::describe_cop1(UINT32 op, opcode_desc &desc)
}
return false;
- case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // COP
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // COP
switch (op & 0x3f)
{
- case 0x12: // MOVZ - MIPS IV
- case 0x13: // MOVN - MIPS IV
+ case 0x12: // MOVZ - MIPS IV
+ case 0x13: // MOVN - MIPS IV
if (m_context.flavor < MIPS3_TYPE_MIPS_IV)
return false;
- case 0x00: // ADD
- case 0x01: // SUB
- case 0x02: // MUL
- case 0x03: // DIV
+ case 0x00: // ADD
+ case 0x01: // SUB
+ case 0x02: // MUL
+ case 0x03: // DIV
desc.regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG);
desc.regout[1] |= REGFLAG_CPR1(FDREG);
return true;
- case 0x15: // RECIP - MIPS IV
- case 0x16: // RSQRT - MIPS IV
+ case 0x15: // RECIP - MIPS IV
+ case 0x16: // RSQRT - MIPS IV
if (m_context.flavor < MIPS3_TYPE_MIPS_IV)
return false;
- case 0x04: // SQRT
- case 0x05: // ABS
- case 0x06: // MOV
- case 0x07: // NEG
- case 0x08: // ROUND.L
- case 0x09: // TRUNC.L
- case 0x0a: // CEIL.L
- case 0x0b: // FLOOR.L
- case 0x0c: // ROUND.W
- case 0x0d: // TRUNC.W
- case 0x0e: // CEIL.W
- case 0x0f: // FLOOR.W
- case 0x20: // CVT.S
- case 0x21: // CVT.D
- case 0x24: // CVT.W
- case 0x25: // CVT.L
+ case 0x04: // SQRT
+ case 0x05: // ABS
+ case 0x06: // MOV
+ case 0x07: // NEG
+ case 0x08: // ROUND.L
+ case 0x09: // TRUNC.L
+ case 0x0a: // CEIL.L
+ case 0x0b: // FLOOR.L
+ case 0x0c: // ROUND.W
+ case 0x0d: // TRUNC.W
+ case 0x0e: // CEIL.W
+ case 0x0f: // FLOOR.W
+ case 0x20: // CVT.S
+ case 0x21: // CVT.D
+ case 0x24: // CVT.W
+ case 0x25: // CVT.L
desc.regin[1] |= REGFLAG_CPR1(FSREG);
desc.regout[1] |= REGFLAG_CPR1(FDREG);
return true;
- case 0x11: // MOVT/F - MIPS IV
+ case 0x11: // MOVT/F - MIPS IV
if (m_context.flavor < MIPS3_TYPE_MIPS_IV)
return false;
desc.regin[1] |= REGFLAG_CPR1(FSREG);
@@ -664,17 +664,17 @@ bool mips3_frontend::describe_cop1(UINT32 op, opcode_desc &desc)
desc.regout[1] |= REGFLAG_CPR1(FDREG);
return true;
- case 0x30: case 0x38: // C.F
- case 0x31: case 0x39: // C.UN
+ case 0x30: case 0x38: // C.F
+ case 0x31: case 0x39: // C.UN
desc.regout[2] |= REGFLAG_FCC;
return true;
- case 0x32: case 0x3a: // C.EQ
- case 0x33: case 0x3b: // C.UEQ
- case 0x34: case 0x3c: // C.OLT
- case 0x35: case 0x3d: // C.ULT
- case 0x36: case 0x3e: // C.OLE
- case 0x37: case 0x3f: // C.ULE
+ case 0x32: case 0x3a: // C.EQ
+ case 0x33: case 0x3b: // C.UEQ
+ case 0x34: case 0x3c: // C.OLT
+ case 0x35: case 0x3d: // C.ULT
+ case 0x36: case 0x3e: // C.OLE
+ case 0x37: case 0x3f: // C.ULE
desc.regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG);
desc.regout[2] |= REGFLAG_FCC;
return true;
@@ -698,28 +698,28 @@ bool mips3_frontend::describe_cop1x(UINT32 op, opcode_desc &desc)
switch (op & 0x3f)
{
- case 0x00: // LWXC1
- case 0x01: // LDXC1
+ case 0x00: // LWXC1
+ case 0x01: // LDXC1
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[1] |= REGFLAG_CPR1(FDREG);
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x08: // SWXC1
- case 0x09: // SDXC1
+ case 0x08: // SWXC1
+ case 0x09: // SDXC1
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regin[1] |= REGFLAG_CPR1(FDREG);
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x0f: // PREFX
+ case 0x0f: // PREFX
// effective no-op
return true;
- case 0x20: case 0x21: // MADD
- case 0x28: case 0x29: // MSUB
- case 0x30: case 0x31: // NMADD
- case 0x38: case 0x39: // NMSUB
+ case 0x20: case 0x21: // MADD
+ case 0x28: case 0x29: // MSUB
+ case 0x30: case 0x31: // NMADD
+ case 0x38: case 0x39: // NMSUB
desc.regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG) | REGFLAG_CPR1(FRREG);
desc.regout[1] |= REGFLAG_CPR1(FDREG);
return true;
@@ -741,23 +741,23 @@ bool mips3_frontend::describe_cop2(UINT32 op, opcode_desc &desc)
switch (RSREG)
{
- case 0x00: // MFCz
- case 0x01: // DMFCz
- case 0x02: // CFCz
+ case 0x00: // MFCz
+ case 0x01: // DMFCz
+ case 0x02: // CFCz
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x04: // MTCz
- case 0x05: // DMTCz
- case 0x06: // CTCz
+ case 0x04: // MTCz
+ case 0x05: // DMTCz
+ case 0x06: // CTCz
desc.regin[0] |= REGFLAG_R(RTREG);
return true;
- case 0x08: // BC
+ case 0x08: // BC
switch (RTREG)
{
- case 0x00: // BCzF
- case 0x01: // BCzT
+ case 0x00: // BCzF
+ case 0x01: // BCzT
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.targetpc = desc.pc + 4 + (SIMMVAL << 2);
desc.delayslots = 1;
diff --git a/src/emu/cpu/mips/mips3fe.h b/src/emu/cpu/mips/mips3fe.h
index aefcc676795..e927a39344c 100644
--- a/src/emu/cpu/mips/mips3fe.h
+++ b/src/emu/cpu/mips/mips3fe.h
@@ -51,15 +51,15 @@
//**************************************************************************
// register flags 0
-#define REGFLAG_R(n) (((n) == 0) ? 0 : (1 << (n)))
+#define REGFLAG_R(n) (((n) == 0) ? 0 : (1 << (n)))
// register flags 1
-#define REGFLAG_CPR1(n) (1 << (n))
+#define REGFLAG_CPR1(n) (1 << (n))
// register flags 2
-#define REGFLAG_LO (1 << 0)
-#define REGFLAG_HI (1 << 1)
-#define REGFLAG_FCC (1 << 2)
+#define REGFLAG_LO (1 << 0)
+#define REGFLAG_HI (1 << 1)
+#define REGFLAG_FCC (1 << 2)
diff --git a/src/emu/cpu/mips/r3000.c b/src/emu/cpu/mips/r3000.c
index ead2f6ead04..c0f8caf8cf8 100644
--- a/src/emu/cpu/mips/r3000.c
+++ b/src/emu/cpu/mips/r3000.c
@@ -13,64 +13,64 @@
CPU_DISASSEMBLE( r3000be );
CPU_DISASSEMBLE( r3000le );
-#define ENABLE_OVERFLOWS 0
+#define ENABLE_OVERFLOWS 0
/***************************************************************************
CONSTANTS
***************************************************************************/
-#define COP0_Index 0
-#define COP0_Random 1
-#define COP0_EntryLo 2
-#define COP0_Context 4
-#define COP0_BadVAddr 8
-#define COP0_Status 12
-#define COP0_Cause 13
-#define COP0_EPC 14
-#define COP0_PRId 15
-
-#define SR_IEc 0x00000001
-#define SR_KUc 0x00000002
-#define SR_IEp 0x00000004
-#define SR_KUp 0x00000008
-#define SR_IEo 0x00000010
-#define SR_KUo 0x00000020
-#define SR_IMSW0 0x00000100
-#define SR_IMSW1 0x00000200
-#define SR_IMEX0 0x00000400
-#define SR_IMEX1 0x00000800
-#define SR_IMEX2 0x00001000
-#define SR_IMEX3 0x00002000
-#define SR_IMEX4 0x00004000
-#define SR_IMEX5 0x00008000
-#define SR_IsC 0x00010000
-#define SR_SwC 0x00020000
-#define SR_PZ 0x00040000
-#define SR_CM 0x00080000
-#define SR_PE 0x00100000
-#define SR_TS 0x00200000
-#define SR_BEV 0x00400000
-#define SR_RE 0x02000000
-#define SR_COP0 0x10000000
-#define SR_COP1 0x20000000
-#define SR_COP2 0x40000000
-#define SR_COP3 0x80000000
-
-#define EXCEPTION_INTERRUPT 0
-#define EXCEPTION_TLBMOD 1
-#define EXCEPTION_TLBLOAD 2
-#define EXCEPTION_TLBSTORE 3
-#define EXCEPTION_ADDRLOAD 4
-#define EXCEPTION_ADDRSTORE 5
-#define EXCEPTION_BUSINST 6
-#define EXCEPTION_BUSDATA 7
-#define EXCEPTION_SYSCALL 8
-#define EXCEPTION_BREAK 9
-#define EXCEPTION_INVALIDOP 10
-#define EXCEPTION_BADCOP 11
-#define EXCEPTION_OVERFLOW 12
-#define EXCEPTION_TRAP 13
+#define COP0_Index 0
+#define COP0_Random 1
+#define COP0_EntryLo 2
+#define COP0_Context 4
+#define COP0_BadVAddr 8
+#define COP0_Status 12
+#define COP0_Cause 13
+#define COP0_EPC 14
+#define COP0_PRId 15
+
+#define SR_IEc 0x00000001
+#define SR_KUc 0x00000002
+#define SR_IEp 0x00000004
+#define SR_KUp 0x00000008
+#define SR_IEo 0x00000010
+#define SR_KUo 0x00000020
+#define SR_IMSW0 0x00000100
+#define SR_IMSW1 0x00000200
+#define SR_IMEX0 0x00000400
+#define SR_IMEX1 0x00000800
+#define SR_IMEX2 0x00001000
+#define SR_IMEX3 0x00002000
+#define SR_IMEX4 0x00004000
+#define SR_IMEX5 0x00008000
+#define SR_IsC 0x00010000
+#define SR_SwC 0x00020000
+#define SR_PZ 0x00040000
+#define SR_CM 0x00080000
+#define SR_PE 0x00100000
+#define SR_TS 0x00200000
+#define SR_BEV 0x00400000
+#define SR_RE 0x02000000
+#define SR_COP0 0x10000000
+#define SR_COP1 0x20000000
+#define SR_COP2 0x40000000
+#define SR_COP3 0x80000000
+
+#define EXCEPTION_INTERRUPT 0
+#define EXCEPTION_TLBMOD 1
+#define EXCEPTION_TLBLOAD 2
+#define EXCEPTION_TLBSTORE 3
+#define EXCEPTION_ADDRLOAD 4
+#define EXCEPTION_ADDRSTORE 5
+#define EXCEPTION_BUSINST 6
+#define EXCEPTION_BUSDATA 7
+#define EXCEPTION_SYSCALL 8
+#define EXCEPTION_BREAK 9
+#define EXCEPTION_INVALIDOP 10
+#define EXCEPTION_BADCOP 11
+#define EXCEPTION_OVERFLOW 12
+#define EXCEPTION_TRAP 13
@@ -78,36 +78,36 @@ CPU_DISASSEMBLE( r3000le );
HELPER MACROS
***************************************************************************/
-#define RSREG ((op >> 21) & 31)
-#define RTREG ((op >> 16) & 31)
-#define RDREG ((op >> 11) & 31)
-#define SHIFT ((op >> 6) & 31)
+#define RSREG ((op >> 21) & 31)
+#define RTREG ((op >> 16) & 31)
+#define RDREG ((op >> 11) & 31)
+#define SHIFT ((op >> 6) & 31)
-#define RSVAL r[RSREG]
-#define RTVAL r[RTREG]
-#define RDVAL r[RDREG]
+#define RSVAL r[RSREG]
+#define RTVAL r[RTREG]
+#define RDVAL r[RDREG]
-#define SIMMVAL ((INT16)op)
-#define UIMMVAL ((UINT16)op)
-#define LIMMVAL (op & 0x03ffffff)
+#define SIMMVAL ((INT16)op)
+#define UIMMVAL ((UINT16)op)
+#define LIMMVAL (op & 0x03ffffff)
-#define ADDPC(R,x) do { (R)->nextpc = (R)->pc + ((x) << 2); } while (0)
-#define ADDPCL(R,x,l) do { (R)->nextpc = (R)->pc + ((x) << 2); (R)->r[l] = (R)->pc + 4; } while (0)
-#define ABSPC(R,x) do { (R)->nextpc = ((R)->pc & 0xf0000000) | ((x) << 2); } while (0)
-#define ABSPCL(R,x,l) do { (R)->nextpc = ((R)->pc & 0xf0000000) | ((x) << 2); (R)->r[l] = (R)->pc + 4; } while (0)
-#define SETPC(R,x) do { (R)->nextpc = (x); } while (0)
-#define SETPCL(R,x,l) do { (R)->nextpc = (x); (R)->r[l] = (R)->pc + 4; } while (0)
+#define ADDPC(R,x) do { (R)->nextpc = (R)->pc + ((x) << 2); } while (0)
+#define ADDPCL(R,x,l) do { (R)->nextpc = (R)->pc + ((x) << 2); (R)->r[l] = (R)->pc + 4; } while (0)
+#define ABSPC(R,x) do { (R)->nextpc = ((R)->pc & 0xf0000000) | ((x) << 2); } while (0)
+#define ABSPCL(R,x,l) do { (R)->nextpc = ((R)->pc & 0xf0000000) | ((x) << 2); (R)->r[l] = (R)->pc + 4; } while (0)
+#define SETPC(R,x) do { (R)->nextpc = (x); } while (0)
+#define SETPCL(R,x,l) do { (R)->nextpc = (x); (R)->r[l] = (R)->pc + 4; } while (0)
-#define RBYTE(R,x) (*(R)->cur.read_byte)(*(R)->program, x)
-#define RWORD(R,x) (*(R)->cur.read_word)(*(R)->program, x)
-#define RLONG(R,x) (*(R)->cur.read_dword)(*(R)->program, x)
+#define RBYTE(R,x) (*(R)->cur.read_byte)(*(R)->program, x)
+#define RWORD(R,x) (*(R)->cur.read_word)(*(R)->program, x)
+#define RLONG(R,x) (*(R)->cur.read_dword)(*(R)->program, x)
-#define WBYTE(R,x,v) (*(R)->cur.write_byte)(*(R)->program, x, v)
-#define WWORD(R,x,v) (*(R)->cur.write_word)(*(R)->program, x, v)
-#define WLONG(R,x,v) (*(R)->cur.write_dword)(*(R)->program, x, v)
+#define WBYTE(R,x,v) (*(R)->cur.write_byte)(*(R)->program, x, v)
+#define WWORD(R,x,v) (*(R)->cur.write_word)(*(R)->program, x, v)
+#define WLONG(R,x,v) (*(R)->cur.write_dword)(*(R)->program, x, v)
-#define SR cpr[0][COP0_Status]
-#define CAUSE cpr[0][COP0_Cause]
+#define SR cpr[0][COP0_Status]
+#define CAUSE cpr[0][COP0_Cause]
@@ -119,56 +119,56 @@ CPU_DISASSEMBLE( r3000le );
struct r3000_state
{
/* core registers */
- UINT32 pc;
- UINT32 hi;
- UINT32 lo;
- UINT32 r[32];
+ UINT32 pc;
+ UINT32 hi;
+ UINT32 lo;
+ UINT32 r[32];
/* COP registers */
- UINT32 cpr[4][32];
- UINT32 ccr[4][32];
- UINT8 cf[4];
+ UINT32 cpr[4][32];
+ UINT32 ccr[4][32];
+ UINT8 cf[4];
/* internal stuff */
- UINT32 ppc;
- UINT32 nextpc;
- int op;
- int icount;
- int interrupt_cycles;
- int hasfpu;
+ UINT32 ppc;
+ UINT32 nextpc;
+ int op;
+ int icount;
+ int interrupt_cycles;
+ int hasfpu;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
/* endian-dependent load/store */
- void (*lwl)(r3000_state *r3000, UINT32 op);
- void (*lwr)(r3000_state *r3000, UINT32 op);
- void (*swl)(r3000_state *r3000, UINT32 op);
- void (*swr)(r3000_state *r3000, UINT32 op);
+ void (*lwl)(r3000_state *r3000, UINT32 op);
+ void (*lwr)(r3000_state *r3000, UINT32 op);
+ void (*swl)(r3000_state *r3000, UINT32 op);
+ void (*swr)(r3000_state *r3000, UINT32 op);
/* memory accesses */
- UINT8 bigendian;
+ UINT8 bigendian;
data_accessors cur;
data_accessors memory_hand;
const data_accessors *cache_hand;
/* cache memory */
- UINT32 * cache;
- UINT32 * icache;
- UINT32 * dcache;
- size_t cache_size;
- size_t icache_size;
- size_t dcache_size;
+ UINT32 * cache;
+ UINT32 * icache;
+ UINT32 * dcache;
+ size_t cache_size;
+ size_t icache_size;
+ size_t dcache_size;
};
INLINE r3000_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == R3000BE ||
- device->type() == R3000LE ||
- device->type() == R3041BE ||
- device->type() == R3041LE);
+ device->type() == R3000LE ||
+ device->type() == R3041BE ||
+ device->type() == R3041LE);
return (r3000_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -225,7 +225,7 @@ static const data_accessors le_cache =
MEMORY ACCESSORS
***************************************************************************/
-#define ROPCODE(R,pc) (R)->direct->read_decrypted_dword(pc)
+#define ROPCODE(R,pc) (R)->direct->read_decrypted_dword(pc)
@@ -433,18 +433,18 @@ INLINE void handle_cop0(r3000_state *r3000, UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop0_reg(r3000, RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop0_creg(r3000, RDREG); break;
- case 0x04: /* MTCz */ set_cop0_reg(r3000, RDREG, r3000->RTVAL); break;
- case 0x06: /* CTCz */ set_cop0_creg(r3000, RDREG, r3000->RTVAL); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop0_reg(r3000, RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop0_creg(r3000, RDREG); break;
+ case 0x04: /* MTCz */ set_cop0_reg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x06: /* CTCz */ set_cop0_creg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!r3000->cf[0]) ADDPC(r3000, SIMMVAL); break;
- case 0x01: /* BCzF */ if (r3000->cf[0]) ADDPC(r3000, SIMMVAL); break;
- case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
- case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x00: /* BCzF */ if (!r3000->cf[0]) ADDPC(r3000, SIMMVAL); break;
+ case 0x01: /* BCzF */ if (r3000->cf[0]) ADDPC(r3000, SIMMVAL); break;
+ case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
+ case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
break;
case 0x10:
@@ -462,19 +462,19 @@ INLINE void handle_cop0(r3000_state *r3000, UINT32 op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */
+ case 0x1f: /* COP */
switch (op & 0x01ffffff)
{
- case 0x01: /* TLBR */ break;
- case 0x02: /* TLBWI */ break;
- case 0x06: /* TLBWR */ break;
- case 0x08: /* TLBP */ break;
- case 0x10: /* RFE */ r3000->SR = (r3000->SR & 0xfffffff0) | ((r3000->SR >> 2) & 0x0f); break;
- case 0x18: /* ERET */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x01: /* TLBR */ break;
+ case 0x02: /* TLBWI */ break;
+ case 0x06: /* TLBWR */ break;
+ case 0x08: /* TLBP */ break;
+ case 0x10: /* RFE */ r3000->SR = (r3000->SR & 0xfffffff0) | ((r3000->SR >> 2) & 0x0f); break;
+ case 0x18: /* ERET */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
break;
- default: invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
}
@@ -513,18 +513,18 @@ INLINE void handle_cop1(r3000_state *r3000, UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop1_reg(r3000, RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop1_creg(r3000, RDREG); break;
- case 0x04: /* MTCz */ set_cop1_reg(r3000, RDREG, r3000->RTVAL); break;
- case 0x06: /* CTCz */ set_cop1_creg(r3000, RDREG, r3000->RTVAL); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop1_reg(r3000, RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop1_creg(r3000, RDREG); break;
+ case 0x04: /* MTCz */ set_cop1_reg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x06: /* CTCz */ set_cop1_creg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!r3000->cf[1]) ADDPC(r3000, SIMMVAL); break;
- case 0x01: /* BCzF */ if (r3000->cf[1]) ADDPC(r3000, SIMMVAL); break;
- case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
- case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x00: /* BCzF */ if (!r3000->cf[1]) ADDPC(r3000, SIMMVAL); break;
+ case 0x01: /* BCzF */ if (r3000->cf[1]) ADDPC(r3000, SIMMVAL); break;
+ case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
+ case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
break;
case 0x10:
@@ -542,8 +542,8 @@ INLINE void handle_cop1(r3000_state *r3000, UINT32 op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x1f: /* COP */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
}
@@ -580,18 +580,18 @@ INLINE void handle_cop2(r3000_state *r3000, UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop2_reg(r3000, RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop2_creg(r3000, RDREG); break;
- case 0x04: /* MTCz */ set_cop2_reg(r3000, RDREG, r3000->RTVAL); break;
- case 0x06: /* CTCz */ set_cop2_creg(r3000, RDREG, r3000->RTVAL); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop2_reg(r3000, RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop2_creg(r3000, RDREG); break;
+ case 0x04: /* MTCz */ set_cop2_reg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x06: /* CTCz */ set_cop2_creg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!r3000->cf[2]) ADDPC(r3000, SIMMVAL); break;
- case 0x01: /* BCzF */ if (r3000->cf[2]) ADDPC(r3000, SIMMVAL); break;
- case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
- case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x00: /* BCzF */ if (!r3000->cf[2]) ADDPC(r3000, SIMMVAL); break;
+ case 0x01: /* BCzF */ if (r3000->cf[2]) ADDPC(r3000, SIMMVAL); break;
+ case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
+ case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
break;
case 0x10:
@@ -609,8 +609,8 @@ INLINE void handle_cop2(r3000_state *r3000, UINT32 op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x1f: /* COP */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
}
@@ -647,18 +647,18 @@ INLINE void handle_cop3(r3000_state *r3000, UINT32 op)
switch (RSREG)
{
- case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop3_reg(r3000, RDREG); break;
- case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop3_creg(r3000, RDREG); break;
- case 0x04: /* MTCz */ set_cop3_reg(r3000, RDREG, r3000->RTVAL); break;
- case 0x06: /* CTCz */ set_cop3_creg(r3000, RDREG, r3000->RTVAL); break;
- case 0x08: /* BC */
+ case 0x00: /* MFCz */ if (RTREG) r3000->RTVAL = get_cop3_reg(r3000, RDREG); break;
+ case 0x02: /* CFCz */ if (RTREG) r3000->RTVAL = get_cop3_creg(r3000, RDREG); break;
+ case 0x04: /* MTCz */ set_cop3_reg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x06: /* CTCz */ set_cop3_creg(r3000, RDREG, r3000->RTVAL); break;
+ case 0x08: /* BC */
switch (RTREG)
{
- case 0x00: /* BCzF */ if (!r3000->cf[3]) ADDPC(r3000, SIMMVAL); break;
- case 0x01: /* BCzF */ if (r3000->cf[3]) ADDPC(r3000, SIMMVAL); break;
- case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
- case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x00: /* BCzF */ if (!r3000->cf[3]) ADDPC(r3000, SIMMVAL); break;
+ case 0x01: /* BCzF */ if (r3000->cf[3]) ADDPC(r3000, SIMMVAL); break;
+ case 0x02: /* BCzFL */ invalid_instruction(r3000, op); break;
+ case 0x03: /* BCzTL */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
break;
case 0x10:
@@ -676,8 +676,8 @@ INLINE void handle_cop3(r3000_state *r3000, UINT32 op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */ invalid_instruction(r3000, op); break;
- default: invalid_instruction(r3000, op); break;
+ case 0x1f: /* COP */ invalid_instruction(r3000, op); break;
+ default: invalid_instruction(r3000, op); break;
}
}
@@ -724,37 +724,37 @@ static CPU_EXECUTE( r3000 )
/* parse the instruction */
switch (op >> 26)
{
- case 0x00: /* SPECIAL */
+ case 0x00: /* SPECIAL */
switch (op & 63)
{
- case 0x00: /* SLL */ if (RDREG) r3000->RDVAL = r3000->RTVAL << SHIFT; break;
- case 0x02: /* SRL */ if (RDREG) r3000->RDVAL = r3000->RTVAL >> SHIFT; break;
- case 0x03: /* SRA */ if (RDREG) r3000->RDVAL = (INT32)r3000->RTVAL >> SHIFT; break;
- case 0x04: /* SLLV */ if (RDREG) r3000->RDVAL = r3000->RTVAL << (r3000->RSVAL & 31); break;
- case 0x06: /* SRLV */ if (RDREG) r3000->RDVAL = r3000->RTVAL >> (r3000->RSVAL & 31); break;
- case 0x07: /* SRAV */ if (RDREG) r3000->RDVAL = (INT32)r3000->RTVAL >> (r3000->RSVAL & 31); break;
- case 0x08: /* JR */ SETPC(r3000, r3000->RSVAL); break;
- case 0x09: /* JALR */ SETPCL(r3000, r3000->RSVAL, RDREG); break;
- case 0x0c: /* SYSCALL */ generate_exception(r3000, EXCEPTION_SYSCALL); break;
- case 0x0d: /* BREAK */ generate_exception(r3000, EXCEPTION_BREAK); break;
- case 0x0f: /* SYNC */ invalid_instruction(r3000, op); break;
- case 0x10: /* MFHI */ if (RDREG) r3000->RDVAL = r3000->hi; break;
- case 0x11: /* MTHI */ r3000->hi = r3000->RSVAL; break;
- case 0x12: /* MFLO */ if (RDREG) r3000->RDVAL = r3000->lo; break;
- case 0x13: /* MTLO */ r3000->lo = r3000->RSVAL; break;
- case 0x18: /* MULT */
+ case 0x00: /* SLL */ if (RDREG) r3000->RDVAL = r3000->RTVAL << SHIFT; break;
+ case 0x02: /* SRL */ if (RDREG) r3000->RDVAL = r3000->RTVAL >> SHIFT; break;
+ case 0x03: /* SRA */ if (RDREG) r3000->RDVAL = (INT32)r3000->RTVAL >> SHIFT; break;
+ case 0x04: /* SLLV */ if (RDREG) r3000->RDVAL = r3000->RTVAL << (r3000->RSVAL & 31); break;
+ case 0x06: /* SRLV */ if (RDREG) r3000->RDVAL = r3000->RTVAL >> (r3000->RSVAL & 31); break;
+ case 0x07: /* SRAV */ if (RDREG) r3000->RDVAL = (INT32)r3000->RTVAL >> (r3000->RSVAL & 31); break;
+ case 0x08: /* JR */ SETPC(r3000, r3000->RSVAL); break;
+ case 0x09: /* JALR */ SETPCL(r3000, r3000->RSVAL, RDREG); break;
+ case 0x0c: /* SYSCALL */ generate_exception(r3000, EXCEPTION_SYSCALL); break;
+ case 0x0d: /* BREAK */ generate_exception(r3000, EXCEPTION_BREAK); break;
+ case 0x0f: /* SYNC */ invalid_instruction(r3000, op); break;
+ case 0x10: /* MFHI */ if (RDREG) r3000->RDVAL = r3000->hi; break;
+ case 0x11: /* MTHI */ r3000->hi = r3000->RSVAL; break;
+ case 0x12: /* MFLO */ if (RDREG) r3000->RDVAL = r3000->lo; break;
+ case 0x13: /* MTLO */ r3000->lo = r3000->RSVAL; break;
+ case 0x18: /* MULT */
temp64 = (INT64)(INT32)r3000->RSVAL * (INT64)(INT32)r3000->RTVAL;
r3000->lo = (UINT32)temp64;
r3000->hi = (UINT32)(temp64 >> 32);
r3000->icount -= 11;
break;
- case 0x19: /* MULTU */
+ case 0x19: /* MULTU */
temp64 = (UINT64)r3000->RSVAL * (UINT64)r3000->RTVAL;
r3000->lo = (UINT32)temp64;
r3000->hi = (UINT32)(temp64 >> 32);
r3000->icount -= 11;
break;
- case 0x1a: /* DIV */
+ case 0x1a: /* DIV */
if (r3000->RTVAL)
{
r3000->lo = (INT32)r3000->RSVAL / (INT32)r3000->RTVAL;
@@ -762,7 +762,7 @@ static CPU_EXECUTE( r3000 )
}
r3000->icount -= 34;
break;
- case 0x1b: /* DIVU */
+ case 0x1b: /* DIVU */
if (r3000->RTVAL)
{
r3000->lo = r3000->RSVAL / r3000->RTVAL;
@@ -770,108 +770,108 @@ static CPU_EXECUTE( r3000 )
}
r3000->icount -= 34;
break;
- case 0x20: /* ADD */
+ case 0x20: /* ADD */
if (ENABLE_OVERFLOWS && r3000->RSVAL > ~r3000->RTVAL) generate_exception(r3000, EXCEPTION_OVERFLOW);
else r3000->RDVAL = r3000->RSVAL + r3000->RTVAL;
break;
- case 0x21: /* ADDU */ if (RDREG) r3000->RDVAL = r3000->RSVAL + r3000->RTVAL; break;
- case 0x22: /* SUB */
+ case 0x21: /* ADDU */ if (RDREG) r3000->RDVAL = r3000->RSVAL + r3000->RTVAL; break;
+ case 0x22: /* SUB */
if (ENABLE_OVERFLOWS && r3000->RSVAL < r3000->RTVAL) generate_exception(r3000, EXCEPTION_OVERFLOW);
else r3000->RDVAL = r3000->RSVAL - r3000->RTVAL;
break;
- case 0x23: /* SUBU */ if (RDREG) r3000->RDVAL = r3000->RSVAL - r3000->RTVAL; break;
- case 0x24: /* AND */ if (RDREG) r3000->RDVAL = r3000->RSVAL & r3000->RTVAL; break;
- case 0x25: /* OR */ if (RDREG) r3000->RDVAL = r3000->RSVAL | r3000->RTVAL; break;
- case 0x26: /* XOR */ if (RDREG) r3000->RDVAL = r3000->RSVAL ^ r3000->RTVAL; break;
- case 0x27: /* NOR */ if (RDREG) r3000->RDVAL = ~(r3000->RSVAL | r3000->RTVAL); break;
- case 0x2a: /* SLT */ if (RDREG) r3000->RDVAL = (INT32)r3000->RSVAL < (INT32)r3000->RTVAL; break;
- case 0x2b: /* SLTU */ if (RDREG) r3000->RDVAL = (UINT32)r3000->RSVAL < (UINT32)r3000->RTVAL; break;
- case 0x30: /* TEQ */ invalid_instruction(r3000, op); break;
- case 0x31: /* TGEU */ invalid_instruction(r3000, op); break;
- case 0x32: /* TLT */ invalid_instruction(r3000, op); break;
- case 0x33: /* TLTU */ invalid_instruction(r3000, op); break;
- case 0x34: /* TGE */ invalid_instruction(r3000, op); break;
- case 0x36: /* TNE */ invalid_instruction(r3000, op); break;
- default: /* ??? */ invalid_instruction(r3000, op); break;
+ case 0x23: /* SUBU */ if (RDREG) r3000->RDVAL = r3000->RSVAL - r3000->RTVAL; break;
+ case 0x24: /* AND */ if (RDREG) r3000->RDVAL = r3000->RSVAL & r3000->RTVAL; break;
+ case 0x25: /* OR */ if (RDREG) r3000->RDVAL = r3000->RSVAL | r3000->RTVAL; break;
+ case 0x26: /* XOR */ if (RDREG) r3000->RDVAL = r3000->RSVAL ^ r3000->RTVAL; break;
+ case 0x27: /* NOR */ if (RDREG) r3000->RDVAL = ~(r3000->RSVAL | r3000->RTVAL); break;
+ case 0x2a: /* SLT */ if (RDREG) r3000->RDVAL = (INT32)r3000->RSVAL < (INT32)r3000->RTVAL; break;
+ case 0x2b: /* SLTU */ if (RDREG) r3000->RDVAL = (UINT32)r3000->RSVAL < (UINT32)r3000->RTVAL; break;
+ case 0x30: /* TEQ */ invalid_instruction(r3000, op); break;
+ case 0x31: /* TGEU */ invalid_instruction(r3000, op); break;
+ case 0x32: /* TLT */ invalid_instruction(r3000, op); break;
+ case 0x33: /* TLTU */ invalid_instruction(r3000, op); break;
+ case 0x34: /* TGE */ invalid_instruction(r3000, op); break;
+ case 0x36: /* TNE */ invalid_instruction(r3000, op); break;
+ default: /* ??? */ invalid_instruction(r3000, op); break;
}
break;
- case 0x01: /* REGIMM */
+ case 0x01: /* REGIMM */
switch (RTREG)
{
- case 0x00: /* BLTZ */ if ((INT32)r3000->RSVAL < 0) ADDPC(r3000, SIMMVAL); break;
- case 0x01: /* BGEZ */ if ((INT32)r3000->RSVAL >= 0) ADDPC(r3000, SIMMVAL); break;
- case 0x02: /* BLTZL */ invalid_instruction(r3000, op); break;
- case 0x03: /* BGEZL */ invalid_instruction(r3000, op); break;
- case 0x08: /* TGEI */ invalid_instruction(r3000, op); break;
- case 0x09: /* TGEIU */ invalid_instruction(r3000, op); break;
- case 0x0a: /* TLTI */ invalid_instruction(r3000, op); break;
- case 0x0b: /* TLTIU */ invalid_instruction(r3000, op); break;
- case 0x0c: /* TEQI */ invalid_instruction(r3000, op); break;
- case 0x0e: /* TNEI */ invalid_instruction(r3000, op); break;
- case 0x10: /* BLTZAL */ if ((INT32)r3000->RSVAL < 0) ADDPCL(r3000,SIMMVAL,31); break;
- case 0x11: /* BGEZAL */ if ((INT32)r3000->RSVAL >= 0) ADDPCL(r3000,SIMMVAL,31); break;
- case 0x12: /* BLTZALL */ invalid_instruction(r3000, op); break;
- case 0x13: /* BGEZALL */ invalid_instruction(r3000, op); break;
- default: /* ??? */ invalid_instruction(r3000, op); break;
+ case 0x00: /* BLTZ */ if ((INT32)r3000->RSVAL < 0) ADDPC(r3000, SIMMVAL); break;
+ case 0x01: /* BGEZ */ if ((INT32)r3000->RSVAL >= 0) ADDPC(r3000, SIMMVAL); break;
+ case 0x02: /* BLTZL */ invalid_instruction(r3000, op); break;
+ case 0x03: /* BGEZL */ invalid_instruction(r3000, op); break;
+ case 0x08: /* TGEI */ invalid_instruction(r3000, op); break;
+ case 0x09: /* TGEIU */ invalid_instruction(r3000, op); break;
+ case 0x0a: /* TLTI */ invalid_instruction(r3000, op); break;
+ case 0x0b: /* TLTIU */ invalid_instruction(r3000, op); break;
+ case 0x0c: /* TEQI */ invalid_instruction(r3000, op); break;
+ case 0x0e: /* TNEI */ invalid_instruction(r3000, op); break;
+ case 0x10: /* BLTZAL */ if ((INT32)r3000->RSVAL < 0) ADDPCL(r3000,SIMMVAL,31); break;
+ case 0x11: /* BGEZAL */ if ((INT32)r3000->RSVAL >= 0) ADDPCL(r3000,SIMMVAL,31); break;
+ case 0x12: /* BLTZALL */ invalid_instruction(r3000, op); break;
+ case 0x13: /* BGEZALL */ invalid_instruction(r3000, op); break;
+ default: /* ??? */ invalid_instruction(r3000, op); break;
}
break;
- case 0x02: /* J */ ABSPC(r3000, LIMMVAL); break;
- case 0x03: /* JAL */ ABSPCL(r3000, LIMMVAL,31); break;
- case 0x04: /* BEQ */ if (r3000->RSVAL == r3000->RTVAL) ADDPC(r3000, SIMMVAL); break;
- case 0x05: /* BNE */ if (r3000->RSVAL != r3000->RTVAL) ADDPC(r3000, SIMMVAL); break;
- case 0x06: /* BLEZ */ if ((INT32)r3000->RSVAL <= 0) ADDPC(r3000, SIMMVAL); break;
- case 0x07: /* BGTZ */ if ((INT32)r3000->RSVAL > 0) ADDPC(r3000, SIMMVAL); break;
- case 0x08: /* ADDI */
+ case 0x02: /* J */ ABSPC(r3000, LIMMVAL); break;
+ case 0x03: /* JAL */ ABSPCL(r3000, LIMMVAL,31); break;
+ case 0x04: /* BEQ */ if (r3000->RSVAL == r3000->RTVAL) ADDPC(r3000, SIMMVAL); break;
+ case 0x05: /* BNE */ if (r3000->RSVAL != r3000->RTVAL) ADDPC(r3000, SIMMVAL); break;
+ case 0x06: /* BLEZ */ if ((INT32)r3000->RSVAL <= 0) ADDPC(r3000, SIMMVAL); break;
+ case 0x07: /* BGTZ */ if ((INT32)r3000->RSVAL > 0) ADDPC(r3000, SIMMVAL); break;
+ case 0x08: /* ADDI */
if (ENABLE_OVERFLOWS && r3000->RSVAL > ~SIMMVAL) generate_exception(r3000, EXCEPTION_OVERFLOW);
else if (RTREG) r3000->RTVAL = r3000->RSVAL + SIMMVAL;
break;
- case 0x09: /* ADDIU */ if (RTREG) r3000->RTVAL = r3000->RSVAL + SIMMVAL; break;
- case 0x0a: /* SLTI */ if (RTREG) r3000->RTVAL = (INT32)r3000->RSVAL < (INT32)SIMMVAL; break;
- case 0x0b: /* SLTIU */ if (RTREG) r3000->RTVAL = (UINT32)r3000->RSVAL < (UINT32)SIMMVAL; break;
- case 0x0c: /* ANDI */ if (RTREG) r3000->RTVAL = r3000->RSVAL & UIMMVAL; break;
- case 0x0d: /* ORI */ if (RTREG) r3000->RTVAL = r3000->RSVAL | UIMMVAL; break;
- case 0x0e: /* XORI */ if (RTREG) r3000->RTVAL = r3000->RSVAL ^ UIMMVAL; break;
- case 0x0f: /* LUI */ if (RTREG) r3000->RTVAL = UIMMVAL << 16; break;
- case 0x10: /* COP0 */ handle_cop0(r3000, op); break;
- case 0x11: /* COP1 */ handle_cop1(r3000, op); break;
- case 0x12: /* COP2 */ handle_cop2(r3000, op); break;
- case 0x13: /* COP3 */ handle_cop3(r3000, op); break;
- case 0x14: /* BEQL */ invalid_instruction(r3000, op); break;
- case 0x15: /* BNEL */ invalid_instruction(r3000, op); break;
- case 0x16: /* BLEZL */ invalid_instruction(r3000, op); break;
- case 0x17: /* BGTZL */ invalid_instruction(r3000, op); break;
- case 0x20: /* LB */ temp = RBYTE(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (INT8)temp; break;
- case 0x21: /* LH */ temp = RWORD(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (INT16)temp; break;
- case 0x22: /* LWL */ (*r3000->lwl)(r3000, op); break;
- case 0x23: /* LW */ temp = RLONG(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = temp; break;
- case 0x24: /* LBU */ temp = RBYTE(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (UINT8)temp; break;
- case 0x25: /* LHU */ temp = RWORD(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (UINT16)temp; break;
- case 0x26: /* LWR */ (*r3000->lwr)(r3000, op); break;
- case 0x28: /* SB */ WBYTE(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break;
- case 0x29: /* SH */ WWORD(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break;
- case 0x2a: /* SWL */ (*r3000->swl)(r3000, op); break;
- case 0x2b: /* SW */ WLONG(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break;
- case 0x2e: /* SWR */ (*r3000->swr)(r3000, op); break;
- case 0x2f: /* CACHE */ invalid_instruction(r3000, op); break;
- case 0x30: /* LL */ invalid_instruction(r3000, op); break;
- case 0x31: /* LWC1 */ set_cop1_reg(r3000, RTREG, RLONG(r3000, SIMMVAL+r3000->RSVAL)); break;
- case 0x32: /* LWC2 */ set_cop2_reg(r3000, RTREG, RLONG(r3000, SIMMVAL+r3000->RSVAL)); break;
- case 0x33: /* LWC3 */ set_cop3_reg(r3000, RTREG, RLONG(r3000, SIMMVAL+r3000->RSVAL)); break;
- case 0x34: /* LDC0 */ invalid_instruction(r3000, op); break;
- case 0x35: /* LDC1 */ invalid_instruction(r3000, op); break;
- case 0x36: /* LDC2 */ invalid_instruction(r3000, op); break;
- case 0x37: /* LDC3 */ invalid_instruction(r3000, op); break;
- case 0x38: /* SC */ invalid_instruction(r3000, op); break;
- case 0x39: /* LWC1 */ WLONG(r3000, SIMMVAL+r3000->RSVAL, get_cop1_reg(r3000, RTREG)); break;
- case 0x3a: /* LWC2 */ WLONG(r3000, SIMMVAL+r3000->RSVAL, get_cop2_reg(r3000, RTREG)); break;
- case 0x3b: /* LWC3 */ WLONG(r3000, SIMMVAL+r3000->RSVAL, get_cop3_reg(r3000, RTREG)); break;
- case 0x3c: /* SDC0 */ invalid_instruction(r3000, op); break;
- case 0x3d: /* SDC1 */ invalid_instruction(r3000, op); break;
- case 0x3e: /* SDC2 */ invalid_instruction(r3000, op); break;
- case 0x3f: /* SDC3 */ invalid_instruction(r3000, op); break;
- default: /* ??? */ invalid_instruction(r3000, op); break;
+ case 0x09: /* ADDIU */ if (RTREG) r3000->RTVAL = r3000->RSVAL + SIMMVAL; break;
+ case 0x0a: /* SLTI */ if (RTREG) r3000->RTVAL = (INT32)r3000->RSVAL < (INT32)SIMMVAL; break;
+ case 0x0b: /* SLTIU */ if (RTREG) r3000->RTVAL = (UINT32)r3000->RSVAL < (UINT32)SIMMVAL; break;
+ case 0x0c: /* ANDI */ if (RTREG) r3000->RTVAL = r3000->RSVAL & UIMMVAL; break;
+ case 0x0d: /* ORI */ if (RTREG) r3000->RTVAL = r3000->RSVAL | UIMMVAL; break;
+ case 0x0e: /* XORI */ if (RTREG) r3000->RTVAL = r3000->RSVAL ^ UIMMVAL; break;
+ case 0x0f: /* LUI */ if (RTREG) r3000->RTVAL = UIMMVAL << 16; break;
+ case 0x10: /* COP0 */ handle_cop0(r3000, op); break;
+ case 0x11: /* COP1 */ handle_cop1(r3000, op); break;
+ case 0x12: /* COP2 */ handle_cop2(r3000, op); break;
+ case 0x13: /* COP3 */ handle_cop3(r3000, op); break;
+ case 0x14: /* BEQL */ invalid_instruction(r3000, op); break;
+ case 0x15: /* BNEL */ invalid_instruction(r3000, op); break;
+ case 0x16: /* BLEZL */ invalid_instruction(r3000, op); break;
+ case 0x17: /* BGTZL */ invalid_instruction(r3000, op); break;
+ case 0x20: /* LB */ temp = RBYTE(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (INT8)temp; break;
+ case 0x21: /* LH */ temp = RWORD(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (INT16)temp; break;
+ case 0x22: /* LWL */ (*r3000->lwl)(r3000, op); break;
+ case 0x23: /* LW */ temp = RLONG(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = temp; break;
+ case 0x24: /* LBU */ temp = RBYTE(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (UINT8)temp; break;
+ case 0x25: /* LHU */ temp = RWORD(r3000, SIMMVAL+r3000->RSVAL); if (RTREG) r3000->RTVAL = (UINT16)temp; break;
+ case 0x26: /* LWR */ (*r3000->lwr)(r3000, op); break;
+ case 0x28: /* SB */ WBYTE(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break;
+ case 0x29: /* SH */ WWORD(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break;
+ case 0x2a: /* SWL */ (*r3000->swl)(r3000, op); break;
+ case 0x2b: /* SW */ WLONG(r3000, SIMMVAL+r3000->RSVAL, r3000->RTVAL); break;
+ case 0x2e: /* SWR */ (*r3000->swr)(r3000, op); break;
+ case 0x2f: /* CACHE */ invalid_instruction(r3000, op); break;
+ case 0x30: /* LL */ invalid_instruction(r3000, op); break;
+ case 0x31: /* LWC1 */ set_cop1_reg(r3000, RTREG, RLONG(r3000, SIMMVAL+r3000->RSVAL)); break;
+ case 0x32: /* LWC2 */ set_cop2_reg(r3000, RTREG, RLONG(r3000, SIMMVAL+r3000->RSVAL)); break;
+ case 0x33: /* LWC3 */ set_cop3_reg(r3000, RTREG, RLONG(r3000, SIMMVAL+r3000->RSVAL)); break;
+ case 0x34: /* LDC0 */ invalid_instruction(r3000, op); break;
+ case 0x35: /* LDC1 */ invalid_instruction(r3000, op); break;
+ case 0x36: /* LDC2 */ invalid_instruction(r3000, op); break;
+ case 0x37: /* LDC3 */ invalid_instruction(r3000, op); break;
+ case 0x38: /* SC */ invalid_instruction(r3000, op); break;
+ case 0x39: /* LWC1 */ WLONG(r3000, SIMMVAL+r3000->RSVAL, get_cop1_reg(r3000, RTREG)); break;
+ case 0x3a: /* LWC2 */ WLONG(r3000, SIMMVAL+r3000->RSVAL, get_cop2_reg(r3000, RTREG)); break;
+ case 0x3b: /* LWC3 */ WLONG(r3000, SIMMVAL+r3000->RSVAL, get_cop3_reg(r3000, RTREG)); break;
+ case 0x3c: /* SDC0 */ invalid_instruction(r3000, op); break;
+ case 0x3d: /* SDC1 */ invalid_instruction(r3000, op); break;
+ case 0x3e: /* SDC2 */ invalid_instruction(r3000, op); break;
+ case 0x3f: /* SDC3 */ invalid_instruction(r3000, op); break;
+ default: /* ??? */ invalid_instruction(r3000, op); break;
}
r3000->icount--;
@@ -1105,50 +1105,50 @@ static CPU_SET_INFO( r3000 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ0: set_irq_line(r3000, R3000_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ1: set_irq_line(r3000, R3000_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ2: set_irq_line(r3000, R3000_IRQ2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ3: set_irq_line(r3000, R3000_IRQ3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ4: set_irq_line(r3000, R3000_IRQ4, info->i); break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ5: set_irq_line(r3000, R3000_IRQ5, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ0: set_irq_line(r3000, R3000_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ1: set_irq_line(r3000, R3000_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ2: set_irq_line(r3000, R3000_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ3: set_irq_line(r3000, R3000_IRQ3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ4: set_irq_line(r3000, R3000_IRQ4, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ5: set_irq_line(r3000, R3000_IRQ5, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + R3000_PC: r3000->pc = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_SR: r3000->SR = info->i; break;
-
- case CPUINFO_INT_REGISTER + R3000_R0: r3000->r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R1: r3000->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R2: r3000->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R3: r3000->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R4: r3000->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R5: r3000->r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R6: r3000->r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R7: r3000->r[7] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R8: r3000->r[8] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R9: r3000->r[9] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R10: r3000->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R11: r3000->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R12: r3000->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R13: r3000->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R14: r3000->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R15: r3000->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R16: r3000->r[16] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R17: r3000->r[17] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R18: r3000->r[18] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R19: r3000->r[19] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R20: r3000->r[20] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R21: r3000->r[21] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R22: r3000->r[22] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R23: r3000->r[23] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R24: r3000->r[24] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R25: r3000->r[25] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R26: r3000->r[26] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R27: r3000->r[27] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R28: r3000->r[28] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R29: r3000->r[29] = info->i; break;
- case CPUINFO_INT_REGISTER + R3000_R30: r3000->r[30] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_PC: r3000->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_SR: r3000->SR = info->i; break;
+
+ case CPUINFO_INT_REGISTER + R3000_R0: r3000->r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R1: r3000->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R2: r3000->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R3: r3000->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R4: r3000->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R5: r3000->r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R6: r3000->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R7: r3000->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R8: r3000->r[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R9: r3000->r[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R10: r3000->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R11: r3000->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R12: r3000->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R13: r3000->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R14: r3000->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R15: r3000->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R16: r3000->r[16] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R17: r3000->r[17] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R18: r3000->r[18] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R19: r3000->r[19] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R20: r3000->r[20] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R21: r3000->r[21] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R22: r3000->r[22] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R23: r3000->r[23] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R24: r3000->r[24] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R25: r3000->r[25] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R26: r3000->r[26] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R27: r3000->r[27] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R28: r3000->r[28] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R29: r3000->r[29] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R30: r3000->r[30] = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + R3000_R31: r3000->r[31] = info->i; break;
+ case CPUINFO_INT_REGISTER + R3000_R31: r3000->r[31] = info->i; break;
}
}
@@ -1164,128 +1164,128 @@ static CPU_GET_INFO( r3000 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(r3000_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 29; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ0: info->i = (r3000->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ1: info->i = (r3000->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ2: info->i = (r3000->cpr[0][COP0_Cause] & 0x1000) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ3: info->i = (r3000->cpr[0][COP0_Cause] & 0x2000) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ4: info->i = (r3000->cpr[0][COP0_Cause] & 0x4000) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + R3000_IRQ5: info->i = (r3000->cpr[0][COP0_Cause] & 0x8000) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = r3000->ppc; break;
-
- case CPUINFO_INT_PC: info->i = r3000->pc & 0x1fffffff; break;
- case CPUINFO_INT_REGISTER + R3000_PC: info->i = r3000->pc; break;
- case CPUINFO_INT_REGISTER + R3000_SR: info->i = r3000->SR; break;
-
- case CPUINFO_INT_REGISTER + R3000_R0: info->i = r3000->r[0]; break;
- case CPUINFO_INT_REGISTER + R3000_R1: info->i = r3000->r[1]; break;
- case CPUINFO_INT_REGISTER + R3000_R2: info->i = r3000->r[2]; break;
- case CPUINFO_INT_REGISTER + R3000_R3: info->i = r3000->r[3]; break;
- case CPUINFO_INT_REGISTER + R3000_R4: info->i = r3000->r[4]; break;
- case CPUINFO_INT_REGISTER + R3000_R5: info->i = r3000->r[5]; break;
- case CPUINFO_INT_REGISTER + R3000_R6: info->i = r3000->r[6]; break;
- case CPUINFO_INT_REGISTER + R3000_R7: info->i = r3000->r[7]; break;
- case CPUINFO_INT_REGISTER + R3000_R8: info->i = r3000->r[8]; break;
- case CPUINFO_INT_REGISTER + R3000_R9: info->i = r3000->r[9]; break;
- case CPUINFO_INT_REGISTER + R3000_R10: info->i = r3000->r[10]; break;
- case CPUINFO_INT_REGISTER + R3000_R11: info->i = r3000->r[11]; break;
- case CPUINFO_INT_REGISTER + R3000_R12: info->i = r3000->r[12]; break;
- case CPUINFO_INT_REGISTER + R3000_R13: info->i = r3000->r[13]; break;
- case CPUINFO_INT_REGISTER + R3000_R14: info->i = r3000->r[14]; break;
- case CPUINFO_INT_REGISTER + R3000_R15: info->i = r3000->r[15]; break;
- case CPUINFO_INT_REGISTER + R3000_R16: info->i = r3000->r[16]; break;
- case CPUINFO_INT_REGISTER + R3000_R17: info->i = r3000->r[17]; break;
- case CPUINFO_INT_REGISTER + R3000_R18: info->i = r3000->r[18]; break;
- case CPUINFO_INT_REGISTER + R3000_R19: info->i = r3000->r[19]; break;
- case CPUINFO_INT_REGISTER + R3000_R20: info->i = r3000->r[20]; break;
- case CPUINFO_INT_REGISTER + R3000_R21: info->i = r3000->r[21]; break;
- case CPUINFO_INT_REGISTER + R3000_R22: info->i = r3000->r[22]; break;
- case CPUINFO_INT_REGISTER + R3000_R23: info->i = r3000->r[23]; break;
- case CPUINFO_INT_REGISTER + R3000_R24: info->i = r3000->r[24]; break;
- case CPUINFO_INT_REGISTER + R3000_R25: info->i = r3000->r[25]; break;
- case CPUINFO_INT_REGISTER + R3000_R26: info->i = r3000->r[26]; break;
- case CPUINFO_INT_REGISTER + R3000_R27: info->i = r3000->r[27]; break;
- case CPUINFO_INT_REGISTER + R3000_R28: info->i = r3000->r[28]; break;
- case CPUINFO_INT_REGISTER + R3000_R29: info->i = r3000->r[29]; break;
- case CPUINFO_INT_REGISTER + R3000_R30: info->i = r3000->r[30]; break;
- case CPUINFO_INT_SP: info->i = r3000->r[31] & 0x1fffffff; break;
- case CPUINFO_INT_REGISTER + R3000_R31: info->i = r3000->r[31]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(r3000_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 29; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ0: info->i = (r3000->cpr[0][COP0_Cause] & 0x400) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ1: info->i = (r3000->cpr[0][COP0_Cause] & 0x800) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ2: info->i = (r3000->cpr[0][COP0_Cause] & 0x1000) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ3: info->i = (r3000->cpr[0][COP0_Cause] & 0x2000) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ4: info->i = (r3000->cpr[0][COP0_Cause] & 0x4000) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + R3000_IRQ5: info->i = (r3000->cpr[0][COP0_Cause] & 0x8000) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = r3000->ppc; break;
+
+ case CPUINFO_INT_PC: info->i = r3000->pc & 0x1fffffff; break;
+ case CPUINFO_INT_REGISTER + R3000_PC: info->i = r3000->pc; break;
+ case CPUINFO_INT_REGISTER + R3000_SR: info->i = r3000->SR; break;
+
+ case CPUINFO_INT_REGISTER + R3000_R0: info->i = r3000->r[0]; break;
+ case CPUINFO_INT_REGISTER + R3000_R1: info->i = r3000->r[1]; break;
+ case CPUINFO_INT_REGISTER + R3000_R2: info->i = r3000->r[2]; break;
+ case CPUINFO_INT_REGISTER + R3000_R3: info->i = r3000->r[3]; break;
+ case CPUINFO_INT_REGISTER + R3000_R4: info->i = r3000->r[4]; break;
+ case CPUINFO_INT_REGISTER + R3000_R5: info->i = r3000->r[5]; break;
+ case CPUINFO_INT_REGISTER + R3000_R6: info->i = r3000->r[6]; break;
+ case CPUINFO_INT_REGISTER + R3000_R7: info->i = r3000->r[7]; break;
+ case CPUINFO_INT_REGISTER + R3000_R8: info->i = r3000->r[8]; break;
+ case CPUINFO_INT_REGISTER + R3000_R9: info->i = r3000->r[9]; break;
+ case CPUINFO_INT_REGISTER + R3000_R10: info->i = r3000->r[10]; break;
+ case CPUINFO_INT_REGISTER + R3000_R11: info->i = r3000->r[11]; break;
+ case CPUINFO_INT_REGISTER + R3000_R12: info->i = r3000->r[12]; break;
+ case CPUINFO_INT_REGISTER + R3000_R13: info->i = r3000->r[13]; break;
+ case CPUINFO_INT_REGISTER + R3000_R14: info->i = r3000->r[14]; break;
+ case CPUINFO_INT_REGISTER + R3000_R15: info->i = r3000->r[15]; break;
+ case CPUINFO_INT_REGISTER + R3000_R16: info->i = r3000->r[16]; break;
+ case CPUINFO_INT_REGISTER + R3000_R17: info->i = r3000->r[17]; break;
+ case CPUINFO_INT_REGISTER + R3000_R18: info->i = r3000->r[18]; break;
+ case CPUINFO_INT_REGISTER + R3000_R19: info->i = r3000->r[19]; break;
+ case CPUINFO_INT_REGISTER + R3000_R20: info->i = r3000->r[20]; break;
+ case CPUINFO_INT_REGISTER + R3000_R21: info->i = r3000->r[21]; break;
+ case CPUINFO_INT_REGISTER + R3000_R22: info->i = r3000->r[22]; break;
+ case CPUINFO_INT_REGISTER + R3000_R23: info->i = r3000->r[23]; break;
+ case CPUINFO_INT_REGISTER + R3000_R24: info->i = r3000->r[24]; break;
+ case CPUINFO_INT_REGISTER + R3000_R25: info->i = r3000->r[25]; break;
+ case CPUINFO_INT_REGISTER + R3000_R26: info->i = r3000->r[26]; break;
+ case CPUINFO_INT_REGISTER + R3000_R27: info->i = r3000->r[27]; break;
+ case CPUINFO_INT_REGISTER + R3000_R28: info->i = r3000->r[28]; break;
+ case CPUINFO_INT_REGISTER + R3000_R29: info->i = r3000->r[29]; break;
+ case CPUINFO_INT_REGISTER + R3000_R30: info->i = r3000->r[30]; break;
+ case CPUINFO_INT_SP: info->i = r3000->r[31] & 0x1fffffff; break;
+ case CPUINFO_INT_REGISTER + R3000_R31: info->i = r3000->r[31]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(r3000); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r3000); break;
- case CPUINFO_FCT_RESET: /* provided per-CPU */ break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(r3000); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(r3000); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: /* provided per-CPU */ break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &r3000->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(r3000); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(r3000); break;
+ case CPUINFO_FCT_RESET: /* provided per-CPU */ break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(r3000); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(r3000); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: /* provided per-CPU */ break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &r3000->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R3000"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "MIPS II"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + R3000_PC: sprintf(info->s, "PC: %08X", r3000->pc); break;
- case CPUINFO_STR_REGISTER + R3000_SR: sprintf(info->s, "SR: %08X", r3000->SR); break;
-
- case CPUINFO_STR_REGISTER + R3000_R0: sprintf(info->s, "R0: %08X", r3000->r[0]); break;
- case CPUINFO_STR_REGISTER + R3000_R1: sprintf(info->s, "R1: %08X", r3000->r[1]); break;
- case CPUINFO_STR_REGISTER + R3000_R2: sprintf(info->s, "R2: %08X", r3000->r[2]); break;
- case CPUINFO_STR_REGISTER + R3000_R3: sprintf(info->s, "R3: %08X", r3000->r[3]); break;
- case CPUINFO_STR_REGISTER + R3000_R4: sprintf(info->s, "R4: %08X", r3000->r[4]); break;
- case CPUINFO_STR_REGISTER + R3000_R5: sprintf(info->s, "R5: %08X", r3000->r[5]); break;
- case CPUINFO_STR_REGISTER + R3000_R6: sprintf(info->s, "R6: %08X", r3000->r[6]); break;
- case CPUINFO_STR_REGISTER + R3000_R7: sprintf(info->s, "R7: %08X", r3000->r[7]); break;
- case CPUINFO_STR_REGISTER + R3000_R8: sprintf(info->s, "R8: %08X", r3000->r[8]); break;
- case CPUINFO_STR_REGISTER + R3000_R9: sprintf(info->s, "R9: %08X", r3000->r[9]); break;
- case CPUINFO_STR_REGISTER + R3000_R10: sprintf(info->s, "R10:%08X", r3000->r[10]); break;
- case CPUINFO_STR_REGISTER + R3000_R11: sprintf(info->s, "R11:%08X", r3000->r[11]); break;
- case CPUINFO_STR_REGISTER + R3000_R12: sprintf(info->s, "R12:%08X", r3000->r[12]); break;
- case CPUINFO_STR_REGISTER + R3000_R13: sprintf(info->s, "R13:%08X", r3000->r[13]); break;
- case CPUINFO_STR_REGISTER + R3000_R14: sprintf(info->s, "R14:%08X", r3000->r[14]); break;
- case CPUINFO_STR_REGISTER + R3000_R15: sprintf(info->s, "R15:%08X", r3000->r[15]); break;
- case CPUINFO_STR_REGISTER + R3000_R16: sprintf(info->s, "R16:%08X", r3000->r[16]); break;
- case CPUINFO_STR_REGISTER + R3000_R17: sprintf(info->s, "R17:%08X", r3000->r[17]); break;
- case CPUINFO_STR_REGISTER + R3000_R18: sprintf(info->s, "R18:%08X", r3000->r[18]); break;
- case CPUINFO_STR_REGISTER + R3000_R19: sprintf(info->s, "R19:%08X", r3000->r[19]); break;
- case CPUINFO_STR_REGISTER + R3000_R20: sprintf(info->s, "R20:%08X", r3000->r[20]); break;
- case CPUINFO_STR_REGISTER + R3000_R21: sprintf(info->s, "R21:%08X", r3000->r[21]); break;
- case CPUINFO_STR_REGISTER + R3000_R22: sprintf(info->s, "R22:%08X", r3000->r[22]); break;
- case CPUINFO_STR_REGISTER + R3000_R23: sprintf(info->s, "R23:%08X", r3000->r[23]); break;
- case CPUINFO_STR_REGISTER + R3000_R24: sprintf(info->s, "R24:%08X", r3000->r[24]); break;
- case CPUINFO_STR_REGISTER + R3000_R25: sprintf(info->s, "R25:%08X", r3000->r[25]); break;
- case CPUINFO_STR_REGISTER + R3000_R26: sprintf(info->s, "R26:%08X", r3000->r[26]); break;
- case CPUINFO_STR_REGISTER + R3000_R27: sprintf(info->s, "R27:%08X", r3000->r[27]); break;
- case CPUINFO_STR_REGISTER + R3000_R28: sprintf(info->s, "R28:%08X", r3000->r[28]); break;
- case CPUINFO_STR_REGISTER + R3000_R29: sprintf(info->s, "R29:%08X", r3000->r[29]); break;
- case CPUINFO_STR_REGISTER + R3000_R30: sprintf(info->s, "R30:%08X", r3000->r[30]); break;
- case CPUINFO_STR_REGISTER + R3000_R31: sprintf(info->s, "R31:%08X", r3000->r[31]); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R3000"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "MIPS II"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + R3000_PC: sprintf(info->s, "PC: %08X", r3000->pc); break;
+ case CPUINFO_STR_REGISTER + R3000_SR: sprintf(info->s, "SR: %08X", r3000->SR); break;
+
+ case CPUINFO_STR_REGISTER + R3000_R0: sprintf(info->s, "R0: %08X", r3000->r[0]); break;
+ case CPUINFO_STR_REGISTER + R3000_R1: sprintf(info->s, "R1: %08X", r3000->r[1]); break;
+ case CPUINFO_STR_REGISTER + R3000_R2: sprintf(info->s, "R2: %08X", r3000->r[2]); break;
+ case CPUINFO_STR_REGISTER + R3000_R3: sprintf(info->s, "R3: %08X", r3000->r[3]); break;
+ case CPUINFO_STR_REGISTER + R3000_R4: sprintf(info->s, "R4: %08X", r3000->r[4]); break;
+ case CPUINFO_STR_REGISTER + R3000_R5: sprintf(info->s, "R5: %08X", r3000->r[5]); break;
+ case CPUINFO_STR_REGISTER + R3000_R6: sprintf(info->s, "R6: %08X", r3000->r[6]); break;
+ case CPUINFO_STR_REGISTER + R3000_R7: sprintf(info->s, "R7: %08X", r3000->r[7]); break;
+ case CPUINFO_STR_REGISTER + R3000_R8: sprintf(info->s, "R8: %08X", r3000->r[8]); break;
+ case CPUINFO_STR_REGISTER + R3000_R9: sprintf(info->s, "R9: %08X", r3000->r[9]); break;
+ case CPUINFO_STR_REGISTER + R3000_R10: sprintf(info->s, "R10:%08X", r3000->r[10]); break;
+ case CPUINFO_STR_REGISTER + R3000_R11: sprintf(info->s, "R11:%08X", r3000->r[11]); break;
+ case CPUINFO_STR_REGISTER + R3000_R12: sprintf(info->s, "R12:%08X", r3000->r[12]); break;
+ case CPUINFO_STR_REGISTER + R3000_R13: sprintf(info->s, "R13:%08X", r3000->r[13]); break;
+ case CPUINFO_STR_REGISTER + R3000_R14: sprintf(info->s, "R14:%08X", r3000->r[14]); break;
+ case CPUINFO_STR_REGISTER + R3000_R15: sprintf(info->s, "R15:%08X", r3000->r[15]); break;
+ case CPUINFO_STR_REGISTER + R3000_R16: sprintf(info->s, "R16:%08X", r3000->r[16]); break;
+ case CPUINFO_STR_REGISTER + R3000_R17: sprintf(info->s, "R17:%08X", r3000->r[17]); break;
+ case CPUINFO_STR_REGISTER + R3000_R18: sprintf(info->s, "R18:%08X", r3000->r[18]); break;
+ case CPUINFO_STR_REGISTER + R3000_R19: sprintf(info->s, "R19:%08X", r3000->r[19]); break;
+ case CPUINFO_STR_REGISTER + R3000_R20: sprintf(info->s, "R20:%08X", r3000->r[20]); break;
+ case CPUINFO_STR_REGISTER + R3000_R21: sprintf(info->s, "R21:%08X", r3000->r[21]); break;
+ case CPUINFO_STR_REGISTER + R3000_R22: sprintf(info->s, "R22:%08X", r3000->r[22]); break;
+ case CPUINFO_STR_REGISTER + R3000_R23: sprintf(info->s, "R23:%08X", r3000->r[23]); break;
+ case CPUINFO_STR_REGISTER + R3000_R24: sprintf(info->s, "R24:%08X", r3000->r[24]); break;
+ case CPUINFO_STR_REGISTER + R3000_R25: sprintf(info->s, "R25:%08X", r3000->r[25]); break;
+ case CPUINFO_STR_REGISTER + R3000_R26: sprintf(info->s, "R26:%08X", r3000->r[26]); break;
+ case CPUINFO_STR_REGISTER + R3000_R27: sprintf(info->s, "R27:%08X", r3000->r[27]); break;
+ case CPUINFO_STR_REGISTER + R3000_R28: sprintf(info->s, "R28:%08X", r3000->r[28]); break;
+ case CPUINFO_STR_REGISTER + R3000_R29: sprintf(info->s, "R29:%08X", r3000->r[29]); break;
+ case CPUINFO_STR_REGISTER + R3000_R30: sprintf(info->s, "R30:%08X", r3000->r[30]); break;
+ case CPUINFO_STR_REGISTER + R3000_R31: sprintf(info->s, "R31:%08X", r3000->r[31]); break;
}
}
@@ -1299,16 +1299,16 @@ CPU_GET_INFO( r3000be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000be); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000be); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000be); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (big)"); break;
- default: CPU_GET_INFO_CALL(r3000); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
@@ -1318,16 +1318,16 @@ CPU_GET_INFO( r3000le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000le); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000le); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000le); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R3000 (little)"); break;
- default: CPU_GET_INFO_CALL(r3000); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
@@ -1337,16 +1337,16 @@ CPU_GET_INFO( r3041be )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000be); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000be); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000be); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (big)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (big)"); break;
- default: CPU_GET_INFO_CALL(r3000); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
@@ -1356,16 +1356,16 @@ CPU_GET_INFO( r3041le )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000le); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000le); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(r3000le); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(r3000le); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (little)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "R3041 (little)"); break;
- default: CPU_GET_INFO_CALL(r3000); break;
+ default: CPU_GET_INFO_CALL(r3000); break;
}
}
diff --git a/src/emu/cpu/mips/r3000.h b/src/emu/cpu/mips/r3000.h
index f29ccd98383..6163a2bdb82 100644
--- a/src/emu/cpu/mips/r3000.h
+++ b/src/emu/cpu/mips/r3000.h
@@ -34,12 +34,12 @@ enum
INTERRUPT CONSTANTS
***************************************************************************/
-#define R3000_IRQ0 0 /* IRQ0 */
-#define R3000_IRQ1 1 /* IRQ1 */
-#define R3000_IRQ2 2 /* IRQ2 */
-#define R3000_IRQ3 3 /* IRQ3 */
-#define R3000_IRQ4 4 /* IRQ4 */
-#define R3000_IRQ5 5 /* IRQ5 */
+#define R3000_IRQ0 0 /* IRQ0 */
+#define R3000_IRQ1 1 /* IRQ1 */
+#define R3000_IRQ2 2 /* IRQ2 */
+#define R3000_IRQ3 3 /* IRQ3 */
+#define R3000_IRQ4 4 /* IRQ4 */
+#define R3000_IRQ5 5 /* IRQ5 */
/***************************************************************************
@@ -48,9 +48,9 @@ enum
struct r3000_cpu_core
{
- UINT8 hasfpu; /* 1 if we have an FPU, 0 otherwise */
- size_t icache; /* code cache size */
- size_t dcache; /* data cache size */
+ UINT8 hasfpu; /* 1 if we have an FPU, 0 otherwise */
+ size_t icache; /* code cache size */
+ size_t dcache; /* data cache size */
};
diff --git a/src/emu/cpu/mips/r3kdasm.c b/src/emu/cpu/mips/r3kdasm.c
index 88a96c9fe3e..5b14610692c 100644
--- a/src/emu/cpu/mips/r3kdasm.c
+++ b/src/emu/cpu/mips/r3kdasm.c
@@ -11,36 +11,36 @@
static const char *const reg[32] =
{
- "0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ "0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
};
static const char *const cpreg[4][32] =
{
{
- "Index","Random","EntryLo","cpr3", "Context", "cpr5", "cpr6", "cpr7",
- "BadVAddr", "cpr9", "EntryHi","cpr11","SR","Cause","EPC","PRId",
+ "Index","Random","EntryLo","cpr3", "Context", "cpr5", "cpr6", "cpr7",
+ "BadVAddr", "cpr9", "EntryHi","cpr11","SR","Cause","EPC","PRId",
"cpr16","cpr17","cpr18","cpr19","cpr20","cpr21","cpr22","cpr23",
"cpr24","cpr25","cpr26","cpr27","cpr28","cpr29","cpr30","cpr31"
},
{
- "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
- "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
- "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
- "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
+ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
+ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
+ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
+ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31"
},
{
- "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
- "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
+ "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
+ "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
"cpr16","cpr17","cpr18","cpr19","cpr20","cpr21","cpr22","cpr23",
"cpr24","cpr25","cpr26","cpr27","cpr28","cpr29","cpr30","cpr31"
},
{
- "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
- "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
+ "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
+ "cpr8", "cpr9", "cpr10","cpr11","cpr12","cpr13","cpr14","cpr15",
"cpr16","cpr17","cpr18","cpr19","cpr20","cpr21","cpr22","cpr23",
"cpr24","cpr25","cpr26","cpr27","cpr28","cpr29","cpr30","cpr31"
}
@@ -50,26 +50,26 @@ static const char *const cpreg[4][32] =
static const char *const ccreg[4][32] =
{
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
},
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
},
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
},
{
- "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
- "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
+ "ccr0", "ccr1", "ccr2", "ccr3", "ccr4", "ccr5", "ccr6", "ccr7",
+ "ccr8", "ccr9", "ccr10","ccr11","ccr12","ccr13","ccr14","ccr15",
"ccr16","ccr17","ccr18","ccr19","ccr20","ccr21","ccr22","ccr23",
"ccr24","ccr25","ccr26","ccr27","ccr28","ccr29","ccr30","ccr31"
}
@@ -98,18 +98,18 @@ static UINT32 dasm_cop(UINT32 pc, int cop, UINT32 op, char *buffer)
switch ((op >> 21) & 31)
{
- case 0x00: sprintf(buffer, "mfc%d %s,%s", cop, reg[rt], cpreg[cop][rd]); break;
- case 0x02: sprintf(buffer, "cfc%d %s,%s", cop, reg[rt], ccreg[cop][rd]); break;
- case 0x04: sprintf(buffer, "mtc%d %s,%s", cop, reg[rt], cpreg[cop][rd]); break;
- case 0x06: sprintf(buffer, "ctc%d %s,%s", cop, reg[rt], ccreg[cop][rd]); break;
- case 0x08: /* BC */
+ case 0x00: sprintf(buffer, "mfc%d %s,%s", cop, reg[rt], cpreg[cop][rd]); break;
+ case 0x02: sprintf(buffer, "cfc%d %s,%s", cop, reg[rt], ccreg[cop][rd]); break;
+ case 0x04: sprintf(buffer, "mtc%d %s,%s", cop, reg[rt], cpreg[cop][rd]); break;
+ case 0x06: sprintf(buffer, "ctc%d %s,%s", cop, reg[rt], ccreg[cop][rd]); break;
+ case 0x08: /* BC */
switch (rt)
{
- case 0x00: sprintf(buffer, "bc%df $%08x", cop, pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bc%dt $%08x", cop, pc + 4 + ((INT16)op << 2)); break;
- case 0x02: sprintf(buffer, "bc%dfl [invalid]", cop); break;
- case 0x03: sprintf(buffer, "bc%dtl [invalid]", cop); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x00: sprintf(buffer, "bc%df $%08x", cop, pc + 4 + ((INT16)op << 2)); break;
+ case 0x01: sprintf(buffer, "bc%dt $%08x", cop, pc + 4 + ((INT16)op << 2)); break;
+ case 0x02: sprintf(buffer, "bc%dfl [invalid]", cop); break;
+ case 0x03: sprintf(buffer, "bc%dtl [invalid]", cop); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
case 0x10:
@@ -127,23 +127,23 @@ static UINT32 dasm_cop(UINT32 pc, int cop, UINT32 op, char *buffer)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: /* COP */
+ case 0x1f: /* COP */
if (cop == 0)
{
switch (op & 0x01ffffff)
{
- case 0x01: sprintf(buffer, "tlbr"); break;
- case 0x02: sprintf(buffer, "tlbwi"); break;
- case 0x06: sprintf(buffer, "tlbwr"); break;
- case 0x08: sprintf(buffer, "tlbp"); break;
- case 0x10: sprintf(buffer, "rfe"); break;
- case 0x18: sprintf(buffer, "eret [invalid]"); break;
- default: sprintf(buffer, "cop%d $%07x", cop, op & 0x01ffffff); break;
+ case 0x01: sprintf(buffer, "tlbr"); break;
+ case 0x02: sprintf(buffer, "tlbwi"); break;
+ case 0x06: sprintf(buffer, "tlbwr"); break;
+ case 0x08: sprintf(buffer, "tlbp"); break;
+ case 0x10: sprintf(buffer, "rfe"); break;
+ case 0x18: sprintf(buffer, "eret [invalid]"); break;
+ default: sprintf(buffer, "cop%d $%07x", cop, op & 0x01ffffff); break;
}
}
else
- sprintf(buffer, "cop%d $%07x", cop, op & 0x01ffffff); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ sprintf(buffer, "cop%d $%07x", cop, op & 0x01ffffff); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
return flags;
@@ -166,66 +166,66 @@ static UINT32 dasm_cop1(UINT32 pc, UINT32 op, char *buffer)
switch ((op >> 21) & 31)
{
- case 0x00: sprintf(buffer, "mfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x01: sprintf(buffer, "dmfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x02: sprintf(buffer, "cfc1 %s,%s", reg[rt], ccreg[1][rd]); break;
- case 0x04: sprintf(buffer, "mtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x05: sprintf(buffer, "dmtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
- case 0x06: sprintf(buffer, "ctc1 %s,%s", reg[rt], ccreg[1][rd]); break;
- case 0x08: /* BC */
+ case 0x00: sprintf(buffer, "mfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x01: sprintf(buffer, "dmfc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x02: sprintf(buffer, "cfc1 %s,%s", reg[rt], ccreg[1][rd]); break;
+ case 0x04: sprintf(buffer, "mtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x05: sprintf(buffer, "dmtc1 %s,%s", reg[rt], cpreg[1][rd]); break;
+ case 0x06: sprintf(buffer, "ctc1 %s,%s", reg[rt], ccreg[1][rd]); break;
+ case 0x08: /* BC */
switch (rt & 3)
{
- case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
- case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x00: sprintf(buffer, "bc1f $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
+ case 0x01: sprintf(buffer, "bc1t $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); break;
+ case 0x02: sprintf(buffer, "bc1fl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x03: sprintf(buffer, "bc1tl $%08x,%d", pc + 4 + ((INT16)op << 2), (op >> 18) & 7); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
}
break;
- default: /* COP */
+ default: /* COP */
switch (op & 0x3f)
{
- case 0x00: sprintf(buffer, "add.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x01: sprintf(buffer, "sub.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x02: sprintf(buffer, "mul.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x03: sprintf(buffer, "div.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- case 0x04: sprintf(buffer, "sqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x05: sprintf(buffer, "abs.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x06: sprintf(buffer, "mov.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x07: sprintf(buffer, "neg.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x08: sprintf(buffer, "round.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x09: sprintf(buffer, "trunc.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0a: sprintf(buffer, "ceil.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0b: sprintf(buffer, "floor.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0c: sprintf(buffer, "round.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0d: sprintf(buffer, "trunc.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0e: sprintf(buffer, "ceil.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x0f: sprintf(buffer, "floor.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x11: sprintf(buffer, "mov%c.%s %s,%s,%d", ((op >> 16) & 1) ? 't' : 'f', fmt, cpreg[1][fd], cpreg[1][fs], (op >> 18) & 7); break;
- case 0x12: sprintf(buffer, "movz.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
- case 0x13: sprintf(buffer, "movn.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
- case 0x15: sprintf(buffer, "recip.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x16: sprintf(buffer, "rsqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x20: sprintf(buffer, "cvt.s.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x21: sprintf(buffer, "cvt.d.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x24: sprintf(buffer, "cvt.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x25: sprintf(buffer, "cvt.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
- case 0x30: sprintf(buffer, "c.f.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x31: sprintf(buffer, "c.un.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x32: sprintf(buffer, "c.eq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x33: sprintf(buffer, "c.ueq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x34: sprintf(buffer, "c.olt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x35: sprintf(buffer, "c.ult.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x36: sprintf(buffer, "c.ole.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x37: sprintf(buffer, "c.ule.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x38: sprintf(buffer, "c.sf.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x39: sprintf(buffer, "c.ngle.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7);break;
- case 0x3a: sprintf(buffer, "c.seq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3b: sprintf(buffer, "c.ngl.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3c: sprintf(buffer, "c.lt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3d: sprintf(buffer, "c.nge.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3e: sprintf(buffer, "c.le.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- case 0x3f: sprintf(buffer, "c.ngt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- default: sprintf(buffer, "cop1 $%07x", op & 0x01ffffff); break;
+ case 0x00: sprintf(buffer, "add.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x01: sprintf(buffer, "sub.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x02: sprintf(buffer, "mul.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x03: sprintf(buffer, "div.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
+ case 0x04: sprintf(buffer, "sqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x05: sprintf(buffer, "abs.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x06: sprintf(buffer, "mov.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x07: sprintf(buffer, "neg.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x08: sprintf(buffer, "round.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x09: sprintf(buffer, "trunc.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0a: sprintf(buffer, "ceil.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0b: sprintf(buffer, "floor.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0c: sprintf(buffer, "round.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0d: sprintf(buffer, "trunc.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0e: sprintf(buffer, "ceil.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x0f: sprintf(buffer, "floor.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x11: sprintf(buffer, "mov%c.%s %s,%s,%d", ((op >> 16) & 1) ? 't' : 'f', fmt, cpreg[1][fd], cpreg[1][fs], (op >> 18) & 7); break;
+ case 0x12: sprintf(buffer, "movz.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
+ case 0x13: sprintf(buffer, "movn.%s %s,%s,%s", fmt, cpreg[1][fd], cpreg[1][fs], reg[rt]); break;
+ case 0x15: sprintf(buffer, "recip.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x16: sprintf(buffer, "rsqrt.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x20: sprintf(buffer, "cvt.s.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x21: sprintf(buffer, "cvt.d.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x24: sprintf(buffer, "cvt.w.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x25: sprintf(buffer, "cvt.l.%s %s,%s", fmt, cpreg[1][fd], cpreg[1][fs]); break;
+ case 0x30: sprintf(buffer, "c.f.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x31: sprintf(buffer, "c.un.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x32: sprintf(buffer, "c.eq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x33: sprintf(buffer, "c.ueq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x34: sprintf(buffer, "c.olt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x35: sprintf(buffer, "c.ult.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x36: sprintf(buffer, "c.ole.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x37: sprintf(buffer, "c.ule.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x38: sprintf(buffer, "c.sf.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x39: sprintf(buffer, "c.ngle.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7);break;
+ case 0x3a: sprintf(buffer, "c.seq.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3b: sprintf(buffer, "c.ngl.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3c: sprintf(buffer, "c.lt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3d: sprintf(buffer, "c.nge.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3e: sprintf(buffer, "c.le.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ case 0x3f: sprintf(buffer, "c.ngt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
+ default: sprintf(buffer, "cop1 $%07x", op & 0x01ffffff); break;
}
break;
}
@@ -242,130 +242,130 @@ static unsigned dasmr3k(char *buffer, unsigned pc, UINT32 op)
switch (op >> 26)
{
- case 0x00: /* SPECIAL */
+ case 0x00: /* SPECIAL */
switch (op & 63)
{
- case 0x00: if (op == 0)
+ case 0x00: if (op == 0)
sprintf(buffer, "nop");
else
- sprintf(buffer, "sll %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x02: sprintf(buffer, "srl %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x03: sprintf(buffer, "sra %s,%s,%d", reg[rd], reg[rt], shift); break;
- case 0x04: sprintf(buffer, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x06: sprintf(buffer, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x07: sprintf(buffer, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x08: sprintf(buffer, "jr %s", reg[rs]); if (rs == 31) flags = DASMFLAG_STEP_OUT; break;
- case 0x09: if (rd == 31)
+ sprintf(buffer, "sll %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x02: sprintf(buffer, "srl %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x03: sprintf(buffer, "sra %s,%s,%d", reg[rd], reg[rt], shift); break;
+ case 0x04: sprintf(buffer, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x06: sprintf(buffer, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x07: sprintf(buffer, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x08: sprintf(buffer, "jr %s", reg[rs]); if (rs == 31) flags = DASMFLAG_STEP_OUT; break;
+ case 0x09: if (rd == 31)
sprintf(buffer, "jalr %s", reg[rs]);
else
sprintf(buffer, "jalr %s,%s", reg[rs], reg[rd]); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x0c: sprintf(buffer, "syscall"); flags = DASMFLAG_STEP_OVER; break;
- case 0x0d: sprintf(buffer, "break"); flags = DASMFLAG_STEP_OVER; break;
- case 0x0f: sprintf(buffer, "sync [invalid]"); break;
- case 0x10: sprintf(buffer, "mfhi %s", reg[rd]); break;
- case 0x11: sprintf(buffer, "mthi %s", reg[rs]); break;
- case 0x12: sprintf(buffer, "mflo %s", reg[rd]); break;
- case 0x13: sprintf(buffer, "mtlo %s", reg[rs]); break;
- case 0x18: sprintf(buffer, "mult %s,%s", reg[rs], reg[rt]); break;
- case 0x19: sprintf(buffer, "multu %s,%s", reg[rs], reg[rt]); break;
- case 0x1a: sprintf(buffer, "div %s,%s", reg[rs], reg[rt]); break;
- case 0x1b: sprintf(buffer, "divu %s,%s", reg[rs], reg[rt]); break;
- case 0x20: sprintf(buffer, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x21: sprintf(buffer, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x22: sprintf(buffer, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x23: sprintf(buffer, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x24: sprintf(buffer, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x25: sprintf(buffer, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x26: sprintf(buffer, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x27: sprintf(buffer, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2a: sprintf(buffer, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2b: sprintf(buffer, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x30: sprintf(buffer, "teq [invalid]"); break;
- case 0x31: sprintf(buffer, "tgeu [invalid]"); break;
- case 0x32: sprintf(buffer, "tlt [invalid]"); break;
- case 0x33: sprintf(buffer, "tltu [invalid]"); break;
- case 0x34: sprintf(buffer, "tge [invalid]"); break;
- case 0x36: sprintf(buffer, "tne [invalid]"); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x0c: sprintf(buffer, "syscall"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0d: sprintf(buffer, "break"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x0f: sprintf(buffer, "sync [invalid]"); break;
+ case 0x10: sprintf(buffer, "mfhi %s", reg[rd]); break;
+ case 0x11: sprintf(buffer, "mthi %s", reg[rs]); break;
+ case 0x12: sprintf(buffer, "mflo %s", reg[rd]); break;
+ case 0x13: sprintf(buffer, "mtlo %s", reg[rs]); break;
+ case 0x18: sprintf(buffer, "mult %s,%s", reg[rs], reg[rt]); break;
+ case 0x19: sprintf(buffer, "multu %s,%s", reg[rs], reg[rt]); break;
+ case 0x1a: sprintf(buffer, "div %s,%s", reg[rs], reg[rt]); break;
+ case 0x1b: sprintf(buffer, "divu %s,%s", reg[rs], reg[rt]); break;
+ case 0x20: sprintf(buffer, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x21: sprintf(buffer, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x22: sprintf(buffer, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x23: sprintf(buffer, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x24: sprintf(buffer, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x25: sprintf(buffer, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x26: sprintf(buffer, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x27: sprintf(buffer, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2a: sprintf(buffer, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2b: sprintf(buffer, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x30: sprintf(buffer, "teq [invalid]"); break;
+ case 0x31: sprintf(buffer, "tgeu [invalid]"); break;
+ case 0x32: sprintf(buffer, "tlt [invalid]"); break;
+ case 0x33: sprintf(buffer, "tltu [invalid]"); break;
+ case 0x34: sprintf(buffer, "tge [invalid]"); break;
+ case 0x36: sprintf(buffer, "tne [invalid]"); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
- case 0x01: /* REGIMM */
+ case 0x01: /* REGIMM */
switch ((op >> 16) & 31)
{
- case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x02: sprintf(buffer, "bltzl [invalid]"); break;
- case 0x03: sprintf(buffer, "bgezl [invalid]"); break;
- case 0x08: sprintf(buffer, "tgei [invalid]"); break;
- case 0x09: sprintf(buffer, "tgeiu [invalid]"); break;
- case 0x0a: sprintf(buffer, "tlti [invalid]"); break;
- case 0x0b: sprintf(buffer, "tltiu [invalid]"); break;
- case 0x0c: sprintf(buffer, "teqi [invalid]"); break;
- case 0x0e: sprintf(buffer, "tnei [invalid]"); break;
- case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x12: sprintf(buffer, "bltzall [invalid]"); break;
- case 0x13: sprintf(buffer, "bgezall [invalid]"); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x00: sprintf(buffer, "bltz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x01: sprintf(buffer, "bgez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x02: sprintf(buffer, "bltzl [invalid]"); break;
+ case 0x03: sprintf(buffer, "bgezl [invalid]"); break;
+ case 0x08: sprintf(buffer, "tgei [invalid]"); break;
+ case 0x09: sprintf(buffer, "tgeiu [invalid]"); break;
+ case 0x0a: sprintf(buffer, "tlti [invalid]"); break;
+ case 0x0b: sprintf(buffer, "tltiu [invalid]"); break;
+ case 0x0c: sprintf(buffer, "teqi [invalid]"); break;
+ case 0x0e: sprintf(buffer, "tnei [invalid]"); break;
+ case 0x10: sprintf(buffer, "bltzal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x11: sprintf(buffer, "bgezal %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x12: sprintf(buffer, "bltzall [invalid]"); break;
+ case 0x13: sprintf(buffer, "bgezall [invalid]"); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
break;
- case 0x02: sprintf(buffer, "j $%08x", (pc & 0xf0000000) | ((op & 0x0fffffff) << 2)); break;
- case 0x03: sprintf(buffer, "jal $%08x", (pc & 0xf0000000) | ((op & 0x0fffffff) << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
- case 0x04: if (rs == 0 && rt == 0)
+ case 0x02: sprintf(buffer, "j $%08x", (pc & 0xf0000000) | ((op & 0x0fffffff) << 2)); break;
+ case 0x03: sprintf(buffer, "jal $%08x", (pc & 0xf0000000) | ((op & 0x0fffffff) << 2)); flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1); break;
+ case 0x04: if (rs == 0 && rt == 0)
sprintf(buffer, "b $%08x", pc + 4 + ((INT16)op << 2));
else
sprintf(buffer, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
- case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x08: sprintf(buffer, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x09: sprintf(buffer, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0a: sprintf(buffer, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0b: sprintf(buffer, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
- case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (UINT16)op); break;
- case 0x10: flags = dasm_cop(pc, 0, op, buffer); break;
- case 0x11: flags = dasm_cop1(pc, op, buffer); break;
- case 0x12: flags = dasm_cop(pc, 2, op, buffer); break;
- case 0x13: flags = dasm_cop(pc, 3, op, buffer); break;
- case 0x14: sprintf(buffer, "beql [invalid]"); break;
- case 0x15: sprintf(buffer, "bnel [invalid]"); break;
- case 0x16: sprintf(buffer, "blezl [invalid]"); break;
- case 0x17: sprintf(buffer, "bgtzl [invalid]"); break;
- case 0x20: sprintf(buffer, "lb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x21: sprintf(buffer, "lh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x22: sprintf(buffer, "lwl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x23: sprintf(buffer, "lw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x24: sprintf(buffer, "lbu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x25: sprintf(buffer, "lhu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x26: sprintf(buffer, "lwr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x28: sprintf(buffer, "sb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x29: sprintf(buffer, "sh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2a: sprintf(buffer, "swl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2b: sprintf(buffer, "sw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2e: sprintf(buffer, "swr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2f: sprintf(buffer, "cache [invalid]"); break;
- case 0x30: sprintf(buffer, "ll [invalid]"); break;
- case 0x31: sprintf(buffer, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
- case 0x32: sprintf(buffer, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
- case 0x33: sprintf(buffer, "lwc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break;
- case 0x34: sprintf(buffer, "ldc0 [invalid]"); break;
- case 0x35: sprintf(buffer, "ldc1 [invalid]"); break;
- case 0x36: sprintf(buffer, "ldc2 [invalid]"); break;
- case 0x37: sprintf(buffer, "ldc3 [invalid]"); break;
- case 0x38: sprintf(buffer, "sc [invalid]"); break;
- case 0x39: sprintf(buffer, "swc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
- case 0x3a: sprintf(buffer, "swc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
- case 0x3b: sprintf(buffer, "swc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break;
- case 0x3c: sprintf(buffer, "sdc0 [invalid]"); break;
- case 0x3d: sprintf(buffer, "sdc1 [invalid]"); break;
- case 0x3e: sprintf(buffer, "sdc2 [invalid]"); break;
- case 0x3f: sprintf(buffer, "sdc3 [invalid]"); break;
- default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
+ case 0x05: sprintf(buffer, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((INT16)op << 2));break;
+ case 0x06: sprintf(buffer, "blez %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x07: sprintf(buffer, "bgtz %s,$%08x", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x08: sprintf(buffer, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x09: sprintf(buffer, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x0a: sprintf(buffer, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x0b: sprintf(buffer, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x0c: sprintf(buffer, "andi %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
+ case 0x0d: sprintf(buffer, "ori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
+ case 0x0e: sprintf(buffer, "xori %s,%s,$%04x", reg[rt], reg[rs], (UINT16)op); break;
+ case 0x0f: sprintf(buffer, "lui %s,$%04x", reg[rt], (UINT16)op); break;
+ case 0x10: flags = dasm_cop(pc, 0, op, buffer); break;
+ case 0x11: flags = dasm_cop1(pc, op, buffer); break;
+ case 0x12: flags = dasm_cop(pc, 2, op, buffer); break;
+ case 0x13: flags = dasm_cop(pc, 3, op, buffer); break;
+ case 0x14: sprintf(buffer, "beql [invalid]"); break;
+ case 0x15: sprintf(buffer, "bnel [invalid]"); break;
+ case 0x16: sprintf(buffer, "blezl [invalid]"); break;
+ case 0x17: sprintf(buffer, "bgtzl [invalid]"); break;
+ case 0x20: sprintf(buffer, "lb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x21: sprintf(buffer, "lh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x22: sprintf(buffer, "lwl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x23: sprintf(buffer, "lw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x24: sprintf(buffer, "lbu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x25: sprintf(buffer, "lhu %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x26: sprintf(buffer, "lwr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x28: sprintf(buffer, "sb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x29: sprintf(buffer, "sh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2a: sprintf(buffer, "swl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2b: sprintf(buffer, "sw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2e: sprintf(buffer, "swr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
+ case 0x2f: sprintf(buffer, "cache [invalid]"); break;
+ case 0x30: sprintf(buffer, "ll [invalid]"); break;
+ case 0x31: sprintf(buffer, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
+ case 0x32: sprintf(buffer, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
+ case 0x33: sprintf(buffer, "lwc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break;
+ case 0x34: sprintf(buffer, "ldc0 [invalid]"); break;
+ case 0x35: sprintf(buffer, "ldc1 [invalid]"); break;
+ case 0x36: sprintf(buffer, "ldc2 [invalid]"); break;
+ case 0x37: sprintf(buffer, "ldc3 [invalid]"); break;
+ case 0x38: sprintf(buffer, "sc [invalid]"); break;
+ case 0x39: sprintf(buffer, "swc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
+ case 0x3a: sprintf(buffer, "swc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
+ case 0x3b: sprintf(buffer, "swc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break;
+ case 0x3c: sprintf(buffer, "sdc0 [invalid]"); break;
+ case 0x3d: sprintf(buffer, "sdc1 [invalid]"); break;
+ case 0x3e: sprintf(buffer, "sdc2 [invalid]"); break;
+ case 0x3f: sprintf(buffer, "sdc3 [invalid]"); break;
+ default: sprintf(buffer, "dc.l $%08x [invalid]", op); break;
}
return 4 | flags | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/mn10200/mn10200.c b/src/emu/cpu/mn10200/mn10200.c
index a51979963a8..8a85b37a5c3 100644
--- a/src/emu/cpu/mn10200/mn10200.c
+++ b/src/emu/cpu/mn10200/mn10200.c
@@ -17,7 +17,7 @@
#define MEM_WORD (1)
#define NUM_PRESCALERS (2)
-#define NUM_TIMERS_8BIT (10)
+#define NUM_TIMERS_8BIT (10)
#define NUM_IRQ_GROUPS (31)
extern int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom);
@@ -142,7 +142,7 @@ INLINE void w24(mn102_info *mn102, offs_t adr, UINT32 val)
INLINE void mn102_change_pc(mn102_info *mn102, UINT32 pc)
{
- mn102->pc = pc & 0xffffff;
+ mn102->pc = pc & 0xffffff;
}
INLINE mn102_info *get_safe_token(device_t *device)
@@ -190,7 +190,7 @@ static void refresh_timer(mn102_info *cpustate, int tmr)
rate = cpustate->device->unscaled_clock() / cpustate->prescaler[source-2].cycles;
rate /= cpustate->simple_timer[tmr].base;
- if (tmr != 8) // HACK: timer 8 is run at 500 kHz by the Taito program for no obvious reason, which kills performance
+ if (tmr != 8) // HACK: timer 8 is run at 500 kHz by the Taito program for no obvious reason, which kills performance
cpustate->timer_timers[tmr]->adjust(attotime::from_hz(rate), tmr);
}
else
@@ -199,7 +199,7 @@ static void refresh_timer(mn102_info *cpustate, int tmr)
}
}
}
- else // disabled, so stop it
+ else // disabled, so stop it
{
cpustate->timer_timers[tmr]->adjust(attotime::never, tmr);
}
@@ -468,18 +468,18 @@ INLINE void do_jsr(mn102_info *mn102, UINT32 to, UINT32 ret)
}
#if 0
- log_event("MN102", "PSW change S=%d irq=%s im=%d %c%c%c%c %c%c%c%c",
- (psw >> 12) & 3,
- psw & 0x0800 ? "on" : "off",
- (psw >> 8) & 7,
- psw & 0x0080 ? 'V' : '-',
- psw & 0x0040 ? 'C' : '-',
- psw & 0x0020 ? 'N' : '-',
- psw & 0x0010 ? 'Z' : '-',
- psw & 0x0008 ? 'v' : '-',
- psw & 0x0004 ? 'c' : '-',
- psw & 0x0002 ? 'n' : '-',
- psw & 0x0001 ? 'z' : '-');
+ log_event("MN102", "PSW change S=%d irq=%s im=%d %c%c%c%c %c%c%c%c",
+ (psw >> 12) & 3,
+ psw & 0x0800 ? "on" : "off",
+ (psw >> 8) & 7,
+ psw & 0x0080 ? 'V' : '-',
+ psw & 0x0040 ? 'C' : '-',
+ psw & 0x0020 ? 'N' : '-',
+ psw & 0x0010 ? 'Z' : '-',
+ psw & 0x0008 ? 'v' : '-',
+ psw & 0x0004 ? 'c' : '-',
+ psw & 0x0002 ? 'n' : '-',
+ psw & 0x0001 ? 'z' : '-');
#endif
// take an external IRQ
@@ -1817,125 +1817,125 @@ static CPU_EXECUTE(mn10200)
}
static const char *const inames[10][4] = {
- { "timer0", "timer1", "timer2", "timer3" },
- { "timer4", "timer5", "timer6", "timer7" },
- { "timer8", "timer9", "timer12a", "timer12b" },
- { "timer10u", "timer10a", "timer10b", "?" },
- { "timer11u", "timer11a", "timer11b", "?" },
- { "dma0", "dma1", "dma2", "dma3" },
- { "dma4", "dma5", "dma6", "dma7" },
- { "X0", "X1", "X2", "X3" },
- { "ser0tx", "ser0rx", "ser1tx", "ser1rx" },
- { "key", "a/d", "?", "?" }
+ { "timer0", "timer1", "timer2", "timer3" },
+ { "timer4", "timer5", "timer6", "timer7" },
+ { "timer8", "timer9", "timer12a", "timer12b" },
+ { "timer10u", "timer10a", "timer10b", "?" },
+ { "timer11u", "timer11a", "timer11b", "?" },
+ { "dma0", "dma1", "dma2", "dma3" },
+ { "dma4", "dma5", "dma6", "dma7" },
+ { "X0", "X1", "X2", "X3" },
+ { "ser0tx", "ser0rx", "ser1tx", "ser1rx" },
+ { "key", "a/d", "?", "?" }
};
static void mn10200_w(mn102_info *mn102, UINT32 adr, UINT32 data, int type)
{
- if(type == MEM_WORD) {
- mn10200_w(mn102, adr, data & 0xff, MEM_BYTE);
- mn10200_w(mn102, adr+1, (data>>8) & 0xff, MEM_BYTE);
- return;
- }
-
- switch(adr) {
- case 0x000:
- if(data & 12) {
- log_event("CPU", "Stop request");
+ if(type == MEM_WORD) {
+ mn10200_w(mn102, adr, data & 0xff, MEM_BYTE);
+ mn10200_w(mn102, adr+1, (data>>8) & 0xff, MEM_BYTE);
+ return;
}
- break;
- case 0x001:
- log_event("WATCHDOG", "Write %d", data>>7);
- break;
-
- case 0x002: case 0x003: // Memory control
- break;
-
- case 0x030: case 0x031: // Memory mode reg 0
- case 0x032: case 0x033: // Memory mode reg 1
- case 0x034: case 0x035: // Memory mode reg 2
- case 0x036: case 0x037: // Memory mode reg 3
- break;
-
- // Non-Maskable irqs
- case 0x040:
- mn102->nmicr = data & 6;
- break;
- case 0x041:
- break;
-
- // Maskable irq control
- case 0x042: case 0x044: case 0x046: case 0x048: case 0x04a:
- case 0x04c: case 0x04e: case 0x050: case 0x052: case 0x054:
- {
- // note: writes here ack interrupts
+
+ switch(adr) {
+ case 0x000:
+ if(data & 12) {
+ log_event("CPU", "Stop request");
+ }
+ break;
+ case 0x001:
+ log_event("WATCHDOG", "Write %d", data>>7);
+ break;
+
+ case 0x002: case 0x003: // Memory control
+ break;
+
+ case 0x030: case 0x031: // Memory mode reg 0
+ case 0x032: case 0x033: // Memory mode reg 1
+ case 0x034: case 0x035: // Memory mode reg 2
+ case 0x036: case 0x037: // Memory mode reg 3
+ break;
+
+ // Non-Maskable irqs
+ case 0x040:
+ mn102->nmicr = data & 6;
+ break;
+ case 0x041:
+ break;
+
+ // Maskable irq control
+ case 0x042: case 0x044: case 0x046: case 0x048: case 0x04a:
+ case 0x04c: case 0x04e: case 0x050: case 0x052: case 0x054:
+ {
+ // note: writes here ack interrupts
mn102->icrl[((adr & 0x3f)>>1)-1] = data;
- }
- break;
-
- case 0x043: case 0x045: case 0x047: case 0x049: case 0x04b:
- case 0x04d: case 0x04f: case 0x051: case 0x053: case 0x055: {
- int irq = ((adr & 0x3f)>>1)-1;
- if((mn102->icrh[irq] != data) && (data & 15)) {
- printf("MN10200: irq %d enabled, level=%x, enable= %s %s %s %s\n", irq+1, (data >> 4) & 7,
+ }
+ break;
+
+ case 0x043: case 0x045: case 0x047: case 0x049: case 0x04b:
+ case 0x04d: case 0x04f: case 0x051: case 0x053: case 0x055: {
+ int irq = ((adr & 0x3f)>>1)-1;
+ if((mn102->icrh[irq] != data) && (data & 15)) {
+ printf("MN10200: irq %d enabled, level=%x, enable= %s %s %s %s\n", irq+1, (data >> 4) & 7,
data & 1 ? inames[irq][0] : "-",
data & 2 ? inames[irq][1] : "-",
data & 4 ? inames[irq][2] : "-",
data & 8 ? inames[irq][3] : "-");
}
- if((mn102->icrh[irq] != data) && !(data & 15)) {
- printf("MN10200: irq %d disabled\n", irq+1);
+ if((mn102->icrh[irq] != data) && !(data & 15)) {
+ printf("MN10200: irq %d disabled\n", irq+1);
+ }
+ mn102->icrh[irq] = data;
+ break;
}
- mn102->icrh[irq] = data;
- break;
- }
- case 0x056: {
+ case 0x056: {
// const char *modes[4] = { "l", "h", "fall", "rise" };
// log_event("MN102", "irq3=%s irq2=%s irq1=%s irq0=%s",
// modes[(data >> 6) & 3], modes[(data >> 4) & 3], modes[(data >> 2) & 3], modes[data & 3]);
- break;
- }
+ break;
+ }
- case 0x057: {
+ case 0x057: {
// const char *modes[4] = { "l", "1", "fall", "3" };
// log_event("MN102", "irq_ki=%s", modes[data & 3]);
- break;
- }
+ break;
+ }
- case 0x100: case 0x101: // DRAM control reg
- case 0x102: case 0x103: // Refresh counter
- break;
+ case 0x100: case 0x101: // DRAM control reg
+ case 0x102: case 0x103: // Refresh counter
+ break;
- case 0x180: case 0x190: {
- int ser = (adr-0x180) >> 4;
+ case 0x180: case 0x190: {
+ int ser = (adr-0x180) >> 4;
// const char *parity[8] = { "no", "1", "2", "3", "l", "h", "even", "odd" };
// const char *source[4] = { "sbt0", "timer 8", "2", "timer 9" };
- mn102->serial[ser].ctrll = data;
+ mn102->serial[ser].ctrll = data;
// log_event("MN102", "Serial %d length=%c, parity=%s, stop=%c, source=%s",
// ser,
// data & 0x80 ? '8' : '7', parity[(data >> 4) & 7],
// data & 8 ? '2' : '1', source[data & 3]);
- break;
- }
+ break;
+ }
- case 0x181: case 0x191: {
- int ser = (adr-0x180) >> 4;
- mn102->serial[ser].ctrlh = data;
+ case 0x181: case 0x191: {
+ int ser = (adr-0x180) >> 4;
+ mn102->serial[ser].ctrlh = data;
// log_event("MN102", "Serial %d transmit=%s, receive=%s, break=%s, proto=%s, order=%s",
// ser,
// data & 0x80 ? "on" : "off", data & 0x40 ? "on" : "off",
// data & 0x20 ? "on" : "off", data & 8 ? "sync" : "async",
// data & 2 ? "msb" : "lsb");
- break;
- }
+ break;
+ }
- case 0x182: case 0x192: {
- int ser = (adr-0x180) >> 4;
- mn102->serial[ser].buf = data;
- log_event("MN102", "Serial %d buffer=%02x", ser, data);
- break;
- }
+ case 0x182: case 0x192: {
+ int ser = (adr-0x180) >> 4;
+ mn102->serial[ser].buf = data;
+ log_event("MN102", "Serial %d buffer=%02x", ser, data);
+ break;
+ }
case 0x1a0:
log_event("MN102", "AN %s timer7=%s /%d %s %s",
@@ -2014,243 +2014,243 @@ static void mn10200_w(mn102_info *mn102, UINT32 adr, UINT32 data, int type)
break;
}
- case 0x234: case 0x244: case 0x254:
- log_event("MN102", "Timer %d ca=--%02x", 10 + ((adr-0x230) >> 4), data);
- break;
+ case 0x234: case 0x244: case 0x254:
+ log_event("MN102", "Timer %d ca=--%02x", 10 + ((adr-0x230) >> 4), data);
+ break;
- case 0x235: case 0x245: case 0x255:
- log_event("MN102", "Timer %d ca=%02x--", 10 + ((adr-0x230) >> 4), data);
- break;
+ case 0x235: case 0x245: case 0x255:
+ log_event("MN102", "Timer %d ca=%02x--", 10 + ((adr-0x230) >> 4), data);
+ break;
- case 0x236: case 0x246: case 0x256:
- log_event("MN102", "Timer %d ca read trigger", 10 + ((adr-0x230) >> 4));
- break;
+ case 0x236: case 0x246: case 0x256:
+ log_event("MN102", "Timer %d ca read trigger", 10 + ((adr-0x230) >> 4));
+ break;
- case 0x237: case 0x247: case 0x257: break;
+ case 0x237: case 0x247: case 0x257: break;
- case 0x238: case 0x248: case 0x258:
- log_event("MN102", "Timer %d cb=--%02x", 10 + ((adr-0x230) >> 4), data);
- break;
+ case 0x238: case 0x248: case 0x258:
+ log_event("MN102", "Timer %d cb=--%02x", 10 + ((adr-0x230) >> 4), data);
+ break;
- case 0x239: case 0x249: case 0x259:
- log_event("MN102", "Timer %d cb=%02x--", 10 + ((adr-0x230) >> 4), data);
- break;
+ case 0x239: case 0x249: case 0x259:
+ log_event("MN102", "Timer %d cb=%02x--", 10 + ((adr-0x230) >> 4), data);
+ break;
- case 0x23a: case 0x24a: case 0x25a:
- log_event("MN102", "Timer %d cb read trigger", 10 + ((adr-0x230) >> 4));
- break;
+ case 0x23a: case 0x24a: case 0x25a:
+ log_event("MN102", "Timer %d cb read trigger", 10 + ((adr-0x230) >> 4));
+ break;
- case 0x23b: case 0x24b: case 0x25b: break;
+ case 0x23b: case 0x24b: case 0x25b: break;
- case 0x260: case 0x261: {
+ case 0x260: case 0x261: {
// const char *mode[4] = { "sysbuf", "4-phase", "4-phase 1/2", "3" };
// log_event("MN102", "Sync Output %c timing=%s out=%s dir=%s mode=%s",
// adr == 0x261 ? 'B' : 'A',
// data & 0x10 ? "12A" : "1", data & 8 ? "sync a" :"P13-10",
// data & 4 ? "ccw" : "cw", mode[data & 3]);
- break;
- }
+ break;
+ }
- case 0x262:
- log_event("MN102", "Sync Output buffer = %02x", data);
- break;
+ case 0x262:
+ log_event("MN102", "Sync Output buffer = %02x", data);
+ break;
- case 0x264:
+ case 0x264:
mn102->io->write_byte(MN10200_PORT1, data);
- break;
-
- case 0x280: case 0x290: case 0x2a0: case 0x2b0: case 0x2c0: case 0x2d0: case 0x2e0: case 0x2f0: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].adr = (mn102->dma[dma].adr & 0x00ffff00) | data;
- logerror("MN10200: DMA %d adr=%06x\n", dma, mn102->dma[dma].adr);
- break;
- }
-
- case 0x281: case 0x291: case 0x2a1: case 0x2b1: case 0x2c1: case 0x2d1: case 0x2e1: case 0x2f1: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].adr = (mn102->dma[dma].adr & 0x00ff00ff) | (data << 8);
- logerror("MN10200: DMA %d adr=%06x\n", dma, mn102->dma[dma].adr);
- break;
- }
-
- case 0x282: case 0x292: case 0x2a2: case 0x2b2: case 0x2c2: case 0x2d2: case 0x2e2: case 0x2f2: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].adr = (mn102->dma[dma].adr & 0x0000ffff) | (data << 16);
- logerror("MN10200: DMA %d adr=%06x\n", dma, mn102->dma[dma].adr);
- break;
- }
-
- case 0x283: case 0x293: case 0x2a3: case 0x2b3: case 0x2c3: case 0x2d3: case 0x2e3: case 0x2f3:
- break;
-
- case 0x284: case 0x294: case 0x2a4: case 0x2b4: case 0x2c4: case 0x2d4: case 0x2e4: case 0x2f4: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].count = (mn102->dma[dma].count & 0x00ffff00) | data;
- logerror("MN10200: DMA %d count=%06x\n", dma, mn102->dma[dma].count);
- break;
- }
-
- case 0x285: case 0x295: case 0x2a5: case 0x2b5: case 0x2c5: case 0x2d5: case 0x2e5: case 0x2f5: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].count = (mn102->dma[dma].count & 0x00ff00ff) | (data << 8);
- logerror("MN10200: DMA %d count=%06x\n", dma, mn102->dma[dma].count);
- break;
- }
-
- case 0x286: case 0x296: case 0x2a6: case 0x2b6: case 0x2c6: case 0x2d6: case 0x2e6: case 0x2f6: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].count = (mn102->dma[dma].count & 0x0000ffff) | (data << 16);
- logerror("MN10200: DMA %d count=%06x\n", dma, mn102->dma[dma].count);
- break;
- }
-
- case 0x287: case 0x297: case 0x2a7: case 0x2b7: case 0x2c7: case 0x2d7: case 0x2e7: case 0x2f7:
- break;
-
- case 0x288: case 0x298: case 0x2a8: case 0x2b8: case 0x2c8: case 0x2d8: case 0x2e8: case 0x2f8: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].iadr = (mn102->dma[dma].iadr & 0xff00) | data;
- logerror("MN10200: DMA %d iadr=%03x\n", dma, mn102->dma[dma].iadr);
- break;
- }
-
- case 0x289: case 0x299: case 0x2a9: case 0x2b9: case 0x2c9: case 0x2d9: case 0x2e9: case 0x2f9: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].iadr = (mn102->dma[dma].iadr & 0x00ff) | ((data & 3) << 8);
- logerror("MN10200: DMA %d iadr=%03x\n", dma, mn102->dma[dma].iadr);
- break;
- }
-
- case 0x28a: case 0x29a: case 0x2aa: case 0x2ba: case 0x2ca: case 0x2da: case 0x2ea: case 0x2fa: {
- static const char *const trans[4] = { "M-IO", "M-M", "M-X1", "m-X2" };
- static const char *const start[32] = {
- "soft", "a/d", "ser0tx", "set0rx", "ser1tx", "ser1rx",
- "timer0", "timer1", "timer2", "timer3", "timer4", "timer5", "timer6", "timer7", "timer8", "timer9",
- "timer10u", "timer10a", "timer10b",
- "timer11u", "timer11a", "timer12b",
- "timer12a", "timer12b",
- "irq0", "irq1", "irq2", "irq3",
- "X0e", "X1e", "X0l", "X1l"
- };
-
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].ctrll = data;
- logerror("MN10200: DMA %d control ack=%s, trans=%s, start=%s\n",
- dma,
- data & 0x80 ? "level" : "pulse",
- trans[(data >> 5) & 3],
- start[data & 31]);
- break;
- }
-
- case 0x28b: case 0x29b: case 0x2ab: case 0x2bb: case 0x2cb: case 0x2db: case 0x2eb: case 0x2fb: {
- static const char *const tradr[4] = { "inc", "dec", "fixed", "reserved" };
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].ctrlh = data;
+ break;
+
+ case 0x280: case 0x290: case 0x2a0: case 0x2b0: case 0x2c0: case 0x2d0: case 0x2e0: case 0x2f0: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].adr = (mn102->dma[dma].adr & 0x00ffff00) | data;
+ logerror("MN10200: DMA %d adr=%06x\n", dma, mn102->dma[dma].adr);
+ break;
+ }
+
+ case 0x281: case 0x291: case 0x2a1: case 0x2b1: case 0x2c1: case 0x2d1: case 0x2e1: case 0x2f1: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].adr = (mn102->dma[dma].adr & 0x00ff00ff) | (data << 8);
+ logerror("MN10200: DMA %d adr=%06x\n", dma, mn102->dma[dma].adr);
+ break;
+ }
+
+ case 0x282: case 0x292: case 0x2a2: case 0x2b2: case 0x2c2: case 0x2d2: case 0x2e2: case 0x2f2: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].adr = (mn102->dma[dma].adr & 0x0000ffff) | (data << 16);
+ logerror("MN10200: DMA %d adr=%06x\n", dma, mn102->dma[dma].adr);
+ break;
+ }
+
+ case 0x283: case 0x293: case 0x2a3: case 0x2b3: case 0x2c3: case 0x2d3: case 0x2e3: case 0x2f3:
+ break;
+
+ case 0x284: case 0x294: case 0x2a4: case 0x2b4: case 0x2c4: case 0x2d4: case 0x2e4: case 0x2f4: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].count = (mn102->dma[dma].count & 0x00ffff00) | data;
+ logerror("MN10200: DMA %d count=%06x\n", dma, mn102->dma[dma].count);
+ break;
+ }
+
+ case 0x285: case 0x295: case 0x2a5: case 0x2b5: case 0x2c5: case 0x2d5: case 0x2e5: case 0x2f5: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].count = (mn102->dma[dma].count & 0x00ff00ff) | (data << 8);
+ logerror("MN10200: DMA %d count=%06x\n", dma, mn102->dma[dma].count);
+ break;
+ }
+
+ case 0x286: case 0x296: case 0x2a6: case 0x2b6: case 0x2c6: case 0x2d6: case 0x2e6: case 0x2f6: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].count = (mn102->dma[dma].count & 0x0000ffff) | (data << 16);
+ logerror("MN10200: DMA %d count=%06x\n", dma, mn102->dma[dma].count);
+ break;
+ }
+
+ case 0x287: case 0x297: case 0x2a7: case 0x2b7: case 0x2c7: case 0x2d7: case 0x2e7: case 0x2f7:
+ break;
+
+ case 0x288: case 0x298: case 0x2a8: case 0x2b8: case 0x2c8: case 0x2d8: case 0x2e8: case 0x2f8: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].iadr = (mn102->dma[dma].iadr & 0xff00) | data;
+ logerror("MN10200: DMA %d iadr=%03x\n", dma, mn102->dma[dma].iadr);
+ break;
+ }
+
+ case 0x289: case 0x299: case 0x2a9: case 0x2b9: case 0x2c9: case 0x2d9: case 0x2e9: case 0x2f9: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].iadr = (mn102->dma[dma].iadr & 0x00ff) | ((data & 3) << 8);
+ logerror("MN10200: DMA %d iadr=%03x\n", dma, mn102->dma[dma].iadr);
+ break;
+ }
+
+ case 0x28a: case 0x29a: case 0x2aa: case 0x2ba: case 0x2ca: case 0x2da: case 0x2ea: case 0x2fa: {
+ static const char *const trans[4] = { "M-IO", "M-M", "M-X1", "m-X2" };
+ static const char *const start[32] = {
+ "soft", "a/d", "ser0tx", "set0rx", "ser1tx", "ser1rx",
+ "timer0", "timer1", "timer2", "timer3", "timer4", "timer5", "timer6", "timer7", "timer8", "timer9",
+ "timer10u", "timer10a", "timer10b",
+ "timer11u", "timer11a", "timer12b",
+ "timer12a", "timer12b",
+ "irq0", "irq1", "irq2", "irq3",
+ "X0e", "X1e", "X0l", "X1l"
+ };
+
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].ctrll = data;
+ logerror("MN10200: DMA %d control ack=%s, trans=%s, start=%s\n",
+ dma,
+ data & 0x80 ? "level" : "pulse",
+ trans[(data >> 5) & 3],
+ start[data & 31]);
+ break;
+ }
+
+ case 0x28b: case 0x29b: case 0x2ab: case 0x2bb: case 0x2cb: case 0x2db: case 0x2eb: case 0x2fb: {
+ static const char *const tradr[4] = { "inc", "dec", "fixed", "reserved" };
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].ctrlh = data;
logerror("MN10200: DMA %d control %s irq=%s %s %s dir=%s %s %s\n",
- dma,
- data & 0x80 ? "enable" : "disable",
- data & 0x40 ? "off" : "on",
- data & 0x20 ? "byte" : "word",
- data & 0x10 ? "burst" : "single",
- data & 0x08 ? "dst" : "src",
- data & 0x04 ? "continue" : "normal",
- tradr[data & 3]);
- break;
- }
-
- case 0x28c: case 0x29c: case 0x2ac: case 0x2bc: case 0x2cc: case 0x2dc: case 0x2ec: case 0x2fc: {
- int dma = (adr-0x280) >> 4;
- mn102->dma[dma].irq = data & 7;
- logerror("MN10200: DMA %d irq=%d\n", dma, data & 7);
- break;
- }
-
- case 0x28d: case 0x29d: case 0x2ad: case 0x2bd: case 0x2cd: case 0x2dd: case 0x2ed: case 0x2fd:
- break;
-
- case 0x3b0:
- log_event("MN102", "Pull-ups 0-7 = -%c%c%c%c%c%c%c",
- data & 0x40 ? '#' : '.',
- data & 0x20 ? '#' : '.',
- data & 0x10 ? '#' : '.',
- data & 0x08 ? '#' : '.',
- data & 0x04 ? '#' : '.',
- data & 0x02 ? '#' : '.',
- data & 0x01 ? '#' : '.');
- break;
-
- case 0x3b1:
- log_event("MN102", "Pull-ups 8-f = --%c%c%c%c%c%c",
- data & 0x20 ? '#' : '.',
- data & 0x10 ? '#' : '.',
- data & 0x08 ? '#' : '.',
- data & 0x04 ? '#' : '.',
- data & 0x02 ? '#' : '.',
- data & 0x01 ? '#' : '.');
- break;
-
- case 0x3b2:
- log_event("MN102", "Timer I/O 4-0 = %c%c%c%c%c",
- data & 0x10 ? 'o' : 'i',
- data & 0x08 ? 'o' : 'i',
- data & 0x04 ? 'o' : 'i',
- data & 0x02 ? 'o' : 'i',
- data & 0x01 ? 'o' : 'i');
- break;
-
- case 0x3b3:
- log_event("MN102", "Timer I/O 12b/a-10b/a = %c%c %c%c %c%c",
- data & 0x20 ? 'o' : 'i',
- data & 0x10 ? 'o' : 'i',
- data & 0x08 ? 'o' : 'i',
- data & 0x04 ? 'o' : 'i',
- data & 0x02 ? 'o' : 'i',
- data & 0x01 ? 'o' : 'i');
- break;
-
- case 0x3c0: // port 0 data
+ dma,
+ data & 0x80 ? "enable" : "disable",
+ data & 0x40 ? "off" : "on",
+ data & 0x20 ? "byte" : "word",
+ data & 0x10 ? "burst" : "single",
+ data & 0x08 ? "dst" : "src",
+ data & 0x04 ? "continue" : "normal",
+ tradr[data & 3]);
+ break;
+ }
+
+ case 0x28c: case 0x29c: case 0x2ac: case 0x2bc: case 0x2cc: case 0x2dc: case 0x2ec: case 0x2fc: {
+ int dma = (adr-0x280) >> 4;
+ mn102->dma[dma].irq = data & 7;
+ logerror("MN10200: DMA %d irq=%d\n", dma, data & 7);
+ break;
+ }
+
+ case 0x28d: case 0x29d: case 0x2ad: case 0x2bd: case 0x2cd: case 0x2dd: case 0x2ed: case 0x2fd:
+ break;
+
+ case 0x3b0:
+ log_event("MN102", "Pull-ups 0-7 = -%c%c%c%c%c%c%c",
+ data & 0x40 ? '#' : '.',
+ data & 0x20 ? '#' : '.',
+ data & 0x10 ? '#' : '.',
+ data & 0x08 ? '#' : '.',
+ data & 0x04 ? '#' : '.',
+ data & 0x02 ? '#' : '.',
+ data & 0x01 ? '#' : '.');
+ break;
+
+ case 0x3b1:
+ log_event("MN102", "Pull-ups 8-f = --%c%c%c%c%c%c",
+ data & 0x20 ? '#' : '.',
+ data & 0x10 ? '#' : '.',
+ data & 0x08 ? '#' : '.',
+ data & 0x04 ? '#' : '.',
+ data & 0x02 ? '#' : '.',
+ data & 0x01 ? '#' : '.');
+ break;
+
+ case 0x3b2:
+ log_event("MN102", "Timer I/O 4-0 = %c%c%c%c%c",
+ data & 0x10 ? 'o' : 'i',
+ data & 0x08 ? 'o' : 'i',
+ data & 0x04 ? 'o' : 'i',
+ data & 0x02 ? 'o' : 'i',
+ data & 0x01 ? 'o' : 'i');
+ break;
+
+ case 0x3b3:
+ log_event("MN102", "Timer I/O 12b/a-10b/a = %c%c %c%c %c%c",
+ data & 0x20 ? 'o' : 'i',
+ data & 0x10 ? 'o' : 'i',
+ data & 0x08 ? 'o' : 'i',
+ data & 0x04 ? 'o' : 'i',
+ data & 0x02 ? 'o' : 'i',
+ data & 0x01 ? 'o' : 'i');
+ break;
+
+ case 0x3c0: // port 0 data
mn102->io->write_byte(MN10200_PORT0, data);
break;
- case 0x3c2: // port 2 data
+ case 0x3c2: // port 2 data
mn102->io->write_byte(MN10200_PORT2, data);
break;
- case 0x3c3: // port 3 data
+ case 0x3c3: // port 3 data
mn102->io->write_byte(MN10200_PORT3, data);
break;
- case 0x3e0: // port0 ddr
+ case 0x3e0: // port0 ddr
mn102->ddr[0] = data;
break;
- case 0x3e1: // port1 ddr
+ case 0x3e1: // port1 ddr
mn102->ddr[1] = data;
break;
- case 0x3e2: // port2 ddr
+ case 0x3e2: // port2 ddr
mn102->ddr[2] = data;
break;
- case 0x3e3: // port3 ddr
+ case 0x3e3: // port3 ddr
mn102->ddr[3] = data;
break;
- case 0x3f3:
+ case 0x3f3:
/* log_event("MN102", "Port 3 bits 4=%s 3=%s 2=%s 1=%s 0=%s",
data & 0x10 ? data & 0x40 ? "serial_1" : "tm9" : "p34",
data & 0x08 ? data & 0x20 ? "serial_0" : "tm8" : "p33",
data & 0x04 ? "tm7" : "p32",
data & 0x04 ? "tm6" : "p31",
data & 0x04 ? "tm5" : "p30");*/
- break;
+ break;
- default:
- log_event("MN102", "internal_w %04x, %02x (%03x)", adr+0xfc00, data, adr);
- break;
- }
+ default:
+ log_event("MN102", "internal_w %04x, %02x (%03x)", adr+0xfc00, data, adr);
+ break;
+ }
}
static UINT32 mn10200_r(mn102_info *mn102, UINT32 adr, int type)
@@ -2260,38 +2260,38 @@ static UINT32 mn10200_r(mn102_info *mn102, UINT32 adr, int type)
return mn10200_r(mn102, adr, MEM_BYTE) | (mn10200_r(mn102, adr+1, MEM_BYTE) << 8);
}
- switch(adr) {
- case 0x00e:
- return mn102->iagr;
+ switch(adr) {
+ case 0x00e:
+ return mn102->iagr;
- case 0x00f:
- return 0;
+ case 0x00f:
+ return 0;
- case 0x042: case 0x044: case 0x046: case 0x048: case 0x04a:
- case 0x04c: case 0x04e: case 0x050: case 0x052: case 0x054:
- return mn102->icrl[((adr & 0x3f)>>1)-1];
+ case 0x042: case 0x044: case 0x046: case 0x048: case 0x04a:
+ case 0x04c: case 0x04e: case 0x050: case 0x052: case 0x054:
+ return mn102->icrl[((adr & 0x3f)>>1)-1];
- case 0x043: case 0x045: case 0x047: case 0x049: case 0x04b:
- case 0x04d: case 0x04f: case 0x051: case 0x053: case 0x055:
- return mn102->icrh[((adr & 0x3f)>>1)-1];
+ case 0x043: case 0x045: case 0x047: case 0x049: case 0x04b:
+ case 0x04d: case 0x04f: case 0x051: case 0x053: case 0x055:
+ return mn102->icrh[((adr & 0x3f)>>1)-1];
- case 0x056:
- return 0;
+ case 0x056:
+ return 0;
- // p4i1 = tms empty line
- case 0x057:
- return 0x20;
+ // p4i1 = tms empty line
+ case 0x057:
+ return 0x20;
- case 0x180: case 0x190:
- return mn102->serial[(adr-0x180) >> 4].ctrll;
+ case 0x180: case 0x190:
+ return mn102->serial[(adr-0x180) >> 4].ctrll;
- case 0x181: case 0x191:
- return mn102->serial[(adr-0x180) >> 4].ctrlh;
+ case 0x181: case 0x191:
+ return mn102->serial[(adr-0x180) >> 4].ctrlh;
- case 0x182: {
- static int zz;
- return zz++;
- }
+ case 0x182: {
+ static int zz;
+ return zz++;
+ }
case 0x183:
return 0x10;
@@ -2301,7 +2301,7 @@ static UINT32 mn10200_r(mn102_info *mn102, UINT32 adr, int type)
// printf("MN10200: timer %d value read = %d\n", adr-0x200, mn102->simple_timer[adr-0x200].cur);
return mn102->simple_timer[adr-0x200].cur;
- case 0x264: // port 1 data
+ case 0x264: // port 1 data
return mn102->io->read_byte(MN10200_PORT1);
case 0x28c: case 0x29c: case 0x2ac: case 0x2bc: case 0x2cc: case 0x2dc: case 0x2ec: case 0x2fc:
@@ -2310,20 +2310,20 @@ static UINT32 mn10200_r(mn102_info *mn102, UINT32 adr, int type)
return mn102->dma[dma].irq;
}
- case 0x3c0: // port 0 data
+ case 0x3c0: // port 0 data
return mn102->io->read_byte(MN10200_PORT0);
- case 0x3c2: // port 2 data
+ case 0x3c2: // port 2 data
return mn102->io->read_byte(MN10200_PORT2);
- case 0x3c3: // port 3 data
+ case 0x3c3: // port 3 data
return mn102->io->read_byte(MN10200_PORT3);
- default:
- log_event("MN102", "internal_r %04x (%03x)", adr+0xfc00, adr);
- }
+ default:
+ log_event("MN102", "internal_r %04x (%03x)", adr+0xfc00, adr);
+ }
- return 0;
+ return 0;
}
static CPU_SET_INFO(mn10200)
@@ -2332,9 +2332,9 @@ static CPU_SET_INFO(mn10200)
switch (state)
{
- /* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_PC: /* intentional fallthrough */
- case CPUINFO_INT_REGISTER + MN10200_PC: cpustate->pc = info->i; break;
+ /* --- the following bits of info are set as 64-bit signed integers --- */
+ case CPUINFO_INT_PC: /* intentional fallthrough */
+ case CPUINFO_INT_REGISTER + MN10200_PC: cpustate->pc = info->i; break;
case CPUINFO_INT_REGISTER + MN10200_PSW: cpustate->psw = info->i; break;
case CPUINFO_INT_REGISTER + MN10200_MDR: cpustate->mdr = info->i; break;
case CPUINFO_INT_REGISTER + MN10200_D0: cpustate->d[0] = info->i; break;
@@ -2348,10 +2348,10 @@ static CPU_SET_INFO(mn10200)
case CPUINFO_INT_REGISTER + MN10200_NMICR: cpustate->nmicr = info->i; break;
case CPUINFO_INT_REGISTER + MN10200_IAGR: cpustate->iagr = info->i; break;
- case CPUINFO_INT_INPUT_STATE + MN10200_IRQ0: mn102_extirq(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MN10200_IRQ1: mn102_extirq(cpustate, 1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MN10200_IRQ2: mn102_extirq(cpustate, 2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + MN10200_IRQ3: mn102_extirq(cpustate, 3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MN10200_IRQ0: mn102_extirq(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MN10200_IRQ1: mn102_extirq(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MN10200_IRQ2: mn102_extirq(cpustate, 2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + MN10200_IRQ3: mn102_extirq(cpustate, 3, info->i); break;
}
}
@@ -2385,7 +2385,7 @@ CPU_GET_INFO( mn10200 )
case CPUINFO_INT_PC: /* intentional fallthrough */
case CPUINFO_INT_REGISTER + MN10200_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + MN10200_PSW: info->i = cpustate->psw; break;
+ case CPUINFO_INT_REGISTER + MN10200_PSW: info->i = cpustate->psw; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mn10200); break;
diff --git a/src/emu/cpu/mn10200/mn102dis.c b/src/emu/cpu/mn10200/mn102dis.c
index 6c0da6fbe7c..a9eadbc3792 100644
--- a/src/emu/cpu/mn10200/mn102dis.c
+++ b/src/emu/cpu/mn10200/mn102dis.c
@@ -2,7 +2,7 @@
#include <stdio.h>
-static const UINT8 *sOpROM; // current opROM pointer
+static const UINT8 *sOpROM; // current opROM pointer
static UINT32 sBasePC;
static UINT8 program_read_byte(offs_t pc)
@@ -32,32 +32,32 @@ static INT32 r24s(offs_t pc)
static const char *i8str(INT8 v)
{
- static char res[4];
- if(v>=0)
- sprintf(res, "%x", v);
- else
- sprintf(res, "-%x", (UINT8)(-v));
- return res;
+ static char res[4];
+ if(v>=0)
+ sprintf(res, "%x", v);
+ else
+ sprintf(res, "-%x", (UINT8)(-v));
+ return res;
}
static const char *i16str(INT16 v)
{
- static char res[6];
- if(v>=0)
- sprintf(res, "%x", v);
- else
- sprintf(res, "-%x", (UINT16)(-v));
- return res;
+ static char res[6];
+ if(v>=0)
+ sprintf(res, "%x", v);
+ else
+ sprintf(res, "-%x", (UINT16)(-v));
+ return res;
}
static const char *i24str(INT32 v)
{
- static char res[8];
- if(v>=0)
- sprintf(res, "%x", v);
- else
- sprintf(res, "-%x", -v);
- return res;
+ static char res[8];
+ if(v>=0)
+ sprintf(res, "%x", v);
+ else
+ sprintf(res, "-%x", -v);
+ return res;
}
@@ -745,7 +745,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
sprintf(buffer, "tbz (%s, a%d) %d, %x", i8str(program_read_byte(pc+2)), (opcode>>3)&1, opcode & 7,
- (pc+4+(INT8)program_read_byte(pc+3)) & 0xffffff);
+ (pc+4+(INT8)program_read_byte(pc+3)) & 0xffffff);
return 4;
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
@@ -756,7 +756,7 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
sprintf(buffer, "tbnz (%s, a%d) %d, %x", i8str(program_read_byte(pc+2)), (opcode>>3)&1, opcode & 7,
- (pc+4+(INT8)program_read_byte(pc+3)) & 0xffffff);
+ (pc+4+(INT8)program_read_byte(pc+3)) & 0xffffff);
return 4;
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
@@ -766,12 +766,12 @@ static int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom)
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
sprintf(buffer, "tbz (%x) %d, %x", r16u(pc+2), opcode & 7,
- (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
+ (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
return 5;
case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
sprintf(buffer, "tbnz (%x) %d, %x", r16u(pc+2), opcode & 7,
- (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
+ (pc+5+(INT8)program_read_byte(pc+4)) & 0xffffff);
return 5;
case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
@@ -1030,4 +1030,3 @@ CPU_DISASSEMBLE( mn10200 )
{
return mn102_disassemble(buffer, pc, oprom);
}
-
diff --git a/src/emu/cpu/nec/nec.c b/src/emu/cpu/nec/nec.c
index 822478316b9..bae144a895b 100644
--- a/src/emu/cpu/nec/nec.c
+++ b/src/emu/cpu/nec/nec.c
@@ -120,8 +120,8 @@ INLINE nec_state_t *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == V20 ||
- device->type() == V30 ||
- device->type() == V33);
+ device->type() == V30 ||
+ device->type() == V33);
return (nec_state_t *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -135,11 +135,11 @@ static void do_prefetch(nec_state_t *nec_state, int previous_ICount)
int diff = previous_ICount - (int) nec_state->icount;
/* The implementation is not accurate, but comes close.
- * It does not respect that the V30 will fetch two bytes
- * at once directly, but instead uses only 2 cycles instead
- * of 4. There are however only very few sources publicly
- * available and they are vague.
- */
+ * It does not respect that the V30 will fetch two bytes
+ * at once directly, but instead uses only 2 cycles instead
+ * of 4. There are however only very few sources publicly
+ * available and they are vague.
+ */
while (nec_state->prefetch_count<0)
{
nec_state->prefetch_count++;
@@ -204,7 +204,7 @@ static CPU_RESET( nec )
nec_state->TF = 0;
nec_state->IF = 0;
nec_state->DF = 0;
- nec_state->MF = 1; // brkem should set to 0 when implemented
+ nec_state->MF = 1; // brkem should set to 0 when implemented
nec_state->SignVal = 0;
nec_state->AuxVal = 0;
nec_state->OverVal = 0;
@@ -232,16 +232,16 @@ static CPU_EXIT( nec )
static void nec_interrupt(nec_state_t *nec_state, unsigned int_num, INTSOURCES source)
{
- UINT32 dest_seg, dest_off;
+ UINT32 dest_seg, dest_off;
- i_pushf(nec_state);
+ i_pushf(nec_state);
nec_state->TF = nec_state->IF = 0;
- if (source == INT_IRQ) /* get vector */
+ if (source == INT_IRQ) /* get vector */
int_num = (*nec_state->irq_callback)(nec_state->device, 0);
- dest_off = read_mem_word(int_num*4);
- dest_seg = read_mem_word(int_num*4+2);
+ dest_off = read_mem_word(int_num*4);
+ dest_seg = read_mem_word(int_num*4+2);
PUSH(Sreg(PS));
PUSH(nec_state->ip);
@@ -297,7 +297,7 @@ static void set_irq_line(nec_state_t *nec_state, int irqline, int state)
break;
case INPUT_LINE_NMI:
if (nec_state->nmi_state == state) return;
- nec_state->nmi_state = state;
+ nec_state->nmi_state = state;
if (state != CLEAR_LINE)
{
nec_state->pending_irq |= NMI_IRQ;
@@ -404,7 +404,7 @@ static CPU_EXECUTE( necv )
prev_ICount = nec_state->icount;
nec_instruction[fetchop(nec_state)](nec_state);
do_prefetch(nec_state, prev_ICount);
- }
+ }
}
/* Wrappers for the different CPU types */
@@ -415,8 +415,8 @@ static CPU_INIT( v20 )
nec_init(device, irqcallback);
nec_state->fetch_xor = 0;
nec_state->chip_type=V20_TYPE;
- nec_state->prefetch_size = 4; /* 3 words */
- nec_state->prefetch_cycles = 4; /* four cycles per byte */
+ nec_state->prefetch_size = 4; /* 3 words */
+ nec_state->prefetch_cycles = 4; /* four cycles per byte */
}
static CPU_INIT( v30 )
@@ -426,8 +426,8 @@ static CPU_INIT( v30 )
nec_init(device, irqcallback);
nec_state->fetch_xor = BYTE_XOR_LE(0);
nec_state->chip_type=V30_TYPE;
- nec_state->prefetch_size = 6; /* 3 words */
- nec_state->prefetch_cycles = 2; /* two cycles per byte / four per word */
+ nec_state->prefetch_size = 6; /* 3 words */
+ nec_state->prefetch_cycles = 2; /* two cycles per byte / four per word */
}
@@ -439,9 +439,9 @@ static CPU_INIT( v33 )
nec_state->chip_type=V33_TYPE;
nec_state->prefetch_size = 6;
/* FIXME: Need information about prefetch size and cycles for V33.
- * complete guess below, nbbatman will not work
- * properly without. */
- nec_state->prefetch_cycles = 1; /* two cycles per byte / four per word */
+ * complete guess below, nbbatman will not work
+ * properly without. */
+ nec_state->prefetch_cycles = 1; /* two cycles per byte / four per word */
nec_state->fetch_xor = BYTE_XOR_LE(0);
}
@@ -459,9 +459,9 @@ static CPU_SET_INFO( nec )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(nec_state, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(nec_state, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: set_irq_line(nec_state, NEC_INPUT_LINE_POLL, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(nec_state, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(nec_state, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: set_irq_line(nec_state, NEC_INPUT_LINE_POLL, info->i); break;
case CPUINFO_INT_PC:
case CPUINFO_INT_REGISTER + NEC_PC:
@@ -475,7 +475,7 @@ static CPU_SET_INFO( nec )
nec_state->ip = info->i & 0x0000f;
}
break;
- case CPUINFO_INT_REGISTER + NEC_IP: nec_state->ip = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_IP: nec_state->ip = info->i; break;
case CPUINFO_INT_SP:
if( info->i - (Sreg(SS)<<4) < 0x10000 )
{
@@ -487,19 +487,19 @@ static CPU_SET_INFO( nec )
Wreg(SP) = info->i & 0x0000f;
}
break;
- case CPUINFO_INT_REGISTER + NEC_SP: Wreg(SP) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_FLAGS: ExpandFlags(info->i); break;
- case CPUINFO_INT_REGISTER + NEC_AW: Wreg(AW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_CW: Wreg(CW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_DW: Wreg(DW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_BW: Wreg(BW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_BP: Wreg(BP) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_IX: Wreg(IX) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_IY: Wreg(IY) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_ES: Sreg(DS1) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_CS: Sreg(PS) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_SS: Sreg(SS) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_DS: Sreg(DS0) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_SP: Wreg(SP) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_FLAGS: ExpandFlags(info->i); break;
+ case CPUINFO_INT_REGISTER + NEC_AW: Wreg(AW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_CW: Wreg(CW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_DW: Wreg(DW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_BW: Wreg(BW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_BP: Wreg(BP) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_IX: Wreg(IX) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_IY: Wreg(IY) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_ES: Sreg(DS1) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_CS: Sreg(PS) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_SS: Sreg(SS) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_DS: Sreg(DS0) = info->i; break;
}
}
@@ -517,105 +517,105 @@ static CPU_GET_INFO( nec )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(nec_state_t); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 80; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = nec_state->nmi_state; break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: info->i = nec_state->poll_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(nec_state_t); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 80; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = nec_state->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: info->i = nec_state->poll_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + NEC_PC: info->i = ((Sreg(PS)<<4) + nec_state->ip); break;
- case CPUINFO_INT_REGISTER + NEC_IP: info->i = nec_state->ip; break;
- case CPUINFO_INT_SP: info->i = (Sreg(SS)<<4) + Wreg(SP); break;
- case CPUINFO_INT_REGISTER + NEC_SP: info->i = Wreg(SP); break;
- case CPUINFO_INT_REGISTER + NEC_FLAGS: info->i = CompressFlags(); break;
- case CPUINFO_INT_REGISTER + NEC_AW: info->i = Wreg(AW); break;
- case CPUINFO_INT_REGISTER + NEC_CW: info->i = Wreg(CW); break;
- case CPUINFO_INT_REGISTER + NEC_DW: info->i = Wreg(DW); break;
- case CPUINFO_INT_REGISTER + NEC_BW: info->i = Wreg(BW); break;
- case CPUINFO_INT_REGISTER + NEC_BP: info->i = Wreg(BP); break;
- case CPUINFO_INT_REGISTER + NEC_IX: info->i = Wreg(IX); break;
- case CPUINFO_INT_REGISTER + NEC_IY: info->i = Wreg(IY); break;
- case CPUINFO_INT_REGISTER + NEC_ES: info->i = Sreg(DS1); break;
- case CPUINFO_INT_REGISTER + NEC_CS: info->i = Sreg(PS); break;
- case CPUINFO_INT_REGISTER + NEC_SS: info->i = Sreg(SS); break;
- case CPUINFO_INT_REGISTER + NEC_DS: info->i = Sreg(DS0); break;
- case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = nec_state->pending_irq; break;
+ case CPUINFO_INT_REGISTER + NEC_PC: info->i = ((Sreg(PS)<<4) + nec_state->ip); break;
+ case CPUINFO_INT_REGISTER + NEC_IP: info->i = nec_state->ip; break;
+ case CPUINFO_INT_SP: info->i = (Sreg(SS)<<4) + Wreg(SP); break;
+ case CPUINFO_INT_REGISTER + NEC_SP: info->i = Wreg(SP); break;
+ case CPUINFO_INT_REGISTER + NEC_FLAGS: info->i = CompressFlags(); break;
+ case CPUINFO_INT_REGISTER + NEC_AW: info->i = Wreg(AW); break;
+ case CPUINFO_INT_REGISTER + NEC_CW: info->i = Wreg(CW); break;
+ case CPUINFO_INT_REGISTER + NEC_DW: info->i = Wreg(DW); break;
+ case CPUINFO_INT_REGISTER + NEC_BW: info->i = Wreg(BW); break;
+ case CPUINFO_INT_REGISTER + NEC_BP: info->i = Wreg(BP); break;
+ case CPUINFO_INT_REGISTER + NEC_IX: info->i = Wreg(IX); break;
+ case CPUINFO_INT_REGISTER + NEC_IY: info->i = Wreg(IY); break;
+ case CPUINFO_INT_REGISTER + NEC_ES: info->i = Sreg(DS1); break;
+ case CPUINFO_INT_REGISTER + NEC_CS: info->i = Sreg(PS); break;
+ case CPUINFO_INT_REGISTER + NEC_SS: info->i = Sreg(SS); break;
+ case CPUINFO_INT_REGISTER + NEC_DS: info->i = Sreg(DS0); break;
+ case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = nec_state->pending_irq; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(nec); break;
- case CPUINFO_FCT_INIT: /* set per-CPU */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(nec); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(nec); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(necv); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(nec); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_state->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(nec); break;
+ case CPUINFO_FCT_INIT: /* set per-CPU */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(nec); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(nec); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(necv); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(nec); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_state->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "NEC"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V-Series"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Bryan McPhail (V25/V35 support added by Alex W. Jackson)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "NEC"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V-Series"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Bryan McPhail (V25/V35 support added by Alex W. Jackson)"); break;
case CPUINFO_STR_FLAGS:
- flags = CompressFlags();
- sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
- flags & 0x8000 ? 'N':'E',
- flags & 0x4000 ? '?':'.',
- flags & 0x2000 ? '?':'.',
- flags & 0x1000 ? '?':'.',
- flags & 0x0800 ? 'O':'.',
- flags & 0x0400 ? 'D':'.',
- flags & 0x0200 ? 'I':'.',
- flags & 0x0100 ? 'T':'.',
- flags & 0x0080 ? 'S':'.',
- flags & 0x0040 ? 'Z':'.',
- flags & 0x0020 ? '?':'.',
- flags & 0x0010 ? 'A':'.',
- flags & 0x0008 ? '?':'.',
- flags & 0x0004 ? 'P':'.',
- flags & 0x0002 ? '.':'?',
- flags & 0x0001 ? 'C':'.');
- break;
-
- case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%05X", (Sreg(PS)<<4) + nec_state->ip); break;
- case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s, "IP:%04X", nec_state->ip); break;
- case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", Wreg(SP)); break;
- case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s, "F:%04X", CompressFlags()); break;
- case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", Wreg(AW)); break;
- case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", Wreg(CW)); break;
- case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", Wreg(DW)); break;
- case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", Wreg(BW)); break;
- case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", Wreg(BP)); break;
- case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", Wreg(IX)); break;
- case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", Wreg(IY)); break;
- case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "DS1:%04X", Sreg(DS1)); break;
- case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "PS:%04X", Sreg(PS)); break;
- case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", Sreg(SS)); break;
- case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS0:%04X", Sreg(DS0)); break;
+ flags = CompressFlags();
+ sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
+ flags & 0x8000 ? 'N':'E',
+ flags & 0x4000 ? '?':'.',
+ flags & 0x2000 ? '?':'.',
+ flags & 0x1000 ? '?':'.',
+ flags & 0x0800 ? 'O':'.',
+ flags & 0x0400 ? 'D':'.',
+ flags & 0x0200 ? 'I':'.',
+ flags & 0x0100 ? 'T':'.',
+ flags & 0x0080 ? 'S':'.',
+ flags & 0x0040 ? 'Z':'.',
+ flags & 0x0020 ? '?':'.',
+ flags & 0x0010 ? 'A':'.',
+ flags & 0x0008 ? '?':'.',
+ flags & 0x0004 ? 'P':'.',
+ flags & 0x0002 ? '.':'?',
+ flags & 0x0001 ? 'C':'.');
+ break;
+
+ case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%05X", (Sreg(PS)<<4) + nec_state->ip); break;
+ case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s, "IP:%04X", nec_state->ip); break;
+ case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", Wreg(SP)); break;
+ case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s, "F:%04X", CompressFlags()); break;
+ case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", Wreg(AW)); break;
+ case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", Wreg(CW)); break;
+ case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", Wreg(DW)); break;
+ case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", Wreg(BW)); break;
+ case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", Wreg(BP)); break;
+ case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", Wreg(IX)); break;
+ case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", Wreg(IY)); break;
+ case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "DS1:%04X", Sreg(DS1)); break;
+ case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "PS:%04X", Sreg(PS)); break;
+ case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", Sreg(SS)); break;
+ case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS0:%04X", Sreg(DS0)); break;
}
}
@@ -629,16 +629,16 @@ CPU_GET_INFO( v20 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v20); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v20); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V20"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V20"); break;
- default: CPU_GET_INFO_CALL(nec); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
@@ -652,12 +652,12 @@ CPU_GET_INFO( v30 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v30); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v30); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V30"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V30"); break;
- default: CPU_GET_INFO_CALL(nec); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
@@ -671,12 +671,12 @@ CPU_GET_INFO( v33 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v33); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v33); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V33"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V33"); break;
- default: CPU_GET_INFO_CALL(nec); break;
+ default: CPU_GET_INFO_CALL(nec); break;
}
}
diff --git a/src/emu/cpu/nec/nec.h b/src/emu/cpu/nec/nec.h
index 06a624cf612..4d181b81115 100644
--- a/src/emu/cpu/nec/nec.h
+++ b/src/emu/cpu/nec/nec.h
@@ -5,7 +5,7 @@
struct nec_config
{
- const UINT8* v25v35_decryptiontable; // internal decryption table
+ const UINT8* v25v35_decryptiontable; // internal decryption table
};
#define NEC_INPUT_LINE_INTP0 10
diff --git a/src/emu/cpu/nec/necdasm.c b/src/emu/cpu/nec/necdasm.c
index 21b964a2984..b0a69a0e185 100644
--- a/src/emu/cpu/nec/necdasm.c
+++ b/src/emu/cpu/nec/necdasm.c
@@ -9,7 +9,7 @@
struct nec_config
{
- const UINT8* v25v35_decryptiontable; // internal decryption table
+ const UINT8* v25v35_decryptiontable; // internal decryption table
};
/* default configuration */
@@ -22,27 +22,27 @@ static const nec_config *Iconfig;
enum
{
- PARAM_REG8 = 1, /* 8-bit register */
- PARAM_REG16, /* 16-bit register */
- PARAM_REG2_8, /* 8-bit register */
- PARAM_REG2_16, /* 16-bit register */
- PARAM_RM8, /* 8-bit memory or register */
- PARAM_RM16, /* 16-bit memory or register */
- PARAM_RMPTR8, /* 8-bit memory or register */
- PARAM_RMPTR16, /* 16-bit memory or register */
- PARAM_I3, /* 3-bit immediate */
- PARAM_I4, /* 4-bit immediate */
- PARAM_I8, /* 8-bit signed immediate */
- PARAM_I16, /* 16-bit signed immediate */
- PARAM_UI8, /* 8-bit unsigned immediate */
- PARAM_IMM, /* 16-bit immediate */
- PARAM_ADDR, /* 16:16 address */
- PARAM_REL8, /* 8-bit PC-relative displacement */
- PARAM_REL16, /* 16-bit PC-relative displacement */
- PARAM_MEM_OFFS, /* 16-bit mem offset */
- PARAM_SREG, /* segment register */
- PARAM_SFREG, /* V25/V35 special function register */
- PARAM_1, /* used by shift/rotate instructions */
+ PARAM_REG8 = 1, /* 8-bit register */
+ PARAM_REG16, /* 16-bit register */
+ PARAM_REG2_8, /* 8-bit register */
+ PARAM_REG2_16, /* 16-bit register */
+ PARAM_RM8, /* 8-bit memory or register */
+ PARAM_RM16, /* 16-bit memory or register */
+ PARAM_RMPTR8, /* 8-bit memory or register */
+ PARAM_RMPTR16, /* 16-bit memory or register */
+ PARAM_I3, /* 3-bit immediate */
+ PARAM_I4, /* 4-bit immediate */
+ PARAM_I8, /* 8-bit signed immediate */
+ PARAM_I16, /* 16-bit signed immediate */
+ PARAM_UI8, /* 8-bit unsigned immediate */
+ PARAM_IMM, /* 16-bit immediate */
+ PARAM_ADDR, /* 16:16 address */
+ PARAM_REL8, /* 8-bit PC-relative displacement */
+ PARAM_REL16, /* 16-bit PC-relative displacement */
+ PARAM_MEM_OFFS, /* 16-bit mem offset */
+ PARAM_SREG, /* segment register */
+ PARAM_SFREG, /* V25/V35 special function register */
+ PARAM_1, /* used by shift/rotate instructions */
PARAM_AL,
PARAM_CL,
PARAM_DL,
@@ -94,726 +94,726 @@ static const UINT8 *opcode_ptr_base;
static const I386_OPCODE necv_opcode_table1[256] =
{
// 0x00
- {"add", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"add", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"add", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"add", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"add", 0, PARAM_AL, PARAM_UI8, 0 },
- {"add", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ds1", 0, 0, 0, 0 },
- {"pop ds1", 0, 0, 0, 0 },
- {"or", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"or", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"or", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"or", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"or", 0, PARAM_AL, PARAM_UI8, 0 },
- {"or", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ps", 0, 0, 0, 0 },
- {"two_byte", TWO_BYTE, 0, 0, 0 },
+ {"add", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"add", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"add", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"add", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"add", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"add", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"push ds1", 0, 0, 0, 0 },
+ {"pop ds1", 0, 0, 0, 0 },
+ {"or", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"or", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"or", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"or", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"or", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"or", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"push ps", 0, 0, 0, 0 },
+ {"two_byte", TWO_BYTE, 0, 0, 0 },
// 0x10
- {"addc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"addc", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"addc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"addc", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"addc", 0, PARAM_AL, PARAM_UI8, 0 },
- {"addc", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ss", 0, 0, 0, 0 },
- {"pop ss", 0, 0, 0, 0 },
- {"subc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"subc", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"subc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"subc", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"subc", 0, PARAM_AL, PARAM_UI8, 0 },
- {"subc", 0, PARAM_AW, PARAM_IMM, 0 },
- {"push ds0", 0, 0, 0, 0 },
- {"pop ds0", 0, 0, 0, 0 },
+ {"addc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"addc", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"addc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"addc", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"addc", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"addc", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"push ss", 0, 0, 0, 0 },
+ {"pop ss", 0, 0, 0, 0 },
+ {"subc", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"subc", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"subc", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"subc", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"subc", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"subc", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"push ds0", 0, 0, 0, 0 },
+ {"pop ds0", 0, 0, 0, 0 },
// 0x20
- {"and", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"and", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"and", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"and", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"and", 0, PARAM_AL, PARAM_UI8, 0 },
- {"and", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ds1:", SEG_DS1, 0, 0, 0 },
- {"adj4a", 0, 0, 0, 0 },
- {"sub", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"sub", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"sub", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"sub", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"sub", 0, PARAM_AL, PARAM_UI8, 0 },
- {"sub", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ps:", SEG_PS, 0, 0, 0 },
- {"adj4s", 0, 0, 0, 0 },
+ {"and", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"and", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"and", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"and", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"and", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"and", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"ds1:", SEG_DS1, 0, 0, 0 },
+ {"adj4a", 0, 0, 0, 0 },
+ {"sub", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"sub", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"sub", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"sub", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"sub", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"sub", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"ps:", SEG_PS, 0, 0, 0 },
+ {"adj4s", 0, 0, 0, 0 },
// 0x30
- {"xor", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"xor", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"xor", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"xor", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"xor", 0, PARAM_AL, PARAM_UI8, 0 },
- {"xor", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ss:", SEG_SS, 0, 0, 0 },
- {"adjba", 0, 0, 0, 0 },
- {"cmp", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"cmp", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"cmp", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"cmp", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"cmp", 0, PARAM_AL, PARAM_UI8, 0 },
- {"cmp", 0, PARAM_AW, PARAM_IMM, 0 },
- {"ds0:", SEG_DS0, 0, 0, 0 },
- {"adjbs", 0, 0, 0, 0 },
+ {"xor", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"xor", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"xor", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"xor", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"xor", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"xor", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"ss:", SEG_SS, 0, 0, 0 },
+ {"adjba", 0, 0, 0, 0 },
+ {"cmp", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"cmp", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"cmp", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"cmp", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"cmp", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"cmp", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"ds0:", SEG_DS0, 0, 0, 0 },
+ {"adjbs", 0, 0, 0, 0 },
// 0x40
- {"inc", 0, PARAM_AW, 0, 0 },
- {"inc", 0, PARAM_CW, 0, 0 },
- {"inc", 0, PARAM_DW, 0, 0 },
- {"inc", 0, PARAM_BW, 0, 0 },
- {"inc", 0, PARAM_SP, 0, 0 },
- {"inc", 0, PARAM_BP, 0, 0 },
- {"inc", 0, PARAM_IX, 0, 0 },
- {"inc", 0, PARAM_IY, 0, 0 },
- {"dec", 0, PARAM_AW, 0, 0 },
- {"dec", 0, PARAM_CW, 0, 0 },
- {"dec", 0, PARAM_DW, 0, 0 },
- {"dec", 0, PARAM_BW, 0, 0 },
- {"dec", 0, PARAM_SP, 0, 0 },
- {"dec", 0, PARAM_BP, 0, 0 },
- {"dec", 0, PARAM_IX, 0, 0 },
- {"dec", 0, PARAM_IY, 0, 0 },
+ {"inc", 0, PARAM_AW, 0, 0 },
+ {"inc", 0, PARAM_CW, 0, 0 },
+ {"inc", 0, PARAM_DW, 0, 0 },
+ {"inc", 0, PARAM_BW, 0, 0 },
+ {"inc", 0, PARAM_SP, 0, 0 },
+ {"inc", 0, PARAM_BP, 0, 0 },
+ {"inc", 0, PARAM_IX, 0, 0 },
+ {"inc", 0, PARAM_IY, 0, 0 },
+ {"dec", 0, PARAM_AW, 0, 0 },
+ {"dec", 0, PARAM_CW, 0, 0 },
+ {"dec", 0, PARAM_DW, 0, 0 },
+ {"dec", 0, PARAM_BW, 0, 0 },
+ {"dec", 0, PARAM_SP, 0, 0 },
+ {"dec", 0, PARAM_BP, 0, 0 },
+ {"dec", 0, PARAM_IX, 0, 0 },
+ {"dec", 0, PARAM_IY, 0, 0 },
// 0x50
- {"push", 0, PARAM_AW, 0, 0 },
- {"push", 0, PARAM_CW, 0, 0 },
- {"push", 0, PARAM_DW, 0, 0 },
- {"push", 0, PARAM_BW, 0, 0 },
- {"push", 0, PARAM_SP, 0, 0 },
- {"push", 0, PARAM_BP, 0, 0 },
- {"push", 0, PARAM_IX, 0, 0 },
- {"push", 0, PARAM_IY, 0, 0 },
- {"pop", 0, PARAM_AW, 0, 0 },
- {"pop", 0, PARAM_CW, 0, 0 },
- {"pop", 0, PARAM_DW, 0, 0 },
- {"pop", 0, PARAM_BW, 0, 0 },
- {"pop", 0, PARAM_SP, 0, 0 },
- {"pop", 0, PARAM_BP, 0, 0 },
- {"pop", 0, PARAM_IX, 0, 0 },
- {"pop", 0, PARAM_IY, 0, 0 },
+ {"push", 0, PARAM_AW, 0, 0 },
+ {"push", 0, PARAM_CW, 0, 0 },
+ {"push", 0, PARAM_DW, 0, 0 },
+ {"push", 0, PARAM_BW, 0, 0 },
+ {"push", 0, PARAM_SP, 0, 0 },
+ {"push", 0, PARAM_BP, 0, 0 },
+ {"push", 0, PARAM_IX, 0, 0 },
+ {"push", 0, PARAM_IY, 0, 0 },
+ {"pop", 0, PARAM_AW, 0, 0 },
+ {"pop", 0, PARAM_CW, 0, 0 },
+ {"pop", 0, PARAM_DW, 0, 0 },
+ {"pop", 0, PARAM_BW, 0, 0 },
+ {"pop", 0, PARAM_SP, 0, 0 },
+ {"pop", 0, PARAM_BP, 0, 0 },
+ {"pop", 0, PARAM_IX, 0, 0 },
+ {"pop", 0, PARAM_IY, 0, 0 },
// 0x60
- {"push r", 0, 0, 0, 0 },
- {"pop r", 0, 0, 0, 0 },
- {"chkind", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"brkn", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
- {"repnc", PREFIX, 0, 0, 0 },
- {"repc", PREFIX, 0, 0, 0 },
- {"fpo2 0", 0, 0, 0, 0 }, /* for a coprocessor that was never made */
- {"fpo2 1", 0, 0, 0, 0 }, /* for a coprocessor that was never made */
- {"push", 0, PARAM_IMM, 0, 0 },
- {"mul", MODRM, PARAM_REG16, PARAM_RM16, PARAM_IMM },
- {"push", 0, PARAM_I8, 0, 0 },
- {"mul", MODRM, PARAM_REG16, PARAM_RM16, PARAM_I8 },
- {"inmb", 0, 0, 0, 0 },
- {"inmw", 0, 0, 0, 0 },
- {"outmb", 0, 0, 0, 0 },
- {"outmw", 0, 0, 0, 0 },
+ {"push r", 0, 0, 0, 0 },
+ {"pop r", 0, 0, 0, 0 },
+ {"chkind", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"brkn", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
+ {"repnc", PREFIX, 0, 0, 0 },
+ {"repc", PREFIX, 0, 0, 0 },
+ {"fpo2 0", 0, 0, 0, 0 }, /* for a coprocessor that was never made */
+ {"fpo2 1", 0, 0, 0, 0 }, /* for a coprocessor that was never made */
+ {"push", 0, PARAM_IMM, 0, 0 },
+ {"mul", MODRM, PARAM_REG16, PARAM_RM16, PARAM_IMM },
+ {"push", 0, PARAM_I8, 0, 0 },
+ {"mul", MODRM, PARAM_REG16, PARAM_RM16, PARAM_I8 },
+ {"inmb", 0, 0, 0, 0 },
+ {"inmw", 0, 0, 0, 0 },
+ {"outmb", 0, 0, 0, 0 },
+ {"outmw", 0, 0, 0, 0 },
// 0x70
- {"bv", 0, PARAM_REL8, 0, 0 },
- {"bnv", 0, PARAM_REL8, 0, 0 },
- {"bc", 0, PARAM_REL8, 0, 0 },
- {"bnc", 0, PARAM_REL8, 0, 0 },
- {"be", 0, PARAM_REL8, 0, 0 },
- {"bne", 0, PARAM_REL8, 0, 0 },
- {"bnh", 0, PARAM_REL8, 0, 0 },
- {"bh", 0, PARAM_REL8, 0, 0 },
- {"bn", 0, PARAM_REL8, 0, 0 },
- {"bp", 0, PARAM_REL8, 0, 0 },
- {"bpe", 0, PARAM_REL8, 0, 0 },
- {"bpo", 0, PARAM_REL8, 0, 0 },
- {"blt", 0, PARAM_REL8, 0, 0 },
- {"bge", 0, PARAM_REL8, 0, 0 },
- {"ble", 0, PARAM_REL8, 0, 0 },
- {"bgt", 0, PARAM_REL8, 0, 0 },
+ {"bv", 0, PARAM_REL8, 0, 0 },
+ {"bnv", 0, PARAM_REL8, 0, 0 },
+ {"bc", 0, PARAM_REL8, 0, 0 },
+ {"bnc", 0, PARAM_REL8, 0, 0 },
+ {"be", 0, PARAM_REL8, 0, 0 },
+ {"bne", 0, PARAM_REL8, 0, 0 },
+ {"bnh", 0, PARAM_REL8, 0, 0 },
+ {"bh", 0, PARAM_REL8, 0, 0 },
+ {"bn", 0, PARAM_REL8, 0, 0 },
+ {"bp", 0, PARAM_REL8, 0, 0 },
+ {"bpe", 0, PARAM_REL8, 0, 0 },
+ {"bpo", 0, PARAM_REL8, 0, 0 },
+ {"blt", 0, PARAM_REL8, 0, 0 },
+ {"bge", 0, PARAM_REL8, 0, 0 },
+ {"ble", 0, PARAM_REL8, 0, 0 },
+ {"bgt", 0, PARAM_REL8, 0, 0 },
// 0x80
- {"immb", GROUP, 0, 0, 0 },
- {"immw", GROUP, 0, 0, 0 },
- {"immb", GROUP, 0, 0, 0 },
- {"immws", GROUP, 0, 0, 0 },
- {"test", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"test", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"xch", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"xch", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_RM8, PARAM_REG8, 0 },
- {"mov", MODRM, PARAM_RM16, PARAM_REG16, 0 },
- {"mov", MODRM, PARAM_REG8, PARAM_RM8, 0 },
- {"mov", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_RM16, PARAM_SREG, 0 },
- {"ldea", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_SREG, PARAM_RM16, 0 },
- {"pop", MODRM, PARAM_RM16, 0, 0 },
+ {"immb", GROUP, 0, 0, 0 },
+ {"immw", GROUP, 0, 0, 0 },
+ {"immb", GROUP, 0, 0, 0 },
+ {"immws", GROUP, 0, 0, 0 },
+ {"test", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"test", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"xch", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"xch", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"mov", MODRM, PARAM_RM8, PARAM_REG8, 0 },
+ {"mov", MODRM, PARAM_RM16, PARAM_REG16, 0 },
+ {"mov", MODRM, PARAM_REG8, PARAM_RM8, 0 },
+ {"mov", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"mov", MODRM, PARAM_RM16, PARAM_SREG, 0 },
+ {"ldea", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"mov", MODRM, PARAM_SREG, PARAM_RM16, 0 },
+ {"pop", MODRM, PARAM_RM16, 0, 0 },
// 0x90
- {"nop", 0, 0, 0, 0 },
- {"xch", 0, PARAM_AW, PARAM_CW, 0 },
- {"xch", 0, PARAM_AW, PARAM_DW, 0 },
- {"xch", 0, PARAM_AW, PARAM_BW, 0 },
- {"xch", 0, PARAM_AW, PARAM_SP, 0 },
- {"xch", 0, PARAM_AW, PARAM_BP, 0 },
- {"xch", 0, PARAM_AW, PARAM_IX, 0 },
- {"xch", 0, PARAM_AW, PARAM_IY, 0 },
- {"cvtbw", 0, 0, 0, 0 },
- {"cvtwl", 0, 0, 0, 0 },
- {"call", 0, PARAM_ADDR, 0, 0, DASMFLAG_STEP_OVER},
- {"poll", 0, 0, 0, 0 },
- {"push psw", 0, 0, 0, 0 },
- {"pop psw", 0, 0, 0, 0 },
- {"mov psw,ah", 0, 0, 0, 0 },
- {"mov ah,psw", 0, 0, 0, 0 },
+ {"nop", 0, 0, 0, 0 },
+ {"xch", 0, PARAM_AW, PARAM_CW, 0 },
+ {"xch", 0, PARAM_AW, PARAM_DW, 0 },
+ {"xch", 0, PARAM_AW, PARAM_BW, 0 },
+ {"xch", 0, PARAM_AW, PARAM_SP, 0 },
+ {"xch", 0, PARAM_AW, PARAM_BP, 0 },
+ {"xch", 0, PARAM_AW, PARAM_IX, 0 },
+ {"xch", 0, PARAM_AW, PARAM_IY, 0 },
+ {"cvtbw", 0, 0, 0, 0 },
+ {"cvtwl", 0, 0, 0, 0 },
+ {"call", 0, PARAM_ADDR, 0, 0, DASMFLAG_STEP_OVER},
+ {"poll", 0, 0, 0, 0 },
+ {"push psw", 0, 0, 0, 0 },
+ {"pop psw", 0, 0, 0, 0 },
+ {"mov psw,ah", 0, 0, 0, 0 },
+ {"mov ah,psw", 0, 0, 0, 0 },
// 0xa0
- {"mov", 0, PARAM_AL, PARAM_MEM_OFFS, 0 },
- {"mov", 0, PARAM_AW, PARAM_MEM_OFFS, 0 },
- {"mov", 0, PARAM_MEM_OFFS, PARAM_AL, 0 },
- {"mov", 0, PARAM_MEM_OFFS, PARAM_AW, 0 },
- {"movbkb", 0, 0, 0, 0 },
- {"movbkw", 0, 0, 0, 0 },
- {"cmpbkb", 0, 0, 0, 0 },
- {"cmpbkw", 0, 0, 0, 0 },
- {"test", 0, PARAM_AL, PARAM_UI8, 0 },
- {"test", 0, PARAM_AW, PARAM_IMM, 0 },
- {"stmb", 0, 0, 0, 0 },
- {"stmw", 0, 0, 0, 0 },
- {"ldmb", 0, 0, 0, 0 },
- {"ldmw", 0, 0, 0, 0 },
- {"cmpmb", 0, 0, 0, 0 },
- {"cmpmw", 0, 0, 0, 0 },
+ {"mov", 0, PARAM_AL, PARAM_MEM_OFFS, 0 },
+ {"mov", 0, PARAM_AW, PARAM_MEM_OFFS, 0 },
+ {"mov", 0, PARAM_MEM_OFFS, PARAM_AL, 0 },
+ {"mov", 0, PARAM_MEM_OFFS, PARAM_AW, 0 },
+ {"movbkb", 0, 0, 0, 0 },
+ {"movbkw", 0, 0, 0, 0 },
+ {"cmpbkb", 0, 0, 0, 0 },
+ {"cmpbkw", 0, 0, 0, 0 },
+ {"test", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"test", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"stmb", 0, 0, 0, 0 },
+ {"stmw", 0, 0, 0, 0 },
+ {"ldmb", 0, 0, 0, 0 },
+ {"ldmw", 0, 0, 0, 0 },
+ {"cmpmb", 0, 0, 0, 0 },
+ {"cmpmw", 0, 0, 0, 0 },
// 0xb0
- {"mov", 0, PARAM_AL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_CL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_DL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_BL, PARAM_UI8, 0 },
- {"mov", 0, PARAM_AH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_CH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_DH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_BH, PARAM_UI8, 0 },
- {"mov", 0, PARAM_AW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_CW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_DW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_BW, PARAM_IMM, 0 },
- {"mov", 0, PARAM_SP, PARAM_IMM, 0 },
- {"mov", 0, PARAM_BP, PARAM_IMM, 0 },
- {"mov", 0, PARAM_IX, PARAM_IMM, 0 },
- {"mov", 0, PARAM_IY, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_CL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_DL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_BL, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_AH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_CH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_DH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_BH, PARAM_UI8, 0 },
+ {"mov", 0, PARAM_AW, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_CW, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_DW, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_BW, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_SP, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_BP, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_IX, PARAM_IMM, 0 },
+ {"mov", 0, PARAM_IY, PARAM_IMM, 0 },
// 0xc0
- {"shiftbi", GROUP, 0, 0, 0 },
- {"shiftwi", GROUP, 0, 0, 0 },
- {"ret", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
- {"ret", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
- {"mov ds1,", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov ds0,", MODRM, PARAM_REG16, PARAM_RM16, 0 },
- {"mov", MODRM, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"mov", MODRM, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"prepare", 0, PARAM_I16, PARAM_UI8, 0 },
- {"dispose", 0, 0, 0, 0 },
- {"retf", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
- {"retf", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
- {"brk 3", 0, 0, 0, 0, DASMFLAG_STEP_OVER},
- {"brk", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER},
- {"brkv", 0, 0, 0, 0 },
- {"reti", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {"shiftbi", GROUP, 0, 0, 0 },
+ {"shiftwi", GROUP, 0, 0, 0 },
+ {"ret", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
+ {"ret", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {"mov ds1,", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"mov ds0,", MODRM, PARAM_REG16, PARAM_RM16, 0 },
+ {"mov", MODRM, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"mov", MODRM, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"prepare", 0, PARAM_I16, PARAM_UI8, 0 },
+ {"dispose", 0, 0, 0, 0 },
+ {"retf", 0, PARAM_I16, 0, 0, DASMFLAG_STEP_OUT},
+ {"retf", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
+ {"brk 3", 0, 0, 0, 0, DASMFLAG_STEP_OVER},
+ {"brk", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER},
+ {"brkv", 0, 0, 0, 0 },
+ {"reti", 0, 0, 0, 0, DASMFLAG_STEP_OUT},
// 0xd0
- {"shiftb", GROUP, 0, 0, 0 },
- {"shiftw", GROUP, 0, 0, 0 },
- {"shiftbv", GROUP, 0, 0, 0 },
- {"shiftwv", GROUP, 0, 0, 0 },
- {"cvtbd", 0, PARAM_I8, 0, 0 },
- {"cvtdb", 0, PARAM_I8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"trans", 0, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
- {"escape", FPU, 0, 0, 0 },
+ {"shiftb", GROUP, 0, 0, 0 },
+ {"shiftw", GROUP, 0, 0, 0 },
+ {"shiftbv", GROUP, 0, 0, 0 },
+ {"shiftwv", GROUP, 0, 0, 0 },
+ {"cvtbd", 0, PARAM_I8, 0, 0 },
+ {"cvtdb", 0, PARAM_I8, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"trans", 0, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
+ {"escape", FPU, 0, 0, 0 },
// 0xe0
- {"dbnzne", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"dbnze", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"dbnz", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
- {"bcwz", 0, PARAM_REL8, 0, 0 },
- {"in", 0, PARAM_AL, PARAM_UI8, 0 },
- {"in", 0, PARAM_AW, PARAM_UI8, 0 },
- {"out", 0, PARAM_UI8, PARAM_AL, 0 },
- {"out", 0, PARAM_UI8, PARAM_AW, 0 },
- {"call", 0, PARAM_REL16, 0, 0, DASMFLAG_STEP_OVER},
- {"br", 0, PARAM_REL16, 0, 0 },
- {"br", 0, PARAM_ADDR, 0, 0 },
- {"br", 0, PARAM_REL8, 0, 0 },
- {"in", 0, PARAM_AL, PARAM_DW, 0 },
- {"in", 0, PARAM_AW, PARAM_DW, 0 },
- {"out", 0, PARAM_DW, PARAM_AL, 0 },
- {"out", 0, PARAM_DW, PARAM_AW, 0 },
+ {"dbnzne", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {"dbnze", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {"dbnz", 0, PARAM_REL8, 0, 0, DASMFLAG_STEP_OVER},
+ {"bcwz", 0, PARAM_REL8, 0, 0 },
+ {"in", 0, PARAM_AL, PARAM_UI8, 0 },
+ {"in", 0, PARAM_AW, PARAM_UI8, 0 },
+ {"out", 0, PARAM_UI8, PARAM_AL, 0 },
+ {"out", 0, PARAM_UI8, PARAM_AW, 0 },
+ {"call", 0, PARAM_REL16, 0, 0, DASMFLAG_STEP_OVER},
+ {"br", 0, PARAM_REL16, 0, 0 },
+ {"br", 0, PARAM_ADDR, 0, 0 },
+ {"br", 0, PARAM_REL8, 0, 0 },
+ {"in", 0, PARAM_AL, PARAM_DW, 0 },
+ {"in", 0, PARAM_AW, PARAM_DW, 0 },
+ {"out", 0, PARAM_DW, PARAM_AL, 0 },
+ {"out", 0, PARAM_DW, PARAM_AW, 0 },
// 0xf0
- {"buslock", PREFIX, 0, 0, 0 },
- {"brks", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
- {"repne", PREFIX, 0, 0, 0 },
- {"rep", PREFIX, 0, 0, 0 },
- {"halt", 0, 0, 0, 0 },
- {"not1 cy", 0, 0, 0, 0 },
- {"group1b", GROUP, 0, 0, 0 },
- {"group1w", GROUP, 0, 0, 0 },
- {"clr1 cy", 0, 0, 0, 0 },
- {"set1 cy", 0, 0, 0, 0 },
- {"di", 0, 0, 0, 0 },
- {"ei", 0, 0, 0, 0 },
- {"clr1 dir", 0, 0, 0, 0 },
- {"set1 dir", 0, 0, 0, 0 },
- {"group2b", GROUP, 0, 0, 0 },
- {"group2w", GROUP, 0, 0, 0 }
+ {"buslock", PREFIX, 0, 0, 0 },
+ {"brks", 0, PARAM_UI8, 0, 0, DASMFLAG_STEP_OVER}, /* V25S/V35S only */
+ {"repne", PREFIX, 0, 0, 0 },
+ {"rep", PREFIX, 0, 0, 0 },
+ {"halt", 0, 0, 0, 0 },
+ {"not1 cy", 0, 0, 0, 0 },
+ {"group1b", GROUP, 0, 0, 0 },
+ {"group1w", GROUP, 0, 0, 0 },
+ {"clr1 cy", 0, 0, 0, 0 },
+ {"set1 cy", 0, 0, 0, 0 },
+ {"di", 0, 0, 0, 0 },
+ {"ei", 0, 0, 0, 0 },
+ {"clr1 dir", 0, 0, 0, 0 },
+ {"set1 dir", 0, 0, 0, 0 },
+ {"group2b", GROUP, 0, 0, 0 },
+ {"group2w", GROUP, 0, 0, 0 }
};
static const I386_OPCODE necv_opcode_table2[256] =
{
// 0x00
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x10
- {"test1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"test1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"clr1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"clr1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"set1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"set1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"not1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
- {"not1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
- {"test1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"test1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
- {"clr1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"clr1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
- {"set1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"set1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
- {"not1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
- {"not1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {"test1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"test1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"clr1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"clr1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"set1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"set1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"not1", MODRM, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"not1", MODRM, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"test1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {"test1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {"clr1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {"clr1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {"set1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {"set1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
+ {"not1", MODRM, PARAM_RMPTR8, PARAM_I3, 0 },
+ {"not1", MODRM, PARAM_RMPTR16, PARAM_I4, 0 },
// 0x20
- {"add4s", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"sub4s", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"movspa", 0, 0, 0, 0 }, /* V25/V35 only */
- {"cmp4s", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"rol4", MODRM, PARAM_RMPTR8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"ror4", MODRM, PARAM_RMPTR8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"brkcs", MODRM, PARAM_REG2_16, 0, 0, DASMFLAG_STEP_OVER}, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"add4s", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"sub4s", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"movspa", 0, 0, 0, 0 }, /* V25/V35 only */
+ {"cmp4s", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"rol4", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"ror4", MODRM, PARAM_RMPTR8, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"brkcs", MODRM, PARAM_REG2_16, 0, 0, DASMFLAG_STEP_OVER}, /* V25/V35 only */
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x30
- {"???", 0, 0, 0, 0 },
- {"ins", MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
- {"???", 0, 0, 0, 0 },
- {"ext", MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"ins", MODRM, PARAM_REG2_8, PARAM_I4, 0 },
- {"???", 0, 0, 0, 0 },
- {"ext", MODRM, PARAM_REG2_8, PARAM_I4, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"ins", MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"ext", MODRM, PARAM_REG2_8, PARAM_REG8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"ins", MODRM, PARAM_REG2_8, PARAM_I4, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"ext", MODRM, PARAM_REG2_8, PARAM_I4, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x40
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x50
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x60
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x70
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x80
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0x90
- {"???", 0, 0, 0, 0 },
- {"retrbi", 0, 0, 0, 0 }, /* V25/V35 only */
- {"fint", 0, 0, 0, 0 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"tsksw", MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
- {"movspb", MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"btclr", 0, PARAM_SFREG, PARAM_I3, PARAM_REL8 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
- {"stop", 0, 0, 0, 0 }, /* V25/V35 only */
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"retrbi", 0, 0, 0, 0 }, /* V25/V35 only */
+ {"fint", 0, 0, 0, 0 }, /* V25/V35 only */
+ {"???", 0, 0, 0, 0 },
+ {"tsksw", MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
+ {"movspb", MODRM, PARAM_REG2_16, 0, 0 }, /* V25/V35 only */
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"btclr", 0, PARAM_SFREG, PARAM_I3, PARAM_REL8 }, /* V25/V35 only */
+ {"???", 0, 0, 0, 0 },
+ {"stop", 0, 0, 0, 0 }, /* V25/V35 only */
+ {"???", 0, 0, 0, 0 },
// 0xa0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xb0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xc0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xd0
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xe0
- {"brkxa", 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
+ {"brkxa", 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
// 0xf0
- {"retxa", 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"brkem", 0, PARAM_UI8, 0, 0 } /* V20,30,40,50 only */
+ {"retxa", 0, PARAM_UI8, 0, 0 }, /* V33,53 only */
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"brkem", 0, PARAM_UI8, 0, 0 } /* V20,30,40,50 only */
};
static const I386_OPCODE immb_table[8] =
{
- {"add", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"or", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"addc", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"subc", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"and", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"sub", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"xor", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"cmp", 0, PARAM_RMPTR8, PARAM_UI8, 0 }
+ {"add", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"or", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"addc", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"subc", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"and", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"sub", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"xor", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"cmp", 0, PARAM_RMPTR8, PARAM_UI8, 0 }
};
static const I386_OPCODE immw_table[8] =
{
- {"add", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"or", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"addc", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"subc", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"and", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"sub", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"xor", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"cmp", 0, PARAM_RMPTR16, PARAM_IMM, 0 }
+ {"add", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"or", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"addc", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"subc", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"and", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"sub", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"xor", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"cmp", 0, PARAM_RMPTR16, PARAM_IMM, 0 }
};
static const I386_OPCODE immws_table[8] =
{
- {"add", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"or", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"addc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"subc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"and", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"sub", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"xor", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"cmp", 0, PARAM_RMPTR16, PARAM_I8, 0 }
+ {"add", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"or", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"addc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"subc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"and", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"sub", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"xor", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"cmp", 0, PARAM_RMPTR16, PARAM_I8, 0 }
};
static const I386_OPCODE shiftbi_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"rolc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"rorc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"???", 0, PARAM_RMPTR8, PARAM_I8, 0 },
- {"shra", 0, PARAM_RMPTR8, PARAM_I8, 0 }
+ {"rol", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"ror", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"rolc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"rorc", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"shl", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"shr", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"???", 0, PARAM_RMPTR8, PARAM_I8, 0 },
+ {"shra", 0, PARAM_RMPTR8, PARAM_I8, 0 }
};
static const I386_OPCODE shiftwi_table[8] =
{
- {"rol", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"ror", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"rolc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"rorc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"shl", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"shr", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"???", 0, PARAM_RMPTR16, PARAM_I8, 0 },
- {"shra", 0, PARAM_RMPTR16, PARAM_I8, 0 }
+ {"rol", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"ror", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"rolc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"rorc", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"shl", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"shr", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"???", 0, PARAM_RMPTR16, PARAM_I8, 0 },
+ {"shra", 0, PARAM_RMPTR16, PARAM_I8, 0 }
};
static const I386_OPCODE shiftb_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"rolc", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"rorc", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"???", 0, PARAM_RMPTR8, PARAM_1, 0 },
- {"shra", 0, PARAM_RMPTR8, PARAM_1, 0 }
+ {"rol", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"ror", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"rolc", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"rorc", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"shl", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"shr", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"???", 0, PARAM_RMPTR8, PARAM_1, 0 },
+ {"shra", 0, PARAM_RMPTR8, PARAM_1, 0 }
};
static const I386_OPCODE shiftw_table[8] =
{
- {"rol", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"ror", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"rolc", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"rorc", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"shl", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"shr", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"???", 0, PARAM_RMPTR16, PARAM_1, 0 },
- {"shra", 0, PARAM_RMPTR16, PARAM_1, 0 }
+ {"rol", 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {"ror", 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {"rolc", 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {"rorc", 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {"shl", 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {"shr", 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {"???", 0, PARAM_RMPTR16, PARAM_1, 0 },
+ {"shra", 0, PARAM_RMPTR16, PARAM_1, 0 }
};
static const I386_OPCODE shiftbv_table[8] =
{
- {"rol", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"ror", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"rolc", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"rorc", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shl", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shr", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"???", 0, PARAM_RMPTR8, PARAM_CL, 0 },
- {"shra", 0, PARAM_RMPTR8, PARAM_CL, 0 }
+ {"rol", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"ror", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"rolc", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"rorc", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"shl", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"shr", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"???", 0, PARAM_RMPTR8, PARAM_CL, 0 },
+ {"shra", 0, PARAM_RMPTR8, PARAM_CL, 0 }
};
static const I386_OPCODE shiftwv_table[8] =
{
- {"rol", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"ror", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"rolc", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"rorc", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"shl", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"shr", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"???", 0, PARAM_RMPTR16, PARAM_CL, 0 },
- {"shra", 0, PARAM_RMPTR16, PARAM_CL, 0 }
+ {"rol", 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"ror", 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"rolc", 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"rorc", 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"shl", 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"shr", 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"???", 0, PARAM_RMPTR16, PARAM_CL, 0 },
+ {"shra", 0, PARAM_RMPTR16, PARAM_CL, 0 }
};
static const I386_OPCODE group1b_table[8] =
{
- {"test", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
- {"???", 0, 0, 0, 0 },
- {"not", 0, PARAM_RMPTR8, 0, 0 },
- {"neg", 0, PARAM_RMPTR8, 0, 0 },
- {"mulu", 0, PARAM_RMPTR8, 0, 0 },
- {"mul", 0, PARAM_RMPTR8, 0, 0 },
- {"divu", 0, PARAM_RMPTR8, 0, 0 },
- {"div", 0, PARAM_RMPTR8, 0, 0 }
+ {"test", 0, PARAM_RMPTR8, PARAM_UI8, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"not", 0, PARAM_RMPTR8, 0, 0 },
+ {"neg", 0, PARAM_RMPTR8, 0, 0 },
+ {"mulu", 0, PARAM_RMPTR8, 0, 0 },
+ {"mul", 0, PARAM_RMPTR8, 0, 0 },
+ {"divu", 0, PARAM_RMPTR8, 0, 0 },
+ {"div", 0, PARAM_RMPTR8, 0, 0 }
};
static const I386_OPCODE group1w_table[8] =
{
- {"test", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
- {"???", 0, 0, 0, 0 },
- {"not", 0, PARAM_RMPTR16, 0, 0 },
- {"neg", 0, PARAM_RMPTR16, 0, 0 },
- {"mulu", 0, PARAM_RMPTR16, 0, 0 },
- {"mul", 0, PARAM_RMPTR16, 0, 0 },
- {"divu", 0, PARAM_RMPTR16, 0, 0 },
- {"div", 0, PARAM_RMPTR16, 0, 0 }
+ {"test", 0, PARAM_RMPTR16, PARAM_IMM, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"not", 0, PARAM_RMPTR16, 0, 0 },
+ {"neg", 0, PARAM_RMPTR16, 0, 0 },
+ {"mulu", 0, PARAM_RMPTR16, 0, 0 },
+ {"mul", 0, PARAM_RMPTR16, 0, 0 },
+ {"divu", 0, PARAM_RMPTR16, 0, 0 },
+ {"div", 0, PARAM_RMPTR16, 0, 0 }
};
static const I386_OPCODE group2b_table[8] =
{
- {"inc", 0, PARAM_RMPTR8, 0, 0 },
- {"dec", 0, PARAM_RMPTR8, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {"inc", 0, PARAM_RMPTR8, 0, 0 },
+ {"dec", 0, PARAM_RMPTR8, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const I386_OPCODE group2w_table[8] =
{
- {"inc", 0, PARAM_RMPTR16, 0, 0 },
- {"dec", 0, PARAM_RMPTR16, 0, 0 },
- {"call", 0, PARAM_RMPTR16, 0, 0, DASMFLAG_STEP_OVER},
- {"call far ptr ",0, PARAM_RM16, 0, 0, DASMFLAG_STEP_OVER},
- {"br", 0, PARAM_RMPTR16, 0, 0 },
- {"br far ptr ",0, PARAM_RM16, 0, 0 },
- {"push", 0, PARAM_RMPTR16, 0, 0 },
- {"???", 0, 0, 0, 0 }
+ {"inc", 0, PARAM_RMPTR16, 0, 0 },
+ {"dec", 0, PARAM_RMPTR16, 0, 0 },
+ {"call", 0, PARAM_RMPTR16, 0, 0, DASMFLAG_STEP_OVER},
+ {"call far ptr ",0, PARAM_RM16, 0, 0, DASMFLAG_STEP_OVER},
+ {"br", 0, PARAM_RMPTR16, 0, 0 },
+ {"br far ptr ",0, PARAM_RM16, 0, 0 },
+ {"push", 0, PARAM_RMPTR16, 0, 0 },
+ {"???", 0, 0, 0, 0 }
};
static const GROUP_OP group_op_table[] =
{
- { "immb", immb_table },
- { "immw", immw_table },
- { "immws", immws_table },
- { "shiftbi", shiftbi_table },
- { "shiftwi", shiftwi_table },
- { "shiftb", shiftb_table },
- { "shiftw", shiftw_table },
- { "shiftbv", shiftbv_table },
- { "shiftwv", shiftwv_table },
- { "group1b", group1b_table },
- { "group1w", group1w_table },
- { "group2b", group2b_table },
- { "group2w", group2w_table }
+ { "immb", immb_table },
+ { "immw", immw_table },
+ { "immws", immws_table },
+ { "shiftbi", shiftbi_table },
+ { "shiftwi", shiftwi_table },
+ { "shiftb", shiftb_table },
+ { "shiftw", shiftw_table },
+ { "shiftbv", shiftbv_table },
+ { "shiftwv", shiftwv_table },
+ { "group1b", group1b_table },
+ { "group1w", group1w_table },
+ { "group2b", group2b_table },
+ { "group2w", group2w_table }
};
@@ -824,53 +824,53 @@ static const char *const nec_sreg[8] = { "ds1", "ps", "ss", "ds0", "???", "???",
static const char *const nec_sfreg[256] =
{
/* 0x00 */
- "p0", "pm0", "pmc0", "???", "???", "???", "???", "???",
- "p1", "pm1", "pmc1", "???", "???", "???", "???", "???",
+ "p0", "pm0", "pmc0", "???", "???", "???", "???", "???",
+ "p1", "pm1", "pmc1", "???", "???", "???", "???", "???",
/* 0x10 */
- "p2", "pm2", "pmc2", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ "p2", "pm2", "pmc2", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
/* 0x20 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
/* 0x30 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "pt", "???", "???", "pmt", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "pt", "???", "???", "pmt", "???", "???", "???", "???",
/* 0x40 */
- "intm", "???", "???", "???", "ems0", "ems1", "ems2", "???",
- "???", "???", "???", "???", "exic0","exic1","exic2","???",
+ "intm", "???", "???", "???", "ems0", "ems1", "ems2", "???",
+ "???", "???", "???", "???", "exic0","exic1","exic2","???",
/* 0x50 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
/* 0x60 */
- "rxb0", "???", "txb0", "???", "???", "srms0","stms0","???",
- "scm0", "scc0", "brg0", "scs0", "seic0","sric0","stic0","???",
+ "rxb0", "???", "txb0", "???", "???", "srms0","stms0","???",
+ "scm0", "scc0", "brg0", "scs0", "seic0","sric0","stic0","???",
/* 0x70 */
- "rxb1", "???", "txb1", "???", "???", "srms1","stms1","???",
- "scm1", "scc1", "brg1", "scs1", "seic1","sric1","stic1","???",
+ "rxb1", "???", "txb1", "???", "???", "srms1","stms1","???",
+ "scm1", "scc1", "brg1", "scs1", "seic1","sric1","stic1","???",
/* 0x80 */
- "tm0", "???", "md0", "???", "???", "???", "???", "???",
- "tm1", "???", "md1", "???", "???", "???", "???", "???",
+ "tm0", "???", "md0", "???", "???", "???", "???", "???",
+ "tm1", "???", "md1", "???", "???", "???", "???", "???",
/* 0x90 */
- "tmc0", "tmc1", "???", "???", "tmms0","tmms1","tmms2","???",
- "???", "???", "???", "???", "tmic0","tmic1","tmic2","???",
+ "tmc0", "tmc1", "???", "???", "tmms0","tmms1","tmms2","???",
+ "???", "???", "???", "???", "tmic0","tmic1","tmic2","???",
/* 0xa0 */
- "dmac0","dmam0","dmac1","dmam1","???", "???", "???", "???",
- "???", "???", "???", "???", "dic0", "dic1", "???", "???",
+ "dmac0","dmam0","dmac1","dmam1","???", "???", "???", "???",
+ "???", "???", "???", "???", "dic0", "dic1", "???", "???",
/* 0xb0 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
/* 0xc0 */
- "sar0l","sar0m","sar0h","???", "dar0l","dar0m","dar0h","???",
- "tc0l", "tc0h", "???", "???", "???", "???", "???", "???",
+ "sar0l","sar0m","sar0h","???", "dar0l","dar0m","dar0h","???",
+ "tc0l", "tc0h", "???", "???", "???", "???", "???", "???",
/* 0xd0 */
- "sar1l","sar1m","sar1h","???", "dar1l","dar1m","dar1h","???",
- "tc1l", "tc1h", "???", "???", "???", "???", "???", "???",
+ "sar1l","sar1m","sar1h","???", "dar1l","dar1m","dar1h","???",
+ "tc1l", "tc1h", "???", "???", "???", "???", "???", "???",
/* 0xe0 */
- "stbc", "rfm", "???", "???", "???", "???", "???", "???",
- "wtc", "???", "flag", "prc", "tbic", "???", "???", "irqs",
+ "stbc", "rfm", "???", "???", "???", "???", "???", "???",
+ "wtc", "???", "flag", "prc", "tbic", "???", "???", "irqs",
/* 0xf0 */
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "ispr", "???", "???", "idb"
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "ispr", "???", "???", "idb"
};
static UINT32 pc;
@@ -879,10 +879,10 @@ static UINT32 segment;
static offs_t dasm_flags;
static char modrm_string[256];
-#define MODRM_REG1 ((modrm >> 3) & 0x7)
-#define MODRM_REG2 (modrm & 0x7)
+#define MODRM_REG1 ((modrm >> 3) & 0x7)
+#define MODRM_REG2 (modrm & 0x7)
-#define MAX_LENGTH 8
+#define MAX_LENGTH 8
INLINE UINT8 FETCH(void)
{
@@ -1143,11 +1143,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
{
switch (op1 & 0x7)
{
- case 0: // Group D8
+ case 0: // Group D8
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1179,11 +1179,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 1: // Group D9
+ case 1: // Group D9
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1243,11 +1243,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 2: // Group DA
+ case 2: // Group DA
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1285,11 +1285,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 3: // Group DB
+ case 3: // Group DB
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1335,11 +1335,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 4: // Group DC
+ case 4: // Group DC
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1382,11 +1382,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 5: // Group DD
+ case 5: // Group DD
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1426,11 +1426,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 6: // Group DE
+ case 6: // Group DE
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1475,11 +1475,11 @@ static void handle_fpu(char *s, UINT8 op1, UINT8 op2)
break;
}
- case 7: // Group DF
+ case 7: // Group DF
{
if (op2 < 0xc0)
{
- pc--; // adjust fetch pointer, so modrm byte read again
+ pc--; // adjust fetch pointer, so modrm byte read again
opcode_ptr--;
handle_modrm( modrm_string );
switch ((op2 >> 3) & 0x7)
@@ -1609,4 +1609,3 @@ CPU_DISASSEMBLE( nec_generic )
{
return necv_dasm_one(buffer, pc, oprom, NULL);
}
-
diff --git a/src/emu/cpu/nec/necinstr.c b/src/emu/cpu/nec/necinstr.c
index 63fb0270c56..0f73522d5c4 100644
--- a/src/emu/cpu/nec/necinstr.c
+++ b/src/emu/cpu/nec/necinstr.c
@@ -1,46 +1,46 @@
#define OP(num,func_name) static void func_name(nec_state_t *nec_state)
-OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
-OP( 0x01, i_add_wr16 ) { DEF_wr16; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
-OP( 0x02, i_add_r8b ) { DEF_r8b; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
-OP( 0x03, i_add_r16w ) { DEF_r16w; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x04, i_add_ald8 ) { DEF_ald8; ADDB; Breg(AL)=dst; CLKS(4,4,2); }
-OP( 0x05, i_add_axd16) { DEF_axd16; ADDW; Wreg(AW)=dst; CLKS(4,4,2); }
-OP( 0x06, i_push_es ) { PUSH(Sreg(DS1)); CLKS(12,8,3); }
-OP( 0x07, i_pop_es ) { POP(Sreg(DS1)); CLKS(12,8,5); }
-
-OP( 0x08, i_or_br8 ) { DEF_br8; ORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
-OP( 0x09, i_or_wr16 ) { DEF_wr16; ORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
-OP( 0x0a, i_or_r8b ) { DEF_r8b; ORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
-OP( 0x0b, i_or_r16w ) { DEF_r16w; ORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x0c, i_or_ald8 ) { DEF_ald8; ORB; Breg(AL)=dst; CLKS(4,4,2); }
-OP( 0x0d, i_or_axd16 ) { DEF_axd16; ORW; Wreg(AW)=dst; CLKS(4,4,2); }
-OP( 0x0e, i_push_cs ) { PUSH(Sreg(PS)); CLKS(12,8,3); }
+OP( 0x00, i_add_br8 ) { DEF_br8; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
+OP( 0x01, i_add_wr16 ) { DEF_wr16; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
+OP( 0x02, i_add_r8b ) { DEF_r8b; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
+OP( 0x03, i_add_r16w ) { DEF_r16w; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x04, i_add_ald8 ) { DEF_ald8; ADDB; Breg(AL)=dst; CLKS(4,4,2); }
+OP( 0x05, i_add_axd16) { DEF_axd16; ADDW; Wreg(AW)=dst; CLKS(4,4,2); }
+OP( 0x06, i_push_es ) { PUSH(Sreg(DS1)); CLKS(12,8,3); }
+OP( 0x07, i_pop_es ) { POP(Sreg(DS1)); CLKS(12,8,5); }
+
+OP( 0x08, i_or_br8 ) { DEF_br8; ORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
+OP( 0x09, i_or_wr16 ) { DEF_wr16; ORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
+OP( 0x0a, i_or_r8b ) { DEF_r8b; ORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
+OP( 0x0b, i_or_r16w ) { DEF_r16w; ORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x0c, i_or_ald8 ) { DEF_ald8; ORB; Breg(AL)=dst; CLKS(4,4,2); }
+OP( 0x0d, i_or_axd16 ) { DEF_axd16; ORW; Wreg(AW)=dst; CLKS(4,4,2); }
+OP( 0x0e, i_push_cs ) { PUSH(Sreg(PS)); CLKS(12,8,3); }
OP( 0x0f, i_pre_nec ) { UINT32 ModRM, tmp, tmp2;
switch (FETCH()) {
- case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x12 : BITOP_BYTE; CLKS(5,5,4); tmp2 = Breg(CL) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
- case 0x13 : BITOP_WORD; CLKS(5,5,4); tmp2 = Breg(CL) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
- case 0x14 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
- case 0x15 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
- case 0x16 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
- case 0x17 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
-
- case 0x18 : BITOP_BYTE; CLKS(4,4,4); tmp2 = (FETCH()) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x19 : BITOP_WORD; CLKS(4,4,4); tmp2 = (FETCH()) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x1a : BITOP_BYTE; CLKS(6,6,4); tmp2 = (FETCH()) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
- case 0x1b : BITOP_WORD; CLKS(6,6,4); tmp2 = (FETCH()) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
- case 0x1c : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
- case 0x1d : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
- case 0x1e : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
- case 0x1f : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
-
- case 0x20 : ADD4S; CLKS(7,7,2); break;
- case 0x22 : SUB4S; CLKS(7,7,2); break;
- case 0x26 : CMP4S; CLKS(7,7,2); break;
+ case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x12 : BITOP_BYTE; CLKS(5,5,4); tmp2 = Breg(CL) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
+ case 0x13 : BITOP_WORD; CLKS(5,5,4); tmp2 = Breg(CL) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
+ case 0x14 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
+ case 0x15 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
+ case 0x16 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
+ case 0x17 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
+
+ case 0x18 : BITOP_BYTE; CLKS(4,4,4); tmp2 = (FETCH()) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x19 : BITOP_WORD; CLKS(4,4,4); tmp2 = (FETCH()) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x1a : BITOP_BYTE; CLKS(6,6,4); tmp2 = (FETCH()) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
+ case 0x1b : BITOP_WORD; CLKS(6,6,4); tmp2 = (FETCH()) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
+ case 0x1c : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
+ case 0x1d : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
+ case 0x1e : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
+ case 0x1f : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
+
+ case 0x20 : ADD4S; CLKS(7,7,2); break;
+ case 0x22 : SUB4S; CLKS(7,7,2); break;
+ case 0x26 : CMP4S; CLKS(7,7,2); break;
case 0x28 : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp <<= 4; tmp |= Breg(AL) & 0xf; Breg(AL) = (Breg(AL) & 0xf0) | ((tmp>>8)&0xf); tmp &= 0xff; PutbackRMByte(ModRM,tmp); CLKM(13,13,9,28,28,15); break;
- case 0x2a : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp2 = (Breg(AL) & 0xf)<<4; Breg(AL) = (Breg(AL) & 0xf0) | (tmp&0xf); tmp = tmp2 | (tmp>>4); PutbackRMByte(ModRM,tmp); CLKM(17,17,13,32,32,19); break;
+ case 0x2a : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp2 = (Breg(AL) & 0xf)<<4; Breg(AL) = (Breg(AL) & 0xf0) | (tmp&0xf); tmp = tmp2 | (tmp>>4); PutbackRMByte(ModRM,tmp); CLKM(17,17,13,32,32,19); break;
case 0x31 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield INS\n",PC(nec_state)); break;
case 0x33 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield EXT\n",PC(nec_state)); break;
case 0xe0 : ModRM = FETCH(); ModRM=0; logerror("%06x: V33 unimplemented BRKXA (break to expansion address)\n",PC(nec_state)); break;
@@ -50,95 +50,95 @@ OP( 0x0f, i_pre_nec ) { UINT32 ModRM, tmp, tmp2;
}
}
-OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
-OP( 0x11, i_adc_wr16 ) { DEF_wr16; src+=CF; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
-OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
-OP( 0x13, i_adc_r16w ) { DEF_r16w; src+=CF; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x14, i_adc_ald8 ) { DEF_ald8; src+=CF; ADDB; Breg(AL)=dst; CLKS(4,4,2); }
-OP( 0x15, i_adc_axd16) { DEF_axd16; src+=CF; ADDW; Wreg(AW)=dst; CLKS(4,4,2); }
-OP( 0x16, i_push_ss ) { PUSH(Sreg(SS)); CLKS(12,8,3); }
-OP( 0x17, i_pop_ss ) { POP(Sreg(SS)); CLKS(12,8,5); nec_state->no_interrupt=1; }
-
-OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
-OP( 0x19, i_sbb_wr16 ) { DEF_wr16; src+=CF; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
-OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
-OP( 0x1b, i_sbb_r16w ) { DEF_r16w; src+=CF; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; Breg(AL)=dst; CLKS(4,4,2); }
-OP( 0x1d, i_sbb_axd16) { DEF_axd16; src+=CF; SUBW; Wreg(AW)=dst; CLKS(4,4,2); }
-OP( 0x1e, i_push_ds ) { PUSH(Sreg(DS0)); CLKS(12,8,3); }
-OP( 0x1f, i_pop_ds ) { POP(Sreg(DS0)); CLKS(12,8,5); }
-
-OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
-OP( 0x21, i_and_wr16 ) { DEF_wr16; ANDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
-OP( 0x22, i_and_r8b ) { DEF_r8b; ANDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
-OP( 0x23, i_and_r16w ) { DEF_r16w; ANDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x24, i_and_ald8 ) { DEF_ald8; ANDB; Breg(AL)=dst; CLKS(4,4,2); }
-OP( 0x25, i_and_axd16) { DEF_axd16; ANDW; Wreg(AW)=dst; CLKS(4,4,2); }
-OP( 0x26, i_es ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
-OP( 0x27, i_daa ) { ADJ4(6,0x60); CLKS(3,3,2); }
-
-OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
-OP( 0x29, i_sub_wr16 ) { DEF_wr16; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
-OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
-OP( 0x2b, i_sub_r16w ) { DEF_r16w; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; Breg(AL)=dst; CLKS(4,4,2); }
-OP( 0x2d, i_sub_axd16) { DEF_axd16; SUBW; Wreg(AW)=dst; CLKS(4,4,2); }
-OP( 0x2e, i_cs ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
-OP( 0x2f, i_das ) { ADJ4(-6,-0x60); CLKS(3,3,2); }
-
-OP( 0x30, i_xor_br8 ) { DEF_br8; XORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
-OP( 0x31, i_xor_wr16 ) { DEF_wr16; XORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
-OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
-OP( 0x33, i_xor_r16w ) { DEF_r16w; XORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; Breg(AL)=dst; CLKS(4,4,2); }
-OP( 0x35, i_xor_axd16) { DEF_axd16; XORW; Wreg(AW)=dst; CLKS(4,4,2); }
-OP( 0x36, i_ss ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
-OP( 0x37, i_aaa ) { ADJB(6, (Breg(AL) > 0xf9) ? 2 : 1); CLKS(7,7,4); }
-
-OP( 0x38, i_cmp_br8 ) { DEF_br8; SUBB; CLKM(2,2,2,11,11,6); }
-OP( 0x39, i_cmp_wr16 ) { DEF_wr16; SUBW; CLKR(15,15,8,15,11,6,2,EA);}
-OP( 0x3a, i_cmp_r8b ) { DEF_r8b; SUBB; CLKM(2,2,2,11,11,6); }
-OP( 0x3b, i_cmp_r16w ) { DEF_r16w; SUBW; CLKR(15,15,8,15,11,6,2,EA); }
-OP( 0x3c, i_cmp_ald8 ) { DEF_ald8; SUBB; CLKS(4,4,2); }
-OP( 0x3d, i_cmp_axd16) { DEF_axd16; SUBW; CLKS(4,4,2); }
-OP( 0x3e, i_ds ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
-OP( 0x3f, i_aas ) { ADJB(-6, (Breg(AL) < 6) ? -2 : -1); CLKS(7,7,4); }
-
-OP( 0x40, i_inc_ax ) { IncWordReg(AW); CLK(2); }
-OP( 0x41, i_inc_cx ) { IncWordReg(CW); CLK(2); }
-OP( 0x42, i_inc_dx ) { IncWordReg(DW); CLK(2); }
-OP( 0x43, i_inc_bx ) { IncWordReg(BW); CLK(2); }
-OP( 0x44, i_inc_sp ) { IncWordReg(SP); CLK(2); }
-OP( 0x45, i_inc_bp ) { IncWordReg(BP); CLK(2); }
-OP( 0x46, i_inc_si ) { IncWordReg(IX); CLK(2); }
-OP( 0x47, i_inc_di ) { IncWordReg(IY); CLK(2); }
-
-OP( 0x48, i_dec_ax ) { DecWordReg(AW); CLK(2); }
-OP( 0x49, i_dec_cx ) { DecWordReg(CW); CLK(2); }
-OP( 0x4a, i_dec_dx ) { DecWordReg(DW); CLK(2); }
-OP( 0x4b, i_dec_bx ) { DecWordReg(BW); CLK(2); }
-OP( 0x4c, i_dec_sp ) { DecWordReg(SP); CLK(2); }
-OP( 0x4d, i_dec_bp ) { DecWordReg(BP); CLK(2); }
-OP( 0x4e, i_dec_si ) { DecWordReg(IX); CLK(2); }
-OP( 0x4f, i_dec_di ) { DecWordReg(IY); CLK(2); }
-
-OP( 0x50, i_push_ax ) { PUSH(Wreg(AW)); CLKS(12,8,3); }
-OP( 0x51, i_push_cx ) { PUSH(Wreg(CW)); CLKS(12,8,3); }
-OP( 0x52, i_push_dx ) { PUSH(Wreg(DW)); CLKS(12,8,3); }
-OP( 0x53, i_push_bx ) { PUSH(Wreg(BW)); CLKS(12,8,3); }
-OP( 0x54, i_push_sp ) { PUSH(Wreg(SP)); CLKS(12,8,3); }
-OP( 0x55, i_push_bp ) { PUSH(Wreg(BP)); CLKS(12,8,3); }
-OP( 0x56, i_push_si ) { PUSH(Wreg(IX)); CLKS(12,8,3); }
-OP( 0x57, i_push_di ) { PUSH(Wreg(IY)); CLKS(12,8,3); }
-
-OP( 0x58, i_pop_ax ) { POP(Wreg(AW)); CLKS(12,8,5); }
-OP( 0x59, i_pop_cx ) { POP(Wreg(CW)); CLKS(12,8,5); }
-OP( 0x5a, i_pop_dx ) { POP(Wreg(DW)); CLKS(12,8,5); }
-OP( 0x5b, i_pop_bx ) { POP(Wreg(BW)); CLKS(12,8,5); }
-OP( 0x5c, i_pop_sp ) { POP(Wreg(SP)); CLKS(12,8,5); }
-OP( 0x5d, i_pop_bp ) { POP(Wreg(BP)); CLKS(12,8,5); }
-OP( 0x5e, i_pop_si ) { POP(Wreg(IX)); CLKS(12,8,5); }
-OP( 0x5f, i_pop_di ) { POP(Wreg(IY)); CLKS(12,8,5); }
+OP( 0x10, i_adc_br8 ) { DEF_br8; src+=CF; ADDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
+OP( 0x11, i_adc_wr16 ) { DEF_wr16; src+=CF; ADDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
+OP( 0x12, i_adc_r8b ) { DEF_r8b; src+=CF; ADDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
+OP( 0x13, i_adc_r16w ) { DEF_r16w; src+=CF; ADDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x14, i_adc_ald8 ) { DEF_ald8; src+=CF; ADDB; Breg(AL)=dst; CLKS(4,4,2); }
+OP( 0x15, i_adc_axd16) { DEF_axd16; src+=CF; ADDW; Wreg(AW)=dst; CLKS(4,4,2); }
+OP( 0x16, i_push_ss ) { PUSH(Sreg(SS)); CLKS(12,8,3); }
+OP( 0x17, i_pop_ss ) { POP(Sreg(SS)); CLKS(12,8,5); nec_state->no_interrupt=1; }
+
+OP( 0x18, i_sbb_br8 ) { DEF_br8; src+=CF; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
+OP( 0x19, i_sbb_wr16 ) { DEF_wr16; src+=CF; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
+OP( 0x1a, i_sbb_r8b ) { DEF_r8b; src+=CF; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
+OP( 0x1b, i_sbb_r16w ) { DEF_r16w; src+=CF; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x1c, i_sbb_ald8 ) { DEF_ald8; src+=CF; SUBB; Breg(AL)=dst; CLKS(4,4,2); }
+OP( 0x1d, i_sbb_axd16) { DEF_axd16; src+=CF; SUBW; Wreg(AW)=dst; CLKS(4,4,2); }
+OP( 0x1e, i_push_ds ) { PUSH(Sreg(DS0)); CLKS(12,8,3); }
+OP( 0x1f, i_pop_ds ) { POP(Sreg(DS0)); CLKS(12,8,5); }
+
+OP( 0x20, i_and_br8 ) { DEF_br8; ANDB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
+OP( 0x21, i_and_wr16 ) { DEF_wr16; ANDW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
+OP( 0x22, i_and_r8b ) { DEF_r8b; ANDB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
+OP( 0x23, i_and_r16w ) { DEF_r16w; ANDW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x24, i_and_ald8 ) { DEF_ald8; ANDB; Breg(AL)=dst; CLKS(4,4,2); }
+OP( 0x25, i_and_axd16) { DEF_axd16; ANDW; Wreg(AW)=dst; CLKS(4,4,2); }
+OP( 0x26, i_es ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
+OP( 0x27, i_daa ) { ADJ4(6,0x60); CLKS(3,3,2); }
+
+OP( 0x28, i_sub_br8 ) { DEF_br8; SUBB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
+OP( 0x29, i_sub_wr16 ) { DEF_wr16; SUBW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
+OP( 0x2a, i_sub_r8b ) { DEF_r8b; SUBB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
+OP( 0x2b, i_sub_r16w ) { DEF_r16w; SUBW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x2c, i_sub_ald8 ) { DEF_ald8; SUBB; Breg(AL)=dst; CLKS(4,4,2); }
+OP( 0x2d, i_sub_axd16) { DEF_axd16; SUBW; Wreg(AW)=dst; CLKS(4,4,2); }
+OP( 0x2e, i_cs ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
+OP( 0x2f, i_das ) { ADJ4(-6,-0x60); CLKS(3,3,2); }
+
+OP( 0x30, i_xor_br8 ) { DEF_br8; XORB; PutbackRMByte(ModRM,dst); CLKM(2,2,2,16,16,7); }
+OP( 0x31, i_xor_wr16 ) { DEF_wr16; XORW; PutbackRMWord(ModRM,dst); CLKR(24,24,11,24,16,7,2,EA);}
+OP( 0x32, i_xor_r8b ) { DEF_r8b; XORB; RegByte(ModRM)=dst; CLKM(2,2,2,11,11,6); }
+OP( 0x33, i_xor_r16w ) { DEF_r16w; XORW; RegWord(ModRM)=dst; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x34, i_xor_ald8 ) { DEF_ald8; XORB; Breg(AL)=dst; CLKS(4,4,2); }
+OP( 0x35, i_xor_axd16) { DEF_axd16; XORW; Wreg(AW)=dst; CLKS(4,4,2); }
+OP( 0x36, i_ss ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
+OP( 0x37, i_aaa ) { ADJB(6, (Breg(AL) > 0xf9) ? 2 : 1); CLKS(7,7,4); }
+
+OP( 0x38, i_cmp_br8 ) { DEF_br8; SUBB; CLKM(2,2,2,11,11,6); }
+OP( 0x39, i_cmp_wr16 ) { DEF_wr16; SUBW; CLKR(15,15,8,15,11,6,2,EA);}
+OP( 0x3a, i_cmp_r8b ) { DEF_r8b; SUBB; CLKM(2,2,2,11,11,6); }
+OP( 0x3b, i_cmp_r16w ) { DEF_r16w; SUBW; CLKR(15,15,8,15,11,6,2,EA); }
+OP( 0x3c, i_cmp_ald8 ) { DEF_ald8; SUBB; CLKS(4,4,2); }
+OP( 0x3d, i_cmp_axd16) { DEF_axd16; SUBW; CLKS(4,4,2); }
+OP( 0x3e, i_ds ) { nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; CLK(2); nec_instruction[fetchop(nec_state)](nec_state); nec_state->seg_prefix=FALSE; }
+OP( 0x3f, i_aas ) { ADJB(-6, (Breg(AL) < 6) ? -2 : -1); CLKS(7,7,4); }
+
+OP( 0x40, i_inc_ax ) { IncWordReg(AW); CLK(2); }
+OP( 0x41, i_inc_cx ) { IncWordReg(CW); CLK(2); }
+OP( 0x42, i_inc_dx ) { IncWordReg(DW); CLK(2); }
+OP( 0x43, i_inc_bx ) { IncWordReg(BW); CLK(2); }
+OP( 0x44, i_inc_sp ) { IncWordReg(SP); CLK(2); }
+OP( 0x45, i_inc_bp ) { IncWordReg(BP); CLK(2); }
+OP( 0x46, i_inc_si ) { IncWordReg(IX); CLK(2); }
+OP( 0x47, i_inc_di ) { IncWordReg(IY); CLK(2); }
+
+OP( 0x48, i_dec_ax ) { DecWordReg(AW); CLK(2); }
+OP( 0x49, i_dec_cx ) { DecWordReg(CW); CLK(2); }
+OP( 0x4a, i_dec_dx ) { DecWordReg(DW); CLK(2); }
+OP( 0x4b, i_dec_bx ) { DecWordReg(BW); CLK(2); }
+OP( 0x4c, i_dec_sp ) { DecWordReg(SP); CLK(2); }
+OP( 0x4d, i_dec_bp ) { DecWordReg(BP); CLK(2); }
+OP( 0x4e, i_dec_si ) { DecWordReg(IX); CLK(2); }
+OP( 0x4f, i_dec_di ) { DecWordReg(IY); CLK(2); }
+
+OP( 0x50, i_push_ax ) { PUSH(Wreg(AW)); CLKS(12,8,3); }
+OP( 0x51, i_push_cx ) { PUSH(Wreg(CW)); CLKS(12,8,3); }
+OP( 0x52, i_push_dx ) { PUSH(Wreg(DW)); CLKS(12,8,3); }
+OP( 0x53, i_push_bx ) { PUSH(Wreg(BW)); CLKS(12,8,3); }
+OP( 0x54, i_push_sp ) { PUSH(Wreg(SP)); CLKS(12,8,3); }
+OP( 0x55, i_push_bp ) { PUSH(Wreg(BP)); CLKS(12,8,3); }
+OP( 0x56, i_push_si ) { PUSH(Wreg(IX)); CLKS(12,8,3); }
+OP( 0x57, i_push_di ) { PUSH(Wreg(IY)); CLKS(12,8,3); }
+
+OP( 0x58, i_pop_ax ) { POP(Wreg(AW)); CLKS(12,8,5); }
+OP( 0x59, i_pop_cx ) { POP(Wreg(CW)); CLKS(12,8,5); }
+OP( 0x5a, i_pop_dx ) { POP(Wreg(DW)); CLKS(12,8,5); }
+OP( 0x5b, i_pop_bx ) { POP(Wreg(BW)); CLKS(12,8,5); }
+OP( 0x5c, i_pop_sp ) { POP(Wreg(SP)); CLKS(12,8,5); }
+OP( 0x5d, i_pop_bp ) { POP(Wreg(BP)); CLKS(12,8,5); }
+OP( 0x5e, i_pop_si ) { POP(Wreg(IX)); CLKS(12,8,5); }
+OP( 0x5f, i_pop_di ) { POP(Wreg(IY)); CLKS(12,8,5); }
OP( 0x60, i_pusha ) {
unsigned tmp=Wreg(SP);
@@ -176,153 +176,153 @@ OP( 0x62, i_chkind ) {
nec_state->icount-=20;
logerror("%06x: bound %04x high %04x low %04x tmp\n",PC(nec_state),high,low,tmp);
}
-OP( 0x64, i_repnc ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
+OP( 0x64, i_repnc ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
switch(next) { /* Segments */
- case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
}
switch(next) {
- case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
- default: logerror("%06x: REPNC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
+ case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && !CF); Wreg(CW)=c; break;
+ default: logerror("%06x: REPNC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
}
nec_state->seg_prefix=FALSE;
}
-OP( 0x65, i_repc ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
+OP( 0x65, i_repc ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
switch(next) { /* Segments */
- case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
}
switch(next) {
- case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
- default: logerror("%06x: REPC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
+ case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && CF); Wreg(CW)=c; break;
+ default: logerror("%06x: REPC invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
}
nec_state->seg_prefix=FALSE;
}
-OP( 0x68, i_push_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
-OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; tmp = FETCHWORD(); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?38:47;}
-OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,Wreg(SP)); }
+OP( 0x68, i_push_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(tmp); CLKW(12,12,5,12,8,5,Wreg(SP)); }
+OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; tmp = FETCHWORD(); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?38:47;}
+OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH())); PUSH(tmp); CLKW(11,11,5,11,7,3,Wreg(SP)); }
OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (WORD)((INT16)((INT8)FETCH())); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); nec_state->CarryVal = nec_state->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; nec_state->icount-=(ModRM >=0xc0 )?31:39; }
OP( 0x6c, i_insb ) { PutMemB(DS1,Wreg(IY),read_port_byte(Wreg(DW))); Wreg(IY)+= -2 * nec_state->DF + 1; CLK(8); }
OP( 0x6d, i_insw ) { PutMemW(DS1,Wreg(IY),read_port_word(Wreg(DW))); Wreg(IY)+= -4 * nec_state->DF + 2; CLKS(18,10,8); }
OP( 0x6e, i_outsb ) { write_port_byte(Wreg(DW),GetMemB(DS0,Wreg(IX))); Wreg(IX)+= -2 * nec_state->DF + 1; CLK(8); }
OP( 0x6f, i_outsw ) { write_port_word(Wreg(DW),GetMemW(DS0,Wreg(IX))); Wreg(IX)+= -4 * nec_state->DF + 2; CLKS(18,10,8); }
-OP( 0x70, i_jo ) { JMP( OF); CLKS(4,4,3); }
-OP( 0x71, i_jno ) { JMP(!OF); CLKS(4,4,3); }
-OP( 0x72, i_jc ) { JMP( CF); CLKS(4,4,3); }
-OP( 0x73, i_jnc ) { JMP(!CF); CLKS(4,4,3); }
-OP( 0x74, i_jz ) { JMP( ZF); CLKS(4,4,3); }
-OP( 0x75, i_jnz ) { JMP(!ZF); CLKS(4,4,3); }
-OP( 0x76, i_jce ) { JMP(CF || ZF); CLKS(4,4,3); }
-OP( 0x77, i_jnce ) { JMP(!(CF || ZF)); CLKS(4,4,3); }
-OP( 0x78, i_js ) { JMP( SF); CLKS(4,4,3); }
-OP( 0x79, i_jns ) { JMP(!SF); CLKS(4,4,3); }
-OP( 0x7a, i_jp ) { JMP( PF); CLKS(4,4,3); }
-OP( 0x7b, i_jnp ) { JMP(!PF); CLKS(4,4,3); }
-OP( 0x7c, i_jl ) { JMP((SF!=OF)&&(!ZF)); CLKS(4,4,3); }
-OP( 0x7d, i_jnl ) { JMP((ZF)||(SF==OF)); CLKS(4,4,3); }
-OP( 0x7e, i_jle ) { JMP((ZF)||(SF!=OF)); CLKS(4,4,3); }
-OP( 0x7f, i_jnle ) { JMP((SF==OF)&&(!ZF)); CLKS(4,4,3); }
+OP( 0x70, i_jo ) { JMP( OF); CLKS(4,4,3); }
+OP( 0x71, i_jno ) { JMP(!OF); CLKS(4,4,3); }
+OP( 0x72, i_jc ) { JMP( CF); CLKS(4,4,3); }
+OP( 0x73, i_jnc ) { JMP(!CF); CLKS(4,4,3); }
+OP( 0x74, i_jz ) { JMP( ZF); CLKS(4,4,3); }
+OP( 0x75, i_jnz ) { JMP(!ZF); CLKS(4,4,3); }
+OP( 0x76, i_jce ) { JMP(CF || ZF); CLKS(4,4,3); }
+OP( 0x77, i_jnce ) { JMP(!(CF || ZF)); CLKS(4,4,3); }
+OP( 0x78, i_js ) { JMP( SF); CLKS(4,4,3); }
+OP( 0x79, i_jns ) { JMP(!SF); CLKS(4,4,3); }
+OP( 0x7a, i_jp ) { JMP( PF); CLKS(4,4,3); }
+OP( 0x7b, i_jnp ) { JMP(!PF); CLKS(4,4,3); }
+OP( 0x7c, i_jl ) { JMP((SF!=OF)&&(!ZF)); CLKS(4,4,3); }
+OP( 0x7d, i_jnl ) { JMP((ZF)||(SF==OF)); CLKS(4,4,3); }
+OP( 0x7e, i_jle ) { JMP((ZF)||(SF!=OF)); CLKS(4,4,3); }
+OP( 0x7f, i_jnle ) { JMP((SF==OF)&&(!ZF)); CLKS(4,4,3); }
OP( 0x80, i_80pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = FETCH();
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
switch (ModRM & 0x38) {
- case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
- case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
- case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
- case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
- case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
- case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
- case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
- case 0x38: SUBB; break; /* CMP */
+ case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
+ case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
+ case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
+ case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
+ case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
+ case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
+ case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
+ case 0x38: SUBB; break; /* CMP */
}
}
OP( 0x81, i_81pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = FETCH(); src+= (FETCH() << 8);
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,EA) else CLKW(26,26,11,26,18,7,EA)
switch (ModRM & 0x38) {
- case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
- case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
- case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
- case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
- case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
- case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
- case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
- case 0x38: SUBW; break; /* CMP */
+ case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
+ case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
+ case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
+ case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
+ case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
+ case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
+ case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
+ case 0x38: SUBW; break; /* CMP */
}
}
OP( 0x82, i_82pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = (BYTE)((INT8)FETCH());
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKS(13,13,6) else CLKS(18,18,7)
switch (ModRM & 0x38) {
- case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
- case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
- case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
- case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
- case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
- case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
- case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
- case 0x38: SUBB; break; /* CMP */
+ case 0x00: ADDB; PutbackRMByte(ModRM,dst); break;
+ case 0x08: ORB; PutbackRMByte(ModRM,dst); break;
+ case 0x10: src+=CF; ADDB; PutbackRMByte(ModRM,dst); break;
+ case 0x18: src+=CF; SUBB; PutbackRMByte(ModRM,dst); break;
+ case 0x20: ANDB; PutbackRMByte(ModRM,dst); break;
+ case 0x28: SUBB; PutbackRMByte(ModRM,dst); break;
+ case 0x30: XORB; PutbackRMByte(ModRM,dst); break;
+ case 0x38: SUBB; break; /* CMP */
}
}
OP( 0x83, i_83pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = (WORD)((INT16)((INT8)FETCH()));
if (ModRM >=0xc0 ) CLKS(4,4,2) else if ((ModRM & 0x38)==0x38) CLKW(17,17,8,17,13,6,EA) else CLKW(26,26,11,26,18,7,EA)
switch (ModRM & 0x38) {
- case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
- case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
- case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
- case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
- case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
- case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
- case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
- case 0x38: SUBW; break; /* CMP */
+ case 0x00: ADDW; PutbackRMWord(ModRM,dst); break;
+ case 0x08: ORW; PutbackRMWord(ModRM,dst); break;
+ case 0x10: src+=CF; ADDW; PutbackRMWord(ModRM,dst); break;
+ case 0x18: src+=CF; SUBW; PutbackRMWord(ModRM,dst); break;
+ case 0x20: ANDW; PutbackRMWord(ModRM,dst); break;
+ case 0x28: SUBW; PutbackRMWord(ModRM,dst); break;
+ case 0x30: XORW; PutbackRMWord(ModRM,dst); break;
+ case 0x38: SUBW; break; /* CMP */
}
}
-OP( 0x84, i_test_br8 ) { DEF_br8; ANDB; CLKM(2,2,2,10,10,6); }
-OP( 0x85, i_test_wr16 ) { DEF_wr16; ANDW; CLKR(14,14,8,14,10,6,2,EA); }
-OP( 0x86, i_xchg_br8 ) { DEF_br8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); CLKM(3,3,3,16,18,8); }
-OP( 0x87, i_xchg_wr16 ) { DEF_wr16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); CLKR(24,24,12,24,16,8,3,EA); }
+OP( 0x84, i_test_br8 ) { DEF_br8; ANDB; CLKM(2,2,2,10,10,6); }
+OP( 0x85, i_test_wr16 ) { DEF_wr16; ANDW; CLKR(14,14,8,14,10,6,2,EA); }
+OP( 0x86, i_xchg_br8 ) { DEF_br8; RegByte(ModRM)=dst; PutbackRMByte(ModRM,src); CLKM(3,3,3,16,18,8); }
+OP( 0x87, i_xchg_wr16 ) { DEF_wr16; RegWord(ModRM)=dst; PutbackRMWord(ModRM,src); CLKR(24,24,12,24,16,8,3,EA); }
-OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); }
-OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,EA); }
-OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); }
-OP( 0x8b, i_mov_r16w ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLKR(15,15,7,15,11,5,2,EA); }
+OP( 0x88, i_mov_br8 ) { UINT8 src; GetModRM; src = RegByte(ModRM); PutRMByte(ModRM,src); CLKM(2,2,2,9,9,3); }
+OP( 0x89, i_mov_wr16 ) { UINT16 src; GetModRM; src = RegWord(ModRM); PutRMWord(ModRM,src); CLKR(13,13,5,13,9,3,2,EA); }
+OP( 0x8a, i_mov_r8b ) { UINT8 src; GetModRM; src = GetRMByte(ModRM); RegByte(ModRM)=src; CLKM(2,2,2,11,11,5); }
+OP( 0x8b, i_mov_r16w ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); RegWord(ModRM)=src; CLKR(15,15,7,15,11,5,2,EA); }
OP( 0x8c, i_mov_wsreg ) { GetModRM;
switch (ModRM & 0x38) {
case 0x00: PutRMWord(ModRM,Sreg(DS1)); CLKR(14,14,5,14,10,3,2,EA); break;
@@ -332,7 +332,7 @@ OP( 0x8c, i_mov_wsreg ) { GetModRM;
default: logerror("%06x: MOV Sreg - Invalid register\n",PC(nec_state));
}
}
-OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH(); (void)(*GetEA[ModRM])(nec_state); RegWord(ModRM)=EO; CLKS(4,4,2); }
+OP( 0x8d, i_lea ) { UINT16 ModRM = FETCH(); (void)(*GetEA[ModRM])(nec_state); RegWord(ModRM)=EO; CLKS(4,4,2); }
OP( 0x8e, i_mov_sregw ) { UINT16 src; GetModRM; src = GetRMWord(ModRM); CLKR(15,15,7,15,11,5,2,EA);
switch (ModRM & 0x38) {
case 0x00: Sreg(DS1) = src; break; /* mov es,ew */
@@ -353,9 +353,9 @@ OP( 0x95, i_xchg_axbp ) { XchgAWReg(BP); CLK(3); }
OP( 0x96, i_xchg_axsi ) { XchgAWReg(IX); CLK(3); }
OP( 0x97, i_xchg_axdi ) { XchgAWReg(IY); CLK(3); }
-OP( 0x98, i_cbw ) { Breg(AH) = (Breg(AL) & 0x80) ? 0xff : 0; CLK(2); }
-OP( 0x99, i_cwd ) { Wreg(DW) = (Breg(AH) & 0x80) ? 0xffff : 0; CLK(4); }
-OP( 0x9a, i_call_far ) { UINT32 tmp, tmp2; tmp = FETCHWORD(); tmp2 = FETCHWORD(); PUSH(Sreg(PS)); PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; Sreg(PS) = (WORD)tmp2; CHANGE_PC; CLKW(29,29,13,29,21,9,Wreg(SP)); }
+OP( 0x98, i_cbw ) { Breg(AH) = (Breg(AL) & 0x80) ? 0xff : 0; CLK(2); }
+OP( 0x99, i_cwd ) { Wreg(DW) = (Breg(AH) & 0x80) ? 0xffff : 0; CLK(4); }
+OP( 0x9a, i_call_far ) { UINT32 tmp, tmp2; tmp = FETCHWORD(); tmp2 = FETCHWORD(); PUSH(Sreg(PS)); PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; Sreg(PS) = (WORD)tmp2; CHANGE_PC; CLKW(29,29,13,29,21,9,Wreg(SP)); }
OP( 0x9b, i_wait ) { if (!nec_state->poll_state) nec_state->ip--; CLK(5); }
OP( 0x9c, i_pushf ) { UINT16 tmp = CompressFlags(); PUSH( tmp ); CLKS(12,8,3); }
OP( 0x9d, i_popf ) { UINT32 tmp; POP(tmp); ExpandFlags(tmp); CLKS(12,8,5); if (nec_state->TF) nec_trap(nec_state); }
@@ -373,30 +373,30 @@ OP( 0xa7, i_cmpsw ) { UINT32 src = GetMemW(DS1, Wreg(IY)); UINT32 dst = Get
OP( 0xa8, i_test_ald8 ) { DEF_ald8; ANDB; CLKS(4,4,2); }
OP( 0xa9, i_test_axd16 ) { DEF_axd16; ANDW; CLKS(4,4,2); }
-OP( 0xaa, i_stosb ) { PutMemB(DS1,Wreg(IY),Breg(AL)); Wreg(IY) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
-OP( 0xab, i_stosw ) { PutMemW(DS1,Wreg(IY),Wreg(AW)); Wreg(IY) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
+OP( 0xaa, i_stosb ) { PutMemB(DS1,Wreg(IY),Breg(AL)); Wreg(IY) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
+OP( 0xab, i_stosw ) { PutMemW(DS1,Wreg(IY),Wreg(AW)); Wreg(IY) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
OP( 0xac, i_lodsb ) { Breg(AL) = GetMemB(DS0,Wreg(IX)); Wreg(IX) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
OP( 0xad, i_lodsw ) { Wreg(AW) = GetMemW(DS0,Wreg(IX)); Wreg(IX) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IX)); }
-OP( 0xae, i_scasb ) { UINT32 src = GetMemB(DS1, Wreg(IY)); UINT32 dst = Breg(AL); SUBB; Wreg(IY) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
-OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(DS1, Wreg(IY)); UINT32 dst = Wreg(AW); SUBW; Wreg(IY) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
+OP( 0xae, i_scasb ) { UINT32 src = GetMemB(DS1, Wreg(IY)); UINT32 dst = Breg(AL); SUBB; Wreg(IY) += -2 * nec_state->DF + 1; CLKS(4,4,3); }
+OP( 0xaf, i_scasw ) { UINT32 src = GetMemW(DS1, Wreg(IY)); UINT32 dst = Wreg(AW); SUBW; Wreg(IY) += -4 * nec_state->DF + 2; CLKW(8,8,5,8,4,3,Wreg(IY)); }
-OP( 0xb0, i_mov_ald8 ) { Breg(AL) = FETCH(); CLKS(4,4,2); }
+OP( 0xb0, i_mov_ald8 ) { Breg(AL) = FETCH(); CLKS(4,4,2); }
OP( 0xb1, i_mov_cld8 ) { Breg(CL) = FETCH(); CLKS(4,4,2); }
OP( 0xb2, i_mov_dld8 ) { Breg(DL) = FETCH(); CLKS(4,4,2); }
OP( 0xb3, i_mov_bld8 ) { Breg(BL) = FETCH(); CLKS(4,4,2); }
OP( 0xb4, i_mov_ahd8 ) { Breg(AH) = FETCH(); CLKS(4,4,2); }
OP( 0xb5, i_mov_chd8 ) { Breg(CH) = FETCH(); CLKS(4,4,2); }
OP( 0xb6, i_mov_dhd8 ) { Breg(DH) = FETCH(); CLKS(4,4,2); }
-OP( 0xb7, i_mov_bhd8 ) { Breg(BH) = FETCH(); CLKS(4,4,2); }
+OP( 0xb7, i_mov_bhd8 ) { Breg(BH) = FETCH(); CLKS(4,4,2); }
-OP( 0xb8, i_mov_axd16 ) { Breg(AL) = FETCH(); Breg(AH) = FETCH(); CLKS(4,4,2); }
-OP( 0xb9, i_mov_cxd16 ) { Breg(CL) = FETCH(); Breg(CH) = FETCH(); CLKS(4,4,2); }
-OP( 0xba, i_mov_dxd16 ) { Breg(DL) = FETCH(); Breg(DH) = FETCH(); CLKS(4,4,2); }
-OP( 0xbb, i_mov_bxd16 ) { Breg(BL) = FETCH(); Breg(BH) = FETCH(); CLKS(4,4,2); }
-OP( 0xbc, i_mov_spd16 ) { Wreg(SP) = FETCHWORD(); CLKS(4,4,2); }
-OP( 0xbd, i_mov_bpd16 ) { Wreg(BP) = FETCHWORD(); CLKS(4,4,2); }
-OP( 0xbe, i_mov_sid16 ) { Wreg(IX) = FETCHWORD(); CLKS(4,4,2); }
-OP( 0xbf, i_mov_did16 ) { Wreg(IY) = FETCHWORD(); CLKS(4,4,2); }
+OP( 0xb8, i_mov_axd16 ) { Breg(AL) = FETCH(); Breg(AH) = FETCH(); CLKS(4,4,2); }
+OP( 0xb9, i_mov_cxd16 ) { Breg(CL) = FETCH(); Breg(CH) = FETCH(); CLKS(4,4,2); }
+OP( 0xba, i_mov_dxd16 ) { Breg(DL) = FETCH(); Breg(DH) = FETCH(); CLKS(4,4,2); }
+OP( 0xbb, i_mov_bxd16 ) { Breg(BL) = FETCH(); Breg(BH) = FETCH(); CLKS(4,4,2); }
+OP( 0xbc, i_mov_spd16 ) { Wreg(SP) = FETCHWORD(); CLKS(4,4,2); }
+OP( 0xbd, i_mov_bpd16 ) { Wreg(BP) = FETCHWORD(); CLKS(4,4,2); }
+OP( 0xbe, i_mov_sid16 ) { Wreg(IX) = FETCHWORD(); CLKS(4,4,2); }
+OP( 0xbf, i_mov_did16 ) { Wreg(IY) = FETCHWORD(); CLKS(4,4,2); }
OP( 0xc0, i_rotshft_bd8 ) {
UINT32 src, dst; UINT8 c;
@@ -533,78 +533,78 @@ OP( 0xd4, i_aam ) { FETCH(); Breg(AH) = Breg(AL) / 10; Breg(AL) %= 10; SetSZP
OP( 0xd5, i_aad ) { FETCH(); Breg(AL) = Breg(AH) * 10 + Breg(AL); Breg(AH) = 0; SetSZPF_Byte(Breg(AL)); CLKS(7,7,8); }
OP( 0xd6, i_setalc ) { Breg(AL) = (CF)?0xff:0x00; nec_state->icount-=3; logerror("%06x: Undefined opcode (SETALC)\n",PC(nec_state)); }
OP( 0xd7, i_trans ) { UINT32 dest = (Wreg(BW)+Breg(AL))&0xffff; Breg(AL) = GetMemB(DS0, dest); CLKS(9,9,5); }
-OP( 0xd8, i_fpo ) { GetModRM; nec_state->icount-=2; logerror("%06x: Unimplemented floating point control %04x\n",PC(nec_state),ModRM); }
+OP( 0xd8, i_fpo ) { GetModRM; nec_state->icount-=2; logerror("%06x: Unimplemented floating point control %04x\n",PC(nec_state),ModRM); }
OP( 0xe0, i_loopne ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if (!ZF && Wreg(CW)) { nec_state->ip = (WORD)(nec_state->ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
OP( 0xe1, i_loope ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if ( ZF && Wreg(CW)) { nec_state->ip = (WORD)(nec_state->ip+disp); /*CHANGE_PC;*/ CLKS(14,14,6); } else CLKS(5,5,3); }
OP( 0xe2, i_loop ) { INT8 disp = (INT8)FETCH(); Wreg(CW)--; if (Wreg(CW)) { nec_state->ip = (WORD)(nec_state->ip+disp); /*CHANGE_PC;*/ CLKS(13,13,6); } else CLKS(5,5,3); }
OP( 0xe3, i_jcxz ) { INT8 disp = (INT8)FETCH(); if (Wreg(CW) == 0) { nec_state->ip = (WORD)(nec_state->ip+disp); /*CHANGE_PC;*/ CLKS(13,13,6); } else CLKS(5,5,3); }
-OP( 0xe4, i_inal ) { UINT8 port = FETCH(); Breg(AL) = read_port_byte(port); CLKS(9,9,5); }
+OP( 0xe4, i_inal ) { UINT8 port = FETCH(); Breg(AL) = read_port_byte(port); CLKS(9,9,5); }
OP( 0xe5, i_inax ) { UINT8 port = FETCH(); Wreg(AW) = read_port_word(port); CLKW(13,13,7,13,9,5,port); }
-OP( 0xe6, i_outal ) { UINT8 port = FETCH(); write_port_byte(port, Breg(AL)); CLKS(8,8,3); }
-OP( 0xe7, i_outax ) { UINT8 port = FETCH(); write_port_word(port, Wreg(AW)); CLKW(12,12,5,12,8,3,port); }
+OP( 0xe6, i_outal ) { UINT8 port = FETCH(); write_port_byte(port, Breg(AL)); CLKS(8,8,3); }
+OP( 0xe7, i_outax ) { UINT8 port = FETCH(); write_port_word(port, Wreg(AW)); CLKW(12,12,5,12,8,3,port); }
OP( 0xe8, i_call_d16 ) { UINT32 tmp; tmp = FETCHWORD(); PUSH(nec_state->ip); nec_state->ip = (WORD)(nec_state->ip+(INT16)tmp); CHANGE_PC; nec_state->icount-=24; }
OP( 0xe9, i_jmp_d16 ) { UINT32 tmp; tmp = FETCHWORD(); nec_state->ip = (WORD)(nec_state->ip+(INT16)tmp); CHANGE_PC; nec_state->icount-=15; }
-OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; tmp = FETCHWORD(); tmp1 = FETCHWORD(); Sreg(PS) = (WORD)tmp1; nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=27; }
+OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; tmp = FETCHWORD(); tmp1 = FETCHWORD(); Sreg(PS) = (WORD)tmp1; nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=27; }
OP( 0xeb, i_jmp_d8 ) { int tmp = (int)((INT8)FETCH()); nec_state->icount-=12; nec_state->ip = (WORD)(nec_state->ip+tmp); }
OP( 0xec, i_inaldx ) { Breg(AL) = read_port_byte(Wreg(DW)); CLKS(8,8,5);}
OP( 0xed, i_inaxdx ) { Wreg(AW) = read_port_word(Wreg(DW)); CLKW(12,12,7,12,8,5,Wreg(DW)); }
-OP( 0xee, i_outdxal ) { write_port_byte(Wreg(DW), Breg(AL)); CLKS(8,8,3); }
+OP( 0xee, i_outdxal ) { write_port_byte(Wreg(DW), Breg(AL)); CLKS(8,8,3); }
OP( 0xef, i_outdxax ) { write_port_word(Wreg(DW), Wreg(AW)); CLKW(12,12,5,12,8,3,Wreg(DW)); }
OP( 0xf0, i_lock ) { logerror("%06x: Warning - BUSLOCK\n",PC(nec_state)); nec_state->no_interrupt=1; CLK(2); }
OP( 0xf2, i_repne ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
switch(next) { /* Segments */
- case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
}
switch(next) {
- case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
- case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
- case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
- case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
- default: logerror("%06x: REPNE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
+ case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
+ case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
+ case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
+ case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==0); Wreg(CW)=c; break;
+ default: logerror("%06x: REPNE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
}
nec_state->seg_prefix=FALSE;
}
OP( 0xf3, i_repe ) { UINT32 next = fetchop(nec_state); UINT16 c = Wreg(CW);
switch(next) { /* Segments */
- case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
- case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x26: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS1)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x2e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(PS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x36: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(SS)<<4; next = fetchop(nec_state); CLK(2); break;
+ case 0x3e: nec_state->seg_prefix=TRUE; nec_state->prefix_base=Sreg(DS0)<<4; next = fetchop(nec_state); CLK(2); break;
}
switch(next) {
- case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
- case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
- case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
- case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
- case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
- default: logerror("%06x: REPE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
+ case 0x6c: CLK(2); if (c) do { i_insb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0x6d: CLK(2); if (c) do { i_insw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0x6e: CLK(2); if (c) do { i_outsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0x6f: CLK(2); if (c) do { i_outsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xa4: CLK(2); if (c) do { i_movsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xa5: CLK(2); if (c) do { i_movsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xa6: CLK(2); if (c) do { i_cmpsb(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
+ case 0xa7: CLK(2); if (c) do { i_cmpsw(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
+ case 0xaa: CLK(2); if (c) do { i_stosb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xab: CLK(2); if (c) do { i_stosw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xac: CLK(2); if (c) do { i_lodsb(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xad: CLK(2); if (c) do { i_lodsw(nec_state); c--; } while (c>0); Wreg(CW)=c; break;
+ case 0xae: CLK(2); if (c) do { i_scasb(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
+ case 0xaf: CLK(2); if (c) do { i_scasw(nec_state); c--; } while (c>0 && ZF==1); Wreg(CW)=c; break;
+ default: logerror("%06x: REPE invalid\n",PC(nec_state)); nec_instruction[next](nec_state);
}
nec_state->seg_prefix=FALSE;
}
@@ -638,12 +638,12 @@ OP( 0xf7, i_f7pre ) { UINT32 tmp,tmp2; UINT32 uresult,uresult2; INT32 result,r
}
}
-OP( 0xf8, i_clc ) { nec_state->CarryVal = 0; CLK(2); }
-OP( 0xf9, i_stc ) { nec_state->CarryVal = 1; CLK(2); }
-OP( 0xfa, i_di ) { SetIF(0); CLK(2); }
-OP( 0xfb, i_ei ) { SetIF(1); CLK(2); }
-OP( 0xfc, i_cld ) { SetDF(0); CLK(2); }
-OP( 0xfd, i_std ) { SetDF(1); CLK(2); }
+OP( 0xf8, i_clc ) { nec_state->CarryVal = 0; CLK(2); }
+OP( 0xf9, i_stc ) { nec_state->CarryVal = 1; CLK(2); }
+OP( 0xfa, i_di ) { SetIF(0); CLK(2); }
+OP( 0xfb, i_ei ) { SetIF(1); CLK(2); }
+OP( 0xfc, i_cld ) { SetDF(0); CLK(2); }
+OP( 0xfd, i_std ) { SetDF(1); CLK(2); }
OP( 0xfe, i_fepre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMByte(ModRM);
switch(ModRM & 0x38) {
case 0x00: tmp1 = tmp+1; nec_state->OverVal = (tmp==0x7f); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(2,2,2,16,16,7); break; /* INC */
@@ -655,7 +655,7 @@ OP( 0xff, i_ffpre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMWord(ModRM);
switch(ModRM & 0x38) {
case 0x00: tmp1 = tmp+1; nec_state->OverVal = (tmp==0x7fff); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* INC */
case 0x08: tmp1 = tmp-1; nec_state->OverVal = (tmp==0x8000); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(2,2,2,24,16,7); break; /* DEC */
- case 0x10: PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=(ModRM >=0xc0 )?16:20; break; /* CALL */
+ case 0x10: PUSH(nec_state->ip); nec_state->ip = (WORD)tmp; CHANGE_PC; nec_state->icount-=(ModRM >=0xc0 )?16:20; break; /* CALL */
case 0x18: tmp1 = Sreg(PS); Sreg(PS) = GetnextRMWord; PUSH(tmp1); PUSH(nec_state->ip); nec_state->ip = tmp; CHANGE_PC; nec_state->icount-=(ModRM >=0xc0 )?16:26; break; /* CALL FAR */
case 0x20: nec_state->ip = tmp; CHANGE_PC; nec_state->icount-=13; break; /* JMP */
case 0x28: nec_state->ip = tmp; Sreg(PS) = GetnextRMWord; CHANGE_PC; nec_state->icount-=15; break; /* JMP FAR */
diff --git a/src/emu/cpu/nec/necinstr.h b/src/emu/cpu/nec/necinstr.h
index 30bc3ffcbb2..f00b4fe8fe4 100644
--- a/src/emu/cpu/nec/necinstr.h
+++ b/src/emu/cpu/nec/necinstr.h
@@ -248,260 +248,260 @@ static void i_wait(nec_state_t *nec_state);
static void (*const nec_instruction[256])(nec_state_t *nec_state) =
{
- i_add_br8, /* 0x00 */
- i_add_wr16, /* 0x01 */
- i_add_r8b, /* 0x02 */
- i_add_r16w, /* 0x03 */
- i_add_ald8, /* 0x04 */
- i_add_axd16, /* 0x05 */
- i_push_es, /* 0x06 */
- i_pop_es, /* 0x07 */
- i_or_br8, /* 0x08 */
- i_or_wr16, /* 0x09 */
- i_or_r8b, /* 0x0a */
- i_or_r16w, /* 0x0b */
- i_or_ald8, /* 0x0c */
- i_or_axd16, /* 0x0d */
- i_push_cs, /* 0x0e */
- i_pre_nec, /* 0x0f */
- i_adc_br8, /* 0x10 */
- i_adc_wr16, /* 0x11 */
- i_adc_r8b, /* 0x12 */
- i_adc_r16w, /* 0x13 */
- i_adc_ald8, /* 0x14 */
- i_adc_axd16, /* 0x15 */
- i_push_ss, /* 0x16 */
- i_pop_ss, /* 0x17 */
- i_sbb_br8, /* 0x18 */
- i_sbb_wr16, /* 0x19 */
- i_sbb_r8b, /* 0x1a */
- i_sbb_r16w, /* 0x1b */
- i_sbb_ald8, /* 0x1c */
- i_sbb_axd16, /* 0x1d */
- i_push_ds, /* 0x1e */
- i_pop_ds, /* 0x1f */
- i_and_br8, /* 0x20 */
- i_and_wr16, /* 0x21 */
- i_and_r8b, /* 0x22 */
- i_and_r16w, /* 0x23 */
- i_and_ald8, /* 0x24 */
- i_and_axd16, /* 0x25 */
- i_es, /* 0x26 */
- i_daa, /* 0x27 */
- i_sub_br8, /* 0x28 */
- i_sub_wr16, /* 0x29 */
- i_sub_r8b, /* 0x2a */
- i_sub_r16w, /* 0x2b */
- i_sub_ald8, /* 0x2c */
- i_sub_axd16, /* 0x2d */
- i_cs, /* 0x2e */
- i_das, /* 0x2f */
- i_xor_br8, /* 0x30 */
- i_xor_wr16, /* 0x31 */
- i_xor_r8b, /* 0x32 */
- i_xor_r16w, /* 0x33 */
- i_xor_ald8, /* 0x34 */
- i_xor_axd16, /* 0x35 */
- i_ss, /* 0x36 */
- i_aaa, /* 0x37 */
- i_cmp_br8, /* 0x38 */
- i_cmp_wr16, /* 0x39 */
- i_cmp_r8b, /* 0x3a */
- i_cmp_r16w, /* 0x3b */
- i_cmp_ald8, /* 0x3c */
- i_cmp_axd16, /* 0x3d */
- i_ds, /* 0x3e */
- i_aas, /* 0x3f */
- i_inc_ax, /* 0x40 */
- i_inc_cx, /* 0x41 */
- i_inc_dx, /* 0x42 */
- i_inc_bx, /* 0x43 */
- i_inc_sp, /* 0x44 */
- i_inc_bp, /* 0x45 */
- i_inc_si, /* 0x46 */
- i_inc_di, /* 0x47 */
- i_dec_ax, /* 0x48 */
- i_dec_cx, /* 0x49 */
- i_dec_dx, /* 0x4a */
- i_dec_bx, /* 0x4b */
- i_dec_sp, /* 0x4c */
- i_dec_bp, /* 0x4d */
- i_dec_si, /* 0x4e */
- i_dec_di, /* 0x4f */
- i_push_ax, /* 0x50 */
- i_push_cx, /* 0x51 */
- i_push_dx, /* 0x52 */
- i_push_bx, /* 0x53 */
- i_push_sp, /* 0x54 */
- i_push_bp, /* 0x55 */
- i_push_si, /* 0x56 */
- i_push_di, /* 0x57 */
- i_pop_ax, /* 0x58 */
- i_pop_cx, /* 0x59 */
- i_pop_dx, /* 0x5a */
- i_pop_bx, /* 0x5b */
- i_pop_sp, /* 0x5c */
- i_pop_bp, /* 0x5d */
- i_pop_si, /* 0x5e */
- i_pop_di, /* 0x5f */
- i_pusha, /* 0x60 */
- i_popa, /* 0x61 */
- i_chkind, /* 0x62 */
- i_invalid, /* 0x63 */
- i_repnc, /* 0x64 */
- i_repc, /* 0x65 */
- i_invalid, /* 0x66 */
- i_invalid, /* 0x67 */
- i_push_d16, /* 0x68 */
- i_imul_d16, /* 0x69 */
- i_push_d8, /* 0x6a */
- i_imul_d8, /* 0x6b */
- i_insb, /* 0x6c */
- i_insw, /* 0x6d */
- i_outsb, /* 0x6e */
- i_outsw, /* 0x6f */
- i_jo, /* 0x70 */
- i_jno, /* 0x71 */
- i_jc, /* 0x72 */
- i_jnc, /* 0x73 */
- i_jz, /* 0x74 */
- i_jnz, /* 0x75 */
- i_jce, /* 0x76 */
- i_jnce, /* 0x77 */
- i_js, /* 0x78 */
- i_jns, /* 0x79 */
- i_jp, /* 0x7a */
- i_jnp, /* 0x7b */
- i_jl, /* 0x7c */
- i_jnl, /* 0x7d */
- i_jle, /* 0x7e */
- i_jnle, /* 0x7f */
- i_80pre, /* 0x80 */
- i_81pre, /* 0x81 */
- i_82pre, /* 0x82 */
- i_83pre, /* 0x83 */
- i_test_br8, /* 0x84 */
- i_test_wr16, /* 0x85 */
- i_xchg_br8, /* 0x86 */
- i_xchg_wr16, /* 0x87 */
- i_mov_br8, /* 0x88 */
- i_mov_wr16, /* 0x89 */
- i_mov_r8b, /* 0x8a */
- i_mov_r16w, /* 0x8b */
- i_mov_wsreg, /* 0x8c */
- i_lea, /* 0x8d */
- i_mov_sregw, /* 0x8e */
- i_popw, /* 0x8f */
- i_nop, /* 0x90 */
- i_xchg_axcx, /* 0x91 */
- i_xchg_axdx, /* 0x92 */
- i_xchg_axbx, /* 0x93 */
- i_xchg_axsp, /* 0x94 */
- i_xchg_axbp, /* 0x95 */
- i_xchg_axsi, /* 0x96 */
- i_xchg_axdi, /* 0x97 */
- i_cbw, /* 0x98 */
- i_cwd, /* 0x99 */
- i_call_far, /* 0x9a */
- i_wait, /* 0x9b */
- i_pushf, /* 0x9c */
- i_popf, /* 0x9d */
- i_sahf, /* 0x9e */
- i_lahf, /* 0x9f */
- i_mov_aldisp, /* 0xa0 */
- i_mov_axdisp, /* 0xa1 */
- i_mov_dispal, /* 0xa2 */
- i_mov_dispax, /* 0xa3 */
- i_movsb, /* 0xa4 */
- i_movsw, /* 0xa5 */
- i_cmpsb, /* 0xa6 */
- i_cmpsw, /* 0xa7 */
- i_test_ald8, /* 0xa8 */
- i_test_axd16, /* 0xa9 */
- i_stosb, /* 0xaa */
- i_stosw, /* 0xab */
- i_lodsb, /* 0xac */
- i_lodsw, /* 0xad */
- i_scasb, /* 0xae */
- i_scasw, /* 0xaf */
- i_mov_ald8, /* 0xb0 */
- i_mov_cld8, /* 0xb1 */
- i_mov_dld8, /* 0xb2 */
- i_mov_bld8, /* 0xb3 */
- i_mov_ahd8, /* 0xb4 */
- i_mov_chd8, /* 0xb5 */
- i_mov_dhd8, /* 0xb6 */
- i_mov_bhd8, /* 0xb7 */
- i_mov_axd16, /* 0xb8 */
- i_mov_cxd16, /* 0xb9 */
- i_mov_dxd16, /* 0xba */
- i_mov_bxd16, /* 0xbb */
- i_mov_spd16, /* 0xbc */
- i_mov_bpd16, /* 0xbd */
- i_mov_sid16, /* 0xbe */
- i_mov_did16, /* 0xbf */
- i_rotshft_bd8, /* 0xc0 */
- i_rotshft_wd8, /* 0xc1 */
- i_ret_d16, /* 0xc2 */
- i_ret, /* 0xc3 */
- i_les_dw, /* 0xc4 */
- i_lds_dw, /* 0xc5 */
- i_mov_bd8, /* 0xc6 */
- i_mov_wd16, /* 0xc7 */
- i_enter, /* 0xc8 */
- i_leave, /* 0xc9 */
- i_retf_d16, /* 0xca */
- i_retf, /* 0xcb */
- i_int3, /* 0xcc */
- i_int, /* 0xcd */
- i_into, /* 0xce */
- i_iret, /* 0xcf */
- i_rotshft_b, /* 0xd0 */
- i_rotshft_w, /* 0xd1 */
- i_rotshft_bcl, /* 0xd2 */
- i_rotshft_wcl, /* 0xd3 */
- i_aam, /* 0xd4 */
- i_aad, /* 0xd5 */
- i_setalc, /* 0xd6 */
- i_trans, /* 0xd7 */
- i_fpo, /* 0xd8 */
- i_fpo, /* 0xd9 */
- i_fpo, /* 0xda */
- i_fpo, /* 0xdb */
- i_fpo, /* 0xdc */
- i_fpo, /* 0xdd */
- i_fpo, /* 0xde */
- i_fpo, /* 0xdf */
- i_loopne, /* 0xe0 */
- i_loope, /* 0xe1 */
- i_loop, /* 0xe2 */
- i_jcxz, /* 0xe3 */
- i_inal, /* 0xe4 */
- i_inax, /* 0xe5 */
- i_outal, /* 0xe6 */
- i_outax, /* 0xe7 */
- i_call_d16, /* 0xe8 */
- i_jmp_d16, /* 0xe9 */
- i_jmp_far, /* 0xea */
- i_jmp_d8, /* 0xeb */
- i_inaldx, /* 0xec */
- i_inaxdx, /* 0xed */
- i_outdxal, /* 0xee */
- i_outdxax, /* 0xef */
- i_lock, /* 0xf0 */
- i_invalid, /* 0xf1 */
- i_repne, /* 0xf2 */
- i_repe, /* 0xf3 */
- i_hlt, /* 0xf4 */
- i_cmc, /* 0xf5 */
- i_f6pre, /* 0xf6 */
- i_f7pre, /* 0xf7 */
- i_clc, /* 0xf8 */
- i_stc, /* 0xf9 */
- i_di, /* 0xfa */
- i_ei, /* 0xfb */
- i_cld, /* 0xfc */
- i_std, /* 0xfd */
- i_fepre, /* 0xfe */
- i_ffpre /* 0xff */
+ i_add_br8, /* 0x00 */
+ i_add_wr16, /* 0x01 */
+ i_add_r8b, /* 0x02 */
+ i_add_r16w, /* 0x03 */
+ i_add_ald8, /* 0x04 */
+ i_add_axd16, /* 0x05 */
+ i_push_es, /* 0x06 */
+ i_pop_es, /* 0x07 */
+ i_or_br8, /* 0x08 */
+ i_or_wr16, /* 0x09 */
+ i_or_r8b, /* 0x0a */
+ i_or_r16w, /* 0x0b */
+ i_or_ald8, /* 0x0c */
+ i_or_axd16, /* 0x0d */
+ i_push_cs, /* 0x0e */
+ i_pre_nec, /* 0x0f */
+ i_adc_br8, /* 0x10 */
+ i_adc_wr16, /* 0x11 */
+ i_adc_r8b, /* 0x12 */
+ i_adc_r16w, /* 0x13 */
+ i_adc_ald8, /* 0x14 */
+ i_adc_axd16, /* 0x15 */
+ i_push_ss, /* 0x16 */
+ i_pop_ss, /* 0x17 */
+ i_sbb_br8, /* 0x18 */
+ i_sbb_wr16, /* 0x19 */
+ i_sbb_r8b, /* 0x1a */
+ i_sbb_r16w, /* 0x1b */
+ i_sbb_ald8, /* 0x1c */
+ i_sbb_axd16, /* 0x1d */
+ i_push_ds, /* 0x1e */
+ i_pop_ds, /* 0x1f */
+ i_and_br8, /* 0x20 */
+ i_and_wr16, /* 0x21 */
+ i_and_r8b, /* 0x22 */
+ i_and_r16w, /* 0x23 */
+ i_and_ald8, /* 0x24 */
+ i_and_axd16, /* 0x25 */
+ i_es, /* 0x26 */
+ i_daa, /* 0x27 */
+ i_sub_br8, /* 0x28 */
+ i_sub_wr16, /* 0x29 */
+ i_sub_r8b, /* 0x2a */
+ i_sub_r16w, /* 0x2b */
+ i_sub_ald8, /* 0x2c */
+ i_sub_axd16, /* 0x2d */
+ i_cs, /* 0x2e */
+ i_das, /* 0x2f */
+ i_xor_br8, /* 0x30 */
+ i_xor_wr16, /* 0x31 */
+ i_xor_r8b, /* 0x32 */
+ i_xor_r16w, /* 0x33 */
+ i_xor_ald8, /* 0x34 */
+ i_xor_axd16, /* 0x35 */
+ i_ss, /* 0x36 */
+ i_aaa, /* 0x37 */
+ i_cmp_br8, /* 0x38 */
+ i_cmp_wr16, /* 0x39 */
+ i_cmp_r8b, /* 0x3a */
+ i_cmp_r16w, /* 0x3b */
+ i_cmp_ald8, /* 0x3c */
+ i_cmp_axd16, /* 0x3d */
+ i_ds, /* 0x3e */
+ i_aas, /* 0x3f */
+ i_inc_ax, /* 0x40 */
+ i_inc_cx, /* 0x41 */
+ i_inc_dx, /* 0x42 */
+ i_inc_bx, /* 0x43 */
+ i_inc_sp, /* 0x44 */
+ i_inc_bp, /* 0x45 */
+ i_inc_si, /* 0x46 */
+ i_inc_di, /* 0x47 */
+ i_dec_ax, /* 0x48 */
+ i_dec_cx, /* 0x49 */
+ i_dec_dx, /* 0x4a */
+ i_dec_bx, /* 0x4b */
+ i_dec_sp, /* 0x4c */
+ i_dec_bp, /* 0x4d */
+ i_dec_si, /* 0x4e */
+ i_dec_di, /* 0x4f */
+ i_push_ax, /* 0x50 */
+ i_push_cx, /* 0x51 */
+ i_push_dx, /* 0x52 */
+ i_push_bx, /* 0x53 */
+ i_push_sp, /* 0x54 */
+ i_push_bp, /* 0x55 */
+ i_push_si, /* 0x56 */
+ i_push_di, /* 0x57 */
+ i_pop_ax, /* 0x58 */
+ i_pop_cx, /* 0x59 */
+ i_pop_dx, /* 0x5a */
+ i_pop_bx, /* 0x5b */
+ i_pop_sp, /* 0x5c */
+ i_pop_bp, /* 0x5d */
+ i_pop_si, /* 0x5e */
+ i_pop_di, /* 0x5f */
+ i_pusha, /* 0x60 */
+ i_popa, /* 0x61 */
+ i_chkind, /* 0x62 */
+ i_invalid, /* 0x63 */
+ i_repnc, /* 0x64 */
+ i_repc, /* 0x65 */
+ i_invalid, /* 0x66 */
+ i_invalid, /* 0x67 */
+ i_push_d16, /* 0x68 */
+ i_imul_d16, /* 0x69 */
+ i_push_d8, /* 0x6a */
+ i_imul_d8, /* 0x6b */
+ i_insb, /* 0x6c */
+ i_insw, /* 0x6d */
+ i_outsb, /* 0x6e */
+ i_outsw, /* 0x6f */
+ i_jo, /* 0x70 */
+ i_jno, /* 0x71 */
+ i_jc, /* 0x72 */
+ i_jnc, /* 0x73 */
+ i_jz, /* 0x74 */
+ i_jnz, /* 0x75 */
+ i_jce, /* 0x76 */
+ i_jnce, /* 0x77 */
+ i_js, /* 0x78 */
+ i_jns, /* 0x79 */
+ i_jp, /* 0x7a */
+ i_jnp, /* 0x7b */
+ i_jl, /* 0x7c */
+ i_jnl, /* 0x7d */
+ i_jle, /* 0x7e */
+ i_jnle, /* 0x7f */
+ i_80pre, /* 0x80 */
+ i_81pre, /* 0x81 */
+ i_82pre, /* 0x82 */
+ i_83pre, /* 0x83 */
+ i_test_br8, /* 0x84 */
+ i_test_wr16, /* 0x85 */
+ i_xchg_br8, /* 0x86 */
+ i_xchg_wr16, /* 0x87 */
+ i_mov_br8, /* 0x88 */
+ i_mov_wr16, /* 0x89 */
+ i_mov_r8b, /* 0x8a */
+ i_mov_r16w, /* 0x8b */
+ i_mov_wsreg, /* 0x8c */
+ i_lea, /* 0x8d */
+ i_mov_sregw, /* 0x8e */
+ i_popw, /* 0x8f */
+ i_nop, /* 0x90 */
+ i_xchg_axcx, /* 0x91 */
+ i_xchg_axdx, /* 0x92 */
+ i_xchg_axbx, /* 0x93 */
+ i_xchg_axsp, /* 0x94 */
+ i_xchg_axbp, /* 0x95 */
+ i_xchg_axsi, /* 0x96 */
+ i_xchg_axdi, /* 0x97 */
+ i_cbw, /* 0x98 */
+ i_cwd, /* 0x99 */
+ i_call_far, /* 0x9a */
+ i_wait, /* 0x9b */
+ i_pushf, /* 0x9c */
+ i_popf, /* 0x9d */
+ i_sahf, /* 0x9e */
+ i_lahf, /* 0x9f */
+ i_mov_aldisp, /* 0xa0 */
+ i_mov_axdisp, /* 0xa1 */
+ i_mov_dispal, /* 0xa2 */
+ i_mov_dispax, /* 0xa3 */
+ i_movsb, /* 0xa4 */
+ i_movsw, /* 0xa5 */
+ i_cmpsb, /* 0xa6 */
+ i_cmpsw, /* 0xa7 */
+ i_test_ald8, /* 0xa8 */
+ i_test_axd16, /* 0xa9 */
+ i_stosb, /* 0xaa */
+ i_stosw, /* 0xab */
+ i_lodsb, /* 0xac */
+ i_lodsw, /* 0xad */
+ i_scasb, /* 0xae */
+ i_scasw, /* 0xaf */
+ i_mov_ald8, /* 0xb0 */
+ i_mov_cld8, /* 0xb1 */
+ i_mov_dld8, /* 0xb2 */
+ i_mov_bld8, /* 0xb3 */
+ i_mov_ahd8, /* 0xb4 */
+ i_mov_chd8, /* 0xb5 */
+ i_mov_dhd8, /* 0xb6 */
+ i_mov_bhd8, /* 0xb7 */
+ i_mov_axd16, /* 0xb8 */
+ i_mov_cxd16, /* 0xb9 */
+ i_mov_dxd16, /* 0xba */
+ i_mov_bxd16, /* 0xbb */
+ i_mov_spd16, /* 0xbc */
+ i_mov_bpd16, /* 0xbd */
+ i_mov_sid16, /* 0xbe */
+ i_mov_did16, /* 0xbf */
+ i_rotshft_bd8, /* 0xc0 */
+ i_rotshft_wd8, /* 0xc1 */
+ i_ret_d16, /* 0xc2 */
+ i_ret, /* 0xc3 */
+ i_les_dw, /* 0xc4 */
+ i_lds_dw, /* 0xc5 */
+ i_mov_bd8, /* 0xc6 */
+ i_mov_wd16, /* 0xc7 */
+ i_enter, /* 0xc8 */
+ i_leave, /* 0xc9 */
+ i_retf_d16, /* 0xca */
+ i_retf, /* 0xcb */
+ i_int3, /* 0xcc */
+ i_int, /* 0xcd */
+ i_into, /* 0xce */
+ i_iret, /* 0xcf */
+ i_rotshft_b, /* 0xd0 */
+ i_rotshft_w, /* 0xd1 */
+ i_rotshft_bcl, /* 0xd2 */
+ i_rotshft_wcl, /* 0xd3 */
+ i_aam, /* 0xd4 */
+ i_aad, /* 0xd5 */
+ i_setalc, /* 0xd6 */
+ i_trans, /* 0xd7 */
+ i_fpo, /* 0xd8 */
+ i_fpo, /* 0xd9 */
+ i_fpo, /* 0xda */
+ i_fpo, /* 0xdb */
+ i_fpo, /* 0xdc */
+ i_fpo, /* 0xdd */
+ i_fpo, /* 0xde */
+ i_fpo, /* 0xdf */
+ i_loopne, /* 0xe0 */
+ i_loope, /* 0xe1 */
+ i_loop, /* 0xe2 */
+ i_jcxz, /* 0xe3 */
+ i_inal, /* 0xe4 */
+ i_inax, /* 0xe5 */
+ i_outal, /* 0xe6 */
+ i_outax, /* 0xe7 */
+ i_call_d16, /* 0xe8 */
+ i_jmp_d16, /* 0xe9 */
+ i_jmp_far, /* 0xea */
+ i_jmp_d8, /* 0xeb */
+ i_inaldx, /* 0xec */
+ i_inaxdx, /* 0xed */
+ i_outdxal, /* 0xee */
+ i_outdxax, /* 0xef */
+ i_lock, /* 0xf0 */
+ i_invalid, /* 0xf1 */
+ i_repne, /* 0xf2 */
+ i_repe, /* 0xf3 */
+ i_hlt, /* 0xf4 */
+ i_cmc, /* 0xf5 */
+ i_f6pre, /* 0xf6 */
+ i_f7pre, /* 0xf7 */
+ i_clc, /* 0xf8 */
+ i_stc, /* 0xf9 */
+ i_di, /* 0xfa */
+ i_ei, /* 0xfb */
+ i_cld, /* 0xfc */
+ i_std, /* 0xfd */
+ i_fepre, /* 0xfe */
+ i_ffpre /* 0xff */
};
diff --git a/src/emu/cpu/nec/necmacro.h b/src/emu/cpu/nec/necmacro.h
index e244b2b4cfe..f74a2d80576 100644
--- a/src/emu/cpu/nec/necmacro.h
+++ b/src/emu/cpu/nec/necmacro.h
@@ -1,24 +1,24 @@
/* parameter x = result, y = source 1, z = source 2 */
-#define SetTF(x) (nec_state->TF = (x))
-#define SetIF(x) (nec_state->IF = (x))
-#define SetDF(x) (nec_state->DF = (x))
-#define SetMD(x) (nec_state->MF = (x)) /* OB [19.07.99] Mode Flag V30 */
+#define SetTF(x) (nec_state->TF = (x))
+#define SetIF(x) (nec_state->IF = (x))
+#define SetDF(x) (nec_state->DF = (x))
+#define SetMD(x) (nec_state->MF = (x)) /* OB [19.07.99] Mode Flag V30 */
-#define SetCFB(x) (nec_state->CarryVal = (x) & 0x100)
-#define SetCFW(x) (nec_state->CarryVal = (x) & 0x10000)
-#define SetAF(x,y,z) (nec_state->AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
-#define SetSF(x) (nec_state->SignVal = (x))
-#define SetZF(x) (nec_state->ZeroVal = (x))
-#define SetPF(x) (nec_state->ParityVal = (x))
+#define SetCFB(x) (nec_state->CarryVal = (x) & 0x100)
+#define SetCFW(x) (nec_state->CarryVal = (x) & 0x10000)
+#define SetAF(x,y,z) (nec_state->AuxVal = ((x) ^ ((y) ^ (z))) & 0x10)
+#define SetSF(x) (nec_state->SignVal = (x))
+#define SetZF(x) (nec_state->ZeroVal = (x))
+#define SetPF(x) (nec_state->ParityVal = (x))
#define SetSZPF_Byte(x) (nec_state->SignVal=nec_state->ZeroVal=nec_state->ParityVal=(INT8)(x))
#define SetSZPF_Word(x) (nec_state->SignVal=nec_state->ZeroVal=nec_state->ParityVal=(INT16)(x))
-#define SetOFW_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
-#define SetOFB_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
-#define SetOFW_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
-#define SetOFB_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
+#define SetOFW_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x8000)
+#define SetOFB_Add(x,y,z) (nec_state->OverVal = ((x) ^ (y)) & ((x) ^ (z)) & 0x80)
+#define SetOFW_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000)
+#define SetOFB_Sub(x,y,z) (nec_state->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80)
#define ADDB { UINT32 res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; }
#define ADDW { UINT32 res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; }
@@ -35,96 +35,96 @@
#define XORB dst^=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Byte(dst)
#define XORW dst^=src; nec_state->CarryVal=nec_state->OverVal=nec_state->AuxVal=0; SetSZPF_Word(dst)
-#define IncWordReg(Reg) \
+#define IncWordReg(Reg) \
unsigned tmp = (unsigned)Wreg(Reg); \
- unsigned tmp1 = tmp+1; \
- nec_state->OverVal = (tmp == 0x7fff); \
- SetAF(tmp1,tmp,1); \
- SetSZPF_Word(tmp1); \
+ unsigned tmp1 = tmp+1; \
+ nec_state->OverVal = (tmp == 0x7fff); \
+ SetAF(tmp1,tmp,1); \
+ SetSZPF_Word(tmp1); \
Wreg(Reg)=tmp1
-#define DecWordReg(Reg) \
+#define DecWordReg(Reg) \
unsigned tmp = (unsigned)Wreg(Reg); \
- unsigned tmp1 = tmp-1; \
- nec_state->OverVal = (tmp == 0x8000); \
- SetAF(tmp1,tmp,1); \
- SetSZPF_Word(tmp1); \
+ unsigned tmp1 = tmp-1; \
+ nec_state->OverVal = (tmp == 0x8000); \
+ SetAF(tmp1,tmp,1); \
+ SetSZPF_Word(tmp1); \
Wreg(Reg)=tmp1
-#define JMP(flag) \
- int tmp; \
- EMPTY_PREFETCH(); \
- tmp = (int)((INT8)FETCH()); \
- if (flag) \
- { \
- static const UINT8 table[3]={3,10,10}; \
- nec_state->ip = (WORD)(nec_state->ip+tmp); \
- nec_state->icount-=table[nec_state->chip_type/8]; \
- CHANGE_PC; \
- return; \
+#define JMP(flag) \
+ int tmp; \
+ EMPTY_PREFETCH(); \
+ tmp = (int)((INT8)FETCH()); \
+ if (flag) \
+ { \
+ static const UINT8 table[3]={3,10,10}; \
+ nec_state->ip = (WORD)(nec_state->ip+tmp); \
+ nec_state->icount-=table[nec_state->chip_type/8]; \
+ CHANGE_PC; \
+ return; \
}
-#define ADJ4(param1,param2) \
- if (AF || ((Breg(AL) & 0xf) > 9)) \
- { \
- UINT16 tmp; \
- tmp = Breg(AL) + param1; \
- Breg(AL) = tmp; \
- nec_state->AuxVal = 1; \
- nec_state->CarryVal |= tmp & 0x100; \
- } \
- if (CF || (Breg(AL)>0x9f)) \
- { \
- Breg(AL) += param2; \
- nec_state->CarryVal = 1; \
- } \
+#define ADJ4(param1,param2) \
+ if (AF || ((Breg(AL) & 0xf) > 9)) \
+ { \
+ UINT16 tmp; \
+ tmp = Breg(AL) + param1; \
+ Breg(AL) = tmp; \
+ nec_state->AuxVal = 1; \
+ nec_state->CarryVal |= tmp & 0x100; \
+ } \
+ if (CF || (Breg(AL)>0x9f)) \
+ { \
+ Breg(AL) += param2; \
+ nec_state->CarryVal = 1; \
+ } \
SetSZPF_Byte(Breg(AL))
-#define ADJB(param1,param2) \
- if (AF || ((Breg(AL) & 0xf) > 9)) \
- { \
- Breg(AL) += param1; \
- Breg(AH) += param2; \
- nec_state->AuxVal = 1; \
- nec_state->CarryVal = 1; \
- } \
- else \
- { \
- nec_state->AuxVal = 0; \
- nec_state->CarryVal = 0; \
- } \
+#define ADJB(param1,param2) \
+ if (AF || ((Breg(AL) & 0xf) > 9)) \
+ { \
+ Breg(AL) += param1; \
+ Breg(AH) += param2; \
+ nec_state->AuxVal = 1; \
+ nec_state->CarryVal = 1; \
+ } \
+ else \
+ { \
+ nec_state->AuxVal = 0; \
+ nec_state->CarryVal = 0; \
+ } \
Breg(AL) &= 0x0F
-#define BITOP_BYTE \
- ModRM = FETCH(); \
- if (ModRM >= 0xc0) { \
- tmp=Breg(Mod_RM.RM.b[ModRM]); \
- } \
- else { \
- (*GetEA[ModRM])(nec_state); \
- tmp=read_mem_byte(EA); \
+#define BITOP_BYTE \
+ ModRM = FETCH(); \
+ if (ModRM >= 0xc0) { \
+ tmp=Breg(Mod_RM.RM.b[ModRM]); \
+ } \
+ else { \
+ (*GetEA[ModRM])(nec_state); \
+ tmp=read_mem_byte(EA); \
}
-#define BITOP_WORD \
- ModRM = FETCH(); \
- if (ModRM >= 0xc0) { \
- tmp=Wreg(Mod_RM.RM.w[ModRM]); \
- } \
- else { \
- (*GetEA[ModRM])(nec_state); \
- tmp=read_mem_word(EA); \
+#define BITOP_WORD \
+ ModRM = FETCH(); \
+ if (ModRM >= 0xc0) { \
+ tmp=Wreg(Mod_RM.RM.w[ModRM]); \
+ } \
+ else { \
+ (*GetEA[ModRM])(nec_state); \
+ tmp=read_mem_word(EA); \
}
-#define BIT_NOT \
- if (tmp & (1<<tmp2)) \
- tmp &= ~(1<<tmp2); \
- else \
+#define BIT_NOT \
+ if (tmp & (1<<tmp2)) \
+ tmp &= ~(1<<tmp2); \
+ else \
tmp |= (1<<tmp2)
-#define XchgAWReg(Reg) \
- WORD tmp; \
- tmp = Wreg(Reg); \
- Wreg(Reg) = Wreg(AW); \
+#define XchgAWReg(Reg) \
+ WORD tmp; \
+ tmp = Wreg(Reg); \
+ Wreg(Reg) = Wreg(AW); \
Wreg(AW) = tmp
#define ROL_BYTE nec_state->CarryVal = dst & 0x80; dst = (dst << 1)+CF
@@ -135,133 +135,133 @@
#define ROLC_WORD dst = (dst << 1) + CF; SetCFW(dst)
#define RORC_BYTE dst = (CF<<8)+dst; nec_state->CarryVal = dst & 0x01; dst >>= 1
#define RORC_WORD dst = (CF<<16)+dst; nec_state->CarryVal = dst & 0x01; dst >>= 1
-#define SHL_BYTE(c) nec_state->icount-=c; dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
-#define SHL_WORD(c) nec_state->icount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
+#define SHL_BYTE(c) nec_state->icount-=c; dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
+#define SHL_WORD(c) nec_state->icount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
#define SHR_BYTE(c) nec_state->icount-=c; dst >>= c-1; nec_state->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
#define SHR_WORD(c) nec_state->icount-=c; dst >>= c-1; nec_state->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
-#define SHRA_BYTE(c) nec_state->icount-=c; dst = ((INT8)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT8)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
-#define SHRA_WORD(c) nec_state->icount-=c; dst = ((INT16)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
+#define SHRA_BYTE(c) nec_state->icount-=c; dst = ((INT8)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT8)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst)
+#define SHRA_WORD(c) nec_state->icount-=c; dst = ((INT16)dst) >> (c-1); nec_state->CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst)
-#define DIVUB \
- uresult = Wreg(AW); \
- uresult2 = uresult % tmp; \
- if ((uresult /= tmp) > 0xff) { \
- nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
- } else { \
- Breg(AL) = uresult; \
- Breg(AH) = uresult2; \
+#define DIVUB \
+ uresult = Wreg(AW); \
+ uresult2 = uresult % tmp; \
+ if ((uresult /= tmp) > 0xff) { \
+ nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
+ } else { \
+ Breg(AL) = uresult; \
+ Breg(AH) = uresult2; \
}
-#define DIVB \
- result = (INT16)Wreg(AW); \
- result2 = result % (INT16)((INT8)tmp); \
- if ((result /= (INT16)((INT8)tmp)) > 0xff) { \
- nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
- } else { \
- Breg(AL) = result; \
- Breg(AH) = result2; \
+#define DIVB \
+ result = (INT16)Wreg(AW); \
+ result2 = result % (INT16)((INT8)tmp); \
+ if ((result /= (INT16)((INT8)tmp)) > 0xff) { \
+ nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
+ } else { \
+ Breg(AL) = result; \
+ Breg(AH) = result2; \
}
-#define DIVUW \
+#define DIVUW \
uresult = (((UINT32)Wreg(DW)) << 16) | Wreg(AW);\
- uresult2 = uresult % tmp; \
- if ((uresult /= tmp) > 0xffff) { \
- nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
- } else { \
- Wreg(AW)=uresult; \
- Wreg(DW)=uresult2; \
+ uresult2 = uresult % tmp; \
+ if ((uresult /= tmp) > 0xffff) { \
+ nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
+ } else { \
+ Wreg(AW)=uresult; \
+ Wreg(DW)=uresult2; \
}
-#define DIVW \
- result = ((UINT32)Wreg(DW) << 16) + Wreg(AW); \
- result2 = result % (INT32)((INT16)tmp); \
- if ((result /= (INT32)((INT16)tmp)) > 0xffff) { \
- nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
- } else { \
- Wreg(AW)=result; \
- Wreg(DW)=result2; \
+#define DIVW \
+ result = ((UINT32)Wreg(DW) << 16) + Wreg(AW); \
+ result2 = result % (INT32)((INT16)tmp); \
+ if ((result /= (INT32)((INT16)tmp)) > 0xffff) { \
+ nec_interrupt(nec_state, NEC_DIVIDE_VECTOR, BRK); break; \
+ } else { \
+ Wreg(AW)=result; \
+ Wreg(DW)=result2; \
}
-#define ADD4S { \
- int i,v1,v2,result; \
- int count = (Breg(CL)+1)/2; \
- unsigned di = Wreg(IY); \
- unsigned si = Wreg(IX); \
- static const UINT8 table[3]={18,19,19}; \
- if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",PC(nec_state)); \
- nec_state->ZeroVal = nec_state->CarryVal = 0; \
- for (i=0;i<count;i++) { \
- nec_state->icount-=table[nec_state->chip_type/8]; \
- tmp = GetMemB(DS0, si); \
- tmp2 = GetMemB(DS1, di); \
- v1 = (tmp>>4)*10 + (tmp&0xf); \
- v2 = (tmp2>>4)*10 + (tmp2&0xf); \
- result = v1+v2+nec_state->CarryVal; \
- nec_state->CarryVal = result > 99 ? 1 : 0; \
- result = result % 100; \
- v1 = ((result/10)<<4) | (result % 10); \
- PutMemB(DS1, di,v1); \
- if (v1) nec_state->ZeroVal = 1; \
- si++; \
- di++; \
- } \
+#define ADD4S { \
+ int i,v1,v2,result; \
+ int count = (Breg(CL)+1)/2; \
+ unsigned di = Wreg(IY); \
+ unsigned si = Wreg(IX); \
+ static const UINT8 table[3]={18,19,19}; \
+ if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for add4s\n",PC(nec_state)); \
+ nec_state->ZeroVal = nec_state->CarryVal = 0; \
+ for (i=0;i<count;i++) { \
+ nec_state->icount-=table[nec_state->chip_type/8]; \
+ tmp = GetMemB(DS0, si); \
+ tmp2 = GetMemB(DS1, di); \
+ v1 = (tmp>>4)*10 + (tmp&0xf); \
+ v2 = (tmp2>>4)*10 + (tmp2&0xf); \
+ result = v1+v2+nec_state->CarryVal; \
+ nec_state->CarryVal = result > 99 ? 1 : 0; \
+ result = result % 100; \
+ v1 = ((result/10)<<4) | (result % 10); \
+ PutMemB(DS1, di,v1); \
+ if (v1) nec_state->ZeroVal = 1; \
+ si++; \
+ di++; \
+ } \
}
-#define SUB4S { \
- int count = (Breg(CL)+1)/2; \
- int i,v1,v2,result; \
- unsigned di = Wreg(IY); \
- unsigned si = Wreg(IX); \
- static const UINT8 table[3]={18,19,19}; \
- if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for sub4s\n",PC(nec_state)); \
- nec_state->ZeroVal = nec_state->CarryVal = 0; \
- for (i=0;i<count;i++) { \
- nec_state->icount-=table[nec_state->chip_type/8]; \
- tmp = GetMemB(DS1, di); \
- tmp2 = GetMemB(DS0, si); \
- v1 = (tmp>>4)*10 + (tmp&0xf); \
- v2 = (tmp2>>4)*10 + (tmp2&0xf); \
- if (v1 < (v2+nec_state->CarryVal)) { \
- v1+=100; \
- result = v1-(v2+nec_state->CarryVal); \
- nec_state->CarryVal = 1; \
- } else { \
- result = v1-(v2+nec_state->CarryVal); \
- nec_state->CarryVal = 0; \
- } \
- v1 = ((result/10)<<4) | (result % 10); \
- PutMemB(DS1, di,v1); \
- if (v1) nec_state->ZeroVal = 1; \
- si++; \
- di++; \
- } \
+#define SUB4S { \
+ int count = (Breg(CL)+1)/2; \
+ int i,v1,v2,result; \
+ unsigned di = Wreg(IY); \
+ unsigned si = Wreg(IX); \
+ static const UINT8 table[3]={18,19,19}; \
+ if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for sub4s\n",PC(nec_state)); \
+ nec_state->ZeroVal = nec_state->CarryVal = 0; \
+ for (i=0;i<count;i++) { \
+ nec_state->icount-=table[nec_state->chip_type/8]; \
+ tmp = GetMemB(DS1, di); \
+ tmp2 = GetMemB(DS0, si); \
+ v1 = (tmp>>4)*10 + (tmp&0xf); \
+ v2 = (tmp2>>4)*10 + (tmp2&0xf); \
+ if (v1 < (v2+nec_state->CarryVal)) { \
+ v1+=100; \
+ result = v1-(v2+nec_state->CarryVal); \
+ nec_state->CarryVal = 1; \
+ } else { \
+ result = v1-(v2+nec_state->CarryVal); \
+ nec_state->CarryVal = 0; \
+ } \
+ v1 = ((result/10)<<4) | (result % 10); \
+ PutMemB(DS1, di,v1); \
+ if (v1) nec_state->ZeroVal = 1; \
+ si++; \
+ di++; \
+ } \
}
-#define CMP4S { \
- int count = (Breg(CL)+1)/2; \
- int i,v1,v2,result; \
- unsigned di = Wreg(IY); \
- unsigned si = Wreg(IX); \
- static const UINT8 table[3]={14,19,19}; \
- if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for cmp4s\n",PC(nec_state)); \
- nec_state->ZeroVal = nec_state->CarryVal = 0; \
- for (i=0;i<count;i++) { \
- nec_state->icount-=table[nec_state->chip_type/8]; \
- tmp = GetMemB(DS1, di); \
- tmp2 = GetMemB(DS0, si); \
- v1 = (tmp>>4)*10 + (tmp&0xf); \
- v2 = (tmp2>>4)*10 + (tmp2&0xf); \
- if (v1 < (v2+nec_state->CarryVal)) { \
- v1+=100; \
- result = v1-(v2+nec_state->CarryVal); \
- nec_state->CarryVal = 1; \
- } else { \
- result = v1-(v2+nec_state->CarryVal); \
- nec_state->CarryVal = 0; \
- } \
- v1 = ((result/10)<<4) | (result % 10); \
- if (v1) nec_state->ZeroVal = 1; \
- si++; \
- di++; \
- } \
+#define CMP4S { \
+ int count = (Breg(CL)+1)/2; \
+ int i,v1,v2,result; \
+ unsigned di = Wreg(IY); \
+ unsigned si = Wreg(IX); \
+ static const UINT8 table[3]={14,19,19}; \
+ if (nec_state->seg_prefix) logerror("%06x: Warning: seg_prefix defined for cmp4s\n",PC(nec_state)); \
+ nec_state->ZeroVal = nec_state->CarryVal = 0; \
+ for (i=0;i<count;i++) { \
+ nec_state->icount-=table[nec_state->chip_type/8]; \
+ tmp = GetMemB(DS1, di); \
+ tmp2 = GetMemB(DS0, si); \
+ v1 = (tmp>>4)*10 + (tmp&0xf); \
+ v2 = (tmp2>>4)*10 + (tmp2&0xf); \
+ if (v1 < (v2+nec_state->CarryVal)) { \
+ v1+=100; \
+ result = v1-(v2+nec_state->CarryVal); \
+ nec_state->CarryVal = 1; \
+ } else { \
+ result = v1-(v2+nec_state->CarryVal); \
+ nec_state->CarryVal = 0; \
+ } \
+ v1 = ((result/10)<<4) | (result % 10); \
+ if (v1) nec_state->ZeroVal = 1; \
+ si++; \
+ di++; \
+ } \
}
diff --git a/src/emu/cpu/nec/necmodrm.h b/src/emu/cpu/nec/necmodrm.h
index cf8956b8106..fe64ff40fef 100644
--- a/src/emu/cpu/nec/necmodrm.h
+++ b/src/emu/cpu/nec/necmodrm.h
@@ -15,90 +15,90 @@ static struct {
#define GetRMWord(ModRM) \
((ModRM) >= 0xc0 ? Wreg(Mod_RM.RM.w[ModRM]) : ( (*GetEA[ModRM])(nec_state), read_mem_word( EA ) ))
-#define PutbackRMWord(ModRM,val) \
-{ \
+#define PutbackRMWord(ModRM,val) \
+{ \
if (ModRM >= 0xc0) Wreg(Mod_RM.RM.w[ModRM])=val; \
- else write_mem_word(EA,val); \
+ else write_mem_word(EA,val); \
}
#define GetnextRMWord read_mem_word((EA&0xf0000)|((EA+2)&0xffff))
-#define PutRMWord(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- Wreg(Mod_RM.RM.w[ModRM])=val; \
- else { \
- (*GetEA[ModRM])(nec_state); \
- write_mem_word( EA ,val); \
- } \
+#define PutRMWord(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ Wreg(Mod_RM.RM.w[ModRM])=val; \
+ else { \
+ (*GetEA[ModRM])(nec_state); \
+ write_mem_word( EA ,val); \
+ } \
}
-#define PutImmRMWord(ModRM) \
-{ \
- WORD val; \
- if (ModRM >= 0xc0) \
+#define PutImmRMWord(ModRM) \
+{ \
+ WORD val; \
+ if (ModRM >= 0xc0) \
Wreg(Mod_RM.RM.w[ModRM]) = FETCHWORD(); \
- else { \
- (*GetEA[ModRM])(nec_state); \
- val = FETCHWORD(); \
- write_mem_word( EA , val); \
- } \
+ else { \
+ (*GetEA[ModRM])(nec_state); \
+ val = FETCHWORD(); \
+ write_mem_word( EA , val); \
+ } \
}
#define GetRMByte(ModRM) \
((ModRM) >= 0xc0 ? Breg(Mod_RM.RM.b[ModRM]) : read_mem_byte( (*GetEA[ModRM])(nec_state) ))
-#define PutRMByte(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- Breg(Mod_RM.RM.b[ModRM])=val; \
- else \
- write_mem_byte( (*GetEA[ModRM])(nec_state) ,val); \
+#define PutRMByte(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ Breg(Mod_RM.RM.b[ModRM])=val; \
+ else \
+ write_mem_byte( (*GetEA[ModRM])(nec_state) ,val); \
}
-#define PutImmRMByte(ModRM) \
-{ \
- if (ModRM >= 0xc0) \
- Breg(Mod_RM.RM.b[ModRM])=FETCH(); \
- else { \
- (*GetEA[ModRM])(nec_state); \
- write_mem_byte( EA , FETCH() ); \
- } \
+#define PutImmRMByte(ModRM) \
+{ \
+ if (ModRM >= 0xc0) \
+ Breg(Mod_RM.RM.b[ModRM])=FETCH(); \
+ else { \
+ (*GetEA[ModRM])(nec_state); \
+ write_mem_byte( EA , FETCH() ); \
+ } \
}
-#define PutbackRMByte(ModRM,val) \
-{ \
- if (ModRM >= 0xc0) \
- Breg(Mod_RM.RM.b[ModRM])=val; \
- else \
- write_mem_byte(EA,val); \
+#define PutbackRMByte(ModRM,val) \
+{ \
+ if (ModRM >= 0xc0) \
+ Breg(Mod_RM.RM.b[ModRM])=val; \
+ else \
+ write_mem_byte(EA,val); \
}
-#define DEF_br8 \
- UINT32 ModRM = FETCH(),src,dst; \
- src = RegByte(ModRM); \
- dst = GetRMByte(ModRM)
+#define DEF_br8 \
+ UINT32 ModRM = FETCH(),src,dst; \
+ src = RegByte(ModRM); \
+ dst = GetRMByte(ModRM)
-#define DEF_wr16 \
- UINT32 ModRM = FETCH(),src,dst; \
- src = RegWord(ModRM); \
- dst = GetRMWord(ModRM)
+#define DEF_wr16 \
+ UINT32 ModRM = FETCH(),src,dst; \
+ src = RegWord(ModRM); \
+ dst = GetRMWord(ModRM)
-#define DEF_r8b \
- UINT32 ModRM = FETCH(),src,dst; \
- dst = RegByte(ModRM); \
- src = GetRMByte(ModRM)
+#define DEF_r8b \
+ UINT32 ModRM = FETCH(),src,dst; \
+ dst = RegByte(ModRM); \
+ src = GetRMByte(ModRM)
-#define DEF_r16w \
- UINT32 ModRM = FETCH(),src,dst; \
- dst = RegWord(ModRM); \
- src = GetRMWord(ModRM)
+#define DEF_r16w \
+ UINT32 ModRM = FETCH(),src,dst; \
+ dst = RegWord(ModRM); \
+ src = GetRMWord(ModRM)
-#define DEF_ald8 \
- UINT32 src = FETCH(); \
+#define DEF_ald8 \
+ UINT32 src = FETCH(); \
UINT32 dst = Breg(AL)
-#define DEF_axd16 \
- UINT32 src = FETCH(); \
- UINT32 dst = Wreg(AW); \
- src += (FETCH() << 8)
+#define DEF_axd16 \
+ UINT32 src = FETCH(); \
+ UINT32 dst = Wreg(AW); \
+ src += (FETCH() << 8)
diff --git a/src/emu/cpu/nec/necpriv.h b/src/emu/cpu/nec/necpriv.h
index 22a524a1074..d0e706d0ba6 100644
--- a/src/emu/cpu/nec/necpriv.h
+++ b/src/emu/cpu/nec/necpriv.h
@@ -11,11 +11,11 @@
/* interrupt vectors */
enum
{
- NEC_DIVIDE_VECTOR = 0,
- NEC_TRAP_VECTOR = 1,
- NEC_NMI_VECTOR = 2,
- NEC_BRKV_VECTOR = 4,
- NEC_CHKIND_VECTOR = 5,
+ NEC_DIVIDE_VECTOR = 0,
+ NEC_TRAP_VECTOR = 1,
+ NEC_NMI_VECTOR = 2,
+ NEC_BRKV_VECTOR = 4,
+ NEC_CHKIND_VECTOR = 5,
};
/* interrupt sources */
@@ -29,85 +29,85 @@ enum INTSOURCES
/* NEC registers */
union necbasicregs
{ /* eight general registers */
- UINT16 w[8]; /* viewed as 16 bits registers */
- UINT8 b[16]; /* or as 8 bit registers */
+ UINT16 w[8]; /* viewed as 16 bits registers */
+ UINT8 b[16]; /* or as 8 bit registers */
};
struct nec_state_t
{
necbasicregs regs;
- offs_t fetch_xor;
- UINT16 sregs[4];
+ offs_t fetch_xor;
+ UINT16 sregs[4];
- UINT16 ip;
+ UINT16 ip;
/* PSW flags */
- INT32 SignVal;
- UINT32 AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
- UINT8 TF, IF, DF, MF; /* 0 or 1 valued flags */
+ INT32 SignVal;
+ UINT32 AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
+ UINT8 TF, IF, DF, MF; /* 0 or 1 valued flags */
/* interrupt related */
- UINT32 pending_irq;
- UINT32 nmi_state;
- UINT32 irq_state;
- UINT32 poll_state;
- UINT8 no_interrupt;
- UINT8 halted;
+ UINT32 pending_irq;
+ UINT32 nmi_state;
+ UINT32 irq_state;
+ UINT32 poll_state;
+ UINT8 no_interrupt;
+ UINT8 halted;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *io;
- int icount;
+ int icount;
- UINT8 prefetch_size;
- UINT8 prefetch_cycles;
- INT8 prefetch_count;
- UINT8 prefetch_reset;
- UINT32 chip_type;
+ UINT8 prefetch_size;
+ UINT8 prefetch_cycles;
+ INT8 prefetch_count;
+ UINT8 prefetch_reset;
+ UINT32 chip_type;
- UINT32 prefix_base; /* base address of the latest prefix segment */
- UINT8 seg_prefix; /* prefix segment indicator */
+ UINT32 prefix_base; /* base address of the latest prefix segment */
+ UINT8 seg_prefix; /* prefix segment indicator */
};
enum SREGS { DS1, PS, SS, DS0 };
enum WREGS { AW, CW, DW, BW, SP, BP, IX, IY };
enum BREGS {
- AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1),
- AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0),
- CL = NATIVE_ENDIAN_VALUE_LE_BE(0x2, 0x3),
- CH = NATIVE_ENDIAN_VALUE_LE_BE(0x3, 0x2),
- DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5),
- DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
- BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
- BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6),
+ AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1),
+ AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0),
+ CL = NATIVE_ENDIAN_VALUE_LE_BE(0x2, 0x3),
+ CH = NATIVE_ENDIAN_VALUE_LE_BE(0x3, 0x2),
+ DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5),
+ DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
+ BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
+ BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6),
};
-#define Sreg(x) nec_state->sregs[x]
-#define Wreg(x) nec_state->regs.w[x]
-#define Breg(x) nec_state->regs.b[x]
+#define Sreg(x) nec_state->sregs[x]
+#define Wreg(x) nec_state->regs.w[x]
+#define Breg(x) nec_state->regs.b[x]
-#define PC(n) ((Sreg(PS)<<4)+(n)->ip)
+#define PC(n) ((Sreg(PS)<<4)+(n)->ip)
-#define CF (nec_state->CarryVal!=0)
-#define SF (nec_state->SignVal<0)
-#define ZF (nec_state->ZeroVal==0)
-#define PF parity_table[(BYTE)nec_state->ParityVal]
-#define AF (nec_state->AuxVal!=0)
-#define OF (nec_state->OverVal!=0)
+#define CF (nec_state->CarryVal!=0)
+#define SF (nec_state->SignVal<0)
+#define ZF (nec_state->ZeroVal==0)
+#define PF parity_table[(BYTE)nec_state->ParityVal]
+#define AF (nec_state->AuxVal!=0)
+#define OF (nec_state->OverVal!=0)
/************************************************************************/
-#define read_mem_byte(a) nec_state->program->read_byte(a)
-#define read_mem_word(a) nec_state->program->read_word_unaligned(a)
-#define write_mem_byte(a,d) nec_state->program->write_byte((a),(d))
-#define write_mem_word(a,d) nec_state->program->write_word_unaligned((a),(d))
+#define read_mem_byte(a) nec_state->program->read_byte(a)
+#define read_mem_word(a) nec_state->program->read_word_unaligned(a)
+#define write_mem_byte(a,d) nec_state->program->write_byte((a),(d))
+#define write_mem_word(a,d) nec_state->program->write_word_unaligned((a),(d))
-#define read_port_byte(a) nec_state->io->read_byte(a)
-#define read_port_word(a) nec_state->io->read_word_unaligned(a)
-#define write_port_byte(a,d) nec_state->io->write_byte((a),(d))
-#define write_port_word(a,d) nec_state->io->write_word_unaligned((a),(d))
+#define read_port_byte(a) nec_state->io->read_byte(a)
+#define read_port_word(a) nec_state->io->read_word_unaligned(a)
+#define write_port_byte(a,d) nec_state->io->write_byte((a),(d))
+#define write_port_word(a,d) nec_state->io->write_word_unaligned((a),(d))
/************************************************************************/
@@ -125,9 +125,9 @@ enum BREGS {
/* prefetch timing */
-#define FETCH() fetch(nec_state)
-#define FETCHWORD() fetchword(nec_state)
-#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
+#define FETCH() fetch(nec_state)
+#define FETCHWORD() fetchword(nec_state)
+#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
#define PUSH(val) { Wreg(SP) -= 2; write_mem_word(((Sreg(SS)<<4)+Wreg(SP)), val); }
diff --git a/src/emu/cpu/nec/v25.c b/src/emu/cpu/nec/v25.c
index 6a32dec72c2..39501514750 100644
--- a/src/emu/cpu/nec/v25.c
+++ b/src/emu/cpu/nec/v25.c
@@ -76,11 +76,11 @@ static void do_prefetch(v25_state_t *nec_state, int previous_ICount)
int diff = previous_ICount - (int) nec_state->icount;
/* The implementation is not accurate, but comes close.
- * It does not respect that the V30 will fetch two bytes
- * at once directly, but instead uses only 2 cycles instead
- * of 4. There are however only very few sources publicly
- * available and they are vague.
- */
+ * It does not respect that the V30 will fetch two bytes
+ * at once directly, but instead uses only 2 cycles instead
+ * of 4. There are however only very few sources publicly
+ * available and they are vague.
+ */
while (nec_state->prefetch_count<0)
{
nec_state->prefetch_count++;
@@ -215,32 +215,32 @@ static CPU_EXIT( v25 )
static void nec_interrupt(v25_state_t *nec_state, unsigned int_num, INTSOURCES source)
{
- UINT32 dest_seg, dest_off;
+ UINT32 dest_seg, dest_off;
- i_pushf(nec_state);
+ i_pushf(nec_state);
nec_state->TF = nec_state->IF = 0;
nec_state->MF = nec_state->mode_state;
switch(source)
{
- case BRKN: /* force native mode */
+ case BRKN: /* force native mode */
nec_state->MF = 1;
break;
- case BRKS: /* force secure mode */
+ case BRKS: /* force secure mode */
if (nec_state->config->v25v35_decryptiontable)
nec_state->MF = 0;
else
logerror("%06x: BRKS executed with no decryption table\n",PC(nec_state));
break;
- case INT_IRQ: /* get vector */
+ case INT_IRQ: /* get vector */
int_num = (*nec_state->irq_callback)(nec_state->device, 0);
break;
default:
break;
}
- dest_off = read_mem_word(int_num*4);
- dest_seg = read_mem_word(int_num*4+2);
+ dest_off = read_mem_word(int_num*4);
+ dest_seg = read_mem_word(int_num*4+2);
PUSH(Sreg(PS));
PUSH(nec_state->ip);
@@ -271,19 +271,19 @@ static void nec_trap(v25_state_t *nec_state)
}
#define INTERRUPT(source, vector, priority) \
- if(pending & (source)) { \
- nec_state->IRQS = vector; \
- nec_state->ISPR |= (1 << (priority)); \
- nec_state->pending_irq &= ~(source); \
- if(nec_state->bankswitch_irq & (source)) \
- nec_bankswitch(nec_state, priority); \
- else \
- nec_interrupt(nec_state, vector, source); \
- break; /* break out of loop */ \
+ if(pending & (source)) { \
+ nec_state->IRQS = vector; \
+ nec_state->ISPR |= (1 << (priority)); \
+ nec_state->pending_irq &= ~(source); \
+ if(nec_state->bankswitch_irq & (source)) \
+ nec_bankswitch(nec_state, priority); \
+ else \
+ nec_interrupt(nec_state, vector, source); \
+ break; /* break out of loop */ \
}
/* interrupt sources subject to priority control */
-#define SOURCES (INTTU0 | INTTU1 | INTTU2 | INTD0 | INTD1 | INTP0 | INTP1 | INTP2 \
+#define SOURCES (INTTU0 | INTTU1 | INTTU2 | INTD0 | INTD1 | INTP0 | INTP1 | INTP2 \
| INTSER0 | INTSR0 | INTST0 | INTSER1 | INTSR1 | INTST1 | INTTB)
static void external_int(v25_state_t *nec_state)
@@ -374,7 +374,7 @@ static void set_irq_line(v25_state_t *nec_state, int irqline, int state)
break;
case INPUT_LINE_NMI:
if (nec_state->nmi_state == state) return;
- nec_state->nmi_state = state;
+ nec_state->nmi_state = state;
if (state != CLEAR_LINE)
{
nec_state->pending_irq |= NMI_IRQ;
@@ -551,7 +551,7 @@ static CPU_EXECUTE( v25 )
prev_ICount = nec_state->icount;
nec_instruction[fetchop(nec_state)](nec_state);
do_prefetch(nec_state, prev_ICount);
- }
+ }
}
/* Wrappers for the different CPU types */
@@ -562,8 +562,8 @@ static CPU_INIT( v25 )
v25_init(device, irqcallback);
nec_state->fetch_xor = 0;
nec_state->chip_type=V20_TYPE;
- nec_state->prefetch_size = 4; /* 3 words */
- nec_state->prefetch_cycles = 4; /* four cycles per byte */
+ nec_state->prefetch_size = 4; /* 3 words */
+ nec_state->prefetch_cycles = 4; /* four cycles per byte */
}
static CPU_INIT( v35 )
@@ -573,8 +573,8 @@ static CPU_INIT( v35 )
v25_init(device, irqcallback);
nec_state->fetch_xor = BYTE_XOR_LE(0);
nec_state->chip_type=V30_TYPE;
- nec_state->prefetch_size = 6; /* 3 words */
- nec_state->prefetch_cycles = 2; /* two cycles per byte / four per word */
+ nec_state->prefetch_size = 6; /* 3 words */
+ nec_state->prefetch_cycles = 2; /* two cycles per byte / four per word */
}
@@ -591,12 +591,12 @@ static CPU_SET_INFO( v25 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(nec_state, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(nec_state, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP0: set_irq_line(nec_state, NEC_INPUT_LINE_INTP0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP1: set_irq_line(nec_state, NEC_INPUT_LINE_INTP1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP2: set_irq_line(nec_state, NEC_INPUT_LINE_INTP2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: set_irq_line(nec_state, NEC_INPUT_LINE_POLL, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(nec_state, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(nec_state, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP0: set_irq_line(nec_state, NEC_INPUT_LINE_INTP0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP1: set_irq_line(nec_state, NEC_INPUT_LINE_INTP1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP2: set_irq_line(nec_state, NEC_INPUT_LINE_INTP2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: set_irq_line(nec_state, NEC_INPUT_LINE_POLL, info->i); break;
case CPUINFO_INT_PC:
case CPUINFO_INT_REGISTER + NEC_PC:
@@ -610,7 +610,7 @@ static CPU_SET_INFO( v25 )
nec_state->ip = info->i & 0x0000f;
}
break;
- case CPUINFO_INT_REGISTER + NEC_IP: nec_state->ip = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_IP: nec_state->ip = info->i; break;
case CPUINFO_INT_SP:
if( info->i - (Sreg(SS)<<4) < 0x10000 )
{
@@ -622,19 +622,19 @@ static CPU_SET_INFO( v25 )
Wreg(SP) = info->i & 0x0000f;
}
break;
- case CPUINFO_INT_REGISTER + NEC_SP: Wreg(SP) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_FLAGS: ExpandFlags(info->i); break;
- case CPUINFO_INT_REGISTER + NEC_AW: Wreg(AW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_CW: Wreg(CW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_DW: Wreg(DW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_BW: Wreg(BW) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_BP: Wreg(BP) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_IX: Wreg(IX) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_IY: Wreg(IY) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_ES: Sreg(DS1) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_CS: Sreg(PS) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_SS: Sreg(SS) = info->i; break;
- case CPUINFO_INT_REGISTER + NEC_DS: Sreg(DS0) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_SP: Wreg(SP) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_FLAGS: ExpandFlags(info->i); break;
+ case CPUINFO_INT_REGISTER + NEC_AW: Wreg(AW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_CW: Wreg(CW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_DW: Wreg(DW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_BW: Wreg(BW) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_BP: Wreg(BP) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_IX: Wreg(IX) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_IY: Wreg(IY) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_ES: Sreg(DS1) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_CS: Sreg(PS) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_SS: Sreg(SS) = info->i; break;
+ case CPUINFO_INT_REGISTER + NEC_DS: Sreg(DS0) = info->i; break;
}
}
@@ -652,106 +652,106 @@ static CPU_GET_INFO( v25v35 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(v25_state_t); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 80; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 17; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = nec_state->nmi_state; break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP0: info->i = nec_state->intp_state[0]; break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP1: info->i = nec_state->intp_state[1]; break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP2: info->i = nec_state->intp_state[2]; break;
- case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: info->i = nec_state->poll_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(v25_state_t); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 80; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 17; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = nec_state->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP0: info->i = nec_state->intp_state[0]; break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP1: info->i = nec_state->intp_state[1]; break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_INTP2: info->i = nec_state->intp_state[2]; break;
+ case CPUINFO_INT_INPUT_STATE + NEC_INPUT_LINE_POLL: info->i = nec_state->poll_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not supported */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + NEC_PC: info->i = ((Sreg(PS)<<4) + nec_state->ip); break;
- case CPUINFO_INT_REGISTER + NEC_IP: info->i = nec_state->ip; break;
- case CPUINFO_INT_SP: info->i = (Sreg(SS)<<4) + Wreg(SP); break;
- case CPUINFO_INT_REGISTER + NEC_SP: info->i = Wreg(SP); break;
- case CPUINFO_INT_REGISTER + NEC_FLAGS: info->i = CompressFlags(); break;
- case CPUINFO_INT_REGISTER + NEC_AW: info->i = Wreg(AW); break;
- case CPUINFO_INT_REGISTER + NEC_CW: info->i = Wreg(CW); break;
- case CPUINFO_INT_REGISTER + NEC_DW: info->i = Wreg(DW); break;
- case CPUINFO_INT_REGISTER + NEC_BW: info->i = Wreg(BW); break;
- case CPUINFO_INT_REGISTER + NEC_BP: info->i = Wreg(BP); break;
- case CPUINFO_INT_REGISTER + NEC_IX: info->i = Wreg(IX); break;
- case CPUINFO_INT_REGISTER + NEC_IY: info->i = Wreg(IY); break;
- case CPUINFO_INT_REGISTER + NEC_ES: info->i = Sreg(DS1); break;
- case CPUINFO_INT_REGISTER + NEC_CS: info->i = Sreg(PS); break;
- case CPUINFO_INT_REGISTER + NEC_SS: info->i = Sreg(SS); break;
- case CPUINFO_INT_REGISTER + NEC_DS: info->i = Sreg(DS0); break;
- case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = nec_state->pending_irq; break;
+ case CPUINFO_INT_REGISTER + NEC_PC: info->i = ((Sreg(PS)<<4) + nec_state->ip); break;
+ case CPUINFO_INT_REGISTER + NEC_IP: info->i = nec_state->ip; break;
+ case CPUINFO_INT_SP: info->i = (Sreg(SS)<<4) + Wreg(SP); break;
+ case CPUINFO_INT_REGISTER + NEC_SP: info->i = Wreg(SP); break;
+ case CPUINFO_INT_REGISTER + NEC_FLAGS: info->i = CompressFlags(); break;
+ case CPUINFO_INT_REGISTER + NEC_AW: info->i = Wreg(AW); break;
+ case CPUINFO_INT_REGISTER + NEC_CW: info->i = Wreg(CW); break;
+ case CPUINFO_INT_REGISTER + NEC_DW: info->i = Wreg(DW); break;
+ case CPUINFO_INT_REGISTER + NEC_BW: info->i = Wreg(BW); break;
+ case CPUINFO_INT_REGISTER + NEC_BP: info->i = Wreg(BP); break;
+ case CPUINFO_INT_REGISTER + NEC_IX: info->i = Wreg(IX); break;
+ case CPUINFO_INT_REGISTER + NEC_IY: info->i = Wreg(IY); break;
+ case CPUINFO_INT_REGISTER + NEC_ES: info->i = Sreg(DS1); break;
+ case CPUINFO_INT_REGISTER + NEC_CS: info->i = Sreg(PS); break;
+ case CPUINFO_INT_REGISTER + NEC_SS: info->i = Sreg(SS); break;
+ case CPUINFO_INT_REGISTER + NEC_DS: info->i = Sreg(DS0); break;
+ case CPUINFO_INT_REGISTER + NEC_PENDING: info->i = nec_state->pending_irq; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v25); break;
- case CPUINFO_FCT_INIT: /* set per-CPU */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(v25); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(v25); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(v25); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v25); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_state->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v25); break;
+ case CPUINFO_FCT_INIT: /* set per-CPU */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(v25); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(v25); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(v25); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v25); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &nec_state->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "NEC"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V-Series"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Bryan McPhail (V25/V35 support added by Alex W. Jackson)"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "NEC"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V-Series"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Bryan McPhail (V25/V35 support added by Alex W. Jackson)"); break;
case CPUINFO_STR_FLAGS:
- flags = CompressFlags();
- sprintf(info->s, "%c %d %c%c%c%c%c%c%c%c%c%c%c%c",
- flags & 0x8000 ? 'N':'S',
- (flags & 0x7000) >> 12,
- flags & 0x0800 ? 'O':'.',
- flags & 0x0400 ? 'D':'.',
- flags & 0x0200 ? 'I':'.',
- flags & 0x0100 ? 'T':'.',
- flags & 0x0080 ? 'S':'.',
- flags & 0x0040 ? 'Z':'.',
- flags & 0x0020 ? '1':'.',
- flags & 0x0010 ? 'A':'.',
- flags & 0x0008 ? '0':'.',
- flags & 0x0004 ? 'P':'.',
- flags & 0x0002 ? '.':'I',
- flags & 0x0001 ? 'C':'.');
- break;
-
- case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%05X", (Sreg(PS)<<4) + nec_state->ip); break;
- case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s, "IP:%04X", nec_state->ip); break;
- case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", Wreg(SP)); break;
- case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s, "F:%04X", CompressFlags()); break;
- case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", Wreg(AW)); break;
- case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", Wreg(CW)); break;
- case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", Wreg(DW)); break;
- case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", Wreg(BW)); break;
- case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", Wreg(BP)); break;
- case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", Wreg(IX)); break;
- case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", Wreg(IY)); break;
- case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "DS1:%04X", Sreg(DS1)); break;
- case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "PS:%04X", Sreg(PS)); break;
- case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", Sreg(SS)); break;
- case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS0:%04X", Sreg(DS0)); break;
+ flags = CompressFlags();
+ sprintf(info->s, "%c %d %c%c%c%c%c%c%c%c%c%c%c%c",
+ flags & 0x8000 ? 'N':'S',
+ (flags & 0x7000) >> 12,
+ flags & 0x0800 ? 'O':'.',
+ flags & 0x0400 ? 'D':'.',
+ flags & 0x0200 ? 'I':'.',
+ flags & 0x0100 ? 'T':'.',
+ flags & 0x0080 ? 'S':'.',
+ flags & 0x0040 ? 'Z':'.',
+ flags & 0x0020 ? '1':'.',
+ flags & 0x0010 ? 'A':'.',
+ flags & 0x0008 ? '0':'.',
+ flags & 0x0004 ? 'P':'.',
+ flags & 0x0002 ? '.':'I',
+ flags & 0x0001 ? 'C':'.');
+ break;
+
+ case CPUINFO_STR_REGISTER + NEC_PC: sprintf(info->s, "PC:%05X", (Sreg(PS)<<4) + nec_state->ip); break;
+ case CPUINFO_STR_REGISTER + NEC_IP: sprintf(info->s, "IP:%04X", nec_state->ip); break;
+ case CPUINFO_STR_REGISTER + NEC_SP: sprintf(info->s, "SP:%04X", Wreg(SP)); break;
+ case CPUINFO_STR_REGISTER + NEC_FLAGS: sprintf(info->s, "F:%04X", CompressFlags()); break;
+ case CPUINFO_STR_REGISTER + NEC_AW: sprintf(info->s, "AW:%04X", Wreg(AW)); break;
+ case CPUINFO_STR_REGISTER + NEC_CW: sprintf(info->s, "CW:%04X", Wreg(CW)); break;
+ case CPUINFO_STR_REGISTER + NEC_DW: sprintf(info->s, "DW:%04X", Wreg(DW)); break;
+ case CPUINFO_STR_REGISTER + NEC_BW: sprintf(info->s, "BW:%04X", Wreg(BW)); break;
+ case CPUINFO_STR_REGISTER + NEC_BP: sprintf(info->s, "BP:%04X", Wreg(BP)); break;
+ case CPUINFO_STR_REGISTER + NEC_IX: sprintf(info->s, "IX:%04X", Wreg(IX)); break;
+ case CPUINFO_STR_REGISTER + NEC_IY: sprintf(info->s, "IY:%04X", Wreg(IY)); break;
+ case CPUINFO_STR_REGISTER + NEC_ES: sprintf(info->s, "DS1:%04X", Sreg(DS1)); break;
+ case CPUINFO_STR_REGISTER + NEC_CS: sprintf(info->s, "PS:%04X", Sreg(PS)); break;
+ case CPUINFO_STR_REGISTER + NEC_SS: sprintf(info->s, "SS:%04X", Sreg(SS)); break;
+ case CPUINFO_STR_REGISTER + NEC_DS: sprintf(info->s, "DS0:%04X", Sreg(DS0)); break;
}
}
@@ -765,16 +765,16 @@ CPU_GET_INFO( v25 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v25); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v25); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V25"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V25"); break;
- default: CPU_GET_INFO_CALL(v25v35); break;
+ default: CPU_GET_INFO_CALL(v25v35); break;
}
}
@@ -788,16 +788,16 @@ CPU_GET_INFO( v35 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v35); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v35); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V35"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V35"); break;
- default: CPU_GET_INFO_CALL(v25v35); break;
+ default: CPU_GET_INFO_CALL(v25v35); break;
}
}
diff --git a/src/emu/cpu/nec/v25instr.c b/src/emu/cpu/nec/v25instr.c
index 72cc1c9f7e3..6e6c3c684c7 100644
--- a/src/emu/cpu/nec/v25instr.c
+++ b/src/emu/cpu/nec/v25instr.c
@@ -1,71 +1,71 @@
-#define GetRB \
- ModRM = FETCH(); \
- if (ModRM >= 0xc0) \
- tmp = Wreg(Mod_RM.RM.w[ModRM]) & 0x7; \
- else { \
- logerror("%06x: Invalid MODRM for register banking instruction\n",PC(nec_state)); \
- tmp = 0; \
+#define GetRB \
+ ModRM = FETCH(); \
+ if (ModRM >= 0xc0) \
+ tmp = Wreg(Mod_RM.RM.w[ModRM]) & 0x7; \
+ else { \
+ logerror("%06x: Invalid MODRM for register banking instruction\n",PC(nec_state)); \
+ tmp = 0; \
}
-#define RETRBI \
- tmp = (Wreg(PSW_SAVE) & 0x7000) >> 12; \
- nec_state->ip = Wreg(PC_SAVE); \
- ExpandFlags(Wreg(PSW_SAVE)); \
- SetRB(tmp); \
+#define RETRBI \
+ tmp = (Wreg(PSW_SAVE) & 0x7000) >> 12; \
+ nec_state->ip = Wreg(PC_SAVE); \
+ ExpandFlags(Wreg(PSW_SAVE)); \
+ SetRB(tmp); \
CHANGE_PC
-#define TSKSW \
- Wreg(PSW_SAVE) = CompressFlags(); \
- Wreg(PC_SAVE) = nec_state->ip; \
- SetRB(tmp); \
- nec_state->ip = Wreg(PC_SAVE); \
- ExpandFlags(Wreg(PSW_SAVE)); \
+#define TSKSW \
+ Wreg(PSW_SAVE) = CompressFlags(); \
+ Wreg(PC_SAVE) = nec_state->ip; \
+ SetRB(tmp); \
+ nec_state->ip = Wreg(PC_SAVE); \
+ ExpandFlags(Wreg(PSW_SAVE)); \
CHANGE_PC
-#define MOVSPA \
- tmp = (Wreg(PSW_SAVE) & 0x7000) >> 8; \
- Sreg(SS) = nec_state->ram.w[tmp+SS]; \
+#define MOVSPA \
+ tmp = (Wreg(PSW_SAVE) & 0x7000) >> 8; \
+ Sreg(SS) = nec_state->ram.w[tmp+SS]; \
Wreg(SP) = nec_state->ram.w[tmp+SP]
-#define MOVSPB \
- tmp <<= 4; \
- nec_state->ram.w[tmp+SS] = Sreg(SS); \
+#define MOVSPB \
+ tmp <<= 4; \
+ nec_state->ram.w[tmp+SS] = Sreg(SS); \
nec_state->ram.w[tmp+SP] = Wreg(SP)
-#define FINT \
- for(tmp = 1; tmp < 0x100; tmp <<= 1) { \
- if(nec_state->ISPR & tmp) { \
- nec_state->ISPR &= ~tmp; \
- break; \
- } \
+#define FINT \
+ for(tmp = 1; tmp < 0x100; tmp <<= 1) { \
+ if(nec_state->ISPR & tmp) { \
+ nec_state->ISPR &= ~tmp; \
+ break; \
+ } \
}
OP( 0x0f, i_pre_v25 ) { UINT32 ModRM, tmp, tmp2;
switch (FETCH()) {
- case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x12 : BITOP_BYTE; CLKS(5,5,4); tmp2 = Breg(CL) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
- case 0x13 : BITOP_WORD; CLKS(5,5,4); tmp2 = Breg(CL) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
- case 0x14 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
- case 0x15 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
- case 0x16 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
- case 0x17 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
+ case 0x10 : BITOP_BYTE; CLKS(3,3,4); tmp2 = Breg(CL) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x11 : BITOP_WORD; CLKS(3,3,4); tmp2 = Breg(CL) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x12 : BITOP_BYTE; CLKS(5,5,4); tmp2 = Breg(CL) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
+ case 0x13 : BITOP_WORD; CLKS(5,5,4); tmp2 = Breg(CL) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
+ case 0x14 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
+ case 0x15 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
+ case 0x16 : BITOP_BYTE; CLKS(4,4,4); tmp2 = Breg(CL) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
+ case 0x17 : BITOP_WORD; CLKS(4,4,4); tmp2 = Breg(CL) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
- case 0x18 : BITOP_BYTE; CLKS(4,4,4); tmp2 = (FETCH()) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x19 : BITOP_WORD; CLKS(4,4,4); tmp2 = (FETCH()) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
- case 0x1a : BITOP_BYTE; CLKS(6,6,4); tmp2 = (FETCH()) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
- case 0x1b : BITOP_WORD; CLKS(6,6,4); tmp2 = (FETCH()) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
- case 0x1c : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
- case 0x1d : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
- case 0x1e : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
- case 0x1f : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
+ case 0x18 : BITOP_BYTE; CLKS(4,4,4); tmp2 = (FETCH()) & 0x7; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x19 : BITOP_WORD; CLKS(4,4,4); tmp2 = (FETCH()) & 0xf; nec_state->ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0; nec_state->CarryVal=nec_state->OverVal=0; break; /* Test */
+ case 0x1a : BITOP_BYTE; CLKS(6,6,4); tmp2 = (FETCH()) & 0x7; tmp &= ~(1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Clr */
+ case 0x1b : BITOP_WORD; CLKS(6,6,4); tmp2 = (FETCH()) & 0xf; tmp &= ~(1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Clr */
+ case 0x1c : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; tmp |= (1<<tmp2); PutbackRMByte(ModRM,tmp); break; /* Set */
+ case 0x1d : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; tmp |= (1<<tmp2); PutbackRMWord(ModRM,tmp); break; /* Set */
+ case 0x1e : BITOP_BYTE; CLKS(5,5,4); tmp2 = (FETCH()) & 0x7; BIT_NOT; PutbackRMByte(ModRM,tmp); break; /* Not */
+ case 0x1f : BITOP_WORD; CLKS(5,5,4); tmp2 = (FETCH()) & 0xf; BIT_NOT; PutbackRMWord(ModRM,tmp); break; /* Not */
case 0x20 : ADD4S; CLKS(7,7,2); break;
case 0x22 : SUB4S; CLKS(7,7,2); break;
case 0x25 : MOVSPA; CLK(16); break;
case 0x26 : CMP4S; CLKS(7,7,2); break;
case 0x28 : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp <<= 4; tmp |= Breg(AL) & 0xf; Breg(AL) = (Breg(AL) & 0xf0) | ((tmp>>8)&0xf); tmp &= 0xff; PutbackRMByte(ModRM,tmp); CLKM(13,13,9,28,28,15); break;
- case 0x2a : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp2 = (Breg(AL) & 0xf)<<4; Breg(AL) = (Breg(AL) & 0xf0) | (tmp&0xf); tmp = tmp2 | (tmp>>4); PutbackRMByte(ModRM,tmp); CLKM(17,17,13,32,32,19); break;
+ case 0x2a : ModRM = FETCH(); tmp = GetRMByte(ModRM); tmp2 = (Breg(AL) & 0xf)<<4; Breg(AL) = (Breg(AL) & 0xf0) | (tmp&0xf); tmp = tmp2 | (tmp>>4); PutbackRMByte(ModRM,tmp); CLKM(17,17,13,32,32,19); break;
case 0x2d : GetRB; nec_bankswitch(nec_state, tmp); CLK(15); break;
case 0x31 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield INS\n",PC(nec_state)); break;
case 0x33 : ModRM = FETCH(); ModRM=0; logerror("%06x: Unimplemented bitfield EXT\n",PC(nec_state)); break;
diff --git a/src/emu/cpu/nec/v25instr.h b/src/emu/cpu/nec/v25instr.h
index 77a8503bc2f..cd60033cc5e 100644
--- a/src/emu/cpu/nec/v25instr.h
+++ b/src/emu/cpu/nec/v25instr.h
@@ -251,260 +251,260 @@ static void i_wait(nec_state_t *nec_state);
static void (*const nec_instruction[256])(nec_state_t *nec_state) =
{
- i_add_br8, /* 0x00 */
- i_add_wr16, /* 0x01 */
- i_add_r8b, /* 0x02 */
- i_add_r16w, /* 0x03 */
- i_add_ald8, /* 0x04 */
- i_add_axd16, /* 0x05 */
- i_push_es, /* 0x06 */
- i_pop_es, /* 0x07 */
- i_or_br8, /* 0x08 */
- i_or_wr16, /* 0x09 */
- i_or_r8b, /* 0x0a */
- i_or_r16w, /* 0x0b */
- i_or_ald8, /* 0x0c */
- i_or_axd16, /* 0x0d */
- i_push_cs, /* 0x0e */
- i_pre_v25, /* 0x0f */
- i_adc_br8, /* 0x10 */
- i_adc_wr16, /* 0x11 */
- i_adc_r8b, /* 0x12 */
- i_adc_r16w, /* 0x13 */
- i_adc_ald8, /* 0x14 */
- i_adc_axd16, /* 0x15 */
- i_push_ss, /* 0x16 */
- i_pop_ss, /* 0x17 */
- i_sbb_br8, /* 0x18 */
- i_sbb_wr16, /* 0x19 */
- i_sbb_r8b, /* 0x1a */
- i_sbb_r16w, /* 0x1b */
- i_sbb_ald8, /* 0x1c */
- i_sbb_axd16, /* 0x1d */
- i_push_ds, /* 0x1e */
- i_pop_ds, /* 0x1f */
- i_and_br8, /* 0x20 */
- i_and_wr16, /* 0x21 */
- i_and_r8b, /* 0x22 */
- i_and_r16w, /* 0x23 */
- i_and_ald8, /* 0x24 */
- i_and_axd16, /* 0x25 */
- i_es, /* 0x26 */
- i_daa, /* 0x27 */
- i_sub_br8, /* 0x28 */
- i_sub_wr16, /* 0x29 */
- i_sub_r8b, /* 0x2a */
- i_sub_r16w, /* 0x2b */
- i_sub_ald8, /* 0x2c */
- i_sub_axd16, /* 0x2d */
- i_cs, /* 0x2e */
- i_das, /* 0x2f */
- i_xor_br8, /* 0x30 */
- i_xor_wr16, /* 0x31 */
- i_xor_r8b, /* 0x32 */
- i_xor_r16w, /* 0x33 */
- i_xor_ald8, /* 0x34 */
- i_xor_axd16, /* 0x35 */
- i_ss, /* 0x36 */
- i_aaa, /* 0x37 */
- i_cmp_br8, /* 0x38 */
- i_cmp_wr16, /* 0x39 */
- i_cmp_r8b, /* 0x3a */
- i_cmp_r16w, /* 0x3b */
- i_cmp_ald8, /* 0x3c */
- i_cmp_axd16, /* 0x3d */
- i_ds, /* 0x3e */
- i_aas, /* 0x3f */
- i_inc_ax, /* 0x40 */
- i_inc_cx, /* 0x41 */
- i_inc_dx, /* 0x42 */
- i_inc_bx, /* 0x43 */
- i_inc_sp, /* 0x44 */
- i_inc_bp, /* 0x45 */
- i_inc_si, /* 0x46 */
- i_inc_di, /* 0x47 */
- i_dec_ax, /* 0x48 */
- i_dec_cx, /* 0x49 */
- i_dec_dx, /* 0x4a */
- i_dec_bx, /* 0x4b */
- i_dec_sp, /* 0x4c */
- i_dec_bp, /* 0x4d */
- i_dec_si, /* 0x4e */
- i_dec_di, /* 0x4f */
- i_push_ax, /* 0x50 */
- i_push_cx, /* 0x51 */
- i_push_dx, /* 0x52 */
- i_push_bx, /* 0x53 */
- i_push_sp, /* 0x54 */
- i_push_bp, /* 0x55 */
- i_push_si, /* 0x56 */
- i_push_di, /* 0x57 */
- i_pop_ax, /* 0x58 */
- i_pop_cx, /* 0x59 */
- i_pop_dx, /* 0x5a */
- i_pop_bx, /* 0x5b */
- i_pop_sp, /* 0x5c */
- i_pop_bp, /* 0x5d */
- i_pop_si, /* 0x5e */
- i_pop_di, /* 0x5f */
- i_pusha, /* 0x60 */
- i_popa, /* 0x61 */
- i_chkind, /* 0x62 */
- i_brkn, /* 0x63 - V25S/V35S only */
- i_repnc, /* 0x64 */
- i_repc, /* 0x65 */
- i_invalid, /* 0x66 */
- i_invalid, /* 0x67 */
- i_push_d16, /* 0x68 */
- i_imul_d16, /* 0x69 */
- i_push_d8, /* 0x6a */
- i_imul_d8, /* 0x6b */
- i_insb, /* 0x6c */
- i_insw, /* 0x6d */
- i_outsb, /* 0x6e */
- i_outsw, /* 0x6f */
- i_jo, /* 0x70 */
- i_jno, /* 0x71 */
- i_jc, /* 0x72 */
- i_jnc, /* 0x73 */
- i_jz, /* 0x74 */
- i_jnz, /* 0x75 */
- i_jce, /* 0x76 */
- i_jnce, /* 0x77 */
- i_js, /* 0x78 */
- i_jns, /* 0x79 */
- i_jp, /* 0x7a */
- i_jnp, /* 0x7b */
- i_jl, /* 0x7c */
- i_jnl, /* 0x7d */
- i_jle, /* 0x7e */
- i_jnle, /* 0x7f */
- i_80pre, /* 0x80 */
- i_81pre, /* 0x81 */
- i_82pre, /* 0x82 */
- i_83pre, /* 0x83 */
- i_test_br8, /* 0x84 */
- i_test_wr16, /* 0x85 */
- i_xchg_br8, /* 0x86 */
- i_xchg_wr16, /* 0x87 */
- i_mov_br8, /* 0x88 */
- i_mov_wr16, /* 0x89 */
- i_mov_r8b, /* 0x8a */
- i_mov_r16w, /* 0x8b */
- i_mov_wsreg, /* 0x8c */
- i_lea, /* 0x8d */
- i_mov_sregw, /* 0x8e */
- i_popw, /* 0x8f */
- i_nop, /* 0x90 */
- i_xchg_axcx, /* 0x91 */
- i_xchg_axdx, /* 0x92 */
- i_xchg_axbx, /* 0x93 */
- i_xchg_axsp, /* 0x94 */
- i_xchg_axbp, /* 0x95 */
- i_xchg_axsi, /* 0x96 */
- i_xchg_axdi, /* 0x97 */
- i_cbw, /* 0x98 */
- i_cwd, /* 0x99 */
- i_call_far, /* 0x9a */
- i_wait, /* 0x9b */
- i_pushf, /* 0x9c */
- i_popf, /* 0x9d */
- i_sahf, /* 0x9e */
- i_lahf, /* 0x9f */
- i_mov_aldisp, /* 0xa0 */
- i_mov_axdisp, /* 0xa1 */
- i_mov_dispal, /* 0xa2 */
- i_mov_dispax, /* 0xa3 */
- i_movsb, /* 0xa4 */
- i_movsw, /* 0xa5 */
- i_cmpsb, /* 0xa6 */
- i_cmpsw, /* 0xa7 */
- i_test_ald8, /* 0xa8 */
- i_test_axd16, /* 0xa9 */
- i_stosb, /* 0xaa */
- i_stosw, /* 0xab */
- i_lodsb, /* 0xac */
- i_lodsw, /* 0xad */
- i_scasb, /* 0xae */
- i_scasw, /* 0xaf */
- i_mov_ald8, /* 0xb0 */
- i_mov_cld8, /* 0xb1 */
- i_mov_dld8, /* 0xb2 */
- i_mov_bld8, /* 0xb3 */
- i_mov_ahd8, /* 0xb4 */
- i_mov_chd8, /* 0xb5 */
- i_mov_dhd8, /* 0xb6 */
- i_mov_bhd8, /* 0xb7 */
- i_mov_axd16, /* 0xb8 */
- i_mov_cxd16, /* 0xb9 */
- i_mov_dxd16, /* 0xba */
- i_mov_bxd16, /* 0xbb */
- i_mov_spd16, /* 0xbc */
- i_mov_bpd16, /* 0xbd */
- i_mov_sid16, /* 0xbe */
- i_mov_did16, /* 0xbf */
- i_rotshft_bd8, /* 0xc0 */
- i_rotshft_wd8, /* 0xc1 */
- i_ret_d16, /* 0xc2 */
- i_ret, /* 0xc3 */
- i_les_dw, /* 0xc4 */
- i_lds_dw, /* 0xc5 */
- i_mov_bd8, /* 0xc6 */
- i_mov_wd16, /* 0xc7 */
- i_enter, /* 0xc8 */
- i_leave, /* 0xc9 */
- i_retf_d16, /* 0xca */
- i_retf, /* 0xcb */
- i_int3, /* 0xcc */
- i_int, /* 0xcd */
- i_into, /* 0xce */
- i_iret, /* 0xcf */
- i_rotshft_b, /* 0xd0 */
- i_rotshft_w, /* 0xd1 */
- i_rotshft_bcl, /* 0xd2 */
- i_rotshft_wcl, /* 0xd3 */
- i_aam, /* 0xd4 */
- i_aad, /* 0xd5 */
- i_setalc, /* 0xd6 */
- i_trans, /* 0xd7 */
- i_fpo, /* 0xd8 */
- i_fpo, /* 0xd9 */
- i_fpo, /* 0xda */
- i_fpo, /* 0xdb */
- i_fpo, /* 0xdc */
- i_fpo, /* 0xdd */
- i_fpo, /* 0xde */
- i_fpo, /* 0xdf */
- i_loopne, /* 0xe0 */
- i_loope, /* 0xe1 */
- i_loop, /* 0xe2 */
- i_jcxz, /* 0xe3 */
- i_inal, /* 0xe4 */
- i_inax, /* 0xe5 */
- i_outal, /* 0xe6 */
- i_outax, /* 0xe7 */
- i_call_d16, /* 0xe8 */
- i_jmp_d16, /* 0xe9 */
- i_jmp_far, /* 0xea */
- i_jmp_d8, /* 0xeb */
- i_inaldx, /* 0xec */
- i_inaxdx, /* 0xed */
- i_outdxal, /* 0xee */
- i_outdxax, /* 0xef */
- i_lock, /* 0xf0 */
- i_brks, /* 0xf1 */
- i_repne, /* 0xf2 */
- i_repe, /* 0xf3 */
- i_hlt, /* 0xf4 */
- i_cmc, /* 0xf5 */
- i_f6pre, /* 0xf6 */
- i_f7pre, /* 0xf7 */
- i_clc, /* 0xf8 */
- i_stc, /* 0xf9 */
- i_di, /* 0xfa */
- i_ei, /* 0xfb */
- i_cld, /* 0xfc */
- i_std, /* 0xfd */
- i_fepre, /* 0xfe */
- i_ffpre /* 0xff */
+ i_add_br8, /* 0x00 */
+ i_add_wr16, /* 0x01 */
+ i_add_r8b, /* 0x02 */
+ i_add_r16w, /* 0x03 */
+ i_add_ald8, /* 0x04 */
+ i_add_axd16, /* 0x05 */
+ i_push_es, /* 0x06 */
+ i_pop_es, /* 0x07 */
+ i_or_br8, /* 0x08 */
+ i_or_wr16, /* 0x09 */
+ i_or_r8b, /* 0x0a */
+ i_or_r16w, /* 0x0b */
+ i_or_ald8, /* 0x0c */
+ i_or_axd16, /* 0x0d */
+ i_push_cs, /* 0x0e */
+ i_pre_v25, /* 0x0f */
+ i_adc_br8, /* 0x10 */
+ i_adc_wr16, /* 0x11 */
+ i_adc_r8b, /* 0x12 */
+ i_adc_r16w, /* 0x13 */
+ i_adc_ald8, /* 0x14 */
+ i_adc_axd16, /* 0x15 */
+ i_push_ss, /* 0x16 */
+ i_pop_ss, /* 0x17 */
+ i_sbb_br8, /* 0x18 */
+ i_sbb_wr16, /* 0x19 */
+ i_sbb_r8b, /* 0x1a */
+ i_sbb_r16w, /* 0x1b */
+ i_sbb_ald8, /* 0x1c */
+ i_sbb_axd16, /* 0x1d */
+ i_push_ds, /* 0x1e */
+ i_pop_ds, /* 0x1f */
+ i_and_br8, /* 0x20 */
+ i_and_wr16, /* 0x21 */
+ i_and_r8b, /* 0x22 */
+ i_and_r16w, /* 0x23 */
+ i_and_ald8, /* 0x24 */
+ i_and_axd16, /* 0x25 */
+ i_es, /* 0x26 */
+ i_daa, /* 0x27 */
+ i_sub_br8, /* 0x28 */
+ i_sub_wr16, /* 0x29 */
+ i_sub_r8b, /* 0x2a */
+ i_sub_r16w, /* 0x2b */
+ i_sub_ald8, /* 0x2c */
+ i_sub_axd16, /* 0x2d */
+ i_cs, /* 0x2e */
+ i_das, /* 0x2f */
+ i_xor_br8, /* 0x30 */
+ i_xor_wr16, /* 0x31 */
+ i_xor_r8b, /* 0x32 */
+ i_xor_r16w, /* 0x33 */
+ i_xor_ald8, /* 0x34 */
+ i_xor_axd16, /* 0x35 */
+ i_ss, /* 0x36 */
+ i_aaa, /* 0x37 */
+ i_cmp_br8, /* 0x38 */
+ i_cmp_wr16, /* 0x39 */
+ i_cmp_r8b, /* 0x3a */
+ i_cmp_r16w, /* 0x3b */
+ i_cmp_ald8, /* 0x3c */
+ i_cmp_axd16, /* 0x3d */
+ i_ds, /* 0x3e */
+ i_aas, /* 0x3f */
+ i_inc_ax, /* 0x40 */
+ i_inc_cx, /* 0x41 */
+ i_inc_dx, /* 0x42 */
+ i_inc_bx, /* 0x43 */
+ i_inc_sp, /* 0x44 */
+ i_inc_bp, /* 0x45 */
+ i_inc_si, /* 0x46 */
+ i_inc_di, /* 0x47 */
+ i_dec_ax, /* 0x48 */
+ i_dec_cx, /* 0x49 */
+ i_dec_dx, /* 0x4a */
+ i_dec_bx, /* 0x4b */
+ i_dec_sp, /* 0x4c */
+ i_dec_bp, /* 0x4d */
+ i_dec_si, /* 0x4e */
+ i_dec_di, /* 0x4f */
+ i_push_ax, /* 0x50 */
+ i_push_cx, /* 0x51 */
+ i_push_dx, /* 0x52 */
+ i_push_bx, /* 0x53 */
+ i_push_sp, /* 0x54 */
+ i_push_bp, /* 0x55 */
+ i_push_si, /* 0x56 */
+ i_push_di, /* 0x57 */
+ i_pop_ax, /* 0x58 */
+ i_pop_cx, /* 0x59 */
+ i_pop_dx, /* 0x5a */
+ i_pop_bx, /* 0x5b */
+ i_pop_sp, /* 0x5c */
+ i_pop_bp, /* 0x5d */
+ i_pop_si, /* 0x5e */
+ i_pop_di, /* 0x5f */
+ i_pusha, /* 0x60 */
+ i_popa, /* 0x61 */
+ i_chkind, /* 0x62 */
+ i_brkn, /* 0x63 - V25S/V35S only */
+ i_repnc, /* 0x64 */
+ i_repc, /* 0x65 */
+ i_invalid, /* 0x66 */
+ i_invalid, /* 0x67 */
+ i_push_d16, /* 0x68 */
+ i_imul_d16, /* 0x69 */
+ i_push_d8, /* 0x6a */
+ i_imul_d8, /* 0x6b */
+ i_insb, /* 0x6c */
+ i_insw, /* 0x6d */
+ i_outsb, /* 0x6e */
+ i_outsw, /* 0x6f */
+ i_jo, /* 0x70 */
+ i_jno, /* 0x71 */
+ i_jc, /* 0x72 */
+ i_jnc, /* 0x73 */
+ i_jz, /* 0x74 */
+ i_jnz, /* 0x75 */
+ i_jce, /* 0x76 */
+ i_jnce, /* 0x77 */
+ i_js, /* 0x78 */
+ i_jns, /* 0x79 */
+ i_jp, /* 0x7a */
+ i_jnp, /* 0x7b */
+ i_jl, /* 0x7c */
+ i_jnl, /* 0x7d */
+ i_jle, /* 0x7e */
+ i_jnle, /* 0x7f */
+ i_80pre, /* 0x80 */
+ i_81pre, /* 0x81 */
+ i_82pre, /* 0x82 */
+ i_83pre, /* 0x83 */
+ i_test_br8, /* 0x84 */
+ i_test_wr16, /* 0x85 */
+ i_xchg_br8, /* 0x86 */
+ i_xchg_wr16, /* 0x87 */
+ i_mov_br8, /* 0x88 */
+ i_mov_wr16, /* 0x89 */
+ i_mov_r8b, /* 0x8a */
+ i_mov_r16w, /* 0x8b */
+ i_mov_wsreg, /* 0x8c */
+ i_lea, /* 0x8d */
+ i_mov_sregw, /* 0x8e */
+ i_popw, /* 0x8f */
+ i_nop, /* 0x90 */
+ i_xchg_axcx, /* 0x91 */
+ i_xchg_axdx, /* 0x92 */
+ i_xchg_axbx, /* 0x93 */
+ i_xchg_axsp, /* 0x94 */
+ i_xchg_axbp, /* 0x95 */
+ i_xchg_axsi, /* 0x96 */
+ i_xchg_axdi, /* 0x97 */
+ i_cbw, /* 0x98 */
+ i_cwd, /* 0x99 */
+ i_call_far, /* 0x9a */
+ i_wait, /* 0x9b */
+ i_pushf, /* 0x9c */
+ i_popf, /* 0x9d */
+ i_sahf, /* 0x9e */
+ i_lahf, /* 0x9f */
+ i_mov_aldisp, /* 0xa0 */
+ i_mov_axdisp, /* 0xa1 */
+ i_mov_dispal, /* 0xa2 */
+ i_mov_dispax, /* 0xa3 */
+ i_movsb, /* 0xa4 */
+ i_movsw, /* 0xa5 */
+ i_cmpsb, /* 0xa6 */
+ i_cmpsw, /* 0xa7 */
+ i_test_ald8, /* 0xa8 */
+ i_test_axd16, /* 0xa9 */
+ i_stosb, /* 0xaa */
+ i_stosw, /* 0xab */
+ i_lodsb, /* 0xac */
+ i_lodsw, /* 0xad */
+ i_scasb, /* 0xae */
+ i_scasw, /* 0xaf */
+ i_mov_ald8, /* 0xb0 */
+ i_mov_cld8, /* 0xb1 */
+ i_mov_dld8, /* 0xb2 */
+ i_mov_bld8, /* 0xb3 */
+ i_mov_ahd8, /* 0xb4 */
+ i_mov_chd8, /* 0xb5 */
+ i_mov_dhd8, /* 0xb6 */
+ i_mov_bhd8, /* 0xb7 */
+ i_mov_axd16, /* 0xb8 */
+ i_mov_cxd16, /* 0xb9 */
+ i_mov_dxd16, /* 0xba */
+ i_mov_bxd16, /* 0xbb */
+ i_mov_spd16, /* 0xbc */
+ i_mov_bpd16, /* 0xbd */
+ i_mov_sid16, /* 0xbe */
+ i_mov_did16, /* 0xbf */
+ i_rotshft_bd8, /* 0xc0 */
+ i_rotshft_wd8, /* 0xc1 */
+ i_ret_d16, /* 0xc2 */
+ i_ret, /* 0xc3 */
+ i_les_dw, /* 0xc4 */
+ i_lds_dw, /* 0xc5 */
+ i_mov_bd8, /* 0xc6 */
+ i_mov_wd16, /* 0xc7 */
+ i_enter, /* 0xc8 */
+ i_leave, /* 0xc9 */
+ i_retf_d16, /* 0xca */
+ i_retf, /* 0xcb */
+ i_int3, /* 0xcc */
+ i_int, /* 0xcd */
+ i_into, /* 0xce */
+ i_iret, /* 0xcf */
+ i_rotshft_b, /* 0xd0 */
+ i_rotshft_w, /* 0xd1 */
+ i_rotshft_bcl, /* 0xd2 */
+ i_rotshft_wcl, /* 0xd3 */
+ i_aam, /* 0xd4 */
+ i_aad, /* 0xd5 */
+ i_setalc, /* 0xd6 */
+ i_trans, /* 0xd7 */
+ i_fpo, /* 0xd8 */
+ i_fpo, /* 0xd9 */
+ i_fpo, /* 0xda */
+ i_fpo, /* 0xdb */
+ i_fpo, /* 0xdc */
+ i_fpo, /* 0xdd */
+ i_fpo, /* 0xde */
+ i_fpo, /* 0xdf */
+ i_loopne, /* 0xe0 */
+ i_loope, /* 0xe1 */
+ i_loop, /* 0xe2 */
+ i_jcxz, /* 0xe3 */
+ i_inal, /* 0xe4 */
+ i_inax, /* 0xe5 */
+ i_outal, /* 0xe6 */
+ i_outax, /* 0xe7 */
+ i_call_d16, /* 0xe8 */
+ i_jmp_d16, /* 0xe9 */
+ i_jmp_far, /* 0xea */
+ i_jmp_d8, /* 0xeb */
+ i_inaldx, /* 0xec */
+ i_inaxdx, /* 0xed */
+ i_outdxal, /* 0xee */
+ i_outdxax, /* 0xef */
+ i_lock, /* 0xf0 */
+ i_brks, /* 0xf1 */
+ i_repne, /* 0xf2 */
+ i_repe, /* 0xf3 */
+ i_hlt, /* 0xf4 */
+ i_cmc, /* 0xf5 */
+ i_f6pre, /* 0xf6 */
+ i_f7pre, /* 0xf7 */
+ i_clc, /* 0xf8 */
+ i_stc, /* 0xf9 */
+ i_di, /* 0xfa */
+ i_ei, /* 0xfb */
+ i_cld, /* 0xfc */
+ i_std, /* 0xfd */
+ i_fepre, /* 0xfe */
+ i_ffpre /* 0xff */
};
diff --git a/src/emu/cpu/nec/v25priv.h b/src/emu/cpu/nec/v25priv.h
index 39e1bf13f8b..68817f2d987 100644
--- a/src/emu/cpu/nec/v25priv.h
+++ b/src/emu/cpu/nec/v25priv.h
@@ -11,52 +11,52 @@
/* interrupt vectors */
enum
{
- NEC_DIVIDE_VECTOR = 0,
- NEC_TRAP_VECTOR = 1,
- NEC_NMI_VECTOR = 2,
- NEC_BRKV_VECTOR = 4,
- NEC_CHKIND_VECTOR = 5,
- NEC_IBRK_VECTOR = 19,
- NEC_INTTU0_VECTOR = 28,
- NEC_INTTU1_VECTOR = 29,
- NEC_INTTU2_VECTOR = 30,
- NEC_INTD0_VECTOR = 20,
- NEC_INTD1_VECTOR = 21,
- NEC_INTP0_VECTOR = 24,
- NEC_INTP1_VECTOR = 25,
- NEC_INTP2_VECTOR = 26,
- NEC_INTSER0_VECTOR = 12,
- NEC_INTSR0_VECTOR = 13,
- NEC_INTST0_VECTOR = 14,
- NEC_INTSER1_VECTOR = 16,
- NEC_INTSR1_VECTOR = 17,
- NEC_INTST1_VECTOR = 18,
- NEC_INTTB_VECTOR = 31
+ NEC_DIVIDE_VECTOR = 0,
+ NEC_TRAP_VECTOR = 1,
+ NEC_NMI_VECTOR = 2,
+ NEC_BRKV_VECTOR = 4,
+ NEC_CHKIND_VECTOR = 5,
+ NEC_IBRK_VECTOR = 19,
+ NEC_INTTU0_VECTOR = 28,
+ NEC_INTTU1_VECTOR = 29,
+ NEC_INTTU2_VECTOR = 30,
+ NEC_INTD0_VECTOR = 20,
+ NEC_INTD1_VECTOR = 21,
+ NEC_INTP0_VECTOR = 24,
+ NEC_INTP1_VECTOR = 25,
+ NEC_INTP2_VECTOR = 26,
+ NEC_INTSER0_VECTOR = 12,
+ NEC_INTSR0_VECTOR = 13,
+ NEC_INTST0_VECTOR = 14,
+ NEC_INTSER1_VECTOR = 16,
+ NEC_INTSR1_VECTOR = 17,
+ NEC_INTST1_VECTOR = 18,
+ NEC_INTTB_VECTOR = 31
};
/* interrupt sources */
enum INTSOURCES
{
- BRK = 0,
- INT_IRQ = 1,
- NMI_IRQ = 1 << 1,
- INTTU0 = 1 << 2,
- INTTU1 = 1 << 3,
- INTTU2 = 1 << 4,
- INTD0 = 1 << 5,
- INTD1 = 1 << 6,
- INTP0 = 1 << 7,
- INTP1 = 1 << 8,
- INTP2 = 1 << 9,
- INTSER0 = 1 << 10,
- INTSR0 = 1 << 11,
- INTST0 = 1 << 12,
- INTSER1 = 1 << 13,
- INTSR1 = 1 << 14,
- INTST1 = 1 << 15,
- INTTB = 1 << 16,
- BRKN = 1 << 17,
- BRKS = 1 << 18
+ BRK = 0,
+ INT_IRQ = 1,
+ NMI_IRQ = 1 << 1,
+ INTTU0 = 1 << 2,
+ INTTU1 = 1 << 3,
+ INTTU2 = 1 << 4,
+ INTD0 = 1 << 5,
+ INTD1 = 1 << 6,
+ INTP0 = 1 << 7,
+ INTP1 = 1 << 8,
+ INTP2 = 1 << 9,
+ INTSER0 = 1 << 10,
+ INTSR0 = 1 << 11,
+ INTST0 = 1 << 12,
+ INTSER1 = 1 << 13,
+ INTSR1 = 1 << 14,
+ INTST1 = 1 << 15,
+ INTTB = 1 << 16,
+ BRKN = 1 << 17,
+ BRKS = 1 << 18
};
/* internal RAM and register banks */
@@ -69,56 +69,56 @@ union internalram
struct v25_state_t
{
internalram ram;
- offs_t fetch_xor;
+ offs_t fetch_xor;
- UINT16 ip;
+ UINT16 ip;
/* PSW flags */
- INT32 SignVal;
- UINT32 AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
- UINT8 IBRK, F0, F1, TF, IF, DF, MF; /* 0 or 1 valued flags */
- UINT8 RBW, RBB; /* current register bank base, preshifted for word and byte registers */
+ INT32 SignVal;
+ UINT32 AuxVal, OverVal, ZeroVal, CarryVal, ParityVal; /* 0 or non-0 valued flags */
+ UINT8 IBRK, F0, F1, TF, IF, DF, MF; /* 0 or 1 valued flags */
+ UINT8 RBW, RBB; /* current register bank base, preshifted for word and byte registers */
/* interrupt related */
- UINT32 pending_irq;
- UINT32 unmasked_irq;
- UINT32 bankswitch_irq;
- UINT8 priority_inttu, priority_intd, priority_intp, priority_ints0, priority_ints1;
- UINT8 IRQS, ISPR;
- UINT32 nmi_state;
- UINT32 irq_state;
- UINT32 poll_state;
- UINT32 mode_state;
- UINT32 intp_state[3];
- UINT8 no_interrupt;
- UINT8 halted;
+ UINT32 pending_irq;
+ UINT32 unmasked_irq;
+ UINT32 bankswitch_irq;
+ UINT8 priority_inttu, priority_intd, priority_intp, priority_ints0, priority_ints1;
+ UINT8 IRQS, ISPR;
+ UINT32 nmi_state;
+ UINT32 irq_state;
+ UINT32 poll_state;
+ UINT32 mode_state;
+ UINT32 intp_state[3];
+ UINT8 no_interrupt;
+ UINT8 halted;
/* timer related */
- UINT16 TM0, MD0, TM1, MD1;
- UINT8 TMC0, TMC1;
+ UINT16 TM0, MD0, TM1, MD1;
+ UINT8 TMC0, TMC1;
emu_timer *timers[4];
/* system control */
- UINT8 RAMEN, TB, PCK; /* PRC register */
- UINT32 IDB;
+ UINT8 RAMEN, TB, PCK; /* PRC register */
+ UINT32 IDB;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *io;
- int icount;
+ int icount;
const nec_config *config;
- UINT8 prefetch_size;
- UINT8 prefetch_cycles;
- INT8 prefetch_count;
- UINT8 prefetch_reset;
- UINT32 chip_type;
+ UINT8 prefetch_size;
+ UINT8 prefetch_cycles;
+ INT8 prefetch_count;
+ UINT8 prefetch_reset;
+ UINT32 chip_type;
- UINT32 prefix_base; /* base address of the latest prefix segment */
- UINT8 seg_prefix; /* prefix segment indicator */
+ UINT32 prefix_base; /* base address of the latest prefix segment */
+ UINT8 seg_prefix; /* prefix segment indicator */
};
enum {
@@ -146,31 +146,31 @@ enum WREGS {
};
enum BREGS {
- AL = NATIVE_ENDIAN_VALUE_LE_BE(0x1E, 0x1F),
- AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1F, 0x1E),
- CL = NATIVE_ENDIAN_VALUE_LE_BE(0x1C, 0x1D),
- CH = NATIVE_ENDIAN_VALUE_LE_BE(0x1D, 0x1C),
- DL = NATIVE_ENDIAN_VALUE_LE_BE(0x1A, 0x1B),
- DH = NATIVE_ENDIAN_VALUE_LE_BE(0x1B, 0x1A),
- BL = NATIVE_ENDIAN_VALUE_LE_BE(0x18, 0x19),
- BH = NATIVE_ENDIAN_VALUE_LE_BE(0x19, 0x18)
+ AL = NATIVE_ENDIAN_VALUE_LE_BE(0x1E, 0x1F),
+ AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1F, 0x1E),
+ CL = NATIVE_ENDIAN_VALUE_LE_BE(0x1C, 0x1D),
+ CH = NATIVE_ENDIAN_VALUE_LE_BE(0x1D, 0x1C),
+ DL = NATIVE_ENDIAN_VALUE_LE_BE(0x1A, 0x1B),
+ DH = NATIVE_ENDIAN_VALUE_LE_BE(0x1B, 0x1A),
+ BL = NATIVE_ENDIAN_VALUE_LE_BE(0x18, 0x19),
+ BH = NATIVE_ENDIAN_VALUE_LE_BE(0x19, 0x18)
};
-#define SetRB(x) do { nec_state->RBW = (x) << 4; nec_state->RBB = (x) << 5; } while (0)
+#define SetRB(x) do { nec_state->RBW = (x) << 4; nec_state->RBB = (x) << 5; } while (0)
-#define Sreg(x) nec_state->ram.w[nec_state->RBW + (x)]
-#define Wreg(x) nec_state->ram.w[nec_state->RBW + (x)]
-#define Breg(x) nec_state->ram.b[nec_state->RBB + (x)]
+#define Sreg(x) nec_state->ram.w[nec_state->RBW + (x)]
+#define Wreg(x) nec_state->ram.w[nec_state->RBW + (x)]
+#define Breg(x) nec_state->ram.b[nec_state->RBB + (x)]
-#define PC(n) ((Sreg(PS)<<4)+(n)->ip)
+#define PC(n) ((Sreg(PS)<<4)+(n)->ip)
-#define CF (nec_state->CarryVal!=0)
-#define SF (nec_state->SignVal<0)
-#define ZF (nec_state->ZeroVal==0)
-#define PF parity_table[(BYTE)nec_state->ParityVal]
-#define AF (nec_state->AuxVal!=0)
-#define OF (nec_state->OverVal!=0)
-#define RB (nec_state->RBW >> 4)
+#define CF (nec_state->CarryVal!=0)
+#define SF (nec_state->SignVal<0)
+#define ZF (nec_state->ZeroVal==0)
+#define PF parity_table[(BYTE)nec_state->ParityVal]
+#define AF (nec_state->AuxVal!=0)
+#define OF (nec_state->OverVal!=0)
+#define RB (nec_state->RBW >> 4)
/************************************************************************/
@@ -179,15 +179,15 @@ UINT16 v25_read_word(v25_state_t *nec_state, unsigned a);
void v25_write_byte(v25_state_t *nec_state, unsigned a, UINT8 d);
void v25_write_word(v25_state_t *nec_state, unsigned a, UINT16 d);
-#define read_mem_byte(a) v25_read_byte(nec_state,(a))
-#define read_mem_word(a) v25_read_word(nec_state,(a))
-#define write_mem_byte(a,d) v25_write_byte(nec_state,(a),(d))
-#define write_mem_word(a,d) v25_write_word(nec_state,(a),(d))
+#define read_mem_byte(a) v25_read_byte(nec_state,(a))
+#define read_mem_word(a) v25_read_word(nec_state,(a))
+#define write_mem_byte(a,d) v25_write_byte(nec_state,(a),(d))
+#define write_mem_word(a,d) v25_write_word(nec_state,(a),(d))
-#define read_port_byte(a) nec_state->io->read_byte(a)
-#define read_port_word(a) nec_state->io->read_word_unaligned(a)
-#define write_port_byte(a,d) nec_state->io->write_byte((a),(d))
-#define write_port_word(a,d) nec_state->io->write_word_unaligned((a),(d))
+#define read_port_byte(a) nec_state->io->read_byte(a)
+#define read_port_word(a) nec_state->io->read_word_unaligned(a)
+#define write_port_byte(a,d) nec_state->io->write_byte((a),(d))
+#define write_port_word(a,d) nec_state->io->write_word_unaligned((a),(d))
/************************************************************************/
@@ -205,9 +205,9 @@ void v25_write_word(v25_state_t *nec_state, unsigned a, UINT16 d);
/* prefetch timing */
-#define FETCH() fetch(nec_state)
-#define FETCHWORD() fetchword(nec_state)
-#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
+#define FETCH() fetch(nec_state)
+#define FETCHWORD() fetchword(nec_state)
+#define EMPTY_PREFETCH() nec_state->prefetch_reset = 1
#define PUSH(val) { Wreg(SP) -= 2; write_mem_word(((Sreg(SS)<<4)+Wreg(SP)), val); }
diff --git a/src/emu/cpu/nec/v25sfr.c b/src/emu/cpu/nec/v25sfr.c
index 95be5a0583f..679a8d16ce6 100644
--- a/src/emu/cpu/nec/v25sfr.c
+++ b/src/emu/cpu/nec/v25sfr.c
@@ -10,9 +10,9 @@
static UINT8 read_irqcontrol(v25_state_t *nec_state, INTSOURCES source, UINT8 priority)
{
- return (((nec_state->pending_irq & source) ? 0x80 : 0x00)
- | ((nec_state->unmasked_irq & source) ? 0x00 : 0x40)
- | ((nec_state->bankswitch_irq & source) ? 0x10 : 0x00)
+ return (((nec_state->pending_irq & source) ? 0x80 : 0x00)
+ | ((nec_state->unmasked_irq & source) ? 0x00 : 0x40)
+ | ((nec_state->bankswitch_irq & source) ? 0x10 : 0x00)
| priority);
}
@@ -28,10 +28,10 @@ static UINT8 read_sfr(v25_state_t *nec_state, unsigned o)
case 0x08: /* P1 */
/* P1 is combined with the interrupt lines */
ret = ((nec_state->io->read_byte(V25_PORT_P1) & 0xF0)
- | (nec_state->nmi_state ? 0x00 : 0x01)
- | (nec_state->intp_state[0] ? 0x00 : 0x02)
- | (nec_state->intp_state[1] ? 0x00 : 0x04)
- | (nec_state->intp_state[2] ? 0x00 : 0x08));
+ | (nec_state->nmi_state ? 0x00 : 0x01)
+ | (nec_state->intp_state[0] ? 0x00 : 0x02)
+ | (nec_state->intp_state[1] ? 0x00 : 0x04)
+ | (nec_state->intp_state[2] ? 0x00 : 0x08));
break;
case 0x10: /* P2 */
ret = nec_state->io->read_byte(V25_PORT_P2);
@@ -113,7 +113,7 @@ static UINT16 read_sfr_word(v25_state_t *nec_state, unsigned o)
switch(o)
{
- case 0x80: /* TM0 */
+ case 0x80: /* TM0 */
logerror("%06x: Warning: read back TM0\n",PC(nec_state));
ret = nec_state->TM0;
break;
@@ -121,7 +121,7 @@ static UINT16 read_sfr_word(v25_state_t *nec_state, unsigned o)
logerror("%06x: Warning: read back MD0\n",PC(nec_state));
ret = nec_state->MD0;
break;
- case 0x88: /* TM1 */
+ case 0x88: /* TM1 */
logerror("%06x: Warning: read back TM1\n",PC(nec_state));
ret = nec_state->TM1;
break;
@@ -188,7 +188,7 @@ static void write_sfr(v25_state_t *nec_state, unsigned o, UINT8 d)
break;
case 0x90: /* TMC0 */
nec_state->TMC0 = d;
- if(d & 1) /* oneshot mode */
+ if(d & 1) /* oneshot mode */
{
if(d & 0x80)
{
@@ -208,7 +208,7 @@ static void write_sfr(v25_state_t *nec_state, unsigned o, UINT8 d)
else
nec_state->timers[1]->adjust(attotime::never);
}
- else /* interval mode */
+ else /* interval mode */
{
if(d & 0x80)
{
@@ -285,13 +285,13 @@ static void write_sfr_word(v25_state_t *nec_state, unsigned o, UINT16 d)
{
switch(o)
{
- case 0x80: /* TM0 */
+ case 0x80: /* TM0 */
nec_state->TM0 = d;
break;
case 0x82: /* MD0 */
nec_state->MD0 = d;
break;
- case 0x88: /* TM1 */
+ case 0x88: /* TM1 */
nec_state->TM1 = d;
break;
case 0x8A: /* MD1 */
@@ -335,7 +335,7 @@ UINT16 v25_read_word(v25_state_t *nec_state, unsigned a)
return read_sfr_word(nec_state, o-0x100);
}
- if(a == 0xFFFFE) /* not sure about this - manual says FFFFC-FFFFE are "reserved" */
+ if(a == 0xFFFFE) /* not sure about this - manual says FFFFC-FFFFE are "reserved" */
return (nec_state->program->read_byte(a) | (read_sfr(nec_state, 0xFF) << 8));
return nec_state->program->read_word(a);
@@ -389,7 +389,7 @@ void v25_write_word(v25_state_t *nec_state, unsigned a, UINT16 d)
}
}
- if(a == 0xFFFFE) /* not sure about this - manual says FFFFC-FFFFE are "reserved" */
+ if(a == 0xFFFFE) /* not sure about this - manual says FFFFC-FFFFE are "reserved" */
{
nec_state->program->write_byte(a, d);
write_sfr(nec_state, 0xFF, d >> 8);
diff --git a/src/emu/cpu/pdp1/pdp1.c b/src/emu/cpu/pdp1/pdp1.c
index 0a1f4e6b340..695f236bb16 100644
--- a/src/emu/cpu/pdp1/pdp1.c
+++ b/src/emu/cpu/pdp1/pdp1.c
@@ -351,51 +351,51 @@
struct pdp1_state
{
/* processor registers */
- UINT32 pc; /* program counter (12, 15 or 16 bits) */
- int ir; /* basic operation code of current instruction (5 bits) */
- int mb; /* memory buffer (used for holding the current instruction only) (18 bits) */
- int ma; /* memory address (12, 15 or 16 bits) */
- int ac; /* accumulator (18 bits) */
- int io; /* i/o register (18 bits) */
- int pf; /* program flag register (6 bits) */
+ UINT32 pc; /* program counter (12, 15 or 16 bits) */
+ int ir; /* basic operation code of current instruction (5 bits) */
+ int mb; /* memory buffer (used for holding the current instruction only) (18 bits) */
+ int ma; /* memory address (12, 15 or 16 bits) */
+ int ac; /* accumulator (18 bits) */
+ int io; /* i/o register (18 bits) */
+ int pf; /* program flag register (6 bits) */
/* operator panel switches */
- int ta; /* current state of the 12 or 16 address switches */
- int tw; /* current state of the 18 test word switches */
- int ss; /* current state of the 6 sense switches on the operator panel (6 bits) */
- unsigned int sngl_step : 1; /* stop every memory cycle */
- unsigned int sngl_inst : 1; /* stop every instruction */
- unsigned int extend_sw : 1; /* extend switch (loaded into the extend flip-flop on start/read-in) */
+ int ta; /* current state of the 12 or 16 address switches */
+ int tw; /* current state of the 18 test word switches */
+ int ss; /* current state of the 6 sense switches on the operator panel (6 bits) */
+ unsigned int sngl_step : 1; /* stop every memory cycle */
+ unsigned int sngl_inst : 1; /* stop every instruction */
+ unsigned int extend_sw : 1; /* extend switch (loaded into the extend flip-flop on start/read-in) */
/* processor state flip-flops */
- unsigned int run : 1; /* processor is running */
- unsigned int cycle : 1; /* processor is in the midst of an instruction */
- unsigned int defer : 1; /* processor is handling deferred (i.e. indirect) addressing */
- unsigned int brk_ctr : 2; /* break counter */
- unsigned int ov; /* overflow flip-flop */
- unsigned int rim : 1; /* processor is in read-in mode */
+ unsigned int run : 1; /* processor is running */
+ unsigned int cycle : 1; /* processor is in the midst of an instruction */
+ unsigned int defer : 1; /* processor is handling deferred (i.e. indirect) addressing */
+ unsigned int brk_ctr : 2; /* break counter */
+ unsigned int ov; /* overflow flip-flop */
+ unsigned int rim : 1; /* processor is in read-in mode */
- unsigned int sbm : 1; /* processor is in sequence break mode (i.e. interrupts are enabled) */
+ unsigned int sbm : 1; /* processor is in sequence break mode (i.e. interrupts are enabled) */
- unsigned int exd : 1; /* extend mode: processor is in extend mode */
- unsigned int exc : 1; /* extend-mode cycle: current instruction cycle is done in extend mode */
- unsigned int ioc : 1; /* i-o commands: seems to be equivalent to (! ioh) */
- unsigned int ioh : 1; /* i-o halt: processor is executing an Input-Output Transfer wait */
- unsigned int ios : 1; /* i-o synchronizer: set on i-o operation completion */
+ unsigned int exd : 1; /* extend mode: processor is in extend mode */
+ unsigned int exc : 1; /* extend-mode cycle: current instruction cycle is done in extend mode */
+ unsigned int ioc : 1; /* i-o commands: seems to be equivalent to (! ioh) */
+ unsigned int ioh : 1; /* i-o halt: processor is executing an Input-Output Transfer wait */
+ unsigned int ios : 1; /* i-o synchronizer: set on i-o operation completion */
/* sequence break system */
- unsigned int irq_state : 16; /* mirrors the state of the interrupt pins */
- unsigned int b1 : 16; /* interrupt enable */
- unsigned int b2 : 16; /* interrupt pulse request pending - asynchronous with computer operation (set by pulses on irq_state, cleared when interrupt is taken) */
- /*unsigned int b3 : 16;*/ /* interrupt request pending - synchronous with computer operation (logical or of irq_state and b2???) */
- unsigned int b4 : 16; /* interrupt in progress */
+ unsigned int irq_state : 16; /* mirrors the state of the interrupt pins */
+ unsigned int b1 : 16; /* interrupt enable */
+ unsigned int b2 : 16; /* interrupt pulse request pending - asynchronous with computer operation (set by pulses on irq_state, cleared when interrupt is taken) */
+ /*unsigned int b3 : 16;*/ /* interrupt request pending - synchronous with computer operation (logical or of irq_state and b2???) */
+ unsigned int b4 : 16; /* interrupt in progress */
/* additional emulator state variables */
- int rim_step; /* current step in rim execution */
- int sbs_request; /* interrupt request (i.e. (b3 & (~ b4)) && (! sbm)) */
- int sbs_level; /* interrupt request level (first bit in (b3 & (~ b4)) */
- int sbs_restore; /* set when a jump instruction is an interrupt return */
- int no_sequence_break; /* disable sequence break recognition for one cycle */
+ int rim_step; /* current step in rim execution */
+ int sbs_request; /* interrupt request (i.e. (b3 & (~ b4)) && (! sbm)) */
+ int sbs_level; /* interrupt request level (first bit in (b3 & (~ b4)) */
+ int sbs_restore; /* set when a jump instruction is an interrupt return */
+ int no_sequence_break; /* disable sequence break recognition for one cycle */
/* callbacks for iot instructions (required for any I/O) */
pdp1_extern_iot_func extern_iot[64];
@@ -407,8 +407,8 @@ struct pdp1_state
/* 0: no extend support, 1: extend with 15-bit address, 2: extend with 16-bit address */
int extend_support;
- int extended_address_mask; /* 07777 with no extend support, 077777 or 0177777 with extend support */
- int address_extension_mask; /* 00000 with no extend support, 070000 or 0170000 with extend support */
+ int extended_address_mask; /* 07777 with no extend support, 077777 or 0177777 with extend support */
+ int address_extension_mask; /* 00000 with no extend support, 070000 or 0170000 with extend support */
/* 1 to use hardware multiply/divide (MUL, DIV) instead of MUS, DIS */
int hw_mul_div;
@@ -437,30 +437,30 @@ static void pulse_start_clear(pdp1_state *cpustate);
-#define PC cpustate->pc
-#define IR cpustate->ir
-#define MB cpustate->mb
-#define MA cpustate->ma
-#define AC cpustate->ac
-#define IO cpustate->io
-#define OV cpustate->ov
-#define EXD cpustate->exd
+#define PC cpustate->pc
+#define IR cpustate->ir
+#define MB cpustate->mb
+#define MA cpustate->ma
+#define AC cpustate->ac
+#define IO cpustate->io
+#define OV cpustate->ov
+#define EXD cpustate->exd
/* note that we start counting flags/sense switches at 1, therefore n is in [1,6] */
-#define FLAGS cpustate->pf
-#define READFLAG(n) ((cpustate->pf >> (6-(n))) & 1)
-#define WRITEFLAG(n, data) (cpustate->pf = (cpustate->pf & ~(1 << (6-(n)))) | (((data) & 1) << (6-(n))))
-#define SENSE_SW cpustate->ss
-#define READSENSE(n) ((cpustate->ss >> (6-(n))) & 1)
-#define WRITESENSE(n, data) (cpustate->ss = (cpustate->ss & ~(1 << (6-(n)))) | (((data) & 1) << (6-(n))))
+#define FLAGS cpustate->pf
+#define READFLAG(n) ((cpustate->pf >> (6-(n))) & 1)
+#define WRITEFLAG(n, data) (cpustate->pf = (cpustate->pf & ~(1 << (6-(n)))) | (((data) & 1) << (6-(n))))
+#define SENSE_SW cpustate->ss
+#define READSENSE(n) ((cpustate->ss >> (6-(n))) & 1)
+#define WRITESENSE(n, data) (cpustate->ss = (cpustate->ss & ~(1 << (6-(n)))) | (((data) & 1) << (6-(n))))
-#define EXTENDED_ADDRESS_MASK cpustate->extended_address_mask
-#define ADDRESS_EXTENSION_MASK cpustate->address_extension_mask
-#define BASE_ADDRESS_MASK 0007777
+#define EXTENDED_ADDRESS_MASK cpustate->extended_address_mask
+#define ADDRESS_EXTENSION_MASK cpustate->address_extension_mask
+#define BASE_ADDRESS_MASK 0007777
-#define INCREMENT_PC (PC = (PC & ADDRESS_EXTENSION_MASK) | ((PC+1) & BASE_ADDRESS_MASK))
-#define DECREMENT_PC (PC = (PC & ADDRESS_EXTENSION_MASK) | ((PC-1) & BASE_ADDRESS_MASK))
-#define INCREMENT_MA (MA = (MA & ADDRESS_EXTENSION_MASK) | ((MA+1) & BASE_ADDRESS_MASK))
-#define PREVIOUS_PC ((PC & ADDRESS_EXTENSION_MASK) | ((PC-1) & BASE_ADDRESS_MASK))
+#define INCREMENT_PC (PC = (PC & ADDRESS_EXTENSION_MASK) | ((PC+1) & BASE_ADDRESS_MASK))
+#define DECREMENT_PC (PC = (PC & ADDRESS_EXTENSION_MASK) | ((PC-1) & BASE_ADDRESS_MASK))
+#define INCREMENT_MA (MA = (MA & ADDRESS_EXTENSION_MASK) | ((MA+1) & BASE_ADDRESS_MASK))
+#define PREVIOUS_PC ((PC & ADDRESS_EXTENSION_MASK) | ((PC-1) & BASE_ADDRESS_MASK))
@@ -486,15 +486,15 @@ static void pulse_start_clear(pdp1_state *cpustate);
static void field_interrupt(pdp1_state *cpustate)
{
/* current_irq: 1 bit for each active pending interrupt request
- Pending interrupts are in b3 (simulated by (cpustate->irq_state & cpustate->b1) | cpustate->b2)), but they
- are only honored if no higher priority interrupt routine is in execution (one bit set in b4
- for each routine in execution). The revelant mask is created with (cpustate->b4 | (- cpustate->b4)),
- as the carry chain (remember that -b4 = (~ b4) + 1) does precisely what we want.
- b4: 0001001001000
- -b4: 1110110111000
- b4|-b4:1111111111000
- Neat, uh?
- */
+ Pending interrupts are in b3 (simulated by (cpustate->irq_state & cpustate->b1) | cpustate->b2)), but they
+ are only honored if no higher priority interrupt routine is in execution (one bit set in b4
+ for each routine in execution). The revelant mask is created with (cpustate->b4 | (- cpustate->b4)),
+ as the carry chain (remember that -b4 = (~ b4) + 1) does precisely what we want.
+ b4: 0001001001000
+ -b4: 1110110111000
+ b4|-b4:1111111111000
+ Neat, uh?
+ */
int current_irq = ((cpustate->irq_state & cpustate->b1) | cpustate->b2) & ~ (cpustate->b4 | (- cpustate->b4));
int i;
@@ -562,15 +562,15 @@ static CPU_INIT( pdp1 )
{
default:
cpustate->extend_support = 0;
- case 0: /* no extension */
+ case 0: /* no extension */
cpustate->extended_address_mask = 07777;
cpustate->address_extension_mask = 00000;
break;
- case 1: /* 15-bit extension */
+ case 1: /* 15-bit extension */
cpustate->extended_address_mask = 077777;
cpustate->address_extension_mask = 070000;
break;
- case 2: /* 16-bit extension */
+ case 2: /* 16-bit extension */
cpustate->extended_address_mask = 0177777;
cpustate->address_extension_mask = 0170000;
break;
@@ -605,13 +605,13 @@ static CPU_RESET( pdp1 )
static const char instruction_kind[32] =
{
/* and ior xor xct cal/jda */
- 0, 3, 3, 3, 3, 0, 0, 2,
+ 0, 3, 3, 3, 3, 0, 0, 2,
/* lac lio dac dap dip dio dzm */
- 3, 3, 3, 3, 3, 3, 3, 0,
+ 3, 3, 3, 3, 3, 3, 3, 0,
/* add sub idx isp sad sas mus dis */
- 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3,
/* jmp jsp skp sft law iot opr */
- 1, 1, 0, 0, 0, 0, 0, 0
+ 1, 1, 0, 0, 0, 0, 0, 0
};
@@ -626,7 +626,7 @@ static CPU_EXECUTE( pdp1 )
/* ioh should be cleared at the end of the instruction cycle, and ios at the
- start of next instruction cycle, but who cares? */
+ start of next instruction cycle, but who cares? */
if (cpustate->ioh && cpustate->ios)
{
cpustate->ioh = 0;
@@ -635,7 +635,7 @@ static CPU_EXECUTE( pdp1 )
if ((! cpustate->run) && (! cpustate->rim))
- cpustate->icount = 0; /* if processor is stopped, just burn cycles */
+ cpustate->icount = 0; /* if processor is stopped, just burn cycles */
else if (cpustate->rim)
{
switch (cpustate->rim_step)
@@ -643,33 +643,33 @@ static CPU_EXECUTE( pdp1 )
case 0:
/* read first word as instruction */
if (cpustate->read_binary_word)
- (*cpustate->read_binary_word)(cpustate->device); /* data will be transferred to IO register */
+ (*cpustate->read_binary_word)(cpustate->device); /* data will be transferred to IO register */
cpustate->rim_step = 1;
break;
case 1:
if (! cpustate->ios)
- { /* transfer incomplete: wait some more */
+ { /* transfer incomplete: wait some more */
cpustate->icount = 0;
}
else
- { /* data transfer complete */
+ { /* data transfer complete */
cpustate->ios = 0;
MB = IO;
- IR = MB >> 13; /* basic opcode */
- if (IR == JMP) /* jmp instruction ? */
+ IR = MB >> 13; /* basic opcode */
+ if (IR == JMP) /* jmp instruction ? */
{
PC = (MA & ADDRESS_EXTENSION_MASK) | (MB & BASE_ADDRESS_MASK);
- cpustate->rim = 0; /* exit read-in mode */
+ cpustate->rim = 0; /* exit read-in mode */
cpustate->run = 1;
cpustate->rim_step = 0;
}
- else if ((IR == DIO) || (IR == DAC)) /* dio or dac instruction ? */
- { /* there is a discrepancy: the pdp1 handbook tells that only dio should be used,
+ else if ((IR == DIO) || (IR == DAC)) /* dio or dac instruction ? */
+ { /* there is a discrepancy: the pdp1 handbook tells that only dio should be used,
but the lisp tape uses the dac instruction instead */
/* Yet maintainance manual p. 6-25 states clearly that the data is located
- in IO and transfered to MB, so DAC is likely to be a mistake. */
+ in IO and transfered to MB, so DAC is likely to be a mistake. */
cpustate->rim_step = 2;
}
else
@@ -678,7 +678,7 @@ static CPU_EXECUTE( pdp1 )
if (LOG)
logerror("It seems this tape should not be operated in read-in mode\n");
- cpustate->rim = 0; /* exit read-in mode (right???) */
+ cpustate->rim = 0; /* exit read-in mode (right???) */
cpustate->rim_step = 0;
}
}
@@ -687,17 +687,17 @@ static CPU_EXECUTE( pdp1 )
case 2:
/* read second word as data */
if (cpustate->read_binary_word)
- (*cpustate->read_binary_word)(cpustate->device); /* data will be transferred to IO register */
+ (*cpustate->read_binary_word)(cpustate->device); /* data will be transferred to IO register */
cpustate->rim_step = 3;
break;
case 3:
if (! cpustate->ios)
- { /* transfer incomplete: wait some more */
+ { /* transfer incomplete: wait some more */
cpustate->icount = 0;
}
else
- { /* data transfer complete */
+ { /* data transfer complete */
cpustate->ios = 0;
MA = (PC & ADDRESS_EXTENSION_MASK) | (MB & BASE_ADDRESS_MASK);
@@ -714,43 +714,43 @@ static CPU_EXECUTE( pdp1 )
{
/* yes, interrupt can occur in the midst of an instruction (impressing, huh?) */
/* Note that break cannot occur during a one-cycle jump that is deferred only once,
- or another break cycle. Also, it cannot interrupt the long cycle 1 of automatic
- multiply/divide. (maintainance manual 6-19) */
+ or another break cycle. Also, it cannot interrupt the long cycle 1 of automatic
+ multiply/divide. (maintainance manual 6-19) */
if (cpustate->sbs_request && (! cpustate->no_sequence_break) && (! cpustate->brk_ctr))
- { /* begin sequence break */
+ { /* begin sequence break */
cpustate->brk_ctr = 1;
}
if (cpustate->brk_ctr)
- { /* sequence break in progress */
+ { /* sequence break in progress */
switch (cpustate->brk_ctr)
{
case 1:
if (cpustate->cycle)
- DECREMENT_PC; /* set PC to point to aborted instruction, so that it can be re-run */
+ DECREMENT_PC; /* set PC to point to aborted instruction, so that it can be re-run */
- cpustate->b4 |= (1 << cpustate->sbs_level); /* set "interrupt in progress" flag */
- cpustate->b2 &= ~(1 << cpustate->sbs_level); /* clear interrupt request */
+ cpustate->b4 |= (1 << cpustate->sbs_level); /* set "interrupt in progress" flag */
+ cpustate->b2 &= ~(1 << cpustate->sbs_level); /* clear interrupt request */
field_interrupt(cpustate);
- MA = cpustate->sbs_level << 2; /* always 0 with standard sequence break system */
- MB = AC; /* save AC to MB */
- AC = (OV << 17) | (EXD << 16) | PC; /* save OV/EXD/PC to AC */
- EXD = OV = 0; /* according to maintainance manual p. 8-17 and ?-?? */
- cpustate->cycle = cpustate->defer = cpustate->exc = 0; /* mere guess */
- WRITE_PDP_18BIT(MA, MB); /* save former AC to memory */
+ MA = cpustate->sbs_level << 2; /* always 0 with standard sequence break system */
+ MB = AC; /* save AC to MB */
+ AC = (OV << 17) | (EXD << 16) | PC; /* save OV/EXD/PC to AC */
+ EXD = OV = 0; /* according to maintainance manual p. 8-17 and ?-?? */
+ cpustate->cycle = cpustate->defer = cpustate->exc = 0; /* mere guess */
+ WRITE_PDP_18BIT(MA, MB); /* save former AC to memory */
INCREMENT_MA;
cpustate->icount -= 5;
cpustate->brk_ctr++;
break;
case 2:
- WRITE_PDP_18BIT(MA, MB = AC); /* save former OV/EXD/PC to memory */
+ WRITE_PDP_18BIT(MA, MB = AC); /* save former OV/EXD/PC to memory */
INCREMENT_MA;
cpustate->icount -= 5;
cpustate->brk_ctr++;
break;
case 3:
- WRITE_PDP_18BIT(MA, MB = IO); /* save IO to memory */
+ WRITE_PDP_18BIT(MA, MB = IO); /* save IO to memory */
INCREMENT_MA;
PC = MA;
cpustate->icount -= 5;
@@ -764,15 +764,15 @@ static CPU_EXECUTE( pdp1 )
cpustate->no_sequence_break = 0;
if (! cpustate->cycle)
- { /* no instruction in progress: time to fetch a new instruction, I guess */
+ { /* no instruction in progress: time to fetch a new instruction, I guess */
MB = READ_PDP_18BIT(MA = PC);
INCREMENT_PC;
- IR = MB >> 13; /* basic opcode */
+ IR = MB >> 13; /* basic opcode */
if ((instruction_kind[IR] & 1) && (MB & 010000))
{
cpustate->defer = 1;
- cpustate->cycle = 1; /* instruction shall be executed later */
+ cpustate->cycle = 1; /* instruction shall be executed later */
/* detect deferred one-cycle jumps */
if ((IR == JMP) || (IR == JSP))
@@ -788,21 +788,21 @@ static CPU_EXECUTE( pdp1 )
cpustate->b4 &= ~(1 << level);
field_interrupt(cpustate);
if (cpustate->extend_support)
- EXD = 1; /* according to maintainance manual p. 6-33 */
+ EXD = 1; /* according to maintainance manual p. 6-33 */
cpustate->sbs_restore = 1;
}
}
}
}
else if (instruction_kind[IR] & 2)
- cpustate->cycle = 1; /* instruction shall be executed later */
+ cpustate->cycle = 1; /* instruction shall be executed later */
else
- execute_instruction(cpustate); /* execute instruction at once */
+ execute_instruction(cpustate); /* execute instruction at once */
cpustate->icount -= 5;
}
else if (cpustate->defer)
- { /* defer cycle : handle indirect addressing */
+ { /* defer cycle : handle indirect addressing */
MA = (PC & ADDRESS_EXTENSION_MASK) | (MB & BASE_ADDRESS_MASK);
MB = READ_PDP_18BIT(MA);
@@ -819,12 +819,12 @@ static CPU_EXECUTE( pdp1 )
/* execute JMP and JSP immediately if applicable */
if ((! cpustate->defer) && (! (instruction_kind[IR] & 2)))
{
- execute_instruction(cpustate); /* execute instruction at once */
+ execute_instruction(cpustate); /* execute instruction at once */
/*cpustate->cycle = 0;*/
cpustate->exc = 0;
if (cpustate->sbs_restore)
- { /* interrupt return: according to maintainance manual p. 6-33 */
+ { /* interrupt return: according to maintainance manual p. 6-33 */
if (cpustate->extend_support)
EXD = (MB >> 16) & 1;
OV = (MB >> 17) & 1;
@@ -835,7 +835,7 @@ static CPU_EXECUTE( pdp1 )
cpustate->icount -= 5;
}
else
- { /* memory reference instruction in cycle 1 */
+ { /* memory reference instruction in cycle 1 */
if (cpustate->exc)
{
MA = MB & EXTENDED_ADDRESS_MASK;
@@ -844,7 +844,7 @@ static CPU_EXECUTE( pdp1 )
else
MA = (PC & ADDRESS_EXTENSION_MASK) | (MB & BASE_ADDRESS_MASK);
- execute_instruction(cpustate); /* execute instruction */
+ execute_instruction(cpustate); /* execute instruction */
cpustate->icount -= 5;
}
@@ -882,48 +882,48 @@ static CPU_SET_INFO( pdp1 )
case CPUINFO_INT_INPUT_STATE + 12:
case CPUINFO_INT_INPUT_STATE + 13:
case CPUINFO_INT_INPUT_STATE + 14:
- case CPUINFO_INT_INPUT_STATE + 15: pdp1_set_irq_line(cpustate, state-CPUINFO_INT_INPUT_STATE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 15: pdp1_set_irq_line(cpustate, state-CPUINFO_INT_INPUT_STATE, info->i); break;
- case CPUINFO_INT_SP: (void) info->i; /* no SP */ break;
+ case CPUINFO_INT_SP: (void) info->i; /* no SP */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PDP1_PC: PC = info->i & EXTENDED_ADDRESS_MASK; break;
- case CPUINFO_INT_REGISTER + PDP1_IR: IR = info->i & 037; /* weird idea */ break;
- case CPUINFO_INT_REGISTER + PDP1_MB: MB = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + PDP1_MA: MA = info->i & EXTENDED_ADDRESS_MASK; break;
- case CPUINFO_INT_REGISTER + PDP1_AC: AC = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + PDP1_IO: IO = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + PDP1_OV: OV = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_PF: FLAGS = info->i & 077; break;
- case CPUINFO_INT_REGISTER + PDP1_PF1: WRITEFLAG(1, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_PF2: WRITEFLAG(2, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_PF3: WRITEFLAG(3, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_PF4: WRITEFLAG(4, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_PF5: WRITEFLAG(5, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_PF6: WRITEFLAG(6, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_TA: cpustate->ta = info->i & 0177777 /*07777 with simpler control panel*/; break;
- case CPUINFO_INT_REGISTER + PDP1_TW: cpustate->tw = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + PDP1_SS: SENSE_SW = info->i & 077; break;
- case CPUINFO_INT_REGISTER + PDP1_SS1: WRITESENSE(1, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_SS2: WRITESENSE(2, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_SS3: WRITESENSE(3, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_SS4: WRITESENSE(4, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_SS5: WRITESENSE(5, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_SS6: WRITESENSE(6, info->i ? 1 : 0); break;
- case CPUINFO_INT_REGISTER + PDP1_SNGL_STEP: cpustate->sngl_step = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_SNGL_INST: cpustate->sngl_inst = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_EXTEND_SW: cpustate->extend_sw = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_RUN: cpustate->run = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_CYC: if (LOG) logerror("pdp1_set_reg to cycle flip-flop ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + PDP1_DEFER: if (LOG) logerror("pdp1_set_reg to defer flip-flop ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + PDP1_BRK_CTR: if (LOG) logerror("pdp1_set_reg to break counter ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + PDP1_RIM: cpustate->rim = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_SBM: cpustate->sbm = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_EXD: EXD = (cpustate->extend_support && info->i) ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + PDP1_IOC: if (LOG) logerror("pdp1_set_reg to ioc flip-flop ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + PDP1_IOH: if (LOG) logerror("pdp1_set_reg to ioh flip-flop ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + PDP1_IOS: if (LOG) logerror("pdp1_set_reg to ios flip-flop ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + PDP1_START_CLEAR: pulse_start_clear(cpustate); break;
- case CPUINFO_INT_REGISTER + PDP1_IO_COMPLETE: cpustate->ios = 1; break;
+ case CPUINFO_INT_REGISTER + PDP1_PC: PC = info->i & EXTENDED_ADDRESS_MASK; break;
+ case CPUINFO_INT_REGISTER + PDP1_IR: IR = info->i & 037; /* weird idea */ break;
+ case CPUINFO_INT_REGISTER + PDP1_MB: MB = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + PDP1_MA: MA = info->i & EXTENDED_ADDRESS_MASK; break;
+ case CPUINFO_INT_REGISTER + PDP1_AC: AC = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + PDP1_IO: IO = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + PDP1_OV: OV = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_PF: FLAGS = info->i & 077; break;
+ case CPUINFO_INT_REGISTER + PDP1_PF1: WRITEFLAG(1, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF2: WRITEFLAG(2, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF3: WRITEFLAG(3, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF4: WRITEFLAG(4, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF5: WRITEFLAG(5, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF6: WRITEFLAG(6, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_TA: cpustate->ta = info->i & 0177777 /*07777 with simpler control panel*/; break;
+ case CPUINFO_INT_REGISTER + PDP1_TW: cpustate->tw = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + PDP1_SS: SENSE_SW = info->i & 077; break;
+ case CPUINFO_INT_REGISTER + PDP1_SS1: WRITESENSE(1, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS2: WRITESENSE(2, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS3: WRITESENSE(3, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS4: WRITESENSE(4, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS5: WRITESENSE(5, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS6: WRITESENSE(6, info->i ? 1 : 0); break;
+ case CPUINFO_INT_REGISTER + PDP1_SNGL_STEP: cpustate->sngl_step = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_SNGL_INST: cpustate->sngl_inst = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_EXTEND_SW: cpustate->extend_sw = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_RUN: cpustate->run = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_CYC: if (LOG) logerror("pdp1_set_reg to cycle flip-flop ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + PDP1_DEFER: if (LOG) logerror("pdp1_set_reg to defer flip-flop ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + PDP1_BRK_CTR: if (LOG) logerror("pdp1_set_reg to break counter ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + PDP1_RIM: cpustate->rim = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_SBM: cpustate->sbm = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_EXD: EXD = (cpustate->extend_support && info->i) ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + PDP1_IOC: if (LOG) logerror("pdp1_set_reg to ioc flip-flop ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + PDP1_IOH: if (LOG) logerror("pdp1_set_reg to ioh flip-flop ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + PDP1_IOS: if (LOG) logerror("pdp1_set_reg to ios flip-flop ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + PDP1_START_CLEAR: pulse_start_clear(cpustate); break;
+ case CPUINFO_INT_REGISTER + PDP1_IO_COMPLETE: cpustate->ios = 1; break;
}
}
@@ -935,30 +935,30 @@ CPU_GET_INFO( pdp1 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pdp1_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 5; /* 5us cycle time */ break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 31; /* we emulate individual 5us cycle, but MUL/DIV have longer timings */ break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 18; /*16+2 ignored bits to make double word address*/ break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
- case CPUINFO_INT_PC: info->i = PC; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = PC; /* TODO??? */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pdp1_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 5; /* 5us cycle time */ break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 31; /* we emulate individual 5us cycle, but MUL/DIV have longer timings */ break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 18; /*16+2 ignored bits to make double word address*/ break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
+ case CPUINFO_INT_PC: info->i = PC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = PC; /* TODO??? */ break;
case CPUINFO_INT_INPUT_STATE + 0:
case CPUINFO_INT_INPUT_STATE + 1:
@@ -975,121 +975,121 @@ CPU_GET_INFO( pdp1 )
case CPUINFO_INT_INPUT_STATE + 12:
case CPUINFO_INT_INPUT_STATE + 13:
case CPUINFO_INT_INPUT_STATE + 14:
- case CPUINFO_INT_INPUT_STATE + 15: info->i = (cpustate->irq_state >> (state-CPUINFO_INT_INPUT_STATE)) & 1; break;
-
- case CPUINFO_INT_REGISTER + PDP1_PC: info->i = PC; break;
- case CPUINFO_INT_REGISTER + PDP1_IR: info->i = IR; break;
- case CPUINFO_INT_REGISTER + PDP1_MB: info->i = MB; break;
- case CPUINFO_INT_REGISTER + PDP1_MA: info->i = MA; break;
- case CPUINFO_INT_REGISTER + PDP1_AC: info->i = AC; break;
- case CPUINFO_INT_REGISTER + PDP1_IO: info->i = IO; break;
- case CPUINFO_INT_REGISTER + PDP1_OV: info->i = OV; break;
- case CPUINFO_INT_REGISTER + PDP1_PF: info->i = FLAGS; break;
- case CPUINFO_INT_REGISTER + PDP1_PF1: info->i = READFLAG(1); break;
- case CPUINFO_INT_REGISTER + PDP1_PF2: info->i = READFLAG(2); break;
- case CPUINFO_INT_REGISTER + PDP1_PF3: info->i = READFLAG(3); break;
- case CPUINFO_INT_REGISTER + PDP1_PF4: info->i = READFLAG(4); break;
- case CPUINFO_INT_REGISTER + PDP1_PF5: info->i = READFLAG(5); break;
- case CPUINFO_INT_REGISTER + PDP1_PF6: info->i = READFLAG(6); break;
- case CPUINFO_INT_REGISTER + PDP1_TA: info->i = cpustate->ta; break;
- case CPUINFO_INT_REGISTER + PDP1_TW: info->i = cpustate->tw; break;
- case CPUINFO_INT_REGISTER + PDP1_SS: info->i = SENSE_SW; break;
- case CPUINFO_INT_REGISTER + PDP1_SS1: info->i = READSENSE(1); break;
- case CPUINFO_INT_REGISTER + PDP1_SS2: info->i = READSENSE(2); break;
- case CPUINFO_INT_REGISTER + PDP1_SS3: info->i = READSENSE(3); break;
- case CPUINFO_INT_REGISTER + PDP1_SS4: info->i = READSENSE(4); break;
- case CPUINFO_INT_REGISTER + PDP1_SS5: info->i = READSENSE(5); break;
- case CPUINFO_INT_REGISTER + PDP1_SS6: info->i = READSENSE(6); break;
- case CPUINFO_INT_REGISTER + PDP1_SNGL_STEP: info->i = cpustate->sngl_step; break;
- case CPUINFO_INT_REGISTER + PDP1_SNGL_INST: info->i = cpustate->sngl_inst; break;
- case CPUINFO_INT_REGISTER + PDP1_EXTEND_SW: info->i = cpustate->extend_sw; break;
- case CPUINFO_INT_REGISTER + PDP1_RUN: info->i = cpustate->run; break;
- case CPUINFO_INT_REGISTER + PDP1_CYC: info->i = cpustate->cycle; break;
- case CPUINFO_INT_REGISTER + PDP1_DEFER: info->i = cpustate->defer; break;
- case CPUINFO_INT_REGISTER + PDP1_BRK_CTR: info->i = cpustate->brk_ctr; break;
- case CPUINFO_INT_REGISTER + PDP1_RIM: info->i = cpustate->rim; break;
- case CPUINFO_INT_REGISTER + PDP1_SBM: info->i = cpustate->sbm; break;
- case CPUINFO_INT_REGISTER + PDP1_EXD: info->i = EXD; break;
- case CPUINFO_INT_REGISTER + PDP1_IOC: info->i = cpustate->ioc; break;
- case CPUINFO_INT_REGISTER + PDP1_IOH: info->i = cpustate->ioh; break;
- case CPUINFO_INT_REGISTER + PDP1_IOS: info->i = cpustate->ios; break;
+ case CPUINFO_INT_INPUT_STATE + 15: info->i = (cpustate->irq_state >> (state-CPUINFO_INT_INPUT_STATE)) & 1; break;
+
+ case CPUINFO_INT_REGISTER + PDP1_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + PDP1_IR: info->i = IR; break;
+ case CPUINFO_INT_REGISTER + PDP1_MB: info->i = MB; break;
+ case CPUINFO_INT_REGISTER + PDP1_MA: info->i = MA; break;
+ case CPUINFO_INT_REGISTER + PDP1_AC: info->i = AC; break;
+ case CPUINFO_INT_REGISTER + PDP1_IO: info->i = IO; break;
+ case CPUINFO_INT_REGISTER + PDP1_OV: info->i = OV; break;
+ case CPUINFO_INT_REGISTER + PDP1_PF: info->i = FLAGS; break;
+ case CPUINFO_INT_REGISTER + PDP1_PF1: info->i = READFLAG(1); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF2: info->i = READFLAG(2); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF3: info->i = READFLAG(3); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF4: info->i = READFLAG(4); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF5: info->i = READFLAG(5); break;
+ case CPUINFO_INT_REGISTER + PDP1_PF6: info->i = READFLAG(6); break;
+ case CPUINFO_INT_REGISTER + PDP1_TA: info->i = cpustate->ta; break;
+ case CPUINFO_INT_REGISTER + PDP1_TW: info->i = cpustate->tw; break;
+ case CPUINFO_INT_REGISTER + PDP1_SS: info->i = SENSE_SW; break;
+ case CPUINFO_INT_REGISTER + PDP1_SS1: info->i = READSENSE(1); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS2: info->i = READSENSE(2); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS3: info->i = READSENSE(3); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS4: info->i = READSENSE(4); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS5: info->i = READSENSE(5); break;
+ case CPUINFO_INT_REGISTER + PDP1_SS6: info->i = READSENSE(6); break;
+ case CPUINFO_INT_REGISTER + PDP1_SNGL_STEP: info->i = cpustate->sngl_step; break;
+ case CPUINFO_INT_REGISTER + PDP1_SNGL_INST: info->i = cpustate->sngl_inst; break;
+ case CPUINFO_INT_REGISTER + PDP1_EXTEND_SW: info->i = cpustate->extend_sw; break;
+ case CPUINFO_INT_REGISTER + PDP1_RUN: info->i = cpustate->run; break;
+ case CPUINFO_INT_REGISTER + PDP1_CYC: info->i = cpustate->cycle; break;
+ case CPUINFO_INT_REGISTER + PDP1_DEFER: info->i = cpustate->defer; break;
+ case CPUINFO_INT_REGISTER + PDP1_BRK_CTR: info->i = cpustate->brk_ctr; break;
+ case CPUINFO_INT_REGISTER + PDP1_RIM: info->i = cpustate->rim; break;
+ case CPUINFO_INT_REGISTER + PDP1_SBM: info->i = cpustate->sbm; break;
+ case CPUINFO_INT_REGISTER + PDP1_EXD: info->i = EXD; break;
+ case CPUINFO_INT_REGISTER + PDP1_IOC: info->i = cpustate->ioc; break;
+ case CPUINFO_INT_REGISTER + PDP1_IOH: info->i = cpustate->ioh; break;
+ case CPUINFO_INT_REGISTER + PDP1_IOS: info->i = cpustate->ios; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pdp1); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pdp1); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pdp1); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pdp1); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pdp1); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pdp1); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pdp1); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pdp1); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pdp1); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pdp1); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PDP1"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "DEC PDP-1"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s,
+ case CPUINFO_STR_NAME: strcpy(info->s, "PDP1"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "DEC PDP-1"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s,
"Brian Silverman (original Java Source)\n"
"Vadim Gerasimov (original Java Source)\n"
"Chris Salomon (MESS driver)\n"
"Raphael Nabet (MESS driver)\n");
break;
- case CPUINFO_STR_FLAGS:
+ case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c-%c%c%c%c%c%c",
- (FLAGS & 040) ? '1' : '.',
- (FLAGS & 020) ? '2' : '.',
- (FLAGS & 010) ? '3' : '.',
- (FLAGS & 004) ? '4' : '.',
- (FLAGS & 002) ? '5' : '.',
- (FLAGS & 001) ? '6' : '.',
- (SENSE_SW & 040) ? '1' : '.',
- (SENSE_SW & 020) ? '2' : '.',
- (SENSE_SW & 010) ? '3' : '.',
- (SENSE_SW & 004) ? '4' : '.',
- (SENSE_SW & 002) ? '5' : '.',
- (SENSE_SW & 001) ? '6' : '.');
+ (FLAGS & 040) ? '1' : '.',
+ (FLAGS & 020) ? '2' : '.',
+ (FLAGS & 010) ? '3' : '.',
+ (FLAGS & 004) ? '4' : '.',
+ (FLAGS & 002) ? '5' : '.',
+ (FLAGS & 001) ? '6' : '.',
+ (SENSE_SW & 040) ? '1' : '.',
+ (SENSE_SW & 020) ? '2' : '.',
+ (SENSE_SW & 010) ? '3' : '.',
+ (SENSE_SW & 004) ? '4' : '.',
+ (SENSE_SW & 002) ? '5' : '.',
+ (SENSE_SW & 001) ? '6' : '.');
break;
- case CPUINFO_STR_REGISTER + PDP1_PC: sprintf(info->s, "PC:0%06o(%04X)", PC, PC); break;
- case CPUINFO_STR_REGISTER + PDP1_IR: sprintf(info->s, "IR:0%02o", IR); break;
- case CPUINFO_STR_REGISTER + PDP1_MB: sprintf(info->s, "MB:0%06o", MB); break;
- case CPUINFO_STR_REGISTER + PDP1_MA: sprintf(info->s, "MA:0%06o", MA); break;
- case CPUINFO_STR_REGISTER + PDP1_AC: sprintf(info->s, "AC:0%06o", AC); break;
- case CPUINFO_STR_REGISTER + PDP1_IO: sprintf(info->s, "IO:0%06o", IO); break;
- case CPUINFO_STR_REGISTER + PDP1_OV: sprintf(info->s, "OV:%X", OV); break;
- case CPUINFO_STR_REGISTER + PDP1_PF: sprintf(info->s, "FLAGS:0%02o", FLAGS); break;
- case CPUINFO_STR_REGISTER + PDP1_PF1: sprintf(info->s, "FLAG1:%X", READFLAG(1)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF2: sprintf(info->s, "FLAG2:%X", READFLAG(2)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF3: sprintf(info->s, "FLAG3:%X", READFLAG(3)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF4: sprintf(info->s, "FLAG4:%X", READFLAG(4)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF5: sprintf(info->s, "FLAG5:%X", READFLAG(5)); break;
- case CPUINFO_STR_REGISTER + PDP1_PF6: sprintf(info->s, "FLAG6:%X", READFLAG(6)); break;
- case CPUINFO_STR_REGISTER + PDP1_TA: sprintf(info->s, "TA:0%06o", cpustate->ta); break;
- case CPUINFO_STR_REGISTER + PDP1_TW: sprintf(info->s, "TW:0%06o", cpustate->tw); break;
- case CPUINFO_STR_REGISTER + PDP1_SS: sprintf(info->s, "SS:0%02o", SENSE_SW); break;
- case CPUINFO_STR_REGISTER + PDP1_SS1: sprintf(info->s, "SENSE1:%X", READSENSE(1)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS2: sprintf(info->s, "SENSE2:%X", READSENSE(2)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS3: sprintf(info->s, "SENSE3:%X", READSENSE(3)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS4: sprintf(info->s, "SENSE4:%X", READSENSE(4)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS5: sprintf(info->s, "SENSE5:%X", READSENSE(5)); break;
- case CPUINFO_STR_REGISTER + PDP1_SS6: sprintf(info->s, "SENSE6:%X", READSENSE(6)); break;
- case CPUINFO_STR_REGISTER + PDP1_SNGL_STEP: sprintf(info->s, "SNGLSTEP:%X", cpustate->sngl_step); break;
- case CPUINFO_STR_REGISTER + PDP1_SNGL_INST: sprintf(info->s, "SNGLINST:%X", cpustate->sngl_inst); break;
- case CPUINFO_STR_REGISTER + PDP1_EXTEND_SW: sprintf(info->s, "EXS:%X", cpustate->extend_sw); break;
- case CPUINFO_STR_REGISTER + PDP1_RUN: sprintf(info->s, "RUN:%X", cpustate->run); break;
- case CPUINFO_STR_REGISTER + PDP1_CYC: sprintf(info->s, "CYC:%X", cpustate->cycle); break;
- case CPUINFO_STR_REGISTER + PDP1_DEFER: sprintf(info->s, "DF:%X", cpustate->defer); break;
- case CPUINFO_STR_REGISTER + PDP1_BRK_CTR: sprintf(info->s, "BRKCTR:%X", cpustate->brk_ctr); break;
- case CPUINFO_STR_REGISTER + PDP1_RIM: sprintf(info->s, "RIM:%X", cpustate->rim); break;
- case CPUINFO_STR_REGISTER + PDP1_SBM: sprintf(info->s, "SBM:%X", cpustate->sbm); break;
- case CPUINFO_STR_REGISTER + PDP1_EXD: sprintf(info->s, "EXD:%X", EXD); break;
- case CPUINFO_STR_REGISTER + PDP1_IOC: sprintf(info->s, "IOC:%X", cpustate->ioc); break;
- case CPUINFO_STR_REGISTER + PDP1_IOH: sprintf(info->s, "IOH:%X", cpustate->ioh); break;
- case CPUINFO_STR_REGISTER + PDP1_IOS: sprintf(info->s, "IOS:%X", cpustate->ios); break;
- case CPUINFO_IS_OCTAL: info->i = true; break;
+ case CPUINFO_STR_REGISTER + PDP1_PC: sprintf(info->s, "PC:0%06o(%04X)", PC, PC); break;
+ case CPUINFO_STR_REGISTER + PDP1_IR: sprintf(info->s, "IR:0%02o", IR); break;
+ case CPUINFO_STR_REGISTER + PDP1_MB: sprintf(info->s, "MB:0%06o", MB); break;
+ case CPUINFO_STR_REGISTER + PDP1_MA: sprintf(info->s, "MA:0%06o", MA); break;
+ case CPUINFO_STR_REGISTER + PDP1_AC: sprintf(info->s, "AC:0%06o", AC); break;
+ case CPUINFO_STR_REGISTER + PDP1_IO: sprintf(info->s, "IO:0%06o", IO); break;
+ case CPUINFO_STR_REGISTER + PDP1_OV: sprintf(info->s, "OV:%X", OV); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF: sprintf(info->s, "FLAGS:0%02o", FLAGS); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF1: sprintf(info->s, "FLAG1:%X", READFLAG(1)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF2: sprintf(info->s, "FLAG2:%X", READFLAG(2)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF3: sprintf(info->s, "FLAG3:%X", READFLAG(3)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF4: sprintf(info->s, "FLAG4:%X", READFLAG(4)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF5: sprintf(info->s, "FLAG5:%X", READFLAG(5)); break;
+ case CPUINFO_STR_REGISTER + PDP1_PF6: sprintf(info->s, "FLAG6:%X", READFLAG(6)); break;
+ case CPUINFO_STR_REGISTER + PDP1_TA: sprintf(info->s, "TA:0%06o", cpustate->ta); break;
+ case CPUINFO_STR_REGISTER + PDP1_TW: sprintf(info->s, "TW:0%06o", cpustate->tw); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS: sprintf(info->s, "SS:0%02o", SENSE_SW); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS1: sprintf(info->s, "SENSE1:%X", READSENSE(1)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS2: sprintf(info->s, "SENSE2:%X", READSENSE(2)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS3: sprintf(info->s, "SENSE3:%X", READSENSE(3)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS4: sprintf(info->s, "SENSE4:%X", READSENSE(4)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS5: sprintf(info->s, "SENSE5:%X", READSENSE(5)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SS6: sprintf(info->s, "SENSE6:%X", READSENSE(6)); break;
+ case CPUINFO_STR_REGISTER + PDP1_SNGL_STEP: sprintf(info->s, "SNGLSTEP:%X", cpustate->sngl_step); break;
+ case CPUINFO_STR_REGISTER + PDP1_SNGL_INST: sprintf(info->s, "SNGLINST:%X", cpustate->sngl_inst); break;
+ case CPUINFO_STR_REGISTER + PDP1_EXTEND_SW: sprintf(info->s, "EXS:%X", cpustate->extend_sw); break;
+ case CPUINFO_STR_REGISTER + PDP1_RUN: sprintf(info->s, "RUN:%X", cpustate->run); break;
+ case CPUINFO_STR_REGISTER + PDP1_CYC: sprintf(info->s, "CYC:%X", cpustate->cycle); break;
+ case CPUINFO_STR_REGISTER + PDP1_DEFER: sprintf(info->s, "DF:%X", cpustate->defer); break;
+ case CPUINFO_STR_REGISTER + PDP1_BRK_CTR: sprintf(info->s, "BRKCTR:%X", cpustate->brk_ctr); break;
+ case CPUINFO_STR_REGISTER + PDP1_RIM: sprintf(info->s, "RIM:%X", cpustate->rim); break;
+ case CPUINFO_STR_REGISTER + PDP1_SBM: sprintf(info->s, "SBM:%X", cpustate->sbm); break;
+ case CPUINFO_STR_REGISTER + PDP1_EXD: sprintf(info->s, "EXD:%X", EXD); break;
+ case CPUINFO_STR_REGISTER + PDP1_IOC: sprintf(info->s, "IOC:%X", cpustate->ioc); break;
+ case CPUINFO_STR_REGISTER + PDP1_IOH: sprintf(info->s, "IOH:%X", cpustate->ioh); break;
+ case CPUINFO_STR_REGISTER + PDP1_IOS: sprintf(info->s, "IOS:%X", cpustate->ios); break;
+ case CPUINFO_IS_OCTAL: info->i = true; break;
}
}
@@ -1099,42 +1099,42 @@ static void execute_instruction(pdp1_state *cpustate)
{
switch (IR)
{
- case AND: /* Logical And */
+ case AND: /* Logical And */
AC &= (MB = READ_PDP_18BIT(MA));
break;
- case IOR: /* Inclusive Or */
+ case IOR: /* Inclusive Or */
AC |= (MB = READ_PDP_18BIT(MA));
break;
- case XOR: /* Exclusive Or */
+ case XOR: /* Exclusive Or */
AC ^= (MB = READ_PDP_18BIT(MA));
break;
- case XCT: /* Execute */
+ case XCT: /* Execute */
MB = READ_PDP_18BIT(MA);
- IR = MB >> 13; /* basic opcode */
+ IR = MB >> 13; /* basic opcode */
if ((instruction_kind[IR] & 1) && (MB & 010000))
{
cpustate->defer = 1;
- /*cpustate->cycle = 1;*/ /* instruction shall be executed later */
- goto no_fetch; /* fall through to next instruction */
+ /*cpustate->cycle = 1;*/ /* instruction shall be executed later */
+ goto no_fetch; /* fall through to next instruction */
}
else if (instruction_kind[IR] & 2)
{
- /*cpustate->cycle = 1;*/ /* instruction shall be executed later */
- goto no_fetch; /* fall through to next instruction */
+ /*cpustate->cycle = 1;*/ /* instruction shall be executed later */
+ goto no_fetch; /* fall through to next instruction */
}
else
- execute_instruction(cpustate); /* execute instruction at once */
+ execute_instruction(cpustate); /* execute instruction at once */
break;
- case CALJDA: /* Call subroutine and Jump and Deposit Accumulator instructions */
+ case CALJDA: /* Call subroutine and Jump and Deposit Accumulator instructions */
if (MB & 010000)
/* JDA */
MA = (PC & ADDRESS_EXTENSION_MASK) | (MB & BASE_ADDRESS_MASK);
else
/* CAL: equivalent to JDA 100 */
/* Note that I cannot tell for sure what happens to extension bits, but I did notice
- that setting the extension bits to 0 would make cal basically useless, since
- there would be no simple way the call routine could return to the callee
- if it were located in another module with extend mode off (i.e. exd == 0). */
+ that setting the extension bits to 0 would make cal basically useless, since
+ there would be no simple way the call routine could return to the callee
+ if it were located in another module with extend mode off (i.e. exd == 0). */
MA = (PC & ADDRESS_EXTENSION_MASK) | 0100;
WRITE_PDP_18BIT(MA, (MB = AC));
@@ -1142,57 +1142,57 @@ static void execute_instruction(pdp1_state *cpustate)
AC = (OV << 17) | (EXD << 16) | PC;
PC = MA;
break;
- case LAC: /* Load Accumulator */
+ case LAC: /* Load Accumulator */
AC = (MB = READ_PDP_18BIT(MA));
break;
- case LIO: /* Load i/o register */
+ case LIO: /* Load i/o register */
IO = (MB = READ_PDP_18BIT(MA));
break;
- case DAC: /* Deposit Accumulator */
+ case DAC: /* Deposit Accumulator */
WRITE_PDP_18BIT(MA, (MB = AC));
break;
- case DAP: /* Deposit Address Part */
+ case DAP: /* Deposit Address Part */
WRITE_PDP_18BIT(MA, (MB = ((READ_PDP_18BIT(MA) & 0770000) | (AC & 0007777))));
break;
- case DIP: /* Deposit Instruction Part */
+ case DIP: /* Deposit Instruction Part */
WRITE_PDP_18BIT(MA, (MB = ((READ_PDP_18BIT(MA) & 0007777) | (AC & 0770000))));
break;
- case DIO: /* Deposit I/O Register */
+ case DIO: /* Deposit I/O Register */
WRITE_PDP_18BIT(MA, (MB = IO));
break;
- case DZM: /* Deposit Zero in Memory */
+ case DZM: /* Deposit Zero in Memory */
WRITE_PDP_18BIT(MA, (MB = 0));
break;
- case ADD: /* Add */
+ case ADD: /* Add */
{
/* overflow is set if the 2 operands have the same sign and the final result has another */
- int ov2; /* 1 if the operands have the same sign*/
+ int ov2; /* 1 if the operands have the same sign*/
MB = READ_PDP_18BIT(MA);
ov2 = ((AC & 0400000) == (MB & 0400000));
AC = AC + MB;
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
/* I think we need to check for overflow before checking for -0,
- because the sum -0+-0 = -0 = +0 would generate an overflow
- otherwise. */
+ because the sum -0+-0 = -0 = +0 would generate an overflow
+ otherwise. */
if (ov2 && ((AC & 0400000) != (MB & 0400000)))
OV = 1;
- if (AC == 0777777) /* check for -0 */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
break;
}
- case SUB: /* Subtract */
- { /* maintainance manual 7-14 seems to imply that substract does not test for -0.
+ case SUB: /* Subtract */
+ { /* maintainance manual 7-14 seems to imply that substract does not test for -0.
The sim 2.3 source says so explicitely, though they do not give a reference.
It sounds a bit weird, but the reason is probably that doing so would
require additionnal logic that does not exist. */
/* overflow is set if the 2 operands have the same sign and the final result has another */
- int ov2; /* 1 if the operands have the same sign*/
+ int ov2; /* 1 if the operands have the same sign*/
AC ^= 0777777;
@@ -1201,7 +1201,7 @@ static void execute_instruction(pdp1_state *cpustate)
ov2 = ((AC & 0400000) == (MB & 0400000));
AC = AC + MB;
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
if (ov2 && ((AC & 0400000) != (MB & 0400000)))
OV = 1;
@@ -1210,12 +1210,12 @@ static void execute_instruction(pdp1_state *cpustate)
break;
}
- case IDX: /* Index */
+ case IDX: /* Index */
AC = READ_PDP_18BIT(MA) + 1;
#if 0
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
#else
if (AC >= 0777777)
@@ -1224,12 +1224,12 @@ static void execute_instruction(pdp1_state *cpustate)
WRITE_PDP_18BIT(MA, (MB = AC));
break;
- case ISP: /* Index and Skip if Positive */
+ case ISP: /* Index and Skip if Positive */
AC = READ_PDP_18BIT(MA) + 1;
#if 0
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
#else
if (AC >= 0777777)
@@ -1240,20 +1240,20 @@ static void execute_instruction(pdp1_state *cpustate)
if ((AC & 0400000) == 0)
INCREMENT_PC;
break;
- case SAD: /* Skip if Accumulator and Y differ */
+ case SAD: /* Skip if Accumulator and Y differ */
if (AC != (MB = READ_PDP_18BIT(MA)))
INCREMENT_PC;
break;
- case SAS: /* Skip if Accumulator and Y are the same */
+ case SAS: /* Skip if Accumulator and Y are the same */
if (AC == (MB = READ_PDP_18BIT(MA)))
INCREMENT_PC;
break;
- case MUS_MUL: /* Multiply Step or Multiply */
+ case MUS_MUL: /* Multiply Step or Multiply */
if (cpustate->hw_mul_div)
- { /* MUL */
+ { /* MUL */
int scr;
int smb, srm;
- double etime = 4.; /* approximative */
+ double etime = 4.; /* approximative */
IO = MB = AC;
MB = READ_PDP_18BIT(MA);
@@ -1282,7 +1282,7 @@ static void execute_instruction(pdp1_state *cpustate)
AC = AC + MB;
/* we can save carry around since both numbers are positive */
/*AC = (AC + (AC >> 18)) & 0777777;*/
- etime += .65; /* approximative */
+ etime += .65; /* approximative */
}
IO = (IO >> 1) | ((AC & 1) << 17);
AC = AC >> 1;
@@ -1294,43 +1294,43 @@ static void execute_instruction(pdp1_state *cpustate)
IO = IO ^ 0777777;
}
- cpustate->icount -= etime+.5; /* round to closest */
+ cpustate->icount -= etime+.5; /* round to closest */
}
else
- { /* MUS */
+ { /* MUS */
/* should we check for -0??? (Maintainance manual 7-14 seems to imply we should not:
- as a matter of fact, since the MUS instruction is supposed to have positive operands,
- there is no need to check for -0, therefore such a simplification does not sound
- absurd.) */
+ as a matter of fact, since the MUS instruction is supposed to have positive operands,
+ there is no need to check for -0, therefore such a simplification does not sound
+ absurd.) */
if ((IO & 1) == 1)
{
AC = AC + (MB = READ_PDP_18BIT(MA));
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
}
IO = (IO >> 1 | AC << 17) & 0777777;
AC >>= 1;
}
break;
- case DIS_DIV: /* Divide Step or Divide */
+ case DIS_DIV: /* Divide Step or Divide */
if (cpustate->hw_mul_div)
- { /* DIV */
+ { /* DIV */
/* As a side note, the order of -0 detection and overflow checking does not matter,
- because the sum of two positive number cannot give 0777777 (since positive
- numbers are 0377777 at most, their sum is 0777776 at most).
- Additionnally, we cannot have carry set and a result equal to 0777777 (since numbers
- are 0777777 at most, their sum is 01777776 at most): this is nice, because it makes
- the sequence:
- AC = (AC + (AC >> 18)) & 0777777; // propagate carry around
- if (AC == 0777777) // check for -0
- AC = 0;
- equivalent to:
- if (AC >= 0777777)
- AC = (AC + 1) & 0777777;
- which is a bit more efficient. */
+ because the sum of two positive number cannot give 0777777 (since positive
+ numbers are 0377777 at most, their sum is 0777776 at most).
+ Additionnally, we cannot have carry set and a result equal to 0777777 (since numbers
+ are 0777777 at most, their sum is 01777776 at most): this is nice, because it makes
+ the sequence:
+ AC = (AC + (AC >> 18)) & 0777777; // propagate carry around
+ if (AC == 0777777) // check for -0
+ AC = 0;
+ equivalent to:
+ if (AC >= 0777777)
+ AC = (AC + 1) & 0777777;
+ which is a bit more efficient. */
int acl;
int scr;
int smb, srm;
- double etime = 0; /* approximative */
+ double etime = 0; /* approximative */
MB = READ_PDP_18BIT(MA);
scr = 0;
@@ -1355,8 +1355,8 @@ static void execute_instruction(pdp1_state *cpustate)
{
AC = (AC + MB);
#if 1
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
#else
if (AC >= 0777777)
@@ -1381,14 +1381,14 @@ static void execute_instruction(pdp1_state *cpustate)
{
AC++;
AC = (AC + (AC >> 18)) & 0777777;
- etime += .6; /* approximative */
+ etime += .6; /* approximative */
}
}
AC = (AC + MB);
#if 1
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
#else
if (AC >= 0777777)
@@ -1415,14 +1415,14 @@ static void execute_instruction(pdp1_state *cpustate)
IO = MB;
}
if (scr)
- etime += 20; /* approximative */
+ etime += 20; /* approximative */
else
- etime += 2; /* approximative */
+ etime += 2; /* approximative */
- cpustate->icount -= etime+.5; /* round to closest */
+ cpustate->icount -= etime+.5; /* round to closest */
}
else
- { /* DIS */
+ { /* DIS */
int acl;
acl = AC >> 17;
@@ -1433,35 +1433,35 @@ static void execute_instruction(pdp1_state *cpustate)
AC += (MB ^ 0777777);
else
/* Note that if AC+MB = 0777777, we are in trouble. I don't
- know how a real PDP-1 behaves in this case. */
+ know how a real PDP-1 behaves in this case. */
AC += MB + 1;
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
}
break;
- case JMP: /* Jump */
+ case JMP: /* Jump */
if (cpustate->exc)
PC = MB & EXTENDED_ADDRESS_MASK;
else
PC = (MA & ADDRESS_EXTENSION_MASK) | (MB & BASE_ADDRESS_MASK);
break;
- case JSP: /* Jump and Save Program Counter */
+ case JSP: /* Jump and Save Program Counter */
AC = (OV << 17) | (EXD << 16) | PC;
if (cpustate->exc)
PC = MB & EXTENDED_ADDRESS_MASK;
else
PC = (MA & ADDRESS_EXTENSION_MASK) | (MB & BASE_ADDRESS_MASK);
break;
- case SKP: /* Skip Instruction Group */
+ case SKP: /* Skip Instruction Group */
{
- int cond = ((MB & 0100) && (AC == 0)) /* ZERO Accumulator */
- || ((MB & 0200) && (AC >> 17 == 0)) /* Plus Accumulator */
- || ((MB & 0400) && (AC >> 17 == 1)) /* Minus Accumulator */
- || ((MB & 01000) && (OV == 0)) /* ZERO Overflow */
- || ((MB & 02000) && (IO >> 17 == 0)) /* Plus I/O Register */
- || (((MB & 7) != 0) && (((MB & 7) == 7) ? ! FLAGS : ! READFLAG(MB & 7))) /* ZERO Flag (deleted by mistake in PDP-1 handbook) */
- || (((MB & 070) != 0) && (((MB & 070) == 070) ? ! SENSE_SW : ! READSENSE((MB & 070) >> 3))); /* ZERO Switch */
+ int cond = ((MB & 0100) && (AC == 0)) /* ZERO Accumulator */
+ || ((MB & 0200) && (AC >> 17 == 0)) /* Plus Accumulator */
+ || ((MB & 0400) && (AC >> 17 == 1)) /* Minus Accumulator */
+ || ((MB & 01000) && (OV == 0)) /* ZERO Overflow */
+ || ((MB & 02000) && (IO >> 17 == 0)) /* Plus I/O Register */
+ || (((MB & 7) != 0) && (((MB & 7) == 7) ? ! FLAGS : ! READFLAG(MB & 7))) /* ZERO Flag (deleted by mistake in PDP-1 handbook) */
+ || (((MB & 070) != 0) && (((MB & 070) == 070) ? ! SENSE_SW : ! READSENSE((MB & 070) >> 3))); /* ZERO Switch */
if (! (MB & 010000))
{
@@ -1477,11 +1477,11 @@ static void execute_instruction(pdp1_state *cpustate)
OV = 0;
break;
}
- case SFT: /* Shift Instruction Group */
+ case SFT: /* Shift Instruction Group */
{
/* Bit 5 specifies direction of shift, Bit 6 specifies the character of the shift
- (arithmetic or logical), Bits 7 and 8 enable the registers (01 = AC, 10 = IO,
- and 11 = both) and Bits 9 through 17 specify the number of steps. */
+ (arithmetic or logical), Bits 7 and 8 enable the registers (01 = AC, 10 = IO,
+ and 11 = both) and Bits 9 through 17 specify the number of steps. */
int nshift = 0;
int mask = MB & 0777;
@@ -1494,15 +1494,15 @@ static void execute_instruction(pdp1_state *cpustate)
{
int i;
- case 1: /* ral rotate accumulator left */
+ case 1: /* ral rotate accumulator left */
for (i = 0; i < nshift; i++)
AC = (AC << 1 | AC >> 17) & 0777777;
break;
- case 2: /* ril rotate i/o register left */
+ case 2: /* ril rotate i/o register left */
for (i = 0; i < nshift; i++)
IO = (IO << 1 | IO >> 17) & 0777777;
break;
- case 3: /* rcl rotate AC and IO left */
+ case 3: /* rcl rotate AC and IO left */
for (i = 0; i < nshift; i++)
{
int tmp = AC;
@@ -1511,32 +1511,32 @@ static void execute_instruction(pdp1_state *cpustate)
IO = (IO << 1 | tmp >> 17) & 0777777;
}
break;
- case 5: /* sal shift accumulator left */
+ case 5: /* sal shift accumulator left */
for (i = 0; i < nshift; i++)
AC = ((AC << 1 | AC >> 17) & 0377777) + (AC & 0400000);
break;
- case 6: /* sil shift i/o register left */
+ case 6: /* sil shift i/o register left */
for (i = 0; i < nshift; i++)
IO = ((IO << 1 | IO >> 17) & 0377777) + (IO & 0400000);
break;
- case 7: /* scl shift AC and IO left */
+ case 7: /* scl shift AC and IO left */
for (i = 0; i < nshift; i++)
{
int tmp = AC;
- AC = ((AC << 1 | IO >> 17) & 0377777) + (AC & 0400000); /* shouldn't that be IO?, no it is the sign! */
+ AC = ((AC << 1 | IO >> 17) & 0377777) + (AC & 0400000); /* shouldn't that be IO?, no it is the sign! */
IO = (IO << 1 | tmp >> 17) & 0777777;
}
break;
- case 9: /* rar rotate accumulator right */
+ case 9: /* rar rotate accumulator right */
for (i = 0; i < nshift; i++)
AC = (AC >> 1 | AC << 17) & 0777777;
break;
- case 10: /* rir rotate i/o register right */
+ case 10: /* rir rotate i/o register right */
for (i = 0; i < nshift; i++)
IO = (IO >> 1 | IO << 17) & 0777777;
break;
- case 11: /* rcr rotate AC and IO right */
+ case 11: /* rcr rotate AC and IO right */
for (i = 0; i < nshift; i++)
{
int tmp = AC;
@@ -1545,20 +1545,20 @@ static void execute_instruction(pdp1_state *cpustate)
IO = (IO >> 1 | tmp << 17) & 0777777;
}
break;
- case 13: /* sar shift accumulator right */
+ case 13: /* sar shift accumulator right */
for (i = 0; i < nshift; i++)
AC = (AC >> 1) + (AC & 0400000);
break;
- case 14: /* sir shift i/o register right */
+ case 14: /* sir shift i/o register right */
for (i = 0; i < nshift; i++)
IO = (IO >> 1) + (IO & 0400000);
break;
- case 15: /* scr shift AC and IO right */
+ case 15: /* scr shift AC and IO right */
for (i = 0; i < nshift; i++)
{
int tmp = AC;
- AC = (AC >> 1) + (AC & 0400000); /* shouldn't that be IO, no it is the sign */
+ AC = (AC >> 1) + (AC & 0400000); /* shouldn't that be IO, no it is the sign */
IO = (IO >> 1 | tmp << 17) & 0777777;
}
break;
@@ -1569,71 +1569,71 @@ static void execute_instruction(pdp1_state *cpustate)
}
break;
}
- case LAW: /* Load Accumulator with N */
+ case LAW: /* Load Accumulator with N */
AC = MB & 07777;
if (MB & 010000)
AC ^= 0777777;
break;
- case IOT: /* In-Out Transfer Instruction Group */
+ case IOT: /* In-Out Transfer Instruction Group */
/*
- The variations within this group of instructions perform all the in-out control
- and information transfer functions. If Bit 5 (normally the Indirect Address bit)
- is a ONE, the computer will enter a special waiting state until the completion pulse
- from the activated device has returned. When this device delivers its completion,
- the computer will resume operation of the instruction sequence.
-
- The computer may be interrupted from the special waiting state to serve a sequence
- break request or a high speed channel request.
-
- Most in-out operations require a known minimum time before completion. This time
- may be utilized for programming. The appropriate In-Out Transfer can be given with
- no in-out wait (Bit 5 a ZERO and Bit 6 a ONE). The instruction sequence then
- continues. This sequence must include an iot instruction 730000 which performs
- nothing but the in-out wait. The computer will then enter the special waiting state
- until the device returns the in-out restart pulse. If the device has already
- returned the completion pulse before the instruction 730000, the computer will
- proceed immediately.
-
- Bit 6 determines whether a completion pulse will or will not be received from
- the in-out device. When it is different than Bit 5, a completion pulse will be
- received. When it is the same as Bit 5, a completion pulse will not be received.
-
- In addition to the control function of Bits 5 and 6, Bits 7 through 11 are also
- used as control bits serving to extend greatly the power of the iot instructions.
- For example, Bits 12 through 17, which are used to designate a class of input or
- output devices such as typewriters, may be further defined by Bits 7 through 11
- as referring to Typewriter 1, 2, 3, etc. In several of the optional in-out devices,
- in particular the magnetic tape, Bits 7 through 11 specify particular functions
- such as forward, backward etc. If a large number of specialized devices are to
- be attached, these bits may be used to further the in-out transfer instruction
- to perform totally distinct functions.
-
- Note that ioc is supposed to be set at the beggining of the memory cycle after
- ioh is cleared.
- However, we cannot set ioc at the beggining of every memory cycle as we
- did before, because it breaks in the following case:
- a) IOT instruction enables IO wait
- b) sequence break in the middle of IO-halt
- c) ioh is cleared in middle of sequence break routine
- d) re-execute IOT instruction. Unfortunately, ioc has been cleared, therefore
- we perform an IOT command pulse and IO wait again, which is completely WRONG.
- Therefore ioc is cleared only after a IOT with wait is executed.
- */
+ The variations within this group of instructions perform all the in-out control
+ and information transfer functions. If Bit 5 (normally the Indirect Address bit)
+ is a ONE, the computer will enter a special waiting state until the completion pulse
+ from the activated device has returned. When this device delivers its completion,
+ the computer will resume operation of the instruction sequence.
+
+ The computer may be interrupted from the special waiting state to serve a sequence
+ break request or a high speed channel request.
+
+ Most in-out operations require a known minimum time before completion. This time
+ may be utilized for programming. The appropriate In-Out Transfer can be given with
+ no in-out wait (Bit 5 a ZERO and Bit 6 a ONE). The instruction sequence then
+ continues. This sequence must include an iot instruction 730000 which performs
+ nothing but the in-out wait. The computer will then enter the special waiting state
+ until the device returns the in-out restart pulse. If the device has already
+ returned the completion pulse before the instruction 730000, the computer will
+ proceed immediately.
+
+ Bit 6 determines whether a completion pulse will or will not be received from
+ the in-out device. When it is different than Bit 5, a completion pulse will be
+ received. When it is the same as Bit 5, a completion pulse will not be received.
+
+ In addition to the control function of Bits 5 and 6, Bits 7 through 11 are also
+ used as control bits serving to extend greatly the power of the iot instructions.
+ For example, Bits 12 through 17, which are used to designate a class of input or
+ output devices such as typewriters, may be further defined by Bits 7 through 11
+ as referring to Typewriter 1, 2, 3, etc. In several of the optional in-out devices,
+ in particular the magnetic tape, Bits 7 through 11 specify particular functions
+ such as forward, backward etc. If a large number of specialized devices are to
+ be attached, these bits may be used to further the in-out transfer instruction
+ to perform totally distinct functions.
+
+ Note that ioc is supposed to be set at the beggining of the memory cycle after
+ ioh is cleared.
+ However, we cannot set ioc at the beggining of every memory cycle as we
+ did before, because it breaks in the following case:
+ a) IOT instruction enables IO wait
+ b) sequence break in the middle of IO-halt
+ c) ioh is cleared in middle of sequence break routine
+ d) re-execute IOT instruction. Unfortunately, ioc has been cleared, therefore
+ we perform an IOT command pulse and IO wait again, which is completely WRONG.
+ Therefore ioc is cleared only after a IOT with wait is executed.
+ */
if (MB & 010000)
- { /* IOT with IO wait */
+ { /* IOT with IO wait */
if (cpustate->ioc)
- { /* the iot command line is pulsed only if ioc is asserted */
+ { /* the iot command line is pulsed only if ioc is asserted */
(*cpustate->extern_iot[MB & 0000077])(cpustate->device, MB & 0000077, (MB & 0004000) == 0, MB, &IO, AC);
- cpustate->ioh = 1; /* enable io wait */
+ cpustate->ioh = 1; /* enable io wait */
- cpustate->ioc = 0; /* actually happens at the start of next memory cycle */
+ cpustate->ioc = 0; /* actually happens at the start of next memory cycle */
/* test ios now in case the IOT callback has sent a completion pulse immediately */
if (cpustate->ioh && cpustate->ios)
{
/* ioh should be cleared at the end of the instruction cycle, and ios at the
- start of next instruction cycle, but who cares? */
+ start of next instruction cycle, but who cares? */
cpustate->ioh = 0;
cpustate->ios = 0;
}
@@ -1642,24 +1642,24 @@ static void execute_instruction(pdp1_state *cpustate)
if (cpustate->ioh)
DECREMENT_PC;
else
- cpustate->ioc = 1; /* actually happens at the start of next memory cycle */
+ cpustate->ioc = 1; /* actually happens at the start of next memory cycle */
}
else
- { /* IOT with no IO wait */
+ { /* IOT with no IO wait */
(*cpustate->extern_iot[MB & 0000077])(cpustate->device, MB & 0000077, (MB & 0004000) != 0, MB, &IO, AC);
}
break;
- case OPR: /* Operate Instruction Group */
+ case OPR: /* Operate Instruction Group */
{
int nflag;
- if (MB & 00200) /* clear AC */
+ if (MB & 00200) /* clear AC */
AC = 0;
- if (MB & 04000) /* clear I/O register */
+ if (MB & 04000) /* clear I/O register */
IO = 0;
- if (MB & 02000) /* load Accumulator from Test Word */
+ if (MB & 02000) /* load Accumulator from Test Word */
AC |= cpustate->tw;
- if (MB & 00100) /* load Accumulator with Program Counter */
+ if (MB & 00100) /* load Accumulator with Program Counter */
AC |= (OV << 17) | (EXD << 16) | PC;
nflag = MB & 7;
if (nflag)
@@ -1669,9 +1669,9 @@ static void execute_instruction(pdp1_state *cpustate)
else
WRITEFLAG(nflag, (MB & 010) ? 1 : 0);
}
- if (MB & 01000) /* Complement AC */
+ if (MB & 01000) /* Complement AC */
AC ^= 0777777;
- if (MB & 00400) /* Halt */
+ if (MB & 00400) /* Halt */
{
if (LOG_EXTRA)
logerror("PDP1 Program executed HALT: at 0%06o\n", PREVIOUS_PC);
@@ -1702,7 +1702,7 @@ static void null_iot(device_t *device, int op2, int nac, int mb, int *io, int ac
{
pdp1_state *cpustate = get_safe_token(device);
/* Note that the dummy IOT 0 is used to wait for the completion pulse
- generated by the a pending IOT (IOT with completion pulse but no IO wait) */
+ generated by the a pending IOT (IOT with completion pulse but no IO wait) */
if (LOG_IOT_EXTRA)
{
if (op2 == 000)
@@ -1724,7 +1724,7 @@ static void null_iot(device_t *device, int op2, int nac, int mb, int *io, int ac
static void lem_eem_iot(device_t *device, int op2, int nac, int mb, int *io, int ac)
{
pdp1_state *cpustate = get_safe_token(device);
- if (! cpustate->extend_support) /* extend mode supported? */
+ if (! cpustate->extend_support) /* extend mode supported? */
{
if (LOG)
logerror("Ignoring internal error in file " __FILE__ " line %d.\n", __LINE__);
@@ -1750,21 +1750,21 @@ static void sbs_iot(device_t *device, int op2, int nac, int mb, int *io, int ac)
pdp1_state *cpustate = get_safe_token(device);
switch (op2)
{
- case 054: /* LSM */
+ case 054: /* LSM */
if (LOG_EXTRA)
logerror("LSM instruction: mb=0%06o, pc=0%06o\n", mb, cpustate->pc);
cpustate->sbm = 0;
field_interrupt(cpustate);
break;
- case 055: /* ESM */
+ case 055: /* ESM */
if (LOG_EXTRA)
logerror("ESM instruction: mb=0%06o, pc=0%06o\n", mb, cpustate->pc);
cpustate->sbm = 1;
field_interrupt(cpustate);
break;
- case 056: /* CBS */
+ case 056: /* CBS */
if (LOG_EXTRA)
logerror("CBS instruction: mb=0%06o, pc=0%06o\n", mb, cpustate->pc);
@@ -1793,7 +1793,7 @@ static void type_20_sbs_iot(device_t *device, int op2, int nac, int mb, int *io,
{
pdp1_state *cpustate = get_safe_token(device);
int channel, mask;
- if (! cpustate->type_20_sbs) /* type 20 sequence break system supported? */
+ if (! cpustate->type_20_sbs) /* type 20 sequence break system supported? */
{
if (LOG)
logerror("Ignoring internal error in file " __FILE__ " line %d.\n", __LINE__);
@@ -1803,28 +1803,28 @@ static void type_20_sbs_iot(device_t *device, int op2, int nac, int mb, int *io,
mask = 1 << channel;
switch (op2)
{
- case 050: /* DSC */
+ case 050: /* DSC */
if (LOG_EXTRA)
logerror("DSC instruction: mb=0%06o, pc=0%06o\n", mb, cpustate->pc);
cpustate->b1 &= ~mask;
field_interrupt(cpustate);
break;
- case 051: /* ASC */
+ case 051: /* ASC */
if (LOG_EXTRA)
logerror("ASC instruction: mb=0%06o, pc=0%06o\n", mb, cpustate->pc);
cpustate->b1 |= mask;
field_interrupt(cpustate);
break;
- case 052: /* ISB */
+ case 052: /* ISB */
if (LOG_EXTRA)
logerror("ISB instruction: mb=0%06o, pc=0%06o\n", mb, cpustate->pc);
cpustate->b2 |= mask;
field_interrupt(cpustate);
break;
- case 053: /* CAC */
+ case 053: /* CAC */
if (LOG_EXTRA)
logerror("CAC instruction: mb=0%06o, pc=0%06o\n", mb, cpustate->pc);
@@ -1849,36 +1849,36 @@ static void type_20_sbs_iot(device_t *device, int op2, int nac, int mb, int *io,
static void pulse_start_clear(pdp1_state *cpustate)
{
/* processor registers */
- PC = 0; /* according to maintainance manual p. 6-17 */
- IR = 0; /* according to maintainance manual p. 6-13 */
- /*MB = 0;*/ /* ??? */
- /*MA = 0;*/ /* ??? */
- /*AC = 0;*/ /* ??? */
- /*IO = 0;*/ /* ??? */
- /*PF = 0;*/ /* ??? */
+ PC = 0; /* according to maintainance manual p. 6-17 */
+ IR = 0; /* according to maintainance manual p. 6-13 */
+ /*MB = 0;*/ /* ??? */
+ /*MA = 0;*/ /* ??? */
+ /*AC = 0;*/ /* ??? */
+ /*IO = 0;*/ /* ??? */
+ /*PF = 0;*/ /* ??? */
/* processor state flip-flops */
- cpustate->run = 0; /* ??? */
- cpustate->cycle = 0; /* mere guess */
- cpustate->defer = 0; /* mere guess */
- cpustate->brk_ctr = 0; /* mere guess */
- cpustate->ov = 0; /* according to maintainance manual p. 7-18 */
- cpustate->rim = 0; /* ??? */
- cpustate->sbm = 0; /* ??? */
- EXD = 0; /* according to maintainance manual p. 8-16 */
- cpustate->exc = 0; /* according to maintainance manual p. 8-16 */
- cpustate->ioc = 1; /* according to maintainance manual p. 6-10 */
- cpustate->ioh = 0; /* according to maintainance manual p. 6-10 */
- cpustate->ios = 0; /* according to maintainance manual p. 6-10 */
-
- cpustate->b1 = cpustate->type_20_sbs ? 0 : 1; /* mere guess */
- cpustate->b2 = 0; /* mere guess */
- cpustate->b4 = 0; /* mere guess */
+ cpustate->run = 0; /* ??? */
+ cpustate->cycle = 0; /* mere guess */
+ cpustate->defer = 0; /* mere guess */
+ cpustate->brk_ctr = 0; /* mere guess */
+ cpustate->ov = 0; /* according to maintainance manual p. 7-18 */
+ cpustate->rim = 0; /* ??? */
+ cpustate->sbm = 0; /* ??? */
+ EXD = 0; /* according to maintainance manual p. 8-16 */
+ cpustate->exc = 0; /* according to maintainance manual p. 8-16 */
+ cpustate->ioc = 1; /* according to maintainance manual p. 6-10 */
+ cpustate->ioh = 0; /* according to maintainance manual p. 6-10 */
+ cpustate->ios = 0; /* according to maintainance manual p. 6-10 */
+
+ cpustate->b1 = cpustate->type_20_sbs ? 0 : 1; /* mere guess */
+ cpustate->b2 = 0; /* mere guess */
+ cpustate->b4 = 0; /* mere guess */
cpustate->rim_step = 0;
- cpustate->sbs_restore = 0; /* mere guess */
- cpustate->no_sequence_break = 0; /* mere guess */
+ cpustate->sbs_restore = 0; /* mere guess */
+ cpustate->no_sequence_break = 0; /* mere guess */
field_interrupt(cpustate);
diff --git a/src/emu/cpu/pdp1/pdp1.h b/src/emu/cpu/pdp1/pdp1.h
index e48216db0ea..d86793de6c1 100644
--- a/src/emu/cpu/pdp1/pdp1.h
+++ b/src/emu/cpu/pdp1/pdp1.h
@@ -15,12 +15,12 @@ enum
PDP1_SNGL_STEP, PDP1_SNGL_INST, PDP1_EXTEND_SW,
PDP1_RUN, PDP1_CYC, PDP1_DEFER, PDP1_BRK_CTR, PDP1_OV, PDP1_RIM, PDP1_SBM, PDP1_EXD,
PDP1_IOC, PDP1_IOH, PDP1_IOS,
- PDP1_START_CLEAR, /* hack, do not use directly, use pdp1_pulse_start_clear instead */
- PDP1_IO_COMPLETE /* hack, do not use directly, use pdp1_pulse_iot_done instead */
+ PDP1_START_CLEAR, /* hack, do not use directly, use pdp1_pulse_start_clear instead */
+ PDP1_IO_COMPLETE /* hack, do not use directly, use pdp1_pulse_iot_done instead */
};
-#define pdp1_pulse_start_clear(cpudevice) (cpudevice)->state().set_state_int(PDP1_START_CLEAR, (UINT64)0)
-#define pdp1_pulse_iot_done(cpudevice) (cpudevice)->state().set_state_int(PDP1_IO_COMPLETE, (UINT64)0)
+#define pdp1_pulse_start_clear(cpudevice) (cpudevice)->state().set_state_int(PDP1_START_CLEAR, (UINT64)0)
+#define pdp1_pulse_iot_done(cpudevice) (cpudevice)->state().set_state_int(PDP1_IO_COMPLETE, (UINT64)0)
typedef void (*pdp1_extern_iot_func)(device_t *device, int op2, int nac, int mb, int *io, int ac);
typedef void (*pdp1_read_binary_word_func)(device_t *device);
diff --git a/src/emu/cpu/pdp1/pdp1dasm.c b/src/emu/cpu/pdp1/pdp1dasm.c
index a712484537d..fccbc2664d9 100644
--- a/src/emu/cpu/pdp1/pdp1dasm.c
+++ b/src/emu/cpu/pdp1/pdp1dasm.c
@@ -26,7 +26,7 @@ CPU_DISASSEMBLE( pdp1 )
md = oprom[0] << 24 | oprom[1] << 16 | oprom[2] << 8 | oprom[3];
y = md & 07777;
- ib = (md >> 12) & 1; /* */
+ ib = (md >> 12) & 1; /* */
switch (md >> 13)
{
case AND:
diff --git a/src/emu/cpu/pdp1/tx0.c b/src/emu/cpu/pdp1/tx0.c
index a4e31b2099b..3f2bc7e2910 100644
--- a/src/emu/cpu/pdp1/tx0.c
+++ b/src/emu/cpu/pdp1/tx0.c
@@ -26,40 +26,40 @@ struct tx0_state
const tx0_reset_param_t *iface;
/* processor registers */
- int mbr; /* memory buffer register (18 bits) */
- int ac; /* accumulator (18 bits) */
- int mar; /* memory address register (16 (64kW) or 13 (8kW) bits) */
- int pc; /* program counter (16 (64kW) or 13 (8kW) bits) */
- int ir; /* instruction register (2 (64kW) or 5 (8kW) bits) */
- int lr; /* live register (18 bits) */
- int xr; /* index register (14 bits) (8kW only) */
- int pf; /* program flags (6 bits expandable to 10) (8kW only) */
+ int mbr; /* memory buffer register (18 bits) */
+ int ac; /* accumulator (18 bits) */
+ int mar; /* memory address register (16 (64kW) or 13 (8kW) bits) */
+ int pc; /* program counter (16 (64kW) or 13 (8kW) bits) */
+ int ir; /* instruction register (2 (64kW) or 5 (8kW) bits) */
+ int lr; /* live register (18 bits) */
+ int xr; /* index register (14 bits) (8kW only) */
+ int pf; /* program flags (6 bits expandable to 10) (8kW only) */
/* operator panel switches */
- int tbr; /* toggle switch buffer register (18 bits) */
- int tac; /* toggle switch accumulator (18 bits) */
- int tss[16]; /* toggle switch storage (18 bits * 16) */
- unsigned int cm_sel : 16; /* individual cm select (1 bit * 16) */
- unsigned int lr_sel : 16; /* individual lr select (1 bit * 16) */
+ int tbr; /* toggle switch buffer register (18 bits) */
+ int tac; /* toggle switch accumulator (18 bits) */
+ int tss[16]; /* toggle switch storage (18 bits * 16) */
+ unsigned int cm_sel : 16; /* individual cm select (1 bit * 16) */
+ unsigned int lr_sel : 16; /* individual lr select (1 bit * 16) */
unsigned int gbl_cm_sel : 1;/* global cm select (1 bit) */
- unsigned int stop_cyc0 : 1; /* stop on cycle 0 */
- unsigned int stop_cyc1 : 1; /* stop on cycle 1 */
+ unsigned int stop_cyc0 : 1; /* stop on cycle 0 */
+ unsigned int stop_cyc1 : 1; /* stop on cycle 1 */
/* processor state flip-flops */
- unsigned int run : 1; /* processor is running */
- unsigned int rim : 1; /* processor is in read-in mode */
- unsigned int cycle : 2; /* 0 -> fetch */
+ unsigned int run : 1; /* processor is running */
+ unsigned int rim : 1; /* processor is in read-in mode */
+ unsigned int cycle : 2; /* 0 -> fetch */
/* 1 -> execute (except for taken branches) */
/* 2 -> extra execute cycle for SXA and ADO */
- unsigned int ioh : 1; /* i-o halt: processor is executing an Input-Output Transfer wait */
- unsigned int ios : 1; /* i-o synchronizer: set on i-o operation completion */
+ unsigned int ioh : 1; /* i-o halt: processor is executing an Input-Output Transfer wait */
+ unsigned int ios : 1; /* i-o synchronizer: set on i-o operation completion */
/* additional emulator state variables */
- int rim_step; /* current step in rim execution */
+ int rim_step; /* current step in rim execution */
- int address_mask; /* address mask */
- int ir_mask; /* IR mask */
+ int address_mask; /* address mask */
+ int ir_mask; /* IR mask */
int icount;
@@ -71,7 +71,7 @@ INLINE tx0_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TX0_64KW ||
- device->type() == TX0_8KW);
+ device->type() == TX0_8KW);
return (tx0_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -81,20 +81,20 @@ INLINE tx0_state *get_safe_token(device_t *device)
#define io_handler_rim 3
-#define PC cpustate->pc
-#define IR cpustate->ir
-#define MBR cpustate->mbr
-#define MAR cpustate->mar
-#define AC cpustate->ac
-#define LR cpustate->lr
-#define XR cpustate->xr
-#define PF cpustate->pf
+#define PC cpustate->pc
+#define IR cpustate->ir
+#define MBR cpustate->mbr
+#define MAR cpustate->mar
+#define AC cpustate->ac
+#define LR cpustate->lr
+#define XR cpustate->xr
+#define PF cpustate->pf
-#define ADDRESS_MASK_64KW 0177777
-#define ADDRESS_MASK_8KW 0017777
+#define ADDRESS_MASK_64KW 0177777
+#define ADDRESS_MASK_8KW 0017777
-#define INCREMENT_PC_64KW (PC = (PC+1) & ADDRESS_MASK_64KW)
-#define INCREMENT_PC_8KW (PC = (PC+1) & ADDRESS_MASK_8KW)
+#define INCREMENT_PC_64KW (PC = (PC+1) & ADDRESS_MASK_64KW)
+#define INCREMENT_PC_8KW (PC = (PC+1) & ADDRESS_MASK_8KW)
static int tx0_read(tx0_state *cpustate, offs_t address)
@@ -155,7 +155,7 @@ static CPU_RESET( tx0 )
/* reset CPU flip-flops */
pulse_reset(device);
- cpustate->gbl_cm_sel = 1; /* HACK */
+ cpustate->gbl_cm_sel = 1; /* HACK */
}
/* execute instructions on this CPU until icount expires */
@@ -176,7 +176,7 @@ static CPU_EXECUTE( tx0_64kw )
if ((! cpustate->run) && (! cpustate->rim))
- cpustate->icount = 0; /* if processor is stopped, just burn cycles */
+ cpustate->icount = 0; /* if processor is stopped, just burn cycles */
else if (cpustate->rim)
{
switch (cpustate->rim_step)
@@ -185,29 +185,29 @@ static CPU_EXECUTE( tx0_64kw )
/* read first word as instruction */
AC = 0;
if (cpustate->iface->io_handlers[io_handler_rim])
- (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
+ (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
cpustate->rim_step = 1;
break;
case 1:
if (! cpustate->ios)
- { /* transfer incomplete: wait some more */
+ { /* transfer incomplete: wait some more */
cpustate->icount = 0;
}
else
- { /* data transfer complete */
+ { /* data transfer complete */
cpustate->ios = 0;
MBR = AC;
- IR = MBR >> 16; /* basic opcode */
- if ((IR == 2) || (IR == 1)) /* trn or add instruction? */
+ IR = MBR >> 16; /* basic opcode */
+ if ((IR == 2) || (IR == 1)) /* trn or add instruction? */
{
PC = MBR & ADDRESS_MASK_64KW;
- cpustate->rim = 0; /* exit read-in mode */
- cpustate->run = (IR == 2) ? 1 : 0; /* stop if add instruction */
+ cpustate->rim = 0; /* exit read-in mode */
+ cpustate->run = (IR == 2) ? 1 : 0; /* stop if add instruction */
cpustate->rim_step = 0;
}
- else if ((IR == 0) || (IR == 3)) /* sto or opr instruction? */
+ else if ((IR == 0) || (IR == 3)) /* sto or opr instruction? */
{
MAR = MBR & ADDRESS_MASK_64KW;
cpustate->rim_step = 2;
@@ -219,17 +219,17 @@ static CPU_EXECUTE( tx0_64kw )
/* read second word as data */
AC = 0;
if (cpustate->iface->io_handlers[io_handler_rim])
- (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
+ (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
cpustate->rim_step = 3;
break;
case 3:
if (! cpustate->ios)
- { /* transfer incomplete: wait some more */
+ { /* transfer incomplete: wait some more */
cpustate->icount = 0;
}
else
- { /* data transfer complete */
+ { /* data transfer complete */
cpustate->ios = 0;
tx0_write(cpustate, MAR, MBR = AC);
@@ -242,10 +242,10 @@ static CPU_EXECUTE( tx0_64kw )
else
{
if (cpustate->cycle == 0)
- { /* fetch new instruction */
+ { /* fetch new instruction */
MBR = tx0_read(cpustate, MAR = PC);
INCREMENT_PC_64KW;
- IR = MBR >> 16; /* basic opcode */
+ IR = MBR >> 16; /* basic opcode */
MAR = MBR & ADDRESS_MASK_64KW;
}
@@ -255,7 +255,7 @@ static CPU_EXECUTE( tx0_64kw )
|| (cpustate->stop_cyc1 && (cpustate->cycle == 1)))
cpustate->run = 0;
- execute_instruction_64kw(device); /* execute instruction */
+ execute_instruction_64kw(device); /* execute instruction */
}
cpustate->icount --;
@@ -282,7 +282,7 @@ static CPU_EXECUTE( tx0_8kw )
if ((! cpustate->run) && (! cpustate->rim))
- cpustate->icount = 0; /* if processor is stopped, just burn cycles */
+ cpustate->icount = 0; /* if processor is stopped, just burn cycles */
else if (cpustate->rim)
{
switch (cpustate->rim_step)
@@ -291,29 +291,29 @@ static CPU_EXECUTE( tx0_8kw )
/* read first word as instruction */
AC = 0;
if (cpustate->iface->io_handlers[io_handler_rim])
- (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
+ (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
cpustate->rim_step = 1;
break;
case 1:
if (! cpustate->ios)
- { /* transfer incomplete: wait some more */
+ { /* transfer incomplete: wait some more */
cpustate->icount = 0;
}
else
- { /* data transfer complete */
+ { /* data transfer complete */
cpustate->ios = 0;
MBR = AC;
- IR = MBR >> 13; /* basic opcode */
- if ((IR == 16) || (IR == 8)) /* trn or add instruction? */
+ IR = MBR >> 13; /* basic opcode */
+ if ((IR == 16) || (IR == 8)) /* trn or add instruction? */
{
PC = MBR & ADDRESS_MASK_8KW;
- cpustate->rim = 0; /* exit read-in mode */
- cpustate->run = (IR == 16) ? 1 : 0; /* stop if add instruction */
+ cpustate->rim = 0; /* exit read-in mode */
+ cpustate->run = (IR == 16) ? 1 : 0; /* stop if add instruction */
cpustate->rim_step = 0;
}
- else if ((IR == 0) || (IR == 24)) /* sto or opr instruction? */
+ else if ((IR == 0) || (IR == 24)) /* sto or opr instruction? */
{
MAR = MBR & ADDRESS_MASK_8KW;
cpustate->rim_step = 2;
@@ -325,17 +325,17 @@ static CPU_EXECUTE( tx0_8kw )
/* read second word as data */
AC = 0;
if (cpustate->iface->io_handlers[io_handler_rim])
- (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
+ (*cpustate->iface->io_handlers[io_handler_rim])(device); /* data will be transferred to AC */
cpustate->rim_step = 3;
break;
case 3:
if (! cpustate->ios)
- { /* transfer incomplete: wait some more */
+ { /* transfer incomplete: wait some more */
cpustate->icount = 0;
}
else
- { /* data transfer complete */
+ { /* data transfer complete */
cpustate->ios = 0;
tx0_write(cpustate, MAR, MBR = AC);
@@ -348,10 +348,10 @@ static CPU_EXECUTE( tx0_8kw )
else
{
if (cpustate->cycle == 0)
- { /* fetch new instruction */
+ { /* fetch new instruction */
MBR = tx0_read(cpustate, MAR = PC);
INCREMENT_PC_8KW;
- IR = MBR >> 13; /* basic opcode */
+ IR = MBR >> 13; /* basic opcode */
MAR = MBR & ADDRESS_MASK_8KW;
}
@@ -361,7 +361,7 @@ static CPU_EXECUTE( tx0_8kw )
|| (cpustate->stop_cyc1 && (cpustate->cycle == 1)))
cpustate->run = 0;
- execute_instruction_8kw(device); /* execute instruction */
+ execute_instruction_8kw(device); /* execute instruction */
}
cpustate->icount -= 1;
@@ -378,18 +378,18 @@ static CPU_SET_INFO( tx0 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_SP: (void) info->i; /* no SP */ break;
+ case CPUINFO_INT_SP: (void) info->i; /* no SP */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TX0_PC: PC = info->i & cpustate->address_mask; break;
- case CPUINFO_INT_REGISTER + TX0_IR: IR = info->i & cpustate->ir_mask; /* weird idea */ break;
- case CPUINFO_INT_REGISTER + TX0_MBR: MBR = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + TX0_MAR: MAR = info->i & cpustate->address_mask; break;
- case CPUINFO_INT_REGISTER + TX0_AC: AC = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + TX0_LR: LR = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + TX0_XR: XR = info->i & 0037777; break;
- case CPUINFO_INT_REGISTER + TX0_PF: PF = info->i & 077; break;
- case CPUINFO_INT_REGISTER + TX0_TBR: cpustate->tbr = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + TX0_TAC: cpustate->tac = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + TX0_PC: PC = info->i & cpustate->address_mask; break;
+ case CPUINFO_INT_REGISTER + TX0_IR: IR = info->i & cpustate->ir_mask; /* weird idea */ break;
+ case CPUINFO_INT_REGISTER + TX0_MBR: MBR = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + TX0_MAR: MAR = info->i & cpustate->address_mask; break;
+ case CPUINFO_INT_REGISTER + TX0_AC: AC = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + TX0_LR: LR = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + TX0_XR: XR = info->i & 0037777; break;
+ case CPUINFO_INT_REGISTER + TX0_PF: PF = info->i & 077; break;
+ case CPUINFO_INT_REGISTER + TX0_TBR: cpustate->tbr = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + TX0_TAC: cpustate->tac = info->i & 0777777; break;
case CPUINFO_INT_REGISTER + TX0_TSS00:
case CPUINFO_INT_REGISTER + TX0_TSS01:
case CPUINFO_INT_REGISTER + TX0_TSS02:
@@ -405,19 +405,19 @@ static CPU_SET_INFO( tx0 )
case CPUINFO_INT_REGISTER + TX0_TSS14:
case CPUINFO_INT_REGISTER + TX0_TSS15:
case CPUINFO_INT_REGISTER + TX0_TSS16:
- case CPUINFO_INT_REGISTER + TX0_TSS17: cpustate->tss[state-(CPUINFO_INT_REGISTER + TX0_TSS00)] = info->i & 0777777; break;
- case CPUINFO_INT_REGISTER + TX0_CM_SEL: cpustate->cm_sel = info->i & 0177777; break;
- case CPUINFO_INT_REGISTER + TX0_LR_SEL: cpustate->lr_sel = info->i & 0177777; break;
- case CPUINFO_INT_REGISTER + TX0_GBL_CM_SEL: cpustate->gbl_cm_sel = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + TX0_STOP_CYC0: cpustate->stop_cyc0 = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + TX0_STOP_CYC1: cpustate->stop_cyc1 = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + TX0_RUN: cpustate->run = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + TX0_RIM: cpustate->rim = info->i ? 1 : 0; break;
- case CPUINFO_INT_REGISTER + TX0_CYCLE: if (LOG) logerror("tx0_set_reg to cycle counter ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + TX0_IOH: if (LOG) logerror("tx0_set_reg to ioh flip-flop ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + TX0_IOS: if (LOG) logerror("tx0_set_reg to ios flip-flop ignored\n");/* no way!*/ break;
- case CPUINFO_INT_REGISTER + TX0_RESET: pulse_reset(device); break;
- case CPUINFO_INT_REGISTER + TX0_IO_COMPLETE:cpustate->ios = 1; break;
+ case CPUINFO_INT_REGISTER + TX0_TSS17: cpustate->tss[state-(CPUINFO_INT_REGISTER + TX0_TSS00)] = info->i & 0777777; break;
+ case CPUINFO_INT_REGISTER + TX0_CM_SEL: cpustate->cm_sel = info->i & 0177777; break;
+ case CPUINFO_INT_REGISTER + TX0_LR_SEL: cpustate->lr_sel = info->i & 0177777; break;
+ case CPUINFO_INT_REGISTER + TX0_GBL_CM_SEL: cpustate->gbl_cm_sel = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + TX0_STOP_CYC0: cpustate->stop_cyc0 = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + TX0_STOP_CYC1: cpustate->stop_cyc1 = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + TX0_RUN: cpustate->run = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + TX0_RIM: cpustate->rim = info->i ? 1 : 0; break;
+ case CPUINFO_INT_REGISTER + TX0_CYCLE: if (LOG) logerror("tx0_set_reg to cycle counter ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + TX0_IOH: if (LOG) logerror("tx0_set_reg to ioh flip-flop ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + TX0_IOS: if (LOG) logerror("tx0_set_reg to ios flip-flop ignored\n");/* no way!*/ break;
+ case CPUINFO_INT_REGISTER + TX0_RESET: pulse_reset(device); break;
+ case CPUINFO_INT_REGISTER + TX0_IO_COMPLETE:cpustate->ios = 1; break;
}
}
@@ -429,41 +429,41 @@ CPU_GET_INFO( tx0_64kw )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tx0_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -2; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
- case CPUINFO_INT_PC: info->i = PC; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
-
- case CPUINFO_INT_REGISTER + TX0_PC: info->i = PC; break;
- case CPUINFO_INT_REGISTER + TX0_IR: info->i = IR; break;
- case CPUINFO_INT_REGISTER + TX0_MBR: info->i = MBR; break;
- case CPUINFO_INT_REGISTER + TX0_MAR: info->i = MAR; break;
- case CPUINFO_INT_REGISTER + TX0_AC: info->i = AC; break;
- case CPUINFO_INT_REGISTER + TX0_LR: info->i = LR; break;
- case CPUINFO_INT_REGISTER + TX0_XR: info->i = XR; break;
- case CPUINFO_INT_REGISTER + TX0_PF: info->i = PF; break;
- case CPUINFO_INT_REGISTER + TX0_TBR: info->i = cpustate->tbr; break;
- case CPUINFO_INT_REGISTER + TX0_TAC: info->i = cpustate->tac; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tx0_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -2; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
+ case CPUINFO_INT_PC: info->i = PC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
+
+ case CPUINFO_INT_REGISTER + TX0_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + TX0_IR: info->i = IR; break;
+ case CPUINFO_INT_REGISTER + TX0_MBR: info->i = MBR; break;
+ case CPUINFO_INT_REGISTER + TX0_MAR: info->i = MAR; break;
+ case CPUINFO_INT_REGISTER + TX0_AC: info->i = AC; break;
+ case CPUINFO_INT_REGISTER + TX0_LR: info->i = LR; break;
+ case CPUINFO_INT_REGISTER + TX0_XR: info->i = XR; break;
+ case CPUINFO_INT_REGISTER + TX0_PF: info->i = PF; break;
+ case CPUINFO_INT_REGISTER + TX0_TBR: info->i = cpustate->tbr; break;
+ case CPUINFO_INT_REGISTER + TX0_TAC: info->i = cpustate->tac; break;
case CPUINFO_INT_REGISTER + TX0_TSS00:
case CPUINFO_INT_REGISTER + TX0_TSS01:
case CPUINFO_INT_REGISTER + TX0_TSS02:
@@ -479,46 +479,46 @@ CPU_GET_INFO( tx0_64kw )
case CPUINFO_INT_REGISTER + TX0_TSS14:
case CPUINFO_INT_REGISTER + TX0_TSS15:
case CPUINFO_INT_REGISTER + TX0_TSS16:
- case CPUINFO_INT_REGISTER + TX0_TSS17: info->i = cpustate->tss[state-(CPUINFO_INT_REGISTER + TX0_TSS00)]; break;
- case CPUINFO_INT_REGISTER + TX0_CM_SEL: info->i = cpustate->cm_sel; break;
- case CPUINFO_INT_REGISTER + TX0_LR_SEL: info->i = cpustate->lr_sel; break;
- case CPUINFO_INT_REGISTER + TX0_GBL_CM_SEL: info->i = cpustate->gbl_cm_sel; break;
- case CPUINFO_INT_REGISTER + TX0_STOP_CYC0: info->i = cpustate->stop_cyc0; break;
- case CPUINFO_INT_REGISTER + TX0_STOP_CYC1: info->i = cpustate->stop_cyc1; break;
- case CPUINFO_INT_REGISTER + TX0_RUN: info->i = cpustate->run; break;
- case CPUINFO_INT_REGISTER + TX0_RIM: info->i = cpustate->rim; break;
- case CPUINFO_INT_REGISTER + TX0_CYCLE: info->i = cpustate->cycle; break;
- case CPUINFO_INT_REGISTER + TX0_IOH: info->i = cpustate->ioh; break;
- case CPUINFO_INT_REGISTER + TX0_IOS: info->i = cpustate->ios; break;
+ case CPUINFO_INT_REGISTER + TX0_TSS17: info->i = cpustate->tss[state-(CPUINFO_INT_REGISTER + TX0_TSS00)]; break;
+ case CPUINFO_INT_REGISTER + TX0_CM_SEL: info->i = cpustate->cm_sel; break;
+ case CPUINFO_INT_REGISTER + TX0_LR_SEL: info->i = cpustate->lr_sel; break;
+ case CPUINFO_INT_REGISTER + TX0_GBL_CM_SEL: info->i = cpustate->gbl_cm_sel; break;
+ case CPUINFO_INT_REGISTER + TX0_STOP_CYC0: info->i = cpustate->stop_cyc0; break;
+ case CPUINFO_INT_REGISTER + TX0_STOP_CYC1: info->i = cpustate->stop_cyc1; break;
+ case CPUINFO_INT_REGISTER + TX0_RUN: info->i = cpustate->run; break;
+ case CPUINFO_INT_REGISTER + TX0_RIM: info->i = cpustate->rim; break;
+ case CPUINFO_INT_REGISTER + TX0_CYCLE: info->i = cpustate->cycle; break;
+ case CPUINFO_INT_REGISTER + TX0_IOH: info->i = cpustate->ioh; break;
+ case CPUINFO_INT_REGISTER + TX0_IOS: info->i = cpustate->ios; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tx0); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tx0_64kw); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tx0); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_64kw); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tx0_64kw); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tx0); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tx0_64kw); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tx0); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_64kw); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tx0_64kw); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "TX-0"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
-
- case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
- case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
- case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
- case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
- case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
- case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
- case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
- case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break;
- case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", cpustate->tbr); break;
- case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", cpustate->tac); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
+
+ case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
+ case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
+ case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
+ case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
+ case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
+ case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
+ case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
+ case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break;
+ case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", cpustate->tbr); break;
+ case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", cpustate->tac); break;
case CPUINFO_STR_REGISTER + TX0_TSS00:
case CPUINFO_STR_REGISTER + TX0_TSS01:
case CPUINFO_STR_REGISTER + TX0_TSS02:
@@ -534,18 +534,18 @@ CPU_GET_INFO( tx0_64kw )
case CPUINFO_STR_REGISTER + TX0_TSS14:
case CPUINFO_STR_REGISTER + TX0_TSS15:
case CPUINFO_STR_REGISTER + TX0_TSS16:
- case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), cpustate->tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
- case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", cpustate->cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", cpustate->lr_sel); break;
- case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", cpustate->gbl_cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", cpustate->stop_cyc0); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", cpustate->stop_cyc1); break;
- case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", cpustate->run); break;
- case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", cpustate->rim); break;
- case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", cpustate->cycle); break;
- case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", cpustate->ioh); break;
- case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", cpustate->ios); break;
- case CPUINFO_IS_OCTAL: info->i = true; break;
+ case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), cpustate->tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
+ case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", cpustate->cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", cpustate->lr_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", cpustate->gbl_cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", cpustate->stop_cyc0); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", cpustate->stop_cyc1); break;
+ case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", cpustate->run); break;
+ case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", cpustate->rim); break;
+ case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", cpustate->cycle); break;
+ case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", cpustate->ioh); break;
+ case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", cpustate->ios); break;
+ case CPUINFO_IS_OCTAL: info->i = true; break;
}
}
@@ -556,41 +556,41 @@ CPU_GET_INFO( tx0_8kw )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tx0_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 13; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -2; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
- case CPUINFO_INT_PC: info->i = PC; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
-
- case CPUINFO_INT_REGISTER + TX0_PC: info->i = PC; break;
- case CPUINFO_INT_REGISTER + TX0_IR: info->i = IR; break;
- case CPUINFO_INT_REGISTER + TX0_MBR: info->i = MBR; break;
- case CPUINFO_INT_REGISTER + TX0_MAR: info->i = MAR; break;
- case CPUINFO_INT_REGISTER + TX0_AC: info->i = AC; break;
- case CPUINFO_INT_REGISTER + TX0_LR: info->i = LR; break;
- case CPUINFO_INT_REGISTER + TX0_XR: info->i = XR; break;
- case CPUINFO_INT_REGISTER + TX0_PF: info->i = PF; break;
- case CPUINFO_INT_REGISTER + TX0_TBR: info->i = cpustate->tbr; break;
- case CPUINFO_INT_REGISTER + TX0_TAC: info->i = cpustate->tac; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tx0_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; /*don't care*/ break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 13; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -2; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_SP: info->i = 0; /* no SP */ break;
+ case CPUINFO_INT_PC: info->i = PC; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* TODO??? */ break;
+
+ case CPUINFO_INT_REGISTER + TX0_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + TX0_IR: info->i = IR; break;
+ case CPUINFO_INT_REGISTER + TX0_MBR: info->i = MBR; break;
+ case CPUINFO_INT_REGISTER + TX0_MAR: info->i = MAR; break;
+ case CPUINFO_INT_REGISTER + TX0_AC: info->i = AC; break;
+ case CPUINFO_INT_REGISTER + TX0_LR: info->i = LR; break;
+ case CPUINFO_INT_REGISTER + TX0_XR: info->i = XR; break;
+ case CPUINFO_INT_REGISTER + TX0_PF: info->i = PF; break;
+ case CPUINFO_INT_REGISTER + TX0_TBR: info->i = cpustate->tbr; break;
+ case CPUINFO_INT_REGISTER + TX0_TAC: info->i = cpustate->tac; break;
case CPUINFO_INT_REGISTER + TX0_TSS00:
case CPUINFO_INT_REGISTER + TX0_TSS01:
case CPUINFO_INT_REGISTER + TX0_TSS02:
@@ -606,46 +606,46 @@ CPU_GET_INFO( tx0_8kw )
case CPUINFO_INT_REGISTER + TX0_TSS14:
case CPUINFO_INT_REGISTER + TX0_TSS15:
case CPUINFO_INT_REGISTER + TX0_TSS16:
- case CPUINFO_INT_REGISTER + TX0_TSS17: info->i = cpustate->tss[state-(CPUINFO_INT_REGISTER + TX0_TSS00)]; break;
- case CPUINFO_INT_REGISTER + TX0_CM_SEL: info->i = cpustate->cm_sel; break;
- case CPUINFO_INT_REGISTER + TX0_LR_SEL: info->i = cpustate->lr_sel; break;
- case CPUINFO_INT_REGISTER + TX0_GBL_CM_SEL: info->i = cpustate->gbl_cm_sel; break;
- case CPUINFO_INT_REGISTER + TX0_STOP_CYC0: info->i = cpustate->stop_cyc0; break;
- case CPUINFO_INT_REGISTER + TX0_STOP_CYC1: info->i = cpustate->stop_cyc1; break;
- case CPUINFO_INT_REGISTER + TX0_RUN: info->i = cpustate->run; break;
- case CPUINFO_INT_REGISTER + TX0_RIM: info->i = cpustate->rim; break;
- case CPUINFO_INT_REGISTER + TX0_CYCLE: info->i = cpustate->cycle; break;
- case CPUINFO_INT_REGISTER + TX0_IOH: info->i = cpustate->ioh; break;
- case CPUINFO_INT_REGISTER + TX0_IOS: info->i = cpustate->ios; break;
+ case CPUINFO_INT_REGISTER + TX0_TSS17: info->i = cpustate->tss[state-(CPUINFO_INT_REGISTER + TX0_TSS00)]; break;
+ case CPUINFO_INT_REGISTER + TX0_CM_SEL: info->i = cpustate->cm_sel; break;
+ case CPUINFO_INT_REGISTER + TX0_LR_SEL: info->i = cpustate->lr_sel; break;
+ case CPUINFO_INT_REGISTER + TX0_GBL_CM_SEL: info->i = cpustate->gbl_cm_sel; break;
+ case CPUINFO_INT_REGISTER + TX0_STOP_CYC0: info->i = cpustate->stop_cyc0; break;
+ case CPUINFO_INT_REGISTER + TX0_STOP_CYC1: info->i = cpustate->stop_cyc1; break;
+ case CPUINFO_INT_REGISTER + TX0_RUN: info->i = cpustate->run; break;
+ case CPUINFO_INT_REGISTER + TX0_RIM: info->i = cpustate->rim; break;
+ case CPUINFO_INT_REGISTER + TX0_CYCLE: info->i = cpustate->cycle; break;
+ case CPUINFO_INT_REGISTER + TX0_IOH: info->i = cpustate->ioh; break;
+ case CPUINFO_INT_REGISTER + TX0_IOS: info->i = cpustate->ios; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tx0); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tx0_8kw); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tx0); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_8kw); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tx0_8kw); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tx0); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tx0_8kw); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tx0); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tx0_8kw); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tx0_8kw); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "TX-0"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
-
- case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
- case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
- case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
- case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
- case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
- case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
- case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
- case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break;
- case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", cpustate->tbr); break;
- case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", cpustate->tac); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "TX-0"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Raphael Nabet"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, ""); break;
+
+ case CPUINFO_STR_REGISTER + TX0_PC: sprintf(info->s, "PC:0%06o", PC); break;
+ case CPUINFO_STR_REGISTER + TX0_IR: sprintf(info->s, "IR:0%02o", IR); break;
+ case CPUINFO_STR_REGISTER + TX0_MBR: sprintf(info->s, "MBR:0%06o", MBR); break;
+ case CPUINFO_STR_REGISTER + TX0_MAR: sprintf(info->s, "MAR:0%06o", MAR); break;
+ case CPUINFO_STR_REGISTER + TX0_AC: sprintf(info->s, "AC:0%06o", AC); break;
+ case CPUINFO_STR_REGISTER + TX0_LR: sprintf(info->s, "LR:0%06o", LR); break;
+ case CPUINFO_STR_REGISTER + TX0_XR: sprintf(info->s, "XR:0%05o", XR); break;
+ case CPUINFO_STR_REGISTER + TX0_PF: sprintf(info->s, "PF:0%02o", PF); break;
+ case CPUINFO_STR_REGISTER + TX0_TBR: sprintf(info->s, "TBR:0%06o", cpustate->tbr); break;
+ case CPUINFO_STR_REGISTER + TX0_TAC: sprintf(info->s, "TAC:0%06o", cpustate->tac); break;
case CPUINFO_STR_REGISTER + TX0_TSS00:
case CPUINFO_STR_REGISTER + TX0_TSS01:
case CPUINFO_STR_REGISTER + TX0_TSS02:
@@ -661,18 +661,18 @@ CPU_GET_INFO( tx0_8kw )
case CPUINFO_STR_REGISTER + TX0_TSS14:
case CPUINFO_STR_REGISTER + TX0_TSS15:
case CPUINFO_STR_REGISTER + TX0_TSS16:
- case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), cpustate->tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
- case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", cpustate->cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", cpustate->lr_sel); break;
- case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", cpustate->gbl_cm_sel); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", cpustate->stop_cyc0); break;
- case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", cpustate->stop_cyc1); break;
- case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", cpustate->run); break;
- case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", cpustate->rim); break;
- case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", cpustate->cycle); break;
- case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", cpustate->ioh); break;
- case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", cpustate->ios); break;
- case CPUINFO_IS_OCTAL: info->i = true; break;
+ case CPUINFO_STR_REGISTER + TX0_TSS17: sprintf(info->s, "TSS%02o:0%06o", state-(CPUINFO_STR_REGISTER + TX0_TSS00), cpustate->tss[state-(CPUINFO_STR_REGISTER + TX0_TSS00)]); break;
+ case CPUINFO_STR_REGISTER + TX0_CM_SEL: sprintf(info->s, "CMSEL:0%06o", cpustate->cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_LR_SEL: sprintf(info->s, "LRSEL:0%06o", cpustate->lr_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_GBL_CM_SEL: sprintf(info->s, "GBLCMSEL:%X", cpustate->gbl_cm_sel); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC0: sprintf(info->s, "STOPCYC0:%X", cpustate->stop_cyc0); break;
+ case CPUINFO_STR_REGISTER + TX0_STOP_CYC1: sprintf(info->s, "STOPCYC1:%X", cpustate->stop_cyc1); break;
+ case CPUINFO_STR_REGISTER + TX0_RUN: sprintf(info->s, "RUN:%X", cpustate->run); break;
+ case CPUINFO_STR_REGISTER + TX0_RIM: sprintf(info->s, "RIM:%X", cpustate->rim); break;
+ case CPUINFO_STR_REGISTER + TX0_CYCLE: sprintf(info->s, "CYCLE:%X", cpustate->cycle); break;
+ case CPUINFO_STR_REGISTER + TX0_IOH: sprintf(info->s, "IOH:%X", cpustate->ioh); break;
+ case CPUINFO_STR_REGISTER + TX0_IOS: sprintf(info->s, "IOS:%X", cpustate->ios); break;
+ case CPUINFO_IS_OCTAL: info->i = true; break;
}
}
@@ -684,23 +684,23 @@ static void execute_instruction_64kw(device_t *device)
if (! cpustate->cycle)
{
- cpustate->cycle = 1; /* most frequent case */
+ cpustate->cycle = 1; /* most frequent case */
switch (IR)
{
- case 0: /* STOre */
- case 1: /* ADD */
+ case 0: /* STOre */
+ case 1: /* ADD */
break;
- case 2: /* TRansfer on Negative */
+ case 2: /* TRansfer on Negative */
if (AC & 0400000)
{
PC = MAR & ADDRESS_MASK_64KW;
- cpustate->cycle = 0; /* instruction only takes one cycle if branch
+ cpustate->cycle = 0; /* instruction only takes one cycle if branch
is taken */
}
break;
- case 3: /* OPeRate */
+ case 3: /* OPeRate */
if (MAR & 0100000)
/* (0.8) CLL = Clear the left nine digital positions of the AC */
AC &= 0000777;
@@ -711,7 +711,7 @@ static void execute_instruction_64kw(device_t *device)
if (((MAR & 0030000) >> 12) == 1)
/* (0.8) IOS In-Out Stop = Stop machine so that an In-Out command
- (specified by digits 6 7 8 of MAR) may be executed */
+ (specified by digits 6 7 8 of MAR) may be executed */
cpustate->ioh = 1;
if (((MAR & 0007000) >> 9) != 0)
@@ -719,30 +719,30 @@ static void execute_instruction_64kw(device_t *device)
/* ((MAR & 0007000) >> 9) is device ID */
/* 7: */
/* (0.8) P7H = Punch holes 1-6 in flexo tape specified by AC
- digital positions 2, 5, 8, 11, 14, and 17. Also punches a 7th
- hole on tape. */
+ digital positions 2, 5, 8, 11, 14, and 17. Also punches a 7th
+ hole on tape. */
/* 6: */
/* (0.8) P6H = Same as P7H but no seventh hole */
/* 4: */
/* (0.8) PNT = Print one flexowriter character specified by AC
- digits 2, 5, 8, 11, 14, and 17. */
+ digits 2, 5, 8, 11, 14, and 17. */
/* 1: */
/* (0.8) R1C = Read one line of flexo tape so that tape positions
- 1, 2, 3, 4, 5, and 6 will be put in the AC digital positions 0,
- 3, 6, 9, 12 and 15. */
+ 1, 2, 3, 4, 5, and 6 will be put in the AC digital positions 0,
+ 3, 6, 9, 12 and 15. */
/* 3: */
/* (0.8) R3C = Read one line of flexo tape into AC digits 0, 3, 6,
- 9, 12 and 15. Then cycle the AC one digital position; read the
- next line on tape into AC digits 0, 3, 6, 9, 12 and 15, cycle
- the AC right one digital position and read the third and last
- line into AC digits 0, 3, 6, 9, 12 and 15. (This command is
- equal to a triple CYR-R1C.) */
+ 9, 12 and 15. Then cycle the AC one digital position; read the
+ next line on tape into AC digits 0, 3, 6, 9, 12 and 15, cycle
+ the AC right one digital position and read the third and last
+ line into AC digits 0, 3, 6, 9, 12 and 15. (This command is
+ equal to a triple CYR-R1C.) */
/* 2: */
/* (0.8) DIS = Intensify a point on the scope with x and y
- coordinates where x is specified by AC digits 0-8 with digit 0
- being used as the sign and y is specified by AC digits 9-17
- with digit 9 being used as the sign for y. The complement
- system is in effect when the signs are negative. */
+ coordinates where x is specified by AC digits 0-8 with digit 0
+ being used as the sign and y is specified by AC digits 9-17
+ with digit 9 being used as the sign for y. The complement
+ system is in effect when the signs are negative. */
/* (5 is undefined) */
int index = (MAR & 0007000) >> 9;
@@ -755,36 +755,36 @@ static void execute_instruction_64kw(device_t *device)
}
else
{
- cpustate->cycle = 0; /* always true */
+ cpustate->cycle = 0; /* always true */
switch (IR)
{
- case 0: /* STOre */
+ case 0: /* STOre */
tx0_write(cpustate, MAR, (MBR = AC));
break;
- case 1: /* ADD */
+ case 1: /* ADD */
MBR = tx0_read(cpustate, MAR);
AC = AC + MBR;
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
break;
- case 2: /* TRansfer on Negative */
+ case 2: /* TRansfer on Negative */
break;
- case 3: /* OPeRate */
+ case 3: /* OPeRate */
if ((MAR & 0000104) == 0000100)
/* (1.1) PEN = Read the light pen flip-flops 1 and 2 into AC(0) and
- AC(1). */
+ AC(1). */
/*...*/{ }
if ((MAR & 0000104) == 0000004)
/* (1.1) TAC = Insert a one in each digital position of the AC
- wherever there is a one in the corresponding digital position
- of the TAC. */
+ wherever there is a one in the corresponding digital position
+ of the TAC. */
/*...*/ { }
if (MAR & 0000040)
@@ -806,28 +806,28 @@ static void execute_instruction_64kw(device_t *device)
if (((MAR & 0000600) >> 7) == 1)
/* (1.3) MLR = Store the contents of the MBR (memory buffer
- register) in the live reg. */
+ register) in the live reg. */
LR = MBR;
if (((MAR & 0000600) >> 7) == 2)
/* (1.4) SHR = Shift the AC right one place, i.e. multiply the AC
- by 2^-1 */
+ by 2^-1 */
AC >>= 1;
if (((MAR & 0000600) >> 7) == 3)
/* (1.4) CYR = Cycle the AC right one digital position (AC(17) will
- become AC(0)) */
+ become AC(0)) */
AC = (AC >> 1) | ((AC & 1) << 17);
if (MAR & 0000020)
/* (1.4) PAD = Partial add AC to MBR, that is, for every digital
- position of the MBR that contains a one, complement the digit
- in the corresponding digital position of the AC. This is also
- called a half add. */
+ position of the MBR that contains a one, complement the digit
+ in the corresponding digital position of the AC. This is also
+ called a half add. */
AC ^= MBR;
if (MAR & 0000010)
- { /* (1.7) CRY = Partial add the 18 digits of the AC to the
+ { /* (1.7) CRY = Partial add the 18 digits of the AC to the
corresponding 18 digits of the carry.
To determine what the 18 digits of the carry are, use the
@@ -843,9 +843,9 @@ static void execute_instruction_64kw(device_t *device)
AC ^= MBR;
AC = AC + MBR;
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
}
@@ -861,10 +861,10 @@ static void execute_instruction_64kw(device_t *device)
static void indexed_address_eval(tx0_state *cpustate)
{
MAR = MAR + XR;
- MAR = (MAR + (MAR >> 14)) & 0037777; /* propagate carry around */
+ MAR = (MAR + (MAR >> 14)) & 0037777; /* propagate carry around */
//if (MAR == 0037777) /* check for -0 */
// MAR = 0;
- if (MAR & 0020000) /* fix negative (right???) */
+ if (MAR & 0020000) /* fix negative (right???) */
MAR = (MAR + 1) & 0017777;
}
@@ -875,52 +875,52 @@ static void execute_instruction_8kw(device_t *device)
if (! cpustate->cycle)
{
- cpustate->cycle = 1; /* most frequent case */
+ cpustate->cycle = 1; /* most frequent case */
switch (IR)
{
- case 0: /* STOre */
- case 1: /* STore indeXed */
- case 2: /* Store indeX in Address */
- case 3: /* ADd One */
- case 4: /* Store LR */
- case 5: /* Store Lr indeXed */
- case 6: /* STore Zero */
- case 8: /* ADD */
- case 9: /* ADd indeXed */
- case 10: /* LoaD indeX */
- case 11: /* AUgment indeX */
- case 12: /* Load LR */
- case 13: /* Load Lr indeXed */
- case 14: /* LoaD Ac */
- case 15: /* Load Ac indeXed */
+ case 0: /* STOre */
+ case 1: /* STore indeXed */
+ case 2: /* Store indeX in Address */
+ case 3: /* ADd One */
+ case 4: /* Store LR */
+ case 5: /* Store Lr indeXed */
+ case 6: /* STore Zero */
+ case 8: /* ADD */
+ case 9: /* ADd indeXed */
+ case 10: /* LoaD indeX */
+ case 11: /* AUgment indeX */
+ case 12: /* Load LR */
+ case 13: /* Load Lr indeXed */
+ case 14: /* LoaD Ac */
+ case 15: /* Load Ac indeXed */
break;
- case 16: /* TRansfer on Negative */
+ case 16: /* TRansfer on Negative */
if (AC & 0400000)
{
PC = MAR & 0017777;
- cpustate->cycle = 0; /* instruction only takes one cycle if branch
+ cpustate->cycle = 0; /* instruction only takes one cycle if branch
is taken */
}
break;
- case 17: /* Transfer on ZEro */
+ case 17: /* Transfer on ZEro */
if ((AC == 0000000) || (AC == 0777777))
{
PC = MAR & 0017777;
- cpustate->cycle = 0; /* instruction only takes one cycle if branch
+ cpustate->cycle = 0; /* instruction only takes one cycle if branch
is taken */
}
break;
- case 18: /* Transfer and Set indeX */
+ case 18: /* Transfer and Set indeX */
XR = PC;
PC = MAR & 0017777;
- cpustate->cycle = 0; /* instruction only takes one cycle if branch
+ cpustate->cycle = 0; /* instruction only takes one cycle if branch
is taken */
break;
- case 19: /* Transfer and IndeX */
+ case 19: /* Transfer and IndeX */
if ((XR != 0000000) && (XR != 0037777))
{
if (XR & 0020000)
@@ -928,29 +928,29 @@ static void execute_instruction_8kw(device_t *device)
else
XR--;
PC = MAR & 0017777;
- cpustate->cycle = 0; /* instruction only takes one cycle if branch
+ cpustate->cycle = 0; /* instruction only takes one cycle if branch
is taken */
}
break;
- case 21: /* TRansfer indeXed */
+ case 21: /* TRansfer indeXed */
indexed_address_eval(cpustate);
- case 20: /* TRAnsfer */
+ case 20: /* TRAnsfer */
PC = MAR & 0017777;
- cpustate->cycle = 0; /* instruction only takes one cycle if branch
+ cpustate->cycle = 0; /* instruction only takes one cycle if branch
is taken */
break;
- case 22: /* Transfer on external LeVel */
+ case 22: /* Transfer on external LeVel */
/*if (...)
- {
- PC = MAR & 0017777;
- cpustate->cycle = 0;*/ /* instruction only takes one cycle if branch
+ {
+ PC = MAR & 0017777;
+ cpustate->cycle = 0;*/ /* instruction only takes one cycle if branch
is taken */
/*}*/
break;
- case 24: /* OPeRate */
+ case 24: /* OPeRate */
case 25:
case 26:
case 27:
@@ -959,7 +959,7 @@ static void execute_instruction_8kw(device_t *device)
case 30:
case 31:
if (((IR & 001) == 00) && ((MAR & 017000) == 004000))
- { /* Select class instruction */
+ { /* Select class instruction */
if (IR & 004)
/* (0.8???) CLA = CLear Ac */
AC = 0;
@@ -969,7 +969,7 @@ static void execute_instruction_8kw(device_t *device)
(*cpustate->iface->sel_handler)(device);
}
else
- { /* Normal operate class instruction */
+ { /* Normal operate class instruction */
if (((IR & 001) == 01) && ((MAR & 017000) == 011000))
/* (0.6) CLL = CLear Left 9 bits of ac */
AC &= 0000777;
@@ -987,32 +987,32 @@ static void execute_instruction_8kw(device_t *device)
AC = 0;
if (((IR & 001) == 01) && ((MAR & 010000) == 000000))
- { /* (IOS) In-Out group commands */
+ { /* (IOS) In-Out group commands */
/* ((MAR & 0007000) >> 9) is device ID */
/* 0: */
/* (***) CPY = CoPY synchronizes transmission of information
- between in-out equipment and computer. */
+ between in-out equipment and computer. */
/* 1: */
/* (IOS) R1L = Read 1 Line of tape from PETR into AC bits 0, 3,
- 6, 9, 12, 15, with CYR before read (inclusive or) */
+ 6, 9, 12, 15, with CYR before read (inclusive or) */
/* 3: */
/* (IOS) R3L = Read 3 Lines of tape from PETR into AC bits 0,
- 3, 6, 9, 12, 15, with CYR before each read (inclusive or) */
+ 3, 6, 9, 12, 15, with CYR before each read (inclusive or) */
/* 2: */
/* (IOS) DIS = DISplay a point on scope (AC bits 0-8 specify x
- coordinate, AC bits 9-17 specify y coordinate). The
- coordinate (0, 0) is usually at the lower left hand corner
- of the scope. A console switch is available to relocate
- (0,0) to the center. */
+ coordinate, AC bits 9-17 specify y coordinate). The
+ coordinate (0, 0) is usually at the lower left hand corner
+ of the scope. A console switch is available to relocate
+ (0,0) to the center. */
/* 6: */
/* (IOS) P6H = Punch one 6-bit line of flexo tape (without 7th
- hole) from ac bits 2, 5, 8, 11, 14, 17. Note: lines
- without 7th hole are ignored by PETR. */
+ hole) from ac bits 2, 5, 8, 11, 14, 17. Note: lines
+ without 7th hole are ignored by PETR. */
/* 7: */
/* (IOS) P7H = same as P6H, but with 7th hole */
/* 4: */
/* (IOS) PRT = Print one six bit flexo character from AC bits
- 2, 5, 8, 11, 14, 17. */
+ 2, 5, 8, 11, 14, 17. */
/* (5 is undefined) */
int index = (MAR & 0007000) >> 9;
@@ -1022,7 +1022,7 @@ static void execute_instruction_8kw(device_t *device)
}
if (((IR & 001) == 00) && ((MAR & 010000) == 010000))
- { /* (IOS) EX0 through EX7 = operate user's EXternal equipment. */
+ { /* (IOS) EX0 through EX7 = operate user's EXternal equipment. */
switch ((MAR & 0007000) >> 9)
{
/* ... */
@@ -1037,35 +1037,35 @@ static void execute_instruction_8kw(device_t *device)
if (((IR != 2) && (IR != 3)) || (cpustate->cycle == 2))
cpustate->cycle = 0;
else
- cpustate->cycle = 2; /* SXA and ADO have an extra cycle 2 */
+ cpustate->cycle = 2; /* SXA and ADO have an extra cycle 2 */
switch (IR)
{
- case 1: /* STore indeXed */
+ case 1: /* STore indeXed */
indexed_address_eval(cpustate);
- case 0: /* STOre */
+ case 0: /* STOre */
tx0_write(cpustate, MAR, (MBR = AC));
break;
- case 2: /* Store indeX in Address */
+ case 2: /* Store indeX in Address */
if (cpustate->cycle)
- { /* cycle 1 */
+ { /* cycle 1 */
MBR = tx0_read(cpustate, MAR);
MBR = (MBR & 0760000) | (XR & 0017777);
}
else
- { /* cycle 2 */
+ { /* cycle 2 */
tx0_write(cpustate, MAR, MBR);
}
break;
- case 3: /* ADd One */
+ case 3: /* ADd One */
if (cpustate->cycle)
- { /* cycle 1 */
+ { /* cycle 1 */
AC = tx0_read(cpustate, MAR) + 1;
#if 0
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 (right???) */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ if (AC == 0777777) /* check for -0 (right???) */
AC = 0;
#else
if (AC >= 0777777)
@@ -1073,70 +1073,70 @@ static void execute_instruction_8kw(device_t *device)
#endif
}
else
- { /* cycle 2 */
+ { /* cycle 2 */
tx0_write(cpustate, MAR, (MBR = AC));
}
break;
- case 5: /* Store Lr indeXed */
+ case 5: /* Store Lr indeXed */
indexed_address_eval(cpustate);
- case 4: /* Store LR */
+ case 4: /* Store LR */
tx0_write(cpustate, MAR, (MBR = LR));
break;
- case 6: /* STore Zero */
+ case 6: /* STore Zero */
tx0_write(cpustate, MAR, (MBR = 0));
break;
- case 9: /* ADd indeXed */
+ case 9: /* ADd indeXed */
indexed_address_eval(cpustate);
- case 8: /* ADD */
+ case 8: /* ADD */
MBR = tx0_read(cpustate, MAR);
AC = AC + MBR;
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
break;
- case 10: /* LoaD indeX */
+ case 10: /* LoaD indeX */
MBR = tx0_read(cpustate, MAR);
XR = (MBR & 0017777) | ((MBR >> 4) & 0020000);
break;
- case 11: /* AUgment indeX */
+ case 11: /* AUgment indeX */
MBR = tx0_read(cpustate, MAR);
XR = XR + ((MBR & 0017777) | ((MBR >> 4) & 0020000));
- XR = (XR + (XR >> 14)) & 0037777; /* propagate carry around */
+ XR = (XR + (XR >> 14)) & 0037777; /* propagate carry around */
//if (XR == 0037777) /* check for -0 */
// XR = 0;
break;
- case 13: /* Load Lr indeXed */
+ case 13: /* Load Lr indeXed */
indexed_address_eval(cpustate);
- case 12: /* Load LR */
+ case 12: /* Load LR */
LR = MBR = tx0_read(cpustate, MAR);
break;
- case 15: /* Load Ac indeXed */
+ case 15: /* Load Ac indeXed */
indexed_address_eval(cpustate);
- case 14: /* LoaD Ac */
+ case 14: /* LoaD Ac */
AC = MBR = tx0_read(cpustate, MAR);
break;
- case 16: /* TRansfer on Negative */
- case 17: /* Transfer on ZEro */
- case 18: /* Transfer and Set indeX */
- case 19: /* Transfer and IndeX */
- case 20: /* TRAnsfer */
- case 21: /* TRansfer indeXed */
- case 22: /* Transfer on external LeVel */
+ case 16: /* TRansfer on Negative */
+ case 17: /* Transfer on ZEro */
+ case 18: /* Transfer and Set indeX */
+ case 19: /* Transfer and IndeX */
+ case 20: /* TRAnsfer */
+ case 21: /* TRansfer indeXed */
+ case 22: /* Transfer on external LeVel */
break;
- case 24: /* OPeRate */
+ case 24: /* OPeRate */
case 25:
case 26:
case 27:
@@ -1145,12 +1145,12 @@ static void execute_instruction_8kw(device_t *device)
case 30:
case 31:
if (((IR & 001) == 00) && ((MAR & 017000) == 004000))
- { /* Select class instruction */
+ { /* Select class instruction */
}
else
- { /* Normal operate class instruction */
+ { /* Normal operate class instruction */
if (((IR & 001) == 00) && ((MAR & 017000) == 003000))
- { /* (1.1) PEN = set ac bit 0 from light PEN ff, and ac bit 1 from
+ { /* (1.1) PEN = set ac bit 0 from light PEN ff, and ac bit 1 from
light gun ff. (ffs contain one if pen or gun saw displayed
point.) Then clear both light pen and light gun ffs */
/*AC = (AC & 0177777) |?...;*/
@@ -1174,7 +1174,7 @@ static void execute_instruction_8kw(device_t *device)
AC ^= 0777777;
if ((! (MAR & 0000400)) && (MAR & 0000100))
- { /* (1.2) XMB = Transfer XR contents to MBR */
+ { /* (1.2) XMB = Transfer XR contents to MBR */
MBR = XR;
if (XR & 0020000)
MBR |= 0740000;
@@ -1184,11 +1184,11 @@ static void execute_instruction_8kw(device_t *device)
{
switch (MAR & 0000003)
{
- case 0000003: /* (1.2) And LR and MBR */
+ case 0000003: /* (1.2) And LR and MBR */
MBR &= LR;
break;
- case 0000001: /* (1.3) Or LR into MBR */
+ case 0000001: /* (1.3) Or LR into MBR */
MBR |= LR;
break;
@@ -1200,7 +1200,7 @@ static void execute_instruction_8kw(device_t *device)
}
if (((! (MAR & 0000400)) && (MAR & 0000200)) && ((! (MAR & 0000004)) && (MAR & 0000002)))
- { /* LMB and MBL used simultaneously interchange LR and MBR */
+ { /* LMB and MBL used simultaneously interchange LR and MBR */
int tmp = MBR;
MBR = LR;
LR = tmp;
@@ -1220,12 +1220,12 @@ static void execute_instruction_8kw(device_t *device)
{
switch (MAR & 0000300)
{
- case 0000000: /* (1.6) CYR = CYcle ac contents Right one binary
+ case 0000000: /* (1.6) CYR = CYcle ac contents Right one binary
position (AC(17) -> AC(0)) */
AC = (AC >> 1) | ((AC & 1) << 17);
break;
- case 0000200: /* (1.6) CYcle ac contents Right one binary
+ case 0000200: /* (1.6) CYcle ac contents Right one binary
position (AC(0) unchanged) */
AC = (AC >> 1) | (AC & 0400000);
break;
@@ -1242,14 +1242,14 @@ static void execute_instruction_8kw(device_t *device)
PF = (MBR >> 8) & 077;
if (MAR & 0000010)
- { /* (1.7?) CRY = Partial ADd the 18 digits of the AC to the
+ { /* (1.7?) CRY = Partial ADd the 18 digits of the AC to the
corresponding 18 digits of the carry. */
AC ^= MBR;
AC = AC + MBR;
- AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
+ AC = (AC + (AC >> 18)) & 0777777; /* propagate carry around */
- if (AC == 0777777) /* check for -0 */
+ if (AC == 0777777) /* check for -0 */
AC = 0;
}
@@ -1263,7 +1263,7 @@ static void execute_instruction_8kw(device_t *device)
}
break;
- default: /* Illegal */
+ default: /* Illegal */
/* ... */
break;
}
@@ -1280,18 +1280,18 @@ static void pulse_reset(device_t *device)
tx0_state *cpustate = get_safe_token(device);
/* processor registers */
- PC = 0; /* ??? */
- IR = 0; /* ??? */
- /*MBR = 0;*/ /* ??? */
- /*MAR = 0;*/ /* ??? */
- /*AC = 0;*/ /* ??? */
- /*LR = 0;*/ /* ??? */
+ PC = 0; /* ??? */
+ IR = 0; /* ??? */
+ /*MBR = 0;*/ /* ??? */
+ /*MAR = 0;*/ /* ??? */
+ /*AC = 0;*/ /* ??? */
+ /*LR = 0;*/ /* ??? */
/* processor state flip-flops */
- cpustate->run = 0; /* ??? */
- cpustate->rim = 0; /* ??? */
- cpustate->ioh = 0; /* ??? */
- cpustate->ios = 0; /* ??? */
+ cpustate->run = 0; /* ??? */
+ cpustate->rim = 0; /* ??? */
+ cpustate->ioh = 0; /* ??? */
+ cpustate->ios = 0; /* ??? */
cpustate->rim_step = 0;
diff --git a/src/emu/cpu/pdp1/tx0.h b/src/emu/cpu/pdp1/tx0.h
index 60139e2a886..8e4c424c9a6 100644
--- a/src/emu/cpu/pdp1/tx0.h
+++ b/src/emu/cpu/pdp1/tx0.h
@@ -16,24 +16,24 @@ enum
TX0_STOP_CYC0, TX0_STOP_CYC1,
TX0_RUN, TX0_RIM,
TX0_CYCLE, TX0_IOH, TX0_IOS,
- TX0_RESET, /* hack, do not use directly, use tx0_pulse_reset instead */
- TX0_IO_COMPLETE /* hack, do not use directly, use tx0_pulse_io_complete instead */
+ TX0_RESET, /* hack, do not use directly, use tx0_pulse_reset instead */
+ TX0_IO_COMPLETE /* hack, do not use directly, use tx0_pulse_io_complete instead */
};
-#define tx0_pulse_reset(cpudevice) (cpudevice)->state().set_state_int(TX0_RESET, 0)
-#define tx0_pulse_io_complete(cpudevice) (cpudevice)->state().set_state_int(TX0_IO_COMPLETE, 0)
+#define tx0_pulse_reset(cpudevice) (cpudevice)->state().set_state_int(TX0_RESET, 0)
+#define tx0_pulse_io_complete(cpudevice) (cpudevice)->state().set_state_int(TX0_IO_COMPLETE, 0)
struct tx0_reset_param_t
{
/* 8 standard I/O handlers:
- 0: cpy (8kW only)
- 1: r1l
- 2: dis
- 3: r3l
- 4: prt
- 5: reserved (for unimplemented typ instruction?)
- 6: p6h
- 7: p7h */
+ 0: cpy (8kW only)
+ 1: r1l
+ 2: dis
+ 3: r3l
+ 4: prt
+ 5: reserved (for unimplemented typ instruction?)
+ 6: p6h
+ 7: p7h */
void (*io_handlers[8])(device_t *device);
/* select instruction handler */
void (*sel_handler)(device_t *device);
diff --git a/src/emu/cpu/pic16c5x/16c5xdsm.c b/src/emu/cpu/pic16c5x/16c5xdsm.c
index 18fa45cb1a1..7a319b470c2 100644
--- a/src/emu/cpu/pic16c5x/16c5xdsm.c
+++ b/src/emu/cpu/pic16c5x/16c5xdsm.c
@@ -1,25 +1,25 @@
- /**************************************************************************\
- * Microchip PIC16C5x Emulator *
- * *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Addressing architecture is based on the Harvard addressing scheme. *
- * *
- * Many thanks to those involved in the i8039 Disassembler *
- * as this was based on it. *
- * *
- * *
- * *
- * A Address to jump to. *
- * B Bit address within an 8-bit file register. *
- * D Destination select (0 = store result in W (accumulator)) *
- * (1 = store result in file register) *
- * F Register file address (00-1F). *
- * K Literal field, constant data. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C5x Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Addressing architecture is based on the Harvard addressing scheme. *
+ * *
+ * Many thanks to those involved in the i8039 Disassembler *
+ * as this was based on it. *
+ * *
+ * *
+ * *
+ * A Address to jump to. *
+ * B Bit address within an 8-bit file register. *
+ * D Destination select (0 = store result in W (accumulator)) *
+ * (1 = store result in file register) *
+ * F Register file address (00-1F). *
+ * K Literal field, constant data. *
+ * *
+ \**************************************************************************/
#include "emu.h"
#include <ctype.h>
@@ -39,9 +39,9 @@ typedef unsigned short int word;
#define PTRS_PER_FORMAT 2
static const char *const regfile[32] = { "Reg$00 (IND)", "Reg$01 (TMR)", "Reg$02 (PCL)", "Reg$03 (ST)", "Reg$04 (FSR)", "Reg$05 (PTA)", "Reg$06 (PTB)", "Reg$07 (PTC)",
- "Reg$08", "Reg$09", "Reg$0A", "Reg$0B", "Reg$0C", "Reg$0D", "Reg$0E", "Reg$0F",
- "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
- "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F" };
+ "Reg$08", "Reg$09", "Reg$0A", "Reg$0B", "Reg$0C", "Reg$0D", "Reg$0E", "Reg$0F",
+ "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
+ "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F" };
static const char *const dest[2] = { "W", "Reg" };
@@ -87,11 +87,11 @@ static const char *const PIC16C5xFormats[] = {
#define MAX_OPS (((sizeof(PIC16C5xFormats) / sizeof(PIC16C5xFormats[0])) - 1) / PTRS_PER_FORMAT)
struct PIC16C5xOpcode {
- word mask; /* instruction mask */
- word bits; /* constant bits */
- word extcode; /* value that gets extension code */
- const char *parse; /* how to parse bits */
- const char *fmt; /* instruction format */
+ word mask; /* instruction mask */
+ word bits; /* constant bits */
+ word extcode; /* value that gets extension code */
+ const char *parse; /* how to parse bits */
+ const char *fmt; /* instruction format */
};
static PIC16C5xOpcode Op[MAX_OPS+1];
@@ -149,14 +149,14 @@ static void InitDasm16C5x(void)
CPU_DISASSEMBLE( pic16c5x )
{
- int a, b, d, f, k; /* these can all be filled in by parsing an instruction */
+ int a, b, d, f, k; /* these can all be filled in by parsing an instruction */
int i;
int op;
int cnt = 1;
int code;
int bit;
//char *buffertmp;
- const char *cp; /* character pointer in OpFormats */
+ const char *cp; /* character pointer in OpFormats */
UINT32 flags = 0;
rombase = oprom;
@@ -165,7 +165,7 @@ CPU_DISASSEMBLE( pic16c5x )
if (!OpInizialized) InitDasm16C5x();
- op = -1; /* no matching opcode */
+ op = -1; /* no matching opcode */
code = READOP16(2*pc);
for ( i = 0; i < MAX_OPS; i++)
{
@@ -185,7 +185,7 @@ CPU_DISASSEMBLE( pic16c5x )
return cnt;
}
//buffertmp = buffer;
- if (Op[op].extcode) /* Actually, theres no double length opcodes */
+ if (Op[op].extcode) /* Actually, theres no double length opcodes */
{
bit = 27;
code <<= 16;
diff --git a/src/emu/cpu/pic16c5x/dis16c5x.c b/src/emu/cpu/pic16c5x/dis16c5x.c
index d7e898f74c5..95a5183a515 100644
--- a/src/emu/cpu/pic16c5x/dis16c5x.c
+++ b/src/emu/cpu/pic16c5x/dis16c5x.c
@@ -1,13 +1,13 @@
- /**************************************************************************\
- * Microchip PIC16C5x Emulator *
- * *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Notes : Data is expected to be read from source file as LSB first. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C5x Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Notes : Data is expected to be read from source file as LSB first. *
+ * *
+ \**************************************************************************/
#include <stdio.h>
#include <string.h>
@@ -101,7 +101,7 @@ int main(int argc,char *argv[])
printf("$%03X: ",Counter);
for (ii = 0; ii < disasm_words; ii++)
{
- if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
+ if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
{
sprintf(String_Output,"???? dw %02.2X%02.2Xh (Past end of disassembly !)",Buffer[((Counter-1)*2)+1],Buffer[((Counter-1)*2)]);
}
diff --git a/src/emu/cpu/pic16c5x/pic16c5x.c b/src/emu/cpu/pic16c5x/pic16c5x.c
index 48c3022206e..4accbad3ea6 100644
--- a/src/emu/cpu/pic16c5x/pic16c5x.c
+++ b/src/emu/cpu/pic16c5x/pic16c5x.c
@@ -1,64 +1,64 @@
- /**************************************************************************\
- * Microchip PIC16C5x Emulator *
- * *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Addressing architecture is based on the Harvard addressing scheme. *
- * *
- * *
- * **** Change Log **** *
- * TLP (06-Apr-2003) *
- * - First Public release. *
- * BO (07-Apr-2003) Ver 1.01 *
- * - Renamed 'sleep' function to 'sleepic' to avoid C conflicts. *
- * TLP (09-Apr-2003) Ver 1.10 *
- * - Fixed modification of file register $03 (Status). *
- * - Corrected support for 7FFh (12-bit) size ROMs. *
- * - The 'call' and 'goto' instructions weren't correctly handling the *
- * STATUS page info correctly. *
- * - The FSR register was incorrectly oring the data with 0xe0 when read. *
- * - Prescaler masking information was set to 3 instead of 7. *
- * - Prescaler assign bit was set to 4 instead of 8. *
- * - Timer source and edge select flags/masks were wrong. *
- * - Corrected the memory bank selection in GET/SET_REGFILE and also the *
- * indirect register addressing. *
- * BMP (18-May-2003) Ver 1.11 *
- * - pic16c5x_get_reg functions were missing 'returns'. *
- * TLP (27-May-2003) Ver 1.12 *
- * - Fixed the WatchDog timer count. *
- * - The Prescaler rate was incorrectly being zeroed, instead of the *
- * actual Prescaler counter in the CLRWDT and SLEEP instructions. *
- * - Added masking to the FSR register. Upper unused bits are always 1. *
- * TLP (27-Aug-2009) Ver 1.13 *
- * - Indirect addressing was not taking into account special purpose *
- * memory mapped locations. *
- * - 'iorlw' instruction was saving the result to memory instead of *
- * the W register. *
- * - 'tris' instruction no longer modifies Port-C on PIC models that *
- * do not have Port-C implemented. *
- * TLP (07-Sep-2009) Ver 1.14 *
- * - Edge sense control for the T0 count input was incorrectly reversed *
- * *
- * *
- * **** Notes: **** *
- * PIC WatchDog Timer has a separate internal clock. For the moment, we're *
- * basing the count on a 4MHz input clock, since 4MHz is the typical *
- * input frequency (but by no means always). *
- * A single scaler is available for the Counter/Timer or WatchDog Timer. *
- * When connected to the Counter/Timer, it functions as a Prescaler, *
- * hence prescale overflows, tick the Counter/Timer. *
- * When connected to the WatchDog Timer, it functions as a Postscaler *
- * hence WatchDog Timer overflows, tick the Postscaler. This scenario *
- * means that the WatchDog timeout occurs when the Postscaler has *
- * reached the scaler rate value, not when the WatchDog reaches zero. *
- * CLRWDT should prevent the WatchDog Timer from timing out and generating *
- * a device reset, but how is not known. The manual also mentions that *
- * the WatchDog Timer can only be disabled during ROM programming, and *
- * no other means seem to exist??? *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C5x Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Addressing architecture is based on the Harvard addressing scheme. *
+ * *
+ * *
+ * **** Change Log **** *
+ * TLP (06-Apr-2003) *
+ * - First Public release. *
+ * BO (07-Apr-2003) Ver 1.01 *
+ * - Renamed 'sleep' function to 'sleepic' to avoid C conflicts. *
+ * TLP (09-Apr-2003) Ver 1.10 *
+ * - Fixed modification of file register $03 (Status). *
+ * - Corrected support for 7FFh (12-bit) size ROMs. *
+ * - The 'call' and 'goto' instructions weren't correctly handling the *
+ * STATUS page info correctly. *
+ * - The FSR register was incorrectly oring the data with 0xe0 when read. *
+ * - Prescaler masking information was set to 3 instead of 7. *
+ * - Prescaler assign bit was set to 4 instead of 8. *
+ * - Timer source and edge select flags/masks were wrong. *
+ * - Corrected the memory bank selection in GET/SET_REGFILE and also the *
+ * indirect register addressing. *
+ * BMP (18-May-2003) Ver 1.11 *
+ * - pic16c5x_get_reg functions were missing 'returns'. *
+ * TLP (27-May-2003) Ver 1.12 *
+ * - Fixed the WatchDog timer count. *
+ * - The Prescaler rate was incorrectly being zeroed, instead of the *
+ * actual Prescaler counter in the CLRWDT and SLEEP instructions. *
+ * - Added masking to the FSR register. Upper unused bits are always 1. *
+ * TLP (27-Aug-2009) Ver 1.13 *
+ * - Indirect addressing was not taking into account special purpose *
+ * memory mapped locations. *
+ * - 'iorlw' instruction was saving the result to memory instead of *
+ * the W register. *
+ * - 'tris' instruction no longer modifies Port-C on PIC models that *
+ * do not have Port-C implemented. *
+ * TLP (07-Sep-2009) Ver 1.14 *
+ * - Edge sense control for the T0 count input was incorrectly reversed *
+ * *
+ * *
+ * **** Notes: **** *
+ * PIC WatchDog Timer has a separate internal clock. For the moment, we're *
+ * basing the count on a 4MHz input clock, since 4MHz is the typical *
+ * input frequency (but by no means always). *
+ * A single scaler is available for the Counter/Timer or WatchDog Timer. *
+ * When connected to the Counter/Timer, it functions as a Prescaler, *
+ * hence prescale overflows, tick the Counter/Timer. *
+ * When connected to the WatchDog Timer, it functions as a Postscaler *
+ * hence WatchDog Timer overflows, tick the Postscaler. This scenario *
+ * means that the WatchDog timeout occurs when the Postscaler has *
+ * reached the scaler rate value, not when the WatchDog reaches zero. *
+ * CLRWDT should prevent the WatchDog Timer from timing out and generating *
+ * a device reset, but how is not known. The manual also mentions that *
+ * the WatchDog Timer can only be disabled during ROM programming, and *
+ * no other means seem to exist??? *
+ * *
+ \**************************************************************************/
#include "emu.h"
#include "debugger.h"
@@ -70,30 +70,30 @@
struct pic16c5x_state
{
/******************** CPU Internal Registers *******************/
- UINT16 PC;
- UINT16 PREVPC; /* previous program counter */
- UINT8 W;
- UINT8 OPTION;
- UINT16 CONFIG;
- UINT8 ALU;
- UINT16 WDT;
- UINT8 TRISA;
- UINT8 TRISB;
- UINT8 TRISC;
- UINT16 STACK[2];
- UINT16 prescaler; /* Note: this is really an 8-bit register */
- PAIR opcode;
- UINT8 *internalram;
-
- int icount;
- int reset_vector;
- int picmodel;
- int delay_timer;
- UINT16 temp_config;
- UINT8 old_T0;
- INT8 old_data;
- UINT8 picRAMmask;
- int inst_cycles;
+ UINT16 PC;
+ UINT16 PREVPC; /* previous program counter */
+ UINT8 W;
+ UINT8 OPTION;
+ UINT16 CONFIG;
+ UINT8 ALU;
+ UINT16 WDT;
+ UINT8 TRISA;
+ UINT8 TRISB;
+ UINT8 TRISC;
+ UINT16 STACK[2];
+ UINT16 prescaler; /* Note: this is really an 8-bit register */
+ PAIR opcode;
+ UINT8 *internalram;
+
+ int icount;
+ int reset_vector;
+ int picmodel;
+ int delay_timer;
+ UINT16 temp_config;
+ UINT8 old_T0;
+ INT8 old_data;
+ UINT8 picRAMmask;
+ int inst_cycles;
legacy_cpu_device *device;
@@ -107,10 +107,10 @@ INLINE pic16c5x_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PIC16C54 ||
- device->type() == PIC16C55 ||
- device->type() == PIC16C56 ||
- device->type() == PIC16C57 ||
- device->type() == PIC16C58);
+ device->type() == PIC16C55 ||
+ device->type() == PIC16C56 ||
+ device->type() == PIC16C57 ||
+ device->type() == PIC16C58);
return (pic16c5x_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -118,8 +118,8 @@ INLINE pic16c5x_state *get_safe_token(device_t *device)
/* opcode table entry */
struct pic16c5x_opcode
{
- UINT8 cycles;
- void (*function)(pic16c5x_state *);
+ UINT8 cycles;
+ void (*function)(pic16c5x_state *);
};
@@ -139,26 +139,26 @@ INLINE void update_internalram_ptr(pic16c5x_state *cpustate)
/************ Read the state of the T0 Clock input signal ************/
#define PIC16C5x_T0_In (cpustate->io->read_byte(PIC16C5x_T0))
-#define M_RDRAM(A) (((A) < 8) ? cpustate->internalram[A] : PIC16C5x_RAM_RDMEM(A))
-#define M_WRTRAM(A,V) do { if ((A) < 8) cpustate->internalram[A] = (V); else PIC16C5x_RAM_WRMEM(A,V); } while (0)
-#define M_RDOP(A) PIC16C5x_RDOP(A)
-#define P_IN(A) PIC16C5x_In(A)
-#define P_OUT(A,V) PIC16C5x_Out(A,V)
-#define S_T0_IN PIC16C5x_T0_In
-#define ADDR_MASK 0x7ff
+#define M_RDRAM(A) (((A) < 8) ? cpustate->internalram[A] : PIC16C5x_RAM_RDMEM(A))
+#define M_WRTRAM(A,V) do { if ((A) < 8) cpustate->internalram[A] = (V); else PIC16C5x_RAM_WRMEM(A,V); } while (0)
+#define M_RDOP(A) PIC16C5x_RDOP(A)
+#define P_IN(A) PIC16C5x_In(A)
+#define P_OUT(A,V) PIC16C5x_Out(A,V)
+#define S_T0_IN PIC16C5x_T0_In
+#define ADDR_MASK 0x7ff
-#define TMR0 internalram[1]
-#define PCL internalram[2]
-#define STATUS internalram[3]
-#define FSR internalram[4]
-#define PORTA internalram[5]
-#define PORTB internalram[6]
-#define PORTC internalram[7]
-#define INDF M_RDRAM(cpustate->FSR)
+#define TMR0 internalram[1]
+#define PCL internalram[2]
+#define STATUS internalram[3]
+#define FSR internalram[4]
+#define PORTA internalram[5]
+#define PORTB internalram[6]
+#define PORTC internalram[7]
+#define INDF M_RDRAM(cpustate->FSR)
-#define ADDR (cpustate->opcode.b.l & 0x1f)
+#define ADDR (cpustate->opcode.b.l & 0x1f)
#define RISING_EDGE_T0 (( (int)(T0_in - cpustate->old_T0) > 0) ? 1 : 0)
#define FALLING_EDGE_T0 (( (int)(T0_in - cpustate->old_T0) < 0) ? 1 : 0)
@@ -167,44 +167,44 @@ INLINE void update_internalram_ptr(pic16c5x_state *cpustate)
/******** The following is the Status Flag register definition. *********/
/* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | */
/* | PA | TO | PD | Z | DC | C | */
-#define PA_REG 0xe0 /* PA Program Page Preselect - bit 8 is unused here */
-#define TO_FLAG 0x10 /* TO Time Out flag (WatchDog) */
-#define PD_FLAG 0x08 /* PD Power Down flag */
-#define Z_FLAG 0x04 /* Z Zero Flag */
-#define DC_FLAG 0x02 /* DC Digit Carry/Borrow flag (Nibble) */
-#define C_FLAG 0x01 /* C Carry/Borrow Flag (Byte) */
+#define PA_REG 0xe0 /* PA Program Page Preselect - bit 8 is unused here */
+#define TO_FLAG 0x10 /* TO Time Out flag (WatchDog) */
+#define PD_FLAG 0x08 /* PD Power Down flag */
+#define Z_FLAG 0x04 /* Z Zero Flag */
+#define DC_FLAG 0x02 /* DC Digit Carry/Borrow flag (Nibble) */
+#define C_FLAG 0x01 /* C Carry/Borrow Flag (Byte) */
-#define PA (cpustate->STATUS & PA_REG)
-#define TO (cpustate->STATUS & TO_FLAG)
-#define PD (cpustate->STATUS & PD_FLAG)
-#define ZERO (cpustate->STATUS & Z_FLAG)
-#define DC (cpustate->STATUS & DC_FLAG)
-#define CARRY (cpustate->STATUS & C_FLAG)
+#define PA (cpustate->STATUS & PA_REG)
+#define TO (cpustate->STATUS & TO_FLAG)
+#define PD (cpustate->STATUS & PD_FLAG)
+#define ZERO (cpustate->STATUS & Z_FLAG)
+#define DC (cpustate->STATUS & DC_FLAG)
+#define CARRY (cpustate->STATUS & C_FLAG)
/******** The following is the Option Flag register definition. *********/
/* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | */
/* | 0 | 0 | TOCS | TOSE | PSA | PS | */
-#define T0CS_FLAG 0x20 /* TOCS Timer 0 clock source select */
-#define T0SE_FLAG 0x10 /* TOSE Timer 0 clock source edge select */
-#define PSA_FLAG 0x08 /* PSA Prescaler Assignment bit */
-#define PS_REG 0x07 /* PS Prescaler Rate select */
+#define T0CS_FLAG 0x20 /* TOCS Timer 0 clock source select */
+#define T0SE_FLAG 0x10 /* TOSE Timer 0 clock source edge select */
+#define PSA_FLAG 0x08 /* PSA Prescaler Assignment bit */
+#define PS_REG 0x07 /* PS Prescaler Rate select */
-#define T0CS (cpustate->OPTION & T0CS_FLAG)
-#define T0SE (cpustate->OPTION & T0SE_FLAG)
-#define PSA (cpustate->OPTION & PSA_FLAG)
-#define PS (cpustate->OPTION & PS_REG)
+#define T0CS (cpustate->OPTION & T0CS_FLAG)
+#define T0SE (cpustate->OPTION & T0SE_FLAG)
+#define PSA (cpustate->OPTION & PSA_FLAG)
+#define PS (cpustate->OPTION & PS_REG)
/******** The following is the Config Flag register definition. *********/
/* | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | */
/* | CP | WDTE | FOSC | */
/* CP Code Protect (ROM read protect) */
-#define WDTE_FLAG 0x04 /* WDTE WatchDog Timer enable */
-#define FOSC_FLAG 0x03 /* FOSC Oscillator source select */
+#define WDTE_FLAG 0x04 /* WDTE WatchDog Timer enable */
+#define FOSC_FLAG 0x03 /* FOSC Oscillator source select */
-#define WDTE (cpustate->CONFIG & WDTE_FLAG)
-#define FOSC (cpustate->CONFIG & FOSC_FLAG)
+#define WDTE (cpustate->CONFIG & WDTE_FLAG)
+#define FOSC (cpustate->CONFIG & FOSC_FLAG)
/************************************************************************
@@ -216,7 +216,7 @@ INLINE void update_internalram_ptr(pic16c5x_state *cpustate)
/* Easy bit position selectors */
-#define POS ((cpustate->opcode.b.l >> 5) & 7)
+#define POS ((cpustate->opcode.b.l >> 5) & 7)
static const unsigned int bit_clr[8] = { 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f };
static const unsigned int bit_set[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
@@ -284,92 +284,92 @@ INLINE void PUSH_STACK(pic16c5x_state *cpustate, UINT16 data)
-INLINE UINT8 GET_REGFILE(pic16c5x_state *cpustate, offs_t addr) /* Read from internal memory */
+INLINE UINT8 GET_REGFILE(pic16c5x_state *cpustate, offs_t addr) /* Read from internal memory */
{
UINT8 data;
- if (addr == 0) { /* Indirect addressing */
+ if (addr == 0) { /* Indirect addressing */
addr = (cpustate->FSR & cpustate->picRAMmask);
}
if ((cpustate->picmodel == 0x16C57) || (cpustate->picmodel == 0x16C58)) {
- addr |= (cpustate->FSR & 0x60); /* FSR bits 6-5 are used for banking in direct mode */
+ addr |= (cpustate->FSR & 0x60); /* FSR bits 6-5 are used for banking in direct mode */
}
if ((addr & 0x10) == 0) addr &= 0x0f;
switch(addr)
{
- case 00: /* Not an actual register, so return 0 */
+ case 00: /* Not an actual register, so return 0 */
data = 0;
break;
- case 04: data = (cpustate->FSR | (UINT8)(~cpustate->picRAMmask));
+ case 04: data = (cpustate->FSR | (UINT8)(~cpustate->picRAMmask));
break;
- case 05: data = P_IN(0);
+ case 05: data = P_IN(0);
data &= cpustate->TRISA;
data |= ((UINT8)(~cpustate->TRISA) & cpustate->PORTA);
- data &= 0x0f; /* 4-bit port (only lower 4 bits used) */
+ data &= 0x0f; /* 4-bit port (only lower 4 bits used) */
break;
- case 06: data = P_IN(1);
+ case 06: data = P_IN(1);
data &= cpustate->TRISB;
data |= ((UINT8)(~cpustate->TRISB) & cpustate->PORTB);
break;
- case 07: if ((cpustate->picmodel == 0x16C55) || (cpustate->picmodel == 0x16C57)) {
+ case 07: if ((cpustate->picmodel == 0x16C55) || (cpustate->picmodel == 0x16C57)) {
data = P_IN(2);
data &= cpustate->TRISC;
data |= ((UINT8)(~cpustate->TRISC) & cpustate->PORTC);
}
- else { /* PIC16C54, PIC16C56, PIC16C58 */
+ else { /* PIC16C54, PIC16C56, PIC16C58 */
data = M_RDRAM(addr);
}
break;
- default: data = M_RDRAM(addr);
+ default: data = M_RDRAM(addr);
break;
}
return data;
}
-INLINE void STORE_REGFILE(pic16c5x_state *cpustate, offs_t addr, UINT8 data) /* Write to internal memory */
+INLINE void STORE_REGFILE(pic16c5x_state *cpustate, offs_t addr, UINT8 data) /* Write to internal memory */
{
- if (addr == 0) { /* Indirect addressing */
+ if (addr == 0) { /* Indirect addressing */
addr = (cpustate->FSR & cpustate->picRAMmask);
}
if ((cpustate->picmodel == 0x16C57) || (cpustate->picmodel == 0x16C58)) {
- addr |= (cpustate->FSR & 0x60); /* FSR bits 6-5 are used for banking in direct mode */
+ addr |= (cpustate->FSR & 0x60); /* FSR bits 6-5 are used for banking in direct mode */
}
if ((addr & 0x10) == 0) addr &= 0x0f;
switch(addr)
{
- case 00: /* Not an actual register, nothing to save */
+ case 00: /* Not an actual register, nothing to save */
break;
- case 01: cpustate->delay_timer = 2; /* Timer starts after next two instructions */
- if (PSA == 0) cpustate->prescaler = 0; /* Must clear the Prescaler */
+ case 01: cpustate->delay_timer = 2; /* Timer starts after next two instructions */
+ if (PSA == 0) cpustate->prescaler = 0; /* Must clear the Prescaler */
cpustate->TMR0 = data;
break;
- case 02: cpustate->PCL = data;
+ case 02: cpustate->PCL = data;
cpustate->PC = ((cpustate->STATUS & PA_REG) << 4) | data;
break;
- case 03: cpustate->STATUS &= (UINT8)(~PA_REG); cpustate->STATUS |= (data & PA_REG);
+ case 03: cpustate->STATUS &= (UINT8)(~PA_REG); cpustate->STATUS |= (data & PA_REG);
break;
- case 04: cpustate->FSR = (data | (UINT8)(~cpustate->picRAMmask));
+ case 04: cpustate->FSR = (data | (UINT8)(~cpustate->picRAMmask));
break;
- case 05: data &= 0x0f; /* 4-bit port (only lower 4 bits used) */
+ case 05: data &= 0x0f; /* 4-bit port (only lower 4 bits used) */
P_OUT(0,data & (UINT8)(~cpustate->TRISA)); cpustate->PORTA = data;
break;
- case 06: P_OUT(1,data & (UINT8)(~cpustate->TRISB)); cpustate->PORTB = data;
+ case 06: P_OUT(1,data & (UINT8)(~cpustate->TRISB)); cpustate->PORTB = data;
break;
- case 07: if ((cpustate->picmodel == 0x16C55) || (cpustate->picmodel == 0x16C57)) {
+ case 07: if ((cpustate->picmodel == 0x16C55) || (cpustate->picmodel == 0x16C57)) {
P_OUT(2,data & (UINT8)(~cpustate->TRISC));
cpustate->PORTC = data;
}
- else { /* PIC16C54, PIC16C56, PIC16C58 */
+ else { /* PIC16C54, PIC16C56, PIC16C58 */
M_WRTRAM(addr, data);
}
break;
- default: M_WRTRAM(addr, data);
+ default: M_WRTRAM(addr, data);
break;
}
}
@@ -446,7 +446,7 @@ static void btfss(pic16c5x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -456,7 +456,7 @@ static void btfsc(pic16c5x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -510,7 +510,7 @@ static void decfsz(pic16c5x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -536,7 +536,7 @@ static void incfsz(pic16c5x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -637,18 +637,18 @@ static void tris(pic16c5x_state *cpustate)
{
switch(cpustate->opcode.b.l & 0x7)
{
- case 05: if (cpustate->TRISA == cpustate->W) break;
+ case 05: if (cpustate->TRISA == cpustate->W) break;
else { cpustate->TRISA = cpustate->W | 0xf0; P_OUT(0,cpustate->PORTA & (UINT8)(~cpustate->TRISA) & 0x0f); break; }
- case 06: if (cpustate->TRISB == cpustate->W) break;
+ case 06: if (cpustate->TRISB == cpustate->W) break;
else { cpustate->TRISB = cpustate->W; P_OUT(1,cpustate->PORTB & (UINT8)(~cpustate->TRISB)); break; }
- case 07: if ((cpustate->picmodel == 0x16C55) || (cpustate->picmodel == 0x16C57)) {
+ case 07: if ((cpustate->picmodel == 0x16C55) || (cpustate->picmodel == 0x16C57)) {
if (cpustate->TRISC == cpustate->W) break;
else { cpustate->TRISC = cpustate->W; P_OUT(2,cpustate->PORTC & (UINT8)(~cpustate->TRISC)); break; }
}
else {
illegal(cpustate); break;
}
- default: illegal(cpustate); break;
+ default: illegal(cpustate); break;
}
}
@@ -675,45 +675,45 @@ static void xorwf(pic16c5x_state *cpustate)
static const pic16c5x_opcode opcode_main[256]=
{
-/*00*/ {1, nop },{0, illegal },{1, movwf },{1, movwf },{1, clrw },{0, illegal },{1, clrf },{1, clrf },
-/*08*/ {1, subwf },{1, subwf },{1, subwf },{1, subwf },{1, decf },{1, decf },{1, decf },{1, decf },
-/*10*/ {1, iorwf },{1, iorwf },{1, iorwf },{1, iorwf },{1, andwf },{1, andwf },{1, andwf },{1, andwf },
-/*18*/ {1, xorwf },{1, xorwf },{1, xorwf },{1, xorwf },{1, addwf },{1, addwf },{1, addwf },{1, addwf },
-/*20*/ {1, movf },{1, movf },{1, movf },{1, movf },{1, comf },{1, comf },{1, comf },{1, comf },
-/*28*/ {1, incf },{1, incf },{1, incf },{1, incf },{1, decfsz },{1, decfsz },{1, decfsz },{1, decfsz },
-/*30*/ {1, rrf },{1, rrf },{1, rrf },{1, rrf },{1, rlf },{1, rlf },{1, rlf },{1, rlf },
-/*38*/ {1, swapf },{1, swapf },{1, swapf },{1, swapf },{1, incfsz },{1, incfsz },{1, incfsz },{1, incfsz },
-/*40*/ {1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },
-/*48*/ {1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },
-/*50*/ {1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },
-/*58*/ {1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },
-/*60*/ {1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },
-/*68*/ {1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },
-/*70*/ {1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },
-/*78*/ {1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },
-/*80*/ {2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },
-/*88*/ {2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },
-/*90*/ {2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },
-/*98*/ {2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },
-/*A0*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
-/*A8*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
-/*B0*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
-/*B8*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
-/*C0*/ {1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },
-/*C8*/ {1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },
-/*D0*/ {1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },
-/*D8*/ {1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },
-/*E0*/ {1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },
-/*E8*/ {1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },
-/*F0*/ {1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },
-/*F8*/ {1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw }
+/*00*/ {1, nop },{0, illegal },{1, movwf },{1, movwf },{1, clrw },{0, illegal },{1, clrf },{1, clrf },
+/*08*/ {1, subwf },{1, subwf },{1, subwf },{1, subwf },{1, decf },{1, decf },{1, decf },{1, decf },
+/*10*/ {1, iorwf },{1, iorwf },{1, iorwf },{1, iorwf },{1, andwf },{1, andwf },{1, andwf },{1, andwf },
+/*18*/ {1, xorwf },{1, xorwf },{1, xorwf },{1, xorwf },{1, addwf },{1, addwf },{1, addwf },{1, addwf },
+/*20*/ {1, movf },{1, movf },{1, movf },{1, movf },{1, comf },{1, comf },{1, comf },{1, comf },
+/*28*/ {1, incf },{1, incf },{1, incf },{1, incf },{1, decfsz },{1, decfsz },{1, decfsz },{1, decfsz },
+/*30*/ {1, rrf },{1, rrf },{1, rrf },{1, rrf },{1, rlf },{1, rlf },{1, rlf },{1, rlf },
+/*38*/ {1, swapf },{1, swapf },{1, swapf },{1, swapf },{1, incfsz },{1, incfsz },{1, incfsz },{1, incfsz },
+/*40*/ {1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },
+/*48*/ {1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },{1, bcf },
+/*50*/ {1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },
+/*58*/ {1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },{1, bsf },
+/*60*/ {1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },
+/*68*/ {1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },{1, btfsc },
+/*70*/ {1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },
+/*78*/ {1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },{1, btfss },
+/*80*/ {2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },
+/*88*/ {2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },{2, retlw },
+/*90*/ {2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },
+/*98*/ {2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },{2, call },
+/*A0*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
+/*A8*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
+/*B0*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
+/*B8*/ {2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },{2, goto_op },
+/*C0*/ {1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },
+/*C8*/ {1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },{1, movlw },
+/*D0*/ {1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },
+/*D8*/ {1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },{1, iorlw },
+/*E0*/ {1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },
+/*E8*/ {1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },{1, andlw },
+/*F0*/ {1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },
+/*F8*/ {1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw },{1, xorlw }
};
static const pic16c5x_opcode opcode_00x[16]=
{
-/*00*/ {1, nop },{0, illegal },{1, option },{1, sleepic },{1, clrwdt },{1, tris },{1, tris },{1, tris },
-/*08*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal }
+/*00*/ {1, nop },{0, illegal },{1, option },{1, sleepic },{1, clrwdt },{1, tris },{1, tris },{1, tris },
+/*08*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal }
};
@@ -842,7 +842,7 @@ static void pic16c5x_update_watchdog(pic16c5x_state *cpustate, int counts)
{
if (PSA) {
cpustate->prescaler++;
- if (cpustate->prescaler >= (1 << PS)) { /* Prescale values from 1 to 128 */
+ if (cpustate->prescaler >= (1 << PS)) { /* Prescale values from 1 to 128 */
cpustate->prescaler = 0;
CLR(cpustate->STATUS, TO_FLAG);
pic16c5x_soft_reset(cpustate);
@@ -865,9 +865,9 @@ static void pic16c5x_update_timer(pic16c5x_state *cpustate, int counts)
{
if (PSA == 0) {
cpustate->prescaler += counts;
- if (cpustate->prescaler >= (2 << PS)) { /* Prescale values from 2 to 256 */
+ if (cpustate->prescaler >= (2 << PS)) { /* Prescale values from 2 to 256 */
cpustate->TMR0 += (cpustate->prescaler / (2 << PS));
- cpustate->prescaler %= (2 << PS); /* Overflow prescaler */
+ cpustate->prescaler %= (2 << PS); /* Overflow prescaler */
}
}
else {
@@ -889,7 +889,7 @@ static CPU_EXECUTE( pic16c5x )
do
{
- if (PD == 0) /* Sleep Mode */
+ if (PD == 0) /* Sleep Mode */
{
cpustate->inst_cycles = 1;
debugger_instruction_hook(device, cpustate->PC);
@@ -907,31 +907,31 @@ static CPU_EXECUTE( pic16c5x )
cpustate->PC++;
cpustate->PCL++;
- if ((cpustate->opcode.w.l & 0xff0) != 0x000) { /* Do all opcodes except the 00? ones */
+ if ((cpustate->opcode.w.l & 0xff0) != 0x000) { /* Do all opcodes except the 00? ones */
cpustate->inst_cycles = opcode_main[((cpustate->opcode.w.l >> 4) & 0xff)].cycles;
(*opcode_main[((cpustate->opcode.w.l >> 4) & 0xff)].function)(cpustate);
}
- else { /* Opcode 0x00? has many opcodes in its minor nibble */
+ else { /* Opcode 0x00? has many opcodes in its minor nibble */
cpustate->inst_cycles = opcode_00x[(cpustate->opcode.b.l & 0x1f)].cycles;
(*opcode_00x[(cpustate->opcode.b.l & 0x1f)].function)(cpustate);
}
- if (T0CS) { /* Count mode */
+ if (T0CS) { /* Count mode */
T0_in = S_T0_IN;
if (T0_in) T0_in = 1;
- if (T0SE) { /* Count falling edge T0 input */
+ if (T0SE) { /* Count falling edge T0 input */
if (FALLING_EDGE_T0) {
pic16c5x_update_timer(cpustate, 1);
}
}
- else { /* Count rising edge T0 input */
+ else { /* Count rising edge T0 input */
if (RISING_EDGE_T0) {
pic16c5x_update_timer(cpustate, 1);
}
}
cpustate->old_T0 = T0_in;
}
- else { /* Timer mode */
+ else { /* Timer mode */
if (cpustate->delay_timer) {
cpustate->delay_timer--;
}
@@ -963,23 +963,23 @@ static CPU_SET_INFO( pic16c5x )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PIC16C5x_PC: cpustate->PC = info->i; cpustate->PCL = info->i & 0xff ;break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PC: cpustate->PC = info->i; cpustate->PCL = info->i & 0xff ;break;
/* This is actually not a stack pointer, but the stack contents */
/* Stack is a 2 level First In Last Out stack */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + PIC16C5x_STK1: cpustate->STACK[1] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_STK0: cpustate->STACK[0] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_W: cpustate->W = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_ALU: cpustate->ALU = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_STR: cpustate->STATUS = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_OPT: cpustate->OPTION = info->i & (T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG); break;
- case CPUINFO_INT_REGISTER + PIC16C5x_TMR0: cpustate->TMR0 = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_WDT: cpustate->WDT = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PSCL: cpustate->prescaler = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PRTA: cpustate->PORTA = info->i & 0x0f; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PRTB: cpustate->PORTB = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PRTC: cpustate->PORTC = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_FSR: cpustate->FSR = ((info->i & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_STK1: cpustate->STACK[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_STK0: cpustate->STACK[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_W: cpustate->W = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_ALU: cpustate->ALU = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_STR: cpustate->STATUS = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_OPT: cpustate->OPTION = info->i & (T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG); break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_TMR0: cpustate->TMR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_WDT: cpustate->WDT = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PSCL: cpustate->prescaler = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PRTA: cpustate->PORTA = info->i & 0x0f; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PRTB: cpustate->PORTB = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PRTC: cpustate->PORTC = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_FSR: cpustate->FSR = ((info->i & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
}
}
@@ -996,96 +996,96 @@ static CPU_GET_INFO( pic16c5x )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pic16c5x_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pic16c5x_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PIC16C5x_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PC: info->i = cpustate->PC; break;
/* This is actually not a stack pointer, but the stack contents */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + PIC16C5x_STK1: info->i = cpustate->STACK[1]; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_STK0: info->i = cpustate->STACK[0]; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_W: info->i = cpustate->W; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_ALU: info->i = cpustate->ALU; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_STR: info->i = cpustate->STATUS; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_OPT: info->i = cpustate->OPTION; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_TMR0: info->i = cpustate->TMR0; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_WDT: info->i = cpustate->WDT; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PSCL: info->i = cpustate->prescaler; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PRTA: info->i = cpustate->PORTA; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PRTB: info->i = cpustate->PORTB; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_PRTC: info->i = cpustate->PORTC; break;
- case CPUINFO_INT_REGISTER + PIC16C5x_FSR: info->i = ((cpustate->FSR & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_STK1: info->i = cpustate->STACK[1]; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_STK0: info->i = cpustate->STACK[0]; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_W: info->i = cpustate->W; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_ALU: info->i = cpustate->ALU; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_STR: info->i = cpustate->STATUS; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_OPT: info->i = cpustate->OPTION; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_TMR0: info->i = cpustate->TMR0; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_WDT: info->i = cpustate->WDT; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PSCL: info->i = cpustate->prescaler; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PRTA: info->i = cpustate->PORTA; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PRTB: info->i = cpustate->PORTB; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_PRTC: info->i = cpustate->PORTC; break;
+ case CPUINFO_INT_REGISTER + PIC16C5x_FSR: info->i = ((cpustate->FSR & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pic16c5x); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pic16c5x); break;
- case CPUINFO_FCT_RESET: /* set per-CPU */ break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pic16c5x); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pic16c5x); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pic16c5x); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pic16c5x); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pic16c5x); break;
+ case CPUINFO_FCT_RESET: /* set per-CPU */ break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pic16c5x); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pic16c5x); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pic16c5x); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C5x"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Microchip"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.14"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C5x"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Microchip"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.14"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%01x%c%c%c%c%c %c%c%c%03x",
(cpustate->STATUS & 0xe0) >> 5,
- cpustate->STATUS & 0x10 ? '.':'O', /* WDT Overflow */
- cpustate->STATUS & 0x08 ? 'P':'D', /* Power/Down */
- cpustate->STATUS & 0x04 ? 'Z':'.', /* Zero */
- cpustate->STATUS & 0x02 ? 'c':'b', /* Nibble Carry/Borrow */
- cpustate->STATUS & 0x01 ? 'C':'B', /* Carry/Borrow */
-
- cpustate->OPTION & 0x20 ? 'C':'T', /* Counter/Timer */
- cpustate->OPTION & 0x10 ? 'N':'P', /* Negative/Positive */
- cpustate->OPTION & 0x08 ? 'W':'T', /* WatchDog/Timer */
+ cpustate->STATUS & 0x10 ? '.':'O', /* WDT Overflow */
+ cpustate->STATUS & 0x08 ? 'P':'D', /* Power/Down */
+ cpustate->STATUS & 0x04 ? 'Z':'.', /* Zero */
+ cpustate->STATUS & 0x02 ? 'c':'b', /* Nibble Carry/Borrow */
+ cpustate->STATUS & 0x01 ? 'C':'B', /* Carry/Borrow */
+
+ cpustate->OPTION & 0x20 ? 'C':'T', /* Counter/Timer */
+ cpustate->OPTION & 0x10 ? 'N':'P', /* Negative/Positive */
+ cpustate->OPTION & 0x08 ? 'W':'T', /* WatchDog/Timer */
cpustate->OPTION & 0x08 ? (1<<(cpustate->OPTION&7)) : (2<<(cpustate->OPTION&7)) );
break;
- case CPUINFO_STR_REGISTER + PIC16C5x_PC: sprintf(info->s, "PC:%03X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_W: sprintf(info->s, "W:%02X", cpustate->W); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_ALU: sprintf(info->s, "ALU:%02X", cpustate->ALU); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_STR: sprintf(info->s, "STR:%02X", cpustate->STATUS); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_TMR0: sprintf(info->s, "TMR:%02X", cpustate->TMR0); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_WDT: sprintf(info->s, "WDT:%04X", cpustate->WDT); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_OPT: sprintf(info->s, "OPT:%02X", cpustate->OPTION); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_STK0: sprintf(info->s, "STK0:%03X", cpustate->STACK[0]); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_STK1: sprintf(info->s, "STK1:%03X", cpustate->STACK[1]); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_PRTA: sprintf(info->s, "PRTA:%01X", ((cpustate->PORTA) & 0x0f)); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_PRTB: sprintf(info->s, "PRTB:%02X", cpustate->PORTB); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_PRTC: sprintf(info->s, "PRTC:%02X", cpustate->PORTC); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_TRSA: sprintf(info->s, "TRSA:%01X", ((cpustate->TRISA) & 0x0f)); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_TRSB: sprintf(info->s, "TRSB:%02X", cpustate->TRISB); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_TRSC: sprintf(info->s, "TRSC:%02X", cpustate->TRISC); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_FSR: sprintf(info->s, "FSR:%02X", ((cpustate->FSR) & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
- case CPUINFO_STR_REGISTER + PIC16C5x_PSCL: sprintf(info->s, "PSCL:%c%02X", ((cpustate->OPTION & 0x08) ? 'W':'T'), cpustate->prescaler); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_PC: sprintf(info->s, "PC:%03X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_W: sprintf(info->s, "W:%02X", cpustate->W); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_ALU: sprintf(info->s, "ALU:%02X", cpustate->ALU); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_STR: sprintf(info->s, "STR:%02X", cpustate->STATUS); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_TMR0: sprintf(info->s, "TMR:%02X", cpustate->TMR0); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_WDT: sprintf(info->s, "WDT:%04X", cpustate->WDT); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_OPT: sprintf(info->s, "OPT:%02X", cpustate->OPTION); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_STK0: sprintf(info->s, "STK0:%03X", cpustate->STACK[0]); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_STK1: sprintf(info->s, "STK1:%03X", cpustate->STACK[1]); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_PRTA: sprintf(info->s, "PRTA:%01X", ((cpustate->PORTA) & 0x0f)); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_PRTB: sprintf(info->s, "PRTB:%02X", cpustate->PORTB); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_PRTC: sprintf(info->s, "PRTC:%02X", cpustate->PORTC); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_TRSA: sprintf(info->s, "TRSA:%01X", ((cpustate->TRISA) & 0x0f)); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_TRSB: sprintf(info->s, "TRSB:%02X", cpustate->TRISB); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_TRSC: sprintf(info->s, "TRSC:%02X", cpustate->TRISC); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_FSR: sprintf(info->s, "FSR:%02X", ((cpustate->FSR) & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
+ case CPUINFO_STR_REGISTER + PIC16C5x_PSCL: sprintf(info->s, "PSCL:%c%02X", ((cpustate->OPTION & 0x08) ? 'W':'T'), cpustate->prescaler); break;
}
}
@@ -1133,18 +1133,18 @@ CPU_GET_INFO( pic16c54 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c54); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c54_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c54_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c54); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c54_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c54_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C54"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C54"); break;
- default: CPU_GET_INFO_CALL(pic16c5x); break;
+ default: CPU_GET_INFO_CALL(pic16c5x); break;
}
}
@@ -1191,18 +1191,18 @@ CPU_GET_INFO( pic16c55 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c55); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c55_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c55_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c55); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c55_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c55_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C55"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C55"); break;
- default: CPU_GET_INFO_CALL(pic16c5x); break;
+ default: CPU_GET_INFO_CALL(pic16c5x); break;
}
}
@@ -1249,18 +1249,18 @@ CPU_GET_INFO( pic16c56 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 5; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c56); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c56_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c56_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c56); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c56_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c56_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C56"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C56"); break;
- default: CPU_GET_INFO_CALL(pic16c5x); break;
+ default: CPU_GET_INFO_CALL(pic16c5x); break;
}
}
@@ -1310,17 +1310,17 @@ CPU_GET_INFO( pic16c57 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c57); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c57_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c57_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c57); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c57_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c57_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C57"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C57"); break;
- default: CPU_GET_INFO_CALL(pic16c5x); break;
+ default: CPU_GET_INFO_CALL(pic16c5x); break;
}
}
@@ -1370,17 +1370,17 @@ CPU_GET_INFO( pic16c58 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c58); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c58_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c58_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c58); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c58_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c58_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C58"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C58"); break;
- default: CPU_GET_INFO_CALL(pic16c5x); break;
+ default: CPU_GET_INFO_CALL(pic16c5x); break;
}
}
diff --git a/src/emu/cpu/pic16c5x/pic16c5x.h b/src/emu/cpu/pic16c5x/pic16c5x.h
index 5e8937daba3..9685e69b453 100644
--- a/src/emu/cpu/pic16c5x/pic16c5x.h
+++ b/src/emu/cpu/pic16c5x/pic16c5x.h
@@ -1,13 +1,13 @@
- /**************************************************************************\
- * Microchip PIC16C5x Emulator *
- * *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Addressing architecture is based on the Harvard addressing scheme. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C5x Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Addressing architecture is based on the Harvard addressing scheme. *
+ * *
+ \**************************************************************************/
#pragma once
@@ -34,7 +34,7 @@ enum
PIC16C5x_PSCL
};
-#define PIC16C5x_T0 0x10
+#define PIC16C5x_T0 0x10
/****************************************************************************
@@ -57,4 +57,4 @@ DECLARE_LEGACY_CPU_DEVICE(PIC16C58, pic16c58);
CPU_DISASSEMBLE( pic16c5x );
-#endif /* __PIC16C5X_H__ */
+#endif /* __PIC16C5X_H__ */
diff --git a/src/emu/cpu/pic16c62x/16c62xdsm.c b/src/emu/cpu/pic16c62x/16c62xdsm.c
index 90edbf2adda..2d2ec4e1b44 100644
--- a/src/emu/cpu/pic16c62x/16c62xdsm.c
+++ b/src/emu/cpu/pic16c62x/16c62xdsm.c
@@ -1,28 +1,28 @@
- /**************************************************************************\
- * Microchip PIC16C62X Emulator *
- * *
- * Based On *
- * Microchip PIC16C5X Emulator *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Addressing architecture is based on the Harvard addressing scheme. *
- * *
- * Many thanks to those involved in the i8039 Disassembler *
- * as this was based on it. *
- * *
- * *
- * *
- * A Address to jump to. *
- * B Bit address within an 8-bit file register. *
- * D Destination select (0 = store result in W (accumulator)) *
- * (1 = store result in file register) *
- * F Register file address (00-1F). *
- * K Literal field, constant data. *
- * X Not used *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C62X Emulator *
+ * *
+ * Based On *
+ * Microchip PIC16C5X Emulator *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Addressing architecture is based on the Harvard addressing scheme. *
+ * *
+ * Many thanks to those involved in the i8039 Disassembler *
+ * as this was based on it. *
+ * *
+ * *
+ * *
+ * A Address to jump to. *
+ * B Bit address within an 8-bit file register. *
+ * D Destination select (0 = store result in W (accumulator)) *
+ * (1 = store result in file register) *
+ * F Register file address (00-1F). *
+ * K Literal field, constant data. *
+ * X Not used *
+ * *
+ \**************************************************************************/
#include "emu.h"
#include <ctype.h>
@@ -43,9 +43,9 @@ typedef unsigned short int word;
/* Registers bank 0/1 */
static const char *const regfile[32] = { "Reg$00 (INDF)", "Reg$01 (TMR0/OPTION)", "Reg$02 (PCL)", "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (PORTA/TRISA)", "Reg$06 (PORTB/TRISB)", "Reg$07",
- "Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIR1/PIE1)", "Reg$0D", "Reg$0E (none/PCON)", "Reg$0F",
- "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
- "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (CMCON/VRCON)" };
+ "Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIR1/PIE1)", "Reg$0D", "Reg$0E (none/PCON)", "Reg$0F",
+ "Reg$10", "Reg$11", "Reg$12", "Reg$13", "Reg$14", "Reg$15", "Reg$16", "Reg$17",
+ "Reg$18", "Reg$19", "Reg$1A", "Reg$1B", "Reg$1C", "Reg$1D", "Reg$1E", "Reg$1F (CMCON/VRCON)" };
/* Registers bank 1 */
/*static const char *const regfile1[32] = { "Reg$00 (INDF)", "Reg$01 (OPTION)", "Reg$02 (PCL)", "Reg$03 (STATUS)", "Reg$04 (FSR)", "Reg$05 (TRISA)", "Reg$06 (TRISB)", "Reg$07",
"Reg$08", "Reg$09", "Reg$0A (PCLATH)", "Reg$0B (INTCON)", "Reg$0C (PIE1)", "Reg$0D", "Reg$0E (PCON)", "Reg$0F",
@@ -97,11 +97,11 @@ static const char *const PIC16C62xFormats[] = {
#define MAX_OPS (((sizeof(PIC16C62xFormats) / sizeof(PIC16C62xFormats[0])) - 1) / PTRS_PER_FORMAT)
struct PIC16C62xOpcode {
- word mask; /* instruction mask */
- word bits; /* constant bits */
- word extcode; /* value that gets extension code */
- const char *parse; /* how to parse bits */
- const char *fmt; /* instruction format */
+ word mask; /* instruction mask */
+ word bits; /* constant bits */
+ word extcode; /* value that gets extension code */
+ const char *parse; /* how to parse bits */
+ const char *fmt; /* instruction format */
};
static PIC16C62xOpcode Op[MAX_OPS+1];
@@ -160,14 +160,14 @@ static void InitDasm16C5x(void)
CPU_DISASSEMBLE( pic16c62x )
{
- int a, b, d, f, k; /* these can all be filled in by parsing an instruction */
+ int a, b, d, f, k; /* these can all be filled in by parsing an instruction */
int i;
int op;
int cnt = 1;
int code;
int bit;
//char *buffertmp;
- const char *cp; /* character pointer in OpFormats */
+ const char *cp; /* character pointer in OpFormats */
UINT32 flags = 0;
rombase = oprom;
@@ -176,7 +176,7 @@ CPU_DISASSEMBLE( pic16c62x )
if (!OpInizialized) InitDasm16C5x();
- op = -1; /* no matching opcode */
+ op = -1; /* no matching opcode */
code = READOP16(2*pc);
for ( i = 0; i < MAX_OPS; i++)
{
@@ -196,7 +196,7 @@ CPU_DISASSEMBLE( pic16c62x )
return cnt;
}
//buffertmp = buffer;
- if (Op[op].extcode) /* Actually, theres no double length opcodes */
+ if (Op[op].extcode) /* Actually, theres no double length opcodes */
{
bit = 29;
code <<= 16;
diff --git a/src/emu/cpu/pic16c62x/dis16c62x.c b/src/emu/cpu/pic16c62x/dis16c62x.c
index 2da766d1d83..93aab3f5078 100644
--- a/src/emu/cpu/pic16c62x/dis16c62x.c
+++ b/src/emu/cpu/pic16c62x/dis16c62x.c
@@ -1,15 +1,15 @@
- /**************************************************************************\
- * Microchip PIC16C62X Emulator *
- * *
- * Based On *
- * Microchip PIC16C5X Emulator *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Notes : Data is expected to be read from source file as LSB first. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C62X Emulator *
+ * *
+ * Based On *
+ * Microchip PIC16C5X Emulator *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Notes : Data is expected to be read from source file as LSB first. *
+ * *
+ \**************************************************************************/
#include <stdio.h>
#include <string.h>
@@ -103,7 +103,7 @@ int main(int argc,char *argv[])
printf("$%03X: ",Counter);
for (ii = 0; ii < disasm_words; ii++)
{
- if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
+ if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
{
sprintf(String_Output,"???? dw %02.2X%02.2Xh (Past end of disassembly !)",Buffer[((Counter-1)*2)+1],Buffer[((Counter-1)*2)]);
}
diff --git a/src/emu/cpu/pic16c62x/pic16c62x.c b/src/emu/cpu/pic16c62x/pic16c62x.c
index 6d62c6e9e5f..58c513960a4 100644
--- a/src/emu/cpu/pic16c62x/pic16c62x.c
+++ b/src/emu/cpu/pic16c62x/pic16c62x.c
@@ -1,54 +1,54 @@
- /**************************************************************************\
- * Microchip PIC16C62X Emulator *
- * *
- * Based On *
- * Microchip PIC16C5X Emulator *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Addressing architecture is based on the Harvard addressing scheme. *
- * *
- * *
- * **** Change Log **** *
- * SZ (22-Oct-2009) *
- * - Improvements and tests *
- * SZ (2-Oct-2009) *
- * - Internal ram and registers *
- * SZ (12-Sep-2009) *
- * - Started working on it. *
- * *
- * *
- * **** TODO **** *
- * - Finish checking opcodes/instructions *
- * - Internal devices *
- * - Interrupts *
- * - Everything ! *
- * *
- * **** DONE **** *
- * - I/O ports *
- * - Savestates *
- * - Internal memory *
- * - New opcodes *
- * - Opcode disassembly *
- * *
- * **** Notes (from PIC16C5X): **** *
- * PIC WatchDog Timer has a separate internal clock. For the moment, we're *
- * basing the count on a 4MHz input clock, since 4MHz is the typical *
- * input frequency (but by no means always). *
- * A single scaler is available for the Counter/Timer or WatchDog Timer. *
- * When connected to the Counter/Timer, it functions as a Prescaler, *
- * hence prescale overflows, tick the Counter/Timer. *
- * When connected to the WatchDog Timer, it functions as a Postscaler *
- * hence WatchDog Timer overflows, tick the Postscaler. This scenario *
- * means that the WatchDog timeout occurs when the Postscaler has *
- * reached the scaler rate value, not when the WatchDog reaches zero. *
- * CLRWDT should prevent the WatchDog Timer from timing out and generating *
- * a device reset, but how is not known. The manual also mentions that *
- * the WatchDog Timer can only be disabled during ROM programming, and *
- * no other means seem to exist??? *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C62X Emulator *
+ * *
+ * Based On *
+ * Microchip PIC16C5X Emulator *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Addressing architecture is based on the Harvard addressing scheme. *
+ * *
+ * *
+ * **** Change Log **** *
+ * SZ (22-Oct-2009) *
+ * - Improvements and tests *
+ * SZ (2-Oct-2009) *
+ * - Internal ram and registers *
+ * SZ (12-Sep-2009) *
+ * - Started working on it. *
+ * *
+ * *
+ * **** TODO **** *
+ * - Finish checking opcodes/instructions *
+ * - Internal devices *
+ * - Interrupts *
+ * - Everything ! *
+ * *
+ * **** DONE **** *
+ * - I/O ports *
+ * - Savestates *
+ * - Internal memory *
+ * - New opcodes *
+ * - Opcode disassembly *
+ * *
+ * **** Notes (from PIC16C5X): **** *
+ * PIC WatchDog Timer has a separate internal clock. For the moment, we're *
+ * basing the count on a 4MHz input clock, since 4MHz is the typical *
+ * input frequency (but by no means always). *
+ * A single scaler is available for the Counter/Timer or WatchDog Timer. *
+ * When connected to the Counter/Timer, it functions as a Prescaler, *
+ * hence prescale overflows, tick the Counter/Timer. *
+ * When connected to the WatchDog Timer, it functions as a Postscaler *
+ * hence WatchDog Timer overflows, tick the Postscaler. This scenario *
+ * means that the WatchDog timeout occurs when the Postscaler has *
+ * reached the scaler rate value, not when the WatchDog reaches zero. *
+ * CLRWDT should prevent the WatchDog Timer from timing out and generating *
+ * a device reset, but how is not known. The manual also mentions that *
+ * the WatchDog Timer can only be disabled during ROM programming, and *
+ * no other means seem to exist??? *
+ * *
+ \**************************************************************************/
#include "emu.h"
#include "debugger.h"
@@ -60,30 +60,30 @@
struct pic16c62x_state
{
/******************** CPU Internal Registers *******************/
- UINT16 PC;
- UINT16 PREVPC; /* previous program counter */
- UINT8 W;
- UINT8 PCLATH; /* 0a,8a */
- UINT8 OPTION; /* 81 */
- UINT16 CONFIG;
- UINT8 ALU;
- UINT16 WDT;
- UINT8 TRISA; /* 85 */
- UINT8 TRISB; /* 86 */
- UINT16 STACK[8];
- UINT16 prescaler; /* Note: this is really an 8-bit register */
- PAIR opcode;
- UINT8 *internalram;
-
- int icount;
- int reset_vector;
- int picmodel;
- int delay_timer;
- UINT16 temp_config;
- UINT8 old_T0;
- INT8 old_data;
- UINT8 picRAMmask;
- int inst_cycles;
+ UINT16 PC;
+ UINT16 PREVPC; /* previous program counter */
+ UINT8 W;
+ UINT8 PCLATH; /* 0a,8a */
+ UINT8 OPTION; /* 81 */
+ UINT16 CONFIG;
+ UINT8 ALU;
+ UINT16 WDT;
+ UINT8 TRISA; /* 85 */
+ UINT8 TRISB; /* 86 */
+ UINT16 STACK[8];
+ UINT16 prescaler; /* Note: this is really an 8-bit register */
+ PAIR opcode;
+ UINT8 *internalram;
+
+ int icount;
+ int reset_vector;
+ int picmodel;
+ int delay_timer;
+ UINT16 temp_config;
+ UINT8 old_T0;
+ INT8 old_data;
+ UINT8 picRAMmask;
+ int inst_cycles;
legacy_cpu_device *device;
@@ -97,12 +97,12 @@ INLINE pic16c62x_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PIC16C620 ||
- device->type() == PIC16C620A ||
+ device->type() == PIC16C620A ||
// device->type() == PIC16CR620A ||
- device->type() == PIC16C621 ||
- device->type() == PIC16C621A ||
- device->type() == PIC16C622 ||
- device->type() == PIC16C622A);
+ device->type() == PIC16C621 ||
+ device->type() == PIC16C621A ||
+ device->type() == PIC16C622 ||
+ device->type() == PIC16C622A);
return (pic16c62x_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -110,15 +110,15 @@ INLINE pic16c62x_state *get_safe_token(device_t *device)
/* opcode table entry */
struct pic16c62x_opcode
{
- UINT8 cycles;
- void (*function)(pic16c62x_state *);
+ UINT8 cycles;
+ void (*function)(pic16c62x_state *);
};
/* instruction list entry */
struct pic16c62x_instruction
{
- char *format;
- void (*function)(pic16c62x_state *);
- UINT8 cycles;
+ char *format;
+ void (*function)(pic16c62x_state *);
+ UINT8 cycles;
};
@@ -135,23 +135,23 @@ INLINE void update_internalram_ptr(pic16c62x_state *cpustate)
/************ Read the state of the T0 Clock input signal ************/
#define PIC16C62x_T0_In (cpustate->io->read_byte(PIC16C62x_T0) >> 4)
-#define M_RDRAM(A) (((A) == 0) ? cpustate->internalram[0] : PIC16C62x_RAM_RDMEM(A))
-#define M_WRTRAM(A,V) do { if ((A) == 0) cpustate->internalram[0] = (V); else PIC16C62x_RAM_WRMEM(A,V); } while (0)
-#define M_RDOP(A) PIC16C62x_RDOP(A)
-#define P_IN(A) PIC16C62x_In(A)
-#define P_OUT(A,V) PIC16C62x_Out(A,V)
-#define S_T0_IN PIC16C62x_T0_In
-#define ADDR_MASK 0x1fff
+#define M_RDRAM(A) (((A) == 0) ? cpustate->internalram[0] : PIC16C62x_RAM_RDMEM(A))
+#define M_WRTRAM(A,V) do { if ((A) == 0) cpustate->internalram[0] = (V); else PIC16C62x_RAM_WRMEM(A,V); } while (0)
+#define M_RDOP(A) PIC16C62x_RDOP(A)
+#define P_IN(A) PIC16C62x_In(A)
+#define P_OUT(A,V) PIC16C62x_Out(A,V)
+#define S_T0_IN PIC16C62x_T0_In
+#define ADDR_MASK 0x1fff
-#define TMR0 internalram[1]
-#define PCL internalram[2]
-#define STATUS internalram[3]
-#define FSR internalram[4]
-#define PORTA internalram[5]
-#define PORTB internalram[6]
-#define INDF M_RDRAM(cpustate->FSR)
+#define TMR0 internalram[1]
+#define PCL internalram[2]
+#define STATUS internalram[3]
+#define FSR internalram[4]
+#define PORTA internalram[5]
+#define PORTB internalram[6]
+#define INDF M_RDRAM(cpustate->FSR)
#define RISING_EDGE_T0 (( (int)(T0_in - cpustate->old_T0) > 0) ? 1 : 0)
#define FALLING_EDGE_T0 (( (int)(T0_in - cpustate->old_T0) < 0) ? 1 : 0)
@@ -160,52 +160,52 @@ INLINE void update_internalram_ptr(pic16c62x_state *cpustate)
/******** The following is the Status Flag register definition. *********/
/* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | */
/* |IRP|RP1|RP0| TO | PD | Z | DC | C | */
-#define IRP_FLAG 0x80 /* IRP Register Bank Select bit (used for indirect addressing) */
-#define RP1_FLAG 0x40 /* RP1 Register Bank Select bits (used for direct addressing) */
-#define RP0_FLAG 0x20 /* RP0 Register Bank Select bits (used for direct addressing) */
-#define TO_FLAG 0x10 /* TO Time Out flag (WatchDog) */
-#define PD_FLAG 0x08 /* PD Power Down flag */
-#define Z_FLAG 0x04 /* Z Zero Flag */
-#define DC_FLAG 0x02 /* DC Digit Carry/Borrow flag (Nibble) */
-#define C_FLAG 0x01 /* C Carry/Borrow Flag (Byte) */
-
-#define IRP (cpustate->STATUS & IRP_FLAG)
-#define RP1 (cpustate->STATUS & RP1_FLAG)
-#define RP0 (cpustate->STATUS & RP0_FLAG)
-#define TO (cpustate->STATUS & TO_FLAG)
-#define PD (cpustate->STATUS & PD_FLAG)
-#define ZERO (cpustate->STATUS & Z_FLAG)
-#define DC (cpustate->STATUS & DC_FLAG)
-#define CARRY (cpustate->STATUS & C_FLAG)
-
-#define ADDR ((cpustate->opcode.b.l & 0x7f) | (RP0 << 2))
+#define IRP_FLAG 0x80 /* IRP Register Bank Select bit (used for indirect addressing) */
+#define RP1_FLAG 0x40 /* RP1 Register Bank Select bits (used for direct addressing) */
+#define RP0_FLAG 0x20 /* RP0 Register Bank Select bits (used for direct addressing) */
+#define TO_FLAG 0x10 /* TO Time Out flag (WatchDog) */
+#define PD_FLAG 0x08 /* PD Power Down flag */
+#define Z_FLAG 0x04 /* Z Zero Flag */
+#define DC_FLAG 0x02 /* DC Digit Carry/Borrow flag (Nibble) */
+#define C_FLAG 0x01 /* C Carry/Borrow Flag (Byte) */
+
+#define IRP (cpustate->STATUS & IRP_FLAG)
+#define RP1 (cpustate->STATUS & RP1_FLAG)
+#define RP0 (cpustate->STATUS & RP0_FLAG)
+#define TO (cpustate->STATUS & TO_FLAG)
+#define PD (cpustate->STATUS & PD_FLAG)
+#define ZERO (cpustate->STATUS & Z_FLAG)
+#define DC (cpustate->STATUS & DC_FLAG)
+#define CARRY (cpustate->STATUS & C_FLAG)
+
+#define ADDR ((cpustate->opcode.b.l & 0x7f) | (RP0 << 2))
/******** The following is the Option Flag register definition. *********/
/* | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | */
/* | RBPU | INTEDG | TOCS | TOSE | PSA | PS | */
-#define RBPU_FLAG 0x80 /* RBPU Pull-up Enable */
-#define INTEDG_FLAG 0x40 /* INTEDG Interrupt Edge Select */
-#define T0CS_FLAG 0x20 /* TOCS Timer 0 clock source select */
-#define T0SE_FLAG 0x10 /* TOSE Timer 0 clock source edge select */
-#define PSA_FLAG 0x08 /* PSA Prescaler Assignment bit */
-#define PS_REG 0x07 /* PS Prescaler Rate select */
-
-#define T0CS (cpustate->OPTION & T0CS_FLAG)
-#define T0SE (cpustate->OPTION & T0SE_FLAG)
-#define PSA (cpustate->OPTION & PSA_FLAG)
-#define PS (cpustate->OPTION & PS_REG)
+#define RBPU_FLAG 0x80 /* RBPU Pull-up Enable */
+#define INTEDG_FLAG 0x40 /* INTEDG Interrupt Edge Select */
+#define T0CS_FLAG 0x20 /* TOCS Timer 0 clock source select */
+#define T0SE_FLAG 0x10 /* TOSE Timer 0 clock source edge select */
+#define PSA_FLAG 0x08 /* PSA Prescaler Assignment bit */
+#define PS_REG 0x07 /* PS Prescaler Rate select */
+
+#define T0CS (cpustate->OPTION & T0CS_FLAG)
+#define T0SE (cpustate->OPTION & T0SE_FLAG)
+#define PSA (cpustate->OPTION & PSA_FLAG)
+#define PS (cpustate->OPTION & PS_REG)
/******** The following is the Config Flag register definition. *********/
/* | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | */
/* | CP | | BODEN | CP | PWRTE | WDTE | FOSC | */
/* CP Code Protect (ROM read protect) */
-#define BODEN_FLAG 0x40 /* BODEN Brown-out Reset Enable */
-#define PWRTE_FLAG 0x08 /* PWRTE Power-up Timer Enable */
-#define WDTE_FLAG 0x04 /* WDTE WatchDog Timer enable */
-#define FOSC_FLAG 0x03 /* FOSC Oscillator source select */
+#define BODEN_FLAG 0x40 /* BODEN Brown-out Reset Enable */
+#define PWRTE_FLAG 0x08 /* PWRTE Power-up Timer Enable */
+#define WDTE_FLAG 0x04 /* WDTE WatchDog Timer enable */
+#define FOSC_FLAG 0x03 /* FOSC Oscillator source select */
-#define WDTE (cpustate->CONFIG & WDTE_FLAG)
-#define FOSC (cpustate->CONFIG & FOSC_FLAG)
+#define WDTE (cpustate->CONFIG & WDTE_FLAG)
+#define FOSC (cpustate->CONFIG & FOSC_FLAG)
/************************************************************************
@@ -217,7 +217,7 @@ INLINE void update_internalram_ptr(pic16c62x_state *cpustate)
/* Easy bit position selectors */
-#define POS ((cpustate->opcode.w.l >> 7) & 7)
+#define POS ((cpustate->opcode.w.l >> 7) & 7)
static const unsigned int bit_clr[8] = { 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f };
static const unsigned int bit_set[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
@@ -297,17 +297,17 @@ INLINE void PUSH_STACK(pic16c62x_state *cpustate, UINT16 data)
-INLINE UINT8 GET_REGFILE(pic16c62x_state *cpustate, offs_t addr) /* Read from internal memory */
+INLINE UINT8 GET_REGFILE(pic16c62x_state *cpustate, offs_t addr) /* Read from internal memory */
{
UINT8 data;
- if (addr == 0) { /* Indirect addressing */
+ if (addr == 0) { /* Indirect addressing */
addr = (cpustate->FSR & cpustate->picRAMmask);
}
switch(addr)
{
- case 0x00: /* Not an actual register, so return 0 */
+ case 0x00: /* Not an actual register, so return 0 */
case 0x80:
data = 0;
break;
@@ -320,61 +320,61 @@ INLINE UINT8 GET_REGFILE(pic16c62x_state *cpustate, offs_t addr) /* Read from in
data = M_RDRAM(addr & 0x7f);
break;
case 0x84:
- case 0x04: data = (cpustate->FSR | (UINT8)(~cpustate->picRAMmask));
+ case 0x04: data = (cpustate->FSR | (UINT8)(~cpustate->picRAMmask));
break;
- case 0x05: data = P_IN(0);
+ case 0x05: data = P_IN(0);
data &= cpustate->TRISA;
data |= ((UINT8)(~cpustate->TRISA) & cpustate->PORTA);
- data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
+ data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
break;
- case 0x06: data = P_IN(1);
+ case 0x06: data = P_IN(1);
data &= cpustate->TRISB;
data |= ((UINT8)(~cpustate->TRISB) & cpustate->PORTB);
break;
case 0x8a:
- case 0x0a: data = cpustate->PCLATH;
+ case 0x0a: data = cpustate->PCLATH;
break;
- case 0x81: data = cpustate->OPTION;
+ case 0x81: data = cpustate->OPTION;
break;
- case 0x85: data = cpustate->TRISA;
+ case 0x85: data = cpustate->TRISA;
break;
- case 0x86: data = cpustate->TRISB;
+ case 0x86: data = cpustate->TRISB;
break;
- default: data = M_RDRAM(addr);
+ default: data = M_RDRAM(addr);
break;
}
return data;
}
-INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data) /* Write to internal memory */
+INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data) /* Write to internal memory */
{
- if (addr == 0) { /* Indirect addressing */
+ if (addr == 0) { /* Indirect addressing */
addr = (cpustate->FSR & cpustate->picRAMmask);
}
switch(addr)
{
case 0x80:
- case 0x00: /* Not an actual register, nothing to save */
+ case 0x00: /* Not an actual register, nothing to save */
break;
- case 0x01: cpustate->delay_timer = 2; /* Timer starts after next two instructions */
- if (PSA == 0) cpustate->prescaler = 0; /* Must clear the Prescaler */
+ case 0x01: cpustate->delay_timer = 2; /* Timer starts after next two instructions */
+ if (PSA == 0) cpustate->prescaler = 0; /* Must clear the Prescaler */
cpustate->TMR0 = data;
break;
case 0x82:
- case 0x02: cpustate->PCL = data;
+ case 0x02: cpustate->PCL = data;
cpustate->PC = (cpustate->PCLATH << 8) | data;
break;
case 0x83:
- case 0x03: cpustate->STATUS &= (UINT8)(~(IRP_FLAG|RP1_FLAG|RP0_FLAG)); cpustate->STATUS |= (data & (IRP_FLAG|RP1_FLAG|RP0_FLAG));
+ case 0x03: cpustate->STATUS &= (UINT8)(~(IRP_FLAG|RP1_FLAG|RP0_FLAG)); cpustate->STATUS |= (data & (IRP_FLAG|RP1_FLAG|RP0_FLAG));
break;
case 0x84:
- case 0x04: cpustate->FSR = (data | (UINT8)(~cpustate->picRAMmask));
+ case 0x04: cpustate->FSR = (data | (UINT8)(~cpustate->picRAMmask));
break;
- case 0x05: data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
+ case 0x05: data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
P_OUT(0,data & (UINT8)(~cpustate->TRISA)); cpustate->PORTA = data;
break;
- case 0x06: P_OUT(1,data & (UINT8)(~cpustate->TRISB)); cpustate->PORTB = data;
+ case 0x06: P_OUT(1,data & (UINT8)(~cpustate->TRISB)); cpustate->PORTB = data;
break;
case 0x8a:
case 0x0a:
@@ -382,12 +382,12 @@ INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data) /*
M_WRTRAM(0x0a, cpustate->PCLATH);
break;
case 0x8b:
- case 0x0b: M_WRTRAM(0x0b, data);
+ case 0x0b: M_WRTRAM(0x0b, data);
break;
- case 0x81: cpustate->OPTION = data;
+ case 0x81: cpustate->OPTION = data;
M_WRTRAM(0x81, data);
break;
- case 0x85: if (cpustate->TRISA != data)
+ case 0x85: if (cpustate->TRISA != data)
{
cpustate->TRISA = data | 0xf0;
P_OUT(2,cpustate->TRISA);
@@ -395,7 +395,7 @@ INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data) /*
M_WRTRAM(addr, data);
}
break;
- case 0x86: if (cpustate->TRISB != data)
+ case 0x86: if (cpustate->TRISB != data)
{
cpustate->TRISB = data;
P_OUT(3,cpustate->TRISB);
@@ -403,7 +403,7 @@ INLINE void STORE_REGFILE(pic16c62x_state *cpustate, offs_t addr, UINT8 data) /*
M_WRTRAM(addr, data);
}
break;
- default: M_WRTRAM(addr, data);
+ default: M_WRTRAM(addr, data);
break;
}
}
@@ -489,7 +489,7 @@ static void btfss(pic16c62x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -499,7 +499,7 @@ static void btfsc(pic16c62x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -553,7 +553,7 @@ static void decfsz(pic16c62x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -579,7 +579,7 @@ static void incfsz(pic16c62x_state *cpustate)
{
cpustate->PC++ ;
cpustate->PCL = cpustate->PC & 0xff;
- cpustate->inst_cycles += 1; /* Add NOP cycles */
+ cpustate->inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -703,9 +703,9 @@ static void tris(pic16c62x_state *cpustate)
switch(cpustate->opcode.b.l & 0x7)
{
- case 05: STORE_REGFILE(cpustate, 0x85, cpustate->W); break;
- case 06: STORE_REGFILE(cpustate, 0x86, cpustate->W); break;
- default: illegal(cpustate); break;
+ case 05: STORE_REGFILE(cpustate, 0x85, cpustate->W); break;
+ case 06: STORE_REGFILE(cpustate, 0x86, cpustate->W); break;
+ default: illegal(cpustate); break;
}
}
@@ -765,8 +765,8 @@ static const pic16c62x_instruction instructiontable[]=
{(char *)"11110xkkkkkkkk", sublw, 1},
{(char *)"111010kkkkkkkk", xorlw, 1},
{(char *)"00000001100100", clrwdt, 1},
- {(char *)"00000001100010", option, 1}, // deprecated
- {(char *)"00000001100fff", tris, 1}, // deprecated
+ {(char *)"00000001100010", option, 1}, // deprecated
+ {(char *)"00000001100fff", tris, 1}, // deprecated
{NULL, NULL, 0}
};
@@ -961,7 +961,7 @@ static void pic16c62x_update_watchdog(pic16c62x_state *cpustate, int counts)
{
if (PSA) {
cpustate->prescaler++;
- if (cpustate->prescaler >= (1 << PS)) { /* Prescale values from 1 to 128 */
+ if (cpustate->prescaler >= (1 << PS)) { /* Prescale values from 1 to 128 */
cpustate->prescaler = 0;
CLR(cpustate->STATUS, TO_FLAG);
pic16c62x_soft_reset(cpustate);
@@ -984,9 +984,9 @@ static void pic16c62x_update_timer(pic16c62x_state *cpustate, int counts)
{
if (PSA == 0) {
cpustate->prescaler += counts;
- if (cpustate->prescaler >= (2 << PS)) { /* Prescale values from 2 to 256 */
+ if (cpustate->prescaler >= (2 << PS)) { /* Prescale values from 2 to 256 */
cpustate->TMR0 += (cpustate->prescaler / (2 << PS));
- cpustate->prescaler %= (2 << PS); /* Overflow prescaler */
+ cpustate->prescaler %= (2 << PS); /* Overflow prescaler */
}
}
else {
@@ -1008,7 +1008,7 @@ static CPU_EXECUTE( pic16c62x )
do
{
- if (PD == 0) /* Sleep Mode */
+ if (PD == 0) /* Sleep Mode */
{
cpustate->inst_cycles = 1;
debugger_instruction_hook(device, cpustate->PC);
@@ -1029,22 +1029,22 @@ static CPU_EXECUTE( pic16c62x )
cpustate->inst_cycles = opcode_table[cpustate->opcode.w.l & 16383].cycles;
(*opcode_table[cpustate->opcode.w.l & 16383].function)(cpustate);
- if (T0CS) { /* Count mode */
+ if (T0CS) { /* Count mode */
T0_in = S_T0_IN;
if (T0_in) T0_in = 1;
- if (T0SE) { /* Count falling edge T0 input */
+ if (T0SE) { /* Count falling edge T0 input */
if (FALLING_EDGE_T0) {
pic16c62x_update_timer(cpustate, 1);
}
}
- else { /* Count rising edge T0 input */
+ else { /* Count rising edge T0 input */
if (RISING_EDGE_T0) {
pic16c62x_update_timer(cpustate, 1);
}
}
cpustate->old_T0 = T0_in;
}
- else { /* Timer mode */
+ else { /* Timer mode */
if (cpustate->delay_timer) {
cpustate->delay_timer--;
}
@@ -1076,27 +1076,27 @@ static CPU_SET_INFO( pic16c62x )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PIC16C62x_PC: cpustate->PC = info->i; cpustate->PCL = info->i & 0xff ;break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PC: cpustate->PC = info->i; cpustate->PCL = info->i & 0xff ;break;
/* This is actually not a stack pointer, but the stack contents */
/* Stack is a 8 level First In Last Out stack */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + PIC16C62x_STK7: cpustate->STACK[7] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK6: cpustate->STACK[6] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK5: cpustate->STACK[5] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK4: cpustate->STACK[4] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK3: cpustate->STACK[3] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK2: cpustate->STACK[2] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK1: cpustate->STACK[1] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK0: cpustate->STACK[0] = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_W: cpustate->W = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_ALU: cpustate->ALU = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_OPT: cpustate->OPTION = info->i & (RBPU_FLAG | INTEDG_FLAG | T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG); break;
- case CPUINFO_INT_REGISTER + PIC16C62x_TMR0: cpustate->TMR0 = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_WDT: cpustate->WDT = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_PSCL: cpustate->prescaler = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_PRTA: cpustate->PORTA = info->i & 0x1f; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_PRTB: cpustate->PORTB = info->i; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_FSR: cpustate->FSR = ((info->i & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK7: cpustate->STACK[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK6: cpustate->STACK[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK5: cpustate->STACK[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK4: cpustate->STACK[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK3: cpustate->STACK[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK2: cpustate->STACK[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK1: cpustate->STACK[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK0: cpustate->STACK[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_W: cpustate->W = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_ALU: cpustate->ALU = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_OPT: cpustate->OPTION = info->i & (RBPU_FLAG | INTEDG_FLAG | T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG); break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_TMR0: cpustate->TMR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_WDT: cpustate->WDT = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PSCL: cpustate->prescaler = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PRTA: cpustate->PORTA = info->i & 0x1f; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PRTB: cpustate->PORTB = info->i; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_FSR: cpustate->FSR = ((info->i & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
}
}
@@ -1113,105 +1113,105 @@ static CPU_GET_INFO( pic16c62x )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pic16c62x_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pic16c62x_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PIC16C62x_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PC: info->i = cpustate->PC; break;
/* This is actually not a stack pointer, but the stack contents */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + PIC16C62x_STK7: info->i = cpustate->STACK[7]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK6: info->i = cpustate->STACK[6]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK5: info->i = cpustate->STACK[5]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK4: info->i = cpustate->STACK[4]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK3: info->i = cpustate->STACK[3]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK2: info->i = cpustate->STACK[2]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK1: info->i = cpustate->STACK[1]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STK0: info->i = cpustate->STACK[0]; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_W: info->i = cpustate->W; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_ALU: info->i = cpustate->ALU; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_STR: info->i = cpustate->STATUS; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_OPT: info->i = cpustate->OPTION; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_TMR0: info->i = cpustate->TMR0; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_WDT: info->i = cpustate->WDT; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_PSCL: info->i = cpustate->prescaler; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_PRTA: info->i = cpustate->PORTA; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_PRTB: info->i = cpustate->PORTB; break;
- case CPUINFO_INT_REGISTER + PIC16C62x_FSR: info->i = ((cpustate->FSR & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK7: info->i = cpustate->STACK[7]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK6: info->i = cpustate->STACK[6]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK5: info->i = cpustate->STACK[5]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK4: info->i = cpustate->STACK[4]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK3: info->i = cpustate->STACK[3]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK2: info->i = cpustate->STACK[2]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK1: info->i = cpustate->STACK[1]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STK0: info->i = cpustate->STACK[0]; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_W: info->i = cpustate->W; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_ALU: info->i = cpustate->ALU; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_STR: info->i = cpustate->STATUS; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_OPT: info->i = cpustate->OPTION; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_TMR0: info->i = cpustate->TMR0; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_WDT: info->i = cpustate->WDT; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PSCL: info->i = cpustate->prescaler; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PRTA: info->i = cpustate->PORTA; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_PRTB: info->i = cpustate->PORTB; break;
+ case CPUINFO_INT_REGISTER + PIC16C62x_FSR: info->i = ((cpustate->FSR & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pic16c62x); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pic16c62x); break;
- case CPUINFO_FCT_RESET: /* set per-CPU */ break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pic16c62x); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pic16c62x); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pic16c62x); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pic16c62x); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pic16c62x); break;
+ case CPUINFO_FCT_RESET: /* set per-CPU */ break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(pic16c62x); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pic16c62x); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pic16c62x); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C62x"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Microchip"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C62x"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Microchip"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%01x%c%c%c%c%c %c%c%c%03x",
- (cpustate->STATUS & 0xe0) >> 5, /* Register bank */
- cpustate->STATUS & 0x10 ? '.':'O', /* WDT Overflow */
- cpustate->STATUS & 0x08 ? 'P':'D', /* Power/Down */
- cpustate->STATUS & 0x04 ? 'Z':'.', /* Zero */
- cpustate->STATUS & 0x02 ? 'c':'b', /* Nibble Carry/Borrow */
- cpustate->STATUS & 0x01 ? 'C':'B', /* Carry/Borrow */
-
- cpustate->OPTION & 0x20 ? 'C':'T', /* Counter/Timer */
- cpustate->OPTION & 0x10 ? 'N':'P', /* Negative/Positive */
- cpustate->OPTION & 0x08 ? 'W':'T', /* WatchDog/Timer */
+ (cpustate->STATUS & 0xe0) >> 5, /* Register bank */
+ cpustate->STATUS & 0x10 ? '.':'O', /* WDT Overflow */
+ cpustate->STATUS & 0x08 ? 'P':'D', /* Power/Down */
+ cpustate->STATUS & 0x04 ? 'Z':'.', /* Zero */
+ cpustate->STATUS & 0x02 ? 'c':'b', /* Nibble Carry/Borrow */
+ cpustate->STATUS & 0x01 ? 'C':'B', /* Carry/Borrow */
+
+ cpustate->OPTION & 0x20 ? 'C':'T', /* Counter/Timer */
+ cpustate->OPTION & 0x10 ? 'N':'P', /* Negative/Positive */
+ cpustate->OPTION & 0x08 ? 'W':'T', /* WatchDog/Timer */
cpustate->OPTION & 0x08 ? (1<<(cpustate->OPTION&7)) : (2<<(cpustate->OPTION&7)) );
break;
- case CPUINFO_STR_REGISTER + PIC16C62x_PC: sprintf(info->s, "PC:%03X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_W: sprintf(info->s, "W:%02X", cpustate->W); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_ALU: sprintf(info->s, "ALU:%02X", cpustate->ALU); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STR: sprintf(info->s, "STR:%02X", cpustate->STATUS); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_TMR0: sprintf(info->s, "TMR:%02X", cpustate->TMR0); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_WDT: sprintf(info->s, "WDT:%04X", cpustate->WDT); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_OPT: sprintf(info->s, "OPT:%02X", cpustate->OPTION); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK0: sprintf(info->s, "STK0:%03X", cpustate->STACK[0]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK1: sprintf(info->s, "STK1:%03X", cpustate->STACK[1]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK2: sprintf(info->s, "STK2:%03X", cpustate->STACK[2]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK3: sprintf(info->s, "STK3:%03X", cpustate->STACK[3]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK4: sprintf(info->s, "STK4:%03X", cpustate->STACK[4]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK5: sprintf(info->s, "STK5:%03X", cpustate->STACK[5]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK6: sprintf(info->s, "STK6:%03X", cpustate->STACK[6]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_STK7: sprintf(info->s, "STK7:%03X", cpustate->STACK[7]); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_PRTA: sprintf(info->s, "PRTA:%01X", ((cpustate->PORTA) & 0x1f)); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_PRTB: sprintf(info->s, "PRTB:%02X", cpustate->PORTB); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_TRSA: sprintf(info->s, "TRSA:%01X", ((cpustate->TRISA) & 0x1f)); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_TRSB: sprintf(info->s, "TRSB:%02X", cpustate->TRISB); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_FSR: sprintf(info->s, "FSR:%02X", ((cpustate->FSR) & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
- case CPUINFO_STR_REGISTER + PIC16C62x_PSCL: sprintf(info->s, "PSCL:%c%02X", ((cpustate->OPTION & 0x08) ? 'W':'T'), cpustate->prescaler); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_PC: sprintf(info->s, "PC:%03X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_W: sprintf(info->s, "W:%02X", cpustate->W); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_ALU: sprintf(info->s, "ALU:%02X", cpustate->ALU); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STR: sprintf(info->s, "STR:%02X", cpustate->STATUS); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_TMR0: sprintf(info->s, "TMR:%02X", cpustate->TMR0); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_WDT: sprintf(info->s, "WDT:%04X", cpustate->WDT); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_OPT: sprintf(info->s, "OPT:%02X", cpustate->OPTION); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK0: sprintf(info->s, "STK0:%03X", cpustate->STACK[0]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK1: sprintf(info->s, "STK1:%03X", cpustate->STACK[1]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK2: sprintf(info->s, "STK2:%03X", cpustate->STACK[2]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK3: sprintf(info->s, "STK3:%03X", cpustate->STACK[3]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK4: sprintf(info->s, "STK4:%03X", cpustate->STACK[4]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK5: sprintf(info->s, "STK5:%03X", cpustate->STACK[5]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK6: sprintf(info->s, "STK6:%03X", cpustate->STACK[6]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_STK7: sprintf(info->s, "STK7:%03X", cpustate->STACK[7]); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_PRTA: sprintf(info->s, "PRTA:%01X", ((cpustate->PORTA) & 0x1f)); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_PRTB: sprintf(info->s, "PRTB:%02X", cpustate->PORTB); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_TRSA: sprintf(info->s, "TRSA:%01X", ((cpustate->TRISA) & 0x1f)); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_TRSB: sprintf(info->s, "TRSB:%02X", cpustate->TRISB); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_FSR: sprintf(info->s, "FSR:%02X", ((cpustate->FSR) & cpustate->picRAMmask) | (UINT8)(~cpustate->picRAMmask)); break;
+ case CPUINFO_STR_REGISTER + PIC16C62x_PSCL: sprintf(info->s, "PSCL:%c%02X", ((cpustate->OPTION & 0x08) ? 'W':'T'), cpustate->prescaler); break;
}
}
@@ -1263,18 +1263,18 @@ CPU_GET_INFO( pic16c620 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c620); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c620_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c620_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c620); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c620_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c620_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C620"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C620"); break;
- default: CPU_GET_INFO_CALL(pic16c62x); break;
+ default: CPU_GET_INFO_CALL(pic16c62x); break;
}
}
@@ -1326,18 +1326,18 @@ CPU_GET_INFO( pic16c621 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c621); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c621_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c621_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c621); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c621_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c621_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C621"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C621"); break;
- default: CPU_GET_INFO_CALL(pic16c62x); break;
+ default: CPU_GET_INFO_CALL(pic16c62x); break;
}
}
@@ -1389,18 +1389,18 @@ CPU_GET_INFO( pic16c622 )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c622); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c622_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c622_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c622); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c622_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c622_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C622"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C622"); break;
- default: CPU_GET_INFO_CALL(pic16c62x); break;
+ default: CPU_GET_INFO_CALL(pic16c62x); break;
}
}
@@ -1454,18 +1454,18 @@ CPU_GET_INFO( pic16c620a )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c620a); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c620a_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c620a_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c620a); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c620a_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c620a_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C620A"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C620A"); break;
- default: CPU_GET_INFO_CALL(pic16c62x); break;
+ default: CPU_GET_INFO_CALL(pic16c62x); break;
}
}
@@ -1519,18 +1519,18 @@ CPU_GET_INFO( pic16c621a )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c621a); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c621a_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c621a_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c621a); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c621a_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c621a_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C621A"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C621A"); break;
- default: CPU_GET_INFO_CALL(pic16c62x); break;
+ default: CPU_GET_INFO_CALL(pic16c62x); break;
}
}
@@ -1584,18 +1584,18 @@ CPU_GET_INFO( pic16c622a )
{
switch (state)
{
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c622a); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c622a_rom); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c622a_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pic16c622a); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(pic16c622a_rom); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME(pic16c622a_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C622A"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PIC16C622A"); break;
- default: CPU_GET_INFO_CALL(pic16c62x); break;
+ default: CPU_GET_INFO_CALL(pic16c62x); break;
}
}
@@ -1607,4 +1607,3 @@ DEFINE_LEGACY_CPU_DEVICE(PIC16C621, pic16c621);
DEFINE_LEGACY_CPU_DEVICE(PIC16C621A, pic16c621a);
DEFINE_LEGACY_CPU_DEVICE(PIC16C622, pic16c622);
DEFINE_LEGACY_CPU_DEVICE(PIC16C622A, pic16c622a);
-
diff --git a/src/emu/cpu/pic16c62x/pic16c62x.h b/src/emu/cpu/pic16c62x/pic16c62x.h
index 2a5cd5c0562..17ab4d94f52 100644
--- a/src/emu/cpu/pic16c62x/pic16c62x.h
+++ b/src/emu/cpu/pic16c62x/pic16c62x.h
@@ -1,15 +1,15 @@
- /**************************************************************************\
- * Microchip PIC16C62X Emulator *
- * *
- * Based On *
- * Microchip PIC16C5X Emulator *
- * Copyright Tony La Porta *
- * Originally written for the MAME project. *
- * *
- * *
- * Addressing architecture is based on the Harvard addressing scheme. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Microchip PIC16C62X Emulator *
+ * *
+ * Based On *
+ * Microchip PIC16C5X Emulator *
+ * Copyright Tony La Porta *
+ * Originally written for the MAME project. *
+ * *
+ * *
+ * Addressing architecture is based on the Harvard addressing scheme. *
+ * *
+ \**************************************************************************/
#pragma once
@@ -31,13 +31,13 @@ enum
{
PIC16C62x_PC=1, PIC16C62x_STK0, PIC16C62x_STK1, PIC16C62x_STK2,
PIC16C62x_STK3, PIC16C62x_STK4, PIC16C62x_STK5, PIC16C62x_STK6,
- PIC16C62x_STK7, PIC16C62x_FSR, PIC16C62x_W, PIC16C62x_ALU,
- PIC16C62x_STR, PIC16C62x_OPT, PIC16C62x_TMR0, PIC16C62x_PRTA,
+ PIC16C62x_STK7, PIC16C62x_FSR, PIC16C62x_W, PIC16C62x_ALU,
+ PIC16C62x_STR, PIC16C62x_OPT, PIC16C62x_TMR0, PIC16C62x_PRTA,
PIC16C62x_PRTB, PIC16C62x_WDT, PIC16C62x_TRSA, PIC16C62x_TRSB,
PIC16C62x_PSCL
};
-#define PIC16C62x_T0 0
+#define PIC16C62x_T0 0
/****************************************************************************
@@ -62,4 +62,4 @@ DECLARE_LEGACY_CPU_DEVICE(PIC16C622A, pic16c622a);
CPU_DISASSEMBLE( pic16c62x );
-#endif /* __PIC16C62X_H__ */
+#endif /* __PIC16C62X_H__ */
diff --git a/src/emu/cpu/powerpc/drc_ops.c b/src/emu/cpu/powerpc/drc_ops.c
index 8dd99411072..1f15314df78 100644
--- a/src/emu/cpu/powerpc/drc_ops.c
+++ b/src/emu/cpu/powerpc/drc_ops.c
@@ -3,15 +3,15 @@
// it really seems like this should be elsewhere - like maybe the floating point checks can hang out someplace else
#include <math.h>
-#define USE_SSE2 0
-#define COMPILE_FPU 0
+#define USE_SSE2 0
+#define COMPILE_FPU 0
/* recompiler flags */
-#define RECOMPILE_UNIMPLEMENTED 0x0000
-#define RECOMPILE_SUCCESSFUL 0x0001
-#define RECOMPILE_SUCCESSFUL_CP(c,p) (RECOMPILE_SUCCESSFUL | (((c) & 0xff) << 16) | (((p) & 0xff) << 24))
-#define RECOMPILE_END_OF_STRING 0x0002
-#define RECOMPILE_ADD_DISPATCH 0x0004
+#define RECOMPILE_UNIMPLEMENTED 0x0000
+#define RECOMPILE_SUCCESSFUL 0x0001
+#define RECOMPILE_SUCCESSFUL_CP(c,p) (RECOMPILE_SUCCESSFUL | (((c) & 0xff) << 16) | (((p) & 0xff) << 24))
+#define RECOMPILE_END_OF_STRING 0x0002
+#define RECOMPILE_ADD_DISPATCH 0x0004
INLINE void emit_mov_r64_m64(x86code **emitptr, UINT8 reghi, UINT8 reglo, DECLARE_MEMPARAMS)
{
@@ -74,7 +74,7 @@ static void ppcdrc_reset(drc_core *drc)
drc_append_restore_volatiles(drc);
emit_mov_r32_m32(DRCTOP, REG_EAX, MBD(REG_ESP, 4));
emit_mov_r32_m32(DRCTOP, REG_ESP, MABS(&ppc.host_esp));
- emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
+ emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
emit_jmp_r32(DRCTOP, REG_EAX);
code_log("invoke_exception_handler:", ppc.invoke_exception_handler, drc->cache_top);
@@ -255,7 +255,7 @@ static UINT32 compile_one(drc_core *drc, UINT32 pc)
emit_jcc(DRCTOP, COND_NZ, drc->recompile);
/* code is up to date; do the exception */
- emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
+ emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.generate_isi_exception));
emit_jmp_r32(DRCTOP, REG_EAX);
return RECOMPILE_SUCCESSFUL | RECOMPILE_END_OF_STRING;
@@ -296,14 +296,14 @@ static UINT32 recompile_instruction(drc_core *drc, UINT32 pc, UINT32 *opptr)
code_log_add_entry(pc, opcode, drc->cache_top);
- if (opcode != 0) { // this is a little workaround for VF3
+ if (opcode != 0) { // this is a little workaround for VF3
switch(opcode >> 26)
{
- case 19: return ppc.optable19[(opcode >> 1) & 0x3ff](drc, opcode);
- case 31: return ppc.optable31[(opcode >> 1) & 0x3ff](drc, opcode);
- case 59: return ppc.optable59[(opcode >> 1) & 0x3ff](drc, opcode);
- case 63: return ppc.optable63[(opcode >> 1) & 0x3ff](drc, opcode);
- default: return ppc.optable[opcode >> 26](drc, opcode);
+ case 19: return ppc.optable19[(opcode >> 1) & 0x3ff](drc, opcode);
+ case 31: return ppc.optable31[(opcode >> 1) & 0x3ff](drc, opcode);
+ case 59: return ppc.optable59[(opcode >> 1) & 0x3ff](drc, opcode);
+ case 63: return ppc.optable63[(opcode >> 1) & 0x3ff](drc, opcode);
+ default: return ppc.optable[opcode >> 26](drc, opcode);
}
}
return RECOMPILE_SUCCESSFUL | RECOMPILE_END_OF_STRING;
@@ -329,10 +329,10 @@ static void append_generate_exception(drc_core *drc, UINT8 exception)
// Clear POW, EE, PR, FP, FE0, SE, BE, FE1, IR, DR, RI
emit_and_r32_imm(DRCTOP, REG_EAX, ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI));
// Set LE to ILE
- emit_and_r32_imm(DRCTOP, REG_EAX, ~MSR_LE); // clear LE first
+ emit_and_r32_imm(DRCTOP, REG_EAX, ~MSR_LE); // clear LE first
emit_test_r32_imm(DRCTOP, REG_EAX, MSR_ILE);
- emit_jcc_short_link(DRCTOP, COND_Z, &link1); // if Z == 0, bit == 1
- emit_or_r32_imm(DRCTOP, REG_EAX, MSR_LE); // set LE
+ emit_jcc_short_link(DRCTOP, COND_Z, &link1); // if Z == 0, bit == 1
+ emit_or_r32_imm(DRCTOP, REG_EAX, MSR_LE); // set LE
resolve_link(DRCTOP, &link1);
emit_mov_m32_r32(DRCTOP, MABS(&ppc_icount), REG_EBP);
emit_push_r32(DRCTOP, REG_EAX);
@@ -342,18 +342,18 @@ static void append_generate_exception(drc_core *drc, UINT8 exception)
if (ppc.is603)
{
- emit_mov_r32_imm(DRCTOP, REG_EDI, exception_vector[exception]); // first move the exception handler offset
- emit_test_r32_imm(DRCTOP, REG_EDX, MSR_IP); // test if the base should be 0xfff0 or EVPR
- emit_jcc_short_link(DRCTOP, COND_Z, &link2); // if Z == 1, bit == 0 means base == 0x00000000
- emit_or_r32_imm(DRCTOP, REG_EDI, 0xfff00000); // else base == 0xfff00000
+ emit_mov_r32_imm(DRCTOP, REG_EDI, exception_vector[exception]); // first move the exception handler offset
+ emit_test_r32_imm(DRCTOP, REG_EDX, MSR_IP); // test if the base should be 0xfff0 or EVPR
+ emit_jcc_short_link(DRCTOP, COND_Z, &link2); // if Z == 1, bit == 0 means base == 0x00000000
+ emit_or_r32_imm(DRCTOP, REG_EDI, 0xfff00000); // else base == 0xfff00000
resolve_link(DRCTOP, &link2);
}
else if (ppc.is602)
{
- emit_mov_r32_imm(DRCTOP, REG_EDI, exception_vector[exception]); // first move the exception handler offset
- emit_test_r32_imm(DRCTOP, REG_EDX, MSR_IP); // test if the base should be 0xfff0 or IBR
- emit_jcc_short_link(DRCTOP, COND_NZ, &link2); // if Z == 0, bit == 1 means base == 0xfff00000
- emit_or_r32_m32(DRCTOP, REG_EDI, MABS(&ppc.ibr)); // else base == IBR
+ emit_mov_r32_imm(DRCTOP, REG_EDI, exception_vector[exception]); // first move the exception handler offset
+ emit_test_r32_imm(DRCTOP, REG_EDX, MSR_IP); // test if the base should be 0xfff0 or IBR
+ emit_jcc_short_link(DRCTOP, COND_NZ, &link2); // if Z == 0, bit == 1 means base == 0xfff00000
+ emit_or_r32_m32(DRCTOP, REG_EDI, MABS(&ppc.ibr)); // else base == IBR
emit_jmp_short_link(DRCTOP, &link3);
resolve_link(DRCTOP, &link2);
emit_or_r32_imm(DRCTOP, REG_EDI, 0xfff00000);
@@ -361,10 +361,10 @@ static void append_generate_exception(drc_core *drc, UINT8 exception)
}
else
{
- emit_mov_r32_imm(DRCTOP, REG_EDI, exception_vector[exception]); // first move the exception handler offset
- emit_test_r32_imm(DRCTOP, REG_EDX, MSR_IP); // test if the base should be 0xfff0 or EVPR
- emit_jcc_short_link(DRCTOP, COND_NZ, &link2); // if Z == 0, bit == 1 means base == 0xfff00000
- emit_or_r32_m32(DRCTOP, REG_EDI, MABS(&EVPR)); // else base == EVPR
+ emit_mov_r32_imm(DRCTOP, REG_EDI, exception_vector[exception]); // first move the exception handler offset
+ emit_test_r32_imm(DRCTOP, REG_EDX, MSR_IP); // test if the base should be 0xfff0 or EVPR
+ emit_jcc_short_link(DRCTOP, COND_NZ, &link2); // if Z == 0, bit == 1 means base == 0xfff00000
+ emit_or_r32_m32(DRCTOP, REG_EDI, MABS(&EVPR)); // else base == EVPR
emit_jmp_short_link(DRCTOP, &link3);
resolve_link(DRCTOP, &link2);
emit_or_r32_imm(DRCTOP, REG_EDI, 0xfff00000);
@@ -373,15 +373,15 @@ static void append_generate_exception(drc_core *drc, UINT8 exception)
if (exception == EXCEPTION_IRQ)
{
- emit_and_m32_imm(DRCTOP, MABS(&ppc.exception_pending), ~0x1); // clear pending irq
+ emit_and_m32_imm(DRCTOP, MABS(&ppc.exception_pending), ~0x1); // clear pending irq
}
if (exception == EXCEPTION_DECREMENTER)
{
- emit_and_m32_imm(DRCTOP, MABS(&ppc.exception_pending), ~0x2); // clear pending decrementer exception
+ emit_and_m32_imm(DRCTOP, MABS(&ppc.exception_pending), ~0x2); // clear pending decrementer exception
}
if (exception == EXCEPTION_FIXED_INTERVAL_TIMER)
{
- emit_and_m32_imm(DRCTOP, MABS(&ppc.exception_pending), ~0x4); // clear pending fit exception
+ emit_and_m32_imm(DRCTOP, MABS(&ppc.exception_pending), ~0x4); // clear pending fit exception
}
drc_append_dispatcher(drc);
@@ -392,26 +392,26 @@ static void append_check_interrupts(drc_core *drc, int inline_generate)
if (ppc.is602 || ppc.is603)
{
emit_link link1, link2, link3, link4;
- emit_test_m32_imm(DRCTOP, MABS(&ppc.msr), MSR_EE); /* no interrupt if external interrupts are not enabled */
- emit_jcc_short_link(DRCTOP, COND_Z, &link1); /* ZF = 1 if bit == 0 */
+ emit_test_m32_imm(DRCTOP, MABS(&ppc.msr), MSR_EE); /* no interrupt if external interrupts are not enabled */
+ emit_jcc_short_link(DRCTOP, COND_Z, &link1); /* ZF = 1 if bit == 0 */
/* else check if any interrupt are pending */
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.exception_pending));
emit_cmp_r32_imm(DRCTOP, REG_EAX, 0);
- emit_jcc_short_link(DRCTOP, COND_Z, &link2); /* reg == 0, no exceptions are pending */
+ emit_jcc_short_link(DRCTOP, COND_Z, &link2); /* reg == 0, no exceptions are pending */
/* else handle the first pending exception */
- emit_test_r32_imm(DRCTOP, REG_EAX, 0x1); /* is it a IRQ? */
+ emit_test_r32_imm(DRCTOP, REG_EAX, 0x1); /* is it a IRQ? */
emit_jcc_short_link(DRCTOP, COND_Z, &link3);
- emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
+ emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.generate_interrupt_exception));
emit_jmp_r32(DRCTOP, REG_EAX);
resolve_link(DRCTOP, &link3);
- emit_test_r32_imm(DRCTOP, REG_EAX, 0x2); /* is it a decrementer exception */
+ emit_test_r32_imm(DRCTOP, REG_EAX, 0x2); /* is it a decrementer exception */
emit_jcc_short_link(DRCTOP, COND_Z, &link4);
- emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
+ emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.generate_decrementer_exception));
emit_jmp_r32(DRCTOP, REG_EAX);
resolve_link(DRCTOP, &link4);
@@ -422,16 +422,16 @@ static void append_check_interrupts(drc_core *drc, int inline_generate)
else
{
emit_link link1, link2, link3, link4, link5, link6;
- emit_test_m32_imm(DRCTOP, MABS(&ppc.msr), MSR_EE); /* no interrupt if external interrupts are not enabled */
- emit_jcc_short_link(DRCTOP, COND_Z, &link1); /* ZF = 1 if bit == 0 */
+ emit_test_m32_imm(DRCTOP, MABS(&ppc.msr), MSR_EE); /* no interrupt if external interrupts are not enabled */
+ emit_jcc_short_link(DRCTOP, COND_Z, &link1); /* ZF = 1 if bit == 0 */
/* else check if any interrupt are pending */
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.exception_pending));
emit_cmp_r32_imm(DRCTOP, REG_EAX, 0);
- emit_jcc_short_link(DRCTOP, COND_Z, &link2); /* reg == 0, no exceptions are pending */
+ emit_jcc_short_link(DRCTOP, COND_Z, &link2); /* reg == 0, no exceptions are pending */
/* else handle the first pending exception */
- emit_test_r32_imm(DRCTOP, REG_EAX, 0x1); /* is it a IRQ? */
+ emit_test_r32_imm(DRCTOP, REG_EAX, 0x1); /* is it a IRQ? */
emit_jcc_short_link(DRCTOP, COND_Z, &link3);
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.exisr));
@@ -439,7 +439,7 @@ static void append_check_interrupts(drc_core *drc, int inline_generate)
emit_cmp_r32_imm(DRCTOP, REG_EAX, 0);
emit_jcc_short_link(DRCTOP, COND_Z, &link4);
- emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
+ emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.generate_interrupt_exception));
emit_jmp_r32(DRCTOP, REG_EAX);
@@ -457,7 +457,7 @@ static void append_check_interrupts(drc_core *drc, int inline_generate)
emit_sub_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.fit_bit));
emit_mov_m32_r32(DRCTOP, MABS(&ppc_fit_trigger_cycle), REG_EAX);
- emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
+ emit_mov_m32_r32(DRCTOP, MABS(&SRR0), REG_EDI); /* save return address */
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.generate_fit_exception));
emit_jmp_r32(DRCTOP, REG_EAX);
@@ -520,8 +520,8 @@ static void append_set_cr0(drc_core *drc)
emit_or_r8_r8(DRCTOP, REG_BL, REG_AH);
emit_or_r8_r8(DRCTOP, REG_BL, REG_AL);
- emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
- emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
+ emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
+ emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
emit_mov_m8_r8(DRCTOP, MABS(&ppc.cr[0]), REG_BL);
}
@@ -557,13 +557,13 @@ static UINT32 recompile_addcx(drc_core *drc, UINT32 op)
{
emit_xor_r32_r32(DRCTOP, REG_EAX, REG_EAX);
emit_mov_r32_m32(DRCTOP, REG_EBX, MABS(&XER));
- emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
+ emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
emit_mov_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RA)));
emit_add_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RB)));
emit_mov_m32_r32(DRCTOP, MABS(&REG(RT)), REG_EDX);
- emit_setcc_r8(DRCTOP, COND_C, REG_AL); // carry to AL
- emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // shift to carry bit
+ emit_setcc_r8(DRCTOP, COND_C, REG_AL); // carry to AL
+ emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // shift to carry bit
emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX);
emit_mov_m32_r32(DRCTOP, MABS(&XER), REG_EBX);
@@ -608,13 +608,13 @@ static UINT32 recompile_addic(drc_core *drc, UINT32 op)
{
emit_xor_r32_r32(DRCTOP, REG_EAX, REG_EAX);
emit_mov_r32_m32(DRCTOP, REG_EBX, MABS(&XER));
- emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry bit
+ emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry bit
emit_mov_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RA)));
emit_add_r32_imm(DRCTOP, REG_EDX, SIMM16);
emit_mov_m32_r32(DRCTOP, MABS(&REG(RT)), REG_EDX);
- emit_setcc_r8(DRCTOP, COND_C, REG_AL); // carry to AL
- emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // shift to carry bit
+ emit_setcc_r8(DRCTOP, COND_C, REG_AL); // carry to AL
+ emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // shift to carry bit
emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX);
emit_mov_m32_r32(DRCTOP, MABS(&XER), REG_EBX);
@@ -625,13 +625,13 @@ static UINT32 recompile_addic_rc(drc_core *drc, UINT32 op)
{
emit_xor_r32_r32(DRCTOP, REG_EAX, REG_EAX);
emit_mov_r32_m32(DRCTOP, REG_EBX, MABS(&XER));
- emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry bit
+ emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry bit
emit_mov_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RA)));
emit_add_r32_imm(DRCTOP, REG_EDX, SIMM16);
emit_mov_m32_r32(DRCTOP, MABS(&REG(RT)), REG_EDX);
- emit_setcc_r8(DRCTOP, COND_C, REG_AL); // carry to AL
- emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // shift to carry bit
+ emit_setcc_r8(DRCTOP, COND_C, REG_AL); // carry to AL
+ emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // shift to carry bit
emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX);
emit_mov_m32_r32(DRCTOP, MABS(&XER), REG_EBX);
@@ -764,7 +764,7 @@ static UINT32 recompile_bcx(drc_core *drc, UINT32 op)
emit_mov_m32_imm(DRCTOP, MABS(&LR), temp_ppc_pc + 4);
}
- if (BO == 20) /* condition is always true, so the basic block ends here */
+ if (BO == 20) /* condition is always true, so the basic block ends here */
{
append_branch_or_dispatch(drc, newpc, 1);
@@ -795,17 +795,17 @@ static UINT32 recompile_bcx(drc_core *drc, UINT32 op)
{
do_link2 = 1;
emit_movzx_r32_m8(DRCTOP, REG_EAX, MABS(&ppc.cr[(BI)/4]));
- emit_test_r32_imm(DRCTOP, REG_EAX, 1 << (3 - ((BI) & 0x3))); // test if condition register bit is set
+ emit_test_r32_imm(DRCTOP, REG_EAX, 1 << (3 - ((BI) & 0x3))); // test if condition register bit is set
// if BO[3] == 0, branch if condition == FALSE (bit zero)
if ((BO & 0x8) == 0)
{
- emit_jcc_near_link(DRCTOP, COND_NZ, &link2); // bit not zero, skip branch
+ emit_jcc_near_link(DRCTOP, COND_NZ, &link2); // bit not zero, skip branch
}
// if BO[3] == 1, branch if condition == TRUE (bit not zero)
else
{
- emit_jcc_near_link(DRCTOP, COND_Z, &link2); // bit zero, skip branch
+ emit_jcc_near_link(DRCTOP, COND_Z, &link2); // bit zero, skip branch
}
}
@@ -829,9 +829,9 @@ static UINT32 recompile_bcctrx(drc_core *drc, UINT32 op)
emit_link link1 = {0} ,link2 = {0};
int do_link1 = 0, do_link2 = 0;
- if (BO == 20) /* condition is always true, so the basic block ends here */
+ if (BO == 20) /* condition is always true, so the basic block ends here */
{
- emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&CTR)); // mov edi, CTR
+ emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&CTR)); // mov edi, CTR
if( LKBIT ) {
emit_mov_m32_imm(DRCTOP, MABS(&LR), temp_ppc_pc + 4);
@@ -863,22 +863,22 @@ static UINT32 recompile_bcctrx(drc_core *drc, UINT32 op)
{
do_link2 = 1;
emit_movzx_r32_m8(DRCTOP, REG_EAX, MABS(&ppc.cr[(BI)/4]));
- emit_test_r32_imm(DRCTOP, REG_EAX, 1 << (3 - ((BI) & 0x3))); // test if condition register bit is set
+ emit_test_r32_imm(DRCTOP, REG_EAX, 1 << (3 - ((BI) & 0x3))); // test if condition register bit is set
// if BO[3] == 0, branch if condition == FALSE (bit zero)
if ((BO & 0x8) == 0)
{
- emit_jcc_near_link(DRCTOP, COND_NZ, &link2); // bit not zero, skip branch
+ emit_jcc_near_link(DRCTOP, COND_NZ, &link2); // bit not zero, skip branch
}
// if BO[3] == 1, branch if condition == TRUE (bit not zero)
else
{
- emit_jcc_near_link(DRCTOP, COND_Z, &link2); // bit zero, skip branch
+ emit_jcc_near_link(DRCTOP, COND_Z, &link2); // bit zero, skip branch
}
}
// take the branch
- emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&CTR)); // mov edi, CTR
+ emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&CTR)); // mov edi, CTR
if( LKBIT ) {
emit_mov_m32_imm(DRCTOP, MABS(&LR), temp_ppc_pc + 4);
}
@@ -906,9 +906,9 @@ static UINT32 recompile_bclrx(drc_core *drc, UINT32 op)
emit_link link1 = {0}, link2 = {0};
int do_link1 = 0, do_link2 = 0;
- if (BO == 20) /* condition is always true, so the basic block ends here */
+ if (BO == 20) /* condition is always true, so the basic block ends here */
{
- emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&LR)); // mov edi, LR
+ emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&LR)); // mov edi, LR
if( LKBIT ) {
emit_mov_m32_imm(DRCTOP, MABS(&LR), temp_ppc_pc + 4);
@@ -940,22 +940,22 @@ static UINT32 recompile_bclrx(drc_core *drc, UINT32 op)
{
do_link2 = 1;
emit_movzx_r32_m8(DRCTOP, REG_EAX, MABS(&ppc.cr[(BI)/4]));
- emit_test_r32_imm(DRCTOP, REG_EAX, 1 << (3 - ((BI) & 0x3))); // test if condition register bit is set
+ emit_test_r32_imm(DRCTOP, REG_EAX, 1 << (3 - ((BI) & 0x3))); // test if condition register bit is set
// if BO[3] == 0, branch if condition == FALSE (bit zero)
if ((BO & 0x8) == 0)
{
- emit_jcc_near_link(DRCTOP, COND_NZ, &link2); // bit not zero, skip branch
+ emit_jcc_near_link(DRCTOP, COND_NZ, &link2); // bit not zero, skip branch
}
// if BO[3] == 1, branch if condition == TRUE (bit not zero)
else
{
- emit_jcc_near_link(DRCTOP, COND_Z, &link2); // bit zero, skip branch
+ emit_jcc_near_link(DRCTOP, COND_Z, &link2); // bit zero, skip branch
}
}
// take the branch
- emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&LR)); // mov edi, LR
+ emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&LR)); // mov edi, LR
if( LKBIT ) {
emit_mov_m32_imm(DRCTOP, MABS(&LR), temp_ppc_pc + 4);
}
@@ -994,8 +994,8 @@ static UINT32 recompile_cmp(drc_core *drc, UINT32 op)
emit_or_r8_r8(DRCTOP, REG_BL, REG_AH);
emit_or_r8_r8(DRCTOP, REG_BL, REG_AL);
- emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
- emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
+ emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
+ emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
emit_mov_m8_r8(DRCTOP, MABS(&ppc.cr[CRFD]), REG_BL);
return RECOMPILE_SUCCESSFUL_CP(1,4);
@@ -1017,8 +1017,8 @@ static UINT32 recompile_cmpi(drc_core *drc, UINT32 op)
emit_or_r8_r8(DRCTOP, REG_BL, REG_AH);
emit_or_r8_r8(DRCTOP, REG_BL, REG_AL);
- emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
- emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
+ emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
+ emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
emit_mov_m8_r8(DRCTOP, MABS(&ppc.cr[CRFD]), REG_BL);
return RECOMPILE_SUCCESSFUL_CP(1,4);
@@ -1040,8 +1040,8 @@ static UINT32 recompile_cmpl(drc_core *drc, UINT32 op)
emit_or_r8_r8(DRCTOP, REG_BL, REG_AH);
emit_or_r8_r8(DRCTOP, REG_BL, REG_AL);
- emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
- emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
+ emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
+ emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
emit_mov_m8_r8(DRCTOP, MABS(&ppc.cr[CRFD]), REG_BL);
return RECOMPILE_SUCCESSFUL_CP(1,4);
@@ -1063,8 +1063,8 @@ static UINT32 recompile_cmpli(drc_core *drc, UINT32 op)
emit_or_r8_r8(DRCTOP, REG_BL, REG_AH);
emit_or_r8_r8(DRCTOP, REG_BL, REG_AL);
- emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
- emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
+ emit_bt_m32_imm(DRCTOP, MABS(&XER), 31); // set XER SO bit to carry
+ emit_adc_r32_imm(DRCTOP, REG_EBX, 0); // effectively sets bit 0 to carry
emit_mov_m8_r8(DRCTOP, MABS(&ppc.cr[CRFD]), REG_BL);
return RECOMPILE_SUCCESSFUL_CP(1,4);
@@ -1076,7 +1076,7 @@ static UINT32 recompile_cntlzw(drc_core *drc, UINT32 op)
emit_mov_r32_imm(DRCTOP, REG_EDX, 31);
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&REG(RT)));
emit_bsr_r32_r32(DRCTOP, REG_EAX, REG_EAX);
- emit_setcc_r8(DRCTOP, COND_Z, REG_BL); // if all zeros, set BL to 1, so result becomes 32
+ emit_setcc_r8(DRCTOP, COND_Z, REG_BL); // if all zeros, set BL to 1, so result becomes 32
emit_sub_r32_r32(DRCTOP, REG_EDX, REG_EAX);
emit_add_r32_r32(DRCTOP, REG_EDX, REG_EBX);
emit_mov_m32_r32(DRCTOP, MABS(&REG(RA)), REG_EDX);
@@ -1676,11 +1676,11 @@ static UINT32 recompile_mfmsr(drc_core *drc, UINT32 op)
static UINT32 recompile_mfspr(drc_core *drc, UINT32 op)
{
- if (SPR == SPR_LR) // optimized case, LR
+ if (SPR == SPR_LR) // optimized case, LR
{
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&LR));
}
- else if(SPR == SPR_CTR) // optimized case, CTR
+ else if(SPR == SPR_CTR) // optimized case, CTR
{
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&CTR));
}
@@ -1723,11 +1723,11 @@ static UINT32 recompile_mtmsr(drc_core *drc, UINT32 op)
static UINT32 recompile_mtspr(drc_core *drc, UINT32 op)
{
emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&REG(RS)));
- if (SPR == SPR_LR) // optimized case, LR
+ if (SPR == SPR_LR) // optimized case, LR
{
emit_mov_m32_r32(DRCTOP, MABS(&LR), REG_EAX);
}
- else if(SPR == SPR_CTR) // optimized case, CTR
+ else if(SPR == SPR_CTR) // optimized case, CTR
{
emit_mov_m32_r32(DRCTOP, MABS(&CTR), REG_EAX);
}
@@ -1892,11 +1892,11 @@ static UINT32 recompile_oris(drc_core *drc, UINT32 op)
static UINT32 recompile_rfi(drc_core *drc, UINT32 op)
{
emit_mov_m32_r32(DRCTOP, MABS(&ppc_icount), REG_EBP);
- emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&ppc.srr0)); /* get saved PC from SRR0 */
- emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.srr1)); /* get saved MSR from SRR1 */
+ emit_mov_r32_m32(DRCTOP, REG_EDI, MABS(&ppc.srr0)); /* get saved PC from SRR0 */
+ emit_mov_r32_m32(DRCTOP, REG_EAX, MABS(&ppc.srr1)); /* get saved MSR from SRR1 */
emit_push_r32(DRCTOP, REG_EAX);
- emit_call(DRCTOP, (x86code *)ppc_set_msr); /* set MSR */
+ emit_call(DRCTOP, (x86code *)ppc_set_msr); /* set MSR */
emit_add_r32_imm(DRCTOP, REG_ESP, 4);
emit_mov_r32_m32(DRCTOP, REG_EBP, MABS(&ppc_icount));
@@ -1942,7 +1942,7 @@ static UINT32 recompile_rlwnmx(drc_core *drc, UINT32 op)
{
UINT32 mask = GET_ROTATE_MASK(MB, ME);
- emit_mov_r32_m32(DRCTOP, REG_ECX, MABS(&REG(RB))); // x86 rotate instruction use only 5 bits, so no need to mask this
+ emit_mov_r32_m32(DRCTOP, REG_ECX, MABS(&REG(RB))); // x86 rotate instruction use only 5 bits, so no need to mask this
emit_mov_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RS)));
emit_rol_r32_cl(DRCTOP, REG_EDX);
emit_and_r32_imm(DRCTOP, REG_EDX, mask);
@@ -2382,13 +2382,13 @@ static UINT32 recompile_subfcx(drc_core *drc, UINT32 op)
{
emit_xor_r32_r32(DRCTOP, REG_EAX, REG_EAX);
emit_mov_r32_m32(DRCTOP, REG_EBX, MABS(&XER));
- emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
+ emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
emit_mov_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RB)));
emit_sub_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RA)));
emit_mov_m32_r32(DRCTOP, MABS(&REG(RT)), REG_EDX);
- emit_setcc_r8(DRCTOP, COND_NC, REG_AL); // subtract carry is inverse
- emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // move carry to correct location in XER
- emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX); // insert carry to XER
+ emit_setcc_r8(DRCTOP, COND_NC, REG_AL); // subtract carry is inverse
+ emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // move carry to correct location in XER
+ emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX); // insert carry to XER
emit_mov_m32_r32(DRCTOP, MABS(&XER), REG_EBX);
//if (OEBIT) {
@@ -2408,15 +2408,15 @@ static UINT32 recompile_subfex(drc_core *drc, UINT32 op)
emit_mov_r32_m32(DRCTOP, REG_EBX, MABS(&XER));
emit_mov_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RB)));
emit_mov_r32_m32(DRCTOP, REG_ECX, MABS(&REG(RA)));
- emit_bt_r32_imm(DRCTOP, REG_EBX, 29); // XER carry to carry flag
- emit_cmc(DRCTOP); // invert carry
+ emit_bt_r32_imm(DRCTOP, REG_EBX, 29); // XER carry to carry flag
+ emit_cmc(DRCTOP); // invert carry
emit_adc_r32_imm(DRCTOP, REG_ECX, 0);
emit_sub_r32_r32(DRCTOP, REG_EDX, REG_ECX);
emit_mov_m32_r32(DRCTOP, MABS(&REG(RT)), REG_EDX);
- emit_setcc_r8(DRCTOP, COND_NC, REG_AL); // subtract carry is inverse
- emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
- emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // move carry to correct location in XER
- emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX); // insert carry to XER
+ emit_setcc_r8(DRCTOP, COND_NC, REG_AL); // subtract carry is inverse
+ emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
+ emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // move carry to correct location in XER
+ emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX); // insert carry to XER
emit_mov_m32_r32(DRCTOP, MABS(&XER), REG_EBX);
if (OEBIT) {
@@ -2434,13 +2434,13 @@ static UINT32 recompile_subfic(drc_core *drc, UINT32 op)
{
emit_xor_r32_r32(DRCTOP, REG_EAX, REG_EAX);
emit_mov_r32_m32(DRCTOP, REG_EBX, MABS(&XER));
- emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
+ emit_and_r32_imm(DRCTOP, REG_EBX, ~0x20000000); // clear carry
emit_mov_r32_imm(DRCTOP, REG_EDX, SIMM16);
emit_sub_r32_m32(DRCTOP, REG_EDX, MABS(&REG(RA)));
emit_mov_m32_r32(DRCTOP, MABS(&REG(RT)), REG_EDX);
- emit_setcc_r8(DRCTOP, COND_NC, REG_AL); // subtract carry is inverse
- emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // move carry to correct location in XER
- emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX); // insert carry to XER
+ emit_setcc_r8(DRCTOP, COND_NC, REG_AL); // subtract carry is inverse
+ emit_shl_r32_imm(DRCTOP, REG_EAX, 29); // move carry to correct location in XER
+ emit_or_r32_r32(DRCTOP, REG_EBX, REG_EAX); // insert carry to XER
emit_mov_m32_r32(DRCTOP, MABS(&XER), REG_EBX);
return RECOMPILE_SUCCESSFUL_CP(1,4);
@@ -2487,23 +2487,23 @@ static UINT32 recompile_tw(drc_core *drc, UINT32 op)
emit_cmp_r32_r32(DRCTOP, REG_EAX, REG_EDX);
if (RT & 0x10) {
- emit_jcc_near_link(DRCTOP, COND_L, &link1); // less than = signed <
+ emit_jcc_near_link(DRCTOP, COND_L, &link1); // less than = signed <
do_link1 = 1;
}
if (RT & 0x08) {
- emit_jcc_near_link(DRCTOP, COND_G, &link2); // greater = signed >
+ emit_jcc_near_link(DRCTOP, COND_G, &link2); // greater = signed >
do_link2 = 1;
}
if (RT & 0x04) {
- emit_jcc_near_link(DRCTOP, COND_E, &link3); // equal
+ emit_jcc_near_link(DRCTOP, COND_E, &link3); // equal
do_link3 = 1;
}
if (RT & 0x02) {
- emit_jcc_near_link(DRCTOP, COND_B, &link4); // below = unsigned <
+ emit_jcc_near_link(DRCTOP, COND_B, &link4); // below = unsigned <
do_link4 = 1;
}
if (RT & 0x01) {
- emit_jcc_near_link(DRCTOP, COND_A, &link5); // above = unsigned >
+ emit_jcc_near_link(DRCTOP, COND_A, &link5); // above = unsigned >
do_link5 = 1;
}
emit_jmp_near_link(DRCTOP, &link6);
@@ -2547,23 +2547,23 @@ static UINT32 recompile_twi(drc_core *drc, UINT32 op)
emit_cmp_r32_r32(DRCTOP, REG_EAX, REG_EDX);
if (RT & 0x10) {
- emit_jcc_near_link(DRCTOP, COND_L, &link1); // less than = signed <
+ emit_jcc_near_link(DRCTOP, COND_L, &link1); // less than = signed <
do_link1 = 1;
}
if (RT & 0x08) {
- emit_jcc_near_link(DRCTOP, COND_G, &link2); // greater = signed >
+ emit_jcc_near_link(DRCTOP, COND_G, &link2); // greater = signed >
do_link2 = 1;
}
if (RT & 0x04) {
- emit_jcc_near_link(DRCTOP, COND_E, &link3); // equal
+ emit_jcc_near_link(DRCTOP, COND_E, &link3); // equal
do_link3 = 1;
}
if (RT & 0x02) {
- emit_jcc_near_link(DRCTOP, COND_B, &link4); // below = unsigned <
+ emit_jcc_near_link(DRCTOP, COND_B, &link4); // below = unsigned <
do_link4 = 1;
}
if (RT & 0x01) {
- emit_jcc_near_link(DRCTOP, COND_A, &link5); // above = unsigned >
+ emit_jcc_near_link(DRCTOP, COND_A, &link5); // above = unsigned >
do_link5 = 1;
}
emit_jmp_near_link(DRCTOP, &link6);
@@ -2729,7 +2729,7 @@ static UINT32 recompile_lfs(drc_core *drc,UINT32 op)
emit_call(DRCTOP, (genf*)READ32);
emit_add_r32_imm(DRCTOP, REG_ESP, 4);
emit_movd_r128_r32(DRCTOP, REG_XMM0, REG_EAX);
- emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
+ emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
emit_movq_m64_r128(DRCTOP, MABS(&FPR(RT)), REG_XMM1);
#else
emit_push_imm(DRCTOP, op);
@@ -2752,7 +2752,7 @@ static UINT32 recompile_lfsu(drc_core *drc, UINT32 op)
emit_call(DRCTOP, (x86code *)READ32);
emit_add_r32_imm(DRCTOP, REG_ESP, 4);
emit_movd_r128_r32(DRCTOP, REG_XMM0, REG_EAX);
- emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
+ emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
emit_movq_m64_r128(DRCTOP, MABS(&FPR(RT)), REG_XMM1);
#else
emit_push_imm(DRCTOP, op);
@@ -2805,7 +2805,7 @@ static UINT32 recompile_stfs(drc_core *drc, UINT32 op)
emit_mov_m32_r32(DRCTOP, MABS(&ppc_icount), REG_EBP);
#if USE_SSE2
emit_movq_r128_m64(DRCTOP, REG_XMM0, MABS(&FPR(RT)));
- emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
+ emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
emit_movd_r32_r128(DRCTOP, REG_EAX, REG_XMM1);
emit_push_r32(DRCTOP, REG_EAX);
if (RA == 0)
@@ -2835,7 +2835,7 @@ static UINT32 recompile_stfsu(drc_core *drc, UINT32 op)
emit_mov_m32_r32(DRCTOP, MABS(&ppc_icount), REG_EBP);
#if USE_SSE2
emit_movq_r128_m64(DRCTOP, REG_XMM0, MABS(&FPR(RT)));
- emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
+ emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
emit_movd_r32_r128(DRCTOP, REG_EAX, REG_XMM1);
emit_push_r32(DRCTOP, REG_EAX);
@@ -2939,7 +2939,7 @@ static UINT32 recompile_lfsux(drc_core *drc, UINT32 op)
emit_call(DRCTOP, (x86code *)READ32);
emit_add_r32_imm(DRCTOP, REG_ESP, 4);
emit_movd_r128_r32(DRCTOP, REG_XMM0, REG_EAX);
- emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
+ emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
emit_movq_m64_r128(DRCTOP, MABS(&FPR(RT)), REG_XMM1);
#else
emit_push_imm(DRCTOP, op);
@@ -2964,7 +2964,7 @@ static UINT32 recompile_lfsx(drc_core *drc, UINT32 op)
emit_call(DRCTOP, (x86code *)READ32);
emit_add_r32_imm(DRCTOP, REG_ESP, 4);
emit_movd_r128_r32(DRCTOP, REG_XMM0, REG_EAX);
- emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
+ emit_cvtss2sd_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert float to double
emit_movq_m64_r128(DRCTOP, MABS(&FPR(RT)), REG_XMM1);
#else
emit_push_imm(DRCTOP, op);
@@ -3109,7 +3109,7 @@ static UINT32 recompile_stfsux(drc_core *drc, UINT32 op)
emit_mov_m32_r32(DRCTOP, MABS(&ppc_icount), REG_EBP);
#if USE_SSE2
emit_movq_r128_m64(DRCTOP, REG_XMM0, MABS(&FPR(RT)));
- emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
+ emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
emit_movd_r32_r128(DRCTOP, REG_EAX, REG_XMM1);
emit_push_r32(DRCTOP, REG_EAX);
@@ -3134,7 +3134,7 @@ static UINT32 recompile_stfsx(drc_core *drc, UINT32 op)
emit_mov_m32_r32(DRCTOP, MABS(&ppc_icount), REG_EBP);
#if USE_SSE2
emit_movq_r128_m64(DRCTOP, REG_XMM0, MABS(&FPR(RT)));
- emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
+ emit_cvtsd2ss_r128_r128(DRCTOP, REG_XMM1, REG_XMM0); // convert double to float
emit_movd_r32_r128(DRCTOP, REG_EAX, REG_XMM1);
emit_push_r32(DRCTOP, REG_EAX);
@@ -3797,4 +3797,3 @@ static UINT32 recompile_tlbld(drc_core *drc, UINT32 op)
{
return RECOMPILE_SUCCESSFUL_CP(1,4);
}
-
diff --git a/src/emu/cpu/powerpc/drc_ops.h b/src/emu/cpu/powerpc/drc_ops.h
index ad9fe332994..f06748bfec1 100644
--- a/src/emu/cpu/powerpc/drc_ops.h
+++ b/src/emu/cpu/powerpc/drc_ops.h
@@ -1,143 +1,143 @@
static const PPC_OPCODE ppcdrc_opcode_common[] =
{
/*code subcode handler */
- { 31, 266, recompile_addx },
- { 31, 266 | 512, recompile_addx },
- { 31, 10, recompile_addcx },
- { 31, 10 | 512, recompile_addcx },
- { 31, 138, recompile_addex },
- { 31, 138 | 512, recompile_addex },
- { 14, -1, recompile_addi },
- { 12, -1, recompile_addic },
- { 13, -1, recompile_addic_rc },
- { 15, -1, recompile_addis },
- { 31, 234, recompile_addmex },
- { 31, 234 | 512, recompile_addmex },
- { 31, 202, recompile_addzex },
- { 31, 202 | 512, recompile_addzex },
- { 31, 28, recompile_andx },
- { 31, 28 | 512, recompile_andx },
- { 31, 60, recompile_andcx },
- { 28, -1, recompile_andi_rc },
- { 29, -1, recompile_andis_rc },
- { 18, -1, recompile_bx },
- { 16, -1, recompile_bcx },
- { 19, 528, recompile_bcctrx },
- { 19, 16, recompile_bclrx },
- { 31, 0, recompile_cmp },
- { 11, -1, recompile_cmpi },
- { 31, 32, recompile_cmpl },
- { 10, -1, recompile_cmpli },
- { 31, 26, recompile_cntlzw },
- { 19, 257, recompile_crand },
- { 19, 129, recompile_crandc },
- { 19, 289, recompile_creqv },
- { 19, 225, recompile_crnand },
- { 19, 33, recompile_crnor },
- { 19, 449, recompile_cror },
- { 19, 417, recompile_crorc },
- { 19, 193, recompile_crxor },
- { 31, 86, recompile_dcbf },
- { 31, 470, recompile_dcbi },
- { 31, 54, recompile_dcbst },
- { 31, 278, recompile_dcbt },
- { 31, 246, recompile_dcbtst },
- { 31, 1014, recompile_dcbz },
- { 31, 491, recompile_divwx },
- { 31, 491 | 512, recompile_divwx },
- { 31, 459, recompile_divwux },
- { 31, 459 | 512, recompile_divwux },
- { 31, 854, recompile_eieio },
- { 31, 284, recompile_eqvx },
- { 31, 954, recompile_extsbx },
- { 31, 922, recompile_extshx },
- { 31, 982, recompile_icbi },
- { 19, 150, recompile_isync },
- { 34, -1, recompile_lbz },
- { 35, -1, recompile_lbzu },
- { 31, 119, recompile_lbzux },
- { 31, 87, recompile_lbzx },
- { 42, -1, recompile_lha },
- { 43, -1, recompile_lhau },
- { 31, 375, recompile_lhaux },
- { 31, 343, recompile_lhax },
- { 31, 790, recompile_lhbrx },
- { 40, -1, recompile_lhz },
- { 41, -1, recompile_lhzu },
- { 31, 311, recompile_lhzux },
- { 31, 279, recompile_lhzx },
- { 46, -1, recompile_lmw },
- { 31, 597, recompile_lswi },
- { 31, 533, recompile_lswx },
- { 31, 20, recompile_lwarx },
- { 31, 534, recompile_lwbrx },
- { 32, -1, recompile_lwz },
- { 33, -1, recompile_lwzu },
- { 31, 55, recompile_lwzux },
- { 31, 23, recompile_lwzx },
- { 19, 0, recompile_mcrf },
- { 31, 512, recompile_mcrxr },
- { 31, 19, recompile_mfcr },
- { 31, 83, recompile_mfmsr },
- { 31, 339, recompile_mfspr },
- { 31, 144, recompile_mtcrf },
- { 31, 146, recompile_mtmsr },
- { 31, 467, recompile_mtspr },
- { 31, 75, recompile_mulhwx },
- { 31, 11, recompile_mulhwux },
- { 7, -1, recompile_mulli },
- { 31, 235, recompile_mullwx },
- { 31, 235 | 512, recompile_mullwx },
- { 31, 476, recompile_nandx },
- { 31, 104, recompile_negx },
- { 31, 104 | 512, recompile_negx },
- { 31, 124, recompile_norx },
- { 31, 444, recompile_orx },
- { 31, 412, recompile_orcx },
- { 24, -1, recompile_ori },
- { 25, -1, recompile_oris },
- { 19, 50, recompile_rfi },
- { 20, -1, recompile_rlwimix },
- { 21, -1, recompile_rlwinmx },
- { 23, -1, recompile_rlwnmx },
- { 17, -1, recompile_sc },
- { 31, 24, recompile_slwx },
- { 31, 792, recompile_srawx },
- { 31, 824, recompile_srawix },
- { 31, 536, recompile_srwx },
- { 38, -1, recompile_stb },
- { 39, -1, recompile_stbu },
- { 31, 247, recompile_stbux },
- { 31, 215, recompile_stbx },
- { 44, -1, recompile_sth },
- { 31, 918, recompile_sthbrx },
- { 45, -1, recompile_sthu },
- { 31, 439, recompile_sthux },
- { 31, 407, recompile_sthx },
- { 47, -1, recompile_stmw },
- { 31, 725, recompile_stswi },
- { 31, 661, recompile_stswx },
- { 36, -1, recompile_stw },
- { 31, 662, recompile_stwbrx },
- { 31, 150, recompile_stwcx_rc },
- { 37, -1, recompile_stwu },
- { 31, 183, recompile_stwux },
- { 31, 151, recompile_stwx },
- { 31, 40, recompile_subfx },
- { 31, 40 | 512, recompile_subfx },
- { 31, 8, recompile_subfcx },
- { 31, 8 | 512, recompile_subfcx },
- { 31, 136, recompile_subfex },
- { 31, 136 | 512, recompile_subfex },
- { 8, -1, recompile_subfic },
- { 31, 232, recompile_subfmex },
- { 31, 232 | 512, recompile_subfmex },
- { 31, 200, recompile_subfzex },
- { 31, 200 | 512, recompile_subfzex },
- { 31, 598, recompile_sync },
- { 31, 4, recompile_tw },
- { 3, -1, recompile_twi },
- { 31, 316, recompile_xorx },
- { 26, -1, recompile_xori },
- { 27, -1, recompile_xoris }
+ { 31, 266, recompile_addx },
+ { 31, 266 | 512, recompile_addx },
+ { 31, 10, recompile_addcx },
+ { 31, 10 | 512, recompile_addcx },
+ { 31, 138, recompile_addex },
+ { 31, 138 | 512, recompile_addex },
+ { 14, -1, recompile_addi },
+ { 12, -1, recompile_addic },
+ { 13, -1, recompile_addic_rc },
+ { 15, -1, recompile_addis },
+ { 31, 234, recompile_addmex },
+ { 31, 234 | 512, recompile_addmex },
+ { 31, 202, recompile_addzex },
+ { 31, 202 | 512, recompile_addzex },
+ { 31, 28, recompile_andx },
+ { 31, 28 | 512, recompile_andx },
+ { 31, 60, recompile_andcx },
+ { 28, -1, recompile_andi_rc },
+ { 29, -1, recompile_andis_rc },
+ { 18, -1, recompile_bx },
+ { 16, -1, recompile_bcx },
+ { 19, 528, recompile_bcctrx },
+ { 19, 16, recompile_bclrx },
+ { 31, 0, recompile_cmp },
+ { 11, -1, recompile_cmpi },
+ { 31, 32, recompile_cmpl },
+ { 10, -1, recompile_cmpli },
+ { 31, 26, recompile_cntlzw },
+ { 19, 257, recompile_crand },
+ { 19, 129, recompile_crandc },
+ { 19, 289, recompile_creqv },
+ { 19, 225, recompile_crnand },
+ { 19, 33, recompile_crnor },
+ { 19, 449, recompile_cror },
+ { 19, 417, recompile_crorc },
+ { 19, 193, recompile_crxor },
+ { 31, 86, recompile_dcbf },
+ { 31, 470, recompile_dcbi },
+ { 31, 54, recompile_dcbst },
+ { 31, 278, recompile_dcbt },
+ { 31, 246, recompile_dcbtst },
+ { 31, 1014, recompile_dcbz },
+ { 31, 491, recompile_divwx },
+ { 31, 491 | 512, recompile_divwx },
+ { 31, 459, recompile_divwux },
+ { 31, 459 | 512, recompile_divwux },
+ { 31, 854, recompile_eieio },
+ { 31, 284, recompile_eqvx },
+ { 31, 954, recompile_extsbx },
+ { 31, 922, recompile_extshx },
+ { 31, 982, recompile_icbi },
+ { 19, 150, recompile_isync },
+ { 34, -1, recompile_lbz },
+ { 35, -1, recompile_lbzu },
+ { 31, 119, recompile_lbzux },
+ { 31, 87, recompile_lbzx },
+ { 42, -1, recompile_lha },
+ { 43, -1, recompile_lhau },
+ { 31, 375, recompile_lhaux },
+ { 31, 343, recompile_lhax },
+ { 31, 790, recompile_lhbrx },
+ { 40, -1, recompile_lhz },
+ { 41, -1, recompile_lhzu },
+ { 31, 311, recompile_lhzux },
+ { 31, 279, recompile_lhzx },
+ { 46, -1, recompile_lmw },
+ { 31, 597, recompile_lswi },
+ { 31, 533, recompile_lswx },
+ { 31, 20, recompile_lwarx },
+ { 31, 534, recompile_lwbrx },
+ { 32, -1, recompile_lwz },
+ { 33, -1, recompile_lwzu },
+ { 31, 55, recompile_lwzux },
+ { 31, 23, recompile_lwzx },
+ { 19, 0, recompile_mcrf },
+ { 31, 512, recompile_mcrxr },
+ { 31, 19, recompile_mfcr },
+ { 31, 83, recompile_mfmsr },
+ { 31, 339, recompile_mfspr },
+ { 31, 144, recompile_mtcrf },
+ { 31, 146, recompile_mtmsr },
+ { 31, 467, recompile_mtspr },
+ { 31, 75, recompile_mulhwx },
+ { 31, 11, recompile_mulhwux },
+ { 7, -1, recompile_mulli },
+ { 31, 235, recompile_mullwx },
+ { 31, 235 | 512, recompile_mullwx },
+ { 31, 476, recompile_nandx },
+ { 31, 104, recompile_negx },
+ { 31, 104 | 512, recompile_negx },
+ { 31, 124, recompile_norx },
+ { 31, 444, recompile_orx },
+ { 31, 412, recompile_orcx },
+ { 24, -1, recompile_ori },
+ { 25, -1, recompile_oris },
+ { 19, 50, recompile_rfi },
+ { 20, -1, recompile_rlwimix },
+ { 21, -1, recompile_rlwinmx },
+ { 23, -1, recompile_rlwnmx },
+ { 17, -1, recompile_sc },
+ { 31, 24, recompile_slwx },
+ { 31, 792, recompile_srawx },
+ { 31, 824, recompile_srawix },
+ { 31, 536, recompile_srwx },
+ { 38, -1, recompile_stb },
+ { 39, -1, recompile_stbu },
+ { 31, 247, recompile_stbux },
+ { 31, 215, recompile_stbx },
+ { 44, -1, recompile_sth },
+ { 31, 918, recompile_sthbrx },
+ { 45, -1, recompile_sthu },
+ { 31, 439, recompile_sthux },
+ { 31, 407, recompile_sthx },
+ { 47, -1, recompile_stmw },
+ { 31, 725, recompile_stswi },
+ { 31, 661, recompile_stswx },
+ { 36, -1, recompile_stw },
+ { 31, 662, recompile_stwbrx },
+ { 31, 150, recompile_stwcx_rc },
+ { 37, -1, recompile_stwu },
+ { 31, 183, recompile_stwux },
+ { 31, 151, recompile_stwx },
+ { 31, 40, recompile_subfx },
+ { 31, 40 | 512, recompile_subfx },
+ { 31, 8, recompile_subfcx },
+ { 31, 8 | 512, recompile_subfcx },
+ { 31, 136, recompile_subfex },
+ { 31, 136 | 512, recompile_subfex },
+ { 8, -1, recompile_subfic },
+ { 31, 232, recompile_subfmex },
+ { 31, 232 | 512, recompile_subfmex },
+ { 31, 200, recompile_subfzex },
+ { 31, 200 | 512, recompile_subfzex },
+ { 31, 598, recompile_sync },
+ { 31, 4, recompile_tw },
+ { 3, -1, recompile_twi },
+ { 31, 316, recompile_xorx },
+ { 26, -1, recompile_xori },
+ { 27, -1, recompile_xoris }
};
diff --git a/src/emu/cpu/powerpc/ppc.c b/src/emu/cpu/powerpc/ppc.c
index ef9cc57ef19..3d748ae9f83 100644
--- a/src/emu/cpu/powerpc/ppc.c
+++ b/src/emu/cpu/powerpc/ppc.c
@@ -13,7 +13,7 @@ static const int mpc603e_pll_config[12][9] =
{ 0x2, 0x2, 0x2, 0x1, 0x1, 0x1, -1, 0x0, -1 },
{ -1, -1, -1, -1, -1, 0xc, -1, 0xc, -1 },
{ 0x5, 0x5, 0x5, 0x4, 0x4, 0x4, -1, -1, -1 },
- { -1, -1, -1, 0x6, 0x6, -1, -1, -1, -1 },
+ { -1, -1, -1, 0x6, 0x6, -1, -1, -1, -1 },
{ -1, -1, 0x8, 0x8, -1, -1, -1, -1, -1 },
{ -1, 0xe, 0xe, -1, -1, -1, -1, -1, -1 },
{ 0xa, 0xa, 0xa, -1, -1, -1, -1, -1, -1 },
@@ -84,116 +84,116 @@ static void ppc403_exception(int exception);
static UINT8 ppc403_spu_r(UINT32 a);
static void ppc403_spu_w(UINT32 a, UINT8 d);
-#define RD ((op >> 21) & 0x1F)
-#define RT ((op >> 21) & 0x1f)
-#define RS ((op >> 21) & 0x1f)
-#define RA ((op >> 16) & 0x1f)
-#define RB ((op >> 11) & 0x1f)
-#define RC ((op >> 6) & 0x1f)
-
-#define MB ((op >> 6) & 0x1f)
-#define ME ((op >> 1) & 0x1f)
-#define SH ((op >> 11) & 0x1f)
-#define BO ((op >> 21) & 0x1f)
-#define BI ((op >> 16) & 0x1f)
-#define CRFD ((op >> 23) & 0x7)
-#define CRFA ((op >> 18) & 0x7)
-#define FXM ((op >> 12) & 0xff)
-#define SPR (((op >> 16) & 0x1f) | ((op >> 6) & 0x3e0))
-
-#define SIMM16 (INT32)(INT16)(op & 0xffff)
-#define UIMM16 (UINT32)(op & 0xffff)
-
-#define RCBIT (op & 0x1)
-#define OEBIT (op & 0x400)
-#define AABIT (op & 0x2)
-#define LKBIT (op & 0x1)
-
-#define REG(x) (ppc.r[x])
-#define LR (ppc.lr)
-#define CTR (ppc.ctr)
-#define XER (ppc.xer)
-#define CR(x) (ppc.cr[x])
-#define MSR (ppc.msr)
-#define SRR0 (ppc.srr0)
-#define SRR1 (ppc.srr1)
-#define SRR2 (ppc.srr2)
-#define SRR3 (ppc.srr3)
-#define EVPR (ppc.evpr)
-#define EXIER (ppc.exier)
-#define EXISR (ppc.exisr)
-#define DEC (ppc.dec)
+#define RD ((op >> 21) & 0x1F)
+#define RT ((op >> 21) & 0x1f)
+#define RS ((op >> 21) & 0x1f)
+#define RA ((op >> 16) & 0x1f)
+#define RB ((op >> 11) & 0x1f)
+#define RC ((op >> 6) & 0x1f)
+
+#define MB ((op >> 6) & 0x1f)
+#define ME ((op >> 1) & 0x1f)
+#define SH ((op >> 11) & 0x1f)
+#define BO ((op >> 21) & 0x1f)
+#define BI ((op >> 16) & 0x1f)
+#define CRFD ((op >> 23) & 0x7)
+#define CRFA ((op >> 18) & 0x7)
+#define FXM ((op >> 12) & 0xff)
+#define SPR (((op >> 16) & 0x1f) | ((op >> 6) & 0x3e0))
+
+#define SIMM16 (INT32)(INT16)(op & 0xffff)
+#define UIMM16 (UINT32)(op & 0xffff)
+
+#define RCBIT (op & 0x1)
+#define OEBIT (op & 0x400)
+#define AABIT (op & 0x2)
+#define LKBIT (op & 0x1)
+
+#define REG(x) (ppc.r[x])
+#define LR (ppc.lr)
+#define CTR (ppc.ctr)
+#define XER (ppc.xer)
+#define CR(x) (ppc.cr[x])
+#define MSR (ppc.msr)
+#define SRR0 (ppc.srr0)
+#define SRR1 (ppc.srr1)
+#define SRR2 (ppc.srr2)
+#define SRR3 (ppc.srr3)
+#define EVPR (ppc.evpr)
+#define EXIER (ppc.exier)
+#define EXISR (ppc.exisr)
+#define DEC (ppc.dec)
// Stuff added for the 6xx
-#define FPR(x) (ppc.fpr[x])
-#define FM ((op >> 17) & 0xFF)
-#define SPRF (((op >> 6) & 0x3E0) | ((op >> 16) & 0x1F))
+#define FPR(x) (ppc.fpr[x])
+#define FM ((op >> 17) & 0xFF)
+#define SPRF (((op >> 6) & 0x3E0) | ((op >> 16) & 0x1F))
-#define CHECK_SUPERVISOR() \
- if((ppc.msr & 0x4000) != 0){ \
+#define CHECK_SUPERVISOR() \
+ if((ppc.msr & 0x4000) != 0){ \
}
-#define CHECK_FPU_AVAILABLE() \
- if((ppc.msr & 0x2000) == 0){ \
+#define CHECK_FPU_AVAILABLE() \
+ if((ppc.msr & 0x2000) == 0){ \
}
-static UINT32 ppc_field_xlat[256];
-
-
-
-#define FPSCR_FX 0x80000000
-#define FPSCR_FEX 0x40000000
-#define FPSCR_VX 0x20000000
-#define FPSCR_OX 0x10000000
-#define FPSCR_UX 0x08000000
-#define FPSCR_ZX 0x04000000
-#define FPSCR_XX 0x02000000
-
-
-
-#define BITMASK_0(n) (UINT32)(((UINT64)1 << n) - 1)
-#define CRBIT(x) ((ppc.cr[x / 4] & (1 << (3 - (x % 4)))) ? 1 : 0)
-#define _BIT(n) (1 << (n))
-#define GET_ROTATE_MASK(mb,me) (ppc_rotate_mask[mb][me])
-#define ADD_CA(r,a,b) ((UINT32)r < (UINT32)a)
-#define SUB_CA(r,a,b) (!((UINT32)a < (UINT32)b))
-#define ADD_OV(r,a,b) ((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000)
-#define SUB_OV(r,a,b) (( ((a) ^ (b)) & ((a) ^ (r))) & 0x80000000)
-
-#define XER_SO 0x80000000
-#define XER_OV 0x40000000
-#define XER_CA 0x20000000
-
-#define MSR_AP 0x00800000 /* Access privilege state (PPC602) */
-#define MSR_SA 0x00400000 /* Supervisor access mode (PPC602) */
-#define MSR_POW 0x00040000 /* Power Management Enable */
-#define MSR_WE 0x00040000
-#define MSR_CE 0x00020000
-#define MSR_ILE 0x00010000 /* Interrupt Little Endian Mode */
-#define MSR_EE 0x00008000 /* External Interrupt Enable */
-#define MSR_PR 0x00004000 /* Problem State */
-#define MSR_FP 0x00002000 /* Floating Point Available */
-#define MSR_ME 0x00001000 /* Machine Check Enable */
-#define MSR_FE0 0x00000800
-#define MSR_SE 0x00000400 /* Single Step Trace Enable */
-#define MSR_BE 0x00000200 /* Branch Trace Enable */
-#define MSR_DE 0x00000200
-#define MSR_FE1 0x00000100
-#define MSR_IP 0x00000040 /* Interrupt Prefix */
-#define MSR_IR 0x00000020 /* Instruction Relocate */
-#define MSR_DR 0x00000010 /* Data Relocate */
-#define MSR_PE 0x00000008
-#define MSR_PX 0x00000004
-#define MSR_RI 0x00000002 /* Recoverable Interrupt Enable */
-#define MSR_LE 0x00000001
-
-#define TSR_ENW 0x80000000
-#define TSR_WIS 0x40000000
-
-#define BYTE_REVERSE16(x) ((((x) >> 8) & 0xff) | (((x) << 8) & 0xff00))
-#define BYTE_REVERSE32(x) ((((x) >> 24) & 0xff) | (((x) >> 8) & 0xff00) | (((x) << 8) & 0xff0000) | (((x) << 24) & 0xff000000))
+static UINT32 ppc_field_xlat[256];
+
+
+
+#define FPSCR_FX 0x80000000
+#define FPSCR_FEX 0x40000000
+#define FPSCR_VX 0x20000000
+#define FPSCR_OX 0x10000000
+#define FPSCR_UX 0x08000000
+#define FPSCR_ZX 0x04000000
+#define FPSCR_XX 0x02000000
+
+
+
+#define BITMASK_0(n) (UINT32)(((UINT64)1 << n) - 1)
+#define CRBIT(x) ((ppc.cr[x / 4] & (1 << (3 - (x % 4)))) ? 1 : 0)
+#define _BIT(n) (1 << (n))
+#define GET_ROTATE_MASK(mb,me) (ppc_rotate_mask[mb][me])
+#define ADD_CA(r,a,b) ((UINT32)r < (UINT32)a)
+#define SUB_CA(r,a,b) (!((UINT32)a < (UINT32)b))
+#define ADD_OV(r,a,b) ((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000)
+#define SUB_OV(r,a,b) (( ((a) ^ (b)) & ((a) ^ (r))) & 0x80000000)
+
+#define XER_SO 0x80000000
+#define XER_OV 0x40000000
+#define XER_CA 0x20000000
+
+#define MSR_AP 0x00800000 /* Access privilege state (PPC602) */
+#define MSR_SA 0x00400000 /* Supervisor access mode (PPC602) */
+#define MSR_POW 0x00040000 /* Power Management Enable */
+#define MSR_WE 0x00040000
+#define MSR_CE 0x00020000
+#define MSR_ILE 0x00010000 /* Interrupt Little Endian Mode */
+#define MSR_EE 0x00008000 /* External Interrupt Enable */
+#define MSR_PR 0x00004000 /* Problem State */
+#define MSR_FP 0x00002000 /* Floating Point Available */
+#define MSR_ME 0x00001000 /* Machine Check Enable */
+#define MSR_FE0 0x00000800
+#define MSR_SE 0x00000400 /* Single Step Trace Enable */
+#define MSR_BE 0x00000200 /* Branch Trace Enable */
+#define MSR_DE 0x00000200
+#define MSR_FE1 0x00000100
+#define MSR_IP 0x00000040 /* Interrupt Prefix */
+#define MSR_IR 0x00000020 /* Instruction Relocate */
+#define MSR_DR 0x00000010 /* Data Relocate */
+#define MSR_PE 0x00000008
+#define MSR_PX 0x00000004
+#define MSR_RI 0x00000002 /* Recoverable Interrupt Enable */
+#define MSR_LE 0x00000001
+
+#define TSR_ENW 0x80000000
+#define TSR_WIS 0x40000000
+
+#define BYTE_REVERSE16(x) ((((x) >> 8) & 0xff) | (((x) << 8) & 0xff00))
+#define BYTE_REVERSE32(x) ((((x) >> 24) & 0xff) | (((x) >> 8) & 0xff00) | (((x) << 8) & 0xff0000) | (((x) << 24) & 0xff000000))
struct DMA_REGS {
UINT32 cr;
@@ -217,8 +217,8 @@ struct SPU_REGS {
};
union FPR {
- UINT64 id;
- double fd;
+ UINT64 id;
+ double fd;
};
union FPR32 {
@@ -303,7 +303,7 @@ struct PPC_REGS {
int interrupt_pending;
- UINT64 tb; /* 56-bit timebase register */
+ UINT64 tb; /* 56-bit timebase register */
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
@@ -313,7 +313,7 @@ struct PPC_REGS {
UINT32 dec, dec_frac;
UINT32 fpscr;
- FPR fpr[32];
+ FPR fpr[32];
UINT32 sr[16];
int is603;
@@ -370,8 +370,8 @@ static int bus_freq_multiplier = 1;
static PPC_REGS ppc;
static UINT32 ppc_rotate_mask[32][32];
-#define ROPCODE(pc) memory_decrypted_read_dword(ppc.program, pc)
-#define ROPCODE64(pc) memory_decrypted_read_qword(ppc.program, DWORD_XOR_BE(pc))
+#define ROPCODE(pc) memory_decrypted_read_dword(ppc.program, pc)
+#define ROPCODE64(pc) memory_decrypted_read_qword(ppc.program, DWORD_XOR_BE(pc))
/*********************************************************************/
@@ -525,16 +525,16 @@ INLINE void ppc_set_spr(int spr, UINT32 value)
{
switch (spr)
{
- case SPR_LR: LR = value; return;
- case SPR_CTR: CTR = value; return;
- case SPR_XER: XER = value; return;
- case SPR_SRR0: ppc.srr0 = value; return;
- case SPR_SRR1: ppc.srr1 = value; return;
- case SPR_SPRG0: ppc.sprg[0] = value; return;
- case SPR_SPRG1: ppc.sprg[1] = value; return;
- case SPR_SPRG2: ppc.sprg[2] = value; return;
- case SPR_SPRG3: ppc.sprg[3] = value; return;
- case SPR_PVR: return;
+ case SPR_LR: LR = value; return;
+ case SPR_CTR: CTR = value; return;
+ case SPR_XER: XER = value; return;
+ case SPR_SRR0: ppc.srr0 = value; return;
+ case SPR_SRR1: ppc.srr1 = value; return;
+ case SPR_SPRG0: ppc.sprg[0] = value; return;
+ case SPR_SPRG1: ppc.sprg[1] = value; return;
+ case SPR_SPRG2: ppc.sprg[2] = value; return;
+ case SPR_SPRG3: ppc.sprg[3] = value; return;
+ case SPR_PVR: return;
}
if(IS_PPC602() || IS_PPC603()) {
@@ -562,63 +562,63 @@ INLINE void ppc_set_spr(int spr, UINT32 value)
ppc_write_timebase_h(value);
return;
- case SPR603E_HID0: ppc.hid0 = value; return;
- case SPR603E_HID1: ppc.hid1 = value; return;
- case SPR603E_HID2: ppc.hid2 = value; return;
-
- case SPR603E_DSISR: ppc.dsisr = value; return;
- case SPR603E_DAR: ppc.dar = value; return;
- case SPR603E_EAR: ppc.ear = value; return;
- case SPR603E_DMISS: ppc.dmiss = value; return;
- case SPR603E_DCMP: ppc.dcmp = value; return;
- case SPR603E_HASH1: ppc.hash1 = value; return;
- case SPR603E_HASH2: ppc.hash2 = value; return;
- case SPR603E_IMISS: ppc.imiss = value; return;
- case SPR603E_ICMP: ppc.icmp = value; return;
- case SPR603E_RPA: ppc.rpa = value; return;
-
- case SPR603E_IBAT0L: ppc.ibat[0].l = value; return;
- case SPR603E_IBAT0U: ppc.ibat[0].u = value; return;
- case SPR603E_IBAT1L: ppc.ibat[1].l = value; return;
- case SPR603E_IBAT1U: ppc.ibat[1].u = value; return;
- case SPR603E_IBAT2L: ppc.ibat[2].l = value; return;
- case SPR603E_IBAT2U: ppc.ibat[2].u = value; return;
- case SPR603E_IBAT3L: ppc.ibat[3].l = value; return;
- case SPR603E_IBAT3U: ppc.ibat[3].u = value; return;
- case SPR603E_DBAT0L: ppc.dbat[0].l = value; return;
- case SPR603E_DBAT0U: ppc.dbat[0].u = value; return;
- case SPR603E_DBAT1L: ppc.dbat[1].l = value; return;
- case SPR603E_DBAT1U: ppc.dbat[1].u = value; return;
- case SPR603E_DBAT2L: ppc.dbat[2].l = value; return;
- case SPR603E_DBAT2U: ppc.dbat[2].u = value; return;
- case SPR603E_DBAT3L: ppc.dbat[3].l = value; return;
- case SPR603E_DBAT3U: ppc.dbat[3].u = value; return;
+ case SPR603E_HID0: ppc.hid0 = value; return;
+ case SPR603E_HID1: ppc.hid1 = value; return;
+ case SPR603E_HID2: ppc.hid2 = value; return;
+
+ case SPR603E_DSISR: ppc.dsisr = value; return;
+ case SPR603E_DAR: ppc.dar = value; return;
+ case SPR603E_EAR: ppc.ear = value; return;
+ case SPR603E_DMISS: ppc.dmiss = value; return;
+ case SPR603E_DCMP: ppc.dcmp = value; return;
+ case SPR603E_HASH1: ppc.hash1 = value; return;
+ case SPR603E_HASH2: ppc.hash2 = value; return;
+ case SPR603E_IMISS: ppc.imiss = value; return;
+ case SPR603E_ICMP: ppc.icmp = value; return;
+ case SPR603E_RPA: ppc.rpa = value; return;
+
+ case SPR603E_IBAT0L: ppc.ibat[0].l = value; return;
+ case SPR603E_IBAT0U: ppc.ibat[0].u = value; return;
+ case SPR603E_IBAT1L: ppc.ibat[1].l = value; return;
+ case SPR603E_IBAT1U: ppc.ibat[1].u = value; return;
+ case SPR603E_IBAT2L: ppc.ibat[2].l = value; return;
+ case SPR603E_IBAT2U: ppc.ibat[2].u = value; return;
+ case SPR603E_IBAT3L: ppc.ibat[3].l = value; return;
+ case SPR603E_IBAT3U: ppc.ibat[3].u = value; return;
+ case SPR603E_DBAT0L: ppc.dbat[0].l = value; return;
+ case SPR603E_DBAT0U: ppc.dbat[0].u = value; return;
+ case SPR603E_DBAT1L: ppc.dbat[1].l = value; return;
+ case SPR603E_DBAT1U: ppc.dbat[1].u = value; return;
+ case SPR603E_DBAT2L: ppc.dbat[2].l = value; return;
+ case SPR603E_DBAT2U: ppc.dbat[2].u = value; return;
+ case SPR603E_DBAT3L: ppc.dbat[3].l = value; return;
+ case SPR603E_DBAT3U: ppc.dbat[3].u = value; return;
case SPR603E_SDR1:
ppc.sdr1 = value;
return;
- case SPR603E_IABR: ppc.iabr = value; return;
+ case SPR603E_IABR: ppc.iabr = value; return;
}
}
if (ppc.is602) {
switch(spr)
{
- case SPR602_LT: ppc.lt = value; return;
- case SPR602_IBR: ppc.ibr = value; return;
- case SPR602_SEBR: ppc.sebr = value; return;
- case SPR602_SER: ppc.ser = value; return;
- case SPR602_SP: ppc.sp = value; return;
- case SPR602_TCR: ppc.tcr = value; return;
+ case SPR602_LT: ppc.lt = value; return;
+ case SPR602_IBR: ppc.ibr = value; return;
+ case SPR602_SEBR: ppc.sebr = value; return;
+ case SPR602_SER: ppc.ser = value; return;
+ case SPR602_SP: ppc.sp = value; return;
+ case SPR602_TCR: ppc.tcr = value; return;
}
}
if (IS_PPC403()) {
switch(spr)
{
- case SPR403_TBHI: ppc_write_timebase_h(value); return;
- case SPR403_TBLO: ppc_write_timebase_l(value); return;
+ case SPR403_TBHI: ppc_write_timebase_h(value); return;
+ case SPR403_TBLO: ppc_write_timebase_l(value); return;
case SPR403_TSR:
ppc.tsr &= ~value; // 1 clears, 0 does nothing
@@ -649,25 +649,25 @@ INLINE void ppc_set_spr(int spr, UINT32 value)
}
return;
- case SPR403_ESR: ppc.esr = value; return;
- case SPR403_ICCR: ppc.iccr = value; return;
- case SPR403_DCCR: ppc.dccr = value; return;
- case SPR403_EVPR: EVPR = value & 0xffff0000; return;
- case SPR403_PIT: ppc.pit = value; return;
- case SPR403_SGR: ppc.sgr = value; return;
- case SPR403_DBSR: ppc.dbsr = value; return;
- case SPR403_DCWR: return;
- case SPR403_PID: ppc.pid = value; return;
- case SPR403_PBL1: ppc.pbl1 = value; return;
- case SPR403_PBU1: ppc.pbu1 = value; return;
- case SPR403_PBL2: ppc.pbl2 = value; return;
- case SPR403_PBU2: ppc.pbu2 = value; return;
- case SPR403_SRR2: ppc.srr2 = value; return;
- case SPR403_SRR3: ppc.srr3 = value; return;
- case SPR403_DAC1: ppc.dac1 = value; return;
- case SPR403_DAC2: ppc.dac2 = value; return;
- case SPR403_IAC1: ppc.iac1 = value; return;
- case SPR403_IAC2: ppc.iac2 = value; return;
+ case SPR403_ESR: ppc.esr = value; return;
+ case SPR403_ICCR: ppc.iccr = value; return;
+ case SPR403_DCCR: ppc.dccr = value; return;
+ case SPR403_EVPR: EVPR = value & 0xffff0000; return;
+ case SPR403_PIT: ppc.pit = value; return;
+ case SPR403_SGR: ppc.sgr = value; return;
+ case SPR403_DBSR: ppc.dbsr = value; return;
+ case SPR403_DCWR: return;
+ case SPR403_PID: ppc.pid = value; return;
+ case SPR403_PBL1: ppc.pbl1 = value; return;
+ case SPR403_PBU1: ppc.pbu1 = value; return;
+ case SPR403_PBL2: ppc.pbl2 = value; return;
+ case SPR403_PBU2: ppc.pbu2 = value; return;
+ case SPR403_SRR2: ppc.srr2 = value; return;
+ case SPR403_SRR3: ppc.srr3 = value; return;
+ case SPR403_DAC1: ppc.dac1 = value; return;
+ case SPR403_DAC2: ppc.dac2 = value; return;
+ case SPR403_IAC1: ppc.iac1 = value; return;
+ case SPR403_IAC2: ppc.iac2 = value; return;
}
}
@@ -678,16 +678,16 @@ INLINE UINT32 ppc_get_spr(int spr)
{
switch(spr)
{
- case SPR_LR: return LR;
- case SPR_CTR: return CTR;
- case SPR_XER: return XER;
- case SPR_SRR0: return ppc.srr0;
- case SPR_SRR1: return ppc.srr1;
- case SPR_SPRG0: return ppc.sprg[0];
- case SPR_SPRG1: return ppc.sprg[1];
- case SPR_SPRG2: return ppc.sprg[2];
- case SPR_SPRG3: return ppc.sprg[3];
- case SPR_PVR: return ppc.pvr;
+ case SPR_LR: return LR;
+ case SPR_CTR: return CTR;
+ case SPR_XER: return XER;
+ case SPR_SRR0: return ppc.srr0;
+ case SPR_SRR1: return ppc.srr1;
+ case SPR_SPRG0: return ppc.sprg[0];
+ case SPR_SPRG1: return ppc.sprg[1];
+ case SPR_SPRG2: return ppc.sprg[2];
+ case SPR_SPRG3: return ppc.sprg[3];
+ case SPR_PVR: return ppc.pvr;
}
if (IS_PPC403())
@@ -695,42 +695,42 @@ INLINE UINT32 ppc_get_spr(int spr)
switch (spr)
{
case SPR403_TBLU:
- case SPR403_TBLO: return (UINT32)(ppc_read_timebase());
+ case SPR403_TBLO: return (UINT32)(ppc_read_timebase());
case SPR403_TBHU:
- case SPR403_TBHI: return (UINT32)(ppc_read_timebase() >> 32);
-
- case SPR403_EVPR: return EVPR;
- case SPR403_ESR: return ppc.esr;
- case SPR403_TCR: return ppc.tcr;
- case SPR403_ICCR: return ppc.iccr;
- case SPR403_DCCR: return ppc.dccr;
- case SPR403_PIT: return ppc.pit;
- case SPR403_DBSR: return ppc.dbsr;
- case SPR403_SGR: return ppc.sgr;
- case SPR403_TSR: return ppc.tsr;
- case SPR403_PBL1: return ppc.pbl1;
- case SPR403_PBU1: return ppc.pbu1;
- case SPR403_PBL2: return ppc.pbl2;
- case SPR403_PBU2: return ppc.pbu2;
- case SPR403_SRR2: return ppc.srr2;
- case SPR403_SRR3: return ppc.srr3;
- case SPR403_DAC1: return ppc.dac1;
- case SPR403_DAC2: return ppc.dac2;
- case SPR403_IAC1: return ppc.iac1;
- case SPR403_IAC2: return ppc.iac2;
+ case SPR403_TBHI: return (UINT32)(ppc_read_timebase() >> 32);
+
+ case SPR403_EVPR: return EVPR;
+ case SPR403_ESR: return ppc.esr;
+ case SPR403_TCR: return ppc.tcr;
+ case SPR403_ICCR: return ppc.iccr;
+ case SPR403_DCCR: return ppc.dccr;
+ case SPR403_PIT: return ppc.pit;
+ case SPR403_DBSR: return ppc.dbsr;
+ case SPR403_SGR: return ppc.sgr;
+ case SPR403_TSR: return ppc.tsr;
+ case SPR403_PBL1: return ppc.pbl1;
+ case SPR403_PBU1: return ppc.pbu1;
+ case SPR403_PBL2: return ppc.pbl2;
+ case SPR403_PBU2: return ppc.pbu2;
+ case SPR403_SRR2: return ppc.srr2;
+ case SPR403_SRR3: return ppc.srr3;
+ case SPR403_DAC1: return ppc.dac1;
+ case SPR403_DAC2: return ppc.dac2;
+ case SPR403_IAC1: return ppc.iac1;
+ case SPR403_IAC2: return ppc.iac2;
}
}
if (ppc.is602) {
switch(spr)
{
- case SPR602_LT: return ppc.lt;
- case SPR602_IBR: return ppc.ibr;
- case SPR602_ESASRR: return ppc.esasrr;
- case SPR602_SEBR: return ppc.sebr;
- case SPR602_SER: return ppc.ser;
- case SPR602_SP: return ppc.sp;
- case SPR602_TCR: return ppc.tcr;
+ case SPR602_LT: return ppc.lt;
+ case SPR602_IBR: return ppc.ibr;
+ case SPR602_ESASRR: return ppc.esasrr;
+ case SPR602_SEBR: return ppc.sebr;
+ case SPR602_SER: return ppc.ser;
+ case SPR602_SP: return ppc.sp;
+ case SPR602_TCR: return ppc.tcr;
}
}
@@ -746,39 +746,39 @@ INLINE UINT32 ppc_get_spr(int spr)
fatalerror("ppc: get_spr: TBU_R\n");
break;
- case SPR603E_TBL_W: return (UINT32)(ppc_read_timebase());
- case SPR603E_TBU_W: return (UINT32)(ppc_read_timebase() >> 32);
- case SPR603E_HID0: return ppc.hid0;
- case SPR603E_HID1: return ppc.hid1;
- case SPR603E_HID2: return ppc.hid2;
- case SPR603E_DEC: return read_decrementer();
- case SPR603E_SDR1: return ppc.sdr1;
- case SPR603E_DSISR: return ppc.dsisr;
- case SPR603E_DAR: return ppc.dar;
- case SPR603E_EAR: return ppc.ear;
- case SPR603E_DMISS: return ppc.dmiss;
- case SPR603E_DCMP: return ppc.dcmp;
- case SPR603E_HASH1: return ppc.hash1;
- case SPR603E_HASH2: return ppc.hash2;
- case SPR603E_IMISS: return ppc.imiss;
- case SPR603E_ICMP: return ppc.icmp;
- case SPR603E_RPA: return ppc.rpa;
- case SPR603E_IBAT0L: return ppc.ibat[0].l;
- case SPR603E_IBAT0U: return ppc.ibat[0].u;
- case SPR603E_IBAT1L: return ppc.ibat[1].l;
- case SPR603E_IBAT1U: return ppc.ibat[1].u;
- case SPR603E_IBAT2L: return ppc.ibat[2].l;
- case SPR603E_IBAT2U: return ppc.ibat[2].u;
- case SPR603E_IBAT3L: return ppc.ibat[3].l;
- case SPR603E_IBAT3U: return ppc.ibat[3].u;
- case SPR603E_DBAT0L: return ppc.dbat[0].l;
- case SPR603E_DBAT0U: return ppc.dbat[0].u;
- case SPR603E_DBAT1L: return ppc.dbat[1].l;
- case SPR603E_DBAT1U: return ppc.dbat[1].u;
- case SPR603E_DBAT2L: return ppc.dbat[2].l;
- case SPR603E_DBAT2U: return ppc.dbat[2].u;
- case SPR603E_DBAT3L: return ppc.dbat[3].l;
- case SPR603E_DBAT3U: return ppc.dbat[3].u;
+ case SPR603E_TBL_W: return (UINT32)(ppc_read_timebase());
+ case SPR603E_TBU_W: return (UINT32)(ppc_read_timebase() >> 32);
+ case SPR603E_HID0: return ppc.hid0;
+ case SPR603E_HID1: return ppc.hid1;
+ case SPR603E_HID2: return ppc.hid2;
+ case SPR603E_DEC: return read_decrementer();
+ case SPR603E_SDR1: return ppc.sdr1;
+ case SPR603E_DSISR: return ppc.dsisr;
+ case SPR603E_DAR: return ppc.dar;
+ case SPR603E_EAR: return ppc.ear;
+ case SPR603E_DMISS: return ppc.dmiss;
+ case SPR603E_DCMP: return ppc.dcmp;
+ case SPR603E_HASH1: return ppc.hash1;
+ case SPR603E_HASH2: return ppc.hash2;
+ case SPR603E_IMISS: return ppc.imiss;
+ case SPR603E_ICMP: return ppc.icmp;
+ case SPR603E_RPA: return ppc.rpa;
+ case SPR603E_IBAT0L: return ppc.ibat[0].l;
+ case SPR603E_IBAT0U: return ppc.ibat[0].u;
+ case SPR603E_IBAT1L: return ppc.ibat[1].l;
+ case SPR603E_IBAT1U: return ppc.ibat[1].u;
+ case SPR603E_IBAT2L: return ppc.ibat[2].l;
+ case SPR603E_IBAT2U: return ppc.ibat[2].u;
+ case SPR603E_IBAT3L: return ppc.ibat[3].l;
+ case SPR603E_IBAT3U: return ppc.ibat[3].u;
+ case SPR603E_DBAT0L: return ppc.dbat[0].l;
+ case SPR603E_DBAT0U: return ppc.dbat[0].u;
+ case SPR603E_DBAT1L: return ppc.dbat[1].l;
+ case SPR603E_DBAT1U: return ppc.dbat[1].u;
+ case SPR603E_DBAT2L: return ppc.dbat[2].l;
+ case SPR603E_DBAT2U: return ppc.dbat[2].u;
+ case SPR603E_DBAT3L: return ppc.dbat[3].l;
+ case SPR603E_DBAT3U: return ppc.dbat[3].u;
}
}
@@ -1139,14 +1139,14 @@ static CPU_INIT( ppc603 )
ppc.pvr = configdata->pvr;
multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) +
- (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
+ (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
bus_freq_multiplier = (int)(multiplier * 2);
switch(config->pvr)
{
- case PPC_MODEL_603E: pll_config = mpc603e_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break;
- case PPC_MODEL_603EV: pll_config = mpc603ev_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break;
- case PPC_MODEL_603R: pll_config = mpc603r_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break;
+ case PPC_MODEL_603E: pll_config = mpc603e_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break;
+ case PPC_MODEL_603EV: pll_config = mpc603ev_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break;
+ case PPC_MODEL_603R: pll_config = mpc603r_pll_config[bus_freq_multiplier-1][configdata->bus_frequency]; break;
default: break;
}
@@ -1287,7 +1287,7 @@ static CPU_INIT( ppc602 )
ppc.pvr = configdata->pvr;
multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) +
- (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
+ (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
bus_freq_multiplier = (int)(multiplier * 2);
}
@@ -1428,7 +1428,7 @@ static CPU_INIT( mpc8240 )
ppc.pvr = configdata->pvr;
multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) +
- (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
+ (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
bus_freq_multiplier = (int)(multiplier * 2);
}
@@ -1554,7 +1554,7 @@ static CPU_INIT( ppc601 )
ppc.pvr = configdata->pvr;
multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) +
- (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
+ (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
bus_freq_multiplier = (int)(multiplier * 2);
ppc.hid1 = 0;
@@ -1684,7 +1684,7 @@ static CPU_INIT( ppc604 )
ppc.pvr = configdata->pvr;
multiplier = (float)((configdata->bus_frequency_multiplier >> 4) & 0xf) +
- (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
+ (float)(configdata->bus_frequency_multiplier & 0xf) / 10.0f;
bus_freq_multiplier = (int)(multiplier * 2);
ppc.hid1 = 0;
@@ -1706,47 +1706,47 @@ static CPU_SET_INFO( ppc )
switch (state)
{
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PPC_PC: ppc.pc = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_MSR: ppc_set_msr(info->i); break;
- case CPUINFO_INT_REGISTER + PPC_CR: ppc_set_cr(info->i); break;
- case CPUINFO_INT_REGISTER + PPC_LR: LR = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_CTR: CTR = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_XER: XER = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SRR0: SRR0 = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SRR1: SRR1 = info->i; break;
-
- case CPUINFO_INT_REGISTER + PPC_R0: ppc.r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R1: ppc.r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R2: ppc.r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R3: ppc.r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R4: ppc.r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R5: ppc.r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R6: ppc.r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R7: ppc.r[7] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R8: ppc.r[8] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R9: ppc.r[9] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R10: ppc.r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R11: ppc.r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R12: ppc.r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R13: ppc.r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R14: ppc.r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R15: ppc.r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R16: ppc.r[16] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R17: ppc.r[17] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R18: ppc.r[18] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R19: ppc.r[19] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R20: ppc.r[20] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R21: ppc.r[21] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R22: ppc.r[22] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R23: ppc.r[23] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R24: ppc.r[24] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R25: ppc.r[25] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R26: ppc.r[26] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R27: ppc.r[27] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R28: ppc.r[28] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R29: ppc.r[29] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R30: ppc.r[30] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R31: ppc.r[31] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_PC: ppc.pc = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_MSR: ppc_set_msr(info->i); break;
+ case CPUINFO_INT_REGISTER + PPC_CR: ppc_set_cr(info->i); break;
+ case CPUINFO_INT_REGISTER + PPC_LR: LR = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_CTR: CTR = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_XER: XER = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SRR0: SRR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SRR1: SRR1 = info->i; break;
+
+ case CPUINFO_INT_REGISTER + PPC_R0: ppc.r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R1: ppc.r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R2: ppc.r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R3: ppc.r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R4: ppc.r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R5: ppc.r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R6: ppc.r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R7: ppc.r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R8: ppc.r[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R9: ppc.r[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R10: ppc.r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R11: ppc.r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R12: ppc.r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R13: ppc.r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R14: ppc.r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R15: ppc.r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R16: ppc.r[16] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R17: ppc.r[17] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R18: ppc.r[18] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R19: ppc.r[19] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R20: ppc.r[20] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R21: ppc.r[21] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R22: ppc.r[22] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R23: ppc.r[23] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R24: ppc.r[24] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R25: ppc.r[25] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R26: ppc.r[26] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R27: ppc.r[27] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R28: ppc.r[28] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R29: ppc.r[29] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R30: ppc.r[30] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R31: ppc.r[31] = info->i; break;
}
}
@@ -1759,9 +1759,9 @@ static CPU_SET_INFO( ppc403 )
}
switch(state)
{
- case CPUINFO_INT_REGISTER + PPC_EXIER: EXIER = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_EXISR: EXISR = info->i; break;
- default: ppc_set_info(state, info); break;
+ case CPUINFO_INT_REGISTER + PPC_EXIER: EXIER = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_EXISR: EXISR = info->i; break;
+ default: ppc_set_info(state, info); break;
}
}
@@ -1774,9 +1774,9 @@ static CPU_SET_INFO( ppc603 )
}
switch(state)
{
- case CPUINFO_INT_REGISTER + PPC_DEC: write_decrementer(info->i); break;
- case CPUINFO_INT_INPUT_STATE + PPC_INPUT_LINE_SMI: ppc603_set_smi_line(info->i); break;
- default: ppc_set_info(state, info); break;
+ case CPUINFO_INT_REGISTER + PPC_DEC: write_decrementer(info->i); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_INPUT_LINE_SMI: ppc603_set_smi_line(info->i); break;
+ default: ppc_set_info(state, info); break;
}
}
@@ -1785,131 +1785,131 @@ static CPU_GET_INFO( ppc )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ppc); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
-
- case CPUINFO_INT_PC: /* intentional fallthrough */
- case CPUINFO_INT_REGISTER + PPC_PC: info->i = ppc.pc; break;
- case CPUINFO_INT_REGISTER + PPC_MSR: info->i = ppc_get_msr(); break;
- case CPUINFO_INT_REGISTER + PPC_CR: info->i = ppc_get_cr(); break;
- case CPUINFO_INT_REGISTER + PPC_LR: info->i = LR; break;
- case CPUINFO_INT_REGISTER + PPC_CTR: info->i = CTR; break;
- case CPUINFO_INT_REGISTER + PPC_XER: info->i = XER; break;
- case CPUINFO_INT_REGISTER + PPC_SRR0: info->i = SRR0; break;
- case CPUINFO_INT_REGISTER + PPC_SRR1: info->i = SRR1; break;
-
- case CPUINFO_INT_REGISTER + PPC_R0: info->i = ppc.r[0]; break;
- case CPUINFO_INT_REGISTER + PPC_R1: info->i = ppc.r[1]; break;
- case CPUINFO_INT_REGISTER + PPC_R2: info->i = ppc.r[2]; break;
- case CPUINFO_INT_REGISTER + PPC_R3: info->i = ppc.r[3]; break;
- case CPUINFO_INT_REGISTER + PPC_R4: info->i = ppc.r[4]; break;
- case CPUINFO_INT_REGISTER + PPC_R5: info->i = ppc.r[5]; break;
- case CPUINFO_INT_REGISTER + PPC_R6: info->i = ppc.r[6]; break;
- case CPUINFO_INT_REGISTER + PPC_R7: info->i = ppc.r[7]; break;
- case CPUINFO_INT_REGISTER + PPC_R8: info->i = ppc.r[8]; break;
- case CPUINFO_INT_REGISTER + PPC_R9: info->i = ppc.r[9]; break;
- case CPUINFO_INT_REGISTER + PPC_R10: info->i = ppc.r[10]; break;
- case CPUINFO_INT_REGISTER + PPC_R11: info->i = ppc.r[11]; break;
- case CPUINFO_INT_REGISTER + PPC_R12: info->i = ppc.r[12]; break;
- case CPUINFO_INT_REGISTER + PPC_R13: info->i = ppc.r[13]; break;
- case CPUINFO_INT_REGISTER + PPC_R14: info->i = ppc.r[14]; break;
- case CPUINFO_INT_REGISTER + PPC_R15: info->i = ppc.r[15]; break;
- case CPUINFO_INT_REGISTER + PPC_R16: info->i = ppc.r[16]; break;
- case CPUINFO_INT_REGISTER + PPC_R17: info->i = ppc.r[17]; break;
- case CPUINFO_INT_REGISTER + PPC_R18: info->i = ppc.r[18]; break;
- case CPUINFO_INT_REGISTER + PPC_R19: info->i = ppc.r[19]; break;
- case CPUINFO_INT_REGISTER + PPC_R20: info->i = ppc.r[20]; break;
- case CPUINFO_INT_REGISTER + PPC_R21: info->i = ppc.r[21]; break;
- case CPUINFO_INT_REGISTER + PPC_R22: info->i = ppc.r[22]; break;
- case CPUINFO_INT_REGISTER + PPC_R23: info->i = ppc.r[23]; break;
- case CPUINFO_INT_REGISTER + PPC_R24: info->i = ppc.r[24]; break;
- case CPUINFO_INT_REGISTER + PPC_R25: info->i = ppc.r[25]; break;
- case CPUINFO_INT_REGISTER + PPC_R26: info->i = ppc.r[26]; break;
- case CPUINFO_INT_REGISTER + PPC_R27: info->i = ppc.r[27]; break;
- case CPUINFO_INT_REGISTER + PPC_R28: info->i = ppc.r[28]; break;
- case CPUINFO_INT_REGISTER + PPC_R29: info->i = ppc.r[29]; break;
- case CPUINFO_INT_REGISTER + PPC_R30: info->i = ppc.r[30]; break;
- case CPUINFO_INT_REGISTER + PPC_R31: info->i = ppc.r[31]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ppc); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+
+ case CPUINFO_INT_PC: /* intentional fallthrough */
+ case CPUINFO_INT_REGISTER + PPC_PC: info->i = ppc.pc; break;
+ case CPUINFO_INT_REGISTER + PPC_MSR: info->i = ppc_get_msr(); break;
+ case CPUINFO_INT_REGISTER + PPC_CR: info->i = ppc_get_cr(); break;
+ case CPUINFO_INT_REGISTER + PPC_LR: info->i = LR; break;
+ case CPUINFO_INT_REGISTER + PPC_CTR: info->i = CTR; break;
+ case CPUINFO_INT_REGISTER + PPC_XER: info->i = XER; break;
+ case CPUINFO_INT_REGISTER + PPC_SRR0: info->i = SRR0; break;
+ case CPUINFO_INT_REGISTER + PPC_SRR1: info->i = SRR1; break;
+
+ case CPUINFO_INT_REGISTER + PPC_R0: info->i = ppc.r[0]; break;
+ case CPUINFO_INT_REGISTER + PPC_R1: info->i = ppc.r[1]; break;
+ case CPUINFO_INT_REGISTER + PPC_R2: info->i = ppc.r[2]; break;
+ case CPUINFO_INT_REGISTER + PPC_R3: info->i = ppc.r[3]; break;
+ case CPUINFO_INT_REGISTER + PPC_R4: info->i = ppc.r[4]; break;
+ case CPUINFO_INT_REGISTER + PPC_R5: info->i = ppc.r[5]; break;
+ case CPUINFO_INT_REGISTER + PPC_R6: info->i = ppc.r[6]; break;
+ case CPUINFO_INT_REGISTER + PPC_R7: info->i = ppc.r[7]; break;
+ case CPUINFO_INT_REGISTER + PPC_R8: info->i = ppc.r[8]; break;
+ case CPUINFO_INT_REGISTER + PPC_R9: info->i = ppc.r[9]; break;
+ case CPUINFO_INT_REGISTER + PPC_R10: info->i = ppc.r[10]; break;
+ case CPUINFO_INT_REGISTER + PPC_R11: info->i = ppc.r[11]; break;
+ case CPUINFO_INT_REGISTER + PPC_R12: info->i = ppc.r[12]; break;
+ case CPUINFO_INT_REGISTER + PPC_R13: info->i = ppc.r[13]; break;
+ case CPUINFO_INT_REGISTER + PPC_R14: info->i = ppc.r[14]; break;
+ case CPUINFO_INT_REGISTER + PPC_R15: info->i = ppc.r[15]; break;
+ case CPUINFO_INT_REGISTER + PPC_R16: info->i = ppc.r[16]; break;
+ case CPUINFO_INT_REGISTER + PPC_R17: info->i = ppc.r[17]; break;
+ case CPUINFO_INT_REGISTER + PPC_R18: info->i = ppc.r[18]; break;
+ case CPUINFO_INT_REGISTER + PPC_R19: info->i = ppc.r[19]; break;
+ case CPUINFO_INT_REGISTER + PPC_R20: info->i = ppc.r[20]; break;
+ case CPUINFO_INT_REGISTER + PPC_R21: info->i = ppc.r[21]; break;
+ case CPUINFO_INT_REGISTER + PPC_R22: info->i = ppc.r[22]; break;
+ case CPUINFO_INT_REGISTER + PPC_R23: info->i = ppc.r[23]; break;
+ case CPUINFO_INT_REGISTER + PPC_R24: info->i = ppc.r[24]; break;
+ case CPUINFO_INT_REGISTER + PPC_R25: info->i = ppc.r[25]; break;
+ case CPUINFO_INT_REGISTER + PPC_R26: info->i = ppc.r[26]; break;
+ case CPUINFO_INT_REGISTER + PPC_R27: info->i = ppc.r[27]; break;
+ case CPUINFO_INT_REGISTER + PPC_R28: info->i = ppc.r[28]; break;
+ case CPUINFO_INT_REGISTER + PPC_R29: info->i = ppc.r[29]; break;
+ case CPUINFO_INT_REGISTER + PPC_R30: info->i = ppc.r[30]; break;
+ case CPUINFO_INT_REGISTER + PPC_R31: info->i = ppc.r[31]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ppc); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ppc_icount; break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ppc); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ppc_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPC403"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "PowerPC"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + PPC_PC: sprintf(info->s, "PC: %08X", ppc.pc); break;
- case CPUINFO_STR_REGISTER + PPC_MSR: sprintf(info->s, "MSR: %08X", ppc_get_msr()); break;
- case CPUINFO_STR_REGISTER + PPC_CR: sprintf(info->s, "CR: %08X", ppc_get_cr()); break;
- case CPUINFO_STR_REGISTER + PPC_LR: sprintf(info->s, "LR: %08X", LR); break;
- case CPUINFO_STR_REGISTER + PPC_CTR: sprintf(info->s, "CTR: %08X", CTR); break;
- case CPUINFO_STR_REGISTER + PPC_XER: sprintf(info->s, "XER: %08X", XER); break;
- case CPUINFO_STR_REGISTER + PPC_SRR0: sprintf(info->s, "SRR0: %08X", SRR0); break;
- case CPUINFO_STR_REGISTER + PPC_SRR1: sprintf(info->s, "SRR1: %08X", SRR1); break;
-
- case CPUINFO_STR_REGISTER + PPC_R0: sprintf(info->s, "R0: %08X", ppc.r[0]); break;
- case CPUINFO_STR_REGISTER + PPC_R1: sprintf(info->s, "R1: %08X", ppc.r[1]); break;
- case CPUINFO_STR_REGISTER + PPC_R2: sprintf(info->s, "R2: %08X", ppc.r[2]); break;
- case CPUINFO_STR_REGISTER + PPC_R3: sprintf(info->s, "R3: %08X", ppc.r[3]); break;
- case CPUINFO_STR_REGISTER + PPC_R4: sprintf(info->s, "R4: %08X", ppc.r[4]); break;
- case CPUINFO_STR_REGISTER + PPC_R5: sprintf(info->s, "R5: %08X", ppc.r[5]); break;
- case CPUINFO_STR_REGISTER + PPC_R6: sprintf(info->s, "R6: %08X", ppc.r[6]); break;
- case CPUINFO_STR_REGISTER + PPC_R7: sprintf(info->s, "R7: %08X", ppc.r[7]); break;
- case CPUINFO_STR_REGISTER + PPC_R8: sprintf(info->s, "R8: %08X", ppc.r[8]); break;
- case CPUINFO_STR_REGISTER + PPC_R9: sprintf(info->s, "R9: %08X", ppc.r[9]); break;
- case CPUINFO_STR_REGISTER + PPC_R10: sprintf(info->s, "R10: %08X", ppc.r[10]); break;
- case CPUINFO_STR_REGISTER + PPC_R11: sprintf(info->s, "R11: %08X", ppc.r[11]); break;
- case CPUINFO_STR_REGISTER + PPC_R12: sprintf(info->s, "R12: %08X", ppc.r[12]); break;
- case CPUINFO_STR_REGISTER + PPC_R13: sprintf(info->s, "R13: %08X", ppc.r[13]); break;
- case CPUINFO_STR_REGISTER + PPC_R14: sprintf(info->s, "R14: %08X", ppc.r[14]); break;
- case CPUINFO_STR_REGISTER + PPC_R15: sprintf(info->s, "R15: %08X", ppc.r[15]); break;
- case CPUINFO_STR_REGISTER + PPC_R16: sprintf(info->s, "R16: %08X", ppc.r[16]); break;
- case CPUINFO_STR_REGISTER + PPC_R17: sprintf(info->s, "R17: %08X", ppc.r[17]); break;
- case CPUINFO_STR_REGISTER + PPC_R18: sprintf(info->s, "R18: %08X", ppc.r[18]); break;
- case CPUINFO_STR_REGISTER + PPC_R19: sprintf(info->s, "R19: %08X", ppc.r[19]); break;
- case CPUINFO_STR_REGISTER + PPC_R20: sprintf(info->s, "R20: %08X", ppc.r[20]); break;
- case CPUINFO_STR_REGISTER + PPC_R21: sprintf(info->s, "R21: %08X", ppc.r[21]); break;
- case CPUINFO_STR_REGISTER + PPC_R22: sprintf(info->s, "R22: %08X", ppc.r[22]); break;
- case CPUINFO_STR_REGISTER + PPC_R23: sprintf(info->s, "R23: %08X", ppc.r[23]); break;
- case CPUINFO_STR_REGISTER + PPC_R24: sprintf(info->s, "R24: %08X", ppc.r[24]); break;
- case CPUINFO_STR_REGISTER + PPC_R25: sprintf(info->s, "R25: %08X", ppc.r[25]); break;
- case CPUINFO_STR_REGISTER + PPC_R26: sprintf(info->s, "R26: %08X", ppc.r[26]); break;
- case CPUINFO_STR_REGISTER + PPC_R27: sprintf(info->s, "R27: %08X", ppc.r[27]); break;
- case CPUINFO_STR_REGISTER + PPC_R28: sprintf(info->s, "R28: %08X", ppc.r[28]); break;
- case CPUINFO_STR_REGISTER + PPC_R29: sprintf(info->s, "R29: %08X", ppc.r[29]); break;
- case CPUINFO_STR_REGISTER + PPC_R30: sprintf(info->s, "R30: %08X", ppc.r[30]); break;
- case CPUINFO_STR_REGISTER + PPC_R31: sprintf(info->s, "R31: %08X", ppc.r[31]); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPC403"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "PowerPC"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + PPC_PC: sprintf(info->s, "PC: %08X", ppc.pc); break;
+ case CPUINFO_STR_REGISTER + PPC_MSR: sprintf(info->s, "MSR: %08X", ppc_get_msr()); break;
+ case CPUINFO_STR_REGISTER + PPC_CR: sprintf(info->s, "CR: %08X", ppc_get_cr()); break;
+ case CPUINFO_STR_REGISTER + PPC_LR: sprintf(info->s, "LR: %08X", LR); break;
+ case CPUINFO_STR_REGISTER + PPC_CTR: sprintf(info->s, "CTR: %08X", CTR); break;
+ case CPUINFO_STR_REGISTER + PPC_XER: sprintf(info->s, "XER: %08X", XER); break;
+ case CPUINFO_STR_REGISTER + PPC_SRR0: sprintf(info->s, "SRR0: %08X", SRR0); break;
+ case CPUINFO_STR_REGISTER + PPC_SRR1: sprintf(info->s, "SRR1: %08X", SRR1); break;
+
+ case CPUINFO_STR_REGISTER + PPC_R0: sprintf(info->s, "R0: %08X", ppc.r[0]); break;
+ case CPUINFO_STR_REGISTER + PPC_R1: sprintf(info->s, "R1: %08X", ppc.r[1]); break;
+ case CPUINFO_STR_REGISTER + PPC_R2: sprintf(info->s, "R2: %08X", ppc.r[2]); break;
+ case CPUINFO_STR_REGISTER + PPC_R3: sprintf(info->s, "R3: %08X", ppc.r[3]); break;
+ case CPUINFO_STR_REGISTER + PPC_R4: sprintf(info->s, "R4: %08X", ppc.r[4]); break;
+ case CPUINFO_STR_REGISTER + PPC_R5: sprintf(info->s, "R5: %08X", ppc.r[5]); break;
+ case CPUINFO_STR_REGISTER + PPC_R6: sprintf(info->s, "R6: %08X", ppc.r[6]); break;
+ case CPUINFO_STR_REGISTER + PPC_R7: sprintf(info->s, "R7: %08X", ppc.r[7]); break;
+ case CPUINFO_STR_REGISTER + PPC_R8: sprintf(info->s, "R8: %08X", ppc.r[8]); break;
+ case CPUINFO_STR_REGISTER + PPC_R9: sprintf(info->s, "R9: %08X", ppc.r[9]); break;
+ case CPUINFO_STR_REGISTER + PPC_R10: sprintf(info->s, "R10: %08X", ppc.r[10]); break;
+ case CPUINFO_STR_REGISTER + PPC_R11: sprintf(info->s, "R11: %08X", ppc.r[11]); break;
+ case CPUINFO_STR_REGISTER + PPC_R12: sprintf(info->s, "R12: %08X", ppc.r[12]); break;
+ case CPUINFO_STR_REGISTER + PPC_R13: sprintf(info->s, "R13: %08X", ppc.r[13]); break;
+ case CPUINFO_STR_REGISTER + PPC_R14: sprintf(info->s, "R14: %08X", ppc.r[14]); break;
+ case CPUINFO_STR_REGISTER + PPC_R15: sprintf(info->s, "R15: %08X", ppc.r[15]); break;
+ case CPUINFO_STR_REGISTER + PPC_R16: sprintf(info->s, "R16: %08X", ppc.r[16]); break;
+ case CPUINFO_STR_REGISTER + PPC_R17: sprintf(info->s, "R17: %08X", ppc.r[17]); break;
+ case CPUINFO_STR_REGISTER + PPC_R18: sprintf(info->s, "R18: %08X", ppc.r[18]); break;
+ case CPUINFO_STR_REGISTER + PPC_R19: sprintf(info->s, "R19: %08X", ppc.r[19]); break;
+ case CPUINFO_STR_REGISTER + PPC_R20: sprintf(info->s, "R20: %08X", ppc.r[20]); break;
+ case CPUINFO_STR_REGISTER + PPC_R21: sprintf(info->s, "R21: %08X", ppc.r[21]); break;
+ case CPUINFO_STR_REGISTER + PPC_R22: sprintf(info->s, "R22: %08X", ppc.r[22]); break;
+ case CPUINFO_STR_REGISTER + PPC_R23: sprintf(info->s, "R23: %08X", ppc.r[23]); break;
+ case CPUINFO_STR_REGISTER + PPC_R24: sprintf(info->s, "R24: %08X", ppc.r[24]); break;
+ case CPUINFO_STR_REGISTER + PPC_R25: sprintf(info->s, "R25: %08X", ppc.r[25]); break;
+ case CPUINFO_STR_REGISTER + PPC_R26: sprintf(info->s, "R26: %08X", ppc.r[26]); break;
+ case CPUINFO_STR_REGISTER + PPC_R27: sprintf(info->s, "R27: %08X", ppc.r[27]); break;
+ case CPUINFO_STR_REGISTER + PPC_R28: sprintf(info->s, "R28: %08X", ppc.r[28]); break;
+ case CPUINFO_STR_REGISTER + PPC_R29: sprintf(info->s, "R29: %08X", ppc.r[29]); break;
+ case CPUINFO_STR_REGISTER + PPC_R30: sprintf(info->s, "R30: %08X", ppc.r[30]); break;
+ case CPUINFO_STR_REGISTER + PPC_R31: sprintf(info->s, "R31: %08X", ppc.r[31]); break;
}
}
@@ -1918,24 +1918,24 @@ CPU_GET_INFO( ppc403 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_REGISTER + PPC_EXIER: info->i = EXIER; break;
- case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = EXISR; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_REGISTER + PPC_EXIER: info->i = EXIER; break;
+ case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = EXISR; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc403); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc403); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc403); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc403); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc403); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc403); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc403); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc403); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc403); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc403); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPC403"); break;
- case CPUINFO_STR_REGISTER + PPC_EXIER: sprintf(info->s, "EXIER: %08X", EXIER); break;
- case CPUINFO_STR_REGISTER + PPC_EXISR: sprintf(info->s, "EXISR: %08X", EXISR); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPC403"); break;
+ case CPUINFO_STR_REGISTER + PPC_EXIER: sprintf(info->s, "EXIER: %08X", EXIER); break;
+ case CPUINFO_STR_REGISTER + PPC_EXISR: sprintf(info->s, "EXISR: %08X", EXISR); break;
- default: CPU_GET_INFO_CALL(ppc); break;
+ default: CPU_GET_INFO_CALL(ppc); break;
}
}
@@ -1944,24 +1944,24 @@ CPU_GET_INFO( ppc405 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_REGISTER + PPC_EXIER: info->i = EXIER; break;
- case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = EXISR; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_REGISTER + PPC_EXIER: info->i = EXIER; break;
+ case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = EXISR; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc405); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc405); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc405); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc405); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc405); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc405); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc405); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc405); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc405); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc405); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPC405"); break;
- case CPUINFO_STR_REGISTER + PPC_EXIER: sprintf(info->s, "EXIER: %08X", EXIER); break;
- case CPUINFO_STR_REGISTER + PPC_EXISR: sprintf(info->s, "EXISR: %08X", EXISR); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPC405"); break;
+ case CPUINFO_STR_REGISTER + PPC_EXIER: sprintf(info->s, "EXIER: %08X", EXIER); break;
+ case CPUINFO_STR_REGISTER + PPC_EXISR: sprintf(info->s, "EXISR: %08X", EXISR); break;
- default: CPU_GET_INFO_CALL(ppc); break;
+ default: CPU_GET_INFO_CALL(ppc); break;
}
}
@@ -1970,31 +1970,31 @@ CPU_GET_INFO( ppc603 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 17; break;
- case CPUINFO_INT_REGISTER + PPC_DEC: info->i = read_decrementer(); break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = 17; break;
+ case CPUINFO_INT_REGISTER + PPC_DEC: info->i = read_decrementer(); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc603); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc603); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
- case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
- case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
- case CPUINFO_FCT_TRANSLATE: info->translate = ppc_translate_address_cb; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc603); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc603); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
+ case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = ppc_translate_address_cb; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPC603"); break;
- case CPUINFO_STR_REGISTER + PPC_DEC: sprintf(info->s, "DEC: %08X", read_decrementer()); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPC603"); break;
+ case CPUINFO_STR_REGISTER + PPC_DEC: sprintf(info->s, "DEC: %08X", read_decrementer()); break;
- default: CPU_GET_INFO_CALL(ppc); break;
+ default: CPU_GET_INFO_CALL(ppc); break;
}
}
@@ -2007,8 +2007,8 @@ static CPU_SET_INFO( ppc602 )
}
switch(state)
{
- case CPUINFO_INT_INPUT_STATE + PPC_INPUT_LINE_SMI: ppc602_set_smi_line(info->i); break;
- default: ppc_set_info(state, info); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_INPUT_LINE_SMI: ppc602_set_smi_line(info->i); break;
+ default: ppc_set_info(state, info); break;
}
}
@@ -2017,29 +2017,29 @@ CPU_GET_INFO( ppc602 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_REGISTER + PPC_IBR: info->i = ppc.ibr; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_REGISTER + PPC_IBR: info->i = ppc.ibr; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc602); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc602); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc602); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc602); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc602); break;
- case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
- case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
- case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
- case CPUINFO_FCT_TRANSLATE: info->translate = ppc_translate_address_cb; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc602); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc602); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc602); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc602); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc602); break;
+ case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = ppc_translate_address_cb; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPC602"); break;
- case CPUINFO_STR_REGISTER + PPC_IBR: sprintf(info->s, "IBR: %08X", ppc.ibr); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPC602"); break;
+ case CPUINFO_STR_REGISTER + PPC_IBR: sprintf(info->s, "IBR: %08X", ppc.ibr); break;
- default: CPU_GET_INFO_CALL(ppc); break;
+ default: CPU_GET_INFO_CALL(ppc); break;
}
}
@@ -2053,7 +2053,7 @@ static CPU_SET_INFO( mpc8240 )
}
switch(state)
{
- default: ppc_set_info(state, info); break;
+ default: ppc_set_info(state, info); break;
}
}
@@ -2062,26 +2062,26 @@ CPU_GET_INFO( mpc8240 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mpc8240); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mpc8240); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mpc8240); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
- case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
- case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(mpc8240); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mpc8240); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(mpc8240); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
+ case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "MPC8240"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "MPC8240"); break;
- default: CPU_GET_INFO_CALL(ppc); break;
+ default: CPU_GET_INFO_CALL(ppc); break;
}
}
@@ -2094,7 +2094,7 @@ static CPU_SET_INFO( ppc601 )
}
switch(state)
{
- default: ppc_set_info(state, info); break;
+ default: ppc_set_info(state, info); break;
}
}
@@ -2103,26 +2103,26 @@ CPU_GET_INFO( ppc601 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc601); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc601); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc601); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
- case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
- case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc601); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc601); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc601); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
+ case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPC601"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPC601"); break;
- default: CPU_GET_INFO_CALL(ppc); break;
+ default: CPU_GET_INFO_CALL(ppc); break;
}
}
@@ -2135,7 +2135,7 @@ static CPU_SET_INFO( ppc604 )
}
switch(state)
{
- default: ppc_set_info(state, info); break;
+ default: ppc_set_info(state, info); break;
}
}
@@ -2144,26 +2144,26 @@ CPU_GET_INFO( ppc604 )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc604); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc604); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc604); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
- case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
- case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
- case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppc604); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc604); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppc603); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppc604); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppc603); break;
+ case CPUINFO_FCT_READ: info->read = CPU_GET_READ_NAME(ppc); break;
+ case CPUINFO_FCT_WRITE: info->write = CPU_GET_WRITE_NAME(ppc); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_GET_READOP_NAME(ppc); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPC604"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPC604"); break;
- default: CPU_GET_INFO_CALL(ppc); break;
+ default: CPU_GET_INFO_CALL(ppc); break;
}
}
@@ -2179,4 +2179,3 @@ DEFINE_LEGACY_CPU_DEVICE(PPC603E, ppc603e);
DEFINE_LEGACY_CPU_DEVICE(PPC603R, ppc603r);
DEFINE_LEGACY_CPU_DEVICE(PPC604, ppc604);
DEFINE_LEGACY_CPU_DEVICE(MPC8240, mpc8240);
-
diff --git a/src/emu/cpu/powerpc/ppc.h b/src/emu/cpu/powerpc/ppc.h
index 9121c779706..6badb7f6f86 100644
--- a/src/emu/cpu/powerpc/ppc.h
+++ b/src/emu/cpu/powerpc/ppc.h
@@ -23,17 +23,17 @@
***************************************************************************/
/* general constants */
-#define PPC_MAX_FASTRAM 4
-#define PPC_MAX_HOTSPOTS 16
+#define PPC_MAX_FASTRAM 4
+#define PPC_MAX_HOTSPOTS 16
/* interrupt types */
-#define PPC_IRQ 0 /* external IRQ */
-#define PPC_IRQ_LINE_0 0 /* (4XX) external IRQ0 */
-#define PPC_IRQ_LINE_1 1 /* (4XX) external IRQ1 */
-#define PPC_IRQ_LINE_2 2 /* (4XX) external IRQ2 */
-#define PPC_IRQ_LINE_3 3 /* (4XX) external IRQ3 */
-#define PPC_IRQ_LINE_4 4 /* (4XX) external IRQ4 */
+#define PPC_IRQ 0 /* external IRQ */
+#define PPC_IRQ_LINE_0 0 /* (4XX) external IRQ0 */
+#define PPC_IRQ_LINE_1 1 /* (4XX) external IRQ1 */
+#define PPC_IRQ_LINE_2 2 /* (4XX) external IRQ2 */
+#define PPC_IRQ_LINE_3 3 /* (4XX) external IRQ3 */
+#define PPC_IRQ_LINE_4 4 /* (4XX) external IRQ4 */
/* register enumeration */
@@ -147,14 +147,14 @@ enum
/* compiler-specific options */
-#define PPCDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
-#define PPCDRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
-#define PPCDRC_ACCURATE_SINGLES 0x0004 /* do excessive rounding to make single-precision results "accurate" */
+#define PPCDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
+#define PPCDRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
+#define PPCDRC_ACCURATE_SINGLES 0x0004 /* do excessive rounding to make single-precision results "accurate" */
/* common sets of options */
-#define PPCDRC_COMPATIBLE_OPTIONS (PPCDRC_STRICT_VERIFY | PPCDRC_FLUSH_PC | PPCDRC_ACCURATE_SINGLES)
-#define PPCDRC_FASTEST_OPTIONS (0)
+#define PPCDRC_COMPATIBLE_OPTIONS (PPCDRC_STRICT_VERIFY | PPCDRC_FLUSH_PC | PPCDRC_ACCURATE_SINGLES)
+#define PPCDRC_FASTEST_OPTIONS (0)
@@ -166,9 +166,9 @@ typedef void (*ppc4xx_spu_tx_handler)(device_t *device, UINT8 data);
struct powerpc_config
{
- UINT32 bus_frequency;
- read32_device_func dcr_read_func;
- write32_device_func dcr_write_func;
+ UINT32 bus_frequency;
+ read32_device_func dcr_read_func;
+ write32_device_func dcr_write_func;
};
typedef void (*ppc_dcstore_handler)(device_t *device, UINT32 address);
@@ -206,4 +206,4 @@ DECLARE_LEGACY_CPU_DEVICE(PPC604, ppc604);
DECLARE_LEGACY_CPU_DEVICE(MPC8240, mpc8240);
-#endif /* __PPC_H__ */
+#endif /* __PPC_H__ */
diff --git a/src/emu/cpu/powerpc/ppc403.c b/src/emu/cpu/powerpc/ppc403.c
index 94f34bd0600..8cd212c683e 100644
--- a/src/emu/cpu/powerpc/ppc403.c
+++ b/src/emu/cpu/powerpc/ppc403.c
@@ -2,20 +2,20 @@
static void ppc403_dma_exec(int ch);
-#define DMA_CE 0x80000000
-#define DMA_CIE 0x40000000
-#define DMA_TD 0x20000000
-#define DMA_PL 0x10000000
-#define DMA_DAI 0x02000000
-#define DMA_SAI 0x01000000
-#define DMA_CP 0x00800000
-#define DMA_ETD 0x00000200
-#define DMA_TCE 0x00000100
-#define DMA_CH 0x00000080
-#define DMA_BME 0x00000040
-#define DMA_ECE 0x00000020
-#define DMA_TCD 0x00000010
-#define DMA_PCE 0x00000008
+#define DMA_CE 0x80000000
+#define DMA_CIE 0x40000000
+#define DMA_TD 0x20000000
+#define DMA_PL 0x10000000
+#define DMA_DAI 0x02000000
+#define DMA_SAI 0x01000000
+#define DMA_CP 0x00800000
+#define DMA_ETD 0x00000200
+#define DMA_TCE 0x00000100
+#define DMA_CH 0x00000080
+#define DMA_BME 0x00000040
+#define DMA_ECE 0x00000020
+#define DMA_TCD 0x00000010
+#define DMA_PCE 0x00000008
static SPU_RX_HANDLER spu_rx_handler;
static SPU_TX_HANDLER spu_tx_handler;
@@ -36,37 +36,37 @@ INLINE void ppc_set_dcr(int dcr, UINT32 value)
{
switch(dcr)
{
- case DCR_BEAR: ppc.bear = value; break;
- case DCR_BESR: ppc.besr = value; break;
- case DCR_BR0: ppc.br[0] = value; break;
- case DCR_BR1: ppc.br[1] = value; break;
- case DCR_BR2: ppc.br[2] = value; break;
- case DCR_BR3: ppc.br[3] = value; break;
- case DCR_BR4: ppc.br[4] = value; break;
- case DCR_BR5: ppc.br[5] = value; break;
- case DCR_BR6: ppc.br[6] = value; break;
- case DCR_BR7: ppc.br[7] = value; break;
-
- case DCR_EXISR: ppc.exisr &= ~value; break;
- case DCR_EXIER: EXIER = value; ppc.exisr &= EXIER; break;
- case DCR_IOCR: ppc.iocr = value; break;
- case DCR_DMASR: break; /* TODO */
- case DCR_DMADA0: ppc.dma[0].da = value; break;
- case DCR_DMADA1: ppc.dma[1].da = value; break;
- case DCR_DMADA2: ppc.dma[2].da = value; break;
- case DCR_DMADA3: ppc.dma[3].da = value; break;
- case DCR_DMASA0: ppc.dma[0].sa = value; break;
- case DCR_DMASA1: ppc.dma[1].sa = value; break;
- case DCR_DMASA2: ppc.dma[2].sa = value; break;
- case DCR_DMASA3: ppc.dma[3].sa = value; break;
- case DCR_DMACT0: ppc.dma[0].ct = value; break;
- case DCR_DMACT1: ppc.dma[1].ct = value; break;
- case DCR_DMACT2: ppc.dma[2].ct = value; break;
- case DCR_DMACT3: ppc.dma[3].ct = value; break;
- case DCR_DMACR0: ppc.dma[0].cr = value; ppc403_dma_exec(0); break;
- case DCR_DMACR1: ppc.dma[1].cr = value; ppc403_dma_exec(1); break;
- case DCR_DMACR2: ppc.dma[2].cr = value; ppc403_dma_exec(2); break;
- case DCR_DMACR3: ppc.dma[3].cr = value; ppc403_dma_exec(3); break;
+ case DCR_BEAR: ppc.bear = value; break;
+ case DCR_BESR: ppc.besr = value; break;
+ case DCR_BR0: ppc.br[0] = value; break;
+ case DCR_BR1: ppc.br[1] = value; break;
+ case DCR_BR2: ppc.br[2] = value; break;
+ case DCR_BR3: ppc.br[3] = value; break;
+ case DCR_BR4: ppc.br[4] = value; break;
+ case DCR_BR5: ppc.br[5] = value; break;
+ case DCR_BR6: ppc.br[6] = value; break;
+ case DCR_BR7: ppc.br[7] = value; break;
+
+ case DCR_EXISR: ppc.exisr &= ~value; break;
+ case DCR_EXIER: EXIER = value; ppc.exisr &= EXIER; break;
+ case DCR_IOCR: ppc.iocr = value; break;
+ case DCR_DMASR: break; /* TODO */
+ case DCR_DMADA0: ppc.dma[0].da = value; break;
+ case DCR_DMADA1: ppc.dma[1].da = value; break;
+ case DCR_DMADA2: ppc.dma[2].da = value; break;
+ case DCR_DMADA3: ppc.dma[3].da = value; break;
+ case DCR_DMASA0: ppc.dma[0].sa = value; break;
+ case DCR_DMASA1: ppc.dma[1].sa = value; break;
+ case DCR_DMASA2: ppc.dma[2].sa = value; break;
+ case DCR_DMASA3: ppc.dma[3].sa = value; break;
+ case DCR_DMACT0: ppc.dma[0].ct = value; break;
+ case DCR_DMACT1: ppc.dma[1].ct = value; break;
+ case DCR_DMACT2: ppc.dma[2].ct = value; break;
+ case DCR_DMACT3: ppc.dma[3].ct = value; break;
+ case DCR_DMACR0: ppc.dma[0].cr = value; ppc403_dma_exec(0); break;
+ case DCR_DMACR1: ppc.dma[1].cr = value; ppc403_dma_exec(1); break;
+ case DCR_DMACR2: ppc.dma[2].cr = value; ppc403_dma_exec(2); break;
+ case DCR_DMACR3: ppc.dma[3].cr = value; ppc403_dma_exec(3); break;
default:
fatalerror("ppc: set_dcr: Unimplemented DCR %X\n", dcr);
@@ -78,36 +78,36 @@ INLINE UINT32 ppc_get_dcr(int dcr)
{
switch(dcr)
{
- case DCR_BEAR: return ppc.bear;
- case DCR_BESR: return ppc.besr;
- case DCR_BR0: return ppc.br[0];
- case DCR_BR1: return ppc.br[1];
- case DCR_BR2: return ppc.br[2];
- case DCR_BR3: return ppc.br[3];
- case DCR_BR4: return ppc.br[4];
- case DCR_BR5: return ppc.br[5];
- case DCR_BR6: return ppc.br[6];
- case DCR_BR7: return ppc.br[7];
- case DCR_EXISR: return EXISR;
- case DCR_EXIER: return EXIER;
- case DCR_IOCR: return ppc.iocr;
- case DCR_DMASR: return ppc.dmasr;
- case DCR_DMADA0: return ppc.dma[0].da;
- case DCR_DMADA1: return ppc.dma[1].da;
- case DCR_DMADA2: return ppc.dma[2].da;
- case DCR_DMADA3: return ppc.dma[3].da;
- case DCR_DMASA0: return ppc.dma[0].sa;
- case DCR_DMASA1: return ppc.dma[1].sa;
- case DCR_DMASA2: return ppc.dma[2].sa;
- case DCR_DMASA3: return ppc.dma[3].sa;
- case DCR_DMACT0: return ppc.dma[0].ct;
- case DCR_DMACT1: return ppc.dma[1].ct;
- case DCR_DMACT2: return ppc.dma[2].ct;
- case DCR_DMACT3: return ppc.dma[3].ct;
- case DCR_DMACR0: return ppc.dma[0].cr;
- case DCR_DMACR1: return ppc.dma[1].cr;
- case DCR_DMACR2: return ppc.dma[2].cr;
- case DCR_DMACR3: return ppc.dma[3].cr;
+ case DCR_BEAR: return ppc.bear;
+ case DCR_BESR: return ppc.besr;
+ case DCR_BR0: return ppc.br[0];
+ case DCR_BR1: return ppc.br[1];
+ case DCR_BR2: return ppc.br[2];
+ case DCR_BR3: return ppc.br[3];
+ case DCR_BR4: return ppc.br[4];
+ case DCR_BR5: return ppc.br[5];
+ case DCR_BR6: return ppc.br[6];
+ case DCR_BR7: return ppc.br[7];
+ case DCR_EXISR: return EXISR;
+ case DCR_EXIER: return EXIER;
+ case DCR_IOCR: return ppc.iocr;
+ case DCR_DMASR: return ppc.dmasr;
+ case DCR_DMADA0: return ppc.dma[0].da;
+ case DCR_DMADA1: return ppc.dma[1].da;
+ case DCR_DMADA2: return ppc.dma[2].da;
+ case DCR_DMADA3: return ppc.dma[3].da;
+ case DCR_DMASA0: return ppc.dma[0].sa;
+ case DCR_DMASA1: return ppc.dma[1].sa;
+ case DCR_DMASA2: return ppc.dma[2].sa;
+ case DCR_DMASA3: return ppc.dma[3].sa;
+ case DCR_DMACT0: return ppc.dma[0].ct;
+ case DCR_DMACT1: return ppc.dma[1].ct;
+ case DCR_DMACT2: return ppc.dma[2].ct;
+ case DCR_DMACT3: return ppc.dma[3].ct;
+ case DCR_DMACR0: return ppc.dma[0].cr;
+ case DCR_DMACR1: return ppc.dma[1].cr;
+ case DCR_DMACR2: return ppc.dma[2].cr;
+ case DCR_DMACR3: return ppc.dma[3].cr;
default:
fatalerror("ppc: get_dcr: Unimplemented DCR %X\n", dcr);
@@ -181,11 +181,11 @@ static CPU_EXECUTE( ppc403 )
switch(opcode >> 26)
{
- case 19: ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
- case 31: ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
- case 59: ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
- case 63: ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
- default: ppc.optable[opcode >> 26](opcode); break;
+ case 19: ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
+ case 31: ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
+ case 59: ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
+ case 63: ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
+ default: ppc.optable[opcode >> 26](opcode); break;
}
ppc_icount--;
@@ -199,7 +199,7 @@ static CPU_EXECUTE( ppc403 )
if (ppc.pit_int_enable) {
ppc.interrupt_pending |= 0x2;
}
- if (ppc.tcr & 0x00400000) // Automatic reload
+ if (ppc.tcr & 0x00400000) // Automatic reload
{
ppc.pit_counter = ppc.pit;
}
@@ -249,7 +249,7 @@ void ppc403_exception(int exception)
{
switch( exception )
{
- case EXCEPTION_IRQ: /* External Interrupt */
+ case EXCEPTION_IRQ: /* External Interrupt */
{
if( ppc_get_msr() & MSR_EE ) {
UINT32 msr = ppc_get_msr();
@@ -257,7 +257,7 @@ void ppc403_exception(int exception)
SRR0 = ppc.npc;
SRR1 = msr;
- msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
+ msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
if( msr & MSR_LE )
msr |= MSR_ILE;
else
@@ -271,14 +271,14 @@ void ppc403_exception(int exception)
break;
}
- case EXCEPTION_TRAP: /* Program exception / Trap */
+ case EXCEPTION_TRAP: /* Program exception / Trap */
{
UINT32 msr = ppc_get_msr();
SRR0 = ppc.pc;
SRR1 = msr;
- msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
+ msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
if( msr & MSR_ILE )
msr |= MSR_LE;
else
@@ -292,14 +292,14 @@ void ppc403_exception(int exception)
break;
}
- case EXCEPTION_SYSTEM_CALL: /* System call */
+ case EXCEPTION_SYSTEM_CALL: /* System call */
{
UINT32 msr = ppc_get_msr();
SRR0 = ppc.npc;
SRR1 = msr;
- msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
+ msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
if( msr & MSR_ILE )
msr |= MSR_LE;
else
@@ -321,7 +321,7 @@ void ppc403_exception(int exception)
SRR0 = ppc.npc;
SRR1 = msr;
- msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
+ msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
if( msr & MSR_LE )
msr |= MSR_ILE;
else
@@ -330,13 +330,13 @@ void ppc403_exception(int exception)
ppc.npc = EVPR | 0x1000;
- ppc.tsr |= 0x08000000; // PIT interrupt
+ ppc.tsr |= 0x08000000; // PIT interrupt
ppc.interrupt_pending &= ~0x2;
}
break;
}
- case EXCEPTION_FIXED_INTERVAL_TIMER: /* Fixed Interval Timer */
+ case EXCEPTION_FIXED_INTERVAL_TIMER: /* Fixed Interval Timer */
{
if( ppc_get_msr() & MSR_EE ) {
UINT32 msr = ppc_get_msr();
@@ -344,7 +344,7 @@ void ppc403_exception(int exception)
SRR0 = ppc.npc;
SRR1 = msr;
- msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
+ msr &= ~(MSR_WE | MSR_PR | MSR_EE | MSR_PE); // Clear WE, PR, EE, PR
if( msr & MSR_LE )
msr |= MSR_ILE;
else
@@ -357,7 +357,7 @@ void ppc403_exception(int exception)
break;
}
- case EXCEPTION_WATCHDOG_TIMER: /* Watchdog Timer */
+ case EXCEPTION_WATCHDOG_TIMER: /* Watchdog Timer */
{
UINT32 msr = ppc_get_msr();
@@ -557,15 +557,15 @@ static UINT8 ppc403_spu_r(UINT32 a)
{
switch(a & 0xf)
{
- case 0x0: return ppc.spu.spls | 0x6; /* transmit buffer is always empty */
- case 0x2: return ppc.spu.sphs;
- case 0x4: return (ppc.spu.brd >> 8) & 0xf;
- case 0x5: return (ppc.spu.brd & 0xff);
- case 0x6: return ppc.spu.spctl;
- case 0x7: return ppc.spu.sprc;
- case 0x8: return ppc.spu.sptc;
- case 0x9: return ppc.spu.sprb;
- default: fatalerror("ppc: spu_r: %02X\n", a & 0xf);
+ case 0x0: return ppc.spu.spls | 0x6; /* transmit buffer is always empty */
+ case 0x2: return ppc.spu.sphs;
+ case 0x4: return (ppc.spu.brd >> 8) & 0xf;
+ case 0x5: return (ppc.spu.brd & 0xff);
+ case 0x6: return ppc.spu.spctl;
+ case 0x7: return ppc.spu.sprc;
+ case 0x8: return ppc.spu.sptc;
+ case 0x9: return ppc.spu.sprb;
+ default: fatalerror("ppc: spu_r: %02X\n", a & 0xf);
}
}
@@ -574,11 +574,11 @@ static void ppc403_spu_w(UINT32 a, UINT8 d)
switch(a & 0xf)
{
case 0x0:
- if( d & 0x80 ) ppc.spu.spls &= ~0x80;
- if( d & 0x40 ) ppc.spu.spls &= ~0x40;
- if( d & 0x20 ) ppc.spu.spls &= ~0x20;
- if( d & 0x10 ) ppc.spu.spls &= ~0x10;
- if( d & 0x08 ) ppc.spu.spls &= ~0x08;
+ if( d & 0x80 ) ppc.spu.spls &= ~0x80;
+ if( d & 0x40 ) ppc.spu.spls &= ~0x40;
+ if( d & 0x20 ) ppc.spu.spls &= ~0x20;
+ if( d & 0x10 ) ppc.spu.spls &= ~0x10;
+ if( d & 0x08 ) ppc.spu.spls &= ~0x08;
break;
case 0x2:
@@ -606,16 +606,16 @@ static void ppc403_spu_w(UINT32 a, UINT8 d)
case 0x7:
ppc.spu.sprc = d;
- if (ppc.spu.sprc & 0x80) /* enable RX */
+ if (ppc.spu.sprc & 0x80) /* enable RX */
{
/*
- int baud_rate;
- if (ppc.iocr & 0x2) {
- baud_rate = (3686400 / (ppc.spu.brd + 1)) / 16;
- } else {
- baud_rate = (33333333 / (ppc.spu.brd + 1)) / 16;
- }
- */
+ int baud_rate;
+ if (ppc.iocr & 0x2) {
+ baud_rate = (3686400 / (ppc.spu.brd + 1)) / 16;
+ } else {
+ baud_rate = (33333333 / (ppc.spu.brd + 1)) / 16;
+ }
+ */
/* check if serial port is hooked to a DMA channel */
/* if so, do a DMA operation */
@@ -656,7 +656,7 @@ static void ppc403_spu_w(UINT32 a, UINT8 d)
#endif
}
}
- else /* disable RX */
+ else /* disable RX */
{
}
break;
@@ -779,23 +779,23 @@ static void ppc403_dma_exec(int ch)
if( ppc.dma[ch].cr & DMA_DAI )
dai = width;
else
- dai = 0; /* DA not incremented */
+ dai = 0; /* DA not incremented */
if( ppc.dma[ch].cr & DMA_SAI )
sai = width;
else
- sai = 0; /* SA not incremented */
+ sai = 0; /* SA not incremented */
/* transfer mode */
switch( (ppc.dma[ch].cr >> 21) & 0x3 )
{
- case 0: /* buffered DMA */
- if( ppc.dma[ch].cr & DMA_TD ) /* peripheral to mem */
+ case 0: /* buffered DMA */
+ if( ppc.dma[ch].cr & DMA_TD ) /* peripheral to mem */
{
// nothing to do for now */
}
- else /* mem to peripheral */
+ else /* mem to peripheral */
{
/* check if the serial port is hooked to channel 2 or 3 */
@@ -827,16 +827,16 @@ static void ppc403_dma_exec(int ch)
}
break;
- case 1: /* fly-by DMA */
+ case 1: /* fly-by DMA */
fatalerror("ppc: dma_exec: fly-by DMA not implemented\n");
break;
- case 2: /* software initiated mem-to-mem DMA */
+ case 2: /* software initiated mem-to-mem DMA */
//mame_printf_debug("ppc: DMA (%d, SW mem-to-mem): SA = %08X, DA = %08X, CT = %08X\n", ch, ppc.dma[ch].sa, ppc.dma[ch].da, ppc.dma[ch].ct);
switch(width)
{
- case 1: /* Byte transfer */
+ case 1: /* Byte transfer */
for (i=0; i < ppc.dma[ch].ct; i++)
{
UINT8 b = READ8(ppc.dma[ch].sa);
@@ -845,7 +845,7 @@ static void ppc403_dma_exec(int ch)
ppc.dma[ch].da += dai;
}
break;
- case 2: /* Word transfer */
+ case 2: /* Word transfer */
for (i=0; i < ppc.dma[ch].ct; i++)
{
UINT16 w = READ16(ppc.dma[ch].sa);
@@ -854,7 +854,7 @@ static void ppc403_dma_exec(int ch)
ppc.dma[ch].da += dai;
}
break;
- case 4: /* Double word transfer */
+ case 4: /* Double word transfer */
for (i=0; i < ppc.dma[ch].ct; i++)
{
UINT32 d = READ32(ppc.dma[ch].sa);
@@ -863,7 +863,7 @@ static void ppc403_dma_exec(int ch)
ppc.dma[ch].da += dai;
}
break;
- case 16: /* 16-byte transfer */
+ case 16: /* 16-byte transfer */
for (i=0; i < ppc.dma[ch].ct; i++)
{
UINT32 d1 = READ32(ppc.dma[ch].sa+0);
@@ -883,7 +883,7 @@ static void ppc403_dma_exec(int ch)
}
break;
- case 3: /* hardware initiated mem-to-mem DMA */
+ case 3: /* hardware initiated mem-to-mem DMA */
fatalerror("ppc: dma_exec: HW mem-to-mem DMA not implemented\n");
break;
}
@@ -908,17 +908,17 @@ static void ppc403_dma_exec(int ch)
static UINT8 ppc403_read8(address_space &space, UINT32 a)
{
- if(a >= 0x40000000 && a <= 0x4000000f) /* Serial Port */
+ if(a >= 0x40000000 && a <= 0x4000000f) /* Serial Port */
return ppc403_spu_r(a);
return space.read_byte(a);
}
-#define ppc403_read16 memory_read_word_32be
-#define ppc403_read32 memory_read_dword_32be
+#define ppc403_read16 memory_read_word_32be
+#define ppc403_read32 memory_read_dword_32be
static void ppc403_write8(address_space &space, UINT32 a, UINT8 d)
{
- if( a >= 0x40000000 && a <= 0x4000000f ) /* Serial Port */
+ if( a >= 0x40000000 && a <= 0x4000000f ) /* Serial Port */
{
ppc403_spu_w(a, d);
return;
@@ -926,8 +926,8 @@ static void ppc403_write8(address_space &space, UINT32 a, UINT8 d)
space.write_byte(a, d);
}
-#define ppc403_write16 memory_write_word_32be
-#define ppc403_write32 memory_write_dword_32be
+#define ppc403_write16 memory_write_word_32be
+#define ppc403_write32 memory_write_dword_32be
static UINT16 ppc403_read16_unaligned(address_space &space, UINT32 a)
{
@@ -950,4 +950,3 @@ static void ppc403_write32_unaligned(address_space &space, UINT32 a, UINT32 d)
{
fatalerror("ppc: Unaligned write32 %08X, %08X at %08X\n", a, d, ppc.pc);
}
-
diff --git a/src/emu/cpu/powerpc/ppc602.c b/src/emu/cpu/powerpc/ppc602.c
index 1ae7ecdb683..1c183112785 100644
--- a/src/emu/cpu/powerpc/ppc602.c
+++ b/src/emu/cpu/powerpc/ppc602.c
@@ -3,10 +3,10 @@ static void ppc_dsa(UINT32 op)
UINT32 msr = ppc_get_msr();
msr &= ~(MSR_SA | MSR_EE | MSR_PR | MSR_AP);
- if (ppc.esasrr & 0x8) msr |= MSR_PR;
- if (ppc.esasrr & 0x4) msr |= MSR_AP;
- if (ppc.esasrr & 0x2) msr |= MSR_SA;
- if (ppc.esasrr & 0x1) msr |= MSR_EE;
+ if (ppc.esasrr & 0x8) msr |= MSR_PR;
+ if (ppc.esasrr & 0x4) msr |= MSR_AP;
+ if (ppc.esasrr & 0x2) msr |= MSR_SA;
+ if (ppc.esasrr & 0x1) msr |= MSR_EE;
ppc_set_msr(msr);
}
@@ -46,7 +46,7 @@ void ppc602_exception(int exception)
{
switch( exception )
{
- case EXCEPTION_IRQ: /* External Interrupt */
+ case EXCEPTION_IRQ: /* External Interrupt */
if( ppc_get_msr() & MSR_EE ) {
UINT32 msr = ppc_get_msr();
@@ -69,7 +69,7 @@ void ppc602_exception(int exception)
}
break;
- case EXCEPTION_DECREMENTER: /* Decrementer overflow exception */
+ case EXCEPTION_DECREMENTER: /* Decrementer overflow exception */
if( ppc_get_msr() & MSR_EE ) {
UINT32 msr = ppc_get_msr();
@@ -92,12 +92,12 @@ void ppc602_exception(int exception)
}
break;
- case EXCEPTION_TRAP: /* Program exception / Trap */
+ case EXCEPTION_TRAP: /* Program exception / Trap */
{
UINT32 msr = ppc_get_msr();
SRR0 = ppc.pc;
- SRR1 = (msr & 0xff73) | 0x20000; /* 0x20000 = TRAP bit */
+ SRR1 = (msr & 0xff73) | 0x20000; /* 0x20000 = TRAP bit */
msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
if( msr & MSR_ILE )
@@ -112,7 +112,7 @@ void ppc602_exception(int exception)
}
break;
- case EXCEPTION_SYSTEM_CALL: /* System call */
+ case EXCEPTION_SYSTEM_CALL: /* System call */
{
UINT32 msr = ppc_get_msr();
@@ -253,11 +253,11 @@ static CPU_EXECUTE( ppc602 )
ppc.npc = ppc.pc + 4;
switch(opcode >> 26)
{
- case 19: ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
- case 31: ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
- case 59: ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
- case 63: ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
- default: ppc.optable[opcode >> 26](opcode); break;
+ case 19: ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
+ case 31: ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
+ case 59: ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
+ case 63: ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
+ default: ppc.optable[opcode >> 26](opcode); break;
}
ppc_icount--;
@@ -276,4 +276,4 @@ static CPU_EXECUTE( ppc602 )
// update decrementer
DEC -= ((ppc_dec_base_icount - ppc_icount) / (bus_freq_multiplier * 2));
}
-#endif // PPC_DRC
+#endif // PPC_DRC
diff --git a/src/emu/cpu/powerpc/ppc603.c b/src/emu/cpu/powerpc/ppc603.c
index fec16755344..d543d637a99 100644
--- a/src/emu/cpu/powerpc/ppc603.c
+++ b/src/emu/cpu/powerpc/ppc603.c
@@ -2,7 +2,7 @@ void ppc603_exception(int exception)
{
switch( exception )
{
- case EXCEPTION_IRQ: /* External Interrupt */
+ case EXCEPTION_IRQ: /* External Interrupt */
if( ppc_get_msr() & MSR_EE ) {
UINT32 msr = ppc_get_msr();
@@ -25,7 +25,7 @@ void ppc603_exception(int exception)
}
break;
- case EXCEPTION_DECREMENTER: /* Decrementer overflow exception */
+ case EXCEPTION_DECREMENTER: /* Decrementer overflow exception */
if( ppc_get_msr() & MSR_EE ) {
UINT32 msr = ppc_get_msr();
@@ -48,12 +48,12 @@ void ppc603_exception(int exception)
}
break;
- case EXCEPTION_TRAP: /* Program exception / Trap */
+ case EXCEPTION_TRAP: /* Program exception / Trap */
{
UINT32 msr = ppc_get_msr();
SRR0 = ppc.pc;
- SRR1 = (msr & 0xff73) | 0x20000; /* 0x20000 = TRAP bit */
+ SRR1 = (msr & 0xff73) | 0x20000; /* 0x20000 = TRAP bit */
msr &= ~(MSR_POW | MSR_EE | MSR_PR | MSR_FP | MSR_FE0 | MSR_SE | MSR_BE | MSR_FE1 | MSR_IR | MSR_DR | MSR_RI);
if( msr & MSR_ILE )
@@ -69,7 +69,7 @@ void ppc603_exception(int exception)
}
break;
- case EXCEPTION_SYSTEM_CALL: /* System call */
+ case EXCEPTION_SYSTEM_CALL: /* System call */
{
UINT32 msr = ppc_get_msr();
@@ -257,11 +257,11 @@ static CPU_EXECUTE( ppc603 )
ppc.npc = ppc.pc + 4;
switch(opcode >> 26)
{
- case 19: ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
- case 31: ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
- case 59: ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
- case 63: ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
- default: ppc.optable[opcode >> 26](opcode); break;
+ case 19: ppc.optable19[(opcode >> 1) & 0x3ff](opcode); break;
+ case 31: ppc.optable31[(opcode >> 1) & 0x3ff](opcode); break;
+ case 59: ppc.optable59[(opcode >> 1) & 0x3ff](opcode); break;
+ case 63: ppc.optable63[(opcode >> 1) & 0x3ff](opcode); break;
+ default: ppc.optable[opcode >> 26](opcode); break;
}
ppc_icount--;
diff --git a/src/emu/cpu/powerpc/ppc_dasm.c b/src/emu/cpu/powerpc/ppc_dasm.c
index 35a42db092c..a20f4e2c8bb 100644
--- a/src/emu/cpu/powerpc/ppc_dasm.c
+++ b/src/emu/cpu/powerpc/ppc_dasm.c
@@ -28,57 +28,57 @@
enum
{
- F_NONE, // <no operands>
- F_LI, // LI*4+PC if AA=0 else LI*4
- F_BCx, // BO, BI, target_addr used only by BCx
- F_RT_RA_0_SIMM, // rT, rA|0, SIMM rA|0 means if rA == 0, print 0
- F_ADDIS, // rT, rA, SIMM (printed as unsigned) only used by ADDIS
- F_RT_RA_SIMM, // rT, rA, SIMM
- F_RA_RT_UIMM, // rA, rT, UIMM
- F_CMP_SIMM, // crfD, L, A, SIMM
- F_CMP_UIMM, // crfD, L, A, UIMM
- F_RT_RA_0_RB, // rT, rA|0, rB
- F_RT_RA_RB, // rT, rA, rB
- F_RT_D_RA_0, // rT, d(rA|0)
- F_RT_D_RA, // rT, d(rA)
- F_RA_RT_RB, // rA, rT, rB
- F_FRT_D_RA_0, // frT, d(RA|0)
- F_FRT_D_RA, // frT, d(RA)
- F_FRT_RA_0_RB, // frT, rA|0, rB
- F_FRT_RA_RB, // frT, rA, rB
- F_TWI, // TO, rA, SIMM only used by TWI instruction
- F_CMP, // crfD, L, rA, rB
- F_RA_RT, // rA, rT
- F_RA_0_RB, // rA|0, rB
- F_FRT_FRB, // frT, frB
- F_FCMP, // crfD, frA, frB
- F_CRFD_CRFS, // crfD, crfS
- F_MCRXR, // crfD only used by MCRXR
- F_RT, // rT
- F_MFSR, // rT, SR only used by MFSR
- F_MTSR, // SR, rT only used by MTSR
- F_MFFSx, // frT only used by MFFSx
- F_FCRBD, // crbD FPSCR[crbD]
- F_MTFSFIx, // crfD, IMM only used by MTFSFIx
- F_RB, // rB
- F_TW, // TO, rA, rB only used by TW
- F_RT_RA_0_NB, // rT, rA|0, NB print 32 if NB == 0
- F_SRAWIx, // rA, rT, SH only used by SRAWIx
- F_BO_BI, // BO, BI
- F_CRBD_CRBA_CRBB, // crbD, crbA, crbB
- F_RT_SPR, // rT, SPR and TBR
- F_MTSPR, // SPR, rT only used by MTSPR
- F_MTCRF, // CRM, rT only used by MTCRF
- F_MTFSFx, // FM, frB only used by MTFSFx
- F_RT_DCR, // rT, DCR
- F_MTDCR, // DCR, rT
- F_RT_RA, // rT, rA
- F_FRT_FRA_FRC_FRB, // frT, frA, frC, frB
- F_FRT_FRA_FRB, // frT, frA, frB
- F_FRT_FRA_FRC, // frT, frA, frC
- F_RA_RT_SH_MB_ME, // rA, rT, SH, MB, ME
- F_RLWNMx, // rT, rA, rB, MB, ME only used by RLWNMx
- F_RT_RB, // rT, rB
+ F_NONE, // <no operands>
+ F_LI, // LI*4+PC if AA=0 else LI*4
+ F_BCx, // BO, BI, target_addr used only by BCx
+ F_RT_RA_0_SIMM, // rT, rA|0, SIMM rA|0 means if rA == 0, print 0
+ F_ADDIS, // rT, rA, SIMM (printed as unsigned) only used by ADDIS
+ F_RT_RA_SIMM, // rT, rA, SIMM
+ F_RA_RT_UIMM, // rA, rT, UIMM
+ F_CMP_SIMM, // crfD, L, A, SIMM
+ F_CMP_UIMM, // crfD, L, A, UIMM
+ F_RT_RA_0_RB, // rT, rA|0, rB
+ F_RT_RA_RB, // rT, rA, rB
+ F_RT_D_RA_0, // rT, d(rA|0)
+ F_RT_D_RA, // rT, d(rA)
+ F_RA_RT_RB, // rA, rT, rB
+ F_FRT_D_RA_0, // frT, d(RA|0)
+ F_FRT_D_RA, // frT, d(RA)
+ F_FRT_RA_0_RB, // frT, rA|0, rB
+ F_FRT_RA_RB, // frT, rA, rB
+ F_TWI, // TO, rA, SIMM only used by TWI instruction
+ F_CMP, // crfD, L, rA, rB
+ F_RA_RT, // rA, rT
+ F_RA_0_RB, // rA|0, rB
+ F_FRT_FRB, // frT, frB
+ F_FCMP, // crfD, frA, frB
+ F_CRFD_CRFS, // crfD, crfS
+ F_MCRXR, // crfD only used by MCRXR
+ F_RT, // rT
+ F_MFSR, // rT, SR only used by MFSR
+ F_MTSR, // SR, rT only used by MTSR
+ F_MFFSx, // frT only used by MFFSx
+ F_FCRBD, // crbD FPSCR[crbD]
+ F_MTFSFIx, // crfD, IMM only used by MTFSFIx
+ F_RB, // rB
+ F_TW, // TO, rA, rB only used by TW
+ F_RT_RA_0_NB, // rT, rA|0, NB print 32 if NB == 0
+ F_SRAWIx, // rA, rT, SH only used by SRAWIx
+ F_BO_BI, // BO, BI
+ F_CRBD_CRBA_CRBB, // crbD, crbA, crbB
+ F_RT_SPR, // rT, SPR and TBR
+ F_MTSPR, // SPR, rT only used by MTSPR
+ F_MTCRF, // CRM, rT only used by MTCRF
+ F_MTFSFx, // FM, frB only used by MTFSFx
+ F_RT_DCR, // rT, DCR
+ F_MTDCR, // DCR, rT
+ F_RT_RA, // rT, rA
+ F_FRT_FRA_FRC_FRB, // frT, frA, frC, frB
+ F_FRT_FRA_FRB, // frT, frA, frB
+ F_FRT_FRA_FRC, // frT, frA, frC
+ F_RA_RT_SH_MB_ME, // rA, rT, SH, MB, ME
+ F_RLWNMx, // rT, rA, rB, MB, ME only used by RLWNMx
+ F_RT_RB, // rT, rB
};
/*
@@ -93,7 +93,7 @@ enum
#define FL_CHECK_RA (1 << 5) // assert rA!=0
#define FL_CHECK_LSWI (1 << 6) // specific check for LSWI validity
#define FL_CHECK_LSWX (1 << 7) // specific check for LSWX validity
-#define FL_SO (1 << 8) // use DASMFLAG_STEP_OUT
+#define FL_SO (1 << 8) // use DASMFLAG_STEP_OUT
/*
@@ -104,12 +104,12 @@ enum
struct IDESCR
{
- char mnem[32]; // mnemonic
- UINT32 match; // bit pattern of instruction after it has been masked
- UINT32 mask; // mask of variable fields (AND with ~mask to compare w/
+ char mnem[32]; // mnemonic
+ UINT32 match; // bit pattern of instruction after it has been masked
+ UINT32 mask; // mask of variable fields (AND with ~mask to compare w/
// bit pattern to determine a match)
- int format; // operand format
- int flags; // flags
+ int format; // operand format
+ int flags; // flags
};
/*
@@ -121,217 +121,217 @@ struct IDESCR
static const IDESCR itab[] =
{
- { "add", D_OP(31)|D_XO(266), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "addc", D_OP(31)|D_XO(10), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "adde", D_OP(31)|D_XO(138), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "addi", D_OP(14), M_RT|M_RA|M_SIMM, F_RT_RA_0_SIMM, 0 },
- { "addic", D_OP(12), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
- { "addic.", D_OP(13), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
- { "addis", D_OP(15), M_RT|M_RA|M_SIMM, F_ADDIS, 0 },
- { "addme", D_OP(31)|D_XO(234), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
- { "addze", D_OP(31)|D_XO(202), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
- { "and", D_OP(31)|D_XO(28), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "andc", D_OP(31)|D_XO(60), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "andi.", D_OP(28), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
- { "andis.", D_OP(29), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
- { "b", D_OP(18), M_LI|M_AA|M_LK, F_LI, FL_AA|FL_LK },
- { "bc", D_OP(16), M_BO|M_BI|M_BD|M_AA|M_LK, F_BCx, FL_AA|FL_LK },
- { "bcctr", D_OP(19)|D_XO(528), M_BO|M_BI|M_LK, F_BO_BI, FL_LK },
- { "bclr", D_OP(19)|D_XO(16), M_BO|M_BI|M_LK, F_BO_BI, FL_LK|FL_SO },
- { "cmp", D_OP(31)|D_XO(0), M_CRFD|M_RA|M_RB, F_CMP, 0 },
- { "cmpd", D_OP(31)|D_XO(0)|M_L,M_CRFD|M_RA|M_RB, F_CMP, 0 },
- { "cmpi", D_OP(11), M_CRFD|M_RA|M_SIMM, F_CMP_SIMM, 0 },
- { "cmpdi", D_OP(11)|M_L, M_CRFD|M_RA|M_SIMM, F_CMP_SIMM, 0 },
- { "cmpl", D_OP(31)|D_XO(32), M_CRFD|M_RA|M_RB, F_CMP, 0 },
- { "cmpld", D_OP(31)|D_XO(32)|M_L,M_CRFD|M_RA|M_RB, F_CMP, 0 },
- { "cmpli", D_OP(10), M_CRFD|M_RA|M_UIMM, F_CMP_UIMM, 0 },
- { "cmpldi", D_OP(10)|M_L, M_CRFD|M_RA|M_UIMM, F_CMP_UIMM, 0 },
- { "cntlzw", D_OP(31)|D_XO(26), M_RT|M_RA|M_RC, F_RA_RT, FL_RC },
- { "crand", D_OP(19)|D_XO(257), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "crandc", D_OP(19)|D_XO(129), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "creqv", D_OP(19)|D_XO(289), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "crnand", D_OP(19)|D_XO(225), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "crnor", D_OP(19)|D_XO(33), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "cror", D_OP(19)|D_XO(449), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "crorc", D_OP(19)|D_XO(417), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "crxor", D_OP(19)|D_XO(193), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
- { "dcba", D_OP(31)|D_XO(758), M_RA|M_RB, F_RA_0_RB, 0 },
- { "dcbf", D_OP(31)|D_XO(86), M_RA|M_RB, F_RA_0_RB, 0 },
- { "dcbi", D_OP(31)|D_XO(470), M_RA|M_RB, F_RA_0_RB, 0 },
- { "dcbst", D_OP(31)|D_XO(54), M_RA|M_RB, F_RA_0_RB, 0 },
- { "dcbt", D_OP(31)|D_XO(278), M_RA|M_RB, F_RA_0_RB, 0 },
- { "dcbtst", D_OP(31)|D_XO(246), M_RA|M_RB, F_RA_0_RB, 0 },
- { "dcbz", D_OP(31)|D_XO(1014),M_RA|M_RB, F_RA_0_RB, 0 },
- { "dccci", D_OP(31)|D_XO(454), M_RA|M_RB, F_RA_0_RB, 0 },
- { "dcread", D_OP(31)|D_XO(486), M_RA|M_RB, F_RT_RA_RB, 0 },
- { "divw", D_OP(31)|D_XO(491), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "divwu", D_OP(31)|D_XO(459), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "dsa", D_OP(31)|D_XO(628), 0, 0, 0 },
- { "eciwx", D_OP(31)|D_XO(310), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "ecowx", D_OP(31)|D_XO(438), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "eieio", D_OP(31)|D_XO(854), 0, F_NONE, 0 },
- { "eqv", D_OP(31)|D_XO(284), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "esa", D_OP(31)|D_XO(596), 0, 0, 0 },
- { "extsb", D_OP(31)|D_XO(954), M_RT|M_RA|M_RC, F_RA_RT, FL_RC },
- { "extsh", D_OP(31)|D_XO(922), M_RT|M_RA|M_RC, F_RA_RT, FL_RC },
- { "fabs", D_OP(63)|D_XO(264), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fadd", D_OP(63)|D_XO(21), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
- { "fadds", D_OP(59)|D_XO(21), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
- { "fcmpo", D_OP(63)|D_XO(32), M_CRFD|M_RA|M_RB, F_FCMP, 0 },
- { "fcmpu", D_OP(63)|D_XO(0), M_CRFD|M_RA|M_RB, F_FCMP, 0 },
- { "fctiw", D_OP(63)|D_XO(14), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fctiwz", D_OP(63)|D_XO(15), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fdiv", D_OP(63)|D_XO(18), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
- { "fdivs", D_OP(59)|D_XO(18), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
- { "fmadd", D_OP(63)|D_XO(29), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fmadds", D_OP(59)|D_XO(29), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fmr", D_OP(63)|D_XO(72), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fmsub", D_OP(63)|D_XO(28), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fmsubs", D_OP(59)|D_XO(28), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fmul", D_OP(63)|D_XO(25), M_RT|M_RA|M_REGC|M_RC, F_FRT_FRA_FRC, FL_RC },
- { "fmuls", D_OP(59)|D_XO(25), M_RT|M_RA|M_REGC|M_RC, F_FRT_FRA_FRC, FL_RC },
- { "fnabs", D_OP(63)|D_XO(136), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fneg", D_OP(63)|D_XO(40), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fnmadd", D_OP(63)|D_XO(31), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fnmadds",D_OP(59)|D_XO(31), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fnmsub", D_OP(63)|D_XO(30), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fnmsubs",D_OP(59)|D_XO(30), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fres", D_OP(59)|D_XO(24), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "frsp", D_OP(63)|D_XO(12), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "frsqrte",D_OP(63)|D_XO(26), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fsel", D_OP(63)|D_XO(23), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
- { "fsqrt", D_OP(63)|D_XO(22), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fsqrts", D_OP(59)|D_XO(22), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
- { "fsub", D_OP(63)|D_XO(20), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
- { "fsubs", D_OP(59)|D_XO(20), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
- { "icbi", D_OP(31)|D_XO(982), M_RA|M_RB, F_RA_0_RB, 0 },
- { "icbt", D_OP(31)|D_XO(262), M_RA|M_RB, F_RA_0_RB, 0 },
- { "iccci", D_OP(31)|D_XO(966), M_RA|M_RB, F_RA_0_RB, 0 },
- { "icread", D_OP(31)|D_XO(998), M_RA|M_RB, F_RA_0_RB, 0 },
- { "isync", D_OP(19)|D_XO(150), 0, F_NONE, 0 },
- { "lbz", D_OP(34), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "lbzu", D_OP(35), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
- { "lbzux", D_OP(31)|D_XO(119), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
- { "lbzx", D_OP(31)|D_XO(87), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "lfd", D_OP(50), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
- { "lfdu", D_OP(51), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
- { "lfdux", D_OP(31)|D_XO(631), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
- { "lfdx", D_OP(31)|D_XO(599), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
- { "lfs", D_OP(48), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
- { "lfsu", D_OP(49), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
- { "lfsux", D_OP(31)|D_XO(567), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
- { "lfsx", D_OP(31)|D_XO(535), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
- { "lha", D_OP(42), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "lhau", D_OP(43), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
- { "lhaux", D_OP(31)|D_XO(375), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
- { "lhax", D_OP(31)|D_XO(343), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "lhbrx", D_OP(31)|D_XO(790), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "lhz", D_OP(40), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "lhzu", D_OP(41), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
- { "lhzux", D_OP(31)|D_XO(311), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
- { "lhzx", D_OP(31)|D_XO(279), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "lmw", D_OP(46), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "lswi", D_OP(31)|D_XO(597), M_RT|M_RA|M_NB, F_RT_RA_0_NB, FL_CHECK_LSWI },
- { "lswx", D_OP(31)|D_XO(533), M_RT|M_RA|M_RB, F_RT_RA_0_RB, FL_CHECK_LSWX },
- { "lwarx", D_OP(31)|D_XO(20), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "lwbrx", D_OP(31)|D_XO(534), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "lwz", D_OP(32), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "lwzu", D_OP(33), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
- { "lwzux", D_OP(31)|D_XO(55), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
- { "lwzx", D_OP(31)|D_XO(23), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "mcrf", D_OP(19)|D_XO(0), M_CRFD|M_CRFS, F_CRFD_CRFS, 0 },
- { "mcrfs", D_OP(63)|D_XO(64), M_CRFD|M_CRFS, F_CRFD_CRFS, 0 },
- { "mcrxr", D_OP(31)|D_XO(512), M_CRFD, F_MCRXR, 0 },
- { "mfcr", D_OP(31)|D_XO(19), M_RT, F_RT, 0 },
- { "mfdcr", D_OP(31)|D_XO(323), M_RT|M_DCR, F_RT_DCR, 0 },
- { "mffs", D_OP(63)|D_XO(583), M_RT|M_RC, F_MFFSx, FL_RC },
- { "mfmsr", D_OP(31)|D_XO(83), M_RT, F_RT, 0 },
- { "mfspr", D_OP(31)|D_XO(339), M_RT|M_SPR, F_RT_SPR, 0 },
- { "mfsr", D_OP(31)|D_XO(595), M_RT|M_SR, F_MFSR, 0 },
- { "mfsrin", D_OP(31)|D_XO(659), M_RT|M_RB, F_RT_RB, 0 },
- { "mftb", D_OP(31)|D_XO(371), M_RT|M_TBR, F_RT_SPR, 0 },
- { "mtcrf", D_OP(31)|D_XO(144), M_RT|M_CRM, F_MTCRF, 0 },
- { "mtdcr", D_OP(31)|D_XO(451), M_RT|M_DCR, F_MTDCR, 0 },
- { "mtfsb0", D_OP(63)|D_XO(70), M_CRBD|M_RC, F_FCRBD, FL_RC },
- { "mtfsb1", D_OP(63)|D_XO(38), M_CRBD|M_RC, F_FCRBD, FL_RC },
- { "mtfsf", D_OP(63)|D_XO(711), M_FM|M_RB|M_RC, F_MTFSFx, FL_RC },
- { "mtfsfi", D_OP(63)|D_XO(134), M_CRFD|M_IMM|M_RC, F_MTFSFIx, FL_RC },
- { "mtmsr", D_OP(31)|D_XO(146), M_RT, F_RT, 0 },
- { "mtspr", D_OP(31)|D_XO(467), M_RT|M_SPR, F_MTSPR, 0 },
- { "mtsr", D_OP(31)|D_XO(210), M_RT|M_SR, F_MTSR, 0 },
- { "mtsrin", D_OP(31)|D_XO(242), M_RT|M_RB, F_RT_RB, 0 },
- { "mulhw", D_OP(31)|D_XO(75), M_RT|M_RA|M_RB|M_RC, F_RT_RA_RB, FL_RC },
- { "mulhwu", D_OP(31)|D_XO(11), M_RT|M_RA|M_RB|M_RC, F_RT_RA_RB, FL_RC },
- { "mulli", D_OP(7), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
- { "mullw", D_OP(31)|D_XO(235), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "nand", D_OP(31)|D_XO(476), M_RA|M_RT|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "neg", D_OP(31)|D_XO(104), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
- { "nor", D_OP(31)|D_XO(124), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "or", D_OP(31)|D_XO(444), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "orc", D_OP(31)|D_XO(412), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "ori", D_OP(24), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
- { "oris", D_OP(25), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
- { "rfi", D_OP(19)|D_XO(50), 0, F_NONE, 0 },
- { "rfci", D_OP(19)|D_XO(51), 0, F_NONE, 0 },
- { "rlwimi", D_OP(20), M_RT|M_RA|M_SH|M_MB|M_ME|M_RC, F_RA_RT_SH_MB_ME, FL_RC },
- { "rlwinm", D_OP(21), M_RT|M_RA|M_SH|M_MB|M_ME|M_RC, F_RA_RT_SH_MB_ME, FL_RC },
- { "rlwnm", D_OP(23), M_RT|M_RA|M_RB|M_MB|M_ME|M_RC, F_RLWNMx, FL_RC },
- { "sc", D_OP(17)|2, 0, F_NONE, 0 },
- { "slw", D_OP(31)|D_XO(24), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "sraw", D_OP(31)|D_XO(792), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "srawi", D_OP(31)|D_XO(824), M_RT|M_RA|M_SH|M_RC, F_SRAWIx, FL_RC },
- { "srw", D_OP(31)|D_XO(536), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "stb", D_OP(38), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "stbu", D_OP(39), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA },
- { "stbux", D_OP(31)|D_XO(247), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA },
- { "stbx", D_OP(31)|D_XO(215), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "stfd", D_OP(54), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
- { "stfdu", D_OP(55), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
- { "stfdux", D_OP(31)|D_XO(759), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
- { "stfdx", D_OP(31)|D_XO(727), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
- { "stfiwx", D_OP(31)|D_XO(983), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
- { "stfs", D_OP(52), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
- { "stfsu", D_OP(53), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
- { "stfsux", D_OP(31)|D_XO(695), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
- { "stfsx", D_OP(31)|D_XO(663), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
- { "sth", D_OP(44), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "sthbrx", D_OP(31)|D_XO(918), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "sthu", D_OP(45), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA },
- { "sthux", D_OP(31)|D_XO(439), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA },
- { "sthx", D_OP(31)|D_XO(407), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "stmw", D_OP(47), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "stswi", D_OP(31)|D_XO(725), M_RT|M_RA|M_NB, F_RT_RA_0_NB, 0 },
- { "stswx", D_OP(31)|D_XO(661), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "stw", D_OP(36), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
- { "stwbrx", D_OP(31)|D_XO(662), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "stwcx.", D_OP(31)|D_XO(150)|1, M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "stwu", D_OP(37), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA },
- { "stwux", D_OP(31)|D_XO(183), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA },
- { "stwx", D_OP(31)|D_XO(151), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
- { "subf", D_OP(31)|D_XO(40), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "subfc", D_OP(31)|D_XO(8), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "subfe", D_OP(31)|D_XO(136), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
- { "subfic", D_OP(8), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
- { "subfme", D_OP(31)|D_XO(232), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
- { "subfze", D_OP(31)|D_XO(200), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
- { "sync", D_OP(31)|D_XO(598), 0, F_NONE, 0 },
- { "tlbia", D_OP(31)|D_XO(370), 0, F_NONE, 0 },
- { "tlbie", D_OP(31)|D_XO(306), M_RB, F_RB, 0 },
- { "tlbsync",D_OP(31)|D_XO(566), 0, F_NONE, 0 },
- { "tw", D_OP(31)|D_XO(4), M_TO|M_RA|M_RB, F_TW, 0 },
- { "twi", D_OP(3), M_TO|M_RA|M_SIMM, F_TWI, 0 },
- { "wrtee", D_OP(31)|D_XO(131), M_RT, F_RT, 0 },
- { "wrteei", D_OP(31)|D_XO(163), 0, 0, 0 },
- { "xor", D_OP(31)|D_XO(316), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
- { "xori", D_OP(26), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
- { "xoris", D_OP(27), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
-
- /*
- * PowerPC 603e/EC603e-specific instructions
- */
-
- { "tlbld", D_OP(31)|D_XO(978), M_RB, F_RB, 0 },
- { "tlbli", D_OP(31)|D_XO(1010),M_RB, F_RB, 0 }
+ { "add", D_OP(31)|D_XO(266), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "addc", D_OP(31)|D_XO(10), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "adde", D_OP(31)|D_XO(138), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "addi", D_OP(14), M_RT|M_RA|M_SIMM, F_RT_RA_0_SIMM, 0 },
+ { "addic", D_OP(12), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
+ { "addic.", D_OP(13), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
+ { "addis", D_OP(15), M_RT|M_RA|M_SIMM, F_ADDIS, 0 },
+ { "addme", D_OP(31)|D_XO(234), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
+ { "addze", D_OP(31)|D_XO(202), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
+ { "and", D_OP(31)|D_XO(28), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "andc", D_OP(31)|D_XO(60), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "andi.", D_OP(28), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
+ { "andis.", D_OP(29), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
+ { "b", D_OP(18), M_LI|M_AA|M_LK, F_LI, FL_AA|FL_LK },
+ { "bc", D_OP(16), M_BO|M_BI|M_BD|M_AA|M_LK, F_BCx, FL_AA|FL_LK },
+ { "bcctr", D_OP(19)|D_XO(528), M_BO|M_BI|M_LK, F_BO_BI, FL_LK },
+ { "bclr", D_OP(19)|D_XO(16), M_BO|M_BI|M_LK, F_BO_BI, FL_LK|FL_SO },
+ { "cmp", D_OP(31)|D_XO(0), M_CRFD|M_RA|M_RB, F_CMP, 0 },
+ { "cmpd", D_OP(31)|D_XO(0)|M_L,M_CRFD|M_RA|M_RB, F_CMP, 0 },
+ { "cmpi", D_OP(11), M_CRFD|M_RA|M_SIMM, F_CMP_SIMM, 0 },
+ { "cmpdi", D_OP(11)|M_L, M_CRFD|M_RA|M_SIMM, F_CMP_SIMM, 0 },
+ { "cmpl", D_OP(31)|D_XO(32), M_CRFD|M_RA|M_RB, F_CMP, 0 },
+ { "cmpld", D_OP(31)|D_XO(32)|M_L,M_CRFD|M_RA|M_RB, F_CMP, 0 },
+ { "cmpli", D_OP(10), M_CRFD|M_RA|M_UIMM, F_CMP_UIMM, 0 },
+ { "cmpldi", D_OP(10)|M_L, M_CRFD|M_RA|M_UIMM, F_CMP_UIMM, 0 },
+ { "cntlzw", D_OP(31)|D_XO(26), M_RT|M_RA|M_RC, F_RA_RT, FL_RC },
+ { "crand", D_OP(19)|D_XO(257), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "crandc", D_OP(19)|D_XO(129), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "creqv", D_OP(19)|D_XO(289), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "crnand", D_OP(19)|D_XO(225), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "crnor", D_OP(19)|D_XO(33), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "cror", D_OP(19)|D_XO(449), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "crorc", D_OP(19)|D_XO(417), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "crxor", D_OP(19)|D_XO(193), M_CRBD|M_CRBA|M_CRBB, F_CRBD_CRBA_CRBB, 0 },
+ { "dcba", D_OP(31)|D_XO(758), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dcbf", D_OP(31)|D_XO(86), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dcbi", D_OP(31)|D_XO(470), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dcbst", D_OP(31)|D_XO(54), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dcbt", D_OP(31)|D_XO(278), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dcbtst", D_OP(31)|D_XO(246), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dcbz", D_OP(31)|D_XO(1014),M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dccci", D_OP(31)|D_XO(454), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "dcread", D_OP(31)|D_XO(486), M_RA|M_RB, F_RT_RA_RB, 0 },
+ { "divw", D_OP(31)|D_XO(491), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "divwu", D_OP(31)|D_XO(459), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "dsa", D_OP(31)|D_XO(628), 0, 0, 0 },
+ { "eciwx", D_OP(31)|D_XO(310), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "ecowx", D_OP(31)|D_XO(438), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "eieio", D_OP(31)|D_XO(854), 0, F_NONE, 0 },
+ { "eqv", D_OP(31)|D_XO(284), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "esa", D_OP(31)|D_XO(596), 0, 0, 0 },
+ { "extsb", D_OP(31)|D_XO(954), M_RT|M_RA|M_RC, F_RA_RT, FL_RC },
+ { "extsh", D_OP(31)|D_XO(922), M_RT|M_RA|M_RC, F_RA_RT, FL_RC },
+ { "fabs", D_OP(63)|D_XO(264), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fadd", D_OP(63)|D_XO(21), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
+ { "fadds", D_OP(59)|D_XO(21), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
+ { "fcmpo", D_OP(63)|D_XO(32), M_CRFD|M_RA|M_RB, F_FCMP, 0 },
+ { "fcmpu", D_OP(63)|D_XO(0), M_CRFD|M_RA|M_RB, F_FCMP, 0 },
+ { "fctiw", D_OP(63)|D_XO(14), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fctiwz", D_OP(63)|D_XO(15), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fdiv", D_OP(63)|D_XO(18), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
+ { "fdivs", D_OP(59)|D_XO(18), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
+ { "fmadd", D_OP(63)|D_XO(29), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fmadds", D_OP(59)|D_XO(29), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fmr", D_OP(63)|D_XO(72), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fmsub", D_OP(63)|D_XO(28), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fmsubs", D_OP(59)|D_XO(28), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fmul", D_OP(63)|D_XO(25), M_RT|M_RA|M_REGC|M_RC, F_FRT_FRA_FRC, FL_RC },
+ { "fmuls", D_OP(59)|D_XO(25), M_RT|M_RA|M_REGC|M_RC, F_FRT_FRA_FRC, FL_RC },
+ { "fnabs", D_OP(63)|D_XO(136), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fneg", D_OP(63)|D_XO(40), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fnmadd", D_OP(63)|D_XO(31), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fnmadds",D_OP(59)|D_XO(31), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fnmsub", D_OP(63)|D_XO(30), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fnmsubs",D_OP(59)|D_XO(30), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fres", D_OP(59)|D_XO(24), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "frsp", D_OP(63)|D_XO(12), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "frsqrte",D_OP(63)|D_XO(26), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fsel", D_OP(63)|D_XO(23), M_RT|M_RA|M_RB|M_REGC|M_RC, F_FRT_FRA_FRC_FRB, FL_RC },
+ { "fsqrt", D_OP(63)|D_XO(22), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fsqrts", D_OP(59)|D_XO(22), M_RT|M_RB|M_RC, F_FRT_FRB, FL_RC },
+ { "fsub", D_OP(63)|D_XO(20), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
+ { "fsubs", D_OP(59)|D_XO(20), M_RT|M_RA|M_RB|M_RC, F_FRT_FRA_FRB, FL_RC },
+ { "icbi", D_OP(31)|D_XO(982), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "icbt", D_OP(31)|D_XO(262), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "iccci", D_OP(31)|D_XO(966), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "icread", D_OP(31)|D_XO(998), M_RA|M_RB, F_RA_0_RB, 0 },
+ { "isync", D_OP(19)|D_XO(150), 0, F_NONE, 0 },
+ { "lbz", D_OP(34), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "lbzu", D_OP(35), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
+ { "lbzux", D_OP(31)|D_XO(119), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
+ { "lbzx", D_OP(31)|D_XO(87), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "lfd", D_OP(50), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
+ { "lfdu", D_OP(51), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
+ { "lfdux", D_OP(31)|D_XO(631), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
+ { "lfdx", D_OP(31)|D_XO(599), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
+ { "lfs", D_OP(48), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
+ { "lfsu", D_OP(49), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
+ { "lfsux", D_OP(31)|D_XO(567), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
+ { "lfsx", D_OP(31)|D_XO(535), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
+ { "lha", D_OP(42), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "lhau", D_OP(43), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
+ { "lhaux", D_OP(31)|D_XO(375), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
+ { "lhax", D_OP(31)|D_XO(343), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "lhbrx", D_OP(31)|D_XO(790), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "lhz", D_OP(40), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "lhzu", D_OP(41), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
+ { "lhzux", D_OP(31)|D_XO(311), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
+ { "lhzx", D_OP(31)|D_XO(279), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "lmw", D_OP(46), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "lswi", D_OP(31)|D_XO(597), M_RT|M_RA|M_NB, F_RT_RA_0_NB, FL_CHECK_LSWI },
+ { "lswx", D_OP(31)|D_XO(533), M_RT|M_RA|M_RB, F_RT_RA_0_RB, FL_CHECK_LSWX },
+ { "lwarx", D_OP(31)|D_XO(20), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "lwbrx", D_OP(31)|D_XO(534), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "lwz", D_OP(32), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "lwzu", D_OP(33), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA_RT },
+ { "lwzux", D_OP(31)|D_XO(55), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA_RT },
+ { "lwzx", D_OP(31)|D_XO(23), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "mcrf", D_OP(19)|D_XO(0), M_CRFD|M_CRFS, F_CRFD_CRFS, 0 },
+ { "mcrfs", D_OP(63)|D_XO(64), M_CRFD|M_CRFS, F_CRFD_CRFS, 0 },
+ { "mcrxr", D_OP(31)|D_XO(512), M_CRFD, F_MCRXR, 0 },
+ { "mfcr", D_OP(31)|D_XO(19), M_RT, F_RT, 0 },
+ { "mfdcr", D_OP(31)|D_XO(323), M_RT|M_DCR, F_RT_DCR, 0 },
+ { "mffs", D_OP(63)|D_XO(583), M_RT|M_RC, F_MFFSx, FL_RC },
+ { "mfmsr", D_OP(31)|D_XO(83), M_RT, F_RT, 0 },
+ { "mfspr", D_OP(31)|D_XO(339), M_RT|M_SPR, F_RT_SPR, 0 },
+ { "mfsr", D_OP(31)|D_XO(595), M_RT|M_SR, F_MFSR, 0 },
+ { "mfsrin", D_OP(31)|D_XO(659), M_RT|M_RB, F_RT_RB, 0 },
+ { "mftb", D_OP(31)|D_XO(371), M_RT|M_TBR, F_RT_SPR, 0 },
+ { "mtcrf", D_OP(31)|D_XO(144), M_RT|M_CRM, F_MTCRF, 0 },
+ { "mtdcr", D_OP(31)|D_XO(451), M_RT|M_DCR, F_MTDCR, 0 },
+ { "mtfsb0", D_OP(63)|D_XO(70), M_CRBD|M_RC, F_FCRBD, FL_RC },
+ { "mtfsb1", D_OP(63)|D_XO(38), M_CRBD|M_RC, F_FCRBD, FL_RC },
+ { "mtfsf", D_OP(63)|D_XO(711), M_FM|M_RB|M_RC, F_MTFSFx, FL_RC },
+ { "mtfsfi", D_OP(63)|D_XO(134), M_CRFD|M_IMM|M_RC, F_MTFSFIx, FL_RC },
+ { "mtmsr", D_OP(31)|D_XO(146), M_RT, F_RT, 0 },
+ { "mtspr", D_OP(31)|D_XO(467), M_RT|M_SPR, F_MTSPR, 0 },
+ { "mtsr", D_OP(31)|D_XO(210), M_RT|M_SR, F_MTSR, 0 },
+ { "mtsrin", D_OP(31)|D_XO(242), M_RT|M_RB, F_RT_RB, 0 },
+ { "mulhw", D_OP(31)|D_XO(75), M_RT|M_RA|M_RB|M_RC, F_RT_RA_RB, FL_RC },
+ { "mulhwu", D_OP(31)|D_XO(11), M_RT|M_RA|M_RB|M_RC, F_RT_RA_RB, FL_RC },
+ { "mulli", D_OP(7), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
+ { "mullw", D_OP(31)|D_XO(235), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "nand", D_OP(31)|D_XO(476), M_RA|M_RT|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "neg", D_OP(31)|D_XO(104), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
+ { "nor", D_OP(31)|D_XO(124), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "or", D_OP(31)|D_XO(444), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "orc", D_OP(31)|D_XO(412), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "ori", D_OP(24), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
+ { "oris", D_OP(25), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
+ { "rfi", D_OP(19)|D_XO(50), 0, F_NONE, 0 },
+ { "rfci", D_OP(19)|D_XO(51), 0, F_NONE, 0 },
+ { "rlwimi", D_OP(20), M_RT|M_RA|M_SH|M_MB|M_ME|M_RC, F_RA_RT_SH_MB_ME, FL_RC },
+ { "rlwinm", D_OP(21), M_RT|M_RA|M_SH|M_MB|M_ME|M_RC, F_RA_RT_SH_MB_ME, FL_RC },
+ { "rlwnm", D_OP(23), M_RT|M_RA|M_RB|M_MB|M_ME|M_RC, F_RLWNMx, FL_RC },
+ { "sc", D_OP(17)|2, 0, F_NONE, 0 },
+ { "slw", D_OP(31)|D_XO(24), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "sraw", D_OP(31)|D_XO(792), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "srawi", D_OP(31)|D_XO(824), M_RT|M_RA|M_SH|M_RC, F_SRAWIx, FL_RC },
+ { "srw", D_OP(31)|D_XO(536), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "stb", D_OP(38), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "stbu", D_OP(39), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA },
+ { "stbux", D_OP(31)|D_XO(247), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA },
+ { "stbx", D_OP(31)|D_XO(215), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "stfd", D_OP(54), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
+ { "stfdu", D_OP(55), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
+ { "stfdux", D_OP(31)|D_XO(759), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
+ { "stfdx", D_OP(31)|D_XO(727), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
+ { "stfiwx", D_OP(31)|D_XO(983), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
+ { "stfs", D_OP(52), M_RT|M_RA|M_D, F_FRT_D_RA_0, 0 },
+ { "stfsu", D_OP(53), M_RT|M_RA|M_D, F_FRT_D_RA, FL_CHECK_RA },
+ { "stfsux", D_OP(31)|D_XO(695), M_RT|M_RA|M_RB, F_FRT_RA_RB, FL_CHECK_RA },
+ { "stfsx", D_OP(31)|D_XO(663), M_RT|M_RA|M_RB, F_FRT_RA_0_RB, 0 },
+ { "sth", D_OP(44), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "sthbrx", D_OP(31)|D_XO(918), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "sthu", D_OP(45), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA },
+ { "sthux", D_OP(31)|D_XO(439), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA },
+ { "sthx", D_OP(31)|D_XO(407), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "stmw", D_OP(47), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "stswi", D_OP(31)|D_XO(725), M_RT|M_RA|M_NB, F_RT_RA_0_NB, 0 },
+ { "stswx", D_OP(31)|D_XO(661), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "stw", D_OP(36), M_RT|M_RA|M_D, F_RT_D_RA_0, 0 },
+ { "stwbrx", D_OP(31)|D_XO(662), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "stwcx.", D_OP(31)|D_XO(150)|1, M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "stwu", D_OP(37), M_RT|M_RA|M_D, F_RT_D_RA, FL_CHECK_RA },
+ { "stwux", D_OP(31)|D_XO(183), M_RT|M_RA|M_RB, F_RT_RA_RB, FL_CHECK_RA },
+ { "stwx", D_OP(31)|D_XO(151), M_RT|M_RA|M_RB, F_RT_RA_0_RB, 0 },
+ { "subf", D_OP(31)|D_XO(40), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "subfc", D_OP(31)|D_XO(8), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "subfe", D_OP(31)|D_XO(136), M_RT|M_RA|M_RB|M_OE|M_RC, F_RT_RA_RB, FL_OE|FL_RC },
+ { "subfic", D_OP(8), M_RT|M_RA|M_SIMM, F_RT_RA_SIMM, 0 },
+ { "subfme", D_OP(31)|D_XO(232), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
+ { "subfze", D_OP(31)|D_XO(200), M_RT|M_RA|M_OE|M_RC, F_RT_RA, FL_OE|FL_RC },
+ { "sync", D_OP(31)|D_XO(598), 0, F_NONE, 0 },
+ { "tlbia", D_OP(31)|D_XO(370), 0, F_NONE, 0 },
+ { "tlbie", D_OP(31)|D_XO(306), M_RB, F_RB, 0 },
+ { "tlbsync",D_OP(31)|D_XO(566), 0, F_NONE, 0 },
+ { "tw", D_OP(31)|D_XO(4), M_TO|M_RA|M_RB, F_TW, 0 },
+ { "twi", D_OP(3), M_TO|M_RA|M_SIMM, F_TWI, 0 },
+ { "wrtee", D_OP(31)|D_XO(131), M_RT, F_RT, 0 },
+ { "wrteei", D_OP(31)|D_XO(163), 0, 0, 0 },
+ { "xor", D_OP(31)|D_XO(316), M_RT|M_RA|M_RB|M_RC, F_RA_RT_RB, FL_RC },
+ { "xori", D_OP(26), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
+ { "xoris", D_OP(27), M_RT|M_RA|M_UIMM, F_RA_RT_UIMM, 0 },
+
+ /*
+ * PowerPC 603e/EC603e-specific instructions
+ */
+
+ { "tlbld", D_OP(31)|D_XO(978), M_RB, F_RB, 0 },
+ { "tlbli", D_OP(31)|D_XO(1010),M_RB, F_RB, 0 }
};
/*
@@ -353,169 +353,169 @@ static const char *const crnbit[4] = { "ge", "le", "ne", "nso" };
static void SPR(char *dest, int spr_field)
{
- int spr;
+ int spr;
- /*
- * Construct the SPR number -- SPR field is 2 5-bit fields
- */
+ /*
+ * Construct the SPR number -- SPR field is 2 5-bit fields
+ */
- spr = (spr_field >> 5) & 0x1f;
- spr |= (spr_field & 0x1f) << 5;
+ spr = (spr_field >> 5) & 0x1f;
+ spr |= (spr_field & 0x1f) << 5;
- /*
- * Append the SPR name to the destination string using strcat()
- */
+ /*
+ * Append the SPR name to the destination string using strcat()
+ */
switch (spr)
{
/* UISA SPR register indexes */
- case SPR_XER: strcat(dest, "xer"); break;
- case SPR_LR: strcat(dest, "lr"); break;
- case SPR_CTR: strcat(dest, "ctr"); break;
+ case SPR_XER: strcat(dest, "xer"); break;
+ case SPR_LR: strcat(dest, "lr"); break;
+ case SPR_CTR: strcat(dest, "ctr"); break;
/* VEA SPR register indexes */
- case SPRVEA_TBL_R: strcat(dest, "tbl"); break;
- case SPRVEA_TBU_R: strcat(dest, "tbu"); break;
+ case SPRVEA_TBL_R: strcat(dest, "tbl"); break;
+ case SPRVEA_TBU_R: strcat(dest, "tbu"); break;
/* OEA SPR register indexes */
- case SPROEA_DSISR: strcat(dest, "dsisr"); break;
- case SPROEA_DAR: strcat(dest, "dar"); break;
- case SPROEA_DEC: strcat(dest, "dec"); break;
- case SPROEA_SDR1: strcat(dest, "sdr1"); break;
- case SPROEA_SRR0: strcat(dest, "srr0"); break;
- case SPROEA_SRR1: strcat(dest, "srr1"); break;
- case SPROEA_SPRG0: strcat(dest, "sprg0"); break;
- case SPROEA_SPRG1: strcat(dest, "sprg1"); break;
- case SPROEA_SPRG2: strcat(dest, "sprg2"); break;
- case SPROEA_SPRG3: strcat(dest, "sprg3"); break;
- case SPROEA_ASR: strcat(dest, "asr"); break;
- case SPROEA_EAR: strcat(dest, "ear"); break;
- case SPROEA_PVR: strcat(dest, "pvr"); break;
- case SPROEA_IBAT0U: strcat(dest, "ibat0u"); break;
- case SPROEA_IBAT0L: strcat(dest, "ibat0l"); break;
- case SPROEA_IBAT1U: strcat(dest, "ibat1u"); break;
- case SPROEA_IBAT1L: strcat(dest, "ibat1l"); break;
- case SPROEA_IBAT2U: strcat(dest, "ibat2u"); break;
- case SPROEA_IBAT2L: strcat(dest, "ibat2l"); break;
- case SPROEA_IBAT3U: strcat(dest, "ibat3u"); break;
- case SPROEA_IBAT3L: strcat(dest, "ibat3l"); break;
- case SPROEA_DBAT0U: strcat(dest, "dbat0u"); break;
- case SPROEA_DBAT0L: strcat(dest, "dbat0l"); break;
- case SPROEA_DBAT1U: strcat(dest, "dbat1u"); break;
- case SPROEA_DBAT1L: strcat(dest, "dbat1l"); break;
- case SPROEA_DBAT2U: strcat(dest, "dbat2u"); break;
- case SPROEA_DBAT2L: strcat(dest, "dbat2l"); break;
- case SPROEA_DBAT3U: strcat(dest, "dbat3u"); break;
- case SPROEA_DBAT3L: strcat(dest, "dbat3l"); break;
- case SPROEA_DABR: strcat(dest, "dabr/iac2"); break; // unsupported on 603e/EC603e
+ case SPROEA_DSISR: strcat(dest, "dsisr"); break;
+ case SPROEA_DAR: strcat(dest, "dar"); break;
+ case SPROEA_DEC: strcat(dest, "dec"); break;
+ case SPROEA_SDR1: strcat(dest, "sdr1"); break;
+ case SPROEA_SRR0: strcat(dest, "srr0"); break;
+ case SPROEA_SRR1: strcat(dest, "srr1"); break;
+ case SPROEA_SPRG0: strcat(dest, "sprg0"); break;
+ case SPROEA_SPRG1: strcat(dest, "sprg1"); break;
+ case SPROEA_SPRG2: strcat(dest, "sprg2"); break;
+ case SPROEA_SPRG3: strcat(dest, "sprg3"); break;
+ case SPROEA_ASR: strcat(dest, "asr"); break;
+ case SPROEA_EAR: strcat(dest, "ear"); break;
+ case SPROEA_PVR: strcat(dest, "pvr"); break;
+ case SPROEA_IBAT0U: strcat(dest, "ibat0u"); break;
+ case SPROEA_IBAT0L: strcat(dest, "ibat0l"); break;
+ case SPROEA_IBAT1U: strcat(dest, "ibat1u"); break;
+ case SPROEA_IBAT1L: strcat(dest, "ibat1l"); break;
+ case SPROEA_IBAT2U: strcat(dest, "ibat2u"); break;
+ case SPROEA_IBAT2L: strcat(dest, "ibat2l"); break;
+ case SPROEA_IBAT3U: strcat(dest, "ibat3u"); break;
+ case SPROEA_IBAT3L: strcat(dest, "ibat3l"); break;
+ case SPROEA_DBAT0U: strcat(dest, "dbat0u"); break;
+ case SPROEA_DBAT0L: strcat(dest, "dbat0l"); break;
+ case SPROEA_DBAT1U: strcat(dest, "dbat1u"); break;
+ case SPROEA_DBAT1L: strcat(dest, "dbat1l"); break;
+ case SPROEA_DBAT2U: strcat(dest, "dbat2u"); break;
+ case SPROEA_DBAT2L: strcat(dest, "dbat2l"); break;
+ case SPROEA_DBAT3U: strcat(dest, "dbat3u"); break;
+ case SPROEA_DBAT3L: strcat(dest, "dbat3l"); break;
+ case SPROEA_DABR: strcat(dest, "dabr/iac2"); break; // unsupported on 603e/EC603e
/* PowerPC 603E SPR register indexes */
- case SPR603_HID0: strcat(dest, "hid0/dbsr"); break;
- case SPR603_HID1: strcat(dest, "hid1"); break;
- case SPR603_DMISS: strcat(dest, "dmiss"); break;
- case SPR603_DCMP: strcat(dest, "dcmp"); break;
- case SPR603_HASH1: strcat(dest, "hash1"); break;
- case SPR603_HASH2: strcat(dest, "hash2/icdbdr"); break;
- case SPR603_IMISS: strcat(dest, "imiss"); break;
- case SPR603_ICMP: strcat(dest, "icmp/dear"); break;
- case SPR603_RPA: strcat(dest, "rpa/evpr"); break;
- case SPR603_IABR: strcat(dest, "iabr/dbcr"); break;
+ case SPR603_HID0: strcat(dest, "hid0/dbsr"); break;
+ case SPR603_HID1: strcat(dest, "hid1"); break;
+ case SPR603_DMISS: strcat(dest, "dmiss"); break;
+ case SPR603_DCMP: strcat(dest, "dcmp"); break;
+ case SPR603_HASH1: strcat(dest, "hash1"); break;
+ case SPR603_HASH2: strcat(dest, "hash2/icdbdr"); break;
+ case SPR603_IMISS: strcat(dest, "imiss"); break;
+ case SPR603_ICMP: strcat(dest, "icmp/dear"); break;
+ case SPR603_RPA: strcat(dest, "rpa/evpr"); break;
+ case SPR603_IABR: strcat(dest, "iabr/dbcr"); break;
/* PowerPC 4XX SPR register indexes */
- case SPR4XX_SGR: strcat(dest, "sgr"); break;
- case SPR4XX_DCWR: strcat(dest, "dcwr"); break;
- case SPR4XX_PID: strcat(dest, "pid"); break;
- case SPR4XX_TBHU: strcat(dest, "tbhu"); break;
- case SPR4XX_TBLU: strcat(dest, "tblu"); break;
+ case SPR4XX_SGR: strcat(dest, "sgr"); break;
+ case SPR4XX_DCWR: strcat(dest, "dcwr"); break;
+ case SPR4XX_PID: strcat(dest, "pid"); break;
+ case SPR4XX_TBHU: strcat(dest, "tbhu"); break;
+ case SPR4XX_TBLU: strcat(dest, "tblu"); break;
// case SPR4XX_ICDBDR: strcat(dest, "icdbdr"); break; // same as SPR603E_HASH2
// case SPR4XX_DEAR: strcat(dest, "dear"); break; // same as SPR603E_ICMP
// case SPR4XX_EVPR: strcat(dest, "evpr"); break; // same as SPR603E_RPA
- case SPR4XX_CDBCR: strcat(dest, "cdbcr"); break;
- case SPR4XX_TSR: strcat(dest, "tsr"); break;
- case SPR4XX_TCR: strcat(dest, "tcr"); break;
- case SPR4XX_PIT: strcat(dest, "pit"); break;
- case SPR4XX_TBHI: strcat(dest, "tbhi"); break;
- case SPR4XX_TBLO: strcat(dest, "tblo"); break;
- case SPR4XX_SRR2: strcat(dest, "srr2"); break;
- case SPR4XX_SRR3: strcat(dest, "srr3"); break;
+ case SPR4XX_CDBCR: strcat(dest, "cdbcr"); break;
+ case SPR4XX_TSR: strcat(dest, "tsr"); break;
+ case SPR4XX_TCR: strcat(dest, "tcr"); break;
+ case SPR4XX_PIT: strcat(dest, "pit"); break;
+ case SPR4XX_TBHI: strcat(dest, "tbhi"); break;
+ case SPR4XX_TBLO: strcat(dest, "tblo"); break;
+ case SPR4XX_SRR2: strcat(dest, "srr2"); break;
+ case SPR4XX_SRR3: strcat(dest, "srr3"); break;
// case SPR4XX_DBSR: strcat(dest, "dbsr"); break; // same as SPR603E_HID0
// case SPR4XX_DBCR: strcat(dest, "dbcr"); break; // same as SPR603E_IABR
- case SPR4XX_IAC1: strcat(dest, "iac1"); break;
+ case SPR4XX_IAC1: strcat(dest, "iac1"); break;
// case SPR4XX_IAC2: strcat(dest, "iac2"); break; // same as SPROEA_DABR
- case SPR4XX_DAC1: strcat(dest, "dac1"); break;
- case SPR4XX_DAC2: strcat(dest, "dac2"); break;
- case SPR4XX_DCCR: strcat(dest, "dccr"); break;
- case SPR4XX_ICCR: strcat(dest, "iccr"); break;
- case SPR4XX_PBL1: strcat(dest, "pbl1"); break;
- case SPR4XX_PBU1: strcat(dest, "pbu1"); break;
- case SPR4XX_PBL2: strcat(dest, "pbl2"); break;
- case SPR4XX_PBU2: strcat(dest, "pbu2"); break;
-
- default: sprintf(dest + strlen(dest), "%d", spr); break;
+ case SPR4XX_DAC1: strcat(dest, "dac1"); break;
+ case SPR4XX_DAC2: strcat(dest, "dac2"); break;
+ case SPR4XX_DCCR: strcat(dest, "dccr"); break;
+ case SPR4XX_ICCR: strcat(dest, "iccr"); break;
+ case SPR4XX_PBL1: strcat(dest, "pbl1"); break;
+ case SPR4XX_PBU1: strcat(dest, "pbu1"); break;
+ case SPR4XX_PBL2: strcat(dest, "pbl2"); break;
+ case SPR4XX_PBU2: strcat(dest, "pbu2"); break;
+
+ default: sprintf(dest + strlen(dest), "%d", spr); break;
}
}
static void DCR(char *dest, int dcr_field)
{
- int dcr;
+ int dcr;
- /*
- * Construct the DCR number -- DCR field is 2 5-bit fields
- */
+ /*
+ * Construct the DCR number -- DCR field is 2 5-bit fields
+ */
- dcr = (dcr_field >> 5) & 0x1f;
- dcr |= (dcr_field & 0x1f) << 5;
+ dcr = (dcr_field >> 5) & 0x1f;
+ dcr |= (dcr_field & 0x1f) << 5;
- /*
- * Append the DCR name to the destination string using strcat()
- */
+ /*
+ * Append the DCR name to the destination string using strcat()
+ */
switch (dcr)
{
- case 144: strcat(dest, "bear"); break;
- case 145: strcat(dest, "besr"); break;
- case 128: strcat(dest, "br0"); break;
- case 129: strcat(dest, "br1"); break;
- case 130: strcat(dest, "br2"); break;
- case 131: strcat(dest, "br3"); break;
- case 132: strcat(dest, "br4"); break;
- case 133: strcat(dest, "br5"); break;
- case 134: strcat(dest, "br6"); break;
- case 135: strcat(dest, "br7"); break;
- case 112: strcat(dest, "brh0"); break;
- case 113: strcat(dest, "brh1"); break;
- case 114: strcat(dest, "brh2"); break;
- case 115: strcat(dest, "brh3"); break;
- case 116: strcat(dest, "brh4"); break;
- case 117: strcat(dest, "brh5"); break;
- case 118: strcat(dest, "brh6"); break;
- case 119: strcat(dest, "brh7"); break;
- case 196: strcat(dest, "dmacc0"); break;
- case 204: strcat(dest, "dmacc1"); break;
- case 212: strcat(dest, "dmacc2"); break;
- case 220: strcat(dest, "dmacc3"); break;
- case 192: strcat(dest, "dmacr0"); break;
- case 200: strcat(dest, "dmacr1"); break;
- case 208: strcat(dest, "dmacr2"); break;
- case 216: strcat(dest, "dmacr3"); break;
- case 193: strcat(dest, "dmact0"); break;
- case 201: strcat(dest, "dmact1"); break;
- case 209: strcat(dest, "dmact2"); break;
- case 217: strcat(dest, "dmact3"); break;
- case 194: strcat(dest, "dmada0"); break;
- case 202: strcat(dest, "dmada1"); break;
- case 210: strcat(dest, "dmada2"); break;
- case 218: strcat(dest, "dmada3"); break;
- case 195: strcat(dest, "dmasa0"); break;
- case 203: strcat(dest, "dmasa1"); break;
- case 211: strcat(dest, "dmasa2"); break;
- case 219: strcat(dest, "dmasa3"); break;
- case 224: strcat(dest, "dmasr"); break;
- case 66: strcat(dest, "exier"); break;
- case 64: strcat(dest, "exisr"); break;
- case 160: strcat(dest, "iocr"); break;
-
- default: sprintf(dest + strlen(dest), "%d", dcr); break;
+ case 144: strcat(dest, "bear"); break;
+ case 145: strcat(dest, "besr"); break;
+ case 128: strcat(dest, "br0"); break;
+ case 129: strcat(dest, "br1"); break;
+ case 130: strcat(dest, "br2"); break;
+ case 131: strcat(dest, "br3"); break;
+ case 132: strcat(dest, "br4"); break;
+ case 133: strcat(dest, "br5"); break;
+ case 134: strcat(dest, "br6"); break;
+ case 135: strcat(dest, "br7"); break;
+ case 112: strcat(dest, "brh0"); break;
+ case 113: strcat(dest, "brh1"); break;
+ case 114: strcat(dest, "brh2"); break;
+ case 115: strcat(dest, "brh3"); break;
+ case 116: strcat(dest, "brh4"); break;
+ case 117: strcat(dest, "brh5"); break;
+ case 118: strcat(dest, "brh6"); break;
+ case 119: strcat(dest, "brh7"); break;
+ case 196: strcat(dest, "dmacc0"); break;
+ case 204: strcat(dest, "dmacc1"); break;
+ case 212: strcat(dest, "dmacc2"); break;
+ case 220: strcat(dest, "dmacc3"); break;
+ case 192: strcat(dest, "dmacr0"); break;
+ case 200: strcat(dest, "dmacr1"); break;
+ case 208: strcat(dest, "dmacr2"); break;
+ case 216: strcat(dest, "dmacr3"); break;
+ case 193: strcat(dest, "dmact0"); break;
+ case 201: strcat(dest, "dmact1"); break;
+ case 209: strcat(dest, "dmact2"); break;
+ case 217: strcat(dest, "dmact3"); break;
+ case 194: strcat(dest, "dmada0"); break;
+ case 202: strcat(dest, "dmada1"); break;
+ case 210: strcat(dest, "dmada2"); break;
+ case 218: strcat(dest, "dmada3"); break;
+ case 195: strcat(dest, "dmasa0"); break;
+ case 203: strcat(dest, "dmasa1"); break;
+ case 211: strcat(dest, "dmasa2"); break;
+ case 219: strcat(dest, "dmasa3"); break;
+ case 224: strcat(dest, "dmasr"); break;
+ case 66: strcat(dest, "exier"); break;
+ case 64: strcat(dest, "exisr"); break;
+ case 160: strcat(dest, "iocr"); break;
+
+ default: sprintf(dest + strlen(dest), "%d", dcr); break;
}
}
@@ -554,7 +554,7 @@ static void DecodeSigned16(char *outbuf, UINT32 op, int do_unsigned)
static UINT32 Mask(int mb, int me)
{
- UINT32 i, mask;
+ UINT32 i, mask;
mb &= 31;
me &= 31;
@@ -584,7 +584,7 @@ static int Check(UINT32 op, int flags)
{
int nb, rt, ra;
- if( !flags ) return 0; // nothing to check for!
+ if( !flags ) return 0; // nothing to check for!
rt = G_RT(op);
ra = G_RA(op);
@@ -604,9 +604,9 @@ static int Check(UINT32 op, int flags)
if (flags & FL_CHECK_LSWI)
{
/*
- * Check that rA is not in the range of registers to be loaded (even
- * if rA == 0)
- */
+ * Check that rA is not in the range of registers to be loaded (even
+ * if rA == 0)
+ */
nb = G_NB(op);
@@ -621,12 +621,12 @@ static int Check(UINT32 op, int flags)
if (flags & FL_CHECK_LSWX)
{
/*
- * Check that rT != rA, rT != rB, and rD and rA both do not specify
- * R0.
- *
- * We cannot check fully whether rA or rB are in the range of
- * registers specified to be loaded because that depends on XER.
- */
+ * Check that rT != rA, rT != rB, and rD and rA both do not specify
+ * R0.
+ *
+ * We cannot check fully whether rA or rB are in the range of
+ * registers specified to be loaded because that depends on XER.
+ */
if (rt == ra || rt == G_RB(op) || ((rt == 0) && (ra == 0)))
return 1;
@@ -750,22 +750,22 @@ static int Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *o
switch (G_BO(op))
{
- case 0x04: case 0x05: case 0x06: case 0x07:
+ case 0x04: case 0x05: case 0x06: case 0x07:
strcat(mnem, "b");
strcat(mnem, crnbit[G_BI(op) & 3]);
break;
- case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ case 0x0c: case 0x0d: case 0x0e: case 0x0f:
strcat(mnem, "b");
strcat(mnem, crbit[G_BI(op) & 3]);
break;
- case 0x10: case 0x11: case 0x18: case 0x19:
+ case 0x10: case 0x11: case 0x18: case 0x19:
strcat(mnem, "bdnz");
break;
- case 0x12: case 0x13: case 0x1a: case 0x1b:
+ case 0x12: case 0x13: case 0x1a: case 0x1b:
strcat(mnem, "bdz");
break;
- case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x1c: case 0x1d: case 0x1e: case 0x1f:
strcat(mnem, "b");
break;
default:
@@ -784,22 +784,22 @@ static int Simplified(UINT32 op, UINT32 vpc, char *signed16, char *mnem, char *o
{
switch (G_BO(op))
{
- case 0x04: case 0x05: case 0x06: case 0x07:
+ case 0x04: case 0x05: case 0x06: case 0x07:
strcat(mnem, "b");
strcat(mnem, crnbit[G_BI(op) & 3]);
break;
- case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ case 0x0c: case 0x0d: case 0x0e: case 0x0f:
strcat(mnem, "b");
strcat(mnem, crbit[G_BI(op) & 3]);
break;
- case 0x10: case 0x11: case 0x18: case 0x19:
+ case 0x10: case 0x11: case 0x18: case 0x19:
strcat(mnem, "bdnz");
break;
- case 0x12: case 0x13: case 0x1a: case 0x1b:
+ case 0x12: case 0x13: case 0x1a: case 0x1b:
strcat(mnem, "bdz");
break;
- case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x1c: case 0x1d: case 0x1e: case 0x1f:
strcat(mnem, "b");
break;
default:
@@ -846,14 +846,14 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
oprs[0] = '\0';
/*
- * Decode signed 16-bit fields (SIMM and d) to spare us the work later
- */
+ * Decode signed 16-bit fields (SIMM and d) to spare us the work later
+ */
DecodeSigned16(signed16, op, 0);
/*
- * Try simplified forms first, then real instructions
- */
+ * Try simplified forms first, then real instructions
+ */
if( Simplified(op, pc, signed16, mnem, oprs) ) {
buffer += sprintf(buffer, "%s", mnem);
@@ -865,16 +865,16 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
}
/*
- * Search for the instruction in the list and print it if there's a match
- */
+ * Search for the instruction in the list and print it if there's a match
+ */
for (i = 0; i < sizeof(itab) / sizeof(IDESCR); i++)
{
if ((op & ~itab[i].mask) == itab[i].match) // check for match
{
/*
- * Base mnemonic followed be O, ., L, A
- */
+ * Base mnemonic followed be O, ., L, A
+ */
strcat(mnem, itab[i].mnem);
if (itab[i].flags & FL_OE) if (op & M_OE) strcat(mnem, "o");
@@ -883,8 +883,8 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
if (itab[i].flags & FL_AA) if (op & M_AA) strcat(mnem, "a");
/*
- * Print operands
- */
+ * Print operands
+ */
switch (itab[i].format)
{
@@ -924,7 +924,7 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
case F_LI:
disp = G_LI(op) * 4;
- if (disp & 0x02000000) // sign extend
+ if (disp & 0x02000000) // sign extend
disp |= 0xfc000000;
sprintf(oprs, "0x%08X", disp + ((op & M_AA) ? 0 : pc));
break;
@@ -934,14 +934,14 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
if (disp & 0x00008000)
disp |= 0xffff0000;
- if (G_BO(op) & 0x10) // BI is ignored (don't print CR bit)
+ if (G_BO(op) & 0x10) // BI is ignored (don't print CR bit)
sprintf(oprs, "0x%02X,%d,0x%08X", G_BO(op), G_BI(op), disp + ((op & M_AA) ? 0 : pc));
- else // BI gives us the condition bit
+ else // BI gives us the condition bit
sprintf(oprs, "0x%02X,cr%d[%s],0x%08X", G_BO(op), G_BI(op) / 4, crbit[G_BI(op) & 3], disp + ((op & M_AA) ? 0 : pc));
break;
case F_BO_BI:
- if (G_BO(op) & 0x10) // BI is ignored (don't print CR bit)
+ if (G_BO(op) & 0x10) // BI is ignored (don't print CR bit)
sprintf(oprs, "0x%02X,%d", G_BO(op), G_BI(op));
else
sprintf(oprs, "0x%02X,cr%d[%s]", G_BO(op), G_BI(op) / 4, crbit[G_BI(op) & 3]);
@@ -1160,11 +1160,11 @@ offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op)
}
buffer += sprintf(buffer, "%s", oprs);
return 4 | flags;
- }
- }
+ }
+ }
sprintf(buffer, "?");
- return 4 | flags;
+ return 4 | flags;
}
CPU_DISASSEMBLE( powerpc )
diff --git a/src/emu/cpu/powerpc/ppc_mem.c b/src/emu/cpu/powerpc/ppc_mem.c
index e1a3b5fee80..a2802ce767f 100644
--- a/src/emu/cpu/powerpc/ppc_mem.c
+++ b/src/emu/cpu/powerpc/ppc_mem.c
@@ -74,7 +74,7 @@ static UINT16 ppc_read16_unaligned(address_space &space, UINT32 a)
static UINT32 ppc_read32_unaligned(address_space &space, UINT32 a)
{
return ((UINT32)ppc.read8(space, a+0) << 24) | ((UINT32)ppc.read8(space, a+1) << 16) |
- ((UINT32)ppc.read8(space, a+2) << 8) | ((UINT32)ppc.read8(space, a+3) << 0);
+ ((UINT32)ppc.read8(space, a+2) << 8) | ((UINT32)ppc.read8(space, a+3) << 0);
}
static UINT64 ppc_read64_unaligned(address_space &space, UINT32 a)
@@ -104,17 +104,17 @@ static void ppc_write64_unaligned(address_space &space, UINT32 a, UINT64 d)
/***********************************************************************/
-#define DSISR_PAGE 0x40000000
-#define DSISR_PROT 0x08000000
-#define DSISR_STORE 0x02000000
+#define DSISR_PAGE 0x40000000
+#define DSISR_PROT 0x08000000
+#define DSISR_STORE 0x02000000
enum
{
- PPC_TRANSLATE_DATA = 0x0000,
- PPC_TRANSLATE_CODE = 0x0001,
+ PPC_TRANSLATE_DATA = 0x0000,
+ PPC_TRANSLATE_CODE = 0x0001,
- PPC_TRANSLATE_READ = 0x0000,
- PPC_TRANSLATE_WRITE = 0x0002,
+ PPC_TRANSLATE_READ = 0x0000,
+ PPC_TRANSLATE_WRITE = 0x0002,
PPC_TRANSLATE_NOEXCEPTION = 0x0004
};
@@ -368,10 +368,10 @@ static CPU_READOP( ppc )
{
switch(size)
{
- case 1: *value = ppc.program->read_byte(offset); break;
- case 2: *value = ppc.program->read_word(offset); break;
- case 4: *value = ppc.program->read_dword(offset); break;
- case 8: *value = ppc.program->read_qword(offset); break;
+ case 1: *value = ppc.program->read_byte(offset); break;
+ case 2: *value = ppc.program->read_word(offset); break;
+ case 4: *value = ppc.program->read_dword(offset); break;
+ case 8: *value = ppc.program->read_qword(offset); break;
}
}
@@ -389,10 +389,10 @@ static CPU_READ( ppc )
{
switch(size)
{
- case 1: *value = ppc.program->read_byte(offset); break;
- case 2: *value = ppc.program->read_word(offset); break;
- case 4: *value = ppc.program->read_dword(offset); break;
- case 8: *value = ppc.program->read_qword(offset); break;
+ case 1: *value = ppc.program->read_byte(offset); break;
+ case 2: *value = ppc.program->read_word(offset); break;
+ case 4: *value = ppc.program->read_dword(offset); break;
+ case 8: *value = ppc.program->read_qword(offset); break;
}
}
@@ -408,10 +408,10 @@ static CPU_WRITE( ppc )
{
switch(size)
{
- case 1: ppc.program->write_byte(offset, value); break;
- case 2: ppc.program->write_word(offset, value); break;
- case 4: ppc.program->write_dword(offset, value); break;
- case 8: ppc.program->write_qword(offset, value); break;
+ case 1: ppc.program->write_byte(offset, value); break;
+ case 2: ppc.program->write_word(offset, value); break;
+ case 4: ppc.program->write_dword(offset, value); break;
+ case 8: ppc.program->write_qword(offset, value); break;
}
}
diff --git a/src/emu/cpu/powerpc/ppc_ops.c b/src/emu/cpu/powerpc/ppc_ops.c
index 21344198523..db42657ccde 100644
--- a/src/emu/cpu/powerpc/ppc_ops.c
+++ b/src/emu/cpu/powerpc/ppc_ops.c
@@ -868,14 +868,14 @@ static void ppc_mtcrf(UINT32 op)
int fxm = FXM;
int t = RT;
- if( fxm & 0x80 ) CR(0) = (REG(t) >> 28) & 0xf;
- if( fxm & 0x40 ) CR(1) = (REG(t) >> 24) & 0xf;
- if( fxm & 0x20 ) CR(2) = (REG(t) >> 20) & 0xf;
- if( fxm & 0x10 ) CR(3) = (REG(t) >> 16) & 0xf;
- if( fxm & 0x08 ) CR(4) = (REG(t) >> 12) & 0xf;
- if( fxm & 0x04 ) CR(5) = (REG(t) >> 8) & 0xf;
- if( fxm & 0x02 ) CR(6) = (REG(t) >> 4) & 0xf;
- if( fxm & 0x01 ) CR(7) = (REG(t) >> 0) & 0xf;
+ if( fxm & 0x80 ) CR(0) = (REG(t) >> 28) & 0xf;
+ if( fxm & 0x40 ) CR(1) = (REG(t) >> 24) & 0xf;
+ if( fxm & 0x20 ) CR(2) = (REG(t) >> 20) & 0xf;
+ if( fxm & 0x10 ) CR(3) = (REG(t) >> 16) & 0xf;
+ if( fxm & 0x08 ) CR(4) = (REG(t) >> 12) & 0xf;
+ if( fxm & 0x04 ) CR(5) = (REG(t) >> 8) & 0xf;
+ if( fxm & 0x02 ) CR(6) = (REG(t) >> 4) & 0xf;
+ if( fxm & 0x01 ) CR(7) = (REG(t) >> 0) & 0xf;
}
#ifndef PPC_DRC
@@ -1442,8 +1442,8 @@ static void ppc_subfex(UINT32 op)
r = ~ra + carry;
REG(RT) = rb + r;
- SET_ADD_CA(r, ~ra, carry); /* step 1 carry */
- if( REG(RT) < r ) /* step 2 carry */
+ SET_ADD_CA(r, ~ra, carry); /* step 1 carry */
+ if( REG(RT) < r ) /* step 2 carry */
XER |= XER_CA;
if( OEBIT ) {
@@ -1474,9 +1474,9 @@ static void ppc_subfmex(UINT32 op)
r = ~ra + carry;
REG(RT) = r - 1;
- SET_SUB_CA(r, ~ra, carry); /* step 1 carry */
+ SET_SUB_CA(r, ~ra, carry); /* step 1 carry */
if( REG(RT) < r )
- XER |= XER_CA; /* step 2 carry */
+ XER |= XER_CA; /* step 2 carry */
if( OEBIT ) {
SET_SUB_OV(REG(RT), -1, ra);
@@ -1621,10 +1621,10 @@ static void ppc_invalid(UINT32 op)
// !here are the 6xx ops! //
////////////////////////////
-#define DOUBLE_SIGN (U64(0x8000000000000000))
-#define DOUBLE_EXP (U64(0x7ff0000000000000))
-#define DOUBLE_FRAC (U64(0x000fffffffffffff))
-#define DOUBLE_ZERO (0)
+#define DOUBLE_SIGN (U64(0x8000000000000000))
+#define DOUBLE_EXP (U64(0x7ff0000000000000))
+#define DOUBLE_FRAC (U64(0x000fffffffffffff))
+#define DOUBLE_ZERO (0)
/*
Floating point operations.
@@ -1718,30 +1718,30 @@ INLINE void set_fprf(FPR f)
}
else if (is_infinity_double(f))
{
- if (sign_double(f)) // -INF
+ if (sign_double(f)) // -INF
fprf = 0x09;
- else // +INF
+ else // +INF
fprf = 0x05;
}
else if (is_normalized_double(f))
{
- if (sign_double(f)) // -Normalized
+ if (sign_double(f)) // -Normalized
fprf = 0x08;
- else // +Normalized
+ else // +Normalized
fprf = 0x04;
}
else if (is_denormalized_double(f))
{
- if (sign_double(f)) // -Denormalized
+ if (sign_double(f)) // -Denormalized
fprf = 0x18;
- else // +Denormalized
+ else // +Denormalized
fprf = 0x14;
}
else // Zero
{
- if (sign_double(f)) // -Zero
+ if (sign_double(f)) // -Zero
fprf = 0x12;
- else // +Zero
+ else // +Zero
fprf = 0x02;
}
@@ -1949,9 +1949,9 @@ static void ppc_mftb(UINT32 op)
switch(x)
{
- case 268: REG(RT) = (UINT32)(ppc_read_timebase()); break;
- case 269: REG(RT) = (UINT32)(ppc_read_timebase() >> 32); break;
- default: fatalerror("ppc: Invalid timebase register %d at %08X\n", x, ppc.pc); break;
+ case 268: REG(RT) = (UINT32)(ppc_read_timebase()); break;
+ case 269: REG(RT) = (UINT32)(ppc_read_timebase() >> 32); break;
+ default: fatalerror("ppc: Invalid timebase register %d at %08X\n", x, ppc.pc); break;
}
}
@@ -2098,11 +2098,11 @@ static void ppc_faddx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN(FPR(a), FPR(b));
+ SET_VXSNAN(FPR(a), FPR(b));
FPR(t).fd = FPR(a).fd + FPR(b).fd;
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2154,9 +2154,9 @@ static void ppc_fcmpu(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN(FPR(a), FPR(b));
+ SET_VXSNAN(FPR(a), FPR(b));
- if(is_nan_double(FPR(a)) || is_nan_double(FPR(b)))
+ if(is_nan_double(FPR(a)) || is_nan_double(FPR(b)))
{
c = 1; /* OX */
if(is_snan_double(FPR(a)) || is_snan_double(FPR(b))) {
@@ -2189,7 +2189,7 @@ static void ppc_fctiwx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN_1(FPR(b));
+ SET_VXSNAN_1(FPR(b));
switch(ppc.fpscr & 3)
{
@@ -2199,7 +2199,7 @@ static void ppc_fctiwx(UINT32 op)
case 3: r = (INT64)round_toward_negative_infinity(FPR(b)); break;
}
- if(r > (INT64)((INT32)0x7FFFFFFF))
+ if(r > (INT64)((INT32)0x7FFFFFFF))
{
FPR(t).id = 0x7FFFFFFF;
// FPSCR[FR] = 0
@@ -2237,10 +2237,10 @@ static void ppc_fctiwzx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN_1(FPR(b));
+ SET_VXSNAN_1(FPR(b));
r = round_toward_zero(FPR(b));
- if(r > (INT64)((INT32)0x7fffffff))
+ if(r > (INT64)((INT32)0x7fffffff))
{
FPR(t).id = 0x7fffffff;
// FPSCR[FR] = 0
@@ -2277,11 +2277,11 @@ static void ppc_fdivx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN(FPR(a), FPR(b));
+ SET_VXSNAN(FPR(a), FPR(b));
- FPR(t).fd = FPR(a).fd / FPR(b).fd;
+ FPR(t).fd = FPR(a).fd / FPR(b).fd;
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2336,11 +2336,11 @@ static void ppc_frspx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN_1(FPR(b));
+ SET_VXSNAN_1(FPR(b));
FPR(t).fd = (float)FPR(b).fd;
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2353,11 +2353,11 @@ static void ppc_frsqrtex(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN_1(FPR(b));
+ SET_VXSNAN_1(FPR(b));
- FPR(t).fd = 1.0 / sqrt(FPR(b).fd); /* verify this */
+ FPR(t).fd = 1.0 / sqrt(FPR(b).fd); /* verify this */
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2371,11 +2371,11 @@ static void ppc_fsqrtx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN_1(FPR(b));
+ SET_VXSNAN_1(FPR(b));
FPR(t).fd = (double)(sqrt(FPR(b).fd));
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2389,11 +2389,11 @@ static void ppc_fsubx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN(FPR(a), FPR(b));
+ SET_VXSNAN(FPR(a), FPR(b));
FPR(t).fd = FPR(a).fd - FPR(b).fd;
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2410,28 +2410,28 @@ static void ppc_mffsx(UINT32 op)
static void ppc_mtfsb0x(UINT32 op)
{
- UINT32 crbD;
+ UINT32 crbD;
- crbD = (op >> 21) & 0x1F;
+ crbD = (op >> 21) & 0x1F;
- if (crbD != 1 && crbD != 2) // these bits cannot be explicitly cleared
- ppc.fpscr &= ~(1 << (31 - crbD));
+ if (crbD != 1 && crbD != 2) // these bits cannot be explicitly cleared
+ ppc.fpscr &= ~(1 << (31 - crbD));
- if( RCBIT ) {
+ if( RCBIT ) {
SET_CR1();
}
}
static void ppc_mtfsb1x(UINT32 op)
{
- UINT32 crbD;
+ UINT32 crbD;
- crbD = (op >> 21) & 0x1F;
+ crbD = (op >> 21) & 0x1F;
- if (crbD != 1 && crbD != 2) // these bits cannot be explicitly cleared
- ppc.fpscr |= (1 << (31 - crbD));
+ if (crbD != 1 && crbD != 2) // these bits cannot be explicitly cleared
+ ppc.fpscr |= (1 << (31 - crbD));
- if( RCBIT ) {
+ if( RCBIT ) {
SET_CR1();
}
}
@@ -2455,30 +2455,30 @@ static void ppc_mtfsfx(UINT32 op)
static void ppc_mtfsfix(UINT32 op)
{
- UINT32 crfd = CRFD;
- UINT32 imm = (op >> 12) & 0xF;
+ UINT32 crfd = CRFD;
+ UINT32 imm = (op >> 12) & 0xF;
- /*
- * According to the manual:
- *
- * If bits 0 and 3 of FPSCR are to be modified, they take the immediate
- * value specified. Bits 1 and 2 (FEX and VX) are set according to the
- * "usual rule" and not from IMM[1-2].
- *
- * The "usual rule" is not emulated, so these bits simply aren't modified
- * at all here.
- */
+ /*
+ * According to the manual:
+ *
+ * If bits 0 and 3 of FPSCR are to be modified, they take the immediate
+ * value specified. Bits 1 and 2 (FEX and VX) are set according to the
+ * "usual rule" and not from IMM[1-2].
+ *
+ * The "usual rule" is not emulated, so these bits simply aren't modified
+ * at all here.
+ */
- crfd = (7 - crfd) * 4; // calculate LSB position of field
+ crfd = (7 - crfd) * 4; // calculate LSB position of field
- if (crfd == 28) // field containing FEX and VX is special...
- { // bits 1 and 2 of FPSCR must not be altered
- ppc.fpscr &= 0x9fffffff;
- ppc.fpscr |= (imm & 0x9fffffff);
- }
+ if (crfd == 28) // field containing FEX and VX is special...
+ { // bits 1 and 2 of FPSCR must not be altered
+ ppc.fpscr &= 0x9fffffff;
+ ppc.fpscr |= (imm & 0x9fffffff);
+ }
- ppc.fpscr &= ~(0xf << crfd); // clear field
- ppc.fpscr |= (imm << crfd); // insert new data
+ ppc.fpscr &= ~(0xf << crfd); // clear field
+ ppc.fpscr |= (imm << crfd); // insert new data
if( RCBIT ) {
SET_CR1();
@@ -2490,24 +2490,24 @@ static void ppc_mcrfs(UINT32 op)
UINT32 crfs, f;
crfs = CRFA;
- f = ppc.fpscr >> ((7 - crfs) * 4); // get crfS field from FPSCR
+ f = ppc.fpscr >> ((7 - crfs) * 4); // get crfS field from FPSCR
f &= 0xf;
- switch(crfs) // determine which exception bits to clear in FPSCR
+ switch(crfs) // determine which exception bits to clear in FPSCR
{
- case 0: // FX, OX
+ case 0: // FX, OX
ppc.fpscr &= ~0x90000000;
break;
- case 1: // UX, ZX, XX, VXSNAN
+ case 1: // UX, ZX, XX, VXSNAN
ppc.fpscr &= ~0x0f000000;
break;
- case 2: // VXISI, VXIDI, VXZDZ, VXIMZ
+ case 2: // VXISI, VXIDI, VXZDZ, VXIMZ
ppc.fpscr &= ~0x00F00000;
break;
- case 3: // VXVC
+ case 3: // VXVC
ppc.fpscr &= ~0x00080000;
break;
- case 5: // VXSOFT, VXSQRT, VXCVI
+ case 5: // VXSOFT, VXSQRT, VXCVI
ppc.fpscr &= ~0x00000e00;
break;
default:
@@ -2578,11 +2578,11 @@ static void ppc_fsqrtsx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN_1(FPR(b));
+ SET_VXSNAN_1(FPR(b));
FPR(t).fd = (float)(sqrt(FPR(b).fd));
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2596,11 +2596,11 @@ static void ppc_fsubsx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN(FPR(a), FPR(b));
+ SET_VXSNAN(FPR(a), FPR(b));
FPR(t).fd = (float)(FPR(a).fd - FPR(b).fd);
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2615,12 +2615,12 @@ static void ppc_fmaddx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN(FPR(a), FPR(b));
- SET_VXSNAN_1(FPR(c));
+ SET_VXSNAN(FPR(a), FPR(b));
+ SET_VXSNAN_1(FPR(c));
FPR(t).fd = ((FPR(a).fd * FPR(c).fd) + FPR(b).fd);
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2635,12 +2635,12 @@ static void ppc_fmsubx(UINT32 op)
CHECK_FPU_AVAILABLE();
- SET_VXSNAN(FPR(a), FPR(b));
- SET_VXSNAN_1(FPR(c));
+ SET_VXSNAN(FPR(a), FPR(b));
+ SET_VXSNAN_1(FPR(c));
- FPR(t).fd = ((FPR(a).fd * FPR(c).fd) - FPR(b).fd);
+ FPR(t).fd = ((FPR(a).fd * FPR(c).fd) - FPR(b).fd);
- set_fprf(FPR(t));
+ set_fprf(FPR(t));
if( RCBIT ) {
SET_CR1();
}
@@ -2789,7 +2789,7 @@ static void ppc_fnmaddsx(UINT32 op)
SET_VXSNAN(FPR(a), FPR(b));
SET_VXSNAN_1(FPR(c));
- FPR(t).fd = (float)(-((FPR(a).fd * FPR(c).fd) + FPR(b).fd));
+ FPR(t).fd = (float)(-((FPR(a).fd * FPR(c).fd) + FPR(b).fd));
set_fprf(FPR(t));
if( RCBIT ) {
diff --git a/src/emu/cpu/powerpc/ppc_ops.h b/src/emu/cpu/powerpc/ppc_ops.h
index 48b9d5144a7..b2e6ff8c90d 100644
--- a/src/emu/cpu/powerpc/ppc_ops.h
+++ b/src/emu/cpu/powerpc/ppc_ops.h
@@ -6,145 +6,145 @@
static PPC_OPCODE ppc_opcode_common[] =
{
/*code subcode handler */
- { 31, 266, ppc_addx },
- { 31, 266 | 512, ppc_addx },
- { 31, 10, ppc_addcx },
- { 31, 10 | 512, ppc_addcx },
- { 31, 138, ppc_addex },
- { 31, 138 | 512, ppc_addex },
- { 14, -1, ppc_addi },
- { 12, -1, ppc_addic },
- { 13, -1, ppc_addic_rc },
- { 15, -1, ppc_addis },
- { 31, 234, ppc_addmex },
- { 31, 234 | 512, ppc_addmex },
- { 31, 202, ppc_addzex },
- { 31, 202 | 512, ppc_addzex },
- { 31, 28, ppc_andx },
- { 31, 28 | 512, ppc_andx },
- { 31, 60, ppc_andcx },
- { 28, -1, ppc_andi_rc },
- { 29, -1, ppc_andis_rc },
- { 18, -1, ppc_bx },
- { 16, -1, ppc_bcx },
- { 19, 528, ppc_bcctrx },
- { 19, 16, ppc_bclrx },
- { 31, 0, ppc_cmp },
- { 11, -1, ppc_cmpi },
- { 31, 32, ppc_cmpl },
- { 10, -1, ppc_cmpli },
- { 31, 26, ppc_cntlzw },
- { 19, 257, ppc_crand },
- { 19, 129, ppc_crandc },
- { 19, 289, ppc_creqv },
- { 19, 225, ppc_crnand },
- { 19, 33, ppc_crnor },
- { 19, 449, ppc_cror },
- { 19, 417, ppc_crorc },
- { 19, 193, ppc_crxor },
- { 31, 86, ppc_dcbf },
- { 31, 470, ppc_dcbi },
- { 31, 54, ppc_dcbst },
- { 31, 278, ppc_dcbt },
- { 31, 246, ppc_dcbtst },
- { 31, 1014, ppc_dcbz },
- { 31, 491, ppc_divwx },
- { 31, 491 | 512, ppc_divwx },
- { 31, 459, ppc_divwux },
- { 31, 459 | 512, ppc_divwux },
- { 31, 854, ppc_eieio },
- { 31, 284, ppc_eqvx },
- { 31, 954, ppc_extsbx },
- { 31, 922, ppc_extshx },
- { 31, 982, ppc_icbi },
- { 19, 150, ppc_isync },
- { 34, -1, ppc_lbz },
- { 35, -1, ppc_lbzu },
- { 31, 119, ppc_lbzux },
- { 31, 87, ppc_lbzx },
- { 42, -1, ppc_lha },
- { 43, -1, ppc_lhau },
- { 31, 375, ppc_lhaux },
- { 31, 343, ppc_lhax },
- { 31, 790, ppc_lhbrx },
- { 40, -1, ppc_lhz },
- { 41, -1, ppc_lhzu },
- { 31, 311, ppc_lhzux },
- { 31, 279, ppc_lhzx },
- { 46, -1, ppc_lmw },
- { 31, 597, ppc_lswi },
- { 31, 533, ppc_lswx },
- { 31, 20, ppc_lwarx },
- { 31, 534, ppc_lwbrx },
- { 32, -1, ppc_lwz },
- { 33, -1, ppc_lwzu },
- { 31, 55, ppc_lwzux },
- { 31, 23, ppc_lwzx },
- { 19, 0, ppc_mcrf },
- { 31, 512, ppc_mcrxr },
- { 31, 19, ppc_mfcr },
- { 31, 83, ppc_mfmsr },
- { 31, 339, ppc_mfspr },
- { 31, 144, ppc_mtcrf },
- { 31, 146, ppc_mtmsr },
- { 31, 467, ppc_mtspr },
- { 31, 75, ppc_mulhwx },
- { 31, 11, ppc_mulhwux },
- { 7, -1, ppc_mulli },
- { 31, 235, ppc_mullwx },
- { 31, 235 | 512, ppc_mullwx },
- { 31, 476, ppc_nandx },
- { 31, 104, ppc_negx },
- { 31, 104 | 512, ppc_negx },
- { 31, 124, ppc_norx },
- { 31, 444, ppc_orx },
- { 31, 412, ppc_orcx },
- { 24, -1, ppc_ori },
- { 25, -1, ppc_oris },
- { 19, 50, ppc_rfi },
- { 20, -1, ppc_rlwimix },
- { 21, -1, ppc_rlwinmx },
- { 23, -1, ppc_rlwnmx },
- { 17, -1, ppc_sc },
- { 31, 24, ppc_slwx },
- { 31, 792, ppc_srawx },
- { 31, 824, ppc_srawix },
- { 31, 536, ppc_srwx },
- { 38, -1, ppc_stb },
- { 39, -1, ppc_stbu },
- { 31, 247, ppc_stbux },
- { 31, 215, ppc_stbx },
- { 44, -1, ppc_sth },
- { 31, 918, ppc_sthbrx },
- { 45, -1, ppc_sthu },
- { 31, 439, ppc_sthux },
- { 31, 407, ppc_sthx },
- { 47, -1, ppc_stmw },
- { 31, 725, ppc_stswi },
- { 31, 661, ppc_stswx },
- { 36, -1, ppc_stw },
- { 31, 662, ppc_stwbrx },
- { 31, 150, ppc_stwcx_rc },
- { 37, -1, ppc_stwu },
- { 31, 183, ppc_stwux },
- { 31, 151, ppc_stwx },
- { 31, 40, ppc_subfx },
- { 31, 40 | 512, ppc_subfx },
- { 31, 8, ppc_subfcx },
- { 31, 8 | 512, ppc_subfcx },
- { 31, 136, ppc_subfex },
- { 31, 136 | 512, ppc_subfex },
- { 8, -1, ppc_subfic },
- { 31, 232, ppc_subfmex },
- { 31, 232 | 512, ppc_subfmex },
- { 31, 200, ppc_subfzex },
- { 31, 200 | 512, ppc_subfzex },
- { 31, 598, ppc_sync },
- { 31, 4, ppc_tw },
- { 3, -1, ppc_twi },
- { 31, 316, ppc_xorx },
- { 26, -1, ppc_xori },
- { 27, -1, ppc_xoris }
+ { 31, 266, ppc_addx },
+ { 31, 266 | 512, ppc_addx },
+ { 31, 10, ppc_addcx },
+ { 31, 10 | 512, ppc_addcx },
+ { 31, 138, ppc_addex },
+ { 31, 138 | 512, ppc_addex },
+ { 14, -1, ppc_addi },
+ { 12, -1, ppc_addic },
+ { 13, -1, ppc_addic_rc },
+ { 15, -1, ppc_addis },
+ { 31, 234, ppc_addmex },
+ { 31, 234 | 512, ppc_addmex },
+ { 31, 202, ppc_addzex },
+ { 31, 202 | 512, ppc_addzex },
+ { 31, 28, ppc_andx },
+ { 31, 28 | 512, ppc_andx },
+ { 31, 60, ppc_andcx },
+ { 28, -1, ppc_andi_rc },
+ { 29, -1, ppc_andis_rc },
+ { 18, -1, ppc_bx },
+ { 16, -1, ppc_bcx },
+ { 19, 528, ppc_bcctrx },
+ { 19, 16, ppc_bclrx },
+ { 31, 0, ppc_cmp },
+ { 11, -1, ppc_cmpi },
+ { 31, 32, ppc_cmpl },
+ { 10, -1, ppc_cmpli },
+ { 31, 26, ppc_cntlzw },
+ { 19, 257, ppc_crand },
+ { 19, 129, ppc_crandc },
+ { 19, 289, ppc_creqv },
+ { 19, 225, ppc_crnand },
+ { 19, 33, ppc_crnor },
+ { 19, 449, ppc_cror },
+ { 19, 417, ppc_crorc },
+ { 19, 193, ppc_crxor },
+ { 31, 86, ppc_dcbf },
+ { 31, 470, ppc_dcbi },
+ { 31, 54, ppc_dcbst },
+ { 31, 278, ppc_dcbt },
+ { 31, 246, ppc_dcbtst },
+ { 31, 1014, ppc_dcbz },
+ { 31, 491, ppc_divwx },
+ { 31, 491 | 512, ppc_divwx },
+ { 31, 459, ppc_divwux },
+ { 31, 459 | 512, ppc_divwux },
+ { 31, 854, ppc_eieio },
+ { 31, 284, ppc_eqvx },
+ { 31, 954, ppc_extsbx },
+ { 31, 922, ppc_extshx },
+ { 31, 982, ppc_icbi },
+ { 19, 150, ppc_isync },
+ { 34, -1, ppc_lbz },
+ { 35, -1, ppc_lbzu },
+ { 31, 119, ppc_lbzux },
+ { 31, 87, ppc_lbzx },
+ { 42, -1, ppc_lha },
+ { 43, -1, ppc_lhau },
+ { 31, 375, ppc_lhaux },
+ { 31, 343, ppc_lhax },
+ { 31, 790, ppc_lhbrx },
+ { 40, -1, ppc_lhz },
+ { 41, -1, ppc_lhzu },
+ { 31, 311, ppc_lhzux },
+ { 31, 279, ppc_lhzx },
+ { 46, -1, ppc_lmw },
+ { 31, 597, ppc_lswi },
+ { 31, 533, ppc_lswx },
+ { 31, 20, ppc_lwarx },
+ { 31, 534, ppc_lwbrx },
+ { 32, -1, ppc_lwz },
+ { 33, -1, ppc_lwzu },
+ { 31, 55, ppc_lwzux },
+ { 31, 23, ppc_lwzx },
+ { 19, 0, ppc_mcrf },
+ { 31, 512, ppc_mcrxr },
+ { 31, 19, ppc_mfcr },
+ { 31, 83, ppc_mfmsr },
+ { 31, 339, ppc_mfspr },
+ { 31, 144, ppc_mtcrf },
+ { 31, 146, ppc_mtmsr },
+ { 31, 467, ppc_mtspr },
+ { 31, 75, ppc_mulhwx },
+ { 31, 11, ppc_mulhwux },
+ { 7, -1, ppc_mulli },
+ { 31, 235, ppc_mullwx },
+ { 31, 235 | 512, ppc_mullwx },
+ { 31, 476, ppc_nandx },
+ { 31, 104, ppc_negx },
+ { 31, 104 | 512, ppc_negx },
+ { 31, 124, ppc_norx },
+ { 31, 444, ppc_orx },
+ { 31, 412, ppc_orcx },
+ { 24, -1, ppc_ori },
+ { 25, -1, ppc_oris },
+ { 19, 50, ppc_rfi },
+ { 20, -1, ppc_rlwimix },
+ { 21, -1, ppc_rlwinmx },
+ { 23, -1, ppc_rlwnmx },
+ { 17, -1, ppc_sc },
+ { 31, 24, ppc_slwx },
+ { 31, 792, ppc_srawx },
+ { 31, 824, ppc_srawix },
+ { 31, 536, ppc_srwx },
+ { 38, -1, ppc_stb },
+ { 39, -1, ppc_stbu },
+ { 31, 247, ppc_stbux },
+ { 31, 215, ppc_stbx },
+ { 44, -1, ppc_sth },
+ { 31, 918, ppc_sthbrx },
+ { 45, -1, ppc_sthu },
+ { 31, 439, ppc_sthux },
+ { 31, 407, ppc_sthx },
+ { 47, -1, ppc_stmw },
+ { 31, 725, ppc_stswi },
+ { 31, 661, ppc_stswx },
+ { 36, -1, ppc_stw },
+ { 31, 662, ppc_stwbrx },
+ { 31, 150, ppc_stwcx_rc },
+ { 37, -1, ppc_stwu },
+ { 31, 183, ppc_stwux },
+ { 31, 151, ppc_stwx },
+ { 31, 40, ppc_subfx },
+ { 31, 40 | 512, ppc_subfx },
+ { 31, 8, ppc_subfcx },
+ { 31, 8 | 512, ppc_subfcx },
+ { 31, 136, ppc_subfex },
+ { 31, 136 | 512, ppc_subfex },
+ { 8, -1, ppc_subfic },
+ { 31, 232, ppc_subfmex },
+ { 31, 232 | 512, ppc_subfmex },
+ { 31, 200, ppc_subfzex },
+ { 31, 200 | 512, ppc_subfzex },
+ { 31, 598, ppc_sync },
+ { 31, 4, ppc_tw },
+ { 3, -1, ppc_twi },
+ { 31, 316, ppc_xorx },
+ { 26, -1, ppc_xori },
+ { 27, -1, ppc_xoris }
};
#endif /* __PPC_OPS_H__ */
diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c
index fc7c60413dd..66117767154 100644
--- a/src/emu/cpu/powerpc/ppccom.c
+++ b/src/emu/cpu/powerpc/ppccom.c
@@ -14,8 +14,8 @@
DEBUGGING
***************************************************************************/
-#define PRINTF_SPU (0)
-#define PRINTF_DECREMENTER (0)
+#define PRINTF_SPU (0)
+#define PRINTF_DECREMENTER (0)
@@ -23,10 +23,10 @@
CONSTANTS
***************************************************************************/
-#define DOUBLE_SIGN (U64(0x8000000000000000))
-#define DOUBLE_EXP (U64(0x7ff0000000000000))
-#define DOUBLE_FRAC (U64(0x000fffffffffffff))
-#define DOUBLE_ZERO (0)
+#define DOUBLE_SIGN (U64(0x8000000000000000))
+#define DOUBLE_EXP (U64(0x7ff0000000000000))
+#define DOUBLE_FRAC (U64(0x000fffffffffffff))
+#define DOUBLE_ZERO (0)
@@ -78,7 +78,7 @@ INLINE int page_access_allowed(int transtype, UINT8 key, UINT8 protbits)
INLINE UINT32 get_cr(powerpc_state *ppc)
{
- return ((ppc->cr[0] & 0x0f) << 28) |
+ return ((ppc->cr[0] & 0x0f) << 28) |
((ppc->cr[1] & 0x0f) << 24) |
((ppc->cr[2] & 0x0f) << 20) |
((ppc->cr[3] & 0x0f) << 16) |
@@ -496,7 +496,7 @@ void ppccom_dcstore_callback(powerpc_state *ppc)
static UINT32 ppccom_translate_address_internal(powerpc_state *ppc, int intention, offs_t *address)
{
- int transpriv = ((intention & TRANSLATE_USER_MASK) == 0); // 1 for supervisor, 0 for user
+ int transpriv = ((intention & TRANSLATE_USER_MASK) == 0); // 1 for supervisor, 0 for user
int transtype = intention & TRANSLATE_TYPE_MASK;
offs_t hash, hashbase, hashmask;
int batbase, batnum, hashnum;
@@ -1237,30 +1237,30 @@ void ppccom_update_fprf(powerpc_state *ppc)
}
else if (is_infinity_double(f))
{
- if (sign_double(f)) /* -Infinity */
+ if (sign_double(f)) /* -Infinity */
fprf = 0x09;
- else /* +Infinity */
+ else /* +Infinity */
fprf = 0x05;
}
else if (is_normalized_double(f))
{
- if (sign_double(f)) /* -Normalized */
+ if (sign_double(f)) /* -Normalized */
fprf = 0x08;
- else /* +Normalized */
+ else /* +Normalized */
fprf = 0x04;
}
else if (is_denormalized_double(f))
{
- if (sign_double(f)) /* -Denormalized */
+ if (sign_double(f)) /* -Denormalized */
fprf = 0x18;
- else /* +Denormalized */
+ else /* +Denormalized */
fprf = 0x14;
}
else
{
- if (sign_double(f)) /* -Zero */
+ if (sign_double(f)) /* -Zero */
fprf = 0x12;
- else /* +Zero */
+ else /* +Zero */
fprf = 0x02;
}
@@ -1284,114 +1284,114 @@ void ppccom_set_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ: ppc->irq_pending = (ppc->irq_pending & ~1) | (info->i != CLEAR_LINE); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ: ppc->irq_pending = (ppc->irq_pending & ~1) | (info->i != CLEAR_LINE); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PPC_PC: ppc->pc = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_MSR: ppc->msr = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_CR: set_cr(ppc, info->i); break;
- case CPUINFO_INT_REGISTER + PPC_LR: ppc->spr[SPR_LR] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_CTR: ppc->spr[SPR_CTR] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_XER: set_xer(ppc, info->i); break;
- case CPUINFO_INT_REGISTER + PPC_SRR0: ppc->spr[SPROEA_SRR0] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SRR1: ppc->spr[SPROEA_SRR1] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG0: ppc->spr[SPROEA_SPRG0] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG1: ppc->spr[SPROEA_SPRG1] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG2: ppc->spr[SPROEA_SPRG2] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG3: ppc->spr[SPROEA_SPRG3] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SDR1: ppc->spr[SPROEA_SDR1] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_EXIER: ppc->dcr[DCR4XX_EXIER] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_EXISR: ppc->dcr[DCR4XX_EXISR] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_EVPR: ppc->spr[SPR4XX_EVPR] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_IOCR: ppc->dcr[DCR4XX_IOCR] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_TBL: set_timebase(ppc, (get_timebase(ppc) & ~U64(0x00ffffff00000000)) | info->i); break;
- case CPUINFO_INT_REGISTER + PPC_TBH: set_timebase(ppc, (get_timebase(ppc) & ~U64(0x00000000ffffffff)) | ((UINT64)(ppc->param1 & 0x00ffffff) << 32)); break;
- case CPUINFO_INT_REGISTER + PPC_DEC: set_decrementer(ppc, info->i); break;
-
- case CPUINFO_INT_REGISTER + PPC_SR0: ppc->sr[0] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR1: ppc->sr[1] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR2: ppc->sr[2] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR3: ppc->sr[3] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR4: ppc->sr[4] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR5: ppc->sr[5] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR6: ppc->sr[6] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR7: ppc->sr[7] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR8: ppc->sr[8] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR9: ppc->sr[9] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR10: ppc->sr[10] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR11: ppc->sr[11] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR12: ppc->sr[12] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR13: ppc->sr[13] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR14: ppc->sr[14] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_SR15: ppc->sr[15] = info->i; break;
-
- case CPUINFO_INT_REGISTER + PPC_R0: ppc->r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R1: ppc->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R2: ppc->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R3: ppc->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R4: ppc->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R5: ppc->r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R6: ppc->r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R7: ppc->r[7] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R8: ppc->r[8] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R9: ppc->r[9] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R10: ppc->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R11: ppc->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R12: ppc->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R13: ppc->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R14: ppc->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R15: ppc->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R16: ppc->r[16] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R17: ppc->r[17] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R18: ppc->r[18] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R19: ppc->r[19] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R20: ppc->r[20] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R21: ppc->r[21] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R22: ppc->r[22] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R23: ppc->r[23] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R24: ppc->r[24] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R25: ppc->r[25] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R26: ppc->r[26] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R27: ppc->r[27] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R28: ppc->r[28] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R29: ppc->r[29] = info->i; break;
- case CPUINFO_INT_REGISTER + PPC_R30: ppc->r[30] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_PC: ppc->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_MSR: ppc->msr = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_CR: set_cr(ppc, info->i); break;
+ case CPUINFO_INT_REGISTER + PPC_LR: ppc->spr[SPR_LR] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_CTR: ppc->spr[SPR_CTR] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_XER: set_xer(ppc, info->i); break;
+ case CPUINFO_INT_REGISTER + PPC_SRR0: ppc->spr[SPROEA_SRR0] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SRR1: ppc->spr[SPROEA_SRR1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG0: ppc->spr[SPROEA_SPRG0] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG1: ppc->spr[SPROEA_SPRG1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG2: ppc->spr[SPROEA_SPRG2] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG3: ppc->spr[SPROEA_SPRG3] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SDR1: ppc->spr[SPROEA_SDR1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_EXIER: ppc->dcr[DCR4XX_EXIER] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_EXISR: ppc->dcr[DCR4XX_EXISR] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_EVPR: ppc->spr[SPR4XX_EVPR] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_IOCR: ppc->dcr[DCR4XX_IOCR] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_TBL: set_timebase(ppc, (get_timebase(ppc) & ~U64(0x00ffffff00000000)) | info->i); break;
+ case CPUINFO_INT_REGISTER + PPC_TBH: set_timebase(ppc, (get_timebase(ppc) & ~U64(0x00000000ffffffff)) | ((UINT64)(ppc->param1 & 0x00ffffff) << 32)); break;
+ case CPUINFO_INT_REGISTER + PPC_DEC: set_decrementer(ppc, info->i); break;
+
+ case CPUINFO_INT_REGISTER + PPC_SR0: ppc->sr[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR1: ppc->sr[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR2: ppc->sr[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR3: ppc->sr[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR4: ppc->sr[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR5: ppc->sr[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR6: ppc->sr[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR7: ppc->sr[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR8: ppc->sr[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR9: ppc->sr[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR10: ppc->sr[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR11: ppc->sr[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR12: ppc->sr[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR13: ppc->sr[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR14: ppc->sr[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_SR15: ppc->sr[15] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + PPC_R0: ppc->r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R1: ppc->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R2: ppc->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R3: ppc->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R4: ppc->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R5: ppc->r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R6: ppc->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R7: ppc->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R8: ppc->r[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R9: ppc->r[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R10: ppc->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R11: ppc->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R12: ppc->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R13: ppc->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R14: ppc->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R15: ppc->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R16: ppc->r[16] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R17: ppc->r[17] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R18: ppc->r[18] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R19: ppc->r[19] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R20: ppc->r[20] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R21: ppc->r[21] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R22: ppc->r[22] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R23: ppc->r[23] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R24: ppc->r[24] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R25: ppc->r[25] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R26: ppc->r[26] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R27: ppc->r[27] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R28: ppc->r[28] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R29: ppc->r[29] = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R30: ppc->r[30] = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + PPC_R31: ppc->r[31] = info->i; break;
-
- case CPUINFO_INT_REGISTER + PPC_F0: ppc->f[0] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F1: ppc->f[1] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F2: ppc->f[2] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F3: ppc->f[3] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F4: ppc->f[4] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F5: ppc->f[5] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F6: ppc->f[6] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F7: ppc->f[7] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F8: ppc->f[8] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F9: ppc->f[9] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F10: ppc->f[10] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F11: ppc->f[11] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F12: ppc->f[12] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F13: ppc->f[13] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F14: ppc->f[14] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F15: ppc->f[15] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F16: ppc->f[16] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F17: ppc->f[17] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F18: ppc->f[18] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F19: ppc->f[19] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F20: ppc->f[20] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F21: ppc->f[21] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F22: ppc->f[22] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F23: ppc->f[23] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F24: ppc->f[24] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F25: ppc->f[25] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F26: ppc->f[26] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F27: ppc->f[27] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F28: ppc->f[28] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F29: ppc->f[29] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F30: ppc->f[30] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_F31: ppc->f[31] = *(double *)&info->i; break;
- case CPUINFO_INT_REGISTER + PPC_FPSCR: ppc->fpscr = info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_R31: ppc->r[31] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + PPC_F0: ppc->f[0] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F1: ppc->f[1] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F2: ppc->f[2] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F3: ppc->f[3] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F4: ppc->f[4] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F5: ppc->f[5] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F6: ppc->f[6] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F7: ppc->f[7] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F8: ppc->f[8] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F9: ppc->f[9] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F10: ppc->f[10] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F11: ppc->f[11] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F12: ppc->f[12] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F13: ppc->f[13] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F14: ppc->f[14] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F15: ppc->f[15] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F16: ppc->f[16] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F17: ppc->f[17] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F18: ppc->f[18] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F19: ppc->f[19] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F20: ppc->f[20] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F21: ppc->f[21] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F22: ppc->f[22] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F23: ppc->f[23] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F24: ppc->f[24] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F25: ppc->f[25] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F26: ppc->f[26] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F27: ppc->f[27] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F28: ppc->f[28] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F29: ppc->f[29] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F30: ppc->f[30] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_F31: ppc->f[31] = *(double *)&info->i; break;
+ case CPUINFO_INT_REGISTER + PPC_FPSCR: ppc->fpscr = info->i; break;
}
}
@@ -1406,257 +1406,257 @@ void ppccom_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: /* provided by core */ break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
-
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ: info->i = ppc->irq_pending ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* optionally implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: /* provided by core */ break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
+
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ: info->i = ppc->irq_pending ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* optionally implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + PPC_PC: info->i = ppc->pc; break;
- case CPUINFO_INT_REGISTER + PPC_MSR: info->i = ppc->msr; break;
- case CPUINFO_INT_REGISTER + PPC_CR: info->i = get_cr(ppc); break;
- case CPUINFO_INT_REGISTER + PPC_LR: info->i = ppc->spr[SPR_LR]; break;
- case CPUINFO_INT_REGISTER + PPC_CTR: info->i = ppc->spr[SPR_CTR]; break;
- case CPUINFO_INT_REGISTER + PPC_XER: info->i = get_xer(ppc); break;
- case CPUINFO_INT_REGISTER + PPC_SRR0: info->i = ppc->spr[SPROEA_SRR0]; break;
- case CPUINFO_INT_REGISTER + PPC_SRR1: info->i = ppc->spr[SPROEA_SRR1]; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG0: info->i = ppc->spr[SPROEA_SPRG0]; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG1: info->i = ppc->spr[SPROEA_SPRG1]; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG2: info->i = ppc->spr[SPROEA_SPRG2]; break;
- case CPUINFO_INT_REGISTER + PPC_SPRG3: info->i = ppc->spr[SPROEA_SPRG3]; break;
- case CPUINFO_INT_REGISTER + PPC_SDR1: info->i = ppc->spr[SPROEA_SDR1]; break;
- case CPUINFO_INT_REGISTER + PPC_EXIER: info->i = ppc->dcr[DCR4XX_EXIER]; break;
- case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = ppc->dcr[DCR4XX_EXISR]; break;
- case CPUINFO_INT_REGISTER + PPC_EVPR: info->i = ppc->spr[SPR4XX_EVPR]; break;
- case CPUINFO_INT_REGISTER + PPC_IOCR: info->i = ppc->dcr[DCR4XX_IOCR]; break;
- case CPUINFO_INT_REGISTER + PPC_TBH: info->i = get_timebase(ppc) >> 32; break;
- case CPUINFO_INT_REGISTER + PPC_TBL: info->i = (UINT32)get_timebase(ppc); break;
- case CPUINFO_INT_REGISTER + PPC_DEC: info->i = get_decrementer(ppc); break;
-
- case CPUINFO_INT_REGISTER + PPC_SR0: info->i = ppc->sr[0]; break;
- case CPUINFO_INT_REGISTER + PPC_SR1: info->i = ppc->sr[1]; break;
- case CPUINFO_INT_REGISTER + PPC_SR2: info->i = ppc->sr[2]; break;
- case CPUINFO_INT_REGISTER + PPC_SR3: info->i = ppc->sr[3]; break;
- case CPUINFO_INT_REGISTER + PPC_SR4: info->i = ppc->sr[4]; break;
- case CPUINFO_INT_REGISTER + PPC_SR5: info->i = ppc->sr[5]; break;
- case CPUINFO_INT_REGISTER + PPC_SR6: info->i = ppc->sr[6]; break;
- case CPUINFO_INT_REGISTER + PPC_SR7: info->i = ppc->sr[7]; break;
- case CPUINFO_INT_REGISTER + PPC_SR8: info->i = ppc->sr[8]; break;
- case CPUINFO_INT_REGISTER + PPC_SR9: info->i = ppc->sr[9]; break;
- case CPUINFO_INT_REGISTER + PPC_SR10: info->i = ppc->sr[10]; break;
- case CPUINFO_INT_REGISTER + PPC_SR11: info->i = ppc->sr[11]; break;
- case CPUINFO_INT_REGISTER + PPC_SR12: info->i = ppc->sr[12]; break;
- case CPUINFO_INT_REGISTER + PPC_SR13: info->i = ppc->sr[13]; break;
- case CPUINFO_INT_REGISTER + PPC_SR14: info->i = ppc->sr[14]; break;
- case CPUINFO_INT_REGISTER + PPC_SR15: info->i = ppc->sr[15]; break;
-
- case CPUINFO_INT_REGISTER + PPC_R0: info->i = ppc->r[0]; break;
- case CPUINFO_INT_REGISTER + PPC_R1: info->i = ppc->r[1]; break;
- case CPUINFO_INT_REGISTER + PPC_R2: info->i = ppc->r[2]; break;
- case CPUINFO_INT_REGISTER + PPC_R3: info->i = ppc->r[3]; break;
- case CPUINFO_INT_REGISTER + PPC_R4: info->i = ppc->r[4]; break;
- case CPUINFO_INT_REGISTER + PPC_R5: info->i = ppc->r[5]; break;
- case CPUINFO_INT_REGISTER + PPC_R6: info->i = ppc->r[6]; break;
- case CPUINFO_INT_REGISTER + PPC_R7: info->i = ppc->r[7]; break;
- case CPUINFO_INT_REGISTER + PPC_R8: info->i = ppc->r[8]; break;
- case CPUINFO_INT_REGISTER + PPC_R9: info->i = ppc->r[9]; break;
- case CPUINFO_INT_REGISTER + PPC_R10: info->i = ppc->r[10]; break;
- case CPUINFO_INT_REGISTER + PPC_R11: info->i = ppc->r[11]; break;
- case CPUINFO_INT_REGISTER + PPC_R12: info->i = ppc->r[12]; break;
- case CPUINFO_INT_REGISTER + PPC_R13: info->i = ppc->r[13]; break;
- case CPUINFO_INT_REGISTER + PPC_R14: info->i = ppc->r[14]; break;
- case CPUINFO_INT_REGISTER + PPC_R15: info->i = ppc->r[15]; break;
- case CPUINFO_INT_REGISTER + PPC_R16: info->i = ppc->r[16]; break;
- case CPUINFO_INT_REGISTER + PPC_R17: info->i = ppc->r[17]; break;
- case CPUINFO_INT_REGISTER + PPC_R18: info->i = ppc->r[18]; break;
- case CPUINFO_INT_REGISTER + PPC_R19: info->i = ppc->r[19]; break;
- case CPUINFO_INT_REGISTER + PPC_R20: info->i = ppc->r[20]; break;
- case CPUINFO_INT_REGISTER + PPC_R21: info->i = ppc->r[21]; break;
- case CPUINFO_INT_REGISTER + PPC_R22: info->i = ppc->r[22]; break;
- case CPUINFO_INT_REGISTER + PPC_R23: info->i = ppc->r[23]; break;
- case CPUINFO_INT_REGISTER + PPC_R24: info->i = ppc->r[24]; break;
- case CPUINFO_INT_REGISTER + PPC_R25: info->i = ppc->r[25]; break;
- case CPUINFO_INT_REGISTER + PPC_R26: info->i = ppc->r[26]; break;
- case CPUINFO_INT_REGISTER + PPC_R27: info->i = ppc->r[27]; break;
- case CPUINFO_INT_REGISTER + PPC_R28: info->i = ppc->r[28]; break;
- case CPUINFO_INT_REGISTER + PPC_R29: info->i = ppc->r[29]; break;
- case CPUINFO_INT_REGISTER + PPC_R30: info->i = ppc->r[30]; break;
+ case CPUINFO_INT_REGISTER + PPC_PC: info->i = ppc->pc; break;
+ case CPUINFO_INT_REGISTER + PPC_MSR: info->i = ppc->msr; break;
+ case CPUINFO_INT_REGISTER + PPC_CR: info->i = get_cr(ppc); break;
+ case CPUINFO_INT_REGISTER + PPC_LR: info->i = ppc->spr[SPR_LR]; break;
+ case CPUINFO_INT_REGISTER + PPC_CTR: info->i = ppc->spr[SPR_CTR]; break;
+ case CPUINFO_INT_REGISTER + PPC_XER: info->i = get_xer(ppc); break;
+ case CPUINFO_INT_REGISTER + PPC_SRR0: info->i = ppc->spr[SPROEA_SRR0]; break;
+ case CPUINFO_INT_REGISTER + PPC_SRR1: info->i = ppc->spr[SPROEA_SRR1]; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG0: info->i = ppc->spr[SPROEA_SPRG0]; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG1: info->i = ppc->spr[SPROEA_SPRG1]; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG2: info->i = ppc->spr[SPROEA_SPRG2]; break;
+ case CPUINFO_INT_REGISTER + PPC_SPRG3: info->i = ppc->spr[SPROEA_SPRG3]; break;
+ case CPUINFO_INT_REGISTER + PPC_SDR1: info->i = ppc->spr[SPROEA_SDR1]; break;
+ case CPUINFO_INT_REGISTER + PPC_EXIER: info->i = ppc->dcr[DCR4XX_EXIER]; break;
+ case CPUINFO_INT_REGISTER + PPC_EXISR: info->i = ppc->dcr[DCR4XX_EXISR]; break;
+ case CPUINFO_INT_REGISTER + PPC_EVPR: info->i = ppc->spr[SPR4XX_EVPR]; break;
+ case CPUINFO_INT_REGISTER + PPC_IOCR: info->i = ppc->dcr[DCR4XX_IOCR]; break;
+ case CPUINFO_INT_REGISTER + PPC_TBH: info->i = get_timebase(ppc) >> 32; break;
+ case CPUINFO_INT_REGISTER + PPC_TBL: info->i = (UINT32)get_timebase(ppc); break;
+ case CPUINFO_INT_REGISTER + PPC_DEC: info->i = get_decrementer(ppc); break;
+
+ case CPUINFO_INT_REGISTER + PPC_SR0: info->i = ppc->sr[0]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR1: info->i = ppc->sr[1]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR2: info->i = ppc->sr[2]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR3: info->i = ppc->sr[3]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR4: info->i = ppc->sr[4]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR5: info->i = ppc->sr[5]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR6: info->i = ppc->sr[6]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR7: info->i = ppc->sr[7]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR8: info->i = ppc->sr[8]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR9: info->i = ppc->sr[9]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR10: info->i = ppc->sr[10]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR11: info->i = ppc->sr[11]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR12: info->i = ppc->sr[12]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR13: info->i = ppc->sr[13]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR14: info->i = ppc->sr[14]; break;
+ case CPUINFO_INT_REGISTER + PPC_SR15: info->i = ppc->sr[15]; break;
+
+ case CPUINFO_INT_REGISTER + PPC_R0: info->i = ppc->r[0]; break;
+ case CPUINFO_INT_REGISTER + PPC_R1: info->i = ppc->r[1]; break;
+ case CPUINFO_INT_REGISTER + PPC_R2: info->i = ppc->r[2]; break;
+ case CPUINFO_INT_REGISTER + PPC_R3: info->i = ppc->r[3]; break;
+ case CPUINFO_INT_REGISTER + PPC_R4: info->i = ppc->r[4]; break;
+ case CPUINFO_INT_REGISTER + PPC_R5: info->i = ppc->r[5]; break;
+ case CPUINFO_INT_REGISTER + PPC_R6: info->i = ppc->r[6]; break;
+ case CPUINFO_INT_REGISTER + PPC_R7: info->i = ppc->r[7]; break;
+ case CPUINFO_INT_REGISTER + PPC_R8: info->i = ppc->r[8]; break;
+ case CPUINFO_INT_REGISTER + PPC_R9: info->i = ppc->r[9]; break;
+ case CPUINFO_INT_REGISTER + PPC_R10: info->i = ppc->r[10]; break;
+ case CPUINFO_INT_REGISTER + PPC_R11: info->i = ppc->r[11]; break;
+ case CPUINFO_INT_REGISTER + PPC_R12: info->i = ppc->r[12]; break;
+ case CPUINFO_INT_REGISTER + PPC_R13: info->i = ppc->r[13]; break;
+ case CPUINFO_INT_REGISTER + PPC_R14: info->i = ppc->r[14]; break;
+ case CPUINFO_INT_REGISTER + PPC_R15: info->i = ppc->r[15]; break;
+ case CPUINFO_INT_REGISTER + PPC_R16: info->i = ppc->r[16]; break;
+ case CPUINFO_INT_REGISTER + PPC_R17: info->i = ppc->r[17]; break;
+ case CPUINFO_INT_REGISTER + PPC_R18: info->i = ppc->r[18]; break;
+ case CPUINFO_INT_REGISTER + PPC_R19: info->i = ppc->r[19]; break;
+ case CPUINFO_INT_REGISTER + PPC_R20: info->i = ppc->r[20]; break;
+ case CPUINFO_INT_REGISTER + PPC_R21: info->i = ppc->r[21]; break;
+ case CPUINFO_INT_REGISTER + PPC_R22: info->i = ppc->r[22]; break;
+ case CPUINFO_INT_REGISTER + PPC_R23: info->i = ppc->r[23]; break;
+ case CPUINFO_INT_REGISTER + PPC_R24: info->i = ppc->r[24]; break;
+ case CPUINFO_INT_REGISTER + PPC_R25: info->i = ppc->r[25]; break;
+ case CPUINFO_INT_REGISTER + PPC_R26: info->i = ppc->r[26]; break;
+ case CPUINFO_INT_REGISTER + PPC_R27: info->i = ppc->r[27]; break;
+ case CPUINFO_INT_REGISTER + PPC_R28: info->i = ppc->r[28]; break;
+ case CPUINFO_INT_REGISTER + PPC_R29: info->i = ppc->r[29]; break;
+ case CPUINFO_INT_REGISTER + PPC_R30: info->i = ppc->r[30]; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + PPC_R31: info->i = ppc->r[31]; break;
-
- case CPUINFO_INT_REGISTER + PPC_F0: info->i = *(UINT64 *)&ppc->f[0]; break;
- case CPUINFO_INT_REGISTER + PPC_F1: info->i = *(UINT64 *)&ppc->f[1]; break;
- case CPUINFO_INT_REGISTER + PPC_F2: info->i = *(UINT64 *)&ppc->f[2]; break;
- case CPUINFO_INT_REGISTER + PPC_F3: info->i = *(UINT64 *)&ppc->f[3]; break;
- case CPUINFO_INT_REGISTER + PPC_F4: info->i = *(UINT64 *)&ppc->f[4]; break;
- case CPUINFO_INT_REGISTER + PPC_F5: info->i = *(UINT64 *)&ppc->f[5]; break;
- case CPUINFO_INT_REGISTER + PPC_F6: info->i = *(UINT64 *)&ppc->f[6]; break;
- case CPUINFO_INT_REGISTER + PPC_F7: info->i = *(UINT64 *)&ppc->f[7]; break;
- case CPUINFO_INT_REGISTER + PPC_F8: info->i = *(UINT64 *)&ppc->f[8]; break;
- case CPUINFO_INT_REGISTER + PPC_F9: info->i = *(UINT64 *)&ppc->f[9]; break;
- case CPUINFO_INT_REGISTER + PPC_F10: info->i = *(UINT64 *)&ppc->f[10]; break;
- case CPUINFO_INT_REGISTER + PPC_F11: info->i = *(UINT64 *)&ppc->f[11]; break;
- case CPUINFO_INT_REGISTER + PPC_F12: info->i = *(UINT64 *)&ppc->f[12]; break;
- case CPUINFO_INT_REGISTER + PPC_F13: info->i = *(UINT64 *)&ppc->f[13]; break;
- case CPUINFO_INT_REGISTER + PPC_F14: info->i = *(UINT64 *)&ppc->f[14]; break;
- case CPUINFO_INT_REGISTER + PPC_F15: info->i = *(UINT64 *)&ppc->f[15]; break;
- case CPUINFO_INT_REGISTER + PPC_F16: info->i = *(UINT64 *)&ppc->f[16]; break;
- case CPUINFO_INT_REGISTER + PPC_F17: info->i = *(UINT64 *)&ppc->f[17]; break;
- case CPUINFO_INT_REGISTER + PPC_F18: info->i = *(UINT64 *)&ppc->f[18]; break;
- case CPUINFO_INT_REGISTER + PPC_F19: info->i = *(UINT64 *)&ppc->f[19]; break;
- case CPUINFO_INT_REGISTER + PPC_F20: info->i = *(UINT64 *)&ppc->f[20]; break;
- case CPUINFO_INT_REGISTER + PPC_F21: info->i = *(UINT64 *)&ppc->f[21]; break;
- case CPUINFO_INT_REGISTER + PPC_F22: info->i = *(UINT64 *)&ppc->f[22]; break;
- case CPUINFO_INT_REGISTER + PPC_F23: info->i = *(UINT64 *)&ppc->f[23]; break;
- case CPUINFO_INT_REGISTER + PPC_F24: info->i = *(UINT64 *)&ppc->f[24]; break;
- case CPUINFO_INT_REGISTER + PPC_F25: info->i = *(UINT64 *)&ppc->f[25]; break;
- case CPUINFO_INT_REGISTER + PPC_F26: info->i = *(UINT64 *)&ppc->f[26]; break;
- case CPUINFO_INT_REGISTER + PPC_F27: info->i = *(UINT64 *)&ppc->f[27]; break;
- case CPUINFO_INT_REGISTER + PPC_F28: info->i = *(UINT64 *)&ppc->f[28]; break;
- case CPUINFO_INT_REGISTER + PPC_F29: info->i = *(UINT64 *)&ppc->f[29]; break;
- case CPUINFO_INT_REGISTER + PPC_F30: info->i = *(UINT64 *)&ppc->f[30]; break;
- case CPUINFO_INT_REGISTER + PPC_F31: info->i = *(UINT64 *)&ppc->f[31]; break;
- case CPUINFO_INT_REGISTER + PPC_FPSCR: info->i = ppc->fpscr; break;
+ case CPUINFO_INT_REGISTER + PPC_R31: info->i = ppc->r[31]; break;
+
+ case CPUINFO_INT_REGISTER + PPC_F0: info->i = *(UINT64 *)&ppc->f[0]; break;
+ case CPUINFO_INT_REGISTER + PPC_F1: info->i = *(UINT64 *)&ppc->f[1]; break;
+ case CPUINFO_INT_REGISTER + PPC_F2: info->i = *(UINT64 *)&ppc->f[2]; break;
+ case CPUINFO_INT_REGISTER + PPC_F3: info->i = *(UINT64 *)&ppc->f[3]; break;
+ case CPUINFO_INT_REGISTER + PPC_F4: info->i = *(UINT64 *)&ppc->f[4]; break;
+ case CPUINFO_INT_REGISTER + PPC_F5: info->i = *(UINT64 *)&ppc->f[5]; break;
+ case CPUINFO_INT_REGISTER + PPC_F6: info->i = *(UINT64 *)&ppc->f[6]; break;
+ case CPUINFO_INT_REGISTER + PPC_F7: info->i = *(UINT64 *)&ppc->f[7]; break;
+ case CPUINFO_INT_REGISTER + PPC_F8: info->i = *(UINT64 *)&ppc->f[8]; break;
+ case CPUINFO_INT_REGISTER + PPC_F9: info->i = *(UINT64 *)&ppc->f[9]; break;
+ case CPUINFO_INT_REGISTER + PPC_F10: info->i = *(UINT64 *)&ppc->f[10]; break;
+ case CPUINFO_INT_REGISTER + PPC_F11: info->i = *(UINT64 *)&ppc->f[11]; break;
+ case CPUINFO_INT_REGISTER + PPC_F12: info->i = *(UINT64 *)&ppc->f[12]; break;
+ case CPUINFO_INT_REGISTER + PPC_F13: info->i = *(UINT64 *)&ppc->f[13]; break;
+ case CPUINFO_INT_REGISTER + PPC_F14: info->i = *(UINT64 *)&ppc->f[14]; break;
+ case CPUINFO_INT_REGISTER + PPC_F15: info->i = *(UINT64 *)&ppc->f[15]; break;
+ case CPUINFO_INT_REGISTER + PPC_F16: info->i = *(UINT64 *)&ppc->f[16]; break;
+ case CPUINFO_INT_REGISTER + PPC_F17: info->i = *(UINT64 *)&ppc->f[17]; break;
+ case CPUINFO_INT_REGISTER + PPC_F18: info->i = *(UINT64 *)&ppc->f[18]; break;
+ case CPUINFO_INT_REGISTER + PPC_F19: info->i = *(UINT64 *)&ppc->f[19]; break;
+ case CPUINFO_INT_REGISTER + PPC_F20: info->i = *(UINT64 *)&ppc->f[20]; break;
+ case CPUINFO_INT_REGISTER + PPC_F21: info->i = *(UINT64 *)&ppc->f[21]; break;
+ case CPUINFO_INT_REGISTER + PPC_F22: info->i = *(UINT64 *)&ppc->f[22]; break;
+ case CPUINFO_INT_REGISTER + PPC_F23: info->i = *(UINT64 *)&ppc->f[23]; break;
+ case CPUINFO_INT_REGISTER + PPC_F24: info->i = *(UINT64 *)&ppc->f[24]; break;
+ case CPUINFO_INT_REGISTER + PPC_F25: info->i = *(UINT64 *)&ppc->f[25]; break;
+ case CPUINFO_INT_REGISTER + PPC_F26: info->i = *(UINT64 *)&ppc->f[26]; break;
+ case CPUINFO_INT_REGISTER + PPC_F27: info->i = *(UINT64 *)&ppc->f[27]; break;
+ case CPUINFO_INT_REGISTER + PPC_F28: info->i = *(UINT64 *)&ppc->f[28]; break;
+ case CPUINFO_INT_REGISTER + PPC_F29: info->i = *(UINT64 *)&ppc->f[29]; break;
+ case CPUINFO_INT_REGISTER + PPC_F30: info->i = *(UINT64 *)&ppc->f[30]; break;
+ case CPUINFO_INT_REGISTER + PPC_F31: info->i = *(UINT64 *)&ppc->f[31]; break;
+ case CPUINFO_INT_REGISTER + PPC_FPSCR: info->i = ppc->fpscr; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: /* provided by core */ break;
- case CPUINFO_FCT_INIT: /* provided by core */ break;
- case CPUINFO_FCT_RESET: /* provided by core */ break;
- case CPUINFO_FCT_EXIT: /* provided by core */ break;
- case CPUINFO_FCT_EXECUTE: /* provided by core */ break;
- case CPUINFO_FCT_TRANSLATE: /* provided by core */ break;
- case CPUINFO_FCT_DISASSEMBLE: /* provided by core */ break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ppc->icount; break;
+ case CPUINFO_FCT_SET_INFO: /* provided by core */ break;
+ case CPUINFO_FCT_INIT: /* provided by core */ break;
+ case CPUINFO_FCT_RESET: /* provided by core */ break;
+ case CPUINFO_FCT_EXIT: /* provided by core */ break;
+ case CPUINFO_FCT_EXECUTE: /* provided by core */ break;
+ case CPUINFO_FCT_TRANSLATE: /* provided by core */ break;
+ case CPUINFO_FCT_DISASSEMBLE: /* provided by core */ break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ppc->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "PowerPC"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
- case CPUINFO_STR_SOURCE_FILE: /* provided by core */ break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + PPC_PC: sprintf(info->s, "PC: %08X", ppc->pc); break;
- case CPUINFO_STR_REGISTER + PPC_MSR: sprintf(info->s, "MSR:%08X", ppc->msr); break;
- case CPUINFO_STR_REGISTER + PPC_CR: sprintf(info->s, "CR: %08X", get_cr(ppc)); break;
- case CPUINFO_STR_REGISTER + PPC_LR: sprintf(info->s, "LR: %08X", ppc->spr[SPR_LR]); break;
- case CPUINFO_STR_REGISTER + PPC_CTR: sprintf(info->s, "CTR:%08X", ppc->spr[SPR_CTR]); break;
- case CPUINFO_STR_REGISTER + PPC_XER: sprintf(info->s, "XER:%08X", get_xer(ppc)); break;
- case CPUINFO_STR_REGISTER + PPC_SRR0: sprintf(info->s, "SRR0: %08X", ppc->spr[SPROEA_SRR0]); break;
- case CPUINFO_STR_REGISTER + PPC_SRR1: sprintf(info->s, "SRR1: %08X", ppc->spr[SPROEA_SRR1]); break;
- case CPUINFO_STR_REGISTER + PPC_SPRG0: sprintf(info->s, "SPRG0: %08X", ppc->spr[SPROEA_SPRG0]); break;
- case CPUINFO_STR_REGISTER + PPC_SPRG1: sprintf(info->s, "SPRG1: %08X", ppc->spr[SPROEA_SPRG1]); break;
- case CPUINFO_STR_REGISTER + PPC_SPRG2: sprintf(info->s, "SPRG2: %08X", ppc->spr[SPROEA_SPRG2]); break;
- case CPUINFO_STR_REGISTER + PPC_SPRG3: sprintf(info->s, "SPRG3: %08X", ppc->spr[SPROEA_SPRG3]); break;
- case CPUINFO_STR_REGISTER + PPC_SDR1: sprintf(info->s, "SDR1: %08X", ppc->spr[SPROEA_SDR1]); break;
- case CPUINFO_STR_REGISTER + PPC_EXIER: sprintf(info->s, "EXIER: %08X", ppc->dcr[DCR4XX_EXIER]); break;
- case CPUINFO_STR_REGISTER + PPC_EXISR: sprintf(info->s, "EXISR: %08X", ppc->dcr[DCR4XX_EXISR]); break;
- case CPUINFO_STR_REGISTER + PPC_EVPR: sprintf(info->s, "EVPR: %08X", ppc->spr[SPR4XX_EVPR]); break;
- case CPUINFO_STR_REGISTER + PPC_IOCR: sprintf(info->s, "IOCR: %08X", ppc->dcr[DCR4XX_EXISR]); break;
- case CPUINFO_STR_REGISTER + PPC_TBH: sprintf(info->s, "TBH: %08X", (UINT32)(get_timebase(ppc) >> 32)); break;
- case CPUINFO_STR_REGISTER + PPC_TBL: sprintf(info->s, "TBL: %08X", (UINT32)get_timebase(ppc)); break;
- case CPUINFO_STR_REGISTER + PPC_DEC: sprintf(info->s, "DEC: %08X", get_decrementer(ppc)); break;
-
- case CPUINFO_STR_REGISTER + PPC_SR0: sprintf(info->s, "SR0: %08X", ppc->sr[0]); break;
- case CPUINFO_STR_REGISTER + PPC_SR1: sprintf(info->s, "SR1: %08X", ppc->sr[1]); break;
- case CPUINFO_STR_REGISTER + PPC_SR2: sprintf(info->s, "SR2: %08X", ppc->sr[2]); break;
- case CPUINFO_STR_REGISTER + PPC_SR3: sprintf(info->s, "SR3: %08X", ppc->sr[3]); break;
- case CPUINFO_STR_REGISTER + PPC_SR4: sprintf(info->s, "SR4: %08X", ppc->sr[4]); break;
- case CPUINFO_STR_REGISTER + PPC_SR5: sprintf(info->s, "SR5: %08X", ppc->sr[5]); break;
- case CPUINFO_STR_REGISTER + PPC_SR6: sprintf(info->s, "SR6: %08X", ppc->sr[6]); break;
- case CPUINFO_STR_REGISTER + PPC_SR7: sprintf(info->s, "SR7: %08X", ppc->sr[7]); break;
- case CPUINFO_STR_REGISTER + PPC_SR8: sprintf(info->s, "SR8: %08X", ppc->sr[8]); break;
- case CPUINFO_STR_REGISTER + PPC_SR9: sprintf(info->s, "SR9: %08X", ppc->sr[9]); break;
- case CPUINFO_STR_REGISTER + PPC_SR10: sprintf(info->s, "SR10: %08X", ppc->sr[10]); break;
- case CPUINFO_STR_REGISTER + PPC_SR11: sprintf(info->s, "SR11: %08X", ppc->sr[11]); break;
- case CPUINFO_STR_REGISTER + PPC_SR12: sprintf(info->s, "SR12: %08X", ppc->sr[12]); break;
- case CPUINFO_STR_REGISTER + PPC_SR13: sprintf(info->s, "SR13: %08X", ppc->sr[13]); break;
- case CPUINFO_STR_REGISTER + PPC_SR14: sprintf(info->s, "SR14: %08X", ppc->sr[14]); break;
- case CPUINFO_STR_REGISTER + PPC_SR15: sprintf(info->s, "SR15: %08X", ppc->sr[15]); break;
-
- case CPUINFO_STR_REGISTER + PPC_R0: sprintf(info->s, "R0: %08X", ppc->r[0]); break;
- case CPUINFO_STR_REGISTER + PPC_R1: sprintf(info->s, "R1: %08X", ppc->r[1]); break;
- case CPUINFO_STR_REGISTER + PPC_R2: sprintf(info->s, "R2: %08X", ppc->r[2]); break;
- case CPUINFO_STR_REGISTER + PPC_R3: sprintf(info->s, "R3: %08X", ppc->r[3]); break;
- case CPUINFO_STR_REGISTER + PPC_R4: sprintf(info->s, "R4: %08X", ppc->r[4]); break;
- case CPUINFO_STR_REGISTER + PPC_R5: sprintf(info->s, "R5: %08X", ppc->r[5]); break;
- case CPUINFO_STR_REGISTER + PPC_R6: sprintf(info->s, "R6: %08X", ppc->r[6]); break;
- case CPUINFO_STR_REGISTER + PPC_R7: sprintf(info->s, "R7: %08X", ppc->r[7]); break;
- case CPUINFO_STR_REGISTER + PPC_R8: sprintf(info->s, "R8: %08X", ppc->r[8]); break;
- case CPUINFO_STR_REGISTER + PPC_R9: sprintf(info->s, "R9: %08X", ppc->r[9]); break;
- case CPUINFO_STR_REGISTER + PPC_R10: sprintf(info->s, "R10:%08X", ppc->r[10]); break;
- case CPUINFO_STR_REGISTER + PPC_R11: sprintf(info->s, "R11:%08X", ppc->r[11]); break;
- case CPUINFO_STR_REGISTER + PPC_R12: sprintf(info->s, "R12:%08X", ppc->r[12]); break;
- case CPUINFO_STR_REGISTER + PPC_R13: sprintf(info->s, "R13:%08X", ppc->r[13]); break;
- case CPUINFO_STR_REGISTER + PPC_R14: sprintf(info->s, "R14:%08X", ppc->r[14]); break;
- case CPUINFO_STR_REGISTER + PPC_R15: sprintf(info->s, "R15:%08X", ppc->r[15]); break;
- case CPUINFO_STR_REGISTER + PPC_R16: sprintf(info->s, "R16:%08X", ppc->r[16]); break;
- case CPUINFO_STR_REGISTER + PPC_R17: sprintf(info->s, "R17:%08X", ppc->r[17]); break;
- case CPUINFO_STR_REGISTER + PPC_R18: sprintf(info->s, "R18:%08X", ppc->r[18]); break;
- case CPUINFO_STR_REGISTER + PPC_R19: sprintf(info->s, "R19:%08X", ppc->r[19]); break;
- case CPUINFO_STR_REGISTER + PPC_R20: sprintf(info->s, "R20:%08X", ppc->r[20]); break;
- case CPUINFO_STR_REGISTER + PPC_R21: sprintf(info->s, "R21:%08X", ppc->r[21]); break;
- case CPUINFO_STR_REGISTER + PPC_R22: sprintf(info->s, "R22:%08X", ppc->r[22]); break;
- case CPUINFO_STR_REGISTER + PPC_R23: sprintf(info->s, "R23:%08X", ppc->r[23]); break;
- case CPUINFO_STR_REGISTER + PPC_R24: sprintf(info->s, "R24:%08X", ppc->r[24]); break;
- case CPUINFO_STR_REGISTER + PPC_R25: sprintf(info->s, "R25:%08X", ppc->r[25]); break;
- case CPUINFO_STR_REGISTER + PPC_R26: sprintf(info->s, "R26:%08X", ppc->r[26]); break;
- case CPUINFO_STR_REGISTER + PPC_R27: sprintf(info->s, "R27:%08X", ppc->r[27]); break;
- case CPUINFO_STR_REGISTER + PPC_R28: sprintf(info->s, "R28:%08X", ppc->r[28]); break;
- case CPUINFO_STR_REGISTER + PPC_R29: sprintf(info->s, "R29:%08X", ppc->r[29]); break;
- case CPUINFO_STR_REGISTER + PPC_R30: sprintf(info->s, "R30:%08X", ppc->r[30]); break;
- case CPUINFO_STR_REGISTER + PPC_R31: sprintf(info->s, "R31:%08X", ppc->r[31]); break;
-
- case CPUINFO_STR_REGISTER + PPC_F0: sprintf(info->s, "F0: %12f", ppc->f[0]); break;
- case CPUINFO_STR_REGISTER + PPC_F1: sprintf(info->s, "F1: %12f", ppc->f[1]); break;
- case CPUINFO_STR_REGISTER + PPC_F2: sprintf(info->s, "F2: %12f", ppc->f[2]); break;
- case CPUINFO_STR_REGISTER + PPC_F3: sprintf(info->s, "F3: %12f", ppc->f[3]); break;
- case CPUINFO_STR_REGISTER + PPC_F4: sprintf(info->s, "F4: %12f", ppc->f[4]); break;
- case CPUINFO_STR_REGISTER + PPC_F5: sprintf(info->s, "F5: %12f", ppc->f[5]); break;
- case CPUINFO_STR_REGISTER + PPC_F6: sprintf(info->s, "F6: %12f", ppc->f[6]); break;
- case CPUINFO_STR_REGISTER + PPC_F7: sprintf(info->s, "F7: %12f", ppc->f[7]); break;
- case CPUINFO_STR_REGISTER + PPC_F8: sprintf(info->s, "F8: %12f", ppc->f[8]); break;
- case CPUINFO_STR_REGISTER + PPC_F9: sprintf(info->s, "F9: %12f", ppc->f[9]); break;
- case CPUINFO_STR_REGISTER + PPC_F10: sprintf(info->s, "F10:%12f", ppc->f[10]); break;
- case CPUINFO_STR_REGISTER + PPC_F11: sprintf(info->s, "F11:%12f", ppc->f[11]); break;
- case CPUINFO_STR_REGISTER + PPC_F12: sprintf(info->s, "F12:%12f", ppc->f[12]); break;
- case CPUINFO_STR_REGISTER + PPC_F13: sprintf(info->s, "F13:%12f", ppc->f[13]); break;
- case CPUINFO_STR_REGISTER + PPC_F14: sprintf(info->s, "F14:%12f", ppc->f[14]); break;
- case CPUINFO_STR_REGISTER + PPC_F15: sprintf(info->s, "F15:%12f", ppc->f[15]); break;
- case CPUINFO_STR_REGISTER + PPC_F16: sprintf(info->s, "F16:%12f", ppc->f[16]); break;
- case CPUINFO_STR_REGISTER + PPC_F17: sprintf(info->s, "F17:%12f", ppc->f[17]); break;
- case CPUINFO_STR_REGISTER + PPC_F18: sprintf(info->s, "F18:%12f", ppc->f[18]); break;
- case CPUINFO_STR_REGISTER + PPC_F19: sprintf(info->s, "F19:%12f", ppc->f[19]); break;
- case CPUINFO_STR_REGISTER + PPC_F20: sprintf(info->s, "F20:%12f", ppc->f[20]); break;
- case CPUINFO_STR_REGISTER + PPC_F21: sprintf(info->s, "F21:%12f", ppc->f[21]); break;
- case CPUINFO_STR_REGISTER + PPC_F22: sprintf(info->s, "F22:%12f", ppc->f[22]); break;
- case CPUINFO_STR_REGISTER + PPC_F23: sprintf(info->s, "F23:%12f", ppc->f[23]); break;
- case CPUINFO_STR_REGISTER + PPC_F24: sprintf(info->s, "F24:%12f", ppc->f[24]); break;
- case CPUINFO_STR_REGISTER + PPC_F25: sprintf(info->s, "F25:%12f", ppc->f[25]); break;
- case CPUINFO_STR_REGISTER + PPC_F26: sprintf(info->s, "F26:%12f", ppc->f[26]); break;
- case CPUINFO_STR_REGISTER + PPC_F27: sprintf(info->s, "F27:%12f", ppc->f[27]); break;
- case CPUINFO_STR_REGISTER + PPC_F28: sprintf(info->s, "F28:%12f", ppc->f[28]); break;
- case CPUINFO_STR_REGISTER + PPC_F29: sprintf(info->s, "F29:%12f", ppc->f[29]); break;
- case CPUINFO_STR_REGISTER + PPC_F30: sprintf(info->s, "F30:%12f", ppc->f[30]); break;
- case CPUINFO_STR_REGISTER + PPC_F31: sprintf(info->s, "F31:%12f", ppc->f[31]); break;
- case CPUINFO_STR_REGISTER + PPC_FPSCR: sprintf(info->s, "FPSCR:%08X", ppc->fpscr); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "PowerPC"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: /* provided by core */ break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + PPC_PC: sprintf(info->s, "PC: %08X", ppc->pc); break;
+ case CPUINFO_STR_REGISTER + PPC_MSR: sprintf(info->s, "MSR:%08X", ppc->msr); break;
+ case CPUINFO_STR_REGISTER + PPC_CR: sprintf(info->s, "CR: %08X", get_cr(ppc)); break;
+ case CPUINFO_STR_REGISTER + PPC_LR: sprintf(info->s, "LR: %08X", ppc->spr[SPR_LR]); break;
+ case CPUINFO_STR_REGISTER + PPC_CTR: sprintf(info->s, "CTR:%08X", ppc->spr[SPR_CTR]); break;
+ case CPUINFO_STR_REGISTER + PPC_XER: sprintf(info->s, "XER:%08X", get_xer(ppc)); break;
+ case CPUINFO_STR_REGISTER + PPC_SRR0: sprintf(info->s, "SRR0: %08X", ppc->spr[SPROEA_SRR0]); break;
+ case CPUINFO_STR_REGISTER + PPC_SRR1: sprintf(info->s, "SRR1: %08X", ppc->spr[SPROEA_SRR1]); break;
+ case CPUINFO_STR_REGISTER + PPC_SPRG0: sprintf(info->s, "SPRG0: %08X", ppc->spr[SPROEA_SPRG0]); break;
+ case CPUINFO_STR_REGISTER + PPC_SPRG1: sprintf(info->s, "SPRG1: %08X", ppc->spr[SPROEA_SPRG1]); break;
+ case CPUINFO_STR_REGISTER + PPC_SPRG2: sprintf(info->s, "SPRG2: %08X", ppc->spr[SPROEA_SPRG2]); break;
+ case CPUINFO_STR_REGISTER + PPC_SPRG3: sprintf(info->s, "SPRG3: %08X", ppc->spr[SPROEA_SPRG3]); break;
+ case CPUINFO_STR_REGISTER + PPC_SDR1: sprintf(info->s, "SDR1: %08X", ppc->spr[SPROEA_SDR1]); break;
+ case CPUINFO_STR_REGISTER + PPC_EXIER: sprintf(info->s, "EXIER: %08X", ppc->dcr[DCR4XX_EXIER]); break;
+ case CPUINFO_STR_REGISTER + PPC_EXISR: sprintf(info->s, "EXISR: %08X", ppc->dcr[DCR4XX_EXISR]); break;
+ case CPUINFO_STR_REGISTER + PPC_EVPR: sprintf(info->s, "EVPR: %08X", ppc->spr[SPR4XX_EVPR]); break;
+ case CPUINFO_STR_REGISTER + PPC_IOCR: sprintf(info->s, "IOCR: %08X", ppc->dcr[DCR4XX_EXISR]); break;
+ case CPUINFO_STR_REGISTER + PPC_TBH: sprintf(info->s, "TBH: %08X", (UINT32)(get_timebase(ppc) >> 32)); break;
+ case CPUINFO_STR_REGISTER + PPC_TBL: sprintf(info->s, "TBL: %08X", (UINT32)get_timebase(ppc)); break;
+ case CPUINFO_STR_REGISTER + PPC_DEC: sprintf(info->s, "DEC: %08X", get_decrementer(ppc)); break;
+
+ case CPUINFO_STR_REGISTER + PPC_SR0: sprintf(info->s, "SR0: %08X", ppc->sr[0]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR1: sprintf(info->s, "SR1: %08X", ppc->sr[1]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR2: sprintf(info->s, "SR2: %08X", ppc->sr[2]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR3: sprintf(info->s, "SR3: %08X", ppc->sr[3]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR4: sprintf(info->s, "SR4: %08X", ppc->sr[4]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR5: sprintf(info->s, "SR5: %08X", ppc->sr[5]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR6: sprintf(info->s, "SR6: %08X", ppc->sr[6]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR7: sprintf(info->s, "SR7: %08X", ppc->sr[7]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR8: sprintf(info->s, "SR8: %08X", ppc->sr[8]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR9: sprintf(info->s, "SR9: %08X", ppc->sr[9]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR10: sprintf(info->s, "SR10: %08X", ppc->sr[10]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR11: sprintf(info->s, "SR11: %08X", ppc->sr[11]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR12: sprintf(info->s, "SR12: %08X", ppc->sr[12]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR13: sprintf(info->s, "SR13: %08X", ppc->sr[13]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR14: sprintf(info->s, "SR14: %08X", ppc->sr[14]); break;
+ case CPUINFO_STR_REGISTER + PPC_SR15: sprintf(info->s, "SR15: %08X", ppc->sr[15]); break;
+
+ case CPUINFO_STR_REGISTER + PPC_R0: sprintf(info->s, "R0: %08X", ppc->r[0]); break;
+ case CPUINFO_STR_REGISTER + PPC_R1: sprintf(info->s, "R1: %08X", ppc->r[1]); break;
+ case CPUINFO_STR_REGISTER + PPC_R2: sprintf(info->s, "R2: %08X", ppc->r[2]); break;
+ case CPUINFO_STR_REGISTER + PPC_R3: sprintf(info->s, "R3: %08X", ppc->r[3]); break;
+ case CPUINFO_STR_REGISTER + PPC_R4: sprintf(info->s, "R4: %08X", ppc->r[4]); break;
+ case CPUINFO_STR_REGISTER + PPC_R5: sprintf(info->s, "R5: %08X", ppc->r[5]); break;
+ case CPUINFO_STR_REGISTER + PPC_R6: sprintf(info->s, "R6: %08X", ppc->r[6]); break;
+ case CPUINFO_STR_REGISTER + PPC_R7: sprintf(info->s, "R7: %08X", ppc->r[7]); break;
+ case CPUINFO_STR_REGISTER + PPC_R8: sprintf(info->s, "R8: %08X", ppc->r[8]); break;
+ case CPUINFO_STR_REGISTER + PPC_R9: sprintf(info->s, "R9: %08X", ppc->r[9]); break;
+ case CPUINFO_STR_REGISTER + PPC_R10: sprintf(info->s, "R10:%08X", ppc->r[10]); break;
+ case CPUINFO_STR_REGISTER + PPC_R11: sprintf(info->s, "R11:%08X", ppc->r[11]); break;
+ case CPUINFO_STR_REGISTER + PPC_R12: sprintf(info->s, "R12:%08X", ppc->r[12]); break;
+ case CPUINFO_STR_REGISTER + PPC_R13: sprintf(info->s, "R13:%08X", ppc->r[13]); break;
+ case CPUINFO_STR_REGISTER + PPC_R14: sprintf(info->s, "R14:%08X", ppc->r[14]); break;
+ case CPUINFO_STR_REGISTER + PPC_R15: sprintf(info->s, "R15:%08X", ppc->r[15]); break;
+ case CPUINFO_STR_REGISTER + PPC_R16: sprintf(info->s, "R16:%08X", ppc->r[16]); break;
+ case CPUINFO_STR_REGISTER + PPC_R17: sprintf(info->s, "R17:%08X", ppc->r[17]); break;
+ case CPUINFO_STR_REGISTER + PPC_R18: sprintf(info->s, "R18:%08X", ppc->r[18]); break;
+ case CPUINFO_STR_REGISTER + PPC_R19: sprintf(info->s, "R19:%08X", ppc->r[19]); break;
+ case CPUINFO_STR_REGISTER + PPC_R20: sprintf(info->s, "R20:%08X", ppc->r[20]); break;
+ case CPUINFO_STR_REGISTER + PPC_R21: sprintf(info->s, "R21:%08X", ppc->r[21]); break;
+ case CPUINFO_STR_REGISTER + PPC_R22: sprintf(info->s, "R22:%08X", ppc->r[22]); break;
+ case CPUINFO_STR_REGISTER + PPC_R23: sprintf(info->s, "R23:%08X", ppc->r[23]); break;
+ case CPUINFO_STR_REGISTER + PPC_R24: sprintf(info->s, "R24:%08X", ppc->r[24]); break;
+ case CPUINFO_STR_REGISTER + PPC_R25: sprintf(info->s, "R25:%08X", ppc->r[25]); break;
+ case CPUINFO_STR_REGISTER + PPC_R26: sprintf(info->s, "R26:%08X", ppc->r[26]); break;
+ case CPUINFO_STR_REGISTER + PPC_R27: sprintf(info->s, "R27:%08X", ppc->r[27]); break;
+ case CPUINFO_STR_REGISTER + PPC_R28: sprintf(info->s, "R28:%08X", ppc->r[28]); break;
+ case CPUINFO_STR_REGISTER + PPC_R29: sprintf(info->s, "R29:%08X", ppc->r[29]); break;
+ case CPUINFO_STR_REGISTER + PPC_R30: sprintf(info->s, "R30:%08X", ppc->r[30]); break;
+ case CPUINFO_STR_REGISTER + PPC_R31: sprintf(info->s, "R31:%08X", ppc->r[31]); break;
+
+ case CPUINFO_STR_REGISTER + PPC_F0: sprintf(info->s, "F0: %12f", ppc->f[0]); break;
+ case CPUINFO_STR_REGISTER + PPC_F1: sprintf(info->s, "F1: %12f", ppc->f[1]); break;
+ case CPUINFO_STR_REGISTER + PPC_F2: sprintf(info->s, "F2: %12f", ppc->f[2]); break;
+ case CPUINFO_STR_REGISTER + PPC_F3: sprintf(info->s, "F3: %12f", ppc->f[3]); break;
+ case CPUINFO_STR_REGISTER + PPC_F4: sprintf(info->s, "F4: %12f", ppc->f[4]); break;
+ case CPUINFO_STR_REGISTER + PPC_F5: sprintf(info->s, "F5: %12f", ppc->f[5]); break;
+ case CPUINFO_STR_REGISTER + PPC_F6: sprintf(info->s, "F6: %12f", ppc->f[6]); break;
+ case CPUINFO_STR_REGISTER + PPC_F7: sprintf(info->s, "F7: %12f", ppc->f[7]); break;
+ case CPUINFO_STR_REGISTER + PPC_F8: sprintf(info->s, "F8: %12f", ppc->f[8]); break;
+ case CPUINFO_STR_REGISTER + PPC_F9: sprintf(info->s, "F9: %12f", ppc->f[9]); break;
+ case CPUINFO_STR_REGISTER + PPC_F10: sprintf(info->s, "F10:%12f", ppc->f[10]); break;
+ case CPUINFO_STR_REGISTER + PPC_F11: sprintf(info->s, "F11:%12f", ppc->f[11]); break;
+ case CPUINFO_STR_REGISTER + PPC_F12: sprintf(info->s, "F12:%12f", ppc->f[12]); break;
+ case CPUINFO_STR_REGISTER + PPC_F13: sprintf(info->s, "F13:%12f", ppc->f[13]); break;
+ case CPUINFO_STR_REGISTER + PPC_F14: sprintf(info->s, "F14:%12f", ppc->f[14]); break;
+ case CPUINFO_STR_REGISTER + PPC_F15: sprintf(info->s, "F15:%12f", ppc->f[15]); break;
+ case CPUINFO_STR_REGISTER + PPC_F16: sprintf(info->s, "F16:%12f", ppc->f[16]); break;
+ case CPUINFO_STR_REGISTER + PPC_F17: sprintf(info->s, "F17:%12f", ppc->f[17]); break;
+ case CPUINFO_STR_REGISTER + PPC_F18: sprintf(info->s, "F18:%12f", ppc->f[18]); break;
+ case CPUINFO_STR_REGISTER + PPC_F19: sprintf(info->s, "F19:%12f", ppc->f[19]); break;
+ case CPUINFO_STR_REGISTER + PPC_F20: sprintf(info->s, "F20:%12f", ppc->f[20]); break;
+ case CPUINFO_STR_REGISTER + PPC_F21: sprintf(info->s, "F21:%12f", ppc->f[21]); break;
+ case CPUINFO_STR_REGISTER + PPC_F22: sprintf(info->s, "F22:%12f", ppc->f[22]); break;
+ case CPUINFO_STR_REGISTER + PPC_F23: sprintf(info->s, "F23:%12f", ppc->f[23]); break;
+ case CPUINFO_STR_REGISTER + PPC_F24: sprintf(info->s, "F24:%12f", ppc->f[24]); break;
+ case CPUINFO_STR_REGISTER + PPC_F25: sprintf(info->s, "F25:%12f", ppc->f[25]); break;
+ case CPUINFO_STR_REGISTER + PPC_F26: sprintf(info->s, "F26:%12f", ppc->f[26]); break;
+ case CPUINFO_STR_REGISTER + PPC_F27: sprintf(info->s, "F27:%12f", ppc->f[27]); break;
+ case CPUINFO_STR_REGISTER + PPC_F28: sprintf(info->s, "F28:%12f", ppc->f[28]); break;
+ case CPUINFO_STR_REGISTER + PPC_F29: sprintf(info->s, "F29:%12f", ppc->f[29]); break;
+ case CPUINFO_STR_REGISTER + PPC_F30: sprintf(info->s, "F30:%12f", ppc->f[30]); break;
+ case CPUINFO_STR_REGISTER + PPC_F31: sprintf(info->s, "F31:%12f", ppc->f[31]); break;
+ case CPUINFO_STR_REGISTER + PPC_FPSCR: sprintf(info->s, "FPSCR:%08X", ppc->fpscr); break;
}
}
@@ -2045,12 +2045,12 @@ static void ppc4xx_dma_exec(powerpc_state *ppc, int dmachan)
}
else
{
- time = 0; // let very short transfers occur instantly
+ time = 0; // let very short transfers occur instantly
}
ppc->buffered_dma_timer[dmachan]->adjust(attotime::from_usec(time), dmachan);
}
- else /* buffered DMA with internal peripheral (SPU) */
+ else /* buffered DMA with internal peripheral (SPU) */
{
/* nothing to do; this happens asynchronously and is driven by the SPU */
}
@@ -2166,7 +2166,7 @@ static TIMER_CALLBACK( ppc4xx_pit_callback )
}
/* update ourself for the next interval if we are enabled and we are either being
- forced to update, or we are in auto-reload mode */
+ forced to update, or we are in auto-reload mode */
if ((ppc->spr[SPR4XX_TCR] & PPC4XX_TCR_PIE) && ppc->pit_reload != 0 && (!param || (ppc->spr[SPR4XX_TCR] & PPC4XX_TCR_ARE)))
{
UINT32 timebase = get_timebase(ppc);
@@ -2492,14 +2492,14 @@ void ppc4xx_set_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_0: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_1: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_2: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_3: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_4: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT4, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_0: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_1: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_2: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_3: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_4: ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_EXT4, info->i); break;
/* --- everything else is handled generically --- */
- default: ppccom_set_info(ppc, state, info); break;
+ default: ppccom_set_info(ppc, state, info); break;
}
}
@@ -2514,25 +2514,23 @@ void ppc4xx_get_info(powerpc_state *ppc, UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_0: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT0); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_1: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT1); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_2: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT2); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_3: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT3); break;
- case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_4: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT4); break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 31; break;
- case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_0: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT0); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_1: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT1); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_2: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT2); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_3: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT3); break;
+ case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_4: info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT4); break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 31; break;
+ case CPUINFO_INT_LOGADDR_WIDTH_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_PAGE_SHIFT_PROGRAM: info->i = POWERPC_MIN_PAGE_SHIFT;break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
+ case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(internal_ppc4xx); break;
/* --- everything else is handled generically --- */
- default: ppccom_get_info(ppc, state, info); break;
+ default: ppccom_get_info(ppc, state, info); break;
}
}
-
-
diff --git a/src/emu/cpu/powerpc/ppccom.h b/src/emu/cpu/powerpc/ppccom.h
index 5c58c8bd642..cceca2b73f4 100644
--- a/src/emu/cpu/powerpc/ppccom.h
+++ b/src/emu/cpu/powerpc/ppccom.h
@@ -20,82 +20,82 @@
***************************************************************************/
/* core parameters */
-#define POWERPC_MIN_PAGE_SHIFT 12
-#define POWERPC_MIN_PAGE_SIZE (1 << POWERPC_MIN_PAGE_SHIFT)
-#define POWERPC_MIN_PAGE_MASK (POWERPC_MIN_PAGE_SIZE - 1)
-#define POWERPC_TLB_ENTRIES 128
-#define PPC603_FIXED_TLB_ENTRIES 128
+#define POWERPC_MIN_PAGE_SHIFT 12
+#define POWERPC_MIN_PAGE_SIZE (1 << POWERPC_MIN_PAGE_SHIFT)
+#define POWERPC_MIN_PAGE_MASK (POWERPC_MIN_PAGE_SIZE - 1)
+#define POWERPC_TLB_ENTRIES 128
+#define PPC603_FIXED_TLB_ENTRIES 128
/* cycle parameters */
-#define POWERPC_COUNT_READ_TBL 100
-#define POWERPC_COUNT_READ_DEC 100
+#define POWERPC_COUNT_READ_TBL 100
+#define POWERPC_COUNT_READ_DEC 100
/* internal capabilities flags */
-#define PPCCAP_OEA 0x01 /* TRUE if we conform to the OEA */
-#define PPCCAP_VEA 0x02 /* TRUE if we conform to the VEA */
-#define PPCCAP_FPU 0x04 /* TRUE if we have an FPU */
-#define PPCCAP_MISALIGNED 0x08 /* TRUE if misaligned accesses are supported */
-#define PPCCAP_4XX 0x10 /* TRUE if we are a non-OEA 4XX class chip */
-#define PPCCAP_603_MMU 0x20 /* TRUE if we have 603-class MMU features */
+#define PPCCAP_OEA 0x01 /* TRUE if we conform to the OEA */
+#define PPCCAP_VEA 0x02 /* TRUE if we conform to the VEA */
+#define PPCCAP_FPU 0x04 /* TRUE if we have an FPU */
+#define PPCCAP_MISALIGNED 0x08 /* TRUE if misaligned accesses are supported */
+#define PPCCAP_4XX 0x10 /* TRUE if we are a non-OEA 4XX class chip */
+#define PPCCAP_603_MMU 0x20 /* TRUE if we have 603-class MMU features */
#define PPCCAP_MFIOC 0x40 /* TRUE if we have memory-forced I/O controller interface accesses */
#define PPCCAP_601BAT 0x80 /* TRUE if we're doing 601-style BATs (unified I/D, different bit layout) */
-#define PPCCAP_604_MMU 0x100 /* TRUE if we have 604-class MMU features */
+#define PPCCAP_604_MMU 0x100 /* TRUE if we have 604-class MMU features */
/* PowerPC flavors */
enum powerpc_flavor
{
- PPC_MODEL_403GA = 0x00200000,
- PPC_MODEL_403GB = 0x00200100,
- PPC_MODEL_403GC = 0x00200200,
- PPC_MODEL_403GCX = 0x00201400,
- PPC_MODEL_405GP = 0x40110000,
- PPC_MODEL_601 = 0x00010000,
- PPC_MODEL_603 = 0x00030000, /* "Wart" */
- PPC_MODEL_604 = 0x00040000, /* "Zephyr" */
- PPC_MODEL_602 = 0x00050200, /* "Galahad" */
- PPC_MODEL_603E = 0x00060103, /* "Stretch", version 1.3 */
- PPC_MODEL_603EV = 0x00070000, /* "Valiant" */
- PPC_MODEL_603R = 0x00071202, /* "Goldeneye", version 2.1 */
- PPC_MODEL_740 = 0x00080301, /* "Arthur", version 3.1 */
- PPC_MODEL_750 = PPC_MODEL_740,
- PPC_MODEL_740P = 0x00080202, /* "Conan Doyle", version 1.2 */
- PPC_MODEL_750P = PPC_MODEL_740P,
- PPC_MODEL_755 = 0x00083203, /* "Goldfinger", version 2.3 */
- PPC_MODEL_7400 = 0x000c0209, /* "Max", version 2.9 */
- PPC_MODEL_7410 = 0x800c1104, /* "Nitro", version 3.4 */
- PPC_MODEL_7450 = 0x80000201, /* "Vger", version 2.1 */
- PPC_MODEL_7451 = 0x80000203, /* "Vger", version 2.3 */
- PPC_MODEL_7441 = PPC_MODEL_7451,
- PPC_MODEL_7455 = 0x80010303, /* "Apollo 6", version 3.3 */
- PPC_MODEL_7445 = PPC_MODEL_7455,
- PPC_MODEL_7457 = 0x80020101, /* "Apollo 7", version 1.1 */
- PPC_MODEL_MPC8240 = 0x00810101, /* "Kahlua" */
- PPC_MODEL_MPC8241 = 0x80811014, /* "Kahlua Lt" */
- PPC_MODEL_MPC8245 = 0x80811014, /* "Kahlua II" */
+ PPC_MODEL_403GA = 0x00200000,
+ PPC_MODEL_403GB = 0x00200100,
+ PPC_MODEL_403GC = 0x00200200,
+ PPC_MODEL_403GCX = 0x00201400,
+ PPC_MODEL_405GP = 0x40110000,
+ PPC_MODEL_601 = 0x00010000,
+ PPC_MODEL_603 = 0x00030000, /* "Wart" */
+ PPC_MODEL_604 = 0x00040000, /* "Zephyr" */
+ PPC_MODEL_602 = 0x00050200, /* "Galahad" */
+ PPC_MODEL_603E = 0x00060103, /* "Stretch", version 1.3 */
+ PPC_MODEL_603EV = 0x00070000, /* "Valiant" */
+ PPC_MODEL_603R = 0x00071202, /* "Goldeneye", version 2.1 */
+ PPC_MODEL_740 = 0x00080301, /* "Arthur", version 3.1 */
+ PPC_MODEL_750 = PPC_MODEL_740,
+ PPC_MODEL_740P = 0x00080202, /* "Conan Doyle", version 1.2 */
+ PPC_MODEL_750P = PPC_MODEL_740P,
+ PPC_MODEL_755 = 0x00083203, /* "Goldfinger", version 2.3 */
+ PPC_MODEL_7400 = 0x000c0209, /* "Max", version 2.9 */
+ PPC_MODEL_7410 = 0x800c1104, /* "Nitro", version 3.4 */
+ PPC_MODEL_7450 = 0x80000201, /* "Vger", version 2.1 */
+ PPC_MODEL_7451 = 0x80000203, /* "Vger", version 2.3 */
+ PPC_MODEL_7441 = PPC_MODEL_7451,
+ PPC_MODEL_7455 = 0x80010303, /* "Apollo 6", version 3.3 */
+ PPC_MODEL_7445 = PPC_MODEL_7455,
+ PPC_MODEL_7457 = 0x80020101, /* "Apollo 7", version 1.1 */
+ PPC_MODEL_MPC8240 = 0x00810101, /* "Kahlua" */
+ PPC_MODEL_MPC8241 = 0x80811014, /* "Kahlua Lt" */
+ PPC_MODEL_MPC8245 = 0x80811014, /* "Kahlua II" */
};
/* exception types */
enum
{
- EXCEPTION_RESET = 1,
- EXCEPTION_MACHCHECK = 2,
- EXCEPTION_DSI = 3, /* PPCCAP_OEA */
- EXCEPTION_PROTECTION = 3, /* PPCCAP_4XX */
- EXCEPTION_ISI = 4,
- EXCEPTION_EI = 5,
- EXCEPTION_ALIGN = 6,
- EXCEPTION_PROGRAM = 7,
- EXCEPTION_NOFPU = 8,
- EXCEPTION_DECREMENT = 9,
- EXCEPTION_SYSCALL = 12,
- EXCEPTION_TRACE = 13,
- EXCEPTION_FPASSIST = 14,
- EXCEPTION_ITLBMISS = 16, /* PPCCAP_603_MMU */
- EXCEPTION_DTLBMISSL = 17, /* PPCCAP_603_MMU */
- EXCEPTION_DTLBMISSS = 18, /* PPCCAP_603_MMU */
+ EXCEPTION_RESET = 1,
+ EXCEPTION_MACHCHECK = 2,
+ EXCEPTION_DSI = 3, /* PPCCAP_OEA */
+ EXCEPTION_PROTECTION = 3, /* PPCCAP_4XX */
+ EXCEPTION_ISI = 4,
+ EXCEPTION_EI = 5,
+ EXCEPTION_ALIGN = 6,
+ EXCEPTION_PROGRAM = 7,
+ EXCEPTION_NOFPU = 8,
+ EXCEPTION_DECREMENT = 9,
+ EXCEPTION_SYSCALL = 12,
+ EXCEPTION_TRACE = 13,
+ EXCEPTION_FPASSIST = 14,
+ EXCEPTION_ITLBMISS = 16, /* PPCCAP_603_MMU */
+ EXCEPTION_DTLBMISSL = 17, /* PPCCAP_603_MMU */
+ EXCEPTION_DTLBMISSS = 18, /* PPCCAP_603_MMU */
EXCEPTION_COUNT
};
@@ -104,325 +104,325 @@ enum
enum
{
/* UISA SPR register indexes */
- SPR_XER = 0x001, /* R/W Fixed Point Exception Register */
- SPR_LR = 0x008, /* R/W Link Register */
- SPR_CTR = 0x009, /* R/W Count Register */
+ SPR_XER = 0x001, /* R/W Fixed Point Exception Register */
+ SPR_LR = 0x008, /* R/W Link Register */
+ SPR_CTR = 0x009, /* R/W Count Register */
/* VEA SPR register indexes */
- SPRVEA_TBL_R = 0x10c, /* R Time Base Low */
- SPRVEA_TBU_R = 0x10d, /* R Time Base High */
+ SPRVEA_TBL_R = 0x10c, /* R Time Base Low */
+ SPRVEA_TBU_R = 0x10d, /* R Time Base High */
/* OEA SPR register indexes */
- SPROEA_DSISR = 0x012, /* R/W DSI Status Register */
- SPROEA_DAR = 0x013, /* R/W Data Address Register */
- SPROEA_DEC = 0x016, /* R/W Decrementer Register */
- SPROEA_SDR1 = 0x019, /* R/W Page Table Configuration */
- SPROEA_SRR0 = 0x01a, /* R/W Machine Status Save/Restore Register 0 */
- SPROEA_SRR1 = 0x01b, /* R/W Machine Status Save/Restore Register 1 */
- SPROEA_SPRG0 = 0x110, /* R/W SPR General 0 */
- SPROEA_SPRG1 = 0x111, /* R/W SPR General 1 */
- SPROEA_SPRG2 = 0x112, /* R/W SPR General 2 */
- SPROEA_SPRG3 = 0x113, /* R/W SPR General 3 */
- SPROEA_ASR = 0x118, /* R/W Address Space Register (64-bit only) */
- SPROEA_EAR = 0x11a, /* R/W External Access Register */
- SPROEA_PVR = 0x11f, /* R Processor Version Number */
- SPROEA_IBAT0U = 0x210, /* R/W Instruction BAT 0 Upper */
- SPROEA_IBAT0L = 0x211, /* R/W Instruction BAT 0 Lower */
- SPROEA_IBAT1U = 0x212, /* R/W Instruction BAT 1 Upper */
- SPROEA_IBAT1L = 0x213, /* R/W Instruction BAT 1 Lower */
- SPROEA_IBAT2U = 0x214, /* R/W Instruction BAT 2 Upper */
- SPROEA_IBAT2L = 0x215, /* R/W Instruction BAT 2 Lower */
- SPROEA_IBAT3U = 0x216, /* R/W Instruction BAT 3 Upper */
- SPROEA_IBAT3L = 0x217, /* R/W Instruction BAT 3 Lower */
- SPROEA_DBAT0U = 0x218, /* R/W Data BAT 0 Upper */
- SPROEA_DBAT0L = 0x219, /* R/W Data BAT 0 Lower */
- SPROEA_DBAT1U = 0x21a, /* R/W Data BAT 1 Upper */
- SPROEA_DBAT1L = 0x21b, /* R/W Data BAT 1 Lower */
- SPROEA_DBAT2U = 0x21c, /* R/W Data BAT 2 Upper */
- SPROEA_DBAT2L = 0x21d, /* R/W Data BAT 2 Lower */
- SPROEA_DBAT3U = 0x21e, /* R/W Data BAT 3 Upper */
- SPROEA_DBAT3L = 0x21f, /* R/W Data BAT 3 Lower */
- SPROEA_DABR = 0x3f5, /* R/W Data Address Breakpoint Register */
+ SPROEA_DSISR = 0x012, /* R/W DSI Status Register */
+ SPROEA_DAR = 0x013, /* R/W Data Address Register */
+ SPROEA_DEC = 0x016, /* R/W Decrementer Register */
+ SPROEA_SDR1 = 0x019, /* R/W Page Table Configuration */
+ SPROEA_SRR0 = 0x01a, /* R/W Machine Status Save/Restore Register 0 */
+ SPROEA_SRR1 = 0x01b, /* R/W Machine Status Save/Restore Register 1 */
+ SPROEA_SPRG0 = 0x110, /* R/W SPR General 0 */
+ SPROEA_SPRG1 = 0x111, /* R/W SPR General 1 */
+ SPROEA_SPRG2 = 0x112, /* R/W SPR General 2 */
+ SPROEA_SPRG3 = 0x113, /* R/W SPR General 3 */
+ SPROEA_ASR = 0x118, /* R/W Address Space Register (64-bit only) */
+ SPROEA_EAR = 0x11a, /* R/W External Access Register */
+ SPROEA_PVR = 0x11f, /* R Processor Version Number */
+ SPROEA_IBAT0U = 0x210, /* R/W Instruction BAT 0 Upper */
+ SPROEA_IBAT0L = 0x211, /* R/W Instruction BAT 0 Lower */
+ SPROEA_IBAT1U = 0x212, /* R/W Instruction BAT 1 Upper */
+ SPROEA_IBAT1L = 0x213, /* R/W Instruction BAT 1 Lower */
+ SPROEA_IBAT2U = 0x214, /* R/W Instruction BAT 2 Upper */
+ SPROEA_IBAT2L = 0x215, /* R/W Instruction BAT 2 Lower */
+ SPROEA_IBAT3U = 0x216, /* R/W Instruction BAT 3 Upper */
+ SPROEA_IBAT3L = 0x217, /* R/W Instruction BAT 3 Lower */
+ SPROEA_DBAT0U = 0x218, /* R/W Data BAT 0 Upper */
+ SPROEA_DBAT0L = 0x219, /* R/W Data BAT 0 Lower */
+ SPROEA_DBAT1U = 0x21a, /* R/W Data BAT 1 Upper */
+ SPROEA_DBAT1L = 0x21b, /* R/W Data BAT 1 Lower */
+ SPROEA_DBAT2U = 0x21c, /* R/W Data BAT 2 Upper */
+ SPROEA_DBAT2L = 0x21d, /* R/W Data BAT 2 Lower */
+ SPROEA_DBAT3U = 0x21e, /* R/W Data BAT 3 Upper */
+ SPROEA_DBAT3L = 0x21f, /* R/W Data BAT 3 Lower */
+ SPROEA_DABR = 0x3f5, /* R/W Data Address Breakpoint Register */
/* PowerPC 4XX SPR register indexes */
- SPR4XX_SRR0 = 0x01a, /* R/W 403GA Machine Status Save/Restore Register 0 */
- SPR4XX_SRR1 = 0x01b, /* R/W 403GA Machine Status Save/Restore Register 1 */
- SPR4XX_SPRG0 = 0x110, /* R/W 403GA SPR General 0 */
- SPR4XX_SPRG1 = 0x111, /* R/W 403GA SPR General 1 */
- SPR4XX_SPRG2 = 0x112, /* R/W 403GA SPR General 2 */
- SPR4XX_SPRG3 = 0x113, /* R/W 403GA SPR General 3 */
- SPR4XX_PVR = 0x11f, /* R 403GA Processor Version Number */
- SPR4XX_PID = 0x3b1, /* R/W 403GCX Process ID */
- SPR4XX_SGR = 0x3b9, /* R/W 403GCX Storage Guarded Register */
- SPR4XX_DCWR = 0x3ba, /* R/W 403GCX Data Cache Write Through */
- SPR4XX_TBHU = 0x3cc, /* R/W 403GCX Time Base High User-mode */
- SPR4XX_TBLU = 0x3cd, /* R/W 403GCX Time Base Low User-mode */
- SPR4XX_ICDBDR = 0x3d3, /* R 403GA 406GA Instruction Cache Debug Data Register */
- SPR4XX_ESR = 0x3d4, /* R/W 403GA 406GA Exception Syndrome Register */
- SPR4XX_DEAR = 0x3d5, /* R 403GA 406GA Data Exception Address Register */
- SPR4XX_EVPR = 0x3d6, /* R/W 403GA 406GA Exception Vector Prefix Register */
- SPR4XX_CDBCR = 0x3d7, /* R/W 403GA 406GA Cache Debug Control Register */
- SPR4XX_TSR = 0x3d8, /* R/C 403GA 406GA Timer Status Register */
- SPR4XX_TCR = 0x3da, /* R/W 403GA 406GA Timer Control Register */
- SPR4XX_PIT = 0x3db, /* R/W 403GA 406GA Programmable Interval Timer */
- SPR4XX_TBHI = 0x3dc, /* R/W 403GA 406GA Time Base High */
- SPR4XX_TBLO = 0x3dd, /* R/W 403GA 406GA Time Base Low */
- SPR4XX_SRR2 = 0x3de, /* R/W 403GA 406GA Machine Status Save/Restore Register 2 */
- SPR4XX_SRR3 = 0x3df, /* R/W 403GA 406GA Machine Status Save/Restore Register 3 */
- SPR4XX_DBSR = 0x3f0, /* R/C 403GA 406GA Debug Status Register */
- SPR4XX_DBCR = 0x3f2, /* R/W 403GA 406GA Debug Control Register */
- SPR4XX_IAC1 = 0x3f4, /* R/W 403GA 406GA Instruction Address Compare 1 */
- SPR4XX_IAC2 = 0x3f5, /* R/W 403GA 406GA Instruction Address Compare 2 */
- SPR4XX_DAC1 = 0x3f6, /* R/W 403GA 406GA Data Address Compare 1 */
- SPR4XX_DAC2 = 0x3f7, /* R/W 403GA 406GA Data Address Compare 2 */
- SPR4XX_DCCR = 0x3fa, /* R/W 403GA 406GA Data Cache Cacheability Register */
- SPR4XX_ICCR = 0x3fb, /* R/W 403GA 406GA Instruction Cache Cacheability Registe */
- SPR4XX_PBL1 = 0x3fc, /* R/W 403GA 406GA Protection Bound Lower 1 */
- SPR4XX_PBU1 = 0x3fd, /* R/W 403GA 406GA Protection Bound Upper 1 */
- SPR4XX_PBL2 = 0x3fe, /* R/W 403GA 406GA Protection Bound Lower 2 */
- SPR4XX_PBU2 = 0x3ff, /* R/W 403GA 406GA Protection Bound Upper 2 */
+ SPR4XX_SRR0 = 0x01a, /* R/W 403GA Machine Status Save/Restore Register 0 */
+ SPR4XX_SRR1 = 0x01b, /* R/W 403GA Machine Status Save/Restore Register 1 */
+ SPR4XX_SPRG0 = 0x110, /* R/W 403GA SPR General 0 */
+ SPR4XX_SPRG1 = 0x111, /* R/W 403GA SPR General 1 */
+ SPR4XX_SPRG2 = 0x112, /* R/W 403GA SPR General 2 */
+ SPR4XX_SPRG3 = 0x113, /* R/W 403GA SPR General 3 */
+ SPR4XX_PVR = 0x11f, /* R 403GA Processor Version Number */
+ SPR4XX_PID = 0x3b1, /* R/W 403GCX Process ID */
+ SPR4XX_SGR = 0x3b9, /* R/W 403GCX Storage Guarded Register */
+ SPR4XX_DCWR = 0x3ba, /* R/W 403GCX Data Cache Write Through */
+ SPR4XX_TBHU = 0x3cc, /* R/W 403GCX Time Base High User-mode */
+ SPR4XX_TBLU = 0x3cd, /* R/W 403GCX Time Base Low User-mode */
+ SPR4XX_ICDBDR = 0x3d3, /* R 403GA 406GA Instruction Cache Debug Data Register */
+ SPR4XX_ESR = 0x3d4, /* R/W 403GA 406GA Exception Syndrome Register */
+ SPR4XX_DEAR = 0x3d5, /* R 403GA 406GA Data Exception Address Register */
+ SPR4XX_EVPR = 0x3d6, /* R/W 403GA 406GA Exception Vector Prefix Register */
+ SPR4XX_CDBCR = 0x3d7, /* R/W 403GA 406GA Cache Debug Control Register */
+ SPR4XX_TSR = 0x3d8, /* R/C 403GA 406GA Timer Status Register */
+ SPR4XX_TCR = 0x3da, /* R/W 403GA 406GA Timer Control Register */
+ SPR4XX_PIT = 0x3db, /* R/W 403GA 406GA Programmable Interval Timer */
+ SPR4XX_TBHI = 0x3dc, /* R/W 403GA 406GA Time Base High */
+ SPR4XX_TBLO = 0x3dd, /* R/W 403GA 406GA Time Base Low */
+ SPR4XX_SRR2 = 0x3de, /* R/W 403GA 406GA Machine Status Save/Restore Register 2 */
+ SPR4XX_SRR3 = 0x3df, /* R/W 403GA 406GA Machine Status Save/Restore Register 3 */
+ SPR4XX_DBSR = 0x3f0, /* R/C 403GA 406GA Debug Status Register */
+ SPR4XX_DBCR = 0x3f2, /* R/W 403GA 406GA Debug Control Register */
+ SPR4XX_IAC1 = 0x3f4, /* R/W 403GA 406GA Instruction Address Compare 1 */
+ SPR4XX_IAC2 = 0x3f5, /* R/W 403GA 406GA Instruction Address Compare 2 */
+ SPR4XX_DAC1 = 0x3f6, /* R/W 403GA 406GA Data Address Compare 1 */
+ SPR4XX_DAC2 = 0x3f7, /* R/W 403GA 406GA Data Address Compare 2 */
+ SPR4XX_DCCR = 0x3fa, /* R/W 403GA 406GA Data Cache Cacheability Register */
+ SPR4XX_ICCR = 0x3fb, /* R/W 403GA 406GA Instruction Cache Cacheability Registe */
+ SPR4XX_PBL1 = 0x3fc, /* R/W 403GA 406GA Protection Bound Lower 1 */
+ SPR4XX_PBU1 = 0x3fd, /* R/W 403GA 406GA Protection Bound Upper 1 */
+ SPR4XX_PBL2 = 0x3fe, /* R/W 403GA 406GA Protection Bound Lower 2 */
+ SPR4XX_PBU2 = 0x3ff, /* R/W 403GA 406GA Protection Bound Upper 2 */
/* PowerPC 602 SPR register indexes */
- SPR602_TCR = 0x3d8, /* 602 */
- SPR602_IBR = 0x3da, /* 602 */
- SPR602_ESASRR = 0x3db, /* 602 */
- SPR602_SEBR = 0x3de, /* 602 */
- SPR602_SER = 0x3df, /* 602 */
- SPR602_SP = 0x3fd, /* 602 */
- SPR602_LT = 0x3fe, /* 602 */
+ SPR602_TCR = 0x3d8, /* 602 */
+ SPR602_IBR = 0x3da, /* 602 */
+ SPR602_ESASRR = 0x3db, /* 602 */
+ SPR602_SEBR = 0x3de, /* 602 */
+ SPR602_SER = 0x3df, /* 602 */
+ SPR602_SP = 0x3fd, /* 602 */
+ SPR602_LT = 0x3fe, /* 602 */
/* PowerPC 603 SPR register indexes */
- SPR603_TBL_R = 0x10c, /* R 603 Time Base Low (Read-only) */
- SPR603_TBU_R = 0x10d, /* R 603 Time Base High (Read-only) */
- SPR603_TBL_W = 0x11c, /* W 603 Time Base Low (Write-only) */
- SPR603_TBU_W = 0x11d, /* W 603 Time Base Hight (Write-only) */
- SPR603_DMISS = 0x3d0, /* R 603 Data TLB Miss Address Register */
- SPR603_DCMP = 0x3d1, /* R 603 Data TLB Compare Register */
- SPR603_HASH1 = 0x3d2, /* R 603 Primary Hash Address Register */
- SPR603_HASH2 = 0x3d3, /* R 603 Secondary Hash Address Register */
- SPR603_IMISS = 0x3d4, /* R 603 Instruction TLB Miss Address Register */
- SPR603_ICMP = 0x3d5, /* R 603 Instruction TLB Compare Register */
- SPR603_RPA = 0x3d6, /* R/W 603 Required Physical Address Register */
- SPR603_HID0 = 0x3f0, /* R/W 603 Hardware Implementation Register 0 */
- SPR603_HID1 = 0x3f1, /* R/W 603 Hardware Implementation Register 1 */
- SPR603_IABR = 0x3f2, /* R/W 603 Instruction Address Breakpoint Register */
- SPR603_HID2 = 0x3f3 /* R/W 603 */
+ SPR603_TBL_R = 0x10c, /* R 603 Time Base Low (Read-only) */
+ SPR603_TBU_R = 0x10d, /* R 603 Time Base High (Read-only) */
+ SPR603_TBL_W = 0x11c, /* W 603 Time Base Low (Write-only) */
+ SPR603_TBU_W = 0x11d, /* W 603 Time Base Hight (Write-only) */
+ SPR603_DMISS = 0x3d0, /* R 603 Data TLB Miss Address Register */
+ SPR603_DCMP = 0x3d1, /* R 603 Data TLB Compare Register */
+ SPR603_HASH1 = 0x3d2, /* R 603 Primary Hash Address Register */
+ SPR603_HASH2 = 0x3d3, /* R 603 Secondary Hash Address Register */
+ SPR603_IMISS = 0x3d4, /* R 603 Instruction TLB Miss Address Register */
+ SPR603_ICMP = 0x3d5, /* R 603 Instruction TLB Compare Register */
+ SPR603_RPA = 0x3d6, /* R/W 603 Required Physical Address Register */
+ SPR603_HID0 = 0x3f0, /* R/W 603 Hardware Implementation Register 0 */
+ SPR603_HID1 = 0x3f1, /* R/W 603 Hardware Implementation Register 1 */
+ SPR603_IABR = 0x3f2, /* R/W 603 Instruction Address Breakpoint Register */
+ SPR603_HID2 = 0x3f3 /* R/W 603 */
};
/* PowerPC 4XX DCR register indexes */
enum
{
- DCR4XX_EXISR = 0x040, /* external interrupt status */
- DCR4XX_EXIER = 0x042, /* external interrupt enable */
- DCR4XX_BR0 = 0x080, /* bank */
- DCR4XX_BR1 = 0x081, /* bank */
- DCR4XX_BR2 = 0x082, /* bank */
- DCR4XX_BR3 = 0x083, /* bank */
- DCR4XX_BR4 = 0x084, /* bank */
- DCR4XX_BR5 = 0x085, /* bank */
- DCR4XX_BR6 = 0x086, /* bank */
- DCR4XX_BR7 = 0x087, /* bank */
- DCR4XX_BEAR = 0x090, /* bus error address */
- DCR4XX_BESR = 0x091, /* bus error syndrome */
- DCR4XX_IOCR = 0x0a0, /* io configuration */
- DCR4XX_DMACR0 = 0x0c0, /* dma channel control */
- DCR4XX_DMACT0 = 0x0c1, /* dma destination address */
- DCR4XX_DMADA0 = 0x0c2, /* dma destination address */
- DCR4XX_DMASA0 = 0x0c3, /* dma source address */
- DCR4XX_DMACC0 = 0x0c4, /* dma chained count */
- DCR4XX_DMACR1 = 0x0c8, /* dma channel control */
- DCR4XX_DMACT1 = 0x0c9, /* dma destination address */
- DCR4XX_DMADA1 = 0x0ca, /* dma destination address */
- DCR4XX_DMASA1 = 0x0cb, /* dma source address */
- DCR4XX_DMACC1 = 0x0cc, /* dma chained count */
- DCR4XX_DMACR2 = 0x0d0, /* dma channel control */
- DCR4XX_DMACT2 = 0x0d1, /* dma destination address */
- DCR4XX_DMADA2 = 0x0d2, /* dma source address */
- DCR4XX_DMASA2 = 0x0d3, /* dma source address */
- DCR4XX_DMACC2 = 0x0d4, /* dma chained count */
- DCR4XX_DMACR3 = 0x0d8, /* dma channel control */
- DCR4XX_DMACT3 = 0x0d9, /* dma destination address */
- DCR4XX_DMADA3 = 0x0da, /* dma source address */
- DCR4XX_DMASA3 = 0x0db, /* dma source address */
- DCR4XX_DMACC3 = 0x0dc, /* dma chained count */
- DCR4XX_DMASR = 0x0e0 /* dma status */
+ DCR4XX_EXISR = 0x040, /* external interrupt status */
+ DCR4XX_EXIER = 0x042, /* external interrupt enable */
+ DCR4XX_BR0 = 0x080, /* bank */
+ DCR4XX_BR1 = 0x081, /* bank */
+ DCR4XX_BR2 = 0x082, /* bank */
+ DCR4XX_BR3 = 0x083, /* bank */
+ DCR4XX_BR4 = 0x084, /* bank */
+ DCR4XX_BR5 = 0x085, /* bank */
+ DCR4XX_BR6 = 0x086, /* bank */
+ DCR4XX_BR7 = 0x087, /* bank */
+ DCR4XX_BEAR = 0x090, /* bus error address */
+ DCR4XX_BESR = 0x091, /* bus error syndrome */
+ DCR4XX_IOCR = 0x0a0, /* io configuration */
+ DCR4XX_DMACR0 = 0x0c0, /* dma channel control */
+ DCR4XX_DMACT0 = 0x0c1, /* dma destination address */
+ DCR4XX_DMADA0 = 0x0c2, /* dma destination address */
+ DCR4XX_DMASA0 = 0x0c3, /* dma source address */
+ DCR4XX_DMACC0 = 0x0c4, /* dma chained count */
+ DCR4XX_DMACR1 = 0x0c8, /* dma channel control */
+ DCR4XX_DMACT1 = 0x0c9, /* dma destination address */
+ DCR4XX_DMADA1 = 0x0ca, /* dma destination address */
+ DCR4XX_DMASA1 = 0x0cb, /* dma source address */
+ DCR4XX_DMACC1 = 0x0cc, /* dma chained count */
+ DCR4XX_DMACR2 = 0x0d0, /* dma channel control */
+ DCR4XX_DMACT2 = 0x0d1, /* dma destination address */
+ DCR4XX_DMADA2 = 0x0d2, /* dma source address */
+ DCR4XX_DMASA2 = 0x0d3, /* dma source address */
+ DCR4XX_DMACC2 = 0x0d4, /* dma chained count */
+ DCR4XX_DMACR3 = 0x0d8, /* dma channel control */
+ DCR4XX_DMACT3 = 0x0d9, /* dma destination address */
+ DCR4XX_DMADA3 = 0x0da, /* dma source address */
+ DCR4XX_DMASA3 = 0x0db, /* dma source address */
+ DCR4XX_DMACC3 = 0x0dc, /* dma chained count */
+ DCR4XX_DMASR = 0x0e0 /* dma status */
};
/* PowerPC 4XX SPU register indexes */
enum
{
- SPU4XX_LINE_STATUS = 0x00,
- SPU4XX_HANDSHAKE_STATUS = 0x02,
- SPU4XX_BAUD_DIVISOR_H = 0x04,
- SPU4XX_BAUD_DIVISOR_L = 0x05,
- SPU4XX_CONTROL = 0x06,
- SPU4XX_RX_COMMAND = 0x07,
- SPU4XX_TX_COMMAND = 0x08,
- SPU4XX_BUFFER = 0x09
+ SPU4XX_LINE_STATUS = 0x00,
+ SPU4XX_HANDSHAKE_STATUS = 0x02,
+ SPU4XX_BAUD_DIVISOR_H = 0x04,
+ SPU4XX_BAUD_DIVISOR_L = 0x05,
+ SPU4XX_CONTROL = 0x06,
+ SPU4XX_RX_COMMAND = 0x07,
+ SPU4XX_TX_COMMAND = 0x08,
+ SPU4XX_BUFFER = 0x09
};
/* FPSCR register bits */
-#define FPSCR_FX 0x80000000
-#define FPSCR_FEX 0x40000000
-#define FPSCR_VX 0x20000000
-#define FPSCR_OX 0x10000000
-#define FPSCR_UX 0x08000000
-#define FPSCR_ZX 0x04000000
-#define FPSCR_XX 0x02000000
+#define FPSCR_FX 0x80000000
+#define FPSCR_FEX 0x40000000
+#define FPSCR_VX 0x20000000
+#define FPSCR_OX 0x10000000
+#define FPSCR_UX 0x08000000
+#define FPSCR_ZX 0x04000000
+#define FPSCR_XX 0x02000000
/* XER register bits */
-#define XER_SO 0x80000000
-#define XER_OV 0x40000000
-#define XER_CA 0x20000000
+#define XER_SO 0x80000000
+#define XER_OV 0x40000000
+#define XER_CA 0x20000000
/* Machine State Register bits - common */
-#define MSR_ILE 0x00010000 /* Interrupt Little Endian Mode */
-#define MSR_EE 0x00008000 /* External Interrupt Enable */
-#define MSR_PR 0x00004000 /* Problem State */
-#define MSR_ME 0x00001000 /* Machine Check Enable */
-#define MSR_LE 0x00000001 /* Little Endian */
+#define MSR_ILE 0x00010000 /* Interrupt Little Endian Mode */
+#define MSR_EE 0x00008000 /* External Interrupt Enable */
+#define MSR_PR 0x00004000 /* Problem State */
+#define MSR_ME 0x00001000 /* Machine Check Enable */
+#define MSR_LE 0x00000001 /* Little Endian */
/* Machine State Register bits - OEA */
-#define MSROEA_POW 0x00040000 /* Power Management Enable */
-#define MSROEA_FP 0x00002000 /* Floating Point Available */
-#define MSROEA_FE0 0x00000800 /* FP Exception Mode 0 */
-#define MSROEA_SE 0x00000400 /* Single Step Trace Enable */
-#define MSROEA_BE 0x00000200 /* Branch Trace Enable */
-#define MSROEA_FE1 0x00000100 /* FP Exception Mode 1 */
-#define MSROEA_IP 0x00000040 /* Interrupt Prefix */
-#define MSROEA_IR 0x00000020 /* Instruction Relocate */
-#define MSROEA_DR 0x00000010 /* Data Relocate */
-#define MSROEA_RI 0x00000002 /* Recoverable Interrupt Enable */
+#define MSROEA_POW 0x00040000 /* Power Management Enable */
+#define MSROEA_FP 0x00002000 /* Floating Point Available */
+#define MSROEA_FE0 0x00000800 /* FP Exception Mode 0 */
+#define MSROEA_SE 0x00000400 /* Single Step Trace Enable */
+#define MSROEA_BE 0x00000200 /* Branch Trace Enable */
+#define MSROEA_FE1 0x00000100 /* FP Exception Mode 1 */
+#define MSROEA_IP 0x00000040 /* Interrupt Prefix */
+#define MSROEA_IR 0x00000020 /* Instruction Relocate */
+#define MSROEA_DR 0x00000010 /* Data Relocate */
+#define MSROEA_RI 0x00000002 /* Recoverable Interrupt Enable */
/* Machine State Register bits - 4XX */
-#define MSR4XX_WE 0x00040000 /* Wait State Enable */
-#define MSR4XX_CE 0x00020000 /* Critical Interrupt Enable */
-#define MSR4XX_DE 0x00000200 /* Debug Exception Enable */
-#define MSR4XX_PE 0x00000008 /* Protection Enable (reserved for others) */
-#define MSR4XX_PX 0x00000004 /* Protection Exclusive Mode (reserved for others) */
+#define MSR4XX_WE 0x00040000 /* Wait State Enable */
+#define MSR4XX_CE 0x00020000 /* Critical Interrupt Enable */
+#define MSR4XX_DE 0x00000200 /* Debug Exception Enable */
+#define MSR4XX_PE 0x00000008 /* Protection Enable (reserved for others) */
+#define MSR4XX_PX 0x00000004 /* Protection Exclusive Mode (reserved for others) */
/* Machine State Register bits - 602 */
-#define MSR602_AP 0x00800000 /* Access privilege state */
-#define MSR602_SA 0x00400000 /* Supervisor access mode */
+#define MSR602_AP 0x00800000 /* Access privilege state */
+#define MSR602_SA 0x00400000 /* Supervisor access mode */
/* Machine State Register bits - 603 */
-#define MSR603_TGPR 0x00020000 /* Temporary GPR Remapping */
+#define MSR603_TGPR 0x00020000 /* Temporary GPR Remapping */
/* DSISR bits for DSI/alignment exceptions */
-#define DSISR_DIRECT 0x00000001 /* DSI: direct-store exception? */
-#define DSISR_NOT_FOUND 0x00000002 /* DSI: not found in HTEG or DBAT */
-#define DSISR_PROTECTED 0x00000010 /* DSI: exception due to protection */
-#define DSISR_CACHE_ERROR 0x00000020 /* DSI: operation on incorrect cache type */
-#define DSISR_STORE 0x00000040 /* DSI: store (1) or load (0) */
-#define DSISR_DABR 0x00000200 /* DSI: DABR match occurred */
-#define DSISR_NO_SEGMENT 0x00000400 /* DSI: no segment match found (64-bit only) */
-#define DSISR_INVALID_ECWX 0x00000800 /* DSI: ECIWX or ECOWX used with EAR[E] = 0 */
-#define DSISR_INSTRUCTION 0xfffff000 /* align: instruction decoding bits */
+#define DSISR_DIRECT 0x00000001 /* DSI: direct-store exception? */
+#define DSISR_NOT_FOUND 0x00000002 /* DSI: not found in HTEG or DBAT */
+#define DSISR_PROTECTED 0x00000010 /* DSI: exception due to protection */
+#define DSISR_CACHE_ERROR 0x00000020 /* DSI: operation on incorrect cache type */
+#define DSISR_STORE 0x00000040 /* DSI: store (1) or load (0) */
+#define DSISR_DABR 0x00000200 /* DSI: DABR match occurred */
+#define DSISR_NO_SEGMENT 0x00000400 /* DSI: no segment match found (64-bit only) */
+#define DSISR_INVALID_ECWX 0x00000800 /* DSI: ECIWX or ECOWX used with EAR[E] = 0 */
+#define DSISR_INSTRUCTION 0xfffff000 /* align: instruction decoding bits */
/* PowerPC 4XX IRQ bits */
-#define PPC4XX_IRQ_BIT_CRITICAL (0x80000000 >> 0)
-#define PPC4XX_IRQ_BIT_SPUR (0x80000000 >> 4)
-#define PPC4XX_IRQ_BIT_SPUT (0x80000000 >> 5)
-#define PPC4XX_IRQ_BIT_JTAGR (0x80000000 >> 6)
-#define PPC4XX_IRQ_BIT_JTAGT (0x80000000 >> 7)
-#define PPC4XX_IRQ_BIT_DMA0 (0x80000000 >> 8)
-#define PPC4XX_IRQ_BIT_DMA1 (0x80000000 >> 9)
-#define PPC4XX_IRQ_BIT_DMA2 (0x80000000 >> 10)
-#define PPC4XX_IRQ_BIT_DMA3 (0x80000000 >> 11)
-#define PPC4XX_IRQ_BIT_EXT0 (0x80000000 >> 27)
-#define PPC4XX_IRQ_BIT_EXT1 (0x80000000 >> 28)
-#define PPC4XX_IRQ_BIT_EXT2 (0x80000000 >> 29)
-#define PPC4XX_IRQ_BIT_EXT3 (0x80000000 >> 30)
-#define PPC4XX_IRQ_BIT_EXT4 (0x80000000 >> 31)
-
-#define PPC4XX_IRQ_BIT_EXT(n) (PPC4XX_IRQ_BIT_EXT0 >> (n))
-#define PPC4XX_IRQ_BIT_DMA(n) (PPC4XX_IRQ_BIT_DMA0 >> (n))
+#define PPC4XX_IRQ_BIT_CRITICAL (0x80000000 >> 0)
+#define PPC4XX_IRQ_BIT_SPUR (0x80000000 >> 4)
+#define PPC4XX_IRQ_BIT_SPUT (0x80000000 >> 5)
+#define PPC4XX_IRQ_BIT_JTAGR (0x80000000 >> 6)
+#define PPC4XX_IRQ_BIT_JTAGT (0x80000000 >> 7)
+#define PPC4XX_IRQ_BIT_DMA0 (0x80000000 >> 8)
+#define PPC4XX_IRQ_BIT_DMA1 (0x80000000 >> 9)
+#define PPC4XX_IRQ_BIT_DMA2 (0x80000000 >> 10)
+#define PPC4XX_IRQ_BIT_DMA3 (0x80000000 >> 11)
+#define PPC4XX_IRQ_BIT_EXT0 (0x80000000 >> 27)
+#define PPC4XX_IRQ_BIT_EXT1 (0x80000000 >> 28)
+#define PPC4XX_IRQ_BIT_EXT2 (0x80000000 >> 29)
+#define PPC4XX_IRQ_BIT_EXT3 (0x80000000 >> 30)
+#define PPC4XX_IRQ_BIT_EXT4 (0x80000000 >> 31)
+
+#define PPC4XX_IRQ_BIT_EXT(n) (PPC4XX_IRQ_BIT_EXT0 >> (n))
+#define PPC4XX_IRQ_BIT_DMA(n) (PPC4XX_IRQ_BIT_DMA0 >> (n))
/* PowerPC 4XX DMA control bits */
-#define PPC4XX_DMACR_CE 0x80000000 /* channel enable */
-#define PPC4XX_DMACR_CIE 0x40000000 /* channel interrupt enable */
-#define PPC4XX_DMACR_TD 0x20000000 /* transfer direction */
-#define PPC4XX_DMACR_PL 0x10000000 /* peripheral location */
-#define PPC4XX_DMACR_PW_MASK 0x0c000000 /* peripheral width */
-#define PPC4XX_DMACR_DAI 0x02000000 /* destination address increment */
-#define PPC4XX_DMACR_SAI 0x01000000 /* source address increment */
-#define PPC4XX_DMACR_CP 0x00800000 /* channel priority */
-#define PPC4XX_DMACR_TM_MASK 0x00600000 /* transfer mode */
-#define PPC4XX_DMACR_PSC_MASK 0x00180000 /* peripheral setup cycles */
-#define PPC4XX_DMACR_PWC_MASK 0x0007e000 /* peripheral wait cycles */
-#define PPC4XX_DMACR_PHC_MASK 0x00001c00 /* peripheral hold cycles */
-#define PPC4XX_DMACR_ETD 0x00000200 /* end-of-transfer pin direction */
-#define PPC4XX_DMACR_TCE 0x00000100 /* terminal count enable */
-#define PPC4XX_DMACR_CH 0x00000080 /* chaining enable */
-#define PPC4XX_DMACR_BME 0x00000040 /* burst mode enable */
-#define PPC4XX_DMACR_ECE 0x00000020 /* EOT chain mode enable */
-#define PPC4XX_DMACR_TCD 0x00000010 /* TC chain mode disable */
-#define PPC4XX_DMACR_PCE 0x00000008
+#define PPC4XX_DMACR_CE 0x80000000 /* channel enable */
+#define PPC4XX_DMACR_CIE 0x40000000 /* channel interrupt enable */
+#define PPC4XX_DMACR_TD 0x20000000 /* transfer direction */
+#define PPC4XX_DMACR_PL 0x10000000 /* peripheral location */
+#define PPC4XX_DMACR_PW_MASK 0x0c000000 /* peripheral width */
+#define PPC4XX_DMACR_DAI 0x02000000 /* destination address increment */
+#define PPC4XX_DMACR_SAI 0x01000000 /* source address increment */
+#define PPC4XX_DMACR_CP 0x00800000 /* channel priority */
+#define PPC4XX_DMACR_TM_MASK 0x00600000 /* transfer mode */
+#define PPC4XX_DMACR_PSC_MASK 0x00180000 /* peripheral setup cycles */
+#define PPC4XX_DMACR_PWC_MASK 0x0007e000 /* peripheral wait cycles */
+#define PPC4XX_DMACR_PHC_MASK 0x00001c00 /* peripheral hold cycles */
+#define PPC4XX_DMACR_ETD 0x00000200 /* end-of-transfer pin direction */
+#define PPC4XX_DMACR_TCE 0x00000100 /* terminal count enable */
+#define PPC4XX_DMACR_CH 0x00000080 /* chaining enable */
+#define PPC4XX_DMACR_BME 0x00000040 /* burst mode enable */
+#define PPC4XX_DMACR_ECE 0x00000020 /* EOT chain mode enable */
+#define PPC4XX_DMACR_TCD 0x00000010 /* TC chain mode disable */
+#define PPC4XX_DMACR_PCE 0x00000008
/* PowerPC 4XX Timer control register bits */
-#define PPC4XX_TCR_WP_MASK 0xc0000000 /* watchdog period */
-#define PPC4XX_TCR_WRC_MASK 0x30000000 /* watchdog reset control */
-#define PPC4XX_TCR_WIE 0x08000000 /* watchdog interrupt enable */
-#define PPC4XX_TCR_PIE 0x04000000 /* PIT interrupt enable */
-#define PPC4XX_TCR_FP_MASK 0x03000000 /* FIT period */
-#define PPC4XX_TCR_FIE 0x00800000 /* FIT interrupt enable */
-#define PPC4XX_TCR_ARE 0x00400000 /* auto reload enable */
+#define PPC4XX_TCR_WP_MASK 0xc0000000 /* watchdog period */
+#define PPC4XX_TCR_WRC_MASK 0x30000000 /* watchdog reset control */
+#define PPC4XX_TCR_WIE 0x08000000 /* watchdog interrupt enable */
+#define PPC4XX_TCR_PIE 0x04000000 /* PIT interrupt enable */
+#define PPC4XX_TCR_FP_MASK 0x03000000 /* FIT period */
+#define PPC4XX_TCR_FIE 0x00800000 /* FIT interrupt enable */
+#define PPC4XX_TCR_ARE 0x00400000 /* auto reload enable */
/* PowerPC 4XX Timer status register bits */
-#define PPC4XX_TSR_ENW 0x80000000 /* enable next watchdog */
-#define PPC4XX_TSR_WIS 0x40000000 /* watchdog interrupt status */
-#define PPC4XX_TSR_WRS_MASK 0x30000000 /* watchdog reset status */
-#define PPC4XX_TSR_PIS 0x08000000 /* PIT interrupt status */
-#define PPC4XX_TSR_FIS 0x04000000 /* FIT interrupt status */
+#define PPC4XX_TSR_ENW 0x80000000 /* enable next watchdog */
+#define PPC4XX_TSR_WIS 0x40000000 /* watchdog interrupt status */
+#define PPC4XX_TSR_WRS_MASK 0x30000000 /* watchdog reset status */
+#define PPC4XX_TSR_PIS 0x08000000 /* PIT interrupt status */
+#define PPC4XX_TSR_FIS 0x04000000 /* FIT interrupt status */
/* instruction decoding masks */
-#define M_LI 0x03fffffc
-#define M_AA 0x00000002
-#define M_LK 0x00000001
-#define M_BO 0x03e00000
-#define M_BI 0x001f0000
-#define M_BD 0x0000fffc
-#define M_RT 0x03e00000
-#define M_RD 0x03e00000
-#define M_RS 0x03e00000
-#define M_RA 0x001f0000
-#define M_RB 0x0000f800
-#define M_CRFD 0x03800000
-#define M_L 0x00200000
-#define M_TO 0x03e00000
-#define M_D 0x0000ffff
-#define M_SIMM 0x0000ffff
-#define M_UIMM 0x0000ffff
-#define M_NB 0x0000f800
-#define M_SR 0x000f0000
-#define M_SH 0x0000f800
-#define M_CRFS 0x001c0000
-#define M_IMM 0x0000f000
-#define M_CRBD 0x03e00000
-#define M_RC 0x00000001
-#define M_CRBA 0x001f0000
-#define M_CRBB 0x0000f800
-#define M_SPR 0x001FF800
-#define M_TBR 0x001FF800
-#define M_CRM 0x000FF000
-#define M_DCR 0x001FF800
-#define M_FM 0x01FE0000
-#define M_OE 0x00000400
-#define M_REGC 0x000007c0
-#define M_MB 0x000007c0
-#define M_ME 0x0000003e
-#define M_XO 0x000007fe
+#define M_LI 0x03fffffc
+#define M_AA 0x00000002
+#define M_LK 0x00000001
+#define M_BO 0x03e00000
+#define M_BI 0x001f0000
+#define M_BD 0x0000fffc
+#define M_RT 0x03e00000
+#define M_RD 0x03e00000
+#define M_RS 0x03e00000
+#define M_RA 0x001f0000
+#define M_RB 0x0000f800
+#define M_CRFD 0x03800000
+#define M_L 0x00200000
+#define M_TO 0x03e00000
+#define M_D 0x0000ffff
+#define M_SIMM 0x0000ffff
+#define M_UIMM 0x0000ffff
+#define M_NB 0x0000f800
+#define M_SR 0x000f0000
+#define M_SH 0x0000f800
+#define M_CRFS 0x001c0000
+#define M_IMM 0x0000f000
+#define M_CRBD 0x03e00000
+#define M_RC 0x00000001
+#define M_CRBA 0x001f0000
+#define M_CRBB 0x0000f800
+#define M_SPR 0x001FF800
+#define M_TBR 0x001FF800
+#define M_CRM 0x000FF000
+#define M_DCR 0x001FF800
+#define M_FM 0x01FE0000
+#define M_OE 0x00000400
+#define M_REGC 0x000007c0
+#define M_MB 0x000007c0
+#define M_ME 0x0000003e
+#define M_XO 0x000007fe
@@ -437,11 +437,11 @@ enum
* in with the passed value.
*/
-#define D_OP(op) ((op & 0x3f) << 26)
-#define D_XO(xo) ((xo & 0x3ff) << 1)
-#define D_RT(r) ((r & 0x1f) << (31 - 10))
-#define D_RA(r) ((r & 0x1f) << (31 - 15))
-#define D_UIMM(u) (u & 0xffff)
+#define D_OP(op) ((op & 0x3f) << 26)
+#define D_XO(xo) ((xo & 0x3ff) << 1)
+#define D_RT(r) ((r & 0x1f) << (31 - 10))
+#define D_RA(r) ((r & 0x1f) << (31 - 15))
+#define D_UIMM(u) (u & 0xffff)
/*
* Macros to Get Field Values
@@ -450,38 +450,38 @@ enum
* unsigned values and do not perform any sign extensions.
*/
-#define G_RT(op) ((op & M_RT) >> (31 - 10))
-#define G_RD(op) ((op & M_RD) >> (31 - 10))
-#define G_RS(op) ((op & M_RS) >> (31 - 10))
-#define G_RA(op) ((op & M_RA) >> (31 - 15))
-#define G_RB(op) ((op & M_RB) >> (31 - 20))
-#define G_SIMM(op) (op & M_SIMM)
-#define G_UIMM(op) (op & M_UIMM)
-#define G_LI(op) ((op & M_LI) >> 2)
-#define G_BO(op) ((op & M_BO) >> (31 - 10))
-#define G_BI(op) ((op & M_BI) >> (31 - 15))
-#define G_BD(op) ((op & M_BD) >> 2)
-#define G_CRFD(op) ((op & M_CRFD) >> (31 - 8))
-#define G_L(op) ((op & M_L) >> (31 - 10))
-#define G_CRBD(op) ((op & M_CRBD) >> (31 - 10))
-#define G_CRBA(op) ((op & M_CRBA) >> (31 - 15))
-#define G_CRBB(op) ((op & M_CRBB) >> (31 - 20))
-#define G_REGC(op) ((op & M_REGC) >> (31 - 25))
-#define G_D(op) (op & M_D)
-#define G_NB(op) ((op & M_NB) >> (31 - 20))
-#define G_CRFS(op) ((op & M_CRFS) >> (31 - 13))
-#define G_SPR(op) ((op & M_SPR) >> (31 - 20))
-#define G_TBR(op) ((op & M_TBR) >> (31 - 20))
-#define G_DCR(op) ((op & M_DCR) >> (31 - 20))
-#define G_SR(op) ((op & M_SR) >> (31 - 15))
-#define G_CRM(op) ((op & M_CRM) >> (31 - 19))
-#define G_FM(op) ((op & M_FM) >> (31 - 14))
-#define G_IMM(op) ((op & M_IMM) >> (31 - 19))
-#define G_SH(op) ((op & M_SH) >> (31 - 20))
-#define G_MB(op) ((op & M_MB) >> (31 - 25))
-#define G_ME(op) ((op & M_ME) >> 1)
-#define G_TO(op) ((op & M_TO) >> (31 - 10))
-#define G_XO(op) ((op & M_XO) >> (31 - 30))
+#define G_RT(op) ((op & M_RT) >> (31 - 10))
+#define G_RD(op) ((op & M_RD) >> (31 - 10))
+#define G_RS(op) ((op & M_RS) >> (31 - 10))
+#define G_RA(op) ((op & M_RA) >> (31 - 15))
+#define G_RB(op) ((op & M_RB) >> (31 - 20))
+#define G_SIMM(op) (op & M_SIMM)
+#define G_UIMM(op) (op & M_UIMM)
+#define G_LI(op) ((op & M_LI) >> 2)
+#define G_BO(op) ((op & M_BO) >> (31 - 10))
+#define G_BI(op) ((op & M_BI) >> (31 - 15))
+#define G_BD(op) ((op & M_BD) >> 2)
+#define G_CRFD(op) ((op & M_CRFD) >> (31 - 8))
+#define G_L(op) ((op & M_L) >> (31 - 10))
+#define G_CRBD(op) ((op & M_CRBD) >> (31 - 10))
+#define G_CRBA(op) ((op & M_CRBA) >> (31 - 15))
+#define G_CRBB(op) ((op & M_CRBB) >> (31 - 20))
+#define G_REGC(op) ((op & M_REGC) >> (31 - 25))
+#define G_D(op) (op & M_D)
+#define G_NB(op) ((op & M_NB) >> (31 - 20))
+#define G_CRFS(op) ((op & M_CRFS) >> (31 - 13))
+#define G_SPR(op) ((op & M_SPR) >> (31 - 20))
+#define G_TBR(op) ((op & M_TBR) >> (31 - 20))
+#define G_DCR(op) ((op & M_DCR) >> (31 - 20))
+#define G_SR(op) ((op & M_SR) >> (31 - 15))
+#define G_CRM(op) ((op & M_CRM) >> (31 - 19))
+#define G_FM(op) ((op & M_FM) >> (31 - 14))
+#define G_IMM(op) ((op & M_IMM) >> (31 - 19))
+#define G_SH(op) ((op & M_SH) >> (31 - 20))
+#define G_MB(op) ((op & M_MB) >> (31 - 25))
+#define G_ME(op) ((op & M_ME) >> 1)
+#define G_TO(op) ((op & M_TO) >> (31 - 10))
+#define G_XO(op) ((op & M_XO) >> (31 - 30))
@@ -492,12 +492,12 @@ enum
/* PowerPC 4XX-specific serial port state */
struct ppc4xx_spu_state
{
- UINT8 regs[9];
- UINT8 txbuf;
- UINT8 rxbuf;
- emu_timer * timer;
- UINT8 rxbuffer[256];
- UINT32 rxin, rxout;
+ UINT8 regs[9];
+ UINT8 txbuf;
+ UINT8 rxbuf;
+ emu_timer * timer;
+ UINT8 rxbuffer[256];
+ UINT32 rxin, rxout;
ppc4xx_spu_tx_handler tx_handler;
};
@@ -510,64 +510,64 @@ struct ppcimp_state;
struct powerpc_state
{
/* core registers */
- UINT32 pc;
- int icount;
- UINT32 r[32];
- double f[32];
- UINT32 cr[8];
- UINT32 xerso;
- UINT32 fpscr;
- UINT32 msr;
- UINT32 sr[16];
- UINT32 spr[1024];
- UINT32 dcr[256];
+ UINT32 pc;
+ int icount;
+ UINT32 r[32];
+ double f[32];
+ UINT32 cr[8];
+ UINT32 xerso;
+ UINT32 fpscr;
+ UINT32 msr;
+ UINT32 sr[16];
+ UINT32 spr[1024];
+ UINT32 dcr[256];
/* parameters for calls */
- UINT32 param0;
- UINT32 param1;
+ UINT32 param0;
+ UINT32 param1;
/* MMU */
- vtlb_state * vtlb;
+ vtlb_state * vtlb;
/* architectural distinctions */
- powerpc_flavor flavor;
- UINT32 cap;
- UINT8 cache_line_size;
- UINT32 tb_divisor;
+ powerpc_flavor flavor;
+ UINT32 cap;
+ UINT8 cache_line_size;
+ UINT32 tb_divisor;
/* PowerPC 4xx-specific state */
ppc4xx_spu_state spu;
- emu_timer * fit_timer;
- emu_timer * pit_timer;
- emu_timer * wdog_timer;
- UINT32 pit_reload;
- UINT32 irqstate;
- emu_timer * buffered_dma_timer[4];
- int buffered_dma_rate[4];
+ emu_timer * fit_timer;
+ emu_timer * pit_timer;
+ emu_timer * wdog_timer;
+ UINT32 pit_reload;
+ UINT32 irqstate;
+ emu_timer * buffered_dma_timer[4];
+ int buffered_dma_rate[4];
/* PowerPC 603-specific state */
- UINT32 mmu603_cmp;
- UINT32 mmu603_hash[2];
- UINT32 mmu603_r[4];
+ UINT32 mmu603_cmp;
+ UINT32 mmu603_hash[2];
+ UINT32 mmu603_r[4];
/* internal stuff */
device_irq_acknowledge_callback irq_callback;
- legacy_cpu_device * device;
+ legacy_cpu_device * device;
address_space *program;
direct_read_data *direct;
- offs_t codexor;
- UINT32 irq_pending;
- UINT32 system_clock;
- UINT32 cpu_clock;
- UINT64 tb_zero_cycles;
- UINT64 dec_zero_cycles;
- emu_timer * decrementer_int_timer;
+ offs_t codexor;
+ UINT32 irq_pending;
+ UINT32 system_clock;
+ UINT32 cpu_clock;
+ UINT64 tb_zero_cycles;
+ UINT64 dec_zero_cycles;
+ emu_timer * decrementer_int_timer;
/* for use by specific implementations */
- ppcimp_state * impstate;
+ ppcimp_state * impstate;
- read32_device_func dcr_read_func;
- write32_device_func dcr_write_func;
+ read32_device_func dcr_read_func;
+ write32_device_func dcr_write_func;
ppc_dcstore_handler dcstore_handler;
diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c
index c44e48b3996..40d4ddfac99 100644
--- a/src/emu/cpu/powerpc/ppcdrc.c
+++ b/src/emu/cpu/powerpc/ppcdrc.c
@@ -34,18 +34,18 @@ extern offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op);
DEBUGGING
***************************************************************************/
-#define FORCE_C_BACKEND (0)
-#define LOG_UML (0)
-#define LOG_NATIVE (0)
+#define FORCE_C_BACKEND (0)
+#define LOG_UML (0)
+#define LOG_NATIVE (0)
-#define DISABLE_FLAG_OPTIMIZATIONS (0)
-#define DISABLE_FAST_REGISTERS (0)
-#define SINGLE_INSTRUCTION_MODE (0)
+#define DISABLE_FLAG_OPTIMIZATIONS (0)
+#define DISABLE_FAST_REGISTERS (0)
+#define SINGLE_INSTRUCTION_MODE (0)
-#define PRINTF_EXCEPTIONS (0)
-#define PRINTF_MMU (0)
+#define PRINTF_EXCEPTIONS (0)
+#define PRINTF_MMU (0)
-#define PROBE_ADDRESS ~0
+#define PROBE_ADDRESS ~0
@@ -54,30 +54,30 @@ extern offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op);
***************************************************************************/
/* map variables */
-#define MAPVAR_PC M0
-#define MAPVAR_CYCLES M1
-#define MAPVAR_DSISR M2
+#define MAPVAR_PC M0
+#define MAPVAR_CYCLES M1
+#define MAPVAR_DSISR M2
/* mode bits */
-#define MODE_LITTLE_ENDIAN 0x01
-#define MODE_DATA_TRANSLATION 0x02 /* OEA */
-#define MODE_PROTECTION 0x02 /* 4XX */
-#define MODE_USER 0x04
+#define MODE_LITTLE_ENDIAN 0x01
+#define MODE_DATA_TRANSLATION 0x02 /* OEA */
+#define MODE_PROTECTION 0x02 /* 4XX */
+#define MODE_USER 0x04
/* size of the execution code cache */
-#define CACHE_SIZE (32 * 1024 * 1024)
+#define CACHE_SIZE (32 * 1024 * 1024)
/* compilation boundaries -- how far back/forward does the analysis extend? */
-#define COMPILE_BACKWARDS_BYTES 128
-#define COMPILE_FORWARDS_BYTES 512
-#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4))
-#define COMPILE_MAX_SEQUENCE 64
+#define COMPILE_BACKWARDS_BYTES 128
+#define COMPILE_FORWARDS_BYTES 512
+#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4))
+#define COMPILE_MAX_SEQUENCE 64
/* exit codes */
-#define EXECUTE_OUT_OF_CYCLES 0
-#define EXECUTE_MISSING_CODE 1
-#define EXECUTE_UNMAPPED_CODE 2
-#define EXECUTE_RESET_CACHE 3
+#define EXECUTE_OUT_OF_CYCLES 0
+#define EXECUTE_MISSING_CODE 1
+#define EXECUTE_UNMAPPED_CODE 2
+#define EXECUTE_RESET_CACHE 3
@@ -85,42 +85,42 @@ extern offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op);
MACROS
***************************************************************************/
-#define R32(reg) ppc->impstate->regmap[reg]
-#define R32Z(reg) (((reg) == 0) ? parameter(0) : ppc->impstate->regmap[reg])
-#define F64(reg) ppc->impstate->fdregmap[reg]
-#define CR32(reg) mem(&ppc->cr[reg])
-#define FPSCR32 mem(&ppc->fpscr)
-#define MSR32 mem(&ppc->msr)
-#define XERSO32 mem(&ppc->xerso)
-#define SR32(reg) mem(&ppc->sr[reg])
-#define SPR32(reg) mem(&ppc->spr[reg])
+#define R32(reg) ppc->impstate->regmap[reg]
+#define R32Z(reg) (((reg) == 0) ? parameter(0) : ppc->impstate->regmap[reg])
+#define F64(reg) ppc->impstate->fdregmap[reg]
+#define CR32(reg) mem(&ppc->cr[reg])
+#define FPSCR32 mem(&ppc->fpscr)
+#define MSR32 mem(&ppc->msr)
+#define XERSO32 mem(&ppc->xerso)
+#define SR32(reg) mem(&ppc->sr[reg])
+#define SPR32(reg) mem(&ppc->spr[reg])
-#define CRMASK(reg) (0xf0000000 >> ((reg) * 4))
+#define CRMASK(reg) (0xf0000000 >> ((reg) * 4))
/* DSISR values for various addressing types */
-#define DSISR_IMM(op) ((0) | /* bits 15-16: cleared */ \
- ((((op) >> (31- 5)) & 0x01) << (31-17)) | /* bit 17: opcode bit 5 */ \
- ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \
- ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
- (0)) /* bits 27-31: undefined */
+#define DSISR_IMM(op) ((0) | /* bits 15-16: cleared */ \
+ ((((op) >> (31- 5)) & 0x01) << (31-17)) | /* bit 17: opcode bit 5 */ \
+ ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \
+ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
+ (0)) /* bits 27-31: undefined */
-#define DSISR_IMMU(op) ((0) | /* bits 15-16: cleared */ \
- ((((op) >> (31- 5)) & 0x01) << (31-17)) | /* bit 17: opcode bit 5 */ \
- ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \
- ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
- ((((op) >> (31-15)) & 0x1f) << (31-31))) /* bits 27-31: opcode bits 11-15 */
+#define DSISR_IMMU(op) ((0) | /* bits 15-16: cleared */ \
+ ((((op) >> (31- 5)) & 0x01) << (31-17)) | /* bit 17: opcode bit 5 */ \
+ ((((op) >> (31- 4)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 1-4 */ \
+ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
+ ((((op) >> (31-15)) & 0x1f) << (31-31))) /* bits 27-31: opcode bits 11-15 */
-#define DSISR_IDX(op) (((((op) >> (31-30)) & 0x03) << (31-16)) | /* bits 15-16: opcode bits 29-30 */ \
- ((((op) >> (31-25)) & 0x01) << (31-17)) | /* bit 17: opcode bit 25 */ \
- ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \
- ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
- (0)) /* bits 27-31: undefined */
+#define DSISR_IDX(op) (((((op) >> (31-30)) & 0x03) << (31-16)) | /* bits 15-16: opcode bits 29-30 */ \
+ ((((op) >> (31-25)) & 0x01) << (31-17)) | /* bit 17: opcode bit 25 */ \
+ ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \
+ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
+ (0)) /* bits 27-31: undefined */
-#define DSISR_IDXU(op) (((((op) >> (31-30)) & 0x03) << (31-16)) | /* bits 15-16: opcode bits 29-30 */ \
- ((((op) >> (31-25)) & 0x01) << (31-17)) | /* bit 17: opcode bit 25 */ \
- ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \
- ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
- ((((op) >> (31-15)) & 0x1f) << (31-31))) /* bits 27-31: opcode bits 11-15 */
+#define DSISR_IDXU(op) (((((op) >> (31-30)) & 0x03) << (31-16)) | /* bits 15-16: opcode bits 29-30 */ \
+ ((((op) >> (31-25)) & 0x01) << (31-17)) | /* bit 17: opcode bit 25 */ \
+ ((((op) >> (31-24)) & 0x0f) << (31-21)) | /* bits 18-21: opcode bits 21-24 */ \
+ ((((op) >> (31-10)) & 0x1f) << (31-26)) | /* bits 22-26: opcode bits 6-10 */ \
+ ((((op) >> (31-15)) & 0x1f) << (31-31))) /* bits 27-31: opcode bits 11-15 */
@@ -131,29 +131,29 @@ extern offs_t ppc_dasm_one(char *buffer, UINT32 pc, UINT32 op);
/* fast RAM info */
struct fast_ram_info
{
- offs_t start; /* start of the RAM block */
- offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
- void * base; /* base in memory where the RAM lives */
+ offs_t start; /* start of the RAM block */
+ offs_t end; /* end of the RAM block */
+ UINT8 readonly; /* TRUE if read-only */
+ void * base; /* base in memory where the RAM lives */
};
/* hotspot info */
struct hotspot_info
{
- offs_t pc; /* PC to consider */
- UINT32 opcode; /* required opcode at that PC */
- UINT32 cycles; /* number of cycles to eat when hit */
+ offs_t pc; /* PC to consider */
+ UINT32 opcode; /* required opcode at that PC */
+ UINT32 cycles; /* number of cycles to eat when hit */
};
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
- code_label labelnum; /* index for local labels */
+ UINT32 cycles; /* accumulated cycles */
+ UINT8 checkints; /* need to check interrupts before next instruction */
+ UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ code_label labelnum; /* index for local labels */
};
@@ -161,70 +161,70 @@ struct compiler_state
struct ppcimp_state
{
/* core state */
- drc_cache * cache; /* pointer to the DRC code cache */
- drcuml_state * drcuml; /* DRC UML generator state */
- ppc_frontend * drcfe; /* pointer to the DRC front-end state */
- UINT32 drcoptions; /* configurable DRC options */
+ drc_cache * cache; /* pointer to the DRC code cache */
+ drcuml_state * drcuml; /* DRC UML generator state */
+ ppc_frontend * drcfe; /* pointer to the DRC front-end state */
+ UINT32 drcoptions; /* configurable DRC options */
/* parameters for subroutines */
- UINT32 mode; /* current global mode */
- const char * format; /* format string for printing */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
- UINT32 updateaddr; /* update address storage */
- UINT32 swcount; /* counter for sw instructions */
- UINT32 tempaddr; /* temporary address storage */
- drcuml_ireg tempdata; /* temporary data storage */
- double fp0; /* floating point 0 */
+ UINT32 mode; /* current global mode */
+ const char * format; /* format string for printing */
+ UINT32 arg0; /* print_debug argument 1 */
+ UINT32 arg1; /* print_debug argument 2 */
+ UINT32 updateaddr; /* update address storage */
+ UINT32 swcount; /* counter for sw instructions */
+ UINT32 tempaddr; /* temporary address storage */
+ drcuml_ireg tempdata; /* temporary data storage */
+ double fp0; /* floating point 0 */
/* tables */
- UINT8 fpmode[4]; /* FPU mode table */
- UINT8 sz_cr_table[32]; /* SZ CR table */
- UINT8 cmp_cr_table[32]; /* CMP CR table */
- UINT8 cmpl_cr_table[32]; /* CMPL CR table */
- UINT8 fcmp_cr_table[32]; /* FCMP CR table */
+ UINT8 fpmode[4]; /* FPU mode table */
+ UINT8 sz_cr_table[32]; /* SZ CR table */
+ UINT8 cmp_cr_table[32]; /* CMP CR table */
+ UINT8 cmpl_cr_table[32]; /* CMPL CR table */
+ UINT8 fcmp_cr_table[32]; /* FCMP CR table */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
+ UINT8 cache_dirty; /* true if we need to flush the cache */
/* register mappings */
- parameter regmap[32]; /* parameter to register mappings for all 32 integer registers */
- parameter fdregmap[32]; /* parameter to register mappings for all 32 floating point registers */
+ parameter regmap[32]; /* parameter to register mappings for all 32 integer registers */
+ parameter fdregmap[32]; /* parameter to register mappings for all 32 floating point registers */
/* subroutines */
- code_handle * entry; /* entry point */
- code_handle * nocode; /* nocode exception handler */
- code_handle * out_of_cycles; /* out of cycles exception handler */
- code_handle * tlb_mismatch; /* tlb mismatch handler */
- code_handle * swap_tgpr; /* swap TGPR handler */
- code_handle * lsw[8][32]; /* lsw entries */
- code_handle * stsw[8][32]; /* stsw entries */
- code_handle * read8[8]; /* read byte */
- code_handle * write8[8]; /* write byte */
- code_handle * read16[8]; /* read half */
- code_handle * read16mask[8]; /* read half */
- code_handle * write16[8]; /* write half */
- code_handle * write16mask[8]; /* write half */
- code_handle * read32[8]; /* read word */
- code_handle * read32align[8]; /* read word aligned */
- code_handle * read32mask[8]; /* read word */
- code_handle * write32[8]; /* write word */
- code_handle * write32align[8]; /* write word aligned */
- code_handle * write32mask[8]; /* write word */
- code_handle * read64[8]; /* read double */
- code_handle * read64mask[8]; /* read double */
- code_handle * write64[8]; /* write double */
- code_handle * write64mask[8]; /* write double */
- code_handle * exception[EXCEPTION_COUNT]; /* array of exception handlers */
- code_handle * exception_norecover[EXCEPTION_COUNT]; /* array of exception handlers */
+ code_handle * entry; /* entry point */
+ code_handle * nocode; /* nocode exception handler */
+ code_handle * out_of_cycles; /* out of cycles exception handler */
+ code_handle * tlb_mismatch; /* tlb mismatch handler */
+ code_handle * swap_tgpr; /* swap TGPR handler */
+ code_handle * lsw[8][32]; /* lsw entries */
+ code_handle * stsw[8][32]; /* stsw entries */
+ code_handle * read8[8]; /* read byte */
+ code_handle * write8[8]; /* write byte */
+ code_handle * read16[8]; /* read half */
+ code_handle * read16mask[8]; /* read half */
+ code_handle * write16[8]; /* write half */
+ code_handle * write16mask[8]; /* write half */
+ code_handle * read32[8]; /* read word */
+ code_handle * read32align[8]; /* read word aligned */
+ code_handle * read32mask[8]; /* read word */
+ code_handle * write32[8]; /* write word */
+ code_handle * write32align[8]; /* write word aligned */
+ code_handle * write32mask[8]; /* write word */
+ code_handle * read64[8]; /* read double */
+ code_handle * read64mask[8]; /* read double */
+ code_handle * write64[8]; /* write double */
+ code_handle * write64mask[8]; /* write double */
+ code_handle * exception[EXCEPTION_COUNT]; /* array of exception handlers */
+ code_handle * exception_norecover[EXCEPTION_COUNT]; /* array of exception handlers */
/* fast RAM */
- UINT32 fastram_select;
- fast_ram_info fastram[PPC_MAX_FASTRAM];
+ UINT32 fastram_select;
+ fast_ram_info fastram[PPC_MAX_FASTRAM];
/* hotspots */
- UINT32 hotspot_select;
- hotspot_info hotspot[PPC_MAX_HOTSPOTS];
+ UINT32 hotspot_select;
+ hotspot_info hotspot[PPC_MAX_HOTSPOTS];
};
@@ -282,149 +282,149 @@ static const UINT8 fpmode_source[4] =
/* flag lookup table for SZ */
static const UINT8 sz_cr_table_source[32] =
{
- /* ..... */ 0x4,
- /* ....C */ 0x4,
- /* ...V. */ 0x4,
- /* ...VC */ 0x4,
- /* ..Z.. */ 0x2,
- /* ..Z.C */ 0x2,
- /* ..ZV. */ 0x2,
- /* ..ZVC */ 0x2,
- /* .S... */ 0x8,
- /* .S..C */ 0x8,
- /* .S.V. */ 0x8,
- /* .S.VC */ 0x8,
- /* .SZ.. */ 0x2,
- /* .SZ.C */ 0x2,
- /* .SZV. */ 0x2,
- /* .SZVC */ 0x2,
- /* U.... */ 0x4,
- /* U...C */ 0x4,
- /* U..V. */ 0x4,
- /* U..VC */ 0x4,
- /* U.Z.. */ 0x2,
- /* U.Z.C */ 0x2,
- /* U.ZV. */ 0x2,
- /* U.ZVC */ 0x2,
- /* US... */ 0x8,
- /* US..C */ 0x8,
- /* US.V. */ 0x8,
- /* US.VC */ 0x8,
- /* USZ.. */ 0x2,
- /* USZ.C */ 0x2,
- /* USZV. */ 0x2,
- /* USZVC */ 0x2
+ /* ..... */ 0x4,
+ /* ....C */ 0x4,
+ /* ...V. */ 0x4,
+ /* ...VC */ 0x4,
+ /* ..Z.. */ 0x2,
+ /* ..Z.C */ 0x2,
+ /* ..ZV. */ 0x2,
+ /* ..ZVC */ 0x2,
+ /* .S... */ 0x8,
+ /* .S..C */ 0x8,
+ /* .S.V. */ 0x8,
+ /* .S.VC */ 0x8,
+ /* .SZ.. */ 0x2,
+ /* .SZ.C */ 0x2,
+ /* .SZV. */ 0x2,
+ /* .SZVC */ 0x2,
+ /* U.... */ 0x4,
+ /* U...C */ 0x4,
+ /* U..V. */ 0x4,
+ /* U..VC */ 0x4,
+ /* U.Z.. */ 0x2,
+ /* U.Z.C */ 0x2,
+ /* U.ZV. */ 0x2,
+ /* U.ZVC */ 0x2,
+ /* US... */ 0x8,
+ /* US..C */ 0x8,
+ /* US.V. */ 0x8,
+ /* US.VC */ 0x8,
+ /* USZ.. */ 0x2,
+ /* USZ.C */ 0x2,
+ /* USZV. */ 0x2,
+ /* USZVC */ 0x2
};
/* flag lookup table for CMP */
static const UINT8 cmp_cr_table_source[32] =
{
- /* ..... */ 0x4,
- /* ....C */ 0x4,
- /* ...V. */ 0x8,
- /* ...VC */ 0x8,
- /* ..Z.. */ 0x2,
- /* ..Z.C */ 0x2,
- /* ..ZV. */ 0x2,
- /* ..ZVC */ 0x2,
- /* .S... */ 0x8,
- /* .S..C */ 0x8,
- /* .S.V. */ 0x4,
- /* .S.VC */ 0x4,
- /* .SZ.. */ 0x2,
- /* .SZ.C */ 0x2,
- /* .SZV. */ 0x2,
- /* .SZVC */ 0x2,
- /* U.... */ 0x4,
- /* U...C */ 0x4,
- /* U..V. */ 0x8,
- /* U..VC */ 0x8,
- /* U.Z.. */ 0x2,
- /* U.Z.C */ 0x2,
- /* U.ZV. */ 0x2,
- /* U.ZVC */ 0x2,
- /* US... */ 0x8,
- /* US..C */ 0x8,
- /* US.V. */ 0x4,
- /* US.VC */ 0x4,
- /* USZ.. */ 0x2,
- /* USZ.C */ 0x2,
- /* USZV. */ 0x2,
- /* USZVC */ 0x2
+ /* ..... */ 0x4,
+ /* ....C */ 0x4,
+ /* ...V. */ 0x8,
+ /* ...VC */ 0x8,
+ /* ..Z.. */ 0x2,
+ /* ..Z.C */ 0x2,
+ /* ..ZV. */ 0x2,
+ /* ..ZVC */ 0x2,
+ /* .S... */ 0x8,
+ /* .S..C */ 0x8,
+ /* .S.V. */ 0x4,
+ /* .S.VC */ 0x4,
+ /* .SZ.. */ 0x2,
+ /* .SZ.C */ 0x2,
+ /* .SZV. */ 0x2,
+ /* .SZVC */ 0x2,
+ /* U.... */ 0x4,
+ /* U...C */ 0x4,
+ /* U..V. */ 0x8,
+ /* U..VC */ 0x8,
+ /* U.Z.. */ 0x2,
+ /* U.Z.C */ 0x2,
+ /* U.ZV. */ 0x2,
+ /* U.ZVC */ 0x2,
+ /* US... */ 0x8,
+ /* US..C */ 0x8,
+ /* US.V. */ 0x4,
+ /* US.VC */ 0x4,
+ /* USZ.. */ 0x2,
+ /* USZ.C */ 0x2,
+ /* USZV. */ 0x2,
+ /* USZVC */ 0x2
};
/* flag lookup table for CMPL */
static const UINT8 cmpl_cr_table_source[32] =
{
- /* ..... */ 0x4,
- /* ....C */ 0x8,
- /* ...V. */ 0x4,
- /* ...VC */ 0x8,
- /* ..Z.. */ 0x2,
- /* ..Z.C */ 0x2,
- /* ..ZV. */ 0x2,
- /* ..ZVC */ 0x2,
- /* .S... */ 0x4,
- /* .S..C */ 0x8,
- /* .S.V. */ 0x4,
- /* .S.VC */ 0x8,
- /* .SZ.. */ 0x2,
- /* .SZ.C */ 0x2,
- /* .SZV. */ 0x2,
- /* .SZVC */ 0x2,
- /* U.... */ 0x4,
- /* U...C */ 0x8,
- /* U..V. */ 0x4,
- /* U..VC */ 0x8,
- /* U.Z.. */ 0x2,
- /* U.Z.C */ 0x2,
- /* U.ZV. */ 0x2,
- /* U.ZVC */ 0x2,
- /* US... */ 0x4,
- /* US..C */ 0x8,
- /* US.V. */ 0x4,
- /* US.VC */ 0x8,
- /* USZ.. */ 0x2,
- /* USZ.C */ 0x2,
- /* USZV. */ 0x2,
- /* USZVC */ 0x2
+ /* ..... */ 0x4,
+ /* ....C */ 0x8,
+ /* ...V. */ 0x4,
+ /* ...VC */ 0x8,
+ /* ..Z.. */ 0x2,
+ /* ..Z.C */ 0x2,
+ /* ..ZV. */ 0x2,
+ /* ..ZVC */ 0x2,
+ /* .S... */ 0x4,
+ /* .S..C */ 0x8,
+ /* .S.V. */ 0x4,
+ /* .S.VC */ 0x8,
+ /* .SZ.. */ 0x2,
+ /* .SZ.C */ 0x2,
+ /* .SZV. */ 0x2,
+ /* .SZVC */ 0x2,
+ /* U.... */ 0x4,
+ /* U...C */ 0x8,
+ /* U..V. */ 0x4,
+ /* U..VC */ 0x8,
+ /* U.Z.. */ 0x2,
+ /* U.Z.C */ 0x2,
+ /* U.ZV. */ 0x2,
+ /* U.ZVC */ 0x2,
+ /* US... */ 0x4,
+ /* US..C */ 0x8,
+ /* US.V. */ 0x4,
+ /* US.VC */ 0x8,
+ /* USZ.. */ 0x2,
+ /* USZ.C */ 0x2,
+ /* USZV. */ 0x2,
+ /* USZVC */ 0x2
};
/* flag lookup table for FCMP */
static const UINT8 fcmp_cr_table_source[32] =
{
- /* ..... */ 0x4,
- /* ....C */ 0x8,
- /* ...V. */ 0x4,
- /* ...VC */ 0x8,
- /* ..Z.. */ 0x2,
- /* ..Z.C */ 0xa,
- /* ..ZV. */ 0x2,
- /* ..ZVC */ 0xa,
- /* .S... */ 0x4,
- /* .S..C */ 0x8,
- /* .S.V. */ 0x4,
- /* .S.VC */ 0x8,
- /* .SZ.. */ 0x2,
- /* .SZ.C */ 0xa,
- /* .SZV. */ 0x2,
- /* .SZVC */ 0xa,
- /* U.... */ 0x5,
- /* U...C */ 0x9,
- /* U..V. */ 0x5,
- /* U..VC */ 0x9,
- /* U.Z.. */ 0x3,
- /* U.Z.C */ 0xb,
- /* U.ZV. */ 0x3,
- /* U.ZVC */ 0xb,
- /* US... */ 0x5,
- /* US..C */ 0x9,
- /* US.V. */ 0x5,
- /* US.VC */ 0x9,
- /* USZ.. */ 0x3,
- /* USZ.C */ 0xb,
- /* USZV. */ 0x3,
- /* USZVC */ 0xb
+ /* ..... */ 0x4,
+ /* ....C */ 0x8,
+ /* ...V. */ 0x4,
+ /* ...VC */ 0x8,
+ /* ..Z.. */ 0x2,
+ /* ..Z.C */ 0xa,
+ /* ..ZV. */ 0x2,
+ /* ..ZVC */ 0xa,
+ /* .S... */ 0x4,
+ /* .S..C */ 0x8,
+ /* .S.V. */ 0x4,
+ /* .S.VC */ 0x8,
+ /* .SZ.. */ 0x2,
+ /* .SZ.C */ 0xa,
+ /* .SZV. */ 0x2,
+ /* .SZVC */ 0xa,
+ /* U.... */ 0x5,
+ /* U...C */ 0x9,
+ /* U..V. */ 0x5,
+ /* U..VC */ 0x9,
+ /* U.Z.. */ 0x3,
+ /* U.Z.C */ 0xb,
+ /* U.ZV. */ 0x3,
+ /* U.ZVC */ 0xb,
+ /* US... */ 0x5,
+ /* US..C */ 0x9,
+ /* US.V. */ 0x5,
+ /* US.VC */ 0x9,
+ /* USZ.. */ 0x3,
+ /* USZ.C */ 0xb,
+ /* USZV. */ 0x3,
+ /* USZVC */ 0xb
};
@@ -437,15 +437,15 @@ INLINE powerpc_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == PPC403GA ||
- device->type() == PPC403GCX ||
- device->type() == PPC405GP ||
- device->type() == PPC601 ||
- device->type() == PPC602 ||
- device->type() == PPC603 ||
- device->type() == PPC603E ||
- device->type() == PPC603R ||
- device->type() == PPC604 ||
- device->type() == MPC8240);
+ device->type() == PPC403GCX ||
+ device->type() == PPC405GP ||
+ device->type() == PPC601 ||
+ device->type() == PPC602 ||
+ device->type() == PPC603 ||
+ device->type() == PPC603E ||
+ device->type() == PPC603R ||
+ device->type() == PPC604 ||
+ device->type() == MPC8240);
return *(powerpc_state **)downcast<legacy_cpu_device *>(device)->token();
}
@@ -767,23 +767,23 @@ static CPU_GET_INFO( ppcdrc )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(powerpc_state *); break;
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(powerpc_state *); break;
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc); break;
- case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppcdrc); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppcdrc); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppcdrc); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ppcdrc);break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(ppcdrc); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc); break;
+ case CPUINFO_FCT_INIT: /* provided per-CPU */ break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ppcdrc); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ppcdrc); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ppcdrc); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ppcdrc);break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(ppcdrc); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
/* --- everything else is handled generically --- */
- default: ppccom_get_info(ppc, state, info); break;
+ default: ppccom_get_info(ppc, state, info); break;
}
}
@@ -951,7 +951,7 @@ logerror("Compile %08X\n", pc);
/* add a code log entry */
if (LOG_UML)
- block->append_comment("-------------------------"); // comment
+ block->append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != NULL; seqlast = seqlast->next())
@@ -961,20 +961,20 @@ logerror("Compile %08X\n", pc);
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
if (override || !drcuml->hash_exists(mode, seqhead->pc))
- UML_HASH(block, mode, seqhead->pc); // hash mode,pc
+ UML_HASH(block, mode, seqhead->pc); // hash mode,pc
/* if we already have a hash, and this is the first sequence, assume that we */
/* are recompiling due to being out of sync and allow future overrides */
else if (seqhead == desclist)
{
override = TRUE;
- UML_HASH(block, mode, seqhead->pc); // hash mode,pc
+ UML_HASH(block, mode, seqhead->pc); // hash mode,pc
}
/* otherwise, redispatch to that fixed PC and skip the rest of the processing */
else
{
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
UML_HASHJMP(block, ppc->impstate->mode, seqhead->pc, *ppc->impstate->nocode);
// hashjmp <mode>,seqhead->pc,nocode
continue;
@@ -982,15 +982,15 @@ logerror("Compile %08X\n", pc);
/* validate this code block if we're not pointing into ROM */
if (ppc->program->get_write_ptr(seqhead->physpc) != NULL)
- generate_checksum_block(ppc, block, &compiler, seqhead, seqlast); // <checksum>
+ generate_checksum_block(ppc, block, &compiler, seqhead, seqlast); // <checksum>
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
- generate_sequence_instruction(ppc, block, &compiler, curdesc); // <instruction>
+ generate_sequence_instruction(ppc, block, &compiler, curdesc); // <instruction>
/* if we need to return to the start, do it */
if (seqlast->flags & OPFLAG_RETURN_TO_START)
@@ -1001,7 +1001,7 @@ logerror("Compile %08X\n", pc);
nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
/* count off cycles and go there */
- generate_update_cycles(ppc, block, &compiler, nextpc, TRUE); // <subtract cycles>
+ generate_update_cycles(ppc, block, &compiler, nextpc, TRUE); // <subtract cycles>
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
if (seqlast->flags & OPFLAG_CAN_CHANGE_MODES)
@@ -1121,28 +1121,28 @@ static void static_generate_entry_point(powerpc_state *ppc)
alloc_handle(drcuml, &ppc->impstate->exception_norecover[EXCEPTION_EI], "exception_ei_norecover");
alloc_handle(drcuml, &ppc->impstate->entry, "entry");
- UML_HANDLE(block, *ppc->impstate->entry); // handle entry
+ UML_HANDLE(block, *ppc->impstate->entry); // handle entry
/* reset the FPU mode */
- UML_AND(block, I0, FPSCR32, 3); // and i0,fpscr,3
- UML_LOAD(block, I0, &ppc->impstate->fpmode[0], I0, SIZE_BYTE, SCALE_x1); // load i0,fpmode,i0,byte
- UML_SETFMOD(block, I0); // setfmod i0
+ UML_AND(block, I0, FPSCR32, 3); // and i0,fpscr,3
+ UML_LOAD(block, I0, &ppc->impstate->fpmode[0], I0, SIZE_BYTE, SCALE_x1); // load i0,fpmode,i0,byte
+ UML_SETFMOD(block, I0); // setfmod i0
/* load fast integer registers */
- load_fast_iregs(ppc, block); // <load fastregs>
+ load_fast_iregs(ppc, block); // <load fastregs>
/* check for interrupts */
- UML_TEST(block, mem(&ppc->irq_pending), ~0); // test [irq_pending],0
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
- UML_TEST(block, MSR32, MSR_EE); // test msr,MSR_EE
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
- UML_MOV(block, I0, mem(&ppc->pc)); // mov i0,pc
- UML_MOV(block, I1, 0); // mov i1,0
- UML_CALLH(block, *ppc->impstate->exception_norecover[EXCEPTION_EI]); // callh exception_norecover
- UML_LABEL(block, skip); // skip:
+ UML_TEST(block, mem(&ppc->irq_pending), ~0); // test [irq_pending],0
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_TEST(block, MSR32, MSR_EE); // test msr,MSR_EE
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_MOV(block, I0, mem(&ppc->pc)); // mov i0,pc
+ UML_MOV(block, I1, 0); // mov i1,0
+ UML_CALLH(block, *ppc->impstate->exception_norecover[EXCEPTION_EI]); // callh exception_norecover
+ UML_LABEL(block, skip); // skip:
/* generate a hash jump via the current mode and PC */
- UML_HASHJMP(block, mem(&ppc->impstate->mode), mem(&ppc->pc), *ppc->impstate->nocode); // hashjmp <mode>,<pc>,nocode
+ UML_HASHJMP(block, mem(&ppc->impstate->mode), mem(&ppc->pc), *ppc->impstate->nocode); // hashjmp <mode>,<pc>,nocode
block->end();
}
@@ -1163,11 +1163,11 @@ static void static_generate_nocode_handler(powerpc_state *ppc)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &ppc->impstate->nocode, "nocode");
- UML_HANDLE(block, *ppc->impstate->nocode); // handle nocode
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&ppc->pc), I0); // mov [pc],i0
- save_fast_iregs(ppc, block); // <save fastregs>
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ UML_HANDLE(block, *ppc->impstate->nocode); // handle nocode
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&ppc->pc), I0); // mov [pc],i0
+ save_fast_iregs(ppc, block); // <save fastregs>
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
block->end();
}
@@ -1188,11 +1188,11 @@ static void static_generate_out_of_cycles(powerpc_state *ppc)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &ppc->impstate->out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *ppc->impstate->out_of_cycles); // handle out_of_cycles
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&ppc->pc), I0); // mov <pc>,i0
- save_fast_iregs(ppc, block); // <save fastregs>
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
+ UML_HANDLE(block, *ppc->impstate->out_of_cycles); // handle out_of_cycles
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&ppc->pc), I0); // mov <pc>,i0
+ save_fast_iregs(ppc, block); // <save fastregs>
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
block->end();
}
@@ -1219,36 +1219,36 @@ static void static_generate_tlb_mismatch(powerpc_state *ppc)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &ppc->impstate->tlb_mismatch, "tlb_mismatch");
- UML_HANDLE(block, *ppc->impstate->tlb_mismatch); // handle tlb_mismatch
- UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
- UML_SHR(block, I1, I0, 12); // shr i1,i0,12
- UML_LOAD(block, I2, (void *)vtlb_table(ppc->vtlb), I1, SIZE_DWORD, SCALE_x4); // load i2,[vtlb],i1,dword
- UML_MOV(block, mem(&ppc->param0), I0); // mov [param0],i0
- UML_MOV(block, mem(&ppc->param1), TRANSLATE_FETCH); // mov [param1],TRANSLATE_FETCH
- UML_CALLC(block, (c_function)ppccom_tlb_fill, ppc); // callc tlbfill,ppc
- UML_LOAD(block, I1, (void *)vtlb_table(ppc->vtlb), I1, SIZE_DWORD, SCALE_x4); // load i1,[vtlb],i1,dword
- UML_TEST(block, I1, VTLB_FETCH_ALLOWED); // test i1,VTLB_FETCH_ALLOWED
- UML_JMPc(block, COND_Z, isi = label++); // jmp isi,z
- UML_CMP(block, I2, 0); // cmp i2,0
- UML_JMPc(block, COND_NZ, exit = label++); // jmp exit,nz
- UML_HASHJMP(block, mem(&ppc->impstate->mode), I0, *ppc->impstate->nocode); // hashjmp <mode>,i0,nocode
- UML_LABEL(block, exit); // exit:
- UML_MOV(block, mem(&ppc->pc), I0); // mov <pc>,i0
- save_fast_iregs(ppc, block); // <save fastregs>
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
- UML_LABEL(block, isi); // isi:
+ UML_HANDLE(block, *ppc->impstate->tlb_mismatch); // handle tlb_mismatch
+ UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
+ UML_SHR(block, I1, I0, 12); // shr i1,i0,12
+ UML_LOAD(block, I2, (void *)vtlb_table(ppc->vtlb), I1, SIZE_DWORD, SCALE_x4); // load i2,[vtlb],i1,dword
+ UML_MOV(block, mem(&ppc->param0), I0); // mov [param0],i0
+ UML_MOV(block, mem(&ppc->param1), TRANSLATE_FETCH); // mov [param1],TRANSLATE_FETCH
+ UML_CALLC(block, (c_function)ppccom_tlb_fill, ppc); // callc tlbfill,ppc
+ UML_LOAD(block, I1, (void *)vtlb_table(ppc->vtlb), I1, SIZE_DWORD, SCALE_x4); // load i1,[vtlb],i1,dword
+ UML_TEST(block, I1, VTLB_FETCH_ALLOWED); // test i1,VTLB_FETCH_ALLOWED
+ UML_JMPc(block, COND_Z, isi = label++); // jmp isi,z
+ UML_CMP(block, I2, 0); // cmp i2,0
+ UML_JMPc(block, COND_NZ, exit = label++); // jmp exit,nz
+ UML_HASHJMP(block, mem(&ppc->impstate->mode), I0, *ppc->impstate->nocode); // hashjmp <mode>,i0,nocode
+ UML_LABEL(block, exit); // exit:
+ UML_MOV(block, mem(&ppc->pc), I0); // mov <pc>,i0
+ save_fast_iregs(ppc, block); // <save fastregs>
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ UML_LABEL(block, isi); // isi:
if (!(ppc->cap & PPCCAP_603_MMU))
{
- UML_MOV(block, SPR32(SPROEA_DSISR), mem(&ppc->param0)); // mov [dsisr],[param0]
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_ISI], I0); // exh isi,i0
+ UML_MOV(block, SPR32(SPROEA_DSISR), mem(&ppc->param0)); // mov [dsisr],[param0]
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_ISI], I0); // exh isi,i0
}
else
{
- UML_MOV(block, SPR32(SPR603_IMISS), I0); // mov [imiss],i0
- UML_MOV(block, SPR32(SPR603_ICMP), mem(&ppc->mmu603_cmp)); // mov [icmp],[mmu603_cmp]
- UML_MOV(block, SPR32(SPR603_HASH1), mem(&ppc->mmu603_hash[0])); // mov [hash1],[mmu603_hash][0]
- UML_MOV(block, SPR32(SPR603_HASH2), mem(&ppc->mmu603_hash[1])); // mov [hash2],[mmu603_hash][1]
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_ITLBMISS], I0); // exh itlbmiss,i0
+ UML_MOV(block, SPR32(SPR603_IMISS), I0); // mov [imiss],i0
+ UML_MOV(block, SPR32(SPR603_ICMP), mem(&ppc->mmu603_cmp)); // mov [icmp],[mmu603_cmp]
+ UML_MOV(block, SPR32(SPR603_HASH1), mem(&ppc->mmu603_hash[0])); // mov [hash1],[mmu603_hash][0]
+ UML_MOV(block, SPR32(SPR603_HASH2), mem(&ppc->mmu603_hash[1])); // mov [hash2],[mmu603_hash][1]
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_ITLBMISS], I0); // exh itlbmiss,i0
}
block->end();
@@ -1273,20 +1273,20 @@ static void static_generate_exception(powerpc_state *ppc, UINT8 exception, int r
/* add a global entry for this */
alloc_handle(drcuml, &exception_handle, name);
- UML_HANDLE(block, *exception_handle); // handle name
+ UML_HANDLE(block, *exception_handle); // handle name
/* exception parameter is expected to be the fault address in this case */
if (exception == EXCEPTION_ISI || exception == EXCEPTION_DSI)
{
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, SPR32(SPROEA_DAR), I0); // mov [dar],i0
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, SPR32(SPROEA_DAR), I0); // mov [dar],i0
}
/* fetch the PC and uncounted cycles */
if (recover)
{
- UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
- UML_RECOVER(block, I1, MAPVAR_CYCLES); // recover i1,CYCLES
+ UML_RECOVER(block, I0, MAPVAR_PC); // recover i0,PC
+ UML_RECOVER(block, I1, MAPVAR_CYCLES); // recover i1,CYCLES
}
/* OEA handling of SRR exceptions */
@@ -1296,36 +1296,36 @@ static void static_generate_exception(powerpc_state *ppc, UINT8 exception, int r
UINT32 msrormask = 0;
/* check registers to see the real source of our exception (EI exceptions only) */
- UML_MOV(block, I3, vector); // mov i3,vector
+ UML_MOV(block, I3, vector); // mov i3,vector
if (exception == EXCEPTION_EI)
{
code_label not_decrementer;
- UML_TEST(block, mem(&ppc->irq_pending), 0x01); // test [irq_pending],0x01
- UML_JMPc(block, COND_NZ, not_decrementer = label++); // jmp not_decrementer,nz
- UML_MOV(block, I3, EXCEPTION_DECREMENT << 8); // mov i3,EXCEPTION_DECREMENT << 8
- UML_AND(block, mem(&ppc->irq_pending), mem(&ppc->irq_pending), ~0x02); // and [irq_pending],[irq_pending],~0x02
- UML_LABEL(block, not_decrementer); // not_decrementer:
+ UML_TEST(block, mem(&ppc->irq_pending), 0x01); // test [irq_pending],0x01
+ UML_JMPc(block, COND_NZ, not_decrementer = label++); // jmp not_decrementer,nz
+ UML_MOV(block, I3, EXCEPTION_DECREMENT << 8); // mov i3,EXCEPTION_DECREMENT << 8
+ UML_AND(block, mem(&ppc->irq_pending), mem(&ppc->irq_pending), ~0x02); // and [irq_pending],[irq_pending],~0x02
+ UML_LABEL(block, not_decrementer); // not_decrementer:
}
/* exception PC goes into SRR0 */
- UML_MOV(block, SPR32(SPROEA_SRR0), I0); // mov [srr0],i0
+ UML_MOV(block, SPR32(SPROEA_SRR0), I0); // mov [srr0],i0
/* MSR bits go into SRR1, along with some exception-specific data */
- UML_AND(block, SPR32(SPROEA_SRR1), MSR32, 0x87c0ffff); // and [srr1],[msr],0x87c0ffff
+ UML_AND(block, SPR32(SPROEA_SRR1), MSR32, 0x87c0ffff); // and [srr1],[msr],0x87c0ffff
if (exception == EXCEPTION_PROGRAM)
{
- UML_GETEXP(block, I1); // getexp i1
- UML_OR(block, SPR32(SPROEA_SRR1), SPR32(SPROEA_SRR1), I1); // or [srr1],[srr1],i1
+ UML_GETEXP(block, I1); // getexp i1
+ UML_OR(block, SPR32(SPROEA_SRR1), SPR32(SPROEA_SRR1), I1); // or [srr1],[srr1],i1
}
if (ppc->cap & PPCCAP_603_MMU)
{
if (exception == EXCEPTION_ITLBMISS)
- UML_OR(block, SPR32(SPROEA_SRR1), SPR32(SPROEA_SRR1), 0x00040000); // or [srr1],0x00040000
+ UML_OR(block, SPR32(SPROEA_SRR1), SPR32(SPROEA_SRR1), 0x00040000); // or [srr1],0x00040000
else if (exception == EXCEPTION_DTLBMISSL)
- UML_OR(block, SPR32(SPROEA_SRR1), SPR32(SPROEA_SRR1), 0x00010000); // or [srr1],0x00010000
+ UML_OR(block, SPR32(SPROEA_SRR1), SPR32(SPROEA_SRR1), 0x00010000); // or [srr1],0x00010000
if (exception == EXCEPTION_ITLBMISS || exception == EXCEPTION_DTLBMISSL || exception == EXCEPTION_DTLBMISSS)
- UML_ROLINS(block, SPR32(SPROEA_SRR1), CR32(0), 28, CRMASK(0)); // rolins [srr1],[cr0],28,crmask(0)
+ UML_ROLINS(block, SPR32(SPROEA_SRR1), CR32(0), 28, CRMASK(0)); // rolins [srr1],[cr0],28,crmask(0)
}
/* update MSR */
@@ -1335,99 +1335,99 @@ static void static_generate_exception(powerpc_state *ppc, UINT8 exception, int r
msrormask |= MSR603_TGPR;
else
msrandmask |= MSR603_TGPR;
- UML_MOV(block, I0, MSR32); // mov i0,[msr]
+ UML_MOV(block, I0, MSR32); // mov i0,[msr]
}
- UML_AND(block, I2, MSR32, ~msrandmask); // and i2,[msr],~andmask
- UML_OR(block, I2, I2, msrormask); // or i2,i2,ormask
- UML_ROLINS(block, I2, I2, 16, MSR_LE); // rolins i2,u2,16,MSR_LE
- UML_MOV(block, MSR32, I2); // mov [msr],i2
+ UML_AND(block, I2, MSR32, ~msrandmask); // and i2,[msr],~andmask
+ UML_OR(block, I2, I2, msrormask); // or i2,i2,ormask
+ UML_ROLINS(block, I2, I2, 16, MSR_LE); // rolins i2,u2,16,MSR_LE
+ UML_MOV(block, MSR32, I2); // mov [msr],i2
if (ppc->cap & PPCCAP_603_MMU)
{
- UML_XOR(block, I0, I0, I2); // xor i0,i0,i2
- UML_TEST(block, I0, MSR603_TGPR); // test i0,tgpr
- UML_CALLHc(block, COND_NZ, *ppc->impstate->swap_tgpr); // callh swap_tgpr,nz
+ UML_XOR(block, I0, I0, I2); // xor i0,i0,i2
+ UML_TEST(block, I0, MSR603_TGPR); // test i0,tgpr
+ UML_CALLHc(block, COND_NZ, *ppc->impstate->swap_tgpr); // callh swap_tgpr,nz
}
- generate_update_mode(ppc, block); // <update mode>
+ generate_update_mode(ppc, block); // <update mode>
/* determine our target PC */
if (ppc->flavor == PPC_MODEL_602)
- UML_MOV(block, I0, SPR32(SPR602_IBR)); // mov i0,[ibr]
+ UML_MOV(block, I0, SPR32(SPR602_IBR)); // mov i0,[ibr]
else
- UML_MOV(block, I0, 0x00000000); // mov i0,0x00000000
- UML_TEST(block, MSR32, MSROEA_IP); // test [msr],IP
- UML_MOVc(block, COND_NZ, I0, 0xfff00000); // mov i0,0xfff00000,nz
- UML_OR(block, I0, I0, I3); // or i0,i0,i3
+ UML_MOV(block, I0, 0x00000000); // mov i0,0x00000000
+ UML_TEST(block, MSR32, MSROEA_IP); // test [msr],IP
+ UML_MOVc(block, COND_NZ, I0, 0xfff00000); // mov i0,0xfff00000,nz
+ UML_OR(block, I0, I0, I3); // or i0,i0,i3
}
/* 4XX handling of exceptions */
if (ppc->cap & PPCCAP_4XX)
{
/* check registers to see the real source of our exception (EI exceptions only) */
- UML_MOV(block, I3, vector); // mov i3,vector
+ UML_MOV(block, I3, vector); // mov i3,vector
if (exception == EXCEPTION_EI)
{
code_label notwdog, common;
- UML_TEST(block, SPR32(SPR4XX_TSR), PPC4XX_TSR_PIS); // test [tsr],PIS
- UML_MOVc(block, COND_NZ, I3, 0x1000); // mov i3,0x1000,NZ
- UML_TEST(block, SPR32(SPR4XX_TSR), PPC4XX_TSR_FIS); // test [tsr],FIS
- UML_MOVc(block, COND_NZ, I3, 0x1010); // mov i3,0x1010,NZ
- UML_TEST(block, SPR32(DCR4XX_EXISR), SPR32(DCR4XX_EXIER)); // test [exisr],[exier]
- UML_MOVc(block, COND_NZ, I3, vector); // mov i3,vector,NZ
- UML_TEST(block, SPR32(SPR4XX_TSR), PPC4XX_TSR_WIS); // test [tsr],WIS
- UML_JMPc(block, COND_Z, notwdog = label++); // jz notwdog
- UML_MOV(block, I3, 0x1020); // mov i3,0x1020
+ UML_TEST(block, SPR32(SPR4XX_TSR), PPC4XX_TSR_PIS); // test [tsr],PIS
+ UML_MOVc(block, COND_NZ, I3, 0x1000); // mov i3,0x1000,NZ
+ UML_TEST(block, SPR32(SPR4XX_TSR), PPC4XX_TSR_FIS); // test [tsr],FIS
+ UML_MOVc(block, COND_NZ, I3, 0x1010); // mov i3,0x1010,NZ
+ UML_TEST(block, SPR32(DCR4XX_EXISR), SPR32(DCR4XX_EXIER)); // test [exisr],[exier]
+ UML_MOVc(block, COND_NZ, I3, vector); // mov i3,vector,NZ
+ UML_TEST(block, SPR32(SPR4XX_TSR), PPC4XX_TSR_WIS); // test [tsr],WIS
+ UML_JMPc(block, COND_Z, notwdog = label++); // jz notwdog
+ UML_MOV(block, I3, 0x1020); // mov i3,0x1020
/* exception PC goes into SRR2, MSR goes to SRR3 */
- UML_MOV(block, SPR32(SPR4XX_SRR2), I0); // mov [srr2],i0
- UML_MOV(block, SPR32(SPR4XX_SRR3), MSR32); // mov [srr3],[msr]
+ UML_MOV(block, SPR32(SPR4XX_SRR2), I0); // mov [srr2],i0
+ UML_MOV(block, SPR32(SPR4XX_SRR3), MSR32); // mov [srr3],[msr]
UML_AND(block, I2, MSR32, ~(MSR4XX_WE | MSR_PR | MSR4XX_CE | MSR_EE | MSR4XX_DE | MSR4XX_PE));
- UML_JMP(block, common = label++); // jmp common
+ UML_JMP(block, common = label++); // jmp common
/* exception PC goes into SRR0, MSR goes to SRR1 */
- UML_LABEL(block, notwdog); // notwdog:
- UML_MOV(block, SPR32(SPR4XX_SRR0), I0); // mov [srr0],i0
- UML_MOV(block, SPR32(SPR4XX_SRR1), MSR32); // mov [srr1],[msr]
+ UML_LABEL(block, notwdog); // notwdog:
+ UML_MOV(block, SPR32(SPR4XX_SRR0), I0); // mov [srr0],i0
+ UML_MOV(block, SPR32(SPR4XX_SRR1), MSR32); // mov [srr1],[msr]
UML_AND(block, I2, MSR32, ~(MSR4XX_WE | MSR_PR | MSR_EE | MSR4XX_PE));// and i2,[msr],~(bunch-o-flags)
- UML_LABEL(block, common); // common:
+ UML_LABEL(block, common); // common:
}
else
{
/* exception PC goes into SRR0, MSR goes to SRR1 */
- UML_MOV(block, SPR32(SPR4XX_SRR0), I0); // mov [srr0],i0
- UML_MOV(block, SPR32(SPR4XX_SRR1), MSR32); // mov [srr1],[msr]
+ UML_MOV(block, SPR32(SPR4XX_SRR0), I0); // mov [srr0],i0
+ UML_MOV(block, SPR32(SPR4XX_SRR1), MSR32); // mov [srr1],[msr]
UML_AND(block, I2, MSR32, ~(MSR4XX_WE | MSR_PR | MSR_EE | MSR4XX_PE));// and i2,[msr],~(bunch-o-flags)
}
/* finish updating MSR */
- UML_ROLINS(block, I2, I2, 16, MSR_LE); // rolins i2,u2,16,MSR_LE
- UML_MOV(block, MSR32, I2); // mov [msr],i2
- generate_update_mode(ppc, block); // <update mode>
+ UML_ROLINS(block, I2, I2, 16, MSR_LE); // rolins i2,u2,16,MSR_LE
+ UML_MOV(block, MSR32, I2); // mov [msr],i2
+ generate_update_mode(ppc, block); // <update mode>
/* program exception flags go to ESR */
if (exception == EXCEPTION_PROGRAM)
{
- UML_GETEXP(block, I1); // getexp i1
- UML_SHL(block, SPR32(SPR4XX_ESR), I1, 8); // shl [esr],i1,8
+ UML_GETEXP(block, I1); // getexp i1
+ UML_SHL(block, SPR32(SPR4XX_ESR), I1, 8); // shl [esr],i1,8
}
/* determine our target PC */
- UML_ROLINS(block, I3, SPR32(SPR4XX_EVPR), 0, 0xffff0000); // rolins i3,[evpr],0,0xffff0000
- UML_MOV(block, I0, I3); // mov i0,i3
+ UML_ROLINS(block, I3, SPR32(SPR4XX_EVPR), 0, 0xffff0000); // rolins i3,[evpr],0,0xffff0000
+ UML_MOV(block, I0, I3); // mov i0,i3
}
/* optionally print exceptions */
if ((PRINTF_EXCEPTIONS && exception != EXCEPTION_EI && exception != EXCEPTION_SYSCALL) ||
(PRINTF_MMU && (exception == EXCEPTION_ISI || exception == EXCEPTION_DSI)))
{
- UML_MOV(block, mem(&ppc->param0), exception); // mov [param0],exception
- UML_CALLC(block, cfunc_printf_exception, ppc); // callc cfunc_printf_exception,ppc
+ UML_MOV(block, mem(&ppc->param0), exception); // mov [param0],exception
+ UML_CALLC(block, cfunc_printf_exception, ppc); // callc cfunc_printf_exception,ppc
}
/* adjust cycles */
- UML_SUB(block, mem(&ppc->icount), mem(&ppc->icount), I1); // sub icount,icount,cycles
- UML_EXHc(block, COND_S, *ppc->impstate->out_of_cycles, I0); // exh out_of_cycles,i0
- UML_HASHJMP(block, mem(&ppc->impstate->mode), I0, *ppc->impstate->nocode); // hashjmp <mode>,i0,nocode
+ UML_SUB(block, mem(&ppc->icount), mem(&ppc->icount), I1); // sub icount,icount,cycles
+ UML_EXHc(block, COND_S, *ppc->impstate->out_of_cycles, I0); // exh out_of_cycles,i0
+ UML_HASHJMP(block, mem(&ppc->impstate->mode), I0, *ppc->impstate->nocode); // hashjmp <mode>,i0,nocode
block->end();
}
@@ -1463,7 +1463,7 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
/* add a global entry for this */
alloc_handle(drcuml, &handleptr, name);
- UML_HANDLE(block, *handleptr); // handle *handleptr
+ UML_HANDLE(block, *handleptr); // handle *handleptr
/* check for unaligned accesses and break into two */
if (!ismasked && size != 1)
@@ -1471,8 +1471,8 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
/* in little-endian mode, anything misaligned generates an exception */
if ((mode & MODE_LITTLE_ENDIAN) || masked == NULL || !(ppc->cap & PPCCAP_MISALIGNED))
{
- UML_TEST(block, I0, size - 1); // test i0,size-1
- UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
+ UML_TEST(block, I0, size - 1); // test i0,size-1
+ UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
}
/* in big-endian mode, it's more complicated */
@@ -1481,19 +1481,19 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
/* 8-byte accesses must be word-aligned */
if (size == 8)
{
- UML_TEST(block, I0, 3); // test i0,3
- UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
+ UML_TEST(block, I0, 3); // test i0,3
+ UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
/* word aligned accesses need to be broken up */
- UML_TEST(block, I0, 4); // test i0,4
- UML_JMPc(block, COND_NZ, unaligned = label++); // jmp unaligned, nz
+ UML_TEST(block, I0, 4); // test i0,4
+ UML_JMPc(block, COND_NZ, unaligned = label++); // jmp unaligned, nz
}
/* unaligned 2 and 4 byte accesses need to be broken up */
else
{
- UML_TEST(block, I0, size - 1); // test i0,size-1
- UML_JMPc(block, COND_NZ, unaligned = label++); // jmp unaligned,nz
+ UML_TEST(block, I0, size - 1); // test i0,size-1
+ UML_JMPc(block, COND_NZ, unaligned = label++); // jmp unaligned,nz
}
}
}
@@ -1501,16 +1501,16 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
/* general case: assume paging and perform a translation */
if (((ppc->cap & PPCCAP_OEA) && (mode & MODE_DATA_TRANSLATION)) || (iswrite && (ppc->cap & PPCCAP_4XX) && (mode & MODE_PROTECTION)))
{
- UML_SHR(block, I3, I0, 12); // shr i3,i0,12
+ UML_SHR(block, I3, I0, 12); // shr i3,i0,12
UML_LOAD(block, I3, (void *)vtlb_table(ppc->vtlb), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword
- UML_TEST(block, I3, (UINT64)1 << translate_type); // test i3,1 << translate_type
- UML_JMPc(block, COND_Z, tlbmiss = label++); // jmp tlbmiss,z
- UML_LABEL(block, tlbreturn = label++); // tlbreturn:
- UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000
+ UML_TEST(block, I3, (UINT64)1 << translate_type); // test i3,1 << translate_type
+ UML_JMPc(block, COND_Z, tlbmiss = label++); // jmp tlbmiss,z
+ UML_LABEL(block, tlbreturn = label++); // tlbreturn:
+ UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000
}
else if (ppc->cap & PPCCAP_4XX)
- UML_AND(block, I0, I0, 0x7fffffff); // and i0,i0,0x7fffffff
- UML_XOR(block, I0, I0, (mode & MODE_LITTLE_ENDIAN) ? (8 - size) : 0); // xor i0,i0,8-size
+ UML_AND(block, I0, I0, 0x7fffffff); // and i0,i0,0x7fffffff
+ UML_XOR(block, I0, I0, (mode & MODE_LITTLE_ENDIAN) ? (8 - size) : 0); // xor i0,i0,8-size
if ((ppc->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
for (ramnum = 0; ramnum < PPC_MAX_FASTRAM; ramnum++)
@@ -1521,104 +1521,104 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
if (ppc->impstate->fastram[ramnum].end != 0xffffffff)
{
- UML_CMP(block, I0, ppc->impstate->fastram[ramnum].end); // cmp i0,end
- UML_JMPc(block, COND_A, skip); // ja skip
+ UML_CMP(block, I0, ppc->impstate->fastram[ramnum].end); // cmp i0,end
+ UML_JMPc(block, COND_A, skip); // ja skip
}
if (ppc->impstate->fastram[ramnum].start != 0x00000000)
{
- UML_CMP(block, I0, ppc->impstate->fastram[ramnum].start); // cmp i0,fastram_start
- UML_JMPc(block, COND_B, skip); // jb skip
+ UML_CMP(block, I0, ppc->impstate->fastram[ramnum].start); // cmp i0,fastram_start
+ UML_JMPc(block, COND_B, skip); // jb skip
}
if (!iswrite)
{
if (size == 1)
{
- UML_XOR(block, I0, I0, fastxor & 7); // xor i0,i0,fastxor & 7
- UML_LOAD(block, I0, fastbase, I0, SIZE_BYTE, SCALE_x1); // load i0,fastbase,i0,byte
+ UML_XOR(block, I0, I0, fastxor & 7); // xor i0,i0,fastxor & 7
+ UML_LOAD(block, I0, fastbase, I0, SIZE_BYTE, SCALE_x1); // load i0,fastbase,i0,byte
}
else if (size == 2)
{
- UML_XOR(block, I0, I0, fastxor & 6); // xor i0,i0,fastxor & 6
- UML_LOAD(block, I0, fastbase, I0, SIZE_WORD, SCALE_x1); // load i0,fastbase,i0,word_x1
+ UML_XOR(block, I0, I0, fastxor & 6); // xor i0,i0,fastxor & 6
+ UML_LOAD(block, I0, fastbase, I0, SIZE_WORD, SCALE_x1); // load i0,fastbase,i0,word_x1
}
else if (size == 4)
{
- UML_XOR(block, I0, I0, fastxor & 4); // xor i0,i0,fastxor & 4
- UML_LOAD(block, I0, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i0,fastbase,i0,dword_x1
+ UML_XOR(block, I0, I0, fastxor & 4); // xor i0,i0,fastxor & 4
+ UML_LOAD(block, I0, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i0,fastbase,i0,dword_x1
}
else if (size == 8)
{
- UML_DLOAD(block, I0, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i0,fastbase,i0,qword
+ UML_DLOAD(block, I0, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i0,fastbase,i0,qword
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
}
else
{
if (size == 1)
{
- UML_XOR(block, I0, I0, fastxor & 7); // xor i0,i0,fastxor & 7
- UML_STORE(block, fastbase, I0, I1, SIZE_BYTE, SCALE_x1); // store fastbase,i0,i1,byte
+ UML_XOR(block, I0, I0, fastxor & 7); // xor i0,i0,fastxor & 7
+ UML_STORE(block, fastbase, I0, I1, SIZE_BYTE, SCALE_x1); // store fastbase,i0,i1,byte
}
else if (size == 2)
{
- UML_XOR(block, I0, I0, fastxor & 6); // xor i0,i0,fastxor & 6
- UML_STORE(block, fastbase, I0, I1, SIZE_WORD, SCALE_x1); // store fastbase,i0,i1,word_x1
+ UML_XOR(block, I0, I0, fastxor & 6); // xor i0,i0,fastxor & 6
+ UML_STORE(block, fastbase, I0, I1, SIZE_WORD, SCALE_x1); // store fastbase,i0,i1,word_x1
}
else if (size == 4)
{
- UML_XOR(block, I0, I0, fastxor & 4); // xor i0,i0,fastxor & 4
+ UML_XOR(block, I0, I0, fastxor & 4); // xor i0,i0,fastxor & 4
if (ismasked)
{
- UML_LOAD(block, I3, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i3,fastbase,i0,dword_x1
- UML_AND(block, I1, I1, I2); // and i1,i1,i2
- UML_XOR(block, I2, I2, 0xffffffff); // xor i2,i2,0xfffffffff
- UML_AND(block, I3, I3, I2); // and i3,i3,i2
- UML_OR(block, I1, I1, I3); // or i1,i1,i3
+ UML_LOAD(block, I3, fastbase, I0, SIZE_DWORD, SCALE_x1); // load i3,fastbase,i0,dword_x1
+ UML_AND(block, I1, I1, I2); // and i1,i1,i2
+ UML_XOR(block, I2, I2, 0xffffffff); // xor i2,i2,0xfffffffff
+ UML_AND(block, I3, I3, I2); // and i3,i3,i2
+ UML_OR(block, I1, I1, I3); // or i1,i1,i3
}
- UML_STORE(block, fastbase, I0, I1, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i1,dword_x1
+ UML_STORE(block, fastbase, I0, I1, SIZE_DWORD, SCALE_x1); // store fastbase,i0,i1,dword_x1
}
else if (size == 8)
{
if (ismasked)
{
- UML_DLOAD(block, I3, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i3,fastbase,i0,qword_x1
- UML_DAND(block, I1, I1, I2); // dand i1,i1,i2
- UML_DXOR(block, I2, I2, U64(0xffffffffffffffff)); // dxor i2,i2,0xfffffffffffffffff
- UML_DAND(block, I3, I3, I2); // dand i3,i3,i2
- UML_DOR(block, I1, I1, I3); // dor i1,i1,i3
+ UML_DLOAD(block, I3, fastbase, I0, SIZE_QWORD, SCALE_x1); // dload i3,fastbase,i0,qword_x1
+ UML_DAND(block, I1, I1, I2); // dand i1,i1,i2
+ UML_DXOR(block, I2, I2, U64(0xffffffffffffffff)); // dxor i2,i2,0xfffffffffffffffff
+ UML_DAND(block, I3, I3, I2); // dand i3,i3,i2
+ UML_DOR(block, I1, I1, I3); // dor i1,i1,i3
}
- UML_DSTORE(block, fastbase, I0, I1, SIZE_QWORD, SCALE_x1); // dstore fastbase,i0,i1,qword_x1
+ UML_DSTORE(block, fastbase, I0, I1, SIZE_QWORD, SCALE_x1); // dstore fastbase,i0,i1,qword_x1
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
}
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
switch (size)
{
case 1:
if (iswrite)
- UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); // write i0,i1,program_byte
+ UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); // write i0,i1,program_byte
else
- UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); // read i0,i0,program_byte
+ UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); // read i0,i0,program_byte
break;
case 2:
if (iswrite)
{
if (!ismasked)
- UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); // write i0,i1,program_word
+ UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); // write i0,i1,program_word
else
- UML_WRITEM(block, I0, I1, I2, SIZE_WORD, SPACE_PROGRAM); // writem i0,i2,i1,program_word
+ UML_WRITEM(block, I0, I1, I2, SIZE_WORD, SPACE_PROGRAM); // writem i0,i2,i1,program_word
}
else
{
if (!ismasked)
- UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); // read i0,i0,program_word
+ UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); // read i0,i0,program_word
else
- UML_READM(block, I0, I0, I2, SIZE_WORD, SPACE_PROGRAM); // readm i0,i0,i2,program_word
+ UML_READM(block, I0, I0, I2, SIZE_WORD, SPACE_PROGRAM); // readm i0,i0,i2,program_word
}
break;
@@ -1626,16 +1626,16 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
if (iswrite)
{
if (!ismasked)
- UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write i0,i1,program_dword
+ UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write i0,i1,program_dword
else
- UML_WRITEM(block, I0, I1, I2, SIZE_DWORD, SPACE_PROGRAM); // writem i0,i2,i1,program_dword
+ UML_WRITEM(block, I0, I1, I2, SIZE_DWORD, SPACE_PROGRAM); // writem i0,i2,i1,program_dword
}
else
{
if (!ismasked)
- UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read i0,i0,program_dword
+ UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read i0,i0,program_dword
else
- UML_READM(block, I0, I0, I2, SIZE_DWORD, SPACE_PROGRAM); // readm i0,i0,i2,program_dword
+ UML_READM(block, I0, I0, I2, SIZE_DWORD, SPACE_PROGRAM); // readm i0,i0,i2,program_dword
}
break;
@@ -1643,52 +1643,52 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
if (iswrite)
{
if (!ismasked)
- UML_DWRITE(block, I0, I1, SIZE_QWORD, SPACE_PROGRAM); // dwrite i0,i1,program_qword
+ UML_DWRITE(block, I0, I1, SIZE_QWORD, SPACE_PROGRAM); // dwrite i0,i1,program_qword
else
- UML_DWRITEM(block, I0, I1, I2, SIZE_QWORD, SPACE_PROGRAM); // dwritem i0,i2,i1,program_qword
+ UML_DWRITEM(block, I0, I1, I2, SIZE_QWORD, SPACE_PROGRAM); // dwritem i0,i2,i1,program_qword
}
else
{
if (!ismasked)
- UML_DREAD(block, I0, I0, SIZE_QWORD, SPACE_PROGRAM); // dread i0,i0,program_qword
+ UML_DREAD(block, I0, I0, SIZE_QWORD, SPACE_PROGRAM); // dread i0,i0,program_qword
else
- UML_DREADM(block, I0, I0, I2, SIZE_QWORD, SPACE_PROGRAM); // dreadm i0,i0,i2,program_qword
+ UML_DREADM(block, I0, I0, I2, SIZE_QWORD, SPACE_PROGRAM); // dreadm i0,i0,i2,program_qword
}
break;
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
/* handle unaligned accesses */
if (unaligned != 0)
{
- UML_LABEL(block, unaligned); // unaligned:
+ UML_LABEL(block, unaligned); // unaligned:
if (size == 2)
{
if (iswrite)
{
- UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
- UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I1); // mov [tempdata],i1
- UML_SUB(block, I0, I0, 1); // sub i0,i0,1
- UML_SHR(block, I1, I1, 8); // shr i1,i1,8
- UML_MOV(block, I2, 0x00ff); // mov i2,0x00ff
- UML_CALLH(block, *masked); // callh masked
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
- UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 8); // shl i1,[tempdata],8
- UML_MOV(block, I2, 0xff00); // mov i2,0xff00
- UML_CALLH(block, *masked); // callh masked
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
+ UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I1); // mov [tempdata],i1
+ UML_SUB(block, I0, I0, 1); // sub i0,i0,1
+ UML_SHR(block, I1, I1, 8); // shr i1,i1,8
+ UML_MOV(block, I2, 0x00ff); // mov i2,0x00ff
+ UML_CALLH(block, *masked); // callh masked
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
+ UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 8); // shl i1,[tempdata],8
+ UML_MOV(block, I2, 0xff00); // mov i2,0xff00
+ UML_CALLH(block, *masked); // callh masked
}
else
{
- UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
- UML_SUB(block, I0, I0, 1); // sub i0,i0,1
- UML_MOV(block, I2, 0x00ff); // mov i2,0x00ff
- UML_CALLH(block, *masked); // callh masked
- UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 8); // shl [tempdata],i0,8
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
- UML_MOV(block, I2, 0xff00); // mov i2,0xff00
- UML_CALLH(block, *masked); // callh masked
- UML_SHR(block, I0, I0, 8); // shr i0,i0,8
- UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
+ UML_SUB(block, I0, I0, 1); // sub i0,i0,1
+ UML_MOV(block, I2, 0x00ff); // mov i2,0x00ff
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 8); // shl [tempdata],i0,8
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
+ UML_MOV(block, I2, 0xff00); // mov i2,0xff00
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHR(block, I0, I0, 8); // shr i0,i0,8
+ UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
}
}
else if (size == 4)
@@ -1696,156 +1696,156 @@ static void static_generate_memory_accessor(powerpc_state *ppc, int mode, int si
int offs2, offs3;
if (iswrite)
{
- UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
- UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I1); // mov [tempdata],i1
- UML_TEST(block, I0, 2); // test i0,i0,2
- UML_JMPc(block, COND_NZ, offs2 = label++); // jnz offs2
- UML_SUB(block, I0, I0, 1); // sub i0,i0,1
- UML_SHR(block, I1, I1, 8); // shr i1,i1,8
- UML_MOV(block, I2, 0x00ffffff); // mov i2,0x00ffffff
- UML_CALLH(block, *masked); // callh masked
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 3); // add i0,[tempaddr],3
- UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 24); // shl i1,[tempdata],24
- UML_MOV(block, I2, 0xff000000); // mov i2,0xff000000
- UML_CALLH(block, *masked); // callh masked
- UML_RET(block); // ret
- UML_LABEL(block, offs2); // offs2:
- UML_TEST(block, I0, 1); // test i0,i0,1
- UML_JMPc(block, COND_NZ, offs3 = label++); // jnz offs3
- UML_SUB(block, I0, I0, 2); // sub i0,i0,2
- UML_SHR(block, I1, I1, 16); // shr i1,i1,16
- UML_MOV(block, I2, 0x0000ffff); // mov i2,0x0000ffff
- UML_CALLH(block, *masked); // callh masked
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 2); // add i0,[tempaddr],2
- UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 16); // shl i1,[tempdata],16
- UML_MOV(block, I2, 0xffff0000); // mov i2,0xffff0000
- UML_CALLH(block, *masked); // callh masked
- UML_RET(block); // ret
- UML_LABEL(block, offs3); // offs3:
- UML_SUB(block, I0, I0, 3); // sub i0,i0,3
- UML_SHR(block, I1, I1, 24); // shr i1,i1,24
- UML_MOV(block, I2, 0x000000ff); // mov i2,0x000000ff
- UML_CALLH(block, *masked); // callh masked
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
- UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 8); // shl i1,[tempdata],8
- UML_MOV(block, I2, 0xffffff00); // mov i2,0xffffff00
- UML_CALLH(block, *masked); // callh masked
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
+ UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I1); // mov [tempdata],i1
+ UML_TEST(block, I0, 2); // test i0,i0,2
+ UML_JMPc(block, COND_NZ, offs2 = label++); // jnz offs2
+ UML_SUB(block, I0, I0, 1); // sub i0,i0,1
+ UML_SHR(block, I1, I1, 8); // shr i1,i1,8
+ UML_MOV(block, I2, 0x00ffffff); // mov i2,0x00ffffff
+ UML_CALLH(block, *masked); // callh masked
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 3); // add i0,[tempaddr],3
+ UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 24); // shl i1,[tempdata],24
+ UML_MOV(block, I2, 0xff000000); // mov i2,0xff000000
+ UML_CALLH(block, *masked); // callh masked
+ UML_RET(block); // ret
+ UML_LABEL(block, offs2); // offs2:
+ UML_TEST(block, I0, 1); // test i0,i0,1
+ UML_JMPc(block, COND_NZ, offs3 = label++); // jnz offs3
+ UML_SUB(block, I0, I0, 2); // sub i0,i0,2
+ UML_SHR(block, I1, I1, 16); // shr i1,i1,16
+ UML_MOV(block, I2, 0x0000ffff); // mov i2,0x0000ffff
+ UML_CALLH(block, *masked); // callh masked
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 2); // add i0,[tempaddr],2
+ UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 16); // shl i1,[tempdata],16
+ UML_MOV(block, I2, 0xffff0000); // mov i2,0xffff0000
+ UML_CALLH(block, *masked); // callh masked
+ UML_RET(block); // ret
+ UML_LABEL(block, offs3); // offs3:
+ UML_SUB(block, I0, I0, 3); // sub i0,i0,3
+ UML_SHR(block, I1, I1, 24); // shr i1,i1,24
+ UML_MOV(block, I2, 0x000000ff); // mov i2,0x000000ff
+ UML_CALLH(block, *masked); // callh masked
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
+ UML_SHL(block, I1, mem(&ppc->impstate->tempdata.w.l), 8); // shl i1,[tempdata],8
+ UML_MOV(block, I2, 0xffffff00); // mov i2,0xffffff00
+ UML_CALLH(block, *masked); // callh masked
}
else
{
- UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
- UML_TEST(block, I0, 2); // test i0,i0,2
- UML_JMPc(block, COND_NZ, offs2 = label++); // jnz offs2
- UML_SUB(block, I0, I0, 1); // sub i0,i0,1
- UML_MOV(block, I2, 0x00ffffff); // mov i2,0x00ffffff
- UML_CALLH(block, *masked); // callh masked
- UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 8); // shl [tempdata],i0,8
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 3); // add i0,[tempaddr],3
- UML_MOV(block, I2, 0xff000000); // mov i2,0xff000000
- UML_CALLH(block, *masked); // callh masked
- UML_SHR(block, I0, I0, 24); // shr i0,i0,24
- UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
- UML_RET(block); // ret
- UML_LABEL(block, offs2); // offs2:
- UML_TEST(block, I0, 1); // test i0,i0,1
- UML_JMPc(block, COND_NZ, offs3 = label++); // jnz offs3
- UML_SUB(block, I0, I0, 2); // sub i0,i0,2
- UML_MOV(block, I2, 0x0000ffff); // mov i2,0x0000ffff
- UML_CALLH(block, *masked); // callh masked
- UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 16); // shl [tempdata],i0,16
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 2); // add i0,[tempaddr],2
- UML_MOV(block, I2, 0xffff0000); // mov i2,0xffff0000
- UML_CALLH(block, *masked); // callh masked
- UML_SHR(block, I0, I0, 16); // shr i0,i0,16
- UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
- UML_RET(block); // ret
- UML_LABEL(block, offs3); // offs3:
- UML_SUB(block, I0, I0, 3); // sub i0,i0,3
- UML_MOV(block, I2, 0x000000ff); // mov i2,0x000000ff
- UML_CALLH(block, *masked); // callh masked
- UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 24); // shl [tempdata],i0,24
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
- UML_MOV(block, I2, 0xffffff00); // mov i2,0xffffff00
- UML_CALLH(block, *masked); // callh masked
- UML_SHR(block, I0, I0, 8); // shr i0,i0,8
- UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
+ UML_TEST(block, I0, 2); // test i0,i0,2
+ UML_JMPc(block, COND_NZ, offs2 = label++); // jnz offs2
+ UML_SUB(block, I0, I0, 1); // sub i0,i0,1
+ UML_MOV(block, I2, 0x00ffffff); // mov i2,0x00ffffff
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 8); // shl [tempdata],i0,8
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 3); // add i0,[tempaddr],3
+ UML_MOV(block, I2, 0xff000000); // mov i2,0xff000000
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHR(block, I0, I0, 24); // shr i0,i0,24
+ UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
+ UML_RET(block); // ret
+ UML_LABEL(block, offs2); // offs2:
+ UML_TEST(block, I0, 1); // test i0,i0,1
+ UML_JMPc(block, COND_NZ, offs3 = label++); // jnz offs3
+ UML_SUB(block, I0, I0, 2); // sub i0,i0,2
+ UML_MOV(block, I2, 0x0000ffff); // mov i2,0x0000ffff
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 16); // shl [tempdata],i0,16
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 2); // add i0,[tempaddr],2
+ UML_MOV(block, I2, 0xffff0000); // mov i2,0xffff0000
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHR(block, I0, I0, 16); // shr i0,i0,16
+ UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
+ UML_RET(block); // ret
+ UML_LABEL(block, offs3); // offs3:
+ UML_SUB(block, I0, I0, 3); // sub i0,i0,3
+ UML_MOV(block, I2, 0x000000ff); // mov i2,0x000000ff
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHL(block, mem(&ppc->impstate->tempdata.w.l), I0, 24); // shl [tempdata],i0,24
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 1); // add i0,[tempaddr],1
+ UML_MOV(block, I2, 0xffffff00); // mov i2,0xffffff00
+ UML_CALLH(block, *masked); // callh masked
+ UML_SHR(block, I0, I0, 8); // shr i0,i0,8
+ UML_OR(block, I0, I0, mem(&ppc->impstate->tempdata.w.l)); // or i0,i0,[tempdata]
}
}
else if (size == 8)
{
if (iswrite)
{
- UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
- UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I1); // dmov [tempdata],i1
- UML_DSHR(block, I1, I1, 32); // dshr i1,i1,32
- UML_DMOV(block, I2, U64(0x00000000ffffffff)); // dmov i2,0x00000000ffffffff
- UML_CALLH(block, *masked); // callh masked
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 4); // add i0,[tempaddr],4
- UML_DSHL(block, I1, mem(&ppc->impstate->tempdata.d), 32); // dshl i1,[tempdata],32
- UML_DMOV(block, I2, U64(0xffffffff00000000)); // dmov i2,0xffffffff00000000
- UML_CALLH(block, *masked); // callh masked
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
+ UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I1); // dmov [tempdata],i1
+ UML_DSHR(block, I1, I1, 32); // dshr i1,i1,32
+ UML_DMOV(block, I2, U64(0x00000000ffffffff)); // dmov i2,0x00000000ffffffff
+ UML_CALLH(block, *masked); // callh masked
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 4); // add i0,[tempaddr],4
+ UML_DSHL(block, I1, mem(&ppc->impstate->tempdata.d), 32); // dshl i1,[tempdata],32
+ UML_DMOV(block, I2, U64(0xffffffff00000000)); // dmov i2,0xffffffff00000000
+ UML_CALLH(block, *masked); // callh masked
}
else
{
- UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
- UML_DMOV(block, I2, U64(0x00000000ffffffff)); // mov i2,0x00000000ffffffff
- UML_CALLH(block, *masked); // callh masked
- UML_DSHL(block, mem(&ppc->impstate->tempdata.d), I0, 32); // dshl [tempdata],i0,32
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 4); // add i0,[tempaddr],4
- UML_DMOV(block, I2, U64(0xffffffff00000000)); // dmov i2,0xffffffff00000000
- UML_CALLH(block, *masked); // callh masked
- UML_DSHR(block, I0, I0, 32); // dshr i0,i0,32
- UML_DOR(block, I0, I0, mem(&ppc->impstate->tempdata.d)); // dor i0,i0,[tempdata]
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), I0); // mov [tempaddr],i0
+ UML_DMOV(block, I2, U64(0x00000000ffffffff)); // mov i2,0x00000000ffffffff
+ UML_CALLH(block, *masked); // callh masked
+ UML_DSHL(block, mem(&ppc->impstate->tempdata.d), I0, 32); // dshl [tempdata],i0,32
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 4); // add i0,[tempaddr],4
+ UML_DMOV(block, I2, U64(0xffffffff00000000)); // dmov i2,0xffffffff00000000
+ UML_CALLH(block, *masked); // callh masked
+ UML_DSHR(block, I0, I0, 32); // dshr i0,i0,32
+ UML_DOR(block, I0, I0, mem(&ppc->impstate->tempdata.d)); // dor i0,i0,[tempdata]
}
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
}
/* handle an alignment exception */
if (alignex != 0)
{
- UML_LABEL(block, alignex); // alignex:
- UML_RECOVER(block, SPR32(SPROEA_DSISR), MAPVAR_DSISR); // recover [dsisr],DSISR
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_ALIGN], I0); // exh align,i0
+ UML_LABEL(block, alignex); // alignex:
+ UML_RECOVER(block, SPR32(SPROEA_DSISR), MAPVAR_DSISR); // recover [dsisr],DSISR
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_ALIGN], I0); // exh align,i0
}
/* handle a TLB miss */
if (tlbmiss != 0)
{
- UML_LABEL(block, tlbmiss); // tlbmiss:
- UML_MOV(block, mem(&ppc->param0), I0); // mov [param0],i0
- UML_MOV(block, mem(&ppc->param1), translate_type); // mov [param1],translate_type
- UML_CALLC(block, (c_function)ppccom_tlb_fill, ppc); // callc tlbfill,ppc
- UML_SHR(block, I3, I0, 12); // shr i3,i0,12
+ UML_LABEL(block, tlbmiss); // tlbmiss:
+ UML_MOV(block, mem(&ppc->param0), I0); // mov [param0],i0
+ UML_MOV(block, mem(&ppc->param1), translate_type); // mov [param1],translate_type
+ UML_CALLC(block, (c_function)ppccom_tlb_fill, ppc); // callc tlbfill,ppc
+ UML_SHR(block, I3, I0, 12); // shr i3,i0,12
UML_LOAD(block, I3, (void *)vtlb_table(ppc->vtlb), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword
- UML_TEST(block, I3, (UINT64)1 << translate_type); // test i3,1 << translate_type
- UML_JMPc(block, COND_NZ, tlbreturn); // jmp tlbreturn,nz
+ UML_TEST(block, I3, (UINT64)1 << translate_type); // test i3,1 << translate_type
+ UML_JMPc(block, COND_NZ, tlbreturn); // jmp tlbreturn,nz
/* 4XX case: protection exception */
if (ppc->cap & PPCCAP_4XX)
{
- UML_MOV(block, SPR32(SPR4XX_DEAR), I0); // mov [dear],i0
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DSI], I0); // exh dsi,i0
+ UML_MOV(block, SPR32(SPR4XX_DEAR), I0); // mov [dear],i0
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DSI], I0); // exh dsi,i0
}
/* 603 case: TLBMISS exception */
else if (ppc->cap & PPCCAP_603_MMU)
{
- UML_MOV(block, SPR32(SPR603_DMISS), I0); // mov [dmiss],i0
- UML_MOV(block, SPR32(SPR603_DCMP), mem(&ppc->mmu603_cmp)); // mov [dcmp],[mmu603_cmp]
- UML_MOV(block, SPR32(SPR603_HASH1), mem(&ppc->mmu603_hash[0])); // mov [hash1],[mmu603_hash][0]
- UML_MOV(block, SPR32(SPR603_HASH2), mem(&ppc->mmu603_hash[1])); // mov [hash2],[mmu603_hash][1]
+ UML_MOV(block, SPR32(SPR603_DMISS), I0); // mov [dmiss],i0
+ UML_MOV(block, SPR32(SPR603_DCMP), mem(&ppc->mmu603_cmp)); // mov [dcmp],[mmu603_cmp]
+ UML_MOV(block, SPR32(SPR603_HASH1), mem(&ppc->mmu603_hash[0])); // mov [hash1],[mmu603_hash][0]
+ UML_MOV(block, SPR32(SPR603_HASH2), mem(&ppc->mmu603_hash[1])); // mov [hash2],[mmu603_hash][1]
if (iswrite)
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DTLBMISSS], I0); // exh dtlbmisss,i0
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DTLBMISSS], I0); // exh dtlbmisss,i0
else
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DTLBMISSL], I0); // exh dtlbmissl,i0
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DTLBMISSL], I0); // exh dtlbmissl,i0
}
/* general case: DSI exception */
else
{
- UML_MOV(block, SPR32(SPROEA_DSISR), mem(&ppc->param0)); // mov [dsisr],[param0]
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DSI], I0); // exh dsi,i0
+ UML_MOV(block, SPR32(SPROEA_DSISR), mem(&ppc->param0)); // mov [dsisr],[param0]
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_DSI], I0); // exh dsi,i0
}
}
@@ -1869,14 +1869,14 @@ static void static_generate_swap_tgpr(powerpc_state *ppc)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &ppc->impstate->swap_tgpr, "swap_tgpr");
- UML_HANDLE(block, *ppc->impstate->swap_tgpr); // handle swap_tgpr
+ UML_HANDLE(block, *ppc->impstate->swap_tgpr); // handle swap_tgpr
for (regnum = 0; regnum < 4; regnum++)
{
- UML_MOV(block, I1, R32(regnum)); // mov i1,r[regnum]
- UML_MOV(block, R32(regnum), mem(&ppc->mmu603_r[regnum])); // mov r[regnum],mmu603_r[regnum]
- UML_MOV(block, mem(&ppc->mmu603_r[regnum]), I1); // mov mmu603_r[regnum],i1
+ UML_MOV(block, I1, R32(regnum)); // mov i1,r[regnum]
+ UML_MOV(block, R32(regnum), mem(&ppc->mmu603_r[regnum])); // mov r[regnum],mmu603_r[regnum]
+ UML_MOV(block, mem(&ppc->mmu603_r[regnum]), I1); // mov mmu603_r[regnum],i1
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
block->end();
}
@@ -1905,33 +1905,33 @@ static void static_generate_lsw_entries(powerpc_state *ppc, int mode)
/* allocate a handle */
sprintf(temp, "lsw%d", regnum);
alloc_handle(drcuml, &ppc->impstate->lsw[mode][regnum], temp);
- UML_HANDLE(block, *ppc->impstate->lsw[mode][regnum]); // handle lsw<regnum>
- UML_LABEL(block, regnum); // regnum:
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 0); // add i0,[updateaddr],0
- UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
- UML_ROLAND(block, R32(regnum), I0, 24, 0xff000000); // roland reg,i0,24,0xff000000
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 1); // add i0,[updateaddr],1
- UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
- UML_ROLAND(block, I0, I0, 16, 0x00ff0000); // roland i0,i0,16,0x00ff0000
- UML_OR(block, R32(regnum), R32(regnum), I0); // or reg,i0
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 2); // add i0,[updateaddr],2
- UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
- UML_ROLAND(block, I0, I0, 8, 0x0000ff00); // roland i0,i0,8,0x0000ff00
- UML_OR(block, R32(regnum), R32(regnum), I0); // or reg,i0
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 3); // add i0,[updateaddr],3
- UML_ADD(block, mem(&ppc->impstate->updateaddr), I0, 1); // add [updateaddr],i0,1
- UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
- UML_ROLAND(block, I0, I0, 0, 0x000000ff); // roland i0,i0,0,0x000000ff
- UML_OR(block, R32(regnum), R32(regnum), I0); // or reg,i0
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_JMP(block, (regnum + 1) % 32); // jmp nextreg
+ UML_HANDLE(block, *ppc->impstate->lsw[mode][regnum]); // handle lsw<regnum>
+ UML_LABEL(block, regnum); // regnum:
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 0); // add i0,[updateaddr],0
+ UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
+ UML_ROLAND(block, R32(regnum), I0, 24, 0xff000000); // roland reg,i0,24,0xff000000
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 1); // add i0,[updateaddr],1
+ UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
+ UML_ROLAND(block, I0, I0, 16, 0x00ff0000); // roland i0,i0,16,0x00ff0000
+ UML_OR(block, R32(regnum), R32(regnum), I0); // or reg,i0
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 2); // add i0,[updateaddr],2
+ UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
+ UML_ROLAND(block, I0, I0, 8, 0x0000ff00); // roland i0,i0,8,0x0000ff00
+ UML_OR(block, R32(regnum), R32(regnum), I0); // or reg,i0
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 3); // add i0,[updateaddr],3
+ UML_ADD(block, mem(&ppc->impstate->updateaddr), I0, 1); // add [updateaddr],i0,1
+ UML_CALLH(block, *ppc->impstate->read8[mode]); // callh read8
+ UML_ROLAND(block, I0, I0, 0, 0x000000ff); // roland i0,i0,0,0x000000ff
+ UML_OR(block, R32(regnum), R32(regnum), I0); // or reg,i0
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_JMP(block, (regnum + 1) % 32); // jmp nextreg
}
block->end();
@@ -1961,30 +1961,30 @@ static void static_generate_stsw_entries(powerpc_state *ppc, int mode)
/* allocate a handle */
sprintf(temp, "stsw%d", regnum);
alloc_handle(drcuml, &ppc->impstate->stsw[mode][regnum], temp);
- UML_HANDLE(block, *ppc->impstate->stsw[mode][regnum]); // handle stsw<regnum>
- UML_LABEL(block, regnum); // regnum:
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 0); // add i0,[updateaddr],0
- UML_ROLAND(block, I1, R32(regnum), 8, 0xff); // roland i1,regnum,8,0xff
- UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 1); // add i0,[updateaddr],1
- UML_ROLAND(block, I1, R32(regnum), 16, 0xff); // roland i1,regnum,16,0xff
- UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 2); // add i0,[updateaddr],2
- UML_ROLAND(block, I1, R32(regnum), 24, 0xff); // roland i1,regnum,24,0xff
- UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 3); // add i0,[updateaddr],3
- UML_ADD(block, mem(&ppc->impstate->updateaddr), I0, 1); // add [updateaddr],i0,1
- UML_ROLAND(block, I1, R32(regnum), 0, 0xff); // roland i1,regnum,0,0xff
- UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
- UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
- UML_RETc(block, COND_Z); // ret z
- UML_JMP(block, (regnum + 1) % 32); // jmp nextreg
+ UML_HANDLE(block, *ppc->impstate->stsw[mode][regnum]); // handle stsw<regnum>
+ UML_LABEL(block, regnum); // regnum:
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 0); // add i0,[updateaddr],0
+ UML_ROLAND(block, I1, R32(regnum), 8, 0xff); // roland i1,regnum,8,0xff
+ UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 1); // add i0,[updateaddr],1
+ UML_ROLAND(block, I1, R32(regnum), 16, 0xff); // roland i1,regnum,16,0xff
+ UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 2); // add i0,[updateaddr],2
+ UML_ROLAND(block, I1, R32(regnum), 24, 0xff); // roland i1,regnum,24,0xff
+ UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_ADD(block, I0, mem(&ppc->impstate->updateaddr), 3); // add i0,[updateaddr],3
+ UML_ADD(block, mem(&ppc->impstate->updateaddr), I0, 1); // add [updateaddr],i0,1
+ UML_ROLAND(block, I1, R32(regnum), 0, 0xff); // roland i1,regnum,0,0xff
+ UML_CALLH(block, *ppc->impstate->write8[mode]); // callh write8
+ UML_SUB(block, mem(&ppc->impstate->swcount), mem(&ppc->impstate->swcount), 1); // sub [swcount],[swcount],1
+ UML_RETc(block, COND_Z); // ret z
+ UML_JMP(block, (regnum + 1) % 32); // jmp nextreg
}
block->end();
@@ -2004,25 +2004,25 @@ static void static_generate_stsw_entries(powerpc_state *ppc, int mode)
static void generate_update_mode(powerpc_state *ppc, drcuml_block *block)
{
/* LE in bit 0 of mode */
- UML_AND(block, I0, MSR32, MSR_LE); // and i0,msr,MSR_LE
+ UML_AND(block, I0, MSR32, MSR_LE); // and i0,msr,MSR_LE
/* DR (OEA and 403GCX) in bit 1 of mode */
if ((ppc->cap & PPCCAP_OEA) || ppc->flavor == PPC_MODEL_403GCX)
{
- UML_ROLAND(block, I1, MSR32, 29, 0x02); // roland i1,[msr],29,0x02
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, MSR32, 29, 0x02); // roland i1,[msr],29,0x02
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
}
/* (4XX) in bit 1 of mode */
if (ppc->cap & PPCCAP_4XX)
{
- UML_ROLAND(block, I1, MSR32, 30, 0x02); // roland i1,[msr],30,0x02
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, MSR32, 30, 0x02); // roland i1,[msr],30,0x02
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
}
/* PR in bit 2 of mode */
- UML_ROLAND(block, I1, MSR32, 20, 0x04); // roland i1,[msr],20,0x04
- UML_OR(block, mem(&ppc->impstate->mode), I0, I1); // or [mode],i0,i1
+ UML_ROLAND(block, I1, MSR32, 20, 0x04); // roland i1,[msr],20,0x04
+ UML_OR(block, mem(&ppc->impstate->mode), I0, I1); // or [mode],i0,i1
}
@@ -2040,23 +2040,23 @@ static void generate_update_cycles(powerpc_state *ppc, drcuml_block *block, comp
code_label skip;
compiler->checkints = FALSE;
- UML_TEST(block, mem(&ppc->irq_pending), ~0); // test [irq_pending],0
- UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
- UML_TEST(block, MSR32, MSR_EE); // test [msr],MSR_EE
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
- UML_MOV(block, I0, param); // mov i0,nextpc
- UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
- UML_CALLH(block, *ppc->impstate->exception_norecover[EXCEPTION_EI]); // callh interrupt_norecover
- UML_LABEL(block, skip); // skip:
+ UML_TEST(block, mem(&ppc->irq_pending), ~0); // test [irq_pending],0
+ UML_JMPc(block, COND_Z, skip = compiler->labelnum++); // jmp skip,Z
+ UML_TEST(block, MSR32, MSR_EE); // test [msr],MSR_EE
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_MOV(block, I0, param); // mov i0,nextpc
+ UML_MOV(block, I1, compiler->cycles); // mov i1,cycles
+ UML_CALLH(block, *ppc->impstate->exception_norecover[EXCEPTION_EI]); // callh interrupt_norecover
+ UML_LABEL(block, skip); // skip:
}
/* account for cycles */
if (compiler->cycles > 0)
{
- UML_SUB(block, mem(&ppc->icount), mem(&ppc->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
- UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
+ UML_SUB(block, mem(&ppc->icount), mem(&ppc->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
if (allow_exception)
- UML_EXHc(block, COND_S, *ppc->impstate->out_of_cycles, param); // exh out_of_cycles,nextpc
+ UML_EXHc(block, COND_S, *ppc->impstate->out_of_cycles, param); // exh out_of_cycles,nextpc
}
compiler->cycles = 0;
}
@@ -2071,7 +2071,7 @@ static void generate_checksum_block(powerpc_state *ppc, drcuml_block *block, com
{
const opcode_desc *curdesc;
if (LOG_UML)
- block->append_comment("[Validation for %08X]", seqhead->pc); // comment
+ block->append_comment("[Validation for %08X]", seqhead->pc); // comment
/* loose verify or single instruction: just compare and fail */
if (!(ppc->impstate->drcoptions & PPCDRC_STRICT_VERIFY) || seqhead->next() == NULL)
@@ -2079,9 +2079,9 @@ static void generate_checksum_block(powerpc_state *ppc, drcuml_block *block, com
if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
{
void *base = ppc->direct->read_decrypted_ptr(seqhead->physpc, ppc->codexor);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword
- UML_CMP(block, I0, seqhead->opptr.l[0]); // cmp i0,*opptr
- UML_EXHc(block, COND_NE, *ppc->impstate->nocode, seqhead->pc); // exne nocode,seqhead->pc
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword
+ UML_CMP(block, I0, seqhead->opptr.l[0]); // cmp i0,*opptr
+ UML_EXHc(block, COND_NE, *ppc->impstate->nocode, seqhead->pc); // exne nocode,seqhead->pc
}
}
@@ -2093,25 +2093,25 @@ static void generate_checksum_block(powerpc_state *ppc, drcuml_block *block, com
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
void *base = ppc->direct->read_decrypted_ptr(seqhead->physpc, ppc->codexor);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword
- UML_CMP(block, I0, curdesc->opptr.l[0]); // cmp i0,*opptr
- UML_EXHc(block, COND_NE, *ppc->impstate->nocode, seqhead->pc); // exne nocode,seqhead->pc
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword
+ UML_CMP(block, I0, curdesc->opptr.l[0]); // cmp i0,*opptr
+ UML_EXHc(block, COND_NE, *ppc->impstate->nocode, seqhead->pc); // exne nocode,seqhead->pc
}
#else
UINT32 sum = 0;
void *base = ppc->direct->read_decrypted_ptr(seqhead->physpc, ppc->codexor);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,dword
sum += seqhead->opptr.l[0];
for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
base = ppc->direct->read_decrypted_ptr(curdesc->physpc, ppc->codexor);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += curdesc->opptr.l[0];
}
- UML_CMP(block, I0, sum); // cmp i0,sum
- UML_EXHc(block, COND_NE, *ppc->impstate->nocode, seqhead->pc); // exne nocode,seqhead->pc
+ UML_CMP(block, I0, sum); // cmp i0,sum
+ UML_EXHc(block, COND_NE, *ppc->impstate->nocode, seqhead->pc); // exne nocode,seqhead->pc
#endif
}
}
@@ -2131,7 +2131,7 @@ static void generate_sequence_instruction(powerpc_state *ppc, drcuml_block *bloc
log_add_disasm_comment(block, desc->pc, desc->opptr.l[0]);
/* set the PC map variable */
- UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc
+ UML_MAPVAR(block, MAPVAR_PC, desc->pc); // mapvar PC,desc->pc
/* accumulate total cycles */
compiler->cycles += desc->cycles;
@@ -2145,29 +2145,29 @@ static void generate_sequence_instruction(powerpc_state *ppc, drcuml_block *bloc
}
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
/* if we want a probe, add it here */
if (desc->pc == PROBE_ADDRESS)
{
- UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
- UML_CALLC(block, cfunc_printf_probe, (void *)(FPTR)desc->pc); // callc cfunc_printf_probe,desc->pc
+ UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
+ UML_CALLC(block, cfunc_printf_probe, (void *)(FPTR)desc->pc); // callc cfunc_printf_probe,desc->pc
}
/* if we are debugging, call the debugger */
if ((ppc->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
- UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
- save_fast_iregs(ppc, block); // <save fastregs>
- UML_DEBUG(block, desc->pc); // debug desc->pc
+ UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
+ save_fast_iregs(ppc, block); // <save fastregs>
+ UML_DEBUG(block, desc->pc); // debug desc->pc
}
/* if we hit an unmapped address, fatal error */
if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
{
- UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
- save_fast_iregs(ppc, block); // <save fastregs>
- UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
+ UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
+ save_fast_iregs(ppc, block); // <save fastregs>
+ UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
}
/* if we hit a compiler page fault, it's just like a TLB mismatch */
@@ -2176,11 +2176,11 @@ static void generate_sequence_instruction(powerpc_state *ppc, drcuml_block *bloc
if (PRINTF_MMU)
{
const char *text = "Compiler page fault @ %08X\n";
- UML_MOV(block, mem(&ppc->impstate->format), (FPTR)text); // mov [format],text
- UML_MOV(block, mem(&ppc->impstate->arg0), desc->pc); // mov [arg0],desc->pc
- UML_CALLC(block, cfunc_printf_debug, ppc); // callc printf_debug
+ UML_MOV(block, mem(&ppc->impstate->format), (FPTR)text); // mov [format],text
+ UML_MOV(block, mem(&ppc->impstate->arg0), desc->pc); // mov [arg0],desc->pc
+ UML_CALLC(block, cfunc_printf_debug, ppc); // callc printf_debug
}
- UML_EXH(block, *ppc->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
+ UML_EXH(block, *ppc->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
}
/* validate our TLB entry at this PC; if we fail, we need to handle it */
@@ -2194,13 +2194,13 @@ static void generate_sequence_instruction(powerpc_state *ppc, drcuml_block *bloc
if (PRINTF_MMU)
{
const char *text = "Checking TLB at @ %08X\n";
- UML_MOV(block, mem(&ppc->impstate->format), (FPTR)text); // mov [format],text
- UML_MOV(block, mem(&ppc->impstate->arg0), desc->pc); // mov [arg0],desc->pc
- UML_CALLC(block, cfunc_printf_debug, ppc); // callc printf_debug
+ UML_MOV(block, mem(&ppc->impstate->format), (FPTR)text); // mov [format],text
+ UML_MOV(block, mem(&ppc->impstate->arg0), desc->pc); // mov [arg0],desc->pc
+ UML_CALLC(block, cfunc_printf_debug, ppc); // callc printf_debug
}
UML_LOAD(block, I0, &tlbtable[desc->pc >> 12], 0, SIZE_DWORD, SCALE_x4);// load i0,tlbtable[desc->pc >> 12],dword
- UML_CMP(block, I0, tlbtable[desc->pc >> 12]); // cmp i0,*tlbentry
- UML_EXHc(block, COND_NE, *ppc->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0,NE
+ UML_CMP(block, I0, tlbtable[desc->pc >> 12]); // cmp i0,*tlbentry
+ UML_EXHc(block, COND_NE, *ppc->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0,NE
}
/* otherwise, we generate an unconditional exception */
@@ -2209,21 +2209,21 @@ static void generate_sequence_instruction(powerpc_state *ppc, drcuml_block *bloc
if (PRINTF_MMU)
{
const char *text = "No valid TLB @ %08X\n";
- UML_MOV(block, mem(&ppc->impstate->format), (FPTR)text); // mov [format],text
- UML_MOV(block, mem(&ppc->impstate->arg0), desc->pc); // mov [arg0],desc->pc
- UML_CALLC(block, cfunc_printf_debug, ppc); // callc printf_debug
+ UML_MOV(block, mem(&ppc->impstate->format), (FPTR)text); // mov [format],text
+ UML_MOV(block, mem(&ppc->impstate->arg0), desc->pc); // mov [arg0],desc->pc
+ UML_CALLC(block, cfunc_printf_debug, ppc); // callc printf_debug
}
- UML_EXH(block, *ppc->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
+ UML_EXH(block, *ppc->impstate->tlb_mismatch, 0); // exh tlb_mismatch,0
}
}
/* if this is an invalid opcode, generate the exception now */
if (desc->flags & OPFLAG_INVALID_OPCODE)
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x80000); // exh exception_program,0x80000
/* if this is a privileged opcode in user mode, generate the exception */
else if ((desc->flags & OPFLAG_PRIVILEGED) && (ppc->impstate->mode & MODE_USER))
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x40000); // exh exception_program,0x40000
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x40000); // exh exception_program,0x40000
/* otherwise, unless this is a virtual no-op, it's a regular instruction */
else if (!(desc->flags & OPFLAG_VIRTUAL_NOOP))
@@ -2231,9 +2231,9 @@ static void generate_sequence_instruction(powerpc_state *ppc, drcuml_block *bloc
/* compile the instruction */
if (!generate_opcode(ppc, block, compiler, desc))
{
- UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
- UML_MOV(block, mem(&ppc->impstate->arg0), desc->opptr.l[0]); // mov [arg0],*desc->opptr.l
- UML_CALLC(block, cfunc_unimplemented, ppc); // callc cfunc_unimplemented,ppc
+ UML_MOV(block, mem(&ppc->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&ppc->impstate->arg0), desc->opptr.l[0]); // mov [arg0],*desc->opptr.l
+ UML_CALLC(block, cfunc_unimplemented, ppc); // callc cfunc_unimplemented,ppc
}
}
}
@@ -2264,9 +2264,9 @@ static void generate_compute_flags(powerpc_state *ppc, drcuml_block *block, cons
/* semi-easy case: crfield only */
if (xermask == 0)
{
- UML_GETFLGS(block, I0, FLAG_S | FLAG_Z); // getflgs i0,sz
- UML_LOAD(block, I0, ppc->impstate->sz_cr_table, I0, SIZE_BYTE, SCALE_x1); // load i0,sz_cr_table,i0,byte
- UML_OR(block, CR32(0), I0, XERSO32); // or [cr0],i0,[xerso]
+ UML_GETFLGS(block, I0, FLAG_S | FLAG_Z); // getflgs i0,sz
+ UML_LOAD(block, I0, ppc->impstate->sz_cr_table, I0, SIZE_BYTE, SCALE_x1); // load i0,sz_cr_table,i0,byte
+ UML_OR(block, CR32(0), I0, XERSO32); // or [cr0],i0,[xerso]
return;
}
@@ -2275,39 +2275,39 @@ static void generate_compute_flags(powerpc_state *ppc, drcuml_block *block, cons
{
if (xermask & XER_OV)
{
- UML_GETFLGS(block, I0, xerflags); // getflgs i0,xerflags
+ UML_GETFLGS(block, I0, xerflags); // getflgs i0,xerflags
if (invertcarry && (xermask & XER_CA))
- UML_XOR(block, I0, I0, FLAG_C); // xor i0,i0,FLAG_C
- UML_ROLINS(block, SPR32(SPR_XER), I0, 29, xermask); // rolins [xer],i0,29,xermask
- UML_SHR(block, I0, I0, 1); // shr i0,i0,1
- UML_OR(block, XERSO32, XERSO32, I0); // or [xerso],i0
+ UML_XOR(block, I0, I0, FLAG_C); // xor i0,i0,FLAG_C
+ UML_ROLINS(block, SPR32(SPR_XER), I0, 29, xermask); // rolins [xer],i0,29,xermask
+ UML_SHR(block, I0, I0, 1); // shr i0,i0,1
+ UML_OR(block, XERSO32, XERSO32, I0); // or [xerso],i0
}
else
{
- UML_SETc(block, invertcarry ? COND_NC : COND_C, I0); // setc i0,nc/c
- UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
+ UML_SETc(block, invertcarry ? COND_NC : COND_C, I0); // setc i0,nc/c
+ UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
}
return;
}
/* tricky case: both */
- UML_GETFLGS(block, I0, FLAG_S | FLAG_Z | xerflags); // getflgs i0,SZ | xerflags
- UML_LOAD(block, I1, ppc->impstate->sz_cr_table, I0, SIZE_BYTE, SCALE_x1); // load i1,sz_cr_table,i0,byte
+ UML_GETFLGS(block, I0, FLAG_S | FLAG_Z | xerflags); // getflgs i0,SZ | xerflags
+ UML_LOAD(block, I1, ppc->impstate->sz_cr_table, I0, SIZE_BYTE, SCALE_x1); // load i1,sz_cr_table,i0,byte
if (invertcarry && (xermask & XER_CA))
- UML_XOR(block, I0, I0, FLAG_C); // xor i0,i0,FLAG_C
- UML_ROLINS(block, SPR32(SPR_XER), I0, 29, xermask); // rolins [xer],i0,29,xermask
+ UML_XOR(block, I0, I0, FLAG_C); // xor i0,i0,FLAG_C
+ UML_ROLINS(block, SPR32(SPR_XER), I0, 29, xermask); // rolins [xer],i0,29,xermask
if (xermask & XER_OV)
{
- UML_ROLAND(block, I0, I0, 31, 1); // roland i0,i0,31,0x0001
- UML_OR(block, XERSO32, XERSO32, I0); // or [xerso],i0
- UML_AND(block, CR32(0), CR32(0), 0xfffffffe); // and [cr0], [cr0], 0xfffffffe (clear SO copy in CR32)
- UML_OR(block, CR32(0), I1, XERSO32); // or [cr0],i1,[xerso]
+ UML_ROLAND(block, I0, I0, 31, 1); // roland i0,i0,31,0x0001
+ UML_OR(block, XERSO32, XERSO32, I0); // or [xerso],i0
+ UML_AND(block, CR32(0), CR32(0), 0xfffffffe); // and [cr0], [cr0], 0xfffffffe (clear SO copy in CR32)
+ UML_OR(block, CR32(0), I1, XERSO32); // or [cr0],i1,[xerso]
}
else
- {
- UML_AND(block, CR32(0), CR32(0), 0xfffffffe); // and [cr0], [cr0], 0xfffffffe (clear SO copy in CR32)
- UML_OR(block, CR32(0), I1, XERSO32); // or [cr0],i1,[xerso] (OR in new value from XERSO)
- }
+ {
+ UML_AND(block, CR32(0), CR32(0), 0xfffffffe); // and [cr0], [cr0], 0xfffffffe (clear SO copy in CR32)
+ UML_OR(block, CR32(0), I1, XERSO32); // or [cr0],i1,[xerso] (OR in new value from XERSO)
+ }
}
/*-----------------------------------------------------
@@ -2316,15 +2316,15 @@ static void generate_compute_flags(powerpc_state *ppc, drcuml_block *block, cons
static void generate_shift_flags(powerpc_state *ppc, drcuml_block *block, const opcode_desc *desc, UINT32 op)
{
- UML_CMP(block, R32(G_RA(op)), 0); // cmp ra, #0
- UML_SETc(block, COND_Z, I1); // set Z, i1
- UML_SHL(block, I1, I1, 2); // shl i1, i1, #2 (i1 now = FLAG_Z)
-
- UML_SHR(block, I2, R32(G_RA(op)), 28); // shr i2, ra, #28
- UML_AND(block, I2, I2, FLAG_S); // and i2, i2, FLAG_S (i2 now = FLAG_S)
- UML_OR(block, I1, I1, I2); // or i1, i1, i2
- UML_LOAD(block, I0, ppc->impstate->sz_cr_table, I1, SIZE_BYTE, SCALE_x1); // load i0,sz_cr_table,i0,byte
- UML_OR(block, CR32(0), I0, XERSO32); // or [cr0],i0,[xerso]
+ UML_CMP(block, R32(G_RA(op)), 0); // cmp ra, #0
+ UML_SETc(block, COND_Z, I1); // set Z, i1
+ UML_SHL(block, I1, I1, 2); // shl i1, i1, #2 (i1 now = FLAG_Z)
+
+ UML_SHR(block, I2, R32(G_RA(op)), 28); // shr i2, ra, #28
+ UML_AND(block, I2, I2, FLAG_S); // and i2, i2, FLAG_S (i2 now = FLAG_S)
+ UML_OR(block, I1, I1, I2); // or i1, i1, i2
+ UML_LOAD(block, I0, ppc->impstate->sz_cr_table, I1, SIZE_BYTE, SCALE_x1); // load i0,sz_cr_table,i0,byte
+ UML_OR(block, CR32(0), I0, XERSO32); // or [cr0],i0,[xerso]
}
/*-------------------------------------------------
@@ -2357,33 +2357,33 @@ static void generate_branch(powerpc_state *ppc, drcuml_block *block, compiler_st
{
if (desc->targetpc == BRANCH_TARGET_DYNAMIC && source == SPR_LR)
{
- UML_MOV(block, mem(&ppc->impstate->tempaddr), mem(srcptr)); // mov [tempaddr],[lr]
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), mem(srcptr)); // mov [tempaddr],[lr]
srcptr = &ppc->impstate->tempaddr;
}
- UML_MOV(block, SPR32(SPR_LR), desc->pc + 4); // mov [lr],desc->pc + 4
+ UML_MOV(block, SPR32(SPR_LR), desc->pc + 4); // mov [lr],desc->pc + 4
}
/* update the cycles and jump through the hash table to the target */
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(ppc, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
+ generate_update_cycles(ppc, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
- UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000
+ UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc | 0x80000000
else
UML_HASHJMP(block, ppc->impstate->mode, desc->targetpc, *ppc->impstate->nocode);
// hashjmp <mode>,desc->targetpc,nocode
}
else
{
- generate_update_cycles(ppc, block, &compiler_temp, mem(srcptr), TRUE); // <subtract cycles>
- UML_HASHJMP(block, ppc->impstate->mode, mem(srcptr), *ppc->impstate->nocode); // hashjmp <mode>,<rsreg>,nocode
+ generate_update_cycles(ppc, block, &compiler_temp, mem(srcptr), TRUE); // <subtract cycles>
+ UML_HASHJMP(block, ppc->impstate->mode, mem(srcptr), *ppc->impstate->nocode); // hashjmp <mode>,<rsreg>,nocode
}
/* update the label */
compiler->labelnum = compiler_temp.labelnum;
/* reset the mapvar to the current cycles */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
}
@@ -2398,16 +2398,16 @@ static void generate_branch_bo(powerpc_state *ppc, drcuml_block *block, compiler
if (!(bo & 0x04))
{
- UML_SUB(block, SPR32(SPR_CTR), SPR32(SPR_CTR), 1); // sub [ctr],[ctr],1
- UML_JMPc(block, (bo & 0x02) ? COND_NZ : COND_Z, skip); // jmp skip,nz/z
+ UML_SUB(block, SPR32(SPR_CTR), SPR32(SPR_CTR), 1); // sub [ctr],[ctr],1
+ UML_JMPc(block, (bo & 0x02) ? COND_NZ : COND_Z, skip); // jmp skip,nz/z
}
if (!(bo & 0x10))
{
- UML_TEST(block, CR32(bi / 4), 8 >> (bi % 4)); // test cr32(bi/4),8 >> (bi % 4)
- UML_JMPc(block, (bo & 0x08) ? COND_Z : COND_NZ, skip); // jmp skip,z/nz
+ UML_TEST(block, CR32(bi / 4), 8 >> (bi % 4)); // test cr32(bi/4),8 >> (bi % 4)
+ UML_JMPc(block, (bo & 0x08) ? COND_Z : COND_NZ, skip); // jmp skip,z/nz
}
- generate_branch(ppc, block, compiler, desc, source, link); // <branch>
- UML_LABEL(block, skip); // skip:
+ generate_branch(ppc, block, compiler, desc, source, link); // <branch>
+ UML_LABEL(block, skip); // skip:
}
@@ -2424,14 +2424,14 @@ static int generate_opcode(powerpc_state *ppc, drcuml_block *block, compiler_sta
switch (opswitch)
{
- case 0x02: /* TDI - 64-bit only */
- case 0x1e: /* 0x1e group - 64-bit only */
- case 0x3a: /* 0x3a group - 64-bit only */
- case 0x3e: /* 0x3e group - 64-bit only */
+ case 0x02: /* TDI - 64-bit only */
+ case 0x1e: /* 0x1e group - 64-bit only */
+ case 0x3a: /* 0x3a group - 64-bit only */
+ case 0x3e: /* 0x3e group - 64-bit only */
return FALSE;
- case 0x03: /* TWI */
- UML_CMP(block, R32(G_RA(op)), (INT16)G_SIMM(op)); // cmp ra,simm
+ case 0x03: /* TWI */
+ UML_CMP(block, R32(G_RA(op)), (INT16)G_SIMM(op)); // cmp ra,simm
if (G_TO(op) & 0x10)
UML_EXHc(block, COND_L, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x20000);// exh program,0x20000,l
if (G_TO(op) & 0x08)
@@ -2444,351 +2444,351 @@ static int generate_opcode(powerpc_state *ppc, drcuml_block *block, compiler_sta
UML_EXHc(block, COND_A, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x20000);// exh program,0x20000,a
return TRUE;
- case 0x07: /* MULLI */
+ case 0x07: /* MULLI */
UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op));
// muls rd,rd,ra,simm
return TRUE;
- case 0x0e: /* ADDI */
- UML_ADD(block, R32(G_RD(op)), R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
+ case 0x0e: /* ADDI */
+ UML_ADD(block, R32(G_RD(op)), R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
return TRUE;
- case 0x0f: /* ADDIS */
- UML_ADD(block, R32(G_RD(op)), R32Z(G_RA(op)), G_SIMM(op) << 16); // add rd,ra,simm << 16
+ case 0x0f: /* ADDIS */
+ UML_ADD(block, R32(G_RD(op)), R32Z(G_RA(op)), G_SIMM(op) << 16); // add rd,ra,simm << 16
return TRUE;
- case 0x0a: /* CMPLI */
- UML_CMP(block, R32(G_RA(op)), G_UIMM(op)); // cmp ra,uimm
- UML_GETFLGS(block, I0, FLAG_Z | FLAG_C); // getflgs i0,zc
+ case 0x0a: /* CMPLI */
+ UML_CMP(block, R32(G_RA(op)), G_UIMM(op)); // cmp ra,uimm
+ UML_GETFLGS(block, I0, FLAG_Z | FLAG_C); // getflgs i0,zc
UML_LOAD(block, I0, ppc->impstate->cmpl_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,cmpl_cr_table,i0,byte
- UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
return TRUE;
- case 0x0b: /* CMPI */
- UML_CMP(block, R32(G_RA(op)), (INT16)G_SIMM(op)); // cmp ra,uimm
- UML_GETFLGS(block, I0, FLAG_Z | FLAG_V | FLAG_C | FLAG_S); // getflgs i0,zvcs
+ case 0x0b: /* CMPI */
+ UML_CMP(block, R32(G_RA(op)), (INT16)G_SIMM(op)); // cmp ra,uimm
+ UML_GETFLGS(block, I0, FLAG_Z | FLAG_V | FLAG_C | FLAG_S); // getflgs i0,zvcs
UML_LOAD(block, I0, ppc->impstate->cmp_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,cmp_cr_table,i0,byte
- UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
return TRUE;
- case 0x08: /* SUBFIC */
- UML_SUB(block, R32(G_RD(op)), (INT16)G_SIMM(op), R32(G_RA(op))); // sub rd,simm,ra
- generate_compute_flags(ppc, block, desc, FALSE, XER_CA, TRUE); // <update flags>
+ case 0x08: /* SUBFIC */
+ UML_SUB(block, R32(G_RD(op)), (INT16)G_SIMM(op), R32(G_RA(op))); // sub rd,simm,ra
+ generate_compute_flags(ppc, block, desc, FALSE, XER_CA, TRUE); // <update flags>
return TRUE;
- case 0x0c: /* ADDIC */
- UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
- generate_compute_flags(ppc, block, desc, FALSE, XER_CA, FALSE); // <update flags>
+ case 0x0c: /* ADDIC */
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
+ generate_compute_flags(ppc, block, desc, FALSE, XER_CA, FALSE); // <update flags>
return TRUE;
- case 0x0d: /* ADDIC. */
- UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
- generate_compute_flags(ppc, block, desc, TRUE, XER_CA, FALSE); // <update flags>
+ case 0x0d: /* ADDIC. */
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), (INT16)G_SIMM(op)); // add rd,ra,simm
+ generate_compute_flags(ppc, block, desc, TRUE, XER_CA, FALSE); // <update flags>
return TRUE;
- case 0x10: /* BCx */
+ case 0x10: /* BCx */
generate_branch_bo(ppc, block, compiler, desc, G_BO(op), G_BI(op), 0, op & M_LK);// <branch conditional>
return TRUE;
- case 0x11: /* SC */
- UML_MAPVAR(block, MAPVAR_PC, desc->pc + 4); // mapvar PC,desc->pc+4
- UML_EXH(block, *ppc->impstate->exception[EXCEPTION_SYSCALL], 0); // exh syscall,0
+ case 0x11: /* SC */
+ UML_MAPVAR(block, MAPVAR_PC, desc->pc + 4); // mapvar PC,desc->pc+4
+ UML_EXH(block, *ppc->impstate->exception[EXCEPTION_SYSCALL], 0); // exh syscall,0
return TRUE;
- case 0x12: /* Bx */
- generate_branch(ppc, block, compiler, desc, 0, op & M_LK); // <branch>
+ case 0x12: /* Bx */
+ generate_branch(ppc, block, compiler, desc, 0, op & M_LK); // <branch>
return TRUE;
- case 0x13: /* 0x13 group */
- return generate_instruction_13(ppc, block, compiler, desc); // <group13>
+ case 0x13: /* 0x13 group */
+ return generate_instruction_13(ppc, block, compiler, desc); // <group13>
- case 0x14: /* RLWIMIx */
+ case 0x14: /* RLWIMIx */
UML_ROLINS(block, R32(G_RA(op)), R32(G_RS(op)), G_SH(op), compute_rlw_mask(G_MB(op), G_ME(op)));
// rolins ra,rs,sh,mask
if (op & M_RC)
- generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
+ generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
return TRUE;
- case 0x15: /* RLWINMx */
+ case 0x15: /* RLWINMx */
UML_ROLAND(block, R32(G_RA(op)), R32(G_RS(op)), G_SH(op), compute_rlw_mask(G_MB(op), G_ME(op)));
// roland ra,rs,sh,mask
if (op & M_RC)
- generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
+ generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
return TRUE;
- case 0x17: /* RLWNMx */
+ case 0x17: /* RLWNMx */
UML_ROLAND(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)), compute_rlw_mask(G_MB(op), G_ME(op)));
// roland ra,rs,rb,mask
if (op & M_RC)
- generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
+ generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
return TRUE;
- case 0x18: /* ORI */
- UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op)); // or ra,rs,uimm
+ case 0x18: /* ORI */
+ UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op)); // or ra,rs,uimm
return TRUE;
- case 0x19: /* ORIS */
- UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op) << 16); // or ra,rs,uimm << 16
+ case 0x19: /* ORIS */
+ UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op) << 16); // or ra,rs,uimm << 16
return TRUE;
- case 0x1a: /* XORI */
- UML_XOR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op)); // xor ra,rs,uimm
+ case 0x1a: /* XORI */
+ UML_XOR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op)); // xor ra,rs,uimm
return TRUE;
- case 0x1b: /* XORIS */
- UML_XOR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op) << 16); // xor ra,rs,uimm << 16
+ case 0x1b: /* XORIS */
+ UML_XOR(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op) << 16); // xor ra,rs,uimm << 16
return TRUE;
- case 0x1c: /* ANDI. */
- UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op)); // and ra,rs,uimm
- generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
+ case 0x1c: /* ANDI. */
+ UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op)); // and ra,rs,uimm
+ generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
return TRUE;
- case 0x1d: /* ANDIS. */
- UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op) << 16); // and ra,rs,uimm << 16
- generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
+ case 0x1d: /* ANDIS. */
+ UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), G_UIMM(op) << 16); // and ra,rs,uimm << 16
+ generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
return TRUE;
- case 0x1f: /* 0x1f group */
- return generate_instruction_1f(ppc, block, compiler, desc); // <group1f>
+ case 0x1f: /* 0x1f group */
+ return generate_instruction_1f(ppc, block, compiler, desc); // <group1f>
- case 0x22: /* LBZ */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
- UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x22: /* LBZ */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
+ UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x28: /* LHZ */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x28: /* LHZ */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x2a: /* LHA */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x2a: /* LHA */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x20: /* LWZ */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x20: /* LWZ */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x23: /* LBZU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
- UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x23: /* LBZU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
+ UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x29: /* LHZU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x29: /* LHZU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x2b: /* LHAU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x2b: /* LHAU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x21: /* LWZU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x21: /* LWZU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x26: /* STB */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x26: /* STB */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x2c: /* STH */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x24: /* STW */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x27: /* STBU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x2d: /* STHU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x25: /* STWU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x2e: /* LMW */
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_MOV(block, mem(&ppc->impstate->tempaddr), R32Z(G_RA(op))); // mov [tempaddr],ra
+ case 0x2c: /* STH */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x24: /* STW */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x27: /* STBU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x2d: /* STHU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x25: /* STWU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x2e: /* LMW */
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), R32Z(G_RA(op))); // mov [tempaddr],ra
for (regnum = G_RD(op); regnum < 32; regnum++)
{
UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), (INT16)G_SIMM(op) + 4 * (regnum - G_RD(op)));
// add i0,[tempaddr],simm + 4*(regnum-rd)
- UML_CALLH(block, *ppc->impstate->read32align[ppc->impstate->mode]); // callh read32align
- UML_MOV(block, R32(regnum), I0); // mov regnum,i0
+ UML_CALLH(block, *ppc->impstate->read32align[ppc->impstate->mode]); // callh read32align
+ UML_MOV(block, R32(regnum), I0); // mov regnum,i0
}
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x2f: /* STMW */
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_MOV(block, mem(&ppc->impstate->tempaddr), R32Z(G_RA(op))); // mov [tempaddr],ra
+ case 0x2f: /* STMW */
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_MOV(block, mem(&ppc->impstate->tempaddr), R32Z(G_RA(op))); // mov [tempaddr],ra
for (regnum = G_RS(op); regnum < 32; regnum++)
{
UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), (INT16)G_SIMM(op) + 4 * (regnum - G_RS(op)));
// add i0,[tempaddr],simm + 4*(regnum-rs)
- UML_MOV(block, I1, R32(regnum)); // mov i1,regnum
- UML_CALLH(block, *ppc->impstate->write32align[ppc->impstate->mode]); // callh write32align
+ UML_MOV(block, I1, R32(regnum)); // mov i1,regnum
+ UML_CALLH(block, *ppc->impstate->write32align[ppc->impstate->mode]); // callh write32align
}
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x30: /* LFS */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
- UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x32: /* LFD */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
- UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
- UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x31: /* LFSU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
- UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x33: /* LFDU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
- UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
- UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x34: /* STFS */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
- UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x36: /* STFD */
- UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
- UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
- UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x35: /* STFSU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
- UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x37: /* STFDU */
- UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
- UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
- UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
- UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x3b: /* 0x3b group */
- return generate_instruction_3b(ppc, block, compiler, desc); // <group3b>
-
- case 0x3f: /* 0x3f group */
- return generate_instruction_3f(ppc, block, compiler, desc); // <group3f>
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x30: /* LFS */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
+ UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x32: /* LFD */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
+ UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
+ UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x31: /* LFSU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
+ UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x33: /* LFDU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
+ UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
+ UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x34: /* STFS */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
+ UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x36: /* STFD */
+ UML_ADD(block, I0, R32Z(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
+ UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op)); // mapvar dsisr,DSISR_IMM(op)
+ UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x35: /* STFSU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
+ UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x37: /* STFDU */
+ UML_ADD(block, I0, R32(G_RA(op)), (INT16)G_SIMM(op)); // add i0,ra,simm
+ UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
+ UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op)); // mapvar dsisr,DSISR_IMMU(op)
+ UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x3b: /* 0x3b group */
+ return generate_instruction_3b(ppc, block, compiler, desc); // <group3b>
+
+ case 0x3f: /* 0x3f group */
+ return generate_instruction_3f(ppc, block, compiler, desc); // <group3f>
}
return FALSE;
@@ -2807,123 +2807,123 @@ static int generate_instruction_13(powerpc_state *ppc, drcuml_block *block, comp
switch (opswitch)
{
- case 0x010: /* BCLRx */
+ case 0x010: /* BCLRx */
generate_branch_bo(ppc, block, compiler, desc, G_BO(op), G_BI(op), SPR_LR, op & M_LK);// <branch conditional>
return TRUE;
- case 0x210: /* BCCTRx */
+ case 0x210: /* BCCTRx */
generate_branch_bo(ppc, block, compiler, desc, G_BO(op), G_BI(op), SPR_CTR, op & M_LK);
// <branch conditional>
return TRUE;
- case 0x000: /* MCRF */
- UML_MOV(block, CR32(G_CRFD(op)), CR32(G_CRFS(op))); // mov [crd],[crs]
+ case 0x000: /* MCRF */
+ UML_MOV(block, CR32(G_CRFD(op)), CR32(G_CRFS(op))); // mov [crd],[crs]
return TRUE;
- case 0x101: /* CRAND */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_AND(block, I0, I0, I1); // and i0,i1
+ case 0x101: /* CRAND */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_AND(block, I0, I0, I1); // and i0,i1
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x081: /* CRANDC */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_XOR(block, I1, I1, ~0); // xor i1,~0
- UML_AND(block, I0, I0, I1); // and i0,i1
+ case 0x081: /* CRANDC */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_XOR(block, I1, I1, ~0); // xor i1,~0
+ UML_AND(block, I0, I0, I1); // and i0,i1
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x0e1: /* CRNAND */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_AND(block, I0, I0, I1); // and i0,i1
- UML_XOR(block, I0, I0, ~0); // xor i0,~0
+ case 0x0e1: /* CRNAND */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_AND(block, I0, I0, I1); // and i0,i1
+ UML_XOR(block, I0, I0, ~0); // xor i0,~0
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x1c1: /* CROR */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_OR(block, I0, I0, I1); // or i0,i1
+ case 0x1c1: /* CROR */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_OR(block, I0, I0, I1); // or i0,i1
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x1a1: /* CRORC */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_XOR(block, I1, I1, ~0); // xor i1,~0
- UML_OR(block, I0, I0, I1); // or i0,i1
+ case 0x1a1: /* CRORC */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_XOR(block, I1, I1, ~0); // xor i1,~0
+ UML_OR(block, I0, I0, I1); // or i0,i1
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x021: /* CRNOR */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_OR(block, I0, I0, I1); // or i0,i1
- UML_XOR(block, I0, I0, ~0); // xor i0,~0
+ case 0x021: /* CRNOR */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_OR(block, I0, I0, I1); // or i0,i1
+ UML_XOR(block, I0, I0, ~0); // xor i0,~0
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x0c1: /* CRXOR */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_XOR(block, I0, I0, I1); // xor i0,i1
+ case 0x0c1: /* CRXOR */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_XOR(block, I0, I0, I1); // xor i0,i1
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x121: /* CREQV */
- UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
- UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
- UML_XOR(block, I0, I0, I1); // xor i0,i1
- UML_XOR(block, I0, I0, ~0); // xor i0,~0
+ case 0x121: /* CREQV */
+ UML_SHL(block, I0, CR32(G_CRBA(op) / 4), G_CRBA(op) % 4); // shl i0,cr(a / 4),a % 4
+ UML_SHL(block, I1, CR32(G_CRBB(op) / 4), G_CRBB(op) % 4); // shl i1,cr(b / 4),b % 4
+ UML_XOR(block, I0, I0, I1); // xor i0,i1
+ UML_XOR(block, I0, I0, ~0); // xor i0,~0
UML_ROLINS(block, CR32(G_CRBD(op) / 4), I0, 32 - G_CRBD(op) % 4, 8 >> (G_CRBD(op) % 4));
// rolins cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
return TRUE;
- case 0x032: /* RFI */
+ case 0x032: /* RFI */
if (ppc->cap & PPCCAP_OEA)
{
if (!(ppc->cap & PPCCAP_603_MMU))
- UML_ROLINS(block, MSR32, SPR32(SPROEA_SRR1), 0, 0x87c0ffff); // rolins [msr],[srr1],0,0x87c0ffff
+ UML_ROLINS(block, MSR32, SPR32(SPROEA_SRR1), 0, 0x87c0ffff); // rolins [msr],[srr1],0,0x87c0ffff
else
{
- UML_MOV(block, I0, MSR32); // mov i0,[msr]
+ UML_MOV(block, I0, MSR32); // mov i0,[msr]
UML_ROLINS(block, MSR32, SPR32(SPROEA_SRR1), 0, 0x87c0ffff | MSR603_TGPR);
// rolins [msr],[srr1],0,0x87c0ffff | MSR603_TGPR
- UML_XOR(block, I0, I0, MSR32); // xor i0,i0,[msr]
- UML_TEST(block, I0, MSR603_TGPR); // test i0,tgpr
- UML_CALLHc(block, COND_NZ, *ppc->impstate->swap_tgpr); // callh swap_tgpr,nz
+ UML_XOR(block, I0, I0, MSR32); // xor i0,i0,[msr]
+ UML_TEST(block, I0, MSR603_TGPR); // test i0,tgpr
+ UML_CALLHc(block, COND_NZ, *ppc->impstate->swap_tgpr); // callh swap_tgpr,nz
}
}
else if (ppc->cap & PPCCAP_4XX)
- UML_MOV(block, MSR32, SPR32(SPR4XX_SRR1)); // mov [msr],[srr1]
- generate_update_mode(ppc, block); // <update mode>
+ UML_MOV(block, MSR32, SPR32(SPR4XX_SRR1)); // mov [msr],[srr1]
+ generate_update_mode(ppc, block); // <update mode>
compiler->checkints = TRUE;
- generate_update_cycles(ppc, block, compiler, SPR32(SPROEA_SRR0), TRUE); // <subtract cycles>
+ generate_update_cycles(ppc, block, compiler, SPR32(SPROEA_SRR0), TRUE); // <subtract cycles>
UML_HASHJMP(block, mem(&ppc->impstate->mode), SPR32(SPROEA_SRR0), *ppc->impstate->nocode);
// hashjmp mode,[srr0],nocode
return TRUE;
- case 0x033: /* RFCI */
+ case 0x033: /* RFCI */
assert(ppc->cap & PPCCAP_4XX);
- UML_MOV(block, MSR32, SPR32(SPR4XX_SRR3)); // mov [msr],[srr3]
- generate_update_mode(ppc, block); // <update mode>
+ UML_MOV(block, MSR32, SPR32(SPR4XX_SRR3)); // mov [msr],[srr3]
+ generate_update_mode(ppc, block); // <update mode>
compiler->checkints = TRUE;
- generate_update_cycles(ppc, block, compiler, SPR32(SPR4XX_SRR2), TRUE); // <subtract cycles>
+ generate_update_cycles(ppc, block, compiler, SPR32(SPR4XX_SRR2), TRUE); // <subtract cycles>
UML_HASHJMP(block, mem(&ppc->impstate->mode), SPR32(SPR4XX_SRR2), *ppc->impstate->nocode);
// hashjmp mode,[srr2],nocode
return TRUE;
- case 0x096: /* ISYNC */
+ case 0x096: /* ISYNC */
/* effective no-op */
return TRUE;
}
@@ -2945,36 +2945,36 @@ static int generate_instruction_1f(powerpc_state *ppc, drcuml_block *block, comp
switch (opswitch)
{
- case 0x009: /* MULHDUx - 64-bit only */
- case 0x015: /* LDX - 64-bit only */
- case 0x01b: /* SLDx - 64-bit only */
- case 0x035: /* LDUX - 64-bit only */
- case 0x03a: /* CNTLZDx - 64-bit only */
- case 0x044: /* TD - 64-bit only */
- case 0x049: /* MULHDx - 64-bit only */
- case 0x054: /* LDARX - 64-bit only */
- case 0x095: /* STDX - 64-bit only */
- case 0x0b5: /* STDUX - 64-bit only */
- case 0x0d6: /* STDCX. - 64-bit only */
- case 0x0e9: /* MULLD - 64-bit only */
- case 0x2e9: /* MULLDO - 64-bit only */
- case 0x155: /* LWAX - 64-bit only */
- case 0x175: /* LWAUX - 64-bit only */
+ case 0x009: /* MULHDUx - 64-bit only */
+ case 0x015: /* LDX - 64-bit only */
+ case 0x01b: /* SLDx - 64-bit only */
+ case 0x035: /* LDUX - 64-bit only */
+ case 0x03a: /* CNTLZDx - 64-bit only */
+ case 0x044: /* TD - 64-bit only */
+ case 0x049: /* MULHDx - 64-bit only */
+ case 0x054: /* LDARX - 64-bit only */
+ case 0x095: /* STDX - 64-bit only */
+ case 0x0b5: /* STDUX - 64-bit only */
+ case 0x0d6: /* STDCX. - 64-bit only */
+ case 0x0e9: /* MULLD - 64-bit only */
+ case 0x2e9: /* MULLDO - 64-bit only */
+ case 0x155: /* LWAX - 64-bit only */
+ case 0x175: /* LWAUX - 64-bit only */
case 0x33a: /* SRADIx - 64-bit only */
case 0x33b: /* SRADIx - 64-bit only */
- case 0x1b2: /* SLBIE - 64-bit only */
- case 0x1c9: /* DIVDUx - 64-bit only */
- case 0x3c9: /* DIVDUOx - 64-bit only */
- case 0x1e9: /* DIVDx - 64-bit only */
- case 0x3e9: /* DIVDOx - 64-bit only */
- case 0x1f2: /* SLBIA - 64-bit only */
- case 0x21b: /* SRDx - 64-bit only */
- case 0x31a: /* SRADx - 64-bit only */
- case 0x3da: /* EXTSW - 64-bit only */
+ case 0x1b2: /* SLBIE - 64-bit only */
+ case 0x1c9: /* DIVDUx - 64-bit only */
+ case 0x3c9: /* DIVDUOx - 64-bit only */
+ case 0x1e9: /* DIVDx - 64-bit only */
+ case 0x3e9: /* DIVDOx - 64-bit only */
+ case 0x1f2: /* SLBIA - 64-bit only */
+ case 0x21b: /* SRDx - 64-bit only */
+ case 0x31a: /* SRADx - 64-bit only */
+ case 0x3da: /* EXTSW - 64-bit only */
return FALSE;
- case 0x004: /* TW */
- UML_CMP(block, R32(G_RA(op)), R32(G_RB(op))); // cmp ra,rb
+ case 0x004: /* TW */
+ UML_CMP(block, R32(G_RA(op)), R32(G_RB(op))); // cmp ra,rb
if (G_TO(op) & 0x10)
UML_EXHc(block, COND_L, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x20000);// exh program,0x20000,l
if (G_TO(op) & 0x08)
@@ -2987,924 +2987,924 @@ static int generate_instruction_1f(powerpc_state *ppc, drcuml_block *block, comp
UML_EXHc(block, COND_A, *ppc->impstate->exception[EXCEPTION_PROGRAM], 0x20000);// exh program,0x20000,a
return TRUE;
- case 0x10a: /* ADDx */
- case 0x30a: /* ADDOx */
- UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // add rd,ra,rb
+ case 0x10a: /* ADDx */
+ case 0x30a: /* ADDOx */
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // add rd,ra,rb
generate_compute_flags(ppc, block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);
// <update flags>
- return TRUE;
+ return TRUE;
- case 0x00a: /* ADDCx */
- case 0x20a: /* ADDCOx */
- UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // add rd,ra,rb
+ case 0x00a: /* ADDCx */
+ case 0x20a: /* ADDCOx */
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // add rd,ra,rb
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
// <update flags>
return TRUE;
- case 0x08a: /* ADDEx */
- case 0x28a: /* ADDEOx */
- UML_CARRY(block, SPR32(SPR_XER), 29); // carry [xer],XER_CA
- UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // addc rd,ra,rb
+ case 0x08a: /* ADDEx */
+ case 0x28a: /* ADDEOx */
+ UML_CARRY(block, SPR32(SPR_XER), 29); // carry [xer],XER_CA
+ UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // addc rd,ra,rb
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
// <update flags>
return TRUE;
- case 0x0ca: /* ADDZEx */
- case 0x2ca: /* ADDZEOx */
- UML_CARRY(block, SPR32(SPR_XER), 29); // carry [xer],XER_CA
- UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), 0); // addc rd,ra,0
+ case 0x0ca: /* ADDZEx */
+ case 0x2ca: /* ADDZEOx */
+ UML_CARRY(block, SPR32(SPR_XER), 29); // carry [xer],XER_CA
+ UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), 0); // addc rd,ra,0
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
// <update flags>
return TRUE;
- case 0x0ea: /* ADDMEx */
- case 0x2ea: /* ADDMEOx */
- UML_CARRY(block, SPR32(SPR_XER), 29); // carry [xer],XER_CA
- UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), (UINT32)-1); // addc rd,ra,-1
+ case 0x0ea: /* ADDMEx */
+ case 0x2ea: /* ADDMEOx */
+ UML_CARRY(block, SPR32(SPR_XER), 29); // carry [xer],XER_CA
+ UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), (UINT32)-1); // addc rd,ra,-1
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
// <update flags>
return TRUE;
- case 0x028: /* SUBFx */
- case 0x228: /* SUBFOx */
- UML_SUB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op))); // sub rd,rb,ra
+ case 0x028: /* SUBFx */
+ case 0x228: /* SUBFOx */
+ UML_SUB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op))); // sub rd,rb,ra
generate_compute_flags(ppc, block, desc, op & M_RC, (op & M_OE) ? XER_OV : 0, TRUE);
// <update flags>
return TRUE;
- case 0x008: /* SUBFCx */
- case 0x208: /* SUBFCOx */
- UML_SUB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op))); // sub rd,rb,ra
+ case 0x008: /* SUBFCx */
+ case 0x208: /* SUBFCOx */
+ UML_SUB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op))); // sub rd,rb,ra
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
// <update flags>
return TRUE;
- case 0x088: /* SUBFEx */
- case 0x288: /* SUBFEOx */
- UML_XOR(block, I0, SPR32(SPR_XER), XER_CA); // xor i0,[xer],XER_CA
- UML_CARRY(block, I0, 29); // carry i0,XER_CA
- UML_SUBB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op))); // subc rd,rb,ra
+ case 0x088: /* SUBFEx */
+ case 0x288: /* SUBFEOx */
+ UML_XOR(block, I0, SPR32(SPR_XER), XER_CA); // xor i0,[xer],XER_CA
+ UML_CARRY(block, I0, 29); // carry i0,XER_CA
+ UML_SUBB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op))); // subc rd,rb,ra
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
// <update flags>
return TRUE;
- case 0x0c8: /* SUBFZEx */
- case 0x2c8: /* SUBFZEOx */
- UML_XOR(block, I0, SPR32(SPR_XER), XER_CA); // xor i0,[xer],XER_CA
- UML_CARRY(block, I0, 29); // carry i0,XER_CA
- UML_SUBB(block, R32(G_RD(op)), 0, R32(G_RA(op))); // subc rd,0,ra
+ case 0x0c8: /* SUBFZEx */
+ case 0x2c8: /* SUBFZEOx */
+ UML_XOR(block, I0, SPR32(SPR_XER), XER_CA); // xor i0,[xer],XER_CA
+ UML_CARRY(block, I0, 29); // carry i0,XER_CA
+ UML_SUBB(block, R32(G_RD(op)), 0, R32(G_RA(op))); // subc rd,0,ra
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
// <update flags>
return TRUE;
- case 0x0e8: /* SUBFMEx */
- case 0x2e8: /* SUBFMEOx */
- UML_XOR(block, I0, SPR32(SPR_XER), XER_CA); // xor i0,[xer],XER_CA
- UML_CARRY(block, I0, 29); // carry i0,XER_CA
- UML_SUBB(block, R32(G_RD(op)), (UINT32)-1, R32(G_RA(op))); // subc rd,-1,ra
+ case 0x0e8: /* SUBFMEx */
+ case 0x2e8: /* SUBFMEOx */
+ UML_XOR(block, I0, SPR32(SPR_XER), XER_CA); // xor i0,[xer],XER_CA
+ UML_CARRY(block, I0, 29); // carry i0,XER_CA
+ UML_SUBB(block, R32(G_RD(op)), (UINT32)-1, R32(G_RA(op))); // subc rd,-1,ra
generate_compute_flags(ppc, block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
// <update flags>
return TRUE;
- case 0x068: /* NEGx */
- case 0x268: /* NEGOx */
- UML_SUB(block, R32(G_RD(op)), 0, R32(G_RA(op))); // sub rd,0,ra
+ case 0x068: /* NEGx */
+ case 0x268: /* NEGOx */
+ UML_SUB(block, R32(G_RD(op)), 0, R32(G_RA(op))); // sub rd,0,ra
generate_compute_flags(ppc, block, desc, op & M_RC, (op & M_OE) ? XER_OV : 0, TRUE);
// <update flags>
return TRUE;
- case 0x000: /* CMP */
- UML_CMP(block, R32(G_RA(op)), R32(G_RB(op))); // cmp ra,rb
- UML_GETFLGS(block, I0, FLAG_Z | FLAG_V | FLAG_C | FLAG_S); // getflgs i0,zvcs
+ case 0x000: /* CMP */
+ UML_CMP(block, R32(G_RA(op)), R32(G_RB(op))); // cmp ra,rb
+ UML_GETFLGS(block, I0, FLAG_Z | FLAG_V | FLAG_C | FLAG_S); // getflgs i0,zvcs
UML_LOAD(block, I0, ppc->impstate->cmp_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,cmp_cr_table,i0,byte
- UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
return TRUE;
- case 0x020: /* CMPL */
- UML_CMP(block, R32(G_RA(op)), R32(G_RB(op))); // cmp ra,rb
- UML_GETFLGS(block, I0, FLAG_Z | FLAG_C); // getflgs i0,zc
+ case 0x020: /* CMPL */
+ UML_CMP(block, R32(G_RA(op)), R32(G_RB(op))); // cmp ra,rb
+ UML_GETFLGS(block, I0, FLAG_Z | FLAG_C); // getflgs i0,zc
UML_LOAD(block, I0, ppc->impstate->cmpl_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,cmpl_cr_table,i0,byte
- UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
return TRUE;
- case 0x00b: /* MULHWUx */
- UML_MULU(block, I0, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // mulu i0,rd,ra,rb
+ case 0x00b: /* MULHWUx */
+ UML_MULU(block, I0, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // mulu i0,rd,ra,rb
if (op & M_RC)
{
- UML_TEST(block, R32(G_RD(op)), ~0); // test rd,~0
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ UML_TEST(block, R32(G_RD(op)), ~0); // test rd,~0
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
}
return TRUE;
- case 0x04b: /* MULHWx */
- UML_MULS(block, I0, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // muls i0,rd,ra,rb
+ case 0x04b: /* MULHWx */
+ UML_MULS(block, I0, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // muls i0,rd,ra,rb
if (op & M_RC)
{
- UML_TEST(block, R32(G_RD(op)), ~0); // test rd,~0
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ UML_TEST(block, R32(G_RD(op)), ~0); // test rd,~0
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
}
return TRUE;
- case 0x0eb: /* MULLWx */
- case 0x2eb: /* MULLWOx */
- UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // muls rd,rd,ra,rb
+ case 0x0eb: /* MULLWx */
+ case 0x2eb: /* MULLWOx */
+ UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // muls rd,rd,ra,rb
generate_compute_flags(ppc, block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
return TRUE;
- case 0x1cb: /* DIVWUx */
- case 0x3cb: /* DIVWUOx */
- UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // bne 0:
-
- UML_MOV(block, R32(G_RD(op)), 0x0); // mov rd, #0
- if (op & M_OE)
- {
- UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
- UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
- }
- if (op & M_RC)
- {
- UML_MOV(block, CR32(0), 0x2); // CR = EQ
- UML_AND(block, CR32(0), CR32(0), ~0x1);
- UML_OR(block, CR32(0), CR32(0), XERSO32);
- }
-
- UML_JMP(block, compiler->labelnum+1); // jmp 1:
-
- UML_LABEL(block, compiler->labelnum++); // 0:
- UML_DIVU(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // divu rd,rd,ra,rb
+ case 0x1cb: /* DIVWUx */
+ case 0x3cb: /* DIVWUOx */
+ UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // bne 0:
+
+ UML_MOV(block, R32(G_RD(op)), 0x0); // mov rd, #0
+ if (op & M_OE)
+ {
+ UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
+ UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
+ }
+ if (op & M_RC)
+ {
+ UML_MOV(block, CR32(0), 0x2); // CR = EQ
+ UML_AND(block, CR32(0), CR32(0), ~0x1);
+ UML_OR(block, CR32(0), CR32(0), XERSO32);
+ }
+
+ UML_JMP(block, compiler->labelnum+1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_DIVU(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // divu rd,rd,ra,rb
generate_compute_flags(ppc, block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
- UML_LABEL(block, compiler->labelnum++); // 1:
+ UML_LABEL(block, compiler->labelnum++); // 1:
return TRUE;
- case 0x1eb: /* DIVWx */
- case 0x3eb: /* DIVWOx */
- UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // bne 0:
- UML_CMP(block, R32(G_RA(op)), 0x80000000); // cmp rb, #80000000
- UML_JMPc(block, COND_AE, compiler->labelnum); // bae 0:
+ case 0x1eb: /* DIVWx */
+ case 0x3eb: /* DIVWOx */
+ UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // bne 0:
+ UML_CMP(block, R32(G_RA(op)), 0x80000000); // cmp rb, #80000000
+ UML_JMPc(block, COND_AE, compiler->labelnum); // bae 0:
+
+ UML_MOV(block, R32(G_RD(op)), 0x0); // move rd, #0
+ if (op & M_OE)
+ {
+ UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
+ UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
+ }
+ if (op & M_RC)
+ {
+ UML_MOV(block, CR32(0), 0x2); // CR = EQ
+ UML_AND(block, CR32(0), CR32(0), ~0x1);
+ UML_OR(block, CR32(0), CR32(0), XERSO32);
+ }
+
+ UML_JMP(block, compiler->labelnum+3); // jmp 3:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
+ UML_JMPc(block, COND_Z, compiler->labelnum); // beq 1:
+
+ UML_CMP(block, R32(G_RB(op)), 0xffffffff); // cmp rb, #ffffffff
+ UML_JMPc(block, COND_NZ, compiler->labelnum+1); // bne 2:
+ UML_CMP(block, R32(G_RA(op)), 0x80000000); // cmp ra, #80000000
+ UML_JMPc(block, COND_NZ, compiler->labelnum+1); // bne 2:
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ UML_MOV(block, R32(G_RD(op)), 0xffffffff); // move rd, #ffffffff
+ if (op & M_OE)
+ {
+ UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
+ UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
+ }
+ if (op & M_RC)
+ {
+ UML_MOV(block, CR32(0), 0x8); // CR = LT
+ UML_AND(block, CR32(0), CR32(0), ~0x1);
+ UML_OR(block, CR32(0), CR32(0), XERSO32);
+ }
+ UML_JMP(block, compiler->labelnum+1); // jmp 3:
+
+ UML_LABEL(block, compiler->labelnum++); // 2:
+ UML_DIVS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // divs rd,rd,ra,rb
+ generate_compute_flags(ppc, block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
+
+ UML_LABEL(block, compiler->labelnum++); // 3:
+ return TRUE;
+
+ case 0x01c: /* ANDx */
+ UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // and ra,rs,rb
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x03c: /* ANDCx */
+ UML_XOR(block, I0, R32(G_RB(op)), ~0); // xor i0,rb,~0
+ UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), I0); // and ra,rs,i0
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x1dc: /* NANDx */
+ UML_AND(block, I0, R32(G_RS(op)), R32(G_RB(op))); // and i0,rs,rb
+ UML_XOR(block, R32(G_RA(op)), I0, ~0); // xor ra,i0,~0
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x1bc: /* ORx */
+ UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // or ra,rs,rb
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x19c: /* ORCx */
+ UML_XOR(block, I0, R32(G_RB(op)), ~0); // xor i0,rb,~0
+ UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), I0); // or ra,rs,i0
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x07c: /* NORx */
+ UML_OR(block, I0, R32(G_RS(op)), R32(G_RB(op))); // or i0,rs,rb
+ UML_XOR(block, R32(G_RA(op)), I0, ~0); // xor ra,i0,~0
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x13c: /* XORx */
+ UML_XOR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // xor ra,rs,rb
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x11c: /* EQVx */
+ UML_XOR(block, I0, R32(G_RS(op)), R32(G_RB(op))); // xor i0,rs,rb
+ UML_XOR(block, R32(G_RA(op)), I0, ~0); // xor ra,i0,~0
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x018: /* SLWx */
+ UML_AND(block, I0, R32(G_RB(op)), 0x3f); // and i0, rb, 0x3f
+ UML_CMP(block, I0, 31); // cmp i0, #31
+ UML_JMPc(block, COND_BE, compiler->labelnum); // be 0:
+
+ UML_MOV(block, R32(G_RA(op)), 0x0); // mov ra, #0
+ if (op & M_RC)
+ {
+ UML_MOV(block, CR32(0), 0x2); // CR = EQ
+ UML_AND(block, CR32(0), CR32(0), ~0x1);
+ UML_OR(block, CR32(0), CR32(0), XERSO32);
+ }
+ UML_JMP(block, compiler->labelnum+1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_SHL(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // shl ra,rs,rb
+ // calculate S and Z flags
+ if (op & M_RC)
+ {
+ generate_shift_flags(ppc, block, desc, op);
+ }
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ return TRUE;
+
+ case 0x218: /* SRWx */
+ UML_AND(block, I0, R32(G_RB(op)), 0x3f); // and i0, rb, 0x3f
+ UML_CMP(block, I0, 31); // cmp i0, #31
+ UML_JMPc(block, COND_BE, compiler->labelnum); // be 0:
+
+ UML_MOV(block, R32(G_RA(op)), 0x0); // mov ra, #0
+ if (op & M_RC)
+ {
+ UML_MOV(block, CR32(0), 0x2); // CR = EQ
+ UML_AND(block, CR32(0), CR32(0), ~0x1);
+ UML_OR(block, CR32(0), CR32(0), XERSO32);
+ }
+ UML_JMP(block, compiler->labelnum+1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_SHR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // shr ra,i0,rb
+ // calculate S and Z flags
+ if (op & M_RC)
+ {
+ generate_shift_flags(ppc, block, desc, op);
+ }
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ return TRUE;
+
+ case 0x318: /* SRAWx */
+ UML_AND(block, I2, R32(G_RB(op)), 0x3f); // and i2,rb,0x3f
+ UML_CMP(block, I2, 0x00000020); // cmp rb,0x20
+ UML_JMPc(block, COND_S, compiler->labelnum); // bs 1:
- UML_MOV(block, R32(G_RD(op)), 0x0); // move rd, #0
- if (op & M_OE)
- {
- UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
- UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
- }
- if (op & M_RC)
- {
- UML_MOV(block, CR32(0), 0x2); // CR = EQ
- UML_AND(block, CR32(0), CR32(0), ~0x1);
- UML_OR(block, CR32(0), CR32(0), XERSO32);
- }
-
- UML_JMP(block, compiler->labelnum+3); // jmp 3:
-
- UML_LABEL(block, compiler->labelnum++); // 0:
- UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
- UML_JMPc(block, COND_Z, compiler->labelnum); // beq 1:
-
- UML_CMP(block, R32(G_RB(op)), 0xffffffff); // cmp rb, #ffffffff
- UML_JMPc(block, COND_NZ, compiler->labelnum+1); // bne 2:
- UML_CMP(block, R32(G_RA(op)), 0x80000000); // cmp ra, #80000000
- UML_JMPc(block, COND_NZ, compiler->labelnum+1); // bne 2:
-
- UML_LABEL(block, compiler->labelnum++); // 1:
- UML_MOV(block, R32(G_RD(op)), 0xffffffff); // move rd, #ffffffff
- if (op & M_OE)
- {
- UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
- UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
- }
- if (op & M_RC)
- {
- UML_MOV(block, CR32(0), 0x8); // CR = LT
- UML_AND(block, CR32(0), CR32(0), ~0x1);
- UML_OR(block, CR32(0), CR32(0), XERSO32);
- }
- UML_JMP(block, compiler->labelnum+1); // jmp 3:
-
- UML_LABEL(block, compiler->labelnum++); // 2:
- UML_DIVS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // divs rd,rd,ra,rb
- generate_compute_flags(ppc, block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
-
- UML_LABEL(block, compiler->labelnum++); // 3:
- return TRUE;
-
- case 0x01c: /* ANDx */
- UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // and ra,rs,rb
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x03c: /* ANDCx */
- UML_XOR(block, I0, R32(G_RB(op)), ~0); // xor i0,rb,~0
- UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), I0); // and ra,rs,i0
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x1dc: /* NANDx */
- UML_AND(block, I0, R32(G_RS(op)), R32(G_RB(op))); // and i0,rs,rb
- UML_XOR(block, R32(G_RA(op)), I0, ~0); // xor ra,i0,~0
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x1bc: /* ORx */
- UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // or ra,rs,rb
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x19c: /* ORCx */
- UML_XOR(block, I0, R32(G_RB(op)), ~0); // xor i0,rb,~0
- UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), I0); // or ra,rs,i0
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x07c: /* NORx */
- UML_OR(block, I0, R32(G_RS(op)), R32(G_RB(op))); // or i0,rs,rb
- UML_XOR(block, R32(G_RA(op)), I0, ~0); // xor ra,i0,~0
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x13c: /* XORx */
- UML_XOR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // xor ra,rs,rb
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x11c: /* EQVx */
- UML_XOR(block, I0, R32(G_RS(op)), R32(G_RB(op))); // xor i0,rs,rb
- UML_XOR(block, R32(G_RA(op)), I0, ~0); // xor ra,i0,~0
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x018: /* SLWx */
- UML_AND(block, I0, R32(G_RB(op)), 0x3f); // and i0, rb, 0x3f
- UML_CMP(block, I0, 31); // cmp i0, #31
- UML_JMPc(block, COND_BE, compiler->labelnum); // be 0:
-
- UML_MOV(block, R32(G_RA(op)), 0x0); // mov ra, #0
- if (op & M_RC)
- {
- UML_MOV(block, CR32(0), 0x2); // CR = EQ
- UML_AND(block, CR32(0), CR32(0), ~0x1);
- UML_OR(block, CR32(0), CR32(0), XERSO32);
- }
- UML_JMP(block, compiler->labelnum+1); // jmp 1:
-
- UML_LABEL(block, compiler->labelnum++); // 0:
- UML_SHL(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // shl ra,rs,rb
- // calculate S and Z flags
- if (op & M_RC)
- {
- generate_shift_flags(ppc, block, desc, op);
- }
-
- UML_LABEL(block, compiler->labelnum++); // 1:
- return TRUE;
-
- case 0x218: /* SRWx */
- UML_AND(block, I0, R32(G_RB(op)), 0x3f); // and i0, rb, 0x3f
- UML_CMP(block, I0, 31); // cmp i0, #31
- UML_JMPc(block, COND_BE, compiler->labelnum); // be 0:
-
- UML_MOV(block, R32(G_RA(op)), 0x0); // mov ra, #0
- if (op & M_RC)
- {
- UML_MOV(block, CR32(0), 0x2); // CR = EQ
- UML_AND(block, CR32(0), CR32(0), ~0x1);
- UML_OR(block, CR32(0), CR32(0), XERSO32);
- }
- UML_JMP(block, compiler->labelnum+1); // jmp 1:
-
- UML_LABEL(block, compiler->labelnum++); // 0:
- UML_SHR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // shr ra,i0,rb
- // calculate S and Z flags
- if (op & M_RC)
- {
- generate_shift_flags(ppc, block, desc, op);
- }
-
- UML_LABEL(block, compiler->labelnum++); // 1:
- return TRUE;
-
- case 0x318: /* SRAWx */
- UML_AND(block, I2, R32(G_RB(op)), 0x3f); // and i2,rb,0x3f
- UML_CMP(block, I2, 0x00000020); // cmp rb,0x20
- UML_JMPc(block, COND_S, compiler->labelnum); // bs 1:
-
- if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
- {
- // for shift amt > 32, carry flag is the sign bit of Rs and the sign bit fills all bit positions
- UML_TEST(block, R32(G_RS(op)), 0x80000000);
- UML_SETc(block, COND_NZ, I0);
- UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
- UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), 31); // sar ra,rs,31
- }
- UML_JMP(block, compiler->labelnum+1); // bra 2:
-
- UML_LABEL(block, compiler->labelnum++); // 1:
- if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
- {
- UML_SHL(block, I1, 0xffffffff, I2); // shl i1,0xffffffff,i2
- UML_XOR(block, I1, I1, ~0); // xor i1,i1,~0
- UML_AND(block, I0, R32(G_RS(op)), I1); // and i0,rs,i1
- UML_SAR(block, I1, R32(G_RS(op)), 31); // sar i1,rs,31
- UML_TEST(block, I0, I1); // test i0,i1
- UML_SETc(block, COND_NZ, I0); // set i0,nz
- UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
- }
- UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), I2); // sar ra,rs,i2
-
- UML_LABEL(block, compiler->labelnum++); // 2:
- // calculate S and Z flags
- if (op & M_RC)
- {
- generate_shift_flags(ppc, block, desc, op);
- }
- return TRUE;
-
- case 0x338: /* SRAWIx */
+ if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
+ {
+ // for shift amt > 32, carry flag is the sign bit of Rs and the sign bit fills all bit positions
+ UML_TEST(block, R32(G_RS(op)), 0x80000000);
+ UML_SETc(block, COND_NZ, I0);
+ UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
+ UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), 31); // sar ra,rs,31
+ }
+ UML_JMP(block, compiler->labelnum+1); // bra 2:
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
+ {
+ UML_SHL(block, I1, 0xffffffff, I2); // shl i1,0xffffffff,i2
+ UML_XOR(block, I1, I1, ~0); // xor i1,i1,~0
+ UML_AND(block, I0, R32(G_RS(op)), I1); // and i0,rs,i1
+ UML_SAR(block, I1, R32(G_RS(op)), 31); // sar i1,rs,31
+ UML_TEST(block, I0, I1); // test i0,i1
+ UML_SETc(block, COND_NZ, I0); // set i0,nz
+ UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
+ }
+ UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), I2); // sar ra,rs,i2
+
+ UML_LABEL(block, compiler->labelnum++); // 2:
+ // calculate S and Z flags
+ if (op & M_RC)
+ {
+ generate_shift_flags(ppc, block, desc, op);
+ }
+ return TRUE;
+
+ case 0x338: /* SRAWIx */
if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
{
UML_AND(block, I0, R32(G_RS(op)), ~(0xffffffff << (G_SH(op) & 31)));// and i0,rs,~(0xffffffff << (sh & 31))
- UML_SAR(block, I1, R32(G_RS(op)), 31); // sar i1,rs,31
- UML_TEST(block, I0, I1); // test i0,i1
- UML_SETc(block, COND_NZ, I0); // set i0,nz
- UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
+ UML_SAR(block, I1, R32(G_RS(op)), 31); // sar i1,rs,31
+ UML_TEST(block, I0, I1); // test i0,i1
+ UML_SETc(block, COND_NZ, I0); // set i0,nz
+ UML_ROLINS(block, SPR32(SPR_XER), I0, 29, XER_CA); // rolins [xer],i0,29,XER_CA
+ }
+ UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), G_SH(op)); // sar ra,rs,sh
+ // calculate S and Z flags
+ if (op & M_RC)
+ {
+ generate_shift_flags(ppc, block, desc, op);
}
- UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), G_SH(op)); // sar ra,rs,sh
- // calculate S and Z flags
- if (op & M_RC)
- {
- generate_shift_flags(ppc, block, desc, op);
- }
return TRUE;
- case 0x01a: /* CNTLZWx */
- UML_LZCNT(block, R32(G_RA(op)), R32(G_RS(op))); // lzcnt ra,rs
+ case 0x01a: /* CNTLZWx */
+ UML_LZCNT(block, R32(G_RA(op)), R32(G_RS(op))); // lzcnt ra,rs
if (op & M_RC)
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
return TRUE;
- case 0x3ba: /* EXTSBx */
- UML_SEXT(block, R32(G_RA(op)), R32(G_RS(op)), SIZE_BYTE); // sext ra,rs,byte
+ case 0x3ba: /* EXTSBx */
+ UML_SEXT(block, R32(G_RA(op)), R32(G_RS(op)), SIZE_BYTE); // sext ra,rs,byte
if (op & M_RC)
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
return TRUE;
- case 0x39a: /* EXTSHx */
- UML_SEXT(block, R32(G_RA(op)), R32(G_RS(op)), SIZE_WORD); // sext ra,rs,word
+ case 0x39a: /* EXTSHx */
+ UML_SEXT(block, R32(G_RA(op)), R32(G_RS(op)), SIZE_WORD); // sext ra,rs,word
if (op & M_RC)
- generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
- return TRUE;
-
- case 0x057: /* LBZX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
- UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x117: /* LHZX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x157: /* LHAX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x017: /* LWZX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x217: /* LFSX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
- UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x257: /* LFDX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
- UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
- UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x316: /* LHBRX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_BSWAP(block, I0, I0); // bswap i0,i0
- UML_SHR(block, R32(G_RD(op)), I0, 16); // shr rd,i0,16
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x216: /* LWBRX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read32align[ppc->impstate->mode]); // callh read32align
- UML_BSWAP(block, R32(G_RD(op)), I0); // bswap rd,i0
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x077: /* LBZUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
- UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
- UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x137: /* LHZUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x177: /* LHAUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
- UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
- UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x037: /* LWZUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x237: /* LFSUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
- UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
- UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x277: /* LFDUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
- UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
- UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x014: /* LWARX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->read32align[ppc->impstate->mode]); // callh read32align
- UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x255: /* LSWI */
- UML_MOV(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op))); // mov [updateaddr],ra
- UML_MOV(block, mem(&ppc->impstate->swcount), ((G_NB(op) - 1) & 0x1f) + 1); // mov [swcount],G_NB
- UML_CALLH(block, *ppc->impstate->lsw[ppc->impstate->mode][G_RD(op)]); // call lsw[rd]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x215: /* LSWX */
- UML_ADD(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op)), R32(G_RB(op))); // add [updateaddr],ra,rb
- UML_AND(block, mem(&ppc->impstate->swcount), SPR32(SPR_XER), 0x7f); // and [swcount],[xer],0x7f
+ generate_compute_flags(ppc, block, desc, op & M_RC, 0, FALSE); // <update flags>
+ return TRUE;
+
+ case 0x057: /* LBZX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
+ UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x117: /* LHZX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x157: /* LHAX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x017: /* LWZX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x217: /* LFSX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
+ UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x257: /* LFDX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
+ UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
+ UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x316: /* LHBRX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_BSWAP(block, I0, I0); // bswap i0,i0
+ UML_SHR(block, R32(G_RD(op)), I0, 16); // shr rd,i0,16
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x216: /* LWBRX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read32align[ppc->impstate->mode]); // callh read32align
+ UML_BSWAP(block, R32(G_RD(op)), I0); // bswap rd,i0
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x077: /* LBZUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
+ UML_CALLH(block, *ppc->impstate->read8[ppc->impstate->mode]); // callh read8
+ UML_AND(block, R32(G_RD(op)), I0, 0xff); // and rd,i0,0xff
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x137: /* LHZUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_AND(block, R32(G_RD(op)), I0, 0xffff); // and rd,i0,0xffff
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x177: /* LHAUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
+ UML_CALLH(block, *ppc->impstate->read16[ppc->impstate->mode]); // callh read16
+ UML_SEXT(block, R32(G_RD(op)), I0, SIZE_WORD); // sext rd,i0,word
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x037: /* LWZUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x237: /* LFSUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read32[ppc->impstate->mode]); // callh read32
+ UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), I0); // mov [tempdata],i0
+ UML_FDFRFLT(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l), SIZE_DWORD); // fdfrflt fd,[tempdata],dword
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x277: /* LFDUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read64[ppc->impstate->mode]); // callh read64
+ UML_DMOV(block, mem(&ppc->impstate->tempdata.d), I0); // dmov [tempdata],i0
+ UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fdmov fd,[tempdata]
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x014: /* LWARX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->read32align[ppc->impstate->mode]); // callh read32align
+ UML_MOV(block, R32(G_RD(op)), I0); // mov rd,i0
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x255: /* LSWI */
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op))); // mov [updateaddr],ra
+ UML_MOV(block, mem(&ppc->impstate->swcount), ((G_NB(op) - 1) & 0x1f) + 1); // mov [swcount],G_NB
+ UML_CALLH(block, *ppc->impstate->lsw[ppc->impstate->mode][G_RD(op)]); // call lsw[rd]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x215: /* LSWX */
+ UML_ADD(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op)), R32(G_RB(op))); // add [updateaddr],ra,rb
+ UML_AND(block, mem(&ppc->impstate->swcount), SPR32(SPR_XER), 0x7f); // and [swcount],[xer],0x7f
UML_SUB(block, mem(&ppc->icount), mem(&ppc->icount), mem(&ppc->impstate->swcount));// sub icount,icount,[swcount]
- UML_CALLHc(block, COND_NZ, *ppc->impstate->lsw[ppc->impstate->mode][G_RD(op)]); // call lsw[rd],nz
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ UML_CALLHc(block, COND_NZ, *ppc->impstate->lsw[ppc->impstate->mode][G_RD(op)]); // call lsw[rd],nz
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x136: /* ECIWX */
+ case 0x136: /* ECIWX */
/* not implemented */
return FALSE;
- case 0x0d7: /* STBX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x197: /* STHX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x097: /* STWX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x297: /* STFSX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
- UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x3d7: /* STFIWX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
- UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata.lo]
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x2d7: /* STFDX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
- UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x396: /* STHBRX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_BSWAP(block, I1, R32(G_RS(op))); // bswap i1,rs
- UML_SHR(block, I1, I1, 16); // shr i1,i1,16
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x296: /* STWBRX */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_BSWAP(block, I1, R32(G_RS(op))); // bswap i1,rs
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x0f7: /* STBUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x1b7: /* STHUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x0b7: /* STWUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x2b7: /* STFSUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
- UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x2f7: /* STFDUX */
- UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
- UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
- UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
- UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
- return TRUE;
-
- case 0x096: /* STWCX. */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
- UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
- UML_CALLH(block, *ppc->impstate->write32align[ppc->impstate->mode]); // callh write32align
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
-
- UML_CMP(block, I0, I0); // cmp i0,i0
- UML_GETFLGS(block, I0, FLAG_Z | FLAG_C | FLAG_S); // getflgs i0,zcs
+ case 0x0d7: /* STBX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x197: /* STHX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x097: /* STWX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x297: /* STFSX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
+ UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x3d7: /* STFIWX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
+ UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata.lo]
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x2d7: /* STFDX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
+ UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x396: /* STHBRX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_BSWAP(block, I1, R32(G_RS(op))); // bswap i1,rs
+ UML_SHR(block, I1, I1, 16); // shr i1,i1,16
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x296: /* STWBRX */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_BSWAP(block, I1, R32(G_RS(op))); // bswap i1,rs
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x0f7: /* STBUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_AND(block, I1, R32(G_RS(op)), 0xff); // and i1,rs,0xff
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write8[ppc->impstate->mode]); // callh write8
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x1b7: /* STHUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_AND(block, I1, R32(G_RS(op)), 0xffff); // and i1,rs,0xffff
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write16[ppc->impstate->mode]); // callh write16
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x0b7: /* STWUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDXU(op)); // mapvar dsisr,DSISR_IDXU(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x2b7: /* STFSUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_FSFRFLT(block, mem(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), SIZE_QWORD); // fsfrflt [tempdata],rs,qword
+ UML_MOV(block, I1, mem(&ppc->impstate->tempdata.w.l)); // mov i1,[tempdata]
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write32[ppc->impstate->mode]); // callh write32
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x2f7: /* STFDUX */
+ UML_ADD(block, I0, R32(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RS(op))); // fdmov [tempdata],rs
+ UML_DMOV(block, I1, mem(&ppc->impstate->tempdata.d)); // dmov i1,[tempdata]
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), I0); // mov [updateaddr],i0
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
+ UML_MOV(block, R32(G_RA(op)), mem(&ppc->impstate->updateaddr)); // mov ra,[updateaddr]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ return TRUE;
+
+ case 0x096: /* STWCX. */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, I1, R32(G_RS(op))); // mov i1,rs
+ UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op)); // mapvar dsisr,DSISR_IDX(op)
+ UML_CALLH(block, *ppc->impstate->write32align[ppc->impstate->mode]); // callh write32align
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+
+ UML_CMP(block, I0, I0); // cmp i0,i0
+ UML_GETFLGS(block, I0, FLAG_Z | FLAG_C | FLAG_S); // getflgs i0,zcs
UML_LOAD(block, I0, ppc->impstate->cmp_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,cmp_cr_table,i0,byte
- UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
- generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
+ generate_compute_flags(ppc, block, desc, TRUE, 0, FALSE); // <update flags>
return TRUE;
- case 0x2d5: /* STSWI */
- UML_MOV(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op))); // mov [updateaddr],ra
- UML_MOV(block, mem(&ppc->impstate->swcount), ((G_NB(op) - 1) & 0x1f) + 1); // mov [swcount],G_NB
- UML_CALLH(block, *ppc->impstate->stsw[ppc->impstate->mode][G_RD(op)]); // call stsw[rd]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ case 0x2d5: /* STSWI */
+ UML_MOV(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op))); // mov [updateaddr],ra
+ UML_MOV(block, mem(&ppc->impstate->swcount), ((G_NB(op) - 1) & 0x1f) + 1); // mov [swcount],G_NB
+ UML_CALLH(block, *ppc->impstate->stsw[ppc->impstate->mode][G_RD(op)]); // call stsw[rd]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x295: /* STSWX */
- UML_ADD(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op)), R32(G_RB(op))); // add [updateaddr],ra,rb
- UML_AND(block, mem(&ppc->impstate->swcount), SPR32(SPR_XER), 0x7f); // and [swcount],[xer],0x7f
+ case 0x295: /* STSWX */
+ UML_ADD(block, mem(&ppc->impstate->updateaddr), R32Z(G_RA(op)), R32(G_RB(op))); // add [updateaddr],ra,rb
+ UML_AND(block, mem(&ppc->impstate->swcount), SPR32(SPR_XER), 0x7f); // and [swcount],[xer],0x7f
UML_SUB(block, mem(&ppc->icount), mem(&ppc->icount), mem(&ppc->impstate->swcount));// sub icount,icount,[swcount]
- UML_CALLHc(block, COND_NZ, *ppc->impstate->stsw[ppc->impstate->mode][G_RD(op)]); // call stsw[rd]
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ UML_CALLHc(block, COND_NZ, *ppc->impstate->stsw[ppc->impstate->mode][G_RD(op)]); // call stsw[rd]
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x1b6: /* ECOWX */
+ case 0x1b6: /* ECOWX */
/* not implemented */
return FALSE;
- case 0x036: /* DCBST */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
- UML_MOV(block, mem(&ppc->param0), I0); // mov [param0],i0
+ case 0x036: /* DCBST */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ UML_MOV(block, mem(&ppc->param0), I0); // mov [param0],i0
UML_CALLC(block, (c_function)ppccom_dcstore_callback, ppc);
return TRUE;
- case 0x056: /* DCBF */
- case 0x0f6: /* DCBTST */
- case 0x116: /* DCBT */
- case 0x3d6: /* ICBI */
- case 0x256: /* SYNC */
- case 0x356: /* EIEIO */
- case 0x1d6: /* DCBI */
- case 0x236: /* TLBSYNC */
+ case 0x056: /* DCBF */
+ case 0x0f6: /* DCBTST */
+ case 0x116: /* DCBT */
+ case 0x3d6: /* ICBI */
+ case 0x256: /* SYNC */
+ case 0x356: /* EIEIO */
+ case 0x1d6: /* DCBI */
+ case 0x236: /* TLBSYNC */
/* effective no-ops */
return TRUE;
- case 0x3f6: /* DCBZ */
- UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
+ case 0x3f6: /* DCBZ */
+ UML_ADD(block, I0, R32Z(G_RA(op)), R32(G_RB(op))); // add i0,ra,rb
UML_AND(block, mem(&ppc->impstate->tempaddr), I0, ~(ppc->cache_line_size - 1));
// and [tempaddr],i0,~(cache_line_size - 1)
for (item = 0; item < ppc->cache_line_size / 8; item++)
{
- UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 8 * item); // add i0,[tempaddr],8*item
- UML_DMOV(block, I1, 0); // dmov i1,0
- UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
+ UML_ADD(block, I0, mem(&ppc->impstate->tempaddr), 8 * item); // add i0,[tempaddr],8*item
+ UML_DMOV(block, I1, 0); // dmov i1,0
+ UML_CALLH(block, *ppc->impstate->write64[ppc->impstate->mode]); // callh write64
}
return TRUE;
- case 0x132: /* TLBIE */
- UML_MOV(block, mem(&ppc->param0), R32(G_RB(op))); // mov [param0],rb
- UML_CALLC(block, (c_function)ppccom_execute_tlbie, ppc); // callc ppccom_execute_tlbie,ppc
+ case 0x132: /* TLBIE */
+ UML_MOV(block, mem(&ppc->param0), R32(G_RB(op))); // mov [param0],rb
+ UML_CALLC(block, (c_function)ppccom_execute_tlbie, ppc); // callc ppccom_execute_tlbie,ppc
return TRUE;
- case 0x172: /* TLBIA */
- UML_CALLC(block, (c_function)ppccom_execute_tlbia, ppc); // callc ppccom_execute_tlbia,ppc
+ case 0x172: /* TLBIA */
+ UML_CALLC(block, (c_function)ppccom_execute_tlbia, ppc); // callc ppccom_execute_tlbia,ppc
return TRUE;
- case 0x3d2: /* TLBLD */
+ case 0x3d2: /* TLBLD */
assert(ppc->cap & PPCCAP_603_MMU);
- UML_MOV(block, mem(&ppc->param0), R32(G_RB(op))); // mov [param0],rb
- UML_MOV(block, mem(&ppc->param1), 0); // mov [param1],0
- UML_CALLC(block, (c_function)ppccom_execute_tlbl, ppc); // callc ppccom_execute_tlbl,ppc
+ UML_MOV(block, mem(&ppc->param0), R32(G_RB(op))); // mov [param0],rb
+ UML_MOV(block, mem(&ppc->param1), 0); // mov [param1],0
+ UML_CALLC(block, (c_function)ppccom_execute_tlbl, ppc); // callc ppccom_execute_tlbl,ppc
return TRUE;
- case 0x3f2: /* TLBLI */
+ case 0x3f2: /* TLBLI */
assert(ppc->cap & PPCCAP_603_MMU);
- UML_MOV(block, mem(&ppc->param0), R32(G_RB(op))); // mov [param0],rb
- UML_MOV(block, mem(&ppc->param1), 1); // mov [param1],1
- UML_CALLC(block, (c_function)ppccom_execute_tlbl, ppc); // callc ppccom_execute_tlbl,ppc
- return TRUE;
-
- case 0x013: /* MFCR */
- UML_SHL(block, I0, CR32(0), 28); // shl i0,cr(0),28
- UML_ROLAND(block, I1, CR32(1), 24, 0x0f000000); // roland i1,cr(1),24,0x0f000000
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
- UML_ROLAND(block, I1, CR32(2), 20, 0x00f00000); // roland i1,cr(2),20,0x00f00000
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
- UML_ROLAND(block, I1, CR32(3), 16, 0x000f0000); // roland i1,cr(3),16,0x000f0000
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
- UML_ROLAND(block, I1, CR32(4), 12, 0x0000f000); // roland i1,cr(4),12,0x0000f000
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
- UML_ROLAND(block, I1, CR32(5), 8, 0x00000f00); // roland i1,cr(5),8,0x00000f00
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
- UML_ROLAND(block, I1, CR32(6), 4, 0x000000f0); // roland i1,cr(6),4,0x000000f0
- UML_OR(block, I0, I0, I1); // or i0,i0,i1
- UML_ROLAND(block, I1, CR32(7), 0, 0x0000000f); // roland i1,cr(7),0,0x0000000f
- UML_OR(block, R32(G_RD(op)), I0, I1); // or rd,i0,i1
- return TRUE;
-
- case 0x053: /* MFMSR */
- UML_MOV(block, R32(G_RD(op)), MSR32); // mov rd,msr
- return TRUE;
-
- case 0x153: /* MFSPR */
+ UML_MOV(block, mem(&ppc->param0), R32(G_RB(op))); // mov [param0],rb
+ UML_MOV(block, mem(&ppc->param1), 1); // mov [param1],1
+ UML_CALLC(block, (c_function)ppccom_execute_tlbl, ppc); // callc ppccom_execute_tlbl,ppc
+ return TRUE;
+
+ case 0x013: /* MFCR */
+ UML_SHL(block, I0, CR32(0), 28); // shl i0,cr(0),28
+ UML_ROLAND(block, I1, CR32(1), 24, 0x0f000000); // roland i1,cr(1),24,0x0f000000
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, CR32(2), 20, 0x00f00000); // roland i1,cr(2),20,0x00f00000
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, CR32(3), 16, 0x000f0000); // roland i1,cr(3),16,0x000f0000
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, CR32(4), 12, 0x0000f000); // roland i1,cr(4),12,0x0000f000
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, CR32(5), 8, 0x00000f00); // roland i1,cr(5),8,0x00000f00
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, CR32(6), 4, 0x000000f0); // roland i1,cr(6),4,0x000000f0
+ UML_OR(block, I0, I0, I1); // or i0,i0,i1
+ UML_ROLAND(block, I1, CR32(7), 0, 0x0000000f); // roland i1,cr(7),0,0x0000000f
+ UML_OR(block, R32(G_RD(op)), I0, I1); // or rd,i0,i1
+ return TRUE;
+
+ case 0x053: /* MFMSR */
+ UML_MOV(block, R32(G_RD(op)), MSR32); // mov rd,msr
+ return TRUE;
+
+ case 0x153: /* MFSPR */
{
UINT32 spr = compute_spr(G_SPR(op));
if (spr == SPR_LR || spr == SPR_CTR || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
- UML_MOV(block, R32(G_RD(op)), SPR32(spr)); // mov rd,spr
+ UML_MOV(block, R32(G_RD(op)), SPR32(spr)); // mov rd,spr
else if (spr == SPR_XER)
{
- UML_SHL(block, I0, XERSO32, 31); // shl i0,[xerso],31
- UML_OR(block, R32(G_RD(op)), SPR32(spr), I0); // or [rd],[xer],i0
+ UML_SHL(block, I0, XERSO32, 31); // shl i0,[xerso],31
+ UML_OR(block, R32(G_RD(op)), SPR32(spr), I0); // or [rd],[xer],i0
}
else if (spr == SPROEA_PVR)
- UML_MOV(block, R32(G_RD(op)), ppc->flavor); // mov rd,flavor
+ UML_MOV(block, R32(G_RD(op)), ppc->flavor); // mov rd,flavor
else
{
- generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
- UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
- UML_CALLC(block, (c_function)ppccom_execute_mfspr, ppc); // callc ppccom_execute_mfspr,ppc
- UML_MOV(block, R32(G_RD(op)), mem(&ppc->param1)); // mov rd,[param1]
+ generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
+ UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
+ UML_CALLC(block, (c_function)ppccom_execute_mfspr, ppc); // callc ppccom_execute_mfspr,ppc
+ UML_MOV(block, R32(G_RD(op)), mem(&ppc->param1)); // mov rd,[param1]
}
return TRUE;
}
- case 0x253: /* MFSR */
- UML_MOV(block, R32(G_RD(op)), SR32(G_SR(op))); // mov rd,sr
+ case 0x253: /* MFSR */
+ UML_MOV(block, R32(G_RD(op)), SR32(G_SR(op))); // mov rd,sr
return TRUE;
- case 0x293: /* MFSRIN */
- UML_SHR(block, I0, R32(G_RB(op)), 28); // shr i0,G_RB,28
- UML_LOAD(block, R32(G_RD(op)), &ppc->sr[0], I0, SIZE_DWORD, SCALE_x4); // load rd,sr,i0,dword
+ case 0x293: /* MFSRIN */
+ UML_SHR(block, I0, R32(G_RB(op)), 28); // shr i0,G_RB,28
+ UML_LOAD(block, R32(G_RD(op)), &ppc->sr[0], I0, SIZE_DWORD, SCALE_x4); // load rd,sr,i0,dword
return TRUE;
- case 0x173: /* MFTB */
+ case 0x173: /* MFTB */
{
UINT32 tbr = compute_spr(G_SPR(op));
if (tbr != SPRVEA_TBL_R && tbr != SPRVEA_TBU_R)
return FALSE;
- generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
- UML_MOV(block, mem(&ppc->param0), tbr); // mov [param0],tbr
- UML_CALLC(block, (c_function)ppccom_execute_mftb, ppc); // callc ppccom_execute_mftb,ppc
- UML_MOV(block, R32(G_RD(op)), mem(&ppc->param1)); // mov rd,[param1]
+ generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
+ UML_MOV(block, mem(&ppc->param0), tbr); // mov [param0],tbr
+ UML_CALLC(block, (c_function)ppccom_execute_mftb, ppc); // callc ppccom_execute_mftb,ppc
+ UML_MOV(block, R32(G_RD(op)), mem(&ppc->param1)); // mov rd,[param1]
return TRUE;
}
- case 0x090: /* MTCRF */
- UML_MOV(block, I0, R32(G_RS(op))); // mov i0,rs
- if (G_CRM(op) & 0x80) UML_ROLAND(block, CR32(0), I0, 4, 0xf); // roland cr(0),i0,4,0x0f
- if (G_CRM(op) & 0x40) UML_ROLAND(block, CR32(1), I0, 8, 0xf); // roland cr(1),i0,8,0x0f
- if (G_CRM(op) & 0x20) UML_ROLAND(block, CR32(2), I0, 12, 0xf); // roland cr(2),i0,12,0x0f
- if (G_CRM(op) & 0x10) UML_ROLAND(block, CR32(3), I0, 16, 0xf); // roland cr(3),i0,16,0x0f
- if (G_CRM(op) & 0x08) UML_ROLAND(block, CR32(4), I0, 20, 0xf); // roland cr(4),i0,20,0x0f
- if (G_CRM(op) & 0x04) UML_ROLAND(block, CR32(5), I0, 24, 0xf); // roland cr(5),i0,24,0x0f
- if (G_CRM(op) & 0x02) UML_ROLAND(block, CR32(6), I0, 28, 0xf); // roland cr(6),i0,28,0x0f
- if (G_CRM(op) & 0x01) UML_ROLAND(block, CR32(7), I0, 0, 0xf); // roland cr(7),i0,0,0x0f
+ case 0x090: /* MTCRF */
+ UML_MOV(block, I0, R32(G_RS(op))); // mov i0,rs
+ if (G_CRM(op) & 0x80) UML_ROLAND(block, CR32(0), I0, 4, 0xf); // roland cr(0),i0,4,0x0f
+ if (G_CRM(op) & 0x40) UML_ROLAND(block, CR32(1), I0, 8, 0xf); // roland cr(1),i0,8,0x0f
+ if (G_CRM(op) & 0x20) UML_ROLAND(block, CR32(2), I0, 12, 0xf); // roland cr(2),i0,12,0x0f
+ if (G_CRM(op) & 0x10) UML_ROLAND(block, CR32(3), I0, 16, 0xf); // roland cr(3),i0,16,0x0f
+ if (G_CRM(op) & 0x08) UML_ROLAND(block, CR32(4), I0, 20, 0xf); // roland cr(4),i0,20,0x0f
+ if (G_CRM(op) & 0x04) UML_ROLAND(block, CR32(5), I0, 24, 0xf); // roland cr(5),i0,24,0x0f
+ if (G_CRM(op) & 0x02) UML_ROLAND(block, CR32(6), I0, 28, 0xf); // roland cr(6),i0,28,0x0f
+ if (G_CRM(op) & 0x01) UML_ROLAND(block, CR32(7), I0, 0, 0xf); // roland cr(7),i0,0,0x0f
return TRUE;
- case 0x092: /* MTMSR */
+ case 0x092: /* MTMSR */
if (ppc->cap & PPCCAP_603_MMU)
- UML_XOR(block, I0, MSR32, R32(G_RS(op))); // xor i0,msr32,rs
- UML_MOV(block, MSR32, R32(G_RS(op))); // mov msr,rs
+ UML_XOR(block, I0, MSR32, R32(G_RS(op))); // xor i0,msr32,rs
+ UML_MOV(block, MSR32, R32(G_RS(op))); // mov msr,rs
if (ppc->cap & PPCCAP_603_MMU)
{
- UML_TEST(block, I0, MSR603_TGPR); // test i0,tgpr
- UML_CALLHc(block, COND_NZ, *ppc->impstate->swap_tgpr); // callh swap_tgpr,nz
+ UML_TEST(block, I0, MSR603_TGPR); // test i0,tgpr
+ UML_CALLHc(block, COND_NZ, *ppc->impstate->swap_tgpr); // callh swap_tgpr,nz
}
- generate_update_mode(ppc, block); // <update mode>
+ generate_update_mode(ppc, block); // <update mode>
return TRUE;
- case 0x1d3: /* MTSPR */
+ case 0x1d3: /* MTSPR */
{
UINT32 spr = compute_spr(G_SPR(op));
if (spr == SPR_LR || spr == SPR_CTR || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
- UML_MOV(block, SPR32(spr), R32(G_RS(op))); // mov spr,rs
+ UML_MOV(block, SPR32(spr), R32(G_RS(op))); // mov spr,rs
else if (spr == SPR_XER)
{
- UML_AND(block, SPR32(spr), R32(G_RS(op)), ~XER_SO); // and spr,rs,~XER_SO
- UML_SHR(block, XERSO32, R32(G_RS(op)), 31); // shr [xerso],rs,31
+ UML_AND(block, SPR32(spr), R32(G_RS(op)), ~XER_SO); // and spr,rs,~XER_SO
+ UML_SHR(block, XERSO32, R32(G_RS(op)), 31); // shr [xerso],rs,31
}
else if (spr == SPROEA_PVR)
- ; // read only
+ ; // read only
else
{
- generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
- UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
- UML_MOV(block, mem(&ppc->param1), R32(G_RS(op))); // mov [param1],rs
- UML_CALLC(block, (c_function)ppccom_execute_mtspr, ppc); // callc ppccom_execute_mtspr,ppc
+ generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
+ UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
+ UML_MOV(block, mem(&ppc->param1), R32(G_RS(op))); // mov [param1],rs
+ UML_CALLC(block, (c_function)ppccom_execute_mtspr, ppc); // callc ppccom_execute_mtspr,ppc
compiler->checkints = TRUE;
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
}
return TRUE;
}
- case 0x0d2: /* MTSR */
- UML_MOV(block, SR32(G_SR(op)), R32(G_RS(op))); // mov sr[G_SR],rs
- UML_CALLC(block, (c_function)ppccom_tlb_flush, ppc); // callc ppccom_tlb_flush,ppc
+ case 0x0d2: /* MTSR */
+ UML_MOV(block, SR32(G_SR(op)), R32(G_RS(op))); // mov sr[G_SR],rs
+ UML_CALLC(block, (c_function)ppccom_tlb_flush, ppc); // callc ppccom_tlb_flush,ppc
return TRUE;
- case 0x0f2: /* MTSRIN */
- UML_SHR(block, I0, R32(G_RB(op)), 28); // shr i0,G_RB,28
- UML_STORE(block, &ppc->sr[0], I0, R32(G_RS(op)), SIZE_DWORD, SCALE_x4); // store sr,i0,rs,dword
- UML_CALLC(block, (c_function)ppccom_tlb_flush, ppc); // callc ppccom_tlb_flush,ppc
+ case 0x0f2: /* MTSRIN */
+ UML_SHR(block, I0, R32(G_RB(op)), 28); // shr i0,G_RB,28
+ UML_STORE(block, &ppc->sr[0], I0, R32(G_RS(op)), SIZE_DWORD, SCALE_x4); // store sr,i0,rs,dword
+ UML_CALLC(block, (c_function)ppccom_tlb_flush, ppc); // callc ppccom_tlb_flush,ppc
return TRUE;
- case 0x200: /* MCRXR */
- UML_ROLAND(block, I0, SPR32(SPR_XER), 28, 0x0f); // roland i0,[xer],28,0x0f
- UML_SHL(block, I1, XERSO32, 3); // shl i1,[xerso],3
- UML_OR(block, CR32(G_CRFD(op)), I0, I1); // or [crd],i0,i1
- UML_AND(block, SPR32(SPR_XER), SPR32(SPR_XER), ~0xf0000000); // and [xer],[xer],~0xf0000000
- UML_MOV(block, XERSO32, 0); // mov [xerso],0
+ case 0x200: /* MCRXR */
+ UML_ROLAND(block, I0, SPR32(SPR_XER), 28, 0x0f); // roland i0,[xer],28,0x0f
+ UML_SHL(block, I1, XERSO32, 3); // shl i1,[xerso],3
+ UML_OR(block, CR32(G_CRFD(op)), I0, I1); // or [crd],i0,i1
+ UML_AND(block, SPR32(SPR_XER), SPR32(SPR_XER), ~0xf0000000); // and [xer],[xer],~0xf0000000
+ UML_MOV(block, XERSO32, 0); // mov [xerso],0
return TRUE;
- case 0x106: /* ICBT */
- case 0x1c6: /* DCCCI */
- case 0x3c6: /* ICCCI */
+ case 0x106: /* ICBT */
+ case 0x1c6: /* DCCCI */
+ case 0x3c6: /* ICCCI */
assert(ppc->cap & PPCCAP_4XX);
/* effective no-nop */
return TRUE;
- case 0x1e6: /* DCREAD */
- case 0x3e6: /* ICREAD */
+ case 0x1e6: /* DCREAD */
+ case 0x3e6: /* ICREAD */
assert(ppc->cap & PPCCAP_4XX);
- UML_MOV(block, R32(G_RT(op)), 0); // mov rt,0
+ UML_MOV(block, R32(G_RT(op)), 0); // mov rt,0
return TRUE;
- case 0x143: /* MFDCR */
+ case 0x143: /* MFDCR */
{
UINT32 spr = compute_spr(G_SPR(op));
assert(ppc->cap & PPCCAP_4XX);
- generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
- UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
- UML_CALLC(block, (c_function)ppccom_execute_mfdcr, ppc); // callc ppccom_execute_mfdcr,ppc
- UML_MOV(block, R32(G_RD(op)), mem(&ppc->param1)); // mov rd,[param1]
+ generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
+ UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
+ UML_CALLC(block, (c_function)ppccom_execute_mfdcr, ppc); // callc ppccom_execute_mfdcr,ppc
+ UML_MOV(block, R32(G_RD(op)), mem(&ppc->param1)); // mov rd,[param1]
return TRUE;
}
- case 0x1c3: /* MTDCR */
+ case 0x1c3: /* MTDCR */
{
UINT32 spr = compute_spr(G_SPR(op));
assert(ppc->cap & PPCCAP_4XX);
- generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
- UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
- UML_MOV(block, mem(&ppc->param1), R32(G_RS(op))); // mov [param1],rs
- UML_CALLC(block, (c_function)ppccom_execute_mtdcr, ppc); // callc ppccom_execute_mtdcr,ppc
+ generate_update_cycles(ppc, block, compiler, desc->pc, TRUE); // <update cycles>
+ UML_MOV(block, mem(&ppc->param0), spr); // mov [param0],spr
+ UML_MOV(block, mem(&ppc->param1), R32(G_RS(op))); // mov [param1],rs
+ UML_CALLC(block, (c_function)ppccom_execute_mtdcr, ppc); // callc ppccom_execute_mtdcr,ppc
compiler->checkints = TRUE;
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
}
- case 0x083: /* WRTEE */
+ case 0x083: /* WRTEE */
assert(ppc->cap & PPCCAP_4XX);
- UML_ROLINS(block, MSR32, R32(G_RS(op)), 0, MSR_EE); // rolins msr,rs,0,MSR_EE
+ UML_ROLINS(block, MSR32, R32(G_RS(op)), 0, MSR_EE); // rolins msr,rs,0,MSR_EE
compiler->checkints = TRUE;
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
return TRUE;
- case 0x0a3: /* WRTEEI */
+ case 0x0a3: /* WRTEEI */
assert(ppc->cap & PPCCAP_4XX);
if (op & MSR_EE)
{
- UML_OR(block, MSR32, MSR32, MSR_EE); // or msr,msr,MSR_EE
+ UML_OR(block, MSR32, MSR32, MSR_EE); // or msr,msr,MSR_EE
compiler->checkints = TRUE;
- generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
+ generate_update_cycles(ppc, block, compiler, desc->pc + 4, TRUE); // <update cycles>
}
else
- UML_AND(block, MSR32, MSR32, ~MSR_EE); // and msr,msr,~MSR_EE
+ UML_AND(block, MSR32, MSR32, ~MSR_EE); // and msr,msr,~MSR_EE
return TRUE;
case 0x254: /* ESA */
@@ -3929,87 +3929,87 @@ static int generate_instruction_3b(powerpc_state *ppc, drcuml_block *block, comp
switch (opswitch)
{
- case 0x15: /* FADDSx */
+ case 0x15: /* FADDSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDADD(block, F0, F64(G_RA(op)), F64(G_RB(op))); // fdadd f0,ra,rb
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDADD(block, F0, F64(G_RA(op)), F64(G_RB(op))); // fdadd f0,ra,rb
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x14: /* FSUBSx */
+ case 0x14: /* FSUBSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDSUB(block, F0, F64(G_RA(op)), F64(G_RB(op))); // fdsub f0,ra,rb
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDSUB(block, F0, F64(G_RA(op)), F64(G_RB(op))); // fdsub f0,ra,rb
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x19: /* FMULSx */
+ case 0x19: /* FMULSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x12: /* FDIVSx */
+ case 0x12: /* FDIVSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDDIV(block, F0, F64(G_RA(op)), F64(G_RB(op))); // fddiv f0,ra,rb
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDDIV(block, F0, F64(G_RA(op)), F64(G_RB(op))); // fddiv f0,ra,rb
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x16: /* FSQRTSx */
+ case 0x16: /* FSQRTSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDSQRT(block, F0, F64(G_RB(op))); // fdsqrt f0,rb
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDSQRT(block, F0, F64(G_RB(op))); // fdsqrt f0,rb
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x18: /* FRESx */
- UML_FSFRFLT(block, F0, F64(G_RB(op)), SIZE_QWORD); // fsfrlt f0,rb,qword
- UML_FSRECIP(block, F0, F0); // fsrecip f0,f0
- UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt rd,f0,dword
+ case 0x18: /* FRESx */
+ UML_FSFRFLT(block, F0, F64(G_RB(op)), SIZE_QWORD); // fsfrlt f0,rb,qword
+ UML_FSRECIP(block, F0, F0); // fsrecip f0,f0
+ UML_FDFRFLT(block, F64(G_RD(op)), F0, SIZE_DWORD); // fdfrflt rd,f0,dword
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1d: /* FMADDSx */
+ case 0x1d: /* FMADDSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1c: /* FMSUBSx */
+ case 0x1c: /* FMSUBSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDSUB(block, F0, F0, F64(G_RB(op))); // fdsub f0,f0,rb
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDSUB(block, F0, F0, F64(G_RB(op))); // fdsub f0,f0,rb
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1f: /* FNMADDSx */
+ case 0x1f: /* FNMADDSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
- UML_FDNEG(block, F0, F0); // fdneg f0,f0
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
+ UML_FDNEG(block, F0, F0); // fdneg f0,f0
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1e: /* FNMSUBSx */
+ case 0x1e: /* FNMSUBSx */
if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
return generate_instruction_3f(ppc, block, compiler, desc);
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDSUB(block, F0, F64(G_RB(op)), F0); // fdsub f0,rb,f0
- UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDSUB(block, F0, F64(G_RB(op)), F0); // fdsub f0,rb,f0
+ UML_FDRNDS(block, F64(G_RD(op)), F0); // fdrnds rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
}
@@ -4034,64 +4034,64 @@ static int generate_instruction_3f(powerpc_state *ppc, drcuml_block *block, comp
opswitch &= 0x1f;
switch (opswitch)
{
- case 0x15: /* FADDx */
- UML_FDADD(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_RB(op))); // fdadd rd,ra,rb
+ case 0x15: /* FADDx */
+ UML_FDADD(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_RB(op))); // fdadd rd,ra,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x14: /* FSUBx */
- UML_FDSUB(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_RB(op))); // fdsub rd,ra,rb
+ case 0x14: /* FSUBx */
+ UML_FDSUB(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_RB(op))); // fdsub rd,ra,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x19: /* FMULx */
- UML_FDMUL(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_REGC(op))); // fdmul rd,ra,rc
+ case 0x19: /* FMULx */
+ UML_FDMUL(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_REGC(op))); // fdmul rd,ra,rc
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x12: /* FDIVx */
- UML_FDDIV(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_RB(op))); // fddiv rd,ra,rb
+ case 0x12: /* FDIVx */
+ UML_FDDIV(block, F64(G_RD(op)), F64(G_RA(op)), F64(G_RB(op))); // fddiv rd,ra,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x16: /* FSQRTx */
- UML_FDSQRT(block, F64(G_RD(op)), F64(G_RB(op))); // fdsqrt rd,rb
+ case 0x16: /* FSQRTx */
+ UML_FDSQRT(block, F64(G_RD(op)), F64(G_RB(op))); // fdsqrt rd,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1a: /* FRSQRTEx */
- UML_FDRSQRT(block, F64(G_RD(op)), F64(G_RB(op))); // fdrsqrt rd,rb
+ case 0x1a: /* FRSQRTEx */
+ UML_FDRSQRT(block, F64(G_RD(op)), F64(G_RB(op))); // fdrsqrt rd,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x17: /* FSELx */
- UML_FDCMP(block, F64(G_RA(op)), mem(&ppc->impstate->fp0)); // fdcmp f0,ra,[fp0]
- UML_FDMOVc(block, COND_AE, F64(G_RD(op)), F64(G_REGC(op))); // fdmov rd,rc,AE
- UML_FDMOVc(block, COND_B, F64(G_RD(op)), F64(G_RB(op))); // fdmov rd,rb,B
+ case 0x17: /* FSELx */
+ UML_FDCMP(block, F64(G_RA(op)), mem(&ppc->impstate->fp0)); // fdcmp f0,ra,[fp0]
+ UML_FDMOVc(block, COND_AE, F64(G_RD(op)), F64(G_REGC(op))); // fdmov rd,rc,AE
+ UML_FDMOVc(block, COND_B, F64(G_RD(op)), F64(G_RB(op))); // fdmov rd,rb,B
return TRUE;
- case 0x1d: /* FMADDx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDADD(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdadd rd,f0,rb
+ case 0x1d: /* FMADDx */
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDADD(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdadd rd,f0,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1f: /* FNMADDx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
- UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
+ case 0x1f: /* FNMADDx */
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDADD(block, F0, F0, F64(G_RB(op))); // fdadd f0,f0,rb
+ UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1c: /* FMSUBx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDSUB(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdsub rd,f0,rb
+ case 0x1c: /* FMSUBx */
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDSUB(block, F64(G_RD(op)), F0, F64(G_RB(op))); // fdsub rd,f0,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x1e: /* FNMSUBx */
- UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
- UML_FDSUB(block, F64(G_RD(op)), F64(G_RB(op)), F0); // fdsub rd,rb,f0
+ case 0x1e: /* FNMSUBx */
+ UML_FDMUL(block, F0, F64(G_RA(op)), F64(G_REGC(op))); // fdmul f0,ra,rc
+ UML_FDSUB(block, F64(G_RD(op)), F64(G_RB(op)), F0); // fdsub rd,rb,f0
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
}
@@ -4100,79 +4100,79 @@ static int generate_instruction_3f(powerpc_state *ppc, drcuml_block *block, comp
{
switch (opswitch)
{
- case 0x32e: /* FCTIDx - 64-bit only */
- case 0x32f: /* FCTIDZx - 64-bit only */
- case 0x34e: /* FCFIDx - 64-bit only */
+ case 0x32e: /* FCTIDx - 64-bit only */
+ case 0x32f: /* FCTIDZx - 64-bit only */
+ case 0x34e: /* FCFIDx - 64-bit only */
return FALSE;
- case 0x000: /* FCMPU */
- case 0x020: /* FCMPO */
- UML_FDCMP(block, F64(G_RA(op)), F64(G_RB(op))); // fdcmp ra,rb
- UML_GETFLGS(block, I0, FLAG_C | FLAG_Z | FLAG_U); // getflgs i0,czu
+ case 0x000: /* FCMPU */
+ case 0x020: /* FCMPO */
+ UML_FDCMP(block, F64(G_RA(op)), F64(G_RB(op))); // fdcmp ra,rb
+ UML_GETFLGS(block, I0, FLAG_C | FLAG_Z | FLAG_U); // getflgs i0,czu
UML_LOAD(block, I0, ppc->impstate->fcmp_cr_table, I0, SIZE_BYTE, SCALE_x1);// load i0,fcmp_cr_table,i0,byte
- UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
return TRUE;
- case 0x00c: /* FRSPx */
- UML_FDRNDS(block, F64(G_RD(op)), F64(G_RB(op))); // fdrnds rd,rb
+ case 0x00c: /* FRSPx */
+ UML_FDRNDS(block, F64(G_RD(op)), F64(G_RB(op))); // fdrnds rd,rb
generate_fp_flags(ppc, block, desc, TRUE);
return TRUE;
- case 0x00e: /* FCTIWx */
- UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_DEFAULT); // fdtoint i0,rb,dword,default
+ case 0x00e: /* FCTIWx */
+ UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_DEFAULT); // fdtoint i0,rb,dword,default
UML_DAND(block, mem(&ppc->impstate->tempdata.w.l), I0, 0xffffffff);// dand i0,i0,0xffffffff
- UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l)); // fdmovr rd,i0
+ UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l)); // fdmovr rd,i0
return TRUE;
- case 0x00f: /* FCTIWZx */
- UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_TRUNC); // fdtoint i0,rb,dword,default
+ case 0x00f: /* FCTIWZx */
+ UML_FDTOINT(block, I0, F64(G_RB(op)), SIZE_DWORD, ROUND_TRUNC); // fdtoint i0,rb,dword,default
UML_DAND(block, mem(&ppc->impstate->tempdata.w.l), I0, 0xffffffff);// dand i0,i0,0xffffffff
- UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l)); // fdmovr rd,i0
+ UML_FDMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.w.l)); // fdmovr rd,i0
return TRUE;
- case 0x028: /* FNEGx */
- UML_FDNEG(block, F64(G_RD(op)), F64(G_RB(op))); // fdneg rd,rb
+ case 0x028: /* FNEGx */
+ UML_FDNEG(block, F64(G_RD(op)), F64(G_RB(op))); // fdneg rd,rb
return TRUE;
- case 0x048: /* FMRx */
- UML_FDMOV(block, F64(G_RD(op)), F64(G_RB(op))); // fdmov rd,rb
+ case 0x048: /* FMRx */
+ UML_FDMOV(block, F64(G_RD(op)), F64(G_RB(op))); // fdmov rd,rb
return TRUE;
- case 0x088: /* FNABSx */
- UML_FDABS(block, F0, F64(G_RB(op))); // fdabs f0,rb
- UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
+ case 0x088: /* FNABSx */
+ UML_FDABS(block, F0, F64(G_RB(op))); // fdabs f0,rb
+ UML_FDNEG(block, F64(G_RD(op)), F0); // fdneg rd,f0
return TRUE;
- case 0x108: /* FABSx */
- UML_FDABS(block, F64(G_RD(op)), F64(G_RB(op))); // fdabs rd,rb
+ case 0x108: /* FABSx */
+ UML_FDABS(block, F64(G_RD(op)), F64(G_RB(op))); // fdabs rd,rb
return TRUE;
- case 0x046: /* MTFSB0x */
- UML_AND(block, FPSCR32, FPSCR32, ~(0x80000000 >> G_CRBD(op))); // and fpscr32,fpscr32,~(0x80000000 >> G_CRBD)
+ case 0x046: /* MTFSB0x */
+ UML_AND(block, FPSCR32, FPSCR32, ~(0x80000000 >> G_CRBD(op))); // and fpscr32,fpscr32,~(0x80000000 >> G_CRBD)
return TRUE;
- case 0x026: /* MTFSB1x */
- UML_OR(block, FPSCR32, FPSCR32, 0x80000000 >> G_CRBD(op)); // or fpscr32,fpscr32,(0x80000000 >> G_CRBD)
+ case 0x026: /* MTFSB1x */
+ UML_OR(block, FPSCR32, FPSCR32, 0x80000000 >> G_CRBD(op)); // or fpscr32,fpscr32,(0x80000000 >> G_CRBD)
return TRUE;
- case 0x040: /* MCRFS */
+ case 0x040: /* MCRFS */
UML_ROLAND(block, CR32(G_CRFD(op)), FPSCR32, ((G_CRFS(op) - 7) & 7) * 4, 0x0f);
// roland [crd],[fpscr],shift,0x0f
- UML_AND(block, FPSCR32, FPSCR32, ~CRMASK(G_CRFS(op))); // and fpscr,fpscr,~crmask[crfs]
+ UML_AND(block, FPSCR32, FPSCR32, ~CRMASK(G_CRFS(op))); // and fpscr,fpscr,~crmask[crfs]
return TRUE;
- case 0x247: /* MFFSx */
- UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), FPSCR32); // mov [tempdata],fpscr
- UML_FSMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fsmov rd,fpscr
+ case 0x247: /* MFFSx */
+ UML_MOV(block, mem(&ppc->impstate->tempdata.w.l), FPSCR32); // mov [tempdata],fpscr
+ UML_FSMOV(block, F64(G_RD(op)), mem(&ppc->impstate->tempdata.d)); // fsmov rd,fpscr
return TRUE;
- case 0x2c7: /* MTFSFx */
- UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RB(op))); // fdmov [tempdata],fb
+ case 0x2c7: /* MTFSFx */
+ UML_FDMOV(block, mem(&ppc->impstate->tempdata.d), F64(G_RB(op))); // fdmov [tempdata],fb
UML_ROLINS(block, FPSCR32, mem(&ppc->impstate->tempdata.w.l), 0, compute_crf_mask(G_FM(op)));
// rolins fpscr,rb,0,crf_mask
return TRUE;
- case 0x086: /* MTFSFIx */
+ case 0x086: /* MTFSFIx */
UML_ROLINS(block, FPSCR32, G_IMM(op), 28 - 4 * G_CRFD(op), CRMASK(G_CRFD(op)));
// rolins fpscr,rb,0,crf_mask
return TRUE;
@@ -4199,7 +4199,7 @@ static void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op)
if (LOG_UML)
{
ppc_dasm_one(buffer, pc, op);
- block->append_comment("%08X: %s", pc, buffer); // comment
+ block->append_comment("%08X: %s", pc, buffer); // comment
}
}
@@ -4461,14 +4461,14 @@ CPU_GET_INFO( ppc403ga )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc403ga); break;
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc403ga); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 403GA"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 403GA"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
+ default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
}
}
@@ -4496,14 +4496,14 @@ CPU_GET_INFO( ppc403gcx )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc403gcx); break;
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc403gcx); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 403GCX"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 403GCX"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
+ default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
}
}
@@ -4532,14 +4532,14 @@ CPU_GET_INFO( ppc405gp )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc405gp); break;
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc405gp); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ppcdrc4xx); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 405GP"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 405GP"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
+ default: CPU_GET_INFO_CALL(ppcdrc4xx); break;
}
}
@@ -4571,13 +4571,13 @@ CPU_GET_INFO( ppc601 )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc601); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc601); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 601"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 601"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4605,13 +4605,13 @@ CPU_GET_INFO( ppc602 )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc602); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc602); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 602"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 602"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4639,13 +4639,13 @@ CPU_GET_INFO( ppc603 )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4673,13 +4673,13 @@ CPU_GET_INFO( ppc603e )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603e); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603e); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603e"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603e"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4707,13 +4707,13 @@ CPU_GET_INFO( ppc603r )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603r); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc603r); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603R"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 603R"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4741,13 +4741,13 @@ CPU_GET_INFO( ppc604 )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc604); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ppc604); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 604"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC 604"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
@@ -4780,13 +4780,13 @@ CPU_GET_INFO( mpc8240 )
/* --- the following bits of info are returned as 64-bit signed integers --- */
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mpc8240); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(mpc8240); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC MPC8240"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PowerPC MPC8240"); break;
/* --- everything else is handled generically --- */
- default: CPU_GET_INFO_CALL(ppcdrc); break;
+ default: CPU_GET_INFO_CALL(ppcdrc); break;
}
}
diff --git a/src/emu/cpu/powerpc/ppcfe.c b/src/emu/cpu/powerpc/ppcfe.c
index 0cbb792b5d5..5a66a15b474 100644
--- a/src/emu/cpu/powerpc/ppcfe.c
+++ b/src/emu/cpu/powerpc/ppcfe.c
@@ -46,34 +46,34 @@
// MACROS
//**************************************************************************
-#define GPR_USED(desc, x) do { (desc).regin[0] |= REGFLAG_R(x); } while (0)
-#define GPR_USED_OR_ZERO(desc, x) do { (desc).regin[0] |= ((x) == 0 ? 0 : REGFLAG_R(x)); } while (0)
-#define GPR_MODIFIED(desc, x) do { (desc).regout[0] |= REGFLAG_R(x); } while (0)
+#define GPR_USED(desc, x) do { (desc).regin[0] |= REGFLAG_R(x); } while (0)
+#define GPR_USED_OR_ZERO(desc, x) do { (desc).regin[0] |= ((x) == 0 ? 0 : REGFLAG_R(x)); } while (0)
+#define GPR_MODIFIED(desc, x) do { (desc).regout[0] |= REGFLAG_R(x); } while (0)
-#define FPR_USED(desc, x) do { (desc).regin[1] |= REGFLAG_FR(x); } while (0)
-#define FPR_MODIFIED(desc, x) do { (desc).regout[1] |= REGFLAG_FR(x); } while (0)
+#define FPR_USED(desc, x) do { (desc).regin[1] |= REGFLAG_FR(x); } while (0)
+#define FPR_MODIFIED(desc, x) do { (desc).regout[1] |= REGFLAG_FR(x); } while (0)
-#define CR_USED(desc, x) do { (desc).regin[2] |= REGFLAG_CR(x); } while (0)
-#define CR_BIT_USED(desc, x) do { (desc).regin[2] |= REGFLAG_CR_BIT(x); } while (0)
-#define CR_MODIFIED(desc, x) do { (desc).regout[2] |= REGFLAG_CR(x); } while (0)
-#define CR_BIT_MODIFIED(desc, x) do { (desc).regout[2] |= REGFLAG_CR_BIT(x); } while (0)
+#define CR_USED(desc, x) do { (desc).regin[2] |= REGFLAG_CR(x); } while (0)
+#define CR_BIT_USED(desc, x) do { (desc).regin[2] |= REGFLAG_CR_BIT(x); } while (0)
+#define CR_MODIFIED(desc, x) do { (desc).regout[2] |= REGFLAG_CR(x); } while (0)
+#define CR_BIT_MODIFIED(desc, x) do { (desc).regout[2] |= REGFLAG_CR_BIT(x); } while (0)
-#define XER_CA_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_CA; } while (0)
-#define XER_OV_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_OV; } while (0)
-#define XER_SO_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_SO; } while (0)
-#define XER_COUNT_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_COUNT; } while (0)
-#define XER_CA_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_CA; } while (0)
-#define XER_OV_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_OV; } while (0)
-#define XER_SO_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_SO; } while (0)
-#define XER_COUNT_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_COUNT; } while (0)
+#define XER_CA_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_CA; } while (0)
+#define XER_OV_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_OV; } while (0)
+#define XER_SO_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_SO; } while (0)
+#define XER_COUNT_USED(desc) do { (desc).regin[3] |= REGFLAG_XER_COUNT; } while (0)
+#define XER_CA_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_CA; } while (0)
+#define XER_OV_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_OV; } while (0)
+#define XER_SO_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_SO; } while (0)
+#define XER_COUNT_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_XER_COUNT; } while (0)
-#define CTR_USED(desc) do { (desc).regin[3] |= REGFLAG_CTR; } while (0)
-#define CTR_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_CTR; } while (0)
-#define LR_USED(desc) do { (desc).regin[3] |= REGFLAG_LR; } while (0)
-#define LR_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_LR; } while (0)
+#define CTR_USED(desc) do { (desc).regin[3] |= REGFLAG_CTR; } while (0)
+#define CTR_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_CTR; } while (0)
+#define LR_USED(desc) do { (desc).regin[3] |= REGFLAG_LR; } while (0)
+#define LR_MODIFIED(desc) do { (desc).regout[3] |= REGFLAG_LR; } while (0)
-#define FPSCR_USED(desc, x) do { (desc).regin[3] |= REGFLAG_FPSCR(x); } while (0)
-#define FPSCR_MODIFIED(desc, x) do { (desc).regout[3] |= REGFLAG_FPSCR(x); } while (0)
+#define FPSCR_USED(desc, x) do { (desc).regin[3] |= REGFLAG_FPSCR(x); } while (0)
+#define FPSCR_MODIFIED(desc, x) do { (desc).regout[3] |= REGFLAG_FPSCR(x); } while (0)
@@ -87,7 +87,7 @@
ppc_frontend::ppc_frontend(powerpc_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
: drc_frontend(*state.device, window_start, window_end, max_sequence),
- m_context(state)
+ m_context(state)
{
}
@@ -122,53 +122,53 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
opswitch = op >> 26;
switch (opswitch)
{
- case 0x02: // TDI - 64-bit only
- case 0x1e: // 0x1e group - 64-bit only
- case 0x3a: // 0x3a group - 64-bit only
- case 0x3e: // 0x3e group - 64-bit only
+ case 0x02: // TDI - 64-bit only
+ case 0x1e: // 0x1e group - 64-bit only
+ case 0x3a: // 0x3a group - 64-bit only
+ case 0x3e: // 0x3e group - 64-bit only
return false;
- case 0x03: // TWI
+ case 0x03: // TWI
GPR_USED(desc, G_RA(op));
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
if (is_603_class())
- desc.cycles = 2; // 603
+ desc.cycles = 2; // 603
return true;
- case 0x07: // MULLI
+ case 0x07: // MULLI
GPR_USED(desc, G_RA(op));
GPR_MODIFIED(desc, G_RD(op));
if (is_403_class())
- desc.cycles = 4; // 4XX
+ desc.cycles = 4; // 4XX
else if (is_601_class())
- desc.cycles = 5; // 601
+ desc.cycles = 5; // 601
else if (is_603_class())
- desc.cycles = 2; // 603: 2-3
+ desc.cycles = 2; // 603: 2-3
else
- desc.cycles = 2; // ???
+ desc.cycles = 2; // ???
return true;
- case 0x0e: // ADDI
- case 0x0f: // ADDIS
+ case 0x0e: // ADDI
+ case 0x0f: // ADDIS
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_MODIFIED(desc, G_RD(op));
return true;
- case 0x0a: // CMPLI
- case 0x0b: // CMPI
+ case 0x0a: // CMPLI
+ case 0x0b: // CMPI
GPR_USED(desc, G_RA(op));
XER_SO_USED(desc);
CR_MODIFIED(desc, G_CRFD(op));
return true;
- case 0x08: // SUBFIC
- case 0x0c: // ADDIC
+ case 0x08: // SUBFIC
+ case 0x0c: // ADDIC
GPR_USED(desc, G_RA(op));
GPR_MODIFIED(desc, G_RD(op));
XER_CA_MODIFIED(desc);
return true;
- case 0x0d: // ADDIC.
+ case 0x0d: // ADDIC.
GPR_USED(desc, G_RA(op));
XER_SO_USED(desc);
GPR_MODIFIED(desc, G_RT(op));
@@ -176,7 +176,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
CR_MODIFIED(desc, 0);
return true;
- case 0x10: // BCx
+ case 0x10: // BCx
if (!(G_BO(op) & 0x10))
{
CR_BIT_USED(desc, G_BI(op));
@@ -200,19 +200,19 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.cycles = 1;
return true;
- case 0x11: // SC
+ case 0x11: // SC
if (!(m_context.cap & (PPCCAP_OEA | PPCCAP_4XX)))
return false;
desc.flags |= OPFLAG_WILL_CAUSE_EXCEPTION;
if (is_601_class())
- desc.cycles = 16; // 601
+ desc.cycles = 16; // 601
else if (is_603_class())
- desc.cycles = 3; // 603
+ desc.cycles = 3; // 603
else
- desc.cycles = 3; // ???
+ desc.cycles = 3; // ???
return true;
- case 0x12: // Bx
+ case 0x12: // Bx
if (op & M_LK)
LR_MODIFIED(desc);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
@@ -222,10 +222,10 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.cycles = 0;
return true;
- case 0x13: // 0x13 group
+ case 0x13: // 0x13 group
return describe_13(op, desc, prev);
- case 0x14: // RLWIMIx
+ case 0x14: // RLWIMIx
GPR_USED(desc, G_RS(op));
GPR_USED(desc, G_RA(op));
GPR_MODIFIED(desc, G_RA(op));
@@ -236,7 +236,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
}
return true;
- case 0x15: // RLWINMx
+ case 0x15: // RLWINMx
GPR_USED(desc, G_RS(op));
GPR_MODIFIED(desc, G_RA(op));
if (op & M_RC)
@@ -246,7 +246,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
}
return true;
- case 0x17: // RLWNMx
+ case 0x17: // RLWNMx
GPR_USED(desc, G_RS(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RA(op));
@@ -257,38 +257,38 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
}
return true;
- case 0x18: // ORI
- case 0x19: // ORIS
- case 0x1a: // XORI
- case 0x1b: // XORIS
+ case 0x18: // ORI
+ case 0x19: // ORIS
+ case 0x1a: // XORI
+ case 0x1b: // XORIS
GPR_USED(desc, G_RS(op));
GPR_MODIFIED(desc, G_RA(op));
return true;
- case 0x1c: // ANDI.
- case 0x1d: // ANDIS.
+ case 0x1c: // ANDI.
+ case 0x1d: // ANDIS.
GPR_USED(desc, G_RS(op));
XER_SO_USED(desc);
GPR_MODIFIED(desc, G_RA(op));
CR_MODIFIED(desc, 0);
return true;
- case 0x1f: // 0x1f group
+ case 0x1f: // 0x1f group
return describe_1f(op, desc, prev);
- case 0x20: // LWZ
- case 0x22: // LBZ
- case 0x28: // LHZ
- case 0x2a: // LHA
+ case 0x20: // LWZ
+ case 0x22: // LBZ
+ case 0x28: // LHZ
+ case 0x2a: // LHA
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_MODIFIED(desc, G_RD(op));
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x21: // LWZU
- case 0x23: // LBZU
- case 0x29: // LHZU
- case 0x2b: // LHAU
+ case 0x21: // LWZU
+ case 0x23: // LBZU
+ case 0x29: // LHZU
+ case 0x2b: // LHAU
if (G_RA(op) == 0 || G_RA(op) == G_RD(op))
return false;
GPR_USED(desc, G_RA(op));
@@ -297,17 +297,17 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x24: // STW
- case 0x26: // STB
- case 0x2c: // STH
+ case 0x24: // STW
+ case 0x26: // STB
+ case 0x2c: // STH
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x25: // STWU
- case 0x27: // STBU
- case 0x2d: // STHU
+ case 0x25: // STWU
+ case 0x27: // STBU
+ case 0x2d: // STHU
if (G_RA(op) == 0)
return false;
GPR_USED(desc, G_RA(op));
@@ -316,7 +316,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x2e: // LMW
+ case 0x2e: // LMW
GPR_USED_OR_ZERO(desc, G_RA(op));
for (regnum = G_RD(op); regnum < 32; regnum++)
GPR_MODIFIED(desc, regnum);
@@ -324,7 +324,7 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.cycles = 32 - G_RD(op);
return true;
- case 0x2f: // STMW
+ case 0x2f: // STMW
GPR_USED_OR_ZERO(desc, G_RA(op));
for (regnum = G_RS(op); regnum < 32; regnum++)
GPR_USED(desc, regnum);
@@ -332,8 +332,8 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.cycles = 32 - G_RS(op);
return true;
- case 0x30: // LFS
- case 0x32: // LFD
+ case 0x30: // LFS
+ case 0x32: // LFD
if (!(m_context.cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -341,8 +341,8 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x31: // LFSU
- case 0x33: // LFDU
+ case 0x31: // LFSU
+ case 0x33: // LFDU
if (!(m_context.cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
@@ -353,8 +353,8 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x34: // STFS
- case 0x36: // STFD
+ case 0x34: // STFS
+ case 0x36: // STFD
if (!(m_context.cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -362,8 +362,8 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x35: // STFSU
- case 0x37: // STFDU
+ case 0x35: // STFSU
+ case 0x37: // STFDU
if (!(m_context.cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
@@ -374,10 +374,10 @@ bool ppc_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x3b: // 0x3b group
+ case 0x3b: // 0x3b group
return describe_3b(op, desc, prev);
- case 0x3f: // 0x3f group
+ case 0x3f: // 0x3f group
return describe_3f(op, desc, prev);
}
@@ -397,7 +397,7 @@ bool ppc_frontend::describe_13(UINT32 op, opcode_desc &desc, const opcode_desc *
switch (opswitch)
{
- case 0x000: // MTCRF
+ case 0x000: // MTCRF
CR_USED(desc, G_CRFS(op));
CR_MODIFIED(desc, G_CRFD(op));
// CR logical folding
@@ -405,7 +405,7 @@ bool ppc_frontend::describe_13(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.cycles = 0;
return true;
- case 0x010: // BCLRx
+ case 0x010: // BCLRx
LR_USED(desc);
if (!(G_BO(op) & 0x10))
CR_BIT_USED(desc, G_BI(op));
@@ -423,14 +423,14 @@ bool ppc_frontend::describe_13(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.targetpc = BRANCH_TARGET_DYNAMIC;
return true;
- case 0x021: // CRNOR
- case 0x081: // CRANDC
- case 0x0c1: // CRXOR
- case 0x0e1: // CRNAND
- case 0x101: // CRAND
- case 0x121: // CREQV
- case 0x1a1: // CRORC
- case 0x1c1: // CROR
+ case 0x021: // CRNOR
+ case 0x081: // CRANDC
+ case 0x0c1: // CRXOR
+ case 0x0e1: // CRNAND
+ case 0x101: // CRAND
+ case 0x121: // CREQV
+ case 0x1a1: // CRORC
+ case 0x1c1: // CROR
CR_BIT_USED(desc, G_CRBA(op));
CR_BIT_USED(desc, G_CRBB(op));
CR_BIT_MODIFIED(desc, G_CRBD(op));
@@ -439,34 +439,34 @@ bool ppc_frontend::describe_13(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.cycles = 0;
return true;
- case 0x032: // RFI
+ case 0x032: // RFI
if (!(m_context.cap & (PPCCAP_OEA | PPCCAP_4XX)))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
if (is_601_class())
- desc.cycles = 13; // 601
+ desc.cycles = 13; // 601
else if (is_603_class())
- desc.cycles = 3; // 603
+ desc.cycles = 3; // 603
else
- desc.cycles = 3; // ???
+ desc.cycles = 3; // ???
return true;
- case 0x033: // RFCI
+ case 0x033: // RFCI
if (!(m_context.cap & PPCCAP_4XX))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
return true;
- case 0x096: // ISYNC
+ case 0x096: // ISYNC
if (!(m_context.cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
if (is_601_class())
- desc.cycles = 6; // 601
+ desc.cycles = 6; // 601
return true;
- case 0x210: // BCCTRx
+ case 0x210: // BCCTRx
CTR_USED(desc);
if (!(G_BO(op) & 0x10))
CR_BIT_USED(desc, G_BI(op));
@@ -499,52 +499,52 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
switch (opswitch)
{
- case 0x009: // MULHDUx - 64-bit only
- case 0x015: // LDX - 64-bit only
- case 0x01b: // SLDx - 64-bit only
- case 0x035: // LDUX - 64-bit only
- case 0x03a: // CNTLZDx - 64-bit only
- case 0x044: // TD - 64-bit only
- case 0x049: // MULHDx - 64-bit only
- case 0x054: // LDARX - 64-bit only
- case 0x095: // STDX - 64-bit only
- case 0x0b5: // STDUX - 64-bit only
- case 0x0d6: // STDCX. - 64-bit only
- case 0x0e9: // MULLD - 64-bit only
- case 0x2e9: // MULLDO - 64-bit only
- case 0x155: // LWAX - 64-bit only
- case 0x175: // LWAUX - 64-bit only
+ case 0x009: // MULHDUx - 64-bit only
+ case 0x015: // LDX - 64-bit only
+ case 0x01b: // SLDx - 64-bit only
+ case 0x035: // LDUX - 64-bit only
+ case 0x03a: // CNTLZDx - 64-bit only
+ case 0x044: // TD - 64-bit only
+ case 0x049: // MULHDx - 64-bit only
+ case 0x054: // LDARX - 64-bit only
+ case 0x095: // STDX - 64-bit only
+ case 0x0b5: // STDUX - 64-bit only
+ case 0x0d6: // STDCX. - 64-bit only
+ case 0x0e9: // MULLD - 64-bit only
+ case 0x2e9: // MULLDO - 64-bit only
+ case 0x155: // LWAX - 64-bit only
+ case 0x175: // LWAUX - 64-bit only
case 0x33a: // SRADIx - 64-bit only
case 0x33b: // SRADIx - 64-bit only
- case 0x1b2: // SLBIE - 64-bit only
- case 0x1c9: // DIVDUx - 64-bit only
- case 0x3c9: // DIVDUOx - 64-bit only
- case 0x1e9: // DIVDx - 64-bit only
- case 0x3e9: // DIVDOx - 64-bit only
- case 0x1f2: // SLBIA - 64-bit only
- case 0x21b: // SRDx - 64-bit only
- case 0x31a: // SRADx - 64-bit only
- case 0x3da: // EXTSW - 64-bit only
+ case 0x1b2: // SLBIE - 64-bit only
+ case 0x1c9: // DIVDUx - 64-bit only
+ case 0x3c9: // DIVDUOx - 64-bit only
+ case 0x1e9: // DIVDx - 64-bit only
+ case 0x3e9: // DIVDOx - 64-bit only
+ case 0x1f2: // SLBIA - 64-bit only
+ case 0x21b: // SRDx - 64-bit only
+ case 0x31a: // SRADx - 64-bit only
+ case 0x3da: // EXTSW - 64-bit only
return false;
- case 0x000: // CMP
- case 0x020: // CMPL
+ case 0x000: // CMP
+ case 0x020: // CMPL
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
XER_SO_USED(desc);
CR_MODIFIED(desc, G_CRFD(op));
return true;
- case 0x004: // TW
+ case 0x004: // TW
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
if (is_603_class())
- desc.cycles = 2; // 603
+ desc.cycles = 2; // 603
return true;
- case 0x008: // SUBFCx
- case 0x00a: // ADDCx
+ case 0x008: // SUBFCx
+ case 0x00a: // ADDCx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -556,8 +556,8 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x088: // SUBFEx
- case 0x08a: // ADDEx
+ case 0x088: // SUBFEx
+ case 0x08a: // ADDEx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
XER_CA_USED(desc);
@@ -570,10 +570,10 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x0c8: // SUBFZEx
- case 0x0ca: // ADDZEx
- case 0x0e8: // SUBFMEx
- case 0x0ea: // ADDMEx
+ case 0x0c8: // SUBFZEx
+ case 0x0ca: // ADDZEx
+ case 0x0e8: // SUBFMEx
+ case 0x0ea: // ADDMEx
GPR_USED(desc, G_RA(op));
XER_CA_USED(desc);
GPR_MODIFIED(desc, G_RD(op));
@@ -585,9 +585,9 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x00b: // MULHWUx
- case 0x04b: // MULHWx
- case 0x0eb: // MULLWx
+ case 0x00b: // MULHWUx
+ case 0x04b: // MULHWx
+ case 0x0eb: // MULLWx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -597,17 +597,17 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
CR_MODIFIED(desc, 0);
}
if (is_403_class())
- desc.cycles = 4; // 4XX
+ desc.cycles = 4; // 4XX
else if (is_601_class())
- desc.cycles = 5; // 601: 5/9/10
+ desc.cycles = 5; // 601: 5/9/10
else if (is_603_class())
- desc.cycles = 2; // 603: 2,3,4,5,6
+ desc.cycles = 2; // 603: 2,3,4,5,6
else
- desc.cycles = 2; // ???
+ desc.cycles = 2; // ???
return true;
- case 0x1cb: // DIVWUx
- case 0x1eb: // DIVWx
+ case 0x1cb: // DIVWUx
+ case 0x1eb: // DIVWx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -617,17 +617,17 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
CR_MODIFIED(desc, 0);
}
if (is_403_class())
- desc.cycles = 33; // 4XX
+ desc.cycles = 33; // 4XX
else if (is_601_class())
- desc.cycles = 36; // 601
+ desc.cycles = 36; // 601
else if (is_603_class())
- desc.cycles = 37; // 603
+ desc.cycles = 37; // 603
else
- desc.cycles = 33; // ???
+ desc.cycles = 33; // ???
return true;
- case 0x028: // SUBFx
- case 0x10a: // ADDx
+ case 0x028: // SUBFx
+ case 0x10a: // ADDx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -638,8 +638,8 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x208: // SUBFCOx
- case 0x20a: // ADDCOx
+ case 0x208: // SUBFCOx
+ case 0x20a: // ADDCOx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -650,8 +650,8 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
CR_MODIFIED(desc, 0);
return true;
- case 0x288: // SUBFEOx
- case 0x28a: // ADDEOx
+ case 0x288: // SUBFEOx
+ case 0x28a: // ADDEOx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
XER_CA_USED(desc);
@@ -663,10 +663,10 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
CR_MODIFIED(desc, 0);
return true;
- case 0x2c8: // SUBFZEOx
- case 0x2ca: // ADDZEOx
- case 0x2e8: // SUBFMEOx
- case 0x2ea: // ADDMEOx
+ case 0x2c8: // SUBFZEOx
+ case 0x2ca: // ADDZEOx
+ case 0x2e8: // SUBFMEOx
+ case 0x2ea: // ADDMEOx
GPR_USED(desc, G_RA(op));
XER_CA_USED(desc);
GPR_MODIFIED(desc, G_RD(op));
@@ -677,7 +677,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
CR_MODIFIED(desc, 0);
return true;
- case 0x2eb: // MULLWOx
+ case 0x2eb: // MULLWOx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -686,17 +686,17 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
if (op & M_RC)
CR_MODIFIED(desc, 0);
if (is_403_class())
- desc.cycles = 4; // 4XX
+ desc.cycles = 4; // 4XX
else if (is_601_class())
- desc.cycles = 5; // 601: 5/9/10
+ desc.cycles = 5; // 601: 5/9/10
else if (is_603_class())
- desc.cycles = 2; // 603: 2,3,4,5,6
+ desc.cycles = 2; // 603: 2,3,4,5,6
else
- desc.cycles = 2; // ???
+ desc.cycles = 2; // ???
return true;
- case 0x3cb: // DIVWUOx
- case 0x3eb: // DIVWOx
+ case 0x3cb: // DIVWUOx
+ case 0x3eb: // DIVWOx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -705,17 +705,17 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
if (op & M_RC)
CR_MODIFIED(desc, 0);
if (is_403_class())
- desc.cycles = 33; // 4XX
+ desc.cycles = 33; // 4XX
else if (is_601_class())
- desc.cycles = 36; // 601
+ desc.cycles = 36; // 601
else if (is_603_class())
- desc.cycles = 37; // 603
+ desc.cycles = 37; // 603
else
- desc.cycles = 33; // ???
+ desc.cycles = 33; // ???
return true;
- case 0x228: // SUBFOx
- case 0x30a: // ADDOx
+ case 0x228: // SUBFOx
+ case 0x30a: // ADDOx
GPR_USED(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
@@ -725,7 +725,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
CR_MODIFIED(desc, 0);
return true;
- case 0x013: // MFCR
+ case 0x013: // MFCR
CR_USED(desc, 0);
CR_USED(desc, 1);
CR_USED(desc, 2);
@@ -737,31 +737,31 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
GPR_MODIFIED(desc, G_RD(op));
return true;
- case 0x136: // ECIWX
+ case 0x136: // ECIWX
if (!(m_context.cap & PPCCAP_VEA))
return false;
- case 0x014: // LWARX
- case 0x017: // LWZX
- case 0x057: // LBZX
- case 0x117: // LHZX
- case 0x157: // LHAX
- case 0x216: // LWBRX
- case 0x316: // LHBRX
+ case 0x014: // LWARX
+ case 0x017: // LWZX
+ case 0x057: // LBZX
+ case 0x117: // LHZX
+ case 0x157: // LHAX
+ case 0x216: // LWBRX
+ case 0x316: // LHBRX
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x018: // SLWx
- case 0x01c: // ANDx
- case 0x03c: // ANDCx
- case 0x07c: // NORx
- case 0x11c: // EQVx
- case 0x13c: // XORx
- case 0x19c: // ORCx
- case 0x1bc: // ORx
- case 0x1dc: // NANDx
+ case 0x018: // SLWx
+ case 0x01c: // ANDx
+ case 0x03c: // ANDCx
+ case 0x07c: // NORx
+ case 0x11c: // EQVx
+ case 0x13c: // XORx
+ case 0x19c: // ORCx
+ case 0x1bc: // ORx
+ case 0x1dc: // NANDx
GPR_USED(desc, G_RS(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RA(op));
@@ -772,8 +772,8 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x218: // SRWx
- case 0x318: // SRAWx
+ case 0x218: // SRWx
+ case 0x318: // SRAWx
GPR_USED(desc, G_RS(op));
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RA(op));
@@ -785,9 +785,9 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x01a: // CNTLZWx
- case 0x39a: // EXTSHx
- case 0x3ba: // EXTSBx
+ case 0x01a: // CNTLZWx
+ case 0x39a: // EXTSHx
+ case 0x3ba: // EXTSBx
GPR_USED(desc, G_RS(op));
GPR_MODIFIED(desc, G_RA(op));
if (op & M_RC)
@@ -797,19 +797,19 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x036: // DCBST
- case 0x056: // DCBF
- case 0x0f6: // DCBTST
- case 0x116: // DCBT
- case 0x2f6: // DCBA
- case 0x3d6: // ICBI
+ case 0x036: // DCBST
+ case 0x056: // DCBF
+ case 0x0f6: // DCBTST
+ case 0x116: // DCBT
+ case 0x2f6: // DCBA
+ case 0x3d6: // ICBI
if (!(m_context.cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
return true;
- case 0x1d6: // DCBI
+ case 0x1d6: // DCBI
if (!(m_context.cap & (PPCCAP_OEA | PPCCAP_4XX)))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -817,10 +817,10 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x037: // LWZUX
- case 0x077: // LBZUX
- case 0x137: // LHZUX
- case 0x177: // LHAUX
+ case 0x037: // LWZUX
+ case 0x077: // LBZUX
+ case 0x137: // LHZUX
+ case 0x177: // LHAUX
if (G_RA(op) == 0 || G_RA(op) == G_RD(op))
return false;
GPR_USED(desc, G_RA(op));
@@ -830,7 +830,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x153: // MFSPR
+ case 0x153: // MFSPR
GPR_MODIFIED(desc, G_RD(op));
spr = compute_spr(G_SPR(op));
if (spr == SPR_LR)
@@ -854,25 +854,25 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.cycles = POWERPC_COUNT_READ_DEC;
return true;
- case 0x053: // MFMSR
+ case 0x053: // MFMSR
GPR_MODIFIED(desc, G_RD(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
if (is_601_class())
- desc.cycles = 2; // 601
+ desc.cycles = 2; // 601
return true;
- case 0x253: // MFSR
+ case 0x253: // MFSR
GPR_MODIFIED(desc, G_RD(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x293: // MFSRIN
+ case 0x293: // MFSRIN
GPR_USED(desc, G_RB(op));
GPR_MODIFIED(desc, G_RD(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x173: // MFTB
+ case 0x173: // MFTB
if (!(m_context.cap & PPCCAP_VEA))
return false;
GPR_MODIFIED(desc, G_RD(op));
@@ -881,7 +881,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.cycles = POWERPC_COUNT_READ_TBL;
return true;
- case 0x068: // NEGx
+ case 0x068: // NEGx
GPR_USED(desc, G_RA(op));
GPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
@@ -891,7 +891,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x268: // NEGOx
+ case 0x268: // NEGOx
GPR_USED(desc, G_RA(op));
GPR_MODIFIED(desc, G_RD(op));
XER_OV_MODIFIED(desc);
@@ -900,7 +900,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
CR_MODIFIED(desc, 0);
return true;
- case 0x090: // MTCRF
+ case 0x090: // MTCRF
GPR_USED(desc, G_RS(op));
if (G_CRM(op) & 0x80) CR_MODIFIED(desc, 0);
if (G_CRM(op) & 0x40) CR_MODIFIED(desc, 1);
@@ -912,23 +912,23 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
if (G_CRM(op) & 0x01) CR_MODIFIED(desc, 7);
return true;
- case 0x092: // MTMSR
+ case 0x092: // MTMSR
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_CHANGE_MODES | OPFLAG_END_SEQUENCE;
if (is_601_class())
- desc.cycles = 17; // 601
+ desc.cycles = 17; // 601
else if (is_603_class())
- desc.cycles = 2; // 603
+ desc.cycles = 2; // 603
return true;
- case 0x0d2: // MTSR
+ case 0x0d2: // MTSR
if (!(m_context.cap & PPCCAP_OEA))
return false;
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x1d3: // MTSPR
+ case 0x1d3: // MTSPR
GPR_USED(desc, G_RS(op));
spr = compute_spr(G_SPR(op));
if (spr == SPR_LR)
@@ -946,24 +946,24 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x1b6: // ECOWX
+ case 0x1b6: // ECOWX
if (!(m_context.cap & PPCCAP_VEA))
return false;
- case 0x096: // STWCX.
- case 0x097: // STWX
- case 0x0d7: // STBX
- case 0x197: // STHX
- case 0x296: // STWBRX
- case 0x396: // STHBRX
+ case 0x096: // STWCX.
+ case 0x097: // STWX
+ case 0x0d7: // STBX
+ case 0x197: // STHX
+ case 0x296: // STWBRX
+ case 0x396: // STHBRX
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x0b7: // STWUX
- case 0x0f7: // STBUX
- case 0x1b7: // STHUX
+ case 0x0b7: // STWUX
+ case 0x0f7: // STBUX
+ case 0x1b7: // STHUX
if (G_RA(op) == 0)
return false;
GPR_USED(desc, G_RA(op));
@@ -973,7 +973,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x0f2: // MTSRIN
+ case 0x0f2: // MTSRIN
if (!(m_context.cap & PPCCAP_OEA))
return false;
GPR_USED(desc, G_RS(op));
@@ -981,27 +981,27 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x132: // TLBIE
+ case 0x132: // TLBIE
if (!(m_context.cap & PPCCAP_OEA))
return false;
GPR_USED(desc, G_RB(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x172: // TLBIA
+ case 0x172: // TLBIA
if (!(m_context.cap & PPCCAP_OEA) || (m_context.cap & PPCCAP_603_MMU))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x3d2: // TLBLD
- case 0x3f2: // TLBLI
+ case 0x3d2: // TLBLD
+ case 0x3f2: // TLBLI
if (!(m_context.cap & PPCCAP_603_MMU) && !is_602_class())
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x200: // MCRXR
+ case 0x200: // MCRXR
XER_CA_USED(desc);
XER_OV_USED(desc);
XER_SO_USED(desc);
@@ -1011,7 +1011,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
XER_SO_MODIFIED(desc);
return true;
- case 0x215: // LSWX
+ case 0x215: // LSWX
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
XER_COUNT_USED(desc);
@@ -1020,8 +1020,8 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x217: // LFSX
- case 0x257: // LFDX
+ case 0x217: // LFSX
+ case 0x257: // LFDX
if (!(m_context.cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -1030,22 +1030,22 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x236: // TLBSYNC
+ case 0x236: // TLBSYNC
if (!(m_context.cap & PPCCAP_OEA))
return false;
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x256: // SYNC
+ case 0x256: // SYNC
return true;
- case 0x356: // EIEIO
+ case 0x356: // EIEIO
if (!(m_context.cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
return true;
- case 0x237: // LFSUX
- case 0x277: // LFDUX
+ case 0x237: // LFSUX
+ case 0x277: // LFDUX
if (!(m_context.cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
@@ -1057,7 +1057,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x255: // LSWI
+ case 0x255: // LSWI
GPR_USED_OR_ZERO(desc, G_RA(op));
for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4)
GPR_MODIFIED(desc, (G_RD(op) + regnum / 4) % 32);
@@ -1065,7 +1065,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4;
return true;
- case 0x295: // STSWX
+ case 0x295: // STSWX
GPR_USED_OR_ZERO(desc, G_RA(op));
GPR_USED(desc, G_RB(op));
XER_COUNT_USED(desc);
@@ -1074,7 +1074,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x2d5: // STSWI
+ case 0x2d5: // STSWI
GPR_USED_OR_ZERO(desc, G_RA(op));
for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4)
GPR_USED(desc, (G_RD(op) + regnum / 4) % 32);
@@ -1082,9 +1082,9 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4;
return true;
- case 0x297: // STFSX
- case 0x2d7: // STFDX
- case 0x3d7: // STFIWX
+ case 0x297: // STFSX
+ case 0x2d7: // STFDX
+ case 0x3d7: // STFIWX
if (!(m_context.cap & PPCCAP_FPU))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -1093,8 +1093,8 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x2b7: // STFSUX
- case 0x2f7: // STFDUX
+ case 0x2b7: // STFSUX
+ case 0x2f7: // STFDUX
if (!(m_context.cap & PPCCAP_FPU))
return false;
if (G_RA(op) == 0)
@@ -1106,7 +1106,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x338: // SRAWIx
+ case 0x338: // SRAWIx
GPR_USED(desc, G_RS(op));
GPR_MODIFIED(desc, G_RA(op));
XER_CA_MODIFIED(desc);
@@ -1117,7 +1117,7 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
}
return true;
- case 0x3f6: // DCBZ
+ case 0x3f6: // DCBZ
if (!(m_context.cap & (PPCCAP_VEA | PPCCAP_4XX)))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -1125,9 +1125,9 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x106: // ICBT
- case 0x1c6: // DCCCI
- case 0x3c6: // ICCCI
+ case 0x106: // ICBT
+ case 0x1c6: // DCCCI
+ case 0x3c6: // ICCCI
if (!(m_context.cap & PPCCAP_4XX))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -1135,8 +1135,8 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x1e6: // DCREAD
- case 0x3e6: // ICREAD
+ case 0x1e6: // DCREAD
+ case 0x3e6: // ICREAD
if (!(m_context.cap & PPCCAP_4XX))
return false;
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -1145,28 +1145,28 @@ bool ppc_frontend::describe_1f(UINT32 op, opcode_desc &desc, const opcode_desc *
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x143: // MFDCR
+ case 0x143: // MFDCR
if (!(m_context.cap & PPCCAP_4XX))
return false;
GPR_MODIFIED(desc, G_RD(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
return true;
- case 0x1c3: // MTDCR
+ case 0x1c3: // MTDCR
if (!(m_context.cap & PPCCAP_4XX))
return false;
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
return true;
- case 0x083: // WRTEE
+ case 0x083: // WRTEE
if (!(m_context.cap & PPCCAP_4XX))
return false;
GPR_USED(desc, G_RS(op));
desc.flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
return true;
- case 0x0a3: // WRTEEI
+ case 0x0a3: // WRTEEI
if (!(m_context.cap & PPCCAP_4XX))
return false;
if (op & MSR_EE)
@@ -1200,23 +1200,23 @@ bool ppc_frontend::describe_3b(UINT32 op, opcode_desc &desc, const opcode_desc *
switch (opswitch)
{
- case 0x12: // FDIVSx
+ case 0x12: // FDIVSx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
CR_MODIFIED(desc, 1);
if (is_601_class())
- desc.cycles = 17; // 601
+ desc.cycles = 17; // 601
else if (is_603_class())
- desc.cycles = 18; // 603
+ desc.cycles = 18; // 603
else
- desc.cycles = 17; // ???
+ desc.cycles = 17; // ???
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x14: // FSUBSx
- case 0x15: // FADDSx
+ case 0x14: // FSUBSx
+ case 0x15: // FADDSx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
FPR_MODIFIED(desc, G_RD(op));
@@ -1225,7 +1225,7 @@ bool ppc_frontend::describe_3b(UINT32 op, opcode_desc &desc, const opcode_desc *
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x19: // FMULSx - not the same form as FSUB/FADD!
+ case 0x19: // FMULSx - not the same form as FSUB/FADD!
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_REGC(op));
FPR_MODIFIED(desc, G_RD(op));
@@ -1234,8 +1234,8 @@ bool ppc_frontend::describe_3b(UINT32 op, opcode_desc &desc, const opcode_desc *
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x16: // FSQRTSx
- case 0x18: // FRESx
+ case 0x16: // FSQRTSx
+ case 0x18: // FRESx
FPR_USED(desc, G_RB(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
@@ -1243,10 +1243,10 @@ bool ppc_frontend::describe_3b(UINT32 op, opcode_desc &desc, const opcode_desc *
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x1c: // FMSUBSx
- case 0x1d: // FMADDSx
- case 0x1e: // FNMSUBSx
- case 0x1f: // FNMADDSx
+ case 0x1c: // FMSUBSx
+ case 0x1d: // FMADDSx
+ case 0x1e: // FNMSUBSx
+ case 0x1f: // FNMADDSx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
FPR_USED(desc, G_REGC(op));
@@ -1279,33 +1279,33 @@ bool ppc_frontend::describe_3f(UINT32 op, opcode_desc &desc, const opcode_desc *
opswitch &= 0x1f;
switch (opswitch)
{
- case 0x12: // FDIVx
+ case 0x12: // FDIVx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
CR_MODIFIED(desc, 1);
if (is_601_class())
- desc.cycles = 31; // 601
+ desc.cycles = 31; // 601
else if (is_603_class())
- desc.cycles = 33; // 603
+ desc.cycles = 33; // 603
else
- desc.cycles = 31; // ???
+ desc.cycles = 31; // ???
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x19: // FMULx
+ case 0x19: // FMULx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_REGC(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
CR_MODIFIED(desc, 1);
- desc.cycles = 2; // 601/603
+ desc.cycles = 2; // 601/603
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x14: // FSUBx
- case 0x15: // FADDx
+ case 0x14: // FSUBx
+ case 0x15: // FADDx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
FPR_MODIFIED(desc, G_RD(op));
@@ -1314,8 +1314,8 @@ bool ppc_frontend::describe_3f(UINT32 op, opcode_desc &desc, const opcode_desc *
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x16: // FSQRTx
- case 0x1a: // FSQRTEx
+ case 0x16: // FSQRTx
+ case 0x1a: // FSQRTEx
FPR_USED(desc, G_RB(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
@@ -1323,27 +1323,27 @@ bool ppc_frontend::describe_3f(UINT32 op, opcode_desc &desc, const opcode_desc *
FPSCR_MODIFIED(desc, 4);
return true;
- case 0x17: // FSELx
+ case 0x17: // FSELx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
FPR_USED(desc, G_REGC(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
CR_MODIFIED(desc, 1);
- desc.cycles = 2; // 601/603
+ desc.cycles = 2; // 601/603
return true;
- case 0x1c: // FMSUBx
- case 0x1d: // FMADDx
- case 0x1e: // FNMSUBx
- case 0x1f: // FNMADDx
+ case 0x1c: // FMSUBx
+ case 0x1d: // FMADDx
+ case 0x1e: // FNMSUBx
+ case 0x1f: // FNMADDx
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
FPR_USED(desc, G_REGC(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
CR_MODIFIED(desc, 1);
- desc.cycles = 2; // 601/603
+ desc.cycles = 2; // 601/603
FPSCR_MODIFIED(desc, 4);
return true;
}
@@ -1352,47 +1352,47 @@ bool ppc_frontend::describe_3f(UINT32 op, opcode_desc &desc, const opcode_desc *
{
switch (opswitch)
{
- case 0x32e: // FCTIDx - 64-bit only
- case 0x32f: // FCTIDZx - 64-bit only
- case 0x34e: // FCFIDx - 64-bit only
+ case 0x32e: // FCTIDx - 64-bit only
+ case 0x32f: // FCTIDZx - 64-bit only
+ case 0x34e: // FCFIDx - 64-bit only
return false;
- case 0x000: // FCMPU
- case 0x020: // FCMPO
+ case 0x000: // FCMPU
+ case 0x020: // FCMPO
FPR_USED(desc, G_RA(op));
FPR_USED(desc, G_RB(op));
CR_MODIFIED(desc, G_CRFD(op));
return true;
- case 0x00c: // FRSPx
- case 0x00e: // FCTIWx
- case 0x00f: // FCTIWZx
+ case 0x00c: // FRSPx
+ case 0x00e: // FCTIWx
+ case 0x00f: // FCTIWZx
FPSCR_MODIFIED(desc, 4);
- case 0x028: // FNEGx
- case 0x048: // FMRx
- case 0x088: // FNABSx
- case 0x108: // FABSx
+ case 0x028: // FNEGx
+ case 0x048: // FMRx
+ case 0x088: // FNABSx
+ case 0x108: // FABSx
FPR_USED(desc, G_RB(op));
FPR_MODIFIED(desc, G_RD(op));
if (op & M_RC)
CR_MODIFIED(desc, 1);
return true;
- case 0x026: // MTFSB1x
- case 0x046: // MTFSB0x
+ case 0x026: // MTFSB1x
+ case 0x046: // MTFSB0x
FPSCR_MODIFIED(desc, G_CRBD(op) / 4);
return true;
- case 0x040: // MCRFS
+ case 0x040: // MCRFS
FPSCR_USED(desc, G_CRFS(op));
CR_MODIFIED(desc, G_CRFD(op));
return true;
- case 0x086: // MTFSFIx
+ case 0x086: // MTFSFIx
FPSCR_MODIFIED(desc, G_CRFD(op));
return true;
- case 0x247: // MFFSx
+ case 0x247: // MFFSx
FPSCR_USED(desc, 0);
FPSCR_USED(desc, 1);
FPSCR_USED(desc, 2);
@@ -1404,7 +1404,7 @@ bool ppc_frontend::describe_3f(UINT32 op, opcode_desc &desc, const opcode_desc *
FPR_MODIFIED(desc, G_RD(op));
return true;
- case 0x2c7: // MTFSFx
+ case 0x2c7: // MTFSFx
FPR_USED(desc, G_RB(op));
if (G_CRM(op) & 0x80) FPSCR_MODIFIED(desc, 0);
if (G_CRM(op) & 0x40) FPSCR_MODIFIED(desc, 1);
diff --git a/src/emu/cpu/powerpc/ppcfe.h b/src/emu/cpu/powerpc/ppcfe.h
index b3209e4358c..a0bab6d4726 100644
--- a/src/emu/cpu/powerpc/ppcfe.h
+++ b/src/emu/cpu/powerpc/ppcfe.h
@@ -49,24 +49,24 @@
//**************************************************************************
// register flags 0
-#define REGFLAG_R(n) (1 << (n))
-#define REGFLAG_RZ(n) (((n) == 0) ? 0 : REGFLAG_R(n))
+#define REGFLAG_R(n) (1 << (n))
+#define REGFLAG_RZ(n) (((n) == 0) ? 0 : REGFLAG_R(n))
// register flags 1
-#define REGFLAG_FR(n) (1 << (n))
+#define REGFLAG_FR(n) (1 << (n))
// register flags 2
-#define REGFLAG_CR(n) (0xf0000000 >> (4 * (n)))
-#define REGFLAG_CR_BIT(n) (0x80000000 >> (n))
+#define REGFLAG_CR(n) (0xf0000000 >> (4 * (n)))
+#define REGFLAG_CR_BIT(n) (0x80000000 >> (n))
// register flags 3
-#define REGFLAG_XER_CA (1 << 0)
-#define REGFLAG_XER_OV (1 << 1)
-#define REGFLAG_XER_SO (1 << 2)
-#define REGFLAG_XER_COUNT (1 << 3)
-#define REGFLAG_CTR (1 << 4)
-#define REGFLAG_LR (1 << 5)
-#define REGFLAG_FPSCR(n) (1 << (6 + (n)))
+#define REGFLAG_XER_CA (1 << 0)
+#define REGFLAG_XER_OV (1 << 1)
+#define REGFLAG_XER_SO (1 << 2)
+#define REGFLAG_XER_COUNT (1 << 3)
+#define REGFLAG_CTR (1 << 4)
+#define REGFLAG_LR (1 << 5)
+#define REGFLAG_FPSCR(n) (1 << (6 + (n)))
diff --git a/src/emu/cpu/pps4/pps4.c b/src/emu/cpu/pps4/pps4.c
index f55cb26c735..d93a3ea6055 100644
--- a/src/emu/cpu/pps4/pps4.c
+++ b/src/emu/cpu/pps4/pps4.c
@@ -21,17 +21,17 @@
struct pps4_state
{
- UINT8 A; // Accumulator
- UINT8 X;
+ UINT8 A; // Accumulator
+ UINT8 X;
- PAIR P;
+ PAIR P;
PAIR SA;
PAIR SB;
- PAIR B; // BU + BM + BL
+ PAIR B; // BU + BM + BL
- UINT8 C; // Carry flag
- UINT8 FF1; // Flip-flop 1
- UINT8 FF2; // Flip-flop 2
+ UINT8 C; // Carry flag
+ UINT8 FF1; // Flip-flop 1
+ UINT8 FF2; // Flip-flop 2
legacy_cpu_device *device;
address_space *program;
@@ -39,7 +39,7 @@ struct pps4_state
address_space *data;
address_space *io;
- int icount;
+ int icount;
};
/***************************************************************************
@@ -78,87 +78,87 @@ static void execute_one(pps4_state *cpustate, int opcode)
switch (opcode)
{
// Arithmetic instructions
- case 0x0b: // AD
+ case 0x0b: // AD
break;
- case 0x0a: // ADC
+ case 0x0a: // ADC
break;
- case 0x09: // ADSK
+ case 0x09: // ADSK
break;
- case 0x08: // ADCSK
+ case 0x08: // ADCSK
break;
- case 0x60: case 0x61: case 0x62: case 0x63:
- case 0x64: case 0x66: case 0x67: case 0x68:
- case 0x69: case 0x6a: case 0x6b: case 0x6c:
- case 0x6d: case 0x6e:
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x66: case 0x67: case 0x68:
+ case 0x69: case 0x6a: case 0x6b: case 0x6c:
+ case 0x6d: case 0x6e:
// ADI
break;
- case 0x65: //DC
+ case 0x65: //DC
cpustate->A = (cpustate->A + 10) & 0x0f;
break;
// Logical instructions
- case 0x0d: // AND
+ case 0x0d: // AND
break;
- case 0x0f: // OR
+ case 0x0f: // OR
break;
- case 0x0c: // EOR
+ case 0x0c: // EOR
break;
- case 0x0e: // COMP
+ case 0x0e: // COMP
cpustate->A ^= 0x0f;
break;
// Data transfer instructions
- case 0x20: // SC
+ case 0x20: // SC
cpustate->C = 1;
break;
- case 0x24: //RC
+ case 0x24: //RC
cpustate->C = 0;
break;
- case 0x22: // SF1
+ case 0x22: // SF1
cpustate->FF1 = 1;
break;
- case 0x26: // RF1
+ case 0x26: // RF1
cpustate->FF1 = 0;
break;
- case 0x21: // SF2
+ case 0x21: // SF2
cpustate->FF2 = 1;
break;
- case 0x25: // RF2
+ case 0x25: // RF2
cpustate->FF2 = 0;
break;
- case 0x30: case 0x31: case 0x32: case 0x33:
- case 0x34: case 0x35: case 0x36: case 0x37:
+ case 0x30: case 0x31: case 0x32: case 0x33:
+ case 0x34: case 0x35: case 0x36: case 0x37:
// LD
break;
- case 0x38: case 0x39: case 0x3a: case 0x3b:
- case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ case 0x3c: case 0x3d: case 0x3e: case 0x3f:
// EX
break;
- case 0x28: case 0x29: case 0x2a: case 0x2b:
- case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f:
// EXD
break;
- case 0x70: case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- case 0x78: case 0x79: case 0x7a: case 0x7b:
- case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f:
// LDI
cpustate->A = opcode & 0x0f;
break;
- case 0x12: // LAX
+ case 0x12: // LAX
cpustate->A = cpustate->X;
break;
- case 0x1b: // LXA
+ case 0x1b: // LXA
cpustate->X = cpustate->A;
break;
- case 0x11: // LABL
+ case 0x11: // LABL
cpustate->A = cpustate->B.w.l & 0x00f;
break;
- case 0x10: // LBMX
+ case 0x10: // LBMX
cpustate->B.w.l &= 0xf0f;
cpustate->B.w.l |= (cpustate->X << 4);
break;
- case 0x04: // LBUA
+ case 0x04: // LBUA
break;
- case 0x19: // XABL
+ case 0x19: // XABL
{
UINT8 tmp = cpustate->B.w.l & 0x00f;
cpustate->B.w.l &= 0xff0;
@@ -166,7 +166,7 @@ static void execute_one(pps4_state *cpustate, int opcode)
cpustate->A = tmp;
}
break;
- case 0x18: // XBMX
+ case 0x18: // XBMX
{
UINT8 tmp = (cpustate->B.w.l & 0x0f0) >> 4;
cpustate->B.w.l &= 0xf0f;
@@ -174,40 +174,40 @@ static void execute_one(pps4_state *cpustate, int opcode)
cpustate->X = tmp;
}
break;
- case 0x1a: // XAX
+ case 0x1a: // XAX
{
UINT8 tmp = cpustate->A;
cpustate->A = cpustate->X;
cpustate->X = tmp;
}
break;
- case 0x06: // XS
+ case 0x06: // XS
{
PAIR tmp = cpustate->SA;
cpustate->SA = cpustate->SB;
cpustate->SB = tmp;
}
break;
- case 0x6f: // CYS
+ case 0x6f: // CYS
break;
- case 0xc0: case 0xc1: case 0xc2: case 0xc3:
- case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb:
- case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3:
+ case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ case 0xcc: case 0xcd: case 0xce: case 0xcf:
// LB
{
//UINT8 tmp = ARG(cpustate);
cpustate->icount -= 1;
}
break;
- case 0x00: // LBL
+ case 0x00: // LBL
{
UINT8 tmp = ARG(cpustate);
cpustate->icount -= 1;
cpustate->B.w.l = tmp;
}
break;
- case 0x17: // INCB
+ case 0x17: // INCB
if ((cpustate->B.w.l & 0x0f) == 0x0f) {
cpustate->B.w.l &= 0xff0;
DO_SKIP(cpustate);
@@ -215,7 +215,7 @@ static void execute_one(pps4_state *cpustate, int opcode)
cpustate->B.w.l += 1;
}
break;
- case 0x1f: // DECB
+ case 0x1f: // DECB
if ((cpustate->B.w.l & 0x0f) == 0x00) {
cpustate->B.w.l |= 0x00f;
DO_SKIP(cpustate);
@@ -224,89 +224,89 @@ static void execute_one(pps4_state *cpustate, int opcode)
}
break;
// Control transfer instructions
- case 0x80: case 0x81: case 0x82: case 0x83:
- case 0x84: case 0x85: case 0x86: case 0x87:
- case 0x88: case 0x89: case 0x8a: case 0x8b:
- case 0x8c: case 0x8d: case 0x8e: case 0x8f:
- case 0x90: case 0x91: case 0x92: case 0x93:
- case 0x94: case 0x95: case 0x96: case 0x97:
- case 0x98: case 0x99: case 0x9a: case 0x9b:
- case 0x9c: case 0x9d: case 0x9e: case 0x9f:
- case 0xa0: case 0xa1: case 0xa2: case 0xa3:
- case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- case 0xa8: case 0xa9: case 0xaa: case 0xab:
- case 0xac: case 0xad: case 0xae: case 0xaf:
- case 0xb0: case 0xb1: case 0xb2: case 0xb3:
- case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- case 0xb8: case 0xb9: case 0xba: case 0xbb:
- case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x85: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ case 0xac: case 0xad: case 0xae: case 0xaf:
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf:
// T
cpustate->P.w.l = (cpustate->P.w.l & 0xfc0) | (opcode & 0x3f);
break;
- case 0xd0: case 0xd1: case 0xd2: case 0xd3:
- case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb:
- case 0xdc: case 0xdd: case 0xde: case 0xdf:
- case 0xe0: case 0xe1: case 0xe2: case 0xe3:
- case 0xe4: case 0xe5: case 0xe6: case 0xe7:
- case 0xe8: case 0xe9: case 0xea: case 0xeb:
- case 0xec: case 0xed: case 0xee: case 0xef:
- case 0xf0: case 0xf1: case 0xf2: case 0xf3:
- case 0xf4: case 0xf5: case 0xf6: case 0xf7:
- case 0xf8: case 0xf9: case 0xfa: case 0xfb:
- case 0xfc: case 0xfd: case 0xfe: case 0xff:
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3:
+ case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3:
+ case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ case 0xe8: case 0xe9: case 0xea: case 0xeb:
+ case 0xec: case 0xed: case 0xee: case 0xef:
+ case 0xf0: case 0xf1: case 0xf2: case 0xf3:
+ case 0xf4: case 0xf5: case 0xf6: case 0xf7:
+ case 0xf8: case 0xf9: case 0xfa: case 0xfb:
+ case 0xfc: case 0xfd: case 0xfe: case 0xff:
// TM
break;
- case 0x50: case 0x51: case 0x52: case 0x53:
- case 0x54: case 0x55: case 0x56: case 0x57:
- case 0x58: case 0x59: case 0x5a: case 0x5b:
- case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ case 0x50: case 0x51: case 0x52: case 0x53:
+ case 0x54: case 0x55: case 0x56: case 0x57:
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f:
// TL
{
//UINT8 tmp = ARG(cpustate);
cpustate->icount -= 1;
}
break;
- case 0x01: case 0x02: case 0x03:
+ case 0x01: case 0x02: case 0x03:
// TML
{
//UINT8 tmp = ARG(cpustate);
cpustate->icount -= 1;
}
break;
- case 0x15: // SKC
+ case 0x15: // SKC
break;
- case 0x1e: // SKZ
+ case 0x1e: // SKZ
break;
- case 0x40: case 0x41: case 0x42: case 0x43:
- case 0x44: case 0x45: case 0x46: case 0x47:
- case 0x48: case 0x49: case 0x4a: case 0x4b:
- case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ case 0x40: case 0x41: case 0x42: case 0x43:
+ case 0x44: case 0x45: case 0x46: case 0x47:
+ case 0x48: case 0x49: case 0x4a: case 0x4b:
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f:
// SKBI
break;
- case 0x16: // SKF1
+ case 0x16: // SKF1
break;
- case 0x14: // SKF2
+ case 0x14: // SKF2
break;
- case 0x05: // RTN
+ case 0x05: // RTN
break;
- case 0x07: // RTNSK
+ case 0x07: // RTNSK
break;
// Input/Output instructions
- case 0x1c: // IOL
+ case 0x1c: // IOL
{
//UINT8 tmp = ARG(cpustate);
cpustate->icount -= 1;
}
break;
- case 0x27: // DIA
+ case 0x27: // DIA
break;
- case 0x23: // DIB
+ case 0x23: // DIB
break;
- case 0x1d: // DOA
+ case 0x1d: // DOA
break;
// Special instructions
- case 0x13: // SAG
+ case 0x13: // SAG
break;
}
}
@@ -399,47 +399,47 @@ CPU_GET_INFO( pps4 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pps4_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break; // 4 bit for RAM
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break; // 4 bit
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(pps4_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 2; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break; // 4 bit for RAM
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break; // 4 bit
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pps4); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pps4); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pps4); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pps4); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pps4); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(pps4); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(pps4); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(pps4); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(pps4); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(pps4); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(pps4); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(pps4); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(pps4); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(pps4); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "PPS4"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Rockwell PPS-4"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "PPS4"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Rockwell PPS-4"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c",
diff --git a/src/emu/cpu/pps4/pps4dasm.c b/src/emu/cpu/pps4/pps4dasm.c
index 51bdd5211c2..9b5632ea2bf 100644
--- a/src/emu/cpu/pps4/pps4dasm.c
+++ b/src/emu/cpu/pps4/pps4dasm.c
@@ -21,114 +21,114 @@ CPU_DISASSEMBLE( pps4 )
switch (op = OP(pc++))
{
// Arithmetic instructions
- case 0x0b: sprintf (buffer,"ad"); break;
- case 0x0a: sprintf (buffer,"adc"); break;
- case 0x09: sprintf (buffer,"adsk"); break;
- case 0x08: sprintf (buffer,"adcsk"); break;
- case 0x60: case 0x61: case 0x62: case 0x63:
- case 0x64: case 0x66: case 0x67: case 0x68:
- case 0x69: case 0x6a: case 0x6b: case 0x6c:
- case 0x6d: case 0x6e:
- sprintf (buffer,"adi %01x",(op & 0x0f)); break;
- case 0x65: sprintf (buffer,"dc"); break;
+ case 0x0b: sprintf (buffer,"ad"); break;
+ case 0x0a: sprintf (buffer,"adc"); break;
+ case 0x09: sprintf (buffer,"adsk"); break;
+ case 0x08: sprintf (buffer,"adcsk"); break;
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x66: case 0x67: case 0x68:
+ case 0x69: case 0x6a: case 0x6b: case 0x6c:
+ case 0x6d: case 0x6e:
+ sprintf (buffer,"adi %01x",(op & 0x0f)); break;
+ case 0x65: sprintf (buffer,"dc"); break;
// Logical instructions
- case 0x0d: sprintf (buffer,"and"); break;
- case 0x0f: sprintf (buffer,"or"); break;
- case 0x0c: sprintf (buffer,"eor"); break;
- case 0x0e: sprintf (buffer,"comp"); break;
+ case 0x0d: sprintf (buffer,"and"); break;
+ case 0x0f: sprintf (buffer,"or"); break;
+ case 0x0c: sprintf (buffer,"eor"); break;
+ case 0x0e: sprintf (buffer,"comp"); break;
// Data transfer instructions
- case 0x20: sprintf (buffer,"sc"); break;
- case 0x24: sprintf (buffer,"rc"); break;
- case 0x22: sprintf (buffer,"sf1"); break;
- case 0x26: sprintf (buffer,"rf1"); break;
- case 0x21: sprintf (buffer,"sf2"); break;
- case 0x25: sprintf (buffer,"rf2"); break;
- case 0x30: case 0x31: case 0x32: case 0x33:
- case 0x34: case 0x35: case 0x36: case 0x37:
- sprintf (buffer,"ld %01x",(op & 0x07)); break;
- case 0x38: case 0x39: case 0x3a: case 0x3b:
- case 0x3c: case 0x3d: case 0x3e: case 0x3f:
- sprintf (buffer,"ex %01x",(op & 0x07)); break;
- case 0x28: case 0x29: case 0x2a: case 0x2b:
- case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- sprintf (buffer,"exd %01x",(op & 0x07)); break;
- case 0x70: case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- sprintf (buffer,"ldi %01x",(op & 0x0f)); break;
- case 0x12: sprintf (buffer,"lax"); break;
- case 0x1b: sprintf (buffer,"lxa"); break;
- case 0x11: sprintf (buffer,"labl"); break;
- case 0x10: sprintf (buffer,"lbmx"); break;
- case 0x04: sprintf (buffer,"lbua"); break;
- case 0x19: sprintf (buffer,"xabl"); break;
- case 0x18: sprintf (buffer,"xbmx"); break;
- case 0x1a: sprintf (buffer,"xax"); break;
- case 0x06: sprintf (buffer,"xs"); break;
- case 0x6f: sprintf (buffer,"cys"); break;
- case 0xc0: case 0xc1: case 0xc2: case 0xc3:
- case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb:
- case 0xcc: case 0xcd: case 0xce: case 0xcf:
- sprintf (buffer,"lb %02x",ARG(pc)); pc++; break;
- case 0x00: sprintf (buffer,"lbl %02x",ARG(pc)); pc++; break;
- case 0x17: sprintf (buffer,"incb"); break;
- case 0x1f: sprintf (buffer,"decb"); break;
+ case 0x20: sprintf (buffer,"sc"); break;
+ case 0x24: sprintf (buffer,"rc"); break;
+ case 0x22: sprintf (buffer,"sf1"); break;
+ case 0x26: sprintf (buffer,"rf1"); break;
+ case 0x21: sprintf (buffer,"sf2"); break;
+ case 0x25: sprintf (buffer,"rf2"); break;
+ case 0x30: case 0x31: case 0x32: case 0x33:
+ case 0x34: case 0x35: case 0x36: case 0x37:
+ sprintf (buffer,"ld %01x",(op & 0x07)); break;
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ sprintf (buffer,"ex %01x",(op & 0x07)); break;
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ sprintf (buffer,"exd %01x",(op & 0x07)); break;
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ sprintf (buffer,"ldi %01x",(op & 0x0f)); break;
+ case 0x12: sprintf (buffer,"lax"); break;
+ case 0x1b: sprintf (buffer,"lxa"); break;
+ case 0x11: sprintf (buffer,"labl"); break;
+ case 0x10: sprintf (buffer,"lbmx"); break;
+ case 0x04: sprintf (buffer,"lbua"); break;
+ case 0x19: sprintf (buffer,"xabl"); break;
+ case 0x18: sprintf (buffer,"xbmx"); break;
+ case 0x1a: sprintf (buffer,"xax"); break;
+ case 0x06: sprintf (buffer,"xs"); break;
+ case 0x6f: sprintf (buffer,"cys"); break;
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3:
+ case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ sprintf (buffer,"lb %02x",ARG(pc)); pc++; break;
+ case 0x00: sprintf (buffer,"lbl %02x",ARG(pc)); pc++; break;
+ case 0x17: sprintf (buffer,"incb"); break;
+ case 0x1f: sprintf (buffer,"decb"); break;
// Control transfer instructions
- case 0x80: case 0x81: case 0x82: case 0x83:
- case 0x84: case 0x85: case 0x86: case 0x87:
- case 0x88: case 0x89: case 0x8a: case 0x8b:
- case 0x8c: case 0x8d: case 0x8e: case 0x8f:
- case 0x90: case 0x91: case 0x92: case 0x93:
- case 0x94: case 0x95: case 0x96: case 0x97:
- case 0x98: case 0x99: case 0x9a: case 0x9b:
- case 0x9c: case 0x9d: case 0x9e: case 0x9f:
- case 0xa0: case 0xa1: case 0xa2: case 0xa3:
- case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- case 0xa8: case 0xa9: case 0xaa: case 0xab:
- case 0xac: case 0xad: case 0xae: case 0xaf:
- case 0xb0: case 0xb1: case 0xb2: case 0xb3:
- case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- case 0xb8: case 0xb9: case 0xba: case 0xbb:
- case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- sprintf (buffer,"t %02x",(op & 0x3f)); break;
- case 0xd0: case 0xd1: case 0xd2: case 0xd3:
- case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb:
- case 0xdc: case 0xdd: case 0xde: case 0xdf:
- case 0xe0: case 0xe1: case 0xe2: case 0xe3:
- case 0xe4: case 0xe5: case 0xe6: case 0xe7:
- case 0xe8: case 0xe9: case 0xea: case 0xeb:
- case 0xec: case 0xed: case 0xee: case 0xef:
- case 0xf0: case 0xf1: case 0xf2: case 0xf3:
- case 0xf4: case 0xf5: case 0xf6: case 0xf7:
- case 0xf8: case 0xf9: case 0xfa: case 0xfb:
- case 0xfc: case 0xfd: case 0xfe: case 0xff:
- sprintf (buffer,"tm %02x %02x",(op & 0x3f),ARG(pc)); pc++; break;
- case 0x50: case 0x51: case 0x52: case 0x53:
- case 0x54: case 0x55: case 0x56: case 0x57:
- case 0x58: case 0x59: case 0x5a: case 0x5b:
- case 0x5c: case 0x5d: case 0x5e: case 0x5f:
- sprintf (buffer,"tl %01x %02x",(op & 0x0f),ARG(pc)); pc++; break;
- case 0x01: case 0x02: case 0x03:
- sprintf (buffer,"tml %02x",ARG(pc)); pc++; break;
- case 0x15: sprintf (buffer,"skc"); break;
- case 0x1e: sprintf (buffer,"skz"); break;
- case 0x40: case 0x41: case 0x42: case 0x43:
- case 0x44: case 0x45: case 0x46: case 0x47:
- case 0x48: case 0x49: case 0x4a: case 0x4b:
- case 0x4c: case 0x4d: case 0x4e: case 0x4f:
- sprintf (buffer,"skbi %01x",(op & 0x0f)); break;
- case 0x16: sprintf (buffer,"skf1"); break;
- case 0x14: sprintf (buffer,"skf2"); break;
- case 0x05: sprintf (buffer,"rtn"); break;
- case 0x07: sprintf (buffer,"rtnsk"); break;
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x85: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ case 0xac: case 0xad: case 0xae: case 0xaf:
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ sprintf (buffer,"t %02x",(op & 0x3f)); break;
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3:
+ case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3:
+ case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ case 0xe8: case 0xe9: case 0xea: case 0xeb:
+ case 0xec: case 0xed: case 0xee: case 0xef:
+ case 0xf0: case 0xf1: case 0xf2: case 0xf3:
+ case 0xf4: case 0xf5: case 0xf6: case 0xf7:
+ case 0xf8: case 0xf9: case 0xfa: case 0xfb:
+ case 0xfc: case 0xfd: case 0xfe: case 0xff:
+ sprintf (buffer,"tm %02x %02x",(op & 0x3f),ARG(pc)); pc++; break;
+ case 0x50: case 0x51: case 0x52: case 0x53:
+ case 0x54: case 0x55: case 0x56: case 0x57:
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ sprintf (buffer,"tl %01x %02x",(op & 0x0f),ARG(pc)); pc++; break;
+ case 0x01: case 0x02: case 0x03:
+ sprintf (buffer,"tml %02x",ARG(pc)); pc++; break;
+ case 0x15: sprintf (buffer,"skc"); break;
+ case 0x1e: sprintf (buffer,"skz"); break;
+ case 0x40: case 0x41: case 0x42: case 0x43:
+ case 0x44: case 0x45: case 0x46: case 0x47:
+ case 0x48: case 0x49: case 0x4a: case 0x4b:
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ sprintf (buffer,"skbi %01x",(op & 0x0f)); break;
+ case 0x16: sprintf (buffer,"skf1"); break;
+ case 0x14: sprintf (buffer,"skf2"); break;
+ case 0x05: sprintf (buffer,"rtn"); break;
+ case 0x07: sprintf (buffer,"rtnsk"); break;
// Input/Output instructions
- case 0x1c: sprintf (buffer,"iol %02x",ARG(pc)); pc++; break;
- case 0x27: sprintf (buffer,"dia"); break;
- case 0x23: sprintf (buffer,"dib"); break;
- case 0x1d: sprintf (buffer,"doa"); break;
+ case 0x1c: sprintf (buffer,"iol %02x",ARG(pc)); pc++; break;
+ case 0x27: sprintf (buffer,"dia"); break;
+ case 0x23: sprintf (buffer,"dib"); break;
+ case 0x1d: sprintf (buffer,"doa"); break;
// Special instructions
- case 0x13: sprintf (buffer,"sag"); break;
+ case 0x13: sprintf (buffer,"sag"); break;
}
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/psx/dismips.c b/src/emu/cpu/psx/dismips.c
index 339ff26ff3b..7c856fdb013 100644
--- a/src/emu/cpu/psx/dismips.c
+++ b/src/emu/cpu/psx/dismips.c
@@ -14,16 +14,16 @@ extern unsigned dasmmips3(char *,unsigned, UINT32);
static struct
{
UINT8 id[ 8 ];
- UINT32 text; /* SCE only */
- UINT32 data; /* SCE only */
+ UINT32 text; /* SCE only */
+ UINT32 data; /* SCE only */
UINT32 pc0;
- UINT32 gp0; /* SCE only */
+ UINT32 gp0; /* SCE only */
UINT32 t_addr;
UINT32 t_size;
- UINT32 d_addr; /* SCE only */
- UINT32 d_size; /* SCE only */
- UINT32 b_addr; /* SCE only */
- UINT32 b_size; /* SCE only */
+ UINT32 d_addr; /* SCE only */
+ UINT32 d_size; /* SCE only */
+ UINT32 b_addr; /* SCE only */
+ UINT32 b_size; /* SCE only */
UINT32 s_addr;
UINT32 s_size;
UINT32 SavedSP;
diff --git a/src/emu/cpu/psx/dma.c b/src/emu/cpu/psx/dma.c
index 9b94b411b32..bf44186577b 100644
--- a/src/emu/cpu/psx/dma.c
+++ b/src/emu/cpu/psx/dma.c
@@ -258,7 +258,7 @@ WRITE32_MEMBER( psxdma_device::write )
dma->fn_read( m_ram, n_address, n_size );
dma_finished( index );
}
- else if (dma->n_channelcontrol == 0x11000000 && // CD DMA
+ else if (dma->n_channelcontrol == 0x11000000 && // CD DMA
!dma->fn_read.isnull() )
{
verboselog( machine(), 1, "dma %d read block %08x %08x\n", index, n_address, n_size );
diff --git a/src/emu/cpu/psx/mdec.c b/src/emu/cpu/psx/mdec.c
index 76409cde4d6..4dcd16bfeee 100644
--- a/src/emu/cpu/psx/mdec.c
+++ b/src/emu/cpu/psx/mdec.c
@@ -94,7 +94,7 @@ INLINE UINT16 psxreadword( UINT32 *p_n_psxram, UINT32 n_address )
static const UINT32 m_p_n_mdec_zigzag[ DCTSIZE2 ] =
{
- 0, 1, 8, 16, 9, 2, 3, 10,
+ 0, 1, 8, 16, 9, 2, 3, 10,
17, 24, 32, 25, 18, 11, 4, 5,
12, 19, 26, 33, 40, 48, 41, 34,
27, 20, 13, 6, 7, 14, 21, 28,
diff --git a/src/emu/cpu/psx/mdec.h b/src/emu/cpu/psx/mdec.h
index 5a23301735f..74879806ec4 100644
--- a/src/emu/cpu/psx/mdec.h
+++ b/src/emu/cpu/psx/mdec.h
@@ -14,8 +14,8 @@
extern const device_type PSX_MDEC;
-#define DCTSIZE ( 8 )
-#define DCTSIZE2 ( DCTSIZE * DCTSIZE )
+#define DCTSIZE ( 8 )
+#define DCTSIZE2 ( DCTSIZE * DCTSIZE )
#define MDEC_COS_PRECALC_BITS ( 21 )
diff --git a/src/emu/cpu/psx/psx.h b/src/emu/cpu/psx/psx.h
index 008e2aa35fc..1eb5b0aa064 100644
--- a/src/emu/cpu/psx/psx.h
+++ b/src/emu/cpu/psx/psx.h
@@ -26,12 +26,12 @@
// interrupts
-#define PSXCPU_IRQ0 ( 0 )
-#define PSXCPU_IRQ1 ( 1 )
-#define PSXCPU_IRQ2 ( 2 )
-#define PSXCPU_IRQ3 ( 3 )
-#define PSXCPU_IRQ4 ( 4 )
-#define PSXCPU_IRQ5 ( 5 )
+#define PSXCPU_IRQ0 ( 0 )
+#define PSXCPU_IRQ1 ( 1 )
+#define PSXCPU_IRQ2 ( 2 )
+#define PSXCPU_IRQ3 ( 3 )
+#define PSXCPU_IRQ4 ( 4 )
+#define PSXCPU_IRQ5 ( 5 )
// register enumeration
@@ -184,7 +184,7 @@ protected:
UINT32 m_hi;
UINT32 m_lo;
- // internal stuff
+ // internal stuff
UINT32 m_op;
// memory access
@@ -198,7 +198,7 @@ protected:
direct_read_data *m_direct;
// other internal states
- int m_icount;
+ int m_icount;
UINT32 m_com_delay;
UINT32 m_delayv;
UINT32 m_delayr;
diff --git a/src/emu/cpu/psx/siodev.h b/src/emu/cpu/psx/siodev.h
index 51ea53e076c..3964111f750 100644
--- a/src/emu/cpu/psx/siodev.h
+++ b/src/emu/cpu/psx/siodev.h
@@ -5,12 +5,12 @@
#ifndef _PSXSIODEV_H_
#define _PSXSIODEV_H_
-#define PSX_SIO_OUT_DATA ( 1 ) /* COMMAND */
-#define PSX_SIO_OUT_DTR ( 2 ) /* ATT */
+#define PSX_SIO_OUT_DATA ( 1 ) /* COMMAND */
+#define PSX_SIO_OUT_DTR ( 2 ) /* ATT */
#define PSX_SIO_OUT_RTS ( 4 )
-#define PSX_SIO_OUT_CLOCK ( 8 ) /* CLOCK */
-#define PSX_SIO_IN_DATA ( 1 ) /* DATA */
-#define PSX_SIO_IN_DSR ( 2 ) /* ACK */
+#define PSX_SIO_OUT_CLOCK ( 8 ) /* CLOCK */
+#define PSX_SIO_IN_DATA ( 1 ) /* DATA */
+#define PSX_SIO_IN_DSR ( 2 ) /* ACK */
#define PSX_SIO_IN_CTS ( 4 )
class psxsio_device;
diff --git a/src/emu/cpu/rsp/rsp.c b/src/emu/cpu/rsp/rsp.c
index 7b3beb580bb..f48faed8e76 100644
--- a/src/emu/cpu/rsp/rsp.c
+++ b/src/emu/cpu/rsp/rsp.c
@@ -13,20 +13,20 @@ CPU_DISASSEMBLE( rsp );
#ifndef USE_RSPDRC
-#define LOG_INSTRUCTION_EXECUTION 0
-#define SAVE_DISASM 0
-#define SAVE_DMEM 0
+#define LOG_INSTRUCTION_EXECUTION 0
+#define SAVE_DISASM 0
+#define SAVE_DMEM 0
#define RSP_TEST_SYNC 0
-#define PRINT_VECREG(x) mame_printf_debug("V%d: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X\n", (x), \
+#define PRINT_VECREG(x) mame_printf_debug("V%d: %04X|%04X|%04X|%04X|%04X|%04X|%04X|%04X\n", (x), \
(UINT16)VREG_S((x),0), (UINT16)VREG_S((x),1), \
(UINT16)VREG_S((x),2), (UINT16)VREG_S((x),3), \
(UINT16)VREG_S((x),4), (UINT16)VREG_S((x),5), \
(UINT16)VREG_S((x),6), (UINT16)VREG_S((x),7))
#define PRINT_ACCUM(x) mame_printf_debug("A%d: %08X|%08X\n", (x), \
- (UINT32)( ( ACCUM(x) >> 32 ) & 0x00000000ffffffff ), \
- (UINT32)( ACCUM(x) & 0x00000000ffffffff ))
+ (UINT32)( ( ACCUM(x) >> 32 ) & 0x00000000ffffffff ), \
+ (UINT32)( ACCUM(x) & 0x00000000ffffffff ))
extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
@@ -37,55 +37,55 @@ INLINE rsp_state *get_safe_token(device_t *device)
return (rsp_state *)downcast<legacy_cpu_device *>(device)->token();
}
-#define SIMM16 ((INT32)(INT16)(op))
-#define UIMM16 ((UINT16)(op))
-#define UIMM26 (op & 0x03ffffff)
+#define SIMM16 ((INT32)(INT16)(op))
+#define UIMM16 ((UINT16)(op))
+#define UIMM26 (op & 0x03ffffff)
-#define JUMP_ABS(addr) { rsp->nextpc = 0x04001000 | (((addr) << 2) & 0xfff); }
-#define JUMP_ABS_L(addr,l) { rsp->nextpc = 0x04001000 | (((addr) << 2) & 0xfff); rsp->r[l] = rsp->pc + 4; }
-#define JUMP_REL(offset) { rsp->nextpc = 0x04001000 | ((rsp->pc + ((offset) << 2)) & 0xfff); }
-#define JUMP_REL_L(offset,l) { rsp->nextpc = 0x04001000 | ((rsp->pc + ((offset) << 2)) & 0xfff); rsp->r[l] = rsp->pc + 4; }
-#define JUMP_PC(addr) { rsp->nextpc = 0x04001000 | ((addr) & 0xfff); }
-#define JUMP_PC_L(addr,l) { rsp->nextpc = 0x04001000 | ((addr) & 0xfff); rsp->r[l] = rsp->pc + 4; }
-#define LINK(l) { rsp->r[l] = rsp->pc + 4; }
+#define JUMP_ABS(addr) { rsp->nextpc = 0x04001000 | (((addr) << 2) & 0xfff); }
+#define JUMP_ABS_L(addr,l) { rsp->nextpc = 0x04001000 | (((addr) << 2) & 0xfff); rsp->r[l] = rsp->pc + 4; }
+#define JUMP_REL(offset) { rsp->nextpc = 0x04001000 | ((rsp->pc + ((offset) << 2)) & 0xfff); }
+#define JUMP_REL_L(offset,l) { rsp->nextpc = 0x04001000 | ((rsp->pc + ((offset) << 2)) & 0xfff); rsp->r[l] = rsp->pc + 4; }
+#define JUMP_PC(addr) { rsp->nextpc = 0x04001000 | ((addr) & 0xfff); }
+#define JUMP_PC_L(addr,l) { rsp->nextpc = 0x04001000 | ((addr) & 0xfff); rsp->r[l] = rsp->pc + 4; }
+#define LINK(l) { rsp->r[l] = rsp->pc + 4; }
-#define VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
-#define VREG_S(reg, offset) rsp->v[(reg)].s[(offset)]
-#define VREG_L(reg, offset) rsp->v[(reg)].l[(offset)]
+#define VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
+#define VREG_S(reg, offset) rsp->v[(reg)].s[(offset)]
+#define VREG_L(reg, offset) rsp->v[(reg)].l[(offset)]
-#define R_VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
-#define R_VREG_S(reg, offset) (INT16)rsp->v[(reg)].s[(offset)]
-#define R_VREG_L(reg, offset) rsp->v[(reg)].l[(offset)]
+#define R_VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
+#define R_VREG_S(reg, offset) (INT16)rsp->v[(reg)].s[(offset)]
+#define R_VREG_L(reg, offset) rsp->v[(reg)].l[(offset)]
-#define W_VREG_B(reg, offset, val) (rsp->v[(reg)].b[(offset)^1] = val)
-#define W_VREG_S(reg, offset, val) (rsp->v[(reg)].s[(offset)] = val)
-#define W_VREG_L(reg, offset, val) (rsp->v[(reg)].l[(offset)] = val)
+#define W_VREG_B(reg, offset, val) (rsp->v[(reg)].b[(offset)^1] = val)
+#define W_VREG_S(reg, offset, val) (rsp->v[(reg)].s[(offset)] = val)
+#define W_VREG_L(reg, offset, val) (rsp->v[(reg)].l[(offset)] = val)
-#define VEC_EL_2(x,z) (vector_elements[(x)][(z)])
+#define VEC_EL_2(x,z) (vector_elements[(x)][(z)])
-#define ACCUM(x) rsp->accum[((x))].q
-#define ACCUM_H(x) rsp->accum[((x))].w[3]
-#define ACCUM_M(x) rsp->accum[((x))].w[2]
-#define ACCUM_L(x) rsp->accum[((x))].w[1]
+#define ACCUM(x) rsp->accum[((x))].q
+#define ACCUM_H(x) rsp->accum[((x))].w[3]
+#define ACCUM_M(x) rsp->accum[((x))].w[2]
+#define ACCUM_L(x) rsp->accum[((x))].w[1]
-#define CARRY_FLAG(x) ((rsp->flag[0] & (1 << ((x)))) ? 1 : 0)
-#define CLEAR_CARRY_FLAGS() { rsp->flag[0] &= ~0xff; }
-#define SET_CARRY_FLAG(x) { rsp->flag[0] |= (1 << ((x))); }
-#define CLEAR_CARRY_FLAG(x) { rsp->flag[0] &= ~(1 << ((x))); }
+#define CARRY_FLAG(x) ((rsp->flag[0] & (1 << ((x)))) ? 1 : 0)
+#define CLEAR_CARRY_FLAGS() { rsp->flag[0] &= ~0xff; }
+#define SET_CARRY_FLAG(x) { rsp->flag[0] |= (1 << ((x))); }
+#define CLEAR_CARRY_FLAG(x) { rsp->flag[0] &= ~(1 << ((x))); }
-#define COMPARE_FLAG(x) ((rsp->flag[1] & (1 << ((x)))) ? 1 : 0)
-#define CLEAR_COMPARE_FLAGS() { rsp->flag[1] &= ~0xff; }
-#define SET_COMPARE_FLAG(x) { rsp->flag[1] |= (1 << ((x))); }
-#define CLEAR_COMPARE_FLAG(x) { rsp->flag[1] &= ~(1 << ((x))); }
+#define COMPARE_FLAG(x) ((rsp->flag[1] & (1 << ((x)))) ? 1 : 0)
+#define CLEAR_COMPARE_FLAGS() { rsp->flag[1] &= ~0xff; }
+#define SET_COMPARE_FLAG(x) { rsp->flag[1] |= (1 << ((x))); }
+#define CLEAR_COMPARE_FLAG(x) { rsp->flag[1] &= ~(1 << ((x))); }
-#define ZERO_FLAG(x) ((rsp->flag[0] & (1 << (8+(x)))) ? 1 : 0)
-#define CLEAR_ZERO_FLAGS() { rsp->flag[0] &= ~0xff00; }
-#define SET_ZERO_FLAG(x) { rsp->flag[0] |= (1 << (8+(x))); }
-#define CLEAR_ZERO_FLAG(x) { rsp->flag[0] &= ~(1 << (8+(x))); }
+#define ZERO_FLAG(x) ((rsp->flag[0] & (1 << (8+(x)))) ? 1 : 0)
+#define CLEAR_ZERO_FLAGS() { rsp->flag[0] &= ~0xff00; }
+#define SET_ZERO_FLAG(x) { rsp->flag[0] |= (1 << (8+(x))); }
+#define CLEAR_ZERO_FLAG(x) { rsp->flag[0] &= ~(1 << (8+(x))); }
-#define EXTENSION_FLAG(x) ((rsp.flag[2] & (1 << ((x)))) ? 1 : 0)
+#define EXTENSION_FLAG(x) ((rsp.flag[2] & (1 << ((x)))) ? 1 : 0)
-#define ROPCODE(pc) rsp->program->read_dword(pc)
+#define ROPCODE(pc) rsp->program->read_dword(pc)
INLINE UINT8 READ8(rsp_state *rsp, UINT32 address)
{
@@ -123,9 +123,9 @@ INLINE UINT32 READ32(rsp_state *rsp, UINT32 address)
if(address & 3)
{
ret = ((rsp->program->read_byte(address + 0) & 0xff) << 24) |
- ((rsp->program->read_byte(address + 1) & 0xff) << 16) |
- ((rsp->program->read_byte(address + 2) & 0xff) << 8) |
- ((rsp->program->read_byte(address + 3) & 0xff) << 0);
+ ((rsp->program->read_byte(address + 1) & 0xff) << 16) |
+ ((rsp->program->read_byte(address + 2) & 0xff) << 8) |
+ ((rsp->program->read_byte(address + 3) & 0xff) << 0);
}
else
{
@@ -251,22 +251,22 @@ static void unimplemented_opcode(rsp_state *rsp, UINT32 op)
static const int vector_elements[16][8] =
{
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // ???
- { 0, 0, 2, 2, 4, 4, 6, 6 }, // 0q
- { 1, 1, 3, 3, 5, 5, 7, 7 }, // 1q
- { 0, 0, 0, 0, 4, 4, 4, 4 }, // 0h
- { 1, 1, 1, 1, 5, 5, 5, 5 }, // 1h
- { 2, 2, 2, 2, 6, 6, 6, 6 }, // 2h
- { 3, 3, 3, 3, 7, 7, 7, 7 }, // 3h
- { 0, 0, 0, 0, 0, 0, 0, 0 }, // 0
- { 1, 1, 1, 1, 1, 1, 1, 1 }, // 1
- { 2, 2, 2, 2, 2, 2, 2, 2 }, // 2
- { 3, 3, 3, 3, 3, 3, 3, 3 }, // 3
- { 4, 4, 4, 4, 4, 4, 4, 4 }, // 4
- { 5, 5, 5, 5, 5, 5, 5, 5 }, // 5
- { 6, 6, 6, 6, 6, 6, 6, 6 }, // 6
- { 7, 7, 7, 7, 7, 7, 7, 7 }, // 7
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // ???
+ { 0, 0, 2, 2, 4, 4, 6, 6 }, // 0q
+ { 1, 1, 3, 3, 5, 5, 7, 7 }, // 1q
+ { 0, 0, 0, 0, 4, 4, 4, 4 }, // 0h
+ { 1, 1, 1, 1, 5, 5, 5, 5 }, // 1h
+ { 2, 2, 2, 2, 6, 6, 6, 6 }, // 2h
+ { 3, 3, 3, 3, 7, 7, 7, 7 }, // 3h
+ { 0, 0, 0, 0, 0, 0, 0, 0 }, // 0
+ { 1, 1, 1, 1, 1, 1, 1, 1 }, // 1
+ { 2, 2, 2, 2, 2, 2, 2, 2 }, // 2
+ { 3, 3, 3, 3, 3, 3, 3, 3 }, // 3
+ { 4, 4, 4, 4, 4, 4, 4, 4 }, // 4
+ { 5, 5, 5, 5, 5, 5, 5, 5 }, // 5
+ { 6, 6, 6, 6, 6, 6, 6, 6 }, // 6
+ { 7, 7, 7, 7, 7, 7, 7, 7 }, // 7
};
static CPU_INIT( rsp )
@@ -387,7 +387,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
switch ((op >> 11) & 0x1f)
{
- case 0x00: /* LBV */
+ case 0x00: /* LBV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -400,7 +400,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
VREG_B(dest, index) = READ8(rsp, ea);
break;
}
- case 0x01: /* LSV */
+ case 0x01: /* LSV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -420,7 +420,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x02: /* LLV */
+ case 0x02: /* LLV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -440,7 +440,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x03: /* LDV */
+ case 0x03: /* LDV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -460,7 +460,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x04: /* LQV */
+ case 0x04: /* LQV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -481,7 +481,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x05: /* LRV */
+ case 0x05: /* LRV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -503,7 +503,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x06: /* LPV */
+ case 0x06: /* LPV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -520,7 +520,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x07: /* LUV */
+ case 0x07: /* LUV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -537,7 +537,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x08: /* LHV */
+ case 0x08: /* LHV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -554,7 +554,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x09: /* LFV */
+ case 0x09: /* LFV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -576,7 +576,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x0a: /* LWV */
+ case 0x0a: /* LWV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -600,7 +600,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x0b: /* LTV */
+ case 0x0b: /* LTV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -619,7 +619,7 @@ static void handle_lwc2(rsp_state *rsp, UINT32 op)
element = 7 - (index >> 1);
- if (index & 1) fatalerror("RSP: LTV: index = %d\n", index);
+ if (index & 1) fatalerror("RSP: LTV: index = %d\n", index);
ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
@@ -657,7 +657,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
switch ((op >> 11) & 0x1f)
{
- case 0x00: /* SBV */
+ case 0x00: /* SBV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -670,7 +670,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
WRITE8(rsp, ea, VREG_B(dest, index));
break;
}
- case 0x01: /* SSV */
+ case 0x01: /* SSV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -690,7 +690,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x02: /* SLV */
+ case 0x02: /* SLV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -710,7 +710,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x03: /* SDV */
+ case 0x03: /* SDV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -730,7 +730,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x04: /* SQV */
+ case 0x04: /* SQV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -750,7 +750,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x05: /* SRV */
+ case 0x05: /* SRV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -773,7 +773,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x06: /* SPV */
+ case 0x06: /* SPV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -799,7 +799,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x07: /* SUV */
+ case 0x07: /* SUV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -825,7 +825,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x08: /* SHV */
+ case 0x08: /* SHV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -839,14 +839,14 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
for (i=0; i < 8; i++)
{
UINT8 d = ((VREG_B(dest, ((index + (i << 1) + 0) & 0xf))) << 1) |
- ((VREG_B(dest, ((index + (i << 1) + 1) & 0xf))) >> 7);
+ ((VREG_B(dest, ((index + (i << 1) + 1) & 0xf))) >> 7);
WRITE8(rsp, ea, d);
ea += 2;
}
break;
}
- case 0x09: /* SFV */
+ case 0x09: /* SFV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -857,7 +857,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
// FIXME: only works for index 0 and index 8
- if (index & 0x7) mame_printf_debug("RSP: SFV: index = %d at %08X\n", index, rsp->ppc);
+ if (index & 0x7) mame_printf_debug("RSP: SFV: index = %d at %08X\n", index, rsp->ppc);
ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
@@ -873,7 +873,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x0a: /* SWV */
+ case 0x0a: /* SWV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -897,7 +897,7 @@ static void handle_swc2(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x0b: /* STV */
+ case 0x0b: /* STV */
{
// 31 25 20 15 10 6 0
// --------------------------------------------------
@@ -1008,7 +1008,7 @@ INLINE UINT16 SATURATE_ACCUM1(rsp_state *rsp, int accum, UINT16 negative, UINT16
}
else
{
- return ACCUM_M(accum);
+ return ACCUM_M(accum);
}
}
}
@@ -1026,7 +1026,7 @@ INLINE UINT16 SATURATE_ACCUM1(rsp_state *rsp, int accum, UINT16 negative, UINT16
}
else
{
- return ACCUM_M(accum);
+ return ACCUM_M(accum);
}
}
}
@@ -1071,7 +1071,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
switch (op & 0x3f)
{
- case 0x00: /* VMULF */
+ case 0x00: /* VMULF */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1099,8 +1099,8 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
else
{
r = s1 * s2 * 2;
- r += 0x8000; // rounding ?
- ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ r += 0x8000; // rounding ?
+ ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
ACCUM_M(i) = (INT16)(r >> 16);
ACCUM_L(i) = (UINT16)(r);
vres[i] = ACCUM_M(i);
@@ -1111,7 +1111,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x01: /* VMULU */
+ case 0x01: /* VMULU */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1128,7 +1128,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
s1 = (INT32)(INT16)VREG_S(VS1REG, i);
s2 = (INT32)(INT16)VREG_S(VS2REG, sel);
r = s1 * s2 * 2;
- r += 0x8000; // rounding ?
+ r += 0x8000; // rounding ?
ACCUM_H(i) = (UINT16)(r >> 32);
ACCUM_M(i) = (UINT16)(r >> 16);
@@ -1151,7 +1151,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x04: /* VMUDL */
+ case 0x04: /* VMUDL */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1182,7 +1182,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x05: /* VMUDM */
+ case 0x05: /* VMUDM */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1200,10 +1200,10 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
{
sel = VEC_EL_2(EL, i);
s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
+ s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
r = s1 * s2;
- ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
ACCUM_M(i) = (INT16)(r >> 16);
ACCUM_L(i) = (UINT16)(r);
@@ -1214,7 +1214,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
}
- case 0x06: /* VMUDN */
+ case 0x06: /* VMUDN */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1231,11 +1231,11 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
for (i=0; i < 8; i++)
{
sel = VEC_EL_2(EL, i);
- s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
+ s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
s2 = (INT32)(INT16)VREG_S(VS2REG, sel);
r = s1 * s2;
- ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
ACCUM_M(i) = (INT16)(r >> 16);
ACCUM_L(i) = (UINT16)(r);
@@ -1245,7 +1245,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x07: /* VMUDH */
+ case 0x07: /* VMUDH */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1271,14 +1271,14 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
ACCUM_L(i) = 0;
if (r < -32768) r = -32768;
- if (r > 32767) r = 32767;
+ if (r > 32767) r = 32767;
vres[i] = (INT16)(r);
}
WRITEBACK_RESULT();
break;
}
- case 0x08: /* VMACF */
+ case 0x08: /* VMACF */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1308,7 +1308,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x09: /* VMACU */
+ case 0x09: /* VMACU */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1363,7 +1363,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x0c: /* VMADL */
+ case 0x0c: /* VMADL */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1399,7 +1399,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x0d: /* VMADM */
+ case 0x0d: /* VMADM */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1418,7 +1418,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
{
sel = VEC_EL_2(EL, i);
s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
+ s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
r1 = s1 * s2;
r2 = (UINT16)ACCUM_L(i) + (UINT16)(r1);
r3 = (UINT16)ACCUM_M(i) + (r1 >> 16) + (r2 >> 16);
@@ -1437,7 +1437,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x0e: /* VMADN */
+ case 0x0e: /* VMADN */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1454,7 +1454,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
for (i=0; i < 8; i++)
{
sel = VEC_EL_2(EL, i);
- s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
+ s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
s2 = (INT32)(INT16)VREG_S(VS2REG, sel);
ACCUM(i) += (INT64)(s1*s2)<<16;
@@ -1467,7 +1467,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x0f: /* VMADH */
+ case 0x0f: /* VMADH */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1498,7 +1498,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x10: /* VADD */
+ case 0x10: /* VADD */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1530,7 +1530,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x11: /* VSUB */
+ case 0x11: /* VSUB */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1563,7 +1563,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x13: /* VABS */
+ case 0x13: /* VABS */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1607,7 +1607,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x14: /* VADDC */
+ case 0x14: /* VADDC */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1642,7 +1642,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x15: /* VSUBC */
+ case 0x15: /* VSUBC */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1681,7 +1681,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x1d: /* VSAW */
+ case 0x1d: /* VSAW */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1692,7 +1692,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
switch (EL)
{
- case 0x08: // VSAWH
+ case 0x08: // VSAWH
{
for (i=0; i < 8; i++)
{
@@ -1700,7 +1700,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x09: // VSAWM
+ case 0x09: // VSAWM
{
for (i=0; i < 8; i++)
{
@@ -1708,7 +1708,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
}
break;
}
- case 0x0a: // VSAWL
+ case 0x0a: // VSAWL
{
for (i=0; i < 8; i++)
{
@@ -1716,14 +1716,14 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
}
break;
}
- default: //fatalerror("RSP: VSAW: el = %d\n", EL);//???????
+ default: //fatalerror("RSP: VSAW: el = %d\n", EL);//???????
printf("RSP: VSAW: el = %d\n", EL);//??? ???
exit(0);
}
break;
}
- case 0x20: /* VLT */
+ case 0x20: /* VLT */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1769,7 +1769,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x21: /* VEQ */
+ case 0x21: /* VEQ */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1803,7 +1803,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x22: /* VNE */
+ case 0x22: /* VNE */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1847,7 +1847,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x23: /* VGE */
+ case 0x23: /* VGE */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1893,7 +1893,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x24: /* VCL */
+ case 0x24: /* VCL */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -1997,7 +1997,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x25: /* VCH */
+ case 0x25: /* VCH */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2078,7 +2078,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x26: /* VCR */
+ case 0x26: /* VCR */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2138,7 +2138,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x27: /* VMRG */
+ case 0x27: /* VMRG */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2165,7 +2165,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
WRITEBACK_RESULT();
break;
}
- case 0x28: /* VAND */
+ case 0x28: /* VAND */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2184,7 +2184,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
WRITEBACK_RESULT();
break;
}
- case 0x29: /* VNAND */
+ case 0x29: /* VNAND */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2203,7 +2203,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
WRITEBACK_RESULT();
break;
}
- case 0x2a: /* VOR */
+ case 0x2a: /* VOR */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2222,7 +2222,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
WRITEBACK_RESULT();
break;
}
- case 0x2b: /* VNOR */
+ case 0x2b: /* VNOR */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2241,7 +2241,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
WRITEBACK_RESULT();
break;
}
- case 0x2c: /* VXOR */
+ case 0x2c: /* VXOR */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2260,7 +2260,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
WRITEBACK_RESULT();
break;
}
- case 0x2d: /* VNXOR */
+ case 0x2d: /* VNXOR */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2280,7 +2280,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x30: /* VRCP */
+ case 0x30: /* VRCP */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2342,7 +2342,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x31: /* VRCPL */
+ case 0x31: /* VRCPL */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2433,7 +2433,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x32: /* VRCPH */
+ case 0x32: /* VRCPH */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2459,7 +2459,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x33: /* VMOV */
+ case 0x33: /* VMOV */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2480,7 +2480,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x34: /* VRSQ */
+ case 0x34: /* VRSQ */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2544,7 +2544,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x35: /* VRSQL */
+ case 0x35: /* VRSQL */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2636,7 +2636,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- case 0x36: /* VRSQH */
+ case 0x36: /* VRSQH */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2657,11 +2657,11 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
ACCUM_L(i) = VREG_S(VS2REG, sel);
}
- VREG_S(VDREG, del) = (INT16)(rsp->reciprocal_res >> 16); // store high part
+ VREG_S(VDREG, del) = (INT16)(rsp->reciprocal_res >> 16); // store high part
break;
}
- case 0x37: /* VNOP */
+ case 0x37: /* VNOP */
{
// 31 25 24 20 15 10 5 0
// ------------------------------------------------------
@@ -2673,7 +2673,7 @@ static void handle_vector_ops(rsp_state *rsp, UINT32 op)
break;
}
- default: unimplemented_opcode(rsp, op); break;
+ default: unimplemented_opcode(rsp, op); break;
}
}
@@ -2707,19 +2707,19 @@ static CPU_EXECUTE( rsp )
switch (op >> 26)
{
- case 0x00: /* SPECIAL */
+ case 0x00: /* SPECIAL */
{
switch (op & 0x3f)
{
- case 0x00: /* SLL */ if (RDREG) RDVAL = (UINT32)RTVAL << SHIFT; break;
- case 0x02: /* SRL */ if (RDREG) RDVAL = (UINT32)RTVAL >> SHIFT; break;
- case 0x03: /* SRA */ if (RDREG) RDVAL = (INT32)RTVAL >> SHIFT; break;
- case 0x04: /* SLLV */ if (RDREG) RDVAL = (UINT32)RTVAL << (RSVAL & 0x1f); break;
- case 0x06: /* SRLV */ if (RDREG) RDVAL = (UINT32)RTVAL >> (RSVAL & 0x1f); break;
- case 0x07: /* SRAV */ if (RDREG) RDVAL = (INT32)RTVAL >> (RSVAL & 0x1f); break;
- case 0x08: /* JR */ JUMP_PC(RSVAL); break;
- case 0x09: /* JALR */ JUMP_PC_L(RSVAL, RDREG); break;
- case 0x0d: /* BREAK */
+ case 0x00: /* SLL */ if (RDREG) RDVAL = (UINT32)RTVAL << SHIFT; break;
+ case 0x02: /* SRL */ if (RDREG) RDVAL = (UINT32)RTVAL >> SHIFT; break;
+ case 0x03: /* SRA */ if (RDREG) RDVAL = (INT32)RTVAL >> SHIFT; break;
+ case 0x04: /* SLLV */ if (RDREG) RDVAL = (UINT32)RTVAL << (RSVAL & 0x1f); break;
+ case 0x06: /* SRLV */ if (RDREG) RDVAL = (UINT32)RTVAL >> (RSVAL & 0x1f); break;
+ case 0x07: /* SRAV */ if (RDREG) RDVAL = (INT32)RTVAL >> (RSVAL & 0x1f); break;
+ case 0x08: /* JR */ JUMP_PC(RSVAL); break;
+ case 0x09: /* JALR */ JUMP_PC_L(RSVAL, RDREG); break;
+ case 0x0d: /* BREAK */
{
(rsp->sp_set_status_func)(0, 0x3);
rsp->icount = MIN(rsp->icount, 1);
@@ -2728,65 +2728,65 @@ static CPU_EXECUTE( rsp )
break;
}
- case 0x20: /* ADD */ if (RDREG) RDVAL = (INT32)(RSVAL + RTVAL); break;
- case 0x21: /* ADDU */ if (RDREG) RDVAL = (INT32)(RSVAL + RTVAL); break;
- case 0x22: /* SUB */ if (RDREG) RDVAL = (INT32)(RSVAL - RTVAL); break;
- case 0x23: /* SUBU */ if (RDREG) RDVAL = (INT32)(RSVAL - RTVAL); break;
- case 0x24: /* AND */ if (RDREG) RDVAL = RSVAL & RTVAL; break;
- case 0x25: /* OR */ if (RDREG) RDVAL = RSVAL | RTVAL; break;
- case 0x26: /* XOR */ if (RDREG) RDVAL = RSVAL ^ RTVAL; break;
- case 0x27: /* NOR */ if (RDREG) RDVAL = ~(RSVAL | RTVAL); break;
- case 0x2a: /* SLT */ if (RDREG) RDVAL = (INT32)RSVAL < (INT32)RTVAL; break;
- case 0x2b: /* SLTU */ if (RDREG) RDVAL = (UINT32)RSVAL < (UINT32)RTVAL; break;
- default: unimplemented_opcode(rsp, op); break;
+ case 0x20: /* ADD */ if (RDREG) RDVAL = (INT32)(RSVAL + RTVAL); break;
+ case 0x21: /* ADDU */ if (RDREG) RDVAL = (INT32)(RSVAL + RTVAL); break;
+ case 0x22: /* SUB */ if (RDREG) RDVAL = (INT32)(RSVAL - RTVAL); break;
+ case 0x23: /* SUBU */ if (RDREG) RDVAL = (INT32)(RSVAL - RTVAL); break;
+ case 0x24: /* AND */ if (RDREG) RDVAL = RSVAL & RTVAL; break;
+ case 0x25: /* OR */ if (RDREG) RDVAL = RSVAL | RTVAL; break;
+ case 0x26: /* XOR */ if (RDREG) RDVAL = RSVAL ^ RTVAL; break;
+ case 0x27: /* NOR */ if (RDREG) RDVAL = ~(RSVAL | RTVAL); break;
+ case 0x2a: /* SLT */ if (RDREG) RDVAL = (INT32)RSVAL < (INT32)RTVAL; break;
+ case 0x2b: /* SLTU */ if (RDREG) RDVAL = (UINT32)RSVAL < (UINT32)RTVAL; break;
+ default: unimplemented_opcode(rsp, op); break;
}
break;
}
- case 0x01: /* REGIMM */
+ case 0x01: /* REGIMM */
{
switch (RTREG)
{
- case 0x00: /* BLTZ */ if ((INT32)(RSVAL) < 0) JUMP_REL(SIMM16); break;
- case 0x01: /* BGEZ */ if ((INT32)(RSVAL) >= 0) JUMP_REL(SIMM16); break;
- case 0x10: /* BLTZAL */ if ((INT32)(RSVAL) < 0) JUMP_REL_L(SIMM16, 31); break;
- case 0x11: /* BGEZAL */ if ((INT32)(RSVAL) >= 0) JUMP_REL_L(SIMM16, 31); break;
- default: unimplemented_opcode(rsp, op); break;
+ case 0x00: /* BLTZ */ if ((INT32)(RSVAL) < 0) JUMP_REL(SIMM16); break;
+ case 0x01: /* BGEZ */ if ((INT32)(RSVAL) >= 0) JUMP_REL(SIMM16); break;
+ case 0x10: /* BLTZAL */ if ((INT32)(RSVAL) < 0) JUMP_REL_L(SIMM16, 31); break;
+ case 0x11: /* BGEZAL */ if ((INT32)(RSVAL) >= 0) JUMP_REL_L(SIMM16, 31); break;
+ default: unimplemented_opcode(rsp, op); break;
}
break;
}
- case 0x02: /* J */ JUMP_ABS(UIMM26); break;
- case 0x03: /* JAL */ JUMP_ABS_L(UIMM26, 31); break;
- case 0x04: /* BEQ */ if (RSVAL == RTVAL) JUMP_REL(SIMM16); break;
- case 0x05: /* BNE */ if (RSVAL != RTVAL) JUMP_REL(SIMM16); break;
- case 0x06: /* BLEZ */ if ((INT32)RSVAL <= 0) JUMP_REL(SIMM16); break;
- case 0x07: /* BGTZ */ if ((INT32)RSVAL > 0) JUMP_REL(SIMM16); break;
- case 0x08: /* ADDI */ if (RTREG) RTVAL = (INT32)(RSVAL + SIMM16); break;
- case 0x09: /* ADDIU */ if (RTREG) RTVAL = (INT32)(RSVAL + SIMM16); break;
- case 0x0a: /* SLTI */ if (RTREG) RTVAL = (INT32)(RSVAL) < ((INT32)SIMM16); break;
- case 0x0b: /* SLTIU */ if (RTREG) RTVAL = (UINT32)(RSVAL) < (UINT32)((INT32)SIMM16); break;
- case 0x0c: /* ANDI */ if (RTREG) RTVAL = RSVAL & UIMM16; break;
- case 0x0d: /* ORI */ if (RTREG) RTVAL = RSVAL | UIMM16; break;
- case 0x0e: /* XORI */ if (RTREG) RTVAL = RSVAL ^ UIMM16; break;
- case 0x0f: /* LUI */ if (RTREG) RTVAL = UIMM16 << 16; break;
+ case 0x02: /* J */ JUMP_ABS(UIMM26); break;
+ case 0x03: /* JAL */ JUMP_ABS_L(UIMM26, 31); break;
+ case 0x04: /* BEQ */ if (RSVAL == RTVAL) JUMP_REL(SIMM16); break;
+ case 0x05: /* BNE */ if (RSVAL != RTVAL) JUMP_REL(SIMM16); break;
+ case 0x06: /* BLEZ */ if ((INT32)RSVAL <= 0) JUMP_REL(SIMM16); break;
+ case 0x07: /* BGTZ */ if ((INT32)RSVAL > 0) JUMP_REL(SIMM16); break;
+ case 0x08: /* ADDI */ if (RTREG) RTVAL = (INT32)(RSVAL + SIMM16); break;
+ case 0x09: /* ADDIU */ if (RTREG) RTVAL = (INT32)(RSVAL + SIMM16); break;
+ case 0x0a: /* SLTI */ if (RTREG) RTVAL = (INT32)(RSVAL) < ((INT32)SIMM16); break;
+ case 0x0b: /* SLTIU */ if (RTREG) RTVAL = (UINT32)(RSVAL) < (UINT32)((INT32)SIMM16); break;
+ case 0x0c: /* ANDI */ if (RTREG) RTVAL = RSVAL & UIMM16; break;
+ case 0x0d: /* ORI */ if (RTREG) RTVAL = RSVAL | UIMM16; break;
+ case 0x0e: /* XORI */ if (RTREG) RTVAL = RSVAL ^ UIMM16; break;
+ case 0x0f: /* LUI */ if (RTREG) RTVAL = UIMM16 << 16; break;
- case 0x10: /* COP0 */
+ case 0x10: /* COP0 */
{
switch ((op >> 21) & 0x1f)
{
- case 0x00: /* MFC0 */ if (RTREG) RTVAL = get_cop0_reg(rsp, RDREG); break;
- case 0x04: /* MTC0 */ set_cop0_reg(rsp, RDREG, RTVAL); break;
- default: unimplemented_opcode(rsp, op); break;
+ case 0x00: /* MFC0 */ if (RTREG) RTVAL = get_cop0_reg(rsp, RDREG); break;
+ case 0x04: /* MTC0 */ set_cop0_reg(rsp, RDREG, RTVAL); break;
+ default: unimplemented_opcode(rsp, op); break;
}
break;
}
- case 0x12: /* COP2 */
+ case 0x12: /* COP2 */
{
switch ((op >> 21) & 0x1f)
{
- case 0x00: /* MFC2 */
+ case 0x00: /* MFC2 */
{
// 31 25 20 15 10 6 0
// ---------------------------------------------------
@@ -2800,7 +2800,7 @@ static CPU_EXECUTE( rsp )
if (RTREG) RTVAL = (INT32)(INT16)((b1 << 8) | (b2));
break;
}
- case 0x02: /* CFC2 */
+ case 0x02: /* CFC2 */
{
// 31 25 20 15 10 0
// ------------------------------------------------
@@ -2823,7 +2823,7 @@ static CPU_EXECUTE( rsp )
}
break;
}
- case 0x04: /* MTC2 */
+ case 0x04: /* MTC2 */
{
// 31 25 20 15 10 6 0
// ---------------------------------------------------
@@ -2836,7 +2836,7 @@ static CPU_EXECUTE( rsp )
W_VREG_B(RDREG, (el+1) & 0xf, (RTVAL >> 0) & 0xff);
break;
}
- case 0x06: /* CTC2 */
+ case 0x06: /* CTC2 */
{
// 31 25 20 15 10 0
// ------------------------------------------------
@@ -2855,21 +2855,21 @@ static CPU_EXECUTE( rsp )
break;
}
- default: unimplemented_opcode(rsp, op); break;
+ default: unimplemented_opcode(rsp, op); break;
}
break;
}
- case 0x20: /* LB */ if (RTREG) RTVAL = (INT32)(INT8)READ8(rsp, RSVAL + SIMM16); break;
- case 0x21: /* LH */ if (RTREG) RTVAL = (INT32)(INT16)READ16(rsp, RSVAL + SIMM16); break;
- case 0x23: /* LW */ if (RTREG) RTVAL = READ32(rsp, RSVAL + SIMM16); break;
- case 0x24: /* LBU */ if (RTREG) RTVAL = (UINT8)READ8(rsp, RSVAL + SIMM16); break;
- case 0x25: /* LHU */ if (RTREG) RTVAL = (UINT16)READ16(rsp, RSVAL + SIMM16); break;
- case 0x28: /* SB */ WRITE8(rsp, RSVAL + SIMM16, RTVAL); break;
- case 0x29: /* SH */ WRITE16(rsp, RSVAL + SIMM16, RTVAL); break;
- case 0x2b: /* SW */ WRITE32(rsp, RSVAL + SIMM16, RTVAL); break;
- case 0x32: /* LWC2 */ handle_lwc2(rsp, op); break;
- case 0x3a: /* SWC2 */ handle_swc2(rsp, op); break;
+ case 0x20: /* LB */ if (RTREG) RTVAL = (INT32)(INT8)READ8(rsp, RSVAL + SIMM16); break;
+ case 0x21: /* LH */ if (RTREG) RTVAL = (INT32)(INT16)READ16(rsp, RSVAL + SIMM16); break;
+ case 0x23: /* LW */ if (RTREG) RTVAL = READ32(rsp, RSVAL + SIMM16); break;
+ case 0x24: /* LBU */ if (RTREG) RTVAL = (UINT8)READ8(rsp, RSVAL + SIMM16); break;
+ case 0x25: /* LHU */ if (RTREG) RTVAL = (UINT16)READ16(rsp, RSVAL + SIMM16); break;
+ case 0x28: /* SB */ WRITE8(rsp, RSVAL + SIMM16, RTVAL); break;
+ case 0x29: /* SH */ WRITE16(rsp, RSVAL + SIMM16, RTVAL); break;
+ case 0x2b: /* SW */ WRITE32(rsp, RSVAL + SIMM16, RTVAL); break;
+ case 0x32: /* LWC2 */ handle_lwc2(rsp, op); break;
+ case 0x3a: /* SWC2 */ handle_swc2(rsp, op); break;
default:
{
@@ -3005,124 +3005,124 @@ CPU_GET_INFO( rsp )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(rsp_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = rsp->ppc; break;
-
- case CPUINFO_INT_PC: /* intentional fallthrough */
- case CPUINFO_INT_REGISTER + RSP_PC: info->i = rsp->pc; break;
-
- case CPUINFO_INT_REGISTER + RSP_R0: info->i = rsp->r[0]; break;
- case CPUINFO_INT_REGISTER + RSP_R1: info->i = rsp->r[1]; break;
- case CPUINFO_INT_REGISTER + RSP_R2: info->i = rsp->r[2]; break;
- case CPUINFO_INT_REGISTER + RSP_R3: info->i = rsp->r[3]; break;
- case CPUINFO_INT_REGISTER + RSP_R4: info->i = rsp->r[4]; break;
- case CPUINFO_INT_REGISTER + RSP_R5: info->i = rsp->r[5]; break;
- case CPUINFO_INT_REGISTER + RSP_R6: info->i = rsp->r[6]; break;
- case CPUINFO_INT_REGISTER + RSP_R7: info->i = rsp->r[7]; break;
- case CPUINFO_INT_REGISTER + RSP_R8: info->i = rsp->r[8]; break;
- case CPUINFO_INT_REGISTER + RSP_R9: info->i = rsp->r[9]; break;
- case CPUINFO_INT_REGISTER + RSP_R10: info->i = rsp->r[10]; break;
- case CPUINFO_INT_REGISTER + RSP_R11: info->i = rsp->r[11]; break;
- case CPUINFO_INT_REGISTER + RSP_R12: info->i = rsp->r[12]; break;
- case CPUINFO_INT_REGISTER + RSP_R13: info->i = rsp->r[13]; break;
- case CPUINFO_INT_REGISTER + RSP_R14: info->i = rsp->r[14]; break;
- case CPUINFO_INT_REGISTER + RSP_R15: info->i = rsp->r[15]; break;
- case CPUINFO_INT_REGISTER + RSP_R16: info->i = rsp->r[16]; break;
- case CPUINFO_INT_REGISTER + RSP_R17: info->i = rsp->r[17]; break;
- case CPUINFO_INT_REGISTER + RSP_R18: info->i = rsp->r[18]; break;
- case CPUINFO_INT_REGISTER + RSP_R19: info->i = rsp->r[19]; break;
- case CPUINFO_INT_REGISTER + RSP_R20: info->i = rsp->r[20]; break;
- case CPUINFO_INT_REGISTER + RSP_R21: info->i = rsp->r[21]; break;
- case CPUINFO_INT_REGISTER + RSP_R22: info->i = rsp->r[22]; break;
- case CPUINFO_INT_REGISTER + RSP_R23: info->i = rsp->r[23]; break;
- case CPUINFO_INT_REGISTER + RSP_R24: info->i = rsp->r[24]; break;
- case CPUINFO_INT_REGISTER + RSP_R25: info->i = rsp->r[25]; break;
- case CPUINFO_INT_REGISTER + RSP_R26: info->i = rsp->r[26]; break;
- case CPUINFO_INT_REGISTER + RSP_R27: info->i = rsp->r[27]; break;
- case CPUINFO_INT_REGISTER + RSP_R28: info->i = rsp->r[28]; break;
- case CPUINFO_INT_REGISTER + RSP_R29: info->i = rsp->r[29]; break;
- case CPUINFO_INT_REGISTER + RSP_R30: info->i = rsp->r[30]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(rsp_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = rsp->ppc; break;
+
+ case CPUINFO_INT_PC: /* intentional fallthrough */
+ case CPUINFO_INT_REGISTER + RSP_PC: info->i = rsp->pc; break;
+
+ case CPUINFO_INT_REGISTER + RSP_R0: info->i = rsp->r[0]; break;
+ case CPUINFO_INT_REGISTER + RSP_R1: info->i = rsp->r[1]; break;
+ case CPUINFO_INT_REGISTER + RSP_R2: info->i = rsp->r[2]; break;
+ case CPUINFO_INT_REGISTER + RSP_R3: info->i = rsp->r[3]; break;
+ case CPUINFO_INT_REGISTER + RSP_R4: info->i = rsp->r[4]; break;
+ case CPUINFO_INT_REGISTER + RSP_R5: info->i = rsp->r[5]; break;
+ case CPUINFO_INT_REGISTER + RSP_R6: info->i = rsp->r[6]; break;
+ case CPUINFO_INT_REGISTER + RSP_R7: info->i = rsp->r[7]; break;
+ case CPUINFO_INT_REGISTER + RSP_R8: info->i = rsp->r[8]; break;
+ case CPUINFO_INT_REGISTER + RSP_R9: info->i = rsp->r[9]; break;
+ case CPUINFO_INT_REGISTER + RSP_R10: info->i = rsp->r[10]; break;
+ case CPUINFO_INT_REGISTER + RSP_R11: info->i = rsp->r[11]; break;
+ case CPUINFO_INT_REGISTER + RSP_R12: info->i = rsp->r[12]; break;
+ case CPUINFO_INT_REGISTER + RSP_R13: info->i = rsp->r[13]; break;
+ case CPUINFO_INT_REGISTER + RSP_R14: info->i = rsp->r[14]; break;
+ case CPUINFO_INT_REGISTER + RSP_R15: info->i = rsp->r[15]; break;
+ case CPUINFO_INT_REGISTER + RSP_R16: info->i = rsp->r[16]; break;
+ case CPUINFO_INT_REGISTER + RSP_R17: info->i = rsp->r[17]; break;
+ case CPUINFO_INT_REGISTER + RSP_R18: info->i = rsp->r[18]; break;
+ case CPUINFO_INT_REGISTER + RSP_R19: info->i = rsp->r[19]; break;
+ case CPUINFO_INT_REGISTER + RSP_R20: info->i = rsp->r[20]; break;
+ case CPUINFO_INT_REGISTER + RSP_R21: info->i = rsp->r[21]; break;
+ case CPUINFO_INT_REGISTER + RSP_R22: info->i = rsp->r[22]; break;
+ case CPUINFO_INT_REGISTER + RSP_R23: info->i = rsp->r[23]; break;
+ case CPUINFO_INT_REGISTER + RSP_R24: info->i = rsp->r[24]; break;
+ case CPUINFO_INT_REGISTER + RSP_R25: info->i = rsp->r[25]; break;
+ case CPUINFO_INT_REGISTER + RSP_R26: info->i = rsp->r[26]; break;
+ case CPUINFO_INT_REGISTER + RSP_R27: info->i = rsp->r[27]; break;
+ case CPUINFO_INT_REGISTER + RSP_R28: info->i = rsp->r[28]; break;
+ case CPUINFO_INT_REGISTER + RSP_R29: info->i = rsp->r[29]; break;
+ case CPUINFO_INT_REGISTER + RSP_R30: info->i = rsp->r[30]; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + RSP_R31: info->i = rsp->r[31]; break;
+ case CPUINFO_INT_REGISTER + RSP_R31: info->i = rsp->r[31]; break;
case CPUINFO_INT_REGISTER + RSP_SR: info->i = rsp->sr; break;
case CPUINFO_INT_REGISTER + RSP_NEXTPC: info->i = rsp->nextpc; break;
case CPUINFO_INT_REGISTER + RSP_STEPCNT: info->i = rsp->step_count; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(rsp); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rsp); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(rsp); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(rsp); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(rsp); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(rsp); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rsp); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(rsp); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(rsp); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(rsp); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "RSP"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "RSP"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + RSP_PC: sprintf(info->s, "PC: %08X", rsp->pc); break;
-
- case CPUINFO_STR_REGISTER + RSP_R0: sprintf(info->s, "R0: %08X", rsp->r[0]); break;
- case CPUINFO_STR_REGISTER + RSP_R1: sprintf(info->s, "R1: %08X", rsp->r[1]); break;
- case CPUINFO_STR_REGISTER + RSP_R2: sprintf(info->s, "R2: %08X", rsp->r[2]); break;
- case CPUINFO_STR_REGISTER + RSP_R3: sprintf(info->s, "R3: %08X", rsp->r[3]); break;
- case CPUINFO_STR_REGISTER + RSP_R4: sprintf(info->s, "R4: %08X", rsp->r[4]); break;
- case CPUINFO_STR_REGISTER + RSP_R5: sprintf(info->s, "R5: %08X", rsp->r[5]); break;
- case CPUINFO_STR_REGISTER + RSP_R6: sprintf(info->s, "R6: %08X", rsp->r[6]); break;
- case CPUINFO_STR_REGISTER + RSP_R7: sprintf(info->s, "R7: %08X", rsp->r[7]); break;
- case CPUINFO_STR_REGISTER + RSP_R8: sprintf(info->s, "R8: %08X", rsp->r[8]); break;
- case CPUINFO_STR_REGISTER + RSP_R9: sprintf(info->s, "R9: %08X", rsp->r[9]); break;
- case CPUINFO_STR_REGISTER + RSP_R10: sprintf(info->s, "R10: %08X", rsp->r[10]); break;
- case CPUINFO_STR_REGISTER + RSP_R11: sprintf(info->s, "R11: %08X", rsp->r[11]); break;
- case CPUINFO_STR_REGISTER + RSP_R12: sprintf(info->s, "R12: %08X", rsp->r[12]); break;
- case CPUINFO_STR_REGISTER + RSP_R13: sprintf(info->s, "R13: %08X", rsp->r[13]); break;
- case CPUINFO_STR_REGISTER + RSP_R14: sprintf(info->s, "R14: %08X", rsp->r[14]); break;
- case CPUINFO_STR_REGISTER + RSP_R15: sprintf(info->s, "R15: %08X", rsp->r[15]); break;
- case CPUINFO_STR_REGISTER + RSP_R16: sprintf(info->s, "R16: %08X", rsp->r[16]); break;
- case CPUINFO_STR_REGISTER + RSP_R17: sprintf(info->s, "R17: %08X", rsp->r[17]); break;
- case CPUINFO_STR_REGISTER + RSP_R18: sprintf(info->s, "R18: %08X", rsp->r[18]); break;
- case CPUINFO_STR_REGISTER + RSP_R19: sprintf(info->s, "R19: %08X", rsp->r[19]); break;
- case CPUINFO_STR_REGISTER + RSP_R20: sprintf(info->s, "R20: %08X", rsp->r[20]); break;
- case CPUINFO_STR_REGISTER + RSP_R21: sprintf(info->s, "R21: %08X", rsp->r[21]); break;
- case CPUINFO_STR_REGISTER + RSP_R22: sprintf(info->s, "R22: %08X", rsp->r[22]); break;
- case CPUINFO_STR_REGISTER + RSP_R23: sprintf(info->s, "R23: %08X", rsp->r[23]); break;
- case CPUINFO_STR_REGISTER + RSP_R24: sprintf(info->s, "R24: %08X", rsp->r[24]); break;
- case CPUINFO_STR_REGISTER + RSP_R25: sprintf(info->s, "R25: %08X", rsp->r[25]); break;
- case CPUINFO_STR_REGISTER + RSP_R26: sprintf(info->s, "R26: %08X", rsp->r[26]); break;
- case CPUINFO_STR_REGISTER + RSP_R27: sprintf(info->s, "R27: %08X", rsp->r[27]); break;
- case CPUINFO_STR_REGISTER + RSP_R28: sprintf(info->s, "R28: %08X", rsp->r[28]); break;
- case CPUINFO_STR_REGISTER + RSP_R29: sprintf(info->s, "R29: %08X", rsp->r[29]); break;
- case CPUINFO_STR_REGISTER + RSP_R30: sprintf(info->s, "R30: %08X", rsp->r[30]); break;
- case CPUINFO_STR_REGISTER + RSP_R31: sprintf(info->s, "R31: %08X", rsp->r[31]); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "RSP"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "RSP"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + RSP_PC: sprintf(info->s, "PC: %08X", rsp->pc); break;
+
+ case CPUINFO_STR_REGISTER + RSP_R0: sprintf(info->s, "R0: %08X", rsp->r[0]); break;
+ case CPUINFO_STR_REGISTER + RSP_R1: sprintf(info->s, "R1: %08X", rsp->r[1]); break;
+ case CPUINFO_STR_REGISTER + RSP_R2: sprintf(info->s, "R2: %08X", rsp->r[2]); break;
+ case CPUINFO_STR_REGISTER + RSP_R3: sprintf(info->s, "R3: %08X", rsp->r[3]); break;
+ case CPUINFO_STR_REGISTER + RSP_R4: sprintf(info->s, "R4: %08X", rsp->r[4]); break;
+ case CPUINFO_STR_REGISTER + RSP_R5: sprintf(info->s, "R5: %08X", rsp->r[5]); break;
+ case CPUINFO_STR_REGISTER + RSP_R6: sprintf(info->s, "R6: %08X", rsp->r[6]); break;
+ case CPUINFO_STR_REGISTER + RSP_R7: sprintf(info->s, "R7: %08X", rsp->r[7]); break;
+ case CPUINFO_STR_REGISTER + RSP_R8: sprintf(info->s, "R8: %08X", rsp->r[8]); break;
+ case CPUINFO_STR_REGISTER + RSP_R9: sprintf(info->s, "R9: %08X", rsp->r[9]); break;
+ case CPUINFO_STR_REGISTER + RSP_R10: sprintf(info->s, "R10: %08X", rsp->r[10]); break;
+ case CPUINFO_STR_REGISTER + RSP_R11: sprintf(info->s, "R11: %08X", rsp->r[11]); break;
+ case CPUINFO_STR_REGISTER + RSP_R12: sprintf(info->s, "R12: %08X", rsp->r[12]); break;
+ case CPUINFO_STR_REGISTER + RSP_R13: sprintf(info->s, "R13: %08X", rsp->r[13]); break;
+ case CPUINFO_STR_REGISTER + RSP_R14: sprintf(info->s, "R14: %08X", rsp->r[14]); break;
+ case CPUINFO_STR_REGISTER + RSP_R15: sprintf(info->s, "R15: %08X", rsp->r[15]); break;
+ case CPUINFO_STR_REGISTER + RSP_R16: sprintf(info->s, "R16: %08X", rsp->r[16]); break;
+ case CPUINFO_STR_REGISTER + RSP_R17: sprintf(info->s, "R17: %08X", rsp->r[17]); break;
+ case CPUINFO_STR_REGISTER + RSP_R18: sprintf(info->s, "R18: %08X", rsp->r[18]); break;
+ case CPUINFO_STR_REGISTER + RSP_R19: sprintf(info->s, "R19: %08X", rsp->r[19]); break;
+ case CPUINFO_STR_REGISTER + RSP_R20: sprintf(info->s, "R20: %08X", rsp->r[20]); break;
+ case CPUINFO_STR_REGISTER + RSP_R21: sprintf(info->s, "R21: %08X", rsp->r[21]); break;
+ case CPUINFO_STR_REGISTER + RSP_R22: sprintf(info->s, "R22: %08X", rsp->r[22]); break;
+ case CPUINFO_STR_REGISTER + RSP_R23: sprintf(info->s, "R23: %08X", rsp->r[23]); break;
+ case CPUINFO_STR_REGISTER + RSP_R24: sprintf(info->s, "R24: %08X", rsp->r[24]); break;
+ case CPUINFO_STR_REGISTER + RSP_R25: sprintf(info->s, "R25: %08X", rsp->r[25]); break;
+ case CPUINFO_STR_REGISTER + RSP_R26: sprintf(info->s, "R26: %08X", rsp->r[26]); break;
+ case CPUINFO_STR_REGISTER + RSP_R27: sprintf(info->s, "R27: %08X", rsp->r[27]); break;
+ case CPUINFO_STR_REGISTER + RSP_R28: sprintf(info->s, "R28: %08X", rsp->r[28]); break;
+ case CPUINFO_STR_REGISTER + RSP_R29: sprintf(info->s, "R29: %08X", rsp->r[29]); break;
+ case CPUINFO_STR_REGISTER + RSP_R30: sprintf(info->s, "R30: %08X", rsp->r[30]); break;
+ case CPUINFO_STR_REGISTER + RSP_R31: sprintf(info->s, "R31: %08X", rsp->r[31]); break;
case CPUINFO_STR_REGISTER + RSP_SR: sprintf(info->s, "SR: %08X", rsp->sr); break;
case CPUINFO_STR_REGISTER + RSP_NEXTPC: sprintf(info->s, "NPC: %08X", rsp->nextpc);break;
case CPUINFO_STR_REGISTER + RSP_STEPCNT: sprintf(info->s, "STEP: %d", rsp->step_count); break;
diff --git a/src/emu/cpu/rsp/rsp.h b/src/emu/cpu/rsp/rsp.h
index f1b637c3a07..21d5b386fb6 100644
--- a/src/emu/cpu/rsp/rsp.h
+++ b/src/emu/cpu/rsp/rsp.h
@@ -24,42 +24,42 @@
enum
{
- RSP_PC = 1,
- RSP_R0,
- RSP_R1,
- RSP_R2,
- RSP_R3,
- RSP_R4,
- RSP_R5,
- RSP_R6,
- RSP_R7,
- RSP_R8,
- RSP_R9,
- RSP_R10,
- RSP_R11,
- RSP_R12,
- RSP_R13,
- RSP_R14,
- RSP_R15,
- RSP_R16,
- RSP_R17,
- RSP_R18,
- RSP_R19,
- RSP_R20,
- RSP_R21,
- RSP_R22,
- RSP_R23,
- RSP_R24,
- RSP_R25,
- RSP_R26,
- RSP_R27,
- RSP_R28,
- RSP_R29,
- RSP_R30,
- RSP_R31,
- RSP_SR,
- RSP_NEXTPC,
- RSP_STEPCNT,
+ RSP_PC = 1,
+ RSP_R0,
+ RSP_R1,
+ RSP_R2,
+ RSP_R3,
+ RSP_R4,
+ RSP_R5,
+ RSP_R6,
+ RSP_R7,
+ RSP_R8,
+ RSP_R9,
+ RSP_R10,
+ RSP_R11,
+ RSP_R12,
+ RSP_R13,
+ RSP_R14,
+ RSP_R15,
+ RSP_R16,
+ RSP_R17,
+ RSP_R18,
+ RSP_R19,
+ RSP_R20,
+ RSP_R21,
+ RSP_R22,
+ RSP_R23,
+ RSP_R24,
+ RSP_R25,
+ RSP_R26,
+ RSP_R27,
+ RSP_R28,
+ RSP_R29,
+ RSP_R30,
+ RSP_R31,
+ RSP_SR,
+ RSP_NEXTPC,
+ RSP_STEPCNT,
};
@@ -92,31 +92,31 @@ void rspdrc_add_imem(device_t *device, UINT32 *base);
HELPER MACROS
***************************************************************************/
-#define REG_LO 32
-#define REG_HI 33
+#define REG_LO 32
+#define REG_HI 33
-#define RSREG ((op >> 21) & 31)
-#define RTREG ((op >> 16) & 31)
-#define RDREG ((op >> 11) & 31)
-#define SHIFT ((op >> 6) & 31)
+#define RSREG ((op >> 21) & 31)
+#define RTREG ((op >> 16) & 31)
+#define RDREG ((op >> 11) & 31)
+#define SHIFT ((op >> 6) & 31)
-#define RSVAL (rsp->r[RSREG])
-#define RTVAL (rsp->r[RTREG])
-#define RDVAL (rsp->r[RDREG])
+#define RSVAL (rsp->r[RSREG])
+#define RTVAL (rsp->r[RTREG])
+#define RDVAL (rsp->r[RDREG])
-#define FRREG ((op >> 21) & 31)
-#define FTREG ((op >> 16) & 31)
-#define FSREG ((op >> 11) & 31)
-#define FDREG ((op >> 6) & 31)
+#define FRREG ((op >> 21) & 31)
+#define FTREG ((op >> 16) & 31)
+#define FSREG ((op >> 11) & 31)
+#define FDREG ((op >> 6) & 31)
-#define IS_SINGLE(o) (((o) & (1 << 21)) == 0)
-#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0)
-#define IS_FLOAT(o) (((o) & (1 << 23)) == 0)
-#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0)
+#define IS_SINGLE(o) (((o) & (1 << 21)) == 0)
+#define IS_DOUBLE(o) (((o) & (1 << 21)) != 0)
+#define IS_FLOAT(o) (((o) & (1 << 23)) == 0)
+#define IS_INTEGRAL(o) (((o) & (1 << 23)) != 0)
-#define SIMMVAL ((INT16)op)
-#define UIMMVAL ((UINT16)op)
-#define LIMMVAL (op & 0x03ffffff)
+#define SIMMVAL ((INT16)op)
+#define UIMMVAL ((UINT16)op)
+#define LIMMVAL (op & 0x03ffffff)
#define RSP_STATUS_HALT 0x0001
#define RSP_STATUS_BROKE 0x0002
@@ -134,7 +134,7 @@ void rspdrc_add_imem(device_t *device, UINT32 *base);
#define RSP_STATUS_SIGNAL6 0x2000
#define RSP_STATUS_SIGNAL7 0x4000
-#define RSPDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
+#define RSPDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
union VECTOR_REG
{
diff --git a/src/emu/cpu/rsp/rsp_dasm.c b/src/emu/cpu/rsp/rsp_dasm.c
index d6751619a1e..8d384e86a74 100644
--- a/src/emu/cpu/rsp/rsp_dasm.c
+++ b/src/emu/cpu/rsp/rsp_dasm.c
@@ -8,10 +8,10 @@
static const char *const reg[32] =
{
- "0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
- "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
- "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
- "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
+ "0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
};
static const char *const vreg[32] =
@@ -81,10 +81,10 @@ static void disasm_cop0(UINT32 op)
switch ((op >> 21) & 0x1f)
{
- case 0x00: print("mfc0 %s, %s", reg[rt], cop0_regs[rd]); break;
- case 0x04: print("mtc0 %s, %s", reg[rt], cop0_regs[rd]); break;
+ case 0x00: print("mfc0 %s, %s", reg[rt], cop0_regs[rd]); break;
+ case 0x04: print("mtc0 %s, %s", reg[rt], cop0_regs[rd]); break;
- default: print("??? (COP0)"); break;
+ default: print("??? (COP0)"); break;
}
}
@@ -99,79 +99,79 @@ static void disasm_cop2(UINT32 op)
switch ((op >> 21) & 0x1f)
{
- case 0x00: print("mfc2 %s, %s[%d]", reg[rt], vreg[rd], dest); break;
- case 0x02: print("cfc2 %s, FLAG%d", reg[rt], rd); break;
- case 0x04: print("mtc2 %s, %s[%d]", reg[rt], vreg[rd], dest); break;
- case 0x06: print("ctc2 %s, FLAG%d", reg[rt], rd); break;
+ case 0x00: print("mfc2 %s, %s[%d]", reg[rt], vreg[rd], dest); break;
+ case 0x02: print("cfc2 %s, FLAG%d", reg[rt], rd); break;
+ case 0x04: print("mtc2 %s, %s[%d]", reg[rt], vreg[rd], dest); break;
+ case 0x06: print("ctc2 %s, FLAG%d", reg[rt], rd); break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
{
switch (op & 0x3f)
{
- case 0x00: print("vmulf %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x01: print("vmulu %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x02: print("vrndp %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x03: print("vmulq %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x04: print("vmudl %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x05: print("vmudm %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x06: print("vmudn %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x07: print("vmudh %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x08: print("vmacf %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x09: print("vmacu %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x0a: print("vrndn %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x0b: print("vmacq %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x0c: print("vmadl %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x0d: print("vmadm %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x0e: print("vmadn %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x0f: print("vmadh %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x10: print("vadd %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x11: print("vsub %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x12: print("vsut???"); break;
- case 0x13: print("vabs %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x14: print("vaddc %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x15: print("vsubc %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x00: print("vmulf %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x01: print("vmulu %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x02: print("vrndp %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x03: print("vmulq %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x04: print("vmudl %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x05: print("vmudm %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x06: print("vmudn %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x07: print("vmudh %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x08: print("vmacf %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x09: print("vmacu %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x0a: print("vrndn %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x0b: print("vmacq %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x0c: print("vmadl %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x0d: print("vmadm %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x0e: print("vmadn %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x0f: print("vmadh %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x10: print("vadd %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x11: print("vsub %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x12: print("vsut???"); break;
+ case 0x13: print("vabs %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x14: print("vaddc %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x15: print("vsubc %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
case 0x1d:
{
switch (el)
{
- case 8: print("vsaw %s, ACCUM_H", vreg[dest]); break;
- case 9: print("vsaw %s, ACCUM_M", vreg[dest]); break;
- case 10: print("vsaw %s, ACCUM_L", vreg[dest]); break;
- default: print("vsaw %s, ???", vreg[dest]); break;
+ case 8: print("vsaw %s, ACCUM_H", vreg[dest]); break;
+ case 9: print("vsaw %s, ACCUM_M", vreg[dest]); break;
+ case 10: print("vsaw %s, ACCUM_L", vreg[dest]); break;
+ default: print("vsaw %s, ???", vreg[dest]); break;
}
break;
}
- case 0x20: print("vlt %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x21: print("veq %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x22: print("vne %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x23: print("vge %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x24: print("vcl %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x25: print("vch %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x26: print("vcr %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x27: print("vmrg %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x28: print("vand %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x29: print("vnand %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x2a: print("vor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x2b: print("vnor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x2c: print("vxor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x2d: print("vnxor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
- case 0x30: print("vrcp %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
- case 0x31: print("vrcpl %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
- case 0x32: print("vrcph %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
- case 0x33: print("vmov %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
- case 0x34: print("vrsq %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
- case 0x35: print("vrsql %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
- case 0x36: print("vrsqh %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
- case 0x37: print("vnop"); break;
- default: print("??? (VECTOR OP)"); break;
+ case 0x20: print("vlt %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x21: print("veq %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x22: print("vne %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x23: print("vge %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x24: print("vcl %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x25: print("vch %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x26: print("vcr %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x27: print("vmrg %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x28: print("vand %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x29: print("vnand %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x2a: print("vor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x2b: print("vnor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x2c: print("vxor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x2d: print("vnxor %s, %s, %s%s", vreg[dest], vreg[s1], vreg[s2], element[el]); break;
+ case 0x30: print("vrcp %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
+ case 0x31: print("vrcpl %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
+ case 0x32: print("vrcph %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
+ case 0x33: print("vmov %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
+ case 0x34: print("vrsq %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
+ case 0x35: print("vrsql %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
+ case 0x36: print("vrsqh %s[%d], %s[%c]", vreg[dest], s1 & 7, vreg[s2], element2[el][7-(s1 & 7)]); break;
+ case 0x37: print("vnop"); break;
+ default: print("??? (VECTOR OP)"); break;
}
break;
}
- default: print("??? (COP2)"); break;
+ default: print("??? (COP2)"); break;
}
}
@@ -186,19 +186,19 @@ static void disasm_lwc2(UINT32 op)
switch ((op >> 11) & 0x1f)
{
- case 0x00: print("lbv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 1), reg[base]); break;
- case 0x01: print("lsv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 2), reg[base]); break;
- case 0x02: print("llv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 4), reg[base]); break;
- case 0x03: print("ldv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
- case 0x04: print("lqv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x05: print("lrv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x06: print("lpv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
- case 0x07: print("luv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
- case 0x08: print("lhv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x09: print("lfv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x0a: print("lwv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x0b: print("ltv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- default: print("??? (LWC2)"); break;
+ case 0x00: print("lbv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 1), reg[base]); break;
+ case 0x01: print("lsv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 2), reg[base]); break;
+ case 0x02: print("llv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 4), reg[base]); break;
+ case 0x03: print("ldv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
+ case 0x04: print("lqv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x05: print("lrv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x06: print("lpv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
+ case 0x07: print("luv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
+ case 0x08: print("lhv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x09: print("lfv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x0a: print("lwv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x0b: print("ltv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ default: print("??? (LWC2)"); break;
}
}
@@ -213,19 +213,19 @@ static void disasm_swc2(UINT32 op)
switch ((op >> 11) & 0x1f)
{
- case 0x00: print("sbv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 1), reg[base]); break;
- case 0x01: print("ssv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 2), reg[base]); break;
- case 0x02: print("slv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 4), reg[base]); break;
- case 0x03: print("sdv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
- case 0x04: print("sqv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x05: print("srv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x06: print("spv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
- case 0x07: print("suv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
- case 0x08: print("shv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x09: print("sfv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x0a: print("swv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- case 0x0b: print("stv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
- default: print("??? (SWC2)"); break;
+ case 0x00: print("sbv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 1), reg[base]); break;
+ case 0x01: print("ssv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 2), reg[base]); break;
+ case 0x02: print("slv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 4), reg[base]); break;
+ case 0x03: print("sdv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
+ case 0x04: print("sqv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x05: print("srv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x06: print("spv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
+ case 0x07: print("suv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 8), reg[base]); break;
+ case 0x08: print("shv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x09: print("sfv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x0a: print("swv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ case 0x0b: print("stv %s[%d], %s(%s)", vreg[dest], del, signed_imm16(offset * 16), reg[base]); break;
+ default: print("??? (SWC2)"); break;
}
}
@@ -241,7 +241,7 @@ offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op)
switch (op >> 26)
{
- case 0x00: // SPECIAL
+ case 0x00: // SPECIAL
{
switch (op & 0x3f)
{
@@ -257,12 +257,12 @@ offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op)
}
break;
}
- case 0x02: print("srl %s, %s, %d", reg[rd], reg[rt], shift); break;
- case 0x03: print("sra %s, %s, %d", reg[rd], reg[rt], shift); break;
- case 0x04: print("sllv %s, %s, %s", reg[rd], reg[rt], reg[rs]); break;
- case 0x06: print("srlv %s, %s, %s", reg[rd], reg[rt], reg[rs]); break;
- case 0x07: print("srav %s, %s, %s", reg[rd], reg[rt], reg[rs]); break;
- case 0x08: print("jr %s", reg[rs]); if (rs == 31) flags = DASMFLAG_STEP_OUT; break;
+ case 0x02: print("srl %s, %s, %d", reg[rd], reg[rt], shift); break;
+ case 0x03: print("sra %s, %s, %d", reg[rd], reg[rt], shift); break;
+ case 0x04: print("sllv %s, %s, %s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x06: print("srlv %s, %s, %s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x07: print("srav %s, %s, %s", reg[rd], reg[rt], reg[rs]); break;
+ case 0x08: print("jr %s", reg[rs]); if (rs == 31) flags = DASMFLAG_STEP_OUT; break;
case 0x09:
{
if (rd == 31)
@@ -276,68 +276,68 @@ offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op)
flags = DASMFLAG_STEP_OVER | DASMFLAG_STEP_OVER_EXTRA(1);
break;
}
- case 0x0d: print("break"); flags = DASMFLAG_STEP_OVER; break;
- case 0x20: print("add %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x21: print("addu %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x22: print("sub %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x23: print("subu %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x24: print("and %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x25: print("or %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x26: print("xor %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x27: print("nor %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2a: print("slt %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
- case 0x2b: print("sltu %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
-
- default: print("???"); break;
+ case 0x0d: print("break"); flags = DASMFLAG_STEP_OVER; break;
+ case 0x20: print("add %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x21: print("addu %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x22: print("sub %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x23: print("subu %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x24: print("and %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x25: print("or %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x26: print("xor %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x27: print("nor %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2a: print("slt %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x2b: print("sltu %s, %s, %s", reg[rd], reg[rs], reg[rt]); break;
+
+ default: print("???"); break;
}
break;
}
- case 0x01: // REGIMM
+ case 0x01: // REGIMM
{
switch ((op >> 16) & 0x1f)
{
- case 0x00: print("bltz %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x01: print("bgez %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x10: print("bltzal %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- case 0x11: print("bgezal %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x00: print("bltz %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x01: print("bgez %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x10: print("bltzal %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
+ case 0x11: print("bgezal %s, $%08X", reg[rs], pc + 4 + ((INT16)op << 2)); break;
- default: print("???"); break;
+ default: print("???"); break;
}
break;
}
- case 0x02: print("j $%08X", (op & 0x03ffffff) << 2); break;
- case 0x03: print("jal $%08X", (op & 0x03ffffff) << 2); break;
- case 0x04: print("beq %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((INT16)(op) << 2)); break;
- case 0x05: print("bne %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((INT16)(op) << 2)); break;
- case 0x06: print("blez %s, $%08X", reg[rs], pc + 4 + ((INT16)(op) << 2)); break;
- case 0x07: print("bgtz %s, $%08X", reg[rs], pc + 4 + ((INT16)(op) << 2)); break;
- case 0x08: print("addi %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
- case 0x09: print("addiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
- case 0x0a: print("slti %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
- case 0x0b: print("sltiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
- case 0x0c: print("andi %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
- case 0x0d: print("ori %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
- case 0x0e: print("xori %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
- case 0x0f: print("lui %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
-
- case 0x10: disasm_cop0(op); break;
- case 0x12: disasm_cop2(op); break;
-
- case 0x20: print("lb %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
- case 0x21: print("lh %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
- case 0x23: print("lw %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
- case 0x24: print("lbu %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
- case 0x25: print("lhu %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
- case 0x28: print("sb %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
- case 0x29: print("sh %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
- case 0x2b: print("sw %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
-
- case 0x32: disasm_lwc2(op); break;
- case 0x3a: disasm_swc2(op); break;
-
- default: print("???"); break;
+ case 0x02: print("j $%08X", (op & 0x03ffffff) << 2); break;
+ case 0x03: print("jal $%08X", (op & 0x03ffffff) << 2); break;
+ case 0x04: print("beq %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((INT16)(op) << 2)); break;
+ case 0x05: print("bne %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((INT16)(op) << 2)); break;
+ case 0x06: print("blez %s, $%08X", reg[rs], pc + 4 + ((INT16)(op) << 2)); break;
+ case 0x07: print("bgtz %s, $%08X", reg[rs], pc + 4 + ((INT16)(op) << 2)); break;
+ case 0x08: print("addi %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
+ case 0x09: print("addiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
+ case 0x0a: print("slti %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
+ case 0x0b: print("sltiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
+ case 0x0c: print("andi %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
+ case 0x0d: print("ori %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
+ case 0x0e: print("xori %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
+ case 0x0f: print("lui %s, %s, $%04X", reg[rt], reg[rs], (UINT16)(op)); break;
+
+ case 0x10: disasm_cop0(op); break;
+ case 0x12: disasm_cop2(op); break;
+
+ case 0x20: print("lb %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+ case 0x21: print("lh %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+ case 0x23: print("lw %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+ case 0x24: print("lbu %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+ case 0x25: print("lhu %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+ case 0x28: print("sb %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+ case 0x29: print("sh %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+ case 0x2b: print("sw %s, %s(%s)", reg[rt], signed_imm16(op), reg[rs]); break;
+
+ case 0x32: disasm_lwc2(op); break;
+ case 0x3a: disasm_swc2(op); break;
+
+ default: print("???"); break;
}
return 4 | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/rsp/rspdrc.c b/src/emu/cpu/rsp/rspdrc.c
index 662dd3e82b8..f1e83aec193 100644
--- a/src/emu/cpu/rsp/rspdrc.c
+++ b/src/emu/cpu/rsp/rspdrc.c
@@ -39,11 +39,11 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
DEBUGGING
***************************************************************************/
-#define FORCE_C_BACKEND (0)
-#define LOG_UML (0)
-#define LOG_NATIVE (0)
+#define FORCE_C_BACKEND (0)
+#define LOG_UML (0)
+#define LOG_NATIVE (0)
-#define SINGLE_INSTRUCTION_MODE (0)
+#define SINGLE_INSTRUCTION_MODE (0)
/***************************************************************************
@@ -51,23 +51,23 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
***************************************************************************/
/* map variables */
-#define MAPVAR_PC M0
-#define MAPVAR_CYCLES M1
+#define MAPVAR_PC M0
+#define MAPVAR_CYCLES M1
/* size of the execution code cache */
-#define CACHE_SIZE (32 * 1024 * 1024)
+#define CACHE_SIZE (32 * 1024 * 1024)
/* compilation boundaries -- how far back/forward does the analysis extend? */
-#define COMPILE_BACKWARDS_BYTES 128
-#define COMPILE_FORWARDS_BYTES 512
-#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4))
-#define COMPILE_MAX_SEQUENCE 64
+#define COMPILE_BACKWARDS_BYTES 128
+#define COMPILE_FORWARDS_BYTES 512
+#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/4) + (COMPILE_FORWARDS_BYTES/4))
+#define COMPILE_MAX_SEQUENCE 64
/* exit codes */
-#define EXECUTE_OUT_OF_CYCLES 0
-#define EXECUTE_MISSING_CODE 1
-#define EXECUTE_UNMAPPED_CODE 2
-#define EXECUTE_RESET_CACHE 3
+#define EXECUTE_OUT_OF_CYCLES 0
+#define EXECUTE_MISSING_CODE 1
+#define EXECUTE_UNMAPPED_CODE 2
+#define EXECUTE_RESET_CACHE 3
@@ -75,7 +75,7 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
MACROS
***************************************************************************/
-#define R32(reg) rsp->impstate->regmap[reg]
+#define R32(reg) rsp->impstate->regmap[reg]
/***************************************************************************
STRUCTURES & TYPEDEFS
@@ -84,56 +84,56 @@ extern offs_t rsp_dasm_one(char *buffer, offs_t pc, UINT32 op);
/* fast RAM info */
struct fast_ram_info
{
- offs_t start; /* start of the RAM block */
- offs_t end; /* end of the RAM block */
- UINT8 readonly; /* TRUE if read-only */
- void * base; /* base in memory where the RAM lives */
+ offs_t start; /* start of the RAM block */
+ offs_t end; /* end of the RAM block */
+ UINT8 readonly; /* TRUE if read-only */
+ void * base; /* base in memory where the RAM lives */
};
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- UINT8 checksoftints; /* need to check software interrupts before next instruction */
- code_label labelnum; /* index for local labels */
+ UINT32 cycles; /* accumulated cycles */
+ UINT8 checkints; /* need to check interrupts before next instruction */
+ UINT8 checksoftints; /* need to check software interrupts before next instruction */
+ code_label labelnum; /* index for local labels */
};
struct rspimp_state
{
/* core state */
- drc_cache * cache; /* pointer to the DRC code cache */
- drcuml_state * drcuml; /* DRC UML generator state */
- rsp_frontend * drcfe; /* pointer to the DRC front-end state */
- UINT32 drcoptions; /* configurable DRC options */
+ drc_cache * cache; /* pointer to the DRC code cache */
+ drcuml_state * drcuml; /* DRC UML generator state */
+ rsp_frontend * drcfe; /* pointer to the DRC front-end state */
+ UINT32 drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
- UINT32 jmpdest; /* destination jump target */
+ UINT8 cache_dirty; /* true if we need to flush the cache */
+ UINT32 jmpdest; /* destination jump target */
/* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
- const char * format; /* format string for print_debug */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
- UINT32 arg2; /* print_debug argument 3 */
- UINT32 arg3; /* print_debug argument 4 */
- UINT32 vres[8]; /* used for temporary vector results */
+ UINT64 numcycles; /* return value from gettotalcycles */
+ const char * format; /* format string for print_debug */
+ UINT32 arg0; /* print_debug argument 1 */
+ UINT32 arg1; /* print_debug argument 2 */
+ UINT32 arg2; /* print_debug argument 3 */
+ UINT32 arg3; /* print_debug argument 4 */
+ UINT32 vres[8]; /* used for temporary vector results */
/* register mappings */
- parameter regmap[34]; /* parameter to register mappings for all 32 integer registers */
+ parameter regmap[34]; /* parameter to register mappings for all 32 integer registers */
/* subroutines */
- code_handle * entry; /* entry point */
- code_handle * nocode; /* nocode exception handler */
- code_handle * out_of_cycles; /* out of cycles exception handler */
- code_handle * read8; /* read byte */
- code_handle * write8; /* write byte */
- code_handle * read16; /* read half */
- code_handle * write16; /* write half */
- code_handle * read32; /* read word */
- code_handle * write32; /* write word */
+ code_handle * entry; /* entry point */
+ code_handle * nocode; /* nocode exception handler */
+ code_handle * out_of_cycles; /* out of cycles exception handler */
+ code_handle * read8; /* read byte */
+ code_handle * write8; /* write byte */
+ code_handle * read16; /* read half */
+ code_handle * write16; /* write half */
+ code_handle * read32; /* read word */
+ code_handle * write32; /* write word */
};
/***************************************************************************
@@ -203,36 +203,36 @@ static void log_add_disasm_comment(rsp_state *rsp, drcuml_block *block, UINT32 p
HELPFUL DEFINES
***************************************************************************/
-#define VDREG ((op >> 6) & 0x1f)
-#define VS1REG ((op >> 11) & 0x1f)
-#define VS2REG ((op >> 16) & 0x1f)
-#define EL ((op >> 21) & 0xf)
+#define VDREG ((op >> 6) & 0x1f)
+#define VS1REG ((op >> 11) & 0x1f)
+#define VS2REG ((op >> 16) & 0x1f)
+#define EL ((op >> 21) & 0xf)
-#define VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
-#define W_VREG_S(reg, offset) rsp->v[(reg)].s[(offset)]
-#define VREG_S(reg, offset) (INT16)rsp->v[(reg)].s[(offset)]
+#define VREG_B(reg, offset) rsp->v[(reg)].b[(offset)^1]
+#define W_VREG_S(reg, offset) rsp->v[(reg)].s[(offset)]
+#define VREG_S(reg, offset) (INT16)rsp->v[(reg)].s[(offset)]
-#define VEC_EL_2(x,z) (vector_elements_2[(x)][(z)])
+#define VEC_EL_2(x,z) (vector_elements_2[(x)][(z)])
-#define ACCUM(x) rsp->accum[x].q
-#define ACCUM_H(x) rsp->accum[((x))].w[3]
-#define ACCUM_M(x) rsp->accum[((x))].w[2]
-#define ACCUM_L(x) rsp->accum[((x))].w[1]
+#define ACCUM(x) rsp->accum[x].q
+#define ACCUM_H(x) rsp->accum[((x))].w[3]
+#define ACCUM_M(x) rsp->accum[((x))].w[2]
+#define ACCUM_L(x) rsp->accum[((x))].w[1]
-#define CARRY_FLAG(x) ((rsp->flag[0] & (1 << (x))) ? 1 : 0)
-#define CLEAR_CARRY_FLAGS() { rsp->flag[0] &= ~0xff; }
-#define SET_CARRY_FLAG(x) { rsp->flag[0] |= (1 << (x)); }
-#define CLEAR_CARRY_FLAG(x) { rsp->flag[0] &= ~(1 << (x)); }
+#define CARRY_FLAG(x) ((rsp->flag[0] & (1 << (x))) ? 1 : 0)
+#define CLEAR_CARRY_FLAGS() { rsp->flag[0] &= ~0xff; }
+#define SET_CARRY_FLAG(x) { rsp->flag[0] |= (1 << (x)); }
+#define CLEAR_CARRY_FLAG(x) { rsp->flag[0] &= ~(1 << (x)); }
-#define COMPARE_FLAG(x) ((rsp->flag[1] & (1 << (x))) ? 1 : 0)
-#define CLEAR_COMPARE_FLAGS() { rsp->flag[1] &= ~0xff; }
-#define SET_COMPARE_FLAG(x) { rsp->flag[1] |= (1 << (x)); }
-#define CLEAR_COMPARE_FLAG(x) { rsp->flag[1] &= ~(1 << (x)); }
+#define COMPARE_FLAG(x) ((rsp->flag[1] & (1 << (x))) ? 1 : 0)
+#define CLEAR_COMPARE_FLAGS() { rsp->flag[1] &= ~0xff; }
+#define SET_COMPARE_FLAG(x) { rsp->flag[1] |= (1 << (x)); }
+#define CLEAR_COMPARE_FLAG(x) { rsp->flag[1] &= ~(1 << (x)); }
-#define ZERO_FLAG(x) ((rsp->flag[0] & (0x100 << (x))) ? 1 : 0)
-#define CLEAR_ZERO_FLAGS() { rsp->flag[0] &= ~0xff00; }
-#define SET_ZERO_FLAG(x) { rsp->flag[0] |= (0x100 << (x)); }
-#define CLEAR_ZERO_FLAG(x) { rsp->flag[0] &= ~(0x100 << (x)); }
+#define ZERO_FLAG(x) ((rsp->flag[0] & (0x100 << (x))) ? 1 : 0)
+#define CLEAR_ZERO_FLAGS() { rsp->flag[0] &= ~0xff00; }
+#define SET_ZERO_FLAG(x) { rsp->flag[0] |= (0x100 << (x)); }
+#define CLEAR_ZERO_FLAG(x) { rsp->flag[0] &= ~(0x100 << (x)); }
INLINE rsp_state *get_safe_token(device_t *device)
{
@@ -539,49 +539,49 @@ static void unimplemented_opcode(rsp_state *rsp, UINT32 op)
/* Legacy. Going forward, this will be transitioned into unrolled opcode decodes. */
static const int vector_elements_1[16][8] =
{
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
- { 0, 1, 2, 3, 4, 5, 6 ,7 }, // ???
- { 1, 3, 5, 7, 0, 2, 4, 6 }, // 0q
- { 0, 2, 4, 6, 1, 3, 5, 7 }, // 1q
- { 1, 2, 3, 5, 6, 7, 0, 4 }, // 0h
- { 0, 2, 3, 4, 6, 7, 1, 5 }, // 1h
- { 0, 1, 3, 4, 5, 7, 2, 6 }, // 2h
- { 0, 1, 2, 4, 5, 6, 3, 7 }, // 3h
- { 1, 2, 3, 4, 5, 6, 7, 0 }, // 0
- { 0, 2, 3, 4, 5, 6, 7, 1 }, // 1
- { 0, 1, 3, 4, 5, 6, 7, 2 }, // 2
- { 0, 1, 2, 4, 5, 6, 7, 3 }, // 3
- { 0, 1, 2, 3, 5, 6, 7, 4 }, // 4
- { 0, 1, 2, 3, 4, 6, 7, 5 }, // 5
- { 0, 1, 2, 3, 4, 5, 7, 6 }, // 6
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // 7
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
+ { 0, 1, 2, 3, 4, 5, 6 ,7 }, // ???
+ { 1, 3, 5, 7, 0, 2, 4, 6 }, // 0q
+ { 0, 2, 4, 6, 1, 3, 5, 7 }, // 1q
+ { 1, 2, 3, 5, 6, 7, 0, 4 }, // 0h
+ { 0, 2, 3, 4, 6, 7, 1, 5 }, // 1h
+ { 0, 1, 3, 4, 5, 7, 2, 6 }, // 2h
+ { 0, 1, 2, 4, 5, 6, 3, 7 }, // 3h
+ { 1, 2, 3, 4, 5, 6, 7, 0 }, // 0
+ { 0, 2, 3, 4, 5, 6, 7, 1 }, // 1
+ { 0, 1, 3, 4, 5, 6, 7, 2 }, // 2
+ { 0, 1, 2, 4, 5, 6, 7, 3 }, // 3
+ { 0, 1, 2, 3, 5, 6, 7, 4 }, // 4
+ { 0, 1, 2, 3, 4, 6, 7, 5 }, // 5
+ { 0, 1, 2, 3, 4, 5, 7, 6 }, // 6
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // 7
};
/* Legacy. Going forward, this will be transitioned into unrolled opcode decodes. */
static const int vector_elements_2[16][8] =
{
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
- { 0, 1, 2, 3, 4, 5, 6, 7 }, // ???
- { 0, 0, 2, 2, 4, 4, 6, 6 }, // 0q
- { 1, 1, 3, 3, 5, 5, 7, 7 }, // 1q
- { 0, 0, 0, 0, 4, 4, 4, 4 }, // 0h
- { 1, 1, 1, 1, 5, 5, 5, 5 }, // 1h
- { 2, 2, 2, 2, 6, 6, 6, 6 }, // 2h
- { 3, 3, 3, 3, 7, 7, 7, 7 }, // 3h
- { 0, 0, 0, 0, 0, 0, 0, 0 }, // 0
- { 1, 1, 1, 1, 1, 1, 1, 1 }, // 1
- { 2, 2, 2, 2, 2, 2, 2, 2 }, // 2
- { 3, 3, 3, 3, 3, 3, 3, 3 }, // 3
- { 4, 4, 4, 4, 4, 4, 4, 4 }, // 4
- { 5, 5, 5, 5, 5, 5, 5, 5 }, // 5
- { 6, 6, 6, 6, 6, 6, 6, 6 }, // 6
- { 7, 7, 7, 7, 7, 7, 7, 7 }, // 7
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // none
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, // ???
+ { 0, 0, 2, 2, 4, 4, 6, 6 }, // 0q
+ { 1, 1, 3, 3, 5, 5, 7, 7 }, // 1q
+ { 0, 0, 0, 0, 4, 4, 4, 4 }, // 0h
+ { 1, 1, 1, 1, 5, 5, 5, 5 }, // 1h
+ { 2, 2, 2, 2, 6, 6, 6, 6 }, // 2h
+ { 3, 3, 3, 3, 7, 7, 7, 7 }, // 3h
+ { 0, 0, 0, 0, 0, 0, 0, 0 }, // 0
+ { 1, 1, 1, 1, 1, 1, 1, 1 }, // 1
+ { 2, 2, 2, 2, 2, 2, 2, 2 }, // 2
+ { 3, 3, 3, 3, 3, 3, 3, 3 }, // 3
+ { 4, 4, 4, 4, 4, 4, 4, 4 }, // 4
+ { 5, 5, 5, 5, 5, 5, 5, 5 }, // 5
+ { 6, 6, 6, 6, 6, 6, 6, 6 }, // 6
+ { 7, 7, 7, 7, 7, 7, 7, 7 }, // 7
};
static void rspcom_init(rsp_state *rsp, legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback)
{
int regIdx = 0;
- int accumIdx;
+ int accumIdx;
memset(rsp, 0, sizeof(*rsp));
@@ -599,7 +599,7 @@ static void rspcom_init(rsp_state *rsp, legacy_cpu_device *device, device_irq_ac
rsp->direct = &rsp->program->direct();
#if 1
- // Inaccurate. RSP registers power on to a random state...
+ // Inaccurate. RSP registers power on to a random state...
for(regIdx = 0; regIdx < 32; regIdx++ )
{
rsp->r[regIdx] = 0;
@@ -686,29 +686,29 @@ static CPU_INIT( rsp )
rsp->impstate->regmap[regnum] = (regnum == 0) ? parameter(0) : parameter::make_memory(&rsp->r[regnum]);
/*
- drcbe_info beinfo;
- rsp->impstate->drcuml->get_backend_info(beinfo);
- if (beinfo.direct_iregs > 2)
- {
- rsp->impstate->regmap[30] = I2;
- }
- if (beinfo.direct_iregs > 3)
- {
- rsp->impstate->regmap[31] = I3;
- }
- if (beinfo.direct_iregs > 4)
- {
- rsp->impstate->regmap[2] = I4;
- }
- if (beinfo.direct_iregs > 5)
- {
- rsp->impstate->regmap[3] = I5;
- }
- if (beinfo.direct_iregs > 6)
- {
- rsp->impstate->regmap[4] = I6;
- }
- */
+ drcbe_info beinfo;
+ rsp->impstate->drcuml->get_backend_info(beinfo);
+ if (beinfo.direct_iregs > 2)
+ {
+ rsp->impstate->regmap[30] = I2;
+ }
+ if (beinfo.direct_iregs > 3)
+ {
+ rsp->impstate->regmap[31] = I3;
+ }
+ if (beinfo.direct_iregs > 4)
+ {
+ rsp->impstate->regmap[2] = I4;
+ }
+ if (beinfo.direct_iregs > 5)
+ {
+ rsp->impstate->regmap[3] = I5;
+ }
+ if (beinfo.direct_iregs > 6)
+ {
+ rsp->impstate->regmap[4] = I6;
+ }
+ */
/* mark the cache dirty so it is updated on next execute */
rsp->impstate->cache_dirty = TRUE;
@@ -1133,53 +1133,53 @@ static int generate_lwc2(rsp_state *rsp, drcuml_block *block, compiler_state *co
switch ((op >> 11) & 0x1f)
{
- case 0x00: /* LBV */
+ case 0x00: /* LBV */
//UML_ADD(block, I0, R32(RSREG), offset);
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lbv, rsp);
return TRUE;
- case 0x01: /* LSV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x01: /* LSV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lsv, rsp);
return TRUE;
- case 0x02: /* LLV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x02: /* LLV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_llv, rsp);
return TRUE;
- case 0x03: /* LDV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x03: /* LDV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_ldv, rsp);
return TRUE;
- case 0x04: /* LQV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x04: /* LQV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lqv, rsp);
return TRUE;
- case 0x05: /* LRV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x05: /* LRV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lrv, rsp);
return TRUE;
- case 0x06: /* LPV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x06: /* LPV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lpv, rsp);
return TRUE;
- case 0x07: /* LUV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x07: /* LUV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_luv, rsp);
return TRUE;
- case 0x08: /* LHV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x08: /* LHV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lhv, rsp);
return TRUE;
- case 0x09: /* LFV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x09: /* LFV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lfv, rsp);
return TRUE;
- case 0x0a: /* LWV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0a: /* LWV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_lwv, rsp);
return TRUE;
- case 0x0b: /* LTV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0b: /* LTV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_ltv, rsp);
return TRUE;
@@ -1476,7 +1476,7 @@ static void cfunc_rsp_shv(void *param)
for (i=0; i < 8; i++)
{
UINT8 d = ((VREG_B(dest, ((index + (i << 1) + 0) & 0xf))) << 1) |
- ((VREG_B(dest, ((index + (i << 1) + 1) & 0xf))) >> 7);
+ ((VREG_B(dest, ((index + (i << 1) + 1) & 0xf))) >> 7);
WRITE8(rsp, ea, d);
ea += 2;
@@ -1506,7 +1506,7 @@ static void cfunc_rsp_sfv(void *param)
//
// Stores bits 14-7 of upper or lower quad, with 4-byte stride
- if (index & 0x7) printf("RSP: SFV: index = %d at %08X\n", index, rsp->ppc);
+ if (index & 0x7) printf("RSP: SFV: index = %d at %08X\n", index, rsp->ppc);
ea = (base) ? rsp->r[base] + (offset * 16) : (offset * 16);
@@ -1620,52 +1620,52 @@ static int generate_swc2(rsp_state *rsp, drcuml_block *block, compiler_state *co
switch ((op >> 11) & 0x1f)
{
- case 0x00: /* SBV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x00: /* SBV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_sbv, rsp);
return TRUE;
- case 0x01: /* SSV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x01: /* SSV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_ssv, rsp);
return TRUE;
- case 0x02: /* SLV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x02: /* SLV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_slv, rsp);
return TRUE;
- case 0x03: /* SDV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x03: /* SDV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_sdv, rsp);
return TRUE;
- case 0x04: /* SQV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x04: /* SQV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_sqv, rsp);
return TRUE;
- case 0x05: /* SRV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x05: /* SRV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_srv, rsp);
return TRUE;
- case 0x06: /* SPV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x06: /* SPV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_spv, rsp);
return TRUE;
- case 0x07: /* SUV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x07: /* SUV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_suv, rsp);
return TRUE;
- case 0x08: /* SHV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x08: /* SHV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_shv, rsp);
return TRUE;
- case 0x09: /* SFV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x09: /* SFV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_sfv, rsp);
return TRUE;
- case 0x0a: /* SWV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0a: /* SWV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_swv, rsp);
return TRUE;
- case 0x0b: /* STV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0b: /* STV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_stv, rsp);
return TRUE;
@@ -1749,7 +1749,7 @@ INLINE UINT16 SATURATE_ACCUM1(rsp_state *rsp, int accum, UINT16 negative, UINT16
}
else
{
- return ACCUM_M(accum);
+ return ACCUM_M(accum);
}
}
}
@@ -1767,7 +1767,7 @@ INLINE UINT16 SATURATE_ACCUM1(rsp_state *rsp, int accum, UINT16 negative, UINT16
}
else
{
- return ACCUM_M(accum);
+ return ACCUM_M(accum);
}
}
}
@@ -1776,14 +1776,14 @@ INLINE UINT16 SATURATE_ACCUM1(rsp_state *rsp, int accum, UINT16 negative, UINT16
}
#define WRITEBACK_RESULT() { \
- W_VREG_S(VDREG, 0) = vres[0]; \
- W_VREG_S(VDREG, 1) = vres[1]; \
- W_VREG_S(VDREG, 2) = vres[2]; \
- W_VREG_S(VDREG, 3) = vres[3]; \
- W_VREG_S(VDREG, 4) = vres[4]; \
- W_VREG_S(VDREG, 5) = vres[5]; \
- W_VREG_S(VDREG, 6) = vres[6]; \
- W_VREG_S(VDREG, 7) = vres[7]; \
+ W_VREG_S(VDREG, 0) = vres[0]; \
+ W_VREG_S(VDREG, 1) = vres[1]; \
+ W_VREG_S(VDREG, 2) = vres[2]; \
+ W_VREG_S(VDREG, 3) = vres[3]; \
+ W_VREG_S(VDREG, 4) = vres[4]; \
+ W_VREG_S(VDREG, 5) = vres[5]; \
+ W_VREG_S(VDREG, 6) = vres[6]; \
+ W_VREG_S(VDREG, 7) = vres[7]; \
}
INLINE void cfunc_rsp_vmulf(void *param)
@@ -1818,8 +1818,8 @@ INLINE void cfunc_rsp_vmulf(void *param)
else
{
r = s1 * s2 * 2;
- r += 0x8000; // rounding ?
- ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ r += 0x8000; // rounding ?
+ ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
ACCUM_M(i) = (INT16)(r >> 16);
ACCUM_L(i) = (UINT16)(r);
vres[i] = ACCUM_M(i);
@@ -1849,7 +1849,7 @@ INLINE void cfunc_rsp_vmulu(void *param)
s1 = (INT32)(INT16)VREG_S(VS1REG, i);
s2 = (INT32)(INT16)VREG_S(VS2REG, sel);
r = s1 * s2 * 2;
- r += 0x8000; // rounding ?
+ r += 0x8000; // rounding ?
ACCUM_H(i) = (UINT16)(r >> 32);
ACCUM_M(i) = (UINT16)(r >> 16);
@@ -1926,10 +1926,10 @@ INLINE void cfunc_rsp_vmudm(void *param)
{
sel = VEC_EL_2(EL, i);
s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
+ s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
r = s1 * s2;
- ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
ACCUM_M(i) = (INT16)(r >> 16);
ACCUM_L(i) = (UINT16)(r);
@@ -1959,11 +1959,11 @@ INLINE void cfunc_rsp_vmudn(void *param)
for (int i = 0; i < 8; i++)
{
sel = VEC_EL_2(EL, i);
- s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
+ s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
s2 = (INT32)(INT16)VREG_S(VS2REG, sel);
r = s1 * s2;
- ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ ACCUM_H(i) = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
ACCUM_M(i) = (INT16)(r >> 16);
ACCUM_L(i) = (UINT16)(r);
@@ -2002,7 +2002,7 @@ INLINE void cfunc_rsp_vmudh(void *param)
ACCUM_L(i) = 0;
if (r < -32768) r = -32768;
- if (r > 32767) r = 32767;
+ if (r > 32767) r = 32767;
vres[i] = (INT16)(r);
}
WRITEBACK_RESULT();
@@ -2144,7 +2144,7 @@ INLINE void cfunc_rsp_vmadm(void *param)
{
sel = VEC_EL_2(EL, i);
s1 = (INT32)(INT16)VREG_S(VS1REG, i);
- s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
+ s2 = (UINT16)VREG_S(VS2REG, sel); // not sign-extended
r1 = s1 * s2;
r2 = (UINT16)ACCUM_L(i) + (UINT16)(r1);
r3 = (UINT16)ACCUM_M(i) + (r1 >> 16) + (r2 >> 16);
@@ -2174,7 +2174,7 @@ INLINE void cfunc_rsp_vmadn(void *param)
for (int i = 0; i < 8; i++)
{
sel = VEC_EL_2(EL, i);
- s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
+ s1 = (UINT16)VREG_S(VS1REG, i); // not sign-extended
s2 = (INT32)(INT16)VREG_S(VS2REG, sel);
ACCUM(i) += (INT64)(s1*s2)<<16;
@@ -2426,7 +2426,7 @@ INLINE void cfunc_rsp_vsaw(void *param)
switch (EL)
{
- case 0x08: // VSAWH
+ case 0x08: // VSAWH
{
for (int i = 0; i < 8; i++)
{
@@ -2434,7 +2434,7 @@ INLINE void cfunc_rsp_vsaw(void *param)
}
break;
}
- case 0x09: // VSAWM
+ case 0x09: // VSAWM
{
for (int i = 0; i < 8; i++)
{
@@ -2442,7 +2442,7 @@ INLINE void cfunc_rsp_vsaw(void *param)
}
break;
}
- case 0x0a: // VSAWL
+ case 0x0a: // VSAWL
{
for (int i = 0; i < 8; i++)
{
@@ -2450,7 +2450,7 @@ INLINE void cfunc_rsp_vsaw(void *param)
}
break;
}
- default: fatalerror("RSP: VSAW: el = %d\n", EL);
+ default: fatalerror("RSP: VSAW: el = %d\n", EL);
}
}
@@ -3372,7 +3372,7 @@ INLINE void cfunc_rsp_vrsqh(void *param)
ACCUM_L(i) = VREG_S(VS2REG, sel);
}
- W_VREG_S(VDREG, del) = (INT16)(rsp->reciprocal_res >> 16); // store high part
+ W_VREG_S(VDREG, del) = (INT16)(rsp->reciprocal_res >> 16); // store high part
}
static void cfunc_sp_set_status_cb(void *param)
@@ -3502,7 +3502,7 @@ static void code_compile_block(rsp_state *rsp, offs_t pc)
/* add a code log entry */
if (LOG_UML)
- block->append_comment("-------------------------"); // comment
+ block->append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != NULL; seqlast = seqlast->next())
@@ -3512,20 +3512,20 @@ static void code_compile_block(rsp_state *rsp, offs_t pc)
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
if (override || !drcuml->hash_exists(0, seqhead->pc))
- UML_HASH(block, 0, seqhead->pc); // hash mode,pc
+ UML_HASH(block, 0, seqhead->pc); // hash mode,pc
/* if we already have a hash, and this is the first sequence, assume that we */
/* are recompiling due to being out of sync and allow future overrides */
else if (seqhead == desclist)
{
override = TRUE;
- UML_HASH(block, 0, seqhead->pc); // hash mode,pc
+ UML_HASH(block, 0, seqhead->pc); // hash mode,pc
}
/* otherwise, redispatch to that fixed PC and skip the rest of the processing */
else
{
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
UML_HASHJMP(block, 0, seqhead->pc, *rsp->impstate->nocode);
// hashjmp <0>,seqhead->pc,nocode
continue;
@@ -3537,7 +3537,7 @@ static void code_compile_block(rsp_state *rsp, offs_t pc)
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc
/* iterate over instructions in the sequence and compile them */
for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
@@ -3552,11 +3552,11 @@ static void code_compile_block(rsp_state *rsp, offs_t pc)
nextpc = seqlast->pc + (seqlast->skipslots + 1) * 4;
/* count off cycles and go there */
- generate_update_cycles(rsp, block, &compiler, nextpc, TRUE); // <subtract cycles>
+ generate_update_cycles(rsp, block, &compiler, nextpc, TRUE); // <subtract cycles>
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
if (seqlast->next() == NULL || seqlast->next()->pc != nextpc)
- UML_HASHJMP(block, 0, nextpc, *rsp->impstate->nocode); // hashjmp <mode>,nextpc,nocode
+ UML_HASHJMP(block, 0, nextpc, *rsp->impstate->nocode); // hashjmp <mode>,nextpc,nocode
}
/* end the sequence */
@@ -3621,13 +3621,13 @@ static void static_generate_entry_point(rsp_state *rsp)
alloc_handle(drcuml, &rsp->impstate->nocode, "nocode");
alloc_handle(drcuml, &rsp->impstate->entry, "entry");
- UML_HANDLE(block, *rsp->impstate->entry); // handle entry
+ UML_HANDLE(block, *rsp->impstate->entry); // handle entry
/* load fast integer registers */
load_fast_iregs(rsp, block);
/* generate a hash jump via the current mode and PC */
- UML_HASHJMP(block, 0, mem(&rsp->pc), *rsp->impstate->nocode); // hashjmp <mode>,<pc>,nocode
+ UML_HASHJMP(block, 0, mem(&rsp->pc), *rsp->impstate->nocode); // hashjmp <mode>,<pc>,nocode
block->end();
}
@@ -3647,11 +3647,11 @@ static void static_generate_nocode_handler(rsp_state *rsp)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &rsp->impstate->nocode, "nocode");
- UML_HANDLE(block, *rsp->impstate->nocode); // handle nocode
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&rsp->pc), I0); // mov [pc],i0
+ UML_HANDLE(block, *rsp->impstate->nocode); // handle nocode
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&rsp->pc), I0); // mov [pc],i0
save_fast_iregs(rsp, block);
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
block->end();
}
@@ -3672,11 +3672,11 @@ static void static_generate_out_of_cycles(rsp_state *rsp)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &rsp->impstate->out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *rsp->impstate->out_of_cycles); // handle out_of_cycles
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&rsp->pc), I0); // mov <pc>,i0
+ UML_HANDLE(block, *rsp->impstate->out_of_cycles); // handle out_of_cycles
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&rsp->pc), I0); // mov <pc>,i0
save_fast_iregs(rsp, block);
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
block->end();
}
@@ -3698,49 +3698,49 @@ static void static_generate_memory_accessor(rsp_state *rsp, int size, int iswrit
/* add a global entry for this */
alloc_handle(drcuml, &handleptr, name);
- UML_HANDLE(block, *handleptr); // handle *handleptr
+ UML_HANDLE(block, *handleptr); // handle *handleptr
// write:
if (iswrite)
{
if (size == 1)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
- UML_CALLC(block, cfunc_write8, rsp); // callc cfunc_write8
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
+ UML_CALLC(block, cfunc_write8, rsp); // callc cfunc_write8
}
else if (size == 2)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
- UML_CALLC(block, cfunc_write16, rsp); // callc cfunc_write16
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
+ UML_CALLC(block, cfunc_write16, rsp); // callc cfunc_write16
}
else if (size == 4)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
- UML_CALLC(block, cfunc_write32, rsp); // callc cfunc_write32
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_MOV(block, mem(&rsp->impstate->arg1), I1); // mov [arg1],i1 ; data
+ UML_CALLC(block, cfunc_write32, rsp); // callc cfunc_write32
}
}
else
{
if (size == 1)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_CALLC(block, cfunc_read8, rsp); // callc cfunc_printf_debug
- UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_CALLC(block, cfunc_read8, rsp); // callc cfunc_printf_debug
+ UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
}
else if (size == 2)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_CALLC(block, cfunc_read16, rsp); // callc cfunc_read16
- UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_CALLC(block, cfunc_read16, rsp); // callc cfunc_read16
+ UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
}
else if (size == 4)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
- UML_CALLC(block, cfunc_read32, rsp); // callc cfunc_read32
- UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
+ UML_MOV(block, mem(&rsp->impstate->arg0), I0); // mov [arg0],i0 ; address
+ UML_CALLC(block, cfunc_read32, rsp); // callc cfunc_read32
+ UML_MOV(block, I0, mem(&rsp->impstate->arg0)); // mov i0,[arg0],i0 ; result
}
}
UML_RET(block);
@@ -3764,8 +3764,8 @@ static void generate_update_cycles(rsp_state *rsp, drcuml_block *block, compiler
/* account for cycles */
if (compiler->cycles > 0)
{
- UML_SUB(block, mem(&rsp->icount), mem(&rsp->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
- UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
+ UML_SUB(block, mem(&rsp->icount), mem(&rsp->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
UML_EXHc(block, COND_S, *rsp->impstate->out_of_cycles, param);
}
compiler->cycles = 0;
@@ -3781,7 +3781,7 @@ static void generate_checksum_block(rsp_state *rsp, drcuml_block *block, compile
const opcode_desc *curdesc;
if (LOG_UML)
{
- block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); // comment
+ block->append_comment("[Validation for %08X]", seqhead->pc | 0x1000); // comment
}
/* loose verify or single instruction: just compare and fail */
if (!(rsp->impstate->drcoptions & RSPDRC_STRICT_VERIFY) || seqhead->next() == NULL)
@@ -3790,19 +3790,19 @@ static void generate_checksum_block(rsp_state *rsp, drcuml_block *block, compile
{
UINT32 sum = seqhead->opptr.l[0];
void *base = rsp->direct->read_decrypted_ptr(seqhead->physpc | 0x1000);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
if (seqhead->delay.first() != NULL && seqhead->physpc != seqhead->delay.first()->physpc)
{
base = rsp->direct->read_decrypted_ptr(seqhead->delay.first()->physpc | 0x1000);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += seqhead->delay.first()->opptr.l[0];
}
- UML_CMP(block, I0, sum); // cmp i0,opptr[0]
- UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_CMP(block, I0, sum); // cmp i0,opptr[0]
+ UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
}
@@ -3811,27 +3811,27 @@ static void generate_checksum_block(rsp_state *rsp, drcuml_block *block, compile
{
UINT32 sum = 0;
void *base = rsp->direct->read_decrypted_ptr(seqhead->physpc | 0x1000);
- UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
+ UML_LOAD(block, I0, base, 0, SIZE_DWORD, SCALE_x4); // load i0,base,0,dword
sum += seqhead->opptr.l[0];
for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
base = rsp->direct->read_decrypted_ptr(curdesc->physpc | 0x1000);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += curdesc->opptr.l[0];
if (curdesc->delay.first() != NULL && (curdesc == seqlast || (curdesc->next() != NULL && curdesc->next()->physpc != curdesc->delay.first()->physpc)))
{
base = rsp->direct->read_decrypted_ptr(curdesc->delay.first()->physpc | 0x1000);
- UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_DWORD, SCALE_x4); // load i1,base,dword
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += curdesc->delay.first()->opptr.l[0];
}
}
- UML_CMP(block, I0, sum); // cmp i0,sum
- UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_CMP(block, I0, sum); // cmp i0,sum
+ UML_EXHc(block, COND_NE, *rsp->impstate->nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
}
@@ -3851,29 +3851,29 @@ static void generate_sequence_instruction(rsp_state *rsp, drcuml_block *block, c
/* set the PC map variable */
expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc;
- UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
+ UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
/* accumulate total cycles */
compiler->cycles += desc->cycles;
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
/* if we are debugging, call the debugger */
if ((rsp->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
- UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(rsp, block);
- UML_DEBUG(block, desc->pc); // debug desc->pc
+ UML_DEBUG(block, desc->pc); // debug desc->pc
}
/* if we hit an unmapped address, fatal error */
#if 0
if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
{
- UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(rsp, block);
- UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
+ UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
}
#endif
@@ -3883,9 +3883,9 @@ static void generate_sequence_instruction(rsp_state *rsp, drcuml_block *block, c
/* compile the instruction */
if (!generate_opcode(rsp, block, compiler, desc))
{
- UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_unimplemented, rsp); // callc cfunc_unimplemented
+ UML_MOV(block, mem(&rsp->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_unimplemented, rsp); // callc cfunc_unimplemented
}
}
}
@@ -3909,19 +3909,19 @@ static void generate_delay_slot_and_branch(rsp_state *rsp, drcuml_block *block,
/* set the link if needed -- before the delay slot */
if (linkreg != 0)
{
- UML_MOV(block, R32(linkreg), (INT32)(desc->pc + 8)); // mov <linkreg>,desc->pc + 8
+ UML_MOV(block, R32(linkreg), (INT32)(desc->pc + 8)); // mov <linkreg>,desc->pc + 8
}
/* compile the delay slot using temporary compiler state */
assert(desc->delay.first() != NULL);
- generate_sequence_instruction(rsp, block, &compiler_temp, desc->delay.first()); // <next instruction>
+ generate_sequence_instruction(rsp, block, &compiler_temp, desc->delay.first()); // <next instruction>
/* update the cycles and jump through the hash table to the target */
if (desc->targetpc != BRANCH_TARGET_DYNAMIC)
{
- generate_update_cycles(rsp, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
+ generate_update_cycles(rsp, block, &compiler_temp, desc->targetpc, TRUE); // <subtract cycles>
if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
- UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc
+ UML_JMP(block, desc->targetpc | 0x80000000); // jmp desc->targetpc
else
UML_HASHJMP(block, 0, desc->targetpc, *rsp->impstate->nocode);
// hashjmp <mode>,desc->targetpc,nocode
@@ -3939,7 +3939,7 @@ static void generate_delay_slot_and_branch(rsp_state *rsp, drcuml_block *block,
/* reset the mapvar to the current cycles and account for skipped slots */
compiler->cycles += desc->skipslots;
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
}
@@ -3959,198 +3959,198 @@ static int generate_vector_opcode(rsp_state *rsp, drcuml_block *block, compiler_
switch (op & 0x3f)
{
- case 0x00: /* VMULF */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x00: /* VMULF */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmulf, rsp);
return TRUE;
- case 0x01: /* VMULU */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x01: /* VMULU */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmulu, rsp);
return TRUE;
- case 0x04: /* VMUDL */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x04: /* VMUDL */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmudl, rsp);
return TRUE;
- case 0x05: /* VMUDM */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x05: /* VMUDM */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmudm, rsp);
return TRUE;
- case 0x06: /* VMUDN */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x06: /* VMUDN */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmudn, rsp);
return TRUE;
- case 0x07: /* VMUDH */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x07: /* VMUDH */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmudh, rsp);
return TRUE;
- case 0x08: /* VMACF */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x08: /* VMACF */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmacf, rsp);
return TRUE;
- case 0x09: /* VMACU */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x09: /* VMACU */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmacu, rsp);
return TRUE;
- case 0x0c: /* VMADL */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0c: /* VMADL */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmadl, rsp);
return TRUE;
- case 0x0d: /* VMADM */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0d: /* VMADM */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmadm, rsp);
return TRUE;
- case 0x0e: /* VMADN */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0e: /* VMADN */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmadn, rsp);
return TRUE;
- case 0x0f: /* VMADH */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x0f: /* VMADH */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmadh, rsp);
return TRUE;
- case 0x10: /* VADD */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x10: /* VADD */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vadd, rsp);
return TRUE;
- case 0x11: /* VSUB */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x11: /* VSUB */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vsub, rsp);
return TRUE;
- case 0x13: /* VABS */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x13: /* VABS */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vabs, rsp);
return TRUE;
- case 0x14: /* VADDC */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x14: /* VADDC */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vaddc, rsp);
return TRUE;
- case 0x15: /* VSUBC */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x15: /* VSUBC */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vsubc, rsp);
return TRUE;
- case 0x1d: /* VSAW */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x1d: /* VSAW */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vsaw, rsp);
return TRUE;
- case 0x20: /* VLT */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x20: /* VLT */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vlt, rsp);
return TRUE;
- case 0x21: /* VEQ */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x21: /* VEQ */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_veq, rsp);
return TRUE;
- case 0x22: /* VNE */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x22: /* VNE */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vne, rsp);
return TRUE;
- case 0x23: /* VGE */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x23: /* VGE */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vge, rsp);
return TRUE;
- case 0x24: /* VCL */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x24: /* VCL */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vcl, rsp);
return TRUE;
- case 0x25: /* VCH */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x25: /* VCH */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vch, rsp);
return TRUE;
- case 0x26: /* VCR */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x26: /* VCR */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vcr, rsp);
return TRUE;
- case 0x27: /* VMRG */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x27: /* VMRG */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmrg, rsp);
return TRUE;
- case 0x28: /* VAND */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x28: /* VAND */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vand, rsp);
return TRUE;
- case 0x29: /* VNAND */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x29: /* VNAND */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vnand, rsp);
return TRUE;
- case 0x2a: /* VOR */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x2a: /* VOR */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vor, rsp);
return TRUE;
- case 0x2b: /* VNOR */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x2b: /* VNOR */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vnor, rsp);
return TRUE;
- case 0x2c: /* VXOR */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x2c: /* VXOR */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vxor, rsp);
return TRUE;
- case 0x2d: /* VNXOR */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x2d: /* VNXOR */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vnxor, rsp);
return TRUE;
- case 0x30: /* VRCP */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x30: /* VRCP */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vrcp, rsp);
return TRUE;
- case 0x31: /* VRCPL */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x31: /* VRCPL */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vrcpl, rsp);
return TRUE;
- case 0x32: /* VRCPH */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x32: /* VRCPH */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vrcph, rsp);
return TRUE;
- case 0x33: /* VMOV */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x33: /* VMOV */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vmov, rsp);
return TRUE;
- case 0x35: /* VRSQL */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x35: /* VRSQL */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vrsql, rsp);
return TRUE;
- case 0x36: /* VRSQH */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ case 0x36: /* VRSQH */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_rsp_vrsqh, rsp);
return TRUE;
default:
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
UML_CALLC(block, cfunc_unimplemented_opcode, rsp);
return FALSE;
}
@@ -4167,181 +4167,181 @@ static int generate_opcode(rsp_state *rsp, drcuml_block *block, compiler_state *
{
/* ----- sub-groups ----- */
- case 0x00: /* SPECIAL - MIPS I */
+ case 0x00: /* SPECIAL - MIPS I */
return generate_special(rsp, block, compiler, desc);
- case 0x01: /* REGIMM - MIPS I */
+ case 0x01: /* REGIMM - MIPS I */
return generate_regimm(rsp, block, compiler, desc);
/* ----- jumps and branches ----- */
- case 0x02: /* J - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ case 0x02: /* J - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
return TRUE;
- case 0x03: /* JAL - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 31); // <next instruction + hashjmp>
+ case 0x03: /* JAL - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 31); // <next instruction + hashjmp>
return TRUE;
- case 0x04: /* BEQ - MIPS I */
- UML_CMP(block, R32(RSREG), R32(RTREG)); // cmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ case 0x04: /* BEQ - MIPS I */
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // cmp <rsreg>,<rtreg>
+ UML_JMPc(block, COND_NE, skip = compiler->labelnum++); // jmp skip,NE
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
return TRUE;
- case 0x05: /* BNE - MIPS I */
- UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ case 0x05: /* BNE - MIPS I */
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_JMPc(block, COND_E, skip = compiler->labelnum++); // jmp skip,E
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
return TRUE;
- case 0x06: /* BLEZ - MIPS I */
+ case 0x06: /* BLEZ - MIPS I */
if (RSREG != 0)
{
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_G, skip = compiler->labelnum++); // jmp skip,G
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
}
else
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
return TRUE;
- case 0x07: /* BGTZ - MIPS I */
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ case 0x07: /* BGTZ - MIPS I */
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_LE, skip = compiler->labelnum++); // jmp skip,LE
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ UML_LABEL(block, skip); // skip:
return TRUE;
/* ----- immediate arithmetic ----- */
- case 0x0f: /* LUI - MIPS I */
+ case 0x0f: /* LUI - MIPS I */
if (RTREG != 0)
- UML_MOV(block, R32(RTREG), SIMMVAL << 16); // dmov <rtreg>,SIMMVAL << 16
+ UML_MOV(block, R32(RTREG), SIMMVAL << 16); // dmov <rtreg>,SIMMVAL << 16
return TRUE;
- case 0x08: /* ADDI - MIPS I */
- case 0x09: /* ADDIU - MIPS I */
+ case 0x08: /* ADDI - MIPS I */
+ case 0x09: /* ADDIU - MIPS I */
if (RTREG != 0)
{
- UML_ADD(block, R32(RTREG), R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL,V
+ UML_ADD(block, R32(RTREG), R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL,V
}
return TRUE;
- case 0x0a: /* SLTI - MIPS I */
+ case 0x0a: /* SLTI - MIPS I */
if (RTREG != 0)
{
- UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
- UML_SETc(block, COND_L, R32(RTREG)); // dset <rtreg>,l
+ UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ UML_SETc(block, COND_L, R32(RTREG)); // dset <rtreg>,l
}
return TRUE;
- case 0x0b: /* SLTIU - MIPS I */
+ case 0x0b: /* SLTIU - MIPS I */
if (RTREG != 0)
{
- UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
- UML_SETc(block, COND_B, R32(RTREG)); // dset <rtreg>,b
+ UML_CMP(block, R32(RSREG), SIMMVAL); // dcmp <rsreg>,SIMMVAL
+ UML_SETc(block, COND_B, R32(RTREG)); // dset <rtreg>,b
}
return TRUE;
- case 0x0c: /* ANDI - MIPS I */
+ case 0x0c: /* ANDI - MIPS I */
if (RTREG != 0)
- UML_AND(block, R32(RTREG), R32(RSREG), UIMMVAL); // dand <rtreg>,<rsreg>,UIMMVAL
+ UML_AND(block, R32(RTREG), R32(RSREG), UIMMVAL); // dand <rtreg>,<rsreg>,UIMMVAL
return TRUE;
- case 0x0d: /* ORI - MIPS I */
+ case 0x0d: /* ORI - MIPS I */
if (RTREG != 0)
- UML_OR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dor <rtreg>,<rsreg>,UIMMVAL
+ UML_OR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dor <rtreg>,<rsreg>,UIMMVAL
return TRUE;
- case 0x0e: /* XORI - MIPS I */
+ case 0x0e: /* XORI - MIPS I */
if (RTREG != 0)
- UML_XOR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dxor <rtreg>,<rsreg>,UIMMVAL
+ UML_XOR(block, R32(RTREG), R32(RSREG), UIMMVAL); // dxor <rtreg>,<rsreg>,UIMMVAL
return TRUE;
/* ----- memory load operations ----- */
- case 0x20: /* LB - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read8); // callh read8
+ case 0x20: /* LB - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read8); // callh read8
if (RTREG != 0)
- UML_SEXT(block, R32(RTREG), I0, SIZE_BYTE); // dsext <rtreg>,i0,byte
+ UML_SEXT(block, R32(RTREG), I0, SIZE_BYTE); // dsext <rtreg>,i0,byte
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x21: /* LH - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read16); // callh read16
+ case 0x21: /* LH - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read16); // callh read16
if (RTREG != 0)
- UML_SEXT(block, R32(RTREG), I0, SIZE_WORD); // dsext <rtreg>,i0,word
+ UML_SEXT(block, R32(RTREG), I0, SIZE_WORD); // dsext <rtreg>,i0,word
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x23: /* LW - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read32); // callh read32
+ case 0x23: /* LW - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read32); // callh read32
if (RTREG != 0)
UML_MOV(block, R32(RTREG), I0);
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x24: /* LBU - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read8); // callh read8
+ case 0x24: /* LBU - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read8); // callh read8
if (RTREG != 0)
- UML_AND(block, R32(RTREG), I0, 0xff); // dand <rtreg>,i0,0xff
+ UML_AND(block, R32(RTREG), I0, 0xff); // dand <rtreg>,i0,0xff
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x25: /* LHU - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_CALLH(block, *rsp->impstate->read16); // callh read16
+ case 0x25: /* LHU - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_CALLH(block, *rsp->impstate->read16); // callh read16
if (RTREG != 0)
- UML_AND(block, R32(RTREG), I0, 0xffff); // dand <rtreg>,i0,0xffff
+ UML_AND(block, R32(RTREG), I0, 0xffff); // dand <rtreg>,i0,0xffff
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x32: /* LWC2 - MIPS I */
+ case 0x32: /* LWC2 - MIPS I */
return generate_lwc2(rsp, block, compiler, desc);
/* ----- memory store operations ----- */
- case 0x28: /* SB - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *rsp->impstate->write8); // callh write8
+ case 0x28: /* SB - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *rsp->impstate->write8); // callh write8
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x29: /* SH - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *rsp->impstate->write16); // callh write16
+ case 0x29: /* SH - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *rsp->impstate->write16); // callh write16
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x2b: /* SW - MIPS I */
- UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
- UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
- UML_CALLH(block, *rsp->impstate->write32); // callh write32
+ case 0x2b: /* SW - MIPS I */
+ UML_ADD(block, I0, R32(RSREG), SIMMVAL); // add i0,<rsreg>,SIMMVAL
+ UML_MOV(block, I1, R32(RTREG)); // mov i1,<rtreg>
+ UML_CALLH(block, *rsp->impstate->write32); // callh write32
if (!in_delay_slot)
generate_update_cycles(rsp, block, compiler, desc->pc + 4, TRUE);
return TRUE;
- case 0x3a: /* SWC2 - MIPS I */
+ case 0x3a: /* SWC2 - MIPS I */
return generate_swc2(rsp, block, compiler, desc);
//UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
//UML_CALLC(block, cfunc_swc2, rsp); // callc cfunc_mfc2
@@ -4349,10 +4349,10 @@ static int generate_opcode(rsp_state *rsp, drcuml_block *block, compiler_state *
/* ----- coprocessor instructions ----- */
- case 0x10: /* COP0 - MIPS I */
+ case 0x10: /* COP0 - MIPS I */
return generate_cop0(rsp, block, compiler, desc);
- case 0x12: /* COP2 - MIPS I */
+ case 0x12: /* COP2 - MIPS I */
return generate_cop2(rsp, block, compiler, desc);
//UML_EXH(block, rsp->impstate->exception[EXCEPTION_INVALIDOP], 0);// exh invalidop,0
//return TRUE;
@@ -4382,42 +4382,42 @@ static int generate_special(rsp_state *rsp, drcuml_block *block, compiler_state
{
/* ----- shift instructions ----- */
- case 0x00: /* SLL - MIPS I */
+ case 0x00: /* SLL - MIPS I */
if (RDREG != 0)
{
UML_SHL(block, R32(RDREG), R32(RTREG), SHIFT);
}
return TRUE;
- case 0x02: /* SRL - MIPS I */
+ case 0x02: /* SRL - MIPS I */
if (RDREG != 0)
{
UML_SHR(block, R32(RDREG), R32(RTREG), SHIFT);
}
return TRUE;
- case 0x03: /* SRA - MIPS I */
+ case 0x03: /* SRA - MIPS I */
if (RDREG != 0)
{
UML_SAR(block, R32(RDREG), R32(RTREG), SHIFT);
}
return TRUE;
- case 0x04: /* SLLV - MIPS I */
+ case 0x04: /* SLLV - MIPS I */
if (RDREG != 0)
{
UML_SHL(block, R32(RDREG), R32(RTREG), R32(RSREG));
}
return TRUE;
- case 0x06: /* SRLV - MIPS I */
+ case 0x06: /* SRLV - MIPS I */
if (RDREG != 0)
{
UML_SHR(block, R32(RDREG), R32(RTREG), R32(RSREG));
}
return TRUE;
- case 0x07: /* SRAV - MIPS I */
+ case 0x07: /* SRAV - MIPS I */
if (RDREG != 0)
{
UML_SAR(block, R32(RDREG), R32(RTREG), R32(RSREG));
@@ -4426,16 +4426,16 @@ static int generate_special(rsp_state *rsp, drcuml_block *block, compiler_state
/* ----- basic arithmetic ----- */
- case 0x20: /* ADD - MIPS I */
- case 0x21: /* ADDU - MIPS I */
+ case 0x20: /* ADD - MIPS I */
+ case 0x21: /* ADDU - MIPS I */
if (RDREG != 0)
{
UML_ADD(block, R32(RDREG), R32(RSREG), R32(RTREG));
}
return TRUE;
- case 0x22: /* SUB - MIPS I */
- case 0x23: /* SUBU - MIPS I */
+ case 0x22: /* SUB - MIPS I */
+ case 0x23: /* SUBU - MIPS I */
if (RDREG != 0)
{
UML_SUB(block, R32(RDREG), R32(RSREG), R32(RTREG));
@@ -4444,72 +4444,72 @@ static int generate_special(rsp_state *rsp, drcuml_block *block, compiler_state
/* ----- basic logical ops ----- */
- case 0x24: /* AND - MIPS I */
+ case 0x24: /* AND - MIPS I */
if (RDREG != 0)
{
- UML_AND(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dand <rdreg>,<rsreg>,<rtreg>
+ UML_AND(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dand <rdreg>,<rsreg>,<rtreg>
}
return TRUE;
- case 0x25: /* OR - MIPS I */
+ case 0x25: /* OR - MIPS I */
if (RDREG != 0)
{
- UML_OR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dor <rdreg>,<rsreg>,<rtreg>
+ UML_OR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dor <rdreg>,<rsreg>,<rtreg>
}
return TRUE;
- case 0x26: /* XOR - MIPS I */
+ case 0x26: /* XOR - MIPS I */
if (RDREG != 0)
{
- UML_XOR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dxor <rdreg>,<rsreg>,<rtreg>
+ UML_XOR(block, R32(RDREG), R32(RSREG), R32(RTREG)); // dxor <rdreg>,<rsreg>,<rtreg>
}
return TRUE;
- case 0x27: /* NOR - MIPS I */
+ case 0x27: /* NOR - MIPS I */
if (RDREG != 0)
{
- UML_OR(block, I0, R32(RSREG), R32(RTREG)); // dor i0,<rsreg>,<rtreg>
- UML_XOR(block, R32(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
+ UML_OR(block, I0, R32(RSREG), R32(RTREG)); // dor i0,<rsreg>,<rtreg>
+ UML_XOR(block, R32(RDREG), I0, (UINT64)~0); // dxor <rdreg>,i0,~0
}
return TRUE;
/* ----- basic comparisons ----- */
- case 0x2a: /* SLT - MIPS I */
+ case 0x2a: /* SLT - MIPS I */
if (RDREG != 0)
{
- UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_SETc(block, COND_L, R32(RDREG)); // dset <rdreg>,l
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_SETc(block, COND_L, R32(RDREG)); // dset <rdreg>,l
}
return TRUE;
- case 0x2b: /* SLTU - MIPS I */
+ case 0x2b: /* SLTU - MIPS I */
if (RDREG != 0)
{
- UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
- UML_SETc(block, COND_B, R32(RDREG)); // dset <rdreg>,b
+ UML_CMP(block, R32(RSREG), R32(RTREG)); // dcmp <rsreg>,<rtreg>
+ UML_SETc(block, COND_B, R32(RDREG)); // dset <rdreg>,b
}
return TRUE;
/* ----- jumps and branches ----- */
- case 0x08: /* JR - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
+ case 0x08: /* JR - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, 0); // <next instruction + hashjmp>
return TRUE;
- case 0x09: /* JALR - MIPS I */
- generate_delay_slot_and_branch(rsp, block, compiler, desc, RDREG); // <next instruction + hashjmp>
+ case 0x09: /* JALR - MIPS I */
+ generate_delay_slot_and_branch(rsp, block, compiler, desc, RDREG); // <next instruction + hashjmp>
return TRUE;
/* ----- system calls ----- */
- case 0x0d: /* BREAK - MIPS I */
- UML_MOV(block, mem(&rsp->impstate->arg0), 3); // mov [arg0],3
- UML_CALLC(block, cfunc_sp_set_status_cb, rsp); // callc cfunc_sp_set_status_cb
- UML_MOV(block, mem(&rsp->icount), 0); // mov icount, #0
+ case 0x0d: /* BREAK - MIPS I */
+ UML_MOV(block, mem(&rsp->impstate->arg0), 3); // mov [arg0],3
+ UML_CALLC(block, cfunc_sp_set_status_cb, rsp); // callc cfunc_sp_set_status_cb
+ UML_MOV(block, mem(&rsp->icount), 0); // mov icount, #0
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES);
return TRUE;
@@ -4532,27 +4532,27 @@ static int generate_regimm(rsp_state *rsp, drcuml_block *block, compiler_state *
switch (opswitch)
{
- case 0x00: /* BLTZ */
- case 0x10: /* BLTZAL */
+ case 0x00: /* BLTZ */
+ case 0x10: /* BLTZAL */
if (RSREG != 0)
{
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_GE, skip = compiler->labelnum++); // jmp skip,GE
generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
// <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
return TRUE;
- case 0x01: /* BGEZ */
- case 0x11: /* BGEZAL */
+ case 0x01: /* BGEZ */
+ case 0x11: /* BGEZAL */
if (RSREG != 0)
{
- UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
- UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
+ UML_CMP(block, R32(RSREG), 0); // dcmp <rsreg>,0
+ UML_JMPc(block, COND_L, skip = compiler->labelnum++); // jmp skip,L
generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
// <next instruction + hashjmp>
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
else
generate_delay_slot_and_branch(rsp, block, compiler, desc, (opswitch & 0x10) ? 31 : 0);
@@ -4574,32 +4574,32 @@ static int generate_cop2(rsp_state *rsp, drcuml_block *block, compiler_state *co
switch (opswitch)
{
- case 0x00: /* MFCz */
+ case 0x00: /* MFCz */
if (RTREG != 0)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_mfc2, rsp); // callc cfunc_mfc2
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_mfc2, rsp); // callc cfunc_mfc2
//UML_SEXT(block, R32(RTREG), I0, DWORD); // dsext <rtreg>,i0,dword
}
return TRUE;
- case 0x02: /* CFCz */
+ case 0x02: /* CFCz */
if (RTREG != 0)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_cfc2, rsp); // callc cfunc_cfc2
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_cfc2, rsp); // callc cfunc_cfc2
//UML_SEXT(block, R32(RTREG), I0, DWORD); // dsext <rtreg>,i0,dword
}
return TRUE;
- case 0x04: /* MTCz */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_mtc2, rsp); // callc cfunc_mtc2
+ case 0x04: /* MTCz */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_mtc2, rsp); // callc cfunc_mtc2
return TRUE;
- case 0x06: /* CTCz */
- UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
- UML_CALLC(block, cfunc_ctc2, rsp); // callc cfunc_ctc2
+ case 0x06: /* CTCz */
+ UML_MOV(block, mem(&rsp->impstate->arg0), desc->opptr.l[0]); // mov [arg0],desc->opptr.l
+ UML_CALLC(block, cfunc_ctc2, rsp); // callc cfunc_ctc2
return TRUE;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
@@ -4620,12 +4620,12 @@ static int generate_cop0(rsp_state *rsp, drcuml_block *block, compiler_state *co
switch (opswitch)
{
- case 0x00: /* MFCz */
+ case 0x00: /* MFCz */
if (RTREG != 0)
{
- UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
- UML_MOV(block, mem(&rsp->impstate->arg1), RTREG); // mov [arg1],<rtreg>
- UML_CALLC(block, cfunc_get_cop0_reg, rsp); // callc cfunc_get_cop0_reg
+ UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
+ UML_MOV(block, mem(&rsp->impstate->arg1), RTREG); // mov [arg1],<rtreg>
+ UML_CALLC(block, cfunc_get_cop0_reg, rsp); // callc cfunc_get_cop0_reg
if(RDREG == 2)
{
generate_update_cycles(rsp, block, compiler, mem(&rsp->pc), TRUE);
@@ -4634,10 +4634,10 @@ static int generate_cop0(rsp_state *rsp, drcuml_block *block, compiler_state *co
}
return TRUE;
- case 0x04: /* MTCz */
- UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
- UML_MOV(block, mem(&rsp->impstate->arg1), R32(RTREG)); // mov [arg1],rtreg
- UML_CALLC(block, cfunc_set_cop0_reg, rsp); // callc cfunc_set_cop0_reg
+ case 0x04: /* MTCz */
+ UML_MOV(block, mem(&rsp->impstate->arg0), RDREG); // mov [arg0],<rdreg>
+ UML_MOV(block, mem(&rsp->impstate->arg1), R32(RTREG)); // mov [arg1],rtreg
+ UML_CALLC(block, cfunc_set_cop0_reg, rsp); // callc cfunc_set_cop0_reg
return TRUE;
}
@@ -4703,7 +4703,7 @@ static void log_add_disasm_comment(rsp_state *rsp, drcuml_block *block, UINT32 p
#if (LOG_UML)
char buffer[100];
rsp_dasm_one(buffer, pc, op);
- block->append_comment("%08X: %s", pc, buffer); // comment
+ block->append_comment("%08X: %s", pc, buffer); // comment
#endif
}
@@ -4763,124 +4763,124 @@ CPU_GET_INFO( rsp )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(rsp_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = rsp->ppc | 0x04000000; break;
-
- case CPUINFO_INT_PC: /* intentional fallthrough */
- case CPUINFO_INT_REGISTER + RSP_PC: info->i = rsp->pc | 0x04000000; break;
-
- case CPUINFO_INT_REGISTER + RSP_R0: info->i = rsp->r[0]; break;
- case CPUINFO_INT_REGISTER + RSP_R1: info->i = rsp->r[1]; break;
- case CPUINFO_INT_REGISTER + RSP_R2: info->i = rsp->r[2]; break;
- case CPUINFO_INT_REGISTER + RSP_R3: info->i = rsp->r[3]; break;
- case CPUINFO_INT_REGISTER + RSP_R4: info->i = rsp->r[4]; break;
- case CPUINFO_INT_REGISTER + RSP_R5: info->i = rsp->r[5]; break;
- case CPUINFO_INT_REGISTER + RSP_R6: info->i = rsp->r[6]; break;
- case CPUINFO_INT_REGISTER + RSP_R7: info->i = rsp->r[7]; break;
- case CPUINFO_INT_REGISTER + RSP_R8: info->i = rsp->r[8]; break;
- case CPUINFO_INT_REGISTER + RSP_R9: info->i = rsp->r[9]; break;
- case CPUINFO_INT_REGISTER + RSP_R10: info->i = rsp->r[10]; break;
- case CPUINFO_INT_REGISTER + RSP_R11: info->i = rsp->r[11]; break;
- case CPUINFO_INT_REGISTER + RSP_R12: info->i = rsp->r[12]; break;
- case CPUINFO_INT_REGISTER + RSP_R13: info->i = rsp->r[13]; break;
- case CPUINFO_INT_REGISTER + RSP_R14: info->i = rsp->r[14]; break;
- case CPUINFO_INT_REGISTER + RSP_R15: info->i = rsp->r[15]; break;
- case CPUINFO_INT_REGISTER + RSP_R16: info->i = rsp->r[16]; break;
- case CPUINFO_INT_REGISTER + RSP_R17: info->i = rsp->r[17]; break;
- case CPUINFO_INT_REGISTER + RSP_R18: info->i = rsp->r[18]; break;
- case CPUINFO_INT_REGISTER + RSP_R19: info->i = rsp->r[19]; break;
- case CPUINFO_INT_REGISTER + RSP_R20: info->i = rsp->r[20]; break;
- case CPUINFO_INT_REGISTER + RSP_R21: info->i = rsp->r[21]; break;
- case CPUINFO_INT_REGISTER + RSP_R22: info->i = rsp->r[22]; break;
- case CPUINFO_INT_REGISTER + RSP_R23: info->i = rsp->r[23]; break;
- case CPUINFO_INT_REGISTER + RSP_R24: info->i = rsp->r[24]; break;
- case CPUINFO_INT_REGISTER + RSP_R25: info->i = rsp->r[25]; break;
- case CPUINFO_INT_REGISTER + RSP_R26: info->i = rsp->r[26]; break;
- case CPUINFO_INT_REGISTER + RSP_R27: info->i = rsp->r[27]; break;
- case CPUINFO_INT_REGISTER + RSP_R28: info->i = rsp->r[28]; break;
- case CPUINFO_INT_REGISTER + RSP_R29: info->i = rsp->r[29]; break;
- case CPUINFO_INT_REGISTER + RSP_R30: info->i = rsp->r[30]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(rsp_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = rsp->ppc | 0x04000000; break;
+
+ case CPUINFO_INT_PC: /* intentional fallthrough */
+ case CPUINFO_INT_REGISTER + RSP_PC: info->i = rsp->pc | 0x04000000; break;
+
+ case CPUINFO_INT_REGISTER + RSP_R0: info->i = rsp->r[0]; break;
+ case CPUINFO_INT_REGISTER + RSP_R1: info->i = rsp->r[1]; break;
+ case CPUINFO_INT_REGISTER + RSP_R2: info->i = rsp->r[2]; break;
+ case CPUINFO_INT_REGISTER + RSP_R3: info->i = rsp->r[3]; break;
+ case CPUINFO_INT_REGISTER + RSP_R4: info->i = rsp->r[4]; break;
+ case CPUINFO_INT_REGISTER + RSP_R5: info->i = rsp->r[5]; break;
+ case CPUINFO_INT_REGISTER + RSP_R6: info->i = rsp->r[6]; break;
+ case CPUINFO_INT_REGISTER + RSP_R7: info->i = rsp->r[7]; break;
+ case CPUINFO_INT_REGISTER + RSP_R8: info->i = rsp->r[8]; break;
+ case CPUINFO_INT_REGISTER + RSP_R9: info->i = rsp->r[9]; break;
+ case CPUINFO_INT_REGISTER + RSP_R10: info->i = rsp->r[10]; break;
+ case CPUINFO_INT_REGISTER + RSP_R11: info->i = rsp->r[11]; break;
+ case CPUINFO_INT_REGISTER + RSP_R12: info->i = rsp->r[12]; break;
+ case CPUINFO_INT_REGISTER + RSP_R13: info->i = rsp->r[13]; break;
+ case CPUINFO_INT_REGISTER + RSP_R14: info->i = rsp->r[14]; break;
+ case CPUINFO_INT_REGISTER + RSP_R15: info->i = rsp->r[15]; break;
+ case CPUINFO_INT_REGISTER + RSP_R16: info->i = rsp->r[16]; break;
+ case CPUINFO_INT_REGISTER + RSP_R17: info->i = rsp->r[17]; break;
+ case CPUINFO_INT_REGISTER + RSP_R18: info->i = rsp->r[18]; break;
+ case CPUINFO_INT_REGISTER + RSP_R19: info->i = rsp->r[19]; break;
+ case CPUINFO_INT_REGISTER + RSP_R20: info->i = rsp->r[20]; break;
+ case CPUINFO_INT_REGISTER + RSP_R21: info->i = rsp->r[21]; break;
+ case CPUINFO_INT_REGISTER + RSP_R22: info->i = rsp->r[22]; break;
+ case CPUINFO_INT_REGISTER + RSP_R23: info->i = rsp->r[23]; break;
+ case CPUINFO_INT_REGISTER + RSP_R24: info->i = rsp->r[24]; break;
+ case CPUINFO_INT_REGISTER + RSP_R25: info->i = rsp->r[25]; break;
+ case CPUINFO_INT_REGISTER + RSP_R26: info->i = rsp->r[26]; break;
+ case CPUINFO_INT_REGISTER + RSP_R27: info->i = rsp->r[27]; break;
+ case CPUINFO_INT_REGISTER + RSP_R28: info->i = rsp->r[28]; break;
+ case CPUINFO_INT_REGISTER + RSP_R29: info->i = rsp->r[29]; break;
+ case CPUINFO_INT_REGISTER + RSP_R30: info->i = rsp->r[30]; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + RSP_R31: info->i = rsp->r[31]; break;
+ case CPUINFO_INT_REGISTER + RSP_R31: info->i = rsp->r[31]; break;
case CPUINFO_INT_REGISTER + RSP_SR: info->i = rsp->sr; break;
case CPUINFO_INT_REGISTER + RSP_NEXTPC: info->i = rsp->nextpc | 0x04000000; break;
case CPUINFO_INT_REGISTER + RSP_STEPCNT: info->i = rsp->step_count; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(rsp); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rsp); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(rsp); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(rsp); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(rsp); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(rsp); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(rsp); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(rsp); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(rsp); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(rsp); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(rsp); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &rsp->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "RSP"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "RSP"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + RSP_PC: sprintf(info->s, "PC: %08X", rsp->pc | 0x04000000); break;
-
- case CPUINFO_STR_REGISTER + RSP_R0: sprintf(info->s, "R0: %08X", rsp->r[0]); break;
- case CPUINFO_STR_REGISTER + RSP_R1: sprintf(info->s, "R1: %08X", rsp->r[1]); break;
- case CPUINFO_STR_REGISTER + RSP_R2: sprintf(info->s, "R2: %08X", rsp->r[2]); break;
- case CPUINFO_STR_REGISTER + RSP_R3: sprintf(info->s, "R3: %08X", rsp->r[3]); break;
- case CPUINFO_STR_REGISTER + RSP_R4: sprintf(info->s, "R4: %08X", rsp->r[4]); break;
- case CPUINFO_STR_REGISTER + RSP_R5: sprintf(info->s, "R5: %08X", rsp->r[5]); break;
- case CPUINFO_STR_REGISTER + RSP_R6: sprintf(info->s, "R6: %08X", rsp->r[6]); break;
- case CPUINFO_STR_REGISTER + RSP_R7: sprintf(info->s, "R7: %08X", rsp->r[7]); break;
- case CPUINFO_STR_REGISTER + RSP_R8: sprintf(info->s, "R8: %08X", rsp->r[8]); break;
- case CPUINFO_STR_REGISTER + RSP_R9: sprintf(info->s, "R9: %08X", rsp->r[9]); break;
- case CPUINFO_STR_REGISTER + RSP_R10: sprintf(info->s, "R10: %08X", rsp->r[10]); break;
- case CPUINFO_STR_REGISTER + RSP_R11: sprintf(info->s, "R11: %08X", rsp->r[11]); break;
- case CPUINFO_STR_REGISTER + RSP_R12: sprintf(info->s, "R12: %08X", rsp->r[12]); break;
- case CPUINFO_STR_REGISTER + RSP_R13: sprintf(info->s, "R13: %08X", rsp->r[13]); break;
- case CPUINFO_STR_REGISTER + RSP_R14: sprintf(info->s, "R14: %08X", rsp->r[14]); break;
- case CPUINFO_STR_REGISTER + RSP_R15: sprintf(info->s, "R15: %08X", rsp->r[15]); break;
- case CPUINFO_STR_REGISTER + RSP_R16: sprintf(info->s, "R16: %08X", rsp->r[16]); break;
- case CPUINFO_STR_REGISTER + RSP_R17: sprintf(info->s, "R17: %08X", rsp->r[17]); break;
- case CPUINFO_STR_REGISTER + RSP_R18: sprintf(info->s, "R18: %08X", rsp->r[18]); break;
- case CPUINFO_STR_REGISTER + RSP_R19: sprintf(info->s, "R19: %08X", rsp->r[19]); break;
- case CPUINFO_STR_REGISTER + RSP_R20: sprintf(info->s, "R20: %08X", rsp->r[20]); break;
- case CPUINFO_STR_REGISTER + RSP_R21: sprintf(info->s, "R21: %08X", rsp->r[21]); break;
- case CPUINFO_STR_REGISTER + RSP_R22: sprintf(info->s, "R22: %08X", rsp->r[22]); break;
- case CPUINFO_STR_REGISTER + RSP_R23: sprintf(info->s, "R23: %08X", rsp->r[23]); break;
- case CPUINFO_STR_REGISTER + RSP_R24: sprintf(info->s, "R24: %08X", rsp->r[24]); break;
- case CPUINFO_STR_REGISTER + RSP_R25: sprintf(info->s, "R25: %08X", rsp->r[25]); break;
- case CPUINFO_STR_REGISTER + RSP_R26: sprintf(info->s, "R26: %08X", rsp->r[26]); break;
- case CPUINFO_STR_REGISTER + RSP_R27: sprintf(info->s, "R27: %08X", rsp->r[27]); break;
- case CPUINFO_STR_REGISTER + RSP_R28: sprintf(info->s, "R28: %08X", rsp->r[28]); break;
- case CPUINFO_STR_REGISTER + RSP_R29: sprintf(info->s, "R29: %08X", rsp->r[29]); break;
- case CPUINFO_STR_REGISTER + RSP_R30: sprintf(info->s, "R30: %08X", rsp->r[30]); break;
- case CPUINFO_STR_REGISTER + RSP_R31: sprintf(info->s, "R31: %08X", rsp->r[31]); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "RSP"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "RSP"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + RSP_PC: sprintf(info->s, "PC: %08X", rsp->pc | 0x04000000); break;
+
+ case CPUINFO_STR_REGISTER + RSP_R0: sprintf(info->s, "R0: %08X", rsp->r[0]); break;
+ case CPUINFO_STR_REGISTER + RSP_R1: sprintf(info->s, "R1: %08X", rsp->r[1]); break;
+ case CPUINFO_STR_REGISTER + RSP_R2: sprintf(info->s, "R2: %08X", rsp->r[2]); break;
+ case CPUINFO_STR_REGISTER + RSP_R3: sprintf(info->s, "R3: %08X", rsp->r[3]); break;
+ case CPUINFO_STR_REGISTER + RSP_R4: sprintf(info->s, "R4: %08X", rsp->r[4]); break;
+ case CPUINFO_STR_REGISTER + RSP_R5: sprintf(info->s, "R5: %08X", rsp->r[5]); break;
+ case CPUINFO_STR_REGISTER + RSP_R6: sprintf(info->s, "R6: %08X", rsp->r[6]); break;
+ case CPUINFO_STR_REGISTER + RSP_R7: sprintf(info->s, "R7: %08X", rsp->r[7]); break;
+ case CPUINFO_STR_REGISTER + RSP_R8: sprintf(info->s, "R8: %08X", rsp->r[8]); break;
+ case CPUINFO_STR_REGISTER + RSP_R9: sprintf(info->s, "R9: %08X", rsp->r[9]); break;
+ case CPUINFO_STR_REGISTER + RSP_R10: sprintf(info->s, "R10: %08X", rsp->r[10]); break;
+ case CPUINFO_STR_REGISTER + RSP_R11: sprintf(info->s, "R11: %08X", rsp->r[11]); break;
+ case CPUINFO_STR_REGISTER + RSP_R12: sprintf(info->s, "R12: %08X", rsp->r[12]); break;
+ case CPUINFO_STR_REGISTER + RSP_R13: sprintf(info->s, "R13: %08X", rsp->r[13]); break;
+ case CPUINFO_STR_REGISTER + RSP_R14: sprintf(info->s, "R14: %08X", rsp->r[14]); break;
+ case CPUINFO_STR_REGISTER + RSP_R15: sprintf(info->s, "R15: %08X", rsp->r[15]); break;
+ case CPUINFO_STR_REGISTER + RSP_R16: sprintf(info->s, "R16: %08X", rsp->r[16]); break;
+ case CPUINFO_STR_REGISTER + RSP_R17: sprintf(info->s, "R17: %08X", rsp->r[17]); break;
+ case CPUINFO_STR_REGISTER + RSP_R18: sprintf(info->s, "R18: %08X", rsp->r[18]); break;
+ case CPUINFO_STR_REGISTER + RSP_R19: sprintf(info->s, "R19: %08X", rsp->r[19]); break;
+ case CPUINFO_STR_REGISTER + RSP_R20: sprintf(info->s, "R20: %08X", rsp->r[20]); break;
+ case CPUINFO_STR_REGISTER + RSP_R21: sprintf(info->s, "R21: %08X", rsp->r[21]); break;
+ case CPUINFO_STR_REGISTER + RSP_R22: sprintf(info->s, "R22: %08X", rsp->r[22]); break;
+ case CPUINFO_STR_REGISTER + RSP_R23: sprintf(info->s, "R23: %08X", rsp->r[23]); break;
+ case CPUINFO_STR_REGISTER + RSP_R24: sprintf(info->s, "R24: %08X", rsp->r[24]); break;
+ case CPUINFO_STR_REGISTER + RSP_R25: sprintf(info->s, "R25: %08X", rsp->r[25]); break;
+ case CPUINFO_STR_REGISTER + RSP_R26: sprintf(info->s, "R26: %08X", rsp->r[26]); break;
+ case CPUINFO_STR_REGISTER + RSP_R27: sprintf(info->s, "R27: %08X", rsp->r[27]); break;
+ case CPUINFO_STR_REGISTER + RSP_R28: sprintf(info->s, "R28: %08X", rsp->r[28]); break;
+ case CPUINFO_STR_REGISTER + RSP_R29: sprintf(info->s, "R29: %08X", rsp->r[29]); break;
+ case CPUINFO_STR_REGISTER + RSP_R30: sprintf(info->s, "R30: %08X", rsp->r[30]); break;
+ case CPUINFO_STR_REGISTER + RSP_R31: sprintf(info->s, "R31: %08X", rsp->r[31]); break;
case CPUINFO_STR_REGISTER + RSP_SR: sprintf(info->s, "SR: %08X", rsp->sr); break;
case CPUINFO_STR_REGISTER + RSP_NEXTPC: sprintf(info->s, "NPC: %08X", rsp->nextpc);break;
case CPUINFO_STR_REGISTER + RSP_STEPCNT: sprintf(info->s, "STEP: %d", rsp->step_count); break;
diff --git a/src/emu/cpu/rsp/rspfe.c b/src/emu/cpu/rsp/rspfe.c
index ce2e062910f..d5231e7968d 100644
--- a/src/emu/cpu/rsp/rspfe.c
+++ b/src/emu/cpu/rsp/rspfe.c
@@ -24,7 +24,7 @@
rsp_frontend::rsp_frontend(rsp_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
: drc_frontend(*state.device, window_start, window_end, max_sequence),
- m_context(state)
+ m_context(state)
{
}
@@ -49,33 +49,33 @@ bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
opswitch = op >> 26;
switch (opswitch)
{
- case 0x00: // SPECIAL
+ case 0x00: // SPECIAL
return describe_special(op, desc);
- case 0x01: // REGIMM
+ case 0x01: // REGIMM
return describe_regimm(op, desc);
- case 0x10: // COP0
+ case 0x10: // COP0
return describe_cop0(op, desc);
- case 0x12: // COP2
+ case 0x12: // COP2
return describe_cop2(op, desc);
- case 0x02: // J
+ case 0x02: // J
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = ((LIMMVAL << 2) & 0x00000fff) | 0x1000;
desc.delayslots = 1;
return true;
- case 0x03: // JAL
+ case 0x03: // JAL
desc.regout[0] |= REGFLAG_R(31);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = ((LIMMVAL << 2) & 0x00000fff) | 0x1000;
desc.delayslots = 1;
return true;
- case 0x04: // BEQ
- case 0x05: // BNE
+ case 0x04: // BEQ
+ case 0x05: // BNE
if ((opswitch == 0x04 || opswitch == 0x14) && RSREG == RTREG)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -88,8 +88,8 @@ bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.skipslots = (opswitch & 0x10) ? 1 : 0;
return true;
- case 0x06: // BLEZ
- case 0x07: // BGTZ
+ case 0x06: // BLEZ
+ case 0x07: // BGTZ
if ((opswitch == 0x06 || opswitch == 0x16) && RSREG == 0)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -102,49 +102,49 @@ bool rsp_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.skipslots = (opswitch & 0x10) ? 1 : 0;
return true;
- case 0x08: // ADDI
+ case 0x08: // ADDI
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x09: // ADDIU
- case 0x0a: // SLTI
- case 0x0b: // SLTIU
- case 0x0c: // ANDI
- case 0x0d: // ORI
- case 0x0e: // XORI
+ case 0x09: // ADDIU
+ case 0x0a: // SLTI
+ case 0x0b: // SLTIU
+ case 0x0c: // ANDI
+ case 0x0d: // ORI
+ case 0x0e: // XORI
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x0f: // LUI
+ case 0x0f: // LUI
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x20: // LB
- case 0x21: // LH
- case 0x23: // LW
- case 0x24: // LBU
- case 0x25: // LHU
- case 0x27: // LWU
+ case 0x20: // LB
+ case 0x21: // LH
+ case 0x23: // LW
+ case 0x24: // LBU
+ case 0x25: // LHU
+ case 0x27: // LWU
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RTREG);
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x28: // SB
- case 0x29: // SH
- case 0x2b: // SW
+ case 0x28: // SB
+ case 0x29: // SH
+ case 0x2b: // SW
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
- case 0x32: // LWC2
+ case 0x32: // LWC2
desc.regin[0] |= REGFLAG_R(RSREG);
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 0x3a: // SWC2
+ case 0x3a: // SWC2
desc.regin[0] |= REGFLAG_R(RSREG);
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
@@ -163,42 +163,42 @@ bool rsp_frontend::describe_special(UINT32 op, opcode_desc &desc)
{
switch (op & 63)
{
- case 0x00: // SLL
- case 0x02: // SRL
- case 0x03: // SRA
+ case 0x00: // SLL
+ case 0x02: // SRL
+ case 0x03: // SRA
desc.regin[0] |= REGFLAG_R(RTREG);
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x04: // SLLV
- case 0x06: // SRLV
- case 0x07: // SRAV
- case 0x21: // ADDU
- case 0x23: // SUBU
- case 0x24: // AND
- case 0x25: // OR
- case 0x26: // XOR
- case 0x27: // NOR
- case 0x2a: // SLT
- case 0x2b: // SLTU
+ case 0x04: // SLLV
+ case 0x06: // SRLV
+ case 0x07: // SRAV
+ case 0x21: // ADDU
+ case 0x23: // SUBU
+ case 0x24: // AND
+ case 0x25: // OR
+ case 0x26: // XOR
+ case 0x27: // NOR
+ case 0x2a: // SLT
+ case 0x2b: // SLTU
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x20: // ADD
- case 0x22: // SUB
+ case 0x20: // ADD
+ case 0x22: // SUB
desc.regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
desc.regout[0] |= REGFLAG_R(RDREG);
return true;
- case 0x08: // JR
+ case 0x08: // JR
desc.regin[0] |= REGFLAG_R(RSREG);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.delayslots = 1;
return true;
- case 0x09: // JALR
+ case 0x09: // JALR
desc.regin[0] |= REGFLAG_R(RSREG);
desc.regout[0] |= REGFLAG_R(RDREG);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
@@ -206,7 +206,7 @@ bool rsp_frontend::describe_special(UINT32 op, opcode_desc &desc)
desc.delayslots = 1;
return true;
- case 0x0d: // BREAK
+ case 0x0d: // BREAK
desc.flags |= OPFLAG_END_SEQUENCE;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
return true;
@@ -225,8 +225,8 @@ bool rsp_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
{
switch (RTREG)
{
- case 0x00: // BLTZ
- case 0x01: // BGEZ
+ case 0x00: // BLTZ
+ case 0x01: // BGEZ
if (RTREG == 0x01 && RSREG == 0)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -239,8 +239,8 @@ bool rsp_frontend::describe_regimm(UINT32 op, opcode_desc &desc)
desc.skipslots = (RTREG & 0x02) ? 1 : 0;
return true;
- case 0x10: // BLTZAL
- case 0x11: // BGEZAL
+ case 0x10: // BLTZAL
+ case 0x11: // BGEZAL
if (RTREG == 0x11 && RSREG == 0)
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
else
@@ -268,11 +268,11 @@ bool rsp_frontend::describe_cop0(UINT32 op, opcode_desc &desc)
{
switch (RSREG)
{
- case 0x00: // MFCz
+ case 0x00: // MFCz
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x04: // MTCz
+ case 0x04: // MTCz
desc.regin[0] |= REGFLAG_R(RTREG);
if(RDREG == 2) // SP_RD_LEN, initiating DMA
{
@@ -293,13 +293,13 @@ bool rsp_frontend::describe_cop2(UINT32 op, opcode_desc &desc)
{
switch (RSREG)
{
- case 0x00: // MFCz
- case 0x02: // CFCz
+ case 0x00: // MFCz
+ case 0x02: // CFCz
desc.regout[0] |= REGFLAG_R(RTREG);
return true;
- case 0x04: // MTCz
- case 0x06: // CTCz
+ case 0x04: // MTCz
+ case 0x06: // CTCz
desc.regin[0] |= REGFLAG_R(RTREG);
return true;
}
diff --git a/src/emu/cpu/rsp/rspfe.h b/src/emu/cpu/rsp/rspfe.h
index b032c306b2b..d0cd30be5b9 100644
--- a/src/emu/cpu/rsp/rspfe.h
+++ b/src/emu/cpu/rsp/rspfe.h
@@ -24,7 +24,7 @@
//**************************************************************************
// register flags 0
-#define REGFLAG_R(n) (((n) == 0) ? 0 : (1 << (n)))
+#define REGFLAG_R(n) (((n) == 0) ? 0 : (1 << (n)))
diff --git a/src/emu/cpu/s2650/2650dasm.c b/src/emu/cpu/s2650/2650dasm.c
index 1841ca2eba5..cd6d2dac053 100644
--- a/src/emu/cpu/s2650/2650dasm.c
+++ b/src/emu/cpu/s2650/2650dasm.c
@@ -12,7 +12,7 @@
static const UINT8 *rambase;
static offs_t pcbase;
-#define readarg(A) (rambase[(A) - pcbase])
+#define readarg(A) (rambase[(A) - pcbase])
/* Set this to 1 to disassemble using Z80 style mnemonics */
#define HJB 0
@@ -22,18 +22,18 @@ static offs_t pcbase;
/* handy table to build relative offsets from HR (holding register) */
static const int rel[0x100] = {
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
-48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
-32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
-16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
-48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
-32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
@@ -48,10 +48,10 @@ static char *SYM(int addr)
static char buff[8+1];
char * s = NULL;
- if (find_symbol) s = (*find_symbol)(addr);
+ if (find_symbol) s = (*find_symbol)(addr);
if (s) return s;
- sprintf(buff, "$%04x", addr);
+ sprintf(buff, "$%04x", addr);
return buff;
}
@@ -60,7 +60,7 @@ static char *IMM(int pc)
{
static char buff[32];
- sprintf(buff, "$%02x", readarg(pc));
+ sprintf(buff, "$%02x", readarg(pc));
return buff;
}
@@ -74,8 +74,8 @@ static char *IMM_PSL(int pc)
char *p = buff;
int v = readarg(pc);
- if (v == 0xff) {
- p += sprintf(p, "all");
+ if (v == 0xff) {
+ p += sprintf(p, "all");
} else {
switch (v & 0xc0)
{
@@ -83,17 +83,17 @@ static char *IMM_PSL(int pc)
case 0x80: p += sprintf(p, "m+"); break;
case 0xc0: p += sprintf(p, "cc+"); break;
}
- if (v & 0x20) /* inter digit carry */
+ if (v & 0x20) /* inter digit carry */
p += sprintf(p, "idc+");
- if (v & 0x10) /* register select */
+ if (v & 0x10) /* register select */
p += sprintf(p, "rs+");
- if (v & 0x08) /* with carry */
+ if (v & 0x08) /* with carry */
p += sprintf(p, "wc+");
- if (v & 0x04) /* overflow */
+ if (v & 0x04) /* overflow */
p += sprintf(p, "ovf+");
- if (v & 0x02) /* 2's complement comparisons */
+ if (v & 0x02) /* 2's complement comparisons */
p += sprintf(p, "com+");
- if (v & 0x01) /* carry */
+ if (v & 0x01) /* carry */
p += sprintf(p, "c+");
if (p > buff)
*--p = '\0';
@@ -110,25 +110,25 @@ static char *IMM_PSU(int pc)
if (v == 0xff) {
- p += sprintf(p, "all");
+ p += sprintf(p, "all");
- } else {
+ } else {
- if (v & 0x80) /* sense input */
+ if (v & 0x80) /* sense input */
p += sprintf(p, "si+");
- if (v & 0x40) /* flag output */
+ if (v & 0x40) /* flag output */
p += sprintf(p, "fo+");
- if (v & 0x20) /* interrupt inhibit */
+ if (v & 0x20) /* interrupt inhibit */
p += sprintf(p, "ii+");
- if (v & 0x10) /* unused bit 4 */
+ if (v & 0x10) /* unused bit 4 */
p += sprintf(p, "4+");
- if (v & 0x08) /* unused bit 3 */
+ if (v & 0x08) /* unused bit 3 */
p += sprintf(p, "3+");
- if (v & 0x04) /* stack pointer bit 2 */
+ if (v & 0x04) /* stack pointer bit 2 */
p += sprintf(p, "sp2+");
- if (v & 0x02) /* stack pointer bit 1 */
+ if (v & 0x02) /* stack pointer bit 1 */
p += sprintf(p, "sp1+");
- if (v & 0x01) /* stack pointer bit 0 */
+ if (v & 0x01) /* stack pointer bit 0 */
p += sprintf(p, "sp0+");
if (p > buff)
*--p = '\0';
@@ -189,10 +189,10 @@ static char *ABS(int load, int r, int pc)
case 5: sprintf(buff, "*(%s,r%d++),r0", SYM(a), r); break;
case 6: sprintf(buff, "*(%s,r%d--),r0", SYM(a), r); break;
case 7: sprintf(buff, "*(%s,r%d),r0", SYM(a), r); break;
- }
- }
+ }
+ }
#else
- switch (h >> 5) {
+ switch (h >> 5) {
case 0: sprintf(buff, "%d %s", r, SYM(a)); break;
case 1: sprintf(buff, "0 %s,r%d+", SYM(a), r); break;
case 2: sprintf(buff, "0 %s,r%d-", SYM(a), r); break;
@@ -203,7 +203,7 @@ static char *ABS(int load, int r, int pc)
case 7: sprintf(buff, "0 *%s,r%d", SYM(a), r); break;
}
#endif
- return buff;
+ return buff;
}
/* format an (branch) absolute address */
@@ -231,7 +231,7 @@ CPU_DISASSEMBLE( s2650 )
rambase = opram;
pcbase = PC;
- pc += 1;
+ pc += 1;
switch (op)
{
case 0x00: case 0x01: case 0x02: case 0x03:
@@ -240,22 +240,22 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "lodz,%d", rv);
#endif
- break;
+ break;
case 0x04: case 0x05: case 0x06: case 0x07:
#if HJB
sprintf(buffer, "ld r%d,%s", rv, IMM(pc));
#else
sprintf(buffer, "lodi,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x08: case 0x09: case 0x0a: case 0x0b:
#if HJB
sprintf(buffer, "ld r%d,(%s)", rv, REL(pc));
#else
- sprintf(buffer, "lodr,%d %s", rv, REL(pc));
+ sprintf(buffer, "lodr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x0c: case 0x0d: case 0x0e: case 0x0f:
#if HJB
@@ -263,7 +263,7 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "loda,%s", ABS(1,rv,pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x10: case 0x11:
#if HJB
@@ -276,27 +276,27 @@ CPU_DISASSEMBLE( s2650 )
#if HJB
sprintf(buffer, "ld psu,r0");
#else
- sprintf(buffer, "spsu");
+ sprintf(buffer, "spsu");
#endif
- break;
+ break;
case 0x13:
#if HJB
sprintf(buffer, "ld psl,r0");
#else
- sprintf(buffer, "spsl");
+ sprintf(buffer, "spsl");
#endif
- break;
+ break;
case 0x14: case 0x15: case 0x16: case 0x17:
#if HJB
if (rv == 3)
sprintf(buffer, "ret");
- else
+ else
sprintf(buffer, "ret %c", cc[rv]);
#else
- sprintf(buffer, "retc %c", cc[rv]);
+ sprintf(buffer, "retc %c", cc[rv]);
#endif
- flags = DASMFLAG_STEP_OUT;
- break;
+ flags = DASMFLAG_STEP_OUT;
+ break;
case 0x18: case 0x19: case 0x1a: case 0x1b:
#if HJB
if (rv == 3)
@@ -304,9 +304,9 @@ CPU_DISASSEMBLE( s2650 )
else
sprintf(buffer, "jr %c,%s", cc[rv], REL(pc));
#else
- sprintf(buffer, "bctr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bctr,%c %s", cc[rv], REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x1c: case 0x1d: case 0x1e: case 0x1f:
#if HJB
@@ -315,32 +315,32 @@ CPU_DISASSEMBLE( s2650 )
else
sprintf(buffer, "jp %c,%s", cc[rv], ADR(pc));
#else
- sprintf(buffer, "bcta,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bcta,%c %s", cc[rv], ADR(pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x20: case 0x21: case 0x22: case 0x23:
#if HJB
sprintf(buffer, "xor r0,r%d", rv);
#else
- sprintf(buffer, "eorz,%d", rv);
+ sprintf(buffer, "eorz,%d", rv);
#endif
- break;
+ break;
case 0x24: case 0x25: case 0x26: case 0x27:
#if HJB
sprintf(buffer, "xor r%d,%s", rv, IMM(pc));
#else
- sprintf(buffer, "eori,%d %s", rv, IMM(pc));
+ sprintf(buffer, "eori,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x28: case 0x29: case 0x2a: case 0x2b:
#if HJB
sprintf(buffer, "xor r%d,(%s)", rv, REL(pc));
#else
- sprintf(buffer, "eorr,%d %s", rv, REL(pc));
+ sprintf(buffer, "eorr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x2c: case 0x2d: case 0x2e: case 0x2f:
#if HJB
@@ -348,26 +348,26 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "eora,%s", ABS(1,rv,pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x30: case 0x31: case 0x32: case 0x33:
#if HJB
sprintf(buffer, "in r%d,(ctrl)", rv);
#else
- sprintf(buffer, "redc,%d", rv);
+ sprintf(buffer, "redc,%d", rv);
#endif
- break;
+ break;
case 0x34: case 0x35: case 0x36: case 0x37:
#if HJB
if (rv == 3)
sprintf(buffer, "iret");
- else
+ else
sprintf(buffer, "iret %c", cc[rv]);
#else
- sprintf(buffer, "rete %c", cc[rv]);
+ sprintf(buffer, "rete %c", cc[rv]);
#endif
- flags = DASMFLAG_STEP_OUT;
- break;
+ flags = DASMFLAG_STEP_OUT;
+ break;
case 0x38: case 0x39: case 0x3a: case 0x3b:
#if HJB
if (rv == 3)
@@ -375,10 +375,10 @@ CPU_DISASSEMBLE( s2650 )
else
sprintf(buffer, "calr %c,%s", cc[rv], REL(pc));
#else
- sprintf(buffer, "bstr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bstr,%c %s", cc[rv], REL(pc));
#endif
- pc+=1;
- flags = DASMFLAG_STEP_OVER;
+ pc+=1;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0x3c: case 0x3d: case 0x3e: case 0x3f:
#if HJB
@@ -387,10 +387,10 @@ CPU_DISASSEMBLE( s2650 )
else
sprintf(buffer, "call %c,%s", cc[rv], ADR(pc));
#else
- sprintf(buffer, "bsta,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bsta,%c %s", cc[rv], ADR(pc));
#endif
- pc+=2;
- flags = DASMFLAG_STEP_OVER;
+ pc+=2;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0x40:
sprintf(buffer, "halt");
@@ -399,24 +399,24 @@ CPU_DISASSEMBLE( s2650 )
#if HJB
sprintf(buffer, "and r0,r%d", rv);
#else
- sprintf(buffer, "andz,%d", rv);
+ sprintf(buffer, "andz,%d", rv);
#endif
- break;
+ break;
case 0x44: case 0x45: case 0x46: case 0x47:
#if HJB
sprintf(buffer, "and r%d,%s", rv, IMM(pc));
#else
- sprintf(buffer, "andi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "andi,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x48: case 0x49: case 0x4a: case 0x4b:
#if HJB
sprintf(buffer, "and r%d,(%s)", rv, REL(pc));
#else
- sprintf(buffer, "andr,%d %s", rv, REL(pc));
+ sprintf(buffer, "andr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x4c: case 0x4d: case 0x4e: case 0x4f:
#if HJB
@@ -424,61 +424,61 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "anda,%s", ABS(1,rv,pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x50: case 0x51: case 0x52: case 0x53:
#if HJB
sprintf(buffer, "ror r%d", rv);
#else
- sprintf(buffer, "rrr,%d", rv);
+ sprintf(buffer, "rrr,%d", rv);
#endif
- break;
+ break;
case 0x54: case 0x55: case 0x56: case 0x57:
#if HJB
sprintf(buffer, "in r%d,(%s)", rv, IMM(pc));
#else
- sprintf(buffer, "rede,%d %s", rv, IMM(pc));
+ sprintf(buffer, "rede,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x58: case 0x59: case 0x5a: case 0x5b:
#if HJB
sprintf(buffer, "jrnz r%d,%s", rv, REL(pc));
#else
- sprintf(buffer, "brnr,%d %s", rv, REL(pc));
+ sprintf(buffer, "brnr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x5c: case 0x5d: case 0x5e: case 0x5f:
#if HJB
sprintf(buffer, "jpnz r%d,%s", rv, ADR(pc));
#else
- sprintf(buffer, "brna,%d %s", rv, ADR(pc));
+ sprintf(buffer, "brna,%d %s", rv, ADR(pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x60: case 0x61: case 0x62: case 0x63:
#if HJB
sprintf(buffer, "or r0,r%d", rv);
#else
- sprintf(buffer, "iorz,%d", rv);
+ sprintf(buffer, "iorz,%d", rv);
#endif
- break;
+ break;
case 0x64: case 0x65: case 0x66: case 0x67:
#if HJB
sprintf(buffer, "or r%d,%s", rv, IMM(pc));
#else
- sprintf(buffer, "iori,%d %s", rv, IMM(pc));
+ sprintf(buffer, "iori,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x68: case 0x69: case 0x6a: case 0x6b:
#if HJB
sprintf(buffer, "or r%d,(%s)", rv, REL(pc));
#else
- sprintf(buffer, "iorr,%d %s", rv, REL(pc));
+ sprintf(buffer, "iorr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x6c: case 0x6d: case 0x6e: case 0x6f:
#if HJB
@@ -486,87 +486,87 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "iora,%s", ABS(1,rv,pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x70: case 0x71: case 0x72: case 0x73:
#if HJB
sprintf(buffer, "in r%d,(data)", rv);
#else
- sprintf(buffer, "redd,%d", rv);
+ sprintf(buffer, "redd,%d", rv);
#endif
- break;
+ break;
case 0x74:
#if HJB
sprintf(buffer, "res psu,%s", IMM_PSU(pc));
#else
- sprintf(buffer, "cpsu %s", IMM_PSU(pc));
+ sprintf(buffer, "cpsu %s", IMM_PSU(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x75:
#if HJB
sprintf(buffer, "res psl,%s", IMM_PSL(pc));
#else
- sprintf(buffer, "cpsl %s", IMM_PSL(pc));
+ sprintf(buffer, "cpsl %s", IMM_PSL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x76:
#if HJB
sprintf(buffer, "set psu,%s", IMM_PSU(pc));
#else
- sprintf(buffer, "ppsu %s", IMM_PSU(pc));
+ sprintf(buffer, "ppsu %s", IMM_PSU(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x77:
#if HJB
sprintf(buffer, "set psl,%s", IMM_PSL(pc));
#else
- sprintf(buffer, "ppsl %s", IMM_PSL(pc));
+ sprintf(buffer, "ppsl %s", IMM_PSL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x78: case 0x79: case 0x7a: case 0x7b:
#if HJB
sprintf(buffer, "call r%d-nz,%s", rv, REL(pc));
#else
- sprintf(buffer, "bsnr,%d %s", rv, REL(pc));
+ sprintf(buffer, "bsnr,%d %s", rv, REL(pc));
#endif
- pc+=1;
- flags = DASMFLAG_STEP_OVER;
+ pc+=1;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
#if HJB
sprintf(buffer, "call r%d-nz,%s", rv, ADR(pc));
#else
- sprintf(buffer, "bsna,%d %s", rv, ADR(pc));
+ sprintf(buffer, "bsna,%d %s", rv, ADR(pc));
#endif
- pc+=2;
- flags = DASMFLAG_STEP_OVER;
+ pc+=2;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0x80: case 0x81: case 0x82: case 0x83:
#if HJB
sprintf(buffer, "add r0,r%d", rv);
#else
- sprintf(buffer, "addz,%d", rv);
+ sprintf(buffer, "addz,%d", rv);
#endif
- break;
+ break;
case 0x84: case 0x85: case 0x86: case 0x87:
#if HJB
sprintf(buffer, "add r%d,%s", rv, IMM(pc));
#else
- sprintf(buffer, "addi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "addi,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x88: case 0x89: case 0x8a: case 0x8b:
#if HJB
sprintf(buffer, "add r%d,(%s)", rv, REL(pc));
#else
- sprintf(buffer, "addr,%d %s", rv, REL(pc));
+ sprintf(buffer, "addr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x8c: case 0x8d: case 0x8e: case 0x8f:
#if HJB
@@ -574,7 +574,7 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "adda,%s", ABS(1,rv,pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x90: case 0x91:
#if HJB
@@ -587,30 +587,30 @@ CPU_DISASSEMBLE( s2650 )
#if HJB
sprintf(buffer, "ld r0,psu");
#else
- sprintf(buffer, "lpsu");
+ sprintf(buffer, "lpsu");
#endif
- break;
+ break;
case 0x93:
#if HJB
sprintf(buffer, "ld r0,psl");
#else
- sprintf(buffer, "lpsl");
+ sprintf(buffer, "lpsl");
#endif
- break;
+ break;
case 0x94: case 0x95: case 0x96: case 0x97:
#if HJB
sprintf(buffer, "daa r%d", rv);
#else
- sprintf(buffer, "dar,%d", rv);
+ sprintf(buffer, "dar,%d", rv);
#endif
- break;
+ break;
case 0x98: case 0x99: case 0x9a:
#if HJB
sprintf(buffer, "jr n%c,%s", cc[rv], REL(pc));
#else
- sprintf(buffer, "bcfr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bcfr,%c %s", cc[rv], REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x9b:
#if HJB
@@ -618,46 +618,46 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "zbrr %s", REL0(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0x9c: case 0x9d: case 0x9e:
#if HJB
sprintf(buffer, "jp n%c,%s", cc[rv], ADR(pc));
#else
- sprintf(buffer, "bcfa,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bcfa,%c %s", cc[rv], ADR(pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0x9f:
#if HJB
sprintf(buffer, "jp %s+r3", ADR(pc));
#else
- sprintf(buffer, "bxa %s", ADR(pc));
+ sprintf(buffer, "bxa %s", ADR(pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0xa0: case 0xa1: case 0xa2: case 0xa3:
#if HJB
sprintf(buffer, "sub r0,r%d", rv);
#else
- sprintf(buffer, "subz,%d", rv);
+ sprintf(buffer, "subz,%d", rv);
#endif
- break;
+ break;
case 0xa4: case 0xa5: case 0xa6: case 0xa7:
#if HJB
sprintf(buffer, "sub r%d,%s", rv, IMM(pc));
#else
- sprintf(buffer, "subi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "subi,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xa8: case 0xa9: case 0xaa: case 0xab:
#if HJB
sprintf(buffer, "sub r%d,(%s)", rv, REL(pc));
#else
- sprintf(buffer, "subr,%d %s", rv, REL(pc));
+ sprintf(buffer, "subr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xac: case 0xad: case 0xae: case 0xaf:
#if HJB
@@ -665,30 +665,30 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "suba,%s", ABS(1,rv,pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
#if HJB
sprintf(buffer, "out (ctrl),r%d", rv);
#else
- sprintf(buffer, "wrtc,%d", rv);
+ sprintf(buffer, "wrtc,%d", rv);
#endif
- break;
+ break;
case 0xb4:
#if HJB
sprintf(buffer, "bit psu,%s", IMM_PSU(pc));
#else
- sprintf(buffer, "tpsu %s", IMM_PSU(pc));
+ sprintf(buffer, "tpsu %s", IMM_PSU(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xb5:
#if HJB
sprintf(buffer, "bit psl,%s", IMM_PSL(pc));
#else
- sprintf(buffer, "tpsl %s", IMM_PSL(pc));
+ sprintf(buffer, "tpsl %s", IMM_PSL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xb6: case 0xb7:
#if HJB
@@ -701,37 +701,37 @@ CPU_DISASSEMBLE( s2650 )
#if HJB
sprintf(buffer, "calr n%c,%s", cc[rv], REL(pc));
#else
- sprintf(buffer, "bsfr,%c %s", cc[rv], REL(pc));
+ sprintf(buffer, "bsfr,%c %s", cc[rv], REL(pc));
#endif
- pc+=1;
- flags = DASMFLAG_STEP_OVER;
+ pc+=1;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0xbb:
#if HJB
sprintf(buffer, "cal0 %s", REL0(pc));
#else
- sprintf(buffer, "zbsr %s", REL0(pc));
+ sprintf(buffer, "zbsr %s", REL0(pc));
#endif
- pc+=1;
- flags = DASMFLAG_STEP_OVER;
+ pc+=1;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0xbc: case 0xbd: case 0xbe:
#if HJB
sprintf(buffer, "call n%c,%s", cc[rv], ADR(pc));
#else
- sprintf(buffer, "bsfa,%c %s", cc[rv], ADR(pc));
+ sprintf(buffer, "bsfa,%c %s", cc[rv], ADR(pc));
#endif
- pc+=2;
- flags = DASMFLAG_STEP_OVER;
+ pc+=2;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0xbf:
#if HJB
sprintf(buffer, "call %s+r3", ADR(pc));
#else
- sprintf(buffer, "bsxa %s", ADR(pc));
+ sprintf(buffer, "bsxa %s", ADR(pc));
#endif
- pc+=2;
- flags = DASMFLAG_STEP_OVER;
+ pc+=2;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0xc0:
sprintf(buffer, "nop");
@@ -740,9 +740,9 @@ CPU_DISASSEMBLE( s2650 )
#if HJB
sprintf(buffer, "ld r%d,r0", rv);
#else
- sprintf(buffer, "strz,%d", rv);
+ sprintf(buffer, "strz,%d", rv);
#endif
- break;
+ break;
case 0xc4: case 0xc5: case 0xc6: case 0xc7:
#if HJB
sprintf(buffer, "**** $%02X",op);
@@ -754,9 +754,9 @@ CPU_DISASSEMBLE( s2650 )
#if HJB
sprintf(buffer, "ld (%s),r%d", REL(pc), rv);
#else
- sprintf(buffer, "strr,%d %s", rv, REL(pc));
+ sprintf(buffer, "strr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xcc: case 0xcd: case 0xce: case 0xcf:
#if HJB
@@ -770,57 +770,57 @@ CPU_DISASSEMBLE( s2650 )
#if HJB
sprintf(buffer, "rol r%d", rv);
#else
- sprintf(buffer, "rrl,%d", rv);
+ sprintf(buffer, "rrl,%d", rv);
#endif
- break;
+ break;
case 0xd4: case 0xd5: case 0xd6: case 0xd7:
#if HJB
sprintf(buffer, "out (%s),r%d", IMM(pc), rv);
#else
- sprintf(buffer, "wrte,%d %s", rv, IMM(pc));
+ sprintf(buffer, "wrte,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xd8: case 0xd9: case 0xda: case 0xdb:
#if HJB
sprintf(buffer, "ijnz r%d,%s", rv, REL(pc));
#else
- sprintf(buffer, "birr,%d %s", rv, REL(pc));
+ sprintf(buffer, "birr,%d %s", rv, REL(pc));
#endif
- pc+=1;
- flags = DASMFLAG_STEP_OVER;
+ pc+=1;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0xdc: case 0xdd: case 0xde: case 0xdf:
#if HJB
sprintf(buffer, "ijnz r%d,%s", rv, ADR(pc));
#else
- sprintf(buffer, "bira,%d %s", rv, ADR(pc));
+ sprintf(buffer, "bira,%d %s", rv, ADR(pc));
#endif
- pc+=2;
- flags = DASMFLAG_STEP_OVER;
+ pc+=2;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0xe0: case 0xe1: case 0xe2: case 0xe3:
#if HJB
sprintf(buffer, "cp r0,%d", rv);
#else
- sprintf(buffer, "comz,%d", rv);
+ sprintf(buffer, "comz,%d", rv);
#endif
- break;
+ break;
case 0xe4: case 0xe5: case 0xe6: case 0xe7:
#if HJB
sprintf(buffer, "cp r%d,%s", rv, IMM(pc));
#else
- sprintf(buffer, "comi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "comi,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xe8: case 0xe9: case 0xea: case 0xeb:
#if HJB
sprintf(buffer, "cp r%d,(%s)", rv, REL(pc));
#else
- sprintf(buffer, "comr,%d %s", rv, REL(pc));
+ sprintf(buffer, "comr,%d %s", rv, REL(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xec: case 0xed: case 0xee: case 0xef:
#if HJB
@@ -828,40 +828,40 @@ CPU_DISASSEMBLE( s2650 )
#else
sprintf(buffer, "coma,%s", ABS(1,rv,pc));
#endif
- pc+=2;
+ pc+=2;
break;
case 0xf0: case 0xf1: case 0xf2: case 0xf3:
#if HJB
sprintf(buffer, "out (data),r%d", rv);
#else
- sprintf(buffer, "wrtd,%d", rv);
+ sprintf(buffer, "wrtd,%d", rv);
#endif
- break;
+ break;
case 0xf4: case 0xf5: case 0xf6: case 0xf7:
#if HJB
sprintf(buffer, "test r%d,%s", rv, IMM(pc));
#else
- sprintf(buffer, "tmi,%d %s", rv, IMM(pc));
+ sprintf(buffer, "tmi,%d %s", rv, IMM(pc));
#endif
- pc+=1;
+ pc+=1;
break;
case 0xf8: case 0xf9: case 0xfa: case 0xfb:
#if HJB
sprintf(buffer, "djnz r%d,%s", rv, REL(pc));
#else
- sprintf(buffer, "bdrr,%d %s", rv, REL(pc));
+ sprintf(buffer, "bdrr,%d %s", rv, REL(pc));
#endif
- pc+=1;
- flags = DASMFLAG_STEP_OVER;
+ pc+=1;
+ flags = DASMFLAG_STEP_OVER;
break;
case 0xfc: case 0xfd: case 0xfe: case 0xff:
#if HJB
sprintf(buffer, "djnz r%d,%s", rv, ADR(pc));
#else
- sprintf(buffer, "bdra,%d %s", rv, ADR(pc));
+ sprintf(buffer, "bdra,%d %s", rv, ADR(pc));
#endif
- pc+=2;
- flags = DASMFLAG_STEP_OVER;
+ pc+=2;
+ flags = DASMFLAG_STEP_OVER;
break;
}
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/s2650/s2650.c b/src/emu/cpu/s2650/s2650.c
index 0e4d9bec2f5..189aab4974d 100644
--- a/src/emu/cpu/s2650/s2650.c
+++ b/src/emu/cpu/s2650/s2650.c
@@ -23,23 +23,23 @@
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* define this to expand all EA calculations inline */
-#define INLINE_EA 1
+#define INLINE_EA 1
struct s2650_regs {
- UINT16 ppc; /* previous program counter (page + iar) */
- UINT16 page; /* 8K page select register (A14..A13) */
- UINT16 iar; /* instruction address register (A12..A0) */
- UINT16 ea; /* effective address (A14..A0) */
- UINT8 psl; /* processor status lower */
- UINT8 psu; /* processor status upper */
- UINT8 r; /* absolute addressing dst/src register */
- UINT8 reg[7]; /* 7 general purpose registers */
- UINT8 halt; /* 1 if cpu is halted */
- UINT8 ir; /* instruction register */
- UINT16 ras[8]; /* 8 return address stack entries */
- UINT8 irq_state;
-
- int icount;
+ UINT16 ppc; /* previous program counter (page + iar) */
+ UINT16 page; /* 8K page select register (A14..A13) */
+ UINT16 iar; /* instruction address register (A12..A0) */
+ UINT16 ea; /* effective address (A14..A0) */
+ UINT8 psl; /* processor status lower */
+ UINT8 psu; /* processor status upper */
+ UINT8 r; /* absolute addressing dst/src register */
+ UINT8 reg[7]; /* 7 general purpose registers */
+ UINT8 halt; /* 1 if cpu is halted */
+ UINT8 ir; /* instruction register */
+ UINT16 ras[8]; /* 8 return address stack entries */
+ UINT8 irq_state;
+
+ int icount;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
@@ -128,18 +128,18 @@ static const UINT8 ccc[0x200] = {
***************************************************************/
static const int S2650_relative[0x100] =
{
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
-48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
-32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
-16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
+ 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
+ 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
-64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
-48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
-32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
@@ -159,9 +159,9 @@ INLINE void set_psu(s2650_regs *s2650c, UINT8 new_val)
{
UINT8 old = s2650c->psu;
- s2650c->psu = new_val;
- if ((new_val ^ old) & FO)
- s2650c->io->write_byte(S2650_FO_PORT, (new_val & FO) ? 1 : 0);
+ s2650c->psu = new_val;
+ if ((new_val ^ old) & FO)
+ s2650c->io->write_byte(S2650_FO_PORT, (new_val & FO) ? 1 : 0);
}
INLINE UINT8 get_sp(s2650_regs *s2650c)
@@ -191,7 +191,7 @@ INLINE int check_irq_line(s2650_regs *s2650c)
vector = (*s2650c->irq_callback)(s2650c->device, 0) & 0xff;
/* build effective address within first 8K page */
s2650c->ea = S2650_relative[vector] & PMSK;
- if (vector & 0x80) /* indirect bit set ? */
+ if (vector & 0x80) /* indirect bit set ? */
{
int addr = s2650c->ea;
cycles += 6;
@@ -223,7 +223,7 @@ INLINE int check_irq_line(s2650_regs *s2650c)
* set condition code (zero,plus,minus) and overflow
***************************************************************/
#define SET_CC_OVF(result,value) \
- s2650c->psl = (s2650c->psl & ~(OVF+CC)) | \
+ s2650c->psl = (s2650c->psl & ~(OVF+CC)) | \
ccc[result + (((value) & 0x80) << 1)]
#define SET_CC_OVF_ADD(result,value1,value2) SET_CC_OVF(result,~((value1) ^ (value2)) & ((value1) ^ (result)))
@@ -255,102 +255,102 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* _REL_EA
* build effective address with relative addressing
***************************************************************/
-#define _REL_EA(page) \
-{ \
- UINT8 hr = ARG(s2650c); /* get 'holding register' */ \
- /* build effective address within current 8K page */ \
- s2650c->ea = page + ((s2650c->iar + S2650_relative[hr]) & PMSK); \
- if (hr & 0x80) { /* indirect bit set ? */ \
- int addr = s2650c->ea; \
- s2650c->icount -= 6; \
- /* build indirect 32K address */ \
- s2650c->ea = RDMEM(addr) << 8; \
+#define _REL_EA(page) \
+{ \
+ UINT8 hr = ARG(s2650c); /* get 'holding register' */ \
+ /* build effective address within current 8K page */ \
+ s2650c->ea = page + ((s2650c->iar + S2650_relative[hr]) & PMSK); \
+ if (hr & 0x80) { /* indirect bit set ? */ \
+ int addr = s2650c->ea; \
+ s2650c->icount -= 6; \
+ /* build indirect 32K address */ \
+ s2650c->ea = RDMEM(addr) << 8; \
if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
- s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
- } \
+ s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
+ } \
}
/***************************************************************
* _REL_ZERO
* build effective address with zero relative addressing
***************************************************************/
-#define _REL_ZERO(page) \
-{ \
- UINT8 hr = ARG(s2650c); /* get 'holding register' */ \
- /* build effective address from 0 */ \
- s2650c->ea = (S2650_relative[hr] & PMSK); \
- if (hr & 0x80) { /* indirect bit set ? */ \
- int addr = s2650c->ea; \
- s2650c->icount -= 6; \
- /* build indirect 32K address */ \
- s2650c->ea = RDMEM(addr) << 8; \
+#define _REL_ZERO(page) \
+{ \
+ UINT8 hr = ARG(s2650c); /* get 'holding register' */ \
+ /* build effective address from 0 */ \
+ s2650c->ea = (S2650_relative[hr] & PMSK); \
+ if (hr & 0x80) { /* indirect bit set ? */ \
+ int addr = s2650c->ea; \
+ s2650c->icount -= 6; \
+ /* build indirect 32K address */ \
+ s2650c->ea = RDMEM(addr) << 8; \
if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
- s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
- } \
+ s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
+ } \
}
/***************************************************************
* _ABS_EA
* build effective address with absolute addressing
***************************************************************/
-#define _ABS_EA() \
-{ \
- UINT8 hr, dr; \
- hr = ARG(s2650c); /* get 'holding register' */ \
- dr = ARG(s2650c); /* get 'data bus register' */ \
- /* build effective address within current 8K page */ \
- s2650c->ea = s2650c->page + (((hr << 8) + dr) & PMSK); \
- /* indirect addressing ? */ \
- if (hr & 0x80) { \
- int addr = s2650c->ea; \
- s2650c->icount -= 6; \
- /* build indirect 32K address */ \
- /* build indirect 32K address */ \
- s2650c->ea = RDMEM(addr) << 8; \
+#define _ABS_EA() \
+{ \
+ UINT8 hr, dr; \
+ hr = ARG(s2650c); /* get 'holding register' */ \
+ dr = ARG(s2650c); /* get 'data bus register' */ \
+ /* build effective address within current 8K page */ \
+ s2650c->ea = s2650c->page + (((hr << 8) + dr) & PMSK); \
+ /* indirect addressing ? */ \
+ if (hr & 0x80) { \
+ int addr = s2650c->ea; \
+ s2650c->icount -= 6; \
+ /* build indirect 32K address */ \
+ /* build indirect 32K address */ \
+ s2650c->ea = RDMEM(addr) << 8; \
if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
- s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
- } \
- /* check indexed addressing modes */ \
- switch (hr & 0x60) { \
- case 0x00: /* not indexed */ \
- break; \
- case 0x20: /* auto increment indexed */ \
- s2650c->reg[s2650c->r] += 1; \
- s2650c->ea = (s2650c->ea & PAGE)+((s2650c->ea+s2650c->reg[s2650c->r]) & PMSK); \
- s2650c->r = 0; /* absolute addressing reg is R0 */ \
- break; \
- case 0x40: /* auto decrement indexed */ \
- s2650c->reg[s2650c->r] -= 1; \
- s2650c->ea = (s2650c->ea & PAGE)+((s2650c->ea+s2650c->reg[s2650c->r]) & PMSK); \
- s2650c->r = 0; /* absolute addressing reg is R0 */ \
- break; \
- case 0x60: /* indexed */ \
- s2650c->ea = (s2650c->ea & PAGE)+((s2650c->ea+s2650c->reg[s2650c->r]) & PMSK); \
- s2650c->r = 0; /* absolute addressing reg is R0 */ \
- break; \
- } \
+ s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
+ } \
+ /* check indexed addressing modes */ \
+ switch (hr & 0x60) { \
+ case 0x00: /* not indexed */ \
+ break; \
+ case 0x20: /* auto increment indexed */ \
+ s2650c->reg[s2650c->r] += 1; \
+ s2650c->ea = (s2650c->ea & PAGE)+((s2650c->ea+s2650c->reg[s2650c->r]) & PMSK); \
+ s2650c->r = 0; /* absolute addressing reg is R0 */ \
+ break; \
+ case 0x40: /* auto decrement indexed */ \
+ s2650c->reg[s2650c->r] -= 1; \
+ s2650c->ea = (s2650c->ea & PAGE)+((s2650c->ea+s2650c->reg[s2650c->r]) & PMSK); \
+ s2650c->r = 0; /* absolute addressing reg is R0 */ \
+ break; \
+ case 0x60: /* indexed */ \
+ s2650c->ea = (s2650c->ea & PAGE)+((s2650c->ea+s2650c->reg[s2650c->r]) & PMSK); \
+ s2650c->r = 0; /* absolute addressing reg is R0 */ \
+ break; \
+ } \
}
/***************************************************************
* _BRA_EA
* build effective address with absolute addressing (branch)
***************************************************************/
-#define _BRA_EA() \
-{ \
- UINT8 hr, dr; \
- hr = ARG(s2650c); /* get 'holding register' */ \
- dr = ARG(s2650c); /* get 'data bus register' */ \
- /* build address in 32K address space */ \
- s2650c->ea = ((hr << 8) + dr) & AMSK; \
- /* indirect addressing ? */ \
- if (hr & 0x80) { \
- int addr = s2650c->ea; \
- s2650c->icount -= 6; \
- /* build indirect 32K address */ \
- s2650c->ea = RDMEM(addr) << 8; \
+#define _BRA_EA() \
+{ \
+ UINT8 hr, dr; \
+ hr = ARG(s2650c); /* get 'holding register' */ \
+ dr = ARG(s2650c); /* get 'data bus register' */ \
+ /* build address in 32K address space */ \
+ s2650c->ea = ((hr << 8) + dr) & AMSK; \
+ /* indirect addressing ? */ \
+ if (hr & 0x80) { \
+ int addr = s2650c->ea; \
+ s2650c->icount -= 6; \
+ /* build indirect 32K address */ \
+ s2650c->ea = RDMEM(addr) << 8; \
if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
- s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
- } \
+ s2650c->ea = (s2650c->ea + RDMEM(addr)) & AMSK; \
+ } \
}
/***************************************************************
@@ -358,144 +358,144 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Swap registers r1-r3 with r4-r6 (the second set)
* This is done everytime the RS bit in PSL changes
***************************************************************/
-#define SWAP_REGS \
-{ \
- UINT8 tmp; \
- tmp = s2650c->reg[1]; \
- s2650c->reg[1] = s2650c->reg[4]; \
- s2650c->reg[4] = tmp; \
- tmp = s2650c->reg[2]; \
- s2650c->reg[2] = s2650c->reg[5]; \
- s2650c->reg[5] = tmp; \
- tmp = s2650c->reg[3]; \
- s2650c->reg[3] = s2650c->reg[6]; \
- s2650c->reg[6] = tmp; \
+#define SWAP_REGS \
+{ \
+ UINT8 tmp; \
+ tmp = s2650c->reg[1]; \
+ s2650c->reg[1] = s2650c->reg[4]; \
+ s2650c->reg[4] = tmp; \
+ tmp = s2650c->reg[2]; \
+ s2650c->reg[2] = s2650c->reg[5]; \
+ s2650c->reg[5] = tmp; \
+ tmp = s2650c->reg[3]; \
+ s2650c->reg[3] = s2650c->reg[6]; \
+ s2650c->reg[6] = tmp; \
}
/***************************************************************
* M_BRR
* Branch relative if cond is true
***************************************************************/
-#define M_BRR(cond) \
-{ \
- if (cond) \
- { \
- REL_EA( s2650c->page ); \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
- } else s2650c->iar = (s2650c->iar + 1) & PMSK; \
+#define M_BRR(cond) \
+{ \
+ if (cond) \
+ { \
+ REL_EA( s2650c->page ); \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
+ } else s2650c->iar = (s2650c->iar + 1) & PMSK; \
}
/***************************************************************
* M_ZBRR
* Branch relative to page zero
***************************************************************/
-#define M_ZBRR() \
-{ \
- REL_ZERO( 0 ); \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
+#define M_ZBRR() \
+{ \
+ REL_ZERO( 0 ); \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
}
/***************************************************************
* M_BRA
* Branch absolute if cond is true
***************************************************************/
-#define M_BRA(cond) \
-{ \
- if( cond ) \
- { \
- BRA_EA(); \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
- } else s2650c->iar = (s2650c->iar + 2) & PMSK; \
+#define M_BRA(cond) \
+{ \
+ if( cond ) \
+ { \
+ BRA_EA(); \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
+ } else s2650c->iar = (s2650c->iar + 2) & PMSK; \
}
/***************************************************************
* M_BXA
* Branch indexed absolute (EA + R3)
***************************************************************/
-#define M_BXA() \
-{ \
- BRA_EA(); \
- s2650c->ea = (s2650c->ea + s2650c->reg[3]) & AMSK; \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
+#define M_BXA() \
+{ \
+ BRA_EA(); \
+ s2650c->ea = (s2650c->ea + s2650c->reg[3]) & AMSK; \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
}
/***************************************************************
* M_BSR
* Branch to subroutine relative if cond is true
***************************************************************/
-#define M_BSR(cond) \
-{ \
- if( cond ) \
- { \
- REL_EA(s2650c->page); \
- set_sp(s2650c, get_sp(s2650c) + 1); \
- s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
- } else s2650c->iar = (s2650c->iar + 1) & PMSK; \
+#define M_BSR(cond) \
+{ \
+ if( cond ) \
+ { \
+ REL_EA(s2650c->page); \
+ set_sp(s2650c, get_sp(s2650c) + 1); \
+ s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
+ } else s2650c->iar = (s2650c->iar + 1) & PMSK; \
}
/***************************************************************
* M_ZBSR
* Branch to subroutine relative to page zero
***************************************************************/
-#define M_ZBSR() \
-{ \
- REL_ZERO(0); \
- set_sp(s2650c, get_sp(s2650c) + 1); \
- s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
+#define M_ZBSR() \
+{ \
+ REL_ZERO(0); \
+ set_sp(s2650c, get_sp(s2650c) + 1); \
+ s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
}
/***************************************************************
* M_BSA
* Branch to subroutine absolute
***************************************************************/
-#define M_BSA(cond) \
-{ \
- if( cond ) \
- { \
- BRA_EA(); \
- set_sp(s2650c, get_sp(s2650c) + 1); \
- s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
- } else s2650c->iar = (s2650c->iar + 2) & PMSK; \
+#define M_BSA(cond) \
+{ \
+ if( cond ) \
+ { \
+ BRA_EA(); \
+ set_sp(s2650c, get_sp(s2650c) + 1); \
+ s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
+ } else s2650c->iar = (s2650c->iar + 2) & PMSK; \
}
/***************************************************************
* M_BSXA
* Branch to subroutine indexed absolute (EA + R3)
***************************************************************/
-#define M_BSXA() \
-{ \
- BRA_EA(); \
- s2650c->ea = (s2650c->ea + s2650c->reg[3]) & AMSK; \
- set_sp(s2650c, get_sp(s2650c) + 1); \
- s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
+#define M_BSXA() \
+{ \
+ BRA_EA(); \
+ s2650c->ea = (s2650c->ea + s2650c->reg[3]) & AMSK; \
+ set_sp(s2650c, get_sp(s2650c) + 1); \
+ s2650c->ras[get_sp(s2650c)] = s2650c->page + s2650c->iar; \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
}
/***************************************************************
* M_RET
* Return from subroutine if cond is true
***************************************************************/
-#define M_RET(cond) \
-{ \
- if( cond ) \
- { \
- s2650c->icount -= 6; \
- s2650c->ea = s2650c->ras[get_sp(s2650c)]; \
- set_sp(s2650c, get_sp(s2650c) - 1); \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
- } \
+#define M_RET(cond) \
+{ \
+ if( cond ) \
+ { \
+ s2650c->icount -= 6; \
+ s2650c->ea = s2650c->ras[get_sp(s2650c)]; \
+ set_sp(s2650c, get_sp(s2650c) - 1); \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
+ } \
}
/***************************************************************
@@ -504,64 +504,64 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* and enable interrupts; afterwards check IRQ line
* state and eventually take next interrupt
***************************************************************/
-#define M_RETE(cond) \
-{ \
- if( cond ) \
- { \
- s2650c->ea = s2650c->ras[get_sp(s2650c)]; \
- set_sp(s2650c, get_sp(s2650c) - 1); \
- s2650c->page = s2650c->ea & PAGE; \
- s2650c->iar = s2650c->ea & PMSK; \
- set_psu(s2650c, s2650c->psu & ~II); \
- s2650c->icount -= check_irq_line(s2650c); \
- } \
+#define M_RETE(cond) \
+{ \
+ if( cond ) \
+ { \
+ s2650c->ea = s2650c->ras[get_sp(s2650c)]; \
+ set_sp(s2650c, get_sp(s2650c) - 1); \
+ s2650c->page = s2650c->ea & PAGE; \
+ s2650c->iar = s2650c->ea & PMSK; \
+ set_psu(s2650c, s2650c->psu & ~II); \
+ s2650c->icount -= check_irq_line(s2650c); \
+ } \
}
/***************************************************************
* M_LOD
* Load destination with source register
***************************************************************/
-#define M_LOD(dest,source) \
-{ \
- dest = source; \
- SET_CC(dest); \
+#define M_LOD(dest,source) \
+{ \
+ dest = source; \
+ SET_CC(dest); \
}
/***************************************************************
* M_STR
* Store source register to memory addr (CC unchanged)
***************************************************************/
-#define M_STR(address,source) \
+#define M_STR(address,source) \
s2650c->program->write_byte(address, source)
/***************************************************************
* M_AND
* Logical and destination with source
***************************************************************/
-#define M_AND(dest,source) \
-{ \
- dest &= source; \
- SET_CC(dest); \
+#define M_AND(dest,source) \
+{ \
+ dest &= source; \
+ SET_CC(dest); \
}
/***************************************************************
* M_IOR
* Logical inclusive or destination with source
***************************************************************/
-#define M_IOR(dest,source) \
-{ \
- dest |= source; \
- SET_CC(dest); \
+#define M_IOR(dest,source) \
+{ \
+ dest |= source; \
+ SET_CC(dest); \
}
/***************************************************************
* M_EOR
* Logical exclusive or destination with source
***************************************************************/
-#define M_EOR(dest,source) \
-{ \
- dest ^= source; \
- SET_CC(dest); \
+#define M_EOR(dest,source) \
+{ \
+ dest ^= source; \
+ SET_CC(dest); \
}
/***************************************************************
@@ -569,17 +569,17 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Add source to destination
* Add with carry if WC flag of PSL is set
***************************************************************/
-#define M_ADD(dest,_source) \
-{ \
- UINT8 source = _source; \
- UINT8 before = dest; \
- /* add source; carry only if WC is set */ \
- UINT16 res = dest + source + ((s2650c->psl >> 3) & s2650c->psl & C); \
- s2650c->psl &= ~(C | OVF | IDC); \
- if(res & 0x100) s2650c->psl |= C; \
- dest = res & 0xff; \
- if( (dest & 15) < (before & 15) ) s2650c->psl |= IDC; \
- SET_CC_OVF_ADD(dest,before,source); \
+#define M_ADD(dest,_source) \
+{ \
+ UINT8 source = _source; \
+ UINT8 before = dest; \
+ /* add source; carry only if WC is set */ \
+ UINT16 res = dest + source + ((s2650c->psl >> 3) & s2650c->psl & C); \
+ s2650c->psl &= ~(C | OVF | IDC); \
+ if(res & 0x100) s2650c->psl |= C; \
+ dest = res & 0xff; \
+ if( (dest & 15) < (before & 15) ) s2650c->psl |= IDC; \
+ SET_CC_OVF_ADD(dest,before,source); \
}
/***************************************************************
@@ -587,17 +587,17 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Subtract source from destination
* Subtract with borrow if WC flag of PSL is set
***************************************************************/
-#define M_SUB(dest,_source) \
-{ \
- UINT8 source = _source; \
- UINT8 before = dest; \
- /* subtract source; borrow only if WC is set */ \
- UINT16 res = dest - source - ((s2650c->psl >> 3) & (s2650c->psl ^ C) & C); \
- s2650c->psl &= ~(C | OVF | IDC); \
- if((res & 0x100)==0) s2650c->psl |= C; \
- dest = res & 0xff; \
- if( (dest & 15) <= (before & 15) ) s2650c->psl |= IDC; \
- SET_CC_OVF_SUB(dest,before,source); \
+#define M_SUB(dest,_source) \
+{ \
+ UINT8 source = _source; \
+ UINT8 before = dest; \
+ /* subtract source; borrow only if WC is set */ \
+ UINT16 res = dest - source - ((s2650c->psl >> 3) & (s2650c->psl ^ C) & C); \
+ s2650c->psl &= ~(C | OVF | IDC); \
+ if((res & 0x100)==0) s2650c->psl |= C; \
+ dest = res & 0xff; \
+ if( (dest & 15) <= (before & 15) ) s2650c->psl |= IDC; \
+ SET_CC_OVF_SUB(dest,before,source); \
}
/***************************************************************
@@ -605,24 +605,24 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Compare register against value. If COM of PSL is set,
* use unsigned, else signed comparison
***************************************************************/
-#define M_COM(reg,val) \
-{ \
- int d; \
- s2650c->psl &= ~CC; \
- if (s2650c->psl & COM) d = (UINT8)reg - (UINT8)val; \
- else d = (INT8)reg - (INT8)val; \
- if( d < 0 ) s2650c->psl |= 0x80; \
- else \
- if( d > 0 ) s2650c->psl |= 0x40; \
+#define M_COM(reg,val) \
+{ \
+ int d; \
+ s2650c->psl &= ~CC; \
+ if (s2650c->psl & COM) d = (UINT8)reg - (UINT8)val; \
+ else d = (INT8)reg - (INT8)val; \
+ if( d < 0 ) s2650c->psl |= 0x80; \
+ else \
+ if( d > 0 ) s2650c->psl |= 0x40; \
}
/***************************************************************
* M_DAR
* Decimal adjust register
***************************************************************/
-#define M_DAR(dest) \
-{ \
- if ((s2650c->psl & C) == 0) dest += 0xA0; \
+#define M_DAR(dest) \
+{ \
+ if ((s2650c->psl & C) == 0) dest += 0xA0; \
if ((s2650c->psl & IDC) == 0) dest = (dest & 0xF0) | ((dest + 0x0A) & 0x0F);\
}
@@ -631,22 +631,22 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Rotate register left; If WC of PSL is set, rotate
* through carry, else rotate circular
***************************************************************/
-#define M_RRL(dest) \
-{ \
- UINT8 before = dest; \
- if( s2650c->psl & WC ) \
- { \
- UINT8 c = s2650c->psl & C; \
- s2650c->psl &= ~(C + IDC); \
- dest = (before << 1) | c; \
- s2650c->psl |= (before >> 7) + (dest & IDC); \
- } \
- else \
- { \
- dest = (before << 1) | (before >> 7); \
- } \
- SET_CC(dest); \
- s2650c->psl = (s2650c->psl & ~OVF) | (((dest ^ before) >> 5) & OVF); \
+#define M_RRL(dest) \
+{ \
+ UINT8 before = dest; \
+ if( s2650c->psl & WC ) \
+ { \
+ UINT8 c = s2650c->psl & C; \
+ s2650c->psl &= ~(C + IDC); \
+ dest = (before << 1) | c; \
+ s2650c->psl |= (before >> 7) + (dest & IDC); \
+ } \
+ else \
+ { \
+ dest = (before << 1) | (before >> 7); \
+ } \
+ SET_CC(dest); \
+ s2650c->psl = (s2650c->psl & ~OVF) | (((dest ^ before) >> 5) & OVF); \
}
/***************************************************************
@@ -654,18 +654,18 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Rotate register right; If WC of PSL is set, rotate
* through carry, else rotate circular
***************************************************************/
-#define M_RRR(dest) \
-{ \
- UINT8 before = dest; \
- if (s2650c->psl & WC) \
- { \
- UINT8 c = s2650c->psl & C; \
- s2650c->psl &= ~(C + IDC); \
- dest = (before >> 1) | (c << 7); \
- s2650c->psl |= (before & C) + (dest & IDC); \
- } else dest = (before >> 1) | (before << 7); \
- SET_CC(dest); \
- s2650c->psl = (s2650c->psl & ~OVF) | (((dest ^ before) >> 5) & OVF); \
+#define M_RRR(dest) \
+{ \
+ UINT8 before = dest; \
+ if (s2650c->psl & WC) \
+ { \
+ UINT8 c = s2650c->psl & C; \
+ s2650c->psl &= ~(C + IDC); \
+ dest = (before >> 1) | (c << 7); \
+ s2650c->psl |= (before & C) + (dest & IDC); \
+ } else dest = (before >> 1) | (before << 7); \
+ SET_CC(dest); \
+ s2650c->psl = (s2650c->psl & ~OVF) | (((dest ^ before) >> 5) & OVF); \
}
// bxd() not necessary
@@ -675,44 +675,44 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Store processor status upper (PSU) to register R0
* Checks for External Sense IO port
***************************************************************/
-#define M_SPSU() \
-{ \
+#define M_SPSU() \
+{ \
R0 = ((s2650c->psu & ~PSU34) | (s2650c->io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
- SET_CC(R0); \
+ SET_CC(R0); \
}
/***************************************************************
* M_SPSL
* Store processor status lower (PSL) to register R0
***************************************************************/
-#define M_SPSL() \
-{ \
- R0 = s2650c->psl; \
- SET_CC(R0); \
+#define M_SPSL() \
+{ \
+ R0 = s2650c->psl; \
+ SET_CC(R0); \
}
/***************************************************************
* M_CPSU
* Clear processor status upper (PSU), selective
***************************************************************/
-#define M_CPSU() \
-{ \
- UINT8 cpsu = ARG(s2650c); \
- set_psu(s2650c, s2650c->psu & ~cpsu); \
- s2650c->icount -= check_irq_line(s2650c); \
+#define M_CPSU() \
+{ \
+ UINT8 cpsu = ARG(s2650c); \
+ set_psu(s2650c, s2650c->psu & ~cpsu); \
+ s2650c->icount -= check_irq_line(s2650c); \
}
/***************************************************************
* M_CPSL
* Clear processor status lower (PSL), selective
***************************************************************/
-#define M_CPSL() \
-{ \
- UINT8 cpsl = ARG(s2650c); \
- /* select other register set now ? */ \
- if( (cpsl & RS) && (s2650c->psl & RS) ) \
- SWAP_REGS; \
- s2650c->psl = s2650c->psl & ~cpsl; \
+#define M_CPSL() \
+{ \
+ UINT8 cpsl = ARG(s2650c); \
+ /* select other register set now ? */ \
+ if( (cpsl & RS) && (s2650c->psl & RS) ) \
+ SWAP_REGS; \
+ s2650c->psl = s2650c->psl & ~cpsl; \
}
/***************************************************************
@@ -720,61 +720,61 @@ INLINE UINT8 ARG(s2650_regs *s2650c)
* Preset processor status upper (PSU), selective
* Unused bits 3 and 4 can't be set
***************************************************************/
-#define M_PPSU() \
-{ \
- UINT8 ppsu = (ARG(s2650c) & ~PSU34) & ~SI; \
- set_psu(s2650c, s2650c->psu | ppsu); \
+#define M_PPSU() \
+{ \
+ UINT8 ppsu = (ARG(s2650c) & ~PSU34) & ~SI; \
+ set_psu(s2650c, s2650c->psu | ppsu); \
}
/***************************************************************
* M_PPSL
* Preset processor status lower (PSL), selective
***************************************************************/
-#define M_PPSL() \
-{ \
- UINT8 ppsl = ARG(s2650c); \
- /* select 2nd register set now ? */ \
- if ((ppsl & RS) && !(s2650c->psl & RS)) \
- SWAP_REGS; \
- s2650c->psl = s2650c->psl | ppsl; \
+#define M_PPSL() \
+{ \
+ UINT8 ppsl = ARG(s2650c); \
+ /* select 2nd register set now ? */ \
+ if ((ppsl & RS) && !(s2650c->psl & RS)) \
+ SWAP_REGS; \
+ s2650c->psl = s2650c->psl | ppsl; \
}
/***************************************************************
* M_TPSU
* Test processor status upper (PSU)
***************************************************************/
-#define M_TPSU() \
-{ \
- UINT8 tpsu = ARG(s2650c); \
- UINT8 rpsu = (s2650c->psu | (s2650c->io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
- s2650c->psl &= ~CC; \
- if( (rpsu & tpsu) != tpsu ) \
- s2650c->psl |= 0x80; \
+#define M_TPSU() \
+{ \
+ UINT8 tpsu = ARG(s2650c); \
+ UINT8 rpsu = (s2650c->psu | (s2650c->io->read_byte(S2650_SENSE_PORT) ? SI : 0)); \
+ s2650c->psl &= ~CC; \
+ if( (rpsu & tpsu) != tpsu ) \
+ s2650c->psl |= 0x80; \
}
/***************************************************************
* M_TPSL
* Test processor status lower (PSL)
***************************************************************/
-#define M_TPSL() \
-{ \
- UINT8 tpsl = ARG(s2650c); \
- if( (s2650c->psl & tpsl) != tpsl ) \
- s2650c->psl = (s2650c->psl & ~CC) | 0x80; \
- else \
- s2650c->psl &= ~CC; \
+#define M_TPSL() \
+{ \
+ UINT8 tpsl = ARG(s2650c); \
+ if( (s2650c->psl & tpsl) != tpsl ) \
+ s2650c->psl = (s2650c->psl & ~CC) | 0x80; \
+ else \
+ s2650c->psl &= ~CC; \
}
/***************************************************************
* M_TMI
* Test under mask immediate
***************************************************************/
-#define M_TMI(value) \
-{ \
- UINT8 tmi = ARG(s2650c); \
- s2650c->psl &= ~CC; \
- if( (value & tmi) != tmi ) \
- s2650c->psl |= 0x80; \
+#define M_TMI(value) \
+{ \
+ UINT8 tmi = ARG(s2650c); \
+ s2650c->psl &= ~CC; \
+ if( (value & tmi) != tmi ) \
+ s2650c->psl |= 0x80; \
}
#if INLINE_EA
@@ -858,30 +858,30 @@ static void set_irq_line(s2650_regs *s2650c, int irqline, int state)
static void s2650_set_flag(s2650_regs *s2650c, int state)
{
- if (state)
- set_psu(s2650c, s2650c->psu | FO);
- else
- set_psu(s2650c, s2650c->psu & ~FO);
+ if (state)
+ set_psu(s2650c, s2650c->psu | FO);
+ else
+ set_psu(s2650c, s2650c->psu & ~FO);
}
static int s2650_get_flag(s2650_regs *s2650c)
{
- return (s2650c->psu & FO) ? 1 : 0;
+ return (s2650c->psu & FO) ? 1 : 0;
}
static void s2650_set_sense(s2650_regs *s2650c, int state)
{
- if (state)
- set_psu(s2650c, s2650c->psu | SI);
- else
- set_psu(s2650c, s2650c->psu & ~SI);
+ if (state)
+ set_psu(s2650c, s2650c->psu | SI);
+ else
+ set_psu(s2650c, s2650c->psu & ~SI);
}
static int s2650_get_sense(s2650_regs *s2650c)
{
/* OR'd with Input to allow for external connections */
- return (((s2650c->psu & SI) ? 1 : 0) | ((s2650c->io->read_byte(S2650_SENSE_PORT) & SI) ? 1 : 0));
+ return (((s2650c->psu & SI) ? 1 : 0) | ((s2650c->io->read_byte(S2650_SENSE_PORT) & SI) ? 1 : 0));
}
static CPU_EXECUTE( s2650 )
@@ -899,356 +899,356 @@ static CPU_EXECUTE( s2650 )
debugger_instruction_hook(device, s2650c->page + s2650c->iar);
s2650c->ir = ROP(s2650c);
- s2650c->r = s2650c->ir & 3; /* register / value */
+ s2650c->r = s2650c->ir & 3; /* register / value */
switch (s2650c->ir) {
- case 0x00: /* LODZ,0 */
- case 0x01: /* LODZ,1 */
- case 0x02: /* LODZ,2 */
- case 0x03: /* LODZ,3 */
+ case 0x00: /* LODZ,0 */
+ case 0x01: /* LODZ,1 */
+ case 0x02: /* LODZ,2 */
+ case 0x03: /* LODZ,3 */
s2650c->icount -= 6;
M_LOD( R0, s2650c->reg[s2650c->r] );
break;
- case 0x04: /* LODI,0 v */
- case 0x05: /* LODI,1 v */
- case 0x06: /* LODI,2 v */
- case 0x07: /* LODI,3 v */
+ case 0x04: /* LODI,0 v */
+ case 0x05: /* LODI,1 v */
+ case 0x06: /* LODI,2 v */
+ case 0x07: /* LODI,3 v */
s2650c->icount -= 6;
M_LOD( s2650c->reg[s2650c->r], ARG(s2650c) );
break;
- case 0x08: /* LODR,0 (*)a */
- case 0x09: /* LODR,1 (*)a */
- case 0x0a: /* LODR,2 (*)a */
- case 0x0b: /* LODR,3 (*)a */
+ case 0x08: /* LODR,0 (*)a */
+ case 0x09: /* LODR,1 (*)a */
+ case 0x0a: /* LODR,2 (*)a */
+ case 0x0b: /* LODR,3 (*)a */
s2650c->icount -= 9;
REL_EA( s2650c->page );
M_LOD( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x0c: /* LODA,0 (*)a(,X) */
- case 0x0d: /* LODA,1 (*)a(,X) */
- case 0x0e: /* LODA,2 (*)a(,X) */
- case 0x0f: /* LODA,3 (*)a(,X) */
+ case 0x0c: /* LODA,0 (*)a(,X) */
+ case 0x0d: /* LODA,1 (*)a(,X) */
+ case 0x0e: /* LODA,2 (*)a(,X) */
+ case 0x0f: /* LODA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_LOD( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x10: /* illegal */
- case 0x11: /* illegal */
+ case 0x10: /* illegal */
+ case 0x11: /* illegal */
s2650c->icount -= 7;
break;
- case 0x12: /* SPSU */
+ case 0x12: /* SPSU */
s2650c->icount -= 6;
M_SPSU();
break;
- case 0x13: /* SPSL */
+ case 0x13: /* SPSL */
s2650c->icount -= 6;
M_SPSL();
break;
- case 0x14: /* RETC,0 (zero) */
- case 0x15: /* RETC,1 (plus) */
- case 0x16: /* RETC,2 (minus) */
- s2650c->icount -= 9; /* +2 cycles if condition is true */
+ case 0x14: /* RETC,0 (zero) */
+ case 0x15: /* RETC,1 (plus) */
+ case 0x16: /* RETC,2 (minus) */
+ s2650c->icount -= 9; /* +2 cycles if condition is true */
M_RET( (s2650c->psl >> 6) == s2650c->r );
break;
- case 0x17: /* RETC,3 (always) */
- s2650c->icount -= 9; /* +2 cycles if condition is true */
+ case 0x17: /* RETC,3 (always) */
+ s2650c->icount -= 9; /* +2 cycles if condition is true */
M_RET( 1 );
break;
- case 0x18: /* BCTR,0 (*)a */
- case 0x19: /* BCTR,1 (*)a */
- case 0x1a: /* BCTR,2 (*)a */
+ case 0x18: /* BCTR,0 (*)a */
+ case 0x19: /* BCTR,1 (*)a */
+ case 0x1a: /* BCTR,2 (*)a */
s2650c->icount -= 9;
M_BRR( (s2650c->psl >> 6) == s2650c->r );
break;
- case 0x1b: /* BCTR,3 (*)a */
+ case 0x1b: /* BCTR,3 (*)a */
s2650c->icount -= 9;
M_BRR( 1 );
break;
- case 0x1c: /* BCTA,0 (*)a */
- case 0x1d: /* BCTA,1 (*)a */
- case 0x1e: /* BCTA,2 (*)a */
+ case 0x1c: /* BCTA,0 (*)a */
+ case 0x1d: /* BCTA,1 (*)a */
+ case 0x1e: /* BCTA,2 (*)a */
s2650c->icount -= 9;
M_BRA( (s2650c->psl >> 6) == s2650c->r );
break;
- case 0x1f: /* BCTA,3 (*)a */
+ case 0x1f: /* BCTA,3 (*)a */
s2650c->icount -= 9;
M_BRA( 1 );
break;
- case 0x20: /* EORZ,0 */
- case 0x21: /* EORZ,1 */
- case 0x22: /* EORZ,2 */
- case 0x23: /* EORZ,3 */
+ case 0x20: /* EORZ,0 */
+ case 0x21: /* EORZ,1 */
+ case 0x22: /* EORZ,2 */
+ case 0x23: /* EORZ,3 */
s2650c->icount -= 6;
M_EOR( R0, s2650c->reg[s2650c->r] );
break;
- case 0x24: /* EORI,0 v */
- case 0x25: /* EORI,1 v */
- case 0x26: /* EORI,2 v */
- case 0x27: /* EORI,3 v */
+ case 0x24: /* EORI,0 v */
+ case 0x25: /* EORI,1 v */
+ case 0x26: /* EORI,2 v */
+ case 0x27: /* EORI,3 v */
s2650c->icount -= 6;
M_EOR( s2650c->reg[s2650c->r], ARG(s2650c) );
break;
- case 0x28: /* EORR,0 (*)a */
- case 0x29: /* EORR,1 (*)a */
- case 0x2a: /* EORR,2 (*)a */
- case 0x2b: /* EORR,3 (*)a */
+ case 0x28: /* EORR,0 (*)a */
+ case 0x29: /* EORR,1 (*)a */
+ case 0x2a: /* EORR,2 (*)a */
+ case 0x2b: /* EORR,3 (*)a */
s2650c->icount -= 9;
REL_EA( s2650c->page );
M_EOR( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x2c: /* EORA,0 (*)a(,X) */
- case 0x2d: /* EORA,1 (*)a(,X) */
- case 0x2e: /* EORA,2 (*)a(,X) */
- case 0x2f: /* EORA,3 (*)a(,X) */
+ case 0x2c: /* EORA,0 (*)a(,X) */
+ case 0x2d: /* EORA,1 (*)a(,X) */
+ case 0x2e: /* EORA,2 (*)a(,X) */
+ case 0x2f: /* EORA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_EOR( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x30: /* REDC,0 */
- case 0x31: /* REDC,1 */
- case 0x32: /* REDC,2 */
- case 0x33: /* REDC,3 */
+ case 0x30: /* REDC,0 */
+ case 0x31: /* REDC,1 */
+ case 0x32: /* REDC,2 */
+ case 0x33: /* REDC,3 */
s2650c->icount -= 6;
s2650c->reg[s2650c->r] = s2650c->io->read_byte(S2650_CTRL_PORT);
SET_CC( s2650c->reg[s2650c->r] );
break;
- case 0x34: /* RETE,0 */
- case 0x35: /* RETE,1 */
- case 0x36: /* RETE,2 */
+ case 0x34: /* RETE,0 */
+ case 0x35: /* RETE,1 */
+ case 0x36: /* RETE,2 */
s2650c->icount -= 9;
M_RETE( (s2650c->psl >> 6) == s2650c->r );
break;
- case 0x37: /* RETE,3 */
+ case 0x37: /* RETE,3 */
s2650c->icount -= 9;
M_RETE( 1 );
break;
- case 0x38: /* BSTR,0 (*)a */
- case 0x39: /* BSTR,1 (*)a */
- case 0x3a: /* BSTR,2 (*)a */
+ case 0x38: /* BSTR,0 (*)a */
+ case 0x39: /* BSTR,1 (*)a */
+ case 0x3a: /* BSTR,2 (*)a */
s2650c->icount -= 9;
M_BSR( (s2650c->psl >> 6) == s2650c->r );
break;
- case 0x3b: /* BSTR,R3 (*)a */
+ case 0x3b: /* BSTR,R3 (*)a */
s2650c->icount -= 9;
M_BSR( 1 );
break;
- case 0x3c: /* BSTA,0 (*)a */
- case 0x3d: /* BSTA,1 (*)a */
- case 0x3e: /* BSTA,2 (*)a */
+ case 0x3c: /* BSTA,0 (*)a */
+ case 0x3d: /* BSTA,1 (*)a */
+ case 0x3e: /* BSTA,2 (*)a */
s2650c->icount -= 9;
M_BSA( (s2650c->psl >> 6) == s2650c->r );
break;
- case 0x3f: /* BSTA,3 (*)a */
+ case 0x3f: /* BSTA,3 (*)a */
s2650c->icount -= 9;
M_BSA( 1 );
break;
- case 0x40: /* HALT */
+ case 0x40: /* HALT */
s2650c->icount -= 6;
s2650c->iar = (s2650c->iar - 1) & PMSK;
s2650c->halt = 1;
if (s2650c->icount > 0)
s2650c->icount = 0;
break;
- case 0x41: /* ANDZ,1 */
- case 0x42: /* ANDZ,2 */
- case 0x43: /* ANDZ,3 */
+ case 0x41: /* ANDZ,1 */
+ case 0x42: /* ANDZ,2 */
+ case 0x43: /* ANDZ,3 */
s2650c->icount -= 6;
M_AND( R0, s2650c->reg[s2650c->r] );
break;
- case 0x44: /* ANDI,0 v */
- case 0x45: /* ANDI,1 v */
- case 0x46: /* ANDI,2 v */
- case 0x47: /* ANDI,3 v */
+ case 0x44: /* ANDI,0 v */
+ case 0x45: /* ANDI,1 v */
+ case 0x46: /* ANDI,2 v */
+ case 0x47: /* ANDI,3 v */
s2650c->icount -= 6;
M_AND( s2650c->reg[s2650c->r], ARG(s2650c) );
break;
- case 0x48: /* ANDR,0 (*)a */
- case 0x49: /* ANDR,1 (*)a */
- case 0x4a: /* ANDR,2 (*)a */
- case 0x4b: /* ANDR,3 (*)a */
+ case 0x48: /* ANDR,0 (*)a */
+ case 0x49: /* ANDR,1 (*)a */
+ case 0x4a: /* ANDR,2 (*)a */
+ case 0x4b: /* ANDR,3 (*)a */
s2650c->icount -= 9;
REL_EA( s2650c->page );
M_AND( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x4c: /* ANDA,0 (*)a(,X) */
- case 0x4d: /* ANDA,1 (*)a(,X) */
- case 0x4e: /* ANDA,2 (*)a(,X) */
- case 0x4f: /* ANDA,3 (*)a(,X) */
+ case 0x4c: /* ANDA,0 (*)a(,X) */
+ case 0x4d: /* ANDA,1 (*)a(,X) */
+ case 0x4e: /* ANDA,2 (*)a(,X) */
+ case 0x4f: /* ANDA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_AND( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x50: /* RRR,0 */
- case 0x51: /* RRR,1 */
- case 0x52: /* RRR,2 */
- case 0x53: /* RRR,3 */
+ case 0x50: /* RRR,0 */
+ case 0x51: /* RRR,1 */
+ case 0x52: /* RRR,2 */
+ case 0x53: /* RRR,3 */
s2650c->icount -= 6;
M_RRR( s2650c->reg[s2650c->r] );
break;
- case 0x54: /* REDE,0 v */
- case 0x55: /* REDE,1 v */
- case 0x56: /* REDE,2 v */
- case 0x57: /* REDE,3 v */
+ case 0x54: /* REDE,0 v */
+ case 0x55: /* REDE,1 v */
+ case 0x56: /* REDE,2 v */
+ case 0x57: /* REDE,3 v */
s2650c->icount -= 9;
s2650c->reg[s2650c->r] = s2650c->io->read_byte( ARG(s2650c) );
SET_CC(s2650c->reg[s2650c->r]);
break;
- case 0x58: /* BRNR,0 (*)a */
- case 0x59: /* BRNR,1 (*)a */
- case 0x5a: /* BRNR,2 (*)a */
- case 0x5b: /* BRNR,3 (*)a */
+ case 0x58: /* BRNR,0 (*)a */
+ case 0x59: /* BRNR,1 (*)a */
+ case 0x5a: /* BRNR,2 (*)a */
+ case 0x5b: /* BRNR,3 (*)a */
s2650c->icount -= 9;
M_BRR( s2650c->reg[s2650c->r] );
break;
- case 0x5c: /* BRNA,0 (*)a */
- case 0x5d: /* BRNA,1 (*)a */
- case 0x5e: /* BRNA,2 (*)a */
- case 0x5f: /* BRNA,3 (*)a */
+ case 0x5c: /* BRNA,0 (*)a */
+ case 0x5d: /* BRNA,1 (*)a */
+ case 0x5e: /* BRNA,2 (*)a */
+ case 0x5f: /* BRNA,3 (*)a */
s2650c->icount -= 9;
M_BRA( s2650c->reg[s2650c->r] );
break;
- case 0x60: /* IORZ,0 */
- case 0x61: /* IORZ,1 */
- case 0x62: /* IORZ,2 */
- case 0x63: /* IORZ,3 */
+ case 0x60: /* IORZ,0 */
+ case 0x61: /* IORZ,1 */
+ case 0x62: /* IORZ,2 */
+ case 0x63: /* IORZ,3 */
s2650c->icount -= 6;
M_IOR( R0, s2650c->reg[s2650c->r] );
break;
- case 0x64: /* IORI,0 v */
- case 0x65: /* IORI,1 v */
- case 0x66: /* IORI,2 v */
- case 0x67: /* IORI,3 v */
+ case 0x64: /* IORI,0 v */
+ case 0x65: /* IORI,1 v */
+ case 0x66: /* IORI,2 v */
+ case 0x67: /* IORI,3 v */
s2650c->icount -= 6;
M_IOR( s2650c->reg[s2650c->r], ARG(s2650c) );
break;
- case 0x68: /* IORR,0 (*)a */
- case 0x69: /* IORR,1 (*)a */
- case 0x6a: /* IORR,2 (*)a */
- case 0x6b: /* IORR,3 (*)a */
+ case 0x68: /* IORR,0 (*)a */
+ case 0x69: /* IORR,1 (*)a */
+ case 0x6a: /* IORR,2 (*)a */
+ case 0x6b: /* IORR,3 (*)a */
s2650c->icount -= 9;
REL_EA( s2650c->page );
M_IOR( s2650c->reg[s2650c-> r],RDMEM(s2650c->ea) );
break;
- case 0x6c: /* IORA,0 (*)a(,X) */
- case 0x6d: /* IORA,1 (*)a(,X) */
- case 0x6e: /* IORA,2 (*)a(,X) */
- case 0x6f: /* IORA,3 (*)a(,X) */
+ case 0x6c: /* IORA,0 (*)a(,X) */
+ case 0x6d: /* IORA,1 (*)a(,X) */
+ case 0x6e: /* IORA,2 (*)a(,X) */
+ case 0x6f: /* IORA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_IOR( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x70: /* REDD,0 */
- case 0x71: /* REDD,1 */
- case 0x72: /* REDD,2 */
- case 0x73: /* REDD,3 */
+ case 0x70: /* REDD,0 */
+ case 0x71: /* REDD,1 */
+ case 0x72: /* REDD,2 */
+ case 0x73: /* REDD,3 */
s2650c->icount -= 6;
s2650c->reg[s2650c->r] = s2650c->io->read_byte(S2650_DATA_PORT);
SET_CC(s2650c->reg[s2650c->r]);
break;
- case 0x74: /* CPSU */
+ case 0x74: /* CPSU */
s2650c->icount -= 9;
M_CPSU();
break;
- case 0x75: /* CPSL */
+ case 0x75: /* CPSL */
s2650c->icount -= 9;
M_CPSL();
break;
- case 0x76: /* PPSU */
+ case 0x76: /* PPSU */
s2650c->icount -= 9;
M_PPSU();
break;
- case 0x77: /* PPSL */
+ case 0x77: /* PPSL */
s2650c->icount -= 9;
M_PPSL();
break;
- case 0x78: /* BSNR,0 (*)a */
- case 0x79: /* BSNR,1 (*)a */
- case 0x7a: /* BSNR,2 (*)a */
- case 0x7b: /* BSNR,3 (*)a */
+ case 0x78: /* BSNR,0 (*)a */
+ case 0x79: /* BSNR,1 (*)a */
+ case 0x7a: /* BSNR,2 (*)a */
+ case 0x7b: /* BSNR,3 (*)a */
s2650c->icount -= 9;
M_BSR( s2650c->reg[s2650c->r] );
break;
- case 0x7c: /* BSNA,0 (*)a */
- case 0x7d: /* BSNA,1 (*)a */
- case 0x7e: /* BSNA,2 (*)a */
- case 0x7f: /* BSNA,3 (*)a */
+ case 0x7c: /* BSNA,0 (*)a */
+ case 0x7d: /* BSNA,1 (*)a */
+ case 0x7e: /* BSNA,2 (*)a */
+ case 0x7f: /* BSNA,3 (*)a */
s2650c->icount -= 9;
M_BSA( s2650c->reg[s2650c->r] );
break;
- case 0x80: /* ADDZ,0 */
- case 0x81: /* ADDZ,1 */
- case 0x82: /* ADDZ,2 */
- case 0x83: /* ADDZ,3 */
+ case 0x80: /* ADDZ,0 */
+ case 0x81: /* ADDZ,1 */
+ case 0x82: /* ADDZ,2 */
+ case 0x83: /* ADDZ,3 */
s2650c->icount -= 6;
M_ADD( R0,s2650c->reg[s2650c->r] );
break;
- case 0x84: /* ADDI,0 v */
- case 0x85: /* ADDI,1 v */
- case 0x86: /* ADDI,2 v */
- case 0x87: /* ADDI,3 v */
+ case 0x84: /* ADDI,0 v */
+ case 0x85: /* ADDI,1 v */
+ case 0x86: /* ADDI,2 v */
+ case 0x87: /* ADDI,3 v */
s2650c->icount -= 6;
M_ADD( s2650c->reg[s2650c->r], ARG(s2650c) );
break;
- case 0x88: /* ADDR,0 (*)a */
- case 0x89: /* ADDR,1 (*)a */
- case 0x8a: /* ADDR,2 (*)a */
- case 0x8b: /* ADDR,3 (*)a */
+ case 0x88: /* ADDR,0 (*)a */
+ case 0x89: /* ADDR,1 (*)a */
+ case 0x8a: /* ADDR,2 (*)a */
+ case 0x8b: /* ADDR,3 (*)a */
s2650c->icount -= 9;
REL_EA(s2650c->page);
M_ADD( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x8c: /* ADDA,0 (*)a(,X) */
- case 0x8d: /* ADDA,1 (*)a(,X) */
- case 0x8e: /* ADDA,2 (*)a(,X) */
- case 0x8f: /* ADDA,3 (*)a(,X) */
+ case 0x8c: /* ADDA,0 (*)a(,X) */
+ case 0x8d: /* ADDA,1 (*)a(,X) */
+ case 0x8e: /* ADDA,2 (*)a(,X) */
+ case 0x8f: /* ADDA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_ADD( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0x90: /* illegal */
- case 0x91: /* illegal */
+ case 0x90: /* illegal */
+ case 0x91: /* illegal */
s2650c->icount -= 7;
break;
- case 0x92: /* LPSU */
+ case 0x92: /* LPSU */
s2650c->icount -= 6;
set_psu(s2650c, (R0 & ~PSU34) & ~SI);
break;
- case 0x93: /* LPSL */
+ case 0x93: /* LPSL */
s2650c->icount -= 6;
/* change register set ? */
if ((s2650c->psl ^ R0) & RS)
@@ -1256,242 +1256,242 @@ static CPU_EXECUTE( s2650 )
s2650c->psl = R0;
break;
- case 0x94: /* DAR,0 */
- case 0x95: /* DAR,1 */
- case 0x96: /* DAR,2 */
- case 0x97: /* DAR,3 */
+ case 0x94: /* DAR,0 */
+ case 0x95: /* DAR,1 */
+ case 0x96: /* DAR,2 */
+ case 0x97: /* DAR,3 */
s2650c->icount -= 9;
M_DAR( s2650c->reg[s2650c->r] );
break;
- case 0x98: /* BCFR,0 (*)a */
- case 0x99: /* BCFR,1 (*)a */
- case 0x9a: /* BCFR,2 (*)a */
+ case 0x98: /* BCFR,0 (*)a */
+ case 0x99: /* BCFR,1 (*)a */
+ case 0x9a: /* BCFR,2 (*)a */
s2650c->icount -= 9;
M_BRR( (s2650c->psl >> 6) != s2650c->r );
break;
- case 0x9b: /* ZBRR (*)a */
+ case 0x9b: /* ZBRR (*)a */
s2650c->icount -= 9;
M_ZBRR();
break;
- case 0x9c: /* BCFA,0 (*)a */
- case 0x9d: /* BCFA,1 (*)a */
- case 0x9e: /* BCFA,2 (*)a */
+ case 0x9c: /* BCFA,0 (*)a */
+ case 0x9d: /* BCFA,1 (*)a */
+ case 0x9e: /* BCFA,2 (*)a */
s2650c->icount -= 9;
M_BRA( (s2650c->psl >> 6) != s2650c->r );
break;
- case 0x9f: /* BXA (*)a */
+ case 0x9f: /* BXA (*)a */
s2650c->icount -= 9;
M_BXA();
break;
- case 0xa0: /* SUBZ,0 */
- case 0xa1: /* SUBZ,1 */
- case 0xa2: /* SUBZ,2 */
- case 0xa3: /* SUBZ,3 */
+ case 0xa0: /* SUBZ,0 */
+ case 0xa1: /* SUBZ,1 */
+ case 0xa2: /* SUBZ,2 */
+ case 0xa3: /* SUBZ,3 */
s2650c->icount -= 6;
M_SUB( R0, s2650c->reg[s2650c->r] );
break;
- case 0xa4: /* SUBI,0 v */
- case 0xa5: /* SUBI,1 v */
- case 0xa6: /* SUBI,2 v */
- case 0xa7: /* SUBI,3 v */
+ case 0xa4: /* SUBI,0 v */
+ case 0xa5: /* SUBI,1 v */
+ case 0xa6: /* SUBI,2 v */
+ case 0xa7: /* SUBI,3 v */
s2650c->icount -= 6;
M_SUB( s2650c->reg[s2650c->r], ARG(s2650c) );
break;
- case 0xa8: /* SUBR,0 (*)a */
- case 0xa9: /* SUBR,1 (*)a */
- case 0xaa: /* SUBR,2 (*)a */
- case 0xab: /* SUBR,3 (*)a */
+ case 0xa8: /* SUBR,0 (*)a */
+ case 0xa9: /* SUBR,1 (*)a */
+ case 0xaa: /* SUBR,2 (*)a */
+ case 0xab: /* SUBR,3 (*)a */
s2650c->icount -= 9;
REL_EA(s2650c->page);
M_SUB( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0xac: /* SUBA,0 (*)a(,X) */
- case 0xad: /* SUBA,1 (*)a(,X) */
- case 0xae: /* SUBA,2 (*)a(,X) */
- case 0xaf: /* SUBA,3 (*)a(,X) */
+ case 0xac: /* SUBA,0 (*)a(,X) */
+ case 0xad: /* SUBA,1 (*)a(,X) */
+ case 0xae: /* SUBA,2 (*)a(,X) */
+ case 0xaf: /* SUBA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_SUB( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0xb0: /* WRTC,0 */
- case 0xb1: /* WRTC,1 */
- case 0xb2: /* WRTC,2 */
- case 0xb3: /* WRTC,3 */
+ case 0xb0: /* WRTC,0 */
+ case 0xb1: /* WRTC,1 */
+ case 0xb2: /* WRTC,2 */
+ case 0xb3: /* WRTC,3 */
s2650c->icount -= 6;
s2650c->io->write_byte(S2650_CTRL_PORT,s2650c->reg[s2650c->r]);
break;
- case 0xb4: /* TPSU */
+ case 0xb4: /* TPSU */
s2650c->icount -= 9;
M_TPSU();
break;
- case 0xb5: /* TPSL */
+ case 0xb5: /* TPSL */
s2650c->icount -= 9;
M_TPSL();
break;
- case 0xb6: /* illegal */
- case 0xb7: /* illegal */
+ case 0xb6: /* illegal */
+ case 0xb7: /* illegal */
s2650c->icount -= 7;
break;
- case 0xb8: /* BSFR,0 (*)a */
- case 0xb9: /* BSFR,1 (*)a */
- case 0xba: /* BSFR,2 (*)a */
+ case 0xb8: /* BSFR,0 (*)a */
+ case 0xb9: /* BSFR,1 (*)a */
+ case 0xba: /* BSFR,2 (*)a */
s2650c->icount -= 9;
M_BSR( (s2650c->psl >> 6) != s2650c->r );
break;
- case 0xbb: /* ZBSR (*)a */
+ case 0xbb: /* ZBSR (*)a */
s2650c->icount -= 9;
M_ZBSR();
break;
- case 0xbc: /* BSFA,0 (*)a */
- case 0xbd: /* BSFA,1 (*)a */
- case 0xbe: /* BSFA,2 (*)a */
+ case 0xbc: /* BSFA,0 (*)a */
+ case 0xbd: /* BSFA,1 (*)a */
+ case 0xbe: /* BSFA,2 (*)a */
s2650c->icount -= 9;
M_BSA( (s2650c->psl >> 6) != s2650c->r );
break;
- case 0xbf: /* BSXA (*)a */
+ case 0xbf: /* BSXA (*)a */
s2650c->icount -= 9;
M_BSXA();
break;
- case 0xc0: /* NOP */
+ case 0xc0: /* NOP */
s2650c->icount -= 6;
break;
- case 0xc1: /* STRZ,1 */
- case 0xc2: /* STRZ,2 */
- case 0xc3: /* STRZ,3 */
+ case 0xc1: /* STRZ,1 */
+ case 0xc2: /* STRZ,2 */
+ case 0xc3: /* STRZ,3 */
s2650c->icount -= 6;
M_LOD( s2650c->reg[s2650c->r], R0 );
break;
- case 0xc4: /* illegal */
- case 0xc5: /* illegal */
- case 0xc6: /* illegal */
- case 0xc7: /* illegal */
+ case 0xc4: /* illegal */
+ case 0xc5: /* illegal */
+ case 0xc6: /* illegal */
+ case 0xc7: /* illegal */
s2650c->icount -= 7;
break;
- case 0xc8: /* STRR,0 (*)a */
- case 0xc9: /* STRR,1 (*)a */
- case 0xca: /* STRR,2 (*)a */
- case 0xcb: /* STRR,3 (*)a */
+ case 0xc8: /* STRR,0 (*)a */
+ case 0xc9: /* STRR,1 (*)a */
+ case 0xca: /* STRR,2 (*)a */
+ case 0xcb: /* STRR,3 (*)a */
s2650c->icount -= 9;
REL_EA(s2650c->page);
M_STR( s2650c->ea, s2650c->reg[s2650c->r] );
break;
- case 0xcc: /* STRA,0 (*)a(,X) */
- case 0xcd: /* STRA,1 (*)a(,X) */
- case 0xce: /* STRA,2 (*)a(,X) */
- case 0xcf: /* STRA,3 (*)a(,X) */
+ case 0xcc: /* STRA,0 (*)a(,X) */
+ case 0xcd: /* STRA,1 (*)a(,X) */
+ case 0xce: /* STRA,2 (*)a(,X) */
+ case 0xcf: /* STRA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_STR( s2650c->ea, s2650c->reg[s2650c->r] );
break;
- case 0xd0: /* RRL,0 */
- case 0xd1: /* RRL,1 */
- case 0xd2: /* RRL,2 */
- case 0xd3: /* RRL,3 */
+ case 0xd0: /* RRL,0 */
+ case 0xd1: /* RRL,1 */
+ case 0xd2: /* RRL,2 */
+ case 0xd3: /* RRL,3 */
s2650c->icount -= 6;
M_RRL( s2650c->reg[s2650c->r] );
break;
- case 0xd4: /* WRTE,0 v */
- case 0xd5: /* WRTE,1 v */
- case 0xd6: /* WRTE,2 v */
- case 0xd7: /* WRTE,3 v */
+ case 0xd4: /* WRTE,0 v */
+ case 0xd5: /* WRTE,1 v */
+ case 0xd6: /* WRTE,2 v */
+ case 0xd7: /* WRTE,3 v */
s2650c->icount -= 9;
s2650c->io->write_byte( ARG(s2650c), s2650c->reg[s2650c->r] );
break;
- case 0xd8: /* BIRR,0 (*)a */
- case 0xd9: /* BIRR,1 (*)a */
- case 0xda: /* BIRR,2 (*)a */
- case 0xdb: /* BIRR,3 (*)a */
+ case 0xd8: /* BIRR,0 (*)a */
+ case 0xd9: /* BIRR,1 (*)a */
+ case 0xda: /* BIRR,2 (*)a */
+ case 0xdb: /* BIRR,3 (*)a */
s2650c->icount -= 9;
M_BRR( ++s2650c->reg[s2650c->r] );
break;
- case 0xdc: /* BIRA,0 (*)a */
- case 0xdd: /* BIRA,1 (*)a */
- case 0xde: /* BIRA,2 (*)a */
- case 0xdf: /* BIRA,3 (*)a */
+ case 0xdc: /* BIRA,0 (*)a */
+ case 0xdd: /* BIRA,1 (*)a */
+ case 0xde: /* BIRA,2 (*)a */
+ case 0xdf: /* BIRA,3 (*)a */
s2650c->icount -= 9;
M_BRA( ++s2650c->reg[s2650c->r] );
break;
- case 0xe0: /* COMZ,0 */
- case 0xe1: /* COMZ,1 */
- case 0xe2: /* COMZ,2 */
- case 0xe3: /* COMZ,3 */
+ case 0xe0: /* COMZ,0 */
+ case 0xe1: /* COMZ,1 */
+ case 0xe2: /* COMZ,2 */
+ case 0xe3: /* COMZ,3 */
s2650c->icount -= 6;
M_COM( R0, s2650c->reg[s2650c->r] );
break;
- case 0xe4: /* COMI,0 v */
- case 0xe5: /* COMI,1 v */
- case 0xe6: /* COMI,2 v */
- case 0xe7: /* COMI,3 v */
+ case 0xe4: /* COMI,0 v */
+ case 0xe5: /* COMI,1 v */
+ case 0xe6: /* COMI,2 v */
+ case 0xe7: /* COMI,3 v */
s2650c->icount -= 6;
M_COM( s2650c->reg[s2650c->r], ARG(s2650c) );
break;
- case 0xe8: /* COMR,0 (*)a */
- case 0xe9: /* COMR,1 (*)a */
- case 0xea: /* COMR,2 (*)a */
- case 0xeb: /* COMR,3 (*)a */
+ case 0xe8: /* COMR,0 (*)a */
+ case 0xe9: /* COMR,1 (*)a */
+ case 0xea: /* COMR,2 (*)a */
+ case 0xeb: /* COMR,3 (*)a */
s2650c->icount -= 9;
REL_EA(s2650c->page);
M_COM( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0xec: /* COMA,0 (*)a(,X) */
- case 0xed: /* COMA,1 (*)a(,X) */
- case 0xee: /* COMA,2 (*)a(,X) */
- case 0xef: /* COMA,3 (*)a(,X) */
+ case 0xec: /* COMA,0 (*)a(,X) */
+ case 0xed: /* COMA,1 (*)a(,X) */
+ case 0xee: /* COMA,2 (*)a(,X) */
+ case 0xef: /* COMA,3 (*)a(,X) */
s2650c->icount -= 12;
ABS_EA();
M_COM( s2650c->reg[s2650c->r], RDMEM(s2650c->ea) );
break;
- case 0xf0: /* WRTD,0 */
- case 0xf1: /* WRTD,1 */
- case 0xf2: /* WRTD,2 */
- case 0xf3: /* WRTD,3 */
+ case 0xf0: /* WRTD,0 */
+ case 0xf1: /* WRTD,1 */
+ case 0xf2: /* WRTD,2 */
+ case 0xf3: /* WRTD,3 */
s2650c->icount -= 6;
s2650c->io->write_byte(S2650_DATA_PORT, s2650c->reg[s2650c->r]);
break;
- case 0xf4: /* TMI,0 v */
- case 0xf5: /* TMI,1 v */
- case 0xf6: /* TMI,2 v */
- case 0xf7: /* TMI,3 v */
+ case 0xf4: /* TMI,0 v */
+ case 0xf5: /* TMI,1 v */
+ case 0xf6: /* TMI,2 v */
+ case 0xf7: /* TMI,3 v */
s2650c->icount -= 9;
M_TMI( s2650c->reg[s2650c->r] );
break;
- case 0xf8: /* BDRR,0 (*)a */
- case 0xf9: /* BDRR,1 (*)a */
- case 0xfa: /* BDRR,2 (*)a */
- case 0xfb: /* BDRR,3 (*)a */
+ case 0xf8: /* BDRR,0 (*)a */
+ case 0xf9: /* BDRR,1 (*)a */
+ case 0xfa: /* BDRR,2 (*)a */
+ case 0xfb: /* BDRR,3 (*)a */
s2650c->icount -= 9;
M_BRR( --s2650c->reg[s2650c->r] );
break;
- case 0xfc: /* BDRA,0 (*)a */
- case 0xfd: /* BDRA,1 (*)a */
- case 0xfe: /* BDRA,2 (*)a */
- case 0xff: /* BDRA,3 (*)a */
+ case 0xfc: /* BDRA,0 (*)a */
+ case 0xfd: /* BDRA,1 (*)a */
+ case 0xfe: /* BDRA,2 (*)a */
+ case 0xff: /* BDRA,3 (*)a */
s2650c->icount -= 9;
M_BRA( --s2650c->reg[s2650c->r] );
break;
@@ -1511,27 +1511,27 @@ static CPU_SET_INFO( s2650 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(s2650c, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(s2650c, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(s2650c, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(s2650c, 1, info->i); break;
case CPUINFO_INT_PC:
s2650c->page = info->i & PAGE;
s2650c->iar = info->i & PMSK;
break;
- case CPUINFO_INT_REGISTER + S2650_PC: s2650c->page = info->i & PAGE; s2650c->iar = info->i & PMSK; break;
- case CPUINFO_INT_SP: set_sp(s2650c, info->i); break;
- case CPUINFO_INT_REGISTER + S2650_PS: s2650c->psl = info->i & 0xff; set_psu(s2650c, info->i >> 8); break;
- case CPUINFO_INT_REGISTER + S2650_R0: s2650c->reg[0] = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_R1: s2650c->reg[1] = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_R2: s2650c->reg[2] = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_R3: s2650c->reg[3] = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_R1A: s2650c->reg[4] = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_R2A: s2650c->reg[5] = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_R3A: s2650c->reg[6] = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_HALT: s2650c->halt = info->i; break;
- case CPUINFO_INT_REGISTER + S2650_SI: s2650_set_sense(s2650c, info->i); break;
- case CPUINFO_INT_REGISTER + S2650_FO: s2650_set_flag(s2650c, info->i); break;
+ case CPUINFO_INT_REGISTER + S2650_PC: s2650c->page = info->i & PAGE; s2650c->iar = info->i & PMSK; break;
+ case CPUINFO_INT_SP: set_sp(s2650c, info->i); break;
+ case CPUINFO_INT_REGISTER + S2650_PS: s2650c->psl = info->i & 0xff; set_psu(s2650c, info->i >> 8); break;
+ case CPUINFO_INT_REGISTER + S2650_R0: s2650c->reg[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_R1: s2650c->reg[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_R2: s2650c->reg[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_R3: s2650c->reg[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_R1A: s2650c->reg[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_R2A: s2650c->reg[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_R3A: s2650c->reg[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_HALT: s2650c->halt = info->i; break;
+ case CPUINFO_INT_REGISTER + S2650_SI: s2650_set_sense(s2650c, info->i); break;
+ case CPUINFO_INT_REGISTER + S2650_FO: s2650_set_flag(s2650c, info->i); break;
}
}
@@ -1547,66 +1547,66 @@ CPU_GET_INFO( s2650 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(s2650_regs); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 5; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 13; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 15; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = s2650c->irq_state; break;
- case CPUINFO_INT_INPUT_STATE + 1: info->i = s2650_get_sense(s2650c) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = s2650c->ppc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(s2650_regs); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 5; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 13; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 15; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 9; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = s2650c->irq_state; break;
+ case CPUINFO_INT_INPUT_STATE + 1: info->i = s2650_get_sense(s2650c) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = s2650c->ppc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + S2650_PC: info->i = s2650c->page + s2650c->iar; break;
-
- case CPUINFO_INT_SP: info->i = get_sp(s2650c); break;
- case CPUINFO_INT_REGISTER + S2650_PS: info->i = (s2650c->psu << 8) | s2650c->psl; break;
- case CPUINFO_INT_REGISTER + S2650_R0: info->i = s2650c->reg[0]; break;
- case CPUINFO_INT_REGISTER + S2650_R1: info->i = s2650c->reg[1]; break;
- case CPUINFO_INT_REGISTER + S2650_R2: info->i = s2650c->reg[2]; break;
- case CPUINFO_INT_REGISTER + S2650_R3: info->i = s2650c->reg[3]; break;
- case CPUINFO_INT_REGISTER + S2650_R1A: info->i = s2650c->reg[4]; break;
- case CPUINFO_INT_REGISTER + S2650_R2A: info->i = s2650c->reg[5]; break;
- case CPUINFO_INT_REGISTER + S2650_R3A: info->i = s2650c->reg[6]; break;
- case CPUINFO_INT_REGISTER + S2650_HALT: info->i = s2650c->halt; break;
- case CPUINFO_INT_REGISTER + S2650_SI: info->i = s2650_get_sense(s2650c); break;
- case CPUINFO_INT_REGISTER + S2650_FO: info->i = s2650_get_flag(s2650c); break;
+ case CPUINFO_INT_REGISTER + S2650_PC: info->i = s2650c->page + s2650c->iar; break;
+
+ case CPUINFO_INT_SP: info->i = get_sp(s2650c); break;
+ case CPUINFO_INT_REGISTER + S2650_PS: info->i = (s2650c->psu << 8) | s2650c->psl; break;
+ case CPUINFO_INT_REGISTER + S2650_R0: info->i = s2650c->reg[0]; break;
+ case CPUINFO_INT_REGISTER + S2650_R1: info->i = s2650c->reg[1]; break;
+ case CPUINFO_INT_REGISTER + S2650_R2: info->i = s2650c->reg[2]; break;
+ case CPUINFO_INT_REGISTER + S2650_R3: info->i = s2650c->reg[3]; break;
+ case CPUINFO_INT_REGISTER + S2650_R1A: info->i = s2650c->reg[4]; break;
+ case CPUINFO_INT_REGISTER + S2650_R2A: info->i = s2650c->reg[5]; break;
+ case CPUINFO_INT_REGISTER + S2650_R3A: info->i = s2650c->reg[6]; break;
+ case CPUINFO_INT_REGISTER + S2650_HALT: info->i = s2650c->halt; break;
+ case CPUINFO_INT_REGISTER + S2650_SI: info->i = s2650_get_sense(s2650c); break;
+ case CPUINFO_INT_REGISTER + S2650_FO: info->i = s2650_get_flag(s2650c); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(s2650); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(s2650); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(s2650); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(s2650); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(s2650); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(s2650); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &s2650c->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(s2650); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(s2650); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(s2650); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(s2650); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(s2650); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(s2650); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &s2650c->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "S2650"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Signetics 2650"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.2"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Written by Juergen Buchmueller for use with MAME"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "S2650"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Signetics 2650"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.2"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Written by Juergen Buchmueller for use with MAME"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
@@ -1618,7 +1618,7 @@ CPU_GET_INFO( s2650 )
s2650c->psu & 0x04 ? 's':'.',
s2650c->psu & 0x02 ? 's':'.',
s2650c->psu & 0x01 ? 's':'.',
- s2650c->psl & 0x80 ? 'M':'.',
+ s2650c->psl & 0x80 ? 'M':'.',
s2650c->psl & 0x40 ? 'P':'.',
s2650c->psl & 0x20 ? 'H':'.',
s2650c->psl & 0x10 ? 'R':'.',
@@ -1628,18 +1628,18 @@ CPU_GET_INFO( s2650 )
s2650c->psl & 0x01 ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + S2650_PC: sprintf(info->s, "PC:%04X", s2650c->page + s2650c->iar); break;
- case CPUINFO_STR_REGISTER + S2650_PS: sprintf(info->s, "PS:%02X%02X", s2650c->psu, s2650c->psl); break;
- case CPUINFO_STR_REGISTER + S2650_R0: sprintf(info->s, "R0:%02X", s2650c->reg[0]); break;
- case CPUINFO_STR_REGISTER + S2650_R1: sprintf(info->s, "R1:%02X", s2650c->reg[1]); break;
- case CPUINFO_STR_REGISTER + S2650_R2: sprintf(info->s, "R2:%02X", s2650c->reg[2]); break;
- case CPUINFO_STR_REGISTER + S2650_R3: sprintf(info->s, "R3:%02X", s2650c->reg[3]); break;
- case CPUINFO_STR_REGISTER + S2650_R1A: sprintf(info->s, "R1':%02X", s2650c->reg[4]); break;
- case CPUINFO_STR_REGISTER + S2650_R2A: sprintf(info->s, "R2':%02X", s2650c->reg[5]); break;
- case CPUINFO_STR_REGISTER + S2650_R3A: sprintf(info->s, "R3':%02X", s2650c->reg[6]); break;
- case CPUINFO_STR_REGISTER + S2650_HALT: sprintf(info->s, "HALT:%X", s2650c->halt); break;
- case CPUINFO_STR_REGISTER + S2650_SI: sprintf(info->s, "SI:%X", (s2650c->psu & SI) ? 1 : 0); break;
- case CPUINFO_STR_REGISTER + S2650_FO: sprintf(info->s, "FO:%X", (s2650c->psu & FO) ? 1 : 0); break;
+ case CPUINFO_STR_REGISTER + S2650_PC: sprintf(info->s, "PC:%04X", s2650c->page + s2650c->iar); break;
+ case CPUINFO_STR_REGISTER + S2650_PS: sprintf(info->s, "PS:%02X%02X", s2650c->psu, s2650c->psl); break;
+ case CPUINFO_STR_REGISTER + S2650_R0: sprintf(info->s, "R0:%02X", s2650c->reg[0]); break;
+ case CPUINFO_STR_REGISTER + S2650_R1: sprintf(info->s, "R1:%02X", s2650c->reg[1]); break;
+ case CPUINFO_STR_REGISTER + S2650_R2: sprintf(info->s, "R2:%02X", s2650c->reg[2]); break;
+ case CPUINFO_STR_REGISTER + S2650_R3: sprintf(info->s, "R3:%02X", s2650c->reg[3]); break;
+ case CPUINFO_STR_REGISTER + S2650_R1A: sprintf(info->s, "R1':%02X", s2650c->reg[4]); break;
+ case CPUINFO_STR_REGISTER + S2650_R2A: sprintf(info->s, "R2':%02X", s2650c->reg[5]); break;
+ case CPUINFO_STR_REGISTER + S2650_R3A: sprintf(info->s, "R3':%02X", s2650c->reg[6]); break;
+ case CPUINFO_STR_REGISTER + S2650_HALT: sprintf(info->s, "HALT:%X", s2650c->halt); break;
+ case CPUINFO_STR_REGISTER + S2650_SI: sprintf(info->s, "SI:%X", (s2650c->psu & SI) ? 1 : 0); break;
+ case CPUINFO_STR_REGISTER + S2650_FO: sprintf(info->s, "FO:%X", (s2650c->psu & FO) ? 1 : 0); break;
}
}
diff --git a/src/emu/cpu/s2650/s2650.h b/src/emu/cpu/s2650/s2650.h
index 8fa34426fff..ece37e69afb 100644
--- a/src/emu/cpu/s2650/s2650.h
+++ b/src/emu/cpu/s2650/s2650.h
@@ -14,11 +14,11 @@ enum
/* fake I/O space ports */
enum
{
- S2650_EXT_PORT = 0x00ff, /* M/~IO=0 D/~C=x E/~NE=1 */
- S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */
- S2650_DATA_PORT = 0x0101, /* M/~IO=0 D/~C=1 E/~NE=0 */
- S2650_SENSE_PORT = 0x0102, /* Fake Sense Line */
- S2650_FO_PORT = 0x0103 /* Fake FO Line */
+ S2650_EXT_PORT = 0x00ff, /* M/~IO=0 D/~C=x E/~NE=1 */
+ S2650_CTRL_PORT = 0x0100, /* M/~IO=0 D/~C=0 E/~NE=0 */
+ S2650_DATA_PORT = 0x0101, /* M/~IO=0 D/~C=1 E/~NE=0 */
+ S2650_SENSE_PORT = 0x0102, /* Fake Sense Line */
+ S2650_FO_PORT = 0x0103 /* Fake FO Line */
};
DECLARE_LEGACY_CPU_DEVICE(S2650, s2650);
diff --git a/src/emu/cpu/saturn/satops.c b/src/emu/cpu/saturn/satops.c
index bfc5f00f2b8..cabb27f89f8 100644
--- a/src/emu/cpu/saturn/satops.c
+++ b/src/emu/cpu/saturn/satops.c
@@ -1,4 +1,4 @@
-#define IRQ_ADDRESS 0xf
+#define IRQ_ADDRESS 0xf
#define saturn_assert(x) \
do { if (!(x)) logerror("SATURN '%s' assertion failed: %s at %s:%i, pc=%05x\n", cpustate->device->tag(), #x, __FILE__, __LINE__, cpustate->pc); } while (0)
@@ -7,7 +7,7 @@ INLINE int READ_OP(saturn_state *cpustate)
{
UINT8 data;
cpustate->icount-=3;
- data=cpustate->direct->read_decrypted_byte(cpustate->pc);
+ data=cpustate->direct->read_decrypted_byte(cpustate->pc);
saturn_assert(data<0x10);
cpustate->pc=(cpustate->pc+1)&0xfffff;
return data;
@@ -17,7 +17,7 @@ INLINE int READ_OP_ARG(saturn_state *cpustate)
{
UINT8 data;
cpustate->icount-=3;
- data=cpustate->direct->read_raw_byte(cpustate->pc);
+ data=cpustate->direct->read_raw_byte(cpustate->pc);
saturn_assert(data<0x10);
cpustate->pc=(cpustate->pc+1)&0xfffff;
return data;
@@ -275,7 +275,7 @@ INLINE void saturn_in(saturn_state *cpustate, int reg)
saturn_assert(reg>=0 && reg<9);
if (!(cpustate->pc&1))
logerror( "SATURN '%s' at %05x: reg=IN opcode at odd addresse\n",
- cpustate->device->tag(), cpustate->pc-3 );
+ cpustate->device->tag(), cpustate->pc-3 );
if (cpustate->config&&cpustate->config->in) in = cpustate->config->in(cpustate->device);
S64_WRITE_WORD(cpustate, reg,in);
cpustate->monitor_in = in;
diff --git a/src/emu/cpu/saturn/sattable.c b/src/emu/cpu/saturn/sattable.c
index 902a698aad7..400cd1105ad 100644
--- a/src/emu/cpu/saturn/sattable.c
+++ b/src/emu/cpu/saturn/sattable.c
@@ -38,25 +38,25 @@ static const int sub_right[]={B,C,A,C, I,I,I,I, A,B,C,D, B,C,A,C};
static void saturn_invalid3( saturn_state *cpustate, int op1, int op2, int op3 )
{
logerror( "SATURN '%s' invalid opcode %x%x%x at %05x\n",
- cpustate->device->tag(), op1, op2, op3, cpustate->pc-3 );
+ cpustate->device->tag(), op1, op2, op3, cpustate->pc-3 );
}
static void saturn_invalid4( saturn_state *cpustate, int op1, int op2, int op3, int op4 )
{
logerror( "SATURN '%s' invalid opcode %x%x%x%x at %05x\n",
- cpustate->device->tag(), op1, op2, op3, op4, cpustate->pc-4 );
+ cpustate->device->tag(), op1, op2, op3, op4, cpustate->pc-4 );
}
static void saturn_invalid5( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5 )
{
logerror( "SATURN '%s' invalid opcode %x%x%x%x%x at %05x\n",
- cpustate->device->tag(), op1, op2, op3, op4, op5, cpustate->pc-5 );
+ cpustate->device->tag(), op1, op2, op3, op4, op5, cpustate->pc-5 );
}
static void saturn_invalid6( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5, int op6 )
{
logerror( "SATURN '%s' invalid opcode %x%x%x%x%x%x at %05x\n",
- cpustate->device->tag(), op1, op2, op3, op4, op5, op6, cpustate->pc-6 );
+ cpustate->device->tag(), op1, op2, op3, op4, op5, op6, cpustate->pc-6 );
}
diff --git a/src/emu/cpu/saturn/saturn.c b/src/emu/cpu/saturn/saturn.c
index 736deb4c8cb..82736f3d619 100644
--- a/src/emu/cpu/saturn/saturn.c
+++ b/src/emu/cpu/saturn/saturn.c
@@ -46,7 +46,7 @@ typedef SaturnNib Saturn64[16];
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/****************************************************************************
@@ -62,7 +62,7 @@ struct saturn_state
SaturnNib p; // 4 bit pointer
- UINT16 out; // 12 bit (packed)
+ UINT16 out; // 12 bit (packed)
UINT8 carry, decimal;
UINT16 st; // status 16 bit
@@ -72,14 +72,14 @@ struct saturn_state
#define SR 4 // Service Request
#define MP 8 // Module Pulled
- UINT8 nmi_state;
+ UINT8 nmi_state;
UINT8 irq_state;
UINT8 irq_enable; /* INTON / INTOFF */
UINT8 in_irq; /* already servicing IRQ */
- UINT8 pending_irq; /* IRQ is pending */
+ UINT8 pending_irq; /* IRQ is pending */
UINT8 sleeping; /* low-consumption state */
- int monitor_id;
- int monitor_in;
+ int monitor_id;
+ int monitor_in;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
@@ -248,37 +248,37 @@ static CPU_SET_INFO( saturn )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: saturn_set_nmi_line(cpustate, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: saturn_set_irq_line(cpustate, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SATURN_WAKEUP_LINE: saturn_set_wakeup_line(cpustate, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: saturn_set_nmi_line(cpustate, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: saturn_set_irq_line(cpustate, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SATURN_WAKEUP_LINE: saturn_set_wakeup_line(cpustate, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SATURN_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_D0: cpustate->d[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_D1: cpustate->d[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_A: IntReg64(cpustate->reg[A], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_B: IntReg64(cpustate->reg[B], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_C: IntReg64(cpustate->reg[C], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_D: IntReg64(cpustate->reg[D], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_R0: IntReg64(cpustate->reg[R0], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_R1: IntReg64(cpustate->reg[R1], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_R2: IntReg64(cpustate->reg[R2], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_R3: IntReg64(cpustate->reg[R3], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_R4: IntReg64(cpustate->reg[R4], info->i); break;
- case CPUINFO_INT_REGISTER + SATURN_P: cpustate->p = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_OUT: cpustate->out = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_CARRY: cpustate->carry = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_ST: cpustate->st = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_HST: cpustate->hst = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK0: cpustate->rstk[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK1: cpustate->rstk[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK2: cpustate->rstk[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK3: cpustate->rstk[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK4: cpustate->rstk[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK5: cpustate->rstk[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK6: cpustate->rstk[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK7: cpustate->rstk[7] = info->i; break;
- case CPUINFO_INT_REGISTER + SATURN_SLEEPING: cpustate->sleeping = info->i;
+ case CPUINFO_INT_REGISTER + SATURN_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_D0: cpustate->d[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_D1: cpustate->d[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_A: IntReg64(cpustate->reg[A], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_B: IntReg64(cpustate->reg[B], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_C: IntReg64(cpustate->reg[C], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_D: IntReg64(cpustate->reg[D], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_R0: IntReg64(cpustate->reg[R0], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_R1: IntReg64(cpustate->reg[R1], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_R2: IntReg64(cpustate->reg[R2], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_R3: IntReg64(cpustate->reg[R3], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_R4: IntReg64(cpustate->reg[R4], info->i); break;
+ case CPUINFO_INT_REGISTER + SATURN_P: cpustate->p = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_OUT: cpustate->out = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_CARRY: cpustate->carry = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_ST: cpustate->st = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_HST: cpustate->hst = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK0: cpustate->rstk[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK1: cpustate->rstk[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK2: cpustate->rstk[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK3: cpustate->rstk[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK4: cpustate->rstk[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK5: cpustate->rstk[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK6: cpustate->rstk[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK7: cpustate->rstk[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SATURN_SLEEPING: cpustate->sleeping = info->i;
}
}
@@ -305,106 +305,106 @@ CPU_GET_INFO( saturn )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(saturn_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; /* 20 nibbles max */ break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 21; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: info->i = cpustate->nmi_state; break;
- case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: info->i = cpustate->irq_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(saturn_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; /* 20 nibbles max */ break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 21; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: info->i = cpustate->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: info->i = cpustate->irq_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SATURN_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + SATURN_D0: info->i = cpustate->d[0]; break;
- case CPUINFO_INT_REGISTER + SATURN_D1: info->i = cpustate->d[1]; break;
-
- case CPUINFO_INT_REGISTER + SATURN_A: info->i = Reg64Int(cpustate->reg[A]); break;
- case CPUINFO_INT_REGISTER + SATURN_B: info->i = Reg64Int(cpustate->reg[B]); break;
- case CPUINFO_INT_REGISTER + SATURN_C: info->i = Reg64Int(cpustate->reg[C]); break;
- case CPUINFO_INT_REGISTER + SATURN_D: info->i = Reg64Int(cpustate->reg[D]); break;
- case CPUINFO_INT_REGISTER + SATURN_R0: info->i = Reg64Int(cpustate->reg[R0]); break;
- case CPUINFO_INT_REGISTER + SATURN_R1: info->i = Reg64Int(cpustate->reg[R1]); break;
- case CPUINFO_INT_REGISTER + SATURN_R2: info->i = Reg64Int(cpustate->reg[R2]); break;
- case CPUINFO_INT_REGISTER + SATURN_R3: info->i = Reg64Int(cpustate->reg[R3]); break;
- case CPUINFO_INT_REGISTER + SATURN_R4: info->i = Reg64Int(cpustate->reg[R4]); break;
-
- case CPUINFO_INT_REGISTER + SATURN_P: info->i = cpustate->p; break;
- case CPUINFO_INT_REGISTER + SATURN_OUT: info->i = cpustate->out; break;
- case CPUINFO_INT_REGISTER + SATURN_CARRY: info->i = cpustate->carry; break;
- case CPUINFO_INT_REGISTER + SATURN_ST: info->i = cpustate->st; break;
- case CPUINFO_INT_REGISTER + SATURN_HST: info->i = cpustate->hst; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK0: info->i = cpustate->rstk[0]; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK1: info->i = cpustate->rstk[1]; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK2: info->i = cpustate->rstk[2]; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK3: info->i = cpustate->rstk[3]; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK4: info->i = cpustate->rstk[4]; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK5: info->i = cpustate->rstk[5]; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK6: info->i = cpustate->rstk[6]; break;
- case CPUINFO_INT_REGISTER + SATURN_RSTK7: info->i = cpustate->rstk[7]; break;
- case CPUINFO_INT_REGISTER + SATURN_SLEEPING: info->i = cpustate->sleeping;
+ case CPUINFO_INT_REGISTER + SATURN_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + SATURN_D0: info->i = cpustate->d[0]; break;
+ case CPUINFO_INT_REGISTER + SATURN_D1: info->i = cpustate->d[1]; break;
+
+ case CPUINFO_INT_REGISTER + SATURN_A: info->i = Reg64Int(cpustate->reg[A]); break;
+ case CPUINFO_INT_REGISTER + SATURN_B: info->i = Reg64Int(cpustate->reg[B]); break;
+ case CPUINFO_INT_REGISTER + SATURN_C: info->i = Reg64Int(cpustate->reg[C]); break;
+ case CPUINFO_INT_REGISTER + SATURN_D: info->i = Reg64Int(cpustate->reg[D]); break;
+ case CPUINFO_INT_REGISTER + SATURN_R0: info->i = Reg64Int(cpustate->reg[R0]); break;
+ case CPUINFO_INT_REGISTER + SATURN_R1: info->i = Reg64Int(cpustate->reg[R1]); break;
+ case CPUINFO_INT_REGISTER + SATURN_R2: info->i = Reg64Int(cpustate->reg[R2]); break;
+ case CPUINFO_INT_REGISTER + SATURN_R3: info->i = Reg64Int(cpustate->reg[R3]); break;
+ case CPUINFO_INT_REGISTER + SATURN_R4: info->i = Reg64Int(cpustate->reg[R4]); break;
+
+ case CPUINFO_INT_REGISTER + SATURN_P: info->i = cpustate->p; break;
+ case CPUINFO_INT_REGISTER + SATURN_OUT: info->i = cpustate->out; break;
+ case CPUINFO_INT_REGISTER + SATURN_CARRY: info->i = cpustate->carry; break;
+ case CPUINFO_INT_REGISTER + SATURN_ST: info->i = cpustate->st; break;
+ case CPUINFO_INT_REGISTER + SATURN_HST: info->i = cpustate->hst; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK0: info->i = cpustate->rstk[0]; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK1: info->i = cpustate->rstk[1]; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK2: info->i = cpustate->rstk[2]; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK3: info->i = cpustate->rstk[3]; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK4: info->i = cpustate->rstk[4]; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK5: info->i = cpustate->rstk[5]; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK6: info->i = cpustate->rstk[6]; break;
+ case CPUINFO_INT_REGISTER + SATURN_RSTK7: info->i = cpustate->rstk[7]; break;
+ case CPUINFO_INT_REGISTER + SATURN_SLEEPING: info->i = cpustate->sleeping;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(saturn); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(saturn); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(saturn); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(saturn); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(saturn); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(saturn); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(saturn); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(saturn); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(saturn); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(saturn); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Saturn"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Saturn"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0alpha"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
-
- case CPUINFO_STR_REGISTER + SATURN_PC: sprintf(info->s, "PC: %.5x", cpustate->pc);break;
- case CPUINFO_STR_REGISTER + SATURN_D0: sprintf(info->s, "D0: %.5x", cpustate->d[0]);break;
- case CPUINFO_STR_REGISTER + SATURN_D1: sprintf(info->s, "D1: %.5x", cpustate->d[1]);break;
- case CPUINFO_STR_REGISTER + SATURN_A: sprintf(info->s, "A: " Reg64Format, Reg64Data(cpustate->reg[A]));break;
- case CPUINFO_STR_REGISTER + SATURN_B: sprintf(info->s, "B: " Reg64Format, Reg64Data(cpustate->reg[B]));break;
- case CPUINFO_STR_REGISTER + SATURN_C: sprintf(info->s, "C: " Reg64Format, Reg64Data(cpustate->reg[C]));break;
- case CPUINFO_STR_REGISTER + SATURN_D: sprintf(info->s, "D: " Reg64Format, Reg64Data(cpustate->reg[D]));break;
- case CPUINFO_STR_REGISTER + SATURN_R0: sprintf(info->s, "R0: " Reg64Format, Reg64Data(cpustate->reg[R0]));break;
- case CPUINFO_STR_REGISTER + SATURN_R1: sprintf(info->s, "R1: " Reg64Format, Reg64Data(cpustate->reg[R1]));break;
- case CPUINFO_STR_REGISTER + SATURN_R2: sprintf(info->s, "R2: " Reg64Format, Reg64Data(cpustate->reg[R2]));break;
- case CPUINFO_STR_REGISTER + SATURN_R3: sprintf(info->s, "R3: " Reg64Format, Reg64Data(cpustate->reg[R3]));break;
- case CPUINFO_STR_REGISTER + SATURN_R4: sprintf(info->s, "R4: " Reg64Format, Reg64Data(cpustate->reg[R4]));break;
- case CPUINFO_STR_REGISTER + SATURN_P: sprintf(info->s, "P:%x", cpustate->p);break;
- case CPUINFO_STR_REGISTER + SATURN_OUT: sprintf(info->s, "OUT:%.3x", cpustate->out);break;
- case CPUINFO_STR_REGISTER + SATURN_CARRY: sprintf(info->s, "Carry: %d", cpustate->carry);break;
- case CPUINFO_STR_REGISTER + SATURN_ST: sprintf(info->s, "ST:%.4x", cpustate->st);break;
- case CPUINFO_STR_REGISTER + SATURN_HST: sprintf(info->s, "HST:%x", cpustate->hst);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK0: sprintf(info->s, "RSTK0:%.5x", cpustate->rstk[0]);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK1: sprintf(info->s, "RSTK1:%.5x", cpustate->rstk[1]);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK2: sprintf(info->s, "RSTK2:%.5x", cpustate->rstk[2]);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK3: sprintf(info->s, "RSTK3:%.5x", cpustate->rstk[3]);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK4: sprintf(info->s, "RSTK4:%.5x", cpustate->rstk[4]);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK5: sprintf(info->s, "RSTK5:%.5x", cpustate->rstk[5]);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK6: sprintf(info->s, "RSTK6:%.5x", cpustate->rstk[6]);break;
- case CPUINFO_STR_REGISTER + SATURN_RSTK7: sprintf(info->s, "RSTK7:%.5x", cpustate->rstk[7]);break;
- case CPUINFO_STR_REGISTER + SATURN_IRQ_STATE: sprintf(info->s, "IRQ:%c%c%c%i", cpustate->in_irq?'S':'.', cpustate->irq_enable?'e':'.', cpustate->pending_irq?'p':'.', cpustate->irq_state); break;
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", cpustate->decimal?'D':'.', cpustate->carry ? 'C':'.'); break;
- case CPUINFO_STR_REGISTER + SATURN_SLEEPING: sprintf(info->s, "sleep:%c", cpustate->sleeping?'S':'.'); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Saturn"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Saturn"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0alpha"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
+
+ case CPUINFO_STR_REGISTER + SATURN_PC: sprintf(info->s, "PC: %.5x", cpustate->pc);break;
+ case CPUINFO_STR_REGISTER + SATURN_D0: sprintf(info->s, "D0: %.5x", cpustate->d[0]);break;
+ case CPUINFO_STR_REGISTER + SATURN_D1: sprintf(info->s, "D1: %.5x", cpustate->d[1]);break;
+ case CPUINFO_STR_REGISTER + SATURN_A: sprintf(info->s, "A: " Reg64Format, Reg64Data(cpustate->reg[A]));break;
+ case CPUINFO_STR_REGISTER + SATURN_B: sprintf(info->s, "B: " Reg64Format, Reg64Data(cpustate->reg[B]));break;
+ case CPUINFO_STR_REGISTER + SATURN_C: sprintf(info->s, "C: " Reg64Format, Reg64Data(cpustate->reg[C]));break;
+ case CPUINFO_STR_REGISTER + SATURN_D: sprintf(info->s, "D: " Reg64Format, Reg64Data(cpustate->reg[D]));break;
+ case CPUINFO_STR_REGISTER + SATURN_R0: sprintf(info->s, "R0: " Reg64Format, Reg64Data(cpustate->reg[R0]));break;
+ case CPUINFO_STR_REGISTER + SATURN_R1: sprintf(info->s, "R1: " Reg64Format, Reg64Data(cpustate->reg[R1]));break;
+ case CPUINFO_STR_REGISTER + SATURN_R2: sprintf(info->s, "R2: " Reg64Format, Reg64Data(cpustate->reg[R2]));break;
+ case CPUINFO_STR_REGISTER + SATURN_R3: sprintf(info->s, "R3: " Reg64Format, Reg64Data(cpustate->reg[R3]));break;
+ case CPUINFO_STR_REGISTER + SATURN_R4: sprintf(info->s, "R4: " Reg64Format, Reg64Data(cpustate->reg[R4]));break;
+ case CPUINFO_STR_REGISTER + SATURN_P: sprintf(info->s, "P:%x", cpustate->p);break;
+ case CPUINFO_STR_REGISTER + SATURN_OUT: sprintf(info->s, "OUT:%.3x", cpustate->out);break;
+ case CPUINFO_STR_REGISTER + SATURN_CARRY: sprintf(info->s, "Carry: %d", cpustate->carry);break;
+ case CPUINFO_STR_REGISTER + SATURN_ST: sprintf(info->s, "ST:%.4x", cpustate->st);break;
+ case CPUINFO_STR_REGISTER + SATURN_HST: sprintf(info->s, "HST:%x", cpustate->hst);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK0: sprintf(info->s, "RSTK0:%.5x", cpustate->rstk[0]);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK1: sprintf(info->s, "RSTK1:%.5x", cpustate->rstk[1]);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK2: sprintf(info->s, "RSTK2:%.5x", cpustate->rstk[2]);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK3: sprintf(info->s, "RSTK3:%.5x", cpustate->rstk[3]);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK4: sprintf(info->s, "RSTK4:%.5x", cpustate->rstk[4]);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK5: sprintf(info->s, "RSTK5:%.5x", cpustate->rstk[5]);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK6: sprintf(info->s, "RSTK6:%.5x", cpustate->rstk[6]);break;
+ case CPUINFO_STR_REGISTER + SATURN_RSTK7: sprintf(info->s, "RSTK7:%.5x", cpustate->rstk[7]);break;
+ case CPUINFO_STR_REGISTER + SATURN_IRQ_STATE: sprintf(info->s, "IRQ:%c%c%c%i", cpustate->in_irq?'S':'.', cpustate->irq_enable?'e':'.', cpustate->pending_irq?'p':'.', cpustate->irq_state); break;
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", cpustate->decimal?'D':'.', cpustate->carry ? 'C':'.'); break;
+ case CPUINFO_STR_REGISTER + SATURN_SLEEPING: sprintf(info->s, "sleep:%c", cpustate->sleeping?'S':'.'); break;
}
}
diff --git a/src/emu/cpu/saturn/saturn.h b/src/emu/cpu/saturn/saturn.h
index 5544e0bf553..fabd069e4b7 100644
--- a/src/emu/cpu/saturn/saturn.h
+++ b/src/emu/cpu/saturn/saturn.h
@@ -46,9 +46,9 @@ HP38G 09/??/95 1LT8 Yorke
#define _SATURN_H
-#define SATURN_INT_NONE 0
-#define SATURN_INT_IRQ 1
-#define SATURN_INT_NMI 2
+#define SATURN_INT_NONE 0
+#define SATURN_INT_IRQ 1
+#define SATURN_INT_NMI 2
struct saturn_cpu_core
{
diff --git a/src/emu/cpu/saturn/saturnds.c b/src/emu/cpu/saturn/saturnds.c
index 0db10df7768..76ed7b1defa 100644
--- a/src/emu/cpu/saturn/saturnds.c
+++ b/src/emu/cpu/saturn/saturnds.c
@@ -54,20 +54,20 @@ static const char *const adr_af[]=
{ P, WP, XS, X, S, M, B, W, 0, 0, 0, 0, 0, 0, 0, A };
static const char *const adr_a[]=
- { P, WP, XS, X, S, M, B, W };
+ { P, WP, XS, X, S, M, B, W };
static const char number_2_hex[]=
{ '0', '1', '2', '3', '4', '5', '6', '7', '8', '9', 'a', 'b', 'c', 'd', 'e', 'f' };
-#define SATURN_PEEKOP_DIS8(v) v = (INT8)( oprom[pos] | ( oprom[pos+1] << 4 ) ); pos+= 2;
+#define SATURN_PEEKOP_DIS8(v) v = (INT8)( oprom[pos] | ( oprom[pos+1] << 4 ) ); pos+= 2;
-#define SATURN_PEEKOP_DIS12(v) v = oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ); \
- pos += 3; \
- if ( v & 0x0800 ) v = -0x1000 + v;
+#define SATURN_PEEKOP_DIS12(v) v = oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ); \
+ pos += 3; \
+ if ( v & 0x0800 ) v = -0x1000 + v;
-#define SATURN_PEEKOP_DIS16(v) v = (INT16)( oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ) | ( oprom[pos+3] << 12 ) ); pos += 4;
+#define SATURN_PEEKOP_DIS16(v) v = (INT16)( oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ) | ( oprom[pos+3] << 12 ) ); pos += 4;
-#define SATURN_PEEKOP_ADR(v) v = oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ) | ( oprom[pos+3] << 12 ) | ( oprom[pos+4] << 16 ); pos += 5;
+#define SATURN_PEEKOP_ADR(v) v = oprom[pos] | ( oprom[pos+1] << 4 ) | ( oprom[pos+2] << 8 ) | ( oprom[pos+3] << 12 ) | ( oprom[pos+4] << 16 ); pos += 5;
// don't split branch and return, source relies on this ordering
@@ -202,353 +202,353 @@ enum MNEMONICS
static const struct {
const char *name[2];
} mnemonics[]={
- { { "rtn", "RET" } },
- { { "rtnsXM", "RETSETXM" } },
- { { "rtnsC", "RETSETC" } },
- { { "rtncC", "RETCLRC" } },
- { { "rti", "RETI" } },
- { { "goto %05x", "JUMP.3 %05x" } },
- { { "goto %05x", "JUMP.4 %05x" } },
- { { "goto %05x", "JUMP %05x" } },
- { { "gosub %05x", "CALL.3 %05x" } },
- { { "gosub %05x", "CALL.4 %05x" } },
- { { "gosub %05x", "CALL %05x" } },
- { { "goC %05x", "BRCS %05x" } },
- { { "rtnC", "RETCS" } },
- { { "gonC %05x", "BRCC %05x" } },
- { { "rtnnC", "RETCC" } },
-
- { { "OUT=CS", "OUT.S C" } },
- { { "OUT=C", "OUT.X C" } },
- { { "A=IN", "IN.4 A" } },
- { { "C=IN", "IN.4 C" } },
- { { "uncnfg", "UNCNFG" } },
- { { "config", "CONFIG" } },
- { { "C=id", "MOVE.A ID,C" } },
- { { "!shutdn", "!SHUTDN" } },
- { { "C+P+1", "ADD.A P+1,C" } },
- { { "reset", "RESET" } },
- { { "!buscc", "!BUSCC" } },
- { { "C=P %x", "MOVE.1 P,C,%x" } },
- { { "P=C %x", "MOVE.1 C,%x,P" } },
- { { "!sreq?", "!SREQ" } },
- { { "CPex %x", "SWAP.1 P,C,%x" } },
-
- { { "!inton", "!INTON" } },
- { { "LA %-2x %s", "MOVE.P%-2x %s,A" } },
- { { "!buscb", "!BUSCB" } },
- { { "Abit=0 %x", "CLRB %x,A" } },
- { { "Abit=1 %x", "SETB %x,A" } },
- { { "?Abit=0 %x,%05x", "BRBC %x,A,%05x" } },
- { { "?Abit=0 %x,rtn", "RETBC %x,A" } },
- { { "?Abit=1 %x,%05x", "BRBS %x,A,%05x" } },
- { { "?Abit=1 %x,rtn", "RETBS %x,A" } },
- { { "Cbit=0 %x", "CLRB %x,C" } },
- { { "Cbit=1 %x", "SETB %x,C" } },
- { { "?Cbit=0 %x,%05x", "BRBC %x,C,%05x" } },
- { { "?Cbit=0 %x,rtn", "RETBC %x,C" } },
- { { "?Cbit=1 %x,%05x", "BRBS %x,C,%05x" } },
- { { "?Cbit=1 %x,rtn", "RETBS %x,C" } },
+ { { "rtn", "RET" } },
+ { { "rtnsXM", "RETSETXM" } },
+ { { "rtnsC", "RETSETC" } },
+ { { "rtncC", "RETCLRC" } },
+ { { "rti", "RETI" } },
+ { { "goto %05x", "JUMP.3 %05x" } },
+ { { "goto %05x", "JUMP.4 %05x" } },
+ { { "goto %05x", "JUMP %05x" } },
+ { { "gosub %05x", "CALL.3 %05x" } },
+ { { "gosub %05x", "CALL.4 %05x" } },
+ { { "gosub %05x", "CALL %05x" } },
+ { { "goC %05x", "BRCS %05x" } },
+ { { "rtnC", "RETCS" } },
+ { { "gonC %05x", "BRCC %05x" } },
+ { { "rtnnC", "RETCC" } },
+
+ { { "OUT=CS", "OUT.S C" } },
+ { { "OUT=C", "OUT.X C" } },
+ { { "A=IN", "IN.4 A" } },
+ { { "C=IN", "IN.4 C" } },
+ { { "uncnfg", "UNCNFG" } },
+ { { "config", "CONFIG" } },
+ { { "C=id", "MOVE.A ID,C" } },
+ { { "!shutdn", "!SHUTDN" } },
+ { { "C+P+1", "ADD.A P+1,C" } },
+ { { "reset", "RESET" } },
+ { { "!buscc", "!BUSCC" } },
+ { { "C=P %x", "MOVE.1 P,C,%x" } },
+ { { "P=C %x", "MOVE.1 C,%x,P" } },
+ { { "!sreq?", "!SREQ" } },
+ { { "CPex %x", "SWAP.1 P,C,%x" } },
+
+ { { "!inton", "!INTON" } },
+ { { "LA %-2x %s", "MOVE.P%-2x %s,A" } },
+ { { "!buscb", "!BUSCB" } },
+ { { "Abit=0 %x", "CLRB %x,A" } },
+ { { "Abit=1 %x", "SETB %x,A" } },
+ { { "?Abit=0 %x,%05x", "BRBC %x,A,%05x" } },
+ { { "?Abit=0 %x,rtn", "RETBC %x,A" } },
+ { { "?Abit=1 %x,%05x", "BRBS %x,A,%05x" } },
+ { { "?Abit=1 %x,rtn", "RETBS %x,A" } },
+ { { "Cbit=0 %x", "CLRB %x,C" } },
+ { { "Cbit=1 %x", "SETB %x,C" } },
+ { { "?Cbit=0 %x,%05x", "BRBC %x,C,%05x" } },
+ { { "?Cbit=0 %x,rtn", "RETBC %x,C" } },
+ { { "?Cbit=1 %x,%05x", "BRBS %x,C,%05x" } },
+ { { "?Cbit=1 %x,rtn", "RETBS %x,C" } },
{ { "PC=(A)", "JUMP.A @A" } },
- { { "!buscd", "!BUSCD" } },
- { { "PC=(C)", "JUMP.A @C" } },
- { { "!intoff", "!INTOFF" } },
- { { "!rsi", "!RSI" } },
-
- { { "PC=A", "JUMP.A A" } },
- { { "PC=C", "JUMP.A C" } },
- { { "A=PC", "MOVE.A PC,A" } },
- { { "C=PC", "MOVE.A PC,C" } },
- { { "APCex", "SWAP.A A,PC" } },
- { { "CPCex", "SWAP.A C,PC" } },
-
- { { "HST=0 %x", "CLRHST %x" } },
- { { "?HST=0 %x,%05x", "BRBCHST %x,%05x" } },
- { { "?HST=0 %x,rtn", "RETBCHST %x" } },
- { { "ST=0 %x", "CLRB %x,ST" } },
- { { "ST=1 %x", "SETB %x,ST" } },
- { { "?ST=0 %x,%05x", "BRBC ST,%x,%05x" } },
- { { "?ST=0 %x,rtn", "RETBC ST,%x" } },
- { { "?ST=1 %x,%05x", "BRBS ST,%x,%05x" } },
- { { "?ST=1 %x,rtn", "RETBS ST,%x" } },
- { { "?P# %x,%05x", "BRNE P,%x,%05x" } },
- { { "?P# %x,rtn", "RETNE P,%x" } },
- { { "?P= %x,%05x", "BREQ P,%x,%05x" } },
- { { "?P= %x,rtn", "RETEQ P,%x" } },
-
- { { "?A=B %s,%05x", "BREQ.%-2s A,B,%05x" } },
- { { "?A=B %s,rtn", "RETEQ.%-2s A,B" } },
- { { "?B=C %s,%05x", "BREQ.%-2s B,C,%05x" } },
- { { "?B=C %s,rtn", "RETEQ.%-2s B,C" } },
- { { "?A=C %s,%05x", "BREQ.%-2s A,C,%05x" } },
- { { "?A=C %s,rtn", "RETEQ.%-2s A,C" } },
- { { "?C=D %s,%05x", "BREQ.%-2s C,D,%05x" } },
- { { "?C=D %s,rtn", "RETEQ.%-2s C,D" } },
- { { "?A#B %s,%05x", "BRNE.%-2s A,B,%05x" } },
- { { "?A#B %s,rtn", "RETNE.%-2s A,B" } },
- { { "?B#C %s,%05x", "BRNE.%-2s B,C,%05x" } },
- { { "?B#C %s,rtn", "RETNE.%-2s B,C" } },
- { { "?A#C %s,%05x", "BRNE.%-2s A,C,%05x" } },
- { { "?A#C %s,rtn", "RETNE.%-2s A,C" } },
- { { "?C#D %s,%05x", "BRNE.%-2s C,D,%05x" } },
- { { "?C#D %s,rtn", "RETNE.%-2s C,D" } },
- { { "?A=0 %s,%05x", "BRZ.%-2s A,%05x" } },
- { { "?A=0 %s,rtn", "RETZ.%-2s A" } },
- { { "?B=0 %s,%05x", "BRZ.%-2s B,%05x" } },
- { { "?B=0 %s,rtn", "RETZ.%-2s B" } },
- { { "?C=0 %s,%05x", "BRZ.%-2s C,%05x" } },
- { { "?C=0 %s,rtn", "RETZ.%-2s C" } },
- { { "?D=0 %s,%05x", "BRZ.%-2s D,%05x" } },
- { { "?D=0 %s,rtn", "RETZ.%-2s D" } },
- { { "?A#0 %s,%05x", "BRNZ.%-2s A,%05x" } },
- { { "?A#0 %s,rtn", "RETNZ.%-2s A" } },
- { { "?B#0 %s,%05x", "BRNZ.%-2s B,%05x" } },
- { { "?B#0 %s,rtn", "RETNZ.%-2s B" } },
- { { "?C#0 %s,%05x", "BRNZ.%-2s C,%05x" } },
- { { "?C#0 %s,rtn", "RETNZ.%-2s C" } },
- { { "?D#0 %s,%05x", "BRNZ.%-2s D,%05x" } },
- { { "?D#0 %s,rtn", "RETNZ.%-2s D" } },
-
- { { "?A>B %s,%05x", "BRGT.%-2s A,B,%05x" } },
- { { "?A>B %s,rtn", "RETGT.%-2s A,B" } },
- { { "?B>C %s,%05x", "BRGT.%-2s B,C,%05x" } },
- { { "?B>C %s,rtn", "RETGT.%-2s B,C" } },
- { { "?C>A %s,%05x", "BRGT.%-2s C,A,%05x" } },
- { { "?C>A %s,rtn", "RETGT.%-2s C,A" } },
- { { "?D>C %s,%05x", "BRGT.%-2s D,C,%05x" } },
- { { "?D>C %s,rtn", "RETGT.%-2s D,C" } },
- { { "?A<B %s,%05x", "BRLT.%-2s A,B,%05x" } },
- { { "?A<B %s,rtn", "RETLT.%-2s A,B" } },
- { { "?B<C %s,%05x", "BRLT.%-2s B,C,%05x" } },
- { { "?B<C %s,rtn", "RETLT.%-2s B,C" } },
- { { "?C<A %s,%05x", "BRLT.%-2s C,A,%05x" } },
- { { "?C<A %s,rtn", "RETLT.%-2s C,A" } },
- { { "?D<C %s,%05x", "BRLT.%-2s D,C,%05x" } },
- { { "?D<C %s,rtn", "RETLT.%-2s D,C" } },
- { { "?A>=B %s,%05x", "BRGE.%-2s A,B,%05x" } },
- { { "?A>=B %s,rtn", "RETGE.%-2s A,B" } },
- { { "?B>=C %s,%05x", "BRGE.%-2s B,C,%05x" } },
- { { "?B>=C %s,rtn", "RETGE.%-2s B,C" } },
- { { "?C>=A %s,%05x", "BRGE.%-2s C,A,%05x" } },
- { { "?C>=A %s,rtn", "RETGE.%-2s C,A" } },
- { { "?D>=C %s,%05x", "BRGE.%-2s D,C,%05x" } },
- { { "?D>=C %s,rtn", "RETGE.%-2s D,C" } },
- { { "?A<=B %s,%05x", "BRLE.%-2s A,B,%05x" } },
- { { "?A<=B %s,rtn", "RETLE.%-2s A,B" } },
- { { "?B<=C %s,%05x", "BRLE.%-2s B,C,%05x" } },
- { { "?B<=C %s,rtn", "RETLE.%-2s B,C" } },
- { { "?C<=A %s,%05x", "BRLE.%-2s C,A,%05x" } },
- { { "?C<=A %s,rtn", "RETLE.%-2s C,A" } },
- { { "?D<=C %s,%05x", "BRLE.%-2s D,C,%05x" } },
- { { "?D<=C %s,rtn", "RETLE.%-2s D,C" } },
-
- { { "sethex", "SETHEX" } },
- { { "setdec", "SETDEC" } },
- { { "RSTK=C", "PUSH.A C" } },
- { { "C=RSTK", "POP.A C" } },
+ { { "!buscd", "!BUSCD" } },
+ { { "PC=(C)", "JUMP.A @C" } },
+ { { "!intoff", "!INTOFF" } },
+ { { "!rsi", "!RSI" } },
+
+ { { "PC=A", "JUMP.A A" } },
+ { { "PC=C", "JUMP.A C" } },
+ { { "A=PC", "MOVE.A PC,A" } },
+ { { "C=PC", "MOVE.A PC,C" } },
+ { { "APCex", "SWAP.A A,PC" } },
+ { { "CPCex", "SWAP.A C,PC" } },
+
+ { { "HST=0 %x", "CLRHST %x" } },
+ { { "?HST=0 %x,%05x", "BRBCHST %x,%05x" } },
+ { { "?HST=0 %x,rtn", "RETBCHST %x" } },
+ { { "ST=0 %x", "CLRB %x,ST" } },
+ { { "ST=1 %x", "SETB %x,ST" } },
+ { { "?ST=0 %x,%05x", "BRBC ST,%x,%05x" } },
+ { { "?ST=0 %x,rtn", "RETBC ST,%x" } },
+ { { "?ST=1 %x,%05x", "BRBS ST,%x,%05x" } },
+ { { "?ST=1 %x,rtn", "RETBS ST,%x" } },
+ { { "?P# %x,%05x", "BRNE P,%x,%05x" } },
+ { { "?P# %x,rtn", "RETNE P,%x" } },
+ { { "?P= %x,%05x", "BREQ P,%x,%05x" } },
+ { { "?P= %x,rtn", "RETEQ P,%x" } },
+
+ { { "?A=B %s,%05x", "BREQ.%-2s A,B,%05x" } },
+ { { "?A=B %s,rtn", "RETEQ.%-2s A,B" } },
+ { { "?B=C %s,%05x", "BREQ.%-2s B,C,%05x" } },
+ { { "?B=C %s,rtn", "RETEQ.%-2s B,C" } },
+ { { "?A=C %s,%05x", "BREQ.%-2s A,C,%05x" } },
+ { { "?A=C %s,rtn", "RETEQ.%-2s A,C" } },
+ { { "?C=D %s,%05x", "BREQ.%-2s C,D,%05x" } },
+ { { "?C=D %s,rtn", "RETEQ.%-2s C,D" } },
+ { { "?A#B %s,%05x", "BRNE.%-2s A,B,%05x" } },
+ { { "?A#B %s,rtn", "RETNE.%-2s A,B" } },
+ { { "?B#C %s,%05x", "BRNE.%-2s B,C,%05x" } },
+ { { "?B#C %s,rtn", "RETNE.%-2s B,C" } },
+ { { "?A#C %s,%05x", "BRNE.%-2s A,C,%05x" } },
+ { { "?A#C %s,rtn", "RETNE.%-2s A,C" } },
+ { { "?C#D %s,%05x", "BRNE.%-2s C,D,%05x" } },
+ { { "?C#D %s,rtn", "RETNE.%-2s C,D" } },
+ { { "?A=0 %s,%05x", "BRZ.%-2s A,%05x" } },
+ { { "?A=0 %s,rtn", "RETZ.%-2s A" } },
+ { { "?B=0 %s,%05x", "BRZ.%-2s B,%05x" } },
+ { { "?B=0 %s,rtn", "RETZ.%-2s B" } },
+ { { "?C=0 %s,%05x", "BRZ.%-2s C,%05x" } },
+ { { "?C=0 %s,rtn", "RETZ.%-2s C" } },
+ { { "?D=0 %s,%05x", "BRZ.%-2s D,%05x" } },
+ { { "?D=0 %s,rtn", "RETZ.%-2s D" } },
+ { { "?A#0 %s,%05x", "BRNZ.%-2s A,%05x" } },
+ { { "?A#0 %s,rtn", "RETNZ.%-2s A" } },
+ { { "?B#0 %s,%05x", "BRNZ.%-2s B,%05x" } },
+ { { "?B#0 %s,rtn", "RETNZ.%-2s B" } },
+ { { "?C#0 %s,%05x", "BRNZ.%-2s C,%05x" } },
+ { { "?C#0 %s,rtn", "RETNZ.%-2s C" } },
+ { { "?D#0 %s,%05x", "BRNZ.%-2s D,%05x" } },
+ { { "?D#0 %s,rtn", "RETNZ.%-2s D" } },
+
+ { { "?A>B %s,%05x", "BRGT.%-2s A,B,%05x" } },
+ { { "?A>B %s,rtn", "RETGT.%-2s A,B" } },
+ { { "?B>C %s,%05x", "BRGT.%-2s B,C,%05x" } },
+ { { "?B>C %s,rtn", "RETGT.%-2s B,C" } },
+ { { "?C>A %s,%05x", "BRGT.%-2s C,A,%05x" } },
+ { { "?C>A %s,rtn", "RETGT.%-2s C,A" } },
+ { { "?D>C %s,%05x", "BRGT.%-2s D,C,%05x" } },
+ { { "?D>C %s,rtn", "RETGT.%-2s D,C" } },
+ { { "?A<B %s,%05x", "BRLT.%-2s A,B,%05x" } },
+ { { "?A<B %s,rtn", "RETLT.%-2s A,B" } },
+ { { "?B<C %s,%05x", "BRLT.%-2s B,C,%05x" } },
+ { { "?B<C %s,rtn", "RETLT.%-2s B,C" } },
+ { { "?C<A %s,%05x", "BRLT.%-2s C,A,%05x" } },
+ { { "?C<A %s,rtn", "RETLT.%-2s C,A" } },
+ { { "?D<C %s,%05x", "BRLT.%-2s D,C,%05x" } },
+ { { "?D<C %s,rtn", "RETLT.%-2s D,C" } },
+ { { "?A>=B %s,%05x", "BRGE.%-2s A,B,%05x" } },
+ { { "?A>=B %s,rtn", "RETGE.%-2s A,B" } },
+ { { "?B>=C %s,%05x", "BRGE.%-2s B,C,%05x" } },
+ { { "?B>=C %s,rtn", "RETGE.%-2s B,C" } },
+ { { "?C>=A %s,%05x", "BRGE.%-2s C,A,%05x" } },
+ { { "?C>=A %s,rtn", "RETGE.%-2s C,A" } },
+ { { "?D>=C %s,%05x", "BRGE.%-2s D,C,%05x" } },
+ { { "?D>=C %s,rtn", "RETGE.%-2s D,C" } },
+ { { "?A<=B %s,%05x", "BRLE.%-2s A,B,%05x" } },
+ { { "?A<=B %s,rtn", "RETLE.%-2s A,B" } },
+ { { "?B<=C %s,%05x", "BRLE.%-2s B,C,%05x" } },
+ { { "?B<=C %s,rtn", "RETLE.%-2s B,C" } },
+ { { "?C<=A %s,%05x", "BRLE.%-2s C,A,%05x" } },
+ { { "?C<=A %s,rtn", "RETLE.%-2s C,A" } },
+ { { "?D<=C %s,%05x", "BRLE.%-2s D,C,%05x" } },
+ { { "?D<=C %s,rtn", "RETLE.%-2s D,C" } },
+
+ { { "sethex", "SETHEX" } },
+ { { "setdec", "SETDEC" } },
+ { { "RSTK=C", "PUSH.A C" } },
+ { { "C=RSTK", "POP.A C" } },
// load immediate
- { { "D0= %02x", "MOVE.2 %02x,D0" } },
- { { "D0= %04x", "MOVE.4 %04x,D0" } },
- { { "D0= %05x", "MOVE.5 %05x,D0" } },
+ { { "D0= %02x", "MOVE.2 %02x,D0" } },
+ { { "D0= %04x", "MOVE.4 %04x,D0" } },
+ { { "D0= %05x", "MOVE.5 %05x,D0" } },
- { { "D1= %02x", "MOVE.2 %02x,D1" } },
- { { "D1= %04x", "MOVE.4 %04x,D1" } },
- { { "D1= %05x", "MOVE.5 %05x,D1" } },
+ { { "D1= %02x", "MOVE.2 %02x,D1" } },
+ { { "D1= %04x", "MOVE.4 %04x,D1" } },
+ { { "D1= %05x", "MOVE.5 %05x,D1" } },
- { { "P= %x", "MOVE %x,P" } },
- { { "lC %-2x %s", "MOVE.P%-2x %s,C" } },
+ { { "P= %x", "MOVE %x,P" } },
+ { { "lC %-2x %s", "MOVE.P%-2x %s,C" } },
- { { "clrST", "CLR.X ST" } },
- { { "C=ST", "MOVE.X ST,C" } },
- { { "ST=C", "MOVE.X C,ST" } },
- { { "CSTex", "SWAP.X C,ST" } },
+ { { "clrST", "CLR.X ST" } },
+ { { "C=ST", "MOVE.X ST,C" } },
+ { { "ST=C", "MOVE.X C,ST" } },
+ { { "CSTex", "SWAP.X C,ST" } },
- { { "P=P+1", "INC P" } },
- { { "P=P-1", "DEC P" } },
+ { { "P=P+1", "INC P" } },
+ { { "P=P-1", "DEC P" } },
// copy
- { { "R0=A %s", "MOVE.%-2s A,R0" } },
- { { "R1=A %s", "MOVE.%-2s A,R1" } },
- { { "R2=A %s", "MOVE.%-2s A,R2" } },
- { { "R3=A %s", "MOVE.%-2s A,R3" } },
- { { "R4=A %s", "MOVE.%-2s A,R4" } },
-
- { { "R0=C %s", "MOVE.%-2s C,R0" } },
- { { "R1=C %s", "MOVE.%-2s C,R1" } },
- { { "R2=C %s", "MOVE.%-2s C,R2" } },
- { { "R3=C %s", "MOVE.%-2s C,R3" } },
- { { "R4=C %s", "MOVE.%-2s C,R4" } },
-
- { { "A=R0 %s", "MOVE.%-2s R0,A" } },
- { { "A=R1 %s", "MOVE.%-2s R1,A" } },
- { { "A=R2 %s", "MOVE.%-2s R2,A" } },
- { { "A=R3 %s", "MOVE.%-2s R3,A" } },
- { { "A=R4 %s", "MOVE.%-2s R4,A" } },
-
- { { "C=R0 %s", "MOVE.%-2s R0,C" } },
- { { "C=R1 %s", "MOVE.%-2s R1,C" } },
- { { "C=R2 %s", "MOVE.%-2s R2,C" } },
- { { "C=R3 %s", "MOVE.%-2s R3,C" } },
- { { "C=R4 %s", "MOVE.%-2s R4,C" } },
-
- { { "D0=A", "MOVE.A A,D0" } },
- { { "D1=A", "MOVE.A A,D1" } },
- { { "D0=C", "MOVE.A C,D0" } },
- { { "D1=C", "MOVE.A C,D1" } },
- { { "D0=As", "MOVE.S A,D0" } },
- { { "D1=As", "MOVE.S A,D1" } },
- { { "D0=Cs", "MOVE.S C,D0" } },
- { { "D1=Cs", "MOVE.S C,D1" } },
+ { { "R0=A %s", "MOVE.%-2s A,R0" } },
+ { { "R1=A %s", "MOVE.%-2s A,R1" } },
+ { { "R2=A %s", "MOVE.%-2s A,R2" } },
+ { { "R3=A %s", "MOVE.%-2s A,R3" } },
+ { { "R4=A %s", "MOVE.%-2s A,R4" } },
+
+ { { "R0=C %s", "MOVE.%-2s C,R0" } },
+ { { "R1=C %s", "MOVE.%-2s C,R1" } },
+ { { "R2=C %s", "MOVE.%-2s C,R2" } },
+ { { "R3=C %s", "MOVE.%-2s C,R3" } },
+ { { "R4=C %s", "MOVE.%-2s C,R4" } },
+
+ { { "A=R0 %s", "MOVE.%-2s R0,A" } },
+ { { "A=R1 %s", "MOVE.%-2s R1,A" } },
+ { { "A=R2 %s", "MOVE.%-2s R2,A" } },
+ { { "A=R3 %s", "MOVE.%-2s R3,A" } },
+ { { "A=R4 %s", "MOVE.%-2s R4,A" } },
+
+ { { "C=R0 %s", "MOVE.%-2s R0,C" } },
+ { { "C=R1 %s", "MOVE.%-2s R1,C" } },
+ { { "C=R2 %s", "MOVE.%-2s R2,C" } },
+ { { "C=R3 %s", "MOVE.%-2s R3,C" } },
+ { { "C=R4 %s", "MOVE.%-2s R4,C" } },
+
+ { { "D0=A", "MOVE.A A,D0" } },
+ { { "D1=A", "MOVE.A A,D1" } },
+ { { "D0=C", "MOVE.A C,D0" } },
+ { { "D1=C", "MOVE.A C,D1" } },
+ { { "D0=As", "MOVE.S A,D0" } },
+ { { "D1=As", "MOVE.S A,D1" } },
+ { { "D0=Cs", "MOVE.S C,D0" } },
+ { { "D1=Cs", "MOVE.S C,D1" } },
// swap operations
- { { "AR0ex %s", "SWAP.%-2s A,R0" } },
- { { "AR1ex %s", "SWAP.%-2s A,R1" } },
- { { "AR2ex %s", "SWAP.%-2s A,R2" } },
- { { "AR3ex %s", "SWAP.%-2s A,R3" } },
- { { "AR4ex %s", "SWAP.%-2s A,R4" } },
-
- { { "CR0ex %s", "SWAP.%-2s C,R0" } },
- { { "CR1ex %s", "SWAP.%-2s C,R1" } },
- { { "CR2ex %s", "SWAP.%-2s C,R2" } },
- { { "CR3ex %s", "SWAP.%-2s C,R3" } },
- { { "CR4ex %s", "SWAP.%-2s C,R4" } },
-
- { { "AD0ex", "SWAP.A A,D0" } },
- { { "AD1ex", "SWAP.A A,D1" } },
- { { "CD0ex", "SWAP.A C,D0" } },
- { { "CD1ex", "SWAP.A C,D1" } },
- { { "AD0xs", "SWAP.S A,D0" } },
- { { "AD1xs", "SWAP.S A,D1" } },
- { { "CD0xs", "SWAP.S C,D0" } },
- { { "CD1xs", "SWAP.S C,D1" } },
+ { { "AR0ex %s", "SWAP.%-2s A,R0" } },
+ { { "AR1ex %s", "SWAP.%-2s A,R1" } },
+ { { "AR2ex %s", "SWAP.%-2s A,R2" } },
+ { { "AR3ex %s", "SWAP.%-2s A,R3" } },
+ { { "AR4ex %s", "SWAP.%-2s A,R4" } },
+
+ { { "CR0ex %s", "SWAP.%-2s C,R0" } },
+ { { "CR1ex %s", "SWAP.%-2s C,R1" } },
+ { { "CR2ex %s", "SWAP.%-2s C,R2" } },
+ { { "CR3ex %s", "SWAP.%-2s C,R3" } },
+ { { "CR4ex %s", "SWAP.%-2s C,R4" } },
+
+ { { "AD0ex", "SWAP.A A,D0" } },
+ { { "AD1ex", "SWAP.A A,D1" } },
+ { { "CD0ex", "SWAP.A C,D0" } },
+ { { "CD1ex", "SWAP.A C,D1" } },
+ { { "AD0xs", "SWAP.S A,D0" } },
+ { { "AD1xs", "SWAP.S A,D1" } },
+ { { "CD0xs", "SWAP.S C,D0" } },
+ { { "CD1xs", "SWAP.S C,D1" } },
// store
- { { "Dat0=A %s", "MOVE.%-2s A,@D0" } },
- { { "Dat1=A %s", "MOVE.%-2s A,@D0" } },
- { { "Dat0=C %s", "MOVE.%-2s C,@D0" } },
- { { "Dat1=C %s", "MOVE.%-2s C,@D0" } },
+ { { "Dat0=A %s", "MOVE.%-2s A,@D0" } },
+ { { "Dat1=A %s", "MOVE.%-2s A,@D0" } },
+ { { "Dat0=C %s", "MOVE.%-2s C,@D0" } },
+ { { "Dat1=C %s", "MOVE.%-2s C,@D0" } },
// load
- { { "A=Dat0 %s", "MOVE.%-2s @D0,A" } },
- { { "A=Dat1 %s", "MOVE.%-2s @D0,A" } },
- { { "C=Dat0 %s", "MOVE.%-2s @D0,C" } },
- { { "C=Dat1 %s", "MOVE.%-2s @D0,C" } },
+ { { "A=Dat0 %s", "MOVE.%-2s @D0,A" } },
+ { { "A=Dat1 %s", "MOVE.%-2s @D0,A" } },
+ { { "C=Dat0 %s", "MOVE.%-2s @D0,C" } },
+ { { "C=Dat1 %s", "MOVE.%-2s @D0,C" } },
// add/sub immediate
- { { "D0=D0+ %x", "ADD.A %x,D0" } },
- { { "D1=D1+ %x", "ADD.A %x,D1" } },
- { { "D0=D0- %x", "SUB.A %x,D0" } },
- { { "D1=D1- %x", "SUB.A %x,D1" } },
-
- { { "A=A+ %s,%x", "ADD.%-2s %x,A" } },
- { { "B=B+ %s,%x", "ADD.%-2s %x,B" } },
- { { "C=C+ %s,%x", "ADD.%-2s %x,C" } },
- { { "D=D+ %s,%x", "ADD.%-2s %x,D" } },
- { { "A=A- %s,%x", "SUB.%-2s %x,A" } },
- { { "B=B- %s,%x", "SUB.%-2s %x,B" } },
- { { "C=C- %s,%x", "SUB.%-2s %x,C" } },
- { { "D=D- %s,%x", "SUB.%-2s %x,D" } },
-
- { { "A=A&B %s", "AND.%-2s B,A" } },
- { { "B=B&C %s", "AND.%-2s C,B" } },
- { { "C=C&A %s", "AND.%-2s A,C" } },
- { { "D=D&C %s", "AND.%-2s C,D" } },
- { { "B=B&A %s", "AND.%-2s A,B" } },
- { { "C=C&B %s", "AND.%-2s B,C" } },
- { { "A=A&C %s", "AND.%-2s C,A" } },
- { { "C=C&D %s", "AND.%-2s D,C" } },
-
- { { "A=A!B %s", "OR.%-2s B,A" } },
- { { "B=B!C %s", "OR.%-2s C,B" } },
- { { "C=C!A %s", "OR.%-2s A,C" } },
- { { "D=D!C %s", "OR.%-2s C,D" } },
- { { "B=B!A %s", "OR.%-2s A,B" } },
- { { "C=C!B %s", "OR.%-2s B,C" } },
- { { "A=A!C %s", "OR.%-2s C,A" } },
- { { "C=C!D %s", "OR.%-2s D,C" } },
-
- { { "Asrb %s", "SRB.%-2s A" } },
- { { "Bsrb %s", "SRB.%-2s B" } },
- { { "Csrb %s", "SRB.%-2s C" } },
- { { "Dsrb %s", "SRB.%-2s D" } },
-
- { { "Aslc %s", "RLN.%-2s A" } },
- { { "Bslc %s", "RLN.%-2s B" } },
- { { "Cslc %s", "RLN.%-2s C" } },
- { { "Dslc %s", "RLN.%-2s D" } },
- { { "Asrc %s", "RRN.%-2s A" } },
- { { "Bsrc %s", "RRN.%-2s B" } },
- { { "Csrc %s", "RRN.%-2s C" } },
- { { "Dsrc %s", "RRN.%-2s D" } },
-
- { { "A=A+B %s", "ADD.%-2s B,A" } },
- { { "B=B+C %s", "ADD.%-2s C,B" } },
- { { "C=C+A %s", "ADD.%-2s A,C" } },
- { { "D=D+C %s", "ADD.%-2s C,D" } },
- { { "A=A+A %s", "ADD.%-2s A,A" } },
- { { "B=B+B %s", "ADD.%-2s B,B" } },
- { { "C=C+C %s", "ADD.%-2s C,C" } },
- { { "D=D+C %s", "ADD.%-2s D,D" } },
- { { "B=B+A %s", "ADD.%-2s A,B" } },
- { { "C=C+B %s", "ADD.%-2s B,C" } },
- { { "A=A+C %s", "ADD.%-2s C,A" } },
- { { "C=C+D %s", "ADD.%-2s D,C" } },
- { { "A=A-1 %s", "DEC.%-2s A" } },
- { { "B=B-1 %s", "DEC.%-2s B" } },
- { { "C=C-1 %s", "DEC.%-2s C" } },
- { { "D=D-1 %s", "DEC.%-2s D" } },
-
- { { "A=A-B %s", "ADD.%-2s B,A" } },
- { { "B=B-C %s", "ADD.%-2s C,B" } },
- { { "C=C-A %s", "ADD.%-2s A,C" } },
- { { "D=D-C %s", "ADD.%-2s C,D" } },
- { { "A=A+1 %s", "INC.%-2s A" } },
- { { "B=B+1 %s", "INC.%-2s B" } },
- { { "C=C+1 %s", "INC.%-2s C" } },
- { { "D=D+1 %s", "INC.%-2s D" } },
- { { "B=B-A %s", "SUB.%-2s A,B" } },
- { { "C=C-B %s", "SUB.%-2s B,C" } },
- { { "A=A-C %s", "SUB.%-2s C,A" } },
- { { "C=C-D %s", "SUB.%-2s D,C" } },
- { { "A=B-A %s", "SUBN.%-2s B,A" } },
- { { "B=C-B %s", "SUBN.%-2s C,B" } },
- { { "C=A-C %s", "SUBN.%-2s A,C" } },
- { { "D=C-D %s", "SUBN.%-2s C,D" } },
-
- { { "A=0 %s", "CLR.%-2s A" } },
- { { "B=0 %s", "CLR.%-2s B" } },
- { { "C=0 %s", "CLR.%-2s C" } },
- { { "D=0 %s", "CLR.%-2s D" } },
- { { "A=B %s", "MOVE.%-2s B,A" } },
- { { "B=C %s", "MOVE.%-2s C,B" } },
- { { "C=A %s", "MOVE.%-2s A,C" } },
- { { "D=C %s", "MOVE.%-2s C,D" } },
- { { "B=A %s", "MOVE.%-2s A,B" } },
- { { "C=B %s", "MOVE.%-2s B,C" } },
- { { "A=C %s", "MOVE.%-2s C,A" } },
- { { "C=D %s", "MOVE.%-2s D,C" } },
- { { "ABex %s", "SWAP.%-2s A,B" } },
- { { "BCex %s", "SWAP.%-2s B,C" } },
- { { "ACex %s", "SWAP.%-2s A,C" } },
- { { "CDex %s", "SWAP.%-2s C,D" } },
-
- { { "Asl %s", "SLN.%-2s A" } },
- { { "Bsl %s", "SLN.%-2s B" } },
- { { "Csl %s", "SLN.%-2s C" } },
- { { "Dsl %s", "SLN.%-2s D" } },
- { { "Asr %s", "SRN.%-2s A" } },
- { { "Bsr %s", "SRN.%-2s B" } },
- { { "Csr %s", "SRN.%-2s C" } },
- { { "Dsr %s", "SRN.%-2s D" } },
- { { "A=-A %s", "NEG.%-2s A" } },
- { { "B=-B %s", "NEG.%-2s B" } },
- { { "C=-C %s", "NEG.%-2s C" } },
- { { "D=-D %s", "NEG.%-2s D" } },
- { { "A=-A-1 %s", "NOT.%-2s A" } },
- { { "B=-B-1 %s", "NOT.%-2s B" } },
- { { "C=-C-1 %s", "NOT.%-2s C" } },
- { { "D=-D-1 %s", "NOT.%-2s D" } }
+ { { "D0=D0+ %x", "ADD.A %x,D0" } },
+ { { "D1=D1+ %x", "ADD.A %x,D1" } },
+ { { "D0=D0- %x", "SUB.A %x,D0" } },
+ { { "D1=D1- %x", "SUB.A %x,D1" } },
+
+ { { "A=A+ %s,%x", "ADD.%-2s %x,A" } },
+ { { "B=B+ %s,%x", "ADD.%-2s %x,B" } },
+ { { "C=C+ %s,%x", "ADD.%-2s %x,C" } },
+ { { "D=D+ %s,%x", "ADD.%-2s %x,D" } },
+ { { "A=A- %s,%x", "SUB.%-2s %x,A" } },
+ { { "B=B- %s,%x", "SUB.%-2s %x,B" } },
+ { { "C=C- %s,%x", "SUB.%-2s %x,C" } },
+ { { "D=D- %s,%x", "SUB.%-2s %x,D" } },
+
+ { { "A=A&B %s", "AND.%-2s B,A" } },
+ { { "B=B&C %s", "AND.%-2s C,B" } },
+ { { "C=C&A %s", "AND.%-2s A,C" } },
+ { { "D=D&C %s", "AND.%-2s C,D" } },
+ { { "B=B&A %s", "AND.%-2s A,B" } },
+ { { "C=C&B %s", "AND.%-2s B,C" } },
+ { { "A=A&C %s", "AND.%-2s C,A" } },
+ { { "C=C&D %s", "AND.%-2s D,C" } },
+
+ { { "A=A!B %s", "OR.%-2s B,A" } },
+ { { "B=B!C %s", "OR.%-2s C,B" } },
+ { { "C=C!A %s", "OR.%-2s A,C" } },
+ { { "D=D!C %s", "OR.%-2s C,D" } },
+ { { "B=B!A %s", "OR.%-2s A,B" } },
+ { { "C=C!B %s", "OR.%-2s B,C" } },
+ { { "A=A!C %s", "OR.%-2s C,A" } },
+ { { "C=C!D %s", "OR.%-2s D,C" } },
+
+ { { "Asrb %s", "SRB.%-2s A" } },
+ { { "Bsrb %s", "SRB.%-2s B" } },
+ { { "Csrb %s", "SRB.%-2s C" } },
+ { { "Dsrb %s", "SRB.%-2s D" } },
+
+ { { "Aslc %s", "RLN.%-2s A" } },
+ { { "Bslc %s", "RLN.%-2s B" } },
+ { { "Cslc %s", "RLN.%-2s C" } },
+ { { "Dslc %s", "RLN.%-2s D" } },
+ { { "Asrc %s", "RRN.%-2s A" } },
+ { { "Bsrc %s", "RRN.%-2s B" } },
+ { { "Csrc %s", "RRN.%-2s C" } },
+ { { "Dsrc %s", "RRN.%-2s D" } },
+
+ { { "A=A+B %s", "ADD.%-2s B,A" } },
+ { { "B=B+C %s", "ADD.%-2s C,B" } },
+ { { "C=C+A %s", "ADD.%-2s A,C" } },
+ { { "D=D+C %s", "ADD.%-2s C,D" } },
+ { { "A=A+A %s", "ADD.%-2s A,A" } },
+ { { "B=B+B %s", "ADD.%-2s B,B" } },
+ { { "C=C+C %s", "ADD.%-2s C,C" } },
+ { { "D=D+C %s", "ADD.%-2s D,D" } },
+ { { "B=B+A %s", "ADD.%-2s A,B" } },
+ { { "C=C+B %s", "ADD.%-2s B,C" } },
+ { { "A=A+C %s", "ADD.%-2s C,A" } },
+ { { "C=C+D %s", "ADD.%-2s D,C" } },
+ { { "A=A-1 %s", "DEC.%-2s A" } },
+ { { "B=B-1 %s", "DEC.%-2s B" } },
+ { { "C=C-1 %s", "DEC.%-2s C" } },
+ { { "D=D-1 %s", "DEC.%-2s D" } },
+
+ { { "A=A-B %s", "ADD.%-2s B,A" } },
+ { { "B=B-C %s", "ADD.%-2s C,B" } },
+ { { "C=C-A %s", "ADD.%-2s A,C" } },
+ { { "D=D-C %s", "ADD.%-2s C,D" } },
+ { { "A=A+1 %s", "INC.%-2s A" } },
+ { { "B=B+1 %s", "INC.%-2s B" } },
+ { { "C=C+1 %s", "INC.%-2s C" } },
+ { { "D=D+1 %s", "INC.%-2s D" } },
+ { { "B=B-A %s", "SUB.%-2s A,B" } },
+ { { "C=C-B %s", "SUB.%-2s B,C" } },
+ { { "A=A-C %s", "SUB.%-2s C,A" } },
+ { { "C=C-D %s", "SUB.%-2s D,C" } },
+ { { "A=B-A %s", "SUBN.%-2s B,A" } },
+ { { "B=C-B %s", "SUBN.%-2s C,B" } },
+ { { "C=A-C %s", "SUBN.%-2s A,C" } },
+ { { "D=C-D %s", "SUBN.%-2s C,D" } },
+
+ { { "A=0 %s", "CLR.%-2s A" } },
+ { { "B=0 %s", "CLR.%-2s B" } },
+ { { "C=0 %s", "CLR.%-2s C" } },
+ { { "D=0 %s", "CLR.%-2s D" } },
+ { { "A=B %s", "MOVE.%-2s B,A" } },
+ { { "B=C %s", "MOVE.%-2s C,B" } },
+ { { "C=A %s", "MOVE.%-2s A,C" } },
+ { { "D=C %s", "MOVE.%-2s C,D" } },
+ { { "B=A %s", "MOVE.%-2s A,B" } },
+ { { "C=B %s", "MOVE.%-2s B,C" } },
+ { { "A=C %s", "MOVE.%-2s C,A" } },
+ { { "C=D %s", "MOVE.%-2s D,C" } },
+ { { "ABex %s", "SWAP.%-2s A,B" } },
+ { { "BCex %s", "SWAP.%-2s B,C" } },
+ { { "ACex %s", "SWAP.%-2s A,C" } },
+ { { "CDex %s", "SWAP.%-2s C,D" } },
+
+ { { "Asl %s", "SLN.%-2s A" } },
+ { { "Bsl %s", "SLN.%-2s B" } },
+ { { "Csl %s", "SLN.%-2s C" } },
+ { { "Dsl %s", "SLN.%-2s D" } },
+ { { "Asr %s", "SRN.%-2s A" } },
+ { { "Bsr %s", "SRN.%-2s B" } },
+ { { "Csr %s", "SRN.%-2s C" } },
+ { { "Dsr %s", "SRN.%-2s D" } },
+ { { "A=-A %s", "NEG.%-2s A" } },
+ { { "B=-B %s", "NEG.%-2s B" } },
+ { { "C=-C %s", "NEG.%-2s C" } },
+ { { "D=-D %s", "NEG.%-2s D" } },
+ { { "A=-A-1 %s", "NOT.%-2s A" } },
+ { { "B=-B-1 %s", "NOT.%-2s B" } },
+ { { "C=-C-1 %s", "NOT.%-2s C" } },
+ { { "D=-D-1 %s", "NOT.%-2s D" } }
};
@@ -612,12 +612,12 @@ static const OPCODE opcodes[][0x10]= {
// first digit
{ Opcode0 },
{ Opcode1 },
- { Complete, Imm, PloadImm },
- { Complete, ImmCload, CloadImm },
- { Complete, BranchReturn, branchCarrySet},
- { Complete, BranchReturn, branchCarryClear },
- { Complete, Dis3, jump3 },
- { Complete, Dis3Call, call3 },
+ { Complete, Imm, PloadImm },
+ { Complete, ImmCload, CloadImm },
+ { Complete, BranchReturn, branchCarrySet},
+ { Complete, BranchReturn, branchCarryClear },
+ { Complete, Dis3, jump3 },
+ { Complete, Dis3Call, call3 },
{ Opcode8 },
{ Opcode9 },
{ OpcodeA },
@@ -627,31 +627,31 @@ static const OPCODE opcodes[][0x10]= {
{ OpcodeE },
{ OpcodeF }
}, { // 0
- { Complete, AdrNone, ReturnSetXM },
- { Complete, AdrNone, Return },
- { Complete, AdrNone, ReturnSetCarry },
- { Complete, AdrNone, ReturnClearCarry },
- { Complete, AdrNone, SetHexMode },
- { Complete, AdrNone, SetDecMode },
- { Complete, AdrNone, PushC },
- { Complete, AdrNone, PopC },
- { Complete, AdrNone, clearST },
- { Complete, AdrNone, CcopyST },
- { Complete, AdrNone, STcopyC },
- { Complete, AdrNone, swapCST },
- { Complete, AdrNone, incP },
- { Complete, AdrNone, decP },
+ { Complete, AdrNone, ReturnSetXM },
+ { Complete, AdrNone, Return },
+ { Complete, AdrNone, ReturnSetCarry },
+ { Complete, AdrNone, ReturnClearCarry },
+ { Complete, AdrNone, SetHexMode },
+ { Complete, AdrNone, SetDecMode },
+ { Complete, AdrNone, PushC },
+ { Complete, AdrNone, PopC },
+ { Complete, AdrNone, clearST },
+ { Complete, AdrNone, CcopyST },
+ { Complete, AdrNone, STcopyC },
+ { Complete, AdrNone, swapCST },
+ { Complete, AdrNone, incP },
+ { Complete, AdrNone, decP },
{ Opcode0E },
- { Complete, AdrNone, ReturnFromInterrupt }
+ { Complete, AdrNone, ReturnFromInterrupt }
}, { //0E
- { Opcode0Ea, AdrAF },
- { Opcode0Ea, AdrAF },
- { Opcode0Ea, AdrAF },
- { Opcode0Ea, AdrAF },
- { Opcode0Ea, AdrAF },
- { Opcode0Ea, AdrAF },
- { Opcode0Ea, AdrAF },
- { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
+ { Opcode0Ea, AdrAF },
{ Illegal },
{ Illegal },
{ Illegal },
@@ -659,24 +659,24 @@ static const OPCODE opcodes[][0x10]= {
{ Illegal },
{ Illegal },
{ Illegal },
- { Opcode0Ea, AdrAF }
+ { Opcode0Ea, AdrAF }
}, { //0Ea
- { Complete, AdrNone, AandB },
- { Complete, AdrNone, BandC },
- { Complete, AdrNone, CandA },
- { Complete, AdrNone, DandC },
- { Complete, AdrNone, BandA },
- { Complete, AdrNone, CandB },
- { Complete, AdrNone, AandC },
- { Complete, AdrNone, CandD },
- { Complete, AdrNone, AorB },
- { Complete, AdrNone, BorC },
- { Complete, AdrNone, CorA },
- { Complete, AdrNone, DorC },
- { Complete, AdrNone, BorA },
- { Complete, AdrNone, CorB },
- { Complete, AdrNone, AorC },
- { Complete, AdrNone, CorD }
+ { Complete, AdrNone, AandB },
+ { Complete, AdrNone, BandC },
+ { Complete, AdrNone, CandA },
+ { Complete, AdrNone, DandC },
+ { Complete, AdrNone, BandA },
+ { Complete, AdrNone, CandB },
+ { Complete, AdrNone, AandC },
+ { Complete, AdrNone, CandD },
+ { Complete, AdrNone, AorB },
+ { Complete, AdrNone, BorC },
+ { Complete, AdrNone, CorA },
+ { Complete, AdrNone, DorC },
+ { Complete, AdrNone, BorA },
+ { Complete, AdrNone, CorB },
+ { Complete, AdrNone, AorC },
+ { Complete, AdrNone, CorD }
}, { //1
{ Opcode10 },
{ Opcode11 },
@@ -684,198 +684,198 @@ static const OPCODE opcodes[][0x10]= {
{ Opcode13 },
{ Opcode14 },
{ Opcode15 },
- { Complete, ImmCount, D0addImm },
- { Complete, ImmCount, D1addImm },
- { Complete, ImmCount, D0subImm },
- { Complete, Imm2, D0loadImm2 },
- { Complete, Imm4, D0loadImm4 },
- { Complete, Imm5, D0loadImm5 },
- { Complete, ImmCount, D1subImm },
- { Complete, Imm2, D1loadImm2 },
- { Complete, Imm4, D1loadImm4 },
- { Complete, Imm5, D1loadImm5 }
+ { Complete, ImmCount, D0addImm },
+ { Complete, ImmCount, D1addImm },
+ { Complete, ImmCount, D0subImm },
+ { Complete, Imm2, D0loadImm2 },
+ { Complete, Imm4, D0loadImm4 },
+ { Complete, Imm5, D0loadImm5 },
+ { Complete, ImmCount, D1subImm },
+ { Complete, Imm2, D1loadImm2 },
+ { Complete, Imm4, D1loadImm4 },
+ { Complete, Imm5, D1loadImm5 }
}, { //10
- { Complete, FieldW, R0copyA },
- { Complete, FieldW, R1copyA },
- { Complete, FieldW, R2copyA },
- { Complete, FieldW, R3copyA },
- { Complete, FieldW, R4copyA },
+ { Complete, FieldW, R0copyA },
+ { Complete, FieldW, R1copyA },
+ { Complete, FieldW, R2copyA },
+ { Complete, FieldW, R3copyA },
+ { Complete, FieldW, R4copyA },
{ Illegal },
{ Illegal },
{ Illegal },
- { Complete, FieldW, R0copyC },
- { Complete, FieldW, R1copyC },
- { Complete, FieldW, R2copyC },
- { Complete, FieldW, R3copyC },
- { Complete, FieldW, R4copyC },
+ { Complete, FieldW, R0copyC },
+ { Complete, FieldW, R1copyC },
+ { Complete, FieldW, R2copyC },
+ { Complete, FieldW, R3copyC },
+ { Complete, FieldW, R4copyC },
{ Illegal },
{ Illegal },
{ Illegal }
}, { //11
- { Complete, FieldW, AcopyR0 },
- { Complete, FieldW, AcopyR1 },
- { Complete, FieldW, AcopyR2 },
- { Complete, FieldW, AcopyR3 },
- { Complete, FieldW, AcopyR4 },
+ { Complete, FieldW, AcopyR0 },
+ { Complete, FieldW, AcopyR1 },
+ { Complete, FieldW, AcopyR2 },
+ { Complete, FieldW, AcopyR3 },
+ { Complete, FieldW, AcopyR4 },
{ Illegal },
{ Illegal },
{ Illegal },
- { Complete, FieldW, CcopyR0 },
- { Complete, FieldW, CcopyR1 },
- { Complete, FieldW, CcopyR2 },
- { Complete, FieldW, CcopyR3 },
- { Complete, FieldW, CcopyR4 },
+ { Complete, FieldW, CcopyR0 },
+ { Complete, FieldW, CcopyR1 },
+ { Complete, FieldW, CcopyR2 },
+ { Complete, FieldW, CcopyR3 },
+ { Complete, FieldW, CcopyR4 },
{ Illegal },
{ Illegal },
{ Illegal }
}, { //12
- { Complete, FieldW, SwapAR0 },
- { Complete, FieldW, SwapAR1 },
- { Complete, FieldW, SwapAR2 },
- { Complete, FieldW, SwapAR3 },
- { Complete, FieldW, SwapAR4 },
+ { Complete, FieldW, SwapAR0 },
+ { Complete, FieldW, SwapAR1 },
+ { Complete, FieldW, SwapAR2 },
+ { Complete, FieldW, SwapAR3 },
+ { Complete, FieldW, SwapAR4 },
{ Illegal },
{ Illegal },
{ Illegal },
- { Complete, FieldW, SwapCR0 },
- { Complete, FieldW, SwapCR1 },
- { Complete, FieldW, SwapCR2 },
- { Complete, FieldW, SwapCR3 },
- { Complete, FieldW, SwapCR4 },
+ { Complete, FieldW, SwapCR0 },
+ { Complete, FieldW, SwapCR1 },
+ { Complete, FieldW, SwapCR2 },
+ { Complete, FieldW, SwapCR3 },
+ { Complete, FieldW, SwapCR4 },
{ Illegal },
{ Illegal },
{ Illegal }
}, { //13
- { Complete, FieldA, D0copyA },
- { Complete, FieldA, D1copyA },
- { Complete, FieldA, SwapAD0 },
- { Complete, FieldA, SwapAD1 },
- { Complete, FieldA, D0copyC },
- { Complete, FieldA, D1copyC },
- { Complete, FieldA, SwapCD0 },
- { Complete, FieldA, SwapCD1 },
- { Complete, FieldS, D0copyAShort },
- { Complete, FieldS, D1copyAShort },
- { Complete, FieldS, SwapAD0Short },
- { Complete, FieldS, SwapAD1Short },
- { Complete, FieldS, D0copyCShort },
- { Complete, FieldS, D1copyCShort },
- { Complete, FieldS, SwapCD0Short },
- { Complete, FieldS, SwapCD1Short }
+ { Complete, FieldA, D0copyA },
+ { Complete, FieldA, D1copyA },
+ { Complete, FieldA, SwapAD0 },
+ { Complete, FieldA, SwapAD1 },
+ { Complete, FieldA, D0copyC },
+ { Complete, FieldA, D1copyC },
+ { Complete, FieldA, SwapCD0 },
+ { Complete, FieldA, SwapCD1 },
+ { Complete, FieldS, D0copyAShort },
+ { Complete, FieldS, D1copyAShort },
+ { Complete, FieldS, SwapAD0Short },
+ { Complete, FieldS, SwapAD1Short },
+ { Complete, FieldS, D0copyCShort },
+ { Complete, FieldS, D1copyCShort },
+ { Complete, FieldS, SwapCD0Short },
+ { Complete, FieldS, SwapCD1Short }
}, { //14
- { Complete, FieldA, D0storeA },
- { Complete, FieldA, D1storeA },
- { Complete, FieldA, AloadD0 },
- { Complete, FieldA, AloadD1 },
- { Complete, FieldA, D0storeC },
- { Complete, FieldA, D1storeC },
- { Complete, FieldA, CloadD0 },
- { Complete, FieldA, CloadD1 },
- { Complete, FieldB, D0storeA },
- { Complete, FieldB, D1storeA },
- { Complete, FieldB, AloadD0 },
- { Complete, FieldB, AloadD1 },
- { Complete, FieldB, D0storeC },
- { Complete, FieldB, D1storeC },
- { Complete, FieldB, CloadD0 },
- { Complete, FieldB, CloadD1 }
+ { Complete, FieldA, D0storeA },
+ { Complete, FieldA, D1storeA },
+ { Complete, FieldA, AloadD0 },
+ { Complete, FieldA, AloadD1 },
+ { Complete, FieldA, D0storeC },
+ { Complete, FieldA, D1storeC },
+ { Complete, FieldA, CloadD0 },
+ { Complete, FieldA, CloadD1 },
+ { Complete, FieldB, D0storeA },
+ { Complete, FieldB, D1storeA },
+ { Complete, FieldB, AloadD0 },
+ { Complete, FieldB, AloadD1 },
+ { Complete, FieldB, D0storeC },
+ { Complete, FieldB, D1storeC },
+ { Complete, FieldB, CloadD0 },
+ { Complete, FieldB, CloadD1 }
}, { //15
- { Complete, AdrA, D0storeA },
- { Complete, AdrA, D1storeA },
- { Complete, AdrA, AloadD0 },
- { Complete, AdrA, AloadD1 },
- { Complete, AdrA, D0storeC },
- { Complete, AdrA, D1storeC },
- { Complete, AdrA, CloadD0 },
- { Complete, AdrA, CloadD1 },
- { Complete, AdrCount, D0storeA },
- { Complete, AdrCount, D1storeA },
- { Complete, AdrCount, AloadD0 },
- { Complete, AdrCount, AloadD1 },
- { Complete, AdrCount, D0storeC },
- { Complete, AdrCount, D1storeC },
- { Complete, AdrCount, CloadD0 },
- { Complete, AdrCount, CloadD1 },
+ { Complete, AdrA, D0storeA },
+ { Complete, AdrA, D1storeA },
+ { Complete, AdrA, AloadD0 },
+ { Complete, AdrA, AloadD1 },
+ { Complete, AdrA, D0storeC },
+ { Complete, AdrA, D1storeC },
+ { Complete, AdrA, CloadD0 },
+ { Complete, AdrA, CloadD1 },
+ { Complete, AdrCount, D0storeA },
+ { Complete, AdrCount, D1storeA },
+ { Complete, AdrCount, AloadD0 },
+ { Complete, AdrCount, AloadD1 },
+ { Complete, AdrCount, D0storeC },
+ { Complete, AdrCount, D1storeC },
+ { Complete, AdrCount, CloadD0 },
+ { Complete, AdrCount, CloadD1 },
}, { //8
{ Opcode80 },
{ Opcode81 },
- { Complete, Imm, clearHST },
- { Complete, TestBranchRet, branchHSTclear },
- { Complete, Imm, clearBitST },
- { Complete, Imm, setBitST },
- { Complete, TestBranchRet, branchSTclear },
- { Complete, TestBranchRet, branchSTset },
- { Complete, TestBranchRet, branchPdiffers},
- { Complete, TestBranchRet, branchPequals},
+ { Complete, Imm, clearHST },
+ { Complete, TestBranchRet, branchHSTclear },
+ { Complete, Imm, clearBitST },
+ { Complete, Imm, setBitST },
+ { Complete, TestBranchRet, branchSTclear },
+ { Complete, TestBranchRet, branchSTset },
+ { Complete, TestBranchRet, branchPdiffers},
+ { Complete, TestBranchRet, branchPequals},
{ Opcode8A },
{ Opcode8B },
- { Complete, Dis4, jump4 },
- { Complete, Abs, jump },
- { Complete, Dis4Call, call4 },
- { Complete, Abs, call }
+ { Complete, Dis4, jump4 },
+ { Complete, Abs, jump },
+ { Complete, Dis4Call, call4 },
+ { Complete, Abs, call }
}, { //80
- { Complete, AdrNone, outCS },
- { Complete, AdrNone, outC },
- { Complete, AdrNone, inA },
- { Complete, AdrNone, inC },
- { Complete, AdrNone, unconfig },
- { Complete, AdrNone, config },
- { Complete, AdrNone, Cid },
- { Complete, AdrNone, shutdown },
+ { Complete, AdrNone, outCS },
+ { Complete, AdrNone, outC },
+ { Complete, AdrNone, inA },
+ { Complete, AdrNone, inC },
+ { Complete, AdrNone, unconfig },
+ { Complete, AdrNone, config },
+ { Complete, AdrNone, Cid },
+ { Complete, AdrNone, shutdown },
{ Opcode808 },
- { Complete, AdrNone, cp1 },
- { Complete, AdrNone, reset },
- { Complete, AdrNone, buscc },
- { Complete, Imm, CcopyP },
- { Complete, Imm, PcopyC },
- { Complete, AdrNone, sreq },
- { Complete, Imm, CswapP }
+ { Complete, AdrNone, cp1 },
+ { Complete, AdrNone, reset },
+ { Complete, AdrNone, buscc },
+ { Complete, Imm, CcopyP },
+ { Complete, Imm, PcopyC },
+ { Complete, AdrNone, sreq },
+ { Complete, Imm, CswapP }
}, { //808
- { Complete, AdrNone, inton },
+ { Complete, AdrNone, inton },
{ Opcode8081 },
- { Complete, ImmCload, AloadImm },
- { Complete, AdrNone, buscb },
- { Complete, Imm, clearAbit },
- { Complete, Imm, setAbit },
- { Complete, TestBranchRet, branchAbitclear },
- { Complete, TestBranchRet, branchAbitset },
- { Complete, Imm, clearCbit },
- { Complete, Imm, setCbit },
- { Complete, TestBranchRet, branchCbitclear },
- { Complete, TestBranchRet, branchCbitset },
- { Complete, AdrNone, PCloadA },
- { Complete, AdrNone, buscd },
- { Complete, AdrNone, PCloadC },
- { Complete, AdrNone, intoff }
+ { Complete, ImmCload, AloadImm },
+ { Complete, AdrNone, buscb },
+ { Complete, Imm, clearAbit },
+ { Complete, Imm, setAbit },
+ { Complete, TestBranchRet, branchAbitclear },
+ { Complete, TestBranchRet, branchAbitset },
+ { Complete, Imm, clearCbit },
+ { Complete, Imm, setCbit },
+ { Complete, TestBranchRet, branchCbitclear },
+ { Complete, TestBranchRet, branchCbitset },
+ { Complete, AdrNone, PCloadA },
+ { Complete, AdrNone, buscd },
+ { Complete, AdrNone, PCloadC },
+ { Complete, AdrNone, intoff }
}, { //8081
- { Complete, AdrNone, rsi },
+ { Complete, AdrNone, rsi },
//! rest illegal
}, { //81
- { Complete, FieldW, AshiftleftCarry },
- { Complete, FieldW, BshiftleftCarry },
- { Complete, FieldW, CshiftleftCarry },
- { Complete, FieldW, DshiftleftCarry },
- { Complete, FieldW, AshiftrightCarry },
- { Complete, FieldW, BshiftrightCarry },
- { Complete, FieldW, CshiftrightCarry },
- { Complete, FieldW, DshiftrightCarry },
+ { Complete, FieldW, AshiftleftCarry },
+ { Complete, FieldW, BshiftleftCarry },
+ { Complete, FieldW, CshiftleftCarry },
+ { Complete, FieldW, DshiftleftCarry },
+ { Complete, FieldW, AshiftrightCarry },
+ { Complete, FieldW, BshiftrightCarry },
+ { Complete, FieldW, CshiftrightCarry },
+ { Complete, FieldW, DshiftrightCarry },
{ Opcode818 },
{ Opcode819 },
{ Opcode81A },
{ Opcode81B },
- { Complete, FieldW, Ashiftrightbit },
- { Complete, FieldW, Bshiftrightbit },
- { Complete, FieldW, Cshiftrightbit },
- { Complete, FieldW, Dshiftrightbit }
+ { Complete, FieldW, Ashiftrightbit },
+ { Complete, FieldW, Bshiftrightbit },
+ { Complete, FieldW, Cshiftrightbit },
+ { Complete, FieldW, Dshiftrightbit }
}, { //818
- { Opcode818a, AdrAF },
- { Opcode818a, AdrAF },
- { Opcode818a, AdrAF },
- { Opcode818a, AdrAF },
- { Opcode818a, AdrAF },
- { Opcode818a, AdrAF },
- { Opcode818a, AdrAF },
- { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
{ Illegal },
{ Illegal },
{ Illegal },
@@ -883,33 +883,33 @@ static const OPCODE opcodes[][0x10]= {
{ Illegal },
{ Illegal },
{ Illegal },
- { Opcode818a, AdrAF },
+ { Opcode818a, AdrAF },
}, { //818a
- { Complete, AdrImmCount, AaddImm },
- { Complete, AdrImmCount, BaddImm },
- { Complete, AdrImmCount, CaddImm },
- { Complete, AdrImmCount, DaddImm },
+ { Complete, AdrImmCount, AaddImm },
+ { Complete, AdrImmCount, BaddImm },
+ { Complete, AdrImmCount, CaddImm },
+ { Complete, AdrImmCount, DaddImm },
{ Illegal },
{ Illegal },
{ Illegal },
{ Illegal },
- { Complete, AdrImmCount, AsubImm },
- { Complete, AdrImmCount, BsubImm },
- { Complete, AdrImmCount, CsubImm },
- { Complete, AdrImmCount, DsubImm },
+ { Complete, AdrImmCount, AsubImm },
+ { Complete, AdrImmCount, BsubImm },
+ { Complete, AdrImmCount, CsubImm },
+ { Complete, AdrImmCount, DsubImm },
{ Illegal },
{ Illegal },
{ Illegal },
{ Illegal },
}, { //819
- { Opcode819a, AdrAF },
- { Opcode819a, AdrAF },
- { Opcode819a, AdrAF },
- { Opcode819a, AdrAF },
- { Opcode819a, AdrAF },
- { Opcode819a, AdrAF },
- { Opcode819a, AdrAF },
- { Opcode819a, AdrAF }, //?
+ { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF }, //?
{ Illegal },
{ Illegal },
{ Illegal },
@@ -917,22 +917,22 @@ static const OPCODE opcodes[][0x10]= {
{ Illegal },
{ Illegal },
{ Illegal },
- { Opcode819a, AdrAF },
+ { Opcode819a, AdrAF },
}, { //819a }
- { Complete, AdrNone, Ashiftright },
- { Complete, AdrNone, Bshiftright },
- { Complete, AdrNone, Cshiftright },
- { Complete, AdrNone, Dshiftright },
+ { Complete, AdrNone, Ashiftright },
+ { Complete, AdrNone, Bshiftright },
+ { Complete, AdrNone, Cshiftright },
+ { Complete, AdrNone, Dshiftright },
//! rest illegal
}, { //81A
- { Opcode81Aa, AdrAF },
- { Opcode81Aa, AdrAF },
- { Opcode81Aa, AdrAF },
- { Opcode81Aa, AdrAF },
- { Opcode81Aa, AdrAF },
- { Opcode81Aa, AdrAF },
- { Opcode81Aa, AdrAF },
- { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
{ Illegal },
{ Illegal },
{ Illegal },
@@ -940,72 +940,72 @@ static const OPCODE opcodes[][0x10]= {
{ Illegal },
{ Illegal },
{ Illegal },
- { Opcode81Aa, AdrAF },
+ { Opcode81Aa, AdrAF },
}, { //81Aa
{ Opcode81Aa0 },
{ Opcode81Aa1 },
{ Opcode81Aa2 },
//! rest illegal
}, { //81Aa0
- { Complete, AdrNone, R0copyA },
- { Complete, AdrNone, R1copyA },
- { Complete, AdrNone, R2copyA },
- { Complete, AdrNone, R3copyA },
- { Complete, AdrNone, R4copyA },
+ { Complete, AdrNone, R0copyA },
+ { Complete, AdrNone, R1copyA },
+ { Complete, AdrNone, R2copyA },
+ { Complete, AdrNone, R3copyA },
+ { Complete, AdrNone, R4copyA },
{ Illegal },
{ Illegal },
{ Illegal },
- { Complete, AdrNone, R0copyC },
- { Complete, AdrNone, R1copyC },
- { Complete, AdrNone, R2copyC },
- { Complete, AdrNone, R3copyC },
- { Complete, AdrNone, R4copyC },
+ { Complete, AdrNone, R0copyC },
+ { Complete, AdrNone, R1copyC },
+ { Complete, AdrNone, R2copyC },
+ { Complete, AdrNone, R3copyC },
+ { Complete, AdrNone, R4copyC },
{ Illegal },
{ Illegal },
{ Illegal }
}, { //81Aa1
- { Complete, AdrNone, AcopyR0 },
- { Complete, AdrNone, AcopyR1 },
- { Complete, AdrNone, AcopyR2 },
- { Complete, AdrNone, AcopyR3 },
- { Complete, AdrNone, AcopyR4 },
+ { Complete, AdrNone, AcopyR0 },
+ { Complete, AdrNone, AcopyR1 },
+ { Complete, AdrNone, AcopyR2 },
+ { Complete, AdrNone, AcopyR3 },
+ { Complete, AdrNone, AcopyR4 },
{ Illegal },
{ Illegal },
{ Illegal },
- { Complete, AdrNone, CcopyR0 },
- { Complete, AdrNone, CcopyR1 },
- { Complete, AdrNone, CcopyR2 },
- { Complete, AdrNone, CcopyR3 },
- { Complete, AdrNone, CcopyR4 },
+ { Complete, AdrNone, CcopyR0 },
+ { Complete, AdrNone, CcopyR1 },
+ { Complete, AdrNone, CcopyR2 },
+ { Complete, AdrNone, CcopyR3 },
+ { Complete, AdrNone, CcopyR4 },
{ Illegal },
{ Illegal },
{ Illegal }
}, { //81Aa2
- { Complete, AdrNone, SwapAR0 },
- { Complete, AdrNone, SwapAR1 },
- { Complete, AdrNone, SwapAR2 },
- { Complete, AdrNone, SwapAR3 },
- { Complete, AdrNone, SwapAR4 },
+ { Complete, AdrNone, SwapAR0 },
+ { Complete, AdrNone, SwapAR1 },
+ { Complete, AdrNone, SwapAR2 },
+ { Complete, AdrNone, SwapAR3 },
+ { Complete, AdrNone, SwapAR4 },
{ Illegal },
{ Illegal },
{ Illegal },
- { Complete, AdrNone, SwapCR0 },
- { Complete, AdrNone, SwapCR1 },
- { Complete, AdrNone, SwapCR2 },
- { Complete, AdrNone, SwapCR3 },
- { Complete, AdrNone, SwapCR4 },
+ { Complete, AdrNone, SwapCR0 },
+ { Complete, AdrNone, SwapCR1 },
+ { Complete, AdrNone, SwapCR2 },
+ { Complete, AdrNone, SwapCR3 },
+ { Complete, AdrNone, SwapCR4 },
{ Illegal },
{ Illegal },
{ Illegal }
}, { //81B
{ Illegal },
{ Illegal },
- { Complete, AdrNone, jumpA },
- { Complete, AdrNone, jumpC },
- { Complete, AdrNone, PCcopyA },
- { Complete, AdrNone, PCcopyC },
- { Complete, AdrNone, AcopyPC },
- { Complete, AdrNone, CcopyPC },
+ { Complete, AdrNone, jumpA },
+ { Complete, AdrNone, jumpC },
+ { Complete, AdrNone, PCcopyA },
+ { Complete, AdrNone, PCcopyC },
+ { Complete, AdrNone, AcopyPC },
+ { Complete, AdrNone, CcopyPC },
{ Illegal },
{ Illegal },
{ Illegal },
@@ -1015,260 +1015,260 @@ static const OPCODE opcodes[][0x10]= {
{ Illegal },
{ Illegal }
}, { //8A
- { Complete, ABranchReturn, branchAequalsB },
- { Complete, ABranchReturn, branchBequalsC },
- { Complete, ABranchReturn, branchAequalsC },
- { Complete, ABranchReturn, branchCequalsD },
- { Complete, ABranchReturn, branchAdiffersB },
- { Complete, ABranchReturn, branchBdiffersC },
- { Complete, ABranchReturn, branchAdiffersC },
- { Complete, ABranchReturn, branchCdiffersD },
- { Complete, ABranchReturn, branchAzero },
- { Complete, ABranchReturn, branchBzero },
- { Complete, ABranchReturn, branchCzero },
- { Complete, ABranchReturn, branchDzero },
- { Complete, ABranchReturn, branchAnotzero },
- { Complete, ABranchReturn, branchBnotzero },
- { Complete, ABranchReturn, branchCnotzero },
- { Complete, ABranchReturn, branchDnotzero }
+ { Complete, ABranchReturn, branchAequalsB },
+ { Complete, ABranchReturn, branchBequalsC },
+ { Complete, ABranchReturn, branchAequalsC },
+ { Complete, ABranchReturn, branchCequalsD },
+ { Complete, ABranchReturn, branchAdiffersB },
+ { Complete, ABranchReturn, branchBdiffersC },
+ { Complete, ABranchReturn, branchAdiffersC },
+ { Complete, ABranchReturn, branchCdiffersD },
+ { Complete, ABranchReturn, branchAzero },
+ { Complete, ABranchReturn, branchBzero },
+ { Complete, ABranchReturn, branchCzero },
+ { Complete, ABranchReturn, branchDzero },
+ { Complete, ABranchReturn, branchAnotzero },
+ { Complete, ABranchReturn, branchBnotzero },
+ { Complete, ABranchReturn, branchCnotzero },
+ { Complete, ABranchReturn, branchDnotzero }
}, { //8B
- { Complete, ABranchReturn, branchAgreaterB },
- { Complete, ABranchReturn, branchBgreaterC },
- { Complete, ABranchReturn, branchCgreaterA },
- { Complete, ABranchReturn, branchDgreaterC },
- { Complete, ABranchReturn, branchAlowerB },
- { Complete, ABranchReturn, branchBlowerC },
- { Complete, ABranchReturn, branchClowerA },
- { Complete, ABranchReturn, branchDlowerC },
- { Complete, ABranchReturn, branchAnotlowerB },
- { Complete, ABranchReturn, branchBnotlowerC },
- { Complete, ABranchReturn, branchCnotlowerA },
- { Complete, ABranchReturn, branchDnotlowerC },
- { Complete, ABranchReturn, branchAnotgreaterB },
- { Complete, ABranchReturn, branchBnotgreaterC },
- { Complete, ABranchReturn, branchCnotgreaterA },
- { Complete, ABranchReturn, branchDnotgreaterC }
+ { Complete, ABranchReturn, branchAgreaterB },
+ { Complete, ABranchReturn, branchBgreaterC },
+ { Complete, ABranchReturn, branchCgreaterA },
+ { Complete, ABranchReturn, branchDgreaterC },
+ { Complete, ABranchReturn, branchAlowerB },
+ { Complete, ABranchReturn, branchBlowerC },
+ { Complete, ABranchReturn, branchClowerA },
+ { Complete, ABranchReturn, branchDlowerC },
+ { Complete, ABranchReturn, branchAnotlowerB },
+ { Complete, ABranchReturn, branchBnotlowerC },
+ { Complete, ABranchReturn, branchCnotlowerA },
+ { Complete, ABranchReturn, branchDnotlowerC },
+ { Complete, ABranchReturn, branchAnotgreaterB },
+ { Complete, ABranchReturn, branchBnotgreaterC },
+ { Complete, ABranchReturn, branchCnotgreaterA },
+ { Complete, ABranchReturn, branchDnotgreaterC }
}, { //9
- { Opcode9a, AdrA },
- { Opcode9a, AdrA },
- { Opcode9a, AdrA },
- { Opcode9a, AdrA },
- { Opcode9a, AdrA },
- { Opcode9a, AdrA },
- { Opcode9a, AdrA },
- { Opcode9a, AdrA },
- { Opcode9b, AdrB },
- { Opcode9b, AdrB },
- { Opcode9b, AdrB },
- { Opcode9b, AdrB },
- { Opcode9b, AdrB },
- { Opcode9b, AdrB },
- { Opcode9b, AdrB },
- { Opcode9b, AdrB },
+ { Opcode9a, AdrA },
+ { Opcode9a, AdrA },
+ { Opcode9a, AdrA },
+ { Opcode9a, AdrA },
+ { Opcode9a, AdrA },
+ { Opcode9a, AdrA },
+ { Opcode9a, AdrA },
+ { Opcode9a, AdrA },
+ { Opcode9b, AdrB },
+ { Opcode9b, AdrB },
+ { Opcode9b, AdrB },
+ { Opcode9b, AdrB },
+ { Opcode9b, AdrB },
+ { Opcode9b, AdrB },
+ { Opcode9b, AdrB },
+ { Opcode9b, AdrB },
}, { //9a
- { Complete, xBranchReturn, branchAequalsB },
- { Complete, xBranchReturn, branchBequalsC },
- { Complete, xBranchReturn, branchAequalsC },
- { Complete, xBranchReturn, branchCequalsD },
- { Complete, xBranchReturn, branchAdiffersB },
- { Complete, xBranchReturn, branchBdiffersC },
- { Complete, xBranchReturn, branchAdiffersC },
- { Complete, xBranchReturn, branchCdiffersD },
- { Complete, xBranchReturn, branchAzero },
- { Complete, xBranchReturn, branchBzero },
- { Complete, xBranchReturn, branchCzero },
- { Complete, xBranchReturn, branchDzero },
- { Complete, xBranchReturn, branchAnotzero },
- { Complete, xBranchReturn, branchBnotzero },
- { Complete, xBranchReturn, branchCnotzero },
- { Complete, xBranchReturn, branchDnotzero }
+ { Complete, xBranchReturn, branchAequalsB },
+ { Complete, xBranchReturn, branchBequalsC },
+ { Complete, xBranchReturn, branchAequalsC },
+ { Complete, xBranchReturn, branchCequalsD },
+ { Complete, xBranchReturn, branchAdiffersB },
+ { Complete, xBranchReturn, branchBdiffersC },
+ { Complete, xBranchReturn, branchAdiffersC },
+ { Complete, xBranchReturn, branchCdiffersD },
+ { Complete, xBranchReturn, branchAzero },
+ { Complete, xBranchReturn, branchBzero },
+ { Complete, xBranchReturn, branchCzero },
+ { Complete, xBranchReturn, branchDzero },
+ { Complete, xBranchReturn, branchAnotzero },
+ { Complete, xBranchReturn, branchBnotzero },
+ { Complete, xBranchReturn, branchCnotzero },
+ { Complete, xBranchReturn, branchDnotzero }
}, { //9b
- { Complete, xBranchReturn, branchAgreaterB },
- { Complete, xBranchReturn, branchBgreaterC },
- { Complete, xBranchReturn, branchCgreaterA },
- { Complete, xBranchReturn, branchDgreaterC },
- { Complete, xBranchReturn, branchAlowerB },
- { Complete, xBranchReturn, branchBlowerC },
- { Complete, xBranchReturn, branchClowerA },
- { Complete, xBranchReturn, branchDlowerC },
- { Complete, xBranchReturn, branchAnotlowerB },
- { Complete, xBranchReturn, branchBnotlowerC },
- { Complete, xBranchReturn, branchCnotlowerA },
- { Complete, xBranchReturn, branchDnotlowerC },
- { Complete, xBranchReturn, branchAnotgreaterB },
- { Complete, xBranchReturn, branchBnotgreaterC },
- { Complete, xBranchReturn, branchCnotgreaterA },
- { Complete, xBranchReturn, branchDnotgreaterC }
+ { Complete, xBranchReturn, branchAgreaterB },
+ { Complete, xBranchReturn, branchBgreaterC },
+ { Complete, xBranchReturn, branchCgreaterA },
+ { Complete, xBranchReturn, branchDgreaterC },
+ { Complete, xBranchReturn, branchAlowerB },
+ { Complete, xBranchReturn, branchBlowerC },
+ { Complete, xBranchReturn, branchClowerA },
+ { Complete, xBranchReturn, branchDlowerC },
+ { Complete, xBranchReturn, branchAnotlowerB },
+ { Complete, xBranchReturn, branchBnotlowerC },
+ { Complete, xBranchReturn, branchCnotlowerA },
+ { Complete, xBranchReturn, branchDnotlowerC },
+ { Complete, xBranchReturn, branchAnotgreaterB },
+ { Complete, xBranchReturn, branchBnotgreaterC },
+ { Complete, xBranchReturn, branchCnotgreaterA },
+ { Complete, xBranchReturn, branchDnotgreaterC }
}, { //A
- { OpcodeAa, AdrA },
- { OpcodeAa, AdrA },
- { OpcodeAa, AdrA },
- { OpcodeAa, AdrA },
- { OpcodeAa, AdrA },
- { OpcodeAa, AdrA },
- { OpcodeAa, AdrA },
- { OpcodeAa, AdrA },
- { OpcodeAb, AdrB },
- { OpcodeAb, AdrB },
- { OpcodeAb, AdrB },
- { OpcodeAb, AdrB },
- { OpcodeAb, AdrB },
- { OpcodeAb, AdrB },
- { OpcodeAb, AdrB },
- { OpcodeAb, AdrB },
+ { OpcodeAa, AdrA },
+ { OpcodeAa, AdrA },
+ { OpcodeAa, AdrA },
+ { OpcodeAa, AdrA },
+ { OpcodeAa, AdrA },
+ { OpcodeAa, AdrA },
+ { OpcodeAa, AdrA },
+ { OpcodeAa, AdrA },
+ { OpcodeAb, AdrB },
+ { OpcodeAb, AdrB },
+ { OpcodeAb, AdrB },
+ { OpcodeAb, AdrB },
+ { OpcodeAb, AdrB },
+ { OpcodeAb, AdrB },
+ { OpcodeAb, AdrB },
+ { OpcodeAb, AdrB },
}, { //Aa
- { Complete, AdrNone, AaddB },
- { Complete, AdrNone, BaddC },
- { Complete, AdrNone, CaddA },
- { Complete, AdrNone, DaddC },
- { Complete, AdrNone, AaddA },
- { Complete, AdrNone, BaddB },
- { Complete, AdrNone, CaddC },
- { Complete, AdrNone, DaddD },
- { Complete, AdrNone, BaddA },
- { Complete, AdrNone, CaddB },
- { Complete, AdrNone, AaddC },
- { Complete, AdrNone, CaddD },
- { Complete, AdrNone, decA },
- { Complete, AdrNone, decB },
- { Complete, AdrNone, decC },
- { Complete, AdrNone, decD },
+ { Complete, AdrNone, AaddB },
+ { Complete, AdrNone, BaddC },
+ { Complete, AdrNone, CaddA },
+ { Complete, AdrNone, DaddC },
+ { Complete, AdrNone, AaddA },
+ { Complete, AdrNone, BaddB },
+ { Complete, AdrNone, CaddC },
+ { Complete, AdrNone, DaddD },
+ { Complete, AdrNone, BaddA },
+ { Complete, AdrNone, CaddB },
+ { Complete, AdrNone, AaddC },
+ { Complete, AdrNone, CaddD },
+ { Complete, AdrNone, decA },
+ { Complete, AdrNone, decB },
+ { Complete, AdrNone, decC },
+ { Complete, AdrNone, decD },
}, { //Ab
- { Complete, AdrNone, clearA },
- { Complete, AdrNone, clearB },
- { Complete, AdrNone, clearC },
- { Complete, AdrNone, clearD },
- { Complete, AdrNone, AcopyB },
- { Complete, AdrNone, BcopyC },
- { Complete, AdrNone, CcopyA },
- { Complete, AdrNone, DcopyC },
- { Complete, AdrNone, BcopyA },
- { Complete, AdrNone, CcopyB },
- { Complete, AdrNone, AcopyC },
- { Complete, AdrNone, CcopyD },
- { Complete, AdrNone, AswapB },
- { Complete, AdrNone, BswapC },
- { Complete, AdrNone, CswapA },
- { Complete, AdrNone, DswapC }
+ { Complete, AdrNone, clearA },
+ { Complete, AdrNone, clearB },
+ { Complete, AdrNone, clearC },
+ { Complete, AdrNone, clearD },
+ { Complete, AdrNone, AcopyB },
+ { Complete, AdrNone, BcopyC },
+ { Complete, AdrNone, CcopyA },
+ { Complete, AdrNone, DcopyC },
+ { Complete, AdrNone, BcopyA },
+ { Complete, AdrNone, CcopyB },
+ { Complete, AdrNone, AcopyC },
+ { Complete, AdrNone, CcopyD },
+ { Complete, AdrNone, AswapB },
+ { Complete, AdrNone, BswapC },
+ { Complete, AdrNone, CswapA },
+ { Complete, AdrNone, DswapC }
}, { //B
- { OpcodeBa, AdrA },
- { OpcodeBa, AdrA },
- { OpcodeBa, AdrA },
- { OpcodeBa, AdrA },
- { OpcodeBa, AdrA },
- { OpcodeBa, AdrA },
- { OpcodeBa, AdrA },
- { OpcodeBa, AdrA },
- { OpcodeBb, AdrB },
- { OpcodeBb, AdrB },
- { OpcodeBb, AdrB },
- { OpcodeBb, AdrB },
- { OpcodeBb, AdrB },
- { OpcodeBb, AdrB },
- { OpcodeBb, AdrB },
- { OpcodeBb, AdrB },
+ { OpcodeBa, AdrA },
+ { OpcodeBa, AdrA },
+ { OpcodeBa, AdrA },
+ { OpcodeBa, AdrA },
+ { OpcodeBa, AdrA },
+ { OpcodeBa, AdrA },
+ { OpcodeBa, AdrA },
+ { OpcodeBa, AdrA },
+ { OpcodeBb, AdrB },
+ { OpcodeBb, AdrB },
+ { OpcodeBb, AdrB },
+ { OpcodeBb, AdrB },
+ { OpcodeBb, AdrB },
+ { OpcodeBb, AdrB },
+ { OpcodeBb, AdrB },
+ { OpcodeBb, AdrB },
}, { //Ba
- { Complete, AdrNone, AsubB },
- { Complete, AdrNone, BsubC },
- { Complete, AdrNone, CsubA },
- { Complete, AdrNone, DsubC },
- { Complete, AdrNone, incA },
- { Complete, AdrNone, incB },
- { Complete, AdrNone, incC },
- { Complete, AdrNone, incD },
- { Complete, AdrNone, BsubA },
- { Complete, AdrNone, CsubB },
- { Complete, AdrNone, AsubC },
- { Complete, AdrNone, CsubD },
- { Complete, AdrNone, AsubnB },
- { Complete, AdrNone, BsubnC },
- { Complete, AdrNone, CsubnA },
- { Complete, AdrNone, DsubnC },
+ { Complete, AdrNone, AsubB },
+ { Complete, AdrNone, BsubC },
+ { Complete, AdrNone, CsubA },
+ { Complete, AdrNone, DsubC },
+ { Complete, AdrNone, incA },
+ { Complete, AdrNone, incB },
+ { Complete, AdrNone, incC },
+ { Complete, AdrNone, incD },
+ { Complete, AdrNone, BsubA },
+ { Complete, AdrNone, CsubB },
+ { Complete, AdrNone, AsubC },
+ { Complete, AdrNone, CsubD },
+ { Complete, AdrNone, AsubnB },
+ { Complete, AdrNone, BsubnC },
+ { Complete, AdrNone, CsubnA },
+ { Complete, AdrNone, DsubnC },
}, { //Bb
- { Complete, AdrNone, Ashiftleft },
- { Complete, AdrNone, Bshiftleft },
- { Complete, AdrNone, Cshiftleft },
- { Complete, AdrNone, Dshiftleft },
- { Complete, AdrNone, Ashiftright },
- { Complete, AdrNone, Bshiftright },
- { Complete, AdrNone, Cshiftright },
- { Complete, AdrNone, Dshiftright },
- { Complete, AdrNone, negateA },
- { Complete, AdrNone, negateB },
- { Complete, AdrNone, negateC },
- { Complete, AdrNone, negateD },
- { Complete, AdrNone, notA },
- { Complete, AdrNone, notB },
- { Complete, AdrNone, notC },
- { Complete, AdrNone, notD }
+ { Complete, AdrNone, Ashiftleft },
+ { Complete, AdrNone, Bshiftleft },
+ { Complete, AdrNone, Cshiftleft },
+ { Complete, AdrNone, Dshiftleft },
+ { Complete, AdrNone, Ashiftright },
+ { Complete, AdrNone, Bshiftright },
+ { Complete, AdrNone, Cshiftright },
+ { Complete, AdrNone, Dshiftright },
+ { Complete, AdrNone, negateA },
+ { Complete, AdrNone, negateB },
+ { Complete, AdrNone, negateC },
+ { Complete, AdrNone, negateD },
+ { Complete, AdrNone, notA },
+ { Complete, AdrNone, notB },
+ { Complete, AdrNone, notC },
+ { Complete, AdrNone, notD }
}, { //C
- { Complete, FieldA, AaddB },
- { Complete, FieldA, BaddC },
- { Complete, FieldA, CaddA },
- { Complete, FieldA, DaddC },
- { Complete, FieldA, AaddA },
- { Complete, FieldA, BaddB },
- { Complete, FieldA, CaddC },
- { Complete, FieldA, DaddD },
- { Complete, FieldA, BaddA },
- { Complete, FieldA, CaddB },
- { Complete, FieldA, AaddC },
- { Complete, FieldA, CaddD },
- { Complete, FieldA, decA },
- { Complete, FieldA, decB },
- { Complete, FieldA, decC },
- { Complete, FieldA, decD }
+ { Complete, FieldA, AaddB },
+ { Complete, FieldA, BaddC },
+ { Complete, FieldA, CaddA },
+ { Complete, FieldA, DaddC },
+ { Complete, FieldA, AaddA },
+ { Complete, FieldA, BaddB },
+ { Complete, FieldA, CaddC },
+ { Complete, FieldA, DaddD },
+ { Complete, FieldA, BaddA },
+ { Complete, FieldA, CaddB },
+ { Complete, FieldA, AaddC },
+ { Complete, FieldA, CaddD },
+ { Complete, FieldA, decA },
+ { Complete, FieldA, decB },
+ { Complete, FieldA, decC },
+ { Complete, FieldA, decD }
}, { //D
- { Complete, FieldA, clearA },
- { Complete, FieldA, clearB },
- { Complete, FieldA, clearC },
- { Complete, FieldA, clearD },
- { Complete, FieldA, AcopyB },
- { Complete, FieldA, BcopyC },
- { Complete, FieldA, CcopyA },
- { Complete, FieldA, DcopyC },
- { Complete, FieldA, BcopyA },
- { Complete, FieldA, CcopyB },
- { Complete, FieldA, AcopyC },
- { Complete, FieldA, CcopyD },
- { Complete, FieldA, AswapB },
- { Complete, FieldA, BswapC },
- { Complete, FieldA, CswapA },
- { Complete, FieldA, DswapC }
+ { Complete, FieldA, clearA },
+ { Complete, FieldA, clearB },
+ { Complete, FieldA, clearC },
+ { Complete, FieldA, clearD },
+ { Complete, FieldA, AcopyB },
+ { Complete, FieldA, BcopyC },
+ { Complete, FieldA, CcopyA },
+ { Complete, FieldA, DcopyC },
+ { Complete, FieldA, BcopyA },
+ { Complete, FieldA, CcopyB },
+ { Complete, FieldA, AcopyC },
+ { Complete, FieldA, CcopyD },
+ { Complete, FieldA, AswapB },
+ { Complete, FieldA, BswapC },
+ { Complete, FieldA, CswapA },
+ { Complete, FieldA, DswapC }
}, { //E
- { Complete, FieldA, AsubB },
- { Complete, FieldA, BsubC },
- { Complete, FieldA, CsubA },
- { Complete, FieldA, DsubC },
- { Complete, FieldA, incA },
- { Complete, FieldA, incB },
- { Complete, FieldA, incC },
- { Complete, FieldA, incD },
- { Complete, FieldA, BsubA },
- { Complete, FieldA, CsubB },
- { Complete, FieldA, AsubC },
- { Complete, FieldA, CsubD },
- { Complete, FieldA, AsubnB },
- { Complete, FieldA, BsubnC },
- { Complete, FieldA, CsubnA },
- { Complete, FieldA, DsubnC }
+ { Complete, FieldA, AsubB },
+ { Complete, FieldA, BsubC },
+ { Complete, FieldA, CsubA },
+ { Complete, FieldA, DsubC },
+ { Complete, FieldA, incA },
+ { Complete, FieldA, incB },
+ { Complete, FieldA, incC },
+ { Complete, FieldA, incD },
+ { Complete, FieldA, BsubA },
+ { Complete, FieldA, CsubB },
+ { Complete, FieldA, AsubC },
+ { Complete, FieldA, CsubD },
+ { Complete, FieldA, AsubnB },
+ { Complete, FieldA, BsubnC },
+ { Complete, FieldA, CsubnA },
+ { Complete, FieldA, DsubnC }
}, { //F
- { Complete, FieldA, Ashiftleft },
- { Complete, FieldA, Bshiftleft },
- { Complete, FieldA, Cshiftleft },
- { Complete, FieldA, Dshiftleft },
- { Complete, FieldA, Ashiftright },
- { Complete, FieldA, Bshiftright },
- { Complete, FieldA, Cshiftright },
- { Complete, FieldA, Dshiftright },
- { Complete, FieldA, negateA },
- { Complete, FieldA, negateB },
- { Complete, FieldA, negateC },
- { Complete, FieldA, negateD },
- { Complete, FieldA, notA },
- { Complete, FieldA, notB },
- { Complete, FieldA, notC },
- { Complete, FieldA, notD }
+ { Complete, FieldA, Ashiftleft },
+ { Complete, FieldA, Bshiftleft },
+ { Complete, FieldA, Cshiftleft },
+ { Complete, FieldA, Dshiftleft },
+ { Complete, FieldA, Ashiftright },
+ { Complete, FieldA, Bshiftright },
+ { Complete, FieldA, Cshiftright },
+ { Complete, FieldA, Dshiftright },
+ { Complete, FieldA, negateA },
+ { Complete, FieldA, negateB },
+ { Complete, FieldA, negateC },
+ { Complete, FieldA, negateD },
+ { Complete, FieldA, notA },
+ { Complete, FieldA, notB },
+ { Complete, FieldA, notC },
+ { Complete, FieldA, notD }
}
};
@@ -1290,7 +1290,7 @@ CPU_DISASSEMBLE( saturn )
char number[17];
const OPCODE *level=opcodes[0]; //pointer to current digit
int op; // currently fetched nibble
- int pos = 0;
+ int pos = 0;
int i,c,v;
diff --git a/src/emu/cpu/sc61860/readpc.c b/src/emu/cpu/sc61860/readpc.c
index 79900746c3f..96e3002947d 100644
--- a/src/emu/cpu/sc61860/readpc.c
+++ b/src/emu/cpu/sc61860/readpc.c
@@ -56,10 +56,10 @@ but the pc side must not be interrupted with interrupt
#if 0
/* this routine dump the memory (start 0)
- in an endless loop,
- the pc side must be started before this
- actual version should be in mess/machine/pocketc.c
- */
+ in an endless loop,
+ the pc side must be started before this
+ actual version should be in mess/machine/pocketc.c
+ */
1 restore: for i=16384 to 16455:read a: poke i,a: next i
10 call 16384
@@ -192,4 +192,3 @@ int main(int argc, char *argv[])
#endif
return 0;
}
-
diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c
index b5fc806e270..06640835a42 100644
--- a/src/emu/cpu/sc61860/sc61860.c
+++ b/src/emu/cpu/sc61860/sc61860.c
@@ -35,7 +35,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/****************************************************************************
* The 61860 registers.
@@ -152,14 +152,14 @@ static CPU_SET_INFO( sc61860 )
{
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SC61860_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + SC61860_PC: cpustate->pc = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + SC61860_R: cpustate->r = info->i & 0x7F; break;
- case CPUINFO_INT_REGISTER + SC61860_DP: cpustate->dp = info->i; break;
- case CPUINFO_INT_REGISTER + SC61860_P: cpustate->p = info->i & 0x7F; break;
- case CPUINFO_INT_REGISTER + SC61860_Q: cpustate->q = info->i & 0x7F; break;
- case CPUINFO_INT_REGISTER + SC61860_CARRY: cpustate->carry = info->i; break;
- case CPUINFO_INT_REGISTER + SC61860_ZERO: cpustate->zero = info->i; break;
+ case CPUINFO_INT_REGISTER + SC61860_R: cpustate->r = info->i & 0x7F; break;
+ case CPUINFO_INT_REGISTER + SC61860_DP: cpustate->dp = info->i; break;
+ case CPUINFO_INT_REGISTER + SC61860_P: cpustate->p = info->i & 0x7F; break;
+ case CPUINFO_INT_REGISTER + SC61860_Q: cpustate->q = info->i & 0x7F; break;
+ case CPUINFO_INT_REGISTER + SC61860_CARRY: cpustate->carry = info->i; break;
+ case CPUINFO_INT_REGISTER + SC61860_ZERO: cpustate->zero = info->i; break;
}
}
@@ -175,76 +175,76 @@ CPU_GET_INFO( sc61860 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sc61860_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sc61860_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SC61860_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + SC61860_PC: info->i = cpustate->pc; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + SC61860_R: info->i = cpustate->r; break;
- case CPUINFO_INT_REGISTER + SC61860_DP: info->i = cpustate->dp; break;
- case CPUINFO_INT_REGISTER + SC61860_P: info->i = cpustate->p; break;
- case CPUINFO_INT_REGISTER + SC61860_Q: info->i = cpustate->q; break;
- case CPUINFO_INT_REGISTER + SC61860_CARRY: info->i = cpustate->carry; break;
- case CPUINFO_INT_REGISTER + SC61860_ZERO: info->i = cpustate->zero; break;
+ case CPUINFO_INT_REGISTER + SC61860_R: info->i = cpustate->r; break;
+ case CPUINFO_INT_REGISTER + SC61860_DP: info->i = cpustate->dp; break;
+ case CPUINFO_INT_REGISTER + SC61860_P: info->i = cpustate->p; break;
+ case CPUINFO_INT_REGISTER + SC61860_Q: info->i = cpustate->q; break;
+ case CPUINFO_INT_REGISTER + SC61860_CARRY: info->i = cpustate->carry; break;
+ case CPUINFO_INT_REGISTER + SC61860_ZERO: info->i = cpustate->zero; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sc61860); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sc61860); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sc61860); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sc61860); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sc61860); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sc61860); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sc61860); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sc61860); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sc61860); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sc61860); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SC61860"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "SC61860"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0beta"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SC61860"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "SC61860"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0beta"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c", cpustate->zero?'Z':'.', cpustate->carry ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + SC61860_PC: sprintf(info->s, "PC:%.4x", cpustate->pc);break;
- case CPUINFO_STR_REGISTER + SC61860_DP: sprintf(info->s, "DP:%.4x", cpustate->dp);break;
- case CPUINFO_STR_REGISTER + SC61860_P: sprintf(info->s, "P:%.2x", cpustate->p);break;
- case CPUINFO_STR_REGISTER + SC61860_Q: sprintf(info->s, "Q:%.2x", cpustate->q);break;
- case CPUINFO_STR_REGISTER + SC61860_R: sprintf(info->s, "R:%.2x", cpustate->r);break;
- case CPUINFO_STR_REGISTER + SC61860_I: sprintf(info->s, "I:%.2x", cpustate->ram[I]);break;
- case CPUINFO_STR_REGISTER + SC61860_J: sprintf(info->s, "J:%.2x", cpustate->ram[J]);break;
- case CPUINFO_STR_REGISTER + SC61860_K: sprintf(info->s, "K:%.2x", cpustate->ram[K]);break;
- case CPUINFO_STR_REGISTER + SC61860_L: sprintf(info->s, "L:%.2x", cpustate->ram[L]);break;
- case CPUINFO_STR_REGISTER + SC61860_V: sprintf(info->s, "V:%.2x", cpustate->ram[V]);break;
- case CPUINFO_STR_REGISTER + SC61860_W: sprintf(info->s, "W:%.2x", cpustate->ram[W]);break;
- case CPUINFO_STR_REGISTER + SC61860_H: sprintf(info->s, "W:%.2x", cpustate->h);break;
- case CPUINFO_STR_REGISTER + SC61860_BA: sprintf(info->s, "BA:%.2x%.2x", cpustate->ram[B], cpustate->ram[A]);break;
- case CPUINFO_STR_REGISTER + SC61860_X: sprintf(info->s, "X: %.2x%.2x", cpustate->ram[XH], cpustate->ram[XL]);break;
- case CPUINFO_STR_REGISTER + SC61860_Y: sprintf(info->s, "Y: %.2x%.2x", cpustate->ram[YH], cpustate->ram[YL]);break;
- case CPUINFO_STR_REGISTER + SC61860_CARRY: sprintf(info->s, "Carry: %d", cpustate->carry);break;
- case CPUINFO_STR_REGISTER + SC61860_ZERO: sprintf(info->s, "Zero: %d", cpustate->zero);break;
+ case CPUINFO_STR_REGISTER + SC61860_PC: sprintf(info->s, "PC:%.4x", cpustate->pc);break;
+ case CPUINFO_STR_REGISTER + SC61860_DP: sprintf(info->s, "DP:%.4x", cpustate->dp);break;
+ case CPUINFO_STR_REGISTER + SC61860_P: sprintf(info->s, "P:%.2x", cpustate->p);break;
+ case CPUINFO_STR_REGISTER + SC61860_Q: sprintf(info->s, "Q:%.2x", cpustate->q);break;
+ case CPUINFO_STR_REGISTER + SC61860_R: sprintf(info->s, "R:%.2x", cpustate->r);break;
+ case CPUINFO_STR_REGISTER + SC61860_I: sprintf(info->s, "I:%.2x", cpustate->ram[I]);break;
+ case CPUINFO_STR_REGISTER + SC61860_J: sprintf(info->s, "J:%.2x", cpustate->ram[J]);break;
+ case CPUINFO_STR_REGISTER + SC61860_K: sprintf(info->s, "K:%.2x", cpustate->ram[K]);break;
+ case CPUINFO_STR_REGISTER + SC61860_L: sprintf(info->s, "L:%.2x", cpustate->ram[L]);break;
+ case CPUINFO_STR_REGISTER + SC61860_V: sprintf(info->s, "V:%.2x", cpustate->ram[V]);break;
+ case CPUINFO_STR_REGISTER + SC61860_W: sprintf(info->s, "W:%.2x", cpustate->ram[W]);break;
+ case CPUINFO_STR_REGISTER + SC61860_H: sprintf(info->s, "W:%.2x", cpustate->h);break;
+ case CPUINFO_STR_REGISTER + SC61860_BA: sprintf(info->s, "BA:%.2x%.2x", cpustate->ram[B], cpustate->ram[A]);break;
+ case CPUINFO_STR_REGISTER + SC61860_X: sprintf(info->s, "X: %.2x%.2x", cpustate->ram[XH], cpustate->ram[XL]);break;
+ case CPUINFO_STR_REGISTER + SC61860_Y: sprintf(info->s, "Y: %.2x%.2x", cpustate->ram[YH], cpustate->ram[YL]);break;
+ case CPUINFO_STR_REGISTER + SC61860_CARRY: sprintf(info->s, "Carry: %d", cpustate->carry);break;
+ case CPUINFO_STR_REGISTER + SC61860_ZERO: sprintf(info->s, "Zero: %d", cpustate->zero);break;
}
}
diff --git a/src/emu/cpu/sc61860/sc61860.h b/src/emu/cpu/sc61860/sc61860.h
index 9961d228ecd..83cd6ded146 100644
--- a/src/emu/cpu/sc61860/sc61860.h
+++ b/src/emu/cpu/sc61860/sc61860.h
@@ -39,14 +39,14 @@
struct sc61860_cpu_core
{
- int (*reset)(device_t *device);
- int (*brk)(device_t *device);
- int (*x)(device_t *device);
- int (*ina)(device_t *device);
- void (*outa)(device_t *device, int);
- int (*inb)(device_t *device);
- void (*outb)(device_t *device, int);
- void (*outc)(device_t *device, int);
+ int (*reset)(device_t *device);
+ int (*brk)(device_t *device);
+ int (*x)(device_t *device);
+ int (*ina)(device_t *device);
+ void (*outa)(device_t *device, int);
+ int (*inb)(device_t *device);
+ void (*outb)(device_t *device, int);
+ void (*outc)(device_t *device, int);
};
CPU_DISASSEMBLE( sc61860 );
diff --git a/src/emu/cpu/sc61860/scdasm.c b/src/emu/cpu/sc61860/scdasm.c
index dacdf7dcc63..dc5d116edd8 100644
--- a/src/emu/cpu/sc61860/scdasm.c
+++ b/src/emu/cpu/sc61860/scdasm.c
@@ -93,48 +93,48 @@ enum Adr
};
static const struct { const char *mnemonic; Adr adr; } table[]={
- { "LII", Imm }, { "LIJ", Imm }, { "LIA", Imm }, { "LIB", Imm },
- { "IX", Imp }, { "DX", Imp }, { "IY", Imp }, { "DY", Imp },
- { "MVW", Imp }, { "EXW", Imp }, { "MVB", Imp }, { "EXB", Imp },
- { "ADN", Imp }, { "SBN", Imp }, { "ADW", Imp }, { "SBW", Imp },
-
- { "LIDP", ImmW}, { "LIDL", Imm }, { "LIP", Imm }, { "LIQ", Imm },
- { "ADB", Imp }, { "SBB", Imp }, { "LIDP", ImmW}, { "LIDL", Imm },
- { "MVWD", Imp }, { "EXWD", Imp }, { "MVBD", Imp }, { "EXBD", Imp },
- { "SRW", Imp }, { "SLW", Imp }, { "FILM", Imp }, { "FILD", Imp },
-
- { "LDP", Imp }, { "LPQ", Imp }, { "LPR", Imp }, { 0, Ill },
- { "IXL", Imp }, { "DXL", Imp }, { "IYS", Imp }, { "DYS", Imp },
- { "JRNZP", RelP}, { "JRNZM", RelM}, { "JRNCP", RelP}, { "JRNCM", RelM},
- { "JRP", RelP}, { "JRM", RelM}, { 0, Ill }, { "LOOP", RelM},
-
- { "STP", Imp }, { "STQ", Imp }, { "STR", Imp }, { 0, Ill },
- { "PUSH", Imp }, { "DATA", Imp }, { 0, Ill }, { "RTN", Imp },
- { "JRZP", RelP}, { "JRZM", RelM}, { "JRCP", RelP}, { "JRCM", RelM},
- { 0, Ill }, { 0, Ill }, { 0, Ill }, { 0, Ill },
-
- { "INCI", Imp }, { "DECI", Imp }, { "INCA", Imp }, { "DECA", Imp },
- { "ADM", Imp }, { "SBM", Imp }, { "ANMA", Imp }, { "ORMA", Imp },
- { "INCK", Imp }, { "DECK", Imp }, { "INCV", Imp }, { "DECV", Imp },
- { "INA", Imp }, { "NOPW", Imp }, { "WAIT", Imm }, { "IPXL"/*CDN, lxn*/, Imp },
-
- { "INCP", Imp }, { "DECP", Imp }, { "STD", Imp }, { "MVDM", Imp },
- { "READM",/*mvmp*/ Imp }, { "MVMD", Imp }, { "READ"/*ldpc*/, Imp }, { "LDD", Imp },
- { "SWP", Imp }, { "LDM", Imp }, { "SL", Imp }, { "POP", Imp },
- { 0, Ill }, { "OUTA", Imp }, { 0, Ill }, { "OUTF", Imp },
-
- { "ANIM", Imm }, { "ORIM", Imm }, { "TSIM", Imm }, { "CPIM", Imm },
- { "ANIA", Imm }, { "ORIA", Imm }, { "TSIA", Imm }, { "CPIA", Imm },
- { 0, Ill }, { "ETC", Etc }, { 0, Ill }, { "TEST", Imm },
- { 0, Ill }, { 0, Ill }, { 0, Ill }, { "IPXH"/*CDN,lxp*/, Imp },
-
- { "ADIM", Imm }, { "SBIM", Imm }, { 0, Ill }, { 0, Ill },
- { "ADIA", Imm }, { "SBIA", Imm }, { 0, Ill }, { 0, Ill },
- { "CALL", Abs }, { "JP", Abs }, { "PTC", Ptc }, { 0, Ill },
- { "JPNZ", Abs }, { "JPNC", Abs }, { "JPZ", Abs }, { "JPC", Abs },
-
-
- { "LP", Lp }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
+ { "LII", Imm }, { "LIJ", Imm }, { "LIA", Imm }, { "LIB", Imm },
+ { "IX", Imp }, { "DX", Imp }, { "IY", Imp }, { "DY", Imp },
+ { "MVW", Imp }, { "EXW", Imp }, { "MVB", Imp }, { "EXB", Imp },
+ { "ADN", Imp }, { "SBN", Imp }, { "ADW", Imp }, { "SBW", Imp },
+
+ { "LIDP", ImmW}, { "LIDL", Imm }, { "LIP", Imm }, { "LIQ", Imm },
+ { "ADB", Imp }, { "SBB", Imp }, { "LIDP", ImmW}, { "LIDL", Imm },
+ { "MVWD", Imp }, { "EXWD", Imp }, { "MVBD", Imp }, { "EXBD", Imp },
+ { "SRW", Imp }, { "SLW", Imp }, { "FILM", Imp }, { "FILD", Imp },
+
+ { "LDP", Imp }, { "LPQ", Imp }, { "LPR", Imp }, { 0, Ill },
+ { "IXL", Imp }, { "DXL", Imp }, { "IYS", Imp }, { "DYS", Imp },
+ { "JRNZP", RelP}, { "JRNZM", RelM}, { "JRNCP", RelP}, { "JRNCM", RelM},
+ { "JRP", RelP}, { "JRM", RelM}, { 0, Ill }, { "LOOP", RelM},
+
+ { "STP", Imp }, { "STQ", Imp }, { "STR", Imp }, { 0, Ill },
+ { "PUSH", Imp }, { "DATA", Imp }, { 0, Ill }, { "RTN", Imp },
+ { "JRZP", RelP}, { "JRZM", RelM}, { "JRCP", RelP}, { "JRCM", RelM},
+ { 0, Ill }, { 0, Ill }, { 0, Ill }, { 0, Ill },
+
+ { "INCI", Imp }, { "DECI", Imp }, { "INCA", Imp }, { "DECA", Imp },
+ { "ADM", Imp }, { "SBM", Imp }, { "ANMA", Imp }, { "ORMA", Imp },
+ { "INCK", Imp }, { "DECK", Imp }, { "INCV", Imp }, { "DECV", Imp },
+ { "INA", Imp }, { "NOPW", Imp }, { "WAIT", Imm }, { "IPXL"/*CDN, lxn*/, Imp },
+
+ { "INCP", Imp }, { "DECP", Imp }, { "STD", Imp }, { "MVDM", Imp },
+ { "READM",/*mvmp*/ Imp }, { "MVMD", Imp }, { "READ"/*ldpc*/, Imp }, { "LDD", Imp },
+ { "SWP", Imp }, { "LDM", Imp }, { "SL", Imp }, { "POP", Imp },
+ { 0, Ill }, { "OUTA", Imp }, { 0, Ill }, { "OUTF", Imp },
+
+ { "ANIM", Imm }, { "ORIM", Imm }, { "TSIM", Imm }, { "CPIM", Imm },
+ { "ANIA", Imm }, { "ORIA", Imm }, { "TSIA", Imm }, { "CPIA", Imm },
+ { 0, Ill }, { "ETC", Etc }, { 0, Ill }, { "TEST", Imm },
+ { 0, Ill }, { 0, Ill }, { 0, Ill }, { "IPXH"/*CDN,lxp*/, Imp },
+
+ { "ADIM", Imm }, { "SBIM", Imm }, { 0, Ill }, { 0, Ill },
+ { "ADIA", Imm }, { "SBIA", Imm }, { 0, Ill }, { 0, Ill },
+ { "CALL", Abs }, { "JP", Abs }, { "PTC", Ptc }, { 0, Ill },
+ { "JPNZ", Abs }, { "JPNC", Abs }, { "JPZ", Abs }, { "JPC", Abs },
+
+
+ { "LP", Lp }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
@@ -146,15 +146,15 @@ static const struct { const char *mnemonic; Adr adr; } table[]={
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
- { "INCJ", Imp }, { "DECJ", Imp }, { "INCB", Imp }, { "DECB", Imp },
- { "ACDM", Imp }, { "SBCM", Imp }, { 0, Ill }, { "CPMA", Imp },
- { "INCL", Imp }, { "DECL", Imp }, { "INCW", Imp }, { "DECW", Imp },
- { "INB", Imp }, { 0, Ill }, { "NOPT", Imp }, { 0, Ill },
+ { "INCJ", Imp }, { "DECJ", Imp }, { "INCB", Imp }, { "DECB", Imp },
+ { "ACDM", Imp }, { "SBCM", Imp }, { 0, Ill }, { "CPMA", Imp },
+ { "INCL", Imp }, { "DECL", Imp }, { "INCW", Imp }, { "DECW", Imp },
+ { "INB", Imp }, { 0, Ill }, { "NOPT", Imp }, { 0, Ill },
- { "SC", Imp }, { "RC", Imp }, { "SR", Imp }, { 0, Ill },
- { "ANID", Imm }, { "ORID", Imm }, { "TSID", Imm }, { 0, Ill },
- { "LEAVE", Imp }, { 0, Ill }, { "EXAB", Imp }, { "EXAM", Imp },
- { 0, Ill }, { "OUTB", Imp }, { 0, Ill }, { "OUTC", Imp },
+ { "SC", Imp }, { "RC", Imp }, { "SR", Imp }, { 0, Ill },
+ { "ANID", Imm }, { "ORID", Imm }, { "TSID", Imm }, { 0, Ill },
+ { "LEAVE", Imp }, { 0, Ill }, { "EXAB", Imp }, { "EXAM", Imp },
+ { 0, Ill }, { "OUTB", Imp }, { 0, Ill }, { "OUTC", Imp },
{ "CAL", Imp }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
{ 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 },
diff --git a/src/emu/cpu/scmp/scmp.c b/src/emu/cpu/scmp/scmp.c
index 2d7a72e655a..48b44a5c608 100644
--- a/src/emu/cpu/scmp/scmp.c
+++ b/src/emu/cpu/scmp/scmp.c
@@ -22,27 +22,27 @@
struct scmp_state
{
- scmp_config config;
- PAIR PC;
- PAIR P1;
- PAIR P2;
- PAIR P3;
- UINT8 AC;
- UINT8 ER;
- UINT8 SR;
+ scmp_config config;
+ PAIR PC;
+ PAIR P1;
+ PAIR P2;
+ PAIR P3;
+ UINT8 AC;
+ UINT8 ER;
+ UINT8 SR;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *io;
- int icount;
-
- devcb_resolved_write8 flag_out_func;
- devcb_resolved_write_line sout_func;
- devcb_resolved_read_line sin_func;
- devcb_resolved_read_line sensea_func;
- devcb_resolved_read_line senseb_func;
- devcb_resolved_write_line halt_func;
+ int icount;
+
+ devcb_resolved_write8 flag_out_func;
+ devcb_resolved_write_line sout_func;
+ devcb_resolved_read_line sin_func;
+ devcb_resolved_read_line sensea_func;
+ devcb_resolved_read_line senseb_func;
+ devcb_resolved_write_line halt_func;
};
/***************************************************************************
@@ -308,13 +308,13 @@ static void execute_one(scmp_state *cpustate, int opcode)
}
break;
// Double-Byte Miscellaneous Instructions
- case 0x8f: // DLY
+ case 0x8f: // DLY
tmp = ARG(cpustate);
cpustate->icount -= 13 + (cpustate->AC * 2) + (((UINT32)tmp) << 1) + (((UINT32)tmp) << 9);
cpustate->AC = 0xff;
break;
// Others are illegal
- default : cpustate->icount -= 1;
+ default : cpustate->icount -= 1;
illegal (cpustate,opcode);
break;
}
@@ -323,55 +323,55 @@ static void execute_one(scmp_state *cpustate, int opcode)
switch (opcode)
{
// Extension Register Instructions
- case 0x40: // LDE
+ case 0x40: // LDE
cpustate->icount -= 6;
cpustate->AC = cpustate->ER;
break;
- case 0x01: // XAE
+ case 0x01: // XAE
cpustate->icount -= 7;
tmp = cpustate->AC;
cpustate->AC = cpustate->ER;
cpustate->ER = tmp;
break;
- case 0x50: // ANE
+ case 0x50: // ANE
cpustate->icount -= 6;
cpustate->AC &= cpustate->ER;
break;
- case 0x58: // ORE
+ case 0x58: // ORE
cpustate->icount -= 6;
cpustate->AC |= cpustate->ER;
break;
- case 0x60: // XRE
+ case 0x60: // XRE
cpustate->icount -= 6;
cpustate->AC ^= cpustate->ER;
break;
- case 0x68: // DAE
+ case 0x68: // DAE
cpustate->icount -= 11;
DEC_ADD(cpustate,cpustate->ER);
break;
- case 0x70: // ADE
+ case 0x70: // ADE
cpustate->icount -= 7;
BIN_ADD(cpustate,cpustate->ER);
break;
- case 0x78: // CAE
+ case 0x78: // CAE
cpustate->icount -= 8;
BIN_ADD(cpustate,~cpustate->ER);
break;
// Pointer Register Move Instructions
- case 0x30: case 0x31: case 0x32: case 0x33: // XPAL
+ case 0x30: case 0x31: case 0x32: case 0x33: // XPAL
cpustate->icount -= 8;
tmp = cpustate->AC;
cpustate->AC = GET_PTR_REG(cpustate,ptr)->b.l;
GET_PTR_REG(cpustate,ptr)->b.l = tmp;
break;
- case 0x34: case 0x35 :case 0x36: case 0x37:
+ case 0x34: case 0x35 :case 0x36: case 0x37:
// XPAH
cpustate->icount -= 8;
tmp = cpustate->AC;
cpustate->AC = GET_PTR_REG(cpustate,ptr)->b.h;
GET_PTR_REG(cpustate,ptr)->b.h = tmp;
break;
- case 0x3c: case 0x3d :case 0x3e: case 0x3f:
+ case 0x3c: case 0x3d :case 0x3e: case 0x3f:
// XPPC
{
UINT16 tmp16 = ADD12(cpustate->PC.w.l,-1); // Since PC is incremented we need to fix it
@@ -383,70 +383,70 @@ static void execute_one(scmp_state *cpustate, int opcode)
}
break;
// Shift, Rotate, Serial I/O Instructions
- case 0x19: // SIO
+ case 0x19: // SIO
cpustate->icount -= 5;
cpustate->sout_func(cpustate->ER & 0x01);
cpustate->ER >>= 1;
cpustate->ER |= cpustate->sin_func() ? 0x80 : 0x00;
break;
- case 0x1c: // SR
+ case 0x1c: // SR
cpustate->icount -= 5;
cpustate->AC >>= 1;
break;
- case 0x1d: // SRL
+ case 0x1d: // SRL
cpustate->icount -= 5;
cpustate->AC >>= 1;
cpustate->AC |= cpustate->SR & 0x80; // add C/L flag
break;
- case 0x1e: // RR
+ case 0x1e: // RR
cpustate->icount -= 5;
cpustate->AC = (cpustate->AC >> 1) | ((cpustate->AC & 0x01) << 7);
break;
- case 0x1f: // RRL
+ case 0x1f: // RRL
cpustate->icount -= 5;
tmp = (cpustate->AC & 0x01) << 7;
cpustate->AC = (cpustate->AC >> 1) | (cpustate->SR & 0x80);
cpustate->SR = (cpustate->SR & 0x7f) | tmp;
break;
// Single Byte Miscellaneous Instructions
- case 0x00: // HALT
+ case 0x00: // HALT
cpustate->icount -= 8;
cpustate->halt_func(1);
cpustate->halt_func(0);
break;
- case 0x02: // CCL
+ case 0x02: // CCL
cpustate->icount -= 5;
cpustate->SR &= 0x7f;
break;
- case 0x03: // SCL
+ case 0x03: // SCL
cpustate->icount -= 5;
cpustate->SR |= 0x80;
break;
- case 0x04: // DINT
+ case 0x04: // DINT
cpustate->icount -= 6;
cpustate->SR &= 0xf7;
break;
- case 0x05: // IEN
+ case 0x05: // IEN
cpustate->icount -= 6;
cpustate->SR |= 0x08;
break;
- case 0x06: // CSA
+ case 0x06: // CSA
cpustate->icount -= 5;
cpustate->SR &= 0xcf; // clear SA and SB flags
cpustate->SR |= cpustate->sensea_func() ? 0x10 : 0x00;
cpustate->SR |= cpustate->senseb_func() ? 0x20 : 0x00;
cpustate->AC = cpustate->SR;
break;
- case 0x07: // CAS
+ case 0x07: // CAS
cpustate->icount -= 6;
cpustate->SR = cpustate->AC;
cpustate->flag_out_func(0, cpustate->SR & 0x07);
break;
- case 0x08: // NOP
+ case 0x08: // NOP
cpustate->icount -= 5;
break;
// Others are illegal
- default : cpustate->icount -= 1;
+ default : cpustate->icount -= 1;
illegal (cpustate,opcode);
break;
}
@@ -574,14 +574,14 @@ static CPU_EXPORT_STRING( scmp )
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c%c%c%c%c",
- (cpustate->SR & 0x80) ? 'C' : '.',
- (cpustate->SR & 0x40) ? 'V' : '.',
- (cpustate->SR & 0x20) ? 'B' : '.',
- (cpustate->SR & 0x10) ? 'A' : '.',
- (cpustate->SR & 0x08) ? 'I' : '.',
- (cpustate->SR & 0x04) ? '2' : '.',
- (cpustate->SR & 0x02) ? '1' : '.',
- (cpustate->SR & 0x01) ? '0' : '.');
+ (cpustate->SR & 0x80) ? 'C' : '.',
+ (cpustate->SR & 0x40) ? 'V' : '.',
+ (cpustate->SR & 0x20) ? 'B' : '.',
+ (cpustate->SR & 0x10) ? 'A' : '.',
+ (cpustate->SR & 0x08) ? 'I' : '.',
+ (cpustate->SR & 0x04) ? '2' : '.',
+ (cpustate->SR & 0x02) ? '1' : '.',
+ (cpustate->SR & 0x01) ? '0' : '.');
break;
}
}
@@ -603,48 +603,48 @@ CPU_GET_INFO( scmp )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(scmp_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 5; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 131593; break; // DLY instruction max time
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(scmp_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 5; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 131593; break; // DLY instruction max time
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(scmp); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(scmp); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(scmp); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(scmp); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(scmp); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(scmp); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(scmp); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(scmp); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(scmp); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(scmp); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(scmp); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(scmp); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(scmp); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(scmp); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(scmp); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(scmp); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "INS 8050 SC/MP"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "National Semiconductor SC/MP"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "INS 8050 SC/MP"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "National Semiconductor SC/MP"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miodrag Milanovic"); break;
}
}
@@ -656,12 +656,12 @@ CPU_GET_INFO( ins8060 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "INS 8060 SC/MP II"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "INS 8060 SC/MP II"); break;
- default: CPU_GET_INFO_CALL(scmp); break;
+ default: CPU_GET_INFO_CALL(scmp); break;
}
}
diff --git a/src/emu/cpu/scmp/scmp.h b/src/emu/cpu/scmp/scmp.h
index 9a69d0b1280..bfcbb894b70 100644
--- a/src/emu/cpu/scmp/scmp.h
+++ b/src/emu/cpu/scmp/scmp.h
@@ -19,12 +19,12 @@ enum
***************************************************************************/
struct scmp_config
{
- devcb_write8 flag_out_func;
- devcb_write_line sout_func;
- devcb_read_line sin_func;
- devcb_read_line sensea_func;
- devcb_read_line senseb_func;
- devcb_write_line halt_func;
+ devcb_write8 flag_out_func;
+ devcb_write_line sout_func;
+ devcb_read_line sin_func;
+ devcb_read_line sensea_func;
+ devcb_read_line senseb_func;
+ devcb_write_line halt_func;
};
#define SCMP_CONFIG(name) const scmp_config (name) =
diff --git a/src/emu/cpu/scmp/scmpdasm.c b/src/emu/cpu/scmp/scmpdasm.c
index 86c7901c4fd..7d93498b91e 100644
--- a/src/emu/cpu/scmp/scmpdasm.c
+++ b/src/emu/cpu/scmp/scmpdasm.c
@@ -105,7 +105,7 @@ CPU_DISASSEMBLE( scmp )
case 0x9d : case 0x9e : case 0x9f :
sprintf (buffer,"jnz %s",aspr); break;
// Double-Byte Miscellaneous Instructions
- case 0x8f: sprintf (buffer,"dly $%02x",arg); break;
+ case 0x8f: sprintf (buffer,"dly $%02x",arg); break;
// Others are illegal
default : sprintf (buffer,"illegal"); pc--; break; // Illegal we consider without param
}
@@ -114,36 +114,36 @@ CPU_DISASSEMBLE( scmp )
switch (op)
{
// Extension Register Instructions
- case 0x40: sprintf (buffer,"lde"); break;
- case 0x01: sprintf (buffer,"xae"); break;
- case 0x50: sprintf (buffer,"ane"); break;
- case 0x58: sprintf (buffer,"ore"); break;
- case 0x60: sprintf (buffer,"xre"); break;
- case 0x68: sprintf (buffer,"dae"); break;
- case 0x70: sprintf (buffer,"ade"); break;
- case 0x78: sprintf (buffer,"cae"); break;
+ case 0x40: sprintf (buffer,"lde"); break;
+ case 0x01: sprintf (buffer,"xae"); break;
+ case 0x50: sprintf (buffer,"ane"); break;
+ case 0x58: sprintf (buffer,"ore"); break;
+ case 0x60: sprintf (buffer,"xre"); break;
+ case 0x68: sprintf (buffer,"dae"); break;
+ case 0x70: sprintf (buffer,"ade"); break;
+ case 0x78: sprintf (buffer,"cae"); break;
// Pointer Register Move Instructions
- case 0x30: case 0x31 :case 0x32: case 0x33:
+ case 0x30: case 0x31 :case 0x32: case 0x33:
sprintf (buffer,"xpal %d",ptr); break;
- case 0x34: case 0x35 :case 0x36: case 0x37:
+ case 0x34: case 0x35 :case 0x36: case 0x37:
sprintf (buffer,"xpah %d",ptr); break;
- case 0x3c: case 0x3d :case 0x3e: case 0x3f:
+ case 0x3c: case 0x3d :case 0x3e: case 0x3f:
sprintf (buffer,"xppc %d",ptr); break;
// Shift, Rotate, Serial I/O Instructions
- case 0x19: sprintf (buffer,"sio"); break;
- case 0x1c: sprintf (buffer,"sr"); break;
- case 0x1d: sprintf (buffer,"srl"); break;
- case 0x1e: sprintf (buffer,"rr"); break;
- case 0x1f: sprintf (buffer,"rrl"); break;
+ case 0x19: sprintf (buffer,"sio"); break;
+ case 0x1c: sprintf (buffer,"sr"); break;
+ case 0x1d: sprintf (buffer,"srl"); break;
+ case 0x1e: sprintf (buffer,"rr"); break;
+ case 0x1f: sprintf (buffer,"rrl"); break;
// Single Byte Miscellaneous Instructions
- case 0x00: sprintf (buffer,"halt"); break;
- case 0x02: sprintf (buffer,"ccl"); break;
- case 0x03: sprintf (buffer,"scl"); break;
- case 0x04: sprintf (buffer,"dint"); break;
- case 0x05: sprintf (buffer,"ien"); break;
- case 0x06: sprintf (buffer,"csa"); break;
- case 0x07: sprintf (buffer,"cas"); break;
- case 0x08: sprintf (buffer,"nop"); break;
+ case 0x00: sprintf (buffer,"halt"); break;
+ case 0x02: sprintf (buffer,"ccl"); break;
+ case 0x03: sprintf (buffer,"scl"); break;
+ case 0x04: sprintf (buffer,"dint"); break;
+ case 0x05: sprintf (buffer,"ien"); break;
+ case 0x06: sprintf (buffer,"csa"); break;
+ case 0x07: sprintf (buffer,"cas"); break;
+ case 0x08: sprintf (buffer,"nop"); break;
// Others are illegal
default : sprintf (buffer,"illegal"); break;
}
diff --git a/src/emu/cpu/scudsp/scudspdasm.c b/src/emu/cpu/scudsp/scudspdasm.c
index 7e31879efbe..86dface1f53 100644
--- a/src/emu/cpu/scudsp/scudspdasm.c
+++ b/src/emu/cpu/scudsp/scudspdasm.c
@@ -55,52 +55,52 @@ static const SCUDSP_OPCODE alu_table[16] =
static const SCUDSP_OPCODE xbus_table[] =
{
- { "NOP", 0, 0, 0, }, /* 000 */
- { "???", 0, 0, 0, }, /* 001 */
- { "MOV", EA_MUL, EA_P, 0, }, /* 010 */
- { "MOV", EA_SRCMEMX, EA_P, 0, }, /* 011 */ //MOV %s,P
- { "MOV", EA_SRCMEMX, EA_X, 0, }, /* 100 */ //MOV %s,X
- { "???", 0, 0, 0, }, /* 101 */
- { "???", 0, 0, 0, }, /* 110 */
- { "???", 0, 0, 0, }, /* 111 */
+ { "NOP", 0, 0, 0, }, /* 000 */
+ { "???", 0, 0, 0, }, /* 001 */
+ { "MOV", EA_MUL, EA_P, 0, }, /* 010 */
+ { "MOV", EA_SRCMEMX, EA_P, 0, }, /* 011 */ //MOV %s,P
+ { "MOV", EA_SRCMEMX, EA_X, 0, }, /* 100 */ //MOV %s,X
+ { "???", 0, 0, 0, }, /* 101 */
+ { "???", 0, 0, 0, }, /* 110 */
+ { "???", 0, 0, 0, }, /* 111 */
};
static const SCUDSP_OPCODE ybus_table[] =
{
- { "NOP", 0, 0, 0, }, /* 000 */
- { "CLR", 0, EA_A, 0, }, /* 001 */
- { "MOV", EA_ALU, EA_A, 0, }, /* 010 */
- { "MOV", EA_SRCMEMY, EA_A, 0, }, /* 011 */ //MOV %s,A
- { "MOV", EA_SRCMEMY, EA_Y, 0, }, /* 100 */ //MOV %s,Y
- { "???", 0, 0, 0, }, /* 101 */
- { "???", 0, 0, 0, }, /* 110 */
- { "???", 0, 0, 0, }, /* 111 */
+ { "NOP", 0, 0, 0, }, /* 000 */
+ { "CLR", 0, EA_A, 0, }, /* 001 */
+ { "MOV", EA_ALU, EA_A, 0, }, /* 010 */
+ { "MOV", EA_SRCMEMY, EA_A, 0, }, /* 011 */ //MOV %s,A
+ { "MOV", EA_SRCMEMY, EA_Y, 0, }, /* 100 */ //MOV %s,Y
+ { "???", 0, 0, 0, }, /* 101 */
+ { "???", 0, 0, 0, }, /* 110 */
+ { "???", 0, 0, 0, }, /* 111 */
};
static const SCUDSP_OPCODE d1bus_table[] =
{
- { "NOP", 0, 0, 0, }, /* 00 */
- { "MOV", EA_IMM8, EA_DSTMEM, 0, }, /* 01 */ //MOV %I8,%d
- { "???", 0, 0, 0, }, /* 10 */
- { "MOV", EA_SRCMEMD1,0, 0, }, /* 11 */ //MOV %S,%d
+ { "NOP", 0, 0, 0, }, /* 00 */
+ { "MOV", EA_IMM8, EA_DSTMEM, 0, }, /* 01 */ //MOV %I8,%d
+ { "???", 0, 0, 0, }, /* 10 */
+ { "MOV", EA_SRCMEMD1,0, 0, }, /* 11 */ //MOV %S,%d
};
static const SCUDSP_OPCODE mvi_table[] =
{
- { "MVI", EA_IMM25, EA_MVIDSTMEM, 0, }, /* 0 */ //"MVI %I,%d"
- { "MVI", EA_IMM18, EA_MVIDSTMEM, EA_FLAGS, }, /* 1 */ //"MVI %I,%d,%f"
+ { "MVI", EA_IMM25, EA_MVIDSTMEM, 0, }, /* 0 */ //"MVI %I,%d"
+ { "MVI", EA_IMM18, EA_MVIDSTMEM, EA_FLAGS, }, /* 1 */ //"MVI %I,%d,%f"
};
static const SCUDSP_OPCODE dma_table[] =
{
{ "DMA", EA_D0, EA_DMADSTMEM, EA_IMM8, }, /* 000 */ // "DMA%H%A D0,%M,%I",
- { "DMA", EA_DMASRCMEM, EA_D0, EA_IMM8, }, /* 001 */ // "DMA%H%A %s,D0,%I",
- { "DMA", 0, 0, 0, }, /* 010 */ // "DMA%H%A D0,%M,%s",
- { "DMA", 0, 0, 0, }, /* 011 */ // "DMA%H%A %s,D0,%s",
- { "DMAH", EA_D0, EA_DMADSTMEM, EA_IMM8, }, /* 100 */ // "DMA%H%A D0,%M,%I",
- { "DMAH", EA_DMASRCMEM, EA_D0, EA_IMM8, }, /* 101 */ // "DMA%H%A %s,D0,%I",
- { "DMAH", 0, 0, 0, }, /* 110 */ // "DMA%H%A D0,%M,%s",
- { "DMAH", 0, 0, 0, }, /* 111 */ // "DMA%H%A %s,D0,%s",
+ { "DMA", EA_DMASRCMEM, EA_D0, EA_IMM8, }, /* 001 */ // "DMA%H%A %s,D0,%I",
+ { "DMA", 0, 0, 0, }, /* 010 */ // "DMA%H%A D0,%M,%s",
+ { "DMA", 0, 0, 0, }, /* 011 */ // "DMA%H%A %s,D0,%s",
+ { "DMAH", EA_D0, EA_DMADSTMEM, EA_IMM8, }, /* 100 */ // "DMA%H%A D0,%M,%I",
+ { "DMAH", EA_DMASRCMEM, EA_D0, EA_IMM8, }, /* 101 */ // "DMA%H%A %s,D0,%I",
+ { "DMAH", 0, 0, 0, }, /* 110 */ // "DMA%H%A D0,%M,%s",
+ { "DMAH", 0, 0, 0, }, /* 111 */ // "DMA%H%A %s,D0,%s",
};
@@ -112,75 +112,75 @@ static const SCUDSP_OPCODE jmp_table[] =
static const SCUDSP_OPCODE loop_table[] =
{
- { "BTM", 0, 0, 0, }, /* 00 */
- { "LPS", 0, 0, 0, }, /* 01 */
+ { "BTM", 0, 0, 0, }, /* 00 */
+ { "LPS", 0, 0, 0, }, /* 01 */
};
static const SCUDSP_OPCODE end_table[] =
{
- { "END", 0, 0, 0, }, /* 00 */
- { "ENDI",0, 0, 0, }, /* 01 */
+ { "END", 0, 0, 0, }, /* 00 */
+ { "ENDI",0, 0, 0, }, /* 01 */
};
static const char *const src_mem[] =
{
- "M0", /* 0000 */
- "M1", /* 0001 */
- "M2", /* 0010 */
- "M3", /* 0011 */
- "MC0", /* 0100 */
- "MC1", /* 0101 */
- "MC2", /* 0110 */
- "MC3", /* 0111 */
- "???", /* 1000 */
- "ALL", /* 1001 */
- "ALH", /* 1010 */
- "???", /* 1011 */
- "???", /* 1100 */
- "???", /* 1101 */
- "???", /* 1110 */
- "???", /* 1111 */
+ "M0", /* 0000 */
+ "M1", /* 0001 */
+ "M2", /* 0010 */
+ "M3", /* 0011 */
+ "MC0", /* 0100 */
+ "MC1", /* 0101 */
+ "MC2", /* 0110 */
+ "MC3", /* 0111 */
+ "???", /* 1000 */
+ "ALL", /* 1001 */
+ "ALH", /* 1010 */
+ "???", /* 1011 */
+ "???", /* 1100 */
+ "???", /* 1101 */
+ "???", /* 1110 */
+ "???", /* 1111 */
};
static const char *const dst_mem[] =
{
- "MC0", /* 0000 */
- "MC1", /* 0001 */
- "MC2", /* 0010 */
- "MC3", /* 0011 */
- "RX", /* 0100 */
- "PL", /* 0101 */
- "RA0", /* 0110 */
- "WA0", /* 0111 */
- "???", /* 1000 */
- "???", /* 1001 */
- "LOP", /* 1010 */
- "TOP", /* 1011 */
- "CT0", /* 1100 */
- "CT1", /* 1101 */
- "CT2", /* 1110 */
- "CT3", /* 1111 */
+ "MC0", /* 0000 */
+ "MC1", /* 0001 */
+ "MC2", /* 0010 */
+ "MC3", /* 0011 */
+ "RX", /* 0100 */
+ "PL", /* 0101 */
+ "RA0", /* 0110 */
+ "WA0", /* 0111 */
+ "???", /* 1000 */
+ "???", /* 1001 */
+ "LOP", /* 1010 */
+ "TOP", /* 1011 */
+ "CT0", /* 1100 */
+ "CT1", /* 1101 */
+ "CT2", /* 1110 */
+ "CT3", /* 1111 */
};
static const char *const mvi_dst_mem[] =
{
- "MC0", /* 0000 */
- "MC1", /* 0001 */
- "MC2", /* 0010 */
- "MC3", /* 0011 */
- "RX", /* 0100 */
- "PL", /* 0101 */
- "RA0", /* 0110 */
- "WA0", /* 0111 */
- "???", /* 1000 */
- "???", /* 1001 */
- "LOP", /* 1010 */
- "???", /* 1011 */
+ "MC0", /* 0000 */
+ "MC1", /* 0001 */
+ "MC2", /* 0010 */
+ "MC3", /* 0011 */
+ "RX", /* 0100 */
+ "PL", /* 0101 */
+ "RA0", /* 0110 */
+ "WA0", /* 0111 */
+ "???", /* 1000 */
+ "???", /* 1001 */
+ "LOP", /* 1010 */
+ "???", /* 1011 */
"PC", /* 1100 */ //???
- "???", /* 1101 */
- "???", /* 1110 */
- "???", /* 1111 */
+ "???", /* 1101 */
+ "???", /* 1110 */
+ "???", /* 1111 */
};
static const char *const cond_flags[] =
@@ -267,10 +267,10 @@ static UINT32 decode_opcode(UINT32 pc, const SCUDSP_OPCODE *op_table,UINT32 cur_
switch(op_table->address_mode_2)
{
- case EA_A: print("A"); break;
- case EA_P: print("P"); break;
- case EA_X: print("X"); break;
- case EA_Y: print("Y"); break;
+ case EA_A: print("A"); break;
+ case EA_P: print("P"); break;
+ case EA_X: print("X"); break;
+ case EA_Y: print("Y"); break;
case EA_DSTMEM: print("%s ", dst_mem[(cur_opcode & 0x00000f00) >> 8]); break;
case EA_DMADSTMEM: print("%s ", dst_mem[(cur_opcode & 0x00000300) >> 8]); break;
case EA_MVIDSTMEM: print("%s ", mvi_dst_mem[(cur_opcode & 0x3c000000) >> 26]); break;
diff --git a/src/emu/cpu/se3208/se3208.c b/src/emu/cpu/se3208/se3208.c
index aa25186196b..9f32390ff03 100644
--- a/src/emu/cpu/se3208/se3208.c
+++ b/src/emu/cpu/se3208/se3208.c
@@ -31,27 +31,27 @@ struct se3208_state_t
int icount;
};
-#define FLAG_C 0x0080
-#define FLAG_V 0x0010
-#define FLAG_S 0x0020
-#define FLAG_Z 0x0040
-
-#define FLAG_M 0x0200
-#define FLAG_E 0x0800
-#define FLAG_AUT 0x1000
-#define FLAG_ENI 0x2000
-#define FLAG_NMI 0x4000
-
-#define CLRFLAG(f) se3208_state->SR&=~(f);
-#define SETFLAG(f) se3208_state->SR|=(f);
-#define TESTFLAG(f) (se3208_state->SR&(f))
-
-#define EXTRACT(val,sbit,ebit) (((val)>>sbit)&((1<<((ebit-sbit)+1))-1))
-#define SEX8(val) ((val&0x80)?(val|0xFFFFFF00):(val&0xFF))
-#define SEX16(val) ((val&0x8000)?(val|0xFFFF0000):(val&0xFFFF))
-#define ZEX8(val) ((val)&0xFF)
-#define ZEX16(val) ((val)&0xFFFF)
-#define SEX(bits,val) ((val)&(1<<(bits-1))?((val)|(~((1<<bits)-1))):(val&((1<<bits)-1)))
+#define FLAG_C 0x0080
+#define FLAG_V 0x0010
+#define FLAG_S 0x0020
+#define FLAG_Z 0x0040
+
+#define FLAG_M 0x0200
+#define FLAG_E 0x0800
+#define FLAG_AUT 0x1000
+#define FLAG_ENI 0x2000
+#define FLAG_NMI 0x4000
+
+#define CLRFLAG(f) se3208_state->SR&=~(f);
+#define SETFLAG(f) se3208_state->SR|=(f);
+#define TESTFLAG(f) (se3208_state->SR&(f))
+
+#define EXTRACT(val,sbit,ebit) (((val)>>sbit)&((1<<((ebit-sbit)+1))-1))
+#define SEX8(val) ((val&0x80)?(val|0xFFFFFF00):(val&0xFF))
+#define SEX16(val) ((val&0x8000)?(val|0xFFFF0000):(val&0xFFFF))
+#define ZEX8(val) ((val)&0xFF)
+#define ZEX16(val) ((val)&0xFFFF)
+#define SEX(bits,val) ((val)&(1<<(bits-1))?((val)|(~((1<<bits)-1))):(val&((1<<bits)-1)))
//Precompute the instruction decoding in a big table
typedef void (*_OP)(se3208_state_t *se3208_state, UINT16 Opcode);
@@ -157,7 +157,7 @@ INLINE UINT32 AddWithFlags(se3208_state_t *se3208_state, UINT32 a,UINT32 b)
return r;
}
-INLINE UINT32 SubWithFlags(se3208_state_t *se3208_state, UINT32 a,UINT32 b) //a-b
+INLINE UINT32 SubWithFlags(se3208_state_t *se3208_state, UINT32 a,UINT32 b) //a-b
{
UINT32 r=a-b;
CLRFLAG(FLAG_Z|FLAG_C|FLAG_V|FLAG_S);
@@ -547,7 +547,7 @@ INST(POP)
se3208_state->SR=PopVal(se3208_state);
if(Set&(1<<10))
{
- se3208_state->PC=PopVal(se3208_state)-2; //PC automatically incresases by 2
+ se3208_state->PC=PopVal(se3208_state)-2; //PC automatically incresases by 2
}
}
@@ -1488,7 +1488,7 @@ static _OP DecodeOp(UINT16 Opcode)
case 5:
case 6:
case 7:
- case 8: //arith
+ case 8: //arith
case 9:
case 10:
case 11:
@@ -1565,7 +1565,7 @@ static _OP DecodeOp(UINT16 Opcode)
break;
}
break;
- case 1: //Jumps
+ case 1: //Jumps
switch(EXTRACT(Opcode,8,11))
{
case 0x0:
@@ -1605,7 +1605,7 @@ static _OP DecodeOp(UINT16 Opcode)
case 2:
if(Opcode&(1<<11))
return LDI;
- else //SP Ops
+ else //SP Ops
{
if(Opcode&(1<<10))
{
@@ -1803,7 +1803,7 @@ static CPU_EXIT( se3208 )
static void set_irq_line(se3208_state_t *se3208_state, int line,int state)
{
- if(line==INPUT_LINE_NMI) //NMI
+ if(line==INPUT_LINE_NMI) //NMI
se3208_state->NMI=state;
else
se3208_state->IRQ=state;
@@ -1817,23 +1817,23 @@ static CPU_SET_INFO( se3208 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + SE3208_INT: set_irq_line(se3208_state, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(se3208_state, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SE3208_INT: set_irq_line(se3208_state, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(se3208_state, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_REGISTER + SE3208_PC:
- case CPUINFO_INT_PC: se3208_state->PC = info->i; break;
+ case CPUINFO_INT_PC: se3208_state->PC = info->i; break;
case CPUINFO_INT_REGISTER + SE3208_SP:
- case CPUINFO_INT_SP: se3208_state->SP = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_ER: se3208_state->ER = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_SR: se3208_state->SR = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R0: se3208_state->R[ 0] = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R1: se3208_state->R[ 1] = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R2: se3208_state->R[ 2] = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R3: se3208_state->R[ 3] = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R4: se3208_state->R[ 4] = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R5: se3208_state->R[ 5] = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R6: se3208_state->R[ 6] = info->i; break;
- case CPUINFO_INT_REGISTER + SE3208_R7: se3208_state->R[ 7] = info->i; break;
+ case CPUINFO_INT_SP: se3208_state->SP = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_ER: se3208_state->ER = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_SR: se3208_state->SR = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R0: se3208_state->R[ 0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R1: se3208_state->R[ 1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R2: se3208_state->R[ 2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R3: se3208_state->R[ 3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R4: se3208_state->R[ 4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R5: se3208_state->R[ 5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R6: se3208_state->R[ 6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SE3208_R7: se3208_state->R[ 7] = info->i; break;
}
}
@@ -1845,63 +1845,63 @@ CPU_GET_INFO( se3208 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(se3208_state_t); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + SE3208_INT: info->i = se3208_state->IRQ; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = se3208_state->NMI; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = se3208_state->PPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(se3208_state_t); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + SE3208_INT: info->i = se3208_state->IRQ; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = se3208_state->NMI; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = se3208_state->PPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SE3208_PC: info->i = se3208_state->PC; break;
+ case CPUINFO_INT_REGISTER + SE3208_PC: info->i = se3208_state->PC; break;
case CPUINFO_INT_REGISTER + SE3208_SP:
- case CPUINFO_INT_SP: info->i = se3208_state->SP; break;
- case CPUINFO_INT_REGISTER + SE3208_SR: info->i = se3208_state->SR; break;
- case CPUINFO_INT_REGISTER + SE3208_ER: info->i = se3208_state->ER; break;
- case CPUINFO_INT_REGISTER + SE3208_R0: info->i = se3208_state->R[ 0]; break;
- case CPUINFO_INT_REGISTER + SE3208_R1: info->i = se3208_state->R[ 1]; break;
- case CPUINFO_INT_REGISTER + SE3208_R2: info->i = se3208_state->R[ 2]; break;
- case CPUINFO_INT_REGISTER + SE3208_R3: info->i = se3208_state->R[ 3]; break;
- case CPUINFO_INT_REGISTER + SE3208_R4: info->i = se3208_state->R[ 4]; break;
- case CPUINFO_INT_REGISTER + SE3208_R5: info->i = se3208_state->R[ 5]; break;
- case CPUINFO_INT_REGISTER + SE3208_R6: info->i = se3208_state->R[ 6]; break;
- case CPUINFO_INT_REGISTER + SE3208_R7: info->i = se3208_state->R[ 7]; break;
+ case CPUINFO_INT_SP: info->i = se3208_state->SP; break;
+ case CPUINFO_INT_REGISTER + SE3208_SR: info->i = se3208_state->SR; break;
+ case CPUINFO_INT_REGISTER + SE3208_ER: info->i = se3208_state->ER; break;
+ case CPUINFO_INT_REGISTER + SE3208_R0: info->i = se3208_state->R[ 0]; break;
+ case CPUINFO_INT_REGISTER + SE3208_R1: info->i = se3208_state->R[ 1]; break;
+ case CPUINFO_INT_REGISTER + SE3208_R2: info->i = se3208_state->R[ 2]; break;
+ case CPUINFO_INT_REGISTER + SE3208_R3: info->i = se3208_state->R[ 3]; break;
+ case CPUINFO_INT_REGISTER + SE3208_R4: info->i = se3208_state->R[ 4]; break;
+ case CPUINFO_INT_REGISTER + SE3208_R5: info->i = se3208_state->R[ 5]; break;
+ case CPUINFO_INT_REGISTER + SE3208_R6: info->i = se3208_state->R[ 6]; break;
+ case CPUINFO_INT_REGISTER + SE3208_R7: info->i = se3208_state->R[ 7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(se3208); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(se3208); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(se3208); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(se3208); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(se3208);break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(se3208); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &se3208_state->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(se3208); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(se3208); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(se3208); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(se3208); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(se3208);break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(se3208); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &se3208_state->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SE3208"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Advanced Digital Chips Inc."); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.00"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miguel Angel Horna, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SE3208"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Advanced Digital Chips Inc."); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.00"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Miguel Angel Horna, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c %c%c%c%c%c",
@@ -1920,19 +1920,19 @@ CPU_GET_INFO( se3208 )
break;
- case CPUINFO_STR_REGISTER + SE3208_PC: sprintf(info->s, "PC :%08X", se3208_state->PC); break;
- case CPUINFO_STR_REGISTER + SE3208_SR: sprintf(info->s, "SR :%08X", se3208_state->SR); break;
- case CPUINFO_STR_REGISTER + SE3208_ER: sprintf(info->s, "ER :%08X", se3208_state->ER); break;
- case CPUINFO_STR_REGISTER + SE3208_SP: sprintf(info->s, "SP :%08X", se3208_state->SP); break;
- case CPUINFO_STR_REGISTER + SE3208_R0: sprintf(info->s, "R0 :%08X", se3208_state->R[ 0]); break;
- case CPUINFO_STR_REGISTER + SE3208_R1: sprintf(info->s, "R1 :%08X", se3208_state->R[ 1]); break;
- case CPUINFO_STR_REGISTER + SE3208_R2: sprintf(info->s, "R2 :%08X", se3208_state->R[ 2]); break;
- case CPUINFO_STR_REGISTER + SE3208_R3: sprintf(info->s, "R3 :%08X", se3208_state->R[ 3]); break;
- case CPUINFO_STR_REGISTER + SE3208_R4: sprintf(info->s, "R4 :%08X", se3208_state->R[ 4]); break;
- case CPUINFO_STR_REGISTER + SE3208_R5: sprintf(info->s, "R5 :%08X", se3208_state->R[ 5]); break;
- case CPUINFO_STR_REGISTER + SE3208_R6: sprintf(info->s, "R6 :%08X", se3208_state->R[ 6]); break;
- case CPUINFO_STR_REGISTER + SE3208_R7: sprintf(info->s, "R7 :%08X", se3208_state->R[ 7]); break;
- case CPUINFO_STR_REGISTER + SE3208_PPC: sprintf(info->s, "PPC :%08X", se3208_state->PPC); break;
+ case CPUINFO_STR_REGISTER + SE3208_PC: sprintf(info->s, "PC :%08X", se3208_state->PC); break;
+ case CPUINFO_STR_REGISTER + SE3208_SR: sprintf(info->s, "SR :%08X", se3208_state->SR); break;
+ case CPUINFO_STR_REGISTER + SE3208_ER: sprintf(info->s, "ER :%08X", se3208_state->ER); break;
+ case CPUINFO_STR_REGISTER + SE3208_SP: sprintf(info->s, "SP :%08X", se3208_state->SP); break;
+ case CPUINFO_STR_REGISTER + SE3208_R0: sprintf(info->s, "R0 :%08X", se3208_state->R[ 0]); break;
+ case CPUINFO_STR_REGISTER + SE3208_R1: sprintf(info->s, "R1 :%08X", se3208_state->R[ 1]); break;
+ case CPUINFO_STR_REGISTER + SE3208_R2: sprintf(info->s, "R2 :%08X", se3208_state->R[ 2]); break;
+ case CPUINFO_STR_REGISTER + SE3208_R3: sprintf(info->s, "R3 :%08X", se3208_state->R[ 3]); break;
+ case CPUINFO_STR_REGISTER + SE3208_R4: sprintf(info->s, "R4 :%08X", se3208_state->R[ 4]); break;
+ case CPUINFO_STR_REGISTER + SE3208_R5: sprintf(info->s, "R5 :%08X", se3208_state->R[ 5]); break;
+ case CPUINFO_STR_REGISTER + SE3208_R6: sprintf(info->s, "R6 :%08X", se3208_state->R[ 6]); break;
+ case CPUINFO_STR_REGISTER + SE3208_R7: sprintf(info->s, "R7 :%08X", se3208_state->R[ 7]); break;
+ case CPUINFO_STR_REGISTER + SE3208_PPC: sprintf(info->s, "PPC :%08X", se3208_state->PPC); break;
}
}
diff --git a/src/emu/cpu/se3208/se3208.h b/src/emu/cpu/se3208/se3208.h
index 272fb7beddd..a2a33877889 100644
--- a/src/emu/cpu/se3208/se3208.h
+++ b/src/emu/cpu/se3208/se3208.h
@@ -5,7 +5,7 @@ enum
SE3208_R0, SE3208_R1, SE3208_R2, SE3208_R3, SE3208_R4, SE3208_R5, SE3208_R6, SE3208_R7
};
-#define SE3208_INT 0
+#define SE3208_INT 0
DECLARE_LEGACY_CPU_DEVICE(SE3208, se3208);
diff --git a/src/emu/cpu/se3208/se3208dis.c b/src/emu/cpu/se3208/se3208dis.c
index 82c758496c7..38f3e2adb7c 100644
--- a/src/emu/cpu/se3208/se3208dis.c
+++ b/src/emu/cpu/se3208/se3208dis.c
@@ -10,18 +10,18 @@ static struct
UINT32 ER;
} Context;
-#define FLAG_E 0x0800
+#define FLAG_E 0x0800
-#define CLRFLAG(f) Context.SR&=~(f);
-#define SETFLAG(f) Context.SR|=(f);
-#define TESTFLAG(f) (Context.SR&(f))
+#define CLRFLAG(f) Context.SR&=~(f);
+#define SETFLAG(f) Context.SR|=(f);
+#define TESTFLAG(f) (Context.SR&(f))
-#define EXTRACT(val,sbit,ebit) (((val)>>sbit)&((1<<((ebit-sbit)+1))-1))
-#define SEX8(val) ((val&0x80)?(val|0xFFFFFF00):(val&0xFF))
-#define SEX16(val) ((val&0x8000)?(val|0xFFFF0000):(val&0xFFFF))
-#define ZEX8(val) ((val)&0xFF)
-#define ZEX16(val) ((val)&0xFFFF)
-#define SEX(bits,val) ((val)&(1<<(bits-1))?((val)|(~((1<<bits)-1))):(val&((1<<bits)-1)))
+#define EXTRACT(val,sbit,ebit) (((val)>>sbit)&((1<<((ebit-sbit)+1))-1))
+#define SEX8(val) ((val&0x80)?(val|0xFFFFFF00):(val&0xFF))
+#define SEX16(val) ((val&0x8000)?(val|0xFFFF0000):(val&0xFFFF))
+#define ZEX8(val) ((val)&0xFF)
+#define ZEX16(val) ((val)&0xFFFF)
+#define SEX(bits,val) ((val)&(1<<(bits-1))?((val)|(~((1<<bits)-1))):(val&((1<<bits)-1)))
typedef UINT32 (*_OP)(UINT16 Opcode,char *dst);
#define INST(a) static UINT32 a(UINT16 Opcode,char *dst)
@@ -297,7 +297,7 @@ INST(POP)
if(Set&(1<<10))
{
strcat(str,"%PC-");
- CLRFLAG(FLAG_E); //Clear the flag, this is a ret so disassemble will start a new E block
+ CLRFLAG(FLAG_E); //Clear the flag, this is a ret so disassemble will start a new E block
Ret=1;
}
str[strlen(str)-1]=0;
@@ -1188,7 +1188,7 @@ static _OP DecodeOp(UINT16 Opcode)
case 5:
case 6:
case 7:
- case 8: //arith
+ case 8: //arith
case 9:
case 10:
case 11:
@@ -1265,7 +1265,7 @@ static _OP DecodeOp(UINT16 Opcode)
break;
}
break;
- case 1: //Jumps
+ case 1: //Jumps
switch(EXTRACT(Opcode,8,11))
{
case 0x0:
@@ -1305,7 +1305,7 @@ static _OP DecodeOp(UINT16 Opcode)
case 2:
if(Opcode&(1<<11))
return LDI;
- else //SP Ops
+ else //SP Ops
{
if(Opcode&(1<<10))
{
diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c
index 0ff7ecd563e..5d934e94d6b 100644
--- a/src/emu/cpu/sh2/sh2.c
+++ b/src/emu/cpu/sh2/sh2.c
@@ -109,11 +109,11 @@ CPU_DISASSEMBLE( sh2 );
#ifndef USE_SH2DRC
/* speed up delay loops, bail out of tight loops */
-#define BUSY_LOOP_HACKS 1
+#define BUSY_LOOP_HACKS 1
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
INLINE sh2_state *get_safe_token(device_t *device)
{
@@ -121,7 +121,7 @@ INLINE sh2_state *get_safe_token(device_t *device)
assert(device->token != NULL);
assert(device->type() == CPU);
assert(cpu_get_type(device) == CPU_SH1 ||
- cpu_get_type(device) == CPU_SH2);
+ cpu_get_type(device) == CPU_SH2);
return (sh2_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -164,7 +164,7 @@ INLINE UINT32 RL(sh2_state *sh2, offs_t A)
if (A >= 0x40000000)
return 0xa5a5a5a5;
- return sh2->program->read_dword(A & AM);
+ return sh2->program->read_dword(A & AM);
}
INLINE void WB(sh2_state *sh2, offs_t A, UINT8 V)
@@ -374,10 +374,10 @@ INLINE void BRA(sh2_state *sh2, UINT32 d)
{
UINT32 next_opcode = RW( sh2, sh2->ppc & AM );
/* BRA $
- * NOP
- */
+ * NOP
+ */
if (next_opcode == 0x0009)
- sh2->icount %= 3; /* cycles for BRA $ and NOP taken (3) */
+ sh2->icount %= 3; /* cycles for BRA $ and NOP taken (3) */
}
#endif
sh2->delay = sh2->pc;
@@ -560,19 +560,19 @@ INLINE void CMPPZ(sh2_state *sh2, UINT32 n)
* CMP_STR Rm,Rn
*/
INLINE void CMPSTR(sh2_state *sh2, UINT32 m, UINT32 n)
- {
- UINT32 temp;
- INT32 HH, HL, LH, LL;
- temp = sh2->r[n] ^ sh2->r[m];
- HH = (temp >> 24) & 0xff;
- HL = (temp >> 16) & 0xff;
- LH = (temp >> 8) & 0xff;
- LL = temp & 0xff;
- if (HH && HL && LH && LL)
- sh2->sr &= ~T;
- else
- sh2->sr |= T;
- }
+ {
+ UINT32 temp;
+ INT32 HH, HL, LH, LL;
+ temp = sh2->r[n] ^ sh2->r[m];
+ HH = (temp >> 24) & 0xff;
+ HL = (temp >> 16) & 0xff;
+ LH = (temp >> 8) & 0xff;
+ LL = temp & 0xff;
+ if (HH && HL && LH && LL)
+ sh2->sr &= ~T;
+ else
+ sh2->sr |= T;
+ }
/* code cycles t-bit
@@ -802,14 +802,14 @@ INLINE void DT(sh2_state *sh2, UINT32 n)
{
UINT32 next_opcode = RW( sh2, sh2->ppc & AM );
/* DT Rn
- * BF $-2
- */
+ * BF $-2
+ */
if (next_opcode == 0x8bfd)
{
while (sh2->r[n] > 1 && sh2->icount > 4)
{
sh2->r[n]--;
- sh2->icount -= 4; /* cycles for DT (1) and BF taken (3) */
+ sh2->icount -= 4; /* cycles for DT (1) and BF taken (3) */
}
}
}
@@ -1829,73 +1829,73 @@ INLINE void op0000(sh2_state *sh2, UINT16 opcode)
{
switch (opcode & 0x3F)
{
- case 0x00: NOP(); break;
- case 0x01: NOP(); break;
- case 0x02: STCSR(sh2, Rn); break;
- case 0x03: BSRF(sh2, Rn); break;
- case 0x04: MOVBS0(sh2, Rm, Rn); break;
- case 0x05: MOVWS0(sh2, Rm, Rn); break;
- case 0x06: MOVLS0(sh2, Rm, Rn); break;
- case 0x07: MULL(sh2, Rm, Rn); break;
- case 0x08: CLRT(sh2); break;
- case 0x09: NOP(); break;
- case 0x0a: STSMACH(sh2, Rn); break;
- case 0x0b: RTS(sh2); break;
- case 0x0c: MOVBL0(sh2, Rm, Rn); break;
- case 0x0d: MOVWL0(sh2, Rm, Rn); break;
- case 0x0e: MOVLL0(sh2, Rm, Rn); break;
- case 0x0f: MAC_L(sh2, Rm, Rn); break;
-
- case 0x10: NOP(); break;
- case 0x11: NOP(); break;
- case 0x12: STCGBR(sh2, Rn); break;
- case 0x13: NOP(); break;
- case 0x14: MOVBS0(sh2, Rm, Rn); break;
- case 0x15: MOVWS0(sh2, Rm, Rn); break;
- case 0x16: MOVLS0(sh2, Rm, Rn); break;
- case 0x17: MULL(sh2, Rm, Rn); break;
- case 0x18: SETT(sh2); break;
- case 0x19: DIV0U(sh2); break;
- case 0x1a: STSMACL(sh2, Rn); break;
- case 0x1b: SLEEP(sh2); break;
- case 0x1c: MOVBL0(sh2, Rm, Rn); break;
- case 0x1d: MOVWL0(sh2, Rm, Rn); break;
- case 0x1e: MOVLL0(sh2, Rm, Rn); break;
- case 0x1f: MAC_L(sh2, Rm, Rn); break;
-
- case 0x20: NOP(); break;
- case 0x21: NOP(); break;
- case 0x22: STCVBR(sh2, Rn); break;
- case 0x23: BRAF(sh2, Rn); break;
- case 0x24: MOVBS0(sh2, Rm, Rn); break;
- case 0x25: MOVWS0(sh2, Rm, Rn); break;
- case 0x26: MOVLS0(sh2, Rm, Rn); break;
- case 0x27: MULL(sh2, Rm, Rn); break;
- case 0x28: CLRMAC(sh2); break;
- case 0x29: MOVT(sh2, Rn); break;
- case 0x2a: STSPR(sh2, Rn); break;
- case 0x2b: RTE(sh2); break;
- case 0x2c: MOVBL0(sh2, Rm, Rn); break;
- case 0x2d: MOVWL0(sh2, Rm, Rn); break;
- case 0x2e: MOVLL0(sh2, Rm, Rn); break;
- case 0x2f: MAC_L(sh2, Rm, Rn); break;
-
- case 0x30: NOP(); break;
- case 0x31: NOP(); break;
- case 0x32: NOP(); break;
- case 0x33: NOP(); break;
- case 0x34: MOVBS0(sh2, Rm, Rn); break;
- case 0x35: MOVWS0(sh2, Rm, Rn); break;
- case 0x36: MOVLS0(sh2, Rm, Rn); break;
- case 0x37: MULL(sh2, Rm, Rn); break;
- case 0x38: NOP(); break;
- case 0x39: NOP(); break;
- case 0x3c: MOVBL0(sh2, Rm, Rn); break;
- case 0x3d: MOVWL0(sh2, Rm, Rn); break;
- case 0x3e: MOVLL0(sh2, Rm, Rn); break;
- case 0x3f: MAC_L(sh2, Rm, Rn); break;
- case 0x3a: NOP(); break;
- case 0x3b: NOP(); break;
+ case 0x00: NOP(); break;
+ case 0x01: NOP(); break;
+ case 0x02: STCSR(sh2, Rn); break;
+ case 0x03: BSRF(sh2, Rn); break;
+ case 0x04: MOVBS0(sh2, Rm, Rn); break;
+ case 0x05: MOVWS0(sh2, Rm, Rn); break;
+ case 0x06: MOVLS0(sh2, Rm, Rn); break;
+ case 0x07: MULL(sh2, Rm, Rn); break;
+ case 0x08: CLRT(sh2); break;
+ case 0x09: NOP(); break;
+ case 0x0a: STSMACH(sh2, Rn); break;
+ case 0x0b: RTS(sh2); break;
+ case 0x0c: MOVBL0(sh2, Rm, Rn); break;
+ case 0x0d: MOVWL0(sh2, Rm, Rn); break;
+ case 0x0e: MOVLL0(sh2, Rm, Rn); break;
+ case 0x0f: MAC_L(sh2, Rm, Rn); break;
+
+ case 0x10: NOP(); break;
+ case 0x11: NOP(); break;
+ case 0x12: STCGBR(sh2, Rn); break;
+ case 0x13: NOP(); break;
+ case 0x14: MOVBS0(sh2, Rm, Rn); break;
+ case 0x15: MOVWS0(sh2, Rm, Rn); break;
+ case 0x16: MOVLS0(sh2, Rm, Rn); break;
+ case 0x17: MULL(sh2, Rm, Rn); break;
+ case 0x18: SETT(sh2); break;
+ case 0x19: DIV0U(sh2); break;
+ case 0x1a: STSMACL(sh2, Rn); break;
+ case 0x1b: SLEEP(sh2); break;
+ case 0x1c: MOVBL0(sh2, Rm, Rn); break;
+ case 0x1d: MOVWL0(sh2, Rm, Rn); break;
+ case 0x1e: MOVLL0(sh2, Rm, Rn); break;
+ case 0x1f: MAC_L(sh2, Rm, Rn); break;
+
+ case 0x20: NOP(); break;
+ case 0x21: NOP(); break;
+ case 0x22: STCVBR(sh2, Rn); break;
+ case 0x23: BRAF(sh2, Rn); break;
+ case 0x24: MOVBS0(sh2, Rm, Rn); break;
+ case 0x25: MOVWS0(sh2, Rm, Rn); break;
+ case 0x26: MOVLS0(sh2, Rm, Rn); break;
+ case 0x27: MULL(sh2, Rm, Rn); break;
+ case 0x28: CLRMAC(sh2); break;
+ case 0x29: MOVT(sh2, Rn); break;
+ case 0x2a: STSPR(sh2, Rn); break;
+ case 0x2b: RTE(sh2); break;
+ case 0x2c: MOVBL0(sh2, Rm, Rn); break;
+ case 0x2d: MOVWL0(sh2, Rm, Rn); break;
+ case 0x2e: MOVLL0(sh2, Rm, Rn); break;
+ case 0x2f: MAC_L(sh2, Rm, Rn); break;
+
+ case 0x30: NOP(); break;
+ case 0x31: NOP(); break;
+ case 0x32: NOP(); break;
+ case 0x33: NOP(); break;
+ case 0x34: MOVBS0(sh2, Rm, Rn); break;
+ case 0x35: MOVWS0(sh2, Rm, Rn); break;
+ case 0x36: MOVLS0(sh2, Rm, Rn); break;
+ case 0x37: MULL(sh2, Rm, Rn); break;
+ case 0x38: NOP(); break;
+ case 0x39: NOP(); break;
+ case 0x3c: MOVBL0(sh2, Rm, Rn); break;
+ case 0x3d: MOVWL0(sh2, Rm, Rn); break;
+ case 0x3e: MOVLL0(sh2, Rm, Rn); break;
+ case 0x3f: MAC_L(sh2, Rm, Rn); break;
+ case 0x3a: NOP(); break;
+ case 0x3b: NOP(); break;
@@ -1911,22 +1911,22 @@ INLINE void op0010(sh2_state *sh2, UINT16 opcode)
{
switch (opcode & 15)
{
- case 0: MOVBS(sh2, Rm, Rn); break;
- case 1: MOVWS(sh2, Rm, Rn); break;
- case 2: MOVLS(sh2, Rm, Rn); break;
- case 3: NOP(); break;
- case 4: MOVBM(sh2, Rm, Rn); break;
- case 5: MOVWM(sh2, Rm, Rn); break;
- case 6: MOVLM(sh2, Rm, Rn); break;
- case 7: DIV0S(sh2, Rm, Rn); break;
- case 8: TST(sh2, Rm, Rn); break;
- case 9: AND(sh2, Rm, Rn); break;
- case 10: XOR(sh2, Rm, Rn); break;
- case 11: OR(sh2, Rm, Rn); break;
- case 12: CMPSTR(sh2, Rm, Rn); break;
- case 13: XTRCT(sh2, Rm, Rn); break;
- case 14: MULU(sh2, Rm, Rn); break;
- case 15: MULS(sh2, Rm, Rn); break;
+ case 0: MOVBS(sh2, Rm, Rn); break;
+ case 1: MOVWS(sh2, Rm, Rn); break;
+ case 2: MOVLS(sh2, Rm, Rn); break;
+ case 3: NOP(); break;
+ case 4: MOVBM(sh2, Rm, Rn); break;
+ case 5: MOVWM(sh2, Rm, Rn); break;
+ case 6: MOVLM(sh2, Rm, Rn); break;
+ case 7: DIV0S(sh2, Rm, Rn); break;
+ case 8: TST(sh2, Rm, Rn); break;
+ case 9: AND(sh2, Rm, Rn); break;
+ case 10: XOR(sh2, Rm, Rn); break;
+ case 11: OR(sh2, Rm, Rn); break;
+ case 12: CMPSTR(sh2, Rm, Rn); break;
+ case 13: XTRCT(sh2, Rm, Rn); break;
+ case 14: MULU(sh2, Rm, Rn); break;
+ case 15: MULS(sh2, Rm, Rn); break;
}
}
@@ -1934,22 +1934,22 @@ INLINE void op0011(sh2_state *sh2, UINT16 opcode)
{
switch (opcode & 15)
{
- case 0: CMPEQ(sh2, Rm, Rn); break;
- case 1: NOP(); break;
- case 2: CMPHS(sh2, Rm, Rn); break;
- case 3: CMPGE(sh2, Rm, Rn); break;
- case 4: DIV1(sh2, Rm, Rn); break;
- case 5: DMULU(sh2, Rm, Rn); break;
- case 6: CMPHI(sh2, Rm, Rn); break;
- case 7: CMPGT(sh2, Rm, Rn); break;
- case 8: SUB(sh2, Rm, Rn); break;
- case 9: NOP(); break;
- case 10: SUBC(sh2, Rm, Rn); break;
- case 11: SUBV(sh2, Rm, Rn); break;
- case 12: ADD(sh2, Rm, Rn); break;
- case 13: DMULS(sh2, Rm, Rn); break;
- case 14: ADDC(sh2, Rm, Rn); break;
- case 15: ADDV(sh2, Rm, Rn); break;
+ case 0: CMPEQ(sh2, Rm, Rn); break;
+ case 1: NOP(); break;
+ case 2: CMPHS(sh2, Rm, Rn); break;
+ case 3: CMPGE(sh2, Rm, Rn); break;
+ case 4: DIV1(sh2, Rm, Rn); break;
+ case 5: DMULU(sh2, Rm, Rn); break;
+ case 6: CMPHI(sh2, Rm, Rn); break;
+ case 7: CMPGT(sh2, Rm, Rn); break;
+ case 8: SUB(sh2, Rm, Rn); break;
+ case 9: NOP(); break;
+ case 10: SUBC(sh2, Rm, Rn); break;
+ case 11: SUBV(sh2, Rm, Rn); break;
+ case 12: ADD(sh2, Rm, Rn); break;
+ case 13: DMULS(sh2, Rm, Rn); break;
+ case 14: ADDC(sh2, Rm, Rn); break;
+ case 15: ADDV(sh2, Rm, Rn); break;
}
}
@@ -1957,73 +1957,73 @@ INLINE void op0100(sh2_state *sh2, UINT16 opcode)
{
switch (opcode & 0x3F)
{
- case 0x00: SHLL(sh2, Rn); break;
- case 0x01: SHLR(sh2, Rn); break;
- case 0x02: STSMMACH(sh2, Rn); break;
- case 0x03: STCMSR(sh2, Rn); break;
- case 0x04: ROTL(sh2, Rn); break;
- case 0x05: ROTR(sh2, Rn); break;
- case 0x06: LDSMMACH(sh2, Rn); break;
- case 0x07: LDCMSR(sh2, Rn); break;
- case 0x08: SHLL2(sh2, Rn); break;
- case 0x09: SHLR2(sh2, Rn); break;
- case 0x0a: LDSMACH(sh2, Rn); break;
- case 0x0b: JSR(sh2, Rn); break;
- case 0x0c: NOP(); break;
- case 0x0d: NOP(); break;
- case 0x0e: LDCSR(sh2, Rn); break;
- case 0x0f: MAC_W(sh2, Rm, Rn); break;
-
- case 0x10: DT(sh2, Rn); break;
- case 0x11: CMPPZ(sh2, Rn); break;
- case 0x12: STSMMACL(sh2, Rn); break;
- case 0x13: STCMGBR(sh2, Rn); break;
- case 0x14: NOP(); break;
- case 0x15: CMPPL(sh2, Rn); break;
- case 0x16: LDSMMACL(sh2, Rn); break;
- case 0x17: LDCMGBR(sh2, Rn); break;
- case 0x18: SHLL8(sh2, Rn); break;
- case 0x19: SHLR8(sh2, Rn); break;
- case 0x1a: LDSMACL(sh2, Rn); break;
- case 0x1b: TAS(sh2, Rn); break;
- case 0x1c: NOP(); break;
- case 0x1d: NOP(); break;
- case 0x1e: LDCGBR(sh2, Rn); break;
- case 0x1f: MAC_W(sh2, Rm, Rn); break;
-
- case 0x20: SHAL(sh2, Rn); break;
- case 0x21: SHAR(sh2, Rn); break;
- case 0x22: STSMPR(sh2, Rn); break;
- case 0x23: STCMVBR(sh2, Rn); break;
- case 0x24: ROTCL(sh2, Rn); break;
- case 0x25: ROTCR(sh2, Rn); break;
- case 0x26: LDSMPR(sh2, Rn); break;
- case 0x27: LDCMVBR(sh2, Rn); break;
- case 0x28: SHLL16(sh2, Rn); break;
- case 0x29: SHLR16(sh2, Rn); break;
- case 0x2a: LDSPR(sh2, Rn); break;
- case 0x2b: JMP(sh2, Rn); break;
- case 0x2c: NOP(); break;
- case 0x2d: NOP(); break;
- case 0x2e: LDCVBR(sh2, Rn); break;
- case 0x2f: MAC_W(sh2, Rm, Rn); break;
-
- case 0x30: NOP(); break;
- case 0x31: NOP(); break;
- case 0x32: NOP(); break;
- case 0x33: NOP(); break;
- case 0x34: NOP(); break;
- case 0x35: NOP(); break;
- case 0x36: NOP(); break;
- case 0x37: NOP(); break;
- case 0x38: NOP(); break;
- case 0x39: NOP(); break;
- case 0x3a: NOP(); break;
- case 0x3b: NOP(); break;
- case 0x3c: NOP(); break;
- case 0x3d: NOP(); break;
- case 0x3e: NOP(); break;
- case 0x3f: MAC_W(sh2, Rm, Rn); break;
+ case 0x00: SHLL(sh2, Rn); break;
+ case 0x01: SHLR(sh2, Rn); break;
+ case 0x02: STSMMACH(sh2, Rn); break;
+ case 0x03: STCMSR(sh2, Rn); break;
+ case 0x04: ROTL(sh2, Rn); break;
+ case 0x05: ROTR(sh2, Rn); break;
+ case 0x06: LDSMMACH(sh2, Rn); break;
+ case 0x07: LDCMSR(sh2, Rn); break;
+ case 0x08: SHLL2(sh2, Rn); break;
+ case 0x09: SHLR2(sh2, Rn); break;
+ case 0x0a: LDSMACH(sh2, Rn); break;
+ case 0x0b: JSR(sh2, Rn); break;
+ case 0x0c: NOP(); break;
+ case 0x0d: NOP(); break;
+ case 0x0e: LDCSR(sh2, Rn); break;
+ case 0x0f: MAC_W(sh2, Rm, Rn); break;
+
+ case 0x10: DT(sh2, Rn); break;
+ case 0x11: CMPPZ(sh2, Rn); break;
+ case 0x12: STSMMACL(sh2, Rn); break;
+ case 0x13: STCMGBR(sh2, Rn); break;
+ case 0x14: NOP(); break;
+ case 0x15: CMPPL(sh2, Rn); break;
+ case 0x16: LDSMMACL(sh2, Rn); break;
+ case 0x17: LDCMGBR(sh2, Rn); break;
+ case 0x18: SHLL8(sh2, Rn); break;
+ case 0x19: SHLR8(sh2, Rn); break;
+ case 0x1a: LDSMACL(sh2, Rn); break;
+ case 0x1b: TAS(sh2, Rn); break;
+ case 0x1c: NOP(); break;
+ case 0x1d: NOP(); break;
+ case 0x1e: LDCGBR(sh2, Rn); break;
+ case 0x1f: MAC_W(sh2, Rm, Rn); break;
+
+ case 0x20: SHAL(sh2, Rn); break;
+ case 0x21: SHAR(sh2, Rn); break;
+ case 0x22: STSMPR(sh2, Rn); break;
+ case 0x23: STCMVBR(sh2, Rn); break;
+ case 0x24: ROTCL(sh2, Rn); break;
+ case 0x25: ROTCR(sh2, Rn); break;
+ case 0x26: LDSMPR(sh2, Rn); break;
+ case 0x27: LDCMVBR(sh2, Rn); break;
+ case 0x28: SHLL16(sh2, Rn); break;
+ case 0x29: SHLR16(sh2, Rn); break;
+ case 0x2a: LDSPR(sh2, Rn); break;
+ case 0x2b: JMP(sh2, Rn); break;
+ case 0x2c: NOP(); break;
+ case 0x2d: NOP(); break;
+ case 0x2e: LDCVBR(sh2, Rn); break;
+ case 0x2f: MAC_W(sh2, Rm, Rn); break;
+
+ case 0x30: NOP(); break;
+ case 0x31: NOP(); break;
+ case 0x32: NOP(); break;
+ case 0x33: NOP(); break;
+ case 0x34: NOP(); break;
+ case 0x35: NOP(); break;
+ case 0x36: NOP(); break;
+ case 0x37: NOP(); break;
+ case 0x38: NOP(); break;
+ case 0x39: NOP(); break;
+ case 0x3a: NOP(); break;
+ case 0x3b: NOP(); break;
+ case 0x3c: NOP(); break;
+ case 0x3d: NOP(); break;
+ case 0x3e: NOP(); break;
+ case 0x3f: MAC_W(sh2, Rm, Rn); break;
}
}
@@ -2037,22 +2037,22 @@ INLINE void op0110(sh2_state *sh2, UINT16 opcode)
{
switch (opcode & 15)
{
- case 0: MOVBL(sh2, Rm, Rn); break;
- case 1: MOVWL(sh2, Rm, Rn); break;
- case 2: MOVLL(sh2, Rm, Rn); break;
- case 3: MOV(sh2, Rm, Rn); break;
- case 4: MOVBP(sh2, Rm, Rn); break;
- case 5: MOVWP(sh2, Rm, Rn); break;
- case 6: MOVLP(sh2, Rm, Rn); break;
- case 7: NOT(sh2, Rm, Rn); break;
- case 8: SWAPB(sh2, Rm, Rn); break;
- case 9: SWAPW(sh2, Rm, Rn); break;
- case 10: NEGC(sh2, Rm, Rn); break;
- case 11: NEG(sh2, Rm, Rn); break;
- case 12: EXTUB(sh2, Rm, Rn); break;
- case 13: EXTUW(sh2, Rm, Rn); break;
- case 14: EXTSB(sh2, Rm, Rn); break;
- case 15: EXTSW(sh2, Rm, Rn); break;
+ case 0: MOVBL(sh2, Rm, Rn); break;
+ case 1: MOVWL(sh2, Rm, Rn); break;
+ case 2: MOVLL(sh2, Rm, Rn); break;
+ case 3: MOV(sh2, Rm, Rn); break;
+ case 4: MOVBP(sh2, Rm, Rn); break;
+ case 5: MOVWP(sh2, Rm, Rn); break;
+ case 6: MOVLP(sh2, Rm, Rn); break;
+ case 7: NOT(sh2, Rm, Rn); break;
+ case 8: SWAPB(sh2, Rm, Rn); break;
+ case 9: SWAPW(sh2, Rm, Rn); break;
+ case 10: NEGC(sh2, Rm, Rn); break;
+ case 11: NEG(sh2, Rm, Rn); break;
+ case 12: EXTUB(sh2, Rm, Rn); break;
+ case 13: EXTUW(sh2, Rm, Rn); break;
+ case 14: EXTSB(sh2, Rm, Rn); break;
+ case 15: EXTSW(sh2, Rm, Rn); break;
}
}
@@ -2065,22 +2065,22 @@ INLINE void op1000(sh2_state *sh2, UINT16 opcode)
{
switch ( opcode & (15<<8) )
{
- case 0 << 8: MOVBS4(sh2, opcode & 0x0f, Rm); break;
- case 1 << 8: MOVWS4(sh2, opcode & 0x0f, Rm); break;
- case 2<< 8: NOP(); break;
- case 3<< 8: NOP(); break;
- case 4<< 8: MOVBL4(sh2, Rm, opcode & 0x0f); break;
- case 5<< 8: MOVWL4(sh2, Rm, opcode & 0x0f); break;
- case 6<< 8: NOP(); break;
- case 7<< 8: NOP(); break;
- case 8<< 8: CMPIM(sh2, opcode & 0xff); break;
- case 9<< 8: BT(sh2, opcode & 0xff); break;
- case 10<< 8: NOP(); break;
- case 11<< 8: BF(sh2, opcode & 0xff); break;
- case 12<< 8: NOP(); break;
- case 13<< 8: BTS(sh2, opcode & 0xff); break;
- case 14<< 8: NOP(); break;
- case 15<< 8: BFS(sh2, opcode & 0xff); break;
+ case 0 << 8: MOVBS4(sh2, opcode & 0x0f, Rm); break;
+ case 1 << 8: MOVWS4(sh2, opcode & 0x0f, Rm); break;
+ case 2<< 8: NOP(); break;
+ case 3<< 8: NOP(); break;
+ case 4<< 8: MOVBL4(sh2, Rm, opcode & 0x0f); break;
+ case 5<< 8: MOVWL4(sh2, Rm, opcode & 0x0f); break;
+ case 6<< 8: NOP(); break;
+ case 7<< 8: NOP(); break;
+ case 8<< 8: CMPIM(sh2, opcode & 0xff); break;
+ case 9<< 8: BT(sh2, opcode & 0xff); break;
+ case 10<< 8: NOP(); break;
+ case 11<< 8: BF(sh2, opcode & 0xff); break;
+ case 12<< 8: NOP(); break;
+ case 13<< 8: BTS(sh2, opcode & 0xff); break;
+ case 14<< 8: NOP(); break;
+ case 15<< 8: BFS(sh2, opcode & 0xff); break;
}
}
@@ -2104,22 +2104,22 @@ INLINE void op1100(sh2_state *sh2, UINT16 opcode)
{
switch (opcode & (15<<8))
{
- case 0<<8: MOVBSG(sh2, opcode & 0xff); break;
- case 1<<8: MOVWSG(sh2, opcode & 0xff); break;
- case 2<<8: MOVLSG(sh2, opcode & 0xff); break;
- case 3<<8: TRAPA(sh2, opcode & 0xff); break;
- case 4<<8: MOVBLG(sh2, opcode & 0xff); break;
- case 5<<8: MOVWLG(sh2, opcode & 0xff); break;
- case 6<<8: MOVLLG(sh2, opcode & 0xff); break;
- case 7<<8: MOVA(sh2, opcode & 0xff); break;
- case 8<<8: TSTI(sh2, opcode & 0xff); break;
- case 9<<8: ANDI(sh2, opcode & 0xff); break;
- case 10<<8: XORI(sh2, opcode & 0xff); break;
- case 11<<8: ORI(sh2, opcode & 0xff); break;
- case 12<<8: TSTM(sh2, opcode & 0xff); break;
- case 13<<8: ANDM(sh2, opcode & 0xff); break;
- case 14<<8: XORM(sh2, opcode & 0xff); break;
- case 15<<8: ORM(sh2, opcode & 0xff); break;
+ case 0<<8: MOVBSG(sh2, opcode & 0xff); break;
+ case 1<<8: MOVWSG(sh2, opcode & 0xff); break;
+ case 2<<8: MOVLSG(sh2, opcode & 0xff); break;
+ case 3<<8: TRAPA(sh2, opcode & 0xff); break;
+ case 4<<8: MOVBLG(sh2, opcode & 0xff); break;
+ case 5<<8: MOVWLG(sh2, opcode & 0xff); break;
+ case 6<<8: MOVLLG(sh2, opcode & 0xff); break;
+ case 7<<8: MOVA(sh2, opcode & 0xff); break;
+ case 8<<8: TSTI(sh2, opcode & 0xff); break;
+ case 9<<8: ANDI(sh2, opcode & 0xff); break;
+ case 10<<8: XORI(sh2, opcode & 0xff); break;
+ case 11<<8: ORI(sh2, opcode & 0xff); break;
+ case 12<<8: TSTM(sh2, opcode & 0xff); break;
+ case 13<<8: ANDM(sh2, opcode & 0xff); break;
+ case 14<<8: XORM(sh2, opcode & 0xff); break;
+ case 15<<8: ORM(sh2, opcode & 0xff); break;
}
}
@@ -2296,51 +2296,51 @@ static CPU_SET_INFO( sh2 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: sh2_set_irq_line(sh2, SH2_INT_VBLIN, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: sh2_set_irq_line(sh2, SH2_INT_VBLOUT, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: sh2_set_irq_line(sh2, SH2_INT_HBLIN, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: sh2_set_irq_line(sh2, SH2_INT_TIMER0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: sh2_set_irq_line(sh2, SH2_INT_TIMER1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: sh2_set_irq_line(sh2, SH2_INT_DSP, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: sh2_set_irq_line(sh2, SH2_INT_SOUND, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: sh2_set_irq_line(sh2, SH2_INT_SMPC, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: sh2_set_irq_line(sh2, SH2_INT_PAD, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: sh2_set_irq_line(sh2, SH2_INT_DMA2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: sh2_set_irq_line(sh2, SH2_INT_DMA1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: sh2_set_irq_line(sh2, SH2_INT_DMA0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: sh2_set_irq_line(sh2, SH2_INT_DMAILL, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: sh2_set_irq_line(sh2, SH2_INT_SPRITE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_14: sh2_set_irq_line(sh2, SH2_INT_14, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_15: sh2_set_irq_line(sh2, SH2_INT_15, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: sh2_set_irq_line(sh2, SH2_INT_ABUS, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: sh2_set_irq_line(sh2, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: sh2_set_irq_line(sh2, SH2_INT_VBLIN, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: sh2_set_irq_line(sh2, SH2_INT_VBLOUT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: sh2_set_irq_line(sh2, SH2_INT_HBLIN, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: sh2_set_irq_line(sh2, SH2_INT_TIMER0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: sh2_set_irq_line(sh2, SH2_INT_TIMER1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: sh2_set_irq_line(sh2, SH2_INT_DSP, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: sh2_set_irq_line(sh2, SH2_INT_SOUND, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: sh2_set_irq_line(sh2, SH2_INT_SMPC, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: sh2_set_irq_line(sh2, SH2_INT_PAD, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: sh2_set_irq_line(sh2, SH2_INT_DMA2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: sh2_set_irq_line(sh2, SH2_INT_DMA1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: sh2_set_irq_line(sh2, SH2_INT_DMA0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: sh2_set_irq_line(sh2, SH2_INT_DMAILL, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: sh2_set_irq_line(sh2, SH2_INT_SPRITE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_14: sh2_set_irq_line(sh2, SH2_INT_14, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_15: sh2_set_irq_line(sh2, SH2_INT_15, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: sh2_set_irq_line(sh2, SH2_INT_ABUS, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: sh2_set_irq_line(sh2, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_REGISTER + SH2_PC:
- case CPUINFO_INT_PC: sh2->pc = info->i; sh2->delay = 0; break;
- case CPUINFO_INT_SP: sh2->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_SR: sh2->sr = info->i; CHECK_PENDING_IRQ("sh2_set_reg"); break;
- case CPUINFO_INT_REGISTER + SH2_GBR: sh2->gbr = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_VBR: sh2->vbr = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_MACL: sh2->macl = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R0: sh2->r[ 0] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R1: sh2->r[ 1] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R2: sh2->r[ 2] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R3: sh2->r[ 3] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R4: sh2->r[ 4] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R5: sh2->r[ 5] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R6: sh2->r[ 6] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R7: sh2->r[ 7] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R8: sh2->r[ 8] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R9: sh2->r[ 9] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R10: sh2->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R11: sh2->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R12: sh2->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R13: sh2->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R14: sh2->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R15: sh2->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_EA: sh2->ea = info->i; break;
+ case CPUINFO_INT_PC: sh2->pc = info->i; sh2->delay = 0; break;
+ case CPUINFO_INT_SP: sh2->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_SR: sh2->sr = info->i; CHECK_PENDING_IRQ("sh2_set_reg"); break;
+ case CPUINFO_INT_REGISTER + SH2_GBR: sh2->gbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_VBR: sh2->vbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_MACL: sh2->macl = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R0: sh2->r[ 0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R1: sh2->r[ 1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R2: sh2->r[ 2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R3: sh2->r[ 3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R4: sh2->r[ 4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R5: sh2->r[ 5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R6: sh2->r[ 6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R7: sh2->r[ 7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R8: sh2->r[ 8] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R9: sh2->r[ 9] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R10: sh2->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R11: sh2->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R12: sh2->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R13: sh2->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R14: sh2->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R15: sh2->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_EA: sh2->ea = info->i; break;
}
}
@@ -2356,90 +2356,90 @@ CPU_GET_INFO( sh2 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sh2_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: info->i = sh2->irq_line_state[SH2_INT_VBLIN]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: info->i = sh2->irq_line_state[SH2_INT_VBLOUT]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: info->i = sh2->irq_line_state[SH2_INT_HBLIN]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: info->i = sh2->irq_line_state[SH2_INT_TIMER0]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: info->i = sh2->irq_line_state[SH2_INT_TIMER1]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: info->i = sh2->irq_line_state[SH2_INT_DSP]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: info->i = sh2->irq_line_state[SH2_INT_SOUND]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: info->i = sh2->irq_line_state[SH2_INT_SMPC]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: info->i = sh2->irq_line_state[SH2_INT_PAD]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: info->i = sh2->irq_line_state[SH2_INT_DMA2]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: info->i = sh2->irq_line_state[SH2_INT_DMA1]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: info->i = sh2->irq_line_state[SH2_INT_DMA0]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: info->i = sh2->irq_line_state[SH2_INT_DMAILL]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: info->i = sh2->irq_line_state[SH2_INT_SPRITE]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_14: info->i = sh2->irq_line_state[SH2_INT_14]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_15: info->i = sh2->irq_line_state[SH2_INT_15]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: info->i = sh2->irq_line_state[SH2_INT_ABUS]; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = sh2->nmi_line_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = sh2->ppc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sh2_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: info->i = sh2->irq_line_state[SH2_INT_VBLIN]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: info->i = sh2->irq_line_state[SH2_INT_VBLOUT]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: info->i = sh2->irq_line_state[SH2_INT_HBLIN]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: info->i = sh2->irq_line_state[SH2_INT_TIMER0]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: info->i = sh2->irq_line_state[SH2_INT_TIMER1]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: info->i = sh2->irq_line_state[SH2_INT_DSP]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: info->i = sh2->irq_line_state[SH2_INT_SOUND]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: info->i = sh2->irq_line_state[SH2_INT_SMPC]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: info->i = sh2->irq_line_state[SH2_INT_PAD]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: info->i = sh2->irq_line_state[SH2_INT_DMA2]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: info->i = sh2->irq_line_state[SH2_INT_DMA1]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: info->i = sh2->irq_line_state[SH2_INT_DMA0]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: info->i = sh2->irq_line_state[SH2_INT_DMAILL]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: info->i = sh2->irq_line_state[SH2_INT_SPRITE]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_14: info->i = sh2->irq_line_state[SH2_INT_14]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_15: info->i = sh2->irq_line_state[SH2_INT_15]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: info->i = sh2->irq_line_state[SH2_INT_ABUS]; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = sh2->nmi_line_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = sh2->ppc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SH2_PC: info->i = (sh2->delay) ? (sh2->delay & AM) : (sh2->pc & AM); break;
- case CPUINFO_INT_SP: info->i = sh2->r[15]; break;
- case CPUINFO_INT_REGISTER + SH2_PR: info->i = sh2->pr; break;
- case CPUINFO_INT_REGISTER + SH2_SR: info->i = sh2->sr; break;
- case CPUINFO_INT_REGISTER + SH2_GBR: info->i = sh2->gbr; break;
- case CPUINFO_INT_REGISTER + SH2_VBR: info->i = sh2->vbr; break;
- case CPUINFO_INT_REGISTER + SH2_MACH: info->i = sh2->mach; break;
- case CPUINFO_INT_REGISTER + SH2_MACL: info->i = sh2->macl; break;
- case CPUINFO_INT_REGISTER + SH2_R0: info->i = sh2->r[ 0]; break;
- case CPUINFO_INT_REGISTER + SH2_R1: info->i = sh2->r[ 1]; break;
- case CPUINFO_INT_REGISTER + SH2_R2: info->i = sh2->r[ 2]; break;
- case CPUINFO_INT_REGISTER + SH2_R3: info->i = sh2->r[ 3]; break;
- case CPUINFO_INT_REGISTER + SH2_R4: info->i = sh2->r[ 4]; break;
- case CPUINFO_INT_REGISTER + SH2_R5: info->i = sh2->r[ 5]; break;
- case CPUINFO_INT_REGISTER + SH2_R6: info->i = sh2->r[ 6]; break;
- case CPUINFO_INT_REGISTER + SH2_R7: info->i = sh2->r[ 7]; break;
- case CPUINFO_INT_REGISTER + SH2_R8: info->i = sh2->r[ 8]; break;
- case CPUINFO_INT_REGISTER + SH2_R9: info->i = sh2->r[ 9]; break;
- case CPUINFO_INT_REGISTER + SH2_R10: info->i = sh2->r[10]; break;
- case CPUINFO_INT_REGISTER + SH2_R11: info->i = sh2->r[11]; break;
- case CPUINFO_INT_REGISTER + SH2_R12: info->i = sh2->r[12]; break;
- case CPUINFO_INT_REGISTER + SH2_R13: info->i = sh2->r[13]; break;
- case CPUINFO_INT_REGISTER + SH2_R14: info->i = sh2->r[14]; break;
- case CPUINFO_INT_REGISTER + SH2_R15: info->i = sh2->r[15]; break;
- case CPUINFO_INT_REGISTER + SH2_EA: info->i = sh2->ea; break;
+ case CPUINFO_INT_REGISTER + SH2_PC: info->i = (sh2->delay) ? (sh2->delay & AM) : (sh2->pc & AM); break;
+ case CPUINFO_INT_SP: info->i = sh2->r[15]; break;
+ case CPUINFO_INT_REGISTER + SH2_PR: info->i = sh2->pr; break;
+ case CPUINFO_INT_REGISTER + SH2_SR: info->i = sh2->sr; break;
+ case CPUINFO_INT_REGISTER + SH2_GBR: info->i = sh2->gbr; break;
+ case CPUINFO_INT_REGISTER + SH2_VBR: info->i = sh2->vbr; break;
+ case CPUINFO_INT_REGISTER + SH2_MACH: info->i = sh2->mach; break;
+ case CPUINFO_INT_REGISTER + SH2_MACL: info->i = sh2->macl; break;
+ case CPUINFO_INT_REGISTER + SH2_R0: info->i = sh2->r[ 0]; break;
+ case CPUINFO_INT_REGISTER + SH2_R1: info->i = sh2->r[ 1]; break;
+ case CPUINFO_INT_REGISTER + SH2_R2: info->i = sh2->r[ 2]; break;
+ case CPUINFO_INT_REGISTER + SH2_R3: info->i = sh2->r[ 3]; break;
+ case CPUINFO_INT_REGISTER + SH2_R4: info->i = sh2->r[ 4]; break;
+ case CPUINFO_INT_REGISTER + SH2_R5: info->i = sh2->r[ 5]; break;
+ case CPUINFO_INT_REGISTER + SH2_R6: info->i = sh2->r[ 6]; break;
+ case CPUINFO_INT_REGISTER + SH2_R7: info->i = sh2->r[ 7]; break;
+ case CPUINFO_INT_REGISTER + SH2_R8: info->i = sh2->r[ 8]; break;
+ case CPUINFO_INT_REGISTER + SH2_R9: info->i = sh2->r[ 9]; break;
+ case CPUINFO_INT_REGISTER + SH2_R10: info->i = sh2->r[10]; break;
+ case CPUINFO_INT_REGISTER + SH2_R11: info->i = sh2->r[11]; break;
+ case CPUINFO_INT_REGISTER + SH2_R12: info->i = sh2->r[12]; break;
+ case CPUINFO_INT_REGISTER + SH2_R13: info->i = sh2->r[13]; break;
+ case CPUINFO_INT_REGISTER + SH2_R14: info->i = sh2->r[14]; break;
+ case CPUINFO_INT_REGISTER + SH2_R15: info->i = sh2->r[15]; break;
+ case CPUINFO_INT_REGISTER + SH2_EA: info->i = sh2->ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh2); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sh2); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh2); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh2); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh2); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sh2); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh2); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh2); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SH-2"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7600"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.01"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SH-2"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7600"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.01"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%d%c%c",
@@ -2450,30 +2450,30 @@ CPU_GET_INFO( sh2 )
sh2->sr & T ? 'T':'.');
break;
- case CPUINFO_STR_REGISTER + SH2_PC: sprintf(info->s, "PC :%08X", sh2->pc); break;
- case CPUINFO_STR_REGISTER + SH2_SR: sprintf(info->s, "SR :%08X", sh2->sr); break;
- case CPUINFO_STR_REGISTER + SH2_PR: sprintf(info->s, "PR :%08X", sh2->pr); break;
- case CPUINFO_STR_REGISTER + SH2_GBR: sprintf(info->s, "GBR :%08X", sh2->gbr); break;
- case CPUINFO_STR_REGISTER + SH2_VBR: sprintf(info->s, "VBR :%08X", sh2->vbr); break;
- case CPUINFO_STR_REGISTER + SH2_MACH: sprintf(info->s, "MACH:%08X", sh2->mach); break;
- case CPUINFO_STR_REGISTER + SH2_MACL: sprintf(info->s, "MACL:%08X", sh2->macl); break;
- case CPUINFO_STR_REGISTER + SH2_R0: sprintf(info->s, "R0 :%08X", sh2->r[ 0]); break;
- case CPUINFO_STR_REGISTER + SH2_R1: sprintf(info->s, "R1 :%08X", sh2->r[ 1]); break;
- case CPUINFO_STR_REGISTER + SH2_R2: sprintf(info->s, "R2 :%08X", sh2->r[ 2]); break;
- case CPUINFO_STR_REGISTER + SH2_R3: sprintf(info->s, "R3 :%08X", sh2->r[ 3]); break;
- case CPUINFO_STR_REGISTER + SH2_R4: sprintf(info->s, "R4 :%08X", sh2->r[ 4]); break;
- case CPUINFO_STR_REGISTER + SH2_R5: sprintf(info->s, "R5 :%08X", sh2->r[ 5]); break;
- case CPUINFO_STR_REGISTER + SH2_R6: sprintf(info->s, "R6 :%08X", sh2->r[ 6]); break;
- case CPUINFO_STR_REGISTER + SH2_R7: sprintf(info->s, "R7 :%08X", sh2->r[ 7]); break;
- case CPUINFO_STR_REGISTER + SH2_R8: sprintf(info->s, "R8 :%08X", sh2->r[ 8]); break;
- case CPUINFO_STR_REGISTER + SH2_R9: sprintf(info->s, "R9 :%08X", sh2->r[ 9]); break;
- case CPUINFO_STR_REGISTER + SH2_R10: sprintf(info->s, "R10 :%08X", sh2->r[10]); break;
- case CPUINFO_STR_REGISTER + SH2_R11: sprintf(info->s, "R11 :%08X", sh2->r[11]); break;
- case CPUINFO_STR_REGISTER + SH2_R12: sprintf(info->s, "R12 :%08X", sh2->r[12]); break;
- case CPUINFO_STR_REGISTER + SH2_R13: sprintf(info->s, "R13 :%08X", sh2->r[13]); break;
- case CPUINFO_STR_REGISTER + SH2_R14: sprintf(info->s, "R14 :%08X", sh2->r[14]); break;
- case CPUINFO_STR_REGISTER + SH2_R15: sprintf(info->s, "R15 :%08X", sh2->r[15]); break;
- case CPUINFO_STR_REGISTER + SH2_EA: sprintf(info->s, "EA :%08X", sh2->ea); break;
+ case CPUINFO_STR_REGISTER + SH2_PC: sprintf(info->s, "PC :%08X", sh2->pc); break;
+ case CPUINFO_STR_REGISTER + SH2_SR: sprintf(info->s, "SR :%08X", sh2->sr); break;
+ case CPUINFO_STR_REGISTER + SH2_PR: sprintf(info->s, "PR :%08X", sh2->pr); break;
+ case CPUINFO_STR_REGISTER + SH2_GBR: sprintf(info->s, "GBR :%08X", sh2->gbr); break;
+ case CPUINFO_STR_REGISTER + SH2_VBR: sprintf(info->s, "VBR :%08X", sh2->vbr); break;
+ case CPUINFO_STR_REGISTER + SH2_MACH: sprintf(info->s, "MACH:%08X", sh2->mach); break;
+ case CPUINFO_STR_REGISTER + SH2_MACL: sprintf(info->s, "MACL:%08X", sh2->macl); break;
+ case CPUINFO_STR_REGISTER + SH2_R0: sprintf(info->s, "R0 :%08X", sh2->r[ 0]); break;
+ case CPUINFO_STR_REGISTER + SH2_R1: sprintf(info->s, "R1 :%08X", sh2->r[ 1]); break;
+ case CPUINFO_STR_REGISTER + SH2_R2: sprintf(info->s, "R2 :%08X", sh2->r[ 2]); break;
+ case CPUINFO_STR_REGISTER + SH2_R3: sprintf(info->s, "R3 :%08X", sh2->r[ 3]); break;
+ case CPUINFO_STR_REGISTER + SH2_R4: sprintf(info->s, "R4 :%08X", sh2->r[ 4]); break;
+ case CPUINFO_STR_REGISTER + SH2_R5: sprintf(info->s, "R5 :%08X", sh2->r[ 5]); break;
+ case CPUINFO_STR_REGISTER + SH2_R6: sprintf(info->s, "R6 :%08X", sh2->r[ 6]); break;
+ case CPUINFO_STR_REGISTER + SH2_R7: sprintf(info->s, "R7 :%08X", sh2->r[ 7]); break;
+ case CPUINFO_STR_REGISTER + SH2_R8: sprintf(info->s, "R8 :%08X", sh2->r[ 8]); break;
+ case CPUINFO_STR_REGISTER + SH2_R9: sprintf(info->s, "R9 :%08X", sh2->r[ 9]); break;
+ case CPUINFO_STR_REGISTER + SH2_R10: sprintf(info->s, "R10 :%08X", sh2->r[10]); break;
+ case CPUINFO_STR_REGISTER + SH2_R11: sprintf(info->s, "R11 :%08X", sh2->r[11]); break;
+ case CPUINFO_STR_REGISTER + SH2_R12: sprintf(info->s, "R12 :%08X", sh2->r[12]); break;
+ case CPUINFO_STR_REGISTER + SH2_R13: sprintf(info->s, "R13 :%08X", sh2->r[13]); break;
+ case CPUINFO_STR_REGISTER + SH2_R14: sprintf(info->s, "R14 :%08X", sh2->r[14]); break;
+ case CPUINFO_STR_REGISTER + SH2_R15: sprintf(info->s, "R15 :%08X", sh2->r[15]); break;
+ case CPUINFO_STR_REGISTER + SH2_EA: sprintf(info->s, "EA :%08X", sh2->ea); break;
}
}
@@ -2483,12 +2483,12 @@ CPU_GET_INFO( sh1 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh1); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh1); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SH-1"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SH-1"); break;
- default: CPU_GET_INFO_CALL(sh2); break;
+ default: CPU_GET_INFO_CALL(sh2); break;
}
}
diff --git a/src/emu/cpu/sh2/sh2.h b/src/emu/cpu/sh2/sh2.h
index bea7a7aa7fd..4628b6cd0c0 100644
--- a/src/emu/cpu/sh2/sh2.h
+++ b/src/emu/cpu/sh2/sh2.h
@@ -31,24 +31,24 @@
#define __SH2_H__
-#define SH2_INT_NONE -1
-#define SH2_INT_VBLIN 0
-#define SH2_INT_VBLOUT 1
-#define SH2_INT_HBLIN 2
-#define SH2_INT_TIMER0 3
-#define SH2_INT_TIMER1 4
-#define SH2_INT_DSP 5
-#define SH2_INT_SOUND 6
-#define SH2_INT_SMPC 7
-#define SH2_INT_PAD 8
-#define SH2_INT_DMA2 9
-#define SH2_INT_DMA1 10
-#define SH2_INT_DMA0 11
-#define SH2_INT_DMAILL 12
-#define SH2_INT_SPRITE 13
-#define SH2_INT_14 14
-#define SH2_INT_15 15
-#define SH2_INT_ABUS 16
+#define SH2_INT_NONE -1
+#define SH2_INT_VBLIN 0
+#define SH2_INT_VBLOUT 1
+#define SH2_INT_HBLIN 2
+#define SH2_INT_TIMER0 3
+#define SH2_INT_TIMER1 4
+#define SH2_INT_DSP 5
+#define SH2_INT_SOUND 6
+#define SH2_INT_SMPC 7
+#define SH2_INT_PAD 8
+#define SH2_INT_DMA2 9
+#define SH2_INT_DMA1 10
+#define SH2_INT_DMA0 11
+#define SH2_INT_DMAILL 12
+#define SH2_INT_SPRITE 13
+#define SH2_INT_14 14
+#define SH2_INT_15 15
+#define SH2_INT_ABUS 16
enum
{
@@ -77,12 +77,12 @@ void sh2_set_frt_input(device_t *device, int state);
COMPILER-SPECIFIC OPTIONS
***************************************************************************/
-#define SH2DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
-#define SH2DRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
-#define SH2DRC_STRICT_PCREL 0x0004 /* do actual loads on MOVLI/MOVWI instead of collapsing to immediates */
+#define SH2DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
+#define SH2DRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
+#define SH2DRC_STRICT_PCREL 0x0004 /* do actual loads on MOVLI/MOVWI instead of collapsing to immediates */
-#define SH2DRC_COMPATIBLE_OPTIONS (SH2DRC_STRICT_VERIFY | SH2DRC_FLUSH_PC | SH2DRC_STRICT_PCREL)
-#define SH2DRC_FASTEST_OPTIONS (0)
+#define SH2DRC_COMPATIBLE_OPTIONS (SH2DRC_STRICT_VERIFY | SH2DRC_FLUSH_PC | SH2DRC_STRICT_PCREL)
+#define SH2DRC_FASTEST_OPTIONS (0)
void sh2drc_set_options(device_t *device, UINT32 options);
void sh2drc_add_pcflush(device_t *device, offs_t address);
diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c
index ed95852cbb3..32afcf45de6 100644
--- a/src/emu/cpu/sh2/sh2comn.c
+++ b/src/emu/cpu/sh2/sh2comn.c
@@ -13,7 +13,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
#ifdef USE_SH2DRC
#define GET_SH2(dev) *(sh2_state **)downcast<legacy_cpu_device *>(dev)->token()
@@ -35,7 +35,7 @@ INLINE UINT32 RL(sh2_state *sh2, offs_t A)
if (A >= 0x40000000)
return 0xa5a5a5a5;
- return sh2->program->read_dword(A & AM);
+ return sh2->program->read_dword(A & AM);
}
INLINE void WL(sh2_state *sh2, offs_t A, UINT32 V)
@@ -225,7 +225,7 @@ void sh2_do_dma(sh2_state *sh2, int dma)
}
#ifdef USE_TIMER_FOR_DMA
- //schedule next DMA callback
+ //schedule next DMA callback
sh2->dma_current_active_timer[dma]->adjust(sh2->device->cycles_to_attotime(2), dma);
#endif
@@ -273,12 +273,12 @@ void sh2_do_dma(sh2_state *sh2, int dma)
}
#ifdef USE_TIMER_FOR_DMA
- //schedule next DMA callback
+ //schedule next DMA callback
sh2->dma_current_active_timer[dma]->adjust(sh2->device->cycles_to_attotime(2), dma);
#endif
// check: should this really be using read_word_32 / write_word_32?
- dmadata = sh2->program->read_word(tempsrc);
+ dmadata = sh2->program->read_word(tempsrc);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(sh2->device, tempsrc, tempdst, dmadata, sh2->active_dma_size[dma]);
sh2->program->write_word(tempdst, dmadata);
@@ -320,11 +320,11 @@ void sh2_do_dma(sh2_state *sh2, int dma)
}
#ifdef USE_TIMER_FOR_DMA
- //schedule next DMA callback
+ //schedule next DMA callback
sh2->dma_current_active_timer[dma]->adjust(sh2->device->cycles_to_attotime(2), dma);
#endif
- dmadata = sh2->program->read_dword(tempsrc);
+ dmadata = sh2->program->read_dword(tempsrc);
if (sh2->dma_callback_kludge) dmadata = sh2->dma_callback_kludge(sh2->device, tempsrc, tempdst, dmadata, sh2->active_dma_size[dma]);
sh2->program->write_dword(tempdst, dmadata);
@@ -365,7 +365,7 @@ void sh2_do_dma(sh2_state *sh2, int dma)
}
#ifdef USE_TIMER_FOR_DMA
- //schedule next DMA callback
+ //schedule next DMA callback
sh2->dma_current_active_timer[dma]->adjust(sh2->device->cycles_to_attotime(2), dma);
#endif
@@ -914,9 +914,9 @@ void sh2_exception(sh2_state *sh2, const char *message, int irqline)
// printf("sh2_exception [%s] irqline %x evec %x save SR %x new SR %x\n", message, irqline, sh2->evec, sh2->irqsr, sh2->sr);
#else
sh2->r[15] -= 4;
- WL( sh2, sh2->r[15], sh2->sr ); /* push SR onto stack */
+ WL( sh2, sh2->r[15], sh2->sr ); /* push SR onto stack */
sh2->r[15] -= 4;
- WL( sh2, sh2->r[15], sh2->pc ); /* push PC onto stack */
+ WL( sh2, sh2->r[15], sh2->pc ); /* push PC onto stack */
/* set I flags in SR */
if (irqline > SH2_INT_15)
@@ -1008,4 +1008,3 @@ void sh2_common_init(sh2_state *sh2, legacy_cpu_device *device, device_irq_ackno
device->save_item(NAME(sh2->internal_irq_vector));
device->save_item(NAME(sh2->dma_timer_active));
}
-
diff --git a/src/emu/cpu/sh2/sh2comn.h b/src/emu/cpu/sh2/sh2comn.h
index 88a9f17a6ce..4504ba01a69 100644
--- a/src/emu/cpu/sh2/sh2comn.h
+++ b/src/emu/cpu/sh2/sh2comn.h
@@ -24,7 +24,7 @@
class sh2_frontend;
#endif
-#define SH2_CODE_XOR(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(2,0))
+#define SH2_CODE_XOR(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(2,0))
struct irq_entry
{
@@ -40,99 +40,99 @@ enum
OVF = 0x00020000
};
-#define T 0x00000001
-#define S 0x00000002
-#define I 0x000000f0
-#define Q 0x00000100
-#define M 0x00000200
+#define T 0x00000001
+#define S 0x00000002
+#define I 0x000000f0
+#define Q 0x00000100
+#define M 0x00000200
-#define AM 0xc7ffffff
+#define AM 0xc7ffffff
-#define FLAGS (M|Q|I|S|T)
+#define FLAGS (M|Q|I|S|T)
-#define Rn ((opcode>>8)&15)
-#define Rm ((opcode>>4)&15)
+#define Rn ((opcode>>8)&15)
+#define Rm ((opcode>>4)&15)
-#define CPU_TYPE_SH1 (0)
-#define CPU_TYPE_SH2 (1)
+#define CPU_TYPE_SH1 (0)
+#define CPU_TYPE_SH2 (1)
#define REGFLAG_R(n) (1 << (n))
/* register flags 1 */
-#define REGFLAG_PR (1 << 0)
-#define REGFLAG_MACL (1 << 1)
-#define REGFLAG_MACH (1 << 2)
-#define REGFLAG_GBR (1 << 3)
-#define REGFLAG_VBR (1 << 4)
-#define REGFLAG_SR (1 << 5)
-
-#define CHECK_PENDING_IRQ(message) \
-do { \
- int irq = -1; \
- if (sh2->pending_irq & (1 << 0)) irq = 0; \
- if (sh2->pending_irq & (1 << 1)) irq = 1; \
- if (sh2->pending_irq & (1 << 2)) irq = 2; \
- if (sh2->pending_irq & (1 << 3)) irq = 3; \
- if (sh2->pending_irq & (1 << 4)) irq = 4; \
- if (sh2->pending_irq & (1 << 5)) irq = 5; \
- if (sh2->pending_irq & (1 << 6)) irq = 6; \
- if (sh2->pending_irq & (1 << 7)) irq = 7; \
- if (sh2->pending_irq & (1 << 8)) irq = 8; \
- if (sh2->pending_irq & (1 << 9)) irq = 9; \
- if (sh2->pending_irq & (1 << 10)) irq = 10; \
- if (sh2->pending_irq & (1 << 11)) irq = 11; \
- if (sh2->pending_irq & (1 << 12)) irq = 12; \
- if (sh2->pending_irq & (1 << 13)) irq = 13; \
- if (sh2->pending_irq & (1 << 14)) irq = 14; \
- if (sh2->pending_irq & (1 << 15)) irq = 15; \
+#define REGFLAG_PR (1 << 0)
+#define REGFLAG_MACL (1 << 1)
+#define REGFLAG_MACH (1 << 2)
+#define REGFLAG_GBR (1 << 3)
+#define REGFLAG_VBR (1 << 4)
+#define REGFLAG_SR (1 << 5)
+
+#define CHECK_PENDING_IRQ(message) \
+do { \
+ int irq = -1; \
+ if (sh2->pending_irq & (1 << 0)) irq = 0; \
+ if (sh2->pending_irq & (1 << 1)) irq = 1; \
+ if (sh2->pending_irq & (1 << 2)) irq = 2; \
+ if (sh2->pending_irq & (1 << 3)) irq = 3; \
+ if (sh2->pending_irq & (1 << 4)) irq = 4; \
+ if (sh2->pending_irq & (1 << 5)) irq = 5; \
+ if (sh2->pending_irq & (1 << 6)) irq = 6; \
+ if (sh2->pending_irq & (1 << 7)) irq = 7; \
+ if (sh2->pending_irq & (1 << 8)) irq = 8; \
+ if (sh2->pending_irq & (1 << 9)) irq = 9; \
+ if (sh2->pending_irq & (1 << 10)) irq = 10; \
+ if (sh2->pending_irq & (1 << 11)) irq = 11; \
+ if (sh2->pending_irq & (1 << 12)) irq = 12; \
+ if (sh2->pending_irq & (1 << 13)) irq = 13; \
+ if (sh2->pending_irq & (1 << 14)) irq = 14; \
+ if (sh2->pending_irq & (1 << 15)) irq = 15; \
if ((sh2->internal_irq_level != -1) && (sh2->internal_irq_level > irq)) irq = sh2->internal_irq_level; \
- if (irq >= 0) \
- sh2_exception(sh2,message,irq); \
+ if (irq >= 0) \
+ sh2_exception(sh2,message,irq); \
} while(0)
struct sh2_state
{
- UINT32 ppc;
- UINT32 pc;
- UINT32 pr;
- UINT32 sr;
- UINT32 gbr, vbr;
- UINT32 mach, macl;
- UINT32 r[16];
- UINT32 ea;
- UINT32 delay;
- UINT32 cpu_off;
- UINT32 dvsr, dvdnth, dvdntl, dvcr;
- UINT32 pending_irq;
- UINT32 test_irq;
- UINT32 pending_nmi;
+ UINT32 ppc;
+ UINT32 pc;
+ UINT32 pr;
+ UINT32 sr;
+ UINT32 gbr, vbr;
+ UINT32 mach, macl;
+ UINT32 r[16];
+ UINT32 ea;
+ UINT32 delay;
+ UINT32 cpu_off;
+ UINT32 dvsr, dvdnth, dvdntl, dvcr;
+ UINT32 pending_irq;
+ UINT32 test_irq;
+ UINT32 pending_nmi;
INT32 irqline;
- UINT32 evec; // exception vector for DRC
- UINT32 irqsr; // IRQ-time old SR for DRC
- UINT32 target; // target for jmp/jsr/etc so the delay slot can't kill it
+ UINT32 evec; // exception vector for DRC
+ UINT32 irqsr; // IRQ-time old SR for DRC
+ UINT32 target; // target for jmp/jsr/etc so the delay slot can't kill it
irq_entry irq_queue[16];
- int pcfsel; // last pcflush entry set
- int maxpcfsel; // highest valid pcflush entry
- UINT32 pcflushes[16]; // pcflush entries
+ int pcfsel; // last pcflush entry set
+ int maxpcfsel; // highest valid pcflush entry
+ UINT32 pcflushes[16]; // pcflush entries
- INT8 irq_line_state[17];
+ INT8 irq_line_state[17];
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *internal;
- UINT32 *m;
+ UINT32 *m;
INT8 nmi_line_state;
- UINT16 frc;
- UINT16 ocra, ocrb, icr;
- UINT64 frc_base;
+ UINT16 frc;
+ UINT16 ocra, ocrb, icr;
+ UINT64 frc_base;
- int frt_input;
- int internal_irq_level;
- int internal_irq_vector;
- int icount;
+ int frt_input;
+ int internal_irq_level;
+ int internal_irq_vector;
+ int icount;
emu_timer *timer;
emu_timer *dma_current_active_timer[2];
@@ -150,37 +150,37 @@ struct sh2_state
int (*dma_callback_kludge)(device_t *device, UINT32 src, UINT32 dst, UINT32 data, int size);
int (*dma_callback_fifo_data_available)(device_t *device, UINT32 src, UINT32 dst, UINT32 data, int size);
- void (*ftcsr_read_callback)(UINT32 data);
+ void (*ftcsr_read_callback)(UINT32 data);
#ifdef USE_SH2DRC
- drc_cache * cache; /* pointer to the DRC code cache */
- drcuml_state * drcuml; /* DRC UML generator state */
- sh2_frontend * drcfe; /* pointer to the DRC front-end state */
- UINT32 drcoptions; /* configurable DRC options */
+ drc_cache * cache; /* pointer to the DRC code cache */
+ drcuml_state * drcuml; /* DRC UML generator state */
+ sh2_frontend * drcfe; /* pointer to the DRC front-end state */
+ UINT32 drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
+ UINT8 cache_dirty; /* true if we need to flush the cache */
/* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
- UINT32 irq; /* irq we're taking */
+ UINT64 numcycles; /* return value from gettotalcycles */
+ UINT32 arg0; /* print_debug argument 1 */
+ UINT32 arg1; /* print_debug argument 2 */
+ UINT32 irq; /* irq we're taking */
/* register mappings */
- uml::parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */
-
- uml::code_handle * entry; /* entry point */
- uml::code_handle * read8; /* read byte */
- uml::code_handle * write8; /* write byte */
- uml::code_handle * read16; /* read half */
- uml::code_handle * write16; /* write half */
- uml::code_handle * read32; /* read word */
- uml::code_handle * write32; /* write word */
-
- uml::code_handle * interrupt; /* interrupt */
- uml::code_handle * nocode; /* nocode */
- uml::code_handle * out_of_cycles; /* out of cycles exception handler */
+ uml::parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */
+
+ uml::code_handle * entry; /* entry point */
+ uml::code_handle * read8; /* read byte */
+ uml::code_handle * write8; /* write byte */
+ uml::code_handle * read16; /* read half */
+ uml::code_handle * write16; /* write half */
+ uml::code_handle * read32; /* read word */
+ uml::code_handle * write32; /* write word */
+
+ uml::code_handle * interrupt; /* interrupt */
+ uml::code_handle * nocode; /* nocode */
+ uml::code_handle * out_of_cycles; /* out of cycles exception handler */
#endif
};
diff --git a/src/emu/cpu/sh2/sh2dasm.c b/src/emu/cpu/sh2/sh2dasm.c
index f94125fb27c..d249c2d4404 100644
--- a/src/emu/cpu/sh2/sh2dasm.c
+++ b/src/emu/cpu/sh2/sh2dasm.c
@@ -2,8 +2,8 @@
#include "debugger.h"
#include "sh2.h"
-#define SIGNX8(x) (((INT32)(x) << 24) >> 24)
-#define SIGNX12(x) (((INT32)(x) << 20) >> 20)
+#define SIGNX8(x) (((INT32)(x) << 24) >> 24)
+#define SIGNX12(x) (((INT32)(x) << 20) >> 20)
#define Rn ((opcode >> 8) & 15)
#define Rm ((opcode >> 4) & 15)
@@ -582,22 +582,22 @@ unsigned DasmSH2(char *buffer, unsigned pc, UINT16 opcode)
switch((opcode >> 12) & 15)
{
- case 0: flags = op0000(buffer,pc,opcode); break;
- case 1: flags = op0001(buffer,pc,opcode); break;
- case 2: flags = op0010(buffer,pc,opcode); break;
- case 3: flags = op0011(buffer,pc,opcode); break;
- case 4: flags = op0100(buffer,pc,opcode); break;
- case 5: flags = op0101(buffer,pc,opcode); break;
- case 6: flags = op0110(buffer,pc,opcode); break;
- case 7: flags = op0111(buffer,pc,opcode); break;
- case 8: flags = op1000(buffer,pc,opcode); break;
- case 9: flags = op1001(buffer,pc,opcode); break;
- case 10: flags = op1010(buffer,pc,opcode); break;
- case 11: flags = op1011(buffer,pc,opcode); break;
- case 12: flags = op1100(buffer,pc,opcode); break;
- case 13: flags = op1101(buffer,pc,opcode); break;
- case 14: flags = op1110(buffer,pc,opcode); break;
- default: flags = op1111(buffer,pc,opcode); break;
+ case 0: flags = op0000(buffer,pc,opcode); break;
+ case 1: flags = op0001(buffer,pc,opcode); break;
+ case 2: flags = op0010(buffer,pc,opcode); break;
+ case 3: flags = op0011(buffer,pc,opcode); break;
+ case 4: flags = op0100(buffer,pc,opcode); break;
+ case 5: flags = op0101(buffer,pc,opcode); break;
+ case 6: flags = op0110(buffer,pc,opcode); break;
+ case 7: flags = op0111(buffer,pc,opcode); break;
+ case 8: flags = op1000(buffer,pc,opcode); break;
+ case 9: flags = op1001(buffer,pc,opcode); break;
+ case 10: flags = op1010(buffer,pc,opcode); break;
+ case 11: flags = op1011(buffer,pc,opcode); break;
+ case 12: flags = op1100(buffer,pc,opcode); break;
+ case 13: flags = op1101(buffer,pc,opcode); break;
+ case 14: flags = op1110(buffer,pc,opcode); break;
+ default: flags = op1111(buffer,pc,opcode); break;
}
return 2 | flags | DASMFLAG_SUPPORTED;
}
@@ -606,4 +606,3 @@ CPU_DISASSEMBLE( sh2 )
{
return DasmSH2( buffer, pc, (oprom[0] << 8) | oprom[1] );
}
-
diff --git a/src/emu/cpu/sh2/sh2drc.c b/src/emu/cpu/sh2/sh2drc.c
index 4f0eff81f5d..808e1321d57 100644
--- a/src/emu/cpu/sh2/sh2drc.c
+++ b/src/emu/cpu/sh2/sh2drc.c
@@ -31,19 +31,19 @@ using namespace uml;
DEBUGGING
***************************************************************************/
-#define FORCE_C_BACKEND (0) // use the C backend even when a native one is available
-#define LOG_UML (0) // log UML assembly
-#define LOG_NATIVE (0) // log native assembly
+#define FORCE_C_BACKEND (0) // use the C backend even when a native one is available
+#define LOG_UML (0) // log UML assembly
+#define LOG_NATIVE (0) // log native assembly
-#define SET_EA (0) // makes slower but "shows work" in the EA fake register like the interpreter
+#define SET_EA (0) // makes slower but "shows work" in the EA fake register like the interpreter
-#define DISABLE_FAST_REGISTERS (0) // set to 1 to turn off usage of register caching
-#define SINGLE_INSTRUCTION_MODE (0)
+#define DISABLE_FAST_REGISTERS (0) // set to 1 to turn off usage of register caching
+#define SINGLE_INSTRUCTION_MODE (0)
-#define ADDSUBV_DIRECT (0)
+#define ADDSUBV_DIRECT (0)
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
#if SET_EA
#define SETEA(x) UML_MOV(block, mem(&sh2->ea), ireg(x))
@@ -56,25 +56,25 @@ using namespace uml;
***************************************************************************/
/* map variables */
-#define MAPVAR_PC M0
-#define MAPVAR_CYCLES M1
+#define MAPVAR_PC M0
+#define MAPVAR_CYCLES M1
/* size of the execution code cache */
-#define CACHE_SIZE (32 * 1024 * 1024)
+#define CACHE_SIZE (32 * 1024 * 1024)
/* compilation boundaries -- how far back/forward does the analysis extend? */
-#define COMPILE_BACKWARDS_BYTES 64
-#define COMPILE_FORWARDS_BYTES 256
-#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/2) + (COMPILE_FORWARDS_BYTES/2))
-#define COMPILE_MAX_SEQUENCE 64
+#define COMPILE_BACKWARDS_BYTES 64
+#define COMPILE_FORWARDS_BYTES 256
+#define COMPILE_MAX_INSTRUCTIONS ((COMPILE_BACKWARDS_BYTES/2) + (COMPILE_FORWARDS_BYTES/2))
+#define COMPILE_MAX_SEQUENCE 64
/* exit codes */
-#define EXECUTE_OUT_OF_CYCLES 0
-#define EXECUTE_MISSING_CODE 1
-#define EXECUTE_UNMAPPED_CODE 2
-#define EXECUTE_RESET_CACHE 3
+#define EXECUTE_OUT_OF_CYCLES 0
+#define EXECUTE_MISSING_CODE 1
+#define EXECUTE_UNMAPPED_CODE 2
+#define EXECUTE_RESET_CACHE 3
-#define PROBE_ADDRESS ~0
+#define PROBE_ADDRESS ~0
extern int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev);
@@ -82,7 +82,7 @@ extern int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev)
MACROS
***************************************************************************/
-#define R32(reg) sh2->regmap[reg]
+#define R32(reg) sh2->regmap[reg]
/***************************************************************************
STRUCTURES & TYPEDEFS
@@ -91,9 +91,9 @@ extern int sh2_describe(void *param, opcode_desc *desc, const opcode_desc *prev)
/* internal compiler state */
struct compiler_state
{
- UINT32 cycles; /* accumulated cycles */
- UINT8 checkints; /* need to check interrupts before next instruction */
- code_label labelnum; /* index for local labels */
+ UINT32 cycles; /* accumulated cycles */
+ UINT8 checkints; /* need to check interrupts before next instruction */
+ code_label labelnum; /* index for local labels */
};
/***************************************************************************
@@ -142,7 +142,7 @@ INLINE sh2_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == SH1 ||
- device->type() == SH2);
+ device->type() == SH2);
return *(sh2_state **)downcast<legacy_cpu_device *>(device)->token();
}
@@ -950,7 +950,7 @@ static void code_compile_block(sh2_state *sh2, UINT8 mode, offs_t pc)
/* add a code log entry */
if (LOG_UML)
- block->append_comment("-------------------------"); // comment
+ block->append_comment("-------------------------"); // comment
/* determine the last instruction in this sequence */
for (seqlast = seqhead; seqlast != NULL; seqlast = seqlast->next())
@@ -960,20 +960,20 @@ static void code_compile_block(sh2_state *sh2, UINT8 mode, offs_t pc)
/* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
if (override || !drcuml->hash_exists(mode, seqhead->pc))
- UML_HASH(block, mode, seqhead->pc); // hash mode,pc
+ UML_HASH(block, mode, seqhead->pc); // hash mode,pc
/* if we already have a hash, and this is the first sequence, assume that we */
/* are recompiling due to being out of sync and allow future overrides */
else if (seqhead == desclist)
{
override = TRUE;
- UML_HASH(block, mode, seqhead->pc); // hash mode,pc
+ UML_HASH(block, mode, seqhead->pc); // hash mode,pc
}
/* otherwise, redispatch to that fixed PC and skip the rest of the processing */
else
{
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
UML_HASHJMP(block, 0, seqhead->pc, *sh2->nocode);
// hashjmp <mode>,seqhead->pc,nocode
continue;
@@ -986,7 +986,7 @@ static void code_compile_block(sh2_state *sh2, UINT8 mode, offs_t pc)
/* label this instruction, if it may be jumped to locally */
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
{
- UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
+ UML_LABEL(block, seqhead->pc | 0x80000000); // label seqhead->pc | 0x80000000
}
/* iterate over instructions in the sequence and compile them */
@@ -1007,7 +1007,7 @@ static void code_compile_block(sh2_state *sh2, UINT8 mode, offs_t pc)
}
/* count off cycles and go there */
- generate_update_cycles(sh2, block, &compiler, nextpc, TRUE); // <subtract cycles>
+ generate_update_cycles(sh2, block, &compiler, nextpc, TRUE); // <subtract cycles>
/* SH2 has no modes */
if (seqlast->next() == NULL || seqlast->next()->pc != nextpc)
@@ -1045,66 +1045,66 @@ static void static_generate_entry_point(sh2_state *sh2)
/* forward references */
alloc_handle(drcuml, &sh2->nocode, "nocode");
- alloc_handle(drcuml, &sh2->write32, "write32"); // necessary?
+ alloc_handle(drcuml, &sh2->write32, "write32"); // necessary?
alloc_handle(drcuml, &sh2->entry, "entry");
- UML_HANDLE(block, *sh2->entry); // handle entry
+ UML_HANDLE(block, *sh2->entry); // handle entry
/* load fast integer registers */
load_fast_iregs(sh2, block);
/* check for interrupts */
- UML_MOV(block, mem(&sh2->irqline), 0xffffffff); // mov irqline, #-1
- UML_CMP(block, mem(&sh2->pending_nmi), 0); // cmp pending_nmi, #0
- UML_JMPc(block, COND_Z, skip+2); // jz skip+2
+ UML_MOV(block, mem(&sh2->irqline), 0xffffffff); // mov irqline, #-1
+ UML_CMP(block, mem(&sh2->pending_nmi), 0); // cmp pending_nmi, #0
+ UML_JMPc(block, COND_Z, skip+2); // jz skip+2
- UML_MOV(block, mem(&sh2->pending_nmi), 0); // zap pending_nmi
- UML_JMP(block, skip+1); // and then go take it (evec is already set)
+ UML_MOV(block, mem(&sh2->pending_nmi), 0); // zap pending_nmi
+ UML_JMP(block, skip+1); // and then go take it (evec is already set)
- UML_LABEL(block, skip+2); // skip+2:
- UML_MOV(block, mem(&sh2->evec), 0xffffffff); // mov evec, -1
- UML_MOV(block, I0, 0xffffffff); // mov r0, -1 (r0 = irq)
- UML_AND(block, I1, I0, 0xffff); // and r1, 0xffff
+ UML_LABEL(block, skip+2); // skip+2:
+ UML_MOV(block, mem(&sh2->evec), 0xffffffff); // mov evec, -1
+ UML_MOV(block, I0, 0xffffffff); // mov r0, -1 (r0 = irq)
+ UML_AND(block, I1, I0, 0xffff); // and r1, 0xffff
- UML_LZCNT(block, I1, mem(&sh2->pending_irq)); // lzcnt r1, r1
- UML_CMP(block, I1, 32); // cmp r1, #32
- UML_JMPc(block, COND_Z, skip+4); // jz skip+4
+ UML_LZCNT(block, I1, mem(&sh2->pending_irq)); // lzcnt r1, r1
+ UML_CMP(block, I1, 32); // cmp r1, #32
+ UML_JMPc(block, COND_Z, skip+4); // jz skip+4
- UML_SUB(block, mem(&sh2->irqline), 31, I1); // sub irqline, #31, r1
+ UML_SUB(block, mem(&sh2->irqline), 31, I1); // sub irqline, #31, r1
- UML_LABEL(block, skip+4); // skip+4:
- UML_CMP(block, mem(&sh2->internal_irq_level), 0xffffffff); // cmp internal_irq_level, #-1
- UML_JMPc(block, COND_Z, skip+3); // jz skip+3
- UML_CMP(block, mem(&sh2->internal_irq_level), mem(&sh2->irqline)); // cmp internal_irq_level, irqline
- UML_JMPc(block, COND_LE, skip+3); // jle skip+3
+ UML_LABEL(block, skip+4); // skip+4:
+ UML_CMP(block, mem(&sh2->internal_irq_level), 0xffffffff); // cmp internal_irq_level, #-1
+ UML_JMPc(block, COND_Z, skip+3); // jz skip+3
+ UML_CMP(block, mem(&sh2->internal_irq_level), mem(&sh2->irqline)); // cmp internal_irq_level, irqline
+ UML_JMPc(block, COND_LE, skip+3); // jle skip+3
- UML_MOV(block, mem(&sh2->irqline), mem(&sh2->internal_irq_level)); // mov r0, internal_irq_level
+ UML_MOV(block, mem(&sh2->irqline), mem(&sh2->internal_irq_level)); // mov r0, internal_irq_level
- UML_LABEL(block, skip+3); // skip+3:
- UML_CMP(block, mem(&sh2->irqline), 0xffffffff); // cmp irqline, #-1
- UML_JMPc(block, COND_Z, skip+1); // jz skip+1
- UML_CALLC(block, cfunc_fastirq, sh2); // callc fastirq
+ UML_LABEL(block, skip+3); // skip+3:
+ UML_CMP(block, mem(&sh2->irqline), 0xffffffff); // cmp irqline, #-1
+ UML_JMPc(block, COND_Z, skip+1); // jz skip+1
+ UML_CALLC(block, cfunc_fastirq, sh2); // callc fastirq
- UML_LABEL(block, skip+1); // skip+1:
+ UML_LABEL(block, skip+1); // skip+1:
- UML_CMP(block, mem(&sh2->evec), 0xffffffff); // cmp evec, 0xffffffff
- UML_JMPc(block, COND_Z, skip); // jz skip
+ UML_CMP(block, mem(&sh2->evec), 0xffffffff); // cmp evec, 0xffffffff
+ UML_JMPc(block, COND_Z, skip); // jz skip
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
+ UML_CALLH(block, *sh2->write32); // call write32
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, mem(&sh2->pc)); // mov r1, pc
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, mem(&sh2->pc)); // mov r1, pc
+ UML_CALLH(block, *sh2->write32); // call write32
- UML_MOV(block, mem(&sh2->pc), mem(&sh2->evec)); // mov pc, evec
+ UML_MOV(block, mem(&sh2->pc), mem(&sh2->evec)); // mov pc, evec
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
/* generate a hash jump via the current mode and PC */
- UML_HASHJMP(block, 0, mem(&sh2->pc), *sh2->nocode); // hashjmp <mode>,<pc>,nocode
+ UML_HASHJMP(block, 0, mem(&sh2->pc), *sh2->nocode); // hashjmp <mode>,<pc>,nocode
block->end();
}
@@ -1124,11 +1124,11 @@ static void static_generate_nocode_handler(sh2_state *sh2)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &sh2->nocode, "nocode");
- UML_HANDLE(block, *sh2->nocode); // handle nocode
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&sh2->pc), I0); // mov [pc],i0
+ UML_HANDLE(block, *sh2->nocode); // handle nocode
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&sh2->pc), I0); // mov [pc],i0
save_fast_iregs(sh2, block);
- UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
+ UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
block->end();
}
@@ -1149,11 +1149,11 @@ static void static_generate_out_of_cycles(sh2_state *sh2)
/* generate a hash jump via the current mode and PC */
alloc_handle(drcuml, &sh2->out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *sh2->out_of_cycles); // handle out_of_cycles
- UML_GETEXP(block, I0); // getexp i0
- UML_MOV(block, mem(&sh2->pc), I0); // mov <pc>,i0
+ UML_HANDLE(block, *sh2->out_of_cycles); // handle out_of_cycles
+ UML_GETEXP(block, I0); // getexp i0
+ UML_MOV(block, mem(&sh2->pc), I0); // mov <pc>,i0
save_fast_iregs(sh2,block);
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
block->end();
}
@@ -1176,34 +1176,34 @@ static void static_generate_memory_accessor(sh2_state *sh2, int size, int iswrit
/* add a global entry for this */
alloc_handle(drcuml, handleptr, name);
- UML_HANDLE(block, **handleptr); // handle *handleptr
+ UML_HANDLE(block, **handleptr); // handle *handleptr
// with internal handlers this becomes easier.
// if addr < 0x40000000 AND it with AM and do the read/write, else just do the read/write
- UML_TEST(block, I0, 0x80000000); // test r0, #0x80000000
- UML_JMPc(block, COND_NZ, label); // if high bit is set, don't mask
+ UML_TEST(block, I0, 0x80000000); // test r0, #0x80000000
+ UML_JMPc(block, COND_NZ, label); // if high bit is set, don't mask
- UML_CMP(block, I0, 0x40000000); // cmp #0x40000000, r0
- UML_JMPc(block, COND_AE, label); // bae label
+ UML_CMP(block, I0, 0x40000000); // cmp #0x40000000, r0
+ UML_JMPc(block, COND_AE, label); // bae label
- UML_AND(block, I0, I0, AM); // and r0, r0, #AM (0xc7ffffff)
+ UML_AND(block, I0, I0, AM); // and r0, r0, #AM (0xc7ffffff)
- UML_LABEL(block, label++); // label:
+ UML_LABEL(block, label++); // label:
if (iswrite)
{
switch (size)
{
case 1:
- UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); // write r0, r1, program_byte
+ UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM); // write r0, r1, program_byte
break;
case 2:
- UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); // write r0, r1, program_word
+ UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM); // write r0, r1, program_word
break;
case 4:
- UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write r0, r1, program_dword
+ UML_WRITE(block, I0, I1, SIZE_DWORD, SPACE_PROGRAM); // write r0, r1, program_dword
break;
}
}
@@ -1212,20 +1212,20 @@ static void static_generate_memory_accessor(sh2_state *sh2, int size, int iswrit
switch (size)
{
case 1:
- UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); // read r0, program_byte
+ UML_READ(block, I0, I0, SIZE_BYTE, SPACE_PROGRAM); // read r0, program_byte
break;
case 2:
- UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); // read r0, program_word
+ UML_READ(block, I0, I0, SIZE_WORD, SPACE_PROGRAM); // read r0, program_word
break;
case 4:
- UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read r0, program_dword
+ UML_READ(block, I0, I0, SIZE_DWORD, SPACE_PROGRAM); // read r0, program_dword
break;
}
}
- UML_RET(block); // ret
+ UML_RET(block); // ret
block->end();
}
@@ -1407,7 +1407,7 @@ static void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op)
#if (LOG_UML)
char buffer[100];
DasmSH2(buffer, pc, op);
- block->append_comment("%08X: %s", pc, buffer); // comment
+ block->append_comment("%08X: %s", pc, buffer); // comment
#endif
}
@@ -1427,61 +1427,61 @@ static void generate_update_cycles(sh2_state *sh2, drcuml_block *block, compiler
compiler->labelnum += 4;
/* check for interrupts */
- UML_MOV(block, mem(&sh2->irqline), 0xffffffff); // mov irqline, #-1
- UML_CMP(block, mem(&sh2->pending_nmi), 0); // cmp pending_nmi, #0
- UML_JMPc(block, COND_Z, skip+2); // jz skip+2
+ UML_MOV(block, mem(&sh2->irqline), 0xffffffff); // mov irqline, #-1
+ UML_CMP(block, mem(&sh2->pending_nmi), 0); // cmp pending_nmi, #0
+ UML_JMPc(block, COND_Z, skip+2); // jz skip+2
- UML_MOV(block, mem(&sh2->pending_nmi), 0); // zap pending_nmi
- UML_JMP(block, skip+1); // and then go take it (evec is already set)
+ UML_MOV(block, mem(&sh2->pending_nmi), 0); // zap pending_nmi
+ UML_JMP(block, skip+1); // and then go take it (evec is already set)
- UML_LABEL(block, skip+2); // skip+2:
- UML_MOV(block, mem(&sh2->evec), 0xffffffff); // mov evec, -1
- UML_MOV(block, I0, 0xffffffff); // mov r0, -1 (r0 = irq)
- UML_AND(block, I1, I0, 0xffff); // and r1, r0, 0xffff
+ UML_LABEL(block, skip+2); // skip+2:
+ UML_MOV(block, mem(&sh2->evec), 0xffffffff); // mov evec, -1
+ UML_MOV(block, I0, 0xffffffff); // mov r0, -1 (r0 = irq)
+ UML_AND(block, I1, I0, 0xffff); // and r1, r0, 0xffff
- UML_LZCNT(block, I1, mem(&sh2->pending_irq)); // lzcnt r1, pending_irq
- UML_CMP(block, I1, 32); // cmp r1, #32
- UML_JMPc(block, COND_Z, skip+4); // jz skip+4
+ UML_LZCNT(block, I1, mem(&sh2->pending_irq)); // lzcnt r1, pending_irq
+ UML_CMP(block, I1, 32); // cmp r1, #32
+ UML_JMPc(block, COND_Z, skip+4); // jz skip+4
- UML_SUB(block, mem(&sh2->irqline), 31, I1); // sub irqline, #31, r1
+ UML_SUB(block, mem(&sh2->irqline), 31, I1); // sub irqline, #31, r1
- UML_LABEL(block, skip+4); // skip+4:
- UML_CMP(block, mem(&sh2->internal_irq_level), 0xffffffff); // cmp internal_irq_level, #-1
- UML_JMPc(block, COND_Z, skip+3); // jz skip+3
- UML_CMP(block, mem(&sh2->internal_irq_level), mem(&sh2->irqline)); // cmp internal_irq_level, irqline
- UML_JMPc(block, COND_LE, skip+3); // jle skip+3
+ UML_LABEL(block, skip+4); // skip+4:
+ UML_CMP(block, mem(&sh2->internal_irq_level), 0xffffffff); // cmp internal_irq_level, #-1
+ UML_JMPc(block, COND_Z, skip+3); // jz skip+3
+ UML_CMP(block, mem(&sh2->internal_irq_level), mem(&sh2->irqline)); // cmp internal_irq_level, irqline
+ UML_JMPc(block, COND_LE, skip+3); // jle skip+3
- UML_MOV(block, mem(&sh2->irqline), mem(&sh2->internal_irq_level)); // mov r0, internal_irq_level
+ UML_MOV(block, mem(&sh2->irqline), mem(&sh2->internal_irq_level)); // mov r0, internal_irq_level
- UML_LABEL(block, skip+3); // skip+3:
- UML_CMP(block, mem(&sh2->irqline), 0xffffffff); // cmp irqline, #-1
- UML_JMPc(block, COND_Z, skip+1); // jz skip+1
- UML_CALLC(block, cfunc_fastirq, sh2); // callc fastirq
+ UML_LABEL(block, skip+3); // skip+3:
+ UML_CMP(block, mem(&sh2->irqline), 0xffffffff); // cmp irqline, #-1
+ UML_JMPc(block, COND_Z, skip+1); // jz skip+1
+ UML_CALLC(block, cfunc_fastirq, sh2); // callc fastirq
- UML_LABEL(block, skip+1); // skip+1:
- UML_CMP(block, mem(&sh2->evec), 0xffffffff); // cmp evec, 0xffffffff
- UML_JMPc(block, COND_Z, skip); // jz skip
+ UML_LABEL(block, skip+1); // skip+1:
+ UML_CMP(block, mem(&sh2->evec), 0xffffffff); // cmp evec, 0xffffffff
+ UML_JMPc(block, COND_Z, skip); // jz skip
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
+ UML_CALLH(block, *sh2->write32); // call write32
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, param); // mov r1, nextpc
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, param); // mov r1, nextpc
+ UML_CALLH(block, *sh2->write32); // call write32
- UML_HASHJMP(block, 0, mem(&sh2->evec), *sh2->nocode); // hashjmp sh2->evec
+ UML_HASHJMP(block, 0, mem(&sh2->evec), *sh2->nocode); // hashjmp sh2->evec
- UML_LABEL(block, skip); // skip:
+ UML_LABEL(block, skip); // skip:
}
/* account for cycles */
if (compiler->cycles > 0)
{
- UML_SUB(block, mem(&sh2->icount), mem(&sh2->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
- UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
+ UML_SUB(block, mem(&sh2->icount), mem(&sh2->icount), MAPVAR_CYCLES); // sub icount,icount,cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
if (allow_exception)
UML_EXHc(block, COND_S, *sh2->out_of_cycles, param);
// exh out_of_cycles,nextpc
@@ -1498,7 +1498,7 @@ static void generate_checksum_block(sh2_state *sh2, drcuml_block *block, compile
{
const opcode_desc *curdesc;
if (LOG_UML)
- block->append_comment("[Validation for %08X]", seqhead->pc); // comment
+ block->append_comment("[Validation for %08X]", seqhead->pc); // comment
/* loose verify or single instruction: just compare and fail */
if (!(sh2->drcoptions & SH2DRC_STRICT_VERIFY) || seqhead->next() == NULL)
@@ -1506,9 +1506,9 @@ static void generate_checksum_block(sh2_state *sh2, drcuml_block *block, compile
if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
{
void *base = sh2->direct->read_decrypted_ptr(seqhead->physpc, SH2_CODE_XOR(0));
- UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,word
- UML_CMP(block, I0, seqhead->opptr.w[0]); // cmp i0,*opptr
- UML_EXHc(block, COND_NE, *sh2->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x2); // load i0,base,word
+ UML_CMP(block, I0, seqhead->opptr.w[0]); // cmp i0,*opptr
+ UML_EXHc(block, COND_NE, *sh2->nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
}
@@ -1520,25 +1520,25 @@ static void generate_checksum_block(sh2_state *sh2, drcuml_block *block, compile
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
base = sh2->direct->read_decrypted_ptr(curdesc->physpc, SH2_CODE_XOR(0));
- UML_LOAD(block, I0, curdesc->opptr.w, 0, SIZE_WORD, SCALE_x2); // load i0,*opptr,0,word
- UML_CMP(block, I0, curdesc->opptr.w[0]); // cmp i0,*opptr
- UML_EXHc(block, COND_NE, *sh2->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_LOAD(block, I0, curdesc->opptr.w, 0, SIZE_WORD, SCALE_x2); // load i0,*opptr,0,word
+ UML_CMP(block, I0, curdesc->opptr.w[0]); // cmp i0,*opptr
+ UML_EXHc(block, COND_NE, *sh2->nocode, epc(seqhead)); // exne nocode,seqhead->pc
}
#else
UINT32 sum = 0;
void *base = sh2->direct->read_decrypted_ptr(seqhead->physpc, SH2_CODE_XOR(0));
- UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x4); // load i0,base,word
+ UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x4); // load i0,base,word
sum += seqhead->opptr.w[0];
for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
base = sh2->direct->read_decrypted_ptr(curdesc->physpc, SH2_CODE_XOR(0));
- UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); // load i1,*opptr,word
- UML_ADD(block, I0, I0, I1); // add i0,i0,i1
+ UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x2); // load i1,*opptr,word
+ UML_ADD(block, I0, I0, I1); // add i0,i0,i1
sum += curdesc->opptr.w[0];
}
- UML_CMP(block, I0, sum); // cmp i0,sum
- UML_EXHc(block, COND_NE, *sh2->nocode, epc(seqhead)); // exne nocode,seqhead->pc
+ UML_CMP(block, I0, sum); // cmp i0,sum
+ UML_EXHc(block, COND_NE, *sh2->nocode, epc(seqhead)); // exne nocode,seqhead->pc
#endif
}
}
@@ -1559,35 +1559,35 @@ static void generate_sequence_instruction(sh2_state *sh2, drcuml_block *block, c
/* set the PC map variable */
expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 1 : desc->pc;
- UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
+ UML_MAPVAR(block, MAPVAR_PC, expc); // mapvar PC,expc
/* accumulate total cycles */
compiler->cycles += desc->cycles;
/* update the icount map variable */
- UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
+ UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
/* if we want a probe, add it here */
if (desc->pc == PROBE_ADDRESS)
{
- UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
- UML_CALLC(block, cfunc_printf_probe, sh2); // callc cfunc_printf_probe,sh2
+ UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
+ UML_CALLC(block, cfunc_printf_probe, sh2); // callc cfunc_printf_probe,sh2
}
/* if we are debugging, call the debugger */
if ((sh2->device->machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
- UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(sh2, block);
- UML_DEBUG(block, desc->pc); // debug desc->pc
+ UML_DEBUG(block, desc->pc); // debug desc->pc
}
- else // not debug, see what other reasons there are for flushing the PC
+ else // not debug, see what other reasons there are for flushing the PC
{
- if (sh2->drcoptions & SH2DRC_FLUSH_PC) // always flush?
+ if (sh2->drcoptions & SH2DRC_FLUSH_PC) // always flush?
{
- UML_MOV(block, mem(&sh2->pc), desc->pc); // mov sh2->pc, desc->pc
+ UML_MOV(block, mem(&sh2->pc), desc->pc); // mov sh2->pc, desc->pc
}
- else // check for driver-selected flushes
+ else // check for driver-selected flushes
{
int pcflush;
@@ -1595,7 +1595,7 @@ static void generate_sequence_instruction(sh2_state *sh2, drcuml_block *block, c
{
if (desc->pc == sh2->pcflushes[pcflush])
{
- UML_MOV(block, mem(&sh2->pc), desc->pc); // mov sh2->pc, desc->pc
+ UML_MOV(block, mem(&sh2->pc), desc->pc); // mov sh2->pc, desc->pc
}
}
}
@@ -1605,9 +1605,9 @@ static void generate_sequence_instruction(sh2_state *sh2, drcuml_block *block, c
/* if we hit an unmapped address, fatal error */
if (desc->flags & OPFLAG_COMPILER_UNMAPPED)
{
- UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(sh2, block);
- UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
+ UML_EXIT(block, EXECUTE_UNMAPPED_CODE); // exit EXECUTE_UNMAPPED_CODE
}
/* if this is an invalid opcode, die */
@@ -1622,9 +1622,9 @@ static void generate_sequence_instruction(sh2_state *sh2, drcuml_block *block, c
/* compile the instruction */
if (!generate_opcode(sh2, block, compiler, desc, ovrpc))
{
- UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
- UML_MOV(block, mem(&sh2->arg0), desc->opptr.w[0]); // mov [arg0],opcode
- UML_CALLC(block, cfunc_unimplemented, sh2); // callc cfunc_unimplemented
+ UML_MOV(block, mem(&sh2->pc), desc->pc); // mov [pc],desc->pc
+ UML_MOV(block, mem(&sh2->arg0), desc->opptr.w[0]); // mov [arg0],opcode
+ UML_CALLC(block, cfunc_unimplemented, sh2); // callc cfunc_unimplemented
}
}
}
@@ -1639,7 +1639,7 @@ static void generate_delay_slot(sh2_state *sh2, drcuml_block *block, compiler_st
/* compile the delay slot using temporary compiler state */
assert(desc->delay.first() != NULL);
- generate_sequence_instruction(sh2, block, &compiler_temp, desc->delay.first(), ovrpc); // <next instruction>
+ generate_sequence_instruction(sh2, block, &compiler_temp, desc->delay.first(), ovrpc); // <next instruction>
/* update the label */
compiler->labelnum = compiler_temp.labelnum;
@@ -1663,11 +1663,11 @@ static int generate_opcode(sh2_state *sh2, drcuml_block *block, compiler_state *
case 0:
return generate_group_0(sh2, block, compiler, desc, opcode, in_delay_slot, ovrpc);
- case 1: // MOVLS4
+ case 1: // MOVLS4
scratch = (opcode & 0x0f) * 4;
- UML_ADD(block, I0, R32(Rn), scratch); // add r0, Rn, scratch
- UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
- SETEA(0); // set ea for debug
+ UML_ADD(block, I0, R32(Rn), scratch); // add r0, Rn, scratch
+ UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
+ SETEA(0); // set ea for debug
UML_CALLH(block, *sh2->write32);
if (!in_delay_slot)
@@ -1681,12 +1681,12 @@ static int generate_opcode(sh2_state *sh2, drcuml_block *block, compiler_state *
case 4:
return generate_group_4(sh2, block, compiler, desc, opcode, in_delay_slot, ovrpc);
- case 5: // MOVLL4
+ case 5: // MOVLL4
scratch = (opcode & 0x0f) * 4;
- UML_ADD(block, I0, R32(Rm), scratch); // add r0, Rm, scratch
- SETEA(0); // set ea for debug
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, R32(Rn), I0); // mov Rn, r0
+ UML_ADD(block, I0, R32(Rm), scratch); // add r0, Rm, scratch
+ SETEA(0); // set ea for debug
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, R32(Rn), I0); // mov Rn, r0
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -1695,16 +1695,16 @@ static int generate_opcode(sh2_state *sh2, drcuml_block *block, compiler_state *
case 6:
return generate_group_6(sh2, block, compiler, desc, opcode, in_delay_slot, ovrpc);
- case 7: // ADDI
+ case 7: // ADDI
scratch = opcode & 0xff;
scratch2 = (UINT32)(INT32)(INT16)(INT8)scratch;
- UML_ADD(block, R32(Rn), R32(Rn), scratch2); // add Rn, Rn, scratch2
+ UML_ADD(block, R32(Rn), R32(Rn), scratch2); // add Rn, Rn, scratch2
return TRUE;
case 8:
return generate_group_8(sh2, block, compiler, desc, opcode, in_delay_slot, ovrpc);
- case 9: // MOVWI
+ case 9: // MOVWI
if (ovrpc == 0xffffffff)
{
scratch = (desc->pc + 2) + ((opcode & 0xff) * 2) + 2;
@@ -1716,49 +1716,49 @@ static int generate_opcode(sh2_state *sh2, drcuml_block *block, compiler_state *
if (sh2->drcoptions & SH2DRC_STRICT_PCREL)
{
- UML_MOV(block, I0, scratch); // mov r0, scratch
- SETEA(0); // set ea for debug
- UML_CALLH(block, *sh2->read16); // read16(r0, r1)
- UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
+ UML_MOV(block, I0, scratch); // mov r0, scratch
+ SETEA(0); // set ea for debug
+ UML_CALLH(block, *sh2->read16); // read16(r0, r1)
+ UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
}
else
{
scratch2 = (UINT32)(INT32)(INT16) RW(sh2, scratch);
- UML_MOV(block, R32(Rn), scratch2); // mov Rn, scratch2
+ UML_MOV(block, R32(Rn), scratch2); // mov Rn, scratch2
}
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
- case 10: // BRA
+ case 10: // BRA
disp = ((INT32)opcode << 20) >> 20;
- sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = pc+4 + disp*2 + 2
+ sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = pc+4 + disp*2 + 2
generate_delay_slot(sh2, block, compiler, desc, sh2->ea-2);
- generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // hashjmp sh2->ea
+ generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // hashjmp sh2->ea
return TRUE;
- case 11: // BSR
+ case 11: // BSR
// panicstr @ 403da22 relies on the delay slot clobbering the PR set by a BSR, so
// do this before running the delay slot
- UML_ADD(block, mem(&sh2->pr), desc->pc, 4); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot)
+ UML_ADD(block, mem(&sh2->pr), desc->pc, 4); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot)
disp = ((INT32)opcode << 20) >> 20;
- sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = pc+4 + disp*2 + 2
+ sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = pc+4 + disp*2 + 2
generate_delay_slot(sh2, block, compiler, desc, sh2->ea-2);
- generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // hashjmp sh2->ea
+ generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // hashjmp sh2->ea
return TRUE;
case 12:
return generate_group_12(sh2, block, compiler, desc, opcode, in_delay_slot, ovrpc);
- case 13: // MOVLI
+ case 13: // MOVLI
if (ovrpc == 0xffffffff)
{
scratch = ((desc->pc + 4) & ~3) + ((opcode & 0xff) * 4);
@@ -1770,27 +1770,27 @@ static int generate_opcode(sh2_state *sh2, drcuml_block *block, compiler_state *
if (sh2->drcoptions & SH2DRC_STRICT_PCREL)
{
- UML_MOV(block, I0, scratch); // mov r0, scratch
- UML_CALLH(block, *sh2->read32); // read32(r0, r1)
- UML_MOV(block, R32(Rn), I0); // mov Rn, r0
+ UML_MOV(block, I0, scratch); // mov r0, scratch
+ UML_CALLH(block, *sh2->read32); // read32(r0, r1)
+ UML_MOV(block, R32(Rn), I0); // mov Rn, r0
}
else
{
scratch2 = RL(sh2, scratch);
- UML_MOV(block, R32(Rn), scratch2); // mov Rn, scratch2
+ UML_MOV(block, R32(Rn), scratch2); // mov Rn, scratch2
}
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
- case 14: // MOVI
+ case 14: // MOVI
scratch = opcode & 0xff;
scratch2 = (UINT32)(INT32)(INT16)(INT8)scratch;
UML_MOV(block, R32(Rn), scratch2);
return TRUE;
- case 15: // NOP
+ case 15: // NOP
return TRUE;
}
@@ -1826,17 +1826,17 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x03: // BSRF(Rn);
if (sh2->cpu_type > CPU_TYPE_SH1)
{
- UML_ADD(block, mem(&sh2->target), R32(Rn), 4); // add target, Rm, #4
- UML_ADD(block, mem(&sh2->target), mem(&sh2->target), desc->pc); // add target, target, pc
+ UML_ADD(block, mem(&sh2->target), R32(Rn), 4); // add target, Rm, #4
+ UML_ADD(block, mem(&sh2->target), mem(&sh2->target), desc->pc); // add target, target, pc
// 32x Cosmic Carnage @ 6002cb0 relies on the delay slot
// clobbering the calculated PR, so do it first
- UML_ADD(block, mem(&sh2->pr), desc->pc, 4); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot)
+ UML_ADD(block, mem(&sh2->pr), desc->pc, 4); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot)
generate_delay_slot(sh2, block, compiler, desc, sh2->target);
- generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // jmp target
+ generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // jmp target
return TRUE;
}
break;
@@ -1845,9 +1845,9 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x14: // MOVBS0(Rm, Rn);
case 0x24: // MOVBS0(Rm, Rn);
case 0x34: // MOVBS0(Rm, Rn);
- UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
- UML_AND(block, I1, R32(Rm), 0x000000ff); // and r1, Rm, 0xff
- UML_CALLH(block, *sh2->write8); // call write8
+ UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
+ UML_AND(block, I1, R32(Rm), 0x000000ff); // and r1, Rm, 0xff
+ UML_CALLH(block, *sh2->write8); // call write8
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -1857,9 +1857,9 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x15: // MOVWS0(Rm, Rn);
case 0x25: // MOVWS0(Rm, Rn);
case 0x35: // MOVWS0(Rm, Rn);
- UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
- UML_AND(block, I1, R32(Rm), 0x0000ffff); // and r1, Rm, 0xffff
- UML_CALLH(block, *sh2->write16); // call write16
+ UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
+ UML_AND(block, I1, R32(Rm), 0x0000ffff); // and r1, Rm, 0xffff
+ UML_CALLH(block, *sh2->write16); // call write16
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -1869,9 +1869,9 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x16: // MOVLS0(Rm, Rn);
case 0x26: // MOVLS0(Rm, Rn);
case 0x36: // MOVLS0(Rm, Rn);
- UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
- UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_ADD(block, I0, R32(0), R32(Rn)); // add r0, R0, Rn
+ UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -1883,25 +1883,25 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x37: // MULL(Rm, Rn);
if (sh2->cpu_type > CPU_TYPE_SH1)
{
- UML_MULU(block, mem(&sh2->macl), mem(&sh2->ea), R32(Rn), R32(Rm)); // mulu macl, ea, Rn, Rm
+ UML_MULU(block, mem(&sh2->macl), mem(&sh2->ea), R32(Rn), R32(Rm)); // mulu macl, ea, Rn, Rm
return TRUE;
}
break;
case 0x08: // CLRT();
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
return TRUE;
case 0x0a: // STSMACH(Rn);
- UML_MOV(block, R32(Rn), mem(&sh2->mach)); // mov Rn, mach
+ UML_MOV(block, R32(Rn), mem(&sh2->mach)); // mov Rn, mach
return TRUE;
case 0x0b: // RTS();
- UML_MOV(block, mem(&sh2->target), mem(&sh2->pr)); // mov target, pr (in case of d-slot shenanigans)
+ UML_MOV(block, mem(&sh2->target), mem(&sh2->pr)); // mov target, pr (in case of d-slot shenanigans)
generate_delay_slot(sh2, block, compiler, desc, sh2->target);
- generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
+ generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode);
return TRUE;
@@ -1909,9 +1909,9 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x1c: // MOVBL0(Rm, Rn);
case 0x2c: // MOVBL0(Rm, Rn);
case 0x3c: // MOVBL0(Rm, Rn);
- UML_ADD(block, I0, R32(0), R32(Rm)); // add r0, R0, Rm
- UML_CALLH(block, *sh2->read8); // call read8
- UML_SEXT(block, R32(Rn), I0, SIZE_BYTE); // sext Rn, r0, BYTE
+ UML_ADD(block, I0, R32(0), R32(Rm)); // add r0, R0, Rm
+ UML_CALLH(block, *sh2->read8); // call read8
+ UML_SEXT(block, R32(Rn), I0, SIZE_BYTE); // sext Rn, r0, BYTE
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -1921,9 +1921,9 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x1d: // MOVWL0(Rm, Rn);
case 0x2d: // MOVWL0(Rm, Rn);
case 0x3d: // MOVWL0(Rm, Rn);
- UML_ADD(block, I0, R32(0), R32(Rm)); // add r0, R0, Rm
- UML_CALLH(block, *sh2->read16); // call read16
- UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
+ UML_ADD(block, I0, R32(0), R32(Rm)); // add r0, R0, Rm
+ UML_CALLH(block, *sh2->read16); // call read16
+ UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -1933,9 +1933,9 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x1e: // MOVLL0(Rm, Rn);
case 0x2e: // MOVLL0(Rm, Rn);
case 0x3e: // MOVLL0(Rm, Rn);
- UML_ADD(block, I0, R32(0), R32(Rm)); // add r0, R0, Rm
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, R32(Rn), I0); // mov Rn, r0
+ UML_ADD(block, I0, R32(0), R32(Rm)); // add r0, R0, Rm
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, R32(Rn), I0); // mov Rn, r0
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -1956,19 +1956,19 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
break;
case 0x12: // STCGBR(Rn);
- UML_MOV(block, R32(Rn), mem(&sh2->gbr)); // mov Rn, gbr
+ UML_MOV(block, R32(Rn), mem(&sh2->gbr)); // mov Rn, gbr
return TRUE;
case 0x18: // SETT();
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
return TRUE;
case 0x19: // DIV0U();
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~(M|Q|T)); // and sr, sr, ~(M|Q|T)
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~(M|Q|T)); // and sr, sr, ~(M|Q|T)
return TRUE;
case 0x1a: // STSMACL(Rn);
- UML_MOV(block, R32(Rn), mem(&sh2->macl)); // mov Rn, macl
+ UML_MOV(block, R32(Rn), mem(&sh2->macl)); // mov Rn, macl
return TRUE;
case 0x1b: // SLEEP();
@@ -1976,30 +1976,30 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
// if an interrupt is taken, the return address is set to the next instruction
UML_CALLC(block, cfunc_checkirqs, sh2);
- UML_MOV(block, I0, mem(&sh2->evec)); // mov r0, evec
- UML_CMP(block, I0, 0xffffffff); // cmp r0, 0xffffffff
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz skip
+ UML_MOV(block, I0, mem(&sh2->evec)); // mov r0, evec
+ UML_CMP(block, I0, 0xffffffff); // cmp r0, 0xffffffff
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz skip
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, mem(&sh2->irqsr)); // mov r1, irqsr
+ UML_CALLH(block, *sh2->write32); // call write32
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, desc->pc+2); // mov r1, nextpc
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, desc->pc+2); // mov r1, nextpc
+ UML_CALLH(block, *sh2->write32); // call write32
- UML_HASHJMP(block, 0, mem(&sh2->evec), *sh2->nocode); // hashjmp sh2->evec
+ UML_HASHJMP(block, 0, mem(&sh2->evec), *sh2->nocode); // hashjmp sh2->evec
- UML_LABEL(block, compiler->labelnum++); // skip:
+ UML_LABEL(block, compiler->labelnum++); // skip:
// now go "out of cycles"
if (compiler->cycles > 0)
{
- UML_MOV(block, mem(&sh2->icount), 0); // mov icount, #0
- UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
- UML_EXH(block, *sh2->out_of_cycles, desc->pc); // go out of cycles
+ UML_MOV(block, mem(&sh2->icount), 0); // mov icount, #0
+ UML_MAPVAR(block, MAPVAR_CYCLES, 0); // mapvar cycles,0
+ UML_EXH(block, *sh2->out_of_cycles, desc->pc); // go out of cycles
}
else
{
@@ -2009,52 +2009,52 @@ static int generate_group_0(sh2_state *sh2, drcuml_block *block, compiler_state
return TRUE;
case 0x22: // STCVBR(Rn);
- UML_MOV(block, R32(Rn), mem(&sh2->vbr)); // mov Rn, vbr
+ UML_MOV(block, R32(Rn), mem(&sh2->vbr)); // mov Rn, vbr
return TRUE;
case 0x23: // BRAF(Rn);
if (sh2->cpu_type > CPU_TYPE_SH1)
{
- UML_ADD(block, mem(&sh2->target), R32(Rn), desc->pc+4); // add target, Rn, pc+4
+ UML_ADD(block, mem(&sh2->target), R32(Rn), desc->pc+4); // add target, Rn, pc+4
generate_delay_slot(sh2, block, compiler, desc, sh2->target);
- generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // jmp target
+ generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // jmp target
return TRUE;
}
break;
case 0x28: // CLRMAC();
- UML_MOV(block, mem(&sh2->macl), 0); // mov macl, #0
- UML_MOV(block, mem(&sh2->mach), 0); // mov mach, #0
+ UML_MOV(block, mem(&sh2->macl), 0); // mov macl, #0
+ UML_MOV(block, mem(&sh2->mach), 0); // mov mach, #0
return TRUE;
case 0x29: // MOVT(Rn);
- UML_AND(block, R32(Rn), mem(&sh2->sr), T); // and Rn, sr, T
+ UML_AND(block, R32(Rn), mem(&sh2->sr), T); // and Rn, sr, T
return TRUE;
case 0x2a: // STSPR(Rn);
- UML_MOV(block, R32(Rn), mem(&sh2->pr)); // mov Rn, pr
+ UML_MOV(block, R32(Rn), mem(&sh2->pr)); // mov Rn, pr
return TRUE;
case 0x2b: // RTE();
generate_delay_slot(sh2, block, compiler, desc, 0xffffffff);
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, mem(&sh2->pc), I0); // mov pc, r0
- UML_ADD(block, R32(15), R32(15), 4); // add R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, mem(&sh2->pc), I0); // mov pc, r0
+ UML_ADD(block, R32(15), R32(15), 4); // add R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, mem(&sh2->sr), I0); // mov sr, r0
- UML_ADD(block, R32(15), R32(15), 4); // add R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sr, r0
+ UML_ADD(block, R32(15), R32(15), 4); // add R15, R15, #4
compiler->checkints = TRUE;
- UML_MOV(block, mem(&sh2->ea), mem(&sh2->pc)); // mov ea, pc
- generate_update_cycles(sh2, block, compiler, mem(&sh2->ea), TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, mem(&sh2->pc), *sh2->nocode); // and jump to the "resume PC"
+ UML_MOV(block, mem(&sh2->ea), mem(&sh2->pc)); // mov ea, pc
+ generate_update_cycles(sh2, block, compiler, mem(&sh2->ea), TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, mem(&sh2->pc), *sh2->nocode); // and jump to the "resume PC"
return TRUE;
}
@@ -2067,8 +2067,8 @@ static int generate_group_2(sh2_state *sh2, drcuml_block *block, compiler_state
switch (opcode & 15)
{
case 0: // MOVBS(Rm, Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_AND(block, I1, R32(Rm), 0xff); // and r1, Rm, 0xff
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_AND(block, I1, R32(Rm), 0xff); // and r1, Rm, 0xff
UML_CALLH(block, *sh2->write8);
if (!in_delay_slot)
@@ -2076,8 +2076,8 @@ static int generate_group_2(sh2_state *sh2, drcuml_block *block, compiler_state
return TRUE;
case 1: // MOVWS(Rm, Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_AND(block, I1, R32(Rm), 0xffff); // and r1, Rm, 0xffff
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_AND(block, I1, R32(Rm), 0xffff); // and r1, Rm, 0xffff
UML_CALLH(block, *sh2->write16);
if (!in_delay_slot)
@@ -2085,8 +2085,8 @@ static int generate_group_2(sh2_state *sh2, drcuml_block *block, compiler_state
return TRUE;
case 2: // MOVLS(Rm, Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
UML_CALLH(block, *sh2->write32);
if (!in_delay_slot)
@@ -2097,134 +2097,134 @@ static int generate_group_2(sh2_state *sh2, drcuml_block *block, compiler_state
return TRUE;
case 4: // MOVBM(Rm, Rn);
- UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
- UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_CALLH(block, *sh2->write8); // call write8
+ UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
+ UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_CALLH(block, *sh2->write8); // call write8
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 5: // MOVWM(Rm, Rn);
- UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
- UML_SUB(block, R32(Rn), R32(Rn), 2); // sub Rn, Rn, 2
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_CALLH(block, *sh2->write16); // call write16
+ UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
+ UML_SUB(block, R32(Rn), R32(Rn), 2); // sub Rn, Rn, 2
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_CALLH(block, *sh2->write16); // call write16
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 6: // MOVLM(Rm, Rn);
- UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
- UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, 4
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_MOV(block, I1, R32(Rm)); // mov r1, Rm
+ UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, 4
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 13: // XTRCT(Rm, Rn);
- UML_SHL(block, I0, R32(Rm), 16); // shl r0, Rm, #16
- UML_AND(block, I0, I0, 0xffff0000); // and r0, r0, #0xffff0000
+ UML_SHL(block, I0, R32(Rm), 16); // shl r0, Rm, #16
+ UML_AND(block, I0, I0, 0xffff0000); // and r0, r0, #0xffff0000
- UML_SHR(block, I1, R32(Rn), 16); // shr, r1, Rn, #16
- UML_AND(block, I1, I1, 0xffff); // and r1, r1, #0x0000ffff
+ UML_SHR(block, I1, R32(Rn), 16); // shr, r1, Rn, #16
+ UML_AND(block, I1, I1, 0xffff); // and r1, r1, #0x0000ffff
- UML_OR(block, R32(Rn), I0, I1); // or Rn, r0, r1
+ UML_OR(block, R32(Rn), I0, I1); // or Rn, r0, r1
return TRUE;
case 7: // DIV0S(Rm, Rn);
- UML_MOV(block, I0, mem(&sh2->sr)); // move r0, sr
- UML_AND(block, I0, I0, ~(Q|M|T)); // and r0, r0, ~(Q|M|T) (clear the Q,M, and T bits)
+ UML_MOV(block, I0, mem(&sh2->sr)); // move r0, sr
+ UML_AND(block, I0, I0, ~(Q|M|T)); // and r0, r0, ~(Q|M|T) (clear the Q,M, and T bits)
- UML_TEST(block, R32(Rn), 0x80000000); // test Rn, #0x80000000
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
+ UML_TEST(block, R32(Rn), 0x80000000); // test Rn, #0x80000000
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
- UML_OR(block, I0, I0, Q); // or r0, r0, Q
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_OR(block, I0, I0, Q); // or r0, r0, Q
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
- UML_TEST(block, R32(Rm), 0x80000000); // test Rm, #0x80000000
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
+ UML_TEST(block, R32(Rm), 0x80000000); // test Rm, #0x80000000
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
- UML_OR(block, I0, I0, M); // or r0, r0, M
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_OR(block, I0, I0, M); // or r0, r0, M
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
- UML_XOR(block, I1, R32(Rn), R32(Rm)); // xor r1, Rn, Rm
- UML_TEST(block, I1, 0x80000000); // test r1, #0x80000000
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
+ UML_XOR(block, I1, R32(Rn), R32(Rm)); // xor r1, Rn, Rm
+ UML_TEST(block, I1, 0x80000000); // test r1, #0x80000000
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz labelnum
- UML_OR(block, I0, I0, T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
- UML_MOV(block, mem(&sh2->sr), I0); // mov sr, r0
+ UML_OR(block, I0, I0, T); // or r0, r0, T
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sr, r0
return TRUE;
case 8: // TST(Rm, Rn);
- UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
- UML_TEST(block, R32(Rm), R32(Rn)); // test Rm, Rn
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
+ UML_TEST(block, R32(Rm), R32(Rn)); // test Rm, Rn
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
- UML_OR(block, I0, I0, T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_OR(block, I0, I0, T); // or r0, r0, T
+ UML_LABEL(block, compiler->labelnum++); // desc->pc:
- UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
return TRUE;
case 12: // CMPSTR(Rm, Rn);
- UML_XOR(block, I0, R32(Rn), R32(Rm)); // xor r0, Rn, Rm (temp)
+ UML_XOR(block, I0, R32(Rn), R32(Rm)); // xor r0, Rn, Rm (temp)
- UML_SHR(block, I1, I0, 24); // shr r1, r0, #24 (HH)
- UML_AND(block, I1, I1, 0xff); // and r1, r1, #0xff
+ UML_SHR(block, I1, I0, 24); // shr r1, r0, #24 (HH)
+ UML_AND(block, I1, I1, 0xff); // and r1, r1, #0xff
- UML_SHR(block, I2, I0, 16); // shr r2, r0, #16 (HL)
- UML_AND(block, I2, I2, 0xff); // and r2, r2, #0xff
+ UML_SHR(block, I2, I0, 16); // shr r2, r0, #16 (HL)
+ UML_AND(block, I2, I2, 0xff); // and r2, r2, #0xff
- UML_SHR(block, I3, I0, 8); // shr r3, r0, #8 (LH)
- UML_AND(block, I3, I3, 0xff); // and r3, r3, #0xff
+ UML_SHR(block, I3, I0, 8); // shr r3, r0, #8 (LH)
+ UML_AND(block, I3, I3, 0xff); // and r3, r3, #0xff
- UML_AND(block, I7, I0, 0xff); // and r7, r0, #0xff (LL)
+ UML_AND(block, I7, I0, 0xff); // and r7, r0, #0xff (LL)
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
- UML_CMP(block, I1, 0); // cmp r1, #0
- UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
- UML_CMP(block, I2, 0); // cmp r2, #0
- UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
- UML_CMP(block, I3, 0); // cmp r3, #0
- UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
- UML_CMP(block, I7, 0); // cmp r7, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum+1); // jnz labelnum
+ UML_CMP(block, I1, 0); // cmp r1, #0
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
+ UML_CMP(block, I2, 0); // cmp r2, #0
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
+ UML_CMP(block, I3, 0); // cmp r3, #0
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jnz labelnum
+ UML_CMP(block, I7, 0); // cmp r7, #0
+ UML_JMPc(block, COND_NZ, compiler->labelnum+1); // jnz labelnum
- UML_LABEL(block, compiler->labelnum++); // labelnum:
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum+1:
+ UML_LABEL(block, compiler->labelnum++); // labelnum+1:
return TRUE;
case 9: // AND(Rm, Rn);
- UML_AND(block, R32(Rn), R32(Rn), R32(Rm)); // and Rn, Rn, Rm
+ UML_AND(block, R32(Rn), R32(Rn), R32(Rm)); // and Rn, Rn, Rm
return TRUE;
case 10: // XOR(Rm, Rn);
- UML_XOR(block, R32(Rn), R32(Rn), R32(Rm)); // xor Rn, Rn, Rm
+ UML_XOR(block, R32(Rn), R32(Rn), R32(Rm)); // xor Rn, Rn, Rm
return TRUE;
case 11: // OR(Rm, Rn);
- UML_OR(block, R32(Rn), R32(Rn), R32(Rm)); // or Rn, Rn, Rm
+ UML_OR(block, R32(Rn), R32(Rn), R32(Rm)); // or Rn, Rn, Rm
return TRUE;
case 14: // MULU(Rm, Rn);
- UML_AND(block, I0, R32(Rm), 0xffff); // and r0, Rm, 0xffff
- UML_AND(block, I1, R32(Rn), 0xffff); // and r1, Rn, 0xffff
- UML_MULU(block, mem(&sh2->macl), mem(&sh2->ea), I0, I1); // mulu macl, ea, r0, r1
+ UML_AND(block, I0, R32(Rm), 0xffff); // and r0, Rm, 0xffff
+ UML_AND(block, I1, R32(Rn), 0xffff); // and r1, Rn, 0xffff
+ UML_MULU(block, mem(&sh2->macl), mem(&sh2->ea), I0, I1); // mulu macl, ea, r0, r1
return TRUE;
case 15: // MULS(Rm, Rn);
- UML_SEXT(block, I0, R32(Rm), SIZE_WORD); // sext r0, Rm
- UML_SEXT(block, I1, R32(Rn), SIZE_WORD); // sext r1, Rn
- UML_MULS(block, mem(&sh2->macl), mem(&sh2->ea), I0, I1); // muls macl, ea, r0, r1
+ UML_SEXT(block, I0, R32(Rm), SIZE_WORD); // sext r0, Rm
+ UML_SEXT(block, I1, R32(Rn), SIZE_WORD); // sext r1, Rn
+ UML_MULS(block, mem(&sh2->macl), mem(&sh2->ea), I0, I1); // muls macl, ea, r0, r1
return TRUE;
}
@@ -2236,33 +2236,33 @@ static int generate_group_3(sh2_state *sh2, drcuml_block *block, compiler_state
switch (opcode & 15)
{
case 0: // CMPEQ(Rm, Rn); (equality)
- UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
- UML_SETc(block, COND_E, I0); // set E, r0
- UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
+ UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
+ UML_SETc(block, COND_E, I0); // set E, r0
+ UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
return TRUE;
case 2: // CMPHS(Rm, Rn); (unsigned greater than or equal)
- UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
- UML_SETc(block, COND_AE, I0); // set AE, r0
- UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
+ UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
+ UML_SETc(block, COND_AE, I0); // set AE, r0
+ UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
return TRUE;
case 3: // CMPGE(Rm, Rn); (signed greater than or equal)
- UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
- UML_SETc(block, COND_GE, I0); // set GE, r0
- UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
+ UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
+ UML_SETc(block, COND_GE, I0); // set GE, r0
+ UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
return TRUE;
case 6: // CMPHI(Rm, Rn); (unsigned greater than)
- UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
- UML_SETc(block, COND_A, I0); // set A, r0
- UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
+ UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
+ UML_SETc(block, COND_A, I0); // set A, r0
+ UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
return TRUE;
case 7: // CMPGT(Rm, Rn); (signed greater than)
- UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
- UML_SETc(block, COND_G, I0); // set G, r0
- UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
+ UML_CMP(block, R32(Rn), R32(Rm)); // cmp Rn, Rm
+ UML_SETc(block, COND_G, I0); // set G, r0
+ UML_ROLINS(block, mem(&sh2->sr), I0, 0, 1); // rolins sr, r0, 0, 1
return TRUE;
case 1: // NOP();
@@ -2293,24 +2293,24 @@ static int generate_group_3(sh2_state *sh2, drcuml_block *block, compiler_state
break;
case 8: // SUB(Rm, Rn);
- UML_SUB(block, R32(Rn), R32(Rn), R32(Rm)); // sub Rn, Rn, Rm
+ UML_SUB(block, R32(Rn), R32(Rn), R32(Rm)); // sub Rn, Rn, Rm
return TRUE;
case 12: // ADD(Rm, Rn);
- UML_ADD(block, R32(Rn), R32(Rn), R32(Rm)); // add Rn, Rn, Rm
+ UML_ADD(block, R32(Rn), R32(Rn), R32(Rm)); // add Rn, Rn, Rm
return TRUE;
case 10: // SUBC(Rm, Rn);
- UML_CARRY(block, mem(&sh2->sr), 0); // carry = T (T is bit 0 of SR)
- UML_SUBB(block, R32(Rn), R32(Rn), R32(Rm)); // addc Rn, Rn, Rm
- UML_SETc(block, COND_C, I0); // setc i0, C
+ UML_CARRY(block, mem(&sh2->sr), 0); // carry = T (T is bit 0 of SR)
+ UML_SUBB(block, R32(Rn), R32(Rn), R32(Rm)); // addc Rn, Rn, Rm
+ UML_SETc(block, COND_C, I0); // setc i0, C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins sr,i0,0,T
return TRUE;
case 11: // SUBV(Rm, Rn);
#if ADDSUBV_DIRECT
- UML_SUB(block, R32(Rn), R32(Rn), R32(Rm)); // sub Rn, Rn, Rm
- UML_SETc(block, COND_V, I0); // setc i0, V
+ UML_SUB(block, R32(Rn), R32(Rn), R32(Rm)); // sub Rn, Rn, Rm
+ UML_SETc(block, COND_V, I0); // setc i0, V
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins [sr],i0,0,T
#else
save_fast_iregs(sh2, block);
@@ -2321,16 +2321,16 @@ static int generate_group_3(sh2_state *sh2, drcuml_block *block, compiler_state
return TRUE;
case 14: // ADDC(Rm, Rn);
- UML_CARRY(block, mem(&sh2->sr), 0); // carry = T (T is bit 0 of SR)
- UML_ADDC(block, R32(Rn), R32(Rn), R32(Rm)); // addc Rn, Rn, Rm
- UML_SETc(block, COND_C, I0); // setc i0, C
+ UML_CARRY(block, mem(&sh2->sr), 0); // carry = T (T is bit 0 of SR)
+ UML_ADDC(block, R32(Rn), R32(Rn), R32(Rm)); // addc Rn, Rn, Rm
+ UML_SETc(block, COND_C, I0); // setc i0, C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins sr,i0,0,T
return TRUE;
case 15: // ADDV(Rm, Rn);
#if ADDSUBV_DIRECT
- UML_ADD(block, R32(Rn), R32(Rn), R32(Rm)); // add Rn, Rn, Rm
- UML_SETc(block, COND_V, I0); // setc i0, V
+ UML_ADD(block, R32(Rn), R32(Rn), R32(Rm)); // add Rn, Rn, Rm
+ UML_SETc(block, COND_V, I0); // setc i0, V
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins [sr],i0,0,T
#else
save_fast_iregs(sh2, block);
@@ -2348,68 +2348,68 @@ static int generate_group_4(sh2_state *sh2, drcuml_block *block, compiler_state
switch (opcode & 0x3F)
{
case 0x00: // SHLL(Rn);
- UML_SHL(block, R32(Rn), R32(Rn), 1); // shl Rn, Rn, 1
- UML_SETc(block, COND_C, I0); // set i0,C
+ UML_SHL(block, R32(Rn), R32(Rn), 1); // shl Rn, Rn, 1
+ UML_SETc(block, COND_C, I0); // set i0,C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins [sr],i0,0,T
return TRUE;
case 0x01: // SHLR(Rn);
- UML_SHR(block, R32(Rn), R32(Rn), 1); // shr Rn, Rn, 1
- UML_SETc(block, COND_C, I0); // set i0,C
+ UML_SHR(block, R32(Rn), R32(Rn), 1); // shr Rn, Rn, 1
+ UML_SETc(block, COND_C, I0); // set i0,C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins [sr],i0,0,T
return TRUE;
case 0x04: // ROTL(Rn);
- UML_ROL(block, R32(Rn), R32(Rn), 1); // rol Rn, Rn, 1
- UML_SETc(block, COND_C, I0); // set i0,C
+ UML_ROL(block, R32(Rn), R32(Rn), 1); // rol Rn, Rn, 1
+ UML_SETc(block, COND_C, I0); // set i0,C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins [sr],i0,0,T
return TRUE;
case 0x05: // ROTR(Rn);
- UML_ROR(block, R32(Rn), R32(Rn), 1); // ror Rn, Rn, 1
- UML_SETc(block, COND_C, I0); // set i0,C
+ UML_ROR(block, R32(Rn), R32(Rn), 1); // ror Rn, Rn, 1
+ UML_SETc(block, COND_C, I0); // set i0,C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins [sr],i0,0,T
return TRUE;
case 0x02: // STSMMACH(Rn);
- UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_MOV(block, I1, mem(&sh2->mach)); // mov r1, mach
- SETEA(0); // set ea for debug
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I1, mem(&sh2->mach)); // mov r1, mach
+ SETEA(0); // set ea for debug
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x03: // STCMSR(Rn);
- UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_MOV(block, I1, mem(&sh2->sr)); // mov r1, sr
- SETEA(0); // set ea for debug
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I1, mem(&sh2->sr)); // mov r1, sr
+ SETEA(0); // set ea for debug
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x06: // LDSMMACH(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_CALLH(block, *sh2->read32); // call read32
- UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
- UML_MOV(block, mem(&sh2->mach), I0); // mov mach, r0
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
+ UML_MOV(block, mem(&sh2->mach), I0); // mov mach, r0
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x07: // LDCMSR(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_CALLH(block, *sh2->read32); // call read32
- UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
- UML_MOV(block, mem(&sh2->sr), I0); // mov sr, r0
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sr, r0
compiler->checkints = TRUE;
if (!in_delay_slot)
@@ -2442,23 +2442,23 @@ static int generate_group_4(sh2_state *sh2, drcuml_block *block, compiler_state
return TRUE;
case 0x0a: // LDSMACH(Rn);
- UML_MOV(block, mem(&sh2->mach), R32(Rn)); // mov mach, Rn
+ UML_MOV(block, mem(&sh2->mach), R32(Rn)); // mov mach, Rn
return TRUE;
case 0x0b: // JSR(Rn);
- UML_MOV(block, mem(&sh2->target), R32(Rn)); // mov target, Rn
+ UML_MOV(block, mem(&sh2->target), R32(Rn)); // mov target, Rn
- UML_ADD(block, mem(&sh2->pr), desc->pc, 4); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot)
+ UML_ADD(block, mem(&sh2->pr), desc->pc, 4); // add sh2->pr, desc->pc, #4 (skip the current insn & delay slot)
generate_delay_slot(sh2, block, compiler, desc, sh2->target-4);
- generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // and do the jump
+ generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // and do the jump
return TRUE;
case 0x0e: // LDCSR(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_AND(block, I0, I0, FLAGS); // and r0, r0, FLAGS
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_AND(block, I0, I0, FLAGS); // and r0, r0, FLAGS
UML_MOV(block, mem(&sh2->sr), I0);
compiler->checkints = TRUE;
@@ -2477,207 +2477,207 @@ static int generate_group_4(sh2_state *sh2, drcuml_block *block, compiler_state
case 0x10: // DT(Rn);
if (sh2->cpu_type > CPU_TYPE_SH1)
{
- UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
- UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jz compiler->labelnum
+ UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
+ UML_SUB(block, R32(Rn), R32(Rn), 1); // sub Rn, Rn, 1
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jz compiler->labelnum
- UML_OR(block, I0, I0, T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_OR(block, I0, I0, T); // or r0, r0, T
+ UML_LABEL(block, compiler->labelnum++); // desc->pc:
- UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
return TRUE;
}
break;
case 0x11: // CMPPZ(Rn);
- UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
+ UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
- UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
- UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
+ UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
+ UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
- UML_OR(block, I0, I0, T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_OR(block, I0, I0, T); // or r0, r0, T
+ UML_LABEL(block, compiler->labelnum++); // desc->pc:
- UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
return TRUE;
case 0x15: // CMPPL(Rn);
- UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
+ UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
- UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
+ UML_CMP(block, R32(Rn), 0); // cmp Rn, 0
- UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum (if zero)
+ UML_JMPc(block, COND_S, compiler->labelnum); // js compiler->labelnum (if negative)
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum (if zero)
- UML_OR(block, I0, I0, T); // or r0, r0, T
+ UML_OR(block, I0, I0, T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // desc->pc:
- UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
+ UML_LABEL(block, compiler->labelnum++); // desc->pc:
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
return TRUE;
case 0x12: // STSMMACL(Rn);
- UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_MOV(block, I1, mem(&sh2->macl)); // mov r1, macl
- SETEA(0); // set ea for debug
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I1, mem(&sh2->macl)); // mov r1, macl
+ SETEA(0); // set ea for debug
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x13: // STCMGBR(Rn);
- UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_MOV(block, I1, mem(&sh2->gbr)); // mov r1, gbr
- SETEA(0); // set ea for debug
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, #4
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I1, mem(&sh2->gbr)); // mov r1, gbr
+ SETEA(0); // set ea for debug
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x16: // LDSMMACL(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_CALLH(block, *sh2->read32); // call read32
- UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
- UML_MOV(block, mem(&sh2->macl), I0); // mov macl, r0
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
+ UML_MOV(block, mem(&sh2->macl), I0); // mov macl, r0
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x17: // LDCMGBR(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_CALLH(block, *sh2->read32); // call read32
- UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
- UML_MOV(block, mem(&sh2->gbr), I0); // mov gbr, r0
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, #4
+ UML_MOV(block, mem(&sh2->gbr), I0); // mov gbr, r0
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x1a: // LDSMACL(Rn);
- UML_MOV(block, mem(&sh2->macl), R32(Rn)); // mov macl, Rn
+ UML_MOV(block, mem(&sh2->macl), R32(Rn)); // mov macl, Rn
return TRUE;
case 0x1b: // TAS(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_CALLH(block, *sh2->read8); // call read8
+ UML_CALLH(block, *sh2->read8); // call read8
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T
- UML_CMP(block, I0, 0); // cmp r0, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
+ UML_CMP(block, I0, 0); // cmp r0, #0
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
- UML_OR(block, I1, I0, 0x80); // or r1, r0, #0x80
+ UML_OR(block, I1, I0, 0x80); // or r1, r0, #0x80
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
- UML_CALLH(block, *sh2->write8); // write the value back
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_CALLH(block, *sh2->write8); // write the value back
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x1e: // LDCGBR(Rn);
- UML_MOV(block, mem(&sh2->gbr), R32(Rn)); // mov gbr, Rn
+ UML_MOV(block, mem(&sh2->gbr), R32(Rn)); // mov gbr, Rn
return TRUE;
case 0x20: // SHAL(Rn);
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T
- UML_SHR(block, I0, R32(Rn), 31); // shr r0, Rn, 31
- UML_AND(block, I0, I0, T); // and r0, r0, T
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), I0); // or sr, sr, r0
- UML_SHL(block, R32(Rn), R32(Rn), 1); // shl Rn, Rn, 1
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T
+ UML_SHR(block, I0, R32(Rn), 31); // shr r0, Rn, 31
+ UML_AND(block, I0, I0, T); // and r0, r0, T
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), I0); // or sr, sr, r0
+ UML_SHL(block, R32(Rn), R32(Rn), 1); // shl Rn, Rn, 1
return TRUE;
case 0x21: // SHAR(Rn);
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T
- UML_AND(block, I0, R32(Rn), T); // and r0, Rn, T
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), I0); // or sr, sr, r0
- UML_SAR(block, R32(Rn), R32(Rn), 1); // sar Rn, Rn, 1
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T
+ UML_AND(block, I0, R32(Rn), T); // and r0, Rn, T
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), I0); // or sr, sr, r0
+ UML_SAR(block, R32(Rn), R32(Rn), 1); // sar Rn, Rn, 1
return TRUE;
case 0x22: // STSMPR(Rn);
- UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, 4
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, 4
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_MOV(block, I1, mem(&sh2->pr)); // mov r1, pr
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_MOV(block, I1, mem(&sh2->pr)); // mov r1, pr
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x23: // STCMVBR(Rn);
- UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, 4
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_SUB(block, R32(Rn), R32(Rn), 4); // sub Rn, Rn, 4
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_MOV(block, I1, mem(&sh2->vbr)); // mov r1, vbr
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_MOV(block, I1, mem(&sh2->vbr)); // mov r1, vbr
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x24: // ROTCL(Rn);
- UML_CARRY(block, mem(&sh2->sr), 0); // carry sr,0
- UML_ROLC(block, R32(Rn), R32(Rn), 1); // rolc Rn,Rn,1
- UML_SETc(block, COND_C, I0); // set i0,C
+ UML_CARRY(block, mem(&sh2->sr), 0); // carry sr,0
+ UML_ROLC(block, R32(Rn), R32(Rn), 1); // rolc Rn,Rn,1
+ UML_SETc(block, COND_C, I0); // set i0,C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins sr,i0,0,T
return TRUE;
case 0x25: // ROTCR(Rn);
- UML_CARRY(block, mem(&sh2->sr), 0); // carry sr,0
- UML_RORC(block, R32(Rn), R32(Rn), 1); // rorc Rn,Rn,1
- UML_SETc(block, COND_C, I0); // set i0,C
+ UML_CARRY(block, mem(&sh2->sr), 0); // carry sr,0
+ UML_RORC(block, R32(Rn), R32(Rn), 1); // rorc Rn,Rn,1
+ UML_SETc(block, COND_C, I0); // set i0,C
UML_ROLINS(block, mem(&sh2->sr), I0, 0, T); // rolins sr,i0,0,T
return TRUE;
case 0x26: // LDSMPR(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, mem(&sh2->pr), I0); // mov sh2->pr, r0
- UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, Rn, #4
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, mem(&sh2->pr), I0); // mov sh2->pr, r0
+ UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, Rn, #4
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x27: // LDCMVBR(Rn);
- UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
+ UML_MOV(block, I0, R32(Rn)); // mov r0, Rn
SETEA(0);
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, mem(&sh2->vbr), I0); // mov sh2->vbr, r0
- UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, Rn, #4
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, mem(&sh2->vbr), I0); // mov sh2->vbr, r0
+ UML_ADD(block, R32(Rn), R32(Rn), 4); // add Rn, Rn, #4
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 0x2a: // LDSPR(Rn);
- UML_MOV(block, mem(&sh2->pr), R32(Rn)); // mov sh2->pr, Rn
+ UML_MOV(block, mem(&sh2->pr), R32(Rn)); // mov sh2->pr, Rn
return TRUE;
case 0x2b: // JMP(Rn);
- UML_MOV(block, mem(&sh2->target), R32(Rn)); // mov target, Rn
+ UML_MOV(block, mem(&sh2->target), R32(Rn)); // mov target, Rn
generate_delay_slot(sh2, block, compiler, desc, sh2->target);
- generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // jmp (target)
+ generate_update_cycles(sh2, block, compiler, mem(&sh2->target), TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, mem(&sh2->target), *sh2->nocode); // jmp (target)
return TRUE;
case 0x2e: // LDCVBR(Rn);
- UML_MOV(block, mem(&sh2->vbr), R32(Rn)); // mov vbr, Rn
+ UML_MOV(block, mem(&sh2->vbr), R32(Rn)); // mov vbr, Rn
return TRUE;
case 0x0c: // NOP();
@@ -2713,124 +2713,124 @@ static int generate_group_6(sh2_state *sh2, drcuml_block *block, compiler_state
switch (opcode & 15)
{
case 0: // MOVBL(Rm, Rn);
- UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
- SETEA(0); // debug: ea = r0
- UML_CALLH(block, *sh2->read8); // call read8
- UML_SEXT(block, R32(Rn), I0, SIZE_BYTE); // sext Rn, r0, BYTE
+ UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
+ SETEA(0); // debug: ea = r0
+ UML_CALLH(block, *sh2->read8); // call read8
+ UML_SEXT(block, R32(Rn), I0, SIZE_BYTE); // sext Rn, r0, BYTE
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 1: // MOVWL(Rm, Rn);
- UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
- SETEA(0); // debug: ea = r0
- UML_CALLH(block, *sh2->read16); // call read16
- UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
+ UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
+ SETEA(0); // debug: ea = r0
+ UML_CALLH(block, *sh2->read16); // call read16
+ UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 2: // MOVLL(Rm, Rn);
- UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
- SETEA(0); // debug: ea = r0
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, R32(Rn), I0); // mov Rn, r0
+ UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
+ SETEA(0); // debug: ea = r0
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, R32(Rn), I0); // mov Rn, r0
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 3: // MOV(Rm, Rn);
- UML_MOV(block, R32(Rn), R32(Rm)); // mov Rn, Rm
+ UML_MOV(block, R32(Rn), R32(Rm)); // mov Rn, Rm
return TRUE;
case 7: // NOT(Rm, Rn);
- UML_XOR(block, R32(Rn), R32(Rm), 0xffffffff); // xor Rn, Rm, 0xffffffff
+ UML_XOR(block, R32(Rn), R32(Rm), 0xffffffff); // xor Rn, Rm, 0xffffffff
return TRUE;
case 9: // SWAPW(Rm, Rn);
- UML_ROL(block, R32(Rn), R32(Rm), 16); // rol Rn, Rm, 16
+ UML_ROL(block, R32(Rn), R32(Rm), 16); // rol Rn, Rm, 16
return TRUE;
case 11: // NEG(Rm, Rn);
- UML_SUB(block, R32(Rn), 0, R32(Rm)); // sub Rn, 0, Rm
+ UML_SUB(block, R32(Rn), 0, R32(Rm)); // sub Rn, 0, Rm
return TRUE;
case 12: // EXTUB(Rm, Rn);
- UML_AND(block, R32(Rn), R32(Rm), 0x000000ff); // and Rn, Rm, 0xff
+ UML_AND(block, R32(Rn), R32(Rm), 0x000000ff); // and Rn, Rm, 0xff
return TRUE;
case 13: // EXTUW(Rm, Rn);
- UML_AND(block, R32(Rn), R32(Rm), 0x0000ffff); // and Rn, Rm, 0xffff
+ UML_AND(block, R32(Rn), R32(Rm), 0x0000ffff); // and Rn, Rm, 0xffff
return TRUE;
case 14: // EXTSB(Rm, Rn);
- UML_SEXT(block, R32(Rn), R32(Rm), SIZE_BYTE); // sext Rn, Rm, BYTE
+ UML_SEXT(block, R32(Rn), R32(Rm), SIZE_BYTE); // sext Rn, Rm, BYTE
return TRUE;
case 15: // EXTSW(Rm, Rn);
- UML_SEXT(block, R32(Rn), R32(Rm), SIZE_WORD); // sext Rn, Rm, WORD
+ UML_SEXT(block, R32(Rn), R32(Rm), SIZE_WORD); // sext Rn, Rm, WORD
return TRUE;
case 4: // MOVBP(Rm, Rn);
- UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
- UML_CALLH(block, *sh2->read8); // call read8
- UML_SEXT(block, R32(Rn), I0, SIZE_BYTE); // sext Rn, r0, BYTE
+ UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
+ UML_CALLH(block, *sh2->read8); // call read8
+ UML_SEXT(block, R32(Rn), I0, SIZE_BYTE); // sext Rn, r0, BYTE
if (Rm != Rn)
- UML_ADD(block, R32(Rm), R32(Rm), 1); // add Rm, Rm, #1
+ UML_ADD(block, R32(Rm), R32(Rm), 1); // add Rm, Rm, #1
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 5: // MOVWP(Rm, Rn);
- UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
- UML_CALLH(block, *sh2->read16); // call read16
- UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
+ UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
+ UML_CALLH(block, *sh2->read16); // call read16
+ UML_SEXT(block, R32(Rn), I0, SIZE_WORD); // sext Rn, r0, WORD
if (Rm != Rn)
- UML_ADD(block, R32(Rm), R32(Rm), 2); // add Rm, Rm, #2
+ UML_ADD(block, R32(Rm), R32(Rm), 2); // add Rm, Rm, #2
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 6: // MOVLP(Rm, Rn);
- UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, R32(Rn), I0); // mov Rn, r0
+ UML_MOV(block, I0, R32(Rm)); // mov r0, Rm
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, R32(Rn), I0); // mov Rn, r0
if (Rm != Rn)
- UML_ADD(block, R32(Rm), R32(Rm), 4); // add Rm, Rm, #4
+ UML_ADD(block, R32(Rm), R32(Rm), 4); // add Rm, Rm, #4
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 8: // SWAPB(Rm, Rn);
- UML_AND(block, I0, R32(Rm), 0xffff0000); // and r0, Rm, #0xffff0000
- UML_AND(block, I1, R32(Rm), 0x000000ff); // and r0, Rm, #0x000000ff
- UML_AND(block, I2, R32(Rm), 0x0000ff00); // and r0, Rm, #0x0000ff00
- UML_SHL(block, I1, I1, 8); // shl r1, r1, #8
- UML_SHR(block, I2, I2, 8); // shr r2, r2, #8
- UML_OR(block, I0, I0, I1); // or r0, r0, r1
- UML_OR(block, R32(Rn), I0, I2); // or Rn, r0, r2
+ UML_AND(block, I0, R32(Rm), 0xffff0000); // and r0, Rm, #0xffff0000
+ UML_AND(block, I1, R32(Rm), 0x000000ff); // and r0, Rm, #0x000000ff
+ UML_AND(block, I2, R32(Rm), 0x0000ff00); // and r0, Rm, #0x0000ff00
+ UML_SHL(block, I1, I1, 8); // shl r1, r1, #8
+ UML_SHR(block, I2, I2, 8); // shr r2, r2, #8
+ UML_OR(block, I0, I0, I1); // or r0, r0, r1
+ UML_OR(block, R32(Rn), I0, I2); // or Rn, r0, r2
return TRUE;
case 10: // NEGC(Rm, Rn);
- UML_MOV(block, I0, mem(&sh2->sr)); // mov r0, sr (save SR)
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
- UML_CARRY(block, I0, 0); // carry = T (T is bit 0 of SR)
- UML_SUBB(block, R32(Rn), 0, R32(Rm)); // subb Rn, #0, Rm
+ UML_MOV(block, I0, mem(&sh2->sr)); // mov r0, sr (save SR)
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
+ UML_CARRY(block, I0, 0); // carry = T (T is bit 0 of SR)
+ UML_SUBB(block, R32(Rn), 0, R32(Rm)); // subb Rn, #0, Rm
- UML_JMPc(block, COND_NC, compiler->labelnum); // jnc labelnum
+ UML_JMPc(block, COND_NC, compiler->labelnum); // jnc labelnum
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
return TRUE;
}
@@ -2848,9 +2848,9 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
{
case 0 << 8: // MOVBS4(opcode & 0x0f, Rm);
udisp = (opcode & 0x0f);
- UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
- UML_MOV(block, I1, R32(0)); // mov r1, R0
- UML_CALLH(block, *sh2->write8); // call write8
+ UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
+ UML_MOV(block, I1, R32(0)); // mov r1, R0
+ UML_CALLH(block, *sh2->write8); // call write8
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -2858,9 +2858,9 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
case 1 << 8: // MOVWS4(opcode & 0x0f, Rm);
udisp = (opcode & 0x0f) * 2;
- UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
- UML_MOV(block, I1, R32(0)); // mov r1, R0
- UML_CALLH(block, *sh2->write16); // call write16
+ UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
+ UML_MOV(block, I1, R32(0)); // mov r1, R0
+ UML_CALLH(block, *sh2->write16); // call write16
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -2877,10 +2877,10 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
case 4<< 8: // MOVBL4(Rm, opcode & 0x0f);
udisp = opcode & 0x0f;
- UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
+ UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
SETEA(0);
- UML_CALLH(block, *sh2->read8); // call read8
- UML_SEXT(block, R32(0), I0, SIZE_BYTE); // sext R0, r0, BYTE
+ UML_CALLH(block, *sh2->read8); // call read8
+ UML_SEXT(block, R32(0), I0, SIZE_BYTE); // sext R0, r0, BYTE
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -2888,71 +2888,71 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
case 5<< 8: // MOVWL4(Rm, opcode & 0x0f);
udisp = (opcode & 0x0f)*2;
- UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
+ UML_ADD(block, I0, R32(Rm), udisp); // add r0, Rm, udisp
SETEA(0);
- UML_CALLH(block, *sh2->read16); // call read16
- UML_SEXT(block, R32(0), I0, SIZE_WORD); // sext R0, r0, WORD
+ UML_CALLH(block, *sh2->read16); // call read16
+ UML_SEXT(block, R32(0), I0, SIZE_WORD); // sext R0, r0, WORD
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
return TRUE;
case 8<< 8: // CMPIM(opcode & 0xff);
- UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
+ UML_AND(block, I0, mem(&sh2->sr), ~T); // and r0, sr, ~T (clear the T bit)
- UML_SEXT(block, I1, opcode&0xff, SIZE_BYTE); // sext r1, opcode&0xff, BYTE
- UML_CMP(block, I1, R32(0)); // cmp r1, R0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum (if negative)
+ UML_SEXT(block, I1, opcode&0xff, SIZE_BYTE); // sext r1, opcode&0xff, BYTE
+ UML_CMP(block, I1, R32(0)); // cmp r1, R0
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum (if negative)
- UML_OR(block, I0, I0, T); // or r0, r0, T
+ UML_OR(block, I0, I0, T); // or r0, r0, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
- UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_MOV(block, mem(&sh2->sr), I0); // mov sh2->sr, r0
return TRUE;
case 9<< 8: // BT(opcode & 0xff);
- UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
+ UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
- sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
+ sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
- generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
+ generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
return TRUE;
case 11<< 8: // BF(opcode & 0xff);
- UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
- sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
+ sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
- generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
+ generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
return TRUE;
case 13<< 8: // BTS(opcode & 0xff);
if (sh2->cpu_type > CPU_TYPE_SH1)
{
- UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
+ UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
+ UML_JMPc(block, COND_Z, compiler->labelnum); // jz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
- sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
+ sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
- templabel = compiler->labelnum; // save our label
- compiler->labelnum++; // make sure the delay slot doesn't use it
+ templabel = compiler->labelnum; // save our label
+ compiler->labelnum++; // make sure the delay slot doesn't use it
generate_delay_slot(sh2, block, compiler, desc, sh2->ea-2);
- generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
+ generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
- UML_LABEL(block, templabel); // labelnum:
+ UML_LABEL(block, templabel); // labelnum:
return TRUE;
}
break;
@@ -2960,20 +2960,20 @@ static int generate_group_8(sh2_state *sh2, drcuml_block *block, compiler_state
case 15<< 8: // BFS(opcode & 0xff);
if (sh2->cpu_type > CPU_TYPE_SH1)
{
- UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
+ UML_TEST(block, mem(&sh2->sr), T); // test sh2->sr, T
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz compiler->labelnum
disp = ((INT32)opcode << 24) >> 24;
- sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
+ sh2->ea = (desc->pc + 2) + disp * 2 + 2; // sh2->ea = destination
- templabel = compiler->labelnum; // save our label
- compiler->labelnum++; // make sure the delay slot doesn't use it
- generate_delay_slot(sh2, block, compiler, desc, sh2->ea-2); // delay slot only if the branch is taken
+ templabel = compiler->labelnum; // save our label
+ compiler->labelnum++; // make sure the delay slot doesn't use it
+ generate_delay_slot(sh2, block, compiler, desc, sh2->ea-2); // delay slot only if the branch is taken
- generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
- UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
+ generate_update_cycles(sh2, block, compiler, sh2->ea, TRUE); // <subtract cycles>
+ UML_HASHJMP(block, 0, sh2->ea, *sh2->nocode); // jmp sh2->ea
- UML_LABEL(block, templabel); // labelnum:
+ UML_LABEL(block, templabel); // labelnum:
return TRUE;
}
break;
@@ -2990,9 +2990,9 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
{
case 0<<8: // MOVBSG(opcode & 0xff);
scratch = (opcode & 0xff);
- UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
- UML_AND(block, I1, R32(0), 0xff); // and r1, R0, 0xff
- UML_CALLH(block, *sh2->write8); // call write8
+ UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
+ UML_AND(block, I1, R32(0), 0xff); // and r1, R0, 0xff
+ UML_CALLH(block, *sh2->write8); // call write8
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -3000,9 +3000,9 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
case 1<<8: // MOVWSG(opcode & 0xff);
scratch = (opcode & 0xff) * 2;
- UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
- UML_AND(block, I1, R32(0), 0xffff); // and r1, R0, 0xffff
- UML_CALLH(block, *sh2->write16); // call write16
+ UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
+ UML_AND(block, I1, R32(0), 0xffff); // and r1, R0, 0xffff
+ UML_CALLH(block, *sh2->write16); // call write16
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -3010,9 +3010,9 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
case 2<<8: // MOVLSG(opcode & 0xff);
scratch = (opcode & 0xff) * 4;
- UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
- UML_MOV(block, I1, R32(0)); // mov r1, R0
- UML_CALLH(block, *sh2->write32); // call write32
+ UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
+ UML_MOV(block, I1, R32(0)); // mov r1, R0
+ UML_CALLH(block, *sh2->write32); // call write32
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -3020,29 +3020,29 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
case 3<<8: // TRAPA(opcode & 0xff);
scratch = (opcode & 0xff) * 4;
- UML_ADD(block, mem(&sh2->ea), mem(&sh2->vbr), scratch); // add ea, vbr, scratch
+ UML_ADD(block, mem(&sh2->ea), mem(&sh2->vbr), scratch); // add ea, vbr, scratch
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, mem(&sh2->sr)); // mov r1, sr
- UML_CALLH(block, *sh2->write32); // write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, mem(&sh2->sr)); // mov r1, sr
+ UML_CALLH(block, *sh2->write32); // write32
- UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
- UML_MOV(block, I0, R32(15)); // mov r0, R15
- UML_MOV(block, I1, desc->pc+2); // mov r1, pc+2
- UML_CALLH(block, *sh2->write32); // write32
+ UML_SUB(block, R32(15), R32(15), 4); // sub R15, R15, #4
+ UML_MOV(block, I0, R32(15)); // mov r0, R15
+ UML_MOV(block, I1, desc->pc+2); // mov r1, pc+2
+ UML_CALLH(block, *sh2->write32); // write32
- UML_MOV(block, I0, mem(&sh2->ea)); // mov r0, ea
- UML_CALLH(block, *sh2->read32); // read32
- UML_HASHJMP(block, 0, I0, *sh2->nocode); // jmp (r0)
+ UML_MOV(block, I0, mem(&sh2->ea)); // mov r0, ea
+ UML_CALLH(block, *sh2->read32); // read32
+ UML_HASHJMP(block, 0, I0, *sh2->nocode); // jmp (r0)
return TRUE;
case 4<<8: // MOVBLG(opcode & 0xff);
scratch = (opcode & 0xff);
- UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
- UML_CALLH(block, *sh2->read8); // call read16
- UML_SEXT(block, R32(0), I0, SIZE_BYTE); // sext R0, r0, BYTE
+ UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
+ UML_CALLH(block, *sh2->read8); // call read16
+ UML_SEXT(block, R32(0), I0, SIZE_BYTE); // sext R0, r0, BYTE
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -3050,9 +3050,9 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
case 5<<8: // MOVWLG(opcode & 0xff);
scratch = (opcode & 0xff) * 2;
- UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
- UML_CALLH(block, *sh2->read16); // call read16
- UML_SEXT(block, R32(0), I0, SIZE_WORD); // sext R0, r0, WORD
+ UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
+ UML_CALLH(block, *sh2->read16); // call read16
+ UML_SEXT(block, R32(0), I0, SIZE_WORD); // sext R0, r0, WORD
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -3060,9 +3060,9 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
case 6<<8: // MOVLLG(opcode & 0xff);
scratch = (opcode & 0xff) * 4;
- UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
- UML_CALLH(block, *sh2->read32); // call read32
- UML_MOV(block, R32(0), I0); // mov R0, r0
+ UML_ADD(block, I0, mem(&sh2->gbr), scratch); // add r0, gbr, scratch
+ UML_CALLH(block, *sh2->read32); // call read32
+ UML_MOV(block, R32(0), I0); // mov R0, r0
if (!in_delay_slot)
generate_update_cycles(sh2, block, compiler, desc->pc + 2, TRUE);
@@ -3072,76 +3072,76 @@ static int generate_group_12(sh2_state *sh2, drcuml_block *block, compiler_state
scratch = (opcode & 0xff) * 4;
scratch += ((desc->pc + 4) & ~3);
- UML_MOV(block, R32(0), scratch); // mov R0, scratch
+ UML_MOV(block, R32(0), scratch); // mov R0, scratch
return TRUE;
case 8<<8: // TSTI(opcode & 0xff);
scratch = opcode & 0xff;
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
- UML_AND(block, I0, R32(0), scratch); // and r0, R0, scratch
- UML_CMP(block, I0, 0); // cmp r0, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
+ UML_AND(block, I0, R32(0), scratch); // and r0, R0, scratch
+ UML_CMP(block, I0, 0); // cmp r0, #0
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
return TRUE;
case 9<<8: // ANDI(opcode & 0xff);
- UML_AND(block, R32(0), R32(0), opcode & 0xff); // and r0, r0, opcode & 0xff
+ UML_AND(block, R32(0), R32(0), opcode & 0xff); // and r0, r0, opcode & 0xff
return TRUE;
case 10<<8: // XORI(opcode & 0xff);
- UML_XOR(block, R32(0), R32(0), opcode & 0xff); // xor r0, r0, opcode & 0xff
+ UML_XOR(block, R32(0), R32(0), opcode & 0xff); // xor r0, r0, opcode & 0xff
return TRUE;
case 11<<8: // ORI(opcode & 0xff);
- UML_OR(block, R32(0), R32(0), opcode & 0xff); // or r0, r0, opcode & 0xff
+ UML_OR(block, R32(0), R32(0), opcode & 0xff); // or r0, r0, opcode & 0xff
return TRUE;
case 12<<8: // TSTM(opcode & 0xff);
- UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
- UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
- UML_CALLH(block, *sh2->read8); // read8
+ UML_AND(block, mem(&sh2->sr), mem(&sh2->sr), ~T); // and sr, sr, ~T (clear the T bit)
+ UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
+ UML_CALLH(block, *sh2->read8); // read8
UML_AND(block, I0, I0, opcode & 0xff);
- UML_CMP(block, I0, 0); // cmp r0, #0
- UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
+ UML_CMP(block, I0, 0); // cmp r0, #0
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // jnz labelnum
- UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
+ UML_OR(block, mem(&sh2->sr), mem(&sh2->sr), T); // or sr, sr, T
- UML_LABEL(block, compiler->labelnum++); // labelnum:
+ UML_LABEL(block, compiler->labelnum++); // labelnum:
return TRUE;
case 13<<8: // ANDM(opcode & 0xff);
- UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
- UML_CALLH(block, *sh2->read8); // read8
+ UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
+ UML_CALLH(block, *sh2->read8); // read8
- UML_AND(block, I1, I0, opcode&0xff); // and r1, r0, #opcode&0xff
- UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
+ UML_AND(block, I1, I0, opcode&0xff); // and r1, r0, #opcode&0xff
+ UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
SETEA(0);
- UML_CALLH(block, *sh2->write8); // write8
+ UML_CALLH(block, *sh2->write8); // write8
return TRUE;
case 14<<8: // XORM(opcode & 0xff);
- UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
- UML_CALLH(block, *sh2->read8); // read8
+ UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
+ UML_CALLH(block, *sh2->read8); // read8
- UML_XOR(block, I1, I0, opcode&0xff); // xor r1, r0, #opcode&0xff
- UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
+ UML_XOR(block, I1, I0, opcode&0xff); // xor r1, r0, #opcode&0xff
+ UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
SETEA(0);
- UML_CALLH(block, *sh2->write8); // write8
+ UML_CALLH(block, *sh2->write8); // write8
return TRUE;
case 15<<8: // ORM(opcode & 0xff);
- UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
- UML_CALLH(block, *sh2->read8); // read8
+ UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
+ UML_CALLH(block, *sh2->read8); // read8
- UML_OR(block, I1, I0, opcode&0xff); // or r1, r0, #opcode&0xff
- UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
+ UML_OR(block, I1, I0, opcode&0xff); // or r1, r0, #opcode&0xff
+ UML_ADD(block, I0, R32(0), mem(&sh2->gbr)); // add r0, R0, gbr
SETEA(0);
- UML_CALLH(block, *sh2->write8); // write8
+ UML_CALLH(block, *sh2->write8); // write8
return TRUE;
}
@@ -3208,51 +3208,51 @@ static CPU_SET_INFO( sh2 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: sh2_set_irq_line(sh2, SH2_INT_VBLIN, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: sh2_set_irq_line(sh2, SH2_INT_VBLOUT, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: sh2_set_irq_line(sh2, SH2_INT_HBLIN, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: sh2_set_irq_line(sh2, SH2_INT_TIMER0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: sh2_set_irq_line(sh2, SH2_INT_TIMER1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: sh2_set_irq_line(sh2, SH2_INT_DSP, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: sh2_set_irq_line(sh2, SH2_INT_SOUND, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: sh2_set_irq_line(sh2, SH2_INT_SMPC, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: sh2_set_irq_line(sh2, SH2_INT_PAD, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: sh2_set_irq_line(sh2, SH2_INT_DMA2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: sh2_set_irq_line(sh2, SH2_INT_DMA1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: sh2_set_irq_line(sh2, SH2_INT_DMA0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: sh2_set_irq_line(sh2, SH2_INT_DMAILL, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: sh2_set_irq_line(sh2, SH2_INT_SPRITE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_14: sh2_set_irq_line(sh2, SH2_INT_14, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_15: sh2_set_irq_line(sh2, SH2_INT_15, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: sh2_set_irq_line(sh2, SH2_INT_ABUS, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: sh2_set_irq_line(sh2, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: sh2_set_irq_line(sh2, SH2_INT_VBLIN, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: sh2_set_irq_line(sh2, SH2_INT_VBLOUT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: sh2_set_irq_line(sh2, SH2_INT_HBLIN, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: sh2_set_irq_line(sh2, SH2_INT_TIMER0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: sh2_set_irq_line(sh2, SH2_INT_TIMER1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: sh2_set_irq_line(sh2, SH2_INT_DSP, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: sh2_set_irq_line(sh2, SH2_INT_SOUND, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: sh2_set_irq_line(sh2, SH2_INT_SMPC, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: sh2_set_irq_line(sh2, SH2_INT_PAD, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: sh2_set_irq_line(sh2, SH2_INT_DMA2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: sh2_set_irq_line(sh2, SH2_INT_DMA1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: sh2_set_irq_line(sh2, SH2_INT_DMA0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: sh2_set_irq_line(sh2, SH2_INT_DMAILL, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: sh2_set_irq_line(sh2, SH2_INT_SPRITE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_14: sh2_set_irq_line(sh2, SH2_INT_14, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_15: sh2_set_irq_line(sh2, SH2_INT_15, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: sh2_set_irq_line(sh2, SH2_INT_ABUS, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: sh2_set_irq_line(sh2, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_REGISTER + SH2_PC:
- case CPUINFO_INT_PC: sh2->pc = info->i; sh2->delay = 0; break;
- case CPUINFO_INT_SP: sh2->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_SR: sh2->sr = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_GBR: sh2->gbr = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_VBR: sh2->vbr = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_MACL: sh2->macl = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R0: sh2->r[ 0] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R1: sh2->r[ 1] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R2: sh2->r[ 2] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R3: sh2->r[ 3] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R4: sh2->r[ 4] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R5: sh2->r[ 5] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R6: sh2->r[ 6] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R7: sh2->r[ 7] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R8: sh2->r[ 8] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R9: sh2->r[ 9] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R10: sh2->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R11: sh2->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R12: sh2->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R13: sh2->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R14: sh2->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_R15: sh2->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SH2_EA: sh2->ea = info->i; break;
+ case CPUINFO_INT_PC: sh2->pc = info->i; sh2->delay = 0; break;
+ case CPUINFO_INT_SP: sh2->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_PR: sh2->pr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_SR: sh2->sr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_GBR: sh2->gbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_VBR: sh2->vbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_MACH: sh2->mach = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_MACL: sh2->macl = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R0: sh2->r[ 0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R1: sh2->r[ 1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R2: sh2->r[ 2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R3: sh2->r[ 3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R4: sh2->r[ 4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R5: sh2->r[ 5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R6: sh2->r[ 6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R7: sh2->r[ 7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R8: sh2->r[ 8] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R9: sh2->r[ 9] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R10: sh2->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R11: sh2->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R12: sh2->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R13: sh2->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R14: sh2->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_R15: sh2->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH2_EA: sh2->ea = info->i; break;
}
}
@@ -3267,96 +3267,96 @@ CPU_GET_INFO( sh2 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sh2_state *); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sh2_state *); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
// Internal maps
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map32 = ADDRESS_MAP_NAME(sh2_internal_map); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map32 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map32 = NULL; break;
-
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: info->i = sh2->irq_line_state[SH2_INT_VBLIN]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: info->i = sh2->irq_line_state[SH2_INT_VBLOUT]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: info->i = sh2->irq_line_state[SH2_INT_HBLIN]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: info->i = sh2->irq_line_state[SH2_INT_TIMER0]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: info->i = sh2->irq_line_state[SH2_INT_TIMER1]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: info->i = sh2->irq_line_state[SH2_INT_DSP]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: info->i = sh2->irq_line_state[SH2_INT_SOUND]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: info->i = sh2->irq_line_state[SH2_INT_SMPC]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: info->i = sh2->irq_line_state[SH2_INT_PAD]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: info->i = sh2->irq_line_state[SH2_INT_DMA2]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: info->i = sh2->irq_line_state[SH2_INT_DMA1]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: info->i = sh2->irq_line_state[SH2_INT_DMA0]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: info->i = sh2->irq_line_state[SH2_INT_DMAILL]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: info->i = sh2->irq_line_state[SH2_INT_SPRITE]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_14: info->i = sh2->irq_line_state[SH2_INT_14]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_15: info->i = sh2->irq_line_state[SH2_INT_15]; break;
- case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: info->i = sh2->irq_line_state[SH2_INT_ABUS]; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = sh2->nmi_line_state; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = sh2->ppc; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map32 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map32 = NULL; break;
+
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLIN: info->i = sh2->irq_line_state[SH2_INT_VBLIN]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_VBLOUT: info->i = sh2->irq_line_state[SH2_INT_VBLOUT]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_HBLIN: info->i = sh2->irq_line_state[SH2_INT_HBLIN]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER0: info->i = sh2->irq_line_state[SH2_INT_TIMER0]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_TIMER1: info->i = sh2->irq_line_state[SH2_INT_TIMER1]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DSP: info->i = sh2->irq_line_state[SH2_INT_DSP]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SOUND: info->i = sh2->irq_line_state[SH2_INT_SOUND]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SMPC: info->i = sh2->irq_line_state[SH2_INT_SMPC]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_PAD: info->i = sh2->irq_line_state[SH2_INT_PAD]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA2: info->i = sh2->irq_line_state[SH2_INT_DMA2]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA1: info->i = sh2->irq_line_state[SH2_INT_DMA1]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMA0: info->i = sh2->irq_line_state[SH2_INT_DMA0]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_DMAILL: info->i = sh2->irq_line_state[SH2_INT_DMAILL]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_SPRITE: info->i = sh2->irq_line_state[SH2_INT_SPRITE]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_14: info->i = sh2->irq_line_state[SH2_INT_14]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_15: info->i = sh2->irq_line_state[SH2_INT_15]; break;
+ case CPUINFO_INT_INPUT_STATE + SH2_INT_ABUS: info->i = sh2->irq_line_state[SH2_INT_ABUS]; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = sh2->nmi_line_state; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = sh2->ppc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SH2_PC: info->i = (sh2->delay) ? (sh2->delay & AM) : (sh2->pc & AM); break;
- case CPUINFO_INT_SP: info->i = sh2->r[15]; break;
- case CPUINFO_INT_REGISTER + SH2_PR: info->i = sh2->pr; break;
- case CPUINFO_INT_REGISTER + SH2_SR: info->i = sh2->sr; break;
- case CPUINFO_INT_REGISTER + SH2_GBR: info->i = sh2->gbr; break;
- case CPUINFO_INT_REGISTER + SH2_VBR: info->i = sh2->vbr; break;
- case CPUINFO_INT_REGISTER + SH2_MACH: info->i = sh2->mach; break;
- case CPUINFO_INT_REGISTER + SH2_MACL: info->i = sh2->macl; break;
- case CPUINFO_INT_REGISTER + SH2_R0: info->i = sh2->r[ 0]; break;
- case CPUINFO_INT_REGISTER + SH2_R1: info->i = sh2->r[ 1]; break;
- case CPUINFO_INT_REGISTER + SH2_R2: info->i = sh2->r[ 2]; break;
- case CPUINFO_INT_REGISTER + SH2_R3: info->i = sh2->r[ 3]; break;
- case CPUINFO_INT_REGISTER + SH2_R4: info->i = sh2->r[ 4]; break;
- case CPUINFO_INT_REGISTER + SH2_R5: info->i = sh2->r[ 5]; break;
- case CPUINFO_INT_REGISTER + SH2_R6: info->i = sh2->r[ 6]; break;
- case CPUINFO_INT_REGISTER + SH2_R7: info->i = sh2->r[ 7]; break;
- case CPUINFO_INT_REGISTER + SH2_R8: info->i = sh2->r[ 8]; break;
- case CPUINFO_INT_REGISTER + SH2_R9: info->i = sh2->r[ 9]; break;
- case CPUINFO_INT_REGISTER + SH2_R10: info->i = sh2->r[10]; break;
- case CPUINFO_INT_REGISTER + SH2_R11: info->i = sh2->r[11]; break;
- case CPUINFO_INT_REGISTER + SH2_R12: info->i = sh2->r[12]; break;
- case CPUINFO_INT_REGISTER + SH2_R13: info->i = sh2->r[13]; break;
- case CPUINFO_INT_REGISTER + SH2_R14: info->i = sh2->r[14]; break;
- case CPUINFO_INT_REGISTER + SH2_R15: info->i = sh2->r[15]; break;
- case CPUINFO_INT_REGISTER + SH2_EA: info->i = sh2->ea; break;
+ case CPUINFO_INT_REGISTER + SH2_PC: info->i = (sh2->delay) ? (sh2->delay & AM) : (sh2->pc & AM); break;
+ case CPUINFO_INT_SP: info->i = sh2->r[15]; break;
+ case CPUINFO_INT_REGISTER + SH2_PR: info->i = sh2->pr; break;
+ case CPUINFO_INT_REGISTER + SH2_SR: info->i = sh2->sr; break;
+ case CPUINFO_INT_REGISTER + SH2_GBR: info->i = sh2->gbr; break;
+ case CPUINFO_INT_REGISTER + SH2_VBR: info->i = sh2->vbr; break;
+ case CPUINFO_INT_REGISTER + SH2_MACH: info->i = sh2->mach; break;
+ case CPUINFO_INT_REGISTER + SH2_MACL: info->i = sh2->macl; break;
+ case CPUINFO_INT_REGISTER + SH2_R0: info->i = sh2->r[ 0]; break;
+ case CPUINFO_INT_REGISTER + SH2_R1: info->i = sh2->r[ 1]; break;
+ case CPUINFO_INT_REGISTER + SH2_R2: info->i = sh2->r[ 2]; break;
+ case CPUINFO_INT_REGISTER + SH2_R3: info->i = sh2->r[ 3]; break;
+ case CPUINFO_INT_REGISTER + SH2_R4: info->i = sh2->r[ 4]; break;
+ case CPUINFO_INT_REGISTER + SH2_R5: info->i = sh2->r[ 5]; break;
+ case CPUINFO_INT_REGISTER + SH2_R6: info->i = sh2->r[ 6]; break;
+ case CPUINFO_INT_REGISTER + SH2_R7: info->i = sh2->r[ 7]; break;
+ case CPUINFO_INT_REGISTER + SH2_R8: info->i = sh2->r[ 8]; break;
+ case CPUINFO_INT_REGISTER + SH2_R9: info->i = sh2->r[ 9]; break;
+ case CPUINFO_INT_REGISTER + SH2_R10: info->i = sh2->r[10]; break;
+ case CPUINFO_INT_REGISTER + SH2_R11: info->i = sh2->r[11]; break;
+ case CPUINFO_INT_REGISTER + SH2_R12: info->i = sh2->r[12]; break;
+ case CPUINFO_INT_REGISTER + SH2_R13: info->i = sh2->r[13]; break;
+ case CPUINFO_INT_REGISTER + SH2_R14: info->i = sh2->r[14]; break;
+ case CPUINFO_INT_REGISTER + SH2_R15: info->i = sh2->r[15]; break;
+ case CPUINFO_INT_REGISTER + SH2_EA: info->i = sh2->ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh2); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sh2); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh2); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(sh2); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh2); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh2); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sh2); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh2); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(sh2); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh2); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh2); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh2->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SH-2"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SuperH RISC"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME team, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SH-2"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SuperH RISC"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME team, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%d%c%c",
@@ -3367,30 +3367,30 @@ CPU_GET_INFO( sh2 )
sh2->sr & T ? 'T':'.');
break;
- case CPUINFO_STR_REGISTER + SH2_PC: sprintf(info->s, "PC :%08X", sh2->pc); break;
- case CPUINFO_STR_REGISTER + SH2_SR: sprintf(info->s, "SR :%08X", sh2->sr); break;
- case CPUINFO_STR_REGISTER + SH2_PR: sprintf(info->s, "PR :%08X", sh2->pr); break;
- case CPUINFO_STR_REGISTER + SH2_GBR: sprintf(info->s, "GBR :%08X", sh2->gbr); break;
- case CPUINFO_STR_REGISTER + SH2_VBR: sprintf(info->s, "VBR :%08X", sh2->vbr); break;
- case CPUINFO_STR_REGISTER + SH2_MACH: sprintf(info->s, "MACH:%08X", sh2->mach); break;
- case CPUINFO_STR_REGISTER + SH2_MACL: sprintf(info->s, "MACL:%08X", sh2->macl); break;
- case CPUINFO_STR_REGISTER + SH2_R0: sprintf(info->s, "R0 :%08X", sh2->r[ 0]); break;
- case CPUINFO_STR_REGISTER + SH2_R1: sprintf(info->s, "R1 :%08X", sh2->r[ 1]); break;
- case CPUINFO_STR_REGISTER + SH2_R2: sprintf(info->s, "R2 :%08X", sh2->r[ 2]); break;
- case CPUINFO_STR_REGISTER + SH2_R3: sprintf(info->s, "R3 :%08X", sh2->r[ 3]); break;
- case CPUINFO_STR_REGISTER + SH2_R4: sprintf(info->s, "R4 :%08X", sh2->r[ 4]); break;
- case CPUINFO_STR_REGISTER + SH2_R5: sprintf(info->s, "R5 :%08X", sh2->r[ 5]); break;
- case CPUINFO_STR_REGISTER + SH2_R6: sprintf(info->s, "R6 :%08X", sh2->r[ 6]); break;
- case CPUINFO_STR_REGISTER + SH2_R7: sprintf(info->s, "R7 :%08X", sh2->r[ 7]); break;
- case CPUINFO_STR_REGISTER + SH2_R8: sprintf(info->s, "R8 :%08X", sh2->r[ 8]); break;
- case CPUINFO_STR_REGISTER + SH2_R9: sprintf(info->s, "R9 :%08X", sh2->r[ 9]); break;
- case CPUINFO_STR_REGISTER + SH2_R10: sprintf(info->s, "R10 :%08X", sh2->r[10]); break;
- case CPUINFO_STR_REGISTER + SH2_R11: sprintf(info->s, "R11 :%08X", sh2->r[11]); break;
- case CPUINFO_STR_REGISTER + SH2_R12: sprintf(info->s, "R12 :%08X", sh2->r[12]); break;
- case CPUINFO_STR_REGISTER + SH2_R13: sprintf(info->s, "R13 :%08X", sh2->r[13]); break;
- case CPUINFO_STR_REGISTER + SH2_R14: sprintf(info->s, "R14 :%08X", sh2->r[14]); break;
- case CPUINFO_STR_REGISTER + SH2_R15: sprintf(info->s, "R15 :%08X", sh2->r[15]); break;
- case CPUINFO_STR_REGISTER + SH2_EA: sprintf(info->s, "EA :%08X", sh2->ea); break;
+ case CPUINFO_STR_REGISTER + SH2_PC: sprintf(info->s, "PC :%08X", sh2->pc); break;
+ case CPUINFO_STR_REGISTER + SH2_SR: sprintf(info->s, "SR :%08X", sh2->sr); break;
+ case CPUINFO_STR_REGISTER + SH2_PR: sprintf(info->s, "PR :%08X", sh2->pr); break;
+ case CPUINFO_STR_REGISTER + SH2_GBR: sprintf(info->s, "GBR :%08X", sh2->gbr); break;
+ case CPUINFO_STR_REGISTER + SH2_VBR: sprintf(info->s, "VBR :%08X", sh2->vbr); break;
+ case CPUINFO_STR_REGISTER + SH2_MACH: sprintf(info->s, "MACH:%08X", sh2->mach); break;
+ case CPUINFO_STR_REGISTER + SH2_MACL: sprintf(info->s, "MACL:%08X", sh2->macl); break;
+ case CPUINFO_STR_REGISTER + SH2_R0: sprintf(info->s, "R0 :%08X", sh2->r[ 0]); break;
+ case CPUINFO_STR_REGISTER + SH2_R1: sprintf(info->s, "R1 :%08X", sh2->r[ 1]); break;
+ case CPUINFO_STR_REGISTER + SH2_R2: sprintf(info->s, "R2 :%08X", sh2->r[ 2]); break;
+ case CPUINFO_STR_REGISTER + SH2_R3: sprintf(info->s, "R3 :%08X", sh2->r[ 3]); break;
+ case CPUINFO_STR_REGISTER + SH2_R4: sprintf(info->s, "R4 :%08X", sh2->r[ 4]); break;
+ case CPUINFO_STR_REGISTER + SH2_R5: sprintf(info->s, "R5 :%08X", sh2->r[ 5]); break;
+ case CPUINFO_STR_REGISTER + SH2_R6: sprintf(info->s, "R6 :%08X", sh2->r[ 6]); break;
+ case CPUINFO_STR_REGISTER + SH2_R7: sprintf(info->s, "R7 :%08X", sh2->r[ 7]); break;
+ case CPUINFO_STR_REGISTER + SH2_R8: sprintf(info->s, "R8 :%08X", sh2->r[ 8]); break;
+ case CPUINFO_STR_REGISTER + SH2_R9: sprintf(info->s, "R9 :%08X", sh2->r[ 9]); break;
+ case CPUINFO_STR_REGISTER + SH2_R10: sprintf(info->s, "R10 :%08X", sh2->r[10]); break;
+ case CPUINFO_STR_REGISTER + SH2_R11: sprintf(info->s, "R11 :%08X", sh2->r[11]); break;
+ case CPUINFO_STR_REGISTER + SH2_R12: sprintf(info->s, "R12 :%08X", sh2->r[12]); break;
+ case CPUINFO_STR_REGISTER + SH2_R13: sprintf(info->s, "R13 :%08X", sh2->r[13]); break;
+ case CPUINFO_STR_REGISTER + SH2_R14: sprintf(info->s, "R14 :%08X", sh2->r[14]); break;
+ case CPUINFO_STR_REGISTER + SH2_R15: sprintf(info->s, "R15 :%08X", sh2->r[15]); break;
+ case CPUINFO_STR_REGISTER + SH2_EA: sprintf(info->s, "EA :%08X", sh2->ea); break;
}
}
@@ -3404,16 +3404,16 @@ CPU_GET_INFO( sh1 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh1); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh1); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SH-1"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SH-1"); break;
- default: CPU_GET_INFO_CALL(sh2); break;
+ default: CPU_GET_INFO_CALL(sh2); break;
}
}
DEFINE_LEGACY_CPU_DEVICE(SH1, sh1);
DEFINE_LEGACY_CPU_DEVICE(SH2, sh2);
-#endif // USE_SH2DRC
+#endif // USE_SH2DRC
diff --git a/src/emu/cpu/sh2/sh2fe.c b/src/emu/cpu/sh2/sh2fe.c
index 5cbc7c3f57b..fcd6f2c03b2 100644
--- a/src/emu/cpu/sh2/sh2fe.c
+++ b/src/emu/cpu/sh2/sh2fe.c
@@ -21,7 +21,7 @@
sh2_frontend::sh2_frontend(sh2_state &state, UINT32 window_start, UINT32 window_end, UINT32 max_sequence)
: drc_frontend(*state.device, window_start, window_end, max_sequence),
- m_context(state)
+ m_context(state)
{
}
@@ -46,7 +46,7 @@ bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0:
return describe_group_0(desc, prev, opcode);
- case 1: // MOVLS4
+ case 1: // MOVLS4
desc.regin[0] |= REGFLAG_R(Rn) | REGFLAG_R(Rm);
desc.flags |= OPFLAG_WRITES_MEMORY;
return true;
@@ -60,7 +60,7 @@ bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 4:
return describe_group_4(desc, prev, opcode);
- case 5: // MOVLL4
+ case 5: // MOVLL4
desc.regin[0] |= REGFLAG_R(Rm);
desc.regout[0] |= REGFLAG_R(Rn);
desc.flags |= OPFLAG_READS_MEMORY;
@@ -69,7 +69,7 @@ bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 6:
return describe_group_6(desc, prev, opcode);
- case 7: // ADDI
+ case 7: // ADDI
desc.regin[0] |= REGFLAG_R(Rn);
desc.regout[0] |= REGFLAG_R(Rn);
return true;
@@ -77,15 +77,15 @@ bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 8:
return describe_group_8(desc, prev, opcode);
- case 9: // MOVWI
+ case 9: // MOVWI
desc.regout[0] |= REGFLAG_R(Rn);
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 11: // BSR
+ case 11: // BSR
desc.regout[1] |= REGFLAG_PR;
// (intentional fallthrough - BSR is BRA with the addition of PR = the return address)
- case 10: // BRA
+ case 10: // BRA
{
INT32 disp = ((INT32)opcode << 20) >> 20;
@@ -99,16 +99,16 @@ bool sh2_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 12:
return describe_group_12(desc, prev, opcode);
- case 13: // MOVLI
+ case 13: // MOVLI
desc.regout[0] |= REGFLAG_R(Rn);
desc.flags |= OPFLAG_READS_MEMORY;
return true;
- case 14: // MOVI
+ case 14: // MOVI
desc.regout[0] |= REGFLAG_R(Rn);
return true;
- case 15: // NOP
+ case 15: // NOP
return true;
}
diff --git a/src/emu/cpu/sh4/sh3comn.c b/src/emu/cpu/sh4/sh3comn.c
index f2f3a35b26a..000bd4f4a13 100644
--- a/src/emu/cpu/sh4/sh3comn.c
+++ b/src/emu/cpu/sh4/sh3comn.c
@@ -620,7 +620,7 @@ WRITE32_HANDLER( sh3_internal_w )
{
if (mem_mask & 0xff000000)
{
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSMR2 - Serial Mode Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
+ logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSMR2 - Serial Mode Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
}
if (mem_mask & 0x0000ff00)
@@ -634,7 +634,7 @@ WRITE32_HANDLER( sh3_internal_w )
{
if (mem_mask & 0xff000000)
{
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSCR2 - Serial Control Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
+ logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSCR2 - Serial Control Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
}
if (mem_mask & 0x0000ff00)
@@ -648,7 +648,7 @@ WRITE32_HANDLER( sh3_internal_w )
{
if (mem_mask & 0xffff0000)
{
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSSR2 - Serial Status Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
+ logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSSR2 - Serial Status Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
}
if (mem_mask & 0x0000ff00)
@@ -662,7 +662,7 @@ WRITE32_HANDLER( sh3_internal_w )
{
if (mem_mask & 0xff000000)
{
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFCR2 - Fifo Control Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
+ logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFCR2 - Fifo Control Register 2)\n",sh4->device->tag(), sh4->pc & AM,(offset *4)+0x4000000,data,mem_mask);
}
if (mem_mask & 0x0000ffff)
@@ -694,4 +694,3 @@ WRITE32_HANDLER( sh3_internal_w )
}
}
-
diff --git a/src/emu/cpu/sh4/sh3comn.h b/src/emu/cpu/sh4/sh3comn.h
index 9d35afd9149..b8af0584038 100644
--- a/src/emu/cpu/sh4/sh3comn.h
+++ b/src/emu/cpu/sh4/sh3comn.h
@@ -25,46 +25,46 @@
#define SH3_LOWER_REGBASE (0x04000000)
#define SH3_LOWER_REGEND (0x07ffffff)
-#define INTEVT2 ((0x4000000 - SH3_LOWER_REGBASE)/4)
+#define INTEVT2 ((0x4000000 - SH3_LOWER_REGBASE)/4)
#define IRR0_IRR1 ((0x4000004 - SH3_LOWER_REGBASE)/4)
-#define PINTER_IPRC ((0x4000014 - SH3_LOWER_REGBASE)/4)
-
-#define SH3_SAR0_ADDR ((0x4000020 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR0_ADDR ((0x4000024 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR0_ADDR ((0x4000028 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR0_ADDR ((0x400002c - SH3_LOWER_REGBASE)/4)
-#define SH3_SAR1_ADDR ((0x4000030 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR1_ADDR ((0x4000034 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR1_ADDR ((0x4000038 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR1_ADDR ((0x400003c - SH3_LOWER_REGBASE)/4)
-#define SH3_SAR2_ADDR ((0x4000040 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR2_ADDR ((0x4000044 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR2_ADDR ((0x4000048 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR2_ADDR ((0x400004c - SH3_LOWER_REGBASE)/4)
-#define SH3_SAR3_ADDR ((0x4000050 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR3_ADDR ((0x4000054 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR3_ADDR ((0x4000058 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR3_ADDR ((0x400005c - SH3_LOWER_REGBASE)/4)
-#define SH3_DMAOR_ADDR ((0x4000060 - SH3_LOWER_REGBASE)/4)
-
-
-#define PCCR_PDCR ((0x4000104 - SH3_LOWER_REGBASE)/4)
-#define PECR_PFCR ((0x4000108 - SH3_LOWER_REGBASE)/4)
-#define PGCR_PHCR ((0x400010c - SH3_LOWER_REGBASE)/4)
-#define PJCR_PKCR ((0x4000110 - SH3_LOWER_REGBASE)/4)
-#define PLCR_SCPCR ((0x4000114 - SH3_LOWER_REGBASE)/4)
-
-#define PADR_PBDR ((0x4000120 - SH3_LOWER_REGBASE)/4)
-#define PCDR_PDDR ((0x4000124 - SH3_LOWER_REGBASE)/4)
-#define PEDR_PFDR ((0x4000128 - SH3_LOWER_REGBASE)/4)
-#define PGDR_PHDR ((0x400012c - SH3_LOWER_REGBASE)/4)
-#define PJDR_PKDR ((0x4000130 - SH3_LOWER_REGBASE)/4)
-#define PLDR_SCPDR ((0x4000134 - SH3_LOWER_REGBASE)/4)
-
-#define SCSMR2_SCBRR2 ((0x4000150 - SH3_LOWER_REGBASE)/4)
-#define SCSCR2_SCFTDR2 ((0x4000154 - SH3_LOWER_REGBASE)/4)
-#define SCSSR2_SCFRDR2 ((0x4000158 - SH3_LOWER_REGBASE)/4)
-#define SCFCR2_SCFDR2 ((0x400015c - SH3_LOWER_REGBASE)/4)
+#define PINTER_IPRC ((0x4000014 - SH3_LOWER_REGBASE)/4)
+
+#define SH3_SAR0_ADDR ((0x4000020 - SH3_LOWER_REGBASE)/4)
+#define SH3_DAR0_ADDR ((0x4000024 - SH3_LOWER_REGBASE)/4)
+#define SH3_DMATCR0_ADDR ((0x4000028 - SH3_LOWER_REGBASE)/4)
+#define SH3_CHCR0_ADDR ((0x400002c - SH3_LOWER_REGBASE)/4)
+#define SH3_SAR1_ADDR ((0x4000030 - SH3_LOWER_REGBASE)/4)
+#define SH3_DAR1_ADDR ((0x4000034 - SH3_LOWER_REGBASE)/4)
+#define SH3_DMATCR1_ADDR ((0x4000038 - SH3_LOWER_REGBASE)/4)
+#define SH3_CHCR1_ADDR ((0x400003c - SH3_LOWER_REGBASE)/4)
+#define SH3_SAR2_ADDR ((0x4000040 - SH3_LOWER_REGBASE)/4)
+#define SH3_DAR2_ADDR ((0x4000044 - SH3_LOWER_REGBASE)/4)
+#define SH3_DMATCR2_ADDR ((0x4000048 - SH3_LOWER_REGBASE)/4)
+#define SH3_CHCR2_ADDR ((0x400004c - SH3_LOWER_REGBASE)/4)
+#define SH3_SAR3_ADDR ((0x4000050 - SH3_LOWER_REGBASE)/4)
+#define SH3_DAR3_ADDR ((0x4000054 - SH3_LOWER_REGBASE)/4)
+#define SH3_DMATCR3_ADDR ((0x4000058 - SH3_LOWER_REGBASE)/4)
+#define SH3_CHCR3_ADDR ((0x400005c - SH3_LOWER_REGBASE)/4)
+#define SH3_DMAOR_ADDR ((0x4000060 - SH3_LOWER_REGBASE)/4)
+
+
+#define PCCR_PDCR ((0x4000104 - SH3_LOWER_REGBASE)/4)
+#define PECR_PFCR ((0x4000108 - SH3_LOWER_REGBASE)/4)
+#define PGCR_PHCR ((0x400010c - SH3_LOWER_REGBASE)/4)
+#define PJCR_PKCR ((0x4000110 - SH3_LOWER_REGBASE)/4)
+#define PLCR_SCPCR ((0x4000114 - SH3_LOWER_REGBASE)/4)
+
+#define PADR_PBDR ((0x4000120 - SH3_LOWER_REGBASE)/4)
+#define PCDR_PDDR ((0x4000124 - SH3_LOWER_REGBASE)/4)
+#define PEDR_PFDR ((0x4000128 - SH3_LOWER_REGBASE)/4)
+#define PGDR_PHDR ((0x400012c - SH3_LOWER_REGBASE)/4)
+#define PJDR_PKDR ((0x4000130 - SH3_LOWER_REGBASE)/4)
+#define PLDR_SCPDR ((0x4000134 - SH3_LOWER_REGBASE)/4)
+
+#define SCSMR2_SCBRR2 ((0x4000150 - SH3_LOWER_REGBASE)/4)
+#define SCSCR2_SCFTDR2 ((0x4000154 - SH3_LOWER_REGBASE)/4)
+#define SCSSR2_SCFRDR2 ((0x4000158 - SH3_LOWER_REGBASE)/4)
+#define SCFCR2_SCFDR2 ((0x400015c - SH3_LOWER_REGBASE)/4)
/* SH3 upper area */
@@ -73,23 +73,22 @@
#define SH3_UPPER_REGBASE (0xffffd000)
#define SH3_UPPER_REGEND (0xffffffff)
-#define SH3_ICR0_IPRA_ADDR ((0xfffffee0 - SH3_UPPER_REGBASE)/4)
-#define SH3_IPRB_ADDR ((0xfffffee4 - SH3_UPPER_REGBASE)/4)
-
-#define SH3_TOCR_TSTR_ADDR ((0xfffffe90 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCOR0_ADDR ((0xfffffe94 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCNT0_ADDR ((0xfffffe98 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCR0_ADDR ((0xfffffe9c - SH3_UPPER_REGBASE)/4)
-#define SH3_TCOR1_ADDR ((0xfffffea0 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCNT1_ADDR ((0xfffffea4 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCR1_ADDR ((0xfffffea8 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCOR2_ADDR ((0xfffffeac - SH3_UPPER_REGBASE)/4)
-#define SH3_TCNT2_ADDR ((0xfffffeb0 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCR2_ADDR ((0xfffffeb4 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCPR2_ADDR ((0xfffffeb8 - SH3_UPPER_REGBASE)/4)
-#define SH3_TRA_ADDR ((0xffffffd0 - SH3_UPPER_REGBASE)/4)
-#define SH3_EXPEVT_ADDR ((0xffffffd4 - SH3_UPPER_REGBASE)/4)
-#define SH3_INTEVT_ADDR ((0xffffffd8 - SH3_UPPER_REGBASE)/4)
+#define SH3_ICR0_IPRA_ADDR ((0xfffffee0 - SH3_UPPER_REGBASE)/4)
+#define SH3_IPRB_ADDR ((0xfffffee4 - SH3_UPPER_REGBASE)/4)
+
+#define SH3_TOCR_TSTR_ADDR ((0xfffffe90 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCOR0_ADDR ((0xfffffe94 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCNT0_ADDR ((0xfffffe98 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCR0_ADDR ((0xfffffe9c - SH3_UPPER_REGBASE)/4)
+#define SH3_TCOR1_ADDR ((0xfffffea0 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCNT1_ADDR ((0xfffffea4 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCR1_ADDR ((0xfffffea8 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCOR2_ADDR ((0xfffffeac - SH3_UPPER_REGBASE)/4)
+#define SH3_TCNT2_ADDR ((0xfffffeb0 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCR2_ADDR ((0xfffffeb4 - SH3_UPPER_REGBASE)/4)
+#define SH3_TCPR2_ADDR ((0xfffffeb8 - SH3_UPPER_REGBASE)/4)
+#define SH3_TRA_ADDR ((0xffffffd0 - SH3_UPPER_REGBASE)/4)
+#define SH3_EXPEVT_ADDR ((0xffffffd4 - SH3_UPPER_REGBASE)/4)
+#define SH3_INTEVT_ADDR ((0xffffffd8 - SH3_UPPER_REGBASE)/4)
#endif /* __SH3COMN_H__ */
-
diff --git a/src/emu/cpu/sh4/sh4.c b/src/emu/cpu/sh4/sh4.c
index f6110aeb807..4d2cba47285 100644
--- a/src/emu/cpu/sh4/sh4.c
+++ b/src/emu/cpu/sh4/sh4.c
@@ -329,10 +329,10 @@ const void BRA(sh4_state *sh4, const UINT16 opcode)
{
UINT32 next_opcode = RW(sh4,sh4->ppc & AM);
/* BRA $
- * NOP
- */
+ * NOP
+ */
if (next_opcode == 0x0009)
- sh4->sh4_icount %= 3; /* cycles for BRA $ and NOP taken (3) */
+ sh4->sh4_icount %= 3; /* cycles for BRA $ and NOP taken (3) */
}
#endif
sh4->delay = sh4->pc;
@@ -516,18 +516,18 @@ const void CMPPZ(sh4_state *sh4, const UINT16 opcode)
*/
const void CMPSTR(sh4_state *sh4, const UINT16 opcode)
{
- UINT32 temp;
- INT32 HH, HL, LH, LL;
- temp = sh4->r[Rn] ^ sh4->r[Rm];
- HH = (temp >> 24) & 0xff;
- HL = (temp >> 16) & 0xff;
- LH = (temp >> 8) & 0xff;
- LL = temp & 0xff;
- if (HH && HL && LH && LL)
- sh4->sr &= ~T;
- else
- sh4->sr |= T;
- }
+ UINT32 temp;
+ INT32 HH, HL, LH, LL;
+ temp = sh4->r[Rn] ^ sh4->r[Rm];
+ HH = (temp >> 24) & 0xff;
+ HL = (temp >> 16) & 0xff;
+ LH = (temp >> 8) & 0xff;
+ LL = temp & 0xff;
+ if (HH && HL && LH && LL)
+ sh4->sr &= ~T;
+ else
+ sh4->sr |= T;
+ }
/* code cycles t-bit
@@ -767,14 +767,14 @@ const void DT(sh4_state *sh4, const UINT16 opcode)
{
UINT32 next_opcode = RW(sh4,sh4->ppc & AM);
/* DT Rn
- * BF $-2
- */
+ * BF $-2
+ */
if (next_opcode == 0x8bfd)
{
while (sh4->r[n] > 1 && sh4->sh4_icount > 4)
{
sh4->r[n]--;
- sh4->sh4_icount -= 4; /* cycles for DT (1) and BF taken (3) */
+ sh4->sh4_icount -= 4; /* cycles for DT (1) and BF taken (3) */
}
}
}
@@ -2485,13 +2485,13 @@ const void FLDI0(sh4_state *sh4, const UINT16 opcode)
}
/* FLDS FRm,FPUL 1111mmmm00011101 */
-const void FLDS(sh4_state *sh4, const UINT16 opcode)
+const void FLDS(sh4_state *sh4, const UINT16 opcode)
{
sh4->fpul = sh4->fr[Rn];
}
/* FSTS FPUL,FRn 1111nnnn00001101 */
-const void FSTS(sh4_state *sh4, const UINT16 opcode)
+const void FSTS(sh4_state *sh4, const UINT16 opcode)
{
sh4->fr[Rn] = sh4->fpul;
}
@@ -2818,7 +2818,7 @@ const void dbreak(sh4_state *sh4, const UINT16 opcode)
sh4ophandler op1111_0x13_handlers[] =
{
- FSTS, FLDS, FLOAT, FTRC, FNEG, FABS, FSQRT, FSRRA, FLDI0, FLDI1, FCNVSD, FCNVDS, dbreak, dbreak, FIPR, op1111_0xf13
+ FSTS, FLDS, FLOAT, FTRC, FNEG, FABS, FSQRT, FSRRA, FLDI0, FLDI1, FCNVSD, FCNVDS, dbreak, dbreak, FIPR, op1111_0xf13
};
const void op1111_0x13(sh4_state *sh4, UINT16 opcode)
@@ -2838,7 +2838,7 @@ static CPU_RESET( common_sh4_reset )
emu_timer *tsave[5];
UINT32 *m;
int save_is_slave;
- int savecpu_clock, savebus_clock, savepm_clock;
+ int savecpu_clock, savebus_clock, savepm_clock;
void (*f)(UINT32 data);
device_irq_acknowledge_callback save_irqcallback;
@@ -2950,73 +2950,73 @@ static CPU_RESET( sh4 )
sh4ophandler op1000_handler[] =
{
- MOVBS4, MOVWS4, NOP, NOP, MOVBL4, MOVWL4, NOP, NOP, CMPIM, BT, NOP, BF, NOP, BTS, NOP, BFS
+ MOVBS4, MOVWS4, NOP, NOP, MOVBL4, MOVWL4, NOP, NOP, CMPIM, BT, NOP, BF, NOP, BTS, NOP, BFS
};
sh4ophandler op1100_handler[] =
{
- MOVBSG, MOVWSG, MOVLSG, TRAPA, MOVBLG, MOVWLG, MOVLLG, MOVA, TSTI, ANDI, XORI, ORI, TSTM, ANDM, XORM, ORM
+ MOVBSG, MOVWSG, MOVLSG, TRAPA, MOVBLG, MOVWLG, MOVLLG, MOVA, TSTI, ANDI, XORI, ORI, TSTM, ANDM, XORM, ORM
};
sh4ophandler op0000_handlers[] =
{
- NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
- NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
- STCSR, STCGBR, STCVBR, STCSSR, STCSPC, NOP, NOP, NOP, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK,
- BSRF, NOP, BRAF, NOP, NOP, NOP, NOP, NOP, PREFM, TODO, TODO, TODO, MOVCAL, NOP, NOP, NOP,
- MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0,
- MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0,
- MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0,
- MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL,
- CLRT, SETT, CLRMAC, TODO, CLRS, SETS, NOP, NOP, CLRT, SETT, CLRMAC, TODO, CLRS, SETS, NOP, NOP,
- NOP, DIV0U, MOVT, NOP, NOP, DIV0U, MOVT, NOP, NOP, DIV0U, MOVT, NOP, NOP, DIV0U, MOVT, NOP,
- STSMACH, STSMACL, STSPR, STCSGR, NOP, STSFPUL, STSFPSCR, STCDBR, STSMACH, STSMACL, STSPR, STCSGR, NOP, STSFPUL, STSFPSCR, STCDBR,
- RTS, SLEEP, RTE, NOP, RTS, SLEEP, RTE, NOP, RTS, SLEEP, RTE, NOP, RTS, SLEEP, RTE, NOP,
- MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0,
- MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0,
- MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0,
- MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L,
+ NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
+ NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP,
+ STCSR, STCGBR, STCVBR, STCSSR, STCSPC, NOP, NOP, NOP, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK, STCRBANK,
+ BSRF, NOP, BRAF, NOP, NOP, NOP, NOP, NOP, PREFM, TODO, TODO, TODO, MOVCAL, NOP, NOP, NOP,
+ MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0, MOVBS0,
+ MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0, MOVWS0,
+ MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0, MOVLS0,
+ MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL, MULL,
+ CLRT, SETT, CLRMAC, TODO, CLRS, SETS, NOP, NOP, CLRT, SETT, CLRMAC, TODO, CLRS, SETS, NOP, NOP,
+ NOP, DIV0U, MOVT, NOP, NOP, DIV0U, MOVT, NOP, NOP, DIV0U, MOVT, NOP, NOP, DIV0U, MOVT, NOP,
+ STSMACH, STSMACL, STSPR, STCSGR, NOP, STSFPUL, STSFPSCR, STCDBR, STSMACH, STSMACL, STSPR, STCSGR, NOP, STSFPUL, STSFPSCR, STCDBR,
+ RTS, SLEEP, RTE, NOP, RTS, SLEEP, RTE, NOP, RTS, SLEEP, RTE, NOP, RTS, SLEEP, RTE, NOP,
+ MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0, MOVBL0,
+ MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0, MOVWL0,
+ MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0, MOVLL0,
+ MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L, MAC_L,
};
sh4ophandler op0100_handlers[] =
{
- SHLL, DT, SHAL, NOP, SHLL, DT, SHAL, NOP, SHLL, DT, SHAL, NOP, SHLL, DT, SHAL, NOP,
- SHLR, CMPPZ, SHAR, NOP, SHLR, CMPPZ, SHAR, NOP, SHLR, CMPPZ, SHAR, NOP, SHLR, CMPPZ, SHAR, NOP,
- STSMMACH, STSMMACL, STSMPR, STCMSGR, NOP, STSMFPUL, STSMFPSCR, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, STCMDBR,
- STCMSR, STCMGBR, STCMVBR, STCMSSR, STCMSPC, NOP, NOP, NOP, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK,
- ROTL, NOP, ROTCL, NOP, ROTL, NOP, ROTCL, NOP, ROTL, NOP, ROTCL, NOP, ROTL, NOP, ROTCL, NOP,
- ROTR, CMPPL, ROTCR, NOP, ROTR, CMPPL, ROTCR, NOP, ROTR, CMPPL, ROTCR, NOP, ROTR, CMPPL, ROTCR, NOP,
- LDSMMACH, LDSMMACL, LDSMPR, NOP, NOP, LDSMFPUL, LDSMFPSCR, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, LDCMDBR,
- LDCMSR, LDCMGBR, LDCMVBR, LDCMSSR, LDCMSPC, NOP, NOP, NOP, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK,
- SHLL2, SHLL8, SHLL16, NOP, SHLL2, SHLL8, SHLL16, NOP, SHLL2, SHLL8, SHLL16, NOP, SHLL2, SHLL8, SHLL16, NOP,
- SHLR2, SHLR8, SHLR16, NOP, SHLR2, SHLR8, SHLR16, NOP, SHLR2, SHLR8, SHLR16, NOP, SHLR2, SHLR8, SHLR16, NOP,
- LDSMACH, LDSMACL, LDSPR, NOP, NOP, LDSFPUL, LDSFPSCR, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, LDCDBR,
- JSR, TAS, JMP, NOP, JSR, TAS, JMP, NOP, JSR, TAS, JMP, NOP, JSR, TAS, JMP, NOP,
- SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD,
- SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD,
- LDCSR, LDCGBR, LDCVBR, LDCSSR, LDCSPC, NOP, NOP, NOP, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK,
- MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W,
+ SHLL, DT, SHAL, NOP, SHLL, DT, SHAL, NOP, SHLL, DT, SHAL, NOP, SHLL, DT, SHAL, NOP,
+ SHLR, CMPPZ, SHAR, NOP, SHLR, CMPPZ, SHAR, NOP, SHLR, CMPPZ, SHAR, NOP, SHLR, CMPPZ, SHAR, NOP,
+ STSMMACH, STSMMACL, STSMPR, STCMSGR, NOP, STSMFPUL, STSMFPSCR, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, STCMDBR,
+ STCMSR, STCMGBR, STCMVBR, STCMSSR, STCMSPC, NOP, NOP, NOP, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK, STCMRBANK,
+ ROTL, NOP, ROTCL, NOP, ROTL, NOP, ROTCL, NOP, ROTL, NOP, ROTCL, NOP, ROTL, NOP, ROTCL, NOP,
+ ROTR, CMPPL, ROTCR, NOP, ROTR, CMPPL, ROTCR, NOP, ROTR, CMPPL, ROTCR, NOP, ROTR, CMPPL, ROTCR, NOP,
+ LDSMMACH, LDSMMACL, LDSMPR, NOP, NOP, LDSMFPUL, LDSMFPSCR, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, LDCMDBR,
+ LDCMSR, LDCMGBR, LDCMVBR, LDCMSSR, LDCMSPC, NOP, NOP, NOP, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK, LDCMRBANK,
+ SHLL2, SHLL8, SHLL16, NOP, SHLL2, SHLL8, SHLL16, NOP, SHLL2, SHLL8, SHLL16, NOP, SHLL2, SHLL8, SHLL16, NOP,
+ SHLR2, SHLR8, SHLR16, NOP, SHLR2, SHLR8, SHLR16, NOP, SHLR2, SHLR8, SHLR16, NOP, SHLR2, SHLR8, SHLR16, NOP,
+ LDSMACH, LDSMACL, LDSPR, NOP, NOP, LDSFPUL, LDSFPSCR, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, LDCDBR,
+ JSR, TAS, JMP, NOP, JSR, TAS, JMP, NOP, JSR, TAS, JMP, NOP, JSR, TAS, JMP, NOP,
+ SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD, SHAD,
+ SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD, SHLD,
+ LDCSR, LDCGBR, LDCVBR, LDCSSR, LDCSPC, NOP, NOP, NOP, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK, LDCRBANK,
+ MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W, MAC_W,
};
sh4ophandler upper4bits[] =
{
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0x0000 - uses op0000_handlers*/
- MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, /* j = 0x1000 */
- MOVBS, MOVWS, MOVLS, NOP, MOVBM, MOVWM, MOVLM, DIV0S, TST, AND, XOR, OR, CMPSTR, XTRCT, MULU, MULS, /* j = 0x2000 */
- CMPEQ, NOP, CMPHS, CMPGE, DIV1, DMULU, CMPHI, CMPGT, SUB, NOP, SUBC, SUBV, ADD, DMULS, ADDC, ADDV, /* j = 0x3000 */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0x4000 - uses op0100_handlers*/
- MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, /* j = 0x5000 */
- MOVBL, MOVWL, MOVLL, MOV, MOVBP, MOVWP, MOVLP, NOT, SWAPB, SWAPW, NEGC, NEG, EXTUB, EXTUW, EXTSB, EXTSW, /* j = 0x6000 */
- ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, /* j = 0x7000 */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0x8000 - uses op1000_handlers */
- MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, /* j = 0x9000 */
- BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, /* j = 0xa000 */
- BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, /* j = 0xb000 */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0xc000 - uses op1100_handlers */
- MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, /* j = 0xd000 */
- MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, /* j = 0xe000 */
- FADD, FSUB, FMUL, FDIV, FCMP_EQ, FCMP_GT, FMOVS0FR, FMOVFRS0, FMOVMRFR, FMOVMRIFR, FMOVFRMR, FMOVFRMDR, FMOVFR, op1111_0x13,FMAC, dbreak /* j = 0xf000 */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0x0000 - uses op0000_handlers*/
+ MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, MOVLS4, /* j = 0x1000 */
+ MOVBS, MOVWS, MOVLS, NOP, MOVBM, MOVWM, MOVLM, DIV0S, TST, AND, XOR, OR, CMPSTR, XTRCT, MULU, MULS, /* j = 0x2000 */
+ CMPEQ, NOP, CMPHS, CMPGE, DIV1, DMULU, CMPHI, CMPGT, SUB, NOP, SUBC, SUBV, ADD, DMULS, ADDC, ADDV, /* j = 0x3000 */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0x4000 - uses op0100_handlers*/
+ MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, MOVLL4, /* j = 0x5000 */
+ MOVBL, MOVWL, MOVLL, MOV, MOVBP, MOVWP, MOVLP, NOT, SWAPB, SWAPW, NEGC, NEG, EXTUB, EXTUW, EXTSB, EXTSW, /* j = 0x6000 */
+ ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, ADDI, /* j = 0x7000 */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0x8000 - uses op1000_handlers */
+ MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, MOVWI, /* j = 0x9000 */
+ BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, BRA, /* j = 0xa000 */
+ BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, BSR, /* j = 0xb000 */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* j = 0xc000 - uses op1100_handlers */
+ MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, MOVLI, /* j = 0xd000 */
+ MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, MOVI, /* j = 0xe000 */
+ FADD, FSUB, FMUL, FDIV, FCMP_EQ, FCMP_GT, FMOVS0FR, FMOVFRS0, FMOVMRFR, FMOVMRIFR, FMOVFRMR, FMOVFRMDR, FMOVFR, op1111_0x13,FMAC, dbreak /* j = 0xf000 */
};
void sh4_build_optable(sh4_state *sh4)
@@ -3320,131 +3320,131 @@ static CPU_SET_INFO( sh4 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + SH4_IRL0: sh4_set_irq_line(sh4, SH4_IRL0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRL1: sh4_set_irq_line(sh4, SH4_IRL1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRL2: sh4_set_irq_line(sh4, SH4_IRL2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRL3: sh4_set_irq_line(sh4, SH4_IRL3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRLn: sh4_set_irq_line(sh4, SH4_IRLn, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: sh4_set_irq_line(sh4, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL0: sh4_set_irq_line(sh4, SH4_IRL0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL1: sh4_set_irq_line(sh4, SH4_IRL1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL2: sh4_set_irq_line(sh4, SH4_IRL2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL3: sh4_set_irq_line(sh4, SH4_IRL3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRLn: sh4_set_irq_line(sh4, SH4_IRLn, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: sh4_set_irq_line(sh4, INPUT_LINE_NMI, info->i); break;
case CPUINFO_INT_REGISTER + SH4_PC:
- case CPUINFO_INT_PC: sh4->pc = info->i; sh4->delay = 0; break;
- case CPUINFO_INT_SP: sh4->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_PR: sh4->pr = info->i; break;
+ case CPUINFO_INT_PC: sh4->pc = info->i; sh4->delay = 0; break;
+ case CPUINFO_INT_SP: sh4->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_PR: sh4->pr = info->i; break;
case CPUINFO_INT_REGISTER + SH4_SR:
sh4->sr = info->i;
sh4_exception_recompute(sh4);
sh4_check_pending_irq(sh4, "sh4_set_info");
break;
- case CPUINFO_INT_REGISTER + SH4_GBR: sh4->gbr = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_VBR: sh4->vbr = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_DBR: sh4->dbr = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_MACH: sh4->mach = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_MACL: sh4->macl = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R0: sh4->r[ 0] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R1: sh4->r[ 1] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R2: sh4->r[ 2] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R3: sh4->r[ 3] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R4: sh4->r[ 4] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R5: sh4->r[ 5] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R6: sh4->r[ 6] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R7: sh4->r[ 7] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R8: sh4->r[ 8] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R9: sh4->r[ 9] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R10: sh4->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R11: sh4->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R12: sh4->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R13: sh4->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R14: sh4->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_R15: sh4->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SH4_EA: sh4->ea = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R0_BK0: sh4->rbnk[0][0] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R1_BK0: sh4->rbnk[0][1] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R2_BK0: sh4->rbnk[0][2] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R3_BK0: sh4->rbnk[0][3] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R4_BK0: sh4->rbnk[0][4] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R5_BK0: sh4->rbnk[0][5] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R6_BK0: sh4->rbnk[0][6] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R7_BK0: sh4->rbnk[0][7] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R0_BK1: sh4->rbnk[1][0] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R1_BK1: sh4->rbnk[1][1] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R2_BK1: sh4->rbnk[1][2] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R3_BK1: sh4->rbnk[1][3] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R4_BK1: sh4->rbnk[1][4] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R5_BK1: sh4->rbnk[1][5] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R6_BK1: sh4->rbnk[1][6] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_R7_BK1: sh4->rbnk[1][7] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_SPC: sh4->spc = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_SSR: sh4->ssr = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_SGR: sh4->sgr = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FPSCR: sh4->fpscr = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FPUL: sh4->fpul = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_GBR: sh4->gbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_VBR: sh4->vbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_DBR: sh4->dbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_MACH: sh4->mach = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_MACL: sh4->macl = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R0: sh4->r[ 0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R1: sh4->r[ 1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R2: sh4->r[ 2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R3: sh4->r[ 3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R4: sh4->r[ 4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R5: sh4->r[ 5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R6: sh4->r[ 6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R7: sh4->r[ 7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R8: sh4->r[ 8] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R9: sh4->r[ 9] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R10: sh4->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R11: sh4->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R12: sh4->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R13: sh4->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R14: sh4->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_R15: sh4->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SH4_EA: sh4->ea = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R0_BK0: sh4->rbnk[0][0] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R1_BK0: sh4->rbnk[0][1] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R2_BK0: sh4->rbnk[0][2] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R3_BK0: sh4->rbnk[0][3] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R4_BK0: sh4->rbnk[0][4] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R5_BK0: sh4->rbnk[0][5] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R6_BK0: sh4->rbnk[0][6] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R7_BK0: sh4->rbnk[0][7] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R0_BK1: sh4->rbnk[1][0] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R1_BK1: sh4->rbnk[1][1] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R2_BK1: sh4->rbnk[1][2] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R3_BK1: sh4->rbnk[1][3] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R4_BK1: sh4->rbnk[1][4] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R5_BK1: sh4->rbnk[1][5] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R6_BK1: sh4->rbnk[1][6] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_R7_BK1: sh4->rbnk[1][7] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_SPC: sh4->spc = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_SSR: sh4->ssr = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_SGR: sh4->sgr = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FPSCR: sh4->fpscr = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FPUL: sh4->fpul = info->i; break;
#ifdef LSB_FIRST
- case CPUINFO_STR_REGISTER + SH4_FR0: sh4->fr[ 0 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR1: sh4->fr[ 1 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR2: sh4->fr[ 2 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR3: sh4->fr[ 3 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR4: sh4->fr[ 4 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR5: sh4->fr[ 5 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR6: sh4->fr[ 6 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR7: sh4->fr[ 7 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR8: sh4->fr[ 8 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR9: sh4->fr[ 9 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR10: sh4->fr[10 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR11: sh4->fr[11 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR12: sh4->fr[12 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR13: sh4->fr[13 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR14: sh4->fr[14 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR15: sh4->fr[15 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF0: sh4->xf[ 0 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF1: sh4->xf[ 1 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF2: sh4->xf[ 2 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF3: sh4->xf[ 3 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF4: sh4->xf[ 4 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF5: sh4->xf[ 5 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF6: sh4->xf[ 6 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF7: sh4->xf[ 7 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF8: sh4->xf[ 8 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF9: sh4->xf[ 9 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF10: sh4->xf[10 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF11: sh4->xf[11 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF12: sh4->xf[12 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF13: sh4->xf[13 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF14: sh4->xf[14 ^ sh4->fpu_pr] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF15: sh4->xf[15 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR0: sh4->fr[ 0 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR1: sh4->fr[ 1 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR2: sh4->fr[ 2 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR3: sh4->fr[ 3 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR4: sh4->fr[ 4 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR5: sh4->fr[ 5 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR6: sh4->fr[ 6 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR7: sh4->fr[ 7 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR8: sh4->fr[ 8 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR9: sh4->fr[ 9 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR10: sh4->fr[10 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR11: sh4->fr[11 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR12: sh4->fr[12 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR13: sh4->fr[13 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR14: sh4->fr[14 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR15: sh4->fr[15 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF0: sh4->xf[ 0 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF1: sh4->xf[ 1 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF2: sh4->xf[ 2 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF3: sh4->xf[ 3 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF4: sh4->xf[ 4 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF5: sh4->xf[ 5 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF6: sh4->xf[ 6 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF7: sh4->xf[ 7 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF8: sh4->xf[ 8 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF9: sh4->xf[ 9 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF10: sh4->xf[10 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF11: sh4->xf[11 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF12: sh4->xf[12 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF13: sh4->xf[13 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF14: sh4->xf[14 ^ sh4->fpu_pr] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF15: sh4->xf[15 ^ sh4->fpu_pr] = info->i; break;
#else
- case CPUINFO_STR_REGISTER + SH4_FR0: sh4->fr[ 0] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR1: sh4->fr[ 1] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR2: sh4->fr[ 2] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR3: sh4->fr[ 3] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR4: sh4->fr[ 4] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR5: sh4->fr[ 5] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR6: sh4->fr[ 6] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR7: sh4->fr[ 7] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR8: sh4->fr[ 8] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR9: sh4->fr[ 9] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR10: sh4->fr[10] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR11: sh4->fr[11] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR12: sh4->fr[12] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR13: sh4->fr[13] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR14: sh4->fr[14] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_FR15: sh4->fr[15] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF0: sh4->xf[ 0] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF1: sh4->xf[ 1] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF2: sh4->xf[ 2] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF3: sh4->xf[ 3] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF4: sh4->xf[ 4] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF5: sh4->xf[ 5] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF6: sh4->xf[ 6] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF7: sh4->xf[ 7] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF8: sh4->xf[ 8] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF9: sh4->xf[ 9] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF10: sh4->xf[10] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF11: sh4->xf[11] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF12: sh4->xf[12] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF13: sh4->xf[13] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF14: sh4->xf[14] = info->i; break;
- case CPUINFO_STR_REGISTER + SH4_XF15: sh4->xf[15] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR0: sh4->fr[ 0] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR1: sh4->fr[ 1] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR2: sh4->fr[ 2] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR3: sh4->fr[ 3] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR4: sh4->fr[ 4] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR5: sh4->fr[ 5] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR6: sh4->fr[ 6] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR7: sh4->fr[ 7] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR8: sh4->fr[ 8] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR9: sh4->fr[ 9] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR10: sh4->fr[10] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR11: sh4->fr[11] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR12: sh4->fr[12] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR13: sh4->fr[13] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR14: sh4->fr[14] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_FR15: sh4->fr[15] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF0: sh4->xf[ 0] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF1: sh4->xf[ 1] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF2: sh4->xf[ 2] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF3: sh4->xf[ 3] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF4: sh4->xf[ 4] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF5: sh4->xf[ 5] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF6: sh4->xf[ 6] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF7: sh4->xf[ 7] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF8: sh4->xf[ 8] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF9: sh4->xf[ 9] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF10: sh4->xf[10] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF11: sh4->xf[11] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF12: sh4->xf[12] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF13: sh4->xf[13] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF14: sh4->xf[14] = info->i; break;
+ case CPUINFO_STR_REGISTER + SH4_XF15: sh4->xf[15] = info->i; break;
#endif
}
}
@@ -3491,80 +3491,80 @@ CPU_GET_INFO( sh4 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sh4_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sh4_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 5; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(sh4_internal_map); break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRL0: info->i = sh4->irq_line_state[SH4_IRL0]; break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRL1: info->i = sh4->irq_line_state[SH4_IRL1]; break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRL2: info->i = sh4->irq_line_state[SH4_IRL2]; break;
- case CPUINFO_INT_INPUT_STATE + SH4_IRL3: info->i = sh4->irq_line_state[SH4_IRL3]; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = sh4->nmi_line_state; break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL0: info->i = sh4->irq_line_state[SH4_IRL0]; break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL1: info->i = sh4->irq_line_state[SH4_IRL1]; break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL2: info->i = sh4->irq_line_state[SH4_IRL2]; break;
+ case CPUINFO_INT_INPUT_STATE + SH4_IRL3: info->i = sh4->irq_line_state[SH4_IRL3]; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = sh4->nmi_line_state; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = sh4->ppc; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = sh4->ppc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SH4_PC: info->i = (sh4->delay) ? (sh4->delay & AM) : (sh4->pc & AM); break;
- case CPUINFO_INT_SP: info->i = sh4->r[15]; break;
- case CPUINFO_INT_REGISTER + SH4_PR: info->i = sh4->pr; break;
- case CPUINFO_INT_REGISTER + SH4_SR: info->i = sh4->sr; break;
- case CPUINFO_INT_REGISTER + SH4_GBR: info->i = sh4->gbr; break;
- case CPUINFO_INT_REGISTER + SH4_VBR: info->i = sh4->vbr; break;
- case CPUINFO_INT_REGISTER + SH4_DBR: info->i = sh4->dbr; break;
- case CPUINFO_INT_REGISTER + SH4_MACH: info->i = sh4->mach; break;
- case CPUINFO_INT_REGISTER + SH4_MACL: info->i = sh4->macl; break;
- case CPUINFO_INT_REGISTER + SH4_R0: info->i = sh4->r[ 0]; break;
- case CPUINFO_INT_REGISTER + SH4_R1: info->i = sh4->r[ 1]; break;
- case CPUINFO_INT_REGISTER + SH4_R2: info->i = sh4->r[ 2]; break;
- case CPUINFO_INT_REGISTER + SH4_R3: info->i = sh4->r[ 3]; break;
- case CPUINFO_INT_REGISTER + SH4_R4: info->i = sh4->r[ 4]; break;
- case CPUINFO_INT_REGISTER + SH4_R5: info->i = sh4->r[ 5]; break;
- case CPUINFO_INT_REGISTER + SH4_R6: info->i = sh4->r[ 6]; break;
- case CPUINFO_INT_REGISTER + SH4_R7: info->i = sh4->r[ 7]; break;
- case CPUINFO_INT_REGISTER + SH4_R8: info->i = sh4->r[ 8]; break;
- case CPUINFO_INT_REGISTER + SH4_R9: info->i = sh4->r[ 9]; break;
- case CPUINFO_INT_REGISTER + SH4_R10: info->i = sh4->r[10]; break;
- case CPUINFO_INT_REGISTER + SH4_R11: info->i = sh4->r[11]; break;
- case CPUINFO_INT_REGISTER + SH4_R12: info->i = sh4->r[12]; break;
- case CPUINFO_INT_REGISTER + SH4_R13: info->i = sh4->r[13]; break;
- case CPUINFO_INT_REGISTER + SH4_R14: info->i = sh4->r[14]; break;
- case CPUINFO_INT_REGISTER + SH4_R15: info->i = sh4->r[15]; break;
- case CPUINFO_INT_REGISTER + SH4_EA: info->i = sh4->ea; break;
+ case CPUINFO_INT_REGISTER + SH4_PC: info->i = (sh4->delay) ? (sh4->delay & AM) : (sh4->pc & AM); break;
+ case CPUINFO_INT_SP: info->i = sh4->r[15]; break;
+ case CPUINFO_INT_REGISTER + SH4_PR: info->i = sh4->pr; break;
+ case CPUINFO_INT_REGISTER + SH4_SR: info->i = sh4->sr; break;
+ case CPUINFO_INT_REGISTER + SH4_GBR: info->i = sh4->gbr; break;
+ case CPUINFO_INT_REGISTER + SH4_VBR: info->i = sh4->vbr; break;
+ case CPUINFO_INT_REGISTER + SH4_DBR: info->i = sh4->dbr; break;
+ case CPUINFO_INT_REGISTER + SH4_MACH: info->i = sh4->mach; break;
+ case CPUINFO_INT_REGISTER + SH4_MACL: info->i = sh4->macl; break;
+ case CPUINFO_INT_REGISTER + SH4_R0: info->i = sh4->r[ 0]; break;
+ case CPUINFO_INT_REGISTER + SH4_R1: info->i = sh4->r[ 1]; break;
+ case CPUINFO_INT_REGISTER + SH4_R2: info->i = sh4->r[ 2]; break;
+ case CPUINFO_INT_REGISTER + SH4_R3: info->i = sh4->r[ 3]; break;
+ case CPUINFO_INT_REGISTER + SH4_R4: info->i = sh4->r[ 4]; break;
+ case CPUINFO_INT_REGISTER + SH4_R5: info->i = sh4->r[ 5]; break;
+ case CPUINFO_INT_REGISTER + SH4_R6: info->i = sh4->r[ 6]; break;
+ case CPUINFO_INT_REGISTER + SH4_R7: info->i = sh4->r[ 7]; break;
+ case CPUINFO_INT_REGISTER + SH4_R8: info->i = sh4->r[ 8]; break;
+ case CPUINFO_INT_REGISTER + SH4_R9: info->i = sh4->r[ 9]; break;
+ case CPUINFO_INT_REGISTER + SH4_R10: info->i = sh4->r[10]; break;
+ case CPUINFO_INT_REGISTER + SH4_R11: info->i = sh4->r[11]; break;
+ case CPUINFO_INT_REGISTER + SH4_R12: info->i = sh4->r[12]; break;
+ case CPUINFO_INT_REGISTER + SH4_R13: info->i = sh4->r[13]; break;
+ case CPUINFO_INT_REGISTER + SH4_R14: info->i = sh4->r[14]; break;
+ case CPUINFO_INT_REGISTER + SH4_R15: info->i = sh4->r[15]; break;
+ case CPUINFO_INT_REGISTER + SH4_EA: info->i = sh4->ea; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh4); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sh4); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh4); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh4); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh4->sh4_icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sh4); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sh4); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh4); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh4); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &sh4->sh4_icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SH-4"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7750"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright R. Belmont"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SH-4"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7750"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright R. Belmont"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%s%s%s%s%c%c%d%c%c",
@@ -3579,118 +3579,118 @@ CPU_GET_INFO( sh4 )
sh4->sr & T ? 'T':'.');
break;
- case CPUINFO_STR_REGISTER + SH4_PC: sprintf(info->s, "PC :%08X", sh4->pc); break;
- case CPUINFO_STR_REGISTER + SH4_SR: sprintf(info->s, "SR :%08X", sh4->sr); break;
- case CPUINFO_STR_REGISTER + SH4_PR: sprintf(info->s, "PR :%08X", sh4->pr); break;
- case CPUINFO_STR_REGISTER + SH4_GBR: sprintf(info->s, "GBR :%08X", sh4->gbr); break;
- case CPUINFO_STR_REGISTER + SH4_VBR: sprintf(info->s, "VBR :%08X", sh4->vbr); break;
- case CPUINFO_STR_REGISTER + SH4_DBR: sprintf(info->s, "DBR :%08X", sh4->dbr); break;
- case CPUINFO_STR_REGISTER + SH4_MACH: sprintf(info->s, "MACH:%08X", sh4->mach); break;
- case CPUINFO_STR_REGISTER + SH4_MACL: sprintf(info->s, "MACL:%08X", sh4->macl); break;
- case CPUINFO_STR_REGISTER + SH4_R0: sprintf(info->s, "R0 :%08X", sh4->r[ 0]); break;
- case CPUINFO_STR_REGISTER + SH4_R1: sprintf(info->s, "R1 :%08X", sh4->r[ 1]); break;
- case CPUINFO_STR_REGISTER + SH4_R2: sprintf(info->s, "R2 :%08X", sh4->r[ 2]); break;
- case CPUINFO_STR_REGISTER + SH4_R3: sprintf(info->s, "R3 :%08X", sh4->r[ 3]); break;
- case CPUINFO_STR_REGISTER + SH4_R4: sprintf(info->s, "R4 :%08X", sh4->r[ 4]); break;
- case CPUINFO_STR_REGISTER + SH4_R5: sprintf(info->s, "R5 :%08X", sh4->r[ 5]); break;
- case CPUINFO_STR_REGISTER + SH4_R6: sprintf(info->s, "R6 :%08X", sh4->r[ 6]); break;
- case CPUINFO_STR_REGISTER + SH4_R7: sprintf(info->s, "R7 :%08X", sh4->r[ 7]); break;
- case CPUINFO_STR_REGISTER + SH4_R8: sprintf(info->s, "R8 :%08X", sh4->r[ 8]); break;
- case CPUINFO_STR_REGISTER + SH4_R9: sprintf(info->s, "R9 :%08X", sh4->r[ 9]); break;
- case CPUINFO_STR_REGISTER + SH4_R10: sprintf(info->s, "R10 :%08X", sh4->r[10]); break;
- case CPUINFO_STR_REGISTER + SH4_R11: sprintf(info->s, "R11 :%08X", sh4->r[11]); break;
- case CPUINFO_STR_REGISTER + SH4_R12: sprintf(info->s, "R12 :%08X", sh4->r[12]); break;
- case CPUINFO_STR_REGISTER + SH4_R13: sprintf(info->s, "R13 :%08X", sh4->r[13]); break;
- case CPUINFO_STR_REGISTER + SH4_R14: sprintf(info->s, "R14 :%08X", sh4->r[14]); break;
- case CPUINFO_STR_REGISTER + SH4_R15: sprintf(info->s, "R15 :%08X", sh4->r[15]); break;
- case CPUINFO_STR_REGISTER + SH4_EA: sprintf(info->s, "EA :%08X", sh4->ea); break;
- case CPUINFO_STR_REGISTER + SH4_R0_BK0: sprintf(info->s, "R0 BK 0 :%08X", sh4->rbnk[0][0]); break;
- case CPUINFO_STR_REGISTER + SH4_R1_BK0: sprintf(info->s, "R1 BK 0 :%08X", sh4->rbnk[0][1]); break;
- case CPUINFO_STR_REGISTER + SH4_R2_BK0: sprintf(info->s, "R2 BK 0 :%08X", sh4->rbnk[0][2]); break;
- case CPUINFO_STR_REGISTER + SH4_R3_BK0: sprintf(info->s, "R3 BK 0 :%08X", sh4->rbnk[0][3]); break;
- case CPUINFO_STR_REGISTER + SH4_R4_BK0: sprintf(info->s, "R4 BK 0 :%08X", sh4->rbnk[0][4]); break;
- case CPUINFO_STR_REGISTER + SH4_R5_BK0: sprintf(info->s, "R5 BK 0 :%08X", sh4->rbnk[0][5]); break;
- case CPUINFO_STR_REGISTER + SH4_R6_BK0: sprintf(info->s, "R6 BK 0 :%08X", sh4->rbnk[0][6]); break;
- case CPUINFO_STR_REGISTER + SH4_R7_BK0: sprintf(info->s, "R7 BK 0 :%08X", sh4->rbnk[0][7]); break;
- case CPUINFO_STR_REGISTER + SH4_R0_BK1: sprintf(info->s, "R0 BK 1 :%08X", sh4->rbnk[1][0]); break;
- case CPUINFO_STR_REGISTER + SH4_R1_BK1: sprintf(info->s, "R1 BK 1 :%08X", sh4->rbnk[1][1]); break;
- case CPUINFO_STR_REGISTER + SH4_R2_BK1: sprintf(info->s, "R2 BK 1 :%08X", sh4->rbnk[1][2]); break;
- case CPUINFO_STR_REGISTER + SH4_R3_BK1: sprintf(info->s, "R3 BK 1 :%08X", sh4->rbnk[1][3]); break;
- case CPUINFO_STR_REGISTER + SH4_R4_BK1: sprintf(info->s, "R4 BK 1 :%08X", sh4->rbnk[1][4]); break;
- case CPUINFO_STR_REGISTER + SH4_R5_BK1: sprintf(info->s, "R5 BK 1 :%08X", sh4->rbnk[1][5]); break;
- case CPUINFO_STR_REGISTER + SH4_R6_BK1: sprintf(info->s, "R6 BK 1 :%08X", sh4->rbnk[1][6]); break;
- case CPUINFO_STR_REGISTER + SH4_R7_BK1: sprintf(info->s, "R7 BK 1 :%08X", sh4->rbnk[1][7]); break;
- case CPUINFO_STR_REGISTER + SH4_SPC: sprintf(info->s, "SPC :%08X", sh4->spc); break;
- case CPUINFO_STR_REGISTER + SH4_SSR: sprintf(info->s, "SSR :%08X", sh4->ssr); break;
- case CPUINFO_STR_REGISTER + SH4_SGR: sprintf(info->s, "SGR :%08X", sh4->sgr); break;
- case CPUINFO_STR_REGISTER + SH4_FPSCR: sprintf(info->s, "FPSCR :%08X", sh4->fpscr); break;
- case CPUINFO_STR_REGISTER + SH4_FPUL: sprintf(info->s, "FPUL :%08X", sh4->fpul); break;
+ case CPUINFO_STR_REGISTER + SH4_PC: sprintf(info->s, "PC :%08X", sh4->pc); break;
+ case CPUINFO_STR_REGISTER + SH4_SR: sprintf(info->s, "SR :%08X", sh4->sr); break;
+ case CPUINFO_STR_REGISTER + SH4_PR: sprintf(info->s, "PR :%08X", sh4->pr); break;
+ case CPUINFO_STR_REGISTER + SH4_GBR: sprintf(info->s, "GBR :%08X", sh4->gbr); break;
+ case CPUINFO_STR_REGISTER + SH4_VBR: sprintf(info->s, "VBR :%08X", sh4->vbr); break;
+ case CPUINFO_STR_REGISTER + SH4_DBR: sprintf(info->s, "DBR :%08X", sh4->dbr); break;
+ case CPUINFO_STR_REGISTER + SH4_MACH: sprintf(info->s, "MACH:%08X", sh4->mach); break;
+ case CPUINFO_STR_REGISTER + SH4_MACL: sprintf(info->s, "MACL:%08X", sh4->macl); break;
+ case CPUINFO_STR_REGISTER + SH4_R0: sprintf(info->s, "R0 :%08X", sh4->r[ 0]); break;
+ case CPUINFO_STR_REGISTER + SH4_R1: sprintf(info->s, "R1 :%08X", sh4->r[ 1]); break;
+ case CPUINFO_STR_REGISTER + SH4_R2: sprintf(info->s, "R2 :%08X", sh4->r[ 2]); break;
+ case CPUINFO_STR_REGISTER + SH4_R3: sprintf(info->s, "R3 :%08X", sh4->r[ 3]); break;
+ case CPUINFO_STR_REGISTER + SH4_R4: sprintf(info->s, "R4 :%08X", sh4->r[ 4]); break;
+ case CPUINFO_STR_REGISTER + SH4_R5: sprintf(info->s, "R5 :%08X", sh4->r[ 5]); break;
+ case CPUINFO_STR_REGISTER + SH4_R6: sprintf(info->s, "R6 :%08X", sh4->r[ 6]); break;
+ case CPUINFO_STR_REGISTER + SH4_R7: sprintf(info->s, "R7 :%08X", sh4->r[ 7]); break;
+ case CPUINFO_STR_REGISTER + SH4_R8: sprintf(info->s, "R8 :%08X", sh4->r[ 8]); break;
+ case CPUINFO_STR_REGISTER + SH4_R9: sprintf(info->s, "R9 :%08X", sh4->r[ 9]); break;
+ case CPUINFO_STR_REGISTER + SH4_R10: sprintf(info->s, "R10 :%08X", sh4->r[10]); break;
+ case CPUINFO_STR_REGISTER + SH4_R11: sprintf(info->s, "R11 :%08X", sh4->r[11]); break;
+ case CPUINFO_STR_REGISTER + SH4_R12: sprintf(info->s, "R12 :%08X", sh4->r[12]); break;
+ case CPUINFO_STR_REGISTER + SH4_R13: sprintf(info->s, "R13 :%08X", sh4->r[13]); break;
+ case CPUINFO_STR_REGISTER + SH4_R14: sprintf(info->s, "R14 :%08X", sh4->r[14]); break;
+ case CPUINFO_STR_REGISTER + SH4_R15: sprintf(info->s, "R15 :%08X", sh4->r[15]); break;
+ case CPUINFO_STR_REGISTER + SH4_EA: sprintf(info->s, "EA :%08X", sh4->ea); break;
+ case CPUINFO_STR_REGISTER + SH4_R0_BK0: sprintf(info->s, "R0 BK 0 :%08X", sh4->rbnk[0][0]); break;
+ case CPUINFO_STR_REGISTER + SH4_R1_BK0: sprintf(info->s, "R1 BK 0 :%08X", sh4->rbnk[0][1]); break;
+ case CPUINFO_STR_REGISTER + SH4_R2_BK0: sprintf(info->s, "R2 BK 0 :%08X", sh4->rbnk[0][2]); break;
+ case CPUINFO_STR_REGISTER + SH4_R3_BK0: sprintf(info->s, "R3 BK 0 :%08X", sh4->rbnk[0][3]); break;
+ case CPUINFO_STR_REGISTER + SH4_R4_BK0: sprintf(info->s, "R4 BK 0 :%08X", sh4->rbnk[0][4]); break;
+ case CPUINFO_STR_REGISTER + SH4_R5_BK0: sprintf(info->s, "R5 BK 0 :%08X", sh4->rbnk[0][5]); break;
+ case CPUINFO_STR_REGISTER + SH4_R6_BK0: sprintf(info->s, "R6 BK 0 :%08X", sh4->rbnk[0][6]); break;
+ case CPUINFO_STR_REGISTER + SH4_R7_BK0: sprintf(info->s, "R7 BK 0 :%08X", sh4->rbnk[0][7]); break;
+ case CPUINFO_STR_REGISTER + SH4_R0_BK1: sprintf(info->s, "R0 BK 1 :%08X", sh4->rbnk[1][0]); break;
+ case CPUINFO_STR_REGISTER + SH4_R1_BK1: sprintf(info->s, "R1 BK 1 :%08X", sh4->rbnk[1][1]); break;
+ case CPUINFO_STR_REGISTER + SH4_R2_BK1: sprintf(info->s, "R2 BK 1 :%08X", sh4->rbnk[1][2]); break;
+ case CPUINFO_STR_REGISTER + SH4_R3_BK1: sprintf(info->s, "R3 BK 1 :%08X", sh4->rbnk[1][3]); break;
+ case CPUINFO_STR_REGISTER + SH4_R4_BK1: sprintf(info->s, "R4 BK 1 :%08X", sh4->rbnk[1][4]); break;
+ case CPUINFO_STR_REGISTER + SH4_R5_BK1: sprintf(info->s, "R5 BK 1 :%08X", sh4->rbnk[1][5]); break;
+ case CPUINFO_STR_REGISTER + SH4_R6_BK1: sprintf(info->s, "R6 BK 1 :%08X", sh4->rbnk[1][6]); break;
+ case CPUINFO_STR_REGISTER + SH4_R7_BK1: sprintf(info->s, "R7 BK 1 :%08X", sh4->rbnk[1][7]); break;
+ case CPUINFO_STR_REGISTER + SH4_SPC: sprintf(info->s, "SPC :%08X", sh4->spc); break;
+ case CPUINFO_STR_REGISTER + SH4_SSR: sprintf(info->s, "SSR :%08X", sh4->ssr); break;
+ case CPUINFO_STR_REGISTER + SH4_SGR: sprintf(info->s, "SGR :%08X", sh4->sgr); break;
+ case CPUINFO_STR_REGISTER + SH4_FPSCR: sprintf(info->s, "FPSCR :%08X", sh4->fpscr); break;
+ case CPUINFO_STR_REGISTER + SH4_FPUL: sprintf(info->s, "FPUL :%08X", sh4->fpul); break;
#ifdef LSB_FIRST
- case CPUINFO_STR_REGISTER + SH4_FR0: sprintf(info->s, "FR0 :%08X %f", FP_RS2( 0),(double)FP_RFS2( 0)); break;
- case CPUINFO_STR_REGISTER + SH4_FR1: sprintf(info->s, "FR1 :%08X %f", FP_RS2( 1),(double)FP_RFS2( 1)); break;
- case CPUINFO_STR_REGISTER + SH4_FR2: sprintf(info->s, "FR2 :%08X %f", FP_RS2( 2),(double)FP_RFS2( 2)); break;
- case CPUINFO_STR_REGISTER + SH4_FR3: sprintf(info->s, "FR3 :%08X %f", FP_RS2( 3),(double)FP_RFS2( 3)); break;
- case CPUINFO_STR_REGISTER + SH4_FR4: sprintf(info->s, "FR4 :%08X %f", FP_RS2( 4),(double)FP_RFS2( 4)); break;
- case CPUINFO_STR_REGISTER + SH4_FR5: sprintf(info->s, "FR5 :%08X %f", FP_RS2( 5),(double)FP_RFS2( 5)); break;
- case CPUINFO_STR_REGISTER + SH4_FR6: sprintf(info->s, "FR6 :%08X %f", FP_RS2( 6),(double)FP_RFS2( 6)); break;
- case CPUINFO_STR_REGISTER + SH4_FR7: sprintf(info->s, "FR7 :%08X %f", FP_RS2( 7),(double)FP_RFS2( 7)); break;
- case CPUINFO_STR_REGISTER + SH4_FR8: sprintf(info->s, "FR8 :%08X %f", FP_RS2( 8),(double)FP_RFS2( 8)); break;
- case CPUINFO_STR_REGISTER + SH4_FR9: sprintf(info->s, "FR9 :%08X %f", FP_RS2( 9),(double)FP_RFS2( 9)); break;
- case CPUINFO_STR_REGISTER + SH4_FR10: sprintf(info->s, "FR10 :%08X %f", FP_RS2(10),(double)FP_RFS2(10)); break;
- case CPUINFO_STR_REGISTER + SH4_FR11: sprintf(info->s, "FR11 :%08X %f", FP_RS2(11),(double)FP_RFS2(11)); break;
- case CPUINFO_STR_REGISTER + SH4_FR12: sprintf(info->s, "FR12 :%08X %f", FP_RS2(12),(double)FP_RFS2(12)); break;
- case CPUINFO_STR_REGISTER + SH4_FR13: sprintf(info->s, "FR13 :%08X %f", FP_RS2(13),(double)FP_RFS2(13)); break;
- case CPUINFO_STR_REGISTER + SH4_FR14: sprintf(info->s, "FR14 :%08X %f", FP_RS2(14),(double)FP_RFS2(14)); break;
- case CPUINFO_STR_REGISTER + SH4_FR15: sprintf(info->s, "FR15 :%08X %f", FP_RS2(15),(double)FP_RFS2(15)); break;
- case CPUINFO_STR_REGISTER + SH4_XF0: sprintf(info->s, "XF0 :%08X %f", FP_XS2( 0),(double)FP_XFS2( 0)); break;
- case CPUINFO_STR_REGISTER + SH4_XF1: sprintf(info->s, "XF1 :%08X %f", FP_XS2( 1),(double)FP_XFS2( 1)); break;
- case CPUINFO_STR_REGISTER + SH4_XF2: sprintf(info->s, "XF2 :%08X %f", FP_XS2( 2),(double)FP_XFS2( 2)); break;
- case CPUINFO_STR_REGISTER + SH4_XF3: sprintf(info->s, "XF3 :%08X %f", FP_XS2( 3),(double)FP_XFS2( 3)); break;
- case CPUINFO_STR_REGISTER + SH4_XF4: sprintf(info->s, "XF4 :%08X %f", FP_XS2( 4),(double)FP_XFS2( 4)); break;
- case CPUINFO_STR_REGISTER + SH4_XF5: sprintf(info->s, "XF5 :%08X %f", FP_XS2( 5),(double)FP_XFS2( 5)); break;
- case CPUINFO_STR_REGISTER + SH4_XF6: sprintf(info->s, "XF6 :%08X %f", FP_XS2( 6),(double)FP_XFS2( 6)); break;
- case CPUINFO_STR_REGISTER + SH4_XF7: sprintf(info->s, "XF7 :%08X %f", FP_XS2( 7),(double)FP_XFS2( 7)); break;
- case CPUINFO_STR_REGISTER + SH4_XF8: sprintf(info->s, "XF8 :%08X %f", FP_XS2( 8),(double)FP_XFS2( 8)); break;
- case CPUINFO_STR_REGISTER + SH4_XF9: sprintf(info->s, "XF9 :%08X %f", FP_XS2( 9),(double)FP_XFS2( 9)); break;
- case CPUINFO_STR_REGISTER + SH4_XF10: sprintf(info->s, "XF10 :%08X %f", FP_XS2(10),(double)FP_XFS2(10)); break;
- case CPUINFO_STR_REGISTER + SH4_XF11: sprintf(info->s, "XF11 :%08X %f", FP_XS2(11),(double)FP_XFS2(11)); break;
- case CPUINFO_STR_REGISTER + SH4_XF12: sprintf(info->s, "XF12 :%08X %f", FP_XS2(12),(double)FP_XFS2(12)); break;
- case CPUINFO_STR_REGISTER + SH4_XF13: sprintf(info->s, "XF13 :%08X %f", FP_XS2(13),(double)FP_XFS2(13)); break;
- case CPUINFO_STR_REGISTER + SH4_XF14: sprintf(info->s, "XF14 :%08X %f", FP_XS2(14),(double)FP_XFS2(14)); break;
- case CPUINFO_STR_REGISTER + SH4_XF15: sprintf(info->s, "XF15 :%08X %f", FP_XS2(15),(double)FP_XFS2(15)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR0: sprintf(info->s, "FR0 :%08X %f", FP_RS2( 0),(double)FP_RFS2( 0)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR1: sprintf(info->s, "FR1 :%08X %f", FP_RS2( 1),(double)FP_RFS2( 1)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR2: sprintf(info->s, "FR2 :%08X %f", FP_RS2( 2),(double)FP_RFS2( 2)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR3: sprintf(info->s, "FR3 :%08X %f", FP_RS2( 3),(double)FP_RFS2( 3)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR4: sprintf(info->s, "FR4 :%08X %f", FP_RS2( 4),(double)FP_RFS2( 4)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR5: sprintf(info->s, "FR5 :%08X %f", FP_RS2( 5),(double)FP_RFS2( 5)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR6: sprintf(info->s, "FR6 :%08X %f", FP_RS2( 6),(double)FP_RFS2( 6)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR7: sprintf(info->s, "FR7 :%08X %f", FP_RS2( 7),(double)FP_RFS2( 7)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR8: sprintf(info->s, "FR8 :%08X %f", FP_RS2( 8),(double)FP_RFS2( 8)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR9: sprintf(info->s, "FR9 :%08X %f", FP_RS2( 9),(double)FP_RFS2( 9)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR10: sprintf(info->s, "FR10 :%08X %f", FP_RS2(10),(double)FP_RFS2(10)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR11: sprintf(info->s, "FR11 :%08X %f", FP_RS2(11),(double)FP_RFS2(11)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR12: sprintf(info->s, "FR12 :%08X %f", FP_RS2(12),(double)FP_RFS2(12)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR13: sprintf(info->s, "FR13 :%08X %f", FP_RS2(13),(double)FP_RFS2(13)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR14: sprintf(info->s, "FR14 :%08X %f", FP_RS2(14),(double)FP_RFS2(14)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR15: sprintf(info->s, "FR15 :%08X %f", FP_RS2(15),(double)FP_RFS2(15)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF0: sprintf(info->s, "XF0 :%08X %f", FP_XS2( 0),(double)FP_XFS2( 0)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF1: sprintf(info->s, "XF1 :%08X %f", FP_XS2( 1),(double)FP_XFS2( 1)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF2: sprintf(info->s, "XF2 :%08X %f", FP_XS2( 2),(double)FP_XFS2( 2)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF3: sprintf(info->s, "XF3 :%08X %f", FP_XS2( 3),(double)FP_XFS2( 3)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF4: sprintf(info->s, "XF4 :%08X %f", FP_XS2( 4),(double)FP_XFS2( 4)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF5: sprintf(info->s, "XF5 :%08X %f", FP_XS2( 5),(double)FP_XFS2( 5)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF6: sprintf(info->s, "XF6 :%08X %f", FP_XS2( 6),(double)FP_XFS2( 6)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF7: sprintf(info->s, "XF7 :%08X %f", FP_XS2( 7),(double)FP_XFS2( 7)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF8: sprintf(info->s, "XF8 :%08X %f", FP_XS2( 8),(double)FP_XFS2( 8)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF9: sprintf(info->s, "XF9 :%08X %f", FP_XS2( 9),(double)FP_XFS2( 9)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF10: sprintf(info->s, "XF10 :%08X %f", FP_XS2(10),(double)FP_XFS2(10)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF11: sprintf(info->s, "XF11 :%08X %f", FP_XS2(11),(double)FP_XFS2(11)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF12: sprintf(info->s, "XF12 :%08X %f", FP_XS2(12),(double)FP_XFS2(12)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF13: sprintf(info->s, "XF13 :%08X %f", FP_XS2(13),(double)FP_XFS2(13)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF14: sprintf(info->s, "XF14 :%08X %f", FP_XS2(14),(double)FP_XFS2(14)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF15: sprintf(info->s, "XF15 :%08X %f", FP_XS2(15),(double)FP_XFS2(15)); break;
#else
- case CPUINFO_STR_REGISTER + SH4_FR0: sprintf(info->s, "FR0 :%08X %f", FP_RS( 0),(double)FP_RFS( 0)); break;
- case CPUINFO_STR_REGISTER + SH4_FR1: sprintf(info->s, "FR1 :%08X %f", FP_RS( 1),(double)FP_RFS( 1)); break;
- case CPUINFO_STR_REGISTER + SH4_FR2: sprintf(info->s, "FR2 :%08X %f", FP_RS( 2),(double)FP_RFS( 2)); break;
- case CPUINFO_STR_REGISTER + SH4_FR3: sprintf(info->s, "FR3 :%08X %f", FP_RS( 3),(double)FP_RFS( 3)); break;
- case CPUINFO_STR_REGISTER + SH4_FR4: sprintf(info->s, "FR4 :%08X %f", FP_RS( 4),(double)FP_RFS( 4)); break;
- case CPUINFO_STR_REGISTER + SH4_FR5: sprintf(info->s, "FR5 :%08X %f", FP_RS( 5),(double)FP_RFS( 5)); break;
- case CPUINFO_STR_REGISTER + SH4_FR6: sprintf(info->s, "FR6 :%08X %f", FP_RS( 6),(double)FP_RFS( 6)); break;
- case CPUINFO_STR_REGISTER + SH4_FR7: sprintf(info->s, "FR7 :%08X %f", FP_RS( 7),(double)FP_RFS( 7)); break;
- case CPUINFO_STR_REGISTER + SH4_FR8: sprintf(info->s, "FR8 :%08X %f", FP_RS( 8),(double)FP_RFS( 8)); break;
- case CPUINFO_STR_REGISTER + SH4_FR9: sprintf(info->s, "FR9 :%08X %f", FP_RS( 9),(double)FP_RFS( 9)); break;
- case CPUINFO_STR_REGISTER + SH4_FR10: sprintf(info->s, "FR10 :%08X %f", FP_RS(10),(double)FP_RFS(10)); break;
- case CPUINFO_STR_REGISTER + SH4_FR11: sprintf(info->s, "FR11 :%08X %f", FP_RS(11),(double)FP_RFS(11)); break;
- case CPUINFO_STR_REGISTER + SH4_FR12: sprintf(info->s, "FR12 :%08X %f", FP_RS(12),(double)FP_RFS(12)); break;
- case CPUINFO_STR_REGISTER + SH4_FR13: sprintf(info->s, "FR13 :%08X %f", FP_RS(13),(double)FP_RFS(13)); break;
- case CPUINFO_STR_REGISTER + SH4_FR14: sprintf(info->s, "FR14 :%08X %f", FP_RS(14),(double)FP_RFS(14)); break;
- case CPUINFO_STR_REGISTER + SH4_FR15: sprintf(info->s, "FR15 :%08X %f", FP_RS(15),(double)FP_RFS(15)); break;
- case CPUINFO_STR_REGISTER + SH4_XF0: sprintf(info->s, "XF0 :%08X %f", FP_XS( 0),(double)FP_XFS( 0)); break;
- case CPUINFO_STR_REGISTER + SH4_XF1: sprintf(info->s, "XF1 :%08X %f", FP_XS( 1),(double)FP_XFS( 1)); break;
- case CPUINFO_STR_REGISTER + SH4_XF2: sprintf(info->s, "XF2 :%08X %f", FP_XS( 2),(double)FP_XFS( 2)); break;
- case CPUINFO_STR_REGISTER + SH4_XF3: sprintf(info->s, "XF3 :%08X %f", FP_XS( 3),(double)FP_XFS( 3)); break;
- case CPUINFO_STR_REGISTER + SH4_XF4: sprintf(info->s, "XF4 :%08X %f", FP_XS( 4),(double)FP_XFS( 4)); break;
- case CPUINFO_STR_REGISTER + SH4_XF5: sprintf(info->s, "XF5 :%08X %f", FP_XS( 5),(double)FP_XFS( 5)); break;
- case CPUINFO_STR_REGISTER + SH4_XF6: sprintf(info->s, "XF6 :%08X %f", FP_XS( 6),(double)FP_XFS( 6)); break;
- case CPUINFO_STR_REGISTER + SH4_XF7: sprintf(info->s, "XF7 :%08X %f", FP_XS( 7),(double)FP_XFS( 7)); break;
- case CPUINFO_STR_REGISTER + SH4_XF8: sprintf(info->s, "XF8 :%08X %f", FP_XS( 8),(double)FP_XFS( 8)); break;
- case CPUINFO_STR_REGISTER + SH4_XF9: sprintf(info->s, "XF9 :%08X %f", FP_XS( 9),(double)FP_XFS( 9)); break;
- case CPUINFO_STR_REGISTER + SH4_XF10: sprintf(info->s, "XF10 :%08X %f", FP_XS(10),(double)FP_XFS(10)); break;
- case CPUINFO_STR_REGISTER + SH4_XF11: sprintf(info->s, "XF11 :%08X %f", FP_XS(11),(double)FP_XFS(11)); break;
- case CPUINFO_STR_REGISTER + SH4_XF12: sprintf(info->s, "XF12 :%08X %f", FP_XS(12),(double)FP_XFS(12)); break;
- case CPUINFO_STR_REGISTER + SH4_XF13: sprintf(info->s, "XF13 :%08X %f", FP_XS(13),(double)FP_XFS(13)); break;
- case CPUINFO_STR_REGISTER + SH4_XF14: sprintf(info->s, "XF14 :%08X %f", FP_XS(14),(double)FP_XFS(14)); break;
- case CPUINFO_STR_REGISTER + SH4_XF15: sprintf(info->s, "XF15 :%08X %f", FP_XS(15),(double)FP_XFS(15)); break; //%01.2e
+ case CPUINFO_STR_REGISTER + SH4_FR0: sprintf(info->s, "FR0 :%08X %f", FP_RS( 0),(double)FP_RFS( 0)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR1: sprintf(info->s, "FR1 :%08X %f", FP_RS( 1),(double)FP_RFS( 1)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR2: sprintf(info->s, "FR2 :%08X %f", FP_RS( 2),(double)FP_RFS( 2)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR3: sprintf(info->s, "FR3 :%08X %f", FP_RS( 3),(double)FP_RFS( 3)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR4: sprintf(info->s, "FR4 :%08X %f", FP_RS( 4),(double)FP_RFS( 4)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR5: sprintf(info->s, "FR5 :%08X %f", FP_RS( 5),(double)FP_RFS( 5)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR6: sprintf(info->s, "FR6 :%08X %f", FP_RS( 6),(double)FP_RFS( 6)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR7: sprintf(info->s, "FR7 :%08X %f", FP_RS( 7),(double)FP_RFS( 7)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR8: sprintf(info->s, "FR8 :%08X %f", FP_RS( 8),(double)FP_RFS( 8)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR9: sprintf(info->s, "FR9 :%08X %f", FP_RS( 9),(double)FP_RFS( 9)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR10: sprintf(info->s, "FR10 :%08X %f", FP_RS(10),(double)FP_RFS(10)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR11: sprintf(info->s, "FR11 :%08X %f", FP_RS(11),(double)FP_RFS(11)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR12: sprintf(info->s, "FR12 :%08X %f", FP_RS(12),(double)FP_RFS(12)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR13: sprintf(info->s, "FR13 :%08X %f", FP_RS(13),(double)FP_RFS(13)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR14: sprintf(info->s, "FR14 :%08X %f", FP_RS(14),(double)FP_RFS(14)); break;
+ case CPUINFO_STR_REGISTER + SH4_FR15: sprintf(info->s, "FR15 :%08X %f", FP_RS(15),(double)FP_RFS(15)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF0: sprintf(info->s, "XF0 :%08X %f", FP_XS( 0),(double)FP_XFS( 0)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF1: sprintf(info->s, "XF1 :%08X %f", FP_XS( 1),(double)FP_XFS( 1)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF2: sprintf(info->s, "XF2 :%08X %f", FP_XS( 2),(double)FP_XFS( 2)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF3: sprintf(info->s, "XF3 :%08X %f", FP_XS( 3),(double)FP_XFS( 3)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF4: sprintf(info->s, "XF4 :%08X %f", FP_XS( 4),(double)FP_XFS( 4)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF5: sprintf(info->s, "XF5 :%08X %f", FP_XS( 5),(double)FP_XFS( 5)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF6: sprintf(info->s, "XF6 :%08X %f", FP_XS( 6),(double)FP_XFS( 6)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF7: sprintf(info->s, "XF7 :%08X %f", FP_XS( 7),(double)FP_XFS( 7)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF8: sprintf(info->s, "XF8 :%08X %f", FP_XS( 8),(double)FP_XFS( 8)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF9: sprintf(info->s, "XF9 :%08X %f", FP_XS( 9),(double)FP_XFS( 9)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF10: sprintf(info->s, "XF10 :%08X %f", FP_XS(10),(double)FP_XFS(10)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF11: sprintf(info->s, "XF11 :%08X %f", FP_XS(11),(double)FP_XFS(11)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF12: sprintf(info->s, "XF12 :%08X %f", FP_XS(12),(double)FP_XFS(12)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF13: sprintf(info->s, "XF13 :%08X %f", FP_XS(13),(double)FP_XFS(13)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF14: sprintf(info->s, "XF14 :%08X %f", FP_XS(14),(double)FP_XFS(14)); break;
+ case CPUINFO_STR_REGISTER + SH4_XF15: sprintf(info->s, "XF15 :%08X %f", FP_XS(15),(double)FP_XFS(15)); break; //%01.2e
#endif
}
}
@@ -3700,15 +3700,15 @@ CPU_GET_INFO( sh3 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh3); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh3); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SH-3"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7700"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SH-3"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7700"); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(sh3_internal_map); break;
- default: CPU_GET_INFO_CALL(sh4); break;
+ default: CPU_GET_INFO_CALL(sh4); break;
}
}
@@ -3717,19 +3717,19 @@ CPU_GET_INFO( sh3be )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh3); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4be); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh4be); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sh3); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4be); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh4be); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SH-3"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7700"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SH-3"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Hitachi SH7700"); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(sh3_internal_map); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- default: CPU_GET_INFO_CALL(sh4); break;
+ default: CPU_GET_INFO_CALL(sh4); break;
}
}
@@ -3737,10 +3737,10 @@ CPU_GET_INFO( sh4be )
{
switch (state)
{
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4be); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh4be); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- default: CPU_GET_INFO_CALL(sh4); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sh4be); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sh4be); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ default: CPU_GET_INFO_CALL(sh4); break;
}
}
@@ -3749,4 +3749,4 @@ DEFINE_LEGACY_CPU_DEVICE(SH3BE, sh3be);
DEFINE_LEGACY_CPU_DEVICE(SH4LE, sh4);
DEFINE_LEGACY_CPU_DEVICE(SH4BE, sh4be);
-#endif // USE_SH4DRC
+#endif // USE_SH4DRC
diff --git a/src/emu/cpu/sh4/sh4.h b/src/emu/cpu/sh4/sh4.h
index f7bfac57124..78110c1eb28 100644
--- a/src/emu/cpu/sh4/sh4.h
+++ b/src/emu/cpu/sh4/sh4.h
@@ -12,7 +12,7 @@
#define __SH4_H__
-#define SH4_INT_NONE -1
+#define SH4_INT_NONE -1
enum
{
SH4_IRL0=0, SH4_IRL1, SH4_IRL2, SH4_IRL3, SH4_IRLn
@@ -113,16 +113,16 @@ enum
struct sh4_config
{
- int md2;
- int md1;
- int md0;
- int md6;
- int md4;
- int md3;
- int md5;
- int md7;
- int md8;
- int clock;
+ int md2;
+ int md1;
+ int md0;
+ int md6;
+ int md4;
+ int md3;
+ int md5;
+ int md7;
+ int md8;
+ int clock;
};
struct sh4_device_dma
@@ -172,15 +172,14 @@ void sh4_dma_ddt(device_t *device, struct sh4_ddt_dma *s);
COMPILER-SPECIFIC OPTIONS
***************************************************************************/
-#define SH4DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
-#define SH4DRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
-#define SH4DRC_STRICT_PCREL 0x0004 /* do actual loads on MOVLI/MOVWI instead of collapsing to immediates */
+#define SH4DRC_STRICT_VERIFY 0x0001 /* verify all instructions */
+#define SH4DRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
+#define SH4DRC_STRICT_PCREL 0x0004 /* do actual loads on MOVLI/MOVWI instead of collapsing to immediates */
-#define SH4DRC_COMPATIBLE_OPTIONS (SH4DRC_STRICT_VERIFY | SH4DRC_FLUSH_PC | SH4DRC_STRICT_PCREL)
-#define SH4DRC_FASTEST_OPTIONS (0)
+#define SH4DRC_COMPATIBLE_OPTIONS (SH4DRC_STRICT_VERIFY | SH4DRC_FLUSH_PC | SH4DRC_STRICT_PCREL)
+#define SH4DRC_FASTEST_OPTIONS (0)
void sh4drc_set_options(device_t *device, UINT32 options);
void sh4drc_add_pcflush(device_t *device, offs_t address);
#endif /* __SH4_H__ */
-
diff --git a/src/emu/cpu/sh4/sh4comn.c b/src/emu/cpu/sh4/sh4comn.c
index bc28ef457af..b92b6acb4c4 100644
--- a/src/emu/cpu/sh4/sh4comn.c
+++ b/src/emu/cpu/sh4/sh4comn.c
@@ -21,122 +21,122 @@ static const int daysmonth[12] = { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 3
static const UINT32 exception_priority_default[] = {
- EXPPRI(1,1,0,0), /* Power-on Reset */
- EXPPRI(1,2,0,1), /* Manual Reset */
- EXPPRI(1,1,0,2), /* H-UDI Reset */
- EXPPRI(1,3,0,3), /* Inst TLB Multiple Hit */
- EXPPRI(1,4,0,4), /* Data TLB Multiple Hit */
-
- EXPPRI(2,0,0,5), /* User break Before Instruction */
- EXPPRI(2,1,0,6), /* Inst Address Error */
- EXPPRI(2,2,0,7), /* Inst TLB Miss */
- EXPPRI(2,3,0,8), /* Inst TLB Protection Violation */
- EXPPRI(2,4,0,9), /* Illegal Instruction */
- EXPPRI(2,4,0,10), /* Slot Illegal Instruction */
- EXPPRI(2,4,0,11), /* FPU Disable */
- EXPPRI(2,4,0,12), /* Slot FPU Disable */
- EXPPRI(2,5,0,13), /* Data Address Error (Read) */
- EXPPRI(2,5,0,14), /* Data Address Error (Write) */
- EXPPRI(2,6,0,15), /* Data TBL Miss Read */
- EXPPRI(2,6,0,16), /* Data TBL Miss Write */
- EXPPRI(2,7,0,17), /* Data TBL Protection Violation Read */
- EXPPRI(2,7,0,18), /* Data TBL Protection Violation Write */
- EXPPRI(2,8,0,19), /* FPU Exception */
- EXPPRI(2,9,0,20), /* Initial Page Write exception */
-
- EXPPRI(2,4,0,21), /* Unconditional TRAP */
- EXPPRI(2,10,0,22), /* User break After Instruction */
-
- EXPPRI(3,0,16,SH4_INTC_NMI) /* NMI */
+ EXPPRI(1,1,0,0), /* Power-on Reset */
+ EXPPRI(1,2,0,1), /* Manual Reset */
+ EXPPRI(1,1,0,2), /* H-UDI Reset */
+ EXPPRI(1,3,0,3), /* Inst TLB Multiple Hit */
+ EXPPRI(1,4,0,4), /* Data TLB Multiple Hit */
+
+ EXPPRI(2,0,0,5), /* User break Before Instruction */
+ EXPPRI(2,1,0,6), /* Inst Address Error */
+ EXPPRI(2,2,0,7), /* Inst TLB Miss */
+ EXPPRI(2,3,0,8), /* Inst TLB Protection Violation */
+ EXPPRI(2,4,0,9), /* Illegal Instruction */
+ EXPPRI(2,4,0,10), /* Slot Illegal Instruction */
+ EXPPRI(2,4,0,11), /* FPU Disable */
+ EXPPRI(2,4,0,12), /* Slot FPU Disable */
+ EXPPRI(2,5,0,13), /* Data Address Error (Read) */
+ EXPPRI(2,5,0,14), /* Data Address Error (Write) */
+ EXPPRI(2,6,0,15), /* Data TBL Miss Read */
+ EXPPRI(2,6,0,16), /* Data TBL Miss Write */
+ EXPPRI(2,7,0,17), /* Data TBL Protection Violation Read */
+ EXPPRI(2,7,0,18), /* Data TBL Protection Violation Write */
+ EXPPRI(2,8,0,19), /* FPU Exception */
+ EXPPRI(2,9,0,20), /* Initial Page Write exception */
+
+ EXPPRI(2,4,0,21), /* Unconditional TRAP */
+ EXPPRI(2,10,0,22), /* User break After Instruction */
+
+ EXPPRI(3,0,16,SH4_INTC_NMI) /* NMI */
/* This is copied to a table, and the IRQ priorities filled in later */
};
static const int exception_codes[] =
{ 0x000, /* Power-on Reset */
- 0x020, /* Manual Reset */
- 0x000, /* H-UDI Reset */
- 0x140, /* Inst TLB Multiple Hit */
- 0x140, /* Data TLB Multiple Hit */
-
- 0x1E0, /* User break Before Instruction */
- 0x0E0, /* Inst Address Error */
- 0x040, /* Inst TLB Miss */
- 0x0A0, /* Inst TLB Protection Violation */
- 0x180, /* Illegal Instruction */
- 0x1A0, /* Slot Illegal Instruction */
- 0x800, /* FPU Disable */
- 0x820, /* Slot FPU Disable */
- 0x0E0, /* Data Address Error (Read) */
- 0x100, /* Data Address Error (Write) */
- 0x040, /* Data TBL Miss Read */
- 0x060, /* Data TBL Miss Write */
- 0x0A0, /* Data TBL Protection Violation Read */
- 0x0C0, /* Data TBL Protection Violation Write */
- 0x120, /* FPU Exception */
- 0x080, /* Initial Page Write exception */
-
- 0x160, /* Unconditional TRAP */
- 0x1E0, /* User break After Instruction */
-
- 0x1C0, /* NMI */ /* SH4_INTC_NMI=23 represents this location in this list.. */
-
- 0x200, /* EX Irq 0 */
- 0x220, /* 1 */
- 0x240, /* 2 */
- 0x260, /* 3 */
- 0x280, /* 4 */
- 0x2A0, /* 5 */
- 0x2C0, /* 6 */
- 0x2E0, /* 7 */
- 0x300, /* 8 */
- 0x320, /* 9 */
- 0x340, /* A */
- 0x360, /* B */
- 0x380, /* C */
- 0x3A0, /* D */
- 0x3C0, /* E */
-
- 0x240, /* SH4_INTC_IRL0 */
- 0x2A0, /* SH4_INTC_IRL1 */
- 0x300, /* SH4_INTC_IRL2 */
- 0x360, /* SH4_INTC_IRL3 */
-
- 0x600, /* HUDI */
- 0x620, /* SH4_INTC_GPOI */
- 0x640, /* SH4_INTC_DMTE0 */
- 0x660, /* SH4_INTC_DMTE1 */
- 0x680, /* SH4_INTC_DMTE2 */
- 0x6A0, /* SH4_INTC_DMTE3 */
-
- 0x780, /* SH4_INTC_DMTE4 */
- 0x7A0, /* SH4_INTC_DMTE5 */
- 0x7C0, /* SH4_INTC_DMTE6 */
- 0x7E0, /* SH4_INTC_DMTE7 */
-
- 0x6C0, /* SH4_INTC_DMAE */
-
- 0xB00, /* SH4_INTC_TUNI3 */
- 0xB80, /* SH4_INTC_TUNI4 */
- 0x400, /* SH4_INTC_TUNI0 */
- 0x420, /* SH4_INTC_TUNI1 */
- 0x440, /* SH4_INTC_TUNI2 */
- 0x460, /* SH4_INTC_TICPI2 */
- 0x480, /* SH4_INTC_ATI */
- 0x4A0, /* SH4_INTC_PRI */
- 0x4C0, /* SH4_INTC_CUI */
- 0x4E0, /* SH4_INTC_SCI1ERI */
- 0x500, /* SH4_INTC_SCI1RXI */
- 0x520, /* SH4_INTC_SCI1TXI */
- 0x540, /* SH4_INTC_SCI1TEI */
-
- 0x700, /* SH4_INTC_SCIFERI */
- 0x720, /* SH4_INTC_SCIFRXI */
- 0x740, /* SH4_INTC_SCIFBRI */
- 0x760, /* SH4_INTC_SCIFTXI */
- 0x560, /* SH4_INTC_ITI */
- 0x580, /* SH4_INTC_RCMI */
- 0x5A0 /* SH4_INTC_ROVI */
+ 0x020, /* Manual Reset */
+ 0x000, /* H-UDI Reset */
+ 0x140, /* Inst TLB Multiple Hit */
+ 0x140, /* Data TLB Multiple Hit */
+
+ 0x1E0, /* User break Before Instruction */
+ 0x0E0, /* Inst Address Error */
+ 0x040, /* Inst TLB Miss */
+ 0x0A0, /* Inst TLB Protection Violation */
+ 0x180, /* Illegal Instruction */
+ 0x1A0, /* Slot Illegal Instruction */
+ 0x800, /* FPU Disable */
+ 0x820, /* Slot FPU Disable */
+ 0x0E0, /* Data Address Error (Read) */
+ 0x100, /* Data Address Error (Write) */
+ 0x040, /* Data TBL Miss Read */
+ 0x060, /* Data TBL Miss Write */
+ 0x0A0, /* Data TBL Protection Violation Read */
+ 0x0C0, /* Data TBL Protection Violation Write */
+ 0x120, /* FPU Exception */
+ 0x080, /* Initial Page Write exception */
+
+ 0x160, /* Unconditional TRAP */
+ 0x1E0, /* User break After Instruction */
+
+ 0x1C0, /* NMI */ /* SH4_INTC_NMI=23 represents this location in this list.. */
+
+ 0x200, /* EX Irq 0 */
+ 0x220, /* 1 */
+ 0x240, /* 2 */
+ 0x260, /* 3 */
+ 0x280, /* 4 */
+ 0x2A0, /* 5 */
+ 0x2C0, /* 6 */
+ 0x2E0, /* 7 */
+ 0x300, /* 8 */
+ 0x320, /* 9 */
+ 0x340, /* A */
+ 0x360, /* B */
+ 0x380, /* C */
+ 0x3A0, /* D */
+ 0x3C0, /* E */
+
+ 0x240, /* SH4_INTC_IRL0 */
+ 0x2A0, /* SH4_INTC_IRL1 */
+ 0x300, /* SH4_INTC_IRL2 */
+ 0x360, /* SH4_INTC_IRL3 */
+
+ 0x600, /* HUDI */
+ 0x620, /* SH4_INTC_GPOI */
+ 0x640, /* SH4_INTC_DMTE0 */
+ 0x660, /* SH4_INTC_DMTE1 */
+ 0x680, /* SH4_INTC_DMTE2 */
+ 0x6A0, /* SH4_INTC_DMTE3 */
+
+ 0x780, /* SH4_INTC_DMTE4 */
+ 0x7A0, /* SH4_INTC_DMTE5 */
+ 0x7C0, /* SH4_INTC_DMTE6 */
+ 0x7E0, /* SH4_INTC_DMTE7 */
+
+ 0x6C0, /* SH4_INTC_DMAE */
+
+ 0xB00, /* SH4_INTC_TUNI3 */
+ 0xB80, /* SH4_INTC_TUNI4 */
+ 0x400, /* SH4_INTC_TUNI0 */
+ 0x420, /* SH4_INTC_TUNI1 */
+ 0x440, /* SH4_INTC_TUNI2 */
+ 0x460, /* SH4_INTC_TICPI2 */
+ 0x480, /* SH4_INTC_ATI */
+ 0x4A0, /* SH4_INTC_PRI */
+ 0x4C0, /* SH4_INTC_CUI */
+ 0x4E0, /* SH4_INTC_SCI1ERI */
+ 0x500, /* SH4_INTC_SCI1RXI */
+ 0x520, /* SH4_INTC_SCI1TXI */
+ 0x540, /* SH4_INTC_SCI1TEI */
+
+ 0x700, /* SH4_INTC_SCIFERI */
+ 0x720, /* SH4_INTC_SCIFRXI */
+ 0x740, /* SH4_INTC_SCIFBRI */
+ 0x760, /* SH4_INTC_SCIFTXI */
+ 0x560, /* SH4_INTC_ITI */
+ 0x580, /* SH4_INTC_RCMI */
+ 0x5A0 /* SH4_INTC_ROVI */
};
/* SH3 INTEVT2 uses a different table - values of -1 aren't filled in yet, some may not exist on the sh3. */
@@ -145,90 +145,90 @@ static const int exception_codes[] =
static const int sh3_intevt2_exception_codes[] =
{ 0x000, /* Power-on Reset */
- -1, /* Manual Reset */
- -1, /* H-UDI Reset */
- -1, /* Inst TLB Multiple Hit */
- -1, /* Data TLB Multiple Hit */
-
- -1, /* User break Before Instruction */
- -1, /* Inst Address Error */
- -1, /* Inst TLB Miss */
- -1, /* Inst TLB Protection Violation */
- -1, /* Illegal Instruction */
- -1, /* Slot Illegal Instruction */
- -1, /* FPU Disable */
- -1, /* Slot FPU Disable */
- -1, /* Data Address Error (Read) */
- -1, /* Data Address Error (Write) */
- -1, /* Data TBL Miss Read */
- -1, /* Data TBL Miss Write */
- -1, /* Data TBL Protection Violation Read */
- -1, /* Data TBL Protection Violation Write */
- -1, /* FPU Exception */
- -1, /* Initial Page Write exception */
-
- -1, /* Unconditional TRAP */
- -1, /* User break After Instruction */
-
- -1, /* NMI */ /* SH4_INTC_NMI=23 represents this location in this list.. */
-
- -1, /* EX Irq 0 */
- -1, /* 1 */
- -1, /* 2 */
- -1, /* 3 */
- -1, /* 4 */
- -1, /* 5 */
- -1, /* 6 */
- -1, /* 7 */
- -1, /* 8 */
- -1, /* 9 */
- -1, /* A */
- -1, /* B */
- -1, /* C */
- -1, /* D */
- -1, /* E */
-
- 0x600, /* SH4_INTC_IRL0 */
- 0x620, /* SH4_INTC_IRL1 */
- 0x640, /* SH4_INTC_IRL2 */
- 0x660, /* SH4_INTC_IRL3 */
- /* todo: SH3 should have lines 4+5 too? */
-
- -1, /* HUDI */
- -1, /* SH4_INTC_GPOI */
- -1, /* SH4_INTC_DMTE0 */
- -1, /* SH4_INTC_DMTE1 */
- -1, /* SH4_INTC_DMTE2 */
- -1, /* SH4_INTC_DMTE3 */
-
- -1, /* SH4_INTC_DMTE4 */
- -1, /* SH4_INTC_DMTE5 */
- -1, /* SH4_INTC_DMTE6 */
- -1, /* SH4_INTC_DMTE7 */
-
- -1, /* SH4_INTC_DMAE */
-
- -1, /* SH4_INTC_TUNI3 */
- -1, /* SH4_INTC_TUNI4 */
- 0x400, /* SH4_INTC_TUNI0 */
- 0x420, /* SH4_INTC_TUNI1 */
- 0x440, /* SH4_INTC_TUNI2 */
- 0x460, /* SH4_INTC_TICPI2 */
- -1, /* SH4_INTC_ATI */
- -1, /* SH4_INTC_PRI */
- -1, /* SH4_INTC_CUI */
- -1, /* SH4_INTC_SCI1ERI */
- -1, /* SH4_INTC_SCI1RXI */
- -1, /* SH4_INTC_SCI1TXI */
- -1, /* SH4_INTC_SCI1TEI */
-
- -1, /* SH4_INTC_SCIFERI */
- -1, /* SH4_INTC_SCIFRXI */
- -1, /* SH4_INTC_SCIFBRI */
- -1, /* SH4_INTC_SCIFTXI */
- -1, /* SH4_INTC_ITI */
- -1, /* SH4_INTC_RCMI */
- -1 /* SH4_INTC_ROVI */
+ -1, /* Manual Reset */
+ -1, /* H-UDI Reset */
+ -1, /* Inst TLB Multiple Hit */
+ -1, /* Data TLB Multiple Hit */
+
+ -1, /* User break Before Instruction */
+ -1, /* Inst Address Error */
+ -1, /* Inst TLB Miss */
+ -1, /* Inst TLB Protection Violation */
+ -1, /* Illegal Instruction */
+ -1, /* Slot Illegal Instruction */
+ -1, /* FPU Disable */
+ -1, /* Slot FPU Disable */
+ -1, /* Data Address Error (Read) */
+ -1, /* Data Address Error (Write) */
+ -1, /* Data TBL Miss Read */
+ -1, /* Data TBL Miss Write */
+ -1, /* Data TBL Protection Violation Read */
+ -1, /* Data TBL Protection Violation Write */
+ -1, /* FPU Exception */
+ -1, /* Initial Page Write exception */
+
+ -1, /* Unconditional TRAP */
+ -1, /* User break After Instruction */
+
+ -1, /* NMI */ /* SH4_INTC_NMI=23 represents this location in this list.. */
+
+ -1, /* EX Irq 0 */
+ -1, /* 1 */
+ -1, /* 2 */
+ -1, /* 3 */
+ -1, /* 4 */
+ -1, /* 5 */
+ -1, /* 6 */
+ -1, /* 7 */
+ -1, /* 8 */
+ -1, /* 9 */
+ -1, /* A */
+ -1, /* B */
+ -1, /* C */
+ -1, /* D */
+ -1, /* E */
+
+ 0x600, /* SH4_INTC_IRL0 */
+ 0x620, /* SH4_INTC_IRL1 */
+ 0x640, /* SH4_INTC_IRL2 */
+ 0x660, /* SH4_INTC_IRL3 */
+ /* todo: SH3 should have lines 4+5 too? */
+
+ -1, /* HUDI */
+ -1, /* SH4_INTC_GPOI */
+ -1, /* SH4_INTC_DMTE0 */
+ -1, /* SH4_INTC_DMTE1 */
+ -1, /* SH4_INTC_DMTE2 */
+ -1, /* SH4_INTC_DMTE3 */
+
+ -1, /* SH4_INTC_DMTE4 */
+ -1, /* SH4_INTC_DMTE5 */
+ -1, /* SH4_INTC_DMTE6 */
+ -1, /* SH4_INTC_DMTE7 */
+
+ -1, /* SH4_INTC_DMAE */
+
+ -1, /* SH4_INTC_TUNI3 */
+ -1, /* SH4_INTC_TUNI4 */
+ 0x400, /* SH4_INTC_TUNI0 */
+ 0x420, /* SH4_INTC_TUNI1 */
+ 0x440, /* SH4_INTC_TUNI2 */
+ 0x460, /* SH4_INTC_TICPI2 */
+ -1, /* SH4_INTC_ATI */
+ -1, /* SH4_INTC_PRI */
+ -1, /* SH4_INTC_CUI */
+ -1, /* SH4_INTC_SCI1ERI */
+ -1, /* SH4_INTC_SCI1RXI */
+ -1, /* SH4_INTC_SCI1TXI */
+ -1, /* SH4_INTC_SCI1TEI */
+
+ -1, /* SH4_INTC_SCIFERI */
+ -1, /* SH4_INTC_SCIFRXI */
+ -1, /* SH4_INTC_SCIFBRI */
+ -1, /* SH4_INTC_SCIFTXI */
+ -1, /* SH4_INTC_ITI */
+ -1, /* SH4_INTC_RCMI */
+ -1 /* SH4_INTC_ROVI */
};
@@ -778,8 +778,8 @@ WRITE32_HANDLER( sh4_internal_w )
/*********************************************************************************************************************
TMU (Timer Unit)
*********************************************************************************************************************/
- case SH4_TSTR_ADDR: sh4_handle_tstr_addr_w(sh4,data,mem_mask); break;
- case SH4_TCR0_ADDR: sh4_handle_tcr0_addr_w(sh4,data,mem_mask); break;
+ case SH4_TSTR_ADDR: sh4_handle_tstr_addr_w(sh4,data,mem_mask); break;
+ case SH4_TCR0_ADDR: sh4_handle_tcr0_addr_w(sh4,data,mem_mask); break;
case SH4_TCR1_ADDR: sh4_handle_tcr1_addr_w(sh4,data,mem_mask); break;
case SH4_TCR2_ADDR: sh4_handle_tcr2_addr_w(sh4,data,mem_mask); break;
case SH4_TCOR0_ADDR: sh4_handle_tcor0_addr_w(sh4,data,mem_mask); break;
@@ -910,11 +910,11 @@ READ32_HANDLER( sh4_internal_r )
switch( offset )
{
case VERSION:
- return PVR_SH7091; // 0x040205c1, this is what a real SH7091 in a Dreamcast returns - the later Naomi BIOSes check and care!
+ return PVR_SH7091; // 0x040205c1, this is what a real SH7091 in a Dreamcast returns - the later Naomi BIOSes check and care!
case PRR:
return 0;
case IPRD:
- return 0x00000000; // SH7750 ignores writes here and always returns zero
+ return 0x00000000; // SH7750 ignores writes here and always returns zero
case RTCNT:
if ((sh4->m[RTCSR] >> 3) & 7)
{ // activated
@@ -1280,4 +1280,3 @@ WRITE64_HANDLER( sh4_tlb_w )
sh4->sh4_tlb_address[i] = data&0xffffffff;
}
}
-
diff --git a/src/emu/cpu/sh4/sh4comn.h b/src/emu/cpu/sh4/sh4comn.h
index f5d1a56688d..a0f76f38239 100644
--- a/src/emu/cpu/sh4/sh4comn.h
+++ b/src/emu/cpu/sh4/sh4comn.h
@@ -14,7 +14,7 @@
//#define USE_SH4DRC
/* speed up delay loops, bail out of tight loops */
-#define BUSY_LOOP_HACKS 0
+#define BUSY_LOOP_HACKS 0
#define VERBOSE 0
@@ -26,14 +26,14 @@
class sh4_frontend;
#endif
-#define CPU_TYPE_SH3 (2)
-#define CPU_TYPE_SH4 (3)
+#define CPU_TYPE_SH3 (2)
+#define CPU_TYPE_SH4 (3)
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define EXPPRI(pl,po,p,n) (((4-(pl)) << 24) | ((15-(po)) << 16) | ((p) << 8) | (255-(n)))
-#define NMIPRI() EXPPRI(3,0,16,SH4_INTC_NMI)
-#define INTPRI(p,n) EXPPRI(4,2,p,n)
+#define EXPPRI(pl,po,p,n) (((4-(pl)) << 24) | ((15-(po)) << 16) | ((p) << 8) | (255-(n)))
+#define NMIPRI() EXPPRI(3,0,16,SH4_INTC_NMI)
+#define INTPRI(p,n) EXPPRI(4,2,p,n)
#define FP_RS(r) sh4->fr[(r)] // binary representation of single precision floating point register r
#define FP_RFS(r) *( (float *)(sh4->fr+(r)) ) // single precision floating point register r
@@ -51,27 +51,27 @@ class sh4_frontend;
struct sh4_state
{
- UINT32 ppc;
- UINT32 pc, spc;
- UINT32 pr;
- UINT32 sr, ssr;
- UINT32 gbr, vbr;
- UINT32 mach, macl;
- UINT32 r[16], rbnk[2][8], sgr;
+ UINT32 ppc;
+ UINT32 pc, spc;
+ UINT32 pr;
+ UINT32 sr, ssr;
+ UINT32 gbr, vbr;
+ UINT32 mach, macl;
+ UINT32 r[16], rbnk[2][8], sgr;
UINT32 fr[16], xf[16];
- UINT32 ea;
- UINT32 delay;
- UINT32 cpu_off;
- UINT32 pending_irq;
+ UINT32 ea;
+ UINT32 delay;
+ UINT32 cpu_off;
+ UINT32 pending_irq;
UINT32 test_irq;
UINT32 fpscr;
UINT32 fpul;
UINT32 dbr;
- UINT32 exception_priority[128];
- int exception_requesting[128];
+ UINT32 exception_priority[128];
+ int exception_requesting[128];
- INT8 irq_line_state[17];
+ INT8 irq_line_state[17];
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *internal;
@@ -80,7 +80,7 @@ struct sh4_state
address_space *io;
// sh4 internal
- UINT32 *m;
+ UINT32 *m;
// timer regs handled manually for reuse
UINT32 SH4_TSTR;
@@ -129,37 +129,37 @@ struct sh4_state
UINT32 m_sh3internal_upper[0x3000/4];
UINT32 m_sh3internal_lower[0x1000];
- INT8 nmi_line_state;
+ INT8 nmi_line_state;
UINT8 sleep_mode;
- int frt_input;
- int irln;
- int internal_irq_level;
- int internal_irq_vector;
+ int frt_input;
+ int irln;
+ int internal_irq_level;
+ int internal_irq_vector;
emu_timer *dma_timer[4];
emu_timer *refresh_timer;
emu_timer *rtc_timer;
emu_timer *timer[3];
- UINT32 refresh_timer_base;
+ UINT32 refresh_timer_base;
int dma_timer_active[4];
- UINT32 dma_source[4];
- UINT32 dma_destination[4];
- UINT32 dma_count[4];
- int dma_wordsize[4];
- int dma_source_increment[4];
- int dma_destination_increment[4];
- int dma_mode[4];
-
- int sh4_icount;
+ UINT32 dma_source[4];
+ UINT32 dma_destination[4];
+ UINT32 dma_count[4];
+ int dma_wordsize[4];
+ int dma_source_increment[4];
+ int dma_destination_increment[4];
+ int dma_mode[4];
+
+ int sh4_icount;
int is_slave;
- int cpu_clock, bus_clock, pm_clock;
- int fpu_sz, fpu_pr;
- int ioport16_pullup, ioport16_direction;
- int ioport4_pullup, ioport4_direction;
+ int cpu_clock, bus_clock, pm_clock;
+ int fpu_sz, fpu_pr;
+ int ioport16_pullup, ioport16_direction;
+ int ioport4_pullup, ioport4_direction;
- void (*ftcsr_read_callback)(UINT32 data);
+ void (*ftcsr_read_callback)(UINT32 data);
/* This MMU simulation is good for the simple remap used on Naomi GD-ROM SQ access *ONLY* */
@@ -170,40 +170,40 @@ struct sh4_state
int cpu_type;
#ifdef USE_SH4DRC
- int icount;
+ int icount;
- int pcfsel; // last pcflush entry set
- int maxpcfsel; // highest valid pcflush entry
- UINT32 pcflushes[16]; // pcflush entries
+ int pcfsel; // last pcflush entry set
+ int maxpcfsel; // highest valid pcflush entry
+ UINT32 pcflushes[16]; // pcflush entries
- drc_cache * cache; /* pointer to the DRC code cache */
- drcuml_state * drcuml; /* DRC UML generator state */
- sh4_frontend * drcfe; /* pointer to the DRC front-end class */
- UINT32 drcoptions; /* configurable DRC options */
+ drc_cache * cache; /* pointer to the DRC code cache */
+ drcuml_state * drcuml; /* DRC UML generator state */
+ sh4_frontend * drcfe; /* pointer to the DRC front-end class */
+ UINT32 drcoptions; /* configurable DRC options */
/* internal stuff */
- UINT8 cache_dirty; /* true if we need to flush the cache */
+ UINT8 cache_dirty; /* true if we need to flush the cache */
/* parameters for subroutines */
- UINT64 numcycles; /* return value from gettotalcycles */
- UINT32 arg0; /* print_debug argument 1 */
- UINT32 arg1; /* print_debug argument 2 */
- UINT32 irq; /* irq we're taking */
+ UINT64 numcycles; /* return value from gettotalcycles */
+ UINT32 arg0; /* print_debug argument 1 */
+ UINT32 arg1; /* print_debug argument 2 */
+ UINT32 irq; /* irq we're taking */
/* register mappings */
- uml::parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */
+ uml::parameter regmap[16]; /* parameter to register mappings for all 16 integer registers */
- uml::code_handle * entry; /* entry point */
- uml::code_handle * read8; /* read byte */
- uml::code_handle * write8; /* write byte */
- uml::code_handle * read16; /* read half */
- uml::code_handle * write16; /* write half */
- uml::code_handle * read32; /* read word */
- uml::code_handle * write32; /* write word */
+ uml::code_handle * entry; /* entry point */
+ uml::code_handle * read8; /* read byte */
+ uml::code_handle * write8; /* write byte */
+ uml::code_handle * read16; /* read half */
+ uml::code_handle * write16; /* write half */
+ uml::code_handle * read32; /* read word */
+ uml::code_handle * write32; /* write word */
- uml::code_handle * interrupt; /* interrupt */
- uml::code_handle * nocode; /* nocode */
- uml::code_handle * out_of_cycles; /* out of cycles exception handler */
+ uml::code_handle * interrupt; /* interrupt */
+ uml::code_handle * nocode; /* nocode */
+ uml::code_handle * out_of_cycles; /* out of cycles exception handler */
UINT32 prefadr;
UINT32 target;
@@ -236,7 +236,7 @@ INLINE sh4_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == SH3LE || device->type() == SH3BE ||
- device->type() == SH4LE || device->type() == SH4BE );
+ device->type() == SH4LE || device->type() == SH4BE );
return *(sh4_state **)downcast<legacy_cpu_device *>(device)->token();
}
#else
@@ -244,7 +244,7 @@ INLINE sh4_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == SH3LE || device->type() == SH3BE ||
- device->type() == SH4LE || device->type() == SH4BE );
+ device->type() == SH4LE || device->type() == SH4BE );
return (sh4_state *)downcast<legacy_cpu_device *>(device)->token();
}
#endif
@@ -259,20 +259,20 @@ enum
};
/* Bits in SR */
-#define T 0x00000001
-#define S 0x00000002
-#define I 0x000000f0
-#define Q 0x00000100
-#define M 0x00000200
-#define FD 0x00008000
-#define BL 0x10000000
-#define sRB 0x20000000
-#define MD 0x40000000
+#define T 0x00000001
+#define S 0x00000002
+#define I 0x000000f0
+#define Q 0x00000100
+#define M 0x00000200
+#define FD 0x00008000
+#define BL 0x10000000
+#define sRB 0x20000000
+#define MD 0x40000000
/* 29 bits */
-#define AM 0x1fffffff
+#define AM 0x1fffffff
-#define FLAGS (MD|sRB|BL|FD|M|Q|I|S|T)
+#define FLAGS (MD|sRB|BL|FD|M|Q|I|S|T)
/* Bits in FPSCR */
#define RM 0x00000003
@@ -281,26 +281,26 @@ enum
#define SZ 0x00100000
#define FR 0x00200000
-#define Rn ((opcode>>8)&15)
-#define Rm ((opcode>>4)&15)
+#define Rn ((opcode>>8)&15)
+#define Rm ((opcode>>4)&15)
#define REGFLAG_R(n) (1 << (n))
#define REGFLAG_FR(n) (1 << (n))
#define REGFLAG_XR(n) (1 << (n))
/* register flags 1 */
-#define REGFLAG_PR (1 << 0)
-#define REGFLAG_MACL (1 << 1)
-#define REGFLAG_MACH (1 << 2)
-#define REGFLAG_GBR (1 << 3)
-#define REGFLAG_VBR (1 << 4)
-#define REGFLAG_SR (1 << 5)
-#define REGFLAG_SGR (1 << 6)
-#define REGFLAG_FPUL (1 << 7)
-#define REGFLAG_FPSCR (1 << 8)
-#define REGFLAG_DBR (1 << 9)
-#define REGFLAG_SSR (1 << 10)
-#define REGFLAG_SPC (1 << 11)
+#define REGFLAG_PR (1 << 0)
+#define REGFLAG_MACL (1 << 1)
+#define REGFLAG_MACH (1 << 2)
+#define REGFLAG_GBR (1 << 3)
+#define REGFLAG_VBR (1 << 4)
+#define REGFLAG_SR (1 << 5)
+#define REGFLAG_SGR (1 << 6)
+#define REGFLAG_FPUL (1 << 7)
+#define REGFLAG_FPSCR (1 << 8)
+#define REGFLAG_DBR (1 << 9)
+#define REGFLAG_SSR (1 << 10)
+#define REGFLAG_SPC (1 << 11)
void sh4_exception_recompute(sh4_state *sh4); // checks if there is any interrupt with high enough priority
void sh4_exception_request(sh4_state *sh4, int exception); // start requesting an exception
@@ -348,4 +348,3 @@ INLINE void sh4_check_pending_irq(sh4_state *sh4, const char *message) // look f
}
#endif /* __SH4COMN_H__ */
-
diff --git a/src/emu/cpu/sh4/sh4dasm.c b/src/emu/cpu/sh4/sh4dasm.c
index 62ef92eb19d..1de54946a12 100644
--- a/src/emu/cpu/sh4/sh4dasm.c
+++ b/src/emu/cpu/sh4/sh4dasm.c
@@ -2,8 +2,8 @@
#include "debugger.h"
#include "sh4.h"
-#define SIGNX8(x) (((INT32)(x) << 24) >> 24)
-#define SIGNX12(x) (((INT32)(x) << 20) >> 20)
+#define SIGNX8(x) (((INT32)(x) << 24) >> 24)
+#define SIGNX12(x) (((INT32)(x) << 20) >> 20)
#define Rn ((opcode >> 8) & 15)
#define Rm ((opcode >> 4) & 15)
@@ -791,22 +791,22 @@ unsigned DasmSH4(char *buffer, unsigned pc, UINT16 opcode)
switch((opcode >> 12) & 15)
{
- case 0: flags = op0000(buffer,pc,opcode); break;
- case 1: flags = op0001(buffer,pc,opcode); break;
- case 2: flags = op0010(buffer,pc,opcode); break;
- case 3: flags = op0011(buffer,pc,opcode); break;
- case 4: flags = op0100(buffer,pc,opcode); break;
- case 5: flags = op0101(buffer,pc,opcode); break;
- case 6: flags = op0110(buffer,pc,opcode); break;
- case 7: flags = op0111(buffer,pc,opcode); break;
- case 8: flags = op1000(buffer,pc,opcode); break;
- case 9: flags = op1001(buffer,pc,opcode); break;
- case 10: flags = op1010(buffer,pc,opcode); break;
- case 11: flags = op1011(buffer,pc,opcode); break;
- case 12: flags = op1100(buffer,pc,opcode); break;
- case 13: flags = op1101(buffer,pc,opcode); break;
- case 14: flags = op1110(buffer,pc,opcode); break;
- default: flags = op1111(buffer,pc,opcode); break;
+ case 0: flags = op0000(buffer,pc,opcode); break;
+ case 1: flags = op0001(buffer,pc,opcode); break;
+ case 2: flags = op0010(buffer,pc,opcode); break;
+ case 3: flags = op0011(buffer,pc,opcode); break;
+ case 4: flags = op0100(buffer,pc,opcode); break;
+ case 5: flags = op0101(buffer,pc,opcode); break;
+ case 6: flags = op0110(buffer,pc,opcode); break;
+ case 7: flags = op0111(buffer,pc,opcode); break;
+ case 8: flags = op1000(buffer,pc,opcode); break;
+ case 9: flags = op1001(buffer,pc,opcode); break;
+ case 10: flags = op1010(buffer,pc,opcode); break;
+ case 11: flags = op1011(buffer,pc,opcode); break;
+ case 12: flags = op1100(buffer,pc,opcode); break;
+ case 13: flags = op1101(buffer,pc,opcode); break;
+ case 14: flags = op1110(buffer,pc,opcode); break;
+ default: flags = op1111(buffer,pc,opcode); break;
}
return 2 | flags | DASMFLAG_SUPPORTED;
}
@@ -820,4 +820,3 @@ CPU_DISASSEMBLE( sh4be )
{
return DasmSH4( buffer, pc, (oprom[0] << 8) | oprom[1] );
}
-
diff --git a/src/emu/cpu/sh4/sh4dmac.c b/src/emu/cpu/sh4/sh4dmac.c
index 2e1f0ea3347..f53c8b5a922 100644
--- a/src/emu/cpu/sh4/sh4dmac.c
+++ b/src/emu/cpu/sh4/sh4dmac.c
@@ -568,91 +568,91 @@ void sh4_dma_ddt(device_t *device, struct sh4_ddt_dma *s)
}
- void sh4_handle_sar0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_sar0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_SAR0);
}
- void sh4_handle_sar1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_sar1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_SAR1);
}
- void sh4_handle_sar2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_sar2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_SAR2);
}
- void sh4_handle_sar3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_sar3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_SAR3);
}
- void sh4_handle_dar0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dar0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DAR0);
}
- void sh4_handle_dar1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dar1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DAR1);
}
- void sh4_handle_dar2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dar2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DAR2);
}
- void sh4_handle_dar3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dar3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DAR3);
}
- void sh4_handle_dmatcr0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dmatcr0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DMATCR0);
}
- void sh4_handle_dmatcr1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dmatcr1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DMATCR1);
}
- void sh4_handle_dmatcr2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dmatcr2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DMATCR2);
}
- void sh4_handle_dmatcr3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dmatcr3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_DMATCR3);
}
- void sh4_handle_chcr0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_chcr0_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_CHCR0);
sh4_dmac_check(sh4, 0);
}
- void sh4_handle_chcr1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_chcr1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_CHCR1);
sh4_dmac_check(sh4, 1);
}
- void sh4_handle_chcr2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_chcr2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_CHCR2);
sh4_dmac_check(sh4, 2);
}
- void sh4_handle_chcr3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_chcr3_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_CHCR3);
sh4_dmac_check(sh4, 3);
}
- void sh4_handle_dmaor_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
+ void sh4_handle_dmaor_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
UINT32 old = sh4->SH4_DMAOR;
COMBINE_DATA(&sh4->SH4_DMAOR);
@@ -667,20 +667,20 @@ void sh4_dma_ddt(device_t *device, struct sh4_ddt_dma *s)
sh4_dmac_check(sh4, 3);
}
- UINT32 sh4_handle_sar0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR0; }
- UINT32 sh4_handle_sar1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR1; }
- UINT32 sh4_handle_sar2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR2; }
- UINT32 sh4_handle_sar3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR3; }
- UINT32 sh4_handle_dar0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR0; }
- UINT32 sh4_handle_dar1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR1; }
- UINT32 sh4_handle_dar2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR2; }
- UINT32 sh4_handle_dar3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR3; }
- UINT32 sh4_handle_dmatcr0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR0; }
- UINT32 sh4_handle_dmatcr1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR1; }
- UINT32 sh4_handle_dmatcr2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR2; }
- UINT32 sh4_handle_dmatcr3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR3; }
- UINT32 sh4_handle_chcr0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR0; }
- UINT32 sh4_handle_chcr1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR1; }
- UINT32 sh4_handle_chcr2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR2; }
- UINT32 sh4_handle_chcr3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR3; }
- UINT32 sh4_handle_dmaor_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMAOR; }
+ UINT32 sh4_handle_sar0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR0; }
+ UINT32 sh4_handle_sar1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR1; }
+ UINT32 sh4_handle_sar2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR2; }
+ UINT32 sh4_handle_sar3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_SAR3; }
+ UINT32 sh4_handle_dar0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR0; }
+ UINT32 sh4_handle_dar1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR1; }
+ UINT32 sh4_handle_dar2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR2; }
+ UINT32 sh4_handle_dar3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DAR3; }
+ UINT32 sh4_handle_dmatcr0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR0; }
+ UINT32 sh4_handle_dmatcr1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR1; }
+ UINT32 sh4_handle_dmatcr2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR2; }
+ UINT32 sh4_handle_dmatcr3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMATCR3; }
+ UINT32 sh4_handle_chcr0_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR0; }
+ UINT32 sh4_handle_chcr1_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR1; }
+ UINT32 sh4_handle_chcr2_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR2; }
+ UINT32 sh4_handle_chcr3_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_CHCR3; }
+ UINT32 sh4_handle_dmaor_addr_r(sh4_state *sh4, UINT32 mem_mask) { return sh4->SH4_DMAOR; }
diff --git a/src/emu/cpu/sh4/sh4dmac.h b/src/emu/cpu/sh4/sh4dmac.h
index 012ddcc21d2..595f700a6be 100644
--- a/src/emu/cpu/sh4/sh4dmac.h
+++ b/src/emu/cpu/sh4/sh4dmac.h
@@ -1,29 +1,29 @@
/* SHA3/4 DMA Controller */
/* bit definitions */
-#define CHCR_SSA 0xe0000000
-#define CHCR_STC 0x10000000
-#define CHCR_DSA 0x0e000000
-#define CHCR_DTC 0x01000000
-#define CHCR_DS 0x00080000
-#define CHCR_RL 0x00040000
-#define CHCR_AM 0x00020000
-#define CHCR_AL 0x00010000
-#define CHCR_DM 0x0000c000
-#define CHCR_SM 0x00003000
-#define CHCR_RS 0x00000f00
-#define CHCR_TM 0x00000080
-#define CHCR_TS 0x00000070
-#define CHCR_IE 0x00000004
-#define CHCR_TE 0x00000002
-#define CHCR_DE 0x00000001
+#define CHCR_SSA 0xe0000000
+#define CHCR_STC 0x10000000
+#define CHCR_DSA 0x0e000000
+#define CHCR_DTC 0x01000000
+#define CHCR_DS 0x00080000
+#define CHCR_RL 0x00040000
+#define CHCR_AM 0x00020000
+#define CHCR_AL 0x00010000
+#define CHCR_DM 0x0000c000
+#define CHCR_SM 0x00003000
+#define CHCR_RS 0x00000f00
+#define CHCR_TM 0x00000080
+#define CHCR_TS 0x00000070
+#define CHCR_IE 0x00000004
+#define CHCR_TE 0x00000002
+#define CHCR_DE 0x00000001
-#define DMAOR_DDT 0x8000
-#define DMAOR_PR 0x0300
-#define DMAOR_COD 0x0010
-#define DMAOR_AE 0x0004
-#define DMAOR_NMIF 0x0002
-#define DMAOR_DME 0x0001
+#define DMAOR_DDT 0x8000
+#define DMAOR_PR 0x0300
+#define DMAOR_COD 0x0010
+#define DMAOR_AE 0x0004
+#define DMAOR_NMIF 0x0002
+#define DMAOR_DME 0x0001
TIMER_CALLBACK( sh4_dmac_callback );
diff --git a/src/emu/cpu/sh4/sh4regs.h b/src/emu/cpu/sh4/sh4regs.h
index c33dc0a67b4..8fc26a207b6 100644
--- a/src/emu/cpu/sh4/sh4regs.h
+++ b/src/emu/cpu/sh4/sh4regs.h
@@ -4,173 +4,173 @@
#define __SH4REGS_H__
/* 00000001111111100000000011111100 */
-#define PTEH 0x2000 /* FF000000 */
-#define PTEL 0x2001 /* FF000004 */
-#define TTB 0x2002 /* FF000008 */
-#define TEA 0x2003 /* FF00000C */
-#define MMUCR 0x2004 /* FF000010 */
-#define BASRA 0x2005 /* FF000014 */
-#define BASRB 0x2006 /* FF000018 */
-#define CCR 0x2007 /* FF00001C */
-#define TRA 0x2008 /* FF000020 */
-#define EXPEVT 0x2009 /* FF000024 */
-#define INTEVT 0x200A /* FF000028 */
-#define VERSION 0x200C /* FF000030 */
-#define PTEA 0x200D /* FF000034 */
-#define QACR0 0x200E /* FF000038 */
-#define QACR1 0x200F /* FF00003C */
-#define PRR 0x2011 /* FF000044 */
-#define BARA 0x2400 /* FF200000 */
-#define BAMRA 0x2401 /* FF200004 */
-#define BBRA 0x2402 /* FF200008 */
-#define BARB 0x2403 /* FF20000C */
-#define BAMRB 0x2404 /* FF200010 */
-#define BBRB 0x2405 /* FF200014 */
-#define BDRB 0x2406 /* FF200018 */
-#define BDMRB 0x2407 /* FF20001C */
-#define BRCR 0x2408 /* FF200020 */
-#define BCR1 0x3000 /* FF800000 */
-#define BCR2 0x3001 /* FF800004 */
-#define BCR3 0x3014 /* FF800050 */
-#define BCR4 0x17C /* FE0A00F0 */
-#define WCR1 0x3002 /* FF800008 */
-#define WCR2 0x3003 /* FF80000C */
-#define WCR3 0x3004 /* FF800010 */
-#define MCR 0x3005 /* FF800014 */
-#define PCR 0x3006 /* FF800018 */
-#define RTCSR 0x3007 /* FF80001C */
-#define RTCNT 0x3008 /* FF800020 */
-#define RTCOR 0x3009 /* FF800024 */
-#define RFCR 0x300A /* FF800028 */
-#define PCTRA 0x300B /* FF80002C */
-#define PDTRA 0x300C /* FF800030 */
-#define PCTRB 0x3010 /* FF800040 */
-#define PDTRB 0x3011 /* FF800044 */
-#define GPIOIC 0x3012 /* FF800048 */
-#define SDMR2 0x3200 /* FF900000 */
-#define SDMR3 0x3280 /* FF940000 */
-#define SH4_SAR0_ADDR 0x3400 /* FFA00000 */
-#define SH4_DAR0_ADDR 0x3401 /* FFA00004 */
-#define SH4_DMATCR0_ADDR 0x3402 /* FFA00008 */
-#define SH4_CHCR0_ADDR 0x3403 /* FFA0000C */
-#define SH4_SAR1_ADDR 0x3404 /* FFA00010 */
-#define SH4_DAR1_ADDR 0x3405 /* FFA00014 */
-#define SH4_DMATCR1_ADDR 0x3406 /* FFA00018 */
-#define SH4_CHCR1_ADDR 0x3407 /* FFA0001C */
-#define SH4_SAR2_ADDR 0x3408 /* FFA00020 */
-#define SH4_DAR2_ADDR 0x3409 /* FFA00024 */
-#define SH4_DMATCR2_ADDR 0x340A /* FFA00028 */
-#define SH4_CHCR2_ADDR 0x340B /* FFA0002C */
-#define SH4_SAR3_ADDR 0x340C /* FFA00030 */
-#define SH4_DAR3_ADDR 0x340D /* FFA00034 */
-#define SH4_DMATCR3_ADDR 0x340E /* FFA00038 */
-#define SH4_CHCR3_ADDR 0x340F /* FFA0003C */
-#define SH4_DMAOR_ADDR 0x3410 /* FFA00040 */
-#define SAR4 0x3414 /* FFA00050 */
-#define DAR4 0x3415 /* FFA00054 */
-#define DMATCR4 0x3416 /* FFA00058 */
-#define CHCR4 0x3417 /* FFA0005C */
-#define SAR5 0x3418 /* FFA00060 */
-#define DAR5 0x3419 /* FFA00064 */
-#define DMATCR5 0x341A /* FFA00068 */
-#define CHCR5 0x341B /* FFA0006C */
-#define SAR6 0x341C /* FFA00070 */
-#define DAR6 0x341D /* FFA00074 */
-#define DMATCR6 0x341E /* FFA00078 */
-#define CHCR6 0x341F /* FFA0007C */
-#define SAR7 0x3420 /* FFA00080 */
-#define DAR7 0x3421 /* FFA00084 */
-#define DMATCR7 0x3422 /* FFA00088 */
-#define CHCR7 0x3423 /* FFA0008C */
-#define FRQCR 0x3800 /* FFC00000 */
-#define STBCR 0x3801 /* FFC00004 */
-#define WTCNT 0x3802 /* FFC00008 */
-#define WTCSR 0x3803 /* FFC0000C */
-#define STBCR2 0x3804 /* FFC00010 */
-#define R64CNT 0x3900 /* FFC80000 */
-#define RSECCNT 0x3901 /* FFC80004 */
-#define RMINCNT 0x3902 /* FFC80008 */
-#define RHRCNT 0x3903 /* FFC8000C */
-#define RWKCNT 0x3904 /* FFC80010 */
-#define RDAYCNT 0x3905 /* FFC80014 */
-#define RMONCNT 0x3906 /* FFC80018 */
-#define RYRCNT 0x3907 /* FFC8001C */
-#define RSECAR 0x3908 /* FFC80020 */
-#define RMINAR 0x3909 /* FFC80024 */
-#define RHRAR 0x390A /* FFC80028 */
-#define RWKAR 0x390B /* FFC8002C */
-#define RDAYAR 0x390C /* FFC80030 */
-#define RMONAR 0x390D /* FFC80034 */
-#define RCR1 0x390E /* FFC80038 */
-#define RCR2 0x390F /* FFC8003C */
-#define RCR3 0x3914 /* FFC80050 */
-#define RYRAR 0x3915 /* FFC80054 */
-#define ICR 0x3A00 /* FFD00000 */
-#define IPRA 0x3A01 /* FFD00004 */
-#define IPRB 0x3A02 /* FFD00008 */
-#define IPRC 0x3A03 /* FFD0000C */
-#define IPRD 0x3A04 /* FFD00010 */
-#define INTPRI00 0x100 /* FE080000 */
-#define INTREQ00 0x108 /* FE080020 */
-#define INTMSK00 0x110 /* FE080040 */
-#define INTMSKCLR00 0x118 /* FE080060 */
-#define CLKSTP00 0x140 /* FE0A0000 */
-#define CLKSTPCLR00 0x142 /* FE0A0008 */
-#define TSTR2 0x201 /* FE100004 */
-#define TCOR3 0x202 /* FE100008 */
-#define TCNT3 0x203 /* FE10000C */
-#define TCR3 0x204 /* FE100010 */
-#define TCOR4 0x205 /* FE100014 */
-#define TCNT4 0x206 /* FE100018 */
-#define TCR4 0x207 /* FE10001C */
-#define SH4_TOCR_ADDR 0x3B00 /* FFD80000 */
-#define SH4_TSTR_ADDR 0x3B01 /* FFD80004 */
-#define SH4_TCOR0_ADDR 0x3B02 /* FFD80008 */
-#define SH4_TCNT0_ADDR 0x3B03 /* FFD8000C */
-#define SH4_TCR0_ADDR 0x3B04 /* FFD80010 */
-#define SH4_TCOR1_ADDR 0x3B05 /* FFD80014 */
-#define SH4_TCNT1_ADDR 0x3B06 /* FFD80018 */
-#define SH4_TCR1_ADDR 0x3B07 /* FFD8001C */
-#define SH4_TCOR2_ADDR 0x3B08 /* FFD80020 */
-#define SH4_TCNT2_ADDR 0x3B09 /* FFD80024 */
-#define SH4_TCR2_ADDR 0x3B0A /* FFD80028 */
-#define SH4_TCPR2_ADDR 0x3B0B /* FFD8002C */
-#define SCSMR1 0x3C00 /* FFE00000 */
-#define SCBRR1 0x3C01 /* FFE00004 */
-#define SCSCR1 0x3C02 /* FFE00008 */
-#define SCTDR1 0x3C03 /* FFE0000C */
-#define SCSSR1 0x3C04 /* FFE00010 */
-#define SCRDR1 0x3C05 /* FFE00014 */
-#define SCSCMR1 0x3C06 /* FFE00018 */
-#define SCSPTR1 0x3C07 /* FFE0001C */
-#define SCSMR2 0x3D00 /* FFE80000 */
-#define SCBRR2 0x3D01 /* FFE80004 */
-#define SCSCR2 0x3D02 /* FFE80008 */
-#define SCFTDR2 0x3D03 /* FFE8000C */
-#define SCFSR2 0x3D04 /* FFE80010 */
-#define SCFRDR2 0x3D05 /* FFE80014 */
-#define SCFCR2 0x3D06 /* FFE80018 */
-#define SCFDR2 0x3D07 /* FFE8001C */
-#define SCSPTR2 0x3D08 /* FFE80020 */
-#define SCLSR2 0x3D09 /* FFE80024 */
-#define SDIR 0x3E00 /* FFF00000 */
-#define SDDR 0x3E02 /* FFF00008 */
-#define SDINT 0x3E05 /* FFF00014 */
+#define PTEH 0x2000 /* FF000000 */
+#define PTEL 0x2001 /* FF000004 */
+#define TTB 0x2002 /* FF000008 */
+#define TEA 0x2003 /* FF00000C */
+#define MMUCR 0x2004 /* FF000010 */
+#define BASRA 0x2005 /* FF000014 */
+#define BASRB 0x2006 /* FF000018 */
+#define CCR 0x2007 /* FF00001C */
+#define TRA 0x2008 /* FF000020 */
+#define EXPEVT 0x2009 /* FF000024 */
+#define INTEVT 0x200A /* FF000028 */
+#define VERSION 0x200C /* FF000030 */
+#define PTEA 0x200D /* FF000034 */
+#define QACR0 0x200E /* FF000038 */
+#define QACR1 0x200F /* FF00003C */
+#define PRR 0x2011 /* FF000044 */
+#define BARA 0x2400 /* FF200000 */
+#define BAMRA 0x2401 /* FF200004 */
+#define BBRA 0x2402 /* FF200008 */
+#define BARB 0x2403 /* FF20000C */
+#define BAMRB 0x2404 /* FF200010 */
+#define BBRB 0x2405 /* FF200014 */
+#define BDRB 0x2406 /* FF200018 */
+#define BDMRB 0x2407 /* FF20001C */
+#define BRCR 0x2408 /* FF200020 */
+#define BCR1 0x3000 /* FF800000 */
+#define BCR2 0x3001 /* FF800004 */
+#define BCR3 0x3014 /* FF800050 */
+#define BCR4 0x17C /* FE0A00F0 */
+#define WCR1 0x3002 /* FF800008 */
+#define WCR2 0x3003 /* FF80000C */
+#define WCR3 0x3004 /* FF800010 */
+#define MCR 0x3005 /* FF800014 */
+#define PCR 0x3006 /* FF800018 */
+#define RTCSR 0x3007 /* FF80001C */
+#define RTCNT 0x3008 /* FF800020 */
+#define RTCOR 0x3009 /* FF800024 */
+#define RFCR 0x300A /* FF800028 */
+#define PCTRA 0x300B /* FF80002C */
+#define PDTRA 0x300C /* FF800030 */
+#define PCTRB 0x3010 /* FF800040 */
+#define PDTRB 0x3011 /* FF800044 */
+#define GPIOIC 0x3012 /* FF800048 */
+#define SDMR2 0x3200 /* FF900000 */
+#define SDMR3 0x3280 /* FF940000 */
+#define SH4_SAR0_ADDR 0x3400 /* FFA00000 */
+#define SH4_DAR0_ADDR 0x3401 /* FFA00004 */
+#define SH4_DMATCR0_ADDR 0x3402 /* FFA00008 */
+#define SH4_CHCR0_ADDR 0x3403 /* FFA0000C */
+#define SH4_SAR1_ADDR 0x3404 /* FFA00010 */
+#define SH4_DAR1_ADDR 0x3405 /* FFA00014 */
+#define SH4_DMATCR1_ADDR 0x3406 /* FFA00018 */
+#define SH4_CHCR1_ADDR 0x3407 /* FFA0001C */
+#define SH4_SAR2_ADDR 0x3408 /* FFA00020 */
+#define SH4_DAR2_ADDR 0x3409 /* FFA00024 */
+#define SH4_DMATCR2_ADDR 0x340A /* FFA00028 */
+#define SH4_CHCR2_ADDR 0x340B /* FFA0002C */
+#define SH4_SAR3_ADDR 0x340C /* FFA00030 */
+#define SH4_DAR3_ADDR 0x340D /* FFA00034 */
+#define SH4_DMATCR3_ADDR 0x340E /* FFA00038 */
+#define SH4_CHCR3_ADDR 0x340F /* FFA0003C */
+#define SH4_DMAOR_ADDR 0x3410 /* FFA00040 */
+#define SAR4 0x3414 /* FFA00050 */
+#define DAR4 0x3415 /* FFA00054 */
+#define DMATCR4 0x3416 /* FFA00058 */
+#define CHCR4 0x3417 /* FFA0005C */
+#define SAR5 0x3418 /* FFA00060 */
+#define DAR5 0x3419 /* FFA00064 */
+#define DMATCR5 0x341A /* FFA00068 */
+#define CHCR5 0x341B /* FFA0006C */
+#define SAR6 0x341C /* FFA00070 */
+#define DAR6 0x341D /* FFA00074 */
+#define DMATCR6 0x341E /* FFA00078 */
+#define CHCR6 0x341F /* FFA0007C */
+#define SAR7 0x3420 /* FFA00080 */
+#define DAR7 0x3421 /* FFA00084 */
+#define DMATCR7 0x3422 /* FFA00088 */
+#define CHCR7 0x3423 /* FFA0008C */
+#define FRQCR 0x3800 /* FFC00000 */
+#define STBCR 0x3801 /* FFC00004 */
+#define WTCNT 0x3802 /* FFC00008 */
+#define WTCSR 0x3803 /* FFC0000C */
+#define STBCR2 0x3804 /* FFC00010 */
+#define R64CNT 0x3900 /* FFC80000 */
+#define RSECCNT 0x3901 /* FFC80004 */
+#define RMINCNT 0x3902 /* FFC80008 */
+#define RHRCNT 0x3903 /* FFC8000C */
+#define RWKCNT 0x3904 /* FFC80010 */
+#define RDAYCNT 0x3905 /* FFC80014 */
+#define RMONCNT 0x3906 /* FFC80018 */
+#define RYRCNT 0x3907 /* FFC8001C */
+#define RSECAR 0x3908 /* FFC80020 */
+#define RMINAR 0x3909 /* FFC80024 */
+#define RHRAR 0x390A /* FFC80028 */
+#define RWKAR 0x390B /* FFC8002C */
+#define RDAYAR 0x390C /* FFC80030 */
+#define RMONAR 0x390D /* FFC80034 */
+#define RCR1 0x390E /* FFC80038 */
+#define RCR2 0x390F /* FFC8003C */
+#define RCR3 0x3914 /* FFC80050 */
+#define RYRAR 0x3915 /* FFC80054 */
+#define ICR 0x3A00 /* FFD00000 */
+#define IPRA 0x3A01 /* FFD00004 */
+#define IPRB 0x3A02 /* FFD00008 */
+#define IPRC 0x3A03 /* FFD0000C */
+#define IPRD 0x3A04 /* FFD00010 */
+#define INTPRI00 0x100 /* FE080000 */
+#define INTREQ00 0x108 /* FE080020 */
+#define INTMSK00 0x110 /* FE080040 */
+#define INTMSKCLR00 0x118 /* FE080060 */
+#define CLKSTP00 0x140 /* FE0A0000 */
+#define CLKSTPCLR00 0x142 /* FE0A0008 */
+#define TSTR2 0x201 /* FE100004 */
+#define TCOR3 0x202 /* FE100008 */
+#define TCNT3 0x203 /* FE10000C */
+#define TCR3 0x204 /* FE100010 */
+#define TCOR4 0x205 /* FE100014 */
+#define TCNT4 0x206 /* FE100018 */
+#define TCR4 0x207 /* FE10001C */
+#define SH4_TOCR_ADDR 0x3B00 /* FFD80000 */
+#define SH4_TSTR_ADDR 0x3B01 /* FFD80004 */
+#define SH4_TCOR0_ADDR 0x3B02 /* FFD80008 */
+#define SH4_TCNT0_ADDR 0x3B03 /* FFD8000C */
+#define SH4_TCR0_ADDR 0x3B04 /* FFD80010 */
+#define SH4_TCOR1_ADDR 0x3B05 /* FFD80014 */
+#define SH4_TCNT1_ADDR 0x3B06 /* FFD80018 */
+#define SH4_TCR1_ADDR 0x3B07 /* FFD8001C */
+#define SH4_TCOR2_ADDR 0x3B08 /* FFD80020 */
+#define SH4_TCNT2_ADDR 0x3B09 /* FFD80024 */
+#define SH4_TCR2_ADDR 0x3B0A /* FFD80028 */
+#define SH4_TCPR2_ADDR 0x3B0B /* FFD8002C */
+#define SCSMR1 0x3C00 /* FFE00000 */
+#define SCBRR1 0x3C01 /* FFE00004 */
+#define SCSCR1 0x3C02 /* FFE00008 */
+#define SCTDR1 0x3C03 /* FFE0000C */
+#define SCSSR1 0x3C04 /* FFE00010 */
+#define SCRDR1 0x3C05 /* FFE00014 */
+#define SCSCMR1 0x3C06 /* FFE00018 */
+#define SCSPTR1 0x3C07 /* FFE0001C */
+#define SCSMR2 0x3D00 /* FFE80000 */
+#define SCBRR2 0x3D01 /* FFE80004 */
+#define SCSCR2 0x3D02 /* FFE80008 */
+#define SCFTDR2 0x3D03 /* FFE8000C */
+#define SCFSR2 0x3D04 /* FFE80010 */
+#define SCFRDR2 0x3D05 /* FFE80014 */
+#define SCFCR2 0x3D06 /* FFE80018 */
+#define SCFDR2 0x3D07 /* FFE8001C */
+#define SCSPTR2 0x3D08 /* FFE80020 */
+#define SCLSR2 0x3D09 /* FFE80024 */
+#define SDIR 0x3E00 /* FFF00000 */
+#define SDDR 0x3E02 /* FFF00008 */
+#define SDINT 0x3E05 /* FFF00014 */
#define SIZEREGS 15878
-#define MMUCR_LRUI 0xfc000000
-#define MMUCR_URB 0x00fc0000
-#define MMUCR_URC 0x0000fc00
-#define MMUCR_SQMD 0x00000200
-#define MMUCR_SV 0x00000100
-#define MMUCR_TI 0x00000004
-#define MMUCR_AT 0x00000001
+#define MMUCR_LRUI 0xfc000000
+#define MMUCR_URB 0x00fc0000
+#define MMUCR_URC 0x0000fc00
+#define MMUCR_SQMD 0x00000200
+#define MMUCR_SV 0x00000100
+#define MMUCR_TI 0x00000004
+#define MMUCR_AT 0x00000001
/* constants */
-#define PVR_SH7091 0x040205c1
-#define PVR_SH7750 0x04020500 // from TN-SH7-361B/E
+#define PVR_SH7091 0x040205c1
+#define PVR_SH7750 0x04020500 // from TN-SH7-361B/E
#define PVR_SH7750S 0x04020600
#define PVR_SH7750R 0x04050000
#define PRR_SH7750R 0x00000100
diff --git a/src/emu/cpu/sh4/sh4tmu.c b/src/emu/cpu/sh4/sh4tmu.c
index d4f4a318082..660258275e8 100644
--- a/src/emu/cpu/sh4/sh4tmu.c
+++ b/src/emu/cpu/sh4/sh4tmu.c
@@ -321,4 +321,3 @@ void sh4_handle_tcpr2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask)
{
COMBINE_DATA(&sh4->SH4_TCPR2);
}
-
diff --git a/src/emu/cpu/sh4/sh4tmu.h b/src/emu/cpu/sh4/sh4tmu.h
index 7829b85a52e..8b782ebdb32 100644
--- a/src/emu/cpu/sh4/sh4tmu.h
+++ b/src/emu/cpu/sh4/sh4tmu.h
@@ -27,4 +27,3 @@ void sh4_handle_tcnt1_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask);
void sh4_handle_tcnt2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask);
void sh4_handle_tocr_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask);
void sh4_handle_tcpr2_addr_w(sh4_state *sh4, UINT32 data, UINT32 mem_mask);
-
diff --git a/src/emu/cpu/sharc/compute.c b/src/emu/cpu/sharc/compute.c
index e08fe87e9f0..1d026ea0339 100644
--- a/src/emu/cpu/sharc/compute.c
+++ b/src/emu/cpu/sharc/compute.c
@@ -2,32 +2,32 @@
#include <math.h>
-#define CLEAR_ALU_FLAGS() (cpustate->astat &= ~(AZ|AN|AV|AC|AS|AI))
+#define CLEAR_ALU_FLAGS() (cpustate->astat &= ~(AZ|AN|AV|AC|AS|AI))
-#define SET_FLAG_AZ(r) { cpustate->astat |= (((r) == 0) ? AZ : 0); }
-#define SET_FLAG_AN(r) { cpustate->astat |= (((r) & 0x80000000) ? AN : 0); }
-#define SET_FLAG_AC_ADD(r,a,b) { cpustate->astat |= (((UINT32)r < (UINT32)a) ? AC : 0); }
-#define SET_FLAG_AV_ADD(r,a,b) { cpustate->astat |= (((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); }
-#define SET_FLAG_AC_SUB(r,a,b) { cpustate->astat |= ((!((UINT32)a < (UINT32)b)) ? AC : 0); }
-#define SET_FLAG_AV_SUB(r,a,b) { cpustate->astat |= ((( ((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); }
+#define SET_FLAG_AZ(r) { cpustate->astat |= (((r) == 0) ? AZ : 0); }
+#define SET_FLAG_AN(r) { cpustate->astat |= (((r) & 0x80000000) ? AN : 0); }
+#define SET_FLAG_AC_ADD(r,a,b) { cpustate->astat |= (((UINT32)r < (UINT32)a) ? AC : 0); }
+#define SET_FLAG_AV_ADD(r,a,b) { cpustate->astat |= (((~((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); }
+#define SET_FLAG_AC_SUB(r,a,b) { cpustate->astat |= ((!((UINT32)a < (UINT32)b)) ? AC : 0); }
+#define SET_FLAG_AV_SUB(r,a,b) { cpustate->astat |= ((( ((a) ^ (b)) & ((a) ^ (r))) & 0x80000000) ? AV : 0); }
-#define IS_FLOAT_ZERO(r) ((((r) & 0x7fffffff) == 0))
-#define IS_FLOAT_DENORMAL(r) ((((r) & 0x7f800000) == 0) && (((r) & 0x7fffff) != 0))
-#define IS_FLOAT_NAN(r) ((((r) & 0x7f800000) == 0x7f800000) && (((r) & 0x7fffff) != 0))
-#define IS_FLOAT_INFINITY(r) (((r) & 0x7fffffff) == 0x7f800000)
+#define IS_FLOAT_ZERO(r) ((((r) & 0x7fffffff) == 0))
+#define IS_FLOAT_DENORMAL(r) ((((r) & 0x7f800000) == 0) && (((r) & 0x7fffff) != 0))
+#define IS_FLOAT_NAN(r) ((((r) & 0x7f800000) == 0x7f800000) && (((r) & 0x7fffff) != 0))
+#define IS_FLOAT_INFINITY(r) (((r) & 0x7fffffff) == 0x7f800000)
-#define CLEAR_MULTIPLIER_FLAGS() (cpustate->astat &= ~(MN|MV|MU|MI))
+#define CLEAR_MULTIPLIER_FLAGS() (cpustate->astat &= ~(MN|MV|MU|MI))
-#define SET_FLAG_MN(r) { cpustate->astat |= (((r) & 0x80000000) ? MN : 0); }
-#define SET_FLAG_MV(r) { cpustate->astat |= ((((UINT32)((r) >> 32) != 0) && ((UINT32)((r) >> 32) != 0xffffffff)) ? MV : 0); }
+#define SET_FLAG_MN(r) { cpustate->astat |= (((r) & 0x80000000) ? MN : 0); }
+#define SET_FLAG_MV(r) { cpustate->astat |= ((((UINT32)((r) >> 32) != 0) && ((UINT32)((r) >> 32) != 0xffffffff)) ? MV : 0); }
/* TODO: MU needs 80-bit result */
-#define SET_FLAG_MU(r) { cpustate->astat |= ((((UINT32)((r) >> 32) == 0) && ((UINT32)(r)) != 0) ? MU : 0); }
+#define SET_FLAG_MU(r) { cpustate->astat |= ((((UINT32)((r) >> 32) == 0) && ((UINT32)(r)) != 0) ? MU : 0); }
-#define FLOAT_SIGN 0x80000000
-#define FLOAT_INFINITY 0x7f800000
-#define FLOAT_MANTISSA 0x007fffff
+#define FLOAT_SIGN 0x80000000
+#define FLOAT_INFINITY 0x7f800000
+#define FLOAT_MANTISSA 0x007fffff
/*****************************************************************************/
@@ -566,7 +566,7 @@ INLINE void compute_fadd(SHARC_REGS *cpustate, int rn, int rx, int ry)
/* TODO: AV flag */
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(rn) = r.f;
cpustate->astat |= AF;
@@ -590,7 +590,7 @@ INLINE void compute_fsub(SHARC_REGS *cpustate, int rn, int rx, int ry)
/* TODO: AV flag */
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(rn) = r.f;
cpustate->astat |= AF;
@@ -611,7 +611,7 @@ INLINE void compute_fneg(SHARC_REGS *cpustate, int rn, int rx)
cpustate->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0;
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(rn) = r.f;
cpustate->astat |= AF;
@@ -633,7 +633,7 @@ INLINE void compute_fcomp(SHARC_REGS *cpustate, int rx, int ry)
cpustate->astat |= (IS_FLOAT_NAN(REG(rx)) || IS_FLOAT_NAN(REG(ry))) ? AI : 0;
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
// Update ASTAT compare accumulation register
comp_accum = (cpustate->astat >> 24) & 0xff;
@@ -663,7 +663,7 @@ INLINE void compute_fabs_plus(SHARC_REGS *cpustate, int rn, int rx, int ry)
/* TODO: AV flag */
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(rn) = r.f;
cpustate->astat |= AF;
@@ -801,7 +801,7 @@ INLINE void compute_recips(SHARC_REGS *cpustate, int rn, int rx)
cpustate->astat |= (IS_FLOAT_NAN(REG(rx))) ? AI : 0;
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
}
// AF
@@ -828,7 +828,7 @@ INLINE void compute_rsqrts(SHARC_REGS *cpustate, int rn, int rx)
}
else
{
- UINT32 mantissa = REG(rx) & 0xffffff; // mantissa + LSB of biased exponent
+ UINT32 mantissa = REG(rx) & 0xffffff; // mantissa + LSB of biased exponent
UINT32 exponent = (REG(rx) >> 23) & 0xff;
UINT32 sign = REG(rx) & FLOAT_SIGN;
@@ -849,7 +849,7 @@ INLINE void compute_rsqrts(SHARC_REGS *cpustate, int rn, int rx)
// AI
cpustate->astat |= (IS_FLOAT_NAN(REG(rx)) || (REG(rx) & 0x80000000)) ? AI : 0;
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
// AF
cpustate->astat |= AF;
@@ -969,13 +969,13 @@ INLINE void compute_multi_mr_to_reg(SHARC_REGS *cpustate, int ai, int rk)
{
switch(ai)
{
- case 0: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrf)); break;
- case 1: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrf >> 32)); break;
- case 2: fatalerror("SHARC: tried to load MR2F\n"); break;
- case 4: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrb)); break;
- case 5: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrb >> 32)); break;
- case 6: fatalerror("SHARC: tried to load MR2B\n"); break;
- default: fatalerror("SHARC: unknown ai %d in mr_to_reg\n", ai);
+ case 0: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrf)); break;
+ case 1: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrf >> 32)); break;
+ case 2: fatalerror("SHARC: tried to load MR2F\n"); break;
+ case 4: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrb)); break;
+ case 5: SET_UREG(cpustate, rk, (UINT32)(cpustate->mrb >> 32)); break;
+ case 6: fatalerror("SHARC: tried to load MR2B\n"); break;
+ default: fatalerror("SHARC: unknown ai %d in mr_to_reg\n", ai);
}
CLEAR_MULTIPLIER_FLAGS();
@@ -985,13 +985,13 @@ INLINE void compute_multi_reg_to_mr(SHARC_REGS *cpustate, int ai, int rk)
{
switch(ai)
{
- case 0: cpustate->mrf &= ~0xffffffff; cpustate->mrf |= GET_UREG(cpustate, rk); break;
- case 1: cpustate->mrf &= 0xffffffff; cpustate->mrf |= (UINT64)(GET_UREG(cpustate, rk)) << 32; break;
- case 2: fatalerror("SHARC: tried to write MR2F\n"); break;
- case 4: cpustate->mrb &= ~0xffffffff; cpustate->mrb |= GET_UREG(cpustate, rk); break;
- case 5: cpustate->mrb &= 0xffffffff; cpustate->mrb |= (UINT64)(GET_UREG(cpustate, rk)) << 32; break;
- case 6: fatalerror("SHARC: tried to write MR2B\n"); break;
- default: fatalerror("SHARC: unknown ai %d in reg_to_mr\n", ai);
+ case 0: cpustate->mrf &= ~0xffffffff; cpustate->mrf |= GET_UREG(cpustate, rk); break;
+ case 1: cpustate->mrf &= 0xffffffff; cpustate->mrf |= (UINT64)(GET_UREG(cpustate, rk)) << 32; break;
+ case 2: fatalerror("SHARC: tried to write MR2F\n"); break;
+ case 4: cpustate->mrb &= ~0xffffffff; cpustate->mrb |= GET_UREG(cpustate, rk); break;
+ case 5: cpustate->mrb &= 0xffffffff; cpustate->mrb |= (UINT64)(GET_UREG(cpustate, rk)) << 32; break;
+ case 6: fatalerror("SHARC: tried to write MR2B\n"); break;
+ default: fatalerror("SHARC: unknown ai %d in reg_to_mr\n", ai);
}
CLEAR_MULTIPLIER_FLAGS();
@@ -1102,7 +1102,7 @@ INLINE void compute_dual_fadd_fsub(SHARC_REGS *cpustate, int ra, int rs, int rx,
/* TODO: AV flag */
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(ra) = r_add.f;
FREG(rs) = r_sub.f;
@@ -1133,7 +1133,7 @@ INLINE void compute_fmul_fadd(SHARC_REGS *cpustate, int fm, int fxm, int fym, in
/* TODO: AV flag */
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(fm) = r_mul.f;
FREG(fa) = r_add.f;
@@ -1164,7 +1164,7 @@ INLINE void compute_fmul_fsub(SHARC_REGS *cpustate, int fm, int fxm, int fym, in
/* TODO: AV flag */
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(fm) = r_mul.f;
FREG(fa) = r_sub.f;
@@ -1329,7 +1329,7 @@ INLINE void compute_fmul_dual_fadd_fsub(SHARC_REGS *cpustate, int fm, int fxm, i
/* TODO: AV flag */
// AIS
- if (cpustate->astat & AI) cpustate->stky |= AIS;
+ if (cpustate->astat & AI) cpustate->stky |= AIS;
FREG(fm) = r_mul.f;
FREG(fa) = r_add.f;
diff --git a/src/emu/cpu/sharc/sharc.c b/src/emu/cpu/sharc/sharc.c
index cbe1db9a9c0..8e3b0ff0bce 100644
--- a/src/emu/cpu/sharc/sharc.c
+++ b/src/emu/cpu/sharc/sharc.c
@@ -11,32 +11,32 @@ CPU_DISASSEMBLE( sharc );
enum
{
- SHARC_PC=1, SHARC_PCSTK, SHARC_MODE1, SHARC_MODE2,
- SHARC_ASTAT, SHARC_STKY, SHARC_IRPTL, SHARC_IMASK,
- SHARC_IMASKP, SHARC_USTAT1, SHARC_USTAT2, SHARC_LCNTR,
- SHARC_R0, SHARC_R1, SHARC_R2, SHARC_R3,
- SHARC_R4, SHARC_R5, SHARC_R6, SHARC_R7,
- SHARC_R8, SHARC_R9, SHARC_R10, SHARC_R11,
- SHARC_R12, SHARC_R13, SHARC_R14, SHARC_R15,
- SHARC_SYSCON, SHARC_SYSSTAT, SHARC_MRF, SHARC_MRB,
- SHARC_STSTKP, SHARC_PCSTKP, SHARC_LSTKP,
- SHARC_FADDR, SHARC_DADDR,
- SHARC_I0, SHARC_I1, SHARC_I2, SHARC_I3,
- SHARC_I4, SHARC_I5, SHARC_I6, SHARC_I7,
- SHARC_I8, SHARC_I9, SHARC_I10, SHARC_I11,
- SHARC_I12, SHARC_I13, SHARC_I14, SHARC_I15,
- SHARC_M0, SHARC_M1, SHARC_M2, SHARC_M3,
- SHARC_M4, SHARC_M5, SHARC_M6, SHARC_M7,
- SHARC_M8, SHARC_M9, SHARC_M10, SHARC_M11,
- SHARC_M12, SHARC_M13, SHARC_M14, SHARC_M15,
- SHARC_L0, SHARC_L1, SHARC_L2, SHARC_L3,
- SHARC_L4, SHARC_L5, SHARC_L6, SHARC_L7,
- SHARC_L8, SHARC_L9, SHARC_L10, SHARC_L11,
- SHARC_L12, SHARC_L13, SHARC_L14, SHARC_L15,
- SHARC_B0, SHARC_B1, SHARC_B2, SHARC_B3,
- SHARC_B4, SHARC_B5, SHARC_B6, SHARC_B7,
- SHARC_B8, SHARC_B9, SHARC_B10, SHARC_B11,
- SHARC_B12, SHARC_B13, SHARC_B14, SHARC_B15,
+ SHARC_PC=1, SHARC_PCSTK, SHARC_MODE1, SHARC_MODE2,
+ SHARC_ASTAT, SHARC_STKY, SHARC_IRPTL, SHARC_IMASK,
+ SHARC_IMASKP, SHARC_USTAT1, SHARC_USTAT2, SHARC_LCNTR,
+ SHARC_R0, SHARC_R1, SHARC_R2, SHARC_R3,
+ SHARC_R4, SHARC_R5, SHARC_R6, SHARC_R7,
+ SHARC_R8, SHARC_R9, SHARC_R10, SHARC_R11,
+ SHARC_R12, SHARC_R13, SHARC_R14, SHARC_R15,
+ SHARC_SYSCON, SHARC_SYSSTAT, SHARC_MRF, SHARC_MRB,
+ SHARC_STSTKP, SHARC_PCSTKP, SHARC_LSTKP,
+ SHARC_FADDR, SHARC_DADDR,
+ SHARC_I0, SHARC_I1, SHARC_I2, SHARC_I3,
+ SHARC_I4, SHARC_I5, SHARC_I6, SHARC_I7,
+ SHARC_I8, SHARC_I9, SHARC_I10, SHARC_I11,
+ SHARC_I12, SHARC_I13, SHARC_I14, SHARC_I15,
+ SHARC_M0, SHARC_M1, SHARC_M2, SHARC_M3,
+ SHARC_M4, SHARC_M5, SHARC_M6, SHARC_M7,
+ SHARC_M8, SHARC_M9, SHARC_M10, SHARC_M11,
+ SHARC_M12, SHARC_M13, SHARC_M14, SHARC_M15,
+ SHARC_L0, SHARC_L1, SHARC_L2, SHARC_L3,
+ SHARC_L4, SHARC_L5, SHARC_L6, SHARC_L7,
+ SHARC_L8, SHARC_L9, SHARC_L10, SHARC_L11,
+ SHARC_L12, SHARC_L13, SHARC_L14, SHARC_L15,
+ SHARC_B0, SHARC_B1, SHARC_B2, SHARC_B3,
+ SHARC_B4, SHARC_B5, SHARC_B6, SHARC_B7,
+ SHARC_B8, SHARC_B9, SHARC_B10, SHARC_B11,
+ SHARC_B12, SHARC_B13, SHARC_B14, SHARC_B15,
};
struct SHARC_DAG
@@ -110,8 +110,8 @@ struct SHARC_REGS
UINT32 lcntr;
/* Data Address Generator (DAG) */
- SHARC_DAG dag1; // (DM bus)
- SHARC_DAG dag2; // (PM bus)
+ SHARC_DAG dag1; // (DM bus)
+ SHARC_DAG dag2; // (PM bus)
SHARC_DAG dag1_alt;
SHARC_DAG dag2_alt;
@@ -190,7 +190,7 @@ static void (* sharc_op[512])(SHARC_REGS *cpustate);
-#define ROPCODE(pc) ((UINT64)(cpustate->internal_ram[((pc-0x20000) * 3) + 0]) << 32) | \
+#define ROPCODE(pc) ((UINT64)(cpustate->internal_ram[((pc-0x20000) * 3) + 0]) << 32) | \
((UINT64)(cpustate->internal_ram[((pc-0x20000) * 3) + 1]) << 16) | \
((UINT64)(cpustate->internal_ram[((pc-0x20000) * 3) + 2]) << 0)
@@ -241,7 +241,7 @@ static TIMER_CALLBACK(sharc_iop_delayed_write_callback)
break;
}
- default: fatalerror("SHARC: sharc_iop_delayed_write: unknown IOP register %02X\n", cpustate->iop_delayed_reg);
+ default: fatalerror("SHARC: sharc_iop_delayed_write: unknown IOP register %02X\n", cpustate->iop_delayed_reg);
}
cpustate->delayed_iop_timer->adjust(attotime::never, 0);
@@ -261,13 +261,13 @@ static UINT32 sharc_iop_r(SHARC_REGS *cpustate, UINT32 address)
{
switch (address)
{
- case 0x00: return 0; // System configuration
+ case 0x00: return 0; // System configuration
- case 0x37: // DMA status
+ case 0x37: // DMA status
{
return cpustate->dma_status;
}
- default: fatalerror("sharc_iop_r: Unimplemented IOP reg %02X at %08X\n", address, cpustate->pc);
+ default: fatalerror("sharc_iop_r: Unimplemented IOP reg %02X at %08X\n", address, cpustate->pc);
}
return 0;
}
@@ -276,17 +276,17 @@ static void sharc_iop_w(SHARC_REGS *cpustate, UINT32 address, UINT32 data)
{
switch (address)
{
- case 0x00: break; // System configuration
- case 0x02: break; // External Memory Wait State Configuration
-
- case 0x08: break; // Message Register 0
- case 0x09: break; // Message Register 1
- case 0x0a: break; // Message Register 2
- case 0x0b: break; // Message Register 3
- case 0x0c: break; // Message Register 4
- case 0x0d: break; // Message Register 5
- case 0x0e: break; // Message Register 6
- case 0x0f: break; // Message Register 7
+ case 0x00: break; // System configuration
+ case 0x02: break; // External Memory Wait State Configuration
+
+ case 0x08: break; // Message Register 0
+ case 0x09: break; // Message Register 1
+ case 0x0a: break; // Message Register 2
+ case 0x0b: break; // Message Register 3
+ case 0x0c: break; // Message Register 4
+ case 0x0d: break; // Message Register 5
+ case 0x0e: break; // Message Register 6
+ case 0x0f: break; // Message Register 7
// DMA 6
case 0x1c:
@@ -324,7 +324,7 @@ static void sharc_iop_w(SHARC_REGS *cpustate, UINT32 address, UINT32 data)
case 0x4e: cpustate->dma[7].ext_modifier = data; return;
case 0x4f: cpustate->dma[7].ext_count = data; return;
- default: fatalerror("sharc_iop_w: Unimplemented IOP reg %02X, %08X at %08X\n", address, data, cpustate->pc);
+ default: fatalerror("sharc_iop_w: Unimplemented IOP reg %02X, %08X at %08X\n", address, data, cpustate->pc);
}
}
@@ -391,7 +391,7 @@ void sharc_external_dma_write(device_t *device, UINT32 address, UINT64 data)
SHARC_REGS *cpustate = get_safe_token(device);
switch ((cpustate->dma[6].control >> 6) & 0x3)
{
- case 2: // 16/48 packing
+ case 2: // 16/48 packing
{
int shift = address % 3;
UINT64 r = pm_read48(cpustate, cpustate->dma[6].int_index);
@@ -430,7 +430,7 @@ static CPU_INIT( sharc )
build_opcode_table();
- cpustate->internal_ram = auto_alloc_array(device->machine(), UINT16, 2 * 0x10000); // 2x 128KB
+ cpustate->internal_ram = auto_alloc_array(device->machine(), UINT16, 2 * 0x10000); // 2x 128KB
cpustate->internal_ram_block0 = &cpustate->internal_ram[0];
cpustate->internal_ram_block1 = &cpustate->internal_ram[0x20000/2];
@@ -570,13 +570,13 @@ static CPU_RESET( sharc )
{
case BOOT_MODE_EPROM:
{
- cpustate->dma[6].int_index = 0x20000;
- cpustate->dma[6].int_modifier = 1;
- cpustate->dma[6].int_count = 0x100;
- cpustate->dma[6].ext_index = 0x400000;
- cpustate->dma[6].ext_modifier = 1;
- cpustate->dma[6].ext_count = 0x600;
- cpustate->dma[6].control = 0x2a1;
+ cpustate->dma[6].int_index = 0x20000;
+ cpustate->dma[6].int_modifier = 1;
+ cpustate->dma[6].int_count = 0x100;
+ cpustate->dma[6].ext_index = 0x400000;
+ cpustate->dma[6].ext_modifier = 1;
+ cpustate->dma[6].ext_count = 0x600;
+ cpustate->dma[6].control = 0x2a1;
sharc_dma_exec(cpustate, 6);
dma_op(cpustate, 6);
@@ -715,7 +715,7 @@ static CPU_EXECUTE( sharc )
{
switch (cpustate->laddr.loop_type)
{
- case 0: // arithmetic condition-based
+ case 0: // arithmetic condition-based
{
int condition = cpustate->laddr.code;
@@ -740,17 +740,17 @@ static CPU_EXECUTE( sharc )
cpustate->astat = cpustate->astat_old;
break;
}
- case 1: // counter-based, length 1
+ case 1: // counter-based, length 1
{
//fatalerror("SHARC: counter-based loop, length 1 at %08X\n", cpustate->pc);
//break;
}
- case 2: // counter-based, length 2
+ case 2: // counter-based, length 2
{
//fatalerror("SHARC: counter-based loop, length 2 at %08X\n", cpustate->pc);
//break;
}
- case 3: // counter-based, length >2
+ case 3: // counter-based, length >2
{
--cpustate->lcstack[cpustate->lstkp];
--cpustate->curlcntr;
@@ -797,94 +797,94 @@ static CPU_SET_INFO( sharc )
switch (state)
{
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SHARC_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_FADDR: cpustate->faddr = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_DADDR: cpustate->daddr = info->i; break;
-
- case CPUINFO_INT_REGISTER + SHARC_R0: cpustate->r[0].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R1: cpustate->r[1].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R2: cpustate->r[2].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R3: cpustate->r[3].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R4: cpustate->r[4].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R5: cpustate->r[5].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R6: cpustate->r[6].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R7: cpustate->r[7].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R8: cpustate->r[8].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R9: cpustate->r[9].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R10: cpustate->r[10].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R11: cpustate->r[11].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R12: cpustate->r[12].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R13: cpustate->r[13].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R14: cpustate->r[14].r = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_R15: cpustate->r[15].r = info->i; break;
-
- case CPUINFO_INT_REGISTER + SHARC_I0: cpustate->dag1.i[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I1: cpustate->dag1.i[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I2: cpustate->dag1.i[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I3: cpustate->dag1.i[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I4: cpustate->dag1.i[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I5: cpustate->dag1.i[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I6: cpustate->dag1.i[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I7: cpustate->dag1.i[7] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I8: cpustate->dag2.i[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I9: cpustate->dag2.i[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I10: cpustate->dag2.i[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I11: cpustate->dag2.i[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I12: cpustate->dag2.i[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I13: cpustate->dag2.i[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I14: cpustate->dag2.i[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_I15: cpustate->dag2.i[7] = info->i; break;
-
- case CPUINFO_INT_REGISTER + SHARC_M0: cpustate->dag1.m[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M1: cpustate->dag1.m[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M2: cpustate->dag1.m[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M3: cpustate->dag1.m[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M4: cpustate->dag1.m[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M5: cpustate->dag1.m[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M6: cpustate->dag1.m[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M7: cpustate->dag1.m[7] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M8: cpustate->dag2.m[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M9: cpustate->dag2.m[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M10: cpustate->dag2.m[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M11: cpustate->dag2.m[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M12: cpustate->dag2.m[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M13: cpustate->dag2.m[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M14: cpustate->dag2.m[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_M15: cpustate->dag2.m[7] = info->i; break;
-
- case CPUINFO_INT_REGISTER + SHARC_L0: cpustate->dag1.l[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L1: cpustate->dag1.l[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L2: cpustate->dag1.l[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L3: cpustate->dag1.l[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L4: cpustate->dag1.l[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L5: cpustate->dag1.l[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L6: cpustate->dag1.l[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L7: cpustate->dag1.l[7] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L8: cpustate->dag2.l[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L9: cpustate->dag2.l[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L10: cpustate->dag2.l[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L11: cpustate->dag2.l[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L12: cpustate->dag2.l[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L13: cpustate->dag2.l[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L14: cpustate->dag2.l[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_L15: cpustate->dag2.m[7] = info->i; break;
-
- case CPUINFO_INT_REGISTER + SHARC_B0: cpustate->dag1.b[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B1: cpustate->dag1.b[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B2: cpustate->dag1.b[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B3: cpustate->dag1.b[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B4: cpustate->dag1.b[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B5: cpustate->dag1.b[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B6: cpustate->dag1.b[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B7: cpustate->dag1.b[7] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B8: cpustate->dag2.b[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B9: cpustate->dag2.b[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B10: cpustate->dag2.b[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B11: cpustate->dag2.b[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B12: cpustate->dag2.b[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B13: cpustate->dag2.b[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B14: cpustate->dag2.b[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SHARC_B15: cpustate->dag2.b[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_FADDR: cpustate->faddr = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_DADDR: cpustate->daddr = info->i; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_R0: cpustate->r[0].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R1: cpustate->r[1].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R2: cpustate->r[2].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R3: cpustate->r[3].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R4: cpustate->r[4].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R5: cpustate->r[5].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R6: cpustate->r[6].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R7: cpustate->r[7].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R8: cpustate->r[8].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R9: cpustate->r[9].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R10: cpustate->r[10].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R11: cpustate->r[11].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R12: cpustate->r[12].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R13: cpustate->r[13].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R14: cpustate->r[14].r = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_R15: cpustate->r[15].r = info->i; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_I0: cpustate->dag1.i[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I1: cpustate->dag1.i[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I2: cpustate->dag1.i[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I3: cpustate->dag1.i[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I4: cpustate->dag1.i[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I5: cpustate->dag1.i[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I6: cpustate->dag1.i[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I7: cpustate->dag1.i[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I8: cpustate->dag2.i[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I9: cpustate->dag2.i[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I10: cpustate->dag2.i[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I11: cpustate->dag2.i[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I12: cpustate->dag2.i[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I13: cpustate->dag2.i[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I14: cpustate->dag2.i[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_I15: cpustate->dag2.i[7] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_M0: cpustate->dag1.m[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M1: cpustate->dag1.m[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M2: cpustate->dag1.m[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M3: cpustate->dag1.m[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M4: cpustate->dag1.m[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M5: cpustate->dag1.m[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M6: cpustate->dag1.m[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M7: cpustate->dag1.m[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M8: cpustate->dag2.m[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M9: cpustate->dag2.m[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M10: cpustate->dag2.m[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M11: cpustate->dag2.m[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M12: cpustate->dag2.m[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M13: cpustate->dag2.m[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M14: cpustate->dag2.m[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_M15: cpustate->dag2.m[7] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_L0: cpustate->dag1.l[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L1: cpustate->dag1.l[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L2: cpustate->dag1.l[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L3: cpustate->dag1.l[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L4: cpustate->dag1.l[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L5: cpustate->dag1.l[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L6: cpustate->dag1.l[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L7: cpustate->dag1.l[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L8: cpustate->dag2.l[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L9: cpustate->dag2.l[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L10: cpustate->dag2.l[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L11: cpustate->dag2.l[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L12: cpustate->dag2.l[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L13: cpustate->dag2.l[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L14: cpustate->dag2.l[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_L15: cpustate->dag2.m[7] = info->i; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_B0: cpustate->dag1.b[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B1: cpustate->dag1.b[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B2: cpustate->dag1.b[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B3: cpustate->dag1.b[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B4: cpustate->dag1.b[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B5: cpustate->dag1.b[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B6: cpustate->dag1.b[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B7: cpustate->dag1.b[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B8: cpustate->dag2.b[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B9: cpustate->dag2.b[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B10: cpustate->dag2.b[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B11: cpustate->dag2.b[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B12: cpustate->dag2.b[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B13: cpustate->dag2.b[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B14: cpustate->dag2.b[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SHARC_B15: cpustate->dag2.b[7] = info->i; break;
}
}
@@ -902,7 +902,7 @@ static CPU_SET_INFO( adsp21062 )
}
switch(state)
{
- default: CPU_SET_INFO_CALL(sharc); break;
+ default: CPU_SET_INFO_CALL(sharc); break;
}
}
@@ -1007,251 +1007,251 @@ static CPU_GET_INFO( sharc )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(SHARC_REGS); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 32; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -2; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(SHARC_REGS); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 32; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 64; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -3; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -2; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SHARC_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + SHARC_PCSTK: info->i = cpustate->pcstk; break;
- case CPUINFO_INT_REGISTER + SHARC_PCSTKP: info->i = cpustate->pcstkp; break;
- case CPUINFO_INT_REGISTER + SHARC_LSTKP: info->i = cpustate->lstkp; break;
- case CPUINFO_INT_REGISTER + SHARC_FADDR: info->i = cpustate->faddr; break;
- case CPUINFO_INT_REGISTER + SHARC_DADDR: info->i = cpustate->daddr; break;
- case CPUINFO_INT_REGISTER + SHARC_MODE1: info->i = cpustate->mode1; break;
- case CPUINFO_INT_REGISTER + SHARC_MODE2: info->i = cpustate->mode2; break;
- case CPUINFO_INT_REGISTER + SHARC_ASTAT: info->i = cpustate->astat; break;
- case CPUINFO_INT_REGISTER + SHARC_IRPTL: info->i = cpustate->irptl; break;
- case CPUINFO_INT_REGISTER + SHARC_IMASK: info->i = cpustate->imask; break;
- case CPUINFO_INT_REGISTER + SHARC_USTAT1: info->i = cpustate->ustat1; break;
- case CPUINFO_INT_REGISTER + SHARC_USTAT2: info->i = cpustate->ustat2; break;
- case CPUINFO_INT_REGISTER + SHARC_STSTKP: info->i = cpustate->status_stkp; break;
-
- case CPUINFO_INT_REGISTER + SHARC_R0: info->i = cpustate->r[0].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R1: info->i = cpustate->r[1].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R2: info->i = cpustate->r[2].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R3: info->i = cpustate->r[3].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R4: info->i = cpustate->r[4].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R5: info->i = cpustate->r[5].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R6: info->i = cpustate->r[6].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R7: info->i = cpustate->r[7].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R8: info->i = cpustate->r[8].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R9: info->i = cpustate->r[9].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R10: info->i = cpustate->r[10].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R11: info->i = cpustate->r[11].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R12: info->i = cpustate->r[12].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R13: info->i = cpustate->r[13].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R14: info->i = cpustate->r[14].r; break;
- case CPUINFO_INT_REGISTER + SHARC_R15: info->i = cpustate->r[15].r; break;
-
- case CPUINFO_INT_REGISTER + SHARC_I0: info->i = cpustate->dag1.i[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_I1: info->i = cpustate->dag1.i[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_I2: info->i = cpustate->dag1.i[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_I3: info->i = cpustate->dag1.i[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_I4: info->i = cpustate->dag1.i[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_I5: info->i = cpustate->dag1.i[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_I6: info->i = cpustate->dag1.i[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_I7: info->i = cpustate->dag1.i[7]; break;
- case CPUINFO_INT_REGISTER + SHARC_I8: info->i = cpustate->dag2.i[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_I9: info->i = cpustate->dag2.i[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_I10: info->i = cpustate->dag2.i[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_I11: info->i = cpustate->dag2.i[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_I12: info->i = cpustate->dag2.i[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_I13: info->i = cpustate->dag2.i[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_I14: info->i = cpustate->dag2.i[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_I15: info->i = cpustate->dag2.i[7]; break;
-
- case CPUINFO_INT_REGISTER + SHARC_M0: info->i = cpustate->dag1.m[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_M1: info->i = cpustate->dag1.m[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_M2: info->i = cpustate->dag1.m[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_M3: info->i = cpustate->dag1.m[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_M4: info->i = cpustate->dag1.m[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_M5: info->i = cpustate->dag1.m[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_M6: info->i = cpustate->dag1.m[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_M7: info->i = cpustate->dag1.m[7]; break;
- case CPUINFO_INT_REGISTER + SHARC_M8: info->i = cpustate->dag2.m[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_M9: info->i = cpustate->dag2.m[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_M10: info->i = cpustate->dag2.m[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_M11: info->i = cpustate->dag2.m[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_M12: info->i = cpustate->dag2.m[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_M13: info->i = cpustate->dag2.m[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_M14: info->i = cpustate->dag2.m[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_M15: info->i = cpustate->dag2.m[7]; break;
-
- case CPUINFO_INT_REGISTER + SHARC_L0: info->i = cpustate->dag1.l[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_L1: info->i = cpustate->dag1.l[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_L2: info->i = cpustate->dag1.l[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_L3: info->i = cpustate->dag1.l[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_L4: info->i = cpustate->dag1.l[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_L5: info->i = cpustate->dag1.l[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_L6: info->i = cpustate->dag1.l[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_L7: info->i = cpustate->dag1.l[7]; break;
- case CPUINFO_INT_REGISTER + SHARC_L8: info->i = cpustate->dag2.l[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_L9: info->i = cpustate->dag2.l[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_L10: info->i = cpustate->dag2.l[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_L11: info->i = cpustate->dag2.l[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_L12: info->i = cpustate->dag2.l[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_L13: info->i = cpustate->dag2.l[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_L14: info->i = cpustate->dag2.l[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_L15: info->i = cpustate->dag2.l[7]; break;
-
- case CPUINFO_INT_REGISTER + SHARC_B0: info->i = cpustate->dag1.b[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_B1: info->i = cpustate->dag1.b[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_B2: info->i = cpustate->dag1.b[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_B3: info->i = cpustate->dag1.b[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_B4: info->i = cpustate->dag1.b[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_B5: info->i = cpustate->dag1.b[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_B6: info->i = cpustate->dag1.b[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_B7: info->i = cpustate->dag1.b[7]; break;
- case CPUINFO_INT_REGISTER + SHARC_B8: info->i = cpustate->dag2.b[0]; break;
- case CPUINFO_INT_REGISTER + SHARC_B9: info->i = cpustate->dag2.b[1]; break;
- case CPUINFO_INT_REGISTER + SHARC_B10: info->i = cpustate->dag2.b[2]; break;
- case CPUINFO_INT_REGISTER + SHARC_B11: info->i = cpustate->dag2.b[3]; break;
- case CPUINFO_INT_REGISTER + SHARC_B12: info->i = cpustate->dag2.b[4]; break;
- case CPUINFO_INT_REGISTER + SHARC_B13: info->i = cpustate->dag2.b[5]; break;
- case CPUINFO_INT_REGISTER + SHARC_B14: info->i = cpustate->dag2.b[6]; break;
- case CPUINFO_INT_REGISTER + SHARC_B15: info->i = cpustate->dag2.b[7]; break;
+ case CPUINFO_INT_REGISTER + SHARC_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + SHARC_PCSTK: info->i = cpustate->pcstk; break;
+ case CPUINFO_INT_REGISTER + SHARC_PCSTKP: info->i = cpustate->pcstkp; break;
+ case CPUINFO_INT_REGISTER + SHARC_LSTKP: info->i = cpustate->lstkp; break;
+ case CPUINFO_INT_REGISTER + SHARC_FADDR: info->i = cpustate->faddr; break;
+ case CPUINFO_INT_REGISTER + SHARC_DADDR: info->i = cpustate->daddr; break;
+ case CPUINFO_INT_REGISTER + SHARC_MODE1: info->i = cpustate->mode1; break;
+ case CPUINFO_INT_REGISTER + SHARC_MODE2: info->i = cpustate->mode2; break;
+ case CPUINFO_INT_REGISTER + SHARC_ASTAT: info->i = cpustate->astat; break;
+ case CPUINFO_INT_REGISTER + SHARC_IRPTL: info->i = cpustate->irptl; break;
+ case CPUINFO_INT_REGISTER + SHARC_IMASK: info->i = cpustate->imask; break;
+ case CPUINFO_INT_REGISTER + SHARC_USTAT1: info->i = cpustate->ustat1; break;
+ case CPUINFO_INT_REGISTER + SHARC_USTAT2: info->i = cpustate->ustat2; break;
+ case CPUINFO_INT_REGISTER + SHARC_STSTKP: info->i = cpustate->status_stkp; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_R0: info->i = cpustate->r[0].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R1: info->i = cpustate->r[1].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R2: info->i = cpustate->r[2].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R3: info->i = cpustate->r[3].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R4: info->i = cpustate->r[4].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R5: info->i = cpustate->r[5].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R6: info->i = cpustate->r[6].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R7: info->i = cpustate->r[7].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R8: info->i = cpustate->r[8].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R9: info->i = cpustate->r[9].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R10: info->i = cpustate->r[10].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R11: info->i = cpustate->r[11].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R12: info->i = cpustate->r[12].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R13: info->i = cpustate->r[13].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R14: info->i = cpustate->r[14].r; break;
+ case CPUINFO_INT_REGISTER + SHARC_R15: info->i = cpustate->r[15].r; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_I0: info->i = cpustate->dag1.i[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I1: info->i = cpustate->dag1.i[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I2: info->i = cpustate->dag1.i[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I3: info->i = cpustate->dag1.i[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I4: info->i = cpustate->dag1.i[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I5: info->i = cpustate->dag1.i[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I6: info->i = cpustate->dag1.i[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I7: info->i = cpustate->dag1.i[7]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I8: info->i = cpustate->dag2.i[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I9: info->i = cpustate->dag2.i[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I10: info->i = cpustate->dag2.i[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I11: info->i = cpustate->dag2.i[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I12: info->i = cpustate->dag2.i[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I13: info->i = cpustate->dag2.i[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I14: info->i = cpustate->dag2.i[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_I15: info->i = cpustate->dag2.i[7]; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_M0: info->i = cpustate->dag1.m[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M1: info->i = cpustate->dag1.m[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M2: info->i = cpustate->dag1.m[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M3: info->i = cpustate->dag1.m[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M4: info->i = cpustate->dag1.m[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M5: info->i = cpustate->dag1.m[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M6: info->i = cpustate->dag1.m[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M7: info->i = cpustate->dag1.m[7]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M8: info->i = cpustate->dag2.m[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M9: info->i = cpustate->dag2.m[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M10: info->i = cpustate->dag2.m[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M11: info->i = cpustate->dag2.m[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M12: info->i = cpustate->dag2.m[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M13: info->i = cpustate->dag2.m[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M14: info->i = cpustate->dag2.m[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_M15: info->i = cpustate->dag2.m[7]; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_L0: info->i = cpustate->dag1.l[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L1: info->i = cpustate->dag1.l[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L2: info->i = cpustate->dag1.l[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L3: info->i = cpustate->dag1.l[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L4: info->i = cpustate->dag1.l[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L5: info->i = cpustate->dag1.l[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L6: info->i = cpustate->dag1.l[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L7: info->i = cpustate->dag1.l[7]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L8: info->i = cpustate->dag2.l[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L9: info->i = cpustate->dag2.l[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L10: info->i = cpustate->dag2.l[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L11: info->i = cpustate->dag2.l[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L12: info->i = cpustate->dag2.l[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L13: info->i = cpustate->dag2.l[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L14: info->i = cpustate->dag2.l[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_L15: info->i = cpustate->dag2.l[7]; break;
+
+ case CPUINFO_INT_REGISTER + SHARC_B0: info->i = cpustate->dag1.b[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B1: info->i = cpustate->dag1.b[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B2: info->i = cpustate->dag1.b[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B3: info->i = cpustate->dag1.b[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B4: info->i = cpustate->dag1.b[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B5: info->i = cpustate->dag1.b[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B6: info->i = cpustate->dag1.b[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B7: info->i = cpustate->dag1.b[7]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B8: info->i = cpustate->dag2.b[0]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B9: info->i = cpustate->dag2.b[1]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B10: info->i = cpustate->dag2.b[2]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B11: info->i = cpustate->dag2.b[3]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B12: info->i = cpustate->dag2.b[4]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B13: info->i = cpustate->dag2.b[5]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B14: info->i = cpustate->dag2.b[6]; break;
+ case CPUINFO_INT_REGISTER + SHARC_B15: info->i = cpustate->dag2.b[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sharc); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sharc); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(sharc); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sharc);break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sharc); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(sharc); break;
- case CPUINFO_FCT_READOP: info->readop = CPU_READOP_NAME(sharc); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sharc); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sharc); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(sharc); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sharc);break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sharc); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(sharc); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_READOP_NAME(sharc); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map64 = ADDRESS_MAP_NAME(internal_pgm); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_FAMILY: strcpy(info->s, "SHARC"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.01"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + SHARC_PC: sprintf(info->s, "PC: %08X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + SHARC_PCSTK: sprintf(info->s, "PCSTK: %08X", cpustate->pcstk); break;
- case CPUINFO_STR_REGISTER + SHARC_PCSTKP: sprintf(info->s, "PCSTKP: %08X", cpustate->pcstkp); break;
- case CPUINFO_STR_REGISTER + SHARC_LSTKP: sprintf(info->s, "LSTKP: %08X", cpustate->lstkp); break;
- case CPUINFO_STR_REGISTER + SHARC_FADDR: sprintf(info->s, "FADDR: %08X", cpustate->faddr); break;
- case CPUINFO_STR_REGISTER + SHARC_DADDR: sprintf(info->s, "DADDR: %08X", cpustate->daddr); break;
- case CPUINFO_STR_REGISTER + SHARC_MODE1: sprintf(info->s, "MODE1: %08X", cpustate->mode1); break;
- case CPUINFO_STR_REGISTER + SHARC_MODE2: sprintf(info->s, "MODE2: %08X", cpustate->mode2); break;
- case CPUINFO_STR_REGISTER + SHARC_ASTAT: sprintf(info->s, "ASTAT: %08X", cpustate->astat); break;
- case CPUINFO_STR_REGISTER + SHARC_IRPTL: sprintf(info->s, "IRPTL: %08X", cpustate->irptl); break;
- case CPUINFO_STR_REGISTER + SHARC_IMASK: sprintf(info->s, "IMASK: %08X", cpustate->imask); break;
- case CPUINFO_STR_REGISTER + SHARC_USTAT1: sprintf(info->s, "USTAT1: %08X", cpustate->ustat1); break;
- case CPUINFO_STR_REGISTER + SHARC_USTAT2: sprintf(info->s, "USTAT2: %08X", cpustate->ustat2); break;
- case CPUINFO_STR_REGISTER + SHARC_STSTKP: sprintf(info->s, "STSTKP: %08X", cpustate->status_stkp); break;
-
- case CPUINFO_STR_REGISTER + SHARC_R0: sprintf(info->s, "R0: %08X", (UINT32)cpustate->r[0].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R1: sprintf(info->s, "R1: %08X", (UINT32)cpustate->r[1].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R2: sprintf(info->s, "R2: %08X", (UINT32)cpustate->r[2].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R3: sprintf(info->s, "R3: %08X", (UINT32)cpustate->r[3].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R4: sprintf(info->s, "R4: %08X", (UINT32)cpustate->r[4].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R5: sprintf(info->s, "R5: %08X", (UINT32)cpustate->r[5].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R6: sprintf(info->s, "R6: %08X", (UINT32)cpustate->r[6].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R7: sprintf(info->s, "R7: %08X", (UINT32)cpustate->r[7].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R8: sprintf(info->s, "R8: %08X", (UINT32)cpustate->r[8].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R9: sprintf(info->s, "R9: %08X", (UINT32)cpustate->r[9].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R10: sprintf(info->s, "R10: %08X", (UINT32)cpustate->r[10].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R11: sprintf(info->s, "R11: %08X", (UINT32)cpustate->r[11].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R12: sprintf(info->s, "R12: %08X", (UINT32)cpustate->r[12].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R13: sprintf(info->s, "R13: %08X", (UINT32)cpustate->r[13].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R14: sprintf(info->s, "R14: %08X", (UINT32)cpustate->r[14].r); break;
- case CPUINFO_STR_REGISTER + SHARC_R15: sprintf(info->s, "R15: %08X", (UINT32)cpustate->r[15].r); break;
-
- case CPUINFO_STR_REGISTER + SHARC_I0: sprintf(info->s, "I0: %08X", (UINT32)cpustate->dag1.i[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_I1: sprintf(info->s, "I1: %08X", (UINT32)cpustate->dag1.i[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_I2: sprintf(info->s, "I2: %08X", (UINT32)cpustate->dag1.i[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_I3: sprintf(info->s, "I3: %08X", (UINT32)cpustate->dag1.i[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_I4: sprintf(info->s, "I4: %08X", (UINT32)cpustate->dag1.i[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_I5: sprintf(info->s, "I5: %08X", (UINT32)cpustate->dag1.i[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_I6: sprintf(info->s, "I6: %08X", (UINT32)cpustate->dag1.i[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_I7: sprintf(info->s, "I7: %08X", (UINT32)cpustate->dag1.i[7]); break;
- case CPUINFO_STR_REGISTER + SHARC_I8: sprintf(info->s, "I8: %08X", (UINT32)cpustate->dag2.i[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_I9: sprintf(info->s, "I9: %08X", (UINT32)cpustate->dag2.i[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_I10: sprintf(info->s, "I10: %08X", (UINT32)cpustate->dag2.i[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_I11: sprintf(info->s, "I11: %08X", (UINT32)cpustate->dag2.i[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_I12: sprintf(info->s, "I12: %08X", (UINT32)cpustate->dag2.i[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_I13: sprintf(info->s, "I13: %08X", (UINT32)cpustate->dag2.i[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_I14: sprintf(info->s, "I14: %08X", (UINT32)cpustate->dag2.i[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_I15: sprintf(info->s, "I15: %08X", (UINT32)cpustate->dag2.i[7]); break;
-
- case CPUINFO_STR_REGISTER + SHARC_M0: sprintf(info->s, "M0: %08X", (UINT32)cpustate->dag1.m[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_M1: sprintf(info->s, "M1: %08X", (UINT32)cpustate->dag1.m[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_M2: sprintf(info->s, "M2: %08X", (UINT32)cpustate->dag1.m[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_M3: sprintf(info->s, "M3: %08X", (UINT32)cpustate->dag1.m[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_M4: sprintf(info->s, "M4: %08X", (UINT32)cpustate->dag1.m[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_M5: sprintf(info->s, "M5: %08X", (UINT32)cpustate->dag1.m[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_M6: sprintf(info->s, "M6: %08X", (UINT32)cpustate->dag1.m[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_M7: sprintf(info->s, "M7: %08X", (UINT32)cpustate->dag1.m[7]); break;
- case CPUINFO_STR_REGISTER + SHARC_M8: sprintf(info->s, "M8: %08X", (UINT32)cpustate->dag2.m[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_M9: sprintf(info->s, "M9: %08X", (UINT32)cpustate->dag2.m[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_M10: sprintf(info->s, "M10: %08X", (UINT32)cpustate->dag2.m[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_M11: sprintf(info->s, "M11: %08X", (UINT32)cpustate->dag2.m[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_M12: sprintf(info->s, "M12: %08X", (UINT32)cpustate->dag2.m[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_M13: sprintf(info->s, "M13: %08X", (UINT32)cpustate->dag2.m[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_M14: sprintf(info->s, "M14: %08X", (UINT32)cpustate->dag2.m[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_M15: sprintf(info->s, "M15: %08X", (UINT32)cpustate->dag2.m[7]); break;
-
- case CPUINFO_STR_REGISTER + SHARC_L0: sprintf(info->s, "L0: %08X", (UINT32)cpustate->dag1.l[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_L1: sprintf(info->s, "L1: %08X", (UINT32)cpustate->dag1.l[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_L2: sprintf(info->s, "L2: %08X", (UINT32)cpustate->dag1.l[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_L3: sprintf(info->s, "L3: %08X", (UINT32)cpustate->dag1.l[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_L4: sprintf(info->s, "L4: %08X", (UINT32)cpustate->dag1.l[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_L5: sprintf(info->s, "L5: %08X", (UINT32)cpustate->dag1.l[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_L6: sprintf(info->s, "L6: %08X", (UINT32)cpustate->dag1.l[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_L7: sprintf(info->s, "L7: %08X", (UINT32)cpustate->dag1.l[7]); break;
- case CPUINFO_STR_REGISTER + SHARC_L8: sprintf(info->s, "L8: %08X", (UINT32)cpustate->dag2.l[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_L9: sprintf(info->s, "L9: %08X", (UINT32)cpustate->dag2.l[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_L10: sprintf(info->s, "L10: %08X", (UINT32)cpustate->dag2.l[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_L11: sprintf(info->s, "L11: %08X", (UINT32)cpustate->dag2.l[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_L12: sprintf(info->s, "L12: %08X", (UINT32)cpustate->dag2.l[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_L13: sprintf(info->s, "L13: %08X", (UINT32)cpustate->dag2.l[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_L14: sprintf(info->s, "L14: %08X", (UINT32)cpustate->dag2.l[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_L15: sprintf(info->s, "L15: %08X", (UINT32)cpustate->dag2.l[7]); break;
-
- case CPUINFO_STR_REGISTER + SHARC_B0: sprintf(info->s, "B0: %08X", (UINT32)cpustate->dag1.b[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_B1: sprintf(info->s, "B1: %08X", (UINT32)cpustate->dag1.b[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_B2: sprintf(info->s, "B2: %08X", (UINT32)cpustate->dag1.b[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_B3: sprintf(info->s, "B3: %08X", (UINT32)cpustate->dag1.b[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_B4: sprintf(info->s, "B4: %08X", (UINT32)cpustate->dag1.b[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_B5: sprintf(info->s, "B5: %08X", (UINT32)cpustate->dag1.b[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_B6: sprintf(info->s, "B6: %08X", (UINT32)cpustate->dag1.b[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_B7: sprintf(info->s, "B7: %08X", (UINT32)cpustate->dag1.b[7]); break;
- case CPUINFO_STR_REGISTER + SHARC_B8: sprintf(info->s, "B8: %08X", (UINT32)cpustate->dag2.b[0]); break;
- case CPUINFO_STR_REGISTER + SHARC_B9: sprintf(info->s, "B9: %08X", (UINT32)cpustate->dag2.b[1]); break;
- case CPUINFO_STR_REGISTER + SHARC_B10: sprintf(info->s, "B10: %08X", (UINT32)cpustate->dag2.b[2]); break;
- case CPUINFO_STR_REGISTER + SHARC_B11: sprintf(info->s, "B11: %08X", (UINT32)cpustate->dag2.b[3]); break;
- case CPUINFO_STR_REGISTER + SHARC_B12: sprintf(info->s, "B12: %08X", (UINT32)cpustate->dag2.b[4]); break;
- case CPUINFO_STR_REGISTER + SHARC_B13: sprintf(info->s, "B13: %08X", (UINT32)cpustate->dag2.b[5]); break;
- case CPUINFO_STR_REGISTER + SHARC_B14: sprintf(info->s, "B14: %08X", (UINT32)cpustate->dag2.b[6]); break;
- case CPUINFO_STR_REGISTER + SHARC_B15: sprintf(info->s, "B15: %08X", (UINT32)cpustate->dag2.b[7]); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "SHARC"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.01"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + SHARC_PC: sprintf(info->s, "PC: %08X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + SHARC_PCSTK: sprintf(info->s, "PCSTK: %08X", cpustate->pcstk); break;
+ case CPUINFO_STR_REGISTER + SHARC_PCSTKP: sprintf(info->s, "PCSTKP: %08X", cpustate->pcstkp); break;
+ case CPUINFO_STR_REGISTER + SHARC_LSTKP: sprintf(info->s, "LSTKP: %08X", cpustate->lstkp); break;
+ case CPUINFO_STR_REGISTER + SHARC_FADDR: sprintf(info->s, "FADDR: %08X", cpustate->faddr); break;
+ case CPUINFO_STR_REGISTER + SHARC_DADDR: sprintf(info->s, "DADDR: %08X", cpustate->daddr); break;
+ case CPUINFO_STR_REGISTER + SHARC_MODE1: sprintf(info->s, "MODE1: %08X", cpustate->mode1); break;
+ case CPUINFO_STR_REGISTER + SHARC_MODE2: sprintf(info->s, "MODE2: %08X", cpustate->mode2); break;
+ case CPUINFO_STR_REGISTER + SHARC_ASTAT: sprintf(info->s, "ASTAT: %08X", cpustate->astat); break;
+ case CPUINFO_STR_REGISTER + SHARC_IRPTL: sprintf(info->s, "IRPTL: %08X", cpustate->irptl); break;
+ case CPUINFO_STR_REGISTER + SHARC_IMASK: sprintf(info->s, "IMASK: %08X", cpustate->imask); break;
+ case CPUINFO_STR_REGISTER + SHARC_USTAT1: sprintf(info->s, "USTAT1: %08X", cpustate->ustat1); break;
+ case CPUINFO_STR_REGISTER + SHARC_USTAT2: sprintf(info->s, "USTAT2: %08X", cpustate->ustat2); break;
+ case CPUINFO_STR_REGISTER + SHARC_STSTKP: sprintf(info->s, "STSTKP: %08X", cpustate->status_stkp); break;
+
+ case CPUINFO_STR_REGISTER + SHARC_R0: sprintf(info->s, "R0: %08X", (UINT32)cpustate->r[0].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R1: sprintf(info->s, "R1: %08X", (UINT32)cpustate->r[1].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R2: sprintf(info->s, "R2: %08X", (UINT32)cpustate->r[2].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R3: sprintf(info->s, "R3: %08X", (UINT32)cpustate->r[3].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R4: sprintf(info->s, "R4: %08X", (UINT32)cpustate->r[4].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R5: sprintf(info->s, "R5: %08X", (UINT32)cpustate->r[5].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R6: sprintf(info->s, "R6: %08X", (UINT32)cpustate->r[6].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R7: sprintf(info->s, "R7: %08X", (UINT32)cpustate->r[7].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R8: sprintf(info->s, "R8: %08X", (UINT32)cpustate->r[8].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R9: sprintf(info->s, "R9: %08X", (UINT32)cpustate->r[9].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R10: sprintf(info->s, "R10: %08X", (UINT32)cpustate->r[10].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R11: sprintf(info->s, "R11: %08X", (UINT32)cpustate->r[11].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R12: sprintf(info->s, "R12: %08X", (UINT32)cpustate->r[12].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R13: sprintf(info->s, "R13: %08X", (UINT32)cpustate->r[13].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R14: sprintf(info->s, "R14: %08X", (UINT32)cpustate->r[14].r); break;
+ case CPUINFO_STR_REGISTER + SHARC_R15: sprintf(info->s, "R15: %08X", (UINT32)cpustate->r[15].r); break;
+
+ case CPUINFO_STR_REGISTER + SHARC_I0: sprintf(info->s, "I0: %08X", (UINT32)cpustate->dag1.i[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I1: sprintf(info->s, "I1: %08X", (UINT32)cpustate->dag1.i[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I2: sprintf(info->s, "I2: %08X", (UINT32)cpustate->dag1.i[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I3: sprintf(info->s, "I3: %08X", (UINT32)cpustate->dag1.i[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I4: sprintf(info->s, "I4: %08X", (UINT32)cpustate->dag1.i[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I5: sprintf(info->s, "I5: %08X", (UINT32)cpustate->dag1.i[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I6: sprintf(info->s, "I6: %08X", (UINT32)cpustate->dag1.i[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I7: sprintf(info->s, "I7: %08X", (UINT32)cpustate->dag1.i[7]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I8: sprintf(info->s, "I8: %08X", (UINT32)cpustate->dag2.i[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I9: sprintf(info->s, "I9: %08X", (UINT32)cpustate->dag2.i[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I10: sprintf(info->s, "I10: %08X", (UINT32)cpustate->dag2.i[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I11: sprintf(info->s, "I11: %08X", (UINT32)cpustate->dag2.i[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I12: sprintf(info->s, "I12: %08X", (UINT32)cpustate->dag2.i[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I13: sprintf(info->s, "I13: %08X", (UINT32)cpustate->dag2.i[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I14: sprintf(info->s, "I14: %08X", (UINT32)cpustate->dag2.i[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_I15: sprintf(info->s, "I15: %08X", (UINT32)cpustate->dag2.i[7]); break;
+
+ case CPUINFO_STR_REGISTER + SHARC_M0: sprintf(info->s, "M0: %08X", (UINT32)cpustate->dag1.m[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M1: sprintf(info->s, "M1: %08X", (UINT32)cpustate->dag1.m[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M2: sprintf(info->s, "M2: %08X", (UINT32)cpustate->dag1.m[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M3: sprintf(info->s, "M3: %08X", (UINT32)cpustate->dag1.m[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M4: sprintf(info->s, "M4: %08X", (UINT32)cpustate->dag1.m[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M5: sprintf(info->s, "M5: %08X", (UINT32)cpustate->dag1.m[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M6: sprintf(info->s, "M6: %08X", (UINT32)cpustate->dag1.m[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M7: sprintf(info->s, "M7: %08X", (UINT32)cpustate->dag1.m[7]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M8: sprintf(info->s, "M8: %08X", (UINT32)cpustate->dag2.m[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M9: sprintf(info->s, "M9: %08X", (UINT32)cpustate->dag2.m[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M10: sprintf(info->s, "M10: %08X", (UINT32)cpustate->dag2.m[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M11: sprintf(info->s, "M11: %08X", (UINT32)cpustate->dag2.m[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M12: sprintf(info->s, "M12: %08X", (UINT32)cpustate->dag2.m[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M13: sprintf(info->s, "M13: %08X", (UINT32)cpustate->dag2.m[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M14: sprintf(info->s, "M14: %08X", (UINT32)cpustate->dag2.m[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_M15: sprintf(info->s, "M15: %08X", (UINT32)cpustate->dag2.m[7]); break;
+
+ case CPUINFO_STR_REGISTER + SHARC_L0: sprintf(info->s, "L0: %08X", (UINT32)cpustate->dag1.l[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L1: sprintf(info->s, "L1: %08X", (UINT32)cpustate->dag1.l[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L2: sprintf(info->s, "L2: %08X", (UINT32)cpustate->dag1.l[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L3: sprintf(info->s, "L3: %08X", (UINT32)cpustate->dag1.l[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L4: sprintf(info->s, "L4: %08X", (UINT32)cpustate->dag1.l[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L5: sprintf(info->s, "L5: %08X", (UINT32)cpustate->dag1.l[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L6: sprintf(info->s, "L6: %08X", (UINT32)cpustate->dag1.l[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L7: sprintf(info->s, "L7: %08X", (UINT32)cpustate->dag1.l[7]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L8: sprintf(info->s, "L8: %08X", (UINT32)cpustate->dag2.l[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L9: sprintf(info->s, "L9: %08X", (UINT32)cpustate->dag2.l[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L10: sprintf(info->s, "L10: %08X", (UINT32)cpustate->dag2.l[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L11: sprintf(info->s, "L11: %08X", (UINT32)cpustate->dag2.l[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L12: sprintf(info->s, "L12: %08X", (UINT32)cpustate->dag2.l[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L13: sprintf(info->s, "L13: %08X", (UINT32)cpustate->dag2.l[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L14: sprintf(info->s, "L14: %08X", (UINT32)cpustate->dag2.l[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_L15: sprintf(info->s, "L15: %08X", (UINT32)cpustate->dag2.l[7]); break;
+
+ case CPUINFO_STR_REGISTER + SHARC_B0: sprintf(info->s, "B0: %08X", (UINT32)cpustate->dag1.b[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B1: sprintf(info->s, "B1: %08X", (UINT32)cpustate->dag1.b[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B2: sprintf(info->s, "B2: %08X", (UINT32)cpustate->dag1.b[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B3: sprintf(info->s, "B3: %08X", (UINT32)cpustate->dag1.b[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B4: sprintf(info->s, "B4: %08X", (UINT32)cpustate->dag1.b[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B5: sprintf(info->s, "B5: %08X", (UINT32)cpustate->dag1.b[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B6: sprintf(info->s, "B6: %08X", (UINT32)cpustate->dag1.b[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B7: sprintf(info->s, "B7: %08X", (UINT32)cpustate->dag1.b[7]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B8: sprintf(info->s, "B8: %08X", (UINT32)cpustate->dag2.b[0]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B9: sprintf(info->s, "B9: %08X", (UINT32)cpustate->dag2.b[1]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B10: sprintf(info->s, "B10: %08X", (UINT32)cpustate->dag2.b[2]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B11: sprintf(info->s, "B11: %08X", (UINT32)cpustate->dag2.b[3]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B12: sprintf(info->s, "B12: %08X", (UINT32)cpustate->dag2.b[4]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B13: sprintf(info->s, "B13: %08X", (UINT32)cpustate->dag2.b[5]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B14: sprintf(info->s, "B14: %08X", (UINT32)cpustate->dag2.b[6]); break;
+ case CPUINFO_STR_REGISTER + SHARC_B15: sprintf(info->s, "B15: %08X", (UINT32)cpustate->dag2.b[7]); break;
}
}
@@ -1260,12 +1260,12 @@ CPU_GET_INFO( adsp21062 )
switch(state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp21062); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(adsp21062); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "ADSP21062"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "ADSP21062"); break;
- default: CPU_GET_INFO_CALL(sharc); break;
+ default: CPU_GET_INFO_CALL(sharc); break;
}
}
diff --git a/src/emu/cpu/sharc/sharc.h b/src/emu/cpu/sharc/sharc.h
index 7e9f41bef8d..6305b746410 100644
--- a/src/emu/cpu/sharc/sharc.h
+++ b/src/emu/cpu/sharc/sharc.h
@@ -4,10 +4,10 @@
#define __SHARC_H__
-#define SHARC_INPUT_FLAG0 3
-#define SHARC_INPUT_FLAG1 4
-#define SHARC_INPUT_FLAG2 5
-#define SHARC_INPUT_FLAG3 6
+#define SHARC_INPUT_FLAG0 3
+#define SHARC_INPUT_FLAG1 4
+#define SHARC_INPUT_FLAG2 5
+#define SHARC_INPUT_FLAG3 6
enum SHARC_BOOT_MODE
{
diff --git a/src/emu/cpu/sharc/sharcdma.c b/src/emu/cpu/sharc/sharcdma.c
index ccae4b868bd..394407bee2e 100644
--- a/src/emu/cpu/sharc/sharcdma.c
+++ b/src/emu/cpu/sharc/sharcdma.c
@@ -1,46 +1,46 @@
/* SHARC DMA operations */
-#define DMA_PMODE_NO_PACKING 0
-#define DMA_PMODE_16_32 1
-#define DMA_PMODE_16_48 2
-#define DMA_PMODE_32_48 3
-#define DMA_PMODE_8_48 4
+#define DMA_PMODE_NO_PACKING 0
+#define DMA_PMODE_16_32 1
+#define DMA_PMODE_16_48 2
+#define DMA_PMODE_32_48 3
+#define DMA_PMODE_8_48 4
static void schedule_chained_dma_op(SHARC_REGS *cpustate, int channel, UINT32 dma_chain_ptr, int chained_direction)
{
UINT32 op_ptr = 0x20000 + dma_chain_ptr;
- UINT32 int_index = dm_read32(cpustate, op_ptr - 0);
- UINT32 int_modifier = dm_read32(cpustate, op_ptr - 1);
- UINT32 int_count = dm_read32(cpustate, op_ptr - 2);
- UINT32 chain_ptr = dm_read32(cpustate, op_ptr - 3);
+ UINT32 int_index = dm_read32(cpustate, op_ptr - 0);
+ UINT32 int_modifier = dm_read32(cpustate, op_ptr - 1);
+ UINT32 int_count = dm_read32(cpustate, op_ptr - 2);
+ UINT32 chain_ptr = dm_read32(cpustate, op_ptr - 3);
//UINT32 gen_purpose = dm_read32(cpustate, op_ptr - 4);
- UINT32 ext_index = dm_read32(cpustate, op_ptr - 5);
- UINT32 ext_modifier = dm_read32(cpustate, op_ptr - 6);
- UINT32 ext_count = dm_read32(cpustate, op_ptr - 7);
+ UINT32 ext_index = dm_read32(cpustate, op_ptr - 5);
+ UINT32 ext_modifier = dm_read32(cpustate, op_ptr - 6);
+ UINT32 ext_count = dm_read32(cpustate, op_ptr - 7);
if (cpustate->dma_op[channel].active)
{
fatalerror("schedule_chained_dma_op: DMA operation already scheduled at %08X!\n", cpustate->pc);
}
- if (chained_direction) // Transmit to external
+ if (chained_direction) // Transmit to external
{
- cpustate->dma_op[channel].dst = ext_index;
- cpustate->dma_op[channel].dst_modifier = ext_modifier;
- cpustate->dma_op[channel].dst_count = ext_count;
- cpustate->dma_op[channel].src = int_index;
- cpustate->dma_op[channel].src_modifier = int_modifier;
- cpustate->dma_op[channel].src_count = int_count;
+ cpustate->dma_op[channel].dst = ext_index;
+ cpustate->dma_op[channel].dst_modifier = ext_modifier;
+ cpustate->dma_op[channel].dst_count = ext_count;
+ cpustate->dma_op[channel].src = int_index;
+ cpustate->dma_op[channel].src_modifier = int_modifier;
+ cpustate->dma_op[channel].src_count = int_count;
}
- else // Receive from external
+ else // Receive from external
{
- cpustate->dma_op[channel].src = ext_index;
- cpustate->dma_op[channel].src_modifier = ext_modifier;
- cpustate->dma_op[channel].src_count = ext_count;
- cpustate->dma_op[channel].dst = int_index;
- cpustate->dma_op[channel].dst_modifier = int_modifier;
- cpustate->dma_op[channel].dst_count = int_count;
+ cpustate->dma_op[channel].src = ext_index;
+ cpustate->dma_op[channel].src_modifier = ext_modifier;
+ cpustate->dma_op[channel].src_count = ext_count;
+ cpustate->dma_op[channel].dst = int_index;
+ cpustate->dma_op[channel].dst_modifier = int_modifier;
+ cpustate->dma_op[channel].dst_count = int_count;
}
cpustate->dma_op[channel].pmode = 0;
@@ -84,13 +84,13 @@ static void schedule_dma_op(SHARC_REGS *cpustate, int channel, UINT32 src, UINT3
static void dma_op(SHARC_REGS *cpustate, int channel)
{
int i;
- UINT32 src = cpustate->dma_op[channel].src;
- UINT32 dst = cpustate->dma_op[channel].dst;
- int src_modifier = cpustate->dma_op[channel].src_modifier;
- int dst_modifier = cpustate->dma_op[channel].dst_modifier;
- int src_count = cpustate->dma_op[channel].src_count;
+ UINT32 src = cpustate->dma_op[channel].src;
+ UINT32 dst = cpustate->dma_op[channel].dst;
+ int src_modifier = cpustate->dma_op[channel].src_modifier;
+ int dst_modifier = cpustate->dma_op[channel].dst_modifier;
+ int src_count = cpustate->dma_op[channel].src_count;
//int dst_count = cpustate->dma_op[channel].dst_count;
- int pmode = cpustate->dma_op[channel].pmode;
+ int pmode = cpustate->dma_op[channel].pmode;
//printf("dma_op: %08X, %08X, %08X, %08X, %08X, %08X, %d\n", src, dst, src_modifier, dst_modifier, src_count, dst_count, pmode);
@@ -126,11 +126,11 @@ static void dma_op(SHARC_REGS *cpustate, int channel)
for (i=0; i < length; i++)
{
UINT64 data = ((UINT64)(dm_read32(cpustate, src+0) & 0xff) << 0) |
- ((UINT64)(dm_read32(cpustate, src+1) & 0xff) << 8) |
- ((UINT64)(dm_read32(cpustate, src+2) & 0xff) << 16) |
- ((UINT64)(dm_read32(cpustate, src+3) & 0xff) << 24) |
- ((UINT64)(dm_read32(cpustate, src+4) & 0xff) << 32) |
- ((UINT64)(dm_read32(cpustate, src+5) & 0xff) << 40);
+ ((UINT64)(dm_read32(cpustate, src+1) & 0xff) << 8) |
+ ((UINT64)(dm_read32(cpustate, src+2) & 0xff) << 16) |
+ ((UINT64)(dm_read32(cpustate, src+3) & 0xff) << 24) |
+ ((UINT64)(dm_read32(cpustate, src+4) & 0xff) << 32) |
+ ((UINT64)(dm_read32(cpustate, src+5) & 0xff) << 40);
pm_write48(cpustate, dst, data);
src += src_modifier * 6;
@@ -186,7 +186,7 @@ static void sharc_dma_exec(SHARC_REGS *cpustate, int channel)
- if (chen) // Chained DMA
+ if (chen) // Chained DMA
{
UINT32 dma_chain_ptr = cpustate->dma[channel].chain_ptr & 0x1ffff;
@@ -194,23 +194,23 @@ static void sharc_dma_exec(SHARC_REGS *cpustate, int channel)
}
else
{
- if (tran) // Transmit to external
+ if (tran) // Transmit to external
{
- dst = cpustate->dma[channel].ext_index;
- dst_modifier = cpustate->dma[channel].ext_modifier;
- dst_count = cpustate->dma[channel].ext_count;
- src = cpustate->dma[channel].int_index;
- src_modifier = cpustate->dma[channel].int_modifier;
- src_count = cpustate->dma[channel].int_count;
+ dst = cpustate->dma[channel].ext_index;
+ dst_modifier = cpustate->dma[channel].ext_modifier;
+ dst_count = cpustate->dma[channel].ext_count;
+ src = cpustate->dma[channel].int_index;
+ src_modifier = cpustate->dma[channel].int_modifier;
+ src_count = cpustate->dma[channel].int_count;
}
- else // Receive from external
+ else // Receive from external
{
- src = cpustate->dma[channel].ext_index;
- src_modifier = cpustate->dma[channel].ext_modifier;
- src_count = cpustate->dma[channel].ext_count;
- dst = cpustate->dma[channel].int_index;
- dst_modifier = cpustate->dma[channel].int_modifier;
- dst_count = cpustate->dma[channel].int_count;
+ src = cpustate->dma[channel].ext_index;
+ src_modifier = cpustate->dma[channel].ext_modifier;
+ src_count = cpustate->dma[channel].ext_count;
+ dst = cpustate->dma[channel].int_index;
+ dst_modifier = cpustate->dma[channel].int_modifier;
+ dst_count = cpustate->dma[channel].int_count;
if (dst < 0x20000)
{
diff --git a/src/emu/cpu/sharc/sharcdsm.c b/src/emu/cpu/sharc/sharcdsm.c
index 1c97125aa43..e2624edee80 100644
--- a/src/emu/cpu/sharc/sharcdsm.c
+++ b/src/emu/cpu/sharc/sharcdsm.c
@@ -10,20 +10,20 @@
static UINT32 (* sharcdasm_table[256])(UINT32, UINT64);
static int dasm_table_built = 0;
-#define GET_UREG(x) (ureg_names[x])
-#define GET_SREG(x) (GET_UREG(0x70 | (x & 0xf)))
-#define GET_DREG(x) (GET_UREG(0x00 | (x & 0xf)))
-#define GET_DAG1_I(x) (GET_UREG(0x10 | (x & 0x7)))
-#define GET_DAG1_M(x) (GET_UREG(0x20 | (x & 0x7)))
-#define GET_DAG1_L(x) (GET_UREG(0x30 | (x & 0x7)))
-#define GET_DAG1_B(x) (GET_UREG(0x40 | (x & 0x7)))
-#define GET_DAG2_I(x) (GET_UREG(0x10 | (8 + (x & 0x7))))
-#define GET_DAG2_M(x) (GET_UREG(0x20 | (8 + (x & 0x7))))
-#define GET_DAG2_L(x) (GET_UREG(0x30 | (8 + (x & 0x7))))
-#define GET_DAG2_B(x) (GET_UREG(0x40 | (8 + (x & 0x7))))
-
-#define SIGN_EXTEND6(x) ((x & 0x20) ? (0xffffffc0 | x) : x)
-#define SIGN_EXTEND24(x) ((x & 0x800000) ? (0xff000000 | x) : x)
+#define GET_UREG(x) (ureg_names[x])
+#define GET_SREG(x) (GET_UREG(0x70 | (x & 0xf)))
+#define GET_DREG(x) (GET_UREG(0x00 | (x & 0xf)))
+#define GET_DAG1_I(x) (GET_UREG(0x10 | (x & 0x7)))
+#define GET_DAG1_M(x) (GET_UREG(0x20 | (x & 0x7)))
+#define GET_DAG1_L(x) (GET_UREG(0x30 | (x & 0x7)))
+#define GET_DAG1_B(x) (GET_UREG(0x40 | (x & 0x7)))
+#define GET_DAG2_I(x) (GET_UREG(0x10 | (8 + (x & 0x7))))
+#define GET_DAG2_M(x) (GET_UREG(0x20 | (8 + (x & 0x7))))
+#define GET_DAG2_L(x) (GET_UREG(0x30 | (8 + (x & 0x7))))
+#define GET_DAG2_B(x) (GET_UREG(0x40 | (8 + (x & 0x7))))
+
+#define SIGN_EXTEND6(x) ((x & 0x20) ? (0xffffffc0 | x) : x)
+#define SIGN_EXTEND24(x) ((x & 0x800000) ? (0xff000000 | x) : x)
static char *output;
@@ -49,7 +49,7 @@ static void compute(UINT32 opcode)
int ra = rn;
int rm = rs;
- if (opcode & 0x400000) /* Multi-function opcode */
+ if (opcode & 0x400000) /* Multi-function opcode */
{
int multiop = (opcode >> 16) & 0x3f;
int rxm = (opcode >> 6) & 0x3;
@@ -59,29 +59,29 @@ static void compute(UINT32 opcode)
switch(multiop)
{
- case 0x04: print("R%d = R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x05: print("R%d = R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x06: print("R%d = R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x08: print("MRF = MRF + R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x09: print("MRF = MRF + R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x0a: print("MRF = MRF + R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x0c: print("R%d = MRF + R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x0d: print("R%d = MRF + R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x0e: print("R%d = MRF + R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x10: print("MRF = MRF - R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x11: print("MRF = MRF - R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x12: print("MRF = MRF - R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x14: print("R%d = MRF - R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x15: print("R%d = MRF - R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x16: print("R%d = MRF - R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x18: print("F%d = F%d * F%d, F%d = F%d + F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x19: print("F%d = F%d * F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x1a: print("F%d = F%d * F%d, F%d = FLOAT F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x1b: print("F%d = F%d * F%d, F%d = FIX F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x1c: print("F%d = F%d * F%d, F%d = (F%d + F%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x1d: print("F%d = F%d * F%d, F%d = ABS F%d", rm, rxm, rym+4, ra, rxa+8); break;
- case 0x1e: print("F%d = F%d * F%d, F%d = MAX(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
- case 0x1f: print("F%d = F%d * F%d, F%d = MIN(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x04: print("R%d = R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x05: print("R%d = R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x06: print("R%d = R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x08: print("MRF = MRF + R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x09: print("MRF = MRF + R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x0a: print("MRF = MRF + R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x0c: print("R%d = MRF + R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x0d: print("R%d = MRF + R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x0e: print("R%d = MRF + R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x10: print("MRF = MRF - R%d * R%d (SSF), R%d = R%d + R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x11: print("MRF = MRF - R%d * R%d (SSF), R%d = R%d - R%d", rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x12: print("MRF = MRF - R%d * R%d (SSF), R%d = (R%d + R%d)/2", rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x14: print("R%d = MRF - R%d * R%d (SSFR), R%d = R%d + R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x15: print("R%d = MRF - R%d * R%d (SSFR), R%d = R%d - R%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x16: print("R%d = MRF - R%d * R%d (SSFR), R%d = (R%d + R%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x18: print("F%d = F%d * F%d, F%d = F%d + F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x19: print("F%d = F%d * F%d, F%d = F%d - F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x1a: print("F%d = F%d * F%d, F%d = FLOAT F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x1b: print("F%d = F%d * F%d, F%d = FIX F%d BY F%d", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x1c: print("F%d = F%d * F%d, F%d = (F%d + F%d)/2", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x1d: print("F%d = F%d * F%d, F%d = ABS F%d", rm, rxm, rym+4, ra, rxa+8); break;
+ case 0x1e: print("F%d = F%d * F%d, F%d = MAX(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
+ case 0x1f: print("F%d = F%d * F%d, F%d = MIN(F%d, F%d)", rm, rxm, rym+4, ra, rxa+8, rya+12); break;
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
@@ -119,7 +119,7 @@ static void compute(UINT32 opcode)
}
}
}
- else /* Single-function */
+ else /* Single-function */
{
switch(cu)
{
@@ -131,52 +131,52 @@ static void compute(UINT32 opcode)
switch(op)
{
/* Fixed-point */
- case 0x01: print("R%d = R%d + R%d", rn, rx, ry); break;
- case 0x02: print("R%d = R%d - R%d", rn, rx, ry); break;
- case 0x05: print("R%d = R%d + R%d + CI", rn, rx, ry); break;
- case 0x06: print("R%d = R%d - R%d + CI - 1", rn, rx, ry); break;
- case 0x09: print("R%d = (R%d + R%d)/2", rn, rx, ry); break;
- case 0x0a: print("COMP(R%d, R%d)", rx, ry); break;
- case 0x25: print("R%d = R%d + CI", rn, rx); break;
- case 0x26: print("R%d = R%d + CI - 1", rn, rx); break;
- case 0x29: print("R%d = R%d + 1", rn, rx); break;
- case 0x2a: print("R%d = R%d - 1", rn, rx); break;
- case 0x22: print("R%d = -R%d", rn, rx); break;
- case 0x30: print("R%d = ABS R%d", rn, rx); break;
- case 0x21: print("R%d = PASS R%d", rn, rx); break;
- case 0x40: print("R%d = R%d AND R%d", rn, rx, ry); break;
- case 0x41: print("R%d = R%d OR R%d", rn, rx, ry); break;
- case 0x42: print("R%d = R%d XOR R%d", rn, rx, ry); break;
- case 0x43: print("R%d = NOT R%d", rn, rx); break;
- case 0x61: print("R%d = MIN(R%d, R%d)", rn, rx, ry); break;
- case 0x62: print("R%d = MAX(R%d, R%d)", rn, rx, ry); break;
- case 0x63: print("R%d = CLIP R%d BY R%d", rn, rx, ry); break;
+ case 0x01: print("R%d = R%d + R%d", rn, rx, ry); break;
+ case 0x02: print("R%d = R%d - R%d", rn, rx, ry); break;
+ case 0x05: print("R%d = R%d + R%d + CI", rn, rx, ry); break;
+ case 0x06: print("R%d = R%d - R%d + CI - 1", rn, rx, ry); break;
+ case 0x09: print("R%d = (R%d + R%d)/2", rn, rx, ry); break;
+ case 0x0a: print("COMP(R%d, R%d)", rx, ry); break;
+ case 0x25: print("R%d = R%d + CI", rn, rx); break;
+ case 0x26: print("R%d = R%d + CI - 1", rn, rx); break;
+ case 0x29: print("R%d = R%d + 1", rn, rx); break;
+ case 0x2a: print("R%d = R%d - 1", rn, rx); break;
+ case 0x22: print("R%d = -R%d", rn, rx); break;
+ case 0x30: print("R%d = ABS R%d", rn, rx); break;
+ case 0x21: print("R%d = PASS R%d", rn, rx); break;
+ case 0x40: print("R%d = R%d AND R%d", rn, rx, ry); break;
+ case 0x41: print("R%d = R%d OR R%d", rn, rx, ry); break;
+ case 0x42: print("R%d = R%d XOR R%d", rn, rx, ry); break;
+ case 0x43: print("R%d = NOT R%d", rn, rx); break;
+ case 0x61: print("R%d = MIN(R%d, R%d)", rn, rx, ry); break;
+ case 0x62: print("R%d = MAX(R%d, R%d)", rn, rx, ry); break;
+ case 0x63: print("R%d = CLIP R%d BY R%d", rn, rx, ry); break;
/* Floating-point */
- case 0x81: print("F%d = F%d + F%d", rn, rx, ry); break;
- case 0x82: print("F%d = F%d - F%d", rn, rx, ry); break;
- case 0x91: print("F%d = ABS(F%d + F%d)", rn, rx, ry); break;
- case 0x92: print("F%d = ABS(F%d - F%d)", rn, rx, ry); break;
- case 0x89: print("F%d = (F%d + F%d)/2", rn, rx, ry); break;
- case 0x8a: print("COMP(F%d, F%d)", rx, ry); break;
- case 0xa2: print("F%d = -F%d", rn, rx); break;
- case 0xb0: print("F%d = ABS F%d", rn, rx); break;
- case 0xa1: print("F%d = PASS F%d", rn, rx); break;
- case 0xa5: print("F%d = RND R%d", rn, rx); break;
- case 0xbd: print("F%d = SCALB F%d BY R%d", rn, rx, ry); break;
- case 0xad: print("R%d = MANT F%d", rn, rx); break;
- case 0xc1: print("R%d = LOGB F%d", rn, rx); break;
- case 0xd9: print("R%d = FIX F%d BY R%d", rn, rx, ry); break;
- case 0xc9: print("R%d = FIX F%d", rn, rx); break;
- case 0xdd: print("R%d = TRUNC F%d BY R%d", rn, rx, ry); break;
- case 0xcd: print("R%d = TRUNC F%d", rn, rx); break;
- case 0xda: print("F%d = FLOAT R%d BY R%d", rn, rx, ry); break;
- case 0xca: print("F%d = FLOAT R%d", rn, rx); break;
- case 0xc4: print("F%d = RECIPS F%d", rn, rx); break;
- case 0xc5: print("F%d = RSQRTS F%d", rn, rx); break;
- case 0xe0: print("F%d = F%d COPYSIGN F%d", rn, rx, ry); break;
- case 0xe1: print("F%d = MIN(F%d, F%d)", rn, rx, ry); break;
- case 0xe2: print("F%d = MAX(F%d, F%d)", rn, rx, ry); break;
- case 0xe3: print("F%d = CLIP F%d BY F%d", rn, rx, ry); break;
+ case 0x81: print("F%d = F%d + F%d", rn, rx, ry); break;
+ case 0x82: print("F%d = F%d - F%d", rn, rx, ry); break;
+ case 0x91: print("F%d = ABS(F%d + F%d)", rn, rx, ry); break;
+ case 0x92: print("F%d = ABS(F%d - F%d)", rn, rx, ry); break;
+ case 0x89: print("F%d = (F%d + F%d)/2", rn, rx, ry); break;
+ case 0x8a: print("COMP(F%d, F%d)", rx, ry); break;
+ case 0xa2: print("F%d = -F%d", rn, rx); break;
+ case 0xb0: print("F%d = ABS F%d", rn, rx); break;
+ case 0xa1: print("F%d = PASS F%d", rn, rx); break;
+ case 0xa5: print("F%d = RND R%d", rn, rx); break;
+ case 0xbd: print("F%d = SCALB F%d BY R%d", rn, rx, ry); break;
+ case 0xad: print("R%d = MANT F%d", rn, rx); break;
+ case 0xc1: print("R%d = LOGB F%d", rn, rx); break;
+ case 0xd9: print("R%d = FIX F%d BY R%d", rn, rx, ry); break;
+ case 0xc9: print("R%d = FIX F%d", rn, rx); break;
+ case 0xdd: print("R%d = TRUNC F%d BY R%d", rn, rx, ry); break;
+ case 0xcd: print("R%d = TRUNC F%d", rn, rx); break;
+ case 0xda: print("F%d = FLOAT R%d BY R%d", rn, rx, ry); break;
+ case 0xca: print("F%d = FLOAT R%d", rn, rx); break;
+ case 0xc4: print("F%d = RECIPS F%d", rn, rx); break;
+ case 0xc5: print("F%d = RSQRTS F%d", rn, rx); break;
+ case 0xe0: print("F%d = F%d COPYSIGN F%d", rn, rx, ry); break;
+ case 0xe1: print("F%d = MIN(F%d, F%d)", rn, rx, ry); break;
+ case 0xe2: print("F%d = MAX(F%d, F%d)", rn, rx, ry); break;
+ case 0xe3: print("F%d = CLIP F%d BY F%d", rn, rx, ry); break;
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
@@ -212,16 +212,16 @@ static void compute(UINT32 opcode)
switch((op >> 1) & 0x3)
{
case 0:
- case 1: print("R%d = ", rn); break;
- case 2: print("MRF = "); break;
- case 3: print("MRB = "); break;
+ case 1: print("R%d = ", rn); break;
+ case 2: print("MRF = "); break;
+ case 3: print("MRB = "); break;
}
switch((op >> 6) & 0x3)
{
case 0:
switch((op >> 4) & 0x3)
{
- case 0: print("SAT %s", (op & 0x2) ? "MRB" : "MRF"); break;
+ case 0: print("SAT %s", (op & 0x2) ? "MRB" : "MRF"); break;
case 1:
if (op & 0x8)
{
@@ -254,28 +254,28 @@ static void compute(UINT32 opcode)
{
switch(op)
{
- case 0x00: print("R%d = LSHIFT R%d BY R%d", rn, rx, ry); break;
- case 0x20: print("R%d = R%d OR LSHIFT R%d BY R%d", rn, rn, rx, ry); break;
- case 0x04: print("R%d = ASHIFT R%d BY R%d", rn, rx, ry); break;
- case 0x24: print("R%d = R%d OR ASHIFT R%d BY R%d", rn, rn, rx, ry); break;
- case 0x08: print("R%d = ROT R%d BY R%d", rn, rx, ry); break;
- case 0xc4: print("R%d = BCLR R%d BY R%d", rn, rx, ry); break;
- case 0xc0: print("R%d = BSET R%d BY R%d", rn, rx, ry); break;
- case 0xc8: print("R%d = BTGL R%d BY R%d", rn, rx, ry); break;
- case 0xcc: print("BTST R%d BY R%d", rx, ry); break;
- case 0x44: print("R%d = FDEP R%d BY R%d", rn, rx, ry); break;
- case 0x64: print("R%d = R%d OR FDEP R%d BY R%d", rn, rn, rx, ry); break;
- case 0x4c: print("R%d = FDEP R%d BY R%d (SE)", rn, rx, ry); break;
- case 0x6c: print("R%d = R%d OR FDEP R%d BY R%d (SE)", rn, rn, rx, ry); break;
- case 0x40: print("R%d = FEXT R%d BY R%d", rn, rx, ry); break;
- case 0x48: print("R%d = FEXT R%d BY R%d (SE)", rn, rx, ry); break;
- case 0x80: print("R%d = EXP R%d", rn, rx); break;
- case 0x84: print("R%d = EXP R%d (EX)", rn, rx); break;
- case 0x88: print("R%d = LEFTZ R%d", rn, rx); break;
- case 0x8c: print("R%d = LEFTO R%d", rn, rx); break;
- case 0x90: print("R%d = FPACK F%d", rn, rx); break;
- case 0x94: print("F%d = FUNPACK R%d", rn, rx); break;
- default: print("??? (COMPUTE, SHIFT)"); break;
+ case 0x00: print("R%d = LSHIFT R%d BY R%d", rn, rx, ry); break;
+ case 0x20: print("R%d = R%d OR LSHIFT R%d BY R%d", rn, rn, rx, ry); break;
+ case 0x04: print("R%d = ASHIFT R%d BY R%d", rn, rx, ry); break;
+ case 0x24: print("R%d = R%d OR ASHIFT R%d BY R%d", rn, rn, rx, ry); break;
+ case 0x08: print("R%d = ROT R%d BY R%d", rn, rx, ry); break;
+ case 0xc4: print("R%d = BCLR R%d BY R%d", rn, rx, ry); break;
+ case 0xc0: print("R%d = BSET R%d BY R%d", rn, rx, ry); break;
+ case 0xc8: print("R%d = BTGL R%d BY R%d", rn, rx, ry); break;
+ case 0xcc: print("BTST R%d BY R%d", rx, ry); break;
+ case 0x44: print("R%d = FDEP R%d BY R%d", rn, rx, ry); break;
+ case 0x64: print("R%d = R%d OR FDEP R%d BY R%d", rn, rn, rx, ry); break;
+ case 0x4c: print("R%d = FDEP R%d BY R%d (SE)", rn, rx, ry); break;
+ case 0x6c: print("R%d = R%d OR FDEP R%d BY R%d (SE)", rn, rn, rx, ry); break;
+ case 0x40: print("R%d = FEXT R%d BY R%d", rn, rx, ry); break;
+ case 0x48: print("R%d = FEXT R%d BY R%d (SE)", rn, rx, ry); break;
+ case 0x80: print("R%d = EXP R%d", rn, rx); break;
+ case 0x84: print("R%d = EXP R%d (EX)", rn, rx); break;
+ case 0x88: print("R%d = LEFTZ R%d", rn, rx); break;
+ case 0x8c: print("R%d = LEFTO R%d", rn, rx); break;
+ case 0x90: print("R%d = FPACK F%d", rn, rx); break;
+ case 0x94: print("F%d = FUNPACK R%d", rn, rx); break;
+ default: print("??? (COMPUTE, SHIFT)"); break;
}
break;
}
@@ -299,7 +299,7 @@ static void get_if_condition(int cond)
static void pm_dm_ureg(int g, int d, int i, int m, int ureg, int update)
{
- if (update) // post-modify
+ if (update) // post-modify
{
if (d)
{
@@ -325,7 +325,7 @@ static void pm_dm_ureg(int g, int d, int i, int m, int ureg, int update)
}
}
- else // pre-modify
+ else // pre-modify
{
if (d)
{
@@ -354,7 +354,7 @@ static void pm_dm_ureg(int g, int d, int i, int m, int ureg, int update)
static void pm_dm_imm_dreg(int g, int d, int i, int data, int dreg, int update)
{
- if (update) // post-modify
+ if (update) // post-modify
{
if (d)
{
@@ -379,7 +379,7 @@ static void pm_dm_imm_dreg(int g, int d, int i, int data, int dreg, int update)
}
}
}
- else // pre-modify
+ else // pre-modify
{
if (d)
{
@@ -440,28 +440,28 @@ static void shiftop(int shift, int data, int rn, int rx)
switch(shift)
{
- case 0x00: print("R%d = LSHIFT R%d BY %d", rn, rx, data8); break;
- case 0x08: print("R%d = R%d OR LSHIFT R%d BY %d", rn, rn, rx, data8); break;
- case 0x01: print("R%d = ASHIFT R%d BY %d", rn, rx, data8); break;
- case 0x09: print("R%d = R%d OR ASHIFT R%d BY %d", rn, rn, rx, data8); break;
- case 0x02: print("R%d = ROT R%d BY %d", rn, rx, data8); break;
- case 0x31: print("R%d = BCLR R%d BY %d", rn, rx, data8); break;
- case 0x30: print("R%d = BSET R%d BY %d", rn, rx, data8); break;
- case 0x32: print("R%d = BTGL R%d BY %d", rn, rx, data8); break;
- case 0x33: print("BTST R%d BY %d", rx, data8); break;
- case 0x11: print("R%d = FDEP R%d BY %d:%d", rn, rx, bit6, len); break;
- case 0x19: print("R%d = R%d OR FDEP R%d BY %d:%d", rn, rn, rx, bit6, len); break;
- case 0x13: print("R%d = FDEP R%d BY %d:%d (SE)", rn, rx, bit6, len); break;
- case 0x1b: print("R%d = R%d OR FDEP R%d BY %d:%d (SE)", rn, rn, rx, bit6, len); break;
- case 0x10: print("R%d = FEXT R%d BY %d:%d", rn, rx, bit6, len); break;
- case 0x12: print("R%d = FEXT R%d BY %d:%d (SE)", rn, rx, bit6, len); break;
- case 0x20: print("R%d = EXP R%d", rn, rx); break;
- case 0x21: print("R%d = EXP R%d (EX)", rn, rx); break;
- case 0x22: print("R%d = LEFTZ R%d", rn, rx); break;
- case 0x23: print("R%d = LEFTO R%d", rn, rx); break;
- case 0x24: print("R%d = FPACK F%d", rn, rx); break;
- case 0x25: print("F%d = FUNPACK R%d", rn, rx); break;
- default: print("??? (SHIFTOP)"); break;
+ case 0x00: print("R%d = LSHIFT R%d BY %d", rn, rx, data8); break;
+ case 0x08: print("R%d = R%d OR LSHIFT R%d BY %d", rn, rn, rx, data8); break;
+ case 0x01: print("R%d = ASHIFT R%d BY %d", rn, rx, data8); break;
+ case 0x09: print("R%d = R%d OR ASHIFT R%d BY %d", rn, rn, rx, data8); break;
+ case 0x02: print("R%d = ROT R%d BY %d", rn, rx, data8); break;
+ case 0x31: print("R%d = BCLR R%d BY %d", rn, rx, data8); break;
+ case 0x30: print("R%d = BSET R%d BY %d", rn, rx, data8); break;
+ case 0x32: print("R%d = BTGL R%d BY %d", rn, rx, data8); break;
+ case 0x33: print("BTST R%d BY %d", rx, data8); break;
+ case 0x11: print("R%d = FDEP R%d BY %d:%d", rn, rx, bit6, len); break;
+ case 0x19: print("R%d = R%d OR FDEP R%d BY %d:%d", rn, rn, rx, bit6, len); break;
+ case 0x13: print("R%d = FDEP R%d BY %d:%d (SE)", rn, rx, bit6, len); break;
+ case 0x1b: print("R%d = R%d OR FDEP R%d BY %d:%d (SE)", rn, rn, rx, bit6, len); break;
+ case 0x10: print("R%d = FEXT R%d BY %d:%d", rn, rx, bit6, len); break;
+ case 0x12: print("R%d = FEXT R%d BY %d:%d (SE)", rn, rx, bit6, len); break;
+ case 0x20: print("R%d = EXP R%d", rn, rx); break;
+ case 0x21: print("R%d = EXP R%d (EX)", rn, rx); break;
+ case 0x22: print("R%d = LEFTZ R%d", rn, rx); break;
+ case 0x23: print("R%d = LEFTO R%d", rn, rx); break;
+ case 0x24: print("R%d = FPACK F%d", rn, rx); break;
+ case 0x25: print("F%d = FUNPACK R%d", rn, rx); break;
+ default: print("??? (SHIFTOP)"); break;
}
}
@@ -631,11 +631,11 @@ static UINT32 dasm_direct_jump(UINT32 pc, UINT64 opcode)
print("JUMP");
}
- if (opcode & U64(0x10000000000)) /* PC-relative branch */
+ if (opcode & U64(0x10000000000)) /* PC-relative branch */
{
print(" (0x%08X)", pc + SIGN_EXTEND24(addr));
}
- else /* Indirect branch */
+ else /* Indirect branch */
{
print(" (0x%08X)", addr);
}
@@ -674,11 +674,11 @@ static UINT32 dasm_indirect_jump_compute(UINT32 pc, UINT64 opcode)
print("JUMP");
}
- if (opcode & U64(0x10000000000)) /* PC-relative branch */
+ if (opcode & U64(0x10000000000)) /* PC-relative branch */
{
print(" (0x%08X)", pc + SIGN_EXTEND6(reladdr));
}
- else /* Indirect branch */
+ else /* Indirect branch */
{
print(" (%s, %s)", GET_DAG2_M(pmm), GET_DAG2_I(pmi));
}
@@ -719,11 +719,11 @@ static UINT32 dasm_indirect_jump_compute_dregdm(UINT32 pc, UINT64 opcode)
get_if_condition(cond);
print("JUMP");
- if (opcode & U64(0x200000000000)) /* PC-relative branch */
+ if (opcode & U64(0x200000000000)) /* PC-relative branch */
{
print(" (0x%08X)", pc + SIGN_EXTEND6(reladdr));
}
- else /* Indirect branch */
+ else /* Indirect branch */
{
print(" (%s, %s)", GET_DAG2_M(pmm), GET_DAG2_I(pmi));
}
@@ -792,12 +792,12 @@ static UINT32 dasm_do_until_counter(UINT32 pc, UINT64 opcode)
int ureg = (opcode >> 32) & 0xff;
UINT32 addr = opcode & 0xffffff;
- if (opcode & U64(0x10000000000)) /* Loop counter from universal register */
+ if (opcode & U64(0x10000000000)) /* Loop counter from universal register */
{
print("LCNTR = %s, ", GET_UREG(ureg));
print("DO (0x%08X)", pc + SIGN_EXTEND24(addr));
}
- else /* Loop counter from immediate */
+ else /* Loop counter from immediate */
{
print("LCNTR = 0x%04X, ", data);
print("DO (0x%08X) UNTIL LCE", pc + SIGN_EXTEND24(addr));
@@ -925,7 +925,7 @@ static UINT32 dasm_ireg_modify(UINT32 pc, UINT64 opcode)
int i = (opcode >> 32) & 0x7;
UINT32 data = opcode & 0xffffffff;
- if (opcode & U64(0x8000000000)) /* with bit-reverse */
+ if (opcode & U64(0x8000000000)) /* with bit-reverse */
{
if (g)
{
@@ -936,7 +936,7 @@ static UINT32 dasm_ireg_modify(UINT32 pc, UINT64 opcode)
print("BITREV (%s, 0x%08X)", GET_DAG1_I(i), data);
}
}
- else /* without bit-reverse */
+ else /* without bit-reverse */
{
if (g)
{
@@ -1033,7 +1033,7 @@ static UINT32 dasm_idlenop(UINT32 pc, UINT64 opcode)
static UINT32 dasm_cjump_rframe(UINT32 pc, UINT64 opcode)
{
/* TODO */
- if (opcode & U64(0x10000000000)) /* RFRAME */
+ if (opcode & U64(0x10000000000)) /* RFRAME */
{
print("TODO: RFRAME");
}
@@ -1054,70 +1054,70 @@ static UINT32 dasm_invalid(UINT32 pc, UINT64 opcode)
static const SHARC_DASM_OP sharc_dasm_ops[] =
{
// |0 0 1|
- { 0xe000, 0x2000, dasm_compute_dreg_dmpm },
+ { 0xe000, 0x2000, dasm_compute_dreg_dmpm },
// |0 0 0|0 0 0 0 1|
- { 0xff00, 0x0100, dasm_compute },
+ { 0xff00, 0x0100, dasm_compute },
// |0 1 0|
- { 0xe000, 0x4000, dasm_compute_uregdmpm_regmod },
+ { 0xe000, 0x4000, dasm_compute_uregdmpm_regmod },
// |0 1 1|0|
- { 0xf000, 0x6000, dasm_compute_dregdmpm_immmod },
+ { 0xf000, 0x6000, dasm_compute_dregdmpm_immmod },
// |0 1 1|1|
- { 0xf000, 0x7000, dasm_compute_ureg_ureg },
+ { 0xf000, 0x7000, dasm_compute_ureg_ureg },
// |1 0 0|0|
- { 0xf000, 0x8000, dasm_immshift_dregdmpm },
+ { 0xf000, 0x8000, dasm_immshift_dregdmpm },
// |0 0 0|0 0 0 1 0|
- { 0xff00, 0x0200, dasm_immshift_dregdmpm_nodata },
+ { 0xff00, 0x0200, dasm_immshift_dregdmpm_nodata },
// |0 0 0|0 0 1 0 0|
- { 0xff00, 0x0400, dasm_compute_modify },
+ { 0xff00, 0x0400, dasm_compute_modify },
// |0 0 0|0 0 1 1 x|
- { 0xfe00, 0x0600, dasm_direct_jump },
+ { 0xfe00, 0x0600, dasm_direct_jump },
// |0 0 0|0 1 0 0 x|
- { 0xfe00, 0x0800, dasm_indirect_jump_compute },
+ { 0xfe00, 0x0800, dasm_indirect_jump_compute },
// |1 1 x|
- { 0xc000, 0xc000, dasm_indirect_jump_compute_dregdm },
+ { 0xc000, 0xc000, dasm_indirect_jump_compute_dregdm },
// |0 0 0|0 1 0 1 x|
- { 0xfe00, 0x0a00, dasm_rts_compute },
+ { 0xfe00, 0x0a00, dasm_rts_compute },
// |0 0 0|0 1 1 0 x|
- { 0xfe00, 0x0c00, dasm_do_until_counter },
+ { 0xfe00, 0x0c00, dasm_do_until_counter },
// |0 0 0|0 1 1 1 0|
- { 0xff00, 0x0e00, dasm_do_until },
+ { 0xff00, 0x0e00, dasm_do_until },
// |0 0 0|1 0 0|x|x|
- { 0xfc00, 0x1000, dasm_immmove_uregdmpm },
+ { 0xfc00, 0x1000, dasm_immmove_uregdmpm },
// |1 0 1|x|x x x|x|
- { 0xe000, 0xa000, dasm_immmove_uregdmpm_indirect },
+ { 0xe000, 0xa000, dasm_immmove_uregdmpm_indirect },
// |1 0 0|1|
- { 0xf000, 0x9000, dasm_immmove_immdata_dmpm },
+ { 0xf000, 0x9000, dasm_immmove_immdata_dmpm },
// |0 0 0|0 1 1 1 1|
- { 0xff00, 0x0f00, dasm_immmove_immdata_ureg },
+ { 0xff00, 0x0f00, dasm_immmove_immdata_ureg },
// |0 0 0|1 0 1 0 0|
- { 0xff00, 0x1400, dasm_sysreg_bitop },
+ { 0xff00, 0x1400, dasm_sysreg_bitop },
// |0 0 0|1 0 1 1 0|
- { 0xff00, 0x1600, dasm_ireg_modify },
+ { 0xff00, 0x1600, dasm_ireg_modify },
// |0 0 0|1 0 1 1 1|
- { 0xff00, 0x1700, dasm_misc },
+ { 0xff00, 0x1700, dasm_misc },
// |0 0 0|0 0 0 0 0|
- { 0xff00, 0x0000, dasm_idlenop },
+ { 0xff00, 0x0000, dasm_idlenop },
};
static void build_dasm_table(void)
@@ -1153,7 +1153,7 @@ static void build_dasm_table(void)
static UINT32 sharc_dasm_one(char *buffer, offs_t pc, UINT64 opcode)
{
- #define DEFAULT_DASM_WIDTH (64)
+ #define DEFAULT_DASM_WIDTH (64)
char dasm_buffer[2000];
int i;
@@ -1187,11 +1187,9 @@ CPU_DISASSEMBLE( sharc )
UINT32 flags = 0;
op = ((UINT64)oprom[0] << 0) | ((UINT64)oprom[1] << 8) |
- ((UINT64)oprom[2] << 16) | ((UINT64)oprom[3] << 24) |
- ((UINT64)oprom[4] << 32) | ((UINT64)oprom[5] << 40);
+ ((UINT64)oprom[2] << 16) | ((UINT64)oprom[3] << 24) |
+ ((UINT64)oprom[4] << 32) | ((UINT64)oprom[5] << 40);
flags = sharc_dasm_one(buffer, pc, op);
return 1 | flags | DASMFLAG_SUPPORTED;
}
-
-
diff --git a/src/emu/cpu/sharc/sharcdsm.h b/src/emu/cpu/sharc/sharcdsm.h
index 9dff77fdebd..602eba427f8 100644
--- a/src/emu/cpu/sharc/sharcdsm.h
+++ b/src/emu/cpu/sharc/sharcdsm.h
@@ -1,72 +1,72 @@
static const char ureg_names[256][16] =
{
- "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
- "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",
- "I0", "I1", "I2", "I3", "I4", "I5", "I6", "I7",
- "I8", "I9", "I10", "I11", "I12", "I13", "I14", "I15",
- "M0", "M1", "M2", "M3", "M4", "M5", "M6", "M7",
- "M8", "M9", "M10", "M11", "M12", "M13", "M14", "M15",
- "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7",
- "L8", "L9", "L10", "L11", "L12", "L13", "L14", "L15",
- "B0", "B1", "B2", "B3", "B4", "B5", "B6", "B7",
- "B8", "B9", "B10", "B11", "B12", "B13", "B14", "B15",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "FADDR", "DADDR", "???", "PC", "PCSTK", "PCSTKP", "LADDR", "CURLCNTR",
- "LCNTR", "???", "???", "???", "???", "???", "???", "???",
- "USTAT1", "USTAT2", "???", "???", "???", "???", "???", "???",
- "???", "IRPTL", "MODE2", "MODE1", "ASTAT", "IMASK", "STKY", "IMASKP",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "PX", "PX1", "PX2", "TPERIOD", "TCOUNT",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???"
+ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
+ "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",
+ "I0", "I1", "I2", "I3", "I4", "I5", "I6", "I7",
+ "I8", "I9", "I10", "I11", "I12", "I13", "I14", "I15",
+ "M0", "M1", "M2", "M3", "M4", "M5", "M6", "M7",
+ "M8", "M9", "M10", "M11", "M12", "M13", "M14", "M15",
+ "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7",
+ "L8", "L9", "L10", "L11", "L12", "L13", "L14", "L15",
+ "B0", "B1", "B2", "B3", "B4", "B5", "B6", "B7",
+ "B8", "B9", "B10", "B11", "B12", "B13", "B14", "B15",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "FADDR", "DADDR", "???", "PC", "PCSTK", "PCSTKP", "LADDR", "CURLCNTR",
+ "LCNTR", "???", "???", "???", "???", "???", "???", "???",
+ "USTAT1", "USTAT2", "???", "???", "???", "???", "???", "???",
+ "???", "IRPTL", "MODE2", "MODE1", "ASTAT", "IMASK", "STKY", "IMASKP",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "PX", "PX1", "PX2", "TPERIOD", "TCOUNT",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???"
};
static const char bopnames[8][8] =
{
- "SET", "CLEAR", "TOGGLE", "???", "TEST", "XOR", "???", "???"
+ "SET", "CLEAR", "TOGGLE", "???", "TEST", "XOR", "???", "???"
};
static const char condition_codes_if[32][32] =
{
- "EQ", "LT", "LE", "AC",
- "AV", "MV", "MS", "SV",
- "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN",
- "FLAG3_IN", "TF", "BM", "NOT LCE",
- "NE", "GE", "GT", "NOT AC",
- "NOT AV", "NOT MV", "NOT MS", "NOT SV",
- "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN",
- "NOT FLAG3_IN", "NOT TF", "NBM", ""
+ "EQ", "LT", "LE", "AC",
+ "AV", "MV", "MS", "SV",
+ "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN",
+ "FLAG3_IN", "TF", "BM", "NOT LCE",
+ "NE", "GE", "GT", "NOT AC",
+ "NOT AV", "NOT MV", "NOT MS", "NOT SV",
+ "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN",
+ "NOT FLAG3_IN", "NOT TF", "NBM", ""
};
static const char condition_codes_do[32][32] =
{
- "EQ", "LT", "LE", "AC",
- "AV", "MV", "MS", "SV",
- "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN",
- "FLAG3_IN", "TF", "BM", "LCE",
- "NE", "GE", "GT", "NOT AC",
- "NOT AV", "NOT MV", "NOT MS", "NOT SV",
- "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN",
- "NOT FLAG3_IN", "NOT TF", "NBM", "FOREVER"
+ "EQ", "LT", "LE", "AC",
+ "AV", "MV", "MS", "SV",
+ "SZ", "FLAG0_IN", "FLAG1_IN", "FLAG2_IN",
+ "FLAG3_IN", "TF", "BM", "LCE",
+ "NE", "GE", "GT", "NOT AC",
+ "NOT AV", "NOT MV", "NOT MS", "NOT SV",
+ "NOT SZ", "NOT FLAG0_IN", "NOT FLAG1_IN", "NOT FLAG2_IN",
+ "NOT FLAG3_IN", "NOT TF", "NBM", "FOREVER"
};
static const char mr_regnames[16][8] =
{
- "MR0F", "MR1F", "MR2F", "MR0B", "MR1B", "MR2B", "???", "???",
- "???", "???", "???", "???", "???", "???", "???", "???"
+ "MR0F", "MR1F", "MR2F", "MR0B", "MR1B", "MR2B", "???", "???",
+ "???", "???", "???", "???", "???", "???", "???", "???"
};
struct SHARC_DASM_OP
diff --git a/src/emu/cpu/sharc/sharcmem.c b/src/emu/cpu/sharc/sharcmem.c
index e4947c98dba..7d1cae5f84c 100644
--- a/src/emu/cpu/sharc/sharcmem.c
+++ b/src/emu/cpu/sharc/sharcmem.c
@@ -7,7 +7,7 @@ static UINT32 pm_read32(SHARC_REGS *cpustate, UINT32 address)
UINT32 addr = (address & 0x7fff) * 3;
return (UINT32)(cpustate->internal_ram_block0[addr + 0] << 16) |
- (cpustate->internal_ram_block0[addr + 1]);
+ (cpustate->internal_ram_block0[addr + 1]);
}
else if (address >= 0x28000 && address < 0x40000)
{
@@ -15,7 +15,7 @@ static UINT32 pm_read32(SHARC_REGS *cpustate, UINT32 address)
UINT32 addr = (address & 0x7fff) * 3;
return (UINT32)(cpustate->internal_ram_block1[addr + 0] << 16) |
- (cpustate->internal_ram_block1[addr + 1]);
+ (cpustate->internal_ram_block1[addr + 1]);
}
else {
fatalerror("SHARC: PM Bus Read %08X at %08X\n", address, cpustate->pc);
@@ -53,8 +53,8 @@ static UINT64 pm_read48(SHARC_REGS *cpustate, UINT32 address)
UINT32 addr = (address & 0x7fff) * 3;
return ((UINT64)(cpustate->internal_ram_block0[addr + 0]) << 32) |
- ((UINT64)(cpustate->internal_ram_block0[addr + 1]) << 16) |
- ((UINT64)(cpustate->internal_ram_block0[addr + 2]) << 0);
+ ((UINT64)(cpustate->internal_ram_block0[addr + 1]) << 16) |
+ ((UINT64)(cpustate->internal_ram_block0[addr + 2]) << 0);
}
else if (address >= 0x28000 && address < 0x40000)
{
@@ -62,8 +62,8 @@ static UINT64 pm_read48(SHARC_REGS *cpustate, UINT32 address)
UINT32 addr = (address & 0x7fff) * 3;
return ((UINT64)(cpustate->internal_ram_block1[addr + 0]) << 32) |
- ((UINT64)(cpustate->internal_ram_block1[addr + 1]) << 16) |
- ((UINT64)(cpustate->internal_ram_block1[addr + 2]) << 0);
+ ((UINT64)(cpustate->internal_ram_block1[addr + 1]) << 16) |
+ ((UINT64)(cpustate->internal_ram_block1[addr + 2]) << 0);
}
else {
fatalerror("SHARC: PM Bus Read %08X at %08X\n", address, cpustate->pc);
@@ -109,7 +109,7 @@ static UINT32 dm_read32(SHARC_REGS *cpustate, UINT32 address)
UINT32 addr = (address & 0x7fff) * 2;
return (UINT32)(cpustate->internal_ram_block0[addr + 0] << 16) |
- (cpustate->internal_ram_block0[addr + 1]);
+ (cpustate->internal_ram_block0[addr + 1]);
}
else if (address >= 0x28000 && address < 0x40000)
{
@@ -117,7 +117,7 @@ static UINT32 dm_read32(SHARC_REGS *cpustate, UINT32 address)
UINT32 addr = (address & 0x7fff) * 2;
return (UINT32)(cpustate->internal_ram_block1[addr + 0] << 16) |
- (cpustate->internal_ram_block1[addr + 1]);
+ (cpustate->internal_ram_block1[addr + 1]);
}
// short word addressing
diff --git a/src/emu/cpu/sharc/sharcops.c b/src/emu/cpu/sharc/sharcops.c
index d00e741e037..14e7a56ffd8 100644
--- a/src/emu/cpu/sharc/sharcops.c
+++ b/src/emu/cpu/sharc/sharcops.c
@@ -1,123 +1,123 @@
-#define SIGN_EXTEND6(x) (((x) & 0x20) ? (0xffffffc0 | (x)) : (x))
-#define SIGN_EXTEND24(x) (((x) & 0x800000) ? (0xff000000 | (x)) : (x))
-
-#define PM_REG_I(x) (cpustate->dag2.i[x])
-#define PM_REG_M(x) (cpustate->dag2.m[x])
-#define PM_REG_B(x) (cpustate->dag2.b[x])
-#define PM_REG_L(x) (cpustate->dag2.l[x])
-#define DM_REG_I(x) (cpustate->dag1.i[x])
-#define DM_REG_M(x) (cpustate->dag1.m[x])
-#define DM_REG_B(x) (cpustate->dag1.b[x])
-#define DM_REG_L(x) (cpustate->dag1.l[x])
+#define SIGN_EXTEND6(x) (((x) & 0x20) ? (0xffffffc0 | (x)) : (x))
+#define SIGN_EXTEND24(x) (((x) & 0x800000) ? (0xff000000 | (x)) : (x))
+
+#define PM_REG_I(x) (cpustate->dag2.i[x])
+#define PM_REG_M(x) (cpustate->dag2.m[x])
+#define PM_REG_B(x) (cpustate->dag2.b[x])
+#define PM_REG_L(x) (cpustate->dag2.l[x])
+#define DM_REG_I(x) (cpustate->dag1.i[x])
+#define DM_REG_M(x) (cpustate->dag1.m[x])
+#define DM_REG_B(x) (cpustate->dag1.b[x])
+#define DM_REG_L(x) (cpustate->dag1.l[x])
// ASTAT flags
-#define AZ 0x1 /* ALU result zero */
-#define AV 0x2 /* ALU overflow */
-#define AN 0x4 /* ALU result negative */
-#define AC 0x8 /* ALU fixed-point carry */
-#define AS 0x10 /* ALU X input sign */
-#define AI 0x20 /* ALU floating-point invalid operation */
-#define MN 0x40 /* Multiplier result negative */
-#define MV 0x80 /* Multiplier overflow */
-#define MU 0x100 /* Multiplier underflow */
-#define MI 0x200 /* Multiplier floating-point invalid operation */
-#define AF 0x400
-#define SV 0x800 /* Shifter overflow */
-#define SZ 0x1000 /* Shifter result zero */
-#define SS 0x2000 /* Shifter input sign */
-#define BTF 0x40000 /* Bit Test Flag */
-#define FLG0 0x80000 /* FLAG0 */
-#define FLG1 0x100000 /* FLAG1 */
-#define FLG2 0x200000 /* FLAG2 */
-#define FLG3 0x400000 /* FLAG3 */
+#define AZ 0x1 /* ALU result zero */
+#define AV 0x2 /* ALU overflow */
+#define AN 0x4 /* ALU result negative */
+#define AC 0x8 /* ALU fixed-point carry */
+#define AS 0x10 /* ALU X input sign */
+#define AI 0x20 /* ALU floating-point invalid operation */
+#define MN 0x40 /* Multiplier result negative */
+#define MV 0x80 /* Multiplier overflow */
+#define MU 0x100 /* Multiplier underflow */
+#define MI 0x200 /* Multiplier floating-point invalid operation */
+#define AF 0x400
+#define SV 0x800 /* Shifter overflow */
+#define SZ 0x1000 /* Shifter result zero */
+#define SS 0x2000 /* Shifter input sign */
+#define BTF 0x40000 /* Bit Test Flag */
+#define FLG0 0x80000 /* FLAG0 */
+#define FLG1 0x100000 /* FLAG1 */
+#define FLG2 0x200000 /* FLAG2 */
+#define FLG3 0x400000 /* FLAG3 */
// STKY flags
-#define AUS 0x1 /* ALU floating-point underflow */
-#define AVS 0x2 /* ALU floating-point overflow */
-#define AOS 0x4 /* ALU fixed-point overflow */
-#define AIS 0x20 /* ALU floating-point invalid operation */
+#define AUS 0x1 /* ALU floating-point underflow */
+#define AVS 0x2 /* ALU floating-point overflow */
+#define AOS 0x4 /* ALU fixed-point overflow */
+#define AIS 0x20 /* ALU floating-point invalid operation */
// MODE1 flags
-#define MODE1_BR8 0x1 /* Bit-reverse for I8 */
-#define MODE1_BR0 0x2 /* Bit-reverse for I0 */
-#define MODE1_SRCU 0x4 /* Alternate register select for computational units */
-#define MODE1_SRD1H 0x8 /* DAG alternate register select (7-4) */
-#define MODE1_SRD1L 0x10 /* DAG alternate register select (3-0) */
-#define MODE1_SRD2H 0x20 /* DAG alternate register select (15-12) */
-#define MODE1_SRD2L 0x40 /* DAG alternate register select (11-8) */
-#define MODE1_SRRFH 0x80 /* Register file alternate select for R(15-8) */
-#define MODE1_SRRFL 0x400 /* Register file alternate select for R(7-0) */
-#define MODE1_NESTM 0x800 /* Interrupt nesting enable */
-#define MODE1_IRPTEN 0x1000 /* Global interrupt enable */
-#define MODE1_ALUSAT 0x2000 /* Enable ALU fixed-point saturation */
-#define MODE1_SSE 0x4000 /* Enable short word sign extension */
-#define MODE1_TRUNCATE 0x8000 /* (1) Floating-point truncation / (0) round to nearest */
-#define MODE1_RND32 0x10000 /* (1) 32-bit floating-point rounding / (0) 40-bit rounding */
-#define MODE1_CSEL 0x60000 /* CSelect */
+#define MODE1_BR8 0x1 /* Bit-reverse for I8 */
+#define MODE1_BR0 0x2 /* Bit-reverse for I0 */
+#define MODE1_SRCU 0x4 /* Alternate register select for computational units */
+#define MODE1_SRD1H 0x8 /* DAG alternate register select (7-4) */
+#define MODE1_SRD1L 0x10 /* DAG alternate register select (3-0) */
+#define MODE1_SRD2H 0x20 /* DAG alternate register select (15-12) */
+#define MODE1_SRD2L 0x40 /* DAG alternate register select (11-8) */
+#define MODE1_SRRFH 0x80 /* Register file alternate select for R(15-8) */
+#define MODE1_SRRFL 0x400 /* Register file alternate select for R(7-0) */
+#define MODE1_NESTM 0x800 /* Interrupt nesting enable */
+#define MODE1_IRPTEN 0x1000 /* Global interrupt enable */
+#define MODE1_ALUSAT 0x2000 /* Enable ALU fixed-point saturation */
+#define MODE1_SSE 0x4000 /* Enable short word sign extension */
+#define MODE1_TRUNCATE 0x8000 /* (1) Floating-point truncation / (0) round to nearest */
+#define MODE1_RND32 0x10000 /* (1) 32-bit floating-point rounding / (0) 40-bit rounding */
+#define MODE1_CSEL 0x60000 /* CSelect */
// MODE2 flags
-#define MODE2_IRQ0E 0x1 /* IRQ0 (1) Edge sens. / (0) Level sens. */
-#define MODE2_IRQ1E 0x2 /* IRQ1 (1) Edge sens. / (0) Level sens. */
-#define MODE2_IRQ2E 0x4 /* IRQ2 (1) Edge sens. / (0) Level sens. */
-#define MODE2_CADIS 0x10 /* Cache disable */
-#define MODE2_TIMEN 0x20 /* Timer enable */
-#define MODE2_BUSLK 0x40 /* External bus lock */
-#define MODE2_FLG0O 0x8000 /* FLAG0 (1) Output / (0) Input */
-#define MODE2_FLG1O 0x10000 /* FLAG1 (1) Output / (0) Input */
-#define MODE2_FLG2O 0x20000 /* FLAG2 (1) Output / (0) Input */
-#define MODE2_FLG3O 0x40000 /* FLAG3 (1) Output / (0) Input */
-#define MODE2_CAFRZ 0x80000 /* Cache freeze */
-
-
-#define REG_PC 0x63
-#define REG_PCSTK 0x64
-#define REG_PCSTKP 0x65
-#define REG_LADDR 0x66
-#define REG_CURLCNTR 0x67
-#define REG_LCNTR 0x68
-#define REG_USTAT1 0x70
-#define REG_USTAT2 0x71
-#define REG_IRPTL 0x79
-#define REG_MODE2 0x7a
-#define REG_MODE1 0x7b
-#define REG_ASTAT 0x7c
-#define REG_IMASK 0x7d
-#define REG_STKY 0x7e
-#define REG_IMASKP 0x7f
-
-
-
-#define REG(x) (cpustate->r[x].r)
-#define FREG(x) (cpustate->r[x].f)
-
-#define UPDATE_CIRCULAR_BUFFER_PM(x) \
- { \
- if (PM_REG_L(x) != 0) \
- { \
- if (PM_REG_I(x) > PM_REG_B(x)+PM_REG_L(x)) \
- { \
- PM_REG_I(x) -= PM_REG_L(x); \
- } \
- else if (PM_REG_I(x) < PM_REG_B(x)) \
- { \
- PM_REG_I(x) += PM_REG_L(x); \
- } \
- } \
- }
-
-#define UPDATE_CIRCULAR_BUFFER_DM(x) \
- { \
- if (DM_REG_L(x) != 0) \
- { \
- if (DM_REG_I(x) > DM_REG_B(x)+DM_REG_L(x)) \
- { \
- DM_REG_I(x) -= DM_REG_L(x); \
- } \
- else if (DM_REG_I(x) < DM_REG_B(x)) \
- { \
- DM_REG_I(x) += DM_REG_L(x); \
- } \
- } \
+#define MODE2_IRQ0E 0x1 /* IRQ0 (1) Edge sens. / (0) Level sens. */
+#define MODE2_IRQ1E 0x2 /* IRQ1 (1) Edge sens. / (0) Level sens. */
+#define MODE2_IRQ2E 0x4 /* IRQ2 (1) Edge sens. / (0) Level sens. */
+#define MODE2_CADIS 0x10 /* Cache disable */
+#define MODE2_TIMEN 0x20 /* Timer enable */
+#define MODE2_BUSLK 0x40 /* External bus lock */
+#define MODE2_FLG0O 0x8000 /* FLAG0 (1) Output / (0) Input */
+#define MODE2_FLG1O 0x10000 /* FLAG1 (1) Output / (0) Input */
+#define MODE2_FLG2O 0x20000 /* FLAG2 (1) Output / (0) Input */
+#define MODE2_FLG3O 0x40000 /* FLAG3 (1) Output / (0) Input */
+#define MODE2_CAFRZ 0x80000 /* Cache freeze */
+
+
+#define REG_PC 0x63
+#define REG_PCSTK 0x64
+#define REG_PCSTKP 0x65
+#define REG_LADDR 0x66
+#define REG_CURLCNTR 0x67
+#define REG_LCNTR 0x68
+#define REG_USTAT1 0x70
+#define REG_USTAT2 0x71
+#define REG_IRPTL 0x79
+#define REG_MODE2 0x7a
+#define REG_MODE1 0x7b
+#define REG_ASTAT 0x7c
+#define REG_IMASK 0x7d
+#define REG_STKY 0x7e
+#define REG_IMASKP 0x7f
+
+
+
+#define REG(x) (cpustate->r[x].r)
+#define FREG(x) (cpustate->r[x].f)
+
+#define UPDATE_CIRCULAR_BUFFER_PM(x) \
+ { \
+ if (PM_REG_L(x) != 0) \
+ { \
+ if (PM_REG_I(x) > PM_REG_B(x)+PM_REG_L(x)) \
+ { \
+ PM_REG_I(x) -= PM_REG_L(x); \
+ } \
+ else if (PM_REG_I(x) < PM_REG_B(x)) \
+ { \
+ PM_REG_I(x) += PM_REG_L(x); \
+ } \
+ } \
+ }
+
+#define UPDATE_CIRCULAR_BUFFER_DM(x) \
+ { \
+ if (DM_REG_L(x) != 0) \
+ { \
+ if (DM_REG_I(x) > DM_REG_B(x)+DM_REG_L(x)) \
+ { \
+ DM_REG_I(x) -= DM_REG_L(x); \
+ } \
+ else if (DM_REG_I(x) < DM_REG_B(x)) \
+ { \
+ DM_REG_I(x) += DM_REG_L(x); \
+ } \
+ } \
}
@@ -154,7 +154,7 @@ static void systemreg_write_latency_effect(SHARC_REGS *cpustate)
switch(cpustate->systemreg_latency_reg)
{
- case 0xb: /* MODE1 */
+ case 0xb: /* MODE1 */
{
UINT32 oldreg = old_data;
cpustate->mode1 = data;
@@ -172,7 +172,7 @@ static void systemreg_write_latency_effect(SHARC_REGS *cpustate)
fatalerror("SHARC: systemreg_latency_op: enable MR alternate\n");
}
- if ((data & 0x8) != (oldreg & 0x8)) /* Switch DAG1 7-4 */
+ if ((data & 0x8) != (oldreg & 0x8)) /* Switch DAG1 7-4 */
{
swap_register(&cpustate->dag1.i[4], &cpustate->dag1_alt.i[4]);
swap_register(&cpustate->dag1.i[5], &cpustate->dag1_alt.i[5]);
@@ -191,7 +191,7 @@ static void systemreg_write_latency_effect(SHARC_REGS *cpustate)
swap_register(&cpustate->dag1.b[6], &cpustate->dag1_alt.b[6]);
swap_register(&cpustate->dag1.b[7], &cpustate->dag1_alt.b[7]);
}
- if ((data & 0x10) != (oldreg & 0x10)) /* Switch DAG1 3-0 */
+ if ((data & 0x10) != (oldreg & 0x10)) /* Switch DAG1 3-0 */
{
swap_register(&cpustate->dag1.i[0], &cpustate->dag1_alt.i[0]);
swap_register(&cpustate->dag1.i[1], &cpustate->dag1_alt.i[1]);
@@ -210,7 +210,7 @@ static void systemreg_write_latency_effect(SHARC_REGS *cpustate)
swap_register(&cpustate->dag1.b[2], &cpustate->dag1_alt.b[2]);
swap_register(&cpustate->dag1.b[3], &cpustate->dag1_alt.b[3]);
}
- if ((data & 0x20) != (oldreg & 0x20)) /* Switch DAG2 15-12 */
+ if ((data & 0x20) != (oldreg & 0x20)) /* Switch DAG2 15-12 */
{
swap_register(&cpustate->dag2.i[4], &cpustate->dag2_alt.i[4]);
swap_register(&cpustate->dag2.i[5], &cpustate->dag2_alt.i[5]);
@@ -229,7 +229,7 @@ static void systemreg_write_latency_effect(SHARC_REGS *cpustate)
swap_register(&cpustate->dag2.b[6], &cpustate->dag2_alt.b[6]);
swap_register(&cpustate->dag2.b[7], &cpustate->dag2_alt.b[7]);
}
- if ((data & 0x40) != (oldreg & 0x40)) /* Switch DAG2 11-8 */
+ if ((data & 0x40) != (oldreg & 0x40)) /* Switch DAG2 11-8 */
{
swap_register(&cpustate->dag2.i[0], &cpustate->dag2_alt.i[0]);
swap_register(&cpustate->dag2.i[1], &cpustate->dag2_alt.i[1]);
@@ -260,7 +260,7 @@ static void systemreg_write_latency_effect(SHARC_REGS *cpustate)
}
break;
}
- default: fatalerror("SHARC: systemreg_latency_op: unknown register %02X at %08X\n", cpustate->systemreg_latency_reg, cpustate->pc);
+ default: fatalerror("SHARC: systemreg_latency_op: unknown register %02X at %08X\n", cpustate->systemreg_latency_reg, cpustate->pc);
}
cpustate->systemreg_latency_reg = -1;
@@ -271,18 +271,18 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
int reg = ureg & 0xf;
switch((ureg >> 4) & 0xf)
{
- case 0x0: /* R0 - R15 */
+ case 0x0: /* R0 - R15 */
{
return cpustate->r[reg].r;
}
case 0x1:
{
- if (reg & 0x8) /* I8 - I15 */
+ if (reg & 0x8) /* I8 - I15 */
{
return cpustate->dag2.i[reg & 0x7];
}
- else /* I0 - I7 */
+ else /* I0 - I7 */
{
return cpustate->dag1.i[reg & 0x7];
}
@@ -290,14 +290,14 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
case 0x2:
{
- if (reg & 0x8) /* M8 - M15 */
+ if (reg & 0x8) /* M8 - M15 */
{
INT32 r = cpustate->dag2.m[reg & 0x7];
- if (r & 0x800000) r |= 0xff000000;
+ if (r & 0x800000) r |= 0xff000000;
return r;
}
- else /* M0 - M7 */
+ else /* M0 - M7 */
{
return cpustate->dag1.m[reg & 0x7];
}
@@ -305,11 +305,11 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
case 0x3:
{
- if (reg & 0x8) /* L8 - L15 */
+ if (reg & 0x8) /* L8 - L15 */
{
return cpustate->dag2.l[reg & 0x7];
}
- else /* L0 - L7 */
+ else /* L0 - L7 */
{
return cpustate->dag1.l[reg & 0x7];
}
@@ -317,11 +317,11 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
case 0x4:
{
- if (reg & 0x8) /* B8 - B15 */
+ if (reg & 0x8) /* B8 - B15 */
{
return cpustate->dag2.b[reg & 0x7];
}
- else /* B0 - B7 */
+ else /* B0 - B7 */
{
return cpustate->dag1.b[reg & 0x7];
}
@@ -331,8 +331,8 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
{
switch(reg)
{
- case 0x4: return cpustate->pcstack[cpustate->pcstkp]; /* PCSTK */
- default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ case 0x4: return cpustate->pcstack[cpustate->pcstkp]; /* PCSTK */
+ default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
break;
}
@@ -341,12 +341,12 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
{
switch(reg)
{
- case 0x0: return cpustate->ustat1; /* USTAT1 */
- case 0x1: return cpustate->ustat2; /* USTAT2 */
- case 0x9: return cpustate->irptl; /* IRPTL */
- case 0xa: return cpustate->mode2; /* MODE2 */
- case 0xb: return cpustate->mode1; /* MODE1 */
- case 0xc: /* ASTAT */
+ case 0x0: return cpustate->ustat1; /* USTAT1 */
+ case 0x1: return cpustate->ustat2; /* USTAT2 */
+ case 0x9: return cpustate->irptl; /* IRPTL */
+ case 0xa: return cpustate->mode2; /* MODE2 */
+ case 0xb: return cpustate->mode1; /* MODE1 */
+ case 0xc: /* ASTAT */
{
UINT32 r = cpustate->astat;
r &= ~0x00780000;
@@ -356,9 +356,9 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
r |= (cpustate->flag[3] << 22);
return r;
}
- case 0xd: return cpustate->imask; /* IMASK */
- case 0xe: return cpustate->stky; /* STKY */
- default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ case 0xd: return cpustate->imask; /* IMASK */
+ case 0xe: return cpustate->stky; /* STKY */
+ default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
break;
}
@@ -368,15 +368,15 @@ static UINT32 GET_UREG(SHARC_REGS *cpustate, int ureg)
switch(reg)
{
/* PX needs to be handled separately if the whole 48 bits are needed */
- case 0xb: return (UINT32)(cpustate->px); /* PX */
- case 0xc: return (UINT16)(cpustate->px); /* PX1 */
- case 0xd: return (UINT32)(cpustate->px >> 16); /* PX2 */
- default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ case 0xb: return (UINT32)(cpustate->px); /* PX */
+ case 0xc: return (UINT16)(cpustate->px); /* PX1 */
+ case 0xd: return (UINT32)(cpustate->px >> 16); /* PX2 */
+ default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
break;
}
- default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ default: fatalerror("SHARC: GET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
}
@@ -385,38 +385,38 @@ static void SET_UREG(SHARC_REGS *cpustate, int ureg, UINT32 data)
int reg = ureg & 0xf;
switch((ureg >> 4) & 0xf)
{
- case 0x0: /* R0 - R15 */
+ case 0x0: /* R0 - R15 */
cpustate->r[reg].r = data;
break;
case 0x1:
- if (reg & 0x8) /* I8 - I15 */
+ if (reg & 0x8) /* I8 - I15 */
{
cpustate->dag2.i[reg & 0x7] = data;
}
- else /* I0 - I7 */
+ else /* I0 - I7 */
{
cpustate->dag1.i[reg & 0x7] = data;
}
break;
case 0x2:
- if (reg & 0x8) /* M8 - M15 */
+ if (reg & 0x8) /* M8 - M15 */
{
cpustate->dag2.m[reg & 0x7] = data;
}
- else /* M0 - M7 */
+ else /* M0 - M7 */
{
cpustate->dag1.m[reg & 0x7] = data;
}
break;
case 0x3:
- if (reg & 0x8) /* L8 - L15 */
+ if (reg & 0x8) /* L8 - L15 */
{
cpustate->dag2.l[reg & 0x7] = data;
}
- else /* L0 - L7 */
+ else /* L0 - L7 */
{
cpustate->dag1.l[reg & 0x7] = data;
}
@@ -424,12 +424,12 @@ static void SET_UREG(SHARC_REGS *cpustate, int ureg, UINT32 data)
case 0x4:
// Note: loading B also loads the same value in I
- if (reg & 0x8) /* B8 - B15 */
+ if (reg & 0x8) /* B8 - B15 */
{
cpustate->dag2.b[reg & 0x7] = data;
cpustate->dag2.i[reg & 0x7] = data;
}
- else /* B0 - B7 */
+ else /* B0 - B7 */
{
cpustate->dag1.b[reg & 0x7] = data;
cpustate->dag1.i[reg & 0x7] = data;
@@ -439,62 +439,62 @@ static void SET_UREG(SHARC_REGS *cpustate, int ureg, UINT32 data)
case 0x6:
switch (reg)
{
- case 0x5: cpustate->pcstkp = data; break; /* PCSTKP */
- case 0x8: cpustate->lcntr = data; break; /* LCNTR */
- default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ case 0x5: cpustate->pcstkp = data; break; /* PCSTKP */
+ case 0x8: cpustate->lcntr = data; break; /* LCNTR */
+ default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
break;
- case 0x7: /* system regs */
+ case 0x7: /* system regs */
switch(reg)
{
- case 0x0: cpustate->ustat1 = data; break; /* USTAT1 */
- case 0x1: cpustate->ustat2 = data; break; /* USTAT2 */
+ case 0x0: cpustate->ustat1 = data; break; /* USTAT1 */
+ case 0x1: cpustate->ustat2 = data; break; /* USTAT2 */
- case 0x9: cpustate->irptl = data; break; /* IRPTL */
- case 0xa: cpustate->mode2 = data; break; /* MODE2 */
+ case 0x9: cpustate->irptl = data; break; /* IRPTL */
+ case 0xa: cpustate->mode2 = data; break; /* MODE2 */
- case 0xb: /* MODE1 */
+ case 0xb: /* MODE1 */
{
add_systemreg_write_latency_effect(cpustate, reg, data, cpustate->mode1);
cpustate->mode1 = data;
break;
}
- case 0xc: cpustate->astat = data; break; /* ASTAT */
+ case 0xc: cpustate->astat = data; break; /* ASTAT */
- case 0xd: /* IMASK */
+ case 0xd: /* IMASK */
{
check_interrupts(cpustate);
cpustate->imask = data;
break;
}
- case 0xe: cpustate->stky = data; break; /* STKY */
- default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ case 0xe: cpustate->stky = data; break; /* STKY */
+ default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
break;
case 0xd:
switch(reg)
{
- case 0xc: cpustate->px &= U64(0xffffffffffff0000); cpustate->px |= (data & 0xffff); break; /* PX1 */
- case 0xd: cpustate->px &= U64(0x000000000000ffff); cpustate->px |= (UINT64)data << 16; break; /* PX2 */
- default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ case 0xc: cpustate->px &= U64(0xffffffffffff0000); cpustate->px |= (data & 0xffff); break; /* PX1 */
+ case 0xd: cpustate->px &= U64(0x000000000000ffff); cpustate->px |= (UINT64)data << 16; break; /* PX2 */
+ default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
break;
- default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
+ default: fatalerror("SHARC: SET_UREG: unknown register %08X at %08X\n", ureg, cpustate->pc);
}
}
/*****************************************************************************/
-#define SET_FLAG_SV_LSHIFT(x, shift) if((x) & ((UINT32)0xffffffff << shift)) cpustate->astat |= SV
-#define SET_FLAG_SV_RSHIFT(x, shift) if((x) & ((UINT32)0xffffffff >> shift)) cpustate->astat |= SV
+#define SET_FLAG_SV_LSHIFT(x, shift) if((x) & ((UINT32)0xffffffff << shift)) cpustate->astat |= SV
+#define SET_FLAG_SV_RSHIFT(x, shift) if((x) & ((UINT32)0xffffffff >> shift)) cpustate->astat |= SV
-#define SET_FLAG_SZ(x) if((x) == 0) cpustate->astat |= SZ
+#define SET_FLAG_SZ(x) if((x) == 0) cpustate->astat |= SZ
-#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((UINT32)0xffffffff) >> (32 - (start_bit + length))))
+#define MAKE_EXTRACT_MASK(start_bit, length) ((0xffffffff << start_bit) & (((UINT32)0xffffffff) >> (32 - (start_bit + length))))
static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int rn, int rx)
{
@@ -506,7 +506,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
switch(shiftop)
{
- case 0x00: /* LSHIFT Rx BY <data8>*/
+ case 0x00: /* LSHIFT Rx BY <data8>*/
{
if(shift < 0) {
REG(rn) = (shift > -32 ) ? (REG(rx) >> -shift) : 0;
@@ -521,7 +521,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x01: /* ASHIFT Rx BY <data8> */
+ case 0x01: /* ASHIFT Rx BY <data8> */
{
if (shift < 0)
{
@@ -539,25 +539,25 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x02: /* ROT Rx BY <data8> */
+ case 0x02: /* ROT Rx BY <data8> */
{
if (shift < 0)
{
int s = (-shift) & 0x1f;
REG(rn) = (((UINT32)REG(rx) >> s) & ((UINT32)(0xffffffff) >> s)) |
- (((UINT32)REG(rx) << (32-s)) & ((UINT32)(0xffffffff) << (32-s)));
+ (((UINT32)REG(rx) << (32-s)) & ((UINT32)(0xffffffff) << (32-s)));
}
else
{
int s = shift & 0x1f;
REG(rn) = (((UINT32)REG(rx) << s) & ((UINT32)(0xffffffff) << s)) |
- (((UINT32)REG(rx) >> (32-s)) & ((UINT32)(0xffffffff) >> (32-s)));
+ (((UINT32)REG(rx) >> (32-s)) & ((UINT32)(0xffffffff) >> (32-s)));
}
SET_FLAG_SZ(REG(rn));
break;
}
- case 0x08: /* Rn = Rn OR LSHIFT Rx BY <data8> */
+ case 0x08: /* Rn = Rn OR LSHIFT Rx BY <data8> */
{
UINT32 r = 0;
if(shift < 0) {
@@ -575,7 +575,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x10: /* FEXT Rx BY <bit6>:<len6> */
+ case 0x10: /* FEXT Rx BY <bit6>:<len6> */
{
UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(bit, len);
REG(rn) = ext >> bit;
@@ -588,7 +588,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x12: /* FEXT Rx BY <bit6>:<len6> (Sign Extended) */
+ case 0x12: /* FEXT Rx BY <bit6>:<len6> (Sign Extended) */
{
UINT32 ext = (REG(rx) & MAKE_EXTRACT_MASK(bit, len)) >> bit;
if (ext & (1 << (len-1))) {
@@ -604,7 +604,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x13: /* FDEP Rx BY Ry <bit6>:<len6> (Sign Extended) */
+ case 0x13: /* FDEP Rx BY Ry <bit6>:<len6> (Sign Extended) */
{
UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
if (ext & (1 << (len-1))) {
@@ -620,7 +620,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x19: /* Rn = Rn OR FDEP Rx BY <bit6>:<len6> */
+ case 0x19: /* Rn = Rn OR FDEP Rx BY <bit6>:<len6> */
{
UINT32 ext = REG(rx) & MAKE_EXTRACT_MASK(0, len);
@@ -634,7 +634,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x30: /* BSET Rx BY <data8> */
+ case 0x30: /* BSET Rx BY <data8> */
{
REG(rn) = REG(rx);
if (data >= 0 && data < 32)
@@ -649,7 +649,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x31: /* BCLR Rx BY <data8> */
+ case 0x31: /* BCLR Rx BY <data8> */
{
REG(rn) = REG(rx);
if (data >= 0 && data < 32)
@@ -664,7 +664,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x32: /* BTGL Rx BY <data8> */
+ case 0x32: /* BTGL Rx BY <data8> */
{
REG(rn) = REG(rx);
if (data >= 0 && data < 32)
@@ -679,7 +679,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- case 0x33: /* BTST Rx BY <data8> */
+ case 0x33: /* BTST Rx BY <data8> */
{
if (data < 32)
{
@@ -694,7 +694,7 @@ static void SHIFT_OPERATION_IMM(SHARC_REGS *cpustate, int shiftop, int data, int
break;
}
- default: fatalerror("SHARC: unimplemented shift operation %02X at %08X\n", shiftop, cpustate->pc);
+ default: fatalerror("SHARC: unimplemented shift operation %02X at %08X\n", shiftop, cpustate->pc);
}
}
@@ -712,64 +712,64 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
//int ra = rn;
//int rm = rs;
- if(opcode & 0x400000) /* Multi-function opcode */
+ if(opcode & 0x400000) /* Multi-function opcode */
{
int fm = (opcode >> 12) & 0xf;
int fa = (opcode >> 8) & 0xf;
- int fxm = (opcode >> 6) & 0x3; // registers 0 - 3
- int fym = ((opcode >> 4) & 0x3) + 4; // registers 4 - 7
- int fxa = ((opcode >> 2) & 0x3) + 8; // registers 8 - 11
- int fya = (opcode & 0x3) + 12; // registers 12 - 15
+ int fxm = (opcode >> 6) & 0x3; // registers 0 - 3
+ int fym = ((opcode >> 4) & 0x3) + 4; // registers 4 - 7
+ int fxa = ((opcode >> 2) & 0x3) + 8; // registers 8 - 11
+ int fya = (opcode & 0x3) + 12; // registers 12 - 15
multiop = (opcode >> 16) & 0x3f;
switch(multiop)
{
- case 0x00: compute_multi_mr_to_reg(cpustate, op & 0xf, rn); break;
- case 0x01: compute_multi_reg_to_mr(cpustate, op & 0xf, rn); break;
+ case 0x00: compute_multi_mr_to_reg(cpustate, op & 0xf, rn); break;
+ case 0x01: compute_multi_reg_to_mr(cpustate, op & 0xf, rn); break;
- case 0x04: /* Rm = Rxm * Rym (SSFR), Ra = Rxa + Rya */
+ case 0x04: /* Rm = Rxm * Rym (SSFR), Ra = Rxa + Rya */
{
compute_mul_ssfr_add(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
}
- case 0x05: /* Rm = Rxm * Rym (SSFR), Ra = Rxa - Rya */
+ case 0x05: /* Rm = Rxm * Rym (SSFR), Ra = Rxa - Rya */
{
compute_mul_ssfr_sub(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
}
- case 0x18: /* Fm = Fxm * Fym, Fa = Fxa + Fya */
+ case 0x18: /* Fm = Fxm * Fym, Fa = Fxa + Fya */
{
compute_fmul_fadd(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
}
- case 0x19: /* Fm = Fxm * Fym, Fa = Fxa - Fya */
+ case 0x19: /* Fm = Fxm * Fym, Fa = Fxa - Fya */
{
compute_fmul_fsub(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
}
- case 0x1a: /* Fm = Fxm * Fym, Fa = FLOAT Fxa BY Fya */
+ case 0x1a: /* Fm = Fxm * Fym, Fa = FLOAT Fxa BY Fya */
{
compute_fmul_float_scaled(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
}
- case 0x1b: /* Fm = Fxm * Fym, Fa = FIX Fxa BY Fya */
+ case 0x1b: /* Fm = Fxm * Fym, Fa = FIX Fxa BY Fya */
{
compute_fmul_fix_scaled(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
}
- case 0x1e: /* Fm = Fxm * Fym, Fa = MAX(Fxa, Fya) */
+ case 0x1e: /* Fm = Fxm * Fym, Fa = MAX(Fxa, Fya) */
{
compute_fmul_fmax(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
}
- case 0x1f: /* Fm = Fxm * Fym, Fa = MIN(Fxa, Fya) */
+ case 0x1f: /* Fm = Fxm * Fym, Fa = MIN(Fxa, Fya) */
{
compute_fmul_fmin(cpustate, fm, fxm, fym, fa, fxa, fya);
break;
@@ -790,7 +790,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
}
- else /* Single-function opcode */
+ else /* Single-function opcode */
{
switch(cu)
{
@@ -799,39 +799,39 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
{
switch(op)
{
- case 0x01: compute_add(cpustate, rn, rx, ry); break;
- case 0x02: compute_sub(cpustate, rn, rx, ry); break;
- case 0x05: compute_add_ci(cpustate, rn, rx, ry); break;
- case 0x06: compute_sub_ci(cpustate, rn, rx, ry); break;
- case 0x0a: compute_comp(cpustate, rx, ry); break;
- case 0x21: compute_pass(cpustate, rn, rx); break;
- case 0x22: compute_neg(cpustate, rn, rx); break;
- case 0x29: compute_inc(cpustate, rn, rx); break;
- case 0x2a: compute_dec(cpustate, rn, rx); break;
- case 0x40: compute_and(cpustate, rn, rx, ry); break;
- case 0x41: compute_or(cpustate, rn, rx, ry); break;
- case 0x42: compute_xor(cpustate, rn, rx, ry); break;
- case 0x43: compute_not(cpustate, rn, rx); break;
- case 0x61: compute_min(cpustate, rn, rx, ry); break;
- case 0x62: compute_max(cpustate, rn, rx, ry); break;
- case 0x81: compute_fadd(cpustate, rn, rx, ry); break;
- case 0x82: compute_fsub(cpustate, rn, rx, ry); break;
- case 0x8a: compute_fcomp(cpustate, rx, ry); break;
- case 0x91: compute_fabs_plus(cpustate, rn, rx, ry); break;
- case 0xa1: compute_fpass(cpustate, rn, rx); break;
- case 0xa2: compute_fneg(cpustate, rn, rx); break;
- case 0xb0: compute_fabs(cpustate, rn, rx); break;
- case 0xbd: compute_scalb(cpustate, rn, rx, ry); break;
- case 0xc1: compute_logb(cpustate, rn, rx); break;
- case 0xc4: compute_recips(cpustate, rn, rx); break;
- case 0xc5: compute_rsqrts(cpustate, rn, rx); break;
- case 0xc9: compute_fix(cpustate, rn, rx); break;
- case 0xca: compute_float(cpustate, rn, rx); break;
- case 0xd9: compute_fix_scaled(cpustate, rn, rx, ry); break;
- case 0xda: compute_float_scaled(cpustate, rn, rx, ry); break;
- case 0xe1: compute_fmin(cpustate, rn, rx, ry); break;
- case 0xe2: compute_fmax(cpustate, rn, rx, ry); break;
- case 0xe3: compute_fclip(cpustate, rn, rx, ry); break;
+ case 0x01: compute_add(cpustate, rn, rx, ry); break;
+ case 0x02: compute_sub(cpustate, rn, rx, ry); break;
+ case 0x05: compute_add_ci(cpustate, rn, rx, ry); break;
+ case 0x06: compute_sub_ci(cpustate, rn, rx, ry); break;
+ case 0x0a: compute_comp(cpustate, rx, ry); break;
+ case 0x21: compute_pass(cpustate, rn, rx); break;
+ case 0x22: compute_neg(cpustate, rn, rx); break;
+ case 0x29: compute_inc(cpustate, rn, rx); break;
+ case 0x2a: compute_dec(cpustate, rn, rx); break;
+ case 0x40: compute_and(cpustate, rn, rx, ry); break;
+ case 0x41: compute_or(cpustate, rn, rx, ry); break;
+ case 0x42: compute_xor(cpustate, rn, rx, ry); break;
+ case 0x43: compute_not(cpustate, rn, rx); break;
+ case 0x61: compute_min(cpustate, rn, rx, ry); break;
+ case 0x62: compute_max(cpustate, rn, rx, ry); break;
+ case 0x81: compute_fadd(cpustate, rn, rx, ry); break;
+ case 0x82: compute_fsub(cpustate, rn, rx, ry); break;
+ case 0x8a: compute_fcomp(cpustate, rx, ry); break;
+ case 0x91: compute_fabs_plus(cpustate, rn, rx, ry); break;
+ case 0xa1: compute_fpass(cpustate, rn, rx); break;
+ case 0xa2: compute_fneg(cpustate, rn, rx); break;
+ case 0xb0: compute_fabs(cpustate, rn, rx); break;
+ case 0xbd: compute_scalb(cpustate, rn, rx, ry); break;
+ case 0xc1: compute_logb(cpustate, rn, rx); break;
+ case 0xc4: compute_recips(cpustate, rn, rx); break;
+ case 0xc5: compute_rsqrts(cpustate, rn, rx); break;
+ case 0xc9: compute_fix(cpustate, rn, rx); break;
+ case 0xca: compute_float(cpustate, rn, rx); break;
+ case 0xd9: compute_fix_scaled(cpustate, rn, rx, ry); break;
+ case 0xda: compute_float_scaled(cpustate, rn, rx, ry); break;
+ case 0xe1: compute_fmin(cpustate, rn, rx, ry); break;
+ case 0xe2: compute_fmax(cpustate, rn, rx, ry); break;
+ case 0xe3: compute_fclip(cpustate, rn, rx, ry); break;
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
@@ -853,7 +853,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- default: fatalerror("SHARC: compute: unimplemented ALU operation %02X (%08X, %08X)\n", op, cpustate->pc, opcode);
+ default: fatalerror("SHARC: compute: unimplemented ALU operation %02X (%08X, %08X)\n", op, cpustate->pc, opcode);
}
break;
}
@@ -864,15 +864,15 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
{
switch(op)
{
- case 0x14: cpustate->mrf = 0; break;
- case 0x16: cpustate->mrb = 0; break;
+ case 0x14: cpustate->mrf = 0; break;
+ case 0x16: cpustate->mrb = 0; break;
- case 0x30: compute_fmul(cpustate, rn, rx, ry); break;
- case 0x40: compute_mul_uuin(cpustate, rn, rx, ry); break;
- case 0x70: compute_mul_ssin(cpustate, rn, rx, ry); break;
+ case 0x30: compute_fmul(cpustate, rn, rx, ry); break;
+ case 0x40: compute_mul_uuin(cpustate, rn, rx, ry); break;
+ case 0x70: compute_mul_ssin(cpustate, rn, rx, ry); break;
- case 0xb0: REG(rn) = compute_mrf_plus_mul_ssin(cpustate, rx, ry); break;
- case 0xb2: REG(rn) = compute_mrb_plus_mul_ssin(cpustate, rx, ry); break;
+ case 0xb0: REG(rn) = compute_mrf_plus_mul_ssin(cpustate, rx, ry); break;
+ case 0xb2: REG(rn) = compute_mrb_plus_mul_ssin(cpustate, rx, ry); break;
default:
fatalerror("SHARC: compute: multiplier operation %02X not implemented ! (%08X, %08X)\n", op, cpustate->pc, opcode);
@@ -890,7 +890,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
op >>= 2;
switch(op)
{
- case 0x00: /* LSHIFT Rx BY Ry*/
+ case 0x00: /* LSHIFT Rx BY Ry*/
{
int shift = REG(ry);
if(shift < 0)
@@ -909,20 +909,20 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x02: /* ROT Rx BY Ry */
+ case 0x02: /* ROT Rx BY Ry */
{
int shift = REG(ry);
if (shift < 0)
{
int s = (-shift) & 0x1f;
REG(rn) = (((UINT32)REG(rx) >> s) & ((UINT32)(0xffffffff) >> s)) |
- (((UINT32)REG(rx) << (32-s)) & ((UINT32)(0xffffffff) << (32-s)));
+ (((UINT32)REG(rx) << (32-s)) & ((UINT32)(0xffffffff) << (32-s)));
}
else
{
int s = shift & 0x1f;
REG(rn) = (((UINT32)REG(rx) << s) & ((UINT32)(0xffffffff) << s)) |
- (((UINT32)REG(rx) >> (32-s)) & ((UINT32)(0xffffffff) >> (32-s)));
+ (((UINT32)REG(rx) >> (32-s)) & ((UINT32)(0xffffffff) >> (32-s)));
if (shift > 0)
{
cpustate->astat |= SV;
@@ -932,7 +932,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x08: /* Rn = Rn OR LSHIFT Rx BY Ry*/
+ case 0x08: /* Rn = Rn OR LSHIFT Rx BY Ry*/
{
INT8 shift = REG(ry);
if(shift < 0) {
@@ -948,7 +948,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x10: /* FEXT Rx BY Ry */
+ case 0x10: /* FEXT Rx BY Ry */
{
int bit = REG(ry) & 0x3f;
int len = (REG(ry) >> 6) & 0x3f;
@@ -963,7 +963,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x12: /* FEXT Rx BY Ry (Sign Extended) */
+ case 0x12: /* FEXT Rx BY Ry (Sign Extended) */
{
int bit = REG(ry) & 0x3f;
int len = (REG(ry) >> 6) & 0x3f;
@@ -981,7 +981,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x19: /* Rn = Rn OR FDEP Rx BY Ry */
+ case 0x19: /* Rn = Rn OR FDEP Rx BY Ry */
{
int bit = REG(ry) & 0x3f;
int len = (REG(ry) >> 6) & 0x3f;
@@ -997,7 +997,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x30: /* BSET Rx BY Ry */
+ case 0x30: /* BSET Rx BY Ry */
{
UINT32 shift = REG(ry);
REG(rn) = REG(rx);
@@ -1013,7 +1013,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x31: /* BCLR Rx BY Ry */
+ case 0x31: /* BCLR Rx BY Ry */
{
UINT32 shift = REG(ry);
REG(rn) = REG(rx);
@@ -1029,7 +1029,7 @@ static void COMPUTE(SHARC_REGS *cpustate, UINT32 opcode)
break;
}
- case 0x33: /* BTST Rx BY Ry */
+ case 0x33: /* BTST Rx BY Ry */
{
UINT32 shift = REG(ry);
if (shift < 32)
@@ -1203,38 +1203,38 @@ INLINE int IF_CONDITION_CODE(SHARC_REGS *cpustate, int cond)
{
switch(cond)
{
- case 0x00: return cpustate->astat & AZ; /* EQ */
- case 0x01: return !(cpustate->astat & AZ) && (cpustate->astat & AN); /* LT */
- case 0x02: return (cpustate->astat & AZ) || (cpustate->astat & AN); /* LE */
- case 0x03: return (cpustate->astat & AC); /* AC */
- case 0x04: return (cpustate->astat & AV); /* AV */
- case 0x05: return (cpustate->astat & MV); /* MV */
- case 0x06: return (cpustate->astat & MN); /* MS */
- case 0x07: return (cpustate->astat & SV); /* SV */
- case 0x08: return (cpustate->astat & SZ); /* SZ */
- case 0x09: return (cpustate->flag[0] != 0); /* FLAG0 */
- case 0x0a: return (cpustate->flag[1] != 0); /* FLAG1 */
- case 0x0b: return (cpustate->flag[2] != 0); /* FLAG2 */
- case 0x0c: return (cpustate->flag[3] != 0); /* FLAG3 */
- case 0x0d: return (cpustate->astat & BTF); /* TF */
- case 0x0e: return 0; /* BM */
- case 0x0f: return (cpustate->curlcntr!=1); /* NOT LCE */
- case 0x10: return !(cpustate->astat & AZ); /* NOT EQUAL */
- case 0x11: return (cpustate->astat & AZ) || !(cpustate->astat & AN); /* GE */
- case 0x12: return !(cpustate->astat & AZ) && !(cpustate->astat & AN); /* GT */
- case 0x13: return !(cpustate->astat & AC); /* NOT AC */
- case 0x14: return !(cpustate->astat & AV); /* NOT AV */
- case 0x15: return !(cpustate->astat & MV); /* NOT MV */
- case 0x16: return !(cpustate->astat & MN); /* NOT MS */
- case 0x17: return !(cpustate->astat & SV); /* NOT SV */
- case 0x18: return !(cpustate->astat & SZ); /* NOT SZ */
- case 0x19: return (cpustate->flag[0] == 0); /* NOT FLAG0 */
- case 0x1a: return (cpustate->flag[1] == 0); /* NOT FLAG1 */
- case 0x1b: return (cpustate->flag[2] == 0); /* NOT FLAG2 */
- case 0x1c: return (cpustate->flag[3] == 0); /* NOT FLAG3 */
- case 0x1d: return !(cpustate->astat & BTF); /* NOT TF */
- case 0x1e: return 1; /* NOT BM */
- case 0x1f: return 1; /* TRUE */
+ case 0x00: return cpustate->astat & AZ; /* EQ */
+ case 0x01: return !(cpustate->astat & AZ) && (cpustate->astat & AN); /* LT */
+ case 0x02: return (cpustate->astat & AZ) || (cpustate->astat & AN); /* LE */
+ case 0x03: return (cpustate->astat & AC); /* AC */
+ case 0x04: return (cpustate->astat & AV); /* AV */
+ case 0x05: return (cpustate->astat & MV); /* MV */
+ case 0x06: return (cpustate->astat & MN); /* MS */
+ case 0x07: return (cpustate->astat & SV); /* SV */
+ case 0x08: return (cpustate->astat & SZ); /* SZ */
+ case 0x09: return (cpustate->flag[0] != 0); /* FLAG0 */
+ case 0x0a: return (cpustate->flag[1] != 0); /* FLAG1 */
+ case 0x0b: return (cpustate->flag[2] != 0); /* FLAG2 */
+ case 0x0c: return (cpustate->flag[3] != 0); /* FLAG3 */
+ case 0x0d: return (cpustate->astat & BTF); /* TF */
+ case 0x0e: return 0; /* BM */
+ case 0x0f: return (cpustate->curlcntr!=1); /* NOT LCE */
+ case 0x10: return !(cpustate->astat & AZ); /* NOT EQUAL */
+ case 0x11: return (cpustate->astat & AZ) || !(cpustate->astat & AN); /* GE */
+ case 0x12: return !(cpustate->astat & AZ) && !(cpustate->astat & AN); /* GT */
+ case 0x13: return !(cpustate->astat & AC); /* NOT AC */
+ case 0x14: return !(cpustate->astat & AV); /* NOT AV */
+ case 0x15: return !(cpustate->astat & MV); /* NOT MV */
+ case 0x16: return !(cpustate->astat & MN); /* NOT MS */
+ case 0x17: return !(cpustate->astat & SV); /* NOT SV */
+ case 0x18: return !(cpustate->astat & SZ); /* NOT SZ */
+ case 0x19: return (cpustate->flag[0] == 0); /* NOT FLAG0 */
+ case 0x1a: return (cpustate->flag[1] == 0); /* NOT FLAG1 */
+ case 0x1b: return (cpustate->flag[2] == 0); /* NOT FLAG2 */
+ case 0x1c: return (cpustate->flag[3] == 0); /* NOT FLAG3 */
+ case 0x1d: return !(cpustate->astat & BTF); /* NOT TF */
+ case 0x1e: return 1; /* NOT BM */
+ case 0x1f: return 1; /* TRUE */
}
return 1;
}
@@ -1243,38 +1243,38 @@ INLINE int DO_CONDITION_CODE(SHARC_REGS *cpustate, int cond)
{
switch(cond)
{
- case 0x00: return cpustate->astat & AZ; /* EQ */
- case 0x01: return !(cpustate->astat & AZ) && (cpustate->astat & AN); /* LT */
- case 0x02: return (cpustate->astat & AZ) || (cpustate->astat & AN); /* LE */
- case 0x03: return (cpustate->astat & AC); /* AC */
- case 0x04: return (cpustate->astat & AV); /* AV */
- case 0x05: return (cpustate->astat & MV); /* MV */
- case 0x06: return (cpustate->astat & MN); /* MS */
- case 0x07: return (cpustate->astat & SV); /* SV */
- case 0x08: return (cpustate->astat & SZ); /* SZ */
- case 0x09: return (cpustate->flag[0] != 0); /* FLAG0 */
- case 0x0a: return (cpustate->flag[1] != 0); /* FLAG1 */
- case 0x0b: return (cpustate->flag[2] != 0); /* FLAG2 */
- case 0x0c: return (cpustate->flag[3] != 0); /* FLAG3 */
- case 0x0d: return (cpustate->astat & BTF); /* TF */
- case 0x0e: return 0; /* BM */
- case 0x0f: return (cpustate->curlcntr==1); /* LCE */
- case 0x10: return !(cpustate->astat & AZ); /* NOT EQUAL */
- case 0x11: return (cpustate->astat & AZ) || !(cpustate->astat & AN); /* GE */
- case 0x12: return !(cpustate->astat & AZ) && !(cpustate->astat & AN); /* GT */
- case 0x13: return !(cpustate->astat & AC); /* NOT AC */
- case 0x14: return !(cpustate->astat & AV); /* NOT AV */
- case 0x15: return !(cpustate->astat & MV); /* NOT MV */
- case 0x16: return !(cpustate->astat & MN); /* NOT MS */
- case 0x17: return !(cpustate->astat & SV); /* NOT SV */
- case 0x18: return !(cpustate->astat & SZ); /* NOT SZ */
- case 0x19: return (cpustate->flag[0] == 0); /* NOT FLAG0 */
- case 0x1a: return (cpustate->flag[1] == 0); /* NOT FLAG1 */
- case 0x1b: return (cpustate->flag[2] == 0); /* NOT FLAG2 */
- case 0x1c: return (cpustate->flag[3] == 0); /* NOT FLAG3 */
- case 0x1d: return !(cpustate->astat & BTF); /* NOT TF */
- case 0x1e: return 1; /* NOT BM */
- case 0x1f: return 0; /* FALSE (FOREVER) */
+ case 0x00: return cpustate->astat & AZ; /* EQ */
+ case 0x01: return !(cpustate->astat & AZ) && (cpustate->astat & AN); /* LT */
+ case 0x02: return (cpustate->astat & AZ) || (cpustate->astat & AN); /* LE */
+ case 0x03: return (cpustate->astat & AC); /* AC */
+ case 0x04: return (cpustate->astat & AV); /* AV */
+ case 0x05: return (cpustate->astat & MV); /* MV */
+ case 0x06: return (cpustate->astat & MN); /* MS */
+ case 0x07: return (cpustate->astat & SV); /* SV */
+ case 0x08: return (cpustate->astat & SZ); /* SZ */
+ case 0x09: return (cpustate->flag[0] != 0); /* FLAG0 */
+ case 0x0a: return (cpustate->flag[1] != 0); /* FLAG1 */
+ case 0x0b: return (cpustate->flag[2] != 0); /* FLAG2 */
+ case 0x0c: return (cpustate->flag[3] != 0); /* FLAG3 */
+ case 0x0d: return (cpustate->astat & BTF); /* TF */
+ case 0x0e: return 0; /* BM */
+ case 0x0f: return (cpustate->curlcntr==1); /* LCE */
+ case 0x10: return !(cpustate->astat & AZ); /* NOT EQUAL */
+ case 0x11: return (cpustate->astat & AZ) || !(cpustate->astat & AN); /* GE */
+ case 0x12: return !(cpustate->astat & AZ) && !(cpustate->astat & AN); /* GT */
+ case 0x13: return !(cpustate->astat & AC); /* NOT AC */
+ case 0x14: return !(cpustate->astat & AV); /* NOT AV */
+ case 0x15: return !(cpustate->astat & MV); /* NOT MV */
+ case 0x16: return !(cpustate->astat & MN); /* NOT MS */
+ case 0x17: return !(cpustate->astat & SV); /* NOT SV */
+ case 0x18: return !(cpustate->astat & SZ); /* NOT SZ */
+ case 0x19: return (cpustate->flag[0] == 0); /* NOT FLAG0 */
+ case 0x1a: return (cpustate->flag[1] == 0); /* NOT FLAG1 */
+ case 0x1b: return (cpustate->flag[2] == 0); /* NOT FLAG2 */
+ case 0x1c: return (cpustate->flag[3] == 0); /* NOT FLAG3 */
+ case 0x1d: return !(cpustate->astat & BTF); /* NOT TF */
+ case 0x1e: return 1; /* NOT BM */
+ case 0x1f: return 0; /* FALSE (FOREVER) */
}
return 1;
}
@@ -1305,26 +1305,26 @@ static void sharcop_compute_dreg_dm_dreg_pm(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (pmd) // dreg -> PM
+ if (pmd) // dreg -> PM
{
pm_write32(cpustate, PM_REG_I(pmi), parallel_pm_dreg);
PM_REG_I(pmi) += PM_REG_M(pmm);
UPDATE_CIRCULAR_BUFFER_PM(pmi);
}
- else // PM -> dreg
+ else // PM -> dreg
{
REG(pm_dreg) = pm_read32(cpustate, PM_REG_I(pmi));
PM_REG_I(pmi) += PM_REG_M(pmm);
UPDATE_CIRCULAR_BUFFER_PM(pmi);
}
- if (dmd) // dreg -> DM
+ if (dmd) // dreg -> DM
{
dm_write32(cpustate, DM_REG_I(dmi), parallel_dm_dreg);
DM_REG_I(dmi) += DM_REG_M(dmm);
UPDATE_CIRCULAR_BUFFER_DM(dmi);
}
- else // DM -> dreg
+ else // DM -> dreg
{
REG(dm_dreg) = dm_read32(cpustate, DM_REG_I(dmi));
DM_REG_I(dmi) += DM_REG_M(dmm);
@@ -1372,11 +1372,11 @@ static void sharcop_compute_ureg_dmpm_premod(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (g) /* PM */
+ if (g) /* PM */
{
- if (d) /* ureg -> PM */
+ if (d) /* ureg -> PM */
{
- if (ureg == 0xdb) /* PX register access is always 48-bit */
+ if (ureg == 0xdb) /* PX register access is always 48-bit */
{
pm_write48(cpustate, PM_REG_I(i)+PM_REG_M(m), cpustate->px);
}
@@ -1385,9 +1385,9 @@ static void sharcop_compute_ureg_dmpm_premod(SHARC_REGS *cpustate)
pm_write32(cpustate, PM_REG_I(i)+PM_REG_M(m), parallel_ureg);
}
}
- else /* PM <- ureg */
+ else /* PM <- ureg */
{
- if (ureg == 0xdb) /* PX register access is always 48-bit */
+ if (ureg == 0xdb) /* PX register access is always 48-bit */
{
cpustate->px = pm_read48(cpustate, PM_REG_I(i)+PM_REG_M(m));
}
@@ -1397,13 +1397,13 @@ static void sharcop_compute_ureg_dmpm_premod(SHARC_REGS *cpustate)
}
}
}
- else /* DM */
+ else /* DM */
{
- if (d) /* ureg -> DM */
+ if (d) /* ureg -> DM */
{
dm_write32(cpustate, DM_REG_I(i)+DM_REG_M(m), parallel_ureg);
}
- else /* DM <- ureg */
+ else /* DM <- ureg */
{
SET_UREG(cpustate, ureg, dm_read32(cpustate, DM_REG_I(i)+DM_REG_M(m)));
}
@@ -1433,11 +1433,11 @@ static void sharcop_compute_ureg_dmpm_postmod(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (g) /* PM */
+ if (g) /* PM */
{
- if (d) /* ureg -> PM */
+ if (d) /* ureg -> PM */
{
- if (ureg == 0xdb) /* PX register access is always 48-bit */
+ if (ureg == 0xdb) /* PX register access is always 48-bit */
{
pm_write48(cpustate, PM_REG_I(i), cpustate->px);
}
@@ -1448,9 +1448,9 @@ static void sharcop_compute_ureg_dmpm_postmod(SHARC_REGS *cpustate)
PM_REG_I(i) += PM_REG_M(m);
UPDATE_CIRCULAR_BUFFER_PM(i);
}
- else /* PM <- ureg */
+ else /* PM <- ureg */
{
- if (ureg == 0xdb) /* PX register access is always 48-bit */
+ if (ureg == 0xdb) /* PX register access is always 48-bit */
{
cpustate->px = pm_read48(cpustate, PM_REG_I(i));
}
@@ -1462,15 +1462,15 @@ static void sharcop_compute_ureg_dmpm_postmod(SHARC_REGS *cpustate)
UPDATE_CIRCULAR_BUFFER_PM(i);
}
}
- else /* DM */
+ else /* DM */
{
- if (d) /* ureg -> DM */
+ if (d) /* ureg -> DM */
{
dm_write32(cpustate, DM_REG_I(i), parallel_ureg);
DM_REG_I(i) += DM_REG_M(m);
UPDATE_CIRCULAR_BUFFER_DM(i);
}
- else /* DM <- ureg */
+ else /* DM <- ureg */
{
SET_UREG(cpustate, ureg, dm_read32(cpustate, DM_REG_I(i)));
DM_REG_I(i) += DM_REG_M(m);
@@ -1500,13 +1500,13 @@ static void sharcop_compute_dm_to_dreg_immmod(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (u) /* post-modify with update */
+ if (u) /* post-modify with update */
{
REG(dreg) = dm_read32(cpustate, DM_REG_I(i));
DM_REG_I(i) += mod;
UPDATE_CIRCULAR_BUFFER_DM(i);
}
- else /* pre-modify, no update */
+ else /* pre-modify, no update */
{
REG(dreg) = dm_read32(cpustate, DM_REG_I(i) + mod);
}
@@ -1534,13 +1534,13 @@ static void sharcop_compute_dreg_to_dm_immmod(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (u) /* post-modify with update */
+ if (u) /* post-modify with update */
{
dm_write32(cpustate, DM_REG_I(i), parallel_dreg);
DM_REG_I(i) += mod;
UPDATE_CIRCULAR_BUFFER_DM(i);
}
- else /* pre-modify, no update */
+ else /* pre-modify, no update */
{
dm_write32(cpustate, DM_REG_I(i) + mod, parallel_dreg);
}
@@ -1564,13 +1564,13 @@ static void sharcop_compute_pm_to_dreg_immmod(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (u) /* post-modify with update */
+ if (u) /* post-modify with update */
{
REG(dreg) = pm_read32(cpustate, PM_REG_I(i));
PM_REG_I(i) += mod;
UPDATE_CIRCULAR_BUFFER_PM(i);
}
- else /* pre-modify, no update */
+ else /* pre-modify, no update */
{
REG(dreg) = pm_read32(cpustate, PM_REG_I(i) + mod);
}
@@ -1598,13 +1598,13 @@ static void sharcop_compute_dreg_to_pm_immmod(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (u) /* post-modify with update */
+ if (u) /* post-modify with update */
{
pm_write32(cpustate, PM_REG_I(i), parallel_dreg);
PM_REG_I(i) += mod;
UPDATE_CIRCULAR_BUFFER_PM(i);
}
- else /* pre-modify, no update */
+ else /* pre-modify, no update */
{
pm_write32(cpustate, PM_REG_I(i) + mod, parallel_dreg);
}
@@ -1662,30 +1662,30 @@ static void sharcop_imm_shift_dreg_dmpm(SHARC_REGS *cpustate)
SHIFT_OPERATION_IMM(cpustate, shiftop, data, rn, rx);
- if (g) /* PM */
+ if (g) /* PM */
{
- if (d) /* dreg -> PM */
+ if (d) /* dreg -> PM */
{
pm_write32(cpustate, PM_REG_I(i), parallel_dreg);
PM_REG_I(i) += PM_REG_M(m);
UPDATE_CIRCULAR_BUFFER_PM(i);
}
- else /* PM <- dreg */
+ else /* PM <- dreg */
{
REG(dreg) = pm_read32(cpustate, PM_REG_I(i));
PM_REG_I(i) += PM_REG_M(m);
UPDATE_CIRCULAR_BUFFER_PM(i);
}
}
- else /* DM */
+ else /* DM */
{
- if (d) /* dreg -> DM */
+ if (d) /* dreg -> DM */
{
dm_write32(cpustate, DM_REG_I(i), parallel_dreg);
DM_REG_I(i) += DM_REG_M(m);
UPDATE_CIRCULAR_BUFFER_DM(i);
}
- else /* DM <- dreg */
+ else /* DM <- dreg */
{
REG(dreg) = dm_read32(cpustate, DM_REG_I(i));
DM_REG_I(i) += DM_REG_M(m);
@@ -1732,12 +1732,12 @@ static void sharcop_compute_modify(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (g) /* Modify PM */
+ if (g) /* Modify PM */
{
PM_REG_I(i) += PM_REG_M(m);
UPDATE_CIRCULAR_BUFFER_PM(i);
}
- else /* Modify DM */
+ else /* Modify DM */
{
DM_REG_I(i) += DM_REG_M(m);
UPDATE_CIRCULAR_BUFFER_DM(i);
@@ -1760,7 +1760,7 @@ static void sharcop_direct_call(SHARC_REGS *cpustate)
if (j)
{
//PUSH_PC(cpustate, cpustate->pc+3); /* 1 instruction + 2 delayed instructions */
- PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
+ PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
CHANGE_PC_DELAYED(cpustate, address);
}
else
@@ -1827,7 +1827,7 @@ static void sharcop_relative_call(SHARC_REGS *cpustate)
{
if (j)
{
- PUSH_PC(cpustate, cpustate->pc+3); /* 1 instruction + 2 delayed instructions */
+ PUSH_PC(cpustate, cpustate->pc+3); /* 1 instruction + 2 delayed instructions */
CHANGE_PC_DELAYED(cpustate, cpustate->pc + SIGN_EXTEND24(address));
}
else
@@ -1907,7 +1907,7 @@ static void sharcop_indirect_jump(SHARC_REGS *cpustate)
cpustate->irptl &= ~(1 << cpustate->active_irq_num);
}
- if (e) /* IF...ELSE */
+ if (e) /* IF...ELSE */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -1934,7 +1934,7 @@ static void sharcop_indirect_jump(SHARC_REGS *cpustate)
}
}
}
- else /* IF */
+ else /* IF */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -1971,14 +1971,14 @@ static void sharcop_indirect_call(SHARC_REGS *cpustate)
int cond = (cpustate->opcode >> 33) & 0x1f;
int compute = cpustate->opcode & 0x7fffff;
- if (e) /* IF...ELSE */
+ if (e) /* IF...ELSE */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
if (j)
{
//PUSH_PC(cpustate, cpustate->pc+3); /* 1 instruction + 2 delayed instructions */
- PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
+ PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
CHANGE_PC_DELAYED(cpustate, PM_REG_I(pmi) + PM_REG_M(pmm));
}
else
@@ -1996,7 +1996,7 @@ static void sharcop_indirect_call(SHARC_REGS *cpustate)
}
}
}
- else /* IF */
+ else /* IF */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -2008,7 +2008,7 @@ static void sharcop_indirect_call(SHARC_REGS *cpustate)
if (j)
{
//PUSH_PC(cpustate, cpustate->pc+3); /* 1 instruction + 2 delayed instructions */
- PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
+ PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
CHANGE_PC_DELAYED(cpustate, PM_REG_I(pmi) + PM_REG_M(pmm));
}
else
@@ -2047,7 +2047,7 @@ static void sharcop_relative_jump_compute(SHARC_REGS *cpustate)
cpustate->irptl &= ~(1 << cpustate->active_irq_num);
}
- if (e) /* IF...ELSE */
+ if (e) /* IF...ELSE */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -2074,7 +2074,7 @@ static void sharcop_relative_jump_compute(SHARC_REGS *cpustate)
}
}
}
- else /* IF */
+ else /* IF */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -2109,14 +2109,14 @@ static void sharcop_relative_call_compute(SHARC_REGS *cpustate)
int cond = (cpustate->opcode >> 33) & 0x1f;
int compute = cpustate->opcode & 0x7fffff;
- if (e) /* IF...ELSE */
+ if (e) /* IF...ELSE */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
if (j)
{
//PUSH_PC(cpustate, cpustate->pc+3); /* 1 instruction + 2 delayed instructions */
- PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
+ PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
CHANGE_PC_DELAYED(cpustate, cpustate->pc + SIGN_EXTEND6((cpustate->opcode >> 27) & 0x3f));
}
else
@@ -2134,7 +2134,7 @@ static void sharcop_relative_call_compute(SHARC_REGS *cpustate)
}
}
}
- else /* IF */
+ else /* IF */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -2146,7 +2146,7 @@ static void sharcop_relative_call_compute(SHARC_REGS *cpustate)
if (j)
{
//PUSH_PC(cpustate, cpustate->pc+3); /* 1 instruction + 2 delayed instructions */
- PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
+ PUSH_PC(cpustate, cpustate->nfaddr); /* 1 instruction + 2 delayed instructions */
CHANGE_PC_DELAYED(cpustate, cpustate->pc + SIGN_EXTEND6((cpustate->opcode >> 27) & 0x3f));
}
else
@@ -2189,13 +2189,13 @@ static void sharcop_indirect_jump_compute_dreg_dm(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (d) /* dreg -> DM */
+ if (d) /* dreg -> DM */
{
dm_write32(cpustate, DM_REG_I(dmi), parallel_dreg);
DM_REG_I(dmi) += DM_REG_M(dmm);
UPDATE_CIRCULAR_BUFFER_DM(dmi);
}
- else /* DM <- dreg */
+ else /* DM <- dreg */
{
REG(dreg) = dm_read32(cpustate, DM_REG_I(dmi));
DM_REG_I(dmi) += DM_REG_M(dmm);
@@ -2232,13 +2232,13 @@ static void sharcop_relative_jump_compute_dreg_dm(SHARC_REGS *cpustate)
COMPUTE(cpustate, compute);
}
- if (d) /* dreg -> DM */
+ if (d) /* dreg -> DM */
{
dm_write32(cpustate, DM_REG_I(dmi), parallel_dreg);
DM_REG_I(dmi) += DM_REG_M(dmm);
UPDATE_CIRCULAR_BUFFER_DM(dmi);
}
- else /* DM <- dreg */
+ else /* DM <- dreg */
{
REG(dreg) = dm_read32(cpustate, DM_REG_I(dmi));
DM_REG_I(dmi) += DM_REG_M(dmm);
@@ -2262,7 +2262,7 @@ static void sharcop_rts(SHARC_REGS *cpustate)
//if(lr)
// fatalerror("SHARC: rts: loop reentry not implemented!\n");
- if (e) /* IF...ELSE */
+ if (e) /* IF...ELSE */
{
if(IF_CONDITION_CODE(cpustate, cond))
{
@@ -2283,7 +2283,7 @@ static void sharcop_rts(SHARC_REGS *cpustate)
}
}
}
- else /* IF */
+ else /* IF */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -2317,7 +2317,7 @@ static void sharcop_rti(SHARC_REGS *cpustate)
cpustate->irptl &= ~(1 << cpustate->active_irq_num);
- if(e) /* IF...ELSE */
+ if(e) /* IF...ELSE */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -2338,7 +2338,7 @@ static void sharcop_rti(SHARC_REGS *cpustate)
}
}
}
- else /* IF */
+ else /* IF */
{
if (IF_CONDITION_CODE(cpustate, cond))
{
@@ -2377,7 +2377,7 @@ static void sharcop_do_until_counter_imm(SHARC_REGS *cpustate)
int offset = SIGN_EXTEND24(cpustate->opcode & 0xffffff);
UINT32 address = cpustate->pc + offset;
int type;
- int cond = 0xf; /* until LCE (loop counter expired */
+ int cond = 0xf; /* until LCE (loop counter expired */
int distance = abs(offset);
if (distance == 1)
@@ -2411,7 +2411,7 @@ static void sharcop_do_until_counter_ureg(SHARC_REGS *cpustate)
int offset = SIGN_EXTEND24(cpustate->opcode & 0xffffff);
UINT32 address = cpustate->pc + offset;
int type;
- int cond = 0xf; /* until LCE (loop counter expired */
+ int cond = 0xf; /* until LCE (loop counter expired */
int distance = abs(offset);
if (distance == 1)
@@ -2476,7 +2476,7 @@ static void sharcop_pm_to_ureg_direct(SHARC_REGS *cpustate)
int ureg = (cpustate->opcode >> 32) & 0xff;
UINT32 address = (UINT32)(cpustate->opcode);
- if (ureg == 0xdb) // PX is 48-bit
+ if (ureg == 0xdb) // PX is 48-bit
{
cpustate->px = pm_read48(cpustate, address);
}
@@ -2492,7 +2492,7 @@ static void sharcop_ureg_to_pm_direct(SHARC_REGS *cpustate)
int ureg = (cpustate->opcode >> 32) & 0xff;
UINT32 address = (UINT32)(cpustate->opcode);
- if (ureg == 0xdb) // PX is 48-bit
+ if (ureg == 0xdb) // PX is 48-bit
{
pm_write48(cpustate, address, cpustate->px);
}
@@ -2532,7 +2532,7 @@ static void sharcop_pm_to_ureg_indirect(SHARC_REGS *cpustate)
UINT32 offset = cpustate->opcode & 0xffffff;
int i = (cpustate->opcode >> 41) & 0x7;
- if (ureg == 0xdb) /* PX is 48-bit */
+ if (ureg == 0xdb) /* PX is 48-bit */
{
cpustate->px = pm_read48(cpustate, PM_REG_I(i) + offset);
}
@@ -2549,7 +2549,7 @@ static void sharcop_ureg_to_pm_indirect(SHARC_REGS *cpustate)
UINT32 offset = (UINT32)cpustate->opcode;
int i = (cpustate->opcode >> 41) & 0x7;
- if (ureg == 0xdb) /* PX is 48-bit */
+ if (ureg == 0xdb) /* PX is 48-bit */
{
pm_write48(cpustate, PM_REG_I(i) + offset, cpustate->px);
}
@@ -2612,22 +2612,22 @@ static void sharcop_sysreg_bitop(SHARC_REGS *cpustate)
switch(bop)
{
- case 0: /* SET */
+ case 0: /* SET */
{
src |= data;
break;
}
- case 1: /* CLEAR */
+ case 1: /* CLEAR */
{
src &= ~data;
break;
}
- case 2: /* TOGGLE */
+ case 2: /* TOGGLE */
{
src ^= data;
break;
}
- case 4: /* TEST */
+ case 4: /* TEST */
{
if ((src & data) == data)
{
@@ -2639,7 +2639,7 @@ static void sharcop_sysreg_bitop(SHARC_REGS *cpustate)
}
break;
}
- case 5: /* XOR */
+ case 5: /* XOR */
{
if (src == data)
{
@@ -2669,12 +2669,12 @@ static void sharcop_modify(SHARC_REGS *cpustate)
int i = (cpustate->opcode >> 32) & 0x7;
INT32 data = (cpustate->opcode);
- if (g) // PM
+ if (g) // PM
{
PM_REG_I(i) += data;
UPDATE_CIRCULAR_BUFFER_PM(i);
}
- else // DM
+ else // DM
{
DM_REG_I(i) += data;
UPDATE_CIRCULAR_BUFFER_DM(i);
diff --git a/src/emu/cpu/sharc/sharcops.h b/src/emu/cpu/sharc/sharcops.h
index 2fe5aab7fef..2a29f7b1e07 100644
--- a/src/emu/cpu/sharc/sharcops.h
+++ b/src/emu/cpu/sharc/sharcops.h
@@ -8,131 +8,131 @@ struct SHARC_OP
static const SHARC_OP sharc_opcode_table[] =
{
// |0 0 1|
- { 0xe000, 0x2000, sharcop_compute_dreg_dm_dreg_pm },
+ { 0xe000, 0x2000, sharcop_compute_dreg_dm_dreg_pm },
// |0 0 0|0 0 0 0 1|
- { 0xff00, 0x0100, sharcop_compute },
+ { 0xff00, 0x0100, sharcop_compute },
// |0 1 0|0|
- { 0xf000, 0x4000, sharcop_compute_ureg_dmpm_premod },
+ { 0xf000, 0x4000, sharcop_compute_ureg_dmpm_premod },
// |0 1 0|1|
- { 0xf000, 0x5000, sharcop_compute_ureg_dmpm_postmod },
+ { 0xf000, 0x5000, sharcop_compute_ureg_dmpm_postmod },
// |0 1 1|0|x x x|0|0|
- { 0xf180, 0x6000, sharcop_compute_dm_to_dreg_immmod },
+ { 0xf180, 0x6000, sharcop_compute_dm_to_dreg_immmod },
// |0 1 1|0|x x x|0|1|
- { 0xf180, 0x6080, sharcop_compute_dreg_to_dm_immmod },
+ { 0xf180, 0x6080, sharcop_compute_dreg_to_dm_immmod },
// |0 1 1|0|x x x|1|0|
- { 0xf180, 0x6100, sharcop_compute_pm_to_dreg_immmod },
+ { 0xf180, 0x6100, sharcop_compute_pm_to_dreg_immmod },
// |0 1 1|0|x x x|1|1|
- { 0xf180, 0x6180, sharcop_compute_dreg_to_pm_immmod },
+ { 0xf180, 0x6180, sharcop_compute_dreg_to_pm_immmod },
// |0 1 1|1|
- { 0xf000, 0x7000, sharcop_compute_ureg_to_ureg },
+ { 0xf000, 0x7000, sharcop_compute_ureg_to_ureg },
// |1 0 0|0|
- { 0xf000, 0x8000, sharcop_imm_shift_dreg_dmpm },
+ { 0xf000, 0x8000, sharcop_imm_shift_dreg_dmpm },
// |0 0 0|0 0 0 1 0|
- { 0xff00, 0x0200, sharcop_imm_shift },
+ { 0xff00, 0x0200, sharcop_imm_shift },
// |0 0 0|0 0 1 0 0|
- { 0xff00, 0x0400, sharcop_compute_modify },
+ { 0xff00, 0x0400, sharcop_compute_modify },
// |0 0 0|0 0 1 1 0|0|
- { 0xff80, 0x0600, sharcop_direct_jump },
+ { 0xff80, 0x0600, sharcop_direct_jump },
// |0 0 0|0 0 1 1 0|1|
- { 0xff80, 0x0680, sharcop_direct_call },
+ { 0xff80, 0x0680, sharcop_direct_call },
// |0 0 0|0 0 1 1 1|0|
- { 0xff80, 0x0700, sharcop_relative_jump },
+ { 0xff80, 0x0700, sharcop_relative_jump },
// |0 0 0|0 0 1 1 1|1|
- { 0xff80, 0x0780, sharcop_relative_call },
+ { 0xff80, 0x0780, sharcop_relative_call },
// |0 0 0|0 1 0 0 0|0|
- { 0xff80, 0x0800, sharcop_indirect_jump },
+ { 0xff80, 0x0800, sharcop_indirect_jump },
// |0 0 0|0 1 0 0 0|1|
- { 0xff80, 0x0880, sharcop_indirect_call },
+ { 0xff80, 0x0880, sharcop_indirect_call },
// |0 0 0|0 1 0 0 1|0|
- { 0xff80, 0x0900, sharcop_relative_jump_compute },
+ { 0xff80, 0x0900, sharcop_relative_jump_compute },
// |0 0 0|0 1 0 0 1|1|
- { 0xff80, 0x0980, sharcop_relative_call_compute },
+ { 0xff80, 0x0980, sharcop_relative_call_compute },
// |1 1 0|
- { 0xe000, 0xc000, sharcop_indirect_jump_compute_dreg_dm },
+ { 0xe000, 0xc000, sharcop_indirect_jump_compute_dreg_dm },
// |1 1 1|
- { 0xe000, 0xe000, sharcop_relative_jump_compute_dreg_dm },
+ { 0xe000, 0xe000, sharcop_relative_jump_compute_dreg_dm },
// |0 0 0|0 1 0 1 0|
- { 0xff00, 0x0a00, sharcop_rts },
+ { 0xff00, 0x0a00, sharcop_rts },
// |0 0 0|0 1 0 1 1|
- { 0xff00, 0x0b00, sharcop_rti },
+ { 0xff00, 0x0b00, sharcop_rti },
// |0 0 0|0 1 1 0 0|
- { 0xff00, 0x0c00, sharcop_do_until_counter_imm },
+ { 0xff00, 0x0c00, sharcop_do_until_counter_imm },
// |0 0 0|0 1 1 0 1|
- { 0xff00, 0x0d00, sharcop_do_until_counter_ureg },
+ { 0xff00, 0x0d00, sharcop_do_until_counter_ureg },
// |0 0 0|0 1 1 1 0|
- { 0xff00, 0x0e00, sharcop_do_until },
+ { 0xff00, 0x0e00, sharcop_do_until },
// |0 0 0|1 0 0|0|0|
- { 0xff00, 0x1000, sharcop_dm_to_ureg_direct },
+ { 0xff00, 0x1000, sharcop_dm_to_ureg_direct },
// |0 0 0|1 0 0|0|1|
- { 0xff00, 0x1100, sharcop_ureg_to_dm_direct },
+ { 0xff00, 0x1100, sharcop_ureg_to_dm_direct },
// |0 0 0|1 0 0|1|0|
- { 0xff00, 0x1200, sharcop_pm_to_ureg_direct },
+ { 0xff00, 0x1200, sharcop_pm_to_ureg_direct },
// |0 0 0|1 0 0|1|1|
- { 0xff00, 0x1300, sharcop_ureg_to_pm_direct },
+ { 0xff00, 0x1300, sharcop_ureg_to_pm_direct },
// |1 0 1|0|x x x|0|
- { 0xf100, 0xa000, sharcop_dm_to_ureg_indirect },
+ { 0xf100, 0xa000, sharcop_dm_to_ureg_indirect },
// |1 0 1|0|x x x|1|
- { 0xf100, 0xa100, sharcop_ureg_to_dm_indirect },
+ { 0xf100, 0xa100, sharcop_ureg_to_dm_indirect },
// |1 0 1|1|x x x|0|
- { 0xf100, 0xb000, sharcop_pm_to_ureg_indirect },
+ { 0xf100, 0xb000, sharcop_pm_to_ureg_indirect },
// |1 0 1|1|x x x|1|
- { 0xf100, 0xb100, sharcop_ureg_to_pm_indirect },
+ { 0xf100, 0xb100, sharcop_ureg_to_pm_indirect },
// |1 0 0|1|
- { 0xf000, 0x9000, sharcop_imm_to_dmpm },
+ { 0xf000, 0x9000, sharcop_imm_to_dmpm },
// |0 0 0|0 1 1 1 1|
- { 0xff00, 0x0f00, sharcop_imm_to_ureg },
+ { 0xff00, 0x0f00, sharcop_imm_to_ureg },
// |0 0 0|1 0 1 0 0|
- { 0xff00, 0x1400, sharcop_sysreg_bitop },
+ { 0xff00, 0x1400, sharcop_sysreg_bitop },
// |0 0 0|1 0 1 1 0|0|
- { 0xff80, 0x1600, sharcop_modify },
+ { 0xff80, 0x1600, sharcop_modify },
// |0 0 0|1 0 1 1 0|1|
- { 0xff80, 0x1680, sharcop_bit_reverse },
+ { 0xff80, 0x1680, sharcop_bit_reverse },
// |0 0 0|1 0 1 1 1|
- { 0xff00, 0x1700, sharcop_push_pop_stacks },
+ { 0xff00, 0x1700, sharcop_push_pop_stacks },
// |0 0 0|0 0 0 0 0|0|
- { 0xff80, 0x0000, sharcop_nop },
+ { 0xff80, 0x0000, sharcop_nop },
// |0 0 0|0 0 0 0 0|1|
- { 0xff80, 0x0080, sharcop_idle },
+ { 0xff80, 0x0080, sharcop_idle },
};
diff --git a/src/emu/cpu/sm8500/sm8500.c b/src/emu/cpu/sm8500/sm8500.c
index 574d7d56d90..b9af6319afc 100644
--- a/src/emu/cpu/sm8500/sm8500.c
+++ b/src/emu/cpu/sm8500/sm8500.c
@@ -21,14 +21,14 @@ they are internally.
#include "debugger.h"
#include "sm8500.h"
-#define FLAG_C 0x80
-#define FLAG_Z 0x40
-#define FLAG_S 0x20
-#define FLAG_V 0x10
-#define FLAG_D 0x08
-#define FLAG_H 0x04
-#define FLAG_B 0x02
-#define FLAG_I 0x01
+#define FLAG_C 0x80
+#define FLAG_Z 0x40
+#define FLAG_S 0x20
+#define FLAG_V 0x10
+#define FLAG_D 0x08
+#define FLAG_H 0x04
+#define FLAG_B 0x02
+#define FLAG_I 0x01
struct sm8500_state
{
@@ -63,7 +63,7 @@ INLINE sm8500_state *get_safe_token(device_t *device)
}
static const UINT8 sm8500_b2w[8] = {
- 0, 8, 2, 10, 4, 12, 6, 14
+ 0, 8, 2, 10, 4, 12, 6, 14
};
INLINE void sm8500_get_sp( sm8500_state *cpustate )
@@ -100,7 +100,7 @@ static void sm85cpu_mem_writebyte( sm8500_state *cpustate, UINT32 offset, UINT8
case 0x1c:
case 0x1d: sm8500_get_sp(cpustate); break;
case 0x1e: cpustate->PS0 = data;
- for (i = 0; i < 16; i++) // refresh register contents in debugger
+ for (i = 0; i < 16; i++) // refresh register contents in debugger
cpustate->program->write_byte(i, sm85cpu_mem_readbyte(cpustate, i)); break;
case 0x1f: cpustate->PS1 = data; break;
}
@@ -157,7 +157,7 @@ static CPU_EXIT( sm8500 )
{
}
-#define PUSH_BYTE(X) cpustate->SP--; \
+#define PUSH_BYTE(X) cpustate->SP--; \
if ( ( cpustate->SYS & 0x40 ) == 0 ) cpustate->SP &= 0xFF; \
sm85cpu_mem_writebyte( cpustate, cpustate->SP, X );
@@ -262,15 +262,15 @@ INLINE void sm8500_process_interrupts(sm8500_state *cpustate) {
static CPU_EXECUTE( sm8500 )
{
sm8500_state *cpustate = get_safe_token(device);
- UINT8 op;
- int mycycles;
+ UINT8 op;
+ int mycycles;
do
{
- UINT8 r1,r2;
- UINT16 s1,s2;
- UINT32 d1,d2;
- UINT32 res;
+ UINT8 r1,r2;
+ UINT16 s1,s2;
+ UINT32 d1,d2;
+ UINT32 res;
debugger_instruction_hook(device, cpustate->PC);
cpustate->oldpc = cpustate->PC;
@@ -288,7 +288,7 @@ static CPU_EXECUTE( sm8500 )
}
if (cpustate->SYS&0x40) cpustate->program->write_byte(0x1c,cpustate->SP>>8);
cpustate->program->write_byte(0x1d,cpustate->SP&0xFF);
- sm85cpu_mem_writebyte(cpustate,0x1e,cpustate->PS0); // need to update debugger
+ sm85cpu_mem_writebyte(cpustate,0x1e,cpustate->PS0); // need to update debugger
cpustate->program->write_byte(0x1f,cpustate->PS1);
} else {
mycycles = 4;
@@ -319,37 +319,37 @@ static unsigned sm8500_get_reg( sm8500_state *cpustate, int regnum )
switch( regnum )
{
case STATE_GENPC:
- case SM8500_PC: return cpustate->PC;
+ case SM8500_PC: return cpustate->PC;
case STATE_GENSP:
- case SM8500_SP: return cpustate->SP;
- case SM8500_PS: return sm85cpu_mem_readword( cpustate, 0x1e );
- case SM8500_SYS16: return cpustate->SYS;
- case SM8500_RR0: return sm85cpu_mem_readword( cpustate, 0x00 );
- case SM8500_RR2: return sm85cpu_mem_readword( cpustate, 0x02 );
- case SM8500_RR4: return sm85cpu_mem_readword( cpustate, 0x04 );
- case SM8500_RR6: return sm85cpu_mem_readword( cpustate, 0x06 );
- case SM8500_RR8: return sm85cpu_mem_readword( cpustate, 0x08 );
- case SM8500_RR10: return sm85cpu_mem_readword( cpustate, 0x0A );
- case SM8500_RR12: return sm85cpu_mem_readword( cpustate, 0x0C );
- case SM8500_RR14: return sm85cpu_mem_readword( cpustate, 0x0E );
- case SM8500_IE0: return sm85cpu_mem_readbyte( cpustate, 0x10 );
- case SM8500_IE1: return sm85cpu_mem_readbyte( cpustate, 0x11 );
- case SM8500_IR0: return sm85cpu_mem_readbyte( cpustate, 0x12 );
- case SM8500_IR1: return sm85cpu_mem_readbyte( cpustate, 0x13 );
- case SM8500_P0: return sm85cpu_mem_readbyte( cpustate, 0x14 );
- case SM8500_P1: return sm85cpu_mem_readbyte( cpustate, 0x15 );
- case SM8500_P2: return sm85cpu_mem_readbyte( cpustate, 0x16 );
- case SM8500_P3: return sm85cpu_mem_readbyte( cpustate, 0x17 );
- case SM8500_SYS: return sm85cpu_mem_readbyte( cpustate, 0x19 );
- case SM8500_CKC: return sm85cpu_mem_readbyte( cpustate, 0x1a );
- case SM8500_SPH: return sm85cpu_mem_readbyte( cpustate, 0x1c );
- case SM8500_SPL: return sm85cpu_mem_readbyte( cpustate, 0x1d );
- case SM8500_PS0: return sm85cpu_mem_readbyte( cpustate, 0x1e );
- case SM8500_PS1: return sm85cpu_mem_readbyte( cpustate, 0x1f );
- case SM8500_P0C: return sm85cpu_mem_readbyte( cpustate, 0x20 );
- case SM8500_P1C: return sm85cpu_mem_readbyte( cpustate, 0x21 );
- case SM8500_P2C: return sm85cpu_mem_readbyte( cpustate, 0x22 );
- case SM8500_P3C: return sm85cpu_mem_readbyte( cpustate, 0x23 );
+ case SM8500_SP: return cpustate->SP;
+ case SM8500_PS: return sm85cpu_mem_readword( cpustate, 0x1e );
+ case SM8500_SYS16: return cpustate->SYS;
+ case SM8500_RR0: return sm85cpu_mem_readword( cpustate, 0x00 );
+ case SM8500_RR2: return sm85cpu_mem_readword( cpustate, 0x02 );
+ case SM8500_RR4: return sm85cpu_mem_readword( cpustate, 0x04 );
+ case SM8500_RR6: return sm85cpu_mem_readword( cpustate, 0x06 );
+ case SM8500_RR8: return sm85cpu_mem_readword( cpustate, 0x08 );
+ case SM8500_RR10: return sm85cpu_mem_readword( cpustate, 0x0A );
+ case SM8500_RR12: return sm85cpu_mem_readword( cpustate, 0x0C );
+ case SM8500_RR14: return sm85cpu_mem_readword( cpustate, 0x0E );
+ case SM8500_IE0: return sm85cpu_mem_readbyte( cpustate, 0x10 );
+ case SM8500_IE1: return sm85cpu_mem_readbyte( cpustate, 0x11 );
+ case SM8500_IR0: return sm85cpu_mem_readbyte( cpustate, 0x12 );
+ case SM8500_IR1: return sm85cpu_mem_readbyte( cpustate, 0x13 );
+ case SM8500_P0: return sm85cpu_mem_readbyte( cpustate, 0x14 );
+ case SM8500_P1: return sm85cpu_mem_readbyte( cpustate, 0x15 );
+ case SM8500_P2: return sm85cpu_mem_readbyte( cpustate, 0x16 );
+ case SM8500_P3: return sm85cpu_mem_readbyte( cpustate, 0x17 );
+ case SM8500_SYS: return sm85cpu_mem_readbyte( cpustate, 0x19 );
+ case SM8500_CKC: return sm85cpu_mem_readbyte( cpustate, 0x1a );
+ case SM8500_SPH: return sm85cpu_mem_readbyte( cpustate, 0x1c );
+ case SM8500_SPL: return sm85cpu_mem_readbyte( cpustate, 0x1d );
+ case SM8500_PS0: return sm85cpu_mem_readbyte( cpustate, 0x1e );
+ case SM8500_PS1: return sm85cpu_mem_readbyte( cpustate, 0x1f );
+ case SM8500_P0C: return sm85cpu_mem_readbyte( cpustate, 0x20 );
+ case SM8500_P1C: return sm85cpu_mem_readbyte( cpustate, 0x21 );
+ case SM8500_P2C: return sm85cpu_mem_readbyte( cpustate, 0x22 );
+ case SM8500_P3C: return sm85cpu_mem_readbyte( cpustate, 0x23 );
}
return 0;
}
@@ -359,37 +359,37 @@ static void sm8500_set_reg( sm8500_state *cpustate, int regnum, unsigned val )
switch( regnum )
{
case STATE_GENPC:
- case SM8500_PC: cpustate->PC = val; break;
+ case SM8500_PC: cpustate->PC = val; break;
case STATE_GENSP:
- case SM8500_SP: cpustate->SP = val; cpustate->program->write_byte(0x1d, val&0xff); if (cpustate->SYS&0x40) cpustate->program->write_byte(0x1c, val>>8); break;
- case SM8500_PS: sm85cpu_mem_writeword( cpustate, 0x1e, val); break;
- case SM8500_SYS16: val&=0xff; sm85cpu_mem_writebyte( cpustate, 0x19, val); break;
- case SM8500_RR0: sm85cpu_mem_writeword( cpustate, 0x00, val); break;
- case SM8500_RR2: sm85cpu_mem_writeword( cpustate, 0x02, val); break;
- case SM8500_RR4: sm85cpu_mem_writeword( cpustate, 0x04, val); break;
- case SM8500_RR6: sm85cpu_mem_writeword( cpustate, 0x06, val); break;
- case SM8500_RR8: sm85cpu_mem_writeword( cpustate, 0x08, val); break;
- case SM8500_RR10: sm85cpu_mem_writeword( cpustate, 0x0A, val); break;
- case SM8500_RR12: sm85cpu_mem_writeword( cpustate, 0x0C, val); break;
- case SM8500_RR14: sm85cpu_mem_writeword( cpustate, 0x0E, val); break;
- case SM8500_IE0: sm85cpu_mem_writebyte( cpustate, 0x10, val); break;
- case SM8500_IE1: sm85cpu_mem_writebyte( cpustate, 0x11, val); break;
- case SM8500_IR0: sm85cpu_mem_writebyte( cpustate, 0x12, val); break;
- case SM8500_IR1: sm85cpu_mem_writebyte( cpustate, 0x13, val); break;
- case SM8500_P0: sm85cpu_mem_writebyte( cpustate, 0x14, val); break;
- case SM8500_P1: sm85cpu_mem_writebyte( cpustate, 0x15, val); break;
- case SM8500_P2: sm85cpu_mem_writebyte( cpustate, 0x16, val); break;
- case SM8500_P3: sm85cpu_mem_writebyte( cpustate, 0x17, val); break;
- case SM8500_SYS: sm85cpu_mem_writebyte( cpustate, 0x19, val); break;
- case SM8500_CKC: sm85cpu_mem_writebyte( cpustate, 0x1a, val); if ( val & 0x80 ) { cpustate->clock_changed = 1; }; break;
- case SM8500_SPH: sm85cpu_mem_writebyte( cpustate, 0x1c, val); break;
- case SM8500_SPL: sm85cpu_mem_writebyte( cpustate, 0x1d, val); break;
- case SM8500_PS0: sm85cpu_mem_writebyte( cpustate, 0x1e, val); break;
- case SM8500_PS1: sm85cpu_mem_writebyte( cpustate, 0x1f, val); break;
- case SM8500_P0C: sm85cpu_mem_writebyte( cpustate, 0x20, val); break;
- case SM8500_P1C: sm85cpu_mem_writebyte( cpustate, 0x21, val); break;
- case SM8500_P2C: sm85cpu_mem_writebyte( cpustate, 0x22, val); break;
- case SM8500_P3C: sm85cpu_mem_writebyte( cpustate, 0x23, val); break;
+ case SM8500_SP: cpustate->SP = val; cpustate->program->write_byte(0x1d, val&0xff); if (cpustate->SYS&0x40) cpustate->program->write_byte(0x1c, val>>8); break;
+ case SM8500_PS: sm85cpu_mem_writeword( cpustate, 0x1e, val); break;
+ case SM8500_SYS16: val&=0xff; sm85cpu_mem_writebyte( cpustate, 0x19, val); break;
+ case SM8500_RR0: sm85cpu_mem_writeword( cpustate, 0x00, val); break;
+ case SM8500_RR2: sm85cpu_mem_writeword( cpustate, 0x02, val); break;
+ case SM8500_RR4: sm85cpu_mem_writeword( cpustate, 0x04, val); break;
+ case SM8500_RR6: sm85cpu_mem_writeword( cpustate, 0x06, val); break;
+ case SM8500_RR8: sm85cpu_mem_writeword( cpustate, 0x08, val); break;
+ case SM8500_RR10: sm85cpu_mem_writeword( cpustate, 0x0A, val); break;
+ case SM8500_RR12: sm85cpu_mem_writeword( cpustate, 0x0C, val); break;
+ case SM8500_RR14: sm85cpu_mem_writeword( cpustate, 0x0E, val); break;
+ case SM8500_IE0: sm85cpu_mem_writebyte( cpustate, 0x10, val); break;
+ case SM8500_IE1: sm85cpu_mem_writebyte( cpustate, 0x11, val); break;
+ case SM8500_IR0: sm85cpu_mem_writebyte( cpustate, 0x12, val); break;
+ case SM8500_IR1: sm85cpu_mem_writebyte( cpustate, 0x13, val); break;
+ case SM8500_P0: sm85cpu_mem_writebyte( cpustate, 0x14, val); break;
+ case SM8500_P1: sm85cpu_mem_writebyte( cpustate, 0x15, val); break;
+ case SM8500_P2: sm85cpu_mem_writebyte( cpustate, 0x16, val); break;
+ case SM8500_P3: sm85cpu_mem_writebyte( cpustate, 0x17, val); break;
+ case SM8500_SYS: sm85cpu_mem_writebyte( cpustate, 0x19, val); break;
+ case SM8500_CKC: sm85cpu_mem_writebyte( cpustate, 0x1a, val); if ( val & 0x80 ) { cpustate->clock_changed = 1; }; break;
+ case SM8500_SPH: sm85cpu_mem_writebyte( cpustate, 0x1c, val); break;
+ case SM8500_SPL: sm85cpu_mem_writebyte( cpustate, 0x1d, val); break;
+ case SM8500_PS0: sm85cpu_mem_writebyte( cpustate, 0x1e, val); break;
+ case SM8500_PS1: sm85cpu_mem_writebyte( cpustate, 0x1f, val); break;
+ case SM8500_P0C: sm85cpu_mem_writebyte( cpustate, 0x20, val); break;
+ case SM8500_P1C: sm85cpu_mem_writebyte( cpustate, 0x21, val); break;
+ case SM8500_P2C: sm85cpu_mem_writebyte( cpustate, 0x22, val); break;
+ case SM8500_P3C: sm85cpu_mem_writebyte( cpustate, 0x23, val); break;
}
}
@@ -401,26 +401,26 @@ static void sm8500_set_irq_line( sm8500_state *cpustate, int irqline, int state
cpustate->IFLAGS |= ( 0x01 << irqline );
cpustate->CheckInterrupts = 1;
switch( irqline ) {
- case DMA_INT: cpustate->IR0 |= 0x80; break;
- case TIM0_INT: cpustate->IR0 |= 0x40; break;
- case EXT_INT: cpustate->IR0 |= 0x10; break;
- case UART_INT: cpustate->IR0 |= 0x08; break;
- case LCDC_INT: cpustate->IR0 |= 0x01; break;
- case TIM1_INT: cpustate->IR1 |= 0x40; break;
- case CK_INT: cpustate->IR1 |= 0x10; break;
- case PIO_INT: cpustate->IR1 |= 0x04; break;
+ case DMA_INT: cpustate->IR0 |= 0x80; break;
+ case TIM0_INT: cpustate->IR0 |= 0x40; break;
+ case EXT_INT: cpustate->IR0 |= 0x10; break;
+ case UART_INT: cpustate->IR0 |= 0x08; break;
+ case LCDC_INT: cpustate->IR0 |= 0x01; break;
+ case TIM1_INT: cpustate->IR1 |= 0x40; break;
+ case CK_INT: cpustate->IR1 |= 0x10; break;
+ case PIO_INT: cpustate->IR1 |= 0x04; break;
}
} else {
cpustate->IFLAGS &= ~( 0x01 << irqline );
switch( irqline ) {
- case DMA_INT: cpustate->IR0 &= ~0x80; break;
- case TIM0_INT: cpustate->IR0 &= ~0x40; break;
- case EXT_INT: cpustate->IR0 &= ~0x10; break;
- case UART_INT: cpustate->IR0 &= ~0x08; break;
- case LCDC_INT: cpustate->IR0 &= ~0x01; break;
- case TIM1_INT: cpustate->IR1 &= ~0x40; break;
- case CK_INT: cpustate->IR1 &= ~0x10; break;
- case PIO_INT: cpustate->IR1 &= ~0x04; break;
+ case DMA_INT: cpustate->IR0 &= ~0x80; break;
+ case TIM0_INT: cpustate->IR0 &= ~0x40; break;
+ case EXT_INT: cpustate->IR0 &= ~0x10; break;
+ case UART_INT: cpustate->IR0 &= ~0x08; break;
+ case LCDC_INT: cpustate->IR0 &= ~0x01; break;
+ case TIM1_INT: cpustate->IR1 &= ~0x40; break;
+ case CK_INT: cpustate->IR1 &= ~0x10; break;
+ case PIO_INT: cpustate->IR1 &= ~0x04; break;
}
if ( 0 == cpustate->IFLAGS ) {
cpustate->CheckInterrupts = 0;
@@ -490,25 +490,25 @@ CPU_GET_INFO( sm8500 )
switch(state)
{
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sm8500_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(sm8500_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 8; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 5; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_INT_INPUT_STATE + 0:
case CPUINFO_INT_INPUT_STATE + 1:
case CPUINFO_INT_INPUT_STATE + 2:
@@ -519,7 +519,7 @@ CPU_GET_INFO( sm8500 )
case CPUINFO_INT_INPUT_STATE + 7:
case CPUINFO_INT_INPUT_STATE + 8:
case CPUINFO_INT_INPUT_STATE + 9:
- case CPUINFO_INT_INPUT_STATE + 10: info->i = cpustate->IFLAGS & ( 1 << (state - CPUINFO_INT_INPUT_STATE)); break;
+ case CPUINFO_INT_INPUT_STATE + 10: info->i = cpustate->IFLAGS & ( 1 << (state - CPUINFO_INT_INPUT_STATE)); break;
case CPUINFO_INT_REGISTER + SM8500_RR0:
case CPUINFO_INT_REGISTER + SM8500_RR2:
case CPUINFO_INT_REGISTER + SM8500_RR4:
@@ -551,25 +551,25 @@ CPU_GET_INFO( sm8500 )
case CPUINFO_INT_REGISTER + SM8500_P2C:
case CPUINFO_INT_REGISTER + SM8500_P3C:
info->i = sm8500_get_reg( cpustate, state - CPUINFO_INT_REGISTER ); break;
- case CPUINFO_INT_REGISTER + STATE_GENPC: info->i = sm8500_get_reg( cpustate, SM8500_PC ); break;
- case CPUINFO_INT_REGISTER + STATE_GENSP: info->i = sm8500_get_reg( cpustate, SM8500_SP ); break;
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
-
-
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sm8500); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sm8500); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sm8500); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(sm8500); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sm8500); break;
- case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(sm8500); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sm8500); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
-
- case CPUINFO_STR_NAME: strcpy( info->s, "sm8500" ); break;
- case CPUINFO_STR_FAMILY: strcpy( info->s, "Sharp SM8500" ); break;
- case CPUINFO_STR_VERSION: strcpy( info->s, "0.1" ); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
- case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright The MESS Team." ); break;
+ case CPUINFO_INT_REGISTER + STATE_GENPC: info->i = sm8500_get_reg( cpustate, SM8500_PC ); break;
+ case CPUINFO_INT_REGISTER + STATE_GENSP: info->i = sm8500_get_reg( cpustate, SM8500_SP ); break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break;
+
+
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(sm8500); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(sm8500); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(sm8500); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(sm8500); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(sm8500); break;
+ case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(sm8500); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(sm8500); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+
+ case CPUINFO_STR_NAME: strcpy( info->s, "sm8500" ); break;
+ case CPUINFO_STR_FAMILY: strcpy( info->s, "Sharp SM8500" ); break;
+ case CPUINFO_STR_VERSION: strcpy( info->s, "0.1" ); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
+ case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright The MESS Team." ); break;
case CPUINFO_STR_FLAGS:
sprintf( info->s, "%c%c%c%c%c%c%c%c",
cpustate->PS1 & FLAG_C ? 'C' : '.',
@@ -581,18 +581,18 @@ CPU_GET_INFO( sm8500 )
cpustate->PS1 & FLAG_B ? 'B' : '.',
cpustate->PS1 & FLAG_I ? 'I' : '.' );
break;
- case CPUINFO_STR_REGISTER + SM8500_RR0: sprintf(info->s, "RR0:%04X", sm85cpu_mem_readword( cpustate, 0x00 ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_RR2: sprintf(info->s, "RR2:%04X", sm85cpu_mem_readword( cpustate, 0x02 ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_RR4: sprintf(info->s, "RR4:%04X", sm85cpu_mem_readword( cpustate, 0x04 ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_RR6: sprintf(info->s, "RR6:%04X", sm85cpu_mem_readword( cpustate, 0x06 ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_RR8: sprintf(info->s, "RR8:%04X", sm85cpu_mem_readword( cpustate, 0x08 ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_RR10: sprintf(info->s, "RR10:%04X", sm85cpu_mem_readword( cpustate, 0x0A ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_RR12: sprintf(info->s, "RR12:%04X", sm85cpu_mem_readword( cpustate, 0x0C ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_RR14: sprintf(info->s, "RR14:%04X", sm85cpu_mem_readword( cpustate, 0x0E ) ); break;
- case CPUINFO_STR_REGISTER + SM8500_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + SM8500_SP: sprintf(info->s, "SP:%04X", cpustate->SP); break;
- case CPUINFO_STR_REGISTER + SM8500_PS: sprintf(info->s, "PS:%04X", ( cpustate->PS0 << 8 ) | cpustate->PS1 ); break;
- case CPUINFO_STR_REGISTER + SM8500_SYS16: sprintf(info->s, "SYS:%02X", cpustate->SYS ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR0: sprintf(info->s, "RR0:%04X", sm85cpu_mem_readword( cpustate, 0x00 ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR2: sprintf(info->s, "RR2:%04X", sm85cpu_mem_readword( cpustate, 0x02 ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR4: sprintf(info->s, "RR4:%04X", sm85cpu_mem_readword( cpustate, 0x04 ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR6: sprintf(info->s, "RR6:%04X", sm85cpu_mem_readword( cpustate, 0x06 ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR8: sprintf(info->s, "RR8:%04X", sm85cpu_mem_readword( cpustate, 0x08 ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR10: sprintf(info->s, "RR10:%04X", sm85cpu_mem_readword( cpustate, 0x0A ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR12: sprintf(info->s, "RR12:%04X", sm85cpu_mem_readword( cpustate, 0x0C ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_RR14: sprintf(info->s, "RR14:%04X", sm85cpu_mem_readword( cpustate, 0x0E ) ); break;
+ case CPUINFO_STR_REGISTER + SM8500_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + SM8500_SP: sprintf(info->s, "SP:%04X", cpustate->SP); break;
+ case CPUINFO_STR_REGISTER + SM8500_PS: sprintf(info->s, "PS:%04X", ( cpustate->PS0 << 8 ) | cpustate->PS1 ); break;
+ case CPUINFO_STR_REGISTER + SM8500_SYS16: sprintf(info->s, "SYS:%02X", cpustate->SYS ); break;
}
}
diff --git a/src/emu/cpu/sm8500/sm8500.h b/src/emu/cpu/sm8500/sm8500.h
index 0a31924f607..1f9fd62916d 100644
--- a/src/emu/cpu/sm8500/sm8500.h
+++ b/src/emu/cpu/sm8500/sm8500.h
@@ -25,7 +25,7 @@ struct SM8500_CONFIG {
enum
{
/* "main" 16 bit register */
- SM8500_PC=1, SM8500_SP, SM8500_PS, SM8500_SYS16, SM8500_RR0, SM8500_RR2, SM8500_RR4, SM8500_RR6, SM8500_RR8, SM8500_RR10,
+ SM8500_PC=1, SM8500_SP, SM8500_PS, SM8500_SYS16, SM8500_RR0, SM8500_RR2, SM8500_RR4, SM8500_RR6, SM8500_RR8, SM8500_RR10,
SM8500_RR12, SM8500_RR14,
/* additional internal 8 bit registers */
SM8500_IE0, SM8500_IE1, SM8500_IR0, SM8500_IR1, SM8500_P0, SM8500_P1, SM8500_P2, SM8500_P3, SM8500_SYS, SM8500_CKC,
diff --git a/src/emu/cpu/sm8500/sm8500d.c b/src/emu/cpu/sm8500/sm8500d.c
index f2746ebad19..2aa5366f804 100644
--- a/src/emu/cpu/sm8500/sm8500d.c
+++ b/src/emu/cpu/sm8500/sm8500d.c
@@ -67,8 +67,8 @@ static const UINT32 s_flags[] = {
struct sm8500dasm
{
- UINT8 mnemonic;
- UINT8 arguments;
+ UINT8 mnemonic;
+ UINT8 arguments;
};
static const char *const sm8500_cond[16] = {
@@ -89,85 +89,85 @@ enum e_addrmodes {
static const sm8500dasm mnemonic[256] = {
/* 00 - 0F */
- {zCLR, AM_R}, {zNEG,AM_R}, {zCOM,AM_R}, {zRR,AM_R},
- {zRL, AM_R}, {zRRC,AM_R}, {zRLC,AM_R}, {zSRL,AM_R},
- {zINC, AM_R}, {zDEC,AM_R}, {zSRA,AM_R}, {zSLL,AM_R},
- {zDA, AM_R}, {zSWAP,AM_R}, {zPUSH,AM_R}, {zPOP,AM_R},
+ {zCLR, AM_R}, {zNEG,AM_R}, {zCOM,AM_R}, {zRR,AM_R},
+ {zRL, AM_R}, {zRRC,AM_R}, {zRLC,AM_R}, {zSRL,AM_R},
+ {zINC, AM_R}, {zDEC,AM_R}, {zSRA,AM_R}, {zSLL,AM_R},
+ {zDA, AM_R}, {zSWAP,AM_R}, {zPUSH,AM_R}, {zPOP,AM_R},
/* 10 - 1F */
- {zCMP,AM_rr}, {zADD,AM_rr}, {zSUB,AM_rr}, {zADC,AM_rr},
- {zSBC,AM_rr}, {zAND,AM_rr}, {zOR,AM_rr}, {zXOR,AM_rr},
- {zINCW,AM_S}, {zDECW,AM_S}, {z1A,AM_1A}, {z1B,AM_1B},
- {zBCLR,AM_riB}, {zBSET,AM_riB}, {zPUSHW,AM_S}, {zPOPW,AM_S},
+ {zCMP,AM_rr}, {zADD,AM_rr}, {zSUB,AM_rr}, {zADC,AM_rr},
+ {zSBC,AM_rr}, {zAND,AM_rr}, {zOR,AM_rr}, {zXOR,AM_rr},
+ {zINCW,AM_S}, {zDECW,AM_S}, {z1A,AM_1A}, {z1B,AM_1B},
+ {zBCLR,AM_riB}, {zBSET,AM_riB}, {zPUSHW,AM_S}, {zPOPW,AM_S},
/* 20 - 2F */
- {zCMP,AM_rmb}, {zADD,AM_rmb}, {zSUB,AM_rmb}, {zADC,AM_rmb},
- {zSBC,AM_rmb}, {zAND,AM_rmb}, {zOR,AM_rmb}, {zXOR,AM_rmb},
- {zMOV,AM_rmb}, {zMOV,AM_mbr}, {zBBC,AM_bid}, {zBBS,AM_bid},
- {zEXTS,AM_R}, {zDM,AM_i}, {zMOVPS0,AM_i}, {zBTST,AM_Ri},
+ {zCMP,AM_rmb}, {zADD,AM_rmb}, {zSUB,AM_rmb}, {zADC,AM_rmb},
+ {zSBC,AM_rmb}, {zAND,AM_rmb}, {zOR,AM_rmb}, {zXOR,AM_rmb},
+ {zMOV,AM_rmb}, {zMOV,AM_mbr}, {zBBC,AM_bid}, {zBBS,AM_bid},
+ {zEXTS,AM_R}, {zDM,AM_i}, {zMOVPS0,AM_i}, {zBTST,AM_Ri},
/* 30 - 3F */
- {zCMP,AM_rmw}, {zADD,AM_rmw}, {zSUB,AM_rmw}, {zADC,AM_rmw},
- {zSBC,AM_rmw}, {zAND,AM_rmw}, {zOR,AM_rmw}, {zXOR,AM_rmw},
- {zMOV,AM_rmw}, {zMOV,AM_mwr}, {zMOVW,AM_smw}, {zMOVW,AM_mws},
- {zMOVW,AM_ss}, {zDM,AM_R}, {zJMP,AM_2}, {zCALL,AM_2},
+ {zCMP,AM_rmw}, {zADD,AM_rmw}, {zSUB,AM_rmw}, {zADC,AM_rmw},
+ {zSBC,AM_rmw}, {zAND,AM_rmw}, {zOR,AM_rmw}, {zXOR,AM_rmw},
+ {zMOV,AM_rmw}, {zMOV,AM_mwr}, {zMOVW,AM_smw}, {zMOVW,AM_mws},
+ {zMOVW,AM_ss}, {zDM,AM_R}, {zJMP,AM_2}, {zCALL,AM_2},
/* 40 - 4F */
- {zCMP,AM_RR}, {zADD,AM_RR}, {zSUB,AM_RR}, {zADC,AM_RR},
- {zSBC,AM_RR}, {zAND,AM_RR}, {zOR,AM_RR}, {zXOR,AM_RR},
- {zMOV,AM_RR}, {zCALL,AM_ii}, {zMOVW,AM_SS}, {zMOVW,AM_Sw},
- {zMULT,AM_RR}, {zMULT,AM_iR}, {zBMOV,AM_bR}, {z4F,AM_4F},
+ {zCMP,AM_RR}, {zADD,AM_RR}, {zSUB,AM_RR}, {zADC,AM_RR},
+ {zSBC,AM_RR}, {zAND,AM_RR}, {zOR,AM_RR}, {zXOR,AM_RR},
+ {zMOV,AM_RR}, {zCALL,AM_ii}, {zMOVW,AM_SS}, {zMOVW,AM_Sw},
+ {zMULT,AM_RR}, {zMULT,AM_iR}, {zBMOV,AM_bR}, {z4F,AM_4F},
/* 50 - 5F */
- {zCMP,AM_iR}, {zADD,AM_iR}, {zSUB,AM_iR}, {zADC,AM_iR},
- {zSBC,AM_iR}, {zAND,AM_iR}, {zOR,AM_iR}, {zXOR,AM_iR},
- {zMOV, AM_iR}, {zINVLD,0}, {z5A,AM_ii}, {z5B,AM_ii},
- {zDIV,AM_SS}, {zDIV,AM_iS}, {zMOVM,AM_RiR}, {zMOVM,AM_Rii},
+ {zCMP,AM_iR}, {zADD,AM_iR}, {zSUB,AM_iR}, {zADC,AM_iR},
+ {zSBC,AM_iR}, {zAND,AM_iR}, {zOR,AM_iR}, {zXOR,AM_iR},
+ {zMOV, AM_iR}, {zINVLD,0}, {z5A,AM_ii}, {z5B,AM_ii},
+ {zDIV,AM_SS}, {zDIV,AM_iS}, {zMOVM,AM_RiR}, {zMOVM,AM_Rii},
/* 60 - 6F */
- {zCMPW,AM_SS}, {zADDW,AM_SS}, {zSUBW,AM_SS}, {zADCW,AM_SS},
- {zSBCW,AM_SS}, {zANDW,AM_SS}, {zORW,AM_SS}, {zXORW,AM_SS},
- {zCMPW,AM_Sw}, {zADDW,AM_Sw}, {zSUBW,AM_Sw}, {zADCW,AM_Sw},
- {zSBCW,AM_Sw}, {zANDW,AM_Sw}, {zORW,AM_Sw}, {zXORW,AM_Sw},
+ {zCMPW,AM_SS}, {zADDW,AM_SS}, {zSUBW,AM_SS}, {zADCW,AM_SS},
+ {zSBCW,AM_SS}, {zANDW,AM_SS}, {zORW,AM_SS}, {zXORW,AM_SS},
+ {zCMPW,AM_Sw}, {zADDW,AM_Sw}, {zSUBW,AM_Sw}, {zADCW,AM_Sw},
+ {zSBCW,AM_Sw}, {zANDW,AM_Sw}, {zORW,AM_Sw}, {zXORW,AM_Sw},
/* 70 - 7F */
- {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr},
- {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr},
- {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw},
- {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw},
+ {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr},
+ {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr}, {zDBNZ,AM_rbr},
+ {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw},
+ {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw}, {zMOVW,AM_riw},
/* 80 - 8F */
- {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr},
- {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr},
- {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr},
- {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr},
+ {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr},
+ {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr}, {zBBC,AM_Rbr},
+ {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr},
+ {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr}, {zBBS,AM_Rbr},
/* 90 - 9F */
- {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
- {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
- {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
- {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
+ {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
+ {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
+ {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
+ {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp}, {zJMP,AM_cjp},
/* A0 - AF */
- {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb},
- {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb},
- {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb},
- {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb},
+ {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb},
+ {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb}, {zBCLR,AM_Rb},
+ {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb},
+ {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb}, {zBSET,AM_Rb},
/* B0 - BF */
- {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR},
- {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR},
- {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr},
- {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr},
+ {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR},
+ {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR}, {zMOV,AM_rR},
+ {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr},
+ {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr}, {zMOV,AM_Rr},
/* C0 - CF */
- {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib},
- {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib},
- {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi},
- {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi},
+ {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib},
+ {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib}, {zMOV,AM_rib},
+ {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi},
+ {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi}, {zMOV,AM_pi},
/* D0 - DF */
- {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
- {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
- {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
- {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
+ {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
+ {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
+ {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
+ {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr}, {zBR,AM_cbr},
/* E0 - EF */
- {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
- {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
- {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
- {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
+ {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
+ {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
+ {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
+ {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS}, {zCALS,AM_CALS},
/* F0 - FF */
- {zSTOP,0}, {zHALT,0}, {zINVLD,0}, {zINVLD,0},
- {zINVLD,0}, {zINVLD,0}, {zINVLD,0}, {zINVLD,0},
- {zRET,0}, {zIRET,0}, {zCLRC,0}, {zCOMC,0},
- {zSETC,0}, {zEI,0}, {zDI,0}, {zNOP,0},
+ {zSTOP,0}, {zHALT,0}, {zINVLD,0}, {zINVLD,0},
+ {zINVLD,0}, {zINVLD,0}, {zINVLD,0}, {zINVLD,0},
+ {zRET,0}, {zIRET,0}, {zCLRC,0}, {zCOMC,0},
+ {zSETC,0}, {zEI,0}, {zDI,0}, {zNOP,0},
};
@@ -579,4 +579,3 @@ CPU_DISASSEMBLE( sm8500 )
return pos | s_flags[instr->mnemonic] | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/sm8500/sm85ops.h b/src/emu/cpu/sm8500/sm85ops.h
index 87e55000d0a..156841075f9 100644
--- a/src/emu/cpu/sm8500/sm85ops.h
+++ b/src/emu/cpu/sm8500/sm85ops.h
@@ -1,25 +1,25 @@
-#define ARG_R r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
+#define ARG_R r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
-#define ARG_RR r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_RR r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
-#define ARG_rR r1 = op & 0x07; \
+#define ARG_rR r1 = op & 0x07; \
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
-#define ARG_iR r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_iR r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
-#define ARG_Sw r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_Sw r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
s2 = sm85cpu_mem_readword( cpustate, cpustate->PC ); cpustate->PC += 2;
-#define ARG_rrw r1 = sm8500_b2w[op & 0x07]; \
+#define ARG_rrw r1 = sm8500_b2w[op & 0x07]; \
s2 = sm85cpu_mem_readword( cpustate, cpustate->PC ); cpustate->PC += 2;
-#define ARG_ri r1 = op & 0x07; \
+#define ARG_ri r1 = op & 0x07; \
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
-#define ARG_pi r1 = 0x10 + ( op & 0x07 ); \
+#define ARG_pi r1 = 0x10 + ( op & 0x07 ); \
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
#define ARG_rmb r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
@@ -46,7 +46,7 @@
r2 = r1; \
r1 = ( r1 >> 3 ) & 0x07;
-#define ARG_rmw r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_rmw r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
s2 = 0; \
switch( r1 & 0xC0 ) { \
case 0x00: \
@@ -70,7 +70,7 @@
r2 = r1; \
r1 = ( r1 >> 3 ) & 0x07;
-#define ARG_smw r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_smw r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
s2 = 0; \
switch( r1 & 0xC0 ) { \
case 0x00: \
@@ -94,17 +94,17 @@
r2 = r1; \
r1 = sm8500_b2w[ ( r1 >> 3 ) & 0x07 ];
-#define ARG_d8 r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_d8 r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
s2 = cpustate->PC + ((INT8)r1);
-#define ARG_Rbr r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_Rbr r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
s2 = cpustate->PC + ((INT8)r2);
-#define ARG_ad16 s2 = sm85cpu_mem_readword( cpustate, cpustate->PC ); \
+#define ARG_ad16 s2 = sm85cpu_mem_readword( cpustate, cpustate->PC ); \
cpustate->PC += 2;
-#define ARG_rr r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_rr r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
r2 = 0x00; \
switch( r1 & 0xC0 ) { \
case 0x00: \
@@ -117,7 +117,7 @@
break; \
}
-#define ARG_ss r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_ss r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
r2 = 0x00; \
switch( r1 & 0xC0 ) { \
case 0x00: \
@@ -130,7 +130,7 @@
break; \
}
-#define ARG_2 r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_2 r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
s2 = 0; \
switch( r1 & 0xC0 ) { \
case 0x00: \
@@ -147,11 +147,11 @@
break; \
}
-#define ARG_RiR r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_RiR r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
d1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
-#define ARG_Rii r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_Rii r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
d1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
@@ -164,7 +164,7 @@
s1 = 0xFF00 + d1; \
}
-#define ARG_riBd r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
+#define ARG_riBd r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
s2 = 1 << ( r1 & 0x07 ); \
d1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ ); \
if ( r1 & 0x38 ) { \
@@ -174,7 +174,7 @@
} \
d1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
-#define OP_INTSUB8(X,Y,MASK) d1 = X; \
+#define OP_INTSUB8(X,Y,MASK) d1 = X; \
d2 = Y; \
res = d1 - d2; \
cpustate->PS1 = cpustate->PS1 & ( MASK ); \
@@ -183,13 +183,13 @@
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d2 ^ d1 ) & ( res ^ d1 ) ) & 0x80 ) ? FLAG_V : 0 );
-#define OP_CMP8(X,Y) OP_INTSUB8( X, Y, (FLAG_B | FLAG_I | FLAG_H | FLAG_D ) );
+#define OP_CMP8(X,Y) OP_INTSUB8( X, Y, (FLAG_B | FLAG_I | FLAG_H | FLAG_D ) );
-#define OP_SUB8(X,Y) OP_INTSUB8( X, Y, (FLAG_B | FLAG_I ) ); \
+#define OP_SUB8(X,Y) OP_INTSUB8( X, Y, (FLAG_B | FLAG_I ) ); \
cpustate->PS1 = cpustate->PS1 | FLAG_D; \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ d2 ^ res ) & 0x10 ) ? FLAG_H : 0 );
-#define OP_INTSUB16(X,Y,MASK) d1 = X; \
+#define OP_INTSUB16(X,Y,MASK) d1 = X; \
d2 = Y; \
res = d1 - d2; \
cpustate->PS1 = cpustate->PS1 & ( MASK ); \
@@ -198,13 +198,13 @@
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x8000 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d2 ^ d1 ) & (res ^ d1) ) & 0x8000 ) ? FLAG_V : 0 );
-#define OP_CMP16(X,Y) OP_INTSUB16( X, Y, ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ) );
+#define OP_CMP16(X,Y) OP_INTSUB16( X, Y, ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ) );
-#define OP_SUB16(X,Y) OP_INTSUB16( X, Y, ( FLAG_B | FLAG_I ) ); \
+#define OP_SUB16(X,Y) OP_INTSUB16( X, Y, ( FLAG_B | FLAG_I ) ); \
cpustate->PS1 = cpustate->PS1 | FLAG_D; \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ d2 ^ res ) & 0x0010 ) ? FLAG_H : 0 );
-#define OP_SBC8(X,Y) d1 = X; \
+#define OP_SBC8(X,Y) d1 = X; \
d2 = Y; \
res = d1 - d2 - ((cpustate->PS1 & FLAG_C) ? 1 : 0); \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I ); \
@@ -215,7 +215,7 @@
cpustate->PS1 = cpustate->PS1 | FLAG_D; \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ d2 ^ res ) & 0x10 ) ? FLAG_H : 0 );
-#define OP_SBC16(X,Y) d1 = X; \
+#define OP_SBC16(X,Y) d1 = X; \
d2 = Y; \
res = d1 - d2 - ((cpustate->PS1 & FLAG_C) ? 1 : 0); \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I ); \
@@ -226,7 +226,7 @@
cpustate->PS1 = cpustate->PS1 | FLAG_D; \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ d2 ^ res ) & 0x10 ) ? FLAG_H : 0 );
-#define OP_ADD8(X,Y) d1 = X; \
+#define OP_ADD8(X,Y) d1 = X; \
d2 = Y; \
res = d1 + d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I ); \
@@ -236,7 +236,7 @@
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d2 ^ d1 ^ 0x80 ) & (res ^ d1) ) & 0x80 ) ? FLAG_V : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ d2 ^ res ) & 0x10 ) ? FLAG_H : 0 );
-#define OP_ADD16(X,Y) d1 = X; \
+#define OP_ADD16(X,Y) d1 = X; \
d2 = Y; \
res = d1 + d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I ); \
@@ -246,7 +246,7 @@
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d2 ^ d1 ) & ( res ^ d1 ) ) & 0x8000 ) ? FLAG_V : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( d2 ^ d1 ^ res ) & 0x0010 ) ? FLAG_H : 0 );
-#define OP_ADC8(X,Y) d1 = X; \
+#define OP_ADC8(X,Y) d1 = X; \
d2 = Y; \
res = d1 + d2 + ((cpustate->PS1 & FLAG_C) ? 1 : 0); \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I ); \
@@ -256,7 +256,7 @@
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d2 ^ d1 ) & (res ^ d1) ) & 0x80 ) ? FLAG_V : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ d2 ^ res ) & 0x10 ) ? FLAG_H : 0 );
-#define OP_ADC16(X,Y) d1 = X; \
+#define OP_ADC16(X,Y) d1 = X; \
d2 = Y; \
res = d1 + d2 + ((cpustate->PS1 & FLAG_C) ? 1 : 0); \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I ); \
@@ -266,18 +266,18 @@
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d2 ^ d1 ) & ( res ^ d1) ) & 0x8000 ) ? FLAG_V : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ d2 ^ res ) & 0x10 ) ? FLAG_H : 0 );
-#define OP_NEG8(X) res = -X; \
+#define OP_NEG8(X) res = -X; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_C | FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0x80 ) ? FLAG_V : 0 );
-#define OP_COM8(X) res = ~X; \
+#define OP_COM8(X) res = ~X; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_C | FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
-#define OP_RR8(X) d1 = X; \
+#define OP_RR8(X) d1 = X; \
res = d1 >> 1; \
if ( d1 & 0x01 ) { \
res |= 0x80; \
@@ -288,7 +288,7 @@
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d1 ^ res ) & 0x80 ) && ! ( res & 0x80 ) ) ? FLAG_V : 0 );
-#define OP_RL8(X) d1 = X; \
+#define OP_RL8(X) d1 = X; \
res = d1 << 1; \
if ( d1 & 0x80 ) { \
res |= 0x01; \
@@ -299,7 +299,7 @@
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ res ) & 0x80 ) ? FLAG_V : 0 );
-#define OP_RRC8(X) d1 = X; \
+#define OP_RRC8(X) d1 = X; \
res = d1 >> 1; \
if ( cpustate->PS1 & FLAG_C ) { \
res |= 0x80; \
@@ -310,7 +310,7 @@
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d1 ^ res ) & 0x80 ) && ! ( res & 0x80 ) ) ? FLAG_V : 0 );
-#define OP_RLC8(X) d1 = X; \
+#define OP_RLC8(X) d1 = X; \
res = d1 << 1; \
if ( cpustate->PS1 & FLAG_C ) { \
res |= 0x01; \
@@ -321,13 +321,13 @@
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( d1 ^ res ) & 0x80 ) ? FLAG_V : 0 );
-#define OP_SRL8(X) d1 = X; \
+#define OP_SRL8(X) d1 = X; \
res = d1 >> 1; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( d1 & 0x01 ) ? FLAG_C : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 );
-#define OP_SRA8(X) d1 = X; \
+#define OP_SRA8(X) d1 = X; \
res = d1 >> 1; \
if ( d1 & 0x80 ) { \
res |= 0x80; \
@@ -337,81 +337,81 @@
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
-#define OP_SLL8(X) d1 = X; \
+#define OP_SLL8(X) d1 = X; \
res = d1 << 1; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( d1 & 0x80 ) ? FLAG_C : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
-#define OP_INC8(X) d1 = X; \
+#define OP_INC8(X) d1 = X; \
res = d1 + 1; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_C | FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d1 ^ res ) & 0x80 ) && ! ( res & 0x80 ) ) ? FLAG_V : 0 );
-#define OP_INC16(X) d1 = X; \
+#define OP_INC16(X) d1 = X; \
res = d1 + 1; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_C | FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x8000 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d1 ^ res ) & 0x8000 ) && ! ( res & 0x8000 ) ) ? FLAG_V : 0 );
-#define OP_DEC8(X) d1 = X; \
+#define OP_DEC8(X) d1 = X; \
res = d1 - 1; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_C | FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d1 ^ res ) & 0x80 ) && ( res & 0x80 ) ) ? FLAG_V : 0 );
-#define OP_DEC16(X) d1 = X; \
+#define OP_DEC16(X) d1 = X; \
res = d1 - 1; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_C | FLAG_D | FLAG_H | FLAG_B | FLAG_I ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFFFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x8000 ) ? FLAG_S : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( ( d1 ^ res ) & 0x8000 ) && ( res & 0x8000 ) ) ? FLAG_V : 0 );
-#define OP_AND8(X,Y) d1 = X; \
+#define OP_AND8(X,Y) d1 = X; \
d2 = Y; \
res = d1 & d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
-#define OP_AND16(X,Y) d1 = X; \
+#define OP_AND16(X,Y) d1 = X; \
d2 = Y; \
res = d1 & d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_C | FLAG_S | FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFFFF ) == 0 ) ? FLAG_Z : 0 );
-#define OP_OR8(X,Y) d1 = X; \
+#define OP_OR8(X,Y) d1 = X; \
d2 = Y; \
res = d1 | d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
-#define OP_OR16(X,Y) d1 = X; \
+#define OP_OR16(X,Y) d1 = X; \
d2 = Y; \
res = d1 | d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D | FLAG_C | FLAG_S ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFFFF ) == 0 ) ? FLAG_Z : 0 );
-#define OP_XOR8(X,Y) d1 = X; \
+#define OP_XOR8(X,Y) d1 = X; \
d2 = Y; \
res = d1 ^ d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
-#define OP_XOR16(X,Y) d1 = X; \
+#define OP_XOR16(X,Y) d1 = X; \
d2 = Y; \
res = d1 ^ d2; \
cpustate->PS1 = cpustate->PS1 & ( FLAG_B | FLAG_I | FLAG_H | FLAG_D | FLAG_C | FLAG_S ); \
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFFFF ) == 0 ) ? FLAG_Z : 0 );
-#define OP_DA8(X) d1 = X; \
+#define OP_DA8(X) d1 = X; \
res = d1; \
if ( cpustate->PS1 & FLAG_D ) { \
if ( cpustate->PS1 & FLAG_C ) { \
@@ -465,10 +465,10 @@
cpustate->PS1 = cpustate->PS1 | ( ( ( res & 0xFF ) == 0x00 ) ? FLAG_Z : 0 ); \
cpustate->PS1 = cpustate->PS1 | ( ( res & 0x80 ) ? FLAG_S : 0 );
-#define OP_SWAP8(X) d1 = X; \
+#define OP_SWAP8(X) d1 = X; \
res = ( d1 << 4 ) | ( d1 >> 4 );
-#define CHECK_CC res = 0; \
+#define CHECK_CC res = 0; \
switch( op & 0x0F ) { \
case 0x00: /* F */ res = 0; break; \
case 0x01: /* LT */ if ( ( cpustate->PS1 & FLAG_S ) ^ ( ( cpustate->PS1 & FLAG_V ) << 1 ) ) res = 1; break; \
@@ -488,269 +488,269 @@
case 0x0F: /* NC */ if ( ! (cpustate->PS1 & FLAG_C) ) res = 1; break; \
}
-#define PUSH8(X) cpustate->SP--; \
+#define PUSH8(X) cpustate->SP--; \
if ( ( cpustate->SYS & 0x40 ) == 0 ) cpustate->SP &= 0xFF; \
sm85cpu_mem_writebyte( cpustate, cpustate->SP, X );
-#define POP8(X) X = sm85cpu_mem_readbyte( cpustate, cpustate->SP ); \
+#define POP8(X) X = sm85cpu_mem_readbyte( cpustate, cpustate->SP ); \
cpustate->SP++; \
if ( ( cpustate->SYS & 0x40 ) == 0 ) cpustate->SP &= 0xFF;
-case 0x00: /* CLR R - 4 cycles - Flags affected: -------- */
+case 0x00: /* CLR R - 4 cycles - Flags affected: -------- */
ARG_R;
sm85cpu_mem_writebyte( cpustate, r1, 0 );
- mycycles += 4;
+ mycycles += 4;
break;
-case 0x01: /* NEG R - 5 cycles - Flags affected: CZSV---- */
+case 0x01: /* NEG R - 5 cycles - Flags affected: CZSV---- */
ARG_R;
OP_NEG8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1 , res & 0xFF );
mycycles += 5;
break;
-case 0x02: /* COM R - 4 cycles - Flags affected: -ZS0---- */
+case 0x02: /* COM R - 4 cycles - Flags affected: -ZS0---- */
ARG_R;
OP_COM8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x03: /* RR R - 4 cycles - Flags affected: CZSV---- */
+case 0x03: /* RR R - 4 cycles - Flags affected: CZSV---- */
ARG_R;
OP_RR8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x04: /* RL R - 4 cycles - Flags affected: CZSV---- */
+case 0x04: /* RL R - 4 cycles - Flags affected: CZSV---- */
ARG_R;
OP_RL8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1 , res & 0xFF );
mycycles += 4;
break;
-case 0x05: /* RRC R - 4 cycles - Flags affected: CZSV---- */
+case 0x05: /* RRC R - 4 cycles - Flags affected: CZSV---- */
ARG_R;
OP_RRC8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x06: /* RLC R - 4 cycles - Flags affected: CZSV---- */
+case 0x06: /* RLC R - 4 cycles - Flags affected: CZSV---- */
ARG_R;
OP_RLC8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x07: /* SRL R - 4 cycles - Flags affected: CZ00---- */
+case 0x07: /* SRL R - 4 cycles - Flags affected: CZ00---- */
ARG_R;
OP_SRL8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x08: /* INC R - 4 cycles - Flags affected: -ZSV---- */
+case 0x08: /* INC R - 4 cycles - Flags affected: -ZSV---- */
ARG_R;
OP_INC8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x09: /* DEC R - 4 cycles - Flags affected: -ZSV---- */
+case 0x09: /* DEC R - 4 cycles - Flags affected: -ZSV---- */
ARG_R;
OP_DEC8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x0A: /* SRA R - 4 cycles - Flags affected: CZS0---- */
+case 0x0A: /* SRA R - 4 cycles - Flags affected: CZS0---- */
ARG_R;
OP_SRA8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x0B: /* SLL R - 4 cycles - Flags affected: CZS0---- */
+case 0x0B: /* SLL R - 4 cycles - Flags affected: CZS0---- */
ARG_R;
OP_SLL8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x0C: /* DA R - 4 cycles - Flags affected: CZS----- */
+case 0x0C: /* DA R - 4 cycles - Flags affected: CZS----- */
ARG_R;
OP_DA8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 4;
break;
-case 0x0D: /* SWAP R - 7 cycles - Flags affected: -------- */
+case 0x0D: /* SWAP R - 7 cycles - Flags affected: -------- */
ARG_R;
OP_SWAP8( sm85cpu_mem_readbyte( cpustate, r1 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 7;
break;
-case 0x0E: /* PUSH R - 5?/12? (8bit SP),10 (16bit SP) cycles */
+case 0x0E: /* PUSH R - 5?/12? (8bit SP),10 (16bit SP) cycles */
ARG_R;
PUSH8( sm85cpu_mem_readbyte( cpustate, r1 ) );
mycycles += ( ( cpustate->SYS & 0x40 ) ? 12 : 10 );
break;
-case 0x0F: /* POP R - 9,8 cycles */
+case 0x0F: /* POP R - 9,8 cycles */
ARG_R;
POP8( r2 );
sm85cpu_mem_writebyte( cpustate, r1, r2 );
mycycles += ( ( cpustate->SYS & 0x40 ) ? 9 : 8 );
break;
-case 0x10: /* CMP Rr,Rs - 5 cycles - Flags affected: CZSV---- */
+case 0x10: /* CMP Rr,Rs - 5 cycles - Flags affected: CZSV---- */
ARG_rr;
OP_CMP8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
mycycles += 5;
break;
-case 0x11: /* ADD Rr,Rs - 5 cycles - Flags affected: CZSV0H-- */
+case 0x11: /* ADD Rr,Rs - 5 cycles - Flags affected: CZSV0H-- */
ARG_rr;
OP_ADD8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 5;
break;
-case 0x12: /* SUB Rr,Rs - 5 cycles - Flags affected: CZSV1H-- */
+case 0x12: /* SUB Rr,Rs - 5 cycles - Flags affected: CZSV1H-- */
ARG_rr;
OP_SUB8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 5;
break;
-case 0x13: /* ADC Rr,Rs - 5 cycles - Flags affected: CZSV0H-- */
+case 0x13: /* ADC Rr,Rs - 5 cycles - Flags affected: CZSV0H-- */
ARG_rr;
OP_ADC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 5;
break;
-case 0x14: /* SBC Rr,Rs - 5 cycles - Flags affected: CZSV1H-- */
+case 0x14: /* SBC Rr,Rs - 5 cycles - Flags affected: CZSV1H-- */
ARG_rr;
OP_SBC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 5;
break;
-case 0x15: /* AND Rr,Rs - 5 cycles - Flags affected: -ZS0---- */
+case 0x15: /* AND Rr,Rs - 5 cycles - Flags affected: -ZS0---- */
ARG_rr;
OP_AND8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 5;
break;
-case 0x16: /* OR Rr,Rs - 5 cycles - Flags affected: -ZS0---- */
+case 0x16: /* OR Rr,Rs - 5 cycles - Flags affected: -ZS0---- */
ARG_rr;
OP_OR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 5;
break;
-case 0x17: /* XOR Rr,Rs - 5 cycles - Flags affected: -ZS0---- */
+case 0x17: /* XOR Rr,Rs - 5 cycles - Flags affected: -ZS0---- */
ARG_rr;
OP_XOR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 5;
break;
-case 0x18: /* INCW S - 8 cycles - Flags affected: -ZSV---- */
+case 0x18: /* INCW S - 8 cycles - Flags affected: -ZSV---- */
ARG_R;
OP_INC16( sm85cpu_mem_readword( cpustate, r1 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 8;
break;
-case 0x19: /* DECW S - 8 cycles - Flags affected: -ZSV---- */
+case 0x19: /* DECW S - 8 cycles - Flags affected: -ZSV---- */
ARG_R;
OP_DEC16( sm85cpu_mem_readword( cpustate, r1 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 8;
break;
-case 0x1A: /* CLR/NEG/COM/RR/RL/RRC/RLC/SRL @Rr - 7/8/7/7/7/7/7/6 cycles */
+case 0x1A: /* CLR/NEG/COM/RR/RL/RRC/RLC/SRL @Rr - 7/8/7/7/7/7/7/6 cycles */
ARG_rr;
res = 0;
s1 = sm85cpu_mem_readbyte( cpustate, r1 );
switch( r2 ) {
- case 0x00: /* Flags affected: -------- */
+ case 0x00: /* Flags affected: -------- */
res = 0;
mycycles += 7;
break;
- case 0x01: /* Flags affected: CZSV---- */
+ case 0x01: /* Flags affected: CZSV---- */
OP_NEG8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += 8;
break;
- case 0x02: /* Flags affected: -ZS0---- */
+ case 0x02: /* Flags affected: -ZS0---- */
OP_COM8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += 7;
break;
- case 0x03: /* Flags affected: CZSV---- */
+ case 0x03: /* Flags affected: CZSV---- */
OP_RR8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += 7;
break;
- case 0x04: /* Flags affected: CZSV---- */
+ case 0x04: /* Flags affected: CZSV---- */
OP_RL8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += 7;
break;
- case 0x05: /* Flags affected: CZSV---- */
+ case 0x05: /* Flags affected: CZSV---- */
OP_RRC8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += 7;
break;
- case 0x06: /* Flags affected: CZSV---- */
+ case 0x06: /* Flags affected: CZSV---- */
OP_RLC8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += 7;
break;
- case 0x07: /* Flags affected: CZ00---- */
+ case 0x07: /* Flags affected: CZ00---- */
OP_SRL8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += 6;
break;
}
sm85cpu_mem_writebyte( cpustate, s1, res & 0xFF );
break;
-case 0x1B: /* INC/DEC/SRA/SLL/DA/SWAP/PUSH/POP @Rr - 7,7,6,7,9,13,8,12,11 cycles */
+case 0x1B: /* INC/DEC/SRA/SLL/DA/SWAP/PUSH/POP @Rr - 7,7,6,7,9,13,8,12,11 cycles */
ARG_rr;
s1 = sm85cpu_mem_readbyte( cpustate, r1 );
switch( r2 ) {
- case 0x00: /* Flags affected: -ZSV---- */
+ case 0x00: /* Flags affected: -ZSV---- */
OP_INC8( sm85cpu_mem_readbyte( cpustate, s1 ) );
sm85cpu_mem_writebyte( cpustate, s1, res & 0xFF );
mycycles += 7;
break;
- case 0x01: /* Flags affected: -ZSV---- */
+ case 0x01: /* Flags affected: -ZSV---- */
OP_DEC8( sm85cpu_mem_readbyte( cpustate, s1 ) );
sm85cpu_mem_writebyte( cpustate, s1, res & 0xFF );
mycycles += 7;
break;
- case 0x02: /* Flags affected: CZS0---- */
+ case 0x02: /* Flags affected: CZS0---- */
OP_SRA8( sm85cpu_mem_readbyte( cpustate, s1 ) );
sm85cpu_mem_writebyte( cpustate, s1, res & 0xFF );
mycycles += 6;
break;
- case 0x03: /* Flags affected: CZS0---- */
+ case 0x03: /* Flags affected: CZS0---- */
OP_SLL8( sm85cpu_mem_readbyte( cpustate, s1 ) );
sm85cpu_mem_writebyte( cpustate, s1, res & 0xFF );
mycycles += 6;
break;
- case 0x04: /* Flags affected: CZS----- */
+ case 0x04: /* Flags affected: CZS----- */
OP_DA8( sm85cpu_mem_readbyte( cpustate, s1 ) );
sm85cpu_mem_writebyte( cpustate, s1, res & 0xFF );
mycycles += 7;
break;
- case 0x05: /* Flags affected: -------- */
+ case 0x05: /* Flags affected: -------- */
OP_SWAP8( sm85cpu_mem_readbyte( cpustate, s1 ) );
sm85cpu_mem_writebyte( cpustate, s1, res & 0xFF );
mycycles += 9;
break;
- case 0x06: /* Flags affected: -------- */
+ case 0x06: /* Flags affected: -------- */
PUSH8( sm85cpu_mem_readbyte( cpustate, s1 ) );
mycycles += ( ( cpustate->SYS & 0x40 ) ? 13 : 8 );
break;
- case 0x07: /* Flags affected: -------- */
+ case 0x07: /* Flags affected: -------- */
POP8( res );
sm85cpu_mem_writebyte( cpustate, s1, res );
mycycles += ( ( cpustate->SYS & 0x40 ) ? 12 : 11 );
break;
}
break;
-case 0x1C: /* BCLR 0xFFdd/d8(r),#b - 12,8 cycles - Flags affected: -------- */
+case 0x1C: /* BCLR 0xFFdd/d8(r),#b - 12,8 cycles - Flags affected: -------- */
ARG_riB;
sm85cpu_mem_writebyte( cpustate, s1, sm85cpu_mem_readbyte( cpustate, s1 ) & ~s2 );
mycycles += ( ( r1 & 0x38 ) ? 8 : 12 );
break;
-case 0x1D: /* BSET 0xFFdd/d8(r),#b - 12,8 cycles - Flags affected: -------- */
+case 0x1D: /* BSET 0xFFdd/d8(r),#b - 12,8 cycles - Flags affected: -------- */
ARG_riB;
sm85cpu_mem_writebyte( cpustate, s1, sm85cpu_mem_readbyte( cpustate, s1 ) | s2 );
mycycles += ( ( r1 & 0x38 ) ? 8 : 12 );
break;
-case 0x1E: /* PUSHW S - 12,9 cycles - Flags affected: -------- */
+case 0x1E: /* PUSHW S - 12,9 cycles - Flags affected: -------- */
ARG_R;
PUSH8( sm85cpu_mem_readbyte( cpustate, r1 + 1 ) );
PUSH8( sm85cpu_mem_readbyte( cpustate, r1 ) );
mycycles += ( ( cpustate->SYS & 0x40 ) ? 12 : 9 );
break;
-case 0x1F: /* POPW S - 12,13 cycles - Flags affected: -------- */
+case 0x1F: /* POPW S - 12,13 cycles - Flags affected: -------- */
ARG_R;
POP8( r2 );
sm85cpu_mem_writebyte( cpustate, r1, r2 );
@@ -758,114 +758,114 @@ case 0x1F: /* POPW S - 12,13 cycles - Flags affected: -------- */
sm85cpu_mem_writebyte( cpustate, r1 + 1, r2 );
mycycles += ( ( cpustate->SYS & 0x40 ) ? 12 : 13 );
break;
-case 0x20: /* CMP r,@r / CMP r,(r)+ / CMP r,@w / CMP r,w(r) / CMP r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV---- */
+case 0x20: /* CMP r,@r / CMP r,(r)+ / CMP r,@w / CMP r,w(r) / CMP r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV---- */
ARG_rmb;
OP_CMP8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x21: /* ADD r,@r / ADD r,(r)+ / ADD r,@w / ADD r,w(r) / ADD r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV0H-- */
+case 0x21: /* ADD r,@r / ADD r,(r)+ / ADD r,@w / ADD r,w(r) / ADD r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV0H-- */
ARG_rmb;
OP_ADD8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x22: /* SUB r,@r / SUB r,(r)+ / SUB r,@w / SUB r,w(r) / SUB r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV1H-- */
+case 0x22: /* SUB r,@r / SUB r,(r)+ / SUB r,@w / SUB r,w(r) / SUB r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV1H-- */
ARG_rmb;
OP_SUB8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x23: /* ADC r,@r / ADC r,(r)+ / ADC r,@w / ADC r,w(r) / ADC r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV0H-- */
+case 0x23: /* ADC r,@r / ADC r,(r)+ / ADC r,@w / ADC r,w(r) / ADC r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV0H-- */
ARG_rmb;
OP_ADC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x24: /* SBC r,@r / SBC r,(r)+ / SBC r,@w / SBC r,w(r) / SBC r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV1H-- */
+case 0x24: /* SBC r,@r / SBC r,(r)+ / SBC r,@w / SBC r,w(r) / SBC r,-(r) - 7,8,10,8,9 cycles - Flags affected: CZSV1H-- */
ARG_rmb;
OP_SBC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x25: /* AND r,@r / AND r,(r)+ / AND r,@w / AND r,w(r) / AND r,-(r) - 7,8,10,8,9 cycles - Flags affected: -ZS0---- */
+case 0x25: /* AND r,@r / AND r,(r)+ / AND r,@w / AND r,w(r) / AND r,-(r) - 7,8,10,8,9 cycles - Flags affected: -ZS0---- */
ARG_rmb;
OP_AND8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x26: /* OR r,@r / OR r,(r)+ / OR r,@w / OR r,w(r) / OR r,-(r) - 7,8,10,8,9 cycles - Flags affected: -ZS0---- */
+case 0x26: /* OR r,@r / OR r,(r)+ / OR r,@w / OR r,w(r) / OR r,-(r) - 7,8,10,8,9 cycles - Flags affected: -ZS0---- */
ARG_rmb;
OP_OR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x27: /* XOR r,@r / XOR r,(r)+ / XOR r,@w / XOR r,w(r) / XOR r,-(r) - 7,8,10,8,9 cycles - Flags affected: -ZS0---- */
+case 0x27: /* XOR r,@r / XOR r,(r)+ / XOR r,@w / XOR r,w(r) / XOR r,-(r) - 7,8,10,8,9 cycles - Flags affected: -ZS0---- */
ARG_rmb;
OP_XOR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 8 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x28: /* MOV r,@r / MOV r,(r)+ / MOV r,@w / MOV r,w(r) / MOV r,-(r) - 6,7,10,7,8 cycles - Flags affected: -------- */
+case 0x28: /* MOV r,@r / MOV r,(r)+ / MOV r,@w / MOV r,w(r) / MOV r,-(r) - 6,7,10,7,8 cycles - Flags affected: -------- */
ARG_rmb;
sm85cpu_mem_writebyte( cpustate, r1, sm85cpu_mem_readbyte( cpustate, s2 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 6; break;
- case 0x40: mycycles += 7; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 7 : 10 ); break;
- case 0xC0: mycycles += 8; break;
+ case 0x00: mycycles += 6; break;
+ case 0x40: mycycles += 7; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 7 : 10 ); break;
+ case 0xC0: mycycles += 8; break;
}
break;
-case 0x29: /* MOV @r,r / MOV (r)+,r / MOV @w,r / MOV w(r),r / MOV -(r),r - 8,8,10,9,9 cycles - Flags affected: -------- */
+case 0x29: /* MOV @r,r / MOV (r)+,r / MOV @w,r / MOV w(r),r / MOV -(r),r - 8,8,10,9,9 cycles - Flags affected: -------- */
ARG_rmb;
sm85cpu_mem_writebyte( cpustate, s2, sm85cpu_mem_readbyte( cpustate, r1 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 8; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 9 : 10 ); break;
- case 0xC0: mycycles += 9; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 8; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 9 : 10 ); break;
+ case 0xC0: mycycles += 9; break;
}
break;
-case 0x2A: /* BBC FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: -------- */
+case 0x2A: /* BBC FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: -------- */
ARG_riBd;
if ( sm85cpu_mem_readbyte( cpustate, s1 ) & s2 ) {
mycycles += 10;
@@ -877,7 +877,7 @@ case 0x2A: /* BBC FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: ------
mycycles += 2;
}
break;
-case 0x2B: /* BBS FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: -------- */
+case 0x2B: /* BBS FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: -------- */
ARG_riBd;
if ( sm85cpu_mem_readbyte( cpustate, s1 ) & s2 ) {
cpustate->PC = cpustate->PC + ((INT8)d1);
@@ -889,7 +889,7 @@ case 0x2B: /* BBS FFii/i(Rr),#b,d8 - 16,12/14,10 cycles - Flags affected: ------
mycycles += 2;
}
break;
-case 0x2C: /* EXTS Rr - 6 cycles - Flags affected: -------- */
+case 0x2C: /* EXTS Rr - 6 cycles - Flags affected: -------- */
ARG_R;
res = sm85cpu_mem_readword( cpustate, r1 );
if ( res & 0x80 ) {
@@ -900,16 +900,16 @@ case 0x2C: /* EXTS Rr - 6 cycles - Flags affected: -------- */
sm85cpu_mem_writeword( cpustate, r1, res );
mycycles += 6;
break;
-case 0x2D: /* unk2D - 4 cycles */
+case 0x2D: /* unk2D - 4 cycles */
logerror( "%04X: unk%02x\n", cpustate->PC-1,op );
mycycles += 4;
break;
-case 0x2E: /* MOV PS0,#00 - 4 cycles - Flags affected: -------- */
+case 0x2E: /* MOV PS0,#00 - 4 cycles - Flags affected: -------- */
ARG_R;
cpustate->PS0 = r1;
- mycycles += 4;
+ mycycles += 4;
break;
-case 0x2F: /* BTST R,i - 6 cycles - Flags affected: -Z-0---- */
+case 0x2F: /* BTST R,i - 6 cycles - Flags affected: -Z-0---- */
ARG_RR;
cpustate->PS1 = cpustate->PS1 & ~ FLAG_V;
if ( ( sm85cpu_mem_readbyte( cpustate, r2 ) & r1 ) == 0x00 ) {
@@ -919,231 +919,231 @@ case 0x2F: /* BTST R,i - 6 cycles - Flags affected: -Z-0---- */
}
mycycles += 6;
break;
-case 0x30: /* CMP r,@rr / CMP r,(rr)+ / CMP r,@ww / CMP r,ww(rr) / CMP r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV---- */
+case 0x30: /* CMP r,@rr / CMP r,(rr)+ / CMP r,@ww / CMP r,ww(rr) / CMP r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV---- */
ARG_rmw;
OP_CMP8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x31: /* ADD r,@rr / ADD r,(rr)+ / ADD r,@ww / ADD r,ww(rr) / ADD r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV0H-- */
+case 0x31: /* ADD r,@rr / ADD r,(rr)+ / ADD r,@ww / ADD r,ww(rr) / ADD r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV0H-- */
ARG_rmw;
OP_ADD8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x32: /* SUB r,@rr / SUB r,(rr)+ / SUB r,@ww / SUB r,ww(rr) / SUB r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV1H-- */
+case 0x32: /* SUB r,@rr / SUB r,(rr)+ / SUB r,@ww / SUB r,ww(rr) / SUB r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV1H-- */
ARG_rmw;
OP_SUB8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x33: /* ADC r,@rr / ADC r,(rr)+ / ADC r,@ww / ADC r,ww(rr) / ADC r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV0H-- */
+case 0x33: /* ADC r,@rr / ADC r,(rr)+ / ADC r,@ww / ADC r,ww(rr) / ADC r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV0H-- */
ARG_rmw;
OP_ADC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x34: /* SBC r,@rr / SBC r,(rr)+ / SBC r,@ww / SBC r,ww(rr) / SBC r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV1H-- */
+case 0x34: /* SBC r,@rr / SBC r,(rr)+ / SBC r,@ww / SBC r,ww(rr) / SBC r,-(rr) - 8,13,11,15,13 cycles - Flags affected: CZSV1H-- */
ARG_rmw;
OP_SBC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x35: /* AND r,@rr / AND r,(rr)+ / AND r,@ww / AND r,ww(rr) / AND r,-(rr) - 8,13,11,15,13 cycles - Flags affected: -ZS0---- */
+case 0x35: /* AND r,@rr / AND r,(rr)+ / AND r,@ww / AND r,ww(rr) / AND r,-(rr) - 8,13,11,15,13 cycles - Flags affected: -ZS0---- */
ARG_rmw;
OP_AND8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x36: /* OR r,@rr / OR r,(rr)+ / OR r,@ww / OR r,ww(rr) / OR r,-(rr) - 8,13,11,15,13 cycles - Flags affected: -ZS0---- */
+case 0x36: /* OR r,@rr / OR r,(rr)+ / OR r,@ww / OR r,ww(rr) / OR r,-(rr) - 8,13,11,15,13 cycles - Flags affected: -ZS0---- */
ARG_rmw;
OP_OR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x37: /* XOR? r,@rr / XOR r,(rr)+ / XOR r,@ww / XOR r,ww(rr) / XOR r,-(rr) - 8,13,11,15,13 cycles - Flagsaffected: -ZS0---- */
+case 0x37: /* XOR? r,@rr / XOR r,(rr)+ / XOR r,@ww / XOR r,ww(rr) / XOR r,-(rr) - 8,13,11,15,13 cycles - Flagsaffected: -ZS0---- */
ARG_rmw;
OP_XOR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, s2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x38: /* MOV r,@rr / MOV r,(rr)+ / MOV r,@ww / MOV r,ww(rr) / MOV r,-(rr) - 8,13,11,15,13 cycles - Flags affected: -------- */
+case 0x38: /* MOV r,@rr / MOV r,(rr)+ / MOV r,@ww / MOV r,ww(rr) / MOV r,-(rr) - 8,13,11,15,13 cycles - Flags affected: -------- */
ARG_rmw;
sm85cpu_mem_writebyte( cpustate, r1, sm85cpu_mem_readbyte( cpustate, s2 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x39: /* MOV @rr,r / MOV (rr)+,r / MOV @ww,r / MOV ww(rr),r / MOV -(rr),r - 8,13,11,15,13 cycles - Flags affected: -------- */
+case 0x39: /* MOV @rr,r / MOV (rr)+,r / MOV @ww,r / MOV ww(rr),r / MOV -(rr),r - 8,13,11,15,13 cycles - Flags affected: -------- */
ARG_rmw;
sm85cpu_mem_writebyte( cpustate, s2, sm85cpu_mem_readbyte( cpustate, r1 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 8; break;
- case 0x40: mycycles += 13; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
- case 0xC0: mycycles += 13; break;
+ case 0x00: mycycles += 8; break;
+ case 0x40: mycycles += 13; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 11 : 15 ); break;
+ case 0xC0: mycycles += 13; break;
}
break;
-case 0x3A: /* MOVW rr,@rr / MOV rr,(rr)+ / MOV rr,@ww / MOV rr,ww(rr) / MOV rr,-(rr) - 11,16,14,18,16 cycles - Flags affected: -------- */
+case 0x3A: /* MOVW rr,@rr / MOV rr,(rr)+ / MOV rr,@ww / MOV rr,ww(rr) / MOV rr,-(rr) - 11,16,14,18,16 cycles - Flags affected: -------- */
ARG_smw;
sm85cpu_mem_writeword( cpustate, r1, sm85cpu_mem_readword( cpustate, s2 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 11; break;
- case 0x40: mycycles += 16; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 18 : 14 ); break;
- case 0xC0: mycycles += 16; break;
+ case 0x00: mycycles += 11; break;
+ case 0x40: mycycles += 16; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 18 : 14 ); break;
+ case 0xC0: mycycles += 16; break;
}
break;
-case 0x3B: /* MOVW @rr,rr / MOV (rr)+,rr / MOV @ww,rr / MOV ww(rr),rr / MOV -(rr),rr - 11,16,14,18,16 cycles - Flags affected: -------- */
+case 0x3B: /* MOVW @rr,rr / MOV (rr)+,rr / MOV @ww,rr / MOV ww(rr),rr / MOV -(rr),rr - 11,16,14,18,16 cycles - Flags affected: -------- */
ARG_smw;
sm85cpu_mem_writeword( cpustate, s2, sm85cpu_mem_readword( cpustate, r1 ) );
switch( r2 & 0xC0 ) {
- case 0x00: mycycles += 11; break;
- case 0x40: mycycles += 16; break;
- case 0x80: mycycles += ( ( r2 & 0x07 ) ? 18 : 14 ); break;
- case 0xC0: mycycles += 16; break;
+ case 0x00: mycycles += 11; break;
+ case 0x40: mycycles += 16; break;
+ case 0x80: mycycles += ( ( r2 & 0x07 ) ? 18 : 14 ); break;
+ case 0xC0: mycycles += 16; break;
}
break;
-case 0x3C: /* MOVW RRr,RRs - 7 cycles - Flags affected: -------- */
+case 0x3C: /* MOVW RRr,RRs - 7 cycles - Flags affected: -------- */
ARG_ss;
sm85cpu_mem_writeword( cpustate, r1, sm85cpu_mem_readword( cpustate, r2 ) );
mycycles += 7;
break;
-case 0x3D: /* unk3D DM??? 3D 0E -> DM R0Eh ?? - 4,4 cycles */
+case 0x3D: /* unk3D DM??? 3D 0E -> DM R0Eh ?? - 4,4 cycles */
logerror( "%04X: unk%02x\n", cpustate->PC-1,op );
mycycles += 4;
break;
-case 0x3E: /* JMP RRr/@ww/ww(RRr) - 7/15/19 cycles - Flags affected: -------- */
+case 0x3E: /* JMP RRr/@ww/ww(RRr) - 7/15/19 cycles - Flags affected: -------- */
ARG_2;
cpustate->PC = s2;
switch( r1 & 0xc0 ) {
- case 0x00: mycycles += 7; break;
- case 0x40: mycycles += ( ( r1 & 0x38 ) ? 19 : 15 ); break;
- default: mycycles += 4;
+ case 0x00: mycycles += 7; break;
+ case 0x40: mycycles += ( ( r1 & 0x38 ) ? 19 : 15 ); break;
+ default: mycycles += 4;
}
break;
-case 0x3F: /* CALL RRr/@ww/ww(RRr) - 11,14/22,19/26,23 cycles - Flags affected: -------- */
+case 0x3F: /* CALL RRr/@ww/ww(RRr) - 11,14/22,19/26,23 cycles - Flags affected: -------- */
ARG_2;
PUSH8( cpustate->PC & 0xFF );
PUSH8( cpustate->PC >> 8 );
cpustate->PC = s2;
switch( r1 & 0xc0 ) {
- case 0x00: mycycles += ( ( cpustate->SYS & 0x40 ) ? 14 : 11 ); break;
- case 0x40: mycycles += ( ( r1 & 0x38 ) ? ( ( cpustate->SYS & 0x40 ) ? 26 : 23 ) : ( ( cpustate->SYS & 0x40 ) ? 22 : 19 ) );break;
- default: mycycles += 4;
+ case 0x00: mycycles += ( ( cpustate->SYS & 0x40 ) ? 14 : 11 ); break;
+ case 0x40: mycycles += ( ( r1 & 0x38 ) ? ( ( cpustate->SYS & 0x40 ) ? 26 : 23 ) : ( ( cpustate->SYS & 0x40 ) ? 22 : 19 ) );break;
+ default: mycycles += 4;
}
break;
-case 0x40: /* CMP Rr,Rs - 6 cycles - Flags affected: CZSV---- */
+case 0x40: /* CMP Rr,Rs - 6 cycles - Flags affected: CZSV---- */
ARG_RR;
OP_CMP8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
mycycles += 6;
break;
-case 0x41: /* ADD Rr,Rs - 6 cycles - Flags affected: CZSV0H-- */
+case 0x41: /* ADD Rr,Rs - 6 cycles - Flags affected: CZSV0H-- */
ARG_RR;
OP_ADD8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x42: /* SUB Rr,Rs - 6 cycles - Flags affected: CZSV1H-- */
+case 0x42: /* SUB Rr,Rs - 6 cycles - Flags affected: CZSV1H-- */
ARG_RR;
OP_SUB8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x43: /* ADC Rr,Rs - 6 cycles - Flags affected: CZSV0H-- */
+case 0x43: /* ADC Rr,Rs - 6 cycles - Flags affected: CZSV0H-- */
ARG_RR;
OP_ADC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x44: /* SBC Rr,Rs - 6 cycles - Flags affected: CZSV1H-- */
+case 0x44: /* SBC Rr,Rs - 6 cycles - Flags affected: CZSV1H-- */
ARG_RR;
OP_SBC8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x45: /* AND Rr,Rs - 6 cycles - Flags affected: -ZS0---- */
+case 0x45: /* AND Rr,Rs - 6 cycles - Flags affected: -ZS0---- */
ARG_RR;
OP_AND8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x46: /* OR Rr,Rs - 6 cycles - Flags affected: -ZS0---- */
+case 0x46: /* OR Rr,Rs - 6 cycles - Flags affected: -ZS0---- */
ARG_RR;
OP_OR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x47: /* XOR Rr,Rs - 6 cycles - Flags affected: -ZS0---- */
+case 0x47: /* XOR Rr,Rs - 6 cycles - Flags affected: -ZS0---- */
ARG_RR;
OP_XOR8( sm85cpu_mem_readbyte( cpustate, r1 ), sm85cpu_mem_readbyte( cpustate, r2 ) );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x48: /* MOV Rr,Rs - 6 cycles - Flags affected: -------- */
+case 0x48: /* MOV Rr,Rs - 6 cycles - Flags affected: -------- */
ARG_RR;
sm85cpu_mem_writebyte( cpustate, r1, sm85cpu_mem_readbyte( cpustate, r2 ) );
mycycles += 6;
break;
-case 0x49: /* CALL ad16 - 12,10 - Flags affected: -------- */
+case 0x49: /* CALL ad16 - 12,10 - Flags affected: -------- */
ARG_ad16;
PUSH8( cpustate->PC & 0xFF );
PUSH8( cpustate->PC >> 8 );
cpustate->PC = s2;
mycycles += ( ( cpustate->SYS & 0x40 ) ? 12 : 10 );
break;
-case 0x4A: /* MOVW RRr,RRs - 8 cycles - Flags affected: -------- */
+case 0x4A: /* MOVW RRr,RRs - 8 cycles - Flags affected: -------- */
ARG_RR;
sm85cpu_mem_writeword( cpustate, r1, sm85cpu_mem_readword( cpustate, r2 ) );
mycycles += 8;
break;
-case 0x4B: /* MOVW RRr,ww - 9 cycles - Flags affected: -------- */
+case 0x4B: /* MOVW RRr,ww - 9 cycles - Flags affected: -------- */
ARG_Sw;
sm85cpu_mem_writeword( cpustate, r1, s2 );
- mycycles += 9;
+ mycycles += 9;
break;
-case 0x4C: /* MULT Rrr,Rs - 24 cycles - Flags affected: -Z-0---- */
+case 0x4C: /* MULT Rrr,Rs - 24 cycles - Flags affected: -Z-0---- */
ARG_RR;
res = sm85cpu_mem_readword( cpustate, r1 ) * sm85cpu_mem_readbyte( cpustate, r2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
@@ -1151,7 +1151,7 @@ case 0x4C: /* MULT Rrr,Rs - 24 cycles - Flags affected: -Z-0---- */
cpustate->PS1 |= ( ( res & 0xFFFF ) == 0x00 ? FLAG_Z : 0 );
mycycles += 24;
break;
-case 0x4D: /* MULT RRr,i - 24 cycles - Flags affected: -Z-0---- */
+case 0x4D: /* MULT RRr,i - 24 cycles - Flags affected: -Z-0---- */
ARG_iR;
res = sm85cpu_mem_readbyte( cpustate, r1 + 1 ) * r2;
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
@@ -1159,7 +1159,7 @@ case 0x4D: /* MULT RRr,i - 24 cycles - Flags affected: -Z-0---- */
cpustate->PS1 |= ( ( res & 0xFFFF ) == 0x00 ? FLAG_Z : 0 );
mycycles += 24;
break;
-case 0x4E: /* BMOV Rr,#b,BF/BF,Rr,#b - 6 cycles - Flags affected: --------/-Z-0--B- */
+case 0x4E: /* BMOV Rr,#b,BF/BF,Rr,#b - 6 cycles - Flags affected: --------/-Z-0--B- */
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
switch( r2 & 0xC0 ) {
@@ -1186,7 +1186,7 @@ case 0x4E: /* BMOV Rr,#b,BF/BF,Rr,#b - 6 cycles - Flags affected: --------/-Z-0-
}
mycycles += 6;
break;
-case 0x4F: /* BCMP/BAND/BOR/BXOR BF,Rr,#b - 6 cycles - Flags affected: -Z-0---- / -Z-0--B- */
+case 0x4F: /* BCMP/BAND/BOR/BXOR BF,Rr,#b - 6 cycles - Flags affected: -Z-0---- / -Z-0--B- */
r2 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
r1 = sm85cpu_mem_readbyte( cpustate, cpustate->PC++ );
s1 = sm85cpu_mem_readbyte( cpustate, r1 ) & ( 1 << ( r2 & 0x07 ) );
@@ -1213,68 +1213,68 @@ case 0x4F: /* BCMP/BAND/BOR/BXOR BF,Rr,#b - 6 cycles - Flags affected: -Z-0----
}
mycycles += 6;
break;
-case 0x50: /* CMP Rr,i - 6 cycles - Flags affected: CZSV---- */
+case 0x50: /* CMP Rr,i - 6 cycles - Flags affected: CZSV---- */
ARG_iR;
OP_CMP8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
mycycles += 6;
break;
-case 0x51: /* ADD Rr,i - 6 cycles - Flags affected: CZSV0H-- */
+case 0x51: /* ADD Rr,i - 6 cycles - Flags affected: CZSV0H-- */
ARG_iR;
OP_ADD8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x52: /* SUB Rr,i - 6 cycles - Flags affected: CZSV1H-- */
+case 0x52: /* SUB Rr,i - 6 cycles - Flags affected: CZSV1H-- */
ARG_iR;
OP_SUB8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x53: /* ADC Rr,i - 6 cycles - Flags affected: CZSV0H-- */
+case 0x53: /* ADC Rr,i - 6 cycles - Flags affected: CZSV0H-- */
ARG_iR;
OP_ADC8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x54: /* SBC Rr,i - 6 cycles - Flags affected: CZSV1H-- */
+case 0x54: /* SBC Rr,i - 6 cycles - Flags affected: CZSV1H-- */
ARG_iR;
OP_SBC8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x55: /* AND Rr,i - 6 cycles - Flags affected: -ZS0---- */
+case 0x55: /* AND Rr,i - 6 cycles - Flags affected: -ZS0---- */
ARG_iR;
OP_AND8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x56: /* OR Rr,i - 6 cycles - Flags affected: -ZS0---- */
+case 0x56: /* OR Rr,i - 6 cycles - Flags affected: -ZS0---- */
ARG_iR;
OP_OR8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x57: /* XOR Rr,i - 6 cycles - Flags affected: -ZS0---- */
+case 0x57: /* XOR Rr,i - 6 cycles - Flags affected: -ZS0---- */
ARG_iR;
OP_XOR8( sm85cpu_mem_readbyte( cpustate, r1 ), r2 );
sm85cpu_mem_writebyte( cpustate, r1, res & 0xFF );
mycycles += 6;
break;
-case 0x58: /* MOV Rr,i - 6 cycles - Flags affected: -------- */
+case 0x58: /* MOV Rr,i - 6 cycles - Flags affected: -------- */
ARG_iR;
sm85cpu_mem_writebyte( cpustate, r1, r2 );
- mycycles += 6;
+ mycycles += 6;
break;
-case 0x59: /* Invalid - 2? cycles - Flags affected: --------? */
+case 0x59: /* Invalid - 2? cycles - Flags affected: --------? */
logerror( "%04X: 59h: Invalid instruction\n", cpustate->PC-1 );
mycycles += 2;
break;
-case 0x5A: /* unk5A - 7,8,12,9,8 cycles */
+case 0x5A: /* unk5A - 7,8,12,9,8 cycles */
logerror( "%04X: unk%02x\n", cpustate->PC-1,op );
ARG_ad16;
mycycles += 7;
break;
-case 0x5B: /* unk5B - 6,7,11,8,7 cycles */
+case 0x5B: /* unk5B - 6,7,11,8,7 cycles */
logerror( "%04X: unk%02x\n", cpustate->PC-1,op );
/* NOTE: This unknown command is used in several carts, the code below allows those carts to boot */
ARG_iR;
@@ -1283,7 +1283,7 @@ logerror( "%04X: unk%02x\n", cpustate->PC-1,op );
sm85cpu_mem_writebyte( cpustate, r1, res );
mycycles += 6;
break;
-case 0x5C: /* DIV RRr,RRs - 47 cycles - Flags affected: -Z-V---- */
+case 0x5C: /* DIV RRr,RRs - 47 cycles - Flags affected: -Z-V---- */
/* lower 8 bits of RRs is used to divide */
/* remainder in stored upper 8 bits of RRs */
logerror( "%04X: DIV RRr,Rs!\n", cpustate->PC-1 );
@@ -1301,7 +1301,7 @@ logerror( "%04X: DIV RRr,Rs!\n", cpustate->PC-1 );
}
mycycles += 47;
break;
-case 0x5D: /* DIV RRr,i - 44 cycles - Flags affected: -Z-V---- */
+case 0x5D: /* DIV RRr,i - 44 cycles - Flags affected: -Z-V---- */
logerror( "%04X: DIV RRr,i!\n", cpustate->PC-1 );
ARG_iR;
cpustate->PS1 = cpustate->PS1 & ~ ( FLAG_Z | FLAG_V );
@@ -1314,111 +1314,111 @@ logerror( "%04X: DIV RRr,i!\n", cpustate->PC-1 );
}
mycycles += 44;
break;
-case 0x5E: /* MOVM Rr,i,Rs - 9 cycles - Flags affected: -------- */
+case 0x5E: /* MOVM Rr,i,Rs - 9 cycles - Flags affected: -------- */
ARG_RiR;
sm85cpu_mem_writebyte( cpustate, r1, ( sm85cpu_mem_readbyte( cpustate, r1 ) & d1 ) | sm85cpu_mem_readbyte( cpustate, r2 ) );
mycycles += 9;
break;
-case 0x5F: /* MOVM Rr,i,j - 8 cycles - Flags affected: -------- */
+case 0x5F: /* MOVM Rr,i,j - 8 cycles - Flags affected: -------- */
ARG_Rii;
sm85cpu_mem_writebyte( cpustate, r1, ( sm85cpu_mem_readbyte( cpustate, r1 ) & d1 ) | r2 );
mycycles += 8;
break;
-case 0x60: /* CMPW RRr,RRs - 9 cycles - Flags affected: CZSV---- */
+case 0x60: /* CMPW RRr,RRs - 9 cycles - Flags affected: CZSV---- */
ARG_RR;
OP_CMP16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
mycycles += 9;
break;
-case 0x61: /* ADDW RRr,RRs - 10 cycles - Flags affected: CZSV0H-- */
+case 0x61: /* ADDW RRr,RRs - 10 cycles - Flags affected: CZSV0H-- */
ARG_RR;
OP_ADD16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x62: /* SUBW RRr,RRs - 10 cycles - Flags affected: CZSV1H-- */
+case 0x62: /* SUBW RRr,RRs - 10 cycles - Flags affected: CZSV1H-- */
ARG_RR;
OP_SUB16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x63: /* ADCW RRr,RRs - 10 cycles - Flags affected: CZSV0H-- */
+case 0x63: /* ADCW RRr,RRs - 10 cycles - Flags affected: CZSV0H-- */
ARG_RR;
OP_ADC16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x64: /* SBCW RRr,RRs - 10 cycles - Flags affected: CZSV1H-- */
+case 0x64: /* SBCW RRr,RRs - 10 cycles - Flags affected: CZSV1H-- */
ARG_RR;
OP_SBC16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x65: /* ANDW RRr,RRs - 14 cycles - Flags affected: -Z-0---- */
+case 0x65: /* ANDW RRr,RRs - 14 cycles - Flags affected: -Z-0---- */
ARG_RR;
OP_AND16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 14;
break;
-case 0x66: /* ORW RRr,RRs - 14 cycles - Flags affected: -Z-0---- */
+case 0x66: /* ORW RRr,RRs - 14 cycles - Flags affected: -Z-0---- */
ARG_RR;
OP_OR16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 14;
break;
-case 0x67: /* XORW RRr,RRs - 14 cycles - Flags affected: -Z-0---- */
+case 0x67: /* XORW RRr,RRs - 14 cycles - Flags affected: -Z-0---- */
ARG_RR;
OP_XOR16( sm85cpu_mem_readword( cpustate, r1 ), sm85cpu_mem_readword( cpustate, r2 ) );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 14;
break;
-case 0x68: /* CMPW RRr,w - 9 cycles - Flags affected: CZSV---- */
+case 0x68: /* CMPW RRr,w - 9 cycles - Flags affected: CZSV---- */
ARG_Sw;
OP_CMP16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
mycycles += 9;
break;
-case 0x69: /* ADDW RRr,w - 10 cycles - Flags affected: CZSV0H-- */
+case 0x69: /* ADDW RRr,w - 10 cycles - Flags affected: CZSV0H-- */
ARG_Sw;
OP_ADD16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x6A: /* SUBW RRr,w - 10 cycles - Flags affected: CZSV1H-- */
+case 0x6A: /* SUBW RRr,w - 10 cycles - Flags affected: CZSV1H-- */
ARG_Sw;
OP_SUB16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x6B: /* ADCW RRr,w - 10 cycles - Flags affected: CZSV0H-- */
+case 0x6B: /* ADCW RRr,w - 10 cycles - Flags affected: CZSV0H-- */
ARG_Sw;
OP_ADC16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x6C: /* SBCW RRr,w - 10 cycles - Flags affected: CZSV1H-- */
+case 0x6C: /* SBCW RRr,w - 10 cycles - Flags affected: CZSV1H-- */
ARG_Sw;
OP_SBC16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 10;
break;
-case 0x6D: /* ANDW RRr,w - 13 cycles - Flags affected: -Z-0---- */
+case 0x6D: /* ANDW RRr,w - 13 cycles - Flags affected: -Z-0---- */
ARG_Sw;
OP_AND16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 13;
break;
-case 0x6E: /* ORW RRr,w - 13 cycles - Flags affected: -Z-0---- */
+case 0x6E: /* ORW RRr,w - 13 cycles - Flags affected: -Z-0---- */
ARG_Sw;
OP_OR16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF );
mycycles += 13;
break;
-case 0x6F: /* XORW RRr,w - 13 cycles - Flags affected: -Z-0---- */
+case 0x6F: /* XORW RRr,w - 13 cycles - Flags affected: -Z-0---- */
ARG_Sw;
OP_XOR16( sm85cpu_mem_readword( cpustate, r1 ), s2 );
sm85cpu_mem_writeword( cpustate, r1, res & 0xFFFF);
mycycles += 13;
break;
-case 0x70: /* DBNZ r,rel8 - 10,6 cycles - Flags affected: -------- */
+case 0x70: /* DBNZ r,rel8 - 10,6 cycles - Flags affected: -------- */
case 0x71:
case 0x72:
case 0x73:
@@ -1437,7 +1437,7 @@ case 0x77:
mycycles += 6;
}
break;
-case 0x78: /* MOVW RRx,w - 6 cycles - Flags affected: -------- */
+case 0x78: /* MOVW RRx,w - 6 cycles - Flags affected: -------- */
case 0x79:
case 0x7A:
case 0x7B:
@@ -1447,9 +1447,9 @@ case 0x7E:
case 0x7F:
ARG_rrw;
sm85cpu_mem_writeword( cpustate, r1, s2 );
- mycycles += 6;
+ mycycles += 6;
break;
-case 0x80: /* BBC R,#b,d8 - 10,6 cycles - Flags affected: -------- */
+case 0x80: /* BBC R,#b,d8 - 10,6 cycles - Flags affected: -------- */
case 0x81:
case 0x82:
case 0x83:
@@ -1465,7 +1465,7 @@ case 0x87:
mycycles += 6;
}
break;
-case 0x88: /* BBS R,#b,d8 - 10,6 cycles - Flags affected: -------- */
+case 0x88: /* BBS R,#b,d8 - 10,6 cycles - Flags affected: -------- */
case 0x89:
case 0x8A:
case 0x8B:
@@ -1481,7 +1481,7 @@ case 0x8F:
mycycles += 6;
}
break;
-case 0x90: /* JMP cc,ad16 - 6 cycles - Flags affected: -------- */
+case 0x90: /* JMP cc,ad16 - 6 cycles - Flags affected: -------- */
case 0x91:
case 0x92:
case 0x93:
@@ -1504,7 +1504,7 @@ case 0x9F:
}
mycycles += 6;
break;
-case 0xA0: /* BCLR R,#b - 4 cycles - Flags affected: -------- */
+case 0xA0: /* BCLR R,#b - 4 cycles - Flags affected: -------- */
case 0xA1:
case 0xA2:
case 0xA3:
@@ -1516,7 +1516,7 @@ case 0xA7:
sm85cpu_mem_writebyte( cpustate, r1, sm85cpu_mem_readbyte( cpustate, r1 ) & ~ ( 1 << (op & 0x07) ) );
mycycles += 4;
break;
-case 0xA8: /* BSET R,#b - 4 cycles - Flags affected: -------- */
+case 0xA8: /* BSET R,#b - 4 cycles - Flags affected: -------- */
case 0xA9:
case 0xAA:
case 0xAB:
@@ -1528,7 +1528,7 @@ case 0xAF:
sm85cpu_mem_writebyte( cpustate, r1, sm85cpu_mem_readbyte( cpustate, r1 ) | ( 1 << (op & 0x07) ) );
mycycles += 4;
break;
-case 0xB0: /* MOV Rx,Rr - 4 cycles - Flags affected: -------- */
+case 0xB0: /* MOV Rx,Rr - 4 cycles - Flags affected: -------- */
case 0xB1:
case 0xB2:
case 0xB3:
@@ -1540,7 +1540,7 @@ case 0xB7:
sm85cpu_mem_writebyte( cpustate, r1, sm85cpu_mem_readbyte( cpustate, r2 ) );
mycycles += 4;
break;
-case 0xB8: /* MOV Rr,Rx - 4 cycles - Flags affected: -------- */
+case 0xB8: /* MOV Rr,Rx - 4 cycles - Flags affected: -------- */
case 0xB9:
case 0xBA:
case 0xBB:
@@ -1552,7 +1552,7 @@ case 0xBF:
sm85cpu_mem_writebyte( cpustate, r2, sm85cpu_mem_readbyte( cpustate, r1 ) );
mycycles += 4;
break;
-case 0xC0: /* MOV Rx,i - 4 cycles - Flags affected: -------- */
+case 0xC0: /* MOV Rx,i - 4 cycles - Flags affected: -------- */
case 0xC1:
case 0xC2:
case 0xC3:
@@ -1562,9 +1562,9 @@ case 0xC6:
case 0xC7:
ARG_ri;
sm85cpu_mem_writebyte( cpustate, r1, r2 );
- mycycles += 4;
+ mycycles += 4;
break;
-case 0xC8: /* MOV IE0/IE1/IR0/IR1/P0/P1/P2/P3,i - 4 cycles - Flags affected: -------- */
+case 0xC8: /* MOV IE0/IE1/IR0/IR1/P0/P1/P2/P3,i - 4 cycles - Flags affected: -------- */
case 0xC9:
case 0xCA:
case 0xCB:
@@ -1576,7 +1576,7 @@ case 0xCF:
sm85cpu_mem_writebyte( cpustate, r1, r2 );
mycycles += 4;
break;
-case 0xD0: /* BR cc,rel8 - 8,4 cycles - Flags affected: -------- */
+case 0xD0: /* BR cc,rel8 - 8,4 cycles - Flags affected: -------- */
case 0xD1:
case 0xD2:
case 0xD3:
@@ -1601,7 +1601,7 @@ case 0xDF:
mycycles += 4;
}
break;
-case 0xE0: /* CALS - 12,9 cycles */
+case 0xE0: /* CALS - 12,9 cycles */
case 0xE1:
case 0xE2:
case 0xE3:
@@ -1616,7 +1616,7 @@ case 0xEB:
case 0xEC:
case 0xED:
case 0xEE:
-case 0xEF: /* CALS 1xWW - 12,9 cycles - Flags affected: -------- */
+case 0xEF: /* CALS 1xWW - 12,9 cycles - Flags affected: -------- */
ARG_R;
s2 = 0x1000 + ( ( op & 0x0F ) << 8 ) + r1;
PUSH8( cpustate->PC & 0xFF );
@@ -1624,7 +1624,7 @@ case 0xEF: /* CALS 1xWW - 12,9 cycles - Flags affected: -------- */
cpustate->PC = s2;
mycycles += ( ( cpustate->SYS & 0x40 ) ? 12 : 9 );
break;
-case 0xF0: /* STOP - 2 cycles - Flags affected: -------- */
+case 0xF0: /* STOP - 2 cycles - Flags affected: -------- */
mycycles += 2;
if ( cpustate->clock_changed ) {
/* TODO: Set system clock divider */
@@ -1632,11 +1632,11 @@ case 0xF0: /* STOP - 2 cycles - Flags affected: -------- */
cpustate->clock_changed = 0;
}
break;
-case 0xF1: /* HALT - 2 cycles - Flags affected: -------- */
+case 0xF1: /* HALT - 2 cycles - Flags affected: -------- */
cpustate->halted = 1;
mycycles += 2;
break;
-case 0xF2: /* Invalid - 2? cycles - Flags affected: --------? */
+case 0xF2: /* Invalid - 2? cycles - Flags affected: --------? */
case 0xF3:
case 0xF4:
case 0xF5:
@@ -1644,43 +1644,42 @@ case 0xF6:
case 0xF7:
mycycles += 2;
break;
-case 0xF8: /* RET - 10,8 cycles - Flags affected: -------- */
+case 0xF8: /* RET - 10,8 cycles - Flags affected: -------- */
POP8( r1 );
POP8( r2 );
cpustate->PC = ( r1 << 8 ) | r2;
mycycles += ( ( cpustate->SYS & 0x40 ) ? 10 : 8 );
break;
-case 0xF9: /* IRET - 12,10 cycles - Flags affected: CZSVDHBI */
+case 0xF9: /* IRET - 12,10 cycles - Flags affected: CZSVDHBI */
POP8( cpustate->PS1 );
POP8( r1 );
POP8( r2 );
cpustate->PC = ( r1 << 8 ) | r2;
mycycles += ( ( cpustate->SYS & 0x40 ) ? 12 : 10 );
break;
-case 0xFA: /* CLRC - 2 cycles - Flags affected: C------- */
+case 0xFA: /* CLRC - 2 cycles - Flags affected: C------- */
cpustate->PS1 = cpustate->PS1 & ~ ( FLAG_C );
mycycles += 2;
break;
-case 0xFB: /* COMC - 2 cycles - Flags affected: C------- */
+case 0xFB: /* COMC - 2 cycles - Flags affected: C------- */
cpustate->PS1 = cpustate->PS1 ^ FLAG_C;
mycycles += 2;
break;
-case 0xFC: /* SETC - 2 cycles - Flags affected: C------- */
+case 0xFC: /* SETC - 2 cycles - Flags affected: C------- */
cpustate->PS1 = cpustate->PS1 | FLAG_C;
mycycles += 2;
break;
-case 0xFD: /* EI - 2 cycles - Flags affected: -------I */
+case 0xFD: /* EI - 2 cycles - Flags affected: -------I */
cpustate->PS1 = cpustate->PS1 | FLAG_I;
- mycycles += 2;
+ mycycles += 2;
break;
-case 0xFE: /* DI - 2 cycles - Flags affected: -------I */
+case 0xFE: /* DI - 2 cycles - Flags affected: -------I */
cpustate->PS1 = cpustate->PS1 & ~ ( FLAG_I );
- mycycles += 2;
+ mycycles += 2;
break;
-case 0xFF: /* NOP - 2 cycles - Flags affected: -------- */
+case 0xFF: /* NOP - 2 cycles - Flags affected: -------- */
mycycles += 2;
break;
default:
mycycles += 2;
break;
-
diff --git a/src/emu/cpu/spc700/spc700.c b/src/emu/cpu/spc700/spc700.c
index e1267e57d33..ce2ae1ab0e5 100644
--- a/src/emu/cpu/spc700/spc700.c
+++ b/src/emu/cpu/spc700/spc700.c
@@ -68,28 +68,28 @@ Address Function Register R/W When Reset Remarks
/* CPU Structure */
struct spc700i_cpu
{
- uint a; /* Accumulator */
- uint x; /* Index Register X */
- uint y; /* Index Register Y */
- uint s; /* Stack Pointer */
- uint pc; /* Program Counter */
- uint ppc; /* Previous Program Counter */
- uint flag_n; /* Negative Flag */
- uint flag_z; /* Zero flag */
- uint flag_v; /* Overflow Flag */
- uint flag_p; /* Direct Page Flag */
- uint flag_b; /* BRK Instruction Flag */
- uint flag_h; /* Half-carry Flag */
- uint flag_i; /* Interrupt Mask Flag */
- uint flag_c; /* Carry Flag */
- uint line_irq; /* Status of the IRQ line */
- uint line_nmi; /* Status of the NMI line */
- uint line_rst; /* Status of the RESET line */
- uint ir; /* Instruction Register */
+ uint a; /* Accumulator */
+ uint x; /* Index Register X */
+ uint y; /* Index Register Y */
+ uint s; /* Stack Pointer */
+ uint pc; /* Program Counter */
+ uint ppc; /* Previous Program Counter */
+ uint flag_n; /* Negative Flag */
+ uint flag_z; /* Zero flag */
+ uint flag_v; /* Overflow Flag */
+ uint flag_p; /* Direct Page Flag */
+ uint flag_b; /* BRK Instruction Flag */
+ uint flag_h; /* Half-carry Flag */
+ uint flag_i; /* Interrupt Mask Flag */
+ uint flag_c; /* Carry Flag */
+ uint line_irq; /* Status of the IRQ line */
+ uint line_nmi; /* Status of the NMI line */
+ uint line_rst; /* Status of the RESET line */
+ uint ir; /* Instruction Register */
device_irq_acknowledge_callback int_ack;
legacy_cpu_device *device;
address_space *program;
- uint stopped; /* stopped status */
+ uint stopped; /* stopped status */
int ICount;
uint source;
uint destination;
@@ -135,85 +135,85 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
/* ======================================================================== */
/* Bits */
-#define BIT_0 0x01
-#define BIT_1 0x02
-#define BIT_2 0x04
-#define BIT_3 0x08
-#define BIT_4 0x10
-#define BIT_5 0x20
-#define BIT_6 0x40
-#define BIT_7 0x80
-#define BIT_8 0x100
+#define BIT_0 0x01
+#define BIT_1 0x02
+#define BIT_2 0x04
+#define BIT_3 0x08
+#define BIT_4 0x10
+#define BIT_5 0x20
+#define BIT_6 0x40
+#define BIT_7 0x80
+#define BIT_8 0x100
/* Flag positions in Processor Status Register */
-#define FLAGPOS_N BIT_7 /* Negative */
-#define FLAGPOS_V BIT_6 /* Overflow */
-#define FLAGPOS_P BIT_5 /* Direct Page Selector */
-#define FLAGPOS_B BIT_4 /* Break */
-#define FLAGPOS_H BIT_3 /* Half-carry */
-#define FLAGPOS_I BIT_2 /* Interrupt */
-#define FLAGPOS_Z BIT_1 /* Zero */
-#define FLAGPOS_C BIT_0 /* Carry */
-
-#define NFLAG_SET FLAGPOS_N
-#define VFLAG_SET BIT_7
-#define PFLAG_SET BIT_8
-#define BFLAG_SET FLAGPOS_B
-#define HFLAG_SET BIT_3
-#define IFLAG_SET FLAGPOS_I
-#define ZFLAG_SET 0
-#define CFLAG_SET BIT_8
-#define NZFLAG_CLEAR 1
-#define VFLAG_CLEAR 0
-#define PFLAG_CLEAR 0
-#define BFLAG_CLEAR 0
-#define HFLAG_CLEAR 0
-#define IFLAG_CLEAR 0
-#define CFLAG_CLEAR 0
-
-#define NMI_SET 1
-#define NMI_CLEAR 0
-#define IRQ_SET IFLAG_CLEAR
-#define IRQ_CLEAR IFLAG_SET
-
-#define STACK_PAGE 0x100 /* Stack Page Offset */
-
-#define VECTOR_RST 0xfffe /* Reset */
-#define VECTOR_BRK 0xffde /* Break Instruction */
-#define VECTOR_IRQ 0xfffc /* IRQ ??? what is real vector? */
-#define VECTOR_NMI 0xfffa /* NMI ??? what is real vector? */
-
-#define REG_A cpustate->a /* Accumulator */
-#define REG_X cpustate->x /* Index X Register */
-#define REG_Y cpustate->y /* Index Y Register */
-#define REG_S cpustate->s /* Stack Pointer */
-#define REG_PC cpustate->pc /* Program Counter */
-#define REG_PPC cpustate->ppc /* Previous Program Counter */
-#define REG_P cpustate->p /* Processor Status Register */
-#define FLAG_NZ cpustate->flag_n = cpustate->flag_z /* Negative Flag and inverted Zero flag */
-#define FLAG_N cpustate->flag_n /* Negative flag */
-#define FLAG_Z cpustate->flag_z /* Inverted Zero flag */
-#define FLAG_V cpustate->flag_v /* Overflow Flag */
-#define FLAG_P cpustate->flag_p /* Direct Page Flag */
-#define FLAG_B cpustate->flag_b /* BRK Instruction Flag */
-#define FLAG_H cpustate->flag_h /* Decimal Mode Flag */
-#define FLAG_I cpustate->flag_i /* Interrupt Mask Flag */
-#define FLAG_C cpustate->flag_c /* Carry Flag */
-#define LINE_IRQ cpustate->line_irq /* Status of the IRQ line */
-#define LINE_NMI cpustate->line_nmi /* Status of the NMI line */
-#define REG_IR cpustate->ir /* Instruction Register */
-#define INT_ACK cpustate->int_ack /* Interrupt Acknowledge function pointer */
-#define CLOCKS cpustate->ICount /* Clock cycles remaining */
-#define CPU_STOPPED cpustate->stopped /* Stopped status */
-
-#define SRC cpustate->source /* Source Operand */
-#define DST cpustate->destination /* Destination Operand */
-#define TMP1 cpustate->temp1 /* temporary result 1 */
-#define TMP2 cpustate->temp2 /* temporary result 2 */
-#define TMP3 cpustate->temp3 /* temporary result 3 */
-
-#define STOP_LEVEL_STOP 1
-#define STOP_LEVEL_SLEEP 2
+#define FLAGPOS_N BIT_7 /* Negative */
+#define FLAGPOS_V BIT_6 /* Overflow */
+#define FLAGPOS_P BIT_5 /* Direct Page Selector */
+#define FLAGPOS_B BIT_4 /* Break */
+#define FLAGPOS_H BIT_3 /* Half-carry */
+#define FLAGPOS_I BIT_2 /* Interrupt */
+#define FLAGPOS_Z BIT_1 /* Zero */
+#define FLAGPOS_C BIT_0 /* Carry */
+
+#define NFLAG_SET FLAGPOS_N
+#define VFLAG_SET BIT_7
+#define PFLAG_SET BIT_8
+#define BFLAG_SET FLAGPOS_B
+#define HFLAG_SET BIT_3
+#define IFLAG_SET FLAGPOS_I
+#define ZFLAG_SET 0
+#define CFLAG_SET BIT_8
+#define NZFLAG_CLEAR 1
+#define VFLAG_CLEAR 0
+#define PFLAG_CLEAR 0
+#define BFLAG_CLEAR 0
+#define HFLAG_CLEAR 0
+#define IFLAG_CLEAR 0
+#define CFLAG_CLEAR 0
+
+#define NMI_SET 1
+#define NMI_CLEAR 0
+#define IRQ_SET IFLAG_CLEAR
+#define IRQ_CLEAR IFLAG_SET
+
+#define STACK_PAGE 0x100 /* Stack Page Offset */
+
+#define VECTOR_RST 0xfffe /* Reset */
+#define VECTOR_BRK 0xffde /* Break Instruction */
+#define VECTOR_IRQ 0xfffc /* IRQ ??? what is real vector? */
+#define VECTOR_NMI 0xfffa /* NMI ??? what is real vector? */
+
+#define REG_A cpustate->a /* Accumulator */
+#define REG_X cpustate->x /* Index X Register */
+#define REG_Y cpustate->y /* Index Y Register */
+#define REG_S cpustate->s /* Stack Pointer */
+#define REG_PC cpustate->pc /* Program Counter */
+#define REG_PPC cpustate->ppc /* Previous Program Counter */
+#define REG_P cpustate->p /* Processor Status Register */
+#define FLAG_NZ cpustate->flag_n = cpustate->flag_z /* Negative Flag and inverted Zero flag */
+#define FLAG_N cpustate->flag_n /* Negative flag */
+#define FLAG_Z cpustate->flag_z /* Inverted Zero flag */
+#define FLAG_V cpustate->flag_v /* Overflow Flag */
+#define FLAG_P cpustate->flag_p /* Direct Page Flag */
+#define FLAG_B cpustate->flag_b /* BRK Instruction Flag */
+#define FLAG_H cpustate->flag_h /* Decimal Mode Flag */
+#define FLAG_I cpustate->flag_i /* Interrupt Mask Flag */
+#define FLAG_C cpustate->flag_c /* Carry Flag */
+#define LINE_IRQ cpustate->line_irq /* Status of the IRQ line */
+#define LINE_NMI cpustate->line_nmi /* Status of the NMI line */
+#define REG_IR cpustate->ir /* Instruction Register */
+#define INT_ACK cpustate->int_ack /* Interrupt Acknowledge function pointer */
+#define CLOCKS cpustate->ICount /* Clock cycles remaining */
+#define CPU_STOPPED cpustate->stopped /* Stopped status */
+
+#define SRC cpustate->source /* Source Operand */
+#define DST cpustate->destination /* Destination Operand */
+#define TMP1 cpustate->temp1 /* temporary result 1 */
+#define TMP2 cpustate->temp2 /* temporary result 2 */
+#define TMP3 cpustate->temp3 /* temporary result 3 */
+
+#define STOP_LEVEL_STOP 1
+#define STOP_LEVEL_SLEEP 2
/* ======================================================================== */
@@ -221,14 +221,14 @@ INLINE int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
/* ======================================================================== */
/* Codition code tests */
-#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
-#define COND_CS() (FLAG_C&0x100) /* Carry Set */
-#define COND_EQ() (!FLAG_Z) /* Equal */
-#define COND_NE() (FLAG_Z) /* Not Equal */
-#define COND_MI() (FLAG_N&0x80) /* Minus */
-#define COND_PL() (!(FLAG_N&0x80)) /* Plus */
-#define COND_VC() (!(FLAG_V&0x80)) /* Overflow Clear */
-#define COND_VS() (FLAG_V&0x80) /* Overflow Set */
+#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
+#define COND_CS() (FLAG_C&0x100) /* Carry Set */
+#define COND_EQ() (!FLAG_Z) /* Equal */
+#define COND_NE() (FLAG_Z) /* Not Equal */
+#define COND_MI() (FLAG_N&0x80) /* Minus */
+#define COND_PL() (!(FLAG_N&0x80)) /* Plus */
+#define COND_VC() (!(FLAG_V&0x80)) /* Overflow Clear */
+#define COND_VS() (FLAG_V&0x80) /* Overflow Set */
/* Set Overflow flag in math operations */
#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
@@ -334,100 +334,100 @@ INLINE void write_16_direct(spc700i_cpu *cpustate, uint address, uint value)
}
/* Low level memory access macros */
-#define read_8_NORM(A) read_8_normal(cpustate, A)
-#define read_8_IMM(A) read_8_immediate(cpustate, A)
-#define read_8_ABS(A) read_8_normal(cpustate, A)
-#define read_8_ABX(A) read_8_normal(cpustate, A)
-#define read_8_ABY(A) read_8_normal(cpustate, A)
-#define read_8_AXI(A) read_8_normal(cpustate, A)
-#define read_8_DP(A) read_8_direct(cpustate, A)
-#define read_8_DPX(A) read_8_direct(cpustate, A)
-#define read_8_DPY(A) read_8_direct(cpustate, A)
-#define read_8_DPI(A) read_8_normal(cpustate, A)
-#define read_8_DXI(A) read_8_normal(cpustate, A)
-#define read_8_DIY(A) read_8_normal(cpustate, A)
-#define read_8_STK(A) read_8_normal(cpustate, A)
-#define read_8_XI(A) read_8_direct(cpustate, A)
-#define read_8_XII(A) read_8_direct(cpustate, A)
-#define read_8_YI(A) read_8_direct(cpustate, A)
-
-
-#define read_16_NORM(A) read_16_normal(cpustate, A)
-#define read_16_IMM(A) read_16_immediate(cpustate, A)
-#define read_16_ABS(A) read_16_absolute(cpustate, A)
-#define read_16_ABX(A) read_16_normal(cpustate, A)
-#define read_16_DP(A) read_16_direct(cpustate, A)
-#define read_16_DPX(A) read_16_direct(cpustate, A)
-#define read_16_DPY(A) read_16_direct(cpustate, A)
-#define read_16_DPI(A) read_16_normal(cpustate, A)
-#define read_16_VEC(A) read_16_normal(cpustate, A)
-#define read_16_XI(A) read_16_direct(cpustate, A)
-#define read_16_XII(A) read_16_direct(cpustate, A)
-#define read_16_YI(A) read_16_direct(cpustate, A)
-
-#define write_8_NORM(A, V) write_8_normal(cpustate, A, V)
-#define write_8_IMM(A, V) write_8_normal(cpustate, A, V)
-#define write_8_ABS(A, V) write_8_normal(cpustate, A, V)
-#define write_8_ABX(A, V) write_8_normal(cpustate, A, V)
-#define write_8_ABY(A, V) write_8_normal(cpustate, A, V)
-#define write_8_AXI(A, V) write_8_normal(cpustate, A, V)
-#define write_8_DP(A, V) write_8_direct(cpustate, A, V)
-#define write_8_DPX(A, V) write_8_direct(cpustate, A, V)
-#define write_8_DPY(A, V) write_8_direct(cpustate, A, V)
-#define write_8_DPI(A, V) write_8_normal(cpustate, A, V)
-#define write_8_DXI(A, V) write_8_normal(cpustate, A, V)
-#define write_8_DIY(A, V) write_8_normal(cpustate, A, V)
-#define write_8_STK(A, V) write_8_normal(cpustate, A, V)
-#define write_8_XI(A, V) write_8_direct(cpustate, A, V)
-#define write_8_XII(A, V) write_8_direct(cpustate, A, V)
-#define write_8_YI(A, V) write_8_direct(cpustate, A, V)
-
-#define write_16_NORM(A, V) write_16_normal(cpustate, A, V)
-#define write_16_ABS(A, V) write_16_normal(cpustate, A, V)
-#define write_16_ABX(A, V) write_16_normal(cpustate, A, V)
-#define write_16_ABY(A, V) write_16_normal(cpustate, A, V)
-#define write_16_AXI(A, V) write_16_normal(cpustate, A, V)
-#define write_16_DP(A, V) write_16_direct(cpustate, A, V)
-#define write_16_DPX(A, V) write_16_direct(cpustate, A, V)
-#define write_16_DPY(A, V) write_16_direct(cpustate, A, V)
-#define write_16_DPI(A, V) write_16_normal(cpustate, A, V)
-#define write_16_DXI(A, V) write_16_normal(cpustate, A, V)
-#define write_16_DIY(A, V) write_16_normal(cpustate, A, V)
-#define write_16_STK(A, V) write_16_normal(cpustate, A, V)
-#define write_16_XI(A, V) write_16_direct(cpustate, A, V)
-#define write_16_XII(A, V) write_16_direct(cpustate, A, V)
-#define write_16_YI(A, V) write_16_direct(cpustate, A, V)
-
-
-#define OPER_8_IMM(cpustate) read_8_IMM(EA_IMM(cpustate))
-#define OPER_8_ABS(cpustate) read_8_ABS(EA_ABS(cpustate))
-#define OPER_8_ABX(cpustate) read_8_ABX(EA_ABX(cpustate))
-#define OPER_8_ABY(cpustate) read_8_ABY(EA_ABY(cpustate))
-#define OPER_8_AXI(cpustate) read_8_IND(EA_IND(cpustate))
-#define OPER_8_DP(cpustate) read_8_DP(EA_DP(cpustate))
-#define OPER_8_DPX(cpustate) read_8_DPX(EA_DPX(cpustate))
-#define OPER_8_DPY(cpustate) read_8_DPY(EA_DPY(cpustate))
-#define OPER_8_DPI(cpustate) read_8_DPI(EA_DPI(cpustate))
-#define OPER_8_DXI(cpustate) read_8_DXI(EA_DXI(cpustate))
-#define OPER_8_DIY(cpustate) read_8_DIY(EA_DIY(cpustate))
-#define OPER_8_XI(cpustate) read_8_XI(EA_XI(cpustate))
-#define OPER_8_XII(cpustate) read_8_XI(EA_XII(cpustate))
-#define OPER_8_YI(cpustate) read_8_YI(EA_YI(cpustate))
-
-#define OPER_16_IMM(cpustate) read_16_IMM(EA_IMM16(cpustate))
-#define OPER_16_ABS(cpustate) read_16_ABS(EA_ABS(cpustate))
-#define OPER_16_ABX(cpustate) read_16_ABX(EA_ABX(cpustate))
-#define OPER_16_ABY(cpustate) read_16_ABY(EA_ABY(cpustate))
-#define OPER_16_AXI(cpustate) read_16_IND(EA_IND(cpustate))
-#define OPER_16_DP(cpustate) read_16_DP(EA_DP(cpustate))
-#define OPER_16_DPX(cpustate) read_16_DPX(EA_DPX(cpustate))
-#define OPER_16_DPY(cpustate) read_16_DPY(EA_DPY(cpustate))
-#define OPER_16_DPI(cpustate) read_16_DPI(EA_DXI(cpustate))
-#define OPER_16_DXI(cpustate) read_16_DXI(EA_DXI(cpustate))
-#define OPER_16_DIY(cpustate) read_16_DIY(EA_DIY(cpustate))
-#define OPER_16_XI(cpustate) read_16_XI(EA_XI(cpustate))
-#define OPER_16_XII(cpustate) read_16_XI(EA_XII(cpustate))
-#define OPER_16_YI(cpustate) read_16_YI(EA_YI(cpustate))
+#define read_8_NORM(A) read_8_normal(cpustate, A)
+#define read_8_IMM(A) read_8_immediate(cpustate, A)
+#define read_8_ABS(A) read_8_normal(cpustate, A)
+#define read_8_ABX(A) read_8_normal(cpustate, A)
+#define read_8_ABY(A) read_8_normal(cpustate, A)
+#define read_8_AXI(A) read_8_normal(cpustate, A)
+#define read_8_DP(A) read_8_direct(cpustate, A)
+#define read_8_DPX(A) read_8_direct(cpustate, A)
+#define read_8_DPY(A) read_8_direct(cpustate, A)
+#define read_8_DPI(A) read_8_normal(cpustate, A)
+#define read_8_DXI(A) read_8_normal(cpustate, A)
+#define read_8_DIY(A) read_8_normal(cpustate, A)
+#define read_8_STK(A) read_8_normal(cpustate, A)
+#define read_8_XI(A) read_8_direct(cpustate, A)
+#define read_8_XII(A) read_8_direct(cpustate, A)
+#define read_8_YI(A) read_8_direct(cpustate, A)
+
+
+#define read_16_NORM(A) read_16_normal(cpustate, A)
+#define read_16_IMM(A) read_16_immediate(cpustate, A)
+#define read_16_ABS(A) read_16_absolute(cpustate, A)
+#define read_16_ABX(A) read_16_normal(cpustate, A)
+#define read_16_DP(A) read_16_direct(cpustate, A)
+#define read_16_DPX(A) read_16_direct(cpustate, A)
+#define read_16_DPY(A) read_16_direct(cpustate, A)
+#define read_16_DPI(A) read_16_normal(cpustate, A)
+#define read_16_VEC(A) read_16_normal(cpustate, A)
+#define read_16_XI(A) read_16_direct(cpustate, A)
+#define read_16_XII(A) read_16_direct(cpustate, A)
+#define read_16_YI(A) read_16_direct(cpustate, A)
+
+#define write_8_NORM(A, V) write_8_normal(cpustate, A, V)
+#define write_8_IMM(A, V) write_8_normal(cpustate, A, V)
+#define write_8_ABS(A, V) write_8_normal(cpustate, A, V)
+#define write_8_ABX(A, V) write_8_normal(cpustate, A, V)
+#define write_8_ABY(A, V) write_8_normal(cpustate, A, V)
+#define write_8_AXI(A, V) write_8_normal(cpustate, A, V)
+#define write_8_DP(A, V) write_8_direct(cpustate, A, V)
+#define write_8_DPX(A, V) write_8_direct(cpustate, A, V)
+#define write_8_DPY(A, V) write_8_direct(cpustate, A, V)
+#define write_8_DPI(A, V) write_8_normal(cpustate, A, V)
+#define write_8_DXI(A, V) write_8_normal(cpustate, A, V)
+#define write_8_DIY(A, V) write_8_normal(cpustate, A, V)
+#define write_8_STK(A, V) write_8_normal(cpustate, A, V)
+#define write_8_XI(A, V) write_8_direct(cpustate, A, V)
+#define write_8_XII(A, V) write_8_direct(cpustate, A, V)
+#define write_8_YI(A, V) write_8_direct(cpustate, A, V)
+
+#define write_16_NORM(A, V) write_16_normal(cpustate, A, V)
+#define write_16_ABS(A, V) write_16_normal(cpustate, A, V)
+#define write_16_ABX(A, V) write_16_normal(cpustate, A, V)
+#define write_16_ABY(A, V) write_16_normal(cpustate, A, V)
+#define write_16_AXI(A, V) write_16_normal(cpustate, A, V)
+#define write_16_DP(A, V) write_16_direct(cpustate, A, V)
+#define write_16_DPX(A, V) write_16_direct(cpustate, A, V)
+#define write_16_DPY(A, V) write_16_direct(cpustate, A, V)
+#define write_16_DPI(A, V) write_16_normal(cpustate, A, V)
+#define write_16_DXI(A, V) write_16_normal(cpustate, A, V)
+#define write_16_DIY(A, V) write_16_normal(cpustate, A, V)
+#define write_16_STK(A, V) write_16_normal(cpustate, A, V)
+#define write_16_XI(A, V) write_16_direct(cpustate, A, V)
+#define write_16_XII(A, V) write_16_direct(cpustate, A, V)
+#define write_16_YI(A, V) write_16_direct(cpustate, A, V)
+
+
+#define OPER_8_IMM(cpustate) read_8_IMM(EA_IMM(cpustate))
+#define OPER_8_ABS(cpustate) read_8_ABS(EA_ABS(cpustate))
+#define OPER_8_ABX(cpustate) read_8_ABX(EA_ABX(cpustate))
+#define OPER_8_ABY(cpustate) read_8_ABY(EA_ABY(cpustate))
+#define OPER_8_AXI(cpustate) read_8_IND(EA_IND(cpustate))
+#define OPER_8_DP(cpustate) read_8_DP(EA_DP(cpustate))
+#define OPER_8_DPX(cpustate) read_8_DPX(EA_DPX(cpustate))
+#define OPER_8_DPY(cpustate) read_8_DPY(EA_DPY(cpustate))
+#define OPER_8_DPI(cpustate) read_8_DPI(EA_DPI(cpustate))
+#define OPER_8_DXI(cpustate) read_8_DXI(EA_DXI(cpustate))
+#define OPER_8_DIY(cpustate) read_8_DIY(EA_DIY(cpustate))
+#define OPER_8_XI(cpustate) read_8_XI(EA_XI(cpustate))
+#define OPER_8_XII(cpustate) read_8_XI(EA_XII(cpustate))
+#define OPER_8_YI(cpustate) read_8_YI(EA_YI(cpustate))
+
+#define OPER_16_IMM(cpustate) read_16_IMM(EA_IMM16(cpustate))
+#define OPER_16_ABS(cpustate) read_16_ABS(EA_ABS(cpustate))
+#define OPER_16_ABX(cpustate) read_16_ABX(EA_ABX(cpustate))
+#define OPER_16_ABY(cpustate) read_16_ABY(EA_ABY(cpustate))
+#define OPER_16_AXI(cpustate) read_16_IND(EA_IND(cpustate))
+#define OPER_16_DP(cpustate) read_16_DP(EA_DP(cpustate))
+#define OPER_16_DPX(cpustate) read_16_DPX(EA_DPX(cpustate))
+#define OPER_16_DPY(cpustate) read_16_DPY(EA_DPY(cpustate))
+#define OPER_16_DPI(cpustate) read_16_DPI(EA_DXI(cpustate))
+#define OPER_16_DXI(cpustate) read_16_DXI(EA_DXI(cpustate))
+#define OPER_16_DIY(cpustate) read_16_DIY(EA_DIY(cpustate))
+#define OPER_16_XI(cpustate) read_16_XI(EA_XI(cpustate))
+#define OPER_16_XII(cpustate) read_16_XI(EA_XII(cpustate))
+#define OPER_16_YI(cpustate) read_16_YI(EA_YI(cpustate))
/* Effective Address Caluclations */
INLINE uint EA_IMM(spc700i_cpu *cpustate) {return REG_PC++;}
@@ -470,35 +470,35 @@ INLINE void SET_REG_YA(spc700i_cpu *cpustate, uint value)
}
/* Get the Processor Status Register */
-#define GET_REG_P() \
- ((FLAG_N & 0x80) | \
- ((FLAG_V & 0x80) >> 1) | \
- (FLAG_P>>3) | \
- FLAG_B | \
- (FLAG_H& HFLAG_SET) | \
- FLAG_I | \
- ((!FLAG_Z) << 1) | \
+#define GET_REG_P() \
+ ((FLAG_N & 0x80) | \
+ ((FLAG_V & 0x80) >> 1) | \
+ (FLAG_P>>3) | \
+ FLAG_B | \
+ (FLAG_H& HFLAG_SET) | \
+ FLAG_I | \
+ ((!FLAG_Z) << 1) | \
CFLAG_AS_1())
/* Get Processor Status Register with B flag set (when executing BRK instruction) */
-#define GET_REG_P_BRK() \
- ((FLAG_N & 0x80) | \
- ((FLAG_V & 0x80) >> 1) | \
- (FLAG_P>>3) | \
- FLAGPOS_B | \
- (FLAG_H & HFLAG_SET) | \
- FLAG_I | \
- ((!FLAG_Z) << 1) | \
+#define GET_REG_P_BRK() \
+ ((FLAG_N & 0x80) | \
+ ((FLAG_V & 0x80) >> 1) | \
+ (FLAG_P>>3) | \
+ FLAGPOS_B | \
+ (FLAG_H & HFLAG_SET) | \
+ FLAG_I | \
+ ((!FLAG_Z) << 1) | \
CFLAG_AS_1())
/* Get Processor Status Register with B flag cleared (when servicing an interrupt) */
-#define GET_REG_P_INT() \
- ((FLAG_N & 0x80) | \
- ((FLAG_V & 0x80) >> 1) | \
- (FLAG_P>>3) | \
- (FLAG_H & HFLAG_SET) | \
- FLAG_I | \
- ((!FLAG_Z) << 1) | \
+#define GET_REG_P_INT() \
+ ((FLAG_N & 0x80) | \
+ ((FLAG_V & 0x80) >> 1) | \
+ (FLAG_P>>3) | \
+ (FLAG_H & HFLAG_SET) | \
+ FLAG_I | \
+ ((!FLAG_Z) << 1) | \
CFLAG_AS_1())
INLINE void SET_FLAG_I(spc700i_cpu *cpustate, uint value);
@@ -561,683 +561,683 @@ INLINE void SET_FLAG_I(spc700i_cpu *cpustate, uint value)
/* =========================== OPERATION MACROS =========================== */
/* ======================================================================== */
-#define SUBOP_ADC(A, B) \
- cpustate->spc_int16 = (A) + (B) + CFLAG_AS_1(); \
- TMP1 = ((A) & 0x0f) + (CFLAG_AS_1()); \
- FLAG_C = (cpustate->spc_int16 > 0xff) ? CFLAG_SET : 0; \
+#define SUBOP_ADC(A, B) \
+ cpustate->spc_int16 = (A) + (B) + CFLAG_AS_1(); \
+ TMP1 = ((A) & 0x0f) + (CFLAG_AS_1()); \
+ FLAG_C = (cpustate->spc_int16 > 0xff) ? CFLAG_SET : 0; \
FLAG_V = (~((A) ^ (B))) & (((A) ^ cpustate->spc_int16) & 0x80); \
- FLAG_H = (((cpustate->spc_int16 & 0x0f) - TMP1) & 0x10) >> 1; \
+ FLAG_H = (((cpustate->spc_int16 & 0x0f) - TMP1) & 0x10) >> 1; \
FLAG_NZ = (UINT8)cpustate->spc_int16
/* Add With Carry */
-#define OP_ADC(BCLK, MODE) \
- CLK(BCLK); \
- SRC = OPER_8_##MODE(cpustate); \
- SUBOP_ADC(SRC, REG_A); \
+#define OP_ADC(BCLK, MODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##MODE(cpustate); \
+ SUBOP_ADC(SRC, REG_A); \
REG_A = (UINT8)cpustate->spc_int16;
/* Add With Carry to memory */
-#define OP_ADCM(BCLK, SMODE, DMODE) \
- CLK(BCLK); \
- SRC = OPER_8_##SMODE(cpustate); \
- DST = EA_##DMODE(cpustate); \
- SUBOP_ADC(SRC, read_8_##DMODE(DST)); \
+#define OP_ADCM(BCLK, SMODE, DMODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##SMODE(cpustate); \
+ DST = EA_##DMODE(cpustate); \
+ SUBOP_ADC(SRC, read_8_##DMODE(DST)); \
write_8_##DMODE(DST, (UINT8)cpustate->spc_int16)
/* Add word */
-#define OP_ADDW(BCLK) \
- CLK(BCLK); \
- SRC = OPER_16_DP(cpustate); \
- DST = GET_REG_YA(); \
- TMP1 = ((SRC) & 0xff) + ((DST) & 0xff); \
- TMP2 = (TMP1 > 0xff) ? 1 : 0; \
- TMP3 = ((SRC) >> 8) + ((DST) >> 8) + TMP2; \
- cpustate->spc_int16 = ((TMP1 & 0xff) + (TMP3 << 8)) & 0xffff; \
- FLAG_C = (TMP3 > 0xff) ? CFLAG_SET : 0; \
+#define OP_ADDW(BCLK) \
+ CLK(BCLK); \
+ SRC = OPER_16_DP(cpustate); \
+ DST = GET_REG_YA(); \
+ TMP1 = ((SRC) & 0xff) + ((DST) & 0xff); \
+ TMP2 = (TMP1 > 0xff) ? 1 : 0; \
+ TMP3 = ((SRC) >> 8) + ((DST) >> 8) + TMP2; \
+ cpustate->spc_int16 = ((TMP1 & 0xff) + (TMP3 << 8)) & 0xffff; \
+ FLAG_C = (TMP3 > 0xff) ? CFLAG_SET : 0; \
FLAG_H = ((unsigned) ((((DST) >> 8) & 0x0F) + \
(((SRC) >> 8) & 0x0F) + TMP2)) > 0x0F ? HFLAG_SET : 0; \
FLAG_V = (~((DST) ^ (SRC)) & ((SRC) ^ (UINT16) cpustate->spc_int16) & 0x8000) ? VFLAG_SET : 0; \
- FLAG_Z = (cpustate->spc_int16 != 0); \
- FLAG_N = (cpustate->spc_int16>>8); \
+ FLAG_Z = (cpustate->spc_int16 != 0); \
+ FLAG_N = (cpustate->spc_int16>>8); \
SET_REG_YA(cpustate, cpustate->spc_int16);
/* Logical AND with accumulator */
-#define OP_AND(BCLK, MODE) \
- CLK(BCLK); \
+#define OP_AND(BCLK, MODE) \
+ CLK(BCLK); \
FLAG_NZ = REG_A &= OPER_8_##MODE(cpustate)
/* Logical AND operand */
-#define OP_ANDM(BCLK, SMODE, DMODE) \
- CLK(BCLK); \
- FLAG_NZ = OPER_8_##SMODE(cpustate); \
- DST = EA_##DMODE(cpustate); \
- FLAG_NZ &= read_8_##DMODE(DST); \
+#define OP_ANDM(BCLK, SMODE, DMODE) \
+ CLK(BCLK); \
+ FLAG_NZ = OPER_8_##SMODE(cpustate); \
+ DST = EA_##DMODE(cpustate); \
+ FLAG_NZ &= read_8_##DMODE(DST); \
write_8_##DMODE(DST, FLAG_NZ)
/* Logical AND bit to C */
-#define OP_AND1(BCLK) \
- CLK(BCLK); \
- DST = EA_IMM16(cpustate); \
- if(FLAG_C & CFLAG_SET) \
- { \
- DST = read_16_IMM(DST); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
- if(!(read_8_NORM(DST) & SRC)) \
- FLAG_C = CFLAG_CLEAR; \
+#define OP_AND1(BCLK) \
+ CLK(BCLK); \
+ DST = EA_IMM16(cpustate); \
+ if(FLAG_C & CFLAG_SET) \
+ { \
+ DST = read_16_IMM(DST); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
+ if(!(read_8_NORM(DST) & SRC)) \
+ FLAG_C = CFLAG_CLEAR; \
}
/* AND negated bit to C */
-#define OP_ANDN1(BCLK) \
- CLK(BCLK); \
- DST = EA_IMM16(cpustate); \
- if(FLAG_C & CFLAG_SET) \
- { \
- DST = read_16_IMM(DST); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
- if(read_8_NORM(DST) & SRC) \
- FLAG_C = CFLAG_CLEAR; \
+#define OP_ANDN1(BCLK) \
+ CLK(BCLK); \
+ DST = EA_IMM16(cpustate); \
+ if(FLAG_C & CFLAG_SET) \
+ { \
+ DST = read_16_IMM(DST); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
+ if(read_8_NORM(DST) & SRC) \
+ FLAG_C = CFLAG_CLEAR; \
}
/* Arithmetic Shift Left accumulator */
-#define OP_ASL(BCLK) \
- CLK(BCLK); \
- FLAG_C = REG_A << 1; \
+#define OP_ASL(BCLK) \
+ CLK(BCLK); \
+ FLAG_C = REG_A << 1; \
FLAG_NZ = REG_A = MAKE_UINT_8(FLAG_C)
/* Arithmetic Shift Left operand */
-#define OP_ASLM(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = read_8_##MODE(DST) << 1; \
- FLAG_NZ = MAKE_UINT_8(FLAG_C); \
+#define OP_ASLM(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = read_8_##MODE(DST) << 1; \
+ FLAG_NZ = MAKE_UINT_8(FLAG_C); \
write_8_##MODE(DST, FLAG_NZ)
/* Branch if Bit Reset */
-#define OP_BBC(BCLK, BIT) \
- CLK(BCLK); \
- SRC = OPER_8_DP(cpustate); \
- DST = OPER_8_IMM(cpustate); \
- if(!(SRC & BIT)) \
- { \
- CLK(2); \
- BRANCH(cpustate, DST); \
+#define OP_BBC(BCLK, BIT) \
+ CLK(BCLK); \
+ SRC = OPER_8_DP(cpustate); \
+ DST = OPER_8_IMM(cpustate); \
+ if(!(SRC & BIT)) \
+ { \
+ CLK(2); \
+ BRANCH(cpustate, DST); \
}
/* Branch if Bit Set */
-#define OP_BBS(BCLK, BIT) \
- CLK(BCLK); \
- SRC = OPER_8_DP(cpustate); \
- DST = OPER_8_IMM(cpustate); \
- if(SRC & BIT) \
- { \
- CLK(2); \
- BRANCH(cpustate, DST); \
+#define OP_BBS(BCLK, BIT) \
+ CLK(BCLK); \
+ SRC = OPER_8_DP(cpustate); \
+ DST = OPER_8_IMM(cpustate); \
+ if(SRC & BIT) \
+ { \
+ CLK(2); \
+ BRANCH(cpustate, DST); \
}
/* Branch on Condition Code */
-#define OP_BCC(BCLK, COND) \
- CLK(BCLK); \
- DST = OPER_8_IMM(cpustate); \
- if(COND) \
- { \
- CLK(2); \
- BRANCH(cpustate, DST); \
+#define OP_BCC(BCLK, COND) \
+ CLK(BCLK); \
+ DST = OPER_8_IMM(cpustate); \
+ if(COND) \
+ { \
+ CLK(2); \
+ BRANCH(cpustate, DST); \
}
/* Branch Unconditional */
/* speed up busy loops */
-#define OP_BRA(BCLK) \
- CLK(BCLK); \
- BRANCH(cpustate, OPER_8_IMM(cpustate)); \
- if(REG_PC == REG_PPC) \
+#define OP_BRA(BCLK) \
+ CLK(BCLK); \
+ BRANCH(cpustate, OPER_8_IMM(cpustate)); \
+ if(REG_PC == REG_PPC) \
CLK_ALL()
/* Cause a Break interrupt */
-#define OP_BRK(BCLK) \
- CLK(BCLK); \
- PUSH_16(cpustate, REG_PC); \
- PUSH_8(cpustate, GET_REG_P_BRK()); \
- FLAG_B |= FLAGPOS_B; \
- FLAG_I = IFLAG_CLEAR; \
+#define OP_BRK(BCLK) \
+ CLK(BCLK); \
+ PUSH_16(cpustate, REG_PC); \
+ PUSH_8(cpustate, GET_REG_P_BRK()); \
+ FLAG_B |= FLAGPOS_B; \
+ FLAG_I = IFLAG_CLEAR; \
JUMP(cpustate, read_16_VEC(VECTOR_BRK))
/* Call subroutine */
-#define OP_CALL(BCLK) \
- CLK(BCLK); \
- DST = EA_ABS(cpustate); \
- PUSH_16(cpustate, REG_PC); \
+#define OP_CALL(BCLK) \
+ CLK(BCLK); \
+ DST = EA_ABS(cpustate); \
+ PUSH_16(cpustate, REG_PC); \
JUMP(cpustate, DST)
/* Compare accumulator and branch if not equal */
-#define OP_CBNE(BCLK, MODE) \
- CLK(BCLK); \
- SRC = OPER_8_##MODE(cpustate); \
- DST = EA_IMM(cpustate); \
- if(SRC != REG_A) \
- { \
- CLK(2); \
- BRANCH(cpustate, read_8_IMM(DST)); \
+#define OP_CBNE(BCLK, MODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##MODE(cpustate); \
+ DST = EA_IMM(cpustate); \
+ if(SRC != REG_A) \
+ { \
+ CLK(2); \
+ BRANCH(cpustate, read_8_IMM(DST)); \
}
/* Clear Carry flag */
-#define OP_CLRC(BCLK) \
- CLK(BCLK); \
+#define OP_CLRC(BCLK) \
+ CLK(BCLK); \
FLAG_C = CFLAG_CLEAR
/* Clear Memory Bit */
-#define OP_CLR(BCLK, BIT) \
- CLK(BCLK); \
- DST = EA_DP(cpustate); \
- SRC = read_8_DP(DST) & ~BIT; \
+#define OP_CLR(BCLK, BIT) \
+ CLK(BCLK); \
+ DST = EA_DP(cpustate); \
+ SRC = read_8_DP(DST) & ~BIT; \
write_8_DP(DST, SRC)
/* Clear Overflow flag (also clears half-carry) */
-#define OP_CLRV(BCLK) \
- CLK(BCLK); \
- FLAG_V = VFLAG_CLEAR; \
+#define OP_CLRV(BCLK) \
+ CLK(BCLK); \
+ FLAG_V = VFLAG_CLEAR; \
FLAG_H = 0;
/* Clear the Page flag */
-#define OP_CLRP(BCLK) \
- CLK(BCLK); \
+#define OP_CLRP(BCLK) \
+ CLK(BCLK); \
FLAG_P = PFLAG_CLEAR
/* Compare operand to register */
-#define OP_CMPR(BCLK, REG, MODE) \
- CLK(BCLK); \
- SRC = OPER_8_##MODE(cpustate); \
- cpustate->spc_int16 = (short)REG - (short)SRC; \
- FLAG_C = (cpustate->spc_int16 >= 0) ? CFLAG_SET : 0; \
+#define OP_CMPR(BCLK, REG, MODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##MODE(cpustate); \
+ cpustate->spc_int16 = (short)REG - (short)SRC; \
+ FLAG_C = (cpustate->spc_int16 >= 0) ? CFLAG_SET : 0; \
FLAG_NZ = MAKE_UINT_8(cpustate->spc_int16);
/* Compare memory */
-#define OP_CMPM(BCLK, SMODE, DMODE) \
- CLK(BCLK); \
- SRC = OPER_8_##SMODE(cpustate); \
- cpustate->spc_int16 = (short)OPER_8_##DMODE(cpustate) - (short)SRC; \
- FLAG_C = (cpustate->spc_int16 >= 0) ? CFLAG_SET : 0; \
+#define OP_CMPM(BCLK, SMODE, DMODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##SMODE(cpustate); \
+ cpustate->spc_int16 = (short)OPER_8_##DMODE(cpustate) - (short)SRC; \
+ FLAG_C = (cpustate->spc_int16 >= 0) ? CFLAG_SET : 0; \
FLAG_NZ = MAKE_UINT_8(cpustate->spc_int16);
/* Compare word */
-#define OP_CMPW(BCLK, MODE) \
- CLK(BCLK); \
- SRC = OPER_16_##MODE(cpustate); \
- cpustate->spc_int32 = (int)GET_REG_YA() - (int)SRC; \
- FLAG_C = (cpustate->spc_int32 >= 0) ? CFLAG_SET : 0; \
+#define OP_CMPW(BCLK, MODE) \
+ CLK(BCLK); \
+ SRC = OPER_16_##MODE(cpustate); \
+ cpustate->spc_int32 = (int)GET_REG_YA() - (int)SRC; \
+ FLAG_C = (cpustate->spc_int32 >= 0) ? CFLAG_SET : 0; \
FLAG_NZ = NZFLAG_16(cpustate->spc_int32);
/* Decimal adjust for addition */
-#define OP_DAA(BCLK) \
- CLK(BCLK); \
- SRC = REG_A; \
- if (((SRC & 0x0f) > 9) || (FLAG_H & HFLAG_SET)) \
- { \
- REG_A += 6; \
- if (REG_A < 6) \
- { \
- FLAG_C = CFLAG_SET; \
- } \
- } \
- if ((SRC > 0x99) || (FLAG_C & CFLAG_SET)) \
- { \
- REG_A += 0x60; \
- FLAG_C = CFLAG_SET; \
- } \
+#define OP_DAA(BCLK) \
+ CLK(BCLK); \
+ SRC = REG_A; \
+ if (((SRC & 0x0f) > 9) || (FLAG_H & HFLAG_SET)) \
+ { \
+ REG_A += 6; \
+ if (REG_A < 6) \
+ { \
+ FLAG_C = CFLAG_SET; \
+ } \
+ } \
+ if ((SRC > 0x99) || (FLAG_C & CFLAG_SET)) \
+ { \
+ REG_A += 0x60; \
+ FLAG_C = CFLAG_SET; \
+ } \
FLAG_NZ = REG_A = MAKE_UINT_8(REG_A);
/* Decimal adjust for subtraction */
-#define OP_DAS(BCLK) \
- CLK(BCLK); \
- SRC = REG_A; \
- if (!(FLAG_H & HFLAG_SET) || ((SRC & 0xf) > 9)) \
- { \
- REG_A -= 6; \
- } \
- if (!(FLAG_C & CFLAG_SET) || (SRC > 0x99)) \
- { \
- REG_A -= 0x60; \
- FLAG_C = 0; \
- } \
+#define OP_DAS(BCLK) \
+ CLK(BCLK); \
+ SRC = REG_A; \
+ if (!(FLAG_H & HFLAG_SET) || ((SRC & 0xf) > 9)) \
+ { \
+ REG_A -= 6; \
+ } \
+ if (!(FLAG_C & CFLAG_SET) || (SRC > 0x99)) \
+ { \
+ REG_A -= 0x60; \
+ FLAG_C = 0; \
+ } \
FLAG_NZ = REG_A = MAKE_UINT_8(REG_A)
/* Decrement register and branch if not zero */
/* speed up busy loops */
-#define OP_DBNZR(BCLK) \
- CLK(BCLK); \
- REG_Y = MAKE_UINT_8(REG_Y - 1); \
- DST = EA_IMM(cpustate); \
- if(REG_Y != 0) \
- { \
- CLK(2); \
- BRANCH(cpustate, read_8_IMM(DST)); \
+#define OP_DBNZR(BCLK) \
+ CLK(BCLK); \
+ REG_Y = MAKE_UINT_8(REG_Y - 1); \
+ DST = EA_IMM(cpustate); \
+ if(REG_Y != 0) \
+ { \
+ CLK(2); \
+ BRANCH(cpustate, read_8_IMM(DST)); \
}
/* Decrement operand and branch if not zero */
/* Speed up busy loops but do reads/writes for compatibility */
-#define OP_DBNZM(BCLK) \
- CLK(BCLK); \
- DST = EA_DP(cpustate); \
- SRC = MAKE_UINT_8(read_8_DP(DST) - 1); \
- write_8_DP(DST, SRC); \
- DST = EA_IMM(cpustate); \
- if(SRC != 0) \
- { \
- CLK(2); \
- BRANCH(cpustate, read_8_IMM(DST)); \
+#define OP_DBNZM(BCLK) \
+ CLK(BCLK); \
+ DST = EA_DP(cpustate); \
+ SRC = MAKE_UINT_8(read_8_DP(DST) - 1); \
+ write_8_DP(DST, SRC); \
+ DST = EA_IMM(cpustate); \
+ if(SRC != 0) \
+ { \
+ CLK(2); \
+ BRANCH(cpustate, read_8_IMM(DST)); \
}
/* Decrement register */
-#define OP_DECR(BCLK, REG) \
- CLK(BCLK); \
+#define OP_DECR(BCLK, REG) \
+ CLK(BCLK); \
FLAG_NZ = REG = MAKE_UINT_8(REG - 1)
/* Decrement operand */
-#define OP_DECM(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_NZ = MAKE_UINT_8(read_8_##MODE(DST) - 1); \
+#define OP_DECM(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_NZ = MAKE_UINT_8(read_8_##MODE(DST) - 1); \
write_8_##MODE(DST, FLAG_NZ)
/* Decrement word */
-#define OP_DECW(BCLK) \
- CLK(BCLK); \
- DST = EA_DP(cpustate); \
- FLAG_NZ = MAKE_UINT_16(read_16_DP(DST) - 1); \
- write_16_DP(DST, FLAG_Z); \
+#define OP_DECW(BCLK) \
+ CLK(BCLK); \
+ DST = EA_DP(cpustate); \
+ FLAG_NZ = MAKE_UINT_16(read_16_DP(DST) - 1); \
+ write_16_DP(DST, FLAG_Z); \
FLAG_NZ = NZFLAG_16(FLAG_Z)
/* Disable interrupts */
-#define OP_DI(BCLK) \
- CLK(BCLK); \
+#define OP_DI(BCLK) \
+ CLK(BCLK); \
FLAG_I = IFLAG_CLEAR
/* Divide - should be almost exactly how the hardware works */
-#define OP_DIV(BCLK) \
- CLK(BCLK); \
- TMP1 = SRC = GET_REG_YA(); \
- TMP2 = (REG_X << 9); \
- FLAG_H = 0; \
- if ((REG_Y & 0xf) >= (REG_X & 0xf)) FLAG_H = HFLAG_SET; \
- for (TMP3 = 0; TMP3 < 9; TMP3++) \
- { \
- TMP1 <<= 1; \
- if (TMP1 & 0x20000) TMP1 = (TMP1 & 0x1ffff) | 1; \
- if (TMP1 >= TMP2) TMP1 ^= 1; \
- if (TMP1 & 1) TMP1 = ((TMP1 - TMP2) & 0x1ffff); \
- } \
- FLAG_V = (TMP1 & 0x100) ? VFLAG_SET : 0; \
- SET_REG_YA(cpustate, (((TMP1 >> 9) & 0xff) << 8) + (TMP1 & 0xff)); \
+#define OP_DIV(BCLK) \
+ CLK(BCLK); \
+ TMP1 = SRC = GET_REG_YA(); \
+ TMP2 = (REG_X << 9); \
+ FLAG_H = 0; \
+ if ((REG_Y & 0xf) >= (REG_X & 0xf)) FLAG_H = HFLAG_SET; \
+ for (TMP3 = 0; TMP3 < 9; TMP3++) \
+ { \
+ TMP1 <<= 1; \
+ if (TMP1 & 0x20000) TMP1 = (TMP1 & 0x1ffff) | 1; \
+ if (TMP1 >= TMP2) TMP1 ^= 1; \
+ if (TMP1 & 1) TMP1 = ((TMP1 - TMP2) & 0x1ffff); \
+ } \
+ FLAG_V = (TMP1 & 0x100) ? VFLAG_SET : 0; \
+ SET_REG_YA(cpustate, (((TMP1 >> 9) & 0xff) << 8) + (TMP1 & 0xff)); \
FLAG_NZ = MAKE_UINT_8(GET_REG_YA());
/* Enable interrupts */
-#define OP_EI(BCLK) \
- CLK(BCLK); \
+#define OP_EI(BCLK) \
+ CLK(BCLK); \
FLAG_I = IFLAG_SET
/* Exclusive Or operand to accumulator */
-#define OP_EOR(BCLK, MODE) \
- CLK(BCLK); \
+#define OP_EOR(BCLK, MODE) \
+ CLK(BCLK); \
FLAG_NZ = REG_A ^= OPER_8_##MODE(cpustate)
/* Logical EOR operand */
-#define OP_EORM(BCLK, SMODE, DMODE) \
- CLK(BCLK); \
- FLAG_NZ = OPER_8_##SMODE(cpustate); \
- DST = EA_##DMODE(cpustate); \
- FLAG_NZ ^= read_8_##DMODE(DST); \
+#define OP_EORM(BCLK, SMODE, DMODE) \
+ CLK(BCLK); \
+ FLAG_NZ = OPER_8_##SMODE(cpustate); \
+ DST = EA_##DMODE(cpustate); \
+ FLAG_NZ ^= read_8_##DMODE(DST); \
write_8_##DMODE(DST, FLAG_NZ)
/* Exclusive OR bit to C */
-#define OP_EOR1(BCLK) \
- CLK(BCLK); \
- DST = OPER_16_IMM(cpustate); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
- if(read_8_NORM(DST) & SRC) \
+#define OP_EOR1(BCLK) \
+ CLK(BCLK); \
+ DST = OPER_16_IMM(cpustate); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
+ if(read_8_NORM(DST) & SRC) \
FLAG_C = ~FLAG_C
/* Increment register */
-#define OP_INCR(BCLK, REG) \
- CLK(BCLK); \
+#define OP_INCR(BCLK, REG) \
+ CLK(BCLK); \
FLAG_NZ = REG = MAKE_UINT_8(REG + 1)
/* Increment operand */
-#define OP_INCM(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_NZ = MAKE_UINT_8(read_8_##MODE(DST) + 1); \
+#define OP_INCM(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_NZ = MAKE_UINT_8(read_8_##MODE(DST) + 1); \
write_8_##MODE(DST, FLAG_NZ)
/* Increment word */
-#define OP_INCW(BCLK) \
- CLK(BCLK); \
- DST = EA_DP(cpustate); \
- FLAG_NZ = MAKE_UINT_16(read_16_DP(DST) + 1); \
- write_16_DP(DST, FLAG_Z); \
+#define OP_INCW(BCLK) \
+ CLK(BCLK); \
+ DST = EA_DP(cpustate); \
+ FLAG_NZ = MAKE_UINT_16(read_16_DP(DST) + 1); \
+ write_16_DP(DST, FLAG_Z); \
FLAG_NZ = NZFLAG_16(FLAG_Z)
/* Jump */
/* If we're in a busy loop, eat all clock cycles */
-#define OP_JMP(BCLK, MODE) \
- CLK(BCLK); \
- JUMP(cpustate, EA_##MODE(cpustate)); \
- if(REG_PC == REG_PPC) \
+#define OP_JMP(BCLK, MODE) \
+ CLK(BCLK); \
+ JUMP(cpustate, EA_##MODE(cpustate)); \
+ if(REG_PC == REG_PPC) \
CLK_ALL()
/* Jump to Subroutine */
-#define OP_JSR(BCLK, MODE) \
- CLK(BCLK); \
- PUSH_16(cpustate, REG_PC); \
+#define OP_JSR(BCLK, MODE) \
+ CLK(BCLK); \
+ PUSH_16(cpustate, REG_PC); \
JUMP(cpustate, EA_##MODE(cpustate))
/* Logical Shift Right accumulator */
-#define OP_LSR(BCLK) \
- CLK(BCLK); \
- FLAG_C = REG_A << 8; \
+#define OP_LSR(BCLK) \
+ CLK(BCLK); \
+ FLAG_C = REG_A << 8; \
FLAG_NZ = REG_A >>= 1
/* Logical Shift Right operand */
-#define OP_LSRM(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_NZ = read_8_##MODE(DST); \
- FLAG_C = FLAG_NZ << 8; \
- FLAG_NZ >>= 1; \
+#define OP_LSRM(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_NZ = read_8_##MODE(DST); \
+ FLAG_C = FLAG_NZ << 8; \
+ FLAG_NZ >>= 1; \
write_8_##MODE(DST, FLAG_NZ)
/* Move from register to register */
-#define OP_MOVRR(BCLK, SREG, DREG) \
- CLK(BCLK); \
+#define OP_MOVRR(BCLK, SREG, DREG) \
+ CLK(BCLK); \
FLAG_NZ = DREG = SREG
/* Move from register to memory */
-#define OP_MOVRM(BCLK, SREG, DMODE) \
- CLK(BCLK); \
+#define OP_MOVRM(BCLK, SREG, DMODE) \
+ CLK(BCLK); \
write_8_##DMODE(EA_##DMODE(cpustate), SREG)
/* Move from memory to register */
-#define OP_MOVMR(BCLK, SMODE, DREG) \
- CLK(BCLK); \
+#define OP_MOVMR(BCLK, SMODE, DREG) \
+ CLK(BCLK); \
FLAG_NZ = DREG = OPER_8_##SMODE(cpustate)
/* Move from memory to memory */
-#define OP_MOVMM(BCLK, SMODE, DMODE) \
- CLK(BCLK); \
- SRC = OPER_8_##SMODE(cpustate); \
- DST = EA_##DMODE(cpustate); \
+#define OP_MOVMM(BCLK, SMODE, DMODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##SMODE(cpustate); \
+ DST = EA_##DMODE(cpustate); \
write_8_##DMODE(DST, SRC)
/* Move word register to memory */
-#define OP_MOVWRM(BCLK) \
- CLK(BCLK); \
+#define OP_MOVWRM(BCLK) \
+ CLK(BCLK); \
write_16_DP(EA_DP(cpustate), GET_REG_YA())
/* Move word memory to register */
-#define OP_MOVWMR(BCLK) \
- CLK(BCLK); \
- FLAG_NZ = OPER_16_DP(cpustate); \
- SET_REG_YA(cpustate, FLAG_Z); \
+#define OP_MOVWMR(BCLK) \
+ CLK(BCLK); \
+ FLAG_NZ = OPER_16_DP(cpustate); \
+ SET_REG_YA(cpustate, FLAG_Z); \
FLAG_NZ = NZFLAG_16(FLAG_Z)
/* Move from Stack pointer to X */
-#define OP_MOVSX(BCLK) \
- CLK(BCLK); \
+#define OP_MOVSX(BCLK) \
+ CLK(BCLK); \
FLAG_NZ = REG_X = REG_S
/* Move from X to Stack pointer */
-#define OP_MOVXS(BCLK) \
- CLK(BCLK); \
+#define OP_MOVXS(BCLK) \
+ CLK(BCLK); \
REG_S = REG_X
/* Move bit from memory to C */
-#define OP_MOV1C(BCLK) \
- CLK(BCLK); \
- DST = OPER_16_IMM(cpustate); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
+#define OP_MOV1C(BCLK) \
+ CLK(BCLK); \
+ DST = OPER_16_IMM(cpustate); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
FLAG_C = ((read_8_NORM(DST) & SRC) != 0) << 8
/* Move bit from C to memory */
-#define OP_MOV1M(BCLK) \
- CLK(BCLK); \
- DST = OPER_16_IMM(cpustate); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
- if(FLAG_C & CFLAG_SET) \
- write_8_NORM(DST, read_8_NORM(DST) | SRC); \
- else \
+#define OP_MOV1M(BCLK) \
+ CLK(BCLK); \
+ DST = OPER_16_IMM(cpustate); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
+ if(FLAG_C & CFLAG_SET) \
+ write_8_NORM(DST, read_8_NORM(DST) | SRC); \
+ else \
write_8_NORM(DST, read_8_NORM(DST) & ~SRC)
/* Multiply A and Y and store result in YA */
-#define OP_MUL(BCLK) \
- CLK(BCLK); \
- SRC = REG_Y * REG_A; \
- REG_A = MAKE_UINT_8(SRC); \
+#define OP_MUL(BCLK) \
+ CLK(BCLK); \
+ SRC = REG_Y * REG_A; \
+ REG_A = MAKE_UINT_8(SRC); \
FLAG_NZ = REG_Y = SRC >> 8;
/* No Operation */
-#define OP_NOP(BCLK) \
+#define OP_NOP(BCLK) \
CLK(BCLK)
/* Invert the C flag */
-#define OP_NOTC(BCLK) \
- CLK(BCLK); \
+#define OP_NOTC(BCLK) \
+ CLK(BCLK); \
FLAG_C = ~FLAG_C
/* NOT bit */
-#define OP_NOT1(BCLK) \
- CLK(BCLK); \
- DST = OPER_16_IMM(cpustate); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
+#define OP_NOT1(BCLK) \
+ CLK(BCLK); \
+ DST = OPER_16_IMM(cpustate); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
write_8_NORM(DST, read_8_NORM(DST) ^ SRC)
/* Logical OR operand to accumulator */
-#define OP_OR(BCLK, MODE) \
- CLK(BCLK); \
+#define OP_OR(BCLK, MODE) \
+ CLK(BCLK); \
FLAG_NZ = REG_A |= OPER_8_##MODE(cpustate)
/* Logical OR operand */
-#define OP_ORM(BCLK, SMODE, DMODE) \
- CLK(BCLK); \
- FLAG_NZ = OPER_8_##SMODE(cpustate); \
- DST = EA_##DMODE(cpustate); \
- FLAG_NZ |= read_8_##DMODE(DST); \
+#define OP_ORM(BCLK, SMODE, DMODE) \
+ CLK(BCLK); \
+ FLAG_NZ = OPER_8_##SMODE(cpustate); \
+ DST = EA_##DMODE(cpustate); \
+ FLAG_NZ |= read_8_##DMODE(DST); \
write_8_##DMODE(DST, FLAG_NZ)
/* Logical OR bit to C */
-#define OP_OR1(BCLK) \
- CLK(BCLK); \
- DST = EA_IMM16(cpustate); \
- if(!(FLAG_C & CFLAG_SET)) \
- { \
- DST = read_16_IMM(DST); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
- if(read_8_NORM(DST) & SRC) \
- FLAG_C = CFLAG_SET; \
+#define OP_OR1(BCLK) \
+ CLK(BCLK); \
+ DST = EA_IMM16(cpustate); \
+ if(!(FLAG_C & CFLAG_SET)) \
+ { \
+ DST = read_16_IMM(DST); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
+ if(read_8_NORM(DST) & SRC) \
+ FLAG_C = CFLAG_SET; \
}
/* OR negated bit to C */
-#define OP_ORN1(BCLK) \
- CLK(BCLK); \
- DST = EA_IMM16(cpustate); \
- if(!(FLAG_C & CFLAG_SET)) \
- { \
- DST = read_16_IMM(DST); \
- SRC = 1 << (DST >> 13); \
- DST &= 0x1fff; \
- if(!(read_8_NORM(DST) & SRC)) \
- FLAG_C = CFLAG_SET; \
+#define OP_ORN1(BCLK) \
+ CLK(BCLK); \
+ DST = EA_IMM16(cpustate); \
+ if(!(FLAG_C & CFLAG_SET)) \
+ { \
+ DST = read_16_IMM(DST); \
+ SRC = 1 << (DST >> 13); \
+ DST &= 0x1fff; \
+ if(!(read_8_NORM(DST) & SRC)) \
+ FLAG_C = CFLAG_SET; \
}
/* UPage Call */
-#define OP_PCALL(BCLK) \
- CLK(BCLK); \
- DST = EA_DP(cpustate); \
- PUSH_16(cpustate, REG_PC); \
+#define OP_PCALL(BCLK) \
+ CLK(BCLK); \
+ DST = EA_DP(cpustate); \
+ PUSH_16(cpustate, REG_PC); \
JUMP(cpustate, 0xff00 | DST)
/* Push a register to the stack */
-#define OP_PUSH(BCLK, REG) \
- CLK(BCLK); \
+#define OP_PUSH(BCLK, REG) \
+ CLK(BCLK); \
PUSH_8(cpustate, REG)
/* Push the Processor Status Register to the stack */
-#define OP_PHP(BCLK) \
- CLK(BCLK); \
+#define OP_PHP(BCLK) \
+ CLK(BCLK); \
PUSH_8(cpustate, GET_REG_P())
/* Pull a register from the stack */
-#define OP_PULL(BCLK, REG) \
- CLK(BCLK); \
+#define OP_PULL(BCLK, REG) \
+ CLK(BCLK); \
REG = PULL_8(cpustate)
/* Pull the Processor Status Register from the stack */
-#define OP_PLP(BCLK) \
- CLK(BCLK); \
+#define OP_PLP(BCLK) \
+ CLK(BCLK); \
SET_REG_P(cpustate, PULL_8(cpustate))
/* Return from Subroutine */
-#define OP_RET(BCLK) \
- CLK(BCLK); \
+#define OP_RET(BCLK) \
+ CLK(BCLK); \
JUMP(cpustate, PULL_16(cpustate))
/* Return from Interrupt */
-#define OP_RETI(BCLK) \
- CLK(BCLK); \
- SET_REG_P(cpustate, PULL_8(cpustate)); \
+#define OP_RETI(BCLK) \
+ CLK(BCLK); \
+ SET_REG_P(cpustate, PULL_8(cpustate)); \
JUMP(cpustate, PULL_16(cpustate))
/* Rotate Left the accumulator */
-#define OP_ROL(BCLK) \
- CLK(BCLK); \
- FLAG_C = (REG_A<<1) | CFLAG_AS_1(); \
+#define OP_ROL(BCLK) \
+ CLK(BCLK); \
+ FLAG_C = (REG_A<<1) | CFLAG_AS_1(); \
FLAG_NZ = REG_A = MAKE_UINT_8(FLAG_C)
/* Rotate Left an operand */
-#define OP_ROLM(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_C = (read_8_##MODE(DST)<<1) | CFLAG_AS_1(); \
- FLAG_NZ = MAKE_UINT_8(FLAG_C); \
+#define OP_ROLM(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_C = (read_8_##MODE(DST)<<1) | CFLAG_AS_1(); \
+ FLAG_NZ = MAKE_UINT_8(FLAG_C); \
write_8_##MODE(DST, FLAG_NZ)
/* Rotate Right the accumulator */
-#define OP_ROR(BCLK) \
- CLK(BCLK); \
- REG_A |= FLAG_C & 0x100; \
- FLAG_C = REG_A << 8; \
+#define OP_ROR(BCLK) \
+ CLK(BCLK); \
+ REG_A |= FLAG_C & 0x100; \
+ FLAG_C = REG_A << 8; \
FLAG_NZ = REG_A >>= 1
/* Rotate Right an operand */
-#define OP_RORM(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_NZ = read_8_##MODE(DST) | (FLAG_C & 0x100); \
- FLAG_C = FLAG_NZ << 8; \
- FLAG_NZ >>= 1; \
+#define OP_RORM(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_NZ = read_8_##MODE(DST) | (FLAG_C & 0x100); \
+ FLAG_C = FLAG_NZ << 8; \
+ FLAG_NZ >>= 1; \
write_8_##MODE(DST, FLAG_NZ)
/* Subtract with Carry */
-#define OP_SBC(BCLK, MODE) \
- CLK(BCLK); \
- SRC = OPER_8_##MODE(cpustate); \
+#define OP_SBC(BCLK, MODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##MODE(cpustate); \
TMP2 = REG_A - SRC - (CFLAG_AS_1() ^ 1); \
- SUBOP_ADC(REG_A, ~SRC); \
+ SUBOP_ADC(REG_A, ~SRC); \
FLAG_C = (TMP2 <= 0xff) ? CFLAG_SET : 0; \
REG_A = (UINT8)cpustate->spc_int16;
/* Subtract With Carry to memory */
-#define OP_SBCM(BCLK, SMODE, DMODE) \
- CLK(BCLK); \
- SRC = OPER_8_##SMODE(cpustate); \
- DST = EA_##DMODE(cpustate); \
- TMP3 = read_8_##DMODE(DST); \
- TMP2 = TMP3 - SRC - (CFLAG_AS_1() ^ 1); \
- SUBOP_ADC(~SRC, TMP3); \
+#define OP_SBCM(BCLK, SMODE, DMODE) \
+ CLK(BCLK); \
+ SRC = OPER_8_##SMODE(cpustate); \
+ DST = EA_##DMODE(cpustate); \
+ TMP3 = read_8_##DMODE(DST); \
+ TMP2 = TMP3 - SRC - (CFLAG_AS_1() ^ 1); \
+ SUBOP_ADC(~SRC, TMP3); \
FLAG_C = (TMP2 <= 0xff) ? CFLAG_SET : 0; \
write_8_##DMODE(DST, (UINT8)cpustate->spc_int16)
/* Set Carry flag */
-#define OP_SETC(BCLK) \
- CLK(BCLK); \
+#define OP_SETC(BCLK) \
+ CLK(BCLK); \
FLAG_C = CFLAG_SET
/* Set Page flag */
-#define OP_SETP(BCLK) \
- CLK(BCLK); \
+#define OP_SETP(BCLK) \
+ CLK(BCLK); \
FLAG_P = PFLAG_SET
/* Set Memory Bit */
-#define OP_SET(BCLK, BIT) \
- CLK(BCLK); \
- DST = EA_DP(cpustate); \
- SRC = read_8_DP(DST) | BIT; \
+#define OP_SET(BCLK, BIT) \
+ CLK(BCLK); \
+ DST = EA_DP(cpustate); \
+ SRC = read_8_DP(DST) | BIT; \
write_8_DP(DST, SRC)
/* Put the CPU to sleep */
-#define OP_SLEEP(BCLK) \
- CLK(BCLK); \
- CPU_STOPPED |= STOP_LEVEL_SLEEP; \
+#define OP_SLEEP(BCLK) \
+ CLK(BCLK); \
+ CPU_STOPPED |= STOP_LEVEL_SLEEP; \
CLK_ALL()
/* Stop the CPU */
-#define OP_STOP(BCLK) \
- CLK(BCLK); \
- CPU_STOPPED |= STOP_LEVEL_STOP; \
+#define OP_STOP(BCLK) \
+ CLK(BCLK); \
+ CPU_STOPPED |= STOP_LEVEL_STOP; \
CLK_ALL()
/* Subtract word */
-#define OP_SUBW(BCLK) \
- CLK(BCLK); \
- SRC = OPER_16_DP(cpustate); \
- DST = GET_REG_YA(); \
- TMP1 = ((DST) & 0xff) - ((SRC) & 0xff); \
- TMP2 = (TMP1 > 0xff) ? 1 : 0; \
- TMP3 = ((DST) >> 8) - ((SRC) >> 8) - TMP2; \
- cpustate->spc_int16 = ((TMP1 & 0xff) + (TMP3 << 8)) & 0xffff; \
- FLAG_C = (TMP3 <= 0xff) ? CFLAG_SET : 0; \
+#define OP_SUBW(BCLK) \
+ CLK(BCLK); \
+ SRC = OPER_16_DP(cpustate); \
+ DST = GET_REG_YA(); \
+ TMP1 = ((DST) & 0xff) - ((SRC) & 0xff); \
+ TMP2 = (TMP1 > 0xff) ? 1 : 0; \
+ TMP3 = ((DST) >> 8) - ((SRC) >> 8) - TMP2; \
+ cpustate->spc_int16 = ((TMP1 & 0xff) + (TMP3 << 8)) & 0xffff; \
+ FLAG_C = (TMP3 <= 0xff) ? CFLAG_SET : 0; \
FLAG_H = ((unsigned) ((((DST) >> 8) & 0x0F) - \
(((SRC) >> 8) & 0x0F) - TMP2)) > 0x0F ? 0: HFLAG_SET; \
FLAG_V = (((DST) ^ (SRC)) & ((DST) ^ (UINT16) cpustate->spc_int16) & 0x8000) ? VFLAG_SET : 0; \
- FLAG_Z = (cpustate->spc_int16 != 0); \
- FLAG_N = (cpustate->spc_int16>>8); \
+ FLAG_Z = (cpustate->spc_int16 != 0); \
+ FLAG_N = (cpustate->spc_int16>>8); \
SET_REG_YA(cpustate, cpustate->spc_int16);
/* Table Call */
-#define OP_TCALL(BCLK, NUM) \
- CLK(BCLK); \
- PUSH_16(cpustate, REG_PC); \
+#define OP_TCALL(BCLK, NUM) \
+ CLK(BCLK); \
+ PUSH_16(cpustate, REG_PC); \
JUMP(cpustate, read_16_NORM(0xffc0 + ((15-NUM)<<1)))
/* Test and Clear Bits */
-#define OP_TCLR1(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_NZ = read_8_##MODE(DST); \
- write_8_##MODE(DST, FLAG_NZ & ~REG_A); \
+#define OP_TCLR1(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_NZ = read_8_##MODE(DST); \
+ write_8_##MODE(DST, FLAG_NZ & ~REG_A); \
FLAG_NZ &= REG_A
/* Test and Set Bits */
-#define OP_TSET1(BCLK, MODE) \
- CLK(BCLK); \
- DST = EA_##MODE(cpustate); \
- FLAG_NZ = read_8_##MODE(DST); \
- write_8_##MODE(DST, FLAG_NZ | REG_A); \
+#define OP_TSET1(BCLK, MODE) \
+ CLK(BCLK); \
+ DST = EA_##MODE(cpustate); \
+ FLAG_NZ = read_8_##MODE(DST); \
+ write_8_##MODE(DST, FLAG_NZ | REG_A); \
FLAG_NZ &= REG_A
/* Exchange high and low nybbles of accumulator */
-#define OP_XCN(BCLK) \
- CLK(BCLK); \
+#define OP_XCN(BCLK) \
+ CLK(BCLK); \
FLAG_NZ = REG_A = MAKE_UINT_8((REG_A<<4) | (REG_A>>4))
-#define OP_ILLEGAL(BCLK) \
+#define OP_ILLEGAL(BCLK) \
CLK(BCLK)
@@ -1697,17 +1697,17 @@ static CPU_SET_INFO( spc700 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: spc700_set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: spc700_set_nmi_line(cpustate, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: spc700_set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: spc700_set_nmi_line(cpustate, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SPC700_PC: REG_PC = MAKE_UINT_16(info->i); break;
+ case CPUINFO_INT_REGISTER + SPC700_PC: REG_PC = MAKE_UINT_16(info->i); break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + SPC700_S: REG_S = MAKE_UINT_8(info->i); break;
- case CPUINFO_INT_REGISTER + SPC700_P: SET_REG_P(cpustate, info->i); break;
- case CPUINFO_INT_REGISTER + SPC700_A: REG_A = MAKE_UINT_8(info->i); break;
- case CPUINFO_INT_REGISTER + SPC700_X: REG_X = MAKE_UINT_8(info->i); break;
- case CPUINFO_INT_REGISTER + SPC700_Y: REG_Y = MAKE_UINT_8(info->i); break;
+ case CPUINFO_INT_REGISTER + SPC700_S: REG_S = MAKE_UINT_8(info->i); break;
+ case CPUINFO_INT_REGISTER + SPC700_P: SET_REG_P(cpustate, info->i); break;
+ case CPUINFO_INT_REGISTER + SPC700_A: REG_A = MAKE_UINT_8(info->i); break;
+ case CPUINFO_INT_REGISTER + SPC700_X: REG_X = MAKE_UINT_8(info->i); break;
+ case CPUINFO_INT_REGISTER + SPC700_Y: REG_Y = MAKE_UINT_8(info->i); break;
}
}
@@ -1724,69 +1724,69 @@ CPU_GET_INFO( spc700 )
if (cpustate != NULL)
{
- p = ((cpustate->flag_n & 0x80) |
- ((cpustate->flag_v & 0x80) >> 1) |
- cpustate->flag_p>>3 |
- cpustate->flag_b |
- (cpustate->flag_h & HFLAG_SET) |
- cpustate->flag_i |
- ((!cpustate->flag_z) << 1) |
+ p = ((cpustate->flag_n & 0x80) |
+ ((cpustate->flag_v & 0x80) >> 1) |
+ cpustate->flag_p>>3 |
+ cpustate->flag_b |
+ (cpustate->flag_h & HFLAG_SET) |
+ cpustate->flag_i |
+ ((!cpustate->flag_z) << 1) |
((cpustate->flag_c >> 8)&1));
}
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(spc700i_cpu); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 8; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = (LINE_IRQ == IRQ_SET) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = REG_PPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(spc700i_cpu); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 8; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = (LINE_IRQ == IRQ_SET) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = REG_PPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SPC700_PC: info->i = REG_PC; break;
+ case CPUINFO_INT_REGISTER + SPC700_PC: info->i = REG_PC; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + SPC700_S: info->i = REG_S + STACK_PAGE; break;
- case CPUINFO_INT_REGISTER + SPC700_P: info->i = GET_REG_P(); break;
- case CPUINFO_INT_REGISTER + SPC700_A: info->i = REG_A; break;
- case CPUINFO_INT_REGISTER + SPC700_X: info->i = REG_X; break;
- case CPUINFO_INT_REGISTER + SPC700_Y: info->i = REG_Y; break;
+ case CPUINFO_INT_REGISTER + SPC700_S: info->i = REG_S + STACK_PAGE; break;
+ case CPUINFO_INT_REGISTER + SPC700_P: info->i = GET_REG_P(); break;
+ case CPUINFO_INT_REGISTER + SPC700_A: info->i = REG_A; break;
+ case CPUINFO_INT_REGISTER + SPC700_X: info->i = REG_X; break;
+ case CPUINFO_INT_REGISTER + SPC700_Y: info->i = REG_Y; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(spc700); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(spc700); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(spc700); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(spc700); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(spc700); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(spc700); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->ICount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(spc700); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(spc700); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(spc700); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(spc700); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(spc700); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(spc700); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->ICount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SPC700"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Sony SPC700"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME team, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SPC700"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Sony SPC700"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME team, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -1800,12 +1800,12 @@ CPU_GET_INFO( spc700 )
p & 0x01 ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + SPC700_PC: sprintf(info->s, "PC:%04X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + SPC700_S: sprintf(info->s, "S:%02X", cpustate->s); break;
- case CPUINFO_STR_REGISTER + SPC700_P: sprintf(info->s, "P:%02X", p); break;
- case CPUINFO_STR_REGISTER + SPC700_A: sprintf(info->s, "A:%02X", cpustate->a); break;
- case CPUINFO_STR_REGISTER + SPC700_X: sprintf(info->s, "X:%02X", cpustate->x); break;
- case CPUINFO_STR_REGISTER + SPC700_Y: sprintf(info->s, "Y:%02X", cpustate->y); break;
+ case CPUINFO_STR_REGISTER + SPC700_PC: sprintf(info->s, "PC:%04X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + SPC700_S: sprintf(info->s, "S:%02X", cpustate->s); break;
+ case CPUINFO_STR_REGISTER + SPC700_P: sprintf(info->s, "P:%02X", p); break;
+ case CPUINFO_STR_REGISTER + SPC700_A: sprintf(info->s, "A:%02X", cpustate->a); break;
+ case CPUINFO_STR_REGISTER + SPC700_X: sprintf(info->s, "X:%02X", cpustate->x); break;
+ case CPUINFO_STR_REGISTER + SPC700_Y: sprintf(info->s, "Y:%02X", cpustate->y); break;
}
}
diff --git a/src/emu/cpu/spc700/spc700.h b/src/emu/cpu/spc700/spc700.h
index a5700a28aaf..f29e9de328b 100644
--- a/src/emu/cpu/spc700/spc700.h
+++ b/src/emu/cpu/spc700/spc700.h
@@ -26,9 +26,9 @@ enum
SPC700_PC=1, SPC700_S, SPC700_P, SPC700_A, SPC700_X, SPC700_Y
};
-#define SPC700_INT_NONE 0
-#define SPC700_INT_IRQ 1
-#define SPC700_INT_NMI 2
+#define SPC700_INT_NONE 0
+#define SPC700_INT_IRQ 1
+#define SPC700_INT_NMI 2
/* ======================================================================== */
diff --git a/src/emu/cpu/ssem/ssem.c b/src/emu/cpu/ssem/ssem.c
index f7660ecf8d8..91ec15cfc46 100644
--- a/src/emu/cpu/ssem/ssem.c
+++ b/src/emu/cpu/ssem/ssem.c
@@ -25,51 +25,51 @@ CPU_DISASSEMBLE( ssem );
// un-reversed before being used.
INLINE UINT32 reverse(UINT32 v)
{
- // Taken from http://www-graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
- // swap odd and even bits
- v = ((v >> 1) & 0x55555555) | ((v & 0x55555555) << 1);
- // swap consecutive pairs
- v = ((v >> 2) & 0x33333333) | ((v & 0x33333333) << 2);
- // swap nibbles ...
- v = ((v >> 4) & 0x0F0F0F0F) | ((v & 0x0F0F0F0F) << 4);
- // swap bytes
- v = ((v >> 8) & 0x00FF00FF) | ((v & 0x00FF00FF) << 8);
- // swap 2-byte long pairs
- v = ( v >> 16 ) | ( v << 16);
-
- return v;
+ // Taken from http://www-graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
+ // swap odd and even bits
+ v = ((v >> 1) & 0x55555555) | ((v & 0x55555555) << 1);
+ // swap consecutive pairs
+ v = ((v >> 2) & 0x33333333) | ((v & 0x33333333) << 2);
+ // swap nibbles ...
+ v = ((v >> 4) & 0x0F0F0F0F) | ((v & 0x0F0F0F0F) << 4);
+ // swap bytes
+ v = ((v >> 8) & 0x00FF00FF) | ((v & 0x00FF00FF) << 8);
+ // swap 2-byte long pairs
+ v = ( v >> 16 ) | ( v << 16);
+
+ return v;
}
inline UINT32 ssem_device::program_read32(UINT32 address)
{
- UINT32 v = 0;
- // The MAME core does not have a good way of specifying a minimum datum size that is more than
- // 8 bits in width. The minimum datum width on the SSEM is 32 bits, so we need to quadruple
- // the address value to get the appropriate byte index.
- address <<= 2;
-
- v |= m_program->read_byte(address + 0) << 24;
- v |= m_program->read_byte(address + 1) << 16;
- v |= m_program->read_byte(address + 2) << 8;
- v |= m_program->read_byte(address + 3) << 0;
-
- return reverse(v);
+ UINT32 v = 0;
+ // The MAME core does not have a good way of specifying a minimum datum size that is more than
+ // 8 bits in width. The minimum datum width on the SSEM is 32 bits, so we need to quadruple
+ // the address value to get the appropriate byte index.
+ address <<= 2;
+
+ v |= m_program->read_byte(address + 0) << 24;
+ v |= m_program->read_byte(address + 1) << 16;
+ v |= m_program->read_byte(address + 2) << 8;
+ v |= m_program->read_byte(address + 3) << 0;
+
+ return reverse(v);
}
inline void ssem_device::program_write32(UINT32 address, UINT32 data)
{
- UINT32 v = reverse(data);
-
- // The MAME core does not have a good way of specifying a minimum datum size that is more than
- // 8 bits in width. The minimum datum width on the SSEM is 32 bits, so we need to quadruple
- // the address value to get the appropriate byte index.
- address <<= 2;
-
- m_program->write_byte(address + 0, (v >> 24) & 0x000000ff);
- m_program->write_byte(address + 1, (v >> 16) & 0x000000ff);
- m_program->write_byte(address + 2, (v >> 8) & 0x000000ff);
- m_program->write_byte(address + 3, (v >> 0) & 0x000000ff);
- return;
+ UINT32 v = reverse(data);
+
+ // The MAME core does not have a good way of specifying a minimum datum size that is more than
+ // 8 bits in width. The minimum datum width on the SSEM is 32 bits, so we need to quadruple
+ // the address value to get the appropriate byte index.
+ address <<= 2;
+
+ m_program->write_byte(address + 0, (v >> 24) & 0x000000ff);
+ m_program->write_byte(address + 1, (v >> 16) & 0x000000ff);
+ m_program->write_byte(address + 2, (v >> 8) & 0x000000ff);
+ m_program->write_byte(address + 3, (v >> 0) & 0x000000ff);
+ return;
}
/*****************************************************************************/
@@ -82,14 +82,14 @@ const device_type SSEMCPU = &device_creator<ssem_device>;
ssem_device::ssem_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, SSEMCPU, "SSEMCPU", tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 8, 16),
- m_pc(1),
- m_shifted_pc(1<<2),
- m_a(0),
- m_halt(0),
- m_icount(0)
+ m_program_config("program", ENDIANNESS_LITTLE, 8, 16),
+ m_pc(1),
+ m_shifted_pc(1<<2),
+ m_a(0),
+ m_halt(0),
+ m_icount(0)
{
- // Allocate & setup
+ // Allocate & setup
}
@@ -101,8 +101,8 @@ void ssem_device::device_start()
astring tempstr;
state_add(STATE_GENPC, "GENPC", m_pc).noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_halt).callimport().callexport().formatstr("%1s").noshow();
- state_add(SSEM_PC, "PC", m_shifted_pc).mask(0xffff);
- state_add(SSEM_A, "A", m_a).mask(0xffffffff);
+ state_add(SSEM_PC, "PC", m_shifted_pc).mask(0xffff);
+ state_add(SSEM_A, "A", m_a).mask(0xffffffff);
state_add(SSEM_HALT, "HALT", m_halt).mask(0xf);
/* setup regtable */
@@ -120,10 +120,10 @@ void ssem_device::device_stop()
void ssem_device::device_reset()
{
- m_pc = 1;
- m_shifted_pc = m_pc << 2;
- m_a = 0;
- m_halt = 0;
+ m_pc = 1;
+ m_shifted_pc = m_pc << 2;
+ m_a = 0;
+ m_halt = 0;
}
@@ -247,68 +247,68 @@ void ssem_device::execute_set_input(int inputnum, int state)
void ssem_device::execute_run()
{
- UINT32 op;
-
- m_pc &= 0x1f;
- m_shifted_pc = m_pc << 2;
-
- while (m_icount > 0)
- {
- debugger_instruction_hook(this, m_pc);
-
- op = program_read32(m_pc);
-
- if( !m_halt )
- {
- m_pc++;
- m_shifted_pc = m_pc << 2;
- }
- else
- {
- op = 0x0000e000;
- }
-
- switch (INSTR)
- {
- case 0:
- // JMP: Move the value at the specified address into the Program Counter.
- m_pc = program_read32(ADDR) + 1;
- m_shifted_pc = m_pc << 2;
- break;
- case 1:
- // JRP: Add the value at the specified address to the Program Counter.
- m_pc += (INT32)program_read32(ADDR);
- m_shifted_pc = m_pc << 2;
- break;
- case 2:
- // LDN: Load the accumulator with the two's-complement negation of the value at the specified address.
- m_a = (UINT32)(0 - (INT32)program_read32(ADDR));
- break;
- case 3:
- // STO: Store the value in the accumulator at the specified address.
- program_write32(ADDR, m_a);
- break;
- case 4:
- case 5:
- // SUB: Subtract the value at the specified address from the accumulator.
- m_a -= program_read32(ADDR);
- break;
- case 6:
- // CMP: If the accumulator is less than zero, skip the next opcode.
- if((INT32)(m_a) < 0)
- {
- m_pc++;
- m_shifted_pc = m_pc << 2;
- }
- break;
- case 7:
- // STP: Halt the computer.
- m_halt = 1;
- break;
- default:
- break;
- }
-
- --m_icount;
- }
+ UINT32 op;
+
+ m_pc &= 0x1f;
+ m_shifted_pc = m_pc << 2;
+
+ while (m_icount > 0)
+ {
+ debugger_instruction_hook(this, m_pc);
+
+ op = program_read32(m_pc);
+
+ if( !m_halt )
+ {
+ m_pc++;
+ m_shifted_pc = m_pc << 2;
+ }
+ else
+ {
+ op = 0x0000e000;
+ }
+
+ switch (INSTR)
+ {
+ case 0:
+ // JMP: Move the value at the specified address into the Program Counter.
+ m_pc = program_read32(ADDR) + 1;
+ m_shifted_pc = m_pc << 2;
+ break;
+ case 1:
+ // JRP: Add the value at the specified address to the Program Counter.
+ m_pc += (INT32)program_read32(ADDR);
+ m_shifted_pc = m_pc << 2;
+ break;
+ case 2:
+ // LDN: Load the accumulator with the two's-complement negation of the value at the specified address.
+ m_a = (UINT32)(0 - (INT32)program_read32(ADDR));
+ break;
+ case 3:
+ // STO: Store the value in the accumulator at the specified address.
+ program_write32(ADDR, m_a);
+ break;
+ case 4:
+ case 5:
+ // SUB: Subtract the value at the specified address from the accumulator.
+ m_a -= program_read32(ADDR);
+ break;
+ case 6:
+ // CMP: If the accumulator is less than zero, skip the next opcode.
+ if((INT32)(m_a) < 0)
+ {
+ m_pc++;
+ m_shifted_pc = m_pc << 2;
+ }
+ break;
+ case 7:
+ // STP: Halt the computer.
+ m_halt = 1;
+ break;
+ default:
+ break;
+ }
+
+ --m_icount;
+ }
}
diff --git a/src/emu/cpu/ssem/ssem.h b/src/emu/cpu/ssem/ssem.h
index 85b622ace1e..5c7b6199213 100644
--- a/src/emu/cpu/ssem/ssem.h
+++ b/src/emu/cpu/ssem/ssem.h
@@ -53,16 +53,16 @@ public:
inline void program_write32(UINT32 addr, UINT32 data);
// CPU registers
- UINT32 m_pc;
- UINT32 m_shifted_pc;
- UINT32 m_a;
- UINT32 m_halt;
+ UINT32 m_pc;
+ UINT32 m_shifted_pc;
+ UINT32 m_a;
+ UINT32 m_halt;
// other internal states
- int m_icount;
+ int m_icount;
// address spaces
- address_space *m_program;
+ address_space *m_program;
};
// device type definition
@@ -74,9 +74,9 @@ extern const device_type SSEMCPU;
enum
{
- SSEM_PC = 1,
- SSEM_A,
- SSEM_HALT,
+ SSEM_PC = 1,
+ SSEM_A,
+ SSEM_HALT,
};
CPU_DISASSEMBLE( ssem );
diff --git a/src/emu/cpu/ssem/ssemdasm.c b/src/emu/cpu/ssem/ssemdasm.c
index aa9c7d3c333..4b746ac0fce 100644
--- a/src/emu/cpu/ssem/ssemdasm.c
+++ b/src/emu/cpu/ssem/ssemdasm.c
@@ -10,76 +10,76 @@ static char *output;
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
{
- va_list vl;
+ va_list vl;
- va_start(vl, fmt);
- output += vsprintf(output, fmt, vl);
- va_end(vl);
+ va_start(vl, fmt);
+ output += vsprintf(output, fmt, vl);
+ va_end(vl);
}
INLINE UINT32 reverse(UINT32 v)
{
- // Taken from http://www-graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
- // swap odd and even bits
- v = ((v >> 1) & 0x55555555) | ((v & 0x55555555) << 1);
- // swap consecutive pairs
- v = ((v >> 2) & 0x33333333) | ((v & 0x33333333) << 2);
- // swap nibbles ...
- v = ((v >> 4) & 0x0F0F0F0F) | ((v & 0x0F0F0F0F) << 4);
- // swap bytes
- v = ((v >> 8) & 0x00FF00FF) | ((v & 0x00FF00FF) << 8);
- // swap 2-byte long pairs
- v = ( v >> 16 ) | ( v << 16);
+ // Taken from http://www-graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
+ // swap odd and even bits
+ v = ((v >> 1) & 0x55555555) | ((v & 0x55555555) << 1);
+ // swap consecutive pairs
+ v = ((v >> 2) & 0x33333333) | ((v & 0x33333333) << 2);
+ // swap nibbles ...
+ v = ((v >> 4) & 0x0F0F0F0F) | ((v & 0x0F0F0F0F) << 4);
+ // swap bytes
+ v = ((v >> 8) & 0x00FF00FF) | ((v & 0x00FF00FF) << 8);
+ // swap 2-byte long pairs
+ v = ( v >> 16 ) | ( v << 16);
- return v;
+ return v;
}
offs_t ssem_dasm_one(char *buffer, offs_t pc, UINT32 op)
{
- UINT8 instr = (reverse(op) >> 13) & 7;
- UINT8 addr = reverse(op) & 0x1f;
+ UINT8 instr = (reverse(op) >> 13) & 7;
+ UINT8 addr = reverse(op) & 0x1f;
- output = buffer;
+ output = buffer;
- switch (instr)
- {
- case 0: // JMP S
- print("JMP %d", addr);
- break;
- case 1: // JRP S
- print("JRP %d", addr);
- break;
- case 2: // LDN S
- print("LDN %d", addr);
- break;
- case 3: // STO S
- print("STO %d", addr);
- break;
- case 4: // SUB S
- case 5:
- print("SUB %d", addr);
- break;
- case 6: // CMP
- print("CMP");
- break;
- case 7: // STP
- print("STP");
- break;
- default:
- print("???");
- break;
- }
+ switch (instr)
+ {
+ case 0: // JMP S
+ print("JMP %d", addr);
+ break;
+ case 1: // JRP S
+ print("JRP %d", addr);
+ break;
+ case 2: // LDN S
+ print("LDN %d", addr);
+ break;
+ case 3: // STO S
+ print("STO %d", addr);
+ break;
+ case 4: // SUB S
+ case 5:
+ print("SUB %d", addr);
+ break;
+ case 6: // CMP
+ print("CMP");
+ break;
+ case 7: // STP
+ print("STP");
+ break;
+ default:
+ print("???");
+ break;
+ }
- return 4 | DASMFLAG_SUPPORTED;
+ return 4 | DASMFLAG_SUPPORTED;
}
/*****************************************************************************/
CPU_DISASSEMBLE( ssem )
{
- UINT32 op = (*(UINT8 *)(opram + 0) << 24) |
- (*(UINT8 *)(opram + 1) << 16) |
- (*(UINT8 *)(opram + 2) << 8) |
- (*(UINT8 *)(opram + 3) << 0);
- return ssem_dasm_one(buffer, pc, op);
+ UINT32 op = (*(UINT8 *)(opram + 0) << 24) |
+ (*(UINT8 *)(opram + 1) << 16) |
+ (*(UINT8 *)(opram + 2) << 8) |
+ (*(UINT8 *)(opram + 3) << 0);
+ return ssem_dasm_one(buffer, pc, op);
}
diff --git a/src/emu/cpu/ssp1601/ssp1601.c b/src/emu/cpu/ssp1601/ssp1601.c
index dd3f03e5987..921562c283f 100644
--- a/src/emu/cpu/ssp1601/ssp1601.c
+++ b/src/emu/cpu/ssp1601/ssp1601.c
@@ -31,7 +31,7 @@ CPU_DISASSEMBLE( ssp1601 );
struct ssp1601_state_t
{
- PAIR gr[8]; /* general regs, some are 16bit, some 32bit */
+ PAIR gr[8]; /* general regs, some are 16bit, some 32bit */
union {
unsigned char r[8]; /* pointer registers, 4 for earch bank */
struct {
@@ -70,7 +70,7 @@ INLINE ssp1601_state_t *get_safe_token(device_t *device)
#define rX ssp1601_state->gr[SSP_X].w.h
#define rY ssp1601_state->gr[SSP_Y].w.h
#define rA ssp1601_state->gr[SSP_A].w.h
-#define rST ssp1601_state->gr[SSP_ST].w.h // 4
+#define rST ssp1601_state->gr[SSP_ST].w.h // 4
#define rSTACK ssp1601_state->gr[SSP_STACK].w.h
#define rPC ssp1601_state->gr[SSP_PC].w.h
#define rP ssp1601_state->gr[SSP_P]
@@ -329,15 +329,15 @@ typedef void (*write_func_t)(ssp1601_state_t *ssp1601_state, int reg, UINT32 d);
static const read_func_t reg_read_handlers[16] =
{
read_unknown, read_unknown, read_unknown, read_unknown, // -, X, Y, A
- read_unknown, // 4 ST
+ read_unknown, // 4 ST
read_STACK,
read_PC,
read_P,
- read_ext, // 8
+ read_ext, // 8
read_ext,
read_ext,
read_ext,
- read_ext, // 12
+ read_ext, // 12
read_ext,
read_ext,
read_AL
@@ -349,12 +349,12 @@ static const write_func_t reg_write_handlers[16] =
write_ST,
write_STACK,
write_PC,
- write_unknown, // 7 P (not writable)
- write_ext, // 8
+ write_unknown, // 7 P (not writable)
+ write_ext, // 8
write_ext,
write_ext,
write_ext,
- write_ext, // 12
+ write_ext, // 12
write_ext,
write_ext,
write_AL
@@ -395,27 +395,27 @@ static UINT32 ptr1_read_(ssp1601_state_t *ssp1601_state, int ri, int isj2, int m
case 0x10:
case 0x11:
case 0x12: rp = &ssp1601_state->r0[t&3]; t = ssp1601_state->RAM0[*rp];
- if (!(rST&7)) { (*rp)--; return t; }
- add = -1; goto modulo;
+ if (!(rST&7)) { (*rp)--; return t; }
+ add = -1; goto modulo;
case 0x13: return ssp1601_state->RAM0[2];
case 0x14:
case 0x15:
case 0x16: rp = &ssp1601_state->r1[t&3]; t = ssp1601_state->RAM1[*rp];
- if (!(rST&7)) { (*rp)--; return t; }
- add = -1; goto modulo;
+ if (!(rST&7)) { (*rp)--; return t; }
+ add = -1; goto modulo;
case 0x17: return ssp1601_state->RAM1[2];
// mod=3 (11), "+"
case 0x18:
case 0x19:
case 0x1a: rp = &ssp1601_state->r0[t&3]; t = ssp1601_state->RAM0[*rp];
- if (!(rST&7)) { (*rp)++; return t; }
- add = 1; goto modulo;
+ if (!(rST&7)) { (*rp)++; return t; }
+ add = 1; goto modulo;
case 0x1b: return ssp1601_state->RAM0[3];
case 0x1c:
case 0x1d:
case 0x1e: rp = &ssp1601_state->r1[t&3]; t = ssp1601_state->RAM1[*rp];
- if (!(rST&7)) { (*rp)++; return t; }
- add = 1; goto modulo;
+ if (!(rST&7)) { (*rp)++; return t; }
+ add = 1; goto modulo;
case 0x1f: return ssp1601_state->RAM1[3];
}
@@ -496,7 +496,7 @@ static UINT32 ptr2_read(ssp1601_state_t *ssp1601_state, int op)
case 0x1b: mv = ssp1601_state->RAM0[3]++; break;
case 0x1f: mv = ssp1601_state->RAM1[3]++; break;
default: logerror(__FILE__ " FIXME: unimplemented mod in ((rX)) @ %04x\n", GET_PPC_OFFS());
- return 0;
+ return 0;
}
return PROGRAM_WORD(mv);
@@ -768,28 +768,28 @@ static CPU_SET_INFO( ssp1601 )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_REGISTER + SSP_X: rX = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_Y: rY = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_A: rA32 = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_ST: rST = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_STACK: rSTACK = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_X: rX = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_Y: rY = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_A: rA32 = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_ST: rST = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK: rSTACK = info->i; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SSP_PC: rPC = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_P: rP.d = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_STACK0: ssp1601_state->stack[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_STACK1: ssp1601_state->stack[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_STACK2: ssp1601_state->stack[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_STACK3: ssp1601_state->stack[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_STACK4: ssp1601_state->stack[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_STACK5: ssp1601_state->stack[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR0: ssp1601_state->r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR1: ssp1601_state->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR2: ssp1601_state->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR3: ssp1601_state->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR4: ssp1601_state->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR5: ssp1601_state->r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR6: ssp1601_state->r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SSP_PR7: ssp1601_state->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PC: rPC = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_P: rP.d = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK0: ssp1601_state->stack[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK1: ssp1601_state->stack[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK2: ssp1601_state->stack[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK3: ssp1601_state->stack[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK4: ssp1601_state->stack[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK5: ssp1601_state->stack[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR0: ssp1601_state->r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR1: ssp1601_state->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR2: ssp1601_state->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR3: ssp1601_state->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR4: ssp1601_state->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR5: ssp1601_state->r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR6: ssp1601_state->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SSP_PR7: ssp1601_state->r[7] = info->i; break;
// case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(0, info->i); break;
// case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(1, info->i); break;
@@ -808,102 +808,102 @@ CPU_GET_INFO( ssp1601 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ssp1601_state_t); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 4; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: /* not implemented */ break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
-
- case CPUINFO_INT_REGISTER + SSP_R0: info->i = ssp1601_state->gr[0].w.h; break;
- case CPUINFO_INT_REGISTER + SSP_X: info->i = rX; break;
- case CPUINFO_INT_REGISTER + SSP_Y: info->i = rY; break;
- case CPUINFO_INT_REGISTER + SSP_A: info->i = rA32; break;
- case CPUINFO_INT_REGISTER + SSP_ST: info->i = rST; break;
- case CPUINFO_INT_REGISTER + SSP_STACK: info->i = rSTACK; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(ssp1601_state_t); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 4; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 4; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: /* not implemented */ break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
+
+ case CPUINFO_INT_REGISTER + SSP_R0: info->i = ssp1601_state->gr[0].w.h; break;
+ case CPUINFO_INT_REGISTER + SSP_X: info->i = rX; break;
+ case CPUINFO_INT_REGISTER + SSP_Y: info->i = rY; break;
+ case CPUINFO_INT_REGISTER + SSP_A: info->i = rA32; break;
+ case CPUINFO_INT_REGISTER + SSP_ST: info->i = rST; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK: info->i = rSTACK; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SSP_PC: info->i = rPC; break;
- case CPUINFO_INT_REGISTER + SSP_P: info->i = rP.d; break;
- case CPUINFO_INT_REGISTER + SSP_STACK0: info->i = ssp1601_state->stack[0]; break;
- case CPUINFO_INT_REGISTER + SSP_STACK1: info->i = ssp1601_state->stack[1]; break;
- case CPUINFO_INT_REGISTER + SSP_STACK2: info->i = ssp1601_state->stack[2]; break;
- case CPUINFO_INT_REGISTER + SSP_STACK3: info->i = ssp1601_state->stack[3]; break;
- case CPUINFO_INT_REGISTER + SSP_STACK4: info->i = ssp1601_state->stack[4]; break;
- case CPUINFO_INT_REGISTER + SSP_STACK5: info->i = ssp1601_state->stack[5]; break;
- case CPUINFO_INT_REGISTER + SSP_PR0: info->i = ssp1601_state->r[0]; break;
- case CPUINFO_INT_REGISTER + SSP_PR1: info->i = ssp1601_state->r[1]; break;
- case CPUINFO_INT_REGISTER + SSP_PR2: info->i = ssp1601_state->r[2]; break;
- case CPUINFO_INT_REGISTER + SSP_PR3: info->i = ssp1601_state->r[3]; break;
- case CPUINFO_INT_REGISTER + SSP_PR4: info->i = ssp1601_state->r[4]; break;
- case CPUINFO_INT_REGISTER + SSP_PR5: info->i = ssp1601_state->r[5]; break;
- case CPUINFO_INT_REGISTER + SSP_PR6: info->i = ssp1601_state->r[6]; break;
- case CPUINFO_INT_REGISTER + SSP_PR7: info->i = ssp1601_state->r[7]; break;
+ case CPUINFO_INT_REGISTER + SSP_PC: info->i = rPC; break;
+ case CPUINFO_INT_REGISTER + SSP_P: info->i = rP.d; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK0: info->i = ssp1601_state->stack[0]; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK1: info->i = ssp1601_state->stack[1]; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK2: info->i = ssp1601_state->stack[2]; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK3: info->i = ssp1601_state->stack[3]; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK4: info->i = ssp1601_state->stack[4]; break;
+ case CPUINFO_INT_REGISTER + SSP_STACK5: info->i = ssp1601_state->stack[5]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR0: info->i = ssp1601_state->r[0]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR1: info->i = ssp1601_state->r[1]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR2: info->i = ssp1601_state->r[2]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR3: info->i = ssp1601_state->r[3]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR4: info->i = ssp1601_state->r[4]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR5: info->i = ssp1601_state->r[5]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR6: info->i = ssp1601_state->r[6]; break;
+ case CPUINFO_INT_REGISTER + SSP_PR7: info->i = ssp1601_state->r[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ssp1601); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ssp1601); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ssp1601); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ssp1601); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ssp1601); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ssp1601); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ssp1601_state->g_cycles; break;
-
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = NULL; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map16 = NULL; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(ssp1601); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(ssp1601); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(ssp1601); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(ssp1601); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(ssp1601); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(ssp1601); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &ssp1601_state->g_cycles; break;
+
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = NULL; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_IO: info->internal_map16 = NULL; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SSP1601"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "SSP1601 DSP"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Grazvydas Ignotas"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "SSP1601"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "SSP1601 DSP"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Grazvydas Ignotas"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c", (rST&SSP_FLAG_N)?'N':'.', (rST&SSP_FLAG_V)?'V':'.',
(rST&SSP_FLAG_Z)?'Z':'.', (rST&SSP_FLAG_L)?'L':'.');
break;
- case CPUINFO_STR_REGISTER + SSP_R0: sprintf(info->s, "REG0 :%04X", ssp1601_state->gr[0].w.h); break;
- case CPUINFO_STR_REGISTER + SSP_X: sprintf(info->s, "X :%04X", rX); break;
- case CPUINFO_STR_REGISTER + SSP_Y: sprintf(info->s, "Y :%04X", rY); break;
- case CPUINFO_STR_REGISTER + SSP_A: sprintf(info->s, "A :%08X", rA32); break;
- case CPUINFO_STR_REGISTER + SSP_ST: sprintf(info->s, "ST :%04X", rST); break;
- case CPUINFO_STR_REGISTER + SSP_STACK: sprintf(info->s, "STACK :%04X", rSTACK); break;
- case CPUINFO_STR_REGISTER + SSP_PC: sprintf(info->s, "PC :%04X", rPC); break;
- case CPUINFO_STR_REGISTER + SSP_P: sprintf(info->s, "P :%08X", rP.d); break;
- case CPUINFO_STR_REGISTER + SSP_STACK0: sprintf(info->s, "STACK0 :%04X", ssp1601_state->stack[0]); break;
- case CPUINFO_STR_REGISTER + SSP_STACK1: sprintf(info->s, "STACK1 :%04X", ssp1601_state->stack[1]); break;
- case CPUINFO_STR_REGISTER + SSP_STACK2: sprintf(info->s, "STACK2 :%04X", ssp1601_state->stack[2]); break;
- case CPUINFO_STR_REGISTER + SSP_STACK3: sprintf(info->s, "STACK3 :%04X", ssp1601_state->stack[3]); break;
- case CPUINFO_STR_REGISTER + SSP_STACK4: sprintf(info->s, "STACK4 :%04X", ssp1601_state->stack[4]); break;
- case CPUINFO_STR_REGISTER + SSP_STACK5: sprintf(info->s, "STACK5 :%04X", ssp1601_state->stack[5]); break;
- case CPUINFO_STR_REGISTER + SSP_PR0: sprintf(info->s, "R0 :%02X", ssp1601_state->r[0]); break;
- case CPUINFO_STR_REGISTER + SSP_PR1: sprintf(info->s, "R1 :%02X", ssp1601_state->r[1]); break;
- case CPUINFO_STR_REGISTER + SSP_PR2: sprintf(info->s, "R2 :%02X", ssp1601_state->r[2]); break;
- case CPUINFO_STR_REGISTER + SSP_PR3: sprintf(info->s, "R3 :%02X", ssp1601_state->r[3]); break;
- case CPUINFO_STR_REGISTER + SSP_PR4: sprintf(info->s, "R4 :%02X", ssp1601_state->r[4]); break;
- case CPUINFO_STR_REGISTER + SSP_PR5: sprintf(info->s, "R5 :%02X", ssp1601_state->r[5]); break;
- case CPUINFO_STR_REGISTER + SSP_PR6: sprintf(info->s, "R6 :%02X", ssp1601_state->r[6]); break;
- case CPUINFO_STR_REGISTER + SSP_PR7: sprintf(info->s, "R7 :%02X", ssp1601_state->r[7]); break;
+ case CPUINFO_STR_REGISTER + SSP_R0: sprintf(info->s, "REG0 :%04X", ssp1601_state->gr[0].w.h); break;
+ case CPUINFO_STR_REGISTER + SSP_X: sprintf(info->s, "X :%04X", rX); break;
+ case CPUINFO_STR_REGISTER + SSP_Y: sprintf(info->s, "Y :%04X", rY); break;
+ case CPUINFO_STR_REGISTER + SSP_A: sprintf(info->s, "A :%08X", rA32); break;
+ case CPUINFO_STR_REGISTER + SSP_ST: sprintf(info->s, "ST :%04X", rST); break;
+ case CPUINFO_STR_REGISTER + SSP_STACK: sprintf(info->s, "STACK :%04X", rSTACK); break;
+ case CPUINFO_STR_REGISTER + SSP_PC: sprintf(info->s, "PC :%04X", rPC); break;
+ case CPUINFO_STR_REGISTER + SSP_P: sprintf(info->s, "P :%08X", rP.d); break;
+ case CPUINFO_STR_REGISTER + SSP_STACK0: sprintf(info->s, "STACK0 :%04X", ssp1601_state->stack[0]); break;
+ case CPUINFO_STR_REGISTER + SSP_STACK1: sprintf(info->s, "STACK1 :%04X", ssp1601_state->stack[1]); break;
+ case CPUINFO_STR_REGISTER + SSP_STACK2: sprintf(info->s, "STACK2 :%04X", ssp1601_state->stack[2]); break;
+ case CPUINFO_STR_REGISTER + SSP_STACK3: sprintf(info->s, "STACK3 :%04X", ssp1601_state->stack[3]); break;
+ case CPUINFO_STR_REGISTER + SSP_STACK4: sprintf(info->s, "STACK4 :%04X", ssp1601_state->stack[4]); break;
+ case CPUINFO_STR_REGISTER + SSP_STACK5: sprintf(info->s, "STACK5 :%04X", ssp1601_state->stack[5]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR0: sprintf(info->s, "R0 :%02X", ssp1601_state->r[0]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR1: sprintf(info->s, "R1 :%02X", ssp1601_state->r[1]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR2: sprintf(info->s, "R2 :%02X", ssp1601_state->r[2]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR3: sprintf(info->s, "R3 :%02X", ssp1601_state->r[3]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR4: sprintf(info->s, "R4 :%02X", ssp1601_state->r[4]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR5: sprintf(info->s, "R5 :%02X", ssp1601_state->r[5]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR6: sprintf(info->s, "R6 :%02X", ssp1601_state->r[6]); break;
+ case CPUINFO_STR_REGISTER + SSP_PR7: sprintf(info->s, "R7 :%02X", ssp1601_state->r[7]); break;
}
}
diff --git a/src/emu/cpu/ssp1601/ssp1601d.c b/src/emu/cpu/ssp1601/ssp1601d.c
index 9952afe6db5..438294cd6a6 100644
--- a/src/emu/cpu/ssp1601/ssp1601d.c
+++ b/src/emu/cpu/ssp1601/ssp1601d.c
@@ -58,15 +58,15 @@ static const char *const arith_ops[8] =
};
-#define BIT_B ((op >> 8) & 1)
-#define RIJ rij[(BIT_B << 2) + (op & 3)]
-#define RI(i) rij[(i) & 3]
-#define RJ(i) rij[((i) & 3) + 4]
-#define MODIFIER(mod,r3) (((r3) == 3) ? modifier_sf[mod] : modifier[mod])
-#define MODIFIER_LOW MODIFIER((op >> 2) & 3, op&3)
-#define MODIFIER_HIGH MODIFIER((op >> 6) & 3, (op >> 4)&3)
+#define BIT_B ((op >> 8) & 1)
+#define RIJ rij[(BIT_B << 2) + (op & 3)]
+#define RI(i) rij[(i) & 3]
+#define RJ(i) rij[((i) & 3) + 4]
+#define MODIFIER(mod,r3) (((r3) == 3) ? modifier_sf[mod] : modifier[mod])
+#define MODIFIER_LOW MODIFIER((op >> 2) & 3, op&3)
+#define MODIFIER_HIGH MODIFIER((op >> 6) & 3, (op >> 4)&3)
-#define READ_OP_DASM(p) ((base_oprom[p] << 8) | base_oprom[(p) + 1])
+#define READ_OP_DASM(p) ((base_oprom[p] << 8) | base_oprom[(p) + 1])
static char *get_cond(int op)
{
@@ -294,5 +294,3 @@ CPU_DISASSEMBLE( ssp1601 )
return dasm_ssp1601(buffer, pc, oprom);
}
-
-
diff --git a/src/emu/cpu/superfx/sfx_dasm.c b/src/emu/cpu/superfx/sfx_dasm.c
index ce95f6e17a3..60078e7787d 100644
--- a/src/emu/cpu/superfx/sfx_dasm.c
+++ b/src/emu/cpu/superfx/sfx_dasm.c
@@ -5,17 +5,17 @@ static char *output;
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
{
- va_list vl;
+ va_list vl;
- va_start(vl, fmt);
- output += vsprintf(output, fmt, vl);
- va_end(vl);
+ va_start(vl, fmt);
+ output += vsprintf(output, fmt, vl);
+ va_end(vl);
}
offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 param1, UINT16 alt)
{
UINT8 bytes_consumed = 1;
- output = buffer;
+ output = buffer;
switch(op)
{
@@ -80,7 +80,7 @@ offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 p
break;
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // TO
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // TO
print("TO R%d", op & 0xf);
break;
@@ -90,7 +90,7 @@ offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 p
break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35:
- case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: // STW_IR / STB_IR
+ case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: // STW_IR / STB_IR
switch(alt)
{
case SUPERFX_SFR_ALT0:
@@ -118,7 +118,7 @@ offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 p
break;
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45:
- case 0x46: case 0x47: case 0x48: case 0x49: case 0x4a: case 0x4b: // LDW_IR / LDB_IR
+ case 0x46: case 0x47: case 0x48: case 0x49: case 0x4a: case 0x4b: // LDW_IR / LDB_IR
switch(alt)
{
case SUPERFX_SFR_ALT0:
@@ -210,7 +210,7 @@ offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 p
print("MERGE");
break;
- case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f: // AND / BIC / ANDI / BICI
switch(alt)
{
@@ -337,7 +337,7 @@ offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 p
print("HIB");
break;
- case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf: // OR / XOR / ORI / XORI
switch(alt)
{
@@ -419,5 +419,5 @@ offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 p
break;
}
- return bytes_consumed | DASMFLAG_SUPPORTED;
+ return bytes_consumed | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/superfx/superfx.c b/src/emu/cpu/superfx/superfx.c
index 0e5dbe8926e..eaa6327680e 100644
--- a/src/emu/cpu/superfx/superfx.c
+++ b/src/emu/cpu/superfx/superfx.c
@@ -19,40 +19,40 @@ struct superfx_state
{
superfx_config config;
- devcb_resolved_write_line out_irq_func;
+ devcb_resolved_write_line out_irq_func;
UINT8 pipeline;
- UINT16 ramaddr; // RAM Address
-
- UINT16 r[16]; // GPRs
- UINT16 sfr; // Status Flag Register
- UINT8 pbr; // Program Bank Register
- UINT8 rombr; // Game Pack ROM Bank Register
- UINT8 rambr; // Game Pack RAM Bank Register
- UINT16 cbr; // Cache Base Register
- UINT8 scbr; // Screen Base Register
- UINT8 scmr; // Screen Mode Register
- UINT8 colr; // Color Register
- UINT8 por; // Plot Option Register
- UINT8 bramr; // Back-Up RAM Register
- UINT8 vcr; // Version Code Register
- UINT8 cfgr; // Config Register
- UINT8 clsr; // Clock Select Register
-
- UINT32 romcl; // Clock ticks until ROMDR is valid
- UINT8 romdr; // ROM Buffer Data Register
-
- UINT32 ramcl; // Clock ticks until RAMDR is valid;
- UINT16 ramar; // RAM Buffer Address Register
- UINT8 ramdr; // RAM Buffer Data Register
-
- UINT16 *sreg; // Source Register (From)
+ UINT16 ramaddr; // RAM Address
+
+ UINT16 r[16]; // GPRs
+ UINT16 sfr; // Status Flag Register
+ UINT8 pbr; // Program Bank Register
+ UINT8 rombr; // Game Pack ROM Bank Register
+ UINT8 rambr; // Game Pack RAM Bank Register
+ UINT16 cbr; // Cache Base Register
+ UINT8 scbr; // Screen Base Register
+ UINT8 scmr; // Screen Mode Register
+ UINT8 colr; // Color Register
+ UINT8 por; // Plot Option Register
+ UINT8 bramr; // Back-Up RAM Register
+ UINT8 vcr; // Version Code Register
+ UINT8 cfgr; // Config Register
+ UINT8 clsr; // Clock Select Register
+
+ UINT32 romcl; // Clock ticks until ROMDR is valid
+ UINT8 romdr; // ROM Buffer Data Register
+
+ UINT32 ramcl; // Clock ticks until RAMDR is valid;
+ UINT16 ramar; // RAM Buffer Address Register
+ UINT8 ramdr; // RAM Buffer Data Register
+
+ UINT16 *sreg; // Source Register (From)
UINT8 sreg_idx;// Source Register (To), index
- UINT16 *dreg; // Destination Register (To)
+ UINT16 *dreg; // Destination Register (To)
UINT8 dreg_idx;// Destination Register (To), index
UINT8 r15_modified;
- UINT8 irq; // IRQ Pending
+ UINT8 irq; // IRQ Pending
UINT32 cache_access_speed;
UINT32 memory_access_speed;
@@ -104,14 +104,14 @@ static void superfx_timing_reset(superfx_state *cpustate);
/*****************************************************************************/
-#define SUPERFX_SFR_OV_SET ((cpustate->sfr & SUPERFX_SFR_OV) ? 1 : 0)
-#define SUPERFX_SFR_OV_CLEAR ((cpustate->sfr & SUPERFX_SFR_OV) ? 0 : 1)
-#define SUPERFX_SFR_S_SET ((cpustate->sfr & SUPERFX_SFR_S) ? 1 : 0)
-#define SUPERFX_SFR_S_CLEAR ((cpustate->sfr & SUPERFX_SFR_S) ? 0 : 1)
-#define SUPERFX_SFR_CY_SET ((cpustate->sfr & SUPERFX_SFR_CY) ? 1 : 0)
-#define SUPERFX_SFR_CY_CLEAR ((cpustate->sfr & SUPERFX_SFR_CY) ? 0 : 1)
-#define SUPERFX_SFR_Z_SET ((cpustate->sfr & SUPERFX_SFR_Z) ? 1 : 0)
-#define SUPERFX_SFR_Z_CLEAR ((cpustate->sfr & SUPERFX_SFR_Z) ? 0 : 1)
+#define SUPERFX_SFR_OV_SET ((cpustate->sfr & SUPERFX_SFR_OV) ? 1 : 0)
+#define SUPERFX_SFR_OV_CLEAR ((cpustate->sfr & SUPERFX_SFR_OV) ? 0 : 1)
+#define SUPERFX_SFR_S_SET ((cpustate->sfr & SUPERFX_SFR_S) ? 1 : 0)
+#define SUPERFX_SFR_S_CLEAR ((cpustate->sfr & SUPERFX_SFR_S) ? 0 : 1)
+#define SUPERFX_SFR_CY_SET ((cpustate->sfr & SUPERFX_SFR_CY) ? 1 : 0)
+#define SUPERFX_SFR_CY_CLEAR ((cpustate->sfr & SUPERFX_SFR_CY) ? 0 : 1)
+#define SUPERFX_SFR_Z_SET ((cpustate->sfr & SUPERFX_SFR_Z) ? 1 : 0)
+#define SUPERFX_SFR_Z_CLEAR ((cpustate->sfr & SUPERFX_SFR_Z) ? 0 : 1)
INLINE void superfx_regs_reset(superfx_state *cpustate)
{
@@ -968,7 +968,7 @@ static CPU_EXECUTE( superfx )
}
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // TO
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f: // TO
if((cpustate->sfr & SUPERFX_SFR_B) == 0)
{
cpustate->dreg = &cpustate->r[op & 0xf];
@@ -991,7 +991,7 @@ static CPU_EXECUTE( superfx )
break;
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35:
- case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: // STW_IR / STB_IR
+ case 0x36: case 0x37: case 0x38: case 0x39: case 0x3a: case 0x3b: // STW_IR / STB_IR
if((cpustate->sfr & SUPERFX_SFR_ALT1) == 0)
{ // STW_IR
cpustate->ramaddr = cpustate->r[op & 0xf];
@@ -1033,7 +1033,7 @@ static CPU_EXECUTE( superfx )
break;
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45:
- case 0x46: case 0x47: case 0x48: case 0x49: case 0x4a: case 0x4b: // LDW_IR / LDB_IR
+ case 0x46: case 0x47: case 0x48: case 0x49: case 0x4a: case 0x4b: // LDW_IR / LDB_IR
if((cpustate->sfr & SUPERFX_SFR_ALT1) == 0)
{ // LDW_IR
UINT16 data = 0;
@@ -1507,45 +1507,45 @@ static CPU_SET_INFO( superfx )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + SUPERFX_PC: cpustate->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_DREG: info->i = cpustate->dreg_idx; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SREG: info->i = cpustate->sreg_idx; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R0: cpustate->r[0] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R1: cpustate->r[1] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R2: cpustate->r[2] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R3: cpustate->r[3] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R4: cpustate->r[4] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R5: cpustate->r[5] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R6: cpustate->r[6] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R7: cpustate->r[7] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R8: cpustate->r[8] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R9: cpustate->r[9] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R10: cpustate->r[10] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R11: cpustate->r[11] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R12: cpustate->r[12] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R13: cpustate->r[13] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R14: cpustate->r[14] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R15: cpustate->r[15] = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SFR: cpustate->sfr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_PBR: cpustate->pbr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_ROMBR: cpustate->rombr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMBR: cpustate->rambr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_CBR: cpustate->cbr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SCBR: cpustate->scbr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SCMR: cpustate->scmr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_COLR: cpustate->colr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_POR: cpustate->por = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_BRAMR: cpustate->bramr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_VCR: cpustate->vcr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_CFGR: cpustate->cfgr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_CLSR: cpustate->clsr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_ROMCL: cpustate->romcl = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_ROMDR: cpustate->romdr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMCL: cpustate->ramcl = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMAR: cpustate->ramar = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMDR: cpustate->ramdr = info->i; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMADDR: cpustate->ramaddr = info->i; break;
- }
+ case CPUINFO_INT_REGISTER + SUPERFX_PC: cpustate->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_DREG: info->i = cpustate->dreg_idx; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SREG: info->i = cpustate->sreg_idx; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R0: cpustate->r[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R1: cpustate->r[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R2: cpustate->r[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R3: cpustate->r[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R4: cpustate->r[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R5: cpustate->r[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R6: cpustate->r[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R7: cpustate->r[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R8: cpustate->r[8] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R9: cpustate->r[9] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R10: cpustate->r[10] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R11: cpustate->r[11] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R12: cpustate->r[12] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R13: cpustate->r[13] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R14: cpustate->r[14] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R15: cpustate->r[15] = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SFR: cpustate->sfr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_PBR: cpustate->pbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_ROMBR: cpustate->rombr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMBR: cpustate->rambr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_CBR: cpustate->cbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SCBR: cpustate->scbr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SCMR: cpustate->scmr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_COLR: cpustate->colr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_POR: cpustate->por = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_BRAMR: cpustate->bramr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_VCR: cpustate->vcr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_CFGR: cpustate->cfgr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_CLSR: cpustate->clsr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_ROMCL: cpustate->romcl = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_ROMDR: cpustate->romdr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMCL: cpustate->ramcl = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMAR: cpustate->ramar = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMDR: cpustate->ramdr = info->i; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMADDR: cpustate->ramaddr = info->i; break;
+ }
}
CPU_GET_INFO( superfx )
@@ -1555,125 +1555,125 @@ CPU_GET_INFO( superfx )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(superfx_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(superfx_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
case CPUINFO_INT_PC: /* intentional fallthrough */
- case CPUINFO_INT_REGISTER + SUPERFX_PC: info->i = ((cpustate->pbr << 16) | cpustate->r[15]) - 1; break;
- case CPUINFO_INT_REGISTER + SUPERFX_DREG: info->i = cpustate->dreg_idx; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SREG: info->i = cpustate->sreg_idx; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R0: info->i = cpustate->r[0]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R1: info->i = cpustate->r[1]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R2: info->i = cpustate->r[2]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R3: info->i = cpustate->r[3]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R4: info->i = cpustate->r[4]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R5: info->i = cpustate->r[5]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R6: info->i = cpustate->r[6]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R7: info->i = cpustate->r[7]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R8: info->i = cpustate->r[8]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R9: info->i = cpustate->r[9]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R10: info->i = cpustate->r[10]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R11: info->i = cpustate->r[11]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R12: info->i = cpustate->r[12]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R13: info->i = cpustate->r[13]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R14: info->i = cpustate->r[14]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_R15: info->i = cpustate->r[15]; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SFR: info->i = cpustate->sfr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_PBR: info->i = cpustate->sfr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_ROMBR: info->i = cpustate->rombr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMBR: info->i = cpustate->rambr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_CBR: info->i = cpustate->cbr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SCBR: info->i = cpustate->scbr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_SCMR: info->i = cpustate->scmr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_COLR: info->i = cpustate->colr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_POR: info->i = cpustate->por; break;
- case CPUINFO_INT_REGISTER + SUPERFX_BRAMR: info->i = cpustate->bramr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_VCR: info->i = cpustate->vcr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_CFGR: info->i = cpustate->cfgr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_CLSR: info->i = cpustate->clsr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_ROMCL: info->i = cpustate->romcl; break;
- case CPUINFO_INT_REGISTER + SUPERFX_ROMDR: info->i = cpustate->romdr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMCL: info->i = cpustate->ramcl; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMAR: info->i = cpustate->ramar; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMDR: info->i = cpustate->ramdr; break;
- case CPUINFO_INT_REGISTER + SUPERFX_RAMADDR: info->i = cpustate->ramaddr; break;
-
- /* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(superfx); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(superfx); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(superfx); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(superfx); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(superfx); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(superfx); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
-
- /* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "SuperFX"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "SuperFX"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+ case CPUINFO_INT_REGISTER + SUPERFX_PC: info->i = ((cpustate->pbr << 16) | cpustate->r[15]) - 1; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_DREG: info->i = cpustate->dreg_idx; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SREG: info->i = cpustate->sreg_idx; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R0: info->i = cpustate->r[0]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R1: info->i = cpustate->r[1]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R2: info->i = cpustate->r[2]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R3: info->i = cpustate->r[3]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R4: info->i = cpustate->r[4]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R5: info->i = cpustate->r[5]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R6: info->i = cpustate->r[6]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R7: info->i = cpustate->r[7]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R8: info->i = cpustate->r[8]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R9: info->i = cpustate->r[9]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R10: info->i = cpustate->r[10]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R11: info->i = cpustate->r[11]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R12: info->i = cpustate->r[12]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R13: info->i = cpustate->r[13]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R14: info->i = cpustate->r[14]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_R15: info->i = cpustate->r[15]; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SFR: info->i = cpustate->sfr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_PBR: info->i = cpustate->sfr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_ROMBR: info->i = cpustate->rombr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMBR: info->i = cpustate->rambr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_CBR: info->i = cpustate->cbr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SCBR: info->i = cpustate->scbr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_SCMR: info->i = cpustate->scmr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_COLR: info->i = cpustate->colr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_POR: info->i = cpustate->por; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_BRAMR: info->i = cpustate->bramr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_VCR: info->i = cpustate->vcr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_CFGR: info->i = cpustate->cfgr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_CLSR: info->i = cpustate->clsr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_ROMCL: info->i = cpustate->romcl; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_ROMDR: info->i = cpustate->romdr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMCL: info->i = cpustate->ramcl; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMAR: info->i = cpustate->ramar; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMDR: info->i = cpustate->ramdr; break;
+ case CPUINFO_INT_REGISTER + SUPERFX_RAMADDR: info->i = cpustate->ramaddr; break;
+
+ /* --- the following bits of info are returned as pointers to data or functions --- */
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(superfx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(superfx); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(superfx); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(superfx); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(superfx); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(superfx); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+
+ /* --- the following bits of info are returned as NULL-terminated strings --- */
+ case CPUINFO_STR_NAME: strcpy(info->s, "SuperFX"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "SuperFX"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
case CPUINFO_STR_REGISTER + SUPERFX_PC: sprintf(info->s, "PC: %06X", (cpustate->pbr << 16) | cpustate->r[15]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_DREG: sprintf(info->s, "DREG: R%d", cpustate->dreg_idx); break;
- case CPUINFO_STR_REGISTER + SUPERFX_SREG: sprintf(info->s, "SREG: R%d", cpustate->sreg_idx); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R0: sprintf(info->s, "R0: %04X", cpustate->r[0]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R1: sprintf(info->s, "R1: %04X", cpustate->r[1]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R2: sprintf(info->s, "R2: %04X", cpustate->r[2]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R3: sprintf(info->s, "R3: %04X", cpustate->r[3]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R4: sprintf(info->s, "R4: %04X", cpustate->r[4]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R5: sprintf(info->s, "R5: %04X", cpustate->r[5]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R6: sprintf(info->s, "R6: %04X", cpustate->r[6]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R7: sprintf(info->s, "R7: %04X", cpustate->r[7]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R8: sprintf(info->s, "R8: %04X", cpustate->r[8]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R9: sprintf(info->s, "R9: %04X", cpustate->r[9]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R10: sprintf(info->s, "R10: %04X", cpustate->r[10]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R11: sprintf(info->s, "R11: %04X", cpustate->r[11]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R12: sprintf(info->s, "R12: %04X", cpustate->r[12]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R13: sprintf(info->s, "R13: %04X", cpustate->r[13]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R14: sprintf(info->s, "R14: %04X", cpustate->r[14]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_R15: sprintf(info->s, "R15: %04X", cpustate->r[15]); break;
- case CPUINFO_STR_REGISTER + SUPERFX_SFR: sprintf(info->s, "SFR: %04X", cpustate->sfr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_PBR: sprintf(info->s, "PBR: %02X", cpustate->sfr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_ROMBR: sprintf(info->s, "ROMBR: %02X", cpustate->rombr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_RAMBR: sprintf(info->s, "RAMBR: %02X", cpustate->rambr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_CBR: sprintf(info->s, "CBR: %04X", cpustate->cbr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_SCBR: sprintf(info->s, "SCBR: %02X", cpustate->scbr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_SCMR: sprintf(info->s, "SCMR: %02X", cpustate->scmr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_COLR: sprintf(info->s, "COLR %02X", cpustate->colr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_POR: sprintf(info->s, "POR: %02X", cpustate->por); break;
- case CPUINFO_STR_REGISTER + SUPERFX_BRAMR: sprintf(info->s, "BRAMR: %02X", cpustate->bramr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_VCR: sprintf(info->s, "VCR: %02X", cpustate->vcr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_CFGR: sprintf(info->s, "CFGR: %02X", cpustate->cfgr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_CLSR: sprintf(info->s, "CLSR: %02X", cpustate->clsr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_ROMCL: sprintf(info->s, "ROMCL: %08X", cpustate->romcl); break;
- case CPUINFO_STR_REGISTER + SUPERFX_ROMDR: sprintf(info->s, "ROMDR: %02X", cpustate->romdr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_RAMCL: sprintf(info->s, "RAMCL: %08X", cpustate->ramcl); break;
- case CPUINFO_STR_REGISTER + SUPERFX_RAMAR: sprintf(info->s, "RAMAR: %04X", cpustate->ramar); break;
- case CPUINFO_STR_REGISTER + SUPERFX_RAMDR: sprintf(info->s, "RAMDR: %02X", cpustate->ramdr); break;
- case CPUINFO_STR_REGISTER + SUPERFX_RAMADDR: sprintf(info->s, "RAMADDR: %04X", cpustate->ramaddr); break;
- }
+ case CPUINFO_STR_REGISTER + SUPERFX_DREG: sprintf(info->s, "DREG: R%d", cpustate->dreg_idx); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_SREG: sprintf(info->s, "SREG: R%d", cpustate->sreg_idx); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R0: sprintf(info->s, "R0: %04X", cpustate->r[0]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R1: sprintf(info->s, "R1: %04X", cpustate->r[1]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R2: sprintf(info->s, "R2: %04X", cpustate->r[2]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R3: sprintf(info->s, "R3: %04X", cpustate->r[3]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R4: sprintf(info->s, "R4: %04X", cpustate->r[4]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R5: sprintf(info->s, "R5: %04X", cpustate->r[5]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R6: sprintf(info->s, "R6: %04X", cpustate->r[6]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R7: sprintf(info->s, "R7: %04X", cpustate->r[7]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R8: sprintf(info->s, "R8: %04X", cpustate->r[8]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R9: sprintf(info->s, "R9: %04X", cpustate->r[9]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R10: sprintf(info->s, "R10: %04X", cpustate->r[10]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R11: sprintf(info->s, "R11: %04X", cpustate->r[11]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R12: sprintf(info->s, "R12: %04X", cpustate->r[12]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R13: sprintf(info->s, "R13: %04X", cpustate->r[13]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R14: sprintf(info->s, "R14: %04X", cpustate->r[14]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_R15: sprintf(info->s, "R15: %04X", cpustate->r[15]); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_SFR: sprintf(info->s, "SFR: %04X", cpustate->sfr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_PBR: sprintf(info->s, "PBR: %02X", cpustate->sfr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_ROMBR: sprintf(info->s, "ROMBR: %02X", cpustate->rombr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_RAMBR: sprintf(info->s, "RAMBR: %02X", cpustate->rambr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_CBR: sprintf(info->s, "CBR: %04X", cpustate->cbr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_SCBR: sprintf(info->s, "SCBR: %02X", cpustate->scbr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_SCMR: sprintf(info->s, "SCMR: %02X", cpustate->scmr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_COLR: sprintf(info->s, "COLR %02X", cpustate->colr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_POR: sprintf(info->s, "POR: %02X", cpustate->por); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_BRAMR: sprintf(info->s, "BRAMR: %02X", cpustate->bramr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_VCR: sprintf(info->s, "VCR: %02X", cpustate->vcr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_CFGR: sprintf(info->s, "CFGR: %02X", cpustate->cfgr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_CLSR: sprintf(info->s, "CLSR: %02X", cpustate->clsr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_ROMCL: sprintf(info->s, "ROMCL: %08X", cpustate->romcl); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_ROMDR: sprintf(info->s, "ROMDR: %02X", cpustate->romdr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_RAMCL: sprintf(info->s, "RAMCL: %08X", cpustate->ramcl); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_RAMAR: sprintf(info->s, "RAMAR: %04X", cpustate->ramar); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_RAMDR: sprintf(info->s, "RAMDR: %02X", cpustate->ramdr); break;
+ case CPUINFO_STR_REGISTER + SUPERFX_RAMADDR: sprintf(info->s, "RAMADDR: %04X", cpustate->ramaddr); break;
+ }
}
DEFINE_LEGACY_CPU_DEVICE(SUPERFX, superfx);
diff --git a/src/emu/cpu/superfx/superfx.h b/src/emu/cpu/superfx/superfx.h
index 3de68bbf774..d805d2d5aa7 100644
--- a/src/emu/cpu/superfx/superfx.h
+++ b/src/emu/cpu/superfx/superfx.h
@@ -26,66 +26,66 @@ enum
SUPERFX_R14,
SUPERFX_R15,
- SUPERFX_PBR,
- SUPERFX_SFR,
- SUPERFX_ROMBR,
- SUPERFX_RAMBR,
- SUPERFX_CBR,
- SUPERFX_SCBR,
- SUPERFX_SCMR,
- SUPERFX_COLR,
- SUPERFX_POR,
- SUPERFX_BRAMR,
- SUPERFX_VCR,
- SUPERFX_CFGR,
- SUPERFX_CLSR,
-
- SUPERFX_ROMCL,
- SUPERFX_ROMDR,
-
- SUPERFX_RAMCL,
- SUPERFX_RAMAR,
- SUPERFX_RAMDR,
- SUPERFX_RAMADDR,
+ SUPERFX_PBR,
+ SUPERFX_SFR,
+ SUPERFX_ROMBR,
+ SUPERFX_RAMBR,
+ SUPERFX_CBR,
+ SUPERFX_SCBR,
+ SUPERFX_SCMR,
+ SUPERFX_COLR,
+ SUPERFX_POR,
+ SUPERFX_BRAMR,
+ SUPERFX_VCR,
+ SUPERFX_CFGR,
+ SUPERFX_CLSR,
+
+ SUPERFX_ROMCL,
+ SUPERFX_ROMDR,
+
+ SUPERFX_RAMCL,
+ SUPERFX_RAMAR,
+ SUPERFX_RAMDR,
+ SUPERFX_RAMADDR,
};
-#define SUPERFX_SFR_IRQ 0x8000 // Interrupt Flag
-#define SUPERFX_SFR_B 0x1000 // WITH Flag
-#define SUPERFX_SFR_IH 0x0800 // Immediate Higher 8-bit Flag
-#define SUPERFX_SFR_IL 0x0400 // Immediate Lower 8-bit Flag
-#define SUPERFX_SFR_ALT 0x0300 // ALT Mode, both bits
-#define SUPERFX_SFR_ALT0 0x0000 // ALT Mode, no bits
-#define SUPERFX_SFR_ALT1 0x0100 // ALT Mode, bit 0
-#define SUPERFX_SFR_ALT2 0x0200 // ALT Mode, bit 1
-#define SUPERFX_SFR_ALT3 0x0300 // ALT Mode, both bits (convenience dupe)
-#define SUPERFX_SFR_R 0x0040 // ROM R14 Read Flag
-#define SUPERFX_SFR_G 0x0020 // GO Flag
-#define SUPERFX_SFR_OV 0x0010 // Overflow Flag
-#define SUPERFX_SFR_S 0x0008 // Sign Flag
-#define SUPERFX_SFR_CY 0x0004 // Carry Flag
-#define SUPERFX_SFR_Z 0x0002 // Zero Flag
-
-#define SUPERFX_POR_OBJ 0x10
-#define SUPERFX_POR_FREEZEHIGH 0x08
-#define SUPERFX_POR_HIGHNIBBLE 0x04
-#define SUPERFX_POR_DITHER 0x02
-#define SUPERFX_POR_TRANSPARENT 0x01
-
-#define SUPERFX_SCMR_HT_MASK 0x24
-#define SUPERFX_SCMR_HT0 0x00
-#define SUPERFX_SCMR_HT1 0x04
-#define SUPERFX_SCMR_HT2 0x20
-#define SUPERFX_SCMR_HT3 0x24
-#define SUPERFX_SCMR_RON 0x10
-#define SUPERFX_SCMR_RAN 0x08
-#define SUPERFX_SCMR_MD 0x03
-
-#define SUPERFX_CFGR_IRQ 0x80 // IRQ
-#define SUPERFX_CFGR_MS0 0x20 // MS0
+#define SUPERFX_SFR_IRQ 0x8000 // Interrupt Flag
+#define SUPERFX_SFR_B 0x1000 // WITH Flag
+#define SUPERFX_SFR_IH 0x0800 // Immediate Higher 8-bit Flag
+#define SUPERFX_SFR_IL 0x0400 // Immediate Lower 8-bit Flag
+#define SUPERFX_SFR_ALT 0x0300 // ALT Mode, both bits
+#define SUPERFX_SFR_ALT0 0x0000 // ALT Mode, no bits
+#define SUPERFX_SFR_ALT1 0x0100 // ALT Mode, bit 0
+#define SUPERFX_SFR_ALT2 0x0200 // ALT Mode, bit 1
+#define SUPERFX_SFR_ALT3 0x0300 // ALT Mode, both bits (convenience dupe)
+#define SUPERFX_SFR_R 0x0040 // ROM R14 Read Flag
+#define SUPERFX_SFR_G 0x0020 // GO Flag
+#define SUPERFX_SFR_OV 0x0010 // Overflow Flag
+#define SUPERFX_SFR_S 0x0008 // Sign Flag
+#define SUPERFX_SFR_CY 0x0004 // Carry Flag
+#define SUPERFX_SFR_Z 0x0002 // Zero Flag
+
+#define SUPERFX_POR_OBJ 0x10
+#define SUPERFX_POR_FREEZEHIGH 0x08
+#define SUPERFX_POR_HIGHNIBBLE 0x04
+#define SUPERFX_POR_DITHER 0x02
+#define SUPERFX_POR_TRANSPARENT 0x01
+
+#define SUPERFX_SCMR_HT_MASK 0x24
+#define SUPERFX_SCMR_HT0 0x00
+#define SUPERFX_SCMR_HT1 0x04
+#define SUPERFX_SCMR_HT2 0x20
+#define SUPERFX_SCMR_HT3 0x24
+#define SUPERFX_SCMR_RON 0x10
+#define SUPERFX_SCMR_RAN 0x08
+#define SUPERFX_SCMR_MD 0x03
+
+#define SUPERFX_CFGR_IRQ 0x80 // IRQ
+#define SUPERFX_CFGR_MS0 0x20 // MS0
struct superfx_config
{
- devcb_write_line out_irq_func; /* IRQ changed callback */
+ devcb_write_line out_irq_func; /* IRQ changed callback */
};
#define SUPERFX_CONFIG(name) const superfx_config (name) =
diff --git a/src/emu/cpu/t11/t11.c b/src/emu/cpu/t11/t11.c
index 0b087e97841..b23f0b2d42b 100644
--- a/src/emu/cpu/t11/t11.c
+++ b/src/emu/cpu/t11/t11.c
@@ -24,15 +24,15 @@
struct t11_state
{
- PAIR ppc; /* previous program counter */
- PAIR reg[8];
- PAIR psw;
- UINT16 initial_pc;
- UINT8 wait_state;
- UINT8 irq_state;
- int icount;
- device_irq_acknowledge_callback irq_callback;
- legacy_cpu_device * device;
+ PAIR ppc; /* previous program counter */
+ PAIR reg[8];
+ PAIR psw;
+ UINT16 initial_pc;
+ UINT8 wait_state;
+ UINT8 irq_state;
+ int icount;
+ device_irq_acknowledge_callback irq_callback;
+ legacy_cpu_device * device;
address_space *program;
direct_read_data *direct;
};
@@ -59,11 +59,11 @@ INLINE t11_state *get_safe_token(device_t *device)
#define REGB(x) reg[x].b.l
/* PC, SP, and PSW definitions */
-#define SP REGW(6)
-#define PC REGW(7)
-#define SPD REGD(6)
-#define PCD REGD(7)
-#define PSW psw.b.l
+#define SP REGW(6)
+#define PC REGW(7)
+#define SPD REGD(6)
+#define PCD REGD(7)
+#define PSW psw.b.l
/*************************************
@@ -168,8 +168,8 @@ INLINE int POP(t11_state *cpustate)
struct irq_table_entry
{
- UINT8 priority;
- UINT8 vector;
+ UINT8 priority;
+ UINT8 vector;
};
static const struct irq_table_entry irq_table[] =
@@ -358,7 +358,7 @@ static CPU_EXECUTE( t11 )
{
UINT16 op;
- cpustate->ppc = cpustate->reg[7]; /* copy PC to previous PC */
+ cpustate->ppc = cpustate->reg[7]; /* copy PC to previous PC */
debugger_instruction_hook(device, cpustate->PCD);
@@ -384,22 +384,22 @@ static CPU_SET_INFO( t11 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + T11_IRQ0: set_irq_line(cpustate, T11_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + T11_IRQ1: set_irq_line(cpustate, T11_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + T11_IRQ2: set_irq_line(cpustate, T11_IRQ2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + T11_IRQ3: set_irq_line(cpustate, T11_IRQ3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ0: set_irq_line(cpustate, T11_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ1: set_irq_line(cpustate, T11_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ2: set_irq_line(cpustate, T11_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ3: set_irq_line(cpustate, T11_IRQ3, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + T11_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_PC: cpustate->PC = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + T11_SP: cpustate->SP = info->i; break;
- case CPUINFO_INT_REGISTER + T11_PSW: cpustate->PSW = info->i; break;
- case CPUINFO_INT_REGISTER + T11_R0: cpustate->REGW(0) = info->i; break;
- case CPUINFO_INT_REGISTER + T11_R1: cpustate->REGW(1) = info->i; break;
- case CPUINFO_INT_REGISTER + T11_R2: cpustate->REGW(2) = info->i; break;
- case CPUINFO_INT_REGISTER + T11_R3: cpustate->REGW(3) = info->i; break;
- case CPUINFO_INT_REGISTER + T11_R4: cpustate->REGW(4) = info->i; break;
- case CPUINFO_INT_REGISTER + T11_R5: cpustate->REGW(5) = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_SP: cpustate->SP = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_PSW: cpustate->PSW = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_R0: cpustate->REGW(0) = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_R1: cpustate->REGW(1) = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_R2: cpustate->REGW(2) = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_R3: cpustate->REGW(3) = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_R4: cpustate->REGW(4) = info->i; break;
+ case CPUINFO_INT_REGISTER + T11_R5: cpustate->REGW(5) = info->i; break;
}
}
@@ -416,60 +416,60 @@ CPU_GET_INFO( t11 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(t11_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 12; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 110; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + T11_IRQ0: info->i = (cpustate->irq_state & 1) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + T11_IRQ1: info->i = (cpustate->irq_state & 2) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + T11_IRQ2: info->i = (cpustate->irq_state & 4) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + T11_IRQ3: info->i = (cpustate->irq_state & 8) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(t11_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = -1; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 12; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 110; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ0: info->i = (cpustate->irq_state & 1) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ1: info->i = (cpustate->irq_state & 2) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ2: info->i = (cpustate->irq_state & 4) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + T11_IRQ3: info->i = (cpustate->irq_state & 8) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc.w.l; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + T11_PC: info->i = cpustate->PCD; break;
+ case CPUINFO_INT_REGISTER + T11_PC: info->i = cpustate->PCD; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + T11_SP: info->i = cpustate->SPD; break;
- case CPUINFO_INT_REGISTER + T11_PSW: info->i = cpustate->PSW; break;
- case CPUINFO_INT_REGISTER + T11_R0: info->i = cpustate->REGD(0); break;
- case CPUINFO_INT_REGISTER + T11_R1: info->i = cpustate->REGD(1); break;
- case CPUINFO_INT_REGISTER + T11_R2: info->i = cpustate->REGD(2); break;
- case CPUINFO_INT_REGISTER + T11_R3: info->i = cpustate->REGD(3); break;
- case CPUINFO_INT_REGISTER + T11_R4: info->i = cpustate->REGD(4); break;
- case CPUINFO_INT_REGISTER + T11_R5: info->i = cpustate->REGD(5); break;
+ case CPUINFO_INT_REGISTER + T11_SP: info->i = cpustate->SPD; break;
+ case CPUINFO_INT_REGISTER + T11_PSW: info->i = cpustate->PSW; break;
+ case CPUINFO_INT_REGISTER + T11_R0: info->i = cpustate->REGD(0); break;
+ case CPUINFO_INT_REGISTER + T11_R1: info->i = cpustate->REGD(1); break;
+ case CPUINFO_INT_REGISTER + T11_R2: info->i = cpustate->REGD(2); break;
+ case CPUINFO_INT_REGISTER + T11_R3: info->i = cpustate->REGD(3); break;
+ case CPUINFO_INT_REGISTER + T11_R4: info->i = cpustate->REGD(4); break;
+ case CPUINFO_INT_REGISTER + T11_R5: info->i = cpustate->REGD(5); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(t11); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(t11); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(t11); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(t11); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t11); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(t11); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(t11); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(t11); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(t11); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t11); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "T11"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "DEC T-11"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "T11"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "DEC T-11"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Aaron Giles"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -483,17 +483,17 @@ CPU_GET_INFO( t11 )
cpustate->psw.b.l & 0x01 ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + T11_PC: sprintf(info->s, "PC:%04X", cpustate->reg[7].w.l); break;
- case CPUINFO_STR_REGISTER + T11_SP: sprintf(info->s, "SP:%04X", cpustate->reg[6].w.l); break;
- case CPUINFO_STR_REGISTER + T11_PSW: sprintf(info->s, "PSW:%02X", cpustate->psw.b.l); break;
- case CPUINFO_STR_REGISTER + T11_R0: sprintf(info->s, "R0:%04X", cpustate->reg[0].w.l); break;
- case CPUINFO_STR_REGISTER + T11_R1: sprintf(info->s, "R1:%04X", cpustate->reg[1].w.l); break;
- case CPUINFO_STR_REGISTER + T11_R2: sprintf(info->s, "R2:%04X", cpustate->reg[2].w.l); break;
- case CPUINFO_STR_REGISTER + T11_R3: sprintf(info->s, "R3:%04X", cpustate->reg[3].w.l); break;
- case CPUINFO_STR_REGISTER + T11_R4: sprintf(info->s, "R4:%04X", cpustate->reg[4].w.l); break;
- case CPUINFO_STR_REGISTER + T11_R5: sprintf(info->s, "R5:%04X", cpustate->reg[5].w.l); break;
-
- case CPUINFO_IS_OCTAL: info->i = true; break;
+ case CPUINFO_STR_REGISTER + T11_PC: sprintf(info->s, "PC:%04X", cpustate->reg[7].w.l); break;
+ case CPUINFO_STR_REGISTER + T11_SP: sprintf(info->s, "SP:%04X", cpustate->reg[6].w.l); break;
+ case CPUINFO_STR_REGISTER + T11_PSW: sprintf(info->s, "PSW:%02X", cpustate->psw.b.l); break;
+ case CPUINFO_STR_REGISTER + T11_R0: sprintf(info->s, "R0:%04X", cpustate->reg[0].w.l); break;
+ case CPUINFO_STR_REGISTER + T11_R1: sprintf(info->s, "R1:%04X", cpustate->reg[1].w.l); break;
+ case CPUINFO_STR_REGISTER + T11_R2: sprintf(info->s, "R2:%04X", cpustate->reg[2].w.l); break;
+ case CPUINFO_STR_REGISTER + T11_R3: sprintf(info->s, "R3:%04X", cpustate->reg[3].w.l); break;
+ case CPUINFO_STR_REGISTER + T11_R4: sprintf(info->s, "R4:%04X", cpustate->reg[4].w.l); break;
+ case CPUINFO_STR_REGISTER + T11_R5: sprintf(info->s, "R5:%04X", cpustate->reg[5].w.l); break;
+
+ case CPUINFO_IS_OCTAL: info->i = true; break;
}
}
diff --git a/src/emu/cpu/t11/t11.h b/src/emu/cpu/t11/t11.h
index 962e2788776..f66b46e714f 100644
--- a/src/emu/cpu/t11/t11.h
+++ b/src/emu/cpu/t11/t11.h
@@ -12,9 +12,9 @@ enum
};
#define T11_IRQ0 0 /* IRQ0 */
-#define T11_IRQ1 1 /* IRQ1 */
-#define T11_IRQ2 2 /* IRQ2 */
-#define T11_IRQ3 3 /* IRQ3 */
+#define T11_IRQ1 1 /* IRQ1 */
+#define T11_IRQ2 2 /* IRQ2 */
+#define T11_IRQ3 3 /* IRQ3 */
#define T11_RESERVED 0x000 /* Reserved vector */
#define T11_TIMEOUT 0x004 /* Time-out/system error vector */
@@ -28,7 +28,7 @@ enum
struct t11_setup
{
- UINT16 mode; /* initial processor mode */
+ UINT16 mode; /* initial processor mode */
};
diff --git a/src/emu/cpu/t11/t11dasm.c b/src/emu/cpu/t11/t11dasm.c
index 848375a178a..c2def5a95e8 100644
--- a/src/emu/cpu/t11/t11dasm.c
+++ b/src/emu/cpu/t11/t11dasm.c
@@ -16,7 +16,7 @@ static const char *const regs[8] = { "R0", "R1", "R2", "R3", "R4", "R5", "SP", "
static const UINT8 *rombase;
static offs_t pcbase;
-#define PARAM_WORD(v) ((v) = rombase[pc - pcbase] | (rombase[pc + 1 - pcbase] << 8), pc += 2)
+#define PARAM_WORD(v) ((v) = rombase[pc - pcbase] | (rombase[pc + 1 - pcbase] << 8), pc += 2)
static unsigned MakeEA (char *ea, int lo, unsigned pc, int width)
{
@@ -24,7 +24,7 @@ static unsigned MakeEA (char *ea, int lo, unsigned pc, int width)
assert (width == 2 || width == 4);
- reg = lo & 7;
+ reg = lo & 7;
switch ((lo >> 3) & 7)
{
@@ -36,28 +36,28 @@ static unsigned MakeEA (char *ea, int lo, unsigned pc, int width)
break;
case 2:
if (reg == 7)
- {
+ {
PARAM_WORD (pm);
sprintf (ea, "#$%0*X", width, pm & ((width == 2) ? 0xff : 0xffff));
- }
+ }
else
- {
- sprintf (ea, "(%s)+", regs[reg]);
- }
- break;
+ {
+ sprintf (ea, "(%s)+", regs[reg]);
+ }
+ break;
case 3:
if (reg == 7)
{
- PARAM_WORD (pm);
- sprintf (ea, "$%04X", pm &= 0xffff);
+ PARAM_WORD (pm);
+ sprintf (ea, "$%04X", pm &= 0xffff);
}
else
{
- sprintf (ea, "@(%s)+", regs[reg]);
+ sprintf (ea, "@(%s)+", regs[reg]);
}
- break;
+ break;
case 4:
- sprintf (ea, "-(%s)", regs[reg]);
+ sprintf (ea, "-(%s)", regs[reg]);
break;
case 5:
sprintf (ea, "@-(%s)", regs[reg]);
@@ -78,7 +78,7 @@ static unsigned MakeEA (char *ea, int lo, unsigned pc, int width)
break;
}
- return pc;
+ return pc;
}
@@ -87,14 +87,14 @@ CPU_DISASSEMBLE( t11 )
char ea1[32], ea2[32];
unsigned PC = pc;
UINT16 op, lo, hi, addr;
- INT16 offset;
- UINT32 flags = 0;
+ INT16 offset;
+ UINT32 flags = 0;
rombase = oprom;
pcbase = pc;
PARAM_WORD(op);
- lo = op & 077;
+ lo = op & 077;
hi = (op >> 6) & 077;
switch (op & 0xffc0)
@@ -102,14 +102,14 @@ CPU_DISASSEMBLE( t11 )
case 0x0000:
switch (lo)
{
- case 0x00: sprintf (buffer, "HALT"); break;
- case 0x01: sprintf (buffer, "WAIT"); break;
- case 0x02: sprintf (buffer, "RTI"); flags = DASMFLAG_STEP_OUT; break;
- case 0x03: sprintf (buffer, "BPT"); break;
- case 0x04: sprintf (buffer, "IOT"); break;
- case 0x05: sprintf (buffer, "RESET"); break;
- case 0x06: sprintf (buffer, "RTT"); break;
- default: sprintf (buffer, "???? (%04X)", op); break;
+ case 0x00: sprintf (buffer, "HALT"); break;
+ case 0x01: sprintf (buffer, "WAIT"); break;
+ case 0x02: sprintf (buffer, "RTI"); flags = DASMFLAG_STEP_OUT; break;
+ case 0x03: sprintf (buffer, "BPT"); break;
+ case 0x04: sprintf (buffer, "IOT"); break;
+ case 0x05: sprintf (buffer, "RESET"); break;
+ case 0x06: sprintf (buffer, "RTT"); break;
+ default: sprintf (buffer, "???? (%04X)", op); break;
}
break;
case 0x0040:
@@ -130,26 +130,26 @@ CPU_DISASSEMBLE( t11 )
case 050:
switch( lo & 15 )
{
- case 0x00: sprintf (buffer, "NOP"); break;
- case 0x0f: sprintf (buffer, "CCC"); break;
- case 0x01: sprintf (buffer, "CEC"); break;
- case 0x02: sprintf (buffer, "CEV"); break;
- case 0x04: sprintf (buffer, "CEZ"); break;
- case 0x08: sprintf (buffer, "CEN"); break;
- default: sprintf (buffer, "Ccc #$%X", lo & 15); break;
+ case 0x00: sprintf (buffer, "NOP"); break;
+ case 0x0f: sprintf (buffer, "CCC"); break;
+ case 0x01: sprintf (buffer, "CEC"); break;
+ case 0x02: sprintf (buffer, "CEV"); break;
+ case 0x04: sprintf (buffer, "CEZ"); break;
+ case 0x08: sprintf (buffer, "CEN"); break;
+ default: sprintf (buffer, "Ccc #$%X", lo & 15); break;
}
break;
case 060:
case 070:
switch( lo & 15 )
{
- case 0x00: sprintf (buffer, "NOP"); break;
- case 0x0f: sprintf (buffer, "SCC"); break;
- case 0x01: sprintf (buffer, "SEC"); break;
- case 0x02: sprintf (buffer, "SEV"); break;
- case 0x04: sprintf (buffer, "SEZ"); break;
- case 0x08: sprintf (buffer, "SEN"); break;
- default: sprintf (buffer, "Scc #$%X", lo & 15); break;
+ case 0x00: sprintf (buffer, "NOP"); break;
+ case 0x0f: sprintf (buffer, "SCC"); break;
+ case 0x01: sprintf (buffer, "SEC"); break;
+ case 0x02: sprintf (buffer, "SEV"); break;
+ case 0x04: sprintf (buffer, "SEZ"); break;
+ case 0x08: sprintf (buffer, "SEN"); break;
+ default: sprintf (buffer, "Scc #$%X", lo & 15); break;
}
break;
}
@@ -160,31 +160,31 @@ CPU_DISASSEMBLE( t11 )
break;
case 0x0100: case 0x0140: case 0x0180: case 0x01c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BR $%04X", pc + offset);
+ sprintf (buffer, "BR $%04X", pc + offset);
break;
case 0x0200: case 0x0240: case 0x0280: case 0x02c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BNE $%04X", pc + offset);
+ sprintf (buffer, "BNE $%04X", pc + offset);
break;
case 0x0300: case 0x0340: case 0x0380: case 0x03c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BEQ $%04X", pc + offset);
+ sprintf (buffer, "BEQ $%04X", pc + offset);
break;
case 0x0400: case 0x0440: case 0x0480: case 0x04c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BGE $%04X", pc + offset);
+ sprintf (buffer, "BGE $%04X", pc + offset);
break;
case 0x0500: case 0x0540: case 0x0580: case 0x05c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BLT $%04X", pc + offset);
+ sprintf (buffer, "BLT $%04X", pc + offset);
break;
case 0x0600: case 0x0640: case 0x0680: case 0x06c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BGT $%04X", pc + offset);
+ sprintf (buffer, "BGT $%04X", pc + offset);
break;
case 0x0700: case 0x0740: case 0x0780: case 0x07c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BLE $%04X", pc + offset);
+ sprintf (buffer, "BLE $%04X", pc + offset);
break;
case 0x0800: case 0x0840: case 0x0880: case 0x08c0:
case 0x0900: case 0x0940: case 0x0980: case 0x09c0:
@@ -260,12 +260,12 @@ CPU_DISASSEMBLE( t11 )
case 0x1e00: case 0x1e40: case 0x1e80: case 0x1ec0: case 0x1f00: case 0x1f40: case 0x1f80: case 0x1fc0:
pc = MakeEA (ea1, hi, pc, 4);
pc = MakeEA (ea2, lo, pc, 4);
- if (lo == 046) /* MOV src,-(SP) */
+ if (lo == 046) /* MOV src,-(SP) */
sprintf (buffer, "PUSH %s", ea1);
else
- if (hi == 026) /* MOV (SP)+,buffer */
+ if (hi == 026) /* MOV (SP)+,buffer */
sprintf (buffer, "POP %s", ea2);
- else /* all other */
+ else /* all other */
sprintf (buffer, "MOV %s,%s", ea1, ea2);
break;
case 0x2000: case 0x2040: case 0x2080: case 0x20c0: case 0x2100: case 0x2140: case 0x2180: case 0x21c0:
@@ -341,35 +341,35 @@ CPU_DISASSEMBLE( t11 )
case 0x8000: case 0x8040: case 0x8080: case 0x80c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BPL $%04X", pc + offset);
+ sprintf (buffer, "BPL $%04X", pc + offset);
break;
case 0x8100: case 0x8140: case 0x8180: case 0x81c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BMI $%04X", pc + offset);
+ sprintf (buffer, "BMI $%04X", pc + offset);
break;
case 0x8200: case 0x8240: case 0x8280: case 0x82c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BHI $%04X", pc + offset);
+ sprintf (buffer, "BHI $%04X", pc + offset);
break;
case 0x8300: case 0x8340: case 0x8380: case 0x83c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BLOS $%04X", pc + offset);
+ sprintf (buffer, "BLOS $%04X", pc + offset);
break;
case 0x8400: case 0x8440: case 0x8480: case 0x84c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BVC $%04X", pc + offset);
+ sprintf (buffer, "BVC $%04X", pc + offset);
break;
case 0x8500: case 0x8540: case 0x8580: case 0x85c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BVS $%04X", pc + offset);
+ sprintf (buffer, "BVS $%04X", pc + offset);
break;
case 0x8600: case 0x8640: case 0x8680: case 0x86c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BCC $%04X", pc + offset);
- break;
+ sprintf (buffer, "BCC $%04X", pc + offset);
+ break;
case 0x8700: case 0x8740: case 0x8780: case 0x87c0:
offset = 2 * (INT8)(op & 0xff);
- sprintf (buffer, "BCS $%04X", pc + offset);
+ sprintf (buffer, "BCS $%04X", pc + offset);
break;
case 0x8800: case 0x8840: case 0x8880: case 0x88c0:
sprintf (buffer, "EMT #$%02X", op & 0xff);
@@ -507,10 +507,10 @@ CPU_DISASSEMBLE( t11 )
sprintf (buffer, "SUB %s,%s", ea1, ea2);
break;
- default:
+ default:
sprintf (buffer, "???? (%06o)", op);
break;
}
- return (pc - PC) | flags | DASMFLAG_SUPPORTED;
+ return (pc - PC) | flags | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/t11/t11ops.c b/src/emu/cpu/t11/t11ops.c
index 0b7c82617d8..3f17677e0a8 100644
--- a/src/emu/cpu/t11/t11ops.c
+++ b/src/emu/cpu/t11/t11ops.c
@@ -165,7 +165,7 @@
#define BITB_R(s,d) int sreg, dreg, source, dest, result; GET_SB_##s; GET_DB_##d; CLR_NZV; result = dest & source; SETB_NZ;
#define BITB_M(s,d) int sreg, dreg, source, dest, result, ea; GET_SB_##s; GET_DB_##d; CLR_NZV; result = dest & source; SETB_NZ;
/* BR: if (condition) branch */
-#define BR(c) if (c) { cpustate->PC += 2 * (signed char)(op & 0xff); }
+#define BR(c) if (c) { cpustate->PC += 2 * (signed char)(op & 0xff); }
/* CLR: dst = 0 */
#define CLR_R(d) int dreg; PUT_DW_##d(0); CLR_NZVC; SET_Z
#define CLR_M(d) int dreg, ea; PUT_DW_##d(0); CLR_NZVC; SET_Z
@@ -255,14 +255,14 @@ static void op_0000(t11_state *cpustate, UINT16 op)
{
switch (op & 0x3f)
{
- case 0x00: /* HALT */ halt(cpustate, op); break;
- case 0x01: /* WAIT */ cpustate->icount = 0; cpustate->wait_state = 1; break;
- case 0x02: /* RTI */ cpustate->icount -= 24; cpustate->PC = POP(cpustate); cpustate->PSW = POP(cpustate); t11_check_irqs(cpustate); break;
- case 0x03: /* BPT */ cpustate->icount -= 48; PUSH(cpustate, cpustate->PSW); PUSH(cpustate, cpustate->PC); cpustate->PC = RWORD(cpustate, 0x0c); cpustate->PSW = RWORD(cpustate, 0x0e); t11_check_irqs(cpustate); break;
- case 0x04: /* IOT */ cpustate->icount -= 48; PUSH(cpustate, cpustate->PSW); PUSH(cpustate, cpustate->PC); cpustate->PC = RWORD(cpustate, 0x10); cpustate->PSW = RWORD(cpustate, 0x12); t11_check_irqs(cpustate); break;
- case 0x05: /* RESET */ cpustate->icount -= 110; break;
- case 0x06: /* RTT */ cpustate->icount -= 33; cpustate->PC = POP(cpustate); cpustate->PSW = POP(cpustate); t11_check_irqs(cpustate); break;
- default: illegal(cpustate, op); break;
+ case 0x00: /* HALT */ halt(cpustate, op); break;
+ case 0x01: /* WAIT */ cpustate->icount = 0; cpustate->wait_state = 1; break;
+ case 0x02: /* RTI */ cpustate->icount -= 24; cpustate->PC = POP(cpustate); cpustate->PSW = POP(cpustate); t11_check_irqs(cpustate); break;
+ case 0x03: /* BPT */ cpustate->icount -= 48; PUSH(cpustate, cpustate->PSW); PUSH(cpustate, cpustate->PC); cpustate->PC = RWORD(cpustate, 0x0c); cpustate->PSW = RWORD(cpustate, 0x0e); t11_check_irqs(cpustate); break;
+ case 0x04: /* IOT */ cpustate->icount -= 48; PUSH(cpustate, cpustate->PSW); PUSH(cpustate, cpustate->PC); cpustate->PC = RWORD(cpustate, 0x10); cpustate->PSW = RWORD(cpustate, 0x12); t11_check_irqs(cpustate); break;
+ case 0x05: /* RESET */ cpustate->icount -= 110; break;
+ case 0x06: /* RTT */ cpustate->icount -= 33; cpustate->PC = POP(cpustate); cpustate->PSW = POP(cpustate); t11_check_irqs(cpustate); break;
+ default: illegal(cpustate, op); break;
}
}
@@ -312,8 +312,8 @@ static void rts(t11_state *cpustate, UINT16 op)
cpustate->REGW(dreg) = POP(cpustate);
}
-static void ccc(t11_state *cpustate, UINT16 op) { cpustate->icount -= 18; { cpustate->PSW &= ~(op & 15); } }
-static void scc(t11_state *cpustate, UINT16 op) { cpustate->icount -= 18; { cpustate->PSW |= (op & 15); } }
+static void ccc(t11_state *cpustate, UINT16 op) { cpustate->icount -= 18; { cpustate->PSW &= ~(op & 15); } }
+static void scc(t11_state *cpustate, UINT16 op) { cpustate->icount -= 18; { cpustate->PSW |= (op & 15); } }
static void swab_rg(t11_state *cpustate, UINT16 op) { cpustate->icount -= 12; { SWAB_R(RG); } }
static void swab_rgd(t11_state *cpustate, UINT16 op) { cpustate->icount -= 21; { SWAB_M(RGD); } }
diff --git a/src/emu/cpu/t11/t11table.c b/src/emu/cpu/t11/t11table.c
index 5bb263378de..3c1a8dc0de7 100644
--- a/src/emu/cpu/t11/t11table.c
+++ b/src/emu/cpu/t11/t11table.c
@@ -1113,744 +1113,744 @@ static void sub_ixd_ixd(t11_state *cpustate, UINT16 op);
static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
{
/* 0x0000 */
- op_0000, halt, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, jmp_rgd, jmp_in, jmp_ind, jmp_de, jmp_ded, jmp_ix, jmp_ixd,
- rts, illegal, illegal, illegal, ccc, ccc, scc, scc,
- swab_rg, swab_rgd, swab_in, swab_ind, swab_de, swab_ded, swab_ix, swab_ixd,
+ op_0000, halt, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, jmp_rgd, jmp_in, jmp_ind, jmp_de, jmp_ded, jmp_ix, jmp_ixd,
+ rts, illegal, illegal, illegal, ccc, ccc, scc, scc,
+ swab_rg, swab_rgd, swab_in, swab_ind, swab_de, swab_ded, swab_ix, swab_ixd,
/* 0x0100 */
- br, br, br, br, br, br, br, br,
- br, br, br, br, br, br, br, br,
- br, br, br, br, br, br, br, br,
- br, br, br, br, br, br, br, br,
+ br, br, br, br, br, br, br, br,
+ br, br, br, br, br, br, br, br,
+ br, br, br, br, br, br, br, br,
+ br, br, br, br, br, br, br, br,
/* 0x0200 */
- bne, bne, bne, bne, bne, bne, bne, bne,
- bne, bne, bne, bne, bne, bne, bne, bne,
- bne, bne, bne, bne, bne, bne, bne, bne,
- bne, bne, bne, bne, bne, bne, bne, bne,
+ bne, bne, bne, bne, bne, bne, bne, bne,
+ bne, bne, bne, bne, bne, bne, bne, bne,
+ bne, bne, bne, bne, bne, bne, bne, bne,
+ bne, bne, bne, bne, bne, bne, bne, bne,
/* 0x0300 */
- beq, beq, beq, beq, beq, beq, beq, beq,
- beq, beq, beq, beq, beq, beq, beq, beq,
- beq, beq, beq, beq, beq, beq, beq, beq,
- beq, beq, beq, beq, beq, beq, beq, beq,
+ beq, beq, beq, beq, beq, beq, beq, beq,
+ beq, beq, beq, beq, beq, beq, beq, beq,
+ beq, beq, beq, beq, beq, beq, beq, beq,
+ beq, beq, beq, beq, beq, beq, beq, beq,
/* 0x0400 */
- bge, bge, bge, bge, bge, bge, bge, bge,
- bge, bge, bge, bge, bge, bge, bge, bge,
- bge, bge, bge, bge, bge, bge, bge, bge,
- bge, bge, bge, bge, bge, bge, bge, bge,
+ bge, bge, bge, bge, bge, bge, bge, bge,
+ bge, bge, bge, bge, bge, bge, bge, bge,
+ bge, bge, bge, bge, bge, bge, bge, bge,
+ bge, bge, bge, bge, bge, bge, bge, bge,
/* 0x0500 */
- blt, blt, blt, blt, blt, blt, blt, blt,
- blt, blt, blt, blt, blt, blt, blt, blt,
- blt, blt, blt, blt, blt, blt, blt, blt,
- blt, blt, blt, blt, blt, blt, blt, blt,
+ blt, blt, blt, blt, blt, blt, blt, blt,
+ blt, blt, blt, blt, blt, blt, blt, blt,
+ blt, blt, blt, blt, blt, blt, blt, blt,
+ blt, blt, blt, blt, blt, blt, blt, blt,
/* 0x0600 */
- bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
- bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
- bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
- bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
+ bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
+ bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
+ bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
+ bgt, bgt, bgt, bgt, bgt, bgt, bgt, bgt,
/* 0x0700 */
- ble, ble, ble, ble, ble, ble, ble, ble,
- ble, ble, ble, ble, ble, ble, ble, ble,
- ble, ble, ble, ble, ble, ble, ble, ble,
- ble, ble, ble, ble, ble, ble, ble, ble,
+ ble, ble, ble, ble, ble, ble, ble, ble,
+ ble, ble, ble, ble, ble, ble, ble, ble,
+ ble, ble, ble, ble, ble, ble, ble, ble,
+ ble, ble, ble, ble, ble, ble, ble, ble,
/* 0x0800 */
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
/* 0x0900 */
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
- illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
+ illegal, jsr_rgd, jsr_in, jsr_ind, jsr_de, jsr_ded, jsr_ix, jsr_ixd,
/* 0x0a00 */
- clr_rg, clr_rgd, clr_in, clr_ind, clr_de, clr_ded, clr_ix, clr_ixd,
- com_rg, com_rgd, com_in, com_ind, com_de, com_ded, com_ix, com_ixd,
- inc_rg, inc_rgd, inc_in, inc_ind, inc_de, inc_ded, inc_ix, inc_ixd,
- dec_rg, dec_rgd, dec_in, dec_ind, dec_de, dec_ded, dec_ix, dec_ixd,
+ clr_rg, clr_rgd, clr_in, clr_ind, clr_de, clr_ded, clr_ix, clr_ixd,
+ com_rg, com_rgd, com_in, com_ind, com_de, com_ded, com_ix, com_ixd,
+ inc_rg, inc_rgd, inc_in, inc_ind, inc_de, inc_ded, inc_ix, inc_ixd,
+ dec_rg, dec_rgd, dec_in, dec_ind, dec_de, dec_ded, dec_ix, dec_ixd,
/* 0x0b00 */
- neg_rg, neg_rgd, neg_in, neg_ind, neg_de, neg_ded, neg_ix, neg_ixd,
- adc_rg, adc_rgd, adc_in, adc_ind, adc_de, adc_ded, adc_ix, adc_ixd,
- sbc_rg, sbc_rgd, sbc_in, sbc_ind, sbc_de, sbc_ded, sbc_ix, sbc_ixd,
- tst_rg, tst_rgd, tst_in, tst_ind, tst_de, tst_ded, tst_ix, tst_ixd,
+ neg_rg, neg_rgd, neg_in, neg_ind, neg_de, neg_ded, neg_ix, neg_ixd,
+ adc_rg, adc_rgd, adc_in, adc_ind, adc_de, adc_ded, adc_ix, adc_ixd,
+ sbc_rg, sbc_rgd, sbc_in, sbc_ind, sbc_de, sbc_ded, sbc_ix, sbc_ixd,
+ tst_rg, tst_rgd, tst_in, tst_ind, tst_de, tst_ded, tst_ix, tst_ixd,
/* 0x0c00 */
- ror_rg, ror_rgd, ror_in, ror_ind, ror_de, ror_ded, ror_ix, ror_ixd,
- rol_rg, rol_rgd, rol_in, rol_ind, rol_de, rol_ded, rol_ix, rol_ixd,
- asr_rg, asr_rgd, asr_in, asr_ind, asr_de, asr_ded, asr_ix, asr_ixd,
- asl_rg, asl_rgd, asl_in, asl_ind, asl_de, asl_ded, asl_ix, asl_ixd,
+ ror_rg, ror_rgd, ror_in, ror_ind, ror_de, ror_ded, ror_ix, ror_ixd,
+ rol_rg, rol_rgd, rol_in, rol_ind, rol_de, rol_ded, rol_ix, rol_ixd,
+ asr_rg, asr_rgd, asr_in, asr_ind, asr_de, asr_ded, asr_ix, asr_ixd,
+ asl_rg, asl_rgd, asl_in, asl_ind, asl_de, asl_ded, asl_ix, asl_ixd,
/* 0x0d00 */
- mark, mark, mark, mark, mark, mark, mark, mark,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- sxt_rg, sxt_rgd, sxt_in, sxt_ind, sxt_de, sxt_ded, sxt_ix, sxt_ixd,
+ mark, mark, mark, mark, mark, mark, mark, mark,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ sxt_rg, sxt_rgd, sxt_in, sxt_ind, sxt_de, sxt_ded, sxt_ix, sxt_ixd,
/* 0x0e00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x0f00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x1000 */
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
/* 0x1100 */
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
- mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
+ mov_rg_rg, mov_rg_rgd, mov_rg_in, mov_rg_ind, mov_rg_de, mov_rg_ded, mov_rg_ix, mov_rg_ixd,
/* 0x1200 */
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
/* 0x1300 */
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
- mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
+ mov_rgd_rg, mov_rgd_rgd,mov_rgd_in, mov_rgd_ind,mov_rgd_de, mov_rgd_ded,mov_rgd_ix, mov_rgd_ixd,
/* 0x1400 */
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
/* 0x1500 */
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
- mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
+ mov_in_rg, mov_in_rgd, mov_in_in, mov_in_ind, mov_in_de, mov_in_ded, mov_in_ix, mov_in_ixd,
/* 0x1600 */
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
/* 0x1700 */
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
- mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
+ mov_ind_rg, mov_ind_rgd,mov_ind_in, mov_ind_ind,mov_ind_de, mov_ind_ded,mov_ind_ix, mov_ind_ixd,
/* 0x1800 */
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
/* 0x1900 */
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
- mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
+ mov_de_rg, mov_de_rgd, mov_de_in, mov_de_ind, mov_de_de, mov_de_ded, mov_de_ix, mov_de_ixd,
/* 0x1a00 */
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
/* 0x1b00 */
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
- mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
+ mov_ded_rg, mov_ded_rgd,mov_ded_in, mov_ded_ind,mov_ded_de, mov_ded_ded,mov_ded_ix, mov_ded_ixd,
/* 0x1c00 */
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
/* 0x1d00 */
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
- mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
+ mov_ix_rg, mov_ix_rgd, mov_ix_in, mov_ix_ind, mov_ix_de, mov_ix_ded, mov_ix_ix, mov_ix_ixd,
/* 0x1e00 */
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
/* 0x1f00 */
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
- mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
+ mov_ixd_rg, mov_ixd_rgd,mov_ixd_in, mov_ixd_ind,mov_ixd_de, mov_ixd_ded,mov_ixd_ix, mov_ixd_ixd,
/* 0x2000 */
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
/* 0x2100 */
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
- cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
+ cmp_rg_rg, cmp_rg_rgd, cmp_rg_in, cmp_rg_ind, cmp_rg_de, cmp_rg_ded, cmp_rg_ix, cmp_rg_ixd,
/* 0x2200 */
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
/* 0x2300 */
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
- cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
+ cmp_rgd_rg, cmp_rgd_rgd,cmp_rgd_in, cmp_rgd_ind,cmp_rgd_de, cmp_rgd_ded,cmp_rgd_ix, cmp_rgd_ixd,
/* 0x2400 */
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
/* 0x2500 */
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
- cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
+ cmp_in_rg, cmp_in_rgd, cmp_in_in, cmp_in_ind, cmp_in_de, cmp_in_ded, cmp_in_ix, cmp_in_ixd,
/* 0x2600 */
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
/* 0x2700 */
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
- cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
+ cmp_ind_rg, cmp_ind_rgd,cmp_ind_in, cmp_ind_ind,cmp_ind_de, cmp_ind_ded,cmp_ind_ix, cmp_ind_ixd,
/* 0x2800 */
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
/* 0x2900 */
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
- cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
+ cmp_de_rg, cmp_de_rgd, cmp_de_in, cmp_de_ind, cmp_de_de, cmp_de_ded, cmp_de_ix, cmp_de_ixd,
/* 0x2a00 */
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
/* 0x2b00 */
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
- cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
+ cmp_ded_rg, cmp_ded_rgd,cmp_ded_in, cmp_ded_ind,cmp_ded_de, cmp_ded_ded,cmp_ded_ix, cmp_ded_ixd,
/* 0x2c00 */
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
/* 0x2d00 */
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
- cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
+ cmp_ix_rg, cmp_ix_rgd, cmp_ix_in, cmp_ix_ind, cmp_ix_de, cmp_ix_ded, cmp_ix_ix, cmp_ix_ixd,
/* 0x2e00 */
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
/* 0x2f00 */
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
- cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
+ cmp_ixd_rg, cmp_ixd_rgd,cmp_ixd_in, cmp_ixd_ind,cmp_ixd_de, cmp_ixd_ded,cmp_ixd_ix, cmp_ixd_ixd,
/* 0x3000 */
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
/* 0x3100 */
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
- bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
+ bit_rg_rg, bit_rg_rgd, bit_rg_in, bit_rg_ind, bit_rg_de, bit_rg_ded, bit_rg_ix, bit_rg_ixd,
/* 0x3200 */
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
/* 0x3300 */
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
- bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
+ bit_rgd_rg, bit_rgd_rgd,bit_rgd_in, bit_rgd_ind,bit_rgd_de, bit_rgd_ded,bit_rgd_ix, bit_rgd_ixd,
/* 0x3400 */
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
/* 0x3500 */
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
- bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
+ bit_in_rg, bit_in_rgd, bit_in_in, bit_in_ind, bit_in_de, bit_in_ded, bit_in_ix, bit_in_ixd,
/* 0x3600 */
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
/* 0x3700 */
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
- bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
+ bit_ind_rg, bit_ind_rgd,bit_ind_in, bit_ind_ind,bit_ind_de, bit_ind_ded,bit_ind_ix, bit_ind_ixd,
/* 0x3800 */
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
/* 0x3900 */
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
- bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
+ bit_de_rg, bit_de_rgd, bit_de_in, bit_de_ind, bit_de_de, bit_de_ded, bit_de_ix, bit_de_ixd,
/* 0x3a00 */
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
/* 0x3b00 */
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
- bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
+ bit_ded_rg, bit_ded_rgd,bit_ded_in, bit_ded_ind,bit_ded_de, bit_ded_ded,bit_ded_ix, bit_ded_ixd,
/* 0x3c00 */
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
/* 0x3d00 */
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
- bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
+ bit_ix_rg, bit_ix_rgd, bit_ix_in, bit_ix_ind, bit_ix_de, bit_ix_ded, bit_ix_ix, bit_ix_ixd,
/* 0x3e00 */
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
/* 0x3f00 */
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
- bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
+ bit_ixd_rg, bit_ixd_rgd,bit_ixd_in, bit_ixd_ind,bit_ixd_de, bit_ixd_ded,bit_ixd_ix, bit_ixd_ixd,
/* 0x4000 */
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
/* 0x4100 */
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
- bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
+ bic_rg_rg, bic_rg_rgd, bic_rg_in, bic_rg_ind, bic_rg_de, bic_rg_ded, bic_rg_ix, bic_rg_ixd,
/* 0x4200 */
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
/* 0x4300 */
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
- bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
+ bic_rgd_rg, bic_rgd_rgd,bic_rgd_in, bic_rgd_ind,bic_rgd_de, bic_rgd_ded,bic_rgd_ix, bic_rgd_ixd,
/* 0x4400 */
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
/* 0x4500 */
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
- bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
+ bic_in_rg, bic_in_rgd, bic_in_in, bic_in_ind, bic_in_de, bic_in_ded, bic_in_ix, bic_in_ixd,
/* 0x4600 */
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
/* 0x4700 */
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
- bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
+ bic_ind_rg, bic_ind_rgd,bic_ind_in, bic_ind_ind,bic_ind_de, bic_ind_ded,bic_ind_ix, bic_ind_ixd,
/* 0x4800 */
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
/* 0x4900 */
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
- bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
+ bic_de_rg, bic_de_rgd, bic_de_in, bic_de_ind, bic_de_de, bic_de_ded, bic_de_ix, bic_de_ixd,
/* 0x4a00 */
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
/* 0x4b00 */
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
- bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
+ bic_ded_rg, bic_ded_rgd,bic_ded_in, bic_ded_ind,bic_ded_de, bic_ded_ded,bic_ded_ix, bic_ded_ixd,
/* 0x4c00 */
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
/* 0x4d00 */
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
- bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
+ bic_ix_rg, bic_ix_rgd, bic_ix_in, bic_ix_ind, bic_ix_de, bic_ix_ded, bic_ix_ix, bic_ix_ixd,
/* 0x4e00 */
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
/* 0x4f00 */
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
- bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
+ bic_ixd_rg, bic_ixd_rgd,bic_ixd_in, bic_ixd_ind,bic_ixd_de, bic_ixd_ded,bic_ixd_ix, bic_ixd_ixd,
/* 0x5000 */
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
/* 0x5100 */
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
- bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
+ bis_rg_rg, bis_rg_rgd, bis_rg_in, bis_rg_ind, bis_rg_de, bis_rg_ded, bis_rg_ix, bis_rg_ixd,
/* 0x5200 */
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
/* 0x5300 */
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
- bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
+ bis_rgd_rg, bis_rgd_rgd,bis_rgd_in, bis_rgd_ind,bis_rgd_de, bis_rgd_ded,bis_rgd_ix, bis_rgd_ixd,
/* 0x5400 */
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
/* 0x5500 */
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
- bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
+ bis_in_rg, bis_in_rgd, bis_in_in, bis_in_ind, bis_in_de, bis_in_ded, bis_in_ix, bis_in_ixd,
/* 0x5600 */
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
/* 0x5700 */
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
- bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
+ bis_ind_rg, bis_ind_rgd,bis_ind_in, bis_ind_ind,bis_ind_de, bis_ind_ded,bis_ind_ix, bis_ind_ixd,
/* 0x5800 */
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
/* 0x5900 */
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
- bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
+ bis_de_rg, bis_de_rgd, bis_de_in, bis_de_ind, bis_de_de, bis_de_ded, bis_de_ix, bis_de_ixd,
/* 0x5a00 */
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
/* 0x5b00 */
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
- bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
+ bis_ded_rg, bis_ded_rgd,bis_ded_in, bis_ded_ind,bis_ded_de, bis_ded_ded,bis_ded_ix, bis_ded_ixd,
/* 0x5c00 */
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
/* 0x5d00 */
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
- bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
+ bis_ix_rg, bis_ix_rgd, bis_ix_in, bis_ix_ind, bis_ix_de, bis_ix_ded, bis_ix_ix, bis_ix_ixd,
/* 0x5e00 */
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
/* 0x5f00 */
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
- bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
+ bis_ixd_rg, bis_ixd_rgd,bis_ixd_in, bis_ixd_ind,bis_ixd_de, bis_ixd_ded,bis_ixd_ix, bis_ixd_ixd,
/* 0x6000 */
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
/* 0x6100 */
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
- add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
+ add_rg_rg, add_rg_rgd, add_rg_in, add_rg_ind, add_rg_de, add_rg_ded, add_rg_ix, add_rg_ixd,
/* 0x6200 */
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
/* 0x6300 */
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
- add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
+ add_rgd_rg, add_rgd_rgd,add_rgd_in, add_rgd_ind,add_rgd_de, add_rgd_ded,add_rgd_ix, add_rgd_ixd,
/* 0x6400 */
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
/* 0x6500 */
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
- add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
+ add_in_rg, add_in_rgd, add_in_in, add_in_ind, add_in_de, add_in_ded, add_in_ix, add_in_ixd,
/* 0x6600 */
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
/* 0x6700 */
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
- add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
+ add_ind_rg, add_ind_rgd,add_ind_in, add_ind_ind,add_ind_de, add_ind_ded,add_ind_ix, add_ind_ixd,
/* 0x6800 */
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
/* 0x6900 */
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
- add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
+ add_de_rg, add_de_rgd, add_de_in, add_de_ind, add_de_de, add_de_ded, add_de_ix, add_de_ixd,
/* 0x6a00 */
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
/* 0x6b00 */
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
- add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
+ add_ded_rg, add_ded_rgd,add_ded_in, add_ded_ind,add_ded_de, add_ded_ded,add_ded_ix, add_ded_ixd,
/* 0x6c00 */
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
/* 0x6d00 */
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
- add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
+ add_ix_rg, add_ix_rgd, add_ix_in, add_ix_ind, add_ix_de, add_ix_ded, add_ix_ix, add_ix_ixd,
/* 0x6e00 */
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
/* 0x6f00 */
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
- add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
+ add_ixd_rg, add_ixd_rgd,add_ixd_in, add_ixd_ind,add_ixd_de, add_ixd_ded,add_ixd_ix, add_ixd_ixd,
/* 0x7000 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7100 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7200 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7300 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7400 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7500 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7600 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7700 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7800 */
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
/* 0x7900 */
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
- xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
+ xor_rg, xor_rgd, xor_in, xor_ind, xor_de, xor_ded, xor_ix, xor_ixd,
/* 0x7a00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7b00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7c00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7d00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x7e00 */
- sob, sob, sob, sob, sob, sob, sob, sob,
- sob, sob, sob, sob, sob, sob, sob, sob,
- sob, sob, sob, sob, sob, sob, sob, sob,
- sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
/* 0x7f00 */
- sob, sob, sob, sob, sob, sob, sob, sob,
- sob, sob, sob, sob, sob, sob, sob, sob,
- sob, sob, sob, sob, sob, sob, sob, sob,
- sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
+ sob, sob, sob, sob, sob, sob, sob, sob,
/* 0x8000 */
- bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
- bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
- bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
- bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
+ bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
+ bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
+ bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
+ bpl, bpl, bpl, bpl, bpl, bpl, bpl, bpl,
/* 0x8100 */
- bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
- bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
- bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
- bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
+ bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
+ bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
+ bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
+ bmi, bmi, bmi, bmi, bmi, bmi, bmi, bmi,
/* 0x8200 */
- bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
- bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
- bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
- bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
+ bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
+ bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
+ bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
+ bhi, bhi, bhi, bhi, bhi, bhi, bhi, bhi,
/* 0x8300 */
- blos, blos, blos, blos, blos, blos, blos, blos,
- blos, blos, blos, blos, blos, blos, blos, blos,
- blos, blos, blos, blos, blos, blos, blos, blos,
- blos, blos, blos, blos, blos, blos, blos, blos,
+ blos, blos, blos, blos, blos, blos, blos, blos,
+ blos, blos, blos, blos, blos, blos, blos, blos,
+ blos, blos, blos, blos, blos, blos, blos, blos,
+ blos, blos, blos, blos, blos, blos, blos, blos,
/* 0x8400 */
- bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
- bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
- bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
- bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
+ bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
+ bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
+ bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
+ bvc, bvc, bvc, bvc, bvc, bvc, bvc, bvc,
/* 0x8500 */
- bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
- bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
- bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
- bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
+ bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
+ bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
+ bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
+ bvs, bvs, bvs, bvs, bvs, bvs, bvs, bvs,
/* 0x8600 */
- bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
- bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
- bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
- bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
+ bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
+ bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
+ bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
+ bcc, bcc, bcc, bcc, bcc, bcc, bcc, bcc,
/* 0x8700 */
- bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
- bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
- bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
- bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
+ bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
+ bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
+ bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
+ bcs, bcs, bcs, bcs, bcs, bcs, bcs, bcs,
/* 0x8800 */
- emt, emt, emt, emt, emt, emt, emt, emt,
- emt, emt, emt, emt, emt, emt, emt, emt,
- emt, emt, emt, emt, emt, emt, emt, emt,
- emt, emt, emt, emt, emt, emt, emt, emt,
+ emt, emt, emt, emt, emt, emt, emt, emt,
+ emt, emt, emt, emt, emt, emt, emt, emt,
+ emt, emt, emt, emt, emt, emt, emt, emt,
+ emt, emt, emt, emt, emt, emt, emt, emt,
/* 0x8900 */
- trap, trap, trap, trap, trap, trap, trap, trap,
- trap, trap, trap, trap, trap, trap, trap, trap,
- trap, trap, trap, trap, trap, trap, trap, trap,
- trap, trap, trap, trap, trap, trap, trap, trap,
+ trap, trap, trap, trap, trap, trap, trap, trap,
+ trap, trap, trap, trap, trap, trap, trap, trap,
+ trap, trap, trap, trap, trap, trap, trap, trap,
+ trap, trap, trap, trap, trap, trap, trap, trap,
/* 0x8a00 */
- clrb_rg, clrb_rgd, clrb_in, clrb_ind, clrb_de, clrb_ded, clrb_ix, clrb_ixd,
- comb_rg, comb_rgd, comb_in, comb_ind, comb_de, comb_ded, comb_ix, comb_ixd,
- incb_rg, incb_rgd, incb_in, incb_ind, incb_de, incb_ded, incb_ix, incb_ixd,
- decb_rg, decb_rgd, decb_in, decb_ind, decb_de, decb_ded, decb_ix, decb_ixd,
+ clrb_rg, clrb_rgd, clrb_in, clrb_ind, clrb_de, clrb_ded, clrb_ix, clrb_ixd,
+ comb_rg, comb_rgd, comb_in, comb_ind, comb_de, comb_ded, comb_ix, comb_ixd,
+ incb_rg, incb_rgd, incb_in, incb_ind, incb_de, incb_ded, incb_ix, incb_ixd,
+ decb_rg, decb_rgd, decb_in, decb_ind, decb_de, decb_ded, decb_ix, decb_ixd,
/* 0x8b00 */
- negb_rg, negb_rgd, negb_in, negb_ind, negb_de, negb_ded, negb_ix, negb_ixd,
- adcb_rg, adcb_rgd, adcb_in, adcb_ind, adcb_de, adcb_ded, adcb_ix, adcb_ixd,
- sbcb_rg, sbcb_rgd, sbcb_in, sbcb_ind, sbcb_de, sbcb_ded, sbcb_ix, sbcb_ixd,
- tstb_rg, tstb_rgd, tstb_in, tstb_ind, tstb_de, tstb_ded, tstb_ix, tstb_ixd,
+ negb_rg, negb_rgd, negb_in, negb_ind, negb_de, negb_ded, negb_ix, negb_ixd,
+ adcb_rg, adcb_rgd, adcb_in, adcb_ind, adcb_de, adcb_ded, adcb_ix, adcb_ixd,
+ sbcb_rg, sbcb_rgd, sbcb_in, sbcb_ind, sbcb_de, sbcb_ded, sbcb_ix, sbcb_ixd,
+ tstb_rg, tstb_rgd, tstb_in, tstb_ind, tstb_de, tstb_ded, tstb_ix, tstb_ixd,
/* 0x8c00 */
- rorb_rg, rorb_rgd, rorb_in, rorb_ind, rorb_de, rorb_ded, rorb_ix, rorb_ixd,
- rolb_rg, rolb_rgd, rolb_in, rolb_ind, rolb_de, rolb_ded, rolb_ix, rolb_ixd,
- asrb_rg, asrb_rgd, asrb_in, asrb_ind, asrb_de, asrb_ded, asrb_ix, asrb_ixd,
- aslb_rg, aslb_rgd, aslb_in, aslb_ind, aslb_de, aslb_ded, aslb_ix, aslb_ixd,
+ rorb_rg, rorb_rgd, rorb_in, rorb_ind, rorb_de, rorb_ded, rorb_ix, rorb_ixd,
+ rolb_rg, rolb_rgd, rolb_in, rolb_ind, rolb_de, rolb_ded, rolb_ix, rolb_ixd,
+ asrb_rg, asrb_rgd, asrb_in, asrb_ind, asrb_de, asrb_ded, asrb_ix, asrb_ixd,
+ aslb_rg, aslb_rgd, aslb_in, aslb_ind, aslb_de, aslb_ded, aslb_ix, aslb_ixd,
/* 0x8d00 */
- mtps_rg, mtps_rgd, mtps_in, mtps_ind, mtps_de, mtps_ded, mtps_ix, mtps_ixd,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- mfps_rg, mfps_rgd, mfps_in, mfps_ind, mfps_de, mfps_ded, mfps_ix, mfps_ixd,
+ mtps_rg, mtps_rgd, mtps_in, mtps_ind, mtps_de, mtps_ded, mtps_ix, mtps_ixd,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ mfps_rg, mfps_rgd, mfps_in, mfps_ind, mfps_de, mfps_ded, mfps_ix, mfps_ixd,
/* 0x8e00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x8f00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0x9000 */
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
/* 0x9100 */
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
- movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
+ movb_rg_rg, movb_rg_rgd,movb_rg_in, movb_rg_ind,movb_rg_de, movb_rg_ded,movb_rg_ix, movb_rg_ixd,
/* 0x9200 */
movb_rgd_rg,movb_rgd_rgd,movb_rgd_in,movb_rgd_ind,movb_rgd_de,movb_rgd_ded,movb_rgd_ix,movb_rgd_ixd,
movb_rgd_rg,movb_rgd_rgd,movb_rgd_in,movb_rgd_ind,movb_rgd_de,movb_rgd_ded,movb_rgd_ix,movb_rgd_ixd,
@@ -1862,15 +1862,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
movb_rgd_rg,movb_rgd_rgd,movb_rgd_in,movb_rgd_ind,movb_rgd_de,movb_rgd_ded,movb_rgd_ix,movb_rgd_ixd,
movb_rgd_rg,movb_rgd_rgd,movb_rgd_in,movb_rgd_ind,movb_rgd_de,movb_rgd_ded,movb_rgd_ix,movb_rgd_ixd,
/* 0x9400 */
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
/* 0x9500 */
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
- movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
+ movb_in_rg, movb_in_rgd,movb_in_in, movb_in_ind,movb_in_de, movb_in_ded,movb_in_ix, movb_in_ixd,
/* 0x9600 */
movb_ind_rg,movb_ind_rgd,movb_ind_in,movb_ind_ind,movb_ind_de,movb_ind_ded,movb_ind_ix,movb_ind_ixd,
movb_ind_rg,movb_ind_rgd,movb_ind_in,movb_ind_ind,movb_ind_de,movb_ind_ded,movb_ind_ix,movb_ind_ixd,
@@ -1882,15 +1882,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
movb_ind_rg,movb_ind_rgd,movb_ind_in,movb_ind_ind,movb_ind_de,movb_ind_ded,movb_ind_ix,movb_ind_ixd,
movb_ind_rg,movb_ind_rgd,movb_ind_in,movb_ind_ind,movb_ind_de,movb_ind_ded,movb_ind_ix,movb_ind_ixd,
/* 0x9800 */
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
/* 0x9900 */
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
- movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
+ movb_de_rg, movb_de_rgd,movb_de_in, movb_de_ind,movb_de_de, movb_de_ded,movb_de_ix, movb_de_ixd,
/* 0x9a00 */
movb_ded_rg,movb_ded_rgd,movb_ded_in,movb_ded_ind,movb_ded_de,movb_ded_ded,movb_ded_ix,movb_ded_ixd,
movb_ded_rg,movb_ded_rgd,movb_ded_in,movb_ded_ind,movb_ded_de,movb_ded_ded,movb_ded_ix,movb_ded_ixd,
@@ -1902,15 +1902,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
movb_ded_rg,movb_ded_rgd,movb_ded_in,movb_ded_ind,movb_ded_de,movb_ded_ded,movb_ded_ix,movb_ded_ixd,
movb_ded_rg,movb_ded_rgd,movb_ded_in,movb_ded_ind,movb_ded_de,movb_ded_ded,movb_ded_ix,movb_ded_ixd,
/* 0x9c00 */
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
/* 0x9d00 */
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
- movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
+ movb_ix_rg, movb_ix_rgd,movb_ix_in, movb_ix_ind,movb_ix_de, movb_ix_ded,movb_ix_ix, movb_ix_ixd,
/* 0x9e00 */
movb_ixd_rg,movb_ixd_rgd,movb_ixd_in,movb_ixd_ind,movb_ixd_de,movb_ixd_ded,movb_ixd_ix,movb_ixd_ixd,
movb_ixd_rg,movb_ixd_rgd,movb_ixd_in,movb_ixd_ind,movb_ixd_de,movb_ixd_ded,movb_ixd_ix,movb_ixd_ixd,
@@ -1923,15 +1923,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
movb_ixd_rg,movb_ixd_rgd,movb_ixd_in,movb_ixd_ind,movb_ixd_de,movb_ixd_ded,movb_ixd_ix,movb_ixd_ixd,
/* 0xa000 */
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
/* 0xa100 */
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
- cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
+ cmpb_rg_rg, cmpb_rg_rgd,cmpb_rg_in, cmpb_rg_ind,cmpb_rg_de, cmpb_rg_ded,cmpb_rg_ix, cmpb_rg_ixd,
/* 0xa200 */
cmpb_rgd_rg,cmpb_rgd_rgd,cmpb_rgd_in,cmpb_rgd_ind,cmpb_rgd_de,cmpb_rgd_ded,cmpb_rgd_ix,cmpb_rgd_ixd,
cmpb_rgd_rg,cmpb_rgd_rgd,cmpb_rgd_in,cmpb_rgd_ind,cmpb_rgd_de,cmpb_rgd_ded,cmpb_rgd_ix,cmpb_rgd_ixd,
@@ -1943,15 +1943,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
cmpb_rgd_rg,cmpb_rgd_rgd,cmpb_rgd_in,cmpb_rgd_ind,cmpb_rgd_de,cmpb_rgd_ded,cmpb_rgd_ix,cmpb_rgd_ixd,
cmpb_rgd_rg,cmpb_rgd_rgd,cmpb_rgd_in,cmpb_rgd_ind,cmpb_rgd_de,cmpb_rgd_ded,cmpb_rgd_ix,cmpb_rgd_ixd,
/* 0xa400 */
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
/* 0xa500 */
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
- cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
+ cmpb_in_rg, cmpb_in_rgd,cmpb_in_in, cmpb_in_ind,cmpb_in_de, cmpb_in_ded,cmpb_in_ix, cmpb_in_ixd,
/* 0xa600 */
cmpb_ind_rg,cmpb_ind_rgd,cmpb_ind_in,cmpb_ind_ind,cmpb_ind_de,cmpb_ind_ded,cmpb_ind_ix,cmpb_ind_ixd,
cmpb_ind_rg,cmpb_ind_rgd,cmpb_ind_in,cmpb_ind_ind,cmpb_ind_de,cmpb_ind_ded,cmpb_ind_ix,cmpb_ind_ixd,
@@ -1963,15 +1963,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
cmpb_ind_rg,cmpb_ind_rgd,cmpb_ind_in,cmpb_ind_ind,cmpb_ind_de,cmpb_ind_ded,cmpb_ind_ix,cmpb_ind_ixd,
cmpb_ind_rg,cmpb_ind_rgd,cmpb_ind_in,cmpb_ind_ind,cmpb_ind_de,cmpb_ind_ded,cmpb_ind_ix,cmpb_ind_ixd,
/* 0xa800 */
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
/* 0xa900 */
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
- cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
+ cmpb_de_rg, cmpb_de_rgd,cmpb_de_in, cmpb_de_ind,cmpb_de_de, cmpb_de_ded,cmpb_de_ix, cmpb_de_ixd,
/* 0xaa00 */
cmpb_ded_rg,cmpb_ded_rgd,cmpb_ded_in,cmpb_ded_ind,cmpb_ded_de,cmpb_ded_ded,cmpb_ded_ix,cmpb_ded_ixd,
cmpb_ded_rg,cmpb_ded_rgd,cmpb_ded_in,cmpb_ded_ind,cmpb_ded_de,cmpb_ded_ded,cmpb_ded_ix,cmpb_ded_ixd,
@@ -1983,15 +1983,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
cmpb_ded_rg,cmpb_ded_rgd,cmpb_ded_in,cmpb_ded_ind,cmpb_ded_de,cmpb_ded_ded,cmpb_ded_ix,cmpb_ded_ixd,
cmpb_ded_rg,cmpb_ded_rgd,cmpb_ded_in,cmpb_ded_ind,cmpb_ded_de,cmpb_ded_ded,cmpb_ded_ix,cmpb_ded_ixd,
/* 0xac00 */
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
/* 0xad00 */
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
- cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
+ cmpb_ix_rg, cmpb_ix_rgd,cmpb_ix_in, cmpb_ix_ind,cmpb_ix_de, cmpb_ix_ded,cmpb_ix_ix, cmpb_ix_ixd,
/* 0xae00 */
cmpb_ixd_rg,cmpb_ixd_rgd,cmpb_ixd_in,cmpb_ixd_ind,cmpb_ixd_de,cmpb_ixd_ded,cmpb_ixd_ix,cmpb_ixd_ixd,
cmpb_ixd_rg,cmpb_ixd_rgd,cmpb_ixd_in,cmpb_ixd_ind,cmpb_ixd_de,cmpb_ixd_ded,cmpb_ixd_ix,cmpb_ixd_ixd,
@@ -2004,15 +2004,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
cmpb_ixd_rg,cmpb_ixd_rgd,cmpb_ixd_in,cmpb_ixd_ind,cmpb_ixd_de,cmpb_ixd_ded,cmpb_ixd_ix,cmpb_ixd_ixd,
/* 0xb000 */
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
/* 0xb100 */
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
- bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
+ bitb_rg_rg, bitb_rg_rgd,bitb_rg_in, bitb_rg_ind,bitb_rg_de, bitb_rg_ded,bitb_rg_ix, bitb_rg_ixd,
/* 0xb200 */
bitb_rgd_rg,bitb_rgd_rgd,bitb_rgd_in,bitb_rgd_ind,bitb_rgd_de,bitb_rgd_ded,bitb_rgd_ix,bitb_rgd_ixd,
bitb_rgd_rg,bitb_rgd_rgd,bitb_rgd_in,bitb_rgd_ind,bitb_rgd_de,bitb_rgd_ded,bitb_rgd_ix,bitb_rgd_ixd,
@@ -2024,15 +2024,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bitb_rgd_rg,bitb_rgd_rgd,bitb_rgd_in,bitb_rgd_ind,bitb_rgd_de,bitb_rgd_ded,bitb_rgd_ix,bitb_rgd_ixd,
bitb_rgd_rg,bitb_rgd_rgd,bitb_rgd_in,bitb_rgd_ind,bitb_rgd_de,bitb_rgd_ded,bitb_rgd_ix,bitb_rgd_ixd,
/* 0xb400 */
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
/* 0xb500 */
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
- bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
+ bitb_in_rg, bitb_in_rgd,bitb_in_in, bitb_in_ind,bitb_in_de, bitb_in_ded,bitb_in_ix, bitb_in_ixd,
/* 0xb600 */
bitb_ind_rg,bitb_ind_rgd,bitb_ind_in,bitb_ind_ind,bitb_ind_de,bitb_ind_ded,bitb_ind_ix,bitb_ind_ixd,
bitb_ind_rg,bitb_ind_rgd,bitb_ind_in,bitb_ind_ind,bitb_ind_de,bitb_ind_ded,bitb_ind_ix,bitb_ind_ixd,
@@ -2044,15 +2044,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bitb_ind_rg,bitb_ind_rgd,bitb_ind_in,bitb_ind_ind,bitb_ind_de,bitb_ind_ded,bitb_ind_ix,bitb_ind_ixd,
bitb_ind_rg,bitb_ind_rgd,bitb_ind_in,bitb_ind_ind,bitb_ind_de,bitb_ind_ded,bitb_ind_ix,bitb_ind_ixd,
/* 0xb800 */
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
/* 0xb900 */
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
- bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
+ bitb_de_rg, bitb_de_rgd,bitb_de_in, bitb_de_ind,bitb_de_de, bitb_de_ded,bitb_de_ix, bitb_de_ixd,
/* 0xba00 */
bitb_ded_rg,bitb_ded_rgd,bitb_ded_in,bitb_ded_ind,bitb_ded_de,bitb_ded_ded,bitb_ded_ix,bitb_ded_ixd,
bitb_ded_rg,bitb_ded_rgd,bitb_ded_in,bitb_ded_ind,bitb_ded_de,bitb_ded_ded,bitb_ded_ix,bitb_ded_ixd,
@@ -2064,15 +2064,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bitb_ded_rg,bitb_ded_rgd,bitb_ded_in,bitb_ded_ind,bitb_ded_de,bitb_ded_ded,bitb_ded_ix,bitb_ded_ixd,
bitb_ded_rg,bitb_ded_rgd,bitb_ded_in,bitb_ded_ind,bitb_ded_de,bitb_ded_ded,bitb_ded_ix,bitb_ded_ixd,
/* 0xbc00 */
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
/* 0xbd00 */
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
- bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
+ bitb_ix_rg, bitb_ix_rgd,bitb_ix_in, bitb_ix_ind,bitb_ix_de, bitb_ix_ded,bitb_ix_ix, bitb_ix_ixd,
/* 0xbe00 */
bitb_ixd_rg,bitb_ixd_rgd,bitb_ixd_in,bitb_ixd_ind,bitb_ixd_de,bitb_ixd_ded,bitb_ixd_ix,bitb_ixd_ixd,
bitb_ixd_rg,bitb_ixd_rgd,bitb_ixd_in,bitb_ixd_ind,bitb_ixd_de,bitb_ixd_ded,bitb_ixd_ix,bitb_ixd_ixd,
@@ -2085,15 +2085,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bitb_ixd_rg,bitb_ixd_rgd,bitb_ixd_in,bitb_ixd_ind,bitb_ixd_de,bitb_ixd_ded,bitb_ixd_ix,bitb_ixd_ixd,
/* 0xc000 */
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
/* 0xc100 */
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
- bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
+ bicb_rg_rg, bicb_rg_rgd,bicb_rg_in, bicb_rg_ind,bicb_rg_de, bicb_rg_ded,bicb_rg_ix, bicb_rg_ixd,
/* 0xc200 */
bicb_rgd_rg,bicb_rgd_rgd,bicb_rgd_in,bicb_rgd_ind,bicb_rgd_de,bicb_rgd_ded,bicb_rgd_ix,bicb_rgd_ixd,
bicb_rgd_rg,bicb_rgd_rgd,bicb_rgd_in,bicb_rgd_ind,bicb_rgd_de,bicb_rgd_ded,bicb_rgd_ix,bicb_rgd_ixd,
@@ -2105,15 +2105,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bicb_rgd_rg,bicb_rgd_rgd,bicb_rgd_in,bicb_rgd_ind,bicb_rgd_de,bicb_rgd_ded,bicb_rgd_ix,bicb_rgd_ixd,
bicb_rgd_rg,bicb_rgd_rgd,bicb_rgd_in,bicb_rgd_ind,bicb_rgd_de,bicb_rgd_ded,bicb_rgd_ix,bicb_rgd_ixd,
/* 0xc400 */
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
/* 0xc500 */
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
- bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
+ bicb_in_rg, bicb_in_rgd,bicb_in_in, bicb_in_ind,bicb_in_de, bicb_in_ded,bicb_in_ix, bicb_in_ixd,
/* 0xc600 */
bicb_ind_rg,bicb_ind_rgd,bicb_ind_in,bicb_ind_ind,bicb_ind_de,bicb_ind_ded,bicb_ind_ix,bicb_ind_ixd,
bicb_ind_rg,bicb_ind_rgd,bicb_ind_in,bicb_ind_ind,bicb_ind_de,bicb_ind_ded,bicb_ind_ix,bicb_ind_ixd,
@@ -2125,15 +2125,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bicb_ind_rg,bicb_ind_rgd,bicb_ind_in,bicb_ind_ind,bicb_ind_de,bicb_ind_ded,bicb_ind_ix,bicb_ind_ixd,
bicb_ind_rg,bicb_ind_rgd,bicb_ind_in,bicb_ind_ind,bicb_ind_de,bicb_ind_ded,bicb_ind_ix,bicb_ind_ixd,
/* 0xc800 */
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
/* 0xc900 */
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
- bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
+ bicb_de_rg, bicb_de_rgd,bicb_de_in, bicb_de_ind,bicb_de_de, bicb_de_ded,bicb_de_ix, bicb_de_ixd,
/* 0xca00 */
bicb_ded_rg,bicb_ded_rgd,bicb_ded_in,bicb_ded_ind,bicb_ded_de,bicb_ded_ded,bicb_ded_ix,bicb_ded_ixd,
bicb_ded_rg,bicb_ded_rgd,bicb_ded_in,bicb_ded_ind,bicb_ded_de,bicb_ded_ded,bicb_ded_ix,bicb_ded_ixd,
@@ -2145,15 +2145,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bicb_ded_rg,bicb_ded_rgd,bicb_ded_in,bicb_ded_ind,bicb_ded_de,bicb_ded_ded,bicb_ded_ix,bicb_ded_ixd,
bicb_ded_rg,bicb_ded_rgd,bicb_ded_in,bicb_ded_ind,bicb_ded_de,bicb_ded_ded,bicb_ded_ix,bicb_ded_ixd,
/* 0xcc00 */
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
/* 0xcd00 */
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
- bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
+ bicb_ix_rg, bicb_ix_rgd,bicb_ix_in, bicb_ix_ind,bicb_ix_de, bicb_ix_ded,bicb_ix_ix, bicb_ix_ixd,
/* 0xce00 */
bicb_ixd_rg,bicb_ixd_rgd,bicb_ixd_in,bicb_ixd_ind,bicb_ixd_de,bicb_ixd_ded,bicb_ixd_ix,bicb_ixd_ixd,
bicb_ixd_rg,bicb_ixd_rgd,bicb_ixd_in,bicb_ixd_ind,bicb_ixd_de,bicb_ixd_ded,bicb_ixd_ix,bicb_ixd_ixd,
@@ -2166,15 +2166,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bicb_ixd_rg,bicb_ixd_rgd,bicb_ixd_in,bicb_ixd_ind,bicb_ixd_de,bicb_ixd_ded,bicb_ixd_ix,bicb_ixd_ixd,
/* 0xd000 */
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
/* 0xd100 */
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
- bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
+ bisb_rg_rg, bisb_rg_rgd,bisb_rg_in, bisb_rg_ind,bisb_rg_de, bisb_rg_ded,bisb_rg_ix, bisb_rg_ixd,
/* 0xd200 */
bisb_rgd_rg,bisb_rgd_rgd,bisb_rgd_in,bisb_rgd_ind,bisb_rgd_de,bisb_rgd_ded,bisb_rgd_ix,bisb_rgd_ixd,
bisb_rgd_rg,bisb_rgd_rgd,bisb_rgd_in,bisb_rgd_ind,bisb_rgd_de,bisb_rgd_ded,bisb_rgd_ix,bisb_rgd_ixd,
@@ -2186,15 +2186,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bisb_rgd_rg,bisb_rgd_rgd,bisb_rgd_in,bisb_rgd_ind,bisb_rgd_de,bisb_rgd_ded,bisb_rgd_ix,bisb_rgd_ixd,
bisb_rgd_rg,bisb_rgd_rgd,bisb_rgd_in,bisb_rgd_ind,bisb_rgd_de,bisb_rgd_ded,bisb_rgd_ix,bisb_rgd_ixd,
/* 0xd400 */
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
/* 0xd500 */
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
- bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
+ bisb_in_rg, bisb_in_rgd,bisb_in_in, bisb_in_ind,bisb_in_de, bisb_in_ded,bisb_in_ix, bisb_in_ixd,
/* 0xd600 */
bisb_ind_rg,bisb_ind_rgd,bisb_ind_in,bisb_ind_ind,bisb_ind_de,bisb_ind_ded,bisb_ind_ix,bisb_ind_ixd,
bisb_ind_rg,bisb_ind_rgd,bisb_ind_in,bisb_ind_ind,bisb_ind_de,bisb_ind_ded,bisb_ind_ix,bisb_ind_ixd,
@@ -2206,15 +2206,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bisb_ind_rg,bisb_ind_rgd,bisb_ind_in,bisb_ind_ind,bisb_ind_de,bisb_ind_ded,bisb_ind_ix,bisb_ind_ixd,
bisb_ind_rg,bisb_ind_rgd,bisb_ind_in,bisb_ind_ind,bisb_ind_de,bisb_ind_ded,bisb_ind_ix,bisb_ind_ixd,
/* 0xd800 */
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
/* 0xd900 */
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
- bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
+ bisb_de_rg, bisb_de_rgd,bisb_de_in, bisb_de_ind,bisb_de_de, bisb_de_ded,bisb_de_ix, bisb_de_ixd,
/* 0xda00 */
bisb_ded_rg,bisb_ded_rgd,bisb_ded_in,bisb_ded_ind,bisb_ded_de,bisb_ded_ded,bisb_ded_ix,bisb_ded_ixd,
bisb_ded_rg,bisb_ded_rgd,bisb_ded_in,bisb_ded_ind,bisb_ded_de,bisb_ded_ded,bisb_ded_ix,bisb_ded_ixd,
@@ -2226,15 +2226,15 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bisb_ded_rg,bisb_ded_rgd,bisb_ded_in,bisb_ded_ind,bisb_ded_de,bisb_ded_ded,bisb_ded_ix,bisb_ded_ixd,
bisb_ded_rg,bisb_ded_rgd,bisb_ded_in,bisb_ded_ind,bisb_ded_de,bisb_ded_ded,bisb_ded_ix,bisb_ded_ixd,
/* 0xdc00 */
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
/* 0xdd00 */
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
- bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
+ bisb_ix_rg, bisb_ix_rgd,bisb_ix_in, bisb_ix_ind,bisb_ix_de, bisb_ix_ded,bisb_ix_ix, bisb_ix_ixd,
/* 0xde00 */
bisb_ixd_rg,bisb_ixd_rgd,bisb_ixd_in,bisb_ixd_ind,bisb_ixd_de,bisb_ixd_ded,bisb_ixd_ix,bisb_ixd_ixd,
bisb_ixd_rg,bisb_ixd_rgd,bisb_ixd_in,bisb_ixd_ind,bisb_ixd_de,bisb_ixd_ded,bisb_ixd_ix,bisb_ixd_ixd,
@@ -2247,164 +2247,164 @@ static void (*const opcode_table[65536 >> 3])(t11_state *cpustate, UINT16 op) =
bisb_ixd_rg,bisb_ixd_rgd,bisb_ixd_in,bisb_ixd_ind,bisb_ixd_de,bisb_ixd_ded,bisb_ixd_ix,bisb_ixd_ixd,
/* 0xe000 */
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
/* 0xe100 */
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
- sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
+ sub_rg_rg, sub_rg_rgd, sub_rg_in, sub_rg_ind, sub_rg_de, sub_rg_ded, sub_rg_ix, sub_rg_ixd,
/* 0xe200 */
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
/* 0xe300 */
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
- sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
+ sub_rgd_rg, sub_rgd_rgd,sub_rgd_in, sub_rgd_ind,sub_rgd_de, sub_rgd_ded,sub_rgd_ix, sub_rgd_ixd,
/* 0xe400 */
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
/* 0xe500 */
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
- sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
+ sub_in_rg, sub_in_rgd, sub_in_in, sub_in_ind, sub_in_de, sub_in_ded, sub_in_ix, sub_in_ixd,
/* 0xe600 */
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
/* 0xe700 */
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
- sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
+ sub_ind_rg, sub_ind_rgd,sub_ind_in, sub_ind_ind,sub_ind_de, sub_ind_ded,sub_ind_ix, sub_ind_ixd,
/* 0xe800 */
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
/* 0xe900 */
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
- sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
+ sub_de_rg, sub_de_rgd, sub_de_in, sub_de_ind, sub_de_de, sub_de_ded, sub_de_ix, sub_de_ixd,
/* 0xea00 */
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
/* 0xeb00 */
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
- sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
+ sub_ded_rg, sub_ded_rgd,sub_ded_in, sub_ded_ind,sub_ded_de, sub_ded_ded,sub_ded_ix, sub_ded_ixd,
/* 0xec00 */
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
/* 0xed00 */
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
- sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
+ sub_ix_rg, sub_ix_rgd, sub_ix_in, sub_ix_ind, sub_ix_de, sub_ix_ded, sub_ix_ix, sub_ix_ixd,
/* 0xee00 */
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
/* 0xef00 */
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
- sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
+ sub_ixd_rg, sub_ixd_rgd,sub_ixd_in, sub_ixd_ind,sub_ixd_de, sub_ixd_ded,sub_ixd_ix, sub_ixd_ixd,
/* 0xf000 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf100 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf200 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf300 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf400 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf500 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf600 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf700 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf800 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xf900 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xfa00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xfb00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xfc00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xfd00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xfe00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
/* 0xff00 */
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
- illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal,
+ illegal, illegal, illegal, illegal, illegal, illegal, illegal, illegal
};
diff --git a/src/emu/cpu/tlcs90/tlcs90.c b/src/emu/cpu/tlcs90/tlcs90.c
index 1544e6ba93d..3e660cbff25 100644
--- a/src/emu/cpu/tlcs90/tlcs90.c
+++ b/src/emu/cpu/tlcs90/tlcs90.c
@@ -10,16 +10,16 @@
#include "debugger.h"
#include "tlcs90.h"
-enum _e_op { UNKNOWN, NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR, LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP, JP, JR, CALL, CALLR, RET, RETI, HALT, DI, EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF, CCF, TSET, BIT, SET, RES, INC, DEC, INCX, DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND, XOR, OR, CP, RLC, RRC, RL, RR, SLA, SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV };
+enum _e_op { UNKNOWN, NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR, LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP, JP, JR, CALL, CALLR, RET, RETI, HALT, DI, EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF, CCF, TSET, BIT, SET, RES, INC, DEC, INCX, DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND, XOR, OR, CP, RLC, RRC, RL, RR, SLA, SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV };
typedef UINT8 e_op;
-static const char *const op_names[] = { "??", "nop", "ex", "exx", "ld", "ldw", "lda", "ldi", "ldir", "ldd", "lddr", "cpi", "cpir", "cpd", "cpdr", "push", "pop", "jp", "jr", "call", "callr", "ret", "reti", "halt", "di", "ei", "swi", "daa", "cpl", "neg", "ldar", "rcf", "scf", "ccf", "tset", "bit", "set", "res", "inc", "dec", "incx", "decx", "incw", "decw", "add", "adc", "sub", "sbc", "and", "xor", "or", "cp", "rlc", "rrc", "rl", "rr", "sla", "sra", "sll", "srl", "rld", "rrd", "djnz", "mul", "div" };
+static const char *const op_names[] = { "??", "nop", "ex", "exx", "ld", "ldw", "lda", "ldi", "ldir", "ldd", "lddr", "cpi", "cpir", "cpd", "cpdr", "push", "pop", "jp", "jr", "call", "callr", "ret", "reti", "halt", "di", "ei", "swi", "daa", "cpl", "neg", "ldar", "rcf", "scf", "ccf", "tset", "bit", "set", "res", "inc", "dec", "incx", "decx", "incw", "decw", "add", "adc", "sub", "sbc", "and", "xor", "or", "cp", "rlc", "rrc", "rl", "rr", "sla", "sra", "sll", "srl", "rld", "rrd", "djnz", "mul", "div" };
enum e_mode {
- MODE_NONE, MODE_BIT8, MODE_CC,
- MODE_I8, MODE_D8, MODE_R8,
- MODE_I16, MODE_D16, MODE_R16,
- MODE_MI16, MODE_MR16, MODE_MR16D8, MODE_MR16R8,
- MODE_R16D8, MODE_R16R8
+ MODE_NONE, MODE_BIT8, MODE_CC,
+ MODE_I8, MODE_D8, MODE_R8,
+ MODE_I16, MODE_D16, MODE_R16,
+ MODE_MI16, MODE_MR16, MODE_MR16D8, MODE_MR16R8,
+ MODE_R16D8, MODE_R16R8
};
ALLOW_SAVE_TYPE(e_mode); // allow save_item on a non-fundamental type
@@ -27,37 +27,37 @@ typedef UINT16 e_r;
struct t90_Regs
{
- PAIR prvpc,pc,sp,af,bc,de,hl,ix,iy;
- PAIR af2,bc2,de2,hl2;
- UINT8 halt, after_EI;
- UINT16 irq_state, irq_mask;
+ PAIR prvpc,pc,sp,af,bc,de,hl,ix,iy;
+ PAIR af2,bc2,de2,hl2;
+ UINT8 halt, after_EI;
+ UINT16 irq_state, irq_mask;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
address_space *io;
- int icount;
- int extra_cycles; // extra cycles for interrupts
- UINT8 internal_registers[48];
- UINT32 ixbase,iybase;
+ int icount;
+ int extra_cycles; // extra cycles for interrupts
+ UINT8 internal_registers[48];
+ UINT32 ixbase,iybase;
// Timers: 4 x 8-bit + 1 x 16-bit
- emu_timer *timer[4+1];
- UINT8 timer_value[4];
- UINT16 timer4_value;
- attotime timer_period;
+ emu_timer *timer[4+1];
+ UINT8 timer_value[4];
+ UINT16 timer4_value;
+ attotime timer_period;
// Work registers
- e_op op;
+ e_op op;
- e_mode mode1;
- e_r r1,r1b;
+ e_mode mode1;
+ e_r r1,r1b;
- e_mode mode2;
- e_r r2,r2b;
+ e_mode mode2;
+ e_r r2,r2b;
- int cyc_t,cyc_f;
+ int cyc_t,cyc_f;
- UINT32 addr;
+ UINT32 addr;
};
@@ -65,87 +65,87 @@ INLINE t90_Regs *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TMP90840 ||
- device->type() == TMP90841 ||
- device->type() == TMP91640 ||
- device->type() == TMP91641);
+ device->type() == TMP90841 ||
+ device->type() == TMP91640 ||
+ device->type() == TMP91641);
return (t90_Regs *)downcast<legacy_cpu_device *>(device)->token();
}
-enum {
- T90_B, T90_C, T90_D, T90_E, T90_H, T90_L, T90_A,
- T90_BC, T90_DE, T90_HL, T90_XX, T90_IX, T90_IY, T90_SP,
+enum {
+ T90_B, T90_C, T90_D, T90_E, T90_H, T90_L, T90_A,
+ T90_BC, T90_DE, T90_HL, T90_XX, T90_IX, T90_IY, T90_SP,
T90_AF, T90_PC
};
// Regs
-#define B 0
-#define C 1
-#define D 2
-#define E 3
-#define H 4
-#define L 5
-#define A 6
-
-#define BC 0
-#define DE 1
-#define HL 2
+#define B 0
+#define C 1
+#define D 2
+#define E 3
+#define H 4
+#define L 5
+#define A 6
+
+#define BC 0
+#define DE 1
+#define HL 2
// 3
-#define IX 4
-#define IY 5
-#define SP 6
+#define IX 4
+#define IY 5
+#define SP 6
-#define AF 7
-#define AF2 8
-#define PC 9
+#define AF 7
+#define AF2 8
+#define PC 9
-#define F cpustate->af.b.l
+#define F cpustate->af.b.l
-static const char *const r8_names[] = { "b", "c", "d", "e", "h", "l", "a" };
-static const char *const r16_names[] = { "bc", "de", "hl", "??", "ix", "iy", "sp", "af", "af'", "pc" };
+static const char *const r8_names[] = { "b", "c", "d", "e", "h", "l", "a" };
+static const char *const r16_names[] = { "bc", "de", "hl", "??", "ix", "iy", "sp", "af", "af'", "pc" };
// Condition Codes
-#define FLS 0x0
-#define LT 0x1
-#define LE 0x2
-#define ULE 0x3
-#define OV 0x4
-#define PE 0x4
-#define MI 0x5
-#define Z 0x6
-#define EQ 0x6
-#define CR 0x7
-#define ULT 0x7
-#define T 0x8
-#define GE 0x9
-#define GT 0xa
-#define UGT 0xb
-#define NOV 0xc
-#define PO 0xc
-#define PL 0xd
-#define NZ 0xe
-#define NE 0xe
-#define NC 0xf
-#define UGE 0xf
-
-#define CF 0x01
-#define NF 0x02
-#define PF 0x04
-#define VF PF
-#define XCF 0x08
-#define HF 0x10
-#define IF 0x20
-#define ZF 0x40
-#define SF 0x80
-
-static UINT8 SZ[256]; /* zero and sign flags */
-static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
-static UINT8 SZP[256]; /* zero, sign and parity flags */
+#define FLS 0x0
+#define LT 0x1
+#define LE 0x2
+#define ULE 0x3
+#define OV 0x4
+#define PE 0x4
+#define MI 0x5
+#define Z 0x6
+#define EQ 0x6
+#define CR 0x7
+#define ULT 0x7
+#define T 0x8
+#define GE 0x9
+#define GT 0xa
+#define UGT 0xb
+#define NOV 0xc
+#define PO 0xc
+#define PL 0xd
+#define NZ 0xe
+#define NE 0xe
+#define NC 0xf
+#define UGE 0xf
+
+#define CF 0x01
+#define NF 0x02
+#define PF 0x04
+#define VF PF
+#define XCF 0x08
+#define HF 0x10
+#define IF 0x20
+#define ZF 0x40
+#define SF 0x80
+
+static UINT8 SZ[256]; /* zero and sign flags */
+static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
+static UINT8 SZP[256]; /* zero, sign and parity flags */
static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
-static const char *const cc_names[] = { "f", "lt", "le", "ule", "ov", "mi", "z", "c", "", "ge", "gt", "ugt", "nov", "pl", "nz", "nc" };
+static const char *const cc_names[] = { "f", "lt", "le", "ule", "ov", "mi", "z", "c", "", "ge", "gt", "ugt", "nov", "pl", "nz", "nc" };
// Opcodes
@@ -155,43 +155,43 @@ static const char *const cc_names[] = { "f", "lt", "le", "ule", "ov", "mi", "z",
-#define OP( X,CT ) cpustate->op = X; cpustate->cyc_t = (CT*2);
-#define OP16( X,CT ) OP( (X)|OP_16,CT )
+#define OP( X,CT ) cpustate->op = X; cpustate->cyc_t = (CT*2);
+#define OP16( X,CT ) OP( (X)|OP_16,CT )
-#define OPCC( X,CF,CT ) OP( X, CT ) cpustate->cyc_f = (CF*2);
-#define OPCC16( X,CF,CT ) OPCC( (X)|OP_16,CF,CT )
+#define OPCC( X,CF,CT ) OP( X, CT ) cpustate->cyc_f = (CF*2);
+#define OPCC16( X,CF,CT ) OPCC( (X)|OP_16,CF,CT )
-#define BIT8( N,I ) cpustate->mode##N = MODE_BIT8; cpustate->r##N = I;
-#define I8( N,I ) cpustate->mode##N = MODE_I8; cpustate->r##N = I;
-#define D8( N,I ) cpustate->mode##N = MODE_D8; cpustate->r##N = I;
-#define I16( N,I ) cpustate->mode##N = MODE_I16; cpustate->r##N = I;
-#define D16( N,I ) cpustate->mode##N = MODE_D16; cpustate->r##N = I;
-#define R8( N,R ) cpustate->mode##N = MODE_R8; cpustate->r##N = R;
-#define R16( N,R ) cpustate->mode##N = MODE_R16; cpustate->r##N = R;
-#define Q16( N,R ) cpustate->mode##N = MODE_R16; cpustate->r##N = R; if (cpustate->r##N == SP) cpustate->r##N = AF;
-#define MI16( N,I ) cpustate->mode##N = MODE_MI16; cpustate->r##N = I;
-#define MR16( N,R ) cpustate->mode##N = MODE_MR16; cpustate->r##N = R;
-#define MR16D8( N,R,I ) cpustate->mode##N = MODE_MR16D8; cpustate->r##N = R; cpustate->r##N##b = I;
-#define MR16R8( N,R,g ) cpustate->mode##N = MODE_MR16R8; cpustate->r##N = R; cpustate->r##N##b = g;
-#define NONE( N ) cpustate->mode##N = MODE_NONE;
-#define CC( N,cc ) cpustate->mode##N = MODE_CC; cpustate->r##N = cc;
-#define R16D8( N,R,I ) cpustate->mode##N = MODE_R16D8; cpustate->r##N = R; cpustate->r##N##b = I;
-#define R16R8( N,R,g ) cpustate->mode##N = MODE_R16R8; cpustate->r##N = R; cpustate->r##N##b = g;
+#define BIT8( N,I ) cpustate->mode##N = MODE_BIT8; cpustate->r##N = I;
+#define I8( N,I ) cpustate->mode##N = MODE_I8; cpustate->r##N = I;
+#define D8( N,I ) cpustate->mode##N = MODE_D8; cpustate->r##N = I;
+#define I16( N,I ) cpustate->mode##N = MODE_I16; cpustate->r##N = I;
+#define D16( N,I ) cpustate->mode##N = MODE_D16; cpustate->r##N = I;
+#define R8( N,R ) cpustate->mode##N = MODE_R8; cpustate->r##N = R;
+#define R16( N,R ) cpustate->mode##N = MODE_R16; cpustate->r##N = R;
+#define Q16( N,R ) cpustate->mode##N = MODE_R16; cpustate->r##N = R; if (cpustate->r##N == SP) cpustate->r##N = AF;
+#define MI16( N,I ) cpustate->mode##N = MODE_MI16; cpustate->r##N = I;
+#define MR16( N,R ) cpustate->mode##N = MODE_MR16; cpustate->r##N = R;
+#define MR16D8( N,R,I ) cpustate->mode##N = MODE_MR16D8; cpustate->r##N = R; cpustate->r##N##b = I;
+#define MR16R8( N,R,g ) cpustate->mode##N = MODE_MR16R8; cpustate->r##N = R; cpustate->r##N##b = g;
+#define NONE( N ) cpustate->mode##N = MODE_NONE;
+#define CC( N,cc ) cpustate->mode##N = MODE_CC; cpustate->r##N = cc;
+#define R16D8( N,R,I ) cpustate->mode##N = MODE_R16D8; cpustate->r##N = R; cpustate->r##N##b = I;
+#define R16R8( N,R,g ) cpustate->mode##N = MODE_R16R8; cpustate->r##N = R; cpustate->r##N##b = g;
-INLINE UINT8 RM8 (t90_Regs *cpustate, UINT32 a) { return cpustate->program->read_byte( a ); }
-INLINE UINT16 RM16(t90_Regs *cpustate, UINT32 a) { return RM8(cpustate,a) | (RM8( cpustate, (a+1) & 0xffff ) << 8); }
+INLINE UINT8 RM8 (t90_Regs *cpustate, UINT32 a) { return cpustate->program->read_byte( a ); }
+INLINE UINT16 RM16(t90_Regs *cpustate, UINT32 a) { return RM8(cpustate,a) | (RM8( cpustate, (a+1) & 0xffff ) << 8); }
-INLINE void WM8 (t90_Regs *cpustate, UINT32 a, UINT8 v) { cpustate->program->write_byte( a, v ); }
-INLINE void WM16(t90_Regs *cpustate, UINT32 a, UINT16 v) { WM8(cpustate,a,v); WM8( cpustate, (a+1) & 0xffff, v >> 8); }
+INLINE void WM8 (t90_Regs *cpustate, UINT32 a, UINT8 v) { cpustate->program->write_byte( a, v ); }
+INLINE void WM16(t90_Regs *cpustate, UINT32 a, UINT16 v) { WM8(cpustate,a,v); WM8( cpustate, (a+1) & 0xffff, v >> 8); }
-INLINE UINT8 RX8 (t90_Regs *cpustate, UINT32 a, UINT32 base) { return cpustate->program->read_byte( base | a ); }
-INLINE UINT16 RX16(t90_Regs *cpustate, UINT32 a, UINT32 base) { return RX8(cpustate,a,base) | (RX8( cpustate, (a+1) & 0xffff, base ) << 8); }
+INLINE UINT8 RX8 (t90_Regs *cpustate, UINT32 a, UINT32 base) { return cpustate->program->read_byte( base | a ); }
+INLINE UINT16 RX16(t90_Regs *cpustate, UINT32 a, UINT32 base) { return RX8(cpustate,a,base) | (RX8( cpustate, (a+1) & 0xffff, base ) << 8); }
-INLINE void WX8 (t90_Regs *cpustate, UINT32 a, UINT8 v, UINT32 base) { cpustate->program->write_byte( base | a, v ); }
-INLINE void WX16(t90_Regs *cpustate, UINT32 a, UINT16 v, UINT32 base) { WX8(cpustate,a,v,base); WX8( cpustate, (a+1) & 0xffff, v >> 8, base); }
+INLINE void WX8 (t90_Regs *cpustate, UINT32 a, UINT8 v, UINT32 base) { cpustate->program->write_byte( base | a, v ); }
+INLINE void WX16(t90_Regs *cpustate, UINT32 a, UINT16 v, UINT32 base) { WX8(cpustate,a,v,base); WX8( cpustate, (a+1) & 0xffff, v >> 8, base); }
-INLINE UINT8 READ8(t90_Regs *cpustate) { UINT8 b0 = RM8( cpustate, cpustate->addr++ ); cpustate->addr &= 0xffff; return b0; }
-INLINE UINT16 READ16(t90_Regs *cpustate) { UINT8 b0 = READ8(cpustate); return b0 | (READ8(cpustate) << 8); }
+INLINE UINT8 READ8(t90_Regs *cpustate) { UINT8 b0 = RM8( cpustate, cpustate->addr++ ); cpustate->addr &= 0xffff; return b0; }
+INLINE UINT16 READ16(t90_Regs *cpustate) { UINT8 b0 = READ8(cpustate); return b0 | (READ8(cpustate) << 8); }
static void decode(t90_Regs *cpustate)
{
@@ -203,766 +203,766 @@ static void decode(t90_Regs *cpustate)
switch ( b0 )
{
case 0x00:
- OP( NOP,2 ) NONE( 1 ) NONE( 2 ) return; // NOP
+ OP( NOP,2 ) NONE( 1 ) NONE( 2 ) return; // NOP
case 0x01:
- OP( HALT,4 ) NONE( 1 ) NONE( 2 ) return; // HALT
+ OP( HALT,4 ) NONE( 1 ) NONE( 2 ) return; // HALT
case 0x02:
- OP( DI,2 ) NONE( 1 ) NONE( 2 ) return; // DI
+ OP( DI,2 ) NONE( 1 ) NONE( 2 ) return; // DI
case 0x03:
- OP( EI,2 ) NONE( 1 ) NONE( 2 ) return; // EI
+ OP( EI,2 ) NONE( 1 ) NONE( 2 ) return; // EI
case 0x07:
- OPCC( INCX,6,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // INCX ($FF00+n)
+ OPCC( INCX,6,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // INCX ($FF00+n)
case 0x08:
- OP( EX,2 ) R16( 1, DE ) R16( 2, HL ) return; // EX DE,HL
+ OP( EX,2 ) R16( 1, DE ) R16( 2, HL ) return; // EX DE,HL
case 0x09:
- OP( EX,2 ) R16( 1, AF ) R16( 2, AF2 ) return; // EX AF,AF'
+ OP( EX,2 ) R16( 1, AF ) R16( 2, AF2 ) return; // EX AF,AF'
case 0x0a:
- OP( EXX,2 ) NONE( 1 ) NONE( 2 ) return; // EXX
+ OP( EXX,2 ) NONE( 1 ) NONE( 2 ) return; // EXX
case 0x0b:
- OP( DAA,4 ) R8( 1, A ) NONE( 2 ) return; // DAA A
+ OP( DAA,4 ) R8( 1, A ) NONE( 2 ) return; // DAA A
case 0x0c:
- OP( RCF,2 ) NONE( 1 ) NONE( 2 ) return; // RCF
+ OP( RCF,2 ) NONE( 1 ) NONE( 2 ) return; // RCF
case 0x0d:
- OP( SCF,2 ) NONE( 1 ) NONE( 2 ) return; // SCF
+ OP( SCF,2 ) NONE( 1 ) NONE( 2 ) return; // SCF
case 0x0e:
- OP( CCF,2 ) NONE( 1 ) NONE( 2 ) return; // CCF
+ OP( CCF,2 ) NONE( 1 ) NONE( 2 ) return; // CCF
case 0x0f:
- OPCC( DECX,6,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // DECX ($FF00+n)
+ OPCC( DECX,6,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // DECX ($FF00+n)
case 0x10:
- OP( CPL,2 ) R8( 1, A ) NONE( 2 ) return; // CPL A
+ OP( CPL,2 ) R8( 1, A ) NONE( 2 ) return; // CPL A
case 0x11:
- OP( NEG,2 ) R8( 1, A ) NONE( 2 ) return; // NEG A
+ OP( NEG,2 ) R8( 1, A ) NONE( 2 ) return; // NEG A
- case 0x12: // MUL HL,n
- case 0x13: // DIV HL,n
- OP( MUL+b0-0x12,16) R16( 1, HL ) I8( 2, READ8(cpustate) ) return;
+ case 0x12: // MUL HL,n
+ case 0x13: // DIV HL,n
+ OP( MUL+b0-0x12,16) R16( 1, HL ) I8( 2, READ8(cpustate) ) return;
- case 0x14: case 0x15: case 0x16:
- OP16( ADD,6 ) R16( 1, IX+b0-0x14 ) I16( 2, READ16(cpustate) ) return; // ADD ix,mn
+ case 0x14: case 0x15: case 0x16:
+ OP16( ADD,6 ) R16( 1, IX+b0-0x14 ) I16( 2, READ16(cpustate) ) return; // ADD ix,mn
case 0x17:
- OP( LDAR,8 ) R16( 1, HL ) D16( 2, READ16(cpustate) ) return; // LDAR HL,+cd
+ OP( LDAR,8 ) R16( 1, HL ) D16( 2, READ16(cpustate) ) return; // LDAR HL,+cd
case 0x18:
- OP( DJNZ,10 ) D8( 1, READ8(cpustate) ) NONE( 2 ) return; // DJNZ +d
+ OP( DJNZ,10 ) D8( 1, READ8(cpustate) ) NONE( 2 ) return; // DJNZ +d
case 0x19:
- OP16( DJNZ,10 ) R16( 1, BC ) D8( 2, READ8(cpustate) ) return; // DJNZ BC,+d
+ OP16( DJNZ,10 ) R16( 1, BC ) D8( 2, READ8(cpustate) ) return; // DJNZ BC,+d
case 0x1a:
- OPCC( JP,8,8 ) CC( 1, T ) I16( 2, READ16(cpustate) ) return; // JP T,mn
+ OPCC( JP,8,8 ) CC( 1, T ) I16( 2, READ16(cpustate) ) return; // JP T,mn
case 0x1b:
- OPCC16( JR,10,10 ) CC( 1, T ) D16( 2, READ16(cpustate) ) return; // JR T,+cd
+ OPCC16( JR,10,10 ) CC( 1, T ) D16( 2, READ16(cpustate) ) return; // JR T,+cd
case 0x1c:
- OPCC( CALL,14,14 ) CC( 1, T ) I16( 2, READ16(cpustate) ) return; // CALL T,mn
+ OPCC( CALL,14,14 ) CC( 1, T ) I16( 2, READ16(cpustate) ) return; // CALL T,mn
case 0x1d:
- OP( CALLR,16 ) D16( 1, READ16(cpustate) ) NONE( 2 ) return; // CALLR +cd
+ OP( CALLR,16 ) D16( 1, READ16(cpustate) ) NONE( 2 ) return; // CALLR +cd
case 0x1e:
- OPCC( RET,10,10 ) CC( 1, T ) NONE( 2 ) return; // RET T
+ OPCC( RET,10,10 ) CC( 1, T ) NONE( 2 ) return; // RET T
case 0x1f:
- OP( RETI,14 ) NONE( 1 ) NONE( 2 ) return; // RETI
+ OP( RETI,14 ) NONE( 1 ) NONE( 2 ) return; // RETI
- case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
- OP( LD,2 ) R8( 1, A ) R8( 2, b0 - 0x20 ) return; // LD A,r
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ OP( LD,2 ) R8( 1, A ) R8( 2, b0 - 0x20 ) return; // LD A,r
case 0x27:
- OP( LD,8 ) R8( 1, A ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // LD A,($FF00+n)
+ OP( LD,8 ) R8( 1, A ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // LD A,($FF00+n)
- case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
- OP( LD,2 ) R8( 1, b0 - 0x28 ) R8( 2, A ) return; // LD r,A
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
+ OP( LD,2 ) R8( 1, b0 - 0x28 ) R8( 2, A ) return; // LD r,A
case 0x2f:
- OP( LD,8 ) MI16( 1, 0xFF00|READ8(cpustate) ) R8( 2, A ) return; // LD ($FF00+n), A
+ OP( LD,8 ) MI16( 1, 0xFF00|READ8(cpustate) ) R8( 2, A ) return; // LD ($FF00+n), A
- case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36:
- OP( LD,4 ) R8( 1, b0 - 0x30 ) I8( 2, READ8(cpustate) ) return; // LD r,n
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36:
+ OP( LD,4 ) R8( 1, b0 - 0x30 ) I8( 2, READ8(cpustate) ) return; // LD r,n
case 0x37:
- OP( LD,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) I8( 2, READ8(cpustate) ) return; // LD ($FF00+w),n
+ OP( LD,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) I8( 2, READ8(cpustate) ) return; // LD ($FF00+w),n
- case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
- OP16( LD,6 ) R16( 1, b0 - 0x38 ) I16( 2, READ16(cpustate) ) return; // LD rr,nn
+ case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
+ OP16( LD,6 ) R16( 1, b0 - 0x38 ) I16( 2, READ16(cpustate) ) return; // LD rr,nn
case 0x3f:
- OP( LDW,14 ) MI16( 1, 0xFF00|READ8(cpustate) ) I16( 2, READ16(cpustate) ) return; // LDW ($FF00+w),mn
+ OP( LDW,14 ) MI16( 1, 0xFF00|READ8(cpustate) ) I16( 2, READ16(cpustate) ) return; // LDW ($FF00+w),mn
- case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
- OP16( LD,4 ) R16( 1, HL ) R16( 2, b0 - 0x40 ) return; // LD HL,rr
+ case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
+ OP16( LD,4 ) R16( 1, HL ) R16( 2, b0 - 0x40 ) return; // LD HL,rr
case 0x47:
- OP16( LD,10 ) R16( 1, HL ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // LD HL,($FF00+n)
+ OP16( LD,10 ) R16( 1, HL ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // LD HL,($FF00+n)
- case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
- OP16( LD,4 ) R16( 1, b0 - 0x48 ) R16( 2, HL ) return; // LD rr,HL
+ case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
+ OP16( LD,4 ) R16( 1, b0 - 0x48 ) R16( 2, HL ) return; // LD rr,HL
case 0x4f:
- OP16( LD,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) R16( 2, HL ) return; // LD ($FF00+n), HL
-
- case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
- OP( PUSH,8 ) Q16( 1, b0 - 0x50 ) NONE( 2 ) return; // PUSH qq
- case 0x58: case 0x59: case 0x5a: /*case 0x5b:*/ case 0x5c: case 0x5d: case 0x5e:
- OP( POP,10 ) Q16( 1, b0 - 0x58 ) NONE( 2 ) return; // POP qq
-
- case 0x60: // ADD A,($FF00+n)
- case 0x61: // ADC A,($FF00+n)
- case 0x62: // SUB A,($FF00+n)
- case 0x63: // SBC A,($FF00+n)
- case 0x64: // AND A,($FF00+n)
- case 0x65: // XOR A,($FF00+n)
- case 0x66: // OR A,($FF00+n)
- case 0x67: // CP A,($FF00+n)
- OP( ADD+b0-0x60,8 ) R8( 1, A ) MI16( 2, 0xFF00|READ8(cpustate) ) return;
-
- case 0x68: // ADD A,n
- case 0x69: // ADC A,n
- case 0x6a: // SUB A,n
- case 0x6b: // SBC A,n
- case 0x6c: // AND A,n
- case 0x6d: // XOR A,n
- case 0x6e: // OR A,n
- case 0x6f: // CP A,n
- OP( ADD+b0-0x68,4 ) R8( 1, A ) I8( 2, READ8(cpustate) ) return;
-
- case 0x70: // ADD HL,($FF00+n)
- case 0x71: // ADC HL,($FF00+n)
- case 0x72: // SUB HL,($FF00+n)
- case 0x73: // SBC HL,($FF00+n)
- case 0x74: // AND HL,($FF00+n)
- case 0x75: // XOR HL,($FF00+n)
- case 0x76: // OR HL,($FF00+n)
- case 0x77: // CP HL,($FF00+n)
- OP16( ADD+b0-0x70,10 ) R16( 1, HL ) MI16( 2, 0xFF00|READ8(cpustate) ) return;
-
- case 0x78: // ADD HL,mn
- case 0x79: // ADC HL,mn
- case 0x7a: // SUB HL,mn
- case 0x7b: // SBC HL,mn
- case 0x7c: // AND HL,mn
- case 0x7d: // XOR HL,mn
- case 0x7e: // OR HL,mn
- case 0x7f: // CP HL,mn
- OP16( ADD+b0-0x78,6 ) R16( 1, HL ) I16( 2, READ16(cpustate) ) return;
-
- case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86:
- OP( INC,2 ) R8( 1, b0 - 0x80 ) NONE( 2 ) return; // INC r
+ OP16( LD,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) R16( 2, HL ) return; // LD ($FF00+n), HL
+
+ case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
+ OP( PUSH,8 ) Q16( 1, b0 - 0x50 ) NONE( 2 ) return; // PUSH qq
+ case 0x58: case 0x59: case 0x5a: /*case 0x5b:*/ case 0x5c: case 0x5d: case 0x5e:
+ OP( POP,10 ) Q16( 1, b0 - 0x58 ) NONE( 2 ) return; // POP qq
+
+ case 0x60: // ADD A,($FF00+n)
+ case 0x61: // ADC A,($FF00+n)
+ case 0x62: // SUB A,($FF00+n)
+ case 0x63: // SBC A,($FF00+n)
+ case 0x64: // AND A,($FF00+n)
+ case 0x65: // XOR A,($FF00+n)
+ case 0x66: // OR A,($FF00+n)
+ case 0x67: // CP A,($FF00+n)
+ OP( ADD+b0-0x60,8 ) R8( 1, A ) MI16( 2, 0xFF00|READ8(cpustate) ) return;
+
+ case 0x68: // ADD A,n
+ case 0x69: // ADC A,n
+ case 0x6a: // SUB A,n
+ case 0x6b: // SBC A,n
+ case 0x6c: // AND A,n
+ case 0x6d: // XOR A,n
+ case 0x6e: // OR A,n
+ case 0x6f: // CP A,n
+ OP( ADD+b0-0x68,4 ) R8( 1, A ) I8( 2, READ8(cpustate) ) return;
+
+ case 0x70: // ADD HL,($FF00+n)
+ case 0x71: // ADC HL,($FF00+n)
+ case 0x72: // SUB HL,($FF00+n)
+ case 0x73: // SBC HL,($FF00+n)
+ case 0x74: // AND HL,($FF00+n)
+ case 0x75: // XOR HL,($FF00+n)
+ case 0x76: // OR HL,($FF00+n)
+ case 0x77: // CP HL,($FF00+n)
+ OP16( ADD+b0-0x70,10 ) R16( 1, HL ) MI16( 2, 0xFF00|READ8(cpustate) ) return;
+
+ case 0x78: // ADD HL,mn
+ case 0x79: // ADC HL,mn
+ case 0x7a: // SUB HL,mn
+ case 0x7b: // SBC HL,mn
+ case 0x7c: // AND HL,mn
+ case 0x7d: // XOR HL,mn
+ case 0x7e: // OR HL,mn
+ case 0x7f: // CP HL,mn
+ OP16( ADD+b0-0x78,6 ) R16( 1, HL ) I16( 2, READ16(cpustate) ) return;
+
+ case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86:
+ OP( INC,2 ) R8( 1, b0 - 0x80 ) NONE( 2 ) return; // INC r
case 0x87:
- OP( INC,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // INC ($FF00+n)
+ OP( INC,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // INC ($FF00+n)
- case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e:
- OP( DEC,2 ) R8( 1, b0 - 0x88 ) NONE( 2 ) return; // DEC r
+ case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e:
+ OP( DEC,2 ) R8( 1, b0 - 0x88 ) NONE( 2 ) return; // DEC r
case 0x8f:
- OP( DEC,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // DEC ($FF00+n)
+ OP( DEC,10 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // DEC ($FF00+n)
- case 0x90: case 0x91: case 0x92: /*case 0x93:*/ case 0x94: case 0x95: case 0x96:
- OP16( INC,4 ) R16( 1, b0 - 0x90 ) NONE( 2 ) return; // INC rr
+ case 0x90: case 0x91: case 0x92: /*case 0x93:*/ case 0x94: case 0x95: case 0x96:
+ OP16( INC,4 ) R16( 1, b0 - 0x90 ) NONE( 2 ) return; // INC rr
case 0x97:
- OP( INCW,14 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // INCW ($FF00+n)
- case 0x98: case 0x99: case 0x9a: /*case 0x9b:*/ case 0x9c: case 0x9d: case 0x9e:
- OP16( DEC,4 ) R16( 1, b0 - 0x98 ) NONE( 2 ) return; // DEC rr
+ OP( INCW,14 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // INCW ($FF00+n)
+ case 0x98: case 0x99: case 0x9a: /*case 0x9b:*/ case 0x9c: case 0x9d: case 0x9e:
+ OP16( DEC,4 ) R16( 1, b0 - 0x98 ) NONE( 2 ) return; // DEC rr
case 0x9f:
- OP( DECW,14 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // DECW ($FF00+n)
-
- case 0xa0: // RLC A
- case 0xa1: // RRC A
- case 0xa2: // RL A
- case 0xa3: // RR A
- case 0xa4: // SLA A
- case 0xa5: // SRA A
- case 0xa6: // SLL A
- case 0xa7: // SRL A
- OP( RLC+b0-0xa0,2 ) R8( 1, A ) NONE( 2 ) return;
-
- case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- OP( BIT,8 ) BIT8( 1, b0 - 0xa8 ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // BIT b,($FF00+n)
- case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- OP( RES,12 ) BIT8( 1, b0 - 0xb0 ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // RES b,($FF00+n)
- case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- OP( SET,12 ) BIT8( 1, b0 - 0xb8 ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // SET b,($FF00+n)
-
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
- OPCC( JR,4,8 ) CC( 1, b0 - 0xc0 ) D8( 2, READ8(cpustate) ) return; // JR cc,+d
-
- case 0xe0: case 0xe1: case 0xe2: /*case 0xe3:*/ case 0xe4: case 0xe5: case 0xe6:
+ OP( DECW,14 ) MI16( 1, 0xFF00|READ8(cpustate) ) NONE( 2 ) return; // DECW ($FF00+n)
+
+ case 0xa0: // RLC A
+ case 0xa1: // RRC A
+ case 0xa2: // RL A
+ case 0xa3: // RR A
+ case 0xa4: // SLA A
+ case 0xa5: // SRA A
+ case 0xa6: // SLL A
+ case 0xa7: // SRL A
+ OP( RLC+b0-0xa0,2 ) R8( 1, A ) NONE( 2 ) return;
+
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ OP( BIT,8 ) BIT8( 1, b0 - 0xa8 ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // BIT b,($FF00+n)
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ OP( RES,12 ) BIT8( 1, b0 - 0xb0 ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // RES b,($FF00+n)
+ case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ OP( SET,12 ) BIT8( 1, b0 - 0xb8 ) MI16( 2, 0xFF00|READ8(cpustate) ) return; // SET b,($FF00+n)
+
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ OPCC( JR,4,8 ) CC( 1, b0 - 0xc0 ) D8( 2, READ8(cpustate) ) return; // JR cc,+d
+
+ case 0xe0: case 0xe1: case 0xe2: /*case 0xe3:*/ case 0xe4: case 0xe5: case 0xe6:
b1 = READ8(cpustate);
- switch ( b1 ) {
- case 0x10: // RLD (gg)
- case 0x11: // RRD (gg)
- OP( RLD+b1-0x10,12 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return;
-
- case 0x12: // MUL HL,(gg)
- case 0x13: // DIV HL,(gg)
- OP( MUL+b1-0x12,18 ) R16( 1, HL ) MR16( 2, b0 - 0xe0 ) return;
-
- case 0x14: case 0x15: case 0x16:
- OP16( ADD,8 ) R16( 1, IX+b1-0x14 ) MR16( 2, b0 - 0xe0 ) return; // ADD ix,(gg)
-
- case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
- OP( LD,6 ) R8( 1, b1 - 0x28 ) MR16( 2, b0 - 0xe0 ) return; // LD r,(gg)
- case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
- OP16( LD,8 ) R16( 1, b1 - 0x48 ) MR16( 2, b0 - 0xe0 ) return; // LD rr,(gg)
-
- case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
- OP( EX,14 ) MR16( 1, b0 - 0xe0 ) R16( 2, b1 - 0x50 ) return; // EX (gg),rr
-
- case 0x60: // ADD A,(gg)
- case 0x61: // ADC A,(gg)
- case 0x62: // SUB A,(gg)
- case 0x63: // SBC A,(gg)
- case 0x64: // AND A,(gg)
- case 0x65: // XOR A,(gg)
- case 0x66: // OR A,(gg)
- case 0x67: // CP A,(gg)
- OP( ADD+b1-0x60,6 ) R8( 1, A ) MR16( 2, b0 - 0xe0 ) return;
-
- case 0x70: // ADD HL,(gg)
- case 0x71: // ADC HL,(gg)
- case 0x72: // SUB HL,(gg)
- case 0x73: // SBC HL,(gg)
- case 0x74: // AND HL,(gg)
- case 0x75: // XOR HL,(gg)
- case 0x76: // OR HL,(gg)
- case 0x77: // CP HL,(gg)
- OP16( ADD+b1-0x70,8 ) R16( 1, HL ) MR16( 2, b0 - 0xe0 ) return;
+ switch ( b1 ) {
+ case 0x10: // RLD (gg)
+ case 0x11: // RRD (gg)
+ OP( RLD+b1-0x10,12 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return;
+
+ case 0x12: // MUL HL,(gg)
+ case 0x13: // DIV HL,(gg)
+ OP( MUL+b1-0x12,18 ) R16( 1, HL ) MR16( 2, b0 - 0xe0 ) return;
+
+ case 0x14: case 0x15: case 0x16:
+ OP16( ADD,8 ) R16( 1, IX+b1-0x14 ) MR16( 2, b0 - 0xe0 ) return; // ADD ix,(gg)
+
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
+ OP( LD,6 ) R8( 1, b1 - 0x28 ) MR16( 2, b0 - 0xe0 ) return; // LD r,(gg)
+ case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
+ OP16( LD,8 ) R16( 1, b1 - 0x48 ) MR16( 2, b0 - 0xe0 ) return; // LD rr,(gg)
+
+ case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
+ OP( EX,14 ) MR16( 1, b0 - 0xe0 ) R16( 2, b1 - 0x50 ) return; // EX (gg),rr
+
+ case 0x60: // ADD A,(gg)
+ case 0x61: // ADC A,(gg)
+ case 0x62: // SUB A,(gg)
+ case 0x63: // SBC A,(gg)
+ case 0x64: // AND A,(gg)
+ case 0x65: // XOR A,(gg)
+ case 0x66: // OR A,(gg)
+ case 0x67: // CP A,(gg)
+ OP( ADD+b1-0x60,6 ) R8( 1, A ) MR16( 2, b0 - 0xe0 ) return;
+
+ case 0x70: // ADD HL,(gg)
+ case 0x71: // ADC HL,(gg)
+ case 0x72: // SUB HL,(gg)
+ case 0x73: // SBC HL,(gg)
+ case 0x74: // AND HL,(gg)
+ case 0x75: // XOR HL,(gg)
+ case 0x76: // OR HL,(gg)
+ case 0x77: // CP HL,(gg)
+ OP16( ADD+b1-0x70,8 ) R16( 1, HL ) MR16( 2, b0 - 0xe0 ) return;
case 0x87:
- OP( INC,8 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // INC (gg)
+ OP( INC,8 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // INC (gg)
case 0x8f:
- OP( DEC,8 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // DEC (gg)
+ OP( DEC,8 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // DEC (gg)
case 0x97:
- OP( INCW,12 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // INCW (gg)
+ OP( INCW,12 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // INCW (gg)
case 0x9f:
- OP( DECW,12 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // DECW (gg)
-
- case 0xa0: // RLC (gg)
- case 0xa1: // RRC (gg)
- case 0xa2: // RL (gg)
- case 0xa3: // RR (gg)
- case 0xa4: // SLA (gg)
- case 0xa5: // SRA (gg)
- case 0xa6: // SLL (gg)
- case 0xa7: // SRL (gg)
- OP( RLC+b1-0xa0,8 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return;
-
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- OP( TSET,12 ) BIT8( 1, b1 - 0x18 ) MR16( 2, b0 - 0xe0 ) return; // TSET b,(gg)
- case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- OP( BIT,6 ) BIT8( 1, b1 - 0xa8 ) MR16( 2, b0 - 0xe0 ) return; // BIT b,(gg)
- case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- OP( RES,10 ) BIT8( 1, b1 - 0xb0 ) MR16( 2, b0 - 0xe0 ) return; // RES b,(gg)
- case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- OP( SET,10 ) BIT8( 1, b1 - 0xb8 ) MR16( 2, b0 - 0xe0 ) return; // SET b,(gg)
- } break;
+ OP( DECW,12 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return; // DECW (gg)
+
+ case 0xa0: // RLC (gg)
+ case 0xa1: // RRC (gg)
+ case 0xa2: // RL (gg)
+ case 0xa3: // RR (gg)
+ case 0xa4: // SLA (gg)
+ case 0xa5: // SRA (gg)
+ case 0xa6: // SLL (gg)
+ case 0xa7: // SRL (gg)
+ OP( RLC+b1-0xa0,8 ) MR16( 1, b0 - 0xe0 ) NONE( 2 ) return;
+
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ OP( TSET,12 ) BIT8( 1, b1 - 0x18 ) MR16( 2, b0 - 0xe0 ) return; // TSET b,(gg)
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ OP( BIT,6 ) BIT8( 1, b1 - 0xa8 ) MR16( 2, b0 - 0xe0 ) return; // BIT b,(gg)
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ OP( RES,10 ) BIT8( 1, b1 - 0xb0 ) MR16( 2, b0 - 0xe0 ) return; // RES b,(gg)
+ case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ OP( SET,10 ) BIT8( 1, b1 - 0xb8 ) MR16( 2, b0 - 0xe0 ) return; // SET b,(gg)
+ } break;
case 0xe3:
imm16 = READ16(cpustate);
b3 = READ8(cpustate);
- switch ( b3 ) {
- case 0x10: // RLD (mn)
- case 0x11: // RRD (mn)
- OP( RLD+b3-0x10,16 ) MI16( 1, imm16 ) NONE( 2 ) return;
-
- case 0x12: // MUL HL,(mn)
- case 0x13: // DIV HL,(mn)
- OP( MUL+b3-0x12,22 ) R16( 1, HL ) MI16( 2, imm16 ) return;
-
- case 0x14: case 0x15: case 0x16:
- OP16( ADD,12 ) R16( 1, IX+b3-0x14 ) MI16( 2, imm16 ) return; // ADD ix,(mn)
-
- case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
- OP( LD,10 ) R8( 1, b3 - 0x28 ) MI16( 2, imm16 ) return; // LD r,(mn)
- case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
- OP16( LD,12 ) R16( 1, b3 - 0x48 ) MI16( 2, imm16 ) return; // LD rr,(mn)
-
- case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
- OP( EX,18 ) MI16( 1, imm16 ) R16( 2, b3 - 0x50 ) return; // EX (mn),rr
-
- case 0x60: // ADD A,(mn)
- case 0x61: // ADC A,(mn)
- case 0x62: // SUB A,(mn)
- case 0x63: // SBC A,(mn)
- case 0x64: // AND A,(mn)
- case 0x65: // XOR A,(mn)
- case 0x66: // OR A,(mn)
- case 0x67: // CP A,(mn)
- OP( ADD+b3-0x60,10 ) R8( 1, A ) MI16( 2, imm16 ) return;
-
- case 0x70: // ADD HL,(mn)
- case 0x71: // ADC HL,(mn)
- case 0x72: // SUB HL,(mn)
- case 0x73: // SBC HL,(mn)
- case 0x74: // AND HL,(mn)
- case 0x75: // XOR HL,(mn)
- case 0x76: // OR HL,(mn)
- case 0x77: // CP HL,(mn)
- OP16( ADD+b3-0x70,12 ) R16( 1, HL ) MI16( 2, imm16 ) return;
+ switch ( b3 ) {
+ case 0x10: // RLD (mn)
+ case 0x11: // RRD (mn)
+ OP( RLD+b3-0x10,16 ) MI16( 1, imm16 ) NONE( 2 ) return;
+
+ case 0x12: // MUL HL,(mn)
+ case 0x13: // DIV HL,(mn)
+ OP( MUL+b3-0x12,22 ) R16( 1, HL ) MI16( 2, imm16 ) return;
+
+ case 0x14: case 0x15: case 0x16:
+ OP16( ADD,12 ) R16( 1, IX+b3-0x14 ) MI16( 2, imm16 ) return; // ADD ix,(mn)
+
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
+ OP( LD,10 ) R8( 1, b3 - 0x28 ) MI16( 2, imm16 ) return; // LD r,(mn)
+ case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
+ OP16( LD,12 ) R16( 1, b3 - 0x48 ) MI16( 2, imm16 ) return; // LD rr,(mn)
+
+ case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
+ OP( EX,18 ) MI16( 1, imm16 ) R16( 2, b3 - 0x50 ) return; // EX (mn),rr
+
+ case 0x60: // ADD A,(mn)
+ case 0x61: // ADC A,(mn)
+ case 0x62: // SUB A,(mn)
+ case 0x63: // SBC A,(mn)
+ case 0x64: // AND A,(mn)
+ case 0x65: // XOR A,(mn)
+ case 0x66: // OR A,(mn)
+ case 0x67: // CP A,(mn)
+ OP( ADD+b3-0x60,10 ) R8( 1, A ) MI16( 2, imm16 ) return;
+
+ case 0x70: // ADD HL,(mn)
+ case 0x71: // ADC HL,(mn)
+ case 0x72: // SUB HL,(mn)
+ case 0x73: // SBC HL,(mn)
+ case 0x74: // AND HL,(mn)
+ case 0x75: // XOR HL,(mn)
+ case 0x76: // OR HL,(mn)
+ case 0x77: // CP HL,(mn)
+ OP16( ADD+b3-0x70,12 ) R16( 1, HL ) MI16( 2, imm16 ) return;
case 0x87:
- OP( INC,12 ) MI16( 1, imm16 ) NONE( 2 ) return; // INC (mn)
+ OP( INC,12 ) MI16( 1, imm16 ) NONE( 2 ) return; // INC (mn)
case 0x8f:
- OP( DEC,12 ) MI16( 1, imm16 ) NONE( 2 ) return; // DEC (mn)
+ OP( DEC,12 ) MI16( 1, imm16 ) NONE( 2 ) return; // DEC (mn)
case 0x97:
- OP( INCW,16 ) MI16( 1, imm16 ) NONE( 2 ) return; // INCW (mn)
+ OP( INCW,16 ) MI16( 1, imm16 ) NONE( 2 ) return; // INCW (mn)
case 0x9f:
- OP( DECW,16 ) MI16( 1, imm16 ) NONE( 2 ) return; // DECW (mn)
-
- case 0xa0: // RLC (mn)
- case 0xa1: // RRC (mn)
- case 0xa2: // RL (mn)
- case 0xa3: // RR (mn)
- case 0xa4: // SLA (mn)
- case 0xa5: // SRA (mn)
- case 0xa6: // SLL (mn)
- case 0xa7: // SRL (mn)
- OP( RLC+b3-0xa0,12 ) MI16( 1, imm16 ) NONE( 2 ) return;
-
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- OP( TSET,16 ) BIT8( 1, b3 - 0x18 ) MI16( 2, imm16 ) return; // TSET b,(mn)
- case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- OP( BIT,10 ) BIT8( 1, b3 - 0xa8 ) MI16( 2, imm16 ) return; // BIT b,(mn)
- case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- OP( RES,14 ) BIT8( 1, b3 - 0xb0 ) MI16( 2, imm16 ) return; // RES b,(mn)
- case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- OP( SET,14 ) BIT8( 1, b3 - 0xb8 ) MI16( 2, imm16 ) return; // SET b,(mn)
- } break;
+ OP( DECW,16 ) MI16( 1, imm16 ) NONE( 2 ) return; // DECW (mn)
+
+ case 0xa0: // RLC (mn)
+ case 0xa1: // RRC (mn)
+ case 0xa2: // RL (mn)
+ case 0xa3: // RR (mn)
+ case 0xa4: // SLA (mn)
+ case 0xa5: // SRA (mn)
+ case 0xa6: // SLL (mn)
+ case 0xa7: // SRL (mn)
+ OP( RLC+b3-0xa0,12 ) MI16( 1, imm16 ) NONE( 2 ) return;
+
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ OP( TSET,16 ) BIT8( 1, b3 - 0x18 ) MI16( 2, imm16 ) return; // TSET b,(mn)
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ OP( BIT,10 ) BIT8( 1, b3 - 0xa8 ) MI16( 2, imm16 ) return; // BIT b,(mn)
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ OP( RES,14 ) BIT8( 1, b3 - 0xb0 ) MI16( 2, imm16 ) return; // RES b,(mn)
+ case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ OP( SET,14 ) BIT8( 1, b3 - 0xb8 ) MI16( 2, imm16 ) return; // SET b,(mn)
+ } break;
case 0xe7:
b1 = READ8(cpustate);
b2 = READ8(cpustate);
- switch ( b2 ) {
- case 0x10: // RLD ($FF00+n)
- case 0x11: // RRD ($FF00+n)
- OP( RLD+b2-0x10,14 ) MI16( 1, 0xFF00|b1 ) NONE( 2 ) return;
-
- case 0x12: // MUL HL,($FF00+n)
- case 0x13: // DIV HL,($FF00+n)
- OP( MUL+b2-0x12,20 ) R16( 1, HL ) MI16( 2, 0xFF00|b1 ) return;
-
- case 0x14: case 0x15: case 0x16:
- OP16( ADD,10 ) R16( 1, IX+b2-0x14 ) MI16( 2, 0xFF00|b1 ) return; // ADD ix,($FF00+n)
-
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- OP( TSET,14 ) BIT8( 1, b2 - 0x18 ) MI16( 2, 0xFF00|b1 ) return; // TSET b,($FF00+n)
- case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
- OP( LD,8 ) R8( 1, b2 - 0x28 ) MI16( 2, 0xFF00|b1 ) return; // LD r,($FF00+n)
- case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
- OP16( LD,10 ) R16( 1, b2 - 0x48 ) MI16( 2, 0xFF00|b1 ) return; // LD rr,($FF00+n)
-
- case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
- OP( EX,16 ) MI16( 1, 0xFF00|b1 ) R16( 2, b2 - 0x50 ) return; // EX ($FF00+n),rr
-
- case 0xa0: // RLC ($FF00+n)
- case 0xa1: // RRC ($FF00+n)
- case 0xa2: // RL ($FF00+n)
- case 0xa3: // RR ($FF00+n)
- case 0xa4: // SLA ($FF00+n)
- case 0xa5: // SRA ($FF00+n)
- case 0xa6: // SLL ($FF00+n)
- case 0xa7: // SRL ($FF00+n)
- OP( RLC+b2-0xa0,10 ) MI16( 1, 0xFF00|b1 ) NONE( 2 ) return;
- } break;
-
- case 0xe8: case 0xe9: case 0xea: /*case 0xeb:*/ case 0xec: case 0xed: case 0xee:
+ switch ( b2 ) {
+ case 0x10: // RLD ($FF00+n)
+ case 0x11: // RRD ($FF00+n)
+ OP( RLD+b2-0x10,14 ) MI16( 1, 0xFF00|b1 ) NONE( 2 ) return;
+
+ case 0x12: // MUL HL,($FF00+n)
+ case 0x13: // DIV HL,($FF00+n)
+ OP( MUL+b2-0x12,20 ) R16( 1, HL ) MI16( 2, 0xFF00|b1 ) return;
+
+ case 0x14: case 0x15: case 0x16:
+ OP16( ADD,10 ) R16( 1, IX+b2-0x14 ) MI16( 2, 0xFF00|b1 ) return; // ADD ix,($FF00+n)
+
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ OP( TSET,14 ) BIT8( 1, b2 - 0x18 ) MI16( 2, 0xFF00|b1 ) return; // TSET b,($FF00+n)
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
+ OP( LD,8 ) R8( 1, b2 - 0x28 ) MI16( 2, 0xFF00|b1 ) return; // LD r,($FF00+n)
+ case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
+ OP16( LD,10 ) R16( 1, b2 - 0x48 ) MI16( 2, 0xFF00|b1 ) return; // LD rr,($FF00+n)
+
+ case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
+ OP( EX,16 ) MI16( 1, 0xFF00|b1 ) R16( 2, b2 - 0x50 ) return; // EX ($FF00+n),rr
+
+ case 0xa0: // RLC ($FF00+n)
+ case 0xa1: // RRC ($FF00+n)
+ case 0xa2: // RL ($FF00+n)
+ case 0xa3: // RR ($FF00+n)
+ case 0xa4: // SLA ($FF00+n)
+ case 0xa5: // SRA ($FF00+n)
+ case 0xa6: // SLL ($FF00+n)
+ case 0xa7: // SRL ($FF00+n)
+ OP( RLC+b2-0xa0,10 ) MI16( 1, 0xFF00|b1 ) NONE( 2 ) return;
+ } break;
+
+ case 0xe8: case 0xe9: case 0xea: /*case 0xeb:*/ case 0xec: case 0xed: case 0xee:
b1 = READ8(cpustate);
- switch ( b1 ) {
- case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
- OP( LD,6 ) MR16( 1, b0 - 0xe8 ) R8( 2, b1 - 0x20 ) return; // LD (gg),r
+ switch ( b1 ) {
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ OP( LD,6 ) MR16( 1, b0 - 0xe8 ) R8( 2, b1 - 0x20 ) return; // LD (gg),r
case 0x37:
- OP( LD,8 ) MR16( 1, b0 - 0xe8 ) I8( 2, READ8(cpustate) ) return; // LD (gg),n
+ OP( LD,8 ) MR16( 1, b0 - 0xe8 ) I8( 2, READ8(cpustate) ) return; // LD (gg),n
case 0x3f:
- OP( LDW,12 ) MR16( 1, b0 - 0xe8 ) I16( 2, READ16(cpustate) ) return; // LDW (gg),mn
- case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
- OP16( LD,8 ) MR16( 1, b0 - 0xe8 ) R16( 2, b1 - 0x40 ) return; // LD (gg),rr
-
- case 0x68: // ADD (gg),n
- case 0x69: // ADC (gg),n
- case 0x6a: // SUB (gg),n
- case 0x6b: // SBC (gg),n
- case 0x6c: // AND (gg),n
- case 0x6d: // XOR (gg),n
- case 0x6e: // OR (gg),n
- OP( ADD+b1-0x68,10 ) MR16( 1, b0 - 0xe8 ) I8( 2, READ8(cpustate) ) return;
- case 0x6f: // CP (gg),n
- OP( CP,8 ) MR16( 1, b0 - 0xe8 ) I8( 2, READ8(cpustate) ) return;
-
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
- OPCC( JP,6,8 ) CC( 1, b1 - 0xc0 ) R16( 2, b0 - 0xe8 ) return; // JP [cc,]gg
- case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
- OPCC( CALL,6,14 ) CC( 1, b1 - 0xd0 ) R16( 2, b0 - 0xe8 ) return; // CALL [cc,]gg
- } break;
+ OP( LDW,12 ) MR16( 1, b0 - 0xe8 ) I16( 2, READ16(cpustate) ) return; // LDW (gg),mn
+ case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
+ OP16( LD,8 ) MR16( 1, b0 - 0xe8 ) R16( 2, b1 - 0x40 ) return; // LD (gg),rr
+
+ case 0x68: // ADD (gg),n
+ case 0x69: // ADC (gg),n
+ case 0x6a: // SUB (gg),n
+ case 0x6b: // SBC (gg),n
+ case 0x6c: // AND (gg),n
+ case 0x6d: // XOR (gg),n
+ case 0x6e: // OR (gg),n
+ OP( ADD+b1-0x68,10 ) MR16( 1, b0 - 0xe8 ) I8( 2, READ8(cpustate) ) return;
+ case 0x6f: // CP (gg),n
+ OP( CP,8 ) MR16( 1, b0 - 0xe8 ) I8( 2, READ8(cpustate) ) return;
+
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ OPCC( JP,6,8 ) CC( 1, b1 - 0xc0 ) R16( 2, b0 - 0xe8 ) return; // JP [cc,]gg
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ OPCC( CALL,6,14 ) CC( 1, b1 - 0xd0 ) R16( 2, b0 - 0xe8 ) return; // CALL [cc,]gg
+ } break;
case 0xeb:
imm16 = READ16(cpustate);
b3 = READ8(cpustate);
- switch ( b3 ) {
- case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
- OP( LD,10 ) MI16( 1, imm16 ) R8( 2, b3 - 0x20 ) return; // LD (mn),r
+ switch ( b3 ) {
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ OP( LD,10 ) MI16( 1, imm16 ) R8( 2, b3 - 0x20 ) return; // LD (mn),r
case 0x37:
- OP( LD,12 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return; // LD (vw),n
+ OP( LD,12 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return; // LD (vw),n
case 0x3f:
- OP( LDW,16 ) MI16( 1, imm16 ) I16( 2, READ16(cpustate) ) return; // LDW (vw),mn
- case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
- OP16( LD,12 ) MI16( 1, imm16 ) R16( 2, b3 - 0x40 ) return; // LD (mn),rr
-
- case 0x68: // ADD (vw),n
- case 0x69: // ADC (vw),n
- case 0x6a: // SUB (vw),n
- case 0x6b: // SBC (vw),n
- case 0x6c: // AND (vw),n
- case 0x6d: // XOR (vw),n
- case 0x6e: // OR (vw),n
- OP( ADD+b3-0x68,14 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return;
- case 0x6f: // CP (vw),n
- OP( ADD+b3-0x68,12 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return;
-
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
- OPCC( JP,10,12 ) CC( 1, b3 - 0xc0 ) I16( 2, imm16 ) return; // JP cc,mn
- case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
- OPCC( CALL,10,18 ) CC( 1, b3 - 0xd0 ) I16( 2, imm16 ) return; // CALL cc,mn
- } break;
+ OP( LDW,16 ) MI16( 1, imm16 ) I16( 2, READ16(cpustate) ) return; // LDW (vw),mn
+ case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
+ OP16( LD,12 ) MI16( 1, imm16 ) R16( 2, b3 - 0x40 ) return; // LD (mn),rr
+
+ case 0x68: // ADD (vw),n
+ case 0x69: // ADC (vw),n
+ case 0x6a: // SUB (vw),n
+ case 0x6b: // SBC (vw),n
+ case 0x6c: // AND (vw),n
+ case 0x6d: // XOR (vw),n
+ case 0x6e: // OR (vw),n
+ OP( ADD+b3-0x68,14 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return;
+ case 0x6f: // CP (vw),n
+ OP( ADD+b3-0x68,12 ) MI16( 1, imm16 ) I8( 2, READ8(cpustate) ) return;
+
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ OPCC( JP,10,12 ) CC( 1, b3 - 0xc0 ) I16( 2, imm16 ) return; // JP cc,mn
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ OPCC( CALL,10,18 ) CC( 1, b3 - 0xd0 ) I16( 2, imm16 ) return; // CALL cc,mn
+ } break;
case 0xef:
b1 = READ8(cpustate);
b2 = READ8(cpustate);
- switch ( b2 ) {
- case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
- OP( LD,8 ) MI16( 1, 0xFF00|b1 ) R8( 2, b2 - 0x20 ) return; // LD ($FF00+n),r
- case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
- OP16( LD,10 ) MI16( 1, 0xFF00|b1 ) R16( 2, b2 - 0x40 ) return; // LD ($FF00+n),rr
-
- case 0x68: // ADD ($FF00+w),n
- case 0x69: // ADC ($FF00+w),n
- case 0x6a: // SUB ($FF00+w),n
- case 0x6b: // SBC ($FF00+w),n
- case 0x6c: // AND ($FF00+w),n
- case 0x6d: // XOR ($FF00+w),n
- case 0x6e: // OR ($FF00+w),n
- OP( ADD+b2-0x68,12 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return;
- case 0x6f: // CP ($FF00+w),n
- OP( ADD+b2-0x68,10 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return;
- } break;
-
- case 0xf0: case 0xf1: case 0xf2:
+ switch ( b2 ) {
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ OP( LD,8 ) MI16( 1, 0xFF00|b1 ) R8( 2, b2 - 0x20 ) return; // LD ($FF00+n),r
+ case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
+ OP16( LD,10 ) MI16( 1, 0xFF00|b1 ) R16( 2, b2 - 0x40 ) return; // LD ($FF00+n),rr
+
+ case 0x68: // ADD ($FF00+w),n
+ case 0x69: // ADC ($FF00+w),n
+ case 0x6a: // SUB ($FF00+w),n
+ case 0x6b: // SBC ($FF00+w),n
+ case 0x6c: // AND ($FF00+w),n
+ case 0x6d: // XOR ($FF00+w),n
+ case 0x6e: // OR ($FF00+w),n
+ OP( ADD+b2-0x68,12 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return;
+ case 0x6f: // CP ($FF00+w),n
+ OP( ADD+b2-0x68,10 ) MI16( 1, 0xFF00|b1 ) I8( 2, READ8(cpustate) ) return;
+ } break;
+
+ case 0xf0: case 0xf1: case 0xf2:
b1 = READ8(cpustate);
b2 = READ8(cpustate);
- switch ( b2 ) {
- case 0x10: // RLD (ix+d)
- case 0x11: // RRD (ix+d)
- OP( RLD+b2-0x10,16 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return;
-
- case 0x12: // MUL HL,(ix+d)
- case 0x13: // DIV HL,(ix+d)
- OP( MUL+b2-0x12,22 ) R16( 1, HL ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return;
-
- case 0x14: case 0x15: case 0x16:
- OP16( ADD,12 ) R16( 1, IX+b2-0x14 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // ADD ix,(jx+d)
-
- case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
- OP( LD,10 ) R8( 1, b2 - 0x28 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // LD r,(ix+d)
- case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
- OP16( LD,12 ) R16( 1, b2 - 0x48 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // LD rr,(ix+d)
-
- case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
- OP( EX,18 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) R16( 2, b2 - 0x50 ) return; // EX (ix+d),rr
-
- case 0x60: // ADD A,(ix+d)
- case 0x61: // ADC A,(ix+d)
- case 0x62: // SUB A,(ix+d)
- case 0x63: // SBC A,(ix+d)
- case 0x64: // AND A,(ix+d)
- case 0x65: // XOR A,(ix+d)
- case 0x66: // OR A,(ix+d)
- case 0x67: // CP A,(ix+d)
- OP( ADD+b2-0x60,10 ) R8( 1, A ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return;
-
- case 0x70: // ADD HL,(ix+d)
- case 0x71: // ADC HL,(ix+d)
- case 0x72: // SUB HL,(ix+d)
- case 0x73: // SBC HL,(ix+d)
- case 0x74: // AND HL,(ix+d)
- case 0x75: // XOR HL,(ix+d)
- case 0x76: // OR HL,(ix+d)
- case 0x77: // CP HL,(ix+d)
- OP16( ADD+b2-0x70,12 ) R16( 1, HL ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return;
+ switch ( b2 ) {
+ case 0x10: // RLD (ix+d)
+ case 0x11: // RRD (ix+d)
+ OP( RLD+b2-0x10,16 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return;
+
+ case 0x12: // MUL HL,(ix+d)
+ case 0x13: // DIV HL,(ix+d)
+ OP( MUL+b2-0x12,22 ) R16( 1, HL ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return;
+
+ case 0x14: case 0x15: case 0x16:
+ OP16( ADD,12 ) R16( 1, IX+b2-0x14 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // ADD ix,(jx+d)
+
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
+ OP( LD,10 ) R8( 1, b2 - 0x28 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // LD r,(ix+d)
+ case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
+ OP16( LD,12 ) R16( 1, b2 - 0x48 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // LD rr,(ix+d)
+
+ case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
+ OP( EX,18 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) R16( 2, b2 - 0x50 ) return; // EX (ix+d),rr
+
+ case 0x60: // ADD A,(ix+d)
+ case 0x61: // ADC A,(ix+d)
+ case 0x62: // SUB A,(ix+d)
+ case 0x63: // SBC A,(ix+d)
+ case 0x64: // AND A,(ix+d)
+ case 0x65: // XOR A,(ix+d)
+ case 0x66: // OR A,(ix+d)
+ case 0x67: // CP A,(ix+d)
+ OP( ADD+b2-0x60,10 ) R8( 1, A ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return;
+
+ case 0x70: // ADD HL,(ix+d)
+ case 0x71: // ADC HL,(ix+d)
+ case 0x72: // SUB HL,(ix+d)
+ case 0x73: // SBC HL,(ix+d)
+ case 0x74: // AND HL,(ix+d)
+ case 0x75: // XOR HL,(ix+d)
+ case 0x76: // OR HL,(ix+d)
+ case 0x77: // CP HL,(ix+d)
+ OP16( ADD+b2-0x70,12 ) R16( 1, HL ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return;
case 0x87:
- OP( INC,12 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // INC (ix+d)
+ OP( INC,12 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // INC (ix+d)
case 0x8f:
- OP( DEC,12 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // DEC (ix+d)
+ OP( DEC,12 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // DEC (ix+d)
case 0x97:
- OP( INCW,16 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // INCW (ix+d)
+ OP( INCW,16 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // INCW (ix+d)
case 0x9f:
- OP( DECW,16 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // DECW (ix+d)
-
- case 0xa0: // RLC (ix+d)
- case 0xa1: // RRC (ix+d)
- case 0xa2: // RL (ix+d)
- case 0xa3: // RR (ix+d)
- case 0xa4: // SLA (ix+d)
- case 0xa5: // SRA (ix+d)
- case 0xa6: // SLL (ix+d)
- case 0xa7: // SRL (ix+d)
- OP( RLC+b2-0xa0,12 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return;
-
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- OP( TSET,16 ) BIT8( 1, b2 - 0x18 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // TSET b,(ix+d)
- case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- OP( BIT,10 ) BIT8( 1, b2 - 0xa8 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // BIT b,(ix+d)
- case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- OP( RES,14 ) BIT8( 1, b2 - 0xb0 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // RES b,(ix+d)
- case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- OP( SET,14 ) BIT8( 1, b2 - 0xb8 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // SET b,(ix+d)
- } break;
+ OP( DECW,16 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return; // DECW (ix+d)
+
+ case 0xa0: // RLC (ix+d)
+ case 0xa1: // RRC (ix+d)
+ case 0xa2: // RL (ix+d)
+ case 0xa3: // RR (ix+d)
+ case 0xa4: // SLA (ix+d)
+ case 0xa5: // SRA (ix+d)
+ case 0xa6: // SLL (ix+d)
+ case 0xa7: // SRL (ix+d)
+ OP( RLC+b2-0xa0,12 ) MR16D8( 1, IX + b0 - 0xf0, b1 ) NONE( 2 ) return;
+
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ OP( TSET,16 ) BIT8( 1, b2 - 0x18 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // TSET b,(ix+d)
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ OP( BIT,10 ) BIT8( 1, b2 - 0xa8 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // BIT b,(ix+d)
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ OP( RES,14 ) BIT8( 1, b2 - 0xb0 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // RES b,(ix+d)
+ case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ OP( SET,14 ) BIT8( 1, b2 - 0xb8 ) MR16D8( 2, IX + b0 - 0xf0, b1 ) return; // SET b,(ix+d)
+ } break;
case 0xf3:
b1 = READ8(cpustate);
- switch ( b1 ) {
- case 0x10: // RLD (HL+A)
- case 0x11: // RRD (HL+A)
- OP( RLD+b1-0x10,20 ) MR16R8( 1, HL, A ) NONE( 2 ) return;
-
- case 0x12: // MUL HL,(HL+A)
- case 0x13: // DIV HL,(HL+A)
- OP( MUL+b1-0x12,26 ) R16( 1, HL ) MR16R8( 2, HL, A ) return;
-
- case 0x14: case 0x15: case 0x16:
- OP16( ADD,16 ) R16( 1, IX+b1-0x14 ) MR16R8( 2, HL, A ) return; // ADD ix,(HL+A)
-
- case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
- OP( LD,14 ) R8( 1, b1 - 0x28 ) MR16R8( 2, HL, A ) return; // LD r,(HL+A)
- case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
- OP16( LD,16 ) R16( 1, b1 - 0x48 ) MR16R8( 2, HL, A ) return; // LD rr,(HL+A)
-
- case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
- OP( EX,22 ) MR16R8( 1, HL, A ) R16( 2, b1 - 0x50 ) return; // EX (HL+A),rr
-
- case 0x60: // ADD A,(HL+A)
- case 0x61: // ADC A,(HL+A)
- case 0x62: // SUB A,(HL+A)
- case 0x63: // SBC A,(HL+A)
- case 0x64: // AND A,(HL+A)
- case 0x65: // XOR A,(HL+A)
- case 0x66: // OR A,(HL+A)
- case 0x67: // CP A,(HL+A)
- OP( ADD+b1-0x60,14 ) R8( 1, A ) MR16R8( 2, HL, A ) return;
-
- case 0x70: // ADD HL,(HL+A)
- case 0x71: // ADC HL,(HL+A)
- case 0x72: // SUB HL,(HL+A)
- case 0x73: // SBC HL,(HL+A)
- case 0x74: // AND HL,(HL+A)
- case 0x75: // XOR HL,(HL+A)
- case 0x76: // OR HL,(HL+A)
- case 0x77: // CP HL,(HL+A)
- OP16( ADD+b1-0x70,16 ) R16( 1, HL ) MR16R8( 2, HL, A ) return;
+ switch ( b1 ) {
+ case 0x10: // RLD (HL+A)
+ case 0x11: // RRD (HL+A)
+ OP( RLD+b1-0x10,20 ) MR16R8( 1, HL, A ) NONE( 2 ) return;
+
+ case 0x12: // MUL HL,(HL+A)
+ case 0x13: // DIV HL,(HL+A)
+ OP( MUL+b1-0x12,26 ) R16( 1, HL ) MR16R8( 2, HL, A ) return;
+
+ case 0x14: case 0x15: case 0x16:
+ OP16( ADD,16 ) R16( 1, IX+b1-0x14 ) MR16R8( 2, HL, A ) return; // ADD ix,(HL+A)
+
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e:
+ OP( LD,14 ) R8( 1, b1 - 0x28 ) MR16R8( 2, HL, A ) return; // LD r,(HL+A)
+ case 0x48: case 0x49: case 0x4a: /*case 0x4b:*/ case 0x4c: case 0x4d: case 0x4e:
+ OP16( LD,16 ) R16( 1, b1 - 0x48 ) MR16R8( 2, HL, A ) return; // LD rr,(HL+A)
+
+ case 0x50: case 0x51: case 0x52: /*case 0x53:*/ case 0x54: case 0x55: case 0x56:
+ OP( EX,22 ) MR16R8( 1, HL, A ) R16( 2, b1 - 0x50 ) return; // EX (HL+A),rr
+
+ case 0x60: // ADD A,(HL+A)
+ case 0x61: // ADC A,(HL+A)
+ case 0x62: // SUB A,(HL+A)
+ case 0x63: // SBC A,(HL+A)
+ case 0x64: // AND A,(HL+A)
+ case 0x65: // XOR A,(HL+A)
+ case 0x66: // OR A,(HL+A)
+ case 0x67: // CP A,(HL+A)
+ OP( ADD+b1-0x60,14 ) R8( 1, A ) MR16R8( 2, HL, A ) return;
+
+ case 0x70: // ADD HL,(HL+A)
+ case 0x71: // ADC HL,(HL+A)
+ case 0x72: // SUB HL,(HL+A)
+ case 0x73: // SBC HL,(HL+A)
+ case 0x74: // AND HL,(HL+A)
+ case 0x75: // XOR HL,(HL+A)
+ case 0x76: // OR HL,(HL+A)
+ case 0x77: // CP HL,(HL+A)
+ OP16( ADD+b1-0x70,16 ) R16( 1, HL ) MR16R8( 2, HL, A ) return;
case 0x87:
- OP( INC,16 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // INC (HL+A)
+ OP( INC,16 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // INC (HL+A)
case 0x8f:
- OP( DEC,16 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // DEC (HL+A)
+ OP( DEC,16 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // DEC (HL+A)
case 0x97:
- OP( INCW,20 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // INCW (HL+A)
+ OP( INCW,20 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // INCW (HL+A)
case 0x9f:
- OP( DECW,20 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // DECW (HL+A)
-
- case 0xa0: // RLC (HL+A)
- case 0xa1: // RRC (HL+A)
- case 0xa2: // RL (HL+A)
- case 0xa3: // RR (HL+A)
- case 0xa4: // SLA (HL+A)
- case 0xa5: // SRA (HL+A)
- case 0xa6: // SLL (HL+A)
- case 0xa7: // SRL (HL+A)
- OP( RLC+b1-0xa0,16 ) MR16R8( 1, HL, A ) NONE( 2 ) return;
-
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- OP( TSET,20 ) BIT8( 1, b1 - 0x18 ) MR16R8( 2, HL, A ) return; // TSET b,(HL+A)
- case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- OP( BIT,14 ) BIT8( 1, b1 - 0xa8 ) MR16R8( 2, HL, A ) return; // BIT b,(HL+A)
- case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- OP( RES,18 ) BIT8( 1, b1 - 0xb0 ) MR16R8( 2, HL, A ) return; // RES b,(HL+A)
- case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- OP( SET,18 ) BIT8( 1, b1 - 0xb8 ) MR16R8( 2, HL, A ) return; // SET b,(HL+A)
- } break;
-
- case 0xf4: case 0xf5: case 0xf6:
+ OP( DECW,20 ) MR16R8( 1, HL, A ) NONE( 2 ) return; // DECW (HL+A)
+
+ case 0xa0: // RLC (HL+A)
+ case 0xa1: // RRC (HL+A)
+ case 0xa2: // RL (HL+A)
+ case 0xa3: // RR (HL+A)
+ case 0xa4: // SLA (HL+A)
+ case 0xa5: // SRA (HL+A)
+ case 0xa6: // SLL (HL+A)
+ case 0xa7: // SRL (HL+A)
+ OP( RLC+b1-0xa0,16 ) MR16R8( 1, HL, A ) NONE( 2 ) return;
+
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ OP( TSET,20 ) BIT8( 1, b1 - 0x18 ) MR16R8( 2, HL, A ) return; // TSET b,(HL+A)
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ OP( BIT,14 ) BIT8( 1, b1 - 0xa8 ) MR16R8( 2, HL, A ) return; // BIT b,(HL+A)
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ OP( RES,18 ) BIT8( 1, b1 - 0xb0 ) MR16R8( 2, HL, A ) return; // RES b,(HL+A)
+ case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ OP( SET,18 ) BIT8( 1, b1 - 0xb8 ) MR16R8( 2, HL, A ) return; // SET b,(HL+A)
+ } break;
+
+ case 0xf4: case 0xf5: case 0xf6:
b1 = READ8(cpustate);
b2 = READ8(cpustate);
- switch ( b2 ) {
- case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
- OP( LD,10 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) R8( 2, b2 - 0x20 ) return; // LD (ix+d),r
+ switch ( b2 ) {
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ OP( LD,10 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) R8( 2, b2 - 0x20 ) return; // LD (ix+d),r
case 0x37:
- OP( LD,12 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return; // LD (ix+d),n
- case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
- OP( LDA,10 ) R16( 1, b2 - 0x38 ) R16D8( 2, IX + b0 - 0xf4, b1 ) return; // LDA rr,ix+d
+ OP( LD,12 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return; // LD (ix+d),n
+ case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
+ OP( LDA,10 ) R16( 1, b2 - 0x38 ) R16D8( 2, IX + b0 - 0xf4, b1 ) return; // LDA rr,ix+d
case 0x3f:
- OP( LDW,16 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) I16( 2, READ16(cpustate) ) return; // LDW (ix+d),mn
- case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
- OP16( LD,12 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) R16( 2, b2 - 0x40 ) return; // LD (ix+d),rr
-
- case 0x68: // ADD (ix+d),n
- case 0x69: // ADC (ix+d),n
- case 0x6a: // SUB (ix+d),n
- case 0x6b: // SBC (ix+d),n
- case 0x6c: // AND (ix+d),n
- case 0x6d: // XOR (ix+d),n
- case 0x6e: // OR (ix+d),n
- OP( ADD+b2-0x68,14) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return;
- case 0x6f: // CP (ix+d),n
- OP( ADD+b2-0x68,12) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return;
-
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
- OPCC( JP,10,12 ) CC( 1, b2 - 0xc0 ) R16D8( 2, IX + b0 - 0xf4, b1 ) return; // JP [cc,]ix+d
- case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
- OPCC( CALL,10,18 ) CC( 1, b2 - 0xd0 ) R16D8( 2, IX + b0 - 0xf4, b1 ) return; // CALL [cc,]ix+d
- } break;
+ OP( LDW,16 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) I16( 2, READ16(cpustate) ) return; // LDW (ix+d),mn
+ case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
+ OP16( LD,12 ) MR16D8( 1, IX + b0 - 0xf4, b1 ) R16( 2, b2 - 0x40 ) return; // LD (ix+d),rr
+
+ case 0x68: // ADD (ix+d),n
+ case 0x69: // ADC (ix+d),n
+ case 0x6a: // SUB (ix+d),n
+ case 0x6b: // SBC (ix+d),n
+ case 0x6c: // AND (ix+d),n
+ case 0x6d: // XOR (ix+d),n
+ case 0x6e: // OR (ix+d),n
+ OP( ADD+b2-0x68,14) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return;
+ case 0x6f: // CP (ix+d),n
+ OP( ADD+b2-0x68,12) MR16D8( 1, IX + b0 - 0xf4, b1 ) I8( 2, READ8(cpustate) ) return;
+
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ OPCC( JP,10,12 ) CC( 1, b2 - 0xc0 ) R16D8( 2, IX + b0 - 0xf4, b1 ) return; // JP [cc,]ix+d
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ OPCC( CALL,10,18 ) CC( 1, b2 - 0xd0 ) R16D8( 2, IX + b0 - 0xf4, b1 ) return; // CALL [cc,]ix+d
+ } break;
case 0xf7:
b1 = READ8(cpustate);
- switch ( b1 ) {
- case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
- OP( LD,14 ) MR16R8( 1, HL, A ) R8( 2, b1 - 0x20 ) return; // LD (HL+A),r
+ switch ( b1 ) {
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ OP( LD,14 ) MR16R8( 1, HL, A ) R8( 2, b1 - 0x20 ) return; // LD (HL+A),r
case 0x37:
- OP( LD,16 ) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return; // LD (HL+A),n
- case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
- OP( LDA,14 ) R16( 1, b1 - 0x38 ) R16R8( 2, HL, A ) return; // LDA rr,HL+A
+ OP( LD,16 ) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return; // LD (HL+A),n
+ case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
+ OP( LDA,14 ) R16( 1, b1 - 0x38 ) R16R8( 2, HL, A ) return; // LDA rr,HL+A
case 0x3f:
- OP( LDW,20 ) MR16R8( 1, HL, A ) I16( 2, READ16(cpustate) ) return; // LDW (HL+A),mn
- case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
- OP16( LD,16 ) MR16R8( 1, HL, A ) R16( 2, b1 - 0x40 ) return; // LD (HL+A),rr
-
- case 0x68: // ADD (HL+A),n
- case 0x69: // ADC (HL+A),n
- case 0x6a: // SUB (HL+A),n
- case 0x6b: // SBC (HL+A),n
- case 0x6c: // AND (HL+A),n
- case 0x6d: // XOR (HL+A),n
- case 0x6e: // OR (HL+A),n
- OP( ADD+b1-0x68,18) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return;
- case 0x6f: // CP (HL+A),n
- OP( ADD+b1-0x68,16) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return;
-
- case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
- OPCC( JP,14,16 ) CC( 1, b1 - 0xc0 ) R16R8( 2, HL, A ) return; // JP [cc,]HL+A
- case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
- OPCC( CALL,14,22 ) CC( 1, b1 - 0xd0 ) R16R8( 2, HL, A ) return; // CALL [cc,]HL+A
- } break;
-
- case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe:
+ OP( LDW,20 ) MR16R8( 1, HL, A ) I16( 2, READ16(cpustate) ) return; // LDW (HL+A),mn
+ case 0x40: case 0x41: case 0x42: /*case 0x43:*/ case 0x44: case 0x45: case 0x46:
+ OP16( LD,16 ) MR16R8( 1, HL, A ) R16( 2, b1 - 0x40 ) return; // LD (HL+A),rr
+
+ case 0x68: // ADD (HL+A),n
+ case 0x69: // ADC (HL+A),n
+ case 0x6a: // SUB (HL+A),n
+ case 0x6b: // SBC (HL+A),n
+ case 0x6c: // AND (HL+A),n
+ case 0x6d: // XOR (HL+A),n
+ case 0x6e: // OR (HL+A),n
+ OP( ADD+b1-0x68,18) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return;
+ case 0x6f: // CP (HL+A),n
+ OP( ADD+b1-0x68,16) MR16R8( 1, HL, A ) I8( 2, READ8(cpustate) ) return;
+
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ OPCC( JP,14,16 ) CC( 1, b1 - 0xc0 ) R16R8( 2, HL, A ) return; // JP [cc,]HL+A
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ OPCC( CALL,14,22 ) CC( 1, b1 - 0xd0 ) R16R8( 2, HL, A ) return; // CALL [cc,]HL+A
+ } break;
+
+ case 0xf8: case 0xf9: case 0xfa: case 0xfb: case 0xfc: case 0xfd: case 0xfe:
b1 = READ8(cpustate);
- switch ( b1 ) {
- case 0x12: // MUL HL,g
- case 0x13: // DIV HL,g
- OP( MUL+b1-0x12,18) R16( 1, HL ) R8( 2, b0 - 0xf8 ) return;
-
- case 0x14: case 0x15: case 0x16:
- OP16( ADD,8 ) R16( 1, IX+b1-0x14 ) R16( 2, b0 - 0xf8 ) return; // ADD ix,gg
-
- case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36:
- OP( LD,4 ) R8( 1, b1 - 0x30 ) R8( 2, b0 - 0xf8 ) return; // LD r,g
- case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
- OP16( LD,6 ) R16( 1, b1 - 0x38 ) R16( 2, b0 - 0xf8 ) return; // LD rr,gg
-
- case 0x58: // LDI
- case 0x59: // LDIR
- case 0x5a: // LDD
- case 0x5b: // LDDR
- case 0x5c: // CPI
- case 0x5d: // CPIR
- case 0x5e: // CPD
- case 0x5f: // CPDR
+ switch ( b1 ) {
+ case 0x12: // MUL HL,g
+ case 0x13: // DIV HL,g
+ OP( MUL+b1-0x12,18) R16( 1, HL ) R8( 2, b0 - 0xf8 ) return;
+
+ case 0x14: case 0x15: case 0x16:
+ OP16( ADD,8 ) R16( 1, IX+b1-0x14 ) R16( 2, b0 - 0xf8 ) return; // ADD ix,gg
+
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36:
+ OP( LD,4 ) R8( 1, b1 - 0x30 ) R8( 2, b0 - 0xf8 ) return; // LD r,g
+ case 0x38: case 0x39: case 0x3a: /*case 0x3b:*/ case 0x3c: case 0x3d: case 0x3e:
+ OP16( LD,6 ) R16( 1, b1 - 0x38 ) R16( 2, b0 - 0xf8 ) return; // LD rr,gg
+
+ case 0x58: // LDI
+ case 0x59: // LDIR
+ case 0x5a: // LDD
+ case 0x5b: // LDDR
+ case 0x5c: // CPI
+ case 0x5d: // CPIR
+ case 0x5e: // CPD
+ case 0x5f: // CPDR
if (b0 == 0xfe) {
- OPCC( LDI+b1-0x58,14,18 ) NONE( 1 ) NONE( 2 ) return;
+ OPCC( LDI+b1-0x58,14,18 ) NONE( 1 ) NONE( 2 ) return;
}
- case 0x60: // ADD A,g
- case 0x61: // ADC A,g
- case 0x62: // SUB A,g
- case 0x63: // SBC A,g
- case 0x64: // AND A,g
- case 0x65: // XOR A,g
- case 0x66: // OR A,g
- case 0x67: // CP A,g
- OP( ADD+b1-0x60,4 ) R8( 1, A ) R8( 2, b0 - 0xf8 ) return;
-
- case 0x68: // ADD g,n
- case 0x69: // ADC g,n
- case 0x6a: // SUB g,n
- case 0x6b: // SBC g,n
- case 0x6c: // AND g,n
- case 0x6d: // XOR g,n
- case 0x6e: // OR g,n
- case 0x6f: // CP g,n
- OP( ADD+b1-0x68,6 ) R8( 1, b0 - 0xf8 ) I8( 2, READ8(cpustate) ) return;
-
- case 0x70: // ADD HL,gg
- case 0x71: // ADC HL,gg
- case 0x72: // SUB HL,gg
- case 0x73: // SBC HL,gg
- case 0x74: // AND HL,gg
- case 0x75: // XOR HL,gg
- case 0x76: // OR HL,gg
- case 0x77: // CP HL,gg
- OP16( ADD+b1-0x70,8 ) R16( 1, HL ) R16( 2, b0 - 0xf8 ) return;
-
- case 0xa0: // RLC g
- case 0xa1: // RRC g
- case 0xa2: // RL g
- case 0xa3: // RR g
- case 0xa4: // SLA g
- case 0xa5: // SRA g
- case 0xa6: // SLL g
- case 0xa7: // SRL g
- OP( RLC+b1-0xa0,4 ) R8( 1, b0 - 0xf8 ) NONE( 2 ) return;
-
- case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- OP( TSET,8 ) BIT8( 1, b1 - 0x18 ) R8( 2, b0 - 0xf8 ) return; // TSET b,g
- case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- OP( BIT,4 ) BIT8( 1, b1 - 0xa8 ) R8( 2, b0 - 0xf8 ) return; // BIT b,g
- case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- OP( RES,4 ) BIT8( 1, b1 - 0xb0 ) R8( 2, b0 - 0xf8 ) return; // RES b,g
- case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- OP( SET,4 ) BIT8( 1, b1 - 0xb8 ) R8( 2, b0 - 0xf8 ) return; // SET b,g
-
- case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
+ case 0x60: // ADD A,g
+ case 0x61: // ADC A,g
+ case 0x62: // SUB A,g
+ case 0x63: // SBC A,g
+ case 0x64: // AND A,g
+ case 0x65: // XOR A,g
+ case 0x66: // OR A,g
+ case 0x67: // CP A,g
+ OP( ADD+b1-0x60,4 ) R8( 1, A ) R8( 2, b0 - 0xf8 ) return;
+
+ case 0x68: // ADD g,n
+ case 0x69: // ADC g,n
+ case 0x6a: // SUB g,n
+ case 0x6b: // SBC g,n
+ case 0x6c: // AND g,n
+ case 0x6d: // XOR g,n
+ case 0x6e: // OR g,n
+ case 0x6f: // CP g,n
+ OP( ADD+b1-0x68,6 ) R8( 1, b0 - 0xf8 ) I8( 2, READ8(cpustate) ) return;
+
+ case 0x70: // ADD HL,gg
+ case 0x71: // ADC HL,gg
+ case 0x72: // SUB HL,gg
+ case 0x73: // SBC HL,gg
+ case 0x74: // AND HL,gg
+ case 0x75: // XOR HL,gg
+ case 0x76: // OR HL,gg
+ case 0x77: // CP HL,gg
+ OP16( ADD+b1-0x70,8 ) R16( 1, HL ) R16( 2, b0 - 0xf8 ) return;
+
+ case 0xa0: // RLC g
+ case 0xa1: // RRC g
+ case 0xa2: // RL g
+ case 0xa3: // RR g
+ case 0xa4: // SLA g
+ case 0xa5: // SRA g
+ case 0xa6: // SLL g
+ case 0xa7: // SRL g
+ OP( RLC+b1-0xa0,4 ) R8( 1, b0 - 0xf8 ) NONE( 2 ) return;
+
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ OP( TSET,8 ) BIT8( 1, b1 - 0x18 ) R8( 2, b0 - 0xf8 ) return; // TSET b,g
+ case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
+ OP( BIT,4 ) BIT8( 1, b1 - 0xa8 ) R8( 2, b0 - 0xf8 ) return; // BIT b,g
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ OP( RES,4 ) BIT8( 1, b1 - 0xb0 ) R8( 2, b0 - 0xf8 ) return; // RES b,g
+ case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ OP( SET,4 ) BIT8( 1, b1 - 0xb8 ) R8( 2, b0 - 0xf8 ) return; // SET b,g
+
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ case 0xd8: case 0xd9: case 0xda: case 0xdb: case 0xdc: case 0xdd: case 0xde: case 0xdf:
if (b0 == 0xfe) {
- OPCC( RET,6,14 ) CC( 1, b1 - 0xd0 ) NONE( 2 ) return; // RET cc
+ OPCC( RET,6,14 ) CC( 1, b1 - 0xd0 ) NONE( 2 ) return; // RET cc
}
- } break;
+ } break;
case 0xff:
- OP( SWI,20 ) NONE( 1 ) NONE( 2 ) return; // SWI
+ OP( SWI,20 ) NONE( 1 ) NONE( 2 ) return; // SWI
}
- OP( UNKNOWN,2 ) NONE( 1 ) NONE( 2 )
+ OP( UNKNOWN,2 ) NONE( 1 ) NONE( 2 )
}
-static const char *const ir_names[] = {
- "P0", "P1", "P01CR/IRFL", "IRFH", "P2", "P2CR", "P3", "P3CR",
- "P4", "P4CR", "P5", "SMMOD", "P6", "P7", "P67CR", "SMCR",
- "P8", "P8CR", "WDMOD", "WDCR", "TREG0", "TREG1", "TREG2", "TREG3",
- "TCLK", "TFFCR", "TMOD", "TRUN", "CAP1L", "CAP1H", "CAP2L", "CAL2H",
- "TREG4L", "TREG4H", "TREG5L", "TREG5H", "T4MOD", "T4FFCR", "INTEL", "INTEH",
- "DMAEH", "SCMOD", "SCCR", "SCBUF", "BX", "BY", "ADREG", "ADMOD"
+static const char *const ir_names[] = {
+ "P0", "P1", "P01CR/IRFL", "IRFH", "P2", "P2CR", "P3", "P3CR",
+ "P4", "P4CR", "P5", "SMMOD", "P6", "P7", "P67CR", "SMCR",
+ "P8", "P8CR", "WDMOD", "WDCR", "TREG0", "TREG1", "TREG2", "TREG3",
+ "TCLK", "TFFCR", "TMOD", "TRUN", "CAP1L", "CAP1H", "CAP2L", "CAL2H",
+ "TREG4L", "TREG4H", "TREG5L", "TREG5H", "T4MOD", "T4FFCR", "INTEL", "INTEH",
+ "DMAEH", "SCMOD", "SCCR", "SCBUF", "BX", "BY", "ADREG", "ADMOD"
};
static const char *internal_registers_names(UINT16 x)
@@ -977,28 +977,28 @@ static int sprint_arg(char *buffer, UINT32 pc, const char *pre, const e_mode mod
const char *reg_name;
switch ( mode )
{
- case MODE_NONE: return 0;
+ case MODE_NONE: return 0;
- case MODE_BIT8: return sprintf( buffer, "%s%d", pre, r );
- case MODE_I8: return sprintf( buffer, "%s$%02X", pre, r );
- case MODE_D8: return sprintf( buffer, "%s$%04X", pre, (pc+2+(r&0x7f)-(r&0x80))&0xffff );
- case MODE_I16: return sprintf( buffer, "%s$%04X", pre, r );
- case MODE_D16: return sprintf( buffer, "%s$%04X", pre, (pc+2+(r&0x7fff)-(r&0x8000))&0xffff );
+ case MODE_BIT8: return sprintf( buffer, "%s%d", pre, r );
+ case MODE_I8: return sprintf( buffer, "%s$%02X", pre, r );
+ case MODE_D8: return sprintf( buffer, "%s$%04X", pre, (pc+2+(r&0x7f)-(r&0x80))&0xffff );
+ case MODE_I16: return sprintf( buffer, "%s$%04X", pre, r );
+ case MODE_D16: return sprintf( buffer, "%s$%04X", pre, (pc+2+(r&0x7fff)-(r&0x8000))&0xffff );
case MODE_MI16:
reg_name = internal_registers_names(r);
- return (reg_name) ? sprintf( buffer, "%s(%s)", pre, reg_name ):
- sprintf( buffer, "%s($%04X)", pre, r );
- case MODE_R8: return sprintf( buffer, "%s%s", pre, r8_names[r] );
- case MODE_R16: return sprintf( buffer, "%s%s", pre, r16_names[r] );
- case MODE_MR16: return sprintf( buffer, "%s(%s)", pre, r16_names[r] );
+ return (reg_name) ? sprintf( buffer, "%s(%s)", pre, reg_name ):
+ sprintf( buffer, "%s($%04X)", pre, r );
+ case MODE_R8: return sprintf( buffer, "%s%s", pre, r8_names[r] );
+ case MODE_R16: return sprintf( buffer, "%s%s", pre, r16_names[r] );
+ case MODE_MR16: return sprintf( buffer, "%s(%s)", pre, r16_names[r] );
- case MODE_MR16R8: return sprintf( buffer, "%s(%s+%s)", pre, r16_names[r], r8_names[rb] );
- case MODE_MR16D8: return sprintf( buffer, "%s(%s%c$%02X)", pre, r16_names[r], (rb&0x80)?'-':'+', (rb&0x80)?((rb^0xff)+1):rb );
+ case MODE_MR16R8: return sprintf( buffer, "%s(%s+%s)", pre, r16_names[r], r8_names[rb] );
+ case MODE_MR16D8: return sprintf( buffer, "%s(%s%c$%02X)", pre, r16_names[r], (rb&0x80)?'-':'+', (rb&0x80)?((rb^0xff)+1):rb );
- case MODE_CC: return sprintf( buffer, "%s%s", pre, cc_names[r] );
+ case MODE_CC: return sprintf( buffer, "%s%s", pre, cc_names[r] );
- case MODE_R16R8: return sprintf( buffer, "%s%s+%s", pre, r16_names[r], r8_names[rb] );
- case MODE_R16D8: return sprintf( buffer, "%s%s%c$%02X", pre, r16_names[r], (rb&0x80)?'-':'+', (rb&0x80)?((rb^0xff)+1):rb );
+ case MODE_R16R8: return sprintf( buffer, "%s%s+%s", pre, r16_names[r], r8_names[rb] );
+ case MODE_R16D8: return sprintf( buffer, "%s%s%c$%02X", pre, r16_names[r], (rb&0x80)?'-':'+', (rb&0x80)?((rb^0xff)+1):rb );
default:
fatalerror("%04x: unimplemented addr mode = %d\n",pc,mode);
@@ -1017,10 +1017,10 @@ CPU_DISASSEMBLE( t90 )
decode(cpustate);
cpustate->op &= ~OP_16;
- buffer += sprintf ( buffer, "%-5s", op_names[ cpustate->op ] ); // strlen("callr") == 5
- len = sprint_arg ( buffer, pc, " ", cpustate->mode1, cpustate->r1, cpustate->r1b );
- buffer += len;
- buffer += sprint_arg ( buffer, pc, (len>1)?",":"", cpustate->mode2, cpustate->r2, cpustate->r2b );
+ buffer += sprintf ( buffer, "%-5s", op_names[ cpustate->op ] ); // strlen("callr") == 5
+ len = sprint_arg ( buffer, pc, " ", cpustate->mode1, cpustate->r1, cpustate->r1b );
+ buffer += len;
+ buffer += sprint_arg ( buffer, pc, (len>1)?",":"", cpustate->mode2, cpustate->r2, cpustate->r2b );
return (cpustate->addr - pc) | DASMFLAG_SUPPORTED;
}
@@ -1030,13 +1030,13 @@ INLINE UINT16 r8( t90_Regs *cpustate, const e_r r )
{
switch( r )
{
- case A: return cpustate->af.b.h;
- case B: return cpustate->bc.b.h;
- case C: return cpustate->bc.b.l;
- case D: return cpustate->de.b.h;
- case E: return cpustate->de.b.l;
- case H: return cpustate->hl.b.h;
- case L: return cpustate->hl.b.l;
+ case A: return cpustate->af.b.h;
+ case B: return cpustate->bc.b.h;
+ case C: return cpustate->bc.b.l;
+ case D: return cpustate->de.b.h;
+ case E: return cpustate->de.b.l;
+ case H: return cpustate->hl.b.h;
+ case L: return cpustate->hl.b.l;
default:
fatalerror("%04x: unimplemented r8 register index = %d\n",cpustate->pc.w.l,r);
@@ -1047,13 +1047,13 @@ INLINE void w8( t90_Regs *cpustate, const e_r r, UINT16 value )
{
switch( r )
{
- case A: cpustate->af.b.h = value; return;
- case B: cpustate->bc.b.h = value; return;
- case C: cpustate->bc.b.l = value; return;
- case D: cpustate->de.b.h = value; return;
- case E: cpustate->de.b.l = value; return;
- case H: cpustate->hl.b.h = value; return;
- case L: cpustate->hl.b.l = value; return;
+ case A: cpustate->af.b.h = value; return;
+ case B: cpustate->bc.b.h = value; return;
+ case C: cpustate->bc.b.l = value; return;
+ case D: cpustate->de.b.h = value; return;
+ case E: cpustate->de.b.l = value; return;
+ case H: cpustate->hl.b.h = value; return;
+ case L: cpustate->hl.b.l = value; return;
default:
fatalerror("%04x: unimplemented w8 register index = %d\n",cpustate->pc.w.l,r);
@@ -1064,17 +1064,17 @@ INLINE UINT16 r16( t90_Regs *cpustate, const e_r r )
{
switch( r )
{
- case BC: return cpustate->bc.w.l;
- case DE: return cpustate->de.w.l;
- case HL: return cpustate->hl.w.l;
- case IX: return cpustate->ix.w.l;
- case IY: return cpustate->iy.w.l;
- case SP: return cpustate->sp.w.l;
- case AF: return cpustate->af.w.l;
+ case BC: return cpustate->bc.w.l;
+ case DE: return cpustate->de.w.l;
+ case HL: return cpustate->hl.w.l;
+ case IX: return cpustate->ix.w.l;
+ case IY: return cpustate->iy.w.l;
+ case SP: return cpustate->sp.w.l;
+ case AF: return cpustate->af.w.l;
// case AF2: return cpustate->af2.w.l;
// one interrupt flip-flop? Needed by e.g. mjifb
- case AF2: return (cpustate->af2.w.l & (~IF)) | (cpustate->af.w.l & IF);
- case PC: return cpustate->pc.w.l;
+ case AF2: return (cpustate->af2.w.l & (~IF)) | (cpustate->af.w.l & IF);
+ case PC: return cpustate->pc.w.l;
default:
fatalerror("%04x: unimplemented r16 register index = %d\n",cpustate->pc.w.l,r);
@@ -1085,15 +1085,15 @@ INLINE void w16( t90_Regs *cpustate, const e_r r, UINT16 value )
{
switch( r )
{
- case BC: cpustate->bc.w.l = value; return;
- case DE: cpustate->de.w.l = value; return;
- case HL: cpustate->hl.w.l = value; return;
- case IX: cpustate->ix.w.l = value; return;
- case IY: cpustate->iy.w.l = value; return;
- case SP: cpustate->sp.w.l = value; return;
- case AF: cpustate->af.w.l = value; return;
- case AF2: cpustate->af2.w.l = value; return;
- case PC: cpustate->pc.d = value; return;
+ case BC: cpustate->bc.w.l = value; return;
+ case DE: cpustate->de.w.l = value; return;
+ case HL: cpustate->hl.w.l = value; return;
+ case IX: cpustate->ix.w.l = value; return;
+ case IY: cpustate->iy.w.l = value; return;
+ case SP: cpustate->sp.w.l = value; return;
+ case AF: cpustate->af.w.l = value; return;
+ case AF2: cpustate->af2.w.l = value; return;
+ case PC: cpustate->pc.d = value; return;
default:
fatalerror("%04x: unimplemented w16 register index = %d\n",cpustate->pc.w.l,r);
@@ -1102,25 +1102,25 @@ INLINE void w16( t90_Regs *cpustate, const e_r r, UINT16 value )
#define READ_FN( N ) \
-INLINE UINT8 Read##N##_8(t90_Regs *cpustate) { \
- switch ( cpustate->mode##N ) { \
+INLINE UINT8 Read##N##_8(t90_Regs *cpustate) { \
+ switch ( cpustate->mode##N ) { \
case MODE_CC: \
case MODE_BIT8: \
- case MODE_I8: return (UINT8)cpustate->r##N; \
- case MODE_D8: return (UINT8)cpustate->r##N; \
- case MODE_R8: return (UINT8)r8(cpustate, cpustate->r##N); \
- case MODE_MI16: return RM8(cpustate, cpustate->r##N); \
- case MODE_MR16R8: return RM8(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b))); \
+ case MODE_I8: return (UINT8)cpustate->r##N; \
+ case MODE_D8: return (UINT8)cpustate->r##N; \
+ case MODE_R8: return (UINT8)r8(cpustate, cpustate->r##N); \
+ case MODE_MI16: return RM8(cpustate, cpustate->r##N); \
+ case MODE_MR16R8: return RM8(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b))); \
case MODE_MR16: \
switch( cpustate->r##N ) { \
- case IX: return RX8(cpustate, cpustate->ix.w.l,cpustate->ixbase); \
- case IY: return RX8(cpustate, cpustate->iy.w.l,cpustate->iybase); \
+ case IX: return RX8(cpustate, cpustate->ix.w.l,cpustate->ixbase); \
+ case IY: return RX8(cpustate, cpustate->iy.w.l,cpustate->iybase); \
} \
return RM8(cpustate, r16(cpustate, cpustate->r##N)); \
case MODE_MR16D8: \
switch( cpustate->r##N ) { \
- case IX: return RX8(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),cpustate->ixbase); \
- case IY: return RX8(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),cpustate->iybase); \
+ case IX: return RX8(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),cpustate->ixbase); \
+ case IY: return RX8(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),cpustate->iybase); \
} \
return RM8(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b)); \
default: \
@@ -1128,25 +1128,25 @@ INLINE UINT8 Read##N##_8(t90_Regs *cpustate) { \
} \
return 0; \
} \
-INLINE UINT16 Read##N##_16(t90_Regs *cpustate) { \
- switch ( cpustate->mode##N ) { \
- case MODE_I16: return cpustate->r##N; \
- case MODE_D16: return cpustate->r##N - 1; \
- case MODE_R16: return r16(cpustate, cpustate->r##N); \
- case MODE_R16D8: return r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b; \
- case MODE_R16R8: return r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b); \
- case MODE_MI16: return RM16(cpustate, cpustate->r##N); \
- case MODE_MR16R8: return RM16(cpustate,(UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b))); \
+INLINE UINT16 Read##N##_16(t90_Regs *cpustate) { \
+ switch ( cpustate->mode##N ) { \
+ case MODE_I16: return cpustate->r##N; \
+ case MODE_D16: return cpustate->r##N - 1; \
+ case MODE_R16: return r16(cpustate, cpustate->r##N); \
+ case MODE_R16D8: return r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b; \
+ case MODE_R16R8: return r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b); \
+ case MODE_MI16: return RM16(cpustate, cpustate->r##N); \
+ case MODE_MR16R8: return RM16(cpustate,(UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b))); \
case MODE_MR16: \
switch( cpustate->r##N ) { \
- case IX: return RX16(cpustate, cpustate->ix.w.l,cpustate->ixbase); \
- case IY: return RX16(cpustate, cpustate->iy.w.l,cpustate->iybase); \
+ case IX: return RX16(cpustate, cpustate->ix.w.l,cpustate->ixbase); \
+ case IY: return RX16(cpustate, cpustate->iy.w.l,cpustate->iybase); \
} \
return RM16(cpustate,r16(cpustate, cpustate->r##N)); \
case MODE_MR16D8: \
switch( cpustate->r##N ) { \
- case IX: return RX16(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),cpustate->ixbase); \
- case IY: return RX16(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),cpustate->iybase); \
+ case IX: return RX16(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),cpustate->ixbase); \
+ case IY: return RX16(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),cpustate->iybase); \
} \
return RM16(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b)); \
default: \
@@ -1158,45 +1158,45 @@ INLINE UINT16 Read##N##_16(t90_Regs *cpustate) { \
#define WRITE_FN( N ) \
-INLINE void Write##N##_8( t90_Regs *cpustate, UINT8 value ) { \
- switch ( cpustate->mode##N ) { \
- case MODE_R8: w8(cpustate, cpustate->r##N,value); return; \
- case MODE_MI16: WM8(cpustate, cpustate->r##N, value); return; \
- case MODE_MR16R8: WM8(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b)), value); return; \
+INLINE void Write##N##_8( t90_Regs *cpustate, UINT8 value ) { \
+ switch ( cpustate->mode##N ) { \
+ case MODE_R8: w8(cpustate, cpustate->r##N,value); return; \
+ case MODE_MI16: WM8(cpustate, cpustate->r##N, value); return; \
+ case MODE_MR16R8: WM8(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b)), value); return; \
case MODE_MR16: \
switch( cpustate->r##N ) { \
- case IX: WX8(cpustate, cpustate->ix.w.l,value,cpustate->ixbase); return; \
- case IY: WX8(cpustate, cpustate->iy.w.l,value,cpustate->iybase); return; \
+ case IX: WX8(cpustate, cpustate->ix.w.l,value,cpustate->ixbase); return; \
+ case IY: WX8(cpustate, cpustate->iy.w.l,value,cpustate->iybase); return; \
} \
- WM8(cpustate, r16(cpustate, cpustate->r##N), value); return; \
+ WM8(cpustate, r16(cpustate, cpustate->r##N), value); return; \
case MODE_MR16D8: \
switch( cpustate->r##N ) { \
- case IX: WX8(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),value,cpustate->ixbase); return; \
- case IY: WX8(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),value,cpustate->iybase); return; \
+ case IX: WX8(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),value,cpustate->ixbase); return; \
+ case IY: WX8(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),value,cpustate->iybase); return; \
} \
- WM8(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b), value); return; \
+ WM8(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b), value); return; \
default: \
fatalerror("%04x: unimplemented Write%d_8 mode = %d\n",cpustate->pc.w.l,N,cpustate->mode##N); \
} \
} \
INLINE void Write##N##_16( t90_Regs *cpustate, UINT16 value ) \
{ \
- switch ( cpustate->mode##N ) { \
- case MODE_R16: w16(cpustate, cpustate->r##N,value); return; \
- case MODE_MI16: WM16(cpustate, cpustate->r##N, value); return; \
- case MODE_MR16R8: WM16(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b)), value); return; \
+ switch ( cpustate->mode##N ) { \
+ case MODE_R16: w16(cpustate, cpustate->r##N,value); return; \
+ case MODE_MI16: WM16(cpustate, cpustate->r##N, value); return; \
+ case MODE_MR16R8: WM16(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)r8(cpustate, cpustate->r##N##b)), value); return; \
case MODE_MR16: \
switch( cpustate->r##N ) { \
- case IX: WX16(cpustate, cpustate->ix.w.l,value,cpustate->ixbase); return; \
- case IY: WX16(cpustate, cpustate->iy.w.l,value,cpustate->iybase); return; \
+ case IX: WX16(cpustate, cpustate->ix.w.l,value,cpustate->ixbase); return; \
+ case IY: WX16(cpustate, cpustate->iy.w.l,value,cpustate->iybase); return; \
} \
- WM16(cpustate, r16(cpustate, cpustate->r##N), value); return; \
+ WM16(cpustate, r16(cpustate, cpustate->r##N), value); return; \
case MODE_MR16D8: \
switch( cpustate->r##N ) { \
- case IX: WX16(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),value,cpustate->ixbase); return; \
- case IY: WX16(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),value,cpustate->iybase); return; \
+ case IX: WX16(cpustate, (UINT16)(cpustate->ix.w.l + (INT8)cpustate->r##N##b),value,cpustate->ixbase); return; \
+ case IY: WX16(cpustate, (UINT16)(cpustate->iy.w.l + (INT8)cpustate->r##N##b),value,cpustate->iybase); return; \
} \
- WM16(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b), value); return; \
+ WM16(cpustate, (UINT16)(r16(cpustate, cpustate->r##N) + (INT8)cpustate->r##N##b), value); return; \
default: \
fatalerror("%04x: unimplemented Write%d_16 mode = %d\n",cpustate->pc.w.l,N,cpustate->mode##N); \
} \
@@ -1212,22 +1212,22 @@ INLINE int Test( t90_Regs *cpustate, UINT8 cond )
int s,v;
switch ( cond )
{
- case FLS: return 0;
- case LT: s = F & SF; v = F & VF; return (s && !v) || (!s && v);
- case LE: s = F & SF; v = F & VF; return (F & ZF) || (s && !v) || (!s && v);
- case ULE: return (F & CF) || (F & ZF);
- case OV: return F & VF;
- case MI: return F & SF;
- case Z: return F & ZF;
- case CR: return F & CF;
- case T: return 1;
- case GE: s = F & SF; v = F & VF; return (s && v) || (!s && !v);
- case GT: s = F & SF; v = F & VF; return !((F & ZF) || (s && !v) || (!s && v));
- case UGT: return !(F & CF) && !(F & ZF);
- case NOV: return !(F & VF);
- case PL: return !(F & SF);
- case NZ: return !(F & ZF);
- case NC: return !(F & CF);
+ case FLS: return 0;
+ case LT: s = F & SF; v = F & VF; return (s && !v) || (!s && v);
+ case LE: s = F & SF; v = F & VF; return (F & ZF) || (s && !v) || (!s && v);
+ case ULE: return (F & CF) || (F & ZF);
+ case OV: return F & VF;
+ case MI: return F & SF;
+ case Z: return F & ZF;
+ case CR: return F & CF;
+ case T: return 1;
+ case GE: s = F & SF; v = F & VF; return (s && v) || (!s && !v);
+ case GT: s = F & SF; v = F & VF; return !((F & ZF) || (s && !v) || (!s && v));
+ case UGT: return !(F & CF) && !(F & ZF);
+ case NOV: return !(F & VF);
+ case PL: return !(F & SF);
+ case NZ: return !(F & ZF);
+ case NC: return !(F & CF);
default:
fatalerror("%04x: unimplemented condition = %d\n",cpustate->pc.w.l,cond);
}
@@ -1280,7 +1280,7 @@ INT2 P82 Rising Edge -
*************************************************************************************************************/
-enum e_irq { INTSWI = 0, INTNMI, INTWD, INT0, INTT0, INTT1, INTT2, INTT3, INTT4, INT1, INTT5, INT2, INTRX, INTTX, INTMAX };
+enum e_irq { INTSWI = 0, INTNMI, INTWD, INT0, INTT0, INTT1, INTT2, INTT3, INTT4, INT1, INTT5, INT2, INTRX, INTTX, INTMAX };
DECLARE_ENUM_OPERATORS(e_irq)
INLINE void leave_halt(t90_Regs *cpustate)
@@ -1340,8 +1340,8 @@ static void set_irq_line(t90_Regs *cpustate, int irq, int state)
}
}
-INLINE void Cyc(t90_Regs *cpustate) { cpustate->icount -= cpustate->cyc_t; }
-INLINE void Cyc_f(t90_Regs *cpustate) { cpustate->icount -= cpustate->cyc_f; }
+INLINE void Cyc(t90_Regs *cpustate) { cpustate->icount -= cpustate->cyc_t; }
+INLINE void Cyc_f(t90_Regs *cpustate) { cpustate->icount -= cpustate->cyc_f; }
static CPU_EXECUTE( t90 )
{
@@ -1378,9 +1378,9 @@ static CPU_EXECUTE( t90 )
Cyc(cpustate);
break;
case EXX:
- tmp = cpustate->bc; cpustate->bc = cpustate->bc2; cpustate->bc2 = tmp;
- tmp = cpustate->de; cpustate->de = cpustate->de2; cpustate->de2 = tmp;
- tmp = cpustate->hl; cpustate->hl = cpustate->hl2; cpustate->hl2 = tmp;
+ tmp = cpustate->bc; cpustate->bc = cpustate->bc2; cpustate->bc2 = tmp;
+ tmp = cpustate->de; cpustate->de = cpustate->de2; cpustate->de2 = tmp;
+ tmp = cpustate->hl; cpustate->hl = cpustate->hl2; cpustate->hl2 = tmp;
Cyc(cpustate);
break;
@@ -1399,13 +1399,13 @@ static CPU_EXECUTE( t90 )
// break;
case LDI:
-#define _LDI \
- WM8( cpustate, cpustate->de.w.l, RM8(cpustate, cpustate->hl.w.l) ); \
- cpustate->de.w.l++; \
- cpustate->hl.w.l++; \
- cpustate->bc.w.l--; \
- F &= SF | ZF | IF | XCF | CF; \
- if ( cpustate->bc.w.l ) F |= VF;
+#define _LDI \
+ WM8( cpustate, cpustate->de.w.l, RM8(cpustate, cpustate->hl.w.l) ); \
+ cpustate->de.w.l++; \
+ cpustate->hl.w.l++; \
+ cpustate->bc.w.l--; \
+ F &= SF | ZF | IF | XCF | CF; \
+ if ( cpustate->bc.w.l ) F |= VF;
_LDI
Cyc(cpustate);
@@ -1417,17 +1417,17 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l -= 2;
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case LDD:
-#define _LDD \
- WM8( cpustate, cpustate->de.w.l, RM8(cpustate, cpustate->hl.w.l) ); \
- cpustate->de.w.l--; \
- cpustate->hl.w.l--; \
- cpustate->bc.w.l--; \
- F &= SF | ZF | IF | XCF | CF; \
- if ( cpustate->bc.w.l ) F |= VF;
+#define _LDD \
+ WM8( cpustate, cpustate->de.w.l, RM8(cpustate, cpustate->hl.w.l) ); \
+ cpustate->de.w.l--; \
+ cpustate->hl.w.l--; \
+ cpustate->bc.w.l--; \
+ F &= SF | ZF | IF | XCF | CF; \
+ if ( cpustate->bc.w.l ) F |= VF;
_LDD
Cyc(cpustate);
@@ -1439,7 +1439,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l -= 2;
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
@@ -1470,7 +1470,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l -= 2;
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case PUSH:
@@ -1488,7 +1488,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l = Read2_16(cpustate);
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case JR:
if ( Test( cpustate, Read1_8(cpustate) ) )
@@ -1496,7 +1496,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l += /*2 +*/ (INT8)Read2_8(cpustate);
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case JR | OP_16:
if ( Test( cpustate, Read1_8(cpustate) ) )
@@ -1504,7 +1504,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l += /*2 +*/ Read2_16(cpustate);
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
@@ -1515,7 +1515,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l = Read2_16(cpustate);
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case CALLR:
Push( cpustate, PC );
@@ -1529,7 +1529,7 @@ static CPU_EXECUTE( t90 )
Pop( cpustate, PC );
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case RETI:
Pop( cpustate, AF );
@@ -1591,7 +1591,7 @@ static CPU_EXECUTE( t90 )
F = SZP[A] | (F & (IF | NF));
if (cf || (lo <= 9 ? hi >= 10 : hi >= 9)) F |= XCF | CF;
- if (nf ? hf && lo <= 5 : lo >= 10) F |= HF;
+ if (nf ? hf && lo <= 5 : lo >= 10) F |= HF;
}
Cyc(cpustate);
break;
@@ -1607,9 +1607,9 @@ static CPU_EXECUTE( t90 )
b8 = cpustate->af.b.h;
a32 = a8 - b8;
F = (F & IF) | SZ[(UINT8)a32] | NF;
- if (a32 & 0x100) F |= CF | XCF; //X?
- if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
- if ((b8 ^ a8) & (a8 ^ a32) & 0x80) F |= VF;
+ if (a32 & 0x100) F |= CF | XCF; //X?
+ if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
+ if ((b8 ^ a8) & (a8 ^ a32) & 0x80) F |= VF;
cpustate->af.b.h = a32;
Cyc(cpustate);
break;
@@ -1652,7 +1652,7 @@ static CPU_EXECUTE( t90 )
a8 = Read1_8(cpustate) + 1;
Write1_8( cpustate, a8 );
F = (F & (IF | CF)) | SZHV_inc[a8];
- if (a8 == 0) F |= XCF;
+ if (a8 == 0) F |= XCF;
Cyc(cpustate);
break;
case INCX:
@@ -1661,16 +1661,16 @@ static CPU_EXECUTE( t90 )
a8 = Read1_8(cpustate) + 1;
Write1_8( cpustate, a8 );
F = (F & (IF | CF)) | SZHV_inc[a8];
- if (a8 == 0) F |= XCF;
+ if (a8 == 0) F |= XCF;
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case INC | OP_16:
a16 = Read1_16(cpustate) + 1;
Write1_16( cpustate, a16 );
- if (a16 == 0) F |= XCF;
- else F &= ~XCF;
+ if (a16 == 0) F |= XCF;
+ else F &= ~XCF;
Cyc(cpustate);
break;
case INCW:
@@ -1678,10 +1678,10 @@ static CPU_EXECUTE( t90 )
a32 = a16 + 1;
Write1_16( cpustate, a32 );
F &= IF | CF;
- if ((UINT16)a32 == 0) F |= ZF | XCF;
- if (a32 & 0x8000) F |= SF;
- if ((a16 ^ 0x8000) & a32 & 0x8000) F |= VF;
- if ((a16 ^ a32 ^ 1) & 0x1000) F |= HF; //??
+ if ((UINT16)a32 == 0) F |= ZF | XCF;
+ if (a32 & 0x8000) F |= SF;
+ if ((a16 ^ 0x8000) & a32 & 0x8000) F |= VF;
+ if ((a16 ^ a32 ^ 1) & 0x1000) F |= HF; //??
Cyc(cpustate);
break;
@@ -1690,7 +1690,7 @@ static CPU_EXECUTE( t90 )
a8 = Read1_8(cpustate) - 1;
Write1_8( cpustate, a8 );
F = (F & (IF | CF)) | SZHV_dec[a8];
- if (a8 == 0) F |= XCF;
+ if (a8 == 0) F |= XCF;
Cyc(cpustate);
break;
case DECX:
@@ -1699,16 +1699,16 @@ static CPU_EXECUTE( t90 )
a8 = Read1_8(cpustate) - 1;
Write1_8( cpustate, a8 );
F = (F & (IF | CF)) | SZHV_dec[a8];
- if (a8 == 0) F |= XCF;
+ if (a8 == 0) F |= XCF;
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case DEC | OP_16:
a16 = Read1_16(cpustate) - 1;
Write1_16( cpustate, a16 );
- if (a16 == 0) F |= XCF;
- else F &= ~XCF;
+ if (a16 == 0) F |= XCF;
+ else F &= ~XCF;
Cyc(cpustate);
break;
case DECW:
@@ -1716,10 +1716,10 @@ static CPU_EXECUTE( t90 )
a32 = a16 - 1;
Write1_16( cpustate, a32 );
F = (F & (IF | CF)) | NF;
- if ((UINT16)a32 == 0) F |= ZF | XCF;
- if (a32 & 0x8000) F |= SF;
- if (a16 == 0x8000) F |= VF;
- if ((a16 ^ a32 ^ 1) & 0x1000) F |= HF; //??
+ if ((UINT16)a32 == 0) F |= ZF | XCF;
+ if (a32 & 0x8000) F |= SF;
+ if (a16 == 0x8000) F |= VF;
+ if ((a16 ^ a32 ^ 1) & 0x1000) F |= HF; //??
Cyc(cpustate);
break;
@@ -1728,12 +1728,12 @@ static CPU_EXECUTE( t90 )
a8 = Read1_8(cpustate);
b8 = Read2_8(cpustate);
a32 = a8 + b8;
- if ( (cpustate->op == ADC) && (F & CF) ) a32 += 1;
+ if ( (cpustate->op == ADC) && (F & CF) ) a32 += 1;
Write1_8( cpustate, a32 );
F = (F & IF) | SZ[(UINT8)a32];
- if (a32 & 0x100) F |= CF | XCF; //X?
- if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
- if ((b8 ^ a8 ^ 0x80) & (b8 ^ a32) & 0x80) F |= VF;
+ if (a32 & 0x100) F |= CF | XCF; //X?
+ if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
+ if ((b8 ^ a8 ^ 0x80) & (b8 ^ a32) & 0x80) F |= VF;
Cyc(cpustate);
break;
case ADD | OP_16:
@@ -1741,7 +1741,7 @@ static CPU_EXECUTE( t90 )
a16 = Read1_16(cpustate);
b16 = Read2_16(cpustate);
a32 = a16 + b16;
- if ( (cpustate->op == (ADC | OP_16)) && (F & CF) ) a32 += 1;
+ if ( (cpustate->op == (ADC | OP_16)) && (F & CF) ) a32 += 1;
Write1_16( cpustate, a32 );
if ( (cpustate->op == (ADD | OP_16)) && cpustate->mode2 == MODE_R16 )
{
@@ -1750,12 +1750,12 @@ static CPU_EXECUTE( t90 )
else
{
F &= IF;
- if ((UINT16)a32 == 0) F |= ZF;
- if (a32 & 0x8000) F |= SF;
- if ((b16 ^ a16 ^ 0x8000) & (b16 ^ a32) & 0x8000) F |= VF;
+ if ((UINT16)a32 == 0) F |= ZF;
+ if (a32 & 0x8000) F |= SF;
+ if ((b16 ^ a16 ^ 0x8000) & (b16 ^ a32) & 0x8000) F |= VF;
}
- if (a32 & 0x10000) F |= CF | XCF; //X?
- if ((a16 ^ a32 ^ b16) & 0x1000) F |= HF; //??
+ if (a32 & 0x10000) F |= CF | XCF; //X?
+ if ((a16 ^ a32 ^ b16) & 0x1000) F |= HF; //??
Cyc(cpustate);
break;
@@ -1765,11 +1765,11 @@ static CPU_EXECUTE( t90 )
a8 = Read1_8(cpustate);
b8 = Read2_8(cpustate);
a32 = a8 - b8;
- if ( (cpustate->op == SBC) && (F & CF) ) a32 -= 1;
+ if ( (cpustate->op == SBC) && (F & CF) ) a32 -= 1;
F = (F & IF) | SZ[(UINT8)a32] | NF;
- if (a32 & 0x100) F |= CF | XCF; //X?
- if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
- if ((b8 ^ a8) & (a8 ^ a32) & 0x80) F |= VF;
+ if (a32 & 0x100) F |= CF | XCF; //X?
+ if ((a8 ^ a32 ^ b8) & 0x10) F |= HF;
+ if ((b8 ^ a8) & (a8 ^ a32) & 0x80) F |= VF;
if (cpustate->op != CP)
Write1_8( cpustate, a32 );
Cyc(cpustate);
@@ -1780,13 +1780,13 @@ static CPU_EXECUTE( t90 )
a16 = Read1_16(cpustate);
b16 = Read2_16(cpustate);
a32 = a16 - b16;
- if ( (cpustate->op == (SBC | OP_16)) && (F & CF) ) a32 -= 1;
+ if ( (cpustate->op == (SBC | OP_16)) && (F & CF) ) a32 -= 1;
F = (F & IF) | NF;
- if ((UINT16)a32 == 0) F |= ZF;
- if (a32 & 0x8000) F |= SF;
- if (a32 & 0x10000) F |= CF | XCF; //X?
- if ((a16 ^ a32 ^ b16) & 0x1000) F |= HF; //??
- if ((b16 ^ a16) & (a16 ^ a32) & 0x8000) F |= VF;
+ if ((UINT16)a32 == 0) F |= ZF;
+ if (a32 & 0x8000) F |= SF;
+ if (a32 & 0x10000) F |= CF | XCF; //X?
+ if ((a16 ^ a32 ^ b16) & 0x1000) F |= HF; //??
+ if ((b16 ^ a16) & (a16 ^ a32) & 0x8000) F |= VF;
if (cpustate->op != (CP | OP_16))
Write1_16( cpustate, a32 );
Cyc(cpustate);
@@ -1802,8 +1802,8 @@ static CPU_EXECUTE( t90 )
a16 = Read1_16(cpustate) & Read2_16(cpustate);
Write1_16( cpustate, a16 );
F = (F & IF) | HF;
- if (a16 == 0) F |= ZF;
- if (a16 & 0x8000) F |= SF;
+ if (a16 == 0) F |= ZF;
+ if (a16 & 0x8000) F |= SF;
Cyc(cpustate);
break;
case XOR:
@@ -1816,8 +1816,8 @@ static CPU_EXECUTE( t90 )
a16 = Read1_16(cpustate) ^ Read2_16(cpustate);
Write1_16( cpustate, a16 );
F &= IF;
- if (a16 == 0) F |= ZF;
- if (a16 & 0x8000) F |= SF;
+ if (a16 == 0) F |= ZF;
+ if (a16 & 0x8000) F |= SF;
Cyc(cpustate);
break;
case OR:
@@ -1830,8 +1830,8 @@ static CPU_EXECUTE( t90 )
a16 = Read1_16(cpustate) | Read2_16(cpustate);
Write1_16( cpustate, a16 );
F &= IF;
- if (a16 == 0) F |= ZF;
- if (a16 & 0x8000) F |= SF;
+ if (a16 == 0) F |= ZF;
+ if (a16 & 0x8000) F |= SF;
Cyc(cpustate);
break;
@@ -1839,40 +1839,40 @@ static CPU_EXECUTE( t90 )
a8 = Read1_8(cpustate);
a8 = (a8 << 1) | (a8 >> 7);
Write1_8( cpustate, a8 );
- if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
- else F = (F & IF) | SZP[a8];
- if (a8 & 0x01) F |= CF | XCF; // X?
+ if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
+ else F = (F & IF) | SZP[a8];
+ if (a8 & 0x01) F |= CF | XCF; // X?
Cyc(cpustate);
break;
case RRC:
a8 = Read1_8(cpustate);
a8 = (a8 >> 1) | (a8 << 7);
Write1_8( cpustate, a8 );
- if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
- else F = (F & IF) | SZP[a8];
- if (a8 & 0x80) F |= CF | XCF; // X?
+ if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
+ else F = (F & IF) | SZP[a8];
+ if (a8 & 0x80) F |= CF | XCF; // X?
Cyc(cpustate);
break;
case RL:
a8 = Read1_8(cpustate);
b8 = a8 & 0x80;
a8 <<= 1;
- if (F & CF) a8 |= 0x01;
+ if (F & CF) a8 |= 0x01;
Write1_8( cpustate, a8 );
- if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
- else F = (F & IF) | SZP[a8];
- if (b8) F |= CF | XCF; // X?
+ if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
+ else F = (F & IF) | SZP[a8];
+ if (b8) F |= CF | XCF; // X?
Cyc(cpustate);
break;
case RR:
a8 = Read1_8(cpustate);
b8 = a8 & 0x01;
a8 >>= 1;
- if (F & CF) a8 |= 0x80;
+ if (F & CF) a8 |= 0x80;
Write1_8( cpustate, a8 );
- if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
- else F = (F & IF) | SZP[a8];
- if (b8) F |= CF | XCF; // X?
+ if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
+ else F = (F & IF) | SZP[a8];
+ if (b8) F |= CF | XCF; // X?
Cyc(cpustate);
break;
@@ -1882,9 +1882,9 @@ static CPU_EXECUTE( t90 )
b8 = a8 & 0x80;
a8 <<= 1;
Write1_8( cpustate, a8 );
- if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
- else F = (F & IF) | SZP[a8];
- if (b8) F |= CF | XCF; // X?
+ if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
+ else F = (F & IF) | SZP[a8];
+ if (b8) F |= CF | XCF; // X?
Cyc(cpustate);
break;
case SRA:
@@ -1892,9 +1892,9 @@ static CPU_EXECUTE( t90 )
b8 = a8 & 0x01;
a8 = (a8 & 0x80) | (a8 >> 1);
Write1_8( cpustate, a8 );
- if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
- else F = (F & IF) | SZP[a8];
- if (b8) F |= CF | XCF; // X?
+ if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
+ else F = (F & IF) | SZP[a8];
+ if (b8) F |= CF | XCF; // X?
Cyc(cpustate);
break;
case SRL:
@@ -1902,9 +1902,9 @@ static CPU_EXECUTE( t90 )
b8 = a8 & 0x01;
a8 >>= 1;
Write1_8( cpustate, a8 );
- if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
- else F = (F & IF) | SZP[a8];
- if (b8) F |= CF | XCF; // X?
+ if ( cpustate->mode1 == MODE_R8 && cpustate->r1 == A ) F &= SF | ZF | IF | PF;
+ else F = (F & IF) | SZP[a8];
+ if (b8) F |= CF | XCF; // X?
Cyc(cpustate);
break;
case RLD:
@@ -1932,7 +1932,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l += /*2 +*/ (INT8)Read1_8(cpustate);
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case DJNZ | OP_16:
if ( --cpustate->bc.w.l )
@@ -1940,7 +1940,7 @@ static CPU_EXECUTE( t90 )
cpustate->pc.w.l += /*2 +*/ (INT8)Read2_8(cpustate);
Cyc(cpustate);
}
- else Cyc_f(cpustate);
+ else Cyc_f(cpustate);
break;
case MUL:
@@ -1959,8 +1959,8 @@ static CPU_EXECUTE( t90 )
{
cpustate->hl.b.h = a16 % b16;
a16 /= b16;
- if (a16 > 0xff) F |= VF;
- else F &= ~VF;
+ if (a16 > 0xff) F |= VF;
+ else F &= ~VF;
cpustate->hl.b.l = a16;
}
Cyc(cpustate);
@@ -2285,15 +2285,15 @@ static READ8_HANDLER( t90_internal_registers_r )
{
t90_Regs *cpustate = get_safe_token(&space.device());
- #define RIO cpustate->io->read_byte( T90_IOBASE+offset )
+ #define RIO cpustate->io->read_byte( T90_IOBASE+offset )
UINT8 data = cpustate->internal_registers[offset];
switch ( T90_IOBASE + offset )
{
- case T90_P3: // 7,4,1,0
+ case T90_P3: // 7,4,1,0
return (data & 0x6c) | (RIO & 0x93);
- case T90_P4: // only output
+ case T90_P4: // only output
return data & 0x0f;
case T90_P5:
@@ -2303,7 +2303,7 @@ static READ8_HANDLER( t90_internal_registers_r )
case T90_P7:
return (data & 0xf0) | (RIO & 0x0f);
- case T90_P8: // 2,1,0
+ case T90_P8: // 2,1,0
return (data & 0x08) | (RIO & 0x07);
case T90_BX:
@@ -2343,13 +2343,13 @@ static void t90_start_timer(t90_Regs *cpustate, int i)
switch((cpustate->internal_registers[ T90_TCLK - T90_IOBASE ] >> (i * 2)) & 0x03)
{
- case 0: if (i & 1) logerror("%04X: CPU Timer %d clocked by Timer %d match signal\n", cpustate->pc.w.l, i,i-1);
- else logerror("%04X: CPU Timer %d, unsupported TCLK = 0\n", cpustate->pc.w.l, i);
+ case 0: if (i & 1) logerror("%04X: CPU Timer %d clocked by Timer %d match signal\n", cpustate->pc.w.l, i,i-1);
+ else logerror("%04X: CPU Timer %d, unsupported TCLK = 0\n", cpustate->pc.w.l, i);
return;
- case 2: prescaler = 16; break;
- case 3: prescaler = 256; break;
+ case 2: prescaler = 16; break;
+ case 3: prescaler = 256; break;
default:
- case 1: prescaler = 1; break;
+ case 1: prescaler = 1; break;
}
@@ -2369,9 +2369,9 @@ static void t90_start_timer4(t90_Regs *cpustate)
switch(cpustate->internal_registers[ T90_T4MOD - T90_IOBASE ] & 0x03)
{
- case 1: prescaler = 1; break;
- case 2: prescaler = 16; break;
- default: logerror("%04X: CPU Timer 4, unsupported T4MOD = %d\n", cpustate->pc.w.l,cpustate->internal_registers[ T90_T4MOD - T90_IOBASE ] & 0x03);
+ case 1: prescaler = 1; break;
+ case 2: prescaler = 16; break;
+ default: logerror("%04X: CPU Timer 4, unsupported T4MOD = %d\n", cpustate->pc.w.l,cpustate->internal_registers[ T90_T4MOD - T90_IOBASE ] & 0x03);
return;
}
@@ -2441,7 +2441,7 @@ static TIMER_CALLBACK( t90_timer_callback )
case 0:
case 2:
if ( !is16bit )
- if ( (cpustate->internal_registers[ T90_TCLK - T90_IOBASE ] & (0x03 << (i * 2 + 2))) == 0 ) // T0/T1 match signal clocks T1/T3
+ if ( (cpustate->internal_registers[ T90_TCLK - T90_IOBASE ] & (0x03 << (i * 2 + 2))) == 0 ) // T0/T1 match signal clocks T1/T3
t90_timer_callback(machine, cpustate, i+1);
break;
}
@@ -2457,7 +2457,7 @@ static TIMER_CALLBACK( t90_timer_callback )
{
case 0:
case 2:
- if ( is16bit ) // T0/T1 overflow signal clocks T1/T3
+ if ( is16bit ) // T0/T1 overflow signal clocks T1/T3
t90_timer_callback(machine, cpustate, i+1);
break;
}
@@ -2496,7 +2496,7 @@ static TIMER_CALLBACK( t90_timer4_callback )
static WRITE8_HANDLER( t90_internal_registers_w )
{
- #define WIO cpustate->io->write_byte( T90_IOBASE+offset, data )
+ #define WIO cpustate->io->write_byte( T90_IOBASE+offset, data )
t90_Regs *cpustate = get_safe_token(&space.device());
UINT8 out_mask;
@@ -2509,32 +2509,32 @@ static WRITE8_HANDLER( t90_internal_registers_w )
// Timers 0-3
for (i = 0; i < 4; i++)
{
- if ( (old ^ data) & (0x20 | (1 << i)) ) // if timer bit or prescaler bit changed
+ if ( (old ^ data) & (0x20 | (1 << i)) ) // if timer bit or prescaler bit changed
{
- if ( data == (0x20 | (1 << i)) ) t90_start_timer(cpustate, i);
- else t90_stop_timer(cpustate, i);
+ if ( data == (0x20 | (1 << i)) ) t90_start_timer(cpustate, i);
+ else t90_stop_timer(cpustate, i);
}
}
// Timer 4
if ( (old ^ data) & (0x20 | 0x10) )
{
- if ( data == (0x20 | 0x10) ) t90_start_timer4(cpustate);
- else t90_stop_timer4(cpustate);
+ if ( data == (0x20 | 0x10) ) t90_start_timer4(cpustate);
+ else t90_stop_timer4(cpustate);
}
break;
}
case T90_INTEL:
- cpustate->irq_mask &= ~( (1 << INTT2 ) |
+ cpustate->irq_mask &= ~( (1 << INTT2 ) |
(1 << INTT3 ) |
(1 << INTT4 ) |
(1 << INT1 ) |
(1 << INTT5 ) |
(1 << INT2 ) |
(1 << INTRX ) |
- (1 << INTTX ) );
+ (1 << INTTX ) );
- cpustate->irq_mask |= ((data & 0x80) ? (1 << INTT2 ) : 0) |
+ cpustate->irq_mask |= ((data & 0x80) ? (1 << INTT2 ) : 0) |
((data & 0x40) ? (1 << INTT3 ) : 0) |
((data & 0x20) ? (1 << INTT4 ) : 0) |
((data & 0x10) ? (1 << INT1 ) : 0) |
@@ -2545,11 +2545,11 @@ static WRITE8_HANDLER( t90_internal_registers_w )
break;
case T90_INTEH:
- cpustate->irq_mask &= ~( (1 << INT0 ) |
+ cpustate->irq_mask &= ~( (1 << INT0 ) |
(1 << INTT0) |
- (1 << INTT1) );
+ (1 << INTT1) );
- cpustate->irq_mask |= ((data & 0x04) ? (1 << INT0 ) : 0) |
+ cpustate->irq_mask |= ((data & 0x04) ? (1 << INT0 ) : 0) |
((data & 0x02) ? (1 << INTT0) : 0) |
((data & 0x01) ? (1 << INTT1) : 0) ;
break;
@@ -2732,25 +2732,25 @@ static CPU_INIT( t90 )
}
static ADDRESS_MAP_START(tmp90840_mem, AS_PROGRAM, 8, legacy_cpu_device)
- AM_RANGE( 0x0000, 0x1fff ) AM_ROM // 8KB ROM (internal)
- AM_RANGE( 0xfec0, 0xffc0 ) AM_RAM // 256b RAM (internal)
- AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
+ AM_RANGE( 0x0000, 0x1fff ) AM_ROM // 8KB ROM (internal)
+ AM_RANGE( 0xfec0, 0xffc0 ) AM_RAM // 256b RAM (internal)
+ AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
ADDRESS_MAP_END
static ADDRESS_MAP_START(tmp90841_mem, AS_PROGRAM, 8, legacy_cpu_device)
// AM_RANGE( 0x0000, 0x1fff ) AM_ROM // rom-less
- AM_RANGE( 0xfec0, 0xffc0 ) AM_RAM // 256b RAM (internal)
- AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
+ AM_RANGE( 0xfec0, 0xffc0 ) AM_RAM // 256b RAM (internal)
+ AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
ADDRESS_MAP_END
static ADDRESS_MAP_START(tmp91640_mem, AS_PROGRAM, 8, legacy_cpu_device )
- AM_RANGE( 0x0000, 0x3fff ) AM_ROM // 16KB ROM (internal)
- AM_RANGE( 0xfdc0, 0xffc0 ) AM_RAM // 512b RAM (internal)
- AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
+ AM_RANGE( 0x0000, 0x3fff ) AM_ROM // 16KB ROM (internal)
+ AM_RANGE( 0xfdc0, 0xffc0 ) AM_RAM // 512b RAM (internal)
+ AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
ADDRESS_MAP_END
static ADDRESS_MAP_START(tmp91641_mem, AS_PROGRAM, 8, legacy_cpu_device )
// AM_RANGE( 0x0000, 0x3fff ) AM_ROM // rom-less
- AM_RANGE( 0xfdc0, 0xffc0 ) AM_RAM // 512b RAM (internal)
- AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
+ AM_RANGE( 0xfdc0, 0xffc0 ) AM_RAM // 512b RAM (internal)
+ AM_RANGE( T90_IOBASE, T90_IOBASE+47 ) AM_READWRITE_LEGACY( t90_internal_registers_r, t90_internal_registers_w )
ADDRESS_MAP_END
static CPU_SET_INFO( t90 )
@@ -2761,28 +2761,28 @@ static CPU_SET_INFO( t90 )
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INTNMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: set_irq_line(cpustate, INT0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ1: set_irq_line(cpustate, INT1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ2: set_irq_line(cpustate, INT2, info->i); break;
-
- case CPUINFO_INT_PC: cpustate->pc.d = info->i; break;
- case CPUINFO_INT_REGISTER + T90_PC: cpustate->pc.w.l = info->i; break;
- case CPUINFO_INT_SP: cpustate->sp.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_SP: cpustate->sp.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_A: cpustate->af.b.h = info->i; break;
- case CPUINFO_INT_REGISTER + T90_B: cpustate->bc.b.h = info->i; break;
- case CPUINFO_INT_REGISTER + T90_C: cpustate->bc.b.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_D: cpustate->de.b.h = info->i; break;
- case CPUINFO_INT_REGISTER + T90_E: cpustate->de.b.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_H: cpustate->hl.b.h = info->i; break;
- case CPUINFO_INT_REGISTER + T90_L: cpustate->hl.b.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_AF: cpustate->af.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_BC: cpustate->bc.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_DE: cpustate->de.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_HL: cpustate->hl.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_IX: cpustate->ix.w.l = info->i; break;
- case CPUINFO_INT_REGISTER + T90_IY: cpustate->iy.w.l = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INTNMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: set_irq_line(cpustate, INT0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ1: set_irq_line(cpustate, INT1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ2: set_irq_line(cpustate, INT2, info->i); break;
+
+ case CPUINFO_INT_PC: cpustate->pc.d = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_PC: cpustate->pc.w.l = info->i; break;
+ case CPUINFO_INT_SP: cpustate->sp.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_SP: cpustate->sp.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_A: cpustate->af.b.h = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_B: cpustate->bc.b.h = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_C: cpustate->bc.b.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_D: cpustate->de.b.h = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_E: cpustate->de.b.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_H: cpustate->hl.b.h = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_L: cpustate->hl.b.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_AF: cpustate->af.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_BC: cpustate->bc.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_DE: cpustate->de.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_HL: cpustate->hl.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_IX: cpustate->ix.w.l = info->i; break;
+ case CPUINFO_INT_REGISTER + T90_IY: cpustate->iy.w.l = info->i; break;
}
}
@@ -2794,72 +2794,72 @@ CPU_GET_INFO( tmp90840 )
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(t90_Regs); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 26; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->irq_state & (1 << INTNMI); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: info->i = cpustate->irq_state & (1 << INT0); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ1: info->i = cpustate->irq_state & (1 << INT1); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ2: info->i = cpustate->irq_state & (1 << INT2); break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prvpc.w.l; break;
- case CPUINFO_INT_PC: info->i = cpustate->pc.d; break;
- case CPUINFO_INT_REGISTER + T90_PC: info->i = cpustate->pc.w.l; break;
- case CPUINFO_INT_SP: info->i = cpustate->sp.d; break;
- case CPUINFO_INT_REGISTER + T90_SP: info->i = cpustate->sp.w.l; break;
- case CPUINFO_INT_REGISTER + T90_A: info->i = cpustate->af.b.h; break;
- case CPUINFO_INT_REGISTER + T90_B: info->i = cpustate->bc.b.h; break;
- case CPUINFO_INT_REGISTER + T90_C: info->i = cpustate->bc.b.l; break;
- case CPUINFO_INT_REGISTER + T90_D: info->i = cpustate->de.b.h; break;
- case CPUINFO_INT_REGISTER + T90_E: info->i = cpustate->de.b.l; break;
- case CPUINFO_INT_REGISTER + T90_H: info->i = cpustate->hl.b.h; break;
- case CPUINFO_INT_REGISTER + T90_L: info->i = cpustate->hl.b.l; break;
- case CPUINFO_INT_REGISTER + T90_AF: info->i = cpustate->af.w.l; break;
- case CPUINFO_INT_REGISTER + T90_BC: info->i = cpustate->bc.w.l; break;
- case CPUINFO_INT_REGISTER + T90_DE: info->i = cpustate->de.w.l; break;
- case CPUINFO_INT_REGISTER + T90_HL: info->i = cpustate->hl.w.l; break;
- case CPUINFO_INT_REGISTER + T90_IX: info->i = cpustate->ix.w.l; break;
- case CPUINFO_INT_REGISTER + T90_IY: info->i = cpustate->iy.w.l; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(t90_Regs); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 26; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->irq_state & (1 << INTNMI); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: info->i = cpustate->irq_state & (1 << INT0); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ1: info->i = cpustate->irq_state & (1 << INT1); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ2: info->i = cpustate->irq_state & (1 << INT2); break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->prvpc.w.l; break;
+ case CPUINFO_INT_PC: info->i = cpustate->pc.d; break;
+ case CPUINFO_INT_REGISTER + T90_PC: info->i = cpustate->pc.w.l; break;
+ case CPUINFO_INT_SP: info->i = cpustate->sp.d; break;
+ case CPUINFO_INT_REGISTER + T90_SP: info->i = cpustate->sp.w.l; break;
+ case CPUINFO_INT_REGISTER + T90_A: info->i = cpustate->af.b.h; break;
+ case CPUINFO_INT_REGISTER + T90_B: info->i = cpustate->bc.b.h; break;
+ case CPUINFO_INT_REGISTER + T90_C: info->i = cpustate->bc.b.l; break;
+ case CPUINFO_INT_REGISTER + T90_D: info->i = cpustate->de.b.h; break;
+ case CPUINFO_INT_REGISTER + T90_E: info->i = cpustate->de.b.l; break;
+ case CPUINFO_INT_REGISTER + T90_H: info->i = cpustate->hl.b.h; break;
+ case CPUINFO_INT_REGISTER + T90_L: info->i = cpustate->hl.b.l; break;
+ case CPUINFO_INT_REGISTER + T90_AF: info->i = cpustate->af.w.l; break;
+ case CPUINFO_INT_REGISTER + T90_BC: info->i = cpustate->bc.w.l; break;
+ case CPUINFO_INT_REGISTER + T90_DE: info->i = cpustate->de.w.l; break;
+ case CPUINFO_INT_REGISTER + T90_HL: info->i = cpustate->hl.w.l; break;
+ case CPUINFO_INT_REGISTER + T90_IX: info->i = cpustate->ix.w.l; break;
+ case CPUINFO_INT_REGISTER + T90_IY: info->i = cpustate->iy.w.l; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(t90); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(t90); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(t90); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(t90); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(t90); break;
- case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(t90); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t90); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(t90); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(t90); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(t90); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(t90); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(t90); break;
+ case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(t90); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(t90); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp90840_mem); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMP90840"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Toshiba TLCS-90"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Luca Elia"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMP90840"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Toshiba TLCS-90"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Luca Elia"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c",
@@ -2873,21 +2873,21 @@ CPU_GET_INFO( tmp90840 )
F & 0x01 ? 'C':'.');
break;
- case CPUINFO_STR_REGISTER + T90_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
- case CPUINFO_STR_REGISTER + T90_SP: sprintf(info->s, "SP:%04X", cpustate->sp.w.l); break;
- case CPUINFO_STR_REGISTER + T90_A: sprintf(info->s, "~A:%02X", cpustate->af.b.h); break;
- case CPUINFO_STR_REGISTER + T90_B: sprintf(info->s, "~B:%02X", cpustate->bc.b.h); break;
- case CPUINFO_STR_REGISTER + T90_C: sprintf(info->s, "~C:%02X", cpustate->bc.b.l); break;
- case CPUINFO_STR_REGISTER + T90_D: sprintf(info->s, "~D:%02X", cpustate->de.b.h); break;
- case CPUINFO_STR_REGISTER + T90_E: sprintf(info->s, "~E:%02X", cpustate->de.b.l); break;
- case CPUINFO_STR_REGISTER + T90_H: sprintf(info->s, "~H:%02X", cpustate->hl.b.h); break;
- case CPUINFO_STR_REGISTER + T90_L: sprintf(info->s, "~L:%02X", cpustate->hl.b.l); break;
- case CPUINFO_STR_REGISTER + T90_AF: sprintf(info->s, "AF:%04X", cpustate->af.w.l); break;
- case CPUINFO_STR_REGISTER + T90_BC: sprintf(info->s, "BC:%04X", cpustate->bc.w.l); break;
- case CPUINFO_STR_REGISTER + T90_DE: sprintf(info->s, "DE:%04X", cpustate->de.w.l); break;
- case CPUINFO_STR_REGISTER + T90_HL: sprintf(info->s, "HL:%04X", cpustate->hl.w.l); break;
- case CPUINFO_STR_REGISTER + T90_IX: sprintf(info->s, "IX:%04X", cpustate->ix.w.l); break;
- case CPUINFO_STR_REGISTER + T90_IY: sprintf(info->s, "IY:%04X", cpustate->iy.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_SP: sprintf(info->s, "SP:%04X", cpustate->sp.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_A: sprintf(info->s, "~A:%02X", cpustate->af.b.h); break;
+ case CPUINFO_STR_REGISTER + T90_B: sprintf(info->s, "~B:%02X", cpustate->bc.b.h); break;
+ case CPUINFO_STR_REGISTER + T90_C: sprintf(info->s, "~C:%02X", cpustate->bc.b.l); break;
+ case CPUINFO_STR_REGISTER + T90_D: sprintf(info->s, "~D:%02X", cpustate->de.b.h); break;
+ case CPUINFO_STR_REGISTER + T90_E: sprintf(info->s, "~E:%02X", cpustate->de.b.l); break;
+ case CPUINFO_STR_REGISTER + T90_H: sprintf(info->s, "~H:%02X", cpustate->hl.b.h); break;
+ case CPUINFO_STR_REGISTER + T90_L: sprintf(info->s, "~L:%02X", cpustate->hl.b.l); break;
+ case CPUINFO_STR_REGISTER + T90_AF: sprintf(info->s, "AF:%04X", cpustate->af.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_BC: sprintf(info->s, "BC:%04X", cpustate->bc.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_DE: sprintf(info->s, "DE:%04X", cpustate->de.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_HL: sprintf(info->s, "HL:%04X", cpustate->hl.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_IX: sprintf(info->s, "IX:%04X", cpustate->ix.w.l); break;
+ case CPUINFO_STR_REGISTER + T90_IY: sprintf(info->s, "IY:%04X", cpustate->iy.w.l); break;
}
}
@@ -2901,7 +2901,7 @@ CPU_GET_INFO( tmp90841 )
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMP90841"); return;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMP90841"); return;
}
CPU_GET_INFO_CALL(tmp90840);
@@ -2917,7 +2917,7 @@ CPU_GET_INFO( tmp91640 )
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMP91640"); return;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMP91640"); return;
}
CPU_GET_INFO_CALL(tmp90840);
@@ -2933,7 +2933,7 @@ CPU_GET_INFO( tmp91641 )
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMP91641"); return;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMP91641"); return;
}
CPU_GET_INFO_CALL(tmp90840);
diff --git a/src/emu/cpu/tlcs90/tlcs90.h b/src/emu/cpu/tlcs90/tlcs90.h
index f90723b3640..47d157e9b38 100644
--- a/src/emu/cpu/tlcs90/tlcs90.h
+++ b/src/emu/cpu/tlcs90/tlcs90.h
@@ -11,16 +11,16 @@ DECLARE_LEGACY_CPU_DEVICE(TMP91641, tmp91641);
CPU_DISASSEMBLE( t90 );
-#define T90_IOBASE 0xffc0
+#define T90_IOBASE 0xffc0
enum e_ir
{
- T90_P0=T90_IOBASE, T90_P1, T90_P01CR_IRFL, T90_IRFH, T90_P2, T90_P2CR, T90_P3, T90_P3CR,
- T90_P4, T90_P4CR, T90_P5, T90_SMMOD, T90_P6, T90_P7, T90_P67CR, T90_SMCR,
- T90_P8, T90_P8CR, T90_WDMOD, T90_WDCR, T90_TREG0, T90_TREG1, T90_TREG2, T90_TREG3,
- T90_TCLK, T90_TFFCR, T90_TMOD, T90_TRUN, T90_CAP1L, T90_CAP1H, T90_CAP2L, T90_CAL2H,
- T90_TREG4L, T90_TREG4H, T90_TREG5L, T90_TREG5H, T90_T4MOD, T90_T4FFCR, T90_INTEL, T90_INTEH,
- T90_DMAEH, T90_SCMOD, T90_SCCR, T90_SCBUF, T90_BX, T90_BY, T90_ADREG, T90_ADMOD
+ T90_P0=T90_IOBASE, T90_P1, T90_P01CR_IRFL, T90_IRFH, T90_P2, T90_P2CR, T90_P3, T90_P3CR,
+ T90_P4, T90_P4CR, T90_P5, T90_SMMOD, T90_P6, T90_P7, T90_P67CR, T90_SMCR,
+ T90_P8, T90_P8CR, T90_WDMOD, T90_WDCR, T90_TREG0, T90_TREG1, T90_TREG2, T90_TREG3,
+ T90_TCLK, T90_TFFCR, T90_TMOD, T90_TRUN, T90_CAP1L, T90_CAP1H, T90_CAP2L, T90_CAL2H,
+ T90_TREG4L, T90_TREG4H, T90_TREG5L, T90_TREG5H, T90_T4MOD, T90_T4FFCR, T90_INTEL, T90_INTEH,
+ T90_DMAEH, T90_SCMOD, T90_SCCR, T90_SCBUF, T90_BX, T90_BY, T90_ADREG, T90_ADMOD
};
#endif /* __TLCS90_H__ */
diff --git a/src/emu/cpu/tlcs900/900tbl.c b/src/emu/cpu/tlcs900/900tbl.c
index b63a4ffa2d7..627240d671e 100644
--- a/src/emu/cpu/tlcs900/900tbl.c
+++ b/src/emu/cpu/tlcs900/900tbl.c
@@ -7,28 +7,28 @@ TLCS-900/H instruction set
enum e_operand
{
- _A=1, /* currect register set register A */
- _C8, /* current register set byte */
- _C16, /* current register set word */
- _C32, /* current register set long word */
- _MC16, /* current register set mul/div register word */
- _CC, /* condition */
+ _A=1, /* currect register set register A */
+ _C8, /* current register set byte */
+ _C16, /* current register set word */
+ _C32, /* current register set long word */
+ _MC16, /* current register set mul/div register word */
+ _CC, /* condition */
_CR8,
_CR16,
_CR32,
- _D8, /* byte displacement */
- _D16, /* word displacement */
- _F, /* F register */
- _I3, /* immediate 3 bit (part of last byte) */
- _I8, /* immediate byte */
- _I16, /* immediate word */
- _I24, /* immediate 3 byte address */
- _I32, /* immediate long word */
- _M, /* memory location (defined by extension) */
- _M8, /* (8) */
- _M16, /* (i16) */
- _R, /* register (defined by extension) */
- _SR, /* status register */
+ _D8, /* byte displacement */
+ _D16, /* word displacement */
+ _F, /* F register */
+ _I3, /* immediate 3 bit (part of last byte) */
+ _I8, /* immediate byte */
+ _I16, /* immediate word */
+ _I24, /* immediate 3 byte address */
+ _I32, /* immediate long word */
+ _M, /* memory location (defined by extension) */
+ _M8, /* (8) */
+ _M16, /* (i16) */
+ _R, /* register (defined by extension) */
+ _SR, /* status register */
};
@@ -237,13 +237,13 @@ INLINE UINT32 *get_reg32_current( tlcs900_state *cpustate, UINT8 reg )
INLINE PAIR *get_reg( tlcs900_state *cpustate, UINT8 reg )
{
- UINT8 regbank;
+ UINT8 regbank;
switch( reg & 0xf0 )
{
- case 0x00: case 0x10: case 0x20: case 0x30: /* explicit register bank */
- case 0xd0: /* "previous" register bank */
- case 0xe0: /* current register bank */
+ case 0x00: case 0x10: case 0x20: case 0x30: /* explicit register bank */
+ case 0xd0: /* "previous" register bank */
+ case 0xe0: /* current register bank */
regbank = ( reg & 0xf0 ) >> 4;
if ( regbank == 0x0d )
regbank = ( cpustate->regbank - 1 ) & 0x03;
@@ -253,20 +253,20 @@ INLINE PAIR *get_reg( tlcs900_state *cpustate, UINT8 reg )
switch ( reg & 0x0c )
{
- case 0x00: return &cpustate->xwa[regbank];
- case 0x04: return &cpustate->xbc[regbank];
- case 0x08: return &cpustate->xde[regbank];
- case 0x0c: return &cpustate->xhl[regbank];
+ case 0x00: return &cpustate->xwa[regbank];
+ case 0x04: return &cpustate->xbc[regbank];
+ case 0x08: return &cpustate->xde[regbank];
+ case 0x0c: return &cpustate->xhl[regbank];
}
break;
- case 0xf0: /* index registers and sp */
+ case 0xf0: /* index registers and sp */
switch ( reg & 0x0c )
{
- case 0x00: return &cpustate->xix;
- case 0x04: return &cpustate->xiy;
- case 0x08: return &cpustate->xiz;
+ case 0x00: return &cpustate->xix;
+ case 0x04: return &cpustate->xiy;
+ case 0x08: return &cpustate->xiz;
/* TODO: Use correct SP */
- case 0x0c: return &cpustate->xssp;
+ case 0x0c: return &cpustate->xssp;
}
break;
}
@@ -279,14 +279,14 @@ INLINE PAIR *get_reg( tlcs900_state *cpustate, UINT8 reg )
INLINE UINT8 *get_reg8( tlcs900_state *cpustate, UINT8 reg )
{
- PAIR *r = get_reg( cpustate, reg );
+ PAIR *r = get_reg( cpustate, reg );
switch ( reg & 0x03 )
{
- case 0x00: return &r->b.l;
- case 0x01: return &r->b.h;
- case 0x02: return &r->b.h2;
- case 0x03: return &r->b.h3;
+ case 0x00: return &r->b.l;
+ case 0x01: return &r->b.h;
+ case 0x02: return &r->b.h2;
+ case 0x03: return &r->b.h3;
}
return &r->b.l;
@@ -295,7 +295,7 @@ INLINE UINT8 *get_reg8( tlcs900_state *cpustate, UINT8 reg )
INLINE UINT16 *get_reg16( tlcs900_state *cpustate, UINT8 reg )
{
- PAIR *r = get_reg( cpustate, reg );
+ PAIR *r = get_reg( cpustate, reg );
return ( reg & 0x02 ) ? &r->w.h : &r->w.l;
}
@@ -303,7 +303,7 @@ INLINE UINT16 *get_reg16( tlcs900_state *cpustate, UINT8 reg )
INLINE UINT32 *get_reg32( tlcs900_state *cpustate, UINT8 reg )
{
- PAIR *r = get_reg( cpustate, reg );
+ PAIR *r = get_reg( cpustate, reg );
return &r->d;
}
@@ -312,7 +312,7 @@ INLINE UINT32 *get_reg32( tlcs900_state *cpustate, UINT8 reg )
INLINE void parity8( tlcs900_state *cpustate, UINT8 a )
{
- int i, j;
+ int i, j;
j = 0;
for ( i = 0; i < 8; i++ )
@@ -326,7 +326,7 @@ INLINE void parity8( tlcs900_state *cpustate, UINT8 a )
INLINE void parity16( tlcs900_state *cpustate, UINT16 a )
{
- int i, j;
+ int i, j;
j = 0;
for ( i = 0; i < 16; i++ )
@@ -340,7 +340,7 @@ INLINE void parity16( tlcs900_state *cpustate, UINT16 a )
INLINE void parity32( tlcs900_state *cpustate, UINT32 a )
{
- int i, j;
+ int i, j;
j = 0;
for ( i = 0; i < 32; i++ )
@@ -1125,7 +1125,7 @@ INLINE UINT32 srl32( tlcs900_state *cpustate, UINT32 a, UINT8 s )
INLINE UINT16 div8( tlcs900_state *cpustate, UINT16 a, UINT8 b )
{
- ldiv_t result;
+ ldiv_t result;
if ( !b )
{
@@ -1157,7 +1157,7 @@ INLINE UINT16 div8( tlcs900_state *cpustate, UINT16 a, UINT8 b )
INLINE UINT32 div16( tlcs900_state *cpustate, UINT32 a, UINT16 b )
{
- ldiv_t result;
+ ldiv_t result;
if ( !b )
{
@@ -1189,7 +1189,7 @@ INLINE UINT32 div16( tlcs900_state *cpustate, UINT32 a, UINT16 b )
INLINE UINT16 divs8( tlcs900_state *cpustate, INT16 a, INT8 b )
{
- ldiv_t result;
+ ldiv_t result;
if ( !b )
{
@@ -1210,7 +1210,7 @@ INLINE UINT16 divs8( tlcs900_state *cpustate, INT16 a, INT8 b )
INLINE UINT32 divs16( tlcs900_state *cpustate, INT32 a, INT16 b )
{
- ldiv_t result;
+ ldiv_t result;
if ( !b )
{
@@ -1549,7 +1549,7 @@ static void _BITWIR(tlcs900_state *cpustate)
static void _BS1BRR(tlcs900_state *cpustate)
{
- UINT16 r = *cpustate->p2_reg16;
+ UINT16 r = *cpustate->p2_reg16;
if ( r )
{
@@ -1568,7 +1568,7 @@ static void _BS1BRR(tlcs900_state *cpustate)
static void _BS1FRR(tlcs900_state *cpustate)
{
- UINT16 r = *cpustate->p2_reg16;
+ UINT16 r = *cpustate->p2_reg16;
if ( r )
{
@@ -1727,8 +1727,8 @@ static void _CPLRR(tlcs900_state *cpustate)
static void _CPD(tlcs900_state *cpustate)
{
- UINT8 result = *get_reg8_current( cpustate, 1 ) - RDMEM( *cpustate->p2_reg32 );
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT8 result = *get_reg8_current( cpustate, 1 ) - RDMEM( *cpustate->p2_reg32 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
*cpustate->p2_reg32 -= 1;
*bc -= 1;
@@ -1753,8 +1753,8 @@ static void _CPDR(tlcs900_state *cpustate)
static void _CPDW(tlcs900_state *cpustate)
{
- UINT16 result = *get_reg16_current( cpustate, 0 ) - RDMEMW( *cpustate->p2_reg32 );
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 result = *get_reg16_current( cpustate, 0 ) - RDMEMW( *cpustate->p2_reg32 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
*cpustate->p2_reg32 -= 2;
*bc -= 1;
@@ -1779,8 +1779,8 @@ static void _CPDRW(tlcs900_state *cpustate)
static void _CPI(tlcs900_state *cpustate)
{
- UINT8 result = *get_reg8_current( cpustate, 1 ) - RDMEM( *cpustate->p2_reg32 );
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT8 result = *get_reg8_current( cpustate, 1 ) - RDMEM( *cpustate->p2_reg32 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
*cpustate->p2_reg32 += 1;
*bc -= 1;
@@ -1805,8 +1805,8 @@ static void _CPIR(tlcs900_state *cpustate)
static void _CPIW(tlcs900_state *cpustate)
{
- UINT16 result = *get_reg16_current( cpustate, 0 ) - RDMEMW( *cpustate->p2_reg32 );
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 result = *get_reg16_current( cpustate, 0 ) - RDMEMW( *cpustate->p2_reg32 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
*cpustate->p2_reg32 += 2;
*bc -= 1;
@@ -1845,11 +1845,11 @@ static void _CPLWR(tlcs900_state *cpustate)
static void _DAABR(tlcs900_state *cpustate)
{
- UINT8 oldval = *cpustate->p1_reg8;
- UINT8 fixval = 0;
- UINT8 carry = 0;
- UINT8 high = *cpustate->p1_reg8 & 0xf0;
- UINT8 low = *cpustate->p1_reg8 & 0x0f;
+ UINT8 oldval = *cpustate->p1_reg8;
+ UINT8 fixval = 0;
+ UINT8 carry = 0;
+ UINT8 high = *cpustate->p1_reg8 & 0xf0;
+ UINT8 low = *cpustate->p1_reg8 & 0x0f;
if ( cpustate->sr.b.l & FLAG_CF )
{
@@ -1913,7 +1913,7 @@ static void _DB(tlcs900_state *cpustate)
static void _DECBIM(tlcs900_state *cpustate)
{
- UINT8 cy = cpustate->sr.b.l & FLAG_CF;
+ UINT8 cy = cpustate->sr.b.l & FLAG_CF;
WRMEM( cpustate->ea2.d, sub8( cpustate, RDMEM( cpustate->ea2.d ), cpustate->imm1.b.l ? cpustate->imm1.b.l : 8 ) );
cpustate->sr.b.l = ( cpustate->sr.b.l & ~ FLAG_CF ) | cy;
@@ -1922,7 +1922,7 @@ static void _DECBIM(tlcs900_state *cpustate)
static void _DECBIR(tlcs900_state *cpustate)
{
- UINT8 cy = cpustate->sr.b.l & FLAG_CF;
+ UINT8 cy = cpustate->sr.b.l & FLAG_CF;
*cpustate->p2_reg8 = sub8( cpustate, *cpustate->p2_reg8, cpustate->imm1.b.l ? cpustate->imm1.b.l : 8 );
cpustate->sr.b.l = ( cpustate->sr.b.l & ~ FLAG_CF ) | cy;
@@ -1931,7 +1931,7 @@ static void _DECBIR(tlcs900_state *cpustate)
static void _DECWIM(tlcs900_state *cpustate)
{
- UINT8 cy = cpustate->sr.b.l & FLAG_CF;
+ UINT8 cy = cpustate->sr.b.l & FLAG_CF;
WRMEMW( cpustate->ea2.d, sub16( cpustate, RDMEMW( cpustate->ea2.d ), cpustate->imm1.b.l ? cpustate->imm1.b.l : 8 ) );
cpustate->sr.b.l = ( cpustate->sr.b.l & ~ FLAG_CF ) | cy;
@@ -2063,7 +2063,7 @@ static void _EI(tlcs900_state *cpustate)
static void _EXBMR(tlcs900_state *cpustate)
{
- UINT8 i = RDMEM( cpustate->ea1.d );
+ UINT8 i = RDMEM( cpustate->ea1.d );
WRMEM( cpustate->ea1.d, *cpustate->p2_reg8 );
*cpustate->p2_reg8 = i;
@@ -2072,7 +2072,7 @@ static void _EXBMR(tlcs900_state *cpustate)
static void _EXBRR(tlcs900_state *cpustate)
{
- UINT8 i = *cpustate->p2_reg8;
+ UINT8 i = *cpustate->p2_reg8;
*cpustate->p2_reg8 = *cpustate->p1_reg8;
*cpustate->p1_reg8 = i;
@@ -2081,7 +2081,7 @@ static void _EXBRR(tlcs900_state *cpustate)
static void _EXWMR(tlcs900_state *cpustate)
{
- UINT16 i = RDMEMW( cpustate->ea1.d );
+ UINT16 i = RDMEMW( cpustate->ea1.d );
WRMEMW( cpustate->ea1.d, *cpustate->p2_reg16 );
*cpustate->p2_reg16 = i;
@@ -2090,7 +2090,7 @@ static void _EXWMR(tlcs900_state *cpustate)
static void _EXWRR(tlcs900_state *cpustate)
{
- UINT16 i = *cpustate->p2_reg16;
+ UINT16 i = *cpustate->p2_reg16;
*cpustate->p2_reg16 = *cpustate->p1_reg16;
*cpustate->p1_reg16 = i;
@@ -2135,7 +2135,7 @@ static void _HALT(tlcs900_state *cpustate)
static void _INCBIM(tlcs900_state *cpustate)
{
- UINT8 cy = cpustate->sr.b.l & FLAG_CF;
+ UINT8 cy = cpustate->sr.b.l & FLAG_CF;
WRMEM( cpustate->ea2.d, add8( cpustate, RDMEM( cpustate->ea2.d ), cpustate->imm1.b.l ? cpustate->imm1.b.l : 8 ) );
cpustate->sr.b.l = ( cpustate->sr.b.l & ~ FLAG_CF ) | cy;
@@ -2144,7 +2144,7 @@ static void _INCBIM(tlcs900_state *cpustate)
static void _INCBIR(tlcs900_state *cpustate)
{
- UINT8 cy = cpustate->sr.b.l & FLAG_CF;
+ UINT8 cy = cpustate->sr.b.l & FLAG_CF;
*cpustate->p2_reg8 = add8( cpustate, *cpustate->p2_reg8, cpustate->imm1.b.l ? cpustate->imm1.b.l : 8 );
cpustate->sr.b.l = ( cpustate->sr.b.l & ~ FLAG_CF ) | cy;
@@ -2153,7 +2153,7 @@ static void _INCBIR(tlcs900_state *cpustate)
static void _INCWIM(tlcs900_state *cpustate)
{
- UINT8 cy = cpustate->sr.b.l & FLAG_CF;
+ UINT8 cy = cpustate->sr.b.l & FLAG_CF;
WRMEMW( cpustate->ea2.d, add16( cpustate, RDMEMW( cpustate->ea2.d ), cpustate->imm1.b.l ? cpustate->imm1.b.l : 8 ) );
cpustate->sr.b.l = ( cpustate->sr.b.l & ~ FLAG_CF ) | cy;
@@ -2384,7 +2384,7 @@ static void _LDCFWRR(tlcs900_state *cpustate)
static void _LDD(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEM( *cpustate->p1_reg32, RDMEM( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 -= 1;
@@ -2400,7 +2400,7 @@ static void _LDD(tlcs900_state *cpustate)
static void _LDDR(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEM( *cpustate->p1_reg32, RDMEM( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 -= 1;
@@ -2419,7 +2419,7 @@ static void _LDDR(tlcs900_state *cpustate)
static void _LDDRW(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEMW( *cpustate->p1_reg32, RDMEMW( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 -= 2;
@@ -2438,7 +2438,7 @@ static void _LDDRW(tlcs900_state *cpustate)
static void _LDDW(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEMW( *cpustate->p1_reg32, RDMEMW( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 -= 2;
@@ -2461,7 +2461,7 @@ static void _LDF(tlcs900_state *cpustate)
static void _LDI(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEM( *cpustate->p1_reg32, RDMEM( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 += 1;
@@ -2477,7 +2477,7 @@ static void _LDI(tlcs900_state *cpustate)
static void _LDIR(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEM( *cpustate->p1_reg32, RDMEM( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 += 1;
@@ -2496,7 +2496,7 @@ static void _LDIR(tlcs900_state *cpustate)
static void _LDIRW(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEMW( *cpustate->p1_reg32, RDMEMW( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 += 2;
@@ -2515,7 +2515,7 @@ static void _LDIRW(tlcs900_state *cpustate)
static void _LDIW(tlcs900_state *cpustate)
{
- UINT16 *bc = get_reg16_current( cpustate, 1 );
+ UINT16 *bc = get_reg16_current( cpustate, 1 );
WRMEMW( *cpustate->p1_reg32, RDMEMW( *cpustate->p2_reg32 ) );
*cpustate->p1_reg32 += 2;
@@ -2531,7 +2531,7 @@ static void _LDIW(tlcs900_state *cpustate)
static void _LDX(tlcs900_state *cpustate)
{
- UINT8 a, b;
+ UINT8 a, b;
RDOP( cpustate );
a = RDOP( cpustate );
@@ -2613,8 +2613,8 @@ static void _MINC4(tlcs900_state *cpustate)
static void _MIRRW(tlcs900_state *cpustate)
{
- UINT16 r = *cpustate->p1_reg16;
- UINT16 s = ( r & 0x01 );
+ UINT16 r = *cpustate->p1_reg16;
+ UINT16 s = ( r & 0x01 );
int i;
@@ -2667,8 +2667,8 @@ static void _MULWRR(tlcs900_state *cpustate)
static void _MULAR(tlcs900_state *cpustate)
{
- UINT32 *xde = get_reg32_current( cpustate, 2 );
- UINT32 *xhl = get_reg32_current( cpustate, 3 );
+ UINT32 *xde = get_reg32_current( cpustate, 2 );
+ UINT32 *xhl = get_reg32_current( cpustate, 3 );
*cpustate->p1_reg32 = *cpustate->p1_reg32 + ( ((INT16)RDMEMW( *xde )) * ((INT16)RDMEMW( *xhl )) );
*xhl -= 2;
@@ -3126,8 +3126,8 @@ static void _RLCLRR(tlcs900_state *cpustate)
static void _RLDRM(tlcs900_state *cpustate)
{
- UINT8 a = *cpustate->p1_reg8 & 0x0f;
- UINT8 b = RDMEM( cpustate->ea2.d );
+ UINT8 a = *cpustate->p1_reg8 & 0x0f;
+ UINT8 b = RDMEM( cpustate->ea2.d );
*cpustate->p1_reg8 = ( *cpustate->p1_reg8 & 0xf0 ) | ( ( b & 0xf0 ) >> 4 );
WRMEM( cpustate->ea2.d, ( ( b & 0x0f ) << 4 ) | a );
@@ -3235,8 +3235,8 @@ static void _RRCLRR(tlcs900_state *cpustate)
static void _RRDRM(tlcs900_state *cpustate)
{
- UINT8 a = *cpustate->p1_reg8 & 0x0f;
- UINT8 b = RDMEM( cpustate->ea2.d );
+ UINT8 a = *cpustate->p1_reg8 & 0x0f;
+ UINT8 b = RDMEM( cpustate->ea2.d );
*cpustate->p1_reg8 = ( *cpustate->p1_reg8 & 0xf0 ) | ( b & 0x0f );
WRMEM( cpustate->ea2.d, ( ( b & 0xf0 ) >> 4 ) | ( a << 4 ) );
@@ -3710,8 +3710,8 @@ static void _SWI(tlcs900_state *cpustate)
static void _TSETBIM(tlcs900_state *cpustate)
{
- UINT8 b = 1 << ( cpustate->imm1.b.l & 0x07 );
- UINT8 a = RDMEM( cpustate->ea2.d );
+ UINT8 b = 1 << ( cpustate->imm1.b.l & 0x07 );
+ UINT8 a = RDMEM( cpustate->ea2.d );
cpustate->sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
cpustate->sr.b.l |= ( ( a & b ) ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -3721,7 +3721,7 @@ static void _TSETBIM(tlcs900_state *cpustate)
static void _TSETBIR(tlcs900_state *cpustate)
{
- UINT8 b = 1 << ( cpustate->imm1.b.l & 0x07 );
+ UINT8 b = 1 << ( cpustate->imm1.b.l & 0x07 );
cpustate->sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
cpustate->sr.b.l |= ( ( *cpustate->p2_reg8 & b ) ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -3731,7 +3731,7 @@ static void _TSETBIR(tlcs900_state *cpustate)
static void _TSETWIR(tlcs900_state *cpustate)
{
- UINT16 b = 1 << ( cpustate->imm1.b.l & 0x0f );
+ UINT16 b = 1 << ( cpustate->imm1.b.l & 0x0f );
cpustate->sr.b.l &= ~ ( FLAG_ZF | FLAG_NF );
cpustate->sr.b.l |= ( ( *cpustate->p2_reg16 & b ) ? 0 : FLAG_ZF ) | FLAG_HF;
@@ -3877,9 +3877,9 @@ static void _ZCF(tlcs900_state *cpustate)
struct tlcs900inst
{
void (*opfunc)(tlcs900_state *cpustate);
- int operand1;
- int operand2;
- int cycles;
+ int operand1;
+ int operand2;
+ int cycles;
};
@@ -3902,7 +3902,7 @@ static void prepare_operands(tlcs900_state *cpustate, const tlcs900inst *inst)
case _C16:
cpustate->p1_reg16 = get_reg16_current( cpustate, cpustate->op );
break;
- case _MC16: /* For MUL and DIV operations */
+ case _MC16: /* For MUL and DIV operations */
cpustate->p1_reg16 = get_reg16_current( cpustate, ( cpustate->op >> 1 ) & 0x03 );
break;
case _C32:
@@ -4035,7 +4035,7 @@ static void prepare_operands(tlcs900_state *cpustate, const tlcs900inst *inst)
case _A:
cpustate->p2_reg8 = &cpustate->xwa[cpustate->regbank].b.l;
break;
- case _F: /* F' */
+ case _F: /* F' */
cpustate->p2_reg8 = &cpustate->f2.b.l;
break;
case _SR:
@@ -5481,18 +5481,18 @@ static void _C0(tlcs900_state *cpustate)
switch ( cpustate->op & 0x07 )
{
- case 0x00: /* (n) */
+ case 0x00: /* (n) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x01: /* (nn) */
+ case 0x01: /* (nn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x02: /* (nnn) */
+ case 0x02: /* (nnn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->ea2.b.h2 = RDOP( cpustate );
@@ -5553,7 +5553,7 @@ static void _C0(tlcs900_state *cpustate)
}
break;
- case 0x04: /* (-xrr) */
+ case 0x04: /* (-xrr) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
*reg -= ( 1 << ( cpustate->op & 0x03 ) );
@@ -5561,7 +5561,7 @@ static void _C0(tlcs900_state *cpustate)
cpustate->cycles += 3;
break;
- case 0x05: /* (xrr+) */
+ case 0x05: /* (xrr+) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
cpustate->ea2.d = *reg;
@@ -5610,18 +5610,18 @@ static void _D0(tlcs900_state *cpustate)
switch ( cpustate->op & 0x07 )
{
- case 0x00: /* (n) */
+ case 0x00: /* (n) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x01: /* (nn) */
+ case 0x01: /* (nn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x02: /* (nnn) */
+ case 0x02: /* (nnn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->ea2.b.h2 = RDOP( cpustate );
@@ -5682,7 +5682,7 @@ static void _D0(tlcs900_state *cpustate)
}
break;
- case 0x04: /* (-xrr) */
+ case 0x04: /* (-xrr) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
*reg -= ( 1 << ( cpustate->op & 0x03 ) );
@@ -5690,7 +5690,7 @@ static void _D0(tlcs900_state *cpustate)
cpustate->cycles += 3;
break;
- case 0x05: /* (xrr+) */
+ case 0x05: /* (xrr+) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
cpustate->ea2.d = *reg;
@@ -5737,18 +5737,18 @@ static void _E0(tlcs900_state *cpustate)
switch ( cpustate->op & 0x07 )
{
- case 0x00: /* (n) */
+ case 0x00: /* (n) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x01: /* (nn) */
+ case 0x01: /* (nn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x02: /* (nnn) */
+ case 0x02: /* (nnn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->ea2.b.h2 = RDOP( cpustate );
@@ -5809,7 +5809,7 @@ static void _E0(tlcs900_state *cpustate)
}
break;
- case 0x04: /* (-xrr) */
+ case 0x04: /* (-xrr) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
*reg -= ( 1 << ( cpustate->op & 0x03 ) );
@@ -5817,7 +5817,7 @@ static void _E0(tlcs900_state *cpustate)
cpustate->cycles += 3;
break;
- case 0x05: /* (xrr+) */
+ case 0x05: /* (xrr+) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
cpustate->ea2.d = *reg;
@@ -5862,18 +5862,18 @@ static void _F0(tlcs900_state *cpustate)
switch ( cpustate->op & 0x07 )
{
- case 0x00: /* (n) */
+ case 0x00: /* (n) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x01: /* (nn) */
+ case 0x01: /* (nn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->cycles += 2;
break;
- case 0x02: /* (nnn) */
+ case 0x02: /* (nnn) */
cpustate->ea2.d = RDOP( cpustate );
cpustate->ea2.b.h = RDOP( cpustate );
cpustate->ea2.b.h2 = RDOP( cpustate );
@@ -5934,7 +5934,7 @@ static void _F0(tlcs900_state *cpustate)
}
break;
- case 0x04: /* (-xrr) */
+ case 0x04: /* (-xrr) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
*reg -= ( 1 << ( cpustate->op & 0x03 ) );
@@ -5942,7 +5942,7 @@ static void _F0(tlcs900_state *cpustate)
cpustate->cycles += 3;
break;
- case 0x05: /* (xrr+) */
+ case 0x05: /* (xrr+) */
cpustate->op = RDOP( cpustate );
reg = get_reg32( cpustate, cpustate->op );
cpustate->ea2.d = *reg;
@@ -6041,5 +6041,3 @@ static const tlcs900inst mnemonic[256] =
{ _SWI, _I3, 0, 16 }, { _SWI, _I3, 0, 16 }, { _SWI, _I3, 0, 16 }, { _SWI, _I3, 0, 16 },
{ _SWI, _I3, 0, 16 }, { _SWI, _I3, 0, 16 }, { _SWI, _I3, 0, 16 }, { _SWI, _I3, 0, 16 }
};
-
-
diff --git a/src/emu/cpu/tlcs900/dasm900.c b/src/emu/cpu/tlcs900/dasm900.c
index e33771bb374..f3597934e05 100644
--- a/src/emu/cpu/tlcs900/dasm900.c
+++ b/src/emu/cpu/tlcs900/dasm900.c
@@ -62,37 +62,37 @@ static const char *const s_mnemonic[] =
enum e_operand
{
- O_NONE,
- O_A, /* currect register set register A */
- O_C8, /* current register set byte */
- O_C16, /* current register set word */
- O_C32, /* current register set long word */
- O_MC16, /* current register set mul/div register word */
- O_CC, /* condition */
- O_CR8, /* byte control register */
- O_CR16, /* word control register */
- O_CR32, /* long word control register */
- O_D8, /* byte displacement */
- O_D16, /* word displacement */
- O_F, /* F register */
- O_I3, /* immediate 3 bit (part of last byte) */
- O_I8, /* immediate byte */
- O_I16, /* immediate word */
- O_I24, /* immediate 3 byte address */
- O_I32, /* immediate long word */
- O_M, /* memory location (defined by extension) */
- O_M8, /* (8) */
- O_M16, /* (i16) */
- O_R, /* register */
- O_SR, /* status register */
+ O_NONE,
+ O_A, /* currect register set register A */
+ O_C8, /* current register set byte */
+ O_C16, /* current register set word */
+ O_C32, /* current register set long word */
+ O_MC16, /* current register set mul/div register word */
+ O_CC, /* condition */
+ O_CR8, /* byte control register */
+ O_CR16, /* word control register */
+ O_CR32, /* long word control register */
+ O_D8, /* byte displacement */
+ O_D16, /* word displacement */
+ O_F, /* F register */
+ O_I3, /* immediate 3 bit (part of last byte) */
+ O_I8, /* immediate byte */
+ O_I16, /* immediate word */
+ O_I24, /* immediate 3 byte address */
+ O_I32, /* immediate long word */
+ O_M, /* memory location (defined by extension) */
+ O_M8, /* (8) */
+ O_M16, /* (i16) */
+ O_R, /* register */
+ O_SR, /* status register */
};
struct tlcs900inst
{
- e_mnemonics mnemonic;
- e_operand operand1;
- e_operand operand2;
+ e_mnemonics mnemonic;
+ e_operand operand1;
+ e_operand operand2;
};
@@ -1436,10 +1436,10 @@ CPU_DISASSEMBLE( tlcs900 )
const tlcs900inst *dasm;
char *dst = buffer;
char buf[32];
- UINT8 op, op1;
- UINT32 imm;
- int flags = 0;
- int pos = 0;
+ UINT8 op, op1;
+ UINT32 imm;
+ int flags = 0;
+ int pos = 0;
op = oprom[ pos++ ];
@@ -1448,8 +1448,8 @@ CPU_DISASSEMBLE( tlcs900 )
/* Check for extended addressing modes */
switch( dasm->mnemonic )
{
- default:
- break;
+ default:
+ break;
case M_80:
sprintf( buf, "%s", s_reg32[op & 0x07] );
op = oprom[ pos++ ];
@@ -1505,25 +1505,25 @@ CPU_DISASSEMBLE( tlcs900 )
case M_C0:
switch( op & 0x07 )
{
- case 0x00: /* 0xC0 */
+ case 0x00: /* 0xC0 */
imm = oprom[ pos++ ];
sprintf( buf, "0x%02x", imm );
break;
- case 0x01: /* 0xC1 */
+ case 0x01: /* 0xC1 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
sprintf( buf, "0x%04x", imm );
break;
- case 0x02: /* 0xC2 */
+ case 0x02: /* 0xC2 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
imm = imm | ( oprom[ pos++ ] << 16 );
sprintf( buf, "0x%06x", imm );
break;
- case 0x03: /* 0xC3 */
+ case 0x03: /* 0xC3 */
imm = oprom[ pos++ ];
switch( imm & 0x03 )
{
@@ -1567,12 +1567,12 @@ CPU_DISASSEMBLE( tlcs900 )
}
break;
- case 0x04: /* 0xC4 */
+ case 0x04: /* 0xC4 */
imm = oprom[ pos++ ];
sprintf( buf, "-%s", s_allreg32[imm] );
break;
- case 0x05: /* 0xC5 */
+ case 0x05: /* 0xC5 */
imm = oprom[ pos++ ];
sprintf( buf, "%s+", s_allreg32[imm] );
break;
@@ -1598,25 +1598,25 @@ CPU_DISASSEMBLE( tlcs900 )
case M_D0:
switch( op & 0x07 )
{
- case 0x00: /* 0xD0 */
+ case 0x00: /* 0xD0 */
imm = oprom[ pos++ ];
sprintf( buf, "0x%02x", imm );
break;
- case 0x01: /* 0xD1 */
+ case 0x01: /* 0xD1 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
sprintf( buf, "0x%04x", imm );
break;
- case 0x02: /* 0xD2 */
+ case 0x02: /* 0xD2 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
imm = imm | ( oprom[ pos++ ] << 16 );
sprintf( buf, "0x%06x", imm );
break;
- case 0x03: /* 0xD3 */
+ case 0x03: /* 0xD3 */
imm = oprom[ pos++ ];
switch( imm & 0x03 )
{
@@ -1660,12 +1660,12 @@ CPU_DISASSEMBLE( tlcs900 )
}
break;
- case 0x04: /* 0xD4 */
+ case 0x04: /* 0xD4 */
imm = oprom[ pos++ ];
sprintf( buf, "-%s", s_allreg32[imm] );
break;
- case 0x05: /* 0xD5 */
+ case 0x05: /* 0xD5 */
imm = oprom[ pos++ ];
sprintf( buf, "%s+", s_allreg32[imm] );
break;
@@ -1692,25 +1692,25 @@ CPU_DISASSEMBLE( tlcs900 )
case M_E0:
switch( op & 0x07 )
{
- case 0x00: /* 0xE0 */
+ case 0x00: /* 0xE0 */
imm = oprom[ pos++ ];
sprintf( buf, "0x%02x", imm );
break;
- case 0x01: /* 0xE1 */
+ case 0x01: /* 0xE1 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
sprintf( buf, "0x%04x", imm );
break;
- case 0x02: /* 0xE2 */
+ case 0x02: /* 0xE2 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
imm = imm | ( oprom[ pos++ ] << 16 );
sprintf( buf, "0x%06x", imm );
break;
- case 0x03: /* 0xE3 */
+ case 0x03: /* 0xE3 */
imm = oprom[ pos++ ];
switch( imm & 0x03 )
{
@@ -1754,12 +1754,12 @@ CPU_DISASSEMBLE( tlcs900 )
}
break;
- case 0x04: /* 0xE4 */
+ case 0x04: /* 0xE4 */
imm = oprom[ pos++ ];
sprintf( buf, "-%s", s_allreg32[imm] );
break;
- case 0x05: /* 0xE5 */
+ case 0x05: /* 0xE5 */
imm = oprom[ pos++ ];
sprintf( buf, "%s+", s_allreg32[imm] );
break;
@@ -1785,25 +1785,25 @@ CPU_DISASSEMBLE( tlcs900 )
case M_F0:
switch( op & 0x07 )
{
- case 0x00: /* 0xF0 */
+ case 0x00: /* 0xF0 */
imm = oprom[ pos++ ];
sprintf( buf, "0x%02x", imm );
break;
- case 0x01: /* 0xF1 */
+ case 0x01: /* 0xF1 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
sprintf( buf, "0x%04x", imm );
break;
- case 0x02: /* 0xF2 */
+ case 0x02: /* 0xF2 */
imm = oprom[ pos++ ];
imm = imm | ( oprom[ pos++ ] << 8 );
imm = imm | ( oprom[ pos++ ] << 16 );
sprintf( buf, "0x%06x", imm );
break;
- case 0x03: /* 0xF3 */
+ case 0x03: /* 0xF3 */
imm = oprom[ pos++ ];
switch( imm & 0x03 )
{
@@ -1847,12 +1847,12 @@ CPU_DISASSEMBLE( tlcs900 )
}
break;
- case 0x04: /* 0xF4 */
+ case 0x04: /* 0xF4 */
imm = oprom[ pos++ ];
sprintf( buf, "-%s", s_allreg32[imm] );
break;
- case 0x05: /* 0xF5 */
+ case 0x05: /* 0xF5 */
imm = oprom[ pos++ ];
sprintf( buf, "%s+", s_allreg32[imm] );
break;
@@ -1866,9 +1866,9 @@ CPU_DISASSEMBLE( tlcs900 )
switch( dasm->mnemonic )
{
- default:
- /* maybe assert */
- break;
+ default:
+ /* maybe assert */
+ break;
case M_CALL:
case M_CALR:
flags = DASMFLAG_STEP_OVER;
@@ -1882,8 +1882,8 @@ CPU_DISASSEMBLE( tlcs900 )
switch( dasm->operand1 )
{
- case O_NONE:
- break;
+ case O_NONE:
+ break;
case O_A:
dst += sprintf( dst, " A" );
@@ -2068,10 +2068,10 @@ CPU_DISASSEMBLE( tlcs900 )
switch( dasm->operand2 )
{
- case O_NONE:
- break;
+ case O_NONE:
+ break;
- case O_A:
+ case O_A:
dst += sprintf( dst, ",A" );
break;
diff --git a/src/emu/cpu/tlcs900/tlcs900.c b/src/emu/cpu/tlcs900/tlcs900.c
index 0c73920aa88..06f69f3fd42 100644
--- a/src/emu/cpu/tlcs900/tlcs900.c
+++ b/src/emu/cpu/tlcs900/tlcs900.c
@@ -21,57 +21,57 @@ struct tlcs900_state
{
const tlcs900_interface *intf;
- devcb_resolved_write8 to1;
- devcb_resolved_write8 to3;
+ devcb_resolved_write8 to1;
+ devcb_resolved_write8 to3;
- devcb_resolved_read8 port_read;
- devcb_resolved_write8 port_write;
+ devcb_resolved_read8 port_read;
+ devcb_resolved_write8 port_write;
/* registers */
- PAIR xwa[4];
- PAIR xbc[4];
- PAIR xde[4];
- PAIR xhl[4];
- PAIR xix;
- PAIR xiy;
- PAIR xiz;
- PAIR xssp;
- PAIR xnsp;
- PAIR pc;
- PAIR sr;
- PAIR f2; /* f' */
+ PAIR xwa[4];
+ PAIR xbc[4];
+ PAIR xde[4];
+ PAIR xhl[4];
+ PAIR xix;
+ PAIR xiy;
+ PAIR xiz;
+ PAIR xssp;
+ PAIR xnsp;
+ PAIR pc;
+ PAIR sr;
+ PAIR f2; /* f' */
/* DMA registers */
- PAIR dmas[4];
- PAIR dmad[4];
- PAIR dmac[4];
- PAIR dmam[4];
+ PAIR dmas[4];
+ PAIR dmad[4];
+ PAIR dmac[4];
+ PAIR dmam[4];
/* Internal timers, irqs, etc */
- UINT8 reg[0xa0];
- UINT32 timer_pre;
- UINT8 timer[6];
- UINT8 tff1;
- UINT8 tff3;
- int timer_change[4];
- bool prefetch_clear;
- UINT8 prefetch_index;
- UINT8 prefetch[4];
+ UINT8 reg[0xa0];
+ UINT32 timer_pre;
+ UINT8 timer[6];
+ UINT8 tff1;
+ UINT8 tff3;
+ int timer_change[4];
+ bool prefetch_clear;
+ UINT8 prefetch_index;
+ UINT8 prefetch[4];
/* Current state of input levels */
- int level[TLCS900_NUM_INPUTS];
- int check_irqs;
- int ad_cycles_left;
- int nmi_state;
+ int level[TLCS900_NUM_INPUTS];
+ int check_irqs;
+ int ad_cycles_left;
+ int nmi_state;
/* used during execution */
- PAIR dummy; /* for illegal register references */
- UINT8 op;
- PAIR ea1, ea2;
- PAIR imm1, imm2;
- int cycles;
- UINT8 *p1_reg8, *p2_reg8;
- UINT16 *p1_reg16, *p2_reg16;
- UINT32 *p1_reg32, *p2_reg32;
+ PAIR dummy; /* for illegal register references */
+ UINT8 op;
+ PAIR ea1, ea2;
+ PAIR imm1, imm2;
+ int cycles;
+ UINT8 *p1_reg8, *p2_reg8;
+ UINT16 *p1_reg16, *p2_reg16;
+ UINT32 *p1_reg32, *p2_reg32;
int halted;
int icount;
@@ -83,129 +83,129 @@ struct tlcs900_state
/* Internal register defines */
-#define TLCS900_P1 0x01
-#define TLCS900_P1CR 0x02
-#define TLCS900_P2 0x06
-#define TLCS900_P2FC 0x09
-#define TLCS900_P5 0x0d
-#define TLCS900_P5CR 0x10
-#define TLCS900_P5FC 0x11
-#define TLCS900_P6 0x12
-#define TLCS900_P7 0x13
-#define TLCS900_P6FC 0x15
-#define TLCS900_P7CR 0x16
-#define TLCS900_P7FC 0x17
-#define TLCS900_P8 0x18
-#define TLCS900_P9 0x19
-#define TLCS900_P8CR 0x1a
-#define TLCS900_P8FC 0x1b
-#define TLCS900_PA 0x1e
-#define TLCS900_PB 0x1f
-#define TLCS900_TRUN 0x20
-#define TLCS900_TREG0 0x22
-#define TLCS900_TREG1 0x23
-#define TLCS900_T01MOD 0x24
-#define TLCS900_TFFCR 0x25
-#define TLCS900_TREG2 0x26
-#define TLCS900_TREG3 0x27
-#define TLCS900_T23MOD 0x28
-#define TLCS900_TRDC 0x29
-#define TLCS900_PACR 0x2c
-#define TLCS900_PAFC 0x2d
-#define TLCS900_PBCR 0x2e
-#define TLCS900_PBFC 0x2f
-#define TLCS900_TREG4L 0x30
-#define TLCS900_TREG4H 0x31
-#define TLCS900_TREG5L 0x32
-#define TLCS900_TREG5H 0x33
-#define TLCS900_CAP1L 0x34
-#define TLCS900_CAP1H 0x35
-#define TLCS900_CAP2L 0x36
-#define TLCS900_CAP2H 0x37
-#define TLCS900_T4MOD 0x38
-#define TLCS900_T4FFCR 0x39
-#define TLCS900_T45CR 0x3a
-#define TLCS900_MSAR0 0x3c
-#define TLCS900_MAMR0 0x3d
-#define TLCS900_MSAR1 0x3e
-#define TLCS900_MAMR1 0x3f
-#define TLCS900_TREG6L 0x40
-#define TLCS900_TREG6H 0x41
-#define TLCS900_TREG7L 0x42
-#define TLCS900_TREG7H 0x43
-#define TLCS900_CAP3L 0x44
-#define TLCS900_CAP3H 0x45
-#define TLCS900_CAP4L 0x46
-#define TLCS900_CAP4H 0x47
-#define TLCS900_T5MOD 0x48
-#define TLCS900_T5FFCR 0x49
-#define TLCS900_PG0REG 0x4c
-#define TLCS900_PG1REG 0x4d
-#define TLCS900_PG01CR 0x4e
-#define TLCS900_SC0BUF 0x50
-#define TLCS900_SC0CR 0x51
-#define TLCS900_SC0MOD 0x52
-#define TLCS900_BR0CR 0x53
-#define TLCS900_SC1BUF 0x54
-#define TLCS900_SC1CR 0x55
-#define TLCS900_SC1MOD 0x56
-#define TLCS900_BR1CR 0x57
-#define TLCS900_ODE 0x58
-#define TLCS900_DREFCR 0x5a
-#define TLCS900_DMEMCR 0x5b
-#define TLCS900_MSAR2 0x5c
-#define TLCS900_MAMR2 0x5d
-#define TLCS900_MSAR3 0x5e
-#define TLCS900_MAMR3 0x5f
-#define TLCS900_ADREG0L 0x60
-#define TLCS900_ADREG0H 0x61
-#define TLCS900_ADREG1L 0x62
-#define TLCS900_ADREG1H 0x63
-#define TLCS900_ADREG2L 0x64
-#define TLCS900_ADREG2H 0x65
-#define TLCS900_ADREG3L 0x66
-#define TLCS900_ADREG3H 0x67
-#define TLCS900_B0CS 0x68
-#define TLCS900_B1CS 0x69
-#define TLCS900_B2CS 0x6a
-#define TLCS900_B3CS 0x6b
-#define TLCS900_BEXCS 0x6c
-#define TLCS900_ADMOD 0x6d
-#define TLCS900_WDMOD 0x6e
-#define TLCS900_WDCR 0x6f
-#define TLCS900_INTE0AD 0x70
-#define TLCS900_INTE45 0x71
-#define TLCS900_INTE67 0x72
-#define TLCS900_INTET10 0x73
-#define TLCS900_INTET32 0x74
-#define TLCS900_INTET54 0x75
-#define TLCS900_INTET76 0x76
-#define TLCS900_INTES0 0x77
-#define TLCS900_INTES1 0x78
-#define TLCS900_INTETC10 0x79
-#define TLCS900_INTETC32 0x7a
-#define TLCS900_IIMC 0x7b
-#define TLCS900_DMA0V 0x7c
-#define TLCS900_DMA1V 0x7d
-#define TLCS900_DMA2V 0x7e
-#define TLCS900_DMA3V 0x7f
+#define TLCS900_P1 0x01
+#define TLCS900_P1CR 0x02
+#define TLCS900_P2 0x06
+#define TLCS900_P2FC 0x09
+#define TLCS900_P5 0x0d
+#define TLCS900_P5CR 0x10
+#define TLCS900_P5FC 0x11
+#define TLCS900_P6 0x12
+#define TLCS900_P7 0x13
+#define TLCS900_P6FC 0x15
+#define TLCS900_P7CR 0x16
+#define TLCS900_P7FC 0x17
+#define TLCS900_P8 0x18
+#define TLCS900_P9 0x19
+#define TLCS900_P8CR 0x1a
+#define TLCS900_P8FC 0x1b
+#define TLCS900_PA 0x1e
+#define TLCS900_PB 0x1f
+#define TLCS900_TRUN 0x20
+#define TLCS900_TREG0 0x22
+#define TLCS900_TREG1 0x23
+#define TLCS900_T01MOD 0x24
+#define TLCS900_TFFCR 0x25
+#define TLCS900_TREG2 0x26
+#define TLCS900_TREG3 0x27
+#define TLCS900_T23MOD 0x28
+#define TLCS900_TRDC 0x29
+#define TLCS900_PACR 0x2c
+#define TLCS900_PAFC 0x2d
+#define TLCS900_PBCR 0x2e
+#define TLCS900_PBFC 0x2f
+#define TLCS900_TREG4L 0x30
+#define TLCS900_TREG4H 0x31
+#define TLCS900_TREG5L 0x32
+#define TLCS900_TREG5H 0x33
+#define TLCS900_CAP1L 0x34
+#define TLCS900_CAP1H 0x35
+#define TLCS900_CAP2L 0x36
+#define TLCS900_CAP2H 0x37
+#define TLCS900_T4MOD 0x38
+#define TLCS900_T4FFCR 0x39
+#define TLCS900_T45CR 0x3a
+#define TLCS900_MSAR0 0x3c
+#define TLCS900_MAMR0 0x3d
+#define TLCS900_MSAR1 0x3e
+#define TLCS900_MAMR1 0x3f
+#define TLCS900_TREG6L 0x40
+#define TLCS900_TREG6H 0x41
+#define TLCS900_TREG7L 0x42
+#define TLCS900_TREG7H 0x43
+#define TLCS900_CAP3L 0x44
+#define TLCS900_CAP3H 0x45
+#define TLCS900_CAP4L 0x46
+#define TLCS900_CAP4H 0x47
+#define TLCS900_T5MOD 0x48
+#define TLCS900_T5FFCR 0x49
+#define TLCS900_PG0REG 0x4c
+#define TLCS900_PG1REG 0x4d
+#define TLCS900_PG01CR 0x4e
+#define TLCS900_SC0BUF 0x50
+#define TLCS900_SC0CR 0x51
+#define TLCS900_SC0MOD 0x52
+#define TLCS900_BR0CR 0x53
+#define TLCS900_SC1BUF 0x54
+#define TLCS900_SC1CR 0x55
+#define TLCS900_SC1MOD 0x56
+#define TLCS900_BR1CR 0x57
+#define TLCS900_ODE 0x58
+#define TLCS900_DREFCR 0x5a
+#define TLCS900_DMEMCR 0x5b
+#define TLCS900_MSAR2 0x5c
+#define TLCS900_MAMR2 0x5d
+#define TLCS900_MSAR3 0x5e
+#define TLCS900_MAMR3 0x5f
+#define TLCS900_ADREG0L 0x60
+#define TLCS900_ADREG0H 0x61
+#define TLCS900_ADREG1L 0x62
+#define TLCS900_ADREG1H 0x63
+#define TLCS900_ADREG2L 0x64
+#define TLCS900_ADREG2H 0x65
+#define TLCS900_ADREG3L 0x66
+#define TLCS900_ADREG3H 0x67
+#define TLCS900_B0CS 0x68
+#define TLCS900_B1CS 0x69
+#define TLCS900_B2CS 0x6a
+#define TLCS900_B3CS 0x6b
+#define TLCS900_BEXCS 0x6c
+#define TLCS900_ADMOD 0x6d
+#define TLCS900_WDMOD 0x6e
+#define TLCS900_WDCR 0x6f
+#define TLCS900_INTE0AD 0x70
+#define TLCS900_INTE45 0x71
+#define TLCS900_INTE67 0x72
+#define TLCS900_INTET10 0x73
+#define TLCS900_INTET32 0x74
+#define TLCS900_INTET54 0x75
+#define TLCS900_INTET76 0x76
+#define TLCS900_INTES0 0x77
+#define TLCS900_INTES1 0x78
+#define TLCS900_INTETC10 0x79
+#define TLCS900_INTETC32 0x7a
+#define TLCS900_IIMC 0x7b
+#define TLCS900_DMA0V 0x7c
+#define TLCS900_DMA1V 0x7d
+#define TLCS900_DMA2V 0x7e
+#define TLCS900_DMA3V 0x7f
/* Flag defines */
-#define FLAG_CF 0x01
-#define FLAG_NF 0x02
-#define FLAG_VF 0x04
-#define FLAG_HF 0x10
-#define FLAG_ZF 0x40
-#define FLAG_SF 0x80
+#define FLAG_CF 0x01
+#define FLAG_NF 0x02
+#define FLAG_VF 0x04
+#define FLAG_HF 0x10
+#define FLAG_ZF 0x40
+#define FLAG_SF 0x80
-#define RDMEM(addr) cpustate->program->read_byte( addr )
-#define WRMEM(addr,data) cpustate->program->write_byte( addr, data )
-#define RDMEMW(addr) ( RDMEM(addr) | ( RDMEM(addr+1) << 8 ) )
-#define RDMEML(addr) ( RDMEMW(addr) | ( RDMEMW(addr+2) << 16 ) )
-#define WRMEMW(addr,data) { UINT16 dw = data; WRMEM(addr,dw & 0xff); WRMEM(addr+1,(dw >> 8 )); }
-#define WRMEML(addr,data) { UINT32 dl = data; WRMEMW(addr,dl); WRMEMW(addr+2,(dl >> 16)); }
+#define RDMEM(addr) cpustate->program->read_byte( addr )
+#define WRMEM(addr,data) cpustate->program->write_byte( addr, data )
+#define RDMEMW(addr) ( RDMEM(addr) | ( RDMEM(addr+1) << 8 ) )
+#define RDMEML(addr) ( RDMEMW(addr) | ( RDMEMW(addr+2) << 16 ) )
+#define WRMEMW(addr,data) { UINT16 dw = data; WRMEM(addr,dw & 0xff); WRMEM(addr+1,(dw >> 8 )); }
+#define WRMEML(addr,data) { UINT32 dl = data; WRMEMW(addr,dl); WRMEMW(addr+2,(dl >> 16)); }
INLINE UINT8 RDOP( tlcs900_state *cpustate )
@@ -386,36 +386,36 @@ static CPU_EXIT( tlcs900 )
#include "900tbl.c"
-#define TLCS900_NUM_MASKABLE_IRQS 22
+#define TLCS900_NUM_MASKABLE_IRQS 22
static const struct {
UINT8 reg;
UINT8 iff;
UINT8 vector;
} tlcs900_irq_vector_map[TLCS900_NUM_MASKABLE_IRQS] =
{
- { TLCS900_INTETC32, 0x80, 0x80 }, /* INTTC3 */
- { TLCS900_INTETC32, 0x08, 0x7c }, /* INTTC2 */
- { TLCS900_INTETC10, 0x80, 0x78 }, /* INTTC1 */
- { TLCS900_INTETC10, 0x08, 0x74 }, /* INTTC0 */
- { TLCS900_INTE0AD, 0x80, 0x70 }, /* INTAD */
- { TLCS900_INTES1, 0x80, 0x6c }, /* INTTX1 */
- { TLCS900_INTES1, 0x08, 0x68 }, /* INTRX1 */
- { TLCS900_INTES0, 0x80, 0x64 }, /* INTTX0 */
- { TLCS900_INTES0, 0x08, 0x60 }, /* INTRX0 */
- { TLCS900_INTET76, 0x80, 0x5c }, /* INTTR7 */
- { TLCS900_INTET76, 0x08, 0x58 }, /* INTTR6 */
- { TLCS900_INTET54, 0x80, 0x54 }, /* INTTR5 */
- { TLCS900_INTET54, 0x08, 0x50 }, /* INTTR4 */
- { TLCS900_INTET32, 0x80, 0x4c }, /* INTT3 */
- { TLCS900_INTET32, 0x08, 0x48 }, /* INTT2 */
- { TLCS900_INTET10, 0x80, 0x44 }, /* INTT1 */
- { TLCS900_INTET10, 0x08, 0x40 }, /* INTT0 */
+ { TLCS900_INTETC32, 0x80, 0x80 }, /* INTTC3 */
+ { TLCS900_INTETC32, 0x08, 0x7c }, /* INTTC2 */
+ { TLCS900_INTETC10, 0x80, 0x78 }, /* INTTC1 */
+ { TLCS900_INTETC10, 0x08, 0x74 }, /* INTTC0 */
+ { TLCS900_INTE0AD, 0x80, 0x70 }, /* INTAD */
+ { TLCS900_INTES1, 0x80, 0x6c }, /* INTTX1 */
+ { TLCS900_INTES1, 0x08, 0x68 }, /* INTRX1 */
+ { TLCS900_INTES0, 0x80, 0x64 }, /* INTTX0 */
+ { TLCS900_INTES0, 0x08, 0x60 }, /* INTRX0 */
+ { TLCS900_INTET76, 0x80, 0x5c }, /* INTTR7 */
+ { TLCS900_INTET76, 0x08, 0x58 }, /* INTTR6 */
+ { TLCS900_INTET54, 0x80, 0x54 }, /* INTTR5 */
+ { TLCS900_INTET54, 0x08, 0x50 }, /* INTTR4 */
+ { TLCS900_INTET32, 0x80, 0x4c }, /* INTT3 */
+ { TLCS900_INTET32, 0x08, 0x48 }, /* INTT2 */
+ { TLCS900_INTET10, 0x80, 0x44 }, /* INTT1 */
+ { TLCS900_INTET10, 0x08, 0x40 }, /* INTT0 */
/* 0x3c - reserved */
- { TLCS900_INTE67, 0x80, 0x38 }, /* INT7 */
- { TLCS900_INTE67, 0x08, 0x34 }, /* INT6 */
- { TLCS900_INTE45, 0x80, 0x30 }, /* INT5 */
- { TLCS900_INTE45, 0x08, 0x2c }, /* INT4 */
- { TLCS900_INTE0AD, 0x08, 0x28 } /* INT0 */
+ { TLCS900_INTE67, 0x80, 0x38 }, /* INT7 */
+ { TLCS900_INTE67, 0x08, 0x34 }, /* INT6 */
+ { TLCS900_INTE45, 0x80, 0x30 }, /* INT5 */
+ { TLCS900_INTE45, 0x08, 0x2c }, /* INT4 */
+ { TLCS900_INTE0AD, 0x08, 0x28 } /* INT0 */
};
@@ -652,13 +652,13 @@ INLINE void tlcs900_handle_ad( tlcs900_state *cpustate )
/* Store A/D converted value */
switch( cpustate->reg[TLCS900_ADMOD] & 0x03 )
{
- case 0x00: /* AN0 */
+ case 0x00: /* AN0 */
cpustate->reg[TLCS900_ADREG0L] |= 0xc0;
cpustate->reg[TLCS900_ADREG0H] = 0xff;
break;
- case 0x01: /* AN1 */
- case 0x02: /* AN2 */
- case 0x03: /* AN3 */
+ case 0x01: /* AN1 */
+ case 0x02: /* AN2 */
+ case 0x03: /* AN3 */
break;
}
@@ -724,7 +724,7 @@ INLINE void tlcs900_change_tff( tlcs900_state *cpustate, int which, int change )
INLINE void tlcs900_handle_timers( tlcs900_state *cpustate )
{
- UINT32 old_pre = cpustate->timer_pre;
+ UINT32 old_pre = cpustate->timer_pre;
/* Is the pre-scaler active */
if ( cpustate->reg[TLCS900_TRUN] & 0x80 )
@@ -735,15 +735,15 @@ INLINE void tlcs900_handle_timers( tlcs900_state *cpustate )
{
switch( cpustate->reg[TLCS900_T01MOD] & 0x03 )
{
- case 0x00: /* TIO */
+ case 0x00: /* TIO */
break;
- case 0x01: /* T1 */
+ case 0x01: /* T1 */
cpustate->timer_change[0] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T4 */
+ case 0x02: /* T4 */
cpustate->timer_change[0] += ( cpustate->timer_pre >> 9 ) - ( old_pre >> 9 );
break;
- case 0x03: /* T16 */
+ case 0x03: /* T16 */
cpustate->timer_change[0] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
}
@@ -774,15 +774,15 @@ INLINE void tlcs900_handle_timers( tlcs900_state *cpustate )
{
switch( ( cpustate->reg[TLCS900_T01MOD] >> 2 ) & 0x03 )
{
- case 0x00: /* TO0TRG */
+ case 0x00: /* TO0TRG */
break;
- case 0x01: /* T1 */
+ case 0x01: /* T1 */
cpustate->timer_change[1] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T16 */
+ case 0x02: /* T16 */
cpustate->timer_change[1] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
- case 0x03: /* T256 */
+ case 0x03: /* T256 */
cpustate->timer_change[1] += ( cpustate->timer_pre >> 15 ) - ( old_pre >> 15 );
break;
}
@@ -814,14 +814,14 @@ INLINE void tlcs900_handle_timers( tlcs900_state *cpustate )
{
switch( cpustate->reg[TLCS900_T23MOD] & 0x03 )
{
- case 0x00: /* invalid */
- case 0x01: /* T1 */
+ case 0x00: /* invalid */
+ case 0x01: /* T1 */
cpustate->timer_change[2] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T4 */
+ case 0x02: /* T4 */
cpustate->timer_change[2] += ( cpustate->timer_pre >> 9 ) - ( old_pre >> 9 );
break;
- case 0x03: /* T16 */
+ case 0x03: /* T16 */
cpustate->timer_change[2] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
}
@@ -851,15 +851,15 @@ INLINE void tlcs900_handle_timers( tlcs900_state *cpustate )
{
switch( ( cpustate->reg[TLCS900_T23MOD] >> 2 ) & 0x03 )
{
- case 0x00: /* TO2TRG */
+ case 0x00: /* TO2TRG */
break;
- case 0x01: /* T1 */
+ case 0x01: /* T1 */
cpustate->timer_change[3] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T16 */
+ case 0x02: /* T16 */
cpustate->timer_change[3] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
- case 0x03: /* T256 */
+ case 0x03: /* T256 */
cpustate->timer_change[3] += ( cpustate->timer_pre >> 15 ) - ( old_pre >> 15 );
break;
}
@@ -998,7 +998,7 @@ static void tlcs900_input_level_change( tlcs900_state *cpustate, int input, int
cpustate->level[TLCS900_INT5] = level;
break;
- case TLCS900_TIO: /* External timer input for timer 0 */
+ case TLCS900_TIO: /* External timer input for timer 0 */
if ( ( cpustate->reg[TLCS900_TRUN] & 0x01 ) && ( cpustate->reg[TLCS900_T01MOD] & 0x03 ) == 0x00 )
{
if ( cpustate->level[TLCS900_TIO] == CLEAR_LINE && level == ASSERT_LINE )
@@ -1161,64 +1161,64 @@ CPU_GET_INFO( tlcs900h )
switch( state )
{
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tlcs900_state); break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 7; break; /* FIXME */
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; /* FIXME */
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break; /* FIXME */
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tlcs900_state); break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 7; break; /* FIXME */
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break; /* FIXME */
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break; /* FIXME */
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI:
- case CPUINFO_INT_INPUT_STATE + TLCS900_NMI: info->i = cpustate->level[TLCS900_NMI]; break;
- case CPUINFO_INT_INPUT_STATE + TLCS900_INTWD: info->i = cpustate->level[TLCS900_INTWD]; break;
- case CPUINFO_INT_INPUT_STATE + TLCS900_INT0: info->i = cpustate->level[TLCS900_INT0]; break;
- case CPUINFO_INT_INPUT_STATE + TLCS900_INT4: info->i = cpustate->level[TLCS900_INT4]; break;
- case CPUINFO_INT_INPUT_STATE + TLCS900_INT5: info->i = cpustate->level[TLCS900_INT5]; break;
- case CPUINFO_INT_INPUT_STATE + TLCS900_TIO: info->i = cpustate->level[TLCS900_TIO]; break;
-
- case CPUINFO_INT_PC: info->i = cpustate->pc.d; break;
- case CPUINFO_INT_REGISTER + TLCS900_PC: info->i = cpustate->pc.d; break;
- case CPUINFO_INT_REGISTER + TLCS900_SR: info->i = cpustate->sr.d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XWA0: info->i = cpustate->xwa[0].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XBC0: info->i = cpustate->xbc[0].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XDE0: info->i = cpustate->xde[0].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XHL0: info->i = cpustate->xhl[0].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XWA1: info->i = cpustate->xwa[1].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XBC1: info->i = cpustate->xbc[1].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XDE1: info->i = cpustate->xde[1].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XHL1: info->i = cpustate->xhl[1].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XWA2: info->i = cpustate->xwa[2].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XBC2: info->i = cpustate->xbc[2].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XDE2: info->i = cpustate->xde[2].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XHL2: info->i = cpustate->xhl[2].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XWA3: info->i = cpustate->xwa[3].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XBC3: info->i = cpustate->xbc[3].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XDE3: info->i = cpustate->xde[3].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XHL3: info->i = cpustate->xhl[3].d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XIX: info->i = cpustate->xix.d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XIY: info->i = cpustate->xiy.d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XIZ: info->i = cpustate->xiz.d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XNSP: info->i = cpustate->xnsp.d; break;
- case CPUINFO_INT_REGISTER + TLCS900_XSSP: info->i = cpustate->xssp.d; break;
-
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tlcs900); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tlcs900); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tlcs900); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tlcs900); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tlcs900); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tlcs900); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tlcs900_mem); break;
-
- case CPUINFO_STR_REGISTER + TLCS900_PC: sprintf( info->s, "PC:%08x", cpustate->pc.d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_SR: sprintf( info->s, "SR:%c%d%c%d%c%c%c%c%c%c%c%c",
+ case CPUINFO_INT_INPUT_STATE + TLCS900_NMI: info->i = cpustate->level[TLCS900_NMI]; break;
+ case CPUINFO_INT_INPUT_STATE + TLCS900_INTWD: info->i = cpustate->level[TLCS900_INTWD]; break;
+ case CPUINFO_INT_INPUT_STATE + TLCS900_INT0: info->i = cpustate->level[TLCS900_INT0]; break;
+ case CPUINFO_INT_INPUT_STATE + TLCS900_INT4: info->i = cpustate->level[TLCS900_INT4]; break;
+ case CPUINFO_INT_INPUT_STATE + TLCS900_INT5: info->i = cpustate->level[TLCS900_INT5]; break;
+ case CPUINFO_INT_INPUT_STATE + TLCS900_TIO: info->i = cpustate->level[TLCS900_TIO]; break;
+
+ case CPUINFO_INT_PC: info->i = cpustate->pc.d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_PC: info->i = cpustate->pc.d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_SR: info->i = cpustate->sr.d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XWA0: info->i = cpustate->xwa[0].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XBC0: info->i = cpustate->xbc[0].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XDE0: info->i = cpustate->xde[0].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XHL0: info->i = cpustate->xhl[0].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XWA1: info->i = cpustate->xwa[1].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XBC1: info->i = cpustate->xbc[1].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XDE1: info->i = cpustate->xde[1].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XHL1: info->i = cpustate->xhl[1].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XWA2: info->i = cpustate->xwa[2].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XBC2: info->i = cpustate->xbc[2].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XDE2: info->i = cpustate->xde[2].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XHL2: info->i = cpustate->xhl[2].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XWA3: info->i = cpustate->xwa[3].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XBC3: info->i = cpustate->xbc[3].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XDE3: info->i = cpustate->xde[3].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XHL3: info->i = cpustate->xhl[3].d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XIX: info->i = cpustate->xix.d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XIY: info->i = cpustate->xiy.d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XIZ: info->i = cpustate->xiz.d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XNSP: info->i = cpustate->xnsp.d; break;
+ case CPUINFO_INT_REGISTER + TLCS900_XSSP: info->i = cpustate->xssp.d; break;
+
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tlcs900); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tlcs900); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tlcs900); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tlcs900); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tlcs900); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tlcs900); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tlcs900_mem); break;
+
+ case CPUINFO_STR_REGISTER + TLCS900_PC: sprintf( info->s, "PC:%08x", cpustate->pc.d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_SR: sprintf( info->s, "SR:%c%d%c%d%c%c%c%c%c%c%c%c",
cpustate->sr.w.l & 0x8000 ? 'S' : 'U',
( cpustate->sr.w.l & 0x7000 ) >> 12,
cpustate->sr.w.l & 0x0800 ? 'M' : 'N',
@@ -1232,49 +1232,49 @@ CPU_GET_INFO( tlcs900h )
cpustate->sr.w.l & 0x0002 ? 'N' : '.',
cpustate->sr.w.l & 0x0001 ? 'C' : '.' );
break;
- case CPUINFO_STR_REGISTER + TLCS900_XWA0: sprintf( info->s, "XWA0:%08x", cpustate->xwa[0].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XBC0: sprintf( info->s, "XBC0:%08x", cpustate->xbc[0].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XDE0: sprintf( info->s, "XDE0:%08x", cpustate->xde[0].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XHL0: sprintf( info->s, "XHL0:%08x", cpustate->xhl[0].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XWA1: sprintf( info->s, "XWA1:%08x", cpustate->xwa[1].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XBC1: sprintf( info->s, "XBC1:%08x", cpustate->xbc[1].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XDE1: sprintf( info->s, "XDE1:%08x", cpustate->xde[1].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XHL1: sprintf( info->s, "XHL1:%08x", cpustate->xhl[1].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XWA2: sprintf( info->s, "XWA2:%08x", cpustate->xwa[2].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XBC2: sprintf( info->s, "XBC2:%08x", cpustate->xbc[2].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XDE2: sprintf( info->s, "XDE2:%08x", cpustate->xde[2].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XHL2: sprintf( info->s, "XHL2:%08x", cpustate->xhl[2].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XWA3: sprintf( info->s, "XWA3:%08x", cpustate->xwa[3].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XBC3: sprintf( info->s, "XBC3:%08x", cpustate->xbc[3].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XDE3: sprintf( info->s, "XDE3:%08x", cpustate->xde[3].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XHL3: sprintf( info->s, "XHL3:%08x", cpustate->xhl[3].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XIX: sprintf( info->s, "XIX:%08x", cpustate->xix.d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XIY: sprintf( info->s, "XIY:%08x", cpustate->xiy.d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XIZ: sprintf( info->s, "XIZ:%08x", cpustate->xiz.d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XNSP: sprintf( info->s, "XNSP:%08x", cpustate->xnsp.d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_XSSP: sprintf( info->s, "XSSP:%08x", cpustate->xssp.d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAS0: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[0].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAD0: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[0].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAC0: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[0].w.l ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAM0: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[0].b.l ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAS1: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[1].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAD1: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[1].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAC1: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[1].w.l ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAM1: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[1].b.l ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAS2: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[2].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAD2: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[2].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAC2: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[2].w.l ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAM2: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[2].b.l ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAS3: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[3].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAD3: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[3].d ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAC3: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[3].w.l ); break;
- case CPUINFO_STR_REGISTER + TLCS900_DMAM3: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[3].b.l ); break;
-
- case CPUINFO_STR_NAME: strcpy( info->s, "TLCS-900/H" ); break;
- case CPUINFO_STR_FAMILY: strcpy( info->s, "Toshiba TLCS-900" ); break;
- case CPUINFO_STR_VERSION: strcpy( info->s, "0.1" ); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
- case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright Wilbert Pol" ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XWA0: sprintf( info->s, "XWA0:%08x", cpustate->xwa[0].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XBC0: sprintf( info->s, "XBC0:%08x", cpustate->xbc[0].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XDE0: sprintf( info->s, "XDE0:%08x", cpustate->xde[0].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XHL0: sprintf( info->s, "XHL0:%08x", cpustate->xhl[0].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XWA1: sprintf( info->s, "XWA1:%08x", cpustate->xwa[1].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XBC1: sprintf( info->s, "XBC1:%08x", cpustate->xbc[1].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XDE1: sprintf( info->s, "XDE1:%08x", cpustate->xde[1].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XHL1: sprintf( info->s, "XHL1:%08x", cpustate->xhl[1].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XWA2: sprintf( info->s, "XWA2:%08x", cpustate->xwa[2].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XBC2: sprintf( info->s, "XBC2:%08x", cpustate->xbc[2].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XDE2: sprintf( info->s, "XDE2:%08x", cpustate->xde[2].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XHL2: sprintf( info->s, "XHL2:%08x", cpustate->xhl[2].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XWA3: sprintf( info->s, "XWA3:%08x", cpustate->xwa[3].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XBC3: sprintf( info->s, "XBC3:%08x", cpustate->xbc[3].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XDE3: sprintf( info->s, "XDE3:%08x", cpustate->xde[3].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XHL3: sprintf( info->s, "XHL3:%08x", cpustate->xhl[3].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XIX: sprintf( info->s, "XIX:%08x", cpustate->xix.d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XIY: sprintf( info->s, "XIY:%08x", cpustate->xiy.d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XIZ: sprintf( info->s, "XIZ:%08x", cpustate->xiz.d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XNSP: sprintf( info->s, "XNSP:%08x", cpustate->xnsp.d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_XSSP: sprintf( info->s, "XSSP:%08x", cpustate->xssp.d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAS0: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[0].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAD0: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[0].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAC0: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[0].w.l ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAM0: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[0].b.l ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAS1: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[1].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAD1: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[1].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAC1: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[1].w.l ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAM1: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[1].b.l ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAS2: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[2].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAD2: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[2].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAC2: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[2].w.l ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAM2: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[2].b.l ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAS3: sprintf( info->s, "DMAS0:%08x", cpustate->dmas[3].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAD3: sprintf( info->s, "DMAD0:%08x", cpustate->dmad[3].d ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAC3: sprintf( info->s, "DMAC0:%04x", cpustate->dmac[3].w.l ); break;
+ case CPUINFO_STR_REGISTER + TLCS900_DMAM3: sprintf( info->s, "DMAM0:%02x", cpustate->dmam[3].b.l ); break;
+
+ case CPUINFO_STR_NAME: strcpy( info->s, "TLCS-900/H" ); break;
+ case CPUINFO_STR_FAMILY: strcpy( info->s, "Toshiba TLCS-900" ); break;
+ case CPUINFO_STR_VERSION: strcpy( info->s, "0.1" ); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
+ case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright Wilbert Pol" ); break;
}
}
@@ -1284,188 +1284,188 @@ CPU_GET_INFO( tlcs900h )
/* TMP95C063 Internal register defines */
-#define TMP95C063_P1 0x01
-#define TMP95C063_P1CR 0x04
-#define TMP95C063_P2 0x06
-#define TMP95C063_P2FC 0x09
-#define TMP95C063_P5 0x0d
-#define TMP95C063_P5CR 0x10
-#define TMP95C063_P5FC 0x11
-#define TMP95C063_P6 0x12
-#define TMP95C063_P7 0x13
-#define TMP95C063_P6FC 0x15
-#define TMP95C063_P7CR 0x16
-#define TMP95C063_P7FC 0x17
-#define TMP95C063_P8 0x18
-#define TMP95C063_P9 0x19
-#define TMP95C063_P8CR 0x1a
-#define TMP95C063_P8FC 0x1b
-#define TMP95C063_P9CR 0x1c
-#define TMP95C063_P9FC 0x1d
-#define TMP95C063_PA 0x1e
-#define TMP95C063_PB 0x1f
-#define TMP95C063_T8RUN 0x20
-#define TMP95C063_TRDC 0x21
-#define TMP95C063_TREG0 0x22
-#define TMP95C063_TREG1 0x23
-#define TMP95C063_T01MOD 0x24
-#define TMP95C063_T02FFCR 0x25
-#define TMP95C063_TREG2 0x26
-#define TMP95C063_TREG3 0x27
-#define TMP95C063_T23MOD 0x28
-#define TMP95C063_TREG4 0x29
-#define TMP95C063_TREG5 0x2a
-#define TMP95C063_T45MOD 0x2b
-#define TMP95C063_T46FFCR 0x2c
-#define TMP95C063_TREG6 0x2d
-#define TMP95C063_TREG7 0x2e
-#define TMP95C063_T67MOD 0x2f
-#define TMP95C063_TREG8L 0x30
-#define TMP95C063_TREG8H 0x31
-#define TMP95C063_TREG9L 0x32
-#define TMP95C063_TREG9H 0x33
-#define TMP95C063_CAP1L 0x34
-#define TMP95C063_CAP1H 0x35
-#define TMP95C063_CAP2L 0x36
-#define TMP95C063_CAP2H 0x37
-#define TMP95C063_T8MOD 0x38
-#define TMP95C063_T8FFCR 0x39
-#define TMP95C063_T89CR 0x3a
-#define TMP95C063_T16RUN 0x3b
-#define TMP95C063_TREGAL 0x40
-#define TMP95C063_TREGAH 0x41
-#define TMP95C063_TREGBL 0x42
-#define TMP95C063_TREGBH 0x43
-#define TMP95C063_CAP3L 0x44
-#define TMP95C063_CAP3H 0x45
-#define TMP95C063_CAP4L 0x46
-#define TMP95C063_CAP4H 0x47
-#define TMP95C063_T9MOD 0x48
-#define TMP95C063_T9FFCR 0x49
-#define TMP95C063_DAREG0 0x4a
-#define TMP95C063_DAREG1 0x4b
-#define TMP95C063_PG0REG 0x4c
-#define TMP95C063_PG1REG 0x4d
-#define TMP95C063_PG01CR 0x4e
-#define TMP95C063_DADRV 0x4f
-#define TMP95C063_SC0BUF 0x50
-#define TMP95C063_SC0CR 0x51
-#define TMP95C063_SC0MOD 0x52
-#define TMP95C063_BR0CR 0x53
-#define TMP95C063_SC1BUF 0x54
-#define TMP95C063_SC1CR 0x55
-#define TMP95C063_SC1MOD 0x56
-#define TMP95C063_BR1CR 0x57
-#define TMP95C063_ODE 0x58
-#define TMP95C063_DMA0V 0x5a
-#define TMP95C063_DMA1V 0x5b
-#define TMP95C063_DMA2V 0x5c
-#define TMP95C063_DMA3V 0x5d
-#define TMP95C063_ADMOD1 0x5e
-#define TMP95C063_ADMOD2 0x5f
-#define TMP95C063_ADREG04L 0x60
-#define TMP95C063_ADREG04H 0x61
-#define TMP95C063_ADREG15L 0x62
-#define TMP95C063_ADREG15H 0x63
-#define TMP95C063_ADREG26L 0x64
-#define TMP95C063_ADREG26H 0x65
-#define TMP95C063_ADREG37L 0x66
-#define TMP95C063_ADREG37H 0x67
-#define TMP95C063_SDMACR0 0x6a
-#define TMP95C063_SDMACR1 0x6b
-#define TMP95C063_SDMACR2 0x6c
-#define TMP95C063_SDMACR3 0x6d
-#define TMP95C063_WDMOD 0x6e
-#define TMP95C063_WDCR 0x6f
-#define TMP95C063_INTE0AD 0x70
-#define TMP95C063_INTE12 0x71
-#define TMP95C063_INTE34 0x72
-#define TMP95C063_INTE56 0x73
-#define TMP95C063_INTE78 0x74
-#define TMP95C063_INTET01 0x75
-#define TMP95C063_INTET23 0x76
-#define TMP95C063_INTET45 0x77
-#define TMP95C063_INTET67 0x78
-#define TMP95C063_INTET89 0x79
-#define TMP95C063_INTETAB 0x7a
-#define TMP95C063_INTES0 0x7b
-#define TMP95C063_INTES1 0x7c
-#define TMP95C063_INTETC01 0x7d
-#define TMP95C063_INTETC23 0x7e
-#define TMP95C063_IIMC 0x7f
-#define TMP95C063_PACR 0x80
-#define TMP95C063_PAFC 0x81
-#define TMP95C063_PBCR 0x82
-#define TMP95C063_PBFC 0x83
-#define TMP95C063_PC 0x84
-#define TMP95C063_PD 0x85
-#define TMP95C063_PDCR 0x88
-#define TMP95C063_PE 0x8a
-#define TMP95C063_PECR 0x8c
-#define TMP95C063_BEXCS 0x8f
-#define TMP95C063_B0CS 0x90
-#define TMP95C063_B1CS 0x91
-#define TMP95C063_B2CS 0x92
-#define TMP95C063_B3CS 0x93
-#define TMP95C063_MSAR0 0x94
-#define TMP95C063_MAMR0 0x95
-#define TMP95C063_MSAR1 0x96
-#define TMP95C063_MAMR1 0x97
-#define TMP95C063_MSAR2 0x98
-#define TMP95C063_MAMR2 0x99
-#define TMP95C063_MSAR3 0x9a
-#define TMP95C063_MAMR3 0x9b
-#define TMP95C063_DREFCR1 0x9c
-#define TMP95C063_DMEMCR1 0x9d
-#define TMP95C063_DREFCR3 0x9e
-#define TMP95C063_DMEMCR3 0x9f
-
-
-#define TMP95C063_NUM_MASKABLE_IRQS 30
+#define TMP95C063_P1 0x01
+#define TMP95C063_P1CR 0x04
+#define TMP95C063_P2 0x06
+#define TMP95C063_P2FC 0x09
+#define TMP95C063_P5 0x0d
+#define TMP95C063_P5CR 0x10
+#define TMP95C063_P5FC 0x11
+#define TMP95C063_P6 0x12
+#define TMP95C063_P7 0x13
+#define TMP95C063_P6FC 0x15
+#define TMP95C063_P7CR 0x16
+#define TMP95C063_P7FC 0x17
+#define TMP95C063_P8 0x18
+#define TMP95C063_P9 0x19
+#define TMP95C063_P8CR 0x1a
+#define TMP95C063_P8FC 0x1b
+#define TMP95C063_P9CR 0x1c
+#define TMP95C063_P9FC 0x1d
+#define TMP95C063_PA 0x1e
+#define TMP95C063_PB 0x1f
+#define TMP95C063_T8RUN 0x20
+#define TMP95C063_TRDC 0x21
+#define TMP95C063_TREG0 0x22
+#define TMP95C063_TREG1 0x23
+#define TMP95C063_T01MOD 0x24
+#define TMP95C063_T02FFCR 0x25
+#define TMP95C063_TREG2 0x26
+#define TMP95C063_TREG3 0x27
+#define TMP95C063_T23MOD 0x28
+#define TMP95C063_TREG4 0x29
+#define TMP95C063_TREG5 0x2a
+#define TMP95C063_T45MOD 0x2b
+#define TMP95C063_T46FFCR 0x2c
+#define TMP95C063_TREG6 0x2d
+#define TMP95C063_TREG7 0x2e
+#define TMP95C063_T67MOD 0x2f
+#define TMP95C063_TREG8L 0x30
+#define TMP95C063_TREG8H 0x31
+#define TMP95C063_TREG9L 0x32
+#define TMP95C063_TREG9H 0x33
+#define TMP95C063_CAP1L 0x34
+#define TMP95C063_CAP1H 0x35
+#define TMP95C063_CAP2L 0x36
+#define TMP95C063_CAP2H 0x37
+#define TMP95C063_T8MOD 0x38
+#define TMP95C063_T8FFCR 0x39
+#define TMP95C063_T89CR 0x3a
+#define TMP95C063_T16RUN 0x3b
+#define TMP95C063_TREGAL 0x40
+#define TMP95C063_TREGAH 0x41
+#define TMP95C063_TREGBL 0x42
+#define TMP95C063_TREGBH 0x43
+#define TMP95C063_CAP3L 0x44
+#define TMP95C063_CAP3H 0x45
+#define TMP95C063_CAP4L 0x46
+#define TMP95C063_CAP4H 0x47
+#define TMP95C063_T9MOD 0x48
+#define TMP95C063_T9FFCR 0x49
+#define TMP95C063_DAREG0 0x4a
+#define TMP95C063_DAREG1 0x4b
+#define TMP95C063_PG0REG 0x4c
+#define TMP95C063_PG1REG 0x4d
+#define TMP95C063_PG01CR 0x4e
+#define TMP95C063_DADRV 0x4f
+#define TMP95C063_SC0BUF 0x50
+#define TMP95C063_SC0CR 0x51
+#define TMP95C063_SC0MOD 0x52
+#define TMP95C063_BR0CR 0x53
+#define TMP95C063_SC1BUF 0x54
+#define TMP95C063_SC1CR 0x55
+#define TMP95C063_SC1MOD 0x56
+#define TMP95C063_BR1CR 0x57
+#define TMP95C063_ODE 0x58
+#define TMP95C063_DMA0V 0x5a
+#define TMP95C063_DMA1V 0x5b
+#define TMP95C063_DMA2V 0x5c
+#define TMP95C063_DMA3V 0x5d
+#define TMP95C063_ADMOD1 0x5e
+#define TMP95C063_ADMOD2 0x5f
+#define TMP95C063_ADREG04L 0x60
+#define TMP95C063_ADREG04H 0x61
+#define TMP95C063_ADREG15L 0x62
+#define TMP95C063_ADREG15H 0x63
+#define TMP95C063_ADREG26L 0x64
+#define TMP95C063_ADREG26H 0x65
+#define TMP95C063_ADREG37L 0x66
+#define TMP95C063_ADREG37H 0x67
+#define TMP95C063_SDMACR0 0x6a
+#define TMP95C063_SDMACR1 0x6b
+#define TMP95C063_SDMACR2 0x6c
+#define TMP95C063_SDMACR3 0x6d
+#define TMP95C063_WDMOD 0x6e
+#define TMP95C063_WDCR 0x6f
+#define TMP95C063_INTE0AD 0x70
+#define TMP95C063_INTE12 0x71
+#define TMP95C063_INTE34 0x72
+#define TMP95C063_INTE56 0x73
+#define TMP95C063_INTE78 0x74
+#define TMP95C063_INTET01 0x75
+#define TMP95C063_INTET23 0x76
+#define TMP95C063_INTET45 0x77
+#define TMP95C063_INTET67 0x78
+#define TMP95C063_INTET89 0x79
+#define TMP95C063_INTETAB 0x7a
+#define TMP95C063_INTES0 0x7b
+#define TMP95C063_INTES1 0x7c
+#define TMP95C063_INTETC01 0x7d
+#define TMP95C063_INTETC23 0x7e
+#define TMP95C063_IIMC 0x7f
+#define TMP95C063_PACR 0x80
+#define TMP95C063_PAFC 0x81
+#define TMP95C063_PBCR 0x82
+#define TMP95C063_PBFC 0x83
+#define TMP95C063_PC 0x84
+#define TMP95C063_PD 0x85
+#define TMP95C063_PDCR 0x88
+#define TMP95C063_PE 0x8a
+#define TMP95C063_PECR 0x8c
+#define TMP95C063_BEXCS 0x8f
+#define TMP95C063_B0CS 0x90
+#define TMP95C063_B1CS 0x91
+#define TMP95C063_B2CS 0x92
+#define TMP95C063_B3CS 0x93
+#define TMP95C063_MSAR0 0x94
+#define TMP95C063_MAMR0 0x95
+#define TMP95C063_MSAR1 0x96
+#define TMP95C063_MAMR1 0x97
+#define TMP95C063_MSAR2 0x98
+#define TMP95C063_MAMR2 0x99
+#define TMP95C063_MSAR3 0x9a
+#define TMP95C063_MAMR3 0x9b
+#define TMP95C063_DREFCR1 0x9c
+#define TMP95C063_DMEMCR1 0x9d
+#define TMP95C063_DREFCR3 0x9e
+#define TMP95C063_DMEMCR3 0x9f
+
+
+#define TMP95C063_NUM_MASKABLE_IRQS 30
static const struct {
UINT8 reg;
UINT8 iff;
UINT8 vector;
} tmp95c063_irq_vector_map[TMP95C063_NUM_MASKABLE_IRQS] =
{
- { TMP95C063_INTETC23, 0x80, 0xa0 }, /* INTTC3 */
- { TMP95C063_INTETC23, 0x08, 0x9c }, /* INTTC2 */
- { TMP95C063_INTETC01, 0x80, 0x98 }, /* INTTC1 */
- { TMP95C063_INTETC01, 0x08, 0x94 }, /* INTTC0 */
- { TMP95C063_INTE0AD, 0x80, 0x90 }, /* INTAD */
- { TMP95C063_INTES1, 0x80, 0x8c }, /* INTTX1 */
- { TMP95C063_INTES1, 0x08, 0x88 }, /* INTRX1 */
- { TMP95C063_INTES0, 0x80, 0x84 }, /* INTTX0 */
- { TMP95C063_INTES0, 0x08, 0x80 }, /* INTRX0 */
- { TMP95C063_INTETAB, 0x80, 0x7c }, /* INTTRB */
- { TMP95C063_INTETAB, 0x08, 0x78 }, /* INTTRA */
- { TMP95C063_INTET89, 0x80, 0x74 }, /* INTTR9 */
- { TMP95C063_INTET89, 0x80, 0x70 }, /* INTTR8 */
- { TMP95C063_INTET67, 0x80, 0x6c }, /* INTT7 */
- { TMP95C063_INTET67, 0x08, 0x68 }, /* INTT6 */
- { TMP95C063_INTET45, 0x80, 0x64 }, /* INTT5 */
- { TMP95C063_INTET45, 0x08, 0x60 }, /* INTT4 */
- { TMP95C063_INTET23, 0x80, 0x5c }, /* INTT3 */
- { TMP95C063_INTET23, 0x08, 0x58 }, /* INTT2 */
- { TMP95C063_INTET01, 0x80, 0x54 }, /* INTT1 */
- { TMP95C063_INTET01, 0x08, 0x50 }, /* INTT0 */
- { TMP95C063_INTE78, 0x80, 0x4c }, /* INT8 */
- { TMP95C063_INTE78, 0x08, 0x48 }, /* INT7 */
- { TMP95C063_INTE56, 0x80, 0x44 }, /* INT6 */
- { TMP95C063_INTE56, 0x08, 0x40 }, /* INT5 */
+ { TMP95C063_INTETC23, 0x80, 0xa0 }, /* INTTC3 */
+ { TMP95C063_INTETC23, 0x08, 0x9c }, /* INTTC2 */
+ { TMP95C063_INTETC01, 0x80, 0x98 }, /* INTTC1 */
+ { TMP95C063_INTETC01, 0x08, 0x94 }, /* INTTC0 */
+ { TMP95C063_INTE0AD, 0x80, 0x90 }, /* INTAD */
+ { TMP95C063_INTES1, 0x80, 0x8c }, /* INTTX1 */
+ { TMP95C063_INTES1, 0x08, 0x88 }, /* INTRX1 */
+ { TMP95C063_INTES0, 0x80, 0x84 }, /* INTTX0 */
+ { TMP95C063_INTES0, 0x08, 0x80 }, /* INTRX0 */
+ { TMP95C063_INTETAB, 0x80, 0x7c }, /* INTTRB */
+ { TMP95C063_INTETAB, 0x08, 0x78 }, /* INTTRA */
+ { TMP95C063_INTET89, 0x80, 0x74 }, /* INTTR9 */
+ { TMP95C063_INTET89, 0x80, 0x70 }, /* INTTR8 */
+ { TMP95C063_INTET67, 0x80, 0x6c }, /* INTT7 */
+ { TMP95C063_INTET67, 0x08, 0x68 }, /* INTT6 */
+ { TMP95C063_INTET45, 0x80, 0x64 }, /* INTT5 */
+ { TMP95C063_INTET45, 0x08, 0x60 }, /* INTT4 */
+ { TMP95C063_INTET23, 0x80, 0x5c }, /* INTT3 */
+ { TMP95C063_INTET23, 0x08, 0x58 }, /* INTT2 */
+ { TMP95C063_INTET01, 0x80, 0x54 }, /* INTT1 */
+ { TMP95C063_INTET01, 0x08, 0x50 }, /* INTT0 */
+ { TMP95C063_INTE78, 0x80, 0x4c }, /* INT8 */
+ { TMP95C063_INTE78, 0x08, 0x48 }, /* INT7 */
+ { TMP95C063_INTE56, 0x80, 0x44 }, /* INT6 */
+ { TMP95C063_INTE56, 0x08, 0x40 }, /* INT5 */
/* 0x3c - reserved */
- { TMP95C063_INTE34, 0x80, 0x38 }, /* INT4 */
- { TMP95C063_INTE34, 0x08, 0x34 }, /* INT3 */
- { TMP95C063_INTE12, 0x80, 0x30 }, /* INT2 */
- { TMP95C063_INTE12, 0x08, 0x2c }, /* INT1 */
- { TMP95C063_INTE0AD, 0x08, 0x28 } /* INT0 */
+ { TMP95C063_INTE34, 0x80, 0x38 }, /* INT4 */
+ { TMP95C063_INTE34, 0x08, 0x34 }, /* INT3 */
+ { TMP95C063_INTE12, 0x80, 0x30 }, /* INT2 */
+ { TMP95C063_INTE12, 0x08, 0x2c }, /* INT1 */
+ { TMP95C063_INTE0AD, 0x08, 0x28 } /* INT0 */
};
INLINE void tmp95c063_handle_timers( tlcs900_state *cpustate )
{
// TODO: implement timers 4-7
- UINT32 old_pre = cpustate->timer_pre;
+ UINT32 old_pre = cpustate->timer_pre;
/* Is the pre-scaler active */
if ( cpustate->reg[TMP95C063_T8RUN] & 0x80 )
@@ -1476,15 +1476,15 @@ INLINE void tmp95c063_handle_timers( tlcs900_state *cpustate )
{
switch( cpustate->reg[TMP95C063_T01MOD] & 0x03 )
{
- case 0x00: /* TIO */
+ case 0x00: /* TIO */
break;
- case 0x01: /* T1 */
+ case 0x01: /* T1 */
cpustate->timer_change[0] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T4 */
+ case 0x02: /* T4 */
cpustate->timer_change[0] += ( cpustate->timer_pre >> 9 ) - ( old_pre >> 9 );
break;
- case 0x03: /* T16 */
+ case 0x03: /* T16 */
cpustate->timer_change[0] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
}
@@ -1515,15 +1515,15 @@ INLINE void tmp95c063_handle_timers( tlcs900_state *cpustate )
{
switch( ( cpustate->reg[TMP95C063_T01MOD] >> 2 ) & 0x03 )
{
- case 0x00: /* TO0TRG */
+ case 0x00: /* TO0TRG */
break;
- case 0x01: /* T1 */
+ case 0x01: /* T1 */
cpustate->timer_change[1] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T16 */
+ case 0x02: /* T16 */
cpustate->timer_change[1] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
- case 0x03: /* T256 */
+ case 0x03: /* T256 */
cpustate->timer_change[1] += ( cpustate->timer_pre >> 15 ) - ( old_pre >> 15 );
break;
}
@@ -1555,14 +1555,14 @@ INLINE void tmp95c063_handle_timers( tlcs900_state *cpustate )
{
switch( cpustate->reg[TMP95C063_T23MOD] & 0x03 )
{
- case 0x00: /* invalid */
- case 0x01: /* T1 */
+ case 0x00: /* invalid */
+ case 0x01: /* T1 */
cpustate->timer_change[2] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T4 */
+ case 0x02: /* T4 */
cpustate->timer_change[2] += ( cpustate->timer_pre >> 9 ) - ( old_pre >> 9 );
break;
- case 0x03: /* T16 */
+ case 0x03: /* T16 */
cpustate->timer_change[2] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
}
@@ -1592,15 +1592,15 @@ INLINE void tmp95c063_handle_timers( tlcs900_state *cpustate )
{
switch( ( cpustate->reg[TMP95C063_T23MOD] >> 2 ) & 0x03 )
{
- case 0x00: /* TO2TRG */
+ case 0x00: /* TO2TRG */
break;
- case 0x01: /* T1 */
+ case 0x01: /* T1 */
cpustate->timer_change[3] += ( cpustate->timer_pre >> 7 ) - ( old_pre >> 7 );
break;
- case 0x02: /* T16 */
+ case 0x02: /* T16 */
cpustate->timer_change[3] += ( cpustate->timer_pre >> 11 ) - ( old_pre >> 11 );
break;
- case 0x03: /* T256 */
+ case 0x03: /* T256 */
cpustate->timer_change[3] += ( cpustate->timer_pre >> 15 ) - ( old_pre >> 15 );
break;
}
@@ -2090,7 +2090,7 @@ static void tmp95c063_input_level_change( tlcs900_state *cpustate, int input, in
cpustate->level[TLCS900_INT5] = level;
break;
- case TLCS900_TIO: /* External timer input for timer 0 */
+ case TLCS900_TIO: /* External timer input for timer 0 */
if ( ( cpustate->reg[TMP95C063_T8RUN] & 0x01 ) && ( cpustate->reg[TMP95C063_T01MOD] & 0x03 ) == 0x00 )
{
if ( cpustate->level[TLCS900_TIO] == CLEAR_LINE && level == ASSERT_LINE )
@@ -2139,18 +2139,18 @@ CPU_GET_INFO( tmp95c063 )
switch( state )
{
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tmp95c063); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tlcs900); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tmp95c063); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tlcs900); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tmp95c063); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tlcs900); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp95c063_mem); break;
-
- case CPUINFO_STR_NAME: strcpy( info->s, "TMP95C063" ); break;
-
- default: CPU_GET_INFO_CALL(tlcs900h); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tmp95c063); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tlcs900); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tmp95c063); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tlcs900); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tmp95c063); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tlcs900); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tmp95c063_mem); break;
+
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMP95C063" ); break;
+
+ default: CPU_GET_INFO_CALL(tlcs900h); break;
}
}
diff --git a/src/emu/cpu/tlcs900/tlcs900.h b/src/emu/cpu/tlcs900/tlcs900.h
index 296663761c5..5a62a67b6ef 100644
--- a/src/emu/cpu/tlcs900/tlcs900.h
+++ b/src/emu/cpu/tlcs900/tlcs900.h
@@ -39,10 +39,10 @@ enum
struct tlcs900_interface
{
- devcb_write8 to1;
- devcb_write8 to3;
- devcb_read8 port_read;
- devcb_write8 port_write;
+ devcb_write8 to1;
+ devcb_write8 to3;
+ devcb_read8 port_read;
+ devcb_write8 port_write;
};
diff --git a/src/emu/cpu/tms0980/tms0980.c b/src/emu/cpu/tms0980/tms0980.c
index 53d69e75581..1d7f5a0d683 100644
--- a/src/emu/cpu/tms0980/tms0980.c
+++ b/src/emu/cpu/tms0980/tms0980.c
@@ -123,151 +123,151 @@ unknown cycle: CME, SSE, SSS
#include "debugger.h"
#include "tms0980.h"
-#define LOG 0
+#define LOG 0
-#define MICRO_MASK 0x80000000
-#define FIXED_INSTRUCTION 0x00000000
+#define MICRO_MASK 0x80000000
+#define FIXED_INSTRUCTION 0x00000000
/* Standard/fixed intructions */
-#define F_ILL 0x00000000
-#define F_BR 0x00000001
-#define F_CALL 0x00000002
-#define F_CLO 0x00000004
-#define F_COMC 0x00000008
-#define F_COMX 0x00000010
-#define F_COMX8 0x00000020
-#define F_LDP 0x00000040
-#define F_LDX 0x00000080
-#define F_OFF 0x00000100
-#define F_RBIT 0x00000200
-#define F_REAC 0x00000400
-#define F_RETN 0x00000800
-#define F_RSTR 0x00001000
-#define F_SAL 0x00002000
-#define F_SBIT 0x00004000
-#define F_SBL 0x00008000
-#define F_SEAC 0x00010000
-#define F_SETR 0x00020000
-#define F_TDO 0x00040000
+#define F_ILL 0x00000000
+#define F_BR 0x00000001
+#define F_CALL 0x00000002
+#define F_CLO 0x00000004
+#define F_COMC 0x00000008
+#define F_COMX 0x00000010
+#define F_COMX8 0x00000020
+#define F_LDP 0x00000040
+#define F_LDX 0x00000080
+#define F_OFF 0x00000100
+#define F_RBIT 0x00000200
+#define F_REAC 0x00000400
+#define F_RETN 0x00000800
+#define F_RSTR 0x00001000
+#define F_SAL 0x00002000
+#define F_SBIT 0x00004000
+#define F_SBL 0x00008000
+#define F_SEAC 0x00010000
+#define F_SETR 0x00020000
+#define F_TDO 0x00040000
/* Microinstructions */
-#define M_15TN 0x00000001
-#define M_ATN 0x00000002
-#define M_AUTA 0x00000004
-#define M_AUTY 0x00000008
-#define M_C8 0x00000010
-#define M_CIN 0x00000020
-#define M_CKM 0x00000040
-#define M_CKN 0x00000080
-#define M_CKP 0x00000100
-#define M_CME 0x00000200
-#define M_DMTP 0x00000400
-#define M_MTN 0x00000800
-#define M_MTP 0x00001000
-#define M_NATN 0x00002000
-#define M_NDMTP 0x00004000
-#define M_NE 0x00008000
-#define M_SSE 0x00010000
-#define M_SSS 0x00020000
-#define M_STO 0x00040000
-#define M_STSL 0x00080000
-#define M_YTP 0x00100000
+#define M_15TN 0x00000001
+#define M_ATN 0x00000002
+#define M_AUTA 0x00000004
+#define M_AUTY 0x00000008
+#define M_C8 0x00000010
+#define M_CIN 0x00000020
+#define M_CKM 0x00000040
+#define M_CKN 0x00000080
+#define M_CKP 0x00000100
+#define M_CME 0x00000200
+#define M_DMTP 0x00000400
+#define M_MTN 0x00000800
+#define M_MTP 0x00001000
+#define M_NATN 0x00002000
+#define M_NDMTP 0x00004000
+#define M_NE 0x00008000
+#define M_SSE 0x00010000
+#define M_SSS 0x00020000
+#define M_STO 0x00040000
+#define M_STSL 0x00080000
+#define M_YTP 0x00100000
/* instructions built from microinstructions */
-#define I_AC1AC ( MICRO_MASK | M_CKP | M_ATN | M_CIN | M_C8 | M_AUTA )
-#define I_A6AAC I_ACACC
-#define I_A8AAC I_ACACC
-#define I_A10AAC I_ACACC
-#define I_ACACC ( MICRO_MASK | M_CKP | M_ATN | M_C8 | M_AUTA )
-#define I_ACNAA ( MICRO_MASK | M_CKP | M_NATN | M_AUTA )
-#define I_ALEC ( MICRO_MASK | M_CKP | M_NATN | M_CIN | M_C8 )
-#define I_ALEM ( MICRO_MASK | M_MTP | M_NATN | M_CIN | M_C8 )
-#define I_AMAAC ( MICRO_MASK | M_MTP | M_ATN | M_C8 | M_AUTA )
-#define I_CCLA ( MICRO_MASK | M_AUTA | M_SSS )
-#define I_CLA ( MICRO_MASK | M_AUTA )
-#define I_CPAIZ ( MICRO_MASK | M_NATN | M_CIN | M_C8 | M_AUTA )
-#define I_CTMDYN ( MICRO_MASK | M_YTP | M_15TN | M_C8 | M_AUTY | M_CME )
-#define I_DAN ( MICRO_MASK | M_CKP | M_ATN | M_CIN | M_C8 | M_AUTA )
-#define I_DMAN ( MICRO_MASK | M_MTP | M_15TN | M_C8 | M_AUTA )
-#define I_DMEA ( MICRO_MASK | M_MTP | M_DMTP | M_SSS | M_AUTA )
-#define I_DNAA ( MICRO_MASK | M_DMTP | M_NATN | M_SSS | M_AUTA )
-#define I_DYN ( MICRO_MASK | M_YTP | M_15TN | M_C8 | M_AUTY )
-#define I_IA ( MICRO_MASK | M_ATN | M_CIN | M_AUTA )
-#define I_IMAC ( MICRO_MASK | M_MTP | M_CIN | M_C8 | M_AUTA )
-#define I_IYC ( MICRO_MASK | M_YTP | M_CIN | M_C8 | M_AUTY )
-#define I_KNEZ ( MICRO_MASK | M_CKP | M_NE )
-#define I_MNEA ( MICRO_MASK | M_MTP | M_ATN | M_NE )
-#define I_MNEZ ( MICRO_MASK | M_MTP | M_NE )
-#define I_M_NDMEA ( MICRO_MASK | M_MTN | M_NDTMP | M_SSS | M_AUTA )
-#define I_SAMAN ( MICRO_MASK | M_MTP | M_NATN | M_CIN | M_C8 | M_AUTA )
-#define I_SETR ( MICRO_MASK | M_YTP | M_15TN | M_AUTY | M_C8 )
-#define I_TAM ( MICRO_MASK | M_STO )
-#define I_TAMACS ( MICRO_MASK | M_STO | M_ATN | M_CKP | M_AUTA | M_SSE )
-#define I_TAMDYN ( MICRO_MASK | M_STO | M_YTP | M_15TN | M_AUTY | M_C8 )
-#define I_TAMIY ( MICRO_MASK | M_STO | M_YTP | M_CIN | M_AUTY )
-#define I_TAMIYC ( MICRO_MASK | M_STO | M_YTP | M_CIN | M_C8 | M_AUTY )
-#define I_TAMZA ( MICRO_MASK | M_STO | M_AUTA )
-#define I_TAY ( MICRO_MASK | M_ATN | M_AUTY )
-#define I_TBIT ( MICRO_MASK | M_CKP | M_CKN | M_MTP | M_NE )
-#define I_TCY ( MICRO_MASK | M_CKP | M_AUTY )
-#define I_TCMIY ( MICRO_MASK | M_CKM | M_YTP | M_CIN | M_AUTY )
-#define I_TKA ( MICRO_MASK | M_CKP | M_AUTA )
-#define I_TKM ( MICRO_MASK | M_CKM )
-#define I_TMA ( MICRO_MASK | M_MTP | M_AUTA )
-#define I_TMY ( MICRO_MASK | M_MTP | M_AUTY )
-#define I_TYA ( MICRO_MASK | M_YTP | M_AUTA )
-#define I_XDA ( MICRO_MASK | M_DMTP | M_AUTA | M_STO )
-#define I_XMA ( MICRO_MASK | M_MTP | M_STO | M_AUTA )
-#define I_YMCY ( MICRO_MASK | M_CIN | M_YTP | M_CKN | M_AUTY )
-#define I_YNEA ( MICRO_MASK | M_YTP | M_ATN | M_NE )
-#define I_YNEC ( MICRO_MASK | M_YTP | M_CKN | M_NE )
+#define I_AC1AC ( MICRO_MASK | M_CKP | M_ATN | M_CIN | M_C8 | M_AUTA )
+#define I_A6AAC I_ACACC
+#define I_A8AAC I_ACACC
+#define I_A10AAC I_ACACC
+#define I_ACACC ( MICRO_MASK | M_CKP | M_ATN | M_C8 | M_AUTA )
+#define I_ACNAA ( MICRO_MASK | M_CKP | M_NATN | M_AUTA )
+#define I_ALEC ( MICRO_MASK | M_CKP | M_NATN | M_CIN | M_C8 )
+#define I_ALEM ( MICRO_MASK | M_MTP | M_NATN | M_CIN | M_C8 )
+#define I_AMAAC ( MICRO_MASK | M_MTP | M_ATN | M_C8 | M_AUTA )
+#define I_CCLA ( MICRO_MASK | M_AUTA | M_SSS )
+#define I_CLA ( MICRO_MASK | M_AUTA )
+#define I_CPAIZ ( MICRO_MASK | M_NATN | M_CIN | M_C8 | M_AUTA )
+#define I_CTMDYN ( MICRO_MASK | M_YTP | M_15TN | M_C8 | M_AUTY | M_CME )
+#define I_DAN ( MICRO_MASK | M_CKP | M_ATN | M_CIN | M_C8 | M_AUTA )
+#define I_DMAN ( MICRO_MASK | M_MTP | M_15TN | M_C8 | M_AUTA )
+#define I_DMEA ( MICRO_MASK | M_MTP | M_DMTP | M_SSS | M_AUTA )
+#define I_DNAA ( MICRO_MASK | M_DMTP | M_NATN | M_SSS | M_AUTA )
+#define I_DYN ( MICRO_MASK | M_YTP | M_15TN | M_C8 | M_AUTY )
+#define I_IA ( MICRO_MASK | M_ATN | M_CIN | M_AUTA )
+#define I_IMAC ( MICRO_MASK | M_MTP | M_CIN | M_C8 | M_AUTA )
+#define I_IYC ( MICRO_MASK | M_YTP | M_CIN | M_C8 | M_AUTY )
+#define I_KNEZ ( MICRO_MASK | M_CKP | M_NE )
+#define I_MNEA ( MICRO_MASK | M_MTP | M_ATN | M_NE )
+#define I_MNEZ ( MICRO_MASK | M_MTP | M_NE )
+#define I_M_NDMEA ( MICRO_MASK | M_MTN | M_NDTMP | M_SSS | M_AUTA )
+#define I_SAMAN ( MICRO_MASK | M_MTP | M_NATN | M_CIN | M_C8 | M_AUTA )
+#define I_SETR ( MICRO_MASK | M_YTP | M_15TN | M_AUTY | M_C8 )
+#define I_TAM ( MICRO_MASK | M_STO )
+#define I_TAMACS ( MICRO_MASK | M_STO | M_ATN | M_CKP | M_AUTA | M_SSE )
+#define I_TAMDYN ( MICRO_MASK | M_STO | M_YTP | M_15TN | M_AUTY | M_C8 )
+#define I_TAMIY ( MICRO_MASK | M_STO | M_YTP | M_CIN | M_AUTY )
+#define I_TAMIYC ( MICRO_MASK | M_STO | M_YTP | M_CIN | M_C8 | M_AUTY )
+#define I_TAMZA ( MICRO_MASK | M_STO | M_AUTA )
+#define I_TAY ( MICRO_MASK | M_ATN | M_AUTY )
+#define I_TBIT ( MICRO_MASK | M_CKP | M_CKN | M_MTP | M_NE )
+#define I_TCY ( MICRO_MASK | M_CKP | M_AUTY )
+#define I_TCMIY ( MICRO_MASK | M_CKM | M_YTP | M_CIN | M_AUTY )
+#define I_TKA ( MICRO_MASK | M_CKP | M_AUTA )
+#define I_TKM ( MICRO_MASK | M_CKM )
+#define I_TMA ( MICRO_MASK | M_MTP | M_AUTA )
+#define I_TMY ( MICRO_MASK | M_MTP | M_AUTY )
+#define I_TYA ( MICRO_MASK | M_YTP | M_AUTA )
+#define I_XDA ( MICRO_MASK | M_DMTP | M_AUTA | M_STO )
+#define I_XMA ( MICRO_MASK | M_MTP | M_STO | M_AUTA )
+#define I_YMCY ( MICRO_MASK | M_CIN | M_YTP | M_CKN | M_AUTY )
+#define I_YNEA ( MICRO_MASK | M_YTP | M_ATN | M_NE )
+#define I_YNEC ( MICRO_MASK | M_YTP | M_CKN | M_NE )
struct tms0980_state
{
- UINT8 m_prev_pc; /* previous program counter */
- UINT8 m_prev_pa; /* previous page address register */
- UINT8 m_pc; /* program counter is a 7 bit register on tms0980, 6 bit register on tms1000/1070/1200/1270/1100/1300 */
- UINT8 m_pa; /* page address register is a 4 bit register */
- UINT8 m_sr; /* subroutine return register is a 7 bit register */
- UINT8 m_pb; /* page buffer register is a 4 bit register */
- UINT8 m_a; /* Accumulator is a 4 bit register (?) */
- UINT8 m_x; /* X-register is a 2, 3, or 4 bit register */
- UINT8 m_y; /* Y-register is a 4 bit register */
- UINT8 m_dam; /* DAM register is a 4 bit register */
- UINT8 m_ca; /* Chapter address bit */
- UINT8 m_cb; /* Chapter buffer bit */
- UINT8 m_cs; /* Chapter subroutine bit */
- UINT16 m_r;
- UINT8 m_o;
- UINT8 m_cki_bus; /* CKI bus */
- UINT8 m_p; /* adder p-input */
- UINT8 m_n; /* adder n-input */
- UINT8 m_adder_result; /* adder result */
- UINT8 m_carry_in; /* carry in */
- UINT8 m_status;
- UINT8 m_status_latch;
- UINT8 m_special_status;
- UINT8 m_call_latch;
- UINT8 m_add_latch;
- UINT8 m_branch_latch;
- int m_subcycle;
- UINT8 m_ram_address;
- UINT16 m_ram_data;
- UINT16 m_rom_address;
- UINT16 m_opcode;
- UINT32 m_decode;
- int m_icount;
- UINT16 m_o_mask; /* mask to determine the number of O outputs */
- UINT16 m_r_mask; /* mask to determine the number of R outputs */
- UINT8 m_pc_size; /* how bits in the PC register */
- UINT8 m_byte_size; /* 8 or 9 bit bytes */
- UINT8 m_x_bits; /* determine the number of bits in the X register */
+ UINT8 m_prev_pc; /* previous program counter */
+ UINT8 m_prev_pa; /* previous page address register */
+ UINT8 m_pc; /* program counter is a 7 bit register on tms0980, 6 bit register on tms1000/1070/1200/1270/1100/1300 */
+ UINT8 m_pa; /* page address register is a 4 bit register */
+ UINT8 m_sr; /* subroutine return register is a 7 bit register */
+ UINT8 m_pb; /* page buffer register is a 4 bit register */
+ UINT8 m_a; /* Accumulator is a 4 bit register (?) */
+ UINT8 m_x; /* X-register is a 2, 3, or 4 bit register */
+ UINT8 m_y; /* Y-register is a 4 bit register */
+ UINT8 m_dam; /* DAM register is a 4 bit register */
+ UINT8 m_ca; /* Chapter address bit */
+ UINT8 m_cb; /* Chapter buffer bit */
+ UINT8 m_cs; /* Chapter subroutine bit */
+ UINT16 m_r;
+ UINT8 m_o;
+ UINT8 m_cki_bus; /* CKI bus */
+ UINT8 m_p; /* adder p-input */
+ UINT8 m_n; /* adder n-input */
+ UINT8 m_adder_result; /* adder result */
+ UINT8 m_carry_in; /* carry in */
+ UINT8 m_status;
+ UINT8 m_status_latch;
+ UINT8 m_special_status;
+ UINT8 m_call_latch;
+ UINT8 m_add_latch;
+ UINT8 m_branch_latch;
+ int m_subcycle;
+ UINT8 m_ram_address;
+ UINT16 m_ram_data;
+ UINT16 m_rom_address;
+ UINT16 m_opcode;
+ UINT32 m_decode;
+ int m_icount;
+ UINT16 m_o_mask; /* mask to determine the number of O outputs */
+ UINT16 m_r_mask; /* mask to determine the number of R outputs */
+ UINT8 m_pc_size; /* how bits in the PC register */
+ UINT8 m_byte_size; /* 8 or 9 bit bytes */
+ UINT8 m_x_bits; /* determine the number of bits in the X register */
const UINT32 *m_decode_table;
- const tms0980_config *config;
+ const tms0980_config *config;
address_space *m_program;
address_space *m_data;
@@ -747,8 +747,8 @@ INLINE void tms0980_next_pc( tms0980_state *cpustate )
{
if ( cpustate->m_byte_size > 8 )
{
- UINT8 xorval = ( cpustate->m_pc & 0x3F ) == 0x3F ? 1 : 0;
- UINT8 new_bit = ( ( cpustate->m_pc ^ ( cpustate->m_pc << 1 ) ) & 0x40 ) ? xorval : 1 - xorval;
+ UINT8 xorval = ( cpustate->m_pc & 0x3F ) == 0x3F ? 1 : 0;
+ UINT8 new_bit = ( ( cpustate->m_pc ^ ( cpustate->m_pc << 1 ) ) & 0x40 ) ? xorval : 1 - xorval;
cpustate->m_pc = ( cpustate->m_pc << 1 ) | new_bit;
}
@@ -1134,15 +1134,15 @@ static CPU_SET_INFO( tms0980 )
switch( state )
{
- case CPUINFO_INT_PC: cpustate->m_pc = ( info->i >> 1 ) & 0x7f; cpustate->m_pa = ( info->i >> 8 ) & 0x0F; cpustate->m_cb = ( info->i >> 12 ) & 0x01; break;
- case CPUINFO_INT_REGISTER + TMS0980_PC: cpustate->m_pc = info->i; break;
- case CPUINFO_INT_REGISTER + TMS0980_SR: cpustate->m_sr = info->i; break;
- case CPUINFO_INT_REGISTER + TMS0980_PA: cpustate->m_pa = info->i; break;
- case CPUINFO_INT_REGISTER + TMS0980_PB: cpustate->m_pb = info->i; break;
- case CPUINFO_INT_REGISTER + TMS0980_A: cpustate->m_a = info->i; break;
- case CPUINFO_INT_REGISTER + TMS0980_X: cpustate->m_x = info->i; break;
- case CPUINFO_INT_REGISTER + TMS0980_Y: cpustate->m_y = info->i; break;
- case CPUINFO_INT_REGISTER + TMS0980_STATUS: cpustate->m_status = info->i; break;
+ case CPUINFO_INT_PC: cpustate->m_pc = ( info->i >> 1 ) & 0x7f; cpustate->m_pa = ( info->i >> 8 ) & 0x0F; cpustate->m_cb = ( info->i >> 12 ) & 0x01; break;
+ case CPUINFO_INT_REGISTER + TMS0980_PC: cpustate->m_pc = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS0980_SR: cpustate->m_sr = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS0980_PA: cpustate->m_pa = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS0980_PB: cpustate->m_pb = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS0980_A: cpustate->m_a = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS0980_X: cpustate->m_x = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS0980_Y: cpustate->m_y = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS0980_STATUS: cpustate->m_status = info->i; break;
}
}
@@ -1153,51 +1153,51 @@ static CPU_GET_INFO( tms_generic )
switch(state)
{
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms0980_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 6; break;
-
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8 /* 4 */; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = ( ( cpustate->m_prev_pa << 7 ) | cpustate->m_prev_pc ) << 1; break;
- case CPUINFO_INT_PC: info->i = ( ( cpustate->m_pa << 7 ) | cpustate->m_pc ) << 1; break;
- case CPUINFO_INT_SP: info->i = 0xFFFF; break;
- case CPUINFO_INT_REGISTER + TMS0980_PC: info->i = cpustate->m_pc; break;
- case CPUINFO_INT_REGISTER + TMS0980_SR: info->i = cpustate->m_sr; break;
- case CPUINFO_INT_REGISTER + TMS0980_PA: info->i = cpustate->m_pa; break;
- case CPUINFO_INT_REGISTER + TMS0980_PB: info->i = cpustate->m_pb; break;
- case CPUINFO_INT_REGISTER + TMS0980_A: info->i = cpustate->m_a; break;
- case CPUINFO_INT_REGISTER + TMS0980_X: info->i = cpustate->m_x; break;
- case CPUINFO_INT_REGISTER + TMS0980_Y: info->i = cpustate->m_y; break;
- case CPUINFO_INT_REGISTER + TMS0980_STATUS: info->i = cpustate->m_status; break;
-
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME( tms0980 ); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms0980 ); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME( tms0980 ); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME( tms0980 ); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->m_icount; break;
-
- case CPUINFO_STR_FAMILY: strcpy( info->s, "Texas Instruments TMS0980/TMS1000" ); break;
- case CPUINFO_STR_VERSION: strcpy( info->s, "0.2" ); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
- case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright the MESS and MAME teams" ); break;
-
- case CPUINFO_STR_FLAGS: strcpy( info->s, "N/A" ); break;
-
- case CPUINFO_STR_REGISTER + TMS0980_PC: sprintf( info->s, "PC:%02X", cpustate->m_pc ); break;
- case CPUINFO_STR_REGISTER + TMS0980_SR: sprintf( info->s, "SR:%01X", cpustate->m_sr ); break;
- case CPUINFO_STR_REGISTER + TMS0980_PA: sprintf( info->s, "PA:%01X", cpustate->m_pa ); break;
- case CPUINFO_STR_REGISTER + TMS0980_PB: sprintf( info->s, "PB:%01X", cpustate->m_pb ); break;
- case CPUINFO_STR_REGISTER + TMS0980_A: sprintf( info->s, "A:%01X", cpustate->m_a ); break;
- case CPUINFO_STR_REGISTER + TMS0980_X: sprintf( info->s, "X:%01X", cpustate->m_x ); break;
- case CPUINFO_STR_REGISTER + TMS0980_Y: sprintf( info->s, "Y:%01X", cpustate->m_y ); break;
- case CPUINFO_STR_REGISTER + TMS0980_STATUS: sprintf( info->s, "STATUS:%01X", cpustate->m_status ); break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms0980_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 6; break;
+
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8 /* 4 */; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = ( ( cpustate->m_prev_pa << 7 ) | cpustate->m_prev_pc ) << 1; break;
+ case CPUINFO_INT_PC: info->i = ( ( cpustate->m_pa << 7 ) | cpustate->m_pc ) << 1; break;
+ case CPUINFO_INT_SP: info->i = 0xFFFF; break;
+ case CPUINFO_INT_REGISTER + TMS0980_PC: info->i = cpustate->m_pc; break;
+ case CPUINFO_INT_REGISTER + TMS0980_SR: info->i = cpustate->m_sr; break;
+ case CPUINFO_INT_REGISTER + TMS0980_PA: info->i = cpustate->m_pa; break;
+ case CPUINFO_INT_REGISTER + TMS0980_PB: info->i = cpustate->m_pb; break;
+ case CPUINFO_INT_REGISTER + TMS0980_A: info->i = cpustate->m_a; break;
+ case CPUINFO_INT_REGISTER + TMS0980_X: info->i = cpustate->m_x; break;
+ case CPUINFO_INT_REGISTER + TMS0980_Y: info->i = cpustate->m_y; break;
+ case CPUINFO_INT_REGISTER + TMS0980_STATUS: info->i = cpustate->m_status; break;
+
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME( tms0980 ); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms0980 ); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME( tms0980 ); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME( tms0980 ); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->m_icount; break;
+
+ case CPUINFO_STR_FAMILY: strcpy( info->s, "Texas Instruments TMS0980/TMS1000" ); break;
+ case CPUINFO_STR_VERSION: strcpy( info->s, "0.2" ); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy( info->s, __FILE__ ); break;
+ case CPUINFO_STR_CREDITS: strcpy( info->s, "Copyright the MESS and MAME teams" ); break;
+
+ case CPUINFO_STR_FLAGS: strcpy( info->s, "N/A" ); break;
+
+ case CPUINFO_STR_REGISTER + TMS0980_PC: sprintf( info->s, "PC:%02X", cpustate->m_pc ); break;
+ case CPUINFO_STR_REGISTER + TMS0980_SR: sprintf( info->s, "SR:%01X", cpustate->m_sr ); break;
+ case CPUINFO_STR_REGISTER + TMS0980_PA: sprintf( info->s, "PA:%01X", cpustate->m_pa ); break;
+ case CPUINFO_STR_REGISTER + TMS0980_PB: sprintf( info->s, "PB:%01X", cpustate->m_pb ); break;
+ case CPUINFO_STR_REGISTER + TMS0980_A: sprintf( info->s, "A:%01X", cpustate->m_a ); break;
+ case CPUINFO_STR_REGISTER + TMS0980_X: sprintf( info->s, "X:%01X", cpustate->m_x ); break;
+ case CPUINFO_STR_REGISTER + TMS0980_Y: sprintf( info->s, "Y:%01X", cpustate->m_y ); break;
+ case CPUINFO_STR_REGISTER + TMS0980_STATUS: sprintf( info->s, "STATUS:%01X", cpustate->m_status ); break;
}
}
@@ -1209,19 +1209,19 @@ CPU_GET_INFO( tms0980 )
switch(state)
{
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16 /* 9 */; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = ( ( cpustate->m_prev_pa << 7 ) | cpustate->m_prev_pc ) << 1; break;
- case CPUINFO_INT_PC: info->i = ( ( cpustate->m_pa << 7 ) | cpustate->m_pc ) << 1; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME( tms0980_internal_rom ); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME( tms0980_internal_ram ); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms0980 ); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME( tms0980 ); break;
- case CPUINFO_STR_NAME: strcpy( info->s, "TMS0980" ); break;
- default: CPU_GET_INFO_CALL( tms_generic );
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16 /* 9 */; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = ( ( cpustate->m_prev_pa << 7 ) | cpustate->m_prev_pc ) << 1; break;
+ case CPUINFO_INT_PC: info->i = ( ( cpustate->m_pa << 7 ) | cpustate->m_pc ) << 1; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME( tms0980_internal_rom ); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME( tms0980_internal_ram ); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms0980 ); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME( tms0980 ); break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMS0980" ); break;
+ default: CPU_GET_INFO_CALL( tms_generic );
}
}
@@ -1232,19 +1232,19 @@ CPU_GET_INFO( tms1000 )
switch(state)
{
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = ( cpustate->m_prev_pa << 6 ) | tms1000_pc_decode[ cpustate->m_prev_pc ]; break;
- case CPUINFO_INT_PC: info->i = ( cpustate->m_pa << 6 ) | tms1000_pc_decode[ cpustate->m_pc ]; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME( program_10bit_8 ); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME( data_6bit ); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1000 ); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME( tms1000 ); break;
- case CPUINFO_STR_NAME: strcpy( info->s, "TMS1000" ); break;
- default: CPU_GET_INFO_CALL( tms_generic );
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 10; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 6; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = ( cpustate->m_prev_pa << 6 ) | tms1000_pc_decode[ cpustate->m_prev_pc ]; break;
+ case CPUINFO_INT_PC: info->i = ( cpustate->m_pa << 6 ) | tms1000_pc_decode[ cpustate->m_pc ]; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME( program_10bit_8 ); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME( data_6bit ); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1000 ); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME( tms1000 ); break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMS1000" ); break;
+ default: CPU_GET_INFO_CALL( tms_generic );
}
}
@@ -1253,9 +1253,9 @@ CPU_GET_INFO( tms1070 )
{
switch(state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1070 ); break;
- case CPUINFO_STR_NAME: strcpy( info->s, "TMS1070" ); break;
- default: CPU_GET_INFO_CALL( tms1000 );
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1070 ); break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMS1070" ); break;
+ default: CPU_GET_INFO_CALL( tms1000 );
}
}
@@ -1264,9 +1264,9 @@ CPU_GET_INFO( tms1200 )
{
switch(state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1200 ); break;
- case CPUINFO_STR_NAME: strcpy( info->s, "TMS1200" ); break;
- default: CPU_GET_INFO_CALL( tms1000 );
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1200 ); break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMS1200" ); break;
+ default: CPU_GET_INFO_CALL( tms1000 );
}
}
@@ -1275,9 +1275,9 @@ CPU_GET_INFO( tms1270 )
{
switch(state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1270 ); break;
- case CPUINFO_STR_NAME: strcpy( info->s, "TMS1270" ); break;
- default: CPU_GET_INFO_CALL( tms1000 );
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1270 ); break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMS1270" ); break;
+ default: CPU_GET_INFO_CALL( tms1000 );
}
}
@@ -1289,19 +1289,19 @@ CPU_GET_INFO( tms1100 )
switch(state)
{
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
- case CPUINFO_INT_PREVIOUSPC: info->i = ( cpustate->m_prev_pa << 6 ) | cpustate->m_prev_pc; break;
- case CPUINFO_INT_PC: info->i = ( cpustate->m_ca << 10 ) | ( cpustate->m_pa << 6 ) | cpustate->m_pc; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME( program_11bit_8 ); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME( data_7bit ); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1100 ); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME( tms1100 ); break;
- case CPUINFO_STR_NAME: strcpy( info->s, "TMS1100" ); break;
- default: CPU_GET_INFO_CALL( tms_generic );
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 11; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 7; break;
+ case CPUINFO_INT_PREVIOUSPC: info->i = ( cpustate->m_prev_pa << 6 ) | cpustate->m_prev_pc; break;
+ case CPUINFO_INT_PC: info->i = ( cpustate->m_ca << 10 ) | ( cpustate->m_pa << 6 ) | cpustate->m_pc; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME( program_11bit_8 ); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map8 = ADDRESS_MAP_NAME( data_7bit ); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1100 ); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME( tms1100 ); break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMS1100" ); break;
+ default: CPU_GET_INFO_CALL( tms_generic );
}
}
@@ -1310,9 +1310,9 @@ CPU_GET_INFO( tms1300 )
{
switch(state)
{
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1300 ); break;
- case CPUINFO_STR_NAME: strcpy( info->s, "TMS1300" ); break;
- default: CPU_GET_INFO_CALL( tms1100 );
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME( tms1300 ); break;
+ case CPUINFO_STR_NAME: strcpy( info->s, "TMS1300" ); break;
+ default: CPU_GET_INFO_CALL( tms1100 );
}
}
diff --git a/src/emu/cpu/tms0980/tms0980.h b/src/emu/cpu/tms0980/tms0980.h
index 7f045a0561a..7bdd71b3a66 100644
--- a/src/emu/cpu/tms0980/tms0980.h
+++ b/src/emu/cpu/tms0980/tms0980.h
@@ -11,10 +11,10 @@ enum {
struct tms0980_config {
/* O-output PLA configuration 5bit -> 8/11bit translation */
- UINT16 o_pla[0x20];
- devcb_read8 read_k;
- devcb_write16 write_o; /* tms1270 has 10 O-outputs */
- devcb_write16 write_r;
+ UINT16 o_pla[0x20];
+ devcb_read8 read_k;
+ devcb_write16 write_o; /* tms1270 has 10 O-outputs */
+ devcb_write16 write_r;
};
@@ -34,4 +34,3 @@ extern CPU_DISASSEMBLE( tms1000 );
extern CPU_DISASSEMBLE( tms1100 );
#endif /* _TMS0980_H_ */
-
diff --git a/src/emu/cpu/tms0980/tms0980d.c b/src/emu/cpu/tms0980/tms0980d.c
index 017dbb415e1..659e48d7a46 100644
--- a/src/emu/cpu/tms0980/tms0980d.c
+++ b/src/emu/cpu/tms0980/tms0980d.c
@@ -349,4 +349,3 @@ CPU_DISASSEMBLE( tms1100 ) {
return pos | s_flags[instr] | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/tms32010/32010dsm.c b/src/emu/cpu/tms32010/32010dsm.c
index 37bc63b690c..ddbba79eedc 100644
--- a/src/emu/cpu/tms32010/32010dsm.c
+++ b/src/emu/cpu/tms32010/32010dsm.c
@@ -1,28 +1,28 @@
- /**************************************************************************\
- * Texas Instruments TMS32010 DSP Disassembler *
- * *
- * Copyright Tony La Porta *
- * To be used with TMS32010 DSP Emulator engine. *
- * You are not allowed to distribute this software commercially. *
- * Written for the MAME project. *
- * *
- * Many thanks to those involved in the i8039 Disassembler *
- * as this was based on it. *
- * *
- * *
- * *
- * A Memory address *
- * B Branch Address for Branch instructions (Requires next opcode read) *
- * D Immediate byte load *
- * K Immediate bit load *
- * W Immediate word load (Actually 13 bit) *
- * M AR[x] register modification type (for indirect addressing) *
- * N ARP register to change ARP pointer to (for indirect addressing) *
- * P I/O port address number *
- * R AR[R] register to use *
- * S Shift ALU left *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS32010 DSP Disassembler *
+ * *
+ * Copyright Tony La Porta *
+ * To be used with TMS32010 DSP Emulator engine. *
+ * You are not allowed to distribute this software commercially. *
+ * Written for the MAME project. *
+ * *
+ * Many thanks to those involved in the i8039 Disassembler *
+ * as this was based on it. *
+ * *
+ * *
+ * *
+ * A Memory address *
+ * B Branch Address for Branch instructions (Requires next opcode read) *
+ * D Immediate byte load *
+ * K Immediate bit load *
+ * W Immediate word load (Actually 13 bit) *
+ * M AR[x] register modification type (for indirect addressing) *
+ * N ARP register to change ARP pointer to (for indirect addressing) *
+ * P I/O port address number *
+ * R AR[R] register to use *
+ * S Shift ALU left *
+ * *
+ \**************************************************************************/
#include "emu.h"
#include "debugger.h"
@@ -57,8 +57,8 @@ static const char *const TMS32010Formats[] = {
FMT("01000ppp10mmn00n", "in %M,%P%N"),
FMT("01001ppp0aaaaaaa", "out %A,%P"),
FMT("01001ppp10mmn00n", "out %M,%P%N"),
- FMT("01010sss0aaaaaaa", "sacl %A"), /* This instruction has a shift but */
- FMT("01010sss10mmn00n", "sacl %M%N"), /* is documented as not performed */
+ FMT("01010sss0aaaaaaa", "sacl %A"), /* This instruction has a shift but */
+ FMT("01010sss10mmn00n", "sacl %M%N"), /* is documented as not performed */
FMT("01011sss0aaaaaaa", "sach %A%S"),
FMT("01011sss10mmn00n", "sach %M%S%N"),
FMT("011000000aaaaaaa", "addh %A"),
@@ -78,7 +78,7 @@ static const char *const TMS32010Formats[] = {
FMT("011001110aaaaaaa", "tblr %A"),
FMT("0110011110mmn00n", "tblr %M%N"),
FMT("011010001000000k", "larp %K"),
- FMT("011010000aaaaaaa", "mar %A"), /* Actually this is executed as a NOP */
+ FMT("011010000aaaaaaa", "mar %A"), /* Actually this is executed as a NOP */
/* FMT("0110100010mmn00n", "mar %M%N"), */
/* MAR indirect has been expanded out to all its variations because one of */
/* its opcodes is the same as LARP (actually performs the same function) */
@@ -125,10 +125,10 @@ static const char *const TMS32010Formats[] = {
FMT("011111010aaaaaaa", "tblw %A"),
FMT("0111110110mmn00n", "tblw %M%N"),
FMT("01111110dddddddd", "lack %D"),
- FMT("0111111110000000", "nop"), /* 7F80 */
+ FMT("0111111110000000", "nop"), /* 7F80 */
FMT("0111111110000001", "dint"),
FMT("0111111110000010", "eint"),
- FMT("0111111110001000", "abs"), /* 7F88 */
+ FMT("0111111110001000", "abs"), /* 7F88 */
FMT("0111111110001001", "zac"),
FMT("0111111110001010", "rovm"),
FMT("0111111110001011", "sovm"),
@@ -138,7 +138,7 @@ static const char *const TMS32010Formats[] = {
FMT("0111111110001111", "apac"),
FMT("0111111110010000", "spac"),
FMT("0111111110011100", "push"),
- FMT("0111111110011101", "pop"), /* 7F9D */
+ FMT("0111111110011101", "pop"), /* 7F9D */
FMT("100wwwwwwwwwwwww", "mpyk %W"),
FMT("1111010000000000bbbbbbbbbbbbbbbb", "banz %B"),
FMT("1111010100000000bbbbbbbbbbbbbbbb", "bv %B"),
@@ -157,11 +157,11 @@ static const char *const TMS32010Formats[] = {
#define MAX_OPS (((sizeof(TMS32010Formats) / sizeof(TMS32010Formats[0])) - 1) / PTRS_PER_FORMAT)
struct TMS32010Opcode {
- word mask; /* instruction mask */
- word bits; /* constant bits */
- word extcode; /* value that gets extension code */
- const char *parse; /* how to parse bits */
- const char *fmt; /* instruction format */
+ word mask; /* instruction mask */
+ word bits; /* constant bits */
+ word extcode; /* value that gets extension code */
+ const char *parse; /* how to parse bits */
+ const char *fmt; /* instruction format */
};
static TMS32010Opcode Op[MAX_OPS+1];
@@ -225,18 +225,18 @@ static void InitDasm32010(void)
CPU_DISASSEMBLE( tms32010 )
{
UINT32 flags = 0;
- int a, b, d, k, m, n, p, r, s, w; /* these can all be filled in by parsing an instruction */
+ int a, b, d, k, m, n, p, r, s, w; /* these can all be filled in by parsing an instruction */
int i;
int op;
int cnt = 1;
int code;
int bit;
//char *buffertmp;
- const char *cp; /* character pointer in OpFormats */
+ const char *cp; /* character pointer in OpFormats */
if (!OpInizialized) InitDasm32010();
- op = -1; /* no matching opcode */
+ op = -1; /* no matching opcode */
code = (oprom[0] << 8) | oprom[1];
for ( i = 0; i < MAX_OPS; i++)
{
diff --git a/src/emu/cpu/tms32010/dis32010.c b/src/emu/cpu/tms32010/dis32010.c
index 5b8d2a6d907..1e388734493 100644
--- a/src/emu/cpu/tms32010/dis32010.c
+++ b/src/emu/cpu/tms32010/dis32010.c
@@ -1,15 +1,15 @@
- /**************************************************************************\
- * Texas Instruments TMS32010 DSP Disassembler *
- * *
- * Copyright Tony La Porta *
- * You are not allowed to distribute this software commercially. *
- * Written for the MAME project. *
- * *
- * Notes : Data is expected to be read from source file as MSB first. *
- * This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS32010 DSP Disassembler *
+ * *
+ * Copyright Tony La Porta *
+ * You are not allowed to distribute this software commercially. *
+ * Written for the MAME project. *
+ * *
+ * Notes : Data is expected to be read from source file as MSB first. *
+ * This is a word based microcontroller, with addressing *
+ * architecture based on the Harvard addressing scheme. *
+ * *
+ \**************************************************************************/
#include <stdio.h>
#include <string.h>
@@ -103,7 +103,7 @@ int main(int argc,char *argv[])
printf("$%04lX: ",Counter);
for (ii = 0; ii < disasm_words; ii++)
{
- if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
+ if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
{
sprintf(String_Output,"???? dw %02.2X%02.2Xh (Past end of disassembly !)",Buffer[((Counter-1)*2)],Buffer[((Counter-1)*2)+1]);
}
diff --git a/src/emu/cpu/tms32010/tms32010.c b/src/emu/cpu/tms32010/tms32010.c
index b74e876cc8c..477a70d2e06 100644
--- a/src/emu/cpu/tms32010/tms32010.c
+++ b/src/emu/cpu/tms32010/tms32010.c
@@ -1,61 +1,61 @@
- /**************************************************************************\
- * Texas Instruments TMS32010 DSP Emulator *
- * *
- * Copyright Tony La Porta *
- * You are not allowed to distribute this software commercially. *
- * Written for the MAME project. *
- * *
- * *
- * Notes : The term 'DMA' within this document, is in reference *
- * to Direct Memory Addressing, and NOT the usual term *
- * of Direct Memory Access. *
- * This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- * *
- * *
- * **** Change Log **** *
- * *
- * TLP (13-Jul-2002) *
- * - Added Save-State support *
- * - Converted the pending_irq flag to INTF (a real flag in this device) *
- * - Fixed the ignore Interrupt Request for previous critical *
- * instructions requiring an extra instruction to be processed. For *
- * this reason, instant IRQ servicing cannot be supported here, so *
- * INTF needs to be polled within the instruction execution loop *
- * - Removed IRQ callback (IRQ ACK not supported on this device) *
- * - A pending IRQ will remain pending until it's serviced. De-asserting *
- * the IRQ Pin does not remove a pending IRQ state *
- * - BIO is no longer treated as an IRQ line. It's polled when required. *
- * This is the true behaviour of the device *
- * - Removed the Clear OV flag from overflow instructions. Overflow *
- * instructions can only set the flag. Flag test instructions clear it *
- * - Fixed the ABST, SUBC and SUBH instructions *
- * - Fixed the signedness in many equation based instructions *
- * - Added the missing Previous PC to the get_register function *
- * - Changed Cycle timings to include clock ticks *
- * - Converted some registers from ints to pairs for much cleaner code *
- * TLP (20-Jul-2002) Ver 1.10 *
- * - Fixed the dissasembly from the debugger *
- * - Changed all references from TMS320C10 to TMS32010 *
- * ASG (24-Sep-2002) Ver 1.20 *
- * - Fixed overflow handling *
- * - Simplified logic in a few locations *
- * TLP (22-Feb-2004) Ver 1.21 *
- * - Overflow for ADDH only affects upper 16bits (was modifying 32 bits) *
- * - Internal Data Memory map is assigned here now *
- * - Cycle counts for invalid opcodes 7F1E and 7F1F are now 0 *
- * RK (23-Nov-2006) Ver 1.22 *
- * - Fixed state of the Overflow Flag on reset *
- * - Fixed the SUBC instruction which was incorrectly zeroing the divisor *
- * TLP (13-Jul-2010) Ver 1.30 *
- * - LST instruction was incorrectly setting an Indirect Addressing *
- * feature when Direct Addressing mode was selected *
- * - Added TMS32015 and TMS32016 variants *
- * TLP (27-Jul-2010) Ver 1.31 *
- * - Corrected cycle timing for conditional branch instructions *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS32010 DSP Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * You are not allowed to distribute this software commercially. *
+ * Written for the MAME project. *
+ * *
+ * *
+ * Notes : The term 'DMA' within this document, is in reference *
+ * to Direct Memory Addressing, and NOT the usual term *
+ * of Direct Memory Access. *
+ * This is a word based microcontroller, with addressing *
+ * architecture based on the Harvard addressing scheme. *
+ * *
+ * *
+ * *
+ * **** Change Log **** *
+ * *
+ * TLP (13-Jul-2002) *
+ * - Added Save-State support *
+ * - Converted the pending_irq flag to INTF (a real flag in this device) *
+ * - Fixed the ignore Interrupt Request for previous critical *
+ * instructions requiring an extra instruction to be processed. For *
+ * this reason, instant IRQ servicing cannot be supported here, so *
+ * INTF needs to be polled within the instruction execution loop *
+ * - Removed IRQ callback (IRQ ACK not supported on this device) *
+ * - A pending IRQ will remain pending until it's serviced. De-asserting *
+ * the IRQ Pin does not remove a pending IRQ state *
+ * - BIO is no longer treated as an IRQ line. It's polled when required. *
+ * This is the true behaviour of the device *
+ * - Removed the Clear OV flag from overflow instructions. Overflow *
+ * instructions can only set the flag. Flag test instructions clear it *
+ * - Fixed the ABST, SUBC and SUBH instructions *
+ * - Fixed the signedness in many equation based instructions *
+ * - Added the missing Previous PC to the get_register function *
+ * - Changed Cycle timings to include clock ticks *
+ * - Converted some registers from ints to pairs for much cleaner code *
+ * TLP (20-Jul-2002) Ver 1.10 *
+ * - Fixed the dissasembly from the debugger *
+ * - Changed all references from TMS320C10 to TMS32010 *
+ * ASG (24-Sep-2002) Ver 1.20 *
+ * - Fixed overflow handling *
+ * - Simplified logic in a few locations *
+ * TLP (22-Feb-2004) Ver 1.21 *
+ * - Overflow for ADDH only affects upper 16bits (was modifying 32 bits) *
+ * - Internal Data Memory map is assigned here now *
+ * - Cycle counts for invalid opcodes 7F1E and 7F1F are now 0 *
+ * RK (23-Nov-2006) Ver 1.22 *
+ * - Fixed state of the Overflow Flag on reset *
+ * - Fixed the SUBC instruction which was incorrectly zeroing the divisor *
+ * TLP (13-Jul-2010) Ver 1.30 *
+ * - LST instruction was incorrectly setting an Indirect Addressing *
+ * feature when Direct Addressing mode was selected *
+ * - Added TMS32015 and TMS32016 variants *
+ * TLP (27-Jul-2010) Ver 1.31 *
+ * - Corrected cycle timing for conditional branch instructions *
+ * *
+ \**************************************************************************/
#include "emu.h"
@@ -64,37 +64,37 @@
-#define M_RDROM(A) TMS32010_ROM_RDMEM(A)
-#define M_WRTROM(A,V) TMS32010_ROM_WRMEM(A,V)
-#define M_RDRAM(A) TMS32010_RAM_RDMEM(A)
-#define M_WRTRAM(A,V) TMS32010_RAM_WRMEM(A,V)
-#define M_RDOP(A) TMS32010_RDOP(A)
-#define M_RDOP_ARG(A) TMS32010_RDOP_ARG(A)
-#define P_IN(A) TMS32010_In(A)
-#define P_OUT(A,V) TMS32010_Out(A,V)
-#define BIO_IN TMS32010_BIO_In
+#define M_RDROM(A) TMS32010_ROM_RDMEM(A)
+#define M_WRTROM(A,V) TMS32010_ROM_WRMEM(A,V)
+#define M_RDRAM(A) TMS32010_RAM_RDMEM(A)
+#define M_WRTRAM(A,V) TMS32010_RAM_WRMEM(A,V)
+#define M_RDOP(A) TMS32010_RDOP(A)
+#define M_RDOP_ARG(A) TMS32010_RDOP_ARG(A)
+#define P_IN(A) TMS32010_In(A)
+#define P_OUT(A,V) TMS32010_Out(A,V)
+#define BIO_IN TMS32010_BIO_In
struct tms32010_state
{
/******************** CPU Internal Registers *******************/
- UINT16 PC;
- UINT16 PREVPC; /* previous program counter */
- UINT16 STR;
- PAIR ACC;
- PAIR ALU;
- PAIR Preg;
- UINT16 Treg;
- UINT16 AR[2];
- UINT16 STACK[4];
-
- PAIR opcode;
- int INTF; /* Pending Interrupt flag */
- int icount;
- PAIR oldacc;
- UINT16 memaccess;
- int addr_mask;
+ UINT16 PC;
+ UINT16 PREVPC; /* previous program counter */
+ UINT16 STR;
+ PAIR ACC;
+ PAIR ALU;
+ PAIR Preg;
+ UINT16 Treg;
+ UINT16 AR[2];
+ UINT16 STACK[4];
+
+ PAIR opcode;
+ int INTF; /* Pending Interrupt flag */
+ int icount;
+ PAIR oldacc;
+ UINT16 memaccess;
+ int addr_mask;
legacy_cpu_device *device;
address_space *program;
@@ -107,16 +107,16 @@ INLINE tms32010_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TMS32010 ||
- device->type() == TMS32015 ||
- device->type() == TMS32016);
+ device->type() == TMS32015 ||
+ device->type() == TMS32016);
return (tms32010_state *)downcast<legacy_cpu_device *>(device)->token();
}
/* opcode table entry */
struct tms32010_opcode
{
- UINT8 cycles;
- void (*function)(tms32010_state *);
+ UINT8 cycles;
+ void (*function)(tms32010_state *);
};
INLINE int add_branch_cycle(tms32010_state *cpustate);
@@ -125,21 +125,21 @@ INLINE int add_branch_cycle(tms32010_state *cpustate);
/********* The following is the Status (Flag) register definition. *********/
/* 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 */
/* OV | OVM | INTM | 1 | 1 | 1 | 1 | ARP | 1 | 1 | 1 | 1 | 1 | 1 | 1 | DP */
-#define OV_FLAG 0x8000 /* OV (Overflow flag) 1 indicates an overflow */
-#define OVM_FLAG 0x4000 /* OVM (Overflow Mode bit) 1 forces ACC overflow to greatest positive or negative saturation value */
-#define INTM_FLAG 0x2000 /* INTM (Interrupt Mask flag) 0 enables maskable interrupts */
-#define ARP_REG 0x0100 /* ARP (Auxiliary Register Pointer) */
-#define DP_REG 0x0001 /* DP (Data memory Pointer (bank) bit) */
+#define OV_FLAG 0x8000 /* OV (Overflow flag) 1 indicates an overflow */
+#define OVM_FLAG 0x4000 /* OVM (Overflow Mode bit) 1 forces ACC overflow to greatest positive or negative saturation value */
+#define INTM_FLAG 0x2000 /* INTM (Interrupt Mask flag) 0 enables maskable interrupts */
+#define ARP_REG 0x0100 /* ARP (Auxiliary Register Pointer) */
+#define DP_REG 0x0001 /* DP (Data memory Pointer (bank) bit) */
-#define OV ( cpustate->STR & OV_FLAG) /* OV (Overflow flag) */
-#define OVM ( cpustate->STR & OVM_FLAG) /* OVM (Overflow Mode bit) 1 indicates an overflow */
-#define INTM ( cpustate->STR & INTM_FLAG) /* INTM (Interrupt enable flag) 0 enables maskable interrupts */
-#define ARP ((cpustate->STR & ARP_REG) >> 8) /* ARP (Auxiliary Register Pointer) */
-#define DP ((cpustate->STR & DP_REG) << 7) /* DP (Data memory Pointer bit) */
+#define OV ( cpustate->STR & OV_FLAG) /* OV (Overflow flag) */
+#define OVM ( cpustate->STR & OVM_FLAG) /* OVM (Overflow Mode bit) 1 indicates an overflow */
+#define INTM ( cpustate->STR & INTM_FLAG) /* INTM (Interrupt enable flag) 0 enables maskable interrupts */
+#define ARP ((cpustate->STR & ARP_REG) >> 8) /* ARP (Auxiliary Register Pointer) */
+#define DP ((cpustate->STR & DP_REG) << 7) /* DP (Data memory Pointer bit) */
-#define DMA_DP (DP | (cpustate->opcode.b.l & 0x7f)) /* address used in direct memory access operations */
-#define DMA_DP1 (0x80 | cpustate->opcode.b.l) /* address used in direct memory access operations for sst instruction */
-#define IND (cpustate->AR[ARP] & 0xff) /* address used in indirect memory access operations */
+#define DMA_DP (DP | (cpustate->opcode.b.l & 0x7f)) /* address used in direct memory access operations */
+#define DMA_DP1 (0x80 | cpustate->opcode.b.l) /* address used in direct memory access operations for sst instruction */
+#define IND (cpustate->AR[ARP] & 0xff) /* address used in indirect memory access operations */
@@ -319,7 +319,7 @@ INLINE void putdata_sst(tms32010_state *cpustate, UINT16 data)
if (cpustate->opcode.b.l & 0x80)
cpustate->memaccess = IND;
else
- cpustate->memaccess = DMA_DP1; /* Page 1 only */
+ cpustate->memaccess = DMA_DP1; /* Page 1 only */
if (cpustate->opcode.b.l & 0x80) {
UPDATE_AR(cpustate);
@@ -570,7 +570,7 @@ static void lst(tms32010_state *cpustate)
cpustate->opcode.b.l |= 0x08; /* In Indirect Addressing mode, next ARP is not supported here so mask it */
}
getdata(cpustate, 0,0);
- cpustate->ALU.w.l &= (~INTM_FLAG); /* Must not affect INTM */
+ cpustate->ALU.w.l &= (~INTM_FLAG); /* Must not affect INTM */
cpustate->STR &= INTM_FLAG;
cpustate->STR |= cpustate->ALU.w.l;
cpustate->STR |= 0x1efe;
@@ -750,46 +750,46 @@ static void zals(tms32010_state *cpustate)
static const tms32010_opcode opcode_main[256]=
{
-/*00*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
-/*08*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
-/*10*/ {1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },
-/*18*/ {1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },
-/*20*/ {1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },
-/*28*/ {1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },
-/*30*/ {1, sar_ar0 },{1, sar_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*38*/ {1, lar_ar0 },{1, lar_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*40*/ {2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },
-/*48*/ {2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },
-/*50*/ {1, sacl },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*58*/ {1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },
-/*60*/ {1, addh },{1, adds },{1, subh },{1, subs },{1, subc },{1, zalh },{1, zals },{3, tblr },
-/*68*/ {1, larp_mar},{1, dmov },{1, lt },{1, ltd },{1, lta },{1, mpy },{1, ldpk },{1, ldp },
-/*70*/ {1, lark_ar0},{1, lark_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*78*/ {1, xor_ },{1, and_ },{1, or_ },{1, lst },{1, sst },{3, tblw },{1, lack },{0, opcodes_7F },
-/*80*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
-/*88*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
-/*90*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
-/*98*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
-/*A0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*A8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*B0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*B8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*C0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*C8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*D0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*D8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*E0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*E8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*F0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{1, banz },{1, bv },{1, bioz },{0, illegal },
-/*F8*/ {2, call },{2, br },{1, blz },{1, blez },{1, bgz },{1, bgez },{1, bnz },{1, bz }
+/*00*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
+/*08*/ {1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },{1, add_sh },
+/*10*/ {1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },
+/*18*/ {1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },{1, sub_sh },
+/*20*/ {1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },
+/*28*/ {1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },{1, lac_sh },
+/*30*/ {1, sar_ar0 },{1, sar_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*38*/ {1, lar_ar0 },{1, lar_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*40*/ {2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },{2, in_p },
+/*48*/ {2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },{2, out_p },
+/*50*/ {1, sacl },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*58*/ {1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },{1, sach_sh },
+/*60*/ {1, addh },{1, adds },{1, subh },{1, subs },{1, subc },{1, zalh },{1, zals },{3, tblr },
+/*68*/ {1, larp_mar},{1, dmov },{1, lt },{1, ltd },{1, lta },{1, mpy },{1, ldpk },{1, ldp },
+/*70*/ {1, lark_ar0},{1, lark_ar1 },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*78*/ {1, xor_ },{1, and_ },{1, or_ },{1, lst },{1, sst },{3, tblw },{1, lack },{0, opcodes_7F },
+/*80*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*88*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*90*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*98*/ {1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },{1, mpyk },
+/*A0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*A8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*B0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*B8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*C0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*C8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*D0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*D8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*E0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*E8*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*F0*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{1, banz },{1, bv },{1, bioz },{0, illegal },
+/*F8*/ {2, call },{2, br },{1, blz },{1, blez },{1, bgz },{1, bgez },{1, bnz },{1, bz }
};
static const tms32010_opcode opcode_7F[32]=
{
-/*80*/ {1, nop },{1, dint },{1, eint },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*88*/ {1, abst },{1, zac },{1, rovm },{1, sovm },{2, cala },{2, ret },{1, pac },{1, apac },
-/*90*/ {1, spac },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
-/*98*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{2, push },{2, pop },{0, illegal },{0, illegal }
+/*80*/ {1, nop },{1, dint },{1, eint },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*88*/ {1, abst },{1, zac },{1, rovm },{1, sovm },{2, cala },{2, ret },{1, pac },{1, apac },
+/*90*/ {1, spac },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },{0, illegal },
+/*98*/ {0, illegal },{0, illegal },{0, illegal },{0, illegal },{2, push },{2, pop },{0, illegal },{0, illegal }
};
INLINE int add_branch_cycle(tms32010_state *cpustate)
@@ -865,7 +865,7 @@ static int Ext_IRQ(tms32010_state *cpustate)
SET(cpustate, INTM_FLAG);
PUSH_STACK(cpustate, cpustate->PC);
cpustate->PC = 0x0002;
- return (opcode_7F[0x1c].cycles + opcode_7F[0x01].cycles); /* 3 cycles used due to PUSH and DINT operation ? */
+ return (opcode_7F[0x1c].cycles + opcode_7F[0x01].cycles); /* 3 cycles used due to PUSH and DINT operation ? */
}
return (0);
}
@@ -894,7 +894,7 @@ static CPU_EXECUTE( tms32010 )
cpustate->opcode.d = M_RDOP(cpustate->PC);
cpustate->PC++;
- if (cpustate->opcode.b.h != 0x7f) { /* Do all opcodes except the 7Fxx ones */
+ if (cpustate->opcode.b.h != 0x7f) { /* Do all opcodes except the 7Fxx ones */
cpustate->icount -= opcode_main[cpustate->opcode.b.h].cycles;
(*opcode_main[cpustate->opcode.b.h].function)(cpustate);
}
@@ -912,8 +912,8 @@ static CPU_EXECUTE( tms32010 )
****************************************************************************/
static ADDRESS_MAP_START( tms32010_ram, AS_DATA, 16, legacy_cpu_device )
- AM_RANGE(0x00, 0x7f) AM_RAM /* Page 0 */
- AM_RANGE(0x80, 0x8f) AM_RAM /* Page 1 */
+ AM_RANGE(0x00, 0x7f) AM_RAM /* Page 0 */
+ AM_RANGE(0x80, 0x8f) AM_RAM /* Page 1 */
ADDRESS_MAP_END
@@ -947,20 +947,20 @@ static CPU_SET_INFO( tms32010 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32010_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PC: cpustate->PC = info->i; break;
/* This is actually not a stack pointer, but the stack contents */
/* Stack is a 4 level First In Last Out stack */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS32010_STK3: cpustate->STACK[3] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_STR: cpustate->STR = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_ACC: cpustate->ACC.d = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_PREG: cpustate->Preg.d = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_TREG: cpustate->Treg = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR0: cpustate->AR[0] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR1: cpustate->AR[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STK3: cpustate->STACK[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STR: cpustate->STR = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_ACC: cpustate->ACC.d = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PREG: cpustate->Preg.d = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_TREG: cpustate->Treg = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR0: cpustate->AR[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR1: cpustate->AR[1] = info->i; break;
}
}
@@ -977,60 +977,60 @@ CPU_GET_INFO( tms32010 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms32010_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = -1; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->INTF & TMS32010_INT_PENDING) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms32010_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 3; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 12; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 5; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = -1; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->INTF & TMS32010_INT_PENDING) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32010_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PC: info->i = cpustate->PC; break;
/* This is actually not a stack pointer, but the stack contents */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS32010_STK3: info->i = cpustate->STACK[3]; break;
- case CPUINFO_INT_REGISTER + TMS32010_ACC: info->i = cpustate->ACC.d; break;
- case CPUINFO_INT_REGISTER + TMS32010_STR: info->i = cpustate->STR; break;
- case CPUINFO_INT_REGISTER + TMS32010_PREG: info->i = cpustate->Preg.d; break;
- case CPUINFO_INT_REGISTER + TMS32010_TREG: info->i = cpustate->Treg; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR0: info->i = cpustate->AR[0]; break;
- case CPUINFO_INT_REGISTER + TMS32010_AR1: info->i = cpustate->AR[1]; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STK3: info->i = cpustate->STACK[3]; break;
+ case CPUINFO_INT_REGISTER + TMS32010_ACC: info->i = cpustate->ACC.d; break;
+ case CPUINFO_INT_REGISTER + TMS32010_STR: info->i = cpustate->STR; break;
+ case CPUINFO_INT_REGISTER + TMS32010_PREG: info->i = cpustate->Preg.d; break;
+ case CPUINFO_INT_REGISTER + TMS32010_TREG: info->i = cpustate->Treg; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR0: info->i = cpustate->AR[0]; break;
+ case CPUINFO_INT_REGISTER + TMS32010_AR1: info->i = cpustate->AR[1]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32010); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms32010); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32010); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms32010); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32010); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32010); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32010_ram); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32010); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms32010); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32010); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms32010); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32010); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32010); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32010_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS32010"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments TMS32010"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.31"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32010"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments TMS32010"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.31"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
@@ -1052,18 +1052,18 @@ CPU_GET_INFO( tms32010 )
cpustate->STR & 0x0001 ? '1':'0');
break;
- case CPUINFO_STR_REGISTER + TMS32010_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + TMS32010_SP: sprintf(info->s, "SP:%X", 0); /* fake stack pointer */ break;
- case CPUINFO_STR_REGISTER + TMS32010_STR: sprintf(info->s, "STR:%04X", cpustate->STR); break;
- case CPUINFO_STR_REGISTER + TMS32010_ACC: sprintf(info->s, "ACC:%08X", cpustate->ACC.d); break;
- case CPUINFO_STR_REGISTER + TMS32010_PREG: sprintf(info->s, "P:%08X", cpustate->Preg.d); break;
- case CPUINFO_STR_REGISTER + TMS32010_TREG: sprintf(info->s, "T:%04X", cpustate->Treg); break;
- case CPUINFO_STR_REGISTER + TMS32010_AR0: sprintf(info->s, "AR0:%04X", cpustate->AR[0]); break;
- case CPUINFO_STR_REGISTER + TMS32010_AR1: sprintf(info->s, "AR1:%04X", cpustate->AR[1]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK0: sprintf(info->s, "STK0:%04X", cpustate->STACK[0]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK1: sprintf(info->s, "STK1:%04X", cpustate->STACK[1]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK2: sprintf(info->s, "STK2:%04X", cpustate->STACK[2]); break;
- case CPUINFO_STR_REGISTER + TMS32010_STK3: sprintf(info->s, "STK3:%04X", cpustate->STACK[3]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + TMS32010_SP: sprintf(info->s, "SP:%X", 0); /* fake stack pointer */ break;
+ case CPUINFO_STR_REGISTER + TMS32010_STR: sprintf(info->s, "STR:%04X", cpustate->STR); break;
+ case CPUINFO_STR_REGISTER + TMS32010_ACC: sprintf(info->s, "ACC:%08X", cpustate->ACC.d); break;
+ case CPUINFO_STR_REGISTER + TMS32010_PREG: sprintf(info->s, "P:%08X", cpustate->Preg.d); break;
+ case CPUINFO_STR_REGISTER + TMS32010_TREG: sprintf(info->s, "T:%04X", cpustate->Treg); break;
+ case CPUINFO_STR_REGISTER + TMS32010_AR0: sprintf(info->s, "AR0:%04X", cpustate->AR[0]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_AR1: sprintf(info->s, "AR1:%04X", cpustate->AR[1]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK0: sprintf(info->s, "STK0:%04X", cpustate->STACK[0]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK1: sprintf(info->s, "STK1:%04X", cpustate->STACK[1]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK2: sprintf(info->s, "STK2:%04X", cpustate->STACK[2]); break;
+ case CPUINFO_STR_REGISTER + TMS32010_STK3: sprintf(info->s, "STK3:%04X", cpustate->STACK[3]); break;
}
}
@@ -1073,8 +1073,8 @@ CPU_GET_INFO( tms32010 )
****************************************************************************/
static ADDRESS_MAP_START( tms32015_ram, AS_DATA, 16, tms32015_device )
- AM_RANGE(0x00, 0x7f) AM_RAM /* Page 0 */
- AM_RANGE(0x80, 0xff) AM_RAM /* Page 1 */
+ AM_RANGE(0x00, 0x7f) AM_RAM /* Page 0 */
+ AM_RANGE(0x80, 0xff) AM_RAM /* Page 1 */
ADDRESS_MAP_END
@@ -1087,12 +1087,12 @@ CPU_GET_INFO( tms32015 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32015_ram); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32015_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS32015"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32015"); break;
- default: CPU_GET_INFO_CALL(tms32010); break;
+ default: CPU_GET_INFO_CALL(tms32010); break;
}
}
@@ -1120,13 +1120,13 @@ CPU_GET_INFO( tms32016 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32016); break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32015_ram); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32016); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = ADDRESS_MAP_NAME(tms32015_ram); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS32016"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32016"); break;
- default: CPU_GET_INFO_CALL(tms32010); break;
+ default: CPU_GET_INFO_CALL(tms32010); break;
}
}
diff --git a/src/emu/cpu/tms32010/tms32010.h b/src/emu/cpu/tms32010/tms32010.h
index bd715ebcb5e..64922e3913e 100644
--- a/src/emu/cpu/tms32010/tms32010.h
+++ b/src/emu/cpu/tms32010/tms32010.h
@@ -1,15 +1,15 @@
- /**************************************************************************\
- * Texas Instruments TMS32010 DSP Emulator *
- * *
- * Copyright Tony La Porta *
- * You are not allowed to distribute this software commercially. *
- * Written for the MAME project. *
- * *
- * *
- * Note : This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS32010 DSP Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * You are not allowed to distribute this software commercially. *
+ * Written for the MAME project. *
+ * *
+ * *
+ * Note : This is a word based microcontroller, with addressing *
+ * architecture based on the Harvard addressing scheme. *
+ * *
+ \**************************************************************************/
#pragma once
@@ -25,11 +25,11 @@
* AM_RANGE(TMS32010_BIO, TMS32010_BIO) AM_READ(twincobr_bio_line_r)
*/
-#define TMS32010_BIO 0x10 /* BIO input */
+#define TMS32010_BIO 0x10 /* BIO input */
-#define TMS32010_INT_PENDING 0x80000000
-#define TMS32010_INT_NONE 0
+#define TMS32010_INT_PENDING 0x80000000
+#define TMS32010_INT_NONE 0
enum
@@ -51,4 +51,4 @@ DECLARE_LEGACY_CPU_DEVICE(TMS32016, tms32016);
CPU_DISASSEMBLE( tms32010 );
-#endif /* __TMS32010_H__ */
+#endif /* __TMS32010_H__ */
diff --git a/src/emu/cpu/tms32025/32025dsm.c b/src/emu/cpu/tms32025/32025dsm.c
index 4115e5ff965..b0b005f3b8d 100644
--- a/src/emu/cpu/tms32025/32025dsm.c
+++ b/src/emu/cpu/tms32025/32025dsm.c
@@ -1,32 +1,32 @@
- /**************************************************************************\
- * Texas Instruments TMS320x25 DSP Disassembler *
- * *
- * Copyright Tony La Porta *
- * To be used with TMS320x25 DSP Emulator engine. *
- * Written for the MAME project. *
- * *
- * Many thanks to those involved in the i8039 Disassembler *
- * as the structure here was borrowed from it. *
- * *
- * Note : This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- * *
- * A Memory Address *
- * B Opcode Address Argument (Requires next opcode read) *
- * C Compare mode *
- * D Immediate byte load *
- * K Immediate bit load *
- * W Immediate word load *
- * M AR[x] register modification type (for indirect addressing) *
- * N ARP register to change ARP pointer to (for indirect addressing) *
- * P I/O port address number *
- * R AR[R] register to use *
- * S Shift ALU left *
- * T Shift ALU left (Hex) / Nibble data *
- * X Don't care bit *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS320x25 DSP Disassembler *
+ * *
+ * Copyright Tony La Porta *
+ * To be used with TMS320x25 DSP Emulator engine. *
+ * Written for the MAME project. *
+ * *
+ * Many thanks to those involved in the i8039 Disassembler *
+ * as the structure here was borrowed from it. *
+ * *
+ * Note : This is a word based microcontroller, with addressing *
+ * architecture based on the Harvard addressing scheme. *
+ * *
+ * *
+ * A Memory Address *
+ * B Opcode Address Argument (Requires next opcode read) *
+ * C Compare mode *
+ * D Immediate byte load *
+ * K Immediate bit load *
+ * W Immediate word load *
+ * M AR[x] register modification type (for indirect addressing) *
+ * N ARP register to change ARP pointer to (for indirect addressing) *
+ * P I/O port address number *
+ * R AR[R] register to use *
+ * S Shift ALU left *
+ * T Shift ALU left (Hex) / Nibble data *
+ * X Don't care bit *
+ * *
+ \**************************************************************************/
#include "emu.h"
#include "debugger.h"
@@ -48,77 +48,77 @@ static const char *const cmpmode[4] = { "0 (ARx = AR0)" , "1 (ARx < AR0)" , "2 (
static const char *const TMS32025Formats[] = {
- FMT("0000tttt0aaaaaaa", "add %A,%T"), /* 0xxx */
+ FMT("0000tttt0aaaaaaa", "add %A,%T"), /* 0xxx */
FMT("0000tttt1mmmnnnn", "add %M,%T%N"),
- FMT("0001tttt0aaaaaaa", "sub %A,%T"), /* 1xxx */
+ FMT("0001tttt0aaaaaaa", "sub %A,%T"), /* 1xxx */
FMT("0001tttt1mmmnnnn", "sub %M,%T%N"),
- FMT("0010tttt0aaaaaaa", "lac %A,%T"), /* 2xxx */
+ FMT("0010tttt0aaaaaaa", "lac %A,%T"), /* 2xxx */
FMT("0010tttt1mmmnnnn", "lac %M,%T%N"),
- FMT("00110rrr0aaaaaaa", "lar %R,%A"), /* 3xxx */
+ FMT("00110rrr0aaaaaaa", "lar %R,%A"), /* 3xxx */
FMT("00110rrr1mmmnnnn", "lar %R%M%N"),
- FMT("001110000aaaaaaa", "mpy %A"), /* 38xx */
+ FMT("001110000aaaaaaa", "mpy %A"), /* 38xx */
FMT("001110001mmmnnnn", "mpy %M%N"),
- FMT("001110010aaaaaaa", "sqra %A"), /* 39xx */
+ FMT("001110010aaaaaaa", "sqra %A"), /* 39xx */
FMT("001110011mmmnnnn", "sqra %M%N"),
- FMT("001110100aaaaaaa", "mpya %A"), /* 3Axx */
+ FMT("001110100aaaaaaa", "mpya %A"), /* 3Axx */
FMT("001110101mmmnnnn", "mpya %M%N"),
- FMT("001110110aaaaaaa", "mpys %A"), /* 3Bxx */
+ FMT("001110110aaaaaaa", "mpys %A"), /* 3Bxx */
FMT("001110111mmmnnnn", "mpys %M%N"),
- FMT("001111000aaaaaaa", "lt %A"), /* 3Cxx */
+ FMT("001111000aaaaaaa", "lt %A"), /* 3Cxx */
FMT("001111001mmmnnnn", "lt %M%N"),
- FMT("001111010aaaaaaa", "lta %A"), /* 3Dxx */
+ FMT("001111010aaaaaaa", "lta %A"), /* 3Dxx */
FMT("001111011mmmnnnn", "lta %M%N"),
- FMT("001111100aaaaaaa", "ltp %A"), /* 3Exx */
+ FMT("001111100aaaaaaa", "ltp %A"), /* 3Exx */
FMT("001111101mmmnnnn", "ltp %M%N"),
- FMT("001111110aaaaaaa", "ltd %A"), /* 3Fxx */
+ FMT("001111110aaaaaaa", "ltd %A"), /* 3Fxx */
FMT("001111111mmmnnnn", "ltd %M%N"),
- FMT("010000000aaaaaaa", "zalh %A"), /* 40xx */
+ FMT("010000000aaaaaaa", "zalh %A"), /* 40xx */
FMT("010000001mmmnnnn", "zalh %M%N"),
- FMT("010000010aaaaaaa", "zals %A"), /* 41xx */
+ FMT("010000010aaaaaaa", "zals %A"), /* 41xx */
FMT("010000011mmmnnnn", "zals %M%N"),
- FMT("010000100aaaaaaa", "lact %A"), /* 42xx */
+ FMT("010000100aaaaaaa", "lact %A"), /* 42xx */
FMT("010000101mmmnnnn", "lact %M%N"),
- FMT("010000110aaaaaaa", "addc %A%S"), /* 43xx */
+ FMT("010000110aaaaaaa", "addc %A%S"), /* 43xx */
FMT("010000111mmmnnnn", "addc %M%S%N"),
- FMT("010001000aaaaaaa", "subh %A"), /* 44xx */
+ FMT("010001000aaaaaaa", "subh %A"), /* 44xx */
FMT("010001001mmmnnnn", "subh %M%N"),
- FMT("010001010aaaaaaa", "subs %A"), /* 45xx */
+ FMT("010001010aaaaaaa", "subs %A"), /* 45xx */
FMT("010001011mmmnnnn", "subs %M%N"),
- FMT("010001100aaaaaaa", "subt %A"), /* 46xx */
+ FMT("010001100aaaaaaa", "subt %A"), /* 46xx */
FMT("010001101mmmnnnn", "subt %M%N"),
- FMT("010001110aaaaaaa", "subc %A"), /* 47xx */
+ FMT("010001110aaaaaaa", "subc %A"), /* 47xx */
FMT("010001111mmmnnnn", "subc %M%N"),
- FMT("010010000aaaaaaa", "addh %A"), /* 48xx */
+ FMT("010010000aaaaaaa", "addh %A"), /* 48xx */
FMT("010010001mmmnnnn", "addh %M%N"),
- FMT("010010010aaaaaaa", "adds %A"), /* 49xx */
+ FMT("010010010aaaaaaa", "adds %A"), /* 49xx */
FMT("010010011mmmnnnn", "adds %M%N"),
- FMT("010010100aaaaaaa", "addt %A"), /* 4Axx */
+ FMT("010010100aaaaaaa", "addt %A"), /* 4Axx */
FMT("010010101mmmnnnn", "addt %M%N"),
- FMT("010010110aaaaaaa", "rpt %A"), /* 4Bxx */
+ FMT("010010110aaaaaaa", "rpt %A"), /* 4Bxx */
FMT("010010111mmmnnnn", "rpt %M%N"),
- FMT("010011000aaaaaaa", "xor %A"), /* 4Cxx */
+ FMT("010011000aaaaaaa", "xor %A"), /* 4Cxx */
FMT("010011001mmmnnnn", "xor %M%N"),
- FMT("010011010aaaaaaa", "or %A"), /* 4Dxx */
+ FMT("010011010aaaaaaa", "or %A"), /* 4Dxx */
FMT("010011011mmmnnnn", "or %M%N"),
- FMT("010011100aaaaaaa", "and %A"), /* 4Exx */
+ FMT("010011100aaaaaaa", "and %A"), /* 4Exx */
FMT("010011101mmmnnnn", "and %M%N"),
- FMT("010011110aaaaaaa", "subb %A"), /* 4Fxx */
+ FMT("010011110aaaaaaa", "subb %A"), /* 4Fxx */
FMT("010011111mmmnnnn", "subb %M%N"),
- FMT("010100000aaaaaaa", "lst %A"), /* 50xx */
+ FMT("010100000aaaaaaa", "lst %A"), /* 50xx */
FMT("010100001mmmnnnn", "lst %M%N"),
- FMT("010100010aaaaaaa", "lst1 %A"), /* 51xx */
+ FMT("010100010aaaaaaa", "lst1 %A"), /* 51xx */
FMT("010100011mmmnnnn", "lst1 %M%N"),
- FMT("010100100aaaaaaa", "ldp %A"), /* 52xx */
+ FMT("010100100aaaaaaa", "ldp %A"), /* 52xx */
FMT("010100101mmmnnnn", "ldp %M%N"),
- FMT("010100110aaaaaaa", "lph %A"), /* 53xx */
+ FMT("010100110aaaaaaa", "lph %A"), /* 53xx */
FMT("010100111mmmnnnn", "lph %M%N"),
- FMT("010101000aaaaaaa", "pshd %A"), /* 54xx */
+ FMT("010101000aaaaaaa", "pshd %A"), /* 54xx */
FMT("010101001mmmnnnn", "pshd %M%N"),
/* FMT("010101010aaaaaaa", "mar %A"), 55xx */
/* MAR direct has been expanded out to all its variations because one of its */
/* its opcodes is the same as NOP. Actually MAR direct just performs a NOP */
- FMT("0101010100000000", "nop"), /* 5500 */
+ FMT("0101010100000000", "nop"), /* 5500 */
FMT("0101010100000001", "mar $01"),
FMT("0101010100000010", "mar $02"),
FMT("0101010100000011", "mar $03"),
@@ -145,9 +145,9 @@ static const char *const TMS32025Formats[] = {
/* FMT("010101011mmmnnnn", "mar %M%N"), 55xx */
/* MAR indirect has been expanded out to all its variations because one of */
/* its opcodes, is the same as LARP (actually performs the same function) */
- FMT("0101010110000xxx", "mar *"), /* 558x */
- FMT("0101010110001kkk", "larp %K"), /* 558x */
- FMT("010101011001nnnn", "mar *-%N"), /* 558x */
+ FMT("0101010110000xxx", "mar *"), /* 558x */
+ FMT("0101010110001kkk", "larp %K"), /* 558x */
+ FMT("010101011001nnnn", "mar *-%N"), /* 558x */
FMT("010101011010nnnn", "mar *+%N"),
FMT("010101011011nnnn", "mar ??%N"),
FMT("010101011100nnnn", "mar *BR0-%N"),
@@ -155,58 +155,58 @@ static const char *const TMS32025Formats[] = {
FMT("010101011110nnnn", "mar *0+%N"),
FMT("010101011111nnnn", "mar *BR0+%N"),
- FMT("010101100aaaaaaa", "dmov %A"), /* 56xx */
+ FMT("010101100aaaaaaa", "dmov %A"), /* 56xx */
FMT("010101101mmmnnnn", "dmov %M%N"),
- FMT("010101110aaaaaaa", "bitt %A"), /* 57xx */
+ FMT("010101110aaaaaaa", "bitt %A"), /* 57xx */
FMT("010101111mmmnnnn", "bitt %M%N"),
- FMT("010110000aaaaaaa", "tblr %A"), /* 58xx */
+ FMT("010110000aaaaaaa", "tblr %A"), /* 58xx */
FMT("010110001mmmnnnn", "tblr %M%N"),
- FMT("010110010aaaaaaa", "tblw %A"), /* 59xx */
+ FMT("010110010aaaaaaa", "tblw %A"), /* 59xx */
FMT("010110011mmmnnnn", "tblw %M%N"),
- FMT("010110100aaaaaaa", "sqrs %A"), /* 5Axx */
+ FMT("010110100aaaaaaa", "sqrs %A"), /* 5Axx */
FMT("010110101mmmnnnn", "sqrs %M%N"),
- FMT("010110110aaaaaaa", "lts %A"), /* 5Bxx */
+ FMT("010110110aaaaaaa", "lts %A"), /* 5Bxx */
FMT("010110111mmmnnnn", "lts %M%N"),
- FMT("010111000aaaaaaabbbbbbbbbbbbbbbb", "macd %B,%A"), /* 5Cxx */
+ FMT("010111000aaaaaaabbbbbbbbbbbbbbbb", "macd %B,%A"), /* 5Cxx */
FMT("010111001mmmnnnnbbbbbbbbbbbbbbbb", "macd %B,%M%N"),
- FMT("010111010aaaaaaabbbbbbbbbbbbbbbb", "mac %B,%A"), /* 5Dxx */
+ FMT("010111010aaaaaaabbbbbbbbbbbbbbbb", "mac %B,%A"), /* 5Dxx */
FMT("010111011mmmnnnnbbbbbbbbbbbbbbbb", "mac %B,%M%N"),
- FMT("010111101mmmnnnnbbbbbbbbbbbbbbbb", "bc %B %M%N"), /* 5Exx */
- FMT("010111111mmmnnnnbbbbbbbbbbbbbbbb", "bnc %B %M%N"), /* 5Fxx */
- FMT("01100sss0aaaaaaa", "sacl %A%S"), /* 6xxx */
+ FMT("010111101mmmnnnnbbbbbbbbbbbbbbbb", "bc %B %M%N"), /* 5Exx */
+ FMT("010111111mmmnnnnbbbbbbbbbbbbbbbb", "bnc %B %M%N"), /* 5Fxx */
+ FMT("01100sss0aaaaaaa", "sacl %A%S"), /* 6xxx */
FMT("01100sss1mmmnnnn", "sacl %M%S%N"),
- FMT("01101sss0aaaaaaa", "sach %A%S"), /* 6Xxx */
+ FMT("01101sss0aaaaaaa", "sach %A%S"), /* 6Xxx */
FMT("01101sss1mmmnnnn", "sach %M%S%N"),
- FMT("01110rrr0aaaaaaa", "sar %R,%A"), /* 7xxx */
+ FMT("01110rrr0aaaaaaa", "sar %R,%A"), /* 7xxx */
FMT("01110rrr1mmmnnnn", "sar %R%M%N"),
- FMT("011110000aaaaaaa", "sst %A"), /* 78xx */
+ FMT("011110000aaaaaaa", "sst %A"), /* 78xx */
FMT("011110001mmmnnnn", "sst %M%N"),
- FMT("011110010aaaaaaa", "sst1 %A"), /* 79xx */
+ FMT("011110010aaaaaaa", "sst1 %A"), /* 79xx */
FMT("011110011mmmnnnn", "sst1 %M%N"),
- FMT("011110100aaaaaaa", "popd %A"), /* 7Axx */
+ FMT("011110100aaaaaaa", "popd %A"), /* 7Axx */
FMT("011110101mmmnnnn", "popd %M%N"),
- FMT("011110110aaaaaaa", "zalr %A"), /* 7Bxx */
+ FMT("011110110aaaaaaa", "zalr %A"), /* 7Bxx */
FMT("011110111mmmnnnn", "zalr %M%N"),
- FMT("011111000aaaaaaa", "spl %A"), /* 7Cxx */
+ FMT("011111000aaaaaaa", "spl %A"), /* 7Cxx */
FMT("011111001mmmnnnn", "spl %M%N"),
- FMT("011111010aaaaaaa", "sph %A"), /* 7Dxx */
+ FMT("011111010aaaaaaa", "sph %A"), /* 7Dxx */
FMT("011111011mmmnnnn", "sph %M%N"),
- FMT("011111100aaaaaaa", "adrk %A"), /* 7Exx */
+ FMT("011111100aaaaaaa", "adrk %A"), /* 7Exx */
FMT("011111101mmmnnnn", "adrk %M%N"),
- FMT("011111110aaaaaaa", "sbrk %A"), /* 7Fxx */
+ FMT("011111110aaaaaaa", "sbrk %A"), /* 7Fxx */
FMT("011111111mmmnnnn", "sbrk %M%N"),
- FMT("1000pppp0aaaaaaa", "in %A,%P"), /* 8xxx */
+ FMT("1000pppp0aaaaaaa", "in %A,%P"), /* 8xxx */
FMT("1000pppp1mmmnnnn", "in %M,%P%N"),
- FMT("1001tttt0aaaaaaa", "bit %A,%T"), /* 9xxx */
+ FMT("1001tttt0aaaaaaa", "bit %A,%T"), /* 9xxx */
FMT("1001tttt1mmmnnnn", "bit %M,%T%N"),
- FMT("101wwwwwwwwwwwww", "mpyk %W"), /* Axxx-Bxxx */
- FMT("11000rrrdddddddd", "lark %R,%D"), /* Cxxx */
- FMT("1100100kdddddddd", "ldpk %K%D"), /* Cxxx */
+ FMT("101wwwwwwwwwwwww", "mpyk %W"), /* Axxx-Bxxx */
+ FMT("11000rrrdddddddd", "lark %R,%D"), /* Cxxx */
+ FMT("1100100kdddddddd", "ldpk %K%D"), /* Cxxx */
/* FMT("11001010dddddddd", "lack %D"), CAxx */
/* LACK has been expanded out to all its variations because one of its */
/* its opcodes is the same as ZAC. Actually, it performs the same function */
- FMT("1100101000000000", "zac"), /* CA00 */
- FMT("1100101000000001", "lack 01h"), /* CAxx */
+ FMT("1100101000000000", "zac"), /* CA00 */
+ FMT("1100101000000001", "lack 01h"), /* CAxx */
FMT("1100101000000010", "lack 02h"),
FMT("1100101000000011", "lack 03h"),
FMT("1100101000000100", "lack 04h"),
@@ -237,91 +237,91 @@ static const char *const TMS32025Formats[] = {
FMT("110010101110tttt", "lack E%T"),
FMT("110010101111tttt", "lack F%T"),
- FMT("11001011dddddddd", "rptk %D"), /* CBxx */
- FMT("11001100dddddddd", "addk %D"), /* CCxx */
- FMT("11001101dddddddd", "subk %D"), /* CDxx */
- FMT("1100111000000000", "eint"), /* CE00 */
- FMT("1100111000000001", "dint"), /* CE01 */
- FMT("1100111000000010", "rovm"), /* CE02 */
- FMT("1100111000000011", "sovm"), /* CE03 */
- FMT("1100111000000100", "cnfd"), /* CE04 */
- FMT("1100111000000101", "cnfp"), /* CE05 */
- FMT("1100111000000110", "rsxm"), /* CE06 */
- FMT("1100111000000111", "ssxm"), /* CE07 */
- FMT("11001110000010kk", "spm %K"), /* CE0x */
- FMT("1100111000001100", "rxf"), /* CE0C */
- FMT("1100111000001101", "sxf"), /* CE0D */
- FMT("110011100000111k", "fort %K"), /* CE0x */
- FMT("1100111000010100", "pac"), /* CE14 */
- FMT("1100111000010101", "apac"), /* CE15 */
- FMT("1100111000010110", "spac"), /* CE16 */
- FMT("1100111000011000", "sfl"), /* CE18 */
- FMT("1100111000011001", "sfr"), /* CE19 */
- FMT("1100111000011011", "abs"), /* CE1B */
- FMT("1100111000011100", "push"), /* CE1C */
- FMT("1100111000011101", "pop"), /* CE1D */
- FMT("1100111000011110", "trap"), /* CE1E */
- FMT("1100111000011111", "idle"), /* CE1F */
- FMT("1100111000100000", "rtxm"), /* CE20 */
- FMT("1100111000100001", "stxm"), /* CE21 */
- FMT("1100111000100011", "neg"), /* CE23 */
- FMT("1100111000100100", "cala"), /* CE24 */
- FMT("1100111000100101", "bacc"), /* CE25 */
- FMT("1100111000100110", "ret"), /* CE26 */
- FMT("1100111000100111", "cmpl"), /* CE27 */
- FMT("1100111000110000", "rc"), /* CE30 */
- FMT("1100111000110001", "sc"), /* CE31 */
- FMT("1100111000110010", "rtc"), /* CE32 */
- FMT("1100111000110011", "stc"), /* CE33 */
- FMT("1100111000110100", "rol"), /* CE34 */
- FMT("1100111000110101", "ror"), /* CE35 */
- FMT("1100111000110110", "rfsm"), /* CE36 */
- FMT("1100111000110111", "sfsm"), /* CE37 */
- FMT("1100111000111000", "rhm"), /* CE38 */
- FMT("1100111000111001", "shm"), /* CE39 */
- FMT("11001110001111kk", "conf %K"), /* CE3x */
- FMT("11001110010100cc", "cmpr %C"), /* CE5x */
- FMT("110011101mmm0010", "norm %M"), /* CEx2 */
- FMT("110011110aaaaaaa", "mpys %A"), /* CFxx */
+ FMT("11001011dddddddd", "rptk %D"), /* CBxx */
+ FMT("11001100dddddddd", "addk %D"), /* CCxx */
+ FMT("11001101dddddddd", "subk %D"), /* CDxx */
+ FMT("1100111000000000", "eint"), /* CE00 */
+ FMT("1100111000000001", "dint"), /* CE01 */
+ FMT("1100111000000010", "rovm"), /* CE02 */
+ FMT("1100111000000011", "sovm"), /* CE03 */
+ FMT("1100111000000100", "cnfd"), /* CE04 */
+ FMT("1100111000000101", "cnfp"), /* CE05 */
+ FMT("1100111000000110", "rsxm"), /* CE06 */
+ FMT("1100111000000111", "ssxm"), /* CE07 */
+ FMT("11001110000010kk", "spm %K"), /* CE0x */
+ FMT("1100111000001100", "rxf"), /* CE0C */
+ FMT("1100111000001101", "sxf"), /* CE0D */
+ FMT("110011100000111k", "fort %K"), /* CE0x */
+ FMT("1100111000010100", "pac"), /* CE14 */
+ FMT("1100111000010101", "apac"), /* CE15 */
+ FMT("1100111000010110", "spac"), /* CE16 */
+ FMT("1100111000011000", "sfl"), /* CE18 */
+ FMT("1100111000011001", "sfr"), /* CE19 */
+ FMT("1100111000011011", "abs"), /* CE1B */
+ FMT("1100111000011100", "push"), /* CE1C */
+ FMT("1100111000011101", "pop"), /* CE1D */
+ FMT("1100111000011110", "trap"), /* CE1E */
+ FMT("1100111000011111", "idle"), /* CE1F */
+ FMT("1100111000100000", "rtxm"), /* CE20 */
+ FMT("1100111000100001", "stxm"), /* CE21 */
+ FMT("1100111000100011", "neg"), /* CE23 */
+ FMT("1100111000100100", "cala"), /* CE24 */
+ FMT("1100111000100101", "bacc"), /* CE25 */
+ FMT("1100111000100110", "ret"), /* CE26 */
+ FMT("1100111000100111", "cmpl"), /* CE27 */
+ FMT("1100111000110000", "rc"), /* CE30 */
+ FMT("1100111000110001", "sc"), /* CE31 */
+ FMT("1100111000110010", "rtc"), /* CE32 */
+ FMT("1100111000110011", "stc"), /* CE33 */
+ FMT("1100111000110100", "rol"), /* CE34 */
+ FMT("1100111000110101", "ror"), /* CE35 */
+ FMT("1100111000110110", "rfsm"), /* CE36 */
+ FMT("1100111000110111", "sfsm"), /* CE37 */
+ FMT("1100111000111000", "rhm"), /* CE38 */
+ FMT("1100111000111001", "shm"), /* CE39 */
+ FMT("11001110001111kk", "conf %K"), /* CE3x */
+ FMT("11001110010100cc", "cmpr %C"), /* CE5x */
+ FMT("110011101mmm0010", "norm %M"), /* CEx2 */
+ FMT("110011110aaaaaaa", "mpys %A"), /* CFxx */
FMT("110011111mmmnnnn", "mpys %M%N"),
- FMT("11010rrr00000000wwwwwwwwwwwwwwww", "lrlk %R,%W"), /* Dx00 */
- FMT("1101tttt00000001wwwwwwwwwwwwwwww", "lalk %W,%T"), /* Dx01 */
- FMT("1101tttt00000010wwwwwwwwwwwwwwww", "adlk %W,%T"), /* Dx02 */
- FMT("1101tttt00000011wwwwwwwwwwwwwwww", "sblk %W,%T"), /* Dx03 */
- FMT("1101tttt00000100wwwwwwwwwwwwwwww", "andk %W,%T"), /* Dx04 */
- FMT("1101tttt00000101wwwwwwwwwwwwwwww", "ork %W,%T"), /* Dx05 */
- FMT("1101tttt00000110wwwwwwwwwwwwwwww", "xork %W,%T"), /* Dx06 */
- FMT("1110pppp0aaaaaaa", "out %A,%P"), /* Exxx */
+ FMT("11010rrr00000000wwwwwwwwwwwwwwww", "lrlk %R,%W"), /* Dx00 */
+ FMT("1101tttt00000001wwwwwwwwwwwwwwww", "lalk %W,%T"), /* Dx01 */
+ FMT("1101tttt00000010wwwwwwwwwwwwwwww", "adlk %W,%T"), /* Dx02 */
+ FMT("1101tttt00000011wwwwwwwwwwwwwwww", "sblk %W,%T"), /* Dx03 */
+ FMT("1101tttt00000100wwwwwwwwwwwwwwww", "andk %W,%T"), /* Dx04 */
+ FMT("1101tttt00000101wwwwwwwwwwwwwwww", "ork %W,%T"), /* Dx05 */
+ FMT("1101tttt00000110wwwwwwwwwwwwwwww", "xork %W,%T"), /* Dx06 */
+ FMT("1110pppp0aaaaaaa", "out %A,%P"), /* Exxx */
FMT("1110pppp1mmmnnnn", "out %M,%P%N"),
- FMT("111100001mmmnnnnbbbbbbbbbbbbbbbb", "bv %B %M%N"), /* F0xx */
- FMT("111100011mmmnnnnbbbbbbbbbbbbbbbb", "bgz %B %M%N"), /* F1xx */
- FMT("111100101mmmnnnnbbbbbbbbbbbbbbbb", "blez %B %M%N"), /* F2xx */
- FMT("111100111mmmnnnnbbbbbbbbbbbbbbbb", "blz %B %M%N"), /* F3xx */
- FMT("111101001mmmnnnnbbbbbbbbbbbbbbbb", "bgez %B %M%N"), /* F4xx */
- FMT("111101011mmmnnnnbbbbbbbbbbbbbbbb", "bnz %B %M%N"), /* F5xx */
- FMT("111101101mmmnnnnbbbbbbbbbbbbbbbb", "bz %B %M%N"), /* F6xx */
- FMT("111101111mmmnnnnbbbbbbbbbbbbbbbb", "bnv %B %M%N"), /* F7xx */
- FMT("111110001mmmnnnnbbbbbbbbbbbbbbbb", "bbz %B %M%N"), /* F8xx */
- FMT("111110011mmmnnnnbbbbbbbbbbbbbbbb", "bbnz %B %M%N"), /* F9xx */
- FMT("111110101mmmnnnnbbbbbbbbbbbbbbbb", "bioz %B %M%N"), /* FAxx */
- FMT("111110111mmmnnnnbbbbbbbbbbbbbbbb", "banz %B %M%N"), /* FBxx */
- FMT("111111000aaaaaaabbbbbbbbbbbbbbbb", "blkp %B,%A"), /* FCxx */
+ FMT("111100001mmmnnnnbbbbbbbbbbbbbbbb", "bv %B %M%N"), /* F0xx */
+ FMT("111100011mmmnnnnbbbbbbbbbbbbbbbb", "bgz %B %M%N"), /* F1xx */
+ FMT("111100101mmmnnnnbbbbbbbbbbbbbbbb", "blez %B %M%N"), /* F2xx */
+ FMT("111100111mmmnnnnbbbbbbbbbbbbbbbb", "blz %B %M%N"), /* F3xx */
+ FMT("111101001mmmnnnnbbbbbbbbbbbbbbbb", "bgez %B %M%N"), /* F4xx */
+ FMT("111101011mmmnnnnbbbbbbbbbbbbbbbb", "bnz %B %M%N"), /* F5xx */
+ FMT("111101101mmmnnnnbbbbbbbbbbbbbbbb", "bz %B %M%N"), /* F6xx */
+ FMT("111101111mmmnnnnbbbbbbbbbbbbbbbb", "bnv %B %M%N"), /* F7xx */
+ FMT("111110001mmmnnnnbbbbbbbbbbbbbbbb", "bbz %B %M%N"), /* F8xx */
+ FMT("111110011mmmnnnnbbbbbbbbbbbbbbbb", "bbnz %B %M%N"), /* F9xx */
+ FMT("111110101mmmnnnnbbbbbbbbbbbbbbbb", "bioz %B %M%N"), /* FAxx */
+ FMT("111110111mmmnnnnbbbbbbbbbbbbbbbb", "banz %B %M%N"), /* FBxx */
+ FMT("111111000aaaaaaabbbbbbbbbbbbbbbb", "blkp %B,%A"), /* FCxx */
FMT("111111001mmmnnnnbbbbbbbbbbbbbbbb", "blkp %B,%M%N"),
- FMT("111111010aaaaaaabbbbbbbbbbbbbbbb", "blkd %B,%A"), /* FDxx */
+ FMT("111111010aaaaaaabbbbbbbbbbbbbbbb", "blkd %B,%A"), /* FDxx */
FMT("111111011mmmnnnnbbbbbbbbbbbbbbbb", "blkd %B,%M%N"),
- FMT("111111101mmmnnnnbbbbbbbbbbbbbbbb", "call %B %M%N"), /* FExx */
- FMT("111111111mmmnnnnbbbbbbbbbbbbbbbb", "b %B %M%N"), /* FFxx */
+ FMT("111111101mmmnnnnbbbbbbbbbbbbbbbb", "call %B %M%N"), /* FExx */
+ FMT("111111111mmmnnnnbbbbbbbbbbbbbbbb", "b %B %M%N"), /* FFxx */
NULL
};
#define MAX_OPS (((sizeof(TMS32025Formats) / sizeof(TMS32025Formats[0])) - 1) / PTRS_PER_FORMAT)
struct TMS32025Opcode {
- word mask; /* instruction mask */
- word bits; /* constant bits */
- word extcode; /* value that gets extension code */
- const char *parse; /* how to parse bits */
- const char *fmt; /* instruction format */
+ word mask; /* instruction mask */
+ word bits; /* constant bits */
+ word extcode; /* value that gets extension code */
+ const char *parse; /* how to parse bits */
+ const char *fmt; /* instruction format */
};
static TMS32025Opcode Op[MAX_OPS+1];
@@ -388,18 +388,18 @@ static void InitDasm32025(void)
CPU_DISASSEMBLE( tms32025 )
{
UINT32 flags = 0;
- int a, b, c, d, k, m, n, p, r, s, t, w; /* these can all be filled in by parsing an instruction */
+ int a, b, c, d, k, m, n, p, r, s, t, w; /* these can all be filled in by parsing an instruction */
int i;
int op;
int cnt = 1;
int code;
int bit;
//char *buffertmp;
- const char *cp; /* character pointer in OpFormats */
+ const char *cp; /* character pointer in OpFormats */
if (!OpInizialized) InitDasm32025();
- op = -1; /* no matching opcode */
+ op = -1; /* no matching opcode */
code = (oprom[0] << 8) | oprom[1];
for ( i = 0; i < MAX_OPS; i++)
{
diff --git a/src/emu/cpu/tms32025/dis32025.c b/src/emu/cpu/tms32025/dis32025.c
index 44e458f3ede..15f04ccbecd 100644
--- a/src/emu/cpu/tms32025/dis32025.c
+++ b/src/emu/cpu/tms32025/dis32025.c
@@ -1,14 +1,14 @@
- /**************************************************************************\
- * Texas Instruments TMS320x25 DSP Disassembler *
- * *
- * Copyright Tony La Porta *
- * Written for the MAME project. *
- * *
- * Notes : Data is expected to be read from source file as MSB first. *
- * This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS320x25 DSP Disassembler *
+ * *
+ * Copyright Tony La Porta *
+ * Written for the MAME project. *
+ * *
+ * Notes : Data is expected to be read from source file as MSB first. *
+ * This is a word based microcontroller, with addressing *
+ * architecture based on the Harvard addressing scheme. *
+ * *
+ \**************************************************************************/
#include <stdio.h>
#include <string.h>
@@ -102,7 +102,7 @@ int main(int argc,char *argv[])
printf("$%04lX: ",Counter);
for (ii = 0; ii < disasm_words; ii++)
{
- if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
+ if (((Counter*2) + ii) > filelength) /* Past end of length to dump ? */
{
sprintf(String_Output,"???? dw %02.2X%02.2Xh (Past end of disassembly !)",Buffer[((Counter-1)*2)],Buffer[((Counter-1)*2)+1]);
}
diff --git a/src/emu/cpu/tms32025/tms32025.c b/src/emu/cpu/tms32025/tms32025.c
index 7d38abb827a..cdcb29f72ba 100644
--- a/src/emu/cpu/tms32025/tms32025.c
+++ b/src/emu/cpu/tms32025/tms32025.c
@@ -1,48 +1,48 @@
- /**************************************************************************\
- * Texas Instruments TMS320x25 DSP Emulator *
- * *
- * Copyright Tony La Porta *
- * Written for the MAME project. *
- * *
- * *
- * Three versions of the chip are available, and they are: *
- * TMS320C25 Internal ROM one time programmed at TI *
- * TMS320E25 Internal ROM programmable as a normal EPROM *
- * TMS320P25 Internal ROM programmable once as a normal EPROM only *
- * These devices can also be used as a MicroController with external ROM *
- * *
- * *
- * Notes : The term 'DMA' within this document, is in reference *
- * to Direct Memory Addressing, and NOT the usual term *
- * of Direct Memory Access. *
- * This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- * *
- * *
- * **** Change Log **** *
- * *
- * TLP (2x-May-2001) *
- * - Work began on this emulator *
- * TLP (12-Jul-2001) *
- * - First private release *
- * TLP (xx-Dec-2001) Ver 0.11 *
- * - Various undocumented fixes *
- * TLP (13-Jul-2002) Ver 0.12 *
- * - Corrected IRQ2 vector pointer *
- * - Fixed the signedness in many equation based instructions *
- * - Adjusted the level sensing for the Signal inputs *
- * - Added the ability to view the CPU in the debugger when it's halted *
- * TLP (16-Nov-2002) *
- * - First public release after nearly 1.5 years! *
- * - Adjusted more signedness instructions (ADDH, SUBC, SUBH, etc) *
- * TLP (21-Dec-2002) *
- * - Added memory banking for the CNFD, CNFP and CONF instructions *
- * - Corrected IRQ masking checks *
- * TLP (25-Dec-2002) Ver 1.10 *
- * - Added internal timer *
- * *
- \**************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS320x25 DSP Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * Written for the MAME project. *
+ * *
+ * *
+ * Three versions of the chip are available, and they are: *
+ * TMS320C25 Internal ROM one time programmed at TI *
+ * TMS320E25 Internal ROM programmable as a normal EPROM *
+ * TMS320P25 Internal ROM programmable once as a normal EPROM only *
+ * These devices can also be used as a MicroController with external ROM *
+ * *
+ * *
+ * Notes : The term 'DMA' within this document, is in reference *
+ * to Direct Memory Addressing, and NOT the usual term *
+ * of Direct Memory Access. *
+ * This is a word based microcontroller, with addressing *
+ * architecture based on the Harvard addressing scheme. *
+ * *
+ * *
+ * *
+ * **** Change Log **** *
+ * *
+ * TLP (2x-May-2001) *
+ * - Work began on this emulator *
+ * TLP (12-Jul-2001) *
+ * - First private release *
+ * TLP (xx-Dec-2001) Ver 0.11 *
+ * - Various undocumented fixes *
+ * TLP (13-Jul-2002) Ver 0.12 *
+ * - Corrected IRQ2 vector pointer *
+ * - Fixed the signedness in many equation based instructions *
+ * - Adjusted the level sensing for the Signal inputs *
+ * - Added the ability to view the CPU in the debugger when it's halted *
+ * TLP (16-Nov-2002) *
+ * - First public release after nearly 1.5 years! *
+ * - Adjusted more signedness instructions (ADDH, SUBC, SUBH, etc) *
+ * TLP (21-Dec-2002) *
+ * - Added memory banking for the CNFD, CNFP and CONF instructions *
+ * - Corrected IRQ masking checks *
+ * TLP (25-Dec-2002) Ver 1.10 *
+ * - Added internal timer *
+ * *
+ \**************************************************************************/
/*****************************************************************************
To fix, or currently lacking from this emulator are:
@@ -121,55 +121,55 @@ Table 3-2. TMS32025/26 Memory Blocks
#include "tms32025.h"
-#define CLK 4 /* 1 cycle equals 4 clock ticks */ /* PE/DI */
+#define CLK 4 /* 1 cycle equals 4 clock ticks */ /* PE/DI */
-#define SET_PC(x) do { cpustate->PC = (x); } while (0)
+#define SET_PC(x) do { cpustate->PC = (x); } while (0)
-#define P_IN(A) (cpustate->io->read_word((A)<<1))
-#define P_OUT(A,V) (cpustate->io->write_word(((A)<<1),(V)))
-#define S_IN(A) (cpustate->io->read_word((A)<<1))
-#define S_OUT(A,V) (cpustate->io->write_word(((A)<<1),(V)))
+#define P_IN(A) (cpustate->io->read_word((A)<<1))
+#define P_OUT(A,V) (cpustate->io->write_word(((A)<<1),(V)))
+#define S_IN(A) (cpustate->io->read_word((A)<<1))
+#define S_OUT(A,V) (cpustate->io->write_word(((A)<<1),(V)))
-#define M_RDOP(A) ((cpustate->pgmmap[(A) >> 7]) ? (cpustate->pgmmap[(A) >> 7][(A) & 0x7f]) : cpustate->direct->read_decrypted_word((A)<<1))
-#define M_RDOP_ARG(A) ((cpustate->pgmmap[(A) >> 7]) ? (cpustate->pgmmap[(A) >> 7][(A) & 0x7f]) : cpustate->direct->read_decrypted_word((A)<<1))
+#define M_RDOP(A) ((cpustate->pgmmap[(A) >> 7]) ? (cpustate->pgmmap[(A) >> 7][(A) & 0x7f]) : cpustate->direct->read_decrypted_word((A)<<1))
+#define M_RDOP_ARG(A) ((cpustate->pgmmap[(A) >> 7]) ? (cpustate->pgmmap[(A) >> 7][(A) & 0x7f]) : cpustate->direct->read_decrypted_word((A)<<1))
struct tms32025_state
{
/******************** CPU Internal Registers *******************/
- UINT16 PREVPC; /* previous program counter */
- UINT16 PC;
- UINT16 PFC;
- UINT16 STR0, STR1;
- UINT8 IFR;
- UINT8 RPTC;
- PAIR ACC;
- PAIR Preg;
- UINT16 Treg;
- UINT16 AR[8];
- UINT16 STACK[8];
- PAIR ALU;
- UINT16 *intRAM;
- UINT8 timerover;
+ UINT16 PREVPC; /* previous program counter */
+ UINT16 PC;
+ UINT16 PFC;
+ UINT16 STR0, STR1;
+ UINT8 IFR;
+ UINT8 RPTC;
+ PAIR ACC;
+ PAIR Preg;
+ UINT16 Treg;
+ UINT16 AR[8];
+ UINT16 STACK[8];
+ PAIR ALU;
+ UINT16 *intRAM;
+ UINT8 timerover;
/********************** Status data ****************************/
- PAIR opcode;
- int idle;
- int hold;
- int external_mem_access; /** required for hold mode. Implement it ! */
- int init_load_addr; /* 0=No, 1=Yes, 2=Once for repeat mode */
- int tms32025_irq_cycles;
- int tms32025_dec_cycles;
+ PAIR opcode;
+ int idle;
+ int hold;
+ int external_mem_access; /** required for hold mode. Implement it ! */
+ int init_load_addr; /* 0=No, 1=Yes, 2=Once for repeat mode */
+ int tms32025_irq_cycles;
+ int tms32025_dec_cycles;
device_irq_acknowledge_callback irq_callback;
- PAIR oldacc;
- UINT32 memaccess;
- int icount;
- int mHackIgnoreARP; /* special handling for lst, lst1 instructions */
- int waiting_for_serial_frame;
+ PAIR oldacc;
+ UINT32 memaccess;
+ int icount;
+ int mHackIgnoreARP; /* special handling for lst, lst1 instructions */
+ int waiting_for_serial_frame;
legacy_cpu_device *device;
address_space *program;
@@ -185,38 +185,38 @@ INLINE tms32025_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TMS32025 ||
- device->type() == TMS32026);
+ device->type() == TMS32026);
return (tms32025_state *)downcast<legacy_cpu_device *>(device)->token();
}
/* opcode table entry */
struct tms32025_opcode
{
- UINT8 cycles;
- void (*function)(tms32025_state *);
+ UINT8 cycles;
+ void (*function)(tms32025_state *);
};
/* opcode table entry (Opcode CE has sub-opcodes) */
struct tms32025_opcode_CE
{
- UINT8 cycles;
- void (*function)(tms32025_state *);
+ UINT8 cycles;
+ void (*function)(tms32025_state *);
};
/* opcode table entry (Opcode Dx has sub-opcodes) */
struct tms32025_opcode_Dx
{
- UINT8 cycles;
- void (*function)(tms32025_state *);
+ UINT8 cycles;
+ void (*function)(tms32025_state *);
};
/************************** Memory mapped registers ****************/
-#define DRR cpustate->intRAM[0]
-#define DXR cpustate->intRAM[1]
-#define TIM cpustate->intRAM[2]
-#define PRD cpustate->intRAM[3]
-#define IMR cpustate->intRAM[4]
-#define GREG cpustate->intRAM[5]
+#define DRR cpustate->intRAM[0]
+#define DXR cpustate->intRAM[1]
+#define TIM cpustate->intRAM[2]
+#define PRD cpustate->intRAM[3]
+#define IMR cpustate->intRAM[4]
+#define GREG cpustate->intRAM[5]
@@ -225,11 +225,11 @@ struct tms32025_opcode_Dx
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| <----ARP---> | OV | OVM | 1 | INTM | <--------------DP---------------> | */
-#define ARP_REG 0xe000 /* ARP (Auxiliary Register Pointer) */
-#define OV_FLAG 0x1000 /* OV (Overflow flag) 1 indicates an overflow */
-#define OVM_FLAG 0x0800 /* OVM (Overflow Mode bit) 1 forces ACC overflow to greatest positive or negative saturation value */
-#define INTM_FLAG 0x0200 /* INTM (Interrupt Mask flag) 0 enables maskable interrupts */
-#define DP_REG 0x01ff /* DP (Data bank memory Pointer) */
+#define ARP_REG 0xe000 /* ARP (Auxiliary Register Pointer) */
+#define OV_FLAG 0x1000 /* OV (Overflow flag) 1 indicates an overflow */
+#define OVM_FLAG 0x0800 /* OVM (Overflow Mode bit) 1 forces ACC overflow to greatest positive or negative saturation value */
+#define INTM_FLAG 0x0200 /* INTM (Interrupt Mask flag) 0 enables maskable interrupts */
+#define DP_REG 0x01ff /* DP (Data bank memory Pointer) */
/***********************************************************************************
@@ -241,40 +241,40 @@ struct tms32025_opcode_Dx
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| <----ARB---> | CNF0 | TC | SXM | C | 1 | CNF1 | HM | FSM | XF | FO | TXM | <-PM-> | */
-#define ARB_REG 0xe000 /* ARB (Auxiliary Register pointer Backup) */
-#define CNF0_REG 0x1000 /* CNF0 (Onchip RAM CoNFiguration) 0 means B0=data memory, 1means B0=program memory */
-#define CNF1_REG 0x0080 /* CNF1 (Onchip RAM CoNFiguration) 0 means B0=data memory, 1means B0=program memory */
-#define TC_FLAG 0x0800 /* TC (Test Control flag) */
-#define SXM_FLAG 0x0400 /* SXM (Sign eXtension Mode) */
-#define C_FLAG 0x0200 /* C (Carry flag) */
-#define HM_FLAG 0x0040 /* HM (Processor Hold Mode) */
-#define FSM_FLAG 0x0020 /* FSM (Frame Synchronization Mode - for serial port) */
-#define XF_FLAG 0x0010 /* XF (XF output pin status) */
-#define FO_FLAG 0x0008 /* FO (Serial port Format In/Out mode) */
-#define TXM_FLAG 0x0004 /* TXM (Transmit Mode - for serial port) */
-#define PM_REG 0x0003 /* PM (Product shift Mode) */
-
-
-#define OV ( cpustate->STR0 & OV_FLAG) /* OV (Overflow flag) */
-#define OVM ( cpustate->STR0 & OVM_FLAG) /* OVM (Overflow Mode bit) 1 indicates an overflow */
-#define INTM ( cpustate->STR0 & INTM_FLAG) /* INTM (Interrupt enable flag) 0 enables maskable interrupts */
-#define ARP ((cpustate->STR0 & ARP_REG) >> 13) /* ARP (Auxiliary Register Pointer) */
-#define DP ((cpustate->STR0 & DP_REG) << 7) /* DP (Data memory Pointer bit) */
-#define ARB ( cpustate->STR1 & ARB_REG) /* ARB (Backup Auxiliary Register pointer) */
-#define CNF0 ( cpustate->STR1 & CNF0_REG) /* CNF0 (Onchip Ram Config register) */
-#define TC ( cpustate->STR1 & TC_FLAG) /* TC (Test Control Flag) */
-#define SXM ( cpustate->STR1 & SXM_FLAG) /* SXM (Sign Extension Mode) */
-#define CARRY ( cpustate->STR1 & C_FLAG) /* C (Carry Flag for accumulator) */
-#define HM ( cpustate->STR1 & HM_FLAG) /* HM (Processor Hold Mode) */
-#define FSM ( cpustate->STR1 & FSM_FLAG) /* FSM (Frame Synchronization Mode - for serial port) */
-#define XF ( cpustate->STR1 & FSM_FLAG) /* XF (XF output pin status) */
-#define FO ( cpustate->STR1 & FO_FLAG) /* FO (Serial port Format In/Out mode) */
-#define TXM ( cpustate->STR1 & TXM_FLAG) /* TXM (Transmit Mode - for serial port) */
-#define PM ( cpustate->STR1 & PM_REG) /* PM (P register shift Mode. See SHIFT_Preg_TO_ALU below )*/
-
-#define DMA (DP | (cpustate->opcode.b.l & 0x7f)) /* address used in direct memory access operations */
-#define DMApg0 (cpustate->opcode.b.l & 0x7f) /* address used in direct memory access operations for sst instruction */
-#define IND cpustate->AR[ARP] /* address used in indirect memory access operations */
+#define ARB_REG 0xe000 /* ARB (Auxiliary Register pointer Backup) */
+#define CNF0_REG 0x1000 /* CNF0 (Onchip RAM CoNFiguration) 0 means B0=data memory, 1means B0=program memory */
+#define CNF1_REG 0x0080 /* CNF1 (Onchip RAM CoNFiguration) 0 means B0=data memory, 1means B0=program memory */
+#define TC_FLAG 0x0800 /* TC (Test Control flag) */
+#define SXM_FLAG 0x0400 /* SXM (Sign eXtension Mode) */
+#define C_FLAG 0x0200 /* C (Carry flag) */
+#define HM_FLAG 0x0040 /* HM (Processor Hold Mode) */
+#define FSM_FLAG 0x0020 /* FSM (Frame Synchronization Mode - for serial port) */
+#define XF_FLAG 0x0010 /* XF (XF output pin status) */
+#define FO_FLAG 0x0008 /* FO (Serial port Format In/Out mode) */
+#define TXM_FLAG 0x0004 /* TXM (Transmit Mode - for serial port) */
+#define PM_REG 0x0003 /* PM (Product shift Mode) */
+
+
+#define OV ( cpustate->STR0 & OV_FLAG) /* OV (Overflow flag) */
+#define OVM ( cpustate->STR0 & OVM_FLAG) /* OVM (Overflow Mode bit) 1 indicates an overflow */
+#define INTM ( cpustate->STR0 & INTM_FLAG) /* INTM (Interrupt enable flag) 0 enables maskable interrupts */
+#define ARP ((cpustate->STR0 & ARP_REG) >> 13) /* ARP (Auxiliary Register Pointer) */
+#define DP ((cpustate->STR0 & DP_REG) << 7) /* DP (Data memory Pointer bit) */
+#define ARB ( cpustate->STR1 & ARB_REG) /* ARB (Backup Auxiliary Register pointer) */
+#define CNF0 ( cpustate->STR1 & CNF0_REG) /* CNF0 (Onchip Ram Config register) */
+#define TC ( cpustate->STR1 & TC_FLAG) /* TC (Test Control Flag) */
+#define SXM ( cpustate->STR1 & SXM_FLAG) /* SXM (Sign Extension Mode) */
+#define CARRY ( cpustate->STR1 & C_FLAG) /* C (Carry Flag for accumulator) */
+#define HM ( cpustate->STR1 & HM_FLAG) /* HM (Processor Hold Mode) */
+#define FSM ( cpustate->STR1 & FSM_FLAG) /* FSM (Frame Synchronization Mode - for serial port) */
+#define XF ( cpustate->STR1 & FSM_FLAG) /* XF (XF output pin status) */
+#define FO ( cpustate->STR1 & FO_FLAG) /* FO (Serial port Format In/Out mode) */
+#define TXM ( cpustate->STR1 & TXM_FLAG) /* TXM (Transmit Mode - for serial port) */
+#define PM ( cpustate->STR1 & PM_REG) /* PM (P register shift Mode. See SHIFT_Preg_TO_ALU below )*/
+
+#define DMA (DP | (cpustate->opcode.b.l & 0x7f)) /* address used in direct memory access operations */
+#define DMApg0 (cpustate->opcode.b.l & 0x7f) /* address used in direct memory access operations for sst instruction */
+#define IND cpustate->AR[ARP] /* address used in indirect memory access operations */
INLINE void CLR0(tms32025_state *cpustate, UINT16 flag) { cpustate->STR0 &= ~flag; cpustate->STR0 |= 0x0400; }
INLINE void SET0(tms32025_state *cpustate, UINT16 flag) { cpustate->STR0 |= flag; cpustate->STR0 |= 0x0400; }
@@ -366,7 +366,7 @@ static UINT16 reverse_carry_add(UINT16 arg0, UINT16 arg1 )
INLINE void MODIFY_AR_ARP(tms32025_state *cpustate)
{ /* modify address register referenced by ARP */
- switch (cpustate->opcode.b.l & 0x70) /* Cases ordered by predicted useage */
+ switch (cpustate->opcode.b.l & 0x70) /* Cases ordered by predicted useage */
{
case 0x00: /* 000 nop */
break;
@@ -477,13 +477,13 @@ INLINE void PUSH_STACK(tms32025_state *cpustate, UINT16 data)
INLINE void SHIFT_Preg_TO_ALU(tms32025_state *cpustate)
{
- switch(PM) /* PM (in STR1) is the shift mode for Preg */
+ switch(PM) /* PM (in STR1) is the shift mode for Preg */
{
- case 0: cpustate->ALU.d = cpustate->Preg.d; break;
- case 1: cpustate->ALU.d = (cpustate->Preg.d << 1); break;
- case 2: cpustate->ALU.d = (cpustate->Preg.d << 4); break;
- case 3: cpustate->ALU.d = (cpustate->Preg.d >> 6); if (cpustate->Preg.d & 0x80000000) cpustate->ALU.d |= 0xfc000000; break;
- default: break;
+ case 0: cpustate->ALU.d = cpustate->Preg.d; break;
+ case 1: cpustate->ALU.d = (cpustate->Preg.d << 1); break;
+ case 2: cpustate->ALU.d = (cpustate->Preg.d << 4); break;
+ case 3: cpustate->ALU.d = (cpustate->Preg.d >> 6); if (cpustate->Preg.d & 0x80000000) cpustate->ALU.d |= 0xfc000000; break;
+ default: break;
}
}
@@ -500,7 +500,7 @@ INLINE void GETDATA(tms32025_state *cpustate, int shift,int signext)
if (cpustate->memaccess >= 0x800)
{
- cpustate->external_mem_access = 1; /* Pause if hold pin is active */
+ cpustate->external_mem_access = 1; /* Pause if hold pin is active */
}
else
{
@@ -518,14 +518,14 @@ INLINE void GETDATA(tms32025_state *cpustate, int shift,int signext)
INLINE void PUTDATA(tms32025_state *cpustate, UINT16 data)
{
if (cpustate->opcode.b.l & 0x80) {
- if (cpustate->memaccess >= 0x800) cpustate->external_mem_access = 1; /* Pause if hold pin is active */
+ if (cpustate->memaccess >= 0x800) cpustate->external_mem_access = 1; /* Pause if hold pin is active */
else cpustate->external_mem_access = 0;
M_WRTRAM(cpustate, IND, data);
MODIFY_AR_ARP(cpustate);
}
else {
- if (cpustate->memaccess >= 0x800) cpustate->external_mem_access = 1; /* Pause if hold pin is active */
+ if (cpustate->memaccess >= 0x800) cpustate->external_mem_access = 1; /* Pause if hold pin is active */
else cpustate->external_mem_access = 0;
M_WRTRAM(cpustate, DMA, data);
@@ -536,11 +536,11 @@ INLINE void PUTDATA_SST(tms32025_state *cpustate, UINT16 data)
if (cpustate->opcode.b.l & 0x80) cpustate->memaccess = IND;
else cpustate->memaccess = DMApg0;
- if (cpustate->memaccess >= 0x800) cpustate->external_mem_access = 1; /* Pause if hold pin is active */
+ if (cpustate->memaccess >= 0x800) cpustate->external_mem_access = 1; /* Pause if hold pin is active */
else cpustate->external_mem_access = 0;
if (cpustate->opcode.b.l & 0x80) {
- cpustate->opcode.b.l &= 0xf7; /* Stop ARP changes */
+ cpustate->opcode.b.l &= 0xf7; /* Stop ARP changes */
MODIFY_AR_ARP(cpustate);
}
M_WRTRAM(cpustate, cpustate->memaccess, data);
@@ -588,7 +588,7 @@ static void addc(tms32025_state *cpustate)
if (CARRY) cpustate->ACC.d++;
cpustate->ACC.d += cpustate->ALU.d;
CALCULATE_ADD_OVERFLOW(cpustate, cpustate->ALU.d);
- if (cpustate->ACC.d == cpustate->oldacc.d) {} /* edge case, carry remains same */
+ if (cpustate->ACC.d == cpustate->oldacc.d) {} /* edge case, carry remains same */
else CALCULATE_ADD_CARRY(cpustate);
}
static void addh(tms32025_state *cpustate)
@@ -597,7 +597,7 @@ static void addh(tms32025_state *cpustate)
GETDATA(cpustate, 0, 0);
cpustate->ACC.w.h += cpustate->ALU.w.l;
if ( (UINT16)(cpustate->oldacc.w.h) > (UINT16)(cpustate->ACC.w.h) ) {
- SET1(cpustate, C_FLAG); /* Carry flag is not cleared, if no carry occurred */
+ SET1(cpustate, C_FLAG); /* Carry flag is not cleared, if no carry occurred */
}
if ((INT16)((cpustate->ACC.w.h ^ cpustate->ALU.w.l) & (cpustate->oldacc.w.h ^ cpustate->ACC.w.h)) < 0) {
SET0(cpustate, OV_FLAG);
@@ -734,7 +734,7 @@ static void blez(tms32025_state *cpustate)
MODIFY_AR_ARP(cpustate);
}
static void blkd(tms32025_state *cpustate)
-{ /** Fix cycle timing **/
+{ /** Fix cycle timing **/
if (cpustate->init_load_addr) {
cpustate->PFC = M_RDOP_ARG(cpustate->PC);
cpustate->PC++;
@@ -745,7 +745,7 @@ static void blkd(tms32025_state *cpustate)
cpustate->tms32025_dec_cycles += (1*CLK);
}
static void blkp(tms32025_state *cpustate)
-{ /** Fix cycle timing **/
+{ /** Fix cycle timing **/
if (cpustate->init_load_addr) {
cpustate->PFC = M_RDOP_ARG(cpustate->PC);
cpustate->PC++;
@@ -817,53 +817,53 @@ static void cmpr(tms32025_state *cpustate)
{
switch (cpustate->opcode.b.l & 3)
{
- case 00: if ( (UINT16)(cpustate->AR[ARP]) == (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
+ case 00: if ( (UINT16)(cpustate->AR[ARP]) == (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
else CLR1(cpustate, TC_FLAG);
break;
- case 01: if ( (UINT16)(cpustate->AR[ARP]) < (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
+ case 01: if ( (UINT16)(cpustate->AR[ARP]) < (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
else CLR1(cpustate, TC_FLAG);
break;
- case 02: if ( (UINT16)(cpustate->AR[ARP]) > (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
+ case 02: if ( (UINT16)(cpustate->AR[ARP]) > (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
else CLR1(cpustate, TC_FLAG);
break;
- case 03: if ( (UINT16)(cpustate->AR[ARP]) != (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
+ case 03: if ( (UINT16)(cpustate->AR[ARP]) != (UINT16)(cpustate->AR[0]) ) SET1(cpustate, TC_FLAG);
else CLR1(cpustate, TC_FLAG);
break;
}
}
-static void cnfd(tms32025_state *cpustate) /** next two fetches need to use previous CNF value ! **/
+static void cnfd(tms32025_state *cpustate) /** next two fetches need to use previous CNF value ! **/
{
CLR1(cpustate, CNF0_REG);
- cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
- cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
+ cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
+ cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
cpustate->pgmmap[510] = NULL;
cpustate->pgmmap[511] = NULL;
}
-static void cnfp(tms32025_state *cpustate) /** next two fetches need to use previous CNF value ! **/
+static void cnfp(tms32025_state *cpustate) /** next two fetches need to use previous CNF value ! **/
{
SET1(cpustate, CNF0_REG);
- cpustate->datamap[4] = NULL; /* B0 */
- cpustate->datamap[5] = NULL; /* B0 */
+ cpustate->datamap[4] = NULL; /* B0 */
+ cpustate->datamap[5] = NULL; /* B0 */
cpustate->pgmmap[510] = &cpustate->intRAM[0x200];
cpustate->pgmmap[511] = &cpustate->intRAM[0x280];
}
-static void conf(tms32025_state *cpustate) /** Need to reconfigure the memory blocks */
+static void conf(tms32025_state *cpustate) /** Need to reconfigure the memory blocks */
{
switch (cpustate->opcode.b.l & 3)
{
- case 00: CLR1(cpustate, CNF1_REG); CLR1(cpustate, CNF0_REG);
- cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
- cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
- cpustate->datamap[6] = &cpustate->intRAM[0x300]; /* B0 */
- cpustate->datamap[7] = &cpustate->intRAM[0x380]; /* B0 */
- cpustate->datamap[8] = &cpustate->intRAM[0x400]; /* B1 */
- cpustate->datamap[9] = &cpustate->intRAM[0x480]; /* B1 */
- cpustate->datamap[10] = &cpustate->intRAM[0x500]; /* B1 */
- cpustate->datamap[11] = &cpustate->intRAM[0x580]; /* B1 */
- cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
- cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
- cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
- cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
+ case 00: CLR1(cpustate, CNF1_REG); CLR1(cpustate, CNF0_REG);
+ cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
+ cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
+ cpustate->datamap[6] = &cpustate->intRAM[0x300]; /* B0 */
+ cpustate->datamap[7] = &cpustate->intRAM[0x380]; /* B0 */
+ cpustate->datamap[8] = &cpustate->intRAM[0x400]; /* B1 */
+ cpustate->datamap[9] = &cpustate->intRAM[0x480]; /* B1 */
+ cpustate->datamap[10] = &cpustate->intRAM[0x500]; /* B1 */
+ cpustate->datamap[11] = &cpustate->intRAM[0x580]; /* B1 */
+ cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
+ cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
+ cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
+ cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
cpustate->pgmmap[500] = NULL;
cpustate->pgmmap[501] = NULL;
cpustate->pgmmap[502] = NULL;
@@ -878,23 +878,23 @@ static void conf(tms32025_state *cpustate) /** Need to reconfigure the memory bl
cpustate->pgmmap[511] = NULL;
break;
- case 01: CLR1(cpustate, CNF1_REG); SET1(cpustate, CNF0_REG);
+ case 01: CLR1(cpustate, CNF1_REG); SET1(cpustate, CNF0_REG);
cpustate->datamap[4] = NULL;
cpustate->datamap[5] = NULL;
cpustate->datamap[6] = NULL;
cpustate->datamap[7] = NULL;
- cpustate->datamap[8] = &cpustate->intRAM[0x400]; /* B1 */
- cpustate->datamap[9] = &cpustate->intRAM[0x480]; /* B1 */
- cpustate->datamap[10] = &cpustate->intRAM[0x500]; /* B1 */
- cpustate->datamap[11] = &cpustate->intRAM[0x580]; /* B1 */
- cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
- cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
- cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
- cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
- cpustate->pgmmap[500] = &cpustate->intRAM[0x200]; /* B0 */
- cpustate->pgmmap[501] = &cpustate->intRAM[0x280]; /* B0 */
- cpustate->pgmmap[502] = &cpustate->intRAM[0x300]; /* B0 */
- cpustate->pgmmap[503] = &cpustate->intRAM[0x380]; /* B0 */
+ cpustate->datamap[8] = &cpustate->intRAM[0x400]; /* B1 */
+ cpustate->datamap[9] = &cpustate->intRAM[0x480]; /* B1 */
+ cpustate->datamap[10] = &cpustate->intRAM[0x500]; /* B1 */
+ cpustate->datamap[11] = &cpustate->intRAM[0x580]; /* B1 */
+ cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
+ cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
+ cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
+ cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
+ cpustate->pgmmap[500] = &cpustate->intRAM[0x200]; /* B0 */
+ cpustate->pgmmap[501] = &cpustate->intRAM[0x280]; /* B0 */
+ cpustate->pgmmap[502] = &cpustate->intRAM[0x300]; /* B0 */
+ cpustate->pgmmap[503] = &cpustate->intRAM[0x380]; /* B0 */
cpustate->pgmmap[504] = NULL;
cpustate->pgmmap[505] = NULL;
cpustate->pgmmap[506] = NULL;
@@ -905,7 +905,7 @@ static void conf(tms32025_state *cpustate) /** Need to reconfigure the memory bl
cpustate->pgmmap[511] = NULL;
break;
- case 02: SET1(cpustate, CNF1_REG); CLR1(cpustate, CNF0_REG);
+ case 02: SET1(cpustate, CNF1_REG); CLR1(cpustate, CNF0_REG);
cpustate->datamap[4] = NULL;
cpustate->datamap[5] = NULL;
cpustate->datamap[6] = NULL;
@@ -914,25 +914,25 @@ static void conf(tms32025_state *cpustate) /** Need to reconfigure the memory bl
cpustate->datamap[9] = NULL;
cpustate->datamap[10] = NULL;
cpustate->datamap[11] = NULL;
- cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
- cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
- cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
- cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
- cpustate->pgmmap[500] = &cpustate->intRAM[0x200]; /* B0 */
- cpustate->pgmmap[501] = &cpustate->intRAM[0x280]; /* B0 */
- cpustate->pgmmap[502] = &cpustate->intRAM[0x300]; /* B0 */
- cpustate->pgmmap[503] = &cpustate->intRAM[0x380]; /* B0 */
- cpustate->pgmmap[504] = &cpustate->intRAM[0x400]; /* B1 */
- cpustate->pgmmap[505] = &cpustate->intRAM[0x480]; /* B1 */
- cpustate->pgmmap[506] = &cpustate->intRAM[0x500]; /* B1 */
- cpustate->pgmmap[507] = &cpustate->intRAM[0x580]; /* B1 */
+ cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
+ cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
+ cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
+ cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
+ cpustate->pgmmap[500] = &cpustate->intRAM[0x200]; /* B0 */
+ cpustate->pgmmap[501] = &cpustate->intRAM[0x280]; /* B0 */
+ cpustate->pgmmap[502] = &cpustate->intRAM[0x300]; /* B0 */
+ cpustate->pgmmap[503] = &cpustate->intRAM[0x380]; /* B0 */
+ cpustate->pgmmap[504] = &cpustate->intRAM[0x400]; /* B1 */
+ cpustate->pgmmap[505] = &cpustate->intRAM[0x480]; /* B1 */
+ cpustate->pgmmap[506] = &cpustate->intRAM[0x500]; /* B1 */
+ cpustate->pgmmap[507] = &cpustate->intRAM[0x580]; /* B1 */
cpustate->pgmmap[508] = NULL;
cpustate->pgmmap[509] = NULL;
cpustate->pgmmap[510] = NULL;
cpustate->pgmmap[511] = NULL;
break;
- case 03: SET1(cpustate, CNF1_REG); SET1(cpustate, CNF0_REG);
+ case 03: SET1(cpustate, CNF1_REG); SET1(cpustate, CNF0_REG);
cpustate->datamap[4] = NULL;
cpustate->datamap[5] = NULL;
cpustate->datamap[6] = NULL;
@@ -945,18 +945,18 @@ static void conf(tms32025_state *cpustate) /** Need to reconfigure the memory bl
cpustate->datamap[13] = NULL;
cpustate->datamap[14] = NULL;
cpustate->datamap[15] = NULL;
- cpustate->pgmmap[500] = &cpustate->intRAM[0x200]; /* B0 */
- cpustate->pgmmap[501] = &cpustate->intRAM[0x280]; /* B0 */
- cpustate->pgmmap[502] = &cpustate->intRAM[0x300]; /* B0 */
- cpustate->pgmmap[503] = &cpustate->intRAM[0x380]; /* B0 */
- cpustate->pgmmap[504] = &cpustate->intRAM[0x400]; /* B1 */
- cpustate->pgmmap[505] = &cpustate->intRAM[0x480]; /* B1 */
- cpustate->pgmmap[506] = &cpustate->intRAM[0x500]; /* B1 */
- cpustate->pgmmap[507] = &cpustate->intRAM[0x580]; /* B1 */
- cpustate->pgmmap[508] = &cpustate->intRAM[0x600]; /* B3 */
- cpustate->pgmmap[509] = &cpustate->intRAM[0x680]; /* B3 */
- cpustate->pgmmap[510] = &cpustate->intRAM[0x700]; /* B3 */
- cpustate->pgmmap[511] = &cpustate->intRAM[0x780]; /* B3 */
+ cpustate->pgmmap[500] = &cpustate->intRAM[0x200]; /* B0 */
+ cpustate->pgmmap[501] = &cpustate->intRAM[0x280]; /* B0 */
+ cpustate->pgmmap[502] = &cpustate->intRAM[0x300]; /* B0 */
+ cpustate->pgmmap[503] = &cpustate->intRAM[0x380]; /* B0 */
+ cpustate->pgmmap[504] = &cpustate->intRAM[0x400]; /* B1 */
+ cpustate->pgmmap[505] = &cpustate->intRAM[0x480]; /* B1 */
+ cpustate->pgmmap[506] = &cpustate->intRAM[0x500]; /* B1 */
+ cpustate->pgmmap[507] = &cpustate->intRAM[0x580]; /* B1 */
+ cpustate->pgmmap[508] = &cpustate->intRAM[0x600]; /* B3 */
+ cpustate->pgmmap[509] = &cpustate->intRAM[0x680]; /* B3 */
+ cpustate->pgmmap[510] = &cpustate->intRAM[0x700]; /* B3 */
+ cpustate->pgmmap[511] = &cpustate->intRAM[0x780]; /* B3 */
break;
}
}
@@ -964,7 +964,7 @@ static void dint(tms32025_state *cpustate)
{
SET0(cpustate, INTM_FLAG);
}
-static void dmov(tms32025_state *cpustate) /** Careful with how memory is configured !! */
+static void dmov(tms32025_state *cpustate) /** Careful with how memory is configured !! */
{
GETDATA(cpustate, 0, 0);
M_WRTRAM(cpustate, (cpustate->memaccess + 1), cpustate->ALU.w.l);
@@ -993,7 +993,7 @@ static void lac(tms32025_state *cpustate)
GETDATA(cpustate, (cpustate->opcode.b.h & 0xf), SXM);
cpustate->ACC.d = cpustate->ALU.d;
}
-static void lack(tms32025_state *cpustate) /* ZAC is a subset of this instruction */
+static void lack(tms32025_state *cpustate) /* ZAC is a subset of this instruction */
{
cpustate->ACC.d = (UINT8)cpustate->opcode.b.l;
}
@@ -1010,22 +1010,22 @@ static void lalk(tms32025_state *cpustate)
cpustate->ALU.d <<= (cpustate->opcode.b.h & 0xf);
cpustate->ACC.d = cpustate->ALU.d;
}
-static void lar_ar0(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[0] = cpustate->ALU.w.l; }
-static void lar_ar1(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[1] = cpustate->ALU.w.l; }
-static void lar_ar2(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[2] = cpustate->ALU.w.l; }
-static void lar_ar3(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[3] = cpustate->ALU.w.l; }
-static void lar_ar4(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[4] = cpustate->ALU.w.l; }
-static void lar_ar5(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[5] = cpustate->ALU.w.l; }
-static void lar_ar6(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[6] = cpustate->ALU.w.l; }
-static void lar_ar7(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[7] = cpustate->ALU.w.l; }
-static void lark_ar0(tms32025_state *cpustate) { cpustate->AR[0] = cpustate->opcode.b.l; }
-static void lark_ar1(tms32025_state *cpustate) { cpustate->AR[1] = cpustate->opcode.b.l; }
-static void lark_ar2(tms32025_state *cpustate) { cpustate->AR[2] = cpustate->opcode.b.l; }
-static void lark_ar3(tms32025_state *cpustate) { cpustate->AR[3] = cpustate->opcode.b.l; }
-static void lark_ar4(tms32025_state *cpustate) { cpustate->AR[4] = cpustate->opcode.b.l; }
-static void lark_ar5(tms32025_state *cpustate) { cpustate->AR[5] = cpustate->opcode.b.l; }
-static void lark_ar6(tms32025_state *cpustate) { cpustate->AR[6] = cpustate->opcode.b.l; }
-static void lark_ar7(tms32025_state *cpustate) { cpustate->AR[7] = cpustate->opcode.b.l; }
+static void lar_ar0(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[0] = cpustate->ALU.w.l; }
+static void lar_ar1(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[1] = cpustate->ALU.w.l; }
+static void lar_ar2(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[2] = cpustate->ALU.w.l; }
+static void lar_ar3(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[3] = cpustate->ALU.w.l; }
+static void lar_ar4(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[4] = cpustate->ALU.w.l; }
+static void lar_ar5(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[5] = cpustate->ALU.w.l; }
+static void lar_ar6(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[6] = cpustate->ALU.w.l; }
+static void lar_ar7(tms32025_state *cpustate) { GETDATA(cpustate, 0, 0); cpustate->AR[7] = cpustate->ALU.w.l; }
+static void lark_ar0(tms32025_state *cpustate) { cpustate->AR[0] = cpustate->opcode.b.l; }
+static void lark_ar1(tms32025_state *cpustate) { cpustate->AR[1] = cpustate->opcode.b.l; }
+static void lark_ar2(tms32025_state *cpustate) { cpustate->AR[2] = cpustate->opcode.b.l; }
+static void lark_ar3(tms32025_state *cpustate) { cpustate->AR[3] = cpustate->opcode.b.l; }
+static void lark_ar4(tms32025_state *cpustate) { cpustate->AR[4] = cpustate->opcode.b.l; }
+static void lark_ar5(tms32025_state *cpustate) { cpustate->AR[5] = cpustate->opcode.b.l; }
+static void lark_ar6(tms32025_state *cpustate) { cpustate->AR[6] = cpustate->opcode.b.l; }
+static void lark_ar7(tms32025_state *cpustate) { cpustate->AR[7] = cpustate->opcode.b.l; }
static void ldp(tms32025_state *cpustate)
{
GETDATA(cpustate, 0, 0);
@@ -1054,7 +1054,7 @@ static void lst(tms32025_state *cpustate)
cpustate->ALU.w.l &= (~INTM_FLAG);
cpustate->STR0 &= INTM_FLAG;
- cpustate->STR0 |= cpustate->ALU.w.l; /* Must not affect INTM */
+ cpustate->STR0 |= cpustate->ALU.w.l; /* Must not affect INTM */
cpustate->STR0 |= 0x0400;
}
static void lst1(tms32025_state *cpustate)
@@ -1065,7 +1065,7 @@ static void lst1(tms32025_state *cpustate)
cpustate->STR1 = cpustate->ALU.w.l;
cpustate->STR1 |= 0x0180;
- cpustate->STR0 &= (~ARP_REG); /* ARB also gets copied to ARP */
+ cpustate->STR0 &= (~ARP_REG); /* ARB also gets copied to ARP */
cpustate->STR0 |= (cpustate->STR1 & ARB_REG);
}
static void lt(tms32025_state *cpustate)
@@ -1083,7 +1083,7 @@ static void lta(tms32025_state *cpustate)
CALCULATE_ADD_OVERFLOW(cpustate, cpustate->ALU.d);
CALCULATE_ADD_CARRY(cpustate);
}
-static void ltd(tms32025_state *cpustate) /** Careful with how memory is configured !! */
+static void ltd(tms32025_state *cpustate) /** Careful with how memory is configured !! */
{
cpustate->oldacc.d = cpustate->ACC.d;
GETDATA(cpustate, 0, 0);
@@ -1112,8 +1112,8 @@ static void lts(tms32025_state *cpustate)
CALCULATE_SUB_OVERFLOW(cpustate, cpustate->ALU.d);
CALCULATE_SUB_CARRY(cpustate);
}
-static void mac(tms32025_state *cpustate) /** RAM blocks B0,B1,B2 may be important ! */
-{ /** Fix cycle timing **/
+static void mac(tms32025_state *cpustate) /** RAM blocks B0,B1,B2 may be important ! */
+{ /** Fix cycle timing **/
cpustate->oldacc.d = cpustate->ACC.d;
if (cpustate->init_load_addr) {
cpustate->PFC = M_RDOP_ARG(cpustate->PC);
@@ -1129,8 +1129,8 @@ static void mac(tms32025_state *cpustate) /** RAM blocks B0,B1,B2 may be impor
cpustate->PFC++;
cpustate->tms32025_dec_cycles += (2*CLK);
}
-static void macd(tms32025_state *cpustate) /** RAM blocks B0,B1,B2 may be important ! */
-{ /** Fix cycle timing **/
+static void macd(tms32025_state *cpustate) /** RAM blocks B0,B1,B2 may be important ! */
+{ /** Fix cycle timing **/
cpustate->oldacc.d = cpustate->ACC.d;
if (cpustate->init_load_addr) {
cpustate->PFC = M_RDOP_ARG(cpustate->PC);
@@ -1141,7 +1141,7 @@ static void macd(tms32025_state *cpustate) /** RAM blocks B0,B1,B2 may be impo
CALCULATE_ADD_OVERFLOW(cpustate, cpustate->ALU.d);
CALCULATE_ADD_CARRY(cpustate);
GETDATA(cpustate, 0, 0);
- if ( (cpustate->opcode.b.l & 0x80) || cpustate->init_load_addr ) { /* No writing during repitition, or DMA mode */
+ if ( (cpustate->opcode.b.l & 0x80) || cpustate->init_load_addr ) { /* No writing during repitition, or DMA mode */
M_WRTRAM(cpustate, (cpustate->memaccess+1), cpustate->ALU.w.l);
}
cpustate->Treg = cpustate->ALU.w.l;
@@ -1149,7 +1149,7 @@ static void macd(tms32025_state *cpustate) /** RAM blocks B0,B1,B2 may be impo
cpustate->PFC++;
cpustate->tms32025_dec_cycles += (2*CLK);
}
-static void mar(tms32025_state *cpustate) /* LARP and NOP are a subset of this instruction */
+static void mar(tms32025_state *cpustate) /* LARP and NOP are a subset of this instruction */
{
if (cpustate->opcode.b.l & 0x80) MODIFY_AR_ARP(cpustate);
}
@@ -1259,7 +1259,7 @@ static void ret(tms32025_state *cpustate)
{
SET_PC(POP_STACK(cpustate));
}
-static void rfsm(tms32025_state *cpustate) /** serial port mode */
+static void rfsm(tms32025_state *cpustate) /** serial port mode */
{
CLR1(cpustate, FSM_FLAG);
}
@@ -1291,12 +1291,12 @@ static void rpt(tms32025_state *cpustate)
{
GETDATA(cpustate, 0, 0);
cpustate->RPTC = cpustate->ALU.b.l;
- cpustate->init_load_addr = 2; /* Initiate repeat mode */
+ cpustate->init_load_addr = 2; /* Initiate repeat mode */
}
static void rptk(tms32025_state *cpustate)
{
cpustate->RPTC = cpustate->opcode.b.l;
- cpustate->init_load_addr = 2; /* Initiate repeat mode */
+ cpustate->init_load_addr = 2; /* Initiate repeat mode */
}
static void rsxm(tms32025_state *cpustate)
{
@@ -1306,7 +1306,7 @@ static void rtc(tms32025_state *cpustate)
{
CLR1(cpustate, TC_FLAG);
}
-static void rtxm(tms32025_state *cpustate) /** Serial port stuff */
+static void rtxm(tms32025_state *cpustate) /** Serial port stuff */
{
CLR1(cpustate, TXM_FLAG);
}
@@ -1325,14 +1325,14 @@ static void sacl(tms32025_state *cpustate)
cpustate->ALU.d = (cpustate->ACC.d << (cpustate->opcode.b.h & 7));
PUTDATA(cpustate, cpustate->ALU.w.l);
}
-static void sar_ar0(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[0]); }
-static void sar_ar1(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[1]); }
-static void sar_ar2(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[2]); }
-static void sar_ar3(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[3]); }
-static void sar_ar4(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[4]); }
-static void sar_ar5(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[5]); }
-static void sar_ar6(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[6]); }
-static void sar_ar7(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[7]); }
+static void sar_ar0(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[0]); }
+static void sar_ar1(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[1]); }
+static void sar_ar2(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[2]); }
+static void sar_ar3(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[3]); }
+static void sar_ar4(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[4]); }
+static void sar_ar5(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[5]); }
+static void sar_ar6(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[6]); }
+static void sar_ar7(tms32025_state *cpustate) { PUTDATA(cpustate, cpustate->AR[7]); }
static void sblk(tms32025_state *cpustate)
{
@@ -1370,7 +1370,7 @@ static void sfr(tms32025_state *cpustate)
if (cpustate->ALU.d & 1) SET1(cpustate, C_FLAG);
else CLR1(cpustate, C_FLAG);
}
-static void sfsm(tms32025_state *cpustate) /** Serial port mode */
+static void sfsm(tms32025_state *cpustate) /** Serial port mode */
{
SET1(cpustate, FSM_FLAG);
}
@@ -1442,7 +1442,7 @@ static void stc(tms32025_state *cpustate)
{
SET1(cpustate, TC_FLAG);
}
-static void stxm(tms32025_state *cpustate) /** Serial port stuff */
+static void stxm(tms32025_state *cpustate) /** Serial port stuff */
{
SET1(cpustate, TXM_FLAG);
}
@@ -1461,16 +1461,16 @@ static void subb(tms32025_state *cpustate)
if (CARRY == 0) cpustate->ACC.d--;
cpustate->ACC.d -= cpustate->ALU.d;
CALCULATE_SUB_OVERFLOW(cpustate, cpustate->ALU.d);
- if (cpustate->ACC.d == cpustate->oldacc.d) {} /* edge case, carry remains same */
+ if (cpustate->ACC.d == cpustate->oldacc.d) {} /* edge case, carry remains same */
else CALCULATE_SUB_CARRY(cpustate);
}
static void subc(tms32025_state *cpustate)
{
cpustate->oldacc.d = cpustate->ACC.d;
GETDATA(cpustate, 15, SXM);
- cpustate->ACC.d -= cpustate->ALU.d; /* Temporary switch to ACC. Actual calculation is done as (ACC)-[mem] -> ALU, will be preserved later on. */
+ cpustate->ACC.d -= cpustate->ALU.d; /* Temporary switch to ACC. Actual calculation is done as (ACC)-[mem] -> ALU, will be preserved later on. */
if ((INT32)((cpustate->oldacc.d ^ cpustate->ALU.d) & (cpustate->oldacc.d ^ cpustate->ACC.d)) < 0) {
- SET0(cpustate, OV_FLAG); /* Not affected by OVM */
+ SET0(cpustate, OV_FLAG); /* Not affected by OVM */
}
CALCULATE_SUB_CARRY(cpustate);
if( cpustate->oldacc.d >= cpustate->ALU.d ) {
@@ -1488,7 +1488,7 @@ static void subh(tms32025_state *cpustate)
GETDATA(cpustate, 0, 0);
cpustate->ACC.w.h -= cpustate->ALU.w.l;
if ( (UINT16)(cpustate->oldacc.w.h) < (UINT16)(cpustate->ACC.w.h) ) {
- CLR1(cpustate, C_FLAG); /* Carry flag is not affected, if no borrow occurred */
+ CLR1(cpustate, C_FLAG); /* Carry flag is not affected, if no borrow occurred */
}
if ((INT16)((cpustate->oldacc.w.h ^ cpustate->ALU.w.l) & (cpustate->oldacc.w.h ^ cpustate->ACC.w.h)) < 0) {
SET0(cpustate, OV_FLAG);
@@ -1530,7 +1530,7 @@ static void tblr(tms32025_state *cpustate)
cpustate->PFC = cpustate->ACC.w.l;
}
cpustate->ALU.w.l = M_RDROM(cpustate, cpustate->PFC);
- if ( (CNF0) && ( (UINT16)(cpustate->PFC) >= 0xff00 ) ) {} /** TMS32025 only */
+ if ( (CNF0) && ( (UINT16)(cpustate->PFC) >= 0xff00 ) ) {} /** TMS32025 only */
else cpustate->tms32025_dec_cycles += (1*CLK);
PUTDATA(cpustate, cpustate->ALU.w.l);
cpustate->PFC++;
@@ -1549,7 +1549,7 @@ static void tblw(tms32025_state *cpustate)
static void trap(tms32025_state *cpustate)
{
PUSH_STACK(cpustate, cpustate->PC);
- SET_PC(0x001E); /* Trap vector */
+ SET_PC(0x001E); /* Trap vector */
}
static void xor_(tms32025_state *cpustate)
{
@@ -1589,79 +1589,79 @@ static void zals(tms32025_state *cpustate)
static const tms32025_opcode opcode_main[256]=
{
-/*00*/ {1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },
-/*08*/ {1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },
-/*10*/ {1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },
-/*18*/ {1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },
-/*20*/ {1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },
-/*28*/ {1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },
-/*30*/ {1*CLK, lar_ar0 },{1*CLK, lar_ar1 },{1*CLK, lar_ar2 },{1*CLK, lar_ar3 },{1*CLK, lar_ar4 },{1*CLK, lar_ar5 },{1*CLK, lar_ar6 },{1*CLK, lar_ar7 },
-/*38*/ {1*CLK, mpy },{1*CLK, sqra },{1*CLK, mpya },{1*CLK, mpys },{1*CLK, lt },{1*CLK, lta },{1*CLK, ltp },{1*CLK, ltd },
-/*40*/ {1*CLK, zalh },{1*CLK, zals },{1*CLK, lact },{1*CLK, addc },{1*CLK, subh },{1*CLK, subs },{1*CLK, subt },{1*CLK, subc },
-/*48*/ {1*CLK, addh },{1*CLK, adds },{1*CLK, addt },{1*CLK, rpt },{1*CLK, xor_ },{1*CLK, or_ },{1*CLK, and_ },{1*CLK, subb },
-/*50*/ {1*CLK, lst },{1*CLK, lst1 },{1*CLK, ldp },{1*CLK, lph },{1*CLK, pshd },{1*CLK, mar },{1*CLK, dmov },{1*CLK, bitt },
-/*58*/ {3*CLK, tblr },{2*CLK, tblw },{1*CLK, sqrs },{1*CLK, lts },{2*CLK, macd },{2*CLK, mac },{2*CLK, bc },{2*CLK, bnc },
-/*60*/ {1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },
-/*68*/ {1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },
-/*70*/ {1*CLK, sar_ar0 },{1*CLK, sar_ar1 },{1*CLK, sar_ar2 },{1*CLK, sar_ar3 },{1*CLK, sar_ar4 },{1*CLK, sar_ar5 },{1*CLK, sar_ar6 },{1*CLK, sar_ar7 },
-/*78*/ {1*CLK, sst },{1*CLK, sst1 },{1*CLK, popd },{1*CLK, zalr },{1*CLK, spl },{1*CLK, sph },{1*CLK, adrk },{1*CLK, sbrk_ar },
-/*80*/ {2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },
-/*88*/ {2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },
-/*90*/ {1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },
-/*98*/ {1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },
-/*A0*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
-/*A8*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
-/*B0*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
-/*B8*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
-/*C0*/ {1*CLK, lark_ar0 },{1*CLK, lark_ar1 },{1*CLK, lark_ar2 },{1*CLK, lark_ar3 },{1*CLK, lark_ar4 },{1*CLK, lark_ar5 },{1*CLK, lark_ar6 },{1*CLK, lark_ar7 },
-/*C8*/ {1*CLK, ldpk },{1*CLK, ldpk },{1*CLK, lack },{1*CLK, rptk },{1*CLK, addk },{1*CLK, subk },{1*CLK, opcodes_CE},{1*CLK, mpyu },
+/*00*/ {1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },
+/*08*/ {1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },{1*CLK, add },
+/*10*/ {1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },
+/*18*/ {1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },{1*CLK, sub },
+/*20*/ {1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },
+/*28*/ {1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },{1*CLK, lac },
+/*30*/ {1*CLK, lar_ar0 },{1*CLK, lar_ar1 },{1*CLK, lar_ar2 },{1*CLK, lar_ar3 },{1*CLK, lar_ar4 },{1*CLK, lar_ar5 },{1*CLK, lar_ar6 },{1*CLK, lar_ar7 },
+/*38*/ {1*CLK, mpy },{1*CLK, sqra },{1*CLK, mpya },{1*CLK, mpys },{1*CLK, lt },{1*CLK, lta },{1*CLK, ltp },{1*CLK, ltd },
+/*40*/ {1*CLK, zalh },{1*CLK, zals },{1*CLK, lact },{1*CLK, addc },{1*CLK, subh },{1*CLK, subs },{1*CLK, subt },{1*CLK, subc },
+/*48*/ {1*CLK, addh },{1*CLK, adds },{1*CLK, addt },{1*CLK, rpt },{1*CLK, xor_ },{1*CLK, or_ },{1*CLK, and_ },{1*CLK, subb },
+/*50*/ {1*CLK, lst },{1*CLK, lst1 },{1*CLK, ldp },{1*CLK, lph },{1*CLK, pshd },{1*CLK, mar },{1*CLK, dmov },{1*CLK, bitt },
+/*58*/ {3*CLK, tblr },{2*CLK, tblw },{1*CLK, sqrs },{1*CLK, lts },{2*CLK, macd },{2*CLK, mac },{2*CLK, bc },{2*CLK, bnc },
+/*60*/ {1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },{1*CLK, sacl },
+/*68*/ {1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },{1*CLK, sach },
+/*70*/ {1*CLK, sar_ar0 },{1*CLK, sar_ar1 },{1*CLK, sar_ar2 },{1*CLK, sar_ar3 },{1*CLK, sar_ar4 },{1*CLK, sar_ar5 },{1*CLK, sar_ar6 },{1*CLK, sar_ar7 },
+/*78*/ {1*CLK, sst },{1*CLK, sst1 },{1*CLK, popd },{1*CLK, zalr },{1*CLK, spl },{1*CLK, sph },{1*CLK, adrk },{1*CLK, sbrk_ar },
+/*80*/ {2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },
+/*88*/ {2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },{2*CLK, in },
+/*90*/ {1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },
+/*98*/ {1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },{1*CLK, bit },
+/*A0*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
+/*A8*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
+/*B0*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
+/*B8*/ {1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },{1*CLK, mpyk },
+/*C0*/ {1*CLK, lark_ar0 },{1*CLK, lark_ar1 },{1*CLK, lark_ar2 },{1*CLK, lark_ar3 },{1*CLK, lark_ar4 },{1*CLK, lark_ar5 },{1*CLK, lark_ar6 },{1*CLK, lark_ar7 },
+/*C8*/ {1*CLK, ldpk },{1*CLK, ldpk },{1*CLK, lack },{1*CLK, rptk },{1*CLK, addk },{1*CLK, subk },{1*CLK, opcodes_CE},{1*CLK, mpyu },
/*D0*/ {1*CLK,opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{0*CLK, opcodes_Dx},
/*D8*/ {1*CLK,opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},{1*CLK, opcodes_Dx},
-/*E0*/ {2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },
-/*E8*/ {2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },
-/*F0*/ {2*CLK, bv },{2*CLK, bgz },{2*CLK, blez },{2*CLK, blz },{2*CLK, bgez },{2*CLK, bnz },{2*CLK, bz },{2*CLK, bnv },
-/*F8*/ {2*CLK, bbz },{2*CLK, bbnz },{2*CLK, bioz },{2*CLK, banz },{2*CLK, blkp },{2*CLK, blkd },{2*CLK, call },{2*CLK, br }
+/*E0*/ {2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },
+/*E8*/ {2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },{2*CLK, out },
+/*F0*/ {2*CLK, bv },{2*CLK, bgz },{2*CLK, blez },{2*CLK, blz },{2*CLK, bgez },{2*CLK, bnz },{2*CLK, bz },{2*CLK, bnv },
+/*F8*/ {2*CLK, bbz },{2*CLK, bbnz },{2*CLK, bioz },{2*CLK, banz },{2*CLK, blkp },{2*CLK, blkd },{2*CLK, call },{2*CLK, br }
};
-static const tms32025_opcode_CE opcode_CE_subset[256]= /* Instructions living under the CExx opcode */
-{
-/*00*/ {1*CLK, eint },{1*CLK, dint },{1*CLK, rovm },{1*CLK, sovm },{1*CLK, cnfd },{1*CLK, cnfp },{1*CLK, rsxm },{1*CLK, ssxm },
-/*08*/ {1*CLK, spm },{1*CLK, spm },{1*CLK, spm },{1*CLK, spm },{1*CLK, rxf },{1*CLK, sxf },{1*CLK, fort },{1*CLK, fort },
-/*10*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{1*CLK, pac },{1*CLK, apac },{1*CLK, spac },{0*CLK, illegal },
-/*18*/ {1*CLK, sfl },{1*CLK, sfr },{0*CLK, illegal },{1*CLK, abst },{1*CLK, push },{1*CLK, pop },{2*CLK, trap },{3*CLK, idle },
-/*20*/ {1*CLK, rtxm },{1*CLK, stxm },{0*CLK, illegal },{1*CLK, neg },{2*CLK, cala },{2*CLK, bacc },{2*CLK, ret },{1*CLK, cmpl },
-/*28*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*30*/ {1*CLK, rc },{1*CLK, sc },{1*CLK, rtc },{1*CLK, stc },{1*CLK, rol },{1*CLK, ror },{1*CLK, rfsm },{1*CLK, sfsm },
-/*38*/ {1*CLK, rhm },{1*CLK, shm },{0*CLK, illegal },{0*CLK, illegal },{1*CLK, conf },{1*CLK, conf },{1*CLK, conf },{1*CLK, conf },
-/*40*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*48*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*50*/ {1*CLK, cmpr },{1*CLK, cmpr },{1*CLK, cmpr },{1*CLK, cmpr },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*58*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*60*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*68*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*70*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*78*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*80*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*88*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*90*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*98*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*A0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*A8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*B0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*B8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*C0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*C8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*D0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*D8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*E0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*E8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*F0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
-/*F8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal }
+static const tms32025_opcode_CE opcode_CE_subset[256]= /* Instructions living under the CExx opcode */
+{
+/*00*/ {1*CLK, eint },{1*CLK, dint },{1*CLK, rovm },{1*CLK, sovm },{1*CLK, cnfd },{1*CLK, cnfp },{1*CLK, rsxm },{1*CLK, ssxm },
+/*08*/ {1*CLK, spm },{1*CLK, spm },{1*CLK, spm },{1*CLK, spm },{1*CLK, rxf },{1*CLK, sxf },{1*CLK, fort },{1*CLK, fort },
+/*10*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{1*CLK, pac },{1*CLK, apac },{1*CLK, spac },{0*CLK, illegal },
+/*18*/ {1*CLK, sfl },{1*CLK, sfr },{0*CLK, illegal },{1*CLK, abst },{1*CLK, push },{1*CLK, pop },{2*CLK, trap },{3*CLK, idle },
+/*20*/ {1*CLK, rtxm },{1*CLK, stxm },{0*CLK, illegal },{1*CLK, neg },{2*CLK, cala },{2*CLK, bacc },{2*CLK, ret },{1*CLK, cmpl },
+/*28*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*30*/ {1*CLK, rc },{1*CLK, sc },{1*CLK, rtc },{1*CLK, stc },{1*CLK, rol },{1*CLK, ror },{1*CLK, rfsm },{1*CLK, sfsm },
+/*38*/ {1*CLK, rhm },{1*CLK, shm },{0*CLK, illegal },{0*CLK, illegal },{1*CLK, conf },{1*CLK, conf },{1*CLK, conf },{1*CLK, conf },
+/*40*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*48*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*50*/ {1*CLK, cmpr },{1*CLK, cmpr },{1*CLK, cmpr },{1*CLK, cmpr },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*58*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*60*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*68*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*70*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*78*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*80*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*88*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*90*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*98*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*A0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*A8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*B0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*B8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*C0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*C8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*D0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*D8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*E0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*E8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*F0*/ {0*CLK, illegal },{0*CLK, illegal },{1*CLK, norm },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },
+/*F8*/ {0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal },{0*CLK, illegal }
};
-static const tms32025_opcode_Dx opcode_Dx_subset[8]= /* Instructions living under the Dxxx opcode */
+static const tms32025_opcode_Dx opcode_Dx_subset[8]= /* Instructions living under the Dxxx opcode */
{
-/*00*/ {2*CLK, lrlk },{2*CLK, lalk },{2*CLK, adlk },{2*CLK, sblk },{2*CLK, andk },{2*CLK, ork },{2*CLK, xork },{0*CLK, illegal }
+/*00*/ {2*CLK, lrlk },{2*CLK, lalk },{2*CLK, adlk },{2*CLK, sblk },{2*CLK, andk },{2*CLK, ork },{2*CLK, xork },{0*CLK, illegal }
};
@@ -1729,15 +1729,15 @@ static CPU_RESET( tms32025 )
{
tms32025_state *cpustate = get_safe_token(device);
- SET_PC(0); /* Starting address on a reset */
- cpustate->STR0 |= 0x0600; /* INTM and unused bit set to 1 */
- cpustate->STR0 &= 0xefff; /* OV cleared to 0. Remaining bits undefined */
- cpustate->STR1 |= 0x07f0; /* SXM, C, HM, FSM, XF and unused bits set to 1 */
- cpustate->STR1 &= 0xeff0; /* CNF, FO, TXM, PM bits cleared to 0. Remaining bits undefined */
- cpustate->RPTC = 0; /* Reset repeat counter to 0 */
- cpustate->IFR = 0; /* IRQ pending flags */
+ SET_PC(0); /* Starting address on a reset */
+ cpustate->STR0 |= 0x0600; /* INTM and unused bit set to 1 */
+ cpustate->STR0 &= 0xefff; /* OV cleared to 0. Remaining bits undefined */
+ cpustate->STR1 |= 0x07f0; /* SXM, C, HM, FSM, XF and unused bits set to 1 */
+ cpustate->STR1 &= 0xeff0; /* CNF, FO, TXM, PM bits cleared to 0. Remaining bits undefined */
+ cpustate->RPTC = 0; /* Reset repeat counter to 0 */
+ cpustate->IFR = 0; /* IRQ pending flags */
- S_OUT(TMS32025_XF,ASSERT_LINE); /* XF flag is high. Must set the pin */
+ S_OUT(TMS32025_XF,ASSERT_LINE); /* XF flag is high. Must set the pin */
/* Set the internal memory mapped registers */
GREG = 0;
@@ -1754,11 +1754,11 @@ static CPU_RESET( tms32025 )
memset(cpustate->pgmmap, 0, sizeof(cpustate->pgmmap));
memset(cpustate->datamap, 0, sizeof(cpustate->datamap));
- cpustate->datamap[0] = &cpustate->intRAM[0x000]; /* B2 */
- cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
- cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
- cpustate->datamap[6] = &cpustate->intRAM[0x300]; /* B1 */
- cpustate->datamap[7] = &cpustate->intRAM[0x380]; /* B1 */
+ cpustate->datamap[0] = &cpustate->intRAM[0x000]; /* B2 */
+ cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
+ cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
+ cpustate->datamap[6] = &cpustate->intRAM[0x300]; /* B1 */
+ cpustate->datamap[7] = &cpustate->intRAM[0x380]; /* B1 */
}
static CPU_RESET( tms32026 )
@@ -1771,19 +1771,19 @@ static CPU_RESET( tms32026 )
memset(cpustate->pgmmap, 0, sizeof(cpustate->pgmmap));
memset(cpustate->datamap, 0, sizeof(cpustate->datamap));
- cpustate->datamap[0] = &cpustate->intRAM[0x000]; /* B2 */
- cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
- cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
- cpustate->datamap[6] = &cpustate->intRAM[0x300]; /* B0 */
- cpustate->datamap[7] = &cpustate->intRAM[0x380]; /* B0 */
- cpustate->datamap[8] = &cpustate->intRAM[0x400]; /* B1 */
- cpustate->datamap[9] = &cpustate->intRAM[0x480]; /* B1 */
- cpustate->datamap[10] = &cpustate->intRAM[0x500]; /* B1 */
- cpustate->datamap[11] = &cpustate->intRAM[0x580]; /* B1 */
- cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
- cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
- cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
- cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
+ cpustate->datamap[0] = &cpustate->intRAM[0x000]; /* B2 */
+ cpustate->datamap[4] = &cpustate->intRAM[0x200]; /* B0 */
+ cpustate->datamap[5] = &cpustate->intRAM[0x280]; /* B0 */
+ cpustate->datamap[6] = &cpustate->intRAM[0x300]; /* B0 */
+ cpustate->datamap[7] = &cpustate->intRAM[0x380]; /* B0 */
+ cpustate->datamap[8] = &cpustate->intRAM[0x400]; /* B1 */
+ cpustate->datamap[9] = &cpustate->intRAM[0x480]; /* B1 */
+ cpustate->datamap[10] = &cpustate->intRAM[0x500]; /* B1 */
+ cpustate->datamap[11] = &cpustate->intRAM[0x580]; /* B1 */
+ cpustate->datamap[12] = &cpustate->intRAM[0x600]; /* B3 */
+ cpustate->datamap[13] = &cpustate->intRAM[0x680]; /* B3 */
+ cpustate->datamap[14] = &cpustate->intRAM[0x700]; /* B3 */
+ cpustate->datamap[15] = &cpustate->intRAM[0x780]; /* B3 */
}
@@ -1801,9 +1801,9 @@ static CPU_EXIT( tms32025 )
INLINE int process_IRQs(tms32025_state *cpustate)
{
/********** Interrupt Flag Register (IFR) **********
- | 5 | 4 | 3 | 2 | 1 | 0 |
- | XINT| RINT| TINT| INT2| INT1| INT0|
- */
+ | 5 | 4 | 3 | 2 | 1 | 0 |
+ | XINT| RINT| TINT| INT2| INT1| INT0|
+ */
cpustate->tms32025_irq_cycles = 0;
@@ -1811,10 +1811,10 @@ INLINE int process_IRQs(tms32025_state *cpustate)
if ( (INTM == 0) && (cpustate->opcode.w.l != 0xce00) && (cpustate->IFR & IMR) )
{
- cpustate->tms32025_irq_cycles = (3*CLK); /* 3 clock cycles used due to PUSH and DINT operation ? */
+ cpustate->tms32025_irq_cycles = (3*CLK); /* 3 clock cycles used due to PUSH and DINT operation ? */
PUSH_STACK(cpustate, cpustate->PC);
- if ((cpustate->IFR & 0x01) && (IMR & 0x01)) { /* IRQ line 0 */
+ if ((cpustate->IFR & 0x01) && (IMR & 0x01)) { /* IRQ line 0 */
//logerror("TMS32025: Active INT0\n");
SET_PC(0x0002);
(*cpustate->irq_callback)(cpustate->device, 0);
@@ -1823,7 +1823,7 @@ INLINE int process_IRQs(tms32025_state *cpustate)
SET0(cpustate, INTM_FLAG);
return cpustate->tms32025_irq_cycles;
}
- if ((cpustate->IFR & 0x02) && (IMR & 0x02)) { /* IRQ line 1 */
+ if ((cpustate->IFR & 0x02) && (IMR & 0x02)) { /* IRQ line 1 */
//logerror("TMS32025: Active INT1\n");
SET_PC(0x0004);
(*cpustate->irq_callback)(cpustate->device, 1);
@@ -1832,7 +1832,7 @@ INLINE int process_IRQs(tms32025_state *cpustate)
SET0(cpustate, INTM_FLAG);
return cpustate->tms32025_irq_cycles;
}
- if ((cpustate->IFR & 0x04) && (IMR & 0x04)) { /* IRQ line 2 */
+ if ((cpustate->IFR & 0x04) && (IMR & 0x04)) { /* IRQ line 2 */
//logerror("TMS32025: Active INT2\n");
SET_PC(0x0006);
(*cpustate->irq_callback)(cpustate->device, 2);
@@ -1841,7 +1841,7 @@ INLINE int process_IRQs(tms32025_state *cpustate)
SET0(cpustate, INTM_FLAG);
return cpustate->tms32025_irq_cycles;
}
- if ((cpustate->IFR & 0x08) && (IMR & 0x08)) { /* Timer IRQ (internal) */
+ if ((cpustate->IFR & 0x08) && (IMR & 0x08)) { /* Timer IRQ (internal) */
// logerror("TMS32025: Active TINT (Timer)\n");
SET_PC(0x0018);
cpustate->idle = 0;
@@ -1849,7 +1849,7 @@ INLINE int process_IRQs(tms32025_state *cpustate)
SET0(cpustate, INTM_FLAG);
return cpustate->tms32025_irq_cycles;
}
- if ((cpustate->IFR & 0x10) && (IMR & 0x10)) { /* Serial port receive IRQ (internal) */
+ if ((cpustate->IFR & 0x10) && (IMR & 0x10)) { /* Serial port receive IRQ (internal) */
// logerror("TMS32025: Active RINT (Serial receive)\n");
DRR = S_IN(TMS32025_DR);
SET_PC(0x001A);
@@ -1858,7 +1858,7 @@ INLINE int process_IRQs(tms32025_state *cpustate)
SET0(cpustate, INTM_FLAG);
return cpustate->tms32025_irq_cycles;
}
- if ((cpustate->IFR & 0x20) && (IMR & 0x20)) { /* Serial port transmit IRQ (internal) */
+ if ((cpustate->IFR & 0x20) && (IMR & 0x20)) { /* Serial port transmit IRQ (internal) */
// logerror("TMS32025: Active XINT (Serial transmit)\n");
S_OUT(TMS32025_DX,DXR);
SET_PC(0x001C);
@@ -1911,7 +1911,7 @@ again:
TIM = PRD;
cpustate->IFR |= 0x08;
- clocks = process_IRQs(cpustate); /* Handle Timer IRQ */
+ clocks = process_IRQs(cpustate); /* Handle Timer IRQ */
goto again;
}
}
@@ -1928,21 +1928,21 @@ static CPU_EXECUTE( tms32025 )
/**** Respond to external hold signal */
if (S_IN(TMS32025_HOLD) == ASSERT_LINE) {
if (cpustate->hold == 0) {
- S_OUT(TMS32025_HOLDA,ASSERT_LINE); /* Hold-Ack (active low) */
+ S_OUT(TMS32025_HOLDA,ASSERT_LINE); /* Hold-Ack (active low) */
}
cpustate->hold = 1;
if (HM) {
- cpustate->icount = 0; /* Exit */
+ cpustate->icount = 0; /* Exit */
}
else {
if (cpustate->external_mem_access) {
- cpustate->icount = 0; /* Exit */
+ cpustate->icount = 0; /* Exit */
}
}
}
else {
if (cpustate->hold == 1) {
- S_OUT(TMS32025_HOLDA,CLEAR_LINE); /* Hold-Ack (active low) */
+ S_OUT(TMS32025_HOLDA,CLEAR_LINE); /* Hold-Ack (active low) */
process_timer(cpustate, 3);
}
cpustate->hold = 0;
@@ -1960,9 +1960,9 @@ static CPU_EXECUTE( tms32025 )
while (cpustate->icount > 0)
{
- cpustate->tms32025_dec_cycles = 0;
+ cpustate->tms32025_dec_cycles = 0;
- if (cpustate->IFR) { /* Check IRQ Flag Register for pending IRQs */
+ if (cpustate->IFR) { /* Check IRQ Flag Register for pending IRQs */
cpustate->tms32025_dec_cycles += process_IRQs(cpustate);
}
@@ -1973,33 +1973,33 @@ static CPU_EXECUTE( tms32025 )
cpustate->opcode.d = M_RDOP(cpustate->PC);
cpustate->PC++;
- if (cpustate->opcode.b.h == 0xCE) /* Opcode 0xCExx has many sub-opcodes in its minor byte */
+ if (cpustate->opcode.b.h == 0xCE) /* Opcode 0xCExx has many sub-opcodes in its minor byte */
{
cpustate->tms32025_dec_cycles += opcode_CE_subset[cpustate->opcode.b.l].cycles;
(*opcode_CE_subset[cpustate->opcode.b.l].function)(cpustate);
}
- else if ((cpustate->opcode.w.l & 0xf0f8) == 0xd000) /* Opcode 0xDxxx has many sub-opcodes in its minor byte */
+ else if ((cpustate->opcode.w.l & 0xf0f8) == 0xd000) /* Opcode 0xDxxx has many sub-opcodes in its minor byte */
{
cpustate->tms32025_dec_cycles += opcode_Dx_subset[cpustate->opcode.b.l].cycles;
(*opcode_Dx_subset[cpustate->opcode.b.l].function)(cpustate);
}
- else /* Do all opcodes except the CExx and Dxxx ones */
+ else /* Do all opcodes except the CExx and Dxxx ones */
{
cpustate->tms32025_dec_cycles += opcode_main[cpustate->opcode.b.h].cycles;
(*opcode_main[cpustate->opcode.b.h].function)(cpustate);
}
- if (cpustate->init_load_addr == 2) { /* Repeat next instruction */
+ if (cpustate->init_load_addr == 2) { /* Repeat next instruction */
/****************************************************\
- ******* These instructions are not repeatable ********
- ** ADLK, ANDK, LALK, LRLK, ORK, SBLK, XORK **
- ** ADDK, ADRK, LACK, LARK, LDPK, MPYK, RPTK **
- ** SBRK, SPM, SUBK, ZAC, IDLE, RPT, TRAP **
- ** BACC, CALA, RET **
- ** B, BANZ, BBNZ, BBZ, BC, BGEZ, BGZ, BIOZ **
- ** BNC, BNV, BNZ, BV, BZ, CALL, BLEZ, BLZ **
- \****************************************************/
+ ******* These instructions are not repeatable ********
+ ** ADLK, ANDK, LALK, LRLK, ORK, SBLK, XORK **
+ ** ADDK, ADRK, LACK, LARK, LDPK, MPYK, RPTK **
+ ** SBRK, SPM, SUBK, ZAC, IDLE, RPT, TRAP **
+ ** BACC, CALA, RET **
+ ** B, BANZ, BBNZ, BBZ, BC, BGEZ, BGZ, BIOZ **
+ ** BNC, BNV, BNZ, BV, BZ, CALL, BLEZ, BLZ **
+ \****************************************************/
cpustate->PREVPC = cpustate->PC;
debugger_instruction_hook(device, cpustate->PC);
@@ -2010,7 +2010,7 @@ static CPU_EXECUTE( tms32025 )
do {
if (cpustate->opcode.b.h == 0xCE)
- { /* Do all 0xCExx Opcodes */
+ { /* Do all 0xCExx Opcodes */
if (cpustate->init_load_addr) {
cpustate->tms32025_dec_cycles += (1*CLK);
}
@@ -2020,7 +2020,7 @@ static CPU_EXECUTE( tms32025 )
(*opcode_CE_subset[cpustate->opcode.b.l].function)(cpustate);
}
else
- { /* Do all other opcodes */
+ { /* Do all other opcodes */
if (cpustate->init_load_addr) {
cpustate->tms32025_dec_cycles += (1*CLK);
}
@@ -2087,10 +2087,10 @@ static CPU_READOP( tms32025 )
ptr = &((UINT8 *)&cpustate->pgmmap[offset >> 8])[offset & 0xff];
switch (size)
{
- case 1: *value = *((UINT8 *) ptr);
- case 2: *value = *((UINT16 *) ptr);
- case 4: *value = *((UINT32 *) ptr);
- case 8: *value = *((UINT64 *) ptr);
+ case 1: *value = *((UINT8 *) ptr);
+ case 2: *value = *((UINT16 *) ptr);
+ case 4: *value = *((UINT32 *) ptr);
+ case 8: *value = *((UINT64 *) ptr);
}
return 1;
}
@@ -2211,47 +2211,47 @@ static CPU_SET_INFO( tms32025 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + TMS32025_INT0: set_irq_line(cpustate, TMS32025_INT0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_INT1: set_irq_line(cpustate, TMS32025_INT1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_INT2: set_irq_line(cpustate, TMS32025_INT2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_TINT: set_irq_line(cpustate, TMS32025_TINT, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_RINT: set_irq_line(cpustate, TMS32025_RINT, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_XINT: set_irq_line(cpustate, TMS32025_XINT, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_FSX: set_fsx_line(cpustate, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_INT0: set_irq_line(cpustate, TMS32025_INT0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_INT1: set_irq_line(cpustate, TMS32025_INT1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_INT2: set_irq_line(cpustate, TMS32025_INT2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_TINT: set_irq_line(cpustate, TMS32025_TINT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_RINT: set_irq_line(cpustate, TMS32025_RINT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_XINT: set_irq_line(cpustate, TMS32025_XINT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_FSX: set_fsx_line(cpustate, info->i); break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32025_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_PC: cpustate->PC = info->i; break;
/* This is actually not a stack pointer, but the stack contents */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS32025_STK7: cpustate->STACK[7] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK6: cpustate->STACK[6] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK5: cpustate->STACK[5] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK4: cpustate->STACK[4] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK3: cpustate->STACK[3] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK2: cpustate->STACK[2] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK1: cpustate->STACK[1] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK0: cpustate->STACK[0] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STR0: cpustate->STR0 = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_STR1: cpustate->STR1 = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_IFR: cpustate->IFR = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_RPTC: cpustate->RPTC = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_ACC: cpustate->ACC.d = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_PREG: cpustate->Preg.d = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_TREG: cpustate->Treg = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR0: cpustate->AR[0] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR1: cpustate->AR[1] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR2: cpustate->AR[2] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR3: cpustate->AR[3] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR4: cpustate->AR[4] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR5: cpustate->AR[5] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR6: cpustate->AR[6] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR7: cpustate->AR[7] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32025_DRR: M_WRTRAM(cpustate, 0,info->i); break;
- case CPUINFO_INT_REGISTER + TMS32025_DXR: M_WRTRAM(cpustate, 1,info->i); break;
- case CPUINFO_INT_REGISTER + TMS32025_TIM: M_WRTRAM(cpustate, 2,info->i); break;
- case CPUINFO_INT_REGISTER + TMS32025_PRD: M_WRTRAM(cpustate, 3,info->i); break;
- case CPUINFO_INT_REGISTER + TMS32025_IMR: M_WRTRAM(cpustate, 4,info->i); break;
- case CPUINFO_INT_REGISTER + TMS32025_GREG: M_WRTRAM(cpustate, 5,info->i); break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK7: cpustate->STACK[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK6: cpustate->STACK[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK5: cpustate->STACK[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK4: cpustate->STACK[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK3: cpustate->STACK[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK2: cpustate->STACK[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK1: cpustate->STACK[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK0: cpustate->STACK[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STR0: cpustate->STR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STR1: cpustate->STR1 = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_IFR: cpustate->IFR = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_RPTC: cpustate->RPTC = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_ACC: cpustate->ACC.d = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_PREG: cpustate->Preg.d = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_TREG: cpustate->Treg = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR0: cpustate->AR[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR1: cpustate->AR[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR2: cpustate->AR[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR3: cpustate->AR[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR4: cpustate->AR[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR5: cpustate->AR[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR6: cpustate->AR[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR7: cpustate->AR[7] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32025_DRR: M_WRTRAM(cpustate, 0,info->i); break;
+ case CPUINFO_INT_REGISTER + TMS32025_DXR: M_WRTRAM(cpustate, 1,info->i); break;
+ case CPUINFO_INT_REGISTER + TMS32025_TIM: M_WRTRAM(cpustate, 2,info->i); break;
+ case CPUINFO_INT_REGISTER + TMS32025_PRD: M_WRTRAM(cpustate, 3,info->i); break;
+ case CPUINFO_INT_REGISTER + TMS32025_IMR: M_WRTRAM(cpustate, 4,info->i); break;
+ case CPUINFO_INT_REGISTER + TMS32025_GREG: M_WRTRAM(cpustate, 5,info->i); break;
}
}
@@ -2268,89 +2268,89 @@ CPU_GET_INFO( tms32025 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms32025_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1*CLK; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 5*CLK; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 17; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = -1; break;
-
- case CPUINFO_INT_INPUT_STATE + TMS32025_INT0: info->i = (cpustate->IFR & 0x01) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_INT1: info->i = (cpustate->IFR & 0x02) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_INT2: info->i = (cpustate->IFR & 0x04) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_TINT: info->i = (cpustate->IFR & 0x08) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_RINT: info->i = (cpustate->IFR & 0x10) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + TMS32025_XINT: info->i = (cpustate->IFR & 0x20) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms32025_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1*CLK; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 5*CLK; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 17; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = -1; break;
+
+ case CPUINFO_INT_INPUT_STATE + TMS32025_INT0: info->i = (cpustate->IFR & 0x01) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_INT1: info->i = (cpustate->IFR & 0x02) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_INT2: info->i = (cpustate->IFR & 0x04) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_TINT: info->i = (cpustate->IFR & 0x08) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_RINT: info->i = (cpustate->IFR & 0x10) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + TMS32025_XINT: info->i = (cpustate->IFR & 0x20) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PREVPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32025_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + TMS32025_PC: info->i = cpustate->PC; break;
/* This is actually not a stack pointer, but the stack contents */
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS32025_STK7: info->i = cpustate->STACK[7]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK6: info->i = cpustate->STACK[6]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK5: info->i = cpustate->STACK[5]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK4: info->i = cpustate->STACK[4]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK3: info->i = cpustate->STACK[3]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK2: info->i = cpustate->STACK[2]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK1: info->i = cpustate->STACK[1]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STK0: info->i = cpustate->STACK[0]; break;
- case CPUINFO_INT_REGISTER + TMS32025_STR0: info->i = cpustate->STR0; break;
- case CPUINFO_INT_REGISTER + TMS32025_STR1: info->i = cpustate->STR1; break;
- case CPUINFO_INT_REGISTER + TMS32025_IFR: info->i = cpustate->IFR; break;
- case CPUINFO_INT_REGISTER + TMS32025_RPTC: info->i = cpustate->RPTC; break;
- case CPUINFO_INT_REGISTER + TMS32025_ACC: info->i = cpustate->ACC.d; break;
- case CPUINFO_INT_REGISTER + TMS32025_PREG: info->i = cpustate->Preg.d; break;
- case CPUINFO_INT_REGISTER + TMS32025_TREG: info->i = cpustate->Treg; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR0: info->i = cpustate->AR[0]; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR1: info->i = cpustate->AR[1]; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR2: info->i = cpustate->AR[2]; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR3: info->i = cpustate->AR[3]; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR4: info->i = cpustate->AR[4]; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR5: info->i = cpustate->AR[5]; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR6: info->i = cpustate->AR[6]; break;
- case CPUINFO_INT_REGISTER + TMS32025_AR7: info->i = cpustate->AR[7]; break;
- case CPUINFO_INT_REGISTER + TMS32025_DRR: info->i = M_RDRAM(cpustate, 0); break;
- case CPUINFO_INT_REGISTER + TMS32025_DXR: info->i = M_RDRAM(cpustate, 1); break;
- case CPUINFO_INT_REGISTER + TMS32025_TIM: info->i = M_RDRAM(cpustate, 2); break;
- case CPUINFO_INT_REGISTER + TMS32025_PRD: info->i = M_RDRAM(cpustate, 3); break;
- case CPUINFO_INT_REGISTER + TMS32025_IMR: info->i = M_RDRAM(cpustate, 4); break;
- case CPUINFO_INT_REGISTER + TMS32025_GREG: info->i = M_RDRAM(cpustate, 5); break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK7: info->i = cpustate->STACK[7]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK6: info->i = cpustate->STACK[6]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK5: info->i = cpustate->STACK[5]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK4: info->i = cpustate->STACK[4]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK3: info->i = cpustate->STACK[3]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK2: info->i = cpustate->STACK[2]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK1: info->i = cpustate->STACK[1]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STK0: info->i = cpustate->STACK[0]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STR0: info->i = cpustate->STR0; break;
+ case CPUINFO_INT_REGISTER + TMS32025_STR1: info->i = cpustate->STR1; break;
+ case CPUINFO_INT_REGISTER + TMS32025_IFR: info->i = cpustate->IFR; break;
+ case CPUINFO_INT_REGISTER + TMS32025_RPTC: info->i = cpustate->RPTC; break;
+ case CPUINFO_INT_REGISTER + TMS32025_ACC: info->i = cpustate->ACC.d; break;
+ case CPUINFO_INT_REGISTER + TMS32025_PREG: info->i = cpustate->Preg.d; break;
+ case CPUINFO_INT_REGISTER + TMS32025_TREG: info->i = cpustate->Treg; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR0: info->i = cpustate->AR[0]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR1: info->i = cpustate->AR[1]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR2: info->i = cpustate->AR[2]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR3: info->i = cpustate->AR[3]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR4: info->i = cpustate->AR[4]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR5: info->i = cpustate->AR[5]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR6: info->i = cpustate->AR[6]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_AR7: info->i = cpustate->AR[7]; break;
+ case CPUINFO_INT_REGISTER + TMS32025_DRR: info->i = M_RDRAM(cpustate, 0); break;
+ case CPUINFO_INT_REGISTER + TMS32025_DXR: info->i = M_RDRAM(cpustate, 1); break;
+ case CPUINFO_INT_REGISTER + TMS32025_TIM: info->i = M_RDRAM(cpustate, 2); break;
+ case CPUINFO_INT_REGISTER + TMS32025_PRD: info->i = M_RDRAM(cpustate, 3); break;
+ case CPUINFO_INT_REGISTER + TMS32025_IMR: info->i = M_RDRAM(cpustate, 4); break;
+ case CPUINFO_INT_REGISTER + TMS32025_GREG: info->i = M_RDRAM(cpustate, 5); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32025); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms32025); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32025); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms32025); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32025); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32025); break;
- case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(tms32025); break;
- case CPUINFO_FCT_WRITE: info->write = CPU_WRITE_NAME(tms32025); break;
- case CPUINFO_FCT_READOP: info->readop = CPU_READOP_NAME(tms32025); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32025); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms32025); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32025); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms32025); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms32025); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32025); break;
+ case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(tms32025); break;
+ case CPUINFO_FCT_WRITE: info->write = CPU_WRITE_NAME(tms32025); break;
+ case CPUINFO_FCT_READOP: info->readop = CPU_READOP_NAME(tms32025); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS32025"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments TMS320x25"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.10"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32025"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments TMS320x25"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.10"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Tony La Porta"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "arp%d%c%c%c%cdp%03x arb%d%c%c%c%c%c%c%c%c%c%c%cpm%d",
@@ -2376,36 +2376,36 @@ CPU_GET_INFO( tms32025 )
(cpustate->STR1 & 0x0003) );
break;
- case CPUINFO_STR_REGISTER + TMS32025_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + TMS32025_STR0: sprintf(info->s, "STR0:%04X", cpustate->STR0); break;
- case CPUINFO_STR_REGISTER + TMS32025_STR1: sprintf(info->s, "STR1:%04X", cpustate->STR1); break;
- case CPUINFO_STR_REGISTER + TMS32025_IFR: sprintf(info->s, "IFR:%04X", cpustate->IFR); break;
- case CPUINFO_STR_REGISTER + TMS32025_RPTC: sprintf(info->s, "RPTC:%02X", cpustate->RPTC); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK7: sprintf(info->s, "STK7:%04X", cpustate->STACK[7]); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK6: sprintf(info->s, "STK6:%04X", cpustate->STACK[6]); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK5: sprintf(info->s, "STK5:%04X", cpustate->STACK[5]); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK4: sprintf(info->s, "STK4:%04X", cpustate->STACK[4]); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK3: sprintf(info->s, "STK3:%04X", cpustate->STACK[3]); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK2: sprintf(info->s, "STK2:%04X", cpustate->STACK[2]); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK1: sprintf(info->s, "STK1:%04X", cpustate->STACK[1]); break;
- case CPUINFO_STR_REGISTER + TMS32025_STK0: sprintf(info->s, "STK0:%04X", cpustate->STACK[0]); break;
- case CPUINFO_STR_REGISTER + TMS32025_ACC: sprintf(info->s, "ACC:%08X", cpustate->ACC.d); break;
- case CPUINFO_STR_REGISTER + TMS32025_PREG: sprintf(info->s, "P:%08X", cpustate->Preg.d); break;
- case CPUINFO_STR_REGISTER + TMS32025_TREG: sprintf(info->s, "T:%04X", cpustate->Treg); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR0: sprintf(info->s, "AR0:%04X", cpustate->AR[0]); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR1: sprintf(info->s, "AR1:%04X", cpustate->AR[1]); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR2: sprintf(info->s, "AR2:%04X", cpustate->AR[2]); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR3: sprintf(info->s, "AR3:%04X", cpustate->AR[3]); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR4: sprintf(info->s, "AR4:%04X", cpustate->AR[4]); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR5: sprintf(info->s, "AR5:%04X", cpustate->AR[5]); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR6: sprintf(info->s, "AR6:%04X", cpustate->AR[6]); break;
- case CPUINFO_STR_REGISTER + TMS32025_AR7: sprintf(info->s, "AR7:%04X", cpustate->AR[7]); break;
- case CPUINFO_STR_REGISTER + TMS32025_DRR: sprintf(info->s, "DRR:%04X", M_RDRAM(cpustate, 0)); break;
- case CPUINFO_STR_REGISTER + TMS32025_DXR: sprintf(info->s, "DXR:%04X", M_RDRAM(cpustate, 1)); break;
- case CPUINFO_STR_REGISTER + TMS32025_TIM: sprintf(info->s, "TIM:%04X", M_RDRAM(cpustate, 2)); break;
- case CPUINFO_STR_REGISTER + TMS32025_PRD: sprintf(info->s, "PRD:%04X", M_RDRAM(cpustate, 3)); break;
- case CPUINFO_STR_REGISTER + TMS32025_IMR: sprintf(info->s, "IMR:%04X", M_RDRAM(cpustate, 4)); break;
- case CPUINFO_STR_REGISTER + TMS32025_GREG: sprintf(info->s, "GREG:%04X", M_RDRAM(cpustate, 5)); break;
+ case CPUINFO_STR_REGISTER + TMS32025_PC: sprintf(info->s, "PC:%04X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STR0: sprintf(info->s, "STR0:%04X", cpustate->STR0); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STR1: sprintf(info->s, "STR1:%04X", cpustate->STR1); break;
+ case CPUINFO_STR_REGISTER + TMS32025_IFR: sprintf(info->s, "IFR:%04X", cpustate->IFR); break;
+ case CPUINFO_STR_REGISTER + TMS32025_RPTC: sprintf(info->s, "RPTC:%02X", cpustate->RPTC); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK7: sprintf(info->s, "STK7:%04X", cpustate->STACK[7]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK6: sprintf(info->s, "STK6:%04X", cpustate->STACK[6]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK5: sprintf(info->s, "STK5:%04X", cpustate->STACK[5]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK4: sprintf(info->s, "STK4:%04X", cpustate->STACK[4]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK3: sprintf(info->s, "STK3:%04X", cpustate->STACK[3]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK2: sprintf(info->s, "STK2:%04X", cpustate->STACK[2]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK1: sprintf(info->s, "STK1:%04X", cpustate->STACK[1]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_STK0: sprintf(info->s, "STK0:%04X", cpustate->STACK[0]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_ACC: sprintf(info->s, "ACC:%08X", cpustate->ACC.d); break;
+ case CPUINFO_STR_REGISTER + TMS32025_PREG: sprintf(info->s, "P:%08X", cpustate->Preg.d); break;
+ case CPUINFO_STR_REGISTER + TMS32025_TREG: sprintf(info->s, "T:%04X", cpustate->Treg); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR0: sprintf(info->s, "AR0:%04X", cpustate->AR[0]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR1: sprintf(info->s, "AR1:%04X", cpustate->AR[1]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR2: sprintf(info->s, "AR2:%04X", cpustate->AR[2]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR3: sprintf(info->s, "AR3:%04X", cpustate->AR[3]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR4: sprintf(info->s, "AR4:%04X", cpustate->AR[4]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR5: sprintf(info->s, "AR5:%04X", cpustate->AR[5]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR6: sprintf(info->s, "AR6:%04X", cpustate->AR[6]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_AR7: sprintf(info->s, "AR7:%04X", cpustate->AR[7]); break;
+ case CPUINFO_STR_REGISTER + TMS32025_DRR: sprintf(info->s, "DRR:%04X", M_RDRAM(cpustate, 0)); break;
+ case CPUINFO_STR_REGISTER + TMS32025_DXR: sprintf(info->s, "DXR:%04X", M_RDRAM(cpustate, 1)); break;
+ case CPUINFO_STR_REGISTER + TMS32025_TIM: sprintf(info->s, "TIM:%04X", M_RDRAM(cpustate, 2)); break;
+ case CPUINFO_STR_REGISTER + TMS32025_PRD: sprintf(info->s, "PRD:%04X", M_RDRAM(cpustate, 3)); break;
+ case CPUINFO_STR_REGISTER + TMS32025_IMR: sprintf(info->s, "IMR:%04X", M_RDRAM(cpustate, 4)); break;
+ case CPUINFO_STR_REGISTER + TMS32025_GREG: sprintf(info->s, "GREG:%04X", M_RDRAM(cpustate, 5)); break;
}
}
@@ -2419,12 +2419,12 @@ CPU_GET_INFO( tms32026 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32026); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms32026); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS32026"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32026"); break;
- default: CPU_GET_INFO_CALL(tms32025); break;
+ default: CPU_GET_INFO_CALL(tms32025); break;
}
}
diff --git a/src/emu/cpu/tms32025/tms32025.h b/src/emu/cpu/tms32025/tms32025.h
index 01ecb8b5a8f..92034c9a694 100644
--- a/src/emu/cpu/tms32025/tms32025.h
+++ b/src/emu/cpu/tms32025/tms32025.h
@@ -1,19 +1,19 @@
- /**************************************************************************\
- * Texas Instruments TMS320x25 DSP Emulator *
- * *
- * Copyright Tony La Porta *
- * Written for the MAME project. *
- * *
- * Note : This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- * Three versions of the chip are available, and they are: *
- * TMS320C25 Internal ROM one time programmed at TI *
- * TMS320E25 Internal ROM programmable as a normal EPROM *
- * TMS320P25 Internal ROM programmable once as a normal EPROM only *
- * These devices can also be used as a MicroController with external ROM *
- * *
- \***************************************************************************/
+ /**************************************************************************\
+ * Texas Instruments TMS320x25 DSP Emulator *
+ * *
+ * Copyright Tony La Porta *
+ * Written for the MAME project. *
+ * *
+ * Note : This is a word based microcontroller, with addressing *
+ * architecture based on the Harvard addressing scheme. *
+ * *
+ * Three versions of the chip are available, and they are: *
+ * TMS320C25 Internal ROM one time programmed at TI *
+ * TMS320E25 Internal ROM programmable as a normal EPROM *
+ * TMS320P25 Internal ROM programmable once as a normal EPROM only *
+ * These devices can also be used as a MicroController with external ROM *
+ * *
+ \***************************************************************************/
#pragma once
@@ -23,12 +23,12 @@
-#define TMS32025_BIO 0x10000 /* BIO input */
-#define TMS32025_HOLD 0x10001 /* HOLD input */
-#define TMS32025_HOLDA 0x10001 /* HOLD Acknowledge output */
-#define TMS32025_XF 0x10002 /* XF output */
-#define TMS32025_DR 0x10003 /* Serial Data Receive input */
-#define TMS32025_DX 0x10003 /* Serial Data Transmit output */
+#define TMS32025_BIO 0x10000 /* BIO input */
+#define TMS32025_HOLD 0x10001 /* HOLD input */
+#define TMS32025_HOLDA 0x10001 /* HOLD Acknowledge output */
+#define TMS32025_XF 0x10002 /* XF output */
+#define TMS32025_DR 0x10003 /* Serial Data Receive input */
+#define TMS32025_DX 0x10003 /* Serial Data Transmit output */
@@ -36,17 +36,17 @@
* Interrupt constants
*/
-#define TMS32025_INT0 0 /* External INT0 */
-#define TMS32025_INT1 1 /* External INT1 */
-#define TMS32025_INT2 2 /* External INT2 */
-#define TMS32025_TINT 3 /* Internal Timer interrupt */
-#define TMS32025_RINT 4 /* Serial Port receive interrupt */
-#define TMS32025_XINT 5 /* Serial Port transmit interrupt */
-#define TMS32025_TRAP 6 /* Trap instruction */
-#define TMS32025_INT_NONE -1
+#define TMS32025_INT0 0 /* External INT0 */
+#define TMS32025_INT1 1 /* External INT1 */
+#define TMS32025_INT2 2 /* External INT2 */
+#define TMS32025_TINT 3 /* Internal Timer interrupt */
+#define TMS32025_RINT 4 /* Serial Port receive interrupt */
+#define TMS32025_XINT 5 /* Serial Port transmit interrupt */
+#define TMS32025_TRAP 6 /* Trap instruction */
+#define TMS32025_INT_NONE -1
/* Non-irq line */
-#define TMS32025_FSX 7 /* Frame synchronisation */
+#define TMS32025_FSX 7 /* Frame synchronisation */
enum
{
@@ -71,4 +71,4 @@ DECLARE_LEGACY_CPU_DEVICE(TMS32026, tms32026);
CPU_DISASSEMBLE( tms32025 );
-#endif /* __TMS32025_H__ */
+#endif /* __TMS32025_H__ */
diff --git a/src/emu/cpu/tms32031/32031ops.c b/src/emu/cpu/tms32031/32031ops.c
index 4075572f789..ba58851e64f 100644
--- a/src/emu/cpu/tms32031/32031ops.c
+++ b/src/emu/cpu/tms32031/32031ops.c
@@ -42,7 +42,7 @@
// COMPILE-TIME OPTIONS
//**************************************************************************
-#define USE_FP 0
+#define USE_FP 0
@@ -50,47 +50,47 @@
// MACROS
//**************************************************************************
-#define IREG(rnum) (m_r[rnum].i32[0])
-#define FREGEXP(rnum) (m_r[rnum].exponent())
-#define FREGMAN(rnum) (m_r[rnum].mantissa())
+#define IREG(rnum) (m_r[rnum].i32[0])
+#define FREGEXP(rnum) (m_r[rnum].exponent())
+#define FREGMAN(rnum) (m_r[rnum].mantissa())
-#define FP2LONG(rnum) ((FREGEXP(rnum) << 24) | ((UINT32)FREGMAN(rnum) >> 8))
-#define LONG2FP(rnum,v) do { m_r[rnum].set_mantissa((v) << 8); m_r[rnum].set_exponent((INT32)(v) >> 24); } while (0)
-#define SHORT2FP(rnum,v) do { \
+#define FP2LONG(rnum) ((FREGEXP(rnum) << 24) | ((UINT32)FREGMAN(rnum) >> 8))
+#define LONG2FP(rnum,v) do { m_r[rnum].set_mantissa((v) << 8); m_r[rnum].set_exponent((INT32)(v) >> 24); } while (0)
+#define SHORT2FP(rnum,v) do { \
if ((UINT16)(v) == 0x8000) { m_r[rnum].set_mantissa(0); m_r[rnum].set_exponent(-128); } \
else { m_r[rnum].set_mantissa((v) << 20); m_r[rnum].set_exponent((INT16)(v) >> 12); } \
} while (0)
-#define DIRECT(op) (((IREG(TMR_DP) & 0xff) << 16) | ((UINT16)op))
-#define INDIRECT_D(op,o) ((this->*s_indirect_d[((o) >> 3) & 31])(op,o))
-#define INDIRECT_1(op,o) ((this->*s_indirect_1[((o) >> 3) & 31])(op,o))
-#define INDIRECT_1_DEF(op,o) ((this->*s_indirect_1_def[((o) >> 3) & 31])(op,o,defptr))
+#define DIRECT(op) (((IREG(TMR_DP) & 0xff) << 16) | ((UINT16)op))
+#define INDIRECT_D(op,o) ((this->*s_indirect_d[((o) >> 3) & 31])(op,o))
+#define INDIRECT_1(op,o) ((this->*s_indirect_1[((o) >> 3) & 31])(op,o))
+#define INDIRECT_1_DEF(op,o) ((this->*s_indirect_1_def[((o) >> 3) & 31])(op,o,defptr))
-#define SIGN(val) ((val) & 0x80000000)
+#define SIGN(val) ((val) & 0x80000000)
-#define OVERFLOW_SUB(a,b,r) ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0)
-#define OVERFLOW_ADD(a,b,r) ((INT32)(((a) ^ (r)) & ((b) ^ (r))) < 0)
+#define OVERFLOW_SUB(a,b,r) ((INT32)(((a) ^ (b)) & ((a) ^ (r))) < 0)
+#define OVERFLOW_ADD(a,b,r) ((INT32)(((a) ^ (r)) & ((b) ^ (r))) < 0)
-#define CLR_FLAGS(f) do { IREG(TMR_ST) &= ~(f); } while (0)
-#define CLR_NVUF() CLR_FLAGS(NFLAG | VFLAG | UFFLAG)
-#define CLR_NZVUF() CLR_FLAGS(NFLAG | ZFLAG | VFLAG | UFFLAG)
-#define CLR_NZCVUF() CLR_FLAGS(NFLAG | ZFLAG | VFLAG | CFLAG | UFFLAG)
+#define CLR_FLAGS(f) do { IREG(TMR_ST) &= ~(f); } while (0)
+#define CLR_NVUF() CLR_FLAGS(NFLAG | VFLAG | UFFLAG)
+#define CLR_NZVUF() CLR_FLAGS(NFLAG | ZFLAG | VFLAG | UFFLAG)
+#define CLR_NZCVUF() CLR_FLAGS(NFLAG | ZFLAG | VFLAG | CFLAG | UFFLAG)
-#define OR_C(flag) do { IREG(TMR_ST) |= flag & CFLAG; } while (0)
-#define OR_NZ(val) do { IREG(TMR_ST) |= (((val) >> 28) & NFLAG) | (((val) == 0) << 2); } while (0)
-#define OR_NZF(reg) do { IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | ((reg.exponent() == -128) << 2); } while (0)
-#define OR_NUF(reg) do { int temp = (reg.exponent() == -128) << 4; IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | (temp) | (temp << 2); } while (0)
-#define OR_V_SUB(a,b,r) do { UINT32 temp = ((((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
-#define OR_V_ADD(a,b,r) do { UINT32 temp = ((((a) ^ (r)) & ((b) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
-#define OR_C_SUB(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(b) > (UINT32)(a)); } while (0)
-#define OR_C_ADD(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(a) > (UINT32)(r)); } while (0)
-#define OR_C_SBB(a,b,c) do { INT64 temp = (UINT32)(a) - (UINT32)(b) - (UINT32)(c); IREG(TMR_ST) |= (temp < 0); } while (0)
-#define OR_C_ADC(a,b,c) do { UINT64 temp = (UINT32)(a) + (UINT32)(b) + (UINT32)(c); IREG(TMR_ST) |= (temp > 0xffffffffUL); } while (0)
+#define OR_C(flag) do { IREG(TMR_ST) |= flag & CFLAG; } while (0)
+#define OR_NZ(val) do { IREG(TMR_ST) |= (((val) >> 28) & NFLAG) | (((val) == 0) << 2); } while (0)
+#define OR_NZF(reg) do { IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | ((reg.exponent() == -128) << 2); } while (0)
+#define OR_NUF(reg) do { int temp = (reg.exponent() == -128) << 4; IREG(TMR_ST) |= ((reg.mantissa() >> 28) & NFLAG) | (temp) | (temp << 2); } while (0)
+#define OR_V_SUB(a,b,r) do { UINT32 temp = ((((a) ^ (b)) & ((a) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
+#define OR_V_ADD(a,b,r) do { UINT32 temp = ((((a) ^ (r)) & ((b) ^ (r))) >> 30) & VFLAG; IREG(TMR_ST) |= temp | (temp << 4); } while (0)
+#define OR_C_SUB(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(b) > (UINT32)(a)); } while (0)
+#define OR_C_ADD(a,b,r) do { IREG(TMR_ST) |= ((UINT32)(a) > (UINT32)(r)); } while (0)
+#define OR_C_SBB(a,b,c) do { INT64 temp = (UINT32)(a) - (UINT32)(b) - (UINT32)(c); IREG(TMR_ST) |= (temp < 0); } while (0)
+#define OR_C_ADC(a,b,c) do { UINT64 temp = (UINT32)(a) + (UINT32)(b) + (UINT32)(c); IREG(TMR_ST) |= (temp > 0xffffffffUL); } while (0)
-#define OVM() (IREG(TMR_ST) & OVMFLAG)
+#define OVM() (IREG(TMR_ST) & OVMFLAG)
-#define DECLARE_DEF UINT32 defval; UINT32 *defptr = &defval
-#define UPDATE_DEF() *defptr = defval
+#define DECLARE_DEF UINT32 defval; UINT32 *defptr = &defval
+#define UPDATE_DEF() *defptr = defval
@@ -117,7 +117,7 @@ void tms3203x_device::unimplemented(UINT32 op)
inline void tms3203x_device::execute_one()
{
UINT32 op = ROPCODE(m_pc);
- m_icount -= 2; // 2 clocks per cycle
+ m_icount -= 2; // 2 clocks per cycle
m_pc++;
#if (TMS_3203X_LOG_OPCODE_USAGE)
if (machine.primary_screen->frame_number() == 2003)
@@ -175,155 +175,155 @@ const UINT32 C_ZUF = 1 << 20;
const UINT32 condition_table[0x80] =
{
-/* ------- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
-/* ------C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
-/* -----V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_NLUF,
-/* -----VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_NLUF,
-/* ----Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* ----Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* ----ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* ----ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* ---N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
-/* ---N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
-/* ---N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF,
-/* ---N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF,
-/* ---NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* ---NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* ---NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* ---NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
-/* --U---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --U---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --U--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --U--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --U-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --U-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --U-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --U-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* --UNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
-/* -v----- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_NLUF,
-/* -v----C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_NLUF,
-/* -v---V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_NLUF,
-/* -v---VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_NLUF,
-/* -v--Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -v--Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -v--ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -v--ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -v-N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF,
-/* -v-N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF,
-/* -v-N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF,
-/* -v-N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF,
-/* -v-NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -v-NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -v-NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -v-NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
-/* -vU---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vU---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vU--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vU--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vU-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vU-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vU-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vU-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* -vUNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
-/* u------ */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
-/* u-----C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
-/* u----V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_LUF,
-/* u----VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_LUF,
-/* u---Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u---Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u---ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u---ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u--N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
-/* u--N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
-/* u--N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF,
-/* u--N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF,
-/* u--NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u--NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u--NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u--NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
-/* u-U---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-U---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-U--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-U--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-U-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-U-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-U-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-U-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* u-UNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
-/* uv----- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_LUF,
-/* uv----C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_LUF,
-/* uv---V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_LUF,
-/* uv---VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_LUF,
-/* uv--Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uv--Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uv--ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uv--ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uv-N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF,
-/* uv-N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF,
-/* uv-N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF,
-/* uv-N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF,
-/* uv-NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uv-NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uv-NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uv-NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
-/* uvU---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvU---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvU--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvU--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvU-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvU-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvU-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvU-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
-/* uvUNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* ------- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
+/* ------C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_NLUF,
+/* -----V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_NLUF,
+/* -----VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_NLUF,
+/* ----Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* ----Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* ----ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* ----ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* ---N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
+/* ---N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF,
+/* ---N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF,
+/* ---N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF,
+/* ---NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* ---NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* ---NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* ---NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_NLUF | C_ZUF,
+/* --U---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --U---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --U--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --U--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --U-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --U-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --U-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --U-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* --UNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_NLUF | C_ZUF,
+/* -v----- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_NLUF,
+/* -v----C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_NLUF,
+/* -v---V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_NLUF,
+/* -v---VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_NLUF,
+/* -v--Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -v--Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -v--ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -v--ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -v-N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF,
+/* -v-N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF,
+/* -v-N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF,
+/* -v-N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF,
+/* -v-NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -v-NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -v-NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -v-NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_NLUF | C_ZUF,
+/* -vU---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vU---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vU--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vU--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vU-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vU-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vU-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vU-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* -vUNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_NLUF | C_ZUF,
+/* u------ */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
+/* u-----C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_NLV | C_LUF,
+/* u----V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_LUF,
+/* u----VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_NLV | C_LUF,
+/* u---Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u---Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u---ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u---ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u--N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
+/* u--N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF,
+/* u--N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF,
+/* u--N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF,
+/* u--NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u--NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u--NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u--NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_NLV | C_LUF | C_ZUF,
+/* u-U---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-U---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-U--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-U--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-U-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-U-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-U-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-U-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* u-UNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_NLV | C_LUF | C_ZUF,
+/* uv----- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_LUF,
+/* uv----C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_NUF | C_LV | C_LUF,
+/* uv---V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_LUF,
+/* uv---VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_NUF | C_LV | C_LUF,
+/* uv--Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uv--Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uv--ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uv--ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uv-N--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF,
+/* uv-N--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF,
+/* uv-N-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF,
+/* uv-N-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF,
+/* uv-NZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uv-NZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uv-NZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uv-NZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_NUF | C_LV | C_LUF | C_ZUF,
+/* uvU---- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvU---C */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvU--V- */ 1 | C_HI | C_HS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvU--VC */ 1 | C_LO | C_LS | C_NE | C_GT | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvU-Z-- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvU-Z-C */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvU-ZV- */ 1 | C_LS | C_HS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvU-ZVC */ 1 | C_LO | C_LS | C_EQ | C_LE | C_GE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUN--- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUN--C */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUN-V- */ 1 | C_HI | C_HS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUN-VC */ 1 | C_LO | C_LS | C_NE | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUNZ-- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUNZ-C */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_NV | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUNZV- */ 1 | C_LS | C_HS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
+/* uvUNZVC */ 1 | C_LO | C_LS | C_EQ | C_LT | C_LE | C_V | C_UF | C_LV | C_LUF | C_ZUF,
};
-#define CONDITION_LO() (IREG(TMR_ST) & CFLAG)
-#define CONDITION_LS() (IREG(TMR_ST) & (CFLAG | ZFLAG))
-#define CONDITION_HI() (!(IREG(TMR_ST) & (CFLAG | ZFLAG)))
-#define CONDITION_HS() (!(IREG(TMR_ST) & CFLAG))
-#define CONDITION_EQ() (IREG(TMR_ST) & ZFLAG)
-#define CONDITION_NE() (!(IREG(TMR_ST) & ZFLAG))
-#define CONDITION_LT() (IREG(TMR_ST) & NFLAG)
-#define CONDITION_LE() (IREG(TMR_ST) & (NFLAG | ZFLAG))
-#define CONDITION_GT() (!(IREG(TMR_ST) & (NFLAG | ZFLAG)))
-#define CONDITION_GE() (!(IREG(TMR_ST) & NFLAG))
-#define CONDITION_NV() (!(IREG(TMR_ST) & VFLAG))
-#define CONDITION_V() (IREG(TMR_ST) & VFLAG)
-#define CONDITION_NUF() (!(IREG(TMR_ST) & UFFLAG))
-#define CONDITION_UF() (IREG(TMR_ST) & UFFLAG)
-#define CONDITION_NLV() (!(IREG(TMR_ST) & LVFLAG))
-#define CONDITION_LV() (IREG(TMR_ST) & LVFLAG)
-#define CONDITION_NLUF() (!(IREG(TMR_ST) & LUFFLAG))
-#define CONDITION_LUF() (IREG(TMR_ST) & LUFFLAG)
-#define CONDITION_ZUF() (IREG(TMR_ST) & (UFFLAG | ZFLAG))
+#define CONDITION_LO() (IREG(TMR_ST) & CFLAG)
+#define CONDITION_LS() (IREG(TMR_ST) & (CFLAG | ZFLAG))
+#define CONDITION_HI() (!(IREG(TMR_ST) & (CFLAG | ZFLAG)))
+#define CONDITION_HS() (!(IREG(TMR_ST) & CFLAG))
+#define CONDITION_EQ() (IREG(TMR_ST) & ZFLAG)
+#define CONDITION_NE() (!(IREG(TMR_ST) & ZFLAG))
+#define CONDITION_LT() (IREG(TMR_ST) & NFLAG)
+#define CONDITION_LE() (IREG(TMR_ST) & (NFLAG | ZFLAG))
+#define CONDITION_GT() (!(IREG(TMR_ST) & (NFLAG | ZFLAG)))
+#define CONDITION_GE() (!(IREG(TMR_ST) & NFLAG))
+#define CONDITION_NV() (!(IREG(TMR_ST) & VFLAG))
+#define CONDITION_V() (IREG(TMR_ST) & VFLAG)
+#define CONDITION_NUF() (!(IREG(TMR_ST) & UFFLAG))
+#define CONDITION_UF() (IREG(TMR_ST) & UFFLAG)
+#define CONDITION_NLV() (!(IREG(TMR_ST) & LVFLAG))
+#define CONDITION_LV() (IREG(TMR_ST) & LVFLAG)
+#define CONDITION_NLUF() (!(IREG(TMR_ST) & LUFFLAG))
+#define CONDITION_LUF() (IREG(TMR_ST) & LUFFLAG)
+#define CONDITION_ZUF() (IREG(TMR_ST) & (UFFLAG | ZFLAG))
inline bool tms3203x_device::condition(int which)
{
@@ -1432,18 +1432,18 @@ UINT32 tms3203x_device::modillegal_def(UINT32 op, UINT8 ar, UINT32 *&defptrptr)
/*-----------------------------------------------------*/
-#define ABSF(dreg, sreg) \
-{ \
- INT32 man = FREGMAN(sreg); \
- CLR_NZVUF(); \
- m_r[dreg] = m_r[sreg]; \
- if (man < 0) \
- { \
- m_r[dreg].set_mantissa(~man); \
- if (man == (INT32)0x80000000 && FREGEXP(sreg) == 127) \
- IREG(TMR_ST) |= VFLAG | LVFLAG; \
- } \
- OR_NZF(m_r[dreg]); \
+#define ABSF(dreg, sreg) \
+{ \
+ INT32 man = FREGMAN(sreg); \
+ CLR_NZVUF(); \
+ m_r[dreg] = m_r[sreg]; \
+ if (man < 0) \
+ { \
+ m_r[dreg].set_mantissa(~man); \
+ if (man == (INT32)0x80000000 && FREGEXP(sreg) == 127) \
+ IREG(TMR_ST) |= VFLAG | LVFLAG; \
+ } \
+ OR_NZF(m_r[dreg]); \
}
void tms3203x_device::absf_reg(UINT32 op)
@@ -1478,22 +1478,22 @@ void tms3203x_device::absf_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define ABSI(dreg, src) \
-{ \
- UINT32 _res = ((INT32)src < 0) ? -src : src; \
- if (!OVM() || _res != 0x80000000) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = 0x7fffffff; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ(_res); \
- if (_res == 0x80000000) \
- IREG(TMR_ST) |= VFLAG | LVFLAG; \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define ABSI(dreg, src) \
+{ \
+ UINT32 _res = ((INT32)src < 0) ? -src : src; \
+ if (!OVM() || _res != 0x80000000) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ(_res); \
+ if (_res == 0x80000000) \
+ IREG(TMR_ST) |= VFLAG | LVFLAG; \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::absi_reg(UINT32 op)
@@ -1526,23 +1526,23 @@ void tms3203x_device::absi_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define ADDC(dreg, src1, src2) \
-{ \
- UINT32 _res = src1 + src2 + (IREG(TMR_ST) & CFLAG); \
- if (!OVM() || !OVERFLOW_ADD(src1,src2,_res)) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
- if (dreg < 8) \
- { \
- UINT32 tempc = IREG(TMR_ST) & CFLAG; \
- CLR_NZCVUF(); \
- OR_C_ADC(src1,src2,tempc); \
- OR_V_ADD(src1,src2,_res); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define ADDC(dreg, src1, src2) \
+{ \
+ UINT32 _res = src1 + src2 + (IREG(TMR_ST) & CFLAG); \
+ if (!OVM() || !OVERFLOW_ADD(src1,src2,_res)) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ UINT32 tempc = IREG(TMR_ST) & CFLAG; \
+ CLR_NZCVUF(); \
+ OR_C_ADC(src1,src2,tempc); \
+ OR_V_ADD(src1,src2,_res); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::addc_reg(UINT32 op)
@@ -1610,22 +1610,22 @@ void tms3203x_device::addf_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define ADDI(dreg, src1, src2) \
-{ \
- UINT32 _res = src1 + src2; \
- if (!OVM() || !OVERFLOW_ADD(src1,src2,_res)) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
- if (dreg < 8) \
- { \
- CLR_NZCVUF(); \
- OR_C_ADD(src1,src2,_res); \
- OR_V_ADD(src1,src2,_res); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define ADDI(dreg, src1, src2) \
+{ \
+ UINT32 _res = src1 + src2; \
+ if (!OVM() || !OVERFLOW_ADD(src1,src2,_res)) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ CLR_NZCVUF(); \
+ OR_C_ADD(src1,src2,_res); \
+ OR_V_ADD(src1,src2,_res); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::addi_reg(UINT32 op)
@@ -1662,17 +1662,17 @@ void tms3203x_device::addi_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define AND(dreg, src1, src2) \
-{ \
- UINT32 _res = (src1) & (src2); \
- IREG(dreg) = _res; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define AND(dreg, src1, src2) \
+{ \
+ UINT32 _res = (src1) & (src2); \
+ IREG(dreg) = _res; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::and_reg(UINT32 op)
@@ -1709,17 +1709,17 @@ void tms3203x_device::and_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define ANDN(dreg, src1, src2) \
-{ \
- UINT32 _res = (src1) & ~(src2); \
- IREG(dreg) = _res; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define ANDN(dreg, src1, src2) \
+{ \
+ UINT32 _res = (src1) & ~(src2); \
+ IREG(dreg) = _res; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::andn_reg(UINT32 op)
@@ -1756,44 +1756,44 @@ void tms3203x_device::andn_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define ASH(dreg, src, count) \
-{ \
- UINT32 _res; \
- INT32 _count = (INT16)(count << 9) >> 9; /* 7 LSBs */ \
- if (_count < 0) \
- { \
- if (_count >= -31) \
- _res = (INT32)src >> -_count; \
- else \
- _res = (INT32)src >> 31; \
- } \
- else \
- { \
- if (_count <= 31) \
- _res = (INT32)src << _count; \
- else \
- _res = 0; \
- } \
- IREG(dreg) = _res; \
- if (dreg < 8) \
- { \
- CLR_NZCVUF(); \
- OR_NZ(_res); \
- if (_count < 0) \
- { \
- if (_count >= -32) \
- OR_C(((INT32)src >> (-_count - 1)) & 1); \
- else \
- OR_C(((INT32)src >> 31) & 1); \
- } \
- else if (_count > 0) \
- { \
- if (_count <= 32) \
- OR_C(((UINT32)src << (_count - 1)) >> 31); \
- } \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define ASH(dreg, src, count) \
+{ \
+ UINT32 _res; \
+ INT32 _count = (INT16)(count << 9) >> 9; /* 7 LSBs */ \
+ if (_count < 0) \
+ { \
+ if (_count >= -31) \
+ _res = (INT32)src >> -_count; \
+ else \
+ _res = (INT32)src >> 31; \
+ } \
+ else \
+ { \
+ if (_count <= 31) \
+ _res = (INT32)src << _count; \
+ else \
+ _res = 0; \
+ } \
+ IREG(dreg) = _res; \
+ if (dreg < 8) \
+ { \
+ CLR_NZCVUF(); \
+ OR_NZ(_res); \
+ if (_count < 0) \
+ { \
+ if (_count >= -32) \
+ OR_C(((INT32)src >> (-_count - 1)) & 1); \
+ else \
+ OR_C(((INT32)src >> 31) & 1); \
+ } \
+ else if (_count > 0) \
+ { \
+ if (_count <= 32) \
+ OR_C(((UINT32)src << (_count - 1)) >> 31); \
+ } \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::ash_reg(UINT32 op)
@@ -1861,13 +1861,13 @@ void tms3203x_device::cmpf_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define CMPI(src1, src2) \
-{ \
- UINT32 _res = src1 - src2; \
- CLR_NZCVUF(); \
- OR_C_SUB(src1,src2,_res); \
- OR_V_SUB(src1,src2,_res); \
- OR_NZ(_res); \
+#define CMPI(src1, src2) \
+{ \
+ UINT32 _res = src1 - src2; \
+ CLR_NZCVUF(); \
+ OR_C_SUB(src1,src2,_res); \
+ OR_V_SUB(src1,src2,_res); \
+ OR_NZ(_res); \
}
void tms3203x_device::cmpi_reg(UINT32 op)
@@ -1936,10 +1936,10 @@ void tms3203x_device::fix_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define FLOAT(dreg, src) \
-{ \
- IREG(dreg) = src; \
- int2float(m_r[dreg]); \
+#define FLOAT(dreg, src) \
+{ \
+ IREG(dreg) = src; \
+ int2float(m_r[dreg]); \
}
void tms3203x_device::float_reg(UINT32 op)
@@ -2063,16 +2063,16 @@ void tms3203x_device::ldfi_ind(UINT32 op) { unimplemented(op); }
/*-----------------------------------------------------*/
-#define LDI(dreg, src) \
-{ \
- IREG(dreg) = src; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ(src); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define LDI(dreg, src) \
+{ \
+ IREG(dreg) = src; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ(src); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::ldi_reg(UINT32 op)
@@ -2139,42 +2139,42 @@ void tms3203x_device::ldm_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define LSH(dreg, src, count) \
-{ \
- UINT32 _res; \
- INT32 _count = (INT16)(count << 9) >> 9; /* 7 LSBs */ \
- if (_count < 0) \
- { \
- if (_count >= -31) \
- _res = (UINT32)src >> -_count; \
- else \
- _res = 0; \
- } \
- else \
- { \
- if (_count <= 31) \
- _res = (UINT32)src << _count; \
- else \
- _res = 0; \
- } \
- IREG(dreg) = _res; \
- if (dreg < 8) \
- { \
- CLR_NZCVUF(); \
- OR_NZ(_res); \
- if (_count < 0) \
- { \
- if (_count >= -32) \
- OR_C(((UINT32)src >> (-_count - 1)) & 1); \
- } \
- else if (_count > 0) \
- { \
- if (_count <= 32) \
- OR_C(((UINT32)src << (_count - 1)) >> 31); \
- } \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define LSH(dreg, src, count) \
+{ \
+ UINT32 _res; \
+ INT32 _count = (INT16)(count << 9) >> 9; /* 7 LSBs */ \
+ if (_count < 0) \
+ { \
+ if (_count >= -31) \
+ _res = (UINT32)src >> -_count; \
+ else \
+ _res = 0; \
+ } \
+ else \
+ { \
+ if (_count <= 31) \
+ _res = (UINT32)src << _count; \
+ else \
+ _res = 0; \
+ } \
+ IREG(dreg) = _res; \
+ if (dreg < 8) \
+ { \
+ CLR_NZCVUF(); \
+ OR_NZ(_res); \
+ if (_count < 0) \
+ { \
+ if (_count >= -32) \
+ OR_C(((UINT32)src >> (-_count - 1)) & 1); \
+ } \
+ else if (_count > 0) \
+ { \
+ if (_count <= 32) \
+ OR_C(((UINT32)src << (_count - 1)) >> 31); \
+ } \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::lsh_reg(UINT32 op)
@@ -2242,22 +2242,22 @@ void tms3203x_device::mpyf_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define MPYI(dreg, src1, src2) \
-{ \
+#define MPYI(dreg, src1, src2) \
+{ \
INT64 _res = (INT64)((INT32)(src1 << 8) >> 8) * (INT64)((INT32)(src2 << 8) >> 8);\
- if (!OVM() || (_res >= -(INT64)0x80000000 && _res <= (INT64)0x7fffffff)) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = (_res < 0) ? 0x80000000 : 0x7fffffff; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ((UINT32)_res); \
- if (_res < -(INT64)0x80000000 || _res > (INT64)0x7fffffff) \
- IREG(TMR_ST) |= VFLAG | LVFLAG; \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+ if (!OVM() || (_res >= -(INT64)0x80000000 && _res <= (INT64)0x7fffffff)) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = (_res < 0) ? 0x80000000 : 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ((UINT32)_res); \
+ if (_res < -(INT64)0x80000000 || _res > (INT64)0x7fffffff) \
+ IREG(TMR_ST) |= VFLAG | LVFLAG; \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::mpyi_reg(UINT32 op)
@@ -2294,23 +2294,23 @@ void tms3203x_device::mpyi_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define NEGB(dreg, src) \
-{ \
- UINT32 _res = 0 - src - (IREG(TMR_ST) & CFLAG); \
- if (!OVM() || !OVERFLOW_SUB(0,src,_res)) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
- if (dreg < 8) \
- { \
- UINT32 tempc = IREG(TMR_ST) & CFLAG; \
- CLR_NZCVUF(); \
- OR_C_SBB(0,src,tempc); \
- OR_V_SUB(0,src,_res); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define NEGB(dreg, src) \
+{ \
+ UINT32 _res = 0 - src - (IREG(TMR_ST) & CFLAG); \
+ if (!OVM() || !OVERFLOW_SUB(0,src,_res)) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ UINT32 tempc = IREG(TMR_ST) & CFLAG; \
+ CLR_NZCVUF(); \
+ OR_C_SBB(0,src,tempc); \
+ OR_V_SUB(0,src,_res); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::negb_reg(UINT32 op)
@@ -2374,22 +2374,22 @@ void tms3203x_device::negf_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define NEGI(dreg, src) \
-{ \
- UINT32 _res = 0 - src; \
- if (!OVM() || !OVERFLOW_SUB(0,src,_res)) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
- if (dreg < 8) \
- { \
- CLR_NZCVUF(); \
- OR_C_SUB(0,src,_res); \
- OR_V_SUB(0,src,_res); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define NEGI(dreg, src) \
+{ \
+ UINT32 _res = 0 - src; \
+ if (!OVM() || !OVERFLOW_SUB(0,src,_res)) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = ((INT32)src < 0) ? 0x80000000 : 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ CLR_NZCVUF(); \
+ OR_C_SUB(0,src,_res); \
+ OR_V_SUB(0,src,_res); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::negi_reg(UINT32 op)
@@ -2464,17 +2464,17 @@ void tms3203x_device::norm_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define NOT(dreg, src) \
-{ \
- UINT32 _res = ~(src); \
- IREG(dreg) = _res; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define NOT(dreg, src) \
+{ \
+ UINT32 _res = ~(src); \
+ IREG(dreg) = _res; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::not_reg(UINT32 op)
@@ -2543,17 +2543,17 @@ void tms3203x_device::pushf(UINT32 op)
/*-----------------------------------------------------*/
-#define OR(dreg, src1, src2) \
-{ \
- UINT32 _res = (src1) | (src2); \
- IREG(dreg) = _res; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define OR(dreg, src1, src2) \
+{ \
+ UINT32 _res = (src1) | (src2); \
+ IREG(dreg) = _res; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::or_reg(UINT32 op)
@@ -2594,26 +2594,26 @@ void tms3203x_device::maxspeed(UINT32 op) { unimplemented(op); }
/*-----------------------------------------------------*/
-#define RND(dreg) \
-{ \
- INT32 man = FREGMAN(dreg); \
- CLR_NVUF(); \
- if (man < 0x7fffff80) \
- { \
- m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0xffffff00); \
- OR_NUF(m_r[dreg]); \
- } \
- else if (FREGEXP(dreg) < 127) \
- { \
- m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0x7fffff00); \
- m_r[dreg].set_exponent(FREGEXP(dreg) + 1); \
- OR_NUF(m_r[dreg]); \
- } \
- else \
- { \
- m_r[dreg].set_mantissa(0x7fffff00); \
- IREG(TMR_ST) |= VFLAG | LVFLAG; \
- } \
+#define RND(dreg) \
+{ \
+ INT32 man = FREGMAN(dreg); \
+ CLR_NVUF(); \
+ if (man < 0x7fffff80) \
+ { \
+ m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0xffffff00); \
+ OR_NUF(m_r[dreg]); \
+ } \
+ else if (FREGEXP(dreg) < 127) \
+ { \
+ m_r[dreg].set_mantissa(((UINT32)man + 0x80) & 0x7fffff00); \
+ m_r[dreg].set_exponent(FREGEXP(dreg) + 1); \
+ OR_NUF(m_r[dreg]); \
+ } \
+ else \
+ { \
+ m_r[dreg].set_mantissa(0x7fffff00); \
+ IREG(TMR_ST) |= VFLAG | LVFLAG; \
+ } \
}
void tms3203x_device::rnd_reg(UINT32 op)
@@ -2799,23 +2799,23 @@ void tms3203x_device::sigi(UINT32 op) { unimplemented(op); }
/*-----------------------------------------------------*/
-#define SUBB(dreg, src1, src2) \
-{ \
- UINT32 _res = src1 - src2 - (IREG(TMR_ST) & CFLAG); \
- if (!OVM() || !OVERFLOW_SUB(src1,src2,_res)) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
- if (dreg < 8) \
- { \
- UINT32 tempc = IREG(TMR_ST) & CFLAG; \
- CLR_NZCVUF(); \
- OR_C_SBB(src1,src2,tempc); \
- OR_V_SUB(src1,src2,_res); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define SUBB(dreg, src1, src2) \
+{ \
+ UINT32 _res = src1 - src2 - (IREG(TMR_ST) & CFLAG); \
+ if (!OVM() || !OVERFLOW_SUB(src1,src2,_res)) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ UINT32 tempc = IREG(TMR_ST) & CFLAG; \
+ CLR_NZCVUF(); \
+ OR_C_SBB(src1,src2,tempc); \
+ OR_V_SUB(src1,src2,_res); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::subb_reg(UINT32 op)
@@ -2852,15 +2852,15 @@ void tms3203x_device::subb_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define SUBC(dreg, src) \
-{ \
- UINT32 dst = IREG(dreg); \
- if (dst >= src) \
- IREG(dreg) = ((dst - src) << 1) | 1; \
- else \
- IREG(dreg) = dst << 1; \
- if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define SUBC(dreg, src) \
+{ \
+ UINT32 dst = IREG(dreg); \
+ if (dst >= src) \
+ IREG(dreg) = ((dst - src) << 1) | 1; \
+ else \
+ IREG(dreg) = dst << 1; \
+ if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::subc_reg(UINT32 op)
@@ -2924,22 +2924,22 @@ void tms3203x_device::subf_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define SUBI(dreg, src1, src2) \
-{ \
- UINT32 _res = src1 - src2; \
- if (!OVM() || !OVERFLOW_SUB(src1,src2,_res)) \
- IREG(dreg) = _res; \
- else \
- IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
- if (dreg < 8) \
- { \
- CLR_NZCVUF(); \
- OR_C_SUB(src1,src2,_res); \
- OR_V_SUB(src1,src2,_res); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define SUBI(dreg, src1, src2) \
+{ \
+ UINT32 _res = src1 - src2; \
+ if (!OVM() || !OVERFLOW_SUB(src1,src2,_res)) \
+ IREG(dreg) = _res; \
+ else \
+ IREG(dreg) = ((INT32)src1 < 0) ? 0x80000000 : 0x7fffffff; \
+ if (dreg < 8) \
+ { \
+ CLR_NZCVUF(); \
+ OR_C_SUB(src1,src2,_res); \
+ OR_V_SUB(src1,src2,_res); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::subi_reg(UINT32 op)
@@ -3075,11 +3075,11 @@ void tms3203x_device::subri_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define TSTB(src1, src2) \
-{ \
- UINT32 _res = (src1) & (src2); \
- CLR_NZVUF(); \
- OR_NZ(_res); \
+#define TSTB(src1, src2) \
+{ \
+ UINT32 _res = (src1) & (src2); \
+ CLR_NZVUF(); \
+ OR_NZ(_res); \
}
void tms3203x_device::tstb_reg(UINT32 op)
@@ -3112,17 +3112,17 @@ void tms3203x_device::tstb_imm(UINT32 op)
/*-----------------------------------------------------*/
-#define XOR(dreg, src1, src2) \
-{ \
- UINT32 _res = (src1) ^ (src2); \
- IREG(dreg) = _res; \
- if (dreg < 8) \
- { \
- CLR_NZVUF(); \
- OR_NZ(_res); \
- } \
- else if (dreg >= TMR_BK) \
- update_special(dreg); \
+#define XOR(dreg, src1, src2) \
+{ \
+ UINT32 _res = (src1) ^ (src2); \
+ IREG(dreg) = _res; \
+ if (dreg < 8) \
+ { \
+ CLR_NZVUF(); \
+ OR_NZ(_res); \
+ } \
+ else if (dreg >= TMR_BK) \
+ update_special(dreg); \
}
void tms3203x_device::xor_reg(UINT32 op)
@@ -6364,561 +6364,561 @@ void tms3203x_device::xor3sti(UINT32 op)
UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_d[0x20])(UINT32, UINT8) =
{
- &tms3203x_device::mod00_d, &tms3203x_device::mod01_d, &tms3203x_device::mod02_d, &tms3203x_device::mod03_d,
- &tms3203x_device::mod04_d, &tms3203x_device::mod05_d, &tms3203x_device::mod06_d, &tms3203x_device::mod07_d,
- &tms3203x_device::mod08, &tms3203x_device::mod09, &tms3203x_device::mod0a, &tms3203x_device::mod0b,
- &tms3203x_device::mod0c, &tms3203x_device::mod0d, &tms3203x_device::mod0e, &tms3203x_device::mod0f,
- &tms3203x_device::mod10, &tms3203x_device::mod11, &tms3203x_device::mod12, &tms3203x_device::mod13,
- &tms3203x_device::mod14, &tms3203x_device::mod15, &tms3203x_device::mod16, &tms3203x_device::mod17,
- &tms3203x_device::mod18, &tms3203x_device::mod19, &tms3203x_device::modillegal, &tms3203x_device::modillegal,
- &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal
+ &tms3203x_device::mod00_d, &tms3203x_device::mod01_d, &tms3203x_device::mod02_d, &tms3203x_device::mod03_d,
+ &tms3203x_device::mod04_d, &tms3203x_device::mod05_d, &tms3203x_device::mod06_d, &tms3203x_device::mod07_d,
+ &tms3203x_device::mod08, &tms3203x_device::mod09, &tms3203x_device::mod0a, &tms3203x_device::mod0b,
+ &tms3203x_device::mod0c, &tms3203x_device::mod0d, &tms3203x_device::mod0e, &tms3203x_device::mod0f,
+ &tms3203x_device::mod10, &tms3203x_device::mod11, &tms3203x_device::mod12, &tms3203x_device::mod13,
+ &tms3203x_device::mod14, &tms3203x_device::mod15, &tms3203x_device::mod16, &tms3203x_device::mod17,
+ &tms3203x_device::mod18, &tms3203x_device::mod19, &tms3203x_device::modillegal, &tms3203x_device::modillegal,
+ &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal
};
UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1[0x20])(UINT32, UINT8) =
{
- &tms3203x_device::mod00_1, &tms3203x_device::mod01_1, &tms3203x_device::mod02_1, &tms3203x_device::mod03_1,
- &tms3203x_device::mod04_1, &tms3203x_device::mod05_1, &tms3203x_device::mod06_1, &tms3203x_device::mod07_1,
- &tms3203x_device::mod08, &tms3203x_device::mod09, &tms3203x_device::mod0a, &tms3203x_device::mod0b,
- &tms3203x_device::mod0c, &tms3203x_device::mod0d, &tms3203x_device::mod0e, &tms3203x_device::mod0f,
- &tms3203x_device::mod10, &tms3203x_device::mod11, &tms3203x_device::mod12, &tms3203x_device::mod13,
- &tms3203x_device::mod14, &tms3203x_device::mod15, &tms3203x_device::mod16, &tms3203x_device::mod17,
- &tms3203x_device::mod18, &tms3203x_device::mod19, &tms3203x_device::modillegal, &tms3203x_device::modillegal,
- &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal
+ &tms3203x_device::mod00_1, &tms3203x_device::mod01_1, &tms3203x_device::mod02_1, &tms3203x_device::mod03_1,
+ &tms3203x_device::mod04_1, &tms3203x_device::mod05_1, &tms3203x_device::mod06_1, &tms3203x_device::mod07_1,
+ &tms3203x_device::mod08, &tms3203x_device::mod09, &tms3203x_device::mod0a, &tms3203x_device::mod0b,
+ &tms3203x_device::mod0c, &tms3203x_device::mod0d, &tms3203x_device::mod0e, &tms3203x_device::mod0f,
+ &tms3203x_device::mod10, &tms3203x_device::mod11, &tms3203x_device::mod12, &tms3203x_device::mod13,
+ &tms3203x_device::mod14, &tms3203x_device::mod15, &tms3203x_device::mod16, &tms3203x_device::mod17,
+ &tms3203x_device::mod18, &tms3203x_device::mod19, &tms3203x_device::modillegal, &tms3203x_device::modillegal,
+ &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal, &tms3203x_device::modillegal
};
UINT32 (tms3203x_device::*const tms3203x_device::s_indirect_1_def[0x20])(UINT32, UINT8, UINT32 *&) =
{
- &tms3203x_device::mod00_1_def, &tms3203x_device::mod01_1_def, &tms3203x_device::mod02_1_def, &tms3203x_device::mod03_1_def,
- &tms3203x_device::mod04_1_def, &tms3203x_device::mod05_1_def, &tms3203x_device::mod06_1_def, &tms3203x_device::mod07_1_def,
- &tms3203x_device::mod08_def, &tms3203x_device::mod09_def, &tms3203x_device::mod0a_def, &tms3203x_device::mod0b_def,
- &tms3203x_device::mod0c_def, &tms3203x_device::mod0d_def, &tms3203x_device::mod0e_def, &tms3203x_device::mod0f_def,
- &tms3203x_device::mod10_def, &tms3203x_device::mod11_def, &tms3203x_device::mod12_def, &tms3203x_device::mod13_def,
- &tms3203x_device::mod14_def, &tms3203x_device::mod15_def, &tms3203x_device::mod16_def, &tms3203x_device::mod17_def,
- &tms3203x_device::mod18_def, &tms3203x_device::mod19_def, &tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,
+ &tms3203x_device::mod00_1_def, &tms3203x_device::mod01_1_def, &tms3203x_device::mod02_1_def, &tms3203x_device::mod03_1_def,
+ &tms3203x_device::mod04_1_def, &tms3203x_device::mod05_1_def, &tms3203x_device::mod06_1_def, &tms3203x_device::mod07_1_def,
+ &tms3203x_device::mod08_def, &tms3203x_device::mod09_def, &tms3203x_device::mod0a_def, &tms3203x_device::mod0b_def,
+ &tms3203x_device::mod0c_def, &tms3203x_device::mod0d_def, &tms3203x_device::mod0e_def, &tms3203x_device::mod0f_def,
+ &tms3203x_device::mod10_def, &tms3203x_device::mod11_def, &tms3203x_device::mod12_def, &tms3203x_device::mod13_def,
+ &tms3203x_device::mod14_def, &tms3203x_device::mod15_def, &tms3203x_device::mod16_def, &tms3203x_device::mod17_def,
+ &tms3203x_device::mod18_def, &tms3203x_device::mod19_def, &tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,
&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def,&tms3203x_device::modillegal_def
};
void (tms3203x_device::*const tms3203x_device::s_tms32031ops[])(UINT32 op) =
{
- &tms3203x_device::absf_reg, &tms3203x_device::absf_dir, &tms3203x_device::absf_ind, &tms3203x_device::absf_imm, // 0x00
- &tms3203x_device::absi_reg, &tms3203x_device::absi_dir, &tms3203x_device::absi_ind, &tms3203x_device::absi_imm,
- &tms3203x_device::addc_reg, &tms3203x_device::addc_dir, &tms3203x_device::addc_ind, &tms3203x_device::addc_imm,
- &tms3203x_device::addf_reg, &tms3203x_device::addf_dir, &tms3203x_device::addf_ind, &tms3203x_device::addf_imm,
- &tms3203x_device::addi_reg, &tms3203x_device::addi_dir, &tms3203x_device::addi_ind, &tms3203x_device::addi_imm,
- &tms3203x_device::and_reg, &tms3203x_device::and_dir, &tms3203x_device::and_ind, &tms3203x_device::and_imm,
- &tms3203x_device::andn_reg, &tms3203x_device::andn_dir, &tms3203x_device::andn_ind, &tms3203x_device::andn_imm,
- &tms3203x_device::ash_reg, &tms3203x_device::ash_dir, &tms3203x_device::ash_ind, &tms3203x_device::ash_imm,
- &tms3203x_device::cmpf_reg, &tms3203x_device::cmpf_dir, &tms3203x_device::cmpf_ind, &tms3203x_device::cmpf_imm, // 0x08
- &tms3203x_device::cmpi_reg, &tms3203x_device::cmpi_dir, &tms3203x_device::cmpi_ind, &tms3203x_device::cmpi_imm,
- &tms3203x_device::fix_reg, &tms3203x_device::fix_dir, &tms3203x_device::fix_ind, &tms3203x_device::fix_imm,
- &tms3203x_device::float_reg, &tms3203x_device::float_dir, &tms3203x_device::float_ind, &tms3203x_device::float_imm,
- &tms3203x_device::idle, &tms3203x_device::idle, &tms3203x_device::idle, &tms3203x_device::idle,
- &tms3203x_device::lde_reg, &tms3203x_device::lde_dir, &tms3203x_device::lde_ind, &tms3203x_device::lde_imm,
- &tms3203x_device::ldf_reg, &tms3203x_device::ldf_dir, &tms3203x_device::ldf_ind, &tms3203x_device::ldf_imm,
- &tms3203x_device::illegal, &tms3203x_device::ldfi_dir, &tms3203x_device::ldfi_ind, &tms3203x_device::illegal,
- &tms3203x_device::ldi_reg, &tms3203x_device::ldi_dir, &tms3203x_device::ldi_ind, &tms3203x_device::ldi_imm, // 0x10
- &tms3203x_device::illegal, &tms3203x_device::ldii_dir, &tms3203x_device::ldii_ind, &tms3203x_device::illegal,
- &tms3203x_device::ldm_reg, &tms3203x_device::ldm_dir, &tms3203x_device::ldm_ind, &tms3203x_device::ldm_imm,
- &tms3203x_device::lsh_reg, &tms3203x_device::lsh_dir, &tms3203x_device::lsh_ind, &tms3203x_device::lsh_imm,
- &tms3203x_device::mpyf_reg, &tms3203x_device::mpyf_dir, &tms3203x_device::mpyf_ind, &tms3203x_device::mpyf_imm,
- &tms3203x_device::mpyi_reg, &tms3203x_device::mpyi_dir, &tms3203x_device::mpyi_ind, &tms3203x_device::mpyi_imm,
- &tms3203x_device::negb_reg, &tms3203x_device::negb_dir, &tms3203x_device::negb_ind, &tms3203x_device::negb_imm,
- &tms3203x_device::negf_reg, &tms3203x_device::negf_dir, &tms3203x_device::negf_ind, &tms3203x_device::negf_imm,
- &tms3203x_device::negi_reg, &tms3203x_device::negi_dir, &tms3203x_device::negi_ind, &tms3203x_device::negi_imm, // 0x18
- &tms3203x_device::nop_reg, &tms3203x_device::illegal, &tms3203x_device::nop_ind, &tms3203x_device::illegal,
- &tms3203x_device::norm_reg, &tms3203x_device::norm_dir, &tms3203x_device::norm_ind, &tms3203x_device::norm_imm,
- &tms3203x_device::not_reg, &tms3203x_device::not_dir, &tms3203x_device::not_ind, &tms3203x_device::not_imm,
- &tms3203x_device::illegal, &tms3203x_device::pop, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::popf, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::push, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::pushf, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::or_reg, &tms3203x_device::or_dir, &tms3203x_device::or_ind, &tms3203x_device::or_imm, // 0x20
- &tms3203x_device::maxspeed, &tms3203x_device::maxspeed, &tms3203x_device::maxspeed, &tms3203x_device::maxspeed,
- &tms3203x_device::rnd_reg, &tms3203x_device::rnd_dir, &tms3203x_device::rnd_ind, &tms3203x_device::rnd_imm,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::rol,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::rolc,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::ror,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::rorc,
- &tms3203x_device::rtps_reg, &tms3203x_device::rtps_dir, &tms3203x_device::rtps_ind, &tms3203x_device::rtps_imm,
- &tms3203x_device::illegal, &tms3203x_device::stf_dir, &tms3203x_device::stf_ind, &tms3203x_device::illegal, // 0x28
- &tms3203x_device::illegal, &tms3203x_device::stfi_dir, &tms3203x_device::stfi_ind, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::sti_dir, &tms3203x_device::sti_ind, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::stii_dir, &tms3203x_device::stii_ind, &tms3203x_device::illegal,
- &tms3203x_device::sigi, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::subb_reg, &tms3203x_device::subb_dir, &tms3203x_device::subb_ind, &tms3203x_device::subb_imm,
- &tms3203x_device::subc_reg, &tms3203x_device::subc_dir, &tms3203x_device::subc_ind, &tms3203x_device::subc_imm,
- &tms3203x_device::subf_reg, &tms3203x_device::subf_dir, &tms3203x_device::subf_ind, &tms3203x_device::subf_imm,
- &tms3203x_device::subi_reg, &tms3203x_device::subi_dir, &tms3203x_device::subi_ind, &tms3203x_device::subi_imm, // 0x30
- &tms3203x_device::subrb_reg, &tms3203x_device::subrb_dir, &tms3203x_device::subrb_ind, &tms3203x_device::subrb_imm,
- &tms3203x_device::subrf_reg, &tms3203x_device::subrf_dir, &tms3203x_device::subrf_ind, &tms3203x_device::subrf_imm,
- &tms3203x_device::subri_reg, &tms3203x_device::subri_dir, &tms3203x_device::subri_ind, &tms3203x_device::subri_imm,
- &tms3203x_device::tstb_reg, &tms3203x_device::tstb_dir, &tms3203x_device::tstb_ind, &tms3203x_device::tstb_imm,
- &tms3203x_device::xor_reg, &tms3203x_device::xor_dir, &tms3203x_device::xor_ind, &tms3203x_device::xor_imm,
- &tms3203x_device::illegal, &tms3203x_device::iack_dir, &tms3203x_device::iack_ind, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x38
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
-
- &tms3203x_device::addc3_regreg, &tms3203x_device::addc3_indreg, &tms3203x_device::addc3_regind, &tms3203x_device::addc3_indind, // 0x40
- &tms3203x_device::addf3_regreg, &tms3203x_device::addf3_indreg, &tms3203x_device::addf3_regind, &tms3203x_device::addf3_indind,
- &tms3203x_device::addi3_regreg, &tms3203x_device::addi3_indreg, &tms3203x_device::addi3_regind, &tms3203x_device::addi3_indind,
- &tms3203x_device::and3_regreg, &tms3203x_device::and3_indreg, &tms3203x_device::and3_regind, &tms3203x_device::and3_indind,
- &tms3203x_device::andn3_regreg, &tms3203x_device::andn3_indreg, &tms3203x_device::andn3_regind, &tms3203x_device::andn3_indind,
- &tms3203x_device::ash3_regreg, &tms3203x_device::ash3_indreg, &tms3203x_device::ash3_regind, &tms3203x_device::ash3_indind,
- &tms3203x_device::cmpf3_regreg, &tms3203x_device::cmpf3_indreg, &tms3203x_device::cmpf3_regind, &tms3203x_device::cmpf3_indind,
- &tms3203x_device::cmpi3_regreg, &tms3203x_device::cmpi3_indreg, &tms3203x_device::cmpi3_regind, &tms3203x_device::cmpi3_indind,
- &tms3203x_device::lsh3_regreg, &tms3203x_device::lsh3_indreg, &tms3203x_device::lsh3_regind, &tms3203x_device::lsh3_indind, // 0x48
- &tms3203x_device::mpyf3_regreg, &tms3203x_device::mpyf3_indreg, &tms3203x_device::mpyf3_regind, &tms3203x_device::mpyf3_indind,
- &tms3203x_device::mpyi3_regreg, &tms3203x_device::mpyi3_indreg, &tms3203x_device::mpyi3_regind, &tms3203x_device::mpyi3_indind,
- &tms3203x_device::or3_regreg, &tms3203x_device::or3_indreg, &tms3203x_device::or3_regind, &tms3203x_device::or3_indind,
- &tms3203x_device::subb3_regreg, &tms3203x_device::subb3_indreg, &tms3203x_device::subb3_regind, &tms3203x_device::subb3_indind,
- &tms3203x_device::subf3_regreg, &tms3203x_device::subf3_indreg, &tms3203x_device::subf3_regind, &tms3203x_device::subf3_indind,
- &tms3203x_device::subi3_regreg, &tms3203x_device::subi3_indreg, &tms3203x_device::subi3_regind, &tms3203x_device::subi3_indind,
- &tms3203x_device::tstb3_regreg, &tms3203x_device::tstb3_indreg, &tms3203x_device::tstb3_regind, &tms3203x_device::tstb3_indind,
- &tms3203x_device::xor3_regreg, &tms3203x_device::xor3_indreg, &tms3203x_device::xor3_regind, &tms3203x_device::xor3_indind, // 0x50
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x58
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x60
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x68
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x70
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x78
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
-
- &tms3203x_device::ldfu_reg, &tms3203x_device::ldfu_dir, &tms3203x_device::ldfu_ind, &tms3203x_device::ldfu_imm, // 0x80
- &tms3203x_device::ldflo_reg, &tms3203x_device::ldflo_dir, &tms3203x_device::ldflo_ind, &tms3203x_device::ldflo_imm,
- &tms3203x_device::ldfls_reg, &tms3203x_device::ldfls_dir, &tms3203x_device::ldfls_ind, &tms3203x_device::ldfls_imm,
- &tms3203x_device::ldfhi_reg, &tms3203x_device::ldfhi_dir, &tms3203x_device::ldfhi_ind, &tms3203x_device::ldfhi_imm,
- &tms3203x_device::ldfhs_reg, &tms3203x_device::ldfhs_dir, &tms3203x_device::ldfhs_ind, &tms3203x_device::ldfhs_imm,
- &tms3203x_device::ldfeq_reg, &tms3203x_device::ldfeq_dir, &tms3203x_device::ldfeq_ind, &tms3203x_device::ldfeq_imm,
- &tms3203x_device::ldfne_reg, &tms3203x_device::ldfne_dir, &tms3203x_device::ldfne_ind, &tms3203x_device::ldfne_imm,
- &tms3203x_device::ldflt_reg, &tms3203x_device::ldflt_dir, &tms3203x_device::ldflt_ind, &tms3203x_device::ldflt_imm,
- &tms3203x_device::ldfle_reg, &tms3203x_device::ldfle_dir, &tms3203x_device::ldfle_ind, &tms3203x_device::ldfle_imm, // 0x88
- &tms3203x_device::ldfgt_reg, &tms3203x_device::ldfgt_dir, &tms3203x_device::ldfgt_ind, &tms3203x_device::ldfgt_imm,
- &tms3203x_device::ldfge_reg, &tms3203x_device::ldfge_dir, &tms3203x_device::ldfge_ind, &tms3203x_device::ldfge_imm,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::ldfnv_reg, &tms3203x_device::ldfnv_dir, &tms3203x_device::ldfnv_ind, &tms3203x_device::ldfnv_imm,
- &tms3203x_device::ldfv_reg, &tms3203x_device::ldfv_dir, &tms3203x_device::ldfv_ind, &tms3203x_device::ldfv_imm,
- &tms3203x_device::ldfnuf_reg, &tms3203x_device::ldfnuf_dir, &tms3203x_device::ldfnuf_ind, &tms3203x_device::ldfnuf_imm,
- &tms3203x_device::ldfuf_reg, &tms3203x_device::ldfuf_dir, &tms3203x_device::ldfuf_ind, &tms3203x_device::ldfuf_imm,
- &tms3203x_device::ldfnlv_reg, &tms3203x_device::ldfnlv_dir, &tms3203x_device::ldfnlv_ind, &tms3203x_device::ldfnlv_imm, // 0x90
- &tms3203x_device::ldflv_reg, &tms3203x_device::ldflv_dir, &tms3203x_device::ldflv_ind, &tms3203x_device::ldflv_imm,
- &tms3203x_device::ldfnluf_reg, &tms3203x_device::ldfnluf_dir, &tms3203x_device::ldfnluf_ind, &tms3203x_device::ldfnluf_imm,
- &tms3203x_device::ldfluf_reg, &tms3203x_device::ldfluf_dir, &tms3203x_device::ldfluf_ind, &tms3203x_device::ldfluf_imm,
- &tms3203x_device::ldfzuf_reg, &tms3203x_device::ldfzuf_dir, &tms3203x_device::ldfzuf_ind, &tms3203x_device::ldfzuf_imm,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x98
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::ldiu_reg, &tms3203x_device::ldiu_dir, &tms3203x_device::ldiu_ind, &tms3203x_device::ldiu_imm, // 0xa0
- &tms3203x_device::ldilo_reg, &tms3203x_device::ldilo_dir, &tms3203x_device::ldilo_ind, &tms3203x_device::ldilo_imm,
- &tms3203x_device::ldils_reg, &tms3203x_device::ldils_dir, &tms3203x_device::ldils_ind, &tms3203x_device::ldils_imm,
- &tms3203x_device::ldihi_reg, &tms3203x_device::ldihi_dir, &tms3203x_device::ldihi_ind, &tms3203x_device::ldihi_imm,
- &tms3203x_device::ldihs_reg, &tms3203x_device::ldihs_dir, &tms3203x_device::ldihs_ind, &tms3203x_device::ldihs_imm,
- &tms3203x_device::ldieq_reg, &tms3203x_device::ldieq_dir, &tms3203x_device::ldieq_ind, &tms3203x_device::ldieq_imm,
- &tms3203x_device::ldine_reg, &tms3203x_device::ldine_dir, &tms3203x_device::ldine_ind, &tms3203x_device::ldine_imm,
- &tms3203x_device::ldilt_reg, &tms3203x_device::ldilt_dir, &tms3203x_device::ldilt_ind, &tms3203x_device::ldilt_imm,
- &tms3203x_device::ldile_reg, &tms3203x_device::ldile_dir, &tms3203x_device::ldile_ind, &tms3203x_device::ldile_imm, // 0xa8
- &tms3203x_device::ldigt_reg, &tms3203x_device::ldigt_dir, &tms3203x_device::ldigt_ind, &tms3203x_device::ldigt_imm,
- &tms3203x_device::ldige_reg, &tms3203x_device::ldige_dir, &tms3203x_device::ldige_ind, &tms3203x_device::ldige_imm,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::ldinv_reg, &tms3203x_device::ldinv_dir, &tms3203x_device::ldinv_ind, &tms3203x_device::ldinv_imm,
- &tms3203x_device::ldiv_reg, &tms3203x_device::ldiv_dir, &tms3203x_device::ldiv_ind, &tms3203x_device::ldiv_imm,
- &tms3203x_device::ldinuf_reg, &tms3203x_device::ldinuf_dir, &tms3203x_device::ldinuf_ind, &tms3203x_device::ldinuf_imm,
- &tms3203x_device::ldiuf_reg, &tms3203x_device::ldiuf_dir, &tms3203x_device::ldiuf_ind, &tms3203x_device::ldiuf_imm,
- &tms3203x_device::ldinlv_reg, &tms3203x_device::ldinlv_dir, &tms3203x_device::ldinlv_ind, &tms3203x_device::ldinlv_imm, // 0xb0
- &tms3203x_device::ldilv_reg, &tms3203x_device::ldilv_dir, &tms3203x_device::ldilv_ind, &tms3203x_device::ldilv_imm,
- &tms3203x_device::ldinluf_reg, &tms3203x_device::ldinluf_dir, &tms3203x_device::ldinluf_ind, &tms3203x_device::ldinluf_imm,
- &tms3203x_device::ldiluf_reg, &tms3203x_device::ldiluf_dir, &tms3203x_device::ldiluf_ind, &tms3203x_device::ldiluf_imm,
- &tms3203x_device::ldizuf_reg, &tms3203x_device::ldizuf_dir, &tms3203x_device::ldizuf_ind, &tms3203x_device::ldizuf_imm,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xb8
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
-
- &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm, // 0xc0
- &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm,
- &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm,
- &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm,
- &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm,
- &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, // 0xc8
- &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::swi, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::brc_reg, &tms3203x_device::brcd_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xd0
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::brc_imm, &tms3203x_device::brcd_imm, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, // 0xd8
- &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg,
- &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg,
- &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg,
- &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
- &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
- &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
- &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
- &tms3203x_device::callc_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xe0
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::callc_imm, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::trapc, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xe8
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::retic_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xf0
- &tms3203x_device::retsc_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xf8
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
-
- &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, // 0x100
- &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0,
- &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1,
- &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1,
- &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2,
- &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2,
- &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3,
- &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3,
- &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, // 0x108
- &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0,
- &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1,
- &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1,
- &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2,
- &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2,
- &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3,
- &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3,
- &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, // 0x110
- &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0,
- &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1,
- &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1,
- &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2,
- &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2,
- &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3,
- &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3,
- &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, // 0x118
- &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0,
- &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1,
- &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1,
- &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2,
- &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2,
- &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3,
- &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x120
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x128
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x130
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x138
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
-
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x140
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x148
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x150
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x158
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x160
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x168
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x170
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x178
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
-
- &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, // 0x180
- &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf,
- &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf,
- &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf,
- &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
- &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
- &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
- &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
- &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, // 0x188
- &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf,
- &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf,
- &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf,
- &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
- &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
- &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
- &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
- &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, // 0x190
- &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf,
- &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf,
- &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf,
- &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
- &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
- &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
- &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
- &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, // 0x198
- &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf,
- &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf,
- &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf,
- &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
- &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
- &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
- &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
- &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, // 0x1a0
- &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti,
- &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti,
- &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti,
- &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
- &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
- &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
- &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
- &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, // 0x1a8
- &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti,
- &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti,
- &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti,
- &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
- &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
- &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
- &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
- &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, // 0x1b0
- &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf,
- &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf,
- &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf,
- &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
- &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
- &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
- &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
- &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, // 0x1b8
- &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti,
- &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti,
- &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti,
- &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
- &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
- &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
- &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
-
- &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, // 0x1c0
- &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti,
- &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti,
- &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti,
- &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
- &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
- &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
- &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
- &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, // 0x1c8
- &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti,
- &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti,
- &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti,
- &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
- &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
- &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
- &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
- &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, // 0x1d0
- &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti,
- &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti,
- &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti,
- &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
- &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
- &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
- &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
- &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, // 0x1d8
- &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti,
- &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti,
- &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti,
- &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
- &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
- &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
- &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1e0
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1e8
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1f0
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1f8
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
- &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal
+ &tms3203x_device::absf_reg, &tms3203x_device::absf_dir, &tms3203x_device::absf_ind, &tms3203x_device::absf_imm, // 0x00
+ &tms3203x_device::absi_reg, &tms3203x_device::absi_dir, &tms3203x_device::absi_ind, &tms3203x_device::absi_imm,
+ &tms3203x_device::addc_reg, &tms3203x_device::addc_dir, &tms3203x_device::addc_ind, &tms3203x_device::addc_imm,
+ &tms3203x_device::addf_reg, &tms3203x_device::addf_dir, &tms3203x_device::addf_ind, &tms3203x_device::addf_imm,
+ &tms3203x_device::addi_reg, &tms3203x_device::addi_dir, &tms3203x_device::addi_ind, &tms3203x_device::addi_imm,
+ &tms3203x_device::and_reg, &tms3203x_device::and_dir, &tms3203x_device::and_ind, &tms3203x_device::and_imm,
+ &tms3203x_device::andn_reg, &tms3203x_device::andn_dir, &tms3203x_device::andn_ind, &tms3203x_device::andn_imm,
+ &tms3203x_device::ash_reg, &tms3203x_device::ash_dir, &tms3203x_device::ash_ind, &tms3203x_device::ash_imm,
+ &tms3203x_device::cmpf_reg, &tms3203x_device::cmpf_dir, &tms3203x_device::cmpf_ind, &tms3203x_device::cmpf_imm, // 0x08
+ &tms3203x_device::cmpi_reg, &tms3203x_device::cmpi_dir, &tms3203x_device::cmpi_ind, &tms3203x_device::cmpi_imm,
+ &tms3203x_device::fix_reg, &tms3203x_device::fix_dir, &tms3203x_device::fix_ind, &tms3203x_device::fix_imm,
+ &tms3203x_device::float_reg, &tms3203x_device::float_dir, &tms3203x_device::float_ind, &tms3203x_device::float_imm,
+ &tms3203x_device::idle, &tms3203x_device::idle, &tms3203x_device::idle, &tms3203x_device::idle,
+ &tms3203x_device::lde_reg, &tms3203x_device::lde_dir, &tms3203x_device::lde_ind, &tms3203x_device::lde_imm,
+ &tms3203x_device::ldf_reg, &tms3203x_device::ldf_dir, &tms3203x_device::ldf_ind, &tms3203x_device::ldf_imm,
+ &tms3203x_device::illegal, &tms3203x_device::ldfi_dir, &tms3203x_device::ldfi_ind, &tms3203x_device::illegal,
+ &tms3203x_device::ldi_reg, &tms3203x_device::ldi_dir, &tms3203x_device::ldi_ind, &tms3203x_device::ldi_imm, // 0x10
+ &tms3203x_device::illegal, &tms3203x_device::ldii_dir, &tms3203x_device::ldii_ind, &tms3203x_device::illegal,
+ &tms3203x_device::ldm_reg, &tms3203x_device::ldm_dir, &tms3203x_device::ldm_ind, &tms3203x_device::ldm_imm,
+ &tms3203x_device::lsh_reg, &tms3203x_device::lsh_dir, &tms3203x_device::lsh_ind, &tms3203x_device::lsh_imm,
+ &tms3203x_device::mpyf_reg, &tms3203x_device::mpyf_dir, &tms3203x_device::mpyf_ind, &tms3203x_device::mpyf_imm,
+ &tms3203x_device::mpyi_reg, &tms3203x_device::mpyi_dir, &tms3203x_device::mpyi_ind, &tms3203x_device::mpyi_imm,
+ &tms3203x_device::negb_reg, &tms3203x_device::negb_dir, &tms3203x_device::negb_ind, &tms3203x_device::negb_imm,
+ &tms3203x_device::negf_reg, &tms3203x_device::negf_dir, &tms3203x_device::negf_ind, &tms3203x_device::negf_imm,
+ &tms3203x_device::negi_reg, &tms3203x_device::negi_dir, &tms3203x_device::negi_ind, &tms3203x_device::negi_imm, // 0x18
+ &tms3203x_device::nop_reg, &tms3203x_device::illegal, &tms3203x_device::nop_ind, &tms3203x_device::illegal,
+ &tms3203x_device::norm_reg, &tms3203x_device::norm_dir, &tms3203x_device::norm_ind, &tms3203x_device::norm_imm,
+ &tms3203x_device::not_reg, &tms3203x_device::not_dir, &tms3203x_device::not_ind, &tms3203x_device::not_imm,
+ &tms3203x_device::illegal, &tms3203x_device::pop, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::popf, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::push, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::pushf, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::or_reg, &tms3203x_device::or_dir, &tms3203x_device::or_ind, &tms3203x_device::or_imm, // 0x20
+ &tms3203x_device::maxspeed, &tms3203x_device::maxspeed, &tms3203x_device::maxspeed, &tms3203x_device::maxspeed,
+ &tms3203x_device::rnd_reg, &tms3203x_device::rnd_dir, &tms3203x_device::rnd_ind, &tms3203x_device::rnd_imm,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::rol,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::rolc,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::ror,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::rorc,
+ &tms3203x_device::rtps_reg, &tms3203x_device::rtps_dir, &tms3203x_device::rtps_ind, &tms3203x_device::rtps_imm,
+ &tms3203x_device::illegal, &tms3203x_device::stf_dir, &tms3203x_device::stf_ind, &tms3203x_device::illegal, // 0x28
+ &tms3203x_device::illegal, &tms3203x_device::stfi_dir, &tms3203x_device::stfi_ind, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::sti_dir, &tms3203x_device::sti_ind, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::stii_dir, &tms3203x_device::stii_ind, &tms3203x_device::illegal,
+ &tms3203x_device::sigi, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::subb_reg, &tms3203x_device::subb_dir, &tms3203x_device::subb_ind, &tms3203x_device::subb_imm,
+ &tms3203x_device::subc_reg, &tms3203x_device::subc_dir, &tms3203x_device::subc_ind, &tms3203x_device::subc_imm,
+ &tms3203x_device::subf_reg, &tms3203x_device::subf_dir, &tms3203x_device::subf_ind, &tms3203x_device::subf_imm,
+ &tms3203x_device::subi_reg, &tms3203x_device::subi_dir, &tms3203x_device::subi_ind, &tms3203x_device::subi_imm, // 0x30
+ &tms3203x_device::subrb_reg, &tms3203x_device::subrb_dir, &tms3203x_device::subrb_ind, &tms3203x_device::subrb_imm,
+ &tms3203x_device::subrf_reg, &tms3203x_device::subrf_dir, &tms3203x_device::subrf_ind, &tms3203x_device::subrf_imm,
+ &tms3203x_device::subri_reg, &tms3203x_device::subri_dir, &tms3203x_device::subri_ind, &tms3203x_device::subri_imm,
+ &tms3203x_device::tstb_reg, &tms3203x_device::tstb_dir, &tms3203x_device::tstb_ind, &tms3203x_device::tstb_imm,
+ &tms3203x_device::xor_reg, &tms3203x_device::xor_dir, &tms3203x_device::xor_ind, &tms3203x_device::xor_imm,
+ &tms3203x_device::illegal, &tms3203x_device::iack_dir, &tms3203x_device::iack_ind, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x38
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+
+ &tms3203x_device::addc3_regreg, &tms3203x_device::addc3_indreg, &tms3203x_device::addc3_regind, &tms3203x_device::addc3_indind, // 0x40
+ &tms3203x_device::addf3_regreg, &tms3203x_device::addf3_indreg, &tms3203x_device::addf3_regind, &tms3203x_device::addf3_indind,
+ &tms3203x_device::addi3_regreg, &tms3203x_device::addi3_indreg, &tms3203x_device::addi3_regind, &tms3203x_device::addi3_indind,
+ &tms3203x_device::and3_regreg, &tms3203x_device::and3_indreg, &tms3203x_device::and3_regind, &tms3203x_device::and3_indind,
+ &tms3203x_device::andn3_regreg, &tms3203x_device::andn3_indreg, &tms3203x_device::andn3_regind, &tms3203x_device::andn3_indind,
+ &tms3203x_device::ash3_regreg, &tms3203x_device::ash3_indreg, &tms3203x_device::ash3_regind, &tms3203x_device::ash3_indind,
+ &tms3203x_device::cmpf3_regreg, &tms3203x_device::cmpf3_indreg, &tms3203x_device::cmpf3_regind, &tms3203x_device::cmpf3_indind,
+ &tms3203x_device::cmpi3_regreg, &tms3203x_device::cmpi3_indreg, &tms3203x_device::cmpi3_regind, &tms3203x_device::cmpi3_indind,
+ &tms3203x_device::lsh3_regreg, &tms3203x_device::lsh3_indreg, &tms3203x_device::lsh3_regind, &tms3203x_device::lsh3_indind, // 0x48
+ &tms3203x_device::mpyf3_regreg, &tms3203x_device::mpyf3_indreg, &tms3203x_device::mpyf3_regind, &tms3203x_device::mpyf3_indind,
+ &tms3203x_device::mpyi3_regreg, &tms3203x_device::mpyi3_indreg, &tms3203x_device::mpyi3_regind, &tms3203x_device::mpyi3_indind,
+ &tms3203x_device::or3_regreg, &tms3203x_device::or3_indreg, &tms3203x_device::or3_regind, &tms3203x_device::or3_indind,
+ &tms3203x_device::subb3_regreg, &tms3203x_device::subb3_indreg, &tms3203x_device::subb3_regind, &tms3203x_device::subb3_indind,
+ &tms3203x_device::subf3_regreg, &tms3203x_device::subf3_indreg, &tms3203x_device::subf3_regind, &tms3203x_device::subf3_indind,
+ &tms3203x_device::subi3_regreg, &tms3203x_device::subi3_indreg, &tms3203x_device::subi3_regind, &tms3203x_device::subi3_indind,
+ &tms3203x_device::tstb3_regreg, &tms3203x_device::tstb3_indreg, &tms3203x_device::tstb3_regind, &tms3203x_device::tstb3_indind,
+ &tms3203x_device::xor3_regreg, &tms3203x_device::xor3_indreg, &tms3203x_device::xor3_regind, &tms3203x_device::xor3_indind, // 0x50
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x58
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x60
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x68
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x70
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x78
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+
+ &tms3203x_device::ldfu_reg, &tms3203x_device::ldfu_dir, &tms3203x_device::ldfu_ind, &tms3203x_device::ldfu_imm, // 0x80
+ &tms3203x_device::ldflo_reg, &tms3203x_device::ldflo_dir, &tms3203x_device::ldflo_ind, &tms3203x_device::ldflo_imm,
+ &tms3203x_device::ldfls_reg, &tms3203x_device::ldfls_dir, &tms3203x_device::ldfls_ind, &tms3203x_device::ldfls_imm,
+ &tms3203x_device::ldfhi_reg, &tms3203x_device::ldfhi_dir, &tms3203x_device::ldfhi_ind, &tms3203x_device::ldfhi_imm,
+ &tms3203x_device::ldfhs_reg, &tms3203x_device::ldfhs_dir, &tms3203x_device::ldfhs_ind, &tms3203x_device::ldfhs_imm,
+ &tms3203x_device::ldfeq_reg, &tms3203x_device::ldfeq_dir, &tms3203x_device::ldfeq_ind, &tms3203x_device::ldfeq_imm,
+ &tms3203x_device::ldfne_reg, &tms3203x_device::ldfne_dir, &tms3203x_device::ldfne_ind, &tms3203x_device::ldfne_imm,
+ &tms3203x_device::ldflt_reg, &tms3203x_device::ldflt_dir, &tms3203x_device::ldflt_ind, &tms3203x_device::ldflt_imm,
+ &tms3203x_device::ldfle_reg, &tms3203x_device::ldfle_dir, &tms3203x_device::ldfle_ind, &tms3203x_device::ldfle_imm, // 0x88
+ &tms3203x_device::ldfgt_reg, &tms3203x_device::ldfgt_dir, &tms3203x_device::ldfgt_ind, &tms3203x_device::ldfgt_imm,
+ &tms3203x_device::ldfge_reg, &tms3203x_device::ldfge_dir, &tms3203x_device::ldfge_ind, &tms3203x_device::ldfge_imm,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::ldfnv_reg, &tms3203x_device::ldfnv_dir, &tms3203x_device::ldfnv_ind, &tms3203x_device::ldfnv_imm,
+ &tms3203x_device::ldfv_reg, &tms3203x_device::ldfv_dir, &tms3203x_device::ldfv_ind, &tms3203x_device::ldfv_imm,
+ &tms3203x_device::ldfnuf_reg, &tms3203x_device::ldfnuf_dir, &tms3203x_device::ldfnuf_ind, &tms3203x_device::ldfnuf_imm,
+ &tms3203x_device::ldfuf_reg, &tms3203x_device::ldfuf_dir, &tms3203x_device::ldfuf_ind, &tms3203x_device::ldfuf_imm,
+ &tms3203x_device::ldfnlv_reg, &tms3203x_device::ldfnlv_dir, &tms3203x_device::ldfnlv_ind, &tms3203x_device::ldfnlv_imm, // 0x90
+ &tms3203x_device::ldflv_reg, &tms3203x_device::ldflv_dir, &tms3203x_device::ldflv_ind, &tms3203x_device::ldflv_imm,
+ &tms3203x_device::ldfnluf_reg, &tms3203x_device::ldfnluf_dir, &tms3203x_device::ldfnluf_ind, &tms3203x_device::ldfnluf_imm,
+ &tms3203x_device::ldfluf_reg, &tms3203x_device::ldfluf_dir, &tms3203x_device::ldfluf_ind, &tms3203x_device::ldfluf_imm,
+ &tms3203x_device::ldfzuf_reg, &tms3203x_device::ldfzuf_dir, &tms3203x_device::ldfzuf_ind, &tms3203x_device::ldfzuf_imm,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x98
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::ldiu_reg, &tms3203x_device::ldiu_dir, &tms3203x_device::ldiu_ind, &tms3203x_device::ldiu_imm, // 0xa0
+ &tms3203x_device::ldilo_reg, &tms3203x_device::ldilo_dir, &tms3203x_device::ldilo_ind, &tms3203x_device::ldilo_imm,
+ &tms3203x_device::ldils_reg, &tms3203x_device::ldils_dir, &tms3203x_device::ldils_ind, &tms3203x_device::ldils_imm,
+ &tms3203x_device::ldihi_reg, &tms3203x_device::ldihi_dir, &tms3203x_device::ldihi_ind, &tms3203x_device::ldihi_imm,
+ &tms3203x_device::ldihs_reg, &tms3203x_device::ldihs_dir, &tms3203x_device::ldihs_ind, &tms3203x_device::ldihs_imm,
+ &tms3203x_device::ldieq_reg, &tms3203x_device::ldieq_dir, &tms3203x_device::ldieq_ind, &tms3203x_device::ldieq_imm,
+ &tms3203x_device::ldine_reg, &tms3203x_device::ldine_dir, &tms3203x_device::ldine_ind, &tms3203x_device::ldine_imm,
+ &tms3203x_device::ldilt_reg, &tms3203x_device::ldilt_dir, &tms3203x_device::ldilt_ind, &tms3203x_device::ldilt_imm,
+ &tms3203x_device::ldile_reg, &tms3203x_device::ldile_dir, &tms3203x_device::ldile_ind, &tms3203x_device::ldile_imm, // 0xa8
+ &tms3203x_device::ldigt_reg, &tms3203x_device::ldigt_dir, &tms3203x_device::ldigt_ind, &tms3203x_device::ldigt_imm,
+ &tms3203x_device::ldige_reg, &tms3203x_device::ldige_dir, &tms3203x_device::ldige_ind, &tms3203x_device::ldige_imm,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::ldinv_reg, &tms3203x_device::ldinv_dir, &tms3203x_device::ldinv_ind, &tms3203x_device::ldinv_imm,
+ &tms3203x_device::ldiv_reg, &tms3203x_device::ldiv_dir, &tms3203x_device::ldiv_ind, &tms3203x_device::ldiv_imm,
+ &tms3203x_device::ldinuf_reg, &tms3203x_device::ldinuf_dir, &tms3203x_device::ldinuf_ind, &tms3203x_device::ldinuf_imm,
+ &tms3203x_device::ldiuf_reg, &tms3203x_device::ldiuf_dir, &tms3203x_device::ldiuf_ind, &tms3203x_device::ldiuf_imm,
+ &tms3203x_device::ldinlv_reg, &tms3203x_device::ldinlv_dir, &tms3203x_device::ldinlv_ind, &tms3203x_device::ldinlv_imm, // 0xb0
+ &tms3203x_device::ldilv_reg, &tms3203x_device::ldilv_dir, &tms3203x_device::ldilv_ind, &tms3203x_device::ldilv_imm,
+ &tms3203x_device::ldinluf_reg, &tms3203x_device::ldinluf_dir, &tms3203x_device::ldinluf_ind, &tms3203x_device::ldinluf_imm,
+ &tms3203x_device::ldiluf_reg, &tms3203x_device::ldiluf_dir, &tms3203x_device::ldiluf_ind, &tms3203x_device::ldiluf_imm,
+ &tms3203x_device::ldizuf_reg, &tms3203x_device::ldizuf_dir, &tms3203x_device::ldizuf_ind, &tms3203x_device::ldizuf_imm,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xb8
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+
+ &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm, // 0xc0
+ &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm, &tms3203x_device::br_imm,
+ &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm,
+ &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm, &tms3203x_device::brd_imm,
+ &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm,
+ &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm, &tms3203x_device::call_imm,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, // 0xc8
+ &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm, &tms3203x_device::rptb_imm,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::swi, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::brc_reg, &tms3203x_device::brcd_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xd0
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::brc_imm, &tms3203x_device::brcd_imm, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, // 0xd8
+ &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg,
+ &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg,
+ &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg, &tms3203x_device::dbc_reg, &tms3203x_device::dbcd_reg,
+ &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
+ &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
+ &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
+ &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm, &tms3203x_device::dbc_imm, &tms3203x_device::dbcd_imm,
+ &tms3203x_device::callc_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xe0
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::callc_imm, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::trapc, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xe8
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::retic_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xf0
+ &tms3203x_device::retsc_reg, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0xf8
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+
+ &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, // 0x100
+ &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0, &tms3203x_device::mpyaddf_0,
+ &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1,
+ &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1, &tms3203x_device::mpyaddf_1,
+ &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2,
+ &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2, &tms3203x_device::mpyaddf_2,
+ &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3,
+ &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3, &tms3203x_device::mpyaddf_3,
+ &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, // 0x108
+ &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0, &tms3203x_device::mpysubf_0,
+ &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1,
+ &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1, &tms3203x_device::mpysubf_1,
+ &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2,
+ &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2, &tms3203x_device::mpysubf_2,
+ &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3,
+ &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3, &tms3203x_device::mpysubf_3,
+ &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, // 0x110
+ &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0, &tms3203x_device::mpyaddi_0,
+ &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1,
+ &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1, &tms3203x_device::mpyaddi_1,
+ &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2,
+ &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2, &tms3203x_device::mpyaddi_2,
+ &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3,
+ &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3, &tms3203x_device::mpyaddi_3,
+ &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, // 0x118
+ &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0, &tms3203x_device::mpysubi_0,
+ &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1,
+ &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1, &tms3203x_device::mpysubi_1,
+ &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2,
+ &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2, &tms3203x_device::mpysubi_2,
+ &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3,
+ &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3, &tms3203x_device::mpysubi_3,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x120
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x128
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x130
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x138
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x140
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x148
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x150
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x158
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x160
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x168
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x170
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x178
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+
+ &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, // 0x180
+ &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf,
+ &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf,
+ &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf, &tms3203x_device::stfstf,
+ &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
+ &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
+ &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
+ &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti, &tms3203x_device::stisti,
+ &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, // 0x188
+ &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf,
+ &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf,
+ &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf, &tms3203x_device::ldfldf,
+ &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
+ &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
+ &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
+ &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi, &tms3203x_device::ldildi,
+ &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, // 0x190
+ &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf,
+ &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf,
+ &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf, &tms3203x_device::absfstf,
+ &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
+ &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
+ &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
+ &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti, &tms3203x_device::absisti,
+ &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, // 0x198
+ &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf,
+ &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf,
+ &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf, &tms3203x_device::addf3stf,
+ &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
+ &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
+ &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
+ &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti, &tms3203x_device::addi3sti,
+ &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, // 0x1a0
+ &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti,
+ &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti,
+ &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti, &tms3203x_device::and3sti,
+ &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
+ &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
+ &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
+ &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti, &tms3203x_device::ash3sti,
+ &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, // 0x1a8
+ &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti,
+ &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti,
+ &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti, &tms3203x_device::fixsti,
+ &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
+ &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
+ &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
+ &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf, &tms3203x_device::floatstf,
+ &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, // 0x1b0
+ &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf,
+ &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf,
+ &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf, &tms3203x_device::ldfstf,
+ &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
+ &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
+ &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
+ &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti, &tms3203x_device::ldisti,
+ &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, // 0x1b8
+ &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti,
+ &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti,
+ &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti, &tms3203x_device::lsh3sti,
+ &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
+ &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
+ &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
+ &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf, &tms3203x_device::mpyf3stf,
+
+ &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, // 0x1c0
+ &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti,
+ &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti,
+ &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti, &tms3203x_device::mpyi3sti,
+ &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
+ &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
+ &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
+ &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf, &tms3203x_device::negfstf,
+ &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, // 0x1c8
+ &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti,
+ &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti,
+ &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti, &tms3203x_device::negisti,
+ &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
+ &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
+ &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
+ &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti, &tms3203x_device::notsti,
+ &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, // 0x1d0
+ &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti,
+ &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti,
+ &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti, &tms3203x_device::or3sti,
+ &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
+ &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
+ &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
+ &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf, &tms3203x_device::subf3stf,
+ &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, // 0x1d8
+ &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti,
+ &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti,
+ &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti, &tms3203x_device::subi3sti,
+ &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
+ &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
+ &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
+ &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti, &tms3203x_device::xor3sti,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1e0
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1e8
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1f0
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, // 0x1f8
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal,
+ &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal, &tms3203x_device::illegal
};
diff --git a/src/emu/cpu/tms32031/dis32031.c b/src/emu/cpu/tms32031/dis32031.c
index 830a8426fe0..fef8887ac66 100644
--- a/src/emu/cpu/tms32031/dis32031.c
+++ b/src/emu/cpu/tms32031/dis32031.c
@@ -14,14 +14,14 @@
MEMORY ACCESSORS
***************************************************************************/
-#define INTEGER 0
-#define FLOAT 1
-#define NODEST 2
-#define NOSOURCE 4
-#define NOSOURCE1 NOSOURCE
-#define NOSOURCE2 8
-#define SWAPSRCDST 16
-#define UNSIGNED 32
+#define INTEGER 0
+#define FLOAT 1
+#define NODEST 2
+#define NOSOURCE 4
+#define NOSOURCE1 NOSOURCE
+#define NOSOURCE2 8
+#define SWAPSRCDST 16
+#define UNSIGNED 32
/***************************************************************************
@@ -133,40 +133,40 @@ static void append_indirect(UINT8 ma, INT8 disp, char *buffer)
switch (mode)
{
- case 0: sprintf(dst, "*+AR%d%s", ar, dispstr); break;
- case 1: sprintf(dst, "*-AR%d%s", ar, dispstr); break;
- case 2: sprintf(dst, "*++AR%d%s", ar, dispstr); break;
- case 3: sprintf(dst, "*--AR%d%s", ar, dispstr); break;
- case 4: sprintf(dst, "*AR%d++%s", ar, dispstr); break;
- case 5: sprintf(dst, "*AR%d--%s", ar, dispstr); break;
- case 6: sprintf(dst, "*AR%d++%s%%", ar, dispstr); break;
- case 7: sprintf(dst, "*AR%d--%s%%", ar, dispstr); break;
-
- case 8: sprintf(dst, "*+AR%d(IR0)", ar); break;
- case 9: sprintf(dst, "*-AR%d(IR0)", ar); break;
- case 10: sprintf(dst, "*++AR%d(IR0)", ar); break;
- case 11: sprintf(dst, "*--AR%d(IR0)", ar); break;
- case 12: sprintf(dst, "*AR%d++(IR0)", ar); break;
- case 13: sprintf(dst, "*AR%d--(IR0)", ar); break;
- case 14: sprintf(dst, "*AR%d++(IR0)%%", ar); break;
- case 15: sprintf(dst, "*AR%d--(IR0)%%", ar); break;
-
- case 16: sprintf(dst, "*+AR%d(IR1)", ar); break;
- case 17: sprintf(dst, "*-AR%d(IR1)", ar); break;
- case 18: sprintf(dst, "*++AR%d(IR1)", ar); break;
- case 19: sprintf(dst, "*--AR%d(IR1)", ar); break;
- case 20: sprintf(dst, "*AR%d++(IR1)", ar); break;
- case 21: sprintf(dst, "*AR%d--(IR1)", ar); break;
- case 22: sprintf(dst, "*AR%d++(IR1)%%", ar); break;
- case 23: sprintf(dst, "*AR%d--(IR1)%%", ar); break;
-
- case 24: sprintf(dst, "*AR%d", ar); break;
- case 25: sprintf(dst, "*AR%d++(IR0)B", ar); break;
+ case 0: sprintf(dst, "*+AR%d%s", ar, dispstr); break;
+ case 1: sprintf(dst, "*-AR%d%s", ar, dispstr); break;
+ case 2: sprintf(dst, "*++AR%d%s", ar, dispstr); break;
+ case 3: sprintf(dst, "*--AR%d%s", ar, dispstr); break;
+ case 4: sprintf(dst, "*AR%d++%s", ar, dispstr); break;
+ case 5: sprintf(dst, "*AR%d--%s", ar, dispstr); break;
+ case 6: sprintf(dst, "*AR%d++%s%%", ar, dispstr); break;
+ case 7: sprintf(dst, "*AR%d--%s%%", ar, dispstr); break;
+
+ case 8: sprintf(dst, "*+AR%d(IR0)", ar); break;
+ case 9: sprintf(dst, "*-AR%d(IR0)", ar); break;
+ case 10: sprintf(dst, "*++AR%d(IR0)", ar); break;
+ case 11: sprintf(dst, "*--AR%d(IR0)", ar); break;
+ case 12: sprintf(dst, "*AR%d++(IR0)", ar); break;
+ case 13: sprintf(dst, "*AR%d--(IR0)", ar); break;
+ case 14: sprintf(dst, "*AR%d++(IR0)%%", ar); break;
+ case 15: sprintf(dst, "*AR%d--(IR0)%%", ar); break;
+
+ case 16: sprintf(dst, "*+AR%d(IR1)", ar); break;
+ case 17: sprintf(dst, "*-AR%d(IR1)", ar); break;
+ case 18: sprintf(dst, "*++AR%d(IR1)", ar); break;
+ case 19: sprintf(dst, "*--AR%d(IR1)", ar); break;
+ case 20: sprintf(dst, "*AR%d++(IR1)", ar); break;
+ case 21: sprintf(dst, "*AR%d--(IR1)", ar); break;
+ case 22: sprintf(dst, "*AR%d++(IR1)%%", ar); break;
+ case 23: sprintf(dst, "*AR%d--(IR1)%%", ar); break;
+
+ case 24: sprintf(dst, "*AR%d", ar); break;
+ case 25: sprintf(dst, "*AR%d++(IR0)B", ar); break;
case 28:
case 29:
case 30:
- case 31: strcpy(dst, regname[ma & 31]); break;
- default: sprintf(dst, "(unknown mode)"); break;
+ case 31: strcpy(dst, regname[ma & 31]); break;
+ default: sprintf(dst, "(unknown mode)"); break;
}
}
@@ -380,87 +380,87 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
switch (op >> 23)
{
- case 0x000: disasm_general("ABSF", op, FLOAT, buffer); break;
- case 0x001: disasm_general("ABSI", op, INTEGER, buffer); break;
- case 0x002: disasm_general("ADDC", op, INTEGER, buffer); break;
- case 0x003: disasm_general("ADDF", op, FLOAT, buffer); break;
- case 0x004: disasm_general("ADDI", op, INTEGER, buffer); break;
- case 0x005: disasm_general("AND", op, INTEGER | UNSIGNED, buffer); break;
- case 0x006: disasm_general("ANDN", op, INTEGER | UNSIGNED, buffer); break;
- case 0x007: disasm_general("ASH", op, INTEGER, buffer); break;
-
- case 0x008: disasm_general("CMPF", op, FLOAT, buffer); break;
- case 0x009: disasm_general("CMPI", op, INTEGER, buffer); break;
- case 0x00a: disasm_general("FIX", op, FLOAT, buffer); break;
- case 0x00b: disasm_general("FLOAT", op, INTEGER, buffer); break;
- case 0x00c: disasm_general((op & 1) ? "IDLE2" : "IDLE", op, NOSOURCE | NODEST, buffer); break;
- case 0x00d: disasm_general("LDE", op, FLOAT, buffer); break;
- case 0x00e: disasm_general("LDF", op, FLOAT, buffer); break;
- case 0x00f: disasm_general("LDFI", op, FLOAT, buffer); break;
-
- case 0x010: disasm_general("LDI", op, INTEGER, buffer); break;
- case 0x011: disasm_general("LDII", op, INTEGER, buffer); break;
- case 0x012: disasm_general("LDM", op, FLOAT, buffer); break;
- case 0x013: disasm_general("LSH", op, INTEGER, buffer); break;
- case 0x014: disasm_general("MPYF", op, FLOAT, buffer); break;
- case 0x015: disasm_general("MPYI", op, INTEGER, buffer); break;
- case 0x016: disasm_general("NEGB", op, INTEGER, buffer); break;
- case 0x017: disasm_general("NEGF", op, FLOAT, buffer); break;
-
- case 0x018: disasm_general("NEGI", op, INTEGER, buffer); break;
- case 0x019: disasm_general("NOP", op, NODEST, buffer); break;
- case 0x01a: disasm_general("NORM", op, FLOAT, buffer); break;
- case 0x01b: disasm_general("NOT", op, INTEGER, buffer); break;
- case 0x01c: disasm_general("POP", op, NOSOURCE, buffer); break;
- case 0x01d: disasm_general("POPF", op, NOSOURCE, buffer); break;
- case 0x01e: disasm_general("PUSH", op, NOSOURCE, buffer); break;
- case 0x01f: disasm_general("PUSHF", op, NOSOURCE, buffer); break;
-
- case 0x020: disasm_general("OR", op, INTEGER | UNSIGNED, buffer); break;
- case 0x021: disasm_general((op & 1) ? "LOPOWER" : "MAXSPEED", op, NOSOURCE | NODEST, buffer); break;
- case 0x022: disasm_general("RND", op, FLOAT, buffer); break;
- case 0x023: disasm_general("ROL", op, INTEGER, buffer); break;
- case 0x024: disasm_general("ROLC", op, INTEGER, buffer); break;
- case 0x025: disasm_general("ROR", op, INTEGER, buffer); break;
- case 0x026: disasm_general("RORC", op, INTEGER, buffer); break;
- case 0x027: disasm_general("RTPS", op, INTEGER | NODEST, buffer); break;
-
- case 0x028: disasm_general("STF", op, FLOAT | SWAPSRCDST, buffer); break;
- case 0x029: disasm_general("STFI", op, FLOAT | SWAPSRCDST, buffer); break;
- case 0x02a: disasm_general("STI", op, INTEGER | SWAPSRCDST, buffer); break;
- case 0x02b: disasm_general("STII", op, INTEGER | SWAPSRCDST, buffer); break;
- case 0x02c: disasm_general("SIGI", op, NOSOURCE | NODEST, buffer); break;
- case 0x02d: disasm_general("SUBB", op, INTEGER, buffer); break;
- case 0x02e: disasm_general("SUBC", op, INTEGER, buffer); break;
- case 0x02f: disasm_general("SUBF", op, FLOAT, buffer); break;
-
- case 0x030: disasm_general("SUBI", op, INTEGER, buffer); break;
- case 0x031: disasm_general("SUBRB", op, INTEGER, buffer); break;
- case 0x032: disasm_general("SUBRF", op, FLOAT, buffer); break;
- case 0x033: disasm_general("SUBRI", op, INTEGER, buffer); break;
- case 0x034: disasm_general("TSTB", op, INTEGER, buffer); break;
- case 0x035: disasm_general("XOR", op, INTEGER | UNSIGNED, buffer); break;
- case 0x036: disasm_general("IACK", op, INTEGER | NODEST, buffer); break;
-
- case 0x040: disasm_3op("ADDC3", op, INTEGER, buffer); break;
- case 0x041: disasm_3op("ADDF3", op, FLOAT, buffer); break;
- case 0x042: disasm_3op("ADDI3", op, INTEGER, buffer); break;
- case 0x043: disasm_3op("AND3", op, INTEGER, buffer); break;
- case 0x044: disasm_3op("ANDN3", op, INTEGER, buffer); break;
- case 0x045: disasm_3op("ASH3", op, INTEGER, buffer); break;
- case 0x046: disasm_3op("CMPF3", op, FLOAT | NODEST, buffer); break;
- case 0x047: disasm_3op("CMPI3", op, INTEGER | NODEST, buffer); break;
-
- case 0x048: disasm_3op("LSH3", op, INTEGER, buffer); break;
- case 0x049: disasm_3op("MPYF3", op, FLOAT, buffer); break;
- case 0x04a: disasm_3op("MPYI3", op, INTEGER, buffer); break;
- case 0x04b: disasm_3op("OR3", op, INTEGER, buffer); break;
- case 0x04c: disasm_3op("SUBB3", op, INTEGER, buffer); break;
- case 0x04d: disasm_3op("SUBF3", op, FLOAT, buffer); break;
- case 0x04e: disasm_3op("SUBI3", op, INTEGER, buffer); break;
- case 0x04f: disasm_3op("TSTB3", op, INTEGER, buffer); break;
-
- case 0x050: disasm_3op("XOR3", op, INTEGER, buffer); break;
+ case 0x000: disasm_general("ABSF", op, FLOAT, buffer); break;
+ case 0x001: disasm_general("ABSI", op, INTEGER, buffer); break;
+ case 0x002: disasm_general("ADDC", op, INTEGER, buffer); break;
+ case 0x003: disasm_general("ADDF", op, FLOAT, buffer); break;
+ case 0x004: disasm_general("ADDI", op, INTEGER, buffer); break;
+ case 0x005: disasm_general("AND", op, INTEGER | UNSIGNED, buffer); break;
+ case 0x006: disasm_general("ANDN", op, INTEGER | UNSIGNED, buffer); break;
+ case 0x007: disasm_general("ASH", op, INTEGER, buffer); break;
+
+ case 0x008: disasm_general("CMPF", op, FLOAT, buffer); break;
+ case 0x009: disasm_general("CMPI", op, INTEGER, buffer); break;
+ case 0x00a: disasm_general("FIX", op, FLOAT, buffer); break;
+ case 0x00b: disasm_general("FLOAT", op, INTEGER, buffer); break;
+ case 0x00c: disasm_general((op & 1) ? "IDLE2" : "IDLE", op, NOSOURCE | NODEST, buffer); break;
+ case 0x00d: disasm_general("LDE", op, FLOAT, buffer); break;
+ case 0x00e: disasm_general("LDF", op, FLOAT, buffer); break;
+ case 0x00f: disasm_general("LDFI", op, FLOAT, buffer); break;
+
+ case 0x010: disasm_general("LDI", op, INTEGER, buffer); break;
+ case 0x011: disasm_general("LDII", op, INTEGER, buffer); break;
+ case 0x012: disasm_general("LDM", op, FLOAT, buffer); break;
+ case 0x013: disasm_general("LSH", op, INTEGER, buffer); break;
+ case 0x014: disasm_general("MPYF", op, FLOAT, buffer); break;
+ case 0x015: disasm_general("MPYI", op, INTEGER, buffer); break;
+ case 0x016: disasm_general("NEGB", op, INTEGER, buffer); break;
+ case 0x017: disasm_general("NEGF", op, FLOAT, buffer); break;
+
+ case 0x018: disasm_general("NEGI", op, INTEGER, buffer); break;
+ case 0x019: disasm_general("NOP", op, NODEST, buffer); break;
+ case 0x01a: disasm_general("NORM", op, FLOAT, buffer); break;
+ case 0x01b: disasm_general("NOT", op, INTEGER, buffer); break;
+ case 0x01c: disasm_general("POP", op, NOSOURCE, buffer); break;
+ case 0x01d: disasm_general("POPF", op, NOSOURCE, buffer); break;
+ case 0x01e: disasm_general("PUSH", op, NOSOURCE, buffer); break;
+ case 0x01f: disasm_general("PUSHF", op, NOSOURCE, buffer); break;
+
+ case 0x020: disasm_general("OR", op, INTEGER | UNSIGNED, buffer); break;
+ case 0x021: disasm_general((op & 1) ? "LOPOWER" : "MAXSPEED", op, NOSOURCE | NODEST, buffer); break;
+ case 0x022: disasm_general("RND", op, FLOAT, buffer); break;
+ case 0x023: disasm_general("ROL", op, INTEGER, buffer); break;
+ case 0x024: disasm_general("ROLC", op, INTEGER, buffer); break;
+ case 0x025: disasm_general("ROR", op, INTEGER, buffer); break;
+ case 0x026: disasm_general("RORC", op, INTEGER, buffer); break;
+ case 0x027: disasm_general("RTPS", op, INTEGER | NODEST, buffer); break;
+
+ case 0x028: disasm_general("STF", op, FLOAT | SWAPSRCDST, buffer); break;
+ case 0x029: disasm_general("STFI", op, FLOAT | SWAPSRCDST, buffer); break;
+ case 0x02a: disasm_general("STI", op, INTEGER | SWAPSRCDST, buffer); break;
+ case 0x02b: disasm_general("STII", op, INTEGER | SWAPSRCDST, buffer); break;
+ case 0x02c: disasm_general("SIGI", op, NOSOURCE | NODEST, buffer); break;
+ case 0x02d: disasm_general("SUBB", op, INTEGER, buffer); break;
+ case 0x02e: disasm_general("SUBC", op, INTEGER, buffer); break;
+ case 0x02f: disasm_general("SUBF", op, FLOAT, buffer); break;
+
+ case 0x030: disasm_general("SUBI", op, INTEGER, buffer); break;
+ case 0x031: disasm_general("SUBRB", op, INTEGER, buffer); break;
+ case 0x032: disasm_general("SUBRF", op, FLOAT, buffer); break;
+ case 0x033: disasm_general("SUBRI", op, INTEGER, buffer); break;
+ case 0x034: disasm_general("TSTB", op, INTEGER, buffer); break;
+ case 0x035: disasm_general("XOR", op, INTEGER | UNSIGNED, buffer); break;
+ case 0x036: disasm_general("IACK", op, INTEGER | NODEST, buffer); break;
+
+ case 0x040: disasm_3op("ADDC3", op, INTEGER, buffer); break;
+ case 0x041: disasm_3op("ADDF3", op, FLOAT, buffer); break;
+ case 0x042: disasm_3op("ADDI3", op, INTEGER, buffer); break;
+ case 0x043: disasm_3op("AND3", op, INTEGER, buffer); break;
+ case 0x044: disasm_3op("ANDN3", op, INTEGER, buffer); break;
+ case 0x045: disasm_3op("ASH3", op, INTEGER, buffer); break;
+ case 0x046: disasm_3op("CMPF3", op, FLOAT | NODEST, buffer); break;
+ case 0x047: disasm_3op("CMPI3", op, INTEGER | NODEST, buffer); break;
+
+ case 0x048: disasm_3op("LSH3", op, INTEGER, buffer); break;
+ case 0x049: disasm_3op("MPYF3", op, FLOAT, buffer); break;
+ case 0x04a: disasm_3op("MPYI3", op, INTEGER, buffer); break;
+ case 0x04b: disasm_3op("OR3", op, INTEGER, buffer); break;
+ case 0x04c: disasm_3op("SUBB3", op, INTEGER, buffer); break;
+ case 0x04d: disasm_3op("SUBF3", op, FLOAT, buffer); break;
+ case 0x04e: disasm_3op("SUBI3", op, INTEGER, buffer); break;
+ case 0x04f: disasm_3op("TSTB3", op, INTEGER, buffer); break;
+
+ case 0x050: disasm_3op("XOR3", op, INTEGER, buffer); break;
case 0x080: case 0x081: case 0x082: case 0x083:
case 0x084: case 0x085: case 0x086: case 0x087:
@@ -582,8 +582,8 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
break;
- case 0x100: case 0x101: case 0x102: case 0x103:
- case 0x104: case 0x105: case 0x106: case 0x107: // MPYF3||ADDF3
+ case 0x100: case 0x101: case 0x102: case 0x103:
+ case 0x104: case 0x105: case 0x106: case 0x107: // MPYF3||ADDF3
{
static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYF3", "ADDF3", op, FLOAT, srctable, buffer);
@@ -591,8 +591,8 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
}
- case 0x108: case 0x109: case 0x10a: case 0x10b:
- case 0x10c: case 0x10d: case 0x10e: case 0x10f: // MPYF3||SUBF3
+ case 0x108: case 0x109: case 0x10a: case 0x10b:
+ case 0x10c: case 0x10d: case 0x10e: case 0x10f: // MPYF3||SUBF3
{
static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYF3", "SUBF3", op, FLOAT, srctable, buffer);
@@ -600,8 +600,8 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
}
- case 0x110: case 0x111: case 0x112: case 0x113:
- case 0x114: case 0x115: case 0x116: case 0x117: // MPYI3||ADDI3
+ case 0x110: case 0x111: case 0x112: case 0x113:
+ case 0x114: case 0x115: case 0x116: case 0x117: // MPYI3||ADDI3
{
static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYI3", "ADDI3", op, INTEGER, srctable, buffer);
@@ -609,8 +609,8 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
}
- case 0x118: case 0x119: case 0x11a: case 0x11b:
- case 0x11c: case 0x11d: case 0x11e: case 0x11f: // MPYI3||SUBI3
+ case 0x118: case 0x119: case 0x11a: case 0x11b:
+ case 0x11c: case 0x11d: case 0x11e: case 0x11f: // MPYI3||SUBI3
{
static const UINT8 srctable[] = { 3,4,1,2, 3,1,4,2, 1,2,3,4, 3,1,2,4 };
disasm_parallel_3op3op("MPYI3", "SUBI3", op, INTEGER, srctable, buffer);
@@ -618,110 +618,110 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
}
- case 0x180: case 0x181: case 0x182: case 0x183: // STF||STF
+ case 0x180: case 0x181: case 0x182: case 0x183: // STF||STF
disasm_parallel_storestore("STF", "STF", op, FLOAT, buffer);
break;
- case 0x184: case 0x185: case 0x186: case 0x187: // STI||STI
+ case 0x184: case 0x185: case 0x186: case 0x187: // STI||STI
disasm_parallel_storestore("STI", "STI", op, INTEGER, buffer);
break;
- case 0x188: case 0x189: case 0x18a: case 0x18b: // LDF||LDF
+ case 0x188: case 0x189: case 0x18a: case 0x18b: // LDF||LDF
disasm_parallel_loadload("LDF", "LDF", op, FLOAT, buffer);
break;
- case 0x18c: case 0x18d: case 0x18e: case 0x18f: // LDI||LDI
+ case 0x18c: case 0x18d: case 0x18e: case 0x18f: // LDI||LDI
disasm_parallel_loadload("LDI", "LDI", op, INTEGER, buffer);
break;
- case 0x190: case 0x191: case 0x192: case 0x193: // ABSF||STF
+ case 0x190: case 0x191: case 0x192: case 0x193: // ABSF||STF
disasm_parallel_3opstore("ABSF", "STF", op, FLOAT | NOSOURCE1, buffer);
break;
- case 0x194: case 0x195: case 0x196: case 0x197: // ABSI||STI
+ case 0x194: case 0x195: case 0x196: case 0x197: // ABSI||STI
disasm_parallel_3opstore("ABSI", "STI", op, INTEGER | NOSOURCE1, buffer);
break;
- case 0x198: case 0x199: case 0x19a: case 0x19b: // ADDF3||STF
+ case 0x198: case 0x199: case 0x19a: case 0x19b: // ADDF3||STF
disasm_parallel_3opstore("ADDF3", "STF", op, FLOAT, buffer);
break;
- case 0x19c: case 0x19d: case 0x19e: case 0x19f: // ADDI3||STI
+ case 0x19c: case 0x19d: case 0x19e: case 0x19f: // ADDI3||STI
disasm_parallel_3opstore("ADDI3", "STI", op, INTEGER, buffer);
break;
- case 0x1a0: case 0x1a1: case 0x1a2: case 0x1a3: // AND3||STI
+ case 0x1a0: case 0x1a1: case 0x1a2: case 0x1a3: // AND3||STI
disasm_parallel_3opstore("AND3", "STI", op, INTEGER, buffer);
break;
- case 0x1a4: case 0x1a5: case 0x1a6: case 0x1a7: // ASH3||STI
+ case 0x1a4: case 0x1a5: case 0x1a6: case 0x1a7: // ASH3||STI
disasm_parallel_3opstore("ASH3", "STI", op, INTEGER, buffer);
break;
- case 0x1a8: case 0x1a9: case 0x1aa: case 0x1ab: // FIX||STI
+ case 0x1a8: case 0x1a9: case 0x1aa: case 0x1ab: // FIX||STI
disasm_parallel_3opstore("FIX", "STF", op, FLOAT | NOSOURCE1, buffer);
break;
- case 0x1ac: case 0x1ad: case 0x1ae: case 0x1af: // FLOAT||STF
+ case 0x1ac: case 0x1ad: case 0x1ae: case 0x1af: // FLOAT||STF
disasm_parallel_3opstore("FLOAT", "STF", op, FLOAT | NOSOURCE1, buffer);
break;
- case 0x1b0: case 0x1b1: case 0x1b2: case 0x1b3: // LDF||STF
+ case 0x1b0: case 0x1b1: case 0x1b2: case 0x1b3: // LDF||STF
disasm_parallel_3opstore("LDF", "STF", op, FLOAT | NOSOURCE1, buffer);
break;
- case 0x1b4: case 0x1b5: case 0x1b6: case 0x1b7: // LDI||STI
+ case 0x1b4: case 0x1b5: case 0x1b6: case 0x1b7: // LDI||STI
disasm_parallel_3opstore("LDI", "STI", op, INTEGER | NOSOURCE1, buffer);
break;
- case 0x1b8: case 0x1b9: case 0x1ba: case 0x1bb: // LSH3||STI
+ case 0x1b8: case 0x1b9: case 0x1ba: case 0x1bb: // LSH3||STI
disasm_parallel_3opstore("LSH3", "STI", op, INTEGER, buffer);
break;
- case 0x1bc: case 0x1bd: case 0x1be: case 0x1bf: // MPYF3||STF
+ case 0x1bc: case 0x1bd: case 0x1be: case 0x1bf: // MPYF3||STF
disasm_parallel_3opstore("MPYF3", "STF", op, FLOAT, buffer);
break;
- case 0x1c0: case 0x1c1: case 0x1c2: case 0x1c3: // MPYI3||STI
+ case 0x1c0: case 0x1c1: case 0x1c2: case 0x1c3: // MPYI3||STI
disasm_parallel_3opstore("MPYI3", "STI", op, INTEGER, buffer);
break;
- case 0x1c4: case 0x1c5: case 0x1c6: case 0x1c7: // NEGF||STF
+ case 0x1c4: case 0x1c5: case 0x1c6: case 0x1c7: // NEGF||STF
disasm_parallel_3opstore("NEGF", "STF", op, FLOAT | NOSOURCE1, buffer);
break;
- case 0x1c8: case 0x1c9: case 0x1ca: case 0x1cb: // NEGI||STI
+ case 0x1c8: case 0x1c9: case 0x1ca: case 0x1cb: // NEGI||STI
disasm_parallel_3opstore("NEGI", "STI", op, INTEGER | NOSOURCE1, buffer);
break;
- case 0x1cc: case 0x1cd: case 0x1ce: case 0x1cf: // NOT||STI
+ case 0x1cc: case 0x1cd: case 0x1ce: case 0x1cf: // NOT||STI
disasm_parallel_3opstore("NOT", "STI", op, INTEGER | NOSOURCE1, buffer);
break;
- case 0x1d0: case 0x1d1: case 0x1d2: case 0x1d3: // OR3||STI
+ case 0x1d0: case 0x1d1: case 0x1d2: case 0x1d3: // OR3||STI
disasm_parallel_3opstore("OR3", "STI", op, INTEGER, buffer);
break;
- case 0x1d4: case 0x1d5: case 0x1d6: case 0x1d7: // SUBF3||STF
+ case 0x1d4: case 0x1d5: case 0x1d6: case 0x1d7: // SUBF3||STF
disasm_parallel_3opstore("SUBF3", "STF", op, FLOAT, buffer);
break;
- case 0x1d8: case 0x1d9: case 0x1da: case 0x1db: // SUBI3||STI
+ case 0x1d8: case 0x1d9: case 0x1da: case 0x1db: // SUBI3||STI
disasm_parallel_3opstore("SUBI3", "STI", op, INTEGER, buffer);
break;
- case 0x1dc: case 0x1dd: case 0x1de: case 0x1df: // XOR3||STI
+ case 0x1dc: case 0x1dd: case 0x1de: case 0x1df: // XOR3||STI
disasm_parallel_3opstore("XOR3", "STI", op, INTEGER, buffer);
break;
@@ -737,5 +737,5 @@ static unsigned dasm_tms3203x(char *buffer, unsigned pc, UINT32 op)
CPU_DISASSEMBLE( tms3203x )
{
UINT32 op = oprom[0] | (oprom[1] << 8) | (oprom[2] << 16) | (oprom[3] << 24);
- return dasm_tms3203x(buffer, pc, op);
+ return dasm_tms3203x(buffer, pc, op);
}
diff --git a/src/emu/cpu/tms32031/tms32031.c b/src/emu/cpu/tms32031/tms32031.c
index f4ae3fa644f..66fb31f78c8 100644
--- a/src/emu/cpu/tms32031/tms32031.c
+++ b/src/emu/cpu/tms32031/tms32031.c
@@ -77,29 +77,29 @@ enum
TMR_RS,
TMR_RE,
TMR_RC,
- TMR_R8, // 3204x only
- TMR_R9, // 3204x only
- TMR_R10, // 3204x only
- TMR_R11, // 3204x only
- TMR_TEMP1, // used by the interpreter
- TMR_TEMP2, // used by the interpreter
- TMR_TEMP3 // used by the interpreter
+ TMR_R8, // 3204x only
+ TMR_R9, // 3204x only
+ TMR_R10, // 3204x only
+ TMR_R11, // 3204x only
+ TMR_TEMP1, // used by the interpreter
+ TMR_TEMP2, // used by the interpreter
+ TMR_TEMP3 // used by the interpreter
};
// flags
-const int CFLAG = 0x0001;
-const int VFLAG = 0x0002;
-const int ZFLAG = 0x0004;
-const int NFLAG = 0x0008;
-const int UFFLAG = 0x0010;
-const int LVFLAG = 0x0020;
-const int LUFFLAG = 0x0040;
-const int OVMFLAG = 0x0080;
-const int RMFLAG = 0x0100;
-const int CFFLAG = 0x0400;
-const int CEFLAG = 0x0800;
-const int CCFLAG = 0x1000;
-const int GIEFLAG = 0x2000;
+const int CFLAG = 0x0001;
+const int VFLAG = 0x0002;
+const int ZFLAG = 0x0004;
+const int NFLAG = 0x0008;
+const int UFFLAG = 0x0010;
+const int LVFLAG = 0x0020;
+const int LUFFLAG = 0x0040;
+const int OVMFLAG = 0x0080;
+const int RMFLAG = 0x0100;
+const int CFFLAG = 0x0400;
+const int CEFLAG = 0x0800;
+const int CCFLAG = 0x1000;
+const int GIEFLAG = 0x2000;
@@ -107,7 +107,7 @@ const int GIEFLAG = 0x2000;
// MACROS
//**************************************************************************
-#define IREG(rnum) (m_r[rnum].i32[0])
+#define IREG(rnum) (m_r[rnum].i32[0])
@@ -282,18 +282,18 @@ void tms3203x_device::tmsreg::from_double(double val)
tms3203x_device::tms3203x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 chiptype, address_map_constructor internal_map)
: cpu_device(mconfig, type, name, tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 32, 24, -2, internal_map),
- m_chip_type(chiptype),
- m_pc(0),
- m_bkmask(0),
- m_irq_state(0),
- m_delayed(false),
- m_irq_pending(false),
- m_is_idling(false),
- m_icount(0),
- m_irq_callback(0),
- m_program(0),
- m_direct(0)
+ m_program_config("program", ENDIANNESS_LITTLE, 32, 24, -2, internal_map),
+ m_chip_type(chiptype),
+ m_pc(0),
+ m_bkmask(0),
+ m_irq_state(0),
+ m_delayed(false),
+ m_irq_pending(false),
+ m_is_idling(false),
+ m_icount(0),
+ m_irq_callback(0),
+ m_program(0),
+ m_direct(0)
{
m_mcbl_mode = false;
m_xf0_w = NULL;
@@ -373,8 +373,8 @@ const rom_entry *tms3203x_device::device_rom_region() const
switch (m_chip_type)
{
default:
- case CHIP_TYPE_TMS32031: return ROM_NAME( tms32031 );
- case CHIP_TYPE_TMS32032: return ROM_NAME( tms32032 );
+ case CHIP_TYPE_TMS32031: return ROM_NAME( tms32031 );
+ case CHIP_TYPE_TMS32032: return ROM_NAME( tms32032 );
}
}
@@ -591,12 +591,12 @@ void tms3203x_device::state_string_export(const device_state_entry &entry, astri
string.printf("%c%c%c%c%c%c%c%c",
(temp & 0x80) ? 'O':'.',
(temp & 0x40) ? 'U':'.',
- (temp & 0x20) ? 'V':'.',
- (temp & 0x10) ? 'u':'.',
- (temp & 0x08) ? 'n':'.',
- (temp & 0x04) ? 'z':'.',
- (temp & 0x02) ? 'v':'.',
- (temp & 0x01) ? 'c':'.');
+ (temp & 0x20) ? 'V':'.',
+ (temp & 0x10) ? 'u':'.',
+ (temp & 0x08) ? 'n':'.',
+ (temp & 0x04) ? 'z':'.',
+ (temp & 0x02) ? 'v':'.',
+ (temp & 0x01) ? 'c':'.');
break;
}
}
@@ -726,7 +726,7 @@ void tms3203x_device::check_irqs()
trap(whichtrap);
// after auto-clearing the interrupt bit, we need to re-trigger
- // level-sensitive interrupts
+ // level-sensitive interrupts
if (m_chip_type == CHIP_TYPE_TMS32031 || (IREG(TMR_ST) & 0x4000) == 0)
IREG(TMR_IF) |= m_irq_state & 0x0f;
}
@@ -788,17 +788,17 @@ void tms3203x_device::execute_set_input(int inputnum, int state)
// update the external state
UINT16 intmask = 1 << inputnum;
- if (state == ASSERT_LINE)
- {
+ if (state == ASSERT_LINE)
+ {
m_irq_state |= intmask;
- IREG(TMR_IF) |= intmask;
+ IREG(TMR_IF) |= intmask;
}
else
m_irq_state &= ~intmask;
// external interrupts are level-sensitive on the '31 and can be
- // configured as such on the '32; in that case, if the external
- // signal is high, we need to update the value in IF accordingly
+ // configured as such on the '32; in that case, if the external
+ // signal is high, we need to update the value in IF accordingly
if (m_chip_type == CHIP_TYPE_TMS32031 || (IREG(TMR_ST) & 0x4000) == 0)
IREG(TMR_IF) |= m_irq_state & 0x0f;
}
diff --git a/src/emu/cpu/tms32031/tms32031.h b/src/emu/cpu/tms32031/tms32031.h
index 6d80b183df5..e18e90878a9 100644
--- a/src/emu/cpu/tms32031/tms32031.h
+++ b/src/emu/cpu/tms32031/tms32031.h
@@ -47,7 +47,7 @@
// DEBUGGING
//**************************************************************************
-#define TMS_3203X_LOG_OPCODE_USAGE (0)
+#define TMS_3203X_LOG_OPCODE_USAGE (0)
@@ -56,20 +56,20 @@
//**************************************************************************
// interrupts
-const int TMS3203X_IRQ0 = 0; // IRQ0
-const int TMS3203X_IRQ1 = 1; // IRQ1
-const int TMS3203X_IRQ2 = 2; // IRQ2
-const int TMS3203X_IRQ3 = 3; // IRQ3
-const int TMS3203X_XINT0 = 4; // serial 0 transmit interrupt
-const int TMS3203X_RINT0 = 5; // serial 0 receive interrupt
-const int TMS3203X_XINT1 = 6; // serial 1 transmit interrupt
-const int TMS3203X_RINT1 = 7; // serial 1 receive interrupt
-const int TMS3203X_TINT0 = 8; // timer 0 interrupt
-const int TMS3203X_TINT1 = 9; // timer 1 interrupt
-const int TMS3203X_DINT = 10; // DMA interrupt
-const int TMS3203X_DINT0 = 10; // DMA 0 interrupt (32032 only)
-const int TMS3203X_DINT1 = 11; // DMA 1 interrupt (32032 only)
-const int TMS3203X_MCBL = 12; // Microcomputer/boot loader mode
+const int TMS3203X_IRQ0 = 0; // IRQ0
+const int TMS3203X_IRQ1 = 1; // IRQ1
+const int TMS3203X_IRQ2 = 2; // IRQ2
+const int TMS3203X_IRQ3 = 3; // IRQ3
+const int TMS3203X_XINT0 = 4; // serial 0 transmit interrupt
+const int TMS3203X_RINT0 = 5; // serial 0 receive interrupt
+const int TMS3203X_XINT1 = 6; // serial 1 transmit interrupt
+const int TMS3203X_RINT1 = 7; // serial 1 receive interrupt
+const int TMS3203X_TINT0 = 8; // timer 0 interrupt
+const int TMS3203X_TINT1 = 9; // timer 1 interrupt
+const int TMS3203X_DINT = 10; // DMA interrupt
+const int TMS3203X_DINT0 = 10; // DMA 0 interrupt (32032 only)
+const int TMS3203X_DINT1 = 11; // DMA 1 interrupt (32032 only)
+const int TMS3203X_MCBL = 12; // Microcomputer/boot loader mode
// register enumeration
enum
@@ -139,10 +139,10 @@ typedef void (*tms3203x_iack_func)(tms3203x_device &device, UINT8 val, offs_t ad
struct tms3203x_config
{
- bool m_mcbl_mode;
- tms3203x_xf_func m_xf0_w;
- tms3203x_xf_func m_xf1_w;
- tms3203x_iack_func m_iack_w;
+ bool m_mcbl_mode;
+ tms3203x_xf_func m_xf0_w;
+ tms3203x_xf_func m_xf1_w;
+ tms3203x_iack_func m_iack_w;
};
@@ -173,7 +173,7 @@ class tms3203x_device : public cpu_device,
// importers
void from_double(double);
- UINT32 i32[2];
+ UINT32 i32[2];
};
protected:
@@ -782,8 +782,8 @@ protected:
void xor3sti(UINT32 op);
// configuration
- const address_space_config m_program_config;
- UINT32 m_chip_type;
+ const address_space_config m_program_config;
+ UINT32 m_chip_type;
union int_double
{
@@ -793,22 +793,22 @@ protected:
};
// core registers
- UINT32 m_pc;
- tmsreg m_r[36];
- UINT32 m_bkmask;
+ UINT32 m_pc;
+ tmsreg m_r[36];
+ UINT32 m_bkmask;
// internal stuff
- UINT16 m_irq_state;
- bool m_delayed;
- bool m_irq_pending;
- bool m_is_idling;
- int m_icount;
-
- UINT32 m_iotemp;
- device_irq_acknowledge_callback m_irq_callback;
- address_space * m_program;
- direct_read_data * m_direct;
- UINT32 * m_bootrom;
+ UINT16 m_irq_state;
+ bool m_delayed;
+ bool m_irq_pending;
+ bool m_is_idling;
+ int m_icount;
+
+ UINT32 m_iotemp;
+ device_irq_acknowledge_callback m_irq_callback;
+ address_space * m_program;
+ direct_read_data * m_direct;
+ UINT32 * m_bootrom;
// tables
static void (tms3203x_device::*const s_tms32031ops[])(UINT32 op);
@@ -817,7 +817,7 @@ protected:
static UINT32 (tms3203x_device::*const s_indirect_1_def[0x20])(UINT32, UINT8, UINT32 *&);
#if (TMS_3203X_LOG_OPCODE_USAGE)
- UINT32 m_hits[0x200*4];
+ UINT32 m_hits[0x200*4];
#endif
};
diff --git a/src/emu/cpu/tms32051/32051ops.c b/src/emu/cpu/tms32051/32051ops.c
index fe48f9edaf3..77986f76682 100644
--- a/src/emu/cpu/tms32051/32051ops.c
+++ b/src/emu/cpu/tms32051/32051ops.c
@@ -23,7 +23,7 @@ INLINE INT32 SUB(tms32051_state *cpustate, UINT32 a, UINT32 b)
// check overflow
if ((a ^ b) & (a ^ res) & 0x80000000)
{
- if (cpustate->st0.ovm) // overflow saturation mode
+ if (cpustate->st0.ovm) // overflow saturation mode
{
res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
}
@@ -45,7 +45,7 @@ INLINE INT32 ADD(tms32051_state *cpustate, UINT32 a, UINT32 b)
// check overflow
if ((a ^ res) & (b ^ res) & 0x80000000)
{
- if (cpustate->st0.ovm) // overflow saturation mode
+ if (cpustate->st0.ovm) // overflow saturation mode
{
res = ((INT32)(res) < 0) ? 0x7fffffff : 0x80000000;
}
@@ -103,7 +103,7 @@ INLINE void UPDATE_ARP(tms32051_state *cpustate, int nar)
static UINT16 GET_ADDRESS(tms32051_state *cpustate)
{
- if (cpustate->op & 0x80) // Indirect Addressing
+ if (cpustate->op & 0x80) // Indirect Addressing
{
UINT16 ea;
int arp = cpustate->st0.arp;
@@ -113,66 +113,66 @@ static UINT16 GET_ADDRESS(tms32051_state *cpustate)
switch ((cpustate->op >> 3) & 0xf)
{
- case 0x0: // * (no operation)
+ case 0x0: // * (no operation)
{
break;
}
- case 0x1: // *, ARn (NAR -> ARP)
+ case 0x1: // *, ARn (NAR -> ARP)
{
UPDATE_ARP(cpustate, nar);
break;
}
- case 0x2: // *- ((CurrentAR)-1 -> CurrentAR)
+ case 0x2: // *- ((CurrentAR)-1 -> CurrentAR)
{
UPDATE_AR(cpustate, arp, -1);
break;
}
- case 0x3: // *-, ARn ((CurrentAR)-1 -> CurrentAR, NAR -> ARP)
+ case 0x3: // *-, ARn ((CurrentAR)-1 -> CurrentAR, NAR -> ARP)
{
UPDATE_AR(cpustate, arp, -1);
UPDATE_ARP(cpustate, nar);
break;
}
- case 0x4: // *+ ((CurrentAR)+1 -> CurrentAR)
+ case 0x4: // *+ ((CurrentAR)+1 -> CurrentAR)
{
UPDATE_AR(cpustate, arp, 1);
break;
}
- case 0x5: // *+, ARn ((CurrentAR)+1 -> CurrentAR, NAR -> ARP)
+ case 0x5: // *+, ARn ((CurrentAR)+1 -> CurrentAR, NAR -> ARP)
{
UPDATE_AR(cpustate, arp, 1);
UPDATE_ARP(cpustate, nar);
break;
}
- case 0xa: // *0- ((CurrentAR) - INDX)
+ case 0xa: // *0- ((CurrentAR) - INDX)
{
UPDATE_AR(cpustate, arp, -cpustate->indx);
break;
}
- case 0xb: // *0-, ARn ((CurrentAR) - INDX -> CurrentAR, NAR -> ARP)
+ case 0xb: // *0-, ARn ((CurrentAR) - INDX -> CurrentAR, NAR -> ARP)
{
UPDATE_AR(cpustate, arp, -cpustate->indx);
UPDATE_ARP(cpustate, nar);
break;
}
- case 0xc: // *0+ ((CurrentAR) + INDX -> CurrentAR)
+ case 0xc: // *0+ ((CurrentAR) + INDX -> CurrentAR)
{
UPDATE_AR(cpustate, arp, cpustate->indx);
break;
}
- case 0xd: // *0+, ARn ((CurrentAR) + INDX -> CurrentAR, NAR -> ARP)
+ case 0xd: // *0+, ARn ((CurrentAR) + INDX -> CurrentAR, NAR -> ARP)
{
UPDATE_AR(cpustate, arp, cpustate->indx);
UPDATE_ARP(cpustate, nar);
break;
}
- default: fatalerror("32051: GET_ADDRESS: unimplemented indirect addressing mode %d at %04X (%04X)\n", (cpustate->op >> 3) & 0xf, cpustate->pc, cpustate->op);
+ default: fatalerror("32051: GET_ADDRESS: unimplemented indirect addressing mode %d at %04X (%04X)\n", (cpustate->op >> 3) & 0xf, cpustate->pc, cpustate->op);
}
return ea;
}
- else // Direct Addressing
+ else // Direct Addressing
{
return cpustate->st0.dp | (cpustate->op & 0x7f);
}
@@ -180,37 +180,37 @@ static UINT16 GET_ADDRESS(tms32051_state *cpustate)
INLINE int GET_ZLVC_CONDITION(tms32051_state *cpustate, int zlvc, int zlvc_mask)
{
- if (zlvc_mask & 0x2) // OV-bit
+ if (zlvc_mask & 0x2) // OV-bit
{
- if ((zlvc & 0x2) && cpustate->st0.ov) // OV
+ if ((zlvc & 0x2) && cpustate->st0.ov) // OV
{
// clear OV
cpustate->st0.ov = 0;
return 1;
}
- else if ((zlvc & 0x2) == 0 && cpustate->st0.ov == 0) // NOV
+ else if ((zlvc & 0x2) == 0 && cpustate->st0.ov == 0) // NOV
return 1;
}
- if (zlvc_mask & 0x1) // C-bit
+ if (zlvc_mask & 0x1) // C-bit
{
- if ((zlvc & 0x1) && cpustate->st1.c) // C
+ if ((zlvc & 0x1) && cpustate->st1.c) // C
return 1;
- else if ((zlvc & 0x1) == 0 && cpustate->st1.c == 0) // NC
+ else if ((zlvc & 0x1) == 0 && cpustate->st1.c == 0) // NC
return 1;
}
- if (zlvc_mask & 0x8) // Z-bit
+ if (zlvc_mask & 0x8) // Z-bit
{
- if ((zlvc & 0x8) && (INT32)(cpustate->acc) == 0) // EQ
+ if ((zlvc & 0x8) && (INT32)(cpustate->acc) == 0) // EQ
return 1;
- else if ((zlvc & 0x8) == 0 && (INT32)(cpustate->acc) != 0) // NEQ
+ else if ((zlvc & 0x8) == 0 && (INT32)(cpustate->acc) != 0) // NEQ
return 1;
}
- if (zlvc_mask & 0x4) // L-bit
+ if (zlvc_mask & 0x4) // L-bit
{
- if ((zlvc & 0x4) && (INT32)(cpustate->acc) < 0) // LT
+ if ((zlvc & 0x4) && (INT32)(cpustate->acc) < 0) // LT
return 1;
- else if ((zlvc & 0x4) == 0 && (INT32)(cpustate->acc) > 0) // GT
+ else if ((zlvc & 0x4) == 0 && (INT32)(cpustate->acc) > 0) // GT
return 1;
}
return 0;
@@ -220,20 +220,20 @@ INLINE int GET_TP_CONDITION(tms32051_state *cpustate, int tp)
{
switch (tp)
{
- case 0: // BIO pin low
+ case 0: // BIO pin low
{
// TODO
return 0;
}
- case 1: // TC = 1
+ case 1: // TC = 1
{
return cpustate->st1.tc;
}
- case 2: // TC = 0
+ case 2: // TC = 0
{
return cpustate->st1.tc ^ 1;
}
- case 3: // always false
+ case 3: // always false
{
return 0;
}
@@ -245,19 +245,19 @@ INLINE INT32 PREG_PSCALER(tms32051_state *cpustate, INT32 preg)
{
switch (cpustate->st1.pm & 3)
{
- case 0: // No shift
+ case 0: // No shift
{
return preg;
}
- case 1: // Left-shifted 1 bit, LSB zero-filled
+ case 1: // Left-shifted 1 bit, LSB zero-filled
{
return preg << 1;
}
- case 2: // Left-shifted 4 bits, 4 LSBs zero-filled
+ case 2: // Left-shifted 4 bits, 4 LSBs zero-filled
{
return preg << 4;
}
- case 3: // Right-shifted 6 bits, sign-extended, 6 LSBs lost
+ case 3: // Right-shifted 6 bits, sign-extended, 6 LSBs lost
{
return (INT32)(preg >> 6);
}
@@ -844,7 +844,7 @@ static void op_cmpr(tms32051_state *cpustate)
switch (cpustate->op & 0x3)
{
- case 0: // (CurrentAR) == ARCR
+ case 0: // (CurrentAR) == ARCR
{
if (cpustate->ar[cpustate->st0.arp] == cpustate->arcr)
{
@@ -852,7 +852,7 @@ static void op_cmpr(tms32051_state *cpustate)
}
break;
}
- case 1: // (CurrentAR) < ARCR
+ case 1: // (CurrentAR) < ARCR
{
if (cpustate->ar[cpustate->st0.arp] < cpustate->arcr)
{
@@ -860,7 +860,7 @@ static void op_cmpr(tms32051_state *cpustate)
}
break;
}
- case 2: // (CurrentAR) > ARCR
+ case 2: // (CurrentAR) > ARCR
{
if (cpustate->ar[cpustate->st0.arp] > cpustate->arcr)
{
@@ -868,7 +868,7 @@ static void op_cmpr(tms32051_state *cpustate)
}
break;
}
- case 3: // (CurrentAR) != ARCR
+ case 3: // (CurrentAR) != ARCR
{
if (cpustate->ar[cpustate->st0.arp] != cpustate->arcr)
{
@@ -953,7 +953,7 @@ static void op_sbrk(tms32051_state *cpustate)
static void op_b(tms32051_state *cpustate)
{
UINT16 pma = ROPCODE(cpustate);
- GET_ADDRESS(cpustate); // update AR/ARP
+ GET_ADDRESS(cpustate); // update AR/ARP
CHANGE_PC(cpustate, pma);
CYCLES(4);
@@ -990,7 +990,7 @@ static void op_banz(tms32051_state *cpustate)
CYCLES(2);
}
- GET_ADDRESS(cpustate); // modify AR/ARP
+ GET_ADDRESS(cpustate); // modify AR/ARP
}
static void op_banzd(tms32051_state *cpustate)
@@ -1032,7 +1032,7 @@ static void op_bcndd(tms32051_state *cpustate)
static void op_bd(tms32051_state *cpustate)
{
UINT16 pma = ROPCODE(cpustate);
- GET_ADDRESS(cpustate); // update AR/ARP
+ GET_ADDRESS(cpustate); // update AR/ARP
delay_slot(cpustate, cpustate->pc);
CHANGE_PC(cpustate, pma);
@@ -1062,7 +1062,7 @@ static void op_calad(tms32051_state *cpustate)
static void op_call(tms32051_state *cpustate)
{
UINT16 pma = ROPCODE(cpustate);
- GET_ADDRESS(cpustate); // update AR/ARP
+ GET_ADDRESS(cpustate); // update AR/ARP
PUSH_STACK(cpustate, cpustate->pc);
CHANGE_PC(cpustate, pma);
@@ -1073,7 +1073,7 @@ static void op_call(tms32051_state *cpustate)
static void op_calld(tms32051_state *cpustate)
{
UINT16 pma = ROPCODE(cpustate);
- GET_ADDRESS(cpustate); // update AR/ARP
+ GET_ADDRESS(cpustate); // update AR/ARP
PUSH_STACK(cpustate, cpustate->pc+2);
delay_slot(cpustate, cpustate->pc);
diff --git a/src/emu/cpu/tms32051/32051ops.h b/src/emu/cpu/tms32051/32051ops.h
index 9517104f3ef..2acef433ee9 100644
--- a/src/emu/cpu/tms32051/32051ops.h
+++ b/src/emu/cpu/tms32051/32051ops.h
@@ -1,251 +1,251 @@
static void (*const tms32051_opcode_table[256])(tms32051_state *cpustate) =
{
/* 0x00 - 0x0f */
- op_lar_mem, op_lar_mem, op_lar_mem, op_lar_mem,
- op_lar_mem, op_lar_mem, op_lar_mem, op_lar_mem,
- op_lamm, op_smmr, op_subc, op_rpt_mem,
- op_out, op_ldp_mem, op_lst_st0, op_lst_st1,
+ op_lar_mem, op_lar_mem, op_lar_mem, op_lar_mem,
+ op_lar_mem, op_lar_mem, op_lar_mem, op_lar_mem,
+ op_lamm, op_smmr, op_subc, op_rpt_mem,
+ op_out, op_ldp_mem, op_lst_st0, op_lst_st1,
/* 0x10 - 0x1f */
- op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
- op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
- op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
- op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
+ op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
+ op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
+ op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
+ op_lacc_mem, op_lacc_mem, op_lacc_mem, op_lacc_mem,
/* 0x20 - 0x2f */
- op_add_mem, op_add_mem, op_add_mem, op_add_mem,
- op_add_mem, op_add_mem, op_add_mem, op_add_mem,
- op_add_mem, op_add_mem, op_add_mem, op_add_mem,
- op_add_mem, op_add_mem, op_add_mem, op_add_mem,
+ op_add_mem, op_add_mem, op_add_mem, op_add_mem,
+ op_add_mem, op_add_mem, op_add_mem, op_add_mem,
+ op_add_mem, op_add_mem, op_add_mem, op_add_mem,
+ op_add_mem, op_add_mem, op_add_mem, op_add_mem,
/* 0x30 - 0x3f */
- op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
- op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
- op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
- op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
+ op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
+ op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
+ op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
+ op_sub_mem, op_sub_mem, op_sub_mem, op_sub_mem,
/* 0x40 - 0x4f */
- op_bit, op_bit, op_bit, op_bit,
- op_bit, op_bit, op_bit, op_bit,
- op_bit, op_bit, op_bit, op_bit,
- op_bit, op_bit, op_bit, op_bit,
+ op_bit, op_bit, op_bit, op_bit,
+ op_bit, op_bit, op_bit, op_bit,
+ op_bit, op_bit, op_bit, op_bit,
+ op_bit, op_bit, op_bit, op_bit,
/* 0x50 - 0x5f */
- op_mpya, op_mpys, op_sqra, op_sqrs,
- op_mpy_mem, op_mpyu, op_invalid, op_bldp,
- op_xpl_dbmr, op_opl_dbmr, op_apl_dbmr, op_cpl_dbmr,
- op_xpl_imm, op_opl_imm, op_apl_imm, op_cpl_imm,
+ op_mpya, op_mpys, op_sqra, op_sqrs,
+ op_mpy_mem, op_mpyu, op_invalid, op_bldp,
+ op_xpl_dbmr, op_opl_dbmr, op_apl_dbmr, op_cpl_dbmr,
+ op_xpl_imm, op_opl_imm, op_apl_imm, op_cpl_imm,
/* 0x60 - 0x6f */
- op_addc, op_add_s16_mem, op_adds, op_addt,
- op_subb, op_sub_s16_mem, op_subs, op_subt,
- op_zalr, op_lacl_mem, op_lacc_s16_mem,op_lact,
- op_xor_mem, op_or_mem, op_and_mem, op_bitt,
+ op_addc, op_add_s16_mem, op_adds, op_addt,
+ op_subb, op_sub_s16_mem, op_subs, op_subt,
+ op_zalr, op_lacl_mem, op_lacc_s16_mem,op_lact,
+ op_xor_mem, op_or_mem, op_and_mem, op_bitt,
/* 0x70 - 0x7f */
- op_lta, op_ltp, op_ltd, op_lt,
- op_lts, op_lph, op_pshd, op_dmov,
- op_adrk, op_b, op_call, op_banz,
- op_sbrk, op_bd, op_calld, op_banzd,
+ op_lta, op_ltp, op_ltd, op_lt,
+ op_lts, op_lph, op_pshd, op_dmov,
+ op_adrk, op_b, op_call, op_banz,
+ op_sbrk, op_bd, op_calld, op_banzd,
/* 0x80 - 0x8f */
- op_sar, op_sar, op_sar, op_sar,
- op_sar, op_sar, op_sar, op_sar,
- op_samm, op_lmmr, op_popd, op_mar,
- op_spl, op_sph, op_sst_st0, op_sst_st1,
+ op_sar, op_sar, op_sar, op_sar,
+ op_sar, op_sar, op_sar, op_sar,
+ op_samm, op_lmmr, op_popd, op_mar,
+ op_spl, op_sph, op_sst_st0, op_sst_st1,
/* 0x90 - 0x9f */
- op_sacl, op_sacl, op_sacl, op_sacl,
- op_sacl, op_sacl, op_sacl, op_sacl,
- op_sach, op_sach, op_sach, op_sach,
- op_sach, op_sach, op_sach, op_sach,
+ op_sacl, op_sacl, op_sacl, op_sacl,
+ op_sacl, op_sacl, op_sacl, op_sacl,
+ op_sach, op_sach, op_sach, op_sach,
+ op_sach, op_sach, op_sach, op_sach,
/* 0xa0 - 0xaf */
- op_norm, op_invalid, op_mac, op_macd,
- op_blpd_bmar, op_blpd_imm, op_tblr, op_tblw,
- op_bldd_slimm, op_bldd_dlimm, op_mads, op_madd,
- op_bldd_sbmar, op_bldd_dbmar, op_splk, op_in,
+ op_norm, op_invalid, op_mac, op_macd,
+ op_blpd_bmar, op_blpd_imm, op_tblr, op_tblw,
+ op_bldd_slimm, op_bldd_dlimm, op_mads, op_madd,
+ op_bldd_sbmar, op_bldd_dbmar, op_splk, op_in,
/* 0xb0 - 0xbf */
- op_lar_simm, op_lar_simm, op_lar_simm, op_lar_simm,
- op_lar_simm, op_lar_simm, op_lar_simm, op_lar_simm,
- op_add_simm, op_lacl_simm, op_sub_simm, op_rpt_simm,
- op_ldp_imm, op_ldp_imm, op_group_be, op_group_bf,
+ op_lar_simm, op_lar_simm, op_lar_simm, op_lar_simm,
+ op_lar_simm, op_lar_simm, op_lar_simm, op_lar_simm,
+ op_add_simm, op_lacl_simm, op_sub_simm, op_rpt_simm,
+ op_ldp_imm, op_ldp_imm, op_group_be, op_group_bf,
/* 0xc0 - 0xcf */
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
/* 0xd0 - 0xdf */
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
- op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
+ op_mpy_simm, op_mpy_simm, op_mpy_simm, op_mpy_simm,
/* 0xe0 - 0xef */
- op_bcnd, op_bcnd, op_bcnd, op_bcnd,
- op_xc, op_xc, op_xc, op_xc,
- op_cc, op_cc, op_cc, op_cc,
- op_retc, op_retc, op_retc, op_retc,
+ op_bcnd, op_bcnd, op_bcnd, op_bcnd,
+ op_xc, op_xc, op_xc, op_xc,
+ op_cc, op_cc, op_cc, op_cc,
+ op_retc, op_retc, op_retc, op_retc,
/* 0xf0 - 0xff */
- op_bcndd, op_bcndd, op_bcndd, op_bcndd,
- op_xc, op_xc, op_xc, op_xc,
- op_ccd, op_ccd, op_ccd, op_ccd,
- op_retcd, op_retcd, op_retcd, op_retcd
+ op_bcndd, op_bcndd, op_bcndd, op_bcndd,
+ op_xc, op_xc, op_xc, op_xc,
+ op_ccd, op_ccd, op_ccd, op_ccd,
+ op_retcd, op_retcd, op_retcd, op_retcd
};
static void (*const tms32051_opcode_table_be[256])(tms32051_state *cpustate) =
{
/* 0x00 - 0x0f */
- op_abs, op_cmpl, op_neg, op_pac,
- op_apac, op_spac, op_invalid, op_invalid,
- op_invalid, op_sfl, op_sfr, op_invalid,
- op_rol, op_ror, op_invalid, op_invalid,
+ op_abs, op_cmpl, op_neg, op_pac,
+ op_apac, op_spac, op_invalid, op_invalid,
+ op_invalid, op_sfl, op_sfr, op_invalid,
+ op_rol, op_ror, op_invalid, op_invalid,
/* 0x10 - 0x1f */
- op_addb, op_adcb, op_andb, op_orb,
- op_rolb, op_rorb, op_sflb, op_sfrb,
- op_sbb, op_sbbb, op_xorb, op_crgt,
- op_crlt, op_exar, op_sacb, op_lacb,
+ op_addb, op_adcb, op_andb, op_orb,
+ op_rolb, op_rorb, op_sflb, op_sfrb,
+ op_sbb, op_sbbb, op_xorb, op_crgt,
+ op_crlt, op_exar, op_sacb, op_lacb,
/* 0x20 - 0x2f */
- op_bacc, op_baccd, op_idle, op_idle2,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_bacc, op_baccd, op_idle, op_idle2,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x30 - 0x3f */
- op_cala, op_invalid, op_pop, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_reti, op_invalid, op_rete, op_invalid,
- op_push, op_calad, op_invalid, op_invalid,
+ op_cala, op_invalid, op_pop, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_reti, op_invalid, op_rete, op_invalid,
+ op_push, op_calad, op_invalid, op_invalid,
/* 0x40 - 0x4f */
- op_clrc_intm, op_setc_intm, op_clrc_ov, op_setc_ov,
- op_clrc_cnf, op_setc_cnf, op_clrc_ext, op_setc_ext,
- op_clrc_hold, op_setc_hold, op_clrc_tc, op_setc_tc,
- op_clrc_xf, op_setc_xf, op_clrc_carry, op_setc_carry,
+ op_clrc_intm, op_setc_intm, op_clrc_ov, op_setc_ov,
+ op_clrc_cnf, op_setc_cnf, op_clrc_ext, op_setc_ext,
+ op_clrc_hold, op_setc_hold, op_clrc_tc, op_setc_tc,
+ op_clrc_xf, op_setc_xf, op_clrc_carry, op_setc_carry,
/* 0x50 - 0x5f */
- op_invalid, op_trap, op_nmi, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_zpr, op_zap, op_sath, op_satl,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_trap, op_nmi, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_zpr, op_zap, op_sath, op_satl,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x60 - 0x6f */
- op_intr, op_intr, op_intr, op_intr,
- op_intr, op_intr, op_intr, op_intr,
- op_intr, op_intr, op_intr, op_intr,
- op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
/* 0x70 - 0x7f */
- op_intr, op_intr, op_intr, op_intr,
- op_intr, op_intr, op_intr, op_intr,
- op_intr, op_intr, op_intr, op_intr,
- op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
+ op_intr, op_intr, op_intr, op_intr,
/* 0x80 - 0x8f */
- op_mpy_limm, op_and_s16_limm,op_or_s16_limm, op_xor_s16_limm,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_mpy_limm, op_and_s16_limm,op_or_s16_limm, op_xor_s16_limm,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x90 - 0x9f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0xa0 - 0xaf */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0xb0 - 0xbf */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0xc0 - 0xcf */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_rpt_limm, op_rptz, op_rptb, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_rpt_limm, op_rptz, op_rptb, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0xd0 - 0xdf */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0xe0 - 0xef */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0xf0 - 0xff */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
};
static void (*const tms32051_opcode_table_bf[256])(tms32051_state *cpustate) =
{
/* 0x00 - 0x0f */
- op_spm, op_spm, op_spm, op_spm,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_lar_limm, op_lar_limm, op_lar_limm, op_lar_limm,
- op_lar_limm, op_lar_limm, op_lar_limm, op_lar_limm,
+ op_spm, op_spm, op_spm, op_spm,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_lar_limm, op_lar_limm, op_lar_limm, op_lar_limm,
+ op_lar_limm, op_lar_limm, op_lar_limm, op_lar_limm,
/* 0x10 - 0x1f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x20 - 0x2f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x30 - 0x3f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x40 - 0x4f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_cmpr, op_cmpr, op_cmpr, op_cmpr,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_cmpr, op_cmpr, op_cmpr, op_cmpr,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x50 - 0x5f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x60 - 0x6f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x70 - 0x7f */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
/* 0x80 - 0x8f */
- op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
- op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
- op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
- op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
+ op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
+ op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
+ op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
+ op_lacc_limm, op_lacc_limm, op_lacc_limm, op_lacc_limm,
/* 0x90 - 0x9f */
- op_add_limm, op_add_limm, op_add_limm, op_add_limm,
- op_add_limm, op_add_limm, op_add_limm, op_add_limm,
- op_add_limm, op_add_limm, op_add_limm, op_add_limm,
- op_add_limm, op_add_limm, op_add_limm, op_add_limm,
+ op_add_limm, op_add_limm, op_add_limm, op_add_limm,
+ op_add_limm, op_add_limm, op_add_limm, op_add_limm,
+ op_add_limm, op_add_limm, op_add_limm, op_add_limm,
+ op_add_limm, op_add_limm, op_add_limm, op_add_limm,
/* 0xa0 - 0xaf */
- op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
- op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
- op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
- op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
+ op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
+ op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
+ op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
+ op_sub_limm, op_sub_limm, op_sub_limm, op_sub_limm,
/* 0xb0 - 0xbf */
- op_and_limm, op_and_limm, op_and_limm, op_and_limm,
- op_and_limm, op_and_limm, op_and_limm, op_and_limm,
- op_and_limm, op_and_limm, op_and_limm, op_and_limm,
- op_and_limm, op_and_limm, op_and_limm, op_and_limm,
+ op_and_limm, op_and_limm, op_and_limm, op_and_limm,
+ op_and_limm, op_and_limm, op_and_limm, op_and_limm,
+ op_and_limm, op_and_limm, op_and_limm, op_and_limm,
+ op_and_limm, op_and_limm, op_and_limm, op_and_limm,
/* 0xc0 - 0xcf */
- op_or_limm, op_or_limm, op_or_limm, op_or_limm,
- op_or_limm, op_or_limm, op_or_limm, op_or_limm,
- op_or_limm, op_or_limm, op_or_limm, op_or_limm,
- op_or_limm, op_or_limm, op_or_limm, op_or_limm,
+ op_or_limm, op_or_limm, op_or_limm, op_or_limm,
+ op_or_limm, op_or_limm, op_or_limm, op_or_limm,
+ op_or_limm, op_or_limm, op_or_limm, op_or_limm,
+ op_or_limm, op_or_limm, op_or_limm, op_or_limm,
/* 0xd0 - 0xdf */
- op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
- op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
- op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
- op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
+ op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
+ op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
+ op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
+ op_xor_limm, op_xor_limm, op_xor_limm, op_xor_limm,
/* 0xe0 - 0xef */
- op_bsar, op_bsar, op_bsar, op_bsar,
- op_bsar, op_bsar, op_bsar, op_bsar,
- op_bsar, op_bsar, op_bsar, op_bsar,
- op_bsar, op_bsar, op_bsar, op_bsar,
+ op_bsar, op_bsar, op_bsar, op_bsar,
+ op_bsar, op_bsar, op_bsar, op_bsar,
+ op_bsar, op_bsar, op_bsar, op_bsar,
+ op_bsar, op_bsar, op_bsar, op_bsar,
/* 0xf0 - 0xff */
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
- op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
+ op_invalid, op_invalid, op_invalid, op_invalid,
};
diff --git a/src/emu/cpu/tms32051/dis32051.c b/src/emu/cpu/tms32051/dis32051.c
index 6c907673b95..336d9aec561 100644
--- a/src/emu/cpu/tms32051/dis32051.c
+++ b/src/emu/cpu/tms32051/dis32051.c
@@ -5,42 +5,42 @@
static const char *const zl_condition_codes[] =
{
// bit 3, 2 (ZL), bit 1, 0 (MASK)
- "", // Z=0, L=0, ZM=0, ZL=0
- "gt", // Z=0, L=0, ZM=0, ZL=1
- "neq", // Z=0, L=0, ZM=1, ZL=0
- "gt", // Z=0, L=0, ZM=1, ZL=1
- "", // Z=0, L=1, ZM=0, ZL=0
- "lt", // Z=0, L=1, ZM=0, ZL=1
- "neq", // Z=0, L=1, ZM=1, ZL=0
- "lt", // Z=0, L=1, ZM=1, ZL=1
- "", // Z=1, L=0, ZM=0, ZL=0
- "gt", // Z=1, L=0, ZM=0, ZL=1
- "eq", // Z=1, L=0, ZM=1, ZL=0
- "geq", // Z=1, L=0, ZM=1, ZL=1
- "", // Z=1, L=1, ZM=0, ZL=0
- "lt", // Z=1, L=1, ZM=0, ZL=1
- "eq", // Z=1, L=1, ZM=1, ZL=0
- "leq", // Z=1, L=1, ZM=1, ZL=1
+ "", // Z=0, L=0, ZM=0, ZL=0
+ "gt", // Z=0, L=0, ZM=0, ZL=1
+ "neq", // Z=0, L=0, ZM=1, ZL=0
+ "gt", // Z=0, L=0, ZM=1, ZL=1
+ "", // Z=0, L=1, ZM=0, ZL=0
+ "lt", // Z=0, L=1, ZM=0, ZL=1
+ "neq", // Z=0, L=1, ZM=1, ZL=0
+ "lt", // Z=0, L=1, ZM=1, ZL=1
+ "", // Z=1, L=0, ZM=0, ZL=0
+ "gt", // Z=1, L=0, ZM=0, ZL=1
+ "eq", // Z=1, L=0, ZM=1, ZL=0
+ "geq", // Z=1, L=0, ZM=1, ZL=1
+ "", // Z=1, L=1, ZM=0, ZL=0
+ "lt", // Z=1, L=1, ZM=0, ZL=1
+ "eq", // Z=1, L=1, ZM=1, ZL=0
+ "leq", // Z=1, L=1, ZM=1, ZL=1
};
static const char *const cv_condition_codes[16] =
{
- "", // C=0, V=0, CM=0, VM=0
- "nov", // C=0, V=0, CM=0, VM=1
- "nc", // C=0, V=0, CM=1, VM=0
- "nc nov", // C=0, V=0, CM=1, VM=1
- "", // C=0, V=1, CM=0, VM=0
- "ov", // C=0, V=1, CM=0, VM=1
- "nc", // C=0, V=1, CM=1, VM=0
- "nc ov", // C=0, V=1, CM=1, VM=1
- "", // C=1, V=0, CM=0, VM=0
- "nov", // C=1, V=0, CM=0, VM=1
- "c", // C=1, V=0, CM=1, VM=0
- "c nov", // C=1, V=0, CM=1, VM=1
- "", // C=1, V=1, CM=0, VM=0
- "ov", // C=1, V=1, CM=0, VM=1
- "c", // C=1, V=1, CM=1, VM=0
- "c ov", // C=1, V=1, CM=1, VM=1
+ "", // C=0, V=0, CM=0, VM=0
+ "nov", // C=0, V=0, CM=0, VM=1
+ "nc", // C=0, V=0, CM=1, VM=0
+ "nc nov", // C=0, V=0, CM=1, VM=1
+ "", // C=0, V=1, CM=0, VM=0
+ "ov", // C=0, V=1, CM=0, VM=1
+ "nc", // C=0, V=1, CM=1, VM=0
+ "nc ov", // C=0, V=1, CM=1, VM=1
+ "", // C=1, V=0, CM=0, VM=0
+ "nov", // C=1, V=0, CM=0, VM=1
+ "c", // C=1, V=0, CM=1, VM=0
+ "c nov", // C=1, V=0, CM=1, VM=1
+ "", // C=1, V=1, CM=0, VM=0
+ "ov", // C=1, V=1, CM=0, VM=1
+ "c", // C=1, V=1, CM=1, VM=0
+ "c ov", // C=1, V=1, CM=1, VM=1
};
static const char *const tp_condition_codes[4] =
@@ -78,32 +78,32 @@ static char *GET_ADDRESS(int addr_mode, int address)
{
static char buffer[100];
- if (addr_mode) // Indirect addressing
+ if (addr_mode) // Indirect addressing
{
int nar = address & 0x7;
switch ((address >> 3) & 0xf)
{
- case 0x0: sprintf(buffer, "*"); break;
- case 0x1: sprintf(buffer, "*, ar%d", nar); break;
- case 0x2: sprintf(buffer, "*-"); break;
- case 0x3: sprintf(buffer, "*-, ar%d", nar); break;
- case 0x4: sprintf(buffer, "*+"); break;
- case 0x5: sprintf(buffer, "*+, ar%d", nar); break;
- case 0x8: sprintf(buffer, "*br0-"); break;
- case 0x9: sprintf(buffer, "*br0-, ar%d", nar); break;
- case 0xa: sprintf(buffer, "*0-"); break;
- case 0xb: sprintf(buffer, "*0-, ar%d", nar); break;
- case 0xc: sprintf(buffer, "*0+"); break;
- case 0xd: sprintf(buffer, "*0+, ar%d", nar); break;
- case 0xe: sprintf(buffer, "*br0+"); break;
- case 0xf: sprintf(buffer, "*br0+, ar%d", nar); break;
-
- default: sprintf(buffer, "??? (indirect)"); break;
+ case 0x0: sprintf(buffer, "*"); break;
+ case 0x1: sprintf(buffer, "*, ar%d", nar); break;
+ case 0x2: sprintf(buffer, "*-"); break;
+ case 0x3: sprintf(buffer, "*-, ar%d", nar); break;
+ case 0x4: sprintf(buffer, "*+"); break;
+ case 0x5: sprintf(buffer, "*+, ar%d", nar); break;
+ case 0x8: sprintf(buffer, "*br0-"); break;
+ case 0x9: sprintf(buffer, "*br0-, ar%d", nar); break;
+ case 0xa: sprintf(buffer, "*0-"); break;
+ case 0xb: sprintf(buffer, "*0-, ar%d", nar); break;
+ case 0xc: sprintf(buffer, "*0+"); break;
+ case 0xd: sprintf(buffer, "*0+, ar%d", nar); break;
+ case 0xe: sprintf(buffer, "*br0+"); break;
+ case 0xf: sprintf(buffer, "*br0+, ar%d", nar); break;
+
+ default: sprintf(buffer, "??? (indirect)"); break;
}
}
- else // Direct addressing
+ else // Direct addressing
{
sprintf(buffer, "#%02X", address);
}
@@ -132,64 +132,64 @@ static void dasm_group_be(UINT16 opcode)
switch (subop)
{
- case 0x00: print("abs"); break;
- case 0x01: print("cmpl"); break;
- case 0x02: print("neg"); break;
- case 0x03: print("pac"); break;
- case 0x04: print("apac"); break;
- case 0x05: print("spac"); break;
- case 0x09: print("sfl"); break;
- case 0x0a: print("sfr"); break;
- case 0x0c: print("rol"); break;
- case 0x0d: print("ror"); break;
- case 0x10: print("addb"); break;
- case 0x11: print("adcb"); break;
- case 0x12: print("andb"); break;
- case 0x13: print("orb"); break;
- case 0x14: print("rolb"); break;
- case 0x15: print("rorb"); break;
- case 0x16: print("sflb"); break;
- case 0x17: print("sfrb"); break;
- case 0x18: print("sbb"); break;
- case 0x19: print("sbbb"); break;
- case 0x1a: print("xorb"); break;
- case 0x1b: print("crgt"); break;
- case 0x1c: print("crlt"); break;
- case 0x1d: print("exar"); break;
- case 0x1e: print("sacb"); break;
- case 0x1f: print("lacb"); break;
- case 0x20: print("bacc"); break;
- case 0x21: print("baccd"); break;
- case 0x22: print("idle"); break;
- case 0x23: print("idle2"); break;
- case 0x30: print("cala"); break;
- case 0x32: print("pop"); break;
- case 0x38: print("reti"); break;
- case 0x3a: print("rete"); break;
- case 0x3c: print("push"); break;
- case 0x3d: print("calad"); break;
- case 0x40: print("clrc intm"); break;
- case 0x41: print("setc intm"); break;
- case 0x42: print("clrc ovm"); break;
- case 0x43: print("setc ovm"); break;
- case 0x44: print("clrc cnf"); break;
- case 0x45: print("setc cnf"); break;
- case 0x46: print("clrc sxm"); break;
- case 0x47: print("setc sxm"); break;
- case 0x48: print("clrc hold"); break;
- case 0x49: print("setc hold"); break;
- case 0x4a: print("clrc tc"); break;
- case 0x4b: print("setc tc"); break;
- case 0x4c: print("clrc xf"); break;
- case 0x4d: print("setc xf"); break;
- case 0x4e: print("clrc carry"); break;
- case 0x4f: print("setc carry"); break;
- case 0x51: print("trap"); break;
- case 0x52: print("nmi"); break;
- case 0x58: print("zpr"); break;
- case 0x59: print("zap"); break;
- case 0x5a: print("sath"); break;
- case 0x5b: print("satl"); break;
+ case 0x00: print("abs"); break;
+ case 0x01: print("cmpl"); break;
+ case 0x02: print("neg"); break;
+ case 0x03: print("pac"); break;
+ case 0x04: print("apac"); break;
+ case 0x05: print("spac"); break;
+ case 0x09: print("sfl"); break;
+ case 0x0a: print("sfr"); break;
+ case 0x0c: print("rol"); break;
+ case 0x0d: print("ror"); break;
+ case 0x10: print("addb"); break;
+ case 0x11: print("adcb"); break;
+ case 0x12: print("andb"); break;
+ case 0x13: print("orb"); break;
+ case 0x14: print("rolb"); break;
+ case 0x15: print("rorb"); break;
+ case 0x16: print("sflb"); break;
+ case 0x17: print("sfrb"); break;
+ case 0x18: print("sbb"); break;
+ case 0x19: print("sbbb"); break;
+ case 0x1a: print("xorb"); break;
+ case 0x1b: print("crgt"); break;
+ case 0x1c: print("crlt"); break;
+ case 0x1d: print("exar"); break;
+ case 0x1e: print("sacb"); break;
+ case 0x1f: print("lacb"); break;
+ case 0x20: print("bacc"); break;
+ case 0x21: print("baccd"); break;
+ case 0x22: print("idle"); break;
+ case 0x23: print("idle2"); break;
+ case 0x30: print("cala"); break;
+ case 0x32: print("pop"); break;
+ case 0x38: print("reti"); break;
+ case 0x3a: print("rete"); break;
+ case 0x3c: print("push"); break;
+ case 0x3d: print("calad"); break;
+ case 0x40: print("clrc intm"); break;
+ case 0x41: print("setc intm"); break;
+ case 0x42: print("clrc ovm"); break;
+ case 0x43: print("setc ovm"); break;
+ case 0x44: print("clrc cnf"); break;
+ case 0x45: print("setc cnf"); break;
+ case 0x46: print("clrc sxm"); break;
+ case 0x47: print("setc sxm"); break;
+ case 0x48: print("clrc hold"); break;
+ case 0x49: print("setc hold"); break;
+ case 0x4a: print("clrc tc"); break;
+ case 0x4b: print("setc tc"); break;
+ case 0x4c: print("clrc xf"); break;
+ case 0x4d: print("setc xf"); break;
+ case 0x4e: print("clrc carry"); break;
+ case 0x4f: print("setc carry"); break;
+ case 0x51: print("trap"); break;
+ case 0x52: print("nmi"); break;
+ case 0x58: print("zpr"); break;
+ case 0x59: print("zap"); break;
+ case 0x5a: print("sath"); break;
+ case 0x5b: print("satl"); break;
case 0x60: case 0x61: case 0x62: case 0x63:
case 0x64: case 0x65: case 0x66: case 0x67:
case 0x68: case 0x69: case 0x6a: case 0x6b:
@@ -200,15 +200,15 @@ static void dasm_group_be(UINT16 opcode)
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
print("intr %d", opcode & 0x1f); break;
- case 0x80: print("mpy #%04X", FETCH()); break;
- case 0x81: print("and #%04X", FETCH() << 16); break;
- case 0x82: print("or #%04X", FETCH() << 16); break;
- case 0x83: print("xor #%04X", FETCH() << 16); break;
- case 0xc4: print("rpt #%04X", FETCH()); break;
- case 0xc5: print("rpt #%04X", FETCH()); break;
- case 0xc6: print("rpt #%04X", FETCH()); break;
+ case 0x80: print("mpy #%04X", FETCH()); break;
+ case 0x81: print("and #%04X", FETCH() << 16); break;
+ case 0x82: print("or #%04X", FETCH() << 16); break;
+ case 0x83: print("xor #%04X", FETCH() << 16); break;
+ case 0xc4: print("rpt #%04X", FETCH()); break;
+ case 0xc5: print("rpt #%04X", FETCH()); break;
+ case 0xc6: print("rpt #%04X", FETCH()); break;
- default: print("??? (group be)"); break;
+ default: print("??? (group be)"); break;
}
}
@@ -244,15 +244,15 @@ static void dasm_group_bf(UINT16 opcode)
break;
}
- case 0x8: print("lacc #%04X", FETCH() << shift); break;
- case 0x9: print("add #%04X", FETCH() << shift); break;
- case 0xa: print("sub #%04X", FETCH() << shift); break;
- case 0xb: print("and #%04X", FETCH() << shift); break;
- case 0xc: print("or #%04X", FETCH() << shift); break;
- case 0xd: print("xor #%04X", FETCH() << shift); break;
- case 0xe: print("bsar %d", shift+1); break;
+ case 0x8: print("lacc #%04X", FETCH() << shift); break;
+ case 0x9: print("add #%04X", FETCH() << shift); break;
+ case 0xa: print("sub #%04X", FETCH() << shift); break;
+ case 0xb: print("and #%04X", FETCH() << shift); break;
+ case 0xc: print("or #%04X", FETCH() << shift); break;
+ case 0xd: print("xor #%04X", FETCH() << shift); break;
+ case 0xe: print("bsar %d", shift+1); break;
- default: print("??? (group bf)"); break;
+ default: print("??? (group bf)"); break;
}
}
@@ -279,17 +279,17 @@ CPU_DISASSEMBLE( tms32051 )
case 0x00: case 0x01: case 0x02: case 0x03:
case 0x04: case 0x05: case 0x06: case 0x07:
{
- print("lar ar%d, %s", (opcode >> 8) & 0x7, GET_ADDRESS(addr_mode, address));
+ print("lar ar%d, %s", (opcode >> 8) & 0x7, GET_ADDRESS(addr_mode, address));
break;
}
- case 0x08: print("lamm %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x09: print("smmr %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x0a: print("subc %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x0b: print("rpt %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x0c: print("out %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0x0d: print("ldp %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x0e: print("lst 0, %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x0f: print("lst 1, %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x08: print("lamm %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x09: print("smmr %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x0a: print("subc %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x0b: print("rpt %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x0c: print("out %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0x0d: print("ldp %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x0e: print("lst 0, %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x0f: print("lst 1, %s", GET_ADDRESS(addr_mode, address)); break;
case 0x10: case 0x11: case 0x12: case 0x13:
case 0x14: case 0x15: case 0x16: case 0x17:
@@ -327,55 +327,55 @@ CPU_DISASSEMBLE( tms32051 )
break;
}
- case 0x50: print("mpya %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x51: print("mpys %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x52: print("sqra %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x53: print("sqrs %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x54: print("mpy %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x55: print("mpyu %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x57: print("bldp %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x58: print("xpl %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x59: print("opl %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x5a: print("apl %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x5b: print("cpl %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x5c: print("xpl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0x5d: print("opl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0x5e: print("apl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0x5f: print("cpl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
-
- case 0x60: print("addc %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x61: print("add %s << 16", GET_ADDRESS(addr_mode, address)); break;
- case 0x62: print("adds %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x63: print("addt %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x64: print("subb %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x65: print("sub %s << 16", GET_ADDRESS(addr_mode, address)); break;
- case 0x66: print("subs %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x67: print("subt %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x68: print("zalr %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x69: print("lacl %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x6a: print("lacc %s << 16", GET_ADDRESS(addr_mode, address)); break;
- case 0x6b: print("lact %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x6c: print("xor %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x6d: print("or %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x6e: print("and %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x6f: print("bitt %s", GET_ADDRESS(addr_mode, address)); break;
-
- case 0x70: print("lta %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x71: print("ltp %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x72: print("ltd %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x73: print("lt %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x74: print("lts %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x75: print("lph %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x76: print("pshd %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x77: print("dmov %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x78: print("adrk #%02X", opcode & 0xff); break;
- case 0x79: print("b %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
- case 0x7a: print("call %04X, %s", FETCH(), GET_ADDRESS(1, address)); flags = DASMFLAG_STEP_OVER; break;
- case 0x7b: print("banz %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
- case 0x7c: print("sbrk #%02X", opcode & 0xff); break;
- case 0x7d: print("bd %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
- case 0x7e: print("calld %04X, %s", FETCH(), GET_ADDRESS(1, address)); flags = DASMFLAG_STEP_OVER; break;
- case 0x7f: print("banzd %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
+ case 0x50: print("mpya %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x51: print("mpys %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x52: print("sqra %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x53: print("sqrs %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x54: print("mpy %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x55: print("mpyu %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x57: print("bldp %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x58: print("xpl %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x59: print("opl %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x5a: print("apl %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x5b: print("cpl %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x5c: print("xpl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0x5d: print("opl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0x5e: print("apl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0x5f: print("cpl %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+
+ case 0x60: print("addc %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x61: print("add %s << 16", GET_ADDRESS(addr_mode, address)); break;
+ case 0x62: print("adds %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x63: print("addt %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x64: print("subb %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x65: print("sub %s << 16", GET_ADDRESS(addr_mode, address)); break;
+ case 0x66: print("subs %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x67: print("subt %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x68: print("zalr %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x69: print("lacl %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x6a: print("lacc %s << 16", GET_ADDRESS(addr_mode, address)); break;
+ case 0x6b: print("lact %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x6c: print("xor %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x6d: print("or %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x6e: print("and %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x6f: print("bitt %s", GET_ADDRESS(addr_mode, address)); break;
+
+ case 0x70: print("lta %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x71: print("ltp %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x72: print("ltd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x73: print("lt %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x74: print("lts %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x75: print("lph %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x76: print("pshd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x77: print("dmov %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x78: print("adrk #%02X", opcode & 0xff); break;
+ case 0x79: print("b %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
+ case 0x7a: print("call %04X, %s", FETCH(), GET_ADDRESS(1, address)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x7b: print("banz %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
+ case 0x7c: print("sbrk #%02X", opcode & 0xff); break;
+ case 0x7d: print("bd %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
+ case 0x7e: print("calld %04X, %s", FETCH(), GET_ADDRESS(1, address)); flags = DASMFLAG_STEP_OVER; break;
+ case 0x7f: print("banzd %04X, %s", FETCH(), GET_ADDRESS(1, address)); break;
case 0x80: case 0x81: case 0x82: case 0x83:
case 0x84: case 0x85: case 0x86: case 0x87:
@@ -383,9 +383,9 @@ CPU_DISASSEMBLE( tms32051 )
print("sar ar%d, %s", (opcode >> 8) & 0x7, GET_ADDRESS(addr_mode, address));
break;
}
- case 0x88: print("samm %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x89: print("lmmr %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0x8a: print("popd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x88: print("samm %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x89: print("lmmr %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0x8a: print("popd %s", GET_ADDRESS(addr_mode, address)); break;
case 0x8b:
{
if ((opcode & 0xff) == 0)
@@ -398,10 +398,10 @@ CPU_DISASSEMBLE( tms32051 )
}
break;
}
- case 0x8c: print("spl %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x8d: print("sph %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x8e: print("sst 0, %s", GET_ADDRESS(addr_mode, address)); break;
- case 0x8f: print("sst 1, %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x8c: print("spl %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x8d: print("sph %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x8e: print("sst 0, %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0x8f: print("sst 1, %s", GET_ADDRESS(addr_mode, address)); break;
case 0x90: case 0x91: case 0x92: case 0x93:
case 0x94: case 0x95: case 0x96: case 0x97:
@@ -416,21 +416,21 @@ CPU_DISASSEMBLE( tms32051 )
break;
}
- case 0xa0: print("norm %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0xa2: print("mac %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0xa3: print("macd %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xa4: print("blpd %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xa5: print("blpd %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0xa6: print("tblr %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xa7: print("tblw %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xa8: print("bldd %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0xa9: print("bldd %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0xaa: print("mads %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xab: print("madd %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xac: print("bldd %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xad: print("bldd %s", GET_ADDRESS(addr_mode, address)); break;
- case 0xae: print("splk %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
- case 0xaf: print("in %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0xa0: print("norm %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0xa2: print("mac %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0xa3: print("macd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xa4: print("blpd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xa5: print("blpd %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0xa6: print("tblr %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xa7: print("tblw %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xa8: print("bldd %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0xa9: print("bldd %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0xaa: print("mads %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xab: print("madd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xac: print("bldd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xad: print("bldd %s", GET_ADDRESS(addr_mode, address)); break;
+ case 0xae: print("splk %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
+ case 0xaf: print("in %s, #%04X", GET_ADDRESS(addr_mode, address), FETCH()); break;
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
case 0xb4: case 0xb5: case 0xb6: case 0xb7:
@@ -438,10 +438,10 @@ CPU_DISASSEMBLE( tms32051 )
print("lar ar%d, #%02X", (opcode >> 8) & 0x7, opcode & 0xff);
break;
}
- case 0xb8: print("add #%02X", opcode & 0xff); break;
- case 0xb9: print("lacl #%02X", opcode & 0xff); break;
- case 0xba: print("sub #%02X", opcode & 0xff); break;
- case 0xbb: print("rpt #%02X", opcode & 0xff); break;
+ case 0xb8: print("add #%02X", opcode & 0xff); break;
+ case 0xb9: print("lacl #%02X", opcode & 0xff); break;
+ case 0xba: print("sub #%02X", opcode & 0xff); break;
+ case 0xbb: print("rpt #%02X", opcode & 0xff); break;
case 0xbc:
case 0xbd:
@@ -449,8 +449,8 @@ CPU_DISASSEMBLE( tms32051 )
print("ldp #%03X", opcode & 0x1ff);
break;
}
- case 0xbe: dasm_group_be(opcode); break;
- case 0xbf: dasm_group_bf(opcode); break;
+ case 0xbe: dasm_group_be(opcode); break;
+ case 0xbf: dasm_group_bf(opcode); break;
case 0xe0: case 0xe1: case 0xe2: case 0xe3:
{
@@ -555,7 +555,7 @@ CPU_DISASSEMBLE( tms32051 )
break;
}
- case 0xef: print("ret"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xef: print("ret"); flags = DASMFLAG_STEP_OUT; break;
case 0xf0: case 0xf1: case 0xf2: case 0xf3:
{
@@ -633,9 +633,9 @@ CPU_DISASSEMBLE( tms32051 )
break;
}
- case 0xff: print("retd"); flags = DASMFLAG_STEP_OUT; break;
+ case 0xff: print("retd"); flags = DASMFLAG_STEP_OUT; break;
- default: print("??? ($%04X)", opcode); break;
+ default: print("??? ($%04X)", opcode); break;
}
return (npc-pc) | flags | DASMFLAG_SUPPORTED;
diff --git a/src/emu/cpu/tms32051/tms32051.c b/src/emu/cpu/tms32051/tms32051.c
index 9ae5294329e..de961c1c70f 100644
--- a/src/emu/cpu/tms32051/tms32051.c
+++ b/src/emu/cpu/tms32051/tms32051.c
@@ -8,15 +8,15 @@
#include "debugger.h"
#include "tms32051.h"
-#define INTERRUPT_INT1 0
-#define INTERRUPT_INT2 1
-#define INTERRUPT_INT3 2
-#define INTERRUPT_TINT 3
-#define INTERRUPT_RINT 4
-#define INTERRUPT_XINT 5
-#define INTERRUPT_TRNT 6
-#define INTERRUPT_TXNT 7
-#define INTERRUPT_INT4 8
+#define INTERRUPT_INT1 0
+#define INTERRUPT_INT2 1
+#define INTERRUPT_INT3 2
+#define INTERRUPT_TINT 3
+#define INTERRUPT_RINT 4
+#define INTERRUPT_XINT 5
+#define INTERRUPT_TRNT 6
+#define INTERRUPT_TXNT 7
+#define INTERRUPT_INT4 8
enum
{
@@ -162,9 +162,9 @@ static void restore_interrupt_context(tms32051_state *cpustate);
static void check_interrupts(tms32051_state *cpustate);
-#define CYCLES(x) (cpustate->icount -= x)
+#define CYCLES(x) (cpustate->icount -= x)
-#define ROPCODE(cpustate) cpustate->direct->read_decrypted_word((cpustate->pc++) << 1)
+#define ROPCODE(cpustate) cpustate->direct->read_decrypted_word((cpustate->pc++) << 1)
INLINE void CHANGE_PC(tms32051_state *cpustate, UINT16 new_pc)
{
@@ -235,31 +235,31 @@ static CPU_RESET( tms )
tms32051_state *cpustate = get_safe_token(device);
// reset registers
- cpustate->st0.intm = 1;
- cpustate->st0.ov = 0;
- cpustate->st1.c = 1;
- cpustate->st1.cnf = 0;
- cpustate->st1.hm = 1;
- cpustate->st1.pm = 0;
- cpustate->st1.sxm = 1;
- cpustate->st1.xf = 1;
- cpustate->pmst.avis = 0;
- cpustate->pmst.braf = 0;
- cpustate->pmst.iptr = 0;
- cpustate->pmst.ndx = 0;
- cpustate->pmst.ovly = 0;
- cpustate->pmst.ram = 0;
- cpustate->pmst.mpmc = 0; // TODO: this is set to logical pin state at reset
- cpustate->pmst.trm = 0;
- cpustate->ifr = 0;
- cpustate->cbcr = 0;
- cpustate->rptc = -1;
+ cpustate->st0.intm = 1;
+ cpustate->st0.ov = 0;
+ cpustate->st1.c = 1;
+ cpustate->st1.cnf = 0;
+ cpustate->st1.hm = 1;
+ cpustate->st1.pm = 0;
+ cpustate->st1.sxm = 1;
+ cpustate->st1.xf = 1;
+ cpustate->pmst.avis = 0;
+ cpustate->pmst.braf = 0;
+ cpustate->pmst.iptr = 0;
+ cpustate->pmst.ndx = 0;
+ cpustate->pmst.ovly = 0;
+ cpustate->pmst.ram = 0;
+ cpustate->pmst.mpmc = 0; // TODO: this is set to logical pin state at reset
+ cpustate->pmst.trm = 0;
+ cpustate->ifr = 0;
+ cpustate->cbcr = 0;
+ cpustate->rptc = -1;
// simulate internal rom boot loader (can be removed when the dsp rom(s) is dumped)
- cpustate->st0.intm = 1;
- cpustate->st1.cnf = 1;
- cpustate->pmst.ram = 1;
- cpustate->pmst.ovly = 0;
+ cpustate->st0.intm = 1;
+ cpustate->st1.cnf = 1;
+ cpustate->pmst.ram = 1;
+ cpustate->pmst.ovly = 0;
int i;
UINT16 src, dst, length;
@@ -303,14 +303,14 @@ static void check_interrupts(tms32051_state *cpustate)
static void save_interrupt_context(tms32051_state *cpustate)
{
- cpustate->shadow.acc = cpustate->acc;
- cpustate->shadow.accb = cpustate->accb;
- cpustate->shadow.arcr = cpustate->arcr;
- cpustate->shadow.indx = cpustate->indx;
- cpustate->shadow.preg = cpustate->preg;
- cpustate->shadow.treg0 = cpustate->treg0;
- cpustate->shadow.treg1 = cpustate->treg1;
- cpustate->shadow.treg2 = cpustate->treg2;
+ cpustate->shadow.acc = cpustate->acc;
+ cpustate->shadow.accb = cpustate->accb;
+ cpustate->shadow.arcr = cpustate->arcr;
+ cpustate->shadow.indx = cpustate->indx;
+ cpustate->shadow.preg = cpustate->preg;
+ cpustate->shadow.treg0 = cpustate->treg0;
+ cpustate->shadow.treg1 = cpustate->treg1;
+ cpustate->shadow.treg2 = cpustate->treg2;
memcpy(&cpustate->shadow.pmst, &cpustate->pmst, sizeof(PMST));
memcpy(&cpustate->shadow.st0, &cpustate->st0, sizeof(ST0));
memcpy(&cpustate->shadow.st1, &cpustate->st1, sizeof(ST1));
@@ -318,14 +318,14 @@ static void save_interrupt_context(tms32051_state *cpustate)
static void restore_interrupt_context(tms32051_state *cpustate)
{
- cpustate->acc = cpustate->shadow.acc;
- cpustate->accb = cpustate->shadow.accb;
- cpustate->arcr = cpustate->shadow.arcr;
- cpustate->indx = cpustate->shadow.indx;
- cpustate->preg = cpustate->shadow.preg;
- cpustate->treg0 = cpustate->shadow.treg0;
- cpustate->treg1 = cpustate->shadow.treg1;
- cpustate->treg2 = cpustate->shadow.treg2;
+ cpustate->acc = cpustate->shadow.acc;
+ cpustate->accb = cpustate->shadow.accb;
+ cpustate->arcr = cpustate->shadow.arcr;
+ cpustate->indx = cpustate->shadow.indx;
+ cpustate->preg = cpustate->shadow.preg;
+ cpustate->treg0 = cpustate->shadow.treg0;
+ cpustate->treg1 = cpustate->shadow.treg1;
+ cpustate->treg2 = cpustate->shadow.treg2;
memcpy(&cpustate->pmst, &cpustate->shadow.pmst, sizeof(PMST));
memcpy(&cpustate->st0, &cpustate->shadow.st0, sizeof(ST0));
memcpy(&cpustate->st1, &cpustate->shadow.st1, sizeof(ST1));
@@ -417,10 +417,10 @@ static READ16_HANDLER( cpuregs_r )
switch (offset)
{
- case 0x04: return cpustate->imr;
- case 0x06: return cpustate->ifr;
+ case 0x04: return cpustate->imr;
+ case 0x06: return cpustate->ifr;
- case 0x07: // PMST
+ case 0x07: // PMST
{
UINT16 r = 0;
r |= cpustate->pmst.iptr << 11;
@@ -434,21 +434,21 @@ static READ16_HANDLER( cpuregs_r )
return r;
}
- case 0x09: return cpustate->brcr;
- case 0x10: return cpustate->ar[0];
- case 0x11: return cpustate->ar[1];
- case 0x12: return cpustate->ar[2];
- case 0x13: return cpustate->ar[3];
- case 0x14: return cpustate->ar[4];
- case 0x15: return cpustate->ar[5];
- case 0x16: return cpustate->ar[6];
- case 0x17: return cpustate->ar[7];
- case 0x1e: return cpustate->cbcr;
- case 0x1f: return cpustate->bmar;
- case 0x24: return cpustate->timer.tim;
- case 0x25: return cpustate->timer.prd;
-
- case 0x26: // TCR
+ case 0x09: return cpustate->brcr;
+ case 0x10: return cpustate->ar[0];
+ case 0x11: return cpustate->ar[1];
+ case 0x12: return cpustate->ar[2];
+ case 0x13: return cpustate->ar[3];
+ case 0x14: return cpustate->ar[4];
+ case 0x15: return cpustate->ar[5];
+ case 0x16: return cpustate->ar[6];
+ case 0x17: return cpustate->ar[7];
+ case 0x1e: return cpustate->cbcr;
+ case 0x1f: return cpustate->bmar;
+ case 0x24: return cpustate->timer.tim;
+ case 0x25: return cpustate->timer.prd;
+
+ case 0x26: // TCR
{
UINT16 r = 0;
r |= (cpustate->timer.psc & 0xf) << 6;
@@ -456,7 +456,7 @@ static READ16_HANDLER( cpuregs_r )
return r;
}
- case 0x28: return 0; // PDWSR
+ case 0x28: return 0; // PDWSR
default:
if(!space.debugger_access())
fatalerror("32051: cpuregs_r: unimplemented memory-mapped register %02X at %04X\n", offset, cpustate->pc-1);
@@ -471,9 +471,9 @@ static WRITE16_HANDLER( cpuregs_w )
switch (offset)
{
- case 0x00: break;
- case 0x04: cpustate->imr = data; break;
- case 0x06: // IFR
+ case 0x00: break;
+ case 0x04: cpustate->imr = data; break;
+ case 0x06: // IFR
{
int i;
for (i=0; i < 16; i++)
@@ -486,7 +486,7 @@ static WRITE16_HANDLER( cpuregs_w )
break;
}
- case 0x07: // PMST
+ case 0x07: // PMST
{
cpustate->pmst.iptr = (data >> 11) & 0x1f;
cpustate->pmst.avis = (data & 0x80) ? 1 : 0;
@@ -499,29 +499,29 @@ static WRITE16_HANDLER( cpuregs_w )
break;
}
- case 0x09: cpustate->brcr = data; break;
- case 0x0e: cpustate->treg2 = data; break;
- case 0x0f: cpustate->dbmr = data; break;
- case 0x10: cpustate->ar[0] = data; break;
- case 0x11: cpustate->ar[1] = data; break;
- case 0x12: cpustate->ar[2] = data; break;
- case 0x13: cpustate->ar[3] = data; break;
- case 0x14: cpustate->ar[4] = data; break;
- case 0x15: cpustate->ar[5] = data; break;
- case 0x16: cpustate->ar[6] = data; break;
- case 0x17: cpustate->ar[7] = data; break;
- case 0x18: cpustate->indx = data; break;
- case 0x19: cpustate->arcr = data; break;
- case 0x1a: cpustate->cbsr1 = data; break;
- case 0x1b: cpustate->cber1 = data; break;
- case 0x1c: cpustate->cbsr2 = data; break;
- case 0x1d: cpustate->cber2 = data; break;
- case 0x1e: cpustate->cbcr = data; break;
- case 0x1f: cpustate->bmar = data; break;
- case 0x24: cpustate->timer.tim = data; break;
- case 0x25: cpustate->timer.prd = data; break;
-
- case 0x26: // TCR
+ case 0x09: cpustate->brcr = data; break;
+ case 0x0e: cpustate->treg2 = data; break;
+ case 0x0f: cpustate->dbmr = data; break;
+ case 0x10: cpustate->ar[0] = data; break;
+ case 0x11: cpustate->ar[1] = data; break;
+ case 0x12: cpustate->ar[2] = data; break;
+ case 0x13: cpustate->ar[3] = data; break;
+ case 0x14: cpustate->ar[4] = data; break;
+ case 0x15: cpustate->ar[5] = data; break;
+ case 0x16: cpustate->ar[6] = data; break;
+ case 0x17: cpustate->ar[7] = data; break;
+ case 0x18: cpustate->indx = data; break;
+ case 0x19: cpustate->arcr = data; break;
+ case 0x1a: cpustate->cbsr1 = data; break;
+ case 0x1b: cpustate->cber1 = data; break;
+ case 0x1c: cpustate->cbsr2 = data; break;
+ case 0x1d: cpustate->cber2 = data; break;
+ case 0x1e: cpustate->cbcr = data; break;
+ case 0x1f: cpustate->bmar = data; break;
+ case 0x24: cpustate->timer.tim = data; break;
+ case 0x25: cpustate->timer.prd = data; break;
+
+ case 0x26: // TCR
{
cpustate->timer.tddr = data & 0xf;
cpustate->timer.psc = (data >> 6) & 0xf;
@@ -534,7 +534,7 @@ static WRITE16_HANDLER( cpuregs_w )
break;
}
- case 0x28: break; // PDWSR
+ case 0x28: break; // PDWSR
default:
if(!space.debugger_access())
fatalerror("32051: cpuregs_w: unimplemented memory-mapped register %02X, data %04X at %04X\n", offset, data, cpustate->pc-1);
@@ -546,17 +546,17 @@ static WRITE16_HANDLER( cpuregs_w )
**************************************************************************/
static ADDRESS_MAP_START( internal_pgm, AS_PROGRAM, 16, legacy_cpu_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
- AM_RANGE(0x2000, 0x23ff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if RAM bit = 0
- AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is off-chip if CNF = 0
+ AM_RANGE(0x0000, 0x1fff) AM_ROM // ROM TODO: is off-chip if MP/_MC = 0
+ AM_RANGE(0x2000, 0x23ff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if RAM bit = 0
+ AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is off-chip if CNF = 0
ADDRESS_MAP_END
static ADDRESS_MAP_START( internal_data, AS_DATA, 16, legacy_cpu_device )
AM_RANGE(0x0000, 0x005f) AM_READWRITE_LEGACY(cpuregs_r, cpuregs_w)
- AM_RANGE(0x0060, 0x007f) AM_RAM // DARAM B2
- AM_RANGE(0x0100, 0x02ff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is unconnected if CNF = 1
- AM_RANGE(0x0300, 0x04ff) AM_RAM // DARAM B1
- AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if OVLY = 0
+ AM_RANGE(0x0060, 0x007f) AM_RAM // DARAM B2
+ AM_RANGE(0x0100, 0x02ff) AM_RAM AM_SHARE("daram_b0") // DARAM B0 TODO: is unconnected if CNF = 1
+ AM_RANGE(0x0300, 0x04ff) AM_RAM // DARAM B1
+ AM_RANGE(0x0800, 0x0bff) AM_RAM AM_SHARE("saram") // SARAM TODO: is off-chip if OVLY = 0
ADDRESS_MAP_END
/**************************************************************************
@@ -570,7 +570,7 @@ static CPU_SET_INFO( tms )
switch (state)
{
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32051_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_PC: cpustate->pc = info->i; break;
}
}
@@ -596,101 +596,101 @@ static CPU_GET_INFO( tms )
switch(state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms32051_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 5; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms32051_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 6; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 5; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = -1; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE: info->i = CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32051_PC: info->i = cpustate->pc; break;
- case CPUINFO_INT_REGISTER + TMS32051_ACC: info->i = cpustate->acc; break;
- case CPUINFO_INT_REGISTER + TMS32051_ACCB: info->i = cpustate->accb; break;
- case CPUINFO_INT_REGISTER + TMS32051_PREG: info->i = cpustate->preg; break;
- case CPUINFO_INT_REGISTER + TMS32051_TREG0: info->i = cpustate->treg0; break;
- case CPUINFO_INT_REGISTER + TMS32051_TREG1: info->i = cpustate->treg1; break;
- case CPUINFO_INT_REGISTER + TMS32051_TREG2: info->i = cpustate->treg2; break;
- case CPUINFO_INT_REGISTER + TMS32051_BMAR: info->i = cpustate->bmar; break;
- case CPUINFO_INT_REGISTER + TMS32051_RPTC: info->i = cpustate->rptc; break;
- case CPUINFO_INT_REGISTER + TMS32051_BRCR: info->i = cpustate->brcr; break;
- case CPUINFO_INT_REGISTER + TMS32051_INDX: info->i = cpustate->indx; break;
- case CPUINFO_INT_REGISTER + TMS32051_DBMR: info->i = cpustate->dbmr; break;
- case CPUINFO_INT_REGISTER + TMS32051_ARCR: info->i = cpustate->arcr; break;
- case CPUINFO_INT_REGISTER + TMS32051_DP: info->i = cpustate->st0.dp; break;
- case CPUINFO_INT_REGISTER + TMS32051_ARP: info->i = cpustate->st0.arp; break;
- case CPUINFO_INT_REGISTER + TMS32051_ARB: info->i = cpustate->st1.arb; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR0: info->i = cpustate->ar[0]; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR1: info->i = cpustate->ar[1]; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR2: info->i = cpustate->ar[2]; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR3: info->i = cpustate->ar[3]; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR4: info->i = cpustate->ar[4]; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR5: info->i = cpustate->ar[5]; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR6: info->i = cpustate->ar[6]; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR7: info->i = cpustate->ar[7]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ACC: info->i = cpustate->acc; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ACCB: info->i = cpustate->accb; break;
+ case CPUINFO_INT_REGISTER + TMS32051_PREG: info->i = cpustate->preg; break;
+ case CPUINFO_INT_REGISTER + TMS32051_TREG0: info->i = cpustate->treg0; break;
+ case CPUINFO_INT_REGISTER + TMS32051_TREG1: info->i = cpustate->treg1; break;
+ case CPUINFO_INT_REGISTER + TMS32051_TREG2: info->i = cpustate->treg2; break;
+ case CPUINFO_INT_REGISTER + TMS32051_BMAR: info->i = cpustate->bmar; break;
+ case CPUINFO_INT_REGISTER + TMS32051_RPTC: info->i = cpustate->rptc; break;
+ case CPUINFO_INT_REGISTER + TMS32051_BRCR: info->i = cpustate->brcr; break;
+ case CPUINFO_INT_REGISTER + TMS32051_INDX: info->i = cpustate->indx; break;
+ case CPUINFO_INT_REGISTER + TMS32051_DBMR: info->i = cpustate->dbmr; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ARCR: info->i = cpustate->arcr; break;
+ case CPUINFO_INT_REGISTER + TMS32051_DP: info->i = cpustate->st0.dp; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ARP: info->i = cpustate->st0.arp; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ARB: info->i = cpustate->st1.arb; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR0: info->i = cpustate->ar[0]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR1: info->i = cpustate->ar[1]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR2: info->i = cpustate->ar[2]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR3: info->i = cpustate->ar[3]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR4: info->i = cpustate->ar[4]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR5: info->i = cpustate->ar[5]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR6: info->i = cpustate->ar[6]; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR7: info->i = cpustate->ar[7]; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32051); break;
- case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(tms); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms32051); break;
+ case CPUINFO_FCT_READ: info->read = CPU_READ_NAME(tms); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map16 = ADDRESS_MAP_NAME(internal_pgm); break;
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_DATA: info->internal_map16 = ADDRESS_MAP_NAME(internal_data); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_FAMILY: strcpy(info->s, "TMS3205x"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + TMS32051_PC: sprintf(info->s, "PC: %04X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + TMS32051_ACC: sprintf(info->s, "ACC: %08X", cpustate->acc); break;
- case CPUINFO_STR_REGISTER + TMS32051_ACCB: sprintf(info->s, "ACCB: %08X", cpustate->accb); break;
- case CPUINFO_STR_REGISTER + TMS32051_PREG: sprintf(info->s, "PREG: %08X", cpustate->preg); break;
- case CPUINFO_STR_REGISTER + TMS32051_TREG0: sprintf(info->s, "TREG0: %04X", cpustate->treg0); break;
- case CPUINFO_STR_REGISTER + TMS32051_TREG1: sprintf(info->s, "TREG1: %04X", cpustate->treg1); break;
- case CPUINFO_STR_REGISTER + TMS32051_TREG2: sprintf(info->s, "TREG2: %04X", cpustate->treg2); break;
- case CPUINFO_STR_REGISTER + TMS32051_BMAR: sprintf(info->s, "BMAR: %08X", cpustate->bmar); break;
- case CPUINFO_STR_REGISTER + TMS32051_RPTC: sprintf(info->s, "RPTC: %08X", cpustate->rptc); break;
- case CPUINFO_STR_REGISTER + TMS32051_BRCR: sprintf(info->s, "BRCR: %08X", cpustate->brcr); break;
- case CPUINFO_STR_REGISTER + TMS32051_INDX: sprintf(info->s, "INDX: %04X", cpustate->indx); break;
- case CPUINFO_STR_REGISTER + TMS32051_DBMR: sprintf(info->s, "DBMR: %04X", cpustate->dbmr); break;
- case CPUINFO_STR_REGISTER + TMS32051_ARCR: sprintf(info->s, "ARCR: %04X", cpustate->arcr); break;
- case CPUINFO_STR_REGISTER + TMS32051_DP: sprintf(info->s, "DP: %04X", cpustate->st0.dp); break;
- case CPUINFO_STR_REGISTER + TMS32051_ARP: sprintf(info->s, "ARP: %04X", cpustate->st0.arp); break;
- case CPUINFO_STR_REGISTER + TMS32051_ARB: sprintf(info->s, "ARB: %04X", cpustate->st1.arb); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR0: sprintf(info->s, "AR0: %04X", cpustate->ar[0]); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR1: sprintf(info->s, "AR1: %04X", cpustate->ar[1]); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR2: sprintf(info->s, "AR2: %04X", cpustate->ar[2]); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR3: sprintf(info->s, "AR3: %04X", cpustate->ar[3]); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR4: sprintf(info->s, "AR4: %04X", cpustate->ar[4]); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR5: sprintf(info->s, "AR5: %04X", cpustate->ar[5]); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR6: sprintf(info->s, "AR6: %04X", cpustate->ar[6]); break;
- case CPUINFO_STR_REGISTER + TMS32051_AR7: sprintf(info->s, "AR7: %04X", cpustate->ar[7]); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "TMS3205x"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Ville Linde"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + TMS32051_PC: sprintf(info->s, "PC: %04X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + TMS32051_ACC: sprintf(info->s, "ACC: %08X", cpustate->acc); break;
+ case CPUINFO_STR_REGISTER + TMS32051_ACCB: sprintf(info->s, "ACCB: %08X", cpustate->accb); break;
+ case CPUINFO_STR_REGISTER + TMS32051_PREG: sprintf(info->s, "PREG: %08X", cpustate->preg); break;
+ case CPUINFO_STR_REGISTER + TMS32051_TREG0: sprintf(info->s, "TREG0: %04X", cpustate->treg0); break;
+ case CPUINFO_STR_REGISTER + TMS32051_TREG1: sprintf(info->s, "TREG1: %04X", cpustate->treg1); break;
+ case CPUINFO_STR_REGISTER + TMS32051_TREG2: sprintf(info->s, "TREG2: %04X", cpustate->treg2); break;
+ case CPUINFO_STR_REGISTER + TMS32051_BMAR: sprintf(info->s, "BMAR: %08X", cpustate->bmar); break;
+ case CPUINFO_STR_REGISTER + TMS32051_RPTC: sprintf(info->s, "RPTC: %08X", cpustate->rptc); break;
+ case CPUINFO_STR_REGISTER + TMS32051_BRCR: sprintf(info->s, "BRCR: %08X", cpustate->brcr); break;
+ case CPUINFO_STR_REGISTER + TMS32051_INDX: sprintf(info->s, "INDX: %04X", cpustate->indx); break;
+ case CPUINFO_STR_REGISTER + TMS32051_DBMR: sprintf(info->s, "DBMR: %04X", cpustate->dbmr); break;
+ case CPUINFO_STR_REGISTER + TMS32051_ARCR: sprintf(info->s, "ARCR: %04X", cpustate->arcr); break;
+ case CPUINFO_STR_REGISTER + TMS32051_DP: sprintf(info->s, "DP: %04X", cpustate->st0.dp); break;
+ case CPUINFO_STR_REGISTER + TMS32051_ARP: sprintf(info->s, "ARP: %04X", cpustate->st0.arp); break;
+ case CPUINFO_STR_REGISTER + TMS32051_ARB: sprintf(info->s, "ARB: %04X", cpustate->st1.arb); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR0: sprintf(info->s, "AR0: %04X", cpustate->ar[0]); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR1: sprintf(info->s, "AR1: %04X", cpustate->ar[1]); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR2: sprintf(info->s, "AR2: %04X", cpustate->ar[2]); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR3: sprintf(info->s, "AR3: %04X", cpustate->ar[3]); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR4: sprintf(info->s, "AR4: %04X", cpustate->ar[4]); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR5: sprintf(info->s, "AR5: %04X", cpustate->ar[5]); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR6: sprintf(info->s, "AR6: %04X", cpustate->ar[6]); break;
+ case CPUINFO_STR_REGISTER + TMS32051_AR7: sprintf(info->s, "AR7: %04X", cpustate->ar[7]); break;
}
}
@@ -705,31 +705,31 @@ static CPU_SET_INFO( tms32051 )
switch(state)
{
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS32051_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_ACC: cpustate->acc = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_ACCB: cpustate->accb = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_PREG: cpustate->preg = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_TREG0: cpustate->treg0 = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_TREG1: cpustate->treg1 = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_TREG2: cpustate->treg2 = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_BMAR: cpustate->bmar = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_BRCR: cpustate->brcr = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_INDX: cpustate->indx = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_DBMR: cpustate->dbmr = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_ARCR: cpustate->arcr = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_DP: cpustate->st0.dp = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_ARP: cpustate->st0.arp = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_ARB: cpustate->st1.arb = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR0: cpustate->ar[0] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR1: cpustate->ar[1] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR2: cpustate->ar[2] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR3: cpustate->ar[3] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR4: cpustate->ar[4] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR5: cpustate->ar[5] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR6: cpustate->ar[6] = info->i; break;
- case CPUINFO_INT_REGISTER + TMS32051_AR7: cpustate->ar[7] = info->i; break;
-
- default: CPU_SET_INFO_CALL(tms); break;
+ case CPUINFO_INT_REGISTER + TMS32051_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ACC: cpustate->acc = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ACCB: cpustate->accb = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_PREG: cpustate->preg = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_TREG0: cpustate->treg0 = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_TREG1: cpustate->treg1 = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_TREG2: cpustate->treg2 = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_BMAR: cpustate->bmar = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_BRCR: cpustate->brcr = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_INDX: cpustate->indx = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_DBMR: cpustate->dbmr = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ARCR: cpustate->arcr = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_DP: cpustate->st0.dp = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ARP: cpustate->st0.arp = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_ARB: cpustate->st1.arb = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR0: cpustate->ar[0] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR1: cpustate->ar[1] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR2: cpustate->ar[2] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR3: cpustate->ar[3] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR4: cpustate->ar[4] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR5: cpustate->ar[5] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR6: cpustate->ar[6] = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS32051_AR7: cpustate->ar[7] = info->i; break;
+
+ default: CPU_SET_INFO_CALL(tms); break;
}
}
@@ -738,12 +738,12 @@ CPU_GET_INFO( tms32051 )
switch(state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32051); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms32051); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS32051"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS32051"); break;
- default: CPU_GET_INFO_CALL(tms); break;
+ default: CPU_GET_INFO_CALL(tms); break;
}
}
diff --git a/src/emu/cpu/tms34010/34010dsm.c b/src/emu/cpu/tms34010/34010dsm.c
index af9f3683fda..b0643d6b4ee 100644
--- a/src/emu/cpu/tms34010/34010dsm.c
+++ b/src/emu/cpu/tms34010/34010dsm.c
@@ -56,9 +56,9 @@ static void print_des_reg(void)
static void print_src_des_reg(void)
{
- print_src_reg();
+ print_src_reg();
strcat(buffer, ",");
- print_des_reg();
+ print_des_reg();
}
static void print_word_parm(void)
@@ -258,9 +258,9 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
OP_WORD(op);
subop = (op & 0x01e0);
- rs = (op >> 5) & 0x0f; /* Source register */
- rd = op & 0x0f; /* Destination register */
- rf = ((op & 0x10) ? 'B' : 'A'); /* Register file */
+ rs = (op >> 5) & 0x0f; /* Source register */
+ rd = op & 0x0f; /* Destination register */
+ rf = ((op & 0x10) ? 'B' : 'A'); /* Register file */
switch (op & 0xfe00)
{
@@ -586,8 +586,8 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0140:
case 0x0160:
sprintf (buffer, "SETF %Xh,%X,",
- (op & 0x1f) ? op & 0x1f : 0x20,
- (op >> 5) & 1);
+ (op & 0x1f) ? op & 0x1f : 0x20,
+ (op >> 5) & 1);
print_field();
break;
@@ -811,56 +811,56 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0100:
sprintf (buffer, "ADDI ");
- print_word_parm();
+ print_word_parm();
strcat(buffer, ",");
print_des_reg();
break;
case 0x0120:
sprintf (buffer, "ADDI ");
- print_long_parm();
+ print_long_parm();
strcat(buffer, ",");
print_des_reg();
break;
case 0x0140:
sprintf (buffer, "CMPI ");
- print_word_parm_1s_comp();
+ print_word_parm_1s_comp();
strcat(buffer, ",");
print_des_reg();
break;
case 0x0160:
sprintf (buffer, "CMPI ");
- print_long_parm_1s_comp();
+ print_long_parm_1s_comp();
strcat(buffer, ",");
print_des_reg();
break;
case 0x0180:
sprintf (buffer, "ANDI ");
- print_long_parm_1s_comp();
+ print_long_parm_1s_comp();
strcat(buffer, ",");
print_des_reg();
break;
case 0x01a0:
sprintf (buffer, "ORI ");
- print_long_parm();
+ print_long_parm();
strcat(buffer, ",");
print_des_reg();
break;
case 0x01c0:
sprintf (buffer, "XORI ");
- print_long_parm();
+ print_long_parm();
strcat(buffer, ",");
print_des_reg();
break;
case 0x01e0:
sprintf (buffer, "SUBI ");
- print_word_parm_1s_comp();
+ print_word_parm_1s_comp();
strcat(buffer, ",");
print_des_reg();
break;
@@ -878,7 +878,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
if (is_34020)
{
sprintf (buffer, "ADDXYI ");
- print_long_parm();
+ print_long_parm();
strcat(buffer, ",");
print_des_reg();
}
@@ -895,7 +895,7 @@ static unsigned Dasm340x0(char *buff, UINT32 pc, int is_34020)
case 0x0100:
sprintf (buffer, "SUBI ");
- print_long_parm_1s_comp();
+ print_long_parm_1s_comp();
strcat(buffer, ",");
print_des_reg();
break;
@@ -1757,4 +1757,3 @@ CPU_DISASSEMBLE( tms34020 )
pcbase = pc;
return Dasm340x0(buffer, pc, 1);
}
-
diff --git a/src/emu/cpu/tms34010/34010fld.c b/src/emu/cpu/tms34010/34010fld.c
index 93897b295b1..005a64216bb 100644
--- a/src/emu/cpu/tms34010/34010fld.c
+++ b/src/emu/cpu/tms34010/34010fld.c
@@ -677,4 +677,3 @@ static UINT32 (*const tms34010_rfield_functions[64])(tms34010_state *tms, offs_t
rfield_s_24, rfield_s_25, rfield_s_26, rfield_s_27, rfield_s_28, rfield_s_29,
rfield_s_30, rfield_s_31
};
-
diff --git a/src/emu/cpu/tms34010/34010gfx.c b/src/emu/cpu/tms34010/34010gfx.c
index 757f57b5b8c..214acecf5ac 100644
--- a/src/emu/cpu/tms34010/34010gfx.c
+++ b/src/emu/cpu/tms34010/34010gfx.c
@@ -35,7 +35,7 @@ static void line(tms34010_state *tms, UINT16 op)
COUNT(tms)--;
if (WINDOW_CHECKING(tms) != 3 ||
(DADDR_X(tms) >= WSTART_X(tms) && DADDR_X(tms) <= WEND_X(tms) &&
- DADDR_Y(tms) >= WSTART_Y(tms) && DADDR_Y(tms) <= WEND_Y(tms)))
+ DADDR_Y(tms) >= WSTART_Y(tms) && DADDR_Y(tms) <= WEND_Y(tms)))
WPIXEL(tms,DXYTOL(tms,DADDR_XY(tms)),COLOR1(tms));
if (SADDR(tms) >= TEMP(tms))
@@ -264,10 +264,10 @@ static UINT32 pixel_op21(UINT32 dstpix, UINT32 mask, UINT32 srcpix) { dstpix &=
static UINT32 (*const pixel_op_table[])(UINT32, UINT32, UINT32) =
{
- pixel_op00, pixel_op01, pixel_op02, pixel_op03, pixel_op04, pixel_op05, pixel_op06, pixel_op07,
- pixel_op08, pixel_op09, pixel_op10, pixel_op11, pixel_op12, pixel_op13, pixel_op14, pixel_op15,
- pixel_op16, pixel_op17, pixel_op18, pixel_op19, pixel_op20, pixel_op21, pixel_op00, pixel_op00,
- pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00
+ pixel_op00, pixel_op01, pixel_op02, pixel_op03, pixel_op04, pixel_op05, pixel_op06, pixel_op07,
+ pixel_op08, pixel_op09, pixel_op10, pixel_op11, pixel_op12, pixel_op13, pixel_op14, pixel_op15,
+ pixel_op16, pixel_op17, pixel_op18, pixel_op19, pixel_op20, pixel_op21, pixel_op00, pixel_op00,
+ pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00, pixel_op00
};
static const UINT8 pixel_op_timing_table[] =
{
@@ -366,396 +366,396 @@ static void fill_16_opx_trans(tms34010_state *tms, int dst_is_linear);
/* tables */
static void (*const pixblt_op_table[])(tms34010_state *, int, int) =
{
- pixblt_1_op0, pixblt_1_op0_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
- pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
-
- pixblt_2_op0, pixblt_2_op0_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
- pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
-
- pixblt_4_op0, pixblt_4_op0_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
- pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
-
- pixblt_8_op0, pixblt_8_op0_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
- pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
-
- pixblt_16_op0, pixblt_16_op0_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
- pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans
+ pixblt_1_op0, pixblt_1_op0_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+ pixblt_1_opx, pixblt_1_opx_trans, pixblt_1_opx, pixblt_1_opx_trans,
+
+ pixblt_2_op0, pixblt_2_op0_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+ pixblt_2_opx, pixblt_2_opx_trans, pixblt_2_opx, pixblt_2_opx_trans,
+
+ pixblt_4_op0, pixblt_4_op0_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+ pixblt_4_opx, pixblt_4_opx_trans, pixblt_4_opx, pixblt_4_opx_trans,
+
+ pixblt_8_op0, pixblt_8_op0_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+ pixblt_8_opx, pixblt_8_opx_trans, pixblt_8_opx, pixblt_8_opx_trans,
+
+ pixblt_16_op0, pixblt_16_op0_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans,
+ pixblt_16_opx, pixblt_16_opx_trans, pixblt_16_opx, pixblt_16_opx_trans
};
static void (*const pixblt_r_op_table[])(tms34010_state *, int, int) =
{
- pixblt_r_1_op0, pixblt_r_1_op0_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
- pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
-
- pixblt_r_2_op0, pixblt_r_2_op0_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
- pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
-
- pixblt_r_4_op0, pixblt_r_4_op0_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
- pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
-
- pixblt_r_8_op0, pixblt_r_8_op0_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
- pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
-
- pixblt_r_16_op0,pixblt_r_16_op0_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
- pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans
+ pixblt_r_1_op0, pixblt_r_1_op0_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+ pixblt_r_1_opx, pixblt_r_1_opx_trans, pixblt_r_1_opx, pixblt_r_1_opx_trans,
+
+ pixblt_r_2_op0, pixblt_r_2_op0_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+ pixblt_r_2_opx, pixblt_r_2_opx_trans, pixblt_r_2_opx, pixblt_r_2_opx_trans,
+
+ pixblt_r_4_op0, pixblt_r_4_op0_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+ pixblt_r_4_opx, pixblt_r_4_opx_trans, pixblt_r_4_opx, pixblt_r_4_opx_trans,
+
+ pixblt_r_8_op0, pixblt_r_8_op0_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+ pixblt_r_8_opx, pixblt_r_8_opx_trans, pixblt_r_8_opx, pixblt_r_8_opx_trans,
+
+ pixblt_r_16_op0,pixblt_r_16_op0_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans,
+ pixblt_r_16_opx,pixblt_r_16_opx_trans, pixblt_r_16_opx,pixblt_r_16_opx_trans
};
static void (*const pixblt_b_op_table[])(tms34010_state *, int) =
{
- pixblt_b_1_op0, pixblt_b_1_op0_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
- pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
-
- pixblt_b_2_op0, pixblt_b_2_op0_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
- pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
-
- pixblt_b_4_op0, pixblt_b_4_op0_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
- pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
-
- pixblt_b_8_op0, pixblt_b_8_op0_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
- pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
-
- pixblt_b_16_op0,pixblt_b_16_op0_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
- pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans
+ pixblt_b_1_op0, pixblt_b_1_op0_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+ pixblt_b_1_opx, pixblt_b_1_opx_trans, pixblt_b_1_opx, pixblt_b_1_opx_trans,
+
+ pixblt_b_2_op0, pixblt_b_2_op0_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+ pixblt_b_2_opx, pixblt_b_2_opx_trans, pixblt_b_2_opx, pixblt_b_2_opx_trans,
+
+ pixblt_b_4_op0, pixblt_b_4_op0_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+ pixblt_b_4_opx, pixblt_b_4_opx_trans, pixblt_b_4_opx, pixblt_b_4_opx_trans,
+
+ pixblt_b_8_op0, pixblt_b_8_op0_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+ pixblt_b_8_opx, pixblt_b_8_opx_trans, pixblt_b_8_opx, pixblt_b_8_opx_trans,
+
+ pixblt_b_16_op0,pixblt_b_16_op0_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans,
+ pixblt_b_16_opx,pixblt_b_16_opx_trans, pixblt_b_16_opx,pixblt_b_16_opx_trans
};
static void (*const fill_op_table[])(tms34010_state *tms, int) =
{
- fill_1_op0, fill_1_op0_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
- fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
-
- fill_2_op0, fill_2_op0_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
- fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
-
- fill_4_op0, fill_4_op0_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
- fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
-
- fill_8_op0, fill_8_op0_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
- fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
-
- fill_16_op0, fill_16_op0_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
- fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans
+ fill_1_op0, fill_1_op0_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+ fill_1_opx, fill_1_opx_trans, fill_1_opx, fill_1_opx_trans,
+
+ fill_2_op0, fill_2_op0_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+ fill_2_opx, fill_2_opx_trans, fill_2_opx, fill_2_opx_trans,
+
+ fill_4_op0, fill_4_op0_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+ fill_4_opx, fill_4_opx_trans, fill_4_opx, fill_4_opx_trans,
+
+ fill_8_op0, fill_8_op0_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+ fill_8_opx, fill_8_opx_trans, fill_8_opx, fill_8_opx_trans,
+
+ fill_16_op0, fill_16_op0_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans,
+ fill_16_opx, fill_16_opx_trans, fill_16_opx, fill_16_opx_trans
};
#define RECURSIVE_INCLUDE
/* non-transparent replace ops */
-#define PIXEL_OP(src, mask, pixel) pixel = pixel
-#define PIXEL_OP_TIMING 2
-#define PIXEL_OP_REQUIRES_SOURCE 0
-#define TRANSPARENCY 0
+#define PIXEL_OP(src, mask, pixel) pixel = pixel
+#define PIXEL_OP_TIMING 2
+#define PIXEL_OP_REQUIRES_SOURCE 0
+#define TRANSPARENCY 0
/* 1bpp cases */
- #define BITS_PER_PIXEL 1
- #define FUNCTION_NAME(base) base##_1_op0
+ #define BITS_PER_PIXEL 1
+ #define FUNCTION_NAME(base) base##_1_op0
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 2bpp cases */
- #define BITS_PER_PIXEL 2
- #define FUNCTION_NAME(base) base##_2_op0
+ #define BITS_PER_PIXEL 2
+ #define FUNCTION_NAME(base) base##_2_op0
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 4bpp cases */
- #define BITS_PER_PIXEL 4
- #define FUNCTION_NAME(base) base##_4_op0
+ #define BITS_PER_PIXEL 4
+ #define FUNCTION_NAME(base) base##_4_op0
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 8bpp cases */
- #define BITS_PER_PIXEL 8
- #define FUNCTION_NAME(base) base##_8_op0
+ #define BITS_PER_PIXEL 8
+ #define FUNCTION_NAME(base) base##_8_op0
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 16bpp cases */
- #define BITS_PER_PIXEL 16
- #define FUNCTION_NAME(base) base##_16_op0
+ #define BITS_PER_PIXEL 16
+ #define FUNCTION_NAME(base) base##_16_op0
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
@@ -766,42 +766,42 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) =
#undef PIXEL_OP
-#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel)
-#define PIXEL_OP_TIMING pixel_op_timing
-#define PIXEL_OP_REQUIRES_SOURCE 1
-#define TRANSPARENCY 0
+#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel)
+#define PIXEL_OP_TIMING pixel_op_timing
+#define PIXEL_OP_REQUIRES_SOURCE 1
+#define TRANSPARENCY 0
/* 1bpp cases */
- #define BITS_PER_PIXEL 1
- #define FUNCTION_NAME(base) base##_1_opx
+ #define BITS_PER_PIXEL 1
+ #define FUNCTION_NAME(base) base##_1_opx
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 2bpp cases */
- #define BITS_PER_PIXEL 2
- #define FUNCTION_NAME(base) base##_2_opx
+ #define BITS_PER_PIXEL 2
+ #define FUNCTION_NAME(base) base##_2_opx
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 4bpp cases */
- #define BITS_PER_PIXEL 4
- #define FUNCTION_NAME(base) base##_4_opx
+ #define BITS_PER_PIXEL 4
+ #define FUNCTION_NAME(base) base##_4_opx
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 8bpp cases */
- #define BITS_PER_PIXEL 8
- #define FUNCTION_NAME(base) base##_8_opx
+ #define BITS_PER_PIXEL 8
+ #define FUNCTION_NAME(base) base##_8_opx
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 16bpp cases */
- #define BITS_PER_PIXEL 16
- #define FUNCTION_NAME(base) base##_16_opx
+ #define BITS_PER_PIXEL 16
+ #define FUNCTION_NAME(base) base##_16_opx
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
@@ -813,42 +813,42 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) =
/* transparent replace ops */
-#define PIXEL_OP(src, mask, pixel) pixel = pixel
-#define PIXEL_OP_REQUIRES_SOURCE 0
-#define PIXEL_OP_TIMING 4
-#define TRANSPARENCY 1
+#define PIXEL_OP(src, mask, pixel) pixel = pixel
+#define PIXEL_OP_REQUIRES_SOURCE 0
+#define PIXEL_OP_TIMING 4
+#define TRANSPARENCY 1
/* 1bpp cases */
- #define BITS_PER_PIXEL 1
- #define FUNCTION_NAME(base) base##_1_op0_trans
+ #define BITS_PER_PIXEL 1
+ #define FUNCTION_NAME(base) base##_1_op0_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 2bpp cases */
- #define BITS_PER_PIXEL 2
- #define FUNCTION_NAME(base) base##_2_op0_trans
+ #define BITS_PER_PIXEL 2
+ #define FUNCTION_NAME(base) base##_2_op0_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 4bpp cases */
- #define BITS_PER_PIXEL 4
- #define FUNCTION_NAME(base) base##_4_op0_trans
+ #define BITS_PER_PIXEL 4
+ #define FUNCTION_NAME(base) base##_4_op0_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 8bpp cases */
- #define BITS_PER_PIXEL 8
- #define FUNCTION_NAME(base) base##_8_op0_trans
+ #define BITS_PER_PIXEL 8
+ #define FUNCTION_NAME(base) base##_8_op0_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 16bpp cases */
- #define BITS_PER_PIXEL 16
- #define FUNCTION_NAME(base) base##_16_op0_trans
+ #define BITS_PER_PIXEL 16
+ #define FUNCTION_NAME(base) base##_16_op0_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
@@ -859,42 +859,42 @@ static void (*const fill_op_table[])(tms34010_state *tms, int) =
#undef PIXEL_OP
-#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel)
-#define PIXEL_OP_REQUIRES_SOURCE 1
-#define PIXEL_OP_TIMING (2+pixel_op_timing)
-#define TRANSPARENCY 1
+#define PIXEL_OP(src, mask, pixel) pixel = (*pixel_op)(src, mask, pixel)
+#define PIXEL_OP_REQUIRES_SOURCE 1
+#define PIXEL_OP_TIMING (2+pixel_op_timing)
+#define TRANSPARENCY 1
/* 1bpp cases */
- #define BITS_PER_PIXEL 1
- #define FUNCTION_NAME(base) base##_1_opx_trans
+ #define BITS_PER_PIXEL 1
+ #define FUNCTION_NAME(base) base##_1_opx_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 2bpp cases */
- #define BITS_PER_PIXEL 2
- #define FUNCTION_NAME(base) base##_2_opx_trans
+ #define BITS_PER_PIXEL 2
+ #define FUNCTION_NAME(base) base##_2_opx_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 4bpp cases */
- #define BITS_PER_PIXEL 4
- #define FUNCTION_NAME(base) base##_4_opx_trans
+ #define BITS_PER_PIXEL 4
+ #define FUNCTION_NAME(base) base##_4_opx_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 8bpp cases */
- #define BITS_PER_PIXEL 8
- #define FUNCTION_NAME(base) base##_8_opx_trans
+ #define BITS_PER_PIXEL 8
+ #define FUNCTION_NAME(base) base##_8_opx_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
/* 16bpp cases */
- #define BITS_PER_PIXEL 16
- #define FUNCTION_NAME(base) base##_16_opx_trans
+ #define BITS_PER_PIXEL 16
+ #define FUNCTION_NAME(base) base##_16_opx_trans
#include "34010gfx.c"
#undef FUNCTION_NAME
#undef BITS_PER_PIXEL
@@ -2040,4 +2040,3 @@ static void FUNCTION_NAME(fill)(tms34010_state *tms, int dst_is_linear)
}
#endif
-
diff --git a/src/emu/cpu/tms34010/34010ops.c b/src/emu/cpu/tms34010/34010ops.c
index 346480d4099..dee8c2901cb 100644
--- a/src/emu/cpu/tms34010/34010ops.c
+++ b/src/emu/cpu/tms34010/34010ops.c
@@ -16,14 +16,14 @@
#define ZEXTEND(val,width) if (width) (val) &= ((UINT32)0xffffffff >> (32 - (width)))
#define SEXTEND(val,width) if (width) (val) = (INT32)((val) << (32 - (width))) >> (32 - (width))
-#define SXYTOL(T,val) ((((INT16)(val).y * (T)->convsp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T))
-#define DXYTOL(T,val) ((((INT16)(val).y * (T)->convdp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T))
-#define MXYTOL(T,val) ((((INT16)(val).y * (T)->convmp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T))
+#define SXYTOL(T,val) ((((INT16)(val).y * (T)->convsp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T))
+#define DXYTOL(T,val) ((((INT16)(val).y * (T)->convdp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T))
+#define MXYTOL(T,val) ((((INT16)(val).y * (T)->convmp) + ((INT16)(val).x << (T)->pixelshift)) + OFFSET(T))
-#define COUNT_CYCLES(T,x) (T)->icount -= x
+#define COUNT_CYCLES(T,x) (T)->icount -= x
#define COUNT_UNKNOWN_CYCLES(T,x) COUNT_CYCLES(T,x)
-#define CORRECT_ODD_PC(T,x) do { if ((T)->pc & 0x0f) logerror("%s to PC=%08X\n", x, (T)->pc); (T)->pc &= ~0x0f; } while (0)
+#define CORRECT_ODD_PC(T,x) do { if ((T)->pc & 0x0f) logerror("%s to PC=%08X\n", x, (T)->pc); (T)->pc &= ~0x0f; } while (0)
@@ -31,41 +31,41 @@
FLAG HANDLING MACROS
***************************************************************************/
-#define SIGN(val) ((val) & 0x80000000)
-
-#define CLR_Z(T) (T)->st &= ~STBIT_Z
-#define CLR_V(T) (T)->st &= ~STBIT_V
-#define CLR_C(T) (T)->st &= ~STBIT_C
-#define CLR_N(T) (T)->st &= ~STBIT_N
-#define CLR_NZ(T) (T)->st &= ~(STBIT_N | STBIT_Z)
-#define CLR_CZ(T) (T)->st &= ~(STBIT_C | STBIT_Z)
-#define CLR_ZV(T) (T)->st &= ~(STBIT_Z | STBIT_V)
-#define CLR_NZV(T) (T)->st &= ~(STBIT_N | STBIT_Z | STBIT_V)
-#define CLR_NCZ(T) (T)->st &= ~(STBIT_N | STBIT_C | STBIT_Z)
-#define CLR_NCZV(T) (T)->st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V)
-
-#define SET_V_BIT_LO(T,val,bit) (T)->st |= ((val) << (28 - (bit))) & STBIT_V
-#define SET_V_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 28)) & STBIT_V
-#define SET_V_LOG(T,val) (T)->st |= (val) << 28
-#define SET_Z_BIT_LO(T,val,bit) (T)->st |= ((val) << (29 - (bit))) & STBIT_Z
-#define SET_Z_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 29)) & STBIT_Z
-#define SET_Z_LOG(T,val) (T)->st |= (val) << 29
-#define SET_C_BIT_LO(T,val,bit) (T)->st |= ((val) << (30 - (bit))) & STBIT_C
-#define SET_C_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 30)) & STBIT_C
-#define SET_C_LOG(T,val) (T)->st |= (val) << 30
-#define SET_N_BIT(T,val,bit) (T)->st |= ((val) << (31 - (bit))) & STBIT_N
-#define SET_N_LOG(T,val) (T)->st |= (val) << 31
-
-#define SET_Z_VAL(T,val) SET_Z_LOG(T, (val) == 0)
-#define SET_N_VAL(T,val) SET_N_BIT(T, val, 31)
-#define SET_NZ_VAL(T,val) SET_Z_VAL(T, val); SET_N_VAL(T, val)
-#define SET_V_SUB(T,a,b,r) SET_V_BIT_HI(T, ((a) ^ (b)) & ((a) ^ (r)), 31)
-#define SET_V_ADD(T,a,b,r) SET_V_BIT_HI(T, ~((a) ^ (b)) & ((a) ^ (r)), 31)
-#define SET_C_SUB(T,a,b) SET_C_LOG(T, (UINT32)(b) > (UINT32)(a))
-#define SET_C_ADD(T,a,b) SET_C_LOG(T, (UINT32)~(a) < (UINT32)(b))
-#define SET_NZV_SUB(T,a,b,r) SET_NZ_VAL(T,r); SET_V_SUB(T,a,b,r)
-#define SET_NZCV_SUB(T,a,b,r) SET_NZV_SUB(T,a,b,r); SET_C_SUB(T,a,b)
-#define SET_NZCV_ADD(T,a,b,r) SET_NZ_VAL(T,r); SET_V_ADD(T,a,b,r); SET_C_ADD(T,a,b)
+#define SIGN(val) ((val) & 0x80000000)
+
+#define CLR_Z(T) (T)->st &= ~STBIT_Z
+#define CLR_V(T) (T)->st &= ~STBIT_V
+#define CLR_C(T) (T)->st &= ~STBIT_C
+#define CLR_N(T) (T)->st &= ~STBIT_N
+#define CLR_NZ(T) (T)->st &= ~(STBIT_N | STBIT_Z)
+#define CLR_CZ(T) (T)->st &= ~(STBIT_C | STBIT_Z)
+#define CLR_ZV(T) (T)->st &= ~(STBIT_Z | STBIT_V)
+#define CLR_NZV(T) (T)->st &= ~(STBIT_N | STBIT_Z | STBIT_V)
+#define CLR_NCZ(T) (T)->st &= ~(STBIT_N | STBIT_C | STBIT_Z)
+#define CLR_NCZV(T) (T)->st &= ~(STBIT_N | STBIT_C | STBIT_Z | STBIT_V)
+
+#define SET_V_BIT_LO(T,val,bit) (T)->st |= ((val) << (28 - (bit))) & STBIT_V
+#define SET_V_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 28)) & STBIT_V
+#define SET_V_LOG(T,val) (T)->st |= (val) << 28
+#define SET_Z_BIT_LO(T,val,bit) (T)->st |= ((val) << (29 - (bit))) & STBIT_Z
+#define SET_Z_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 29)) & STBIT_Z
+#define SET_Z_LOG(T,val) (T)->st |= (val) << 29
+#define SET_C_BIT_LO(T,val,bit) (T)->st |= ((val) << (30 - (bit))) & STBIT_C
+#define SET_C_BIT_HI(T,val,bit) (T)->st |= ((val) >> ((bit) - 30)) & STBIT_C
+#define SET_C_LOG(T,val) (T)->st |= (val) << 30
+#define SET_N_BIT(T,val,bit) (T)->st |= ((val) << (31 - (bit))) & STBIT_N
+#define SET_N_LOG(T,val) (T)->st |= (val) << 31
+
+#define SET_Z_VAL(T,val) SET_Z_LOG(T, (val) == 0)
+#define SET_N_VAL(T,val) SET_N_BIT(T, val, 31)
+#define SET_NZ_VAL(T,val) SET_Z_VAL(T, val); SET_N_VAL(T, val)
+#define SET_V_SUB(T,a,b,r) SET_V_BIT_HI(T, ((a) ^ (b)) & ((a) ^ (r)), 31)
+#define SET_V_ADD(T,a,b,r) SET_V_BIT_HI(T, ~((a) ^ (b)) & ((a) ^ (r)), 31)
+#define SET_C_SUB(T,a,b) SET_C_LOG(T, (UINT32)(b) > (UINT32)(a))
+#define SET_C_ADD(T,a,b) SET_C_LOG(T, (UINT32)~(a) < (UINT32)(b))
+#define SET_NZV_SUB(T,a,b,r) SET_NZ_VAL(T,r); SET_V_SUB(T,a,b,r)
+#define SET_NZCV_SUB(T,a,b,r) SET_NZV_SUB(T,a,b,r); SET_C_SUB(T,a,b)
+#define SET_NZCV_ADD(T,a,b,r) SET_NZ_VAL(T,r); SET_V_ADD(T,a,b,r); SET_C_ADD(T,a,b)
static const UINT8 fw_inc[32] = { 32,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31 };
@@ -107,93 +107,93 @@ static void unimpl(tms34010_state *tms, UINT16 op)
X/Y OPERATIONS
***************************************************************************/
-#define ADD_XY(R) \
-{ \
- XY a = R##REG_XY(tms,SRCREG(op)); \
- XY *b = &R##REG_XY(tms,DSTREG(op)); \
- CLR_NCZV(tms); \
- b->x += a.x; \
- b->y += a.y; \
- SET_N_LOG(tms, b->x == 0); \
- SET_C_BIT_LO(tms, b->y, 15); \
- SET_Z_LOG(tms, b->y == 0); \
- SET_V_BIT_LO(tms, b->x, 15); \
- COUNT_CYCLES(tms,1); \
+#define ADD_XY(R) \
+{ \
+ XY a = R##REG_XY(tms,SRCREG(op)); \
+ XY *b = &R##REG_XY(tms,DSTREG(op)); \
+ CLR_NCZV(tms); \
+ b->x += a.x; \
+ b->y += a.y; \
+ SET_N_LOG(tms, b->x == 0); \
+ SET_C_BIT_LO(tms, b->y, 15); \
+ SET_Z_LOG(tms, b->y == 0); \
+ SET_V_BIT_LO(tms, b->x, 15); \
+ COUNT_CYCLES(tms,1); \
}
static void add_xy_a(tms34010_state *tms, UINT16 op) { ADD_XY(A); }
static void add_xy_b(tms34010_state *tms, UINT16 op) { ADD_XY(B); }
-#define SUB_XY(R) \
-{ \
- XY a = R##REG_XY(tms,SRCREG(op)); \
- XY *b = &R##REG_XY(tms,DSTREG(op)); \
- CLR_NCZV(tms); \
- SET_N_LOG(tms, a.x == b->x); \
- SET_C_LOG(tms, a.y > b->y); \
- SET_Z_LOG(tms, a.y == b->y); \
- SET_V_LOG(tms, a.x > b->x); \
- b->x -= a.x; \
- b->y -= a.y; \
- COUNT_CYCLES(tms,1); \
+#define SUB_XY(R) \
+{ \
+ XY a = R##REG_XY(tms,SRCREG(op)); \
+ XY *b = &R##REG_XY(tms,DSTREG(op)); \
+ CLR_NCZV(tms); \
+ SET_N_LOG(tms, a.x == b->x); \
+ SET_C_LOG(tms, a.y > b->y); \
+ SET_Z_LOG(tms, a.y == b->y); \
+ SET_V_LOG(tms, a.x > b->x); \
+ b->x -= a.x; \
+ b->y -= a.y; \
+ COUNT_CYCLES(tms,1); \
}
static void sub_xy_a(tms34010_state *tms, UINT16 op) { SUB_XY(A); }
static void sub_xy_b(tms34010_state *tms, UINT16 op) { SUB_XY(B); }
-#define CMP_XY(R) \
-{ \
- INT16 res; \
- XY a = R##REG_XY(tms,DSTREG(op)); \
- XY b = R##REG_XY(tms,SRCREG(op)); \
- CLR_NCZV(tms); \
- res = a.x-b.x; \
- SET_N_LOG(tms, res == 0); \
- SET_V_BIT_LO(tms, res, 15); \
- res = a.y-b.y; \
- SET_Z_LOG(tms, res == 0); \
- SET_C_BIT_LO(tms, res, 15); \
- COUNT_CYCLES(tms,1); \
+#define CMP_XY(R) \
+{ \
+ INT16 res; \
+ XY a = R##REG_XY(tms,DSTREG(op)); \
+ XY b = R##REG_XY(tms,SRCREG(op)); \
+ CLR_NCZV(tms); \
+ res = a.x-b.x; \
+ SET_N_LOG(tms, res == 0); \
+ SET_V_BIT_LO(tms, res, 15); \
+ res = a.y-b.y; \
+ SET_Z_LOG(tms, res == 0); \
+ SET_C_BIT_LO(tms, res, 15); \
+ COUNT_CYCLES(tms,1); \
}
static void cmp_xy_a(tms34010_state *tms, UINT16 op) { CMP_XY(A); }
static void cmp_xy_b(tms34010_state *tms, UINT16 op) { CMP_XY(B); }
-#define CPW(R) \
-{ \
- INT32 res = 0; \
- INT16 x = R##REG_X(tms,SRCREG(op)); \
- INT16 y = R##REG_Y(tms,SRCREG(op)); \
+#define CPW(R) \
+{ \
+ INT32 res = 0; \
+ INT16 x = R##REG_X(tms,SRCREG(op)); \
+ INT16 y = R##REG_Y(tms,SRCREG(op)); \
\
- CLR_V(tms); \
- res |= ((WSTART_X(tms) > x) ? 0x20 : 0); \
- res |= ((x > WEND_X(tms)) ? 0x40 : 0); \
- res |= ((WSTART_Y(tms) > y) ? 0x80 : 0); \
- res |= ((y > WEND_Y(tms)) ? 0x100 : 0); \
- R##REG(tms,DSTREG(op)) = res; \
- SET_V_LOG(tms, res != 0); \
- COUNT_CYCLES(tms,1); \
+ CLR_V(tms); \
+ res |= ((WSTART_X(tms) > x) ? 0x20 : 0); \
+ res |= ((x > WEND_X(tms)) ? 0x40 : 0); \
+ res |= ((WSTART_Y(tms) > y) ? 0x80 : 0); \
+ res |= ((y > WEND_Y(tms)) ? 0x100 : 0); \
+ R##REG(tms,DSTREG(op)) = res; \
+ SET_V_LOG(tms, res != 0); \
+ COUNT_CYCLES(tms,1); \
}
static void cpw_a(tms34010_state *tms, UINT16 op) { CPW(A); }
static void cpw_b(tms34010_state *tms, UINT16 op) { CPW(B); }
-#define CVXYL(R) \
-{ \
- R##REG(tms,DSTREG(op)) = DXYTOL(tms,R##REG_XY(tms,SRCREG(op))); \
- COUNT_CYCLES(tms,3); \
+#define CVXYL(R) \
+{ \
+ R##REG(tms,DSTREG(op)) = DXYTOL(tms,R##REG_XY(tms,SRCREG(op))); \
+ COUNT_CYCLES(tms,3); \
}
static void cvxyl_a(tms34010_state *tms, UINT16 op) { CVXYL(A); }
static void cvxyl_b(tms34010_state *tms, UINT16 op) { CVXYL(B); }
-#define MOVX(R) \
-{ \
- R##REG(tms,DSTREG(op)) = (R##REG(tms,DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,SRCREG(op)); \
- COUNT_CYCLES(tms,1); \
+#define MOVX(R) \
+{ \
+ R##REG(tms,DSTREG(op)) = (R##REG(tms,DSTREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,SRCREG(op)); \
+ COUNT_CYCLES(tms,1); \
}
static void movx_a(tms34010_state *tms, UINT16 op) { MOVX(A); }
static void movx_b(tms34010_state *tms, UINT16 op) { MOVX(B); }
-#define MOVY(R) \
-{ \
- R##REG(tms,DSTREG(op)) = (R##REG(tms,SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,DSTREG(op)); \
- COUNT_CYCLES(tms,1); \
+#define MOVY(R) \
+{ \
+ R##REG(tms,DSTREG(op)) = (R##REG(tms,SRCREG(op)) & 0xffff0000) | (UINT16)R##REG(tms,DSTREG(op)); \
+ COUNT_CYCLES(tms,1); \
}
static void movy_a(tms34010_state *tms, UINT16 op) { MOVY(A); }
static void movy_b(tms34010_state *tms, UINT16 op) { MOVY(B); }
@@ -204,102 +204,102 @@ static void movy_b(tms34010_state *tms, UINT16 op) { MOVY(B); }
PIXEL TRANSFER OPERATIONS
***************************************************************************/
-#define PIXT_RI(R) \
-{ \
- WPIXEL(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \
- COUNT_UNKNOWN_CYCLES(tms,2); \
+#define PIXT_RI(R) \
+{ \
+ WPIXEL(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \
+ COUNT_UNKNOWN_CYCLES(tms,2); \
}
static void pixt_ri_a(tms34010_state *tms, UINT16 op) { PIXT_RI(A); }
static void pixt_ri_b(tms34010_state *tms, UINT16 op) { PIXT_RI(B); }
-#define PIXT_RIXY(R) \
-{ \
- if (WINDOW_CHECKING(tms) != 0) \
- { \
- CLR_V(tms); \
- if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \
- R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \
- { \
- SET_V_LOG(tms, 1); \
- goto skip; \
- } \
- if (WINDOW_CHECKING(tms) == 1) goto skip; \
- } \
- WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),R##REG(tms,SRCREG(op))); \
-skip: \
- COUNT_UNKNOWN_CYCLES(tms,4); \
+#define PIXT_RIXY(R) \
+{ \
+ if (WINDOW_CHECKING(tms) != 0) \
+ { \
+ CLR_V(tms); \
+ if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \
+ R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \
+ { \
+ SET_V_LOG(tms, 1); \
+ goto skip; \
+ } \
+ if (WINDOW_CHECKING(tms) == 1) goto skip; \
+ } \
+ WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),R##REG(tms,SRCREG(op))); \
+skip: \
+ COUNT_UNKNOWN_CYCLES(tms,4); \
}
static void pixt_rixy_a(tms34010_state *tms, UINT16 op) { PIXT_RIXY(A); }
static void pixt_rixy_b(tms34010_state *tms, UINT16 op) { PIXT_RIXY(B); }
-#define PIXT_IR(R) \
-{ \
- INT32 temp = RPIXEL(tms,R##REG(tms,SRCREG(op))); \
- CLR_V(tms); \
- R##REG(tms,DSTREG(op)) = temp; \
- SET_V_LOG(tms, temp != 0); \
- COUNT_CYCLES(tms,4); \
+#define PIXT_IR(R) \
+{ \
+ INT32 temp = RPIXEL(tms,R##REG(tms,SRCREG(op))); \
+ CLR_V(tms); \
+ R##REG(tms,DSTREG(op)) = temp; \
+ SET_V_LOG(tms, temp != 0); \
+ COUNT_CYCLES(tms,4); \
}
static void pixt_ir_a(tms34010_state *tms, UINT16 op) { PIXT_IR(A); }
static void pixt_ir_b(tms34010_state *tms, UINT16 op) { PIXT_IR(B); }
-#define PIXT_II(R) \
-{ \
- WPIXEL(tms,R##REG(tms,DSTREG(op)),RPIXEL(tms,R##REG(tms,SRCREG(op)))); \
- COUNT_UNKNOWN_CYCLES(tms,4); \
+#define PIXT_II(R) \
+{ \
+ WPIXEL(tms,R##REG(tms,DSTREG(op)),RPIXEL(tms,R##REG(tms,SRCREG(op)))); \
+ COUNT_UNKNOWN_CYCLES(tms,4); \
}
static void pixt_ii_a(tms34010_state *tms, UINT16 op) { PIXT_II(A); }
static void pixt_ii_b(tms34010_state *tms, UINT16 op) { PIXT_II(B); }
-#define PIXT_IXYR(R) \
-{ \
- INT32 temp = RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op)))); \
- CLR_V(tms); \
- R##REG(tms,DSTREG(op)) = temp; \
- SET_V_LOG(tms, temp != 0); \
- COUNT_CYCLES(tms,6); \
+#define PIXT_IXYR(R) \
+{ \
+ INT32 temp = RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op)))); \
+ CLR_V(tms); \
+ R##REG(tms,DSTREG(op)) = temp; \
+ SET_V_LOG(tms, temp != 0); \
+ COUNT_CYCLES(tms,6); \
}
static void pixt_ixyr_a(tms34010_state *tms, UINT16 op) { PIXT_IXYR(A); }
static void pixt_ixyr_b(tms34010_state *tms, UINT16 op) { PIXT_IXYR(B); }
-#define PIXT_IXYIXY(R) \
-{ \
- if (WINDOW_CHECKING(tms) != 0) \
- { \
- CLR_V(tms); \
- if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \
- R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \
- { \
- SET_V_LOG(tms, 1); \
- goto skip; \
- } \
- if (WINDOW_CHECKING(tms) == 1) goto skip; \
- } \
- WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op))))); \
-skip: \
- COUNT_UNKNOWN_CYCLES(tms,7); \
+#define PIXT_IXYIXY(R) \
+{ \
+ if (WINDOW_CHECKING(tms) != 0) \
+ { \
+ CLR_V(tms); \
+ if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \
+ R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \
+ { \
+ SET_V_LOG(tms, 1); \
+ goto skip; \
+ } \
+ if (WINDOW_CHECKING(tms) == 1) goto skip; \
+ } \
+ WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),RPIXEL(tms,SXYTOL(tms,R##REG_XY(tms,SRCREG(op))))); \
+skip: \
+ COUNT_UNKNOWN_CYCLES(tms,7); \
}
static void pixt_ixyixy_a(tms34010_state *tms, UINT16 op) { PIXT_IXYIXY(A); }
static void pixt_ixyixy_b(tms34010_state *tms, UINT16 op) { PIXT_IXYIXY(B); }
-#define DRAV(R) \
-{ \
- if (WINDOW_CHECKING(tms) != 0) \
- { \
- CLR_V(tms); \
- if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \
- R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \
- { \
- SET_V_LOG(tms, 1); \
- goto skip; \
- } \
- if (WINDOW_CHECKING(tms) == 1) goto skip; \
- } \
- WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),COLOR1(tms)); \
-skip: \
- R##REG_X(tms,DSTREG(op)) += R##REG_X(tms,SRCREG(op)); \
- R##REG_Y(tms,DSTREG(op)) += R##REG_Y(tms,SRCREG(op)); \
- COUNT_UNKNOWN_CYCLES(tms,4); \
+#define DRAV(R) \
+{ \
+ if (WINDOW_CHECKING(tms) != 0) \
+ { \
+ CLR_V(tms); \
+ if (R##REG_X(tms,DSTREG(op)) < WSTART_X(tms) || R##REG_X(tms,DSTREG(op)) > WEND_X(tms) || \
+ R##REG_Y(tms,DSTREG(op)) < WSTART_Y(tms) || R##REG_Y(tms,DSTREG(op)) > WEND_Y(tms)) \
+ { \
+ SET_V_LOG(tms, 1); \
+ goto skip; \
+ } \
+ if (WINDOW_CHECKING(tms) == 1) goto skip; \
+ } \
+ WPIXEL(tms,DXYTOL(tms,R##REG_XY(tms,DSTREG(op))),COLOR1(tms)); \
+skip: \
+ R##REG_X(tms,DSTREG(op)) += R##REG_X(tms,SRCREG(op)); \
+ R##REG_Y(tms,DSTREG(op)) += R##REG_Y(tms,SRCREG(op)); \
+ COUNT_UNKNOWN_CYCLES(tms,4); \
}
static void drav_a(tms34010_state *tms, UINT16 op) { DRAV(A); }
static void drav_b(tms34010_state *tms, UINT16 op) { DRAV(B); }
@@ -310,146 +310,146 @@ static void drav_b(tms34010_state *tms, UINT16 op) { DRAV(B); }
ARITHMETIC OPERATIONS
***************************************************************************/
-#define ABS(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 r = 0 - *rd; \
- CLR_NZV(tms); \
- if (r > 0) *rd = r; \
- SET_NZ_VAL(tms, r); \
- SET_V_LOG(tms, r == (INT32)0x80000000); \
- COUNT_CYCLES(tms,1); \
+#define ABS(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 r = 0 - *rd; \
+ CLR_NZV(tms); \
+ if (r > 0) *rd = r; \
+ SET_NZ_VAL(tms, r); \
+ SET_V_LOG(tms, r == (INT32)0x80000000); \
+ COUNT_CYCLES(tms,1); \
}
static void abs_a(tms34010_state *tms, UINT16 op) { ABS(A); }
static void abs_b(tms34010_state *tms, UINT16 op) { ABS(B); }
-#define ADD(R) \
-{ \
- INT32 a = R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
- CLR_NCZV(tms); \
- *rd = r; \
- SET_NZCV_ADD(tms,a,b,r); \
- COUNT_CYCLES(tms,1); \
+#define ADD(R) \
+{ \
+ INT32 a = R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 b = *rd; \
+ INT32 r = a + b; \
+ CLR_NCZV(tms); \
+ *rd = r; \
+ SET_NZCV_ADD(tms,a,b,r); \
+ COUNT_CYCLES(tms,1); \
}
static void add_a(tms34010_state *tms, UINT16 op) { ADD(A); }
static void add_b(tms34010_state *tms, UINT16 op) { ADD(B); }
-#define ADDC(R) \
-{ \
- /* I'm not sure to which side the carry is added to, should */ \
- /* verify it against the examples */ \
- INT32 a = R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b + (C_FLAG(tms) ? 1 : 0); \
- CLR_NCZV(tms); \
- *rd = r; \
- SET_NZCV_ADD(tms,a,b,r); \
- COUNT_CYCLES(tms,1); \
+#define ADDC(R) \
+{ \
+ /* I'm not sure to which side the carry is added to, should */ \
+ /* verify it against the examples */ \
+ INT32 a = R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 b = *rd; \
+ INT32 r = a + b + (C_FLAG(tms) ? 1 : 0); \
+ CLR_NCZV(tms); \
+ *rd = r; \
+ SET_NZCV_ADD(tms,a,b,r); \
+ COUNT_CYCLES(tms,1); \
}
static void addc_a(tms34010_state *tms, UINT16 op) { ADDC(A); }
static void addc_b(tms34010_state *tms, UINT16 op) { ADDC(B); }
-#define ADDI_W(R) \
-{ \
- INT32 a = PARAM_WORD(tms); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
- CLR_NCZV(tms); \
- *rd = r; \
- SET_NZCV_ADD(tms,a,b,r); \
- COUNT_CYCLES(tms,2); \
+#define ADDI_W(R) \
+{ \
+ INT32 a = PARAM_WORD(tms); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 b = *rd; \
+ INT32 r = a + b; \
+ CLR_NCZV(tms); \
+ *rd = r; \
+ SET_NZCV_ADD(tms,a,b,r); \
+ COUNT_CYCLES(tms,2); \
}
static void addi_w_a(tms34010_state *tms, UINT16 op) { ADDI_W(A); }
static void addi_w_b(tms34010_state *tms, UINT16 op) { ADDI_W(B); }
-#define ADDI_L(R) \
-{ \
- INT32 a = PARAM_LONG(tms); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
- CLR_NCZV(tms); \
- *rd = r; \
- SET_NZCV_ADD(tms,a,b,r); \
- COUNT_CYCLES(tms,3); \
+#define ADDI_L(R) \
+{ \
+ INT32 a = PARAM_LONG(tms); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 b = *rd; \
+ INT32 r = a + b; \
+ CLR_NCZV(tms); \
+ *rd = r; \
+ SET_NZCV_ADD(tms,a,b,r); \
+ COUNT_CYCLES(tms,3); \
}
static void addi_l_a(tms34010_state *tms, UINT16 op) { ADDI_L(A); }
static void addi_l_b(tms34010_state *tms, UINT16 op) { ADDI_L(B); }
-#define ADDK(R) \
-{ \
- INT32 a = fw_inc[PARAM_K(op)]; \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 b = *rd; \
- INT32 r = a + b; \
- CLR_NCZV(tms); \
- *rd = r; \
- SET_NZCV_ADD(tms,a,b,r); \
- COUNT_CYCLES(tms,1); \
+#define ADDK(R) \
+{ \
+ INT32 a = fw_inc[PARAM_K(op)]; \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 b = *rd; \
+ INT32 r = a + b; \
+ CLR_NCZV(tms); \
+ *rd = r; \
+ SET_NZCV_ADD(tms,a,b,r); \
+ COUNT_CYCLES(tms,1); \
}
static void addk_a(tms34010_state *tms, UINT16 op) { ADDK(A); }
static void addk_b(tms34010_state *tms, UINT16 op) { ADDK(B); }
-#define AND(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd &= R##REG(tms,SRCREG(op)); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,1); \
+#define AND(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd &= R##REG(tms,SRCREG(op)); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,1); \
}
static void and_a(tms34010_state *tms, UINT16 op) { AND(A); }
static void and_b(tms34010_state *tms, UINT16 op) { AND(B); }
-#define ANDI(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd &= ~PARAM_LONG(tms); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define ANDI(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd &= ~PARAM_LONG(tms); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void andi_a(tms34010_state *tms, UINT16 op) { ANDI(A); }
static void andi_b(tms34010_state *tms, UINT16 op) { ANDI(B); }
-#define ANDN(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd &= ~R##REG(tms,SRCREG(op)); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,1); \
+#define ANDN(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd &= ~R##REG(tms,SRCREG(op)); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,1); \
}
static void andn_a(tms34010_state *tms, UINT16 op) { ANDN(A); }
static void andn_b(tms34010_state *tms, UINT16 op) { ANDN(B); }
-#define BTST_K(R) \
-{ \
- int bit = 31 - PARAM_K(op); \
- CLR_Z(tms); \
- if (bit <= 29) \
- SET_Z_BIT_LO(tms, ~R##REG(tms,DSTREG(op)), bit); \
- else \
- SET_Z_BIT_HI(tms, ~R##REG(tms,DSTREG(op)), bit); \
- COUNT_CYCLES(tms,1); \
+#define BTST_K(R) \
+{ \
+ int bit = 31 - PARAM_K(op); \
+ CLR_Z(tms); \
+ if (bit <= 29) \
+ SET_Z_BIT_LO(tms, ~R##REG(tms,DSTREG(op)), bit); \
+ else \
+ SET_Z_BIT_HI(tms, ~R##REG(tms,DSTREG(op)), bit); \
+ COUNT_CYCLES(tms,1); \
}
static void btst_k_a(tms34010_state *tms, UINT16 op) { BTST_K(A); }
static void btst_k_b(tms34010_state *tms, UINT16 op) { BTST_K(B); }
-#define BTST_R(R) \
-{ \
- int bit = R##REG(tms,SRCREG(op)) & 0x1f; \
- CLR_Z(tms); \
- if (bit <= 29) \
- SET_Z_BIT_LO(tms, ~R##REG(tms,DSTREG(op)), bit); \
- else \
- SET_Z_BIT_HI(tms, ~R##REG(tms,DSTREG(op)), bit); \
- COUNT_CYCLES(tms,2); \
+#define BTST_R(R) \
+{ \
+ int bit = R##REG(tms,SRCREG(op)) & 0x1f; \
+ CLR_Z(tms); \
+ if (bit <= 29) \
+ SET_Z_BIT_LO(tms, ~R##REG(tms,DSTREG(op)), bit); \
+ else \
+ SET_Z_BIT_HI(tms, ~R##REG(tms,DSTREG(op)), bit); \
+ COUNT_CYCLES(tms,2); \
}
static void btst_r_a(tms34010_state *tms, UINT16 op) { BTST_R(A); }
static void btst_r_b(tms34010_state *tms, UINT16 op) { BTST_R(B); }
@@ -460,38 +460,38 @@ static void clrc(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,1);
}
-#define CMP(R) \
-{ \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 r = *rd - *rs; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,*rd,*rs,r); \
- COUNT_CYCLES(tms,1); \
+#define CMP(R) \
+{ \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 r = *rd - *rs; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,*rd,*rs,r); \
+ COUNT_CYCLES(tms,1); \
}
static void cmp_a(tms34010_state *tms, UINT16 op) { CMP(A); }
static void cmp_b(tms34010_state *tms, UINT16 op) { CMP(B); }
-#define CMPI_W(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 t = (INT16)~PARAM_WORD(tms); \
- INT32 r = *rd - t; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,*rd,t,r); \
- COUNT_CYCLES(tms,2); \
+#define CMPI_W(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 t = (INT16)~PARAM_WORD(tms); \
+ INT32 r = *rd - t; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,*rd,t,r); \
+ COUNT_CYCLES(tms,2); \
}
static void cmpi_w_a(tms34010_state *tms, UINT16 op) { CMPI_W(A); }
static void cmpi_w_b(tms34010_state *tms, UINT16 op) { CMPI_W(B); }
-#define CMPI_L(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 t = ~PARAM_LONG(tms); \
- INT32 r = *rd - t; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,*rd,t,r); \
- COUNT_CYCLES(tms,3); \
+#define CMPI_L(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 t = ~PARAM_LONG(tms); \
+ INT32 r = *rd - t; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,*rd,t,r); \
+ COUNT_CYCLES(tms,3); \
}
static void cmpi_l_a(tms34010_state *tms, UINT16 op) { CMPI_L(A); }
static void cmpi_l_b(tms34010_state *tms, UINT16 op) { CMPI_L(B); }
@@ -502,96 +502,96 @@ static void dint(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,3);
}
-#define DIVS(R) \
-{ \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- if (!(DSTREG(op) & 1)) \
- { \
- if (!*rs) \
- { \
- SET_V_LOG(tms, 1); \
- } \
- else \
- { \
- INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \
+#define DIVS(R) \
+{ \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ if (!(DSTREG(op) & 1)) \
+ { \
+ if (!*rs) \
+ { \
+ SET_V_LOG(tms, 1); \
+ } \
+ else \
+ { \
+ INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \
INT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
- INT64 quotient = dividend / *rs; \
- INT32 remainder = dividend % *rs; \
- UINT32 signbits = (INT32)quotient >> 31; \
- if (EXTRACT_64HI(quotient) != signbits) \
- { \
- SET_V_LOG(tms, 1); \
- } \
- else \
- { \
- *rd1 = quotient; \
- *rd2 = remainder; \
- SET_NZ_VAL(tms, *rd1); \
- } \
- } \
- COUNT_CYCLES(tms,40); \
- } \
- else \
- { \
- if (!*rs) \
- { \
- SET_V_LOG(tms, 1); \
- } \
- else \
- { \
- *rd1 /= *rs; \
- SET_NZ_VAL(tms, *rd1); \
- } \
- COUNT_CYCLES(tms,39); \
- } \
+ INT64 quotient = dividend / *rs; \
+ INT32 remainder = dividend % *rs; \
+ UINT32 signbits = (INT32)quotient >> 31; \
+ if (EXTRACT_64HI(quotient) != signbits) \
+ { \
+ SET_V_LOG(tms, 1); \
+ } \
+ else \
+ { \
+ *rd1 = quotient; \
+ *rd2 = remainder; \
+ SET_NZ_VAL(tms, *rd1); \
+ } \
+ } \
+ COUNT_CYCLES(tms,40); \
+ } \
+ else \
+ { \
+ if (!*rs) \
+ { \
+ SET_V_LOG(tms, 1); \
+ } \
+ else \
+ { \
+ *rd1 /= *rs; \
+ SET_NZ_VAL(tms, *rd1); \
+ } \
+ COUNT_CYCLES(tms,39); \
+ } \
}
static void divs_a(tms34010_state *tms, UINT16 op) { DIVS(A); }
static void divs_b(tms34010_state *tms, UINT16 op) { DIVS(B); }
-#define DIVU(R) \
-{ \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
- CLR_ZV(tms); \
- if (!(DSTREG(op) & 1)) \
- { \
- if (!*rs) \
- { \
- SET_V_LOG(tms, 1); \
- } \
- else \
- { \
- INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \
- UINT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
- UINT64 quotient = dividend / (UINT32)*rs; \
- UINT32 remainder = dividend % (UINT32)*rs; \
- if (EXTRACT_64HI(quotient) != 0) \
- { \
- SET_V_LOG(tms, 1); \
- } \
- else \
- { \
- *rd1 = quotient; \
- *rd2 = remainder; \
- SET_Z_VAL(tms, *rd1); \
- } \
- } \
- } \
- else \
- { \
- if (!*rs) \
- { \
- SET_V_LOG(tms, 1); \
- } \
- else \
- { \
- *rd1 = (UINT32)*rd1 / (UINT32)*rs; \
- SET_Z_VAL(tms, *rd1); \
- } \
- } \
- COUNT_CYCLES(tms,37); \
+#define DIVU(R) \
+{ \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
+ CLR_ZV(tms); \
+ if (!(DSTREG(op) & 1)) \
+ { \
+ if (!*rs) \
+ { \
+ SET_V_LOG(tms, 1); \
+ } \
+ else \
+ { \
+ INT32 *rd2 = &R##REG(tms,DSTREG(op)+1); \
+ UINT64 dividend = ((UINT64)*rd1 << 32) | (UINT32)*rd2; \
+ UINT64 quotient = dividend / (UINT32)*rs; \
+ UINT32 remainder = dividend % (UINT32)*rs; \
+ if (EXTRACT_64HI(quotient) != 0) \
+ { \
+ SET_V_LOG(tms, 1); \
+ } \
+ else \
+ { \
+ *rd1 = quotient; \
+ *rd2 = remainder; \
+ SET_Z_VAL(tms, *rd1); \
+ } \
+ } \
+ } \
+ else \
+ { \
+ if (!*rs) \
+ { \
+ SET_V_LOG(tms, 1); \
+ } \
+ else \
+ { \
+ *rd1 = (UINT32)*rd1 / (UINT32)*rs; \
+ SET_Z_VAL(tms, *rd1); \
+ } \
+ } \
+ COUNT_CYCLES(tms,37); \
}
static void divu_a(tms34010_state *tms, UINT16 op) { DIVU(A); }
static void divu_b(tms34010_state *tms, UINT16 op) { DIVU(B); }
@@ -603,185 +603,185 @@ static void eint(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,3);
}
-#define EXGF(F,R) \
-{ \
- UINT8 shift = F ? 6 : 0; \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- UINT32 temp = (tms->st >> shift) & 0x3f; \
- tms->st &= ~(0x3f << shift); \
- tms->st |= (*rd & 0x3f) << shift; \
- *rd = temp; \
- COUNT_CYCLES(tms,1); \
+#define EXGF(F,R) \
+{ \
+ UINT8 shift = F ? 6 : 0; \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ UINT32 temp = (tms->st >> shift) & 0x3f; \
+ tms->st &= ~(0x3f << shift); \
+ tms->st |= (*rd & 0x3f) << shift; \
+ *rd = temp; \
+ COUNT_CYCLES(tms,1); \
}
static void exgf0_a(tms34010_state *tms, UINT16 op) { EXGF(0,A); }
static void exgf0_b(tms34010_state *tms, UINT16 op) { EXGF(0,B); }
static void exgf1_a(tms34010_state *tms, UINT16 op) { EXGF(1,A); }
static void exgf1_b(tms34010_state *tms, UINT16 op) { EXGF(1,B); }
-#define LMO(R) \
-{ \
- UINT32 res = 0; \
- UINT32 rs = R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- SET_Z_VAL(tms, rs); \
- if (rs) \
- { \
- while (!(rs & 0x80000000)) \
- { \
- res++; \
- rs <<= 1; \
- } \
- } \
- *rd = res; \
- COUNT_CYCLES(tms,1); \
+#define LMO(R) \
+{ \
+ UINT32 res = 0; \
+ UINT32 rs = R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ SET_Z_VAL(tms, rs); \
+ if (rs) \
+ { \
+ while (!(rs & 0x80000000)) \
+ { \
+ res++; \
+ rs <<= 1; \
+ } \
+ } \
+ *rd = res; \
+ COUNT_CYCLES(tms,1); \
}
static void lmo_a(tms34010_state *tms, UINT16 op) { LMO(A); }
static void lmo_b(tms34010_state *tms, UINT16 op) { LMO(B); }
-#define MMFM(R) \
-{ \
- INT32 i; \
- UINT16 l = (UINT16) PARAM_WORD(tms); \
- COUNT_CYCLES(tms,3); \
- { \
- INT32 rd = DSTREG(op); \
- for (i = 15; i >= 0 ; i--) \
- { \
- if (l & 0x8000) \
- { \
- R##REG(tms,i) = RLONG(tms, R##REG(tms,rd)); \
- R##REG(tms,rd) += 0x20; \
- COUNT_CYCLES(tms,4); \
- } \
- l <<= 1; \
- } \
- } \
+#define MMFM(R) \
+{ \
+ INT32 i; \
+ UINT16 l = (UINT16) PARAM_WORD(tms); \
+ COUNT_CYCLES(tms,3); \
+ { \
+ INT32 rd = DSTREG(op); \
+ for (i = 15; i >= 0 ; i--) \
+ { \
+ if (l & 0x8000) \
+ { \
+ R##REG(tms,i) = RLONG(tms, R##REG(tms,rd)); \
+ R##REG(tms,rd) += 0x20; \
+ COUNT_CYCLES(tms,4); \
+ } \
+ l <<= 1; \
+ } \
+ } \
}
static void mmfm_a(tms34010_state *tms, UINT16 op) { MMFM(A); }
static void mmfm_b(tms34010_state *tms, UINT16 op) { MMFM(B); }
-#define MMTM(R) \
-{ \
- UINT32 i; \
- UINT16 l = (UINT16) PARAM_WORD(tms); \
- COUNT_CYCLES(tms,2); \
- { \
- INT32 rd = DSTREG(op); \
- if (tms->is_34020) \
- { \
- CLR_N(tms); \
- SET_N_VAL(tms, R##REG(tms,rd) ^ 0x80000000); \
- } \
- for (i = 0; i < 16; i++) \
- { \
- if (l & 0x8000) \
- { \
- R##REG(tms,rd) -= 0x20; \
- WLONG(tms, R##REG(tms,rd),R##REG(tms,i)); \
- COUNT_CYCLES(tms,4); \
- } \
- l <<= 1; \
- } \
- } \
+#define MMTM(R) \
+{ \
+ UINT32 i; \
+ UINT16 l = (UINT16) PARAM_WORD(tms); \
+ COUNT_CYCLES(tms,2); \
+ { \
+ INT32 rd = DSTREG(op); \
+ if (tms->is_34020) \
+ { \
+ CLR_N(tms); \
+ SET_N_VAL(tms, R##REG(tms,rd) ^ 0x80000000); \
+ } \
+ for (i = 0; i < 16; i++) \
+ { \
+ if (l & 0x8000) \
+ { \
+ R##REG(tms,rd) -= 0x20; \
+ WLONG(tms, R##REG(tms,rd),R##REG(tms,i)); \
+ COUNT_CYCLES(tms,4); \
+ } \
+ l <<= 1; \
+ } \
+ } \
}
static void mmtm_a(tms34010_state *tms, UINT16 op) { MMTM(A); }
static void mmtm_b(tms34010_state *tms, UINT16 op) { MMTM(B); }
-#define MODS(R) \
-{ \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- if (*rs != 0) \
- { \
- *rd %= *rs; \
- SET_NZ_VAL(tms, *rd); \
- } \
- else \
- SET_V_LOG(tms, 1); \
- COUNT_CYCLES(tms,40); \
+#define MODS(R) \
+{ \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ if (*rs != 0) \
+ { \
+ *rd %= *rs; \
+ SET_NZ_VAL(tms, *rd); \
+ } \
+ else \
+ SET_V_LOG(tms, 1); \
+ COUNT_CYCLES(tms,40); \
}
static void mods_a(tms34010_state *tms, UINT16 op) { MODS(A); }
static void mods_b(tms34010_state *tms, UINT16 op) { MODS(B); }
-#define MODU(R) \
-{ \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_ZV(tms); \
- if (*rs != 0) \
- { \
- *rd = (UINT32)*rd % (UINT32)*rs; \
- SET_Z_VAL(tms, *rd); \
- } \
- else \
- SET_V_LOG(tms, 1); \
- COUNT_CYCLES(tms,35); \
+#define MODU(R) \
+{ \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_ZV(tms); \
+ if (*rs != 0) \
+ { \
+ *rd = (UINT32)*rd % (UINT32)*rs; \
+ SET_Z_VAL(tms, *rd); \
+ } \
+ else \
+ SET_V_LOG(tms, 1); \
+ COUNT_CYCLES(tms,35); \
}
static void modu_a(tms34010_state *tms, UINT16 op) { MODU(A); }
static void modu_b(tms34010_state *tms, UINT16 op) { MODU(B); }
-#define MPYS(R) \
-{ \
- INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
- INT32 m1 = R##REG(tms,SRCREG(op)); \
- INT64 product; \
+#define MPYS(R) \
+{ \
+ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
+ INT32 m1 = R##REG(tms,SRCREG(op)); \
+ INT64 product; \
\
- SEXTEND(m1, FW(tms,1)); \
- CLR_NZ(tms); \
- product = mul_32x32(m1, *rd1); \
- SET_Z_LOG(tms, product == 0); \
- SET_N_BIT(tms, product >> 32, 31); \
+ SEXTEND(m1, FW(tms,1)); \
+ CLR_NZ(tms); \
+ product = mul_32x32(m1, *rd1); \
+ SET_Z_LOG(tms, product == 0); \
+ SET_N_BIT(tms, product >> 32, 31); \
\
- *rd1 = EXTRACT_64HI(product); \
- R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \
+ *rd1 = EXTRACT_64HI(product); \
+ R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \
\
- COUNT_CYCLES(tms,20); \
+ COUNT_CYCLES(tms,20); \
}
static void mpys_a(tms34010_state *tms, UINT16 op) { MPYS(A); }
static void mpys_b(tms34010_state *tms, UINT16 op) { MPYS(B); }
-#define MPYU(R) \
-{ \
- INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
- UINT32 m1 = R##REG(tms,SRCREG(op)); \
- UINT64 product; \
+#define MPYU(R) \
+{ \
+ INT32 *rd1 = &R##REG(tms,DSTREG(op)); \
+ UINT32 m1 = R##REG(tms,SRCREG(op)); \
+ UINT64 product; \
\
- ZEXTEND(m1, FW(tms,1)); \
- CLR_Z(tms); \
- product = mulu_32x32(m1, *rd1); \
- SET_Z_LOG(tms, product == 0); \
+ ZEXTEND(m1, FW(tms,1)); \
+ CLR_Z(tms); \
+ product = mulu_32x32(m1, *rd1); \
+ SET_Z_LOG(tms, product == 0); \
\
- *rd1 = EXTRACT_64HI(product); \
- R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \
+ *rd1 = EXTRACT_64HI(product); \
+ R##REG(tms,DSTREG(op)|1) = EXTRACT_64LO(product); \
\
- COUNT_CYCLES(tms,21); \
+ COUNT_CYCLES(tms,21); \
}
static void mpyu_a(tms34010_state *tms, UINT16 op) { MPYU(A); }
static void mpyu_b(tms34010_state *tms, UINT16 op) { MPYU(B); }
-#define NEG(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 r = 0 - *rd; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,0,*rd,r); \
- *rd = r; \
- COUNT_CYCLES(tms,1); \
+#define NEG(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 r = 0 - *rd; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,0,*rd,r); \
+ *rd = r; \
+ COUNT_CYCLES(tms,1); \
}
static void neg_a(tms34010_state *tms, UINT16 op) { NEG(A); }
static void neg_b(tms34010_state *tms, UINT16 op) { NEG(B); }
-#define NEGB(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 t = *rd + (C_FLAG(tms) ? 1 : 0); \
- INT32 r = 0 - t; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,0,t,r); \
- *rd = r; \
- COUNT_CYCLES(tms,1); \
+#define NEGB(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 t = *rd + (C_FLAG(tms) ? 1 : 0); \
+ INT32 r = 0 - t; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,0,t,r); \
+ *rd = r; \
+ COUNT_CYCLES(tms,1); \
}
static void negb_a(tms34010_state *tms, UINT16 op) { NEGB(A); }
static void negb_b(tms34010_state *tms, UINT16 op) { NEGB(B); }
@@ -791,35 +791,35 @@ static void nop(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,1);
}
-#define NOT(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd = ~(*rd); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,1); \
+#define NOT(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd = ~(*rd); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,1); \
}
static void not_a(tms34010_state *tms, UINT16 op) { NOT(A); }
static void not_b(tms34010_state *tms, UINT16 op) { NOT(B); }
-#define OR(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd |= R##REG(tms,SRCREG(op)); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,1); \
+#define OR(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd |= R##REG(tms,SRCREG(op)); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,1); \
}
static void or_a(tms34010_state *tms, UINT16 op) { OR(A); }
static void or_b(tms34010_state *tms, UINT16 op) { OR(B); }
-#define ORI(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd |= PARAM_LONG(tms); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define ORI(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd |= PARAM_LONG(tms); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void ori_a(tms34010_state *tms, UINT16 op) { ORI(A); }
static void ori_b(tms34010_state *tms, UINT16 op) { ORI(B); }
@@ -830,234 +830,234 @@ static void setc(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,1);
}
-#define SETF(F) \
-{ \
- UINT8 shift = F ? 6 : 0; \
- tms->st &= ~(0x3f << shift); \
- tms->st |= (op & 0x3f) << shift; \
- COUNT_CYCLES(tms,1+F); \
+#define SETF(F) \
+{ \
+ UINT8 shift = F ? 6 : 0; \
+ tms->st &= ~(0x3f << shift); \
+ tms->st |= (op & 0x3f) << shift; \
+ COUNT_CYCLES(tms,1+F); \
}
static void setf0(tms34010_state *tms, UINT16 op) { SETF(0); }
static void setf1(tms34010_state *tms, UINT16 op) { SETF(1); }
-#define SEXT(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZ(tms); \
- SEXTEND(*rd,FW(tms,F)); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define SEXT(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZ(tms); \
+ SEXTEND(*rd,FW(tms,F)); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void sext0_a(tms34010_state *tms, UINT16 op) { SEXT(0,A); }
static void sext0_b(tms34010_state *tms, UINT16 op) { SEXT(0,B); }
static void sext1_a(tms34010_state *tms, UINT16 op) { SEXT(1,A); }
static void sext1_b(tms34010_state *tms, UINT16 op) { SEXT(1,B); }
-#define RL(R,K) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 res = *rd; \
- INT32 k = (K); \
- CLR_CZ(tms); \
- if (k) \
- { \
- res<<=(k-1); \
- SET_C_BIT_HI(tms, res, 31); \
- res<<=1; \
- res |= (((UINT32)*rd)>>((-k)&0x1f)); \
- *rd = res; \
- } \
- SET_Z_VAL(tms, res); \
- COUNT_CYCLES(tms,1); \
+#define RL(R,K) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 res = *rd; \
+ INT32 k = (K); \
+ CLR_CZ(tms); \
+ if (k) \
+ { \
+ res<<=(k-1); \
+ SET_C_BIT_HI(tms, res, 31); \
+ res<<=1; \
+ res |= (((UINT32)*rd)>>((-k)&0x1f)); \
+ *rd = res; \
+ } \
+ SET_Z_VAL(tms, res); \
+ COUNT_CYCLES(tms,1); \
}
static void rl_k_a(tms34010_state *tms, UINT16 op) { RL(A,PARAM_K(op)); }
static void rl_k_b(tms34010_state *tms, UINT16 op) { RL(B,PARAM_K(op)); }
static void rl_r_a(tms34010_state *tms, UINT16 op) { RL(A,AREG(tms,SRCREG(op))&0x1f); }
static void rl_r_b(tms34010_state *tms, UINT16 op) { RL(B,BREG(tms,SRCREG(op))&0x1f); }
-#define SLA(R,K) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- UINT32 res = *rd; \
- INT32 k = K; \
- CLR_NCZV(tms); \
- if (k) \
- { \
- UINT32 mask = (0xffffffff<<(31-k))&0x7fffffff; \
- UINT32 res2 = SIGN(res) ? res^mask : res; \
- SET_V_LOG(tms, (res2 & mask) != 0); \
+#define SLA(R,K) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ UINT32 res = *rd; \
+ INT32 k = K; \
+ CLR_NCZV(tms); \
+ if (k) \
+ { \
+ UINT32 mask = (0xffffffff<<(31-k))&0x7fffffff; \
+ UINT32 res2 = SIGN(res) ? res^mask : res; \
+ SET_V_LOG(tms, (res2 & mask) != 0); \
\
- res<<=(k-1); \
- SET_C_BIT_HI(tms, res, 31); \
- res<<=1; \
- *rd = res; \
- } \
- SET_NZ_VAL(tms, res); \
- COUNT_CYCLES(tms,3); \
+ res<<=(k-1); \
+ SET_C_BIT_HI(tms, res, 31); \
+ res<<=1; \
+ *rd = res; \
+ } \
+ SET_NZ_VAL(tms, res); \
+ COUNT_CYCLES(tms,3); \
}
static void sla_k_a(tms34010_state *tms, UINT16 op) { SLA(A,PARAM_K(op)); }
static void sla_k_b(tms34010_state *tms, UINT16 op) { SLA(B,PARAM_K(op)); }
static void sla_r_a(tms34010_state *tms, UINT16 op) { SLA(A,AREG(tms,SRCREG(op))&0x1f); }
static void sla_r_b(tms34010_state *tms, UINT16 op) { SLA(B,BREG(tms,SRCREG(op))&0x1f); }
-#define SLL(R,K) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- UINT32 res = *rd; \
- INT32 k = K; \
- CLR_CZ(tms); \
- if (k) \
- { \
- res<<=(k-1); \
- SET_C_BIT_HI(tms, res, 31); \
- res<<=1; \
- *rd = res; \
- } \
- SET_Z_VAL(tms, res); \
- COUNT_CYCLES(tms,1); \
+#define SLL(R,K) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ UINT32 res = *rd; \
+ INT32 k = K; \
+ CLR_CZ(tms); \
+ if (k) \
+ { \
+ res<<=(k-1); \
+ SET_C_BIT_HI(tms, res, 31); \
+ res<<=1; \
+ *rd = res; \
+ } \
+ SET_Z_VAL(tms, res); \
+ COUNT_CYCLES(tms,1); \
}
static void sll_k_a(tms34010_state *tms, UINT16 op) { SLL(A,PARAM_K(op)); }
static void sll_k_b(tms34010_state *tms, UINT16 op) { SLL(B,PARAM_K(op)); }
static void sll_r_a(tms34010_state *tms, UINT16 op) { SLL(A,AREG(tms,SRCREG(op))&0x1f); }
static void sll_r_b(tms34010_state *tms, UINT16 op) { SLL(B,BREG(tms,SRCREG(op))&0x1f); }
-#define SRA(R,K) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 res = *rd; \
- INT32 k = (-(K)) & 0x1f; \
- CLR_NCZ(tms); \
- if (k) \
- { \
- res>>=(k-1); \
- SET_C_BIT_LO(tms, res, 0); \
- res>>=1; \
- *rd = res; \
- } \
- SET_NZ_VAL(tms, res); \
- COUNT_CYCLES(tms,1); \
+#define SRA(R,K) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 res = *rd; \
+ INT32 k = (-(K)) & 0x1f; \
+ CLR_NCZ(tms); \
+ if (k) \
+ { \
+ res>>=(k-1); \
+ SET_C_BIT_LO(tms, res, 0); \
+ res>>=1; \
+ *rd = res; \
+ } \
+ SET_NZ_VAL(tms, res); \
+ COUNT_CYCLES(tms,1); \
}
static void sra_k_a(tms34010_state *tms, UINT16 op) { SRA(A,PARAM_K(op)); }
static void sra_k_b(tms34010_state *tms, UINT16 op) { SRA(B,PARAM_K(op)); }
static void sra_r_a(tms34010_state *tms, UINT16 op) { SRA(A,AREG(tms,SRCREG(op))); }
static void sra_r_b(tms34010_state *tms, UINT16 op) { SRA(B,BREG(tms,SRCREG(op))); }
-#define SRL(R,K) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- UINT32 res = *rd; \
- INT32 k = (-(K)) & 0x1f; \
- CLR_CZ(tms); \
- if (k) \
- { \
- res>>=(k-1); \
- SET_C_BIT_LO(tms, res, 0); \
- res>>=1; \
- *rd = res; \
- } \
- SET_Z_VAL(tms, res); \
- COUNT_CYCLES(tms,1); \
+#define SRL(R,K) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ UINT32 res = *rd; \
+ INT32 k = (-(K)) & 0x1f; \
+ CLR_CZ(tms); \
+ if (k) \
+ { \
+ res>>=(k-1); \
+ SET_C_BIT_LO(tms, res, 0); \
+ res>>=1; \
+ *rd = res; \
+ } \
+ SET_Z_VAL(tms, res); \
+ COUNT_CYCLES(tms,1); \
}
static void srl_k_a(tms34010_state *tms, UINT16 op) { SRL(A,PARAM_K(op)); }
static void srl_k_b(tms34010_state *tms, UINT16 op) { SRL(B,PARAM_K(op)); }
static void srl_r_a(tms34010_state *tms, UINT16 op) { SRL(A,AREG(tms,SRCREG(op))); }
static void srl_r_b(tms34010_state *tms, UINT16 op) { SRL(B,BREG(tms,SRCREG(op))); }
-#define SUB(R) \
-{ \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 r = *rd - *rs; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,*rd,*rs,r); \
- *rd = r; \
- COUNT_CYCLES(tms,1); \
+#define SUB(R) \
+{ \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 r = *rd - *rs; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,*rd,*rs,r); \
+ *rd = r; \
+ COUNT_CYCLES(tms,1); \
}
static void sub_a(tms34010_state *tms, UINT16 op) { SUB(A); }
static void sub_b(tms34010_state *tms, UINT16 op) { SUB(B); }
-#define SUBB(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 t = R##REG(tms,SRCREG(op)); \
- INT32 r = *rd - t - (C_FLAG(tms) ? 1 : 0); \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,*rd,t,r); \
- *rd = r; \
- COUNT_CYCLES(tms,1); \
+#define SUBB(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 t = R##REG(tms,SRCREG(op)); \
+ INT32 r = *rd - t - (C_FLAG(tms) ? 1 : 0); \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,*rd,t,r); \
+ *rd = r; \
+ COUNT_CYCLES(tms,1); \
}
static void subb_a(tms34010_state *tms, UINT16 op) { SUBB(A); }
static void subb_b(tms34010_state *tms, UINT16 op) { SUBB(B); }
-#define SUBI_W(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 r; \
- INT32 t = ~PARAM_WORD(tms); \
- CLR_NCZV(tms); \
- r = *rd - t; \
- SET_NZCV_SUB(tms,*rd,t,r); \
- *rd = r; \
- COUNT_CYCLES(tms,2); \
+#define SUBI_W(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 r; \
+ INT32 t = ~PARAM_WORD(tms); \
+ CLR_NCZV(tms); \
+ r = *rd - t; \
+ SET_NZCV_SUB(tms,*rd,t,r); \
+ *rd = r; \
+ COUNT_CYCLES(tms,2); \
}
static void subi_w_a(tms34010_state *tms, UINT16 op) { SUBI_W(A); }
static void subi_w_b(tms34010_state *tms, UINT16 op) { SUBI_W(B); }
-#define SUBI_L(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 t = ~PARAM_LONG(tms); \
- INT32 r = *rd - t; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,*rd,t,r); \
- *rd = r; \
- COUNT_CYCLES(tms,3); \
+#define SUBI_L(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 t = ~PARAM_LONG(tms); \
+ INT32 r = *rd - t; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,*rd,t,r); \
+ *rd = r; \
+ COUNT_CYCLES(tms,3); \
}
static void subi_l_a(tms34010_state *tms, UINT16 op) { SUBI_L(A); }
static void subi_l_b(tms34010_state *tms, UINT16 op) { SUBI_L(B); }
-#define SUBK(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 t = fw_inc[PARAM_K(op)]; \
- INT32 r = *rd - t; \
- CLR_NCZV(tms); \
- SET_NZCV_SUB(tms,*rd,t,r); \
- *rd = r; \
- COUNT_CYCLES(tms,1); \
+#define SUBK(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 t = fw_inc[PARAM_K(op)]; \
+ INT32 r = *rd - t; \
+ CLR_NCZV(tms); \
+ SET_NZCV_SUB(tms,*rd,t,r); \
+ *rd = r; \
+ COUNT_CYCLES(tms,1); \
}
static void subk_a(tms34010_state *tms, UINT16 op) { SUBK(A); }
static void subk_b(tms34010_state *tms, UINT16 op) { SUBK(B); }
-#define XOR(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd ^= R##REG(tms,SRCREG(op)); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,1); \
+#define XOR(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd ^= R##REG(tms,SRCREG(op)); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,1); \
}
static void xor_a(tms34010_state *tms, UINT16 op) { XOR(A); }
static void xor_b(tms34010_state *tms, UINT16 op) { XOR(B); }
-#define XORI(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- *rd ^= PARAM_LONG(tms); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define XORI(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ *rd ^= PARAM_LONG(tms); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void xori_a(tms34010_state *tms, UINT16 op) { XORI(A); }
static void xori_b(tms34010_state *tms, UINT16 op) { XORI(B); }
-#define ZEXT(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- ZEXTEND(*rd,FW(tms,F)); \
- SET_Z_VAL(tms, *rd); \
- COUNT_CYCLES(tms,1); \
+#define ZEXT(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ ZEXTEND(*rd,FW(tms,F)); \
+ SET_Z_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,1); \
}
static void zext0_a(tms34010_state *tms, UINT16 op) { ZEXT(0,A); }
static void zext0_b(tms34010_state *tms, UINT16 op) { ZEXT(0,B); }
@@ -1070,110 +1070,110 @@ static void zext1_b(tms34010_state *tms, UINT16 op) { ZEXT(1,B); }
MOVE INSTRUCTIONS
***************************************************************************/
-#define MOVI_W(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- *rd=PARAM_WORD(tms); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,2); \
+#define MOVI_W(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ *rd=PARAM_WORD(tms); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,2); \
}
static void movi_w_a(tms34010_state *tms, UINT16 op) { MOVI_W(A); }
static void movi_w_b(tms34010_state *tms, UINT16 op) { MOVI_W(B); }
-#define MOVI_L(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- *rd=PARAM_LONG(tms); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define MOVI_L(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ *rd=PARAM_LONG(tms); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void movi_l_a(tms34010_state *tms, UINT16 op) { MOVI_L(A); }
static void movi_l_b(tms34010_state *tms, UINT16 op) { MOVI_L(B); }
-#define MOVK(R) \
-{ \
- INT32 k = PARAM_K(op); if (!k) k = 32; \
- R##REG(tms,DSTREG(op)) = k; \
- COUNT_CYCLES(tms,1); \
+#define MOVK(R) \
+{ \
+ INT32 k = PARAM_K(op); if (!k) k = 32; \
+ R##REG(tms,DSTREG(op)) = k; \
+ COUNT_CYCLES(tms,1); \
}
static void movk_a(tms34010_state *tms, UINT16 op) { MOVK(A); }
static void movk_b(tms34010_state *tms, UINT16 op) { MOVK(B); }
-#define MOVB_RN(R) \
-{ \
- WBYTE(tms, R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \
- COUNT_CYCLES(tms,1); \
+#define MOVB_RN(R) \
+{ \
+ WBYTE(tms, R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \
+ COUNT_CYCLES(tms,1); \
}
static void movb_rn_a(tms34010_state *tms, UINT16 op) { MOVB_RN(A); }
static void movb_rn_b(tms34010_state *tms, UINT16 op) { MOVB_RN(B); }
-#define MOVB_NR(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- *rd = (INT8)RBYTE(tms, R##REG(tms,SRCREG(op))); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define MOVB_NR(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ *rd = (INT8)RBYTE(tms, R##REG(tms,SRCREG(op))); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void movb_nr_a(tms34010_state *tms, UINT16 op) { MOVB_NR(A); }
static void movb_nr_b(tms34010_state *tms, UINT16 op) { MOVB_NR(B); }
-#define MOVB_NN(R) \
-{ \
+#define MOVB_NN(R) \
+{ \
WBYTE(tms, R##REG(tms,DSTREG(op)),(UINT32)(UINT8)RBYTE(tms, R##REG(tms,SRCREG(op))));\
- COUNT_CYCLES(tms,3); \
+ COUNT_CYCLES(tms,3); \
}
static void movb_nn_a(tms34010_state *tms, UINT16 op) { MOVB_NN(A); }
static void movb_nn_b(tms34010_state *tms, UINT16 op) { MOVB_NN(B); }
-#define MOVB_R_NO(R) \
-{ \
- INT32 o = PARAM_WORD(tms); \
- WBYTE(tms, R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \
- COUNT_CYCLES(tms,3); \
+#define MOVB_R_NO(R) \
+{ \
+ INT32 o = PARAM_WORD(tms); \
+ WBYTE(tms, R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \
+ COUNT_CYCLES(tms,3); \
}
static void movb_r_no_a(tms34010_state *tms, UINT16 op) { MOVB_R_NO(A); }
static void movb_r_no_b(tms34010_state *tms, UINT16 op) { MOVB_R_NO(B); }
-#define MOVB_NO_R(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 o = PARAM_WORD(tms); \
- CLR_NZV(tms); \
- *rd = (INT8)RBYTE(tms, R##REG(tms,SRCREG(op))+o); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,5); \
+#define MOVB_NO_R(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 o = PARAM_WORD(tms); \
+ CLR_NZV(tms); \
+ *rd = (INT8)RBYTE(tms, R##REG(tms,SRCREG(op))+o); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,5); \
}
static void movb_no_r_a(tms34010_state *tms, UINT16 op) { MOVB_NO_R(A); }
static void movb_no_r_b(tms34010_state *tms, UINT16 op) { MOVB_NO_R(B); }
-#define MOVB_NO_NO(R) \
-{ \
- INT32 o1 = PARAM_WORD(tms); \
- INT32 o2 = PARAM_WORD(tms); \
+#define MOVB_NO_NO(R) \
+{ \
+ INT32 o1 = PARAM_WORD(tms); \
+ INT32 o2 = PARAM_WORD(tms); \
WBYTE(tms, R##REG(tms,DSTREG(op))+o2,(UINT32)(UINT8)RBYTE(tms, R##REG(tms,SRCREG(op))+o1)); \
- COUNT_CYCLES(tms,5); \
+ COUNT_CYCLES(tms,5); \
}
static void movb_no_no_a(tms34010_state *tms, UINT16 op) { MOVB_NO_NO(A); }
static void movb_no_no_b(tms34010_state *tms, UINT16 op) { MOVB_NO_NO(B); }
-#define MOVB_RA(R) \
-{ \
- WBYTE(tms, PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \
- COUNT_CYCLES(tms,1); \
+#define MOVB_RA(R) \
+{ \
+ WBYTE(tms, PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \
+ COUNT_CYCLES(tms,1); \
}
static void movb_ra_a(tms34010_state *tms, UINT16 op) { MOVB_RA(A); }
static void movb_ra_b(tms34010_state *tms, UINT16 op) { MOVB_RA(B); }
-#define MOVB_AR(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- *rd = (INT8)RBYTE(tms, PARAM_LONG(tms)); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,5); \
+#define MOVB_AR(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ *rd = (INT8)RBYTE(tms, PARAM_LONG(tms)); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,5); \
}
static void movb_ar_a(tms34010_state *tms, UINT16 op) { MOVB_AR(A); }
static void movb_ar_b(tms34010_state *tms, UINT16 op) { MOVB_AR(B); }
@@ -1185,230 +1185,230 @@ static void movb_aa(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,6);
}
-#define MOVE_RR(RS,RD) \
-{ \
- INT32 *rd = &RD##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- *rd = RS##REG(tms,SRCREG(op)); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,1); \
+#define MOVE_RR(RS,RD) \
+{ \
+ INT32 *rd = &RD##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ *rd = RS##REG(tms,SRCREG(op)); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,1); \
}
static void move_rr_a (tms34010_state *tms, UINT16 op) { MOVE_RR(A,A); }
static void move_rr_b (tms34010_state *tms, UINT16 op) { MOVE_RR(B,B); }
static void move_rr_ax(tms34010_state *tms, UINT16 op) { MOVE_RR(A,B); }
static void move_rr_bx(tms34010_state *tms, UINT16 op) { MOVE_RR(B,A); }
-#define MOVE_RN(F,R) \
-{ \
- WFIELD##F(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \
- COUNT_CYCLES(tms,1); \
+#define MOVE_RN(F,R) \
+{ \
+ WFIELD##F(tms,R##REG(tms,DSTREG(op)),R##REG(tms,SRCREG(op))); \
+ COUNT_CYCLES(tms,1); \
}
static void move0_rn_a (tms34010_state *tms, UINT16 op) { MOVE_RN(0,A); }
static void move0_rn_b (tms34010_state *tms, UINT16 op) { MOVE_RN(0,B); }
static void move1_rn_a (tms34010_state *tms, UINT16 op) { MOVE_RN(1,A); }
static void move1_rn_b (tms34010_state *tms, UINT16 op) { MOVE_RN(1,B); }
-#define MOVE_R_DN(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- *rd-=fw_inc[FW(tms,F)]; \
- WFIELD##F(tms,*rd,R##REG(tms,SRCREG(op))); \
- COUNT_CYCLES(tms,2); \
+#define MOVE_R_DN(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ *rd-=fw_inc[FW(tms,F)]; \
+ WFIELD##F(tms,*rd,R##REG(tms,SRCREG(op))); \
+ COUNT_CYCLES(tms,2); \
}
static void move0_r_dn_a (tms34010_state *tms, UINT16 op) { MOVE_R_DN(0,A); }
static void move0_r_dn_b (tms34010_state *tms, UINT16 op) { MOVE_R_DN(0,B); }
static void move1_r_dn_a (tms34010_state *tms, UINT16 op) { MOVE_R_DN(1,A); }
static void move1_r_dn_b (tms34010_state *tms, UINT16 op) { MOVE_R_DN(1,B); }
-#define MOVE_R_NI(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- WFIELD##F(tms,*rd,R##REG(tms,SRCREG(op))); \
- *rd+=fw_inc[FW(tms,F)]; \
- COUNT_CYCLES(tms,1); \
+#define MOVE_R_NI(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ WFIELD##F(tms,*rd,R##REG(tms,SRCREG(op))); \
+ *rd+=fw_inc[FW(tms,F)]; \
+ COUNT_CYCLES(tms,1); \
}
static void move0_r_ni_a (tms34010_state *tms, UINT16 op) { MOVE_R_NI(0,A); }
static void move0_r_ni_b (tms34010_state *tms, UINT16 op) { MOVE_R_NI(0,B); }
static void move1_r_ni_a (tms34010_state *tms, UINT16 op) { MOVE_R_NI(1,A); }
static void move1_r_ni_b (tms34010_state *tms, UINT16 op) { MOVE_R_NI(1,B); }
-#define MOVE_NR(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- *rd = RFIELD##F(tms,R##REG(tms,SRCREG(op))); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define MOVE_NR(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ *rd = RFIELD##F(tms,R##REG(tms,SRCREG(op))); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void move0_nr_a (tms34010_state *tms, UINT16 op) { MOVE_NR(0,A); }
static void move0_nr_b (tms34010_state *tms, UINT16 op) { MOVE_NR(0,B); }
static void move1_nr_a (tms34010_state *tms, UINT16 op) { MOVE_NR(1,A); }
static void move1_nr_b (tms34010_state *tms, UINT16 op) { MOVE_NR(1,B); }
-#define MOVE_DN_R(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- CLR_NZV(tms); \
- *rs-=fw_inc[FW(tms,F)]; \
- *rd = RFIELD##F(tms,*rs); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,4); \
+#define MOVE_DN_R(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ CLR_NZV(tms); \
+ *rs-=fw_inc[FW(tms,F)]; \
+ *rd = RFIELD##F(tms,*rs); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,4); \
}
static void move0_dn_r_a (tms34010_state *tms, UINT16 op) { MOVE_DN_R(0,A); }
static void move0_dn_r_b (tms34010_state *tms, UINT16 op) { MOVE_DN_R(0,B); }
static void move1_dn_r_a (tms34010_state *tms, UINT16 op) { MOVE_DN_R(1,A); }
static void move1_dn_r_b (tms34010_state *tms, UINT16 op) { MOVE_DN_R(1,B); }
-#define MOVE_NI_R(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 data = RFIELD##F(tms,*rs); \
- CLR_NZV(tms); \
- *rs+=fw_inc[FW(tms,F)]; \
- *rd = data; \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,3); \
+#define MOVE_NI_R(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 data = RFIELD##F(tms,*rs); \
+ CLR_NZV(tms); \
+ *rs+=fw_inc[FW(tms,F)]; \
+ *rd = data; \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,3); \
}
static void move0_ni_r_a (tms34010_state *tms, UINT16 op) { MOVE_NI_R(0,A); }
static void move0_ni_r_b (tms34010_state *tms, UINT16 op) { MOVE_NI_R(0,B); }
static void move1_ni_r_a (tms34010_state *tms, UINT16 op) { MOVE_NI_R(1,A); }
static void move1_ni_r_b (tms34010_state *tms, UINT16 op) { MOVE_NI_R(1,B); }
-#define MOVE_NN(F,R) \
-{ \
- WFIELD##F(tms,R##REG(tms,DSTREG(op)),RFIELD##F(tms,R##REG(tms,SRCREG(op)))); \
- COUNT_CYCLES(tms,3); \
+#define MOVE_NN(F,R) \
+{ \
+ WFIELD##F(tms,R##REG(tms,DSTREG(op)),RFIELD##F(tms,R##REG(tms,SRCREG(op)))); \
+ COUNT_CYCLES(tms,3); \
}
static void move0_nn_a (tms34010_state *tms, UINT16 op) { MOVE_NN(0,A); }
static void move0_nn_b (tms34010_state *tms, UINT16 op) { MOVE_NN(0,B); }
static void move1_nn_a (tms34010_state *tms, UINT16 op) { MOVE_NN(1,A); }
static void move1_nn_b (tms34010_state *tms, UINT16 op) { MOVE_NN(1,B); }
-#define MOVE_DN_DN(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 data; \
- *rs-=fw_inc[FW(tms,F)]; \
- data = RFIELD##F(tms,*rs); \
- *rd-=fw_inc[FW(tms,F)]; \
- WFIELD##F(tms,*rd,data); \
- COUNT_CYCLES(tms,4); \
+#define MOVE_DN_DN(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 data; \
+ *rs-=fw_inc[FW(tms,F)]; \
+ data = RFIELD##F(tms,*rs); \
+ *rd-=fw_inc[FW(tms,F)]; \
+ WFIELD##F(tms,*rd,data); \
+ COUNT_CYCLES(tms,4); \
}
static void move0_dn_dn_a (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(0,A); }
static void move0_dn_dn_b (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(0,B); }
static void move1_dn_dn_a (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(1,A); }
static void move1_dn_dn_b (tms34010_state *tms, UINT16 op) { MOVE_DN_DN(1,B); }
-#define MOVE_NI_NI(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 *rs = &R##REG(tms,SRCREG(op)); \
- INT32 data = RFIELD##F(tms,*rs); \
- *rs+=fw_inc[FW(tms,F)]; \
- WFIELD##F(tms,*rd,data); \
- *rd+=fw_inc[FW(tms,F)]; \
- COUNT_CYCLES(tms,4); \
+#define MOVE_NI_NI(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 *rs = &R##REG(tms,SRCREG(op)); \
+ INT32 data = RFIELD##F(tms,*rs); \
+ *rs+=fw_inc[FW(tms,F)]; \
+ WFIELD##F(tms,*rd,data); \
+ *rd+=fw_inc[FW(tms,F)]; \
+ COUNT_CYCLES(tms,4); \
}
static void move0_ni_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(0,A); }
static void move0_ni_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(0,B); }
static void move1_ni_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(1,A); }
static void move1_ni_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NI_NI(1,B); }
-#define MOVE_R_NO(F,R) \
-{ \
- INT32 o = PARAM_WORD(tms); \
- WFIELD##F(tms,R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \
- COUNT_CYCLES(tms,3); \
+#define MOVE_R_NO(F,R) \
+{ \
+ INT32 o = PARAM_WORD(tms); \
+ WFIELD##F(tms,R##REG(tms,DSTREG(op))+o,R##REG(tms,SRCREG(op))); \
+ COUNT_CYCLES(tms,3); \
}
static void move0_r_no_a (tms34010_state *tms, UINT16 op) { MOVE_R_NO(0,A); }
static void move0_r_no_b (tms34010_state *tms, UINT16 op) { MOVE_R_NO(0,B); }
static void move1_r_no_a (tms34010_state *tms, UINT16 op) { MOVE_R_NO(1,A); }
static void move1_r_no_b (tms34010_state *tms, UINT16 op) { MOVE_R_NO(1,B); }
-#define MOVE_NO_R(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 o = PARAM_WORD(tms); \
- CLR_NZV(tms); \
- *rd = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,5); \
+#define MOVE_NO_R(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 o = PARAM_WORD(tms); \
+ CLR_NZV(tms); \
+ *rd = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,5); \
}
static void move0_no_r_a (tms34010_state *tms, UINT16 op) { MOVE_NO_R(0,A); }
static void move0_no_r_b (tms34010_state *tms, UINT16 op) { MOVE_NO_R(0,B); }
static void move1_no_r_a (tms34010_state *tms, UINT16 op) { MOVE_NO_R(1,A); }
static void move1_no_r_b (tms34010_state *tms, UINT16 op) { MOVE_NO_R(1,B); }
-#define MOVE_NO_NI(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 o = PARAM_WORD(tms); \
- INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o); \
- WFIELD##F(tms,*rd,data); \
- *rd+=fw_inc[FW(tms,F)]; \
- COUNT_CYCLES(tms,5); \
+#define MOVE_NO_NI(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 o = PARAM_WORD(tms); \
+ INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o); \
+ WFIELD##F(tms,*rd,data); \
+ *rd+=fw_inc[FW(tms,F)]; \
+ COUNT_CYCLES(tms,5); \
}
static void move0_no_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(0,A); }
static void move0_no_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(0,B); }
static void move1_no_ni_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(1,A); }
static void move1_no_ni_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NI(1,B); }
-#define MOVE_NO_NO(F,R) \
-{ \
- INT32 o1 = PARAM_WORD(tms); \
- INT32 o2 = PARAM_WORD(tms); \
- INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o1); \
- WFIELD##F(tms,R##REG(tms,DSTREG(op))+o2,data); \
- COUNT_CYCLES(tms,5); \
+#define MOVE_NO_NO(F,R) \
+{ \
+ INT32 o1 = PARAM_WORD(tms); \
+ INT32 o2 = PARAM_WORD(tms); \
+ INT32 data = RFIELD##F(tms,R##REG(tms,SRCREG(op))+o1); \
+ WFIELD##F(tms,R##REG(tms,DSTREG(op))+o2,data); \
+ COUNT_CYCLES(tms,5); \
}
static void move0_no_no_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(0,A); }
static void move0_no_no_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(0,B); }
static void move1_no_no_a (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(1,A); }
static void move1_no_no_b (tms34010_state *tms, UINT16 op) { MOVE_NO_NO(1,B); }
-#define MOVE_RA(F,R) \
-{ \
- WFIELD##F(tms,PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \
- COUNT_CYCLES(tms,3); \
+#define MOVE_RA(F,R) \
+{ \
+ WFIELD##F(tms,PARAM_LONG(tms),R##REG(tms,DSTREG(op))); \
+ COUNT_CYCLES(tms,3); \
}
static void move0_ra_a (tms34010_state *tms, UINT16 op) { MOVE_RA(0,A); }
static void move0_ra_b (tms34010_state *tms, UINT16 op) { MOVE_RA(0,B); }
static void move1_ra_a (tms34010_state *tms, UINT16 op) { MOVE_RA(1,A); }
static void move1_ra_b (tms34010_state *tms, UINT16 op) { MOVE_RA(1,B); }
-#define MOVE_AR(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_NZV(tms); \
- *rd = RFIELD##F(tms,PARAM_LONG(tms)); \
- SET_NZ_VAL(tms, *rd); \
- COUNT_CYCLES(tms,5); \
+#define MOVE_AR(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_NZV(tms); \
+ *rd = RFIELD##F(tms,PARAM_LONG(tms)); \
+ SET_NZ_VAL(tms, *rd); \
+ COUNT_CYCLES(tms,5); \
}
static void move0_ar_a (tms34010_state *tms, UINT16 op) { MOVE_AR(0,A); }
static void move0_ar_b (tms34010_state *tms, UINT16 op) { MOVE_AR(0,B); }
static void move1_ar_a (tms34010_state *tms, UINT16 op) { MOVE_AR(1,A); }
static void move1_ar_b (tms34010_state *tms, UINT16 op) { MOVE_AR(1,B); }
-#define MOVE_A_NI(F,R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- WFIELD##F(tms,*rd,RFIELD##F(tms,PARAM_LONG(tms))); \
- *rd+=fw_inc[FW(tms,F)]; \
- COUNT_CYCLES(tms,5); \
+#define MOVE_A_NI(F,R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ WFIELD##F(tms,*rd,RFIELD##F(tms,PARAM_LONG(tms))); \
+ *rd+=fw_inc[FW(tms,F)]; \
+ COUNT_CYCLES(tms,5); \
}
static void move0_a_ni_a (tms34010_state *tms, UINT16 op) { MOVE_A_NI(0,A); }
static void move0_a_ni_b (tms34010_state *tms, UINT16 op) { MOVE_A_NI(0,B); }
static void move1_a_ni_a (tms34010_state *tms, UINT16 op) { MOVE_A_NI(1,A); }
static void move1_a_ni_b (tms34010_state *tms, UINT16 op) { MOVE_A_NI(1,B); }
-#define MOVE_AA(F) \
-{ \
- UINT32 bitaddrs=PARAM_LONG(tms); \
- WFIELD##F(tms,PARAM_LONG(tms),RFIELD##F(tms,bitaddrs)); \
- COUNT_CYCLES(tms,7); \
+#define MOVE_AA(F) \
+{ \
+ UINT32 bitaddrs=PARAM_LONG(tms); \
+ WFIELD##F(tms,PARAM_LONG(tms),RFIELD##F(tms,bitaddrs)); \
+ COUNT_CYCLES(tms,7); \
}
static void move0_aa (tms34010_state *tms, UINT16 op) { MOVE_AA(0); }
static void move1_aa (tms34010_state *tms, UINT16 op) { MOVE_AA(1); }
@@ -1419,12 +1419,12 @@ static void move1_aa (tms34010_state *tms, UINT16 op) { MOVE_AA(1); }
PROGRAM CONTROL INSTRUCTIONS
***************************************************************************/
-#define CALL(R) \
-{ \
- PUSH(tms, tms->pc); \
- tms->pc = R##REG(tms,DSTREG(op)); \
- CORRECT_ODD_PC(tms,"CALL"); \
- COUNT_CYCLES(tms,3); \
+#define CALL(R) \
+{ \
+ PUSH(tms, tms->pc); \
+ tms->pc = R##REG(tms,DSTREG(op)); \
+ CORRECT_ODD_PC(tms,"CALL"); \
+ COUNT_CYCLES(tms,3); \
}
static void call_a (tms34010_state *tms, UINT16 op) { CALL(A); }
static void call_b (tms34010_state *tms, UINT16 op) { CALL(B); }
@@ -1444,92 +1444,92 @@ static void calla(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,4);
}
-#define DSJ(R) \
-{ \
- if (--R##REG(tms,DSTREG(op))) \
- { \
- tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
- COUNT_CYCLES(tms,3); \
- } \
- else \
- { \
- SKIP_WORD(tms); \
- COUNT_CYCLES(tms,2); \
- } \
+#define DSJ(R) \
+{ \
+ if (--R##REG(tms,DSTREG(op))) \
+ { \
+ tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
+ COUNT_CYCLES(tms,3); \
+ } \
+ else \
+ { \
+ SKIP_WORD(tms); \
+ COUNT_CYCLES(tms,2); \
+ } \
}
static void dsj_a (tms34010_state *tms, UINT16 op) { DSJ(A); }
static void dsj_b (tms34010_state *tms, UINT16 op) { DSJ(B); }
-#define DSJEQ(R) \
-{ \
- if (Z_FLAG(tms)) \
- { \
- if (--R##REG(tms,DSTREG(op))) \
- { \
- tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
- COUNT_CYCLES(tms,3); \
- } \
- else \
- { \
- SKIP_WORD(tms); \
- COUNT_CYCLES(tms,2); \
- } \
- } \
- else \
- { \
- SKIP_WORD(tms); \
- COUNT_CYCLES(tms,2); \
- } \
+#define DSJEQ(R) \
+{ \
+ if (Z_FLAG(tms)) \
+ { \
+ if (--R##REG(tms,DSTREG(op))) \
+ { \
+ tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
+ COUNT_CYCLES(tms,3); \
+ } \
+ else \
+ { \
+ SKIP_WORD(tms); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ } \
+ else \
+ { \
+ SKIP_WORD(tms); \
+ COUNT_CYCLES(tms,2); \
+ } \
}
static void dsjeq_a (tms34010_state *tms, UINT16 op) { DSJEQ(A); }
static void dsjeq_b (tms34010_state *tms, UINT16 op) { DSJEQ(B); }
-#define DSJNE(R) \
-{ \
- if (!Z_FLAG(tms)) \
- { \
- if (--R##REG(tms,DSTREG(op))) \
- { \
- tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
- COUNT_CYCLES(tms,3); \
- } \
- else \
- { \
- SKIP_WORD(tms); \
- COUNT_CYCLES(tms,2); \
- } \
- } \
- else \
- { \
- SKIP_WORD(tms); \
- COUNT_CYCLES(tms,2); \
- } \
+#define DSJNE(R) \
+{ \
+ if (!Z_FLAG(tms)) \
+ { \
+ if (--R##REG(tms,DSTREG(op))) \
+ { \
+ tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
+ COUNT_CYCLES(tms,3); \
+ } \
+ else \
+ { \
+ SKIP_WORD(tms); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ } \
+ else \
+ { \
+ SKIP_WORD(tms); \
+ COUNT_CYCLES(tms,2); \
+ } \
}
static void dsjne_a (tms34010_state *tms, UINT16 op) { DSJNE(A); }
static void dsjne_b (tms34010_state *tms, UINT16 op) { DSJNE(B); }
-#define DSJS(R) \
-{ \
- if (op & 0x0400) \
- { \
- if (--R##REG(tms,DSTREG(op))) \
- { \
- tms->pc -= ((PARAM_K(op))<<4); \
- COUNT_CYCLES(tms,2); \
- } \
- else \
- COUNT_CYCLES(tms,3); \
- } \
- else \
- { \
- if (--R##REG(tms,DSTREG(op))) \
- { \
- tms->pc += ((PARAM_K(op))<<4); \
- COUNT_CYCLES(tms,2); \
- } \
- else \
- COUNT_CYCLES(tms,3); \
- } \
+#define DSJS(R) \
+{ \
+ if (op & 0x0400) \
+ { \
+ if (--R##REG(tms,DSTREG(op))) \
+ { \
+ tms->pc -= ((PARAM_K(op))<<4); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ else \
+ COUNT_CYCLES(tms,3); \
+ } \
+ else \
+ { \
+ if (--R##REG(tms,DSTREG(op))) \
+ { \
+ tms->pc += ((PARAM_K(op))<<4); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ else \
+ COUNT_CYCLES(tms,3); \
+ } \
}
static void dsjs_a (tms34010_state *tms, UINT16 op) { DSJS(A); }
static void dsjs_b (tms34010_state *tms, UINT16 op) { DSJS(B); }
@@ -1540,98 +1540,98 @@ static void emu(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,6);
}
-#define EXGPC(R) \
-{ \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 temppc = *rd; \
- *rd = tms->pc; \
- tms->pc = temppc; \
- CORRECT_ODD_PC(tms,"EXGPC"); \
- COUNT_CYCLES(tms,2); \
+#define EXGPC(R) \
+{ \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 temppc = *rd; \
+ *rd = tms->pc; \
+ tms->pc = temppc; \
+ CORRECT_ODD_PC(tms,"EXGPC"); \
+ COUNT_CYCLES(tms,2); \
}
static void exgpc_a (tms34010_state *tms, UINT16 op) { EXGPC(A); }
static void exgpc_b (tms34010_state *tms, UINT16 op) { EXGPC(B); }
-#define GETPC(R) \
-{ \
- R##REG(tms,DSTREG(op)) = tms->pc; \
- COUNT_CYCLES(tms,1); \
+#define GETPC(R) \
+{ \
+ R##REG(tms,DSTREG(op)) = tms->pc; \
+ COUNT_CYCLES(tms,1); \
}
static void getpc_a (tms34010_state *tms, UINT16 op) { GETPC(A); }
static void getpc_b (tms34010_state *tms, UINT16 op) { GETPC(B); }
-#define GETST(R) \
-{ \
- R##REG(tms,DSTREG(op)) = tms->st; \
- COUNT_CYCLES(tms,1); \
+#define GETST(R) \
+{ \
+ R##REG(tms,DSTREG(op)) = tms->st; \
+ COUNT_CYCLES(tms,1); \
}
static void getst_a (tms34010_state *tms, UINT16 op) { GETST(A); }
static void getst_b (tms34010_state *tms, UINT16 op) { GETST(B); }
-#define j_xx_8(TAKE) \
-{ \
- if (DSTREG(op)) \
- { \
- if (TAKE) \
- { \
- tms->pc += (PARAM_REL8(op) << 4); \
- COUNT_CYCLES(tms,2); \
- } \
- else \
- COUNT_CYCLES(tms,1); \
- } \
- else \
- { \
- if (TAKE) \
- { \
- tms->pc = PARAM_LONG_NO_INC(tms); \
- CORRECT_ODD_PC(tms,"J_XX_8"); \
- COUNT_CYCLES(tms,3); \
- } \
- else \
- { \
- SKIP_LONG(tms); \
- COUNT_CYCLES(tms,4); \
- } \
- } \
-}
-
-#define j_xx_0(TAKE) \
-{ \
- if (DSTREG(op)) \
- { \
- if (TAKE) \
- { \
- tms->pc += (PARAM_REL8(op) << 4); \
- COUNT_CYCLES(tms,2); \
- } \
- else \
- COUNT_CYCLES(tms,1); \
- } \
- else \
- { \
- if (TAKE) \
- { \
- tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
- COUNT_CYCLES(tms,3); \
- } \
- else \
- { \
- SKIP_WORD(tms); \
- COUNT_CYCLES(tms,2); \
- } \
- } \
-}
-
-#define j_xx_x(TAKE) \
-{ \
- if (TAKE) \
- { \
- tms->pc += (PARAM_REL8(op) << 4); \
- COUNT_CYCLES(tms,2); \
- } \
- else \
- COUNT_CYCLES(tms,1); \
+#define j_xx_8(TAKE) \
+{ \
+ if (DSTREG(op)) \
+ { \
+ if (TAKE) \
+ { \
+ tms->pc += (PARAM_REL8(op) << 4); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ else \
+ COUNT_CYCLES(tms,1); \
+ } \
+ else \
+ { \
+ if (TAKE) \
+ { \
+ tms->pc = PARAM_LONG_NO_INC(tms); \
+ CORRECT_ODD_PC(tms,"J_XX_8"); \
+ COUNT_CYCLES(tms,3); \
+ } \
+ else \
+ { \
+ SKIP_LONG(tms); \
+ COUNT_CYCLES(tms,4); \
+ } \
+ } \
+}
+
+#define j_xx_0(TAKE) \
+{ \
+ if (DSTREG(op)) \
+ { \
+ if (TAKE) \
+ { \
+ tms->pc += (PARAM_REL8(op) << 4); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ else \
+ COUNT_CYCLES(tms,1); \
+ } \
+ else \
+ { \
+ if (TAKE) \
+ { \
+ tms->pc += (PARAM_WORD_NO_INC(tms)<<4)+0x10; \
+ COUNT_CYCLES(tms,3); \
+ } \
+ else \
+ { \
+ SKIP_WORD(tms); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ } \
+}
+
+#define j_xx_x(TAKE) \
+{ \
+ if (TAKE) \
+ { \
+ tms->pc += (PARAM_REL8(op) << 4); \
+ COUNT_CYCLES(tms,2); \
+ } \
+ else \
+ COUNT_CYCLES(tms,1); \
}
static void j_UC_0(tms34010_state *tms, UINT16 op)
@@ -1827,11 +1827,11 @@ static void j_NN_x(tms34010_state *tms, UINT16 op)
j_xx_x(!N_FLAG(tms));
}
-#define JUMP(R) \
-{ \
- tms->pc = R##REG(tms,DSTREG(op)); \
- CORRECT_ODD_PC(tms,"JUMP"); \
- COUNT_CYCLES(tms,2); \
+#define JUMP(R) \
+{ \
+ tms->pc = R##REG(tms,DSTREG(op)); \
+ CORRECT_ODD_PC(tms,"JUMP"); \
+ COUNT_CYCLES(tms,2); \
}
static void jump_a (tms34010_state *tms, UINT16 op) { JUMP(A); }
static void jump_b (tms34010_state *tms, UINT16 op) { JUMP(B); }
@@ -1848,10 +1848,10 @@ static void pushst(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,2);
}
-#define PUTST(R) \
-{ \
- SET_ST(tms, R##REG(tms,DSTREG(op))); \
- COUNT_CYCLES(tms,3); \
+#define PUTST(R) \
+{ \
+ SET_ST(tms, R##REG(tms,DSTREG(op))); \
+ COUNT_CYCLES(tms,3); \
}
static void putst_a (tms34010_state *tms, UINT16 op) { PUTST(A); }
static void putst_b (tms34010_state *tms, UINT16 op) { PUTST(B); }
@@ -1878,10 +1878,10 @@ static void rets(tms34010_state *tms, UINT16 op)
COUNT_CYCLES(tms,7);
}
-#define REV(R) \
-{ \
- R##REG(tms,DSTREG(op)) = 0x0008; \
- COUNT_CYCLES(tms,1); \
+#define REV(R) \
+{ \
+ R##REG(tms,DSTREG(op)) = 0x0008; \
+ COUNT_CYCLES(tms,1); \
}
static void rev_a (tms34010_state *tms, UINT16 op) { REV(A); }
static void rev_b (tms34010_state *tms, UINT16 op) { REV(B); }
@@ -2016,18 +2016,18 @@ New 34020 ops:
************************************/
-#define ADD_XYI(R) \
-{ \
- UINT32 a = PARAM_LONG(tms); \
- XY *b = &R##REG_XY(tms,DSTREG(op)); \
- CLR_NCZV(tms); \
- b->x += (INT16)(a & 0xffff); \
- b->y += ((INT32)a >> 16); \
- SET_N_LOG(tms, b->x == 0); \
- SET_C_BIT_LO(tms, b->y, 15); \
- SET_Z_LOG(tms, b->y == 0); \
- SET_V_BIT_LO(tms, b->x, 15); \
- COUNT_CYCLES(tms,1); \
+#define ADD_XYI(R) \
+{ \
+ UINT32 a = PARAM_LONG(tms); \
+ XY *b = &R##REG_XY(tms,DSTREG(op)); \
+ CLR_NCZV(tms); \
+ b->x += (INT16)(a & 0xffff); \
+ b->y += ((INT32)a >> 16); \
+ SET_N_LOG(tms, b->x == 0); \
+ SET_C_BIT_LO(tms, b->y, 15); \
+ SET_Z_LOG(tms, b->y == 0); \
+ SET_V_BIT_LO(tms, b->x, 15); \
+ COUNT_CYCLES(tms,1); \
}
static void addxyi_a(tms34010_state *tms, UINT16 op)
{
@@ -2187,15 +2187,15 @@ static void cmovmc_b(tms34010_state *tms, UINT16 op)
logerror("020:cmovmc_b\n");
}
-#define CMPK(R) \
-{ \
- INT32 r; \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- INT32 t = PARAM_K(op); if (!t) t = 32; \
- CLR_NCZV(tms); \
- r = *rd - t; \
- SET_NZCV_SUB(tms,*rd,t,r); \
- COUNT_CYCLES(tms,1); \
+#define CMPK(R) \
+{ \
+ INT32 r; \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ INT32 t = PARAM_K(op); if (!t) t = 32; \
+ CLR_NCZV(tms); \
+ r = *rd - t; \
+ SET_NZCV_SUB(tms,*rd,t,r); \
+ COUNT_CYCLES(tms,1); \
}
static void cmp_k_a(tms34010_state *tms, UINT16 op)
{
@@ -2321,68 +2321,68 @@ static void retm(tms34010_state *tms, UINT16 op)
logerror("020:retm\n");
}
-#define RMO(R) \
-{ \
- UINT32 res = 0; \
- UINT32 rs = R##REG(tms,SRCREG(op)); \
- INT32 *rd = &R##REG(tms,DSTREG(op)); \
- CLR_Z(tms); \
- SET_Z_VAL(tms, rs); \
- if (rs) \
- { \
- while (!(rs & 0x00000001)) \
- { \
- res++; \
- rs >>= 1; \
- } \
- } \
- *rd = res; \
- COUNT_CYCLES(tms,1); \
+#define RMO(R) \
+{ \
+ UINT32 res = 0; \
+ UINT32 rs = R##REG(tms,SRCREG(op)); \
+ INT32 *rd = &R##REG(tms,DSTREG(op)); \
+ CLR_Z(tms); \
+ SET_Z_VAL(tms, rs); \
+ if (rs) \
+ { \
+ while (!(rs & 0x00000001)) \
+ { \
+ res++; \
+ rs >>= 1; \
+ } \
+ } \
+ *rd = res; \
+ COUNT_CYCLES(tms,1); \
}
static void rmo_a(tms34010_state *tms, UINT16 op) { RMO(A); }
static void rmo_b(tms34010_state *tms, UINT16 op) { RMO(B); }
-#define RPIX(R) \
-{ \
- UINT32 v = R##REG(tms,DSTREG(op)); \
- switch (tms->pixelshift) \
- { \
- case 0: \
+#define RPIX(R) \
+{ \
+ UINT32 v = R##REG(tms,DSTREG(op)); \
+ switch (tms->pixelshift) \
+ { \
+ case 0: \
v = (v & 1) ? 0xffffffff : 0x00000000;\
- COUNT_CYCLES(tms,8); \
- break; \
- case 1: \
- v &= 3; \
- v |= v << 2; \
- v |= v << 4; \
- v |= v << 8; \
- v |= v << 16; \
- COUNT_CYCLES(tms,7); \
- break; \
- case 2: \
- v &= 0x0f; \
- v |= v << 4; \
- v |= v << 8; \
- v |= v << 16; \
- COUNT_CYCLES(tms,6); \
- break; \
- case 3: \
- v &= 0xff; \
- v |= v << 8; \
- v |= v << 16; \
- COUNT_CYCLES(tms,5); \
- break; \
- case 4: \
- v &= 0xffff; \
- v |= v << 16; \
- COUNT_CYCLES(tms,4); \
- break; \
- case 5: \
- COUNT_CYCLES(tms,2); \
- break; \
- } \
- R##REG(tms,DSTREG(op)) = v; \
+ COUNT_CYCLES(tms,8); \
+ break; \
+ case 1: \
+ v &= 3; \
+ v |= v << 2; \
+ v |= v << 4; \
+ v |= v << 8; \
+ v |= v << 16; \
+ COUNT_CYCLES(tms,7); \
+ break; \
+ case 2: \
+ v &= 0x0f; \
+ v |= v << 4; \
+ v |= v << 8; \
+ v |= v << 16; \
+ COUNT_CYCLES(tms,6); \
+ break; \
+ case 3: \
+ v &= 0xff; \
+ v |= v << 8; \
+ v |= v << 16; \
+ COUNT_CYCLES(tms,5); \
+ break; \
+ case 4: \
+ v &= 0xffff; \
+ v |= v << 16; \
+ COUNT_CYCLES(tms,4); \
+ break; \
+ case 5: \
+ COUNT_CYCLES(tms,2); \
+ break; \
+ } \
+ R##REG(tms,DSTREG(op)) = v; \
}
static void rpix_a(tms34010_state *tms, UINT16 op)
diff --git a/src/emu/cpu/tms34010/34010ops.h b/src/emu/cpu/tms34010/34010ops.h
index 14a81bf22e3..484d601444e 100644
--- a/src/emu/cpu/tms34010/34010ops.h
+++ b/src/emu/cpu/tms34010/34010ops.h
@@ -14,7 +14,7 @@
/* Size of the memory buffer allocated for the shiftr register */
-#define SHIFTREG_SIZE (8 * 512 * sizeof(UINT16))
+#define SHIFTREG_SIZE (8 * 512 * sizeof(UINT16))
@@ -22,16 +22,16 @@
MEMORY I/O MACROS
***************************************************************************/
-#define TMS34010_RDMEM(T,A) ((unsigned)(T)->program->read_byte (A))
-#define TMS34010_RDMEM_WORD(T,A) ((unsigned)(T)->program->read_word (A))
+#define TMS34010_RDMEM(T,A) ((unsigned)(T)->program->read_byte (A))
+#define TMS34010_RDMEM_WORD(T,A) ((unsigned)(T)->program->read_word (A))
INLINE UINT32 TMS34010_RDMEM_DWORD(tms34010_state *tms, offs_t A)
{
UINT32 result = tms->program->read_word(A);
return result | (tms->program->read_word(A+2)<<16);
}
-#define TMS34010_WRMEM(T,A,V) ((T)->program->write_byte(A,V))
-#define TMS34010_WRMEM_WORD(T,A,V) ((T)->program->write_word(A,V))
+#define TMS34010_WRMEM(T,A,V) ((T)->program->write_byte(A,V))
+#define TMS34010_WRMEM_WORD(T,A,V) ((T)->program->write_word(A,V))
INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V)
{
tms->program->write_word(A,V);
@@ -41,10 +41,10 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V)
/* IO registers accessor */
-#define IOREG(T,reg) ((T)->IOregs[reg])
-#define SMART_IOREG(T,reg) ((T)->IOregs[(T)->is_34020 ? (int)REG020_##reg : (int)REG_##reg])
-#define PBH(T) (IOREG(T, REG_CONTROL) & 0x0100)
-#define PBV(T) (IOREG(T, REG_CONTROL) & 0x0200)
+#define IOREG(T,reg) ((T)->IOregs[reg])
+#define SMART_IOREG(T,reg) ((T)->IOregs[(T)->is_34020 ? (int)REG020_##reg : (int)REG_##reg])
+#define PBH(T) (IOREG(T, REG_CONTROL) & 0x0100)
+#define PBV(T) (IOREG(T, REG_CONTROL) & 0x0200)
@@ -52,70 +52,70 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V)
FIELD WRITE MACROS
***************************************************************************/
-#define WFIELDMAC(T,MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
- UINT32 masked_data = data & (MASK); \
- UINT32 old; \
+#define WFIELDMAC(T,MASK,MAX) \
+ UINT32 shift = offset & 0x0f; \
+ UINT32 masked_data = data & (MASK); \
+ UINT32 old; \
\
- offset = TOBYTE(offset & 0xfffffff0); \
+ offset = TOBYTE(offset & 0xfffffff0); \
\
- if (shift >= MAX) \
- { \
- old = (UINT32)TMS34010_RDMEM_DWORD(T, offset) & ~((MASK) << shift); \
- TMS34010_WRMEM_DWORD(T, offset, (masked_data << shift) | old); \
- } \
- else \
- { \
- old = (UINT32)TMS34010_RDMEM_WORD(T, offset) & ~((MASK) << shift); \
- TMS34010_WRMEM_WORD(T, offset, ((masked_data & (MASK)) << shift) | old); \
- } \
-
-#define WFIELDMAC_BIG(T,MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
- UINT32 masked_data = data & (MASK); \
- UINT32 old; \
+ if (shift >= MAX) \
+ { \
+ old = (UINT32)TMS34010_RDMEM_DWORD(T, offset) & ~((MASK) << shift); \
+ TMS34010_WRMEM_DWORD(T, offset, (masked_data << shift) | old); \
+ } \
+ else \
+ { \
+ old = (UINT32)TMS34010_RDMEM_WORD(T, offset) & ~((MASK) << shift); \
+ TMS34010_WRMEM_WORD(T, offset, ((masked_data & (MASK)) << shift) | old); \
+ } \
+
+#define WFIELDMAC_BIG(T,MASK,MAX) \
+ UINT32 shift = offset & 0x0f; \
+ UINT32 masked_data = data & (MASK); \
+ UINT32 old; \
\
- offset = TOBYTE(offset & 0xfffffff0); \
+ offset = TOBYTE(offset & 0xfffffff0); \
\
- old = (UINT32)TMS34010_RDMEM_DWORD(T, offset) & ~(UINT32)((MASK) << shift); \
- TMS34010_WRMEM_DWORD(T, offset, (UINT32)(masked_data << shift) | old); \
- if (shift >= MAX) \
- { \
- shift = 32 - shift; \
- old = (UINT32)TMS34010_RDMEM_WORD(T, offset + 4) & ~((MASK) >> shift); \
- TMS34010_WRMEM_WORD(T, offset, (masked_data >> shift) | old); \
- } \
-
-#define WFIELDMAC_8(T) \
- if (offset & 0x07) \
- { \
- WFIELDMAC(T,0xff,9); \
- } \
- else \
- TMS34010_WRMEM(T, TOBYTE(offset), data); \
-
-#define RFIELDMAC_8(T) \
- if (offset & 0x07) \
- { \
- RFIELDMAC(T,0xff,9); \
- } \
- else \
- return TMS34010_RDMEM(T, TOBYTE(offset)); \
-
-#define WFIELDMAC_32(T) \
- if (offset & 0x0f) \
- { \
- UINT32 shift = offset&0x0f; \
- UINT32 old; \
- UINT32 hiword; \
- offset &= 0xfffffff0; \
- old = ((UINT32) TMS34010_RDMEM_DWORD (T, TOBYTE(offset ))&(0xffffffff>>(0x20-shift))); \
- hiword = ((UINT32) TMS34010_RDMEM_DWORD (T, TOBYTE(offset+0x20))&(0xffffffff<<shift)); \
- TMS34010_WRMEM_DWORD(T, TOBYTE(offset ),(data<< shift) |old); \
- TMS34010_WRMEM_DWORD(T, TOBYTE(offset+0x20),(data>>(0x20-shift))|hiword); \
- } \
- else \
- TMS34010_WRMEM_DWORD(T, TOBYTE(offset),data); \
+ old = (UINT32)TMS34010_RDMEM_DWORD(T, offset) & ~(UINT32)((MASK) << shift); \
+ TMS34010_WRMEM_DWORD(T, offset, (UINT32)(masked_data << shift) | old); \
+ if (shift >= MAX) \
+ { \
+ shift = 32 - shift; \
+ old = (UINT32)TMS34010_RDMEM_WORD(T, offset + 4) & ~((MASK) >> shift); \
+ TMS34010_WRMEM_WORD(T, offset, (masked_data >> shift) | old); \
+ } \
+
+#define WFIELDMAC_8(T) \
+ if (offset & 0x07) \
+ { \
+ WFIELDMAC(T,0xff,9); \
+ } \
+ else \
+ TMS34010_WRMEM(T, TOBYTE(offset), data); \
+
+#define RFIELDMAC_8(T) \
+ if (offset & 0x07) \
+ { \
+ RFIELDMAC(T,0xff,9); \
+ } \
+ else \
+ return TMS34010_RDMEM(T, TOBYTE(offset)); \
+
+#define WFIELDMAC_32(T) \
+ if (offset & 0x0f) \
+ { \
+ UINT32 shift = offset&0x0f; \
+ UINT32 old; \
+ UINT32 hiword; \
+ offset &= 0xfffffff0; \
+ old = ((UINT32) TMS34010_RDMEM_DWORD (T, TOBYTE(offset ))&(0xffffffff>>(0x20-shift))); \
+ hiword = ((UINT32) TMS34010_RDMEM_DWORD (T, TOBYTE(offset+0x20))&(0xffffffff<<shift)); \
+ TMS34010_WRMEM_DWORD(T, TOBYTE(offset ),(data<< shift) |old); \
+ TMS34010_WRMEM_DWORD(T, TOBYTE(offset+0x20),(data>>(0x20-shift))|hiword); \
+ } \
+ else \
+ TMS34010_WRMEM_DWORD(T, TOBYTE(offset),data); \
@@ -123,34 +123,34 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V)
FIELD READ MACROS
***************************************************************************/
-#define RFIELDMAC(T,MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
- offset = TOBYTE(offset & 0xfffffff0); \
+#define RFIELDMAC(T,MASK,MAX) \
+ UINT32 shift = offset & 0x0f; \
+ offset = TOBYTE(offset & 0xfffffff0); \
\
- if (shift >= MAX) \
- ret = (TMS34010_RDMEM_DWORD(T, offset) >> shift) & (MASK); \
- else \
- ret = (TMS34010_RDMEM_WORD(T, offset) >> shift) & (MASK); \
-
-#define RFIELDMAC_BIG(T,MASK,MAX) \
- UINT32 shift = offset & 0x0f; \
- offset = TOBYTE(offset & 0xfffffff0); \
+ if (shift >= MAX) \
+ ret = (TMS34010_RDMEM_DWORD(T, offset) >> shift) & (MASK); \
+ else \
+ ret = (TMS34010_RDMEM_WORD(T, offset) >> shift) & (MASK); \
+
+#define RFIELDMAC_BIG(T,MASK,MAX) \
+ UINT32 shift = offset & 0x0f; \
+ offset = TOBYTE(offset & 0xfffffff0); \
\
- ret = (UINT32)TMS34010_RDMEM_DWORD(T, offset) >> shift; \
- if (shift >= MAX) \
- ret |= (TMS34010_RDMEM_WORD(T, offset + 4) << (32 - shift)); \
- ret &= MASK; \
-
-#define RFIELDMAC_32(T) \
- if (offset&0x0f) \
- { \
- UINT32 shift = offset&0x0f; \
- offset &= 0xfffffff0; \
- return (((UINT32)TMS34010_RDMEM_DWORD (T, TOBYTE(offset ))>> shift) | \
- (TMS34010_RDMEM_DWORD (T, TOBYTE(offset+0x20))<<(0x20-shift)));\
- } \
- else \
- return TMS34010_RDMEM_DWORD(T, TOBYTE(offset)); \
+ ret = (UINT32)TMS34010_RDMEM_DWORD(T, offset) >> shift; \
+ if (shift >= MAX) \
+ ret |= (TMS34010_RDMEM_WORD(T, offset + 4) << (32 - shift)); \
+ ret &= MASK; \
+
+#define RFIELDMAC_32(T) \
+ if (offset&0x0f) \
+ { \
+ UINT32 shift = offset&0x0f; \
+ offset &= 0xfffffff0; \
+ return (((UINT32)TMS34010_RDMEM_DWORD (T, TOBYTE(offset ))>> shift) | \
+ (TMS34010_RDMEM_DWORD (T, TOBYTE(offset+0x20))<<(0x20-shift)));\
+ } \
+ else \
+ return TMS34010_RDMEM_DWORD(T, TOBYTE(offset)); \
diff --git a/src/emu/cpu/tms34010/34010tbl.c b/src/emu/cpu/tms34010/34010tbl.c
index 05b7369d94f..889c692fd8d 100644
--- a/src/emu/cpu/tms34010/34010tbl.c
+++ b/src/emu/cpu/tms34010/34010tbl.c
@@ -79,17 +79,17 @@ static void cmpi_w_b(tms34010_state *tms, UINT16 op); /* 0b50 */
static void cmpi_l_a(tms34010_state *tms, UINT16 op); /* 0b60 */
static void cmpi_l_b(tms34010_state *tms, UINT16 op); /* 0b70 */
static void dint(tms34010_state *tms, UINT16 op);
-static void divs_a(tms34010_state *tms, UINT16 op); /* 5800/5900 */
-static void divs_b(tms34010_state *tms, UINT16 op); /* 5800/5900 */
-static void divu_a(tms34010_state *tms, UINT16 op); /* 5a00/5b00 */
-static void divu_b(tms34010_state *tms, UINT16 op); /* 5a00/5b00 */
+static void divs_a(tms34010_state *tms, UINT16 op); /* 5800/5900 */
+static void divs_b(tms34010_state *tms, UINT16 op); /* 5800/5900 */
+static void divu_a(tms34010_state *tms, UINT16 op); /* 5a00/5b00 */
+static void divu_b(tms34010_state *tms, UINT16 op); /* 5a00/5b00 */
static void eint(tms34010_state *tms, UINT16 op);
static void exgf0_a(tms34010_state *tms, UINT16 op); /* d500 */
-static void exgf0_b(tms34010_state *tms, UINT16 op); /* d510 */
-static void exgf1_a(tms34010_state *tms, UINT16 op); /* d700 */
-static void exgf1_b(tms34010_state *tms, UINT16 op); /* d710 */
-static void lmo_a(tms34010_state *tms, UINT16 op); /* 6a00/6b00 */
-static void lmo_b(tms34010_state *tms, UINT16 op); /* 6a00/6b00 */
+static void exgf0_b(tms34010_state *tms, UINT16 op); /* d510 */
+static void exgf1_a(tms34010_state *tms, UINT16 op); /* d700 */
+static void exgf1_b(tms34010_state *tms, UINT16 op); /* d710 */
+static void lmo_a(tms34010_state *tms, UINT16 op); /* 6a00/6b00 */
+static void lmo_b(tms34010_state *tms, UINT16 op); /* 6a00/6b00 */
static void mmfm_a(tms34010_state *tms, UINT16 op); /* 09a0 */
static void mmfm_b(tms34010_state *tms, UINT16 op); /* 09b0 */
static void mmtm_a(tms34010_state *tms, UINT16 op); /* 0980 */
@@ -397,771 +397,771 @@ static void vlcol(tms34010_state *tms, UINT16 op);
static void (*const opcode_table[65536 >> 4])(tms34010_state *tms, UINT16 op) =
{
/* 0x0000 0x0010 0x0020 0x0030 ... 0x00f0 */
- unimpl, unimpl, rev_a, rev_b, idle, unimpl, unimpl, unimpl,
- mwait, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, blmove,
+ unimpl, unimpl, rev_a, rev_b, idle, unimpl, unimpl, unimpl,
+ mwait, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, blmove,
/* 0x0100 */
- emu, unimpl, exgpc_a, exgpc_b, getpc_a, getpc_b, jump_a, jump_b,
- getst_a, getst_b, putst_a, putst_b, popst, unimpl, pushst, unimpl,
+ emu, unimpl, exgpc_a, exgpc_b, getpc_a, getpc_b, jump_a, jump_b,
+ getst_a, getst_b, putst_a, putst_b, popst, unimpl, pushst, unimpl,
/* 0x0200 */
- unimpl, unimpl, unimpl, unimpl, unimpl, setcsp, unimpl, setcdp,
- rpix_a, rpix_b, exgps_a, exgps_b, getps_a, getps_b, unimpl, setcmp,
+ unimpl, unimpl, unimpl, unimpl, unimpl, setcsp, unimpl, setcdp,
+ rpix_a, rpix_b, exgps_a, exgps_b, getps_a, getps_b, unimpl, setcmp,
/* 0x0300 */
- nop, unimpl, clrc, unimpl, movb_aa, unimpl, dint, unimpl,
- abs_a, abs_b, neg_a, neg_b, negb_a, negb_b, not_a, not_b,
+ nop, unimpl, clrc, unimpl, movb_aa, unimpl, dint, unimpl,
+ abs_a, abs_b, neg_a, neg_b, negb_a, negb_b, not_a, not_b,
/* 0x0400 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x0500 */
- sext0_a, sext0_b, zext0_a, zext0_b, setf0, setf0, setf0, setf0,
- move0_ra_a, move0_ra_b, move0_ar_a, move0_ar_b, move0_aa, unimpl, movb_ra_a, movb_ra_b,
+ sext0_a, sext0_b, zext0_a, zext0_b, setf0, setf0, setf0, setf0,
+ move0_ra_a, move0_ra_b, move0_ar_a, move0_ar_b, move0_aa, unimpl, movb_ra_a, movb_ra_b,
/* 0x0600 */
- cexec_l, unimpl, cmovgc_a, cmovgc_b, cmovgc_a_s, cmovgc_b_s, cmovcg_a, cmovcg_b,
- cmovmc_f, cmovmc_f, cmovcm_f, cmovcm_f, cmovcm_b, cmovcm_b, cmovmc_f_va,cmovmc_f_vb,
+ cexec_l, unimpl, cmovgc_a, cmovgc_b, cmovgc_a_s, cmovgc_b_s, cmovcg_a, cmovcg_b,
+ cmovmc_f, cmovmc_f, cmovcm_f, cmovcm_f, cmovcm_b, cmovcm_b, cmovmc_f_va,cmovmc_f_vb,
/* 0x0700 */
- sext1_a, sext1_b, zext1_a, zext1_b, setf1, setf1, setf1, setf1,
- move1_ra_a, move1_ra_b, move1_ar_a, move1_ar_b, move1_aa, unimpl, movb_ar_a, movb_ar_b,
+ sext1_a, sext1_b, zext1_a, zext1_b, setf1, setf1, setf1, setf1,
+ move1_ra_a, move1_ra_b, move1_ar_a, move1_ar_b, move1_aa, unimpl, movb_ar_a, movb_ar_b,
/* 0x0800 */
- trapl, unimpl, cmovmc_b, cmovmc_b, unimpl, vblt_b_l, retm, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, clip,
+ trapl, unimpl, cmovmc_b, cmovmc_b, unimpl, vblt_b_l, retm, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, clip,
/* 0x0900 */
- trap, trap, call_a, call_b, reti, unimpl, rets, rets,
- mmtm_a, mmtm_b, mmfm_a, mmfm_b, movi_w_a, movi_w_b, movi_l_a, movi_l_b,
+ trap, trap, call_a, call_b, reti, unimpl, rets, rets,
+ mmtm_a, mmtm_b, mmfm_a, mmfm_b, movi_w_a, movi_w_b, movi_l_a, movi_l_b,
/* 0x0a00 */
- vlcol, unimpl, unimpl, pfill_xy, unimpl, vfill_l, cvmxyl_a, cvmxyl_b,
- cvdxyl_a, cvdxyl_b, unimpl, fpixeq, unimpl, fpixne, unimpl, unimpl,
+ vlcol, unimpl, unimpl, pfill_xy, unimpl, vfill_l, cvmxyl_a, cvmxyl_b,
+ cvdxyl_a, cvdxyl_b, unimpl, fpixeq, unimpl, fpixne, unimpl, unimpl,
/* 0x0b00 */
- addi_w_a, addi_w_b, addi_l_a, addi_l_b, cmpi_w_a, cmpi_w_b, cmpi_l_a, cmpi_l_b,
- andi_a, andi_b, ori_a, ori_b, xori_a, xori_b, subi_w_a, subi_w_b,
+ addi_w_a, addi_w_b, addi_l_a, addi_l_b, cmpi_w_a, cmpi_w_b, cmpi_l_a, cmpi_l_b,
+ andi_a, andi_b, ori_a, ori_b, xori_a, xori_b, subi_w_a, subi_w_b,
/* 0x0c00 */
- addxyi_a, addxyi_b, unimpl, unimpl, unimpl, linit, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ addxyi_a, addxyi_b, unimpl, unimpl, unimpl, linit, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x0d00 */
- subi_l_a, subi_l_b, unimpl, callr, unimpl, calla, eint, unimpl,
- dsj_a, dsj_b, dsjeq_a, dsjeq_b, dsjne_a, dsjne_b, setc, unimpl,
+ subi_l_a, subi_l_b, unimpl, callr, unimpl, calla, eint, unimpl,
+ dsj_a, dsj_b, dsjeq_a, dsjeq_b, dsjne_a, dsjne_b, setc, unimpl,
/* 0x0e00 */
- unimpl, pixblt_l_m_l,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, tfill_xy,
+ unimpl, pixblt_l_m_l,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, tfill_xy,
/* 0x0f00 */
- pixblt_l_l, unimpl, pixblt_l_xy,unimpl, pixblt_xy_l,unimpl, pixblt_xy_xy,unimpl,
- pixblt_b_l, unimpl, pixblt_b_xy,unimpl, fill_l, unimpl, fill_xy, unimpl,
+ pixblt_l_l, unimpl, pixblt_l_xy,unimpl, pixblt_xy_l,unimpl, pixblt_xy_xy,unimpl,
+ pixblt_b_l, unimpl, pixblt_b_xy,unimpl, fill_l, unimpl, fill_xy, unimpl,
/* 0x1000 */
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
/* 0x1100 */
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
/* 0x1200 */
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
/* 0x1300 */
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
- addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
+ addk_a, addk_b, addk_a, addk_b, addk_a, addk_b, addk_a, addk_b,
/* 0x1400 */
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
/* 0x1500 */
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
/* 0x1600 */
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
/* 0x1700 */
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
- subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
+ subk_a, subk_b, subk_a, subk_b, subk_a, subk_b, subk_a, subk_b,
/* 0x1800 */
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
/* 0x1900 */
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
/* 0x1a00 */
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
/* 0x1b00 */
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
- movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
+ movk_a, movk_b, movk_a, movk_b, movk_a, movk_b, movk_a, movk_b,
/* 0x1c00 */
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
/* 0x1d00 */
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
/* 0x1e00 */
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
/* 0x1f00 */
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
- btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
+ btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b, btst_k_a, btst_k_b,
/* 0x2000 */
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
/* 0x2100 */
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
/* 0x2200 */
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
/* 0x2300 */
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
- sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
+ sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b, sla_k_a, sla_k_b,
/* 0x2400 */
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
/* 0x2500 */
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
/* 0x2600 */
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
/* 0x2700 */
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
- sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
+ sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b, sll_k_a, sll_k_b,
/* 0x2800 */
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
/* 0x2900 */
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
/* 0x2a00 */
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
/* 0x2b00 */
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
- sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
+ sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b, sra_k_a, sra_k_b,
/* 0x2c00 */
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
/* 0x2d00 */
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
/* 0x2e00 */
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
/* 0x2f00 */
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
- srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
+ srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b, srl_k_a, srl_k_b,
/* 0x3000 */
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
/* 0x3100 */
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
/* 0x3200 */
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
/* 0x3300 */
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
- rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
+ rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b, rl_k_a, rl_k_b,
/* 0x3400 */
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
/* 0x3500 */
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
/* 0x3600 */
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
/* 0x3700 */
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
- cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
+ cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b, cmp_k_a, cmp_k_b,
/* 0x3800 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x3900 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x3a00 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x3b00 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x3c00 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x3d00 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x3e00 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x3f00 */
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
- dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
+ dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b, dsjs_a, dsjs_b,
/* 0x4000 */
- add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
- add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
+ add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
+ add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
/* 0x4100 */
- add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
- add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
+ add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
+ add_a, add_b, add_a, add_b, add_a, add_b, add_a, add_b,
/* 0x4200 */
- addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
- addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
+ addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
+ addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
/* 0x4300 */
- addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
- addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
+ addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
+ addc_a, addc_b, addc_a, addc_b, addc_a, addc_b, addc_a, addc_b,
/* 0x4400 */
- sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
- sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
+ sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
+ sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
/* 0x4500 */
- sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
- sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
+ sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
+ sub_a, sub_b, sub_a, sub_b, sub_a, sub_b, sub_a, sub_b,
/* 0x4600 */
- subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
- subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
+ subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
+ subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
/* 0x4700 */
- subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
- subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
+ subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
+ subb_a, subb_b, subb_a, subb_b, subb_a, subb_b, subb_a, subb_b,
/* 0x4800 */
- cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
- cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
+ cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
+ cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
/* 0x4900 */
- cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
- cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
+ cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
+ cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b, cmp_a, cmp_b,
/* 0x4a00 */
- btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
- btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
+ btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
+ btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
/* 0x4b00 */
- btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
- btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
+ btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
+ btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b, btst_r_a, btst_r_b,
/* 0x4c00 */
- move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
- move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
+ move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
+ move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
/* 0x4d00 */
- move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
- move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
+ move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
+ move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b, move_rr_a, move_rr_b,
/* 0x4e00 */
- move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
- move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
+ move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
+ move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
/* 0x4f00 */
- move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
- move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
+ move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
+ move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx, move_rr_ax, move_rr_bx,
/* 0x5000 */
- and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
- and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
+ and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
+ and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
/* 0x5100 */
- and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
- and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
+ and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
+ and_a, and_b, and_a, and_b, and_a, and_b, and_a, and_b,
/* 0x5200 */
- andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
- andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
+ andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
+ andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
/* 0x5300 */
- andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
- andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
+ andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
+ andn_a, andn_b, andn_a, andn_b, andn_a, andn_b, andn_a, andn_b,
/* 0x5400 */
- or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
- or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
+ or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
+ or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
/* 0x5500 */
- or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
- or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
+ or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
+ or_a, or_b, or_a, or_b, or_a, or_b, or_a, or_b,
/* 0x5600 */
- xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
- xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
+ xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
+ xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
/* 0x5700 */
- xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
- xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
+ xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
+ xor_a, xor_b, xor_a, xor_b, xor_a, xor_b, xor_a, xor_b,
/* 0x5800 */
- divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
- divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
+ divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
+ divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
/* 0x5900 */
- divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
- divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
+ divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
+ divs_a, divs_b, divs_a, divs_b, divs_a, divs_b, divs_a, divs_b,
/* 0x5a00 */
- divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
- divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
+ divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
+ divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
/* 0x5b00 */
- divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
- divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
+ divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
+ divu_a, divu_b, divu_a, divu_b, divu_a, divu_b, divu_a, divu_b,
/* 0x5c00 */
- mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
- mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
+ mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
+ mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
/* 0x5d00 */
- mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
- mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
+ mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
+ mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b, mpys_a, mpys_b,
/* 0x5e00 */
- mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
- mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
+ mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
+ mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
/* 0x5f00 */
- mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
- mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
+ mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
+ mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b, mpyu_a, mpyu_b,
/* 0x6000 */
- sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
- sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
+ sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
+ sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
/* 0x6100 */
- sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
- sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
+ sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
+ sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b, sla_r_a, sla_r_b,
/* 0x6200 */
- sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
- sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
+ sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
+ sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
/* 0x6300 */
- sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
- sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
+ sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
+ sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b, sll_r_a, sll_r_b,
/* 0x6400 */
- sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
- sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
+ sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
+ sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
/* 0x6500 */
- sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
- sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
+ sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
+ sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b, sra_r_a, sra_r_b,
/* 0x6600 */
- srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
- srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
+ srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
+ srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
/* 0x6700 */
- srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
- srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
+ srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
+ srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b, srl_r_a, srl_r_b,
/* 0x6800 */
- rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
- rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
+ rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
+ rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
/* 0x6900 */
- rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
- rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
+ rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
+ rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b, rl_r_a, rl_r_b,
/* 0x6a00 */
- lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
- lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
+ lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
+ lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
/* 0x6b00 */
- lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
- lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
+ lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
+ lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b, lmo_a, lmo_b,
/* 0x6c00 */
- mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
- mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
+ mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
+ mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
/* 0x6d00 */
- mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
- mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
+ mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
+ mods_a, mods_b, mods_a, mods_b, mods_a, mods_b, mods_a, mods_b,
/* 0x6e00 */
- modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
- modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
+ modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
+ modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
/* 0x6f00 */
- modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
- modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
+ modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
+ modu_a, modu_b, modu_a, modu_b, modu_a, modu_b, modu_a, modu_b,
/* 0x7000 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7100 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7200 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7300 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7400 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7500 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7600 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7700 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7800 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7900 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7a00 */
- rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
- rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
+ rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
+ rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
/* 0x7b00 */
- rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
- rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
+ rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
+ rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b, rmo_a, rmo_b,
/* 0x7c00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7d00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x7e00 */
- swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
- swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
+ swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
+ swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
/* 0x7f00 */
- swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
- swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
+ swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
+ swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b, swapf_a, swapf_b,
/* 0x8000 */
- move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
- move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
+ move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
+ move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
/* 0x8100 */
- move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
- move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
+ move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
+ move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b, move0_rn_a, move0_rn_b,
/* 0x8200 */
- move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
- move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
+ move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
+ move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
/* 0x8300 */
- move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
- move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
+ move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
+ move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b, move1_rn_a, move1_rn_b,
/* 0x8400 */
- move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
- move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
+ move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
+ move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
/* 0x8500 */
- move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
- move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
+ move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
+ move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b, move0_nr_a, move0_nr_b,
/* 0x8600 */
- move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
- move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
+ move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
+ move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
/* 0x8700 */
- move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
- move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
+ move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
+ move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b, move1_nr_a, move1_nr_b,
/* 0x8800 */
- move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
- move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
+ move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
+ move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
/* 0x8900 */
- move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
- move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
+ move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
+ move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b, move0_nn_a, move0_nn_b,
/* 0x8a00 */
- move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
- move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
+ move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
+ move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
/* 0x8b00 */
- move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
- move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
+ move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
+ move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b, move1_nn_a, move1_nn_b,
/* 0x8c00 */
- movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
- movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
+ movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
+ movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
/* 0x8d00 */
- movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
- movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
+ movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
+ movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b, movb_rn_a, movb_rn_b,
/* 0x8e00 */
- movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
- movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
+ movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
+ movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
/* 0x8f00 */
- movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
- movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
+ movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
+ movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b, movb_nr_a, movb_nr_b,
/* 0x9000 */
- move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
- move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
+ move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
+ move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
/* 0x9100 */
- move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
- move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
+ move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
+ move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b, move0_r_ni_a, move0_r_ni_b,
/* 0x9200 */
- move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
- move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
+ move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
+ move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
/* 0x9300 */
- move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
- move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
+ move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
+ move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b, move1_r_ni_a, move1_r_ni_b,
/* 0x9400 */
- move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
- move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
+ move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
+ move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
/* 0x9500 */
- move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
- move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
+ move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
+ move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b, move0_ni_r_a, move0_ni_r_b,
/* 0x9600 */
- move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
- move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
+ move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
+ move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
/* 0x9700 */
- move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
- move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
+ move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
+ move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b, move1_ni_r_a, move1_ni_r_b,
/* 0x9800 */
- move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
- move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
+ move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
+ move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
/* 0x9900 */
- move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
- move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
+ move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
+ move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b, move0_ni_ni_a, move0_ni_ni_b,
/* 0x9a00 */
- move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
- move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
+ move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
+ move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
/* 0x9b00 */
- move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
- move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
+ move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
+ move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b, move1_ni_ni_a, move1_ni_ni_b,
/* 0x9c00 */
- movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
- movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
+ movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
+ movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
/* 0x9d00 */
- movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
- movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
+ movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
+ movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b, movb_nn_a, movb_nn_b,
/* 0x9e00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0x9f00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xa000 */
- move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
- move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
+ move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
+ move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
/* 0xa100 */
- move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
- move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
+ move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
+ move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b, move0_r_dn_a, move0_r_dn_b,
/* 0xa200 */
- move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
- move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
+ move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
+ move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
/* 0xa300 */
- move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
- move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
+ move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
+ move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b, move1_r_dn_a, move1_r_dn_b,
/* 0xa400 */
- move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
- move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
+ move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
+ move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
/* 0xa500 */
- move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
- move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
+ move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
+ move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b, move0_dn_r_a, move0_dn_r_b,
/* 0xa600 */
- move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
- move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
+ move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
+ move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
/* 0xa700 */
- move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
- move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
+ move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
+ move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b, move1_dn_r_a, move1_dn_r_b,
/* 0xa800 */
- move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
- move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
+ move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
+ move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
/* 0xa900 */
- move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
- move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
+ move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
+ move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b, move0_dn_dn_a, move0_dn_dn_b,
/* 0xaa00 */
- move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
- move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
+ move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
+ move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
/* 0xab00 */
- move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
- move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
+ move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
+ move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b, move1_dn_dn_a, move1_dn_dn_b,
/* 0xac00 */
- movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
- movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
+ movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
+ movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
/* 0xad00 */
- movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
- movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
+ movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
+ movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b, movb_r_no_a, movb_r_no_b,
/* 0xae00 */
- movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
- movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
+ movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
+ movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
/* 0xaf00 */
- movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
- movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
+ movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
+ movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b, movb_no_r_a, movb_no_r_b,
/* 0xb000 */
- move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
- move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
+ move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
+ move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
/* 0xb100 */
- move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
- move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
+ move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
+ move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b, move0_r_no_a, move0_r_no_b,
/* 0xb200 */
- move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
- move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
+ move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
+ move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
/* 0xb300 */
- move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
- move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
+ move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
+ move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b, move1_r_no_a, move1_r_no_b,
/* 0xb400 */
- move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
- move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
+ move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
+ move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
/* 0xb500 */
- move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
- move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
+ move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
+ move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b, move0_no_r_a, move0_no_r_b,
/* 0xb600 */
- move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
- move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
+ move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
+ move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
/* 0xb700 */
- move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
- move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
+ move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
+ move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b, move1_no_r_a, move1_no_r_b,
/* 0xb800 */
- move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
- move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
+ move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
+ move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
/* 0xb900 */
- move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
- move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
+ move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
+ move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b, move0_no_no_a, move0_no_no_b,
/* 0xba00 */
- move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
- move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
+ move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
+ move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
/* 0xbb00 */
- move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
- move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
+ move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
+ move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b, move1_no_no_a, move1_no_no_b,
/* 0xbc00 */
- movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
- movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
+ movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
+ movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
/* 0xbd00 */
- movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
- movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
+ movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
+ movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b, movb_no_no_a, movb_no_no_b,
/* 0xbe00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xbf00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xc000 */
- j_UC_0, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x,
- j_UC_8, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x,
+ j_UC_0, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x,
+ j_UC_8, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x, j_UC_x,
/* 0xc100 */
- j_P_0, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x,
- j_P_8, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x,
+ j_P_0, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x,
+ j_P_8, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x, j_P_x,
/* 0xc200 */
- j_LS_0, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x,
- j_LS_8, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x,
+ j_LS_0, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x,
+ j_LS_8, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x, j_LS_x,
/* 0xc300 */
- j_HI_0, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x,
- j_HI_8, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x,
+ j_HI_0, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x,
+ j_HI_8, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x, j_HI_x,
/* 0xc400 */
- j_LT_0, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x,
- j_LT_8, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x,
+ j_LT_0, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x,
+ j_LT_8, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x, j_LT_x,
/* 0xc500 */
- j_GE_0, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x,
- j_GE_8, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x,
+ j_GE_0, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x,
+ j_GE_8, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x, j_GE_x,
/* 0xc600 */
- j_LE_0, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x,
- j_LE_8, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x,
+ j_LE_0, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x,
+ j_LE_8, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x, j_LE_x,
/* 0xc700 */
- j_GT_0, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x,
- j_GT_8, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x,
+ j_GT_0, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x,
+ j_GT_8, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x, j_GT_x,
/* 0xc800 */
- j_C_0, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x,
- j_C_8, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x,
+ j_C_0, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x,
+ j_C_8, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x, j_C_x,
/* 0xc900 */
- j_NC_0, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x,
- j_NC_8, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x,
+ j_NC_0, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x,
+ j_NC_8, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x, j_NC_x,
/* 0xca00 */
- j_EQ_0, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x,
- j_EQ_8, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x,
+ j_EQ_0, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x,
+ j_EQ_8, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x, j_EQ_x,
/* 0xcb00 */
- j_NE_0, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x,
- j_NE_8, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x,
+ j_NE_0, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x,
+ j_NE_8, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x, j_NE_x,
/* 0xcc00 */
- j_V_0, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x,
- j_V_8, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x,
+ j_V_0, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x,
+ j_V_8, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x, j_V_x,
/* 0xcd00 */
- j_NV_0, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x,
- j_NV_8, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x,
+ j_NV_0, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x,
+ j_NV_8, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x, j_NV_x,
/* 0xce00 */
- j_N_0, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x,
- j_N_8, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x,
+ j_N_0, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x,
+ j_N_8, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x, j_N_x,
/* 0xcf00 */
- j_NN_0, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x,
- j_NN_8, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x,
+ j_NN_0, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x,
+ j_NN_8, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x, j_NN_x,
/* 0xd000 */
- move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
- move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
+ move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
+ move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
/* 0xd100 */
- move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
- move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
+ move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
+ move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b, move0_no_ni_a, move0_no_ni_b,
/* 0xd200 */
- move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
- move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
+ move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
+ move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
/* 0xd300 */
- move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
- move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
+ move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
+ move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b, move1_no_ni_a, move1_no_ni_b,
/* 0xd400 */
- move0_a_ni_a,move0_a_ni_b,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ move0_a_ni_a,move0_a_ni_b,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xd500 */
- exgf0_a, exgf0_b, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ exgf0_a, exgf0_b, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xd600 */
- move1_a_ni_a,move1_a_ni_b,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ move1_a_ni_a,move1_a_ni_b,unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xd700 */
- exgf1_a, exgf1_b, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ exgf1_a, exgf1_b, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xd800 */
- cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s, cexec_s,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xd900 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xda00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xdb00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xdc00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xdd00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xde00 */
- unimpl, fline, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, fline, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, fline, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, fline, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xdf00 */
- unimpl, line, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, line, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, line, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, line, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xe000 */
- add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
- add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
+ add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
+ add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
/* 0xe100 */
- add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
- add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
+ add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
+ add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b, add_xy_a, add_xy_b,
/* 0xe200 */
- sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
- sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
+ sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
+ sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
/* 0xe300 */
- sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
- sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
+ sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
+ sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b, sub_xy_a, sub_xy_b,
/* 0xe400 */
- cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
- cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
+ cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
+ cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
/* 0xe500 */
- cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
- cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
+ cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
+ cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b, cmp_xy_a, cmp_xy_b,
/* 0xe600 */
- cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
- cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
+ cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
+ cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
/* 0xe700 */
- cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
- cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
+ cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
+ cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b, cpw_a, cpw_b,
/* 0xe800 */
- cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
- cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
+ cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
+ cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
/* 0xe900 */
- cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
- cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
+ cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
+ cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b, cvxyl_a, cvxyl_b,
/* 0xea00 */
- cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
- cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
+ cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
+ cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
/* 0xeb00 */
- cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
- cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
+ cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
+ cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b, cvsxyl_a, cvsxyl_b,
/* 0xec00 */
- movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
- movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
+ movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
+ movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
/* 0xed00 */
- movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
- movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
+ movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
+ movx_a, movx_b, movx_a, movx_b, movx_a, movx_b, movx_a, movx_b,
/* 0xee00 */
- movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
- movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
+ movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
+ movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
/* 0xef00 */
- movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
- movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
+ movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
+ movy_a, movy_b, movy_a, movy_b, movy_a, movy_b, movy_a, movy_b,
/* 0xf000 */
- pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
- pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
+ pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
+ pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
/* 0xf100 */
- pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
- pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
+ pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
+ pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b, pixt_rixy_a, pixt_rixy_b,
/* 0xf200 */
- pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
- pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
+ pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
+ pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
/* 0xf300 */
- pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
- pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
+ pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
+ pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b, pixt_ixyr_a, pixt_ixyr_b,
/* 0xf400 */
- pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
- pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
+ pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
+ pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
/* 0xf500 */
- pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
- pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
+ pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
+ pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b, pixt_ixyixy_a, pixt_ixyixy_b,
/* 0xf600 */
- drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
- drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
+ drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
+ drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
/* 0xf700 */
- drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
- drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
+ drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
+ drav_a, drav_b, drav_a, drav_b, drav_a, drav_b, drav_a, drav_b,
/* 0xf800 */
- pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
- pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
+ pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
+ pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
/* 0xf900 */
- pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
- pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
+ pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
+ pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b, pixt_ri_a, pixt_ri_b,
/* 0xfa00 */
- pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
- pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
+ pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
+ pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
/* 0xfb00 */
- pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
- pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
+ pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
+ pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b, pixt_ir_a, pixt_ir_b,
/* 0xfc00 */
- pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
- pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
+ pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
+ pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
/* 0xfd00 */
- pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
- pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
+ pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
+ pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b, pixt_ii_a, pixt_ii_b,
/* 0xfe00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
/* 0xff00 */
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
- unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl,
+ unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl, unimpl
};
diff --git a/src/emu/cpu/tms34010/dis34010.c b/src/emu/cpu/tms34010/dis34010.c
index 8e67de99624..e15f59f54da 100644
--- a/src/emu/cpu/tms34010/dis34010.c
+++ b/src/emu/cpu/tms34010/dis34010.c
@@ -27,12 +27,12 @@ static void usage (void)
int main (int argc,char *argv[])
{
- UINT8 i,j,n;
- char *filename=0,buf[80];
+ UINT8 i,j,n;
+ char *filename=0,buf[80];
FILE *f;
- UINT32 begin=0,end=(UINT32)-1,filelen,len,pc;
+ UINT32 begin=0,end=(UINT32)-1,filelen,len,pc;
printf ("DIS34010\n"
- "Copyright Zsolt Vasvari/Aaron Giles\n");
+ "Copyright Zsolt Vasvari/Aaron Giles\n");
for (i=1,n=0;i<argc;++i)
{
@@ -52,13 +52,13 @@ int main (int argc,char *argv[])
switch (j)
{
case 0: ++i; if (i>argc) usage();
- begin=strtoul(argv[i],0,16) >> 3;
+ begin=strtoul(argv[i],0,16) >> 3;
break;
case 1: ++i; if (i>argc) usage();
- end=strtoul(argv[i],0,16) >> 3;
+ end=strtoul(argv[i],0,16) >> 3;
break;
case 2: ++i; if (i>argc) usage();
- offset=strtoul(argv[i],0,16) >> 3;
+ offset=strtoul(argv[i],0,16) >> 3;
break;
default: usage();
}
diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c
index a265c1a39ef..ac086c578c8 100644
--- a/src/emu/cpu/tms34010/tms34010.c
+++ b/src/emu/cpu/tms34010/tms34010.c
@@ -16,11 +16,11 @@
DEBUG STATE & STRUCTURES
***************************************************************************/
-#define VERBOSE 0
-#define LOG_CONTROL_REGS 0
-#define LOG_GRAPHICS_OPS 0
+#define VERBOSE 0
+#define LOG_CONTROL_REGS 0
+#define LOG_GRAPHICS_OPS 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
@@ -42,31 +42,31 @@ struct XY
struct tms34010_state
{
- UINT32 pc;
- UINT32 ppc;
- UINT32 st;
+ UINT32 pc;
+ UINT32 ppc;
+ UINT32 st;
void (*pixel_write)(tms34010_state *tms, offs_t offset, UINT32 data);
UINT32 (*pixel_read)(tms34010_state *tms, offs_t offset);
UINT32 (*raster_op)(tms34010_state *tms, UINT32 newpix, UINT32 oldpix);
- UINT32 convsp;
- UINT32 convdp;
- UINT32 convmp;
- UINT16 * shiftreg;
- INT32 gfxcycles;
- UINT8 pixelshift;
- UINT8 is_34020;
- UINT8 reset_deferred;
- UINT8 hblank_stable;
- UINT8 external_host_access;
- UINT8 executing;
- device_irq_acknowledge_callback irq_callback;
+ UINT32 convsp;
+ UINT32 convdp;
+ UINT32 convmp;
+ UINT16 * shiftreg;
+ INT32 gfxcycles;
+ UINT8 pixelshift;
+ UINT8 is_34020;
+ UINT8 reset_deferred;
+ UINT8 hblank_stable;
+ UINT8 external_host_access;
+ UINT8 executing;
+ device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
const tms34010_config *config;
screen_device *screen;
- emu_timer * scantimer;
- int icount;
+ emu_timer * scantimer;
+ int icount;
/* A registers 0-15 map to regs[0]-regs[15] */
/* B registers 0-15 map to regs[30]-regs[15] */
@@ -83,7 +83,7 @@ INLINE tms34010_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TMS34010 ||
- device->type() == TMS34020);
+ device->type() == TMS34020);
return (tms34010_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -112,87 +112,87 @@ static void tms34010_state_postload(tms34010_state *tms);
***************************************************************************/
/* status register definitions */
-#define STBIT_N (1 << 31)
-#define STBIT_C (1 << 30)
-#define STBIT_Z (1 << 29)
-#define STBIT_V (1 << 28)
-#define STBIT_P (1 << 25)
-#define STBIT_IE (1 << 21)
-#define STBIT_FE1 (1 << 11)
-#define STBITS_F1 (0x1f << 6)
-#define STBIT_FE0 (1 << 5)
-#define STBITS_F0 (0x1f << 0)
+#define STBIT_N (1 << 31)
+#define STBIT_C (1 << 30)
+#define STBIT_Z (1 << 29)
+#define STBIT_V (1 << 28)
+#define STBIT_P (1 << 25)
+#define STBIT_IE (1 << 21)
+#define STBIT_FE1 (1 << 11)
+#define STBITS_F1 (0x1f << 6)
+#define STBIT_FE0 (1 << 5)
+#define STBITS_F0 (0x1f << 0)
/* register definitions and shortcuts */
-#define N_FLAG(T) ((T)->st & STBIT_N)
-#define Z_FLAG(T) ((T)->st & STBIT_Z)
-#define C_FLAG(T) ((T)->st & STBIT_C)
-#define V_FLAG(T) ((T)->st & STBIT_V)
-#define P_FLAG(T) ((T)->st & STBIT_P)
-#define IE_FLAG(T) ((T)->st & STBIT_IE)
-#define FE0_FLAG(T) ((T)->st & STBIT_FE0)
-#define FE1_FLAG(T) ((T)->st & STBIT_FE1)
+#define N_FLAG(T) ((T)->st & STBIT_N)
+#define Z_FLAG(T) ((T)->st & STBIT_Z)
+#define C_FLAG(T) ((T)->st & STBIT_C)
+#define V_FLAG(T) ((T)->st & STBIT_V)
+#define P_FLAG(T) ((T)->st & STBIT_P)
+#define IE_FLAG(T) ((T)->st & STBIT_IE)
+#define FE0_FLAG(T) ((T)->st & STBIT_FE0)
+#define FE1_FLAG(T) ((T)->st & STBIT_FE1)
/* register file access */
-#define AREG(T,i) ((T)->regs[i].reg)
-#define AREG_XY(T,i) ((T)->regs[i].xy)
-#define AREG_X(T,i) ((T)->regs[i].xy.x)
-#define AREG_Y(T,i) ((T)->regs[i].xy.y)
-#define BREG(T,i) ((T)->regs[30 - (i)].reg)
-#define BREG_XY(T,i) ((T)->regs[30 - (i)].xy)
-#define BREG_X(T,i) ((T)->regs[30 - (i)].xy.x)
-#define BREG_Y(T,i) ((T)->regs[30 - (i)].xy.y)
-#define SP(T) AREG(T,15)
-#define FW(T,i) (((T)->st >> (i ? 6 : 0)) & 0x1f)
-#define FWEX(T,i) (((T)->st >> (i ? 6 : 0)) & 0x3f)
+#define AREG(T,i) ((T)->regs[i].reg)
+#define AREG_XY(T,i) ((T)->regs[i].xy)
+#define AREG_X(T,i) ((T)->regs[i].xy.x)
+#define AREG_Y(T,i) ((T)->regs[i].xy.y)
+#define BREG(T,i) ((T)->regs[30 - (i)].reg)
+#define BREG_XY(T,i) ((T)->regs[30 - (i)].xy)
+#define BREG_X(T,i) ((T)->regs[30 - (i)].xy.x)
+#define BREG_Y(T,i) ((T)->regs[30 - (i)].xy.y)
+#define SP(T) AREG(T,15)
+#define FW(T,i) (((T)->st >> (i ? 6 : 0)) & 0x1f)
+#define FWEX(T,i) (((T)->st >> (i ? 6 : 0)) & 0x3f)
/* opcode decode helpers */
-#define SRCREG(O) (((O) >> 5) & 0x0f)
-#define DSTREG(O) ((O) & 0x0f)
-#define SKIP_WORD(T) ((T)->pc += (2 << 3))
-#define SKIP_LONG(T) ((T)->pc += (4 << 3))
-#define PARAM_K(O) (((O) >> 5) & 0x1f)
-#define PARAM_N(O) ((O) & 0x1f)
-#define PARAM_REL8(O) ((INT8)(O))
+#define SRCREG(O) (((O) >> 5) & 0x0f)
+#define DSTREG(O) ((O) & 0x0f)
+#define SKIP_WORD(T) ((T)->pc += (2 << 3))
+#define SKIP_LONG(T) ((T)->pc += (4 << 3))
+#define PARAM_K(O) (((O) >> 5) & 0x1f)
+#define PARAM_N(O) ((O) & 0x1f)
+#define PARAM_REL8(O) ((INT8)(O))
/* memory I/O */
-#define WFIELD0(T,a,b) (*tms34010_wfield_functions[FW(T,0)])(T,a,b)
-#define WFIELD1(T,a,b) (*tms34010_wfield_functions[FW(T,1)])(T,a,b)
-#define RFIELD0(T,a) (*tms34010_rfield_functions[FWEX(T,0)])(T,a)
-#define RFIELD1(T,a) (*tms34010_rfield_functions[FWEX(T,1)])(T,a)
-#define WPIXEL(T,a,b) (*(T)->pixel_write)(T,a,b)
-#define RPIXEL(T,a) (*(T)->pixel_read)(T,a)
+#define WFIELD0(T,a,b) (*tms34010_wfield_functions[FW(T,0)])(T,a,b)
+#define WFIELD1(T,a,b) (*tms34010_wfield_functions[FW(T,1)])(T,a,b)
+#define RFIELD0(T,a) (*tms34010_rfield_functions[FWEX(T,0)])(T,a)
+#define RFIELD1(T,a) (*tms34010_rfield_functions[FWEX(T,1)])(T,a)
+#define WPIXEL(T,a,b) (*(T)->pixel_write)(T,a,b)
+#define RPIXEL(T,a) (*(T)->pixel_read)(T,a)
/* Implied Operands */
-#define SADDR(T) BREG(T,0)
-#define SADDR_X(T) BREG_X(T,0)
-#define SADDR_Y(T) BREG_Y(T,0)
-#define SADDR_XY(T) BREG_XY(T,0)
-#define SPTCH(T) BREG(T,1)
-#define DADDR(T) BREG(T,2)
-#define DADDR_X(T) BREG_X(T,2)
-#define DADDR_Y(T) BREG_Y(T,2)
-#define DADDR_XY(T) BREG_XY(T,2)
-#define DPTCH(T) BREG(T,3)
-#define OFFSET(T) BREG(T,4)
-#define WSTART_X(T) BREG_X(T,5)
-#define WSTART_Y(T) BREG_Y(T,5)
-#define WEND_X(T) BREG_X(T,6)
-#define WEND_Y(T) BREG_Y(T,6)
-#define DYDX_X(T) BREG_X(T,7)
-#define DYDX_Y(T) BREG_Y(T,7)
-#define COLOR0(T) BREG(T,8)
-#define COLOR1(T) BREG(T,9)
-#define COUNT(T) BREG(T,10)
-#define INC1_X(T) BREG_X(T,11)
-#define INC1_Y(T) BREG_Y(T,11)
-#define INC2_X(T) BREG_X(T,12)
-#define INC2_Y(T) BREG_Y(T,12)
-#define PATTRN(T) BREG(T,13)
-#define TEMP(T) BREG(T,14)
+#define SADDR(T) BREG(T,0)
+#define SADDR_X(T) BREG_X(T,0)
+#define SADDR_Y(T) BREG_Y(T,0)
+#define SADDR_XY(T) BREG_XY(T,0)
+#define SPTCH(T) BREG(T,1)
+#define DADDR(T) BREG(T,2)
+#define DADDR_X(T) BREG_X(T,2)
+#define DADDR_Y(T) BREG_Y(T,2)
+#define DADDR_XY(T) BREG_XY(T,2)
+#define DPTCH(T) BREG(T,3)
+#define OFFSET(T) BREG(T,4)
+#define WSTART_X(T) BREG_X(T,5)
+#define WSTART_Y(T) BREG_Y(T,5)
+#define WEND_X(T) BREG_X(T,6)
+#define WEND_Y(T) BREG_Y(T,6)
+#define DYDX_X(T) BREG_X(T,7)
+#define DYDX_Y(T) BREG_Y(T,7)
+#define COLOR0(T) BREG(T,8)
+#define COLOR1(T) BREG(T,9)
+#define COUNT(T) BREG(T,10)
+#define INC1_X(T) BREG_X(T,11)
+#define INC1_Y(T) BREG_Y(T,11)
+#define INC2_X(T) BREG_X(T,12)
+#define INC2_Y(T) BREG_Y(T,12)
+#define PATTRN(T) BREG(T,13)
+#define TEMP(T) BREG(T,14)
/* I/O registers */
-#define WINDOW_CHECKING(T) ((IOREG(T, REG_CONTROL) >> 6) & 0x03)
+#define WINDOW_CHECKING(T) ((IOREG(T, REG_CONTROL) >> 6) & 0x03)
@@ -293,8 +293,8 @@ INLINE INT32 POP(tms34010_state *tms)
PIXEL READS
***************************************************************************/
-#define RP(T,m1,m2) \
- /* TODO: Plane masking */ \
+#define RP(T,m1,m2) \
+ /* TODO: Plane masking */ \
return (TMS34010_RDMEM_WORD(T, TOBYTE(offset & 0xfffffff0)) >> (offset & m1)) & m2;
static UINT32 read_pixel_1(tms34010_state *tms, offs_t offset) { RP(tms,0x0f,0x01) }
@@ -329,55 +329,55 @@ static UINT32 read_pixel_shiftreg(tms34010_state *tms, offs_t offset)
***************************************************************************/
/* No Raster Op + No Transparency */
-#define WP(T,m1,m2) \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
- UINT32 shiftcount = offset & m1; \
+#define WP(T,m1,m2) \
+ UINT32 a = TOBYTE(offset & 0xfffffff0); \
+ UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
+ UINT32 shiftcount = offset & m1; \
\
- /* TODO: plane masking */ \
- data &= m2; \
- pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
- TMS34010_WRMEM_WORD(T, a, pix); \
+ /* TODO: plane masking */ \
+ data &= m2; \
+ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
+ TMS34010_WRMEM_WORD(T, a, pix); \
/* No Raster Op + Transparency */
-#define WP_T(T,m1,m2) \
- /* TODO: plane masking */ \
- data &= m2; \
- if (data) \
- { \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
- UINT32 shiftcount = offset & m1; \
+#define WP_T(T,m1,m2) \
+ /* TODO: plane masking */ \
+ data &= m2; \
+ if (data) \
+ { \
+ UINT32 a = TOBYTE(offset & 0xfffffff0); \
+ UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
+ UINT32 shiftcount = offset & m1; \
\
- /* TODO: plane masking */ \
- pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
- TMS34010_WRMEM_WORD(T, a, pix); \
- } \
+ /* TODO: plane masking */ \
+ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
+ TMS34010_WRMEM_WORD(T, a, pix); \
+ } \
/* Raster Op + No Transparency */
-#define WP_R(T,m1,m2) \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
- UINT32 shiftcount = offset & m1; \
+#define WP_R(T,m1,m2) \
+ UINT32 a = TOBYTE(offset & 0xfffffff0); \
+ UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
+ UINT32 shiftcount = offset & m1; \
\
- /* TODO: plane masking */ \
- data = (*(T)->raster_op)(tms, data & m2, (pix >> shiftcount) & m2) & m2; \
- pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
- TMS34010_WRMEM_WORD(T, a, pix); \
+ /* TODO: plane masking */ \
+ data = (*(T)->raster_op)(tms, data & m2, (pix >> shiftcount) & m2) & m2; \
+ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
+ TMS34010_WRMEM_WORD(T, a, pix); \
/* Raster Op + Transparency */
-#define WP_R_T(T,m1,m2) \
- UINT32 a = TOBYTE(offset & 0xfffffff0); \
- UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
- UINT32 shiftcount = offset & m1; \
+#define WP_R_T(T,m1,m2) \
+ UINT32 a = TOBYTE(offset & 0xfffffff0); \
+ UINT32 pix = TMS34010_RDMEM_WORD(T,a); \
+ UINT32 shiftcount = offset & m1; \
\
- /* TODO: plane masking */ \
- data = (*(T)->raster_op)(tms, data & m2, (pix >> shiftcount) & m2) & m2; \
- if (data) \
- { \
- pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
- TMS34010_WRMEM_WORD(T, a, pix); \
- } \
+ /* TODO: plane masking */ \
+ data = (*(T)->raster_op)(tms, data & m2, (pix >> shiftcount) & m2) & m2; \
+ if (data) \
+ { \
+ pix = (pix & ~(m2 << shiftcount)) | (data << shiftcount); \
+ TMS34010_WRMEM_WORD(T, a, pix); \
+ } \
/* No Raster Op + No Transparency */
@@ -831,7 +831,7 @@ static void (*const pixel_write_ops[4][6])(tms34010_state *tms, offs_t offset, U
{
{ write_pixel_1, write_pixel_2, write_pixel_4, write_pixel_8, write_pixel_16, write_pixel_32 },
{ write_pixel_r_1, write_pixel_r_2, write_pixel_r_4, write_pixel_r_8, write_pixel_r_16, write_pixel_r_32 },
- { write_pixel_t_1, write_pixel_t_2, write_pixel_t_4, write_pixel_t_8, write_pixel_t_16, write_pixel_t_32 },
+ { write_pixel_t_1, write_pixel_t_2, write_pixel_t_4, write_pixel_t_8, write_pixel_t_16, write_pixel_t_32 },
{ write_pixel_r_t_1, write_pixel_r_t_2, write_pixel_r_t_4, write_pixel_r_t_8, write_pixel_r_t_16, write_pixel_r_t_32 }
};
@@ -881,14 +881,14 @@ static void set_pixel_function(tms34010_state *tms)
static UINT32 (*const raster_ops[32]) (tms34010_state *tms, UINT32 newpix, UINT32 oldpix) =
{
- 0, raster_op_1 , raster_op_2 , raster_op_3,
+ 0, raster_op_1 , raster_op_2 , raster_op_3,
raster_op_4 , raster_op_5 , raster_op_6 , raster_op_7,
raster_op_8 , raster_op_9 , raster_op_10, raster_op_11,
raster_op_12, raster_op_13, raster_op_14, raster_op_15,
raster_op_16, raster_op_17, raster_op_18, raster_op_19,
raster_op_20, raster_op_21, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
};
@@ -977,8 +977,8 @@ static TIMER_CALLBACK( scanline_callback )
if (visarea.min_x < visarea.max_x && visarea.max_x <= width && visarea.min_y < visarea.max_y && visarea.max_y <= height)
{
/* because many games play with the HEBLNK/HSBLNK for effects, we don't change
- if they are the only thing that has changed, unless they are stable for a couple
- of frames */
+ if they are the only thing that has changed, unless they are stable for a couple
+ of frames */
int current_width = tms->screen->width();
int current_height = tms->screen->height();
@@ -1678,7 +1678,7 @@ int tms34010_host_r(device_t *cpu, int reg)
result = TMS34010_RDMEM_WORD(tms, TOBYTE(addr & 0xfffffff0));
/* optional postincrement (it says preincrement, but data is preloaded, so it
- is effectively a postincrement */
+ is effectively a postincrement */
if (IOREG(tms, REG_HSTCTLH) & 0x1000)
{
addr += 0x10;
@@ -1714,8 +1714,8 @@ static CPU_SET_INFO( tms34010 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(tms, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(tms, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(tms, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(tms, 1, info->i); break;
}
}
@@ -1762,43 +1762,43 @@ CPU_GET_INFO( tms34010 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms34010_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 8; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 10000; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 3; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT1) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 1: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT2) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms34010_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 8; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 10; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 10000; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 3; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT1) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 1: info->i = (IOREG(tms, REG_INTPEND) & TMS34010_INT2) ? ASSERT_LINE : CLEAR_LINE; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms34010); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms34010); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34010); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms34010); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms34010); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34010); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(tms34010); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms34010); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms34010); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34010); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms34010); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms34010); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34010); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(tms34010); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &tms->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS34010"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments 340x0"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Alex Pasadyn/Zsolt Vasvari\nParts based on code by Aaron Giles"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS34010"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments 340x0"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Alex Pasadyn/Zsolt Vasvari\nParts based on code by Aaron Giles"); break;
}
}
@@ -1812,16 +1812,16 @@ CPU_GET_INFO( tms34020 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34020); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34020); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms34020); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms34020); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS34020"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS34020"); break;
- default: CPU_GET_INFO_CALL(tms34010); break;
+ default: CPU_GET_INFO_CALL(tms34010); break;
}
}
diff --git a/src/emu/cpu/tms34010/tms34010.h b/src/emu/cpu/tms34010/tms34010.h
index 79147b9fe01..c93ddbd5609 100644
--- a/src/emu/cpu/tms34010/tms34010.h
+++ b/src/emu/cpu/tms34010/tms34010.h
@@ -107,30 +107,30 @@ enum
REG020_HSBLNK,
REG020_VTOTAL,
REG020_HTOTAL,
- REG020_DPYCTL, /* matches 010 */
- REG020_DPYSTRT, /* matches 010 */
- REG020_DPYINT, /* matches 010 */
- REG020_CONTROL, /* matches 010 */
- REG020_HSTDATA, /* matches 010 */
- REG020_HSTADRL, /* matches 010 */
- REG020_HSTADRH, /* matches 010 */
- REG020_HSTCTLL, /* matches 010 */
-
- REG020_HSTCTLH, /* matches 010 */
- REG020_INTENB, /* matches 010 */
- REG020_INTPEND, /* matches 010 */
- REG020_CONVSP, /* matches 010 */
- REG020_CONVDP, /* matches 010 */
- REG020_PSIZE, /* matches 010 */
+ REG020_DPYCTL, /* matches 010 */
+ REG020_DPYSTRT, /* matches 010 */
+ REG020_DPYINT, /* matches 010 */
+ REG020_CONTROL, /* matches 010 */
+ REG020_HSTDATA, /* matches 010 */
+ REG020_HSTADRL, /* matches 010 */
+ REG020_HSTADRH, /* matches 010 */
+ REG020_HSTCTLL, /* matches 010 */
+
+ REG020_HSTCTLH, /* matches 010 */
+ REG020_INTENB, /* matches 010 */
+ REG020_INTPEND, /* matches 010 */
+ REG020_CONVSP, /* matches 010 */
+ REG020_CONVDP, /* matches 010 */
+ REG020_PSIZE, /* matches 010 */
REG020_PMASKL,
REG020_PMASKH,
REG020_CONVMP,
REG020_CONTROL2,
REG020_CONFIG,
- REG020_DPYTAP, /* matches 010 */
+ REG020_DPYTAP, /* matches 010 */
REG020_VCOUNT,
REG020_HCOUNT,
- REG020_DPYADR, /* matches 010 */
+ REG020_DPYADR, /* matches 010 */
REG020_REFADR,
REG020_DPYSTL,
@@ -169,36 +169,36 @@ enum
};
/* Interrupts that are generated by the processor internally */
-#define TMS34010_INT1 0x0002 /* External Interrupt 1 */
-#define TMS34010_INT2 0x0004 /* External Interrupt 2 */
-#define TMS34010_HI 0x0200 /* Host Interrupt */
-#define TMS34010_DI 0x0400 /* Display Interrupt */
-#define TMS34010_WV 0x0800 /* Window Violation Interrupt */
+#define TMS34010_INT1 0x0002 /* External Interrupt 1 */
+#define TMS34010_INT2 0x0004 /* External Interrupt 2 */
+#define TMS34010_HI 0x0200 /* Host Interrupt */
+#define TMS34010_DI 0x0400 /* Display Interrupt */
+#define TMS34010_WV 0x0800 /* Window Violation Interrupt */
/* Configuration structure */
struct tms34010_display_params
{
- UINT16 vcount; /* most recent VCOUNT */
- UINT16 veblnk, vsblnk; /* start/end of VBLANK */
- UINT16 heblnk, hsblnk; /* start/end of HBLANK */
- UINT16 rowaddr, coladdr; /* row/column addresses */
- UINT8 yoffset; /* y offset from addresses */
- UINT8 enabled; /* video enabled */
+ UINT16 vcount; /* most recent VCOUNT */
+ UINT16 veblnk, vsblnk; /* start/end of VBLANK */
+ UINT16 heblnk, hsblnk; /* start/end of HBLANK */
+ UINT16 rowaddr, coladdr; /* row/column addresses */
+ UINT8 yoffset; /* y offset from addresses */
+ UINT8 enabled; /* video enabled */
};
struct tms34010_config
{
- UINT8 halt_on_reset; /* /HCS pin, which determines HALT state after reset */
- const char *screen_tag; /* the screen operated on */
- UINT32 pixclock; /* the pixel clock (0 means don't adjust screen size) */
- int pixperclock; /* pixels per clock */
- void (*scanline_callback_ind16)(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
- void (*scanline_callback_rgb32)(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params);
- void (*output_int)(device_t *device, int state); /* output interrupt callback */
- void (*to_shiftreg)(address_space &space, offs_t, UINT16 *); /* shift register write */
- void (*from_shiftreg)(address_space &space, offs_t, UINT16 *); /* shift register read */
+ UINT8 halt_on_reset; /* /HCS pin, which determines HALT state after reset */
+ const char *screen_tag; /* the screen operated on */
+ UINT32 pixclock; /* the pixel clock (0 means don't adjust screen size) */
+ int pixperclock; /* pixels per clock */
+ void (*scanline_callback_ind16)(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms34010_display_params *params);
+ void (*scanline_callback_rgb32)(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms34010_display_params *params);
+ void (*output_int)(device_t *device, int state); /* output interrupt callback */
+ void (*to_shiftreg)(address_space &space, offs_t, UINT16 *); /* shift register write */
+ void (*from_shiftreg)(address_space &space, offs_t, UINT16 *); /* shift register read */
};
@@ -212,13 +212,13 @@ DECLARE_LEGACY_CPU_DEVICE(TMS34020, tms34020);
/* Host control interface */
-#define TMS34010_HOST_ADDRESS_L 0
-#define TMS34010_HOST_ADDRESS_H 1
-#define TMS34010_HOST_DATA 2
-#define TMS34010_HOST_CONTROL 3
+#define TMS34010_HOST_ADDRESS_L 0
+#define TMS34010_HOST_ADDRESS_H 1
+#define TMS34010_HOST_DATA 2
+#define TMS34010_HOST_CONTROL 3
-void tms34010_host_w(device_t *cpu, int reg, int data);
-int tms34010_host_r(device_t *cpu, int reg);
+void tms34010_host_w(device_t *cpu, int reg, int data);
+int tms34010_host_r(device_t *cpu, int reg);
/* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */
diff --git a/src/emu/cpu/tms57002/tms57002.c b/src/emu/cpu/tms57002/tms57002.c
index 83051044b5c..307d8d3d476 100644
--- a/src/emu/cpu/tms57002/tms57002.c
+++ b/src/emu/cpu/tms57002/tms57002.c
@@ -51,8 +51,8 @@ ADDRESS_MAP_END
tms57002_device::tms57002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: cpu_device(mconfig, TMS57002, "TMS57002", tag, owner, clock),
- program_config("program", ENDIANNESS_LITTLE, 32, 8, -2, ADDRESS_MAP_NAME(internal_pgm)),
- data_config("data", ENDIANNESS_LITTLE, 8, 20)
+ program_config("program", ENDIANNESS_LITTLE, 32, 8, -2, ADDRESS_MAP_NAME(internal_pgm)),
+ data_config("data", ENDIANNESS_LITTLE, 8, 20)
{
}
diff --git a/src/emu/cpu/tms57002/tms57002.h b/src/emu/cpu/tms57002/tms57002.h
index adb1c83bb31..0c8c5815e8b 100644
--- a/src/emu/cpu/tms57002/tms57002.h
+++ b/src/emu/cpu/tms57002/tms57002.h
@@ -220,4 +220,3 @@ enum {
extern const device_type TMS57002;
#endif
-
diff --git a/src/emu/cpu/tms57002/tms57kdec.c b/src/emu/cpu/tms57002/tms57kdec.c
index 12b5efe76af..b53f25edca2 100644
--- a/src/emu/cpu/tms57002/tms57kdec.c
+++ b/src/emu/cpu/tms57002/tms57kdec.c
@@ -175,4 +175,3 @@ void tms57002_device::decode_cat3(UINT32 opcode, unsigned short *op, cstate *cs)
break;
}
}
-
diff --git a/src/emu/cpu/tms57002/tmsinstr.lst b/src/emu/cpu/tms57002/tmsinstr.lst
index 6081d429fe2..c820679f355 100644
--- a/src/emu/cpu/tms57002/tmsinstr.lst
+++ b/src/emu/cpu/tms57002/tmsinstr.lst
@@ -1,535 +1,535 @@
abs 1 01 1 n
- abs
- aacc = %a;
- if(((INT32)aacc) < 0) {
- aacc = - aacc;
- if(((INT32)aacc) < 0)
- st1 |= ST1_AOV;
- }
+ abs
+ aacc = %a;
+ if(((INT32)aacc) < 0) {
+ aacc = - aacc;
+ if(((INT32)aacc) < 0)
+ st1 |= ST1_AOV;
+ }
add 1 03 1 y
- add %d,a
- %wa((INT64)(INT32)%d + (INT64)(INT32)%a);
+ add %d,a
+ %wa((INT64)(INT32)%d + (INT64)(INT32)%a);
add 1 04 1 y
- add %c,a
- %wa((INT64)(INT32)%c + (INT64)(INT32)%a);
+ add %c,a
+ %wa((INT64)(INT32)%c + (INT64)(INT32)%a);
add 1 05 1 y
- add %d,m
- %sfai(d, %d);
- %wa((INT64)(INT32)d + (%mo >> 16));
+ add %d,m
+ %sfai(d, %d);
+ %wa((INT64)(INT32)d + (%mo >> 16));
add 1 06 1 y
- add %c,m
- %wa((INT64)(INT32)%c + (%mo >> 16));
+ add %c,m
+ %wa((INT64)(INT32)%c + (%mo >> 16));
add 1 07 1 y
- add %d,%c
- %wa((INT64)(INT32)%d + (INT64)(INT32)%c);
+ add %d,%c
+ %wa((INT64)(INT32)%d + (INT64)(INT32)%c);
adds 1 08 1 y
- adds %d
+ adds %d
amac 1 2d 2 y
- amac %d,%c,a
+ amac %d,%c,a
ampy 1 2c 2 y
- ampy %d,%c,a
+ ampy %d,%c,a
and 1 14 1 n
- and %d,a
- %sfai(d, %d);
- aacc &= d;
+ and %d,a
+ %sfai(d, %d);
+ aacc &= d;
and 1 15 1 n
- and %c,a
- aacc &= %c;
+ and %c,a
+ aacc &= %c;
and 1 16 1 n
- and %d,%c
- %sfai(d, %d);
- aacc = %c & d;
+ and %d,%c
+ %sfai(d, %d);
+ aacc = %c & d;
b 3 48 3 n b
- b %i
- %b(%i);
+ b %i
+ %b(%i);
bgz 3 50 3 n cb
- bgz %i
- if(((INT32)aacc) > 0) {
- %b(%i);
- }
+ bgz %i
+ if(((INT32)aacc) > 0) {
+ %b(%i);
+ }
bioz 3 70 3 n cb
- bioz %i
+ bioz %i
blz 3 58 3 n cb
- blz %i
- if(((INT32)aacc) < 0) {
- %b(%i);
- }
+ blz %i
+ if(((INT32)aacc) < 0) {
+ %b(%i);
+ }
bnz 3 60 3 n cb
- bnz %i
- if(aacc) {
- %b(%i);
- }
+ bnz %i
+ if(aacc) {
+ %b(%i);
+ }
bv 3 78 3 n cb
- bv %i
- if(st1 & ST1_AOV) {
- st1 &= ~ST1_AOV;
- %b(%i);
- }
+ bv %i
+ if(st1 & ST1_AOV) {
+ st1 &= ~ST1_AOV;
+ %b(%i);
+ }
cmpl 1 13 1 n
- cmpl
+ cmpl
dimh 2a 14 1 n
- dimh si0_l
+ dimh si0_l
dimh 2a 15 1 n
- dimh si0_r
+ dimh si0_r
dimh 2a 16 1 n
- dimh si1_l
+ dimh si1_l
dimh 2a 17 1 n
- dimh si1_r
+ dimh si1_r
diml 2a 18 1 n
- diml si0_l
+ diml si0_l
diml 2a 19 1 n
- diml si0_r
+ diml si0_r
diml 2a 1a 1 n
- diml si1_l
+ diml si1_l
diml 2a 1b 1 n
- diml si1_r
+ diml si1_r
dis 2a 10 1 n
- dis si0_l,%d
- %wd(si[0]);
+ dis si0_l,%d
+ %wd(si[0]);
dis 2a 11 1 n
- dis si0_r,%d
- %wd(si[1]);
+ dis si0_r,%d
+ %wd(si[1]);
dis 2a 12 1 n
- dis si1_l,%d
- %wd(si[2]);
+ dis si1_l,%d
+ %wd(si[2]);
dis 2a 13 1 n
- dis si1_r,%d
- %wd(si[3]);
+ dis si1_r,%d
+ %wd(si[3]);
domh 2a 20 1 n
- domh so0_l
- so[0] = (%mo >> 24) & 0xffffff;
+ domh so0_l
+ so[0] = (%mo >> 24) & 0xffffff;
domh 2a 21 1 n
- domh so0_r
- so[1] = (%mo >> 24) & 0xffffff;
+ domh so0_r
+ so[1] = (%mo >> 24) & 0xffffff;
domh 2a 22 1 n
- domh so1_l
- so[2] = (%mo >> 24) & 0xffffff;
+ domh so1_l
+ so[2] = (%mo >> 24) & 0xffffff;
domh 2a 23 1 n
- domh so1_r
- so[3] = (%mo >> 24) & 0xffffff;
+ domh so1_r
+ so[3] = (%mo >> 24) & 0xffffff;
doml 2a 24 1 n
- doml so0_l
+ doml so0_l
doml 2a 25 1 n
- doml so0_r
+ doml so0_r
doml 2a 26 1 n
- doml so1_l
+ doml so1_l
doml 2a 27 1 n
- doml so1_r
+ doml so1_r
dos 2b 1c 1 n
- dos so0_l,%d
+ dos so0_l,%d
dos 2b 1d 1 n
- dos so0_r,%d
+ dos so0_r,%d
dos 2b 1e 1 n
- dos so1_l,%d
+ dos so1_l,%d
dos 2b 1f 1 n
- dos so1_r,%d
+ dos so1_r,%d
idle 3 08 1 n i
- idle
- sti |= S_IDLE;
+ idle
+ sti |= S_IDLE;
incd 2a 42 1 y
- incd
+ incd
lacc 1 12 1 n
- lacc %c
- aacc = %c;
+ lacc %c
+ aacc = %c;
lacd 1 11 1 n
- lacd %d
- %sfai(d, %d);
- aacc = d;
+ lacd %d
+ %sfai(d, %d);
+ aacc = d;
lbrk 3 28 1 n
- lbrk %i
+ lbrk %i
lcaa 2a 08 1 y
- lcaa
- ca = %a >> 24;
+ lcaa
+ ca = %a >> 24;
lcac 3 40 1 n
- lcac %i
- if(((INT32)aacc) >= 0)
- ca = %i;
+ lcac %i
+ if(((INT32)aacc) >= 0)
+ ca = %i;
lcak 3 18 1 n
- lcak %i
- ca = %i;
+ lcak %i
+ ca = %i;
ldpk 2a 44 1 n f
- ldpk 0
- st1 &= ~ST1_DBP;
+ ldpk 0
+ st1 &= ~ST1_DBP;
ldpk 2a 45 1 n f
- ldpk 1
- st1 |= ST1_DBP;
+ ldpk 1
+ st1 |= ST1_DBP;
ld0t 2b 0c 1 y
- ld0t %d
+ ld0t %d
lira 2a 09 1 y
- lira
- id = %a >> 24;
+ lira
+ id = %a >> 24;
lirk 3 20 1 n
- lirk %i
- id = %i;
+ lirk %i
+ id = %i;
lmhc 1 33 1 n
- lmhc %c
- macc = ((INT64)(INT32)%c) << 16;
+ lmhc %c
+ macc = ((INT64)(INT32)%c) << 16;
lmhd 1 31 1 n
- lmhd %d
- macc = ((INT64)(INT32)%d) << 16;
+ lmhd %d
+ macc = ((INT64)(INT32)%d) << 16;
lmld 1 32 1 n
- lmld %d
- macc = (macc & ~0xffffffULL) | %d24;
+ lmld %d
+ macc = (macc & ~0xffffffULL) | %d24;
lpc 2b 31 1 n
- lpc %c
- if(sti & S_HOST)
- break;
- c = %c;
- host[0] = c >> 24;
- host[1] = c >> 16;
- host[2] = c >> 8;
- host[3] = c;
- hidx = 0;
- sti |= S_HOST;
+ lpc %c
+ if(sti & S_HOST)
+ break;
+ c = %c;
+ host[0] = c >> 24;
+ host[1] = c >> 16;
+ host[2] = c >> 8;
+ host[3] = c;
+ hidx = 0;
+ sti |= S_HOST;
lpd 2b 30 1 n
- lpd %d
+ lpd %d
mac 1 24 1 y
- mac %d,%c
- d = %d24;
- if(d & 0x00800000)
- d |= 0xff000000;
- creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)d;
- macc = %ml + (r >> 7);
+ mac %d,%c
+ d = %d24;
+ if(d & 0x00800000)
+ d |= 0xff000000;
+ creg = c = %c;
+ r = (INT64)(INT32)c * (INT64)(INT32)d;
+ macc = %ml + (r >> 7);
mac 1 25 1 y
- mac a,%d
+ mac a,%d
mac 1 26 1 y
- mac %c,a
- creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)%a;
- macc = %ml + (r >> 15);
+ mac %c,a
+ creg = c = %c;
+ r = (INT64)(INT32)c * (INT64)(INT32)%a;
+ macc = %ml + (r >> 15);
macs 1 2e 1 y
- macs %c,a
- creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)%a;
- macc = %ml + (r >> 14);
+ macs %c,a
+ creg = c = %c;
+ r = (INT64)(INT32)c * (INT64)(INT32)%a;
+ macc = %ml + (r >> 14);
macu 1 29 1 y
- macu %d,%c
- d = %d24; // d is 24bits unsigned
- creg = c = %c;
- r = (INT64)(INT32)c * (INT64)d;
- macc = %ml + (r >> 7);
+ macu %d,%c
+ d = %d24; // d is 24bits unsigned
+ creg = c = %c;
+ r = (INT64)(INT32)c * (INT64)d;
+ macc = %ml + (r >> 7);
macu 1 2a 1 y
- macu a,%d
- d = %d24; // d is 24bits unsigned
- creg = c = %a;
- r = (INT64)(INT32)c * (INT64)d;
- macc = %ml + (r >> 7);
+ macu a,%d
+ d = %d24; // d is 24bits unsigned
+ creg = c = %a;
+ r = (INT64)(INT32)c * (INT64)d;
+ macc = %ml + (r >> 7);
mpy 1 21 1 y
- mpy %d,%c
- d = %d24;
- if(d & 0x00800000)
- d |= 0xff000000;
- creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)d;
- macc = r >> 7;
+ mpy %d,%c
+ d = %d24;
+ if(d & 0x00800000)
+ d |= 0xff000000;
+ creg = c = %c;
+ r = (INT64)(INT32)c * (INT64)(INT32)d;
+ macc = r >> 7;
mpy 1 22 1 y
- mpy %c,a
- creg = c = %c;
- r = (INT64)(INT32)c * (INT64)(INT32)%a;
- macc = r >> 15;
+ mpy %c,a
+ creg = c = %c;
+ r = (INT64)(INT32)c * (INT64)(INT32)%a;
+ macc = r >> 15;
mpy 1 23 1 y
- mpy creg,%d
+ mpy creg,%d
mpyu 1 28 1 y
- mpyu %d,%c
- creg = c = %c;
- d = %d24; // d is 24bits unsigned
- r = (INT64)(INT32)c * (INT64)d;
- macc = r >> 7;
+ mpyu %d,%c
+ creg = c = %c;
+ d = %d24; // d is 24bits unsigned
+ r = (INT64)(INT32)c * (INT64)d;
+ macc = r >> 7;
neg 1 02 1 n
- neg
+ neg
or 1 17 1 n
- or %d,a
- %sfai(d, %d);
- aacc |= d;
+ or %d,a
+ %sfai(d, %d);
+ aacc |= d;
or 1 18 1 n
- or %c,a
- aacc |= %c;
+ or %c,a
+ aacc |= %c;
or 1 19 1 n
- or %d,%c
- %sfai(d, %d);
- aacc = %c | d;
+ or %d,%c
+ %sfai(d, %d);
+ aacc = %c | d;
raov 2a 38 1 n
- raov
+ raov
rde 1 39 1 n
- rde %c
- if(sti & (S_READ|S_WRITE))
- break;
- xoa = %c;
- xm_init();
- sti |= S_READ;
+ rde %c
+ if(sti & (S_READ|S_WRITE))
+ break;
+ xoa = %c;
+ xm_init();
+ sti |= S_READ;
ref 2a 0e 1 n
- ref
- /* nothing to do */
+ ref
+ /* nothing to do */
rmom 2a 40 1 n f
- rmom
- st1 &= ~ST1_MOVM;
+ rmom
+ st1 &= ~ST1_MOVM;
rmov 2a 3a 1 n
- rmov
- st1 &= ~ST1_MOV;
+ rmov
+ st1 &= ~ST1_MOV;
rnd 2a 68 1 n f
- rnd 48
- st1 = (st1 & ~ST1_RND) | (0 << ST1_RND_SHIFT);
+ rnd 48
+ st1 = (st1 & ~ST1_RND) | (0 << ST1_RND_SHIFT);
rnd 2a 69 1 n f
- rnd 32
- st1 = (st1 & ~ST1_RND) | (1 << ST1_RND_SHIFT);
+ rnd 32
+ st1 = (st1 & ~ST1_RND) | (1 << ST1_RND_SHIFT);
rnd 2a 6a 1 n f
- rnd 24
- st1 = (st1 & ~ST1_RND) | (2 << ST1_RND_SHIFT);
+ rnd 24
+ st1 = (st1 & ~ST1_RND) | (2 << ST1_RND_SHIFT);
rnd 2a 6b 1 n f
- rnd 20
- st1 = (st1 & ~ST1_RND) | (3 << ST1_RND_SHIFT);
+ rnd 20
+ st1 = (st1 & ~ST1_RND) | (3 << ST1_RND_SHIFT);
rnd 2a 6c 1 n f
- rnd 16
- st1 = (st1 & ~ST1_RND) | (4 << ST1_RND_SHIFT);
+ rnd 16
+ st1 = (st1 & ~ST1_RND) | (4 << ST1_RND_SHIFT);
rnd 2a 6d 1 n f
- rnd <5>
- st1 = (st1 & ~ST1_RND) | (5 << ST1_RND_SHIFT);
+ rnd <5>
+ st1 = (st1 & ~ST1_RND) | (5 << ST1_RND_SHIFT);
rnd 2a 6e 1 n f
- rnd <6>
- st1 = (st1 & ~ST1_RND) | (6 << ST1_RND_SHIFT);
+ rnd <6>
+ st1 = (st1 & ~ST1_RND) | (6 << ST1_RND_SHIFT);
rnd 2a 6f 1 n f
- rnd <7>
- st1 = (st1 & ~ST1_RND) | (7 << ST1_RND_SHIFT);
+ rnd <7>
+ st1 = (st1 & ~ST1_RND) | (7 << ST1_RND_SHIFT);
rptk 3 10 1 n
- rptk %i
- rptc_next = %i;
+ rptk %i
+ rptc_next = %i;
sacc 2a 01 1 y
- sacc %c
- %wc(%a);
+ sacc %c
+ %wc(%a);
sacd 2a 02 1 y
- sacd %d
- %wd(%a >> 8);
+ sacd %d
+ %wd(%a >> 8);
scrm 2a 48 1 n f
- scrm 32
- st1 = (st1 & ~ST1_CRM) | (0 << ST1_CRM_SHIFT);
+ scrm 32
+ st1 = (st1 & ~ST1_CRM) | (0 << ST1_CRM_SHIFT);
scrm 2a 49 1 n f
- scrm 16h
- st1 = (st1 & ~ST1_CRM) | (1 << ST1_CRM_SHIFT);
+ scrm 16h
+ st1 = (st1 & ~ST1_CRM) | (1 << ST1_CRM_SHIFT);
scrm 2a 4a 1 n f
- scrm 16l
- st1 = (st1 & ~ST1_CRM) | (2 << ST1_CRM_SHIFT);
+ scrm 16l
+ st1 = (st1 & ~ST1_CRM) | (2 << ST1_CRM_SHIFT);
scrm 2a 4b 1 n f
- scrm <3>
- st1 = (st1 & ~ST1_CRM) | (3 << ST1_CRM_SHIFT);
+ scrm <3>
+ st1 = (st1 & ~ST1_CRM) | (3 << ST1_CRM_SHIFT);
sfai 2b 54 1 n f
- sfai 0
- st1 &= ~ST1_SFAI;
+ sfai 0
+ st1 &= ~ST1_SFAI;
sfai 2b 55 1 n f
- sfai -1
- st1 |= ST1_SFAI;
+ sfai -1
+ st1 |= ST1_SFAI;
sfao 2a 50 1 n f
- sfao 0
- st1 &= ~ST1_SFAO;
+ sfao 0
+ st1 &= ~ST1_SFAO;
sfao 2a 51 1 n f
- sfao 7
- st1 |= ST1_SFAI;
+ sfao 7
+ st1 |= ST1_SFAI;
sfma 2b 58 1 n f
- sfma 0
- st1 = (st1 & ~ST1_SFMA) | (0 << ST1_SFMA_SHIFT);
+ sfma 0
+ st1 = (st1 & ~ST1_SFMA) | (0 << ST1_SFMA_SHIFT);
sfma 2b 59 1 n f
- sfma 2
- st1 = (st1 & ~ST1_SFMA) | (1 << ST1_SFMA_SHIFT);
+ sfma 2
+ st1 = (st1 & ~ST1_SFMA) | (1 << ST1_SFMA_SHIFT);
sfma 2b 5a 1 n f
- sfma 4
- st1 = (st1 & ~ST1_SFMA) | (2 << ST1_SFMA_SHIFT);
+ sfma 4
+ st1 = (st1 & ~ST1_SFMA) | (2 << ST1_SFMA_SHIFT);
sfma 2b 5b 1 n f
- sfma -16
- st1 = (st1 & ~ST1_SFMA) | (3 << ST1_SFMA_SHIFT);
+ sfma -16
+ st1 = (st1 & ~ST1_SFMA) | (3 << ST1_SFMA_SHIFT);
sfml 1 34 1 y
- sfml
- macc = (macc & 0x8000000000000ULL) | ((macc << 1) & 0x7ffffffffffffULL);
+ sfml
+ macc = (macc & 0x8000000000000ULL) | ((macc << 1) & 0x7ffffffffffffULL);
sfmo 2a 60 1 n f
- sfmo 0
- st1 = (st1 & ~ST1_SFMO) | (0 << ST1_SFMO_SHIFT);
+ sfmo 0
+ st1 = (st1 & ~ST1_SFMO) | (0 << ST1_SFMO_SHIFT);
sfmo 2a 61 1 n f
- sfmo 2
- st1 = (st1 & ~ST1_SFMO) | (1 << ST1_SFMO_SHIFT);
+ sfmo 2
+ st1 = (st1 & ~ST1_SFMO) | (1 << ST1_SFMO_SHIFT);
sfmo 2a 62 1 n f
- sfmo 4
- st1 = (st1 & ~ST1_SFMO) | (2 << ST1_SFMO_SHIFT);
+ sfmo 4
+ st1 = (st1 & ~ST1_SFMO) | (2 << ST1_SFMO_SHIFT);
sfmo 2a 63 1 n f
- sfmo -8
- st1 = (st1 & ~ST1_SFMO) | (3 << ST1_SFMO_SHIFT);
+ sfmo -8
+ st1 = (st1 & ~ST1_SFMO) | (3 << ST1_SFMO_SHIFT);
sfmr 1 35 1 y
- sfmr
+ sfmr
slmh 2a 06 1 y
- slmh %d
- %wd((%mv >> 24) & 0xffff00);
+ slmh %d
+ %wd((%mv >> 24) & 0xffff00);
slml 2a 07 1 y
- slml %d
- %wd((%mv >> 8) & 0xffffff);
+ slml %d
+ %wd((%mv >> 8) & 0xffffff);
smhc 2a 05 1 y
- smhc %c
- %wc(%mo >> 16);
+ smhc %c
+ %wc(%mo >> 16);
smhd 2a 03 1 y
- smhd %d
- %wd((%mo >> 24) & 0xffffff);
+ smhd %d
+ %wd((%mo >> 24) & 0xffffff);
smld 2a 04 1 y
- smld %d
+ smld %d
smom 2a 41 1 n f
- smom
- st1 |= ST1_MOVM;
+ smom
+ st1 |= ST1_MOVM;
srbd 2a 0f 1 y
- srbd %d
- %wd(xrd);
+ srbd %d
+ %wd(xrd);
std1 2a 0d 1 y
- std1 %d
+ std1 %d
sub 1 09 1 y
- sub %d,a
- %wa((INT64)(INT32)%d - (INT64)(INT32)%a);
+ sub %d,a
+ %wa((INT64)(INT32)%d - (INT64)(INT32)%a);
sub 1 0a 1 y
- sub %c,a
- %wa((INT64)(INT32)%c - (INT64)(INT32)%a);
+ sub %c,a
+ %wa((INT64)(INT32)%c - (INT64)(INT32)%a);
sub 1 0b 1 y
- sub %d,m
+ sub %d,m
sub 1 0c 1 y
- sub %c,m
+ sub %c,m
sub 1 0d 1 y
- sub %d,%c
- %wa((INT64)(INT32)%d - (INT64)(INT32)%c);
+ sub %d,%c
+ %wa((INT64)(INT32)%d - (INT64)(INT32)%c);
wre 1 38 1 n
- wre %d,%c
- if(sti & (S_READ|S_WRITE))
- break;
- xwr = %d24;
- xoa = %c;
- xm_init();
- sti |= S_WRITE;
+ wre %d,%c
+ if(sti & (S_READ|S_WRITE))
+ break;
+ xwr = %d24;
+ xoa = %c;
+ xm_init();
+ sti |= S_WRITE;
xor 1 1a 1 n
- xor %d,a
+ xor %d,a
xor 1 1b 1 n
- xor %c,a
+ xor %c,a
xor 1 1c 1 n
- xor %d,%c
+ xor %d,%c
zacc 1 10 1 n
- zacc
+ zacc
zmac 1 30 1 n
- zmac
+ zmac
diff --git a/src/emu/cpu/tms7000/7000dasm.c b/src/emu/cpu/tms7000/7000dasm.c
index a06a5b03267..aa72329121b 100644
--- a/src/emu/cpu/tms7000/7000dasm.c
+++ b/src/emu/cpu/tms7000/7000dasm.c
@@ -5,75 +5,75 @@
enum operandtype { DONE, NONE, UI8, I8, UI16, I16, PCREL, PCABS, TRAP };
struct oprandinfo {
- char opstr[4][12];
- operandtype decode[4];
+ char opstr[4][12];
+ operandtype decode[4];
};
struct opcodeinfo {
- int opcode;
- char name[8];
- int operand;
- UINT32 s_flag;
+ int opcode;
+ char name[8];
+ int operand;
+ UINT32 s_flag;
};
static const oprandinfo of[] = {
-/* 00 */ { {" B,A", "", "", ""}, {NONE, DONE, DONE, DONE} },
-/* 01 */ { {" R%u", ",A", "", ""}, {UI8, NONE, DONE, DONE} },
-/* 02 */ { {" R%u", ",B", "", ""}, {UI8, NONE, DONE, DONE} },
-/* 03 */ { {" R%u", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
-/* 04 */ { {" %%>%X", ",A", "", ""}, {UI8, NONE, DONE, DONE} },
-/* 05 */ { {" %%>%X", ",B", "", ""}, {UI8, NONE, DONE, DONE} },
-/* 06 */ { {" %%>%X", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
-
-/* 07 */ { {" A", ",P%u", "", ""}, {NONE,UI8,DONE,DONE} },
-/* 08 */ { {" B", ",P%u", "", ""}, {NONE,UI8,DONE,DONE} },
-/* 09 */ { {" %%>%02X", ",P%u", "", ""}, {UI8,UI8,DONE,DONE} },
-
-/* 10 */ { {" @>%04X", "", "", ""}, {UI16,DONE,DONE,DONE} },
-/* 11 */ { {" R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 12 */ { {" @>%04X(B)","", "", ""}, {UI16, DONE, DONE, DONE} },
-
-/* 13 */ { {" B,A", ",%s", "", ""}, {NONE, PCREL, DONE, DONE} },
-/* 14 */ { {" R%u,A", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
-/* 15 */ { {" R%u,B", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
-/* 16 */ { {" R%u", ",R%u", ",%s", ""}, {UI8, UI8, PCREL, DONE} },
-/* 17 */ { {" %%>%X", ",A,%s", "", ""}, {UI8, PCREL, DONE, DONE} },
-/* 18 */ { {" %%>%X", ",B,%s", "", ""}, {UI8, PCREL, DONE, DONE} },
-/* 19 */ { {" %%>%X", ",R%u", ",%s", ""}, {UI8, UI8, PCREL, DONE} },
-
-/* 20 */ { {" A,P%u", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
-/* 21 */ { {" B,P%u", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
-/* 22 */ { {" %%>%02X", ",P%u", ",%s" ""}, {UI8, UI8, PCREL, DONE} },
-
-/* 23 */ { {"", "", "", ""}, {DONE, DONE, DONE, DONE} },
-/* 24 */ { {" R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
-
-/* 25 */ { {" A,%s", "", "", ""}, {PCREL, DONE, DONE, DONE} },
-/* 26 */ { {" B,%s", "", "", ""}, {PCREL, DONE, DONE, DONE} },
-/* 27 */ { {" R%u", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
-
-/* 28 */ { {" %s", "", "", ""}, {PCREL, DONE, DONE, DONE} },
-
-/* 29 */ { {" A,B", "", "", ""}, {NONE, DONE, DONE, DONE} },
-/* 30 */ { {" B,A", "", "", ""}, {NONE, DONE, DONE, DONE} },
-/* 31 */ { {" A,R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 32 */ { {" B,R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 33 */ { {" R%u,A", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 34 */ { {" R%u,B", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 35 */ { {" R%u", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
-/* 36 */ { {" %%>%X,A", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 37 */ { {" %%>%X,B", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 38 */ { {" %%>%X", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
-
-/* 39 */ { {" %%>%04X",",R%u", "", ""}, {UI16, UI8, DONE, DONE} },
-/* 40 */ { {" %%>%04X(B)",",R%u", "", ""}, {UI16, UI8, DONE, DONE} },
-
-/* 41 */ { {" P%u,A", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 42 */ { {" P%u,B", "", "", ""}, {UI8, DONE, DONE, DONE} },
-/* 43 */ { {" %s", "", "", ""}, {PCABS, DONE, DONE, DONE} },
-/* 44 */ { {"", "", "", ""}, {TRAP, DONE, DONE, DONE} }, /* Only For TRAP */
-
-/* 45 */ { {" *R%u", "", "", ""}, {UI8, DONE, DONE, DONE} }
+/* 00 */ { {" B,A", "", "", ""}, {NONE, DONE, DONE, DONE} },
+/* 01 */ { {" R%u", ",A", "", ""}, {UI8, NONE, DONE, DONE} },
+/* 02 */ { {" R%u", ",B", "", ""}, {UI8, NONE, DONE, DONE} },
+/* 03 */ { {" R%u", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
+/* 04 */ { {" %%>%X", ",A", "", ""}, {UI8, NONE, DONE, DONE} },
+/* 05 */ { {" %%>%X", ",B", "", ""}, {UI8, NONE, DONE, DONE} },
+/* 06 */ { {" %%>%X", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
+
+/* 07 */ { {" A", ",P%u", "", ""}, {NONE,UI8,DONE,DONE} },
+/* 08 */ { {" B", ",P%u", "", ""}, {NONE,UI8,DONE,DONE} },
+/* 09 */ { {" %%>%02X", ",P%u", "", ""}, {UI8,UI8,DONE,DONE} },
+
+/* 10 */ { {" @>%04X", "", "", ""}, {UI16,DONE,DONE,DONE} },
+/* 11 */ { {" R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 12 */ { {" @>%04X(B)","", "", ""}, {UI16, DONE, DONE, DONE} },
+
+/* 13 */ { {" B,A", ",%s", "", ""}, {NONE, PCREL, DONE, DONE} },
+/* 14 */ { {" R%u,A", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
+/* 15 */ { {" R%u,B", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
+/* 16 */ { {" R%u", ",R%u", ",%s", ""}, {UI8, UI8, PCREL, DONE} },
+/* 17 */ { {" %%>%X", ",A,%s", "", ""}, {UI8, PCREL, DONE, DONE} },
+/* 18 */ { {" %%>%X", ",B,%s", "", ""}, {UI8, PCREL, DONE, DONE} },
+/* 19 */ { {" %%>%X", ",R%u", ",%s", ""}, {UI8, UI8, PCREL, DONE} },
+
+/* 20 */ { {" A,P%u", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
+/* 21 */ { {" B,P%u", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
+/* 22 */ { {" %%>%02X", ",P%u", ",%s" ""}, {UI8, UI8, PCREL, DONE} },
+
+/* 23 */ { {"", "", "", ""}, {DONE, DONE, DONE, DONE} },
+/* 24 */ { {" R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
+
+/* 25 */ { {" A,%s", "", "", ""}, {PCREL, DONE, DONE, DONE} },
+/* 26 */ { {" B,%s", "", "", ""}, {PCREL, DONE, DONE, DONE} },
+/* 27 */ { {" R%u", ",%s", "", ""}, {UI8, PCREL, DONE, DONE} },
+
+/* 28 */ { {" %s", "", "", ""}, {PCREL, DONE, DONE, DONE} },
+
+/* 29 */ { {" A,B", "", "", ""}, {NONE, DONE, DONE, DONE} },
+/* 30 */ { {" B,A", "", "", ""}, {NONE, DONE, DONE, DONE} },
+/* 31 */ { {" A,R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 32 */ { {" B,R%u", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 33 */ { {" R%u,A", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 34 */ { {" R%u,B", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 35 */ { {" R%u", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
+/* 36 */ { {" %%>%X,A", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 37 */ { {" %%>%X,B", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 38 */ { {" %%>%X", ",R%u", "", ""}, {UI8, UI8, DONE, DONE} },
+
+/* 39 */ { {" %%>%04X",",R%u", "", ""}, {UI16, UI8, DONE, DONE} },
+/* 40 */ { {" %%>%04X(B)",",R%u", "", ""}, {UI16, UI8, DONE, DONE} },
+
+/* 41 */ { {" P%u,A", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 42 */ { {" P%u,B", "", "", ""}, {UI8, DONE, DONE, DONE} },
+/* 43 */ { {" %s", "", "", ""}, {PCABS, DONE, DONE, DONE} },
+/* 44 */ { {"", "", "", ""}, {TRAP, DONE, DONE, DONE} }, /* Only For TRAP */
+
+/* 45 */ { {" *R%u", "", "", ""}, {UI8, DONE, DONE, DONE} }
};
static const opcodeinfo opcodes[] = {
@@ -373,11 +373,11 @@ CPU_DISASSEMBLE( tms7000 )
{
/* We found a match */
- int j,k,vector;
- UINT8 a;
- INT8 b;
- UINT16 c;
- INT16 d;
+ int j,k,vector;
+ UINT8 a;
+ INT8 b;
+ UINT16 c;
+ INT16 d;
buffer += sprintf (buffer, "%s", opcodes[i].name);
diff --git a/src/emu/cpu/tms7000/tms7000.c b/src/emu/cpu/tms7000/tms7000.c
index 867ccb4dbfa..cc9c30a602f 100644
--- a/src/emu/cpu/tms7000/tms7000.c
+++ b/src/emu/cpu/tms7000/tms7000.c
@@ -34,7 +34,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
struct tms7000_state;
@@ -55,9 +55,9 @@ static UINT16 bcd_sub( UINT16 a, UINT16 b);
#define RM(Addr) ((unsigned)cpustate->program->read_byte(Addr))
#define WM(Addr,Value) (cpustate->program->write_byte(Addr, Value))
-#define IMMBYTE(b) b = ((unsigned)cpustate->direct->read_raw_byte(pPC)); pPC++
-#define SIMMBYTE(b) b = ((signed)cpustate->direct->read_raw_byte(pPC)); pPC++
-#define IMMWORD(w) w.b.h = (unsigned)cpustate->direct->read_raw_byte(pPC++); w.b.l = (unsigned)cpustate->direct->read_raw_byte(pPC++)
+#define IMMBYTE(b) b = ((unsigned)cpustate->direct->read_raw_byte(pPC)); pPC++
+#define SIMMBYTE(b) b = ((signed)cpustate->direct->read_raw_byte(pPC)); pPC++
+#define IMMWORD(w) w.b.h = (unsigned)cpustate->direct->read_raw_byte(pPC++); w.b.l = (unsigned)cpustate->direct->read_raw_byte(pPC++)
#define PUSHBYTE(b) pSP++; WM(pSP,b)
#define PUSHWORD(w) pSP++; WM(pSP,w.b.h); pSP++; WM(pSP,w.b.l)
@@ -66,65 +66,65 @@ static UINT16 bcd_sub( UINT16 a, UINT16 b);
struct tms7000_state
{
- PAIR pc; /* Program counter */
- UINT8 sp; /* Stack Pointer */
- UINT8 sr; /* Status Register */
- UINT8 irq_state[3]; /* State of the three IRQs */
- UINT8 rf[0x80]; /* Register file (SJE) */
- UINT8 pf[0x100]; /* Perpherial file */
+ PAIR pc; /* Program counter */
+ UINT8 sp; /* Stack Pointer */
+ UINT8 sr; /* Status Register */
+ UINT8 irq_state[3]; /* State of the three IRQs */
+ UINT8 rf[0x80]; /* Register file (SJE) */
+ UINT8 pf[0x100]; /* Perpherial file */
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *io;
- int icount;
- int div_by_16_trigger;
- int cycles_per_INT2;
- UINT8 t1_capture_latch; /* Timer 1 capture latch */
- INT8 t1_prescaler; /* Timer 1 prescaler (5 bits) */
- INT16 t1_decrementer; /* Timer 1 decrementer (8 bits) */
- UINT8 idle_state; /* Set after the execution of an idle instruction */
+ int icount;
+ int div_by_16_trigger;
+ int cycles_per_INT2;
+ UINT8 t1_capture_latch; /* Timer 1 capture latch */
+ INT8 t1_prescaler; /* Timer 1 prescaler (5 bits) */
+ INT16 t1_decrementer; /* Timer 1 decrementer (8 bits) */
+ UINT8 idle_state; /* Set after the execution of an idle instruction */
};
INLINE tms7000_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TMS7000 ||
- device->type() == TMS7000_EXL);
+ device->type() == TMS7000_EXL);
return (tms7000_state *)downcast<legacy_cpu_device *>(device)->token();
}
-#define pPC cpustate->pc.w.l
-#define PC cpustate->pc
-#define pSP cpustate->sp
-#define pSR cpustate->sr
+#define pPC cpustate->pc.w.l
+#define PC cpustate->pc
+#define pSP cpustate->sp
+#define pSR cpustate->sr
-#define RDA RM(0x0000)
-#define RDB RM(0x0001)
+#define RDA RM(0x0000)
+#define RDB RM(0x0001)
#define WRA(Value) (WM(0x0000,Value))
#define WRB(Value) (WM(0x0001,Value))
-#define SR_C 0x80 /* Carry */
-#define SR_N 0x40 /* Negative */
-#define SR_Z 0x20 /* Zero */
-#define SR_I 0x10 /* Interrupt */
+#define SR_C 0x80 /* Carry */
+#define SR_N 0x40 /* Negative */
+#define SR_Z 0x20 /* Zero */
+#define SR_I 0x10 /* Interrupt */
-#define CLR_NZC pSR&=~(SR_N|SR_Z|SR_C)
-#define CLR_NZCI pSR&=~(SR_N|SR_Z|SR_C|SR_I)
-#define SET_C8(a) pSR|=((a&0x0100)>>1)
-#define SET_N8(a) pSR|=((a&0x0080)>>1)
-#define SET_Z(a) if(!a)pSR|=SR_Z
-#define SET_Z8(a) SET_Z((UINT8)a)
-#define SET_Z16(a) SET_Z((UINT8)a>>8)
-#define GET_C (pSR >> 7)
+#define CLR_NZC pSR&=~(SR_N|SR_Z|SR_C)
+#define CLR_NZCI pSR&=~(SR_N|SR_Z|SR_C|SR_I)
+#define SET_C8(a) pSR|=((a&0x0100)>>1)
+#define SET_N8(a) pSR|=((a&0x0080)>>1)
+#define SET_Z(a) if(!a)pSR|=SR_Z
+#define SET_Z8(a) SET_Z((UINT8)a)
+#define SET_Z16(a) SET_Z((UINT8)a>>8)
+#define GET_C (pSR >> 7)
/* Not working */
-#define SET_C16(a) pSR|=((a&0x010000)>>9)
+#define SET_C16(a) pSR|=((a&0x010000)>>9)
-#define SETC pSR |= SR_C
-#define SETZ pSR |= SR_Z
-#define SETN pSR |= SR_N
+#define SETC pSR |= SR_C
+#define SETZ pSR |= SR_Z
+#define SETN pSR |= SR_N
static DECLARE_READ8_HANDLER( tms7000_internal_r );
static DECLARE_WRITE8_HANDLER( tms7000_internal_w );
@@ -132,19 +132,19 @@ static DECLARE_READ8_HANDLER( tms70x0_pf_r );
static DECLARE_WRITE8_HANDLER( tms70x0_pf_w );
static ADDRESS_MAP_START(tms7000_mem, AS_PROGRAM, 8, legacy_cpu_device )
- AM_RANGE(0x0000, 0x007f) AM_READWRITE_LEGACY(tms7000_internal_r, tms7000_internal_w) /* tms7000 internal RAM */
- AM_RANGE(0x0080, 0x00ff) AM_NOP /* reserved */
- AM_RANGE(0x0100, 0x01ff) AM_READWRITE_LEGACY(tms70x0_pf_r, tms70x0_pf_w) /* tms7000 internal I/O ports */
+ AM_RANGE(0x0000, 0x007f) AM_READWRITE_LEGACY(tms7000_internal_r, tms7000_internal_w) /* tms7000 internal RAM */
+ AM_RANGE(0x0080, 0x00ff) AM_NOP /* reserved */
+ AM_RANGE(0x0100, 0x01ff) AM_READWRITE_LEGACY(tms70x0_pf_r, tms70x0_pf_w) /* tms7000 internal I/O ports */
ADDRESS_MAP_END
-INLINE UINT16 RM16( tms7000_state *cpustate, UINT32 mAddr ) /* Read memory (16-bit) */
+INLINE UINT16 RM16( tms7000_state *cpustate, UINT32 mAddr ) /* Read memory (16-bit) */
{
UINT32 result = RM(mAddr) << 8;
return result | RM((mAddr+1)&0xffff);
}
-INLINE UINT16 RRF16( tms7000_state *cpustate, UINT32 mAddr ) /*Read register file (16 bit) */
+INLINE UINT16 RRF16( tms7000_state *cpustate, UINT32 mAddr ) /*Read register file (16 bit) */
{
PAIR result;
result.b.h = RM((mAddr-1)&0xffff);
@@ -152,7 +152,7 @@ INLINE UINT16 RRF16( tms7000_state *cpustate, UINT32 mAddr ) /*Read register fil
return result.w.l;
}
-INLINE void WRF16( tms7000_state *cpustate, UINT32 mAddr, PAIR p ) /*Write register file (16 bit) */
+INLINE void WRF16( tms7000_state *cpustate, UINT32 mAddr, PAIR p ) /*Write register file (16 bit) */
{
WM( (mAddr-1)&0xffff, p.b.h );
WM( mAddr, p.b.l );
@@ -203,29 +203,29 @@ static CPU_RESET( tms7000 )
cpustate->irq_state[ TMS7000_IRQ2_LINE ] = CLEAR_LINE;
cpustate->irq_state[ TMS7000_IRQ3_LINE ] = CLEAR_LINE;
- WM( 0x100 + 9, 0 ); /* Data direction regs are cleared */
+ WM( 0x100 + 9, 0 ); /* Data direction regs are cleared */
WM( 0x100 + 11, 0 );
// if( cpustate->architecture == TMS7000_NMOS )
// {
- WM( 0x100 + 4, 0xff ); /* Output 0xff on port A */
- WM( 0x100 + 8, 0xff ); /* Output 0xff on port C */
- WM( 0x100 + 10, 0xff ); /* Output 0xff on port D */
+ WM( 0x100 + 4, 0xff ); /* Output 0xff on port A */
+ WM( 0x100 + 8, 0xff ); /* Output 0xff on port C */
+ WM( 0x100 + 10, 0xff ); /* Output 0xff on port D */
// }
// else
// {
// WM( 0x100 + 4, 0xff ); /* Output 0xff on port A */
// }
- pSP = 0x01; /* Set stack pointer to r1 */
- pSR = 0x00; /* Clear status register (disabling interrupts */
- WM( 0x100 + 0, 0 ); /* Write a zero to IOCNT0 */
+ pSP = 0x01; /* Set stack pointer to r1 */
+ pSR = 0x00; /* Clear status register (disabling interrupts */
+ WM( 0x100 + 0, 0 ); /* Write a zero to IOCNT0 */
/* On TMS70x2 and TMS70Cx2 IOCNT1 is zero */
- WRA( cpustate->pc.b.h ); /* Write previous PC to A:B */
+ WRA( cpustate->pc.b.h ); /* Write previous PC to A:B */
WRB( cpustate->pc.b.l );
- pPC = RM16(cpustate, 0xfffe); /* Load reset vector */
+ pPC = RM16(cpustate, 0xfffe); /* Load reset vector */
cpustate->div_by_16_trigger = -16;
}
@@ -240,23 +240,23 @@ static CPU_SET_INFO( tms7000 )
{
tms7000_state *cpustate = get_safe_token(device);
- switch (state)
- {
- /* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ1_LINE: tms7000_set_irq_line(cpustate, TMS7000_IRQ1_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ2_LINE: tms7000_set_irq_line(cpustate, TMS7000_IRQ2_LINE, info->i); break;
- case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ3_LINE: tms7000_set_irq_line(cpustate, TMS7000_IRQ3_LINE, info->i); break;
-
- case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS7000_PC: pPC = info->i; break;
- case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS7000_SP: pSP = info->i; break;
- case CPUINFO_INT_REGISTER + TMS7000_ST: pSR = info->i; tms7000_check_IRQ_lines(cpustate); break;
- case CPUINFO_INT_REGISTER + TMS7000_IDLE: cpustate->idle_state = info->i; break;
- case CPUINFO_INT_REGISTER + TMS7000_T1_CL: cpustate->t1_capture_latch = info->i; break;
- case CPUINFO_INT_REGISTER + TMS7000_T1_PS: cpustate->t1_prescaler = info->i; break;
- case CPUINFO_INT_REGISTER + TMS7000_T1_DEC: cpustate->t1_decrementer = info->i; break;
- }
+ switch (state)
+ {
+ /* --- the following bits of info are set as 64-bit signed integers --- */
+ case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ1_LINE: tms7000_set_irq_line(cpustate, TMS7000_IRQ1_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ2_LINE: tms7000_set_irq_line(cpustate, TMS7000_IRQ2_LINE, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ3_LINE: tms7000_set_irq_line(cpustate, TMS7000_IRQ3_LINE, info->i); break;
+
+ case CPUINFO_INT_PC:
+ case CPUINFO_INT_REGISTER + TMS7000_PC: pPC = info->i; break;
+ case CPUINFO_INT_SP:
+ case CPUINFO_INT_REGISTER + TMS7000_SP: pSP = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS7000_ST: pSR = info->i; tms7000_check_IRQ_lines(cpustate); break;
+ case CPUINFO_INT_REGISTER + TMS7000_IDLE: cpustate->idle_state = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS7000_T1_CL: cpustate->t1_capture_latch = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS7000_T1_PS: cpustate->t1_prescaler = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS7000_T1_DEC: cpustate->t1_decrementer = info->i; break;
+ }
}
/**************************************************************************
@@ -267,90 +267,90 @@ CPU_GET_INFO( tms7000 )
{
tms7000_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
- switch( state )
- {
- /* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms7000_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 48; break; /* 48 represents the multiply instruction, the next highest is 17 */
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ1_LINE: info->i = cpustate->irq_state[TMS7000_IRQ1_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ2_LINE: info->i = cpustate->irq_state[TMS7000_IRQ2_LINE]; break;
- case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ3_LINE: info->i = cpustate->irq_state[TMS7000_IRQ3_LINE]; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* Not supported */ break;
-
- case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + TMS7000_PC: info->i = pPC; break;
- case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS7000_SP: info->i = pSP; break;
- case CPUINFO_INT_REGISTER + TMS7000_ST: info->i = pSR; break;
+ switch( state )
+ {
+ /* --- the following bits of info are returned as 64-bit signed integers --- */
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms7000_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 48; break; /* 48 represents the multiply instruction, the next highest is 17 */
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ1_LINE: info->i = cpustate->irq_state[TMS7000_IRQ1_LINE]; break;
+ case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ2_LINE: info->i = cpustate->irq_state[TMS7000_IRQ2_LINE]; break;
+ case CPUINFO_INT_INPUT_STATE + TMS7000_IRQ3_LINE: info->i = cpustate->irq_state[TMS7000_IRQ3_LINE]; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = 0; /* Not supported */ break;
+
+ case CPUINFO_INT_PC:
+ case CPUINFO_INT_REGISTER + TMS7000_PC: info->i = pPC; break;
+ case CPUINFO_INT_SP:
+ case CPUINFO_INT_REGISTER + TMS7000_SP: info->i = pSP; break;
+ case CPUINFO_INT_REGISTER + TMS7000_ST: info->i = pSR; break;
case CPUINFO_INT_REGISTER + TMS7000_IDLE: info->i = cpustate->idle_state; break;
case CPUINFO_INT_REGISTER + TMS7000_T1_CL: info->i = cpustate->t1_capture_latch; break;
case CPUINFO_INT_REGISTER + TMS7000_T1_PS: info->i = cpustate->t1_prescaler; break;
case CPUINFO_INT_REGISTER + TMS7000_T1_DEC: info->i = cpustate->t1_decrementer; break;
- /* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms7000); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms7000); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms7000); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms7000); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; /* Not supported */break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms7000); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tms7000_mem); break;
-
- /* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "TMS7000"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instriuments TMS7000"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright tim lindner"); break;
-
- case CPUINFO_STR_FLAGS:
- sprintf(info->s, "%c%c%c%c%c%c%c%c",
- cpustate->sr & 0x80 ? 'C':'c',
- cpustate->sr & 0x40 ? 'N':'n',
- cpustate->sr & 0x20 ? 'Z':'z',
- cpustate->sr & 0x10 ? 'I':'i',
- cpustate->sr & 0x08 ? '?':'.',
- cpustate->sr & 0x04 ? '?':'.',
- cpustate->sr & 0x02 ? '?':'.',
- cpustate->sr & 0x01 ? '?':'.' );
- break;
-
- case CPUINFO_STR_REGISTER + TMS7000_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
- case CPUINFO_STR_REGISTER + TMS7000_SP: sprintf(info->s, "S:%02X", cpustate->sp); break;
- case CPUINFO_STR_REGISTER + TMS7000_ST: sprintf(info->s, "ST:%02X", cpustate->sr); break;
+ /* --- the following bits of info are returned as pointers to data or functions --- */
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms7000); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms7000); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms7000); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms7000); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; /* Not supported */break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms7000); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(tms7000_mem); break;
+
+ /* --- the following bits of info are returned as NULL-terminated strings --- */
+ case CPUINFO_STR_NAME: strcpy(info->s, "TMS7000"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instriuments TMS7000"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright tim lindner"); break;
+
+ case CPUINFO_STR_FLAGS:
+ sprintf(info->s, "%c%c%c%c%c%c%c%c",
+ cpustate->sr & 0x80 ? 'C':'c',
+ cpustate->sr & 0x40 ? 'N':'n',
+ cpustate->sr & 0x20 ? 'Z':'z',
+ cpustate->sr & 0x10 ? 'I':'i',
+ cpustate->sr & 0x08 ? '?':'.',
+ cpustate->sr & 0x04 ? '?':'.',
+ cpustate->sr & 0x02 ? '?':'.',
+ cpustate->sr & 0x01 ? '?':'.' );
+ break;
+
+ case CPUINFO_STR_REGISTER + TMS7000_PC: sprintf(info->s, "PC:%04X", cpustate->pc.w.l); break;
+ case CPUINFO_STR_REGISTER + TMS7000_SP: sprintf(info->s, "S:%02X", cpustate->sp); break;
+ case CPUINFO_STR_REGISTER + TMS7000_ST: sprintf(info->s, "ST:%02X", cpustate->sr); break;
case CPUINFO_STR_REGISTER + TMS7000_IDLE: sprintf(info->s, "Idle:%02X", cpustate->idle_state); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_CL: sprintf(info->s, "T1CL:%02X", cpustate->t1_capture_latch); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_PS: sprintf(info->s, "T1PS:%02X", cpustate->t1_prescaler & 0x1f); break;
case CPUINFO_STR_REGISTER + TMS7000_T1_DEC: sprintf(info->s, "T1DEC:%02X", cpustate->t1_decrementer & 0xff); break;
- }
+ }
}
CPU_GET_INFO( tms7000_exl )
{
- switch( state )
- {
+ switch( state )
+ {
case CPUINFO_FCT_EXECUTE:
info->execute = CPU_EXECUTE_NAME(tms7000_exl);
break;
@@ -363,7 +363,7 @@ CPU_GET_INFO( tms7000_exl )
void tms7000_set_irq_line(tms7000_state *cpustate, int irqline, int state)
{
if (cpustate->irq_state[irqline] != state)
- { /* check for transition */
+ { /* check for transition */
cpustate->irq_state[irqline] = state;
LOG(("tms7000: (cpu '%s') set_irq_line (INT%d, state %d)\n", cpustate->device->tag(), irqline+1, state));
@@ -373,7 +373,7 @@ void tms7000_set_irq_line(tms7000_state *cpustate, int irqline, int state)
return;
}
- cpustate->pf[0] |= (0x02 << (irqline * 2)); /* Set INTx iocntl0 flag */
+ cpustate->pf[0] |= (0x02 << (irqline * 2)); /* Set INTx iocntl0 flag */
if( irqline == TMS7000_IRQ3_LINE )
{
@@ -422,16 +422,16 @@ static void tms7000_check_IRQ_lines(tms7000_state *cpustate)
static void tms7000_do_interrupt( tms7000_state *cpustate, UINT16 address, UINT8 line )
{
- PUSHBYTE( pSR ); /* Push Status register */
- PUSHWORD( PC ); /* Push Program Counter */
- pSR = 0; /* Clear Status register */
- pPC = RM16(cpustate, address); /* Load PC with interrupt vector */
+ PUSHBYTE( pSR ); /* Push Status register */
+ PUSHWORD( PC ); /* Push Program Counter */
+ pSR = 0; /* Clear Status register */
+ pPC = RM16(cpustate, address); /* Load PC with interrupt vector */
if( cpustate->idle_state == 0 )
- cpustate->icount -= 19; /* 19 cycles used */
+ cpustate->icount -= 19; /* 19 cycles used */
else
{
- cpustate->icount -= 17; /* 17 if idled */
+ cpustate->icount -= 17; /* 17 if idled */
cpustate->idle_state = 0;
}
@@ -448,7 +448,7 @@ static CPU_EXECUTE( tms7000 )
cpustate->div_by_16_trigger += cpustate->icount;
- tms7000_check_IRQ_lines(cpustate);
+ tms7000_check_IRQ_lines(cpustate);
do
{
@@ -488,7 +488,7 @@ static CPU_EXECUTE( tms7000_exl )
cpustate->div_by_16_trigger += cpustate->icount;
- tms7000_check_IRQ_lines(cpustate);
+ tms7000_check_IRQ_lines(cpustate);
do
{
@@ -528,52 +528,52 @@ static CPU_EXECUTE( tms7000_exl )
void tms7000_A6EC1( device_t *device )
{
tms7000_state *cpustate = get_safe_token(device);
- if( (cpustate->pf[0x03] & 0x80) == 0x80 ) /* Is timer system active? */
- {
- if( (cpustate->pf[0x03] & 0x40) == 0x40) /* Is event counter the timer source? */
- tms7000_service_timer1(device);
- }
+ if( (cpustate->pf[0x03] & 0x80) == 0x80 ) /* Is timer system active? */
+ {
+ if( (cpustate->pf[0x03] & 0x40) == 0x40) /* Is event counter the timer source? */
+ tms7000_service_timer1(device);
+ }
}
static void tms7000_service_timer1( device_t *device )
{
tms7000_state *cpustate = get_safe_token(device);
- if( --cpustate->t1_prescaler < 0 ) /* Decrement prescaler and check for underflow */
- {
- cpustate->t1_prescaler = cpustate->pf[3] & 0x1f; /* Reload prescaler (5 bit) */
+ if( --cpustate->t1_prescaler < 0 ) /* Decrement prescaler and check for underflow */
+ {
+ cpustate->t1_prescaler = cpustate->pf[3] & 0x1f; /* Reload prescaler (5 bit) */
- if( --cpustate->t1_decrementer < 0 ) /* Decrement timer1 register and check for underflow */
- {
- cpustate->t1_decrementer = cpustate->pf[2]; /* Reload decrementer (8 bit) */
+ if( --cpustate->t1_decrementer < 0 ) /* Decrement timer1 register and check for underflow */
+ {
+ cpustate->t1_decrementer = cpustate->pf[2]; /* Reload decrementer (8 bit) */
device->execute().set_input_line(TMS7000_IRQ2_LINE, HOLD_LINE);
- //LOG( ("tms7000: trigger int2 (cycles: %d)\t%d\tdelta %d\n", cpustate->device->total_cycles(), cpustate->device->total_cycles() - tick, cpustate->cycles_per_INT2-(cpustate->device->total_cycles() - tick) );
+ //LOG( ("tms7000: trigger int2 (cycles: %d)\t%d\tdelta %d\n", cpustate->device->total_cycles(), cpustate->device->total_cycles() - tick, cpustate->cycles_per_INT2-(cpustate->device->total_cycles() - tick) );
//tick = cpustate->device->total_cycles() );
- /* Also, cascade out to timer 2 - timer 2 unimplemented */
- }
- }
+ /* Also, cascade out to timer 2 - timer 2 unimplemented */
+ }
+ }
// LOG( ( "tms7000: service timer1. 0x%2.2x 0x%2.2x (cycles %d)\t%d\t\n", cpustate->t1_prescaler, cpustate->t1_decrementer, cpustate->device->total_cycles(), cpustate->device->total_cycles() - tick2 ) );
// tick2 = cpustate->device->total_cycles();
}
-static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
+static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
{
tms7000_state *cpustate = get_safe_token(&space.device());
- UINT8 temp1, temp2, temp3;
+ UINT8 temp1, temp2, temp3;
switch( offset )
{
- case 0x00: /* IOCNT0, Input/Ouput control */
- temp1 = data & 0x2a; /* Record which bits to clear */
- temp2 = cpustate->pf[0x00] & 0x2a; /* Get copy of current bits */
- temp3 = (~temp1) & temp2; /* Clear the requested bits */
- cpustate->pf[0x00] = temp3 | (data & (~0x2a) ); /* OR in the remaining data */
+ case 0x00: /* IOCNT0, Input/Ouput control */
+ temp1 = data & 0x2a; /* Record which bits to clear */
+ temp2 = cpustate->pf[0x00] & 0x2a; /* Get copy of current bits */
+ temp3 = (~temp1) & temp2; /* Clear the requested bits */
+ cpustate->pf[0x00] = temp3 | (data & (~0x2a) ); /* OR in the remaining data */
break;
case 0x02:
cpustate->t1_decrementer = cpustate->pf[0x02] = data;
cpustate->cycles_per_INT2 = 0x10*((cpustate->pf[3] & 0x1f)+1)*(cpustate->pf[0x02]+1);
LOG( ( "tms7000: Timer adjusted. Decrementer: 0x%2.2x (Cycles per interrupt: %d)\n", cpustate->t1_decrementer, cpustate->cycles_per_INT2 ) );
break;
- case 0x03: /* T1CTL, timer 1 control */
+ case 0x03: /* T1CTL, timer 1 control */
if( ((cpustate->pf[0x03] & 0x80) == 0) && ((data & 0x80) == 0x80 ) ) /* Start timer? */
{
cpustate->pf[0x03] = data;
@@ -606,13 +606,13 @@ static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
break;
case 0x08: /* Port C write */
- temp1 = data & cpustate->pf[ 0x09 ]; /* Mask off input bits */
+ temp1 = data & cpustate->pf[ 0x09 ]; /* Mask off input bits */
cpustate->io->write_byte( TMS7000_PORTC, temp1 );
cpustate->pf[ 0x08 ] = temp1;
break;
case 0x0a: /* Port D write */
- temp1 = data & cpustate->pf[ 0x0b ]; /* Mask off input bits */
+ temp1 = data & cpustate->pf[ 0x0b ]; /* Mask off input bits */
cpustate->io->write_byte( TMS7000_PORTD, temp1 );
cpustate->pf[ 0x0a ] = temp1;
break;
@@ -624,15 +624,15 @@ static WRITE8_HANDLER( tms70x0_pf_w ) /* Perpherial file write */
}
}
-static READ8_HANDLER( tms70x0_pf_r ) /* Perpherial file read */
+static READ8_HANDLER( tms70x0_pf_r ) /* Perpherial file read */
{
tms7000_state *cpustate = get_safe_token(&space.device());
UINT8 result;
- UINT8 temp1, temp2, temp3;
+ UINT8 temp1, temp2, temp3;
switch( offset )
{
- case 0x00: /* IOCNT0, Input/Ouput control */
+ case 0x00: /* IOCNT0, Input/Ouput control */
result = cpustate->pf[0x00];
if (cpustate->irq_state[TMS7000_IRQ1_LINE] == ASSERT_LINE)
result |= 0x02;
@@ -640,11 +640,11 @@ static READ8_HANDLER( tms70x0_pf_r ) /* Perpherial file read */
result |= 0x20;
break;
- case 0x02: /* T1DATA, timer 1 8-bit decrementer */
+ case 0x02: /* T1DATA, timer 1 8-bit decrementer */
result = (cpustate->t1_decrementer & 0x00ff);
break;
- case 0x03: /* T1CTL, timer 1 capture (latched by INT3) */
+ case 0x03: /* T1CTL, timer 1 capture (latched by INT3) */
result = cpustate->t1_capture_latch;
break;
@@ -659,17 +659,17 @@ static READ8_HANDLER( tms70x0_pf_r ) /* Perpherial file read */
break;
case 0x08: /* Port C read */
- temp1 = cpustate->pf[ 0x08 ] & cpustate->pf[ 0x09 ]; /* Get previous output bits */
- temp2 = cpustate->io->read_byte( TMS7000_PORTC ); /* Read port */
- temp3 = temp2 & (~cpustate->pf[ 0x09 ]); /* Mask off output bits */
- result = temp1 | temp3; /* OR together */
+ temp1 = cpustate->pf[ 0x08 ] & cpustate->pf[ 0x09 ]; /* Get previous output bits */
+ temp2 = cpustate->io->read_byte( TMS7000_PORTC ); /* Read port */
+ temp3 = temp2 & (~cpustate->pf[ 0x09 ]); /* Mask off output bits */
+ result = temp1 | temp3; /* OR together */
break;
case 0x0a: /* Port D read */
- temp1 = cpustate->pf[ 0x0a ] & cpustate->pf[ 0x0b ]; /* Get previous output bits */
- temp2 = cpustate->io->read_byte( TMS7000_PORTD ); /* Read port */
- temp3 = temp2 & (~cpustate->pf[ 0x0b ]); /* Mask off output bits */
- result = temp1 | temp3; /* OR together */
+ temp1 = cpustate->pf[ 0x0a ] & cpustate->pf[ 0x0b ]; /* Get previous output bits */
+ temp2 = cpustate->io->read_byte( TMS7000_PORTD ); /* Read port */
+ temp3 = temp2 & (~cpustate->pf[ 0x0b ]); /* Mask off output bits */
+ result = temp1 | temp3; /* OR together */
break;
default:
@@ -684,7 +684,7 @@ static READ8_HANDLER( tms70x0_pf_r ) /* Perpherial file read */
// BCD arthrimetic handling
static UINT16 bcd_add( UINT16 a, UINT16 b )
{
- UINT16 t1,t2,t3,t4,t5,t6;
+ UINT16 t1,t2,t3,t4,t5,t6;
/* Sure it is a lot of code, but it works! */
t1 = a + 0x0666;
@@ -698,7 +698,7 @@ static UINT16 bcd_add( UINT16 a, UINT16 b )
static UINT16 bcd_tencomp( UINT16 a )
{
- UINT16 t1,t2,t3,t4,t5,t6;
+ UINT16 t1,t2,t3,t4,t5,t6;
t1 = 0xffff - a;
t2 = -a;
diff --git a/src/emu/cpu/tms7000/tms70op.c b/src/emu/cpu/tms7000/tms70op.c
index 2b28f9755e9..c0caabc0be8 100644
--- a/src/emu/cpu/tms7000/tms70op.c
+++ b/src/emu/cpu/tms7000/tms70op.c
@@ -33,7 +33,7 @@ static void illegal(tms7000_state *cpustate)
static void adc_b2a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA + RDB + GET_C;
WRA(t);
@@ -48,8 +48,8 @@ static void adc_b2a(tms7000_state *cpustate)
static void adc_r2a(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -66,8 +66,8 @@ static void adc_r2a(tms7000_state *cpustate)
static void adc_r2b(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -84,8 +84,8 @@ static void adc_r2b(tms7000_state *cpustate)
static void adc_r2r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i,j;
+ UINT16 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -103,8 +103,8 @@ static void adc_r2r(tms7000_state *cpustate)
static void adc_i2a(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -121,8 +121,8 @@ static void adc_i2a(tms7000_state *cpustate)
static void adc_i2b(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -139,8 +139,8 @@ static void adc_i2b(tms7000_state *cpustate)
static void adc_i2r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i,j;
+ UINT16 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -158,7 +158,7 @@ static void adc_i2r(tms7000_state *cpustate)
static void add_b2a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA + RDB;
WRA(t);
@@ -173,8 +173,8 @@ static void add_b2a(tms7000_state *cpustate)
static void add_r2a(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -191,8 +191,8 @@ static void add_r2a(tms7000_state *cpustate)
static void add_r2b(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -209,8 +209,8 @@ static void add_r2b(tms7000_state *cpustate)
static void add_r2r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i,j;
+ UINT16 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -228,8 +228,8 @@ static void add_r2r(tms7000_state *cpustate)
static void add_i2a(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -246,8 +246,8 @@ static void add_i2a(tms7000_state *cpustate)
static void add_i2b(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 v;
+ UINT16 t;
+ UINT8 v;
IMMBYTE(v);
@@ -264,8 +264,8 @@ static void add_i2b(tms7000_state *cpustate)
static void add_i2r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i,j;
+ UINT16 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -283,7 +283,7 @@ static void add_i2r(tms7000_state *cpustate)
static void and_b2a(tms7000_state *cpustate)
{
- UINT8 t;
+ UINT8 t;
t = RDA & RDB;
WRA(t);
@@ -297,8 +297,8 @@ static void and_b2a(tms7000_state *cpustate)
static void and_r2a(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -314,8 +314,8 @@ static void and_r2a(tms7000_state *cpustate)
static void and_r2b(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -331,8 +331,8 @@ static void and_r2b(tms7000_state *cpustate)
static void and_r2r(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,j;
+ UINT8 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -349,8 +349,8 @@ static void and_r2r(tms7000_state *cpustate)
static void and_i2a(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -366,8 +366,8 @@ static void and_i2a(tms7000_state *cpustate)
static void and_i2b(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -383,8 +383,8 @@ static void and_i2b(tms7000_state *cpustate)
static void and_i2r(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,j;
+ UINT8 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -401,8 +401,8 @@ static void and_i2r(tms7000_state *cpustate)
static void andp_a2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
t = RDA & RM( 0x0100 + v);
@@ -417,8 +417,8 @@ static void andp_a2p(tms7000_state *cpustate)
static void andp_b2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
t = RDB & RM( 0x0100 + v);
@@ -434,7 +434,7 @@ static void andp_b2p(tms7000_state *cpustate)
static void movp_i2p(tms7000_state *cpustate)
{
- UINT8 i,v;
+ UINT8 i,v;
IMMBYTE(i);
IMMBYTE(v);
@@ -449,8 +449,8 @@ static void movp_i2p(tms7000_state *cpustate)
static void andp_i2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,v;
+ UINT8 t;
+ UINT8 i,v;
IMMBYTE(i);
IMMBYTE(v);
@@ -475,7 +475,7 @@ static void br_dir(tms7000_state *cpustate)
static void br_ind(tms7000_state *cpustate)
{
- UINT8 v;
+ UINT8 v;
IMMBYTE( v );
PC.w.l = RRF16(cpustate,v);
@@ -494,7 +494,7 @@ static void br_inx(tms7000_state *cpustate)
static void btjo_b2a(tms7000_state *cpustate)
{
- UINT8 t;
+ UINT8 t;
t = RDB & RDA;
@@ -504,7 +504,7 @@ static void btjo_b2a(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE( j );
pPC += j;
@@ -519,7 +519,7 @@ static void btjo_b2a(tms7000_state *cpustate)
static void btjo_r2a(tms7000_state *cpustate)
{
- UINT8 t,r;
+ UINT8 t,r;
IMMBYTE( r );
t = RM( r ) & RDA;
@@ -530,7 +530,7 @@ static void btjo_r2a(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE( j );
pPC += j;
@@ -545,7 +545,7 @@ static void btjo_r2a(tms7000_state *cpustate)
static void btjo_r2b(tms7000_state *cpustate)
{
- UINT8 t,r;
+ UINT8 t,r;
IMMBYTE(r);
t = RM(r) & RDB;
@@ -556,7 +556,7 @@ static void btjo_r2b(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -571,7 +571,7 @@ static void btjo_r2b(tms7000_state *cpustate)
static void btjo_r2r(tms7000_state *cpustate)
{
- UINT8 t,r,s;
+ UINT8 t,r,s;
IMMBYTE(r);
IMMBYTE(s);
@@ -583,7 +583,7 @@ static void btjo_r2r(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -598,7 +598,7 @@ static void btjo_r2r(tms7000_state *cpustate)
static void btjo_i2a(tms7000_state *cpustate)
{
- UINT8 t,r;
+ UINT8 t,r;
IMMBYTE(r);
t = r & RDA;
@@ -609,7 +609,7 @@ static void btjo_i2a(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -624,7 +624,7 @@ static void btjo_i2a(tms7000_state *cpustate)
static void btjo_i2b(tms7000_state *cpustate)
{
- UINT8 t,i;
+ UINT8 t,i;
IMMBYTE(i);
t = i & RDB;
@@ -635,7 +635,7 @@ static void btjo_i2b(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -650,7 +650,7 @@ static void btjo_i2b(tms7000_state *cpustate)
static void btjo_i2r(tms7000_state *cpustate)
{
- UINT8 t,i,r;
+ UINT8 t,i,r;
IMMBYTE(i);
IMMBYTE(r);
@@ -662,7 +662,7 @@ static void btjo_i2r(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -677,7 +677,7 @@ static void btjo_i2r(tms7000_state *cpustate)
static void btjop_ap(tms7000_state *cpustate)
{
- UINT8 t,p;
+ UINT8 t,p;
IMMBYTE(p);
@@ -689,7 +689,7 @@ static void btjop_ap(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -704,7 +704,7 @@ static void btjop_ap(tms7000_state *cpustate)
static void btjop_bp(tms7000_state *cpustate)
{
- UINT8 t,p;
+ UINT8 t,p;
IMMBYTE(p);
@@ -716,7 +716,7 @@ static void btjop_bp(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -731,7 +731,7 @@ static void btjop_bp(tms7000_state *cpustate)
static void btjop_ip(tms7000_state *cpustate)
{
- UINT8 t,p,i;
+ UINT8 t,p,i;
IMMBYTE(i);
IMMBYTE(p);
@@ -744,7 +744,7 @@ static void btjop_ip(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -759,7 +759,7 @@ static void btjop_ip(tms7000_state *cpustate)
static void btjz_b2a(tms7000_state *cpustate)
{
- UINT8 t;
+ UINT8 t;
t = RDB & ~RDA;
@@ -769,7 +769,7 @@ static void btjz_b2a(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE( j );
pPC += j;
@@ -784,7 +784,7 @@ static void btjz_b2a(tms7000_state *cpustate)
static void btjz_r2a(tms7000_state *cpustate)
{
- UINT8 t,r;
+ UINT8 t,r;
IMMBYTE( r );
t = RM( r ) & ~RDA;
@@ -795,7 +795,7 @@ static void btjz_r2a(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE( j );
pPC += j;
@@ -810,7 +810,7 @@ static void btjz_r2a(tms7000_state *cpustate)
static void btjz_r2b(tms7000_state *cpustate)
{
- UINT8 t,r;
+ UINT8 t,r;
IMMBYTE(r);
t = RM(r) & ~RDB;
@@ -821,7 +821,7 @@ static void btjz_r2b(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -836,7 +836,7 @@ static void btjz_r2b(tms7000_state *cpustate)
static void btjz_r2r(tms7000_state *cpustate)
{
- UINT8 t,r,s;
+ UINT8 t,r,s;
IMMBYTE(r);
IMMBYTE(s);
@@ -848,7 +848,7 @@ static void btjz_r2r(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -863,7 +863,7 @@ static void btjz_r2r(tms7000_state *cpustate)
static void btjz_i2a(tms7000_state *cpustate)
{
- UINT8 t,r;
+ UINT8 t,r;
IMMBYTE(r);
t = r & ~RDA;
@@ -874,7 +874,7 @@ static void btjz_i2a(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -889,7 +889,7 @@ static void btjz_i2a(tms7000_state *cpustate)
static void btjz_i2b(tms7000_state *cpustate)
{
- UINT8 t,i;
+ UINT8 t,i;
IMMBYTE(i);
t = i & ~RDB;
@@ -900,7 +900,7 @@ static void btjz_i2b(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -915,7 +915,7 @@ static void btjz_i2b(tms7000_state *cpustate)
static void btjz_i2r(tms7000_state *cpustate)
{
- UINT8 t,i,r;
+ UINT8 t,i,r;
IMMBYTE(i);
IMMBYTE(r);
@@ -927,7 +927,7 @@ static void btjz_i2r(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -942,7 +942,7 @@ static void btjz_i2r(tms7000_state *cpustate)
static void btjzp_ap(tms7000_state *cpustate)
{
- UINT8 t,p;
+ UINT8 t,p;
IMMBYTE(p);
@@ -954,7 +954,7 @@ static void btjzp_ap(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -969,7 +969,7 @@ static void btjzp_ap(tms7000_state *cpustate)
static void btjzp_bp(tms7000_state *cpustate)
{
- UINT8 t,p;
+ UINT8 t,p;
IMMBYTE(p);
@@ -981,7 +981,7 @@ static void btjzp_bp(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -996,7 +996,7 @@ static void btjzp_bp(tms7000_state *cpustate)
static void btjzp_ip(tms7000_state *cpustate)
{
- UINT8 t,p,i;
+ UINT8 t,p,i;
IMMBYTE(i);
IMMBYTE(p);
@@ -1009,7 +1009,7 @@ static void btjzp_ip(tms7000_state *cpustate)
if(t != 0)
{
- INT8 j;
+ INT8 j;
SIMMBYTE(j);
pPC += j;
@@ -1024,7 +1024,7 @@ static void btjzp_ip(tms7000_state *cpustate)
static void call_dir(tms7000_state *cpustate)
{
- PAIR tPC;
+ PAIR tPC;
IMMWORD( tPC );
PUSHWORD( PC );
@@ -1035,7 +1035,7 @@ static void call_dir(tms7000_state *cpustate)
static void call_ind(tms7000_state *cpustate)
{
- UINT8 v;
+ UINT8 v;
IMMBYTE( v );
PUSHWORD( PC );
@@ -1046,7 +1046,7 @@ static void call_ind(tms7000_state *cpustate)
static void call_inx(tms7000_state *cpustate)
{
- PAIR tPC;
+ PAIR tPC;
IMMWORD( tPC );
PUSHWORD( PC );
@@ -1068,7 +1068,7 @@ static void clr_b(tms7000_state *cpustate)
static void clr_r(tms7000_state *cpustate)
{
- UINT8 r;
+ UINT8 r;
IMMBYTE(r);
WM(r,0);
@@ -1077,7 +1077,7 @@ static void clr_r(tms7000_state *cpustate)
static void clrc(tms7000_state *cpustate)
{
- UINT8 a;
+ UINT8 a;
a = RDA;
@@ -1108,8 +1108,8 @@ static void cmp_ba(tms7000_state *cpustate)
static void cmp_ra(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
t = RDA - RM(r);
@@ -1128,8 +1128,8 @@ static void cmp_ra(tms7000_state *cpustate)
static void cmp_rb(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
t = RDB - RM(r);
@@ -1148,8 +1148,8 @@ static void cmp_rb(tms7000_state *cpustate)
static void cmp_rr(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r,s;
+ UINT16 t;
+ UINT8 r,s;
IMMBYTE(r);
IMMBYTE(s);
@@ -1169,8 +1169,8 @@ static void cmp_rr(tms7000_state *cpustate)
static void cmp_ia(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i;
+ UINT16 t;
+ UINT8 i;
IMMBYTE(i);
t = RDA - i;
@@ -1189,8 +1189,8 @@ static void cmp_ia(tms7000_state *cpustate)
static void cmp_ib(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i;
+ UINT16 t;
+ UINT8 i;
IMMBYTE(i);
t = RDB - i;
@@ -1209,8 +1209,8 @@ static void cmp_ib(tms7000_state *cpustate)
static void cmp_ir(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i,r;
+ UINT16 t;
+ UINT8 i,r;
IMMBYTE(i);
IMMBYTE(r);
@@ -1230,8 +1230,8 @@ static void cmp_ir(tms7000_state *cpustate)
static void cmpa_dir(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR i;
+ UINT16 t;
+ PAIR i;
IMMWORD( i );
t = RDA - RM(i.w.l);
@@ -1250,9 +1250,9 @@ static void cmpa_dir(tms7000_state *cpustate)
static void cmpa_ind(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR p;
- INT8 i;
+ UINT16 t;
+ PAIR p;
+ INT8 i;
IMMBYTE(i);
p.w.l = RRF16(cpustate,i);
@@ -1272,8 +1272,8 @@ static void cmpa_ind(tms7000_state *cpustate)
static void cmpa_inx(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR i;
+ UINT16 t;
+ PAIR i;
IMMWORD( i );
t = RDA - RM(i.w.l + RDB);
@@ -1292,7 +1292,7 @@ static void cmpa_inx(tms7000_state *cpustate)
static void dac_b2a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = bcd_add( RDA, RDB );
@@ -1311,8 +1311,8 @@ static void dac_b2a(tms7000_state *cpustate)
static void dac_r2a(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
@@ -1333,8 +1333,8 @@ static void dac_r2a(tms7000_state *cpustate)
static void dac_r2b(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
@@ -1355,8 +1355,8 @@ static void dac_r2b(tms7000_state *cpustate)
static void dac_r2r(tms7000_state *cpustate)
{
- UINT8 r,s;
- UINT16 t;
+ UINT8 r,s;
+ UINT16 t;
IMMBYTE(s);
IMMBYTE(r);
@@ -1378,8 +1378,8 @@ static void dac_r2r(tms7000_state *cpustate)
static void dac_i2a(tms7000_state *cpustate)
{
- UINT8 i;
- UINT16 t;
+ UINT8 i;
+ UINT16 t;
IMMBYTE(i);
@@ -1400,8 +1400,8 @@ static void dac_i2a(tms7000_state *cpustate)
static void dac_i2b(tms7000_state *cpustate)
{
- UINT8 i;
- UINT16 t;
+ UINT8 i;
+ UINT16 t;
IMMBYTE(i);
@@ -1422,8 +1422,8 @@ static void dac_i2b(tms7000_state *cpustate)
static void dac_i2r(tms7000_state *cpustate)
{
- UINT8 i,r;
- UINT16 t;
+ UINT8 i,r;
+ UINT16 t;
IMMBYTE(i);
IMMBYTE(r);
@@ -1477,8 +1477,8 @@ static void dec_b(tms7000_state *cpustate)
static void dec_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
@@ -1496,7 +1496,7 @@ static void dec_r(tms7000_state *cpustate)
static void decd_a(tms7000_state *cpustate)
{
- PAIR t;
+ PAIR t;
t.w.h = 0;
t.w.l = RRF16(cpustate,0);
@@ -1514,7 +1514,7 @@ static void decd_a(tms7000_state *cpustate)
static void decd_b(tms7000_state *cpustate)
{
- PAIR t;
+ PAIR t;
t.w.h = 0;
t.w.l = RRF16(cpustate,1);
@@ -1532,8 +1532,8 @@ static void decd_b(tms7000_state *cpustate)
static void decd_r(tms7000_state *cpustate)
{
- UINT8 r;
- PAIR t;
+ UINT8 r;
+ PAIR t;
IMMBYTE(r);
t.w.h = 0;
@@ -1570,7 +1570,7 @@ static void djnz_a(tms7000_state *cpustate)
if( t != 0 )
{
- INT8 s;
+ INT8 s;
SIMMBYTE(s);
pPC += s;
@@ -1597,7 +1597,7 @@ static void djnz_b(tms7000_state *cpustate)
if( t != 0 )
{
- INT8 s;
+ INT8 s;
SIMMBYTE(s);
pPC += s;
@@ -1612,8 +1612,8 @@ static void djnz_b(tms7000_state *cpustate)
static void djnz_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
@@ -1627,7 +1627,7 @@ static void djnz_r(tms7000_state *cpustate)
if( t != 0 )
{
- INT8 s;
+ INT8 s;
SIMMBYTE(s);
pPC += s;
@@ -1642,7 +1642,7 @@ static void djnz_r(tms7000_state *cpustate)
static void dsb_b2a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = bcd_sub( RDA, RDB );
@@ -1661,8 +1661,8 @@ static void dsb_b2a(tms7000_state *cpustate)
static void dsb_r2a(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
@@ -1683,8 +1683,8 @@ static void dsb_r2a(tms7000_state *cpustate)
static void dsb_r2b(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
@@ -1705,8 +1705,8 @@ static void dsb_r2b(tms7000_state *cpustate)
static void dsb_r2r(tms7000_state *cpustate)
{
- UINT8 r,s;
- UINT16 t;
+ UINT8 r,s;
+ UINT16 t;
IMMBYTE(s);
IMMBYTE(r);
@@ -1728,8 +1728,8 @@ static void dsb_r2r(tms7000_state *cpustate)
static void dsb_i2a(tms7000_state *cpustate)
{
- UINT8 i;
- UINT16 t;
+ UINT8 i;
+ UINT16 t;
IMMBYTE(i);
@@ -1750,8 +1750,8 @@ static void dsb_i2a(tms7000_state *cpustate)
static void dsb_i2b(tms7000_state *cpustate)
{
- UINT8 i;
- UINT16 t;
+ UINT8 i;
+ UINT16 t;
IMMBYTE(i);
@@ -1772,8 +1772,8 @@ static void dsb_i2b(tms7000_state *cpustate)
static void dsb_i2r(tms7000_state *cpustate)
{
- UINT8 r,i;
- UINT16 t;
+ UINT8 r,i;
+ UINT16 t;
IMMBYTE(i);
IMMBYTE(r);
@@ -1808,7 +1808,7 @@ static void idle(tms7000_state *cpustate)
static void inc_a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA + 1;
@@ -1824,7 +1824,7 @@ static void inc_a(tms7000_state *cpustate)
static void inc_b(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDB + 1;
@@ -1840,8 +1840,8 @@ static void inc_b(tms7000_state *cpustate)
static void inc_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
@@ -1887,8 +1887,8 @@ static void inv_b(tms7000_state *cpustate)
static void inv_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
@@ -2034,8 +2034,8 @@ static void jpz(tms7000_state *cpustate)
static void lda_dir(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR i;
+ UINT16 t;
+ PAIR i;
IMMWORD( i );
t = RM(i.w.l);
@@ -2050,9 +2050,9 @@ static void lda_dir(tms7000_state *cpustate)
static void lda_ind(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR p;
- INT8 i;
+ UINT16 t;
+ PAIR p;
+ INT8 i;
IMMBYTE(i);
p.w.l=RRF16(cpustate,i);
@@ -2068,8 +2068,8 @@ static void lda_ind(tms7000_state *cpustate)
static void lda_inx(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR i;
+ UINT16 t;
+ PAIR i;
IMMWORD( i );
t = RM(i.w.l + RDB);
@@ -2090,7 +2090,7 @@ static void ldsp(tms7000_state *cpustate)
static void mov_a2b(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA;
WRB(t);
@@ -2104,7 +2104,7 @@ static void mov_a2b(tms7000_state *cpustate)
static void mov_b2a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDB;
WRA(t);
@@ -2119,8 +2119,8 @@ static void mov_b2a(tms7000_state *cpustate)
static void mov_a2r(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
@@ -2136,8 +2136,8 @@ static void mov_a2r(tms7000_state *cpustate)
static void mov_b2r(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
@@ -2153,8 +2153,8 @@ static void mov_b2r(tms7000_state *cpustate)
static void mov_r2a(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
t = RM(r);
@@ -2169,8 +2169,8 @@ static void mov_r2a(tms7000_state *cpustate)
static void mov_r2b(tms7000_state *cpustate)
{
- UINT8 r;
- UINT16 t;
+ UINT8 r;
+ UINT16 t;
IMMBYTE(r);
t = RM(r);
@@ -2185,8 +2185,8 @@ static void mov_r2b(tms7000_state *cpustate)
static void mov_r2r(tms7000_state *cpustate)
{
- UINT8 r,s;
- UINT16 t;
+ UINT8 r,s;
+ UINT16 t;
IMMBYTE(r);
IMMBYTE(s);
@@ -2202,7 +2202,7 @@ static void mov_r2r(tms7000_state *cpustate)
static void mov_i2a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
IMMBYTE(t);
WRA(t);
@@ -2216,7 +2216,7 @@ static void mov_i2a(tms7000_state *cpustate)
static void mov_i2b(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
IMMBYTE(t);
WRB(t);
@@ -2230,8 +2230,8 @@ static void mov_i2b(tms7000_state *cpustate)
static void mov_i2r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(t);
IMMBYTE(r);
@@ -2246,8 +2246,8 @@ static void mov_i2r(tms7000_state *cpustate)
static void movd_imm(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 r;
+ PAIR t;
+ UINT8 r;
IMMWORD(t);
IMMBYTE(r);
@@ -2263,8 +2263,8 @@ static void movd_imm(tms7000_state *cpustate)
static void movd_r(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 r,s;
+ PAIR t;
+ UINT8 r,s;
IMMBYTE(r);
IMMBYTE(s);
@@ -2281,8 +2281,8 @@ static void movd_r(tms7000_state *cpustate)
static void movd_inx(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 r;
+ PAIR t;
+ UINT8 r;
IMMWORD(t);
t.w.l += RDB;
@@ -2298,8 +2298,8 @@ static void movd_inx(tms7000_state *cpustate)
static void movp_a2p(tms7000_state *cpustate)
{
- UINT8 p;
- UINT16 t;
+ UINT8 p;
+ UINT16 t;
IMMBYTE(p);
t=RDA;
@@ -2314,8 +2314,8 @@ static void movp_a2p(tms7000_state *cpustate)
static void movp_b2p(tms7000_state *cpustate)
{
- UINT8 p;
- UINT16 t;
+ UINT8 p;
+ UINT16 t;
IMMBYTE(p);
t=RDB;
@@ -2332,8 +2332,8 @@ static void movp_b2p(tms7000_state *cpustate)
/* this appears to be unused */
static void movp_r2p(tms7000_state *cpustate)
{
- UINT8 p,r;
- UINT16 t;
+ UINT8 p,r;
+ UINT16 t;
IMMBYTE(r);
IMMBYTE(p);
@@ -2350,8 +2350,8 @@ static void movp_r2p(tms7000_state *cpustate)
static void movp_p2a(tms7000_state *cpustate)
{
- UINT8 p;
- UINT16 t;
+ UINT8 p;
+ UINT16 t;
IMMBYTE(p);
t=RM(0x0100+p);
@@ -2366,8 +2366,8 @@ static void movp_p2a(tms7000_state *cpustate)
static void movp_p2b(tms7000_state *cpustate)
{
- UINT8 p;
- UINT16 t;
+ UINT8 p;
+ UINT16 t;
IMMBYTE(p);
t=RM(0x0100+p);
@@ -2398,8 +2398,8 @@ static void mpy_ba(tms7000_state *cpustate)
static void mpy_ra(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 r;
+ PAIR t;
+ UINT8 r;
IMMBYTE(r);
@@ -2417,8 +2417,8 @@ static void mpy_ra(tms7000_state *cpustate)
static void mpy_rb(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 r;
+ PAIR t;
+ UINT8 r;
IMMBYTE(r);
@@ -2436,8 +2436,8 @@ static void mpy_rb(tms7000_state *cpustate)
static void mpy_rr(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 r,s;
+ PAIR t;
+ UINT8 r,s;
IMMBYTE(r);
IMMBYTE(s);
@@ -2456,8 +2456,8 @@ static void mpy_rr(tms7000_state *cpustate)
static void mpy_ia(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 i;
+ PAIR t;
+ UINT8 i;
IMMBYTE(i);
@@ -2475,8 +2475,8 @@ static void mpy_ia(tms7000_state *cpustate)
static void mpy_ib(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 i;
+ PAIR t;
+ UINT8 i;
IMMBYTE(i);
@@ -2494,8 +2494,8 @@ static void mpy_ib(tms7000_state *cpustate)
static void mpy_ir(tms7000_state *cpustate)
{
- PAIR t;
- UINT8 i,r;
+ PAIR t;
+ UINT8 i,r;
IMMBYTE(i);
IMMBYTE(r);
@@ -2519,7 +2519,7 @@ static void nop(tms7000_state *cpustate)
static void or_b2a(tms7000_state *cpustate)
{
- UINT8 t;
+ UINT8 t;
t = RDA | RDB;
WRA(t);
@@ -2533,8 +2533,8 @@ static void or_b2a(tms7000_state *cpustate)
static void or_r2a(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -2550,8 +2550,8 @@ static void or_r2a(tms7000_state *cpustate)
static void or_r2b(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -2567,8 +2567,8 @@ static void or_r2b(tms7000_state *cpustate)
static void or_r2r(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,j;
+ UINT8 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -2585,8 +2585,8 @@ static void or_r2r(tms7000_state *cpustate)
static void or_i2a(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -2602,8 +2602,8 @@ static void or_i2a(tms7000_state *cpustate)
static void or_i2b(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -2619,8 +2619,8 @@ static void or_i2b(tms7000_state *cpustate)
static void or_i2r(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,j;
+ UINT8 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -2637,8 +2637,8 @@ static void or_i2r(tms7000_state *cpustate)
static void orp_a2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
t = RDA | RM( 0x0100 + v);
@@ -2653,8 +2653,8 @@ static void orp_a2p(tms7000_state *cpustate)
static void orp_b2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
t = RDB | RM( 0x0100 + v);
@@ -2669,8 +2669,8 @@ static void orp_b2p(tms7000_state *cpustate)
static void orp_i2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,v;
+ UINT8 t;
+ UINT8 i,v;
IMMBYTE(i);
IMMBYTE(v);
@@ -2686,7 +2686,7 @@ static void orp_i2p(tms7000_state *cpustate)
static void pop_a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
PULLBYTE(t);
WRA(t);
@@ -2700,7 +2700,7 @@ static void pop_a(tms7000_state *cpustate)
static void pop_b(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
PULLBYTE(t);
WRB(t);
@@ -2714,8 +2714,8 @@ static void pop_b(tms7000_state *cpustate)
static void pop_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
PULLBYTE(t);
@@ -2730,7 +2730,7 @@ static void pop_r(tms7000_state *cpustate)
static void pop_st(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
PULLBYTE(t);
pSR = t;
@@ -2740,7 +2740,7 @@ static void pop_st(tms7000_state *cpustate)
static void push_a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA;
PUSHBYTE(t);
@@ -2754,7 +2754,7 @@ static void push_a(tms7000_state *cpustate)
static void push_b(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDB;
PUSHBYTE(t);
@@ -2768,8 +2768,8 @@ static void push_b(tms7000_state *cpustate)
static void push_r(tms7000_state *cpustate)
{
- UINT16 t;
- INT8 r;
+ UINT16 t;
+ INT8 r;
IMMBYTE(r);
t = RM(r);
@@ -2784,7 +2784,7 @@ static void push_r(tms7000_state *cpustate)
static void push_st(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = pSR;
PUSHBYTE(t);
@@ -2808,7 +2808,7 @@ static void rets(tms7000_state *cpustate)
static void rl_a(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA << 1;
@@ -2827,7 +2827,7 @@ static void rl_a(tms7000_state *cpustate)
static void rl_b(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDB << 1;
@@ -2846,8 +2846,8 @@ static void rl_b(tms7000_state *cpustate)
static void rl_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
t = RM(r) << 1;
@@ -2867,8 +2867,8 @@ static void rl_r(tms7000_state *cpustate)
static void rlc_a(tms7000_state *cpustate)
{
- UINT16 t;
- int old_carry;
+ UINT16 t;
+ int old_carry;
old_carry = (pSR & SR_C);
@@ -2889,8 +2889,8 @@ static void rlc_a(tms7000_state *cpustate)
static void rlc_b(tms7000_state *cpustate)
{
- UINT16 t;
- int old_carry;
+ UINT16 t;
+ int old_carry;
old_carry = (pSR & SR_C);
@@ -2911,9 +2911,9 @@ static void rlc_b(tms7000_state *cpustate)
static void rlc_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
- int old_carry;
+ UINT16 t;
+ UINT8 r;
+ int old_carry;
old_carry = (pSR & SR_C);
@@ -2935,8 +2935,8 @@ static void rlc_r(tms7000_state *cpustate)
static void rr_a(tms7000_state *cpustate)
{
- UINT16 t;
- int old_bit0;
+ UINT16 t;
+ int old_bit0;
t = RDA;
@@ -2961,8 +2961,8 @@ static void rr_a(tms7000_state *cpustate)
static void rr_b(tms7000_state *cpustate)
{
- UINT16 t;
- int old_bit0;
+ UINT16 t;
+ int old_bit0;
t = RDB;
@@ -2987,10 +2987,10 @@ static void rr_b(tms7000_state *cpustate)
static void rr_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
- int old_bit0;
+ int old_bit0;
IMMBYTE(r);
t = RM(r);
@@ -3016,8 +3016,8 @@ static void rr_r(tms7000_state *cpustate)
static void rrc_a(tms7000_state *cpustate)
{
- UINT16 t;
- int old_bit0;
+ UINT16 t;
+ int old_bit0;
t = RDA;
@@ -3040,8 +3040,8 @@ static void rrc_a(tms7000_state *cpustate)
static void rrc_b(tms7000_state *cpustate)
{
- UINT16 t;
- int old_bit0;
+ UINT16 t;
+ int old_bit0;
t = RDB;
@@ -3064,9 +3064,9 @@ static void rrc_b(tms7000_state *cpustate)
static void rrc_r(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
- int old_bit0;
+ UINT16 t;
+ UINT8 r;
+ int old_bit0;
IMMBYTE(r);
t = RM(r);
@@ -3090,7 +3090,7 @@ static void rrc_r(tms7000_state *cpustate)
static void sbb_ba(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA - RDB - ((pSR & SR_C) ? 0 : 1);
WRA(t);
@@ -3105,8 +3105,8 @@ static void sbb_ba(tms7000_state *cpustate)
static void sbb_ra(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
t = RDA - RM(r) - ((pSR & SR_C) ? 0 : 1);
@@ -3122,8 +3122,8 @@ static void sbb_ra(tms7000_state *cpustate)
static void sbb_rb(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
t = RDB - RM(r) - ((pSR & SR_C) ? 0 : 1);
@@ -3139,8 +3139,8 @@ static void sbb_rb(tms7000_state *cpustate)
static void sbb_rr(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r,s;
+ UINT16 t;
+ UINT8 r,s;
IMMBYTE(s);
IMMBYTE(r);
@@ -3157,8 +3157,8 @@ static void sbb_rr(tms7000_state *cpustate)
static void sbb_ia(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i;
+ UINT16 t;
+ UINT8 i;
IMMBYTE(i);
t = RDA - i - ((pSR & SR_C) ? 0 : 1);
@@ -3174,8 +3174,8 @@ static void sbb_ia(tms7000_state *cpustate)
static void sbb_ib(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i;
+ UINT16 t;
+ UINT8 i;
IMMBYTE(i);
t = RDB - i - ((pSR & SR_C) ? 0 : 1);
@@ -3191,8 +3191,8 @@ static void sbb_ib(tms7000_state *cpustate)
static void sbb_ir(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r,i;
+ UINT16 t;
+ UINT8 r,i;
IMMBYTE(i);
IMMBYTE(r);
@@ -3217,8 +3217,8 @@ static void setc(tms7000_state *cpustate)
static void sta_dir(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR i;
+ UINT16 t;
+ PAIR i;
t = RDA;
IMMWORD( i );
@@ -3234,9 +3234,9 @@ static void sta_dir(tms7000_state *cpustate)
static void sta_ind(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR p;
- INT8 r;
+ UINT16 t;
+ PAIR p;
+ INT8 r;
IMMBYTE(r);
p.w.l = RRF16(cpustate,r);
@@ -3252,8 +3252,8 @@ static void sta_ind(tms7000_state *cpustate)
static void sta_inx(tms7000_state *cpustate)
{
- UINT16 t;
- PAIR i;
+ UINT16 t;
+ PAIR i;
IMMWORD( i );
t = RDA;
@@ -3275,7 +3275,7 @@ static void stsp(tms7000_state *cpustate)
static void sub_ba(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t = RDA - RDB;
WRA(t);
@@ -3290,8 +3290,8 @@ static void sub_ba(tms7000_state *cpustate)
static void sub_ra(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
t = RDA - RM(r);
@@ -3307,8 +3307,8 @@ static void sub_ra(tms7000_state *cpustate)
static void sub_rb(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r;
+ UINT16 t;
+ UINT8 r;
IMMBYTE(r);
t = RDB - RM(r);
@@ -3324,8 +3324,8 @@ static void sub_rb(tms7000_state *cpustate)
static void sub_rr(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r,s;
+ UINT16 t;
+ UINT8 r,s;
IMMBYTE(s);
IMMBYTE(r);
@@ -3342,8 +3342,8 @@ static void sub_rr(tms7000_state *cpustate)
static void sub_ia(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i;
+ UINT16 t;
+ UINT8 i;
IMMBYTE(i);
t = RDA - i;
@@ -3359,8 +3359,8 @@ static void sub_ia(tms7000_state *cpustate)
static void sub_ib(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 i;
+ UINT16 t;
+ UINT8 i;
IMMBYTE(i);
t = RDB - i;
@@ -3376,8 +3376,8 @@ static void sub_ib(tms7000_state *cpustate)
static void sub_ir(tms7000_state *cpustate)
{
- UINT16 t;
- UINT8 r,i;
+ UINT16 t;
+ UINT8 r,i;
IMMBYTE(i);
IMMBYTE(r);
@@ -3562,8 +3562,8 @@ static void trap_23(tms7000_state *cpustate)
static void swap_a(tms7000_state *cpustate)
{
- UINT8 a,b;
- UINT16 t;
+ UINT8 a,b;
+ UINT16 t;
a = b = RDA;
@@ -3584,8 +3584,8 @@ static void swap_a(tms7000_state *cpustate)
static void swap_b(tms7000_state *cpustate)
{
- UINT8 a,b;
- UINT16 t;
+ UINT8 a,b;
+ UINT16 t;
a = b = RDB;
@@ -3606,8 +3606,8 @@ static void swap_b(tms7000_state *cpustate)
static void swap_r(tms7000_state *cpustate)
{
- UINT8 a,b,r;
- UINT16 t;
+ UINT8 a,b,r;
+ UINT16 t;
IMMBYTE(r);
a = b = RM(r);
@@ -3629,13 +3629,13 @@ static void swap_r(tms7000_state *cpustate)
static void swap_r_exl(tms7000_state *cpustate)
{
- UINT8 a,b,r;
- UINT16 t;
+ UINT8 a,b,r;
+ UINT16 t;
IMMBYTE(r);
if (r == 0)
- { /* opcode D7 00 (LVDP) mostly equivalent to MOVP P46,A??? (timings must
+ { /* opcode D7 00 (LVDP) mostly equivalent to MOVP P46,A??? (timings must
be different, possibly the microcode polls the state of the VDP RDY
line prior to doing the transfer) */
t=RM(0x012e);
@@ -3645,10 +3645,10 @@ static void swap_r_exl(tms7000_state *cpustate)
SET_N8(t);
SET_Z8(t);
- cpustate->icount -= 9; /* ?????? */
+ cpustate->icount -= 9; /* ?????? */
}
else
- { /* stright swap Rn instruction */
+ { /* stright swap Rn instruction */
a = b = RM(r);
a <<= 4;
@@ -3669,7 +3669,7 @@ static void swap_r_exl(tms7000_state *cpustate)
static void tstb(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
t=RDB;
@@ -3682,7 +3682,7 @@ static void tstb(tms7000_state *cpustate)
static void xchb_a(tms7000_state *cpustate)
{
- UINT16 t,u;
+ UINT16 t,u;
t = RDB;
u = RDA;
@@ -3699,7 +3699,7 @@ static void xchb_a(tms7000_state *cpustate)
static void xchb_b(tms7000_state *cpustate)
{
- UINT16 t;
+ UINT16 t;
/* UINT16 u; */
t = RDB;
@@ -3717,8 +3717,8 @@ static void xchb_b(tms7000_state *cpustate)
static void xchb_r(tms7000_state *cpustate)
{
- UINT16 t,u;
- UINT8 r;
+ UINT16 t,u;
+ UINT8 r;
IMMBYTE(r);
@@ -3737,7 +3737,7 @@ static void xchb_r(tms7000_state *cpustate)
static void xor_b2a(tms7000_state *cpustate)
{
- UINT8 t;
+ UINT8 t;
t = RDA ^ RDB;
WRA(t);
@@ -3751,8 +3751,8 @@ static void xor_b2a(tms7000_state *cpustate)
static void xor_r2a(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -3768,8 +3768,8 @@ static void xor_r2a(tms7000_state *cpustate)
static void xor_r2b(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -3785,8 +3785,8 @@ static void xor_r2b(tms7000_state *cpustate)
static void xor_r2r(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,j;
+ UINT8 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -3803,8 +3803,8 @@ static void xor_r2r(tms7000_state *cpustate)
static void xor_i2a(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -3820,8 +3820,8 @@ static void xor_i2a(tms7000_state *cpustate)
static void xor_i2b(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
@@ -3837,8 +3837,8 @@ static void xor_i2b(tms7000_state *cpustate)
static void xor_i2r(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,j;
+ UINT8 t;
+ UINT8 i,j;
IMMBYTE(i);
IMMBYTE(j);
@@ -3855,8 +3855,8 @@ static void xor_i2r(tms7000_state *cpustate)
static void xorp_a2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
t = RDA ^ RM( 0x0100 + v);
@@ -3871,8 +3871,8 @@ static void xorp_a2p(tms7000_state *cpustate)
static void xorp_b2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 v;
+ UINT8 t;
+ UINT8 v;
IMMBYTE(v);
t = RDB ^ RM( 0x0100 + v);
@@ -3887,8 +3887,8 @@ static void xorp_b2p(tms7000_state *cpustate)
static void xorp_i2p(tms7000_state *cpustate)
{
- UINT8 t;
- UINT8 i,v;
+ UINT8 t;
+ UINT8 i,v;
IMMBYTE(i);
IMMBYTE(v);
diff --git a/src/emu/cpu/tms7000/tms70tb.c b/src/emu/cpu/tms7000/tms70tb.c
index b82bfadf54f..a5893c6faf8 100644
--- a/src/emu/cpu/tms7000/tms70tb.c
+++ b/src/emu/cpu/tms7000/tms70tb.c
@@ -22,52 +22,52 @@ static void (*const opfn[0x100])(tms7000_state *cpustate) = {
0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
/* 0x0X */ nop, idle, illegal, illegal, illegal, eint, dint, setc,
- pop_st, stsp, rets, reti, illegal, ldsp, push_st, illegal,
+ pop_st, stsp, rets, reti, illegal, ldsp, push_st, illegal,
/* 0x1X */ illegal, illegal, mov_r2a, and_r2a, or_r2a, xor_r2a, btjo_r2a,btjz_r2a,
- add_r2a, adc_r2a, sub_ra, sbb_ra, mpy_ra, cmp_ra, dac_r2a, dsb_r2a,
+ add_r2a, adc_r2a, sub_ra, sbb_ra, mpy_ra, cmp_ra, dac_r2a, dsb_r2a,
/* 0x2X */ illegal, illegal, mov_i2a, and_i2a, or_i2a, xor_i2a, btjo_i2a,btjz_i2a,
- add_i2a, adc_i2a, sub_ia, sbb_ia, mpy_ia, cmp_ia, dac_i2a, dsb_i2a,
+ add_i2a, adc_i2a, sub_ia, sbb_ia, mpy_ia, cmp_ia, dac_i2a, dsb_i2a,
/* 0x3X */ illegal, illegal, mov_r2b, and_r2b, or_r2b, xor_r2b, btjo_r2b,btjz_r2b,
- add_r2b, adc_r2b, sub_rb, sbb_rb, mpy_rb, cmp_rb, dac_r2b, dsb_r2b,
+ add_r2b, adc_r2b, sub_rb, sbb_rb, mpy_rb, cmp_rb, dac_r2b, dsb_r2b,
/* 0x4X */ illegal, illegal, mov_r2r, and_r2r, or_r2r, xor_r2r, btjo_r2r,btjz_r2r,
- add_r2r, adc_r2r, sub_rr, sbb_rr, mpy_rr, cmp_rr, dac_r2r, dsb_r2r,
+ add_r2r, adc_r2r, sub_rr, sbb_rr, mpy_rr, cmp_rr, dac_r2r, dsb_r2r,
/* 0x5X */ illegal, illegal, mov_i2b, and_i2b, or_i2b, xor_i2b, btjo_i2b,btjz_i2b,
- add_i2b, adc_i2b, sub_ib, sbb_ib, mpy_ib, cmp_ib, dac_i2b, dsb_i2b,
+ add_i2b, adc_i2b, sub_ib, sbb_ib, mpy_ib, cmp_ib, dac_i2b, dsb_i2b,
/* 0x6X */ illegal, illegal, mov_b2a, and_b2a, or_b2a, xor_b2a, btjo_b2a,btjz_b2a,
- add_b2a, adc_b2a, sub_ba, sbb_ba, mpy_ba, cmp_ba, dac_b2a, dsb_b2a,
+ add_b2a, adc_b2a, sub_ba, sbb_ba, mpy_ba, cmp_ba, dac_b2a, dsb_b2a,
/* 0x7X */ illegal, illegal, mov_i2r, and_i2r, or_i2r, xor_i2r, btjo_i2r,btjz_i2r,
- add_i2r, adc_i2r, sub_ir, sbb_ir, mpy_ir, cmp_ir, dac_i2r, dsb_i2r,
+ add_i2r, adc_i2r, sub_ir, sbb_ir, mpy_ir, cmp_ir, dac_i2r, dsb_i2r,
/* 0x8X */ movp_p2a,illegal, movp_a2p,andp_a2p,orp_a2p, xorp_a2p,btjop_ap,btjzp_ap,
- movd_imm,illegal, lda_dir, sta_dir, br_dir, cmpa_dir,call_dir,illegal,
+ movd_imm,illegal, lda_dir, sta_dir, br_dir, cmpa_dir,call_dir,illegal,
/* 0x9X */ illegal, movp_p2b,movp_b2p,andp_b2p,orp_b2p, xorp_b2p,btjop_bp,btjzp_bp,
- movd_r, illegal, lda_ind, sta_ind, br_ind, cmpa_ind,call_ind,illegal,
+ movd_r, illegal, lda_ind, sta_ind, br_ind, cmpa_ind,call_ind,illegal,
/* 0xAX */ illegal, illegal, movp_i2p,andp_i2p,orp_i2p, xorp_i2p,btjop_ip,btjzp_ip,
- movd_inx,illegal, lda_inx, sta_inx, br_inx, cmpa_inx,call_inx,illegal,
+ movd_inx,illegal, lda_inx, sta_inx, br_inx, cmpa_inx,call_inx,illegal,
/* 0xBX */ clrc, illegal, dec_a, inc_a, inv_a, clr_a, xchb_a, swap_a,
- push_a, pop_a, djnz_a, decd_a, rr_a, rrc_a, rl_a, rlc_a,
+ push_a, pop_a, djnz_a, decd_a, rr_a, rrc_a, rl_a, rlc_a,
/* 0xCX */ mov_a2b, tstb, dec_b, inc_b, inv_b, clr_b, xchb_b, swap_b,
- push_b, pop_b, djnz_b, decd_b, rr_b, rrc_b, rl_b, rlc_b,
+ push_b, pop_b, djnz_b, decd_b, rr_b, rrc_b, rl_b, rlc_b,
/* 0xDX */ mov_a2r, mov_b2r, dec_r, inc_r, inv_r, clr_r, xchb_r, swap_r,
- push_r, pop_r, djnz_r, decd_r, rr_r, rrc_r, rl_r, rlc_r,
+ push_r, pop_r, djnz_r, decd_r, rr_r, rrc_r, rl_r, rlc_r,
/* 0xEX */ jmp, j_jn, jeq, jc, jp, jpz, jne, jl,
- trap_23, trap_22, trap_21, trap_20, trap_19, trap_18, trap_17, trap_16,
+ trap_23, trap_22, trap_21, trap_20, trap_19, trap_18, trap_17, trap_16,
/* 0xFX */ trap_15, trap_14, trap_13, trap_12, trap_11, trap_10, trap_9, trap_8,
- trap_7, trap_6, trap_5, trap_4, trap_3, trap_2, trap_1, trap_0
+ trap_7, trap_6, trap_5, trap_4, trap_3, trap_2, trap_1, trap_0
};
static void (*const opfn_exl[0x100])(tms7000_state *cpustate) = {
@@ -75,50 +75,50 @@ static void (*const opfn_exl[0x100])(tms7000_state *cpustate) = {
0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
/* 0x0X */ nop, idle, illegal, illegal, illegal, eint, dint, setc,
- pop_st, stsp, rets, reti, illegal, ldsp, push_st, illegal,
+ pop_st, stsp, rets, reti, illegal, ldsp, push_st, illegal,
/* 0x1X */ illegal, illegal, mov_r2a, and_r2a, or_r2a, xor_r2a, btjo_r2a,btjz_r2a,
- add_r2a, adc_r2a, sub_ra, sbb_ra, mpy_ra, cmp_ra, dac_r2a, dsb_r2a,
+ add_r2a, adc_r2a, sub_ra, sbb_ra, mpy_ra, cmp_ra, dac_r2a, dsb_r2a,
/* 0x2X */ illegal, illegal, mov_i2a, and_i2a, or_i2a, xor_i2a, btjo_i2a,btjz_i2a,
- add_i2a, adc_i2a, sub_ia, sbb_ia, mpy_ia, cmp_ia, dac_i2a, dsb_i2a,
+ add_i2a, adc_i2a, sub_ia, sbb_ia, mpy_ia, cmp_ia, dac_i2a, dsb_i2a,
/* 0x3X */ illegal, illegal, mov_r2b, and_r2b, or_r2b, xor_r2b, btjo_r2b,btjz_r2b,
- add_r2b, adc_r2b, sub_rb, sbb_rb, mpy_rb, cmp_rb, dac_r2b, dsb_r2b,
+ add_r2b, adc_r2b, sub_rb, sbb_rb, mpy_rb, cmp_rb, dac_r2b, dsb_r2b,
/* 0x4X */ illegal, illegal, mov_r2r, and_r2r, or_r2r, xor_r2r, btjo_r2r,btjz_r2r,
- add_r2r, adc_r2r, sub_rr, sbb_rr, mpy_rr, cmp_rr, dac_r2r, dsb_r2r,
+ add_r2r, adc_r2r, sub_rr, sbb_rr, mpy_rr, cmp_rr, dac_r2r, dsb_r2r,
/* 0x5X */ illegal, illegal, mov_i2b, and_i2b, or_i2b, xor_i2b, btjo_i2b,btjz_i2b,
- add_i2b, adc_i2b, sub_ib, sbb_ib, mpy_ib, cmp_ib, dac_i2b, dsb_i2b,
+ add_i2b, adc_i2b, sub_ib, sbb_ib, mpy_ib, cmp_ib, dac_i2b, dsb_i2b,
/* 0x6X */ illegal, illegal, mov_b2a, and_b2a, or_b2a, xor_b2a, btjo_b2a,btjz_b2a,
- add_b2a, adc_b2a, sub_ba, sbb_ba, mpy_ba, cmp_ba, dac_b2a, dsb_b2a,
+ add_b2a, adc_b2a, sub_ba, sbb_ba, mpy_ba, cmp_ba, dac_b2a, dsb_b2a,
/* 0x7X */ illegal, illegal, mov_i2r, and_i2r, or_i2r, xor_i2r, btjo_i2r,btjz_i2r,
- add_i2r, adc_i2r, sub_ir, sbb_ir, mpy_ir, cmp_ir, dac_i2r, dsb_i2r,
+ add_i2r, adc_i2r, sub_ir, sbb_ir, mpy_ir, cmp_ir, dac_i2r, dsb_i2r,
/* 0x8X */ movp_p2a,illegal, movp_a2p,andp_a2p,orp_a2p, xorp_a2p,btjop_ap,btjzp_ap,
- movd_imm,illegal, lda_dir, sta_dir, br_dir, cmpa_dir,call_dir,illegal,
+ movd_imm,illegal, lda_dir, sta_dir, br_dir, cmpa_dir,call_dir,illegal,
/* 0x9X */ illegal, movp_p2b,movp_b2p,andp_b2p,orp_b2p, xorp_b2p,btjop_bp,btjzp_bp,
- movd_r, illegal, lda_ind, sta_ind, br_ind, cmpa_ind,call_ind,illegal,
+ movd_r, illegal, lda_ind, sta_ind, br_ind, cmpa_ind,call_ind,illegal,
/* 0xAX */ illegal, illegal, movp_i2p,andp_i2p,orp_i2p, xorp_i2p,btjop_ip,btjzp_ip,
- movd_inx,illegal, lda_inx, sta_inx, br_inx, cmpa_inx,call_inx,illegal,
+ movd_inx,illegal, lda_inx, sta_inx, br_inx, cmpa_inx,call_inx,illegal,
/* 0xBX */ clrc, illegal, dec_a, inc_a, inv_a, clr_a, xchb_a, swap_a,
- push_a, pop_a, djnz_a, decd_a, rr_a, rrc_a, rl_a, rlc_a,
+ push_a, pop_a, djnz_a, decd_a, rr_a, rrc_a, rl_a, rlc_a,
/* 0xCX */ mov_a2b, tstb, dec_b, inc_b, inv_b, clr_b, xchb_b, swap_b,
- push_b, pop_b, djnz_b, decd_b, rr_b, rrc_b, rl_b, rlc_b,
+ push_b, pop_b, djnz_b, decd_b, rr_b, rrc_b, rl_b, rlc_b,
/* 0xDX */ mov_a2r, mov_b2r, dec_r, inc_r, inv_r, clr_r, xchb_r, swap_r_exl,
- push_r, pop_r, djnz_r, decd_r, rr_r, rrc_r, rl_r, rlc_r,
+ push_r, pop_r, djnz_r, decd_r, rr_r, rrc_r, rl_r, rlc_r,
/* 0xEX */ jmp, j_jn, jeq, jc, jp, jpz, jne, jl,
- trap_23, trap_22, trap_21, trap_20, trap_19, trap_18, trap_17, trap_16,
+ trap_23, trap_22, trap_21, trap_20, trap_19, trap_18, trap_17, trap_16,
/* 0xFX */ trap_15, trap_14, trap_13, trap_12, trap_11, trap_10, trap_9, trap_8,
- trap_7, trap_6, trap_5, trap_4, trap_3, trap_2, trap_1, trap_0
+ trap_7, trap_6, trap_5, trap_4, trap_3, trap_2, trap_1, trap_0
};
diff --git a/src/emu/cpu/tms9900/9900dasm.c b/src/emu/cpu/tms9900/9900dasm.c
index 19fd5f5e6d7..dce72691888 100644
--- a/src/emu/cpu/tms9900/9900dasm.c
+++ b/src/emu/cpu/tms9900/9900dasm.c
@@ -24,35 +24,35 @@
#include "debugger.h"
#include "tms9900.h"
-#define MASK 0x0000ffff
-#define BITS(val,n1,n2) ((val>>(15-(n2))) & (MASK>>(15-((n2)-(n1)))))
+#define MASK 0x0000ffff
+#define BITS(val,n1,n2) ((val>>(15-(n2))) & (MASK>>(15-((n2)-(n1)))))
enum format_t
{
- format_1, /* 2 address instructions */
- format_2a, /* jump instructions */
- format_2b, /* bit I/O instructions */
- format_3_9, /* logical, multiply, and divide instructions */
- format_4, /* CRU instructions */
- format_5, /* register shift instructions */
- format_6, /* single address instructions */
- format_7, /* instructions without operands */
- format_8a, /* immediate instructions (destination register) */
- format_8b, /* immediate instructions (no destination register) */
- format_9, /* extended operation instruction */
- format_10, /* memory map file instruction */
- format_11, /* multiple precision instructions */
- format_12, /* string instructions */
- format_13, /* multiple precision shift instructions */
- format_14, /* bit testing instructions */
- format_15, /* invert order of field instruction */
- format_16, /* field instructions */
- format_17, /* alter register and jump instructions */
- format_18, /* single register operand instructions */
+ format_1, /* 2 address instructions */
+ format_2a, /* jump instructions */
+ format_2b, /* bit I/O instructions */
+ format_3_9, /* logical, multiply, and divide instructions */
+ format_4, /* CRU instructions */
+ format_5, /* register shift instructions */
+ format_6, /* single address instructions */
+ format_7, /* instructions without operands */
+ format_8a, /* immediate instructions (destination register) */
+ format_8b, /* immediate instructions (no destination register) */
+ format_9, /* extended operation instruction */
+ format_10, /* memory map file instruction */
+ format_11, /* multiple precision instructions */
+ format_12, /* string instructions */
+ format_13, /* multiple precision shift instructions */
+ format_14, /* bit testing instructions */
+ format_15, /* invert order of field instruction */
+ format_16, /* field instructions */
+ format_17, /* alter register and jump instructions */
+ format_18, /* single register operand instructions */
format_liim,/* format for liim (looks like format 18) */
- format_19, /* move address instruction */
- format_20, /* list search instructions */
- format_21, /* extend precision instruction */
+ format_19, /* move address instruction */
+ format_20, /* list search instructions */
+ format_21, /* extend precision instruction */
illegal
};
@@ -61,16 +61,16 @@ enum format_t
enum
{
/* processor set on which opcodes are available */
- ps_any = 0x01, /* every processor in the tms9900/ti990 family */
- ps_mapper = 0x02, /* processors with memory mapper (ti990/10, ti990/12,
+ ps_any = 0x01, /* every processor in the tms9900/ti990 family */
+ ps_mapper = 0x02, /* processors with memory mapper (ti990/10, ti990/12,
and tms99000 with mapper coprocessor) */
- ps_tms9995 = 0x04, /* ti990/12, tms9995, and later */
- ps_tms99000 = 0x08, /* ti990/12, tms99000, and later */
- ps_ti990_12 = 0x10, /* ti990/12 only */
+ ps_tms9995 = 0x04, /* ti990/12, tms9995, and later */
+ ps_tms99000 = 0x08, /* ti990/12, tms99000, and later */
+ ps_ti990_12 = 0x10, /* ti990/12 only */
/* additional flags for special decoding */
- sd_11 = 0x100, /* bit 11 should be cleared in li, ai, andi, ori, ci, stwp, stst */
- sd_11_15 = 0x200 /* bits 11-15 should be cleared in lwpi, limi, idle, rset, rtwp, ckon, ckof, lrex */
+ sd_11 = 0x100, /* bit 11 should be cleared in li, ai, andi, ori, ci, stwp, stst */
+ sd_11_15 = 0x200 /* bits 11-15 should be cleared in lwpi, limi, idle, rset, rtwp, ckon, ckof, lrex */
};
struct description_t
@@ -83,35 +83,35 @@ struct description_t
enum opcodes {
/* basic instruction set */
- _a=0, _ab, _c, _cb, _s, _sb, _soc, _socb, _szc, _szcb,
- _mov, _movb, _coc, _czc, _xor, _mpy, _div, _xop, _b, _bl,
- _blwp, _clr, _seto, _inv, _neg, _abs, _swpb, _inc, _inct, _dec,
- _dect, _x, _ldcr, _stcr, _sbo, _sbz, _tb, _jeq, _jgt, _jh,
- _jhe, _jl, _jle, _jlt, _jmp, _jnc, _jne, _jno, _joc, _jop,
- _sla, _sra, _src, _srl, _ai, _andi, _ci, _li, _ori, _lwpi,
- _limi, _stst, _stwp, _rtwp, _idle, _rset, _ckof, _ckon, _lrex,
+ _a=0, _ab, _c, _cb, _s, _sb, _soc, _socb, _szc, _szcb,
+ _mov, _movb, _coc, _czc, _xor, _mpy, _div, _xop, _b, _bl,
+ _blwp, _clr, _seto, _inv, _neg, _abs, _swpb, _inc, _inct, _dec,
+ _dect, _x, _ldcr, _stcr, _sbo, _sbz, _tb, _jeq, _jgt, _jh,
+ _jhe, _jl, _jle, _jlt, _jmp, _jnc, _jne, _jno, _joc, _jop,
+ _sla, _sra, _src, _srl, _ai, _andi, _ci, _li, _ori, _lwpi,
+ _limi, _stst, _stwp, _rtwp, _idle, _rset, _ckof, _ckon, _lrex,
/* mapper instruction set */
- _lds, _ldd, _lmf,
+ _lds, _ldd, _lmf,
/* tms9995 instruction set */
- _divs, _mpys, _lst, _lwp,
+ _divs, _mpys, _lst, _lwp,
/* tms99000 instruction set */
_bind,
/* ti990/12 instruction set */
- _sram, _slam, _rto, _lto, _cnto, _slsl, _slsp, _bdc, _dbc, _swpm,
- _xorm, _orm, _andm, _sm, _am, _mova, _emd, _eint, _dint, _stpc,
- _cs, _seqb, _movs, _lim, _lcs, _blsk, _mvsr, _mvsk, _pops, _pshs,
+ _sram, _slam, _rto, _lto, _cnto, _slsl, _slsp, _bdc, _dbc, _swpm,
+ _xorm, _orm, _andm, _sm, _am, _mova, _emd, _eint, _dint, _stpc,
+ _cs, _seqb, _movs, _lim, _lcs, _blsk, _mvsr, _mvsk, _pops, _pshs,
- _cri, _cdi, _negr, _negd, _cre, _cde, _cer, _ced, _nrm, _tmb,
- _tcmb, _tsmb, _srj, _arj, _xit, _insf, _xv, _xf, _ar, _cir,
- _sr, _mr, _dr, _lr, _str, _iof, _sneb, _crc, _ts, _ad,
- _cid, _sd, _md, _dd, _ld, _std, _ep,
+ _cri, _cdi, _negr, _negd, _cre, _cde, _cer, _ced, _nrm, _tmb,
+ _tcmb, _tsmb, _srj, _arj, _xit, _insf, _xv, _xf, _ar, _cir,
+ _sr, _mr, _dr, _lr, _str, _iof, _sneb, _crc, _ts, _ad,
+ _cid, _sd, _md, _dd, _ld, _std, _ep,
/* tms9940-only instruction set */
- _liim, _dca, _dcs,
+ _liim, _dca, _dcs,
_ill
};
@@ -120,191 +120,191 @@ enum opcodes {
static const description_t descriptions[144+3+1] =
{
/* basic instruction set */
- { "a", format_1, ps_any }, { "ab", format_1, ps_any },
- { "c", format_1, ps_any }, { "cb", format_1, ps_any },
- { "s", format_1, ps_any }, { "sb", format_1, ps_any },
- { "soc", format_1, ps_any }, { "socb", format_1, ps_any },
- { "szc", format_1, ps_any }, { "szcb", format_1, ps_any },
- { "mov", format_1, ps_any }, { "movb", format_1, ps_any },
- { "coc", format_3_9, ps_any }, { "czc", format_3_9, ps_any },
- { "xor", format_3_9, ps_any }, { "mpy", format_3_9, ps_any },
- { "div", format_3_9, ps_any }, { "xop", format_9, ps_any },
- { "b", format_6, ps_any }, { "bl", format_6, ps_any },
- { "blwp", format_6, ps_any }, { "clr", format_6, ps_any },
- { "seto", format_6, ps_any }, { "inv", format_6, ps_any },
- { "neg", format_6, ps_any }, { "abs", format_6, ps_any },
- { "swpb", format_6, ps_any }, { "inc", format_6, ps_any },
- { "inct", format_6, ps_any }, { "dec", format_6, ps_any },
- { "dect", format_6, ps_any }, { "x", format_6, ps_any },
- { "ldcr", format_4, ps_any }, { "stcr", format_4, ps_any },
- { "sbo", format_2b, ps_any }, { "sbz", format_2b, ps_any },
- { "tb", format_2b, ps_any }, { "jeq", format_2a, ps_any },
- { "jgt", format_2a, ps_any }, { "jh", format_2a, ps_any },
- { "jhe", format_2a, ps_any }, { "jl", format_2a, ps_any },
- { "jle", format_2a, ps_any }, { "jlt", format_2a, ps_any },
- { "jmp", format_2a, ps_any }, { "jnc", format_2a, ps_any },
- { "jne", format_2a, ps_any }, { "jno", format_2a, ps_any },
- { "joc", format_2a, ps_any }, { "jop", format_2a, ps_any },
- { "sla", format_5, ps_any }, { "sra", format_5, ps_any },
- { "src", format_5, ps_any }, { "srl", format_5, ps_any },
- { "ai", format_8a, ps_any|sd_11 }, { "andi", format_8a, ps_any|sd_11 },
- { "ci", format_8a, ps_any|sd_11 }, { "li", format_8a, ps_any|sd_11 },
- { "ori", format_8a, ps_any|sd_11 }, { "lwpi", format_8b, ps_any|sd_11|sd_11_15 },
- { "limi", format_8b, ps_any|sd_11|sd_11_15 }, { "stst", format_18, ps_any|sd_11 },
- { "stwp", format_18, ps_any|sd_11 }, { "rtwp", format_7, ps_any|sd_11|sd_11_15 },
- { "idle", format_7, ps_any|sd_11|sd_11_15 }, { "rset", format_7, ps_any|sd_11|sd_11_15 },
- { "ckof", format_7, ps_any|sd_11|sd_11_15 }, { "ckon", format_7, ps_any|sd_11|sd_11_15 },
- { "lrex", format_7, ps_any|sd_11|sd_11_15 },
+ { "a", format_1, ps_any }, { "ab", format_1, ps_any },
+ { "c", format_1, ps_any }, { "cb", format_1, ps_any },
+ { "s", format_1, ps_any }, { "sb", format_1, ps_any },
+ { "soc", format_1, ps_any }, { "socb", format_1, ps_any },
+ { "szc", format_1, ps_any }, { "szcb", format_1, ps_any },
+ { "mov", format_1, ps_any }, { "movb", format_1, ps_any },
+ { "coc", format_3_9, ps_any }, { "czc", format_3_9, ps_any },
+ { "xor", format_3_9, ps_any }, { "mpy", format_3_9, ps_any },
+ { "div", format_3_9, ps_any }, { "xop", format_9, ps_any },
+ { "b", format_6, ps_any }, { "bl", format_6, ps_any },
+ { "blwp", format_6, ps_any }, { "clr", format_6, ps_any },
+ { "seto", format_6, ps_any }, { "inv", format_6, ps_any },
+ { "neg", format_6, ps_any }, { "abs", format_6, ps_any },
+ { "swpb", format_6, ps_any }, { "inc", format_6, ps_any },
+ { "inct", format_6, ps_any }, { "dec", format_6, ps_any },
+ { "dect", format_6, ps_any }, { "x", format_6, ps_any },
+ { "ldcr", format_4, ps_any }, { "stcr", format_4, ps_any },
+ { "sbo", format_2b, ps_any }, { "sbz", format_2b, ps_any },
+ { "tb", format_2b, ps_any }, { "jeq", format_2a, ps_any },
+ { "jgt", format_2a, ps_any }, { "jh", format_2a, ps_any },
+ { "jhe", format_2a, ps_any }, { "jl", format_2a, ps_any },
+ { "jle", format_2a, ps_any }, { "jlt", format_2a, ps_any },
+ { "jmp", format_2a, ps_any }, { "jnc", format_2a, ps_any },
+ { "jne", format_2a, ps_any }, { "jno", format_2a, ps_any },
+ { "joc", format_2a, ps_any }, { "jop", format_2a, ps_any },
+ { "sla", format_5, ps_any }, { "sra", format_5, ps_any },
+ { "src", format_5, ps_any }, { "srl", format_5, ps_any },
+ { "ai", format_8a, ps_any|sd_11 }, { "andi", format_8a, ps_any|sd_11 },
+ { "ci", format_8a, ps_any|sd_11 }, { "li", format_8a, ps_any|sd_11 },
+ { "ori", format_8a, ps_any|sd_11 }, { "lwpi", format_8b, ps_any|sd_11|sd_11_15 },
+ { "limi", format_8b, ps_any|sd_11|sd_11_15 }, { "stst", format_18, ps_any|sd_11 },
+ { "stwp", format_18, ps_any|sd_11 }, { "rtwp", format_7, ps_any|sd_11|sd_11_15 },
+ { "idle", format_7, ps_any|sd_11|sd_11_15 }, { "rset", format_7, ps_any|sd_11|sd_11_15 },
+ { "ckof", format_7, ps_any|sd_11|sd_11_15 }, { "ckon", format_7, ps_any|sd_11|sd_11_15 },
+ { "lrex", format_7, ps_any|sd_11|sd_11_15 },
/* mapper instruction set */
- { "lds", format_6, ps_mapper }, { "ldd", format_6, ps_mapper },
- { "lmf", format_10, ps_mapper },
+ { "lds", format_6, ps_mapper }, { "ldd", format_6, ps_mapper },
+ { "lmf", format_10, ps_mapper },
/* tms9995 instruction set */
- { "divs", format_6, ps_tms9995 }, { "mpys", format_6, ps_tms9995 },
- { "lst", format_18, ps_tms9995 }, { "lwp", format_18, ps_tms9995 },
+ { "divs", format_6, ps_tms9995 }, { "mpys", format_6, ps_tms9995 },
+ { "lst", format_18, ps_tms9995 }, { "lwp", format_18, ps_tms9995 },
/* tms99000 instruction set */
- { "bind", format_6, ps_tms99000 },
+ { "bind", format_6, ps_tms99000 },
/* ti990/12 instruction set */
- { "sram", format_13, ps_ti990_12 }, { "slam", format_13, ps_ti990_12 },
- { "rto", format_11, ps_ti990_12 }, { "lto", format_11, ps_ti990_12 },
- { "cnto", format_11, ps_ti990_12 }, { "slsl", format_20, ps_ti990_12 },
- { "slsp", format_20, ps_ti990_12 }, { "bdc", format_11, ps_ti990_12 },
- { "dbc", format_11, ps_ti990_12 }, { "swpm", format_11, ps_ti990_12 },
- { "xorm", format_11, ps_ti990_12 }, { "orm", format_11, ps_ti990_12 },
- { "andm", format_11, ps_ti990_12 }, { "sm", format_11, ps_ti990_12 },
- { "am", format_11, ps_ti990_12 }, { "mova", format_19, ps_ti990_12 },
- { "emd", format_7, ps_ti990_12 }, { "eint", format_7, ps_ti990_12 },
- { "dint", format_7, ps_ti990_12 }, { "stpc", format_18, ps_ti990_12 },
- { "cs", format_12, ps_ti990_12 }, { "seqb", format_12, ps_ti990_12 },
- { "movs", format_12, ps_ti990_12 }, { "lim", format_18, ps_ti990_12 },
- { "lcs", format_18, ps_ti990_12 }, { "blsk", format_8a, ps_ti990_12 },
- { "mvsr", format_12, ps_ti990_12 }, { "mvsk", format_12, ps_ti990_12 },
- { "pops", format_12, ps_ti990_12 }, { "pshs", format_12, ps_ti990_12 },
- { "cri", format_7, ps_ti990_12 }, { "cdi", format_7, ps_ti990_12 },
- { "negr", format_7, ps_ti990_12 }, { "negd", format_7, ps_ti990_12 },
- { "cre", format_7, ps_ti990_12 }, { "cde", format_7, ps_ti990_12 },
- { "cer", format_7, ps_ti990_12 }, { "ced", format_7, ps_ti990_12 },
- { "nrm", format_11, ps_ti990_12 }, { "tmb", format_14, ps_ti990_12 },
- { "tcmb", format_14, ps_ti990_12 }, { "tsmb", format_14, ps_ti990_12 },
- { "srj", format_17, ps_ti990_12 }, { "arj", format_17, ps_ti990_12 },
- { "xit", format_7, ps_ti990_12 }, { "insf", format_16, ps_ti990_12 },
- { "xv", format_16, ps_ti990_12 }, { "xf", format_16, ps_ti990_12 },
- { "ar", format_6, ps_ti990_12 }, { "cir", format_6, ps_ti990_12 },
- { "sr", format_6, ps_ti990_12 }, { "mr", format_6, ps_ti990_12 },
- { "dr", format_6, ps_ti990_12 }, { "lr", format_6, ps_ti990_12 },
- { "str", format_6, ps_ti990_12 }, { "iof", format_15, ps_ti990_12 },
- { "sneb", format_12, ps_ti990_12 }, { "crc", format_12, ps_ti990_12 },
- { "ts", format_12, ps_ti990_12 }, { "ad", format_6, ps_ti990_12 },
- { "cid", format_6, ps_ti990_12 }, { "sd", format_6, ps_ti990_12 },
- { "md", format_6, ps_ti990_12 }, { "dd", format_6, ps_ti990_12 },
- { "ld", format_6, ps_ti990_12 }, { "std", format_6, ps_ti990_12 },
- { "ep", format_21, ps_ti990_12 },
+ { "sram", format_13, ps_ti990_12 }, { "slam", format_13, ps_ti990_12 },
+ { "rto", format_11, ps_ti990_12 }, { "lto", format_11, ps_ti990_12 },
+ { "cnto", format_11, ps_ti990_12 }, { "slsl", format_20, ps_ti990_12 },
+ { "slsp", format_20, ps_ti990_12 }, { "bdc", format_11, ps_ti990_12 },
+ { "dbc", format_11, ps_ti990_12 }, { "swpm", format_11, ps_ti990_12 },
+ { "xorm", format_11, ps_ti990_12 }, { "orm", format_11, ps_ti990_12 },
+ { "andm", format_11, ps_ti990_12 }, { "sm", format_11, ps_ti990_12 },
+ { "am", format_11, ps_ti990_12 }, { "mova", format_19, ps_ti990_12 },
+ { "emd", format_7, ps_ti990_12 }, { "eint", format_7, ps_ti990_12 },
+ { "dint", format_7, ps_ti990_12 }, { "stpc", format_18, ps_ti990_12 },
+ { "cs", format_12, ps_ti990_12 }, { "seqb", format_12, ps_ti990_12 },
+ { "movs", format_12, ps_ti990_12 }, { "lim", format_18, ps_ti990_12 },
+ { "lcs", format_18, ps_ti990_12 }, { "blsk", format_8a, ps_ti990_12 },
+ { "mvsr", format_12, ps_ti990_12 }, { "mvsk", format_12, ps_ti990_12 },
+ { "pops", format_12, ps_ti990_12 }, { "pshs", format_12, ps_ti990_12 },
+ { "cri", format_7, ps_ti990_12 }, { "cdi", format_7, ps_ti990_12 },
+ { "negr", format_7, ps_ti990_12 }, { "negd", format_7, ps_ti990_12 },
+ { "cre", format_7, ps_ti990_12 }, { "cde", format_7, ps_ti990_12 },
+ { "cer", format_7, ps_ti990_12 }, { "ced", format_7, ps_ti990_12 },
+ { "nrm", format_11, ps_ti990_12 }, { "tmb", format_14, ps_ti990_12 },
+ { "tcmb", format_14, ps_ti990_12 }, { "tsmb", format_14, ps_ti990_12 },
+ { "srj", format_17, ps_ti990_12 }, { "arj", format_17, ps_ti990_12 },
+ { "xit", format_7, ps_ti990_12 }, { "insf", format_16, ps_ti990_12 },
+ { "xv", format_16, ps_ti990_12 }, { "xf", format_16, ps_ti990_12 },
+ { "ar", format_6, ps_ti990_12 }, { "cir", format_6, ps_ti990_12 },
+ { "sr", format_6, ps_ti990_12 }, { "mr", format_6, ps_ti990_12 },
+ { "dr", format_6, ps_ti990_12 }, { "lr", format_6, ps_ti990_12 },
+ { "str", format_6, ps_ti990_12 }, { "iof", format_15, ps_ti990_12 },
+ { "sneb", format_12, ps_ti990_12 }, { "crc", format_12, ps_ti990_12 },
+ { "ts", format_12, ps_ti990_12 }, { "ad", format_6, ps_ti990_12 },
+ { "cid", format_6, ps_ti990_12 }, { "sd", format_6, ps_ti990_12 },
+ { "md", format_6, ps_ti990_12 }, { "dd", format_6, ps_ti990_12 },
+ { "ld", format_6, ps_ti990_12 }, { "std", format_6, ps_ti990_12 },
+ { "ep", format_21, ps_ti990_12 },
/* tms9940-only instruction set */
/* these instructions are said to be format 9 (xop), but since the xop
- level is interpreted as part of the opcode, dca and dcs should be handled
- like format 6. liim looks like format 18, but slightly different,
- therefore it is handled like a special format. */
- { "liim", format_liim,/*ps_tms9940*/0 }, { "dca", format_6, /*ps_tms9940*/0 },
- { "dcs", format_6, /*ps_tms9940*/0 },
+ level is interpreted as part of the opcode, dca and dcs should be handled
+ like format 6. liim looks like format 18, but slightly different,
+ therefore it is handled like a special format. */
+ { "liim", format_liim,/*ps_tms9940*/0 }, { "dca", format_6, /*ps_tms9940*/0 },
+ { "dcs", format_6, /*ps_tms9940*/0 },
- { NULL, illegal, ps_any }
+ { NULL, illegal, ps_any }
};
static const enum opcodes ops_4000_ffff_s12[12]=
{
- _szc, _szcb, _s, _sb, /*4000-7000*/
- _c, _cb, _a, _ab, _mov, _movb, _soc, _socb /*8000-f000*/
+ _szc, _szcb, _s, _sb, /*4000-7000*/
+ _c, _cb, _a, _ab, _mov, _movb, _soc, _socb /*8000-f000*/
};
static const enum opcodes ops_2000_3fff_s10[8]=
{
- _coc, _czc, _xor, _xop, _ldcr, _stcr, _mpy, _div /*2000-3800*/
+ _coc, _czc, _xor, _xop, _ldcr, _stcr, _mpy, _div /*2000-3800*/
};
static const enum opcodes ops_1000_1fff_s8[16]=
{
- _jmp, _jlt, _jle, _jeq, _jhe, _jgt, _jne, _jnc, /*1000-1700*/
- _joc, _jno, _jl, _jh, _jop, _sbo, _sbz, _tb /*1800-1f00*/
+ _jmp, _jlt, _jle, _jeq, _jhe, _jgt, _jne, _jnc, /*1000-1700*/
+ _joc, _jno, _jl, _jh, _jop, _sbo, _sbz, _tb /*1800-1f00*/
};
static const enum opcodes ops_0e40_0fff_s6[7]=
{
- _ad, _cid, _sd, _md, _dd, _ld, _std /*0e40-0fc0*/
+ _ad, _cid, _sd, _md, _dd, _ld, _std /*0e40-0fc0*/
};
static const enum opcodes ops_0e00_0e3f_s4[4]=
{
- _iof, _sneb, _crc, _ts /*0e00-0e30*/
+ _iof, _sneb, _crc, _ts /*0e00-0e30*/
};
static const enum opcodes ops_0c40_0dff_s6[7]=
{
- _ar, _cir, _sr, _mr, _dr, _lr, _str /*0c40-0dc0*/
+ _ar, _cir, _sr, _mr, _dr, _lr, _str /*0c40-0dc0*/
};
static const enum opcodes ops_0c10_0c3f_s4[3]=
{
- _insf, _xv, _xf /*0c10-0c30*/
+ _insf, _xv, _xf /*0c10-0c30*/
};
static const enum opcodes ops_0c00_0c0f_s0[16]=
{
- _cri, _cdi, _negr, _negd, _cre, _cde, _cer, _ced, /*0c00-0c07*/
- _nrm, _tmb, _tcmb, _tsmb, _srj, _arj, _xit, _xit /*0c08-0c0f*/
+ _cri, _cdi, _negr, _negd, _cre, _cde, _cer, _ced, /*0c00-0c07*/
+ _nrm, _tmb, _tcmb, _tsmb, _srj, _arj, _xit, _xit /*0c08-0c0f*/
};
static const enum opcodes ops_0800_0bff_s8[4]=
{
- _sra, _srl, _sla, _src /*0800-0b00*/
+ _sra, _srl, _sla, _src /*0800-0b00*/
};
static const enum opcodes ops_0400_07ff_s6[16]=
{
- _blwp, _b, _x, _clr, _neg, _inv, _inc, _inct, /*0400-05c0*/
- _dec, _dect, _bl, _swpb, _seto, _abs, _lds, _ldd /*0600-07c0*/
+ _blwp, _b, _x, _clr, _neg, _inv, _inc, _inct, /*0400-05c0*/
+ _dec, _dect, _bl, _swpb, _seto, _abs, _lds, _ldd /*0600-07c0*/
};
static const enum opcodes ops_0200_03ff_s5[16]=
{
- _li, _ai, _andi, _ori, _ci, _stwp, _stst, _lwpi, /*0200-02e0*/
- _limi, _lmf, _idle, _rset, _rtwp, _ckon, _ckof, _lrex /*0300-03e0*/
+ _li, _ai, _andi, _ori, _ci, _stwp, _stst, _lwpi, /*0200-02e0*/
+ _limi, _lmf, _idle, _rset, _rtwp, _ckon, _ckof, _lrex /*0300-03e0*/
};
static const enum opcodes ops_0100_01ff_s6[4]=
{
- _ill, _bind, _divs, _mpys /*0100-01c0*/
+ _ill, _bind, _divs, _mpys /*0100-01c0*/
};
static const enum opcodes ops_0030_00ff_s4[13]=
{
- _stpc, _cs, _seqb, _movs, _lim, /*0030-0070*/
- _lst, _lwp, _lcs, _blsk, _mvsr, _mvsk, _pops, _pshs /*0080-00f0*/
+ _stpc, _cs, _seqb, _movs, _lim, /*0030-0070*/
+ _lst, _lwp, _lcs, _blsk, _mvsr, _mvsk, _pops, _pshs /*0080-00f0*/
};
static const enum opcodes ops_001c_002f_s0[20]=
{
- _sram, _slam, _rto, _lto, /*001c-001f*/
- _cnto, _slsl, _slsp, _bdc, _dbc, _swpm, _xorm, _orm, /*0020-0027*/
- _andm, _sm, _am, _mova, _ill, _emd, _eint, _dint /*0028-002f*/
+ _sram, _slam, _rto, _lto, /*001c-001f*/
+ _cnto, _slsl, _slsp, _bdc, _dbc, _swpm, _xorm, _orm, /*0020-0027*/
+ _andm, _sm, _am, _mova, _ill, _emd, _eint, _dint /*0028-002f*/
};
@@ -320,22 +320,22 @@ INLINE UINT16 readop_arg(const UINT8 *opram, unsigned pc)
static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigned pc)
{
- int base;
+ int base;
switch (mode)
{
- case 0x0: /* workspace register */
+ case 0x0: /* workspace register */
return sprintf (dest, "R%d", arg);
- case 0x1: /* workspace register indirect */
+ case 0x1: /* workspace register indirect */
return sprintf (dest, "*R%d", arg);
- case 0x2: /* symbolic|indexed */
+ case 0x2: /* symbolic|indexed */
base = readop_arg(opram, pc);
- if (arg) /* indexed */
+ if (arg) /* indexed */
return sprintf (dest, "@>%04x(R%d)", base, arg);
- else /* symbolic (direct) */
+ else /* symbolic (direct) */
return sprintf (dest, "@>%04x", base);
break;
- case 0x3: /* workspace register indirect auto increment */
+ case 0x3: /* workspace register indirect auto increment */
return sprintf (dest, "*R%d+", arg);
}
@@ -348,7 +348,7 @@ static int print_arg (char *dest, int mode, int arg, const UINT8 *opram, unsigne
*****************************************************************************/
unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram)
{
- int OP, OP2, opc;
+ int OP, OP2, opc;
int sarg, darg, smode, dmode;
signed char displacement;
int byte_count, checkpoint;
@@ -360,28 +360,28 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
int flags;
/*
- Under tms9900, opcodes >0400->07FF are incompletely decoded: bits 11 is ignored, and so are
- bits 12-15 for instructions which do not require a register. On the other hand, ti990/10
- generates an illegal instruction error when bit 11 is set, but still ignores bits 12-15.
- Additionally, ti990/12 and tms9995 will generate an illegal error when bits 12-15 are
- non-zero.
- */
+ Under tms9900, opcodes >0400->07FF are incompletely decoded: bits 11 is ignored, and so are
+ bits 12-15 for instructions which do not require a register. On the other hand, ti990/10
+ generates an illegal instruction error when bit 11 is set, but still ignores bits 12-15.
+ Additionally, ti990/12 and tms9995 will generate an illegal error when bits 12-15 are
+ non-zero.
+ */
#define BETTER_0200_DECODING (model_id == TI990_10_ID)
#define COMPLETE_0200_DECODING (/*(model_id == TI990_12_ID) ||*/ (model_id >= TMS9995_ID))
int processor_mask = ps_any;
if ((model_id == TI990_10_ID) /*|| (model_id == TI990_12_ID)*/ || (model_id >= TMS99000_ID))
- processor_mask |= ps_mapper; /* processors with memory mapper (ti990/10, ti990/12,
+ processor_mask |= ps_mapper; /* processors with memory mapper (ti990/10, ti990/12,
and tms99000 with mapper coprocessor) */
if (/*(model_id == TI990_12_ID) ||*/ (model_id >= TMS9995_ID))
- processor_mask |= ps_tms9995; /* ti990/12, tms9995, and later */
+ processor_mask |= ps_tms9995; /* ti990/12, tms9995, and later */
if (/*(model_id == TI990_12_ID) ||*/ (model_id >= TMS99000_ID))
- processor_mask |= ps_tms99000; /* ti990/12, tms99000, and later */
+ processor_mask |= ps_tms99000; /* ti990/12, tms99000, and later */
/*if ((model_id == TI990_12_ID))
- processor_mask |= ps_ti990_12;*/ /* ti990/12, tms99000, and later */
+ processor_mask |= ps_ti990_12;*/ /* ti990/12, tms99000, and later */
PC = pc;
OP = oprom[PC++ - pc] << 8;
@@ -422,7 +422,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
{
opc = _ill;
if (OP >= 0x03f0)
- opc = _ep; /* the ep opcode is located in a "hole" */
+ opc = _ep; /* the ep opcode is located in a "hole" */
}
}
}
@@ -441,7 +441,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
if (! (flags & processor_mask))
{
opc = _ill;
- flags = descriptions[opc].flags; /* read new flags */
+ flags = descriptions[opc].flags; /* read new flags */
}
/* tms9940 replace a few xops with custom instructions */
@@ -460,16 +460,16 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
break;
case 2:
- case 3: /* should be 2, but instruction decoding is incomplete */
+ case 3: /* should be 2, but instruction decoding is incomplete */
/* opcode is liim */
if (BITS(OP,12,15) == 0)
/* ts must be == 0 */
opc = _liim;
else
/* I don't know what happens when ts != 0. Maybe the CPU does
- the complete address decoding, and liim gets a bogus value
- instead of the immediate. Since I do not know, I handle this
- as an illegal instruction. */
+ the complete address decoding, and liim gets a bogus value
+ instead of the immediate. Since I do not know, I handle this
+ as an illegal instruction. */
opc = _ill;
break;
@@ -492,7 +492,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
switch (format)
{
- case format_1: /* 2 address instructions */
+ case format_1: /* 2 address instructions */
smode = BITS(OP,10,11);
sarg = BITS(OP,12,15);
dmode = BITS(OP,4,5);
@@ -504,19 +504,19 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += print_arg (buffer, dmode, darg, opram, pc);
break;
- case format_2a: /* jump instructions */
+ case format_2a: /* jump instructions */
displacement = (signed char)BITS(OP,8,15);
sprintf (buffer, "%-4s >%04x", mnemonic, 0xffff & (PC + displacement * 2));
break;
- case format_2b: /* bit I/O instructions */
+ case format_2b: /* bit I/O instructions */
displacement = (signed char)BITS(OP,8,15);
sprintf (buffer, "%-4s >%04x", mnemonic, 0xffff & displacement);
break;
- case format_3_9: /* logical, multiply, and divide instructions */
- case format_4: /* CRU instructions */
- case format_9: /* extended operation instruction */
+ case format_3_9: /* logical, multiply, and divide instructions */
+ case format_4: /* CRU instructions */
+ case format_9: /* extended operation instruction */
smode = BITS(OP,10,11);
sarg = BITS(OP,12,15);
darg = BITS(OP,6,9);
@@ -538,14 +538,14 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
}
break;
- case format_5: /* register shift instructions */
+ case format_5: /* register shift instructions */
sarg = BITS(OP,12,15);
darg = BITS(OP,8,11);
sprintf (buffer, darg ? "%-4s R%d,%d" : "%-4s R%d,R%d", mnemonic, sarg, darg);
break;
- case format_6: /* single address instructions */
+ case format_6: /* single address instructions */
smode = BITS(OP,10,11);
sarg = BITS(OP,12,15);
@@ -553,31 +553,31 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += print_arg (buffer, smode, sarg, opram, pc);
break;
- case format_7: /* instructions without operands */
+ case format_7: /* instructions without operands */
sprintf (buffer, "%s", mnemonic);
break;
- case format_8a: /* immediate instructions (destination register) */
+ case format_8a: /* immediate instructions (destination register) */
darg = BITS(OP,12,15);
sarg = readop_arg(opram, pc);
sprintf (buffer, "%-4s R%d,>%04x", mnemonic, darg, sarg);
break;
- case format_8b: /* immediate instructions (no destination register) */
+ case format_8b: /* immediate instructions (no destination register) */
sarg = readop_arg(opram, pc);
sprintf (buffer, "%-4s >%04x", mnemonic, sarg);
break;
- case format_10: /* memory map file instruction */
+ case format_10: /* memory map file instruction */
sarg = BITS(OP,12,15);
darg = BITS(OP,11,11);
sprintf (buffer, "%-4s R%d,%d", mnemonic, sarg, darg);
break;
- case format_11: /* multiple precision instructions */
+ case format_11: /* multiple precision instructions */
OP2 = readop_arg(opram, pc);
smode = BITS(OP2,10,11);
@@ -593,7 +593,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += sprintf (buffer, byte_count ? ",%d" : ",R%d", byte_count);
break;
- case format_12: /* string instructions */
+ case format_12: /* string instructions */
OP2 = readop_arg(opram, pc);
smode = BITS(OP2,10,11);
@@ -610,7 +610,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += sprintf (buffer, byte_count ? ",%d,R%d" : ",R%d,R%d", byte_count, checkpoint);
break;
- case format_13: /* multiple precision shift instructions */
+ case format_13: /* multiple precision shift instructions */
OP2 = readop_arg(opram, pc);
smode = BITS(OP2,10,11);
@@ -624,7 +624,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += sprintf (buffer, darg ? ",%d" : ",R%d", darg);
break;
- case format_14: /* bit testing instructions */
+ case format_14: /* bit testing instructions */
OP2 = readop_arg(opram, pc);
smode = BITS(OP2,10,11);
@@ -639,7 +639,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += sprintf (buffer, ",%d", darg);
break;
- case format_15: /* invert order of field instruction */
+ case format_15: /* invert order of field instruction */
OP2 = readop_arg(opram, pc);
smode = BITS(OP2,10,11);
@@ -653,7 +653,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += sprintf (buffer, bit_width ? "%d)" : "R%d)", bit_width);
break;
- case format_16: /* field instructions */
+ case format_16: /* field instructions */
OP2 = readop_arg(opram, pc);
smode = BITS(OP2,10,11);
@@ -671,7 +671,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += sprintf (buffer, bit_width ? "%d)" : "R%d)", bit_width);
break;
- case format_17: /* alter register and jump instructions */
+ case format_17: /* alter register and jump instructions */
OP2 = readop_arg(opram, pc);
displacement = (signed char)BITS(OP2,8,15);
@@ -682,19 +682,19 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
mnemonic, 0xffff & (PC + displacement * 2), sarg, darg);
break;
- case format_18: /* single register operand instructions */
+ case format_18: /* single register operand instructions */
sarg = BITS(OP,12,15);
sprintf (buffer, "%-4s R%d", mnemonic, sarg);
break;
- case format_liim: /* liim instruction */
+ case format_liim: /* liim instruction */
sarg = BITS(OP,14,15);
sprintf (buffer, "%-4s %d", mnemonic, sarg);
break;
- case format_19: /* move address instruction */
+ case format_19: /* move address instruction */
OP2 = readop_arg(opram, pc);
smode = BITS(OP2,10,11);
@@ -708,7 +708,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
buffer += print_arg (buffer, dmode, darg, opram, pc);
break;
- case format_20: /* list search instructions */
+ case format_20: /* list search instructions */
{
const char *condition_code;
@@ -763,7 +763,7 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
break;
}
- case format_21: /* extend precision instruction */
+ case format_21: /* extend precision instruction */
{
int dest_byte_count;
@@ -794,6 +794,3 @@ unsigned Dasm9900 (char *buffer, unsigned pc, int model_id, const UINT8 *oprom,
return (PC - pc) | DASMFLAG_SUPPORTED | dasmflags;
}
-
-
-
diff --git a/src/emu/cpu/tms9900/99xxcore.h b/src/emu/cpu/tms9900/99xxcore.h
index 46f0fce2eab..259229b5bcd 100644
--- a/src/emu/cpu/tms9900/99xxcore.h
+++ b/src/emu/cpu/tms9900/99xxcore.h
@@ -167,10 +167,10 @@ Other references can be found on spies.com:
*/
#define concat2(a,b) a##b
-#define GET_INFO(prefix) concat2(prefix,_get_info)
-#define RESET_PARAM(prefix) concat2(prefix,reset_param)
+#define GET_INFO(prefix) concat2(prefix,_get_info)
+#define RESET_PARAM(prefix) concat2(prefix,reset_param)
-#define TMS99XX_RESET_PARAM RESET_PARAM(TMS99XX_PREFIX)
+#define TMS99XX_RESET_PARAM RESET_PARAM(TMS99XX_PREFIX)
@@ -290,7 +290,7 @@ static void field_interrupt(tms99xx_state *cpustate);
/* These bits are set by arithmetic operations, when it makes sense to update them. */
#define ST_C 0x1000 /* Carry */
#define ST_OV 0x0800 /* OVerflow (overflow with operations on signed integers, */
- /* and when the result of a 32bits:16bits division cannot fit in a 16-bit word.) */
+ /* and when the result of a 32bits:16bits division cannot fit in a 16-bit word.) */
/* This bit is set by move and arithmetic operations WHEN THEY USE BYTE OPERANDS. */
#define ST_OP 0x0400 /* Odd Parity */
@@ -367,11 +367,11 @@ a ST_MASK */
#if (TMS99XX_MODEL == TI990_10_ID)
/* This bit is set in user (i.e. non-supervisor) mode */
-#define EIR_MAPERR 0x0800 /* memory MAPping ERRor */
-#define EIR_MER 0x1000 /* Memory parity ERRor */
-#define EIR_ILLOP 0x2000 /* ILLegal OPcode */
-#define EIR_PRIVOP 0x4000 /* PRiviledged OPeration */
-#define EIR_TIMEOUT 0x8000 /* TILINE TIMEOUT */
+#define EIR_MAPERR 0x0800 /* memory MAPping ERRor */
+#define EIR_MER 0x1000 /* Memory parity ERRor */
+#define EIR_ILLOP 0x2000 /* ILLegal OPcode */
+#define EIR_PRIVOP 0x4000 /* PRiviledged OPeration */
+#define EIR_TIMEOUT 0x8000 /* TILINE TIMEOUT */
#endif
@@ -396,8 +396,8 @@ a ST_MASK */
struct map_file_t
{
- UINT16 L[3], B[3]; /* actual registers */
- UINT32 limit[3], bias[3]; /* equivalent in a more convenient form */
+ UINT16 L[3], B[3]; /* actual registers */
+ UINT32 limit[3], bias[3]; /* equivalent in a more convenient form */
};
struct tms99xx_state
@@ -421,20 +421,20 @@ struct tms99xx_state
#if (TMS99XX_MODEL == TI990_10_ID) || (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9980_ID)
/* On tms9900, we cache the state of INTREQ* and IC0-IC3 here */
/* On tms9980/9981, we translate the state of IC0-IC2 to the equivalent state for a tms9900,
- and store the result here */
- UINT8 irq_level; /* when INTREQ* is active, interrupt level on IC0-IC3 ; else always 16 */
- UINT8 irq_state; /* nonzero if the INTREQ* line is active (low) */
+ and store the result here */
+ UINT8 irq_level; /* when INTREQ* is active, interrupt level on IC0-IC3 ; else always 16 */
+ UINT8 irq_state; /* nonzero if the INTREQ* line is active (low) */
/* with TMS9940, bit 0 means INT1, bit 1 decrementer, bit 2 INT2 */
#elif (TMS99XX_MODEL == TMS9995_ID)
/* tms9995 is quite different : it latches the interrupt inputs */
UINT8 irq_level; /* We store the level of the request with the highest level here */
UINT8 int_state; /* interrupt lines state */
- UINT8 int_latch; /* interrupt latches state */
+ UINT8 int_latch; /* interrupt latches state */
#endif
/* interrupt callback */
/* note that this callback is used by tms9900_set_irq_line(cpustate) and tms9980a_set_irq_line(cpustate) to
- retreive the value on IC0-IC3 (non-standard behaviour) */
+ retreive the value on IC0-IC3 (non-standard behaviour) */
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
@@ -445,26 +445,26 @@ struct tms99xx_state
special data on CRU bus */
#if HAS_MAPPING
- UINT8 mapping_on; /* set by a CRU write */
- map_file_t map_files[3]; /* internal mapper registers */
- UINT8 cur_map; /* equivalent to ST_MF status bit */
- UINT8 cur_src_map; /* set to 2 by LDS */
- UINT8 cur_dst_map; /* set to 2 by LDD */
+ UINT8 mapping_on; /* set by a CRU write */
+ map_file_t map_files[3]; /* internal mapper registers */
+ UINT8 cur_map; /* equivalent to ST_MF status bit */
+ UINT8 cur_src_map; /* set to 2 by LDS */
+ UINT8 cur_dst_map; /* set to 2 by LDD */
#if (TMS99XX_MODEL == TI990_10_ID)
- UINT8 reset_maperr; /* reset mapper error flag line (reset flags in 945417-9701 p. 3-90) */
+ UINT8 reset_maperr; /* reset mapper error flag line (reset flags in 945417-9701 p. 3-90) */
- UINT32 mapper_address_latch; /* used to load the map file and for diagnostic purpose */
- UINT16 mapper_cru_read_register; /* read register select code for mapper cru interface */
- UINT8 diaglat; /* set when diagnostic address latch is done */
- UINT8 latch_control[3]; /* latch control */
+ UINT32 mapper_address_latch; /* used to load the map file and for diagnostic purpose */
+ UINT16 mapper_cru_read_register; /* read register select code for mapper cru interface */
+ UINT8 diaglat; /* set when diagnostic address latch is done */
+ UINT8 latch_control[3]; /* latch control */
#endif
#endif
#if (TMS99XX_MODEL == TI990_10_ID)
- UINT16 error_interrupt_register; /* one flag for each interrupt condition */
- ti99xx_error_interrupt_func error_interrupt_callback;
+ UINT16 error_interrupt_register; /* one flag for each interrupt condition */
+ ti99xx_error_interrupt_func error_interrupt_callback;
#endif
#if (TMS99XX_MODEL == TMS9985_ID) || (TMS99XX_MODEL == TMS9995_ID)
@@ -475,13 +475,13 @@ struct tms99xx_state
/* on-chip event counter/timer*/
UINT8 decrementer_enabled;
UINT16 decrementer_interval;
- UINT16 decrementer_count; /* used in event counter mode*/
+ UINT16 decrementer_count; /* used in event counter mode*/
emu_timer *timer; /* used in timer mode */
#endif
#if (TMS99XX_MODEL == TMS9995_ID)
/* additionnal registers */
- UINT16 flag; /* flag register */
+ UINT16 flag; /* flag register */
UINT8 MID_flag; /* MID flag register */
/* chip config, which can be set on reset */
@@ -493,20 +493,20 @@ struct tms99xx_state
#endif
/* Some instructions (i.e. XOP, BLWP, and MID) disable interrupt recognition until another
- instruction is executed : so they set this flag */
+ instruction is executed : so they set this flag */
UINT8 disable_interrupt_recognition;
/* notify the driver of changes in IDLE state */
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
#if EXTERNAL_INSTRUCTION_CALLBACK
- ti99xx_rset_func rset_callback;
- ti99xx_lrex_func lrex_callback;
- ti99xx_ckon_ckof_func ckon_ckof_callback;
+ ti99xx_rset_func rset_callback;
+ ti99xx_lrex_func lrex_callback;
+ ti99xx_ckon_ckof_func ckon_ckof_callback;
#endif
int write_inhibit;
- int extra_byte; /* buffer holding the unused byte in a word read */
+ int extra_byte; /* buffer holding the unused byte in a word read */
};
INLINE tms99xx_state *get_safe_token(device_t *device)
@@ -576,13 +576,13 @@ WRITE8_HANDLER(tms9995_internal2_w)
static int readwordX(tms99xx_state *cpustate, int addr, int map_file)
{
if ((map_file == 0) && (addr >= 0xf800))
- { /* intercept TPCS and CPU ROM */
+ { /* intercept TPCS and CPU ROM */
if (addr < 0xfc00)
/* TPCS */
return cpustate->program->read_word(0x1f0000+addr);
else
/* CPU ROM */
- return cpustate->program->read_word(0x1f0000+addr); /* hack... */
+ return cpustate->program->read_word(0x1f0000+addr); /* hack... */
}
else if (! cpustate->mapping_on)
{
@@ -599,7 +599,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
else if (addr <= cpustate->map_files[map_file].limit[2])
map_index = 2;
else
- { /* mapping error */
+ { /* mapping error */
if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat))
cpustate->mapper_address_latch = addr;
if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR))
@@ -621,13 +621,13 @@ WRITE8_HANDLER(tms9995_internal2_w)
static void writewordX(tms99xx_state *cpustate, int addr, int data, int map_file)
{
if ((map_file == 0) && (addr >= 0xf800))
- { /* intercept TPCS and CPU ROM */
+ { /* intercept TPCS and CPU ROM */
if (addr < 0xfc00)
/* TPCS */
cpustate->program->write_word(0x1f0000+addr, data);
else
/* CPU ROM */
- cpustate->program->write_word(0x1f0000+addr, data); /* hack... */
+ cpustate->program->write_word(0x1f0000+addr, data); /* hack... */
}
else if (! cpustate->mapping_on)
{
@@ -644,7 +644,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
else if (addr <= cpustate->map_files[map_file].limit[2])
map_index = 2;
else
- { /* mapping error */
+ { /* mapping error */
if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat))
cpustate->mapper_address_latch = addr;
if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR))
@@ -670,13 +670,13 @@ WRITE8_HANDLER(tms9995_internal2_w)
static int readbyteX(tms99xx_state *cpustate, int addr, int map_file)
{
if ((map_file == 0) && (addr >= 0xf800))
- { /* intercept TPCS and CPU ROM */
+ { /* intercept TPCS and CPU ROM */
if (addr < 0xfc00)
/* TPCS */
return cpustate->program->read_byte(0x1f0000+addr);
else
/* CPU ROM */
- return cpustate->program->read_byte(0x1f0000+addr); /* hack... */
+ return cpustate->program->read_byte(0x1f0000+addr); /* hack... */
}
else if (! cpustate->mapping_on)
{
@@ -693,7 +693,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
else if (addr <= cpustate->map_files[map_file].limit[2])
map_index = 2;
else
- { /* mapping error */
+ { /* mapping error */
if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat))
cpustate->mapper_address_latch = addr;
if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR))
@@ -715,13 +715,13 @@ WRITE8_HANDLER(tms9995_internal2_w)
static void writebyteX(tms99xx_state *cpustate, int addr, int data, int map_file)
{
if ((map_file == 0) && (addr >= 0xf800))
- { /* intercept TPCS and CPU ROM */
+ { /* intercept TPCS and CPU ROM */
if (addr < 0xfc00)
/* TPCS */
cpustate->program->write_byte(0x1f0000+addr, data);
else
/* CPU ROM */
- cpustate->program->write_byte(0x1f0000+addr, data); /* hack... */
+ cpustate->program->write_byte(0x1f0000+addr, data); /* hack... */
}
else if (! cpustate->mapping_on)
{
@@ -738,7 +738,7 @@ WRITE8_HANDLER(tms9995_internal2_w)
else if (addr <= cpustate->map_files[map_file].limit[2])
map_index = 2;
else
- { /* mapping error */
+ { /* mapping error */
if ((! (cpustate->error_interrupt_register & EIR_MAPERR)) && ! (cpustate->diaglat))
cpustate->mapper_address_latch = addr;
if ((! cpustate->reset_maperr) && ! (cpustate->error_interrupt_register & EIR_MAPERR))
@@ -763,8 +763,8 @@ WRITE8_HANDLER(tms9995_internal2_w)
#elif (TMS99XX_MODEL == TMS9900_ID) || (TMS99XX_MODEL == TMS9940_ID)
/*16-bit data bus, 16-bit address bus (internal bus in the case of TMS9940)*/
/*Note that tms9900 actually never accesses a single byte : when performing byte operations,
- it reads a 16-bit word, changes the revelant byte, then write a complete word. You should
- remember this when writing memory handlers.*/
+ it reads a 16-bit word, changes the revelant byte, then write a complete word. You should
+ remember this when writing memory handlers.*/
/*This does not apply to tms9995 and tms99xxx, but does apply to tms9980 (see below).*/
#define readword(cs, addr) (cs)->program->read_word(addr)
@@ -776,8 +776,8 @@ WRITE8_HANDLER(tms9995_internal2_w)
#elif (TMS99XX_MODEL == TMS9980_ID)
/*8-bit data bus, 14-bit address*/
/*Note that tms9980 never accesses a single byte (however crazy it may seem). Although this
- makes memory access slower, I have emulated this feature, because if I did otherwise,
- there would be some implementation problems in some driver sooner or later.*/
+ makes memory access slower, I have emulated this feature, because if I did otherwise,
+ there would be some implementation problems in some driver sooner or later.*/
INLINE int readword(tms99xx_state *cpustate, int addr)
{
@@ -1164,7 +1164,7 @@ INLINE void WRITEREG_DEBUG(tms99xx_state *cpustate, int reg, UINT16 data)
WRITE8_HANDLER(ti990_10_eir_cru_w)
{
tms99xx_state *cpustate = get_safe_token(&space.device());
- if (offset < 4) /* does not work for EIR_MAPERR */
+ if (offset < 4) /* does not work for EIR_MAPERR */
{
cpustate->error_interrupt_register &= ~ (1 << offset);
@@ -1313,7 +1313,7 @@ static CPU_INIT( tms99xx )
#if (TMS99XX_MODEL == TMS9995_ID)
/* we can ask at reset time that the CPU always generates one wait state automatically */
if (param == NULL)
- { /* if no param, the default is currently "wait state added" */
+ { /* if no param, the default is currently "wait state added" */
cpustate->memory_wait_states_byte = 4;
cpustate->memory_wait_states_word = 12;
cpustate->is_mp9537 = 0;
@@ -1352,9 +1352,9 @@ static CPU_RESET( tms99xx )
cpustate->map_files[i].bias[j] = 0;
}
}
- cpustate->cur_map = 0; /* equivalent to ST_MF status bit */
- cpustate->cur_src_map = 0; /* set to 2 by LDS */
- cpustate->cur_dst_map = 0; /* set to 2 by LDD */
+ cpustate->cur_map = 0; /* equivalent to ST_MF status bit */
+ cpustate->cur_src_map = 0; /* set to 2 by LDS */
+ cpustate->cur_dst_map = 0; /* set to 2 by LDD */
cpustate->reset_maperr = 0;
#endif
@@ -1410,8 +1410,8 @@ static CPU_EXECUTE( tms99xx )
do
{
/* all TMS9900 chips I know do not honor interrupts after XOP, BLWP or MID (after any
- interrupt-like instruction, actually), and they do not either after LDS and LDD
- (There are good reasons for this). */
+ interrupt-like instruction, actually), and they do not either after LDS and LDD
+ (There are good reasons for this). */
if ((cpustate->interrupt_pending) && (! cpustate->disable_interrupt_recognition))
{
int level;
@@ -1420,7 +1420,7 @@ static CPU_EXECUTE( tms99xx )
if (cpustate->load_state)
- { /* LOAD has the highest priority */
+ { /* LOAD has the highest priority */
contextswitchX(cpustate, 0xFFFC); /* load vector, save PC, WP and ST */
@@ -1429,7 +1429,7 @@ static CPU_EXECUTE( tms99xx )
/* clear IDLE status if necessary */
if (cpustate->IDLE)
{
- cpustate->IDLE = 0; /* clear IDLE condition */
+ cpustate->IDLE = 0; /* clear IDLE condition */
if (cpustate->idle_callback)
(*cpustate->idle_callback)(device, 0);
}
@@ -1437,7 +1437,7 @@ static CPU_EXECUTE( tms99xx )
CYCLES(6/*to be confirmed*/, 22, 14);
}
else if (level <= IMASK)
- { /* a maskable interrupt is honored only if its level isn't greater than IMASK */
+ { /* a maskable interrupt is honored only if its level isn't greater than IMASK */
contextswitchX(cpustate, level*4); /* load vector, save PC, WP and ST */
@@ -1457,7 +1457,7 @@ static CPU_EXECUTE( tms99xx )
/* clear IDLE status if necessary */
if (cpustate->IDLE)
{
- cpustate->IDLE = 0; /* clear IDLE condition */
+ cpustate->IDLE = 0; /* clear IDLE condition */
if (cpustate->idle_callback)
(*cpustate->idle_callback)(device, 0);
}
@@ -1466,7 +1466,7 @@ static CPU_EXECUTE( tms99xx )
/* Clear bit in latch */
/* I think tms9989 does this, too */
if (level != 2)
- { /* Only do this on level 1, 3, 4 interrupts */
+ { /* Only do this on level 1, 3, 4 interrupts */
int mask = 1 << level;
int flag_mask = (level == 1) ? 4 : mask;
@@ -1493,16 +1493,16 @@ static CPU_EXECUTE( tms99xx )
debugger_instruction_hook(device, cpustate->PC);
if (cpustate->IDLE)
- { /* IDLE instruction has halted execution */
+ { /* IDLE instruction has halted execution */
#if EXTERNAL_INSTRUCTION_DECODING
external_instruction_notify(cpustate, 2);
CYCLES(Moof!, 2, 2); /* 2 cycles per CRU write */
#else
- cpustate->icount = 0; /* much simpler... */
+ cpustate->icount = 0; /* much simpler... */
#endif
}
else
- { /* we execute an instruction */
+ { /* we execute an instruction */
cpustate->disable_interrupt_recognition = 0; /* default value */
cpustate->IR = fetch(cpustate);
execute(cpustate, cpustate->IR);
@@ -1529,7 +1529,7 @@ static CPU_EXECUTE( tms99xx )
#if (HAS_OVERFLOW_INTERRUPT)
#if (TMS99XX_MODEL == TMS9995_ID)
/* Note that TI had some problem implementing this... I don't know if this feature works on
- a real-world TMS9995. */
+ a real-world TMS9995. */
if ((cpustate->STATUS & ST_OVIE) && (cpustate->STATUS & ST_OV) && (cpustate->irq_level > 2))
cpustate->irq_level = 2; /* interrupt request */
#else
@@ -1554,7 +1554,7 @@ static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state
else
{
/*if (cpustate->irq_state == state)
- return;*/
+ return;*/
cpustate->irq_state = state;
@@ -1650,7 +1650,7 @@ static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state
else
{
/*if (cpustate->irq_state == state)
- return;*/
+ return;*/
cpustate->irq_state = state;
@@ -1683,7 +1683,7 @@ static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state
int level;
if (irqline == INPUT_LINE_NMI)
- level = 2; /* translate MAME's convention to CPU's representation */
+ level = 2; /* translate MAME's convention to CPU's representation */
else
level = (* cpustate->irq_callback)(cpustate->device, 0);
@@ -1776,7 +1776,7 @@ static void reset_decrementer(tms99xx_state *cpustate)
cpustate->decrementer_enabled = ((cpustate->flag & 2) && (cpustate->decrementer_interval));
if (cpustate->decrementer_enabled && ! (cpustate->flag & 1))
- { /* timer */
+ { /* timer */
attotime period = cpustate->device->cycles_to_attotime(cpustate->decrementer_interval * 16L);
cpustate->timer->adjust(period, 0, period);
}
@@ -1804,24 +1804,24 @@ static void tms99xx_set_irq_line(tms99xx_state *cpustate, int irqline, int state
int flag_mask = (irqline == 0) ? 0x4 : 0x10;
if (((cpustate->int_state & mask) != 0) ^ (state != 0))
- { /* only if state changes */
+ { /* only if state changes */
if (state)
{
cpustate->int_state |= mask;
if ((irqline == 1) && (cpustate->flag & 1))
- { /* event counter mode : INT4* triggers no interrupt... */
+ { /* event counter mode : INT4* triggers no interrupt... */
if (cpustate->decrementer_enabled)
- { /* decrement, then interrupt if reach 0 */
+ { /* decrement, then interrupt if reach 0 */
if ((-- cpustate->decrementer_count) == 0)
{
decrementer_callback(cpustate->device->machine(), cpustate, 0);
- cpustate->decrementer_count = cpustate->decrementer_interval; /* reload */
+ cpustate->decrementer_count = cpustate->decrementer_interval; /* reload */
}
}
}
else
- { /* plain interrupt mode */
+ { /* plain interrupt mode */
cpustate->int_latch |= mask;
cpustate->flag |= flag_mask;
}
@@ -2102,7 +2102,7 @@ static void write_single_CRU(tms99xx_state *cpustate, int port, int data)
case 0xF7D:
case 0xF7E:
case 0xF7F:
- { /* user defined flags */
+ { /* user defined flags */
int mask = 1 << (port - 0xF70);
if (data & 0x01)
cpustate->flag |= mask;
@@ -2118,9 +2118,9 @@ static void write_single_CRU(tms99xx_state *cpustate, int port, int data)
}
/* External CRU */
/* Even though all the registers above are implemented internally, accesses
- are passed to the external bus, too, and an external device might respond
- to a write to these CRU address as well (particularly a write to the user
- flag registers). */
+ are passed to the external bus, too, and an external device might respond
+ to a write to these CRU address as well (particularly a write to the user
+ flag registers). */
WRITEPORT(cpustate, port, (data & 0x01));
}
#else
@@ -2390,13 +2390,13 @@ static void load_map_file(tms99xx_state *cpustate, UINT16 src_addr, int src_map_
/* load mapped address into the memory address register */
if ((src_map_file == 0) && (src_addr >= 0xf800))
- { /* intercept TPCS and CPU ROM */
+ { /* intercept TPCS and CPU ROM */
if (src_addr < 0xfc00)
/* TPCS */
cpustate->mapper_address_latch = 0x1f0000+src_addr;
else
/* CPU ROM */
- cpustate->mapper_address_latch = 0x1f0000+src_addr; /* hack... */
+ cpustate->mapper_address_latch = 0x1f0000+src_addr; /* hack... */
}
else if (! cpustate->mapping_on)
{
@@ -2513,7 +2513,7 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
/* Rx */
return(reg + cpustate->WP);
else if (ts == 0x10)
- { /* *Rx */
+ { /* *Rx */
CYCLES(0, 4, 1);
return(readword(cpustate, reg + cpustate->WP));
}
@@ -2524,18 +2524,18 @@ static UINT16 decipheraddr(tms99xx_state *cpustate, UINT16 opcode)
imm = fetch(cpustate);
if (reg)
- { /* @>xxxx(Rx) */
+ { /* @>xxxx(Rx) */
CYCLES(1, 8, 3);
return(readword(cpustate, reg + cpustate->WP) + imm);
}
else
- { /* @>xxxx */
+ { /* @>xxxx */
CYCLES(3, 8, 1);
return(imm);
}
}
else /*if (ts == 0x30)*/
- { /* *Rx+ */
+ { /* *Rx+ */
register UINT16 response;
reg += cpustate->WP; /* reg now contains effective address */
@@ -2560,7 +2560,7 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
/* Rx */
return(reg + cpustate->WP);
else if (ts == 0x10)
- { /* *Rx */
+ { /* *Rx */
CYCLES(0, 4, 1);
return(readword(cpustate, reg + cpustate->WP));
}
@@ -2571,18 +2571,18 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
imm = fetch(cpustate);
if (reg)
- { /* @>xxxx(Rx) */
+ { /* @>xxxx(Rx) */
CYCLES(1, 8, 3);
return(readword(cpustate, reg + cpustate->WP) + imm);
}
else
- { /* @>xxxx */
+ { /* @>xxxx */
CYCLES(3, 8, 1);
return(imm);
}
}
else /*if (ts == 0x30)*/
- { /* *Rx+ */
+ { /* *Rx+ */
register UINT16 response;
reg += cpustate->WP; /* reg now contains effective address */
@@ -2601,11 +2601,11 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
#if (TMS99XX_MODEL == TI990_10_ID)
/* TI990/10 generates an error interrupt */
/* timings are unknown */
- #define HANDLE_ILLEGAL \
- { \
- cpustate->error_interrupt_register |= EIR_ILLOP; \
- if (cpustate->error_interrupt_callback) \
- (*cpustate->error_interrupt_callback)(cpustate->device, 1); \
+ #define HANDLE_ILLEGAL \
+ { \
+ cpustate->error_interrupt_register |= EIR_ILLOP; \
+ if (cpustate->error_interrupt_callback) \
+ (*cpustate->error_interrupt_callback)(cpustate->device, 1); \
}
#elif TMS99XX_MODEL <= TMS9989_ID
/* TMS9900/TMS9980 merely ignore the instruction */
@@ -2628,11 +2628,11 @@ static UINT16 decipheraddrbyte(tms99xx_state *cpustate, UINT16 opcode)
#if (TMS99XX_MODEL == TI990_10_ID)
/* TI990/10 generates an error interrupt */
/* timings are unknown */
- #define HANDLE_PRIVILEGE_VIOLATION \
- { \
- cpustate->error_interrupt_register |= EIR_PRIVOP; \
- if (cpustate->error_interrupt_callback) \
- (*cpustate->error_interrupt_callback)(cpustate->device, 1); \
+ #define HANDLE_PRIVILEGE_VIOLATION \
+ { \
+ cpustate->error_interrupt_register |= EIR_PRIVOP; \
+ if (cpustate->error_interrupt_callback) \
+ (*cpustate->error_interrupt_callback)(cpustate->device, 1); \
}
#else
#define HANDLE_PRIVILEGE_VIOLATION
@@ -2651,7 +2651,7 @@ static void illegal(tms99xx_state *cpustate, UINT16 opcode)
}
-#if 0 /* ti990/12 only */
+#if 0 /* ti990/12 only */
/*==========================================================================
Additionnal instructions, >0000->002F
Additionnal single-register instruction, >0030->003F
@@ -2667,7 +2667,7 @@ static void illegal(tms99xx_state *cpustate, UINT16 opcode)
static void h0000(tms99xx_state *cpustate, UINT16 opcode)
{
if (opcode >= 0x30)
- { /* STPC STore Program Counter */
+ { /* STPC STore Program Counter */
}
else
@@ -2765,7 +2765,7 @@ static void h0040(tms99xx_state *cpustate, UINT16 opcode)
cpustate->WP = readword(cpustate, addr) & ~1;
break;
-#if 0 /* 990/12 opcodes */
+#if 0 /* 990/12 opcodes */
case 4:
/* CS ---- Compare Strings */
case 5:
@@ -2821,8 +2821,8 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
src = decipheraddr(cpustate, opcode) & ~1;
- switch ((opcode & 0xC0) >> 6)
- {
+ switch ((opcode & 0xC0) >> 6)
+ {
#if HAS_BIND_OPCODE
case 1: /* BIND */
/* BIND -- Branch INDirect */
@@ -2831,7 +2831,7 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
break;
#endif
- case 2: /* DIVS */
+ case 2: /* DIVS */
/* DIVS -- DIVide Signed */
/* R0 = (R0:R1)/S R1 = (R0:R1)%S */
{
@@ -2856,7 +2856,7 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
}
break;
- case 3: /* MPYS */
+ case 3: /* MPYS */
/* MPYS -- MultiPlY Signed */
/* Results: R0:R1 = R0*S */
{
@@ -2877,7 +2877,7 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
CYCLES(Mooof!, Mooof!, 25);
break;
-#if 0 /* Origin unknown */
+#if 0 /* Origin unknown */
case 0: /* EVAD */
/* EVAD -- EValuate ADdress instruction */
@@ -2887,7 +2887,7 @@ static void h0100(tms99xx_state *cpustate, UINT16 opcode)
default:
HANDLE_ILLEGAL;
break;
- }
+ }
}
#endif
@@ -2907,19 +2907,19 @@ systems with memory mapper: LMF
static void h0200(tms99xx_state *cpustate, UINT16 opcode)
{
register UINT16 addr;
- register UINT16 value; /* used for anything */
+ register UINT16 value; /* used for anything */
addr = opcode & 0xF;
addr = ((addr + addr) + cpustate->WP) & ~1;
#if HAS_MAPPING
if ((opcode >= 0x0320) && (opcode < 0x0340))
- { /* LMF */
+ { /* LMF */
/* LMF --- Load memory Map File */
/* Used by the memory mapper on ti990/10 with mapping option, ti990/12, and the TIM99610
- mapper chip to be associated with tms99000.
- Syntax: "LMF Rn,m" loads map file m (0 or 1) with six words of memory, starting at address
- specified in workspace register Rn (0 through 15). */
+ mapper chip to be associated with tms99000.
+ Syntax: "LMF Rn,m" loads map file m (0 or 1) with six words of memory, starting at address
+ specified in workspace register Rn (0 through 15). */
#if HAS_PRIVILEGE
if (cpustate->STATUS & ST_PR)
{
@@ -2952,18 +2952,18 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
#if 0
/* tms99110 opcode (not supported by 990/12) */
if (opcode == 0x0301)
- { /* CR ---- Compare Reals */
+ { /* CR ---- Compare Reals */
}
else
/* tms99105+tms99110 opcode (not supported by 990/12) */
if (opcode == 0x0302)
- { /* MM ---- Multiply Multiple */
+ { /* MM ---- Multiply Multiple */
}
else
#endif
- #if 0 /* ti990/12 only */
+ #if 0 /* ti990/12 only */
if (opcode >= 0x03F0)
- { /* EP ---- Extended Precision */
+ { /* EP ---- Extended Precision */
}
else
#endif
@@ -3066,7 +3066,7 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
case 10: /* IDLE */
/* IDLE -- IDLE until a reset, interrupt, load */
/* The TMS99000 locks until an interrupt happen (like with 68k STOP instruction),
- and continuously performs a special CRU write (code 2). */
+ and continuously performs a special CRU write (code 2). */
#if HAS_PRIVILEGE
if (cpustate->STATUS & ST_PR)
{
@@ -3112,7 +3112,7 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
case 13: /* CKON */
case 14: /* CKOF */
case 15: /* LREX */
- HANDLE_ILLEGAL; /* These instruction "have been deleted" on the TMS9940 */
+ HANDLE_ILLEGAL; /* These instruction "have been deleted" on the TMS9940 */
break;
#else
@@ -3133,7 +3133,7 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
field_interrupt(cpustate); /*IM has been modified.*/
#if (TMS99XX_MODEL == TMS9995_ID)
- /*cpustate->MID_flag = 0;*/ /* not sure about this */
+ /*cpustate->MID_flag = 0;*/ /* not sure about this */
#endif
#if (TMS99XX_MODEL == TI990_10_ID)
cpustate->error_interrupt_register = 0;
@@ -3172,7 +3172,7 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
/* LREX -- Load or REstart eXecution */
/* Perform a special CRU write (code 7). */
/* An external circuitery could, for instance, activate the LOAD* line,
- causing a non-maskable LOAD interrupt (vector -1). */
+ causing a non-maskable LOAD interrupt (vector -1). */
#if HAS_PRIVILEGE
if (cpustate->STATUS & ST_PR)
{
@@ -3199,7 +3199,7 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
/* CKOF -- ClocK OFf */
/* Disable the line clock interrupt. */
/* We use a callback because the line clock is implemented in machine
- code, not in the CPU core. */
+ code, not in the CPU core. */
#if HAS_PRIVILEGE
if (cpustate->STATUS & ST_PR)
{
@@ -3218,7 +3218,7 @@ static void h0200(tms99xx_state *cpustate, UINT16 opcode)
case 15: /* LREX */
/* LREX -- Load or REstart eXecution */
/* Trigger a LOAD interrupt (vector -1). (We use a callback, and I
- have forgotten the reason why.) */
+ have forgotten the reason why.) */
#if HAS_PRIVILEGE
if (cpustate->STATUS & ST_PR)
{
@@ -3288,7 +3288,7 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
/* Executes instruction *S */
execute(cpustate, readwordX(cpustate, addr, src_map));
/* On tms9900, the X instruction actually takes 8 cycles, but we gain 2 cycles on the next
- instruction, as we don't need to fetch it. */
+ instruction, as we don't need to fetch it. */
CYCLES(1, 6, 2);
break;
case 3: /* CLR */
@@ -3450,10 +3450,10 @@ static void h0400(tms99xx_state *cpustate, UINT16 opcode)
#if HAS_MAPPING
/* Used by the memory mapper on ti990/10 with mapping option, ti990/12, and the TIM99610
- mapper chip to be associated with tms99000. */
+ mapper chip to be associated with tms99000. */
/* These opcode allow access to another page without the need of switching a page someplace. */
/* Note that, if I read the 990/10 schematics correctly, two consecutive LDS or LDD would
- cause some trouble. */
+ cause some trouble. */
case 14: /* LDS */
/* LDS --- Long Distance Source */
@@ -3560,7 +3560,7 @@ static void h0800(tms99xx_state *cpustate, UINT16 opcode)
}
-#if 0 /* 990/12 opcodes */
+#if 0 /* 990/12 opcodes */
/*==========================================================================
Additionnal instructions, >0C00->0C0F
Additionnal single-register instructions, >0C10->0C3F
@@ -3644,7 +3644,7 @@ static void h0c00(tms99xx_state *cpustate, UINT16 opcode)
case 15:
/* XIT --- eXIT from floating point interpreter */
/* Generated by some compilers, but equivalent to NOP on TI990/12. May have been used
- by some software floating-point emulators. */
+ by some software floating-point emulators. */
break;
default:
@@ -3923,9 +3923,9 @@ static void h1000(tms99xx_state *cpustate, UINT16 opcode)
/* Set ST_OP bit. */
/*if (i & 1)
- cpustate->STATUS |= ST_OP;
- else
- cpustate->STATUS &= ~ ST_OP;*/
+ cpustate->STATUS |= ST_OP;
+ else
+ cpustate->STATUS &= ~ ST_OP;*/
/* Jump accordingly. */
if (i & 1) /*(cpustate->STATUS & ST_OP)*/
@@ -4083,7 +4083,7 @@ static void h2000(tms99xx_state *cpustate, UINT16 opcode)
}
static void xop(tms99xx_state *cpustate, UINT16 opcode)
-{ /* XOP */
+{ /* XOP */
/* XOP --- eXtended OPeration */
/* WP = *(40h+D), PC = *(42h+D) */
/* New R13=old WP, New R14=Old IP, New R15=Old ST */
@@ -4129,7 +4129,7 @@ static void xop(tms99xx_state *cpustate, UINT16 opcode)
writebyte(cpustate, operand, (X << 4) | Y);
}
break;
- case 1: /* DCS */
+ case 1: /* DCS */
/* DCS --- Decimal Correct Substraction */
operand = decipheraddrbyte(cpustate, opcode);
{
@@ -4155,7 +4155,7 @@ static void xop(tms99xx_state *cpustate, UINT16 opcode)
/* LIIM - Load Immediate Interrupt Mask */
/* Does the same job as LIMI, with a different opcode format. */
/* Note that, unlike TMS9900, the interrupt mask is only 2-bit long. */
- (void)decipheraddr(cpustate, opcode); /* dummy decode (personnal guess) */
+ (void)decipheraddr(cpustate, opcode); /* dummy decode (personnal guess) */
cpustate->STATUS = (cpustate->STATUS & ~ST_IM) | (opcode & ST_IM);
break;
@@ -4206,7 +4206,7 @@ static void ldcr_stcr(tms99xx_state *cpustate, UINT16 opcode)
addr = decipheraddr(cpustate, opcode) & ~1;
if (opcode < 0x3400)
- { /* LDCR */
+ { /* LDCR */
/* LDCR -- LoaD into CRu */
/* CRU R12--CRU R12+D-1 set to S */
if (cnt <= 8)
@@ -4246,7 +4246,7 @@ static void ldcr_stcr(tms99xx_state *cpustate, UINT16 opcode)
CYCLES(4+cnt, 20 + cnt+cnt, 9 + cnt+cnt);
}
else
- { /* STCR */
+ { /* STCR */
/* STCR -- STore from CRu */
/* S = CRU R12--CRU R12+D-1 */
if (cnt <= 8)
@@ -4294,7 +4294,7 @@ static void ldcr_stcr(tms99xx_state *cpustate, UINT16 opcode)
}
else
{
- (void)readwordX(cpustate, addr, src_map); /*dummy read*/
+ (void)readwordX(cpustate, addr, src_map); /*dummy read*/
(void)READREG(cnt+cnt); /*dummy read (reasonnable guess for TMS9995 & TMS9900, ti990/10)*/
@@ -4453,9 +4453,9 @@ static void h4000b(tms99xx_state *cpustate, UINT16 opcode)
setst_byte_laep(cpustate, value);
#if (TMS99XX_MODEL <= TMS9985_ID)
/* On ti990/10 and tms9900, MOVB needs to read destination, because it cannot actually
- read one single byte. It reads a word, replaces the revelant byte, then write
- the result. A tms9980 should not need to do so, but still does, because it is just
- a tms9900 with a 16 to 8 bit multiplexer (instead of a new chip design, like tms9995). */
+ read one single byte. It reads a word, replaces the revelant byte, then write
+ the result. A tms9980 should not need to do so, but still does, because it is just
+ a tms9900 with a 16 to 8 bit multiplexer (instead of a new chip design, like tms9995). */
(void)readbyteX(cpustate, dest, dst_map);
#endif
writebyteX(cpustate, dest, value, dst_map);
@@ -4557,10 +4557,10 @@ static CPU_SET_INFO( tms99xx )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: tms99xx_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 0: tms99xx_set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 1: tms99xx_set_irq_line(cpustate, 1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 2: tms99xx_set_irq_line(cpustate, 2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: tms99xx_set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: tms99xx_set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 1: tms99xx_set_irq_line(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 2: tms99xx_set_irq_line(cpustate, 2, info->i); break;
#if (TMS99XX_MODEL == TI990_10_ID)
case CPUINFO_INT_PC:
@@ -4587,15 +4587,15 @@ static CPU_SET_INFO( tms99xx )
else
{
/*if ((info->i < top)
- && (info->i > cpustate->map_files[cpustate->cur_map].limit[0])
- && (info->i > cpustate->map_files[cpustate->cur_map].limit[1])
- && (info->i > cpustate->map_files[cpustate->cur_map].limit[2]))
- cpustate->PC = info->i;
- else*/
+ && (info->i > cpustate->map_files[cpustate->cur_map].limit[0])
+ && (info->i > cpustate->map_files[cpustate->cur_map].limit[1])
+ && (info->i > cpustate->map_files[cpustate->cur_map].limit[2]))
+ cpustate->PC = info->i;
+ else*/
cpustate->PC = 0;
}
/*if (info->i >= top)
- cpustate->PC = 0;*/
+ cpustate->PC = 0;*/
}
cpustate->PC &= 0xfffe;
}
@@ -4603,27 +4603,27 @@ static CPU_SET_INFO( tms99xx )
#else
case CPUINFO_INT_PC:
#endif
- case CPUINFO_INT_REGISTER + TMS9900_PC: cpustate->PC = info->i & 0xfffe; break;
- case CPUINFO_INT_REGISTER + TMS9900_IR: cpustate->IR = info->i; break;
+ case CPUINFO_INT_REGISTER + TMS9900_PC: cpustate->PC = info->i & 0xfffe; break;
+ case CPUINFO_INT_REGISTER + TMS9900_IR: cpustate->IR = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS9900_WP: cpustate->WP = info->i & 0xfffe; break;
- case CPUINFO_INT_REGISTER + TMS9900_STATUS: cpustate->STATUS = info->i; getstat(cpustate); break;
- case CPUINFO_INT_REGISTER + TMS9900_R0: WRITEREG_DEBUG(cpustate, R0, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R1: WRITEREG_DEBUG(cpustate, R1, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R2: WRITEREG_DEBUG(cpustate, R2, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R3: WRITEREG_DEBUG(cpustate, R3, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R4: WRITEREG_DEBUG(cpustate, R4, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R5: WRITEREG_DEBUG(cpustate, R5, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R6: WRITEREG_DEBUG(cpustate, R6, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R7: WRITEREG_DEBUG(cpustate, R7, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R8: WRITEREG_DEBUG(cpustate, R8, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R9: WRITEREG_DEBUG(cpustate, R9, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R10: WRITEREG_DEBUG(cpustate, R10, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R11: WRITEREG_DEBUG(cpustate, R11, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R12: WRITEREG_DEBUG(cpustate, R12, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R13: WRITEREG_DEBUG(cpustate, R13, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R14: WRITEREG_DEBUG(cpustate, R14, info->i); break;
- case CPUINFO_INT_REGISTER + TMS9900_R15: WRITEREG_DEBUG(cpustate, R15, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_WP: cpustate->WP = info->i & 0xfffe; break;
+ case CPUINFO_INT_REGISTER + TMS9900_STATUS: cpustate->STATUS = info->i; getstat(cpustate); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R0: WRITEREG_DEBUG(cpustate, R0, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R1: WRITEREG_DEBUG(cpustate, R1, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R2: WRITEREG_DEBUG(cpustate, R2, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R3: WRITEREG_DEBUG(cpustate, R3, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R4: WRITEREG_DEBUG(cpustate, R4, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R5: WRITEREG_DEBUG(cpustate, R5, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R6: WRITEREG_DEBUG(cpustate, R6, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R7: WRITEREG_DEBUG(cpustate, R7, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R8: WRITEREG_DEBUG(cpustate, R8, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R9: WRITEREG_DEBUG(cpustate, R9, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R10: WRITEREG_DEBUG(cpustate, R10, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R11: WRITEREG_DEBUG(cpustate, R11, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R12: WRITEREG_DEBUG(cpustate, R12, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R13: WRITEREG_DEBUG(cpustate, R13, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R14: WRITEREG_DEBUG(cpustate, R14, info->i); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R15: WRITEREG_DEBUG(cpustate, R15, info->i); break;
}
}
@@ -4639,21 +4639,21 @@ void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms99xx_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6;/*8 with 990/12, 99105, 99110*/break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 10;/*TODO: compute this value*/break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(tms99xx_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6;/*8 with 990/12, 99105, 99110*/break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 10;/*TODO: compute this value*/break;
#if (USE_16_BIT_ACCESSORS)
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
#else
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
#endif
case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM:
#if (TMS99XX_MODEL == TI990_10_ID)
@@ -4670,11 +4670,11 @@ void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
info->i = 16;
#endif
break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO:
#if (TMS99XX_MODEL == TI990_10_ID)
/* 3 MSBs do exist, although they are not connected (don't ask...) */
@@ -4696,7 +4696,7 @@ void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
info->i = 15;
#endif
break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
/* not implemented */
/* case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = get_irq_line(INPUT_LINE_NMI); break;
@@ -4704,7 +4704,7 @@ void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
case CPUINFO_INT_INPUT_STATE + 1: info->i = get_irq_line(1); break;
case CPUINFO_INT_INPUT_STATE + 2: info->i = get_irq_line(2); break;*/
- case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
+ case CPUINFO_INT_PREVIOUSPC: /* not implemented */ break;
#if (TMS99XX_MODEL == TI990_10_ID)
case CPUINFO_INT_PC:
@@ -4735,44 +4735,44 @@ void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
#else
case CPUINFO_INT_PC:
#endif
- case CPUINFO_INT_REGISTER + TMS9900_PC: info->i = cpustate->PC; break;
- case CPUINFO_INT_REGISTER + TMS9900_IR: info->i = cpustate->IR; break;
+ case CPUINFO_INT_REGISTER + TMS9900_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + TMS9900_IR: info->i = cpustate->IR; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + TMS9900_WP: info->i = cpustate->WP; break;
- case CPUINFO_INT_REGISTER + TMS9900_STATUS: setstat(cpustate); info->i = cpustate->STATUS; break;
- case CPUINFO_INT_REGISTER + TMS9900_R0: info->i = READREG_DEBUG(cpustate, R0); break;
- case CPUINFO_INT_REGISTER + TMS9900_R1: info->i = READREG_DEBUG(cpustate, R1); break;
- case CPUINFO_INT_REGISTER + TMS9900_R2: info->i = READREG_DEBUG(cpustate, R2); break;
- case CPUINFO_INT_REGISTER + TMS9900_R3: info->i = READREG_DEBUG(cpustate, R3); break;
- case CPUINFO_INT_REGISTER + TMS9900_R4: info->i = READREG_DEBUG(cpustate, R4); break;
- case CPUINFO_INT_REGISTER + TMS9900_R5: info->i = READREG_DEBUG(cpustate, R5); break;
- case CPUINFO_INT_REGISTER + TMS9900_R6: info->i = READREG_DEBUG(cpustate, R6); break;
- case CPUINFO_INT_REGISTER + TMS9900_R7: info->i = READREG_DEBUG(cpustate, R7); break;
- case CPUINFO_INT_REGISTER + TMS9900_R8: info->i = READREG_DEBUG(cpustate, R8); break;
- case CPUINFO_INT_REGISTER + TMS9900_R9: info->i = READREG_DEBUG(cpustate, R9); break;
- case CPUINFO_INT_REGISTER + TMS9900_R10: info->i = READREG_DEBUG(cpustate, R10); break;
- case CPUINFO_INT_REGISTER + TMS9900_R11: info->i = READREG_DEBUG(cpustate, R11); break;
- case CPUINFO_INT_REGISTER + TMS9900_R12: info->i = READREG_DEBUG(cpustate, R12); break;
- case CPUINFO_INT_REGISTER + TMS9900_R13: info->i = READREG_DEBUG(cpustate, R13); break;
- case CPUINFO_INT_REGISTER + TMS9900_R14: info->i = READREG_DEBUG(cpustate, R14); break;
- case CPUINFO_INT_REGISTER + TMS9900_R15: info->i = READREG_DEBUG(cpustate, R15); break;
+ case CPUINFO_INT_REGISTER + TMS9900_WP: info->i = cpustate->WP; break;
+ case CPUINFO_INT_REGISTER + TMS9900_STATUS: setstat(cpustate); info->i = cpustate->STATUS; break;
+ case CPUINFO_INT_REGISTER + TMS9900_R0: info->i = READREG_DEBUG(cpustate, R0); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R1: info->i = READREG_DEBUG(cpustate, R1); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R2: info->i = READREG_DEBUG(cpustate, R2); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R3: info->i = READREG_DEBUG(cpustate, R3); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R4: info->i = READREG_DEBUG(cpustate, R4); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R5: info->i = READREG_DEBUG(cpustate, R5); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R6: info->i = READREG_DEBUG(cpustate, R6); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R7: info->i = READREG_DEBUG(cpustate, R7); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R8: info->i = READREG_DEBUG(cpustate, R8); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R9: info->i = READREG_DEBUG(cpustate, R9); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R10: info->i = READREG_DEBUG(cpustate, R10); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R11: info->i = READREG_DEBUG(cpustate, R11); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R12: info->i = READREG_DEBUG(cpustate, R12); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R13: info->i = READREG_DEBUG(cpustate, R13); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R14: info->i = READREG_DEBUG(cpustate, R14); break;
+ case CPUINFO_INT_REGISTER + TMS9900_R15: info->i = READREG_DEBUG(cpustate, R15); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms99xx); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms99xx); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms99xx); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms99xx); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms99xx); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms99xx); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(tms99xx); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(tms99xx); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(tms99xx); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(tms99xx); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(tms99xx); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(tms99xx); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, TMS99XX_device_get_name); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments 9900L"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "C TMS9900 emulator by Edward Swartz, initially converted for Mame by M.Coates, updated by R. Nabet"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, TMS99XX_device_get_name); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Texas Instruments 9900L"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "2.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "C TMS9900 emulator by Edward Swartz, initially converted for Mame by M.Coates, updated by R. Nabet"); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
@@ -4794,26 +4794,26 @@ void TMS99XX_GET_INFO(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
cpustate->WP & 0x0001 ? 'I':'.');
break;
- case CPUINFO_STR_REGISTER + TMS9900_PC: sprintf(info->s, "PC :%04X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + TMS9900_IR: sprintf(info->s, "IR :%04X", cpustate->IR); break;
- case CPUINFO_STR_REGISTER + TMS9900_WP: sprintf(info->s, "WP :%04X", cpustate->WP); break;
- case CPUINFO_STR_REGISTER + TMS9900_STATUS: sprintf(info->s, "ST :%04X", cpustate->STATUS); break;
-
- case CPUINFO_STR_REGISTER + TMS9900_R0: sprintf(info->s, "R0 :%04X", READREG_DEBUG(cpustate, R0)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R1: sprintf(info->s, "R1 :%04X", READREG_DEBUG(cpustate, R1)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R2: sprintf(info->s, "R2 :%04X", READREG_DEBUG(cpustate, R2)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R3: sprintf(info->s, "R3 :%04X", READREG_DEBUG(cpustate, R3)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R4: sprintf(info->s, "R4 :%04X", READREG_DEBUG(cpustate, R4)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R5: sprintf(info->s, "R5 :%04X", READREG_DEBUG(cpustate, R5)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R6: sprintf(info->s, "R6 :%04X", READREG_DEBUG(cpustate, R6)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R7: sprintf(info->s, "R7 :%04X", READREG_DEBUG(cpustate, R7)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R8: sprintf(info->s, "R8 :%04X", READREG_DEBUG(cpustate, R8)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R9: sprintf(info->s, "R9 :%04X", READREG_DEBUG(cpustate, R9)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R10: sprintf(info->s, "R10:%04X", READREG_DEBUG(cpustate, R10)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R11: sprintf(info->s, "R11:%04X", READREG_DEBUG(cpustate, R11)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R12: sprintf(info->s, "R12:%04X", READREG_DEBUG(cpustate, R12)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R13: sprintf(info->s, "R13:%04X", READREG_DEBUG(cpustate, R13)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R14: sprintf(info->s, "R14:%04X", READREG_DEBUG(cpustate, R14)); break;
- case CPUINFO_STR_REGISTER + TMS9900_R15: sprintf(info->s, "R15:%04X", READREG_DEBUG(cpustate, R15)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_PC: sprintf(info->s, "PC :%04X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + TMS9900_IR: sprintf(info->s, "IR :%04X", cpustate->IR); break;
+ case CPUINFO_STR_REGISTER + TMS9900_WP: sprintf(info->s, "WP :%04X", cpustate->WP); break;
+ case CPUINFO_STR_REGISTER + TMS9900_STATUS: sprintf(info->s, "ST :%04X", cpustate->STATUS); break;
+
+ case CPUINFO_STR_REGISTER + TMS9900_R0: sprintf(info->s, "R0 :%04X", READREG_DEBUG(cpustate, R0)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R1: sprintf(info->s, "R1 :%04X", READREG_DEBUG(cpustate, R1)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R2: sprintf(info->s, "R2 :%04X", READREG_DEBUG(cpustate, R2)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R3: sprintf(info->s, "R3 :%04X", READREG_DEBUG(cpustate, R3)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R4: sprintf(info->s, "R4 :%04X", READREG_DEBUG(cpustate, R4)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R5: sprintf(info->s, "R5 :%04X", READREG_DEBUG(cpustate, R5)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R6: sprintf(info->s, "R6 :%04X", READREG_DEBUG(cpustate, R6)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R7: sprintf(info->s, "R7 :%04X", READREG_DEBUG(cpustate, R7)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R8: sprintf(info->s, "R8 :%04X", READREG_DEBUG(cpustate, R8)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R9: sprintf(info->s, "R9 :%04X", READREG_DEBUG(cpustate, R9)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R10: sprintf(info->s, "R10:%04X", READREG_DEBUG(cpustate, R10)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R11: sprintf(info->s, "R11:%04X", READREG_DEBUG(cpustate, R11)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R12: sprintf(info->s, "R12:%04X", READREG_DEBUG(cpustate, R12)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R13: sprintf(info->s, "R13:%04X", READREG_DEBUG(cpustate, R13)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R14: sprintf(info->s, "R14:%04X", READREG_DEBUG(cpustate, R14)); break;
+ case CPUINFO_STR_REGISTER + TMS9900_R15: sprintf(info->s, "R15:%04X", READREG_DEBUG(cpustate, R15)); break;
}
}
diff --git a/src/emu/cpu/tms9900/99xxstat.h b/src/emu/cpu/tms9900/99xxstat.h
index bde84b39928..84c8935e167 100644
--- a/src/emu/cpu/tms9900/99xxstat.h
+++ b/src/emu/cpu/tms9900/99xxstat.h
@@ -480,4 +480,3 @@ INLINE UINT16 setst_sla_laeco(tms99xx_state *cpustate, UINT16 a, UINT16 c)
/***********************************************************************/
-
diff --git a/src/emu/cpu/tms9900/tms9900.h b/src/emu/cpu/tms9900/tms9900.h
index f80f452a5f9..b50671f51c7 100644
--- a/src/emu/cpu/tms9900/tms9900.h
+++ b/src/emu/cpu/tms9900/tms9900.h
@@ -83,10 +83,10 @@ enum
TMS99110A_ID = 12
};
-#define MCFG_TMS99xx_ADD(_tag, _device, _clock, _prgmap, _iomap, _config) \
- MCFG_DEVICE_ADD(_tag, _device, _clock) \
- MCFG_DEVICE_PROGRAM_MAP(_prgmap) \
- MCFG_DEVICE_IO_MAP(_iomap) \
+#define MCFG_TMS99xx_ADD(_tag, _device, _clock, _prgmap, _iomap, _config) \
+ MCFG_DEVICE_ADD(_tag, _device, _clock) \
+ MCFG_DEVICE_PROGRAM_MAP(_prgmap) \
+ MCFG_DEVICE_IO_MAP(_iomap) \
MCFG_DEVICE_CONFIG(_config)
enum
@@ -103,7 +103,7 @@ static const char opname[][5] =
"CI ", "CB ", "CKOF", "CKON", "CLR ", "COC ", "CZC ", "DEC ", "DECT", "DIV ",
"IDLE", "INC ", "INCT", "INV ", "JEQ ", "JGT ", "JH ", "JHE ", "JL ", "JLE ",
"JLT ", "JMP ", "JNC ", "JNE ", "JNO ", "JOC ", "JOP ", "LDCR", "LI ", "LIMI",
- "LREX", "LWPI", "MOV ", "MOVB", "MPY ", "NEG ", "ORI ", "RSET", "RTWP", "S ",
+ "LREX", "LWPI", "MOV ", "MOVB", "MPY ", "NEG ", "ORI ", "RSET", "RTWP", "S ",
"SB ", "SBO ", "SBZ ", "SETO", "SLA ", "SOC ", "SOCB", "SRA ", "SRC ", "SRL ",
"STCR", "STST", "STWP", "SWPB", "SZC ", "SZCB", "TB ", "X ", "XOP ", "XOR ",
"*int"
@@ -111,12 +111,12 @@ static const char opname[][5] =
struct tms99xx_config
{
- devcb_write8 external_callback;
- devcb_read8 irq_level;
- devcb_write_line instruction_acquisition;
- devcb_write_line clock_out;
- devcb_write_line wait_line;
- devcb_write_line holda_line;
+ devcb_write8 external_callback;
+ devcb_read8 irq_level;
+ devcb_write_line instruction_acquisition;
+ devcb_write_line clock_out;
+ devcb_write_line wait_line;
+ devcb_write_line holda_line;
};
#define TMS99xx_CONFIG(name) \
@@ -141,57 +141,57 @@ public:
protected:
// device-level overrides
- virtual void device_start();
- virtual void device_stop();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_stop();
+ virtual void device_reset();
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const;
- virtual UINT32 execute_max_cycles() const;
- virtual UINT32 execute_input_lines() const;
- virtual void execute_set_input(int irqline, int state);
- virtual void execute_run();
+ virtual UINT32 execute_min_cycles() const;
+ virtual UINT32 execute_max_cycles() const;
+ virtual UINT32 execute_input_lines() const;
+ virtual void execute_set_input(int irqline, int state);
+ virtual void execute_run();
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const;
- virtual UINT32 disasm_max_opcode_bytes() const;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
+ virtual UINT32 disasm_min_opcode_bytes() const;
+ virtual UINT32 disasm_max_opcode_bytes() const;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
const address_space_config* memory_space_config(address_spacenum spacenum) const;
// Let these methods be overloaded by the TMS9980.
- virtual void mem_read(void);
- virtual void mem_write(void);
- virtual void acquire_instruction(void);
- void decode(UINT16 inst);
+ virtual void mem_read(void);
+ virtual void mem_write(void);
+ virtual void acquire_instruction(void);
+ void decode(UINT16 inst);
- const address_space_config m_program_config;
- const address_space_config m_io_config;
- address_space* m_prgspace;
- address_space* m_cru;
+ const address_space_config m_program_config;
+ const address_space_config m_io_config;
+ address_space* m_prgspace;
+ address_space* m_cru;
- virtual UINT16 read_workspace_register_debug(int reg);
- virtual void write_workspace_register_debug(int reg, UINT16 data);
+ virtual UINT16 read_workspace_register_debug(int reg);
+ virtual void write_workspace_register_debug(int reg, UINT16 data);
// Cycle counter
- int m_icount;
+ int m_icount;
// TMS9900 hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ UINT16 WP; // Workspace pointer
+ UINT16 PC; // Program counter
+ UINT16 ST; // Status register
// Internal register
- UINT16 IR; // Instruction register
+ UINT16 IR; // Instruction register
// Stored address
- UINT16 m_address;
+ UINT16 m_address;
// Stores the recently read word or the word to be written
- UINT16 m_current_value;
+ UINT16 m_current_value;
// Decoded command
- UINT16 m_command;
+ UINT16 m_command;
// Is it a byte operation? Only format 1 commands with the byte flag set
// and CRU commands with less than 9 bits to transfer are byte operations.
@@ -203,57 +203,57 @@ protected:
// For multi-pass operations. For instance, memory word accesses are
// executed as two consecutive byte accesses. CRU accesses are repeated
// single-bit accesses. (Needed for TMS9980)
- int m_pass;
+ int m_pass;
// Data bus width. Needed for TMS9980.
- int m_databus_width;
+ int m_databus_width;
// Needed for TMS9980
- bool m_lowbyte;
+ bool m_lowbyte;
// Check the READY line?
- bool m_check_ready;
+ bool m_check_ready;
// Max address
const UINT16 m_prgaddr_mask;
const UINT16 m_cruaddr_mask;
- bool m_load_state;
- bool m_irq_state;
- bool m_reset;
+ bool m_load_state;
+ bool m_irq_state;
+ bool m_reset;
// Determine the interrupt level using the IC0-IC2/3 lines
virtual int get_intlevel(int state);
// Interrupt level as acquired from input lines (TMS9900: IC0-IC3, TMS9980: IC0-IC2)
// We assume all values right-justified, i.e. TMS9980 also counts up by one
- int m_irq_level;
+ int m_irq_level;
// Used to display the number of consumed cycles in the log.
- int m_first_cycle;
+ int m_first_cycle;
// Signal to the outside world that we are now getting an instruction
- devcb_resolved_write_line m_iaq_line;
+ devcb_resolved_write_line m_iaq_line;
// Get the value of the interrupt level lines
- devcb_resolved_read8 m_get_intlevel;
+ devcb_resolved_read8 m_get_intlevel;
private:
// Indicates if this is a byte-oriented command
- inline bool byte_operation();
+ inline bool byte_operation();
// Processor states
- bool m_idle_state;
- bool m_ready_state;
- bool m_wait_state;
- bool m_hold_state;
+ bool m_idle_state;
+ bool m_ready_state;
+ bool m_wait_state;
+ bool m_hold_state;
// State / debug management
- UINT16 m_state_any;
+ UINT16 m_state_any;
static const char* s_statename[];
- void state_import(const device_state_entry &entry);
- void state_export(const device_state_entry &entry);
- void state_string_export(const device_state_entry &entry, astring &string);
+ void state_import(const device_state_entry &entry);
+ void state_export(const device_state_entry &entry);
+ void state_string_export(const device_state_entry &entry, astring &string);
// Interrupt handling
void service_interrupt();
@@ -272,10 +272,10 @@ private:
// Opcode list entry
struct tms_instruction
{
- UINT16 opcode;
- int id;
- int format;
- microprogram prog; // Microprogram
+ UINT16 opcode;
+ int id;
+ int format;
+ microprogram prog; // Microprogram
};
// Lookup table entry
@@ -286,10 +286,10 @@ private:
};
// Pointer to the lookup table
- lookup_entry* m_command_lookup_table;
+ lookup_entry* m_command_lookup_table;
// List of allocated tables (used for easy clean-up on exit)
- lookup_entry* m_lotables[32];
+ lookup_entry* m_lotables[32];
// List of pointers for micro-operations
static const tms99xx_device::ophandler s_microoperation[];
@@ -298,74 +298,74 @@ private:
static const tms99xx_device::tms_instruction s_command[];
// Micro-operation declarations
- void register_read(void);
- void register_write(void);
- void cru_input_operation(void);
- void cru_output_operation(void);
- void data_derivation_subprogram(void);
- void return_from_subprogram(void);
- void command_completed(void);
-
- void alu_nop(void);
- void alu_clear(void);
- void alu_source(void);
- void alu_setaddr(void);
- void alu_addone(void);
- void alu_setaddr_addone(void);
- void alu_pcaddr_advance(void);
- void alu_add_register(void);
-
- void alu_imm(void);
- void alu_reg(void);
-
- void alu_f1(void);
- void alu_comp(void);
- void alu_f3(void);
- void alu_multiply(void);
- void alu_divide(void);
- void alu_xop(void);
- void alu_clr_swpb(void);
- void alu_abs(void);
- void alu_x(void);
- void alu_b(void);
- void alu_bl(void);
- void alu_blwp(void);
- void alu_ldcr(void);
- void alu_stcr(void);
- void alu_sbz_sbo(void);
- void alu_tb(void);
- void alu_jmp(void);
- void alu_shift(void);
- void alu_ai_ori(void);
- void alu_ci(void);
- void alu_li(void);
- void alu_lwpi(void);
- void alu_limi(void);
- void alu_stwp_stst(void);
- void alu_external(void);
- void alu_rtwp(void);
- void alu_int(void);
-
- void abort_operation(void);
+ void register_read(void);
+ void register_write(void);
+ void cru_input_operation(void);
+ void cru_output_operation(void);
+ void data_derivation_subprogram(void);
+ void return_from_subprogram(void);
+ void command_completed(void);
+
+ void alu_nop(void);
+ void alu_clear(void);
+ void alu_source(void);
+ void alu_setaddr(void);
+ void alu_addone(void);
+ void alu_setaddr_addone(void);
+ void alu_pcaddr_advance(void);
+ void alu_add_register(void);
+
+ void alu_imm(void);
+ void alu_reg(void);
+
+ void alu_f1(void);
+ void alu_comp(void);
+ void alu_f3(void);
+ void alu_multiply(void);
+ void alu_divide(void);
+ void alu_xop(void);
+ void alu_clr_swpb(void);
+ void alu_abs(void);
+ void alu_x(void);
+ void alu_b(void);
+ void alu_bl(void);
+ void alu_blwp(void);
+ void alu_ldcr(void);
+ void alu_stcr(void);
+ void alu_sbz_sbo(void);
+ void alu_tb(void);
+ void alu_jmp(void);
+ void alu_shift(void);
+ void alu_ai_ori(void);
+ void alu_ci(void);
+ void alu_li(void);
+ void alu_lwpi(void);
+ void alu_limi(void);
+ void alu_stwp_stst(void);
+ void alu_external(void);
+ void alu_rtwp(void);
+ void alu_int(void);
+
+ void abort_operation(void);
// Micro-operation
- UINT8 m_op;
+ UINT8 m_op;
// Micro-operation program counter (as opposed to the program counter PC)
- int MPC;
+ int MPC;
// Current microprogram
- const UINT8* m_program;
+ const UINT8* m_program;
// Calling microprogram (used when data derivation is called)
- const UINT8* m_caller;
- int m_caller_MPC;
+ const UINT8* m_caller;
+ int m_caller_MPC;
// State of the micro-operation. Needed for repeated ALU calls.
- int m_state;
+ int m_state;
// Has HOLD been acknowledged yet?
- bool m_hold_acknowledged;
+ bool m_hold_acknowledged;
// Signal the wait state via the external line
inline void set_wait_state(bool state);
@@ -382,32 +382,32 @@ private:
// Intermediate storage for the source operand
UINT16 m_source_address;
UINT16 m_source_value;
- UINT16 m_address_saved;
+ UINT16 m_address_saved;
// Another copy of the address
- UINT16 m_address_copy;
+ UINT16 m_address_copy;
// Stores the recently read register contents
- UINT16 m_register_contents;
+ UINT16 m_register_contents;
// Stores the register number for the next register access
- int m_regnumber;
+ int m_regnumber;
// CRU support: Stores the CRU address
- UINT16 m_cru_address;
+ UINT16 m_cru_address;
// CRU support: Stores the number of bits to be transferred
- int m_count;
+ int m_count;
// Copy of the value
- UINT16 m_value_copy;
+ UINT16 m_value_copy;
// Another internal register, storing intermediate values
// Using 32 bits to support MPY
- UINT32 m_value;
+ UINT32 m_value;
// For two-argument commands. Indicates whether this is the second operand.
- bool m_get_destination;
+ bool m_get_destination;
// Status register update
inline void set_status_bit(int bit, bool state);
@@ -436,18 +436,18 @@ private:
// We could realize this via the CRU access as well, but the data bus access
// is not that simple to emulate. For the sake of homogenity between the
// chip emulations we use a dedicated callback.
- devcb_resolved_write8 m_external_operation;
+ devcb_resolved_write8 m_external_operation;
// Clock output. This is not a pin of the TMS9900 because the TMS9900
// needs an external clock, and usually one of those external lines is
// used for this purpose.
- devcb_resolved_write_line m_clock_out_line;
+ devcb_resolved_write_line m_clock_out_line;
// Wait output. When asserted (high), the CPU is in a wait state.
- devcb_resolved_write_line m_wait_line;
+ devcb_resolved_write_line m_wait_line;
// HOLD Acknowledge line. When asserted (high), the CPU is in HOLD state.
- devcb_resolved_write_line m_holda_line;
+ devcb_resolved_write_line m_holda_line;
};
/*****************************************************************************/
diff --git a/src/emu/cpu/tms9900/tms9900l.h b/src/emu/cpu/tms9900/tms9900l.h
index af8690f78d3..7f6573824d9 100644
--- a/src/emu/cpu/tms9900/tms9900l.h
+++ b/src/emu/cpu/tms9900/tms9900l.h
@@ -11,32 +11,32 @@
/*#define TI990_9_ID 0*//* early implementation, used in a few real-world applications, 1974 */
- /* very similar to mapper-less 990/10 and tms9900, but the Load process */
- /* is different */
- /* ("ti990/9" is likely to be a nickname) */
-#define TI990_10_ID 1 /* original multi-chip implementation for minicomputer systems, 1975 */
+ /* very similar to mapper-less 990/10 and tms9900, but the Load process */
+ /* is different */
+ /* ("ti990/9" is likely to be a nickname) */
+#define TI990_10_ID 1 /* original multi-chip implementation for minicomputer systems, 1975 */
/*#define TI990_12_ID 2*//* multi-chip implementation, faster than 990/10. huge instruction set */
- /* (144 instructions, with up to 16 additional custom instructions simulteanously) */
- /* 1979 (or before) */
+ /* (144 instructions, with up to 16 additional custom instructions simulteanously) */
+ /* 1979 (or before) */
#define TMS9900_ID 3 /* mono-chip implementation, 1976 */
#define TMS9940_ID 4 /* microcontroller with 2kb ROM, 128b RAM, decrementer, CRU bus, 1979 */
#define TMS9980_ID 5 /* 8-bit variant of tms9900. Two distinct chips actually : tms9980a, */
- /* and tms9981 with an extra clock and simplified power supply */
+ /* and tms9981 with an extra clock and simplified power supply */
#define TMS9985_ID 6 /* 9940 with 8kb ROM, 256b RAM, and a 8-bit external bus, c. 1978 (never released) */
#define TMS9989_ID 7 /* improved 9980, used in bombs, missiles, and other *nice* hardware */
/*#define SBP68689_ID 8*//* improved 9989, built as an ASIC as 9989 was running scarce */
#define TMS9995_ID 9 /* tms9985-like, with many improvements (but no ROM) */
#define TMS99000_ID 10/* improved mono-chip implementation, meant to replace 990/10, 1981 */
- /* This chip is available in several variants (tms99105, tms99110...), */
- /* which are similar but emulate additional instructions thanks */
- /* to the so-called macrostore feature. */
-#define TMS99105A_ID 11
-#define TMS99110A_ID 12
+ /* This chip is available in several variants (tms99105, tms99110...), */
+ /* which are similar but emulate additional instructions thanks */
+ /* to the so-called macrostore feature. */
+#define TMS99105A_ID 11
+#define TMS99110A_ID 12
/* NPW 25-May-2002 - Added these to get it to compile under windows */
-#define TI9940_ID TMS9940_ID
-#define TI9985_ID TMS9985_ID
+#define TI9940_ID TMS9940_ID
+#define TI9985_ID TMS9985_ID
enum
@@ -63,11 +63,11 @@ DECLARE_LEGACY_CPU_DEVICE(TI990_10L, ti990_10l);
struct ti990_10reset_param
{
- ti99xx_idle_func idle_callback;
- ti99xx_rset_func rset_callback;
- ti99xx_lrex_func lrex_callback;
- ti99xx_ckon_ckof_func ckon_ckof_callback;
- ti99xx_error_interrupt_func error_interrupt_callback;
+ ti99xx_idle_func idle_callback;
+ ti99xx_rset_func rset_callback;
+ ti99xx_lrex_func lrex_callback;
+ ti99xx_ckon_ckof_func ckon_ckof_callback;
+ ti99xx_error_interrupt_func error_interrupt_callback;
};
/* accessor for the internal ROM */
@@ -89,7 +89,7 @@ DECLARE_LEGACY_CPU_DEVICE(TMS9900L, tms9900l);
*/
struct tms9900reset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
@@ -101,7 +101,7 @@ struct tms9900reset_param
*/
struct tms9940reset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
@@ -113,7 +113,7 @@ DECLARE_LEGACY_CPU_DEVICE(TMS9980L, tms9980al);
*/
struct tms9980areset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
@@ -125,7 +125,7 @@ struct tms9980areset_param
*/
struct tms9985reset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
@@ -137,7 +137,7 @@ struct tms9985reset_param
*/
struct tms9989reset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
@@ -150,14 +150,14 @@ DECLARE_LEGACY_CPU_DEVICE(TMS9995L, tms9995l);
struct tms9995reset_param
{
/* auto_wait_state : a non-zero value makes tms9995 generate a wait state automatically on each
- memory access */
+ memory access */
int auto_wait_state;
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
/* on the tms9995-mp9537, internal RAM and decrementer register are
- disabled. This chip is used by the ti99/8 so that internal RAM does
- not prevent the mapper from working correctly. */
+ disabled. This chip is used by the ti99/8 so that internal RAM does
+ not prevent the mapper from working correctly. */
int is_mp9537;
};
@@ -177,7 +177,7 @@ extern DECLARE_WRITE8_HANDLER(tms9995_internal2_w);
*/
struct tms99000reset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
@@ -189,7 +189,7 @@ struct tms99000reset_param
*/
struct tms99105areset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
@@ -201,7 +201,7 @@ struct tms99105areset_param
*/
struct tms99110areset_param
{
- ti99xx_idle_func idle_callback;
+ ti99xx_idle_func idle_callback;
};
diff --git a/src/emu/cpu/tms9900/tms9980a.c b/src/emu/cpu/tms9900/tms9980a.c
index f790f77ca85..f6f15e7a32d 100644
--- a/src/emu/cpu/tms9900/tms9980a.c
+++ b/src/emu/cpu/tms9900/tms9980a.c
@@ -160,7 +160,7 @@ void tms9980a_device::mem_read()
if (VERBOSE>7) LOG("tms9980a: memory read high byte %04x -> %02x\n", m_address & m_prgaddr_mask, value);
m_current_value = (value << 8) & 0xff00;
m_lowbyte = true;
- m_pass = 2; // make the CPU visit this method once more
+ m_pass = 2; // make the CPU visit this method once more
}
pulse_clock(2);
m_check_ready = true;
@@ -179,7 +179,7 @@ void tms9980a_device::mem_write()
m_prgspace->write_byte(m_address & 0x3ffe, (m_current_value >> 8)&0xff);
if (VERBOSE>7) LOG("tms9980a: memory write high byte %04x <- %02x\n", m_address & m_prgaddr_mask, (m_current_value >> 8)&0xff);
m_lowbyte = true;
- m_pass = 2; // make the CPU visit this method once more
+ m_pass = 2; // make the CPU visit this method once more
}
pulse_clock(2);
m_check_ready = true;
diff --git a/src/emu/cpu/tms9900/tms9980a.h b/src/emu/cpu/tms9900/tms9980a.h
index c1b0a8c723f..82f4eb29b51 100644
--- a/src/emu/cpu/tms9900/tms9980a.h
+++ b/src/emu/cpu/tms9900/tms9980a.h
@@ -11,10 +11,10 @@
#include "debugger.h"
#include "tms9900.h"
-#define MCFG_TMS9980A_ADD(_tag, _device, _clock, _prgmap, _iomap, _config) \
- MCFG_DEVICE_ADD(_tag, _device, _clock ) \
- MCFG_DEVICE_PROGRAM_MAP(_prgmap) \
- MCFG_DEVICE_IO_MAP(_iomap) \
+#define MCFG_TMS9980A_ADD(_tag, _device, _clock, _prgmap, _iomap, _config) \
+ MCFG_DEVICE_ADD(_tag, _device, _clock ) \
+ MCFG_DEVICE_PROGRAM_MAP(_prgmap) \
+ MCFG_DEVICE_IO_MAP(_iomap) \
MCFG_DEVICE_CONFIG(_config)
#define TMS9980A_CONFIG(name) \
@@ -27,25 +27,25 @@ public:
tms9980a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
- void mem_read(void);
- void mem_write(void);
- void acquire_instruction(void);
+ void mem_read(void);
+ void mem_write(void);
+ void acquire_instruction(void);
- UINT16 read_workspace_register_debug(int reg);
- void write_workspace_register_debug(int reg, UINT16 data);
+ UINT16 read_workspace_register_debug(int reg);
+ void write_workspace_register_debug(int reg, UINT16 data);
- UINT32 execute_min_cycles() const;
- UINT32 execute_max_cycles() const;
- UINT32 execute_input_lines() const;
- void execute_set_input(int irqline, int state);
+ UINT32 execute_min_cycles() const;
+ UINT32 execute_max_cycles() const;
+ UINT32 execute_input_lines() const;
+ void execute_set_input(int irqline, int state);
- UINT32 disasm_min_opcode_bytes() const;
- UINT32 disasm_max_opcode_bytes() const;
- offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
- address_space_config m_program_config80;
- address_space_config m_io_config80;
+ UINT32 disasm_min_opcode_bytes() const;
+ UINT32 disasm_max_opcode_bytes() const;
+ offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
+ address_space_config m_program_config80;
+ address_space_config m_io_config80;
- int get_intlevel(int state);
+ int get_intlevel(int state);
};
// device type definition
diff --git a/src/emu/cpu/tms9900/tms9995.h b/src/emu/cpu/tms9900/tms9995.h
index bf084773067..731a5f7a434 100644
--- a/src/emu/cpu/tms9900/tms9995.h
+++ b/src/emu/cpu/tms9900/tms9995.h
@@ -41,10 +41,10 @@ enum
TMS99110A_ID = 12
};
-#define MCFG_TMS9995_ADD(_tag, _device, _clock, _prgmap, _iomap, _config) \
- MCFG_DEVICE_ADD(_tag, _device, _clock / 4.0) \
- MCFG_DEVICE_PROGRAM_MAP(_prgmap) \
- MCFG_DEVICE_IO_MAP(_iomap) \
+#define MCFG_TMS9995_ADD(_tag, _device, _clock, _prgmap, _iomap, _config) \
+ MCFG_DEVICE_ADD(_tag, _device, _clock / 4.0) \
+ MCFG_DEVICE_PROGRAM_MAP(_prgmap) \
+ MCFG_DEVICE_IO_MAP(_iomap) \
MCFG_DEVICE_CONFIG(_config)
enum
@@ -62,13 +62,13 @@ enum
*/
struct tms9995_config
{
- devcb_write8 external_callback;
- devcb_write_line iaq_line;
- devcb_write_line clock_out;
- devcb_write_line wait_line;
- devcb_write_line holda_line;
- int mode;
- int overflow;
+ devcb_write8 external_callback;
+ devcb_write_line iaq_line;
+ devcb_write_line clock_out;
+ devcb_write_line wait_line;
+ devcb_write_line holda_line;
+ int mode;
+ int overflow;
};
#define TMS9995_CONFIG(name) \
@@ -99,116 +99,116 @@ public:
protected:
// device-level overrides
- virtual void device_start();
- virtual void device_stop();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_stop();
+ virtual void device_reset();
// device_execute_interface overrides
- virtual UINT32 execute_min_cycles() const;
- virtual UINT32 execute_max_cycles() const;
- virtual UINT32 execute_input_lines() const;
- virtual void execute_set_input(int irqline, int state);
- virtual void execute_run();
+ virtual UINT32 execute_min_cycles() const;
+ virtual UINT32 execute_max_cycles() const;
+ virtual UINT32 execute_input_lines() const;
+ virtual void execute_set_input(int irqline, int state);
+ virtual void execute_run();
// device_disasm_interface overrides
- virtual UINT32 disasm_min_opcode_bytes() const;
- virtual UINT32 disasm_max_opcode_bytes() const;
- virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
+ virtual UINT32 disasm_min_opcode_bytes() const;
+ virtual UINT32 disasm_max_opcode_bytes() const;
+ virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
const address_space_config* memory_space_config(address_spacenum spacenum) const;
private:
// State / debug management
- UINT16 m_state_any;
+ UINT16 m_state_any;
static const char* s_statename[];
- void state_import(const device_state_entry &entry);
- void state_export(const device_state_entry &entry);
- void state_string_export(const device_state_entry &entry, astring &string);
- UINT16 read_workspace_register_debug(int reg);
- void write_workspace_register_debug(int reg, UINT16 data);
+ void state_import(const device_state_entry &entry);
+ void state_export(const device_state_entry &entry);
+ void state_string_export(const device_state_entry &entry, astring &string);
+ UINT16 read_workspace_register_debug(int reg);
+ void write_workspace_register_debug(int reg, UINT16 data);
// TMS9995 hardware registers
- UINT16 WP; // Workspace pointer
- UINT16 PC; // Program counter
- UINT16 ST; // Status register
+ UINT16 WP; // Workspace pointer
+ UINT16 PC; // Program counter
+ UINT16 ST; // Status register
// The TMS9995 has a prefetch feature which causes a wrong display of the PC.
// We use this additional member for the debugger only.
- UINT16 PC_debug;
+ UINT16 PC_debug;
// 256 bytes of onchip memory
- UINT8 m_onchip_memory[256];
+ UINT8 m_onchip_memory[256];
- const address_space_config m_program_config;
- const address_space_config m_io_config;
- address_space* m_prgspace;
- address_space* m_cru;
+ const address_space_config m_program_config;
+ const address_space_config m_io_config;
+ address_space* m_prgspace;
+ address_space* m_cru;
// Variant of the TMS9995 without internal RAM and decrementer
- bool m_mp9537;
+ bool m_mp9537;
// Processor states
- bool m_idle_state;
- bool m_nmi_state;
- bool m_irq_state;
- bool m_ready_state;
- bool m_wait_state;
- bool m_hold_state;
+ bool m_idle_state;
+ bool m_nmi_state;
+ bool m_irq_state;
+ bool m_ready_state;
+ bool m_wait_state;
+ bool m_hold_state;
// Auto-wait state generation
- bool m_auto_wait_state;
+ bool m_auto_wait_state;
// Cycle counter
- int m_icount;
+ int m_icount;
// The next memory access will address the low byte
- bool m_lowbyte;
+ bool m_lowbyte;
// Check the READY line?
- bool m_check_ready;
+ bool m_check_ready;
// Check the HOLD line
- bool m_check_hold;
+ bool m_check_hold;
// For multi-pass operations. For instance, memory word accesses are
// executed as two consecutive byte accesses. CRU accesses are repeated
// single-bit accesses.
- int m_pass;
+ int m_pass;
// For parity operations
- int m_parity;
+ int m_parity;
// For Format 1 instruction; determines whether the next operand address
// derivation is for the source or address operand
- bool m_get_destination;
+ bool m_get_destination;
// Used for situations when a command is byte-oriented, but the memory access
// must be word-oriented. Example: MOVB *R1,R0; we must read the full word
// from R1 to get the address.
- bool m_word_access;
+ bool m_word_access;
// Interrupt handling
- bool m_nmi_active;
- bool m_int1_active;
- bool m_int4_active;
- bool m_int_decrementer;
- bool m_int_overflow;
+ bool m_nmi_active;
+ bool m_int1_active;
+ bool m_int4_active;
+ bool m_int_decrementer;
+ bool m_int_overflow;
- bool m_reset;
- bool m_mid_flag;
+ bool m_reset;
+ bool m_mid_flag;
// Flag field
- int m_int_pending;
+ int m_int_pending;
// The TMS9995 is capable of raising an internal interrupt on
// arithmetic overflow, depending on the status register Overflow Enable bit.
// However, the specs also say that this feature is non-functional in the
// currently available chip. Thus we have an option to turn it off so that
// software will not change its behavior on overflows.
- bool m_check_overflow;
+ bool m_check_overflow;
// Service pending interrupts
- void service_interrupt();
+ void service_interrupt();
// Issue clock pulses. The TMS9995 uses one (output) clock cycle per machine cycle.
inline void pulse_clock(int count);
@@ -221,84 +221,84 @@ private:
// Only used for the DIV(S) operations. It seems sufficient to let the
// command terminate at this point, so this method just calls command_terminated.
- void abort_operation(void);
+ void abort_operation(void);
// Decode the given 16-bit value which has been retrieved by a prefetch or
// during an X operation.
- void decode(UINT16 inst);
+ void decode(UINT16 inst);
// Store the interrupt mask part of the ST. This is used when processing
// an interrupt, passing the new mask from the service_interrupt part to
// the program part.
- int m_intmask;
+ int m_intmask;
// Stored address
- UINT16 m_address;
+ UINT16 m_address;
// Stores the recently read word or the word to be written
- UINT16 m_current_value;
+ UINT16 m_current_value;
// Stores the value of the source operand in multi-operand instructions
- UINT16 m_source_value;
+ UINT16 m_source_value;
// During indexed addressing, this value is added to get the final address value.
- UINT16 m_address_add;
+ UINT16 m_address_add;
// During indirect/auto-increment addressing, this copy of the address must
// be preserved while writing the new value to the register.
- UINT16 m_address_saved;
+ UINT16 m_address_saved;
// Another copy of the address
- UINT16 m_address_copy;
+ UINT16 m_address_copy;
// Copy of the value
- UINT16 m_value_copy;
+ UINT16 m_value_copy;
// Stores the recent register number. Only used to pass the register
// number during the operand address derivation.
- int m_regnumber;
+ int m_regnumber;
// Stores the number of bits or shift operations
- int m_count;
+ int m_count;
// ============== Decrementer =======================
void trigger_decrementer();
// Start value
- UINT16 m_starting_count_storage_register;
+ UINT16 m_starting_count_storage_register;
// Current decrementer value.
- UINT16 m_decrementer_value;
+ UINT16 m_decrementer_value;
// ============== CRU support ======================
- UINT16 m_cru_address;
- UINT16 m_cru_value;
- bool m_cru_first_read;
- int m_cru_bits_left;
- UINT32 m_cru_read;
+ UINT16 m_cru_address;
+ UINT16 m_cru_value;
+ bool m_cru_first_read;
+ int m_cru_bits_left;
+ UINT32 m_cru_read;
// CPU-internal CRU flags
- bool m_flag[16];
+ bool m_flag[16];
// ============== Prefetch support =====================
struct decoded_instruction
{
- UINT16 IR;
- UINT16 command;
- const UINT8* program;
- bool byteop;
- int state;
+ UINT16 IR;
+ UINT16 command;
+ const UINT8* program;
+ bool byteop;
+ int state;
};
- int m_instindex;
+ int m_instindex;
// We implement the prefetch mechanism by two separate datasets for
// the decoded commands. When the previous command has completed, the
// pointer is just switched to the other one.
- tms9995_device::decoded_instruction m_decoded[2];
- tms9995_device::decoded_instruction* m_instruction;
+ tms9995_device::decoded_instruction m_decoded[2];
+ tms9995_device::decoded_instruction* m_instruction;
// ================ Microprogram support ========================
@@ -314,10 +314,10 @@ private:
// Opcode list entry
struct tms_instruction
{
- UINT16 opcode;
- int id;
- int format;
- microprogram prog; // Microprogram
+ UINT16 opcode;
+ int id;
+ int format;
+ microprogram prog; // Microprogram
};
// Lookup table entry
@@ -328,10 +328,10 @@ private:
};
// Pointer to the lookup table; the entry point for searching the command
- lookup_entry* m_command_lookup_table;
+ lookup_entry* m_command_lookup_table;
// List of allocated tables (used for easy clean-up on exit)
- lookup_entry* m_lotables[32];
+ lookup_entry* m_lotables[32];
// List of pointers for micro-operations
static const tms9995_device::ophandler s_microoperation[];
@@ -339,17 +339,17 @@ private:
static const tms9995_device::tms_instruction s_command[];
// Micro-operation program counter (as opposed to the program counter PC)
- int MPC;
+ int MPC;
// Calling microprogram (used when data derivation is called)
- const UINT8* m_caller;
- int m_caller_MPC;
+ const UINT8* m_caller;
+ int m_caller_MPC;
// Table of microprograms
static const microprogram mp_table[];
// Used to display the number of consumed cycles in the log.
- int m_first_cycle;
+ int m_first_cycle;
// Status register update
inline void set_status_bit(int bit, bool state);
@@ -423,22 +423,22 @@ private:
// We could realize this via the CRU access as well, but the data bus access
// is not that simple to emulate. For the sake of homogenity between the
// chip emulations we use a dedicated callback.
- devcb_resolved_write8 m_external_operation;
+ devcb_resolved_write8 m_external_operation;
// Signal to the outside world that we are now getting an instruction (IAQ).
// In the real hardware this line is shared with the HOLDA line, and the
// /MEMEN line is used to decide which signal we have on the line. We do not
// emulate the /MEMEN line, so we have to use two separate lines.
- devcb_resolved_write_line m_iaq_line;
+ devcb_resolved_write_line m_iaq_line;
// Clock output.
- devcb_resolved_write_line m_clock_out_line;
+ devcb_resolved_write_line m_clock_out_line;
// Wait output. When asserted (high), the CPU is in a wait state.
- devcb_resolved_write_line m_wait_line;
+ devcb_resolved_write_line m_wait_line;
// Asserted when the CPU is in a HOLD state
- devcb_resolved_write_line m_holda_line;
+ devcb_resolved_write_line m_holda_line;
};
unsigned Dasm9900(char *buffer, unsigned pc, int model_id, const UINT8 *oprom, const UINT8 *opram);
diff --git a/src/emu/cpu/uml.c b/src/emu/cpu/uml.c
index ac046c607de..246aac2a179 100644
--- a/src/emu/cpu/uml.c
+++ b/src/emu/cpu/uml.c
@@ -76,8 +76,8 @@ using namespace uml;
// DEBUGGING
//**************************************************************************
-#define VALIDATE_BACKEND (0)
-#define LOG_SIMPLIFICATIONS (0)
+#define VALIDATE_BACKEND (0)
+#define LOG_SIMPLIFICATIONS (0)
@@ -86,60 +86,60 @@ using namespace uml;
//**************************************************************************
// opcode validation condition/flag valid bitmasks
-#define OPFLAGS_NONE 0x00
-#define OPFLAGS_C FLAG_C
-#define OPFLAGS_SZ (FLAG_S | FLAG_Z)
-#define OPFLAGS_SZC (FLAG_S | FLAG_Z | FLAG_C)
-#define OPFLAGS_SZV (FLAG_S | FLAG_Z | FLAG_V)
-#define OPFLAGS_SZVC (FLAG_S | FLAG_Z | FLAG_V | FLAG_C)
-#define OPFLAGS_UZC (FLAG_U | FLAG_Z | FLAG_C)
-#define OPFLAGS_ALL 0x1f
-#define OPFLAGS_P1 0x81
-#define OPFLAGS_P2 0x82
-#define OPFLAGS_P3 0x83
-#define OPFLAGS_P4 0x84
+#define OPFLAGS_NONE 0x00
+#define OPFLAGS_C FLAG_C
+#define OPFLAGS_SZ (FLAG_S | FLAG_Z)
+#define OPFLAGS_SZC (FLAG_S | FLAG_Z | FLAG_C)
+#define OPFLAGS_SZV (FLAG_S | FLAG_Z | FLAG_V)
+#define OPFLAGS_SZVC (FLAG_S | FLAG_Z | FLAG_V | FLAG_C)
+#define OPFLAGS_UZC (FLAG_U | FLAG_Z | FLAG_C)
+#define OPFLAGS_ALL 0x1f
+#define OPFLAGS_P1 0x81
+#define OPFLAGS_P2 0x82
+#define OPFLAGS_P3 0x83
+#define OPFLAGS_P4 0x84
// parameter input/output states
-#define PIO_IN 0x01
-#define PIO_OUT 0x02
-#define PIO_INOUT (PIO_IN | PIO_OUT)
+#define PIO_IN 0x01
+#define PIO_OUT 0x02
+#define PIO_INOUT (PIO_IN | PIO_OUT)
// parameter sizes
-#define PSIZE_4 SIZE_DWORD
-#define PSIZE_8 SIZE_QWORD
-#define PSIZE_OP 0x80
-#define PSIZE_P1 0x81
-#define PSIZE_P2 0x82
-#define PSIZE_P3 0x83
-#define PSIZE_P4 0x84
+#define PSIZE_4 SIZE_DWORD
+#define PSIZE_8 SIZE_QWORD
+#define PSIZE_OP 0x80
+#define PSIZE_P1 0x81
+#define PSIZE_P2 0x82
+#define PSIZE_P3 0x83
+#define PSIZE_P4 0x84
// basic parameter types
-#define PTYPES_NONE 0
-#define PTYPES_IMM (1 << parameter::PTYPE_IMMEDIATE)
-#define PTYPES_IREG (1 << parameter::PTYPE_INT_REGISTER)
-#define PTYPES_FREG (1 << parameter::PTYPE_FLOAT_REGISTER)
-#define PTYPES_VREG (1 << parameter::PTYPE_VECTOR_REGISTER)
-#define PTYPES_MVAR (1 << parameter::PTYPE_MAPVAR)
-#define PTYPES_MEM (1 << parameter::PTYPE_MEMORY)
-#define PTYPES_SIZE (1 << parameter::PTYPE_SIZE)
-#define PTYPES_SCSIZE (1 << parameter::PTYPE_SIZE_SCALE)
-#define PTYPES_SPSIZE (1 << parameter::PTYPE_SIZE_SPACE)
-#define PTYPES_HANDLE (1 << parameter::PTYPE_CODE_HANDLE)
-#define PTYPES_LABEL (1 << parameter::PTYPE_CODE_LABEL)
-#define PTYPES_CFUNC (1 << parameter::PTYPE_C_FUNCTION)
-#define PTYPES_ROUND (1 << parameter::PTYPE_ROUNDING)
-#define PTYPES_STR (1 << parameter::PTYPE_STRING)
+#define PTYPES_NONE 0
+#define PTYPES_IMM (1 << parameter::PTYPE_IMMEDIATE)
+#define PTYPES_IREG (1 << parameter::PTYPE_INT_REGISTER)
+#define PTYPES_FREG (1 << parameter::PTYPE_FLOAT_REGISTER)
+#define PTYPES_VREG (1 << parameter::PTYPE_VECTOR_REGISTER)
+#define PTYPES_MVAR (1 << parameter::PTYPE_MAPVAR)
+#define PTYPES_MEM (1 << parameter::PTYPE_MEMORY)
+#define PTYPES_SIZE (1 << parameter::PTYPE_SIZE)
+#define PTYPES_SCSIZE (1 << parameter::PTYPE_SIZE_SCALE)
+#define PTYPES_SPSIZE (1 << parameter::PTYPE_SIZE_SPACE)
+#define PTYPES_HANDLE (1 << parameter::PTYPE_CODE_HANDLE)
+#define PTYPES_LABEL (1 << parameter::PTYPE_CODE_LABEL)
+#define PTYPES_CFUNC (1 << parameter::PTYPE_C_FUNCTION)
+#define PTYPES_ROUND (1 << parameter::PTYPE_ROUNDING)
+#define PTYPES_STR (1 << parameter::PTYPE_STRING)
// special parameter types
-#define PTYPES_PTR (PTYPES_MEM | 0x1000)
-#define PTYPES_STATE (PTYPES_MEM | 0x2000)
+#define PTYPES_PTR (PTYPES_MEM | 0x1000)
+#define PTYPES_STATE (PTYPES_MEM | 0x2000)
// combinations of types
-#define PTYPES_IRM (PTYPES_IREG | PTYPES_MEM)
-#define PTYPES_FRM (PTYPES_FREG | PTYPES_MEM)
-#define PTYPES_IMV (PTYPES_IMM | PTYPES_MVAR)
-#define PTYPES_IANY (PTYPES_IRM | PTYPES_IMV)
-#define PTYPES_FANY (PTYPES_FRM)
+#define PTYPES_IRM (PTYPES_IREG | PTYPES_MEM)
+#define PTYPES_FRM (PTYPES_FREG | PTYPES_MEM)
+#define PTYPES_IMV (PTYPES_IMM | PTYPES_MVAR)
+#define PTYPES_IANY (PTYPES_IRM | PTYPES_IMV)
+#define PTYPES_FANY (PTYPES_FRM)
@@ -148,12 +148,12 @@ using namespace uml;
//**************************************************************************
// macro to simplify the table
-#define PINFO(inout, size, types) { PIO_##inout, PSIZE_##size, PTYPES_##types }
-#define OPINFO0(op,str,sizes,cond,iflag,oflag,mflag) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { { 0 } } },
-#define OPINFO1(op,str,sizes,cond,iflag,oflag,mflag,p0) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0 } },
-#define OPINFO2(op,str,sizes,cond,iflag,oflag,mflag,p0,p1) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1 } },
-#define OPINFO3(op,str,sizes,cond,iflag,oflag,mflag,p0,p1,p2) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1, p2 } },
-#define OPINFO4(op,str,sizes,cond,iflag,oflag,mflag,p0,p1,p2,p3) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1, p2, p3 } },
+#define PINFO(inout, size, types) { PIO_##inout, PSIZE_##size, PTYPES_##types }
+#define OPINFO0(op,str,sizes,cond,iflag,oflag,mflag) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { { 0 } } },
+#define OPINFO1(op,str,sizes,cond,iflag,oflag,mflag,p0) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0 } },
+#define OPINFO2(op,str,sizes,cond,iflag,oflag,mflag,p0,p1) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1 } },
+#define OPINFO3(op,str,sizes,cond,iflag,oflag,mflag,p0,p1,p2) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1, p2 } },
+#define OPINFO4(op,str,sizes,cond,iflag,oflag,mflag,p0,p1,p2,p3) { OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1, p2, p3 } },
// opcode validation table
const opcode_info instruction::s_opcode_info_table[OP_MAX] =
@@ -285,9 +285,9 @@ inline UINT64 rol64(UINT64 source, UINT8 count)
uml::code_handle::code_handle(drcuml_state &drcuml, const char *name)
: m_code(reinterpret_cast<drccodeptr *>(drcuml.cache().alloc_near(sizeof(drccodeptr)))),
- m_string(name),
- m_next(NULL),
- m_drcuml(drcuml)
+ m_string(name),
+ m_next(NULL),
+ m_drcuml(drcuml)
{
if (m_code == NULL)
throw std::bad_alloc();
@@ -318,10 +318,10 @@ void uml::code_handle::set_codeptr(drccodeptr code)
uml::instruction::instruction()
: m_opcode(OP_INVALID),
- m_condition(COND_ALWAYS),
- m_flags(0),
- m_size(4),
- m_numparams(0)
+ m_condition(COND_ALWAYS),
+ m_flags(0),
+ m_size(4),
+ m_numparams(0)
{
}
@@ -491,11 +491,11 @@ void uml::instruction::simplify()
if (m_param[1].is_immediate())
switch (m_param[2].size())
{
- case SIZE_BYTE: convert_to_mov_immediate((INT8)m_param[1].immediate()); break;
- case SIZE_WORD: convert_to_mov_immediate((INT16)m_param[1].immediate()); break;
- case SIZE_DWORD: convert_to_mov_immediate((INT32)m_param[1].immediate()); break;
- case SIZE_QWORD: convert_to_mov_immediate((INT64)m_param[1].immediate()); break;
- case SIZE_DQWORD: fatalerror("Invalid SEXT target size\n"); break;
+ case SIZE_BYTE: convert_to_mov_immediate((INT8)m_param[1].immediate()); break;
+ case SIZE_WORD: convert_to_mov_immediate((INT16)m_param[1].immediate()); break;
+ case SIZE_DWORD: convert_to_mov_immediate((INT32)m_param[1].immediate()); break;
+ case SIZE_QWORD: convert_to_mov_immediate((INT64)m_param[1].immediate()); break;
+ case SIZE_DQWORD: fatalerror("Invalid SEXT target size\n"); break;
}
break;
@@ -767,14 +767,14 @@ void uml::instruction::simplify()
}
/*
- if (LOG_SIMPLIFICATIONS && memcmp(&orig, inst, sizeof(orig)) != 0)
- {
- astring disasm1, disasm2;
- orig.disasm(disasm1, block->drcuml);
- inst->disasm(disasm2, block->drcuml);
- mame_printf_debug("Simplified: %-50.50s -> %s\n", disasm1.cstr(), disasm2.cstr());
- }
- */
+ if (LOG_SIMPLIFICATIONS && memcmp(&orig, inst, sizeof(orig)) != 0)
+ {
+ astring disasm1, disasm2;
+ orig.disasm(disasm1, block->drcuml);
+ inst->disasm(disasm2, block->drcuml);
+ mame_printf_debug("Simplified: %-50.50s -> %s\n", disasm1.cstr(), disasm2.cstr());
+ }
+ */
// loop until we stop changing opcodes
} while (m_opcode != origop);
@@ -825,22 +825,22 @@ UINT8 uml::instruction::input_flags() const
{
static const UINT8 flags_for_condition[] =
{
- FLAG_Z, // COND_Z
- FLAG_Z, // COND_NZ
- FLAG_S, // COND_S
- FLAG_S, // COND_NS
- FLAG_C, // COND_C
- FLAG_C, // COND_NC
- FLAG_V, // COND_V
- FLAG_V, // COND_NV
- FLAG_U, // COND_U
- FLAG_U, // COND_NU
- FLAG_C | FLAG_Z, // COND_A
- FLAG_C | FLAG_Z, // COND_BE
- FLAG_S | FLAG_V | FLAG_Z, // COND_G
- FLAG_S | FLAG_V | FLAG_Z, // COND_LE
- FLAG_S | FLAG_V, // COND_L
- FLAG_S | FLAG_V // COND_GE
+ FLAG_Z, // COND_Z
+ FLAG_Z, // COND_NZ
+ FLAG_S, // COND_S
+ FLAG_S, // COND_NS
+ FLAG_C, // COND_C
+ FLAG_C, // COND_NC
+ FLAG_V, // COND_V
+ FLAG_V, // COND_NV
+ FLAG_U, // COND_U
+ FLAG_U, // COND_NU
+ FLAG_C | FLAG_Z, // COND_A
+ FLAG_C | FLAG_Z, // COND_BE
+ FLAG_S | FLAG_V | FLAG_Z, // COND_G
+ FLAG_S | FLAG_V | FLAG_Z, // COND_LE
+ FLAG_S | FLAG_V, // COND_L
+ FLAG_S | FLAG_V // COND_GE
};
UINT8 flags = s_opcode_info_table[m_opcode].inflags;
@@ -931,14 +931,14 @@ const char *uml::instruction::disasm(astring &buffer, drcuml_state *drcuml) cons
int size;
switch (opinfo.param[pnum].size)
{
- case PSIZE_4: size = 4; break;
- case PSIZE_8: size = 8; break;
- case PSIZE_P1: size = 1 << m_param[0].size(); break;
- case PSIZE_P2: size = 1 << m_param[1].size(); break;
- case PSIZE_P3: size = 1 << m_param[2].size(); break;
- case PSIZE_P4: size = 1 << m_param[3].size(); break;
+ case PSIZE_4: size = 4; break;
+ case PSIZE_8: size = 8; break;
+ case PSIZE_P1: size = 1 << m_param[0].size(); break;
+ case PSIZE_P2: size = 1 << m_param[1].size(); break;
+ case PSIZE_P3: size = 1 << m_param[2].size(); break;
+ case PSIZE_P4: size = 1 << m_param[3].size(); break;
default:
- case PSIZE_OP: size = m_size; break;
+ case PSIZE_OP: size = m_size; break;
}
// truncate to size
diff --git a/src/emu/cpu/uml.h b/src/emu/cpu/uml.h
index f90f8ccd7d6..27f1274fc68 100644
--- a/src/emu/cpu/uml.h
+++ b/src/emu/cpu/uml.h
@@ -80,11 +80,11 @@ namespace uml
const int MAPVAR_END = MAPVAR_M0 + MAPVAR_COUNT;
// flag definitions
- const UINT8 FLAG_C = 0x01; // carry flag
- const UINT8 FLAG_V = 0x02; // overflow flag (defined for integer only)
- const UINT8 FLAG_Z = 0x04; // zero flag
- const UINT8 FLAG_S = 0x08; // sign flag (defined for integer only)
- const UINT8 FLAG_U = 0x10; // unordered flag (defined for FP only)
+ const UINT8 FLAG_C = 0x01; // carry flag
+ const UINT8 FLAG_V = 0x02; // overflow flag (defined for integer only)
+ const UINT8 FLAG_Z = 0x04; // zero flag
+ const UINT8 FLAG_S = 0x08; // sign flag (defined for integer only)
+ const UINT8 FLAG_U = 0x10; // unordered flag (defined for FP only)
// testable conditions; note that these are defined such that (condition ^ 1) is
// always the opposite
@@ -92,22 +92,22 @@ namespace uml
{
COND_ALWAYS = 0,
- COND_Z = 0x80, // requires Z
- COND_NZ, // requires Z
- COND_S, // requires S
- COND_NS, // requires S
- COND_C, // requires C
- COND_NC, // requires C
- COND_V, // requires V
- COND_NV, // requires V
- COND_U, // requires U
- COND_NU, // requires U
- COND_A, // requires CZ
- COND_BE, // requires CZ
- COND_G, // requires SVZ
- COND_LE, // requires SVZ
- COND_L, // requires SV
- COND_GE, // requires SV
+ COND_Z = 0x80, // requires Z
+ COND_NZ, // requires Z
+ COND_S, // requires S
+ COND_NS, // requires S
+ COND_C, // requires C
+ COND_NC, // requires C
+ COND_V, // requires V
+ COND_NV, // requires V
+ COND_U, // requires U
+ COND_NU, // requires U
+ COND_A, // requires CZ
+ COND_BE, // requires CZ
+ COND_G, // requires SVZ
+ COND_LE, // requires SVZ
+ COND_L, // requires SV
+ COND_GE, // requires SV
COND_MAX,
@@ -121,32 +121,32 @@ namespace uml
// floating point rounding modes
enum float_rounding_mode
{
- ROUND_TRUNC = 0, // truncate
- ROUND_ROUND, // round
- ROUND_CEIL, // round up
- ROUND_FLOOR, // round down
+ ROUND_TRUNC = 0, // truncate
+ ROUND_ROUND, // round
+ ROUND_CEIL, // round up
+ ROUND_FLOOR, // round down
ROUND_DEFAULT
};
// operand sizes
enum operand_size
{
- SIZE_BYTE = 0, // 1-byte
- SIZE_WORD, // 2-byte
- SIZE_DWORD, // 4-byte
- SIZE_QWORD, // 8-byte
- SIZE_DQWORD, // 16-byte (vector)
- SIZE_SHORT = SIZE_DWORD, // 4-byte (float)
- SIZE_DOUBLE = SIZE_QWORD // 8-byte (float)
+ SIZE_BYTE = 0, // 1-byte
+ SIZE_WORD, // 2-byte
+ SIZE_DWORD, // 4-byte
+ SIZE_QWORD, // 8-byte
+ SIZE_DQWORD, // 16-byte (vector)
+ SIZE_SHORT = SIZE_DWORD, // 4-byte (float)
+ SIZE_DOUBLE = SIZE_QWORD // 8-byte (float)
};
// memory scale factors
enum memory_scale
{
- SCALE_x1 = 0, // index * 1
- SCALE_x2, // index * 2
- SCALE_x4, // index * 4
- SCALE_x8, // index * 8
+ SCALE_x1 = 0, // index * 1
+ SCALE_x2, // index * 2
+ SCALE_x4, // index * 4
+ SCALE_x8, // index * 8
SCALE_DEFAULT
};
@@ -164,89 +164,89 @@ namespace uml
OP_INVALID,
// compile-time opcodes
- OP_HANDLE, // HANDLE handle
- OP_HASH, // HASH mode,pc
- OP_LABEL, // LABEL imm
- OP_COMMENT, // COMMENT string
- OP_MAPVAR, // MAPVAR mapvar,value
+ OP_HANDLE, // HANDLE handle
+ OP_HASH, // HASH mode,pc
+ OP_LABEL, // LABEL imm
+ OP_COMMENT, // COMMENT string
+ OP_MAPVAR, // MAPVAR mapvar,value
// control flow operations
- OP_NOP, // NOP
- OP_DEBUG, // DEBUG pc
- OP_EXIT, // EXIT src1[,c]
- OP_HASHJMP, // HASHJMP mode,pc,handle
- OP_JMP, // JMP imm[,c]
- OP_EXH, // EXH handle,param[,c]
- OP_CALLH, // CALLH handle[,c]
- OP_RET, // RET [c]
- OP_CALLC, // CALLC func,ptr[,c]
- OP_RECOVER, // RECOVER dst,mapvar
+ OP_NOP, // NOP
+ OP_DEBUG, // DEBUG pc
+ OP_EXIT, // EXIT src1[,c]
+ OP_HASHJMP, // HASHJMP mode,pc,handle
+ OP_JMP, // JMP imm[,c]
+ OP_EXH, // EXH handle,param[,c]
+ OP_CALLH, // CALLH handle[,c]
+ OP_RET, // RET [c]
+ OP_CALLC, // CALLC func,ptr[,c]
+ OP_RECOVER, // RECOVER dst,mapvar
// internal register operations
- OP_SETFMOD, // SETFMOD src
- OP_GETFMOD, // GETFMOD dst
- OP_GETEXP, // GETEXP dst
- OP_GETFLGS, // GETFLGS dst[,f]
- OP_SAVE, // SAVE mem
- OP_RESTORE, // RESTORE mem
+ OP_SETFMOD, // SETFMOD src
+ OP_GETFMOD, // GETFMOD dst
+ OP_GETEXP, // GETEXP dst
+ OP_GETFLGS, // GETFLGS dst[,f]
+ OP_SAVE, // SAVE mem
+ OP_RESTORE, // RESTORE mem
// integer operations
- OP_LOAD, // LOAD dst,base,index,size
- OP_LOADS, // LOADS dst,base,index,size
- OP_STORE, // STORE base,index,src,size
- OP_READ, // READ dst,src1,space/size
- OP_READM, // READM dst,src1,mask,space/size
- OP_WRITE, // WRITE dst,src1,space/size
- OP_WRITEM, // WRITEM dst,mask,src1,space/size
- OP_CARRY, // CARRY src,bitnum
- OP_SET, // SET dst,c
- OP_MOV, // MOV dst,src[,c]
- OP_SEXT, // SEXT dst,src,size
- OP_ROLAND, // ROLAND dst,src,shift,mask
- OP_ROLINS, // ROLINS dst,src,shift,mask
- OP_ADD, // ADD dst,src1,src2[,f]
- OP_ADDC, // ADDC dst,src1,src2[,f]
- OP_SUB, // SUB dst,src1,src2[,f]
- OP_SUBB, // SUBB dst,src1,src2[,f]
- OP_CMP, // CMP src1,src2[,f]
- OP_MULU, // MULU dst,edst,src1,src2[,f]
- OP_MULS, // MULS dst,edst,src1,src2[,f]
- OP_DIVU, // DIVU dst,edst,src1,src2[,f]
- OP_DIVS, // DIVS dst,edst,src1,src2[,f]
- OP_AND, // AND dst,src1,src2[,f]
- OP_TEST, // TEST src1,src2[,f]
- OP_OR, // OR dst,src1,src2[,f]
- OP_XOR, // XOR dst,src1,src2[,f]
- OP_LZCNT, // LZCNT dst,src
- OP_BSWAP, // BSWAP dst,src
- OP_SHL, // SHL dst,src,count[,f]
- OP_SHR, // SHR dst,src,count[,f]
- OP_SAR, // SAR dst,src,count[,f]
- OP_ROL, // ROL dst,src,count[,f]
- OP_ROLC, // ROLC dst,src,count[,f]
- OP_ROR, // ROL dst,src,count[,f]
- OP_RORC, // ROLC dst,src,count[,f]
+ OP_LOAD, // LOAD dst,base,index,size
+ OP_LOADS, // LOADS dst,base,index,size
+ OP_STORE, // STORE base,index,src,size
+ OP_READ, // READ dst,src1,space/size
+ OP_READM, // READM dst,src1,mask,space/size
+ OP_WRITE, // WRITE dst,src1,space/size
+ OP_WRITEM, // WRITEM dst,mask,src1,space/size
+ OP_CARRY, // CARRY src,bitnum
+ OP_SET, // SET dst,c
+ OP_MOV, // MOV dst,src[,c]
+ OP_SEXT, // SEXT dst,src,size
+ OP_ROLAND, // ROLAND dst,src,shift,mask
+ OP_ROLINS, // ROLINS dst,src,shift,mask
+ OP_ADD, // ADD dst,src1,src2[,f]
+ OP_ADDC, // ADDC dst,src1,src2[,f]
+ OP_SUB, // SUB dst,src1,src2[,f]
+ OP_SUBB, // SUBB dst,src1,src2[,f]
+ OP_CMP, // CMP src1,src2[,f]
+ OP_MULU, // MULU dst,edst,src1,src2[,f]
+ OP_MULS, // MULS dst,edst,src1,src2[,f]
+ OP_DIVU, // DIVU dst,edst,src1,src2[,f]
+ OP_DIVS, // DIVS dst,edst,src1,src2[,f]
+ OP_AND, // AND dst,src1,src2[,f]
+ OP_TEST, // TEST src1,src2[,f]
+ OP_OR, // OR dst,src1,src2[,f]
+ OP_XOR, // XOR dst,src1,src2[,f]
+ OP_LZCNT, // LZCNT dst,src
+ OP_BSWAP, // BSWAP dst,src
+ OP_SHL, // SHL dst,src,count[,f]
+ OP_SHR, // SHR dst,src,count[,f]
+ OP_SAR, // SAR dst,src,count[,f]
+ OP_ROL, // ROL dst,src,count[,f]
+ OP_ROLC, // ROLC dst,src,count[,f]
+ OP_ROR, // ROL dst,src,count[,f]
+ OP_RORC, // ROLC dst,src,count[,f]
// floating point operations
- OP_FLOAD, // FLOAD dst,base,index
- OP_FSTORE, // FSTORE base,index,src
- OP_FREAD, // FREAD dst,space,src1
- OP_FWRITE, // FWRITE space,dst,src1
- OP_FMOV, // FMOV dst,src1[,c]
- OP_FTOINT, // FTOINT dst,src1,size,round
- OP_FFRINT, // FFRINT dst,src1,size
- OP_FFRFLT, // FFRFLT dst,src1,size
- OP_FRNDS, // FRNDS dst,src1
- OP_FADD, // FADD dst,src1,src2
- OP_FSUB, // FSUB dst,src1,src2
- OP_FCMP, // FCMP src1,src2
- OP_FMUL, // FMUL dst,src1,src2
- OP_FDIV, // FDIV dst,src1,src2
- OP_FNEG, // FNEG dst,src1
- OP_FABS, // FABS dst,src1
- OP_FSQRT, // FSQRT dst,src1
- OP_FRECIP, // FRECIP dst,src1
- OP_FRSQRT, // FRSQRT dst,src1
+ OP_FLOAD, // FLOAD dst,base,index
+ OP_FSTORE, // FSTORE base,index,src
+ OP_FREAD, // FREAD dst,space,src1
+ OP_FWRITE, // FWRITE space,dst,src1
+ OP_FMOV, // FMOV dst,src1[,c]
+ OP_FTOINT, // FTOINT dst,src1,size,round
+ OP_FFRINT, // FFRINT dst,src1,size
+ OP_FFRFLT, // FFRFLT dst,src1,size
+ OP_FRNDS, // FRNDS dst,src1
+ OP_FADD, // FADD dst,src1,src2
+ OP_FSUB, // FSUB dst,src1,src2
+ OP_FCMP, // FCMP src1,src2
+ OP_FMUL, // FMUL dst,src1,src2
+ OP_FDIV, // FDIV dst,src1,src2
+ OP_FNEG, // FNEG dst,src1
+ OP_FABS, // FABS dst,src1
+ OP_FSQRT, // FSQRT dst,src1
+ OP_FRECIP, // FRECIP dst,src1
+ OP_FRSQRT, // FRSQRT dst,src1
OP_MAX
};
@@ -275,10 +275,10 @@ namespace uml
private:
// internal state
- drccodeptr * m_code; // pointer in the cache to the associated code
- astring m_string; // pointer to string attached to handle
- code_handle * m_next; // link to next handle in the list
- drcuml_state & m_drcuml; // pointer to owning object
+ drccodeptr * m_code; // pointer in the cache to the associated code
+ astring m_string; // pointer to string attached to handle
+ code_handle * m_next; // link to next handle in the list
+ drcuml_state & m_drcuml; // pointer to owning object
};
// class describing a local code label
@@ -307,21 +307,21 @@ namespace uml
// opcode parameter types
enum parameter_type
{
- PTYPE_NONE = 0, // invalid
- PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
- PTYPE_INT_REGISTER, // integer register; value = REG_I0 - REG_I_END
- PTYPE_FLOAT_REGISTER, // floating point register; value = REG_F0 - REG_F_END
- PTYPE_VECTOR_REGISTER, // vector register; value = REG_V0 - REG_V_END
- PTYPE_MAPVAR, // map variable; value = MAPVAR_M0 - MAPVAR_END
- PTYPE_MEMORY, // memory; value = pointer to memory
- PTYPE_SIZE, // size; value = operand_size
- PTYPE_SIZE_SCALE, // scale + size; value = memory_scale * 16 + operand_size
- PTYPE_SIZE_SPACE, // space + size; value = memory_space * 16 + operand_size
- PTYPE_CODE_HANDLE, // code handle; value = pointer to handle
- PTYPE_CODE_LABEL, // code label; value = label index
- PTYPE_C_FUNCTION, // C function; value = pointer to C code
- PTYPE_ROUNDING, // floating point rounding mode; value = float_rounding_mode
- PTYPE_STRING, // string parameter; value = pointer to string
+ PTYPE_NONE = 0, // invalid
+ PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
+ PTYPE_INT_REGISTER, // integer register; value = REG_I0 - REG_I_END
+ PTYPE_FLOAT_REGISTER, // floating point register; value = REG_F0 - REG_F_END
+ PTYPE_VECTOR_REGISTER, // vector register; value = REG_V0 - REG_V_END
+ PTYPE_MAPVAR, // map variable; value = MAPVAR_M0 - MAPVAR_END
+ PTYPE_MEMORY, // memory; value = pointer to memory
+ PTYPE_SIZE, // size; value = operand_size
+ PTYPE_SIZE_SCALE, // scale + size; value = memory_scale * 16 + operand_size
+ PTYPE_SIZE_SPACE, // space + size; value = memory_space * 16 + operand_size
+ PTYPE_CODE_HANDLE, // code handle; value = pointer to handle
+ PTYPE_CODE_LABEL, // code label; value = label index
+ PTYPE_C_FUNCTION, // C function; value = pointer to C code
+ PTYPE_ROUNDING, // floating point rounding mode; value = float_rounding_mode
+ PTYPE_STRING, // string parameter; value = pointer to string
PTYPE_MAX
};
@@ -394,8 +394,8 @@ namespace uml
parameter(parameter_type type, parameter_value value) : m_type(type), m_value(value) { }
// internals
- parameter_type m_type; // parameter type
- parameter_value m_value; // parameter value
+ parameter_type m_type; // parameter type
+ parameter_value m_value; // parameter value
};
// structure describing rules for opcode encoding
@@ -403,19 +403,19 @@ namespace uml
{
struct parameter_info
{
- UINT8 output; // input or output?
- UINT8 size; // size of the parameter
- UINT16 typemask; // types allowed
+ UINT8 output; // input or output?
+ UINT8 size; // size of the parameter
+ UINT16 typemask; // types allowed
};
- opcode_t opcode; // the opcode itself
- const char * mnemonic; // mnemonic string
- UINT8 sizes; // allowed sizes
- bool condition; // conditions allowed?
- UINT8 inflags; // input flags
- UINT8 outflags; // output flags
- UINT8 modflags; // modified flags
- parameter_info param[4]; // information about parameters
+ opcode_t opcode; // the opcode itself
+ const char * mnemonic; // mnemonic string
+ UINT8 sizes; // allowed sizes
+ bool condition; // conditions allowed?
+ UINT8 inflags; // input flags
+ UINT8 outflags; // output flags
+ UINT8 modflags; // modified flags
+ parameter_info param[4]; // information about parameters
};
// a single UML instructon is encoded like this
@@ -613,12 +613,12 @@ namespace uml
void convert_to_mov_param(int pnum) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = m_param[pnum]; }
// internal state
- opcode_t m_opcode; // opcode
- condition_t m_condition; // condition
- UINT8 m_flags; // flags
- UINT8 m_size; // operation size
- UINT8 m_numparams; // number of parameters
- parameter m_param[MAX_PARAMS];// up to 4 parameters
+ opcode_t m_opcode; // opcode
+ condition_t m_condition; // condition
+ UINT8 m_flags; // flags
+ UINT8 m_size; // operation size
+ UINT8 m_numparams; // number of parameters
+ parameter m_param[MAX_PARAMS];// up to 4 parameters
static const opcode_info s_opcode_info_table[OP_MAX];
};
@@ -626,9 +626,9 @@ namespace uml
// structure describing rules for parameter encoding
struct parameter_info
{
- UINT8 output; // input or output?
- UINT8 size; // size of the parameter
- UINT16 typemask; // types allowed
+ UINT8 output; // input or output?
+ UINT8 size; // size of the parameter
+ UINT16 typemask; // types allowed
};
// global inline functions to specify a register parameter by index
diff --git a/src/emu/cpu/unsp/unsp.c b/src/emu/cpu/unsp/unsp.c
index 9fa918e6ca2..711a18f3fc4 100644
--- a/src/emu/cpu/unsp/unsp.c
+++ b/src/emu/cpu/unsp/unsp.c
@@ -12,32 +12,32 @@
INLINE unsp_state *get_safe_token(device_t *device)
{
- assert(device != NULL);
- assert(device->type() == UNSP);
- return (unsp_state *)downcast<legacy_cpu_device *>(device)->token();
+ assert(device != NULL);
+ assert(device->type() == UNSP);
+ return (unsp_state *)downcast<legacy_cpu_device *>(device)->token();
}
static void unsp_set_irq_line(unsp_state *unsp, int irqline, int state);
/*****************************************************************************/
-#define OP0 (op >> 12)
-#define OPA ((op >> 9) & 7)
-#define OP1 ((op >> 6) & 7)
-#define OPN ((op >> 3) & 7)
-#define OPB (op & 7)
-#define OPIMM (op & 0x3f)
+#define OP0 (op >> 12)
+#define OPA ((op >> 9) & 7)
+#define OP1 ((op >> 6) & 7)
+#define OPN ((op >> 3) & 7)
+#define OPB (op & 7)
+#define OPIMM (op & 0x3f)
-#define UNSP_LPC (((UNSP_REG(SR) & 0x3f) << 16) | UNSP_REG(PC))
+#define UNSP_LPC (((UNSP_REG(SR) & 0x3f) << 16) | UNSP_REG(PC))
-#define UNSP_REG(reg) unsp->r[UNSP_##reg - 1]
-#define UNSP_REG_I(reg) unsp->r[reg]
-#define UNSP_LREG_I(reg) (((UNSP_REG(SR) << 6) & 0x3f0000) | UNSP_REG_I(reg))
+#define UNSP_REG(reg) unsp->r[UNSP_##reg - 1]
+#define UNSP_REG_I(reg) unsp->r[reg]
+#define UNSP_LREG_I(reg) (((UNSP_REG(SR) << 6) & 0x3f0000) | UNSP_REG_I(reg))
-#define UNSP_N 0x0200
-#define UNSP_Z 0x0100
-#define UNSP_S 0x0080
-#define UNSP_C 0x0040
+#define UNSP_N 0x0200
+#define UNSP_Z 0x0100
+#define UNSP_S 0x0080
+#define UNSP_C 0x0040
#define STANDARD_ALU_CASES \
case 0: \
@@ -91,7 +91,7 @@ static void unsp_set_irq_line(unsp_state *unsp, int irqline, int state);
static void unimplemented_opcode(unsp_state *unsp, UINT16 op)
{
- fatalerror("UNSP: unknown opcode %04x at %04x\n", op, UNSP_LPC << 1);
+ fatalerror("UNSP: unknown opcode %04x at %04x\n", op, UNSP_LPC << 1);
}
/*****************************************************************************/
@@ -110,21 +110,21 @@ INLINE void WRITE16(unsp_state *unsp, UINT32 address, UINT16 data)
static CPU_INIT( unsp )
{
- unsp_state *unsp = get_safe_token(device);
- memset(unsp->r, 0, sizeof(UINT16) * UNSP_GPR_COUNT);
+ unsp_state *unsp = get_safe_token(device);
+ memset(unsp->r, 0, sizeof(UINT16) * UNSP_GPR_COUNT);
- unsp->device = device;
- unsp->program = &device->space(AS_PROGRAM);
+ unsp->device = device;
+ unsp->program = &device->space(AS_PROGRAM);
}
static CPU_RESET( unsp )
{
- unsp_state *unsp = get_safe_token(device);
- memset(unsp->r, 0, sizeof(UINT16) * UNSP_GPR_COUNT);
+ unsp_state *unsp = get_safe_token(device);
+ memset(unsp->r, 0, sizeof(UINT16) * UNSP_GPR_COUNT);
- UNSP_REG(PC) = READ16(unsp, 0xfff7);
- unsp->irq = 0;
- unsp->fiq = 0;
+ UNSP_REG(PC) = READ16(unsp, 0xfff7);
+ unsp->irq = 0;
+ unsp->fiq = 0;
}
/*****************************************************************************/
@@ -169,17 +169,17 @@ static UINT16 unsp_pop(unsp_state *unsp, UINT16 *reg)
static CPU_EXECUTE( unsp )
{
- unsp_state *unsp = get_safe_token(device);
- UINT32 op;
- UINT32 lres;
- UINT16 r0, r1;
+ unsp_state *unsp = get_safe_token(device);
+ UINT32 op;
+ UINT32 lres;
+ UINT16 r0, r1;
lres = 0;
- while (unsp->icount > 0)
- {
- debugger_instruction_hook(device, UNSP_LPC<<1);
+ while (unsp->icount > 0)
+ {
+ debugger_instruction_hook(device, UNSP_LPC<<1);
- op = READ16(unsp, UNSP_LPC);
+ op = READ16(unsp, UNSP_LPC);
UNSP_REG(PC)++;
@@ -744,7 +744,7 @@ static CPU_EXECUTE( unsp )
unsp->icount -= 5;
unsp->icount = MAX(unsp->icount, 0);
- }
+ }
}
@@ -814,10 +814,10 @@ static void unsp_set_irq_line(unsp_state *unsp, int irqline, int state)
static CPU_SET_INFO( unsp )
{
- unsp_state *unsp = get_safe_token(device);
+ unsp_state *unsp = get_safe_token(device);
- switch (state)
- {
+ switch (state)
+ {
case CPUINFO_INT_INPUT_STATE + UNSP_IRQ0_LINE:
case CPUINFO_INT_INPUT_STATE + UNSP_IRQ1_LINE:
case CPUINFO_INT_INPUT_STATE + UNSP_IRQ2_LINE:
@@ -831,94 +831,94 @@ static CPU_SET_INFO( unsp )
unsp_set_irq_line(unsp, state - CPUINFO_INT_INPUT_STATE, (int)info->i);
break;
- case CPUINFO_INT_REGISTER + UNSP_SP: UNSP_REG(SP) = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_R1: UNSP_REG(R1) = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_R2: UNSP_REG(R2) = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_R3: UNSP_REG(R3) = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_R4: UNSP_REG(R4) = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_BP: UNSP_REG(BP) = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_SR: UNSP_REG(SR) = info->i; break;
- case CPUINFO_INT_PC: /* Intentional fallthrough */
- case CPUINFO_INT_REGISTER + UNSP_PC:
- UNSP_REG(PC) = (info->i & 0x0001fffe) >> 1;
- UNSP_REG(SR) = (UNSP_REG(SR) & 0xffc0) | ((info->i & 0x007e0000) >> 17);
- break;
- case CPUINFO_INT_REGISTER + UNSP_IRQ: unsp->irq = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_FIQ: unsp->fiq = info->i; break;
- case CPUINFO_INT_REGISTER + UNSP_SB: unsp->sb = info->i; break;
- }
+ case CPUINFO_INT_REGISTER + UNSP_SP: UNSP_REG(SP) = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_R1: UNSP_REG(R1) = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_R2: UNSP_REG(R2) = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_R3: UNSP_REG(R3) = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_R4: UNSP_REG(R4) = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_BP: UNSP_REG(BP) = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_SR: UNSP_REG(SR) = info->i; break;
+ case CPUINFO_INT_PC: /* Intentional fallthrough */
+ case CPUINFO_INT_REGISTER + UNSP_PC:
+ UNSP_REG(PC) = (info->i & 0x0001fffe) >> 1;
+ UNSP_REG(SR) = (UNSP_REG(SR) & 0xffc0) | ((info->i & 0x007e0000) >> 17);
+ break;
+ case CPUINFO_INT_REGISTER + UNSP_IRQ: unsp->irq = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_FIQ: unsp->fiq = info->i; break;
+ case CPUINFO_INT_REGISTER + UNSP_SB: unsp->sb = info->i; break;
+ }
}
CPU_GET_INFO( unsp )
{
- unsp_state *unsp = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
-
- switch(state)
- {
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(unsp_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 5; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 5; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 23; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_REGISTER + UNSP_SP: info->i = UNSP_REG(SP); break;
- case CPUINFO_INT_REGISTER + UNSP_R1: info->i = UNSP_REG(R1); break;
- case CPUINFO_INT_REGISTER + UNSP_R2: info->i = UNSP_REG(R2); break;
- case CPUINFO_INT_REGISTER + UNSP_R3: info->i = UNSP_REG(R3); break;
- case CPUINFO_INT_REGISTER + UNSP_R4: info->i = UNSP_REG(R4); break;
- case CPUINFO_INT_REGISTER + UNSP_BP: info->i = UNSP_REG(BP); break;
- case CPUINFO_INT_REGISTER + UNSP_SR: info->i = UNSP_REG(SR); break;
- case CPUINFO_INT_PC: /* Intentional fallthrough */
- case CPUINFO_INT_REGISTER + UNSP_PC: info->i = UNSP_LPC << 1; break;
- case CPUINFO_INT_REGISTER + UNSP_IRQ: info->i = unsp->irq; break;
- case CPUINFO_INT_REGISTER + UNSP_FIQ: info->i = unsp->fiq; break;
- case CPUINFO_INT_REGISTER + UNSP_SB: info->i = unsp->sb; break;
-
- /* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(unsp); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(unsp); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(unsp); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(unsp); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(unsp); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &unsp->icount; break;
-
- /* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "u'nSP"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "u'nSP"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + UNSP_SP: sprintf(info->s, "SP: %04x", UNSP_REG(SP)); break;
- case CPUINFO_STR_REGISTER + UNSP_R1: sprintf(info->s, "R1: %04x", UNSP_REG(R1)); break;
- case CPUINFO_STR_REGISTER + UNSP_R2: sprintf(info->s, "R2: %04x", UNSP_REG(R2)); break;
- case CPUINFO_STR_REGISTER + UNSP_R3: sprintf(info->s, "R3: %04x", UNSP_REG(R3)); break;
- case CPUINFO_STR_REGISTER + UNSP_R4: sprintf(info->s, "R4: %04x", UNSP_REG(R4)); break;
- case CPUINFO_STR_REGISTER + UNSP_BP: sprintf(info->s, "BP: %04x", UNSP_REG(BP)); break;
- case CPUINFO_STR_REGISTER + UNSP_SR: sprintf(info->s, "SR: %04x", UNSP_REG(SR)); break;
- case CPUINFO_STR_REGISTER + UNSP_PC: sprintf(info->s, "PC: %06x (%06x)", UNSP_LPC, UNSP_LPC << 1); break;
- case CPUINFO_STR_REGISTER + UNSP_IRQ: sprintf(info->s, "IRQ: %d", unsp->irq); break;
- case CPUINFO_STR_REGISTER + UNSP_FIQ: sprintf(info->s, "FIQ: %d", unsp->fiq); break;
- case CPUINFO_STR_REGISTER + UNSP_SB: sprintf(info->s, "SB: %d", unsp->sb); break;
- }
+ unsp_state *unsp = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
+
+ switch(state)
+ {
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(unsp_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 0; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 5; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 5; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 23; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_REGISTER + UNSP_SP: info->i = UNSP_REG(SP); break;
+ case CPUINFO_INT_REGISTER + UNSP_R1: info->i = UNSP_REG(R1); break;
+ case CPUINFO_INT_REGISTER + UNSP_R2: info->i = UNSP_REG(R2); break;
+ case CPUINFO_INT_REGISTER + UNSP_R3: info->i = UNSP_REG(R3); break;
+ case CPUINFO_INT_REGISTER + UNSP_R4: info->i = UNSP_REG(R4); break;
+ case CPUINFO_INT_REGISTER + UNSP_BP: info->i = UNSP_REG(BP); break;
+ case CPUINFO_INT_REGISTER + UNSP_SR: info->i = UNSP_REG(SR); break;
+ case CPUINFO_INT_PC: /* Intentional fallthrough */
+ case CPUINFO_INT_REGISTER + UNSP_PC: info->i = UNSP_LPC << 1; break;
+ case CPUINFO_INT_REGISTER + UNSP_IRQ: info->i = unsp->irq; break;
+ case CPUINFO_INT_REGISTER + UNSP_FIQ: info->i = unsp->fiq; break;
+ case CPUINFO_INT_REGISTER + UNSP_SB: info->i = unsp->sb; break;
+
+ /* --- the following bits of info are returned as pointers to data or functions --- */
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(unsp); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(unsp); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(unsp); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(unsp); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(unsp); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &unsp->icount; break;
+
+ /* --- the following bits of info are returned as NULL-terminated strings --- */
+ case CPUINFO_STR_NAME: strcpy(info->s, "u'nSP"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "u'nSP"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Nicola Salmoria and the MAME Team"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + UNSP_SP: sprintf(info->s, "SP: %04x", UNSP_REG(SP)); break;
+ case CPUINFO_STR_REGISTER + UNSP_R1: sprintf(info->s, "R1: %04x", UNSP_REG(R1)); break;
+ case CPUINFO_STR_REGISTER + UNSP_R2: sprintf(info->s, "R2: %04x", UNSP_REG(R2)); break;
+ case CPUINFO_STR_REGISTER + UNSP_R3: sprintf(info->s, "R3: %04x", UNSP_REG(R3)); break;
+ case CPUINFO_STR_REGISTER + UNSP_R4: sprintf(info->s, "R4: %04x", UNSP_REG(R4)); break;
+ case CPUINFO_STR_REGISTER + UNSP_BP: sprintf(info->s, "BP: %04x", UNSP_REG(BP)); break;
+ case CPUINFO_STR_REGISTER + UNSP_SR: sprintf(info->s, "SR: %04x", UNSP_REG(SR)); break;
+ case CPUINFO_STR_REGISTER + UNSP_PC: sprintf(info->s, "PC: %06x (%06x)", UNSP_LPC, UNSP_LPC << 1); break;
+ case CPUINFO_STR_REGISTER + UNSP_IRQ: sprintf(info->s, "IRQ: %d", unsp->irq); break;
+ case CPUINFO_STR_REGISTER + UNSP_FIQ: sprintf(info->s, "FIQ: %d", unsp->fiq); break;
+ case CPUINFO_STR_REGISTER + UNSP_SB: sprintf(info->s, "SB: %d", unsp->sb); break;
+ }
}
DEFINE_LEGACY_CPU_DEVICE(UNSP, unsp);
diff --git a/src/emu/cpu/unsp/unsp.h b/src/emu/cpu/unsp/unsp.h
index 9e0481dfe90..2a32ed09ab0 100644
--- a/src/emu/cpu/unsp/unsp.h
+++ b/src/emu/cpu/unsp/unsp.h
@@ -50,18 +50,18 @@ enum
enum
{
- UNSP_IRQ0_LINE = 0,
- UNSP_IRQ1_LINE,
- UNSP_IRQ2_LINE,
- UNSP_IRQ3_LINE,
- UNSP_IRQ4_LINE,
- UNSP_IRQ5_LINE,
- UNSP_IRQ6_LINE,
- UNSP_IRQ7_LINE,
- UNSP_FIQ_LINE,
- UNSP_BRK_LINE,
+ UNSP_IRQ0_LINE = 0,
+ UNSP_IRQ1_LINE,
+ UNSP_IRQ2_LINE,
+ UNSP_IRQ3_LINE,
+ UNSP_IRQ4_LINE,
+ UNSP_IRQ5_LINE,
+ UNSP_IRQ6_LINE,
+ UNSP_IRQ7_LINE,
+ UNSP_FIQ_LINE,
+ UNSP_BRK_LINE,
- UNSP_NUM_LINES
+ UNSP_NUM_LINES
};
DECLARE_LEGACY_CPU_DEVICE(UNSP, unsp);
diff --git a/src/emu/cpu/unsp/unspdasm.c b/src/emu/cpu/unsp/unspdasm.c
index 962cd699005..023d41061a3 100644
--- a/src/emu/cpu/unsp/unspdasm.c
+++ b/src/emu/cpu/unsp/unspdasm.c
@@ -13,11 +13,11 @@ static char *output;
static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
{
- va_list vl;
+ va_list vl;
- va_start(vl, fmt);
- vsprintf(output, fmt, vl);
- va_end(vl);
+ va_start(vl, fmt);
+ vsprintf(output, fmt, vl);
+ va_end(vl);
}
/*****************************************************************************/
@@ -43,13 +43,13 @@ static const char *alu[] =
/*****************************************************************************/
-#define OP0 (op >> 12)
-#define OPA ((op >> 9) & 7)
-#define OP1 ((op >> 6) & 7)
-#define OPN ((op >> 3) & 7)
-#define OPB (op & 7)
-#define OPIMM (op & 0x3f)
-#define OP2X ((OP0 < 14 && OP1 == 4 && (OPN >= 1 && OPN <= 3)) || (OP0 == 15 && (OP1 == 1 || OP1 == 2)))
+#define OP0 (op >> 12)
+#define OPA ((op >> 9) & 7)
+#define OP1 ((op >> 6) & 7)
+#define OPN ((op >> 3) & 7)
+#define OPB (op & 7)
+#define OPIMM (op & 0x3f)
+#define OP2X ((OP0 < 14 && OP1 == 4 && (OPN >= 1 && OPN <= 3)) || (OP0 == 15 && (OP1 == 1 || OP1 == 2)))
/*****************************************************************************/
@@ -266,5 +266,5 @@ CPU_DISASSEMBLE( unsp )
}
return UNSP_DASM_OK;
}
- return UNSP_DASM_OK;
+ return UNSP_DASM_OK;
}
diff --git a/src/emu/cpu/upd7725/dasm7725.c b/src/emu/cpu/upd7725/dasm7725.c
index 1e5a2bc435d..ef6996fc33a 100755
--- a/src/emu/cpu/upd7725/dasm7725.c
+++ b/src/emu/cpu/upd7725/dasm7725.c
@@ -12,222 +12,221 @@
CPU_DISASSEMBLE( upd7725 )
{
- static char output[256];
- UINT32 opcode = oprom[2] | (oprom[1] << 8) | (oprom[0] << 16);
- UINT32 type = (opcode >> 22);
+ static char output[256];
+ UINT32 opcode = oprom[2] | (oprom[1] << 8) | (oprom[0] << 16);
+ UINT32 type = (opcode >> 22);
// printf("dasm: PC %x opcode %08x\n", pc, opcode);
- memset(output, 0, sizeof(output));
-
- if(type == 0 || type == 1) { //OP,RT
- UINT8 pselect = (opcode >> 20)&0x3; //P select
- UINT8 alu = (opcode >> 16)&0xf; //ALU operation mode
- UINT8 asl = (opcode >> 15)&0x1; //accumulator select
- UINT8 dpl = (opcode >> 13)&0x3; //DP low modify
- UINT8 dphm = (opcode >> 9)&0xf; //DP high XOR modify
- UINT8 rpdcr = (opcode >> 8)&0x1; //RP decrement
- UINT8 src = (opcode >> 4)&0xf; //move source
- UINT8 dst = (opcode >> 0)&0xf; //move destination
-
- switch(alu) {
- case 0: strcat(output, "nop "); break;
- case 1: strcat(output, "or "); break;
- case 2: strcat(output, "and "); break;
- case 3: strcat(output, "xor "); break;
- case 4: strcat(output, "sub "); break;
- case 5: strcat(output, "add "); break;
- case 6: strcat(output, "sbb "); break;
- case 7: strcat(output, "adc "); break;
- case 8: strcat(output, "dec "); break;
- case 9: strcat(output, "inc "); break;
- case 10: strcat(output, "cmp "); break;
- case 11: strcat(output, "shr1 "); break;
- case 12: strcat(output, "shl1 "); break;
- case 13: strcat(output, "shl2 "); break;
- case 14: strcat(output, "shl4 "); break;
- case 15: strcat(output, "xchg "); break;
- }
-
- if(alu < 8) {
- switch(pselect) {
- case 0: strcat(output, "ram,"); break;
- case 1: strcat(output, "idb,"); break;
- case 2: strcat(output, "m,"); break;
- case 3: strcat(output, "n,"); break;
- }
- }
-
- switch(asl) {
- case 0: strcat(output, "a"); break;
- case 1: strcat(output, "b"); break;
- }
-
- if(dst) {
- strcat(output, " | mov ");
-
- switch(src) {
- case 0: strcat(output, "trb,"); break;
- case 1: strcat(output, "a,"); break;
- case 2: strcat(output, "b,"); break;
- case 3: strcat(output, "tr,"); break;
- case 4: strcat(output, "dp,"); break;
- case 5: strcat(output, "rp,"); break;
- case 6: strcat(output, "ro,"); break;
- case 7: strcat(output, "sgn,"); break;
- case 8: strcat(output, "dr,"); break;
- case 9: strcat(output, "drnf,"); break;
- case 10: strcat(output, "sr,"); break;
- case 11: strcat(output, "sim,"); break;
- case 12: strcat(output, "sil,"); break;
- case 13: strcat(output, "k,"); break;
- case 14: strcat(output, "l,"); break;
- case 15: strcat(output, "mem,"); break;
- }
-
- switch(dst) {
- case 0: strcat(output, "non"); break;
- case 1: strcat(output, "a"); break;
- case 2: strcat(output, "b"); break;
- case 3: strcat(output, "tr"); break;
- case 4: strcat(output, "dp"); break;
- case 5: strcat(output, "rp"); break;
- case 6: strcat(output, "dr"); break;
- case 7: strcat(output, "sr"); break;
- case 8: strcat(output, "sol"); break;
- case 9: strcat(output, "som"); break;
- case 10: strcat(output, "k"); break;
- case 11: strcat(output, "klr"); break;
- case 12: strcat(output, "klm"); break;
- case 13: strcat(output, "l"); break;
- case 14: strcat(output, "trb"); break;
- case 15: strcat(output, "mem"); break;
- }
- }
-
- if(dpl) {
- switch(dpl) {
- case 0: strcat(output, " | dpnop"); break;
- case 1: strcat(output, " | dpinc"); break;
- case 2: strcat(output, " | dpdec"); break;
- case 3: strcat(output, " | dpclr"); break;
- }
- }
-
- if(dphm) {
- switch(dphm) {
- case 0: strcat(output, " | m0"); break;
- case 1: strcat(output, " | m1"); break;
- case 2: strcat(output, " | m2"); break;
- case 3: strcat(output, " | m3"); break;
- case 4: strcat(output, " | m4"); break;
- case 5: strcat(output, " | m5"); break;
- case 6: strcat(output, " | m6"); break;
- case 7: strcat(output, " | m7"); break;
- case 8: strcat(output, " | m8"); break;
- case 9: strcat(output, " | m9"); break;
- case 10: strcat(output, " | ma"); break;
- case 11: strcat(output, " | mb"); break;
- case 12: strcat(output, " | mc"); break;
- case 13: strcat(output, " | md"); break;
- case 14: strcat(output, " | me"); break;
- case 15: strcat(output, " | mf"); break;
- }
- }
-
- if(rpdcr == 1) {
- strcat(output, " | rpdec");
- }
-
- if(type == 1) {
- strcat(output, " | ret");
- }
- }
-
- if(type == 2) { //JP
- UINT16 brch = (opcode >> 13) & 0x1ff; //branch
- UINT16 na = (opcode >> 2) & 0x7ff; //next address
-
- switch(brch) {
- case 0x000: strcat(output, "jmpso "); break;
- case 0x080: strcat(output, "jnca "); break;
- case 0x082: strcat(output, "jca "); break;
- case 0x084: strcat(output, "jncb "); break;
- case 0x086: strcat(output, "jcb "); break;
- case 0x088: strcat(output, "jnza "); break;
- case 0x08a: strcat(output, "jza "); break;
- case 0x08c: strcat(output, "jnzb "); break;
- case 0x08e: strcat(output, "jzb "); break;
- case 0x090: strcat(output, "jnova0 "); break;
- case 0x092: strcat(output, "jova0 "); break;
- case 0x094: strcat(output, "jnovb0 "); break;
- case 0x096: strcat(output, "jovb0 "); break;
- case 0x098: strcat(output, "jnova1 "); break;
- case 0x09a: strcat(output, "jova1 "); break;
- case 0x09c: strcat(output, "jnovb1 "); break;
- case 0x09e: strcat(output, "jovb1 "); break;
- case 0x0a0: strcat(output, "jnsa0 "); break;
- case 0x0a2: strcat(output, "jsa0 "); break;
- case 0x0a4: strcat(output, "jnsb0 "); break;
- case 0x0a6: strcat(output, "jsb0 "); break;
- case 0x0a8: strcat(output, "jnsa1 "); break;
- case 0x0aa: strcat(output, "jsa1 "); break;
- case 0x0ac: strcat(output, "jnsb1 "); break;
- case 0x0ae: strcat(output, "jsb1 "); break;
- case 0x0b0: strcat(output, "jdpl0 "); break;
- case 0x0b1: strcat(output, "jdpln0 "); break;
- case 0x0b2: strcat(output, "jdplf "); break;
- case 0x0b3: strcat(output, "jdplnf "); break;
- case 0x0b4: strcat(output, "jnsiak "); break;
- case 0x0b6: strcat(output, "jsiak "); break;
- case 0x0b8: strcat(output, "jnsoak "); break;
- case 0x0ba: strcat(output, "jsoak "); break;
- case 0x0bc: strcat(output, "jnrqm "); break;
- case 0x0be: strcat(output, "jrqm "); break;
- case 0x100: strcat(output, "ljmp "); break;
- case 0x101: strcat(output, "hjmp "); break;
- case 0x140: strcat(output, "lcall "); break;
- case 0x141: strcat(output, "hcall "); break;
- default: strcat(output, "?????? "); break;
- }
+ memset(output, 0, sizeof(output));
+
+ if(type == 0 || type == 1) { //OP,RT
+ UINT8 pselect = (opcode >> 20)&0x3; //P select
+ UINT8 alu = (opcode >> 16)&0xf; //ALU operation mode
+ UINT8 asl = (opcode >> 15)&0x1; //accumulator select
+ UINT8 dpl = (opcode >> 13)&0x3; //DP low modify
+ UINT8 dphm = (opcode >> 9)&0xf; //DP high XOR modify
+ UINT8 rpdcr = (opcode >> 8)&0x1; //RP decrement
+ UINT8 src = (opcode >> 4)&0xf; //move source
+ UINT8 dst = (opcode >> 0)&0xf; //move destination
+
+ switch(alu) {
+ case 0: strcat(output, "nop "); break;
+ case 1: strcat(output, "or "); break;
+ case 2: strcat(output, "and "); break;
+ case 3: strcat(output, "xor "); break;
+ case 4: strcat(output, "sub "); break;
+ case 5: strcat(output, "add "); break;
+ case 6: strcat(output, "sbb "); break;
+ case 7: strcat(output, "adc "); break;
+ case 8: strcat(output, "dec "); break;
+ case 9: strcat(output, "inc "); break;
+ case 10: strcat(output, "cmp "); break;
+ case 11: strcat(output, "shr1 "); break;
+ case 12: strcat(output, "shl1 "); break;
+ case 13: strcat(output, "shl2 "); break;
+ case 14: strcat(output, "shl4 "); break;
+ case 15: strcat(output, "xchg "); break;
+ }
+
+ if(alu < 8) {
+ switch(pselect) {
+ case 0: strcat(output, "ram,"); break;
+ case 1: strcat(output, "idb,"); break;
+ case 2: strcat(output, "m,"); break;
+ case 3: strcat(output, "n,"); break;
+ }
+ }
+
+ switch(asl) {
+ case 0: strcat(output, "a"); break;
+ case 1: strcat(output, "b"); break;
+ }
+
+ if(dst) {
+ strcat(output, " | mov ");
+
+ switch(src) {
+ case 0: strcat(output, "trb,"); break;
+ case 1: strcat(output, "a,"); break;
+ case 2: strcat(output, "b,"); break;
+ case 3: strcat(output, "tr,"); break;
+ case 4: strcat(output, "dp,"); break;
+ case 5: strcat(output, "rp,"); break;
+ case 6: strcat(output, "ro,"); break;
+ case 7: strcat(output, "sgn,"); break;
+ case 8: strcat(output, "dr,"); break;
+ case 9: strcat(output, "drnf,"); break;
+ case 10: strcat(output, "sr,"); break;
+ case 11: strcat(output, "sim,"); break;
+ case 12: strcat(output, "sil,"); break;
+ case 13: strcat(output, "k,"); break;
+ case 14: strcat(output, "l,"); break;
+ case 15: strcat(output, "mem,"); break;
+ }
+
+ switch(dst) {
+ case 0: strcat(output, "non"); break;
+ case 1: strcat(output, "a"); break;
+ case 2: strcat(output, "b"); break;
+ case 3: strcat(output, "tr"); break;
+ case 4: strcat(output, "dp"); break;
+ case 5: strcat(output, "rp"); break;
+ case 6: strcat(output, "dr"); break;
+ case 7: strcat(output, "sr"); break;
+ case 8: strcat(output, "sol"); break;
+ case 9: strcat(output, "som"); break;
+ case 10: strcat(output, "k"); break;
+ case 11: strcat(output, "klr"); break;
+ case 12: strcat(output, "klm"); break;
+ case 13: strcat(output, "l"); break;
+ case 14: strcat(output, "trb"); break;
+ case 15: strcat(output, "mem"); break;
+ }
+ }
+
+ if(dpl) {
+ switch(dpl) {
+ case 0: strcat(output, " | dpnop"); break;
+ case 1: strcat(output, " | dpinc"); break;
+ case 2: strcat(output, " | dpdec"); break;
+ case 3: strcat(output, " | dpclr"); break;
+ }
+ }
+
+ if(dphm) {
+ switch(dphm) {
+ case 0: strcat(output, " | m0"); break;
+ case 1: strcat(output, " | m1"); break;
+ case 2: strcat(output, " | m2"); break;
+ case 3: strcat(output, " | m3"); break;
+ case 4: strcat(output, " | m4"); break;
+ case 5: strcat(output, " | m5"); break;
+ case 6: strcat(output, " | m6"); break;
+ case 7: strcat(output, " | m7"); break;
+ case 8: strcat(output, " | m8"); break;
+ case 9: strcat(output, " | m9"); break;
+ case 10: strcat(output, " | ma"); break;
+ case 11: strcat(output, " | mb"); break;
+ case 12: strcat(output, " | mc"); break;
+ case 13: strcat(output, " | md"); break;
+ case 14: strcat(output, " | me"); break;
+ case 15: strcat(output, " | mf"); break;
+ }
+ }
+
+ if(rpdcr == 1) {
+ strcat(output, " | rpdec");
+ }
+
+ if(type == 1) {
+ strcat(output, " | ret");
+ }
+ }
+
+ if(type == 2) { //JP
+ UINT16 brch = (opcode >> 13) & 0x1ff; //branch
+ UINT16 na = (opcode >> 2) & 0x7ff; //next address
+
+ switch(brch) {
+ case 0x000: strcat(output, "jmpso "); break;
+ case 0x080: strcat(output, "jnca "); break;
+ case 0x082: strcat(output, "jca "); break;
+ case 0x084: strcat(output, "jncb "); break;
+ case 0x086: strcat(output, "jcb "); break;
+ case 0x088: strcat(output, "jnza "); break;
+ case 0x08a: strcat(output, "jza "); break;
+ case 0x08c: strcat(output, "jnzb "); break;
+ case 0x08e: strcat(output, "jzb "); break;
+ case 0x090: strcat(output, "jnova0 "); break;
+ case 0x092: strcat(output, "jova0 "); break;
+ case 0x094: strcat(output, "jnovb0 "); break;
+ case 0x096: strcat(output, "jovb0 "); break;
+ case 0x098: strcat(output, "jnova1 "); break;
+ case 0x09a: strcat(output, "jova1 "); break;
+ case 0x09c: strcat(output, "jnovb1 "); break;
+ case 0x09e: strcat(output, "jovb1 "); break;
+ case 0x0a0: strcat(output, "jnsa0 "); break;
+ case 0x0a2: strcat(output, "jsa0 "); break;
+ case 0x0a4: strcat(output, "jnsb0 "); break;
+ case 0x0a6: strcat(output, "jsb0 "); break;
+ case 0x0a8: strcat(output, "jnsa1 "); break;
+ case 0x0aa: strcat(output, "jsa1 "); break;
+ case 0x0ac: strcat(output, "jnsb1 "); break;
+ case 0x0ae: strcat(output, "jsb1 "); break;
+ case 0x0b0: strcat(output, "jdpl0 "); break;
+ case 0x0b1: strcat(output, "jdpln0 "); break;
+ case 0x0b2: strcat(output, "jdplf "); break;
+ case 0x0b3: strcat(output, "jdplnf "); break;
+ case 0x0b4: strcat(output, "jnsiak "); break;
+ case 0x0b6: strcat(output, "jsiak "); break;
+ case 0x0b8: strcat(output, "jnsoak "); break;
+ case 0x0ba: strcat(output, "jsoak "); break;
+ case 0x0bc: strcat(output, "jnrqm "); break;
+ case 0x0be: strcat(output, "jrqm "); break;
+ case 0x100: strcat(output, "ljmp "); break;
+ case 0x101: strcat(output, "hjmp "); break;
+ case 0x140: strcat(output, "lcall "); break;
+ case 0x141: strcat(output, "hcall "); break;
+ default: strcat(output, "?????? "); break;
+ }
char temp[16];
sprintf(temp, "$%x", na);
strcat(output, temp);
- }
+ }
- if(type == 3) { //LD
+ if(type == 3) { //LD
strcat(output, "ld ");
- UINT16 id = opcode >> 6;
+ UINT16 id = opcode >> 6;
UINT8 dst = (opcode >> 0) & 0xf; //destination
char temp[16];
sprintf(temp, "$%x,", id);
strcat(output, temp);
- switch(dst) {
- case 0: strcat(output, "non"); break;
- case 1: strcat(output, "a"); break;
- case 2: strcat(output, "b"); break;
- case 3: strcat(output, "tr"); break;
- case 4: strcat(output, "dp"); break;
- case 5: strcat(output, "rp"); break;
- case 6: strcat(output, "dr"); break;
- case 7: strcat(output, "sr"); break;
- case 8: strcat(output, "sol"); break;
- case 9: strcat(output, "som"); break;
- case 10: strcat(output, "k"); break;
- case 11: strcat(output, "klr"); break;
- case 12: strcat(output, "klm"); break;
- case 13: strcat(output, "l"); break;
- case 14: strcat(output, "trb"); break;
- case 15: strcat(output, "mem"); break;
- }
- }
-
- strcpy(buffer, output);
-
- return 1 | DASMFLAG_SUPPORTED;
+ switch(dst) {
+ case 0: strcat(output, "non"); break;
+ case 1: strcat(output, "a"); break;
+ case 2: strcat(output, "b"); break;
+ case 3: strcat(output, "tr"); break;
+ case 4: strcat(output, "dp"); break;
+ case 5: strcat(output, "rp"); break;
+ case 6: strcat(output, "dr"); break;
+ case 7: strcat(output, "sr"); break;
+ case 8: strcat(output, "sol"); break;
+ case 9: strcat(output, "som"); break;
+ case 10: strcat(output, "k"); break;
+ case 11: strcat(output, "klr"); break;
+ case 12: strcat(output, "klm"); break;
+ case 13: strcat(output, "l"); break;
+ case 14: strcat(output, "trb"); break;
+ case 15: strcat(output, "mem"); break;
+ }
+ }
+
+ strcpy(buffer, output);
+
+ return 1 | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/upd7725/upd7725.c b/src/emu/cpu/upd7725/upd7725.c
index 7918c454f58..a5f9d4ca923 100755
--- a/src/emu/cpu/upd7725/upd7725.c
+++ b/src/emu/cpu/upd7725/upd7725.c
@@ -24,8 +24,8 @@ const device_type UPD96050 = &device_creator<upd96050_device>;
necdsp_device::necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock, UINT32 abits, UINT32 dbits, const char *name)
: cpu_device(mconfig, type, name, tag, owner, clock),
- m_program_config("program", ENDIANNESS_BIG, 32, abits, -2), // data bus width, address bus width, -2 means DWORD-addressable
- m_data_config("data", ENDIANNESS_BIG, 16, dbits, -1), // -1 for WORD-addressable
+ m_program_config("program", ENDIANNESS_BIG, 32, abits, -2), // data bus width, address bus width, -2 means DWORD-addressable
+ m_data_config("data", ENDIANNESS_BIG, 16, dbits, -1), // -1 for WORD-addressable
m_irq(0),
m_program(NULL),
m_data(NULL),
@@ -225,26 +225,26 @@ void necdsp_device::state_string_export(const device_state_entry &entry, astring
{
case UPD7725_FLAGA:
string.printf("%s %s %c%c %s %s %s %s",
- regs.flaga.s1 ? "S1" : "s1",
- regs.flaga.s0 ? "S0" : "s0",
- regs.flaga.c ? "C" : "c",
- regs.flaga.z ? "Z" : "z",
- regs.flaga.ov1 ? "OV1" : "ov1",
- regs.flaga.ov0 ? "OV0" : "ov0",
- regs.flaga.ov0p ? "OV0P" : "ov0p",
- regs.flaga.ov0pp ? "OV0PP" : "ov0pp");
+ regs.flaga.s1 ? "S1" : "s1",
+ regs.flaga.s0 ? "S0" : "s0",
+ regs.flaga.c ? "C" : "c",
+ regs.flaga.z ? "Z" : "z",
+ regs.flaga.ov1 ? "OV1" : "ov1",
+ regs.flaga.ov0 ? "OV0" : "ov0",
+ regs.flaga.ov0p ? "OV0P" : "ov0p",
+ regs.flaga.ov0pp ? "OV0PP" : "ov0pp");
break;
case UPD7725_FLAGB:
string.printf("%s %s %c%c %s %s %s %s",
- regs.flagb.s1 ? "S1" : "s1",
- regs.flagb.s0 ? "S0" : "s0",
- regs.flagb.c ? "C" : "c",
- regs.flagb.z ? "Z" : "z",
- regs.flagb.ov1 ? "OV1" : "ov1",
- regs.flagb.ov0 ? "OV0" : "ov0",
- regs.flagb.ov0p ? "OV0P" : "ov0p",
- regs.flagb.ov0pp ? "OV0PP" : "ov0pp");
+ regs.flagb.s1 ? "S1" : "s1",
+ regs.flagb.s0 ? "S0" : "s0",
+ regs.flagb.c ? "C" : "c",
+ regs.flagb.z ? "Z" : "z",
+ regs.flagb.ov1 ? "OV1" : "ov1",
+ regs.flagb.ov0 ? "OV0" : "ov0",
+ regs.flagb.ov0p ? "OV0P" : "ov0p",
+ regs.flagb.ov0pp ? "OV0PP" : "ov0pp");
break;
}
}
@@ -332,7 +332,7 @@ offs_t necdsp_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o
void necdsp_device::execute_run()
{
- UINT32 opcode;
+ UINT32 opcode;
do
{
@@ -346,10 +346,10 @@ void necdsp_device::execute_run()
regs.pc++;
switch(opcode >> 22)
{
- case 0: exec_op(opcode); break;
- case 1: exec_rt(opcode); break;
- case 2: exec_jp(opcode); break;
- case 3: exec_ld(opcode); break;
+ case 0: exec_op(opcode); break;
+ case 1: exec_rt(opcode); break;
+ case 2: exec_jp(opcode); break;
+ case 3: exec_ld(opcode); break;
}
INT32 result = (INT32)regs.k * regs.l; //sign + 30-bit result
@@ -362,38 +362,38 @@ void necdsp_device::execute_run()
}
void necdsp_device::exec_op(UINT32 opcode) {
- UINT8 pselect = (opcode >> 20)&0x3; //P select
- UINT8 alu = (opcode >> 16)&0xf; //ALU operation mode
- UINT8 asl = (opcode >> 15)&0x1; //accumulator select
- UINT8 dpl = (opcode >> 13)&0x3; //DP low modify
- UINT8 dphm = (opcode >> 9)&0xf; //DP high XOR modify
- UINT8 rpdcr = (opcode >> 8)&0x1; //RP decrement
- UINT8 src = (opcode >> 4)&0xf; //move source
- UINT8 dst = (opcode >> 0)&0xf; //move destination
-
- switch(src) {
- case 0: regs.idb = regs.trb; break;
- case 1: regs.idb = regs.a; break;
- case 2: regs.idb = regs.b; break;
- case 3: regs.idb = regs.tr; break;
- case 4: regs.idb = regs.dp; break;
- case 5: regs.idb = regs.rp; break;
- case 6: regs.idb = m_data->read_word(regs.rp<<1); break;
- case 7: regs.idb = 0x8000 - regs.flaga.s1; break; //SGN
- case 8: regs.idb = regs.dr; regs.sr.rqm = 1; break;
- case 9: regs.idb = regs.dr; break;
- case 10: regs.idb = regs.sr; break;
+ UINT8 pselect = (opcode >> 20)&0x3; //P select
+ UINT8 alu = (opcode >> 16)&0xf; //ALU operation mode
+ UINT8 asl = (opcode >> 15)&0x1; //accumulator select
+ UINT8 dpl = (opcode >> 13)&0x3; //DP low modify
+ UINT8 dphm = (opcode >> 9)&0xf; //DP high XOR modify
+ UINT8 rpdcr = (opcode >> 8)&0x1; //RP decrement
+ UINT8 src = (opcode >> 4)&0xf; //move source
+ UINT8 dst = (opcode >> 0)&0xf; //move destination
+
+ switch(src) {
+ case 0: regs.idb = regs.trb; break;
+ case 1: regs.idb = regs.a; break;
+ case 2: regs.idb = regs.b; break;
+ case 3: regs.idb = regs.tr; break;
+ case 4: regs.idb = regs.dp; break;
+ case 5: regs.idb = regs.rp; break;
+ case 6: regs.idb = m_data->read_word(regs.rp<<1); break;
+ case 7: regs.idb = 0x8000 - regs.flaga.s1; break; //SGN
+ case 8: regs.idb = regs.dr; regs.sr.rqm = 1; break;
+ case 9: regs.idb = regs.dr; break;
+ case 10: regs.idb = regs.sr; break;
case 11: regs.idb = regs.si; break; //MSB
case 12: regs.idb = regs.si; break; //LSB
- case 13: regs.idb = regs.k; break;
- case 14: regs.idb = regs.l; break;
- case 15: regs.idb = dataRAM[regs.dp]; break;
- }
+ case 13: regs.idb = regs.k; break;
+ case 14: regs.idb = regs.l; break;
+ case 15: regs.idb = dataRAM[regs.dp]; break;
+ }
- if(alu) {
- UINT16 p=0, q=0, r=0;
- Flag flag;
- bool c=0;
+ if(alu) {
+ UINT16 p=0, q=0, r=0;
+ Flag flag;
+ bool c=0;
flag.c = 0;
flag.s1 = 0;
@@ -402,98 +402,98 @@ void necdsp_device::exec_op(UINT32 opcode) {
flag.ov0p = 0;
flag.ov0pp = 0;
- switch(pselect) {
- case 0: p = dataRAM[regs.dp]; break;
- case 1: p = regs.idb; break;
- case 2: p = regs.m; break;
- case 3: p = regs.n; break;
- }
-
- switch(asl) {
- case 0: q = regs.a; flag = regs.flaga; c = regs.flagb.c; break;
- case 1: q = regs.b; flag = regs.flagb; c = regs.flaga.c; break;
- }
-
- switch(alu) {
- case 1: r = q | p; break; //OR
- case 2: r = q & p; break; //AND
- case 3: r = q ^ p; break; //XOR
- case 4: r = q - p; break; //SUB
- case 5: r = q + p; break; //ADD
- case 6: r = q - p - c; break; //SBB
- case 7: r = q + p + c; break; //ADC
- case 8: r = q - 1; p = 1; break; //DEC
- case 9: r = q + 1; p = 1; break; //INC
- case 10: r = ~q; break; //CMP
- case 11: r = (q >> 1) | (q & 0x8000); break; //SHR1 (ASR)
- case 12: r = (q << 1) | (c ? 1 : 0); break; //SHL1 (ROL)
- case 13: r = (q << 2) | 3; break; //SHL2
- case 14: r = (q << 4) | 15; break; //SHL4
- case 15: r = (q << 8) | (q >> 8); break; //XCHG
- }
-
- flag.s0 = (r & 0x8000);
- flag.z = (r == 0);
- flag.ov0pp = flag.ov0p;
- flag.ov0p = flag.ov0;
-
- switch(alu) {
- case 1: case 2: case 3: case 10: case 13: case 14: case 15: {
- flag.c = 0;
- flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
- break;
- }
- case 4: case 5: case 6: case 7: case 8: case 9: {
- if(alu & 1) {
- //addition
- flag.ov0 = (q ^ r) & ~(q ^ p) & 0x8000;
- flag.c = (r < q);
- } else {
- //subtraction
- flag.ov0 = (q ^ r) & (q ^ p) & 0x8000;
- flag.c = (r > q);
- }
- break;
- }
- case 11: {
- flag.c = q & 1;
- flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
- break;
- }
- case 12: {
- flag.c = q >> 15;
- flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
- break;
- }
- }
- // flag.ov1 is only set if the number of overflows of the past 3 opcodes (of type 4,5,6,7,8,9) is odd
- flag.ov1 = (flag.ov0 + flag.ov0p + flag.ov0pp) & 1;
- // flag.s1 is based on ov1: s1 = ov1 ^ s0;
- flag.s1 = flag.ov1 ^ flag.s0;
-
- switch(asl) {
- case 0: regs.a = r; regs.flaga = flag; break;
- case 1: regs.b = r; regs.flagb = flag; break;
- }
- }
-
- exec_ld((regs.idb << 6) + dst);
-
- switch(dpl) {
- case 1: regs.dp = (regs.dp & 0xf0) + ((regs.dp + 1) & 0x0f); break; //DPINC
- case 2: regs.dp = (regs.dp & 0xf0) + ((regs.dp - 1) & 0x0f); break; //DPDEC
- case 3: regs.dp = (regs.dp & 0xf0); break; //DPCLR
- }
-
- regs.dp ^= dphm << 4;
-
- if(rpdcr) regs.rp--;
+ switch(pselect) {
+ case 0: p = dataRAM[regs.dp]; break;
+ case 1: p = regs.idb; break;
+ case 2: p = regs.m; break;
+ case 3: p = regs.n; break;
+ }
+
+ switch(asl) {
+ case 0: q = regs.a; flag = regs.flaga; c = regs.flagb.c; break;
+ case 1: q = regs.b; flag = regs.flagb; c = regs.flaga.c; break;
+ }
+
+ switch(alu) {
+ case 1: r = q | p; break; //OR
+ case 2: r = q & p; break; //AND
+ case 3: r = q ^ p; break; //XOR
+ case 4: r = q - p; break; //SUB
+ case 5: r = q + p; break; //ADD
+ case 6: r = q - p - c; break; //SBB
+ case 7: r = q + p + c; break; //ADC
+ case 8: r = q - 1; p = 1; break; //DEC
+ case 9: r = q + 1; p = 1; break; //INC
+ case 10: r = ~q; break; //CMP
+ case 11: r = (q >> 1) | (q & 0x8000); break; //SHR1 (ASR)
+ case 12: r = (q << 1) | (c ? 1 : 0); break; //SHL1 (ROL)
+ case 13: r = (q << 2) | 3; break; //SHL2
+ case 14: r = (q << 4) | 15; break; //SHL4
+ case 15: r = (q << 8) | (q >> 8); break; //XCHG
+ }
+
+ flag.s0 = (r & 0x8000);
+ flag.z = (r == 0);
+ flag.ov0pp = flag.ov0p;
+ flag.ov0p = flag.ov0;
+
+ switch(alu) {
+ case 1: case 2: case 3: case 10: case 13: case 14: case 15: {
+ flag.c = 0;
+ flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
+ break;
+ }
+ case 4: case 5: case 6: case 7: case 8: case 9: {
+ if(alu & 1) {
+ //addition
+ flag.ov0 = (q ^ r) & ~(q ^ p) & 0x8000;
+ flag.c = (r < q);
+ } else {
+ //subtraction
+ flag.ov0 = (q ^ r) & (q ^ p) & 0x8000;
+ flag.c = (r > q);
+ }
+ break;
+ }
+ case 11: {
+ flag.c = q & 1;
+ flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
+ break;
+ }
+ case 12: {
+ flag.c = q >> 15;
+ flag.ov0 = flag.ov0p = flag.ov0pp = 0; // ASSUMPTION: previous ov0 values are nulled here to make ov1 zero
+ break;
+ }
+ }
+ // flag.ov1 is only set if the number of overflows of the past 3 opcodes (of type 4,5,6,7,8,9) is odd
+ flag.ov1 = (flag.ov0 + flag.ov0p + flag.ov0pp) & 1;
+ // flag.s1 is based on ov1: s1 = ov1 ^ s0;
+ flag.s1 = flag.ov1 ^ flag.s0;
+
+ switch(asl) {
+ case 0: regs.a = r; regs.flaga = flag; break;
+ case 1: regs.b = r; regs.flagb = flag; break;
+ }
+ }
+
+ exec_ld((regs.idb << 6) + dst);
+
+ switch(dpl) {
+ case 1: regs.dp = (regs.dp & 0xf0) + ((regs.dp + 1) & 0x0f); break; //DPINC
+ case 2: regs.dp = (regs.dp & 0xf0) + ((regs.dp - 1) & 0x0f); break; //DPDEC
+ case 3: regs.dp = (regs.dp & 0xf0); break; //DPCLR
+ }
+
+ regs.dp ^= dphm << 4;
+
+ if(rpdcr) regs.rp--;
}
void necdsp_device::exec_rt(UINT32 opcode) {
- exec_op(opcode);
- regs.pc = regs.stack[--regs.sp];
- regs.sp &= 0xf;
+ exec_op(opcode);
+ regs.pc = regs.stack[--regs.sp];
+ regs.sp &= 0xf;
}
void necdsp_device::exec_jp(UINT32 opcode) {
@@ -505,81 +505,81 @@ void necdsp_device::exec_jp(UINT32 opcode) {
UINT16 jpl = (bank << 11) | (na << 0);
switch(brch) {
- case 0x000: regs.pc = regs.so; return; //JMPSO
-
- case 0x080: if(regs.flaga.c == 0) regs.pc = jps; return; //JNCA
- case 0x082: if(regs.flaga.c == 1) regs.pc = jps; return; //JCA
- case 0x084: if(regs.flagb.c == 0) regs.pc = jps; return; //JNCB
- case 0x086: if(regs.flagb.c == 1) regs.pc = jps; return; //JCB
-
- case 0x088: if(regs.flaga.z == 0) regs.pc = jps; return; //JNZA
- case 0x08a: if(regs.flaga.z == 1) regs.pc = jps; return; //JZA
- case 0x08c: if(regs.flagb.z == 0) regs.pc = jps; return; //JNZB
- case 0x08e: if(regs.flagb.z == 1) regs.pc = jps; return; //JZB
-
- case 0x090: if(regs.flaga.ov0 == 0) regs.pc = jps; return; //JNOVA0
- case 0x092: if(regs.flaga.ov0 == 1) regs.pc = jps; return; //JOVA0
- case 0x094: if(regs.flagb.ov0 == 0) regs.pc = jps; return; //JNOVB0
- case 0x096: if(regs.flagb.ov0 == 1) regs.pc = jps; return; //JOVB0
-
- case 0x098: if(regs.flaga.ov1 == 0) regs.pc = jps; return; //JNOVA1
- case 0x09a: if(regs.flaga.ov1 == 1) regs.pc = jps; return; //JOVA1
- case 0x09c: if(regs.flagb.ov1 == 0) regs.pc = jps; return; //JNOVB1
- case 0x09e: if(regs.flagb.ov1 == 1) regs.pc = jps; return; //JOVB1
-
- case 0x0a0: if(regs.flaga.s0 == 0) regs.pc = jps; return; //JNSA0
- case 0x0a2: if(regs.flaga.s0 == 1) regs.pc = jps; return; //JSA0
- case 0x0a4: if(regs.flagb.s0 == 0) regs.pc = jps; return; //JNSB0
- case 0x0a6: if(regs.flagb.s0 == 1) regs.pc = jps; return; //JSB0
-
- case 0x0a8: if(regs.flaga.s1 == 0) regs.pc = jps; return; //JNSA1
- case 0x0aa: if(regs.flaga.s1 == 1) regs.pc = jps; return; //JSA1
- case 0x0ac: if(regs.flagb.s1 == 0) regs.pc = jps; return; //JNSB1
- case 0x0ae: if(regs.flagb.s1 == 1) regs.pc = jps; return; //JSB1
-
- case 0x0b0: if((regs.dp & 0x0f) == 0x00) regs.pc = jps; return; //JDPL0
- case 0x0b1: if((regs.dp & 0x0f) != 0x00) regs.pc = jps; return; //JDPLN0
- case 0x0b2: if((regs.dp & 0x0f) == 0x0f) regs.pc = jps; return; //JDPLF
- case 0x0b3: if((regs.dp & 0x0f) != 0x0f) regs.pc = jps; return; //JDPLNF
-
- case 0x0bc: if(regs.sr.rqm == 0) regs.pc = jps; return; //JNRQM
- case 0x0be: if(regs.sr.rqm == 1) regs.pc = jps; return; //JRQM
-
- case 0x100: regs.pc = 0x0000 | jpl; return; //LJMP
- case 0x101: regs.pc = 0x2000 | jpl; return; //HJMP
-
- case 0x140: regs.stack[regs.sp++] = regs.pc; regs.pc = 0x0000 | jpl; regs.sp &= 0xf; return; //LCALL
- case 0x141: regs.stack[regs.sp++] = regs.pc; regs.pc = 0x2000 | jpl; regs.sp &= 0xf; return; //HCALL
+ case 0x000: regs.pc = regs.so; return; //JMPSO
+
+ case 0x080: if(regs.flaga.c == 0) regs.pc = jps; return; //JNCA
+ case 0x082: if(regs.flaga.c == 1) regs.pc = jps; return; //JCA
+ case 0x084: if(regs.flagb.c == 0) regs.pc = jps; return; //JNCB
+ case 0x086: if(regs.flagb.c == 1) regs.pc = jps; return; //JCB
+
+ case 0x088: if(regs.flaga.z == 0) regs.pc = jps; return; //JNZA
+ case 0x08a: if(regs.flaga.z == 1) regs.pc = jps; return; //JZA
+ case 0x08c: if(regs.flagb.z == 0) regs.pc = jps; return; //JNZB
+ case 0x08e: if(regs.flagb.z == 1) regs.pc = jps; return; //JZB
+
+ case 0x090: if(regs.flaga.ov0 == 0) regs.pc = jps; return; //JNOVA0
+ case 0x092: if(regs.flaga.ov0 == 1) regs.pc = jps; return; //JOVA0
+ case 0x094: if(regs.flagb.ov0 == 0) regs.pc = jps; return; //JNOVB0
+ case 0x096: if(regs.flagb.ov0 == 1) regs.pc = jps; return; //JOVB0
+
+ case 0x098: if(regs.flaga.ov1 == 0) regs.pc = jps; return; //JNOVA1
+ case 0x09a: if(regs.flaga.ov1 == 1) regs.pc = jps; return; //JOVA1
+ case 0x09c: if(regs.flagb.ov1 == 0) regs.pc = jps; return; //JNOVB1
+ case 0x09e: if(regs.flagb.ov1 == 1) regs.pc = jps; return; //JOVB1
+
+ case 0x0a0: if(regs.flaga.s0 == 0) regs.pc = jps; return; //JNSA0
+ case 0x0a2: if(regs.flaga.s0 == 1) regs.pc = jps; return; //JSA0
+ case 0x0a4: if(regs.flagb.s0 == 0) regs.pc = jps; return; //JNSB0
+ case 0x0a6: if(regs.flagb.s0 == 1) regs.pc = jps; return; //JSB0
+
+ case 0x0a8: if(regs.flaga.s1 == 0) regs.pc = jps; return; //JNSA1
+ case 0x0aa: if(regs.flaga.s1 == 1) regs.pc = jps; return; //JSA1
+ case 0x0ac: if(regs.flagb.s1 == 0) regs.pc = jps; return; //JNSB1
+ case 0x0ae: if(regs.flagb.s1 == 1) regs.pc = jps; return; //JSB1
+
+ case 0x0b0: if((regs.dp & 0x0f) == 0x00) regs.pc = jps; return; //JDPL0
+ case 0x0b1: if((regs.dp & 0x0f) != 0x00) regs.pc = jps; return; //JDPLN0
+ case 0x0b2: if((regs.dp & 0x0f) == 0x0f) regs.pc = jps; return; //JDPLF
+ case 0x0b3: if((regs.dp & 0x0f) != 0x0f) regs.pc = jps; return; //JDPLNF
+
+ case 0x0bc: if(regs.sr.rqm == 0) regs.pc = jps; return; //JNRQM
+ case 0x0be: if(regs.sr.rqm == 1) regs.pc = jps; return; //JRQM
+
+ case 0x100: regs.pc = 0x0000 | jpl; return; //LJMP
+ case 0x101: regs.pc = 0x2000 | jpl; return; //HJMP
+
+ case 0x140: regs.stack[regs.sp++] = regs.pc; regs.pc = 0x0000 | jpl; regs.sp &= 0xf; return; //LCALL
+ case 0x141: regs.stack[regs.sp++] = regs.pc; regs.pc = 0x2000 | jpl; regs.sp &= 0xf; return; //HCALL
}
}
void necdsp_device::exec_ld(UINT32 opcode) {
- UINT16 id = opcode >> 6; //immediate data
- UINT8 dst = (opcode >> 0) & 0xf; //destination
-
- regs.idb = id;
-
- switch(dst) {
- case 0: break;
- case 1: regs.a = id; break;
- case 2: regs.b = id; break;
- case 3: regs.tr = id; break;
- case 4: regs.dp = id; break;
- case 5: regs.rp = id; break;
- case 6: regs.dr = id; regs.sr.rqm = 1; break;
- case 7: regs.sr = (regs.sr & 0x907c) | (id & ~0x907c);
- m_out_p0_func(regs.sr&0x1);
- m_out_p1_func((regs.sr&0x2)>>1);
- break;
+ UINT16 id = opcode >> 6; //immediate data
+ UINT8 dst = (opcode >> 0) & 0xf; //destination
+
+ regs.idb = id;
+
+ switch(dst) {
+ case 0: break;
+ case 1: regs.a = id; break;
+ case 2: regs.b = id; break;
+ case 3: regs.tr = id; break;
+ case 4: regs.dp = id; break;
+ case 5: regs.rp = id; break;
+ case 6: regs.dr = id; regs.sr.rqm = 1; break;
+ case 7: regs.sr = (regs.sr & 0x907c) | (id & ~0x907c);
+ m_out_p0_func(regs.sr&0x1);
+ m_out_p1_func((regs.sr&0x2)>>1);
+ break;
case 8: regs.so = id; break; //LSB
case 9: regs.so = id; break; //MSB
- case 10: regs.k = id; break;
- case 11: regs.k = id; regs.l = m_data->read_word(regs.rp<<1); break;
- case 12: regs.l = id; regs.k = dataRAM[regs.dp | 0x40]; break;
- case 13: regs.l = id; break;
- case 14: regs.trb = id; break;
- case 15: dataRAM[regs.dp] = id; break;
- }
+ case 10: regs.k = id; break;
+ case 11: regs.k = id; regs.l = m_data->read_word(regs.rp<<1); break;
+ case 12: regs.l = id; regs.k = dataRAM[regs.dp | 0x40]; break;
+ case 13: regs.l = id; break;
+ case 14: regs.trb = id; break;
+ case 15: dataRAM[regs.dp] = id; break;
+ }
}
UINT8 necdsp_device::snesdsp_read(bool mode) {
diff --git a/src/emu/cpu/upd7725/upd7725.h b/src/emu/cpu/upd7725/upd7725.h
index 1ad811144fa..b38bf435cd5 100755
--- a/src/emu/cpu/upd7725/upd7725.h
+++ b/src/emu/cpu/upd7725/upd7725.h
@@ -34,14 +34,14 @@ class upd96050_device;
struct necdsp_interface
{
- devcb_read_line m_in_int_cb;
+ devcb_read_line m_in_int_cb;
//devcb_read8 m_in_si_cb;
//devcb_read_line m_in_sck_cb;
//devcb_read_line m_in_sien_cb;
//devcb_read_line m_in_soen_cb;
//devcb_read_line m_in_dack_cb;
- devcb_write_line m_out_p0_cb;
- devcb_write_line m_out_p1_cb;
+ devcb_write_line m_out_p0_cb;
+ devcb_write_line m_out_p1_cb;
//devcb_write8 m_out_so_cb;
//devcb_write_line m_out_sorq_cb;
//devcb_write_line m_out_drq_cb;
@@ -117,8 +117,8 @@ private:
inline operator unsigned() const
{
return (rqm << 15) + (usf1 << 14) + (usf0 << 13) + (drs << 12)
- + (dma << 11) + (drc << 10) + (soc << 9) + (sic << 8)
- + (ei << 7) + (p1 << 1) + (p0 << 0);
+ + (dma << 11) + (drc << 10) + (soc << 9) + (sic << 8)
+ + (ei << 7) + (p1 << 1) + (p0 << 0);
}
inline unsigned operator=(unsigned d)
@@ -132,11 +132,11 @@ private:
struct Regs
{
- UINT16 pc; //program counter
- UINT16 stack[16]; //LIFO
- UINT16 rp; //ROM pointer
- UINT16 dp; //data pointer
- UINT8 sp; //stack pointer
+ UINT16 pc; //program counter
+ UINT16 stack[16]; //LIFO
+ UINT16 rp; //ROM pointer
+ UINT16 dp; //data pointer
+ UINT8 sp; //stack pointer
INT16 k;
INT16 l;
INT16 m;
@@ -154,30 +154,30 @@ private:
UINT16 idb;
} regs;
- void exec_op(UINT32 opcode);
- void exec_rt(UINT32 opcode);
- void exec_jp(UINT32 opcode);
- void exec_ld(UINT32 opcode);
+ void exec_op(UINT32 opcode);
+ void exec_rt(UINT32 opcode);
+ void exec_jp(UINT32 opcode);
+ void exec_ld(UINT32 opcode);
- void stack_push();
- void stack_pull();
+ void stack_push();
+ void stack_pull();
- int m_icount;
- int m_irq; // old irq line state, for detecting rising edges.
+ int m_icount;
+ int m_irq; // old irq line state, for detecting rising edges.
- address_space *m_program, *m_data;
- direct_read_data *m_direct;
+ address_space *m_program, *m_data;
+ direct_read_data *m_direct;
protected:
// device callbacks
- devcb_resolved_read_line m_in_int_func;
+ devcb_resolved_read_line m_in_int_func;
//devcb_resolved_read8 m_in_si_func;
//devcb_resolved_read_line m_in_sck_func;
//devcb_resolved_read_line m_in_sien_func;
//devcb_resolved_read_line m_in_soen_func;
//devcb_resolved_read_line m_in_dack_func;
- devcb_resolved_write_line m_out_p0_func;
- devcb_resolved_write_line m_out_p1_func;
+ devcb_resolved_write_line m_out_p0_func;
+ devcb_resolved_write_line m_out_p1_func;
//devcb_resolved_write8 m_out_so_func;
//devcb_resolved_write_line m_out_sorq_func;
//devcb_resolved_write_line m_out_drq_func;
diff --git a/src/emu/cpu/upd7810/7810dasm.c b/src/emu/cpu/upd7810/7810dasm.c
index 4bfe53fe67c..2ed2760f8bd 100644
--- a/src/emu/cpu/upd7810/7810dasm.c
+++ b/src/emu/cpu/upd7810/7810dasm.c
@@ -44,8 +44,8 @@ enum
CALL,
CALT,
CLC,
- CLR, /* 7807 */
- CMC, /* 7807 */
+ CLR, /* 7807 */
+ CMC, /* 7807 */
DAA,
DADC,
DADD,
@@ -80,18 +80,18 @@ enum
EQI,
EQIW,
ESUB,
- EX, /* 7801 */
+ EX, /* 7801 */
EXA,
EXH,
EXX,
- EXR, /* 7807 */
+ EXR, /* 7807 */
GTA,
GTAW,
GTAX,
GTI,
GTIW,
HALT,
- IN, /* 7801 */
+ IN, /* 7801 */
INR,
INRW,
INX,
@@ -125,7 +125,7 @@ enum
NEI,
NEIW,
NOP,
- NOT, /* 7807 */
+ NOT, /* 7807 */
OFFA,
OFFAW,
OFFAX,
@@ -136,15 +136,15 @@ enum
ONAX,
ONI,
ONIW,
- OR, /* 7807 */
+ OR, /* 7807 */
ORA,
ORAW,
ORAX,
ORI,
ORIW,
- OUT, /* 7801 */
- PER, /* 7801 */
- PEX, /* 7801 */
+ OUT, /* 7801 */
+ PER, /* 7801 */
+ PEX, /* 7801 */
POP,
PUSH,
RET,
@@ -160,9 +160,9 @@ enum
SBCD,
SBI,
SDED,
- SETB, /* 7807 */
+ SETB, /* 7807 */
SHLD,
- SIO, /* 7801 */
+ SIO, /* 7801 */
SK,
SKIT,
SKN,
@@ -177,7 +177,7 @@ enum
STAX,
STC,
STEAX,
- STM, /* 7801 */
+ STM, /* 7801 */
STOP,
SUB,
SUBNB,
@@ -188,7 +188,7 @@ enum
SUI,
SUINB,
TABLE,
- XOR, /* 7807 */
+ XOR, /* 7807 */
XRA,
XRAW,
XRAX,
@@ -224,8 +224,8 @@ static const char *const token[] =
"CALL",
"CALT",
"CLC",
- "CLR", /* 7807 */
- "CMC", /* 7807 */
+ "CLR", /* 7807 */
+ "CMC", /* 7807 */
"DAA",
"DADC",
"DADD",
@@ -260,18 +260,18 @@ static const char *const token[] =
"EQI",
"EQIW",
"ESUB",
- "EX", /* 7801 */
+ "EX", /* 7801 */
"EXA",
"EXH",
"EXX",
- "EXR", /* 7807 */
+ "EXR", /* 7807 */
"GTA",
"GTAW",
"GTAX",
"GTI",
"GTIW",
"HALT",
- "IN", /* 7801 */
+ "IN", /* 7801 */
"INR",
"INRW",
"INX",
@@ -305,7 +305,7 @@ static const char *const token[] =
"NEI",
"NEIW",
"NOP",
- "NOT", /* 7807 */
+ "NOT", /* 7807 */
"OFFA",
"OFFAW",
"OFFAX",
@@ -316,15 +316,15 @@ static const char *const token[] =
"ONAX",
"ONI",
"ONIW",
- "OR", /* 7807 */
+ "OR", /* 7807 */
"ORA",
"ORAW",
"ORAX",
"ORI",
"ORIW",
- "OUT", /* 7801 */
- "PER", /* 7801 */
- "PEX", /* 7801 */
+ "OUT", /* 7801 */
+ "PER", /* 7801 */
+ "PEX", /* 7801 */
"POP",
"PUSH",
"RET",
@@ -340,9 +340,9 @@ static const char *const token[] =
"SBCD",
"SBI",
"SDED",
- "SETB", /* 7807 */
+ "SETB", /* 7807 */
"SHLD",
- "SIO", /* 7801 */
+ "SIO", /* 7801 */
"SK",
"SKIT",
"SKN",
@@ -357,7 +357,7 @@ static const char *const token[] =
"STAX",
"STC",
"STEAX",
- "STM", /*7801 */
+ "STM", /*7801 */
"STOP",
"SUB",
"SUBNB",
@@ -368,7 +368,7 @@ static const char *const token[] =
"SUI",
"SUINB",
"TABLE",
- "XOR", /* 7807 */
+ "XOR", /* 7807 */
"XRA",
"XRAW",
"XRAX",
@@ -379,70 +379,70 @@ static const char *const token[] =
/* prefix 48 */
static const struct dasm_s dasm48_7810[256] =
{
- {illegal,0 }, /* 00: 0100 1000 0000 0000 */
+ {illegal,0 }, /* 00: 0100 1000 0000 0000 */
{SLRC,"A" }, /* 01: 0100 1000 0000 0001 */
{SLRC,"B" }, /* 02: 0100 1000 0000 0010 */
{SLRC,"C" }, /* 03: 0100 1000 0000 0011 */
- {illegal,0 }, /* 04: 0100 1000 0000 0100 */
+ {illegal,0 }, /* 04: 0100 1000 0000 0100 */
{SLLC,"A" }, /* 05: 0100 1000 0000 0101 */
{SLLC,"B" }, /* 06: 0100 1000 0000 0110 */
{SLLC,"C" }, /* 07: 0100 1000 0000 0111 */
{SK,"NV" }, /* 08: 0100 1000 0000 1000 */
- {illegal,0 }, /* 09: 0100 1000 0000 1001 */
+ {illegal,0 }, /* 09: 0100 1000 0000 1001 */
{SK,"CY" }, /* 0a: 0100 1000 0000 1010 */
{SK,"HC" }, /* 0b: 0100 1000 0000 1011 */
{SK,"Z" }, /* 0c: 0100 1000 0000 1100 */
- {illegal,0 }, /* 0d: 0100 1000 0000 1101 */
- {illegal,0 }, /* 0e: 0100 1000 0000 1110 */
- {illegal,0 }, /* 0f: 0100 1000 0000 1111 */
-
- {illegal,0 }, /* 10: 0100 1000 0001 0000 */
- {illegal,0 }, /* 11: 0100 1000 0001 0001 */
- {illegal,0 }, /* 12: 0100 1000 0001 0010 */
- {illegal,0 }, /* 13: 0100 1000 0001 0011 */
- {illegal,0 }, /* 14: 0100 1000 0001 0100 */
- {illegal,0 }, /* 15: 0100 1000 0001 0101 */
- {illegal,0 }, /* 16: 0100 1000 0001 0110 */
- {illegal,0 }, /* 17: 0100 1000 0001 0111 */
+ {illegal,0 }, /* 0d: 0100 1000 0000 1101 */
+ {illegal,0 }, /* 0e: 0100 1000 0000 1110 */
+ {illegal,0 }, /* 0f: 0100 1000 0000 1111 */
+
+ {illegal,0 }, /* 10: 0100 1000 0001 0000 */
+ {illegal,0 }, /* 11: 0100 1000 0001 0001 */
+ {illegal,0 }, /* 12: 0100 1000 0001 0010 */
+ {illegal,0 }, /* 13: 0100 1000 0001 0011 */
+ {illegal,0 }, /* 14: 0100 1000 0001 0100 */
+ {illegal,0 }, /* 15: 0100 1000 0001 0101 */
+ {illegal,0 }, /* 16: 0100 1000 0001 0110 */
+ {illegal,0 }, /* 17: 0100 1000 0001 0111 */
{SKN,"NV" }, /* 18: 0100 1000 0001 1000 */
- {illegal,0 }, /* 19: 0100 1000 0001 1001 */
+ {illegal,0 }, /* 19: 0100 1000 0001 1001 */
{SKN,"CY" }, /* 1a: 0100 1000 0001 1010 */
{SKN,"HC" }, /* 1b: 0100 1000 0001 1011 */
{SKN,"Z" }, /* 1c: 0100 1000 0001 1100 */
- {illegal,0 }, /* 1d: 0100 1000 0001 1101 */
- {illegal,0 }, /* 1e: 0100 1000 0001 1110 */
- {illegal,0 }, /* 1f: 0100 1000 0001 1111 */
+ {illegal,0 }, /* 1d: 0100 1000 0001 1101 */
+ {illegal,0 }, /* 1e: 0100 1000 0001 1110 */
+ {illegal,0 }, /* 1f: 0100 1000 0001 1111 */
- {illegal,0 }, /* 20: 0100 1000 0010 0000 */
+ {illegal,0 }, /* 20: 0100 1000 0010 0000 */
{SLR,"A" }, /* 21: 0100 1000 0010 0001 */
{SLR,"B" }, /* 22: 0100 1000 0010 0010 */
{SLR,"C" }, /* 23: 0100 1000 0010 0011 */
- {illegal,0 }, /* 24: 0100 1000 0010 0100 */
+ {illegal,0 }, /* 24: 0100 1000 0010 0100 */
{SLL,"A" }, /* 25: 0100 1000 0010 0101 */
{SLL,"B" }, /* 26: 0100 1000 0010 0110 */
{SLL,"C" }, /* 27: 0100 1000 0010 0111 */
- {JEA,0 }, /* 28: 0100 1000 0010 1000 */
- {CALB,0 }, /* 29: 0100 1000 0010 1001 */
- {CLC,0 }, /* 2a: 0100 1000 0010 1010 */
- {STC,0 }, /* 2b: 0100 1000 0010 1011 */
- {illegal,0 }, /* 2c: 0100 1000 0010 1100 */
+ {JEA,0 }, /* 28: 0100 1000 0010 1000 */
+ {CALB,0 }, /* 29: 0100 1000 0010 1001 */
+ {CLC,0 }, /* 2a: 0100 1000 0010 1010 */
+ {STC,0 }, /* 2b: 0100 1000 0010 1011 */
+ {illegal,0 }, /* 2c: 0100 1000 0010 1100 */
{MUL,"A" }, /* 2d: 0100 1000 0010 1101 */
{MUL,"B" }, /* 2e: 0100 1000 0010 1110 */
{MUL,"C" }, /* 2f: 0100 1000 0010 1111 */
- {illegal,0 }, /* 30: 0100 1000 0011 0000 */
+ {illegal,0 }, /* 30: 0100 1000 0011 0000 */
{RLR,"A" }, /* 31: 0100 1000 0011 0001 */
{RLR,"B" }, /* 32: 0100 1000 0011 0010 */
{RLR,"C" }, /* 33: 0100 1000 0011 0011 */
- {illegal,0 }, /* 34: 0100 1000 0011 0100 */
+ {illegal,0 }, /* 34: 0100 1000 0011 0100 */
{RLL,"A" }, /* 35: 0100 1000 0011 0101 */
{RLL,"B" }, /* 36: 0100 1000 0011 0110 */
{RLL,"C" }, /* 37: 0100 1000 0011 0111 */
- {RLD,0 }, /* 38: 0100 1000 0011 1000 */
- {RRD,0 }, /* 39: 0100 1000 0011 1001 */
- {NEGA,0 }, /* 3a: 0100 1000 0011 1010 */
- {HALT,0 }, /* 3b: 0100 1000 0011 1011 */
- {illegal,0 }, /* 3c: 0100 1000 0011 1100 */
+ {RLD,0 }, /* 38: 0100 1000 0011 1000 */
+ {RRD,0 }, /* 39: 0100 1000 0011 1001 */
+ {NEGA,0 }, /* 3a: 0100 1000 0011 1010 */
+ {HALT,0 }, /* 3b: 0100 1000 0011 1011 */
+ {illegal,0 }, /* 3c: 0100 1000 0011 1100 */
{DIV,"A" }, /* 3d: 0100 1000 0011 1101 */
{DIV,"B" }, /* 3e: 0100 1000 0011 1110 */
{DIV,"C" }, /* 3f: 0100 1000 0011 1111 */
@@ -460,26 +460,26 @@ static const struct dasm_s dasm48_7810[256] =
{SKIT,"FST" }, /* 4a: 0100 1000 0100 1010 */
{SKIT,"ER" }, /* 4b: 0100 1000 0100 1011 */
{SKIT,"OV" }, /* 4c: 0100 1000 0100 1100 */
- {illegal,0 }, /* 4d: 0100 1000 0100 1101 */
- {illegal,0 }, /* 4e: 0100 1000 0100 1110 */
- {illegal,0 }, /* 4f: 0100 1000 0100 1111 */
+ {illegal,0 }, /* 4d: 0100 1000 0100 1101 */
+ {illegal,0 }, /* 4e: 0100 1000 0100 1110 */
+ {illegal,0 }, /* 4f: 0100 1000 0100 1111 */
{SKIT,"AN4" }, /* 50: 0100 1000 0101 0000 */
{SKIT,"AN5" }, /* 51: 0100 1000 0101 0001 */
{SKIT,"AN6" }, /* 52: 0100 1000 0101 0010 */
{SKIT,"AN7" }, /* 53: 0100 1000 0101 0011 */
{SKIT,"SB" }, /* 54: 0100 1000 0101 0100 */
- {illegal,0 }, /* 55: 0100 1000 0101 0101 */
- {illegal,0 }, /* 56: 0100 1000 0101 0110 */
- {illegal,0 }, /* 57: 0100 1000 0101 0111 */
- {illegal,0 }, /* 58: 0100 1000 0101 1000 */
- {illegal,0 }, /* 59: 0100 1000 0101 1001 */
- {illegal,0 }, /* 5a: 0100 1000 0101 1010 */
- {illegal,0 }, /* 5b: 0100 1000 0101 1011 */
- {illegal,0 }, /* 5c: 0100 1000 0101 1100 */
- {illegal,0 }, /* 5d: 0100 1000 0101 1101 */
- {illegal,0 }, /* 5e: 0100 1000 0101 1110 */
- {illegal,0 }, /* 5f: 0100 1000 0101 1111 */
+ {illegal,0 }, /* 55: 0100 1000 0101 0101 */
+ {illegal,0 }, /* 56: 0100 1000 0101 0110 */
+ {illegal,0 }, /* 57: 0100 1000 0101 0111 */
+ {illegal,0 }, /* 58: 0100 1000 0101 1000 */
+ {illegal,0 }, /* 59: 0100 1000 0101 1001 */
+ {illegal,0 }, /* 5a: 0100 1000 0101 1010 */
+ {illegal,0 }, /* 5b: 0100 1000 0101 1011 */
+ {illegal,0 }, /* 5c: 0100 1000 0101 1100 */
+ {illegal,0 }, /* 5d: 0100 1000 0101 1101 */
+ {illegal,0 }, /* 5e: 0100 1000 0101 1110 */
+ {illegal,0 }, /* 5f: 0100 1000 0101 1111 */
{SKNIT,"NMI" }, /* 60: 0100 1000 0110 0000 */
{SKNIT,"FT0" }, /* 61: 0100 1000 0110 0001 */
@@ -494,55 +494,55 @@ static const struct dasm_s dasm48_7810[256] =
{SKNIT,"FST" }, /* 6a: 0100 1000 0110 1010 */
{SKNIT,"ER" }, /* 6b: 0100 1000 0110 1011 */
{SKNIT,"OV" }, /* 6c: 0100 1000 0110 1100 */
- {illegal,0 }, /* 6d: 0100 1000 0110 1101 */
- {illegal,0 }, /* 6e: 0100 1000 0110 1110 */
- {illegal,0 }, /* 6f: 0100 1000 0110 1111 */
+ {illegal,0 }, /* 6d: 0100 1000 0110 1101 */
+ {illegal,0 }, /* 6e: 0100 1000 0110 1110 */
+ {illegal,0 }, /* 6f: 0100 1000 0110 1111 */
{SKNIT,"AN4" }, /* 70: 0100 1000 0111 0000 */
{SKNIT,"AN5" }, /* 71: 0100 1000 0111 0001 */
{SKNIT,"AN6" }, /* 72: 0100 1000 0111 0010 */
{SKNIT,"AN7" }, /* 73: 0100 1000 0111 0011 */
{SKNIT,"SB" }, /* 74: 0100 1000 0111 0100 */
- {illegal,0 }, /* 75: 0100 1000 0111 0101 */
- {illegal,0 }, /* 76: 0100 1000 0111 0110 */
- {illegal,0 }, /* 77: 0100 1000 0111 0111 */
- {illegal,0 }, /* 78: 0100 1000 0111 1000 */
- {illegal,0 }, /* 79: 0100 1000 0111 1001 */
- {illegal,0 }, /* 7a: 0100 1000 0111 1010 */
- {illegal,0 }, /* 7b: 0100 1000 0111 1011 */
- {illegal,0 }, /* 7c: 0100 1000 0111 1100 */
- {illegal,0 }, /* 7d: 0100 1000 0111 1101 */
- {illegal,0 }, /* 7e: 0100 1000 0111 1110 */
- {illegal,0 }, /* 7f: 0100 1000 0111 1111 */
-
- {illegal,0 }, /* 80: 0100 1000 1000 0000 */
- {illegal,0 }, /* 81: 0100 1000 1000 0001 */
+ {illegal,0 }, /* 75: 0100 1000 0111 0101 */
+ {illegal,0 }, /* 76: 0100 1000 0111 0110 */
+ {illegal,0 }, /* 77: 0100 1000 0111 0111 */
+ {illegal,0 }, /* 78: 0100 1000 0111 1000 */
+ {illegal,0 }, /* 79: 0100 1000 0111 1001 */
+ {illegal,0 }, /* 7a: 0100 1000 0111 1010 */
+ {illegal,0 }, /* 7b: 0100 1000 0111 1011 */
+ {illegal,0 }, /* 7c: 0100 1000 0111 1100 */
+ {illegal,0 }, /* 7d: 0100 1000 0111 1101 */
+ {illegal,0 }, /* 7e: 0100 1000 0111 1110 */
+ {illegal,0 }, /* 7f: 0100 1000 0111 1111 */
+
+ {illegal,0 }, /* 80: 0100 1000 1000 0000 */
+ {illegal,0 }, /* 81: 0100 1000 1000 0001 */
{LDEAX,"(DE)" }, /* 82: 0100 1000 1000 0010 */
{LDEAX,"(HL)" }, /* 83: 0100 1000 1000 0011 */
{LDEAX,"(DE++)" }, /* 84: 0100 1000 1000 0100 */
{LDEAX,"(HL++)" }, /* 85: 0100 1000 1000 0101 */
- {illegal,0 }, /* 86: 0100 1000 1000 0110 */
- {illegal,0 }, /* 87: 0100 1000 1000 0111 */
- {illegal,0 }, /* 88: 0100 1000 1000 1000 */
- {illegal,0 }, /* 89: 0100 1000 1000 1001 */
- {illegal,0 }, /* 8a: 0100 1000 1000 1010 */
+ {illegal,0 }, /* 86: 0100 1000 1000 0110 */
+ {illegal,0 }, /* 87: 0100 1000 1000 0111 */
+ {illegal,0 }, /* 88: 0100 1000 1000 1000 */
+ {illegal,0 }, /* 89: 0100 1000 1000 1001 */
+ {illegal,0 }, /* 8a: 0100 1000 1000 1010 */
{LDEAX,"(DE+%b)"}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */
{LDEAX,"(HL+A)" }, /* 8c: 0100 1000 1000 1100 */
{LDEAX,"(HL+B)" }, /* 8d: 0100 1000 1000 1101 */
{LDEAX,"(HL+EA)"}, /* 8e: 0100 1000 1000 1110 */
{LDEAX,"(HL+%b)"}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */
- {illegal,0 }, /* 90: 0100 1000 1000 0000 */
- {illegal,0 }, /* 91: 0100 1000 1000 0001 */
+ {illegal,0 }, /* 90: 0100 1000 1000 0000 */
+ {illegal,0 }, /* 91: 0100 1000 1000 0001 */
{STEAX,"(DE)" }, /* 92: 0100 1000 1000 0010 */
{STEAX,"(HL)" }, /* 93: 0100 1000 1000 0011 */
{STEAX,"(DE++)" }, /* 94: 0100 1000 1000 0100 */
{STEAX,"(HL++)" }, /* 95: 0100 1000 1000 0101 */
- {illegal,0 }, /* 96: 0100 1000 1000 0110 */
- {illegal,0 }, /* 97: 0100 1000 1000 0111 */
- {illegal,0 }, /* 98: 0100 1000 1000 1000 */
- {illegal,0 }, /* 99: 0100 1000 1000 1001 */
- {illegal,0 }, /* 9a: 0100 1000 1000 1010 */
+ {illegal,0 }, /* 96: 0100 1000 1000 0110 */
+ {illegal,0 }, /* 97: 0100 1000 1000 0111 */
+ {illegal,0 }, /* 98: 0100 1000 1000 1000 */
+ {illegal,0 }, /* 99: 0100 1000 1000 1001 */
+ {illegal,0 }, /* 9a: 0100 1000 1000 1010 */
{STEAX,"(DE+%b)"}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */
{STEAX,"(HL+A)" }, /* 9c: 0100 1000 1000 1100 */
{STEAX,"(HL+B)" }, /* 9d: 0100 1000 1000 1101 */
@@ -550,174 +550,174 @@ static const struct dasm_s dasm48_7810[256] =
{STEAX,"(HL+%b)"}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */
{DSLR,"EA" }, /* a0: 0100 1000 1010 0000 */
- {illegal,0 }, /* a1: 0100 1000 1010 0001 */
- {illegal,0 }, /* a2: 0100 1000 1010 0010 */
- {illegal,0 }, /* a3: 0100 1000 1010 0011 */
+ {illegal,0 }, /* a1: 0100 1000 1010 0001 */
+ {illegal,0 }, /* a2: 0100 1000 1010 0010 */
+ {illegal,0 }, /* a3: 0100 1000 1010 0011 */
{DSLL,"EA" }, /* a4: 0100 1000 1010 0100 */
- {illegal,0 }, /* a5: 0100 1000 1010 0101 */
- {illegal,0 }, /* a6: 0100 1000 1010 0110 */
- {illegal,0 }, /* a7: 0100 1000 1010 0111 */
- {TABLE,0 }, /* a8: 0100 1000 1010 1000 */
- {illegal,0 }, /* a9: 0100 1000 1010 1001 */
- {illegal,0 }, /* aa: 0100 1000 1010 1010 */
- {illegal,0 }, /* ab: 0100 1000 1010 1011 */
- {illegal,0 }, /* ac: 0100 1000 1010 1100 */
- {illegal,0 }, /* ad: 0100 1000 1010 1101 */
- {illegal,0 }, /* ae: 0100 1000 1010 1110 */
- {illegal,0 }, /* af: 0100 1000 1010 1111 */
+ {illegal,0 }, /* a5: 0100 1000 1010 0101 */
+ {illegal,0 }, /* a6: 0100 1000 1010 0110 */
+ {illegal,0 }, /* a7: 0100 1000 1010 0111 */
+ {TABLE,0 }, /* a8: 0100 1000 1010 1000 */
+ {illegal,0 }, /* a9: 0100 1000 1010 1001 */
+ {illegal,0 }, /* aa: 0100 1000 1010 1010 */
+ {illegal,0 }, /* ab: 0100 1000 1010 1011 */
+ {illegal,0 }, /* ac: 0100 1000 1010 1100 */
+ {illegal,0 }, /* ad: 0100 1000 1010 1101 */
+ {illegal,0 }, /* ae: 0100 1000 1010 1110 */
+ {illegal,0 }, /* af: 0100 1000 1010 1111 */
{DRLR,"EA" }, /* b0: 0100 1000 1011 0000 */
- {illegal,0 }, /* b1: 0100 1000 1011 0001 */
- {illegal,0 }, /* b2: 0100 1000 1011 0010 */
- {illegal,0 }, /* b3: 0100 1000 1011 0011 */
+ {illegal,0 }, /* b1: 0100 1000 1011 0001 */
+ {illegal,0 }, /* b2: 0100 1000 1011 0010 */
+ {illegal,0 }, /* b3: 0100 1000 1011 0011 */
{DRLL,"EA" }, /* b4: 0100 1000 1011 0100 */
- {illegal,0 }, /* b5: 0100 1000 1011 0101 */
- {illegal,0 }, /* b6: 0100 1000 1011 0110 */
- {illegal,0 }, /* b7: 0100 1000 1011 0111 */
- {illegal,0 }, /* b8: 0100 1000 1011 1000 */
- {illegal,0 }, /* b9: 0100 1000 1011 1001 */
- {illegal,0 }, /* ba: 0100 1000 1011 1010 */
- {STOP,0 }, /* bb: 0100 1000 1011 1011 */ /* 7810 */
- {illegal,0 }, /* bc: 0100 1000 1011 1100 */
- {illegal,0 }, /* bd: 0100 1000 1011 1101 */
- {illegal,0 }, /* be: 0100 1000 1011 1110 */
- {illegal,0 }, /* bf: 0100 1000 1011 1111 */
+ {illegal,0 }, /* b5: 0100 1000 1011 0101 */
+ {illegal,0 }, /* b6: 0100 1000 1011 0110 */
+ {illegal,0 }, /* b7: 0100 1000 1011 0111 */
+ {illegal,0 }, /* b8: 0100 1000 1011 1000 */
+ {illegal,0 }, /* b9: 0100 1000 1011 1001 */
+ {illegal,0 }, /* ba: 0100 1000 1011 1010 */
+ {STOP,0 }, /* bb: 0100 1000 1011 1011 */ /* 7810 */
+ {illegal,0 }, /* bc: 0100 1000 1011 1100 */
+ {illegal,0 }, /* bd: 0100 1000 1011 1101 */
+ {illegal,0 }, /* be: 0100 1000 1011 1110 */
+ {illegal,0 }, /* bf: 0100 1000 1011 1111 */
{DMOV,"EA,ECNT" }, /* c0: 0100 1000 1100 0000 */
- {DMOV,"EA,ECPT" }, /* c1: 0100 1000 1100 0001 */ /* 7810 */
- {illegal,0 }, /* c2: 0100 1000 1100 0010 */
- {illegal,0 }, /* c3: 0100 1000 1100 0011 */
- {illegal,0 }, /* c4: 0100 1000 1100 0100 */
- {illegal,0 }, /* c5: 0100 1000 1100 0101 */
- {illegal,0 }, /* c6: 0100 1000 1100 0110 */
- {illegal,0 }, /* c7: 0100 1000 1100 0111 */
- {illegal,0 }, /* c8: 0100 1000 1100 1000 */
- {illegal,0 }, /* c9: 0100 1000 1100 1001 */
- {illegal,0 }, /* ca: 0100 1000 1100 1010 */
- {illegal,0 }, /* cb: 0100 1000 1100 1011 */
- {illegal,0 }, /* cc: 0100 1000 1100 1100 */
- {illegal,0 }, /* cd: 0100 1000 1100 1101 */
- {illegal,0 }, /* ce: 0100 1000 1100 1110 */
- {illegal,0 }, /* cf: 0100 1000 1100 1111 */
-
- {illegal,0 }, /* d0: 0100 1000 1101 0000 */
- {illegal,0 }, /* d1: 0100 1000 1101 0001 */
+ {DMOV,"EA,ECPT" }, /* c1: 0100 1000 1100 0001 */ /* 7810 */
+ {illegal,0 }, /* c2: 0100 1000 1100 0010 */
+ {illegal,0 }, /* c3: 0100 1000 1100 0011 */
+ {illegal,0 }, /* c4: 0100 1000 1100 0100 */
+ {illegal,0 }, /* c5: 0100 1000 1100 0101 */
+ {illegal,0 }, /* c6: 0100 1000 1100 0110 */
+ {illegal,0 }, /* c7: 0100 1000 1100 0111 */
+ {illegal,0 }, /* c8: 0100 1000 1100 1000 */
+ {illegal,0 }, /* c9: 0100 1000 1100 1001 */
+ {illegal,0 }, /* ca: 0100 1000 1100 1010 */
+ {illegal,0 }, /* cb: 0100 1000 1100 1011 */
+ {illegal,0 }, /* cc: 0100 1000 1100 1100 */
+ {illegal,0 }, /* cd: 0100 1000 1100 1101 */
+ {illegal,0 }, /* ce: 0100 1000 1100 1110 */
+ {illegal,0 }, /* cf: 0100 1000 1100 1111 */
+
+ {illegal,0 }, /* d0: 0100 1000 1101 0000 */
+ {illegal,0 }, /* d1: 0100 1000 1101 0001 */
{DMOV,"ETM0,EA" }, /* d2: 0100 1000 1101 0010 */
{DMOV,"ETM1,EA" }, /* d3: 0100 1000 1101 0011 */
- {illegal,0 }, /* d4: 0100 1000 1101 0100 */
- {illegal,0 }, /* d5: 0100 1000 1101 0101 */
- {illegal,0 }, /* d6: 0100 1000 1101 0110 */
- {illegal,0 }, /* d7: 0100 1000 1101 0111 */
- {illegal,0 }, /* d8: 0100 1000 1101 1000 */
- {illegal,0 }, /* d9: 0100 1000 1101 1001 */
- {illegal,0 }, /* da: 0100 1000 1101 1010 */
- {illegal,0 }, /* db: 0100 1000 1101 1011 */
- {illegal,0 }, /* dc: 0100 1000 1101 1100 */
- {illegal,0 }, /* dd: 0100 1000 1101 1101 */
- {illegal,0 }, /* de: 0100 1000 1101 1110 */
- {illegal,0 }, /* df: 0100 1000 1101 1111 */
-
- {illegal,0 }, /* e0: 0100 1000 1110 0000 */
- {illegal,0 }, /* e1: 0100 1000 1110 0001 */
- {illegal,0 }, /* e2: 0100 1000 1110 0010 */
- {illegal,0 }, /* e3: 0100 1000 1110 0011 */
- {illegal,0 }, /* e4: 0100 1000 1110 0100 */
- {illegal,0 }, /* e5: 0100 1000 1110 0101 */
- {illegal,0 }, /* e6: 0100 1000 1110 0110 */
- {illegal,0 }, /* e7: 0100 1000 1110 0111 */
- {illegal,0 }, /* e8: 0100 1000 1110 1000 */
- {illegal,0 }, /* e9: 0100 1000 1110 1001 */
- {illegal,0 }, /* ea: 0100 1000 1110 1010 */
- {illegal,0 }, /* eb: 0100 1000 1110 1011 */
- {illegal,0 }, /* ec: 0100 1000 1110 1100 */
- {illegal,0 }, /* ed: 0100 1000 1110 1101 */
- {illegal,0 }, /* ee: 0100 1000 1110 1110 */
- {illegal,0 }, /* ef: 0100 1000 1110 1111 */
-
- {illegal,0 }, /* f0: 0100 1000 1111 0000 */
- {illegal,0 }, /* f1: 0100 1000 1111 0001 */
- {illegal,0 }, /* f2: 0100 1000 1111 0010 */
- {illegal,0 }, /* f3: 0100 1000 1111 0011 */
- {illegal,0 }, /* f4: 0100 1000 1111 0100 */
- {illegal,0 }, /* f5: 0100 1000 1111 0101 */
- {illegal,0 }, /* f6: 0100 1000 1111 0110 */
- {illegal,0 }, /* f7: 0100 1000 1111 0111 */
- {illegal,0 }, /* f8: 0100 1000 1111 1000 */
- {illegal,0 }, /* f9: 0100 1000 1111 1001 */
- {illegal,0 }, /* fa: 0100 1000 1111 1010 */
- {illegal,0 }, /* fb: 0100 1000 1111 1011 */
- {illegal,0 }, /* fc: 0100 1000 1111 1100 */
- {illegal,0 }, /* fd: 0100 1000 1111 1101 */
- {illegal,0 }, /* fe: 0100 1000 1111 1110 */
- {illegal,0 } /* ff: 0100 1000 1111 1111 */
+ {illegal,0 }, /* d4: 0100 1000 1101 0100 */
+ {illegal,0 }, /* d5: 0100 1000 1101 0101 */
+ {illegal,0 }, /* d6: 0100 1000 1101 0110 */
+ {illegal,0 }, /* d7: 0100 1000 1101 0111 */
+ {illegal,0 }, /* d8: 0100 1000 1101 1000 */
+ {illegal,0 }, /* d9: 0100 1000 1101 1001 */
+ {illegal,0 }, /* da: 0100 1000 1101 1010 */
+ {illegal,0 }, /* db: 0100 1000 1101 1011 */
+ {illegal,0 }, /* dc: 0100 1000 1101 1100 */
+ {illegal,0 }, /* dd: 0100 1000 1101 1101 */
+ {illegal,0 }, /* de: 0100 1000 1101 1110 */
+ {illegal,0 }, /* df: 0100 1000 1101 1111 */
+
+ {illegal,0 }, /* e0: 0100 1000 1110 0000 */
+ {illegal,0 }, /* e1: 0100 1000 1110 0001 */
+ {illegal,0 }, /* e2: 0100 1000 1110 0010 */
+ {illegal,0 }, /* e3: 0100 1000 1110 0011 */
+ {illegal,0 }, /* e4: 0100 1000 1110 0100 */
+ {illegal,0 }, /* e5: 0100 1000 1110 0101 */
+ {illegal,0 }, /* e6: 0100 1000 1110 0110 */
+ {illegal,0 }, /* e7: 0100 1000 1110 0111 */
+ {illegal,0 }, /* e8: 0100 1000 1110 1000 */
+ {illegal,0 }, /* e9: 0100 1000 1110 1001 */
+ {illegal,0 }, /* ea: 0100 1000 1110 1010 */
+ {illegal,0 }, /* eb: 0100 1000 1110 1011 */
+ {illegal,0 }, /* ec: 0100 1000 1110 1100 */
+ {illegal,0 }, /* ed: 0100 1000 1110 1101 */
+ {illegal,0 }, /* ee: 0100 1000 1110 1110 */
+ {illegal,0 }, /* ef: 0100 1000 1110 1111 */
+
+ {illegal,0 }, /* f0: 0100 1000 1111 0000 */
+ {illegal,0 }, /* f1: 0100 1000 1111 0001 */
+ {illegal,0 }, /* f2: 0100 1000 1111 0010 */
+ {illegal,0 }, /* f3: 0100 1000 1111 0011 */
+ {illegal,0 }, /* f4: 0100 1000 1111 0100 */
+ {illegal,0 }, /* f5: 0100 1000 1111 0101 */
+ {illegal,0 }, /* f6: 0100 1000 1111 0110 */
+ {illegal,0 }, /* f7: 0100 1000 1111 0111 */
+ {illegal,0 }, /* f8: 0100 1000 1111 1000 */
+ {illegal,0 }, /* f9: 0100 1000 1111 1001 */
+ {illegal,0 }, /* fa: 0100 1000 1111 1010 */
+ {illegal,0 }, /* fb: 0100 1000 1111 1011 */
+ {illegal,0 }, /* fc: 0100 1000 1111 1100 */
+ {illegal,0 }, /* fd: 0100 1000 1111 1101 */
+ {illegal,0 }, /* fe: 0100 1000 1111 1110 */
+ {illegal,0 } /* ff: 0100 1000 1111 1111 */
};
static const struct dasm_s dasm48_7807[256] =
{
- {illegal,0 }, /* 00: 0100 1000 0000 0000 */
+ {illegal,0 }, /* 00: 0100 1000 0000 0000 */
{SLRC,"A" }, /* 01: 0100 1000 0000 0001 */
{SLRC,"B" }, /* 02: 0100 1000 0000 0010 */
{SLRC,"C" }, /* 03: 0100 1000 0000 0011 */
- {illegal,0 }, /* 04: 0100 1000 0000 0100 */
+ {illegal,0 }, /* 04: 0100 1000 0000 0100 */
{SLLC,"A" }, /* 05: 0100 1000 0000 0101 */
{SLLC,"B" }, /* 06: 0100 1000 0000 0110 */
{SLLC,"C" }, /* 07: 0100 1000 0000 0111 */
{SK,"NV" }, /* 08: 0100 1000 0000 1000 */
- {illegal,0 }, /* 09: 0100 1000 0000 1001 */
+ {illegal,0 }, /* 09: 0100 1000 0000 1001 */
{SK,"CY" }, /* 0a: 0100 1000 0000 1010 */
{SK,"HC" }, /* 0b: 0100 1000 0000 1011 */
{SK,"Z" }, /* 0c: 0100 1000 0000 1100 */
- {illegal,0 }, /* 0d: 0100 1000 0000 1101 */
- {illegal,0 }, /* 0e: 0100 1000 0000 1110 */
- {illegal,0 }, /* 0f: 0100 1000 0000 1111 */
-
- {illegal,0 }, /* 10: 0100 1000 0001 0000 */
- {illegal,0 }, /* 11: 0100 1000 0001 0001 */
- {illegal,0 }, /* 12: 0100 1000 0001 0010 */
- {illegal,0 }, /* 13: 0100 1000 0001 0011 */
- {illegal,0 }, /* 14: 0100 1000 0001 0100 */
- {illegal,0 }, /* 15: 0100 1000 0001 0101 */
- {illegal,0 }, /* 16: 0100 1000 0001 0110 */
- {illegal,0 }, /* 17: 0100 1000 0001 0111 */
+ {illegal,0 }, /* 0d: 0100 1000 0000 1101 */
+ {illegal,0 }, /* 0e: 0100 1000 0000 1110 */
+ {illegal,0 }, /* 0f: 0100 1000 0000 1111 */
+
+ {illegal,0 }, /* 10: 0100 1000 0001 0000 */
+ {illegal,0 }, /* 11: 0100 1000 0001 0001 */
+ {illegal,0 }, /* 12: 0100 1000 0001 0010 */
+ {illegal,0 }, /* 13: 0100 1000 0001 0011 */
+ {illegal,0 }, /* 14: 0100 1000 0001 0100 */
+ {illegal,0 }, /* 15: 0100 1000 0001 0101 */
+ {illegal,0 }, /* 16: 0100 1000 0001 0110 */
+ {illegal,0 }, /* 17: 0100 1000 0001 0111 */
{SKN,"NV" }, /* 18: 0100 1000 0001 1000 */
- {illegal,0 }, /* 19: 0100 1000 0001 1001 */
+ {illegal,0 }, /* 19: 0100 1000 0001 1001 */
{SKN,"CY" }, /* 1a: 0100 1000 0001 1010 */
{SKN,"HC" }, /* 1b: 0100 1000 0001 1011 */
{SKN,"Z" }, /* 1c: 0100 1000 0001 1100 */
- {illegal,0 }, /* 1d: 0100 1000 0001 1101 */
- {illegal,0 }, /* 1e: 0100 1000 0001 1110 */
- {illegal,0 }, /* 1f: 0100 1000 0001 1111 */
+ {illegal,0 }, /* 1d: 0100 1000 0001 1101 */
+ {illegal,0 }, /* 1e: 0100 1000 0001 1110 */
+ {illegal,0 }, /* 1f: 0100 1000 0001 1111 */
- {illegal,0 }, /* 20: 0100 1000 0010 0000 */
+ {illegal,0 }, /* 20: 0100 1000 0010 0000 */
{SLR,"A" }, /* 21: 0100 1000 0010 0001 */
{SLR,"B" }, /* 22: 0100 1000 0010 0010 */
{SLR,"C" }, /* 23: 0100 1000 0010 0011 */
- {illegal,0 }, /* 24: 0100 1000 0010 0100 */
+ {illegal,0 }, /* 24: 0100 1000 0010 0100 */
{SLL,"A" }, /* 25: 0100 1000 0010 0101 */
{SLL,"B" }, /* 26: 0100 1000 0010 0110 */
{SLL,"C" }, /* 27: 0100 1000 0010 0111 */
- {JEA,0 }, /* 28: 0100 1000 0010 1000 */
- {CALB,0 }, /* 29: 0100 1000 0010 1001 */
- {CLC,0 }, /* 2a: 0100 1000 0010 1010 */
- {STC,0 }, /* 2b: 0100 1000 0010 1011 */
- {illegal,0 }, /* 2c: 0100 1000 0010 1100 */
+ {JEA,0 }, /* 28: 0100 1000 0010 1000 */
+ {CALB,0 }, /* 29: 0100 1000 0010 1001 */
+ {CLC,0 }, /* 2a: 0100 1000 0010 1010 */
+ {STC,0 }, /* 2b: 0100 1000 0010 1011 */
+ {illegal,0 }, /* 2c: 0100 1000 0010 1100 */
{MUL,"A" }, /* 2d: 0100 1000 0010 1101 */
{MUL,"B" }, /* 2e: 0100 1000 0010 1110 */
{MUL,"C" }, /* 2f: 0100 1000 0010 1111 */
- {illegal,0 }, /* 30: 0100 1000 0011 0000 */
+ {illegal,0 }, /* 30: 0100 1000 0011 0000 */
{RLR,"A" }, /* 31: 0100 1000 0011 0001 */
{RLR,"B" }, /* 32: 0100 1000 0011 0010 */
{RLR,"C" }, /* 33: 0100 1000 0011 0011 */
- {illegal,0 }, /* 34: 0100 1000 0011 0100 */
+ {illegal,0 }, /* 34: 0100 1000 0011 0100 */
{RLL,"A" }, /* 35: 0100 1000 0011 0101 */
{RLL,"B" }, /* 36: 0100 1000 0011 0110 */
{RLL,"C" }, /* 37: 0100 1000 0011 0111 */
- {RLD,0 }, /* 38: 0100 1000 0011 1000 */
- {RRD,0 }, /* 39: 0100 1000 0011 1001 */
- {NEGA,0 }, /* 3a: 0100 1000 0011 1010 */
- {HALT,0 }, /* 3b: 0100 1000 0011 1011 */
- {illegal,0 }, /* 3c: 0100 1000 0011 1100 */
+ {RLD,0 }, /* 38: 0100 1000 0011 1000 */
+ {RRD,0 }, /* 39: 0100 1000 0011 1001 */
+ {NEGA,0 }, /* 3a: 0100 1000 0011 1010 */
+ {HALT,0 }, /* 3b: 0100 1000 0011 1011 */
+ {illegal,0 }, /* 3c: 0100 1000 0011 1100 */
{DIV,"A" }, /* 3d: 0100 1000 0011 1101 */
{DIV,"B" }, /* 3e: 0100 1000 0011 1110 */
{DIV,"C" }, /* 3f: 0100 1000 0011 1111 */
@@ -735,26 +735,26 @@ static const struct dasm_s dasm48_7807[256] =
{SKIT,"FST" }, /* 4a: 0100 1000 0100 1010 */
{SKIT,"ER" }, /* 4b: 0100 1000 0100 1011 */
{SKIT,"OV" }, /* 4c: 0100 1000 0100 1100 */
- {illegal,0 }, /* 4d: 0100 1000 0100 1101 */
- {illegal,0 }, /* 4e: 0100 1000 0100 1110 */
- {illegal,0 }, /* 4f: 0100 1000 0100 1111 */
+ {illegal,0 }, /* 4d: 0100 1000 0100 1101 */
+ {illegal,0 }, /* 4e: 0100 1000 0100 1110 */
+ {illegal,0 }, /* 4f: 0100 1000 0100 1111 */
{SKIT,"AN4" }, /* 50: 0100 1000 0101 0000 */
{SKIT,"AN5" }, /* 51: 0100 1000 0101 0001 */
{SKIT,"AN6" }, /* 52: 0100 1000 0101 0010 */
{SKIT,"AN7" }, /* 53: 0100 1000 0101 0011 */
{SKIT,"SB" }, /* 54: 0100 1000 0101 0100 */
- {illegal,0 }, /* 55: 0100 1000 0101 0101 */
- {illegal,0 }, /* 56: 0100 1000 0101 0110 */
- {illegal,0 }, /* 57: 0100 1000 0101 0111 */
- {illegal,0 }, /* 58: 0100 1000 0101 1000 */
- {illegal,0 }, /* 59: 0100 1000 0101 1001 */
- {illegal,0 }, /* 5a: 0100 1000 0101 1010 */
- {illegal,0 }, /* 5b: 0100 1000 0101 1011 */
- {illegal,0 }, /* 5c: 0100 1000 0101 1100 */
- {illegal,0 }, /* 5d: 0100 1000 0101 1101 */
- {illegal,0 }, /* 5e: 0100 1000 0101 1110 */
- {illegal,0 }, /* 5f: 0100 1000 0101 1111 */
+ {illegal,0 }, /* 55: 0100 1000 0101 0101 */
+ {illegal,0 }, /* 56: 0100 1000 0101 0110 */
+ {illegal,0 }, /* 57: 0100 1000 0101 0111 */
+ {illegal,0 }, /* 58: 0100 1000 0101 1000 */
+ {illegal,0 }, /* 59: 0100 1000 0101 1001 */
+ {illegal,0 }, /* 5a: 0100 1000 0101 1010 */
+ {illegal,0 }, /* 5b: 0100 1000 0101 1011 */
+ {illegal,0 }, /* 5c: 0100 1000 0101 1100 */
+ {illegal,0 }, /* 5d: 0100 1000 0101 1101 */
+ {illegal,0 }, /* 5e: 0100 1000 0101 1110 */
+ {illegal,0 }, /* 5f: 0100 1000 0101 1111 */
{SKNIT,"NMI" }, /* 60: 0100 1000 0110 0000 */
{SKNIT,"FT0" }, /* 61: 0100 1000 0110 0001 */
@@ -769,55 +769,55 @@ static const struct dasm_s dasm48_7807[256] =
{SKNIT,"FST" }, /* 6a: 0100 1000 0110 1010 */
{SKNIT,"ER" }, /* 6b: 0100 1000 0110 1011 */
{SKNIT,"OV" }, /* 6c: 0100 1000 0110 1100 */
- {illegal,0 }, /* 6d: 0100 1000 0110 1101 */
- {illegal,0 }, /* 6e: 0100 1000 0110 1110 */
- {illegal,0 }, /* 6f: 0100 1000 0110 1111 */
+ {illegal,0 }, /* 6d: 0100 1000 0110 1101 */
+ {illegal,0 }, /* 6e: 0100 1000 0110 1110 */
+ {illegal,0 }, /* 6f: 0100 1000 0110 1111 */
{SKNIT,"AN4" }, /* 70: 0100 1000 0111 0000 */
{SKNIT,"AN5" }, /* 71: 0100 1000 0111 0001 */
{SKNIT,"AN6" }, /* 72: 0100 1000 0111 0010 */
{SKNIT,"AN7" }, /* 73: 0100 1000 0111 0011 */
{SKNIT,"SB" }, /* 74: 0100 1000 0111 0100 */
- {illegal,0 }, /* 75: 0100 1000 0111 0101 */
- {illegal,0 }, /* 76: 0100 1000 0111 0110 */
- {illegal,0 }, /* 77: 0100 1000 0111 0111 */
- {illegal,0 }, /* 78: 0100 1000 0111 1000 */
- {illegal,0 }, /* 79: 0100 1000 0111 1001 */
- {illegal,0 }, /* 7a: 0100 1000 0111 1010 */
- {illegal,0 }, /* 7b: 0100 1000 0111 1011 */
- {illegal,0 }, /* 7c: 0100 1000 0111 1100 */
- {illegal,0 }, /* 7d: 0100 1000 0111 1101 */
- {illegal,0 }, /* 7e: 0100 1000 0111 1110 */
- {illegal,0 }, /* 7f: 0100 1000 0111 1111 */
-
- {illegal,0 }, /* 80: 0100 1000 1000 0000 */
- {illegal,0 }, /* 81: 0100 1000 1000 0001 */
+ {illegal,0 }, /* 75: 0100 1000 0111 0101 */
+ {illegal,0 }, /* 76: 0100 1000 0111 0110 */
+ {illegal,0 }, /* 77: 0100 1000 0111 0111 */
+ {illegal,0 }, /* 78: 0100 1000 0111 1000 */
+ {illegal,0 }, /* 79: 0100 1000 0111 1001 */
+ {illegal,0 }, /* 7a: 0100 1000 0111 1010 */
+ {illegal,0 }, /* 7b: 0100 1000 0111 1011 */
+ {illegal,0 }, /* 7c: 0100 1000 0111 1100 */
+ {illegal,0 }, /* 7d: 0100 1000 0111 1101 */
+ {illegal,0 }, /* 7e: 0100 1000 0111 1110 */
+ {illegal,0 }, /* 7f: 0100 1000 0111 1111 */
+
+ {illegal,0 }, /* 80: 0100 1000 1000 0000 */
+ {illegal,0 }, /* 81: 0100 1000 1000 0001 */
{LDEAX,"(DE)" }, /* 82: 0100 1000 1000 0010 */
{LDEAX,"(HL)" }, /* 83: 0100 1000 1000 0011 */
{LDEAX,"(DE++)" }, /* 84: 0100 1000 1000 0100 */
{LDEAX,"(HL++)" }, /* 85: 0100 1000 1000 0101 */
- {illegal,0 }, /* 86: 0100 1000 1000 0110 */
- {illegal,0 }, /* 87: 0100 1000 1000 0111 */
- {illegal,0 }, /* 88: 0100 1000 1000 1000 */
- {illegal,0 }, /* 89: 0100 1000 1000 1001 */
- {illegal,0 }, /* 8a: 0100 1000 1000 1010 */
+ {illegal,0 }, /* 86: 0100 1000 1000 0110 */
+ {illegal,0 }, /* 87: 0100 1000 1000 0111 */
+ {illegal,0 }, /* 88: 0100 1000 1000 1000 */
+ {illegal,0 }, /* 89: 0100 1000 1000 1001 */
+ {illegal,0 }, /* 8a: 0100 1000 1000 1010 */
{LDEAX,"(DE+%b)"}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */
{LDEAX,"(HL+A)" }, /* 8c: 0100 1000 1000 1100 */
{LDEAX,"(HL+B)" }, /* 8d: 0100 1000 1000 1101 */
{LDEAX,"(HL+EA)"}, /* 8e: 0100 1000 1000 1110 */
{LDEAX,"(HL+%b)"}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */
- {illegal,0 }, /* 90: 0100 1000 1000 0000 */
- {illegal,0 }, /* 91: 0100 1000 1000 0001 */
+ {illegal,0 }, /* 90: 0100 1000 1000 0000 */
+ {illegal,0 }, /* 91: 0100 1000 1000 0001 */
{STEAX,"(DE)" }, /* 92: 0100 1000 1000 0010 */
{STEAX,"(HL)" }, /* 93: 0100 1000 1000 0011 */
{STEAX,"(DE++)" }, /* 94: 0100 1000 1000 0100 */
{STEAX,"(HL++)" }, /* 95: 0100 1000 1000 0101 */
- {illegal,0 }, /* 96: 0100 1000 1000 0110 */
- {illegal,0 }, /* 97: 0100 1000 1000 0111 */
- {illegal,0 }, /* 98: 0100 1000 1000 1000 */
- {illegal,0 }, /* 99: 0100 1000 1000 1001 */
- {illegal,0 }, /* 9a: 0100 1000 1000 1010 */
+ {illegal,0 }, /* 96: 0100 1000 1000 0110 */
+ {illegal,0 }, /* 97: 0100 1000 1000 0111 */
+ {illegal,0 }, /* 98: 0100 1000 1000 1000 */
+ {illegal,0 }, /* 99: 0100 1000 1000 1001 */
+ {illegal,0 }, /* 9a: 0100 1000 1000 1010 */
{STEAX,"(DE+%b)"}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */
{STEAX,"(HL+A)" }, /* 9c: 0100 1000 1000 1100 */
{STEAX,"(HL+B)" }, /* 9d: 0100 1000 1000 1101 */
@@ -825,1146 +825,1146 @@ static const struct dasm_s dasm48_7807[256] =
{STEAX,"(HL+%b)"}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */
{DSLR,"EA" }, /* a0: 0100 1000 1010 0000 */
- {illegal,0 }, /* a1: 0100 1000 1010 0001 */
- {illegal,0 }, /* a2: 0100 1000 1010 0010 */
- {illegal,0 }, /* a3: 0100 1000 1010 0011 */
+ {illegal,0 }, /* a1: 0100 1000 1010 0001 */
+ {illegal,0 }, /* a2: 0100 1000 1010 0010 */
+ {illegal,0 }, /* a3: 0100 1000 1010 0011 */
{DSLL,"EA" }, /* a4: 0100 1000 1010 0100 */
- {illegal,0 }, /* a5: 0100 1000 1010 0101 */
- {illegal,0 }, /* a6: 0100 1000 1010 0110 */
- {illegal,0 }, /* a7: 0100 1000 1010 0111 */
- {TABLE,0 }, /* a8: 0100 1000 1010 1000 */
- {illegal,0 }, /* a9: 0100 1000 1010 1001 */
- {CMC,0 }, /* aa: 0100 1000 1010 1010 */ /* 7807 */
- {illegal,0 }, /* ab: 0100 1000 1010 1011 */
- {EXA,0 }, /* ac: 0100 1000 1010 1100 */ /* 7807 */
- {EXR,0 }, /* ad: 0100 1000 1010 1101 */ /* 7807 */
- {EXH,0 }, /* ae: 0100 1000 1010 1110 */ /* 7807 */
- {EXX,0 }, /* af: 0100 1000 1010 1111 */ /* 7807 */
+ {illegal,0 }, /* a5: 0100 1000 1010 0101 */
+ {illegal,0 }, /* a6: 0100 1000 1010 0110 */
+ {illegal,0 }, /* a7: 0100 1000 1010 0111 */
+ {TABLE,0 }, /* a8: 0100 1000 1010 1000 */
+ {illegal,0 }, /* a9: 0100 1000 1010 1001 */
+ {CMC,0 }, /* aa: 0100 1000 1010 1010 */ /* 7807 */
+ {illegal,0 }, /* ab: 0100 1000 1010 1011 */
+ {EXA,0 }, /* ac: 0100 1000 1010 1100 */ /* 7807 */
+ {EXR,0 }, /* ad: 0100 1000 1010 1101 */ /* 7807 */
+ {EXH,0 }, /* ae: 0100 1000 1010 1110 */ /* 7807 */
+ {EXX,0 }, /* af: 0100 1000 1010 1111 */ /* 7807 */
{DRLR,"EA" }, /* b0: 0100 1000 1011 0000 */
- {illegal,0 }, /* b1: 0100 1000 1011 0001 */
- {illegal,0 }, /* b2: 0100 1000 1011 0010 */
- {illegal,0 }, /* b3: 0100 1000 1011 0011 */
+ {illegal,0 }, /* b1: 0100 1000 1011 0001 */
+ {illegal,0 }, /* b2: 0100 1000 1011 0010 */
+ {illegal,0 }, /* b3: 0100 1000 1011 0011 */
{DRLL,"EA" }, /* b4: 0100 1000 1011 0100 */
- {illegal,0 }, /* b5: 0100 1000 1011 0101 */
- {illegal,0 }, /* b6: 0100 1000 1011 0110 */
- {illegal,0 }, /* b7: 0100 1000 1011 0111 */
- {illegal,0 }, /* b8: 0100 1000 1011 1000 */
- {illegal,0 }, /* b9: 0100 1000 1011 1001 */
- {illegal,0 }, /* ba: 0100 1000 1011 1010 */
- {illegal,0 }, /* bb: 0100 1000 1011 1011 */
- {illegal,0 }, /* bc: 0100 1000 1011 1100 */
- {illegal,0 }, /* bd: 0100 1000 1011 1101 */
- {illegal,0 }, /* be: 0100 1000 1011 1110 */
- {illegal,0 }, /* bf: 0100 1000 1011 1111 */
+ {illegal,0 }, /* b5: 0100 1000 1011 0101 */
+ {illegal,0 }, /* b6: 0100 1000 1011 0110 */
+ {illegal,0 }, /* b7: 0100 1000 1011 0111 */
+ {illegal,0 }, /* b8: 0100 1000 1011 1000 */
+ {illegal,0 }, /* b9: 0100 1000 1011 1001 */
+ {illegal,0 }, /* ba: 0100 1000 1011 1010 */
+ {illegal,0 }, /* bb: 0100 1000 1011 1011 */
+ {illegal,0 }, /* bc: 0100 1000 1011 1100 */
+ {illegal,0 }, /* bd: 0100 1000 1011 1101 */
+ {illegal,0 }, /* be: 0100 1000 1011 1110 */
+ {illegal,0 }, /* bf: 0100 1000 1011 1111 */
{DMOV,"EA,ECNT" }, /* c0: 0100 1000 1100 0000 */
- {DMOV,"EA,ECPT0"}, /* c1: 0100 1000 1100 0001 */ /* 7807 */
- {DMOV,"EA,ECPT1"}, /* c2: 0100 1000 1100 0010 */ /* 7807 */
- {illegal,0 }, /* c3: 0100 1000 1100 0011 */
- {illegal,0 }, /* c4: 0100 1000 1100 0100 */
- {illegal,0 }, /* c5: 0100 1000 1100 0101 */
- {illegal,0 }, /* c6: 0100 1000 1100 0110 */
- {illegal,0 }, /* c7: 0100 1000 1100 0111 */
- {illegal,0 }, /* c8: 0100 1000 1100 1000 */
- {illegal,0 }, /* c9: 0100 1000 1100 1001 */
- {illegal,0 }, /* ca: 0100 1000 1100 1010 */
- {illegal,0 }, /* cb: 0100 1000 1100 1011 */
- {illegal,0 }, /* cc: 0100 1000 1100 1100 */
- {illegal,0 }, /* cd: 0100 1000 1100 1101 */
- {illegal,0 }, /* ce: 0100 1000 1100 1110 */
- {illegal,0 }, /* cf: 0100 1000 1100 1111 */
-
- {illegal,0 }, /* d0: 0100 1000 1101 0000 */
- {illegal,0 }, /* d1: 0100 1000 1101 0001 */
+ {DMOV,"EA,ECPT0"}, /* c1: 0100 1000 1100 0001 */ /* 7807 */
+ {DMOV,"EA,ECPT1"}, /* c2: 0100 1000 1100 0010 */ /* 7807 */
+ {illegal,0 }, /* c3: 0100 1000 1100 0011 */
+ {illegal,0 }, /* c4: 0100 1000 1100 0100 */
+ {illegal,0 }, /* c5: 0100 1000 1100 0101 */
+ {illegal,0 }, /* c6: 0100 1000 1100 0110 */
+ {illegal,0 }, /* c7: 0100 1000 1100 0111 */
+ {illegal,0 }, /* c8: 0100 1000 1100 1000 */
+ {illegal,0 }, /* c9: 0100 1000 1100 1001 */
+ {illegal,0 }, /* ca: 0100 1000 1100 1010 */
+ {illegal,0 }, /* cb: 0100 1000 1100 1011 */
+ {illegal,0 }, /* cc: 0100 1000 1100 1100 */
+ {illegal,0 }, /* cd: 0100 1000 1100 1101 */
+ {illegal,0 }, /* ce: 0100 1000 1100 1110 */
+ {illegal,0 }, /* cf: 0100 1000 1100 1111 */
+
+ {illegal,0 }, /* d0: 0100 1000 1101 0000 */
+ {illegal,0 }, /* d1: 0100 1000 1101 0001 */
{DMOV,"ETM0,EA" }, /* d2: 0100 1000 1101 0010 */
{DMOV,"ETM1,EA" }, /* d3: 0100 1000 1101 0011 */
- {illegal,0 }, /* d4: 0100 1000 1101 0100 */
- {illegal,0 }, /* d5: 0100 1000 1101 0101 */
- {illegal,0 }, /* d6: 0100 1000 1101 0110 */
- {illegal,0 }, /* d7: 0100 1000 1101 0111 */
- {illegal,0 }, /* d8: 0100 1000 1101 1000 */
- {illegal,0 }, /* d9: 0100 1000 1101 1001 */
- {illegal,0 }, /* da: 0100 1000 1101 1010 */
- {illegal,0 }, /* db: 0100 1000 1101 1011 */
- {illegal,0 }, /* dc: 0100 1000 1101 1100 */
- {illegal,0 }, /* dd: 0100 1000 1101 1101 */
- {illegal,0 }, /* de: 0100 1000 1101 1110 */
- {illegal,0 }, /* df: 0100 1000 1101 1111 */
-
- {illegal,0 }, /* e0: 0100 1000 1110 0000 */
- {illegal,0 }, /* e1: 0100 1000 1110 0001 */
- {illegal,0 }, /* e2: 0100 1000 1110 0010 */
- {illegal,0 }, /* e3: 0100 1000 1110 0011 */
- {illegal,0 }, /* e4: 0100 1000 1110 0100 */
- {illegal,0 }, /* e5: 0100 1000 1110 0101 */
- {illegal,0 }, /* e6: 0100 1000 1110 0110 */
- {illegal,0 }, /* e7: 0100 1000 1110 0111 */
- {illegal,0 }, /* e8: 0100 1000 1110 1000 */
- {illegal,0 }, /* e9: 0100 1000 1110 1001 */
- {illegal,0 }, /* ea: 0100 1000 1110 1010 */
- {illegal,0 }, /* eb: 0100 1000 1110 1011 */
- {illegal,0 }, /* ec: 0100 1000 1110 1100 */
- {illegal,0 }, /* ed: 0100 1000 1110 1101 */
- {illegal,0 }, /* ee: 0100 1000 1110 1110 */
- {illegal,0 }, /* ef: 0100 1000 1110 1111 */
-
- {illegal,0 }, /* f0: 0100 1000 1111 0000 */
- {illegal,0 }, /* f1: 0100 1000 1111 0001 */
- {illegal,0 }, /* f2: 0100 1000 1111 0010 */
- {illegal,0 }, /* f3: 0100 1000 1111 0011 */
- {illegal,0 }, /* f4: 0100 1000 1111 0100 */
- {illegal,0 }, /* f5: 0100 1000 1111 0101 */
- {illegal,0 }, /* f6: 0100 1000 1111 0110 */
- {illegal,0 }, /* f7: 0100 1000 1111 0111 */
- {illegal,0 }, /* f8: 0100 1000 1111 1000 */
- {illegal,0 }, /* f9: 0100 1000 1111 1001 */
- {illegal,0 }, /* fa: 0100 1000 1111 1010 */
- {illegal,0 }, /* fb: 0100 1000 1111 1011 */
- {illegal,0 }, /* fc: 0100 1000 1111 1100 */
- {illegal,0 }, /* fd: 0100 1000 1111 1101 */
- {illegal,0 }, /* fe: 0100 1000 1111 1110 */
- {illegal,0 } /* ff: 0100 1000 1111 1111 */
+ {illegal,0 }, /* d4: 0100 1000 1101 0100 */
+ {illegal,0 }, /* d5: 0100 1000 1101 0101 */
+ {illegal,0 }, /* d6: 0100 1000 1101 0110 */
+ {illegal,0 }, /* d7: 0100 1000 1101 0111 */
+ {illegal,0 }, /* d8: 0100 1000 1101 1000 */
+ {illegal,0 }, /* d9: 0100 1000 1101 1001 */
+ {illegal,0 }, /* da: 0100 1000 1101 1010 */
+ {illegal,0 }, /* db: 0100 1000 1101 1011 */
+ {illegal,0 }, /* dc: 0100 1000 1101 1100 */
+ {illegal,0 }, /* dd: 0100 1000 1101 1101 */
+ {illegal,0 }, /* de: 0100 1000 1101 1110 */
+ {illegal,0 }, /* df: 0100 1000 1101 1111 */
+
+ {illegal,0 }, /* e0: 0100 1000 1110 0000 */
+ {illegal,0 }, /* e1: 0100 1000 1110 0001 */
+ {illegal,0 }, /* e2: 0100 1000 1110 0010 */
+ {illegal,0 }, /* e3: 0100 1000 1110 0011 */
+ {illegal,0 }, /* e4: 0100 1000 1110 0100 */
+ {illegal,0 }, /* e5: 0100 1000 1110 0101 */
+ {illegal,0 }, /* e6: 0100 1000 1110 0110 */
+ {illegal,0 }, /* e7: 0100 1000 1110 0111 */
+ {illegal,0 }, /* e8: 0100 1000 1110 1000 */
+ {illegal,0 }, /* e9: 0100 1000 1110 1001 */
+ {illegal,0 }, /* ea: 0100 1000 1110 1010 */
+ {illegal,0 }, /* eb: 0100 1000 1110 1011 */
+ {illegal,0 }, /* ec: 0100 1000 1110 1100 */
+ {illegal,0 }, /* ed: 0100 1000 1110 1101 */
+ {illegal,0 }, /* ee: 0100 1000 1110 1110 */
+ {illegal,0 }, /* ef: 0100 1000 1110 1111 */
+
+ {illegal,0 }, /* f0: 0100 1000 1111 0000 */
+ {illegal,0 }, /* f1: 0100 1000 1111 0001 */
+ {illegal,0 }, /* f2: 0100 1000 1111 0010 */
+ {illegal,0 }, /* f3: 0100 1000 1111 0011 */
+ {illegal,0 }, /* f4: 0100 1000 1111 0100 */
+ {illegal,0 }, /* f5: 0100 1000 1111 0101 */
+ {illegal,0 }, /* f6: 0100 1000 1111 0110 */
+ {illegal,0 }, /* f7: 0100 1000 1111 0111 */
+ {illegal,0 }, /* f8: 0100 1000 1111 1000 */
+ {illegal,0 }, /* f9: 0100 1000 1111 1001 */
+ {illegal,0 }, /* fa: 0100 1000 1111 1010 */
+ {illegal,0 }, /* fb: 0100 1000 1111 1011 */
+ {illegal,0 }, /* fc: 0100 1000 1111 1100 */
+ {illegal,0 }, /* fd: 0100 1000 1111 1101 */
+ {illegal,0 }, /* fe: 0100 1000 1111 1110 */
+ {illegal,0 } /* ff: 0100 1000 1111 1111 */
};
/* prefix 4C */
static const struct dasm_s dasm4C_7810[256] =
{
- {illegal,0 }, /* 00: 0100 1100 0000 0000 */
- {illegal,0 }, /* 01: 0100 1100 0000 0001 */
- {illegal,0 }, /* 02: 0100 1100 0000 0010 */
- {illegal,0 }, /* 03: 0100 1100 0000 0011 */
- {illegal,0 }, /* 04: 0100 1100 0000 0100 */
- {illegal,0 }, /* 05: 0100 1100 0000 0101 */
- {illegal,0 }, /* 06: 0100 1100 0000 0110 */
- {illegal,0 }, /* 07: 0100 1100 0000 0111 */
- {illegal,0 }, /* 08: 0100 1100 0000 1000 */
- {illegal,0 }, /* 09: 0100 1100 0000 1001 */
- {illegal,0 }, /* 0a: 0100 1100 0000 1010 */
- {illegal,0 }, /* 0b: 0100 1100 0000 1011 */
- {illegal,0 }, /* 0c: 0100 1100 0000 1100 */
- {illegal,0 }, /* 0d: 0100 1100 0000 1101 */
- {illegal,0 }, /* 0e: 0100 1100 0000 1110 */
- {illegal,0 }, /* 0f: 0100 1100 0000 1111 */
-
- {illegal,0 }, /* 10: 0100 1100 0001 0000 */
- {illegal,0 }, /* 11: 0100 1100 0001 0001 */
- {illegal,0 }, /* 12: 0100 1100 0001 0010 */
- {illegal,0 }, /* 13: 0100 1100 0001 0011 */
- {illegal,0 }, /* 14: 0100 1100 0001 0100 */
- {illegal,0 }, /* 15: 0100 1100 0001 0101 */
- {illegal,0 }, /* 16: 0100 1100 0001 0110 */
- {illegal,0 }, /* 17: 0100 1100 0001 0111 */
- {illegal,0 }, /* 18: 0100 1100 0001 1000 */
- {illegal,0 }, /* 19: 0100 1100 0001 1001 */
- {illegal,0 }, /* 1a: 0100 1100 0001 1010 */
- {illegal,0 }, /* 1b: 0100 1100 0001 1011 */
- {illegal,0 }, /* 1c: 0100 1100 0001 1100 */
- {illegal,0 }, /* 1d: 0100 1100 0001 1101 */
- {illegal,0 }, /* 1e: 0100 1100 0001 1110 */
- {illegal,0 }, /* 1f: 0100 1100 0001 1111 */
-
- {illegal,0 }, /* 20: 0100 1100 0010 0000 */
- {illegal,0 }, /* 21: 0100 1100 0010 0001 */
- {illegal,0 }, /* 22: 0100 1100 0010 0010 */
- {illegal,0 }, /* 23: 0100 1100 0010 0011 */
- {illegal,0 }, /* 24: 0100 1100 0010 0100 */
- {illegal,0 }, /* 25: 0100 1100 0010 0101 */
- {illegal,0 }, /* 26: 0100 1100 0010 0110 */
- {illegal,0 }, /* 27: 0100 1100 0010 0111 */
- {illegal,0 }, /* 28: 0100 1100 0010 1000 */
- {illegal,0 }, /* 29: 0100 1100 0010 1001 */
- {illegal,0 }, /* 2a: 0100 1100 0010 1010 */
- {illegal,0 }, /* 2b: 0100 1100 0010 1011 */
- {illegal,0 }, /* 2c: 0100 1100 0010 1100 */
- {illegal,0 }, /* 2d: 0100 1100 0010 1101 */
- {illegal,0 }, /* 2e: 0100 1100 0010 1110 */
- {illegal,0 }, /* 2f: 0100 1100 0010 1111 */
-
- {illegal,0 }, /* 30: 0100 1100 0011 0000 */
- {illegal,0 }, /* 31: 0100 1100 0011 0001 */
- {illegal,0 }, /* 32: 0100 1100 0011 0010 */
- {illegal,0 }, /* 33: 0100 1100 0011 0011 */
- {illegal,0 }, /* 34: 0100 1100 0011 0100 */
- {illegal,0 }, /* 35: 0100 1100 0011 0101 */
- {illegal,0 }, /* 36: 0100 1100 0011 0110 */
- {illegal,0 }, /* 37: 0100 1100 0011 0111 */
- {illegal,0 }, /* 38: 0100 1100 0011 1000 */
- {illegal,0 }, /* 39: 0100 1100 0011 1001 */
- {illegal,0 }, /* 3a: 0100 1100 0011 1010 */
- {illegal,0 }, /* 3b: 0100 1100 0011 1011 */
- {illegal,0 }, /* 3c: 0100 1100 0011 1100 */
- {illegal,0 }, /* 3d: 0100 1100 0011 1101 */
- {illegal,0 }, /* 3e: 0100 1100 0011 1110 */
- {illegal,0 }, /* 3f: 0100 1100 0011 1111 */
-
- {illegal,0 }, /* 40: 0100 1100 0100 0000 */
- {illegal,0 }, /* 41: 0100 1100 0100 0001 */
- {illegal,0 }, /* 42: 0100 1100 0100 0010 */
- {illegal,0 }, /* 43: 0100 1100 0100 0011 */
- {illegal,0 }, /* 44: 0100 1100 0100 0100 */
- {illegal,0 }, /* 45: 0100 1100 0100 0101 */
- {illegal,0 }, /* 46: 0100 1100 0100 0110 */
- {illegal,0 }, /* 47: 0100 1100 0100 0111 */
- {illegal,0 }, /* 48: 0100 1100 0100 1000 */
- {illegal,0 }, /* 49: 0100 1100 0100 1001 */
- {illegal,0 }, /* 4a: 0100 1100 0100 1010 */
- {illegal,0 }, /* 4b: 0100 1100 0100 1011 */
- {illegal,0 }, /* 4c: 0100 1100 0100 1100 */
- {illegal,0 }, /* 4d: 0100 1100 0100 1101 */
- {illegal,0 }, /* 4e: 0100 1100 0100 1110 */
- {illegal,0 }, /* 4f: 0100 1100 0100 1111 */
-
- {illegal,0 }, /* 50: 0100 1100 0101 0000 */
- {illegal,0 }, /* 51: 0100 1100 0101 0001 */
- {illegal,0 }, /* 52: 0100 1100 0101 0010 */
- {illegal,0 }, /* 53: 0100 1100 0101 0011 */
- {illegal,0 }, /* 54: 0100 1100 0101 0100 */
- {illegal,0 }, /* 55: 0100 1100 0101 0101 */
- {illegal,0 }, /* 56: 0100 1100 0101 0110 */
- {illegal,0 }, /* 57: 0100 1100 0101 0111 */
- {illegal,0 }, /* 58: 0100 1100 0101 1000 */
- {illegal,0 }, /* 59: 0100 1100 0101 1001 */
- {illegal,0 }, /* 5a: 0100 1100 0101 1010 */
- {illegal,0 }, /* 5b: 0100 1100 0101 1011 */
- {illegal,0 }, /* 5c: 0100 1100 0101 1100 */
- {illegal,0 }, /* 5d: 0100 1100 0101 1101 */
- {illegal,0 }, /* 5e: 0100 1100 0101 1110 */
- {illegal,0 }, /* 5f: 0100 1100 0101 1111 */
-
- {illegal,0 }, /* 60: 0100 1100 0110 0000 */
- {illegal,0 }, /* 61: 0100 1100 0110 0001 */
- {illegal,0 }, /* 62: 0100 1100 0110 0010 */
- {illegal,0 }, /* 63: 0100 1100 0110 0011 */
- {illegal,0 }, /* 64: 0100 1100 0110 0100 */
- {illegal,0 }, /* 65: 0100 1100 0110 0101 */
- {illegal,0 }, /* 66: 0100 1100 0110 0110 */
- {illegal,0 }, /* 67: 0100 1100 0110 0111 */
- {illegal,0 }, /* 68: 0100 1100 0110 1000 */
- {illegal,0 }, /* 69: 0100 1100 0110 1001 */
- {illegal,0 }, /* 6a: 0100 1100 0110 1010 */
- {illegal,0 }, /* 6b: 0100 1100 0110 1011 */
- {illegal,0 }, /* 6c: 0100 1100 0110 1100 */
- {illegal,0 }, /* 6d: 0100 1100 0110 1101 */
- {illegal,0 }, /* 6e: 0100 1100 0110 1110 */
- {illegal,0 }, /* 6f: 0100 1100 0110 1111 */
-
- {illegal,0 }, /* 70: 0100 1100 0111 0000 */
- {illegal,0 }, /* 71: 0100 1100 0111 0001 */
- {illegal,0 }, /* 72: 0100 1100 0111 0010 */
- {illegal,0 }, /* 73: 0100 1100 0111 0011 */
- {illegal,0 }, /* 74: 0100 1100 0111 0100 */
- {illegal,0 }, /* 75: 0100 1100 0111 0101 */
- {illegal,0 }, /* 76: 0100 1100 0111 0110 */
- {illegal,0 }, /* 77: 0100 1100 0111 0111 */
- {illegal,0 }, /* 78: 0100 1100 0111 1000 */
- {illegal,0 }, /* 79: 0100 1100 0111 1001 */
- {illegal,0 }, /* 7a: 0100 1100 0111 1010 */
- {illegal,0 }, /* 7b: 0100 1100 0111 1011 */
- {illegal,0 }, /* 7c: 0100 1100 0111 1100 */
- {illegal,0 }, /* 7d: 0100 1100 0111 1101 */
- {illegal,0 }, /* 7e: 0100 1100 0111 1110 */
- {illegal,0 }, /* 7f: 0100 1100 0111 1111 */
-
- {illegal,0 }, /* 80: 0100 1100 1000 0000 */
- {illegal,0 }, /* 81: 0100 1100 1000 0001 */
- {illegal,0 }, /* 82: 0100 1100 1000 0010 */
- {illegal,0 }, /* 83: 0100 1100 1000 0011 */
- {illegal,0 }, /* 84: 0100 1100 1000 0100 */
- {illegal,0 }, /* 85: 0100 1100 1000 0101 */
- {illegal,0 }, /* 86: 0100 1100 1000 0110 */
- {illegal,0 }, /* 87: 0100 1100 1000 0111 */
- {illegal,0 }, /* 88: 0100 1100 1000 1000 */
- {illegal,0 }, /* 89: 0100 1100 1000 1001 */
- {illegal,0 }, /* 8a: 0100 1100 1000 1010 */
- {illegal,0 }, /* 8b: 0100 1100 1000 1011 */
- {illegal,0 }, /* 8c: 0100 1100 1000 1100 */
- {illegal,0 }, /* 8d: 0100 1100 1000 1101 */
- {illegal,0 }, /* 8e: 0100 1100 1000 1110 */
- {illegal,0 }, /* 8f: 0100 1100 1000 1111 */
-
- {illegal,0 }, /* 90: 0100 1100 1001 0000 */
- {illegal,0 }, /* 91: 0100 1100 1001 0001 */
- {illegal,0 }, /* 92: 0100 1100 1001 0010 */
- {illegal,0 }, /* 93: 0100 1100 1001 0011 */
- {illegal,0 }, /* 94: 0100 1100 1001 0100 */
- {illegal,0 }, /* 95: 0100 1100 1001 0101 */
- {illegal,0 }, /* 96: 0100 1100 1001 0110 */
- {illegal,0 }, /* 97: 0100 1100 1001 0111 */
- {illegal,0 }, /* 98: 0100 1100 1001 1000 */
- {illegal,0 }, /* 99: 0100 1100 1001 1001 */
- {illegal,0 }, /* 9a: 0100 1100 1001 1010 */
- {illegal,0 }, /* 9b: 0100 1100 1001 1011 */
- {illegal,0 }, /* 9c: 0100 1100 1001 1100 */
- {illegal,0 }, /* 9d: 0100 1100 1001 1101 */
- {illegal,0 }, /* 9e: 0100 1100 1001 1110 */
- {illegal,0 }, /* 9f: 0100 1100 1001 1111 */
-
- {illegal,0 }, /* a0: 0100 1100 1010 0000 */
- {illegal,0 }, /* a1: 0100 1100 1010 0001 */
- {illegal,0 }, /* a2: 0100 1100 1010 0010 */
- {illegal,0 }, /* a3: 0100 1100 1010 0011 */
- {illegal,0 }, /* a4: 0100 1100 1010 0100 */
- {illegal,0 }, /* a5: 0100 1100 1010 0101 */
- {illegal,0 }, /* a6: 0100 1100 1010 0110 */
- {illegal,0 }, /* a7: 0100 1100 1010 0111 */
- {illegal,0 }, /* a8: 0100 1100 1010 1000 */
- {illegal,0 }, /* a9: 0100 1100 1010 1001 */
- {illegal,0 }, /* aa: 0100 1100 1010 1010 */
- {illegal,0 }, /* ab: 0100 1100 1010 1011 */
- {illegal,0 }, /* ac: 0100 1100 1010 1100 */
- {illegal,0 }, /* ad: 0100 1100 1010 1101 */
- {illegal,0 }, /* ae: 0100 1100 1010 1110 */
- {illegal,0 }, /* af: 0100 1100 1010 1111 */
-
- {illegal,0 }, /* b0: 0100 1100 1011 0000 */
- {illegal,0 }, /* b1: 0100 1100 1011 0001 */
- {illegal,0 }, /* b2: 0100 1100 1011 0010 */
- {illegal,0 }, /* b3: 0100 1100 1011 0011 */
- {illegal,0 }, /* b4: 0100 1100 1011 0100 */
- {illegal,0 }, /* b5: 0100 1100 1011 0101 */
- {illegal,0 }, /* b6: 0100 1100 1011 0110 */
- {illegal,0 }, /* b7: 0100 1100 1011 0111 */
- {illegal,0 }, /* b8: 0100 1100 1011 1000 */
- {illegal,0 }, /* b9: 0100 1100 1011 1001 */
- {illegal,0 }, /* ba: 0100 1100 1011 1010 */
- {illegal,0 }, /* bb: 0100 1100 1011 1011 */
- {illegal,0 }, /* bc: 0100 1100 1011 1100 */
- {illegal,0 }, /* bd: 0100 1100 1011 1101 */
- {illegal,0 }, /* be: 0100 1100 1011 1110 */
- {illegal,0 }, /* bf: 0100 1100 1011 1111 */
+ {illegal,0 }, /* 00: 0100 1100 0000 0000 */
+ {illegal,0 }, /* 01: 0100 1100 0000 0001 */
+ {illegal,0 }, /* 02: 0100 1100 0000 0010 */
+ {illegal,0 }, /* 03: 0100 1100 0000 0011 */
+ {illegal,0 }, /* 04: 0100 1100 0000 0100 */
+ {illegal,0 }, /* 05: 0100 1100 0000 0101 */
+ {illegal,0 }, /* 06: 0100 1100 0000 0110 */
+ {illegal,0 }, /* 07: 0100 1100 0000 0111 */
+ {illegal,0 }, /* 08: 0100 1100 0000 1000 */
+ {illegal,0 }, /* 09: 0100 1100 0000 1001 */
+ {illegal,0 }, /* 0a: 0100 1100 0000 1010 */
+ {illegal,0 }, /* 0b: 0100 1100 0000 1011 */
+ {illegal,0 }, /* 0c: 0100 1100 0000 1100 */
+ {illegal,0 }, /* 0d: 0100 1100 0000 1101 */
+ {illegal,0 }, /* 0e: 0100 1100 0000 1110 */
+ {illegal,0 }, /* 0f: 0100 1100 0000 1111 */
+
+ {illegal,0 }, /* 10: 0100 1100 0001 0000 */
+ {illegal,0 }, /* 11: 0100 1100 0001 0001 */
+ {illegal,0 }, /* 12: 0100 1100 0001 0010 */
+ {illegal,0 }, /* 13: 0100 1100 0001 0011 */
+ {illegal,0 }, /* 14: 0100 1100 0001 0100 */
+ {illegal,0 }, /* 15: 0100 1100 0001 0101 */
+ {illegal,0 }, /* 16: 0100 1100 0001 0110 */
+ {illegal,0 }, /* 17: 0100 1100 0001 0111 */
+ {illegal,0 }, /* 18: 0100 1100 0001 1000 */
+ {illegal,0 }, /* 19: 0100 1100 0001 1001 */
+ {illegal,0 }, /* 1a: 0100 1100 0001 1010 */
+ {illegal,0 }, /* 1b: 0100 1100 0001 1011 */
+ {illegal,0 }, /* 1c: 0100 1100 0001 1100 */
+ {illegal,0 }, /* 1d: 0100 1100 0001 1101 */
+ {illegal,0 }, /* 1e: 0100 1100 0001 1110 */
+ {illegal,0 }, /* 1f: 0100 1100 0001 1111 */
+
+ {illegal,0 }, /* 20: 0100 1100 0010 0000 */
+ {illegal,0 }, /* 21: 0100 1100 0010 0001 */
+ {illegal,0 }, /* 22: 0100 1100 0010 0010 */
+ {illegal,0 }, /* 23: 0100 1100 0010 0011 */
+ {illegal,0 }, /* 24: 0100 1100 0010 0100 */
+ {illegal,0 }, /* 25: 0100 1100 0010 0101 */
+ {illegal,0 }, /* 26: 0100 1100 0010 0110 */
+ {illegal,0 }, /* 27: 0100 1100 0010 0111 */
+ {illegal,0 }, /* 28: 0100 1100 0010 1000 */
+ {illegal,0 }, /* 29: 0100 1100 0010 1001 */
+ {illegal,0 }, /* 2a: 0100 1100 0010 1010 */
+ {illegal,0 }, /* 2b: 0100 1100 0010 1011 */
+ {illegal,0 }, /* 2c: 0100 1100 0010 1100 */
+ {illegal,0 }, /* 2d: 0100 1100 0010 1101 */
+ {illegal,0 }, /* 2e: 0100 1100 0010 1110 */
+ {illegal,0 }, /* 2f: 0100 1100 0010 1111 */
+
+ {illegal,0 }, /* 30: 0100 1100 0011 0000 */
+ {illegal,0 }, /* 31: 0100 1100 0011 0001 */
+ {illegal,0 }, /* 32: 0100 1100 0011 0010 */
+ {illegal,0 }, /* 33: 0100 1100 0011 0011 */
+ {illegal,0 }, /* 34: 0100 1100 0011 0100 */
+ {illegal,0 }, /* 35: 0100 1100 0011 0101 */
+ {illegal,0 }, /* 36: 0100 1100 0011 0110 */
+ {illegal,0 }, /* 37: 0100 1100 0011 0111 */
+ {illegal,0 }, /* 38: 0100 1100 0011 1000 */
+ {illegal,0 }, /* 39: 0100 1100 0011 1001 */
+ {illegal,0 }, /* 3a: 0100 1100 0011 1010 */
+ {illegal,0 }, /* 3b: 0100 1100 0011 1011 */
+ {illegal,0 }, /* 3c: 0100 1100 0011 1100 */
+ {illegal,0 }, /* 3d: 0100 1100 0011 1101 */
+ {illegal,0 }, /* 3e: 0100 1100 0011 1110 */
+ {illegal,0 }, /* 3f: 0100 1100 0011 1111 */
+
+ {illegal,0 }, /* 40: 0100 1100 0100 0000 */
+ {illegal,0 }, /* 41: 0100 1100 0100 0001 */
+ {illegal,0 }, /* 42: 0100 1100 0100 0010 */
+ {illegal,0 }, /* 43: 0100 1100 0100 0011 */
+ {illegal,0 }, /* 44: 0100 1100 0100 0100 */
+ {illegal,0 }, /* 45: 0100 1100 0100 0101 */
+ {illegal,0 }, /* 46: 0100 1100 0100 0110 */
+ {illegal,0 }, /* 47: 0100 1100 0100 0111 */
+ {illegal,0 }, /* 48: 0100 1100 0100 1000 */
+ {illegal,0 }, /* 49: 0100 1100 0100 1001 */
+ {illegal,0 }, /* 4a: 0100 1100 0100 1010 */
+ {illegal,0 }, /* 4b: 0100 1100 0100 1011 */
+ {illegal,0 }, /* 4c: 0100 1100 0100 1100 */
+ {illegal,0 }, /* 4d: 0100 1100 0100 1101 */
+ {illegal,0 }, /* 4e: 0100 1100 0100 1110 */
+ {illegal,0 }, /* 4f: 0100 1100 0100 1111 */
+
+ {illegal,0 }, /* 50: 0100 1100 0101 0000 */
+ {illegal,0 }, /* 51: 0100 1100 0101 0001 */
+ {illegal,0 }, /* 52: 0100 1100 0101 0010 */
+ {illegal,0 }, /* 53: 0100 1100 0101 0011 */
+ {illegal,0 }, /* 54: 0100 1100 0101 0100 */
+ {illegal,0 }, /* 55: 0100 1100 0101 0101 */
+ {illegal,0 }, /* 56: 0100 1100 0101 0110 */
+ {illegal,0 }, /* 57: 0100 1100 0101 0111 */
+ {illegal,0 }, /* 58: 0100 1100 0101 1000 */
+ {illegal,0 }, /* 59: 0100 1100 0101 1001 */
+ {illegal,0 }, /* 5a: 0100 1100 0101 1010 */
+ {illegal,0 }, /* 5b: 0100 1100 0101 1011 */
+ {illegal,0 }, /* 5c: 0100 1100 0101 1100 */
+ {illegal,0 }, /* 5d: 0100 1100 0101 1101 */
+ {illegal,0 }, /* 5e: 0100 1100 0101 1110 */
+ {illegal,0 }, /* 5f: 0100 1100 0101 1111 */
+
+ {illegal,0 }, /* 60: 0100 1100 0110 0000 */
+ {illegal,0 }, /* 61: 0100 1100 0110 0001 */
+ {illegal,0 }, /* 62: 0100 1100 0110 0010 */
+ {illegal,0 }, /* 63: 0100 1100 0110 0011 */
+ {illegal,0 }, /* 64: 0100 1100 0110 0100 */
+ {illegal,0 }, /* 65: 0100 1100 0110 0101 */
+ {illegal,0 }, /* 66: 0100 1100 0110 0110 */
+ {illegal,0 }, /* 67: 0100 1100 0110 0111 */
+ {illegal,0 }, /* 68: 0100 1100 0110 1000 */
+ {illegal,0 }, /* 69: 0100 1100 0110 1001 */
+ {illegal,0 }, /* 6a: 0100 1100 0110 1010 */
+ {illegal,0 }, /* 6b: 0100 1100 0110 1011 */
+ {illegal,0 }, /* 6c: 0100 1100 0110 1100 */
+ {illegal,0 }, /* 6d: 0100 1100 0110 1101 */
+ {illegal,0 }, /* 6e: 0100 1100 0110 1110 */
+ {illegal,0 }, /* 6f: 0100 1100 0110 1111 */
+
+ {illegal,0 }, /* 70: 0100 1100 0111 0000 */
+ {illegal,0 }, /* 71: 0100 1100 0111 0001 */
+ {illegal,0 }, /* 72: 0100 1100 0111 0010 */
+ {illegal,0 }, /* 73: 0100 1100 0111 0011 */
+ {illegal,0 }, /* 74: 0100 1100 0111 0100 */
+ {illegal,0 }, /* 75: 0100 1100 0111 0101 */
+ {illegal,0 }, /* 76: 0100 1100 0111 0110 */
+ {illegal,0 }, /* 77: 0100 1100 0111 0111 */
+ {illegal,0 }, /* 78: 0100 1100 0111 1000 */
+ {illegal,0 }, /* 79: 0100 1100 0111 1001 */
+ {illegal,0 }, /* 7a: 0100 1100 0111 1010 */
+ {illegal,0 }, /* 7b: 0100 1100 0111 1011 */
+ {illegal,0 }, /* 7c: 0100 1100 0111 1100 */
+ {illegal,0 }, /* 7d: 0100 1100 0111 1101 */
+ {illegal,0 }, /* 7e: 0100 1100 0111 1110 */
+ {illegal,0 }, /* 7f: 0100 1100 0111 1111 */
+
+ {illegal,0 }, /* 80: 0100 1100 1000 0000 */
+ {illegal,0 }, /* 81: 0100 1100 1000 0001 */
+ {illegal,0 }, /* 82: 0100 1100 1000 0010 */
+ {illegal,0 }, /* 83: 0100 1100 1000 0011 */
+ {illegal,0 }, /* 84: 0100 1100 1000 0100 */
+ {illegal,0 }, /* 85: 0100 1100 1000 0101 */
+ {illegal,0 }, /* 86: 0100 1100 1000 0110 */
+ {illegal,0 }, /* 87: 0100 1100 1000 0111 */
+ {illegal,0 }, /* 88: 0100 1100 1000 1000 */
+ {illegal,0 }, /* 89: 0100 1100 1000 1001 */
+ {illegal,0 }, /* 8a: 0100 1100 1000 1010 */
+ {illegal,0 }, /* 8b: 0100 1100 1000 1011 */
+ {illegal,0 }, /* 8c: 0100 1100 1000 1100 */
+ {illegal,0 }, /* 8d: 0100 1100 1000 1101 */
+ {illegal,0 }, /* 8e: 0100 1100 1000 1110 */
+ {illegal,0 }, /* 8f: 0100 1100 1000 1111 */
+
+ {illegal,0 }, /* 90: 0100 1100 1001 0000 */
+ {illegal,0 }, /* 91: 0100 1100 1001 0001 */
+ {illegal,0 }, /* 92: 0100 1100 1001 0010 */
+ {illegal,0 }, /* 93: 0100 1100 1001 0011 */
+ {illegal,0 }, /* 94: 0100 1100 1001 0100 */
+ {illegal,0 }, /* 95: 0100 1100 1001 0101 */
+ {illegal,0 }, /* 96: 0100 1100 1001 0110 */
+ {illegal,0 }, /* 97: 0100 1100 1001 0111 */
+ {illegal,0 }, /* 98: 0100 1100 1001 1000 */
+ {illegal,0 }, /* 99: 0100 1100 1001 1001 */
+ {illegal,0 }, /* 9a: 0100 1100 1001 1010 */
+ {illegal,0 }, /* 9b: 0100 1100 1001 1011 */
+ {illegal,0 }, /* 9c: 0100 1100 1001 1100 */
+ {illegal,0 }, /* 9d: 0100 1100 1001 1101 */
+ {illegal,0 }, /* 9e: 0100 1100 1001 1110 */
+ {illegal,0 }, /* 9f: 0100 1100 1001 1111 */
+
+ {illegal,0 }, /* a0: 0100 1100 1010 0000 */
+ {illegal,0 }, /* a1: 0100 1100 1010 0001 */
+ {illegal,0 }, /* a2: 0100 1100 1010 0010 */
+ {illegal,0 }, /* a3: 0100 1100 1010 0011 */
+ {illegal,0 }, /* a4: 0100 1100 1010 0100 */
+ {illegal,0 }, /* a5: 0100 1100 1010 0101 */
+ {illegal,0 }, /* a6: 0100 1100 1010 0110 */
+ {illegal,0 }, /* a7: 0100 1100 1010 0111 */
+ {illegal,0 }, /* a8: 0100 1100 1010 1000 */
+ {illegal,0 }, /* a9: 0100 1100 1010 1001 */
+ {illegal,0 }, /* aa: 0100 1100 1010 1010 */
+ {illegal,0 }, /* ab: 0100 1100 1010 1011 */
+ {illegal,0 }, /* ac: 0100 1100 1010 1100 */
+ {illegal,0 }, /* ad: 0100 1100 1010 1101 */
+ {illegal,0 }, /* ae: 0100 1100 1010 1110 */
+ {illegal,0 }, /* af: 0100 1100 1010 1111 */
+
+ {illegal,0 }, /* b0: 0100 1100 1011 0000 */
+ {illegal,0 }, /* b1: 0100 1100 1011 0001 */
+ {illegal,0 }, /* b2: 0100 1100 1011 0010 */
+ {illegal,0 }, /* b3: 0100 1100 1011 0011 */
+ {illegal,0 }, /* b4: 0100 1100 1011 0100 */
+ {illegal,0 }, /* b5: 0100 1100 1011 0101 */
+ {illegal,0 }, /* b6: 0100 1100 1011 0110 */
+ {illegal,0 }, /* b7: 0100 1100 1011 0111 */
+ {illegal,0 }, /* b8: 0100 1100 1011 1000 */
+ {illegal,0 }, /* b9: 0100 1100 1011 1001 */
+ {illegal,0 }, /* ba: 0100 1100 1011 1010 */
+ {illegal,0 }, /* bb: 0100 1100 1011 1011 */
+ {illegal,0 }, /* bc: 0100 1100 1011 1100 */
+ {illegal,0 }, /* bd: 0100 1100 1011 1101 */
+ {illegal,0 }, /* be: 0100 1100 1011 1110 */
+ {illegal,0 }, /* bf: 0100 1100 1011 1111 */
{MOV,"A,PA" }, /* c0: 0100 1100 1100 0000 */
{MOV,"A,PB" }, /* c1: 0100 1100 1100 0001 */
{MOV,"A,PC" }, /* c2: 0100 1100 1100 0010 */
{MOV,"A,PD" }, /* c3: 0100 1100 1100 0011 */
- {illegal,0 }, /* c4: 0100 1100 1100 0100 */
+ {illegal,0 }, /* c4: 0100 1100 1100 0100 */
{MOV,"A,PF" }, /* c5: 0100 1100 1100 0101 */
{MOV,"A,MKH" }, /* c6: 0100 1100 1100 0110 */
{MOV,"A,MKL" }, /* c7: 0100 1100 1100 0111 */
- {MOV,"A,ANM" }, /* c8: 0100 1100 1100 1000 */ /* 7810 */
+ {MOV,"A,ANM" }, /* c8: 0100 1100 1100 1000 */ /* 7810 */
{MOV,"A,SMH" }, /* c9: 0100 1100 1100 1001 */
- {illegal,0 }, /* ca: 0100 1100 1100 1010 */
+ {illegal,0 }, /* ca: 0100 1100 1100 1010 */
{MOV,"A,EOM" }, /* cb: 0100 1100 1100 1011 */
- {illegal,0 }, /* cc: 0100 1100 1100 1100 */
+ {illegal,0 }, /* cc: 0100 1100 1100 1100 */
{MOV,"A,TMM" }, /* cd: 0100 1100 1100 1101 */
- {illegal,0 }, /* ce: 0100 1100 1100 1110 */
- {illegal,0 }, /* cf: 0100 1100 1100 1111 */
-
- {illegal,0 }, /* d0: 0100 1100 1101 0000 */
- {illegal,0 }, /* d1: 0100 1100 1101 0001 */
- {illegal,0 }, /* d2: 0100 1100 1101 0010 */
- {illegal,0 }, /* d3: 0100 1100 1101 0011 */
- {illegal,0 }, /* d4: 0100 1100 1101 0100 */
- {illegal,0 }, /* d5: 0100 1100 1101 0101 */
- {illegal,0 }, /* d6: 0100 1100 1101 0110 */
- {illegal,0 }, /* d7: 0100 1100 1101 0111 */
- {illegal,0 }, /* d8: 0100 1100 1101 1000 */
+ {illegal,0 }, /* ce: 0100 1100 1100 1110 */
+ {illegal,0 }, /* cf: 0100 1100 1100 1111 */
+
+ {illegal,0 }, /* d0: 0100 1100 1101 0000 */
+ {illegal,0 }, /* d1: 0100 1100 1101 0001 */
+ {illegal,0 }, /* d2: 0100 1100 1101 0010 */
+ {illegal,0 }, /* d3: 0100 1100 1101 0011 */
+ {illegal,0 }, /* d4: 0100 1100 1101 0100 */
+ {illegal,0 }, /* d5: 0100 1100 1101 0101 */
+ {illegal,0 }, /* d6: 0100 1100 1101 0110 */
+ {illegal,0 }, /* d7: 0100 1100 1101 0111 */
+ {illegal,0 }, /* d8: 0100 1100 1101 1000 */
{MOV,"A,RXB" }, /* d9: 0100 1100 1101 1001 */
- {illegal,0 }, /* da: 0100 1100 1101 1010 */
- {illegal,0 }, /* db: 0100 1100 1101 1011 */
- {illegal,0 }, /* dc: 0100 1100 1101 1100 */
- {illegal,0 }, /* dd: 0100 1100 1101 1101 */
- {illegal,0 }, /* de: 0100 1100 1101 1110 */
- {illegal,0 }, /* df: 0100 1100 1101 1111 */
-
- {MOV,"A,CR0" }, /* e0: 0100 1100 1110 0000 */ /* 7810 */
- {MOV,"A,CR1" }, /* e1: 0100 1100 1110 0001 */ /* 7810 */
- {MOV,"A,CR2" }, /* e2: 0100 1100 1110 0010 */ /* 7810 */
- {MOV,"A,CR3" }, /* e3: 0100 1100 1110 0011 */ /* 7810 */
- {illegal,0 }, /* e4: 0100 1100 1110 0100 */
- {illegal,0 }, /* e5: 0100 1100 1110 0101 */
- {illegal,0 }, /* e6: 0100 1100 1110 0110 */
- {illegal,0 }, /* e7: 0100 1100 1110 0111 */
- {illegal,0 }, /* e8: 0100 1100 1110 1000 */
- {illegal,0 }, /* e9: 0100 1100 1110 1001 */
- {illegal,0 }, /* ea: 0100 1100 1110 1010 */
- {illegal,0 }, /* eb: 0100 1100 1110 1011 */
- {illegal,0 }, /* ec: 0100 1100 1110 1100 */
- {illegal,0 }, /* ed: 0100 1100 1110 1101 */
- {illegal,0 }, /* ee: 0100 1100 1110 1110 */
- {illegal,0 }, /* ef: 0100 1100 1110 1111 */
-
- {illegal,0 }, /* f0: 0100 1100 1111 0000 */
- {illegal,0 }, /* f1: 0100 1100 1111 0001 */
- {illegal,0 }, /* f2: 0100 1100 1111 0010 */
- {illegal,0 }, /* f3: 0100 1100 1111 0011 */
- {illegal,0 }, /* f4: 0100 1100 1111 0100 */
- {illegal,0 }, /* f5: 0100 1100 1111 0101 */
- {illegal,0 }, /* f6: 0100 1100 1111 0110 */
- {illegal,0 }, /* f7: 0100 1100 1111 0111 */
- {illegal,0 }, /* f8: 0100 1100 1111 1000 */
- {illegal,0 }, /* f9: 0100 1100 1111 1001 */
- {illegal,0 }, /* fa: 0100 1100 1111 1010 */
- {illegal,0 }, /* fb: 0100 1100 1111 1011 */
- {illegal,0 }, /* fc: 0100 1100 1111 1100 */
- {illegal,0 }, /* fd: 0100 1100 1111 1101 */
- {illegal,0 }, /* fe: 0100 1100 1111 1110 */
- {illegal,0 } /* ff: 0100 1100 1111 1111 */
+ {illegal,0 }, /* da: 0100 1100 1101 1010 */
+ {illegal,0 }, /* db: 0100 1100 1101 1011 */
+ {illegal,0 }, /* dc: 0100 1100 1101 1100 */
+ {illegal,0 }, /* dd: 0100 1100 1101 1101 */
+ {illegal,0 }, /* de: 0100 1100 1101 1110 */
+ {illegal,0 }, /* df: 0100 1100 1101 1111 */
+
+ {MOV,"A,CR0" }, /* e0: 0100 1100 1110 0000 */ /* 7810 */
+ {MOV,"A,CR1" }, /* e1: 0100 1100 1110 0001 */ /* 7810 */
+ {MOV,"A,CR2" }, /* e2: 0100 1100 1110 0010 */ /* 7810 */
+ {MOV,"A,CR3" }, /* e3: 0100 1100 1110 0011 */ /* 7810 */
+ {illegal,0 }, /* e4: 0100 1100 1110 0100 */
+ {illegal,0 }, /* e5: 0100 1100 1110 0101 */
+ {illegal,0 }, /* e6: 0100 1100 1110 0110 */
+ {illegal,0 }, /* e7: 0100 1100 1110 0111 */
+ {illegal,0 }, /* e8: 0100 1100 1110 1000 */
+ {illegal,0 }, /* e9: 0100 1100 1110 1001 */
+ {illegal,0 }, /* ea: 0100 1100 1110 1010 */
+ {illegal,0 }, /* eb: 0100 1100 1110 1011 */
+ {illegal,0 }, /* ec: 0100 1100 1110 1100 */
+ {illegal,0 }, /* ed: 0100 1100 1110 1101 */
+ {illegal,0 }, /* ee: 0100 1100 1110 1110 */
+ {illegal,0 }, /* ef: 0100 1100 1110 1111 */
+
+ {illegal,0 }, /* f0: 0100 1100 1111 0000 */
+ {illegal,0 }, /* f1: 0100 1100 1111 0001 */
+ {illegal,0 }, /* f2: 0100 1100 1111 0010 */
+ {illegal,0 }, /* f3: 0100 1100 1111 0011 */
+ {illegal,0 }, /* f4: 0100 1100 1111 0100 */
+ {illegal,0 }, /* f5: 0100 1100 1111 0101 */
+ {illegal,0 }, /* f6: 0100 1100 1111 0110 */
+ {illegal,0 }, /* f7: 0100 1100 1111 0111 */
+ {illegal,0 }, /* f8: 0100 1100 1111 1000 */
+ {illegal,0 }, /* f9: 0100 1100 1111 1001 */
+ {illegal,0 }, /* fa: 0100 1100 1111 1010 */
+ {illegal,0 }, /* fb: 0100 1100 1111 1011 */
+ {illegal,0 }, /* fc: 0100 1100 1111 1100 */
+ {illegal,0 }, /* fd: 0100 1100 1111 1101 */
+ {illegal,0 }, /* fe: 0100 1100 1111 1110 */
+ {illegal,0 } /* ff: 0100 1100 1111 1111 */
};
static const struct dasm_s dasm4C_7807[256] =
{
- {illegal,0 }, /* 00: 0100 1100 0000 0000 */
- {illegal,0 }, /* 01: 0100 1100 0000 0001 */
- {illegal,0 }, /* 02: 0100 1100 0000 0010 */
- {illegal,0 }, /* 03: 0100 1100 0000 0011 */
- {illegal,0 }, /* 04: 0100 1100 0000 0100 */
- {illegal,0 }, /* 05: 0100 1100 0000 0101 */
- {illegal,0 }, /* 06: 0100 1100 0000 0110 */
- {illegal,0 }, /* 07: 0100 1100 0000 0111 */
- {illegal,0 }, /* 08: 0100 1100 0000 1000 */
- {illegal,0 }, /* 09: 0100 1100 0000 1001 */
- {illegal,0 }, /* 0a: 0100 1100 0000 1010 */
- {illegal,0 }, /* 0b: 0100 1100 0000 1011 */
- {illegal,0 }, /* 0c: 0100 1100 0000 1100 */
- {illegal,0 }, /* 0d: 0100 1100 0000 1101 */
- {illegal,0 }, /* 0e: 0100 1100 0000 1110 */
- {illegal,0 }, /* 0f: 0100 1100 0000 1111 */
-
- {illegal,0 }, /* 10: 0100 1100 0001 0000 */
- {illegal,0 }, /* 11: 0100 1100 0001 0001 */
- {illegal,0 }, /* 12: 0100 1100 0001 0010 */
- {illegal,0 }, /* 13: 0100 1100 0001 0011 */
- {illegal,0 }, /* 14: 0100 1100 0001 0100 */
- {illegal,0 }, /* 15: 0100 1100 0001 0101 */
- {illegal,0 }, /* 16: 0100 1100 0001 0110 */
- {illegal,0 }, /* 17: 0100 1100 0001 0111 */
- {illegal,0 }, /* 18: 0100 1100 0001 1000 */
- {illegal,0 }, /* 19: 0100 1100 0001 1001 */
- {illegal,0 }, /* 1a: 0100 1100 0001 1010 */
- {illegal,0 }, /* 1b: 0100 1100 0001 1011 */
- {illegal,0 }, /* 1c: 0100 1100 0001 1100 */
- {illegal,0 }, /* 1d: 0100 1100 0001 1101 */
- {illegal,0 }, /* 1e: 0100 1100 0001 1110 */
- {illegal,0 }, /* 1f: 0100 1100 0001 1111 */
-
- {illegal,0 }, /* 20: 0100 1100 0010 0000 */
- {illegal,0 }, /* 21: 0100 1100 0010 0001 */
- {illegal,0 }, /* 22: 0100 1100 0010 0010 */
- {illegal,0 }, /* 23: 0100 1100 0010 0011 */
- {illegal,0 }, /* 24: 0100 1100 0010 0100 */
- {illegal,0 }, /* 25: 0100 1100 0010 0101 */
- {illegal,0 }, /* 26: 0100 1100 0010 0110 */
- {illegal,0 }, /* 27: 0100 1100 0010 0111 */
- {illegal,0 }, /* 28: 0100 1100 0010 1000 */
- {illegal,0 }, /* 29: 0100 1100 0010 1001 */
- {illegal,0 }, /* 2a: 0100 1100 0010 1010 */
- {illegal,0 }, /* 2b: 0100 1100 0010 1011 */
- {illegal,0 }, /* 2c: 0100 1100 0010 1100 */
- {illegal,0 }, /* 2d: 0100 1100 0010 1101 */
- {illegal,0 }, /* 2e: 0100 1100 0010 1110 */
- {illegal,0 }, /* 2f: 0100 1100 0010 1111 */
-
- {illegal,0 }, /* 30: 0100 1100 0011 0000 */
- {illegal,0 }, /* 31: 0100 1100 0011 0001 */
- {illegal,0 }, /* 32: 0100 1100 0011 0010 */
- {illegal,0 }, /* 33: 0100 1100 0011 0011 */
- {illegal,0 }, /* 34: 0100 1100 0011 0100 */
- {illegal,0 }, /* 35: 0100 1100 0011 0101 */
- {illegal,0 }, /* 36: 0100 1100 0011 0110 */
- {illegal,0 }, /* 37: 0100 1100 0011 0111 */
- {illegal,0 }, /* 38: 0100 1100 0011 1000 */
- {illegal,0 }, /* 39: 0100 1100 0011 1001 */
- {illegal,0 }, /* 3a: 0100 1100 0011 1010 */
- {illegal,0 }, /* 3b: 0100 1100 0011 1011 */
- {illegal,0 }, /* 3c: 0100 1100 0011 1100 */
- {illegal,0 }, /* 3d: 0100 1100 0011 1101 */
- {illegal,0 }, /* 3e: 0100 1100 0011 1110 */
- {illegal,0 }, /* 3f: 0100 1100 0011 1111 */
-
- {illegal,0 }, /* 40: 0100 1100 0100 0000 */
- {illegal,0 }, /* 41: 0100 1100 0100 0001 */
- {illegal,0 }, /* 42: 0100 1100 0100 0010 */
- {illegal,0 }, /* 43: 0100 1100 0100 0011 */
- {illegal,0 }, /* 44: 0100 1100 0100 0100 */
- {illegal,0 }, /* 45: 0100 1100 0100 0101 */
- {illegal,0 }, /* 46: 0100 1100 0100 0110 */
- {illegal,0 }, /* 47: 0100 1100 0100 0111 */
- {illegal,0 }, /* 48: 0100 1100 0100 1000 */
- {illegal,0 }, /* 49: 0100 1100 0100 1001 */
- {illegal,0 }, /* 4a: 0100 1100 0100 1010 */
- {illegal,0 }, /* 4b: 0100 1100 0100 1011 */
- {illegal,0 }, /* 4c: 0100 1100 0100 1100 */
- {illegal,0 }, /* 4d: 0100 1100 0100 1101 */
- {illegal,0 }, /* 4e: 0100 1100 0100 1110 */
- {illegal,0 }, /* 4f: 0100 1100 0100 1111 */
-
- {illegal,0 }, /* 50: 0100 1100 0101 0000 */
- {illegal,0 }, /* 51: 0100 1100 0101 0001 */
- {illegal,0 }, /* 52: 0100 1100 0101 0010 */
- {illegal,0 }, /* 53: 0100 1100 0101 0011 */
- {illegal,0 }, /* 54: 0100 1100 0101 0100 */
- {illegal,0 }, /* 55: 0100 1100 0101 0101 */
- {illegal,0 }, /* 56: 0100 1100 0101 0110 */
- {illegal,0 }, /* 57: 0100 1100 0101 0111 */
- {illegal,0 }, /* 58: 0100 1100 0101 1000 */
- {illegal,0 }, /* 59: 0100 1100 0101 1001 */
- {illegal,0 }, /* 5a: 0100 1100 0101 1010 */
- {illegal,0 }, /* 5b: 0100 1100 0101 1011 */
- {illegal,0 }, /* 5c: 0100 1100 0101 1100 */
- {illegal,0 }, /* 5d: 0100 1100 0101 1101 */
- {illegal,0 }, /* 5e: 0100 1100 0101 1110 */
- {illegal,0 }, /* 5f: 0100 1100 0101 1111 */
-
- {illegal,0 }, /* 60: 0100 1100 0110 0000 */
- {illegal,0 }, /* 61: 0100 1100 0110 0001 */
- {illegal,0 }, /* 62: 0100 1100 0110 0010 */
- {illegal,0 }, /* 63: 0100 1100 0110 0011 */
- {illegal,0 }, /* 64: 0100 1100 0110 0100 */
- {illegal,0 }, /* 65: 0100 1100 0110 0101 */
- {illegal,0 }, /* 66: 0100 1100 0110 0110 */
- {illegal,0 }, /* 67: 0100 1100 0110 0111 */
- {illegal,0 }, /* 68: 0100 1100 0110 1000 */
- {illegal,0 }, /* 69: 0100 1100 0110 1001 */
- {illegal,0 }, /* 6a: 0100 1100 0110 1010 */
- {illegal,0 }, /* 6b: 0100 1100 0110 1011 */
- {illegal,0 }, /* 6c: 0100 1100 0110 1100 */
- {illegal,0 }, /* 6d: 0100 1100 0110 1101 */
- {illegal,0 }, /* 6e: 0100 1100 0110 1110 */
- {illegal,0 }, /* 6f: 0100 1100 0110 1111 */
-
- {illegal,0 }, /* 70: 0100 1100 0111 0000 */
- {illegal,0 }, /* 71: 0100 1100 0111 0001 */
- {illegal,0 }, /* 72: 0100 1100 0111 0010 */
- {illegal,0 }, /* 73: 0100 1100 0111 0011 */
- {illegal,0 }, /* 74: 0100 1100 0111 0100 */
- {illegal,0 }, /* 75: 0100 1100 0111 0101 */
- {illegal,0 }, /* 76: 0100 1100 0111 0110 */
- {illegal,0 }, /* 77: 0100 1100 0111 0111 */
- {illegal,0 }, /* 78: 0100 1100 0111 1000 */
- {illegal,0 }, /* 79: 0100 1100 0111 1001 */
- {illegal,0 }, /* 7a: 0100 1100 0111 1010 */
- {illegal,0 }, /* 7b: 0100 1100 0111 1011 */
- {illegal,0 }, /* 7c: 0100 1100 0111 1100 */
- {illegal,0 }, /* 7d: 0100 1100 0111 1101 */
- {illegal,0 }, /* 7e: 0100 1100 0111 1110 */
- {illegal,0 }, /* 7f: 0100 1100 0111 1111 */
-
- {illegal,0 }, /* 80: 0100 1100 1000 0000 */
- {illegal,0 }, /* 81: 0100 1100 1000 0001 */
- {illegal,0 }, /* 82: 0100 1100 1000 0010 */
- {illegal,0 }, /* 83: 0100 1100 1000 0011 */
- {illegal,0 }, /* 84: 0100 1100 1000 0100 */
- {illegal,0 }, /* 85: 0100 1100 1000 0101 */
- {illegal,0 }, /* 86: 0100 1100 1000 0110 */
- {illegal,0 }, /* 87: 0100 1100 1000 0111 */
- {illegal,0 }, /* 88: 0100 1100 1000 1000 */
- {illegal,0 }, /* 89: 0100 1100 1000 1001 */
- {illegal,0 }, /* 8a: 0100 1100 1000 1010 */
- {illegal,0 }, /* 8b: 0100 1100 1000 1011 */
- {illegal,0 }, /* 8c: 0100 1100 1000 1100 */
- {illegal,0 }, /* 8d: 0100 1100 1000 1101 */
- {illegal,0 }, /* 8e: 0100 1100 1000 1110 */
- {illegal,0 }, /* 8f: 0100 1100 1000 1111 */
-
- {illegal,0 }, /* 90: 0100 1100 1001 0000 */
- {illegal,0 }, /* 91: 0100 1100 1001 0001 */
- {illegal,0 }, /* 92: 0100 1100 1001 0010 */
- {illegal,0 }, /* 93: 0100 1100 1001 0011 */
- {illegal,0 }, /* 94: 0100 1100 1001 0100 */
- {illegal,0 }, /* 95: 0100 1100 1001 0101 */
- {illegal,0 }, /* 96: 0100 1100 1001 0110 */
- {illegal,0 }, /* 97: 0100 1100 1001 0111 */
- {illegal,0 }, /* 98: 0100 1100 1001 1000 */
- {illegal,0 }, /* 99: 0100 1100 1001 1001 */
- {illegal,0 }, /* 9a: 0100 1100 1001 1010 */
- {illegal,0 }, /* 9b: 0100 1100 1001 1011 */
- {illegal,0 }, /* 9c: 0100 1100 1001 1100 */
- {illegal,0 }, /* 9d: 0100 1100 1001 1101 */
- {illegal,0 }, /* 9e: 0100 1100 1001 1110 */
- {illegal,0 }, /* 9f: 0100 1100 1001 1111 */
-
- {illegal,0 }, /* a0: 0100 1100 1010 0000 */
- {illegal,0 }, /* a1: 0100 1100 1010 0001 */
- {illegal,0 }, /* a2: 0100 1100 1010 0010 */
- {illegal,0 }, /* a3: 0100 1100 1010 0011 */
- {illegal,0 }, /* a4: 0100 1100 1010 0100 */
- {illegal,0 }, /* a5: 0100 1100 1010 0101 */
- {illegal,0 }, /* a6: 0100 1100 1010 0110 */
- {illegal,0 }, /* a7: 0100 1100 1010 0111 */
- {illegal,0 }, /* a8: 0100 1100 1010 1000 */
- {illegal,0 }, /* a9: 0100 1100 1010 1001 */
- {illegal,0 }, /* aa: 0100 1100 1010 1010 */
- {illegal,0 }, /* ab: 0100 1100 1010 1011 */
- {illegal,0 }, /* ac: 0100 1100 1010 1100 */
- {illegal,0 }, /* ad: 0100 1100 1010 1101 */
- {illegal,0 }, /* ae: 0100 1100 1010 1110 */
- {illegal,0 }, /* af: 0100 1100 1010 1111 */
-
- {illegal,0 }, /* b0: 0100 1100 1011 0000 */
- {illegal,0 }, /* b1: 0100 1100 1011 0001 */
- {illegal,0 }, /* b2: 0100 1100 1011 0010 */
- {illegal,0 }, /* b3: 0100 1100 1011 0011 */
- {illegal,0 }, /* b4: 0100 1100 1011 0100 */
- {illegal,0 }, /* b5: 0100 1100 1011 0101 */
- {illegal,0 }, /* b6: 0100 1100 1011 0110 */
- {illegal,0 }, /* b7: 0100 1100 1011 0111 */
- {illegal,0 }, /* b8: 0100 1100 1011 1000 */
- {illegal,0 }, /* b9: 0100 1100 1011 1001 */
- {illegal,0 }, /* ba: 0100 1100 1011 1010 */
- {illegal,0 }, /* bb: 0100 1100 1011 1011 */
- {illegal,0 }, /* bc: 0100 1100 1011 1100 */
- {illegal,0 }, /* bd: 0100 1100 1011 1101 */
- {illegal,0 }, /* be: 0100 1100 1011 1110 */
- {illegal,0 }, /* bf: 0100 1100 1011 1111 */
+ {illegal,0 }, /* 00: 0100 1100 0000 0000 */
+ {illegal,0 }, /* 01: 0100 1100 0000 0001 */
+ {illegal,0 }, /* 02: 0100 1100 0000 0010 */
+ {illegal,0 }, /* 03: 0100 1100 0000 0011 */
+ {illegal,0 }, /* 04: 0100 1100 0000 0100 */
+ {illegal,0 }, /* 05: 0100 1100 0000 0101 */
+ {illegal,0 }, /* 06: 0100 1100 0000 0110 */
+ {illegal,0 }, /* 07: 0100 1100 0000 0111 */
+ {illegal,0 }, /* 08: 0100 1100 0000 1000 */
+ {illegal,0 }, /* 09: 0100 1100 0000 1001 */
+ {illegal,0 }, /* 0a: 0100 1100 0000 1010 */
+ {illegal,0 }, /* 0b: 0100 1100 0000 1011 */
+ {illegal,0 }, /* 0c: 0100 1100 0000 1100 */
+ {illegal,0 }, /* 0d: 0100 1100 0000 1101 */
+ {illegal,0 }, /* 0e: 0100 1100 0000 1110 */
+ {illegal,0 }, /* 0f: 0100 1100 0000 1111 */
+
+ {illegal,0 }, /* 10: 0100 1100 0001 0000 */
+ {illegal,0 }, /* 11: 0100 1100 0001 0001 */
+ {illegal,0 }, /* 12: 0100 1100 0001 0010 */
+ {illegal,0 }, /* 13: 0100 1100 0001 0011 */
+ {illegal,0 }, /* 14: 0100 1100 0001 0100 */
+ {illegal,0 }, /* 15: 0100 1100 0001 0101 */
+ {illegal,0 }, /* 16: 0100 1100 0001 0110 */
+ {illegal,0 }, /* 17: 0100 1100 0001 0111 */
+ {illegal,0 }, /* 18: 0100 1100 0001 1000 */
+ {illegal,0 }, /* 19: 0100 1100 0001 1001 */
+ {illegal,0 }, /* 1a: 0100 1100 0001 1010 */
+ {illegal,0 }, /* 1b: 0100 1100 0001 1011 */
+ {illegal,0 }, /* 1c: 0100 1100 0001 1100 */
+ {illegal,0 }, /* 1d: 0100 1100 0001 1101 */
+ {illegal,0 }, /* 1e: 0100 1100 0001 1110 */
+ {illegal,0 }, /* 1f: 0100 1100 0001 1111 */
+
+ {illegal,0 }, /* 20: 0100 1100 0010 0000 */
+ {illegal,0 }, /* 21: 0100 1100 0010 0001 */
+ {illegal,0 }, /* 22: 0100 1100 0010 0010 */
+ {illegal,0 }, /* 23: 0100 1100 0010 0011 */
+ {illegal,0 }, /* 24: 0100 1100 0010 0100 */
+ {illegal,0 }, /* 25: 0100 1100 0010 0101 */
+ {illegal,0 }, /* 26: 0100 1100 0010 0110 */
+ {illegal,0 }, /* 27: 0100 1100 0010 0111 */
+ {illegal,0 }, /* 28: 0100 1100 0010 1000 */
+ {illegal,0 }, /* 29: 0100 1100 0010 1001 */
+ {illegal,0 }, /* 2a: 0100 1100 0010 1010 */
+ {illegal,0 }, /* 2b: 0100 1100 0010 1011 */
+ {illegal,0 }, /* 2c: 0100 1100 0010 1100 */
+ {illegal,0 }, /* 2d: 0100 1100 0010 1101 */
+ {illegal,0 }, /* 2e: 0100 1100 0010 1110 */
+ {illegal,0 }, /* 2f: 0100 1100 0010 1111 */
+
+ {illegal,0 }, /* 30: 0100 1100 0011 0000 */
+ {illegal,0 }, /* 31: 0100 1100 0011 0001 */
+ {illegal,0 }, /* 32: 0100 1100 0011 0010 */
+ {illegal,0 }, /* 33: 0100 1100 0011 0011 */
+ {illegal,0 }, /* 34: 0100 1100 0011 0100 */
+ {illegal,0 }, /* 35: 0100 1100 0011 0101 */
+ {illegal,0 }, /* 36: 0100 1100 0011 0110 */
+ {illegal,0 }, /* 37: 0100 1100 0011 0111 */
+ {illegal,0 }, /* 38: 0100 1100 0011 1000 */
+ {illegal,0 }, /* 39: 0100 1100 0011 1001 */
+ {illegal,0 }, /* 3a: 0100 1100 0011 1010 */
+ {illegal,0 }, /* 3b: 0100 1100 0011 1011 */
+ {illegal,0 }, /* 3c: 0100 1100 0011 1100 */
+ {illegal,0 }, /* 3d: 0100 1100 0011 1101 */
+ {illegal,0 }, /* 3e: 0100 1100 0011 1110 */
+ {illegal,0 }, /* 3f: 0100 1100 0011 1111 */
+
+ {illegal,0 }, /* 40: 0100 1100 0100 0000 */
+ {illegal,0 }, /* 41: 0100 1100 0100 0001 */
+ {illegal,0 }, /* 42: 0100 1100 0100 0010 */
+ {illegal,0 }, /* 43: 0100 1100 0100 0011 */
+ {illegal,0 }, /* 44: 0100 1100 0100 0100 */
+ {illegal,0 }, /* 45: 0100 1100 0100 0101 */
+ {illegal,0 }, /* 46: 0100 1100 0100 0110 */
+ {illegal,0 }, /* 47: 0100 1100 0100 0111 */
+ {illegal,0 }, /* 48: 0100 1100 0100 1000 */
+ {illegal,0 }, /* 49: 0100 1100 0100 1001 */
+ {illegal,0 }, /* 4a: 0100 1100 0100 1010 */
+ {illegal,0 }, /* 4b: 0100 1100 0100 1011 */
+ {illegal,0 }, /* 4c: 0100 1100 0100 1100 */
+ {illegal,0 }, /* 4d: 0100 1100 0100 1101 */
+ {illegal,0 }, /* 4e: 0100 1100 0100 1110 */
+ {illegal,0 }, /* 4f: 0100 1100 0100 1111 */
+
+ {illegal,0 }, /* 50: 0100 1100 0101 0000 */
+ {illegal,0 }, /* 51: 0100 1100 0101 0001 */
+ {illegal,0 }, /* 52: 0100 1100 0101 0010 */
+ {illegal,0 }, /* 53: 0100 1100 0101 0011 */
+ {illegal,0 }, /* 54: 0100 1100 0101 0100 */
+ {illegal,0 }, /* 55: 0100 1100 0101 0101 */
+ {illegal,0 }, /* 56: 0100 1100 0101 0110 */
+ {illegal,0 }, /* 57: 0100 1100 0101 0111 */
+ {illegal,0 }, /* 58: 0100 1100 0101 1000 */
+ {illegal,0 }, /* 59: 0100 1100 0101 1001 */
+ {illegal,0 }, /* 5a: 0100 1100 0101 1010 */
+ {illegal,0 }, /* 5b: 0100 1100 0101 1011 */
+ {illegal,0 }, /* 5c: 0100 1100 0101 1100 */
+ {illegal,0 }, /* 5d: 0100 1100 0101 1101 */
+ {illegal,0 }, /* 5e: 0100 1100 0101 1110 */
+ {illegal,0 }, /* 5f: 0100 1100 0101 1111 */
+
+ {illegal,0 }, /* 60: 0100 1100 0110 0000 */
+ {illegal,0 }, /* 61: 0100 1100 0110 0001 */
+ {illegal,0 }, /* 62: 0100 1100 0110 0010 */
+ {illegal,0 }, /* 63: 0100 1100 0110 0011 */
+ {illegal,0 }, /* 64: 0100 1100 0110 0100 */
+ {illegal,0 }, /* 65: 0100 1100 0110 0101 */
+ {illegal,0 }, /* 66: 0100 1100 0110 0110 */
+ {illegal,0 }, /* 67: 0100 1100 0110 0111 */
+ {illegal,0 }, /* 68: 0100 1100 0110 1000 */
+ {illegal,0 }, /* 69: 0100 1100 0110 1001 */
+ {illegal,0 }, /* 6a: 0100 1100 0110 1010 */
+ {illegal,0 }, /* 6b: 0100 1100 0110 1011 */
+ {illegal,0 }, /* 6c: 0100 1100 0110 1100 */
+ {illegal,0 }, /* 6d: 0100 1100 0110 1101 */
+ {illegal,0 }, /* 6e: 0100 1100 0110 1110 */
+ {illegal,0 }, /* 6f: 0100 1100 0110 1111 */
+
+ {illegal,0 }, /* 70: 0100 1100 0111 0000 */
+ {illegal,0 }, /* 71: 0100 1100 0111 0001 */
+ {illegal,0 }, /* 72: 0100 1100 0111 0010 */
+ {illegal,0 }, /* 73: 0100 1100 0111 0011 */
+ {illegal,0 }, /* 74: 0100 1100 0111 0100 */
+ {illegal,0 }, /* 75: 0100 1100 0111 0101 */
+ {illegal,0 }, /* 76: 0100 1100 0111 0110 */
+ {illegal,0 }, /* 77: 0100 1100 0111 0111 */
+ {illegal,0 }, /* 78: 0100 1100 0111 1000 */
+ {illegal,0 }, /* 79: 0100 1100 0111 1001 */
+ {illegal,0 }, /* 7a: 0100 1100 0111 1010 */
+ {illegal,0 }, /* 7b: 0100 1100 0111 1011 */
+ {illegal,0 }, /* 7c: 0100 1100 0111 1100 */
+ {illegal,0 }, /* 7d: 0100 1100 0111 1101 */
+ {illegal,0 }, /* 7e: 0100 1100 0111 1110 */
+ {illegal,0 }, /* 7f: 0100 1100 0111 1111 */
+
+ {illegal,0 }, /* 80: 0100 1100 1000 0000 */
+ {illegal,0 }, /* 81: 0100 1100 1000 0001 */
+ {illegal,0 }, /* 82: 0100 1100 1000 0010 */
+ {illegal,0 }, /* 83: 0100 1100 1000 0011 */
+ {illegal,0 }, /* 84: 0100 1100 1000 0100 */
+ {illegal,0 }, /* 85: 0100 1100 1000 0101 */
+ {illegal,0 }, /* 86: 0100 1100 1000 0110 */
+ {illegal,0 }, /* 87: 0100 1100 1000 0111 */
+ {illegal,0 }, /* 88: 0100 1100 1000 1000 */
+ {illegal,0 }, /* 89: 0100 1100 1000 1001 */
+ {illegal,0 }, /* 8a: 0100 1100 1000 1010 */
+ {illegal,0 }, /* 8b: 0100 1100 1000 1011 */
+ {illegal,0 }, /* 8c: 0100 1100 1000 1100 */
+ {illegal,0 }, /* 8d: 0100 1100 1000 1101 */
+ {illegal,0 }, /* 8e: 0100 1100 1000 1110 */
+ {illegal,0 }, /* 8f: 0100 1100 1000 1111 */
+
+ {illegal,0 }, /* 90: 0100 1100 1001 0000 */
+ {illegal,0 }, /* 91: 0100 1100 1001 0001 */
+ {illegal,0 }, /* 92: 0100 1100 1001 0010 */
+ {illegal,0 }, /* 93: 0100 1100 1001 0011 */
+ {illegal,0 }, /* 94: 0100 1100 1001 0100 */
+ {illegal,0 }, /* 95: 0100 1100 1001 0101 */
+ {illegal,0 }, /* 96: 0100 1100 1001 0110 */
+ {illegal,0 }, /* 97: 0100 1100 1001 0111 */
+ {illegal,0 }, /* 98: 0100 1100 1001 1000 */
+ {illegal,0 }, /* 99: 0100 1100 1001 1001 */
+ {illegal,0 }, /* 9a: 0100 1100 1001 1010 */
+ {illegal,0 }, /* 9b: 0100 1100 1001 1011 */
+ {illegal,0 }, /* 9c: 0100 1100 1001 1100 */
+ {illegal,0 }, /* 9d: 0100 1100 1001 1101 */
+ {illegal,0 }, /* 9e: 0100 1100 1001 1110 */
+ {illegal,0 }, /* 9f: 0100 1100 1001 1111 */
+
+ {illegal,0 }, /* a0: 0100 1100 1010 0000 */
+ {illegal,0 }, /* a1: 0100 1100 1010 0001 */
+ {illegal,0 }, /* a2: 0100 1100 1010 0010 */
+ {illegal,0 }, /* a3: 0100 1100 1010 0011 */
+ {illegal,0 }, /* a4: 0100 1100 1010 0100 */
+ {illegal,0 }, /* a5: 0100 1100 1010 0101 */
+ {illegal,0 }, /* a6: 0100 1100 1010 0110 */
+ {illegal,0 }, /* a7: 0100 1100 1010 0111 */
+ {illegal,0 }, /* a8: 0100 1100 1010 1000 */
+ {illegal,0 }, /* a9: 0100 1100 1010 1001 */
+ {illegal,0 }, /* aa: 0100 1100 1010 1010 */
+ {illegal,0 }, /* ab: 0100 1100 1010 1011 */
+ {illegal,0 }, /* ac: 0100 1100 1010 1100 */
+ {illegal,0 }, /* ad: 0100 1100 1010 1101 */
+ {illegal,0 }, /* ae: 0100 1100 1010 1110 */
+ {illegal,0 }, /* af: 0100 1100 1010 1111 */
+
+ {illegal,0 }, /* b0: 0100 1100 1011 0000 */
+ {illegal,0 }, /* b1: 0100 1100 1011 0001 */
+ {illegal,0 }, /* b2: 0100 1100 1011 0010 */
+ {illegal,0 }, /* b3: 0100 1100 1011 0011 */
+ {illegal,0 }, /* b4: 0100 1100 1011 0100 */
+ {illegal,0 }, /* b5: 0100 1100 1011 0101 */
+ {illegal,0 }, /* b6: 0100 1100 1011 0110 */
+ {illegal,0 }, /* b7: 0100 1100 1011 0111 */
+ {illegal,0 }, /* b8: 0100 1100 1011 1000 */
+ {illegal,0 }, /* b9: 0100 1100 1011 1001 */
+ {illegal,0 }, /* ba: 0100 1100 1011 1010 */
+ {illegal,0 }, /* bb: 0100 1100 1011 1011 */
+ {illegal,0 }, /* bc: 0100 1100 1011 1100 */
+ {illegal,0 }, /* bd: 0100 1100 1011 1101 */
+ {illegal,0 }, /* be: 0100 1100 1011 1110 */
+ {illegal,0 }, /* bf: 0100 1100 1011 1111 */
{MOV,"A,PA" }, /* c0: 0100 1100 1100 0000 */
{MOV,"A,PB" }, /* c1: 0100 1100 1100 0001 */
{MOV,"A,PC" }, /* c2: 0100 1100 1100 0010 */
{MOV,"A,PD" }, /* c3: 0100 1100 1100 0011 */
- {illegal,0 }, /* c4: 0100 1100 1100 0100 */
+ {illegal,0 }, /* c4: 0100 1100 1100 0100 */
{MOV,"A,PF" }, /* c5: 0100 1100 1100 0101 */
{MOV,"A,MKH" }, /* c6: 0100 1100 1100 0110 */
{MOV,"A,MKL" }, /* c7: 0100 1100 1100 0111 */
{illegal,0 }, /* c8: 0100 1100 1100 1000 */
{MOV,"A,SMH" }, /* c9: 0100 1100 1100 1001 */
- {illegal,0 }, /* ca: 0100 1100 1100 1010 */
+ {illegal,0 }, /* ca: 0100 1100 1100 1010 */
{MOV,"A,EOM" }, /* cb: 0100 1100 1100 1011 */
- {illegal,0 }, /* cc: 0100 1100 1100 1100 */
+ {illegal,0 }, /* cc: 0100 1100 1100 1100 */
{MOV,"A,TMM" }, /* cd: 0100 1100 1100 1101 */
- {MOV,"A,PT" }, /* ce: 0100 1100 1100 1110 */ /* 7807 */
- {illegal,0 }, /* cf: 0100 1100 1100 1111 */
-
- {illegal,0 }, /* d0: 0100 1100 1101 0000 */
- {illegal,0 }, /* d1: 0100 1100 1101 0001 */
- {illegal,0 }, /* d2: 0100 1100 1101 0010 */
- {illegal,0 }, /* d3: 0100 1100 1101 0011 */
- {illegal,0 }, /* d4: 0100 1100 1101 0100 */
- {illegal,0 }, /* d5: 0100 1100 1101 0101 */
- {illegal,0 }, /* d6: 0100 1100 1101 0110 */
- {illegal,0 }, /* d7: 0100 1100 1101 0111 */
- {illegal,0 }, /* d8: 0100 1100 1101 1000 */
+ {MOV,"A,PT" }, /* ce: 0100 1100 1100 1110 */ /* 7807 */
+ {illegal,0 }, /* cf: 0100 1100 1100 1111 */
+
+ {illegal,0 }, /* d0: 0100 1100 1101 0000 */
+ {illegal,0 }, /* d1: 0100 1100 1101 0001 */
+ {illegal,0 }, /* d2: 0100 1100 1101 0010 */
+ {illegal,0 }, /* d3: 0100 1100 1101 0011 */
+ {illegal,0 }, /* d4: 0100 1100 1101 0100 */
+ {illegal,0 }, /* d5: 0100 1100 1101 0101 */
+ {illegal,0 }, /* d6: 0100 1100 1101 0110 */
+ {illegal,0 }, /* d7: 0100 1100 1101 0111 */
+ {illegal,0 }, /* d8: 0100 1100 1101 1000 */
{MOV,"A,RXB" }, /* d9: 0100 1100 1101 1001 */
- {illegal,0 }, /* da: 0100 1100 1101 1010 */
- {illegal,0 }, /* db: 0100 1100 1101 1011 */
- {illegal,0 }, /* dc: 0100 1100 1101 1100 */
- {illegal,0 }, /* dd: 0100 1100 1101 1101 */
- {illegal,0 }, /* de: 0100 1100 1101 1110 */
- {illegal,0 }, /* df: 0100 1100 1101 1111 */
-
- {illegal,0 }, /* e0: 0100 1100 1110 0000 */
- {illegal,0 }, /* e1: 0100 1100 1110 0001 */
- {illegal,0 }, /* e2: 0100 1100 1110 0010 */
- {illegal,0 }, /* e3: 0100 1100 1110 0011 */
- {illegal,0 }, /* e4: 0100 1100 1110 0100 */
- {illegal,0 }, /* e5: 0100 1100 1110 0101 */
- {illegal,0 }, /* e6: 0100 1100 1110 0110 */
- {illegal,0 }, /* e7: 0100 1100 1110 0111 */
- {illegal,0 }, /* e8: 0100 1100 1110 1000 */
- {illegal,0 }, /* e9: 0100 1100 1110 1001 */
- {illegal,0 }, /* ea: 0100 1100 1110 1010 */
- {illegal,0 }, /* eb: 0100 1100 1110 1011 */
- {illegal,0 }, /* ec: 0100 1100 1110 1100 */
- {illegal,0 }, /* ed: 0100 1100 1110 1101 */
- {illegal,0 }, /* ee: 0100 1100 1110 1110 */
- {illegal,0 }, /* ef: 0100 1100 1110 1111 */
-
- {illegal,0 }, /* f0: 0100 1100 1111 0000 */
- {illegal,0 }, /* f1: 0100 1100 1111 0001 */
- {illegal,0 }, /* f2: 0100 1100 1111 0010 */
- {illegal,0 }, /* f3: 0100 1100 1111 0011 */
- {illegal,0 }, /* f4: 0100 1100 1111 0100 */
- {illegal,0 }, /* f5: 0100 1100 1111 0101 */
- {illegal,0 }, /* f6: 0100 1100 1111 0110 */
- {illegal,0 }, /* f7: 0100 1100 1111 0111 */
- {illegal,0 }, /* f8: 0100 1100 1111 1000 */
- {illegal,0 }, /* f9: 0100 1100 1111 1001 */
- {illegal,0 }, /* fa: 0100 1100 1111 1010 */
- {illegal,0 }, /* fb: 0100 1100 1111 1011 */
- {illegal,0 }, /* fc: 0100 1100 1111 1100 */
- {illegal,0 }, /* fd: 0100 1100 1111 1101 */
- {illegal,0 }, /* fe: 0100 1100 1111 1110 */
- {illegal,0 } /* ff: 0100 1100 1111 1111 */
+ {illegal,0 }, /* da: 0100 1100 1101 1010 */
+ {illegal,0 }, /* db: 0100 1100 1101 1011 */
+ {illegal,0 }, /* dc: 0100 1100 1101 1100 */
+ {illegal,0 }, /* dd: 0100 1100 1101 1101 */
+ {illegal,0 }, /* de: 0100 1100 1101 1110 */
+ {illegal,0 }, /* df: 0100 1100 1101 1111 */
+
+ {illegal,0 }, /* e0: 0100 1100 1110 0000 */
+ {illegal,0 }, /* e1: 0100 1100 1110 0001 */
+ {illegal,0 }, /* e2: 0100 1100 1110 0010 */
+ {illegal,0 }, /* e3: 0100 1100 1110 0011 */
+ {illegal,0 }, /* e4: 0100 1100 1110 0100 */
+ {illegal,0 }, /* e5: 0100 1100 1110 0101 */
+ {illegal,0 }, /* e6: 0100 1100 1110 0110 */
+ {illegal,0 }, /* e7: 0100 1100 1110 0111 */
+ {illegal,0 }, /* e8: 0100 1100 1110 1000 */
+ {illegal,0 }, /* e9: 0100 1100 1110 1001 */
+ {illegal,0 }, /* ea: 0100 1100 1110 1010 */
+ {illegal,0 }, /* eb: 0100 1100 1110 1011 */
+ {illegal,0 }, /* ec: 0100 1100 1110 1100 */
+ {illegal,0 }, /* ed: 0100 1100 1110 1101 */
+ {illegal,0 }, /* ee: 0100 1100 1110 1110 */
+ {illegal,0 }, /* ef: 0100 1100 1110 1111 */
+
+ {illegal,0 }, /* f0: 0100 1100 1111 0000 */
+ {illegal,0 }, /* f1: 0100 1100 1111 0001 */
+ {illegal,0 }, /* f2: 0100 1100 1111 0010 */
+ {illegal,0 }, /* f3: 0100 1100 1111 0011 */
+ {illegal,0 }, /* f4: 0100 1100 1111 0100 */
+ {illegal,0 }, /* f5: 0100 1100 1111 0101 */
+ {illegal,0 }, /* f6: 0100 1100 1111 0110 */
+ {illegal,0 }, /* f7: 0100 1100 1111 0111 */
+ {illegal,0 }, /* f8: 0100 1100 1111 1000 */
+ {illegal,0 }, /* f9: 0100 1100 1111 1001 */
+ {illegal,0 }, /* fa: 0100 1100 1111 1010 */
+ {illegal,0 }, /* fb: 0100 1100 1111 1011 */
+ {illegal,0 }, /* fc: 0100 1100 1111 1100 */
+ {illegal,0 }, /* fd: 0100 1100 1111 1101 */
+ {illegal,0 }, /* fe: 0100 1100 1111 1110 */
+ {illegal,0 } /* ff: 0100 1100 1111 1111 */
};
/* prefix 4D */
static const struct dasm_s dasm4D_7810[256] =
{
- {illegal,0 }, /* 00: 0100 1101 0000 0000 */
- {illegal,0 }, /* 01: 0100 1101 0000 0001 */
- {illegal,0 }, /* 02: 0100 1101 0000 0010 */
- {illegal,0 }, /* 03: 0100 1101 0000 0011 */
- {illegal,0 }, /* 04: 0100 1101 0000 0100 */
- {illegal,0 }, /* 05: 0100 1101 0000 0101 */
- {illegal,0 }, /* 06: 0100 1101 0000 0110 */
- {illegal,0 }, /* 07: 0100 1101 0000 0111 */
- {illegal,0 }, /* 08: 0100 1101 0000 1000 */
- {illegal,0 }, /* 09: 0100 1101 0000 1001 */
- {illegal,0 }, /* 0a: 0100 1101 0000 1010 */
- {illegal,0 }, /* 0b: 0100 1101 0000 1011 */
- {illegal,0 }, /* 0c: 0100 1101 0000 1100 */
- {illegal,0 }, /* 0d: 0100 1101 0000 1101 */
- {illegal,0 }, /* 0e: 0100 1101 0000 1110 */
- {illegal,0 }, /* 0f: 0100 1101 0000 1111 */
-
- {illegal,0 }, /* 10: 0100 1101 0001 0000 */
- {illegal,0 }, /* 11: 0100 1101 0001 0001 */
- {illegal,0 }, /* 12: 0100 1101 0001 0010 */
- {illegal,0 }, /* 13: 0100 1101 0001 0011 */
- {illegal,0 }, /* 14: 0100 1101 0001 0100 */
- {illegal,0 }, /* 15: 0100 1101 0001 0101 */
- {illegal,0 }, /* 16: 0100 1101 0001 0110 */
- {illegal,0 }, /* 17: 0100 1101 0001 0111 */
- {illegal,0 }, /* 18: 0100 1101 0001 1000 */
- {illegal,0 }, /* 19: 0100 1101 0001 1001 */
- {illegal,0 }, /* 1a: 0100 1101 0001 1010 */
- {illegal,0 }, /* 1b: 0100 1101 0001 1011 */
- {illegal,0 }, /* 1c: 0100 1101 0001 1100 */
- {illegal,0 }, /* 1d: 0100 1101 0001 1101 */
- {illegal,0 }, /* 1e: 0100 1101 0001 1110 */
- {illegal,0 }, /* 1f: 0100 1101 0001 1111 */
-
- {illegal,0 }, /* 20: 0100 1101 0010 0000 */
- {illegal,0 }, /* 21: 0100 1101 0010 0001 */
- {illegal,0 }, /* 22: 0100 1101 0010 0010 */
- {illegal,0 }, /* 23: 0100 1101 0010 0011 */
- {illegal,0 }, /* 24: 0100 1101 0010 0100 */
- {illegal,0 }, /* 25: 0100 1101 0010 0101 */
- {illegal,0 }, /* 26: 0100 1101 0010 0110 */
- {illegal,0 }, /* 27: 0100 1101 0010 0111 */
- {illegal,0 }, /* 28: 0100 1101 0010 1000 */
- {illegal,0 }, /* 29: 0100 1101 0010 1001 */
- {illegal,0 }, /* 2a: 0100 1101 0010 1010 */
- {illegal,0 }, /* 2b: 0100 1101 0010 1011 */
- {illegal,0 }, /* 2c: 0100 1101 0010 1100 */
- {illegal,0 }, /* 2d: 0100 1101 0010 1101 */
- {illegal,0 }, /* 2e: 0100 1101 0010 1110 */
- {illegal,0 }, /* 2f: 0100 1101 0010 1111 */
-
- {illegal,0 }, /* 30: 0100 1101 0011 0000 */
- {illegal,0 }, /* 31: 0100 1101 0011 0001 */
- {illegal,0 }, /* 32: 0100 1101 0011 0010 */
- {illegal,0 }, /* 33: 0100 1101 0011 0011 */
- {illegal,0 }, /* 34: 0100 1101 0011 0100 */
- {illegal,0 }, /* 35: 0100 1101 0011 0101 */
- {illegal,0 }, /* 36: 0100 1101 0011 0110 */
- {illegal,0 }, /* 37: 0100 1101 0011 0111 */
- {illegal,0 }, /* 38: 0100 1101 0011 1000 */
- {illegal,0 }, /* 39: 0100 1101 0011 1001 */
- {illegal,0 }, /* 3a: 0100 1101 0011 1010 */
- {illegal,0 }, /* 3b: 0100 1101 0011 1011 */
- {illegal,0 }, /* 3c: 0100 1101 0011 1100 */
- {illegal,0 }, /* 3d: 0100 1101 0011 1101 */
- {illegal,0 }, /* 3e: 0100 1101 0011 1110 */
- {illegal,0 }, /* 3f: 0100 1101 0011 1111 */
-
- {illegal,0 }, /* 40: 0100 1101 0100 0000 */
- {illegal,0 }, /* 41: 0100 1101 0100 0001 */
- {illegal,0 }, /* 42: 0100 1101 0100 0010 */
- {illegal,0 }, /* 43: 0100 1101 0100 0011 */
- {illegal,0 }, /* 44: 0100 1101 0100 0100 */
- {illegal,0 }, /* 45: 0100 1101 0100 0101 */
- {illegal,0 }, /* 46: 0100 1101 0100 0110 */
- {illegal,0 }, /* 47: 0100 1101 0100 0111 */
- {illegal,0 }, /* 48: 0100 1101 0100 1000 */
- {illegal,0 }, /* 49: 0100 1101 0100 1001 */
- {illegal,0 }, /* 4a: 0100 1101 0100 1010 */
- {illegal,0 }, /* 4b: 0100 1101 0100 1011 */
- {illegal,0 }, /* 4c: 0100 1101 0100 1100 */
- {illegal,0 }, /* 4d: 0100 1101 0100 1101 */
- {illegal,0 }, /* 4e: 0100 1101 0100 1110 */
- {illegal,0 }, /* 4f: 0100 1101 0100 1111 */
-
- {illegal,0 }, /* 50: 0100 1101 0101 0000 */
- {illegal,0 }, /* 51: 0100 1101 0101 0001 */
- {illegal,0 }, /* 52: 0100 1101 0101 0010 */
- {illegal,0 }, /* 53: 0100 1101 0101 0011 */
- {illegal,0 }, /* 54: 0100 1101 0101 0100 */
- {illegal,0 }, /* 55: 0100 1101 0101 0101 */
- {illegal,0 }, /* 56: 0100 1101 0101 0110 */
- {illegal,0 }, /* 57: 0100 1101 0101 0111 */
- {illegal,0 }, /* 58: 0100 1101 0101 1000 */
- {illegal,0 }, /* 59: 0100 1101 0101 1001 */
- {illegal,0 }, /* 5a: 0100 1101 0101 1010 */
- {illegal,0 }, /* 5b: 0100 1101 0101 1011 */
- {illegal,0 }, /* 5c: 0100 1101 0101 1100 */
- {illegal,0 }, /* 5d: 0100 1101 0101 1101 */
- {illegal,0 }, /* 5e: 0100 1101 0101 1110 */
- {illegal,0 }, /* 5f: 0100 1101 0101 1111 */
-
- {illegal,0 }, /* 60: 0100 1101 0110 0000 */
- {illegal,0 }, /* 61: 0100 1101 0110 0001 */
- {illegal,0 }, /* 62: 0100 1101 0110 0010 */
- {illegal,0 }, /* 63: 0100 1101 0110 0011 */
- {illegal,0 }, /* 64: 0100 1101 0110 0100 */
- {illegal,0 }, /* 65: 0100 1101 0110 0101 */
- {illegal,0 }, /* 66: 0100 1101 0110 0110 */
- {illegal,0 }, /* 67: 0100 1101 0110 0111 */
- {illegal,0 }, /* 68: 0100 1101 0110 1000 */
- {illegal,0 }, /* 69: 0100 1101 0110 1001 */
- {illegal,0 }, /* 6a: 0100 1101 0110 1010 */
- {illegal,0 }, /* 6b: 0100 1101 0110 1011 */
- {illegal,0 }, /* 6c: 0100 1101 0110 1100 */
- {illegal,0 }, /* 6d: 0100 1101 0110 1101 */
- {illegal,0 }, /* 6e: 0100 1101 0110 1110 */
- {illegal,0 }, /* 6f: 0100 1101 0110 1111 */
-
- {illegal,0 }, /* 70: 0100 1101 0111 0000 */
- {illegal,0 }, /* 71: 0100 1101 0111 0001 */
- {illegal,0 }, /* 72: 0100 1101 0111 0010 */
- {illegal,0 }, /* 73: 0100 1101 0111 0011 */
- {illegal,0 }, /* 74: 0100 1101 0111 0100 */
- {illegal,0 }, /* 75: 0100 1101 0111 0101 */
- {illegal,0 }, /* 76: 0100 1101 0111 0110 */
- {illegal,0 }, /* 77: 0100 1101 0111 0111 */
- {illegal,0 }, /* 78: 0100 1101 0111 1000 */
- {illegal,0 }, /* 79: 0100 1101 0111 1001 */
- {illegal,0 }, /* 7a: 0100 1101 0111 1010 */
- {illegal,0 }, /* 7b: 0100 1101 0111 1011 */
- {illegal,0 }, /* 7c: 0100 1101 0111 1100 */
- {illegal,0 }, /* 7d: 0100 1101 0111 1101 */
- {illegal,0 }, /* 7e: 0100 1101 0111 1110 */
- {illegal,0 }, /* 7f: 0100 1101 0111 1111 */
-
- {illegal,0 }, /* 80: 0100 1101 1000 0000 */
- {illegal,0 }, /* 81: 0100 1101 1000 0001 */
- {illegal,0 }, /* 82: 0100 1101 1000 0010 */
- {illegal,0 }, /* 83: 0100 1101 1000 0011 */
- {illegal,0 }, /* 84: 0100 1101 1000 0100 */
- {illegal,0 }, /* 85: 0100 1101 1000 0101 */
- {illegal,0 }, /* 86: 0100 1101 1000 0110 */
- {illegal,0 }, /* 87: 0100 1101 1000 0111 */
- {illegal,0 }, /* 88: 0100 1101 1000 1000 */
- {illegal,0 }, /* 89: 0100 1101 1000 1001 */
- {illegal,0 }, /* 8a: 0100 1101 1000 1010 */
- {illegal,0 }, /* 8b: 0100 1101 1000 1011 */
- {illegal,0 }, /* 8c: 0100 1101 1000 1100 */
- {illegal,0 }, /* 8d: 0100 1101 1000 1101 */
- {illegal,0 }, /* 8e: 0100 1101 1000 1110 */
- {illegal,0 }, /* 8f: 0100 1101 1000 1111 */
-
- {illegal,0 }, /* 90: 0100 1101 1001 0000 */
- {illegal,0 }, /* 91: 0100 1101 1001 0001 */
- {illegal,0 }, /* 92: 0100 1101 1001 0010 */
- {illegal,0 }, /* 93: 0100 1101 1001 0011 */
- {illegal,0 }, /* 94: 0100 1101 1001 0100 */
- {illegal,0 }, /* 95: 0100 1101 1001 0101 */
- {illegal,0 }, /* 96: 0100 1101 1001 0110 */
- {illegal,0 }, /* 97: 0100 1101 1001 0111 */
- {illegal,0 }, /* 98: 0100 1101 1001 1000 */
- {illegal,0 }, /* 99: 0100 1101 1001 1001 */
- {illegal,0 }, /* 9a: 0100 1101 1001 1010 */
- {illegal,0 }, /* 9b: 0100 1101 1001 1011 */
- {illegal,0 }, /* 9c: 0100 1101 1001 1100 */
- {illegal,0 }, /* 9d: 0100 1101 1001 1101 */
- {illegal,0 }, /* 9e: 0100 1101 1001 1110 */
- {illegal,0 }, /* 9f: 0100 1101 1001 1111 */
-
- {illegal,0 }, /* a0: 0100 1101 1010 0000 */
- {illegal,0 }, /* a1: 0100 1101 1010 0001 */
- {illegal,0 }, /* a2: 0100 1101 1010 0010 */
- {illegal,0 }, /* a3: 0100 1101 1010 0011 */
- {illegal,0 }, /* a4: 0100 1101 1010 0100 */
- {illegal,0 }, /* a5: 0100 1101 1010 0101 */
- {illegal,0 }, /* a6: 0100 1101 1010 0110 */
- {illegal,0 }, /* a7: 0100 1101 1010 0111 */
- {illegal,0 }, /* a8: 0100 1101 1010 1000 */
- {illegal,0 }, /* a9: 0100 1101 1010 1001 */
- {illegal,0 }, /* aa: 0100 1101 1010 1010 */
- {illegal,0 }, /* ab: 0100 1101 1010 1011 */
- {illegal,0 }, /* ac: 0100 1101 1010 1100 */
- {illegal,0 }, /* ad: 0100 1101 1010 1101 */
- {illegal,0 }, /* ae: 0100 1101 1010 1110 */
- {illegal,0 }, /* af: 0100 1101 1010 1111 */
-
- {illegal,0 }, /* b0: 0100 1101 1011 0000 */
- {illegal,0 }, /* b1: 0100 1101 1011 0001 */
- {illegal,0 }, /* b2: 0100 1101 1011 0010 */
- {illegal,0 }, /* b3: 0100 1101 1011 0011 */
- {illegal,0 }, /* b4: 0100 1101 1011 0100 */
- {illegal,0 }, /* b5: 0100 1101 1011 0101 */
- {illegal,0 }, /* b6: 0100 1101 1011 0110 */
- {illegal,0 }, /* b7: 0100 1101 1011 0111 */
- {illegal,0 }, /* b8: 0100 1101 1011 1000 */
- {illegal,0 }, /* b9: 0100 1101 1011 1001 */
- {illegal,0 }, /* ba: 0100 1101 1011 1010 */
- {illegal,0 }, /* bb: 0100 1101 1011 1011 */
- {illegal,0 }, /* bc: 0100 1101 1011 1100 */
- {illegal,0 }, /* bd: 0100 1101 1011 1101 */
- {illegal,0 }, /* be: 0100 1101 1011 1110 */
- {illegal,0 }, /* bf: 0100 1101 1011 1111 */
+ {illegal,0 }, /* 00: 0100 1101 0000 0000 */
+ {illegal,0 }, /* 01: 0100 1101 0000 0001 */
+ {illegal,0 }, /* 02: 0100 1101 0000 0010 */
+ {illegal,0 }, /* 03: 0100 1101 0000 0011 */
+ {illegal,0 }, /* 04: 0100 1101 0000 0100 */
+ {illegal,0 }, /* 05: 0100 1101 0000 0101 */
+ {illegal,0 }, /* 06: 0100 1101 0000 0110 */
+ {illegal,0 }, /* 07: 0100 1101 0000 0111 */
+ {illegal,0 }, /* 08: 0100 1101 0000 1000 */
+ {illegal,0 }, /* 09: 0100 1101 0000 1001 */
+ {illegal,0 }, /* 0a: 0100 1101 0000 1010 */
+ {illegal,0 }, /* 0b: 0100 1101 0000 1011 */
+ {illegal,0 }, /* 0c: 0100 1101 0000 1100 */
+ {illegal,0 }, /* 0d: 0100 1101 0000 1101 */
+ {illegal,0 }, /* 0e: 0100 1101 0000 1110 */
+ {illegal,0 }, /* 0f: 0100 1101 0000 1111 */
+
+ {illegal,0 }, /* 10: 0100 1101 0001 0000 */
+ {illegal,0 }, /* 11: 0100 1101 0001 0001 */
+ {illegal,0 }, /* 12: 0100 1101 0001 0010 */
+ {illegal,0 }, /* 13: 0100 1101 0001 0011 */
+ {illegal,0 }, /* 14: 0100 1101 0001 0100 */
+ {illegal,0 }, /* 15: 0100 1101 0001 0101 */
+ {illegal,0 }, /* 16: 0100 1101 0001 0110 */
+ {illegal,0 }, /* 17: 0100 1101 0001 0111 */
+ {illegal,0 }, /* 18: 0100 1101 0001 1000 */
+ {illegal,0 }, /* 19: 0100 1101 0001 1001 */
+ {illegal,0 }, /* 1a: 0100 1101 0001 1010 */
+ {illegal,0 }, /* 1b: 0100 1101 0001 1011 */
+ {illegal,0 }, /* 1c: 0100 1101 0001 1100 */
+ {illegal,0 }, /* 1d: 0100 1101 0001 1101 */
+ {illegal,0 }, /* 1e: 0100 1101 0001 1110 */
+ {illegal,0 }, /* 1f: 0100 1101 0001 1111 */
+
+ {illegal,0 }, /* 20: 0100 1101 0010 0000 */
+ {illegal,0 }, /* 21: 0100 1101 0010 0001 */
+ {illegal,0 }, /* 22: 0100 1101 0010 0010 */
+ {illegal,0 }, /* 23: 0100 1101 0010 0011 */
+ {illegal,0 }, /* 24: 0100 1101 0010 0100 */
+ {illegal,0 }, /* 25: 0100 1101 0010 0101 */
+ {illegal,0 }, /* 26: 0100 1101 0010 0110 */
+ {illegal,0 }, /* 27: 0100 1101 0010 0111 */
+ {illegal,0 }, /* 28: 0100 1101 0010 1000 */
+ {illegal,0 }, /* 29: 0100 1101 0010 1001 */
+ {illegal,0 }, /* 2a: 0100 1101 0010 1010 */
+ {illegal,0 }, /* 2b: 0100 1101 0010 1011 */
+ {illegal,0 }, /* 2c: 0100 1101 0010 1100 */
+ {illegal,0 }, /* 2d: 0100 1101 0010 1101 */
+ {illegal,0 }, /* 2e: 0100 1101 0010 1110 */
+ {illegal,0 }, /* 2f: 0100 1101 0010 1111 */
+
+ {illegal,0 }, /* 30: 0100 1101 0011 0000 */
+ {illegal,0 }, /* 31: 0100 1101 0011 0001 */
+ {illegal,0 }, /* 32: 0100 1101 0011 0010 */
+ {illegal,0 }, /* 33: 0100 1101 0011 0011 */
+ {illegal,0 }, /* 34: 0100 1101 0011 0100 */
+ {illegal,0 }, /* 35: 0100 1101 0011 0101 */
+ {illegal,0 }, /* 36: 0100 1101 0011 0110 */
+ {illegal,0 }, /* 37: 0100 1101 0011 0111 */
+ {illegal,0 }, /* 38: 0100 1101 0011 1000 */
+ {illegal,0 }, /* 39: 0100 1101 0011 1001 */
+ {illegal,0 }, /* 3a: 0100 1101 0011 1010 */
+ {illegal,0 }, /* 3b: 0100 1101 0011 1011 */
+ {illegal,0 }, /* 3c: 0100 1101 0011 1100 */
+ {illegal,0 }, /* 3d: 0100 1101 0011 1101 */
+ {illegal,0 }, /* 3e: 0100 1101 0011 1110 */
+ {illegal,0 }, /* 3f: 0100 1101 0011 1111 */
+
+ {illegal,0 }, /* 40: 0100 1101 0100 0000 */
+ {illegal,0 }, /* 41: 0100 1101 0100 0001 */
+ {illegal,0 }, /* 42: 0100 1101 0100 0010 */
+ {illegal,0 }, /* 43: 0100 1101 0100 0011 */
+ {illegal,0 }, /* 44: 0100 1101 0100 0100 */
+ {illegal,0 }, /* 45: 0100 1101 0100 0101 */
+ {illegal,0 }, /* 46: 0100 1101 0100 0110 */
+ {illegal,0 }, /* 47: 0100 1101 0100 0111 */
+ {illegal,0 }, /* 48: 0100 1101 0100 1000 */
+ {illegal,0 }, /* 49: 0100 1101 0100 1001 */
+ {illegal,0 }, /* 4a: 0100 1101 0100 1010 */
+ {illegal,0 }, /* 4b: 0100 1101 0100 1011 */
+ {illegal,0 }, /* 4c: 0100 1101 0100 1100 */
+ {illegal,0 }, /* 4d: 0100 1101 0100 1101 */
+ {illegal,0 }, /* 4e: 0100 1101 0100 1110 */
+ {illegal,0 }, /* 4f: 0100 1101 0100 1111 */
+
+ {illegal,0 }, /* 50: 0100 1101 0101 0000 */
+ {illegal,0 }, /* 51: 0100 1101 0101 0001 */
+ {illegal,0 }, /* 52: 0100 1101 0101 0010 */
+ {illegal,0 }, /* 53: 0100 1101 0101 0011 */
+ {illegal,0 }, /* 54: 0100 1101 0101 0100 */
+ {illegal,0 }, /* 55: 0100 1101 0101 0101 */
+ {illegal,0 }, /* 56: 0100 1101 0101 0110 */
+ {illegal,0 }, /* 57: 0100 1101 0101 0111 */
+ {illegal,0 }, /* 58: 0100 1101 0101 1000 */
+ {illegal,0 }, /* 59: 0100 1101 0101 1001 */
+ {illegal,0 }, /* 5a: 0100 1101 0101 1010 */
+ {illegal,0 }, /* 5b: 0100 1101 0101 1011 */
+ {illegal,0 }, /* 5c: 0100 1101 0101 1100 */
+ {illegal,0 }, /* 5d: 0100 1101 0101 1101 */
+ {illegal,0 }, /* 5e: 0100 1101 0101 1110 */
+ {illegal,0 }, /* 5f: 0100 1101 0101 1111 */
+
+ {illegal,0 }, /* 60: 0100 1101 0110 0000 */
+ {illegal,0 }, /* 61: 0100 1101 0110 0001 */
+ {illegal,0 }, /* 62: 0100 1101 0110 0010 */
+ {illegal,0 }, /* 63: 0100 1101 0110 0011 */
+ {illegal,0 }, /* 64: 0100 1101 0110 0100 */
+ {illegal,0 }, /* 65: 0100 1101 0110 0101 */
+ {illegal,0 }, /* 66: 0100 1101 0110 0110 */
+ {illegal,0 }, /* 67: 0100 1101 0110 0111 */
+ {illegal,0 }, /* 68: 0100 1101 0110 1000 */
+ {illegal,0 }, /* 69: 0100 1101 0110 1001 */
+ {illegal,0 }, /* 6a: 0100 1101 0110 1010 */
+ {illegal,0 }, /* 6b: 0100 1101 0110 1011 */
+ {illegal,0 }, /* 6c: 0100 1101 0110 1100 */
+ {illegal,0 }, /* 6d: 0100 1101 0110 1101 */
+ {illegal,0 }, /* 6e: 0100 1101 0110 1110 */
+ {illegal,0 }, /* 6f: 0100 1101 0110 1111 */
+
+ {illegal,0 }, /* 70: 0100 1101 0111 0000 */
+ {illegal,0 }, /* 71: 0100 1101 0111 0001 */
+ {illegal,0 }, /* 72: 0100 1101 0111 0010 */
+ {illegal,0 }, /* 73: 0100 1101 0111 0011 */
+ {illegal,0 }, /* 74: 0100 1101 0111 0100 */
+ {illegal,0 }, /* 75: 0100 1101 0111 0101 */
+ {illegal,0 }, /* 76: 0100 1101 0111 0110 */
+ {illegal,0 }, /* 77: 0100 1101 0111 0111 */
+ {illegal,0 }, /* 78: 0100 1101 0111 1000 */
+ {illegal,0 }, /* 79: 0100 1101 0111 1001 */
+ {illegal,0 }, /* 7a: 0100 1101 0111 1010 */
+ {illegal,0 }, /* 7b: 0100 1101 0111 1011 */
+ {illegal,0 }, /* 7c: 0100 1101 0111 1100 */
+ {illegal,0 }, /* 7d: 0100 1101 0111 1101 */
+ {illegal,0 }, /* 7e: 0100 1101 0111 1110 */
+ {illegal,0 }, /* 7f: 0100 1101 0111 1111 */
+
+ {illegal,0 }, /* 80: 0100 1101 1000 0000 */
+ {illegal,0 }, /* 81: 0100 1101 1000 0001 */
+ {illegal,0 }, /* 82: 0100 1101 1000 0010 */
+ {illegal,0 }, /* 83: 0100 1101 1000 0011 */
+ {illegal,0 }, /* 84: 0100 1101 1000 0100 */
+ {illegal,0 }, /* 85: 0100 1101 1000 0101 */
+ {illegal,0 }, /* 86: 0100 1101 1000 0110 */
+ {illegal,0 }, /* 87: 0100 1101 1000 0111 */
+ {illegal,0 }, /* 88: 0100 1101 1000 1000 */
+ {illegal,0 }, /* 89: 0100 1101 1000 1001 */
+ {illegal,0 }, /* 8a: 0100 1101 1000 1010 */
+ {illegal,0 }, /* 8b: 0100 1101 1000 1011 */
+ {illegal,0 }, /* 8c: 0100 1101 1000 1100 */
+ {illegal,0 }, /* 8d: 0100 1101 1000 1101 */
+ {illegal,0 }, /* 8e: 0100 1101 1000 1110 */
+ {illegal,0 }, /* 8f: 0100 1101 1000 1111 */
+
+ {illegal,0 }, /* 90: 0100 1101 1001 0000 */
+ {illegal,0 }, /* 91: 0100 1101 1001 0001 */
+ {illegal,0 }, /* 92: 0100 1101 1001 0010 */
+ {illegal,0 }, /* 93: 0100 1101 1001 0011 */
+ {illegal,0 }, /* 94: 0100 1101 1001 0100 */
+ {illegal,0 }, /* 95: 0100 1101 1001 0101 */
+ {illegal,0 }, /* 96: 0100 1101 1001 0110 */
+ {illegal,0 }, /* 97: 0100 1101 1001 0111 */
+ {illegal,0 }, /* 98: 0100 1101 1001 1000 */
+ {illegal,0 }, /* 99: 0100 1101 1001 1001 */
+ {illegal,0 }, /* 9a: 0100 1101 1001 1010 */
+ {illegal,0 }, /* 9b: 0100 1101 1001 1011 */
+ {illegal,0 }, /* 9c: 0100 1101 1001 1100 */
+ {illegal,0 }, /* 9d: 0100 1101 1001 1101 */
+ {illegal,0 }, /* 9e: 0100 1101 1001 1110 */
+ {illegal,0 }, /* 9f: 0100 1101 1001 1111 */
+
+ {illegal,0 }, /* a0: 0100 1101 1010 0000 */
+ {illegal,0 }, /* a1: 0100 1101 1010 0001 */
+ {illegal,0 }, /* a2: 0100 1101 1010 0010 */
+ {illegal,0 }, /* a3: 0100 1101 1010 0011 */
+ {illegal,0 }, /* a4: 0100 1101 1010 0100 */
+ {illegal,0 }, /* a5: 0100 1101 1010 0101 */
+ {illegal,0 }, /* a6: 0100 1101 1010 0110 */
+ {illegal,0 }, /* a7: 0100 1101 1010 0111 */
+ {illegal,0 }, /* a8: 0100 1101 1010 1000 */
+ {illegal,0 }, /* a9: 0100 1101 1010 1001 */
+ {illegal,0 }, /* aa: 0100 1101 1010 1010 */
+ {illegal,0 }, /* ab: 0100 1101 1010 1011 */
+ {illegal,0 }, /* ac: 0100 1101 1010 1100 */
+ {illegal,0 }, /* ad: 0100 1101 1010 1101 */
+ {illegal,0 }, /* ae: 0100 1101 1010 1110 */
+ {illegal,0 }, /* af: 0100 1101 1010 1111 */
+
+ {illegal,0 }, /* b0: 0100 1101 1011 0000 */
+ {illegal,0 }, /* b1: 0100 1101 1011 0001 */
+ {illegal,0 }, /* b2: 0100 1101 1011 0010 */
+ {illegal,0 }, /* b3: 0100 1101 1011 0011 */
+ {illegal,0 }, /* b4: 0100 1101 1011 0100 */
+ {illegal,0 }, /* b5: 0100 1101 1011 0101 */
+ {illegal,0 }, /* b6: 0100 1101 1011 0110 */
+ {illegal,0 }, /* b7: 0100 1101 1011 0111 */
+ {illegal,0 }, /* b8: 0100 1101 1011 1000 */
+ {illegal,0 }, /* b9: 0100 1101 1011 1001 */
+ {illegal,0 }, /* ba: 0100 1101 1011 1010 */
+ {illegal,0 }, /* bb: 0100 1101 1011 1011 */
+ {illegal,0 }, /* bc: 0100 1101 1011 1100 */
+ {illegal,0 }, /* bd: 0100 1101 1011 1101 */
+ {illegal,0 }, /* be: 0100 1101 1011 1110 */
+ {illegal,0 }, /* bf: 0100 1101 1011 1111 */
{MOV,"PA,A" }, /* c0: 0100 1101 1100 0000 */
{MOV,"PB,A" }, /* c1: 0100 1101 1100 0001 */
{MOV,"PC,A" }, /* c2: 0100 1101 1100 0010 */
{MOV,"PD,A" }, /* c3: 0100 1101 1100 0011 */
- {illegal,0 }, /* c4: 0100 1101 1100 0100 */
+ {illegal,0 }, /* c4: 0100 1101 1100 0100 */
{MOV,"PF,A" }, /* c5: 0100 1101 1100 0101 */
{MOV,"MKH,A" }, /* c6: 0100 1101 1100 0110 */
{MOV,"MKL,A" }, /* c7: 0100 1101 1100 0111 */
- {MOV,"ANM,A" }, /* c8: 0100 1101 1100 1000 */ /* 7810 */
+ {MOV,"ANM,A" }, /* c8: 0100 1101 1100 1000 */ /* 7810 */
{MOV,"SMH,A" }, /* c9: 0100 1101 1100 1001 */
{MOV,"SML,A" }, /* ca: 0100 1101 1100 1010 */
{MOV,"EOM,A" }, /* cb: 0100 1101 1100 1011 */
{MOV,"ETMM,A" }, /* cc: 0100 1101 1100 1100 */
{MOV,"TMM,A" }, /* cd: 0100 1101 1100 1101 */
- {illegal,0 }, /* ce: 0100 1101 1100 1110 */
- {illegal,0 }, /* cf: 0100 1101 1100 1111 */
+ {illegal,0 }, /* ce: 0100 1101 1100 1110 */
+ {illegal,0 }, /* cf: 0100 1101 1100 1111 */
{MOV,"MM,A" }, /* d0: 0100 1101 1101 0000 */
{MOV,"MCC,A" }, /* d1: 0100 1101 1101 0001 */
{MOV,"MA,A" }, /* d2: 0100 1101 1101 0010 */
{MOV,"MB,A" }, /* d3: 0100 1101 1101 0011 */
{MOV,"MC,A" }, /* d4: 0100 1101 1101 0100 */
- {illegal,0 }, /* d5: 0100 1101 1101 0101 */
- {illegal,0 }, /* d6: 0100 1101 1101 0110 */
+ {illegal,0 }, /* d5: 0100 1101 1101 0101 */
+ {illegal,0 }, /* d6: 0100 1101 1101 0110 */
{MOV,"MF,A" }, /* d7: 0100 1101 1101 0111 */
{MOV,"TXB,A" }, /* d8: 0100 1101 1101 1000 */
- {illegal,0 }, /* d9: 0100 1101 1101 1001 */
+ {illegal,0 }, /* d9: 0100 1101 1101 1001 */
{MOV,"TM0,A" }, /* da: 0100 1101 1101 1010 */
{MOV,"TM1,A" }, /* db: 0100 1101 1101 1011 */
- {illegal,0 }, /* dc: 0100 1101 1101 1100 */
- {illegal,0 }, /* dd: 0100 1101 1101 1101 */
- {illegal,0 }, /* de: 0100 1101 1101 1110 */
- {illegal,0 }, /* df: 0100 1101 1101 1111 */
-
- {illegal,0 }, /* e0: 0100 1101 1110 0000 */
- {illegal,0 }, /* e1: 0100 1101 1110 0001 */
- {illegal,0 }, /* e2: 0100 1101 1110 0010 */
- {illegal,0 }, /* e3: 0100 1101 1110 0011 */
- {illegal,0 }, /* e4: 0100 1101 1110 0100 */
- {illegal,0 }, /* e5: 0100 1101 1110 0101 */
- {illegal,0 }, /* e6: 0100 1101 1110 0110 */
- {illegal,0 }, /* e7: 0100 1101 1110 0111 */
- {MOV,"ZCM,A" }, /* e8: 0100 1101 1110 1000 */ /* 7810 */
- {illegal,0 }, /* e9: 0100 1101 1110 1001 */
- {illegal,0 }, /* ea: 0100 1101 1110 1010 */
- {illegal,0 }, /* eb: 0100 1101 1110 1011 */
- {illegal,0 }, /* ec: 0100 1101 1110 1100 */
- {illegal,0 }, /* ed: 0100 1101 1110 1101 */
- {illegal,0 }, /* ee: 0100 1101 1110 1110 */
- {illegal,0 }, /* ef: 0100 1101 1110 1111 */
-
- {illegal,0 }, /* f0: 0100 1101 1111 0000 */
- {illegal,0 }, /* f1: 0100 1101 1111 0001 */
- {illegal,0 }, /* f2: 0100 1101 1111 0010 */
- {illegal,0 }, /* f3: 0100 1101 1111 0011 */
- {illegal,0 }, /* f4: 0100 1101 1111 0100 */
- {illegal,0 }, /* f5: 0100 1101 1111 0101 */
- {illegal,0 }, /* f6: 0100 1101 1111 0110 */
- {illegal,0 }, /* f7: 0100 1101 1111 0111 */
- {illegal,0 }, /* f8: 0100 1101 1111 1000 */
- {illegal,0 }, /* f9: 0100 1101 1111 1001 */
- {illegal,0 }, /* fa: 0100 1101 1111 1010 */
- {illegal,0 }, /* fb: 0100 1101 1111 1011 */
- {illegal,0 }, /* fc: 0100 1101 1111 1100 */
- {illegal,0 }, /* fd: 0100 1101 1111 1101 */
- {illegal,0 }, /* fe: 0100 1101 1111 1110 */
- {illegal,0 } /* ff: 0100 1101 1111 1111 */
+ {illegal,0 }, /* dc: 0100 1101 1101 1100 */
+ {illegal,0 }, /* dd: 0100 1101 1101 1101 */
+ {illegal,0 }, /* de: 0100 1101 1101 1110 */
+ {illegal,0 }, /* df: 0100 1101 1101 1111 */
+
+ {illegal,0 }, /* e0: 0100 1101 1110 0000 */
+ {illegal,0 }, /* e1: 0100 1101 1110 0001 */
+ {illegal,0 }, /* e2: 0100 1101 1110 0010 */
+ {illegal,0 }, /* e3: 0100 1101 1110 0011 */
+ {illegal,0 }, /* e4: 0100 1101 1110 0100 */
+ {illegal,0 }, /* e5: 0100 1101 1110 0101 */
+ {illegal,0 }, /* e6: 0100 1101 1110 0110 */
+ {illegal,0 }, /* e7: 0100 1101 1110 0111 */
+ {MOV,"ZCM,A" }, /* e8: 0100 1101 1110 1000 */ /* 7810 */
+ {illegal,0 }, /* e9: 0100 1101 1110 1001 */
+ {illegal,0 }, /* ea: 0100 1101 1110 1010 */
+ {illegal,0 }, /* eb: 0100 1101 1110 1011 */
+ {illegal,0 }, /* ec: 0100 1101 1110 1100 */
+ {illegal,0 }, /* ed: 0100 1101 1110 1101 */
+ {illegal,0 }, /* ee: 0100 1101 1110 1110 */
+ {illegal,0 }, /* ef: 0100 1101 1110 1111 */
+
+ {illegal,0 }, /* f0: 0100 1101 1111 0000 */
+ {illegal,0 }, /* f1: 0100 1101 1111 0001 */
+ {illegal,0 }, /* f2: 0100 1101 1111 0010 */
+ {illegal,0 }, /* f3: 0100 1101 1111 0011 */
+ {illegal,0 }, /* f4: 0100 1101 1111 0100 */
+ {illegal,0 }, /* f5: 0100 1101 1111 0101 */
+ {illegal,0 }, /* f6: 0100 1101 1111 0110 */
+ {illegal,0 }, /* f7: 0100 1101 1111 0111 */
+ {illegal,0 }, /* f8: 0100 1101 1111 1000 */
+ {illegal,0 }, /* f9: 0100 1101 1111 1001 */
+ {illegal,0 }, /* fa: 0100 1101 1111 1010 */
+ {illegal,0 }, /* fb: 0100 1101 1111 1011 */
+ {illegal,0 }, /* fc: 0100 1101 1111 1100 */
+ {illegal,0 }, /* fd: 0100 1101 1111 1101 */
+ {illegal,0 }, /* fe: 0100 1101 1111 1110 */
+ {illegal,0 } /* ff: 0100 1101 1111 1111 */
};
static const struct dasm_s dasm4D_7807[256] =
{
- {illegal,0 }, /* 00: 0100 1101 0000 0000 */
- {illegal,0 }, /* 01: 0100 1101 0000 0001 */
- {illegal,0 }, /* 02: 0100 1101 0000 0010 */
- {illegal,0 }, /* 03: 0100 1101 0000 0011 */
- {illegal,0 }, /* 04: 0100 1101 0000 0100 */
- {illegal,0 }, /* 05: 0100 1101 0000 0101 */
- {illegal,0 }, /* 06: 0100 1101 0000 0110 */
- {illegal,0 }, /* 07: 0100 1101 0000 0111 */
- {illegal,0 }, /* 08: 0100 1101 0000 1000 */
- {illegal,0 }, /* 09: 0100 1101 0000 1001 */
- {illegal,0 }, /* 0a: 0100 1101 0000 1010 */
- {illegal,0 }, /* 0b: 0100 1101 0000 1011 */
- {illegal,0 }, /* 0c: 0100 1101 0000 1100 */
- {illegal,0 }, /* 0d: 0100 1101 0000 1101 */
- {illegal,0 }, /* 0e: 0100 1101 0000 1110 */
- {illegal,0 }, /* 0f: 0100 1101 0000 1111 */
-
- {illegal,0 }, /* 10: 0100 1101 0001 0000 */
- {illegal,0 }, /* 11: 0100 1101 0001 0001 */
- {illegal,0 }, /* 12: 0100 1101 0001 0010 */
- {illegal,0 }, /* 13: 0100 1101 0001 0011 */
- {illegal,0 }, /* 14: 0100 1101 0001 0100 */
- {illegal,0 }, /* 15: 0100 1101 0001 0101 */
- {illegal,0 }, /* 16: 0100 1101 0001 0110 */
- {illegal,0 }, /* 17: 0100 1101 0001 0111 */
- {illegal,0 }, /* 18: 0100 1101 0001 1000 */
- {illegal,0 }, /* 19: 0100 1101 0001 1001 */
- {illegal,0 }, /* 1a: 0100 1101 0001 1010 */
- {illegal,0 }, /* 1b: 0100 1101 0001 1011 */
- {illegal,0 }, /* 1c: 0100 1101 0001 1100 */
- {illegal,0 }, /* 1d: 0100 1101 0001 1101 */
- {illegal,0 }, /* 1e: 0100 1101 0001 1110 */
- {illegal,0 }, /* 1f: 0100 1101 0001 1111 */
-
- {illegal,0 }, /* 20: 0100 1101 0010 0000 */
- {illegal,0 }, /* 21: 0100 1101 0010 0001 */
- {illegal,0 }, /* 22: 0100 1101 0010 0010 */
- {illegal,0 }, /* 23: 0100 1101 0010 0011 */
- {illegal,0 }, /* 24: 0100 1101 0010 0100 */
- {illegal,0 }, /* 25: 0100 1101 0010 0101 */
- {illegal,0 }, /* 26: 0100 1101 0010 0110 */
- {illegal,0 }, /* 27: 0100 1101 0010 0111 */
- {illegal,0 }, /* 28: 0100 1101 0010 1000 */
- {illegal,0 }, /* 29: 0100 1101 0010 1001 */
- {illegal,0 }, /* 2a: 0100 1101 0010 1010 */
- {illegal,0 }, /* 2b: 0100 1101 0010 1011 */
- {illegal,0 }, /* 2c: 0100 1101 0010 1100 */
- {illegal,0 }, /* 2d: 0100 1101 0010 1101 */
- {illegal,0 }, /* 2e: 0100 1101 0010 1110 */
- {illegal,0 }, /* 2f: 0100 1101 0010 1111 */
-
- {illegal,0 }, /* 30: 0100 1101 0011 0000 */
- {illegal,0 }, /* 31: 0100 1101 0011 0001 */
- {illegal,0 }, /* 32: 0100 1101 0011 0010 */
- {illegal,0 }, /* 33: 0100 1101 0011 0011 */
- {illegal,0 }, /* 34: 0100 1101 0011 0100 */
- {illegal,0 }, /* 35: 0100 1101 0011 0101 */
- {illegal,0 }, /* 36: 0100 1101 0011 0110 */
- {illegal,0 }, /* 37: 0100 1101 0011 0111 */
- {illegal,0 }, /* 38: 0100 1101 0011 1000 */
- {illegal,0 }, /* 39: 0100 1101 0011 1001 */
- {illegal,0 }, /* 3a: 0100 1101 0011 1010 */
- {illegal,0 }, /* 3b: 0100 1101 0011 1011 */
- {illegal,0 }, /* 3c: 0100 1101 0011 1100 */
- {illegal,0 }, /* 3d: 0100 1101 0011 1101 */
- {illegal,0 }, /* 3e: 0100 1101 0011 1110 */
- {illegal,0 }, /* 3f: 0100 1101 0011 1111 */
-
- {illegal,0 }, /* 40: 0100 1101 0100 0000 */
- {illegal,0 }, /* 41: 0100 1101 0100 0001 */
- {illegal,0 }, /* 42: 0100 1101 0100 0010 */
- {illegal,0 }, /* 43: 0100 1101 0100 0011 */
- {illegal,0 }, /* 44: 0100 1101 0100 0100 */
- {illegal,0 }, /* 45: 0100 1101 0100 0101 */
- {illegal,0 }, /* 46: 0100 1101 0100 0110 */
- {illegal,0 }, /* 47: 0100 1101 0100 0111 */
- {illegal,0 }, /* 48: 0100 1101 0100 1000 */
- {illegal,0 }, /* 49: 0100 1101 0100 1001 */
- {illegal,0 }, /* 4a: 0100 1101 0100 1010 */
- {illegal,0 }, /* 4b: 0100 1101 0100 1011 */
- {illegal,0 }, /* 4c: 0100 1101 0100 1100 */
- {illegal,0 }, /* 4d: 0100 1101 0100 1101 */
- {illegal,0 }, /* 4e: 0100 1101 0100 1110 */
- {illegal,0 }, /* 4f: 0100 1101 0100 1111 */
-
- {illegal,0 }, /* 50: 0100 1101 0101 0000 */
- {illegal,0 }, /* 51: 0100 1101 0101 0001 */
- {illegal,0 }, /* 52: 0100 1101 0101 0010 */
- {illegal,0 }, /* 53: 0100 1101 0101 0011 */
- {illegal,0 }, /* 54: 0100 1101 0101 0100 */
- {illegal,0 }, /* 55: 0100 1101 0101 0101 */
- {illegal,0 }, /* 56: 0100 1101 0101 0110 */
- {illegal,0 }, /* 57: 0100 1101 0101 0111 */
- {illegal,0 }, /* 58: 0100 1101 0101 1000 */
- {illegal,0 }, /* 59: 0100 1101 0101 1001 */
- {illegal,0 }, /* 5a: 0100 1101 0101 1010 */
- {illegal,0 }, /* 5b: 0100 1101 0101 1011 */
- {illegal,0 }, /* 5c: 0100 1101 0101 1100 */
- {illegal,0 }, /* 5d: 0100 1101 0101 1101 */
- {illegal,0 }, /* 5e: 0100 1101 0101 1110 */
- {illegal,0 }, /* 5f: 0100 1101 0101 1111 */
-
- {illegal,0 }, /* 60: 0100 1101 0110 0000 */
- {illegal,0 }, /* 61: 0100 1101 0110 0001 */
- {illegal,0 }, /* 62: 0100 1101 0110 0010 */
- {illegal,0 }, /* 63: 0100 1101 0110 0011 */
- {illegal,0 }, /* 64: 0100 1101 0110 0100 */
- {illegal,0 }, /* 65: 0100 1101 0110 0101 */
- {illegal,0 }, /* 66: 0100 1101 0110 0110 */
- {illegal,0 }, /* 67: 0100 1101 0110 0111 */
- {illegal,0 }, /* 68: 0100 1101 0110 1000 */
- {illegal,0 }, /* 69: 0100 1101 0110 1001 */
- {illegal,0 }, /* 6a: 0100 1101 0110 1010 */
- {illegal,0 }, /* 6b: 0100 1101 0110 1011 */
- {illegal,0 }, /* 6c: 0100 1101 0110 1100 */
- {illegal,0 }, /* 6d: 0100 1101 0110 1101 */
- {illegal,0 }, /* 6e: 0100 1101 0110 1110 */
- {illegal,0 }, /* 6f: 0100 1101 0110 1111 */
-
- {illegal,0 }, /* 70: 0100 1101 0111 0000 */
- {illegal,0 }, /* 71: 0100 1101 0111 0001 */
- {illegal,0 }, /* 72: 0100 1101 0111 0010 */
- {illegal,0 }, /* 73: 0100 1101 0111 0011 */
- {illegal,0 }, /* 74: 0100 1101 0111 0100 */
- {illegal,0 }, /* 75: 0100 1101 0111 0101 */
- {illegal,0 }, /* 76: 0100 1101 0111 0110 */
- {illegal,0 }, /* 77: 0100 1101 0111 0111 */
- {illegal,0 }, /* 78: 0100 1101 0111 1000 */
- {illegal,0 }, /* 79: 0100 1101 0111 1001 */
- {illegal,0 }, /* 7a: 0100 1101 0111 1010 */
- {illegal,0 }, /* 7b: 0100 1101 0111 1011 */
- {illegal,0 }, /* 7c: 0100 1101 0111 1100 */
- {illegal,0 }, /* 7d: 0100 1101 0111 1101 */
- {illegal,0 }, /* 7e: 0100 1101 0111 1110 */
- {illegal,0 }, /* 7f: 0100 1101 0111 1111 */
-
- {illegal,0 }, /* 80: 0100 1101 1000 0000 */
- {illegal,0 }, /* 81: 0100 1101 1000 0001 */
- {illegal,0 }, /* 82: 0100 1101 1000 0010 */
- {illegal,0 }, /* 83: 0100 1101 1000 0011 */
- {illegal,0 }, /* 84: 0100 1101 1000 0100 */
- {illegal,0 }, /* 85: 0100 1101 1000 0101 */
- {illegal,0 }, /* 86: 0100 1101 1000 0110 */
- {illegal,0 }, /* 87: 0100 1101 1000 0111 */
- {illegal,0 }, /* 88: 0100 1101 1000 1000 */
- {illegal,0 }, /* 89: 0100 1101 1000 1001 */
- {illegal,0 }, /* 8a: 0100 1101 1000 1010 */
- {illegal,0 }, /* 8b: 0100 1101 1000 1011 */
- {illegal,0 }, /* 8c: 0100 1101 1000 1100 */
- {illegal,0 }, /* 8d: 0100 1101 1000 1101 */
- {illegal,0 }, /* 8e: 0100 1101 1000 1110 */
- {illegal,0 }, /* 8f: 0100 1101 1000 1111 */
-
- {illegal,0 }, /* 90: 0100 1101 1001 0000 */
- {illegal,0 }, /* 91: 0100 1101 1001 0001 */
- {illegal,0 }, /* 92: 0100 1101 1001 0010 */
- {illegal,0 }, /* 93: 0100 1101 1001 0011 */
- {illegal,0 }, /* 94: 0100 1101 1001 0100 */
- {illegal,0 }, /* 95: 0100 1101 1001 0101 */
- {illegal,0 }, /* 96: 0100 1101 1001 0110 */
- {illegal,0 }, /* 97: 0100 1101 1001 0111 */
- {illegal,0 }, /* 98: 0100 1101 1001 1000 */
- {illegal,0 }, /* 99: 0100 1101 1001 1001 */
- {illegal,0 }, /* 9a: 0100 1101 1001 1010 */
- {illegal,0 }, /* 9b: 0100 1101 1001 1011 */
- {illegal,0 }, /* 9c: 0100 1101 1001 1100 */
- {illegal,0 }, /* 9d: 0100 1101 1001 1101 */
- {illegal,0 }, /* 9e: 0100 1101 1001 1110 */
- {illegal,0 }, /* 9f: 0100 1101 1001 1111 */
-
- {illegal,0 }, /* a0: 0100 1101 1010 0000 */
- {illegal,0 }, /* a1: 0100 1101 1010 0001 */
- {illegal,0 }, /* a2: 0100 1101 1010 0010 */
- {illegal,0 }, /* a3: 0100 1101 1010 0011 */
- {illegal,0 }, /* a4: 0100 1101 1010 0100 */
- {illegal,0 }, /* a5: 0100 1101 1010 0101 */
- {illegal,0 }, /* a6: 0100 1101 1010 0110 */
- {illegal,0 }, /* a7: 0100 1101 1010 0111 */
- {illegal,0 }, /* a8: 0100 1101 1010 1000 */
- {illegal,0 }, /* a9: 0100 1101 1010 1001 */
- {illegal,0 }, /* aa: 0100 1101 1010 1010 */
- {illegal,0 }, /* ab: 0100 1101 1010 1011 */
- {illegal,0 }, /* ac: 0100 1101 1010 1100 */
- {illegal,0 }, /* ad: 0100 1101 1010 1101 */
- {illegal,0 }, /* ae: 0100 1101 1010 1110 */
- {illegal,0 }, /* af: 0100 1101 1010 1111 */
-
- {illegal,0 }, /* b0: 0100 1101 1011 0000 */
- {illegal,0 }, /* b1: 0100 1101 1011 0001 */
- {illegal,0 }, /* b2: 0100 1101 1011 0010 */
- {illegal,0 }, /* b3: 0100 1101 1011 0011 */
- {illegal,0 }, /* b4: 0100 1101 1011 0100 */
- {illegal,0 }, /* b5: 0100 1101 1011 0101 */
- {illegal,0 }, /* b6: 0100 1101 1011 0110 */
- {illegal,0 }, /* b7: 0100 1101 1011 0111 */
- {illegal,0 }, /* b8: 0100 1101 1011 1000 */
- {illegal,0 }, /* b9: 0100 1101 1011 1001 */
- {illegal,0 }, /* ba: 0100 1101 1011 1010 */
- {illegal,0 }, /* bb: 0100 1101 1011 1011 */
- {illegal,0 }, /* bc: 0100 1101 1011 1100 */
- {illegal,0 }, /* bd: 0100 1101 1011 1101 */
- {illegal,0 }, /* be: 0100 1101 1011 1110 */
- {illegal,0 }, /* bf: 0100 1101 1011 1111 */
+ {illegal,0 }, /* 00: 0100 1101 0000 0000 */
+ {illegal,0 }, /* 01: 0100 1101 0000 0001 */
+ {illegal,0 }, /* 02: 0100 1101 0000 0010 */
+ {illegal,0 }, /* 03: 0100 1101 0000 0011 */
+ {illegal,0 }, /* 04: 0100 1101 0000 0100 */
+ {illegal,0 }, /* 05: 0100 1101 0000 0101 */
+ {illegal,0 }, /* 06: 0100 1101 0000 0110 */
+ {illegal,0 }, /* 07: 0100 1101 0000 0111 */
+ {illegal,0 }, /* 08: 0100 1101 0000 1000 */
+ {illegal,0 }, /* 09: 0100 1101 0000 1001 */
+ {illegal,0 }, /* 0a: 0100 1101 0000 1010 */
+ {illegal,0 }, /* 0b: 0100 1101 0000 1011 */
+ {illegal,0 }, /* 0c: 0100 1101 0000 1100 */
+ {illegal,0 }, /* 0d: 0100 1101 0000 1101 */
+ {illegal,0 }, /* 0e: 0100 1101 0000 1110 */
+ {illegal,0 }, /* 0f: 0100 1101 0000 1111 */
+
+ {illegal,0 }, /* 10: 0100 1101 0001 0000 */
+ {illegal,0 }, /* 11: 0100 1101 0001 0001 */
+ {illegal,0 }, /* 12: 0100 1101 0001 0010 */
+ {illegal,0 }, /* 13: 0100 1101 0001 0011 */
+ {illegal,0 }, /* 14: 0100 1101 0001 0100 */
+ {illegal,0 }, /* 15: 0100 1101 0001 0101 */
+ {illegal,0 }, /* 16: 0100 1101 0001 0110 */
+ {illegal,0 }, /* 17: 0100 1101 0001 0111 */
+ {illegal,0 }, /* 18: 0100 1101 0001 1000 */
+ {illegal,0 }, /* 19: 0100 1101 0001 1001 */
+ {illegal,0 }, /* 1a: 0100 1101 0001 1010 */
+ {illegal,0 }, /* 1b: 0100 1101 0001 1011 */
+ {illegal,0 }, /* 1c: 0100 1101 0001 1100 */
+ {illegal,0 }, /* 1d: 0100 1101 0001 1101 */
+ {illegal,0 }, /* 1e: 0100 1101 0001 1110 */
+ {illegal,0 }, /* 1f: 0100 1101 0001 1111 */
+
+ {illegal,0 }, /* 20: 0100 1101 0010 0000 */
+ {illegal,0 }, /* 21: 0100 1101 0010 0001 */
+ {illegal,0 }, /* 22: 0100 1101 0010 0010 */
+ {illegal,0 }, /* 23: 0100 1101 0010 0011 */
+ {illegal,0 }, /* 24: 0100 1101 0010 0100 */
+ {illegal,0 }, /* 25: 0100 1101 0010 0101 */
+ {illegal,0 }, /* 26: 0100 1101 0010 0110 */
+ {illegal,0 }, /* 27: 0100 1101 0010 0111 */
+ {illegal,0 }, /* 28: 0100 1101 0010 1000 */
+ {illegal,0 }, /* 29: 0100 1101 0010 1001 */
+ {illegal,0 }, /* 2a: 0100 1101 0010 1010 */
+ {illegal,0 }, /* 2b: 0100 1101 0010 1011 */
+ {illegal,0 }, /* 2c: 0100 1101 0010 1100 */
+ {illegal,0 }, /* 2d: 0100 1101 0010 1101 */
+ {illegal,0 }, /* 2e: 0100 1101 0010 1110 */
+ {illegal,0 }, /* 2f: 0100 1101 0010 1111 */
+
+ {illegal,0 }, /* 30: 0100 1101 0011 0000 */
+ {illegal,0 }, /* 31: 0100 1101 0011 0001 */
+ {illegal,0 }, /* 32: 0100 1101 0011 0010 */
+ {illegal,0 }, /* 33: 0100 1101 0011 0011 */
+ {illegal,0 }, /* 34: 0100 1101 0011 0100 */
+ {illegal,0 }, /* 35: 0100 1101 0011 0101 */
+ {illegal,0 }, /* 36: 0100 1101 0011 0110 */
+ {illegal,0 }, /* 37: 0100 1101 0011 0111 */
+ {illegal,0 }, /* 38: 0100 1101 0011 1000 */
+ {illegal,0 }, /* 39: 0100 1101 0011 1001 */
+ {illegal,0 }, /* 3a: 0100 1101 0011 1010 */
+ {illegal,0 }, /* 3b: 0100 1101 0011 1011 */
+ {illegal,0 }, /* 3c: 0100 1101 0011 1100 */
+ {illegal,0 }, /* 3d: 0100 1101 0011 1101 */
+ {illegal,0 }, /* 3e: 0100 1101 0011 1110 */
+ {illegal,0 }, /* 3f: 0100 1101 0011 1111 */
+
+ {illegal,0 }, /* 40: 0100 1101 0100 0000 */
+ {illegal,0 }, /* 41: 0100 1101 0100 0001 */
+ {illegal,0 }, /* 42: 0100 1101 0100 0010 */
+ {illegal,0 }, /* 43: 0100 1101 0100 0011 */
+ {illegal,0 }, /* 44: 0100 1101 0100 0100 */
+ {illegal,0 }, /* 45: 0100 1101 0100 0101 */
+ {illegal,0 }, /* 46: 0100 1101 0100 0110 */
+ {illegal,0 }, /* 47: 0100 1101 0100 0111 */
+ {illegal,0 }, /* 48: 0100 1101 0100 1000 */
+ {illegal,0 }, /* 49: 0100 1101 0100 1001 */
+ {illegal,0 }, /* 4a: 0100 1101 0100 1010 */
+ {illegal,0 }, /* 4b: 0100 1101 0100 1011 */
+ {illegal,0 }, /* 4c: 0100 1101 0100 1100 */
+ {illegal,0 }, /* 4d: 0100 1101 0100 1101 */
+ {illegal,0 }, /* 4e: 0100 1101 0100 1110 */
+ {illegal,0 }, /* 4f: 0100 1101 0100 1111 */
+
+ {illegal,0 }, /* 50: 0100 1101 0101 0000 */
+ {illegal,0 }, /* 51: 0100 1101 0101 0001 */
+ {illegal,0 }, /* 52: 0100 1101 0101 0010 */
+ {illegal,0 }, /* 53: 0100 1101 0101 0011 */
+ {illegal,0 }, /* 54: 0100 1101 0101 0100 */
+ {illegal,0 }, /* 55: 0100 1101 0101 0101 */
+ {illegal,0 }, /* 56: 0100 1101 0101 0110 */
+ {illegal,0 }, /* 57: 0100 1101 0101 0111 */
+ {illegal,0 }, /* 58: 0100 1101 0101 1000 */
+ {illegal,0 }, /* 59: 0100 1101 0101 1001 */
+ {illegal,0 }, /* 5a: 0100 1101 0101 1010 */
+ {illegal,0 }, /* 5b: 0100 1101 0101 1011 */
+ {illegal,0 }, /* 5c: 0100 1101 0101 1100 */
+ {illegal,0 }, /* 5d: 0100 1101 0101 1101 */
+ {illegal,0 }, /* 5e: 0100 1101 0101 1110 */
+ {illegal,0 }, /* 5f: 0100 1101 0101 1111 */
+
+ {illegal,0 }, /* 60: 0100 1101 0110 0000 */
+ {illegal,0 }, /* 61: 0100 1101 0110 0001 */
+ {illegal,0 }, /* 62: 0100 1101 0110 0010 */
+ {illegal,0 }, /* 63: 0100 1101 0110 0011 */
+ {illegal,0 }, /* 64: 0100 1101 0110 0100 */
+ {illegal,0 }, /* 65: 0100 1101 0110 0101 */
+ {illegal,0 }, /* 66: 0100 1101 0110 0110 */
+ {illegal,0 }, /* 67: 0100 1101 0110 0111 */
+ {illegal,0 }, /* 68: 0100 1101 0110 1000 */
+ {illegal,0 }, /* 69: 0100 1101 0110 1001 */
+ {illegal,0 }, /* 6a: 0100 1101 0110 1010 */
+ {illegal,0 }, /* 6b: 0100 1101 0110 1011 */
+ {illegal,0 }, /* 6c: 0100 1101 0110 1100 */
+ {illegal,0 }, /* 6d: 0100 1101 0110 1101 */
+ {illegal,0 }, /* 6e: 0100 1101 0110 1110 */
+ {illegal,0 }, /* 6f: 0100 1101 0110 1111 */
+
+ {illegal,0 }, /* 70: 0100 1101 0111 0000 */
+ {illegal,0 }, /* 71: 0100 1101 0111 0001 */
+ {illegal,0 }, /* 72: 0100 1101 0111 0010 */
+ {illegal,0 }, /* 73: 0100 1101 0111 0011 */
+ {illegal,0 }, /* 74: 0100 1101 0111 0100 */
+ {illegal,0 }, /* 75: 0100 1101 0111 0101 */
+ {illegal,0 }, /* 76: 0100 1101 0111 0110 */
+ {illegal,0 }, /* 77: 0100 1101 0111 0111 */
+ {illegal,0 }, /* 78: 0100 1101 0111 1000 */
+ {illegal,0 }, /* 79: 0100 1101 0111 1001 */
+ {illegal,0 }, /* 7a: 0100 1101 0111 1010 */
+ {illegal,0 }, /* 7b: 0100 1101 0111 1011 */
+ {illegal,0 }, /* 7c: 0100 1101 0111 1100 */
+ {illegal,0 }, /* 7d: 0100 1101 0111 1101 */
+ {illegal,0 }, /* 7e: 0100 1101 0111 1110 */
+ {illegal,0 }, /* 7f: 0100 1101 0111 1111 */
+
+ {illegal,0 }, /* 80: 0100 1101 1000 0000 */
+ {illegal,0 }, /* 81: 0100 1101 1000 0001 */
+ {illegal,0 }, /* 82: 0100 1101 1000 0010 */
+ {illegal,0 }, /* 83: 0100 1101 1000 0011 */
+ {illegal,0 }, /* 84: 0100 1101 1000 0100 */
+ {illegal,0 }, /* 85: 0100 1101 1000 0101 */
+ {illegal,0 }, /* 86: 0100 1101 1000 0110 */
+ {illegal,0 }, /* 87: 0100 1101 1000 0111 */
+ {illegal,0 }, /* 88: 0100 1101 1000 1000 */
+ {illegal,0 }, /* 89: 0100 1101 1000 1001 */
+ {illegal,0 }, /* 8a: 0100 1101 1000 1010 */
+ {illegal,0 }, /* 8b: 0100 1101 1000 1011 */
+ {illegal,0 }, /* 8c: 0100 1101 1000 1100 */
+ {illegal,0 }, /* 8d: 0100 1101 1000 1101 */
+ {illegal,0 }, /* 8e: 0100 1101 1000 1110 */
+ {illegal,0 }, /* 8f: 0100 1101 1000 1111 */
+
+ {illegal,0 }, /* 90: 0100 1101 1001 0000 */
+ {illegal,0 }, /* 91: 0100 1101 1001 0001 */
+ {illegal,0 }, /* 92: 0100 1101 1001 0010 */
+ {illegal,0 }, /* 93: 0100 1101 1001 0011 */
+ {illegal,0 }, /* 94: 0100 1101 1001 0100 */
+ {illegal,0 }, /* 95: 0100 1101 1001 0101 */
+ {illegal,0 }, /* 96: 0100 1101 1001 0110 */
+ {illegal,0 }, /* 97: 0100 1101 1001 0111 */
+ {illegal,0 }, /* 98: 0100 1101 1001 1000 */
+ {illegal,0 }, /* 99: 0100 1101 1001 1001 */
+ {illegal,0 }, /* 9a: 0100 1101 1001 1010 */
+ {illegal,0 }, /* 9b: 0100 1101 1001 1011 */
+ {illegal,0 }, /* 9c: 0100 1101 1001 1100 */
+ {illegal,0 }, /* 9d: 0100 1101 1001 1101 */
+ {illegal,0 }, /* 9e: 0100 1101 1001 1110 */
+ {illegal,0 }, /* 9f: 0100 1101 1001 1111 */
+
+ {illegal,0 }, /* a0: 0100 1101 1010 0000 */
+ {illegal,0 }, /* a1: 0100 1101 1010 0001 */
+ {illegal,0 }, /* a2: 0100 1101 1010 0010 */
+ {illegal,0 }, /* a3: 0100 1101 1010 0011 */
+ {illegal,0 }, /* a4: 0100 1101 1010 0100 */
+ {illegal,0 }, /* a5: 0100 1101 1010 0101 */
+ {illegal,0 }, /* a6: 0100 1101 1010 0110 */
+ {illegal,0 }, /* a7: 0100 1101 1010 0111 */
+ {illegal,0 }, /* a8: 0100 1101 1010 1000 */
+ {illegal,0 }, /* a9: 0100 1101 1010 1001 */
+ {illegal,0 }, /* aa: 0100 1101 1010 1010 */
+ {illegal,0 }, /* ab: 0100 1101 1010 1011 */
+ {illegal,0 }, /* ac: 0100 1101 1010 1100 */
+ {illegal,0 }, /* ad: 0100 1101 1010 1101 */
+ {illegal,0 }, /* ae: 0100 1101 1010 1110 */
+ {illegal,0 }, /* af: 0100 1101 1010 1111 */
+
+ {illegal,0 }, /* b0: 0100 1101 1011 0000 */
+ {illegal,0 }, /* b1: 0100 1101 1011 0001 */
+ {illegal,0 }, /* b2: 0100 1101 1011 0010 */
+ {illegal,0 }, /* b3: 0100 1101 1011 0011 */
+ {illegal,0 }, /* b4: 0100 1101 1011 0100 */
+ {illegal,0 }, /* b5: 0100 1101 1011 0101 */
+ {illegal,0 }, /* b6: 0100 1101 1011 0110 */
+ {illegal,0 }, /* b7: 0100 1101 1011 0111 */
+ {illegal,0 }, /* b8: 0100 1101 1011 1000 */
+ {illegal,0 }, /* b9: 0100 1101 1011 1001 */
+ {illegal,0 }, /* ba: 0100 1101 1011 1010 */
+ {illegal,0 }, /* bb: 0100 1101 1011 1011 */
+ {illegal,0 }, /* bc: 0100 1101 1011 1100 */
+ {illegal,0 }, /* bd: 0100 1101 1011 1101 */
+ {illegal,0 }, /* be: 0100 1101 1011 1110 */
+ {illegal,0 }, /* bf: 0100 1101 1011 1111 */
{MOV,"PA,A" }, /* c0: 0100 1101 1100 0000 */
{MOV,"PB,A" }, /* c1: 0100 1101 1100 0001 */
{MOV,"PC,A" }, /* c2: 0100 1101 1100 0010 */
{MOV,"PD,A" }, /* c3: 0100 1101 1100 0011 */
- {illegal,0 }, /* c4: 0100 1101 1100 0100 */
+ {illegal,0 }, /* c4: 0100 1101 1100 0100 */
{MOV,"PF,A" }, /* c5: 0100 1101 1100 0101 */
{MOV,"MKH,A" }, /* c6: 0100 1101 1100 0110 */
{MOV,"MKL,A" }, /* c7: 0100 1101 1100 0111 */
@@ -1974,72 +1974,72 @@ static const struct dasm_s dasm4D_7807[256] =
{MOV,"EOM,A" }, /* cb: 0100 1101 1100 1011 */
{MOV,"ETMM,A" }, /* cc: 0100 1101 1100 1100 */
{MOV,"TMM,A" }, /* cd: 0100 1101 1100 1101 */
- {illegal,0 }, /* ce: 0100 1101 1100 1110 */
- {illegal,0 }, /* cf: 0100 1101 1100 1111 */
+ {illegal,0 }, /* ce: 0100 1101 1100 1110 */
+ {illegal,0 }, /* cf: 0100 1101 1100 1111 */
{MOV,"MM,A" }, /* d0: 0100 1101 1101 0000 */
{MOV,"MCC,A" }, /* d1: 0100 1101 1101 0001 */
{MOV,"MA,A" }, /* d2: 0100 1101 1101 0010 */
{MOV,"MB,A" }, /* d3: 0100 1101 1101 0011 */
{MOV,"MC,A" }, /* d4: 0100 1101 1101 0100 */
- {illegal,0 }, /* d5: 0100 1101 1101 0101 */
- {illegal,0 }, /* d6: 0100 1101 1101 0110 */
+ {illegal,0 }, /* d5: 0100 1101 1101 0101 */
+ {illegal,0 }, /* d6: 0100 1101 1101 0110 */
{MOV,"MF,A" }, /* d7: 0100 1101 1101 0111 */
{MOV,"TXB,A" }, /* d8: 0100 1101 1101 1000 */
- {illegal,0 }, /* d9: 0100 1101 1101 1001 */
+ {illegal,0 }, /* d9: 0100 1101 1101 1001 */
{MOV,"TM0,A" }, /* da: 0100 1101 1101 1010 */
{MOV,"TM1,A" }, /* db: 0100 1101 1101 1011 */
- {illegal,0 }, /* dc: 0100 1101 1101 1100 */
- {illegal,0 }, /* dd: 0100 1101 1101 1101 */
- {illegal,0 }, /* de: 0100 1101 1101 1110 */
- {illegal,0 }, /* df: 0100 1101 1101 1111 */
-
- {illegal,0 }, /* e0: 0100 1101 1110 0000 */
- {illegal,0 }, /* e1: 0100 1101 1110 0001 */
- {illegal,0 }, /* e2: 0100 1101 1110 0010 */
- {illegal,0 }, /* e3: 0100 1101 1110 0011 */
- {illegal,0 }, /* e4: 0100 1101 1110 0100 */
- {MOV,"MT,A" }, /* e5: 0100 1101 1110 0101 */ /* 7807 */
- {illegal,0 }, /* e6: 0100 1101 1110 0110 */
- {illegal,0 }, /* e7: 0100 1101 1110 0111 */
- {illegal,0 }, /* e8: 0100 1101 1110 1000 */
- {illegal,0 }, /* e9: 0100 1101 1110 1001 */
- {illegal,0 }, /* ea: 0100 1101 1110 1010 */
- {illegal,0 }, /* eb: 0100 1101 1110 1011 */
- {illegal,0 }, /* ec: 0100 1101 1110 1100 */
- {illegal,0 }, /* ed: 0100 1101 1110 1101 */
- {illegal,0 }, /* ee: 0100 1101 1110 1110 */
- {illegal,0 }, /* ef: 0100 1101 1110 1111 */
-
- {illegal,0 }, /* f0: 0100 1101 1111 0000 */
- {illegal,0 }, /* f1: 0100 1101 1111 0001 */
- {illegal,0 }, /* f2: 0100 1101 1111 0010 */
- {illegal,0 }, /* f3: 0100 1101 1111 0011 */
- {illegal,0 }, /* f4: 0100 1101 1111 0100 */
- {illegal,0 }, /* f5: 0100 1101 1111 0101 */
- {illegal,0 }, /* f6: 0100 1101 1111 0110 */
- {illegal,0 }, /* f7: 0100 1101 1111 0111 */
- {illegal,0 }, /* f8: 0100 1101 1111 1000 */
- {illegal,0 }, /* f9: 0100 1101 1111 1001 */
- {illegal,0 }, /* fa: 0100 1101 1111 1010 */
- {illegal,0 }, /* fb: 0100 1101 1111 1011 */
- {illegal,0 }, /* fc: 0100 1101 1111 1100 */
- {illegal,0 }, /* fd: 0100 1101 1111 1101 */
- {illegal,0 }, /* fe: 0100 1101 1111 1110 */
- {illegal,0 } /* ff: 0100 1101 1111 1111 */
+ {illegal,0 }, /* dc: 0100 1101 1101 1100 */
+ {illegal,0 }, /* dd: 0100 1101 1101 1101 */
+ {illegal,0 }, /* de: 0100 1101 1101 1110 */
+ {illegal,0 }, /* df: 0100 1101 1101 1111 */
+
+ {illegal,0 }, /* e0: 0100 1101 1110 0000 */
+ {illegal,0 }, /* e1: 0100 1101 1110 0001 */
+ {illegal,0 }, /* e2: 0100 1101 1110 0010 */
+ {illegal,0 }, /* e3: 0100 1101 1110 0011 */
+ {illegal,0 }, /* e4: 0100 1101 1110 0100 */
+ {MOV,"MT,A" }, /* e5: 0100 1101 1110 0101 */ /* 7807 */
+ {illegal,0 }, /* e6: 0100 1101 1110 0110 */
+ {illegal,0 }, /* e7: 0100 1101 1110 0111 */
+ {illegal,0 }, /* e8: 0100 1101 1110 1000 */
+ {illegal,0 }, /* e9: 0100 1101 1110 1001 */
+ {illegal,0 }, /* ea: 0100 1101 1110 1010 */
+ {illegal,0 }, /* eb: 0100 1101 1110 1011 */
+ {illegal,0 }, /* ec: 0100 1101 1110 1100 */
+ {illegal,0 }, /* ed: 0100 1101 1110 1101 */
+ {illegal,0 }, /* ee: 0100 1101 1110 1110 */
+ {illegal,0 }, /* ef: 0100 1101 1110 1111 */
+
+ {illegal,0 }, /* f0: 0100 1101 1111 0000 */
+ {illegal,0 }, /* f1: 0100 1101 1111 0001 */
+ {illegal,0 }, /* f2: 0100 1101 1111 0010 */
+ {illegal,0 }, /* f3: 0100 1101 1111 0011 */
+ {illegal,0 }, /* f4: 0100 1101 1111 0100 */
+ {illegal,0 }, /* f5: 0100 1101 1111 0101 */
+ {illegal,0 }, /* f6: 0100 1101 1111 0110 */
+ {illegal,0 }, /* f7: 0100 1101 1111 0111 */
+ {illegal,0 }, /* f8: 0100 1101 1111 1000 */
+ {illegal,0 }, /* f9: 0100 1101 1111 1001 */
+ {illegal,0 }, /* fa: 0100 1101 1111 1010 */
+ {illegal,0 }, /* fb: 0100 1101 1111 1011 */
+ {illegal,0 }, /* fc: 0100 1101 1111 1100 */
+ {illegal,0 }, /* fd: 0100 1101 1111 1101 */
+ {illegal,0 }, /* fe: 0100 1101 1111 1110 */
+ {illegal,0 } /* ff: 0100 1101 1111 1111 */
};
/* prefix 60 */
static const struct dasm_s dasm60[256] =
{
- {illegal,0 }, /* 00: 0110 0000 0000 0000 */
- {illegal,0 }, /* 01: 0110 0000 0000 0001 */
- {illegal,0 }, /* 02: 0110 0000 0000 0010 */
- {illegal,0 }, /* 03: 0110 0000 0000 0011 */
- {illegal,0 }, /* 04: 0110 0000 0000 0100 */
- {illegal,0 }, /* 05: 0110 0000 0000 0101 */
- {illegal,0 }, /* 06: 0110 0000 0000 0110 */
- {illegal,0 }, /* 07: 0110 0000 0000 0111 */
+ {illegal,0 }, /* 00: 0110 0000 0000 0000 */
+ {illegal,0 }, /* 01: 0110 0000 0000 0001 */
+ {illegal,0 }, /* 02: 0110 0000 0000 0010 */
+ {illegal,0 }, /* 03: 0110 0000 0000 0011 */
+ {illegal,0 }, /* 04: 0110 0000 0000 0100 */
+ {illegal,0 }, /* 05: 0110 0000 0000 0101 */
+ {illegal,0 }, /* 06: 0110 0000 0000 0110 */
+ {illegal,0 }, /* 07: 0110 0000 0000 0111 */
{ANA,"V,A" }, /* 08: 0110 0000 0000 1000 */
{ANA,"A,A" }, /* 09: 0110 0000 0000 1001 */
{ANA,"B,A" }, /* 0a: 0110 0000 0000 1010 */
@@ -2108,14 +2108,14 @@ static const struct dasm_s dasm60[256] =
{ADD,"E,A" }, /* 45: 0110 0000 0100 0101 */
{ADD,"H,A" }, /* 46: 0110 0000 0100 0110 */
{ADD,"L,A" }, /* 47: 0110 0000 0100 0111 */
- {illegal,0 }, /* 48: 0110 0000 0100 1000 */
- {illegal,0 }, /* 49: 0110 0000 0100 1001 */
- {illegal,0 }, /* 4a: 0110 0000 0100 1010 */
- {illegal,0 }, /* 4b: 0110 0000 0100 1011 */
- {illegal,0 }, /* 4c: 0110 0000 0100 1100 */
- {illegal,0 }, /* 4d: 0110 0000 0100 1101 */
- {illegal,0 }, /* 4e: 0110 0000 0100 1110 */
- {illegal,0 }, /* 4f: 0110 0000 0100 1111 */
+ {illegal,0 }, /* 48: 0110 0000 0100 1000 */
+ {illegal,0 }, /* 49: 0110 0000 0100 1001 */
+ {illegal,0 }, /* 4a: 0110 0000 0100 1010 */
+ {illegal,0 }, /* 4b: 0110 0000 0100 1011 */
+ {illegal,0 }, /* 4c: 0110 0000 0100 1100 */
+ {illegal,0 }, /* 4d: 0110 0000 0100 1101 */
+ {illegal,0 }, /* 4e: 0110 0000 0100 1110 */
+ {illegal,0 }, /* 4f: 0110 0000 0100 1111 */
{ADC,"V,A" }, /* 50: 0110 0000 0101 0000 */
{ADC,"A,A" }, /* 51: 0110 0000 0101 0001 */
@@ -2125,14 +2125,14 @@ static const struct dasm_s dasm60[256] =
{ADC,"E,A" }, /* 55: 0110 0000 0101 0101 */
{ADC,"H,A" }, /* 56: 0110 0000 0101 0110 */
{ADC,"L,A" }, /* 57: 0110 0000 0101 0111 */
- {illegal,0 }, /* 58: 0110 0000 0101 1000 */
- {illegal,0 }, /* 59: 0110 0000 0101 1001 */
- {illegal,0 }, /* 5a: 0110 0000 0101 1010 */
- {illegal,0 }, /* 5b: 0110 0000 0101 1011 */
- {illegal,0 }, /* 5c: 0110 0000 0101 1100 */
- {illegal,0 }, /* 5d: 0110 0000 0101 1101 */
- {illegal,0 }, /* 5e: 0110 0000 0101 1110 */
- {illegal,0 }, /* 5f: 0110 0000 0101 1111 */
+ {illegal,0 }, /* 58: 0110 0000 0101 1000 */
+ {illegal,0 }, /* 59: 0110 0000 0101 1001 */
+ {illegal,0 }, /* 5a: 0110 0000 0101 1010 */
+ {illegal,0 }, /* 5b: 0110 0000 0101 1011 */
+ {illegal,0 }, /* 5c: 0110 0000 0101 1100 */
+ {illegal,0 }, /* 5d: 0110 0000 0101 1101 */
+ {illegal,0 }, /* 5e: 0110 0000 0101 1110 */
+ {illegal,0 }, /* 5f: 0110 0000 0101 1111 */
{SUB,"V,A" }, /* 60: 0110 0000 0110 0000 */
{SUB,"A,A" }, /* 61: 0110 0000 0110 0001 */
@@ -2168,14 +2168,14 @@ static const struct dasm_s dasm60[256] =
{EQA,"H,A" }, /* 7e: 0110 0000 0111 1110 */
{EQA,"L,A" }, /* 7f: 0110 0000 0111 1111 */
- {illegal,0 }, /* 80: 0110 0000 1000 0000 */
- {illegal,0 }, /* 81: 0110 0000 1000 0001 */
- {illegal,0 }, /* 82: 0110 0000 1000 0010 */
- {illegal,0 }, /* 83: 0110 0000 1000 0011 */
- {illegal,0 }, /* 84: 0110 0000 1000 0100 */
- {illegal,0 }, /* 85: 0110 0000 1000 0101 */
- {illegal,0 }, /* 86: 0110 0000 1000 0110 */
- {illegal,0 }, /* 87: 0110 0000 1000 0111 */
+ {illegal,0 }, /* 80: 0110 0000 1000 0000 */
+ {illegal,0 }, /* 81: 0110 0000 1000 0001 */
+ {illegal,0 }, /* 82: 0110 0000 1000 0010 */
+ {illegal,0 }, /* 83: 0110 0000 1000 0011 */
+ {illegal,0 }, /* 84: 0110 0000 1000 0100 */
+ {illegal,0 }, /* 85: 0110 0000 1000 0101 */
+ {illegal,0 }, /* 86: 0110 0000 1000 0110 */
+ {illegal,0 }, /* 87: 0110 0000 1000 0111 */
{ANA,"A,V" }, /* 88: 0110 0000 1000 1000 */
{ANA,"A,A" }, /* 89: 0110 0000 1000 1001 */
{ANA,"A,B" }, /* 8a: 0110 0000 1000 1010 */
@@ -2312,7 +2312,7 @@ static const struct dasm_s dasm64_7810[256] =
{MVI,"PB,%b" }, /* 01: 0110 0100 0000 0001 xxxx xxxx */
{MVI,"PC,%b" }, /* 02: 0110 0100 0000 0010 xxxx xxxx */
{MVI,"PD,%b" }, /* 03: 0110 0100 0000 0011 xxxx xxxx */
- {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */
+ {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */
{MVI,"PF,%b" }, /* 05: 0110 0100 0000 0101 xxxx xxxx */
{MVI,"MKH,%b" }, /* 06: 0110 0100 0000 0110 xxxx xxxx */
{MVI,"MKL,%b" }, /* 07: 0110 0100 0000 0111 xxxx xxxx */
@@ -2320,7 +2320,7 @@ static const struct dasm_s dasm64_7810[256] =
{ANI,"PB,%b" }, /* 09: 0110 0100 0000 1001 xxxx xxxx */
{ANI,"PC,%b" }, /* 0a: 0110 0100 0000 1010 xxxx xxxx */
{ANI,"PD,%b" }, /* 0b: 0110 0100 0000 1011 xxxx xxxx */
- {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
+ {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
{ANI,"PF,%b" }, /* 0d: 0110 0100 0000 1101 xxxx xxxx */
{ANI,"MKH,%b" }, /* 0e: 0110 0100 0000 1110 xxxx xxxx */
{ANI,"MKL,%b" }, /* 0f: 0110 0100 0000 1111 xxxx xxxx */
@@ -2329,7 +2329,7 @@ static const struct dasm_s dasm64_7810[256] =
{XRI,"PB,%b" }, /* 11: 0110 0100 0001 0001 xxxx xxxx */
{XRI,"PC,%b" }, /* 12: 0110 0100 0001 0010 xxxx xxxx */
{XRI,"PD,%b" }, /* 13: 0110 0100 0001 0011 xxxx xxxx */
- {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */
+ {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */
{XRI,"PF,%b" }, /* 15: 0110 0100 0001 0101 xxxx xxxx */
{XRI,"MKH,%b" }, /* 16: 0110 0100 0001 0110 xxxx xxxx */
{XRI,"MKL,%b" }, /* 17: 0110 0100 0001 0111 xxxx xxxx */
@@ -2337,7 +2337,7 @@ static const struct dasm_s dasm64_7810[256] =
{ORI,"PB,%b" }, /* 19: 0110 0100 0001 1001 xxxx xxxx */
{ORI,"PC,%b" }, /* 1a: 0110 0100 0001 1010 xxxx xxxx */
{ORI,"PD,%b" }, /* 1b: 0110 0100 0001 1011 xxxx xxxx */
- {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
+ {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
{ORI,"PF,%b" }, /* 1d: 0110 0100 0001 1101 xxxx xxxx */
{ORI,"MKH,%b" }, /* 1e: 0110 0100 0001 1110 xxxx xxxx */
{ORI,"MKL,%b" }, /* 1f: 0110 0100 0001 1111 xxxx xxxx */
@@ -2346,7 +2346,7 @@ static const struct dasm_s dasm64_7810[256] =
{ADINC,"PB,%b" }, /* 21: 0110 0100 0010 0001 xxxx xxxx */
{ADINC,"PC,%b" }, /* 22: 0110 0100 0010 0010 xxxx xxxx */
{ADINC,"PD,%b" }, /* 23: 0110 0100 0010 0011 xxxx xxxx */
- {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */
+ {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */
{ADINC,"PF,%b" }, /* 25: 0110 0100 0010 0101 xxxx xxxx */
{ADINC,"MKH,%b" }, /* 26: 0110 0100 0010 0110 xxxx xxxx */
{ADINC,"MKL,%b" }, /* 27: 0110 0100 0010 0111 xxxx xxxx */
@@ -2354,7 +2354,7 @@ static const struct dasm_s dasm64_7810[256] =
{GTI,"PB,%b" }, /* 29: 0110 0100 0010 1001 xxxx xxxx */
{GTI,"PC,%b" }, /* 2a: 0110 0100 0010 1010 xxxx xxxx */
{GTI,"PD,%b" }, /* 2b: 0110 0100 0010 1011 xxxx xxxx */
- {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
+ {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
{GTI,"PF,%b" }, /* 2d: 0110 0100 0010 1101 xxxx xxxx */
{GTI,"MKH,%b" }, /* 2e: 0110 0100 0010 1110 xxxx xxxx */
{GTI,"MKL,%b" }, /* 2f: 0110 0100 0010 1111 xxxx xxxx */
@@ -2363,7 +2363,7 @@ static const struct dasm_s dasm64_7810[256] =
{SUINB,"PB,%b" }, /* 31: 0110 0100 0011 0001 xxxx xxxx */
{SUINB,"PC,%b" }, /* 32: 0110 0100 0011 0010 xxxx xxxx */
{SUINB,"PD,%b" }, /* 33: 0110 0100 0011 0011 xxxx xxxx */
- {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */
+ {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */
{SUINB,"PF,%b" }, /* 35: 0110 0100 0011 0101 xxxx xxxx */
{SUINB,"MKH,%b" }, /* 36: 0110 0100 0011 0110 xxxx xxxx */
{SUINB,"MKL,%b" }, /* 37: 0110 0100 0011 0111 xxxx xxxx */
@@ -2371,7 +2371,7 @@ static const struct dasm_s dasm64_7810[256] =
{LTI,"PB,%b" }, /* 39: 0110 0100 0011 1001 xxxx xxxx */
{LTI,"PC,%b" }, /* 3a: 0110 0100 0011 1010 xxxx xxxx */
{LTI,"PD,%b" }, /* 3b: 0110 0100 0011 1011 xxxx xxxx */
- {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
+ {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
{LTI,"PF,%b" }, /* 3d: 0110 0100 0011 1101 xxxx xxxx */
{LTI,"MKH,%b" }, /* 3e: 0110 0100 0011 1110 xxxx xxxx */
{LTI,"MKL,%b" }, /* 3f: 0110 0100 0011 1111 xxxx xxxx */
@@ -2380,7 +2380,7 @@ static const struct dasm_s dasm64_7810[256] =
{ADI,"PB,%b" }, /* 41: 0110 0100 0100 0001 xxxx xxxx */
{ADI,"PC,%b" }, /* 42: 0110 0100 0100 0010 xxxx xxxx */
{ADI,"PD,%b" }, /* 43: 0110 0100 0100 0011 xxxx xxxx */
- {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */
+ {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */
{ADI,"PF,%b" }, /* 45: 0110 0100 0100 0101 xxxx xxxx */
{ADI,"MKH,%b" }, /* 46: 0110 0100 0100 0110 xxxx xxxx */
{ADI,"MKL,%b" }, /* 47: 0110 0100 0100 0111 xxxx xxxx */
@@ -2388,7 +2388,7 @@ static const struct dasm_s dasm64_7810[256] =
{ONI,"PB,%b" }, /* 49: 0110 0100 0100 1001 xxxx xxxx */
{ONI,"PC,%b" }, /* 4a: 0110 0100 0100 1010 xxxx xxxx */
{ONI,"PD,%b" }, /* 4b: 0110 0100 0100 1011 xxxx xxxx */
- {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
+ {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
{ONI,"PF,%b" }, /* 4d: 0110 0100 0100 1101 xxxx xxxx */
{ONI,"MKH,%b" }, /* 4e: 0110 0100 0100 1110 xxxx xxxx */
{ONI,"MKL,%b" }, /* 4f: 0110 0100 0100 1111 xxxx xxxx */
@@ -2397,7 +2397,7 @@ static const struct dasm_s dasm64_7810[256] =
{ACI,"PB,%b" }, /* 51: 0110 0100 0101 0001 xxxx xxxx */
{ACI,"PC,%b" }, /* 52: 0110 0100 0101 0010 xxxx xxxx */
{ACI,"PD,%b" }, /* 53: 0110 0100 0101 0011 xxxx xxxx */
- {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */
+ {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */
{ACI,"PF,%b" }, /* 55: 0110 0100 0101 0101 xxxx xxxx */
{ACI,"MKH,%b" }, /* 56: 0110 0100 0101 0110 xxxx xxxx */
{ACI,"MKL,%b" }, /* 57: 0110 0100 0101 0111 xxxx xxxx */
@@ -2405,7 +2405,7 @@ static const struct dasm_s dasm64_7810[256] =
{OFFI,"PB,%b" }, /* 59: 0110 0100 0101 1001 xxxx xxxx */
{OFFI,"PC,%b" }, /* 5a: 0110 0100 0101 1010 xxxx xxxx */
{OFFI,"PD,%b" }, /* 5b: 0110 0100 0101 1011 xxxx xxxx */
- {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
+ {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
{OFFI,"PF,%b" }, /* 5d: 0110 0100 0101 1101 xxxx xxxx */
{OFFI,"MKH,%b" }, /* 5e: 0110 0100 0101 1110 xxxx xxxx */
{OFFI,"MKL,%b" }, /* 5f: 0110 0100 0101 1111 xxxx xxxx */
@@ -2414,7 +2414,7 @@ static const struct dasm_s dasm64_7810[256] =
{SUI,"PB,%b" }, /* 61: 0110 0100 0110 0001 xxxx xxxx */
{SUI,"PC,%b" }, /* 62: 0110 0100 0110 0010 xxxx xxxx */
{SUI,"PD,%b" }, /* 63: 0110 0100 0110 0011 xxxx xxxx */
- {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */
+ {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */
{SUI,"PF,%b" }, /* 65: 0110 0100 0110 0101 xxxx xxxx */
{SUI,"MKH,%b" }, /* 66: 0110 0100 0110 0110 xxxx xxxx */
{SUI,"MKL,%b" }, /* 67: 0110 0100 0110 0111 xxxx xxxx */
@@ -2422,7 +2422,7 @@ static const struct dasm_s dasm64_7810[256] =
{NEI,"PB,%b" }, /* 69: 0110 0100 0110 1001 xxxx xxxx */
{NEI,"PC,%b" }, /* 6a: 0110 0100 0110 1010 xxxx xxxx */
{NEI,"PD,%b" }, /* 6b: 0110 0100 0110 1011 xxxx xxxx */
- {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
+ {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
{NEI,"PF,%b" }, /* 6d: 0110 0100 0110 1101 xxxx xxxx */
{NEI,"MKH,%b" }, /* 6e: 0110 0100 0110 1110 xxxx xxxx */
{NEI,"MKL,%b" }, /* 6f: 0110 0100 0110 1111 xxxx xxxx */
@@ -2431,7 +2431,7 @@ static const struct dasm_s dasm64_7810[256] =
{SBI,"PB,%b" }, /* 71: 0110 0100 0111 0001 xxxx xxxx */
{SBI,"PC,%b" }, /* 72: 0110 0100 0111 0010 xxxx xxxx */
{SBI,"PD,%b" }, /* 73: 0110 0100 0111 0011 xxxx xxxx */
- {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */
+ {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */
{SBI,"PF,%b" }, /* 75: 0110 0100 0111 0101 xxxx xxxx */
{SBI,"MKH,%b" }, /* 76: 0110 0100 0111 0110 xxxx xxxx */
{SBI,"MKL,%b" }, /* 77: 0110 0100 0111 0111 xxxx xxxx */
@@ -2439,146 +2439,146 @@ static const struct dasm_s dasm64_7810[256] =
{EQI,"PB,%b" }, /* 79: 0110 0100 0111 1001 xxxx xxxx */
{EQI,"PC,%b" }, /* 7a: 0110 0100 0111 1010 xxxx xxxx */
{EQI,"PD,%b" }, /* 7b: 0110 0100 0111 1011 xxxx xxxx */
- {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
+ {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
{EQI,"PF,%b" }, /* 7d: 0110 0100 0111 1101 xxxx xxxx */
{EQI,"MKH,%b" }, /* 7e: 0110 0100 0111 1110 xxxx xxxx */
{EQI,"MKL,%b" }, /* 7f: 0110 0100 0111 1111 xxxx xxxx */
- {MVI,"ANM,%b" }, /* 80: 0110 0100 1000 0000 xxxx xxxx */ /* 7810 */
+ {MVI,"ANM,%b" }, /* 80: 0110 0100 1000 0000 xxxx xxxx */ /* 7810 */
{MVI,"SMH,%b" }, /* 81: 0110 0100 1000 0001 xxxx xxxx */
- {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */
+ {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */
{MVI,"EOM,%b" }, /* 83: 0110 0100 1000 0011 xxxx xxxx */
- {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */
+ {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */
{MVI,"TMM,%b" }, /* 85: 0110 0100 1000 0101 xxxx xxxx */
- {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */
- {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */
- {ANI,"ANM,%b" }, /* 88: 0110 0100 1000 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */
+ {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */
+ {ANI,"ANM,%b" }, /* 88: 0110 0100 1000 1000 xxxx xxxx */ /* 7810 */
{ANI,"SMH,%b" }, /* 89: 0110 0100 1000 1001 xxxx xxxx */
- {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
+ {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
{ANI,"EOM,%b" }, /* 8b: 0110 0100 1000 1011 xxxx xxxx */
- {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
+ {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
{ANI,"TMM,%b" }, /* 8d: 0110 0100 1000 1101 xxxx xxxx */
- {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
- {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
+ {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
+ {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
- {XRI,"ANM,%b" }, /* 90: 0110 0100 1001 0000 xxxx xxxx */ /* 7810 */
+ {XRI,"ANM,%b" }, /* 90: 0110 0100 1001 0000 xxxx xxxx */ /* 7810 */
{XRI,"SMH,%b" }, /* 91: 0110 0100 1001 0001 xxxx xxxx */
- {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */
+ {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */
{XRI,"EOM,%b" }, /* 93: 0110 0100 1001 0011 xxxx xxxx */
- {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */
+ {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */
{XRI,"TMM,%b" }, /* 95: 0110 0100 1001 0101 xxxx xxxx */
- {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */
- {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */
- {ORI,"ANM,%b" }, /* 98: 0110 0100 1001 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */
+ {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */
+ {ORI,"ANM,%b" }, /* 98: 0110 0100 1001 1000 xxxx xxxx */ /* 7810 */
{ORI,"SMH,%b" }, /* 99: 0110 0100 1001 1001 xxxx xxxx */
- {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
+ {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
{ORI,"EOM,%b" }, /* 9b: 0110 0100 1001 1011 xxxx xxxx */
- {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
+ {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
{ORI,"TMM,%b" }, /* 9d: 0110 0100 1001 1101 xxxx xxxx */
- {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
- {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
+ {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
+ {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
- {ADINC,"ANM,%b" }, /* a0: 0110 0100 1010 0000 xxxx xxxx */ /* 7810 */
+ {ADINC,"ANM,%b" }, /* a0: 0110 0100 1010 0000 xxxx xxxx */ /* 7810 */
{ADINC,"SMH,%b" }, /* a1: 0110 0100 1010 0001 xxxx xxxx */
- {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */
+ {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */
{ADINC,"EOM,%b" }, /* a3: 0110 0100 1010 0011 xxxx xxxx */
- {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */
+ {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */
{ADINC,"TMM,%b" }, /* a5: 0110 0100 1010 0101 xxxx xxxx */
- {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */
- {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */
- {GTI,"ANM,%b" }, /* a8: 0110 0100 1010 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */
+ {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */
+ {GTI,"ANM,%b" }, /* a8: 0110 0100 1010 1000 xxxx xxxx */ /* 7810 */
{GTI,"SMH,%b" }, /* a9: 0110 0100 1010 1001 xxxx xxxx */
- {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */
+ {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */
{GTI,"EOM,%b" }, /* ab: 0110 0100 1010 1011 xxxx xxxx */
- {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */
+ {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */
{GTI,"TMM,%b" }, /* ad: 0110 0100 1010 1101 xxxx xxxx */
- {illegal,0 }, /* ae: 0110 0100 1010 1110 xxxx xxxx */
- {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */
+ {illegal,0 }, /* ae: 0110 0100 1010 1110 xxxx xxxx */
+ {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */
- {SUINB,"ANM,%b" }, /* b0: 0110 0100 1011 0000 xxxx xxxx */ /* 7810 */
+ {SUINB,"ANM,%b" }, /* b0: 0110 0100 1011 0000 xxxx xxxx */ /* 7810 */
{SUINB,"SMH,%b" }, /* b1: 0110 0100 1011 0001 xxxx xxxx */
- {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */
+ {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */
{SUINB,"EOM,%b" }, /* b3: 0110 0100 1011 0011 xxxx xxxx */
- {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */
+ {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */
{SUINB,"TMM,%b" }, /* b5: 0110 0100 1011 0101 xxxx xxxx */
- {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */
- {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */
- {LTI,"ANM,%b" }, /* b8: 0110 0100 1011 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */
+ {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */
+ {LTI,"ANM,%b" }, /* b8: 0110 0100 1011 1000 xxxx xxxx */ /* 7810 */
{LTI,"SMH,%b" }, /* b9: 0110 0100 1011 1001 xxxx xxxx */
- {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */
+ {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */
{LTI,"EOM,%b" }, /* bb: 0110 0100 1011 1011 xxxx xxxx */
- {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */
+ {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */
{LTI,"TMM,%b" }, /* bd: 0110 0100 1011 1101 xxxx xxxx */
- {illegal,0 }, /* be: 0110 0100 1011 1110 xxxx xxxx */
- {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */
+ {illegal,0 }, /* be: 0110 0100 1011 1110 xxxx xxxx */
+ {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */
- {ADI,"ANM,%b" }, /* c0: 0110 0100 1100 0000 xxxx xxxx */ /* 7810 */
+ {ADI,"ANM,%b" }, /* c0: 0110 0100 1100 0000 xxxx xxxx */ /* 7810 */
{ADI,"SMH,%b" }, /* c1: 0110 0100 1100 0001 xxxx xxxx */
- {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */
+ {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */
{ADI,"EOM,%b" }, /* c3: 0110 0100 1100 0011 xxxx xxxx */
- {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */
+ {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */
{ADI,"TMM,%b" }, /* c5: 0110 0100 1100 0101 xxxx xxxx */
- {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */
- {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */
- {ONI,"ANM,%b" }, /* c8: 0110 0100 1100 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */
+ {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */
+ {ONI,"ANM,%b" }, /* c8: 0110 0100 1100 1000 xxxx xxxx */ /* 7810 */
{ONI,"SMH,%b" }, /* c9: 0110 0100 1100 1001 xxxx xxxx */
- {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */
+ {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */
{ONI,"EOM,%b" }, /* cb: 0110 0100 1100 1011 xxxx xxxx */
- {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */
+ {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */
{ONI,"TMM,%b" }, /* cd: 0110 0100 1100 1101 xxxx xxxx */
- {illegal,0 }, /* ce: 0110 0100 1100 1110 xxxx xxxx */
- {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */
+ {illegal,0 }, /* ce: 0110 0100 1100 1110 xxxx xxxx */
+ {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */
- {ACI,"ANM,%b" }, /* d0: 0110 0100 1101 0000 xxxx xxxx */ /* 7810 */
+ {ACI,"ANM,%b" }, /* d0: 0110 0100 1101 0000 xxxx xxxx */ /* 7810 */
{ACI,"SMH,%b" }, /* d1: 0110 0100 1101 0001 xxxx xxxx */
- {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */
+ {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */
{ACI,"EOM,%b" }, /* d3: 0110 0100 1101 0011 xxxx xxxx */
- {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */
+ {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */
{ACI,"TMM,%b" }, /* d5: 0110 0100 1101 0101 xxxx xxxx */
- {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */
- {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */
- {OFFI,"ANM,%b" }, /* d8: 0110 0100 1101 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */
+ {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */
+ {OFFI,"ANM,%b" }, /* d8: 0110 0100 1101 1000 xxxx xxxx */ /* 7810 */
{OFFI,"SMH,%b" }, /* d9: 0110 0100 1101 1001 xxxx xxxx */
- {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */
+ {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */
{OFFI,"EOM,%b" }, /* db: 0110 0100 1101 1011 xxxx xxxx */
- {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */
+ {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */
{OFFI,"TMM,%b" }, /* dd: 0110 0100 1101 1101 xxxx xxxx */
- {illegal,0 }, /* de: 0110 0100 1101 1110 xxxx xxxx */
- {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */
+ {illegal,0 }, /* de: 0110 0100 1101 1110 xxxx xxxx */
+ {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */
- {SUI,"ANM,%b" }, /* e0: 0110 0100 1110 0000 xxxx xxxx */ /* 7810 */
+ {SUI,"ANM,%b" }, /* e0: 0110 0100 1110 0000 xxxx xxxx */ /* 7810 */
{SUI,"SMH,%b" }, /* e1: 0110 0100 1110 0001 xxxx xxxx */
- {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */
+ {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */
{SUI,"EOM,%b" }, /* e3: 0110 0100 1110 0011 xxxx xxxx */
- {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */
+ {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */
{SUI,"TMM,%b" }, /* e5: 0110 0100 1110 0101 xxxx xxxx */
- {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */
- {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */
- {NEI,"ANM,%b" }, /* e8: 0110 0100 1110 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */
+ {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */
+ {NEI,"ANM,%b" }, /* e8: 0110 0100 1110 1000 xxxx xxxx */ /* 7810 */
{NEI,"SMH,%b" }, /* e9: 0110 0100 1110 1001 xxxx xxxx */
- {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */
+ {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */
{NEI,"EOM,%b" }, /* eb: 0110 0100 1110 1011 xxxx xxxx */
- {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */
+ {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */
{NEI,"TMM,%b" }, /* ed: 0110 0100 1110 1101 xxxx xxxx */
- {illegal,0 }, /* ee: 0110 0100 1110 1110 xxxx xxxx */
- {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */
+ {illegal,0 }, /* ee: 0110 0100 1110 1110 xxxx xxxx */
+ {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */
- {SBI,"ANM,%b" }, /* f0: 0110 0100 1111 0000 xxxx xxxx */ /* 7810 */
+ {SBI,"ANM,%b" }, /* f0: 0110 0100 1111 0000 xxxx xxxx */ /* 7810 */
{SBI,"SMH,%b" }, /* f1: 0110 0100 1111 0001 xxxx xxxx */
- {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */
+ {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */
{SBI,"EOM,%b" }, /* f3: 0110 0100 1111 0011 xxxx xxxx */
- {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */
+ {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */
{SBI,"TMM,%b" }, /* f5: 0110 0100 1111 0101 xxxx xxxx */
- {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */
- {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */
- {EQI,"ANM,%b" }, /* f8: 0110 0100 1111 1000 xxxx xxxx */ /* 7810 */
+ {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */
+ {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */
+ {EQI,"ANM,%b" }, /* f8: 0110 0100 1111 1000 xxxx xxxx */ /* 7810 */
{EQI,"SMH,%b" }, /* f9: 0110 0100 1111 1001 xxxx xxxx */
- {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */
+ {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */
{EQI,"EOM,%b" }, /* fb: 0110 0100 1111 1011 xxxx xxxx */
- {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */
+ {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */
{EQI,"TMM,%b" }, /* fd: 0110 0100 1111 1101 xxxx xxxx */
- {illegal,0 }, /* fe: 0110 0100 1111 1110 xxxx xxxx */
- {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */
+ {illegal,0 }, /* fe: 0110 0100 1111 1110 xxxx xxxx */
+ {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */
};
static const struct dasm_s dasm64_7807[256] =
@@ -2587,7 +2587,7 @@ static const struct dasm_s dasm64_7807[256] =
{MVI,"PB,%b" }, /* 01: 0110 0100 0000 0001 xxxx xxxx */
{MVI,"PC,%b" }, /* 02: 0110 0100 0000 0010 xxxx xxxx */
{MVI,"PD,%b" }, /* 03: 0110 0100 0000 0011 xxxx xxxx */
- {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */
+ {illegal,0 }, /* 04: 0110 0100 0000 0100 xxxx xxxx */
{MVI,"PF,%b" }, /* 05: 0110 0100 0000 0101 xxxx xxxx */
{MVI,"MKH,%b" }, /* 06: 0110 0100 0000 0110 xxxx xxxx */
{MVI,"MKL,%b" }, /* 07: 0110 0100 0000 0111 xxxx xxxx */
@@ -2595,7 +2595,7 @@ static const struct dasm_s dasm64_7807[256] =
{ANI,"PB,%b" }, /* 09: 0110 0100 0000 1001 xxxx xxxx */
{ANI,"PC,%b" }, /* 0a: 0110 0100 0000 1010 xxxx xxxx */
{ANI,"PD,%b" }, /* 0b: 0110 0100 0000 1011 xxxx xxxx */
- {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
+ {illegal,0 }, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
{ANI,"PF,%b" }, /* 0d: 0110 0100 0000 1101 xxxx xxxx */
{ANI,"MKH,%b" }, /* 0e: 0110 0100 0000 1110 xxxx xxxx */
{ANI,"MKL,%b" }, /* 0f: 0110 0100 0000 1111 xxxx xxxx */
@@ -2604,7 +2604,7 @@ static const struct dasm_s dasm64_7807[256] =
{XRI,"PB,%b" }, /* 11: 0110 0100 0001 0001 xxxx xxxx */
{XRI,"PC,%b" }, /* 12: 0110 0100 0001 0010 xxxx xxxx */
{XRI,"PD,%b" }, /* 13: 0110 0100 0001 0011 xxxx xxxx */
- {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */
+ {illegal,0 }, /* 14: 0110 0100 0001 0100 xxxx xxxx */
{XRI,"PF,%b" }, /* 15: 0110 0100 0001 0101 xxxx xxxx */
{XRI,"MKH,%b" }, /* 16: 0110 0100 0001 0110 xxxx xxxx */
{XRI,"MKL,%b" }, /* 17: 0110 0100 0001 0111 xxxx xxxx */
@@ -2612,7 +2612,7 @@ static const struct dasm_s dasm64_7807[256] =
{ORI,"PB,%b" }, /* 19: 0110 0100 0001 1001 xxxx xxxx */
{ORI,"PC,%b" }, /* 1a: 0110 0100 0001 1010 xxxx xxxx */
{ORI,"PD,%b" }, /* 1b: 0110 0100 0001 1011 xxxx xxxx */
- {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
+ {illegal,0 }, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
{ORI,"PF,%b" }, /* 1d: 0110 0100 0001 1101 xxxx xxxx */
{ORI,"MKH,%b" }, /* 1e: 0110 0100 0001 1110 xxxx xxxx */
{ORI,"MKL,%b" }, /* 1f: 0110 0100 0001 1111 xxxx xxxx */
@@ -2621,7 +2621,7 @@ static const struct dasm_s dasm64_7807[256] =
{ADINC,"PB,%b" }, /* 21: 0110 0100 0010 0001 xxxx xxxx */
{ADINC,"PC,%b" }, /* 22: 0110 0100 0010 0010 xxxx xxxx */
{ADINC,"PD,%b" }, /* 23: 0110 0100 0010 0011 xxxx xxxx */
- {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */
+ {illegal,0 }, /* 24: 0110 0100 0010 0100 xxxx xxxx */
{ADINC,"PF,%b" }, /* 25: 0110 0100 0010 0101 xxxx xxxx */
{ADINC,"MKH,%b" }, /* 26: 0110 0100 0010 0110 xxxx xxxx */
{ADINC,"MKL,%b" }, /* 27: 0110 0100 0010 0111 xxxx xxxx */
@@ -2629,7 +2629,7 @@ static const struct dasm_s dasm64_7807[256] =
{GTI,"PB,%b" }, /* 29: 0110 0100 0010 1001 xxxx xxxx */
{GTI,"PC,%b" }, /* 2a: 0110 0100 0010 1010 xxxx xxxx */
{GTI,"PD,%b" }, /* 2b: 0110 0100 0010 1011 xxxx xxxx */
- {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
+ {illegal,0 }, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
{GTI,"PF,%b" }, /* 2d: 0110 0100 0010 1101 xxxx xxxx */
{GTI,"MKH,%b" }, /* 2e: 0110 0100 0010 1110 xxxx xxxx */
{GTI,"MKL,%b" }, /* 2f: 0110 0100 0010 1111 xxxx xxxx */
@@ -2638,7 +2638,7 @@ static const struct dasm_s dasm64_7807[256] =
{SUINB,"PB,%b" }, /* 31: 0110 0100 0011 0001 xxxx xxxx */
{SUINB,"PC,%b" }, /* 32: 0110 0100 0011 0010 xxxx xxxx */
{SUINB,"PD,%b" }, /* 33: 0110 0100 0011 0011 xxxx xxxx */
- {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */
+ {illegal,0 }, /* 34: 0110 0100 0011 0100 xxxx xxxx */
{SUINB,"PF,%b" }, /* 35: 0110 0100 0011 0101 xxxx xxxx */
{SUINB,"MKH,%b" }, /* 36: 0110 0100 0011 0110 xxxx xxxx */
{SUINB,"MKL,%b" }, /* 37: 0110 0100 0011 0111 xxxx xxxx */
@@ -2646,7 +2646,7 @@ static const struct dasm_s dasm64_7807[256] =
{LTI,"PB,%b" }, /* 39: 0110 0100 0011 1001 xxxx xxxx */
{LTI,"PC,%b" }, /* 3a: 0110 0100 0011 1010 xxxx xxxx */
{LTI,"PD,%b" }, /* 3b: 0110 0100 0011 1011 xxxx xxxx */
- {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
+ {illegal,0 }, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
{LTI,"PF,%b" }, /* 3d: 0110 0100 0011 1101 xxxx xxxx */
{LTI,"MKH,%b" }, /* 3e: 0110 0100 0011 1110 xxxx xxxx */
{LTI,"MKL,%b" }, /* 3f: 0110 0100 0011 1111 xxxx xxxx */
@@ -2655,7 +2655,7 @@ static const struct dasm_s dasm64_7807[256] =
{ADI,"PB,%b" }, /* 41: 0110 0100 0100 0001 xxxx xxxx */
{ADI,"PC,%b" }, /* 42: 0110 0100 0100 0010 xxxx xxxx */
{ADI,"PD,%b" }, /* 43: 0110 0100 0100 0011 xxxx xxxx */
- {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */
+ {illegal,0 }, /* 44: 0110 0100 0100 0100 xxxx xxxx */
{ADI,"PF,%b" }, /* 45: 0110 0100 0100 0101 xxxx xxxx */
{ADI,"MKH,%b" }, /* 46: 0110 0100 0100 0110 xxxx xxxx */
{ADI,"MKL,%b" }, /* 47: 0110 0100 0100 0111 xxxx xxxx */
@@ -2663,7 +2663,7 @@ static const struct dasm_s dasm64_7807[256] =
{ONI,"PB,%b" }, /* 49: 0110 0100 0100 1001 xxxx xxxx */
{ONI,"PC,%b" }, /* 4a: 0110 0100 0100 1010 xxxx xxxx */
{ONI,"PD,%b" }, /* 4b: 0110 0100 0100 1011 xxxx xxxx */
- {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
+ {illegal,0 }, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
{ONI,"PF,%b" }, /* 4d: 0110 0100 0100 1101 xxxx xxxx */
{ONI,"MKH,%b" }, /* 4e: 0110 0100 0100 1110 xxxx xxxx */
{ONI,"MKL,%b" }, /* 4f: 0110 0100 0100 1111 xxxx xxxx */
@@ -2672,7 +2672,7 @@ static const struct dasm_s dasm64_7807[256] =
{ACI,"PB,%b" }, /* 51: 0110 0100 0101 0001 xxxx xxxx */
{ACI,"PC,%b" }, /* 52: 0110 0100 0101 0010 xxxx xxxx */
{ACI,"PD,%b" }, /* 53: 0110 0100 0101 0011 xxxx xxxx */
- {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */
+ {illegal,0 }, /* 54: 0110 0100 0101 0100 xxxx xxxx */
{ACI,"PF,%b" }, /* 55: 0110 0100 0101 0101 xxxx xxxx */
{ACI,"MKH,%b" }, /* 56: 0110 0100 0101 0110 xxxx xxxx */
{ACI,"MKL,%b" }, /* 57: 0110 0100 0101 0111 xxxx xxxx */
@@ -2680,7 +2680,7 @@ static const struct dasm_s dasm64_7807[256] =
{OFFI,"PB,%b" }, /* 59: 0110 0100 0101 1001 xxxx xxxx */
{OFFI,"PC,%b" }, /* 5a: 0110 0100 0101 1010 xxxx xxxx */
{OFFI,"PD,%b" }, /* 5b: 0110 0100 0101 1011 xxxx xxxx */
- {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
+ {illegal,0 }, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
{OFFI,"PF,%b" }, /* 5d: 0110 0100 0101 1101 xxxx xxxx */
{OFFI,"MKH,%b" }, /* 5e: 0110 0100 0101 1110 xxxx xxxx */
{OFFI,"MKL,%b" }, /* 5f: 0110 0100 0101 1111 xxxx xxxx */
@@ -2689,7 +2689,7 @@ static const struct dasm_s dasm64_7807[256] =
{SUI,"PB,%b" }, /* 61: 0110 0100 0110 0001 xxxx xxxx */
{SUI,"PC,%b" }, /* 62: 0110 0100 0110 0010 xxxx xxxx */
{SUI,"PD,%b" }, /* 63: 0110 0100 0110 0011 xxxx xxxx */
- {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */
+ {illegal,0 }, /* 64: 0110 0100 0110 0100 xxxx xxxx */
{SUI,"PF,%b" }, /* 65: 0110 0100 0110 0101 xxxx xxxx */
{SUI,"MKH,%b" }, /* 66: 0110 0100 0110 0110 xxxx xxxx */
{SUI,"MKL,%b" }, /* 67: 0110 0100 0110 0111 xxxx xxxx */
@@ -2697,7 +2697,7 @@ static const struct dasm_s dasm64_7807[256] =
{NEI,"PB,%b" }, /* 69: 0110 0100 0110 1001 xxxx xxxx */
{NEI,"PC,%b" }, /* 6a: 0110 0100 0110 1010 xxxx xxxx */
{NEI,"PD,%b" }, /* 6b: 0110 0100 0110 1011 xxxx xxxx */
- {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
+ {illegal,0 }, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
{NEI,"PF,%b" }, /* 6d: 0110 0100 0110 1101 xxxx xxxx */
{NEI,"MKH,%b" }, /* 6e: 0110 0100 0110 1110 xxxx xxxx */
{NEI,"MKL,%b" }, /* 6f: 0110 0100 0110 1111 xxxx xxxx */
@@ -2706,7 +2706,7 @@ static const struct dasm_s dasm64_7807[256] =
{SBI,"PB,%b" }, /* 71: 0110 0100 0111 0001 xxxx xxxx */
{SBI,"PC,%b" }, /* 72: 0110 0100 0111 0010 xxxx xxxx */
{SBI,"PD,%b" }, /* 73: 0110 0100 0111 0011 xxxx xxxx */
- {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */
+ {illegal,0 }, /* 74: 0110 0100 0111 0100 xxxx xxxx */
{SBI,"PF,%b" }, /* 75: 0110 0100 0111 0101 xxxx xxxx */
{SBI,"MKH,%b" }, /* 76: 0110 0100 0111 0110 xxxx xxxx */
{SBI,"MKL,%b" }, /* 77: 0110 0100 0111 0111 xxxx xxxx */
@@ -2714,216 +2714,216 @@ static const struct dasm_s dasm64_7807[256] =
{EQI,"PB,%b" }, /* 79: 0110 0100 0111 1001 xxxx xxxx */
{EQI,"PC,%b" }, /* 7a: 0110 0100 0111 1010 xxxx xxxx */
{EQI,"PD,%b" }, /* 7b: 0110 0100 0111 1011 xxxx xxxx */
- {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
+ {illegal,0 }, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
{EQI,"PF,%b" }, /* 7d: 0110 0100 0111 1101 xxxx xxxx */
{EQI,"MKH,%b" }, /* 7e: 0110 0100 0111 1110 xxxx xxxx */
{EQI,"MKL,%b" }, /* 7f: 0110 0100 0111 1111 xxxx xxxx */
- {illegal,0 }, /* 80: 0110 0100 1000 0000 xxxx xxxx */
+ {illegal,0 }, /* 80: 0110 0100 1000 0000 xxxx xxxx */
{MVI,"SMH,%b" }, /* 81: 0110 0100 1000 0001 xxxx xxxx */
- {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */
+ {illegal,0 }, /* 82: 0110 0100 1000 0010 xxxx xxxx */
{MVI,"EOM,%b" }, /* 83: 0110 0100 1000 0011 xxxx xxxx */
- {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */
+ {illegal,0 }, /* 84: 0110 0100 1000 0100 xxxx xxxx */
{MVI,"TMM,%b" }, /* 85: 0110 0100 1000 0101 xxxx xxxx */
- {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */
- {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */
- {illegal,0 }, /* 88: 0110 0100 1000 1000 xxxx xxxx */
+ {illegal,0 }, /* 86: 0110 0100 1000 0110 xxxx xxxx */
+ {illegal,0 }, /* 87: 0110 0100 1000 0111 xxxx xxxx */
+ {illegal,0 }, /* 88: 0110 0100 1000 1000 xxxx xxxx */
{ANI,"SMH,%b" }, /* 89: 0110 0100 1000 1001 xxxx xxxx */
- {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
+ {illegal,0 }, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
{ANI,"EOM,%b" }, /* 8b: 0110 0100 1000 1011 xxxx xxxx */
- {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
+ {illegal,0 }, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
{ANI,"TMM,%b" }, /* 8d: 0110 0100 1000 1101 xxxx xxxx */
- {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
- {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
+ {illegal,0 }, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
+ {illegal,0 }, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
- {illegal,0 }, /* 90: 0110 0100 1001 0000 xxxx xxxx */
+ {illegal,0 }, /* 90: 0110 0100 1001 0000 xxxx xxxx */
{XRI,"SMH,%b" }, /* 91: 0110 0100 1001 0001 xxxx xxxx */
- {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */
+ {illegal,0 }, /* 92: 0110 0100 1001 0010 xxxx xxxx */
{XRI,"EOM,%b" }, /* 93: 0110 0100 1001 0011 xxxx xxxx */
- {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */
+ {illegal,0 }, /* 94: 0110 0100 1001 0100 xxxx xxxx */
{XRI,"TMM,%b" }, /* 95: 0110 0100 1001 0101 xxxx xxxx */
- {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */
- {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */
- {illegal,0 }, /* 98: 0110 0100 1001 1000 xxxx xxxx */
+ {illegal,0 }, /* 96: 0110 0100 1001 0110 xxxx xxxx */
+ {illegal,0 }, /* 97: 0110 0100 1001 0111 xxxx xxxx */
+ {illegal,0 }, /* 98: 0110 0100 1001 1000 xxxx xxxx */
{ORI,"SMH,%b" }, /* 99: 0110 0100 1001 1001 xxxx xxxx */
- {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
+ {illegal,0 }, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
{ORI,"EOM,%b" }, /* 9b: 0110 0100 1001 1011 xxxx xxxx */
- {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
+ {illegal,0 }, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
{ORI,"TMM,%b" }, /* 9d: 0110 0100 1001 1101 xxxx xxxx */
- {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
- {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
+ {illegal,0 }, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
+ {illegal,0 }, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
- {illegal,0 }, /* a0: 0110 0100 1010 0000 xxxx xxxx */
+ {illegal,0 }, /* a0: 0110 0100 1010 0000 xxxx xxxx */
{ADINC,"SMH,%b" }, /* a1: 0110 0100 1010 0001 xxxx xxxx */
- {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */
+ {illegal,0 }, /* a2: 0110 0100 1010 0010 xxxx xxxx */
{ADINC,"EOM,%b" }, /* a3: 0110 0100 1010 0011 xxxx xxxx */
- {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */
+ {illegal,0 }, /* a4: 0110 0100 1010 0100 xxxx xxxx */
{ADINC,"TMM,%b" }, /* a5: 0110 0100 1010 0101 xxxx xxxx */
- {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */
- {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */
- {illegal,0 }, /* a8: 0110 0100 1010 1000 xxxx xxxx */
+ {illegal,0 }, /* a6: 0110 0100 1010 0110 xxxx xxxx */
+ {illegal,0 }, /* a7: 0110 0100 1010 0111 xxxx xxxx */
+ {illegal,0 }, /* a8: 0110 0100 1010 1000 xxxx xxxx */
{GTI,"SMH,%b" }, /* a9: 0110 0100 1010 1001 xxxx xxxx */
- {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */
+ {illegal,0 }, /* aa: 0110 0100 1010 1010 xxxx xxxx */
{GTI,"EOM,%b" }, /* ab: 0110 0100 1010 1011 xxxx xxxx */
- {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */
+ {illegal,0 }, /* ac: 0110 0100 1010 1100 xxxx xxxx */
{GTI,"TMM,%b" }, /* ad: 0110 0100 1010 1101 xxxx xxxx */
{GTI,"PT,%b" }, /* ae: 0110 0100 1010 1110 xxxx xxxx */
- {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */
+ {illegal,0 }, /* af: 0110 0100 1010 1111 xxxx xxxx */
- {illegal,0 }, /* b0: 0110 0100 1011 0000 xxxx xxxx */
+ {illegal,0 }, /* b0: 0110 0100 1011 0000 xxxx xxxx */
{SUINB,"SMH,%b" }, /* b1: 0110 0100 1011 0001 xxxx xxxx */
- {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */
+ {illegal,0 }, /* b2: 0110 0100 1011 0010 xxxx xxxx */
{SUINB,"EOM,%b" }, /* b3: 0110 0100 1011 0011 xxxx xxxx */
- {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */
+ {illegal,0 }, /* b4: 0110 0100 1011 0100 xxxx xxxx */
{SUINB,"TMM,%b" }, /* b5: 0110 0100 1011 0101 xxxx xxxx */
- {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */
- {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */
- {illegal,0 }, /* b8: 0110 0100 1011 1000 xxxx xxxx */
+ {illegal,0 }, /* b6: 0110 0100 1011 0110 xxxx xxxx */
+ {illegal,0 }, /* b7: 0110 0100 1011 0111 xxxx xxxx */
+ {illegal,0 }, /* b8: 0110 0100 1011 1000 xxxx xxxx */
{LTI,"SMH,%b" }, /* b9: 0110 0100 1011 1001 xxxx xxxx */
- {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */
+ {illegal,0 }, /* ba: 0110 0100 1011 1010 xxxx xxxx */
{LTI,"EOM,%b" }, /* bb: 0110 0100 1011 1011 xxxx xxxx */
- {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */
+ {illegal,0 }, /* bc: 0110 0100 1011 1100 xxxx xxxx */
{LTI,"TMM,%b" }, /* bd: 0110 0100 1011 1101 xxxx xxxx */
{LTI,"PT,%b" }, /* be: 0110 0100 1011 1110 xxxx xxxx */
- {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */
+ {illegal,0 }, /* bf: 0110 0100 1011 1111 xxxx xxxx */
- {illegal,0 }, /* c0: 0110 0100 1100 0000 xxxx xxxx */
+ {illegal,0 }, /* c0: 0110 0100 1100 0000 xxxx xxxx */
{ADI,"SMH,%b" }, /* c1: 0110 0100 1100 0001 xxxx xxxx */
- {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */
+ {illegal,0 }, /* c2: 0110 0100 1100 0010 xxxx xxxx */
{ADI,"EOM,%b" }, /* c3: 0110 0100 1100 0011 xxxx xxxx */
- {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */
+ {illegal,0 }, /* c4: 0110 0100 1100 0100 xxxx xxxx */
{ADI,"TMM,%b" }, /* c5: 0110 0100 1100 0101 xxxx xxxx */
- {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */
- {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */
- {illegal,0 }, /* c8: 0110 0100 1100 1000 xxxx xxxx */
+ {illegal,0 }, /* c6: 0110 0100 1100 0110 xxxx xxxx */
+ {illegal,0 }, /* c7: 0110 0100 1100 0111 xxxx xxxx */
+ {illegal,0 }, /* c8: 0110 0100 1100 1000 xxxx xxxx */
{ONI,"SMH,%b" }, /* c9: 0110 0100 1100 1001 xxxx xxxx */
- {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */
+ {illegal,0 }, /* ca: 0110 0100 1100 1010 xxxx xxxx */
{ONI,"EOM,%b" }, /* cb: 0110 0100 1100 1011 xxxx xxxx */
- {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */
+ {illegal,0 }, /* cc: 0110 0100 1100 1100 xxxx xxxx */
{ONI,"TMM,%b" }, /* cd: 0110 0100 1100 1101 xxxx xxxx */
{ONI,"PT,%b" }, /* ce: 0110 0100 1100 1110 xxxx xxxx */
- {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */
+ {illegal,0 }, /* cf: 0110 0100 1100 1111 xxxx xxxx */
- {illegal,0 }, /* d0: 0110 0100 1101 0000 xxxx xxxx */
+ {illegal,0 }, /* d0: 0110 0100 1101 0000 xxxx xxxx */
{ACI,"SMH,%b" }, /* d1: 0110 0100 1101 0001 xxxx xxxx */
- {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */
+ {illegal,0 }, /* d2: 0110 0100 1101 0010 xxxx xxxx */
{ACI,"EOM,%b" }, /* d3: 0110 0100 1101 0011 xxxx xxxx */
- {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */
+ {illegal,0 }, /* d4: 0110 0100 1101 0100 xxxx xxxx */
{ACI,"TMM,%b" }, /* d5: 0110 0100 1101 0101 xxxx xxxx */
- {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */
- {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */
- {illegal,0 }, /* d8: 0110 0100 1101 1000 xxxx xxxx */
+ {illegal,0 }, /* d6: 0110 0100 1101 0110 xxxx xxxx */
+ {illegal,0 }, /* d7: 0110 0100 1101 0111 xxxx xxxx */
+ {illegal,0 }, /* d8: 0110 0100 1101 1000 xxxx xxxx */
{OFFI,"SMH,%b" }, /* d9: 0110 0100 1101 1001 xxxx xxxx */
- {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */
+ {illegal,0 }, /* da: 0110 0100 1101 1010 xxxx xxxx */
{OFFI,"EOM,%b" }, /* db: 0110 0100 1101 1011 xxxx xxxx */
- {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */
+ {illegal,0 }, /* dc: 0110 0100 1101 1100 xxxx xxxx */
{OFFI,"TMM,%b" }, /* dd: 0110 0100 1101 1101 xxxx xxxx */
{OFFI,"PT,%b" }, /* de: 0110 0100 1101 1110 xxxx xxxx */
- {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */
+ {illegal,0 }, /* df: 0110 0100 1101 1111 xxxx xxxx */
- {illegal,0 }, /* e0: 0110 0100 1110 0000 xxxx xxxx */
+ {illegal,0 }, /* e0: 0110 0100 1110 0000 xxxx xxxx */
{SUI,"SMH,%b" }, /* e1: 0110 0100 1110 0001 xxxx xxxx */
- {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */
+ {illegal,0 }, /* e2: 0110 0100 1110 0010 xxxx xxxx */
{SUI,"EOM,%b" }, /* e3: 0110 0100 1110 0011 xxxx xxxx */
- {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */
+ {illegal,0 }, /* e4: 0110 0100 1110 0100 xxxx xxxx */
{SUI,"TMM,%b" }, /* e5: 0110 0100 1110 0101 xxxx xxxx */
- {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */
- {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */
- {illegal,0 }, /* e8: 0110 0100 1110 1000 xxxx xxxx */
+ {illegal,0 }, /* e6: 0110 0100 1110 0110 xxxx xxxx */
+ {illegal,0 }, /* e7: 0110 0100 1110 0111 xxxx xxxx */
+ {illegal,0 }, /* e8: 0110 0100 1110 1000 xxxx xxxx */
{NEI,"SMH,%b" }, /* e9: 0110 0100 1110 1001 xxxx xxxx */
- {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */
+ {illegal,0 }, /* ea: 0110 0100 1110 1010 xxxx xxxx */
{NEI,"EOM,%b" }, /* eb: 0110 0100 1110 1011 xxxx xxxx */
- {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */
+ {illegal,0 }, /* ec: 0110 0100 1110 1100 xxxx xxxx */
{NEI,"TMM,%b" }, /* ed: 0110 0100 1110 1101 xxxx xxxx */
{NEI,"PT,%b" }, /* ee: 0110 0100 1110 1110 xxxx xxxx */
- {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */
+ {illegal,0 }, /* ef: 0110 0100 1110 1111 xxxx xxxx */
- {illegal,0 }, /* f0: 0110 0100 1111 0000 xxxx xxxx */
+ {illegal,0 }, /* f0: 0110 0100 1111 0000 xxxx xxxx */
{SBI,"SMH,%b" }, /* f1: 0110 0100 1111 0001 xxxx xxxx */
- {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */
+ {illegal,0 }, /* f2: 0110 0100 1111 0010 xxxx xxxx */
{SBI,"EOM,%b" }, /* f3: 0110 0100 1111 0011 xxxx xxxx */
- {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */
+ {illegal,0 }, /* f4: 0110 0100 1111 0100 xxxx xxxx */
{SBI,"TMM,%b" }, /* f5: 0110 0100 1111 0101 xxxx xxxx */
- {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */
- {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */
- {illegal,0 }, /* f8: 0110 0100 1111 1000 xxxx xxxx */
+ {illegal,0 }, /* f6: 0110 0100 1111 0110 xxxx xxxx */
+ {illegal,0 }, /* f7: 0110 0100 1111 0111 xxxx xxxx */
+ {illegal,0 }, /* f8: 0110 0100 1111 1000 xxxx xxxx */
{EQI,"SMH,%b" }, /* f9: 0110 0100 1111 1001 xxxx xxxx */
- {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */
+ {illegal,0 }, /* fa: 0110 0100 1111 1010 xxxx xxxx */
{EQI,"EOM,%b" }, /* fb: 0110 0100 1111 1011 xxxx xxxx */
- {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */
+ {illegal,0 }, /* fc: 0110 0100 1111 1100 xxxx xxxx */
{EQI,"TMM,%b" }, /* fd: 0110 0100 1111 1101 xxxx xxxx */
{EQI,"PT,%b" }, /* fe: 0110 0100 1111 1110 xxxx xxxx */
- {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */
+ {illegal,0 } /* ff: 0110 0100 1111 1111 xxxx xxxx */
};
/* prefix 70 */
static const struct dasm_s dasm70[256] =
{
- {illegal,0 }, /* 00: 0111 0000 0000 0000 */
- {illegal,0 }, /* 01: 0111 0000 0000 0001 */
- {illegal,0 }, /* 02: 0111 0000 0000 0010 */
- {illegal,0 }, /* 03: 0111 0000 0000 0011 */
- {illegal,0 }, /* 04: 0111 0000 0000 0100 */
- {illegal,0 }, /* 05: 0111 0000 0000 0101 */
- {illegal,0 }, /* 06: 0111 0000 0000 0110 */
- {illegal,0 }, /* 07: 0111 0000 0000 0111 */
- {illegal,0 }, /* 08: 0111 0000 0000 1000 */
- {illegal,0 }, /* 09: 0111 0000 0000 1001 */
- {illegal,0 }, /* 0a: 0111 0000 0000 1010 */
- {illegal,0 }, /* 0b: 0111 0000 0000 1011 */
- {illegal,0 }, /* 0c: 0111 0000 0000 1100 */
- {illegal,0 }, /* 0d: 0111 0000 0000 1101 */
+ {illegal,0 }, /* 00: 0111 0000 0000 0000 */
+ {illegal,0 }, /* 01: 0111 0000 0000 0001 */
+ {illegal,0 }, /* 02: 0111 0000 0000 0010 */
+ {illegal,0 }, /* 03: 0111 0000 0000 0011 */
+ {illegal,0 }, /* 04: 0111 0000 0000 0100 */
+ {illegal,0 }, /* 05: 0111 0000 0000 0101 */
+ {illegal,0 }, /* 06: 0111 0000 0000 0110 */
+ {illegal,0 }, /* 07: 0111 0000 0000 0111 */
+ {illegal,0 }, /* 08: 0111 0000 0000 1000 */
+ {illegal,0 }, /* 09: 0111 0000 0000 1001 */
+ {illegal,0 }, /* 0a: 0111 0000 0000 1010 */
+ {illegal,0 }, /* 0b: 0111 0000 0000 1011 */
+ {illegal,0 }, /* 0c: 0111 0000 0000 1100 */
+ {illegal,0 }, /* 0d: 0111 0000 0000 1101 */
{SSPD,"%w" }, /* 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */
{LSPD,"%w" }, /* 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */
- {illegal,0 }, /* 10: 0111 0000 0001 0000 */
- {illegal,0 }, /* 11: 0111 0000 0001 0001 */
- {illegal,0 }, /* 12: 0111 0000 0001 0010 */
- {illegal,0 }, /* 13: 0111 0000 0001 0011 */
- {illegal,0 }, /* 14: 0111 0000 0001 0100 */
- {illegal,0 }, /* 15: 0111 0000 0001 0101 */
- {illegal,0 }, /* 16: 0111 0000 0001 0110 */
- {illegal,0 }, /* 17: 0111 0000 0001 0111 */
- {illegal,0 }, /* 18: 0111 0000 0001 1000 */
- {illegal,0 }, /* 19: 0111 0000 0001 1001 */
- {illegal,0 }, /* 1a: 0111 0000 0001 1010 */
- {illegal,0 }, /* 1b: 0111 0000 0001 1011 */
- {illegal,0 }, /* 1c: 0111 0000 0001 1100 */
- {illegal,0 }, /* 1d: 0111 0000 0001 1101 */
+ {illegal,0 }, /* 10: 0111 0000 0001 0000 */
+ {illegal,0 }, /* 11: 0111 0000 0001 0001 */
+ {illegal,0 }, /* 12: 0111 0000 0001 0010 */
+ {illegal,0 }, /* 13: 0111 0000 0001 0011 */
+ {illegal,0 }, /* 14: 0111 0000 0001 0100 */
+ {illegal,0 }, /* 15: 0111 0000 0001 0101 */
+ {illegal,0 }, /* 16: 0111 0000 0001 0110 */
+ {illegal,0 }, /* 17: 0111 0000 0001 0111 */
+ {illegal,0 }, /* 18: 0111 0000 0001 1000 */
+ {illegal,0 }, /* 19: 0111 0000 0001 1001 */
+ {illegal,0 }, /* 1a: 0111 0000 0001 1010 */
+ {illegal,0 }, /* 1b: 0111 0000 0001 1011 */
+ {illegal,0 }, /* 1c: 0111 0000 0001 1100 */
+ {illegal,0 }, /* 1d: 0111 0000 0001 1101 */
{SBCD,"%w" }, /* 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */
{LBCD,"%w" }, /* 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */
- {illegal,0 }, /* 20: 0111 0000 0010 0000 */
- {illegal,0 }, /* 21: 0111 0000 0010 0001 */
- {illegal,0 }, /* 22: 0111 0000 0010 0010 */
- {illegal,0 }, /* 23: 0111 0000 0010 0011 */
- {illegal,0 }, /* 24: 0111 0000 0010 0100 */
- {illegal,0 }, /* 25: 0111 0000 0010 0101 */
- {illegal,0 }, /* 26: 0111 0000 0010 0110 */
- {illegal,0 }, /* 27: 0111 0000 0010 0111 */
- {illegal,0 }, /* 28: 0111 0000 0010 1000 */
- {illegal,0 }, /* 29: 0111 0000 0010 1001 */
- {illegal,0 }, /* 2a: 0111 0000 0010 1010 */
- {illegal,0 }, /* 2b: 0111 0000 0010 1011 */
- {illegal,0 }, /* 2c: 0111 0000 0010 1100 */
- {illegal,0 }, /* 2d: 0111 0000 0010 1101 */
+ {illegal,0 }, /* 20: 0111 0000 0010 0000 */
+ {illegal,0 }, /* 21: 0111 0000 0010 0001 */
+ {illegal,0 }, /* 22: 0111 0000 0010 0010 */
+ {illegal,0 }, /* 23: 0111 0000 0010 0011 */
+ {illegal,0 }, /* 24: 0111 0000 0010 0100 */
+ {illegal,0 }, /* 25: 0111 0000 0010 0101 */
+ {illegal,0 }, /* 26: 0111 0000 0010 0110 */
+ {illegal,0 }, /* 27: 0111 0000 0010 0111 */
+ {illegal,0 }, /* 28: 0111 0000 0010 1000 */
+ {illegal,0 }, /* 29: 0111 0000 0010 1001 */
+ {illegal,0 }, /* 2a: 0111 0000 0010 1010 */
+ {illegal,0 }, /* 2b: 0111 0000 0010 1011 */
+ {illegal,0 }, /* 2c: 0111 0000 0010 1100 */
+ {illegal,0 }, /* 2d: 0111 0000 0010 1101 */
{SDED,"%w" }, /* 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */
{LDED,"%w" }, /* 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */
- {illegal,0 }, /* 30: 0111 0000 0011 0000 */
- {illegal,0 }, /* 31: 0111 0000 0011 0001 */
- {illegal,0 }, /* 32: 0111 0000 0011 0010 */
- {illegal,0 }, /* 33: 0111 0000 0011 0011 */
- {illegal,0 }, /* 34: 0111 0000 0011 0100 */
- {illegal,0 }, /* 35: 0111 0000 0011 0101 */
- {illegal,0 }, /* 36: 0111 0000 0011 0110 */
- {illegal,0 }, /* 37: 0111 0000 0011 0111 */
- {illegal,0 }, /* 38: 0111 0000 0011 1000 */
- {illegal,0 }, /* 39: 0111 0000 0011 1001 */
- {illegal,0 }, /* 3a: 0111 0000 0011 1010 */
- {illegal,0 }, /* 3b: 0111 0000 0011 1011 */
- {illegal,0 }, /* 3c: 0111 0000 0011 1100 */
- {illegal,0 }, /* 3d: 0111 0000 0011 1101 */
+ {illegal,0 }, /* 30: 0111 0000 0011 0000 */
+ {illegal,0 }, /* 31: 0111 0000 0011 0001 */
+ {illegal,0 }, /* 32: 0111 0000 0011 0010 */
+ {illegal,0 }, /* 33: 0111 0000 0011 0011 */
+ {illegal,0 }, /* 34: 0111 0000 0011 0100 */
+ {illegal,0 }, /* 35: 0111 0000 0011 0101 */
+ {illegal,0 }, /* 36: 0111 0000 0011 0110 */
+ {illegal,0 }, /* 37: 0111 0000 0011 0111 */
+ {illegal,0 }, /* 38: 0111 0000 0011 1000 */
+ {illegal,0 }, /* 39: 0111 0000 0011 1001 */
+ {illegal,0 }, /* 3a: 0111 0000 0011 1010 */
+ {illegal,0 }, /* 3b: 0111 0000 0011 1011 */
+ {illegal,0 }, /* 3c: 0111 0000 0011 1100 */
+ {illegal,0 }, /* 3d: 0111 0000 0011 1101 */
{SHLD,"%w" }, /* 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */
{LHLD,"%w" }, /* 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */
@@ -2931,44 +2931,44 @@ static const struct dasm_s dasm70[256] =
{EADD,"EA,A" }, /* 41: 0111 0000 0100 0001 */
{EADD,"EA,B" }, /* 42: 0111 0000 0100 0010 */
{EADD,"EA,C" }, /* 43: 0111 0000 0100 0011 */
- {illegal,0 }, /* 44: 0111 0000 0100 0100 */
- {illegal,0 }, /* 45: 0111 0000 0100 0101 */
- {illegal,0 }, /* 46: 0111 0000 0100 0110 */
- {illegal,0 }, /* 47: 0111 0000 0100 0111 */
- {illegal,0 }, /* 48: 0111 0000 0100 1000 */
- {illegal,0 }, /* 49: 0111 0000 0100 1001 */
- {illegal,0 }, /* 4a: 0111 0000 0100 1010 */
- {illegal,0 }, /* 4b: 0111 0000 0100 1011 */
- {illegal,0 }, /* 4c: 0111 0000 0100 1100 */
- {illegal,0 }, /* 4d: 0111 0000 0100 1101 */
- {illegal,0 }, /* 4e: 0111 0000 0100 1110 */
- {illegal,0 }, /* 4f: 0111 0000 0100 1111 */
-
- {illegal,0 }, /* 50: 0111 0000 0101 0000 */
- {illegal,0 }, /* 51: 0111 0000 0101 0001 */
- {illegal,0 }, /* 52: 0111 0000 0101 0010 */
- {illegal,0 }, /* 53: 0111 0000 0101 0011 */
- {illegal,0 }, /* 54: 0111 0000 0101 0100 */
- {illegal,0 }, /* 55: 0111 0000 0101 0101 */
- {illegal,0 }, /* 56: 0111 0000 0101 0110 */
- {illegal,0 }, /* 57: 0111 0000 0101 0111 */
- {illegal,0 }, /* 58: 0111 0000 0101 1000 */
- {illegal,0 }, /* 59: 0111 0000 0101 1001 */
- {illegal,0 }, /* 5a: 0111 0000 0101 1010 */
- {illegal,0 }, /* 5b: 0111 0000 0101 1011 */
- {illegal,0 }, /* 5c: 0111 0000 0101 1100 */
- {illegal,0 }, /* 5d: 0111 0000 0101 1101 */
- {illegal,0 }, /* 5e: 0111 0000 0101 1110 */
- {illegal,0 }, /* 5f: 0111 0000 0101 1111 */
+ {illegal,0 }, /* 44: 0111 0000 0100 0100 */
+ {illegal,0 }, /* 45: 0111 0000 0100 0101 */
+ {illegal,0 }, /* 46: 0111 0000 0100 0110 */
+ {illegal,0 }, /* 47: 0111 0000 0100 0111 */
+ {illegal,0 }, /* 48: 0111 0000 0100 1000 */
+ {illegal,0 }, /* 49: 0111 0000 0100 1001 */
+ {illegal,0 }, /* 4a: 0111 0000 0100 1010 */
+ {illegal,0 }, /* 4b: 0111 0000 0100 1011 */
+ {illegal,0 }, /* 4c: 0111 0000 0100 1100 */
+ {illegal,0 }, /* 4d: 0111 0000 0100 1101 */
+ {illegal,0 }, /* 4e: 0111 0000 0100 1110 */
+ {illegal,0 }, /* 4f: 0111 0000 0100 1111 */
+
+ {illegal,0 }, /* 50: 0111 0000 0101 0000 */
+ {illegal,0 }, /* 51: 0111 0000 0101 0001 */
+ {illegal,0 }, /* 52: 0111 0000 0101 0010 */
+ {illegal,0 }, /* 53: 0111 0000 0101 0011 */
+ {illegal,0 }, /* 54: 0111 0000 0101 0100 */
+ {illegal,0 }, /* 55: 0111 0000 0101 0101 */
+ {illegal,0 }, /* 56: 0111 0000 0101 0110 */
+ {illegal,0 }, /* 57: 0111 0000 0101 0111 */
+ {illegal,0 }, /* 58: 0111 0000 0101 1000 */
+ {illegal,0 }, /* 59: 0111 0000 0101 1001 */
+ {illegal,0 }, /* 5a: 0111 0000 0101 1010 */
+ {illegal,0 }, /* 5b: 0111 0000 0101 1011 */
+ {illegal,0 }, /* 5c: 0111 0000 0101 1100 */
+ {illegal,0 }, /* 5d: 0111 0000 0101 1101 */
+ {illegal,0 }, /* 5e: 0111 0000 0101 1110 */
+ {illegal,0 }, /* 5f: 0111 0000 0101 1111 */
{ESUB,"EA,V" }, /* 60: 0111 0000 0110 0000 */
{ESUB,"EA,A" }, /* 61: 0111 0000 0110 0001 */
{ESUB,"EA,B" }, /* 62: 0111 0000 0110 0010 */
{ESUB,"EA,C" }, /* 63: 0111 0000 0110 0011 */
- {illegal,0 }, /* 64: 0111 0000 0110 0100 */
- {illegal,0 }, /* 65: 0111 0000 0110 0101 */
- {illegal,0 }, /* 66: 0111 0000 0110 0110 */
- {illegal,0 }, /* 67: 0111 0000 0110 0111 */
+ {illegal,0 }, /* 64: 0111 0000 0110 0100 */
+ {illegal,0 }, /* 65: 0111 0000 0110 0101 */
+ {illegal,0 }, /* 66: 0111 0000 0110 0110 */
+ {illegal,0 }, /* 67: 0111 0000 0110 0111 */
{MOV,"V,(%w)" }, /* 68: 0111 0000 0110 1000 llll llll hhhh hhhh */
{MOV,"A,(%w)" }, /* 69: 0111 0000 0110 1001 llll llll hhhh hhhh */
{MOV,"B,(%w)" }, /* 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */
@@ -2978,14 +2978,14 @@ static const struct dasm_s dasm70[256] =
{MOV,"H,(%w)" }, /* 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */
{MOV,"L,(%w)" }, /* 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */
- {illegal,0 }, /* 70: 0111 0000 0111 0000 */
- {illegal,0 }, /* 71: 0111 0000 0111 0001 */
- {illegal,0 }, /* 72: 0111 0000 0111 0010 */
- {illegal,0 }, /* 73: 0111 0000 0111 0011 */
- {illegal,0 }, /* 74: 0111 0000 0111 0100 */
- {illegal,0 }, /* 75: 0111 0000 0111 0101 */
- {illegal,0 }, /* 76: 0111 0000 0111 0110 */
- {illegal,0 }, /* 77: 0111 0000 0111 0111 */
+ {illegal,0 }, /* 70: 0111 0000 0111 0000 */
+ {illegal,0 }, /* 71: 0111 0000 0111 0001 */
+ {illegal,0 }, /* 72: 0111 0000 0111 0010 */
+ {illegal,0 }, /* 73: 0111 0000 0111 0011 */
+ {illegal,0 }, /* 74: 0111 0000 0111 0100 */
+ {illegal,0 }, /* 75: 0111 0000 0111 0101 */
+ {illegal,0 }, /* 76: 0111 0000 0111 0110 */
+ {illegal,0 }, /* 77: 0111 0000 0111 0111 */
{MOV,"(%w),V" }, /* 78: 0111 0000 0111 1000 llll llll hhhh hhhh */
{MOV,"(%w),A" }, /* 79: 0111 0000 0111 1001 llll llll hhhh hhhh */
{MOV,"(%w),B" }, /* 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */
@@ -2995,15 +2995,15 @@ static const struct dasm_s dasm70[256] =
{MOV,"(%w),H" }, /* 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */
{MOV,"(%w),L" }, /* 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */
- {illegal,0 }, /* 80: 0111 0000 1000 0000 */
- {illegal,0 }, /* 81: 0111 0000 1000 0001 */
- {illegal,0 }, /* 82: 0111 0000 1000 0010 */
- {illegal,0 }, /* 83: 0111 0000 1000 0011 */
- {illegal,0 }, /* 84: 0111 0000 1000 0100 */
- {illegal,0 }, /* 85: 0111 0000 1000 0101 */
- {illegal,0 }, /* 86: 0111 0000 1000 0110 */
- {illegal,0 }, /* 87: 0111 0000 1000 0111 */
- {illegal,0 }, /* 88: 0111 0000 1000 1000 */
+ {illegal,0 }, /* 80: 0111 0000 1000 0000 */
+ {illegal,0 }, /* 81: 0111 0000 1000 0001 */
+ {illegal,0 }, /* 82: 0111 0000 1000 0010 */
+ {illegal,0 }, /* 83: 0111 0000 1000 0011 */
+ {illegal,0 }, /* 84: 0111 0000 1000 0100 */
+ {illegal,0 }, /* 85: 0111 0000 1000 0101 */
+ {illegal,0 }, /* 86: 0111 0000 1000 0110 */
+ {illegal,0 }, /* 87: 0111 0000 1000 0111 */
+ {illegal,0 }, /* 88: 0111 0000 1000 1000 */
{ANAX,"(BC)" }, /* 89: 0111 0000 1000 1001 */
{ANAX,"(DE)" }, /* 8a: 0111 0000 1000 1010 */
{ANAX,"(HL)" }, /* 8b: 0111 0000 1000 1011 */
@@ -3012,7 +3012,7 @@ static const struct dasm_s dasm70[256] =
{ANAX,"(DE-)" }, /* 8e: 0111 0000 1000 1110 */
{ANAX,"(HL-)" }, /* 8f: 0111 0000 1000 1111 */
- {illegal,0 }, /* 90: 0111 0000 1001 0000 */
+ {illegal,0 }, /* 90: 0111 0000 1001 0000 */
{XRAX,"(BC)" }, /* 91: 0111 0000 1001 0001 */
{XRAX,"(DE)" }, /* 92: 0111 0000 1001 0010 */
{XRAX,"(HL)" }, /* 93: 0111 0000 1001 0011 */
@@ -3020,16 +3020,16 @@ static const struct dasm_s dasm70[256] =
{XRAX,"(HL+)" }, /* 95: 0111 0000 1001 0101 */
{XRAX,"(DE-)" }, /* 96: 0111 0000 1001 0110 */
{XRAX,"(HL-)" }, /* 97: 0111 0000 1001 0111 */
- {illegal,0 }, /* 98: 0111 0000 1001 1000 */
- {ORAX,"(BC)" }, /* 99: 0111 0000 1001 1001 */
- {ORAX,"(DE)" }, /* 9a: 0111 0000 1001 1010 */
- {ORAX,"(HL)" }, /* 9b: 0111 0000 1001 1011 */
- {ORAX,"(DE+)" }, /* 9c: 0111 0000 1001 1100 */
- {ORAX,"(HL+)" }, /* 9d: 0111 0000 1001 1101 */
- {ORAX,"(DE-)" }, /* 9e: 0111 0000 1001 1110 */
- {ORAX,"(HL-)" }, /* 9f: 0111 0000 1001 1111 */
-
- {illegal,0 }, /* a0: 0111 0000 1010 0000 */
+ {illegal,0 }, /* 98: 0111 0000 1001 1000 */
+ {ORAX,"(BC)" }, /* 99: 0111 0000 1001 1001 */
+ {ORAX,"(DE)" }, /* 9a: 0111 0000 1001 1010 */
+ {ORAX,"(HL)" }, /* 9b: 0111 0000 1001 1011 */
+ {ORAX,"(DE+)" }, /* 9c: 0111 0000 1001 1100 */
+ {ORAX,"(HL+)" }, /* 9d: 0111 0000 1001 1101 */
+ {ORAX,"(DE-)" }, /* 9e: 0111 0000 1001 1110 */
+ {ORAX,"(HL-)" }, /* 9f: 0111 0000 1001 1111 */
+
+ {illegal,0 }, /* a0: 0111 0000 1010 0000 */
{ADDNCX,"(BC)" }, /* a1: 0111 0000 1010 0001 */
{ADDNCX,"(DE)" }, /* a2: 0111 0000 1010 0010 */
{ADDNCX,"(HL)" }, /* a3: 0111 0000 1010 0011 */
@@ -3037,7 +3037,7 @@ static const struct dasm_s dasm70[256] =
{ADDNCX,"(HL+)" }, /* a5: 0111 0000 1010 0101 */
{ADDNCX,"(DE-)" }, /* a6: 0111 0000 1010 0110 */
{ADDNCX,"(HL-)" }, /* a7: 0111 0000 1010 0111 */
- {illegal,0 }, /* a8: 0111 0000 1010 1000 */
+ {illegal,0 }, /* a8: 0111 0000 1010 1000 */
{GTAX,"(BC)" }, /* a9: 0111 0000 1010 1001 */
{GTAX,"(DE)" }, /* aa: 0111 0000 1010 1010 */
{GTAX,"(HL)" }, /* ab: 0111 0000 1010 1011 */
@@ -3046,7 +3046,7 @@ static const struct dasm_s dasm70[256] =
{GTAX,"(DE-)" }, /* ae: 0111 0000 1010 1110 */
{GTAX,"(HL-)" }, /* af: 0111 0000 1010 1111 */
- {illegal,0 }, /* b0: 0111 0000 1011 0000 */
+ {illegal,0 }, /* b0: 0111 0000 1011 0000 */
{SUBNBX,"(BC)" }, /* b1: 0111 0000 1011 0001 */
{SUBNBX,"(DE)" }, /* b2: 0111 0000 1011 0010 */
{SUBNBX,"(HL)" }, /* b3: 0111 0000 1011 0011 */
@@ -3054,7 +3054,7 @@ static const struct dasm_s dasm70[256] =
{SUBNBX,"(HL+)" }, /* b5: 0111 0000 1011 0101 */
{SUBNBX,"(DE-)" }, /* b6: 0111 0000 1011 0110 */
{SUBNBX,"(HL-)" }, /* b7: 0111 0000 1011 0111 */
- {illegal,0 }, /* b8: 0111 0000 1011 1000 */
+ {illegal,0 }, /* b8: 0111 0000 1011 1000 */
{LTAX,"(BC)" }, /* b9: 0111 0000 1011 1001 */
{LTAX,"(DE)" }, /* ba: 0111 0000 1011 1010 */
{LTAX,"(HL)" }, /* bb: 0111 0000 1011 1011 */
@@ -3063,7 +3063,7 @@ static const struct dasm_s dasm70[256] =
{LTAX,"(DE-)" }, /* be: 0111 0000 1011 1110 */
{LTAX,"(HL-)" }, /* bf: 0111 0000 1011 1111 */
- {illegal,0 }, /* c0: 0111 0000 1100 0000 */
+ {illegal,0 }, /* c0: 0111 0000 1100 0000 */
{ADDX,"(BC)" }, /* c1: 0111 0000 1100 0001 */
{ADDX,"(DE)" }, /* c2: 0111 0000 1100 0010 */
{ADDX,"(HL)" }, /* c3: 0111 0000 1100 0011 */
@@ -3071,7 +3071,7 @@ static const struct dasm_s dasm70[256] =
{ADDX,"(HL+)" }, /* c5: 0111 0000 1100 0101 */
{ADDX,"(DE-)" }, /* c6: 0111 0000 1100 0110 */
{ADDX,"(HL-)" }, /* c7: 0111 0000 1100 0111 */
- {illegal,0 }, /* c8: 0111 0000 1100 1000 */
+ {illegal,0 }, /* c8: 0111 0000 1100 1000 */
{ONAX,"(BC)" }, /* c9: 0111 0000 1100 1001 */
{ONAX,"(DE)" }, /* ca: 0111 0000 1100 1010 */
{ONAX,"(HL)" }, /* cb: 0111 0000 1100 1011 */
@@ -3080,7 +3080,7 @@ static const struct dasm_s dasm70[256] =
{ONAX,"(DE-)" }, /* ce: 0111 0000 1100 1110 */
{ONAX,"(HL-)" }, /* cf: 0111 0000 1100 1111 */
- {illegal,0 }, /* d0: 0111 0000 1101 0000 */
+ {illegal,0 }, /* d0: 0111 0000 1101 0000 */
{ADCX,"(BC)" }, /* d1: 0111 0000 1101 0001 */
{ADCX,"(DE)" }, /* d2: 0111 0000 1101 0010 */
{ADCX,"(HL)" }, /* d3: 0111 0000 1101 0011 */
@@ -3088,7 +3088,7 @@ static const struct dasm_s dasm70[256] =
{ADCX,"(HL+)" }, /* d5: 0111 0000 1101 0101 */
{ADCX,"(DE-)" }, /* d6: 0111 0000 1101 0110 */
{ADCX,"(HL-)" }, /* d7: 0111 0000 1101 0111 */
- {illegal,0 }, /* d8: 0111 0000 1101 1000 */
+ {illegal,0 }, /* d8: 0111 0000 1101 1000 */
{OFFAX,"(BC)" }, /* d9: 0111 0000 1101 1001 */
{OFFAX,"(DE)" }, /* da: 0111 0000 1101 1010 */
{OFFAX,"(HL)" }, /* db: 0111 0000 1101 1011 */
@@ -3097,7 +3097,7 @@ static const struct dasm_s dasm70[256] =
{OFFAX,"(DE-)" }, /* de: 0111 0000 1101 1110 */
{OFFAX,"(HL-)" }, /* df: 0111 0000 1101 1111 */
- {illegal,0 }, /* e0: 0111 0000 1110 0000 */
+ {illegal,0 }, /* e0: 0111 0000 1110 0000 */
{SUBX,"(BC)" }, /* e1: 0111 0000 1110 0001 */
{SUBX,"(DE)" }, /* e2: 0111 0000 1110 0010 */
{SUBX,"(HL)" }, /* e3: 0111 0000 1110 0011 */
@@ -3105,7 +3105,7 @@ static const struct dasm_s dasm70[256] =
{SUBX,"(HL+)" }, /* e5: 0111 0000 1110 0101 */
{SUBX,"(DE-)" }, /* e6: 0111 0000 1110 0110 */
{SUBX,"(HL-)" }, /* e7: 0111 0000 1110 0111 */
- {illegal,0 }, /* e8: 0111 0000 1110 1000 */
+ {illegal,0 }, /* e8: 0111 0000 1110 1000 */
{NEAX,"(BC)" }, /* e9: 0111 0000 1110 1001 */
{NEAX,"(DE)" }, /* ea: 0111 0000 1110 1010 */
{NEAX,"(HL)" }, /* eb: 0111 0000 1110 1011 */
@@ -3114,7 +3114,7 @@ static const struct dasm_s dasm70[256] =
{NEAX,"(DE-)" }, /* ee: 0111 0000 1110 1110 */
{NEAX,"(HL-)" }, /* ef: 0111 0000 1110 1111 */
- {illegal,0 }, /* f0: 0111 0000 1111 0000 */
+ {illegal,0 }, /* f0: 0111 0000 1111 0000 */
{SBBX,"(BC)" }, /* f1: 0111 0000 1111 0001 */
{SBBX,"(DE)" }, /* f2: 0111 0000 1111 0010 */
{SBBX,"(HL)" }, /* f3: 0111 0000 1111 0011 */
@@ -3122,7 +3122,7 @@ static const struct dasm_s dasm70[256] =
{SBBX,"(HL+)" }, /* f5: 0111 0000 1111 0101 */
{SBBX,"(DE-)" }, /* f6: 0111 0000 1111 0110 */
{SBBX,"(HL-)" }, /* f7: 0111 0000 1111 0111 */
- {illegal,0 }, /* f8: 0111 0000 1111 1000 */
+ {illegal,0 }, /* f8: 0111 0000 1111 1000 */
{EQAX,"(BC)" }, /* f9: 0111 0000 1111 1001 */
{EQAX,"(DE)" }, /* fa: 0111 0000 1111 1010 */
{EQAX,"(HL)" }, /* fb: 0111 0000 1111 1011 */
@@ -3135,14 +3135,14 @@ static const struct dasm_s dasm70[256] =
/* prefix 74 */
static const struct dasm_s dasm74[256] =
{
- {illegal,0 }, /* 00: 0111 0100 0000 0000 */
- {illegal,0 }, /* 01: 0111 0100 0000 0001 */
- {illegal,0 }, /* 02: 0111 0100 0000 0010 */
- {illegal,0 }, /* 03: 0111 0100 0000 0011 */
- {illegal,0 }, /* 04: 0111 0100 0000 0100 */
- {illegal,0 }, /* 05: 0111 0100 0000 0101 */
- {illegal,0 }, /* 06: 0111 0100 0000 0110 */
- {illegal,0 }, /* 07: 0111 0100 0000 0111 */
+ {illegal,0 }, /* 00: 0111 0100 0000 0000 */
+ {illegal,0 }, /* 01: 0111 0100 0000 0001 */
+ {illegal,0 }, /* 02: 0111 0100 0000 0010 */
+ {illegal,0 }, /* 03: 0111 0100 0000 0011 */
+ {illegal,0 }, /* 04: 0111 0100 0000 0100 */
+ {illegal,0 }, /* 05: 0111 0100 0000 0101 */
+ {illegal,0 }, /* 06: 0111 0100 0000 0110 */
+ {illegal,0 }, /* 07: 0111 0100 0000 0111 */
{ANI,"V,%b" }, /* 08: 0111 0100 0000 1000 xxxx xxxx */
{ANI,"A,%b" }, /* 09: 0111 0100 0000 1001 xxxx xxxx */
{ANI,"B,%b" }, /* 0a: 0111 0100 0000 1010 xxxx xxxx */
@@ -3271,138 +3271,138 @@ static const struct dasm_s dasm74[256] =
{EQI,"H,%b" }, /* 7e: 0111 0100 0111 1110 xxxx xxxx */
{EQI,"L,%b" }, /* 7f: 0111 0100 0111 1111 xxxx xxxx */
- {illegal,0 }, /* 80: 0111 0100 1000 0000 */
- {illegal,0 }, /* 81: 0111 0100 1000 0001 */
- {illegal,0 }, /* 82: 0111 0100 1000 0010 */
- {illegal,0 }, /* 83: 0111 0100 1000 0011 */
- {illegal,0 }, /* 84: 0111 0100 1000 0100 */
- {illegal,0 }, /* 85: 0111 0100 1000 0101 */
- {illegal,0 }, /* 86: 0111 0100 1000 0110 */
- {illegal,0 }, /* 87: 0111 0100 1000 0111 */
+ {illegal,0 }, /* 80: 0111 0100 1000 0000 */
+ {illegal,0 }, /* 81: 0111 0100 1000 0001 */
+ {illegal,0 }, /* 82: 0111 0100 1000 0010 */
+ {illegal,0 }, /* 83: 0111 0100 1000 0011 */
+ {illegal,0 }, /* 84: 0111 0100 1000 0100 */
+ {illegal,0 }, /* 85: 0111 0100 1000 0101 */
+ {illegal,0 }, /* 86: 0111 0100 1000 0110 */
+ {illegal,0 }, /* 87: 0111 0100 1000 0111 */
{ANAW,"%a" }, /* 88: 0111 0100 1000 1000 oooo oooo */
- {illegal,0 }, /* 89: 0111 0100 1000 1001 */
- {illegal,0 }, /* 8a: 0111 0100 1000 1010 */
- {illegal,0 }, /* 8b: 0111 0100 1000 1011 */
- {illegal,0 }, /* 8c: 0111 0100 1000 1100 */
+ {illegal,0 }, /* 89: 0111 0100 1000 1001 */
+ {illegal,0 }, /* 8a: 0111 0100 1000 1010 */
+ {illegal,0 }, /* 8b: 0111 0100 1000 1011 */
+ {illegal,0 }, /* 8c: 0111 0100 1000 1100 */
{DAN,"EA,BC" }, /* 8d: 0111 0100 1000 1101 */
{DAN,"EA,DE" }, /* 8e: 0111 0100 1000 1110 */
{DAN,"EA,HL" }, /* 8f: 0111 0100 1000 1111 */
{XRAW,"%a" }, /* 90: 0111 0100 1001 0000 oooo oooo */
- {illegal,0 }, /* 91: 0111 0100 1001 0001 */
- {illegal,0 }, /* 92: 0111 0100 1001 0010 */
- {illegal,0 }, /* 93: 0111 0100 1001 0011 */
- {illegal,0 }, /* 94: 0111 0100 1001 0100 */
+ {illegal,0 }, /* 91: 0111 0100 1001 0001 */
+ {illegal,0 }, /* 92: 0111 0100 1001 0010 */
+ {illegal,0 }, /* 93: 0111 0100 1001 0011 */
+ {illegal,0 }, /* 94: 0111 0100 1001 0100 */
{DXR,"EA,BC" }, /* 95: 0111 0100 1001 0101 */
{DXR,"EA,DE" }, /* 96: 0111 0100 1001 0110 */
{DXR,"EA,HL" }, /* 97: 0111 0100 1001 0111 */
{ORAW,"%a" }, /* 98: 0111 0100 1001 1000 oooo oooo */
- {illegal,0 }, /* 99: 0111 0100 1001 1001 */
- {illegal,0 }, /* 9a: 0111 0100 1001 1010 */
- {illegal,0 }, /* 9b: 0111 0100 1001 1011 */
- {illegal,0 }, /* 9c: 0111 0100 1001 1100 */
+ {illegal,0 }, /* 99: 0111 0100 1001 1001 */
+ {illegal,0 }, /* 9a: 0111 0100 1001 1010 */
+ {illegal,0 }, /* 9b: 0111 0100 1001 1011 */
+ {illegal,0 }, /* 9c: 0111 0100 1001 1100 */
{DOR,"EA,BC" }, /* 9d: 0111 0100 1001 1101 */
{DOR,"EA,DE" }, /* 9e: 0111 0100 1001 1110 */
{DOR,"EA,HL" }, /* 9f: 0111 0100 1001 1111 */
{ADDNCW,"%a" }, /* a0: 0111 0100 1010 0000 oooo oooo */
- {illegal,0 }, /* a1: 0111 0100 1010 0001 */
- {illegal,0 }, /* a2: 0111 0100 1010 0010 */
- {illegal,0 }, /* a3: 0111 0100 1010 0011 */
- {illegal,0 }, /* a4: 0111 0100 1010 0100 */
+ {illegal,0 }, /* a1: 0111 0100 1010 0001 */
+ {illegal,0 }, /* a2: 0111 0100 1010 0010 */
+ {illegal,0 }, /* a3: 0111 0100 1010 0011 */
+ {illegal,0 }, /* a4: 0111 0100 1010 0100 */
{DADDNC,"EA,BC" }, /* a5: 0111 0100 1010 0101 */
{DADDNC,"EA,DE" }, /* a6: 0111 0100 1010 0110 */
{DADDNC,"EA,HL" }, /* a7: 0111 0100 1010 0111 */
{GTAW,"%a" }, /* a8: 0111 0100 1010 1000 oooo oooo */
- {illegal,0 }, /* a9: 0111 0100 1010 1001 */
- {illegal,0 }, /* aa: 0111 0100 1010 1010 */
- {illegal,0 }, /* ab: 0111 0100 1010 1011 */
- {illegal,0 }, /* ac: 0111 0100 1010 1100 */
+ {illegal,0 }, /* a9: 0111 0100 1010 1001 */
+ {illegal,0 }, /* aa: 0111 0100 1010 1010 */
+ {illegal,0 }, /* ab: 0111 0100 1010 1011 */
+ {illegal,0 }, /* ac: 0111 0100 1010 1100 */
{DGT,"EA,BC" }, /* ad: 0111 0100 1010 1101 */
{DGT,"EA,DE" }, /* ae: 0111 0100 1010 1110 */
{DGT,"EA,HL" }, /* af: 0111 0100 1010 1111 */
{SUBNBW,"%a" }, /* b0: 0111 0100 1011 0000 oooo oooo */
- {illegal,0 }, /* b1: 0111 0100 1011 0001 */
- {illegal,0 }, /* b2: 0111 0100 1011 0010 */
- {illegal,0 }, /* b3: 0111 0100 1011 0011 */
- {illegal,0 }, /* b4: 0111 0100 1011 0100 */
+ {illegal,0 }, /* b1: 0111 0100 1011 0001 */
+ {illegal,0 }, /* b2: 0111 0100 1011 0010 */
+ {illegal,0 }, /* b3: 0111 0100 1011 0011 */
+ {illegal,0 }, /* b4: 0111 0100 1011 0100 */
{DSUBNB,"EA,BC" }, /* b5: 0111 0100 1011 0101 */
{DSUBNB,"EA,DE" }, /* b6: 0111 0100 1011 0110 */
{DSUBNB,"EA,HL" }, /* b7: 0111 0100 1011 0111 */
{LTAW,"%a" }, /* b8: 0111 0100 1011 1000 oooo oooo */
- {illegal,0 }, /* b9: 0111 0100 1011 1001 */
- {illegal,0 }, /* ba: 0111 0100 1011 1010 */
- {illegal,0 }, /* bb: 0111 0100 1011 1011 */
- {illegal,0 }, /* bc: 0111 0100 1011 1100 */
+ {illegal,0 }, /* b9: 0111 0100 1011 1001 */
+ {illegal,0 }, /* ba: 0111 0100 1011 1010 */
+ {illegal,0 }, /* bb: 0111 0100 1011 1011 */
+ {illegal,0 }, /* bc: 0111 0100 1011 1100 */
{DLT,"EA,BC" }, /* bd: 0111 0100 1011 1101 */
{DLT,"EA,DE" }, /* be: 0111 0100 1011 1110 */
{DLT,"EA,HL" }, /* bf: 0111 0100 1011 1111 */
{ADDW,"%a" }, /* c0: 0111 0100 1100 0000 oooo oooo */
- {illegal,0 }, /* c1: 0111 0100 1100 0001 */
- {illegal,0 }, /* c2: 0111 0100 1100 0010 */
- {illegal,0 }, /* c3: 0111 0100 1100 0011 */
- {illegal,0 }, /* c4: 0111 0100 1100 0100 */
+ {illegal,0 }, /* c1: 0111 0100 1100 0001 */
+ {illegal,0 }, /* c2: 0111 0100 1100 0010 */
+ {illegal,0 }, /* c3: 0111 0100 1100 0011 */
+ {illegal,0 }, /* c4: 0111 0100 1100 0100 */
{DADD,"EA,BC" }, /* c5: 0111 0100 1100 0101 */
{DADD,"EA,DE" }, /* c6: 0111 0100 1100 0110 */
{DADD,"EA,HL" }, /* c7: 0111 0100 1100 0111 */
{ONAW,"%a" }, /* c8: 0111 0100 1100 1000 oooo oooo */
- {illegal,0 }, /* c9: 0111 0100 1100 1001 */
- {illegal,0 }, /* ca: 0111 0100 1100 1010 */
- {illegal,0 }, /* cb: 0111 0100 1100 1011 */
- {illegal,0 }, /* cc: 0111 0100 1100 1100 */
+ {illegal,0 }, /* c9: 0111 0100 1100 1001 */
+ {illegal,0 }, /* ca: 0111 0100 1100 1010 */
+ {illegal,0 }, /* cb: 0111 0100 1100 1011 */
+ {illegal,0 }, /* cc: 0111 0100 1100 1100 */
{DON,"EA,BC" }, /* cd: 0111 0100 1100 1101 */
{DON,"EA,DE" }, /* ce: 0111 0100 1100 1110 */
{DON,"EA,HL" }, /* cf: 0111 0100 1100 1111 */
{ADCW,"%a" }, /* d0: 0111 0100 1101 0000 oooo oooo */
- {illegal,0 }, /* d1: 0111 0100 1101 0001 */
- {illegal,0 }, /* d2: 0111 0100 1101 0010 */
- {illegal,0 }, /* d3: 0111 0100 1101 0011 */
- {illegal,0 }, /* d4: 0111 0100 1101 0100 */
+ {illegal,0 }, /* d1: 0111 0100 1101 0001 */
+ {illegal,0 }, /* d2: 0111 0100 1101 0010 */
+ {illegal,0 }, /* d3: 0111 0100 1101 0011 */
+ {illegal,0 }, /* d4: 0111 0100 1101 0100 */
{DADC,"EA,BC" }, /* d5: 0111 0100 1101 0101 */
{DADC,"EA,DE" }, /* d6: 0111 0100 1101 0110 */
{DADC,"EA,HL" }, /* d7: 0111 0100 1101 0111 */
{OFFAW,"%a" }, /* d8: 0111 0100 1101 1000 oooo oooo */
- {illegal,0 }, /* d9: 0111 0100 1101 1001 */
- {illegal,0 }, /* da: 0111 0100 1101 1010 */
- {illegal,0 }, /* db: 0111 0100 1101 1011 */
- {illegal,0 }, /* dc: 0111 0100 1101 1100 */
+ {illegal,0 }, /* d9: 0111 0100 1101 1001 */
+ {illegal,0 }, /* da: 0111 0100 1101 1010 */
+ {illegal,0 }, /* db: 0111 0100 1101 1011 */
+ {illegal,0 }, /* dc: 0111 0100 1101 1100 */
{DOFF,"EA,BC" }, /* dd: 0111 0100 1101 1101 */
{DOFF,"EA,DE" }, /* de: 0111 0100 1101 1110 */
{DOFF,"EA,HL" }, /* df: 0111 0100 1101 1111 */
{SUBW,"%a" }, /* e0: 0111 0100 1110 0000 oooo oooo */
- {illegal,0 }, /* e1: 0111 0100 1110 0001 */
- {illegal,0 }, /* e2: 0111 0100 1110 0010 */
- {illegal,0 }, /* e3: 0111 0100 1110 0011 */
- {illegal,0 }, /* e4: 0111 0100 1110 0100 */
+ {illegal,0 }, /* e1: 0111 0100 1110 0001 */
+ {illegal,0 }, /* e2: 0111 0100 1110 0010 */
+ {illegal,0 }, /* e3: 0111 0100 1110 0011 */
+ {illegal,0 }, /* e4: 0111 0100 1110 0100 */
{DSUB,"EA,BC" }, /* e5: 0111 0100 1110 0101 */
{DSUB,"EA,DE" }, /* e6: 0111 0100 1110 0110 */
{DSUB,"EA,HL" }, /* e7: 0111 0100 1110 0111 */
{NEAW,"%a" }, /* e8: 0111 0100 1110 1000 oooo oooo */
- {illegal,0 }, /* e9: 0111 0100 1110 1001 */
- {illegal,0 }, /* ea: 0111 0100 1110 1010 */
- {illegal,0 }, /* eb: 0111 0100 1110 1011 */
- {illegal,0 }, /* ec: 0111 0100 1110 1100 */
+ {illegal,0 }, /* e9: 0111 0100 1110 1001 */
+ {illegal,0 }, /* ea: 0111 0100 1110 1010 */
+ {illegal,0 }, /* eb: 0111 0100 1110 1011 */
+ {illegal,0 }, /* ec: 0111 0100 1110 1100 */
{DNE,"EA,BC" }, /* ed: 0111 0100 1110 1101 */
{DNE,"EA,DE" }, /* ee: 0111 0100 1110 1110 */
{DNE,"EA,HL" }, /* ef: 0111 0100 1110 1111 */
{SBBW,"%a" }, /* f0: 0111 0100 1111 0000 oooo oooo */
- {illegal,0 }, /* f1: 0111 0100 1111 0001 */
- {illegal,0 }, /* f2: 0111 0100 1111 0010 */
- {illegal,0 }, /* f3: 0111 0100 1111 0011 */
- {illegal,0 }, /* f4: 0111 0100 1111 0100 */
+ {illegal,0 }, /* f1: 0111 0100 1111 0001 */
+ {illegal,0 }, /* f2: 0111 0100 1111 0010 */
+ {illegal,0 }, /* f3: 0111 0100 1111 0011 */
+ {illegal,0 }, /* f4: 0111 0100 1111 0100 */
{DSBB,"EA,BC" }, /* f5: 0111 0100 1111 0101 */
{DSBB,"EA,DE" }, /* f6: 0111 0100 1111 0110 */
{DSBB,"EA,HL" }, /* f7: 0111 0100 1111 0111 */
{EQAW,"%a" }, /* f8: 0111 0100 1111 1000 oooo oooo */
- {illegal,0 }, /* f9: 0111 0100 1111 1001 */
- {illegal,0 }, /* fa: 0111 0100 1111 1010 */
- {illegal,0 }, /* fb: 0111 0100 1111 1011 */
- {illegal,0 }, /* fc: 0111 0100 1111 1100 */
+ {illegal,0 }, /* f9: 0111 0100 1111 1001 */
+ {illegal,0 }, /* fa: 0111 0100 1111 1010 */
+ {illegal,0 }, /* fb: 0111 0100 1111 1011 */
+ {illegal,0 }, /* fc: 0111 0100 1111 1100 */
{DEQ,"EA,BC" }, /* fd: 0111 0100 1111 1101 */
{DEQ,"EA,DE" }, /* fe: 0111 0100 1111 1110 */
{DEQ,"EA,HL" } /* ff: 0111 0100 1111 1111 */
@@ -3411,13 +3411,13 @@ static const struct dasm_s dasm74[256] =
/* main opcodes */
static const struct dasm_s dasmXX_7810[256] =
{
- {NOP,0 }, /* 00: 0000 0000 */
+ {NOP,0 }, /* 00: 0000 0000 */
{LDAW,"%a" }, /* 01: 0000 0001 oooo oooo */
{INX,"SP" }, /* 02: 0000 0010 */
{DCX,"SP" }, /* 03: 0000 0011 */
{LXI,"SP,%w" }, /* 04: 0000 0100 llll llll hhhh hhhh */
{ANIW,"%a,%b" }, /* 05: 0000 0101 oooo oooo xxxx xxxx */
- {illegal,0 }, /* 06: */
+ {illegal,0 }, /* 06: */
{ANI,"A,%b" }, /* 07: 0000 0111 xxxx xxxx */
{MOV,"A,EAH" }, /* 08: 0000 1000 */
{MOV,"A,EAL" }, /* 09: 0000 1001 */
@@ -3428,8 +3428,8 @@ static const struct dasm_s dasmXX_7810[256] =
{MOV,"A,H" }, /* 0e: 0000 1110 */
{MOV,"A,L" }, /* 0f: 0000 1111 */
- {EXA,0 }, /* 10: 0001 0000 */ /* 7810 */
- {EXX,0 }, /* 11: 0001 0001 */ /* 7810 */
+ {EXA,0 }, /* 10: 0001 0000 */ /* 7810 */
+ {EXX,0 }, /* 11: 0001 0001 */ /* 7810 */
{INX,"BC" }, /* 12: 0001 0010 */
{DCX,"BC" }, /* 13: 0001 0011 */
{LXI,"BC,%w" }, /* 14: 0001 0100 llll llll hhhh hhhh */
@@ -3446,14 +3446,14 @@ static const struct dasm_s dasmXX_7810[256] =
{MOV,"L,A" }, /* 1f: 0001 1111 */
{INRW,"%a" }, /* 20: 0010 0000 oooo oooo */
- {JB,0 }, /* 21: 0010 0001 */
+ {JB,0 }, /* 21: 0010 0001 */
{INX,"DE" }, /* 22: 0010 0010 */
{DCX,"DE" }, /* 23: 0010 0011 */
{LXI,"DE,%w" }, /* 24: 0010 0100 llll llll hhhh hhhh */
{GTIW,"%a,%b" }, /* 25: 0010 0101 oooo oooo xxxx xxxx */
{ADINC,"A,%b" }, /* 26: 0010 0110 xxxx xxxx */
{GTI,"A,%b" }, /* 27: 0010 0111 xxxx xxxx */
- {illegal,0 }, /* 28: 0010 1000 */
+ {illegal,0 }, /* 28: 0010 1000 */
{LDAX,"(BC)" }, /* 29: 0010 1001 */
{LDAX,"(DE)" }, /* 2a: 0010 1010 */
{LDAX,"(HL)" }, /* 2b: 0010 1011 */
@@ -3463,14 +3463,14 @@ static const struct dasm_s dasmXX_7810[256] =
{LDAX,"(HL-)" }, /* 2f: 0010 1111 */
{DCRW,"%a" }, /* 30: 0011 0000 oooo oooo */
- {BLOCK,0 }, /* 31: 0011 0001 */ /* 7810 */
+ {BLOCK,0 }, /* 31: 0011 0001 */ /* 7810 */
{INX,"HL", }, /* 32: 0011 0010 */
{DCX,"HL", }, /* 33: 0011 0011 */
{LXI,"HL,%w" }, /* 34: 0011 0100 llll llll hhhh hhhh */
{LTIW,"%a,%b" }, /* 35: 0011 0101 oooo oooo xxxx xxxx */
{SUINB,"A,%b" }, /* 36: 0011 0110 xxxx xxxx */
{LTI,"A,%b" }, /* 37: 0011 0111 xxxx xxxx */
- {illegal,0 }, /* 38: */
+ {illegal,0 }, /* 38: */
{STAX,"(BC)" }, /* 39: 0011 1001 */
{STAX,"(DE)" }, /* 3a: 0011 1010 */
{STAX,"(HL)" }, /* 3b: 0011 1011 */
@@ -3487,16 +3487,16 @@ static const struct dasm_s dasmXX_7810[256] =
{ONIW,"%a,%b" }, /* 45: 0100 0101 oooo oooo xxxx xxxx */
{ADI,"A,%b" }, /* 46: 0100 0110 xxxx xxxx */
{ONI,"A,%b" }, /* 47: 0100 0111 xxxx xxxx */
- {0,dasm48_7810 }, /* 48: prefix */
+ {0,dasm48_7810 }, /* 48: prefix */
{MVIX,"BC,%b" }, /* 49: 0100 1001 xxxx xxxx */
{MVIX,"DE,%b" }, /* 4a: 0100 1010 xxxx xxxx */
{MVIX,"HL,%b" }, /* 4b: 0100 1011 xxxx xxxx */
- {0,dasm4C_7810 }, /* 4c: prefix */
- {0,dasm4D_7810 }, /* 4d: prefix */
+ {0,dasm4C_7810 }, /* 4c: prefix */
+ {0,dasm4D_7810 }, /* 4d: prefix */
{JRE,"%d" }, /* 4e: 0100 111d dddd dddd */
{JRE,"%d" }, /* 4f: 0100 111d dddd dddd */
- {EXH,0 }, /* 50: 0101 0000 */ /* 7810 */
+ {EXH,0 }, /* 50: 0101 0000 */ /* 7810 */
{DCR,"A" }, /* 51: 0101 0001 */
{DCR,"B" }, /* 52: 0101 0010 */
{DCR,"C" }, /* 53: 0101 0011 */
@@ -3504,20 +3504,20 @@ static const struct dasm_s dasmXX_7810[256] =
{OFFIW,"%a,%b" }, /* 55: 0101 0101 oooo oooo xxxx xxxx */
{ACI,"A,%b" }, /* 56: 0101 0110 xxxx xxxx */
{OFFI,"A,%b" }, /* 57: 0101 0111 xxxx xxxx */
- {BIT,"0,%a", }, /* 58: 0101 1000 oooo oooo */ /* 7810 */
- {BIT,"1,%a", }, /* 59: 0101 1001 oooo oooo */ /* 7810 */
- {BIT,"2,%a", }, /* 5a: 0101 1010 oooo oooo */ /* 7810 */
- {BIT,"3,%a", }, /* 5b: 0101 1011 oooo oooo */ /* 7810 */
- {BIT,"4,%a", }, /* 5c: 0101 1100 oooo oooo */ /* 7810 */
- {BIT,"5,%a", }, /* 5d: 0101 1101 oooo oooo */ /* 7810 */
- {BIT,"6,%a", }, /* 5e: 0101 1110 oooo oooo */ /* 7810 */
- {BIT,"7,%a", }, /* 5f: 0101 1111 oooo oooo */ /* 7810 */
-
- {0,dasm60 }, /* 60: prefix */
- {DAA,0 }, /* 61: 0110 0001 */
- {RETI,0 }, /* 62: 0110 0010 */
+ {BIT,"0,%a", }, /* 58: 0101 1000 oooo oooo */ /* 7810 */
+ {BIT,"1,%a", }, /* 59: 0101 1001 oooo oooo */ /* 7810 */
+ {BIT,"2,%a", }, /* 5a: 0101 1010 oooo oooo */ /* 7810 */
+ {BIT,"3,%a", }, /* 5b: 0101 1011 oooo oooo */ /* 7810 */
+ {BIT,"4,%a", }, /* 5c: 0101 1100 oooo oooo */ /* 7810 */
+ {BIT,"5,%a", }, /* 5d: 0101 1101 oooo oooo */ /* 7810 */
+ {BIT,"6,%a", }, /* 5e: 0101 1110 oooo oooo */ /* 7810 */
+ {BIT,"7,%a", }, /* 5f: 0101 1111 oooo oooo */ /* 7810 */
+
+ {0,dasm60 }, /* 60: prefix */
+ {DAA,0 }, /* 61: 0110 0001 */
+ {RETI,0 }, /* 62: 0110 0010 */
{STAW,"%a" }, /* 63: 0110 0011 oooo oooo */
- {0,dasm64_7810 }, /* 64: prefix */
+ {0,dasm64_7810 }, /* 64: prefix */
{NEIW,"%a,%b" }, /* 65: 0110 0101 oooo oooo xxxx xxxx */
{SUI,"A,%b" }, /* 66: 0110 0110 xxxx xxxx */
{NEI,"A,%b" }, /* 67: 0110 0111 xxxx xxxx */
@@ -3530,11 +3530,11 @@ static const struct dasm_s dasmXX_7810[256] =
{MVI,"H,%b" }, /* 6e: 0110 1110 xxxx xxxx */
{MVI,"L,%b" }, /* 6f: 0110 1111 xxxx xxxx */
- {0,dasm70 }, /* 70: prefix */
+ {0,dasm70 }, /* 70: prefix */
{MVIW,"%a,%b" }, /* 71: 0111 0001 oooo oooo xxxx xxxx */
- {SOFTI,0 }, /* 72: 0111 0010 */
- {illegal,0 }, /* 73: */
- {0,dasm74 }, /* 74: prefix */
+ {SOFTI,0 }, /* 72: 0111 0010 */
+ {illegal,0 }, /* 73: */
+ {0,dasm74 }, /* 74: prefix */
{EQIW,"%a,%b" }, /* 75: 0111 0101 oooo oooo xxxx xxxx */
{SBI,"A,%b" }, /* 76: 0111 0110 xxxx xxxx */
{EQI,"A,%b" }, /* 77: 0111 0111 xxxx xxxx */
@@ -3591,7 +3591,7 @@ static const struct dasm_s dasmXX_7810[256] =
{DMOV,"EA,HL" }, /* a7: 1010 0111 */
{INX,"EA" }, /* a8: 1010 1000 */
{DCX,"EA" }, /* a9: 1010 1001 */
- {EI,0 }, /* aa: 1010 1010 */
+ {EI,0 }, /* aa: 1010 1010 */
{LDAX,"(DE+%b)" }, /* ab: 1010 1011 dddd dddd */
{LDAX,"(HL+A)" }, /* ac: 1010 1100 */
{LDAX,"(HL+B)" }, /* ad: 1010 1101 */
@@ -3606,9 +3606,9 @@ static const struct dasm_s dasmXX_7810[256] =
{DMOV,"BC,EA" }, /* b5: 1011 0101 */
{DMOV,"DE,EA" }, /* b6: 1011 0110 */
{DMOV,"HL,EA" }, /* b7: 1011 0111 */
- {RET,0 }, /* b8: 1011 1000 */
- {RETS,0 }, /* b9: 1011 1001 */
- {DI,0 }, /* ba: 1011 1010 */
+ {RET,0 }, /* b8: 1011 1000 */
+ {RETS,0 }, /* b9: 1011 1001 */
+ {DI,0 }, /* ba: 1011 1010 */
{STAX,"(DE+%b)" }, /* bb: 1011 1011 dddd dddd */
{STAX,"(HL+A)" }, /* bc: 1011 1100 */
{STAX,"(HL+B)" }, /* bd: 1011 1101 */
@@ -3686,13 +3686,13 @@ static const struct dasm_s dasmXX_7810[256] =
static const struct dasm_s dasmXX_7807[256] =
{
- {NOP,0 }, /* 00: 0000 0000 */
+ {NOP,0 }, /* 00: 0000 0000 */
{LDAW,"%a" }, /* 01: 0000 0001 oooo oooo */
{INX,"SP" }, /* 02: 0000 0010 */
{DCX,"SP" }, /* 03: 0000 0011 */
{LXI,"SP,%w" }, /* 04: 0000 0100 llll llll hhhh hhhh */
{ANIW,"%a,%b" }, /* 05: 0000 0101 oooo oooo xxxx xxxx */
- {illegal,0 }, /* 06: */
+ {illegal,0 }, /* 06: */
{ANI,"A,%b" }, /* 07: 0000 0111 xxxx xxxx */
{MOV,"A,EAH" }, /* 08: 0000 1000 */
{MOV,"A,EAL" }, /* 09: 0000 1001 */
@@ -3703,8 +3703,8 @@ static const struct dasm_s dasmXX_7807[256] =
{MOV,"A,H" }, /* 0e: 0000 1110 */
{MOV,"A,L" }, /* 0f: 0000 1111 */
- {BLOCK,"D+" }, /* 10: 0001 0000 */ /* 7807 */
- {BLOCK,"D-" }, /* 11: 0001 0001 */ /* 7807 */
+ {BLOCK,"D+" }, /* 10: 0001 0000 */ /* 7807 */
+ {BLOCK,"D-" }, /* 11: 0001 0001 */ /* 7807 */
{INX,"BC" }, /* 12: 0001 0010 */
{DCX,"BC" }, /* 13: 0001 0011 */
{LXI,"BC,%w" }, /* 14: 0001 0100 llll llll hhhh hhhh */
@@ -3721,14 +3721,14 @@ static const struct dasm_s dasmXX_7807[256] =
{MOV,"L,A" }, /* 1f: 0001 1111 */
{INRW,"%a" }, /* 20: 0010 0000 oooo oooo */
- {JB,0 }, /* 21: 0010 0001 */
+ {JB,0 }, /* 21: 0010 0001 */
{INX,"DE" }, /* 22: 0010 0010 */
{DCX,"DE" }, /* 23: 0010 0011 */
{LXI,"DE,%w" }, /* 24: 0010 0100 llll llll hhhh hhhh */
{GTIW,"%a,%b" }, /* 25: 0010 0101 oooo oooo xxxx xxxx */
{ADINC,"A,%b" }, /* 26: 0010 0110 xxxx xxxx */
{GTI,"A,%b" }, /* 27: 0010 0111 xxxx xxxx */
- {illegal,0 }, /* 28: 0010 1000 */
+ {illegal,0 }, /* 28: 0010 1000 */
{LDAX,"(BC)" }, /* 29: 0010 1001 */
{LDAX,"(DE)" }, /* 2a: 0010 1010 */
{LDAX,"(HL)" }, /* 2b: 0010 1011 */
@@ -3738,14 +3738,14 @@ static const struct dasm_s dasmXX_7807[256] =
{LDAX,"(HL-)" }, /* 2f: 0010 1111 */
{DCRW,"%a" }, /* 30: 0011 0000 oooo oooo */
- {AND,"CY,%i" }, /* 31: 0011 0001 bbbb bbbb */ /* 7807 */
+ {AND,"CY,%i" }, /* 31: 0011 0001 bbbb bbbb */ /* 7807 */
{INX,"HL", }, /* 32: 0011 0010 */
{DCX,"HL", }, /* 33: 0011 0011 */
{LXI,"HL,%w" }, /* 34: 0011 0100 llll llll hhhh hhhh */
{LTIW,"%a,%b" }, /* 35: 0011 0101 oooo oooo xxxx xxxx */
{SUINB,"A,%b" }, /* 36: 0011 0110 xxxx xxxx */
{LTI,"A,%b" }, /* 37: 0011 0111 xxxx xxxx */
- {illegal,0 }, /* 38: */
+ {illegal,0 }, /* 38: */
{STAX,"(BC)" }, /* 39: 0011 1001 */
{STAX,"(DE)" }, /* 3a: 0011 1010 */
{STAX,"(HL)" }, /* 3b: 0011 1011 */
@@ -3762,15 +3762,15 @@ static const struct dasm_s dasmXX_7807[256] =
{ONIW,"%a,%b" }, /* 45: 0100 0101 oooo oooo xxxx xxxx */
{ADI,"A,%b" }, /* 46: 0100 0110 xxxx xxxx */
{ONI,"A,%b" }, /* 47: 0100 0111 xxxx xxxx */
- {0,dasm48_7807 }, /* 48: prefix */
+ {0,dasm48_7807 }, /* 48: prefix */
{MVIX,"BC,%b" }, /* 49: 0100 1001 xxxx xxxx */
{MVIX,"DE,%b" }, /* 4a: 0100 1010 xxxx xxxx */
{MVIX,"HL,%b" }, /* 4b: 0100 1011 xxxx xxxx */
- {0,dasm4C_7807 }, /* 4c: prefix */
- {0,dasm4D_7807 }, /* 4d: prefix */
+ {0,dasm4C_7807 }, /* 4c: prefix */
+ {0,dasm4D_7807 }, /* 4d: prefix */
{JRE,"%d" }, /* 4e: 0100 111d dddd dddd */
{JRE,"%d" }, /* 4f: 0100 111d dddd dddd */
- {SKN,"%i" }, /* 50: 0101 0000 bbbb bbbb */ /* 7807 */
+ {SKN,"%i" }, /* 50: 0101 0000 bbbb bbbb */ /* 7807 */
{DCR,"A" }, /* 51: 0101 0001 */
{DCR,"B" }, /* 52: 0101 0010 */
{DCR,"C" }, /* 53: 0101 0011 */
@@ -3778,20 +3778,20 @@ static const struct dasm_s dasmXX_7807[256] =
{OFFIW,"%a,%b" }, /* 55: 0101 0101 oooo oooo xxxx xxxx */
{ACI,"A,%b" }, /* 56: 0101 0110 xxxx xxxx */
{OFFI,"A,%b" }, /* 57: 0101 0111 xxxx xxxx */
- {SETB,"%i" }, /* 58: 0101 1000 bbbb bbbb */ /* 7807 */
- {NOT,"%i" }, /* 59: 0101 1001 bbbb bbbb */ /* 7807 */
- {MOV,"%i,CY" }, /* 5a: 0101 1010 bbbb bbbb */ /* 7807 */
- {CLR,"%i" }, /* 5b: 0101 1011 bbbb bbbb */ /* 7807 */
- {OR,"CY,%i" }, /* 5c: 0101 1100 bbbb bbbb */ /* 7807 */
- {SK,"%i" }, /* 5d: 0101 1101 bbbb bbbb */ /* 7807 */
- {XOR,"CY,%i" }, /* 5e: 0101 1110 bbbb bbbb */ /* 7807 */
- {MOV,"CY,%i" }, /* 5f: 0101 1111 bbbb bbbb */ /* 7807 */
-
- {0,dasm60 }, /* 60: prefix */
- {DAA,0 }, /* 61: 0110 0001 */
- {RETI,0 }, /* 62: 0110 0010 */
+ {SETB,"%i" }, /* 58: 0101 1000 bbbb bbbb */ /* 7807 */
+ {NOT,"%i" }, /* 59: 0101 1001 bbbb bbbb */ /* 7807 */
+ {MOV,"%i,CY" }, /* 5a: 0101 1010 bbbb bbbb */ /* 7807 */
+ {CLR,"%i" }, /* 5b: 0101 1011 bbbb bbbb */ /* 7807 */
+ {OR,"CY,%i" }, /* 5c: 0101 1100 bbbb bbbb */ /* 7807 */
+ {SK,"%i" }, /* 5d: 0101 1101 bbbb bbbb */ /* 7807 */
+ {XOR,"CY,%i" }, /* 5e: 0101 1110 bbbb bbbb */ /* 7807 */
+ {MOV,"CY,%i" }, /* 5f: 0101 1111 bbbb bbbb */ /* 7807 */
+
+ {0,dasm60 }, /* 60: prefix */
+ {DAA,0 }, /* 61: 0110 0001 */
+ {RETI,0 }, /* 62: 0110 0010 */
{STAW,"%a" }, /* 63: 0110 0011 oooo oooo */
- {0,dasm64_7807 }, /* 64: prefix */
+ {0,dasm64_7807 }, /* 64: prefix */
{NEIW,"%a,%b" }, /* 65: 0110 0101 oooo oooo xxxx xxxx */
{SUI,"A,%b" }, /* 66: 0110 0110 xxxx xxxx */
{NEI,"A,%b" }, /* 67: 0110 0111 xxxx xxxx */
@@ -3804,11 +3804,11 @@ static const struct dasm_s dasmXX_7807[256] =
{MVI,"H,%b" }, /* 6e: 0110 1110 xxxx xxxx */
{MVI,"L,%b" }, /* 6f: 0110 1111 xxxx xxxx */
- {0,dasm70 }, /* 70: prefix */
+ {0,dasm70 }, /* 70: prefix */
{MVIW,"%a,%b" }, /* 71: 0111 0001 oooo oooo xxxx xxxx */
- {SOFTI,0 }, /* 72: 0111 0010 */
- {illegal,0 }, /* 73: */
- {0,dasm74 }, /* 74: prefix */
+ {SOFTI,0 }, /* 72: 0111 0010 */
+ {illegal,0 }, /* 73: */
+ {0,dasm74 }, /* 74: prefix */
{EQIW,"%a,%b" }, /* 75: 0111 0101 oooo oooo xxxx xxxx */
{SBI,"A,%b" }, /* 76: 0111 0110 xxxx xxxx */
{EQI,"A,%b" }, /* 77: 0111 0111 xxxx xxxx */
@@ -3865,7 +3865,7 @@ static const struct dasm_s dasmXX_7807[256] =
{DMOV,"EA,HL" }, /* a7: 1010 0111 */
{INX,"EA" }, /* a8: 1010 1000 */
{DCX,"EA" }, /* a9: 1010 1001 */
- {EI,0 }, /* aa: 1010 1010 */
+ {EI,0 }, /* aa: 1010 1010 */
{LDAX,"(DE+%b)" }, /* ab: 1010 1011 dddd dddd */
{LDAX,"(HL+A)" }, /* ac: 1010 1100 */
{LDAX,"(HL+B)" }, /* ad: 1010 1101 */
@@ -3880,9 +3880,9 @@ static const struct dasm_s dasmXX_7807[256] =
{DMOV,"BC,EA" }, /* b5: 1011 0101 */
{DMOV,"DE,EA" }, /* b6: 1011 0110 */
{DMOV,"HL,EA" }, /* b7: 1011 0111 */
- {RET,0 }, /* b8: 1011 1000 */
- {RETS,0 }, /* b9: 1011 1001 */
- {DI,0 }, /* ba: 1011 1010 */
+ {RET,0 }, /* b8: 1011 1000 */
+ {RETS,0 }, /* b9: 1011 1001 */
+ {DI,0 }, /* ba: 1011 1010 */
{STAX,"(DE+%b)" }, /* bb: 1011 1011 dddd dddd */
{STAX,"(HL+A)" }, /* bc: 1011 1100 */
{STAX,"(HL+B)" }, /* bd: 1011 1101 */
@@ -3966,174 +3966,174 @@ static const struct dasm_s dasmXX_7807[256] =
static const struct dasm_s dasm48_7801[256] = {
/* 0x00 - 0x3F */
- { SKIT, "F0" }, { SKIT, "FT" }, { SKIT, "F1" }, { SKIT, "F2" },
- { SKIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SK, "CY" }, { illegal, 0 },
- { SK, "Z" }, { illegal, 0 }, { PUSH, "VA" }, { POP, "VA" },
-
- { SKNIT, "F0" }, { SKNIT, "FT" }, { SKNIT, "F1" }, { SKNIT, "F2" },
- { SKNIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SKN, "CY" }, { illegal, 0 },
- { SKN, "Z" }, { illegal, 0 }, { PUSH, "BC" }, { POP, "BC" },
-
- { EI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { DI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { CLC, 0 }, { STC, 0 },
- { PER, 0 }, { PEX, 0 }, { PUSH, "DE" }, { POP, "DE" },
-
- { RLL, "A" }, { RLR, "A" }, { RLL, "C" }, { RLR, "C" },
- { SLL, "A" }, { SLR, "A" }, { SLL, "C" }, { SLR, "C" },
- { RLD, 0 }, { RRD, 0 }, { illegal, 0 }, { illegal, 0 },
- { PER, 0 }, { illegal, 0 }, { PUSH, "HL" }, { POP, "HL" },
+ { SKIT, "F0" }, { SKIT, "FT" }, { SKIT, "F1" }, { SKIT, "F2" },
+ { SKIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SK, "CY" }, { illegal, 0 },
+ { SK, "Z" }, { illegal, 0 }, { PUSH, "VA" }, { POP, "VA" },
+
+ { SKNIT, "F0" }, { SKNIT, "FT" }, { SKNIT, "F1" }, { SKNIT, "F2" },
+ { SKNIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SKN, "CY" }, { illegal, 0 },
+ { SKN, "Z" }, { illegal, 0 }, { PUSH, "BC" }, { POP, "BC" },
+
+ { EI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { DI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { CLC, 0 }, { STC, 0 },
+ { PER, 0 }, { PEX, 0 }, { PUSH, "DE" }, { POP, "DE" },
+
+ { RLL, "A" }, { RLR, "A" }, { RLL, "C" }, { RLR, "C" },
+ { SLL, "A" }, { SLR, "A" }, { SLL, "C" }, { SLR, "C" },
+ { RLD, 0 }, { RRD, 0 }, { illegal, 0 }, { illegal, 0 },
+ { PER, 0 }, { illegal, 0 }, { PUSH, "HL" }, { POP, "HL" },
/* 0x40 - 0x7F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0xC0 - 0xFF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
};
static const struct dasm_s dasm4c_7801[256] = {
/* 0x00 - 0x3F */
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
/* 0x40 - 0x7F */
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
/* 0x80 - 0xBF */
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
-
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
- { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
+ { IN, 0 }, { IN, 0 }, { IN, 0 }, { IN, 0 },
/* 0xC0 - 0xFF */
- { MOV, "A,PA" }, { MOV, "A,PB" }, { MOV, "A,PC" }, { MOV, "A,MK" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { MOV, "A,S" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
+ { MOV, "A,PA" }, { MOV, "A,PB" }, { MOV, "A,PC" }, { MOV, "A,MK" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { MOV, "A,S" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
};
static const struct dasm_s dasm4d_7801[256] = {
@@ -4201,10 +4201,10 @@ static const struct dasm_s dasm4d_7801[256] = {
{ OUT, 0 }, { OUT, 0 }, { OUT, 0 }, { OUT, 0 },
/* 0xC0 - 0xFF */
- { MOV, "PA,A" }, { MOV, "PB,A" }, { MOV, "PC,A" }, { MOV, "MK,A" },
- { MOV, "MB,A" }, { MOV, "MC,A" }, { MOV, "TM0,A" }, { MOV, "TM1,A" },
- { MOV, "S,A" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { MOV, "PA,A" }, { MOV, "PB,A" }, { MOV, "PC,A" }, { MOV, "MK,A" },
+ { MOV, "MB,A" }, { MOV, "MC,A" }, { MOV, "TM0,A" }, { MOV, "TM1,A" },
+ { MOV, "S,A" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
{ illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
{ illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
@@ -4224,88 +4224,88 @@ static const struct dasm_s dasm4d_7801[256] = {
static const struct dasm_s dasm60_7801[256] = {
/* 0x00 - 0x3F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ANA, "V,A" }, { ANA, "A,A" }, { ANA, "B,A" }, { ANA, "C,A" },
- { ANA, "D,A" }, { ANA, "E,A" }, { ANA, "H,A" }, { ANA, "L,A" },
-
- { XRA, "V,A" }, { XRA, "A,A" }, { XRA, "B,A" }, { XRA, "C,A" },
- { XRA, "D,A" }, { XRA, "E,A" }, { XRA, "H,A" }, { XRA, "L,A" },
- { ORA, "V,A" }, { ORA, "A,A" }, { ORA, "B,A" }, { ORA, "C,A" },
- { ORA, "D,A" }, { ORA, "E,A" }, { ORA, "H,A" }, { ORA, "L,A" },
-
- { ADDNC, "V,A" }, { ADDNC, "A,A" }, { ADDNC, "B,A" }, { ADDNC, "C,A" },
- { ADDNC, "D,A" }, { ADDNC, "E,A" }, { ADDNC, "H,A" }, { ADDNC, "L,A" },
- { GTA, "V,A" }, { GTA, "A,A" }, { GTA, "B,A" }, { GTA, "C,A" },
- { GTA, "D,A" }, { GTA, "E,A" }, { GTA, "H,A" }, { GTA, "L,A" },
-
- { SUBNB, "V,A" }, { SUBNB, "A,A" }, { SUBNB, "B,A" }, { SUBNB, "C,A" },
- { SUBNB, "D,A" }, { SUBNB, "E,A" }, { SUBNB, "H,A" }, { SUBNB, "L,A" },
- { LTA, "V,A" }, { LTA, "A,A" }, { LTA, "B,A" }, { LTA, "C,A" },
- { LTA, "D,A" }, { LTA, "E,A" }, { LTA, "H,A" }, { LTA, "L,A" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ANA, "V,A" }, { ANA, "A,A" }, { ANA, "B,A" }, { ANA, "C,A" },
+ { ANA, "D,A" }, { ANA, "E,A" }, { ANA, "H,A" }, { ANA, "L,A" },
+
+ { XRA, "V,A" }, { XRA, "A,A" }, { XRA, "B,A" }, { XRA, "C,A" },
+ { XRA, "D,A" }, { XRA, "E,A" }, { XRA, "H,A" }, { XRA, "L,A" },
+ { ORA, "V,A" }, { ORA, "A,A" }, { ORA, "B,A" }, { ORA, "C,A" },
+ { ORA, "D,A" }, { ORA, "E,A" }, { ORA, "H,A" }, { ORA, "L,A" },
+
+ { ADDNC, "V,A" }, { ADDNC, "A,A" }, { ADDNC, "B,A" }, { ADDNC, "C,A" },
+ { ADDNC, "D,A" }, { ADDNC, "E,A" }, { ADDNC, "H,A" }, { ADDNC, "L,A" },
+ { GTA, "V,A" }, { GTA, "A,A" }, { GTA, "B,A" }, { GTA, "C,A" },
+ { GTA, "D,A" }, { GTA, "E,A" }, { GTA, "H,A" }, { GTA, "L,A" },
+
+ { SUBNB, "V,A" }, { SUBNB, "A,A" }, { SUBNB, "B,A" }, { SUBNB, "C,A" },
+ { SUBNB, "D,A" }, { SUBNB, "E,A" }, { SUBNB, "H,A" }, { SUBNB, "L,A" },
+ { LTA, "V,A" }, { LTA, "A,A" }, { LTA, "B,A" }, { LTA, "C,A" },
+ { LTA, "D,A" }, { LTA, "E,A" }, { LTA, "H,A" }, { LTA, "L,A" },
/* 0x40 - 0x7F */
- { ADD, "V,A" }, { ADD, "A,A" }, { ADD, "B,A" }, { ADD, "C,A" },
- { ADD, "D,A" }, { ADD, "E,A" }, { ADD, "H,A" }, { ADD, "L,A" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { ADC, "V,A" }, { ADC, "A,A" }, { ADC, "B,A" }, { ADC, "C,A" },
- { ADC, "D,A" }, { ADC, "E,A" }, { ADC, "H,A" }, { ADC, "L,A" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { SUB, "V,A" }, { SUB, "A,A" }, { SUB, "B,A" }, { SUB, "C,A" },
- { SUB, "D,A" }, { SUB, "E,A" }, { SUB, "H,A" }, { SUB, "L,A" },
- { NEA, "V,A" }, { NEA, "A,A" }, { NEA, "B,A" }, { NEA, "C,A" },
- { NEA, "D,A" }, { NEA, "E,A" }, { NEA, "H,A" }, { NEA, "L,A" },
-
- { SBB, "V,A" }, { SBB, "A,A" }, { SBB, "B,A" }, { SBB, "C,A" },
- { SBB, "D,A" }, { SBB, "E,A" }, { SBB, "H,A" }, { SBB, "L,A" },
- { EQA, "V,A" }, { EQA, "A,A" }, { EQA, "B,A" }, { EQA, "C,A" },
- { EQA, "D,A" }, { EQA, "E,A" }, { EQA, "H,A" }, { EQA, "L,A" },
+ { ADD, "V,A" }, { ADD, "A,A" }, { ADD, "B,A" }, { ADD, "C,A" },
+ { ADD, "D,A" }, { ADD, "E,A" }, { ADD, "H,A" }, { ADD, "L,A" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { ADC, "V,A" }, { ADC, "A,A" }, { ADC, "B,A" }, { ADC, "C,A" },
+ { ADC, "D,A" }, { ADC, "E,A" }, { ADC, "H,A" }, { ADC, "L,A" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { SUB, "V,A" }, { SUB, "A,A" }, { SUB, "B,A" }, { SUB, "C,A" },
+ { SUB, "D,A" }, { SUB, "E,A" }, { SUB, "H,A" }, { SUB, "L,A" },
+ { NEA, "V,A" }, { NEA, "A,A" }, { NEA, "B,A" }, { NEA, "C,A" },
+ { NEA, "D,A" }, { NEA, "E,A" }, { NEA, "H,A" }, { NEA, "L,A" },
+
+ { SBB, "V,A" }, { SBB, "A,A" }, { SBB, "B,A" }, { SBB, "C,A" },
+ { SBB, "D,A" }, { SBB, "E,A" }, { SBB, "H,A" }, { SBB, "L,A" },
+ { EQA, "V,A" }, { EQA, "A,A" }, { EQA, "B,A" }, { EQA, "C,A" },
+ { EQA, "D,A" }, { EQA, "E,A" }, { EQA, "H,A" }, { EQA, "L,A" },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ANA, "A,V" }, { ANA, "A,A" }, { ANA, "A,B" }, { ANA, "A,C" },
- { ANA, "A,D" }, { ANA, "A,E" }, { ANA, "A,H" }, { ANA, "A,L" },
-
- { XRA, "A,V" }, { XRA, "A,A" }, { XRA, "A,B" }, { XRA, "A,C" },
- { XRA, "A,D" }, { XRA, "A,E" }, { XRA, "A,H" }, { XRA, "A,L" },
- { ORA, "A,V" }, { ORA, "A,A" }, { ORA, "A,B" }, { ORA, "A,C" },
- { ORA, "A,D" }, { ORA, "A,E" }, { ORA, "A,H" }, { ORA, "A,L" },
-
- { ADDNC, "A,V" }, { ADDNC, "A,A" }, { ADDNC, "A,B" }, { ADDNC, "A,C" },
- { ADDNC, "A,D" }, { ADDNC, "A,E" }, { ADDNC, "A,H" }, { ADDNC, "A,L" },
- { GTA, "A,V" }, { GTA, "A,A" }, { GTA, "A,B" }, { GTA, "A,C" },
- { GTA, "A,D" }, { GTA, "A,E" }, { GTA, "A,H" }, { GTA, "A,L" },
-
- { SUBNB, "A,V" }, { SUBNB, "A,A" }, { SUBNB, "A,B" }, { SUBNB, "A,C" },
- { SUBNB, "A,D" }, { SUBNB, "A,E" }, { SUBNB, "A,H" }, { SUBNB, "A,L" },
- { LTA, "A,V" }, { LTA, "A,A" }, { LTA, "A,B" }, { LTA, "A,C" },
- { LTA, "A,D" }, { LTA, "A,E" }, { LTA, "A,H" }, { LTA, "A,L" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ANA, "A,V" }, { ANA, "A,A" }, { ANA, "A,B" }, { ANA, "A,C" },
+ { ANA, "A,D" }, { ANA, "A,E" }, { ANA, "A,H" }, { ANA, "A,L" },
+
+ { XRA, "A,V" }, { XRA, "A,A" }, { XRA, "A,B" }, { XRA, "A,C" },
+ { XRA, "A,D" }, { XRA, "A,E" }, { XRA, "A,H" }, { XRA, "A,L" },
+ { ORA, "A,V" }, { ORA, "A,A" }, { ORA, "A,B" }, { ORA, "A,C" },
+ { ORA, "A,D" }, { ORA, "A,E" }, { ORA, "A,H" }, { ORA, "A,L" },
+
+ { ADDNC, "A,V" }, { ADDNC, "A,A" }, { ADDNC, "A,B" }, { ADDNC, "A,C" },
+ { ADDNC, "A,D" }, { ADDNC, "A,E" }, { ADDNC, "A,H" }, { ADDNC, "A,L" },
+ { GTA, "A,V" }, { GTA, "A,A" }, { GTA, "A,B" }, { GTA, "A,C" },
+ { GTA, "A,D" }, { GTA, "A,E" }, { GTA, "A,H" }, { GTA, "A,L" },
+
+ { SUBNB, "A,V" }, { SUBNB, "A,A" }, { SUBNB, "A,B" }, { SUBNB, "A,C" },
+ { SUBNB, "A,D" }, { SUBNB, "A,E" }, { SUBNB, "A,H" }, { SUBNB, "A,L" },
+ { LTA, "A,V" }, { LTA, "A,A" }, { LTA, "A,B" }, { LTA, "A,C" },
+ { LTA, "A,D" }, { LTA, "A,E" }, { LTA, "A,H" }, { LTA, "A,L" },
/* 0xC0 - 0xFF */
- { ADD, "A,V" }, { ADD, "A,A" }, { ADD, "A,B" }, { ADD, "A,C" },
- { ADD, "A,D" }, { ADD, "A,E" }, { ADD, "A,H" }, { ADD, "A,L" },
- { ONA, "A,V" }, { ONA, "A,A" }, { ONA, "A,B" }, { ONA, "A,C" },
- { ONA, "A,D" }, { ONA, "A,E" }, { ONA, "A,H" }, { ONA, "A,L" },
-
- { ADC, "A,V" }, { ADC, "A,A" }, { ADC, "A,B" }, { ADC, "A,C" },
- { ADC, "A,D" }, { ADC, "A,E" }, { ADC, "A,H" }, { ADC, "A,L" },
- { OFFA, "A,V" }, { OFFA, "A,A" }, { OFFA, "A,B" }, { OFFA, "A,C" },
- { OFFA, "A,D" }, { OFFA, "A,E" }, { OFFA, "A,H" }, { OFFA, "A,L" },
-
- { SUB, "A,V" }, { SUB, "A,A" }, { SUB, "A,B" }, { SUB, "A,C" },
- { SUB, "A,D" }, { SUB, "A,E" }, { SUB, "A,H" }, { SUB, "A,L" },
- { NEA, "A,V" }, { NEA, "A,A" }, { NEA, "A,B" }, { NEA, "A,C" },
- { NEA, "A,D" }, { NEA, "A,E" }, { NEA, "A,H" }, { NEA, "A,L" },
-
- { SBB, "A,V" }, { SBB, "A,A" }, { SBB, "A,B" }, { SBB, "A,C" },
- { SBB, "A,D" }, { SBB, "A,E" }, { SBB, "A,H" }, { SBB, "A,L" },
- { EQA, "A,V" }, { EQA, "A,A" }, { EQA, "A,B" }, { EQA, "A,C" },
- { EQA, "A,D" }, { EQA, "A,E" }, { EQA, "A,H" }, { EQA, "A,L" }
+ { ADD, "A,V" }, { ADD, "A,A" }, { ADD, "A,B" }, { ADD, "A,C" },
+ { ADD, "A,D" }, { ADD, "A,E" }, { ADD, "A,H" }, { ADD, "A,L" },
+ { ONA, "A,V" }, { ONA, "A,A" }, { ONA, "A,B" }, { ONA, "A,C" },
+ { ONA, "A,D" }, { ONA, "A,E" }, { ONA, "A,H" }, { ONA, "A,L" },
+
+ { ADC, "A,V" }, { ADC, "A,A" }, { ADC, "A,B" }, { ADC, "A,C" },
+ { ADC, "A,D" }, { ADC, "A,E" }, { ADC, "A,H" }, { ADC, "A,L" },
+ { OFFA, "A,V" }, { OFFA, "A,A" }, { OFFA, "A,B" }, { OFFA, "A,C" },
+ { OFFA, "A,D" }, { OFFA, "A,E" }, { OFFA, "A,H" }, { OFFA, "A,L" },
+
+ { SUB, "A,V" }, { SUB, "A,A" }, { SUB, "A,B" }, { SUB, "A,C" },
+ { SUB, "A,D" }, { SUB, "A,E" }, { SUB, "A,H" }, { SUB, "A,L" },
+ { NEA, "A,V" }, { NEA, "A,A" }, { NEA, "A,B" }, { NEA, "A,C" },
+ { NEA, "A,D" }, { NEA, "A,E" }, { NEA, "A,H" }, { NEA, "A,L" },
+
+ { SBB, "A,V" }, { SBB, "A,A" }, { SBB, "A,B" }, { SBB, "A,C" },
+ { SBB, "A,D" }, { SBB, "A,E" }, { SBB, "A,H" }, { SBB, "A,L" },
+ { EQA, "A,V" }, { EQA, "A,A" }, { EQA, "A,B" }, { EQA, "A,C" },
+ { EQA, "A,D" }, { EQA, "A,E" }, { EQA, "A,H" }, { EQA, "A,L" }
};
static const struct dasm_s dasm64_7801[256] = {
@@ -4568,88 +4568,88 @@ static const struct dasm_s dasm74_7801[256] = {
static const struct dasm_s dasmXX_7801[256] = {
/* 0x00 - 0x3F */
- { NOP, 0 }, { HALT, 0 }, { INX, "SP" }, { DCX, "SP" },
- { LXI, "SP,%w" }, { ANIW, "%a,%b" }, { illegal, 0 }, { ANI, "A,%b" },
- { RET, 0 }, { SIO, 0 }, { MOV, "A,B" }, { MOV, "A,C" },
- { MOV, "A,D" }, { MOV, "A,E" }, { MOV, "A,H" }, { MOV, "A,L" },
-
- { EX, 0 }, { EXX, 0 }, { INX, "BC" }, { DCX, "BC" },
- { LXI, "BC,%w" }, { ORIW, "%a,%b" }, { XRI, "A,%b" }, { ORI, "A,%b" },
- { RETS, 0 }, { STM, 0 }, { MOV, "B,A" }, { MOV, "C,A" },
- { MOV, "D,A" }, { MOV, "E,A" }, { MOV, "H,A" }, { MOV, "L,A" },
-
- { INRW, "%a" }, { TABLE, 0 }, { INX, "DE" }, { DCX, "DE" },
- { LXI, "DE,%w" }, { GTIW, "%a,%b" }, { ADINC, "A,%b" }, { GTI, "A,%b" },
- { LDAW, "%a" }, { LDAX, "BC" }, { LDAX, "DE" }, { LDAX, "HL" },
- { LDAX, "DE+" }, { LDAX, "HL+" }, { LDAX, "DE-" }, { LDAX, "HL-" },
-
- { DCRW, "%a" }, { BLOCK, 0 }, { INX, "HL" }, { DCX, "HL" },
- { LXI, "HL,%w" }, { LTIW, "%a,%b" }, { SUINB, "A,%b" }, { LTI, "A,%b" },
- { STAW, "%a" }, { STAX, "BC" }, { STAX, "DE" }, { STAX, "HL" },
- { STAX, "DE+" }, { STAX, "HL+" }, { STAX, "DE-" }, { STAX, "HL-" },
+ { NOP, 0 }, { HALT, 0 }, { INX, "SP" }, { DCX, "SP" },
+ { LXI, "SP,%w" }, { ANIW, "%a,%b" }, { illegal, 0 }, { ANI, "A,%b" },
+ { RET, 0 }, { SIO, 0 }, { MOV, "A,B" }, { MOV, "A,C" },
+ { MOV, "A,D" }, { MOV, "A,E" }, { MOV, "A,H" }, { MOV, "A,L" },
+
+ { EX, 0 }, { EXX, 0 }, { INX, "BC" }, { DCX, "BC" },
+ { LXI, "BC,%w" }, { ORIW, "%a,%b" }, { XRI, "A,%b" }, { ORI, "A,%b" },
+ { RETS, 0 }, { STM, 0 }, { MOV, "B,A" }, { MOV, "C,A" },
+ { MOV, "D,A" }, { MOV, "E,A" }, { MOV, "H,A" }, { MOV, "L,A" },
+
+ { INRW, "%a" }, { TABLE, 0 }, { INX, "DE" }, { DCX, "DE" },
+ { LXI, "DE,%w" }, { GTIW, "%a,%b" }, { ADINC, "A,%b" }, { GTI, "A,%b" },
+ { LDAW, "%a" }, { LDAX, "BC" }, { LDAX, "DE" }, { LDAX, "HL" },
+ { LDAX, "DE+" }, { LDAX, "HL+" }, { LDAX, "DE-" }, { LDAX, "HL-" },
+
+ { DCRW, "%a" }, { BLOCK, 0 }, { INX, "HL" }, { DCX, "HL" },
+ { LXI, "HL,%w" }, { LTIW, "%a,%b" }, { SUINB, "A,%b" }, { LTI, "A,%b" },
+ { STAW, "%a" }, { STAX, "BC" }, { STAX, "DE" }, { STAX, "HL" },
+ { STAX, "DE+" }, { STAX, "HL+" }, { STAX, "DE-" }, { STAX, "HL-" },
/* 0x40 - 0x7F */
- { illegal, 0 }, { INR, "A" }, { INR, "B" }, { INR, "C" },
- { CALL, "%w" }, { ONIW, "%a,%b" }, { ADI, "A,%b" }, { ONI, "A,%b" },
- { 0, dasm48_7801 }, { MVIX, "BC,%b" }, { MVIX, "DE,%b" }, { MVIX, "HL,%b" },
- { 0, dasm4c_7801 }, { 0, dasm4d_7801 }, { JRE, "%d" }, { JRE, "%d" },
-
- { illegal, 0 }, { DCR, "A" }, { DCR, "B" }, { DCR, "C" },
- { JMP, "%w" }, { OFFIW, "%a,%b" }, { ACI, "A,%b" }, { OFFI, "A,%b" },
- { BIT, "0,%a" }, { BIT, "1,%a" }, { BIT," 2,%a" }, { BIT, "3,%a" },
- { BIT, "4,%a" }, { BIT, "5,%a" }, { BIT, "6,%a" }, { BIT, "7,%a" },
-
- { 0, dasm60_7801 }, { DAA, 0 }, { RETI, 0 }, { CALB, 0 },
- { 0, dasm64_7801 }, { NEIW, "%a,%b" }, { SUI, "A,%b" }, { NEI, "A,%b" },
- { MVI, "V,%b" }, { MVI, "A,%b" }, { MVI, "B,%b" }, { MVI, "C,%b" },
- { MVI, "D,%b" }, { MVI, "E,%b" }, { MVI, "H,%b" }, { MVI, "L,%b" },
-
- { 0, dasm70_7801 }, { MVIW, "%a,%b" }, { SOFTI, 0 }, { JB, 0 },
- { 0, dasm74_7801 }, { EQIW, "%a,%b" }, { SBI, "A,%b" }, { EQI, "A,%b" },
- { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
- { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
+ { illegal, 0 }, { INR, "A" }, { INR, "B" }, { INR, "C" },
+ { CALL, "%w" }, { ONIW, "%a,%b" }, { ADI, "A,%b" }, { ONI, "A,%b" },
+ { 0, dasm48_7801 }, { MVIX, "BC,%b" }, { MVIX, "DE,%b" }, { MVIX, "HL,%b" },
+ { 0, dasm4c_7801 }, { 0, dasm4d_7801 }, { JRE, "%d" }, { JRE, "%d" },
+
+ { illegal, 0 }, { DCR, "A" }, { DCR, "B" }, { DCR, "C" },
+ { JMP, "%w" }, { OFFIW, "%a,%b" }, { ACI, "A,%b" }, { OFFI, "A,%b" },
+ { BIT, "0,%a" }, { BIT, "1,%a" }, { BIT," 2,%a" }, { BIT, "3,%a" },
+ { BIT, "4,%a" }, { BIT, "5,%a" }, { BIT, "6,%a" }, { BIT, "7,%a" },
+
+ { 0, dasm60_7801 }, { DAA, 0 }, { RETI, 0 }, { CALB, 0 },
+ { 0, dasm64_7801 }, { NEIW, "%a,%b" }, { SUI, "A,%b" }, { NEI, "A,%b" },
+ { MVI, "V,%b" }, { MVI, "A,%b" }, { MVI, "B,%b" }, { MVI, "C,%b" },
+ { MVI, "D,%b" }, { MVI, "E,%b" }, { MVI, "H,%b" }, { MVI, "L,%b" },
+
+ { 0, dasm70_7801 }, { MVIW, "%a,%b" }, { SOFTI, 0 }, { JB, 0 },
+ { 0, dasm74_7801 }, { EQIW, "%a,%b" }, { SBI, "A,%b" }, { EQI, "A,%b" },
+ { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
+ { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
/* 0x80 - 0xBF */
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
-
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
-
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
-
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
/* 0xC0 - 0xFF */
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
-
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
-
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
-
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" }
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" }
};
/*********************************************************
@@ -4660,690 +4660,690 @@ static const struct dasm_s dasmXX_7801[256] = {
static const struct dasm_s dasm48_78c05[256] = {
/* 0x00 - 0x3F */
- { SKIT, "F0" }, { SKIT, "FT" }, { SKIT, "F1" }, { illegal, 0 }, /* TODO: PDF doesn't mention SKIT and SK */
- { SKIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SK, "CY" }, { illegal, 0 },
- { SK, "Z" }, { illegal, 0 }, { PUSH, "VA" }, { POP, "VA" },
-
- { SKNIT, "F0" }, { SKNIT, "FT" }, { SKNIT, "F1" }, { illegal, 0 },
- { SKNIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SKN, "CY" }, { illegal, 0 },
- { SKN, "Z" }, { illegal, 0 }, { PUSH, "BC" }, { POP, "BC" },
-
- { EI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { DI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { CLC, 0 }, { STC, 0 },
- { illegal, 0 }, { PEX, 0 }, { PUSH, "DE" }, { POP, "DE" },
-
- { RLL, "A" }, { RLR, "A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { RLD, 0 }, { RRD, 0 }, { illegal, 0 }, { illegal, 0 },
- { PER, 0 }, { illegal, 0 }, { PUSH, "HL" }, { POP, "HL" },
+ { SKIT, "F0" }, { SKIT, "FT" }, { SKIT, "F1" }, { illegal, 0 }, /* TODO: PDF doesn't mention SKIT and SK */
+ { SKIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SK, "CY" }, { illegal, 0 },
+ { SK, "Z" }, { illegal, 0 }, { PUSH, "VA" }, { POP, "VA" },
+
+ { SKNIT, "F0" }, { SKNIT, "FT" }, { SKNIT, "F1" }, { illegal, 0 },
+ { SKNIT, "FS" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SKN, "CY" }, { illegal, 0 },
+ { SKN, "Z" }, { illegal, 0 }, { PUSH, "BC" }, { POP, "BC" },
+
+ { EI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { DI, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { CLC, 0 }, { STC, 0 },
+ { illegal, 0 }, { PEX, 0 }, { PUSH, "DE" }, { POP, "DE" },
+
+ { RLL, "A" }, { RLR, "A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { RLD, 0 }, { RRD, 0 }, { illegal, 0 }, { illegal, 0 },
+ { PER, 0 }, { illegal, 0 }, { PUSH, "HL" }, { POP, "HL" },
/* 0x40 - 0x7F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0xC0 - 0xFF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
};
static const struct dasm_s dasm4c_78c05[256] = {
/* 0x00 - 0x3F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x40 - 0x7F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0xC0 - 0xFF */
- { MOV, "A,PA" }, { MOV, "A,PB" }, { MOV, "A,PC" }, { MOV, "A,MK" },
- { MOV, "A,MB" }, { MOV, "A,MC" }, { MOV, "A,TM0" }, { MOV, "A,TM1" },
- { MOV, "A,S" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, /* TODO: Figure out what regsiter C9 indicates */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
+ { MOV, "A,PA" }, { MOV, "A,PB" }, { MOV, "A,PC" }, { MOV, "A,MK" },
+ { MOV, "A,MB" }, { MOV, "A,MC" }, { MOV, "A,TM0" }, { MOV, "A,TM1" },
+ { MOV, "A,S" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, /* TODO: Figure out what regsiter C9 indicates */
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
};
static const struct dasm_s dasm4d_78c05[256] = {
/* 0x00 - 0x3F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x40 - 0x7F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0xC0 - 0xFF */
- { MOV, "PA,A" }, { MOV, "PB,A" }, { MOV, "PC,A" }, { MOV, "MK,A" },
- { MOV, "MB,A" }, { MOV, "MC,A" }, { MOV, "TM0,A" }, { MOV, "TM1,A" },
- { MOV, "S,A" }, { MOV, "TMM,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
+ { MOV, "PA,A" }, { MOV, "PB,A" }, { MOV, "PC,A" }, { MOV, "MK,A" },
+ { MOV, "MB,A" }, { MOV, "MC,A" }, { MOV, "TM0,A" }, { MOV, "TM1,A" },
+ { MOV, "S,A" }, { MOV, "TMM,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
};
static const struct dasm_s dasm60_78c05[256] = {
/* 0x00 - 0x3F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { ANA, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { XRA, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { ORA, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { ADDNC, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { GTA, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { SUBNB, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { LTA, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ANA, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { XRA, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ORA, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { ADDNC, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { GTA, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { SUBNB, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { LTA, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x40 - 0x7F */
- { illegal, 0 }, { ADD, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { ADC, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { SUB, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { NEA, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { SBB, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { EQA, "A,A" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ADD, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { ADC, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { SUB, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { NEA, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { SBB, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { EQA, "A,A" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { ANA, "A,A" }, { ANA, "A,B" }, { ANA, "A,C" },
- { ANA, "A,D" }, { ANA, "A,E" }, { ANA, "A,H" }, { ANA, "A,L" },
-
- { illegal, 0 }, { XRA, "A,A" }, { XRA, "A,B" }, { XRA, "A,C" },
- { XRA, "A,D" }, { XRA, "A,E" }, { XRA, "A,H" }, { XRA, "A,L" },
- { illegal, 0 }, { ORA, "A,A" }, { ORA, "A,B" }, { ORA, "A,C" },
- { ORA, "A,D" }, { ORA, "A,E" }, { ORA, "A,H" }, { ORA, "A,L" },
-
- { illegal, 0 }, { ADDNC, "A,A" }, { ADDNC, "A,B" }, { ADDNC, "A,C" },
- { ADDNC, "A,D" }, { ADDNC, "A,E" }, { ADDNC, "A,H" }, { ADDNC, "A,L" },
- { illegal, 0 }, { GTA, "A,A" }, { GTA, "A,B" }, { GTA, "A,C" },
- { GTA, "A,D" }, { GTA, "A,E" }, { GTA, "A,H" }, { GTA, "A,L" },
-
- { illegal, 0 }, { SUBNB, "A,A" }, { SUBNB, "A,B" }, { SUBNB, "A,C" },
- { SUBNB, "A,D" }, { SUBNB, "A,E" }, { SUBNB, "A,H" }, { SUBNB, "A,L" },
- { illegal, 0 }, { LTA, "A,A" }, { LTA, "A,B" }, { LTA, "A,C" },
- { LTA, "A,D" }, { LTA, "A,E" }, { LTA, "A,H" }, { LTA, "A,L" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ANA, "A,A" }, { ANA, "A,B" }, { ANA, "A,C" },
+ { ANA, "A,D" }, { ANA, "A,E" }, { ANA, "A,H" }, { ANA, "A,L" },
+
+ { illegal, 0 }, { XRA, "A,A" }, { XRA, "A,B" }, { XRA, "A,C" },
+ { XRA, "A,D" }, { XRA, "A,E" }, { XRA, "A,H" }, { XRA, "A,L" },
+ { illegal, 0 }, { ORA, "A,A" }, { ORA, "A,B" }, { ORA, "A,C" },
+ { ORA, "A,D" }, { ORA, "A,E" }, { ORA, "A,H" }, { ORA, "A,L" },
+
+ { illegal, 0 }, { ADDNC, "A,A" }, { ADDNC, "A,B" }, { ADDNC, "A,C" },
+ { ADDNC, "A,D" }, { ADDNC, "A,E" }, { ADDNC, "A,H" }, { ADDNC, "A,L" },
+ { illegal, 0 }, { GTA, "A,A" }, { GTA, "A,B" }, { GTA, "A,C" },
+ { GTA, "A,D" }, { GTA, "A,E" }, { GTA, "A,H" }, { GTA, "A,L" },
+
+ { illegal, 0 }, { SUBNB, "A,A" }, { SUBNB, "A,B" }, { SUBNB, "A,C" },
+ { SUBNB, "A,D" }, { SUBNB, "A,E" }, { SUBNB, "A,H" }, { SUBNB, "A,L" },
+ { illegal, 0 }, { LTA, "A,A" }, { LTA, "A,B" }, { LTA, "A,C" },
+ { LTA, "A,D" }, { LTA, "A,E" }, { LTA, "A,H" }, { LTA, "A,L" },
/* 0xC0 - 0xFF */
- { illegal, 0 }, { ADD, "A,A" }, { ADD, "A,B" }, { ADD, "A,C" },
- { ADD, "A,D" }, { ADD, "A,E" }, { ADD, "A,H" }, { ADD, "A,L" },
- { illegal, 0 }, { ONA, "A,A" }, { ONA, "A,B" }, { ONA, "A,C" },
- { ONA, "A,D" }, { ONA, "A,E" }, { ONA, "A,H" }, { ONA, "A,L" },
-
- { illegal, 0 }, { ADC, "A,A" }, { ADC, "A,B" }, { ADC, "A,C" },
- { ADC, "A,D" }, { ADC, "A,E" }, { ADC, "A,H" }, { ADC, "A,L" },
- { illegal, 0 }, { OFFA, "A,A" }, { OFFA, "A,B" }, { OFFA, "A,C" },
- { OFFA, "A,D" }, { OFFA, "A,E" }, { OFFA, "A,H" }, { OFFA, "A,L" },
-
- { illegal, 0 }, { SUB, "A,A" }, { SUB, "A,B" }, { SUB, "A,C" },
- { SUB, "A,D" }, { SUB, "A,E" }, { SUB, "A,H" }, { SUB, "A,L" },
- { illegal, 0 }, { NEA, "A,A" }, { NEA, "A,B" }, { NEA, "A,C" },
- { NEA, "A,D" }, { NEA, "A,E" }, { NEA, "A,H" }, { NEA, "A,L" },
-
- { illegal, 0 }, { SBB, "A,A" }, { SBB, "A,B" }, { SBB, "A,C" },
- { SBB, "A,D" }, { SBB, "A,E" }, { SBB, "A,H" }, { SBB, "A,L" },
- { illegal, 0 }, { EQA, "A,A" }, { EQA, "A,B" }, { EQA, "A,C" },
- { EQA, "A,D" }, { EQA, "A,E" }, { EQA, "A,H" }, { EQA, "A,L" }
+ { illegal, 0 }, { ADD, "A,A" }, { ADD, "A,B" }, { ADD, "A,C" },
+ { ADD, "A,D" }, { ADD, "A,E" }, { ADD, "A,H" }, { ADD, "A,L" },
+ { illegal, 0 }, { ONA, "A,A" }, { ONA, "A,B" }, { ONA, "A,C" },
+ { ONA, "A,D" }, { ONA, "A,E" }, { ONA, "A,H" }, { ONA, "A,L" },
+
+ { illegal, 0 }, { ADC, "A,A" }, { ADC, "A,B" }, { ADC, "A,C" },
+ { ADC, "A,D" }, { ADC, "A,E" }, { ADC, "A,H" }, { ADC, "A,L" },
+ { illegal, 0 }, { OFFA, "A,A" }, { OFFA, "A,B" }, { OFFA, "A,C" },
+ { OFFA, "A,D" }, { OFFA, "A,E" }, { OFFA, "A,H" }, { OFFA, "A,L" },
+
+ { illegal, 0 }, { SUB, "A,A" }, { SUB, "A,B" }, { SUB, "A,C" },
+ { SUB, "A,D" }, { SUB, "A,E" }, { SUB, "A,H" }, { SUB, "A,L" },
+ { illegal, 0 }, { NEA, "A,A" }, { NEA, "A,B" }, { NEA, "A,C" },
+ { NEA, "A,D" }, { NEA, "A,E" }, { NEA, "A,H" }, { NEA, "A,L" },
+
+ { illegal, 0 }, { SBB, "A,A" }, { SBB, "A,B" }, { SBB, "A,C" },
+ { SBB, "A,D" }, { SBB, "A,E" }, { SBB, "A,H" }, { SBB, "A,L" },
+ { illegal, 0 }, { EQA, "A,A" }, { EQA, "A,B" }, { EQA, "A,C" },
+ { EQA, "A,D" }, { EQA, "A,E" }, { EQA, "A,H" }, { EQA, "A,L" }
};
static const struct dasm_s dasm64_78c05[256] = {
/* 0x00 - 0x3F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { ANI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { XRI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { ORI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { ADINC, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { GTI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { SUINB, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { LTI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ANI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { XRI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ORI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { ADINC, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { GTI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { SUINB, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { LTI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x40 - 0x7F */
- { illegal, 0 }, { ADI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { ONI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { ACI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { OFFI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { SUI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { NEI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { SBI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { EQI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ADI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ONI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { ACI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { OFFI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { SUI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { NEI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { SBI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { EQI, "A,%b" }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ANI, "PA,%b" }, { ANI, "PB,%b" }, { ANI, "PC,%b" }, { ANI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ANI, "PA,%b" }, { ANI, "PB,%b" }, { ANI, "PC,%b" }, { ANI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { XRI, "PA,%b" }, { XRI, "PB,%b" }, { XRI, "PC,%b" }, { XRI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ORI, "PA,%b" }, { ORI, "PB,%b" }, { ORI, "PC,%b" }, { ORI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { XRI, "PA,%b" }, { XRI, "PB,%b" }, { XRI, "PC,%b" }, { XRI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ORI, "PA,%b" }, { ORI, "PB,%b" }, { ORI, "PC,%b" }, { ORI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
{ ADINC, "PA,%b" }, { ADINC, "PB,%b" }, { ADINC, "PC,%b" }, { ADINC, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { GTI, "PA,%b" }, { GTI, "PB,%b" }, { GTI, "PC,%b" }, { GTI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { GTI, "PA,%b" }, { GTI, "PB,%b" }, { GTI, "PC,%b" }, { GTI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
{ SUINB, "PA,%b" }, { SUINB, "PB,%b" }, { SUINB, "PC,%b" }, { SUINB, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { LTI, "PA,%b" }, { LTI, "PB,%b" }, { LTI, "PC,%b" }, { LTI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { LTI, "PA,%b" }, { LTI, "PB,%b" }, { LTI, "PC,%b" }, { LTI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0xC0 - 0xFF */
- { ADI, "PA,%b" }, { ADI, "PB,%b" }, { ADI, "PC,%b" }, { ADI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ONI, "PA,%b" }, { ONI, "PB,%b" }, { ONI, "PC,%b" }, { ONI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { ACI, "PA,%b" }, { ACI, "PB,%b" }, { ACI, "PC,%b" }, { ACI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { SUI, "PA,%b" }, { SUI, "PB,%b" }, { SUI, "PC,%b" }, { SUI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { NEI, "PA,%b" }, { NEI, "PB,%b" }, { NEI, "PC,%b" }, { NEI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { SBI, "PA,%b" }, { SBI, "PB,%b" }, { SBI, "PC,%b" }, { SBI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { SBI, "PA,%b" }, { SBI, "PB,%b" }, { SBI, "PC,%b" }, { SBI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { EQI, "PA,%b" }, { EQI, "PB,%b" }, { EQI, "PC,%b" }, { EQI, "MK,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
+ { ADI, "PA,%b" }, { ADI, "PB,%b" }, { ADI, "PC,%b" }, { ADI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ONI, "PA,%b" }, { ONI, "PB,%b" }, { ONI, "PC,%b" }, { ONI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { ACI, "PA,%b" }, { ACI, "PB,%b" }, { ACI, "PC,%b" }, { ACI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { SUI, "PA,%b" }, { SUI, "PB,%b" }, { SUI, "PC,%b" }, { SUI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { NEI, "PA,%b" }, { NEI, "PB,%b" }, { NEI, "PC,%b" }, { NEI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { SBI, "PA,%b" }, { SBI, "PB,%b" }, { SBI, "PC,%b" }, { SBI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { SBI, "PA,%b" }, { SBI, "PB,%b" }, { SBI, "PC,%b" }, { SBI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { EQI, "PA,%b" }, { EQI, "PB,%b" }, { EQI, "PC,%b" }, { EQI, "MK,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 }
};
static const struct dasm_s dasm70_78c05[256] = {
/* 0x00 - 0x3F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SSPD, "%w" }, { LSPD, "%w" },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SBCD, "%w" }, { LBCD, "%w" },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SDED, "%w" }, { LDED, "%w" },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { SHLD, "%w" }, { LHLD, "%w" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SSPD, "%w" }, { LSPD, "%w" },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SBCD, "%w" }, { LBCD, "%w" },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SDED, "%w" }, { LDED, "%w" },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { SHLD, "%w" }, { LHLD, "%w" },
/* 0x40 - 0x7F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { MOV, "A,%w" }, { MOV, "B,%w" }, { MOV, "C,%w" },
- { MOV, "D,%w" }, { MOV, "E,%w" }, { MOV, "H,%w" }, { MOV, "L,%w" },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { MOV, "%w,A" }, { MOV, "%w,B" }, { MOV, "%w,C" },
- { MOV, "%w,D" }, { MOV, "%w,E" }, { MOV, "%w,H" }, { MOV, "%w,L" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { MOV, "A,%w" }, { MOV, "B,%w" }, { MOV, "C,%w" },
+ { MOV, "D,%w" }, { MOV, "E,%w" }, { MOV, "H,%w" }, { MOV, "L,%w" },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { MOV, "%w,A" }, { MOV, "%w,B" }, { MOV, "%w,C" },
+ { MOV, "%w,D" }, { MOV, "%w,E" }, { MOV, "%w,H" }, { MOV, "%w,L" },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { ANAX, "BC" }, { ANAX, "DE" }, { ANAX, "HL" },
- { ANAX, "DE+" }, { ANAX, "HL+" }, { ANAX, "DE-" }, { ANAX, "HL-" },
-
- { illegal, 0 }, { XRAX, "BC" }, { XRAX, "DE" }, { XRAX, "HL" },
- { XRAX, "DE+" }, { XRAX, "HL+" }, { XRAX, "DE-" }, { XRAX, "HL-" },
- { illegal, 0 }, { ORAX, "BC" }, { ORAX, "DE" }, { ORAX, "HL" },
- { ORAX, "DE+" }, { ORAX, "HL+" }, { ORAX, "DE-" }, { ORAX, "HL-" },
-
- { illegal, 0 }, { ADDNCX, "BC" }, { ADDNCX, "DE" }, { ADDNCX, "HL" },
- { ADDNCX, "DE+" }, { ADDNCX, "HL+" }, { ADDNCX, "DE-" }, { ADDNCX, "HL-" },
- { illegal, 0 }, { GTAX, "BC" }, { GTAX, "DE" }, { GTAX, "HL" },
- { GTAX, "DE+" }, { GTAX, "HL+" }, { GTAX, "DE-" }, { GTAX, "HL-" },
-
- { illegal, 0 }, { SUBNBX, "BC" }, { SUBNBX, "DE" }, { SUBNBX, "HL" },
- { SUBNBX, "DE+" }, { SUBNBX, "HL+" }, { SUBNBX, "DE-" }, { SUBNBX, "HL-" },
- { illegal, 0 }, { LTAX, "BC" }, { LTAX, "DE" }, { LTAX, "HL" },
- { LTAX, "DE+" }, { LTAX, "HL+" }, { LTAX, "DE-" }, { LTAX, "HL-" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { ANAX, "BC" }, { ANAX, "DE" }, { ANAX, "HL" },
+ { ANAX, "DE+" }, { ANAX, "HL+" }, { ANAX, "DE-" }, { ANAX, "HL-" },
+
+ { illegal, 0 }, { XRAX, "BC" }, { XRAX, "DE" }, { XRAX, "HL" },
+ { XRAX, "DE+" }, { XRAX, "HL+" }, { XRAX, "DE-" }, { XRAX, "HL-" },
+ { illegal, 0 }, { ORAX, "BC" }, { ORAX, "DE" }, { ORAX, "HL" },
+ { ORAX, "DE+" }, { ORAX, "HL+" }, { ORAX, "DE-" }, { ORAX, "HL-" },
+
+ { illegal, 0 }, { ADDNCX, "BC" }, { ADDNCX, "DE" }, { ADDNCX, "HL" },
+ { ADDNCX, "DE+" }, { ADDNCX, "HL+" }, { ADDNCX, "DE-" }, { ADDNCX, "HL-" },
+ { illegal, 0 }, { GTAX, "BC" }, { GTAX, "DE" }, { GTAX, "HL" },
+ { GTAX, "DE+" }, { GTAX, "HL+" }, { GTAX, "DE-" }, { GTAX, "HL-" },
+
+ { illegal, 0 }, { SUBNBX, "BC" }, { SUBNBX, "DE" }, { SUBNBX, "HL" },
+ { SUBNBX, "DE+" }, { SUBNBX, "HL+" }, { SUBNBX, "DE-" }, { SUBNBX, "HL-" },
+ { illegal, 0 }, { LTAX, "BC" }, { LTAX, "DE" }, { LTAX, "HL" },
+ { LTAX, "DE+" }, { LTAX, "HL+" }, { LTAX, "DE-" }, { LTAX, "HL-" },
/* 0xC0 - 0xFF */
- { illegal, 0 }, { ADDX, "BC" }, { ADDX, "DE" }, { ADDX, "HL" },
- { ADDX, "DE+" }, { ADDX, "HL+" }, { ADDX, "DE-" }, { ADDX, "HL-" },
- { illegal, 0 }, { ONAX, "BC" }, { ONAX, "DE" }, { ONAX, "HL" },
- { ONAX, "DE+" }, { ONAX, "HL+" }, { ONAX, "DE-" }, { ONAX, "HL-" },
-
- { illegal, 0 }, { ADCX, "BC" }, { ADCX, "DE" }, { ADCX, "HL" },
- { ADCX, "DE+" }, { ADCX, "HL+" }, { ADCX, "DE-" }, { ADCX, "HL-" },
- { illegal, 0 }, { OFFAX, "BC" }, { OFFAX, "DE" }, { OFFAX, "HL" },
- { OFFAX, "DE+" }, { OFFAX, "HL+" }, { OFFAX, "DE-" }, { OFFAX, "HL-" },
-
- { illegal, 0 }, { SUBX, "BC" }, { SUBX, "DE" }, { SUBX, "HL" },
- { SUBX, "DE+" }, { SUBX, "HL+" }, { SUBX, "DE-" }, { SUBX, "HL-" },
- { illegal, 0 }, { NEAX, "BC" }, { NEAX, "DE" }, { NEAX, "HL" },
- { NEAX, "DE+" }, { NEAX, "HL+" }, { NEAX, "DE-" }, { NEAX, "HL-" },
-
- { illegal, 0 }, { SBBX, "BC" }, { SBBX, "DE" }, { SBBX, "HL" },
- { SBBX, "DE+" }, { SBBX, "HL+" }, { SBBX, "DE-" }, { SBBX, "HL-" },
- { illegal, 0 }, { EQAX, "BC" }, { EQAX, "DE" }, { EQAX, "HL" },
- { EQAX, "DE+" }, { EQAX, "HL+" }, { EQAX, "DE-" }, { EQAX, "HL-" },
+ { illegal, 0 }, { ADDX, "BC" }, { ADDX, "DE" }, { ADDX, "HL" },
+ { ADDX, "DE+" }, { ADDX, "HL+" }, { ADDX, "DE-" }, { ADDX, "HL-" },
+ { illegal, 0 }, { ONAX, "BC" }, { ONAX, "DE" }, { ONAX, "HL" },
+ { ONAX, "DE+" }, { ONAX, "HL+" }, { ONAX, "DE-" }, { ONAX, "HL-" },
+
+ { illegal, 0 }, { ADCX, "BC" }, { ADCX, "DE" }, { ADCX, "HL" },
+ { ADCX, "DE+" }, { ADCX, "HL+" }, { ADCX, "DE-" }, { ADCX, "HL-" },
+ { illegal, 0 }, { OFFAX, "BC" }, { OFFAX, "DE" }, { OFFAX, "HL" },
+ { OFFAX, "DE+" }, { OFFAX, "HL+" }, { OFFAX, "DE-" }, { OFFAX, "HL-" },
+
+ { illegal, 0 }, { SUBX, "BC" }, { SUBX, "DE" }, { SUBX, "HL" },
+ { SUBX, "DE+" }, { SUBX, "HL+" }, { SUBX, "DE-" }, { SUBX, "HL-" },
+ { illegal, 0 }, { NEAX, "BC" }, { NEAX, "DE" }, { NEAX, "HL" },
+ { NEAX, "DE+" }, { NEAX, "HL+" }, { NEAX, "DE-" }, { NEAX, "HL-" },
+
+ { illegal, 0 }, { SBBX, "BC" }, { SBBX, "DE" }, { SBBX, "HL" },
+ { SBBX, "DE+" }, { SBBX, "HL+" }, { SBBX, "DE-" }, { SBBX, "HL-" },
+ { illegal, 0 }, { EQAX, "BC" }, { EQAX, "DE" }, { EQAX, "HL" },
+ { EQAX, "DE+" }, { EQAX, "HL+" }, { EQAX, "DE-" }, { EQAX, "HL-" },
};
static const struct dasm_s dasm74_78c05[256] = {
/* 0x00 - 0x3F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x40 - 0x7F */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0x80 - 0xBF */
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ANAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { XRAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ORAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { ADDNCW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { GTAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { SUBNBW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { LTAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ANAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { XRAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ORAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { ADDNCW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { GTAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { SUBNBW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { LTAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
/* 0xC0 - 0xFF */
- { ADDW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { ONAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { ADCW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { OFFAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { SUBW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { NEAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { SBBW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { EQAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ADDW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { ONAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { ADCW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { OFFAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { SUBW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { NEAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { SBBW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { EQAW, "%a" }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
};
static const struct dasm_s dasmXX_78c05[256] = {
/* 0x00 - 0x3F */
- { NOP, 0 }, { HALT, 0 }, { INX, "SP" }, { DCX, "SP" },
- { LXI, "SP,%w" }, { ANIW, "%a,%b" }, { illegal, 0 }, { ANI, "A,%b" },
- { RET, 0 }, { SIO, 0 }, { MOV, "A,B" }, { MOV, "A,C" },
- { MOV, "A,D" }, { MOV, "A,E" }, { MOV, "A,H" }, { MOV, "A,L" },
-
- { illegal, 0 }, { illegal, 0 }, { INX, "BC" }, { DCX, "BC" },
- { LXI, "BC,%w" }, { ORIW, "%a,%b" }, { XRI, "A,%b" }, { ORI, "A,%b" },
- { RETS, 0 }, { STM, 0 }, { MOV, "B,A" }, { MOV, "C,A" },
- { MOV, "D,A" }, { MOV, "E,A" }, { MOV, "H,A" }, { MOV, "L,A" },
-
- { INRW, "%a" }, { illegal, 0 }, { INX, "DE" }, { DCX, "DE" },
- { LXI, "DE,%w" }, { GTIW, "%a,%b" }, { ADINC, "A,%b" }, { GTI, "A,%b" },
- { LDAW, "%a" }, { LDAX, "BC" }, { LDAX, "DE" }, { LDAX, "HL" },
- { LDAX, "DE+" }, { LDAX, "HL+" }, { LDAX, "DE-" }, { LDAX, "HL-" },
-
- { DCRW, "%a" }, { illegal, 0 }, { INX, "HL" }, { DCX, "HL" },
- { LXI, "HL,%w" }, { LTIW, "%a,%b" }, { SUINB, "A,%b" }, { LTI, "A,%b" },
- { STAW, "%a" }, { STAX, "BC" }, { STAX, "DE" }, { STAX, "HL" },
- { STAX, "DE+" }, { STAX, "HL+" }, { STAX, "DE-" }, { STAX, "HL-" },
+ { NOP, 0 }, { HALT, 0 }, { INX, "SP" }, { DCX, "SP" },
+ { LXI, "SP,%w" }, { ANIW, "%a,%b" }, { illegal, 0 }, { ANI, "A,%b" },
+ { RET, 0 }, { SIO, 0 }, { MOV, "A,B" }, { MOV, "A,C" },
+ { MOV, "A,D" }, { MOV, "A,E" }, { MOV, "A,H" }, { MOV, "A,L" },
+
+ { illegal, 0 }, { illegal, 0 }, { INX, "BC" }, { DCX, "BC" },
+ { LXI, "BC,%w" }, { ORIW, "%a,%b" }, { XRI, "A,%b" }, { ORI, "A,%b" },
+ { RETS, 0 }, { STM, 0 }, { MOV, "B,A" }, { MOV, "C,A" },
+ { MOV, "D,A" }, { MOV, "E,A" }, { MOV, "H,A" }, { MOV, "L,A" },
+
+ { INRW, "%a" }, { illegal, 0 }, { INX, "DE" }, { DCX, "DE" },
+ { LXI, "DE,%w" }, { GTIW, "%a,%b" }, { ADINC, "A,%b" }, { GTI, "A,%b" },
+ { LDAW, "%a" }, { LDAX, "BC" }, { LDAX, "DE" }, { LDAX, "HL" },
+ { LDAX, "DE+" }, { LDAX, "HL+" }, { LDAX, "DE-" }, { LDAX, "HL-" },
+
+ { DCRW, "%a" }, { illegal, 0 }, { INX, "HL" }, { DCX, "HL" },
+ { LXI, "HL,%w" }, { LTIW, "%a,%b" }, { SUINB, "A,%b" }, { LTI, "A,%b" },
+ { STAW, "%a" }, { STAX, "BC" }, { STAX, "DE" }, { STAX, "HL" },
+ { STAX, "DE+" }, { STAX, "HL+" }, { STAX, "DE-" }, { STAX, "HL-" },
/* 0x40 - 0x7F */
- { illegal, 0 }, { INR, "A" }, { INR, "B" }, { INR, "C" },
- { CALL, "%w" }, { ONIW, "%a,%b" }, { ADI, "A,%b" }, { ONI, "A,%b" },
- { 0, dasm48_78c05 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { 0, dasm4c_78c05 }, { 0, dasm4d_78c05 }, { JRE, "%d" }, { JRE, "%d" },
-
- { illegal, 0 }, { DCR, "A" }, { DCR, "B" }, { DCR, "C" },
- { JMP, "%w" }, { OFFIW, "%a,%b" }, { ACI, "A,%b" }, { OFFI, "A,%b" },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
- { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
-
- { 0, dasm60_78c05 }, { DAA, 0 }, { RETI, 0 }, { CALB, 0 },
- { 0, dasm64_78c05 }, { NEIW, "%a,%b" }, { SUI, "A,%b" }, { NEI, "A,%b" },
- { illegal, 0 }, { MVI, "A,%b" }, { MVI, "B,%b" }, { MVI, "C,%b" },
- { MVI, "D,%b" }, { MVI, "E,%b" }, { MVI, "H,%b" }, { MVI, "L,%b" },
-
- { 0, dasm70_78c05 }, { MVIW, "%a,%b" }, { SOFTI, 0 }, { JB, 0 },
- { 0, dasm74_78c05 }, { EQIW, "%a,%b" }, { SBI, "A,%b" }, { EQI, "A,%b" },
- { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
- { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
+ { illegal, 0 }, { INR, "A" }, { INR, "B" }, { INR, "C" },
+ { CALL, "%w" }, { ONIW, "%a,%b" }, { ADI, "A,%b" }, { ONI, "A,%b" },
+ { 0, dasm48_78c05 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { 0, dasm4c_78c05 }, { 0, dasm4d_78c05 }, { JRE, "%d" }, { JRE, "%d" },
+
+ { illegal, 0 }, { DCR, "A" }, { DCR, "B" }, { DCR, "C" },
+ { JMP, "%w" }, { OFFIW, "%a,%b" }, { ACI, "A,%b" }, { OFFI, "A,%b" },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+ { illegal, 0 }, { illegal, 0 }, { illegal, 0 }, { illegal, 0 },
+
+ { 0, dasm60_78c05 }, { DAA, 0 }, { RETI, 0 }, { CALB, 0 },
+ { 0, dasm64_78c05 }, { NEIW, "%a,%b" }, { SUI, "A,%b" }, { NEI, "A,%b" },
+ { illegal, 0 }, { MVI, "A,%b" }, { MVI, "B,%b" }, { MVI, "C,%b" },
+ { MVI, "D,%b" }, { MVI, "E,%b" }, { MVI, "H,%b" }, { MVI, "L,%b" },
+
+ { 0, dasm70_78c05 }, { MVIW, "%a,%b" }, { SOFTI, 0 }, { JB, 0 },
+ { 0, dasm74_78c05 }, { EQIW, "%a,%b" }, { SBI, "A,%b" }, { EQI, "A,%b" },
+ { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
+ { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" }, { CALF, "%f" },
/* 0x80 - 0xBF */
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
-
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
-
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
-
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
- { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
+ { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" }, { CALT, "%t" },
/* 0xC0 - 0xFF */
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
-
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
-
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
-
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
- { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" }
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" },
+ { JR, "%o" }, { JR, "%o" }, { JR, "%o" }, { JR, "%o" }
};
@@ -5462,5 +5462,3 @@ CPU_DISASSEMBLE( upd78c05 )
{
return Dasm( buffer, pc, dasmXX_78c05, oprom, opram, 0 );
}
-
-
diff --git a/src/emu/cpu/upd7810/7810ops.c b/src/emu/cpu/upd7810/7810ops.c
index 937d544e1c3..5b08c40558c 100644
--- a/src/emu/cpu/upd7810/7810ops.c
+++ b/src/emu/cpu/upd7810/7810ops.c
@@ -290,7 +290,7 @@ static void HALT(upd7810_state *cpustate)
int cycles = (cpustate->icount / 4) * 4;
cpustate->icount -= cycles;
cpustate->handle_timers(cpustate, cycles);
- PC -= 1; /* continue executing HALT */
+ PC -= 1; /* continue executing HALT */
}
/* 48 3d: 0100 1000 0011 1101 */
@@ -304,7 +304,7 @@ static void DIV_A(upd7810_state *cpustate)
A = remainder;
}
else
- EA = 0xffff; /* guess */
+ EA = 0xffff; /* guess */
}
/* 48 3e: 0100 1000 0011 1110 */
@@ -318,7 +318,7 @@ static void DIV_B(upd7810_state *cpustate)
B = remainder;
}
else
- EA = 0xffff; /* guess */
+ EA = 0xffff; /* guess */
}
/* 48 3f: 0100 1000 0011 1111 */
@@ -332,7 +332,7 @@ static void DIV_C(upd7810_state *cpustate)
C = remainder;
}
else
- EA = 0xffff; /* guess */
+ EA = 0xffff; /* guess */
}
/* 48 40: 0100 1000 0100 0000 */
@@ -8614,37 +8614,37 @@ static void SKN_bit(upd7810_state *cpustate)
switch( imm & 0x1f )
{
- case 0x10: /* PA */
+ case 0x10: /* PA */
val = RP( cpustate, UPD7810_PORTA );
break;
- case 0x11: /* PB */
+ case 0x11: /* PB */
val = RP( cpustate, UPD7810_PORTB );
break;
- case 0x12: /* PC */
+ case 0x12: /* PC */
val = RP( cpustate, UPD7810_PORTC );
break;
- case 0x13: /* PD */
+ case 0x13: /* PD */
val = RP( cpustate, UPD7810_PORTD );
break;
- case 0x15: /* PF */
+ case 0x15: /* PF */
val = RP( cpustate, UPD7810_PORTF );
break;
- case 0x16: /* MKH */
+ case 0x16: /* MKH */
val = MKH;
break;
- case 0x17: /* MKL */
+ case 0x17: /* MKL */
val = MKL;
break;
- case 0x19: /* SMH */
+ case 0x19: /* SMH */
val = SMH;
break;
- case 0x1b: /* EOM */
+ case 0x1b: /* EOM */
val = EOM;
break;
- case 0x1d: /* TMM */
+ case 0x1d: /* TMM */
val = TMM;
break;
- case 0x1e: /* PT */
+ case 0x1e: /* PT */
val = RP( cpustate, UPD7807_PORTT );
break;
default:
@@ -8668,34 +8668,34 @@ static void SETB(upd7810_state *cpustate)
switch( imm & 0x1f )
{
- case 0x10: /* PA */
+ case 0x10: /* PA */
WP( cpustate, UPD7810_PORTA, RP( cpustate, UPD7810_PORTA ) | (1 << bit));
break;
- case 0x11: /* PB */
+ case 0x11: /* PB */
WP( cpustate, UPD7810_PORTB, RP( cpustate, UPD7810_PORTB ) | (1 << bit));
break;
- case 0x12: /* PC */
+ case 0x12: /* PC */
WP( cpustate, UPD7810_PORTC, RP( cpustate, UPD7810_PORTC ) | (1 << bit));
break;
- case 0x13: /* PD */
+ case 0x13: /* PD */
WP( cpustate, UPD7810_PORTD, RP( cpustate, UPD7810_PORTD ) | (1 << bit));
break;
- case 0x15: /* PF */
+ case 0x15: /* PF */
WP( cpustate, UPD7810_PORTF, RP( cpustate, UPD7810_PORTF ) | (1 << bit));
break;
- case 0x16: /* MKH */
+ case 0x16: /* MKH */
MKH |= (1 << bit);
break;
- case 0x17: /* MKL */
+ case 0x17: /* MKL */
MKL |= (1 << bit);
break;
- case 0x19: /* SMH */
+ case 0x19: /* SMH */
SMH |= (1 << bit);
break;
- case 0x1b: /* EOM */
+ case 0x1b: /* EOM */
EOM |= (1 << bit);
break;
- case 0x1d: /* TMM */
+ case 0x1d: /* TMM */
TMM |= (1 << bit);
break;
// case 0x1e: /* PT */
@@ -8718,34 +8718,34 @@ static void CLR(upd7810_state *cpustate)
switch( imm & 0x1f )
{
- case 0x10: /* PA */
+ case 0x10: /* PA */
WP( cpustate, UPD7810_PORTA, RP( cpustate, UPD7810_PORTA ) & ~(1 << bit));
break;
- case 0x11: /* PB */
+ case 0x11: /* PB */
WP( cpustate, UPD7810_PORTB, RP( cpustate, UPD7810_PORTB ) & ~(1 << bit));
break;
- case 0x12: /* PC */
+ case 0x12: /* PC */
WP( cpustate, UPD7810_PORTC, RP( cpustate, UPD7810_PORTC ) & ~(1 << bit));
break;
- case 0x13: /* PD */
+ case 0x13: /* PD */
WP( cpustate, UPD7810_PORTD, RP( cpustate, UPD7810_PORTD ) & ~(1 << bit));
break;
- case 0x15: /* PF */
+ case 0x15: /* PF */
WP( cpustate, UPD7810_PORTF, RP( cpustate, UPD7810_PORTF ) & ~(1 << bit));
break;
- case 0x16: /* MKH */
+ case 0x16: /* MKH */
MKH &= ~(1 << bit);
break;
- case 0x17: /* MKL */
+ case 0x17: /* MKL */
MKL &= ~(1 << bit);
break;
- case 0x19: /* SMH */
+ case 0x19: /* SMH */
SMH &= ~(1 << bit);
break;
- case 0x1b: /* EOM */
+ case 0x1b: /* EOM */
EOM &= ~(1 << bit);
break;
- case 0x1d: /* TMM */
+ case 0x1d: /* TMM */
TMM &= ~(1 << bit);
break;
// case 0x1e: /* PT */
@@ -8767,37 +8767,37 @@ static void SK_bit(upd7810_state *cpustate)
switch( imm & 0x1f )
{
- case 0x10: /* PA */
+ case 0x10: /* PA */
val = RP( cpustate, UPD7810_PORTA );
break;
- case 0x11: /* PB */
+ case 0x11: /* PB */
val = RP( cpustate, UPD7810_PORTB );
break;
- case 0x12: /* PC */
+ case 0x12: /* PC */
val = RP( cpustate, UPD7810_PORTC );
break;
- case 0x13: /* PD */
+ case 0x13: /* PD */
val = RP( cpustate, UPD7810_PORTD );
break;
- case 0x15: /* PF */
+ case 0x15: /* PF */
val = RP( cpustate, UPD7810_PORTF );
break;
- case 0x16: /* MKH */
+ case 0x16: /* MKH */
val = MKH;
break;
- case 0x17: /* MKL */
+ case 0x17: /* MKL */
val = MKL;
break;
- case 0x19: /* SMH */
+ case 0x19: /* SMH */
val = SMH;
break;
- case 0x1b: /* EOM */
+ case 0x1b: /* EOM */
val = EOM;
break;
- case 0x1d: /* TMM */
+ case 0x1d: /* TMM */
val = TMM;
break;
- case 0x1e: /* PT */
+ case 0x1e: /* PT */
val = RP( cpustate, UPD7807_PORTT );
break;
default:
@@ -8828,7 +8828,7 @@ static void DAA(upd7810_state *cpustate)
{
if (l < 10)
{
- if (!(h < 10 && 0 == (PSW & CY)))
+ if (!(h < 10 && 0 == (PSW & CY)))
adj = 0x60;
}
else
@@ -8912,9 +8912,9 @@ static void MVI_V_xx(upd7810_state *cpustate)
/* 69: 0110 1001 xxxx xxxx */
static void MVI_A_xx(upd7810_state *cpustate)
{
- if (PSW & L1) { /* overlay active? */
+ if (PSW & L1) { /* overlay active? */
PC++;
- return; /* NOP */
+ return; /* NOP */
}
RDOPARG( A );
PSW |= L1;
@@ -8953,9 +8953,9 @@ static void MVI_H_xx(upd7810_state *cpustate)
/* 6f: 0110 1111 xxxx xxxx */
static void MVI_L_xx(upd7810_state *cpustate)
{
- if (PSW & L0) { /* overlay active? */
+ if (PSW & L0) { /* overlay active? */
PC++;
- return; /* NOP */
+ return; /* NOP */
}
RDOPARG( L );
PSW |= L0;
@@ -9049,8 +9049,8 @@ static void CALT(upd7810_state *cpustate)
switch (cpustate->config.type) {
case TYPE_7810_GAMEMASTER:
- logerror ("!!!!!!!%.4x calt %.2x game master table position not known\n",PPC, OP);
- break;
+ logerror ("!!!!!!!%.4x calt %.2x game master table position not known\n",PPC, OP);
+ break;
default:
w.w.l = 0x80 + 2 * (OP & 0x1f);
}
@@ -9061,8 +9061,8 @@ static void CALT(upd7810_state *cpustate)
SP--;
WM( SPD, PCL );
- PCL=RM(w.w.l);
- PCH=RM(w.w.l+1);
+ PCL=RM(w.w.l);
+ PCH=RM(w.w.l+1);
}
}
@@ -9268,7 +9268,7 @@ static void RETS(upd7810_state *cpustate)
SP++;
PCH = RM( SPD );
SP++;
- PSW|=SK; /* skip one instruction */
+ PSW|=SK; /* skip one instruction */
}
/* ba: 1011 1010 */
@@ -9487,4 +9487,3 @@ static void MOV_MC_A_7801(upd7810_state *cpustate)
/* PC7 Input HOLD Input */
MC = 0x84 | ( ( A & 0x02 ) ? 0x02 : 0x00 ) | ( ( A & 0x01 ) ? 0x01 : 0x00 );
}
-
diff --git a/src/emu/cpu/upd7810/7810tbl.c b/src/emu/cpu/upd7810/7810tbl.c
index fd3cc4f0af3..9f3377dacab 100644
--- a/src/emu/cpu/upd7810/7810tbl.c
+++ b/src/emu/cpu/upd7810/7810tbl.c
@@ -1049,2489 +1049,2489 @@ static void MOV_MC_A_7801(upd7810_state *cpustate);
static const struct opcode_s op48[256] =
{
- {illegal, 2, 8, 8,L0|L1}, /* 00: 0100 1000 0000 0000 */
- {SLRC_A, 2, 8, 8,L0|L1}, /* 01: 0100 1000 0000 0001 */
- {SLRC_B, 2, 8, 8,L0|L1}, /* 02: 0100 1000 0000 0010 */
- {SLRC_C, 2, 8, 8,L0|L1}, /* 03: 0100 1000 0000 0011 */
- {illegal, 2, 8, 8,L0|L1}, /* 04: 0100 1000 0000 0100 */
- {SLLC_A, 2, 8, 8,L0|L1}, /* 05: 0100 1000 0000 0101 */
- {SLLC_B, 2, 8, 8,L0|L1}, /* 06: 0100 1000 0000 0110 */
- {SLLC_C, 2, 8, 8,L0|L1}, /* 07: 0100 1000 0000 0111 */
- {SK_NV, 2, 8, 8,L0|L1}, /* 08: 0100 1000 0000 1000 */
- {illegal, 2, 8, 8,L0|L1}, /* 09: 0100 1000 0000 1001 */
- {SK_CY, 2, 8, 8,L0|L1}, /* 0a: 0100 1000 0000 1010 */
- {SK_HC, 2, 8, 8,L0|L1}, /* 0b: 0100 1000 0000 1011 */
- {SK_Z, 2, 8, 8,L0|L1}, /* 0c: 0100 1000 0000 1100 */
- {illegal, 2, 8, 8,L0|L1}, /* 0d: 0100 1000 0000 1101 */
- {illegal, 2, 8, 8,L0|L1}, /* 0e: 0100 1000 0000 1110 */
- {illegal, 2, 8, 8,L0|L1}, /* 0f: 0100 1000 0000 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1000 0001 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1000 0001 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1000 0001 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1000 0001 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1000 0001 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1000 0001 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1000 0001 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1000 0001 0111 */
- {SKN_NV, 2, 8, 8,L0|L1}, /* 18: 0100 1000 0001 1000 */
- {illegal, 2, 8, 8,L0|L1}, /* 19: 0100 1000 0001 1001 */
- {SKN_CY, 2, 8, 8,L0|L1}, /* 1a: 0100 1000 0001 1010 */
- {SKN_HC, 2, 8, 8,L0|L1}, /* 1b: 0100 1000 0001 1011 */
- {SKN_Z, 2, 8, 8,L0|L1}, /* 1c: 0100 1000 0001 1100 */
- {illegal, 2, 8, 8,L0|L1}, /* 1d: 0100 1000 0001 1101 */
- {illegal, 2, 8, 8,L0|L1}, /* 1e: 0100 1000 0001 1110 */
- {illegal, 2, 8, 8,L0|L1}, /* 1f: 0100 1000 0001 1111 */
-
- {illegal, 2, 8, 8,L0|L1}, /* 20: 0100 1000 0010 0000 */
- {SLR_A, 2, 8, 8,L0|L1}, /* 21: 0100 1000 0010 0001 */
- {SLR_B, 2, 8, 8,L0|L1}, /* 22: 0100 1000 0010 0010 */
- {SLR_C, 2, 8, 8,L0|L1}, /* 23: 0100 1000 0010 0011 */
- {illegal, 2, 8, 8,L0|L1}, /* 24: 0100 1000 0010 0100 */
- {SLL_A, 2, 8, 8,L0|L1}, /* 25: 0100 1000 0010 0101 */
- {SLL_B, 2, 8, 8,L0|L1}, /* 26: 0100 1000 0010 0110 */
- {SLL_C, 2, 8, 8,L0|L1}, /* 27: 0100 1000 0010 0111 */
- {JEA, 2, 8, 8,L0|L1}, /* 28: 0100 1000 0010 1000 */
- {CALB, 2,17,17,L0|L1}, /* 29: 0100 1000 0010 1001 */
- {CLC, 2, 8, 8,L0|L1}, /* 2a: 0100 1000 0010 1010 */
- {STC, 2, 8, 8,L0|L1}, /* 2b: 0100 1000 0010 1011 */
- {illegal, 2,32,32,L0|L1}, /* 2c: 0100 1000 0010 1100 */
- {MUL_A, 2,32,32,L0|L1}, /* 2d: 0100 1000 0010 1101 */
- {MUL_B, 2,32,32,L0|L1}, /* 2e: 0100 1000 0010 1110 */
- {MUL_C, 2,32,32,L0|L1}, /* 2f: 0100 1000 0010 1111 */
-
- {illegal, 2, 8, 8,L0|L1}, /* 30: 0100 1000 0011 0000 */
- {RLR_A, 2, 8, 8,L0|L1}, /* 31: 0100 1000 0011 0001 */
- {RLR_B, 2, 8, 8,L0|L1}, /* 32: 0100 1000 0011 0010 */
- {RLR_C, 2, 8, 8,L0|L1}, /* 33: 0100 1000 0011 0011 */
- {illegal, 2, 8, 8,L0|L1}, /* 34: 0100 1000 0011 0100 */
- {RLL_A, 2, 8, 8,L0|L1}, /* 35: 0100 1000 0011 0101 */
- {RLL_B, 2, 8, 8,L0|L1}, /* 36: 0100 1000 0011 0110 */
- {RLL_C, 2, 8, 8,L0|L1}, /* 37: 0100 1000 0011 0111 */
- {RLD, 2,17,17,L0|L1}, /* 38: 0100 1000 0011 1000 */
- {RRD, 2,17,17,L0|L1}, /* 39: 0100 1000 0011 1001 */
- {NEGA, 2, 8, 8,L0|L1}, /* 3a: 0100 1000 0011 1010 */
- {HALT, 2,12,12,L0|L1}, /* 3b: 0100 1000 0011 1011 */
- {illegal, 2, 8, 8,L0|L1}, /* 3c: 0100 1000 0011 1100 */
- {DIV_A, 2,59,59,L0|L1}, /* 3d: 0100 1000 0011 1101 */
- {DIV_B, 2,59,59,L0|L1}, /* 3e: 0100 1000 0011 1110 */
- {DIV_C, 2,59,59,L0|L1}, /* 3f: 0100 1000 0011 1111 */
-
- {SKIT_NMI, 2, 8, 8,L0|L1}, /* 40: 0100 1000 0100 0000 */
- {SKIT_FT0, 2, 8, 8,L0|L1}, /* 41: 0100 1000 0100 0001 */
- {SKIT_FT1, 2, 8, 8,L0|L1}, /* 42: 0100 1000 0100 0010 */
- {SKIT_F1, 2, 8, 8,L0|L1}, /* 43: 0100 1000 0100 0011 */
- {SKIT_F2, 2, 8, 8,L0|L1}, /* 44: 0100 1000 0100 0100 */
- {SKIT_FE0, 2, 8, 8,L0|L1}, /* 45: 0100 1000 0100 0101 */
- {SKIT_FE1, 2, 8, 8,L0|L1}, /* 46: 0100 1000 0100 0110 */
- {SKIT_FEIN, 2, 8, 8,L0|L1}, /* 47: 0100 1000 0100 0111 */
- {SKIT_FAD, 2, 8, 8,L0|L1}, /* 48: 0100 1000 0100 1000 */
- {SKIT_FSR, 2, 8, 8,L0|L1}, /* 49: 0100 1000 0100 1001 */
- {SKIT_FST, 2, 8, 8,L0|L1}, /* 4a: 0100 1000 0100 1010 */
- {SKIT_ER, 2, 8, 8,L0|L1}, /* 4b: 0100 1000 0100 1011 */
- {SKIT_OV, 2, 8, 8,L0|L1}, /* 4c: 0100 1000 0100 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1000 0100 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1000 0100 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1000 0100 1111 */
-
- {SKIT_AN4, 2, 8, 8,L0|L1}, /* 50: 0100 1000 0101 0000 */
- {SKIT_AN5, 2, 8, 8,L0|L1}, /* 51: 0100 1000 0101 0001 */
- {SKIT_AN6, 2, 8, 8,L0|L1}, /* 52: 0100 1000 0101 0010 */
- {SKIT_AN7, 2, 8, 8,L0|L1}, /* 53: 0100 1000 0101 0011 */
- {SKIT_SB, 2, 8, 8,L0|L1}, /* 54: 0100 1000 0101 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1000 0101 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1000 0101 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1000 0101 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1000 0101 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1000 0101 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1000 0101 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1000 0101 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1000 0101 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1000 0101 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1000 0101 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1000 0101 1111 */
-
- {SKNIT_NMI, 2, 8, 8,L0|L1}, /* 60: 0100 1000 0110 0000 */
- {SKNIT_FT0, 2, 8, 8,L0|L1}, /* 61: 0100 1000 0110 0001 */
- {SKNIT_FT1, 2, 8, 8,L0|L1}, /* 62: 0100 1000 0110 0010 */
- {SKNIT_F1, 2, 8, 8,L0|L1}, /* 63: 0100 1000 0110 0011 */
- {SKNIT_F2, 2, 8, 8,L0|L1}, /* 64: 0100 1000 0110 0100 */
- {SKNIT_FE0, 2, 8, 8,L0|L1}, /* 65: 0100 1000 0110 0101 */
- {SKNIT_FE1, 2, 8, 8,L0|L1}, /* 66: 0100 1000 0110 0110 */
- {SKNIT_FEIN, 2, 8, 8,L0|L1}, /* 67: 0100 1000 0110 0111 */
- {SKNIT_FAD, 2, 8, 8,L0|L1}, /* 68: 0100 1000 0110 1000 */
- {SKNIT_FSR, 2, 8, 8,L0|L1}, /* 69: 0100 1000 0110 1001 */
- {SKNIT_FST, 2, 8, 8,L0|L1}, /* 6a: 0100 1000 0110 1010 */
- {SKNIT_ER, 2, 8, 8,L0|L1}, /* 6b: 0100 1000 0110 1011 */
- {SKNIT_OV, 2, 8, 8,L0|L1}, /* 6c: 0100 1000 0110 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1000 0110 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1000 0110 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1000 0110 1111 */
-
- {SKNIT_AN4, 2, 8, 8,L0|L1}, /* 70: 0100 1000 0111 0000 */
- {SKNIT_AN5, 2, 8, 8,L0|L1}, /* 71: 0100 1000 0111 0001 */
- {SKNIT_AN6, 2, 8, 8,L0|L1}, /* 72: 0100 1000 0111 0010 */
- {SKNIT_AN7, 2, 8, 8,L0|L1}, /* 73: 0100 1000 0111 0011 */
- {SKNIT_SB, 2, 8, 8,L0|L1}, /* 74: 0100 1000 0111 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1000 0111 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1000 0111 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1000 0111 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1000 0111 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1000 0111 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1000 0111 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1000 0111 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1000 0111 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1000 0111 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1000 0111 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1000 0111 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1000 1000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1000 1000 0001 */
- {LDEAX_D, 2,14,11,L0|L1}, /* 82: 0100 1000 1000 0010 */
- {LDEAX_H, 2,14,11,L0|L1}, /* 83: 0100 1000 1000 0011 */
- {LDEAX_Dp, 2,14,11,L0|L1}, /* 84: 0100 1000 1000 0100 */
- {LDEAX_Hp, 2,14,11,L0|L1}, /* 85: 0100 1000 1000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1000 1000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1000 1000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1000 1000 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1000 1000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1000 1000 1010 */
- {LDEAX_D_xx, 3,20,20,L0|L1}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */
- {LDEAX_H_A, 2,20,20,L0|L1}, /* 8c: 0100 1000 1000 1100 */
- {LDEAX_H_B, 2,20,20,L0|L1}, /* 8d: 0100 1000 1000 1101 */
- {LDEAX_H_EA, 2,20,20,L0|L1}, /* 8e: 0100 1000 1000 1110 */
- {LDEAX_H_xx, 3,20,20,L0|L1}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1000 1000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1000 1000 0001 */
- {STEAX_D, 2,14,11,L0|L1}, /* 92: 0100 1000 1000 0010 */
- {STEAX_H, 2,14,11,L0|L1}, /* 93: 0100 1000 1000 0011 */
- {STEAX_Dp, 2,14,11,L0|L1}, /* 94: 0100 1000 1000 0100 */
- {STEAX_Hp, 2,14,11,L0|L1}, /* 95: 0100 1000 1000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1000 1000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1000 1000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1000 1000 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1000 1000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1000 1000 1010 */
- {STEAX_D_xx, 3,20,20,L0|L1}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */
- {STEAX_H_A, 2,20,20,L0|L1}, /* 9c: 0100 1000 1000 1100 */
- {STEAX_H_B, 2,20,20,L0|L1}, /* 9d: 0100 1000 1000 1101 */
- {STEAX_H_EA, 2,20,20,L0|L1}, /* 9e: 0100 1000 1000 1110 */
- {STEAX_H_xx, 3,20,20,L0|L1}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */
-
- {DSLR_EA, 2, 8, 8,L0|L1}, /* a0: 0100 1000 1010 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1000 1010 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1000 1010 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1000 1010 0011 */
- {DSLL_EA, 2, 8, 8,L0|L1}, /* a4: 0100 1000 1010 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1000 1010 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1000 1010 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1000 1010 0111 */
- {TABLE, 2,17,17,L0|L1}, /* a8: 0100 1000 1010 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1000 1010 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1000 1010 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1000 1010 1011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 00: 0100 1000 0000 0000 */
+ {SLRC_A, 2, 8, 8,L0|L1}, /* 01: 0100 1000 0000 0001 */
+ {SLRC_B, 2, 8, 8,L0|L1}, /* 02: 0100 1000 0000 0010 */
+ {SLRC_C, 2, 8, 8,L0|L1}, /* 03: 0100 1000 0000 0011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 04: 0100 1000 0000 0100 */
+ {SLLC_A, 2, 8, 8,L0|L1}, /* 05: 0100 1000 0000 0101 */
+ {SLLC_B, 2, 8, 8,L0|L1}, /* 06: 0100 1000 0000 0110 */
+ {SLLC_C, 2, 8, 8,L0|L1}, /* 07: 0100 1000 0000 0111 */
+ {SK_NV, 2, 8, 8,L0|L1}, /* 08: 0100 1000 0000 1000 */
+ {illegal, 2, 8, 8,L0|L1}, /* 09: 0100 1000 0000 1001 */
+ {SK_CY, 2, 8, 8,L0|L1}, /* 0a: 0100 1000 0000 1010 */
+ {SK_HC, 2, 8, 8,L0|L1}, /* 0b: 0100 1000 0000 1011 */
+ {SK_Z, 2, 8, 8,L0|L1}, /* 0c: 0100 1000 0000 1100 */
+ {illegal, 2, 8, 8,L0|L1}, /* 0d: 0100 1000 0000 1101 */
+ {illegal, 2, 8, 8,L0|L1}, /* 0e: 0100 1000 0000 1110 */
+ {illegal, 2, 8, 8,L0|L1}, /* 0f: 0100 1000 0000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1000 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1000 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1000 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1000 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1000 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1000 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1000 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1000 0001 0111 */
+ {SKN_NV, 2, 8, 8,L0|L1}, /* 18: 0100 1000 0001 1000 */
+ {illegal, 2, 8, 8,L0|L1}, /* 19: 0100 1000 0001 1001 */
+ {SKN_CY, 2, 8, 8,L0|L1}, /* 1a: 0100 1000 0001 1010 */
+ {SKN_HC, 2, 8, 8,L0|L1}, /* 1b: 0100 1000 0001 1011 */
+ {SKN_Z, 2, 8, 8,L0|L1}, /* 1c: 0100 1000 0001 1100 */
+ {illegal, 2, 8, 8,L0|L1}, /* 1d: 0100 1000 0001 1101 */
+ {illegal, 2, 8, 8,L0|L1}, /* 1e: 0100 1000 0001 1110 */
+ {illegal, 2, 8, 8,L0|L1}, /* 1f: 0100 1000 0001 1111 */
+
+ {illegal, 2, 8, 8,L0|L1}, /* 20: 0100 1000 0010 0000 */
+ {SLR_A, 2, 8, 8,L0|L1}, /* 21: 0100 1000 0010 0001 */
+ {SLR_B, 2, 8, 8,L0|L1}, /* 22: 0100 1000 0010 0010 */
+ {SLR_C, 2, 8, 8,L0|L1}, /* 23: 0100 1000 0010 0011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 24: 0100 1000 0010 0100 */
+ {SLL_A, 2, 8, 8,L0|L1}, /* 25: 0100 1000 0010 0101 */
+ {SLL_B, 2, 8, 8,L0|L1}, /* 26: 0100 1000 0010 0110 */
+ {SLL_C, 2, 8, 8,L0|L1}, /* 27: 0100 1000 0010 0111 */
+ {JEA, 2, 8, 8,L0|L1}, /* 28: 0100 1000 0010 1000 */
+ {CALB, 2,17,17,L0|L1}, /* 29: 0100 1000 0010 1001 */
+ {CLC, 2, 8, 8,L0|L1}, /* 2a: 0100 1000 0010 1010 */
+ {STC, 2, 8, 8,L0|L1}, /* 2b: 0100 1000 0010 1011 */
+ {illegal, 2,32,32,L0|L1}, /* 2c: 0100 1000 0010 1100 */
+ {MUL_A, 2,32,32,L0|L1}, /* 2d: 0100 1000 0010 1101 */
+ {MUL_B, 2,32,32,L0|L1}, /* 2e: 0100 1000 0010 1110 */
+ {MUL_C, 2,32,32,L0|L1}, /* 2f: 0100 1000 0010 1111 */
+
+ {illegal, 2, 8, 8,L0|L1}, /* 30: 0100 1000 0011 0000 */
+ {RLR_A, 2, 8, 8,L0|L1}, /* 31: 0100 1000 0011 0001 */
+ {RLR_B, 2, 8, 8,L0|L1}, /* 32: 0100 1000 0011 0010 */
+ {RLR_C, 2, 8, 8,L0|L1}, /* 33: 0100 1000 0011 0011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 34: 0100 1000 0011 0100 */
+ {RLL_A, 2, 8, 8,L0|L1}, /* 35: 0100 1000 0011 0101 */
+ {RLL_B, 2, 8, 8,L0|L1}, /* 36: 0100 1000 0011 0110 */
+ {RLL_C, 2, 8, 8,L0|L1}, /* 37: 0100 1000 0011 0111 */
+ {RLD, 2,17,17,L0|L1}, /* 38: 0100 1000 0011 1000 */
+ {RRD, 2,17,17,L0|L1}, /* 39: 0100 1000 0011 1001 */
+ {NEGA, 2, 8, 8,L0|L1}, /* 3a: 0100 1000 0011 1010 */
+ {HALT, 2,12,12,L0|L1}, /* 3b: 0100 1000 0011 1011 */
+ {illegal, 2, 8, 8,L0|L1}, /* 3c: 0100 1000 0011 1100 */
+ {DIV_A, 2,59,59,L0|L1}, /* 3d: 0100 1000 0011 1101 */
+ {DIV_B, 2,59,59,L0|L1}, /* 3e: 0100 1000 0011 1110 */
+ {DIV_C, 2,59,59,L0|L1}, /* 3f: 0100 1000 0011 1111 */
+
+ {SKIT_NMI, 2, 8, 8,L0|L1}, /* 40: 0100 1000 0100 0000 */
+ {SKIT_FT0, 2, 8, 8,L0|L1}, /* 41: 0100 1000 0100 0001 */
+ {SKIT_FT1, 2, 8, 8,L0|L1}, /* 42: 0100 1000 0100 0010 */
+ {SKIT_F1, 2, 8, 8,L0|L1}, /* 43: 0100 1000 0100 0011 */
+ {SKIT_F2, 2, 8, 8,L0|L1}, /* 44: 0100 1000 0100 0100 */
+ {SKIT_FE0, 2, 8, 8,L0|L1}, /* 45: 0100 1000 0100 0101 */
+ {SKIT_FE1, 2, 8, 8,L0|L1}, /* 46: 0100 1000 0100 0110 */
+ {SKIT_FEIN, 2, 8, 8,L0|L1}, /* 47: 0100 1000 0100 0111 */
+ {SKIT_FAD, 2, 8, 8,L0|L1}, /* 48: 0100 1000 0100 1000 */
+ {SKIT_FSR, 2, 8, 8,L0|L1}, /* 49: 0100 1000 0100 1001 */
+ {SKIT_FST, 2, 8, 8,L0|L1}, /* 4a: 0100 1000 0100 1010 */
+ {SKIT_ER, 2, 8, 8,L0|L1}, /* 4b: 0100 1000 0100 1011 */
+ {SKIT_OV, 2, 8, 8,L0|L1}, /* 4c: 0100 1000 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1000 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1000 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1000 0100 1111 */
+
+ {SKIT_AN4, 2, 8, 8,L0|L1}, /* 50: 0100 1000 0101 0000 */
+ {SKIT_AN5, 2, 8, 8,L0|L1}, /* 51: 0100 1000 0101 0001 */
+ {SKIT_AN6, 2, 8, 8,L0|L1}, /* 52: 0100 1000 0101 0010 */
+ {SKIT_AN7, 2, 8, 8,L0|L1}, /* 53: 0100 1000 0101 0011 */
+ {SKIT_SB, 2, 8, 8,L0|L1}, /* 54: 0100 1000 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1000 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1000 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1000 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1000 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1000 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1000 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1000 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1000 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1000 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1000 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1000 0101 1111 */
+
+ {SKNIT_NMI, 2, 8, 8,L0|L1}, /* 60: 0100 1000 0110 0000 */
+ {SKNIT_FT0, 2, 8, 8,L0|L1}, /* 61: 0100 1000 0110 0001 */
+ {SKNIT_FT1, 2, 8, 8,L0|L1}, /* 62: 0100 1000 0110 0010 */
+ {SKNIT_F1, 2, 8, 8,L0|L1}, /* 63: 0100 1000 0110 0011 */
+ {SKNIT_F2, 2, 8, 8,L0|L1}, /* 64: 0100 1000 0110 0100 */
+ {SKNIT_FE0, 2, 8, 8,L0|L1}, /* 65: 0100 1000 0110 0101 */
+ {SKNIT_FE1, 2, 8, 8,L0|L1}, /* 66: 0100 1000 0110 0110 */
+ {SKNIT_FEIN, 2, 8, 8,L0|L1}, /* 67: 0100 1000 0110 0111 */
+ {SKNIT_FAD, 2, 8, 8,L0|L1}, /* 68: 0100 1000 0110 1000 */
+ {SKNIT_FSR, 2, 8, 8,L0|L1}, /* 69: 0100 1000 0110 1001 */
+ {SKNIT_FST, 2, 8, 8,L0|L1}, /* 6a: 0100 1000 0110 1010 */
+ {SKNIT_ER, 2, 8, 8,L0|L1}, /* 6b: 0100 1000 0110 1011 */
+ {SKNIT_OV, 2, 8, 8,L0|L1}, /* 6c: 0100 1000 0110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1000 0110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1000 0110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1000 0110 1111 */
+
+ {SKNIT_AN4, 2, 8, 8,L0|L1}, /* 70: 0100 1000 0111 0000 */
+ {SKNIT_AN5, 2, 8, 8,L0|L1}, /* 71: 0100 1000 0111 0001 */
+ {SKNIT_AN6, 2, 8, 8,L0|L1}, /* 72: 0100 1000 0111 0010 */
+ {SKNIT_AN7, 2, 8, 8,L0|L1}, /* 73: 0100 1000 0111 0011 */
+ {SKNIT_SB, 2, 8, 8,L0|L1}, /* 74: 0100 1000 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1000 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1000 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1000 0111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1000 0111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1000 0111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1000 0111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1000 0111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1000 0111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1000 0111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1000 0111 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1000 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1000 1000 0001 */
+ {LDEAX_D, 2,14,11,L0|L1}, /* 82: 0100 1000 1000 0010 */
+ {LDEAX_H, 2,14,11,L0|L1}, /* 83: 0100 1000 1000 0011 */
+ {LDEAX_Dp, 2,14,11,L0|L1}, /* 84: 0100 1000 1000 0100 */
+ {LDEAX_Hp, 2,14,11,L0|L1}, /* 85: 0100 1000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1000 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1000 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1000 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1000 1000 1010 */
+ {LDEAX_D_xx, 3,20,20,L0|L1}, /* 8b: 0100 1000 1000 1011 xxxx xxxx */
+ {LDEAX_H_A, 2,20,20,L0|L1}, /* 8c: 0100 1000 1000 1100 */
+ {LDEAX_H_B, 2,20,20,L0|L1}, /* 8d: 0100 1000 1000 1101 */
+ {LDEAX_H_EA, 2,20,20,L0|L1}, /* 8e: 0100 1000 1000 1110 */
+ {LDEAX_H_xx, 3,20,20,L0|L1}, /* 8f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1000 1000 0001 */
+ {STEAX_D, 2,14,11,L0|L1}, /* 92: 0100 1000 1000 0010 */
+ {STEAX_H, 2,14,11,L0|L1}, /* 93: 0100 1000 1000 0011 */
+ {STEAX_Dp, 2,14,11,L0|L1}, /* 94: 0100 1000 1000 0100 */
+ {STEAX_Hp, 2,14,11,L0|L1}, /* 95: 0100 1000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1000 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1000 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1000 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1000 1000 1010 */
+ {STEAX_D_xx, 3,20,20,L0|L1}, /* 9b: 0100 1000 1000 1011 xxxx xxxx */
+ {STEAX_H_A, 2,20,20,L0|L1}, /* 9c: 0100 1000 1000 1100 */
+ {STEAX_H_B, 2,20,20,L0|L1}, /* 9d: 0100 1000 1000 1101 */
+ {STEAX_H_EA, 2,20,20,L0|L1}, /* 9e: 0100 1000 1000 1110 */
+ {STEAX_H_xx, 3,20,20,L0|L1}, /* 9f: 0100 1000 1000 1111 xxxx xxxx */
+
+ {DSLR_EA, 2, 8, 8,L0|L1}, /* a0: 0100 1000 1010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1000 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1000 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1000 1010 0011 */
+ {DSLL_EA, 2, 8, 8,L0|L1}, /* a4: 0100 1000 1010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1000 1010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1000 1010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1000 1010 0111 */
+ {TABLE, 2,17,17,L0|L1}, /* a8: 0100 1000 1010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1000 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1000 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1000 1010 1011 */
// {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1000 1010 1100 */
// {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1000 1010 1101 */
// {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1000 1010 1110 */
// {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1000 1010 1111 */
- {EXA, 2, 8, 8,L0|L1}, /* ac: 0100 1000 1010 1100 */ /* 7807 */
- {EXR, 2, 8, 8,L0|L1}, /* ad: 0100 1000 1010 1101 */ /* 7807 */
- {EXH, 2, 8, 8,L0|L1}, /* ae: 0100 1000 1010 1110 */ /* 7807 */
- {EXX, 2, 8, 8,L0|L1}, /* af: 0100 1000 1010 1111 */ /* 7807 */
- {DRLR_EA, 2, 8, 8,L0|L1}, /* b0: 0100 1000 1011 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1000 1011 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1000 1011 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1000 1011 0011 */
- {DRLL_EA, 2, 8, 8,L0|L1}, /* b4: 0100 1000 1011 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1000 1011 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1000 1011 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1000 1011 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1000 1011 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1000 1011 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1000 1011 1010 */
- {STOP, 2,12,12,L0|L1}, /* bb: 0100 1000 1011 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1000 1011 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1000 1011 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1000 1011 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1000 1011 1111 */
-
- {DMOV_EA_ECNT, 2,14,11,L0|L1}, /* c0: 0100 1000 1100 0000 */
- {DMOV_EA_ECPT, 2,14,11,L0|L1}, /* c1: 0100 1000 1100 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* c2: 0100 1000 1100 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* c3: 0100 1000 1100 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* c4: 0100 1000 1100 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* c5: 0100 1000 1100 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* c6: 0100 1000 1100 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* c7: 0100 1000 1100 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* c8: 0100 1000 1100 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* c9: 0100 1000 1100 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ca: 0100 1000 1100 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* cb: 0100 1000 1100 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* cc: 0100 1000 1100 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* cd: 0100 1000 1100 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* ce: 0100 1000 1100 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* cf: 0100 1000 1100 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* d0: 0100 1000 1101 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* d1: 0100 1000 1101 0001 */
- {DMOV_ETM0_EA, 2,14,11,L0|L1}, /* d2: 0100 1000 1101 0010 */
- {DMOV_ETM1_EA, 2,14,11,L0|L1}, /* d3: 0100 1000 1101 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* d4: 0100 1000 1101 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* d5: 0100 1000 1101 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* d6: 0100 1000 1101 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* d7: 0100 1000 1101 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* d8: 0100 1000 1101 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* d9: 0100 1000 1101 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* da: 0100 1000 1101 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* db: 0100 1000 1101 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* dc: 0100 1000 1101 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* dd: 0100 1000 1101 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* de: 0100 1000 1101 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* df: 0100 1000 1101 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* e0: 0100 1000 1110 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* e1: 0100 1000 1110 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* e2: 0100 1000 1110 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* e3: 0100 1000 1110 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* e4: 0100 1000 1110 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* e5: 0100 1000 1110 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* e6: 0100 1000 1110 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* e7: 0100 1000 1110 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* e8: 0100 1000 1110 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* e9: 0100 1000 1110 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ea: 0100 1000 1110 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* eb: 0100 1000 1110 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* ec: 0100 1000 1110 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* ed: 0100 1000 1110 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* ee: 0100 1000 1110 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* ef: 0100 1000 1110 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* f0: 0100 1000 1111 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* f1: 0100 1000 1111 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* f2: 0100 1000 1111 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* f3: 0100 1000 1111 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* f4: 0100 1000 1111 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* f5: 0100 1000 1111 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* f6: 0100 1000 1111 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* f7: 0100 1000 1111 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* f8: 0100 1000 1111 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* f9: 0100 1000 1111 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* fa: 0100 1000 1111 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* fb: 0100 1000 1111 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* fc: 0100 1000 1111 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* fd: 0100 1000 1111 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* fe: 0100 1000 1111 1110 */
- {illegal2, 2, 8, 8,L0|L1} /* ff: 0100 1000 1111 1111 */
+ {EXA, 2, 8, 8,L0|L1}, /* ac: 0100 1000 1010 1100 */ /* 7807 */
+ {EXR, 2, 8, 8,L0|L1}, /* ad: 0100 1000 1010 1101 */ /* 7807 */
+ {EXH, 2, 8, 8,L0|L1}, /* ae: 0100 1000 1010 1110 */ /* 7807 */
+ {EXX, 2, 8, 8,L0|L1}, /* af: 0100 1000 1010 1111 */ /* 7807 */
+ {DRLR_EA, 2, 8, 8,L0|L1}, /* b0: 0100 1000 1011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1000 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1000 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1000 1011 0011 */
+ {DRLL_EA, 2, 8, 8,L0|L1}, /* b4: 0100 1000 1011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1000 1011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1000 1011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1000 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1000 1011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1000 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1000 1011 1010 */
+ {STOP, 2,12,12,L0|L1}, /* bb: 0100 1000 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1000 1011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1000 1011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1000 1011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1000 1011 1111 */
+
+ {DMOV_EA_ECNT, 2,14,11,L0|L1}, /* c0: 0100 1000 1100 0000 */
+ {DMOV_EA_ECPT, 2,14,11,L0|L1}, /* c1: 0100 1000 1100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c2: 0100 1000 1100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c3: 0100 1000 1100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c4: 0100 1000 1100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c5: 0100 1000 1100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c6: 0100 1000 1100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c7: 0100 1000 1100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c8: 0100 1000 1100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c9: 0100 1000 1100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ca: 0100 1000 1100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cb: 0100 1000 1100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cc: 0100 1000 1100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cd: 0100 1000 1100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ce: 0100 1000 1100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cf: 0100 1000 1100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* d0: 0100 1000 1101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d1: 0100 1000 1101 0001 */
+ {DMOV_ETM0_EA, 2,14,11,L0|L1}, /* d2: 0100 1000 1101 0010 */
+ {DMOV_ETM1_EA, 2,14,11,L0|L1}, /* d3: 0100 1000 1101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d4: 0100 1000 1101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d5: 0100 1000 1101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d6: 0100 1000 1101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d7: 0100 1000 1101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d8: 0100 1000 1101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d9: 0100 1000 1101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* da: 0100 1000 1101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* db: 0100 1000 1101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* dc: 0100 1000 1101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* dd: 0100 1000 1101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* de: 0100 1000 1101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* df: 0100 1000 1101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* e0: 0100 1000 1110 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e1: 0100 1000 1110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e2: 0100 1000 1110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e3: 0100 1000 1110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e4: 0100 1000 1110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e5: 0100 1000 1110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e6: 0100 1000 1110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e7: 0100 1000 1110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e8: 0100 1000 1110 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e9: 0100 1000 1110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ea: 0100 1000 1110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* eb: 0100 1000 1110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ec: 0100 1000 1110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ed: 0100 1000 1110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ee: 0100 1000 1110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ef: 0100 1000 1110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* f0: 0100 1000 1111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f1: 0100 1000 1111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f2: 0100 1000 1111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f3: 0100 1000 1111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f4: 0100 1000 1111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f5: 0100 1000 1111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f6: 0100 1000 1111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f7: 0100 1000 1111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f8: 0100 1000 1111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f9: 0100 1000 1111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fa: 0100 1000 1111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fb: 0100 1000 1111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fc: 0100 1000 1111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fd: 0100 1000 1111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fe: 0100 1000 1111 1110 */
+ {illegal2, 2, 8, 8,L0|L1} /* ff: 0100 1000 1111 1111 */
};
/* prefix 4C */
static const struct opcode_s op4C[256] =
{
- {illegal2, 2, 8, 8,L0|L1}, /* 00: 0100 1100 0000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 01: 0100 1100 0000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 02: 0100 1100 0000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 03: 0100 1100 0000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 04: 0100 1100 0000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 05: 0100 1100 0000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 06: 0100 1100 0000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 07: 0100 1100 0000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 08: 0100 1100 0000 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 09: 0100 1100 0000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0100 1100 0000 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0100 1100 0000 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0100 1100 0000 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0100 1100 0000 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0e: 0100 1100 0000 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0f: 0100 1100 0000 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1100 0001 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1100 0001 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1100 0001 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1100 0001 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1100 0001 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1100 0001 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1100 0001 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1100 0001 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 18: 0100 1100 0001 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 19: 0100 1100 0001 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0100 1100 0001 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0100 1100 0001 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0100 1100 0001 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0100 1100 0001 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1e: 0100 1100 0001 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1f: 0100 1100 0001 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 20: 0100 1100 0010 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 21: 0100 1100 0010 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 22: 0100 1100 0010 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 23: 0100 1100 0010 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 24: 0100 1100 0010 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 25: 0100 1100 0010 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 26: 0100 1100 0010 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 27: 0100 1100 0010 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 28: 0100 1100 0010 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 29: 0100 1100 0010 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0100 1100 0010 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0100 1100 0010 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0100 1100 0010 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0100 1100 0010 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2e: 0100 1100 0010 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2f: 0100 1100 0010 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 30: 0100 1100 0011 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 31: 0100 1100 0011 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 32: 0100 1100 0011 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 33: 0100 1100 0011 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 34: 0100 1100 0011 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 35: 0100 1100 0011 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 36: 0100 1100 0011 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 37: 0100 1100 0011 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 38: 0100 1100 0011 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 39: 0100 1100 0011 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0100 1100 0011 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0100 1100 0011 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0100 1100 0011 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0100 1100 0011 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3e: 0100 1100 0011 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3f: 0100 1100 0011 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 40: 0100 1100 0100 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 41: 0100 1100 0100 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 42: 0100 1100 0100 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 43: 0100 1100 0100 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 44: 0100 1100 0100 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 45: 0100 1100 0100 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 46: 0100 1100 0100 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 47: 0100 1100 0100 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 48: 0100 1100 0100 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 49: 0100 1100 0100 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0100 1100 0100 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0100 1100 0100 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0100 1100 0100 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1100 0100 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1100 0100 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1100 0100 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 50: 0100 1100 0101 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 51: 0100 1100 0101 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 52: 0100 1100 0101 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 53: 0100 1100 0101 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 54: 0100 1100 0101 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1100 0101 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1100 0101 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1100 0101 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1100 0101 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1100 0101 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1100 0101 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1100 0101 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1100 0101 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1100 0101 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1100 0101 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1100 0101 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 60: 0100 1100 0110 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 61: 0100 1100 0110 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 62: 0100 1100 0110 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 63: 0100 1100 0110 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 64: 0100 1100 0110 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 65: 0100 1100 0110 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 66: 0100 1100 0110 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 67: 0100 1100 0110 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 68: 0100 1100 0110 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 69: 0100 1100 0110 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6a: 0100 1100 0110 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6b: 0100 1100 0110 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6c: 0100 1100 0110 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1100 0110 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1100 0110 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1100 0110 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 70: 0100 1100 0111 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 71: 0100 1100 0111 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 72: 0100 1100 0111 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 73: 0100 1100 0111 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 74: 0100 1100 0111 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1100 0111 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1100 0111 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1100 0111 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1100 0111 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1100 0111 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1100 0111 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1100 0111 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1100 0111 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1100 0111 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1100 0111 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1100 0111 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1100 1000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1100 1000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 82: 0100 1100 1000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 83: 0100 1100 1000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 84: 0100 1100 1000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 85: 0100 1100 1000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1100 1000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1100 1000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1100 1000 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1100 1000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1100 1000 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0100 1100 1000 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0100 1100 1000 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8d: 0100 1100 1000 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8e: 0100 1100 1000 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8f: 0100 1100 1000 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1100 1001 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1100 1001 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 92: 0100 1100 1001 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 93: 0100 1100 1001 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 94: 0100 1100 1001 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 95: 0100 1100 1001 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1100 1001 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1100 1001 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1100 1001 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1100 1001 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1100 1001 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0100 1100 1001 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0100 1100 1001 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9d: 0100 1100 1001 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9e: 0100 1100 1001 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9f: 0100 1100 1001 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* a0: 0100 1100 1010 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1100 1010 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1100 1010 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1100 1010 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* a4: 0100 1100 1010 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1100 1010 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1100 1010 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1100 1010 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* a8: 0100 1100 1010 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1100 1010 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1100 1010 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1100 1010 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1100 1010 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1100 1010 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1100 1010 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1100 1010 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* b0: 0100 1100 1011 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1100 1011 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1100 1011 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1100 1011 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* b4: 0100 1100 1011 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1100 1011 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1100 1011 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1100 1011 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1100 1011 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1100 1011 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1100 1011 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* bb: 0100 1100 1011 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1100 1011 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1100 1011 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1100 1011 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1100 1011 1111 */
-
- {MOV_A_PA, 2,10,10,L0|L1}, /* c0: 0100 1100 1100 0000 */
- {MOV_A_PB, 2,10,10,L0|L1}, /* c1: 0100 1100 1100 0001 */
- {MOV_A_PC, 2,10,10,L0|L1}, /* c2: 0100 1100 1100 0010 */
- {MOV_A_PD, 2,10,10,L0|L1}, /* c3: 0100 1100 1100 0011 */
- {illegal2, 2,10,10,L0|L1}, /* c4: 0100 1100 1100 0100 */
- {MOV_A_PF, 2,10,10,L0|L1}, /* c5: 0100 1100 1100 0101 */
- {MOV_A_MKH, 2,10,10,L0|L1}, /* c6: 0100 1100 1100 0110 */
- {MOV_A_MKL, 2,10,10,L0|L1}, /* c7: 0100 1100 1100 0111 */
- {MOV_A_ANM, 2,10,10,L0|L1}, /* c8: 0100 1100 1100 1000 */
- {MOV_A_SMH, 2,10,10,L0|L1}, /* c9: 0100 1100 1100 1001 */
- {illegal2, 2,10,10,L0|L1}, /* ca: 0100 1100 1100 1010 */
- {MOV_A_EOM, 2,10,10,L0|L1}, /* cb: 0100 1100 1100 1011 */
- {illegal2, 2,10,10,L0|L1}, /* cc: 0100 1100 1100 1100 */
- {MOV_A_TMM, 2,10,10,L0|L1}, /* cd: 0100 1100 1100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0100 1100 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0100 1100 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0100 1100 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0100 1100 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0100 1100 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0100 1100 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0100 1100 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0100 1100 0000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 08: 0100 1100 0000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 09: 0100 1100 0000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0100 1100 0000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0100 1100 0000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0100 1100 0000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0100 1100 0000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0e: 0100 1100 0000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0f: 0100 1100 0000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1100 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1100 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1100 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1100 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1100 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1100 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1100 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1100 0001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 18: 0100 1100 0001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 19: 0100 1100 0001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0100 1100 0001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0100 1100 0001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0100 1100 0001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0100 1100 0001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1e: 0100 1100 0001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1f: 0100 1100 0001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 20: 0100 1100 0010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 21: 0100 1100 0010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 22: 0100 1100 0010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 23: 0100 1100 0010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 24: 0100 1100 0010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 25: 0100 1100 0010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 26: 0100 1100 0010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 27: 0100 1100 0010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 28: 0100 1100 0010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 29: 0100 1100 0010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0100 1100 0010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0100 1100 0010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0100 1100 0010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0100 1100 0010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2e: 0100 1100 0010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2f: 0100 1100 0010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 30: 0100 1100 0011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 31: 0100 1100 0011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 32: 0100 1100 0011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 33: 0100 1100 0011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 34: 0100 1100 0011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 35: 0100 1100 0011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 36: 0100 1100 0011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 37: 0100 1100 0011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 38: 0100 1100 0011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 39: 0100 1100 0011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0100 1100 0011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0100 1100 0011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0100 1100 0011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0100 1100 0011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3e: 0100 1100 0011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3f: 0100 1100 0011 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 40: 0100 1100 0100 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 41: 0100 1100 0100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 42: 0100 1100 0100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 43: 0100 1100 0100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 44: 0100 1100 0100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 45: 0100 1100 0100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 46: 0100 1100 0100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 47: 0100 1100 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0100 1100 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0100 1100 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0100 1100 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0100 1100 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0100 1100 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1100 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1100 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1100 0100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 50: 0100 1100 0101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 51: 0100 1100 0101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 52: 0100 1100 0101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 53: 0100 1100 0101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 54: 0100 1100 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1100 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1100 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1100 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1100 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1100 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1100 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1100 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1100 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1100 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1100 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1100 0101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 60: 0100 1100 0110 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 61: 0100 1100 0110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 62: 0100 1100 0110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 63: 0100 1100 0110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 64: 0100 1100 0110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 65: 0100 1100 0110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 66: 0100 1100 0110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 67: 0100 1100 0110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 68: 0100 1100 0110 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 69: 0100 1100 0110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6a: 0100 1100 0110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6b: 0100 1100 0110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6c: 0100 1100 0110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1100 0110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1100 0110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1100 0110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 70: 0100 1100 0111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 71: 0100 1100 0111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 72: 0100 1100 0111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 73: 0100 1100 0111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 74: 0100 1100 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1100 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1100 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1100 0111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1100 0111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1100 0111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1100 0111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1100 0111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1100 0111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1100 0111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1100 0111 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1100 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1100 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1100 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0100 1100 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0100 1100 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0100 1100 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0100 1100 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1100 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1100 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1100 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1100 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1100 1000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0100 1100 1000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0100 1100 1000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8d: 0100 1100 1000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8e: 0100 1100 1000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8f: 0100 1100 1000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1100 1001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1100 1001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 92: 0100 1100 1001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 93: 0100 1100 1001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 94: 0100 1100 1001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 95: 0100 1100 1001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1100 1001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1100 1001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1100 1001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1100 1001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1100 1001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0100 1100 1001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0100 1100 1001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9d: 0100 1100 1001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9e: 0100 1100 1001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9f: 0100 1100 1001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* a0: 0100 1100 1010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1100 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1100 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1100 1010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a4: 0100 1100 1010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1100 1010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1100 1010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1100 1010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a8: 0100 1100 1010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1100 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1100 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1100 1010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1100 1010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1100 1010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1100 1010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1100 1010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* b0: 0100 1100 1011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1100 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1100 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1100 1011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b4: 0100 1100 1011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1100 1011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1100 1011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1100 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1100 1011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1100 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1100 1011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bb: 0100 1100 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1100 1011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1100 1011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1100 1011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1100 1011 1111 */
+
+ {MOV_A_PA, 2,10,10,L0|L1}, /* c0: 0100 1100 1100 0000 */
+ {MOV_A_PB, 2,10,10,L0|L1}, /* c1: 0100 1100 1100 0001 */
+ {MOV_A_PC, 2,10,10,L0|L1}, /* c2: 0100 1100 1100 0010 */
+ {MOV_A_PD, 2,10,10,L0|L1}, /* c3: 0100 1100 1100 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* c4: 0100 1100 1100 0100 */
+ {MOV_A_PF, 2,10,10,L0|L1}, /* c5: 0100 1100 1100 0101 */
+ {MOV_A_MKH, 2,10,10,L0|L1}, /* c6: 0100 1100 1100 0110 */
+ {MOV_A_MKL, 2,10,10,L0|L1}, /* c7: 0100 1100 1100 0111 */
+ {MOV_A_ANM, 2,10,10,L0|L1}, /* c8: 0100 1100 1100 1000 */
+ {MOV_A_SMH, 2,10,10,L0|L1}, /* c9: 0100 1100 1100 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* ca: 0100 1100 1100 1010 */
+ {MOV_A_EOM, 2,10,10,L0|L1}, /* cb: 0100 1100 1100 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* cc: 0100 1100 1100 1100 */
+ {MOV_A_TMM, 2,10,10,L0|L1}, /* cd: 0100 1100 1100 1101 */
// {illegal2, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */
- {MOV_A_PT, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */ /* 7807 */
- {illegal2, 2,10,10,L0|L1}, /* cf: 0100 1100 1100 1111 */
-
- {illegal2, 2,10,10,L0|L1}, /* d0: 0100 1100 1101 0000 */
- {illegal2, 2,10,10,L0|L1}, /* d1: 0100 1100 1101 0001 */
- {illegal2, 2,10,10,L0|L1}, /* d2: 0100 1100 1101 0010 */
- {illegal2, 2,10,10,L0|L1}, /* d3: 0100 1100 1101 0011 */
- {illegal2, 2,10,10,L0|L1}, /* d4: 0100 1100 1101 0100 */
- {illegal2, 2,10,10,L0|L1}, /* d5: 0100 1100 1101 0101 */
- {illegal2, 2,10,10,L0|L1}, /* d6: 0100 1100 1101 0110 */
- {illegal2, 2,10,10,L0|L1}, /* d7: 0100 1100 1101 0111 */
- {illegal2, 2,10,10,L0|L1}, /* d8: 0100 1100 1101 1000 */
- {MOV_A_RXB, 2,10,10,L0|L1}, /* d9: 0100 1100 1101 1001 */
- {illegal2, 2,10,10,L0|L1}, /* da: 0100 1100 1101 1010 */
- {illegal2, 2,10,10,L0|L1}, /* db: 0100 1100 1101 1011 */
- {illegal2, 2,10,10,L0|L1}, /* dc: 0100 1100 1101 1100 */
- {illegal2, 2,10,10,L0|L1}, /* dd: 0100 1100 1101 1101 */
- {illegal2, 2,10,10,L0|L1}, /* de: 0100 1100 1101 1110 */
- {illegal2, 2,10,10,L0|L1}, /* df: 0100 1100 1101 1111 */
-
- {MOV_A_CR0, 2,10,10,L0|L1}, /* e0: 0100 1100 1110 0000 */
- {MOV_A_CR1, 2,10,10,L0|L1}, /* e1: 0100 1100 1110 0001 */
- {MOV_A_CR2, 2,10,10,L0|L1}, /* e2: 0100 1100 1110 0010 */
- {MOV_A_CR3, 2,10,10,L0|L1}, /* e3: 0100 1100 1110 0011 */
- {illegal2, 2,10,10,L0|L1}, /* e4: 0100 1100 1110 0100 */
- {illegal2, 2,10,10,L0|L1}, /* e5: 0100 1100 1110 0101 */
- {illegal2, 2,10,10,L0|L1}, /* e6: 0100 1100 1110 0110 */
- {illegal2, 2,10,10,L0|L1}, /* e7: 0100 1100 1110 0111 */
- {illegal2, 2,10,10,L0|L1}, /* e8: 0100 1100 1110 1000 */
- {illegal2, 2,10,10,L0|L1}, /* e9: 0100 1100 1110 1001 */
- {illegal2, 2,10,10,L0|L1}, /* ea: 0100 1100 1110 1010 */
- {illegal2, 2,10,10,L0|L1}, /* eb: 0100 1100 1110 1011 */
- {illegal2, 2,10,10,L0|L1}, /* ec: 0100 1100 1110 1100 */
- {illegal2, 2,10,10,L0|L1}, /* ed: 0100 1100 1110 1101 */
- {illegal2, 2,10,10,L0|L1}, /* ee: 0100 1100 1110 1110 */
- {illegal2, 2,10,10,L0|L1}, /* ef: 0100 1100 1110 1111 */
-
- {illegal2, 2,10,10,L0|L1}, /* f0: 0100 1100 1111 0000 */
- {illegal2, 2,10,10,L0|L1}, /* f1: 0100 1100 1111 0001 */
- {illegal2, 2,10,10,L0|L1}, /* f2: 0100 1100 1111 0010 */
- {illegal2, 2,10,10,L0|L1}, /* f3: 0100 1100 1111 0011 */
- {illegal2, 2,10,10,L0|L1}, /* f4: 0100 1100 1111 0100 */
- {illegal2, 2,10,10,L0|L1}, /* f5: 0100 1100 1111 0101 */
- {illegal2, 2,10,10,L0|L1}, /* f6: 0100 1100 1111 0110 */
- {illegal2, 2,10,10,L0|L1}, /* f7: 0100 1100 1111 0111 */
- {illegal2, 2,10,10,L0|L1}, /* f8: 0100 1100 1111 1000 */
- {illegal2, 2,10,10,L0|L1}, /* f9: 0100 1100 1111 1001 */
- {illegal2, 2,10,10,L0|L1}, /* fa: 0100 1100 1111 1010 */
- {illegal2, 2,10,10,L0|L1}, /* fb: 0100 1100 1111 1011 */
- {illegal2, 2,10,10,L0|L1}, /* fc: 0100 1100 1111 1100 */
- {illegal2, 2,10,10,L0|L1}, /* fd: 0100 1100 1111 1101 */
- {illegal2, 2,10,10,L0|L1}, /* fe: 0100 1100 1111 1110 */
- {illegal2, 2,10,10,L0|L1}, /* ff: 0100 1100 1111 1111 */
+ {MOV_A_PT, 2,10,10,L0|L1}, /* ce: 0100 1100 1100 1110 */ /* 7807 */
+ {illegal2, 2,10,10,L0|L1}, /* cf: 0100 1100 1100 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* d0: 0100 1100 1101 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* d1: 0100 1100 1101 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* d2: 0100 1100 1101 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* d3: 0100 1100 1101 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* d4: 0100 1100 1101 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* d5: 0100 1100 1101 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* d6: 0100 1100 1101 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* d7: 0100 1100 1101 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* d8: 0100 1100 1101 1000 */
+ {MOV_A_RXB, 2,10,10,L0|L1}, /* d9: 0100 1100 1101 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* da: 0100 1100 1101 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* db: 0100 1100 1101 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* dc: 0100 1100 1101 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* dd: 0100 1100 1101 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* de: 0100 1100 1101 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* df: 0100 1100 1101 1111 */
+
+ {MOV_A_CR0, 2,10,10,L0|L1}, /* e0: 0100 1100 1110 0000 */
+ {MOV_A_CR1, 2,10,10,L0|L1}, /* e1: 0100 1100 1110 0001 */
+ {MOV_A_CR2, 2,10,10,L0|L1}, /* e2: 0100 1100 1110 0010 */
+ {MOV_A_CR3, 2,10,10,L0|L1}, /* e3: 0100 1100 1110 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* e4: 0100 1100 1110 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* e5: 0100 1100 1110 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* e6: 0100 1100 1110 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* e7: 0100 1100 1110 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* e8: 0100 1100 1110 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* e9: 0100 1100 1110 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* ea: 0100 1100 1110 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* eb: 0100 1100 1110 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* ec: 0100 1100 1110 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* ed: 0100 1100 1110 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* ee: 0100 1100 1110 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* ef: 0100 1100 1110 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* f0: 0100 1100 1111 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* f1: 0100 1100 1111 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* f2: 0100 1100 1111 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* f3: 0100 1100 1111 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* f4: 0100 1100 1111 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* f5: 0100 1100 1111 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* f6: 0100 1100 1111 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* f7: 0100 1100 1111 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* f8: 0100 1100 1111 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* f9: 0100 1100 1111 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* fa: 0100 1100 1111 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* fb: 0100 1100 1111 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* fc: 0100 1100 1111 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* fd: 0100 1100 1111 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* fe: 0100 1100 1111 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* ff: 0100 1100 1111 1111 */
};
/* prefix 4D */
static const struct opcode_s op4D[256] =
{
- {illegal2, 2, 8, 8,L0|L1}, /* 00: 0100 1101 0000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 01: 0100 1101 0000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 02: 0100 1101 0000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 03: 0100 1101 0000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 04: 0100 1101 0000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 05: 0100 1101 0000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 06: 0100 1101 0000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 07: 0100 1101 0000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 08: 0100 1101 0000 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 09: 0100 1101 0000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0100 1101 0000 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0100 1101 0000 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0100 1101 0000 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0100 1101 0000 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0e: 0100 1101 0000 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0f: 0100 1101 0000 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1101 0001 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1101 0001 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1101 0001 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1101 0001 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1101 0001 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1101 0001 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1101 0001 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1101 0001 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 18: 0100 1101 0001 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 19: 0100 1101 0001 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0100 1101 0001 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0100 1101 0001 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0100 1101 0001 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0100 1101 0001 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1e: 0100 1101 0001 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1f: 0100 1101 0001 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 20: 0100 1101 0010 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 21: 0100 1101 0010 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 22: 0100 1101 0010 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 23: 0100 1101 0010 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 24: 0100 1101 0010 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 25: 0100 1101 0010 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 26: 0100 1101 0010 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 27: 0100 1101 0010 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 28: 0100 1101 0010 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 29: 0100 1101 0010 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0100 1101 0010 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0100 1101 0010 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0100 1101 0010 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0100 1101 0010 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2e: 0100 1101 0010 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2f: 0100 1101 0010 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 30: 0100 1101 0011 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 31: 0100 1101 0011 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 32: 0100 1101 0011 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 33: 0100 1101 0011 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 34: 0100 1101 0011 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 35: 0100 1101 0011 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 36: 0100 1101 0011 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 37: 0100 1101 0011 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 38: 0100 1101 0011 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 39: 0100 1101 0011 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0100 1101 0011 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0100 1101 0011 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0100 1101 0011 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0100 1101 0011 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3e: 0100 1101 0011 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3f: 0100 1101 0011 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 40: 0100 1101 0100 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 41: 0100 1101 0100 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 42: 0100 1101 0100 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 43: 0100 1101 0100 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 44: 0100 1101 0100 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 45: 0100 1101 0100 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 46: 0100 1101 0100 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 47: 0100 1101 0100 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 48: 0100 1101 0100 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 49: 0100 1101 0100 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0100 1101 0100 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0100 1101 0100 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0100 1101 0100 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1101 0100 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1101 0100 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1101 0100 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 50: 0100 1101 0101 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 51: 0100 1101 0101 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 52: 0100 1101 0101 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 53: 0100 1101 0101 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 54: 0100 1101 0101 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1101 0101 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1101 0101 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1101 0101 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1101 0101 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1101 0101 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1101 0101 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1101 0101 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1101 0101 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1101 0101 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1101 0101 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1101 0101 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 60: 0100 1101 0110 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 61: 0100 1101 0110 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 62: 0100 1101 0110 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 63: 0100 1101 0110 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 64: 0100 1101 0110 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 65: 0100 1101 0110 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 66: 0100 1101 0110 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 67: 0100 1101 0110 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 68: 0100 1101 0110 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 69: 0100 1101 0110 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6a: 0100 1101 0110 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6b: 0100 1101 0110 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6c: 0100 1101 0110 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1101 0110 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1101 0110 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1101 0110 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 70: 0100 1101 0111 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 71: 0100 1101 0111 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 72: 0100 1101 0111 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 73: 0100 1101 0111 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 74: 0100 1101 0111 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1101 0111 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1101 0111 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1101 0111 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1101 0111 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1101 0111 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1101 0111 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1101 0111 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1101 0111 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1101 0111 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1101 0111 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1101 0111 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1101 1000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1101 1000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 82: 0100 1101 1000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 83: 0100 1101 1000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 84: 0100 1101 1000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 85: 0100 1101 1000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1101 1000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1101 1000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1101 1000 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1101 1000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1101 1000 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0100 1101 1000 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0100 1101 1000 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8d: 0100 1101 1000 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8e: 0100 1101 1000 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8f: 0100 1101 1000 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1101 1001 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1101 1001 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 92: 0100 1101 1001 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 93: 0100 1101 1001 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 94: 0100 1101 1001 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 95: 0100 1101 1001 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1101 1001 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1101 1001 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1101 1001 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1101 1001 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1101 1001 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0100 1101 1001 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0100 1101 1001 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9d: 0100 1101 1001 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9e: 0100 1101 1001 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9f: 0100 1101 1001 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* a0: 0100 1101 1010 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1101 1010 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1101 1010 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1101 1010 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* a4: 0100 1101 1010 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1101 1010 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1101 1010 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1101 1010 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* a8: 0100 1101 1010 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1101 1010 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1101 1010 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1101 1010 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1101 1010 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1101 1010 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1101 1010 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1101 1010 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* b0: 0100 1101 1011 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1101 1011 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1101 1011 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1101 1011 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* b4: 0100 1101 1011 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1101 1011 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1101 1011 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1101 1011 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1101 1011 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1101 1011 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1101 1011 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* bb: 0100 1101 1011 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1101 1011 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1101 1011 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1101 1011 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1101 1011 1111 */
-
- {MOV_PA_A, 2,10,10,L0|L1}, /* c0: 0100 1101 1100 0000 */
- {MOV_PB_A, 2,10,10,L0|L1}, /* c1: 0100 1101 1100 0001 */
- {MOV_PC_A, 2,10,10,L0|L1}, /* c2: 0100 1101 1100 0010 */
- {MOV_PD_A, 2,10,10,L0|L1}, /* c3: 0100 1101 1100 0011 */
- {illegal2, 2,10,10,L0|L1}, /* c4: 0100 1101 1100 0100 */
- {MOV_PF_A, 2,10,10,L0|L1}, /* c5: 0100 1101 1100 0101 */
- {MOV_MKH_A, 2,10,10,L0|L1}, /* c6: 0100 1101 1100 0110 */
- {MOV_MKL_A, 2,10,10,L0|L1}, /* c7: 0100 1101 1100 0111 */
- {MOV_ANM_A, 2,10,10,L0|L1}, /* c8: 0100 1101 1100 1000 */
- {MOV_SMH_A, 2,10,10,L0|L1}, /* c9: 0100 1101 1100 1001 */
- {MOV_SML_A, 2,10,10,L0|L1}, /* ca: 0100 1101 1100 1010 */
- {MOV_EOM_A, 2,10,10,L0|L1}, /* cb: 0100 1101 1100 1011 */
- {MOV_ETMM_A, 2,10,10,L0|L1}, /* cc: 0100 1101 1100 1100 */
- {MOV_TMM_A, 2,10,10,L0|L1}, /* cd: 0100 1101 1100 1101 */
- {illegal2, 2,10,10,L0|L1}, /* ce: 0100 1101 1100 1110 */
- {illegal2, 2,10,10,L0|L1}, /* cf: 0100 1101 1100 1111 */
-
- {MOV_MM_A, 2,10,10,L0|L1}, /* d0: 0100 1101 1101 0000 */
- {MOV_MCC_A, 2,10,10,L0|L1}, /* d1: 0100 1101 1101 0001 */
- {MOV_MA_A, 2,10,10,L0|L1}, /* d2: 0100 1101 1101 0010 */
- {MOV_MB_A, 2,10,10,L0|L1}, /* d3: 0100 1101 1101 0011 */
- {MOV_MC_A, 2,10,10,L0|L1}, /* d4: 0100 1101 1101 0100 */
- {illegal2, 2,10,10,L0|L1}, /* d5: 0100 1101 1101 0101 */
- {illegal2, 2,10,10,L0|L1}, /* d6: 0100 1101 1101 0110 */
- {MOV_MF_A, 2,10,10,L0|L1}, /* d7: 0100 1101 1101 0111 */
- {MOV_TXB_A, 2,10,10,L0|L1}, /* d8: 0100 1101 1101 1000 */
- {illegal2, 2,10,10,L0|L1}, /* d9: 0100 1101 1101 1001 */
- {MOV_TM0_A, 2,10,10,L0|L1}, /* da: 0100 1101 1101 1010 */
- {MOV_TM1_A, 2,10,10,L0|L1}, /* db: 0100 1101 1101 1011 */
- {illegal2, 2,10,10,L0|L1}, /* dc: 0100 1101 1101 1100 */
- {illegal2, 2,10,10,L0|L1}, /* dd: 0100 1101 1101 1101 */
- {illegal2, 2,10,10,L0|L1}, /* de: 0100 1101 1101 1110 */
- {illegal2, 2,10,10,L0|L1}, /* df: 0100 1101 1101 1111 */
-
- {illegal2, 2,10,10,L0|L1}, /* e0: 0100 1101 1110 0000 */
- {illegal2, 2,10,10,L0|L1}, /* e1: 0100 1101 1110 0001 */
- {illegal2, 2,10,10,L0|L1}, /* e2: 0100 1101 1110 0010 */
- {illegal2, 2,10,10,L0|L1}, /* e3: 0100 1101 1110 0011 */
- {illegal2, 2,10,10,L0|L1}, /* e4: 0100 1101 1110 0100 */
- {illegal2, 2,10,10,L0|L1}, /* e5: 0100 1101 1110 0101 */
- {illegal2, 2,10,10,L0|L1}, /* e6: 0100 1101 1110 0110 */
- {illegal2, 2,10,10,L0|L1}, /* e7: 0100 1101 1110 0111 */
- {MOV_ZCM_A, 2,10,10,L0|L1}, /* e8: 0100 1101 1110 1000 */
- {illegal2, 2,10,10,L0|L1}, /* e9: 0100 1101 1110 1001 */
- {illegal2, 2,10,10,L0|L1}, /* ea: 0100 1101 1110 1010 */
- {illegal2, 2,10,10,L0|L1}, /* eb: 0100 1101 1110 1011 */
- {illegal2, 2,10,10,L0|L1}, /* ec: 0100 1101 1110 1100 */
- {illegal2, 2,10,10,L0|L1}, /* ed: 0100 1101 1110 1101 */
- {illegal2, 2,10,10,L0|L1}, /* ee: 0100 1101 1110 1110 */
- {illegal2, 2,10,10,L0|L1}, /* ef: 0100 1101 1110 1111 */
-
- {illegal2, 2,10,10,L0|L1}, /* f0: 0100 1101 1111 0000 */
- {illegal2, 2,10,10,L0|L1}, /* f1: 0100 1101 1111 0001 */
- {illegal2, 2,10,10,L0|L1}, /* f2: 0100 1101 1111 0010 */
- {illegal2, 2,10,10,L0|L1}, /* f3: 0100 1101 1111 0011 */
- {illegal2, 2,10,10,L0|L1}, /* f4: 0100 1101 1111 0100 */
- {illegal2, 2,10,10,L0|L1}, /* f5: 0100 1101 1111 0101 */
- {illegal2, 2,10,10,L0|L1}, /* f6: 0100 1101 1111 0110 */
- {illegal2, 2,10,10,L0|L1}, /* f7: 0100 1101 1111 0111 */
- {illegal2, 2,10,10,L0|L1}, /* f8: 0100 1101 1111 1000 */
- {illegal2, 2,10,10,L0|L1}, /* f9: 0100 1101 1111 1001 */
- {illegal2, 2,10,10,L0|L1}, /* fa: 0100 1101 1111 1010 */
- {illegal2, 2,10,10,L0|L1}, /* fb: 0100 1101 1111 1011 */
- {illegal2, 2,10,10,L0|L1}, /* fc: 0100 1101 1111 1100 */
- {illegal2, 2,10,10,L0|L1}, /* fd: 0100 1101 1111 1101 */
- {illegal2, 2,10,10,L0|L1}, /* fe: 0100 1101 1111 1110 */
- {illegal2, 2,10,10,L0|L1} /* ff: 0100 1101 1111 1111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0100 1101 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0100 1101 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0100 1101 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0100 1101 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0100 1101 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0100 1101 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0100 1101 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0100 1101 0000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 08: 0100 1101 0000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 09: 0100 1101 0000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0100 1101 0000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0100 1101 0000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0100 1101 0000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0100 1101 0000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0e: 0100 1101 0000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0f: 0100 1101 0000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0100 1101 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0100 1101 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0100 1101 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0100 1101 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0100 1101 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0100 1101 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0100 1101 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0100 1101 0001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 18: 0100 1101 0001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 19: 0100 1101 0001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0100 1101 0001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0100 1101 0001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0100 1101 0001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0100 1101 0001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1e: 0100 1101 0001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1f: 0100 1101 0001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 20: 0100 1101 0010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 21: 0100 1101 0010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 22: 0100 1101 0010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 23: 0100 1101 0010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 24: 0100 1101 0010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 25: 0100 1101 0010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 26: 0100 1101 0010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 27: 0100 1101 0010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 28: 0100 1101 0010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 29: 0100 1101 0010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0100 1101 0010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0100 1101 0010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0100 1101 0010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0100 1101 0010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2e: 0100 1101 0010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2f: 0100 1101 0010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 30: 0100 1101 0011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 31: 0100 1101 0011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 32: 0100 1101 0011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 33: 0100 1101 0011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 34: 0100 1101 0011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 35: 0100 1101 0011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 36: 0100 1101 0011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 37: 0100 1101 0011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 38: 0100 1101 0011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 39: 0100 1101 0011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0100 1101 0011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0100 1101 0011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0100 1101 0011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0100 1101 0011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3e: 0100 1101 0011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3f: 0100 1101 0011 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 40: 0100 1101 0100 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 41: 0100 1101 0100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 42: 0100 1101 0100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 43: 0100 1101 0100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 44: 0100 1101 0100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 45: 0100 1101 0100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 46: 0100 1101 0100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 47: 0100 1101 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0100 1101 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0100 1101 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0100 1101 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0100 1101 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0100 1101 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0100 1101 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0100 1101 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0100 1101 0100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 50: 0100 1101 0101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 51: 0100 1101 0101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 52: 0100 1101 0101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 53: 0100 1101 0101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 54: 0100 1101 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0100 1101 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0100 1101 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0100 1101 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0100 1101 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0100 1101 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0100 1101 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0100 1101 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0100 1101 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0100 1101 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0100 1101 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0100 1101 0101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 60: 0100 1101 0110 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 61: 0100 1101 0110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 62: 0100 1101 0110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 63: 0100 1101 0110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 64: 0100 1101 0110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 65: 0100 1101 0110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 66: 0100 1101 0110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 67: 0100 1101 0110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 68: 0100 1101 0110 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 69: 0100 1101 0110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6a: 0100 1101 0110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6b: 0100 1101 0110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6c: 0100 1101 0110 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6d: 0100 1101 0110 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6e: 0100 1101 0110 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 6f: 0100 1101 0110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 70: 0100 1101 0111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 71: 0100 1101 0111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 72: 0100 1101 0111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 73: 0100 1101 0111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 74: 0100 1101 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0100 1101 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0100 1101 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0100 1101 0111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 78: 0100 1101 0111 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 79: 0100 1101 0111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7a: 0100 1101 0111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7b: 0100 1101 0111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7c: 0100 1101 0111 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7d: 0100 1101 0111 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7e: 0100 1101 0111 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 7f: 0100 1101 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0100 1101 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0100 1101 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0100 1101 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0100 1101 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0100 1101 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0100 1101 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0100 1101 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0100 1101 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0100 1101 1000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0100 1101 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0100 1101 1000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0100 1101 1000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0100 1101 1000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8d: 0100 1101 1000 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8e: 0100 1101 1000 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8f: 0100 1101 1000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0100 1101 1001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0100 1101 1001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 92: 0100 1101 1001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 93: 0100 1101 1001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 94: 0100 1101 1001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 95: 0100 1101 1001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 96: 0100 1101 1001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 97: 0100 1101 1001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0100 1101 1001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0100 1101 1001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0100 1101 1001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0100 1101 1001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0100 1101 1001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9d: 0100 1101 1001 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9e: 0100 1101 1001 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9f: 0100 1101 1001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* a0: 0100 1101 1010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0100 1101 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0100 1101 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0100 1101 1010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a4: 0100 1101 1010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a5: 0100 1101 1010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a6: 0100 1101 1010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a7: 0100 1101 1010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a8: 0100 1101 1010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0100 1101 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0100 1101 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0100 1101 1010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ac: 0100 1101 1010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ad: 0100 1101 1010 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ae: 0100 1101 1010 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* af: 0100 1101 1010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* b0: 0100 1101 1011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0100 1101 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0100 1101 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0100 1101 1011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b4: 0100 1101 1011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b5: 0100 1101 1011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b6: 0100 1101 1011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b7: 0100 1101 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0100 1101 1011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0100 1101 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0100 1101 1011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bb: 0100 1101 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0100 1101 1011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bd: 0100 1101 1011 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* be: 0100 1101 1011 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bf: 0100 1101 1011 1111 */
+
+ {MOV_PA_A, 2,10,10,L0|L1}, /* c0: 0100 1101 1100 0000 */
+ {MOV_PB_A, 2,10,10,L0|L1}, /* c1: 0100 1101 1100 0001 */
+ {MOV_PC_A, 2,10,10,L0|L1}, /* c2: 0100 1101 1100 0010 */
+ {MOV_PD_A, 2,10,10,L0|L1}, /* c3: 0100 1101 1100 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* c4: 0100 1101 1100 0100 */
+ {MOV_PF_A, 2,10,10,L0|L1}, /* c5: 0100 1101 1100 0101 */
+ {MOV_MKH_A, 2,10,10,L0|L1}, /* c6: 0100 1101 1100 0110 */
+ {MOV_MKL_A, 2,10,10,L0|L1}, /* c7: 0100 1101 1100 0111 */
+ {MOV_ANM_A, 2,10,10,L0|L1}, /* c8: 0100 1101 1100 1000 */
+ {MOV_SMH_A, 2,10,10,L0|L1}, /* c9: 0100 1101 1100 1001 */
+ {MOV_SML_A, 2,10,10,L0|L1}, /* ca: 0100 1101 1100 1010 */
+ {MOV_EOM_A, 2,10,10,L0|L1}, /* cb: 0100 1101 1100 1011 */
+ {MOV_ETMM_A, 2,10,10,L0|L1}, /* cc: 0100 1101 1100 1100 */
+ {MOV_TMM_A, 2,10,10,L0|L1}, /* cd: 0100 1101 1100 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* ce: 0100 1101 1100 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* cf: 0100 1101 1100 1111 */
+
+ {MOV_MM_A, 2,10,10,L0|L1}, /* d0: 0100 1101 1101 0000 */
+ {MOV_MCC_A, 2,10,10,L0|L1}, /* d1: 0100 1101 1101 0001 */
+ {MOV_MA_A, 2,10,10,L0|L1}, /* d2: 0100 1101 1101 0010 */
+ {MOV_MB_A, 2,10,10,L0|L1}, /* d3: 0100 1101 1101 0011 */
+ {MOV_MC_A, 2,10,10,L0|L1}, /* d4: 0100 1101 1101 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* d5: 0100 1101 1101 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* d6: 0100 1101 1101 0110 */
+ {MOV_MF_A, 2,10,10,L0|L1}, /* d7: 0100 1101 1101 0111 */
+ {MOV_TXB_A, 2,10,10,L0|L1}, /* d8: 0100 1101 1101 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* d9: 0100 1101 1101 1001 */
+ {MOV_TM0_A, 2,10,10,L0|L1}, /* da: 0100 1101 1101 1010 */
+ {MOV_TM1_A, 2,10,10,L0|L1}, /* db: 0100 1101 1101 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* dc: 0100 1101 1101 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* dd: 0100 1101 1101 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* de: 0100 1101 1101 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* df: 0100 1101 1101 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* e0: 0100 1101 1110 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* e1: 0100 1101 1110 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* e2: 0100 1101 1110 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* e3: 0100 1101 1110 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* e4: 0100 1101 1110 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* e5: 0100 1101 1110 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* e6: 0100 1101 1110 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* e7: 0100 1101 1110 0111 */
+ {MOV_ZCM_A, 2,10,10,L0|L1}, /* e8: 0100 1101 1110 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* e9: 0100 1101 1110 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* ea: 0100 1101 1110 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* eb: 0100 1101 1110 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* ec: 0100 1101 1110 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* ed: 0100 1101 1110 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* ee: 0100 1101 1110 1110 */
+ {illegal2, 2,10,10,L0|L1}, /* ef: 0100 1101 1110 1111 */
+
+ {illegal2, 2,10,10,L0|L1}, /* f0: 0100 1101 1111 0000 */
+ {illegal2, 2,10,10,L0|L1}, /* f1: 0100 1101 1111 0001 */
+ {illegal2, 2,10,10,L0|L1}, /* f2: 0100 1101 1111 0010 */
+ {illegal2, 2,10,10,L0|L1}, /* f3: 0100 1101 1111 0011 */
+ {illegal2, 2,10,10,L0|L1}, /* f4: 0100 1101 1111 0100 */
+ {illegal2, 2,10,10,L0|L1}, /* f5: 0100 1101 1111 0101 */
+ {illegal2, 2,10,10,L0|L1}, /* f6: 0100 1101 1111 0110 */
+ {illegal2, 2,10,10,L0|L1}, /* f7: 0100 1101 1111 0111 */
+ {illegal2, 2,10,10,L0|L1}, /* f8: 0100 1101 1111 1000 */
+ {illegal2, 2,10,10,L0|L1}, /* f9: 0100 1101 1111 1001 */
+ {illegal2, 2,10,10,L0|L1}, /* fa: 0100 1101 1111 1010 */
+ {illegal2, 2,10,10,L0|L1}, /* fb: 0100 1101 1111 1011 */
+ {illegal2, 2,10,10,L0|L1}, /* fc: 0100 1101 1111 1100 */
+ {illegal2, 2,10,10,L0|L1}, /* fd: 0100 1101 1111 1101 */
+ {illegal2, 2,10,10,L0|L1}, /* fe: 0100 1101 1111 1110 */
+ {illegal2, 2,10,10,L0|L1} /* ff: 0100 1101 1111 1111 */
};
/* prefix 60 */
static const struct opcode_s op60[256] =
{
- {illegal2, 2, 8, 8,L0|L1}, /* 00: 0110 0000 0000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 01: 0110 0000 0000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 02: 0110 0000 0000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 03: 0110 0000 0000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 04: 0110 0000 0000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 05: 0110 0000 0000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 06: 0110 0000 0000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 07: 0110 0000 0000 0111 */
- {ANA_V_A, 2, 8, 8,L0|L1}, /* 08: 0110 0000 0000 1000 */
- {ANA_A_A, 2, 8, 8,L0|L1}, /* 09: 0110 0000 0000 1001 */
- {ANA_B_A, 2, 8, 8,L0|L1}, /* 0a: 0110 0000 0000 1010 */
- {ANA_C_A, 2, 8, 8,L0|L1}, /* 0b: 0110 0000 0000 1011 */
- {ANA_D_A, 2, 8, 8,L0|L1}, /* 0c: 0110 0000 0000 1100 */
- {ANA_E_A, 2, 8, 8,L0|L1}, /* 0d: 0110 0000 0000 1101 */
- {ANA_H_A, 2, 8, 8,L0|L1}, /* 0e: 0110 0000 0000 1110 */
- {ANA_L_A, 2, 8, 8,L0|L1}, /* 0f: 0110 0000 0000 1111 */
-
- {XRA_V_A, 2, 8, 8,L0|L1}, /* 10: 0110 0000 0001 0000 */
- {XRA_A_A, 2, 8, 8,L0|L1}, /* 11: 0110 0000 0001 0001 */
- {XRA_B_A, 2, 8, 8,L0|L1}, /* 12: 0110 0000 0001 0010 */
- {XRA_C_A, 2, 8, 8,L0|L1}, /* 13: 0110 0000 0001 0011 */
- {XRA_D_A, 2, 8, 8,L0|L1}, /* 14: 0110 0000 0001 0100 */
- {XRA_E_A, 2, 8, 8,L0|L1}, /* 15: 0110 0000 0001 0101 */
- {XRA_H_A, 2, 8, 8,L0|L1}, /* 16: 0110 0000 0001 0110 */
- {XRA_L_A, 2, 8, 8,L0|L1}, /* 17: 0110 0000 0001 0111 */
- {ORA_V_A, 2, 8, 8,L0|L1}, /* 18: 0110 0000 0001 1000 */
- {ORA_A_A, 2, 8, 8,L0|L1}, /* 19: 0110 0000 0001 1001 */
- {ORA_B_A, 2, 8, 8,L0|L1}, /* 1a: 0110 0000 0001 1010 */
- {ORA_C_A, 2, 8, 8,L0|L1}, /* 1b: 0110 0000 0001 1011 */
- {ORA_D_A, 2, 8, 8,L0|L1}, /* 1c: 0110 0000 0001 1100 */
- {ORA_E_A, 2, 8, 8,L0|L1}, /* 1d: 0110 0000 0001 1101 */
- {ORA_H_A, 2, 8, 8,L0|L1}, /* 1e: 0110 0000 0001 1110 */
- {ORA_L_A, 2, 8, 8,L0|L1}, /* 1f: 0110 0000 0001 1111 */
-
- {ADDNC_V_A, 2, 8, 8,L0|L1}, /* 20: 0110 0000 0010 0000 */
- {ADDNC_A_A, 2, 8, 8,L0|L1}, /* 21: 0110 0000 0010 0001 */
- {ADDNC_B_A, 2, 8, 8,L0|L1}, /* 22: 0110 0000 0010 0010 */
- {ADDNC_C_A, 2, 8, 8,L0|L1}, /* 23: 0110 0000 0010 0011 */
- {ADDNC_D_A, 2, 8, 8,L0|L1}, /* 24: 0110 0000 0010 0100 */
- {ADDNC_E_A, 2, 8, 8,L0|L1}, /* 25: 0110 0000 0010 0101 */
- {ADDNC_H_A, 2, 8, 8,L0|L1}, /* 26: 0110 0000 0010 0110 */
- {ADDNC_L_A, 2, 8, 8,L0|L1}, /* 27: 0110 0000 0010 0111 */
- {GTA_V_A, 2, 8, 8,L0|L1}, /* 28: 0110 0000 0010 1000 */
- {GTA_A_A, 2, 8, 8,L0|L1}, /* 29: 0110 0000 0010 1001 */
- {GTA_B_A, 2, 8, 8,L0|L1}, /* 2a: 0110 0000 0010 1010 */
- {GTA_C_A, 2, 8, 8,L0|L1}, /* 2b: 0110 0000 0010 1011 */
- {GTA_D_A, 2, 8, 8,L0|L1}, /* 2c: 0110 0000 0010 1100 */
- {GTA_E_A, 2, 8, 8,L0|L1}, /* 2d: 0110 0000 0010 1101 */
- {GTA_H_A, 2, 8, 8,L0|L1}, /* 2e: 0110 0000 0010 1110 */
- {GTA_L_A, 2, 8, 8,L0|L1}, /* 2f: 0110 0000 0010 1111 */
-
- {SUBNB_V_A, 2, 8, 8,L0|L1}, /* 30: 0110 0000 0011 0000 */
- {SUBNB_A_A, 2, 8, 8,L0|L1}, /* 31: 0110 0000 0011 0001 */
- {SUBNB_B_A, 2, 8, 8,L0|L1}, /* 32: 0110 0000 0011 0010 */
- {SUBNB_C_A, 2, 8, 8,L0|L1}, /* 33: 0110 0000 0011 0011 */
- {SUBNB_D_A, 2, 8, 8,L0|L1}, /* 34: 0110 0000 0011 0100 */
- {SUBNB_E_A, 2, 8, 8,L0|L1}, /* 35: 0110 0000 0011 0101 */
- {SUBNB_H_A, 2, 8, 8,L0|L1}, /* 36: 0110 0000 0011 0110 */
- {SUBNB_L_A, 2, 8, 8,L0|L1}, /* 37: 0110 0000 0011 0111 */
- {LTA_V_A, 2, 8, 8,L0|L1}, /* 38: 0110 0000 0011 1000 */
- {LTA_A_A, 2, 8, 8,L0|L1}, /* 39: 0110 0000 0011 1001 */
- {LTA_B_A, 2, 8, 8,L0|L1}, /* 3a: 0110 0000 0011 1010 */
- {LTA_C_A, 2, 8, 8,L0|L1}, /* 3b: 0110 0000 0011 1011 */
- {LTA_D_A, 2, 8, 8,L0|L1}, /* 3c: 0110 0000 0011 1100 */
- {LTA_E_A, 2, 8, 8,L0|L1}, /* 3d: 0110 0000 0011 1101 */
- {LTA_H_A, 2, 8, 8,L0|L1}, /* 3e: 0110 0000 0011 1110 */
- {LTA_L_A, 2, 8, 8,L0|L1}, /* 3f: 0110 0000 0011 1111 */
-
- {ADD_V_A, 2, 8, 8,L0|L1}, /* 40: 0110 0000 0100 0000 */
- {ADD_A_A, 2, 8, 8,L0|L1}, /* 41: 0110 0000 0100 0001 */
- {ADD_B_A, 2, 8, 8,L0|L1}, /* 42: 0110 0000 0100 0010 */
- {ADD_C_A, 2, 8, 8,L0|L1}, /* 43: 0110 0000 0100 0011 */
- {ADD_D_A, 2, 8, 8,L0|L1}, /* 44: 0110 0000 0100 0100 */
- {ADD_E_A, 2, 8, 8,L0|L1}, /* 45: 0110 0000 0100 0101 */
- {ADD_H_A, 2, 8, 8,L0|L1}, /* 46: 0110 0000 0100 0110 */
- {ADD_L_A, 2, 8, 8,L0|L1}, /* 47: 0110 0000 0100 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 48: 0110 0000 0100 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 49: 0110 0000 0100 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0110 0000 0100 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0110 0000 0100 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0110 0000 0100 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0110 0000 0100 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0110 0000 0100 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0110 0000 0100 1111 */
-
- {ADC_V_A, 2, 8, 8,L0|L1}, /* 50: 0110 0000 0101 0000 */
- {ADC_A_A, 2, 8, 8,L0|L1}, /* 51: 0110 0000 0101 0001 */
- {ADC_B_A, 2, 8, 8,L0|L1}, /* 52: 0110 0000 0101 0010 */
- {ADC_C_A, 2, 8, 8,L0|L1}, /* 53: 0110 0000 0101 0011 */
- {ADC_D_A, 2, 8, 8,L0|L1}, /* 54: 0110 0000 0101 0100 */
- {ADC_E_A, 2, 8, 8,L0|L1}, /* 55: 0110 0000 0101 0101 */
- {ADC_H_A, 2, 8, 8,L0|L1}, /* 56: 0110 0000 0101 0110 */
- {ADC_L_A, 2, 8, 8,L0|L1}, /* 57: 0110 0000 0101 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 58: 0110 0000 0101 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 59: 0110 0000 0101 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0110 0000 0101 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0110 0000 0101 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0110 0000 0101 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0110 0000 0101 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0110 0000 0101 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0110 0000 0101 1111 */
-
- {SUB_V_A, 2, 8, 8,L0|L1}, /* 60: 0110 0000 0110 0000 */
- {SUB_A_A, 2, 8, 8,L0|L1}, /* 61: 0110 0000 0110 0001 */
- {SUB_B_A, 2, 8, 8,L0|L1}, /* 62: 0110 0000 0110 0010 */
- {SUB_C_A, 2, 8, 8,L0|L1}, /* 63: 0110 0000 0110 0011 */
- {SUB_D_A, 2, 8, 8,L0|L1}, /* 64: 0110 0000 0110 0100 */
- {SUB_E_A, 2, 8, 8,L0|L1}, /* 65: 0110 0000 0110 0101 */
- {SUB_H_A, 2, 8, 8,L0|L1}, /* 66: 0110 0000 0110 0110 */
- {SUB_L_A, 2, 8, 8,L0|L1}, /* 67: 0110 0000 0110 0111 */
- {NEA_V_A, 2, 8, 8,L0|L1}, /* 68: 0110 0000 0110 1000 */
- {NEA_A_A, 2, 8, 8,L0|L1}, /* 69: 0110 0000 0110 1001 */
- {NEA_B_A, 2, 8, 8,L0|L1}, /* 6a: 0110 0000 0110 1010 */
- {NEA_C_A, 2, 8, 8,L0|L1}, /* 6b: 0110 0000 0110 1011 */
- {NEA_D_A, 2, 8, 8,L0|L1}, /* 6c: 0110 0000 0110 1100 */
- {NEA_E_A, 2, 8, 8,L0|L1}, /* 6d: 0110 0000 0110 1101 */
- {NEA_H_A, 2, 8, 8,L0|L1}, /* 6e: 0110 0000 0110 1110 */
- {NEA_L_A, 2, 8, 8,L0|L1}, /* 6f: 0110 0000 0110 1111 */
-
- {SBB_V_A, 2, 8, 8,L0|L1}, /* 70: 0110 0000 0111 0000 */
- {SBB_A_A, 2, 8, 8,L0|L1}, /* 71: 0110 0000 0111 0001 */
- {SBB_B_A, 2, 8, 8,L0|L1}, /* 72: 0110 0000 0111 0010 */
- {SBB_C_A, 2, 8, 8,L0|L1}, /* 73: 0110 0000 0111 0011 */
- {SBB_D_A, 2, 8, 8,L0|L1}, /* 74: 0110 0000 0111 0100 */
- {SBB_E_A, 2, 8, 8,L0|L1}, /* 75: 0110 0000 0111 0101 */
- {SBB_H_A, 2, 8, 8,L0|L1}, /* 76: 0110 0000 0111 0110 */
- {SBB_L_A, 2, 8, 8,L0|L1}, /* 77: 0110 0000 0111 0111 */
- {EQA_V_A, 2, 8, 8,L0|L1}, /* 78: 0110 0000 0111 1000 */
- {EQA_A_A, 2, 8, 8,L0|L1}, /* 79: 0110 0000 0111 1001 */
- {EQA_B_A, 2, 8, 8,L0|L1}, /* 7a: 0110 0000 0111 1010 */
- {EQA_C_A, 2, 8, 8,L0|L1}, /* 7b: 0110 0000 0111 1011 */
- {EQA_D_A, 2, 8, 8,L0|L1}, /* 7c: 0110 0000 0111 1100 */
- {EQA_E_A, 2, 8, 8,L0|L1}, /* 7d: 0110 0000 0111 1101 */
- {EQA_H_A, 2, 8, 8,L0|L1}, /* 7e: 0110 0000 0111 1110 */
- {EQA_L_A, 2, 8, 8,L0|L1}, /* 7f: 0110 0000 0111 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 80: 0110 0000 1000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 81: 0110 0000 1000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 82: 0110 0000 1000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 83: 0110 0000 1000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 84: 0110 0000 1000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 85: 0110 0000 1000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 86: 0110 0000 1000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 87: 0110 0000 1000 0111 */
- {ANA_A_V, 2, 8, 8,L0|L1}, /* 88: 0110 0000 1000 1000 */
- {ANA_A_A, 2, 8, 8,L0|L1}, /* 89: 0110 0000 1000 1001 */
- {ANA_A_B, 2, 8, 8,L0|L1}, /* 8a: 0110 0000 1000 1010 */
- {ANA_A_C, 2, 8, 8,L0|L1}, /* 8b: 0110 0000 1000 1011 */
- {ANA_A_D, 2, 8, 8,L0|L1}, /* 8c: 0110 0000 1000 1100 */
- {ANA_A_E, 2, 8, 8,L0|L1}, /* 8d: 0110 0000 1000 1101 */
- {ANA_A_H, 2, 8, 8,L0|L1}, /* 8e: 0110 0000 1000 1110 */
- {ANA_A_L, 2, 8, 8,L0|L1}, /* 8f: 0110 0000 1000 1111 */
-
- {XRA_A_V, 2, 8, 8,L0|L1}, /* 90: 0110 0000 1001 0000 */
- {XRA_A_A, 2, 8, 8,L0|L1}, /* 91: 0110 0000 1001 0001 */
- {XRA_A_B, 2, 8, 8,L0|L1}, /* 92: 0110 0000 1001 0010 */
- {XRA_A_C, 2, 8, 8,L0|L1}, /* 93: 0110 0000 1001 0011 */
- {XRA_A_D, 2, 8, 8,L0|L1}, /* 94: 0110 0000 1001 0100 */
- {XRA_A_E, 2, 8, 8,L0|L1}, /* 95: 0110 0000 1001 0101 */
- {XRA_A_H, 2, 8, 8,L0|L1}, /* 96: 0110 0000 1001 0110 */
- {XRA_A_L, 2, 8, 8,L0|L1}, /* 97: 0110 0000 1001 0111 */
- {ORA_A_V, 2, 8, 8,L0|L1}, /* 98: 0110 0000 1001 1000 */
- {ORA_A_A, 2, 8, 8,L0|L1}, /* 99: 0110 0000 1001 1001 */
- {ORA_A_B, 2, 8, 8,L0|L1}, /* 9a: 0110 0000 1001 1010 */
- {ORA_A_C, 2, 8, 8,L0|L1}, /* 9b: 0110 0000 1001 1011 */
- {ORA_A_D, 2, 8, 8,L0|L1}, /* 9c: 0110 0000 1001 1100 */
- {ORA_A_E, 2, 8, 8,L0|L1}, /* 9d: 0110 0000 1001 1101 */
- {ORA_A_H, 2, 8, 8,L0|L1}, /* 9e: 0110 0000 1001 1110 */
- {ORA_A_L, 2, 8, 8,L0|L1}, /* 9f: 0110 0000 1001 1111 */
-
- {ADDNC_A_V, 2, 8, 8,L0|L1}, /* a0: 0110 0000 1010 0000 */
- {ADDNC_A_A, 2, 8, 8,L0|L1}, /* a1: 0110 0000 1010 0001 */
- {ADDNC_A_B, 2, 8, 8,L0|L1}, /* a2: 0110 0000 1010 0010 */
- {ADDNC_A_C, 2, 8, 8,L0|L1}, /* a3: 0110 0000 1010 0011 */
- {ADDNC_A_D, 2, 8, 8,L0|L1}, /* a4: 0110 0000 1010 0100 */
- {ADDNC_A_E, 2, 8, 8,L0|L1}, /* a5: 0110 0000 1010 0101 */
- {ADDNC_A_H, 2, 8, 8,L0|L1}, /* a6: 0110 0000 1010 0110 */
- {ADDNC_A_L, 2, 8, 8,L0|L1}, /* a7: 0110 0000 1010 0111 */
- {GTA_A_V, 2, 8, 8,L0|L1}, /* a8: 0110 0000 1010 1000 */
- {GTA_A_A, 2, 8, 8,L0|L1}, /* a9: 0110 0000 1010 1001 */
- {GTA_A_B, 2, 8, 8,L0|L1}, /* aa: 0110 0000 1010 1010 */
- {GTA_A_C, 2, 8, 8,L0|L1}, /* ab: 0110 0000 1010 1011 */
- {GTA_A_D, 2, 8, 8,L0|L1}, /* ac: 0110 0000 1010 1100 */
- {GTA_A_E, 2, 8, 8,L0|L1}, /* ad: 0110 0000 1010 1101 */
- {GTA_A_H, 2, 8, 8,L0|L1}, /* ae: 0110 0000 1010 1110 */
- {GTA_A_L, 2, 8, 8,L0|L1}, /* af: 0110 0000 1010 1111 */
-
- {SUBNB_A_V, 2, 8, 8,L0|L1}, /* b0: 0110 0000 1011 0000 */
- {SUBNB_A_A, 2, 8, 8,L0|L1}, /* b1: 0110 0000 1011 0001 */
- {SUBNB_A_B, 2, 8, 8,L0|L1}, /* b2: 0110 0000 1011 0010 */
- {SUBNB_A_C, 2, 8, 8,L0|L1}, /* b3: 0110 0000 1011 0011 */
- {SUBNB_A_D, 2, 8, 8,L0|L1}, /* b4: 0110 0000 1011 0100 */
- {SUBNB_A_E, 2, 8, 8,L0|L1}, /* b5: 0110 0000 1011 0101 */
- {SUBNB_A_H, 2, 8, 8,L0|L1}, /* b6: 0110 0000 1011 0110 */
- {SUBNB_A_L, 2, 8, 8,L0|L1}, /* b7: 0110 0000 1011 0111 */
- {LTA_A_V, 2, 8, 8,L0|L1}, /* b8: 0110 0000 1011 1000 */
- {LTA_A_A, 2, 8, 8,L0|L1}, /* b9: 0110 0000 1011 1001 */
- {LTA_A_B, 2, 8, 8,L0|L1}, /* ba: 0110 0000 1011 1010 */
- {LTA_A_C, 2, 8, 8,L0|L1}, /* bb: 0110 0000 1011 1011 */
- {LTA_A_D, 2, 8, 8,L0|L1}, /* bc: 0110 0000 1011 1100 */
- {LTA_A_E, 2, 8, 8,L0|L1}, /* bd: 0110 0000 1011 1101 */
- {LTA_A_H, 2, 8, 8,L0|L1}, /* be: 0110 0000 1011 1110 */
- {LTA_A_L, 2, 8, 8,L0|L1}, /* bf: 0110 0000 1011 1111 */
-
- {ADD_A_V, 2, 8, 8,L0|L1}, /* c0: 0110 0000 1100 0000 */
- {ADD_A_A, 2, 8, 8,L0|L1}, /* c1: 0110 0000 1100 0001 */
- {ADD_A_B, 2, 8, 8,L0|L1}, /* c2: 0110 0000 1100 0010 */
- {ADD_A_C, 2, 8, 8,L0|L1}, /* c3: 0110 0000 1100 0011 */
- {ADD_A_D, 2, 8, 8,L0|L1}, /* c4: 0110 0000 1100 0100 */
- {ADD_A_E, 2, 8, 8,L0|L1}, /* c5: 0110 0000 1100 0101 */
- {ADD_A_H, 2, 8, 8,L0|L1}, /* c6: 0110 0000 1100 0110 */
- {ADD_A_L, 2, 8, 8,L0|L1}, /* c7: 0110 0000 1100 0111 */
- {ONA_A_V, 2, 8, 8,L0|L1}, /* c8: 0110 0000 1100 1000 */
- {ONA_A_A, 2, 8, 8,L0|L1}, /* c9: 0110 0000 1100 1001 */
- {ONA_A_B, 2, 8, 8,L0|L1}, /* ca: 0110 0000 1100 1010 */
- {ONA_A_C, 2, 8, 8,L0|L1}, /* cb: 0110 0000 1100 1011 */
- {ONA_A_D, 2, 8, 8,L0|L1}, /* cc: 0110 0000 1100 1100 */
- {ONA_A_E, 2, 8, 8,L0|L1}, /* cd: 0110 0000 1100 1101 */
- {ONA_A_H, 2, 8, 8,L0|L1}, /* ce: 0110 0000 1100 1110 */
- {ONA_A_L, 2, 8, 8,L0|L1}, /* cf: 0110 0000 1100 1111 */
-
- {ADC_A_V, 2, 8, 8,L0|L1}, /* d0: 0110 0000 1101 0000 */
- {ADC_A_A, 2, 8, 8,L0|L1}, /* d1: 0110 0000 1101 0001 */
- {ADC_A_B, 2, 8, 8,L0|L1}, /* d2: 0110 0000 1101 0010 */
- {ADC_A_C, 2, 8, 8,L0|L1}, /* d3: 0110 0000 1101 0011 */
- {ADC_A_D, 2, 8, 8,L0|L1}, /* d4: 0110 0000 1101 0100 */
- {ADC_A_E, 2, 8, 8,L0|L1}, /* d5: 0110 0000 1101 0101 */
- {ADC_A_H, 2, 8, 8,L0|L1}, /* d6: 0110 0000 1101 0110 */
- {ADC_A_L, 2, 8, 8,L0|L1}, /* d7: 0110 0000 1101 0111 */
- {OFFA_A_V, 2, 8, 8,L0|L1}, /* d8: 0110 0000 1101 1000 */
- {OFFA_A_A, 2, 8, 8,L0|L1}, /* d9: 0110 0000 1101 1001 */
- {OFFA_A_B, 2, 8, 8,L0|L1}, /* da: 0110 0000 1101 1010 */
- {OFFA_A_C, 2, 8, 8,L0|L1}, /* db: 0110 0000 1101 1011 */
- {OFFA_A_D, 2, 8, 8,L0|L1}, /* dc: 0110 0000 1101 1100 */
- {OFFA_A_E, 2, 8, 8,L0|L1}, /* dd: 0110 0000 1101 1101 */
- {OFFA_A_H, 2, 8, 8,L0|L1}, /* de: 0110 0000 1101 1110 */
- {OFFA_A_L, 2, 8, 8,L0|L1}, /* df: 0110 0000 1101 1111 */
-
- {SUB_A_V, 2, 8, 8,L0|L1}, /* e0: 0110 0000 1110 0000 */
- {SUB_A_A, 2, 8, 8,L0|L1}, /* e1: 0110 0000 1110 0001 */
- {SUB_A_B, 2, 8, 8,L0|L1}, /* e2: 0110 0000 1110 0010 */
- {SUB_A_C, 2, 8, 8,L0|L1}, /* e3: 0110 0000 1110 0011 */
- {SUB_A_D, 2, 8, 8,L0|L1}, /* e4: 0110 0000 1110 0100 */
- {SUB_A_E, 2, 8, 8,L0|L1}, /* e5: 0110 0000 1110 0101 */
- {SUB_A_H, 2, 8, 8,L0|L1}, /* e6: 0110 0000 1110 0110 */
- {SUB_A_L, 2, 8, 8,L0|L1}, /* e7: 0110 0000 1110 0111 */
- {NEA_A_V, 2, 8, 8,L0|L1}, /* e8: 0110 0000 1110 1000 */
- {NEA_A_A, 2, 8, 8,L0|L1}, /* e9: 0110 0000 1110 1001 */
- {NEA_A_B, 2, 8, 8,L0|L1}, /* ea: 0110 0000 1110 1010 */
- {NEA_A_C, 2, 8, 8,L0|L1}, /* eb: 0110 0000 1110 1011 */
- {NEA_A_D, 2, 8, 8,L0|L1}, /* ec: 0110 0000 1110 1100 */
- {NEA_A_E, 2, 8, 8,L0|L1}, /* ed: 0110 0000 1110 1101 */
- {NEA_A_H, 2, 8, 8,L0|L1}, /* ee: 0110 0000 1110 1110 */
- {NEA_A_L, 2, 8, 8,L0|L1}, /* ef: 0110 0000 1110 1111 */
-
- {SBB_A_V, 2, 8, 8,L0|L1}, /* f0: 0110 0000 1111 0000 */
- {SBB_A_A, 2, 8, 8,L0|L1}, /* f1: 0110 0000 1111 0001 */
- {SBB_A_B, 2, 8, 8,L0|L1}, /* f2: 0110 0000 1111 0010 */
- {SBB_A_C, 2, 8, 8,L0|L1}, /* f3: 0110 0000 1111 0011 */
- {SBB_A_D, 2, 8, 8,L0|L1}, /* f4: 0110 0000 1111 0100 */
- {SBB_A_E, 2, 8, 8,L0|L1}, /* f5: 0110 0000 1111 0101 */
- {SBB_A_H, 2, 8, 8,L0|L1}, /* f6: 0110 0000 1111 0110 */
- {SBB_A_L, 2, 8, 8,L0|L1}, /* f7: 0110 0000 1111 0111 */
- {EQA_A_V, 2, 8, 8,L0|L1}, /* f8: 0110 0000 1111 1000 */
- {EQA_A_A, 2, 8, 8,L0|L1}, /* f9: 0110 0000 1111 1001 */
- {EQA_A_B, 2, 8, 8,L0|L1}, /* fa: 0110 0000 1111 1010 */
- {EQA_A_C, 2, 8, 8,L0|L1}, /* fb: 0110 0000 1111 1011 */
- {EQA_A_D, 2, 8, 8,L0|L1}, /* fc: 0110 0000 1111 1100 */
- {EQA_A_E, 2, 8, 8,L0|L1}, /* fd: 0110 0000 1111 1101 */
- {EQA_A_H, 2, 8, 8,L0|L1}, /* fe: 0110 0000 1111 1110 */
- {EQA_A_L, 2, 8, 8,L0|L1} /* ff: 0110 0000 1111 1111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0110 0000 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0110 0000 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0110 0000 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0110 0000 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0110 0000 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0110 0000 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0110 0000 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0110 0000 0000 0111 */
+ {ANA_V_A, 2, 8, 8,L0|L1}, /* 08: 0110 0000 0000 1000 */
+ {ANA_A_A, 2, 8, 8,L0|L1}, /* 09: 0110 0000 0000 1001 */
+ {ANA_B_A, 2, 8, 8,L0|L1}, /* 0a: 0110 0000 0000 1010 */
+ {ANA_C_A, 2, 8, 8,L0|L1}, /* 0b: 0110 0000 0000 1011 */
+ {ANA_D_A, 2, 8, 8,L0|L1}, /* 0c: 0110 0000 0000 1100 */
+ {ANA_E_A, 2, 8, 8,L0|L1}, /* 0d: 0110 0000 0000 1101 */
+ {ANA_H_A, 2, 8, 8,L0|L1}, /* 0e: 0110 0000 0000 1110 */
+ {ANA_L_A, 2, 8, 8,L0|L1}, /* 0f: 0110 0000 0000 1111 */
+
+ {XRA_V_A, 2, 8, 8,L0|L1}, /* 10: 0110 0000 0001 0000 */
+ {XRA_A_A, 2, 8, 8,L0|L1}, /* 11: 0110 0000 0001 0001 */
+ {XRA_B_A, 2, 8, 8,L0|L1}, /* 12: 0110 0000 0001 0010 */
+ {XRA_C_A, 2, 8, 8,L0|L1}, /* 13: 0110 0000 0001 0011 */
+ {XRA_D_A, 2, 8, 8,L0|L1}, /* 14: 0110 0000 0001 0100 */
+ {XRA_E_A, 2, 8, 8,L0|L1}, /* 15: 0110 0000 0001 0101 */
+ {XRA_H_A, 2, 8, 8,L0|L1}, /* 16: 0110 0000 0001 0110 */
+ {XRA_L_A, 2, 8, 8,L0|L1}, /* 17: 0110 0000 0001 0111 */
+ {ORA_V_A, 2, 8, 8,L0|L1}, /* 18: 0110 0000 0001 1000 */
+ {ORA_A_A, 2, 8, 8,L0|L1}, /* 19: 0110 0000 0001 1001 */
+ {ORA_B_A, 2, 8, 8,L0|L1}, /* 1a: 0110 0000 0001 1010 */
+ {ORA_C_A, 2, 8, 8,L0|L1}, /* 1b: 0110 0000 0001 1011 */
+ {ORA_D_A, 2, 8, 8,L0|L1}, /* 1c: 0110 0000 0001 1100 */
+ {ORA_E_A, 2, 8, 8,L0|L1}, /* 1d: 0110 0000 0001 1101 */
+ {ORA_H_A, 2, 8, 8,L0|L1}, /* 1e: 0110 0000 0001 1110 */
+ {ORA_L_A, 2, 8, 8,L0|L1}, /* 1f: 0110 0000 0001 1111 */
+
+ {ADDNC_V_A, 2, 8, 8,L0|L1}, /* 20: 0110 0000 0010 0000 */
+ {ADDNC_A_A, 2, 8, 8,L0|L1}, /* 21: 0110 0000 0010 0001 */
+ {ADDNC_B_A, 2, 8, 8,L0|L1}, /* 22: 0110 0000 0010 0010 */
+ {ADDNC_C_A, 2, 8, 8,L0|L1}, /* 23: 0110 0000 0010 0011 */
+ {ADDNC_D_A, 2, 8, 8,L0|L1}, /* 24: 0110 0000 0010 0100 */
+ {ADDNC_E_A, 2, 8, 8,L0|L1}, /* 25: 0110 0000 0010 0101 */
+ {ADDNC_H_A, 2, 8, 8,L0|L1}, /* 26: 0110 0000 0010 0110 */
+ {ADDNC_L_A, 2, 8, 8,L0|L1}, /* 27: 0110 0000 0010 0111 */
+ {GTA_V_A, 2, 8, 8,L0|L1}, /* 28: 0110 0000 0010 1000 */
+ {GTA_A_A, 2, 8, 8,L0|L1}, /* 29: 0110 0000 0010 1001 */
+ {GTA_B_A, 2, 8, 8,L0|L1}, /* 2a: 0110 0000 0010 1010 */
+ {GTA_C_A, 2, 8, 8,L0|L1}, /* 2b: 0110 0000 0010 1011 */
+ {GTA_D_A, 2, 8, 8,L0|L1}, /* 2c: 0110 0000 0010 1100 */
+ {GTA_E_A, 2, 8, 8,L0|L1}, /* 2d: 0110 0000 0010 1101 */
+ {GTA_H_A, 2, 8, 8,L0|L1}, /* 2e: 0110 0000 0010 1110 */
+ {GTA_L_A, 2, 8, 8,L0|L1}, /* 2f: 0110 0000 0010 1111 */
+
+ {SUBNB_V_A, 2, 8, 8,L0|L1}, /* 30: 0110 0000 0011 0000 */
+ {SUBNB_A_A, 2, 8, 8,L0|L1}, /* 31: 0110 0000 0011 0001 */
+ {SUBNB_B_A, 2, 8, 8,L0|L1}, /* 32: 0110 0000 0011 0010 */
+ {SUBNB_C_A, 2, 8, 8,L0|L1}, /* 33: 0110 0000 0011 0011 */
+ {SUBNB_D_A, 2, 8, 8,L0|L1}, /* 34: 0110 0000 0011 0100 */
+ {SUBNB_E_A, 2, 8, 8,L0|L1}, /* 35: 0110 0000 0011 0101 */
+ {SUBNB_H_A, 2, 8, 8,L0|L1}, /* 36: 0110 0000 0011 0110 */
+ {SUBNB_L_A, 2, 8, 8,L0|L1}, /* 37: 0110 0000 0011 0111 */
+ {LTA_V_A, 2, 8, 8,L0|L1}, /* 38: 0110 0000 0011 1000 */
+ {LTA_A_A, 2, 8, 8,L0|L1}, /* 39: 0110 0000 0011 1001 */
+ {LTA_B_A, 2, 8, 8,L0|L1}, /* 3a: 0110 0000 0011 1010 */
+ {LTA_C_A, 2, 8, 8,L0|L1}, /* 3b: 0110 0000 0011 1011 */
+ {LTA_D_A, 2, 8, 8,L0|L1}, /* 3c: 0110 0000 0011 1100 */
+ {LTA_E_A, 2, 8, 8,L0|L1}, /* 3d: 0110 0000 0011 1101 */
+ {LTA_H_A, 2, 8, 8,L0|L1}, /* 3e: 0110 0000 0011 1110 */
+ {LTA_L_A, 2, 8, 8,L0|L1}, /* 3f: 0110 0000 0011 1111 */
+
+ {ADD_V_A, 2, 8, 8,L0|L1}, /* 40: 0110 0000 0100 0000 */
+ {ADD_A_A, 2, 8, 8,L0|L1}, /* 41: 0110 0000 0100 0001 */
+ {ADD_B_A, 2, 8, 8,L0|L1}, /* 42: 0110 0000 0100 0010 */
+ {ADD_C_A, 2, 8, 8,L0|L1}, /* 43: 0110 0000 0100 0011 */
+ {ADD_D_A, 2, 8, 8,L0|L1}, /* 44: 0110 0000 0100 0100 */
+ {ADD_E_A, 2, 8, 8,L0|L1}, /* 45: 0110 0000 0100 0101 */
+ {ADD_H_A, 2, 8, 8,L0|L1}, /* 46: 0110 0000 0100 0110 */
+ {ADD_L_A, 2, 8, 8,L0|L1}, /* 47: 0110 0000 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0110 0000 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0110 0000 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0110 0000 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0110 0000 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0110 0000 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0110 0000 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0110 0000 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0110 0000 0100 1111 */
+
+ {ADC_V_A, 2, 8, 8,L0|L1}, /* 50: 0110 0000 0101 0000 */
+ {ADC_A_A, 2, 8, 8,L0|L1}, /* 51: 0110 0000 0101 0001 */
+ {ADC_B_A, 2, 8, 8,L0|L1}, /* 52: 0110 0000 0101 0010 */
+ {ADC_C_A, 2, 8, 8,L0|L1}, /* 53: 0110 0000 0101 0011 */
+ {ADC_D_A, 2, 8, 8,L0|L1}, /* 54: 0110 0000 0101 0100 */
+ {ADC_E_A, 2, 8, 8,L0|L1}, /* 55: 0110 0000 0101 0101 */
+ {ADC_H_A, 2, 8, 8,L0|L1}, /* 56: 0110 0000 0101 0110 */
+ {ADC_L_A, 2, 8, 8,L0|L1}, /* 57: 0110 0000 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0110 0000 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0110 0000 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0110 0000 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0110 0000 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0110 0000 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0110 0000 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0110 0000 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0110 0000 0101 1111 */
+
+ {SUB_V_A, 2, 8, 8,L0|L1}, /* 60: 0110 0000 0110 0000 */
+ {SUB_A_A, 2, 8, 8,L0|L1}, /* 61: 0110 0000 0110 0001 */
+ {SUB_B_A, 2, 8, 8,L0|L1}, /* 62: 0110 0000 0110 0010 */
+ {SUB_C_A, 2, 8, 8,L0|L1}, /* 63: 0110 0000 0110 0011 */
+ {SUB_D_A, 2, 8, 8,L0|L1}, /* 64: 0110 0000 0110 0100 */
+ {SUB_E_A, 2, 8, 8,L0|L1}, /* 65: 0110 0000 0110 0101 */
+ {SUB_H_A, 2, 8, 8,L0|L1}, /* 66: 0110 0000 0110 0110 */
+ {SUB_L_A, 2, 8, 8,L0|L1}, /* 67: 0110 0000 0110 0111 */
+ {NEA_V_A, 2, 8, 8,L0|L1}, /* 68: 0110 0000 0110 1000 */
+ {NEA_A_A, 2, 8, 8,L0|L1}, /* 69: 0110 0000 0110 1001 */
+ {NEA_B_A, 2, 8, 8,L0|L1}, /* 6a: 0110 0000 0110 1010 */
+ {NEA_C_A, 2, 8, 8,L0|L1}, /* 6b: 0110 0000 0110 1011 */
+ {NEA_D_A, 2, 8, 8,L0|L1}, /* 6c: 0110 0000 0110 1100 */
+ {NEA_E_A, 2, 8, 8,L0|L1}, /* 6d: 0110 0000 0110 1101 */
+ {NEA_H_A, 2, 8, 8,L0|L1}, /* 6e: 0110 0000 0110 1110 */
+ {NEA_L_A, 2, 8, 8,L0|L1}, /* 6f: 0110 0000 0110 1111 */
+
+ {SBB_V_A, 2, 8, 8,L0|L1}, /* 70: 0110 0000 0111 0000 */
+ {SBB_A_A, 2, 8, 8,L0|L1}, /* 71: 0110 0000 0111 0001 */
+ {SBB_B_A, 2, 8, 8,L0|L1}, /* 72: 0110 0000 0111 0010 */
+ {SBB_C_A, 2, 8, 8,L0|L1}, /* 73: 0110 0000 0111 0011 */
+ {SBB_D_A, 2, 8, 8,L0|L1}, /* 74: 0110 0000 0111 0100 */
+ {SBB_E_A, 2, 8, 8,L0|L1}, /* 75: 0110 0000 0111 0101 */
+ {SBB_H_A, 2, 8, 8,L0|L1}, /* 76: 0110 0000 0111 0110 */
+ {SBB_L_A, 2, 8, 8,L0|L1}, /* 77: 0110 0000 0111 0111 */
+ {EQA_V_A, 2, 8, 8,L0|L1}, /* 78: 0110 0000 0111 1000 */
+ {EQA_A_A, 2, 8, 8,L0|L1}, /* 79: 0110 0000 0111 1001 */
+ {EQA_B_A, 2, 8, 8,L0|L1}, /* 7a: 0110 0000 0111 1010 */
+ {EQA_C_A, 2, 8, 8,L0|L1}, /* 7b: 0110 0000 0111 1011 */
+ {EQA_D_A, 2, 8, 8,L0|L1}, /* 7c: 0110 0000 0111 1100 */
+ {EQA_E_A, 2, 8, 8,L0|L1}, /* 7d: 0110 0000 0111 1101 */
+ {EQA_H_A, 2, 8, 8,L0|L1}, /* 7e: 0110 0000 0111 1110 */
+ {EQA_L_A, 2, 8, 8,L0|L1}, /* 7f: 0110 0000 0111 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0110 0000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0110 0000 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0110 0000 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0110 0000 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0110 0000 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0110 0000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0110 0000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0110 0000 1000 0111 */
+ {ANA_A_V, 2, 8, 8,L0|L1}, /* 88: 0110 0000 1000 1000 */
+ {ANA_A_A, 2, 8, 8,L0|L1}, /* 89: 0110 0000 1000 1001 */
+ {ANA_A_B, 2, 8, 8,L0|L1}, /* 8a: 0110 0000 1000 1010 */
+ {ANA_A_C, 2, 8, 8,L0|L1}, /* 8b: 0110 0000 1000 1011 */
+ {ANA_A_D, 2, 8, 8,L0|L1}, /* 8c: 0110 0000 1000 1100 */
+ {ANA_A_E, 2, 8, 8,L0|L1}, /* 8d: 0110 0000 1000 1101 */
+ {ANA_A_H, 2, 8, 8,L0|L1}, /* 8e: 0110 0000 1000 1110 */
+ {ANA_A_L, 2, 8, 8,L0|L1}, /* 8f: 0110 0000 1000 1111 */
+
+ {XRA_A_V, 2, 8, 8,L0|L1}, /* 90: 0110 0000 1001 0000 */
+ {XRA_A_A, 2, 8, 8,L0|L1}, /* 91: 0110 0000 1001 0001 */
+ {XRA_A_B, 2, 8, 8,L0|L1}, /* 92: 0110 0000 1001 0010 */
+ {XRA_A_C, 2, 8, 8,L0|L1}, /* 93: 0110 0000 1001 0011 */
+ {XRA_A_D, 2, 8, 8,L0|L1}, /* 94: 0110 0000 1001 0100 */
+ {XRA_A_E, 2, 8, 8,L0|L1}, /* 95: 0110 0000 1001 0101 */
+ {XRA_A_H, 2, 8, 8,L0|L1}, /* 96: 0110 0000 1001 0110 */
+ {XRA_A_L, 2, 8, 8,L0|L1}, /* 97: 0110 0000 1001 0111 */
+ {ORA_A_V, 2, 8, 8,L0|L1}, /* 98: 0110 0000 1001 1000 */
+ {ORA_A_A, 2, 8, 8,L0|L1}, /* 99: 0110 0000 1001 1001 */
+ {ORA_A_B, 2, 8, 8,L0|L1}, /* 9a: 0110 0000 1001 1010 */
+ {ORA_A_C, 2, 8, 8,L0|L1}, /* 9b: 0110 0000 1001 1011 */
+ {ORA_A_D, 2, 8, 8,L0|L1}, /* 9c: 0110 0000 1001 1100 */
+ {ORA_A_E, 2, 8, 8,L0|L1}, /* 9d: 0110 0000 1001 1101 */
+ {ORA_A_H, 2, 8, 8,L0|L1}, /* 9e: 0110 0000 1001 1110 */
+ {ORA_A_L, 2, 8, 8,L0|L1}, /* 9f: 0110 0000 1001 1111 */
+
+ {ADDNC_A_V, 2, 8, 8,L0|L1}, /* a0: 0110 0000 1010 0000 */
+ {ADDNC_A_A, 2, 8, 8,L0|L1}, /* a1: 0110 0000 1010 0001 */
+ {ADDNC_A_B, 2, 8, 8,L0|L1}, /* a2: 0110 0000 1010 0010 */
+ {ADDNC_A_C, 2, 8, 8,L0|L1}, /* a3: 0110 0000 1010 0011 */
+ {ADDNC_A_D, 2, 8, 8,L0|L1}, /* a4: 0110 0000 1010 0100 */
+ {ADDNC_A_E, 2, 8, 8,L0|L1}, /* a5: 0110 0000 1010 0101 */
+ {ADDNC_A_H, 2, 8, 8,L0|L1}, /* a6: 0110 0000 1010 0110 */
+ {ADDNC_A_L, 2, 8, 8,L0|L1}, /* a7: 0110 0000 1010 0111 */
+ {GTA_A_V, 2, 8, 8,L0|L1}, /* a8: 0110 0000 1010 1000 */
+ {GTA_A_A, 2, 8, 8,L0|L1}, /* a9: 0110 0000 1010 1001 */
+ {GTA_A_B, 2, 8, 8,L0|L1}, /* aa: 0110 0000 1010 1010 */
+ {GTA_A_C, 2, 8, 8,L0|L1}, /* ab: 0110 0000 1010 1011 */
+ {GTA_A_D, 2, 8, 8,L0|L1}, /* ac: 0110 0000 1010 1100 */
+ {GTA_A_E, 2, 8, 8,L0|L1}, /* ad: 0110 0000 1010 1101 */
+ {GTA_A_H, 2, 8, 8,L0|L1}, /* ae: 0110 0000 1010 1110 */
+ {GTA_A_L, 2, 8, 8,L0|L1}, /* af: 0110 0000 1010 1111 */
+
+ {SUBNB_A_V, 2, 8, 8,L0|L1}, /* b0: 0110 0000 1011 0000 */
+ {SUBNB_A_A, 2, 8, 8,L0|L1}, /* b1: 0110 0000 1011 0001 */
+ {SUBNB_A_B, 2, 8, 8,L0|L1}, /* b2: 0110 0000 1011 0010 */
+ {SUBNB_A_C, 2, 8, 8,L0|L1}, /* b3: 0110 0000 1011 0011 */
+ {SUBNB_A_D, 2, 8, 8,L0|L1}, /* b4: 0110 0000 1011 0100 */
+ {SUBNB_A_E, 2, 8, 8,L0|L1}, /* b5: 0110 0000 1011 0101 */
+ {SUBNB_A_H, 2, 8, 8,L0|L1}, /* b6: 0110 0000 1011 0110 */
+ {SUBNB_A_L, 2, 8, 8,L0|L1}, /* b7: 0110 0000 1011 0111 */
+ {LTA_A_V, 2, 8, 8,L0|L1}, /* b8: 0110 0000 1011 1000 */
+ {LTA_A_A, 2, 8, 8,L0|L1}, /* b9: 0110 0000 1011 1001 */
+ {LTA_A_B, 2, 8, 8,L0|L1}, /* ba: 0110 0000 1011 1010 */
+ {LTA_A_C, 2, 8, 8,L0|L1}, /* bb: 0110 0000 1011 1011 */
+ {LTA_A_D, 2, 8, 8,L0|L1}, /* bc: 0110 0000 1011 1100 */
+ {LTA_A_E, 2, 8, 8,L0|L1}, /* bd: 0110 0000 1011 1101 */
+ {LTA_A_H, 2, 8, 8,L0|L1}, /* be: 0110 0000 1011 1110 */
+ {LTA_A_L, 2, 8, 8,L0|L1}, /* bf: 0110 0000 1011 1111 */
+
+ {ADD_A_V, 2, 8, 8,L0|L1}, /* c0: 0110 0000 1100 0000 */
+ {ADD_A_A, 2, 8, 8,L0|L1}, /* c1: 0110 0000 1100 0001 */
+ {ADD_A_B, 2, 8, 8,L0|L1}, /* c2: 0110 0000 1100 0010 */
+ {ADD_A_C, 2, 8, 8,L0|L1}, /* c3: 0110 0000 1100 0011 */
+ {ADD_A_D, 2, 8, 8,L0|L1}, /* c4: 0110 0000 1100 0100 */
+ {ADD_A_E, 2, 8, 8,L0|L1}, /* c5: 0110 0000 1100 0101 */
+ {ADD_A_H, 2, 8, 8,L0|L1}, /* c6: 0110 0000 1100 0110 */
+ {ADD_A_L, 2, 8, 8,L0|L1}, /* c7: 0110 0000 1100 0111 */
+ {ONA_A_V, 2, 8, 8,L0|L1}, /* c8: 0110 0000 1100 1000 */
+ {ONA_A_A, 2, 8, 8,L0|L1}, /* c9: 0110 0000 1100 1001 */
+ {ONA_A_B, 2, 8, 8,L0|L1}, /* ca: 0110 0000 1100 1010 */
+ {ONA_A_C, 2, 8, 8,L0|L1}, /* cb: 0110 0000 1100 1011 */
+ {ONA_A_D, 2, 8, 8,L0|L1}, /* cc: 0110 0000 1100 1100 */
+ {ONA_A_E, 2, 8, 8,L0|L1}, /* cd: 0110 0000 1100 1101 */
+ {ONA_A_H, 2, 8, 8,L0|L1}, /* ce: 0110 0000 1100 1110 */
+ {ONA_A_L, 2, 8, 8,L0|L1}, /* cf: 0110 0000 1100 1111 */
+
+ {ADC_A_V, 2, 8, 8,L0|L1}, /* d0: 0110 0000 1101 0000 */
+ {ADC_A_A, 2, 8, 8,L0|L1}, /* d1: 0110 0000 1101 0001 */
+ {ADC_A_B, 2, 8, 8,L0|L1}, /* d2: 0110 0000 1101 0010 */
+ {ADC_A_C, 2, 8, 8,L0|L1}, /* d3: 0110 0000 1101 0011 */
+ {ADC_A_D, 2, 8, 8,L0|L1}, /* d4: 0110 0000 1101 0100 */
+ {ADC_A_E, 2, 8, 8,L0|L1}, /* d5: 0110 0000 1101 0101 */
+ {ADC_A_H, 2, 8, 8,L0|L1}, /* d6: 0110 0000 1101 0110 */
+ {ADC_A_L, 2, 8, 8,L0|L1}, /* d7: 0110 0000 1101 0111 */
+ {OFFA_A_V, 2, 8, 8,L0|L1}, /* d8: 0110 0000 1101 1000 */
+ {OFFA_A_A, 2, 8, 8,L0|L1}, /* d9: 0110 0000 1101 1001 */
+ {OFFA_A_B, 2, 8, 8,L0|L1}, /* da: 0110 0000 1101 1010 */
+ {OFFA_A_C, 2, 8, 8,L0|L1}, /* db: 0110 0000 1101 1011 */
+ {OFFA_A_D, 2, 8, 8,L0|L1}, /* dc: 0110 0000 1101 1100 */
+ {OFFA_A_E, 2, 8, 8,L0|L1}, /* dd: 0110 0000 1101 1101 */
+ {OFFA_A_H, 2, 8, 8,L0|L1}, /* de: 0110 0000 1101 1110 */
+ {OFFA_A_L, 2, 8, 8,L0|L1}, /* df: 0110 0000 1101 1111 */
+
+ {SUB_A_V, 2, 8, 8,L0|L1}, /* e0: 0110 0000 1110 0000 */
+ {SUB_A_A, 2, 8, 8,L0|L1}, /* e1: 0110 0000 1110 0001 */
+ {SUB_A_B, 2, 8, 8,L0|L1}, /* e2: 0110 0000 1110 0010 */
+ {SUB_A_C, 2, 8, 8,L0|L1}, /* e3: 0110 0000 1110 0011 */
+ {SUB_A_D, 2, 8, 8,L0|L1}, /* e4: 0110 0000 1110 0100 */
+ {SUB_A_E, 2, 8, 8,L0|L1}, /* e5: 0110 0000 1110 0101 */
+ {SUB_A_H, 2, 8, 8,L0|L1}, /* e6: 0110 0000 1110 0110 */
+ {SUB_A_L, 2, 8, 8,L0|L1}, /* e7: 0110 0000 1110 0111 */
+ {NEA_A_V, 2, 8, 8,L0|L1}, /* e8: 0110 0000 1110 1000 */
+ {NEA_A_A, 2, 8, 8,L0|L1}, /* e9: 0110 0000 1110 1001 */
+ {NEA_A_B, 2, 8, 8,L0|L1}, /* ea: 0110 0000 1110 1010 */
+ {NEA_A_C, 2, 8, 8,L0|L1}, /* eb: 0110 0000 1110 1011 */
+ {NEA_A_D, 2, 8, 8,L0|L1}, /* ec: 0110 0000 1110 1100 */
+ {NEA_A_E, 2, 8, 8,L0|L1}, /* ed: 0110 0000 1110 1101 */
+ {NEA_A_H, 2, 8, 8,L0|L1}, /* ee: 0110 0000 1110 1110 */
+ {NEA_A_L, 2, 8, 8,L0|L1}, /* ef: 0110 0000 1110 1111 */
+
+ {SBB_A_V, 2, 8, 8,L0|L1}, /* f0: 0110 0000 1111 0000 */
+ {SBB_A_A, 2, 8, 8,L0|L1}, /* f1: 0110 0000 1111 0001 */
+ {SBB_A_B, 2, 8, 8,L0|L1}, /* f2: 0110 0000 1111 0010 */
+ {SBB_A_C, 2, 8, 8,L0|L1}, /* f3: 0110 0000 1111 0011 */
+ {SBB_A_D, 2, 8, 8,L0|L1}, /* f4: 0110 0000 1111 0100 */
+ {SBB_A_E, 2, 8, 8,L0|L1}, /* f5: 0110 0000 1111 0101 */
+ {SBB_A_H, 2, 8, 8,L0|L1}, /* f6: 0110 0000 1111 0110 */
+ {SBB_A_L, 2, 8, 8,L0|L1}, /* f7: 0110 0000 1111 0111 */
+ {EQA_A_V, 2, 8, 8,L0|L1}, /* f8: 0110 0000 1111 1000 */
+ {EQA_A_A, 2, 8, 8,L0|L1}, /* f9: 0110 0000 1111 1001 */
+ {EQA_A_B, 2, 8, 8,L0|L1}, /* fa: 0110 0000 1111 1010 */
+ {EQA_A_C, 2, 8, 8,L0|L1}, /* fb: 0110 0000 1111 1011 */
+ {EQA_A_D, 2, 8, 8,L0|L1}, /* fc: 0110 0000 1111 1100 */
+ {EQA_A_E, 2, 8, 8,L0|L1}, /* fd: 0110 0000 1111 1101 */
+ {EQA_A_H, 2, 8, 8,L0|L1}, /* fe: 0110 0000 1111 1110 */
+ {EQA_A_L, 2, 8, 8,L0|L1} /* ff: 0110 0000 1111 1111 */
};
/* prefix 64 */
static const struct opcode_s op64[256] =
{
- {MVI_PA_xx, 3,14,11,L0|L1}, /* 00: 0110 0100 0000 0000 xxxx xxxx */
- {MVI_PB_xx, 3,14,11,L0|L1}, /* 01: 0110 0100 0000 0001 xxxx xxxx */
- {MVI_PC_xx, 3,14,11,L0|L1}, /* 02: 0110 0100 0000 0010 xxxx xxxx */
- {MVI_PD_xx, 3,14,11,L0|L1}, /* 03: 0110 0100 0000 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 04: 0110 0100 0000 0100 xxxx xxxx */
- {MVI_PF_xx, 3,14,11,L0|L1}, /* 05: 0110 0100 0000 0101 xxxx xxxx */
- {MVI_MKH_xx, 3,14,11,L0|L1}, /* 06: 0110 0100 0000 0110 xxxx xxxx */
- {MVI_MKL_xx, 3,14,11,L0|L1}, /* 07: 0110 0100 0000 0111 xxxx xxxx */
- {ANI_PA_xx, 3,20,11,L0|L1}, /* 08: 0110 0100 0000 1000 xxxx xxxx */
- {ANI_PB_xx, 3,20,11,L0|L1}, /* 09: 0110 0100 0000 1001 xxxx xxxx */
- {ANI_PC_xx, 3,20,11,L0|L1}, /* 0a: 0110 0100 0000 1010 xxxx xxxx */
- {ANI_PD_xx, 3,20,11,L0|L1}, /* 0b: 0110 0100 0000 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
- {ANI_PF_xx, 3,20,11,L0|L1}, /* 0d: 0110 0100 0000 1101 xxxx xxxx */
- {ANI_MKH_xx, 3,20,11,L0|L1}, /* 0e: 0110 0100 0000 1110 xxxx xxxx */
- {ANI_MKL_xx, 3,20,11,L0|L1}, /* 0f: 0110 0100 0000 1111 xxxx xxxx */
-
- {XRI_PA_xx, 3,20,11,L0|L1}, /* 10: 0110 0100 0001 0000 xxxx xxxx */
- {XRI_PB_xx, 3,20,11,L0|L1}, /* 11: 0110 0100 0001 0001 xxxx xxxx */
- {XRI_PC_xx, 3,20,11,L0|L1}, /* 12: 0110 0100 0001 0010 xxxx xxxx */
- {XRI_PD_xx, 3,20,11,L0|L1}, /* 13: 0110 0100 0001 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 14: 0110 0100 0001 0100 xxxx xxxx */
- {XRI_PF_xx, 3,20,11,L0|L1}, /* 15: 0110 0100 0001 0101 xxxx xxxx */
- {XRI_MKH_xx, 3,20,11,L0|L1}, /* 16: 0110 0100 0001 0110 xxxx xxxx */
- {XRI_MKL_xx, 3,20,11,L0|L1}, /* 17: 0110 0100 0001 0111 xxxx xxxx */
- {ORI_PA_xx, 3,20,11,L0|L1}, /* 18: 0110 0100 0001 1000 xxxx xxxx */
- {ORI_PB_xx, 3,20,11,L0|L1}, /* 19: 0110 0100 0001 1001 xxxx xxxx */
- {ORI_PC_xx, 3,20,11,L0|L1}, /* 1a: 0110 0100 0001 1010 xxxx xxxx */
- {ORI_PD_xx, 3,20,11,L0|L1}, /* 1b: 0110 0100 0001 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
- {ORI_PF_xx, 3,20,11,L0|L1}, /* 1d: 0110 0100 0001 1101 xxxx xxxx */
- {ORI_MKH_xx, 3,20,11,L0|L1}, /* 1e: 0110 0100 0001 1110 xxxx xxxx */
- {ORI_MKL_xx, 3,20,11,L0|L1}, /* 1f: 0110 0100 0001 1111 xxxx xxxx */
-
- {ADINC_PA_xx, 3,20,11,L0|L1}, /* 20: 0110 0100 0010 0000 xxxx xxxx */
- {ADINC_PB_xx, 3,20,11,L0|L1}, /* 21: 0110 0100 0010 0001 xxxx xxxx */
- {ADINC_PC_xx, 3,20,11,L0|L1}, /* 22: 0110 0100 0010 0010 xxxx xxxx */
- {ADINC_PD_xx, 3,20,11,L0|L1}, /* 23: 0110 0100 0010 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 24: 0110 0100 0010 0100 xxxx xxxx */
- {ADINC_PF_xx, 3,20,11,L0|L1}, /* 25: 0110 0100 0010 0101 xxxx xxxx */
- {ADINC_MKH_xx, 3,20,11,L0|L1}, /* 26: 0110 0100 0010 0110 xxxx xxxx */
- {ADINC_MKL_xx, 3,20,11,L0|L1}, /* 27: 0110 0100 0010 0111 xxxx xxxx */
- {GTI_PA_xx, 3,20,11,L0|L1}, /* 28: 0110 0100 0010 1000 xxxx xxxx */
- {GTI_PB_xx, 3,20,11,L0|L1}, /* 29: 0110 0100 0010 1001 xxxx xxxx */
- {GTI_PC_xx, 3,20,11,L0|L1}, /* 2a: 0110 0100 0010 1010 xxxx xxxx */
- {GTI_PD_xx, 3,20,11,L0|L1}, /* 2b: 0110 0100 0010 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
- {GTI_PF_xx, 3,20,11,L0|L1}, /* 2d: 0110 0100 0010 1101 xxxx xxxx */
- {GTI_MKH_xx, 3,20,11,L0|L1}, /* 2e: 0110 0100 0010 1110 xxxx xxxx */
- {GTI_MKL_xx, 3,20,11,L0|L1}, /* 2f: 0110 0100 0010 1111 xxxx xxxx */
-
- {SUINB_PA_xx, 3,20,11,L0|L1}, /* 30: 0110 0100 0011 0000 xxxx xxxx */
- {SUINB_PB_xx, 3,20,11,L0|L1}, /* 31: 0110 0100 0011 0001 xxxx xxxx */
- {SUINB_PC_xx, 3,20,11,L0|L1}, /* 32: 0110 0100 0011 0010 xxxx xxxx */
- {SUINB_PD_xx, 3,20,11,L0|L1}, /* 33: 0110 0100 0011 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 34: 0110 0100 0011 0100 xxxx xxxx */
- {SUINB_PF_xx, 3,20,11,L0|L1}, /* 35: 0110 0100 0011 0101 xxxx xxxx */
- {SUINB_MKH_xx, 3,20,11,L0|L1}, /* 36: 0110 0100 0011 0110 xxxx xxxx */
- {SUINB_MKL_xx, 3,20,11,L0|L1}, /* 37: 0110 0100 0011 0111 xxxx xxxx */
- {LTI_PA_xx, 3,20,11,L0|L1}, /* 38: 0110 0100 0011 1000 xxxx xxxx */
- {LTI_PB_xx, 3,20,11,L0|L1}, /* 39: 0110 0100 0011 1001 xxxx xxxx */
- {LTI_PC_xx, 3,20,11,L0|L1}, /* 3a: 0110 0100 0011 1010 xxxx xxxx */
- {LTI_PD_xx, 3,20,11,L0|L1}, /* 3b: 0110 0100 0011 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
- {LTI_PF_xx, 3,20,11,L0|L1}, /* 3d: 0110 0100 0011 1101 xxxx xxxx */
- {LTI_MKH_xx, 3,20,11,L0|L1}, /* 3e: 0110 0100 0011 1110 xxxx xxxx */
- {LTI_MKL_xx, 3,20,11,L0|L1}, /* 3f: 0110 0100 0011 1111 xxxx xxxx */
-
- {ADI_PA_xx, 3,20,11,L0|L1}, /* 40: 0110 0100 0100 0000 xxxx xxxx */
- {ADI_PB_xx, 3,20,11,L0|L1}, /* 41: 0110 0100 0100 0001 xxxx xxxx */
- {ADI_PC_xx, 3,20,11,L0|L1}, /* 42: 0110 0100 0100 0010 xxxx xxxx */
- {ADI_PD_xx, 3,20,11,L0|L1}, /* 43: 0110 0100 0100 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 44: 0110 0100 0100 0100 xxxx xxxx */
- {ADI_PF_xx, 3,20,11,L0|L1}, /* 45: 0110 0100 0100 0101 xxxx xxxx */
- {ADI_MKH_xx, 3,20,11,L0|L1}, /* 46: 0110 0100 0100 0110 xxxx xxxx */
- {ADI_MKL_xx, 3,20,11,L0|L1}, /* 47: 0110 0100 0100 0111 xxxx xxxx */
- {ONI_PA_xx, 3,20,11,L0|L1}, /* 48: 0110 0100 0100 1000 xxxx xxxx */
- {ONI_PB_xx, 3,20,11,L0|L1}, /* 49: 0110 0100 0100 1001 xxxx xxxx */
- {ONI_PC_xx, 3,20,11,L0|L1}, /* 4a: 0110 0100 0100 1010 xxxx xxxx */
- {ONI_PD_xx, 3,20,11,L0|L1}, /* 4b: 0110 0100 0100 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
- {ONI_PF_xx, 3,20,11,L0|L1}, /* 4d: 0110 0100 0100 1101 xxxx xxxx */
- {ONI_MKH_xx, 3,20,11,L0|L1}, /* 4e: 0110 0100 0100 1110 xxxx xxxx */
- {ONI_MKL_xx, 3,20,11,L0|L1}, /* 4f: 0110 0100 0100 1111 xxxx xxxx */
-
- {ACI_PA_xx, 3,20,11,L0|L1}, /* 50: 0110 0100 0101 0000 xxxx xxxx */
- {ACI_PB_xx, 3,20,11,L0|L1}, /* 51: 0110 0100 0101 0001 xxxx xxxx */
- {ACI_PC_xx, 3,20,11,L0|L1}, /* 52: 0110 0100 0101 0010 xxxx xxxx */
- {ACI_PD_xx, 3,20,11,L0|L1}, /* 53: 0110 0100 0101 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 54: 0110 0100 0101 0100 xxxx xxxx */
- {ACI_PF_xx, 3,20,11,L0|L1}, /* 55: 0110 0100 0101 0101 xxxx xxxx */
- {ACI_MKH_xx, 3,20,11,L0|L1}, /* 56: 0110 0100 0101 0110 xxxx xxxx */
- {ACI_MKL_xx, 3,20,11,L0|L1}, /* 57: 0110 0100 0101 0111 xxxx xxxx */
- {OFFI_PA_xx, 3,20,11,L0|L1}, /* 58: 0110 0100 0101 1000 xxxx xxxx */
- {OFFI_PB_xx, 3,20,11,L0|L1}, /* 59: 0110 0100 0101 1001 xxxx xxxx */
- {OFFI_PC_xx, 3,20,11,L0|L1}, /* 5a: 0110 0100 0101 1010 xxxx xxxx */
- {OFFI_PD_xx, 3,20,11,L0|L1}, /* 5b: 0110 0100 0101 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
- {OFFI_PF_xx, 3,20,11,L0|L1}, /* 5d: 0110 0100 0101 1101 xxxx xxxx */
- {OFFI_MKH_xx, 3,20,11,L0|L1}, /* 5e: 0110 0100 0101 1110 xxxx xxxx */
- {OFFI_MKL_xx, 3,20,11,L0|L1}, /* 5f: 0110 0100 0101 1111 xxxx xxxx */
-
- {SUI_PA_xx, 3,20,11,L0|L1}, /* 60: 0110 0100 0110 0000 xxxx xxxx */
- {SUI_PB_xx, 3,20,11,L0|L1}, /* 61: 0110 0100 0110 0001 xxxx xxxx */
- {SUI_PC_xx, 3,20,11,L0|L1}, /* 62: 0110 0100 0110 0010 xxxx xxxx */
- {SUI_PD_xx, 3,20,11,L0|L1}, /* 63: 0110 0100 0110 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 64: 0110 0100 0110 0100 xxxx xxxx */
- {SUI_PF_xx, 3,20,11,L0|L1}, /* 65: 0110 0100 0110 0101 xxxx xxxx */
- {SUI_MKH_xx, 3,20,11,L0|L1}, /* 66: 0110 0100 0110 0110 xxxx xxxx */
- {SUI_MKL_xx, 3,20,11,L0|L1}, /* 67: 0110 0100 0110 0111 xxxx xxxx */
- {NEI_PA_xx, 3,20,11,L0|L1}, /* 68: 0110 0100 0110 1000 xxxx xxxx */
- {NEI_PB_xx, 3,20,11,L0|L1}, /* 69: 0110 0100 0110 1001 xxxx xxxx */
- {NEI_PC_xx, 3,20,11,L0|L1}, /* 6a: 0110 0100 0110 1010 xxxx xxxx */
- {NEI_PD_xx, 3,20,11,L0|L1}, /* 6b: 0110 0100 0110 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
- {NEI_PF_xx, 3,20,11,L0|L1}, /* 6d: 0110 0100 0110 1101 xxxx xxxx */
- {NEI_MKH_xx, 3,20,11,L0|L1}, /* 6e: 0110 0100 0110 1110 xxxx xxxx */
- {NEI_MKL_xx, 3,20,11,L0|L1}, /* 6f: 0110 0100 0110 1111 xxxx xxxx */
-
- {SBI_PA_xx, 3,20,11,L0|L1}, /* 70: 0110 0100 0111 0000 xxxx xxxx */
- {SBI_PB_xx, 3,20,11,L0|L1}, /* 71: 0110 0100 0111 0001 xxxx xxxx */
- {SBI_PC_xx, 3,20,11,L0|L1}, /* 72: 0110 0100 0111 0010 xxxx xxxx */
- {SBI_PD_xx, 3,20,11,L0|L1}, /* 73: 0110 0100 0111 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 74: 0110 0100 0111 0100 xxxx xxxx */
- {SBI_PF_xx, 3,20,11,L0|L1}, /* 75: 0110 0100 0111 0101 xxxx xxxx */
- {SBI_MKH_xx, 3,20,11,L0|L1}, /* 76: 0110 0100 0111 0110 xxxx xxxx */
- {SBI_MKL_xx, 3,20,11,L0|L1}, /* 77: 0110 0100 0111 0111 xxxx xxxx */
- {EQI_PA_xx, 3,20,11,L0|L1}, /* 78: 0110 0100 0111 1000 xxxx xxxx */
- {EQI_PB_xx, 3,20,11,L0|L1}, /* 79: 0110 0100 0111 1001 xxxx xxxx */
- {EQI_PC_xx, 3,20,11,L0|L1}, /* 7a: 0110 0100 0111 1010 xxxx xxxx */
- {EQI_PD_xx, 3,20,11,L0|L1}, /* 7b: 0110 0100 0111 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
- {EQI_PF_xx, 3,20,11,L0|L1}, /* 7d: 0110 0100 0111 1101 xxxx xxxx */
- {EQI_MKH_xx, 3,20,11,L0|L1}, /* 7e: 0110 0100 0111 1110 xxxx xxxx */
- {EQI_MKL_xx, 3,20,11,L0|L1}, /* 7f: 0110 0100 0111 1111 xxxx xxxx */
-
- {MVI_ANM_xx, 3,14,11,L0|L1}, /* 80: 0110 0100 1000 0000 xxxx xxxx */
- {MVI_SMH_xx, 3,14,11,L0|L1}, /* 81: 0110 0100 1000 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 82: 0110 0100 1000 0010 xxxx xxxx */
- {MVI_EOM_xx, 3,14,11,L0|L1}, /* 83: 0110 0100 1000 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 84: 0110 0100 1000 0100 xxxx xxxx */
- {MVI_TMM_xx, 3,14,11,L0|L1}, /* 85: 0110 0100 1000 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 86: 0110 0100 1000 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 87: 0110 0100 1000 0111 xxxx xxxx */
- {ANI_ANM_xx, 3,20,11,L0|L1}, /* 88: 0110 0100 1000 1000 xxxx xxxx */
- {ANI_SMH_xx, 3,20,11,L0|L1}, /* 89: 0110 0100 1000 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
- {ANI_EOM_xx, 3,20,11,L0|L1}, /* 8b: 0110 0100 1000 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
- {ANI_TMM_xx, 3,20,11,L0|L1}, /* 8d: 0110 0100 1000 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
-
- {XRI_ANM_xx, 3,20,11,L0|L1}, /* 90: 0110 0100 1001 0000 xxxx xxxx */
- {XRI_SMH_xx, 3,20,11,L0|L1}, /* 91: 0110 0100 1001 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 92: 0110 0100 1001 0010 xxxx xxxx */
- {XRI_EOM_xx, 3,20,11,L0|L1}, /* 93: 0110 0100 1001 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 94: 0110 0100 1001 0100 xxxx xxxx */
- {XRI_TMM_xx, 3,20,11,L0|L1}, /* 95: 0110 0100 1001 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 96: 0110 0100 1001 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 97: 0110 0100 1001 0111 xxxx xxxx */
- {ORI_ANM_xx, 3,20,11,L0|L1}, /* 98: 0110 0100 1001 1000 xxxx xxxx */
- {ORI_SMH_xx, 3,20,11,L0|L1}, /* 99: 0110 0100 1001 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
- {ORI_EOM_xx, 3,20,11,L0|L1}, /* 9b: 0110 0100 1001 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
- {ORI_TMM_xx, 3,20,11,L0|L1}, /* 9d: 0110 0100 1001 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
-
- {ADINC_ANM_xx, 3,20,11,L0|L1}, /* a0: 0110 0100 1010 0000 xxxx xxxx */
- {ADINC_SMH_xx, 3,20,11,L0|L1}, /* a1: 0110 0100 1010 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* a2: 0110 0100 1010 0010 xxxx xxxx */
- {ADINC_EOM_xx, 3,20,11,L0|L1}, /* a3: 0110 0100 1010 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* a4: 0110 0100 1010 0100 xxxx xxxx */
- {ADINC_TMM_xx, 3,20,11,L0|L1}, /* a5: 0110 0100 1010 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* a6: 0110 0100 1010 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* a7: 0110 0100 1010 0111 xxxx xxxx */
- {GTI_ANM_xx, 3,20,11,L0|L1}, /* a8: 0110 0100 1010 1000 xxxx xxxx */
- {GTI_SMH_xx, 3,20,11,L0|L1}, /* a9: 0110 0100 1010 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* aa: 0110 0100 1010 1010 xxxx xxxx */
- {GTI_EOM_xx, 3,20,11,L0|L1}, /* ab: 0110 0100 1010 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ac: 0110 0100 1010 1100 xxxx xxxx */
- {GTI_TMM_xx, 3,20,11,L0|L1}, /* ad: 0110 0100 1010 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ae: 0110 0100 1010 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* af: 0110 0100 1010 1111 xxxx xxxx */
-
- {SUINB_ANM_xx, 3,20,11,L0|L1}, /* b0: 0110 0100 1011 0000 xxxx xxxx */
- {SUINB_SMH_xx, 3,20,11,L0|L1}, /* b1: 0110 0100 1011 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* b2: 0110 0100 1011 0010 xxxx xxxx */
- {SUINB_EOM_xx, 3,20,11,L0|L1}, /* b3: 0110 0100 1011 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* b4: 0110 0100 1011 0100 xxxx xxxx */
- {SUINB_TMM_xx, 3,20,11,L0|L1}, /* b5: 0110 0100 1011 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* b6: 0110 0100 1011 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* b7: 0110 0100 1011 0111 xxxx xxxx */
- {LTI_ANM_xx, 3,20,11,L0|L1}, /* b8: 0110 0100 1011 1000 xxxx xxxx */
- {LTI_SMH_xx, 3,20,11,L0|L1}, /* b9: 0110 0100 1011 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ba: 0110 0100 1011 1010 xxxx xxxx */
- {LTI_EOM_xx, 3,20,11,L0|L1}, /* bb: 0110 0100 1011 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* bc: 0110 0100 1011 1100 xxxx xxxx */
- {LTI_TMM_xx, 3,20,11,L0|L1}, /* bd: 0110 0100 1011 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* be: 0110 0100 1011 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* bf: 0110 0100 1011 1111 xxxx xxxx */
-
- {ADI_ANM_xx, 3,20,11,L0|L1}, /* c0: 0110 0100 1100 0000 xxxx xxxx */
- {ADI_SMH_xx, 3,20,11,L0|L1}, /* c1: 0110 0100 1100 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* c2: 0110 0100 1100 0010 xxxx xxxx */
- {ADI_EOM_xx, 3,20,11,L0|L1}, /* c3: 0110 0100 1100 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* c4: 0110 0100 1100 0100 xxxx xxxx */
- {ADI_TMM_xx, 3,20,11,L0|L1}, /* c5: 0110 0100 1100 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* c6: 0110 0100 1100 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* c7: 0110 0100 1100 0111 xxxx xxxx */
- {ONI_ANM_xx, 3,20,11,L0|L1}, /* c8: 0110 0100 1100 1000 xxxx xxxx */
- {ONI_SMH_xx, 3,20,11,L0|L1}, /* c9: 0110 0100 1100 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ca: 0110 0100 1100 1010 xxxx xxxx */
- {ONI_EOM_xx, 3,20,11,L0|L1}, /* cb: 0110 0100 1100 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* cc: 0110 0100 1100 1100 xxxx xxxx */
- {ONI_TMM_xx, 3,20,11,L0|L1}, /* cd: 0110 0100 1100 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ce: 0110 0100 1100 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* cf: 0110 0100 1100 1111 xxxx xxxx */
-
- {ACI_ANM_xx, 3,20,11,L0|L1}, /* d0: 0110 0100 1101 0000 xxxx xxxx */
- {ACI_SMH_xx, 3,20,11,L0|L1}, /* d1: 0110 0100 1101 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* d2: 0110 0100 1101 0010 xxxx xxxx */
- {ACI_EOM_xx, 3,20,11,L0|L1}, /* d3: 0110 0100 1101 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* d4: 0110 0100 1101 0100 xxxx xxxx */
- {ACI_TMM_xx, 3,20,11,L0|L1}, /* d5: 0110 0100 1101 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* d6: 0110 0100 1101 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* d7: 0110 0100 1101 0111 xxxx xxxx */
- {OFFI_ANM_xx, 3,20,11,L0|L1}, /* d8: 0110 0100 1101 1000 xxxx xxxx */
- {OFFI_SMH_xx, 3,20,11,L0|L1}, /* d9: 0110 0100 1101 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* da: 0110 0100 1101 1010 xxxx xxxx */
- {OFFI_EOM_xx, 3,20,11,L0|L1}, /* db: 0110 0100 1101 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* dc: 0110 0100 1101 1100 xxxx xxxx */
- {OFFI_TMM_xx, 3,20,11,L0|L1}, /* dd: 0110 0100 1101 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* de: 0110 0100 1101 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* df: 0110 0100 1101 1111 xxxx xxxx */
-
- {SUI_ANM_xx, 3,20,11,L0|L1}, /* e0: 0110 0100 1110 0000 xxxx xxxx */
- {SUI_SMH_xx, 3,20,11,L0|L1}, /* e1: 0110 0100 1110 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* e2: 0110 0100 1110 0010 xxxx xxxx */
- {SUI_EOM_xx, 3,20,11,L0|L1}, /* e3: 0110 0100 1110 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* e4: 0110 0100 1110 0100 xxxx xxxx */
- {SUI_TMM_xx, 3,20,11,L0|L1}, /* e5: 0110 0100 1110 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* e6: 0110 0100 1110 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* e7: 0110 0100 1110 0111 xxxx xxxx */
- {NEI_ANM_xx, 3,20,11,L0|L1}, /* e8: 0110 0100 1110 1000 xxxx xxxx */
- {NEI_SMH_xx, 3,20,11,L0|L1}, /* e9: 0110 0100 1110 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ea: 0110 0100 1110 1010 xxxx xxxx */
- {NEI_EOM_xx, 3,20,11,L0|L1}, /* eb: 0110 0100 1110 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ec: 0110 0100 1110 1100 xxxx xxxx */
- {NEI_TMM_xx, 3,20,11,L0|L1}, /* ed: 0110 0100 1110 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ee: 0110 0100 1110 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* ef: 0110 0100 1110 1111 xxxx xxxx */
-
- {SBI_ANM_xx, 3,20,11,L0|L1}, /* f0: 0110 0100 1111 0000 xxxx xxxx */
- {SBI_SMH_xx, 3,20,11,L0|L1}, /* f1: 0110 0100 1111 0001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* f2: 0110 0100 1111 0010 xxxx xxxx */
- {SBI_EOM_xx, 3,20,11,L0|L1}, /* f3: 0110 0100 1111 0011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* f4: 0110 0100 1111 0100 xxxx xxxx */
- {SBI_TMM_xx, 3,20,11,L0|L1}, /* f5: 0110 0100 1111 0101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* f6: 0110 0100 1111 0110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* f7: 0110 0100 1111 0111 xxxx xxxx */
- {EQI_ANM_xx, 3,20,11,L0|L1}, /* f8: 0110 0100 1111 1000 xxxx xxxx */
- {EQI_SMH_xx, 3,20,11,L0|L1}, /* f9: 0110 0100 1111 1001 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* fa: 0110 0100 1111 1010 xxxx xxxx */
- {EQI_EOM_xx, 3,20,11,L0|L1}, /* fb: 0110 0100 1111 1011 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* fc: 0110 0100 1111 1100 xxxx xxxx */
- {EQI_TMM_xx, 3,20,11,L0|L1}, /* fd: 0110 0100 1111 1101 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1}, /* fe: 0110 0100 1111 1110 xxxx xxxx */
- {illegal2, 3,11,11,L0|L1} /* ff: 0110 0100 1111 1111 xxxx xxxx */
+ {MVI_PA_xx, 3,14,11,L0|L1}, /* 00: 0110 0100 0000 0000 xxxx xxxx */
+ {MVI_PB_xx, 3,14,11,L0|L1}, /* 01: 0110 0100 0000 0001 xxxx xxxx */
+ {MVI_PC_xx, 3,14,11,L0|L1}, /* 02: 0110 0100 0000 0010 xxxx xxxx */
+ {MVI_PD_xx, 3,14,11,L0|L1}, /* 03: 0110 0100 0000 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 04: 0110 0100 0000 0100 xxxx xxxx */
+ {MVI_PF_xx, 3,14,11,L0|L1}, /* 05: 0110 0100 0000 0101 xxxx xxxx */
+ {MVI_MKH_xx, 3,14,11,L0|L1}, /* 06: 0110 0100 0000 0110 xxxx xxxx */
+ {MVI_MKL_xx, 3,14,11,L0|L1}, /* 07: 0110 0100 0000 0111 xxxx xxxx */
+ {ANI_PA_xx, 3,20,11,L0|L1}, /* 08: 0110 0100 0000 1000 xxxx xxxx */
+ {ANI_PB_xx, 3,20,11,L0|L1}, /* 09: 0110 0100 0000 1001 xxxx xxxx */
+ {ANI_PC_xx, 3,20,11,L0|L1}, /* 0a: 0110 0100 0000 1010 xxxx xxxx */
+ {ANI_PD_xx, 3,20,11,L0|L1}, /* 0b: 0110 0100 0000 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 0c: 0110 0100 0000 1100 xxxx xxxx */
+ {ANI_PF_xx, 3,20,11,L0|L1}, /* 0d: 0110 0100 0000 1101 xxxx xxxx */
+ {ANI_MKH_xx, 3,20,11,L0|L1}, /* 0e: 0110 0100 0000 1110 xxxx xxxx */
+ {ANI_MKL_xx, 3,20,11,L0|L1}, /* 0f: 0110 0100 0000 1111 xxxx xxxx */
+
+ {XRI_PA_xx, 3,20,11,L0|L1}, /* 10: 0110 0100 0001 0000 xxxx xxxx */
+ {XRI_PB_xx, 3,20,11,L0|L1}, /* 11: 0110 0100 0001 0001 xxxx xxxx */
+ {XRI_PC_xx, 3,20,11,L0|L1}, /* 12: 0110 0100 0001 0010 xxxx xxxx */
+ {XRI_PD_xx, 3,20,11,L0|L1}, /* 13: 0110 0100 0001 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 14: 0110 0100 0001 0100 xxxx xxxx */
+ {XRI_PF_xx, 3,20,11,L0|L1}, /* 15: 0110 0100 0001 0101 xxxx xxxx */
+ {XRI_MKH_xx, 3,20,11,L0|L1}, /* 16: 0110 0100 0001 0110 xxxx xxxx */
+ {XRI_MKL_xx, 3,20,11,L0|L1}, /* 17: 0110 0100 0001 0111 xxxx xxxx */
+ {ORI_PA_xx, 3,20,11,L0|L1}, /* 18: 0110 0100 0001 1000 xxxx xxxx */
+ {ORI_PB_xx, 3,20,11,L0|L1}, /* 19: 0110 0100 0001 1001 xxxx xxxx */
+ {ORI_PC_xx, 3,20,11,L0|L1}, /* 1a: 0110 0100 0001 1010 xxxx xxxx */
+ {ORI_PD_xx, 3,20,11,L0|L1}, /* 1b: 0110 0100 0001 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 1c: 0110 0100 0001 1100 xxxx xxxx */
+ {ORI_PF_xx, 3,20,11,L0|L1}, /* 1d: 0110 0100 0001 1101 xxxx xxxx */
+ {ORI_MKH_xx, 3,20,11,L0|L1}, /* 1e: 0110 0100 0001 1110 xxxx xxxx */
+ {ORI_MKL_xx, 3,20,11,L0|L1}, /* 1f: 0110 0100 0001 1111 xxxx xxxx */
+
+ {ADINC_PA_xx, 3,20,11,L0|L1}, /* 20: 0110 0100 0010 0000 xxxx xxxx */
+ {ADINC_PB_xx, 3,20,11,L0|L1}, /* 21: 0110 0100 0010 0001 xxxx xxxx */
+ {ADINC_PC_xx, 3,20,11,L0|L1}, /* 22: 0110 0100 0010 0010 xxxx xxxx */
+ {ADINC_PD_xx, 3,20,11,L0|L1}, /* 23: 0110 0100 0010 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 24: 0110 0100 0010 0100 xxxx xxxx */
+ {ADINC_PF_xx, 3,20,11,L0|L1}, /* 25: 0110 0100 0010 0101 xxxx xxxx */
+ {ADINC_MKH_xx, 3,20,11,L0|L1}, /* 26: 0110 0100 0010 0110 xxxx xxxx */
+ {ADINC_MKL_xx, 3,20,11,L0|L1}, /* 27: 0110 0100 0010 0111 xxxx xxxx */
+ {GTI_PA_xx, 3,20,11,L0|L1}, /* 28: 0110 0100 0010 1000 xxxx xxxx */
+ {GTI_PB_xx, 3,20,11,L0|L1}, /* 29: 0110 0100 0010 1001 xxxx xxxx */
+ {GTI_PC_xx, 3,20,11,L0|L1}, /* 2a: 0110 0100 0010 1010 xxxx xxxx */
+ {GTI_PD_xx, 3,20,11,L0|L1}, /* 2b: 0110 0100 0010 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 2c: 0110 0100 0010 1100 xxxx xxxx */
+ {GTI_PF_xx, 3,20,11,L0|L1}, /* 2d: 0110 0100 0010 1101 xxxx xxxx */
+ {GTI_MKH_xx, 3,20,11,L0|L1}, /* 2e: 0110 0100 0010 1110 xxxx xxxx */
+ {GTI_MKL_xx, 3,20,11,L0|L1}, /* 2f: 0110 0100 0010 1111 xxxx xxxx */
+
+ {SUINB_PA_xx, 3,20,11,L0|L1}, /* 30: 0110 0100 0011 0000 xxxx xxxx */
+ {SUINB_PB_xx, 3,20,11,L0|L1}, /* 31: 0110 0100 0011 0001 xxxx xxxx */
+ {SUINB_PC_xx, 3,20,11,L0|L1}, /* 32: 0110 0100 0011 0010 xxxx xxxx */
+ {SUINB_PD_xx, 3,20,11,L0|L1}, /* 33: 0110 0100 0011 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 34: 0110 0100 0011 0100 xxxx xxxx */
+ {SUINB_PF_xx, 3,20,11,L0|L1}, /* 35: 0110 0100 0011 0101 xxxx xxxx */
+ {SUINB_MKH_xx, 3,20,11,L0|L1}, /* 36: 0110 0100 0011 0110 xxxx xxxx */
+ {SUINB_MKL_xx, 3,20,11,L0|L1}, /* 37: 0110 0100 0011 0111 xxxx xxxx */
+ {LTI_PA_xx, 3,20,11,L0|L1}, /* 38: 0110 0100 0011 1000 xxxx xxxx */
+ {LTI_PB_xx, 3,20,11,L0|L1}, /* 39: 0110 0100 0011 1001 xxxx xxxx */
+ {LTI_PC_xx, 3,20,11,L0|L1}, /* 3a: 0110 0100 0011 1010 xxxx xxxx */
+ {LTI_PD_xx, 3,20,11,L0|L1}, /* 3b: 0110 0100 0011 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 3c: 0110 0100 0011 1100 xxxx xxxx */
+ {LTI_PF_xx, 3,20,11,L0|L1}, /* 3d: 0110 0100 0011 1101 xxxx xxxx */
+ {LTI_MKH_xx, 3,20,11,L0|L1}, /* 3e: 0110 0100 0011 1110 xxxx xxxx */
+ {LTI_MKL_xx, 3,20,11,L0|L1}, /* 3f: 0110 0100 0011 1111 xxxx xxxx */
+
+ {ADI_PA_xx, 3,20,11,L0|L1}, /* 40: 0110 0100 0100 0000 xxxx xxxx */
+ {ADI_PB_xx, 3,20,11,L0|L1}, /* 41: 0110 0100 0100 0001 xxxx xxxx */
+ {ADI_PC_xx, 3,20,11,L0|L1}, /* 42: 0110 0100 0100 0010 xxxx xxxx */
+ {ADI_PD_xx, 3,20,11,L0|L1}, /* 43: 0110 0100 0100 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 44: 0110 0100 0100 0100 xxxx xxxx */
+ {ADI_PF_xx, 3,20,11,L0|L1}, /* 45: 0110 0100 0100 0101 xxxx xxxx */
+ {ADI_MKH_xx, 3,20,11,L0|L1}, /* 46: 0110 0100 0100 0110 xxxx xxxx */
+ {ADI_MKL_xx, 3,20,11,L0|L1}, /* 47: 0110 0100 0100 0111 xxxx xxxx */
+ {ONI_PA_xx, 3,20,11,L0|L1}, /* 48: 0110 0100 0100 1000 xxxx xxxx */
+ {ONI_PB_xx, 3,20,11,L0|L1}, /* 49: 0110 0100 0100 1001 xxxx xxxx */
+ {ONI_PC_xx, 3,20,11,L0|L1}, /* 4a: 0110 0100 0100 1010 xxxx xxxx */
+ {ONI_PD_xx, 3,20,11,L0|L1}, /* 4b: 0110 0100 0100 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 4c: 0110 0100 0100 1100 xxxx xxxx */
+ {ONI_PF_xx, 3,20,11,L0|L1}, /* 4d: 0110 0100 0100 1101 xxxx xxxx */
+ {ONI_MKH_xx, 3,20,11,L0|L1}, /* 4e: 0110 0100 0100 1110 xxxx xxxx */
+ {ONI_MKL_xx, 3,20,11,L0|L1}, /* 4f: 0110 0100 0100 1111 xxxx xxxx */
+
+ {ACI_PA_xx, 3,20,11,L0|L1}, /* 50: 0110 0100 0101 0000 xxxx xxxx */
+ {ACI_PB_xx, 3,20,11,L0|L1}, /* 51: 0110 0100 0101 0001 xxxx xxxx */
+ {ACI_PC_xx, 3,20,11,L0|L1}, /* 52: 0110 0100 0101 0010 xxxx xxxx */
+ {ACI_PD_xx, 3,20,11,L0|L1}, /* 53: 0110 0100 0101 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 54: 0110 0100 0101 0100 xxxx xxxx */
+ {ACI_PF_xx, 3,20,11,L0|L1}, /* 55: 0110 0100 0101 0101 xxxx xxxx */
+ {ACI_MKH_xx, 3,20,11,L0|L1}, /* 56: 0110 0100 0101 0110 xxxx xxxx */
+ {ACI_MKL_xx, 3,20,11,L0|L1}, /* 57: 0110 0100 0101 0111 xxxx xxxx */
+ {OFFI_PA_xx, 3,20,11,L0|L1}, /* 58: 0110 0100 0101 1000 xxxx xxxx */
+ {OFFI_PB_xx, 3,20,11,L0|L1}, /* 59: 0110 0100 0101 1001 xxxx xxxx */
+ {OFFI_PC_xx, 3,20,11,L0|L1}, /* 5a: 0110 0100 0101 1010 xxxx xxxx */
+ {OFFI_PD_xx, 3,20,11,L0|L1}, /* 5b: 0110 0100 0101 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 5c: 0110 0100 0101 1100 xxxx xxxx */
+ {OFFI_PF_xx, 3,20,11,L0|L1}, /* 5d: 0110 0100 0101 1101 xxxx xxxx */
+ {OFFI_MKH_xx, 3,20,11,L0|L1}, /* 5e: 0110 0100 0101 1110 xxxx xxxx */
+ {OFFI_MKL_xx, 3,20,11,L0|L1}, /* 5f: 0110 0100 0101 1111 xxxx xxxx */
+
+ {SUI_PA_xx, 3,20,11,L0|L1}, /* 60: 0110 0100 0110 0000 xxxx xxxx */
+ {SUI_PB_xx, 3,20,11,L0|L1}, /* 61: 0110 0100 0110 0001 xxxx xxxx */
+ {SUI_PC_xx, 3,20,11,L0|L1}, /* 62: 0110 0100 0110 0010 xxxx xxxx */
+ {SUI_PD_xx, 3,20,11,L0|L1}, /* 63: 0110 0100 0110 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 64: 0110 0100 0110 0100 xxxx xxxx */
+ {SUI_PF_xx, 3,20,11,L0|L1}, /* 65: 0110 0100 0110 0101 xxxx xxxx */
+ {SUI_MKH_xx, 3,20,11,L0|L1}, /* 66: 0110 0100 0110 0110 xxxx xxxx */
+ {SUI_MKL_xx, 3,20,11,L0|L1}, /* 67: 0110 0100 0110 0111 xxxx xxxx */
+ {NEI_PA_xx, 3,20,11,L0|L1}, /* 68: 0110 0100 0110 1000 xxxx xxxx */
+ {NEI_PB_xx, 3,20,11,L0|L1}, /* 69: 0110 0100 0110 1001 xxxx xxxx */
+ {NEI_PC_xx, 3,20,11,L0|L1}, /* 6a: 0110 0100 0110 1010 xxxx xxxx */
+ {NEI_PD_xx, 3,20,11,L0|L1}, /* 6b: 0110 0100 0110 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 6c: 0110 0100 0110 1100 xxxx xxxx */
+ {NEI_PF_xx, 3,20,11,L0|L1}, /* 6d: 0110 0100 0110 1101 xxxx xxxx */
+ {NEI_MKH_xx, 3,20,11,L0|L1}, /* 6e: 0110 0100 0110 1110 xxxx xxxx */
+ {NEI_MKL_xx, 3,20,11,L0|L1}, /* 6f: 0110 0100 0110 1111 xxxx xxxx */
+
+ {SBI_PA_xx, 3,20,11,L0|L1}, /* 70: 0110 0100 0111 0000 xxxx xxxx */
+ {SBI_PB_xx, 3,20,11,L0|L1}, /* 71: 0110 0100 0111 0001 xxxx xxxx */
+ {SBI_PC_xx, 3,20,11,L0|L1}, /* 72: 0110 0100 0111 0010 xxxx xxxx */
+ {SBI_PD_xx, 3,20,11,L0|L1}, /* 73: 0110 0100 0111 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 74: 0110 0100 0111 0100 xxxx xxxx */
+ {SBI_PF_xx, 3,20,11,L0|L1}, /* 75: 0110 0100 0111 0101 xxxx xxxx */
+ {SBI_MKH_xx, 3,20,11,L0|L1}, /* 76: 0110 0100 0111 0110 xxxx xxxx */
+ {SBI_MKL_xx, 3,20,11,L0|L1}, /* 77: 0110 0100 0111 0111 xxxx xxxx */
+ {EQI_PA_xx, 3,20,11,L0|L1}, /* 78: 0110 0100 0111 1000 xxxx xxxx */
+ {EQI_PB_xx, 3,20,11,L0|L1}, /* 79: 0110 0100 0111 1001 xxxx xxxx */
+ {EQI_PC_xx, 3,20,11,L0|L1}, /* 7a: 0110 0100 0111 1010 xxxx xxxx */
+ {EQI_PD_xx, 3,20,11,L0|L1}, /* 7b: 0110 0100 0111 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 7c: 0110 0100 0111 1100 xxxx xxxx */
+ {EQI_PF_xx, 3,20,11,L0|L1}, /* 7d: 0110 0100 0111 1101 xxxx xxxx */
+ {EQI_MKH_xx, 3,20,11,L0|L1}, /* 7e: 0110 0100 0111 1110 xxxx xxxx */
+ {EQI_MKL_xx, 3,20,11,L0|L1}, /* 7f: 0110 0100 0111 1111 xxxx xxxx */
+
+ {MVI_ANM_xx, 3,14,11,L0|L1}, /* 80: 0110 0100 1000 0000 xxxx xxxx */
+ {MVI_SMH_xx, 3,14,11,L0|L1}, /* 81: 0110 0100 1000 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 82: 0110 0100 1000 0010 xxxx xxxx */
+ {MVI_EOM_xx, 3,14,11,L0|L1}, /* 83: 0110 0100 1000 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 84: 0110 0100 1000 0100 xxxx xxxx */
+ {MVI_TMM_xx, 3,14,11,L0|L1}, /* 85: 0110 0100 1000 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 86: 0110 0100 1000 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 87: 0110 0100 1000 0111 xxxx xxxx */
+ {ANI_ANM_xx, 3,20,11,L0|L1}, /* 88: 0110 0100 1000 1000 xxxx xxxx */
+ {ANI_SMH_xx, 3,20,11,L0|L1}, /* 89: 0110 0100 1000 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8a: 0110 0100 1000 1010 xxxx xxxx */
+ {ANI_EOM_xx, 3,20,11,L0|L1}, /* 8b: 0110 0100 1000 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8c: 0110 0100 1000 1100 xxxx xxxx */
+ {ANI_TMM_xx, 3,20,11,L0|L1}, /* 8d: 0110 0100 1000 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8e: 0110 0100 1000 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 8f: 0110 0100 1000 1111 xxxx xxxx */
+
+ {XRI_ANM_xx, 3,20,11,L0|L1}, /* 90: 0110 0100 1001 0000 xxxx xxxx */
+ {XRI_SMH_xx, 3,20,11,L0|L1}, /* 91: 0110 0100 1001 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 92: 0110 0100 1001 0010 xxxx xxxx */
+ {XRI_EOM_xx, 3,20,11,L0|L1}, /* 93: 0110 0100 1001 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 94: 0110 0100 1001 0100 xxxx xxxx */
+ {XRI_TMM_xx, 3,20,11,L0|L1}, /* 95: 0110 0100 1001 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 96: 0110 0100 1001 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 97: 0110 0100 1001 0111 xxxx xxxx */
+ {ORI_ANM_xx, 3,20,11,L0|L1}, /* 98: 0110 0100 1001 1000 xxxx xxxx */
+ {ORI_SMH_xx, 3,20,11,L0|L1}, /* 99: 0110 0100 1001 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9a: 0110 0100 1001 1010 xxxx xxxx */
+ {ORI_EOM_xx, 3,20,11,L0|L1}, /* 9b: 0110 0100 1001 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9c: 0110 0100 1001 1100 xxxx xxxx */
+ {ORI_TMM_xx, 3,20,11,L0|L1}, /* 9d: 0110 0100 1001 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9e: 0110 0100 1001 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* 9f: 0110 0100 1001 1111 xxxx xxxx */
+
+ {ADINC_ANM_xx, 3,20,11,L0|L1}, /* a0: 0110 0100 1010 0000 xxxx xxxx */
+ {ADINC_SMH_xx, 3,20,11,L0|L1}, /* a1: 0110 0100 1010 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a2: 0110 0100 1010 0010 xxxx xxxx */
+ {ADINC_EOM_xx, 3,20,11,L0|L1}, /* a3: 0110 0100 1010 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a4: 0110 0100 1010 0100 xxxx xxxx */
+ {ADINC_TMM_xx, 3,20,11,L0|L1}, /* a5: 0110 0100 1010 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a6: 0110 0100 1010 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* a7: 0110 0100 1010 0111 xxxx xxxx */
+ {GTI_ANM_xx, 3,20,11,L0|L1}, /* a8: 0110 0100 1010 1000 xxxx xxxx */
+ {GTI_SMH_xx, 3,20,11,L0|L1}, /* a9: 0110 0100 1010 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* aa: 0110 0100 1010 1010 xxxx xxxx */
+ {GTI_EOM_xx, 3,20,11,L0|L1}, /* ab: 0110 0100 1010 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ac: 0110 0100 1010 1100 xxxx xxxx */
+ {GTI_TMM_xx, 3,20,11,L0|L1}, /* ad: 0110 0100 1010 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ae: 0110 0100 1010 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* af: 0110 0100 1010 1111 xxxx xxxx */
+
+ {SUINB_ANM_xx, 3,20,11,L0|L1}, /* b0: 0110 0100 1011 0000 xxxx xxxx */
+ {SUINB_SMH_xx, 3,20,11,L0|L1}, /* b1: 0110 0100 1011 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b2: 0110 0100 1011 0010 xxxx xxxx */
+ {SUINB_EOM_xx, 3,20,11,L0|L1}, /* b3: 0110 0100 1011 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b4: 0110 0100 1011 0100 xxxx xxxx */
+ {SUINB_TMM_xx, 3,20,11,L0|L1}, /* b5: 0110 0100 1011 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b6: 0110 0100 1011 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* b7: 0110 0100 1011 0111 xxxx xxxx */
+ {LTI_ANM_xx, 3,20,11,L0|L1}, /* b8: 0110 0100 1011 1000 xxxx xxxx */
+ {LTI_SMH_xx, 3,20,11,L0|L1}, /* b9: 0110 0100 1011 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ba: 0110 0100 1011 1010 xxxx xxxx */
+ {LTI_EOM_xx, 3,20,11,L0|L1}, /* bb: 0110 0100 1011 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* bc: 0110 0100 1011 1100 xxxx xxxx */
+ {LTI_TMM_xx, 3,20,11,L0|L1}, /* bd: 0110 0100 1011 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* be: 0110 0100 1011 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* bf: 0110 0100 1011 1111 xxxx xxxx */
+
+ {ADI_ANM_xx, 3,20,11,L0|L1}, /* c0: 0110 0100 1100 0000 xxxx xxxx */
+ {ADI_SMH_xx, 3,20,11,L0|L1}, /* c1: 0110 0100 1100 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c2: 0110 0100 1100 0010 xxxx xxxx */
+ {ADI_EOM_xx, 3,20,11,L0|L1}, /* c3: 0110 0100 1100 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c4: 0110 0100 1100 0100 xxxx xxxx */
+ {ADI_TMM_xx, 3,20,11,L0|L1}, /* c5: 0110 0100 1100 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c6: 0110 0100 1100 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* c7: 0110 0100 1100 0111 xxxx xxxx */
+ {ONI_ANM_xx, 3,20,11,L0|L1}, /* c8: 0110 0100 1100 1000 xxxx xxxx */
+ {ONI_SMH_xx, 3,20,11,L0|L1}, /* c9: 0110 0100 1100 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ca: 0110 0100 1100 1010 xxxx xxxx */
+ {ONI_EOM_xx, 3,20,11,L0|L1}, /* cb: 0110 0100 1100 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* cc: 0110 0100 1100 1100 xxxx xxxx */
+ {ONI_TMM_xx, 3,20,11,L0|L1}, /* cd: 0110 0100 1100 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ce: 0110 0100 1100 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* cf: 0110 0100 1100 1111 xxxx xxxx */
+
+ {ACI_ANM_xx, 3,20,11,L0|L1}, /* d0: 0110 0100 1101 0000 xxxx xxxx */
+ {ACI_SMH_xx, 3,20,11,L0|L1}, /* d1: 0110 0100 1101 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d2: 0110 0100 1101 0010 xxxx xxxx */
+ {ACI_EOM_xx, 3,20,11,L0|L1}, /* d3: 0110 0100 1101 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d4: 0110 0100 1101 0100 xxxx xxxx */
+ {ACI_TMM_xx, 3,20,11,L0|L1}, /* d5: 0110 0100 1101 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d6: 0110 0100 1101 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* d7: 0110 0100 1101 0111 xxxx xxxx */
+ {OFFI_ANM_xx, 3,20,11,L0|L1}, /* d8: 0110 0100 1101 1000 xxxx xxxx */
+ {OFFI_SMH_xx, 3,20,11,L0|L1}, /* d9: 0110 0100 1101 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* da: 0110 0100 1101 1010 xxxx xxxx */
+ {OFFI_EOM_xx, 3,20,11,L0|L1}, /* db: 0110 0100 1101 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* dc: 0110 0100 1101 1100 xxxx xxxx */
+ {OFFI_TMM_xx, 3,20,11,L0|L1}, /* dd: 0110 0100 1101 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* de: 0110 0100 1101 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* df: 0110 0100 1101 1111 xxxx xxxx */
+
+ {SUI_ANM_xx, 3,20,11,L0|L1}, /* e0: 0110 0100 1110 0000 xxxx xxxx */
+ {SUI_SMH_xx, 3,20,11,L0|L1}, /* e1: 0110 0100 1110 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e2: 0110 0100 1110 0010 xxxx xxxx */
+ {SUI_EOM_xx, 3,20,11,L0|L1}, /* e3: 0110 0100 1110 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e4: 0110 0100 1110 0100 xxxx xxxx */
+ {SUI_TMM_xx, 3,20,11,L0|L1}, /* e5: 0110 0100 1110 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e6: 0110 0100 1110 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* e7: 0110 0100 1110 0111 xxxx xxxx */
+ {NEI_ANM_xx, 3,20,11,L0|L1}, /* e8: 0110 0100 1110 1000 xxxx xxxx */
+ {NEI_SMH_xx, 3,20,11,L0|L1}, /* e9: 0110 0100 1110 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ea: 0110 0100 1110 1010 xxxx xxxx */
+ {NEI_EOM_xx, 3,20,11,L0|L1}, /* eb: 0110 0100 1110 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ec: 0110 0100 1110 1100 xxxx xxxx */
+ {NEI_TMM_xx, 3,20,11,L0|L1}, /* ed: 0110 0100 1110 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ee: 0110 0100 1110 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* ef: 0110 0100 1110 1111 xxxx xxxx */
+
+ {SBI_ANM_xx, 3,20,11,L0|L1}, /* f0: 0110 0100 1111 0000 xxxx xxxx */
+ {SBI_SMH_xx, 3,20,11,L0|L1}, /* f1: 0110 0100 1111 0001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f2: 0110 0100 1111 0010 xxxx xxxx */
+ {SBI_EOM_xx, 3,20,11,L0|L1}, /* f3: 0110 0100 1111 0011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f4: 0110 0100 1111 0100 xxxx xxxx */
+ {SBI_TMM_xx, 3,20,11,L0|L1}, /* f5: 0110 0100 1111 0101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f6: 0110 0100 1111 0110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* f7: 0110 0100 1111 0111 xxxx xxxx */
+ {EQI_ANM_xx, 3,20,11,L0|L1}, /* f8: 0110 0100 1111 1000 xxxx xxxx */
+ {EQI_SMH_xx, 3,20,11,L0|L1}, /* f9: 0110 0100 1111 1001 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* fa: 0110 0100 1111 1010 xxxx xxxx */
+ {EQI_EOM_xx, 3,20,11,L0|L1}, /* fb: 0110 0100 1111 1011 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* fc: 0110 0100 1111 1100 xxxx xxxx */
+ {EQI_TMM_xx, 3,20,11,L0|L1}, /* fd: 0110 0100 1111 1101 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1}, /* fe: 0110 0100 1111 1110 xxxx xxxx */
+ {illegal2, 3,11,11,L0|L1} /* ff: 0110 0100 1111 1111 xxxx xxxx */
};
/* prefix 70 */
static const struct opcode_s op70[256] =
{
- {illegal2, 2, 8, 8,L0|L1}, /* 00: 0111 0000 0000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 01: 0111 0000 0000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 02: 0111 0000 0000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 03: 0111 0000 0000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 04: 0111 0000 0000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 05: 0111 0000 0000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 06: 0111 0000 0000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 07: 0111 0000 0000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 08: 0111 0000 0000 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 09: 0111 0000 0000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0111 0000 0000 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0111 0000 0000 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0111 0000 0000 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0111 0000 0000 1101 */
- {SSPD_w, 4,20,20,L0|L1}, /* 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */
- {LSPD_w, 4,20,20,L0|L1}, /* 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 10: 0111 0000 0001 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 11: 0111 0000 0001 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 12: 0111 0000 0001 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 13: 0111 0000 0001 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 14: 0111 0000 0001 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 15: 0111 0000 0001 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 16: 0111 0000 0001 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 17: 0111 0000 0001 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 18: 0111 0000 0001 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 19: 0111 0000 0001 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0111 0000 0001 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0111 0000 0001 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0111 0000 0001 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0111 0000 0001 1101 */
- {SBCD_w, 4,20,20,L0|L1}, /* 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */
- {LBCD_w, 4,20,20,L0|L1}, /* 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 20: 0111 0000 0010 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 21: 0111 0000 0010 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 22: 0111 0000 0010 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 23: 0111 0000 0010 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 24: 0111 0000 0010 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 25: 0111 0000 0010 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 26: 0111 0000 0010 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 27: 0111 0000 0010 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 28: 0111 0000 0010 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 29: 0111 0000 0010 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0111 0000 0010 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0111 0000 0010 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0111 0000 0010 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0111 0000 0010 1101 */
- {SDED_w, 4,20,20,L0|L1}, /* 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */
- {LDED_w, 4,20,20,L0|L1}, /* 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 30: 0111 0000 0011 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 31: 0111 0000 0011 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 32: 0111 0000 0011 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 33: 0111 0000 0011 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 34: 0111 0000 0011 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 35: 0111 0000 0011 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 36: 0111 0000 0011 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 37: 0111 0000 0011 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 38: 0111 0000 0011 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 39: 0111 0000 0011 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0111 0000 0011 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0111 0000 0011 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0111 0000 0011 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0111 0000 0011 1101 */
- {SHLD_w, 4,20,20,L0|L1}, /* 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */
- {LHLD_w, 4,20,20,L0|L1}, /* 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 40: 0111 0000 0100 0000 */
- {EADD_EA_A, 2,11,11,L0|L1}, /* 41: 0111 0000 0100 0001 */
- {EADD_EA_B, 2,11,11,L0|L1}, /* 42: 0111 0000 0100 0010 */
- {EADD_EA_C, 2,11,11,L0|L1}, /* 43: 0111 0000 0100 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 44: 0111 0000 0100 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 45: 0111 0000 0100 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 46: 0111 0000 0100 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 47: 0111 0000 0100 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 48: 0111 0000 0100 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 49: 0111 0000 0100 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0111 0000 0100 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0111 0000 0100 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0111 0000 0100 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0111 0000 0100 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0111 0000 0100 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0111 0000 0100 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 50: 0111 0000 0101 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 51: 0111 0000 0101 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 52: 0111 0000 0101 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 53: 0111 0000 0101 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 54: 0111 0000 0101 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 55: 0111 0000 0101 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 56: 0111 0000 0101 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 57: 0111 0000 0101 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 58: 0111 0000 0101 1000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 59: 0111 0000 0101 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0111 0000 0101 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0111 0000 0101 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0111 0000 0101 1100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0111 0000 0101 1101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0111 0000 0101 1110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0111 0000 0101 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 60: 0111 0000 0110 0000 */
- {ESUB_EA_A, 2,11,11,L0|L1}, /* 61: 0111 0000 0110 0001 */
- {ESUB_EA_B, 2,11,11,L0|L1}, /* 62: 0111 0000 0110 0010 */
- {ESUB_EA_C, 2,11,11,L0|L1}, /* 63: 0111 0000 0110 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 64: 0111 0000 0110 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 65: 0111 0000 0110 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 66: 0111 0000 0110 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 67: 0111 0000 0110 0111 */
- {MOV_V_w, 4,17,17,L0|L1}, /* 68: 0111 0000 0110 1000 llll llll hhhh hhhh */
- {MOV_A_w, 4,17,17,L0|L1}, /* 69: 0111 0000 0110 1001 llll llll hhhh hhhh */
- {MOV_B_w, 4,17,17,L0|L1}, /* 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */
- {MOV_C_w, 4,17,17,L0|L1}, /* 6b: 0111 0000 0110 1011 llll llll hhhh hhhh */
- {MOV_D_w, 4,17,17,L0|L1}, /* 6c: 0111 0000 0110 1100 llll llll hhhh hhhh */
- {MOV_E_w, 4,17,17,L0|L1}, /* 6d: 0111 0000 0110 1101 llll llll hhhh hhhh */
- {MOV_H_w, 4,17,17,L0|L1}, /* 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */
- {MOV_L_w, 4,17,17,L0|L1}, /* 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 70: 0111 0000 0111 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 71: 0111 0000 0111 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 72: 0111 0000 0111 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 73: 0111 0000 0111 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 74: 0111 0000 0111 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 75: 0111 0000 0111 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 76: 0111 0000 0111 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 77: 0111 0000 0111 0111 */
- {MOV_w_V, 4,17,17,L0|L1}, /* 78: 0111 0000 0111 1000 llll llll hhhh hhhh */
- {MOV_w_A, 4,17,17,L0|L1}, /* 79: 0111 0000 0111 1001 llll llll hhhh hhhh */
- {MOV_w_B, 4,17,17,L0|L1}, /* 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */
- {MOV_w_C, 4,17,17,L0|L1}, /* 7b: 0111 0000 0111 1011 llll llll hhhh hhhh */
- {MOV_w_D, 4,17,17,L0|L1}, /* 7c: 0111 0000 0111 1100 llll llll hhhh hhhh */
- {MOV_w_E, 4,17,17,L0|L1}, /* 7d: 0111 0000 0111 1101 llll llll hhhh hhhh */
- {MOV_w_H, 4,17,17,L0|L1}, /* 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */
- {MOV_w_L, 4,17,17,L0|L1}, /* 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 80: 0111 0000 1000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 81: 0111 0000 1000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 82: 0111 0000 1000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 83: 0111 0000 1000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 84: 0111 0000 1000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 85: 0111 0000 1000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 86: 0111 0000 1000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 87: 0111 0000 1000 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 88: 0111 0000 1000 1000 */
- {ANAX_B, 2,11,11,L0|L1}, /* 89: 0111 0000 1000 1001 */
- {ANAX_D, 2,11,11,L0|L1}, /* 8a: 0111 0000 1000 1010 */
- {ANAX_H, 2,11,11,L0|L1}, /* 8b: 0111 0000 1000 1011 */
- {ANAX_Dp, 2,11,11,L0|L1}, /* 8c: 0111 0000 1000 1100 */
- {ANAX_Hp, 2,11,11,L0|L1}, /* 8d: 0111 0000 1000 1101 */
- {ANAX_Dm, 2,11,11,L0|L1}, /* 8e: 0111 0000 1000 1110 */
- {ANAX_Hm, 2,11,11,L0|L1}, /* 8f: 0111 0000 1000 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 90: 0111 0000 1001 0000 */
- {XRAX_B, 2,11,11,L0|L1}, /* 91: 0111 0000 1001 0001 */
- {XRAX_D, 2,11,11,L0|L1}, /* 92: 0111 0000 1001 0010 */
- {XRAX_H, 2,11,11,L0|L1}, /* 93: 0111 0000 1001 0011 */
- {XRAX_Dp, 2,11,11,L0|L1}, /* 94: 0111 0000 1001 0100 */
- {XRAX_Hp, 2,11,11,L0|L1}, /* 95: 0111 0000 1001 0101 */
- {XRAX_Dm, 2,11,11,L0|L1}, /* 96: 0111 0000 1001 0110 */
- {XRAX_Hm, 2,11,11,L0|L1}, /* 97: 0111 0000 1001 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* 98: 0111 0000 1001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0111 0000 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0111 0000 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0111 0000 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0111 0000 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0111 0000 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0111 0000 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0111 0000 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0111 0000 0000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 08: 0111 0000 0000 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 09: 0111 0000 0000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0a: 0111 0000 0000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0b: 0111 0000 0000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0c: 0111 0000 0000 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 0d: 0111 0000 0000 1101 */
+ {SSPD_w, 4,20,20,L0|L1}, /* 0e: 0111 0000 0000 1110 llll llll hhhh hhhh */
+ {LSPD_w, 4,20,20,L0|L1}, /* 0f: 0111 0000 0000 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 10: 0111 0000 0001 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 11: 0111 0000 0001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 12: 0111 0000 0001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 13: 0111 0000 0001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 14: 0111 0000 0001 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 15: 0111 0000 0001 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 16: 0111 0000 0001 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 17: 0111 0000 0001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 18: 0111 0000 0001 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 19: 0111 0000 0001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1a: 0111 0000 0001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1b: 0111 0000 0001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1c: 0111 0000 0001 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 1d: 0111 0000 0001 1101 */
+ {SBCD_w, 4,20,20,L0|L1}, /* 1e: 0111 0000 0001 1110 llll llll hhhh hhhh */
+ {LBCD_w, 4,20,20,L0|L1}, /* 1f: 0111 0000 0001 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 20: 0111 0000 0010 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 21: 0111 0000 0010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 22: 0111 0000 0010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 23: 0111 0000 0010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 24: 0111 0000 0010 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 25: 0111 0000 0010 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 26: 0111 0000 0010 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 27: 0111 0000 0010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 28: 0111 0000 0010 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 29: 0111 0000 0010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2a: 0111 0000 0010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2b: 0111 0000 0010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2c: 0111 0000 0010 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 2d: 0111 0000 0010 1101 */
+ {SDED_w, 4,20,20,L0|L1}, /* 2e: 0111 0000 0010 1110 llll llll hhhh hhhh */
+ {LDED_w, 4,20,20,L0|L1}, /* 2f: 0111 0000 0010 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 30: 0111 0000 0011 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 31: 0111 0000 0011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 32: 0111 0000 0011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 33: 0111 0000 0011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 34: 0111 0000 0011 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 35: 0111 0000 0011 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 36: 0111 0000 0011 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 37: 0111 0000 0011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 38: 0111 0000 0011 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 39: 0111 0000 0011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3a: 0111 0000 0011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3b: 0111 0000 0011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3c: 0111 0000 0011 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 3d: 0111 0000 0011 1101 */
+ {SHLD_w, 4,20,20,L0|L1}, /* 3e: 0111 0000 0011 1110 llll llll hhhh hhhh */
+ {LHLD_w, 4,20,20,L0|L1}, /* 3f: 0111 0000 0011 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 40: 0111 0000 0100 0000 */
+ {EADD_EA_A, 2,11,11,L0|L1}, /* 41: 0111 0000 0100 0001 */
+ {EADD_EA_B, 2,11,11,L0|L1}, /* 42: 0111 0000 0100 0010 */
+ {EADD_EA_C, 2,11,11,L0|L1}, /* 43: 0111 0000 0100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 44: 0111 0000 0100 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 45: 0111 0000 0100 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 46: 0111 0000 0100 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 47: 0111 0000 0100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 48: 0111 0000 0100 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 49: 0111 0000 0100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4a: 0111 0000 0100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4b: 0111 0000 0100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4c: 0111 0000 0100 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4d: 0111 0000 0100 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4e: 0111 0000 0100 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 4f: 0111 0000 0100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 50: 0111 0000 0101 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 51: 0111 0000 0101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 52: 0111 0000 0101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 53: 0111 0000 0101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 54: 0111 0000 0101 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 55: 0111 0000 0101 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 56: 0111 0000 0101 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 57: 0111 0000 0101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 58: 0111 0000 0101 1000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 59: 0111 0000 0101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5a: 0111 0000 0101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5b: 0111 0000 0101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5c: 0111 0000 0101 1100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5d: 0111 0000 0101 1101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5e: 0111 0000 0101 1110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 5f: 0111 0000 0101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 60: 0111 0000 0110 0000 */
+ {ESUB_EA_A, 2,11,11,L0|L1}, /* 61: 0111 0000 0110 0001 */
+ {ESUB_EA_B, 2,11,11,L0|L1}, /* 62: 0111 0000 0110 0010 */
+ {ESUB_EA_C, 2,11,11,L0|L1}, /* 63: 0111 0000 0110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 64: 0111 0000 0110 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 65: 0111 0000 0110 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 66: 0111 0000 0110 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 67: 0111 0000 0110 0111 */
+ {MOV_V_w, 4,17,17,L0|L1}, /* 68: 0111 0000 0110 1000 llll llll hhhh hhhh */
+ {MOV_A_w, 4,17,17,L0|L1}, /* 69: 0111 0000 0110 1001 llll llll hhhh hhhh */
+ {MOV_B_w, 4,17,17,L0|L1}, /* 6a: 0111 0000 0110 1010 llll llll hhhh hhhh */
+ {MOV_C_w, 4,17,17,L0|L1}, /* 6b: 0111 0000 0110 1011 llll llll hhhh hhhh */
+ {MOV_D_w, 4,17,17,L0|L1}, /* 6c: 0111 0000 0110 1100 llll llll hhhh hhhh */
+ {MOV_E_w, 4,17,17,L0|L1}, /* 6d: 0111 0000 0110 1101 llll llll hhhh hhhh */
+ {MOV_H_w, 4,17,17,L0|L1}, /* 6e: 0111 0000 0110 1110 llll llll hhhh hhhh */
+ {MOV_L_w, 4,17,17,L0|L1}, /* 6f: 0111 0000 0110 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 70: 0111 0000 0111 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 71: 0111 0000 0111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 72: 0111 0000 0111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 73: 0111 0000 0111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 74: 0111 0000 0111 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 75: 0111 0000 0111 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 76: 0111 0000 0111 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 77: 0111 0000 0111 0111 */
+ {MOV_w_V, 4,17,17,L0|L1}, /* 78: 0111 0000 0111 1000 llll llll hhhh hhhh */
+ {MOV_w_A, 4,17,17,L0|L1}, /* 79: 0111 0000 0111 1001 llll llll hhhh hhhh */
+ {MOV_w_B, 4,17,17,L0|L1}, /* 7a: 0111 0000 0111 1010 llll llll hhhh hhhh */
+ {MOV_w_C, 4,17,17,L0|L1}, /* 7b: 0111 0000 0111 1011 llll llll hhhh hhhh */
+ {MOV_w_D, 4,17,17,L0|L1}, /* 7c: 0111 0000 0111 1100 llll llll hhhh hhhh */
+ {MOV_w_E, 4,17,17,L0|L1}, /* 7d: 0111 0000 0111 1101 llll llll hhhh hhhh */
+ {MOV_w_H, 4,17,17,L0|L1}, /* 7e: 0111 0000 0111 1110 llll llll hhhh hhhh */
+ {MOV_w_L, 4,17,17,L0|L1}, /* 7f: 0111 0000 0111 1111 llll llll hhhh hhhh */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0111 0000 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0111 0000 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0111 0000 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0111 0000 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0111 0000 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0111 0000 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0111 0000 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0111 0000 1000 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 88: 0111 0000 1000 1000 */
+ {ANAX_B, 2,11,11,L0|L1}, /* 89: 0111 0000 1000 1001 */
+ {ANAX_D, 2,11,11,L0|L1}, /* 8a: 0111 0000 1000 1010 */
+ {ANAX_H, 2,11,11,L0|L1}, /* 8b: 0111 0000 1000 1011 */
+ {ANAX_Dp, 2,11,11,L0|L1}, /* 8c: 0111 0000 1000 1100 */
+ {ANAX_Hp, 2,11,11,L0|L1}, /* 8d: 0111 0000 1000 1101 */
+ {ANAX_Dm, 2,11,11,L0|L1}, /* 8e: 0111 0000 1000 1110 */
+ {ANAX_Hm, 2,11,11,L0|L1}, /* 8f: 0111 0000 1000 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 90: 0111 0000 1001 0000 */
+ {XRAX_B, 2,11,11,L0|L1}, /* 91: 0111 0000 1001 0001 */
+ {XRAX_D, 2,11,11,L0|L1}, /* 92: 0111 0000 1001 0010 */
+ {XRAX_H, 2,11,11,L0|L1}, /* 93: 0111 0000 1001 0011 */
+ {XRAX_Dp, 2,11,11,L0|L1}, /* 94: 0111 0000 1001 0100 */
+ {XRAX_Hp, 2,11,11,L0|L1}, /* 95: 0111 0000 1001 0101 */
+ {XRAX_Dm, 2,11,11,L0|L1}, /* 96: 0111 0000 1001 0110 */
+ {XRAX_Hm, 2,11,11,L0|L1}, /* 97: 0111 0000 1001 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 98: 0111 0000 1001 1000 */
// orax added, timings not verified
- {ORAX_B, 2,11, 8,L0|L1}, /* 99: 0111 0000 1001 1001 */
- {ORAX_D, 2,11, 8,L0|L1}, /* 9a: 0111 0000 1001 1010 */
- {ORAX_H, 2,11, 8,L0|L1}, /* 9b: 0111 0000 1001 1011 */
- {ORAX_Dp, 2,11, 8,L0|L1}, /* 9c: 0111 0000 1001 1100 */
- {ORAX_Hp, 2,11, 8,L0|L1}, /* 9d: 0111 0000 1001 1101 */
- {ORAX_Dm, 2,11, 8,L0|L1}, /* 9e: 0111 0000 1001 1110 */
- {ORAX_Hm, 2,11, 8,L0|L1}, /* 9f: 0111 0000 1001 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* a0: 0111 0000 1010 0000 */
- {ADDNCX_B, 2,11, 8,L0|L1}, /* a1: 0111 0000 1010 0001 */
- {ADDNCX_D, 2,11, 8,L0|L1}, /* a2: 0111 0000 1010 0010 */
- {ADDNCX_H, 2,11, 8,L0|L1}, /* a3: 0111 0000 1010 0011 */
- {ADDNCX_Dp, 2,11, 8,L0|L1}, /* a4: 0111 0000 1010 0100 */
- {ADDNCX_Hp, 2,11, 8,L0|L1}, /* a5: 0111 0000 1010 0101 */
- {ADDNCX_Dm, 2,11, 8,L0|L1}, /* a6: 0111 0000 1010 0110 */
- {ADDNCX_Hm, 2,11, 8,L0|L1}, /* a7: 0111 0000 1010 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* a8: 0111 0000 1010 1000 */
- {GTAX_B, 2,11,11,L0|L1}, /* a9: 0111 0000 1010 1001 */
- {GTAX_D, 2,11,11,L0|L1}, /* aa: 0111 0000 1010 1010 */
- {GTAX_H, 2,11,11,L0|L1}, /* ab: 0111 0000 1010 1011 */
- {GTAX_Dp, 2,11,11,L0|L1}, /* ac: 0111 0000 1010 1100 */
- {GTAX_Hp, 2,11,11,L0|L1}, /* ad: 0111 0000 1010 1101 */
- {GTAX_Dm, 2,11,11,L0|L1}, /* ae: 0111 0000 1010 1110 */
- {GTAX_Hm, 2,11,11,L0|L1}, /* af: 0111 0000 1010 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* b0: 0111 0000 1011 0000 */
- {SUBNBX_B, 2,11,11,L0|L1}, /* b1: 0111 0000 1011 0001 */
- {SUBNBX_D, 2,11,11,L0|L1}, /* b2: 0111 0000 1011 0010 */
- {SUBNBX_H, 2,11,11,L0|L1}, /* b3: 0111 0000 1011 0011 */
- {SUBNBX_Dp, 2,11,11,L0|L1}, /* b4: 0111 0000 1011 0100 */
- {SUBNBX_Hp, 2,11,11,L0|L1}, /* b5: 0111 0000 1011 0101 */
- {SUBNBX_Dm, 2,11,11,L0|L1}, /* b6: 0111 0000 1011 0110 */
- {SUBNBX_Hm, 2,11,11,L0|L1}, /* b7: 0111 0000 1011 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* b8: 0111 0000 1011 1000 */
- {LTAX_B, 2,11,11,L0|L1}, /* b9: 0111 0000 1011 1001 */
- {LTAX_D, 2,11,11,L0|L1}, /* ba: 0111 0000 1011 1010 */
- {LTAX_H, 2,11,11,L0|L1}, /* bb: 0111 0000 1011 1011 */
- {LTAX_Dp, 2,11,11,L0|L1}, /* bc: 0111 0000 1011 1100 */
- {LTAX_Hp, 2,11,11,L0|L1}, /* bd: 0111 0000 1011 1101 */
- {LTAX_Dm, 2,11,11,L0|L1}, /* be: 0111 0000 1011 1110 */
- {LTAX_Hm, 2,11,11,L0|L1}, /* bf: 0111 0000 1011 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* c0: 0111 0000 1100 0000 */
- {ADDX_B, 2,11, 8,L0|L1}, /* c1: 0111 0000 1100 0001 */
- {ADDX_D, 2,11, 8,L0|L1}, /* c2: 0111 0000 1100 0010 */
- {ADDX_H, 2,11, 8,L0|L1}, /* c3: 0111 0000 1100 0011 */
- {ADDX_Dp, 2,11, 8,L0|L1}, /* c4: 0111 0000 1100 0100 */
- {ADDX_Hp, 2,11, 8,L0|L1}, /* c5: 0111 0000 1100 0101 */
- {ADDX_Dm, 2,11, 8,L0|L1}, /* c6: 0111 0000 1100 0110 */
- {ADDX_Hm, 2,11, 8,L0|L1}, /* c7: 0111 0000 1100 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* c8: 0111 0000 1100 1000 */
- {ONAX_B, 2,11, 8,L0|L1}, /* c9: 0111 0000 1100 1001 */
- {ONAX_D, 2,11, 8,L0|L1}, /* ca: 0111 0000 1100 1010 */
- {ONAX_H, 2,11, 8,L0|L1}, /* cb: 0111 0000 1100 1011 */
- {ONAX_Dp, 2,11, 8,L0|L1}, /* cc: 0111 0000 1100 1100 */
- {ONAX_Hp, 2,11, 8,L0|L1}, /* cd: 0111 0000 1100 1101 */
- {ONAX_Dm, 2,11, 8,L0|L1}, /* ce: 0111 0000 1100 1110 */
- {ONAX_Hm, 2,11, 8,L0|L1}, /* cf: 0111 0000 1100 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* d0: 0111 0000 1101 0000 */
- {ADCX_B, 2,11, 8,L0|L1}, /* d1: 0111 0000 1101 0001 */
- {ADCX_D, 2,11, 8,L0|L1}, /* d2: 0111 0000 1101 0010 */
- {ADCX_H, 2,11, 8,L0|L1}, /* d3: 0111 0000 1101 0011 */
- {ADCX_Dp, 2,11, 8,L0|L1}, /* d4: 0111 0000 1101 0100 */
- {ADCX_Hp, 2,11, 8,L0|L1}, /* d5: 0111 0000 1101 0101 */
- {ADCX_Dm, 2,11, 8,L0|L1}, /* d6: 0111 0000 1101 0110 */
- {ADCX_Hm, 2,11, 8,L0|L1}, /* d7: 0111 0000 1101 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* d8: 0111 0000 1101 1000 */
- {OFFAX_B, 2,11, 8,L0|L1}, /* d9: 0111 0000 1101 1001 */
- {OFFAX_D, 2,11, 8,L0|L1}, /* da: 0111 0000 1101 1010 */
- {OFFAX_H, 2,11, 8,L0|L1}, /* db: 0111 0000 1101 1011 */
- {OFFAX_Dp, 2,11, 8,L0|L1}, /* dc: 0111 0000 1101 1100 */
- {OFFAX_Hp, 2,11, 8,L0|L1}, /* dd: 0111 0000 1101 1101 */
- {OFFAX_Dm, 2,11, 8,L0|L1}, /* de: 0111 0000 1101 1110 */
- {OFFAX_Hm, 2,11, 8,L0|L1}, /* df: 0111 0000 1101 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* e0: 0111 0000 1110 0000 */
- {SUBX_B, 2,11,11,L0|L1}, /* e1: 0111 0000 1110 0001 */
- {SUBX_D, 2,11,11,L0|L1}, /* e2: 0111 0000 1110 0010 */
- {SUBX_H, 2,11,11,L0|L1}, /* e3: 0111 0000 1110 0011 */
- {SUBX_Dp, 2,11,11,L0|L1}, /* e4: 0111 0000 1110 0100 */
- {SUBX_Hp, 2,11,11,L0|L1}, /* e5: 0111 0000 1110 0101 */
- {SUBX_Dm, 2,11,11,L0|L1}, /* e6: 0111 0000 1110 0110 */
- {SUBX_Hm, 2,11,11,L0|L1}, /* e7: 0111 0000 1110 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* e8: 0111 0000 1110 1000 */
- {NEAX_B, 2,11,11,L0|L1}, /* e9: 0111 0000 1110 1001 */
- {NEAX_D, 2,11,11,L0|L1}, /* ea: 0111 0000 1110 1010 */
- {NEAX_H, 2,11,11,L0|L1}, /* eb: 0111 0000 1110 1011 */
- {NEAX_Dp, 2,11,11,L0|L1}, /* ec: 0111 0000 1110 1100 */
- {NEAX_Hp, 2,11,11,L0|L1}, /* ed: 0111 0000 1110 1101 */
- {NEAX_Dm, 2,11,11,L0|L1}, /* ee: 0111 0000 1110 1110 */
- {NEAX_Hm, 2,11,11,L0|L1}, /* ef: 0111 0000 1110 1111 */
-
- {illegal2, 2, 8, 8,L0|L1}, /* f0: 0111 0000 1111 0000 */
- {SBBX_B, 2,11,11,L0|L1}, /* f1: 0111 0000 1111 0001 */
- {SBBX_D, 2,11,11,L0|L1}, /* f2: 0111 0000 1111 0010 */
- {SBBX_H, 2,11,11,L0|L1}, /* f3: 0111 0000 1111 0011 */
- {SBBX_Dp, 2,11,11,L0|L1}, /* f4: 0111 0000 1111 0100 */
- {SBBX_Hp, 2,11,11,L0|L1}, /* f5: 0111 0000 1111 0101 */
- {SBBX_Dm, 2,11,11,L0|L1}, /* f6: 0111 0000 1111 0110 */
- {SBBX_Hm, 2,11,11,L0|L1}, /* f7: 0111 0000 1111 0111 */
- {illegal2, 2, 8, 8,L0|L1}, /* f8: 0111 0000 1111 1000 */
- {EQAX_B, 2,11,11,L0|L1}, /* f9: 0111 0000 1111 1001 */
- {EQAX_D, 2,11,11,L0|L1}, /* fa: 0111 0000 1111 1010 */
- {EQAX_H, 2,11,11,L0|L1}, /* fb: 0111 0000 1111 1011 */
- {EQAX_Dp, 2,11,11,L0|L1}, /* fc: 0111 0000 1111 1100 */
- {EQAX_Hp, 2,11,11,L0|L1}, /* fd: 0111 0000 1111 1101 */
- {EQAX_Dm, 2,11,11,L0|L1}, /* fe: 0111 0000 1111 1110 */
- {EQAX_Hm, 2,11,11,L0|L1} /* ff: 0111 0000 1111 1111 */
+ {ORAX_B, 2,11, 8,L0|L1}, /* 99: 0111 0000 1001 1001 */
+ {ORAX_D, 2,11, 8,L0|L1}, /* 9a: 0111 0000 1001 1010 */
+ {ORAX_H, 2,11, 8,L0|L1}, /* 9b: 0111 0000 1001 1011 */
+ {ORAX_Dp, 2,11, 8,L0|L1}, /* 9c: 0111 0000 1001 1100 */
+ {ORAX_Hp, 2,11, 8,L0|L1}, /* 9d: 0111 0000 1001 1101 */
+ {ORAX_Dm, 2,11, 8,L0|L1}, /* 9e: 0111 0000 1001 1110 */
+ {ORAX_Hm, 2,11, 8,L0|L1}, /* 9f: 0111 0000 1001 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* a0: 0111 0000 1010 0000 */
+ {ADDNCX_B, 2,11, 8,L0|L1}, /* a1: 0111 0000 1010 0001 */
+ {ADDNCX_D, 2,11, 8,L0|L1}, /* a2: 0111 0000 1010 0010 */
+ {ADDNCX_H, 2,11, 8,L0|L1}, /* a3: 0111 0000 1010 0011 */
+ {ADDNCX_Dp, 2,11, 8,L0|L1}, /* a4: 0111 0000 1010 0100 */
+ {ADDNCX_Hp, 2,11, 8,L0|L1}, /* a5: 0111 0000 1010 0101 */
+ {ADDNCX_Dm, 2,11, 8,L0|L1}, /* a6: 0111 0000 1010 0110 */
+ {ADDNCX_Hm, 2,11, 8,L0|L1}, /* a7: 0111 0000 1010 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a8: 0111 0000 1010 1000 */
+ {GTAX_B, 2,11,11,L0|L1}, /* a9: 0111 0000 1010 1001 */
+ {GTAX_D, 2,11,11,L0|L1}, /* aa: 0111 0000 1010 1010 */
+ {GTAX_H, 2,11,11,L0|L1}, /* ab: 0111 0000 1010 1011 */
+ {GTAX_Dp, 2,11,11,L0|L1}, /* ac: 0111 0000 1010 1100 */
+ {GTAX_Hp, 2,11,11,L0|L1}, /* ad: 0111 0000 1010 1101 */
+ {GTAX_Dm, 2,11,11,L0|L1}, /* ae: 0111 0000 1010 1110 */
+ {GTAX_Hm, 2,11,11,L0|L1}, /* af: 0111 0000 1010 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* b0: 0111 0000 1011 0000 */
+ {SUBNBX_B, 2,11,11,L0|L1}, /* b1: 0111 0000 1011 0001 */
+ {SUBNBX_D, 2,11,11,L0|L1}, /* b2: 0111 0000 1011 0010 */
+ {SUBNBX_H, 2,11,11,L0|L1}, /* b3: 0111 0000 1011 0011 */
+ {SUBNBX_Dp, 2,11,11,L0|L1}, /* b4: 0111 0000 1011 0100 */
+ {SUBNBX_Hp, 2,11,11,L0|L1}, /* b5: 0111 0000 1011 0101 */
+ {SUBNBX_Dm, 2,11,11,L0|L1}, /* b6: 0111 0000 1011 0110 */
+ {SUBNBX_Hm, 2,11,11,L0|L1}, /* b7: 0111 0000 1011 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b8: 0111 0000 1011 1000 */
+ {LTAX_B, 2,11,11,L0|L1}, /* b9: 0111 0000 1011 1001 */
+ {LTAX_D, 2,11,11,L0|L1}, /* ba: 0111 0000 1011 1010 */
+ {LTAX_H, 2,11,11,L0|L1}, /* bb: 0111 0000 1011 1011 */
+ {LTAX_Dp, 2,11,11,L0|L1}, /* bc: 0111 0000 1011 1100 */
+ {LTAX_Hp, 2,11,11,L0|L1}, /* bd: 0111 0000 1011 1101 */
+ {LTAX_Dm, 2,11,11,L0|L1}, /* be: 0111 0000 1011 1110 */
+ {LTAX_Hm, 2,11,11,L0|L1}, /* bf: 0111 0000 1011 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* c0: 0111 0000 1100 0000 */
+ {ADDX_B, 2,11, 8,L0|L1}, /* c1: 0111 0000 1100 0001 */
+ {ADDX_D, 2,11, 8,L0|L1}, /* c2: 0111 0000 1100 0010 */
+ {ADDX_H, 2,11, 8,L0|L1}, /* c3: 0111 0000 1100 0011 */
+ {ADDX_Dp, 2,11, 8,L0|L1}, /* c4: 0111 0000 1100 0100 */
+ {ADDX_Hp, 2,11, 8,L0|L1}, /* c5: 0111 0000 1100 0101 */
+ {ADDX_Dm, 2,11, 8,L0|L1}, /* c6: 0111 0000 1100 0110 */
+ {ADDX_Hm, 2,11, 8,L0|L1}, /* c7: 0111 0000 1100 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c8: 0111 0000 1100 1000 */
+ {ONAX_B, 2,11, 8,L0|L1}, /* c9: 0111 0000 1100 1001 */
+ {ONAX_D, 2,11, 8,L0|L1}, /* ca: 0111 0000 1100 1010 */
+ {ONAX_H, 2,11, 8,L0|L1}, /* cb: 0111 0000 1100 1011 */
+ {ONAX_Dp, 2,11, 8,L0|L1}, /* cc: 0111 0000 1100 1100 */
+ {ONAX_Hp, 2,11, 8,L0|L1}, /* cd: 0111 0000 1100 1101 */
+ {ONAX_Dm, 2,11, 8,L0|L1}, /* ce: 0111 0000 1100 1110 */
+ {ONAX_Hm, 2,11, 8,L0|L1}, /* cf: 0111 0000 1100 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* d0: 0111 0000 1101 0000 */
+ {ADCX_B, 2,11, 8,L0|L1}, /* d1: 0111 0000 1101 0001 */
+ {ADCX_D, 2,11, 8,L0|L1}, /* d2: 0111 0000 1101 0010 */
+ {ADCX_H, 2,11, 8,L0|L1}, /* d3: 0111 0000 1101 0011 */
+ {ADCX_Dp, 2,11, 8,L0|L1}, /* d4: 0111 0000 1101 0100 */
+ {ADCX_Hp, 2,11, 8,L0|L1}, /* d5: 0111 0000 1101 0101 */
+ {ADCX_Dm, 2,11, 8,L0|L1}, /* d6: 0111 0000 1101 0110 */
+ {ADCX_Hm, 2,11, 8,L0|L1}, /* d7: 0111 0000 1101 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d8: 0111 0000 1101 1000 */
+ {OFFAX_B, 2,11, 8,L0|L1}, /* d9: 0111 0000 1101 1001 */
+ {OFFAX_D, 2,11, 8,L0|L1}, /* da: 0111 0000 1101 1010 */
+ {OFFAX_H, 2,11, 8,L0|L1}, /* db: 0111 0000 1101 1011 */
+ {OFFAX_Dp, 2,11, 8,L0|L1}, /* dc: 0111 0000 1101 1100 */
+ {OFFAX_Hp, 2,11, 8,L0|L1}, /* dd: 0111 0000 1101 1101 */
+ {OFFAX_Dm, 2,11, 8,L0|L1}, /* de: 0111 0000 1101 1110 */
+ {OFFAX_Hm, 2,11, 8,L0|L1}, /* df: 0111 0000 1101 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* e0: 0111 0000 1110 0000 */
+ {SUBX_B, 2,11,11,L0|L1}, /* e1: 0111 0000 1110 0001 */
+ {SUBX_D, 2,11,11,L0|L1}, /* e2: 0111 0000 1110 0010 */
+ {SUBX_H, 2,11,11,L0|L1}, /* e3: 0111 0000 1110 0011 */
+ {SUBX_Dp, 2,11,11,L0|L1}, /* e4: 0111 0000 1110 0100 */
+ {SUBX_Hp, 2,11,11,L0|L1}, /* e5: 0111 0000 1110 0101 */
+ {SUBX_Dm, 2,11,11,L0|L1}, /* e6: 0111 0000 1110 0110 */
+ {SUBX_Hm, 2,11,11,L0|L1}, /* e7: 0111 0000 1110 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e8: 0111 0000 1110 1000 */
+ {NEAX_B, 2,11,11,L0|L1}, /* e9: 0111 0000 1110 1001 */
+ {NEAX_D, 2,11,11,L0|L1}, /* ea: 0111 0000 1110 1010 */
+ {NEAX_H, 2,11,11,L0|L1}, /* eb: 0111 0000 1110 1011 */
+ {NEAX_Dp, 2,11,11,L0|L1}, /* ec: 0111 0000 1110 1100 */
+ {NEAX_Hp, 2,11,11,L0|L1}, /* ed: 0111 0000 1110 1101 */
+ {NEAX_Dm, 2,11,11,L0|L1}, /* ee: 0111 0000 1110 1110 */
+ {NEAX_Hm, 2,11,11,L0|L1}, /* ef: 0111 0000 1110 1111 */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* f0: 0111 0000 1111 0000 */
+ {SBBX_B, 2,11,11,L0|L1}, /* f1: 0111 0000 1111 0001 */
+ {SBBX_D, 2,11,11,L0|L1}, /* f2: 0111 0000 1111 0010 */
+ {SBBX_H, 2,11,11,L0|L1}, /* f3: 0111 0000 1111 0011 */
+ {SBBX_Dp, 2,11,11,L0|L1}, /* f4: 0111 0000 1111 0100 */
+ {SBBX_Hp, 2,11,11,L0|L1}, /* f5: 0111 0000 1111 0101 */
+ {SBBX_Dm, 2,11,11,L0|L1}, /* f6: 0111 0000 1111 0110 */
+ {SBBX_Hm, 2,11,11,L0|L1}, /* f7: 0111 0000 1111 0111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f8: 0111 0000 1111 1000 */
+ {EQAX_B, 2,11,11,L0|L1}, /* f9: 0111 0000 1111 1001 */
+ {EQAX_D, 2,11,11,L0|L1}, /* fa: 0111 0000 1111 1010 */
+ {EQAX_H, 2,11,11,L0|L1}, /* fb: 0111 0000 1111 1011 */
+ {EQAX_Dp, 2,11,11,L0|L1}, /* fc: 0111 0000 1111 1100 */
+ {EQAX_Hp, 2,11,11,L0|L1}, /* fd: 0111 0000 1111 1101 */
+ {EQAX_Dm, 2,11,11,L0|L1}, /* fe: 0111 0000 1111 1110 */
+ {EQAX_Hm, 2,11,11,L0|L1} /* ff: 0111 0000 1111 1111 */
};
/* prefix 74 */
static const struct opcode_s op74[256] =
{
- {illegal2, 2, 8, 8,L0|L1}, /* 00: 0111 0100 0000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 01: 0111 0100 0000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 02: 0111 0100 0000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 03: 0111 0100 0000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 04: 0111 0100 0000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 05: 0111 0100 0000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 06: 0111 0100 0000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 07: 0111 0100 0000 0111 */
- {ANI_V_xx, 3,11,11,L0|L1}, /* 08: 0111 0100 0000 1000 xxxx xxxx */
- {ANI_A_xx, 3,11,11,L0|L1}, /* 09: 0111 0100 0000 1001 xxxx xxxx */
- {ANI_B_xx, 3,11,11,L0|L1}, /* 0a: 0111 0100 0000 1010 xxxx xxxx */
- {ANI_C_xx, 3,11,11,L0|L1}, /* 0b: 0111 0100 0000 1011 xxxx xxxx */
- {ANI_D_xx, 3,11,11,L0|L1}, /* 0c: 0111 0100 0000 1100 xxxx xxxx */
- {ANI_E_xx, 3,11,11,L0|L1}, /* 0d: 0111 0100 0000 1101 xxxx xxxx */
- {ANI_H_xx, 3,11,11,L0|L1}, /* 0e: 0111 0100 0000 1110 xxxx xxxx */
- {ANI_L_xx, 3,11,11,L0|L1}, /* 0f: 0111 0100 0000 1111 xxxx xxxx */
-
- {XRI_V_xx, 3,11,11,L0|L1}, /* 10: 0111 0100 0001 0000 xxxx xxxx */
- {XRI_A_xx, 3,11,11,L0|L1}, /* 11: 0111 0100 0001 0001 xxxx xxxx */
- {XRI_B_xx, 3,11,11,L0|L1}, /* 12: 0111 0100 0001 0010 xxxx xxxx */
- {XRI_C_xx, 3,11,11,L0|L1}, /* 13: 0111 0100 0001 0011 xxxx xxxx */
- {XRI_D_xx, 3,11,11,L0|L1}, /* 14: 0111 0100 0001 0100 xxxx xxxx */
- {XRI_E_xx, 3,11,11,L0|L1}, /* 15: 0111 0100 0001 0101 xxxx xxxx */
- {XRI_H_xx, 3,11,11,L0|L1}, /* 16: 0111 0100 0001 0110 xxxx xxxx */
- {XRI_L_xx, 3,11,11,L0|L1}, /* 17: 0111 0100 0001 0111 xxxx xxxx */
- {ORI_V_xx, 3,11,11,L0|L1}, /* 18: 0111 0100 0001 1000 xxxx xxxx */
- {ORI_A_xx, 3,11,11,L0|L1}, /* 19: 0111 0100 0001 1001 xxxx xxxx */
- {ORI_B_xx, 3,11,11,L0|L1}, /* 1a: 0111 0100 0001 1010 xxxx xxxx */
- {ORI_C_xx, 3,11,11,L0|L1}, /* 1b: 0111 0100 0001 1011 xxxx xxxx */
- {ORI_D_xx, 3,11,11,L0|L1}, /* 1c: 0111 0100 0001 1100 xxxx xxxx */
- {ORI_E_xx, 3,11,11,L0|L1}, /* 1d: 0111 0100 0001 1101 xxxx xxxx */
- {ORI_H_xx, 3,11,11,L0|L1}, /* 1e: 0111 0100 0001 1110 xxxx xxxx */
- {ORI_L_xx, 3,11,11,L0|L1}, /* 1f: 0111 0100 0001 1111 xxxx xxxx */
-
- {ADINC_V_xx, 3,11,11,L0|L1}, /* 20: 0111 0100 0010 0000 xxxx xxxx */
- {ADINC_A_xx, 3,11,11,L0|L1}, /* 21: 0111 0100 0010 0001 xxxx xxxx */
- {ADINC_B_xx, 3,11,11,L0|L1}, /* 22: 0111 0100 0010 0010 xxxx xxxx */
- {ADINC_C_xx, 3,11,11,L0|L1}, /* 23: 0111 0100 0010 0011 xxxx xxxx */
- {ADINC_D_xx, 3,11,11,L0|L1}, /* 24: 0111 0100 0010 0100 xxxx xxxx */
- {ADINC_E_xx, 3,11,11,L0|L1}, /* 25: 0111 0100 0010 0101 xxxx xxxx */
- {ADINC_H_xx, 3,11,11,L0|L1}, /* 26: 0111 0100 0010 0110 xxxx xxxx */
- {ADINC_L_xx, 3,11,11,L0|L1}, /* 27: 0111 0100 0010 0111 xxxx xxxx */
- {GTI_V_xx, 3,11,11,L0|L1}, /* 28: 0111 0100 0010 1000 xxxx xxxx */
- {GTI_A_xx, 3,11,11,L0|L1}, /* 29: 0111 0100 0010 1001 xxxx xxxx */
- {GTI_B_xx, 3,11,11,L0|L1}, /* 2a: 0111 0100 0010 1010 xxxx xxxx */
- {GTI_C_xx, 3,11,11,L0|L1}, /* 2b: 0111 0100 0010 1011 xxxx xxxx */
- {GTI_D_xx, 3,11,11,L0|L1}, /* 2c: 0111 0100 0010 1100 xxxx xxxx */
- {GTI_E_xx, 3,11,11,L0|L1}, /* 2d: 0111 0100 0010 1101 xxxx xxxx */
- {GTI_H_xx, 3,11,11,L0|L1}, /* 2e: 0111 0100 0010 1110 xxxx xxxx */
- {GTI_L_xx, 3,11,11,L0|L1}, /* 2f: 0111 0100 0010 1111 xxxx xxxx */
-
- {SUINB_V_xx, 3,11,11,L0|L1}, /* 30: 0111 0100 0011 0000 xxxx xxxx */
- {SUINB_A_xx, 3,11,11,L0|L1}, /* 31: 0111 0100 0011 0001 xxxx xxxx */
- {SUINB_B_xx, 3,11,11,L0|L1}, /* 32: 0111 0100 0011 0010 xxxx xxxx */
- {SUINB_C_xx, 3,11,11,L0|L1}, /* 33: 0111 0100 0011 0011 xxxx xxxx */
- {SUINB_D_xx, 3,11,11,L0|L1}, /* 34: 0111 0100 0011 0100 xxxx xxxx */
- {SUINB_E_xx, 3,11,11,L0|L1}, /* 35: 0111 0100 0011 0101 xxxx xxxx */
- {SUINB_H_xx, 3,11,11,L0|L1}, /* 36: 0111 0100 0011 0110 xxxx xxxx */
- {SUINB_L_xx, 3,11,11,L0|L1}, /* 37: 0111 0100 0011 0111 xxxx xxxx */
- {LTI_V_xx, 3,11,11,L0|L1}, /* 38: 0111 0100 0011 1000 xxxx xxxx */
- {LTI_A_xx, 3,11,11,L0|L1}, /* 39: 0111 0100 0011 1001 xxxx xxxx */
- {LTI_B_xx, 3,11,11,L0|L1}, /* 3a: 0111 0100 0011 1010 xxxx xxxx */
- {LTI_C_xx, 3,11,11,L0|L1}, /* 3b: 0111 0100 0011 1011 xxxx xxxx */
- {LTI_D_xx, 3,11,11,L0|L1}, /* 3c: 0111 0100 0011 1100 xxxx xxxx */
- {LTI_E_xx, 3,11,11,L0|L1}, /* 3d: 0111 0100 0011 1101 xxxx xxxx */
- {LTI_H_xx, 3,11,11,L0|L1}, /* 3e: 0111 0100 0011 1110 xxxx xxxx */
- {LTI_L_xx, 3,11,11,L0|L1}, /* 3f: 0111 0100 0011 1111 xxxx xxxx */
-
- {ADI_V_xx, 3,11,11,L0|L1}, /* 40: 0111 0100 0100 0000 xxxx xxxx */
- {ADI_A_xx, 3,11,11,L0|L1}, /* 41: 0111 0100 0100 0001 xxxx xxxx */
- {ADI_B_xx, 3,11,11,L0|L1}, /* 42: 0111 0100 0100 0010 xxxx xxxx */
- {ADI_C_xx, 3,11,11,L0|L1}, /* 43: 0111 0100 0100 0011 xxxx xxxx */
- {ADI_D_xx, 3,11,11,L0|L1}, /* 44: 0111 0100 0100 0100 xxxx xxxx */
- {ADI_E_xx, 3,11,11,L0|L1}, /* 45: 0111 0100 0100 0101 xxxx xxxx */
- {ADI_H_xx, 3,11,11,L0|L1}, /* 46: 0111 0100 0100 0110 xxxx xxxx */
- {ADI_L_xx, 3,11,11,L0|L1}, /* 47: 0111 0100 0100 0111 xxxx xxxx */
- {ONI_V_xx, 3,11,11,L0|L1}, /* 48: 0111 0100 0100 1000 xxxx xxxx */
- {ONI_A_xx, 3,11,11,L0|L1}, /* 49: 0111 0100 0100 1001 xxxx xxxx */
- {ONI_B_xx, 3,11,11,L0|L1}, /* 4a: 0111 0100 0100 1010 xxxx xxxx */
- {ONI_C_xx, 3,11,11,L0|L1}, /* 4b: 0111 0100 0100 1011 xxxx xxxx */
- {ONI_D_xx, 3,11,11,L0|L1}, /* 4c: 0111 0100 0100 1100 xxxx xxxx */
- {ONI_E_xx, 3,11,11,L0|L1}, /* 4d: 0111 0100 0100 1101 xxxx xxxx */
- {ONI_H_xx, 3,11,11,L0|L1}, /* 4e: 0111 0100 0100 1110 xxxx xxxx */
- {ONI_L_xx, 3,11,11,L0|L1}, /* 4f: 0111 0100 0100 1111 xxxx xxxx */
-
- {ACI_V_xx, 3,11,11,L0|L1}, /* 50: 0111 0100 0101 0000 xxxx xxxx */
- {ACI_A_xx, 3,11,11,L0|L1}, /* 51: 0111 0100 0101 0001 xxxx xxxx */
- {ACI_B_xx, 3,11,11,L0|L1}, /* 52: 0111 0100 0101 0010 xxxx xxxx */
- {ACI_C_xx, 3,11,11,L0|L1}, /* 53: 0111 0100 0101 0011 xxxx xxxx */
- {ACI_D_xx, 3,11,11,L0|L1}, /* 54: 0111 0100 0101 0100 xxxx xxxx */
- {ACI_E_xx, 3,11,11,L0|L1}, /* 55: 0111 0100 0101 0101 xxxx xxxx */
- {ACI_H_xx, 3,11,11,L0|L1}, /* 56: 0111 0100 0101 0110 xxxx xxxx */
- {ACI_L_xx, 3,11,11,L0|L1}, /* 57: 0111 0100 0101 0111 xxxx xxxx */
- {OFFI_V_xx, 3,11,11,L0|L1}, /* 58: 0111 0100 0101 1000 xxxx xxxx */
- {OFFI_A_xx, 3,11,11,L0|L1}, /* 59: 0111 0100 0101 1001 xxxx xxxx */
- {OFFI_B_xx, 3,11,11,L0|L1}, /* 5a: 0111 0100 0101 1010 xxxx xxxx */
- {OFFI_C_xx, 3,11,11,L0|L1}, /* 5b: 0111 0100 0101 1011 xxxx xxxx */
- {OFFI_D_xx, 3,11,11,L0|L1}, /* 5c: 0111 0100 0101 1100 xxxx xxxx */
- {OFFI_E_xx, 3,11,11,L0|L1}, /* 5d: 0111 0100 0101 1101 xxxx xxxx */
- {OFFI_H_xx, 3,11,11,L0|L1}, /* 5e: 0111 0100 0101 1110 xxxx xxxx */
- {OFFI_L_xx, 3,11,11,L0|L1}, /* 5f: 0111 0100 0101 1111 xxxx xxxx */
-
- {SUI_V_xx, 3,11,11,L0|L1}, /* 60: 0111 0100 0110 0000 xxxx xxxx */
- {SUI_A_xx, 3,11,11,L0|L1}, /* 61: 0111 0100 0110 0001 xxxx xxxx */
- {SUI_B_xx, 3,11,11,L0|L1}, /* 62: 0111 0100 0110 0010 xxxx xxxx */
- {SUI_C_xx, 3,11,11,L0|L1}, /* 63: 0111 0100 0110 0011 xxxx xxxx */
- {SUI_D_xx, 3,11,11,L0|L1}, /* 64: 0111 0100 0110 0100 xxxx xxxx */
- {SUI_E_xx, 3,11,11,L0|L1}, /* 65: 0111 0100 0110 0101 xxxx xxxx */
- {SUI_H_xx, 3,11,11,L0|L1}, /* 66: 0111 0100 0110 0110 xxxx xxxx */
- {SUI_L_xx, 3,11,11,L0|L1}, /* 67: 0111 0100 0110 0111 xxxx xxxx */
- {NEI_V_xx, 3,11,11,L0|L1}, /* 68: 0111 0100 0110 1000 xxxx xxxx */
- {NEI_A_xx, 3,11,11,L0|L1}, /* 69: 0111 0100 0110 1001 xxxx xxxx */
- {NEI_B_xx, 3,11,11,L0|L1}, /* 6a: 0111 0100 0110 1010 xxxx xxxx */
- {NEI_C_xx, 3,11,11,L0|L1}, /* 6b: 0111 0100 0110 1011 xxxx xxxx */
- {NEI_D_xx, 3,11,11,L0|L1}, /* 6c: 0111 0100 0110 1100 xxxx xxxx */
- {NEI_E_xx, 3,11,11,L0|L1}, /* 6d: 0111 0100 0110 1101 xxxx xxxx */
- {NEI_H_xx, 3,11,11,L0|L1}, /* 6e: 0111 0100 0110 1110 xxxx xxxx */
- {NEI_L_xx, 3,11,11,L0|L1}, /* 6f: 0111 0100 0110 1111 xxxx xxxx */
-
- {SBI_V_xx, 3,11,11,L0|L1}, /* 70: 0111 0100 0111 0000 xxxx xxxx */
- {SBI_A_xx, 3,11,11,L0|L1}, /* 71: 0111 0100 0111 0001 xxxx xxxx */
- {SBI_B_xx, 3,11,11,L0|L1}, /* 72: 0111 0100 0111 0010 xxxx xxxx */
- {SBI_C_xx, 3,11,11,L0|L1}, /* 73: 0111 0100 0111 0011 xxxx xxxx */
- {SBI_D_xx, 3,11,11,L0|L1}, /* 74: 0111 0100 0111 0100 xxxx xxxx */
- {SBI_E_xx, 3,11,11,L0|L1}, /* 75: 0111 0100 0111 0101 xxxx xxxx */
- {SBI_H_xx, 3,11,11,L0|L1}, /* 76: 0111 0100 0111 0110 xxxx xxxx */
- {SBI_L_xx, 3,11,11,L0|L1}, /* 77: 0111 0100 0111 0111 xxxx xxxx */
- {EQI_V_xx, 3,11,11,L0|L1}, /* 78: 0111 0100 0111 1000 xxxx xxxx */
- {EQI_A_xx, 3,11,11,L0|L1}, /* 79: 0111 0100 0111 1001 xxxx xxxx */
- {EQI_B_xx, 3,11,11,L0|L1}, /* 7a: 0111 0100 0111 1010 xxxx xxxx */
- {EQI_C_xx, 3,11,11,L0|L1}, /* 7b: 0111 0100 0111 1011 xxxx xxxx */
- {EQI_D_xx, 3,11,11,L0|L1}, /* 7c: 0111 0100 0111 1100 xxxx xxxx */
- {EQI_E_xx, 3,11,11,L0|L1}, /* 7d: 0111 0100 0111 1101 xxxx xxxx */
- {EQI_H_xx, 3,11,11,L0|L1}, /* 7e: 0111 0100 0111 1110 xxxx xxxx */
- {EQI_L_xx, 3,11,11,L0|L1}, /* 7f: 0111 0100 0111 1111 xxxx xxxx */
-
- {illegal2, 2, 8, 8,L0|L1}, /* 80: 0111 0100 1000 0000 */
- {illegal2, 2, 8, 8,L0|L1}, /* 81: 0111 0100 1000 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 82: 0111 0100 1000 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 83: 0111 0100 1000 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 84: 0111 0100 1000 0100 */
- {illegal2, 2, 8, 8,L0|L1}, /* 85: 0111 0100 1000 0101 */
- {illegal2, 2, 8, 8,L0|L1}, /* 86: 0111 0100 1000 0110 */
- {illegal2, 2, 8, 8,L0|L1}, /* 87: 0111 0100 1000 0111 */
- {ANAW_wa, 3,14,11,L0|L1}, /* 88: 0111 0100 1000 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* 89: 0111 0100 1000 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0111 0100 1000 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0111 0100 1000 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0111 0100 1000 1100 */
- {DAN_EA_BC, 2,11,11,L0|L1}, /* 8d: 0111 0100 1000 1101 */
- {DAN_EA_DE, 2,11,11,L0|L1}, /* 8e: 0111 0100 1000 1110 */
- {DAN_EA_HL, 2,11,11,L0|L1}, /* 8f: 0111 0100 1000 1111 */
-
- {XRAW_wa, 3,14,11,L0|L1}, /* 90: 0111 0100 1001 0000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* 91: 0111 0100 1001 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 92: 0111 0100 1001 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 93: 0111 0100 1001 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 94: 0111 0100 1001 0100 */
- {DXR_EA_BC, 2,11,11,L0|L1}, /* 95: 0111 0100 1001 0101 */
- {DXR_EA_DE, 2,11,11,L0|L1}, /* 96: 0111 0100 1001 0110 */
- {DXR_EA_HL, 2,11,11,L0|L1}, /* 97: 0111 0100 1001 0111 */
- {ORAW_wa, 3,14,11,L0|L1}, /* 98: 0111 0100 1001 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* 99: 0111 0100 1001 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0111 0100 1001 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0111 0100 1001 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0111 0100 1001 1100 */
- {DOR_EA_BC, 2,11,11,L0|L1}, /* 9d: 0111 0100 1001 1101 */
- {DOR_EA_DE, 2,11,11,L0|L1}, /* 9e: 0111 0100 1001 1110 */
- {DOR_EA_HL, 2,11,11,L0|L1}, /* 9f: 0111 0100 1001 1111 */
-
- {ADDNCW_wa, 3,14,11,L0|L1}, /* a0: 0111 0100 1010 0000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* a1: 0111 0100 1010 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* a2: 0111 0100 1010 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* a3: 0111 0100 1010 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* a4: 0111 0100 1010 0100 */
- {DADDNC_EA_BC, 2,11,11,L0|L1}, /* a5: 0111 0100 1010 0101 */
- {DADDNC_EA_DE, 2,11,11,L0|L1}, /* a6: 0111 0100 1010 0110 */
- {DADDNC_EA_HL, 2,11,11,L0|L1}, /* a7: 0111 0100 1010 0111 */
- {GTAW_wa, 3,14,11,L0|L1}, /* a8: 0111 0100 1010 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* a9: 0111 0100 1010 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* aa: 0111 0100 1010 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* ab: 0111 0100 1010 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* ac: 0111 0100 1010 1100 */
- {DGT_EA_BC, 2,11,11,L0|L1}, /* ad: 0111 0100 1010 1101 */
- {DGT_EA_DE, 2,11,11,L0|L1}, /* ae: 0111 0100 1010 1110 */
- {DGT_EA_HL, 2,11,11,L0|L1}, /* af: 0111 0100 1010 1111 */
-
- {SUBNBW_wa, 3,14,11,L0|L1}, /* b0: 0111 0100 1011 0000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* b1: 0111 0100 1011 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* b2: 0111 0100 1011 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* b3: 0111 0100 1011 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* b4: 0111 0100 1011 0100 */
- {DSUBNB_EA_BC, 2,11,11,L0|L1}, /* b5: 0111 0100 1011 0101 */
- {DSUBNB_EA_DE, 2,11,11,L0|L1}, /* b6: 0111 0100 1011 0110 */
- {DSUBNB_EA_HL, 2,11,11,L0|L1}, /* b7: 0111 0100 1011 0111 */
- {LTAW_wa, 3,14,11,L0|L1}, /* b8: 0111 0100 1011 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* b9: 0111 0100 1011 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ba: 0111 0100 1011 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* bb: 0111 0100 1011 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* bc: 0111 0100 1011 1100 */
- {DLT_EA_BC, 2,11,11,L0|L1}, /* bd: 0111 0100 1011 1101 */
- {DLT_EA_DE, 2,11,11,L0|L1}, /* be: 0111 0100 1011 1110 */
- {DLT_EA_HL, 2,11,11,L0|L1}, /* bf: 0111 0100 1011 1111 */
-
- {ADDW_wa, 3,14,11,L0|L1}, /* c0: 0111 0100 1100 0000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* c1: 0111 0100 1100 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* c2: 0111 0100 1100 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* c3: 0111 0100 1100 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* c4: 0111 0100 1100 0100 */
- {DADD_EA_BC, 2,11,11,L0|L1}, /* c5: 0111 0100 1100 0101 */
- {DADD_EA_DE, 2,11,11,L0|L1}, /* c6: 0111 0100 1100 0110 */
- {DADD_EA_HL, 2,11,11,L0|L1}, /* c7: 0111 0100 1100 0111 */
- {ONAW_wa, 3,14,11,L0|L1}, /* c8: 0111 0100 1100 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* c9: 0111 0100 1100 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ca: 0111 0100 1100 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* cb: 0111 0100 1100 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* cc: 0111 0100 1100 1100 */
- {DON_EA_BC, 2,11,11,L0|L1}, /* cd: 0111 0100 1100 1101 */
- {DON_EA_DE, 2,11,11,L0|L1}, /* ce: 0111 0100 1100 1110 */
- {DON_EA_HL, 2,11,11,L0|L1}, /* cf: 0111 0100 1100 1111 */
-
- {ADCW_wa, 3,14,11,L0|L1}, /* d0: 0111 0100 1101 0000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* d1: 0111 0100 1101 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* d2: 0111 0100 1101 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* d3: 0111 0100 1101 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* d4: 0111 0100 1101 0100 */
- {DADC_EA_BC, 2,11,11,L0|L1}, /* d5: 0111 0100 1101 0101 */
- {DADC_EA_DE, 2,11,11,L0|L1}, /* d6: 0111 0100 1101 0110 */
- {DADC_EA_HL, 2,11,11,L0|L1}, /* d7: 0111 0100 1101 0111 */
- {OFFAW_wa, 3,14,11,L0|L1}, /* d8: 0111 0100 1101 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* d9: 0111 0100 1101 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* da: 0111 0100 1101 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* db: 0111 0100 1101 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* dc: 0111 0100 1101 1100 */
- {DOFF_EA_BC, 2,11,11,L0|L1}, /* dd: 0111 0100 1101 1101 */
- {DOFF_EA_DE, 2,11,11,L0|L1}, /* de: 0111 0100 1101 1110 */
- {DOFF_EA_HL, 2,11,11,L0|L1}, /* df: 0111 0100 1101 1111 */
-
- {SUBW_wa, 3,14,11,L0|L1}, /* e0: 0111 0100 1110 0000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* e1: 0111 0100 1110 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* e2: 0111 0100 1110 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* e3: 0111 0100 1110 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* e4: 0111 0100 1110 0100 */
- {DSUB_EA_BC, 2,11,11,L0|L1}, /* e5: 0111 0100 1110 0101 */
- {DSUB_EA_DE, 2,11,11,L0|L1}, /* e6: 0111 0100 1110 0110 */
- {DSUB_EA_HL, 2,11,11,L0|L1}, /* e7: 0111 0100 1110 0111 */
- {NEAW_wa, 3,14,11,L0|L1}, /* e8: 0111 0100 1110 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* e9: 0111 0100 1110 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* ea: 0111 0100 1110 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* eb: 0111 0100 1110 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* ec: 0111 0100 1110 1100 */
- {DNE_EA_BC, 2,11,11,L0|L1}, /* ed: 0111 0100 1110 1101 */
- {DNE_EA_DE, 2,11,11,L0|L1}, /* ee: 0111 0100 1110 1110 */
- {DNE_EA_HL, 2,11,11,L0|L1}, /* ef: 0111 0100 1110 1111 */
-
- {SBBW_wa, 3,14,11,L0|L1}, /* f0: 0111 0100 1111 0000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* f1: 0111 0100 1111 0001 */
- {illegal2, 2, 8, 8,L0|L1}, /* f2: 0111 0100 1111 0010 */
- {illegal2, 2, 8, 8,L0|L1}, /* f3: 0111 0100 1111 0011 */
- {illegal2, 2, 8, 8,L0|L1}, /* f4: 0111 0100 1111 0100 */
- {DSBB_EA_BC, 2,11,11,L0|L1}, /* f5: 0111 0100 1111 0101 */
- {DSBB_EA_DE, 2,11,11,L0|L1}, /* f6: 0111 0100 1111 0110 */
- {DSBB_EA_HL, 2,11,11,L0|L1}, /* f7: 0111 0100 1111 0111 */
- {EQAW_wa, 3,14,11,L0|L1}, /* f8: 0111 0100 1111 1000 oooo oooo */
- {illegal2, 2, 8, 8,L0|L1}, /* f9: 0111 0100 1111 1001 */
- {illegal2, 2, 8, 8,L0|L1}, /* fa: 0111 0100 1111 1010 */
- {illegal2, 2, 8, 8,L0|L1}, /* fb: 0111 0100 1111 1011 */
- {illegal2, 2, 8, 8,L0|L1}, /* fc: 0111 0100 1111 1100 */
- {DEQ_EA_BC, 2,11,11,L0|L1}, /* fd: 0111 0100 1111 1101 */
- {DEQ_EA_DE, 2,11,11,L0|L1}, /* fe: 0111 0100 1111 1110 */
- {DEQ_EA_HL, 2,11,11,L0|L1} /* ff: 0111 0100 1111 1111 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 00: 0111 0100 0000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 01: 0111 0100 0000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 02: 0111 0100 0000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 03: 0111 0100 0000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 04: 0111 0100 0000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 05: 0111 0100 0000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 06: 0111 0100 0000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 07: 0111 0100 0000 0111 */
+ {ANI_V_xx, 3,11,11,L0|L1}, /* 08: 0111 0100 0000 1000 xxxx xxxx */
+ {ANI_A_xx, 3,11,11,L0|L1}, /* 09: 0111 0100 0000 1001 xxxx xxxx */
+ {ANI_B_xx, 3,11,11,L0|L1}, /* 0a: 0111 0100 0000 1010 xxxx xxxx */
+ {ANI_C_xx, 3,11,11,L0|L1}, /* 0b: 0111 0100 0000 1011 xxxx xxxx */
+ {ANI_D_xx, 3,11,11,L0|L1}, /* 0c: 0111 0100 0000 1100 xxxx xxxx */
+ {ANI_E_xx, 3,11,11,L0|L1}, /* 0d: 0111 0100 0000 1101 xxxx xxxx */
+ {ANI_H_xx, 3,11,11,L0|L1}, /* 0e: 0111 0100 0000 1110 xxxx xxxx */
+ {ANI_L_xx, 3,11,11,L0|L1}, /* 0f: 0111 0100 0000 1111 xxxx xxxx */
+
+ {XRI_V_xx, 3,11,11,L0|L1}, /* 10: 0111 0100 0001 0000 xxxx xxxx */
+ {XRI_A_xx, 3,11,11,L0|L1}, /* 11: 0111 0100 0001 0001 xxxx xxxx */
+ {XRI_B_xx, 3,11,11,L0|L1}, /* 12: 0111 0100 0001 0010 xxxx xxxx */
+ {XRI_C_xx, 3,11,11,L0|L1}, /* 13: 0111 0100 0001 0011 xxxx xxxx */
+ {XRI_D_xx, 3,11,11,L0|L1}, /* 14: 0111 0100 0001 0100 xxxx xxxx */
+ {XRI_E_xx, 3,11,11,L0|L1}, /* 15: 0111 0100 0001 0101 xxxx xxxx */
+ {XRI_H_xx, 3,11,11,L0|L1}, /* 16: 0111 0100 0001 0110 xxxx xxxx */
+ {XRI_L_xx, 3,11,11,L0|L1}, /* 17: 0111 0100 0001 0111 xxxx xxxx */
+ {ORI_V_xx, 3,11,11,L0|L1}, /* 18: 0111 0100 0001 1000 xxxx xxxx */
+ {ORI_A_xx, 3,11,11,L0|L1}, /* 19: 0111 0100 0001 1001 xxxx xxxx */
+ {ORI_B_xx, 3,11,11,L0|L1}, /* 1a: 0111 0100 0001 1010 xxxx xxxx */
+ {ORI_C_xx, 3,11,11,L0|L1}, /* 1b: 0111 0100 0001 1011 xxxx xxxx */
+ {ORI_D_xx, 3,11,11,L0|L1}, /* 1c: 0111 0100 0001 1100 xxxx xxxx */
+ {ORI_E_xx, 3,11,11,L0|L1}, /* 1d: 0111 0100 0001 1101 xxxx xxxx */
+ {ORI_H_xx, 3,11,11,L0|L1}, /* 1e: 0111 0100 0001 1110 xxxx xxxx */
+ {ORI_L_xx, 3,11,11,L0|L1}, /* 1f: 0111 0100 0001 1111 xxxx xxxx */
+
+ {ADINC_V_xx, 3,11,11,L0|L1}, /* 20: 0111 0100 0010 0000 xxxx xxxx */
+ {ADINC_A_xx, 3,11,11,L0|L1}, /* 21: 0111 0100 0010 0001 xxxx xxxx */
+ {ADINC_B_xx, 3,11,11,L0|L1}, /* 22: 0111 0100 0010 0010 xxxx xxxx */
+ {ADINC_C_xx, 3,11,11,L0|L1}, /* 23: 0111 0100 0010 0011 xxxx xxxx */
+ {ADINC_D_xx, 3,11,11,L0|L1}, /* 24: 0111 0100 0010 0100 xxxx xxxx */
+ {ADINC_E_xx, 3,11,11,L0|L1}, /* 25: 0111 0100 0010 0101 xxxx xxxx */
+ {ADINC_H_xx, 3,11,11,L0|L1}, /* 26: 0111 0100 0010 0110 xxxx xxxx */
+ {ADINC_L_xx, 3,11,11,L0|L1}, /* 27: 0111 0100 0010 0111 xxxx xxxx */
+ {GTI_V_xx, 3,11,11,L0|L1}, /* 28: 0111 0100 0010 1000 xxxx xxxx */
+ {GTI_A_xx, 3,11,11,L0|L1}, /* 29: 0111 0100 0010 1001 xxxx xxxx */
+ {GTI_B_xx, 3,11,11,L0|L1}, /* 2a: 0111 0100 0010 1010 xxxx xxxx */
+ {GTI_C_xx, 3,11,11,L0|L1}, /* 2b: 0111 0100 0010 1011 xxxx xxxx */
+ {GTI_D_xx, 3,11,11,L0|L1}, /* 2c: 0111 0100 0010 1100 xxxx xxxx */
+ {GTI_E_xx, 3,11,11,L0|L1}, /* 2d: 0111 0100 0010 1101 xxxx xxxx */
+ {GTI_H_xx, 3,11,11,L0|L1}, /* 2e: 0111 0100 0010 1110 xxxx xxxx */
+ {GTI_L_xx, 3,11,11,L0|L1}, /* 2f: 0111 0100 0010 1111 xxxx xxxx */
+
+ {SUINB_V_xx, 3,11,11,L0|L1}, /* 30: 0111 0100 0011 0000 xxxx xxxx */
+ {SUINB_A_xx, 3,11,11,L0|L1}, /* 31: 0111 0100 0011 0001 xxxx xxxx */
+ {SUINB_B_xx, 3,11,11,L0|L1}, /* 32: 0111 0100 0011 0010 xxxx xxxx */
+ {SUINB_C_xx, 3,11,11,L0|L1}, /* 33: 0111 0100 0011 0011 xxxx xxxx */
+ {SUINB_D_xx, 3,11,11,L0|L1}, /* 34: 0111 0100 0011 0100 xxxx xxxx */
+ {SUINB_E_xx, 3,11,11,L0|L1}, /* 35: 0111 0100 0011 0101 xxxx xxxx */
+ {SUINB_H_xx, 3,11,11,L0|L1}, /* 36: 0111 0100 0011 0110 xxxx xxxx */
+ {SUINB_L_xx, 3,11,11,L0|L1}, /* 37: 0111 0100 0011 0111 xxxx xxxx */
+ {LTI_V_xx, 3,11,11,L0|L1}, /* 38: 0111 0100 0011 1000 xxxx xxxx */
+ {LTI_A_xx, 3,11,11,L0|L1}, /* 39: 0111 0100 0011 1001 xxxx xxxx */
+ {LTI_B_xx, 3,11,11,L0|L1}, /* 3a: 0111 0100 0011 1010 xxxx xxxx */
+ {LTI_C_xx, 3,11,11,L0|L1}, /* 3b: 0111 0100 0011 1011 xxxx xxxx */
+ {LTI_D_xx, 3,11,11,L0|L1}, /* 3c: 0111 0100 0011 1100 xxxx xxxx */
+ {LTI_E_xx, 3,11,11,L0|L1}, /* 3d: 0111 0100 0011 1101 xxxx xxxx */
+ {LTI_H_xx, 3,11,11,L0|L1}, /* 3e: 0111 0100 0011 1110 xxxx xxxx */
+ {LTI_L_xx, 3,11,11,L0|L1}, /* 3f: 0111 0100 0011 1111 xxxx xxxx */
+
+ {ADI_V_xx, 3,11,11,L0|L1}, /* 40: 0111 0100 0100 0000 xxxx xxxx */
+ {ADI_A_xx, 3,11,11,L0|L1}, /* 41: 0111 0100 0100 0001 xxxx xxxx */
+ {ADI_B_xx, 3,11,11,L0|L1}, /* 42: 0111 0100 0100 0010 xxxx xxxx */
+ {ADI_C_xx, 3,11,11,L0|L1}, /* 43: 0111 0100 0100 0011 xxxx xxxx */
+ {ADI_D_xx, 3,11,11,L0|L1}, /* 44: 0111 0100 0100 0100 xxxx xxxx */
+ {ADI_E_xx, 3,11,11,L0|L1}, /* 45: 0111 0100 0100 0101 xxxx xxxx */
+ {ADI_H_xx, 3,11,11,L0|L1}, /* 46: 0111 0100 0100 0110 xxxx xxxx */
+ {ADI_L_xx, 3,11,11,L0|L1}, /* 47: 0111 0100 0100 0111 xxxx xxxx */
+ {ONI_V_xx, 3,11,11,L0|L1}, /* 48: 0111 0100 0100 1000 xxxx xxxx */
+ {ONI_A_xx, 3,11,11,L0|L1}, /* 49: 0111 0100 0100 1001 xxxx xxxx */
+ {ONI_B_xx, 3,11,11,L0|L1}, /* 4a: 0111 0100 0100 1010 xxxx xxxx */
+ {ONI_C_xx, 3,11,11,L0|L1}, /* 4b: 0111 0100 0100 1011 xxxx xxxx */
+ {ONI_D_xx, 3,11,11,L0|L1}, /* 4c: 0111 0100 0100 1100 xxxx xxxx */
+ {ONI_E_xx, 3,11,11,L0|L1}, /* 4d: 0111 0100 0100 1101 xxxx xxxx */
+ {ONI_H_xx, 3,11,11,L0|L1}, /* 4e: 0111 0100 0100 1110 xxxx xxxx */
+ {ONI_L_xx, 3,11,11,L0|L1}, /* 4f: 0111 0100 0100 1111 xxxx xxxx */
+
+ {ACI_V_xx, 3,11,11,L0|L1}, /* 50: 0111 0100 0101 0000 xxxx xxxx */
+ {ACI_A_xx, 3,11,11,L0|L1}, /* 51: 0111 0100 0101 0001 xxxx xxxx */
+ {ACI_B_xx, 3,11,11,L0|L1}, /* 52: 0111 0100 0101 0010 xxxx xxxx */
+ {ACI_C_xx, 3,11,11,L0|L1}, /* 53: 0111 0100 0101 0011 xxxx xxxx */
+ {ACI_D_xx, 3,11,11,L0|L1}, /* 54: 0111 0100 0101 0100 xxxx xxxx */
+ {ACI_E_xx, 3,11,11,L0|L1}, /* 55: 0111 0100 0101 0101 xxxx xxxx */
+ {ACI_H_xx, 3,11,11,L0|L1}, /* 56: 0111 0100 0101 0110 xxxx xxxx */
+ {ACI_L_xx, 3,11,11,L0|L1}, /* 57: 0111 0100 0101 0111 xxxx xxxx */
+ {OFFI_V_xx, 3,11,11,L0|L1}, /* 58: 0111 0100 0101 1000 xxxx xxxx */
+ {OFFI_A_xx, 3,11,11,L0|L1}, /* 59: 0111 0100 0101 1001 xxxx xxxx */
+ {OFFI_B_xx, 3,11,11,L0|L1}, /* 5a: 0111 0100 0101 1010 xxxx xxxx */
+ {OFFI_C_xx, 3,11,11,L0|L1}, /* 5b: 0111 0100 0101 1011 xxxx xxxx */
+ {OFFI_D_xx, 3,11,11,L0|L1}, /* 5c: 0111 0100 0101 1100 xxxx xxxx */
+ {OFFI_E_xx, 3,11,11,L0|L1}, /* 5d: 0111 0100 0101 1101 xxxx xxxx */
+ {OFFI_H_xx, 3,11,11,L0|L1}, /* 5e: 0111 0100 0101 1110 xxxx xxxx */
+ {OFFI_L_xx, 3,11,11,L0|L1}, /* 5f: 0111 0100 0101 1111 xxxx xxxx */
+
+ {SUI_V_xx, 3,11,11,L0|L1}, /* 60: 0111 0100 0110 0000 xxxx xxxx */
+ {SUI_A_xx, 3,11,11,L0|L1}, /* 61: 0111 0100 0110 0001 xxxx xxxx */
+ {SUI_B_xx, 3,11,11,L0|L1}, /* 62: 0111 0100 0110 0010 xxxx xxxx */
+ {SUI_C_xx, 3,11,11,L0|L1}, /* 63: 0111 0100 0110 0011 xxxx xxxx */
+ {SUI_D_xx, 3,11,11,L0|L1}, /* 64: 0111 0100 0110 0100 xxxx xxxx */
+ {SUI_E_xx, 3,11,11,L0|L1}, /* 65: 0111 0100 0110 0101 xxxx xxxx */
+ {SUI_H_xx, 3,11,11,L0|L1}, /* 66: 0111 0100 0110 0110 xxxx xxxx */
+ {SUI_L_xx, 3,11,11,L0|L1}, /* 67: 0111 0100 0110 0111 xxxx xxxx */
+ {NEI_V_xx, 3,11,11,L0|L1}, /* 68: 0111 0100 0110 1000 xxxx xxxx */
+ {NEI_A_xx, 3,11,11,L0|L1}, /* 69: 0111 0100 0110 1001 xxxx xxxx */
+ {NEI_B_xx, 3,11,11,L0|L1}, /* 6a: 0111 0100 0110 1010 xxxx xxxx */
+ {NEI_C_xx, 3,11,11,L0|L1}, /* 6b: 0111 0100 0110 1011 xxxx xxxx */
+ {NEI_D_xx, 3,11,11,L0|L1}, /* 6c: 0111 0100 0110 1100 xxxx xxxx */
+ {NEI_E_xx, 3,11,11,L0|L1}, /* 6d: 0111 0100 0110 1101 xxxx xxxx */
+ {NEI_H_xx, 3,11,11,L0|L1}, /* 6e: 0111 0100 0110 1110 xxxx xxxx */
+ {NEI_L_xx, 3,11,11,L0|L1}, /* 6f: 0111 0100 0110 1111 xxxx xxxx */
+
+ {SBI_V_xx, 3,11,11,L0|L1}, /* 70: 0111 0100 0111 0000 xxxx xxxx */
+ {SBI_A_xx, 3,11,11,L0|L1}, /* 71: 0111 0100 0111 0001 xxxx xxxx */
+ {SBI_B_xx, 3,11,11,L0|L1}, /* 72: 0111 0100 0111 0010 xxxx xxxx */
+ {SBI_C_xx, 3,11,11,L0|L1}, /* 73: 0111 0100 0111 0011 xxxx xxxx */
+ {SBI_D_xx, 3,11,11,L0|L1}, /* 74: 0111 0100 0111 0100 xxxx xxxx */
+ {SBI_E_xx, 3,11,11,L0|L1}, /* 75: 0111 0100 0111 0101 xxxx xxxx */
+ {SBI_H_xx, 3,11,11,L0|L1}, /* 76: 0111 0100 0111 0110 xxxx xxxx */
+ {SBI_L_xx, 3,11,11,L0|L1}, /* 77: 0111 0100 0111 0111 xxxx xxxx */
+ {EQI_V_xx, 3,11,11,L0|L1}, /* 78: 0111 0100 0111 1000 xxxx xxxx */
+ {EQI_A_xx, 3,11,11,L0|L1}, /* 79: 0111 0100 0111 1001 xxxx xxxx */
+ {EQI_B_xx, 3,11,11,L0|L1}, /* 7a: 0111 0100 0111 1010 xxxx xxxx */
+ {EQI_C_xx, 3,11,11,L0|L1}, /* 7b: 0111 0100 0111 1011 xxxx xxxx */
+ {EQI_D_xx, 3,11,11,L0|L1}, /* 7c: 0111 0100 0111 1100 xxxx xxxx */
+ {EQI_E_xx, 3,11,11,L0|L1}, /* 7d: 0111 0100 0111 1101 xxxx xxxx */
+ {EQI_H_xx, 3,11,11,L0|L1}, /* 7e: 0111 0100 0111 1110 xxxx xxxx */
+ {EQI_L_xx, 3,11,11,L0|L1}, /* 7f: 0111 0100 0111 1111 xxxx xxxx */
+
+ {illegal2, 2, 8, 8,L0|L1}, /* 80: 0111 0100 1000 0000 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 81: 0111 0100 1000 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 82: 0111 0100 1000 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 83: 0111 0100 1000 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 84: 0111 0100 1000 0100 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 85: 0111 0100 1000 0101 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 86: 0111 0100 1000 0110 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 87: 0111 0100 1000 0111 */
+ {ANAW_wa, 3,14,11,L0|L1}, /* 88: 0111 0100 1000 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* 89: 0111 0100 1000 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8a: 0111 0100 1000 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8b: 0111 0100 1000 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 8c: 0111 0100 1000 1100 */
+ {DAN_EA_BC, 2,11,11,L0|L1}, /* 8d: 0111 0100 1000 1101 */
+ {DAN_EA_DE, 2,11,11,L0|L1}, /* 8e: 0111 0100 1000 1110 */
+ {DAN_EA_HL, 2,11,11,L0|L1}, /* 8f: 0111 0100 1000 1111 */
+
+ {XRAW_wa, 3,14,11,L0|L1}, /* 90: 0111 0100 1001 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* 91: 0111 0100 1001 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 92: 0111 0100 1001 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 93: 0111 0100 1001 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 94: 0111 0100 1001 0100 */
+ {DXR_EA_BC, 2,11,11,L0|L1}, /* 95: 0111 0100 1001 0101 */
+ {DXR_EA_DE, 2,11,11,L0|L1}, /* 96: 0111 0100 1001 0110 */
+ {DXR_EA_HL, 2,11,11,L0|L1}, /* 97: 0111 0100 1001 0111 */
+ {ORAW_wa, 3,14,11,L0|L1}, /* 98: 0111 0100 1001 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* 99: 0111 0100 1001 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9a: 0111 0100 1001 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9b: 0111 0100 1001 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* 9c: 0111 0100 1001 1100 */
+ {DOR_EA_BC, 2,11,11,L0|L1}, /* 9d: 0111 0100 1001 1101 */
+ {DOR_EA_DE, 2,11,11,L0|L1}, /* 9e: 0111 0100 1001 1110 */
+ {DOR_EA_HL, 2,11,11,L0|L1}, /* 9f: 0111 0100 1001 1111 */
+
+ {ADDNCW_wa, 3,14,11,L0|L1}, /* a0: 0111 0100 1010 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* a1: 0111 0100 1010 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a2: 0111 0100 1010 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a3: 0111 0100 1010 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* a4: 0111 0100 1010 0100 */
+ {DADDNC_EA_BC, 2,11,11,L0|L1}, /* a5: 0111 0100 1010 0101 */
+ {DADDNC_EA_DE, 2,11,11,L0|L1}, /* a6: 0111 0100 1010 0110 */
+ {DADDNC_EA_HL, 2,11,11,L0|L1}, /* a7: 0111 0100 1010 0111 */
+ {GTAW_wa, 3,14,11,L0|L1}, /* a8: 0111 0100 1010 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* a9: 0111 0100 1010 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* aa: 0111 0100 1010 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ab: 0111 0100 1010 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ac: 0111 0100 1010 1100 */
+ {DGT_EA_BC, 2,11,11,L0|L1}, /* ad: 0111 0100 1010 1101 */
+ {DGT_EA_DE, 2,11,11,L0|L1}, /* ae: 0111 0100 1010 1110 */
+ {DGT_EA_HL, 2,11,11,L0|L1}, /* af: 0111 0100 1010 1111 */
+
+ {SUBNBW_wa, 3,14,11,L0|L1}, /* b0: 0111 0100 1011 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* b1: 0111 0100 1011 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b2: 0111 0100 1011 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b3: 0111 0100 1011 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* b4: 0111 0100 1011 0100 */
+ {DSUBNB_EA_BC, 2,11,11,L0|L1}, /* b5: 0111 0100 1011 0101 */
+ {DSUBNB_EA_DE, 2,11,11,L0|L1}, /* b6: 0111 0100 1011 0110 */
+ {DSUBNB_EA_HL, 2,11,11,L0|L1}, /* b7: 0111 0100 1011 0111 */
+ {LTAW_wa, 3,14,11,L0|L1}, /* b8: 0111 0100 1011 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* b9: 0111 0100 1011 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ba: 0111 0100 1011 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bb: 0111 0100 1011 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* bc: 0111 0100 1011 1100 */
+ {DLT_EA_BC, 2,11,11,L0|L1}, /* bd: 0111 0100 1011 1101 */
+ {DLT_EA_DE, 2,11,11,L0|L1}, /* be: 0111 0100 1011 1110 */
+ {DLT_EA_HL, 2,11,11,L0|L1}, /* bf: 0111 0100 1011 1111 */
+
+ {ADDW_wa, 3,14,11,L0|L1}, /* c0: 0111 0100 1100 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* c1: 0111 0100 1100 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c2: 0111 0100 1100 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c3: 0111 0100 1100 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* c4: 0111 0100 1100 0100 */
+ {DADD_EA_BC, 2,11,11,L0|L1}, /* c5: 0111 0100 1100 0101 */
+ {DADD_EA_DE, 2,11,11,L0|L1}, /* c6: 0111 0100 1100 0110 */
+ {DADD_EA_HL, 2,11,11,L0|L1}, /* c7: 0111 0100 1100 0111 */
+ {ONAW_wa, 3,14,11,L0|L1}, /* c8: 0111 0100 1100 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* c9: 0111 0100 1100 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ca: 0111 0100 1100 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cb: 0111 0100 1100 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* cc: 0111 0100 1100 1100 */
+ {DON_EA_BC, 2,11,11,L0|L1}, /* cd: 0111 0100 1100 1101 */
+ {DON_EA_DE, 2,11,11,L0|L1}, /* ce: 0111 0100 1100 1110 */
+ {DON_EA_HL, 2,11,11,L0|L1}, /* cf: 0111 0100 1100 1111 */
+
+ {ADCW_wa, 3,14,11,L0|L1}, /* d0: 0111 0100 1101 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* d1: 0111 0100 1101 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d2: 0111 0100 1101 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d3: 0111 0100 1101 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* d4: 0111 0100 1101 0100 */
+ {DADC_EA_BC, 2,11,11,L0|L1}, /* d5: 0111 0100 1101 0101 */
+ {DADC_EA_DE, 2,11,11,L0|L1}, /* d6: 0111 0100 1101 0110 */
+ {DADC_EA_HL, 2,11,11,L0|L1}, /* d7: 0111 0100 1101 0111 */
+ {OFFAW_wa, 3,14,11,L0|L1}, /* d8: 0111 0100 1101 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* d9: 0111 0100 1101 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* da: 0111 0100 1101 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* db: 0111 0100 1101 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* dc: 0111 0100 1101 1100 */
+ {DOFF_EA_BC, 2,11,11,L0|L1}, /* dd: 0111 0100 1101 1101 */
+ {DOFF_EA_DE, 2,11,11,L0|L1}, /* de: 0111 0100 1101 1110 */
+ {DOFF_EA_HL, 2,11,11,L0|L1}, /* df: 0111 0100 1101 1111 */
+
+ {SUBW_wa, 3,14,11,L0|L1}, /* e0: 0111 0100 1110 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* e1: 0111 0100 1110 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e2: 0111 0100 1110 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e3: 0111 0100 1110 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* e4: 0111 0100 1110 0100 */
+ {DSUB_EA_BC, 2,11,11,L0|L1}, /* e5: 0111 0100 1110 0101 */
+ {DSUB_EA_DE, 2,11,11,L0|L1}, /* e6: 0111 0100 1110 0110 */
+ {DSUB_EA_HL, 2,11,11,L0|L1}, /* e7: 0111 0100 1110 0111 */
+ {NEAW_wa, 3,14,11,L0|L1}, /* e8: 0111 0100 1110 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* e9: 0111 0100 1110 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ea: 0111 0100 1110 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* eb: 0111 0100 1110 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* ec: 0111 0100 1110 1100 */
+ {DNE_EA_BC, 2,11,11,L0|L1}, /* ed: 0111 0100 1110 1101 */
+ {DNE_EA_DE, 2,11,11,L0|L1}, /* ee: 0111 0100 1110 1110 */
+ {DNE_EA_HL, 2,11,11,L0|L1}, /* ef: 0111 0100 1110 1111 */
+
+ {SBBW_wa, 3,14,11,L0|L1}, /* f0: 0111 0100 1111 0000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* f1: 0111 0100 1111 0001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f2: 0111 0100 1111 0010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f3: 0111 0100 1111 0011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* f4: 0111 0100 1111 0100 */
+ {DSBB_EA_BC, 2,11,11,L0|L1}, /* f5: 0111 0100 1111 0101 */
+ {DSBB_EA_DE, 2,11,11,L0|L1}, /* f6: 0111 0100 1111 0110 */
+ {DSBB_EA_HL, 2,11,11,L0|L1}, /* f7: 0111 0100 1111 0111 */
+ {EQAW_wa, 3,14,11,L0|L1}, /* f8: 0111 0100 1111 1000 oooo oooo */
+ {illegal2, 2, 8, 8,L0|L1}, /* f9: 0111 0100 1111 1001 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fa: 0111 0100 1111 1010 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fb: 0111 0100 1111 1011 */
+ {illegal2, 2, 8, 8,L0|L1}, /* fc: 0111 0100 1111 1100 */
+ {DEQ_EA_BC, 2,11,11,L0|L1}, /* fd: 0111 0100 1111 1101 */
+ {DEQ_EA_DE, 2,11,11,L0|L1}, /* fe: 0111 0100 1111 1110 */
+ {DEQ_EA_HL, 2,11,11,L0|L1} /* ff: 0111 0100 1111 1111 */
};
/* main opcodes */
static const struct opcode_s opXX_7810[256] =
{
- {NOP, 1, 4, 4,L0|L1}, /* 00: 0000 0000 */
- {LDAW_wa, 2,10,10,L0|L1}, /* 01: 0000 0001 oooo oooo */
- {INX_SP, 1, 7, 7,L0|L1}, /* 02: 0000 0010 */
- {DCX_SP, 1, 7, 7,L0|L1}, /* 03: 0000 0011 */
- {LXI_S_w, 3,10,10,L0|L1}, /* 04: 0000 0100 llll llll hhhh hhhh */
- {ANIW_wa_xx, 3,19,19,L0|L1}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
- {illegal, 1, 4, 4,L0|L1}, /* 06: */
- {ANI_A_xx, 2, 7, 7,L0|L1}, /* 07: 0000 0111 xxxx xxxx */
- {MOV_A_EAH, 1, 4, 4,L0|L1}, /* 08: 0000 1000 */
- {MOV_A_EAL, 1, 4, 4,L0|L1}, /* 09: 0000 1001 */
- {MOV_A_B, 1, 4, 4,L0|L1}, /* 0a: 0000 1010 */
- {MOV_A_C, 1, 4, 4,L0|L1}, /* 0b: 0000 1011 */
- {MOV_A_D, 1, 4, 4,L0|L1}, /* 0c: 0000 1100 */
- {MOV_A_E, 1, 4, 4,L0|L1}, /* 0d: 0000 1101 */
- {MOV_A_H, 1, 4, 4,L0|L1}, /* 0e: 0000 1110 */
- {MOV_A_L, 1, 4, 4,L0|L1}, /* 0f: 0000 1111 */
-
- {EXA, 1, 4, 4,L0|L1}, /* 10: 0001 0000 */
- {EXX, 1, 4, 4,L0|L1}, /* 11: 0001 0001 */
- {INX_BC, 1, 7, 7,L0|L1}, /* 12: 0001 0010 */
- {DCX_BC, 1, 7, 7,L0|L1}, /* 13: 0001 0011 */
- {LXI_B_w, 3,10,10,L0|L1}, /* 14: 0001 0100 llll llll hhhh hhhh */
- {ORIW_wa_xx, 3,19,19,L0|L1}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
- {XRI_A_xx, 2, 7, 7,L0|L1}, /* 16: 0001 0110 xxxx xxxx */
- {ORI_A_xx, 2, 7, 7,L0|L1}, /* 17: 0001 0111 xxxx xxxx */
- {MOV_EAH_A, 1, 4, 4,L0|L1}, /* 18: 0001 1000 */
- {MOV_EAL_A, 1, 4, 4,L0|L1}, /* 19: 0001 1001 */
- {MOV_B_A, 1, 4, 4,L0|L1}, /* 1a: 0001 1010 */
- {MOV_C_A, 1, 4, 4,L0|L1}, /* 1b: 0001 1011 */
- {MOV_D_A, 1, 4, 4,L0|L1}, /* 1c: 0001 1100 */
- {MOV_E_A, 1, 4, 4,L0|L1}, /* 1d: 0001 1101 */
- {MOV_H_A, 1, 4, 4,L0|L1}, /* 1e: 0001 1110 */
- {MOV_L_A, 1, 4, 4,L0|L1}, /* 1f: 0001 1111 */
-
- {INRW_wa, 2,16,16,L0|L1}, /* 20: 0010 0000 oooo oooo */
- {JB, 1, 4, 4,L0|L1}, /* 21: 0010 0001 */
- {INX_DE, 1, 7, 7,L0|L1}, /* 22: 0010 0010 */
- {DCX_DE, 1, 7, 7,L0|L1}, /* 23: 0010 0011 */
- {LXI_D_w, 3,10,10,L0|L1}, /* 24: 0010 0100 llll llll hhhh hhhh */
- {GTIW_wa_xx, 3,19,19,L0|L1}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
- {ADINC_A_xx, 2, 7, 7,L0|L1}, /* 26: 0010 0110 xxxx xxxx */
- {GTI_A_xx, 2, 7, 7,L0|L1}, /* 27: 0010 0111 xxxx xxxx */
- {illegal, 1, 4, 4,L0|L1}, /* 28: */
- {LDAX_B, 2, 7, 7,L0|L1}, /* 29: 0010 1001 dddd dddd */
- {LDAX_D, 2, 7, 7,L0|L1}, /* 2a: 0010 1010 dddd dddd */
- {LDAX_H, 2, 7, 7,L0|L1}, /* 2b: 0010 1011 dddd dddd */
- {LDAX_Dp, 2, 7, 7,L0|L1}, /* 2c: 0010 1100 dddd dddd */
- {LDAX_Hp, 2, 7, 7,L0|L1}, /* 2d: 0010 1101 dddd dddd */
- {LDAX_Dm, 2, 7, 7,L0|L1}, /* 2e: 0010 1110 dddd dddd */
- {LDAX_Hm, 2, 7, 7,L0|L1}, /* 2f: 0010 1111 dddd dddd */
-
- {DCRW_wa, 2,16,16,L0|L1}, /* 30: 0011 0000 oooo oooo */
- {BLOCK, 1,13,13,L0|L1}, /* 31: 0011 0001 */ /* 7810 */
- {INX_HL, 1, 7, 7,L0|L1}, /* 32: 0011 0010 */
- {DCX_HL, 1, 7, 7,L0|L1}, /* 33: 0011 0011 */
- {LXI_H_w, 3,10,10, L1}, /* 34: 0011 0100 llll llll hhhh hhhh */
- {LTIW_wa_xx, 3,19,19,L0|L1}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
- {SUINB_A_xx, 2, 7, 7,L0|L1}, /* 36: 0011 0110 xxxx xxxx */
- {LTI_A_xx, 2, 7, 7,L0|L1}, /* 37: 0011 0111 xxxx xxxx */
- {illegal, 1, 4, 4,L0|L1}, /* 38: */
- {STAX_B, 2, 7, 7,L0|L1}, /* 39: 0011 1001 dddd dddd */
- {STAX_D, 2, 7, 7,L0|L1}, /* 3a: 0011 1010 dddd dddd */
- {STAX_H, 2, 7, 7,L0|L1}, /* 3b: 0011 1011 dddd dddd */
- {STAX_Dp, 2, 7, 7,L0|L1}, /* 3c: 0011 1100 dddd dddd */
- {STAX_Hp, 2, 7, 7,L0|L1}, /* 3d: 0011 1101 dddd dddd */
- {STAX_Dm, 2, 7, 7,L0|L1}, /* 3e: 0011 1110 dddd dddd */
- {STAX_Hm, 2, 7, 7,L0|L1}, /* 3f: 0011 1111 dddd dddd */
-
- {CALL_w, 3,16,16,L0|L1}, /* 40: 0100 0000 llll llll hhhh hhhh */
- {INR_A, 1, 4, 4,L0|L1}, /* 41: 0100 0001 */
- {INR_B, 1, 4, 4,L0|L1}, /* 42: 0100 0010 */
- {INR_C, 1, 4, 4,L0|L1}, /* 43: 0100 0011 */
- {LXI_EA_s, 3,10,10,L0|L1}, /* 44: 0100 0100 llll llll hhhh hhhh */
- {ONIW_wa_xx, 3,19,19,L0|L1}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
- {ADI_A_xx, 2, 7, 7,L0|L1}, /* 46: 0100 0110 xxxx xxxx */
- {ONI_A_xx, 2, 7, 7,L0|L1}, /* 47: 0100 0111 xxxx xxxx */
- {PRE_48, 1, 0, 0,L0|L1}, /* 48: prefix */
- {MVIX_BC_xx, 2,10,10,L0|L1}, /* 49: 0100 1001 xxxx xxxx */
- {MVIX_DE_xx, 2,10,10,L0|L1}, /* 4a: 0100 1010 xxxx xxxx */
- {MVIX_HL_xx, 2,10,10,L0|L1}, /* 4b: 0100 1011 xxxx xxxx */
- {PRE_4C, 1, 0, 0,L0|L1}, /* 4c: prefix */
- {PRE_4D, 1, 4, 4,L0|L1}, /* 4d: prefix */
- {JRE, 2,10,10,L0|L1}, /* 4e: 0100 111d dddd dddd */
- {JRE, 2,10,10,L0|L1}, /* 4f: 0100 111d dddd dddd */
-
- {EXH, 1, 4, 4,L0|L1}, /* 50: 0101 0000 */ /* 7810 */
- {DCR_A, 1, 4, 4,L0|L1}, /* 51: 0101 0001 */
- {DCR_B, 1, 4, 4,L0|L1}, /* 52: 0101 0010 */
- {DCR_C, 1, 4, 4,L0|L1}, /* 53: 0101 0011 */
- {JMP_w, 3,10,10,L0|L1}, /* 54: 0101 0100 llll llll hhhh hhhh */
- {OFFIW_wa_xx, 3,19,19,L0|L1}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
- {ACI_A_xx, 2, 7, 7,L0|L1}, /* 56: 0101 0110 xxxx xxxx */
- {OFFI_A_xx, 2, 7, 7,L0|L1}, /* 57: 0101 0111 xxxx xxxx */
- {BIT_0_wa, 2,10,10,L0|L1}, /* 58: 0101 1000 oooo oooo */ /* 7810 */
- {BIT_1_wa, 2,10,10,L0|L1}, /* 59: 0101 1001 oooo oooo */ /* 7810 */
- {BIT_2_wa, 2,10,10,L0|L1}, /* 5a: 0101 1010 oooo oooo */ /* 7810 */
- {BIT_3_wa, 2,10,10,L0|L1}, /* 5b: 0101 1011 oooo oooo */ /* 7810 */
- {BIT_4_wa, 2,10,10,L0|L1}, /* 5c: 0101 1100 oooo oooo */ /* 7810 */
- {BIT_5_wa, 2,10,10,L0|L1}, /* 5d: 0101 1101 oooo oooo */ /* 7810 */
- {BIT_6_wa, 2,10,10,L0|L1}, /* 5e: 0101 1110 oooo oooo */ /* 7810 */
- {BIT_7_wa, 2,10,10,L0|L1}, /* 5f: 0101 1111 oooo oooo */ /* 7810 */
-
- {PRE_60, 1, 0, 0,L0|L1}, /* 60: */
- {DAA, 1, 4, 4,L0|L1}, /* 61: 0110 0001 */
- {RETI, 1,13,13,L0|L1}, /* 62: 0110 0010 */
- {STAW_wa, 2,10,10,L0|L1}, /* 63: 0110 0011 oooo oooo */
- {PRE_64, 1, 0, 0,L0|L1}, /* 64: */
- {NEIW_wa_xx, 3,19,19,L0|L1}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
- {SUI_A_xx, 2, 7, 7,L0|L1}, /* 66: 0110 0110 xxxx xxxx */
- {NEI_A_xx, 2, 7, 7,L0|L1}, /* 67: 0110 0111 xxxx xxxx */
- {MVI_V_xx, 2, 7, 7,L0|L1}, /* 68: 0110 1000 xxxx xxxx */
- {MVI_A_xx, 2, 7, 7,L0 }, /* 69: 0110 1001 xxxx xxxx */
- {MVI_B_xx, 2, 7, 7,L0|L1}, /* 6a: 0110 1010 xxxx xxxx */
- {MVI_C_xx, 2, 7, 7,L0|L1}, /* 6b: 0110 1011 xxxx xxxx */
- {MVI_D_xx, 2, 7, 7,L0|L1}, /* 6c: 0110 1100 xxxx xxxx */
- {MVI_E_xx, 2, 7, 7,L0|L1}, /* 6d: 0110 1101 xxxx xxxx */
- {MVI_H_xx, 2, 7, 7,L0|L1}, /* 6e: 0110 1110 xxxx xxxx */
- {MVI_L_xx, 2, 7, 7, L1}, /* 6f: 0110 1111 xxxx xxxx */
-
- {PRE_70, 1, 0, 0,L0|L1}, /* 70: */
- {MVIW_wa_xx, 3,13,13,L0|L1}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
- {SOFTI, 1,16,16,L0|L1}, /* 72: 0111 0010 */
- {illegal, 1, 0, 0,L0|L1}, /* 73: */
- {PRE_74, 1, 0, 0,L0|L1}, /* 74: prefix */
- {EQIW_wa_xx, 3,19,19,L0|L1}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
- {SBI_A_xx, 2, 7, 7,L0|L1}, /* 76: 0111 0110 xxxx xxxx */
- {EQI_A_xx, 2, 7, 7,L0|L1}, /* 77: 0111 0111 xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 78: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 79: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7a: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7b: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7c: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7d: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7e: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7f: 0111 1xxx xxxx xxxx */
-
- {CALT, 1,16,16,L0|L1}, /* 80: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 81: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 82: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 83: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 84: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 85: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 86: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 87: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 88: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 89: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8a: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8b: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8c: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8d: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8e: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8f: 100x xxxx */
-
- {CALT, 1,16,16,L0|L1}, /* 90: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 91: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 92: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 93: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 94: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 95: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 96: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 97: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 98: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 99: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9a: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9b: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9c: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9d: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9e: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9f: 100x xxxx */
-
- {POP_VA, 1,10,10,L0|L1}, /* a0: 1010 0000 */
- {POP_BC, 1,10,10,L0|L1}, /* a1: 1010 0001 */
- {POP_DE, 1,10,10,L0|L1}, /* a2: 1010 0010 */
- {POP_HL, 1,10,10,L0|L1}, /* a3: 1010 0011 */
- {POP_EA, 1,10,10,L0|L1}, /* a4: 1010 0100 */
- {DMOV_EA_BC, 1, 4, 4,L0|L1}, /* a5: 1010 0101 */
- {DMOV_EA_DE, 1, 4, 4,L0|L1}, /* a6: 1010 0110 */
- {DMOV_EA_HL, 1, 4, 4,L0|L1}, /* a7: 1010 0111 */
- {INX_EA, 1, 7, 7,L0|L1}, /* a8: 1010 1000 */
- {DCX_EA, 1, 7, 7,L0|L1}, /* a9: 1010 1001 */
- {EI, 1, 4, 4,L0|L1}, /* aa: 1010 1010 */
- {LDAX_D_xx, 2, 7, 7,L0|L1}, /* ab: 1010 1011 dddd dddd */
- {LDAX_H_A, 1, 7, 7,L0|L1}, /* ac: 1010 1100 */
- {LDAX_H_B, 1, 7, 7,L0|L1}, /* ad: 1010 1101 */
- {LDAX_H_EA, 1, 7, 7,L0|L1}, /* ae: 1010 1110 */
- {LDAX_H_xx, 2, 7, 7,L0|L1}, /* af: 1010 1111 dddd dddd */
-
- {PUSH_VA, 1,13,13,L0|L1}, /* b0: 1011 0000 */
- {PUSH_BC, 1,13,13,L0|L1}, /* b1: 1011 0001 */
- {PUSH_DE, 1,13,13,L0|L1}, /* b2: 1011 0010 */
- {PUSH_HL, 1,13,13,L0|L1}, /* b3: 1011 0011 */
- {PUSH_EA, 1,13,13,L0|L1}, /* b4: 1011 0100 */
- {DMOV_BC_EA, 1, 4, 4,L0|L1}, /* b5: 1011 0101 */
- {DMOV_DE_EA, 1, 4, 4,L0|L1}, /* b6: 1011 0110 */
- {DMOV_HL_EA, 1, 4, 4,L0|L1}, /* b7: 1011 0111 */
- {RET, 1,10,10,L0|L1}, /* b8: 1011 1000 */
- {RETS, 1,10,10,L0|L1}, /* b9: 1011 1001 */
- {DI, 1, 4, 4,L0|L1}, /* ba: 1011 1010 */
- {STAX_D_xx, 2, 7, 7,L0|L1}, /* bb: 1011 1011 dddd dddd */
- {STAX_H_A, 1, 7, 7,L0|L1}, /* bc: 1011 1100 */
- {STAX_H_B, 1, 7, 7,L0|L1}, /* bd: 1011 1101 */
- {STAX_H_EA, 1, 7, 7,L0|L1}, /* be: 1011 1110 */
- {STAX_H_xx, 2, 7, 7,L0|L1}, /* bf: 1011 1111 dddd dddd */
-
- {JR, 1,10,10,L0|L1}, /* c0: 1100 0000 */
- {JR, 1,10,10,L0|L1}, /* c1: 1100 0001 */
- {JR, 1,10,10,L0|L1}, /* c2: 1100 0010 */
- {JR, 1,10,10,L0|L1}, /* c3: 1100 0011 */
- {JR, 1,10,10,L0|L1}, /* c4: 1100 0100 */
- {JR, 1,10,10,L0|L1}, /* c5: 1100 0101 */
- {JR, 1,10,10,L0|L1}, /* c6: 1100 0110 */
- {JR, 1,10,10,L0|L1}, /* c7: 1100 0111 */
- {JR, 1,10,10,L0|L1}, /* c8: 1100 1000 */
- {JR, 1,10,10,L0|L1}, /* c9: 1100 1001 */
- {JR, 1,10,10,L0|L1}, /* ca: 1100 1010 */
- {JR, 1,10,10,L0|L1}, /* cb: 1100 1011 */
- {JR, 1,10,10,L0|L1}, /* cc: 1100 1100 */
- {JR, 1,10,10,L0|L1}, /* cd: 1100 1101 */
- {JR, 1,10,10,L0|L1}, /* ce: 1100 1110 */
- {JR, 1,10,10,L0|L1}, /* cf: 1100 1111 */
-
- {JR, 1,10,10,L0|L1}, /* d0: 1101 0000 */
- {JR, 1,10,10,L0|L1}, /* d1: 1101 0001 */
- {JR, 1,10,10,L0|L1}, /* d2: 1101 0010 */
- {JR, 1,10,10,L0|L1}, /* d3: 1101 0011 */
- {JR, 1,10,10,L0|L1}, /* d4: 1101 0100 */
- {JR, 1,10,10,L0|L1}, /* d5: 1101 0101 */
- {JR, 1,10,10,L0|L1}, /* d6: 1101 0110 */
- {JR, 1,10,10,L0|L1}, /* d7: 1101 0111 */
- {JR, 1,10,10,L0|L1}, /* d8: 1101 1000 */
- {JR, 1,10,10,L0|L1}, /* d9: 1101 1001 */
- {JR, 1,10,10,L0|L1}, /* da: 1101 1010 */
- {JR, 1,10,10,L0|L1}, /* db: 1101 1011 */
- {JR, 1,10,10,L0|L1}, /* dc: 1101 1100 */
- {JR, 1,10,10,L0|L1}, /* dd: 1101 1101 */
- {JR, 1,10,10,L0|L1}, /* de: 1101 1110 */
- {JR, 1,10,10,L0|L1}, /* df: 1101 1111 */
-
- {JR, 1,10,10,L0|L1}, /* e0: 1110 0000 */
- {JR, 1,10,10,L0|L1}, /* e1: 1110 0001 */
- {JR, 1,10,10,L0|L1}, /* e2: 1110 0010 */
- {JR, 1,10,10,L0|L1}, /* e3: 1110 0011 */
- {JR, 1,10,10,L0|L1}, /* e4: 1110 0100 */
- {JR, 1,10,10,L0|L1}, /* e5: 1110 0101 */
- {JR, 1,10,10,L0|L1}, /* e6: 1110 0110 */
- {JR, 1,10,10,L0|L1}, /* e7: 1110 0111 */
- {JR, 1,10,10,L0|L1}, /* e8: 1110 1000 */
- {JR, 1,10,10,L0|L1}, /* e9: 1110 1001 */
- {JR, 1,10,10,L0|L1}, /* ea: 1110 1010 */
- {JR, 1,10,10,L0|L1}, /* eb: 1110 1011 */
- {JR, 1,10,10,L0|L1}, /* ec: 1110 1100 */
- {JR, 1,10,10,L0|L1}, /* ed: 1110 1101 */
- {JR, 1,10,10,L0|L1}, /* ee: 1110 1110 */
- {JR, 1,10,10,L0|L1}, /* ef: 1110 1111 */
-
- {JR, 1,10,10,L0|L1}, /* f0: 1111 0000 */
- {JR, 1,10,10,L0|L1}, /* f1: 1111 0001 */
- {JR, 1,10,10,L0|L1}, /* f2: 1111 0010 */
- {JR, 1,10,10,L0|L1}, /* f3: 1111 0011 */
- {JR, 1,10,10,L0|L1}, /* f4: 1111 0100 */
- {JR, 1,10,10,L0|L1}, /* f5: 1111 0101 */
- {JR, 1,10,10,L0|L1}, /* f6: 1111 0110 */
- {JR, 1,10,10,L0|L1}, /* f7: 1111 0111 */
- {JR, 1,10,10,L0|L1}, /* f8: 1111 1000 */
- {JR, 1,10,10,L0|L1}, /* f9: 1111 1001 */
- {JR, 1,10,10,L0|L1}, /* fa: 1111 1010 */
- {JR, 1,10,10,L0|L1}, /* fb: 1111 1011 */
- {JR, 1,10,10,L0|L1}, /* fc: 1111 1100 */
- {JR, 1,10,10,L0|L1}, /* fd: 1111 1101 */
- {JR, 1,10,10,L0|L1}, /* fe: 1111 1110 */
- {JR, 1,10,10,L0|L1} /* ff: 1111 1111 */
+ {NOP, 1, 4, 4,L0|L1}, /* 00: 0000 0000 */
+ {LDAW_wa, 2,10,10,L0|L1}, /* 01: 0000 0001 oooo oooo */
+ {INX_SP, 1, 7, 7,L0|L1}, /* 02: 0000 0010 */
+ {DCX_SP, 1, 7, 7,L0|L1}, /* 03: 0000 0011 */
+ {LXI_S_w, 3,10,10,L0|L1}, /* 04: 0000 0100 llll llll hhhh hhhh */
+ {ANIW_wa_xx, 3,19,19,L0|L1}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 06: */
+ {ANI_A_xx, 2, 7, 7,L0|L1}, /* 07: 0000 0111 xxxx xxxx */
+ {MOV_A_EAH, 1, 4, 4,L0|L1}, /* 08: 0000 1000 */
+ {MOV_A_EAL, 1, 4, 4,L0|L1}, /* 09: 0000 1001 */
+ {MOV_A_B, 1, 4, 4,L0|L1}, /* 0a: 0000 1010 */
+ {MOV_A_C, 1, 4, 4,L0|L1}, /* 0b: 0000 1011 */
+ {MOV_A_D, 1, 4, 4,L0|L1}, /* 0c: 0000 1100 */
+ {MOV_A_E, 1, 4, 4,L0|L1}, /* 0d: 0000 1101 */
+ {MOV_A_H, 1, 4, 4,L0|L1}, /* 0e: 0000 1110 */
+ {MOV_A_L, 1, 4, 4,L0|L1}, /* 0f: 0000 1111 */
+
+ {EXA, 1, 4, 4,L0|L1}, /* 10: 0001 0000 */
+ {EXX, 1, 4, 4,L0|L1}, /* 11: 0001 0001 */
+ {INX_BC, 1, 7, 7,L0|L1}, /* 12: 0001 0010 */
+ {DCX_BC, 1, 7, 7,L0|L1}, /* 13: 0001 0011 */
+ {LXI_B_w, 3,10,10,L0|L1}, /* 14: 0001 0100 llll llll hhhh hhhh */
+ {ORIW_wa_xx, 3,19,19,L0|L1}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
+ {XRI_A_xx, 2, 7, 7,L0|L1}, /* 16: 0001 0110 xxxx xxxx */
+ {ORI_A_xx, 2, 7, 7,L0|L1}, /* 17: 0001 0111 xxxx xxxx */
+ {MOV_EAH_A, 1, 4, 4,L0|L1}, /* 18: 0001 1000 */
+ {MOV_EAL_A, 1, 4, 4,L0|L1}, /* 19: 0001 1001 */
+ {MOV_B_A, 1, 4, 4,L0|L1}, /* 1a: 0001 1010 */
+ {MOV_C_A, 1, 4, 4,L0|L1}, /* 1b: 0001 1011 */
+ {MOV_D_A, 1, 4, 4,L0|L1}, /* 1c: 0001 1100 */
+ {MOV_E_A, 1, 4, 4,L0|L1}, /* 1d: 0001 1101 */
+ {MOV_H_A, 1, 4, 4,L0|L1}, /* 1e: 0001 1110 */
+ {MOV_L_A, 1, 4, 4,L0|L1}, /* 1f: 0001 1111 */
+
+ {INRW_wa, 2,16,16,L0|L1}, /* 20: 0010 0000 oooo oooo */
+ {JB, 1, 4, 4,L0|L1}, /* 21: 0010 0001 */
+ {INX_DE, 1, 7, 7,L0|L1}, /* 22: 0010 0010 */
+ {DCX_DE, 1, 7, 7,L0|L1}, /* 23: 0010 0011 */
+ {LXI_D_w, 3,10,10,L0|L1}, /* 24: 0010 0100 llll llll hhhh hhhh */
+ {GTIW_wa_xx, 3,19,19,L0|L1}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
+ {ADINC_A_xx, 2, 7, 7,L0|L1}, /* 26: 0010 0110 xxxx xxxx */
+ {GTI_A_xx, 2, 7, 7,L0|L1}, /* 27: 0010 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 28: */
+ {LDAX_B, 2, 7, 7,L0|L1}, /* 29: 0010 1001 dddd dddd */
+ {LDAX_D, 2, 7, 7,L0|L1}, /* 2a: 0010 1010 dddd dddd */
+ {LDAX_H, 2, 7, 7,L0|L1}, /* 2b: 0010 1011 dddd dddd */
+ {LDAX_Dp, 2, 7, 7,L0|L1}, /* 2c: 0010 1100 dddd dddd */
+ {LDAX_Hp, 2, 7, 7,L0|L1}, /* 2d: 0010 1101 dddd dddd */
+ {LDAX_Dm, 2, 7, 7,L0|L1}, /* 2e: 0010 1110 dddd dddd */
+ {LDAX_Hm, 2, 7, 7,L0|L1}, /* 2f: 0010 1111 dddd dddd */
+
+ {DCRW_wa, 2,16,16,L0|L1}, /* 30: 0011 0000 oooo oooo */
+ {BLOCK, 1,13,13,L0|L1}, /* 31: 0011 0001 */ /* 7810 */
+ {INX_HL, 1, 7, 7,L0|L1}, /* 32: 0011 0010 */
+ {DCX_HL, 1, 7, 7,L0|L1}, /* 33: 0011 0011 */
+ {LXI_H_w, 3,10,10, L1}, /* 34: 0011 0100 llll llll hhhh hhhh */
+ {LTIW_wa_xx, 3,19,19,L0|L1}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
+ {SUINB_A_xx, 2, 7, 7,L0|L1}, /* 36: 0011 0110 xxxx xxxx */
+ {LTI_A_xx, 2, 7, 7,L0|L1}, /* 37: 0011 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 38: */
+ {STAX_B, 2, 7, 7,L0|L1}, /* 39: 0011 1001 dddd dddd */
+ {STAX_D, 2, 7, 7,L0|L1}, /* 3a: 0011 1010 dddd dddd */
+ {STAX_H, 2, 7, 7,L0|L1}, /* 3b: 0011 1011 dddd dddd */
+ {STAX_Dp, 2, 7, 7,L0|L1}, /* 3c: 0011 1100 dddd dddd */
+ {STAX_Hp, 2, 7, 7,L0|L1}, /* 3d: 0011 1101 dddd dddd */
+ {STAX_Dm, 2, 7, 7,L0|L1}, /* 3e: 0011 1110 dddd dddd */
+ {STAX_Hm, 2, 7, 7,L0|L1}, /* 3f: 0011 1111 dddd dddd */
+
+ {CALL_w, 3,16,16,L0|L1}, /* 40: 0100 0000 llll llll hhhh hhhh */
+ {INR_A, 1, 4, 4,L0|L1}, /* 41: 0100 0001 */
+ {INR_B, 1, 4, 4,L0|L1}, /* 42: 0100 0010 */
+ {INR_C, 1, 4, 4,L0|L1}, /* 43: 0100 0011 */
+ {LXI_EA_s, 3,10,10,L0|L1}, /* 44: 0100 0100 llll llll hhhh hhhh */
+ {ONIW_wa_xx, 3,19,19,L0|L1}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
+ {ADI_A_xx, 2, 7, 7,L0|L1}, /* 46: 0100 0110 xxxx xxxx */
+ {ONI_A_xx, 2, 7, 7,L0|L1}, /* 47: 0100 0111 xxxx xxxx */
+ {PRE_48, 1, 0, 0,L0|L1}, /* 48: prefix */
+ {MVIX_BC_xx, 2,10,10,L0|L1}, /* 49: 0100 1001 xxxx xxxx */
+ {MVIX_DE_xx, 2,10,10,L0|L1}, /* 4a: 0100 1010 xxxx xxxx */
+ {MVIX_HL_xx, 2,10,10,L0|L1}, /* 4b: 0100 1011 xxxx xxxx */
+ {PRE_4C, 1, 0, 0,L0|L1}, /* 4c: prefix */
+ {PRE_4D, 1, 4, 4,L0|L1}, /* 4d: prefix */
+ {JRE, 2,10,10,L0|L1}, /* 4e: 0100 111d dddd dddd */
+ {JRE, 2,10,10,L0|L1}, /* 4f: 0100 111d dddd dddd */
+
+ {EXH, 1, 4, 4,L0|L1}, /* 50: 0101 0000 */ /* 7810 */
+ {DCR_A, 1, 4, 4,L0|L1}, /* 51: 0101 0001 */
+ {DCR_B, 1, 4, 4,L0|L1}, /* 52: 0101 0010 */
+ {DCR_C, 1, 4, 4,L0|L1}, /* 53: 0101 0011 */
+ {JMP_w, 3,10,10,L0|L1}, /* 54: 0101 0100 llll llll hhhh hhhh */
+ {OFFIW_wa_xx, 3,19,19,L0|L1}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
+ {ACI_A_xx, 2, 7, 7,L0|L1}, /* 56: 0101 0110 xxxx xxxx */
+ {OFFI_A_xx, 2, 7, 7,L0|L1}, /* 57: 0101 0111 xxxx xxxx */
+ {BIT_0_wa, 2,10,10,L0|L1}, /* 58: 0101 1000 oooo oooo */ /* 7810 */
+ {BIT_1_wa, 2,10,10,L0|L1}, /* 59: 0101 1001 oooo oooo */ /* 7810 */
+ {BIT_2_wa, 2,10,10,L0|L1}, /* 5a: 0101 1010 oooo oooo */ /* 7810 */
+ {BIT_3_wa, 2,10,10,L0|L1}, /* 5b: 0101 1011 oooo oooo */ /* 7810 */
+ {BIT_4_wa, 2,10,10,L0|L1}, /* 5c: 0101 1100 oooo oooo */ /* 7810 */
+ {BIT_5_wa, 2,10,10,L0|L1}, /* 5d: 0101 1101 oooo oooo */ /* 7810 */
+ {BIT_6_wa, 2,10,10,L0|L1}, /* 5e: 0101 1110 oooo oooo */ /* 7810 */
+ {BIT_7_wa, 2,10,10,L0|L1}, /* 5f: 0101 1111 oooo oooo */ /* 7810 */
+
+ {PRE_60, 1, 0, 0,L0|L1}, /* 60: */
+ {DAA, 1, 4, 4,L0|L1}, /* 61: 0110 0001 */
+ {RETI, 1,13,13,L0|L1}, /* 62: 0110 0010 */
+ {STAW_wa, 2,10,10,L0|L1}, /* 63: 0110 0011 oooo oooo */
+ {PRE_64, 1, 0, 0,L0|L1}, /* 64: */
+ {NEIW_wa_xx, 3,19,19,L0|L1}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
+ {SUI_A_xx, 2, 7, 7,L0|L1}, /* 66: 0110 0110 xxxx xxxx */
+ {NEI_A_xx, 2, 7, 7,L0|L1}, /* 67: 0110 0111 xxxx xxxx */
+ {MVI_V_xx, 2, 7, 7,L0|L1}, /* 68: 0110 1000 xxxx xxxx */
+ {MVI_A_xx, 2, 7, 7,L0 }, /* 69: 0110 1001 xxxx xxxx */
+ {MVI_B_xx, 2, 7, 7,L0|L1}, /* 6a: 0110 1010 xxxx xxxx */
+ {MVI_C_xx, 2, 7, 7,L0|L1}, /* 6b: 0110 1011 xxxx xxxx */
+ {MVI_D_xx, 2, 7, 7,L0|L1}, /* 6c: 0110 1100 xxxx xxxx */
+ {MVI_E_xx, 2, 7, 7,L0|L1}, /* 6d: 0110 1101 xxxx xxxx */
+ {MVI_H_xx, 2, 7, 7,L0|L1}, /* 6e: 0110 1110 xxxx xxxx */
+ {MVI_L_xx, 2, 7, 7, L1}, /* 6f: 0110 1111 xxxx xxxx */
+
+ {PRE_70, 1, 0, 0,L0|L1}, /* 70: */
+ {MVIW_wa_xx, 3,13,13,L0|L1}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
+ {SOFTI, 1,16,16,L0|L1}, /* 72: 0111 0010 */
+ {illegal, 1, 0, 0,L0|L1}, /* 73: */
+ {PRE_74, 1, 0, 0,L0|L1}, /* 74: prefix */
+ {EQIW_wa_xx, 3,19,19,L0|L1}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
+ {SBI_A_xx, 2, 7, 7,L0|L1}, /* 76: 0111 0110 xxxx xxxx */
+ {EQI_A_xx, 2, 7, 7,L0|L1}, /* 77: 0111 0111 xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 78: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 79: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7a: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7b: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7c: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7d: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7e: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7f: 0111 1xxx xxxx xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 80: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 81: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 82: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 83: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 84: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 85: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 86: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 87: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 88: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 89: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8f: 100x xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 90: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 91: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 92: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 93: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 94: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 95: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 96: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 97: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 98: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 99: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9f: 100x xxxx */
+
+ {POP_VA, 1,10,10,L0|L1}, /* a0: 1010 0000 */
+ {POP_BC, 1,10,10,L0|L1}, /* a1: 1010 0001 */
+ {POP_DE, 1,10,10,L0|L1}, /* a2: 1010 0010 */
+ {POP_HL, 1,10,10,L0|L1}, /* a3: 1010 0011 */
+ {POP_EA, 1,10,10,L0|L1}, /* a4: 1010 0100 */
+ {DMOV_EA_BC, 1, 4, 4,L0|L1}, /* a5: 1010 0101 */
+ {DMOV_EA_DE, 1, 4, 4,L0|L1}, /* a6: 1010 0110 */
+ {DMOV_EA_HL, 1, 4, 4,L0|L1}, /* a7: 1010 0111 */
+ {INX_EA, 1, 7, 7,L0|L1}, /* a8: 1010 1000 */
+ {DCX_EA, 1, 7, 7,L0|L1}, /* a9: 1010 1001 */
+ {EI, 1, 4, 4,L0|L1}, /* aa: 1010 1010 */
+ {LDAX_D_xx, 2, 7, 7,L0|L1}, /* ab: 1010 1011 dddd dddd */
+ {LDAX_H_A, 1, 7, 7,L0|L1}, /* ac: 1010 1100 */
+ {LDAX_H_B, 1, 7, 7,L0|L1}, /* ad: 1010 1101 */
+ {LDAX_H_EA, 1, 7, 7,L0|L1}, /* ae: 1010 1110 */
+ {LDAX_H_xx, 2, 7, 7,L0|L1}, /* af: 1010 1111 dddd dddd */
+
+ {PUSH_VA, 1,13,13,L0|L1}, /* b0: 1011 0000 */
+ {PUSH_BC, 1,13,13,L0|L1}, /* b1: 1011 0001 */
+ {PUSH_DE, 1,13,13,L0|L1}, /* b2: 1011 0010 */
+ {PUSH_HL, 1,13,13,L0|L1}, /* b3: 1011 0011 */
+ {PUSH_EA, 1,13,13,L0|L1}, /* b4: 1011 0100 */
+ {DMOV_BC_EA, 1, 4, 4,L0|L1}, /* b5: 1011 0101 */
+ {DMOV_DE_EA, 1, 4, 4,L0|L1}, /* b6: 1011 0110 */
+ {DMOV_HL_EA, 1, 4, 4,L0|L1}, /* b7: 1011 0111 */
+ {RET, 1,10,10,L0|L1}, /* b8: 1011 1000 */
+ {RETS, 1,10,10,L0|L1}, /* b9: 1011 1001 */
+ {DI, 1, 4, 4,L0|L1}, /* ba: 1011 1010 */
+ {STAX_D_xx, 2, 7, 7,L0|L1}, /* bb: 1011 1011 dddd dddd */
+ {STAX_H_A, 1, 7, 7,L0|L1}, /* bc: 1011 1100 */
+ {STAX_H_B, 1, 7, 7,L0|L1}, /* bd: 1011 1101 */
+ {STAX_H_EA, 1, 7, 7,L0|L1}, /* be: 1011 1110 */
+ {STAX_H_xx, 2, 7, 7,L0|L1}, /* bf: 1011 1111 dddd dddd */
+
+ {JR, 1,10,10,L0|L1}, /* c0: 1100 0000 */
+ {JR, 1,10,10,L0|L1}, /* c1: 1100 0001 */
+ {JR, 1,10,10,L0|L1}, /* c2: 1100 0010 */
+ {JR, 1,10,10,L0|L1}, /* c3: 1100 0011 */
+ {JR, 1,10,10,L0|L1}, /* c4: 1100 0100 */
+ {JR, 1,10,10,L0|L1}, /* c5: 1100 0101 */
+ {JR, 1,10,10,L0|L1}, /* c6: 1100 0110 */
+ {JR, 1,10,10,L0|L1}, /* c7: 1100 0111 */
+ {JR, 1,10,10,L0|L1}, /* c8: 1100 1000 */
+ {JR, 1,10,10,L0|L1}, /* c9: 1100 1001 */
+ {JR, 1,10,10,L0|L1}, /* ca: 1100 1010 */
+ {JR, 1,10,10,L0|L1}, /* cb: 1100 1011 */
+ {JR, 1,10,10,L0|L1}, /* cc: 1100 1100 */
+ {JR, 1,10,10,L0|L1}, /* cd: 1100 1101 */
+ {JR, 1,10,10,L0|L1}, /* ce: 1100 1110 */
+ {JR, 1,10,10,L0|L1}, /* cf: 1100 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* d0: 1101 0000 */
+ {JR, 1,10,10,L0|L1}, /* d1: 1101 0001 */
+ {JR, 1,10,10,L0|L1}, /* d2: 1101 0010 */
+ {JR, 1,10,10,L0|L1}, /* d3: 1101 0011 */
+ {JR, 1,10,10,L0|L1}, /* d4: 1101 0100 */
+ {JR, 1,10,10,L0|L1}, /* d5: 1101 0101 */
+ {JR, 1,10,10,L0|L1}, /* d6: 1101 0110 */
+ {JR, 1,10,10,L0|L1}, /* d7: 1101 0111 */
+ {JR, 1,10,10,L0|L1}, /* d8: 1101 1000 */
+ {JR, 1,10,10,L0|L1}, /* d9: 1101 1001 */
+ {JR, 1,10,10,L0|L1}, /* da: 1101 1010 */
+ {JR, 1,10,10,L0|L1}, /* db: 1101 1011 */
+ {JR, 1,10,10,L0|L1}, /* dc: 1101 1100 */
+ {JR, 1,10,10,L0|L1}, /* dd: 1101 1101 */
+ {JR, 1,10,10,L0|L1}, /* de: 1101 1110 */
+ {JR, 1,10,10,L0|L1}, /* df: 1101 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* e0: 1110 0000 */
+ {JR, 1,10,10,L0|L1}, /* e1: 1110 0001 */
+ {JR, 1,10,10,L0|L1}, /* e2: 1110 0010 */
+ {JR, 1,10,10,L0|L1}, /* e3: 1110 0011 */
+ {JR, 1,10,10,L0|L1}, /* e4: 1110 0100 */
+ {JR, 1,10,10,L0|L1}, /* e5: 1110 0101 */
+ {JR, 1,10,10,L0|L1}, /* e6: 1110 0110 */
+ {JR, 1,10,10,L0|L1}, /* e7: 1110 0111 */
+ {JR, 1,10,10,L0|L1}, /* e8: 1110 1000 */
+ {JR, 1,10,10,L0|L1}, /* e9: 1110 1001 */
+ {JR, 1,10,10,L0|L1}, /* ea: 1110 1010 */
+ {JR, 1,10,10,L0|L1}, /* eb: 1110 1011 */
+ {JR, 1,10,10,L0|L1}, /* ec: 1110 1100 */
+ {JR, 1,10,10,L0|L1}, /* ed: 1110 1101 */
+ {JR, 1,10,10,L0|L1}, /* ee: 1110 1110 */
+ {JR, 1,10,10,L0|L1}, /* ef: 1110 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* f0: 1111 0000 */
+ {JR, 1,10,10,L0|L1}, /* f1: 1111 0001 */
+ {JR, 1,10,10,L0|L1}, /* f2: 1111 0010 */
+ {JR, 1,10,10,L0|L1}, /* f3: 1111 0011 */
+ {JR, 1,10,10,L0|L1}, /* f4: 1111 0100 */
+ {JR, 1,10,10,L0|L1}, /* f5: 1111 0101 */
+ {JR, 1,10,10,L0|L1}, /* f6: 1111 0110 */
+ {JR, 1,10,10,L0|L1}, /* f7: 1111 0111 */
+ {JR, 1,10,10,L0|L1}, /* f8: 1111 1000 */
+ {JR, 1,10,10,L0|L1}, /* f9: 1111 1001 */
+ {JR, 1,10,10,L0|L1}, /* fa: 1111 1010 */
+ {JR, 1,10,10,L0|L1}, /* fb: 1111 1011 */
+ {JR, 1,10,10,L0|L1}, /* fc: 1111 1100 */
+ {JR, 1,10,10,L0|L1}, /* fd: 1111 1101 */
+ {JR, 1,10,10,L0|L1}, /* fe: 1111 1110 */
+ {JR, 1,10,10,L0|L1} /* ff: 1111 1111 */
};
static const struct opcode_s opXX_7807[256] =
{
- {NOP, 1, 4, 4,L0|L1}, /* 00: 0000 0000 */
- {LDAW_wa, 2,10,10,L0|L1}, /* 01: 0000 0001 oooo oooo */
- {INX_SP, 1, 7, 7,L0|L1}, /* 02: 0000 0010 */
- {DCX_SP, 1, 7, 7,L0|L1}, /* 03: 0000 0011 */
- {LXI_S_w, 3,10,10,L0|L1}, /* 04: 0000 0100 llll llll hhhh hhhh */
- {ANIW_wa_xx, 3,19,19,L0|L1}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
- {illegal, 1, 4, 4,L0|L1}, /* 06: */
- {ANI_A_xx, 2, 7, 7,L0|L1}, /* 07: 0000 0111 xxxx xxxx */
- {MOV_A_EAH, 1, 4, 4,L0|L1}, /* 08: 0000 1000 */
- {MOV_A_EAL, 1, 4, 4,L0|L1}, /* 09: 0000 1001 */
- {MOV_A_B, 1, 4, 4,L0|L1}, /* 0a: 0000 1010 */
- {MOV_A_C, 1, 4, 4,L0|L1}, /* 0b: 0000 1011 */
- {MOV_A_D, 1, 4, 4,L0|L1}, /* 0c: 0000 1100 */
- {MOV_A_E, 1, 4, 4,L0|L1}, /* 0d: 0000 1101 */
- {MOV_A_H, 1, 4, 4,L0|L1}, /* 0e: 0000 1110 */
- {MOV_A_L, 1, 4, 4,L0|L1}, /* 0f: 0000 1111 */
-
- {illegal, 1,13, 4,L0|L1}, /* 10: 0001 0000 */ /* 7807 */
- {illegal, 1,13, 4,L0|L1}, /* 11: 0001 0001 */ /* 7807 */
- {INX_BC, 1, 7, 7,L0|L1}, /* 12: 0001 0010 */
- {DCX_BC, 1, 7, 7,L0|L1}, /* 13: 0001 0011 */
- {LXI_B_w, 3,10,10,L0|L1}, /* 14: 0001 0100 llll llll hhhh hhhh */
- {ORIW_wa_xx, 3,19,19,L0|L1}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
- {XRI_A_xx, 2, 7, 7,L0|L1}, /* 16: 0001 0110 xxxx xxxx */
- {ORI_A_xx, 2, 7, 7,L0|L1}, /* 17: 0001 0111 xxxx xxxx */
- {MOV_EAH_A, 1, 4, 4,L0|L1}, /* 18: 0001 1000 */
- {MOV_EAL_A, 1, 4, 4,L0|L1}, /* 19: 0001 1001 */
- {MOV_B_A, 1, 4, 4,L0|L1}, /* 1a: 0001 1010 */
- {MOV_C_A, 1, 4, 4,L0|L1}, /* 1b: 0001 1011 */
- {MOV_D_A, 1, 4, 4,L0|L1}, /* 1c: 0001 1100 */
- {MOV_E_A, 1, 4, 4,L0|L1}, /* 1d: 0001 1101 */
- {MOV_H_A, 1, 4, 4,L0|L1}, /* 1e: 0001 1110 */
- {MOV_L_A, 1, 4, 4,L0|L1}, /* 1f: 0001 1111 */
-
- {INRW_wa, 2,16,16,L0|L1}, /* 20: 0010 0000 oooo oooo */
- {JB, 1, 4, 4,L0|L1}, /* 21: 0010 0001 */
- {INX_DE, 1, 7, 7,L0|L1}, /* 22: 0010 0010 */
- {DCX_DE, 1, 7, 7,L0|L1}, /* 23: 0010 0011 */
- {LXI_D_w, 3,10,10,L0|L1}, /* 24: 0010 0100 llll llll hhhh hhhh */
- {GTIW_wa_xx, 3,19,19,L0|L1}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
- {ADINC_A_xx, 2, 7, 7,L0|L1}, /* 26: 0010 0110 xxxx xxxx */
- {GTI_A_xx, 2, 7, 7,L0|L1}, /* 27: 0010 0111 xxxx xxxx */
- {illegal, 1, 4, 4,L0|L1}, /* 28: */
- {LDAX_B, 2, 7, 7,L0|L1}, /* 29: 0010 1001 dddd dddd */
- {LDAX_D, 2, 7, 7,L0|L1}, /* 2a: 0010 1010 dddd dddd */
- {LDAX_H, 2, 7, 7,L0|L1}, /* 2b: 0010 1011 dddd dddd */
- {LDAX_Dp, 2, 7, 7,L0|L1}, /* 2c: 0010 1100 dddd dddd */
- {LDAX_Hp, 2, 7, 7,L0|L1}, /* 2d: 0010 1101 dddd dddd */
- {LDAX_Dm, 2, 7, 7,L0|L1}, /* 2e: 0010 1110 dddd dddd */
- {LDAX_Hm, 2, 7, 7,L0|L1}, /* 2f: 0010 1111 dddd dddd */
-
- {DCRW_wa, 2,16,16,L0|L1}, /* 30: 0011 0000 oooo oooo */
- {illegal, 2, 8, 8,L0|L1}, /* 31: 0011 0001 bbbb bbbb */ /* 7807 */
- {INX_HL, 1, 7, 7,L0|L1}, /* 32: 0011 0010 */
- {DCX_HL, 1, 7, 7,L0|L1}, /* 33: 0011 0011 */
- {LXI_H_w, 3,10,10, L1}, /* 34: 0011 0100 llll llll hhhh hhhh */
- {LTIW_wa_xx, 3,19,19,L0|L1}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
- {SUINB_A_xx, 2, 7, 7,L0|L1}, /* 36: 0011 0110 xxxx xxxx */
- {LTI_A_xx, 2, 7, 7,L0|L1}, /* 37: 0011 0111 xxxx xxxx */
- {illegal, 1, 4, 4,L0|L1}, /* 38: */
- {STAX_B, 2, 7, 7,L0|L1}, /* 39: 0011 1001 dddd dddd */
- {STAX_D, 2, 7, 7,L0|L1}, /* 3a: 0011 1010 dddd dddd */
- {STAX_H, 2, 7, 7,L0|L1}, /* 3b: 0011 1011 dddd dddd */
- {STAX_Dp, 2, 7, 7,L0|L1}, /* 3c: 0011 1100 dddd dddd */
- {STAX_Hp, 2, 7, 7,L0|L1}, /* 3d: 0011 1101 dddd dddd */
- {STAX_Dm, 2, 7, 7,L0|L1}, /* 3e: 0011 1110 dddd dddd */
- {STAX_Hm, 2, 7, 7,L0|L1}, /* 3f: 0011 1111 dddd dddd */
-
- {CALL_w, 3,16,16,L0|L1}, /* 40: 0100 0000 llll llll hhhh hhhh */
- {INR_A, 1, 4, 4,L0|L1}, /* 41: 0100 0001 */
- {INR_B, 1, 4, 4,L0|L1}, /* 42: 0100 0010 */
- {INR_C, 1, 4, 4,L0|L1}, /* 43: 0100 0011 */
- {LXI_EA_s, 3,10,10,L0|L1}, /* 44: 0100 0100 llll llll hhhh hhhh */
- {ONIW_wa_xx, 3,19,19,L0|L1}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
- {ADI_A_xx, 2, 7, 7,L0|L1}, /* 46: 0100 0110 xxxx xxxx */
- {ONI_A_xx, 2, 7, 7,L0|L1}, /* 47: 0100 0111 xxxx xxxx */
- {PRE_48, 1, 0, 0,L0|L1}, /* 48: prefix */
- {MVIX_BC_xx, 2,10,10,L0|L1}, /* 49: 0100 1001 xxxx xxxx */
- {MVIX_DE_xx, 2,10,10,L0|L1}, /* 4a: 0100 1010 xxxx xxxx */
- {MVIX_HL_xx, 2,10,10,L0|L1}, /* 4b: 0100 1011 xxxx xxxx */
- {PRE_4C, 1, 0, 0,L0|L1}, /* 4c: prefix */
- {PRE_4D, 1, 4, 4,L0|L1}, /* 4d: prefix */
- {JRE, 2,10,10,L0|L1}, /* 4e: 0100 111d dddd dddd */
- {JRE, 2,10,10,L0|L1}, /* 4f: 0100 111d dddd dddd */
-
- {SKN_bit, 2,13,13,L0|L1}, /* 50: 0101 0000 bbbb bbbb */ /* 7807 */
- {DCR_A, 1, 4, 4,L0|L1}, /* 51: 0101 0001 */
- {DCR_B, 1, 4, 4,L0|L1}, /* 52: 0101 0010 */
- {DCR_C, 1, 4, 4,L0|L1}, /* 53: 0101 0011 */
- {JMP_w, 3,10,10,L0|L1}, /* 54: 0101 0100 llll llll hhhh hhhh */
- {OFFIW_wa_xx, 3,19,19,L0|L1}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
- {ACI_A_xx, 2, 7, 7,L0|L1}, /* 56: 0101 0110 xxxx xxxx */
- {OFFI_A_xx, 2, 7, 7,L0|L1}, /* 57: 0101 0111 xxxx xxxx */
- {SETB, 2,13,13,L0|L1}, /* 58: 0101 1000 bbbb bbbb */ /* 7807 */
- {illegal, 2, 8, 8,L0|L1}, /* 59: 0101 1001 bbbb bbbb */ /* 7807 */
- {illegal, 2, 8, 8,L0|L1}, /* 5a: 0101 1010 bbbb bbbb */ /* 7807 */
- {CLR, 2,13,13,L0|L1}, /* 5b: 0101 1011 bbbb bbbb */ /* 7807 */
- {illegal, 2, 8, 8,L0|L1}, /* 5c: 0101 1100 bbbb bbbb */ /* 7807 */
- {SK_bit, 2,10,10,L0|L1}, /* 5d: 0101 1101 bbbb bbbb */ /* 7807 */
- {illegal, 2, 8, 8,L0|L1}, /* 5e: 0101 1110 bbbb bbbb */ /* 7807 */
- {illegal, 2, 8, 8,L0|L1}, /* 5f: 0101 1111 bbbb bbbb */ /* 7807 */
-
- {PRE_60, 1, 0, 0,L0|L1}, /* 60: */
- {DAA, 1, 4, 4,L0|L1}, /* 61: 0110 0001 */
- {RETI, 1,13,13,L0|L1}, /* 62: 0110 0010 */
- {STAW_wa, 2,10,10,L0|L1}, /* 63: 0110 0011 oooo oooo */
- {PRE_64, 1, 0, 0,L0|L1}, /* 64: */
- {NEIW_wa_xx, 3,19,19,L0|L1}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
- {SUI_A_xx, 2, 7, 7,L0|L1}, /* 66: 0110 0110 xxxx xxxx */
- {NEI_A_xx, 2, 7, 7,L0|L1}, /* 67: 0110 0111 xxxx xxxx */
- {MVI_V_xx, 2, 7, 7,L0|L1}, /* 68: 0110 1000 xxxx xxxx */
- {MVI_A_xx, 2, 7, 7,L0 }, /* 69: 0110 1001 xxxx xxxx */
- {MVI_B_xx, 2, 7, 7,L0|L1}, /* 6a: 0110 1010 xxxx xxxx */
- {MVI_C_xx, 2, 7, 7,L0|L1}, /* 6b: 0110 1011 xxxx xxxx */
- {MVI_D_xx, 2, 7, 7,L0|L1}, /* 6c: 0110 1100 xxxx xxxx */
- {MVI_E_xx, 2, 7, 7,L0|L1}, /* 6d: 0110 1101 xxxx xxxx */
- {MVI_H_xx, 2, 7, 7,L0|L1}, /* 6e: 0110 1110 xxxx xxxx */
- {MVI_L_xx, 2, 7, 7, L1}, /* 6f: 0110 1111 xxxx xxxx */
-
- {PRE_70, 1, 0, 0,L0|L1}, /* 70: */
- {MVIW_wa_xx, 3,13,13,L0|L1}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
- {SOFTI, 1,16,16,L0|L1}, /* 72: 0111 0010 */
- {illegal, 1, 0, 0,L0|L1}, /* 73: */
- {PRE_74, 1, 0, 0,L0|L1}, /* 74: prefix */
- {EQIW_wa_xx, 3,19,19,L0|L1}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
- {SBI_A_xx, 2, 7, 7,L0|L1}, /* 76: 0111 0110 xxxx xxxx */
- {EQI_A_xx, 2, 7, 7,L0|L1}, /* 77: 0111 0111 xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 78: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 79: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7a: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7b: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7c: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7d: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7e: 0111 1xxx xxxx xxxx */
- {CALF, 2,13,13,L0|L1}, /* 7f: 0111 1xxx xxxx xxxx */
-
- {CALT, 1,16,16,L0|L1}, /* 80: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 81: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 82: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 83: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 84: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 85: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 86: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 87: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 88: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 89: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8a: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8b: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8c: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8d: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8e: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 8f: 100x xxxx */
-
- {CALT, 1,16,16,L0|L1}, /* 90: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 91: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 92: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 93: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 94: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 95: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 96: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 97: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 98: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 99: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9a: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9b: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9c: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9d: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9e: 100x xxxx */
- {CALT, 1,16,16,L0|L1}, /* 9f: 100x xxxx */
-
- {POP_VA, 1,10,10,L0|L1}, /* a0: 1010 0000 */
- {POP_BC, 1,10,10,L0|L1}, /* a1: 1010 0001 */
- {POP_DE, 1,10,10,L0|L1}, /* a2: 1010 0010 */
- {POP_HL, 1,10,10,L0|L1}, /* a3: 1010 0011 */
- {POP_EA, 1,10,10,L0|L1}, /* a4: 1010 0100 */
- {DMOV_EA_BC, 1, 4, 4,L0|L1}, /* a5: 1010 0101 */
- {DMOV_EA_DE, 1, 4, 4,L0|L1}, /* a6: 1010 0110 */
- {DMOV_EA_HL, 1, 4, 4,L0|L1}, /* a7: 1010 0111 */
- {INX_EA, 1, 7, 7,L0|L1}, /* a8: 1010 1000 */
- {DCX_EA, 1, 7, 7,L0|L1}, /* a9: 1010 1001 */
- {EI, 1, 4, 4,L0|L1}, /* aa: 1010 1010 */
- {LDAX_D_xx, 2, 7, 7,L0|L1}, /* ab: 1010 1011 dddd dddd */
- {LDAX_H_A, 1, 7, 7,L0|L1}, /* ac: 1010 1100 */
- {LDAX_H_B, 1, 7, 7,L0|L1}, /* ad: 1010 1101 */
- {LDAX_H_EA, 1, 7, 7,L0|L1}, /* ae: 1010 1110 */
- {LDAX_H_xx, 2, 7, 7,L0|L1}, /* af: 1010 1111 dddd dddd */
-
- {PUSH_VA, 1,13,13,L0|L1}, /* b0: 1011 0000 */
- {PUSH_BC, 1,13,13,L0|L1}, /* b1: 1011 0001 */
- {PUSH_DE, 1,13,13,L0|L1}, /* b2: 1011 0010 */
- {PUSH_HL, 1,13,13,L0|L1}, /* b3: 1011 0011 */
- {PUSH_EA, 1,13,13,L0|L1}, /* b4: 1011 0100 */
- {DMOV_BC_EA, 1, 4, 4,L0|L1}, /* b5: 1011 0101 */
- {DMOV_DE_EA, 1, 4, 4,L0|L1}, /* b6: 1011 0110 */
- {DMOV_HL_EA, 1, 4, 4,L0|L1}, /* b7: 1011 0111 */
- {RET, 1,10,10,L0|L1}, /* b8: 1011 1000 */
- {RETS, 1,10,10,L0|L1}, /* b9: 1011 1001 */
- {DI, 1, 4, 4,L0|L1}, /* ba: 1011 1010 */
- {STAX_D_xx, 2, 7, 7,L0|L1}, /* bb: 1011 1011 dddd dddd */
- {STAX_H_A, 1, 7, 7,L0|L1}, /* bc: 1011 1100 */
- {STAX_H_B, 1, 7, 7,L0|L1}, /* bd: 1011 1101 */
- {STAX_H_EA, 1, 7, 7,L0|L1}, /* be: 1011 1110 */
- {STAX_H_xx, 2, 7, 7,L0|L1}, /* bf: 1011 1111 dddd dddd */
-
- {JR, 1,10,10,L0|L1}, /* c0: 1100 0000 */
- {JR, 1,10,10,L0|L1}, /* c1: 1100 0001 */
- {JR, 1,10,10,L0|L1}, /* c2: 1100 0010 */
- {JR, 1,10,10,L0|L1}, /* c3: 1100 0011 */
- {JR, 1,10,10,L0|L1}, /* c4: 1100 0100 */
- {JR, 1,10,10,L0|L1}, /* c5: 1100 0101 */
- {JR, 1,10,10,L0|L1}, /* c6: 1100 0110 */
- {JR, 1,10,10,L0|L1}, /* c7: 1100 0111 */
- {JR, 1,10,10,L0|L1}, /* c8: 1100 1000 */
- {JR, 1,10,10,L0|L1}, /* c9: 1100 1001 */
- {JR, 1,10,10,L0|L1}, /* ca: 1100 1010 */
- {JR, 1,10,10,L0|L1}, /* cb: 1100 1011 */
- {JR, 1,10,10,L0|L1}, /* cc: 1100 1100 */
- {JR, 1,10,10,L0|L1}, /* cd: 1100 1101 */
- {JR, 1,10,10,L0|L1}, /* ce: 1100 1110 */
- {JR, 1,10,10,L0|L1}, /* cf: 1100 1111 */
-
- {JR, 1,10,10,L0|L1}, /* d0: 1101 0000 */
- {JR, 1,10,10,L0|L1}, /* d1: 1101 0001 */
- {JR, 1,10,10,L0|L1}, /* d2: 1101 0010 */
- {JR, 1,10,10,L0|L1}, /* d3: 1101 0011 */
- {JR, 1,10,10,L0|L1}, /* d4: 1101 0100 */
- {JR, 1,10,10,L0|L1}, /* d5: 1101 0101 */
- {JR, 1,10,10,L0|L1}, /* d6: 1101 0110 */
- {JR, 1,10,10,L0|L1}, /* d7: 1101 0111 */
- {JR, 1,10,10,L0|L1}, /* d8: 1101 1000 */
- {JR, 1,10,10,L0|L1}, /* d9: 1101 1001 */
- {JR, 1,10,10,L0|L1}, /* da: 1101 1010 */
- {JR, 1,10,10,L0|L1}, /* db: 1101 1011 */
- {JR, 1,10,10,L0|L1}, /* dc: 1101 1100 */
- {JR, 1,10,10,L0|L1}, /* dd: 1101 1101 */
- {JR, 1,10,10,L0|L1}, /* de: 1101 1110 */
- {JR, 1,10,10,L0|L1}, /* df: 1101 1111 */
-
- {JR, 1,10,10,L0|L1}, /* e0: 1110 0000 */
- {JR, 1,10,10,L0|L1}, /* e1: 1110 0001 */
- {JR, 1,10,10,L0|L1}, /* e2: 1110 0010 */
- {JR, 1,10,10,L0|L1}, /* e3: 1110 0011 */
- {JR, 1,10,10,L0|L1}, /* e4: 1110 0100 */
- {JR, 1,10,10,L0|L1}, /* e5: 1110 0101 */
- {JR, 1,10,10,L0|L1}, /* e6: 1110 0110 */
- {JR, 1,10,10,L0|L1}, /* e7: 1110 0111 */
- {JR, 1,10,10,L0|L1}, /* e8: 1110 1000 */
- {JR, 1,10,10,L0|L1}, /* e9: 1110 1001 */
- {JR, 1,10,10,L0|L1}, /* ea: 1110 1010 */
- {JR, 1,10,10,L0|L1}, /* eb: 1110 1011 */
- {JR, 1,10,10,L0|L1}, /* ec: 1110 1100 */
- {JR, 1,10,10,L0|L1}, /* ed: 1110 1101 */
- {JR, 1,10,10,L0|L1}, /* ee: 1110 1110 */
- {JR, 1,10,10,L0|L1}, /* ef: 1110 1111 */
-
- {JR, 1,10,10,L0|L1}, /* f0: 1111 0000 */
- {JR, 1,10,10,L0|L1}, /* f1: 1111 0001 */
- {JR, 1,10,10,L0|L1}, /* f2: 1111 0010 */
- {JR, 1,10,10,L0|L1}, /* f3: 1111 0011 */
- {JR, 1,10,10,L0|L1}, /* f4: 1111 0100 */
- {JR, 1,10,10,L0|L1}, /* f5: 1111 0101 */
- {JR, 1,10,10,L0|L1}, /* f6: 1111 0110 */
- {JR, 1,10,10,L0|L1}, /* f7: 1111 0111 */
- {JR, 1,10,10,L0|L1}, /* f8: 1111 1000 */
- {JR, 1,10,10,L0|L1}, /* f9: 1111 1001 */
- {JR, 1,10,10,L0|L1}, /* fa: 1111 1010 */
- {JR, 1,10,10,L0|L1}, /* fb: 1111 1011 */
- {JR, 1,10,10,L0|L1}, /* fc: 1111 1100 */
- {JR, 1,10,10,L0|L1}, /* fd: 1111 1101 */
- {JR, 1,10,10,L0|L1}, /* fe: 1111 1110 */
- {JR, 1,10,10,L0|L1} /* ff: 1111 1111 */
+ {NOP, 1, 4, 4,L0|L1}, /* 00: 0000 0000 */
+ {LDAW_wa, 2,10,10,L0|L1}, /* 01: 0000 0001 oooo oooo */
+ {INX_SP, 1, 7, 7,L0|L1}, /* 02: 0000 0010 */
+ {DCX_SP, 1, 7, 7,L0|L1}, /* 03: 0000 0011 */
+ {LXI_S_w, 3,10,10,L0|L1}, /* 04: 0000 0100 llll llll hhhh hhhh */
+ {ANIW_wa_xx, 3,19,19,L0|L1}, /* 05: 0000 0101 oooo oooo xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 06: */
+ {ANI_A_xx, 2, 7, 7,L0|L1}, /* 07: 0000 0111 xxxx xxxx */
+ {MOV_A_EAH, 1, 4, 4,L0|L1}, /* 08: 0000 1000 */
+ {MOV_A_EAL, 1, 4, 4,L0|L1}, /* 09: 0000 1001 */
+ {MOV_A_B, 1, 4, 4,L0|L1}, /* 0a: 0000 1010 */
+ {MOV_A_C, 1, 4, 4,L0|L1}, /* 0b: 0000 1011 */
+ {MOV_A_D, 1, 4, 4,L0|L1}, /* 0c: 0000 1100 */
+ {MOV_A_E, 1, 4, 4,L0|L1}, /* 0d: 0000 1101 */
+ {MOV_A_H, 1, 4, 4,L0|L1}, /* 0e: 0000 1110 */
+ {MOV_A_L, 1, 4, 4,L0|L1}, /* 0f: 0000 1111 */
+
+ {illegal, 1,13, 4,L0|L1}, /* 10: 0001 0000 */ /* 7807 */
+ {illegal, 1,13, 4,L0|L1}, /* 11: 0001 0001 */ /* 7807 */
+ {INX_BC, 1, 7, 7,L0|L1}, /* 12: 0001 0010 */
+ {DCX_BC, 1, 7, 7,L0|L1}, /* 13: 0001 0011 */
+ {LXI_B_w, 3,10,10,L0|L1}, /* 14: 0001 0100 llll llll hhhh hhhh */
+ {ORIW_wa_xx, 3,19,19,L0|L1}, /* 15: 0001 0101 oooo oooo xxxx xxxx */
+ {XRI_A_xx, 2, 7, 7,L0|L1}, /* 16: 0001 0110 xxxx xxxx */
+ {ORI_A_xx, 2, 7, 7,L0|L1}, /* 17: 0001 0111 xxxx xxxx */
+ {MOV_EAH_A, 1, 4, 4,L0|L1}, /* 18: 0001 1000 */
+ {MOV_EAL_A, 1, 4, 4,L0|L1}, /* 19: 0001 1001 */
+ {MOV_B_A, 1, 4, 4,L0|L1}, /* 1a: 0001 1010 */
+ {MOV_C_A, 1, 4, 4,L0|L1}, /* 1b: 0001 1011 */
+ {MOV_D_A, 1, 4, 4,L0|L1}, /* 1c: 0001 1100 */
+ {MOV_E_A, 1, 4, 4,L0|L1}, /* 1d: 0001 1101 */
+ {MOV_H_A, 1, 4, 4,L0|L1}, /* 1e: 0001 1110 */
+ {MOV_L_A, 1, 4, 4,L0|L1}, /* 1f: 0001 1111 */
+
+ {INRW_wa, 2,16,16,L0|L1}, /* 20: 0010 0000 oooo oooo */
+ {JB, 1, 4, 4,L0|L1}, /* 21: 0010 0001 */
+ {INX_DE, 1, 7, 7,L0|L1}, /* 22: 0010 0010 */
+ {DCX_DE, 1, 7, 7,L0|L1}, /* 23: 0010 0011 */
+ {LXI_D_w, 3,10,10,L0|L1}, /* 24: 0010 0100 llll llll hhhh hhhh */
+ {GTIW_wa_xx, 3,19,19,L0|L1}, /* 25: 0010 0101 oooo oooo xxxx xxxx */
+ {ADINC_A_xx, 2, 7, 7,L0|L1}, /* 26: 0010 0110 xxxx xxxx */
+ {GTI_A_xx, 2, 7, 7,L0|L1}, /* 27: 0010 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 28: */
+ {LDAX_B, 2, 7, 7,L0|L1}, /* 29: 0010 1001 dddd dddd */
+ {LDAX_D, 2, 7, 7,L0|L1}, /* 2a: 0010 1010 dddd dddd */
+ {LDAX_H, 2, 7, 7,L0|L1}, /* 2b: 0010 1011 dddd dddd */
+ {LDAX_Dp, 2, 7, 7,L0|L1}, /* 2c: 0010 1100 dddd dddd */
+ {LDAX_Hp, 2, 7, 7,L0|L1}, /* 2d: 0010 1101 dddd dddd */
+ {LDAX_Dm, 2, 7, 7,L0|L1}, /* 2e: 0010 1110 dddd dddd */
+ {LDAX_Hm, 2, 7, 7,L0|L1}, /* 2f: 0010 1111 dddd dddd */
+
+ {DCRW_wa, 2,16,16,L0|L1}, /* 30: 0011 0000 oooo oooo */
+ {illegal, 2, 8, 8,L0|L1}, /* 31: 0011 0001 bbbb bbbb */ /* 7807 */
+ {INX_HL, 1, 7, 7,L0|L1}, /* 32: 0011 0010 */
+ {DCX_HL, 1, 7, 7,L0|L1}, /* 33: 0011 0011 */
+ {LXI_H_w, 3,10,10, L1}, /* 34: 0011 0100 llll llll hhhh hhhh */
+ {LTIW_wa_xx, 3,19,19,L0|L1}, /* 35: 0011 0101 oooo oooo xxxx xxxx */
+ {SUINB_A_xx, 2, 7, 7,L0|L1}, /* 36: 0011 0110 xxxx xxxx */
+ {LTI_A_xx, 2, 7, 7,L0|L1}, /* 37: 0011 0111 xxxx xxxx */
+ {illegal, 1, 4, 4,L0|L1}, /* 38: */
+ {STAX_B, 2, 7, 7,L0|L1}, /* 39: 0011 1001 dddd dddd */
+ {STAX_D, 2, 7, 7,L0|L1}, /* 3a: 0011 1010 dddd dddd */
+ {STAX_H, 2, 7, 7,L0|L1}, /* 3b: 0011 1011 dddd dddd */
+ {STAX_Dp, 2, 7, 7,L0|L1}, /* 3c: 0011 1100 dddd dddd */
+ {STAX_Hp, 2, 7, 7,L0|L1}, /* 3d: 0011 1101 dddd dddd */
+ {STAX_Dm, 2, 7, 7,L0|L1}, /* 3e: 0011 1110 dddd dddd */
+ {STAX_Hm, 2, 7, 7,L0|L1}, /* 3f: 0011 1111 dddd dddd */
+
+ {CALL_w, 3,16,16,L0|L1}, /* 40: 0100 0000 llll llll hhhh hhhh */
+ {INR_A, 1, 4, 4,L0|L1}, /* 41: 0100 0001 */
+ {INR_B, 1, 4, 4,L0|L1}, /* 42: 0100 0010 */
+ {INR_C, 1, 4, 4,L0|L1}, /* 43: 0100 0011 */
+ {LXI_EA_s, 3,10,10,L0|L1}, /* 44: 0100 0100 llll llll hhhh hhhh */
+ {ONIW_wa_xx, 3,19,19,L0|L1}, /* 45: 0100 0101 oooo oooo xxxx xxxx */
+ {ADI_A_xx, 2, 7, 7,L0|L1}, /* 46: 0100 0110 xxxx xxxx */
+ {ONI_A_xx, 2, 7, 7,L0|L1}, /* 47: 0100 0111 xxxx xxxx */
+ {PRE_48, 1, 0, 0,L0|L1}, /* 48: prefix */
+ {MVIX_BC_xx, 2,10,10,L0|L1}, /* 49: 0100 1001 xxxx xxxx */
+ {MVIX_DE_xx, 2,10,10,L0|L1}, /* 4a: 0100 1010 xxxx xxxx */
+ {MVIX_HL_xx, 2,10,10,L0|L1}, /* 4b: 0100 1011 xxxx xxxx */
+ {PRE_4C, 1, 0, 0,L0|L1}, /* 4c: prefix */
+ {PRE_4D, 1, 4, 4,L0|L1}, /* 4d: prefix */
+ {JRE, 2,10,10,L0|L1}, /* 4e: 0100 111d dddd dddd */
+ {JRE, 2,10,10,L0|L1}, /* 4f: 0100 111d dddd dddd */
+
+ {SKN_bit, 2,13,13,L0|L1}, /* 50: 0101 0000 bbbb bbbb */ /* 7807 */
+ {DCR_A, 1, 4, 4,L0|L1}, /* 51: 0101 0001 */
+ {DCR_B, 1, 4, 4,L0|L1}, /* 52: 0101 0010 */
+ {DCR_C, 1, 4, 4,L0|L1}, /* 53: 0101 0011 */
+ {JMP_w, 3,10,10,L0|L1}, /* 54: 0101 0100 llll llll hhhh hhhh */
+ {OFFIW_wa_xx, 3,19,19,L0|L1}, /* 55: 0101 0101 oooo oooo xxxx xxxx */
+ {ACI_A_xx, 2, 7, 7,L0|L1}, /* 56: 0101 0110 xxxx xxxx */
+ {OFFI_A_xx, 2, 7, 7,L0|L1}, /* 57: 0101 0111 xxxx xxxx */
+ {SETB, 2,13,13,L0|L1}, /* 58: 0101 1000 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 59: 0101 1001 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5a: 0101 1010 bbbb bbbb */ /* 7807 */
+ {CLR, 2,13,13,L0|L1}, /* 5b: 0101 1011 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5c: 0101 1100 bbbb bbbb */ /* 7807 */
+ {SK_bit, 2,10,10,L0|L1}, /* 5d: 0101 1101 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5e: 0101 1110 bbbb bbbb */ /* 7807 */
+ {illegal, 2, 8, 8,L0|L1}, /* 5f: 0101 1111 bbbb bbbb */ /* 7807 */
+
+ {PRE_60, 1, 0, 0,L0|L1}, /* 60: */
+ {DAA, 1, 4, 4,L0|L1}, /* 61: 0110 0001 */
+ {RETI, 1,13,13,L0|L1}, /* 62: 0110 0010 */
+ {STAW_wa, 2,10,10,L0|L1}, /* 63: 0110 0011 oooo oooo */
+ {PRE_64, 1, 0, 0,L0|L1}, /* 64: */
+ {NEIW_wa_xx, 3,19,19,L0|L1}, /* 65: 0110 0101 oooo oooo xxxx xxxx */
+ {SUI_A_xx, 2, 7, 7,L0|L1}, /* 66: 0110 0110 xxxx xxxx */
+ {NEI_A_xx, 2, 7, 7,L0|L1}, /* 67: 0110 0111 xxxx xxxx */
+ {MVI_V_xx, 2, 7, 7,L0|L1}, /* 68: 0110 1000 xxxx xxxx */
+ {MVI_A_xx, 2, 7, 7,L0 }, /* 69: 0110 1001 xxxx xxxx */
+ {MVI_B_xx, 2, 7, 7,L0|L1}, /* 6a: 0110 1010 xxxx xxxx */
+ {MVI_C_xx, 2, 7, 7,L0|L1}, /* 6b: 0110 1011 xxxx xxxx */
+ {MVI_D_xx, 2, 7, 7,L0|L1}, /* 6c: 0110 1100 xxxx xxxx */
+ {MVI_E_xx, 2, 7, 7,L0|L1}, /* 6d: 0110 1101 xxxx xxxx */
+ {MVI_H_xx, 2, 7, 7,L0|L1}, /* 6e: 0110 1110 xxxx xxxx */
+ {MVI_L_xx, 2, 7, 7, L1}, /* 6f: 0110 1111 xxxx xxxx */
+
+ {PRE_70, 1, 0, 0,L0|L1}, /* 70: */
+ {MVIW_wa_xx, 3,13,13,L0|L1}, /* 71: 0111 0001 oooo oooo xxxx xxxx */
+ {SOFTI, 1,16,16,L0|L1}, /* 72: 0111 0010 */
+ {illegal, 1, 0, 0,L0|L1}, /* 73: */
+ {PRE_74, 1, 0, 0,L0|L1}, /* 74: prefix */
+ {EQIW_wa_xx, 3,19,19,L0|L1}, /* 75: 0111 0101 oooo oooo xxxx xxxx */
+ {SBI_A_xx, 2, 7, 7,L0|L1}, /* 76: 0111 0110 xxxx xxxx */
+ {EQI_A_xx, 2, 7, 7,L0|L1}, /* 77: 0111 0111 xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 78: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 79: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7a: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7b: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7c: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7d: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7e: 0111 1xxx xxxx xxxx */
+ {CALF, 2,13,13,L0|L1}, /* 7f: 0111 1xxx xxxx xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 80: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 81: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 82: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 83: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 84: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 85: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 86: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 87: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 88: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 89: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 8f: 100x xxxx */
+
+ {CALT, 1,16,16,L0|L1}, /* 90: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 91: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 92: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 93: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 94: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 95: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 96: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 97: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 98: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 99: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9a: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9b: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9c: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9d: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9e: 100x xxxx */
+ {CALT, 1,16,16,L0|L1}, /* 9f: 100x xxxx */
+
+ {POP_VA, 1,10,10,L0|L1}, /* a0: 1010 0000 */
+ {POP_BC, 1,10,10,L0|L1}, /* a1: 1010 0001 */
+ {POP_DE, 1,10,10,L0|L1}, /* a2: 1010 0010 */
+ {POP_HL, 1,10,10,L0|L1}, /* a3: 1010 0011 */
+ {POP_EA, 1,10,10,L0|L1}, /* a4: 1010 0100 */
+ {DMOV_EA_BC, 1, 4, 4,L0|L1}, /* a5: 1010 0101 */
+ {DMOV_EA_DE, 1, 4, 4,L0|L1}, /* a6: 1010 0110 */
+ {DMOV_EA_HL, 1, 4, 4,L0|L1}, /* a7: 1010 0111 */
+ {INX_EA, 1, 7, 7,L0|L1}, /* a8: 1010 1000 */
+ {DCX_EA, 1, 7, 7,L0|L1}, /* a9: 1010 1001 */
+ {EI, 1, 4, 4,L0|L1}, /* aa: 1010 1010 */
+ {LDAX_D_xx, 2, 7, 7,L0|L1}, /* ab: 1010 1011 dddd dddd */
+ {LDAX_H_A, 1, 7, 7,L0|L1}, /* ac: 1010 1100 */
+ {LDAX_H_B, 1, 7, 7,L0|L1}, /* ad: 1010 1101 */
+ {LDAX_H_EA, 1, 7, 7,L0|L1}, /* ae: 1010 1110 */
+ {LDAX_H_xx, 2, 7, 7,L0|L1}, /* af: 1010 1111 dddd dddd */
+
+ {PUSH_VA, 1,13,13,L0|L1}, /* b0: 1011 0000 */
+ {PUSH_BC, 1,13,13,L0|L1}, /* b1: 1011 0001 */
+ {PUSH_DE, 1,13,13,L0|L1}, /* b2: 1011 0010 */
+ {PUSH_HL, 1,13,13,L0|L1}, /* b3: 1011 0011 */
+ {PUSH_EA, 1,13,13,L0|L1}, /* b4: 1011 0100 */
+ {DMOV_BC_EA, 1, 4, 4,L0|L1}, /* b5: 1011 0101 */
+ {DMOV_DE_EA, 1, 4, 4,L0|L1}, /* b6: 1011 0110 */
+ {DMOV_HL_EA, 1, 4, 4,L0|L1}, /* b7: 1011 0111 */
+ {RET, 1,10,10,L0|L1}, /* b8: 1011 1000 */
+ {RETS, 1,10,10,L0|L1}, /* b9: 1011 1001 */
+ {DI, 1, 4, 4,L0|L1}, /* ba: 1011 1010 */
+ {STAX_D_xx, 2, 7, 7,L0|L1}, /* bb: 1011 1011 dddd dddd */
+ {STAX_H_A, 1, 7, 7,L0|L1}, /* bc: 1011 1100 */
+ {STAX_H_B, 1, 7, 7,L0|L1}, /* bd: 1011 1101 */
+ {STAX_H_EA, 1, 7, 7,L0|L1}, /* be: 1011 1110 */
+ {STAX_H_xx, 2, 7, 7,L0|L1}, /* bf: 1011 1111 dddd dddd */
+
+ {JR, 1,10,10,L0|L1}, /* c0: 1100 0000 */
+ {JR, 1,10,10,L0|L1}, /* c1: 1100 0001 */
+ {JR, 1,10,10,L0|L1}, /* c2: 1100 0010 */
+ {JR, 1,10,10,L0|L1}, /* c3: 1100 0011 */
+ {JR, 1,10,10,L0|L1}, /* c4: 1100 0100 */
+ {JR, 1,10,10,L0|L1}, /* c5: 1100 0101 */
+ {JR, 1,10,10,L0|L1}, /* c6: 1100 0110 */
+ {JR, 1,10,10,L0|L1}, /* c7: 1100 0111 */
+ {JR, 1,10,10,L0|L1}, /* c8: 1100 1000 */
+ {JR, 1,10,10,L0|L1}, /* c9: 1100 1001 */
+ {JR, 1,10,10,L0|L1}, /* ca: 1100 1010 */
+ {JR, 1,10,10,L0|L1}, /* cb: 1100 1011 */
+ {JR, 1,10,10,L0|L1}, /* cc: 1100 1100 */
+ {JR, 1,10,10,L0|L1}, /* cd: 1100 1101 */
+ {JR, 1,10,10,L0|L1}, /* ce: 1100 1110 */
+ {JR, 1,10,10,L0|L1}, /* cf: 1100 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* d0: 1101 0000 */
+ {JR, 1,10,10,L0|L1}, /* d1: 1101 0001 */
+ {JR, 1,10,10,L0|L1}, /* d2: 1101 0010 */
+ {JR, 1,10,10,L0|L1}, /* d3: 1101 0011 */
+ {JR, 1,10,10,L0|L1}, /* d4: 1101 0100 */
+ {JR, 1,10,10,L0|L1}, /* d5: 1101 0101 */
+ {JR, 1,10,10,L0|L1}, /* d6: 1101 0110 */
+ {JR, 1,10,10,L0|L1}, /* d7: 1101 0111 */
+ {JR, 1,10,10,L0|L1}, /* d8: 1101 1000 */
+ {JR, 1,10,10,L0|L1}, /* d9: 1101 1001 */
+ {JR, 1,10,10,L0|L1}, /* da: 1101 1010 */
+ {JR, 1,10,10,L0|L1}, /* db: 1101 1011 */
+ {JR, 1,10,10,L0|L1}, /* dc: 1101 1100 */
+ {JR, 1,10,10,L0|L1}, /* dd: 1101 1101 */
+ {JR, 1,10,10,L0|L1}, /* de: 1101 1110 */
+ {JR, 1,10,10,L0|L1}, /* df: 1101 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* e0: 1110 0000 */
+ {JR, 1,10,10,L0|L1}, /* e1: 1110 0001 */
+ {JR, 1,10,10,L0|L1}, /* e2: 1110 0010 */
+ {JR, 1,10,10,L0|L1}, /* e3: 1110 0011 */
+ {JR, 1,10,10,L0|L1}, /* e4: 1110 0100 */
+ {JR, 1,10,10,L0|L1}, /* e5: 1110 0101 */
+ {JR, 1,10,10,L0|L1}, /* e6: 1110 0110 */
+ {JR, 1,10,10,L0|L1}, /* e7: 1110 0111 */
+ {JR, 1,10,10,L0|L1}, /* e8: 1110 1000 */
+ {JR, 1,10,10,L0|L1}, /* e9: 1110 1001 */
+ {JR, 1,10,10,L0|L1}, /* ea: 1110 1010 */
+ {JR, 1,10,10,L0|L1}, /* eb: 1110 1011 */
+ {JR, 1,10,10,L0|L1}, /* ec: 1110 1100 */
+ {JR, 1,10,10,L0|L1}, /* ed: 1110 1101 */
+ {JR, 1,10,10,L0|L1}, /* ee: 1110 1110 */
+ {JR, 1,10,10,L0|L1}, /* ef: 1110 1111 */
+
+ {JR, 1,10,10,L0|L1}, /* f0: 1111 0000 */
+ {JR, 1,10,10,L0|L1}, /* f1: 1111 0001 */
+ {JR, 1,10,10,L0|L1}, /* f2: 1111 0010 */
+ {JR, 1,10,10,L0|L1}, /* f3: 1111 0011 */
+ {JR, 1,10,10,L0|L1}, /* f4: 1111 0100 */
+ {JR, 1,10,10,L0|L1}, /* f5: 1111 0101 */
+ {JR, 1,10,10,L0|L1}, /* f6: 1111 0110 */
+ {JR, 1,10,10,L0|L1}, /* f7: 1111 0111 */
+ {JR, 1,10,10,L0|L1}, /* f8: 1111 1000 */
+ {JR, 1,10,10,L0|L1}, /* f9: 1111 1001 */
+ {JR, 1,10,10,L0|L1}, /* fa: 1111 1010 */
+ {JR, 1,10,10,L0|L1}, /* fb: 1111 1011 */
+ {JR, 1,10,10,L0|L1}, /* fc: 1111 1100 */
+ {JR, 1,10,10,L0|L1}, /* fd: 1111 1101 */
+ {JR, 1,10,10,L0|L1}, /* fe: 1111 1110 */
+ {JR, 1,10,10,L0|L1} /* ff: 1111 1111 */
};
@@ -3544,1246 +3544,1246 @@ static const struct opcode_s opXX_7807[256] =
static const struct opcode_s op48_7801[256] =
{
/* 0x00 - 0x1F */
- {SKIT_F0, 2, 8, 8,L0|L1}, {SKIT_FT0, 2, 8, 8,L0|L1},
- {SKIT_F1, 2, 8, 8,L0|L1}, {SKIT_F2, 2, 8, 8,L0|L1},
- {SKIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SK_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PUSH_VA, 2,17,17,L0|L1}, {POP_VA, 2,15,15,L0|L1},
-
- {SKNIT_F0, 2, 8, 8,L0|L1}, {SKNIT_FT0, 2, 8, 8,L0|L1},
- {SKNIT_F1, 2, 8, 8,L0|L1}, {SKNIT_F2, 2, 8, 8,L0|L1},
- {SKNIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal, 2, 8, 8,L0|L1},
- {SKN_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SKN_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PUSH_BC, 2,17,17,L0|L1}, {POP_BC, 2,15,15,L0|L1},
+ {SKIT_F0, 2, 8, 8,L0|L1}, {SKIT_FT0, 2, 8, 8,L0|L1},
+ {SKIT_F1, 2, 8, 8,L0|L1}, {SKIT_F2, 2, 8, 8,L0|L1},
+ {SKIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SK_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PUSH_VA, 2,17,17,L0|L1}, {POP_VA, 2,15,15,L0|L1},
+
+ {SKNIT_F0, 2, 8, 8,L0|L1}, {SKNIT_FT0, 2, 8, 8,L0|L1},
+ {SKNIT_F1, 2, 8, 8,L0|L1}, {SKNIT_F2, 2, 8, 8,L0|L1},
+ {SKNIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal, 2, 8, 8,L0|L1},
+ {SKN_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SKN_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PUSH_BC, 2,17,17,L0|L1}, {POP_BC, 2,15,15,L0|L1},
/* 0x20 - 0x3F */
- {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {CLC, 2, 8, 8,L0|L1}, {STC, 2, 8, 8,L0|L1},
- {PEN, 2,11,11,L0|L1}, {PEX, 2,11,11,L0|L1},
- {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,15,15,L0|L1},
-
- {RLL_A, 2, 8, 8,L0|L1}, {RLR_A, 2, 8, 8,L0|L1},
- {RLL_C, 2, 8, 8,L0|L1}, {RLR_C, 2, 8, 8,L0|L1},
- {SLL_A, 2, 8, 8,L0|L1}, {SLR_A, 2, 8, 8,L0|L1},
- {SLL_C, 2, 8, 8,L0|L1}, {SLR_C, 2, 8, 8,L0|L1},
- {RLD, 2,17,17,L0|L1}, {RRD, 2,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PER, 2,11,11,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,15,15,L0|L1},
+ {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {CLC, 2, 8, 8,L0|L1}, {STC, 2, 8, 8,L0|L1},
+ {PEN, 2,11,11,L0|L1}, {PEX, 2,11,11,L0|L1},
+ {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,15,15,L0|L1},
+
+ {RLL_A, 2, 8, 8,L0|L1}, {RLR_A, 2, 8, 8,L0|L1},
+ {RLL_C, 2, 8, 8,L0|L1}, {RLR_C, 2, 8, 8,L0|L1},
+ {SLL_A, 2, 8, 8,L0|L1}, {SLR_A, 2, 8, 8,L0|L1},
+ {SLL_C, 2, 8, 8,L0|L1}, {SLR_C, 2, 8, 8,L0|L1},
+ {RLD, 2,17,17,L0|L1}, {RRD, 2,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PER, 2,11,11,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,15,15,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
static const struct opcode_s op4C_7801[256] =
{
/* 0x00 - 0x1F */
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
-
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
/* 0x20 - 0x3F */
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
-
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
/* 0x40 - 0x5F */
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
-
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
/* 0x60 - 0x7F */
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
-
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
/* 0x80 - 0x9F */
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
-
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
/* 0xA0 - 0xBF */
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
-
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
- {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
+ {IN, 2,10,10,L0|L1}, {IN, 2,10,10,L0|L1},
/* 0xC0 - 0xDF */
- {MOV_A_PA, 2,10,10,L0|L1}, {MOV_A_PB, 2,10,10,L0|L1},
- {MOV_A_PC, 2,10,10,L0|L1}, {MOV_A_MKL, 2,10,10,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {MOV_A_S, 2,10,10,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_A_PA, 2,10,10,L0|L1}, {MOV_A_PB, 2,10,10,L0|L1},
+ {MOV_A_PC, 2,10,10,L0|L1}, {MOV_A_MKL, 2,10,10,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_A_S, 2,10,10,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
/* prefix 4D */
static const struct opcode_s op4D_7801[256] =
{
/* 0x00 - 0x1F */
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
-
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
/* 0x20 - 0x3F */
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
-
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
/* 0x40 - 0x5F */
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
-
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
/* 0x60 - 0x7F */
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
-
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
/* 0x80 - 0x9F */
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
-
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
/* 0xA0 - 0xBF */
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
-
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
- {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
+ {OUT, 2,10,10,L0|L1}, {OUT, 2,10,10,L0|L1},
/* 0xC0 - 0xDF */
- {MOV_PA_A, 2,10,10,L0|L1}, {MOV_PB_A, 2,10,10,L0|L1},
- {MOV_PC_A, 2,10,10,L0|L1}, {MOV_MKL_A, 2,10,10,L0|L1},
- {MOV_MB_A, 2,10,10,L0|L1}, {MOV_MC_A_7801, 2,10,10,L0|L1},
- {MOV_TM0_A, 2,10,10,L0|L1}, {MOV_TM1_A, 2,10,10,L0|L1},
- {MOV_S_A, 2,10,10,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_PA_A, 2,10,10,L0|L1}, {MOV_PB_A, 2,10,10,L0|L1},
+ {MOV_PC_A, 2,10,10,L0|L1}, {MOV_MKL_A, 2,10,10,L0|L1},
+ {MOV_MB_A, 2,10,10,L0|L1}, {MOV_MC_A_7801, 2,10,10,L0|L1},
+ {MOV_TM0_A, 2,10,10,L0|L1}, {MOV_TM1_A, 2,10,10,L0|L1},
+ {MOV_S_A, 2,10,10,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
/* prefix 60 */
static const struct opcode_s op60_7801[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ANA_V_A, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
- {ANA_B_A, 2, 8, 8,L0|L1}, {ANA_C_A, 2, 8, 8,L0|L1},
- {ANA_D_A, 2, 8, 8,L0|L1}, {ANA_E_A, 2, 8, 8,L0|L1},
- {ANA_H_A, 2, 8, 8,L0|L1}, {ANA_L_A, 2, 8, 8,L0|L1},
-
- {XRA_V_A, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
- {XRA_B_A, 2, 8, 8,L0|L1}, {XRA_C_A, 2, 8, 8,L0|L1},
- {XRA_D_A, 2, 8, 8,L0|L1}, {XRA_E_A, 2, 8, 8,L0|L1},
- {XRA_H_A, 2, 8, 8,L0|L1}, {XRA_L_A, 2, 8, 8,L0|L1},
- {ORA_V_A, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
- {ORA_B_A, 2, 8, 8,L0|L1}, {ORA_C_A, 2, 8, 8,L0|L1},
- {ORA_D_A, 2, 8, 8,L0|L1}, {ORA_E_A, 2, 8, 8,L0|L1},
- {ORA_H_A, 2, 8, 8,L0|L1}, {ORA_L_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ANA_V_A, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
+ {ANA_B_A, 2, 8, 8,L0|L1}, {ANA_C_A, 2, 8, 8,L0|L1},
+ {ANA_D_A, 2, 8, 8,L0|L1}, {ANA_E_A, 2, 8, 8,L0|L1},
+ {ANA_H_A, 2, 8, 8,L0|L1}, {ANA_L_A, 2, 8, 8,L0|L1},
+
+ {XRA_V_A, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
+ {XRA_B_A, 2, 8, 8,L0|L1}, {XRA_C_A, 2, 8, 8,L0|L1},
+ {XRA_D_A, 2, 8, 8,L0|L1}, {XRA_E_A, 2, 8, 8,L0|L1},
+ {XRA_H_A, 2, 8, 8,L0|L1}, {XRA_L_A, 2, 8, 8,L0|L1},
+ {ORA_V_A, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
+ {ORA_B_A, 2, 8, 8,L0|L1}, {ORA_C_A, 2, 8, 8,L0|L1},
+ {ORA_D_A, 2, 8, 8,L0|L1}, {ORA_E_A, 2, 8, 8,L0|L1},
+ {ORA_H_A, 2, 8, 8,L0|L1}, {ORA_L_A, 2, 8, 8,L0|L1},
/* 0x20 - 0x3F */
- {ADDNC_V_A, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
- {ADDNC_B_A, 2, 8, 8,L0|L1}, {ADDNC_C_A, 2, 8, 8,L0|L1},
- {ADDNC_D_A, 2, 8, 8,L0|L1}, {ADDNC_E_A, 2, 8, 8,L0|L1},
- {ADDNC_H_A, 2, 8, 8,L0|L1}, {ADDNC_L_A, 2, 8, 8,L0|L1},
- {GTA_V_A, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
- {GTA_B_A, 2, 8, 8,L0|L1}, {GTA_C_A, 2, 8, 8,L0|L1},
- {GTA_D_A, 2, 8, 8,L0|L1}, {GTA_E_A, 2, 8, 8,L0|L1},
- {GTA_H_A, 2, 8, 8,L0|L1}, {GTA_L_A, 2, 8, 8,L0|L1},
-
- {SUBNB_V_A, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
- {SUBNB_B_A, 2, 8, 8,L0|L1}, {SUBNB_C_A, 2, 8, 8,L0|L1},
- {SUBNB_D_A, 2, 8, 8,L0|L1}, {SUBNB_E_A, 2, 8, 8,L0|L1},
- {SUBNB_H_A, 2, 8, 8,L0|L1}, {SUBNB_L_A, 2, 8, 8,L0|L1},
- {LTA_V_A, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
- {LTA_B_A, 2, 8, 8,L0|L1}, {LTA_C_A, 2, 8, 8,L0|L1},
- {LTA_D_A, 2, 8, 8,L0|L1}, {LTA_E_A, 2, 8, 8,L0|L1},
- {LTA_H_A, 2, 8, 8,L0|L1}, {LTA_L_A, 2, 8, 8,L0|L1},
+ {ADDNC_V_A, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
+ {ADDNC_B_A, 2, 8, 8,L0|L1}, {ADDNC_C_A, 2, 8, 8,L0|L1},
+ {ADDNC_D_A, 2, 8, 8,L0|L1}, {ADDNC_E_A, 2, 8, 8,L0|L1},
+ {ADDNC_H_A, 2, 8, 8,L0|L1}, {ADDNC_L_A, 2, 8, 8,L0|L1},
+ {GTA_V_A, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
+ {GTA_B_A, 2, 8, 8,L0|L1}, {GTA_C_A, 2, 8, 8,L0|L1},
+ {GTA_D_A, 2, 8, 8,L0|L1}, {GTA_E_A, 2, 8, 8,L0|L1},
+ {GTA_H_A, 2, 8, 8,L0|L1}, {GTA_L_A, 2, 8, 8,L0|L1},
+
+ {SUBNB_V_A, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
+ {SUBNB_B_A, 2, 8, 8,L0|L1}, {SUBNB_C_A, 2, 8, 8,L0|L1},
+ {SUBNB_D_A, 2, 8, 8,L0|L1}, {SUBNB_E_A, 2, 8, 8,L0|L1},
+ {SUBNB_H_A, 2, 8, 8,L0|L1}, {SUBNB_L_A, 2, 8, 8,L0|L1},
+ {LTA_V_A, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
+ {LTA_B_A, 2, 8, 8,L0|L1}, {LTA_C_A, 2, 8, 8,L0|L1},
+ {LTA_D_A, 2, 8, 8,L0|L1}, {LTA_E_A, 2, 8, 8,L0|L1},
+ {LTA_H_A, 2, 8, 8,L0|L1}, {LTA_L_A, 2, 8, 8,L0|L1},
/* 0x40 - 0x5F */
- {ADD_V_A, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
- {ADD_B_A, 2, 8, 8,L0|L1}, {ADD_C_A, 2, 8, 8,L0|L1},
- {ADD_D_A, 2, 8, 8,L0|L1}, {ADD_E_A, 2, 8, 8,L0|L1},
- {ADD_H_A, 2, 8, 8,L0|L1}, {ADD_L_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {ADC_V_A, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
- {ADC_B_A, 2, 8, 8,L0|L1}, {ADC_C_A, 2, 8, 8,L0|L1},
- {ADC_D_A, 2, 8, 8,L0|L1}, {ADC_E_A, 2, 8, 8,L0|L1},
- {ADC_H_A, 2, 8, 8,L0|L1}, {ADC_L_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADD_V_A, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
+ {ADD_B_A, 2, 8, 8,L0|L1}, {ADD_C_A, 2, 8, 8,L0|L1},
+ {ADD_D_A, 2, 8, 8,L0|L1}, {ADD_E_A, 2, 8, 8,L0|L1},
+ {ADD_H_A, 2, 8, 8,L0|L1}, {ADD_L_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {ADC_V_A, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
+ {ADC_B_A, 2, 8, 8,L0|L1}, {ADC_C_A, 2, 8, 8,L0|L1},
+ {ADC_D_A, 2, 8, 8,L0|L1}, {ADC_E_A, 2, 8, 8,L0|L1},
+ {ADC_H_A, 2, 8, 8,L0|L1}, {ADC_L_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {SUB_V_A, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
- {SUB_B_A, 2, 8, 8,L0|L1}, {SUB_C_A, 2, 8, 8,L0|L1},
- {SUB_D_A, 2, 8, 8,L0|L1}, {SUB_E_A, 2, 8, 8,L0|L1},
- {SUB_H_A, 2, 8, 8,L0|L1}, {SUB_L_A, 2, 8, 8,L0|L1},
- {NEA_V_A, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
- {NEA_B_A, 2, 8, 8,L0|L1}, {NEA_C_A, 2, 8, 8,L0|L1},
- {NEA_D_A, 2, 8, 8,L0|L1}, {NEA_E_A, 2, 8, 8,L0|L1},
- {NEA_H_A, 2, 8, 8,L0|L1}, {NEA_L_A, 2, 8, 8,L0|L1},
-
- {SBB_V_A, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
- {SBB_B_A, 2, 8, 8,L0|L1}, {SBB_C_A, 2, 8, 8,L0|L1},
- {SBB_D_A, 2, 8, 8,L0|L1}, {SBB_E_A, 2, 8, 8,L0|L1},
- {SBB_H_A, 2, 8, 8,L0|L1}, {SBB_L_A, 2, 8, 8,L0|L1},
- {EQA_V_A, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
- {EQA_B_A, 2, 8, 8,L0|L1}, {EQA_C_A, 2, 8, 8,L0|L1},
- {EQA_D_A, 2, 8, 8,L0|L1}, {EQA_E_A, 2, 8, 8,L0|L1},
- {EQA_H_A, 2, 8, 8,L0|L1}, {EQA_L_A, 2, 8, 8,L0|L1},
+ {SUB_V_A, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
+ {SUB_B_A, 2, 8, 8,L0|L1}, {SUB_C_A, 2, 8, 8,L0|L1},
+ {SUB_D_A, 2, 8, 8,L0|L1}, {SUB_E_A, 2, 8, 8,L0|L1},
+ {SUB_H_A, 2, 8, 8,L0|L1}, {SUB_L_A, 2, 8, 8,L0|L1},
+ {NEA_V_A, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
+ {NEA_B_A, 2, 8, 8,L0|L1}, {NEA_C_A, 2, 8, 8,L0|L1},
+ {NEA_D_A, 2, 8, 8,L0|L1}, {NEA_E_A, 2, 8, 8,L0|L1},
+ {NEA_H_A, 2, 8, 8,L0|L1}, {NEA_L_A, 2, 8, 8,L0|L1},
+
+ {SBB_V_A, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
+ {SBB_B_A, 2, 8, 8,L0|L1}, {SBB_C_A, 2, 8, 8,L0|L1},
+ {SBB_D_A, 2, 8, 8,L0|L1}, {SBB_E_A, 2, 8, 8,L0|L1},
+ {SBB_H_A, 2, 8, 8,L0|L1}, {SBB_L_A, 2, 8, 8,L0|L1},
+ {EQA_V_A, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
+ {EQA_B_A, 2, 8, 8,L0|L1}, {EQA_C_A, 2, 8, 8,L0|L1},
+ {EQA_D_A, 2, 8, 8,L0|L1}, {EQA_E_A, 2, 8, 8,L0|L1},
+ {EQA_H_A, 2, 8, 8,L0|L1}, {EQA_L_A, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ANA_A_V, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
- {ANA_A_B, 2, 8, 8,L0|L1}, {ANA_A_C, 2, 8, 8,L0|L1},
- {ANA_A_D, 2, 8, 8,L0|L1}, {ANA_A_E, 2, 8, 8,L0|L1},
- {ANA_A_H, 2, 8, 8,L0|L1}, {ANA_A_L, 2, 8, 8,L0|L1},
-
- {XRA_A_V, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
- {XRA_A_B, 2, 8, 8,L0|L1}, {XRA_A_C, 2, 8, 8,L0|L1},
- {XRA_A_D, 2, 8, 8,L0|L1}, {XRA_A_E, 2, 8, 8,L0|L1},
- {XRA_A_H, 2, 8, 8,L0|L1}, {XRA_A_L, 2, 8, 8,L0|L1},
- {ORA_A_V, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
- {ORA_A_B, 2, 8, 8,L0|L1}, {ORA_A_C, 2, 8, 8,L0|L1},
- {ORA_A_D, 2, 8, 8,L0|L1}, {ORA_A_E, 2, 8, 8,L0|L1},
- {ORA_A_H, 2, 8, 8,L0|L1}, {ORA_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ANA_A_V, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
+ {ANA_A_B, 2, 8, 8,L0|L1}, {ANA_A_C, 2, 8, 8,L0|L1},
+ {ANA_A_D, 2, 8, 8,L0|L1}, {ANA_A_E, 2, 8, 8,L0|L1},
+ {ANA_A_H, 2, 8, 8,L0|L1}, {ANA_A_L, 2, 8, 8,L0|L1},
+
+ {XRA_A_V, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
+ {XRA_A_B, 2, 8, 8,L0|L1}, {XRA_A_C, 2, 8, 8,L0|L1},
+ {XRA_A_D, 2, 8, 8,L0|L1}, {XRA_A_E, 2, 8, 8,L0|L1},
+ {XRA_A_H, 2, 8, 8,L0|L1}, {XRA_A_L, 2, 8, 8,L0|L1},
+ {ORA_A_V, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
+ {ORA_A_B, 2, 8, 8,L0|L1}, {ORA_A_C, 2, 8, 8,L0|L1},
+ {ORA_A_D, 2, 8, 8,L0|L1}, {ORA_A_E, 2, 8, 8,L0|L1},
+ {ORA_A_H, 2, 8, 8,L0|L1}, {ORA_A_L, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {ADDNC_A_V, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
- {ADDNC_A_B, 2, 8, 8,L0|L1}, {ADDNC_A_C, 2, 8, 8,L0|L1},
- {ADDNC_A_D, 2, 8, 8,L0|L1}, {ADDNC_A_E, 2, 8, 8,L0|L1},
- {ADDNC_A_H, 2, 8, 8,L0|L1}, {ADDNC_A_L, 2, 8, 8,L0|L1},
- {GTA_A_V, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
- {GTA_A_B, 2, 8, 8,L0|L1}, {GTA_A_C, 2, 8, 8,L0|L1},
- {GTA_A_D, 2, 8, 8,L0|L1}, {GTA_A_E, 2, 8, 8,L0|L1},
- {GTA_A_H, 2, 8, 8,L0|L1}, {GTA_A_L, 2, 8, 8,L0|L1},
-
- {SUBNB_A_V, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
- {SUBNB_A_B, 2, 8, 8,L0|L1}, {SUBNB_A_C, 2, 8, 8,L0|L1},
- {SUBNB_A_D, 2, 8, 8,L0|L1}, {SUBNB_A_E, 2, 8, 8,L0|L1},
- {SUBNB_A_H, 2, 8, 8,L0|L1}, {SUBNB_A_L, 2, 8, 8,L0|L1},
- {LTA_A_V, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
- {LTA_A_B, 2, 8, 8,L0|L1}, {LTA_A_C, 2, 8, 8,L0|L1},
- {LTA_A_D, 2, 8, 8,L0|L1}, {LTA_A_E, 2, 8, 8,L0|L1},
- {LTA_A_H, 2, 8, 8,L0|L1}, {LTA_A_L, 2, 8, 8,L0|L1},
+ {ADDNC_A_V, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
+ {ADDNC_A_B, 2, 8, 8,L0|L1}, {ADDNC_A_C, 2, 8, 8,L0|L1},
+ {ADDNC_A_D, 2, 8, 8,L0|L1}, {ADDNC_A_E, 2, 8, 8,L0|L1},
+ {ADDNC_A_H, 2, 8, 8,L0|L1}, {ADDNC_A_L, 2, 8, 8,L0|L1},
+ {GTA_A_V, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
+ {GTA_A_B, 2, 8, 8,L0|L1}, {GTA_A_C, 2, 8, 8,L0|L1},
+ {GTA_A_D, 2, 8, 8,L0|L1}, {GTA_A_E, 2, 8, 8,L0|L1},
+ {GTA_A_H, 2, 8, 8,L0|L1}, {GTA_A_L, 2, 8, 8,L0|L1},
+
+ {SUBNB_A_V, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
+ {SUBNB_A_B, 2, 8, 8,L0|L1}, {SUBNB_A_C, 2, 8, 8,L0|L1},
+ {SUBNB_A_D, 2, 8, 8,L0|L1}, {SUBNB_A_E, 2, 8, 8,L0|L1},
+ {SUBNB_A_H, 2, 8, 8,L0|L1}, {SUBNB_A_L, 2, 8, 8,L0|L1},
+ {LTA_A_V, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
+ {LTA_A_B, 2, 8, 8,L0|L1}, {LTA_A_C, 2, 8, 8,L0|L1},
+ {LTA_A_D, 2, 8, 8,L0|L1}, {LTA_A_E, 2, 8, 8,L0|L1},
+ {LTA_A_H, 2, 8, 8,L0|L1}, {LTA_A_L, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {ADD_A_V, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
- {ADD_A_B, 2, 8, 8,L0|L1}, {ADD_A_C, 2, 8, 8,L0|L1},
- {ADD_A_D, 2, 8, 8,L0|L1}, {ADD_A_E, 2, 8, 8,L0|L1},
- {ADD_A_H, 2, 8, 8,L0|L1}, {ADD_A_L, 2, 8, 8,L0|L1},
- {ONA_A_V, 2, 8, 8,L0|L1}, {ONA_A_A, 2, 8, 8,L0|L1},
- {ONA_A_B, 2, 8, 8,L0|L1}, {ONA_A_C, 2, 8, 8,L0|L1},
- {ONA_A_D, 2, 8, 8,L0|L1}, {ONA_A_E, 2, 8, 8,L0|L1},
- {ONA_A_H, 2, 8, 8,L0|L1}, {ONA_A_L, 2, 8, 8,L0|L1},
-
- {ADC_A_V, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
- {ADC_A_B, 2, 8, 8,L0|L1}, {ADC_A_C, 2, 8, 8,L0|L1},
- {ADC_A_D, 2, 8, 8,L0|L1}, {ADC_A_E, 2, 8, 8,L0|L1},
- {ADC_A_H, 2, 8, 8,L0|L1}, {ADC_A_L, 2, 8, 8,L0|L1},
- {OFFA_A_V, 2, 8, 8,L0|L1}, {OFFA_A_A, 2, 8, 8,L0|L1},
- {OFFA_A_B, 2, 8, 8,L0|L1}, {OFFA_A_C, 2, 8, 8,L0|L1},
- {OFFA_A_D, 2, 8, 8,L0|L1}, {OFFA_A_E, 2, 8, 8,L0|L1},
- {OFFA_A_H, 2, 8, 8,L0|L1}, {OFFA_A_L, 2, 8, 8,L0|L1},
+ {ADD_A_V, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
+ {ADD_A_B, 2, 8, 8,L0|L1}, {ADD_A_C, 2, 8, 8,L0|L1},
+ {ADD_A_D, 2, 8, 8,L0|L1}, {ADD_A_E, 2, 8, 8,L0|L1},
+ {ADD_A_H, 2, 8, 8,L0|L1}, {ADD_A_L, 2, 8, 8,L0|L1},
+ {ONA_A_V, 2, 8, 8,L0|L1}, {ONA_A_A, 2, 8, 8,L0|L1},
+ {ONA_A_B, 2, 8, 8,L0|L1}, {ONA_A_C, 2, 8, 8,L0|L1},
+ {ONA_A_D, 2, 8, 8,L0|L1}, {ONA_A_E, 2, 8, 8,L0|L1},
+ {ONA_A_H, 2, 8, 8,L0|L1}, {ONA_A_L, 2, 8, 8,L0|L1},
+
+ {ADC_A_V, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
+ {ADC_A_B, 2, 8, 8,L0|L1}, {ADC_A_C, 2, 8, 8,L0|L1},
+ {ADC_A_D, 2, 8, 8,L0|L1}, {ADC_A_E, 2, 8, 8,L0|L1},
+ {ADC_A_H, 2, 8, 8,L0|L1}, {ADC_A_L, 2, 8, 8,L0|L1},
+ {OFFA_A_V, 2, 8, 8,L0|L1}, {OFFA_A_A, 2, 8, 8,L0|L1},
+ {OFFA_A_B, 2, 8, 8,L0|L1}, {OFFA_A_C, 2, 8, 8,L0|L1},
+ {OFFA_A_D, 2, 8, 8,L0|L1}, {OFFA_A_E, 2, 8, 8,L0|L1},
+ {OFFA_A_H, 2, 8, 8,L0|L1}, {OFFA_A_L, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {SUB_A_V, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
- {SUB_A_B, 2, 8, 8,L0|L1}, {SUB_A_C, 2, 8, 8,L0|L1},
- {SUB_A_D, 2, 8, 8,L0|L1}, {SUB_A_E, 2, 8, 8,L0|L1},
- {SUB_A_H, 2, 8, 8,L0|L1}, {SUB_A_L, 2, 8, 8,L0|L1},
- {NEA_A_V, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
- {NEA_A_B, 2, 8, 8,L0|L1}, {NEA_A_C, 2, 8, 8,L0|L1},
- {NEA_A_D, 2, 8, 8,L0|L1}, {NEA_A_E, 2, 8, 8,L0|L1},
- {NEA_A_H, 2, 8, 8,L0|L1}, {NEA_A_L, 2, 8, 8,L0|L1},
-
- {SBB_A_V, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
- {SBB_A_B, 2, 8, 8,L0|L1}, {SBB_A_C, 2, 8, 8,L0|L1},
- {SBB_A_D, 2, 8, 8,L0|L1}, {SBB_A_E, 2, 8, 8,L0|L1},
- {SBB_A_H, 2, 8, 8,L0|L1}, {SBB_A_L, 2, 8, 8,L0|L1},
- {EQA_A_V, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
- {EQA_A_B, 2, 8, 8,L0|L1}, {EQA_A_C, 2, 8, 8,L0|L1},
- {EQA_A_D, 2, 8, 8,L0|L1}, {EQA_A_E, 2, 8, 8,L0|L1},
- {EQA_A_H, 2, 8, 8,L0|L1}, {EQA_A_L, 2, 8, 8,L0|L1}
+ {SUB_A_V, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
+ {SUB_A_B, 2, 8, 8,L0|L1}, {SUB_A_C, 2, 8, 8,L0|L1},
+ {SUB_A_D, 2, 8, 8,L0|L1}, {SUB_A_E, 2, 8, 8,L0|L1},
+ {SUB_A_H, 2, 8, 8,L0|L1}, {SUB_A_L, 2, 8, 8,L0|L1},
+ {NEA_A_V, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
+ {NEA_A_B, 2, 8, 8,L0|L1}, {NEA_A_C, 2, 8, 8,L0|L1},
+ {NEA_A_D, 2, 8, 8,L0|L1}, {NEA_A_E, 2, 8, 8,L0|L1},
+ {NEA_A_H, 2, 8, 8,L0|L1}, {NEA_A_L, 2, 8, 8,L0|L1},
+
+ {SBB_A_V, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
+ {SBB_A_B, 2, 8, 8,L0|L1}, {SBB_A_C, 2, 8, 8,L0|L1},
+ {SBB_A_D, 2, 8, 8,L0|L1}, {SBB_A_E, 2, 8, 8,L0|L1},
+ {SBB_A_H, 2, 8, 8,L0|L1}, {SBB_A_L, 2, 8, 8,L0|L1},
+ {EQA_A_V, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
+ {EQA_A_B, 2, 8, 8,L0|L1}, {EQA_A_C, 2, 8, 8,L0|L1},
+ {EQA_A_D, 2, 8, 8,L0|L1}, {EQA_A_E, 2, 8, 8,L0|L1},
+ {EQA_A_H, 2, 8, 8,L0|L1}, {EQA_A_L, 2, 8, 8,L0|L1}
};
/* prefix 64 */
static const struct opcode_s op64_7801[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ANI_V_xx, 3,11,11,L0|L1}, {ANI_A_xx, 3,11,11,L0|L1},
- {ANI_B_xx, 3,11,11,L0|L1}, {ANI_C_xx, 3,11,11,L0|L1},
- {ANI_D_xx, 3,11,11,L0|L1}, {ANI_E_xx, 3,11,11,L0|L1},
- {ANI_H_xx, 3,11,11,L0|L1}, {ANI_L_xx, 3,11,11,L0|L1},
-
- {XRI_V_xx, 3,11,11,L0|L1}, {XRI_A_xx, 3,11,11,L0|L1},
- {XRI_B_xx, 3,11,11,L0|L1}, {XRI_C_xx, 3,11,11,L0|L1},
- {XRI_D_xx, 3,11,11,L0|L1}, {XRI_E_xx, 3,11,11,L0|L1},
- {XRI_H_xx, 3,11,11,L0|L1}, {XRI_L_xx, 3,11,11,L0|L1},
- {ORI_V_xx, 3,11,11,L0|L1}, {ORI_A_xx, 3,11,11,L0|L1},
- {ORI_B_xx, 3,11,11,L0|L1}, {ORI_C_xx, 3,11,11,L0|L1},
- {ORI_D_xx, 3,11,11,L0|L1}, {ORI_E_xx, 3,11,11,L0|L1},
- {ORI_H_xx, 3,11,11,L0|L1}, {ORI_L_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ANI_V_xx, 3,11,11,L0|L1}, {ANI_A_xx, 3,11,11,L0|L1},
+ {ANI_B_xx, 3,11,11,L0|L1}, {ANI_C_xx, 3,11,11,L0|L1},
+ {ANI_D_xx, 3,11,11,L0|L1}, {ANI_E_xx, 3,11,11,L0|L1},
+ {ANI_H_xx, 3,11,11,L0|L1}, {ANI_L_xx, 3,11,11,L0|L1},
+
+ {XRI_V_xx, 3,11,11,L0|L1}, {XRI_A_xx, 3,11,11,L0|L1},
+ {XRI_B_xx, 3,11,11,L0|L1}, {XRI_C_xx, 3,11,11,L0|L1},
+ {XRI_D_xx, 3,11,11,L0|L1}, {XRI_E_xx, 3,11,11,L0|L1},
+ {XRI_H_xx, 3,11,11,L0|L1}, {XRI_L_xx, 3,11,11,L0|L1},
+ {ORI_V_xx, 3,11,11,L0|L1}, {ORI_A_xx, 3,11,11,L0|L1},
+ {ORI_B_xx, 3,11,11,L0|L1}, {ORI_C_xx, 3,11,11,L0|L1},
+ {ORI_D_xx, 3,11,11,L0|L1}, {ORI_E_xx, 3,11,11,L0|L1},
+ {ORI_H_xx, 3,11,11,L0|L1}, {ORI_L_xx, 3,11,11,L0|L1},
/* 0x20 - 0x3F */
- {ADINC_V_xx, 3,11,11,L0|L1}, {ADINC_A_xx, 3,11,11,L0|L1},
- {ADINC_B_xx, 3,11,11,L0|L1}, {ADINC_C_xx, 3,11,11,L0|L1},
- {ADINC_D_xx, 3,11,11,L0|L1}, {ADINC_E_xx, 3,11,11,L0|L1},
- {ADINC_H_xx, 3,11,11,L0|L1}, {ADINC_L_xx, 3,11,11,L0|L1},
- {GTI_V_xx, 3,11,11,L0|L1}, {GTI_A_xx, 3,11,11,L0|L1},
- {GTI_B_xx, 3,11,11,L0|L1}, {GTI_C_xx, 3,11,11,L0|L1},
- {GTI_D_xx, 3,11,11,L0|L1}, {GTI_E_xx, 3,11,11,L0|L1},
- {GTI_H_xx, 3,11,11,L0|L1}, {GTI_L_xx, 3,11,11,L0|L1},
-
- {SUINB_V_xx, 3,11,11,L0|L1}, {SUINB_A_xx, 3,11,11,L0|L1},
- {SUINB_B_xx, 3,11,11,L0|L1}, {SUINB_C_xx, 3,11,11,L0|L1},
- {SUINB_D_xx, 3,11,11,L0|L1}, {SUINB_E_xx, 3,11,11,L0|L1},
- {SUINB_H_xx, 3,11,11,L0|L1}, {SUINB_L_xx, 3,11,11,L0|L1},
- {LTI_V_xx, 3,11,11,L0|L1}, {LTI_A_xx, 3,11,11,L0|L1},
- {LTI_B_xx, 3,11,11,L0|L1}, {LTI_C_xx, 3,11,11,L0|L1},
- {LTI_D_xx, 3,11,11,L0|L1}, {LTI_E_xx, 3,11,11,L0|L1},
- {LTI_H_xx, 3,11,11,L0|L1}, {LTI_L_xx, 3,11,11,L0|L1},
+ {ADINC_V_xx, 3,11,11,L0|L1}, {ADINC_A_xx, 3,11,11,L0|L1},
+ {ADINC_B_xx, 3,11,11,L0|L1}, {ADINC_C_xx, 3,11,11,L0|L1},
+ {ADINC_D_xx, 3,11,11,L0|L1}, {ADINC_E_xx, 3,11,11,L0|L1},
+ {ADINC_H_xx, 3,11,11,L0|L1}, {ADINC_L_xx, 3,11,11,L0|L1},
+ {GTI_V_xx, 3,11,11,L0|L1}, {GTI_A_xx, 3,11,11,L0|L1},
+ {GTI_B_xx, 3,11,11,L0|L1}, {GTI_C_xx, 3,11,11,L0|L1},
+ {GTI_D_xx, 3,11,11,L0|L1}, {GTI_E_xx, 3,11,11,L0|L1},
+ {GTI_H_xx, 3,11,11,L0|L1}, {GTI_L_xx, 3,11,11,L0|L1},
+
+ {SUINB_V_xx, 3,11,11,L0|L1}, {SUINB_A_xx, 3,11,11,L0|L1},
+ {SUINB_B_xx, 3,11,11,L0|L1}, {SUINB_C_xx, 3,11,11,L0|L1},
+ {SUINB_D_xx, 3,11,11,L0|L1}, {SUINB_E_xx, 3,11,11,L0|L1},
+ {SUINB_H_xx, 3,11,11,L0|L1}, {SUINB_L_xx, 3,11,11,L0|L1},
+ {LTI_V_xx, 3,11,11,L0|L1}, {LTI_A_xx, 3,11,11,L0|L1},
+ {LTI_B_xx, 3,11,11,L0|L1}, {LTI_C_xx, 3,11,11,L0|L1},
+ {LTI_D_xx, 3,11,11,L0|L1}, {LTI_E_xx, 3,11,11,L0|L1},
+ {LTI_H_xx, 3,11,11,L0|L1}, {LTI_L_xx, 3,11,11,L0|L1},
/* 0x40 - 0x5F */
- {ADI_V_xx, 3,11,11,L0|L1}, {ADI_A_xx, 3,11,11,L0|L1},
- {ADI_B_xx, 3,11,11,L0|L1}, {ADI_C_xx, 3,11,11,L0|L1},
- {ADI_D_xx, 3,11,11,L0|L1}, {ADI_E_xx, 3,11,11,L0|L1},
- {ADI_H_xx, 3,11,11,L0|L1}, {ADI_L_xx, 3,11,11,L0|L1},
- {ONI_V_xx, 3,11,11,L0|L1}, {ONI_A_xx, 3,11,11,L0|L1},
- {ONI_B_xx, 3,11,11,L0|L1}, {ONI_C_xx, 3,11,11,L0|L1},
- {ONI_D_xx, 3,11,11,L0|L1}, {ONI_E_xx, 3,11,11,L0|L1},
- {ONI_H_xx, 3,11,11,L0|L1}, {ONI_L_xx, 3,11,11,L0|L1},
-
- {ACI_V_xx, 3,11,11,L0|L1}, {ACI_A_xx, 3,11,11,L0|L1},
- {ACI_B_xx, 3,11,11,L0|L1}, {ACI_C_xx, 3,11,11,L0|L1},
- {ACI_D_xx, 3,11,11,L0|L1}, {ACI_E_xx, 3,11,11,L0|L1},
- {ACI_H_xx, 3,11,11,L0|L1}, {ACI_L_xx, 3,11,11,L0|L1},
- {OFFI_V_xx, 3,11,11,L0|L1}, {OFFI_A_xx, 3,11,11,L0|L1},
- {OFFI_B_xx, 3,11,11,L0|L1}, {OFFI_C_xx, 3,11,11,L0|L1},
- {OFFI_D_xx, 3,11,11,L0|L1}, {OFFI_E_xx, 3,11,11,L0|L1},
- {OFFI_H_xx, 3,11,11,L0|L1}, {OFFI_L_xx, 3,11,11,L0|L1},
+ {ADI_V_xx, 3,11,11,L0|L1}, {ADI_A_xx, 3,11,11,L0|L1},
+ {ADI_B_xx, 3,11,11,L0|L1}, {ADI_C_xx, 3,11,11,L0|L1},
+ {ADI_D_xx, 3,11,11,L0|L1}, {ADI_E_xx, 3,11,11,L0|L1},
+ {ADI_H_xx, 3,11,11,L0|L1}, {ADI_L_xx, 3,11,11,L0|L1},
+ {ONI_V_xx, 3,11,11,L0|L1}, {ONI_A_xx, 3,11,11,L0|L1},
+ {ONI_B_xx, 3,11,11,L0|L1}, {ONI_C_xx, 3,11,11,L0|L1},
+ {ONI_D_xx, 3,11,11,L0|L1}, {ONI_E_xx, 3,11,11,L0|L1},
+ {ONI_H_xx, 3,11,11,L0|L1}, {ONI_L_xx, 3,11,11,L0|L1},
+
+ {ACI_V_xx, 3,11,11,L0|L1}, {ACI_A_xx, 3,11,11,L0|L1},
+ {ACI_B_xx, 3,11,11,L0|L1}, {ACI_C_xx, 3,11,11,L0|L1},
+ {ACI_D_xx, 3,11,11,L0|L1}, {ACI_E_xx, 3,11,11,L0|L1},
+ {ACI_H_xx, 3,11,11,L0|L1}, {ACI_L_xx, 3,11,11,L0|L1},
+ {OFFI_V_xx, 3,11,11,L0|L1}, {OFFI_A_xx, 3,11,11,L0|L1},
+ {OFFI_B_xx, 3,11,11,L0|L1}, {OFFI_C_xx, 3,11,11,L0|L1},
+ {OFFI_D_xx, 3,11,11,L0|L1}, {OFFI_E_xx, 3,11,11,L0|L1},
+ {OFFI_H_xx, 3,11,11,L0|L1}, {OFFI_L_xx, 3,11,11,L0|L1},
/* 0x60 - 0x7F */
- {SUI_V_xx, 3,11,11,L0|L1}, {SUI_A_xx, 3,11,11,L0|L1},
- {SUI_B_xx, 3,11,11,L0|L1}, {SUI_C_xx, 3,11,11,L0|L1},
- {SUI_D_xx, 3,11,11,L0|L1}, {SUI_E_xx, 3,11,11,L0|L1},
- {SUI_H_xx, 3,11,11,L0|L1}, {SUI_L_xx, 3,11,11,L0|L1},
- {NEI_V_xx, 3,11,11,L0|L1}, {NEI_A_xx, 3,11,11,L0|L1},
- {NEI_B_xx, 3,11,11,L0|L1}, {NEI_C_xx, 3,11,11,L0|L1},
- {NEI_D_xx, 3,11,11,L0|L1}, {NEI_E_xx, 3,11,11,L0|L1},
- {NEI_H_xx, 3,11,11,L0|L1}, {NEI_L_xx, 3,11,11,L0|L1},
-
- {SBI_V_xx, 3,11,11,L0|L1}, {SBI_A_xx, 3,11,11,L0|L1},
- {SBI_B_xx, 3,11,11,L0|L1}, {SBI_C_xx, 3,11,11,L0|L1},
- {SBI_D_xx, 3,11,11,L0|L1}, {SBI_E_xx, 3,11,11,L0|L1},
- {SBI_H_xx, 3,11,11,L0|L1}, {SBI_L_xx, 3,11,11,L0|L1},
- {EQI_V_xx, 3,11,11,L0|L1}, {EQI_A_xx, 3,11,11,L0|L1},
- {EQI_B_xx, 3,11,11,L0|L1}, {EQI_C_xx, 3,11,11,L0|L1},
- {EQI_D_xx, 3,11,11,L0|L1}, {EQI_E_xx, 3,11,11,L0|L1},
- {EQI_H_xx, 3,11,11,L0|L1}, {EQI_L_xx, 3,11,11,L0|L1},
+ {SUI_V_xx, 3,11,11,L0|L1}, {SUI_A_xx, 3,11,11,L0|L1},
+ {SUI_B_xx, 3,11,11,L0|L1}, {SUI_C_xx, 3,11,11,L0|L1},
+ {SUI_D_xx, 3,11,11,L0|L1}, {SUI_E_xx, 3,11,11,L0|L1},
+ {SUI_H_xx, 3,11,11,L0|L1}, {SUI_L_xx, 3,11,11,L0|L1},
+ {NEI_V_xx, 3,11,11,L0|L1}, {NEI_A_xx, 3,11,11,L0|L1},
+ {NEI_B_xx, 3,11,11,L0|L1}, {NEI_C_xx, 3,11,11,L0|L1},
+ {NEI_D_xx, 3,11,11,L0|L1}, {NEI_E_xx, 3,11,11,L0|L1},
+ {NEI_H_xx, 3,11,11,L0|L1}, {NEI_L_xx, 3,11,11,L0|L1},
+
+ {SBI_V_xx, 3,11,11,L0|L1}, {SBI_A_xx, 3,11,11,L0|L1},
+ {SBI_B_xx, 3,11,11,L0|L1}, {SBI_C_xx, 3,11,11,L0|L1},
+ {SBI_D_xx, 3,11,11,L0|L1}, {SBI_E_xx, 3,11,11,L0|L1},
+ {SBI_H_xx, 3,11,11,L0|L1}, {SBI_L_xx, 3,11,11,L0|L1},
+ {EQI_V_xx, 3,11,11,L0|L1}, {EQI_A_xx, 3,11,11,L0|L1},
+ {EQI_B_xx, 3,11,11,L0|L1}, {EQI_C_xx, 3,11,11,L0|L1},
+ {EQI_D_xx, 3,11,11,L0|L1}, {EQI_E_xx, 3,11,11,L0|L1},
+ {EQI_H_xx, 3,11,11,L0|L1}, {EQI_L_xx, 3,11,11,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ANI_PA_xx, 3,17,17,L0|L1}, {ANI_PB_xx, 3,17,17,L0|L1},
- {ANI_PC_xx, 3,17,17,L0|L1}, {ANI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {XRI_PA_xx, 3,17,17,L0|L1}, {XRI_PB_xx, 3,17,17,L0|L1},
- {XRI_PC_xx, 3,17,17,L0|L1}, {XRI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ORI_PA_xx, 3,17,17,L0|L1}, {ORI_PB_xx, 3,17,17,L0|L1},
- {ORI_PC_xx, 3,17,17,L0|L1}, {ORI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ANI_PA_xx, 3,17,17,L0|L1}, {ANI_PB_xx, 3,17,17,L0|L1},
+ {ANI_PC_xx, 3,17,17,L0|L1}, {ANI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {XRI_PA_xx, 3,17,17,L0|L1}, {XRI_PB_xx, 3,17,17,L0|L1},
+ {XRI_PC_xx, 3,17,17,L0|L1}, {XRI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ORI_PA_xx, 3,17,17,L0|L1}, {ORI_PB_xx, 3,17,17,L0|L1},
+ {ORI_PC_xx, 3,17,17,L0|L1}, {ORI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {ADINC_PA_xx, 3,17,17,L0|L1}, {ADINC_PB_xx, 3,17,17,L0|L1},
- {ADINC_PC_xx, 3,17,17,L0|L1}, {ADINC_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {GTI_PA_xx, 3,14,14,L0|L1}, {GTI_PB_xx, 3,14,14,L0|L1},
- {GTI_PC_xx, 3,14,14,L0|L1}, {GTI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SUINB_PA_xx, 3,17,17,L0|L1}, {SUINB_PB_xx, 3,17,17,L0|L1},
- {SUINB_PC_xx, 3,17,17,L0|L1}, {SUINB_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {LTI_PA_xx, 3,14,14,L0|L1}, {LTI_PB_xx, 3,14,14,L0|L1},
- {LTI_PC_xx, 3,14,14,L0|L1}, {LTI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADINC_PA_xx, 3,17,17,L0|L1}, {ADINC_PB_xx, 3,17,17,L0|L1},
+ {ADINC_PC_xx, 3,17,17,L0|L1}, {ADINC_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {GTI_PA_xx, 3,14,14,L0|L1}, {GTI_PB_xx, 3,14,14,L0|L1},
+ {GTI_PC_xx, 3,14,14,L0|L1}, {GTI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SUINB_PA_xx, 3,17,17,L0|L1}, {SUINB_PB_xx, 3,17,17,L0|L1},
+ {SUINB_PC_xx, 3,17,17,L0|L1}, {SUINB_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {LTI_PA_xx, 3,14,14,L0|L1}, {LTI_PB_xx, 3,14,14,L0|L1},
+ {LTI_PC_xx, 3,14,14,L0|L1}, {LTI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {ADI_PA_xx, 3,17,17,L0|L1}, {ADI_PB_xx, 3,17,17,L0|L1},
- {ADI_PC_xx, 3,17,17,L0|L1}, {ADI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ONI_PA_xx, 3,14,14,L0|L1}, {ONI_PB_xx, 3,14,14,L0|L1},
- {ONI_PC_xx, 3,14,14,L0|L1}, {ONI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {ACI_PA_xx, 3,17,17,L0|L1}, {ACI_PB_xx, 3,17,17,L0|L1},
- {ACI_PC_xx, 3,17,17,L0|L1}, {ACI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {OFFI_PA_xx, 3,14,14,L0|L1}, {OFFI_PB_xx, 3,14,14,L0|L1},
- {OFFI_PC_xx, 3,14,14,L0|L1}, {OFFI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADI_PA_xx, 3,17,17,L0|L1}, {ADI_PB_xx, 3,17,17,L0|L1},
+ {ADI_PC_xx, 3,17,17,L0|L1}, {ADI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ONI_PA_xx, 3,14,14,L0|L1}, {ONI_PB_xx, 3,14,14,L0|L1},
+ {ONI_PC_xx, 3,14,14,L0|L1}, {ONI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {ACI_PA_xx, 3,17,17,L0|L1}, {ACI_PB_xx, 3,17,17,L0|L1},
+ {ACI_PC_xx, 3,17,17,L0|L1}, {ACI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {OFFI_PA_xx, 3,14,14,L0|L1}, {OFFI_PB_xx, 3,14,14,L0|L1},
+ {OFFI_PC_xx, 3,14,14,L0|L1}, {OFFI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {SUI_PA_xx, 3,17,17,L0|L1}, {SUI_PB_xx, 3,17,17,L0|L1},
- {SUI_PC_xx, 3,17,17,L0|L1}, {SUI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {NEI_PA_xx, 3,14,14,L0|L1}, {NEI_PB_xx, 3,14,14,L0|L1},
- {NEI_PC_xx, 3,14,14,L0|L1}, {NEI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SBI_PA_xx, 3,17,17,L0|L1}, {SBI_PB_xx, 3,17,17,L0|L1},
- {SBI_PC_xx, 3,17,17,L0|L1}, {SBI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {EQI_PA_xx, 3,14,14,L0|L1}, {EQI_PB_xx, 3,14,14,L0|L1},
- {EQI_PC_xx, 3,14,14,L0|L1}, {EQI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {SUI_PA_xx, 3,17,17,L0|L1}, {SUI_PB_xx, 3,17,17,L0|L1},
+ {SUI_PC_xx, 3,17,17,L0|L1}, {SUI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {NEI_PA_xx, 3,14,14,L0|L1}, {NEI_PB_xx, 3,14,14,L0|L1},
+ {NEI_PC_xx, 3,14,14,L0|L1}, {NEI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SBI_PA_xx, 3,17,17,L0|L1}, {SBI_PB_xx, 3,17,17,L0|L1},
+ {SBI_PC_xx, 3,17,17,L0|L1}, {SBI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {EQI_PA_xx, 3,14,14,L0|L1}, {EQI_PB_xx, 3,14,14,L0|L1},
+ {EQI_PC_xx, 3,14,14,L0|L1}, {EQI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
/* prefix 70 */
static const struct opcode_s op70_7801[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SSPD_w, 4,20,20,L0|L1}, {LSPD_w, 4,20,20,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SBCD_w, 4,20,20,L0|L1}, {LBCD_w, 4,20,20,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SSPD_w, 4,20,20,L0|L1}, {LSPD_w, 4,20,20,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SBCD_w, 4,20,20,L0|L1}, {LBCD_w, 4,20,20,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SDED_w, 4,20,20,L0|L1}, {LDED_w, 4,20,20,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SHLD_w, 4,20,20,L0|L1}, {LHLD_w, 4,20,20,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SDED_w, 4,20,20,L0|L1}, {LDED_w, 4,20,20,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SHLD_w, 4,20,20,L0|L1}, {LHLD_w, 4,20,20,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {MOV_V_w, 4,17,17,L0|L1}, {MOV_A_w, 4,17,17,L0|L1},
- {MOV_B_w, 4,17,17,L0|L1}, {MOV_C_w, 4,17,17,L0|L1},
- {MOV_D_w, 4,17,17,L0|L1}, {MOV_E_w, 4,17,17,L0|L1},
- {MOV_H_w, 4,17,17,L0|L1}, {MOV_L_w, 4,17,17,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {MOV_w_V, 4,17,17,L0|L1}, {MOV_w_A, 4,17,17,L0|L1},
- {MOV_w_B, 4,17,17,L0|L1}, {MOV_w_C, 4,17,17,L0|L1},
- {MOV_w_D, 4,17,17,L0|L1}, {MOV_w_E, 4,17,17,L0|L1},
- {MOV_w_H, 4,17,17,L0|L1}, {MOV_w_L, 4,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_V_w, 4,17,17,L0|L1}, {MOV_A_w, 4,17,17,L0|L1},
+ {MOV_B_w, 4,17,17,L0|L1}, {MOV_C_w, 4,17,17,L0|L1},
+ {MOV_D_w, 4,17,17,L0|L1}, {MOV_E_w, 4,17,17,L0|L1},
+ {MOV_H_w, 4,17,17,L0|L1}, {MOV_L_w, 4,17,17,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_w_V, 4,17,17,L0|L1}, {MOV_w_A, 4,17,17,L0|L1},
+ {MOV_w_B, 4,17,17,L0|L1}, {MOV_w_C, 4,17,17,L0|L1},
+ {MOV_w_D, 4,17,17,L0|L1}, {MOV_w_E, 4,17,17,L0|L1},
+ {MOV_w_H, 4,17,17,L0|L1}, {MOV_w_L, 4,17,17,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ANAX_B, 2,11,11,L0|L1},
- {ANAX_D, 2,11,11,L0|L1}, {ANAX_H, 2,11,11,L0|L1},
- {ANAX_Dp, 2,11,11,L0|L1}, {ANAX_Hp, 2,11,11,L0|L1},
- {ANAX_Dm, 2,11,11,L0|L1}, {ANAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {XRAX_B, 2,11,11,L0|L1},
- {XRAX_D, 2,11,11,L0|L1}, {XRAX_H, 2,11,11,L0|L1},
- {XRAX_Dp, 2,11,11,L0|L1}, {XRAX_Hp, 2,11,11,L0|L1},
- {XRAX_Dm, 2,11,11,L0|L1}, {XRAX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ORAX_B, 2,11,11,L0|L1},
- {ORAX_D, 2,11,11,L0|L1}, {ORAX_H, 2,11,11,L0|L1},
- {ORAX_Dp, 2,11,11,L0|L1}, {ORAX_Hp, 2,11,11,L0|L1},
- {ORAX_Dm, 2,11,11,L0|L1}, {ORAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ANAX_B, 2,11,11,L0|L1},
+ {ANAX_D, 2,11,11,L0|L1}, {ANAX_H, 2,11,11,L0|L1},
+ {ANAX_Dp, 2,11,11,L0|L1}, {ANAX_Hp, 2,11,11,L0|L1},
+ {ANAX_Dm, 2,11,11,L0|L1}, {ANAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {XRAX_B, 2,11,11,L0|L1},
+ {XRAX_D, 2,11,11,L0|L1}, {XRAX_H, 2,11,11,L0|L1},
+ {XRAX_Dp, 2,11,11,L0|L1}, {XRAX_Hp, 2,11,11,L0|L1},
+ {XRAX_Dm, 2,11,11,L0|L1}, {XRAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ORAX_B, 2,11,11,L0|L1},
+ {ORAX_D, 2,11,11,L0|L1}, {ORAX_H, 2,11,11,L0|L1},
+ {ORAX_Dp, 2,11,11,L0|L1}, {ORAX_Hp, 2,11,11,L0|L1},
+ {ORAX_Dm, 2,11,11,L0|L1}, {ORAX_Hm, 2,11,11,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2, 8, 8,L0|L1}, {ADDNCX_B, 2,11,11,L0|L1},
- {ADDNCX_D, 2,11,11,L0|L1}, {ADDNCX_H, 2,11,11,L0|L1},
- {ADDNCX_Dp, 2,11,11,L0|L1}, {ADDNCX_Hp, 2,11,11,L0|L1},
- {ADDNCX_Dm, 2,11,11,L0|L1}, {ADDNCX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {GTAX_B, 2,11,11,L0|L1},
- {GTAX_D, 2,11,11,L0|L1}, {GTAX_H, 2,11,11,L0|L1},
- {GTAX_Dp, 2,11,11,L0|L1}, {GTAX_Hp, 2,11,11,L0|L1},
- {GTAX_Dm, 2,11,11,L0|L1}, {GTAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SUBNBX_B, 2,11,11,L0|L1},
- {SUBNBX_D, 2,11,11,L0|L1}, {SUBNBX_H, 2,11,11,L0|L1},
- {SUBNBX_Dp, 2,11,11,L0|L1}, {SUBNBX_Hp, 2,11,11,L0|L1},
- {SUBNBX_Dm, 2,11,11,L0|L1}, {SUBNBX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {LTAX_B, 2,11,11,L0|L1},
- {LTAX_D, 2,11,11,L0|L1}, {LTAX_H, 2,11,11,L0|L1},
- {LTAX_Dp, 2,11,11,L0|L1}, {LTAX_Hp, 2,11,11,L0|L1},
- {LTAX_Dm, 2,11,11,L0|L1}, {LTAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADDNCX_B, 2,11,11,L0|L1},
+ {ADDNCX_D, 2,11,11,L0|L1}, {ADDNCX_H, 2,11,11,L0|L1},
+ {ADDNCX_Dp, 2,11,11,L0|L1}, {ADDNCX_Hp, 2,11,11,L0|L1},
+ {ADDNCX_Dm, 2,11,11,L0|L1}, {ADDNCX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {GTAX_B, 2,11,11,L0|L1},
+ {GTAX_D, 2,11,11,L0|L1}, {GTAX_H, 2,11,11,L0|L1},
+ {GTAX_Dp, 2,11,11,L0|L1}, {GTAX_Hp, 2,11,11,L0|L1},
+ {GTAX_Dm, 2,11,11,L0|L1}, {GTAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SUBNBX_B, 2,11,11,L0|L1},
+ {SUBNBX_D, 2,11,11,L0|L1}, {SUBNBX_H, 2,11,11,L0|L1},
+ {SUBNBX_Dp, 2,11,11,L0|L1}, {SUBNBX_Hp, 2,11,11,L0|L1},
+ {SUBNBX_Dm, 2,11,11,L0|L1}, {SUBNBX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {LTAX_B, 2,11,11,L0|L1},
+ {LTAX_D, 2,11,11,L0|L1}, {LTAX_H, 2,11,11,L0|L1},
+ {LTAX_Dp, 2,11,11,L0|L1}, {LTAX_Hp, 2,11,11,L0|L1},
+ {LTAX_Dm, 2,11,11,L0|L1}, {LTAX_Hm, 2,11,11,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2, 8, 8,L0|L1}, {ADDX_B, 2,11,11,L0|L1},
- {ADDX_D, 2,11,11,L0|L1}, {ADDX_H, 2,11,11,L0|L1},
- {ADDX_Dp, 2,11,11,L0|L1}, {ADDX_Hp, 2,11,11,L0|L1},
- {ADDX_Dm, 2,11,11,L0|L1}, {ADDX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ONAX_B, 2,11,11,L0|L1},
- {ONAX_D, 2,11,11,L0|L1}, {ONAX_H, 2,11,11,L0|L1},
- {ONAX_Dp, 2,11,11,L0|L1}, {ONAX_Hp, 2,11,11,L0|L1},
- {ONAX_Dm, 2,11,11,L0|L1}, {ONAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {ADCX_B, 2,11,11,L0|L1},
- {ADCX_D, 2,11,11,L0|L1}, {ADCX_H, 2,11,11,L0|L1},
- {ADCX_Dp, 2,11,11,L0|L1}, {ADCX_Hp, 2,11,11,L0|L1},
- {ADCX_Dm, 2,11,11,L0|L1}, {ADCX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {OFFAX_B, 2,11,11,L0|L1},
- {OFFAX_D, 2,11,11,L0|L1}, {OFFAX_H, 2,11,11,L0|L1},
- {OFFAX_Dp, 2,11,11,L0|L1}, {OFFAX_Hp, 2,11,11,L0|L1},
- {OFFAX_Dm, 2,11,11,L0|L1}, {OFFAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADDX_B, 2,11,11,L0|L1},
+ {ADDX_D, 2,11,11,L0|L1}, {ADDX_H, 2,11,11,L0|L1},
+ {ADDX_Dp, 2,11,11,L0|L1}, {ADDX_Hp, 2,11,11,L0|L1},
+ {ADDX_Dm, 2,11,11,L0|L1}, {ADDX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ONAX_B, 2,11,11,L0|L1},
+ {ONAX_D, 2,11,11,L0|L1}, {ONAX_H, 2,11,11,L0|L1},
+ {ONAX_Dp, 2,11,11,L0|L1}, {ONAX_Hp, 2,11,11,L0|L1},
+ {ONAX_Dm, 2,11,11,L0|L1}, {ONAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {ADCX_B, 2,11,11,L0|L1},
+ {ADCX_D, 2,11,11,L0|L1}, {ADCX_H, 2,11,11,L0|L1},
+ {ADCX_Dp, 2,11,11,L0|L1}, {ADCX_Hp, 2,11,11,L0|L1},
+ {ADCX_Dm, 2,11,11,L0|L1}, {ADCX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {OFFAX_B, 2,11,11,L0|L1},
+ {OFFAX_D, 2,11,11,L0|L1}, {OFFAX_H, 2,11,11,L0|L1},
+ {OFFAX_Dp, 2,11,11,L0|L1}, {OFFAX_Hp, 2,11,11,L0|L1},
+ {OFFAX_Dm, 2,11,11,L0|L1}, {OFFAX_Hm, 2,11,11,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {SUBX_B, 2,11,11,L0|L1},
- {SUBX_D, 2,11,11,L0|L1}, {SUBX_H, 2,11,11,L0|L1},
- {SUBX_Dp, 2,11,11,L0|L1}, {SUBX_Hp, 2,11,11,L0|L1},
- {SUBX_Dm, 2,11,11,L0|L1}, {SUBX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {NEAX_B, 2,11,11,L0|L1},
- {NEAX_D, 2,11,11,L0|L1}, {NEAX_H, 2,11,11,L0|L1},
- {NEAX_Dp, 2,11,11,L0|L1}, {NEAX_Hp, 2,11,11,L0|L1},
- {NEAX_Dm, 2,11,11,L0|L1}, {NEAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SBBX_B, 2,11,11,L0|L1},
- {SBBX_D, 2,11,11,L0|L1}, {SBBX_H, 2,11,11,L0|L1},
- {SBBX_Dp, 2,11,11,L0|L1}, {SBBX_Hp, 2,11,11,L0|L1},
- {SBBX_Dm, 2,11,11,L0|L1}, {SBBX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {EQAX_B, 2,11,11,L0|L1},
- {EQAX_D, 2,11,11,L0|L1}, {EQAX_H, 2,11,11,L0|L1},
- {EQAX_Dp, 2,11,11,L0|L1}, {EQAX_Hp, 2,11,11,L0|L1},
- {EQAX_Dm, 2,11,11,L0|L1}, {EQAX_Hm, 2,11,11,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {SUBX_B, 2,11,11,L0|L1},
+ {SUBX_D, 2,11,11,L0|L1}, {SUBX_H, 2,11,11,L0|L1},
+ {SUBX_Dp, 2,11,11,L0|L1}, {SUBX_Hp, 2,11,11,L0|L1},
+ {SUBX_Dm, 2,11,11,L0|L1}, {SUBX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {NEAX_B, 2,11,11,L0|L1},
+ {NEAX_D, 2,11,11,L0|L1}, {NEAX_H, 2,11,11,L0|L1},
+ {NEAX_Dp, 2,11,11,L0|L1}, {NEAX_Hp, 2,11,11,L0|L1},
+ {NEAX_Dm, 2,11,11,L0|L1}, {NEAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SBBX_B, 2,11,11,L0|L1},
+ {SBBX_D, 2,11,11,L0|L1}, {SBBX_H, 2,11,11,L0|L1},
+ {SBBX_Dp, 2,11,11,L0|L1}, {SBBX_Hp, 2,11,11,L0|L1},
+ {SBBX_Dm, 2,11,11,L0|L1}, {SBBX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {EQAX_B, 2,11,11,L0|L1},
+ {EQAX_D, 2,11,11,L0|L1}, {EQAX_H, 2,11,11,L0|L1},
+ {EQAX_Dp, 2,11,11,L0|L1}, {EQAX_Hp, 2,11,11,L0|L1},
+ {EQAX_Dm, 2,11,11,L0|L1}, {EQAX_Hm, 2,11,11,L0|L1}
};
/* prefix 74 */
static const struct opcode_s op74_7801[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ANAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {XRAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ORAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ANAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {XRAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ORAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {ADDNCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {GTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SUBNBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {LTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADDNCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {GTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SUBNBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {LTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {ADDW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ONAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {ADCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {OFFAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADDW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ONAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {ADCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {OFFAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {SUBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {NEAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SBBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {EQAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {SUBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {NEAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SBBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {EQAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
static const struct opcode_s opXX_7801[256] =
{
/* 0x00 - 0x1F */
- {NOP, 1, 4, 4,L0|L1}, {HALT, 1, 6, 6,L0|L1},
- {INX_SP, 1, 7, 7,L0|L1}, {DCX_SP, 1, 7, 7,L0|L1},
- {LXI_S_w, 3,10,10,L0|L1}, {ANIW_wa_xx, 3,16,16,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {ANI_A_xx, 2, 7, 7,L0|L1},
- {RET, 1,11,11,L0|L1}, {SIO, 1, 4, 4,L0|L1},
- {MOV_A_B, 1, 4, 4,L0|L1}, {MOV_A_C, 1, 4, 4,L0|L1},
- {MOV_A_D, 1, 4, 4,L0|L1}, {MOV_A_E, 1, 4, 4,L0|L1},
- {MOV_A_H, 1, 4, 4,L0|L1}, {MOV_A_L, 1, 4, 4,L0|L1},
-
- {EXA, 1, 4, 4,L0|L1}, {EXX, 1, 4, 4,L0|L1},
- {INX_BC, 1, 7, 7,L0|L1}, {DCX_BC, 1, 7, 7,L0|L1},
- {LXI_B_w, 3,10,10,L0|L1}, {ORIW_wa_xx, 3,16,16,L0|L1},
- {XRI_A_xx, 2, 7, 7,L0|L1}, {ORI_A_xx, 2, 7, 7,L0|L1},
- {RETS, 1,11,11,L0|L1}, {STM_7801, 1, 4, 4,L0|L1},
- {MOV_B_A, 1, 4, 4,L0|L1}, {MOV_C_A, 1, 4, 4,L0|L1},
- {MOV_D_A, 1, 4, 4,L0|L1}, {MOV_E_A, 1, 4, 4,L0|L1},
- {MOV_H_A, 1, 4, 4,L0|L1}, {MOV_L_A, 1, 4, 4,L0|L1},
+ {NOP, 1, 4, 4,L0|L1}, {HALT, 1, 6, 6,L0|L1},
+ {INX_SP, 1, 7, 7,L0|L1}, {DCX_SP, 1, 7, 7,L0|L1},
+ {LXI_S_w, 3,10,10,L0|L1}, {ANIW_wa_xx, 3,16,16,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {ANI_A_xx, 2, 7, 7,L0|L1},
+ {RET, 1,11,11,L0|L1}, {SIO, 1, 4, 4,L0|L1},
+ {MOV_A_B, 1, 4, 4,L0|L1}, {MOV_A_C, 1, 4, 4,L0|L1},
+ {MOV_A_D, 1, 4, 4,L0|L1}, {MOV_A_E, 1, 4, 4,L0|L1},
+ {MOV_A_H, 1, 4, 4,L0|L1}, {MOV_A_L, 1, 4, 4,L0|L1},
+
+ {EXA, 1, 4, 4,L0|L1}, {EXX, 1, 4, 4,L0|L1},
+ {INX_BC, 1, 7, 7,L0|L1}, {DCX_BC, 1, 7, 7,L0|L1},
+ {LXI_B_w, 3,10,10,L0|L1}, {ORIW_wa_xx, 3,16,16,L0|L1},
+ {XRI_A_xx, 2, 7, 7,L0|L1}, {ORI_A_xx, 2, 7, 7,L0|L1},
+ {RETS, 1,11,11,L0|L1}, {STM_7801, 1, 4, 4,L0|L1},
+ {MOV_B_A, 1, 4, 4,L0|L1}, {MOV_C_A, 1, 4, 4,L0|L1},
+ {MOV_D_A, 1, 4, 4,L0|L1}, {MOV_E_A, 1, 4, 4,L0|L1},
+ {MOV_H_A, 1, 4, 4,L0|L1}, {MOV_L_A, 1, 4, 4,L0|L1},
/* 0x20 - 0x3F */
- {INRW_wa_7801, 2,13,13,L0|L1}, {TABLE, 1,19,19,L0|L1},
- {INX_DE, 1, 7, 7,L0|L1}, {DCX_DE, 1, 7, 7,L0|L1},
- {LXI_D_w, 3,10,10,L0|L1}, {GTIW_wa_xx, 3,13,13,L0|L1},
- {ADINC_A_xx, 2, 7, 7,L0|L1}, {GTI_A_xx, 2, 7, 7,L0|L1},
- {LDAW_wa, 2,10,10,L0|L1}, {LDAX_B, 1, 7, 7,L0|L1},
- {LDAX_D, 1, 7, 7,L0|L1}, {LDAX_H, 1, 7, 7,L0|L1},
- {LDAX_Dp, 1, 7, 7,L0|L1}, {LDAX_Hp, 1, 7, 7,L0|L1},
- {LDAX_Dm, 1, 7, 7,L0|L1}, {LDAX_Hm, 1, 7, 7,L0|L1},
-
- {DCRW_wa_7801, 2,13,13,L0|L1}, {BLOCK, 1,13,13,L0|L1},
- {INX_HL, 1, 7, 7,L0|L1}, {DCX_HL, 1, 7, 7,L0|L1},
- {LXI_H_w, 3,10,10, L1}, {LTIW_wa_xx, 3,13,13,L0|L1},
- {SUINB_A_xx, 2, 7, 7,L0|L1}, {LTI_A_xx, 2, 7, 7,L0|L1},
- {STAW_wa, 2,10,10,L0|L1}, {STAX_B, 1, 7, 7,L0|L1},
- {STAX_D, 1, 7, 7,L0|L1}, {STAX_H, 1, 7, 7,L0|L1},
- {STAX_Dp, 1, 7, 7,L0|L1}, {STAX_Hp, 1, 7, 7,L0|L1},
- {STAX_Dm, 1, 7, 7,L0|L1}, {STAX_Hm, 1, 7, 7,L0|L1},
+ {INRW_wa_7801, 2,13,13,L0|L1}, {TABLE, 1,19,19,L0|L1},
+ {INX_DE, 1, 7, 7,L0|L1}, {DCX_DE, 1, 7, 7,L0|L1},
+ {LXI_D_w, 3,10,10,L0|L1}, {GTIW_wa_xx, 3,13,13,L0|L1},
+ {ADINC_A_xx, 2, 7, 7,L0|L1}, {GTI_A_xx, 2, 7, 7,L0|L1},
+ {LDAW_wa, 2,10,10,L0|L1}, {LDAX_B, 1, 7, 7,L0|L1},
+ {LDAX_D, 1, 7, 7,L0|L1}, {LDAX_H, 1, 7, 7,L0|L1},
+ {LDAX_Dp, 1, 7, 7,L0|L1}, {LDAX_Hp, 1, 7, 7,L0|L1},
+ {LDAX_Dm, 1, 7, 7,L0|L1}, {LDAX_Hm, 1, 7, 7,L0|L1},
+
+ {DCRW_wa_7801, 2,13,13,L0|L1}, {BLOCK, 1,13,13,L0|L1},
+ {INX_HL, 1, 7, 7,L0|L1}, {DCX_HL, 1, 7, 7,L0|L1},
+ {LXI_H_w, 3,10,10, L1}, {LTIW_wa_xx, 3,13,13,L0|L1},
+ {SUINB_A_xx, 2, 7, 7,L0|L1}, {LTI_A_xx, 2, 7, 7,L0|L1},
+ {STAW_wa, 2,10,10,L0|L1}, {STAX_B, 1, 7, 7,L0|L1},
+ {STAX_D, 1, 7, 7,L0|L1}, {STAX_H, 1, 7, 7,L0|L1},
+ {STAX_Dp, 1, 7, 7,L0|L1}, {STAX_Hp, 1, 7, 7,L0|L1},
+ {STAX_Dm, 1, 7, 7,L0|L1}, {STAX_Hm, 1, 7, 7,L0|L1},
/* 0x40 - 0x5F */
- {illegal, 1, 4, 4,L0|L1}, {INR_A_7801, 1, 4, 4,L0|L1},
- {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1},
- {CALL_w, 3,16,16,L0|L1}, {ONIW_wa_xx, 3,13,13,L0|L1},
- {ADI_A_xx, 2, 7, 7,L0|L1}, {ONI_A_xx, 2, 7, 7,L0|L1},
- {PRE_48, 1, 0, 0,L0|L1}, {MVIX_BC_xx, 2,10,10,L0|L1},
- {MVIX_DE_xx, 2,10,10,L0|L1}, {MVIX_HL_xx, 2,10,10,L0|L1},
- {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1},
- {JRE, 2,17,17,L0|L1}, {JRE, 2,17,17,L0|L1},
-
- {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1},
- {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1},
- {JMP_w, 3,10,10,L0|L1}, {OFFIW_wa_xx, 3,13,13,L0|L1},
- {ACI_A_xx, 2, 7, 7,L0|L1}, {OFFI_A_xx, 2, 7, 7,L0|L1},
- {BIT_0_wa, 2,10,10,L0|L1}, {BIT_1_wa, 2,10,10,L0|L1},
- {BIT_2_wa, 2,10,10,L0|L1}, {BIT_3_wa, 2,10,10,L0|L1},
- {BIT_4_wa, 2,10,10,L0|L1}, {BIT_5_wa, 2,10,10,L0|L1},
- {BIT_6_wa, 2,10,10,L0|L1}, {BIT_7_wa, 2,10,10,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {INR_A_7801, 1, 4, 4,L0|L1},
+ {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1},
+ {CALL_w, 3,16,16,L0|L1}, {ONIW_wa_xx, 3,13,13,L0|L1},
+ {ADI_A_xx, 2, 7, 7,L0|L1}, {ONI_A_xx, 2, 7, 7,L0|L1},
+ {PRE_48, 1, 0, 0,L0|L1}, {MVIX_BC_xx, 2,10,10,L0|L1},
+ {MVIX_DE_xx, 2,10,10,L0|L1}, {MVIX_HL_xx, 2,10,10,L0|L1},
+ {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1},
+ {JRE, 2,17,17,L0|L1}, {JRE, 2,17,17,L0|L1},
+
+ {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1},
+ {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1},
+ {JMP_w, 3,10,10,L0|L1}, {OFFIW_wa_xx, 3,13,13,L0|L1},
+ {ACI_A_xx, 2, 7, 7,L0|L1}, {OFFI_A_xx, 2, 7, 7,L0|L1},
+ {BIT_0_wa, 2,10,10,L0|L1}, {BIT_1_wa, 2,10,10,L0|L1},
+ {BIT_2_wa, 2,10,10,L0|L1}, {BIT_3_wa, 2,10,10,L0|L1},
+ {BIT_4_wa, 2,10,10,L0|L1}, {BIT_5_wa, 2,10,10,L0|L1},
+ {BIT_6_wa, 2,10,10,L0|L1}, {BIT_7_wa, 2,10,10,L0|L1},
/* 0x60 - 0x7F */
- {PRE_60, 1, 0, 0,L0|L1}, {DAA, 1, 4, 4,L0|L1},
- {RETI, 1,15,15,L0|L1}, {CALB, 2,13,13,L0|L1},
- {PRE_64, 1, 0, 0,L0|L1}, {NEIW_wa_xx, 3,13,13,L0|L1},
- {SUI_A_xx, 2, 7, 7,L0|L1}, {NEI_A_xx, 2, 7, 7,L0|L1},
- {MVI_V_xx, 2, 7, 7,L0|L1}, {MVI_A_xx, 2, 7, 7,L0 },
- {MVI_B_xx, 2, 7, 7,L0|L1}, {MVI_C_xx, 2, 7, 7,L0|L1},
- {MVI_D_xx, 2, 7, 7,L0|L1}, {MVI_E_xx, 2, 7, 7,L0|L1},
- {MVI_H_xx, 2, 7, 7,L0|L1}, {MVI_L_xx, 2, 7, 7, L1},
-
- {PRE_70, 1, 0, 0,L0|L1}, {MVIW_wa_xx, 3,13,13,L0|L1},
- {SOFTI, 1,19,19,L0|L1}, {JB, 1, 4, 4,L0|L1},
- {PRE_74, 1, 0, 0,L0|L1}, {EQIW_wa_xx, 3,13,13,L0|L1},
- {SBI_A_xx, 2, 7, 7,L0|L1}, {EQI_A_xx, 2, 7, 7,L0|L1},
- {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
- {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
- {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
- {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
+ {PRE_60, 1, 0, 0,L0|L1}, {DAA, 1, 4, 4,L0|L1},
+ {RETI, 1,15,15,L0|L1}, {CALB, 2,13,13,L0|L1},
+ {PRE_64, 1, 0, 0,L0|L1}, {NEIW_wa_xx, 3,13,13,L0|L1},
+ {SUI_A_xx, 2, 7, 7,L0|L1}, {NEI_A_xx, 2, 7, 7,L0|L1},
+ {MVI_V_xx, 2, 7, 7,L0|L1}, {MVI_A_xx, 2, 7, 7,L0 },
+ {MVI_B_xx, 2, 7, 7,L0|L1}, {MVI_C_xx, 2, 7, 7,L0|L1},
+ {MVI_D_xx, 2, 7, 7,L0|L1}, {MVI_E_xx, 2, 7, 7,L0|L1},
+ {MVI_H_xx, 2, 7, 7,L0|L1}, {MVI_L_xx, 2, 7, 7, L1},
+
+ {PRE_70, 1, 0, 0,L0|L1}, {MVIW_wa_xx, 3,13,13,L0|L1},
+ {SOFTI, 1,19,19,L0|L1}, {JB, 1, 4, 4,L0|L1},
+ {PRE_74, 1, 0, 0,L0|L1}, {EQIW_wa_xx, 3,13,13,L0|L1},
+ {SBI_A_xx, 2, 7, 7,L0|L1}, {EQI_A_xx, 2, 7, 7,L0|L1},
+ {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
+ {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
+ {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
+ {CALF, 2,16,16,L0|L1}, {CALF, 2,16,16,L0|L1},
/* 0x80 - 0x9F */
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
-
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
/* 0xA0 - 0xBF */
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
-
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
/* 0xC0 - 0xDF */
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
-
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
/* 0xE0 - 0xFF */
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
-
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
- {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1}
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1},
+ {JR, 1,13,13,L0|L1}, {JR, 1,13,13,L0|L1}
};
/***********************************************************************
@@ -4795,1245 +4795,1245 @@ static const struct opcode_s opXX_7801[256] =
static const struct opcode_s op48_78c05[256] =
{
/* 0x00 - 0x1F */
- {SKIT_F0, 2, 8, 8,L0|L1}, {SKIT_FT0, 2, 8, 8,L0|L1},
- {SKIT_F1, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SKIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SK_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PUSH_VA, 2,17,17,L0|L1}, {POP_VA, 2,14,14,L0|L1},
-
- {SKNIT_F0, 2, 8, 8,L0|L1}, {SKNIT_FT0, 2, 8, 8,L0|L1},
- {SKNIT_F1, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SKNIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SKN_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SKN_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PUSH_BC, 2,17,17,L0|L1}, {POP_BC, 2,14,14,L0|L1},
+ {SKIT_F0, 2, 8, 8,L0|L1}, {SKIT_FT0, 2, 8, 8,L0|L1},
+ {SKIT_F1, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SKIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SK_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SK_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PUSH_VA, 2,17,17,L0|L1}, {POP_VA, 2,14,14,L0|L1},
+
+ {SKNIT_F0, 2, 8, 8,L0|L1}, {SKNIT_FT0, 2, 8, 8,L0|L1},
+ {SKNIT_F1, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SKNIT_FST, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SKN_CY, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SKN_Z, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PUSH_BC, 2,17,17,L0|L1}, {POP_BC, 2,14,14,L0|L1},
/* 0x20 - 0x3F */
- {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {CLC, 2, 8, 8,L0|L1}, {STC, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {PEX, 2,11,11,L0|L1},
- {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,14,14,L0|L1},
-
- {RLL_A, 2, 8, 8,L0|L1}, {RLR_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {RLD, 2,17,17,L0|L1}, {RRD, 2,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PER, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,14,14,L0|L1},
+ {EI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {DI, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {CLC, 2, 8, 8,L0|L1}, {STC, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {PEX, 2,11,11,L0|L1},
+ {PUSH_DE, 2,17,17,L0|L1}, {POP_DE, 2,14,14,L0|L1},
+
+ {RLL_A, 2, 8, 8,L0|L1}, {RLR_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {RLD, 2,17,17,L0|L1}, {RRD, 2,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PER, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {PUSH_HL, 2,17,17,L0|L1}, {POP_HL, 2,14,14,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
static const struct opcode_s op4C_78c05[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {MOV_A_PA, 2,10,10,L0|L1}, {MOV_A_PB, 2,10,10,L0|L1},
- {MOV_A_PC, 2,10,10,L0|L1}, {MOV_A_MKL, 2,10,10,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {MOV_A_S, 2,10,10,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_A_PA, 2,10,10,L0|L1}, {MOV_A_PB, 2,10,10,L0|L1},
+ {MOV_A_PC, 2,10,10,L0|L1}, {MOV_A_MKL, 2,10,10,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_A_S, 2,10,10,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
/* prefix 4D */
static const struct opcode_s op4D_78c05[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {MOV_PA_A, 2,10,10,L0|L1}, {MOV_PB_A, 2,10,10,L0|L1},
- {MOV_PC_A, 2,10,10,L0|L1}, {MOV_MKL_A, 2,10,10,L0|L1},
- {MOV_MB_A, 2,10,10,L0|L1}, {MOV_MC_A, 2,10,10,L0|L1},
- {MOV_TM0_A, 2,10,10,L0|L1}, {MOV_TM1_A, 2,10,10,L0|L1},
- {MOV_S_A, 2,10,10,L0|L1}, {MOV_TMM_A, 2,10,10,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {MOV_PA_A, 2,10,10,L0|L1}, {MOV_PB_A, 2,10,10,L0|L1},
+ {MOV_PC_A, 2,10,10,L0|L1}, {MOV_MKL_A, 2,10,10,L0|L1},
+ {MOV_MB_A, 2,10,10,L0|L1}, {MOV_MC_A, 2,10,10,L0|L1},
+ {MOV_TM0_A, 2,10,10,L0|L1}, {MOV_TM1_A, 2,10,10,L0|L1},
+ {MOV_S_A, 2,10,10,L0|L1}, {MOV_TMM_A, 2,10,10,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
/* prefix 60 */
static const struct opcode_s op60_78c05[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
- {ANA_A_B, 2, 8, 8,L0|L1}, {ANA_A_C, 2, 8, 8,L0|L1},
- {ANA_A_D, 2, 8, 8,L0|L1}, {ANA_A_E, 2, 8, 8,L0|L1},
- {ANA_A_H, 2, 8, 8,L0|L1}, {ANA_A_L, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
- {XRA_A_B, 2, 8, 8,L0|L1}, {XRA_A_C, 2, 8, 8,L0|L1},
- {XRA_A_D, 2, 8, 8,L0|L1}, {XRA_A_E, 2, 8, 8,L0|L1},
- {XRA_A_H, 2, 8, 8,L0|L1}, {XRA_A_L, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
- {ORA_A_B, 2, 8, 8,L0|L1}, {ORA_A_C, 2, 8, 8,L0|L1},
- {ORA_A_D, 2, 8, 8,L0|L1}, {ORA_A_E, 2, 8, 8,L0|L1},
- {ORA_A_H, 2, 8, 8,L0|L1}, {ORA_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ANA_A_A, 2, 8, 8,L0|L1},
+ {ANA_A_B, 2, 8, 8,L0|L1}, {ANA_A_C, 2, 8, 8,L0|L1},
+ {ANA_A_D, 2, 8, 8,L0|L1}, {ANA_A_E, 2, 8, 8,L0|L1},
+ {ANA_A_H, 2, 8, 8,L0|L1}, {ANA_A_L, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {XRA_A_A, 2, 8, 8,L0|L1},
+ {XRA_A_B, 2, 8, 8,L0|L1}, {XRA_A_C, 2, 8, 8,L0|L1},
+ {XRA_A_D, 2, 8, 8,L0|L1}, {XRA_A_E, 2, 8, 8,L0|L1},
+ {XRA_A_H, 2, 8, 8,L0|L1}, {XRA_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ORA_A_A, 2, 8, 8,L0|L1},
+ {ORA_A_B, 2, 8, 8,L0|L1}, {ORA_A_C, 2, 8, 8,L0|L1},
+ {ORA_A_D, 2, 8, 8,L0|L1}, {ORA_A_E, 2, 8, 8,L0|L1},
+ {ORA_A_H, 2, 8, 8,L0|L1}, {ORA_A_L, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
- {ADDNC_A_B, 2, 8, 8,L0|L1}, {ADDNC_A_C, 2, 8, 8,L0|L1},
- {ADDNC_A_D, 2, 8, 8,L0|L1}, {ADDNC_A_E, 2, 8, 8,L0|L1},
- {ADDNC_A_H, 2, 8, 8,L0|L1}, {ADDNC_A_L, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
- {GTA_A_B, 2, 8, 8,L0|L1}, {GTA_A_C, 2, 8, 8,L0|L1},
- {GTA_A_D, 2, 8, 8,L0|L1}, {GTA_A_E, 2, 8, 8,L0|L1},
- {GTA_A_H, 2, 8, 8,L0|L1}, {GTA_A_L, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
- {SUBNB_A_B, 2, 8, 8,L0|L1}, {SUBNB_A_C, 2, 8, 8,L0|L1},
- {SUBNB_A_D, 2, 8, 8,L0|L1}, {SUBNB_A_E, 2, 8, 8,L0|L1},
- {SUBNB_A_H, 2, 8, 8,L0|L1}, {SUBNB_A_L, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
- {LTA_A_B, 2, 8, 8,L0|L1}, {LTA_A_C, 2, 8, 8,L0|L1},
- {LTA_A_D, 2, 8, 8,L0|L1}, {LTA_A_E, 2, 8, 8,L0|L1},
- {LTA_A_H, 2, 8, 8,L0|L1}, {LTA_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADDNC_A_A, 2, 8, 8,L0|L1},
+ {ADDNC_A_B, 2, 8, 8,L0|L1}, {ADDNC_A_C, 2, 8, 8,L0|L1},
+ {ADDNC_A_D, 2, 8, 8,L0|L1}, {ADDNC_A_E, 2, 8, 8,L0|L1},
+ {ADDNC_A_H, 2, 8, 8,L0|L1}, {ADDNC_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {GTA_A_A, 2, 8, 8,L0|L1},
+ {GTA_A_B, 2, 8, 8,L0|L1}, {GTA_A_C, 2, 8, 8,L0|L1},
+ {GTA_A_D, 2, 8, 8,L0|L1}, {GTA_A_E, 2, 8, 8,L0|L1},
+ {GTA_A_H, 2, 8, 8,L0|L1}, {GTA_A_L, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SUBNB_A_A, 2, 8, 8,L0|L1},
+ {SUBNB_A_B, 2, 8, 8,L0|L1}, {SUBNB_A_C, 2, 8, 8,L0|L1},
+ {SUBNB_A_D, 2, 8, 8,L0|L1}, {SUBNB_A_E, 2, 8, 8,L0|L1},
+ {SUBNB_A_H, 2, 8, 8,L0|L1}, {SUBNB_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {LTA_A_A, 2, 8, 8,L0|L1},
+ {LTA_A_B, 2, 8, 8,L0|L1}, {LTA_A_C, 2, 8, 8,L0|L1},
+ {LTA_A_D, 2, 8, 8,L0|L1}, {LTA_A_E, 2, 8, 8,L0|L1},
+ {LTA_A_H, 2, 8, 8,L0|L1}, {LTA_A_L, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
- {ADD_A_B, 2, 8, 8,L0|L1}, {ADD_A_C, 2, 8, 8,L0|L1},
- {ADD_A_D, 2, 8, 8,L0|L1}, {ADD_A_E, 2, 8, 8,L0|L1},
- {ADD_A_H, 2, 8, 8,L0|L1}, {ADD_A_L, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ONA_A_A, 2, 8, 8,L0|L1},
- {ONA_A_B, 2, 8, 8,L0|L1}, {ONA_A_C, 2, 8, 8,L0|L1},
- {ONA_A_D, 2, 8, 8,L0|L1}, {ONA_A_E, 2, 8, 8,L0|L1},
- {ONA_A_H, 2, 8, 8,L0|L1}, {ONA_A_L, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
- {ADC_A_B, 2, 8, 8,L0|L1}, {ADC_A_C, 2, 8, 8,L0|L1},
- {ADC_A_D, 2, 8, 8,L0|L1}, {ADC_A_E, 2, 8, 8,L0|L1},
- {ADC_A_H, 2, 8, 8,L0|L1}, {ADC_A_L, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {OFFA_A_A, 2, 8, 8,L0|L1},
- {OFFA_A_B, 2, 8, 8,L0|L1}, {OFFA_A_C, 2, 8, 8,L0|L1},
- {OFFA_A_D, 2, 8, 8,L0|L1}, {OFFA_A_E, 2, 8, 8,L0|L1},
- {OFFA_A_H, 2, 8, 8,L0|L1}, {OFFA_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADD_A_A, 2, 8, 8,L0|L1},
+ {ADD_A_B, 2, 8, 8,L0|L1}, {ADD_A_C, 2, 8, 8,L0|L1},
+ {ADD_A_D, 2, 8, 8,L0|L1}, {ADD_A_E, 2, 8, 8,L0|L1},
+ {ADD_A_H, 2, 8, 8,L0|L1}, {ADD_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ONA_A_A, 2, 8, 8,L0|L1},
+ {ONA_A_B, 2, 8, 8,L0|L1}, {ONA_A_C, 2, 8, 8,L0|L1},
+ {ONA_A_D, 2, 8, 8,L0|L1}, {ONA_A_E, 2, 8, 8,L0|L1},
+ {ONA_A_H, 2, 8, 8,L0|L1}, {ONA_A_L, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {ADC_A_A, 2, 8, 8,L0|L1},
+ {ADC_A_B, 2, 8, 8,L0|L1}, {ADC_A_C, 2, 8, 8,L0|L1},
+ {ADC_A_D, 2, 8, 8,L0|L1}, {ADC_A_E, 2, 8, 8,L0|L1},
+ {ADC_A_H, 2, 8, 8,L0|L1}, {ADC_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {OFFA_A_A, 2, 8, 8,L0|L1},
+ {OFFA_A_B, 2, 8, 8,L0|L1}, {OFFA_A_C, 2, 8, 8,L0|L1},
+ {OFFA_A_D, 2, 8, 8,L0|L1}, {OFFA_A_E, 2, 8, 8,L0|L1},
+ {OFFA_A_H, 2, 8, 8,L0|L1}, {OFFA_A_L, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
- {SUB_A_B, 2, 8, 8,L0|L1}, {SUB_A_C, 2, 8, 8,L0|L1},
- {SUB_A_D, 2, 8, 8,L0|L1}, {SUB_A_E, 2, 8, 8,L0|L1},
- {SUB_A_H, 2, 8, 8,L0|L1}, {SUB_A_L, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
- {NEA_A_B, 2, 8, 8,L0|L1}, {NEA_A_C, 2, 8, 8,L0|L1},
- {NEA_A_D, 2, 8, 8,L0|L1}, {NEA_A_E, 2, 8, 8,L0|L1},
- {NEA_A_H, 2, 8, 8,L0|L1}, {NEA_A_L, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
- {SBB_A_B, 2, 8, 8,L0|L1}, {SBB_A_C, 2, 8, 8,L0|L1},
- {SBB_A_D, 2, 8, 8,L0|L1}, {SBB_A_E, 2, 8, 8,L0|L1},
- {SBB_A_H, 2, 8, 8,L0|L1}, {SBB_A_L, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
- {EQA_A_B, 2, 8, 8,L0|L1}, {EQA_A_C, 2, 8, 8,L0|L1},
- {EQA_A_D, 2, 8, 8,L0|L1}, {EQA_A_E, 2, 8, 8,L0|L1},
- {EQA_A_H, 2, 8, 8,L0|L1}, {EQA_A_L, 2, 8, 8,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {SUB_A_A, 2, 8, 8,L0|L1},
+ {SUB_A_B, 2, 8, 8,L0|L1}, {SUB_A_C, 2, 8, 8,L0|L1},
+ {SUB_A_D, 2, 8, 8,L0|L1}, {SUB_A_E, 2, 8, 8,L0|L1},
+ {SUB_A_H, 2, 8, 8,L0|L1}, {SUB_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {NEA_A_A, 2, 8, 8,L0|L1},
+ {NEA_A_B, 2, 8, 8,L0|L1}, {NEA_A_C, 2, 8, 8,L0|L1},
+ {NEA_A_D, 2, 8, 8,L0|L1}, {NEA_A_E, 2, 8, 8,L0|L1},
+ {NEA_A_H, 2, 8, 8,L0|L1}, {NEA_A_L, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SBB_A_A, 2, 8, 8,L0|L1},
+ {SBB_A_B, 2, 8, 8,L0|L1}, {SBB_A_C, 2, 8, 8,L0|L1},
+ {SBB_A_D, 2, 8, 8,L0|L1}, {SBB_A_E, 2, 8, 8,L0|L1},
+ {SBB_A_H, 2, 8, 8,L0|L1}, {SBB_A_L, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {EQA_A_A, 2, 8, 8,L0|L1},
+ {EQA_A_B, 2, 8, 8,L0|L1}, {EQA_A_C, 2, 8, 8,L0|L1},
+ {EQA_A_D, 2, 8, 8,L0|L1}, {EQA_A_E, 2, 8, 8,L0|L1},
+ {EQA_A_H, 2, 8, 8,L0|L1}, {EQA_A_L, 2, 8, 8,L0|L1}
};
/* prefix 64 */
static const struct opcode_s op64_78c05[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ANI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {XRI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ORI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ANI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {XRI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ORI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {ADINC_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {GTI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SUINB_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 3, 8, 8,L0|L1}, {LTI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADINC_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {GTI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SUINB_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 3, 8, 8,L0|L1}, {LTI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {ADI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ONI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 3, 8, 8,L0|L1}, {ACI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 3, 8, 8,L0|L1}, {OFFI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ONI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 3, 8, 8,L0|L1}, {ACI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 3, 8, 8,L0|L1}, {OFFI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {SUI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {NEI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SBI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {EQI_A_xx, 3,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {SUI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {NEI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SBI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {EQI_A_xx, 3,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ANI_PA_xx, 3,17,17,L0|L1}, {ANI_PB_xx, 3,17,17,L0|L1},
- {ANI_PC_xx, 3,17,17,L0|L1}, {ANI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {XRI_PA_xx, 3,17,17,L0|L1}, {XRI_PB_xx, 3,17,17,L0|L1},
- {XRI_PC_xx, 3,17,17,L0|L1}, {XRI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ORI_PA_xx, 3,17,17,L0|L1}, {ORI_PB_xx, 3,17,17,L0|L1},
- {ORI_PC_xx, 3,17,17,L0|L1}, {ORI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ANI_PA_xx, 3,17,17,L0|L1}, {ANI_PB_xx, 3,17,17,L0|L1},
+ {ANI_PC_xx, 3,17,17,L0|L1}, {ANI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {XRI_PA_xx, 3,17,17,L0|L1}, {XRI_PB_xx, 3,17,17,L0|L1},
+ {XRI_PC_xx, 3,17,17,L0|L1}, {XRI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ORI_PA_xx, 3,17,17,L0|L1}, {ORI_PB_xx, 3,17,17,L0|L1},
+ {ORI_PC_xx, 3,17,17,L0|L1}, {ORI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {ADINC_PA_xx, 3,17,17,L0|L1}, {ADINC_PB_xx, 3,17,17,L0|L1},
- {ADINC_PC_xx, 3,17,17,L0|L1}, {ADINC_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {GTI_PA_xx, 3,14,14,L0|L1}, {GTI_PB_xx, 3,14,14,L0|L1},
- {GTI_PC_xx, 3,14,14,L0|L1}, {GTI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SUINB_PA_xx, 3,17,17,L0|L1}, {SUINB_PB_xx, 3,17,17,L0|L1},
- {SUINB_PC_xx, 3,17,17,L0|L1}, {SUINB_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {LTI_PA_xx, 3,14,14,L0|L1}, {LTI_PB_xx, 3,14,14,L0|L1},
- {LTI_PC_xx, 3,14,14,L0|L1}, {LTI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADINC_PA_xx, 3,17,17,L0|L1}, {ADINC_PB_xx, 3,17,17,L0|L1},
+ {ADINC_PC_xx, 3,17,17,L0|L1}, {ADINC_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {GTI_PA_xx, 3,14,14,L0|L1}, {GTI_PB_xx, 3,14,14,L0|L1},
+ {GTI_PC_xx, 3,14,14,L0|L1}, {GTI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SUINB_PA_xx, 3,17,17,L0|L1}, {SUINB_PB_xx, 3,17,17,L0|L1},
+ {SUINB_PC_xx, 3,17,17,L0|L1}, {SUINB_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {LTI_PA_xx, 3,14,14,L0|L1}, {LTI_PB_xx, 3,14,14,L0|L1},
+ {LTI_PC_xx, 3,14,14,L0|L1}, {LTI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {ADI_PA_xx, 3,17,17,L0|L1}, {ADI_PB_xx, 3,17,17,L0|L1},
- {ADI_PC_xx, 3,17,17,L0|L1}, {ADI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ONI_PA_xx, 3,14,14,L0|L1}, {ONI_PB_xx, 3,14,14,L0|L1},
- {ONI_PC_xx, 3,14,14,L0|L1}, {ONI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {ACI_PA_xx, 3,17,17,L0|L1}, {ACI_PB_xx, 3,17,17,L0|L1},
- {ACI_PC_xx, 3,17,17,L0|L1}, {ACI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {OFFI_PA_xx, 3,14,14,L0|L1}, {OFFI_PB_xx, 3,14,14,L0|L1},
- {OFFI_PC_xx, 3,14,14,L0|L1}, {OFFI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADI_PA_xx, 3,17,17,L0|L1}, {ADI_PB_xx, 3,17,17,L0|L1},
+ {ADI_PC_xx, 3,17,17,L0|L1}, {ADI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ONI_PA_xx, 3,14,14,L0|L1}, {ONI_PB_xx, 3,14,14,L0|L1},
+ {ONI_PC_xx, 3,14,14,L0|L1}, {ONI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {ACI_PA_xx, 3,17,17,L0|L1}, {ACI_PB_xx, 3,17,17,L0|L1},
+ {ACI_PC_xx, 3,17,17,L0|L1}, {ACI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {OFFI_PA_xx, 3,14,14,L0|L1}, {OFFI_PB_xx, 3,14,14,L0|L1},
+ {OFFI_PC_xx, 3,14,14,L0|L1}, {OFFI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {SUI_PA_xx, 3,17,17,L0|L1}, {SUI_PB_xx, 3,17,17,L0|L1},
- {SUI_PC_xx, 3,17,17,L0|L1}, {SUI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {NEI_PA_xx, 3,14,14,L0|L1}, {NEI_PB_xx, 3,14,14,L0|L1},
- {NEI_PC_xx, 3,14,14,L0|L1}, {NEI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SBI_PA_xx, 3,17,17,L0|L1}, {SBI_PB_xx, 3,17,17,L0|L1},
- {SBI_PC_xx, 3,17,17,L0|L1}, {SBI_MKL_xx, 3,17,17,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {EQI_PA_xx, 3,14,14,L0|L1}, {EQI_PB_xx, 3,14,14,L0|L1},
- {EQI_PC_xx, 3,14,14,L0|L1}, {EQI_MKL_xx, 3,14,14,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {SUI_PA_xx, 3,17,17,L0|L1}, {SUI_PB_xx, 3,17,17,L0|L1},
+ {SUI_PC_xx, 3,17,17,L0|L1}, {SUI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {NEI_PA_xx, 3,14,14,L0|L1}, {NEI_PB_xx, 3,14,14,L0|L1},
+ {NEI_PC_xx, 3,14,14,L0|L1}, {NEI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SBI_PA_xx, 3,17,17,L0|L1}, {SBI_PB_xx, 3,17,17,L0|L1},
+ {SBI_PC_xx, 3,17,17,L0|L1}, {SBI_MKL_xx, 3,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {EQI_PA_xx, 3,14,14,L0|L1}, {EQI_PB_xx, 3,14,14,L0|L1},
+ {EQI_PC_xx, 3,14,14,L0|L1}, {EQI_MKL_xx, 3,14,14,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
/* prefix 70 */
static const struct opcode_s op70_78c05[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SSPD_w, 4,20,20,L0|L1}, {LSPD_w, 4,20,20,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SBCD_w, 4,20,20,L0|L1}, {LBCD_w, 4,20,20,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SSPD_w, 4,20,20,L0|L1}, {LSPD_w, 4,20,20,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SBCD_w, 4,20,20,L0|L1}, {LBCD_w, 4,20,20,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SDED_w, 4,20,20,L0|L1}, {LDED_w, 4,20,20,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {SHLD_w, 4,20,20,L0|L1}, {LHLD_w, 4,20,20,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SDED_w, 4,20,20,L0|L1}, {LDED_w, 4,20,20,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {SHLD_w, 4,20,20,L0|L1}, {LHLD_w, 4,20,20,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {MOV_A_w, 4,17,17,L0|L1},
- {MOV_B_w, 4,17,17,L0|L1}, {MOV_C_w, 4,17,17,L0|L1},
- {MOV_D_w, 4,17,17,L0|L1}, {MOV_E_w, 4,17,17,L0|L1},
- {MOV_H_w, 4,17,17,L0|L1}, {MOV_L_w, 4,17,17,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {MOV_w_A, 4,17,17,L0|L1},
- {MOV_w_B, 4,17,17,L0|L1}, {MOV_w_C, 4,17,17,L0|L1},
- {MOV_w_D, 4,17,17,L0|L1}, {MOV_w_E, 4,17,17,L0|L1},
- {MOV_w_H, 4,17,17,L0|L1}, {MOV_w_L, 4,17,17,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {MOV_A_w, 4,17,17,L0|L1},
+ {MOV_B_w, 4,17,17,L0|L1}, {MOV_C_w, 4,17,17,L0|L1},
+ {MOV_D_w, 4,17,17,L0|L1}, {MOV_E_w, 4,17,17,L0|L1},
+ {MOV_H_w, 4,17,17,L0|L1}, {MOV_L_w, 4,17,17,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {MOV_w_A, 4,17,17,L0|L1},
+ {MOV_w_B, 4,17,17,L0|L1}, {MOV_w_C, 4,17,17,L0|L1},
+ {MOV_w_D, 4,17,17,L0|L1}, {MOV_w_E, 4,17,17,L0|L1},
+ {MOV_w_H, 4,17,17,L0|L1}, {MOV_w_L, 4,17,17,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ANAX_B, 2,11,11,L0|L1},
- {ANAX_D, 2,11,11,L0|L1}, {ANAX_H, 2,11,11,L0|L1},
- {ANAX_Dp, 2,11,11,L0|L1}, {ANAX_Hp, 2,11,11,L0|L1},
- {ANAX_Dm, 2,11,11,L0|L1}, {ANAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {XRAX_B, 2,11,11,L0|L1},
- {XRAX_D, 2,11,11,L0|L1}, {XRAX_H, 2,11,11,L0|L1},
- {XRAX_Dp, 2,11,11,L0|L1}, {XRAX_Hp, 2,11,11,L0|L1},
- {XRAX_Dm, 2,11,11,L0|L1}, {XRAX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ORAX_B, 2,11,11,L0|L1},
- {ORAX_D, 2,11,11,L0|L1}, {ORAX_H, 2,11,11,L0|L1},
- {ORAX_Dp, 2,11,11,L0|L1}, {ORAX_Hp, 2,11,11,L0|L1},
- {ORAX_Dm, 2,11,11,L0|L1}, {ORAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ANAX_B, 2,11,11,L0|L1},
+ {ANAX_D, 2,11,11,L0|L1}, {ANAX_H, 2,11,11,L0|L1},
+ {ANAX_Dp, 2,11,11,L0|L1}, {ANAX_Hp, 2,11,11,L0|L1},
+ {ANAX_Dm, 2,11,11,L0|L1}, {ANAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {XRAX_B, 2,11,11,L0|L1},
+ {XRAX_D, 2,11,11,L0|L1}, {XRAX_H, 2,11,11,L0|L1},
+ {XRAX_Dp, 2,11,11,L0|L1}, {XRAX_Hp, 2,11,11,L0|L1},
+ {XRAX_Dm, 2,11,11,L0|L1}, {XRAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ORAX_B, 2,11,11,L0|L1},
+ {ORAX_D, 2,11,11,L0|L1}, {ORAX_H, 2,11,11,L0|L1},
+ {ORAX_Dp, 2,11,11,L0|L1}, {ORAX_Hp, 2,11,11,L0|L1},
+ {ORAX_Dm, 2,11,11,L0|L1}, {ORAX_Hm, 2,11,11,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2, 8, 8,L0|L1}, {ADDNCX_B, 2,11,11,L0|L1},
- {ADDNCX_D, 2,11,11,L0|L1}, {ADDNCX_H, 2,11,11,L0|L1},
- {ADDNCX_Dp, 2,11,11,L0|L1}, {ADDNCX_Hp, 2,11,11,L0|L1},
- {ADDNCX_Dm, 2,11,11,L0|L1}, {ADDNCX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {GTAX_B, 2,11,11,L0|L1},
- {GTAX_D, 2,11,11,L0|L1}, {GTAX_H, 2,11,11,L0|L1},
- {GTAX_Dp, 2,11,11,L0|L1}, {GTAX_Hp, 2,11,11,L0|L1},
- {GTAX_Dm, 2,11,11,L0|L1}, {GTAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SUBNBX_B, 2,11,11,L0|L1},
- {SUBNBX_D, 2,11,11,L0|L1}, {SUBNBX_H, 2,11,11,L0|L1},
- {SUBNBX_Dp, 2,11,11,L0|L1}, {SUBNBX_Hp, 2,11,11,L0|L1},
- {SUBNBX_Dm, 2,11,11,L0|L1}, {SUBNBX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {LTAX_B, 2,11,11,L0|L1},
- {LTAX_D, 2,11,11,L0|L1}, {LTAX_H, 2,11,11,L0|L1},
- {LTAX_Dp, 2,11,11,L0|L1}, {LTAX_Hp, 2,11,11,L0|L1},
- {LTAX_Dm, 2,11,11,L0|L1}, {LTAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADDNCX_B, 2,11,11,L0|L1},
+ {ADDNCX_D, 2,11,11,L0|L1}, {ADDNCX_H, 2,11,11,L0|L1},
+ {ADDNCX_Dp, 2,11,11,L0|L1}, {ADDNCX_Hp, 2,11,11,L0|L1},
+ {ADDNCX_Dm, 2,11,11,L0|L1}, {ADDNCX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {GTAX_B, 2,11,11,L0|L1},
+ {GTAX_D, 2,11,11,L0|L1}, {GTAX_H, 2,11,11,L0|L1},
+ {GTAX_Dp, 2,11,11,L0|L1}, {GTAX_Hp, 2,11,11,L0|L1},
+ {GTAX_Dm, 2,11,11,L0|L1}, {GTAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SUBNBX_B, 2,11,11,L0|L1},
+ {SUBNBX_D, 2,11,11,L0|L1}, {SUBNBX_H, 2,11,11,L0|L1},
+ {SUBNBX_Dp, 2,11,11,L0|L1}, {SUBNBX_Hp, 2,11,11,L0|L1},
+ {SUBNBX_Dm, 2,11,11,L0|L1}, {SUBNBX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {LTAX_B, 2,11,11,L0|L1},
+ {LTAX_D, 2,11,11,L0|L1}, {LTAX_H, 2,11,11,L0|L1},
+ {LTAX_Dp, 2,11,11,L0|L1}, {LTAX_Hp, 2,11,11,L0|L1},
+ {LTAX_Dm, 2,11,11,L0|L1}, {LTAX_Hm, 2,11,11,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2, 8, 8,L0|L1}, {ADDX_B, 2,11,11,L0|L1},
- {ADDX_D, 2,11,11,L0|L1}, {ADDX_H, 2,11,11,L0|L1},
- {ADDX_Dp, 2,11,11,L0|L1}, {ADDX_Hp, 2,11,11,L0|L1},
- {ADDX_Dm, 2,11,11,L0|L1}, {ADDX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {ONAX_B, 2,11,11,L0|L1},
- {ONAX_D, 2,11,11,L0|L1}, {ONAX_H, 2,11,11,L0|L1},
- {ONAX_Dp, 2,11,11,L0|L1}, {ONAX_Hp, 2,11,11,L0|L1},
- {ONAX_Dm, 2,11,11,L0|L1}, {ONAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {ADCX_B, 2,11,11,L0|L1},
- {ADCX_D, 2,11,11,L0|L1}, {ADCX_H, 2,11,11,L0|L1},
- {ADCX_Dp, 2,11,11,L0|L1}, {ADCX_Hp, 2,11,11,L0|L1},
- {ADCX_Dm, 2,11,11,L0|L1}, {ADCX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {OFFAX_B, 2,11,11,L0|L1},
- {OFFAX_D, 2,11,11,L0|L1}, {OFFAX_H, 2,11,11,L0|L1},
- {OFFAX_Dp, 2,11,11,L0|L1}, {OFFAX_Hp, 2,11,11,L0|L1},
- {OFFAX_Dm, 2,11,11,L0|L1}, {OFFAX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ADDX_B, 2,11,11,L0|L1},
+ {ADDX_D, 2,11,11,L0|L1}, {ADDX_H, 2,11,11,L0|L1},
+ {ADDX_Dp, 2,11,11,L0|L1}, {ADDX_Hp, 2,11,11,L0|L1},
+ {ADDX_Dm, 2,11,11,L0|L1}, {ADDX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {ONAX_B, 2,11,11,L0|L1},
+ {ONAX_D, 2,11,11,L0|L1}, {ONAX_H, 2,11,11,L0|L1},
+ {ONAX_Dp, 2,11,11,L0|L1}, {ONAX_Hp, 2,11,11,L0|L1},
+ {ONAX_Dm, 2,11,11,L0|L1}, {ONAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {ADCX_B, 2,11,11,L0|L1},
+ {ADCX_D, 2,11,11,L0|L1}, {ADCX_H, 2,11,11,L0|L1},
+ {ADCX_Dp, 2,11,11,L0|L1}, {ADCX_Hp, 2,11,11,L0|L1},
+ {ADCX_Dm, 2,11,11,L0|L1}, {ADCX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {OFFAX_B, 2,11,11,L0|L1},
+ {OFFAX_D, 2,11,11,L0|L1}, {OFFAX_H, 2,11,11,L0|L1},
+ {OFFAX_Dp, 2,11,11,L0|L1}, {OFFAX_Hp, 2,11,11,L0|L1},
+ {OFFAX_Dm, 2,11,11,L0|L1}, {OFFAX_Hm, 2,11,11,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2, 8, 8,L0|L1}, {SUBX_B, 2,11,11,L0|L1},
- {SUBX_D, 2,11,11,L0|L1}, {SUBX_H, 2,11,11,L0|L1},
- {SUBX_Dp, 2,11,11,L0|L1}, {SUBX_Hp, 2,11,11,L0|L1},
- {SUBX_Dm, 2,11,11,L0|L1}, {SUBX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {NEAX_B, 2,11,11,L0|L1},
- {NEAX_D, 2,11,11,L0|L1}, {NEAX_H, 2,11,11,L0|L1},
- {NEAX_Dp, 2,11,11,L0|L1}, {NEAX_Hp, 2,11,11,L0|L1},
- {NEAX_Dm, 2,11,11,L0|L1}, {NEAX_Hm, 2,11,11,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {SBBX_B, 2,11,11,L0|L1},
- {SBBX_D, 2,11,11,L0|L1}, {SBBX_H, 2,11,11,L0|L1},
- {SBBX_Dp, 2,11,11,L0|L1}, {SBBX_Hp, 2,11,11,L0|L1},
- {SBBX_Dm, 2,11,11,L0|L1}, {SBBX_Hm, 2,11,11,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {EQAX_B, 2,11,11,L0|L1},
- {EQAX_D, 2,11,11,L0|L1}, {EQAX_H, 2,11,11,L0|L1},
- {EQAX_Dp, 2,11,11,L0|L1}, {EQAX_Hp, 2,11,11,L0|L1},
- {EQAX_Dm, 2,11,11,L0|L1}, {EQAX_Hm, 2,11,11,L0|L1}
+ {illegal2, 2, 8, 8,L0|L1}, {SUBX_B, 2,11,11,L0|L1},
+ {SUBX_D, 2,11,11,L0|L1}, {SUBX_H, 2,11,11,L0|L1},
+ {SUBX_Dp, 2,11,11,L0|L1}, {SUBX_Hp, 2,11,11,L0|L1},
+ {SUBX_Dm, 2,11,11,L0|L1}, {SUBX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {NEAX_B, 2,11,11,L0|L1},
+ {NEAX_D, 2,11,11,L0|L1}, {NEAX_H, 2,11,11,L0|L1},
+ {NEAX_Dp, 2,11,11,L0|L1}, {NEAX_Hp, 2,11,11,L0|L1},
+ {NEAX_Dm, 2,11,11,L0|L1}, {NEAX_Hm, 2,11,11,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {SBBX_B, 2,11,11,L0|L1},
+ {SBBX_D, 2,11,11,L0|L1}, {SBBX_H, 2,11,11,L0|L1},
+ {SBBX_Dp, 2,11,11,L0|L1}, {SBBX_Hp, 2,11,11,L0|L1},
+ {SBBX_Dm, 2,11,11,L0|L1}, {SBBX_Hm, 2,11,11,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {EQAX_B, 2,11,11,L0|L1},
+ {EQAX_D, 2,11,11,L0|L1}, {EQAX_H, 2,11,11,L0|L1},
+ {EQAX_Dp, 2,11,11,L0|L1}, {EQAX_Hp, 2,11,11,L0|L1},
+ {EQAX_Dm, 2,11,11,L0|L1}, {EQAX_Hm, 2,11,11,L0|L1}
};
/* prefix 74 */
static const struct opcode_s op74_78c05[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ANAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {XRAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ORAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ANAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {XRAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ORAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xA0 - 0xBF */
- {ADDNCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {GTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SUBNBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {LTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADDNCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {GTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SUBNBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {LTAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xC0 - 0xDF */
- {ADDW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {ONAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {ADCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {OFFAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ADDW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {ONAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {ADCW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {OFFAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
/* 0xE0 - 0xFF */
- {SUBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {NEAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
-
- {SBBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {EQAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
- {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
+ {SUBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {NEAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+
+ {SBBW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {EQAW_wa, 3,14,14,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {illegal2, 2, 8, 8,L0|L1}
};
static const struct opcode_s opXX_78c05[256] =
{
/* 0x00 - 0x1F */
- {NOP, 1, 4, 4,L0|L1}, {HALT, 1, 6, 6,L0|L1},
- {INX_SP, 1, 7, 7,L0|L1}, {DCX_SP, 1, 7, 7,L0|L1},
- {LXI_S_w, 3,10,10,L0|L1}, {ANIW_wa_xx, 3,16,16,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {ANI_A_xx, 2, 7, 7,L0|L1},
- {RET, 1,10,10,L0|L1}, {SIO, 1, 4, 4,L0|L1},
- {MOV_A_B, 1, 4, 4,L0|L1}, {MOV_A_C, 1, 4, 4,L0|L1},
- {MOV_A_D, 1, 4, 4,L0|L1}, {MOV_A_E, 1, 4, 4,L0|L1},
- {MOV_A_H, 1, 4, 4,L0|L1}, {MOV_A_L, 1, 4, 4,L0|L1},
-
- {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {INX_BC, 1, 7, 7,L0|L1}, {DCX_BC, 1, 7, 7,L0|L1},
- {LXI_B_w, 3,10,10,L0|L1}, {ORIW_wa_xx, 3,16,16,L0|L1},
- {XRI_A_xx, 2, 7, 7,L0|L1}, {ORI_A_xx, 2, 7, 7,L0|L1},
- {RETS, 1,10,10,L0|L1}, {STM, 1, 4, 4,L0|L1},
- {MOV_B_A, 1, 4, 4,L0|L1}, {MOV_C_A, 1, 4, 4,L0|L1},
- {MOV_D_A, 1, 4, 4,L0|L1}, {MOV_E_A, 1, 4, 4,L0|L1},
- {MOV_H_A, 1, 4, 4,L0|L1}, {MOV_L_A, 1, 4, 4,L0|L1},
+ {NOP, 1, 4, 4,L0|L1}, {HALT, 1, 6, 6,L0|L1},
+ {INX_SP, 1, 7, 7,L0|L1}, {DCX_SP, 1, 7, 7,L0|L1},
+ {LXI_S_w, 3,10,10,L0|L1}, {ANIW_wa_xx, 3,16,16,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {ANI_A_xx, 2, 7, 7,L0|L1},
+ {RET, 1,10,10,L0|L1}, {SIO, 1, 4, 4,L0|L1},
+ {MOV_A_B, 1, 4, 4,L0|L1}, {MOV_A_C, 1, 4, 4,L0|L1},
+ {MOV_A_D, 1, 4, 4,L0|L1}, {MOV_A_E, 1, 4, 4,L0|L1},
+ {MOV_A_H, 1, 4, 4,L0|L1}, {MOV_A_L, 1, 4, 4,L0|L1},
+
+ {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {INX_BC, 1, 7, 7,L0|L1}, {DCX_BC, 1, 7, 7,L0|L1},
+ {LXI_B_w, 3,10,10,L0|L1}, {ORIW_wa_xx, 3,16,16,L0|L1},
+ {XRI_A_xx, 2, 7, 7,L0|L1}, {ORI_A_xx, 2, 7, 7,L0|L1},
+ {RETS, 1,10,10,L0|L1}, {STM, 1, 4, 4,L0|L1},
+ {MOV_B_A, 1, 4, 4,L0|L1}, {MOV_C_A, 1, 4, 4,L0|L1},
+ {MOV_D_A, 1, 4, 4,L0|L1}, {MOV_E_A, 1, 4, 4,L0|L1},
+ {MOV_H_A, 1, 4, 4,L0|L1}, {MOV_L_A, 1, 4, 4,L0|L1},
/* 0x20 - 0x3F */
- {INRW_wa_7801, 2,13,13,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {INX_DE, 1, 7, 7,L0|L1}, {DCX_DE, 1, 7, 7,L0|L1},
- {LXI_D_w, 3,10,10,L0|L1}, {GTIW_wa_xx, 3,13,13,L0|L1},
- {ADINC_A_xx, 2, 7, 7,L0|L1}, {GTI_A_xx, 2, 7, 7,L0|L1},
- {LDAW_wa, 2,10,10,L0|L1}, {LDAX_B, 1, 7, 7,L0|L1},
- {LDAX_D, 1, 7, 7,L0|L1}, {LDAX_H, 1, 7, 7,L0|L1},
- {LDAX_Dp, 1, 7, 7,L0|L1}, {LDAX_Hp, 1, 7, 7,L0|L1},
- {LDAX_Dm, 1, 7, 7,L0|L1}, {LDAX_Hm, 1, 7, 7,L0|L1},
-
- {DCRW_wa_7801, 2,13,13,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {INX_HL, 1, 7, 7,L0|L1}, {DCX_HL, 1, 7, 7,L0|L1},
- {LXI_H_w, 3,10,10, L1}, {LTIW_wa_xx, 3,13,13,L0|L1},
- {SUINB_A_xx, 2, 7, 7,L0|L1}, {LTI_A_xx, 2, 7, 7,L0|L1},
- {STAW_wa, 2,10,10,L0|L1}, {STAX_B, 1, 7, 7,L0|L1},
- {STAX_D, 1, 7, 7,L0|L1}, {STAX_H, 1, 7, 7,L0|L1},
- {STAX_Dp, 1, 7, 7,L0|L1}, {STAX_Hp, 1, 7, 7,L0|L1},
- {STAX_Dm, 1, 7, 7,L0|L1}, {STAX_Hm, 1, 7, 7,L0|L1},
+ {INRW_wa_7801, 2,13,13,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {INX_DE, 1, 7, 7,L0|L1}, {DCX_DE, 1, 7, 7,L0|L1},
+ {LXI_D_w, 3,10,10,L0|L1}, {GTIW_wa_xx, 3,13,13,L0|L1},
+ {ADINC_A_xx, 2, 7, 7,L0|L1}, {GTI_A_xx, 2, 7, 7,L0|L1},
+ {LDAW_wa, 2,10,10,L0|L1}, {LDAX_B, 1, 7, 7,L0|L1},
+ {LDAX_D, 1, 7, 7,L0|L1}, {LDAX_H, 1, 7, 7,L0|L1},
+ {LDAX_Dp, 1, 7, 7,L0|L1}, {LDAX_Hp, 1, 7, 7,L0|L1},
+ {LDAX_Dm, 1, 7, 7,L0|L1}, {LDAX_Hm, 1, 7, 7,L0|L1},
+
+ {DCRW_wa_7801, 2,13,13,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {INX_HL, 1, 7, 7,L0|L1}, {DCX_HL, 1, 7, 7,L0|L1},
+ {LXI_H_w, 3,10,10, L1}, {LTIW_wa_xx, 3,13,13,L0|L1},
+ {SUINB_A_xx, 2, 7, 7,L0|L1}, {LTI_A_xx, 2, 7, 7,L0|L1},
+ {STAW_wa, 2,10,10,L0|L1}, {STAX_B, 1, 7, 7,L0|L1},
+ {STAX_D, 1, 7, 7,L0|L1}, {STAX_H, 1, 7, 7,L0|L1},
+ {STAX_Dp, 1, 7, 7,L0|L1}, {STAX_Hp, 1, 7, 7,L0|L1},
+ {STAX_Dm, 1, 7, 7,L0|L1}, {STAX_Hm, 1, 7, 7,L0|L1},
/* 0x40 - 0x5F */
- {illegal, 1, 4, 4,L0|L1}, {INR_A_7801, 1, 4, 4,L0|L1},
- {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1},
- {CALL_w, 3,16,16,L0|L1}, {ONIW_wa_xx, 3,13,13,L0|L1},
- {ADI_A_xx, 2, 7, 7,L0|L1}, {ONI_A_xx, 2, 7, 7,L0|L1},
- {PRE_48, 1, 0, 0,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1},
- {JRE, 2,13,13,L0|L1}, {JRE, 2,13,13,L0|L1},
-
- {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1},
- {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1},
- {JMP_w, 3,10,10,L0|L1}, {OFFIW_wa_xx, 3,13,13,L0|L1},
- {ACI_A_xx, 2, 7, 7,L0|L1}, {OFFI_A_xx, 2, 7, 7,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {INR_A_7801, 1, 4, 4,L0|L1},
+ {INR_B_7801, 1, 4, 4,L0|L1}, {INR_C_7801, 1, 4, 4,L0|L1},
+ {CALL_w, 3,16,16,L0|L1}, {ONIW_wa_xx, 3,13,13,L0|L1},
+ {ADI_A_xx, 2, 7, 7,L0|L1}, {ONI_A_xx, 2, 7, 7,L0|L1},
+ {PRE_48, 1, 0, 0,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1},
+ {JRE, 2,13,13,L0|L1}, {JRE, 2,13,13,L0|L1},
+
+ {illegal, 1, 4, 4,L0|L1}, {DCR_A_7801, 1, 4, 4,L0|L1},
+ {DCR_B_7801, 1, 4, 4,L0|L1}, {DCR_C_7801, 1, 4, 4,L0|L1},
+ {JMP_w, 3,10,10,L0|L1}, {OFFIW_wa_xx, 3,13,13,L0|L1},
+ {ACI_A_xx, 2, 7, 7,L0|L1}, {OFFI_A_xx, 2, 7, 7,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {illegal, 1, 4, 4,L0|L1},
/* 0x60 - 0x7F */
- {PRE_60, 1, 0, 0,L0|L1}, {DAA, 1, 4, 4,L0|L1},
- {RETI, 1,13,13,L0|L1}, {CALB, 2,13,13,L0|L1},
- {PRE_64, 1, 0, 0,L0|L1}, {NEIW_wa_xx, 3,13,13,L0|L1},
- {SUI_A_xx, 2, 7, 7,L0|L1}, {NEI_A_xx, 2, 7, 7,L0|L1},
- {illegal, 1, 4, 4,L0|L1}, {MVI_A_xx, 2, 7, 7,L0 },
- {MVI_B_xx, 2, 7, 7,L0|L1}, {MVI_C_xx, 2, 7, 7,L0|L1},
- {MVI_D_xx, 2, 7, 7,L0|L1}, {MVI_E_xx, 2, 7, 7,L0|L1},
- {MVI_H_xx, 2, 7, 7,L0|L1}, {MVI_L_xx, 2, 7, 7, L1},
-
- {PRE_70, 1, 0, 0,L0|L1}, {MVIW_wa_xx, 3,13,13,L0|L1},
- {SOFTI, 1,19,19,L0|L1}, {JB, 1, 4, 4,L0|L1},
- {PRE_74, 1, 0, 0,L0|L1}, {EQIW_wa_xx, 3,13,13,L0|L1},
- {SBI_A_xx, 2, 7, 7,L0|L1}, {EQI_A_xx, 2, 7, 7,L0|L1},
- {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
- {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
- {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
- {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
+ {PRE_60, 1, 0, 0,L0|L1}, {DAA, 1, 4, 4,L0|L1},
+ {RETI, 1,13,13,L0|L1}, {CALB, 2,13,13,L0|L1},
+ {PRE_64, 1, 0, 0,L0|L1}, {NEIW_wa_xx, 3,13,13,L0|L1},
+ {SUI_A_xx, 2, 7, 7,L0|L1}, {NEI_A_xx, 2, 7, 7,L0|L1},
+ {illegal, 1, 4, 4,L0|L1}, {MVI_A_xx, 2, 7, 7,L0 },
+ {MVI_B_xx, 2, 7, 7,L0|L1}, {MVI_C_xx, 2, 7, 7,L0|L1},
+ {MVI_D_xx, 2, 7, 7,L0|L1}, {MVI_E_xx, 2, 7, 7,L0|L1},
+ {MVI_H_xx, 2, 7, 7,L0|L1}, {MVI_L_xx, 2, 7, 7, L1},
+
+ {PRE_70, 1, 0, 0,L0|L1}, {MVIW_wa_xx, 3,13,13,L0|L1},
+ {SOFTI, 1,19,19,L0|L1}, {JB, 1, 4, 4,L0|L1},
+ {PRE_74, 1, 0, 0,L0|L1}, {EQIW_wa_xx, 3,13,13,L0|L1},
+ {SBI_A_xx, 2, 7, 7,L0|L1}, {EQI_A_xx, 2, 7, 7,L0|L1},
+ {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
+ {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
+ {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
+ {CALF, 2,13,13,L0|L1}, {CALF, 2,13,13,L0|L1},
/* 0x80 - 0x9F */
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
-
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
/* 0xA0 - 0xBF */
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
-
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
/* 0xC0 - 0xDF */
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
-
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
/* 0xE0 - 0xFF */
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
-
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
- {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1}
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1},
+ {JR, 1,10,10,L0|L1}, {JR, 1,10,10,L0|L1}
};
/***********************************************************************
@@ -6045,1244 +6045,1244 @@ static const struct opcode_s opXX_78c05[256] =
static const struct opcode_s op48_78c06[256] =
{
/* 0x00 - 0x1F */
- {SKIT_F0, 2,12,12,L0|L1}, {SKIT_FT0, 2,12,12,L0|L1},
- {SKIT_F1, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SKIT_FST, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SK_CY, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SK_Z, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {PUSH_VA, 2,21,21,L0|L1}, {POP_VA, 2,18,18,L0|L1},
-
- {SKNIT_F0, 2,12,12,L0|L1}, {SKNIT_FT0, 2,12,12,L0|L1},
- {SKNIT_F1, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SKNIT_FST, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SKN_CY, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SKN_Z, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {PUSH_BC, 2,21,21,L0|L1}, {POP_BC, 2,18,18,L0|L1},
+ {SKIT_F0, 2,12,12,L0|L1}, {SKIT_FT0, 2,12,12,L0|L1},
+ {SKIT_F1, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SKIT_FST, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SK_CY, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SK_Z, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {PUSH_VA, 2,21,21,L0|L1}, {POP_VA, 2,18,18,L0|L1},
+
+ {SKNIT_F0, 2,12,12,L0|L1}, {SKNIT_FT0, 2,12,12,L0|L1},
+ {SKNIT_F1, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SKNIT_FST, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SKN_CY, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SKN_Z, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {PUSH_BC, 2,21,21,L0|L1}, {POP_BC, 2,18,18,L0|L1},
/* 0x20 - 0x3F */
- {EI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {DI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {CLC, 2,12,12,L0|L1}, {STC, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {PEX, 2,15,15,L0|L1},
- {PUSH_DE, 2,21,21,L0|L1}, {POP_DE, 2,18,18,L0|L1},
-
- {RLL_A, 2,12,12,L0|L1}, {RLR_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {RLD, 2,21,21,L0|L1}, {RRD, 2,21,21,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {PER, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {PUSH_HL, 2,21,21,L0|L1}, {POP_HL, 2,18,18,L0|L1},
+ {EI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {DI, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {CLC, 2,12,12,L0|L1}, {STC, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {PEX, 2,15,15,L0|L1},
+ {PUSH_DE, 2,21,21,L0|L1}, {POP_DE, 2,18,18,L0|L1},
+
+ {RLL_A, 2,12,12,L0|L1}, {RLR_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {RLD, 2,21,21,L0|L1}, {RRD, 2,21,21,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {PER, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {PUSH_HL, 2,21,21,L0|L1}, {POP_HL, 2,18,18,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
};
static const struct opcode_s op4C_78c06[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xC0 - 0xDF */
- {MOV_A_PA, 2,14,14,L0|L1}, {MOV_A_PB, 2,14,14,L0|L1},
- {MOV_A_PC, 2,14,14,L0|L1}, {MOV_A_MKL, 2,14,14,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {MOV_A_S, 2,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {MOV_A_PA, 2,14,14,L0|L1}, {MOV_A_PB, 2,14,14,L0|L1},
+ {MOV_A_PC, 2,14,14,L0|L1}, {MOV_A_MKL, 2,14,14,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {MOV_A_S, 2,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
};
/* prefix 4D */
static const struct opcode_s op4D_78c06[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xC0 - 0xDF */
- {MOV_PA_A, 2,14,14,L0|L1}, {MOV_PB_A, 2,14,14,L0|L1},
- {MOV_PC_A, 2,14,14,L0|L1}, {MOV_MKL_A, 2,14,14,L0|L1},
- {MOV_MB_A, 2,14,14,L0|L1}, {MOV_MC_A, 2,14,14,L0|L1},
- {MOV_TM0_A, 2,14,14,L0|L1}, {MOV_TM1_A, 2,14,14,L0|L1},
- {MOV_S_A, 2,14,14,L0|L1}, {MOV_TMM_A, 2,14,14,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {MOV_PA_A, 2,14,14,L0|L1}, {MOV_PB_A, 2,14,14,L0|L1},
+ {MOV_PC_A, 2,14,14,L0|L1}, {MOV_MKL_A, 2,14,14,L0|L1},
+ {MOV_MB_A, 2,14,14,L0|L1}, {MOV_MC_A, 2,14,14,L0|L1},
+ {MOV_TM0_A, 2,14,14,L0|L1}, {MOV_TM1_A, 2,14,14,L0|L1},
+ {MOV_S_A, 2,14,14,L0|L1}, {MOV_TMM_A, 2,14,14,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
};
/* prefix 60 */
static const struct opcode_s op60_78c06[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ANA_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {XRA_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ORA_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ANA_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {XRA_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ORA_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2,12,12,L0|L1}, {ADDNC_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {GTA_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SUBNB_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {LTA_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADDNC_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {GTA_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SUBNB_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {LTA_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2,12,12,L0|L1}, {ADD_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {ADC_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADD_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {ADC_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2, 8, 8,L0|L1}, {SUB_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {NEA_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SBB_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {EQA_A_A, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2, 8, 8,L0|L1}, {SUB_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {NEA_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SBB_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {EQA_A_A, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ANA_A_A, 2,12,12,L0|L1},
- {ANA_A_B, 2,12,12,L0|L1}, {ANA_A_C, 2,12,12,L0|L1},
- {ANA_A_D, 2,12,12,L0|L1}, {ANA_A_E, 2,12,12,L0|L1},
- {ANA_A_H, 2,12,12,L0|L1}, {ANA_A_L, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {XRA_A_A, 2,12,12,L0|L1},
- {XRA_A_B, 2,12,12,L0|L1}, {XRA_A_C, 2,12,12,L0|L1},
- {XRA_A_D, 2,12,12,L0|L1}, {XRA_A_E, 2,12,12,L0|L1},
- {XRA_A_H, 2,12,12,L0|L1}, {XRA_A_L, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ORA_A_A, 2,12,12,L0|L1},
- {ORA_A_B, 2,12,12,L0|L1}, {ORA_A_C, 2,12,12,L0|L1},
- {ORA_A_D, 2,12,12,L0|L1}, {ORA_A_E, 2,12,12,L0|L1},
- {ORA_A_H, 2,12,12,L0|L1}, {ORA_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ANA_A_A, 2,12,12,L0|L1},
+ {ANA_A_B, 2,12,12,L0|L1}, {ANA_A_C, 2,12,12,L0|L1},
+ {ANA_A_D, 2,12,12,L0|L1}, {ANA_A_E, 2,12,12,L0|L1},
+ {ANA_A_H, 2,12,12,L0|L1}, {ANA_A_L, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {XRA_A_A, 2,12,12,L0|L1},
+ {XRA_A_B, 2,12,12,L0|L1}, {XRA_A_C, 2,12,12,L0|L1},
+ {XRA_A_D, 2,12,12,L0|L1}, {XRA_A_E, 2,12,12,L0|L1},
+ {XRA_A_H, 2,12,12,L0|L1}, {XRA_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ORA_A_A, 2,12,12,L0|L1},
+ {ORA_A_B, 2,12,12,L0|L1}, {ORA_A_C, 2,12,12,L0|L1},
+ {ORA_A_D, 2,12,12,L0|L1}, {ORA_A_E, 2,12,12,L0|L1},
+ {ORA_A_H, 2,12,12,L0|L1}, {ORA_A_L, 2,12,12,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2,12,12,L0|L1}, {ADDNC_A_A, 2,12,12,L0|L1},
- {ADDNC_A_B, 2,12,12,L0|L1}, {ADDNC_A_C, 2,12,12,L0|L1},
- {ADDNC_A_D, 2,12,12,L0|L1}, {ADDNC_A_E, 2,12,12,L0|L1},
- {ADDNC_A_H, 2,12,12,L0|L1}, {ADDNC_A_L, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {GTA_A_A, 2,12,12,L0|L1},
- {GTA_A_B, 2,12,12,L0|L1}, {GTA_A_C, 2,12,12,L0|L1},
- {GTA_A_D, 2,12,12,L0|L1}, {GTA_A_E, 2,12,12,L0|L1},
- {GTA_A_H, 2,12,12,L0|L1}, {GTA_A_L, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SUBNB_A_A, 2,12,12,L0|L1},
- {SUBNB_A_B, 2,12,12,L0|L1}, {SUBNB_A_C, 2,12,12,L0|L1},
- {SUBNB_A_D, 2,12,12,L0|L1}, {SUBNB_A_E, 2,12,12,L0|L1},
- {SUBNB_A_H, 2,12,12,L0|L1}, {SUBNB_A_L, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {LTA_A_A, 2,12,12,L0|L1},
- {LTA_A_B, 2,12,12,L0|L1}, {LTA_A_C, 2,12,12,L0|L1},
- {LTA_A_D, 2,12,12,L0|L1}, {LTA_A_E, 2,12,12,L0|L1},
- {LTA_A_H, 2,12,12,L0|L1}, {LTA_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADDNC_A_A, 2,12,12,L0|L1},
+ {ADDNC_A_B, 2,12,12,L0|L1}, {ADDNC_A_C, 2,12,12,L0|L1},
+ {ADDNC_A_D, 2,12,12,L0|L1}, {ADDNC_A_E, 2,12,12,L0|L1},
+ {ADDNC_A_H, 2,12,12,L0|L1}, {ADDNC_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {GTA_A_A, 2,12,12,L0|L1},
+ {GTA_A_B, 2,12,12,L0|L1}, {GTA_A_C, 2,12,12,L0|L1},
+ {GTA_A_D, 2,12,12,L0|L1}, {GTA_A_E, 2,12,12,L0|L1},
+ {GTA_A_H, 2,12,12,L0|L1}, {GTA_A_L, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SUBNB_A_A, 2,12,12,L0|L1},
+ {SUBNB_A_B, 2,12,12,L0|L1}, {SUBNB_A_C, 2,12,12,L0|L1},
+ {SUBNB_A_D, 2,12,12,L0|L1}, {SUBNB_A_E, 2,12,12,L0|L1},
+ {SUBNB_A_H, 2,12,12,L0|L1}, {SUBNB_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {LTA_A_A, 2,12,12,L0|L1},
+ {LTA_A_B, 2,12,12,L0|L1}, {LTA_A_C, 2,12,12,L0|L1},
+ {LTA_A_D, 2,12,12,L0|L1}, {LTA_A_E, 2,12,12,L0|L1},
+ {LTA_A_H, 2,12,12,L0|L1}, {LTA_A_L, 2,12,12,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2,12,12,L0|L1}, {ADD_A_A, 2,12,12,L0|L1},
- {ADD_A_B, 2,12,12,L0|L1}, {ADD_A_C, 2,12,12,L0|L1},
- {ADD_A_D, 2,12,12,L0|L1}, {ADD_A_E, 2,12,12,L0|L1},
- {ADD_A_H, 2,12,12,L0|L1}, {ADD_A_L, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ONA_A_A, 2,12,12,L0|L1},
- {ONA_A_B, 2,12,12,L0|L1}, {ONA_A_C, 2,12,12,L0|L1},
- {ONA_A_D, 2,12,12,L0|L1}, {ONA_A_E, 2,12,12,L0|L1},
- {ONA_A_H, 2,12,12,L0|L1}, {ONA_A_L, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {ADC_A_A, 2,12,12,L0|L1},
- {ADC_A_B, 2,12,12,L0|L1}, {ADC_A_C, 2,12,12,L0|L1},
- {ADC_A_D, 2,12,12,L0|L1}, {ADC_A_E, 2,12,12,L0|L1},
- {ADC_A_H, 2,12,12,L0|L1}, {ADC_A_L, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {OFFA_A_A, 2,12,12,L0|L1},
- {OFFA_A_B, 2,12,12,L0|L1}, {OFFA_A_C, 2,12,12,L0|L1},
- {OFFA_A_D, 2,12,12,L0|L1}, {OFFA_A_E, 2,12,12,L0|L1},
- {OFFA_A_H, 2,12,12,L0|L1}, {OFFA_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADD_A_A, 2,12,12,L0|L1},
+ {ADD_A_B, 2,12,12,L0|L1}, {ADD_A_C, 2,12,12,L0|L1},
+ {ADD_A_D, 2,12,12,L0|L1}, {ADD_A_E, 2,12,12,L0|L1},
+ {ADD_A_H, 2,12,12,L0|L1}, {ADD_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ONA_A_A, 2,12,12,L0|L1},
+ {ONA_A_B, 2,12,12,L0|L1}, {ONA_A_C, 2,12,12,L0|L1},
+ {ONA_A_D, 2,12,12,L0|L1}, {ONA_A_E, 2,12,12,L0|L1},
+ {ONA_A_H, 2,12,12,L0|L1}, {ONA_A_L, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {ADC_A_A, 2,12,12,L0|L1},
+ {ADC_A_B, 2,12,12,L0|L1}, {ADC_A_C, 2,12,12,L0|L1},
+ {ADC_A_D, 2,12,12,L0|L1}, {ADC_A_E, 2,12,12,L0|L1},
+ {ADC_A_H, 2,12,12,L0|L1}, {ADC_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {OFFA_A_A, 2,12,12,L0|L1},
+ {OFFA_A_B, 2,12,12,L0|L1}, {OFFA_A_C, 2,12,12,L0|L1},
+ {OFFA_A_D, 2,12,12,L0|L1}, {OFFA_A_E, 2,12,12,L0|L1},
+ {OFFA_A_H, 2,12,12,L0|L1}, {OFFA_A_L, 2,12,12,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2,12,12,L0|L1}, {SUB_A_A, 2,12,12,L0|L1},
- {SUB_A_B, 2,12,12,L0|L1}, {SUB_A_C, 2,12,12,L0|L1},
- {SUB_A_D, 2,12,12,L0|L1}, {SUB_A_E, 2,12,12,L0|L1},
- {SUB_A_H, 2,12,12,L0|L1}, {SUB_A_L, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {NEA_A_A, 2,12,12,L0|L1},
- {NEA_A_B, 2,12,12,L0|L1}, {NEA_A_C, 2,12,12,L0|L1},
- {NEA_A_D, 2,12,12,L0|L1}, {NEA_A_E, 2,12,12,L0|L1},
- {NEA_A_H, 2,12,12,L0|L1}, {NEA_A_L, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SBB_A_A, 2,12,12,L0|L1},
- {SBB_A_B, 2,12,12,L0|L1}, {SBB_A_C, 2,12,12,L0|L1},
- {SBB_A_D, 2,12,12,L0|L1}, {SBB_A_E, 2,12,12,L0|L1},
- {SBB_A_H, 2,12,12,L0|L1}, {SBB_A_L, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {EQA_A_A, 2,12,12,L0|L1},
- {EQA_A_B, 2,12,12,L0|L1}, {EQA_A_C, 2,12,12,L0|L1},
- {EQA_A_D, 2,12,12,L0|L1}, {EQA_A_E, 2,12,12,L0|L1},
- {EQA_A_H, 2,12,12,L0|L1}, {EQA_A_L, 2,12,12,L0|L1}
+ {illegal2, 2,12,12,L0|L1}, {SUB_A_A, 2,12,12,L0|L1},
+ {SUB_A_B, 2,12,12,L0|L1}, {SUB_A_C, 2,12,12,L0|L1},
+ {SUB_A_D, 2,12,12,L0|L1}, {SUB_A_E, 2,12,12,L0|L1},
+ {SUB_A_H, 2,12,12,L0|L1}, {SUB_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {NEA_A_A, 2,12,12,L0|L1},
+ {NEA_A_B, 2,12,12,L0|L1}, {NEA_A_C, 2,12,12,L0|L1},
+ {NEA_A_D, 2,12,12,L0|L1}, {NEA_A_E, 2,12,12,L0|L1},
+ {NEA_A_H, 2,12,12,L0|L1}, {NEA_A_L, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SBB_A_A, 2,12,12,L0|L1},
+ {SBB_A_B, 2,12,12,L0|L1}, {SBB_A_C, 2,12,12,L0|L1},
+ {SBB_A_D, 2,12,12,L0|L1}, {SBB_A_E, 2,12,12,L0|L1},
+ {SBB_A_H, 2,12,12,L0|L1}, {SBB_A_L, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {EQA_A_A, 2,12,12,L0|L1},
+ {EQA_A_B, 2,12,12,L0|L1}, {EQA_A_C, 2,12,12,L0|L1},
+ {EQA_A_D, 2,12,12,L0|L1}, {EQA_A_E, 2,12,12,L0|L1},
+ {EQA_A_H, 2,12,12,L0|L1}, {EQA_A_L, 2,12,12,L0|L1}
};
/* prefix 64 */
static const struct opcode_s op64_78c06[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ANI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {XRI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ORI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ANI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {XRI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ORI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2,12,12,L0|L1}, {ADINC_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {GTI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SUINB_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 3,12,12,L0|L1}, {LTI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADINC_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {GTI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SUINB_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 3,12,12,L0|L1}, {LTI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2,12,12,L0|L1}, {ADI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ONI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 3,12,12,L0|L1}, {ACI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 3,12,12,L0|L1}, {OFFI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ONI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 3,12,12,L0|L1}, {ACI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 3,12,12,L0|L1}, {OFFI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2,12,12,L0|L1}, {SUI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {NEI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SBI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {EQI_A_xx, 3,17,17,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {SUI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {NEI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SBI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {EQI_A_xx, 3,17,17,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {ANI_PA_xx, 3,23,23,L0|L1}, {ANI_PB_xx, 3,23,23,L0|L1},
- {ANI_PC_xx, 3,23,23,L0|L1}, {ANI_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {XRI_PA_xx, 3,23,23,L0|L1}, {XRI_PB_xx, 3,23,23,L0|L1},
- {XRI_PC_xx, 3,23,23,L0|L1}, {XRI_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {ORI_PA_xx, 3,23,23,L0|L1}, {ORI_PB_xx, 3,23,23,L0|L1},
- {ORI_PC_xx, 3,23,23,L0|L1}, {ORI_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ANI_PA_xx, 3,23,23,L0|L1}, {ANI_PB_xx, 3,23,23,L0|L1},
+ {ANI_PC_xx, 3,23,23,L0|L1}, {ANI_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {XRI_PA_xx, 3,23,23,L0|L1}, {XRI_PB_xx, 3,23,23,L0|L1},
+ {XRI_PC_xx, 3,23,23,L0|L1}, {XRI_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ORI_PA_xx, 3,23,23,L0|L1}, {ORI_PB_xx, 3,23,23,L0|L1},
+ {ORI_PC_xx, 3,23,23,L0|L1}, {ORI_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xA0 - 0xBF */
- {ADINC_PA_xx, 3,23,23,L0|L1}, {ADINC_PB_xx, 3,23,23,L0|L1},
- {ADINC_PC_xx, 3,23,23,L0|L1}, {ADINC_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {GTI_PA_xx, 3,20,20,L0|L1}, {GTI_PB_xx, 3,20,20,L0|L1},
- {GTI_PC_xx, 3,20,20,L0|L1}, {GTI_MKL_xx, 3,20,20,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {SUINB_PA_xx, 3,23,23,L0|L1}, {SUINB_PB_xx, 3,23,23,L0|L1},
- {SUINB_PC_xx, 3,23,23,L0|L1}, {SUINB_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {LTI_PA_xx, 3,20,20,L0|L1}, {LTI_PB_xx, 3,20,20,L0|L1},
- {LTI_PC_xx, 3,20,20,L0|L1}, {LTI_MKL_xx, 3,20,20,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ADINC_PA_xx, 3,23,23,L0|L1}, {ADINC_PB_xx, 3,23,23,L0|L1},
+ {ADINC_PC_xx, 3,23,23,L0|L1}, {ADINC_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {GTI_PA_xx, 3,20,20,L0|L1}, {GTI_PB_xx, 3,20,20,L0|L1},
+ {GTI_PC_xx, 3,20,20,L0|L1}, {GTI_MKL_xx, 3,20,20,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {SUINB_PA_xx, 3,23,23,L0|L1}, {SUINB_PB_xx, 3,23,23,L0|L1},
+ {SUINB_PC_xx, 3,23,23,L0|L1}, {SUINB_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {LTI_PA_xx, 3,20,20,L0|L1}, {LTI_PB_xx, 3,20,20,L0|L1},
+ {LTI_PC_xx, 3,20,20,L0|L1}, {LTI_MKL_xx, 3,20,20,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xC0 - 0xDF */
- {ADI_PA_xx, 3,23,23,L0|L1}, {ADI_PB_xx, 3,23,23,L0|L1},
- {ADI_PC_xx, 3,23,23,L0|L1}, {ADI_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {ONI_PA_xx, 3,20,20,L0|L1}, {ONI_PB_xx, 3,20,20,L0|L1},
- {ONI_PC_xx, 3,20,20,L0|L1}, {ONI_MKL_xx, 3,20,20,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {ACI_PA_xx, 3,23,23,L0|L1}, {ACI_PB_xx, 3,23,23,L0|L1},
- {ACI_PC_xx, 3,23,23,L0|L1}, {ACI_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {OFFI_PA_xx, 3,20,20,L0|L1}, {OFFI_PB_xx, 3,20,20,L0|L1},
- {OFFI_PC_xx, 3,20,20,L0|L1}, {OFFI_MKL_xx, 3,20,20,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ADI_PA_xx, 3,23,23,L0|L1}, {ADI_PB_xx, 3,23,23,L0|L1},
+ {ADI_PC_xx, 3,23,23,L0|L1}, {ADI_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ONI_PA_xx, 3,20,20,L0|L1}, {ONI_PB_xx, 3,20,20,L0|L1},
+ {ONI_PC_xx, 3,20,20,L0|L1}, {ONI_MKL_xx, 3,20,20,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {ACI_PA_xx, 3,23,23,L0|L1}, {ACI_PB_xx, 3,23,23,L0|L1},
+ {ACI_PC_xx, 3,23,23,L0|L1}, {ACI_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {OFFI_PA_xx, 3,20,20,L0|L1}, {OFFI_PB_xx, 3,20,20,L0|L1},
+ {OFFI_PC_xx, 3,20,20,L0|L1}, {OFFI_MKL_xx, 3,20,20,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xE0 - 0xFF */
- {SUI_PA_xx, 3,23,23,L0|L1}, {SUI_PB_xx, 3,23,23,L0|L1},
- {SUI_PC_xx, 3,23,23,L0|L1}, {SUI_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {NEI_PA_xx, 3,20,20,L0|L1}, {NEI_PB_xx, 3,20,20,L0|L1},
- {NEI_PC_xx, 3,20,20,L0|L1}, {NEI_MKL_xx, 3,20,20,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {SBI_PA_xx, 3,23,23,L0|L1}, {SBI_PB_xx, 3,23,23,L0|L1},
- {SBI_PC_xx, 3,23,23,L0|L1}, {SBI_MKL_xx, 3,23,23,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {EQI_PA_xx, 3,20,20,L0|L1}, {EQI_PB_xx, 3,20,20,L0|L1},
- {EQI_PC_xx, 3,20,20,L0|L1}, {EQI_MKL_xx, 3,20,20,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
+ {SUI_PA_xx, 3,23,23,L0|L1}, {SUI_PB_xx, 3,23,23,L0|L1},
+ {SUI_PC_xx, 3,23,23,L0|L1}, {SUI_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {NEI_PA_xx, 3,20,20,L0|L1}, {NEI_PB_xx, 3,20,20,L0|L1},
+ {NEI_PC_xx, 3,20,20,L0|L1}, {NEI_MKL_xx, 3,20,20,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {SBI_PA_xx, 3,23,23,L0|L1}, {SBI_PB_xx, 3,23,23,L0|L1},
+ {SBI_PC_xx, 3,23,23,L0|L1}, {SBI_MKL_xx, 3,23,23,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {EQI_PA_xx, 3,20,20,L0|L1}, {EQI_PB_xx, 3,20,20,L0|L1},
+ {EQI_PC_xx, 3,20,20,L0|L1}, {EQI_MKL_xx, 3,20,20,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
};
/* prefix 70 */
static const struct opcode_s op70_78c06[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SSPD_w, 4,28,28,L0|L1}, {LSPD_w, 4,28,28,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SBCD_w, 4,28,28,L0|L1}, {LBCD_w, 4,28,28,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SSPD_w, 4,28,28,L0|L1}, {LSPD_w, 4,28,28,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SBCD_w, 4,28,28,L0|L1}, {LBCD_w, 4,28,28,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SDED_w, 4,28,28,L0|L1}, {LDED_w, 4,28,28,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {SHLD_w, 4,28,28,L0|L1}, {LHLD_w, 4,28,28,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SDED_w, 4,28,28,L0|L1}, {LDED_w, 4,28,28,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {SHLD_w, 4,28,28,L0|L1}, {LHLD_w, 4,28,28,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {MOV_A_w, 4,25,25,L0|L1},
- {MOV_B_w, 4,25,25,L0|L1}, {MOV_C_w, 4,25,25,L0|L1},
- {MOV_D_w, 4,25,25,L0|L1}, {MOV_E_w, 4,25,25,L0|L1},
- {MOV_H_w, 4,25,25,L0|L1}, {MOV_L_w, 4,25,25,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {MOV_w_A, 4,25,25,L0|L1},
- {MOV_w_B, 4,25,25,L0|L1}, {MOV_w_C, 4,25,25,L0|L1},
- {MOV_w_D, 4,25,25,L0|L1}, {MOV_w_E, 4,25,25,L0|L1},
- {MOV_w_H, 4,25,25,L0|L1}, {MOV_w_L, 4,25,25,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {MOV_A_w, 4,25,25,L0|L1},
+ {MOV_B_w, 4,25,25,L0|L1}, {MOV_C_w, 4,25,25,L0|L1},
+ {MOV_D_w, 4,25,25,L0|L1}, {MOV_E_w, 4,25,25,L0|L1},
+ {MOV_H_w, 4,25,25,L0|L1}, {MOV_L_w, 4,25,25,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {MOV_w_A, 4,25,25,L0|L1},
+ {MOV_w_B, 4,25,25,L0|L1}, {MOV_w_C, 4,25,25,L0|L1},
+ {MOV_w_D, 4,25,25,L0|L1}, {MOV_w_E, 4,25,25,L0|L1},
+ {MOV_w_H, 4,25,25,L0|L1}, {MOV_w_L, 4,25,25,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ANAX_B, 2,15,15,L0|L1},
- {ANAX_D, 2,15,15,L0|L1}, {ANAX_H, 2,15,15,L0|L1},
- {ANAX_Dp, 2,15,15,L0|L1}, {ANAX_Hp, 2,15,15,L0|L1},
- {ANAX_Dm, 2,15,15,L0|L1}, {ANAX_Hm, 2,15,15,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {XRAX_B, 2,15,15,L0|L1},
- {XRAX_D, 2,15,15,L0|L1}, {XRAX_H, 2,15,15,L0|L1},
- {XRAX_Dp, 2,15,15,L0|L1}, {XRAX_Hp, 2,15,15,L0|L1},
- {XRAX_Dm, 2,15,15,L0|L1}, {XRAX_Hm, 2,15,15,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ORAX_B, 2,15,15,L0|L1},
- {ORAX_D, 2,15,15,L0|L1}, {ORAX_H, 2,15,15,L0|L1},
- {ORAX_Dp, 2,15,15,L0|L1}, {ORAX_Hp, 2,15,15,L0|L1},
- {ORAX_Dm, 2,15,15,L0|L1}, {ORAX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ANAX_B, 2,15,15,L0|L1},
+ {ANAX_D, 2,15,15,L0|L1}, {ANAX_H, 2,15,15,L0|L1},
+ {ANAX_Dp, 2,15,15,L0|L1}, {ANAX_Hp, 2,15,15,L0|L1},
+ {ANAX_Dm, 2,15,15,L0|L1}, {ANAX_Hm, 2,15,15,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {XRAX_B, 2,15,15,L0|L1},
+ {XRAX_D, 2,15,15,L0|L1}, {XRAX_H, 2,15,15,L0|L1},
+ {XRAX_Dp, 2,15,15,L0|L1}, {XRAX_Hp, 2,15,15,L0|L1},
+ {XRAX_Dm, 2,15,15,L0|L1}, {XRAX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ORAX_B, 2,15,15,L0|L1},
+ {ORAX_D, 2,15,15,L0|L1}, {ORAX_H, 2,15,15,L0|L1},
+ {ORAX_Dp, 2,15,15,L0|L1}, {ORAX_Hp, 2,15,15,L0|L1},
+ {ORAX_Dm, 2,15,15,L0|L1}, {ORAX_Hm, 2,15,15,L0|L1},
/* 0xA0 - 0xBF */
- {illegal2, 2,12,12,L0|L1}, {ADDNCX_B, 2,15,15,L0|L1},
- {ADDNCX_D, 2,15,15,L0|L1}, {ADDNCX_H, 2,15,15,L0|L1},
- {ADDNCX_Dp, 2,15,15,L0|L1}, {ADDNCX_Hp, 2,15,15,L0|L1},
- {ADDNCX_Dm, 2,15,15,L0|L1}, {ADDNCX_Hm, 2,15,15,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {GTAX_B, 2,15,15,L0|L1},
- {GTAX_D, 2,15,15,L0|L1}, {GTAX_H, 2,15,15,L0|L1},
- {GTAX_Dp, 2,15,15,L0|L1}, {GTAX_Hp, 2,15,15,L0|L1},
- {GTAX_Dm, 2,15,15,L0|L1}, {GTAX_Hm, 2,15,15,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SUBNBX_B, 2,15,15,L0|L1},
- {SUBNBX_D, 2,15,15,L0|L1}, {SUBNBX_H, 2,15,15,L0|L1},
- {SUBNBX_Dp, 2,15,15,L0|L1}, {SUBNBX_Hp, 2,15,15,L0|L1},
- {SUBNBX_Dm, 2,15,15,L0|L1}, {SUBNBX_Hm, 2,15,15,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {LTAX_B, 2,15,15,L0|L1},
- {LTAX_D, 2,15,15,L0|L1}, {LTAX_H, 2,15,15,L0|L1},
- {LTAX_Dp, 2,15,15,L0|L1}, {LTAX_Hp, 2,15,15,L0|L1},
- {LTAX_Dm, 2,15,15,L0|L1}, {LTAX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADDNCX_B, 2,15,15,L0|L1},
+ {ADDNCX_D, 2,15,15,L0|L1}, {ADDNCX_H, 2,15,15,L0|L1},
+ {ADDNCX_Dp, 2,15,15,L0|L1}, {ADDNCX_Hp, 2,15,15,L0|L1},
+ {ADDNCX_Dm, 2,15,15,L0|L1}, {ADDNCX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {GTAX_B, 2,15,15,L0|L1},
+ {GTAX_D, 2,15,15,L0|L1}, {GTAX_H, 2,15,15,L0|L1},
+ {GTAX_Dp, 2,15,15,L0|L1}, {GTAX_Hp, 2,15,15,L0|L1},
+ {GTAX_Dm, 2,15,15,L0|L1}, {GTAX_Hm, 2,15,15,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SUBNBX_B, 2,15,15,L0|L1},
+ {SUBNBX_D, 2,15,15,L0|L1}, {SUBNBX_H, 2,15,15,L0|L1},
+ {SUBNBX_Dp, 2,15,15,L0|L1}, {SUBNBX_Hp, 2,15,15,L0|L1},
+ {SUBNBX_Dm, 2,15,15,L0|L1}, {SUBNBX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {LTAX_B, 2,15,15,L0|L1},
+ {LTAX_D, 2,15,15,L0|L1}, {LTAX_H, 2,15,15,L0|L1},
+ {LTAX_Dp, 2,15,15,L0|L1}, {LTAX_Hp, 2,15,15,L0|L1},
+ {LTAX_Dm, 2,15,15,L0|L1}, {LTAX_Hm, 2,15,15,L0|L1},
/* 0xC0 - 0xDF */
- {illegal2, 2,12,12,L0|L1}, {ADDX_B, 2,15,15,L0|L1},
- {ADDX_D, 2,15,15,L0|L1}, {ADDX_H, 2,15,15,L0|L1},
- {ADDX_Dp, 2,15,15,L0|L1}, {ADDX_Hp, 2,15,15,L0|L1},
- {ADDX_Dm, 2,15,15,L0|L1}, {ADDX_Hm, 2,15,15,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {ONAX_B, 2,15,15,L0|L1},
- {ONAX_D, 2,15,15,L0|L1}, {ONAX_H, 2,15,15,L0|L1},
- {ONAX_Dp, 2,15,15,L0|L1}, {ONAX_Hp, 2,15,15,L0|L1},
- {ONAX_Dm, 2,15,15,L0|L1}, {ONAX_Hm, 2,15,15,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {ADCX_B, 2,15,15,L0|L1},
- {ADCX_D, 2,15,15,L0|L1}, {ADCX_H, 2,15,15,L0|L1},
- {ADCX_Dp, 2,15,15,L0|L1}, {ADCX_Hp, 2,15,15,L0|L1},
- {ADCX_Dm, 2,15,15,L0|L1}, {ADCX_Hm, 2,15,15,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {OFFAX_B, 2,15,15,L0|L1},
- {OFFAX_D, 2,15,15,L0|L1}, {OFFAX_H, 2,15,15,L0|L1},
- {OFFAX_Dp, 2,15,15,L0|L1}, {OFFAX_Hp, 2,15,15,L0|L1},
- {OFFAX_Dm, 2,15,15,L0|L1}, {OFFAX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ADDX_B, 2,15,15,L0|L1},
+ {ADDX_D, 2,15,15,L0|L1}, {ADDX_H, 2,15,15,L0|L1},
+ {ADDX_Dp, 2,15,15,L0|L1}, {ADDX_Hp, 2,15,15,L0|L1},
+ {ADDX_Dm, 2,15,15,L0|L1}, {ADDX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {ONAX_B, 2,15,15,L0|L1},
+ {ONAX_D, 2,15,15,L0|L1}, {ONAX_H, 2,15,15,L0|L1},
+ {ONAX_Dp, 2,15,15,L0|L1}, {ONAX_Hp, 2,15,15,L0|L1},
+ {ONAX_Dm, 2,15,15,L0|L1}, {ONAX_Hm, 2,15,15,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {ADCX_B, 2,15,15,L0|L1},
+ {ADCX_D, 2,15,15,L0|L1}, {ADCX_H, 2,15,15,L0|L1},
+ {ADCX_Dp, 2,15,15,L0|L1}, {ADCX_Hp, 2,15,15,L0|L1},
+ {ADCX_Dm, 2,15,15,L0|L1}, {ADCX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {OFFAX_B, 2,15,15,L0|L1},
+ {OFFAX_D, 2,15,15,L0|L1}, {OFFAX_H, 2,15,15,L0|L1},
+ {OFFAX_Dp, 2,15,15,L0|L1}, {OFFAX_Hp, 2,15,15,L0|L1},
+ {OFFAX_Dm, 2,15,15,L0|L1}, {OFFAX_Hm, 2,15,15,L0|L1},
/* 0xE0 - 0xFF */
- {illegal2, 2,12,12,L0|L1}, {SUBX_B, 2,15,15,L0|L1},
- {SUBX_D, 2,15,15,L0|L1}, {SUBX_H, 2,15,15,L0|L1},
- {SUBX_Dp, 2,15,15,L0|L1}, {SUBX_Hp, 2,15,15,L0|L1},
- {SUBX_Dm, 2,15,15,L0|L1}, {SUBX_Hm, 2,15,15,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {NEAX_B, 2,15,15,L0|L1},
- {NEAX_D, 2,15,15,L0|L1}, {NEAX_H, 2,15,15,L0|L1},
- {NEAX_Dp, 2,15,15,L0|L1}, {NEAX_Hp, 2,15,15,L0|L1},
- {NEAX_Dm, 2,15,15,L0|L1}, {NEAX_Hm, 2,15,15,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {SBBX_B, 2,15,15,L0|L1},
- {SBBX_D, 2,15,15,L0|L1}, {SBBX_H, 2,15,15,L0|L1},
- {SBBX_Dp, 2,15,15,L0|L1}, {SBBX_Hp, 2,15,15,L0|L1},
- {SBBX_Dm, 2,15,15,L0|L1}, {SBBX_Hm, 2,15,15,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {EQAX_B, 2,15,15,L0|L1},
- {EQAX_D, 2,15,15,L0|L1}, {EQAX_H, 2,15,15,L0|L1},
- {EQAX_Dp, 2,15,15,L0|L1}, {EQAX_Hp, 2,15,15,L0|L1},
- {EQAX_Dm, 2,15,15,L0|L1}, {EQAX_Hm, 2,15,15,L0|L1}
+ {illegal2, 2,12,12,L0|L1}, {SUBX_B, 2,15,15,L0|L1},
+ {SUBX_D, 2,15,15,L0|L1}, {SUBX_H, 2,15,15,L0|L1},
+ {SUBX_Dp, 2,15,15,L0|L1}, {SUBX_Hp, 2,15,15,L0|L1},
+ {SUBX_Dm, 2,15,15,L0|L1}, {SUBX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {NEAX_B, 2,15,15,L0|L1},
+ {NEAX_D, 2,15,15,L0|L1}, {NEAX_H, 2,15,15,L0|L1},
+ {NEAX_Dp, 2,15,15,L0|L1}, {NEAX_Hp, 2,15,15,L0|L1},
+ {NEAX_Dm, 2,15,15,L0|L1}, {NEAX_Hm, 2,15,15,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {SBBX_B, 2,15,15,L0|L1},
+ {SBBX_D, 2,15,15,L0|L1}, {SBBX_H, 2,15,15,L0|L1},
+ {SBBX_Dp, 2,15,15,L0|L1}, {SBBX_Hp, 2,15,15,L0|L1},
+ {SBBX_Dm, 2,15,15,L0|L1}, {SBBX_Hm, 2,15,15,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {EQAX_B, 2,15,15,L0|L1},
+ {EQAX_D, 2,15,15,L0|L1}, {EQAX_H, 2,15,15,L0|L1},
+ {EQAX_Dp, 2,15,15,L0|L1}, {EQAX_Hp, 2,15,15,L0|L1},
+ {EQAX_Dm, 2,15,15,L0|L1}, {EQAX_Hm, 2,15,15,L0|L1}
};
/* prefix 74 */
static const struct opcode_s op74_78c06[256] =
{
/* 0x00 - 0x1F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x20 - 0x3F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x40 - 0x5F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x60 - 0x7F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0x80 - 0x9F */
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {ANAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {XRAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {ORAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ANAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {XRAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ORAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xA0 - 0xBF */
- {ADDNCW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {GTAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {SUBNBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {LTAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ADDNCW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {GTAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {SUBNBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {LTAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xC0 - 0xDF */
- {ADDW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {ONAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {ADCW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {OFFAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ADDW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {ONAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {ADCW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {OFFAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
/* 0xE0 - 0xFF */
- {SUBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {NEAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
-
- {SBBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {EQAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
- {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
+ {SUBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {NEAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+
+ {SBBW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {EQAW_wa, 3,14,14,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1},
+ {illegal2, 2,12,12,L0|L1}, {illegal2, 2,12,12,L0|L1}
};
static const struct opcode_s opXX_78c06[256] =
{
/* 0x00 - 0x1F */
- {NOP, 1, 6, 6,L0|L1}, {HALT, 1, 6, 6,L0|L1},
- {INX_SP, 1, 9, 9,L0|L1}, {DCX_SP, 1, 9, 9,L0|L1},
- {LXI_S_w, 3,16,16,L0|L1}, {ANIW_wa_xx, 3,22,22,L0|L1},
- {illegal, 1, 6, 6,L0|L1}, {ANI_A_xx, 2,11,11,L0|L1},
- {RET, 1,12,12,L0|L1}, {SIO, 1, 6, 6,L0|L1},
- {MOV_A_B, 1, 6, 6,L0|L1}, {MOV_A_C, 1, 6, 6,L0|L1},
- {MOV_A_D, 1, 6, 6,L0|L1}, {MOV_A_E, 1, 6, 6,L0|L1},
- {MOV_A_H, 1, 6, 6,L0|L1}, {MOV_A_L, 1, 6, 6,L0|L1},
-
- {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
- {INX_BC, 1, 9, 9,L0|L1}, {DCX_BC, 1, 9, 9,L0|L1},
- {LXI_B_w, 3,16,16,L0|L1}, {ORIW_wa_xx, 3,22,2,L0|L1},
- {XRI_A_xx, 2,11,11,L0|L1}, {ORI_A_xx, 2,11,11,L0|L1},
- {RETS, 1,12,12,L0|L1}, {STM, 1, 6, 6,L0|L1},
- {MOV_B_A, 1, 6, 6,L0|L1}, {MOV_C_A, 1, 6, 6,L0|L1},
- {MOV_D_A, 1, 6, 6,L0|L1}, {MOV_E_A, 1, 6, 6,L0|L1},
- {MOV_H_A, 1, 6, 6,L0|L1}, {MOV_L_A, 1, 6, 6,L0|L1},
+ {NOP, 1, 6, 6,L0|L1}, {HALT, 1, 6, 6,L0|L1},
+ {INX_SP, 1, 9, 9,L0|L1}, {DCX_SP, 1, 9, 9,L0|L1},
+ {LXI_S_w, 3,16,16,L0|L1}, {ANIW_wa_xx, 3,22,22,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {ANI_A_xx, 2,11,11,L0|L1},
+ {RET, 1,12,12,L0|L1}, {SIO, 1, 6, 6,L0|L1},
+ {MOV_A_B, 1, 6, 6,L0|L1}, {MOV_A_C, 1, 6, 6,L0|L1},
+ {MOV_A_D, 1, 6, 6,L0|L1}, {MOV_A_E, 1, 6, 6,L0|L1},
+ {MOV_A_H, 1, 6, 6,L0|L1}, {MOV_A_L, 1, 6, 6,L0|L1},
+
+ {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
+ {INX_BC, 1, 9, 9,L0|L1}, {DCX_BC, 1, 9, 9,L0|L1},
+ {LXI_B_w, 3,16,16,L0|L1}, {ORIW_wa_xx, 3,22,2,L0|L1},
+ {XRI_A_xx, 2,11,11,L0|L1}, {ORI_A_xx, 2,11,11,L0|L1},
+ {RETS, 1,12,12,L0|L1}, {STM, 1, 6, 6,L0|L1},
+ {MOV_B_A, 1, 6, 6,L0|L1}, {MOV_C_A, 1, 6, 6,L0|L1},
+ {MOV_D_A, 1, 6, 6,L0|L1}, {MOV_E_A, 1, 6, 6,L0|L1},
+ {MOV_H_A, 1, 6, 6,L0|L1}, {MOV_L_A, 1, 6, 6,L0|L1},
/* 0x20 - 0x3F */
- {INRW_wa_7801, 2,17,17,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {INX_DE, 1, 9, 9,L0|L1}, {DCX_DE, 1, 9, 9,L0|L1},
- {LXI_D_w, 3,16,16,L0|L1}, {GTIW_wa_xx, 3,19,19,L0|L1},
- {ADINC_A_xx, 2,11,11,L0|L1}, {GTI_A_xx, 2,11,11,L0|L1},
- {LDAW_wa, 2,14,14,L0|L1}, {LDAX_B, 1, 9, 9,L0|L1},
- {LDAX_D, 1, 9, 9,L0|L1}, {LDAX_H, 1, 9, 9,L0|L1},
- {LDAX_Dp, 1, 9, 9,L0|L1}, {LDAX_Hp, 1, 9, 9,L0|L1},
- {LDAX_Dm, 1, 9, 9,L0|L1}, {LDAX_Hm, 1, 9, 9,L0|L1},
-
- {DCRW_wa_7801, 2,17,17,L0|L1}, {illegal, 1, 4, 4,L0|L1},
- {INX_HL, 1, 9, 9,L0|L1}, {DCX_HL, 1, 9, 9,L0|L1},
- {LXI_H_w, 3,16,16, L1}, {LTIW_wa_xx, 3,19,19,L0|L1},
- {SUINB_A_xx, 2,11,11,L0|L1}, {LTI_A_xx, 2,11,11,L0|L1},
- {STAW_wa, 2,14,14,L0|L1}, {STAX_B, 1, 9, 9,L0|L1},
- {STAX_D, 1, 9, 9,L0|L1}, {STAX_H, 1, 9, 9,L0|L1},
- {STAX_Dp, 1, 9, 9,L0|L1}, {STAX_Hp, 1, 9, 9,L0|L1},
- {STAX_Dm, 1, 9, 9,L0|L1}, {STAX_Hm, 1, 9, 9,L0|L1},
+ {INRW_wa_7801, 2,17,17,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {INX_DE, 1, 9, 9,L0|L1}, {DCX_DE, 1, 9, 9,L0|L1},
+ {LXI_D_w, 3,16,16,L0|L1}, {GTIW_wa_xx, 3,19,19,L0|L1},
+ {ADINC_A_xx, 2,11,11,L0|L1}, {GTI_A_xx, 2,11,11,L0|L1},
+ {LDAW_wa, 2,14,14,L0|L1}, {LDAX_B, 1, 9, 9,L0|L1},
+ {LDAX_D, 1, 9, 9,L0|L1}, {LDAX_H, 1, 9, 9,L0|L1},
+ {LDAX_Dp, 1, 9, 9,L0|L1}, {LDAX_Hp, 1, 9, 9,L0|L1},
+ {LDAX_Dm, 1, 9, 9,L0|L1}, {LDAX_Hm, 1, 9, 9,L0|L1},
+
+ {DCRW_wa_7801, 2,17,17,L0|L1}, {illegal, 1, 4, 4,L0|L1},
+ {INX_HL, 1, 9, 9,L0|L1}, {DCX_HL, 1, 9, 9,L0|L1},
+ {LXI_H_w, 3,16,16, L1}, {LTIW_wa_xx, 3,19,19,L0|L1},
+ {SUINB_A_xx, 2,11,11,L0|L1}, {LTI_A_xx, 2,11,11,L0|L1},
+ {STAW_wa, 2,14,14,L0|L1}, {STAX_B, 1, 9, 9,L0|L1},
+ {STAX_D, 1, 9, 9,L0|L1}, {STAX_H, 1, 9, 9,L0|L1},
+ {STAX_Dp, 1, 9, 9,L0|L1}, {STAX_Hp, 1, 9, 9,L0|L1},
+ {STAX_Dm, 1, 9, 9,L0|L1}, {STAX_Hm, 1, 9, 9,L0|L1},
/* 0x40 - 0x5F */
- {illegal, 1, 6, 6,L0|L1}, {INR_A_7801, 1, 6, 6,L0|L1},
- {INR_B_7801, 1, 6, 6,L0|L1}, {INR_C_7801, 1, 6, 6,L0|L1},
- {CALL_w, 3,22,22,L0|L1}, {ONIW_wa_xx, 3,19,19,L0|L1},
- {ADI_A_xx, 2,11,11,L0|L1}, {ONI_A_xx, 2,11,11,L0|L1},
- {PRE_48, 1, 0, 0,L0|L1}, {illegal, 1, 6, 6,L0|L1},
- {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
- {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1},
- {JRE, 2,17,17,L0|L1}, {JRE, 2,17,17,L0|L1},
-
- {illegal, 1, 6, 6,L0|L1}, {DCR_A_7801, 1, 6, 6,L0|L1},
- {DCR_B_7801, 1, 6, 6,L0|L1}, {DCR_C_7801, 1, 6, 6,L0|L1},
- {JMP_w, 3,16,16,L0|L1}, {OFFIW_wa_xx, 3,19,19,L0|L1},
- {ACI_A_xx, 2,11,11,L0|L1}, {OFFI_A_xx, 2,11,11,L0|L1},
- {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
- {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
- {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
- {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {INR_A_7801, 1, 6, 6,L0|L1},
+ {INR_B_7801, 1, 6, 6,L0|L1}, {INR_C_7801, 1, 6, 6,L0|L1},
+ {CALL_w, 3,22,22,L0|L1}, {ONIW_wa_xx, 3,19,19,L0|L1},
+ {ADI_A_xx, 2,11,11,L0|L1}, {ONI_A_xx, 2,11,11,L0|L1},
+ {PRE_48, 1, 0, 0,L0|L1}, {illegal, 1, 6, 6,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
+ {PRE_4C, 1, 0, 0,L0|L1}, {PRE_4D, 1, 0, 0,L0|L1},
+ {JRE, 2,17,17,L0|L1}, {JRE, 2,17,17,L0|L1},
+
+ {illegal, 1, 6, 6,L0|L1}, {DCR_A_7801, 1, 6, 6,L0|L1},
+ {DCR_B_7801, 1, 6, 6,L0|L1}, {DCR_C_7801, 1, 6, 6,L0|L1},
+ {JMP_w, 3,16,16,L0|L1}, {OFFIW_wa_xx, 3,19,19,L0|L1},
+ {ACI_A_xx, 2,11,11,L0|L1}, {OFFI_A_xx, 2,11,11,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {illegal, 1, 6, 6,L0|L1},
/* 0x60 - 0x7F */
- {PRE_60, 1, 0, 0,L0|L1}, {DAA, 1, 6, 6,L0|L1},
- {RETI, 1,15,15,L0|L1}, {CALB, 2,13,13,L0|L1},
- {PRE_64, 1, 0, 0,L0|L1}, {NEIW_wa_xx, 3,19,19,L0|L1},
- {SUI_A_xx, 2,11,11,L0|L1}, {NEI_A_xx, 2,11,11,L0|L1},
- {illegal, 1, 6, 6,L0|L1}, {MVI_A_xx, 2,11,11,L0 },
- {MVI_B_xx, 2,11,11,L0|L1}, {MVI_C_xx, 2,11,11,L0|L1},
- {MVI_D_xx, 2,11,11,L0|L1}, {MVI_E_xx, 2,11,11,L0|L1},
- {MVI_H_xx, 2,11,11,L0|L1}, {MVI_L_xx, 2,11,11, L1},
-
- {PRE_70, 1, 0, 0,L0|L1}, {MVIW_wa_xx, 3,13,13,L0|L1},
- {SOFTI, 1,19,19,L0|L1}, {JB, 1, 6, 6,L0|L1},
- {PRE_74, 1, 0, 0,L0|L1}, {EQIW_wa_xx, 3,19,19,L0|L1},
- {SBI_A_xx, 2,11,11,L0|L1}, {EQI_A_xx, 2,11,11,L0|L1},
- {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
- {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
- {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
- {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
+ {PRE_60, 1, 0, 0,L0|L1}, {DAA, 1, 6, 6,L0|L1},
+ {RETI, 1,15,15,L0|L1}, {CALB, 2,13,13,L0|L1},
+ {PRE_64, 1, 0, 0,L0|L1}, {NEIW_wa_xx, 3,19,19,L0|L1},
+ {SUI_A_xx, 2,11,11,L0|L1}, {NEI_A_xx, 2,11,11,L0|L1},
+ {illegal, 1, 6, 6,L0|L1}, {MVI_A_xx, 2,11,11,L0 },
+ {MVI_B_xx, 2,11,11,L0|L1}, {MVI_C_xx, 2,11,11,L0|L1},
+ {MVI_D_xx, 2,11,11,L0|L1}, {MVI_E_xx, 2,11,11,L0|L1},
+ {MVI_H_xx, 2,11,11,L0|L1}, {MVI_L_xx, 2,11,11, L1},
+
+ {PRE_70, 1, 0, 0,L0|L1}, {MVIW_wa_xx, 3,13,13,L0|L1},
+ {SOFTI, 1,19,19,L0|L1}, {JB, 1, 6, 6,L0|L1},
+ {PRE_74, 1, 0, 0,L0|L1}, {EQIW_wa_xx, 3,19,19,L0|L1},
+ {SBI_A_xx, 2,11,11,L0|L1}, {EQI_A_xx, 2,11,11,L0|L1},
+ {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
+ {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
+ {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
+ {CALF, 2,17,17,L0|L1}, {CALF, 2,17,17,L0|L1},
/* 0x80 - 0x9F */
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
-
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
/* 0xA0 - 0xBF */
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
-
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
- {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
+ {CALT_7801, 1,19,19,L0|L1}, {CALT_7801, 1,19,19,L0|L1},
/* 0xC0 - 0xDF */
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
-
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
/* 0xE0 - 0xFF */
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
-
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
- {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1}
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1},
+ {JR, 1,12,12,L0|L1}, {JR, 1,12,12,L0|L1}
};
diff --git a/src/emu/cpu/upd7810/upd7810.c b/src/emu/cpu/upd7810/upd7810.c
index cc563879bc6..014e62fba9f 100644
--- a/src/emu/cpu/upd7810/upd7810.c
+++ b/src/emu/cpu/upd7810/upd7810.c
@@ -410,84 +410,84 @@ STOP 01001000 10111011 12 stop
struct upd7810_state
{
- PAIR ppc; /* previous program counter */
- PAIR pc; /* program counter */
- PAIR sp; /* stack pointer */
- UINT8 op; /* opcode */
- UINT8 op2; /* opcode part 2 */
- UINT8 iff; /* interrupt enable flip flop */
- UINT8 psw; /* processor status word */
- PAIR ea; /* extended accumulator */
- PAIR va; /* accumulator + vector register */
- PAIR bc; /* 8bit B and C registers / 16bit BC register */
- PAIR de; /* 8bit D and E registers / 16bit DE register */
- PAIR hl; /* 8bit H and L registers / 16bit HL register */
- PAIR ea2; /* alternate register set */
- PAIR va2;
- PAIR bc2;
- PAIR de2;
- PAIR hl2;
- PAIR cnt; /* 8 bit timer counter */
- PAIR tm; /* 8 bit timer 0/1 comparator inputs */
- PAIR ecnt; /* timer counter register / capture register */
- PAIR etm; /* timer 0/1 comparator inputs */
- UINT8 ma; /* port A input or output mask */
- UINT8 mb; /* port B input or output mask */
- UINT8 mcc; /* port C control/port select */
- UINT8 mc; /* port C input or output mask */
- UINT8 mm; /* memory mapping */
- UINT8 mf; /* port F input or output mask */
- UINT8 tmm; /* timer 0 and timer 1 operating parameters */
- UINT8 etmm; /* 16-bit multifunction timer/event counter */
- UINT8 eom; /* 16-bit timer/event counter output control */
- UINT8 sml; /* serial interface parameters low */
- UINT8 smh; /* -"- high */
- UINT8 anm; /* analog to digital converter operating parameters */
- UINT8 mkl; /* interrupt mask low */
- UINT8 mkh; /* -"- high */
- UINT8 zcm; /* bias circuitry for ac zero-cross detection */
- UINT8 pa_in; /* port A,B,C,D,F inputs */
- UINT8 pb_in;
- UINT8 pc_in;
- UINT8 pd_in;
- UINT8 pf_in;
- UINT8 pa_out; /* port A,B,C,D,F outputs */
- UINT8 pb_out;
- UINT8 pc_out;
- UINT8 pd_out;
- UINT8 pf_out;
- UINT8 cr0; /* analog digital conversion register 0 */
- UINT8 cr1; /* analog digital conversion register 1 */
- UINT8 cr2; /* analog digital conversion register 2 */
- UINT8 cr3; /* analog digital conversion register 3 */
- UINT8 txb; /* transmitter buffer */
- UINT8 rxb; /* receiver buffer */
- UINT8 txd; /* port C control line states */
- UINT8 rxd;
- UINT8 sck;
- UINT8 ti;
- UINT8 to;
- UINT8 ci;
- UINT8 co0;
- UINT8 co1;
- UINT16 irr; /* interrupt request register */
- UINT16 itf; /* interrupt test flag register */
- int int1; /* keep track of current int1 state. Needed for 7801 irq checking. */
- int int2; /* keep track to current int2 state. Needed for 7801 irq checking. */
+ PAIR ppc; /* previous program counter */
+ PAIR pc; /* program counter */
+ PAIR sp; /* stack pointer */
+ UINT8 op; /* opcode */
+ UINT8 op2; /* opcode part 2 */
+ UINT8 iff; /* interrupt enable flip flop */
+ UINT8 psw; /* processor status word */
+ PAIR ea; /* extended accumulator */
+ PAIR va; /* accumulator + vector register */
+ PAIR bc; /* 8bit B and C registers / 16bit BC register */
+ PAIR de; /* 8bit D and E registers / 16bit DE register */
+ PAIR hl; /* 8bit H and L registers / 16bit HL register */
+ PAIR ea2; /* alternate register set */
+ PAIR va2;
+ PAIR bc2;
+ PAIR de2;
+ PAIR hl2;
+ PAIR cnt; /* 8 bit timer counter */
+ PAIR tm; /* 8 bit timer 0/1 comparator inputs */
+ PAIR ecnt; /* timer counter register / capture register */
+ PAIR etm; /* timer 0/1 comparator inputs */
+ UINT8 ma; /* port A input or output mask */
+ UINT8 mb; /* port B input or output mask */
+ UINT8 mcc; /* port C control/port select */
+ UINT8 mc; /* port C input or output mask */
+ UINT8 mm; /* memory mapping */
+ UINT8 mf; /* port F input or output mask */
+ UINT8 tmm; /* timer 0 and timer 1 operating parameters */
+ UINT8 etmm; /* 16-bit multifunction timer/event counter */
+ UINT8 eom; /* 16-bit timer/event counter output control */
+ UINT8 sml; /* serial interface parameters low */
+ UINT8 smh; /* -"- high */
+ UINT8 anm; /* analog to digital converter operating parameters */
+ UINT8 mkl; /* interrupt mask low */
+ UINT8 mkh; /* -"- high */
+ UINT8 zcm; /* bias circuitry for ac zero-cross detection */
+ UINT8 pa_in; /* port A,B,C,D,F inputs */
+ UINT8 pb_in;
+ UINT8 pc_in;
+ UINT8 pd_in;
+ UINT8 pf_in;
+ UINT8 pa_out; /* port A,B,C,D,F outputs */
+ UINT8 pb_out;
+ UINT8 pc_out;
+ UINT8 pd_out;
+ UINT8 pf_out;
+ UINT8 cr0; /* analog digital conversion register 0 */
+ UINT8 cr1; /* analog digital conversion register 1 */
+ UINT8 cr2; /* analog digital conversion register 2 */
+ UINT8 cr3; /* analog digital conversion register 3 */
+ UINT8 txb; /* transmitter buffer */
+ UINT8 rxb; /* receiver buffer */
+ UINT8 txd; /* port C control line states */
+ UINT8 rxd;
+ UINT8 sck;
+ UINT8 ti;
+ UINT8 to;
+ UINT8 ci;
+ UINT8 co0;
+ UINT8 co1;
+ UINT16 irr; /* interrupt request register */
+ UINT16 itf; /* interrupt test flag register */
+ int int1; /* keep track of current int1 state. Needed for 7801 irq checking. */
+ int int2; /* keep track to current int2 state. Needed for 7801 irq checking. */
/* internal helper variables */
- UINT16 txs; /* transmitter shift register */
- UINT16 rxs; /* receiver shift register */
- UINT8 txcnt; /* transmitter shift register bit count */
- UINT8 rxcnt; /* receiver shift register bit count */
- UINT8 txbuf; /* transmitter buffer was written */
- INT32 ovc0; /* overflow counter for timer 0 (for clock div 12/384) */
- INT32 ovc1; /* overflow counter for timer 0 (for clock div 12/384) */
- INT32 ovce; /* overflow counter for ecnt */
- INT32 ovcf; /* overflow counter for fixed clock div 3 mode */
- INT32 ovcs; /* overflow counter for serial I/O */
- UINT8 edges; /* rising/falling edge flag for serial I/O */
- const struct opcode_s *opXX; /* opcode table */
+ UINT16 txs; /* transmitter shift register */
+ UINT16 rxs; /* receiver shift register */
+ UINT8 txcnt; /* transmitter shift register bit count */
+ UINT8 rxcnt; /* receiver shift register bit count */
+ UINT8 txbuf; /* transmitter buffer was written */
+ INT32 ovc0; /* overflow counter for timer 0 (for clock div 12/384) */
+ INT32 ovc1; /* overflow counter for timer 0 (for clock div 12/384) */
+ INT32 ovce; /* overflow counter for ecnt */
+ INT32 ovcf; /* overflow counter for fixed clock div 3 mode */
+ INT32 ovcs; /* overflow counter for serial I/O */
+ UINT8 edges; /* rising/falling edge flag for serial I/O */
+ const struct opcode_s *opXX; /* opcode table */
const struct opcode_s *op48;
const struct opcode_s *op4C;
const struct opcode_s *op4D;
@@ -509,130 +509,130 @@ INLINE upd7810_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == UPD7810 ||
- device->type() == UPD7807 ||
- device->type() == UPD7801 ||
- device->type() == UPD78C05 ||
- device->type() == UPD78C06);
+ device->type() == UPD7807 ||
+ device->type() == UPD7801 ||
+ device->type() == UPD78C05 ||
+ device->type() == UPD78C06);
return (upd7810_state *)downcast<legacy_cpu_device *>(device)->token();
}
-#define CY 0x01
-#define F1 0x02
-#define L0 0x04
-#define L1 0x08
-#define HC 0x10
-#define SK 0x20
-#define Z 0x40
-#define F7 0x80
+#define CY 0x01
+#define F1 0x02
+#define L0 0x04
+#define L1 0x08
+#define HC 0x10
+#define SK 0x20
+#define Z 0x40
+#define F7 0x80
/* IRR flags */
-#define INTNMI 0x0001
-#define INTFT0 0x0002
-#define INTFT1 0x0004
-#define INTF1 0x0008
-#define INTF2 0x0010
-#define INTFE0 0x0020
-#define INTFE1 0x0040
+#define INTNMI 0x0001
+#define INTFT0 0x0002
+#define INTFT1 0x0004
+#define INTF1 0x0008
+#define INTF2 0x0010
+#define INTFE0 0x0020
+#define INTFE1 0x0040
#define INTFEIN 0x0080
-#define INTFAD 0x0100
-#define INTFSR 0x0200
-#define INTFST 0x0400
-#define INTER 0x0800
-#define INTOV 0x1000
-#define INTF0 0x2000
+#define INTFAD 0x0100
+#define INTFSR 0x0200
+#define INTFST 0x0400
+#define INTER 0x0800
+#define INTOV 0x1000
+#define INTF0 0x2000
/* ITF flags */
-#define INTAN4 0x0001
-#define INTAN5 0x0002
-#define INTAN6 0x0004
-#define INTAN7 0x0008
-#define INTSB 0x0010
-
-#define PPC cpustate->ppc.w.l
-#define PC cpustate->pc.w.l
-#define PCL cpustate->pc.b.l
-#define PCH cpustate->pc.b.h
-#define PCD cpustate->pc.d
-#define SP cpustate->sp.w.l
-#define SPL cpustate->sp.b.l
-#define SPH cpustate->sp.b.h
-#define SPD cpustate->sp.d
-#define PSW cpustate->psw
-#define OP cpustate->op
-#define OP2 cpustate->op2
-#define IFF cpustate->iff
-#define EA cpustate->ea.w.l
-#define EAL cpustate->ea.b.l
-#define EAH cpustate->ea.b.h
-#define VA cpustate->va.w.l
-#define V cpustate->va.b.h
-#define A cpustate->va.b.l
-#define VAD cpustate->va.d
-#define BC cpustate->bc.w.l
-#define B cpustate->bc.b.h
-#define C cpustate->bc.b.l
-#define DE cpustate->de.w.l
-#define D cpustate->de.b.h
-#define E cpustate->de.b.l
-#define HL cpustate->hl.w.l
-#define H cpustate->hl.b.h
-#define L cpustate->hl.b.l
-#define EA2 cpustate->ea2.w.l
-#define VA2 cpustate->va2.w.l
-#define BC2 cpustate->bc2.w.l
-#define DE2 cpustate->de2.w.l
-#define HL2 cpustate->hl2.w.l
-
-#define OVC0 cpustate->ovc0
-#define OVC1 cpustate->ovc1
-#define OVCE cpustate->ovce
-#define OVCF cpustate->ovcf
-#define OVCS cpustate->ovcs
-#define EDGES cpustate->edges
-
-#define CNT0 cpustate->cnt.b.l
-#define CNT1 cpustate->cnt.b.h
-#define TM0 cpustate->tm.b.l
-#define TM1 cpustate->tm.b.h
-#define ECNT cpustate->ecnt.w.l
-#define ECPT cpustate->ecnt.w.h
-#define ETM0 cpustate->etm.w.l
-#define ETM1 cpustate->etm.w.h
-
-#define MA cpustate->ma
-#define MB cpustate->mb
-#define MCC cpustate->mcc
-#define MC cpustate->mc
-#define MM cpustate->mm
-#define MF cpustate->mf
-#define TMM cpustate->tmm
-#define ETMM cpustate->etmm
-#define EOM cpustate->eom
-#define SML cpustate->sml
-#define SMH cpustate->smh
-#define ANM cpustate->anm
-#define MKL cpustate->mkl
-#define MKH cpustate->mkh
-#define ZCM cpustate->zcm
-
-#define CR0 cpustate->cr0
-#define CR1 cpustate->cr1
-#define CR2 cpustate->cr2
-#define CR3 cpustate->cr3
-#define RXB cpustate->rxb
-#define TXB cpustate->txb
-
-#define RXD cpustate->rxd
-#define TXD cpustate->txd
-#define SCK cpustate->sck
-#define TI cpustate->ti
-#define TO cpustate->to
-#define CI cpustate->ci
-#define CO0 cpustate->co0
-#define CO1 cpustate->co1
-
-#define IRR cpustate->irr
-#define ITF cpustate->itf
+#define INTAN4 0x0001
+#define INTAN5 0x0002
+#define INTAN6 0x0004
+#define INTAN7 0x0008
+#define INTSB 0x0010
+
+#define PPC cpustate->ppc.w.l
+#define PC cpustate->pc.w.l
+#define PCL cpustate->pc.b.l
+#define PCH cpustate->pc.b.h
+#define PCD cpustate->pc.d
+#define SP cpustate->sp.w.l
+#define SPL cpustate->sp.b.l
+#define SPH cpustate->sp.b.h
+#define SPD cpustate->sp.d
+#define PSW cpustate->psw
+#define OP cpustate->op
+#define OP2 cpustate->op2
+#define IFF cpustate->iff
+#define EA cpustate->ea.w.l
+#define EAL cpustate->ea.b.l
+#define EAH cpustate->ea.b.h
+#define VA cpustate->va.w.l
+#define V cpustate->va.b.h
+#define A cpustate->va.b.l
+#define VAD cpustate->va.d
+#define BC cpustate->bc.w.l
+#define B cpustate->bc.b.h
+#define C cpustate->bc.b.l
+#define DE cpustate->de.w.l
+#define D cpustate->de.b.h
+#define E cpustate->de.b.l
+#define HL cpustate->hl.w.l
+#define H cpustate->hl.b.h
+#define L cpustate->hl.b.l
+#define EA2 cpustate->ea2.w.l
+#define VA2 cpustate->va2.w.l
+#define BC2 cpustate->bc2.w.l
+#define DE2 cpustate->de2.w.l
+#define HL2 cpustate->hl2.w.l
+
+#define OVC0 cpustate->ovc0
+#define OVC1 cpustate->ovc1
+#define OVCE cpustate->ovce
+#define OVCF cpustate->ovcf
+#define OVCS cpustate->ovcs
+#define EDGES cpustate->edges
+
+#define CNT0 cpustate->cnt.b.l
+#define CNT1 cpustate->cnt.b.h
+#define TM0 cpustate->tm.b.l
+#define TM1 cpustate->tm.b.h
+#define ECNT cpustate->ecnt.w.l
+#define ECPT cpustate->ecnt.w.h
+#define ETM0 cpustate->etm.w.l
+#define ETM1 cpustate->etm.w.h
+
+#define MA cpustate->ma
+#define MB cpustate->mb
+#define MCC cpustate->mcc
+#define MC cpustate->mc
+#define MM cpustate->mm
+#define MF cpustate->mf
+#define TMM cpustate->tmm
+#define ETMM cpustate->etmm
+#define EOM cpustate->eom
+#define SML cpustate->sml
+#define SMH cpustate->smh
+#define ANM cpustate->anm
+#define MKL cpustate->mkl
+#define MKH cpustate->mkh
+#define ZCM cpustate->zcm
+
+#define CR0 cpustate->cr0
+#define CR1 cpustate->cr1
+#define CR2 cpustate->cr2
+#define CR3 cpustate->cr3
+#define RXB cpustate->rxb
+#define TXB cpustate->txb
+
+#define RXD cpustate->rxd
+#define TXD cpustate->txd
+#define SCK cpustate->sck
+#define TI cpustate->ti
+#define TO cpustate->to
+#define CI cpustate->ci
+#define CO0 cpustate->co0
+#define CO1 cpustate->co1
+
+#define IRR cpustate->irr
+#define ITF cpustate->itf
struct opcode_s {
void (*opfunc)(upd7810_state *cpustate);
@@ -642,42 +642,42 @@ struct opcode_s {
UINT8 mask_l0_l1;
};
-#define RDOP(O) O = cpustate->direct->read_decrypted_byte(PCD); PC++
-#define RDOPARG(A) A = cpustate->direct->read_raw_byte(PCD); PC++
-#define RM(A) cpustate->program->read_byte(A)
-#define WM(A,V) cpustate->program->write_byte(A,V)
+#define RDOP(O) O = cpustate->direct->read_decrypted_byte(PCD); PC++
+#define RDOPARG(A) A = cpustate->direct->read_raw_byte(PCD); PC++
+#define RM(A) cpustate->program->read_byte(A)
+#define WM(A,V) cpustate->program->write_byte(A,V)
-#define ZHC_ADD(after,before,carry) \
+#define ZHC_ADD(after,before,carry) \
if (after == 0) PSW |= Z; else PSW &= ~Z; \
if (after == before) \
PSW = (PSW&~CY) | (carry); \
- else if (after < before) \
- PSW |= CY; \
- else \
- PSW &= ~CY; \
- if ((after & 15) < (before & 15)) \
- PSW |= HC; \
- else \
- PSW &= ~HC; \
-
-#define ZHC_SUB(after,before,carry) \
+ else if (after < before) \
+ PSW |= CY; \
+ else \
+ PSW &= ~CY; \
+ if ((after & 15) < (before & 15)) \
+ PSW |= HC; \
+ else \
+ PSW &= ~HC; \
+
+#define ZHC_SUB(after,before,carry) \
if (after == 0) PSW |= Z; else PSW &= ~Z; \
- if (before == after) \
- PSW = (PSW & ~CY) | (carry); \
- else if (after > before) \
- PSW |= CY; \
- else \
- PSW &= ~CY; \
- if ((after & 15) > (before & 15)) \
- PSW |= HC; \
- else \
- PSW &= ~HC; \
-
-#define SKIP_CY if (CY == (PSW & CY)) PSW |= SK
-#define SKIP_NC if (0 == (PSW & CY)) PSW |= SK
-#define SKIP_Z if (Z == (PSW & Z)) PSW |= SK
-#define SKIP_NZ if (0 == (PSW & Z)) PSW |= SK
-#define SET_Z(n) if (n) PSW &= ~Z; else PSW |= Z
+ if (before == after) \
+ PSW = (PSW & ~CY) | (carry); \
+ else if (after > before) \
+ PSW |= CY; \
+ else \
+ PSW &= ~CY; \
+ if ((after & 15) > (before & 15)) \
+ PSW |= HC; \
+ else \
+ PSW &= ~HC; \
+
+#define SKIP_CY if (CY == (PSW & CY)) PSW |= SK
+#define SKIP_NC if (0 == (PSW & CY)) PSW |= SK
+#define SKIP_Z if (Z == (PSW & Z)) PSW |= SK
+#define SKIP_NZ if (0 == (PSW & Z)) PSW |= SK
+#define SET_Z(n) if (n) PSW &= ~Z; else PSW |= Z
static UINT8 RP(upd7810_state *cpustate, offs_t port)
{
@@ -685,48 +685,48 @@ static UINT8 RP(upd7810_state *cpustate, offs_t port)
switch (port)
{
case UPD7810_PORTA:
- if (cpustate->ma) // NS20031301 no need to read if the port is set as output
+ if (cpustate->ma) // NS20031301 no need to read if the port is set as output
cpustate->pa_in = cpustate->io->read_byte(port);
data = (cpustate->pa_in & cpustate->ma) | (cpustate->pa_out & ~cpustate->ma);
break;
case UPD7810_PORTB:
- if (cpustate->mb) // NS20031301 no need to read if the port is set as output
+ if (cpustate->mb) // NS20031301 no need to read if the port is set as output
cpustate->pb_in = cpustate->io->read_byte(port);
data = (cpustate->pb_in & cpustate->mb) | (cpustate->pb_out & ~cpustate->mb);
break;
case UPD7810_PORTC:
- if (cpustate->mc) // NS20031301 no need to read if the port is set as output
+ if (cpustate->mc) // NS20031301 no need to read if the port is set as output
cpustate->pc_in = cpustate->io->read_byte(port);
data = (cpustate->pc_in & cpustate->mc) | (cpustate->pc_out & ~cpustate->mc);
- if (cpustate->mcc & 0x01) /* PC0 = TxD output */
+ if (cpustate->mcc & 0x01) /* PC0 = TxD output */
data = (data & ~0x01) | (cpustate->txd & 1 ? 0x01 : 0x00);
- if (cpustate->mcc & 0x02) /* PC1 = RxD input */
+ if (cpustate->mcc & 0x02) /* PC1 = RxD input */
data = (data & ~0x02) | (cpustate->rxd & 1 ? 0x02 : 0x00);
- if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */
+ if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */
data = (data & ~0x04) | (cpustate->sck & 1 ? 0x04 : 0x00);
- if (cpustate->mcc & 0x08) /* PC3 = TI input */
+ if (cpustate->mcc & 0x08) /* PC3 = TI input */
data = (data & ~0x08) | (cpustate->ti & 1 ? 0x08 : 0x00);
- if (cpustate->mcc & 0x10) /* PC4 = TO output */
+ if (cpustate->mcc & 0x10) /* PC4 = TO output */
data = (data & ~0x10) | (cpustate->to & 1 ? 0x10 : 0x00);
- if (cpustate->mcc & 0x20) /* PC5 = CI input */
+ if (cpustate->mcc & 0x20) /* PC5 = CI input */
data = (data & ~0x20) | (cpustate->ci & 1 ? 0x20 : 0x00);
- if (cpustate->mcc & 0x40) /* PC6 = CO0 output */
+ if (cpustate->mcc & 0x40) /* PC6 = CO0 output */
data = (data & ~0x40) | (cpustate->co0 & 1 ? 0x40 : 0x00);
- if (cpustate->mcc & 0x80) /* PC7 = CO1 output */
+ if (cpustate->mcc & 0x80) /* PC7 = CO1 output */
data = (data & ~0x80) | (cpustate->co1 & 1 ? 0x80 : 0x00);
break;
case UPD7810_PORTD:
cpustate->pd_in = cpustate->io->read_byte(port);
switch (cpustate->mm & 0x07)
{
- case 0x00: /* PD input mode, PF port mode */
+ case 0x00: /* PD input mode, PF port mode */
data = cpustate->pd_in;
break;
- case 0x01: /* PD output mode, PF port mode */
+ case 0x01: /* PD output mode, PF port mode */
data = cpustate->pd_out;
break;
- default: /* PD extension mode, PF port/extension mode */
- data = 0xff; /* what do we see on the port here? */
+ default: /* PD extension mode, PF port/extension mode */
+ data = 0xff; /* what do we see on the port here? */
break;
}
break;
@@ -734,23 +734,23 @@ static UINT8 RP(upd7810_state *cpustate, offs_t port)
cpustate->pf_in = cpustate->io->read_byte(port);
switch (cpustate->mm & 0x06)
{
- case 0x00: /* PD input/output mode, PF port mode */
+ case 0x00: /* PD input/output mode, PF port mode */
data = (cpustate->pf_in & cpustate->mf) | (cpustate->pf_out & ~cpustate->mf);
break;
- case 0x02: /* PD extension mode, PF0-3 extension mode, PF4-7 port mode */
+ case 0x02: /* PD extension mode, PF0-3 extension mode, PF4-7 port mode */
data = (cpustate->pf_in & cpustate->mf) | (cpustate->pf_out & ~cpustate->mf);
- data |= 0x0f; /* what would we see on the lower bits here? */
+ data |= 0x0f; /* what would we see on the lower bits here? */
break;
- case 0x04: /* PD extension mode, PF0-5 extension mode, PF6-7 port mode */
+ case 0x04: /* PD extension mode, PF0-5 extension mode, PF6-7 port mode */
data = (cpustate->pf_in & cpustate->mf) | (cpustate->pf_out & ~cpustate->mf);
- data |= 0x3f; /* what would we see on the lower bits here? */
+ data |= 0x3f; /* what would we see on the lower bits here? */
break;
case 0x06:
- data = 0xff; /* what would we see on the lower bits here? */
+ data = 0xff; /* what would we see on the lower bits here? */
break;
}
break;
- case UPD7807_PORTT: // NS20031301 partial implementation
+ case UPD7807_PORTT: // NS20031301 partial implementation
data = cpustate->io->read_byte(port);
break;
default:
@@ -766,34 +766,34 @@ static void WP(upd7810_state *cpustate, offs_t port, UINT8 data)
case UPD7810_PORTA:
cpustate->pa_out = data;
// data = (data & ~cpustate->ma) | (cpustate->pa_in & cpustate->ma);
- data = (data & ~cpustate->ma) | (cpustate->ma); // NS20031401
+ data = (data & ~cpustate->ma) | (cpustate->ma); // NS20031401
cpustate->io->write_byte(port, data);
break;
case UPD7810_PORTB:
cpustate->pb_out = data;
// data = (data & ~cpustate->mb) | (cpustate->pb_in & cpustate->mb);
- data = (data & ~cpustate->mb) | (cpustate->mb); // NS20031401
+ data = (data & ~cpustate->mb) | (cpustate->mb); // NS20031401
cpustate->io->write_byte(port, data);
break;
case UPD7810_PORTC:
cpustate->pc_out = data;
// data = (data & ~cpustate->mc) | (cpustate->pc_in & cpustate->mc);
- data = (data & ~cpustate->mc) | (cpustate->mc); // NS20031401
- if (cpustate->mcc & 0x01) /* PC0 = TxD output */
+ data = (data & ~cpustate->mc) | (cpustate->mc); // NS20031401
+ if (cpustate->mcc & 0x01) /* PC0 = TxD output */
data = (data & ~0x01) | (cpustate->txd & 1 ? 0x01 : 0x00);
- if (cpustate->mcc & 0x02) /* PC1 = RxD input */
+ if (cpustate->mcc & 0x02) /* PC1 = RxD input */
data = (data & ~0x02) | (cpustate->rxd & 1 ? 0x02 : 0x00);
- if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */
+ if (cpustate->mcc & 0x04) /* PC2 = SCK input/output */
data = (data & ~0x04) | (cpustate->sck & 1 ? 0x04 : 0x00);
- if (cpustate->mcc & 0x08) /* PC3 = TI input */
+ if (cpustate->mcc & 0x08) /* PC3 = TI input */
data = (data & ~0x08) | (cpustate->ti & 1 ? 0x08 : 0x00);
- if (cpustate->mcc & 0x10) /* PC4 = TO output */
+ if (cpustate->mcc & 0x10) /* PC4 = TO output */
data = (data & ~0x10) | (cpustate->to & 1 ? 0x10 : 0x00);
- if (cpustate->mcc & 0x20) /* PC5 = CI input */
+ if (cpustate->mcc & 0x20) /* PC5 = CI input */
data = (data & ~0x20) | (cpustate->ci & 1 ? 0x20 : 0x00);
- if (cpustate->mcc & 0x40) /* PC6 = CO0 output */
+ if (cpustate->mcc & 0x40) /* PC6 = CO0 output */
data = (data & ~0x40) | (cpustate->co0 & 1 ? 0x40 : 0x00);
- if (cpustate->mcc & 0x80) /* PC7 = CO1 output */
+ if (cpustate->mcc & 0x80) /* PC7 = CO1 output */
data = (data & ~0x80) | (cpustate->co1 & 1 ? 0x80 : 0x00);
cpustate->io->write_byte(port, data);
break;
@@ -801,13 +801,13 @@ static void WP(upd7810_state *cpustate, offs_t port, UINT8 data)
cpustate->pd_out = data;
switch (cpustate->mm & 0x07)
{
- case 0x00: /* PD input mode, PF port mode */
+ case 0x00: /* PD input mode, PF port mode */
data = cpustate->pd_in;
break;
- case 0x01: /* PD output mode, PF port mode */
+ case 0x01: /* PD output mode, PF port mode */
data = cpustate->pd_out;
break;
- default: /* PD extension mode, PF port/extension mode */
+ default: /* PD extension mode, PF port/extension mode */
return;
}
cpustate->io->write_byte(port, data);
@@ -817,16 +817,16 @@ static void WP(upd7810_state *cpustate, offs_t port, UINT8 data)
data = (data & ~cpustate->mf) | (cpustate->pf_in & cpustate->mf);
switch (cpustate->mm & 0x06)
{
- case 0x00: /* PD input/output mode, PF port mode */
+ case 0x00: /* PD input/output mode, PF port mode */
break;
- case 0x02: /* PD extension mode, PF0-3 extension mode, PF4-7 port mode */
- data |= 0x0f; /* what would come out for the lower bits here? */
+ case 0x02: /* PD extension mode, PF0-3 extension mode, PF4-7 port mode */
+ data |= 0x0f; /* what would come out for the lower bits here? */
break;
- case 0x04: /* PD extension mode, PF0-5 extension mode, PF6-7 port mode */
- data |= 0x3f; /* what would come out for the lower bits here? */
+ case 0x04: /* PD extension mode, PF0-5 extension mode, PF6-7 port mode */
+ data |= 0x3f; /* what would come out for the lower bits here? */
break;
case 0x06:
- data |= 0xff; /* what would come out for the lower bits here? */
+ data |= 0xff; /* what would come out for the lower bits here? */
break;
}
cpustate->io->write_byte(port, data);
@@ -886,9 +886,9 @@ static void upd7810_take_irq(upd7810_state *cpustate)
default:
/* check the interrupts in priority sequence */
- if ((IRR & INTFT0) && 0 == (MKL & 0x02))
+ if ((IRR & INTFT0) && 0 == (MKL & 0x02))
{
- switch (cpustate->config.type)
+ switch (cpustate->config.type)
{
case TYPE_7810_GAMEMASTER:
vector = 0xff2a;
@@ -896,13 +896,13 @@ static void upd7810_take_irq(upd7810_state *cpustate)
default:
vector = 0x0008;
}
- if (!((IRR & INTFT1) && 0 == (MKL & 0x04)))
+ if (!((IRR & INTFT1) && 0 == (MKL & 0x04)))
IRR&=~INTFT0;
}
else
- if ((IRR & INTFT1) && 0 == (MKL & 0x04))
+ if ((IRR & INTFT1) && 0 == (MKL & 0x04))
{
- switch (cpustate->config.type)
+ switch (cpustate->config.type)
{
case TYPE_7810_GAMEMASTER:
vector = 0xff2a;
@@ -910,27 +910,27 @@ static void upd7810_take_irq(upd7810_state *cpustate)
default:
vector = 0x0008;
}
- IRR&=~INTFT1;
+ IRR&=~INTFT1;
}
else
- if ((IRR & INTF1) && 0 == (MKL & 0x08))
+ if ((IRR & INTF1) && 0 == (MKL & 0x08))
{
irqline = UPD7810_INTF1;
vector = 0x0010;
- if (!((IRR & INTF2) && 0 == (MKL & 0x10)))
- IRR&=~INTF1;
+ if (!((IRR & INTF2) && 0 == (MKL & 0x10)))
+ IRR&=~INTF1;
}
else
- if ((IRR & INTF2) && 0 == (MKL & 0x10))
+ if ((IRR & INTF2) && 0 == (MKL & 0x10))
{
irqline = UPD7810_INTF2;
vector = 0x0010;
IRR&=~INTF2;
}
else
- if ((IRR & INTFE0) && 0 == (MKL & 0x20))
+ if ((IRR & INTFE0) && 0 == (MKL & 0x20))
{
- switch (cpustate->config.type)
+ switch (cpustate->config.type)
{
case TYPE_7810_GAMEMASTER:
vector = 0xff2d;
@@ -938,21 +938,21 @@ static void upd7810_take_irq(upd7810_state *cpustate)
default:
vector = 0x0018;
}
- if (!((IRR & INTFE1) && 0 == (MKL & 0x40)))
+ if (!((IRR & INTFE1) && 0 == (MKL & 0x40)))
IRR&=~INTFE0;
}
else
- if ((IRR & INTFE1) && 0 == (MKL & 0x40))
+ if ((IRR & INTFE1) && 0 == (MKL & 0x40))
{
- switch (cpustate->config.type)
+ switch (cpustate->config.type)
{
- case TYPE_7810_GAMEMASTER:
+ case TYPE_7810_GAMEMASTER:
vector = 0xff2d;
break;
- default:
+ default:
vector = 0x0018;
}
- IRR&=~INTFE1;
+ IRR&=~INTFE1;
}
else
if ((IRR & INTFEIN) && 0 == (MKL & 0x80))
@@ -960,21 +960,21 @@ static void upd7810_take_irq(upd7810_state *cpustate)
vector = 0x0020;
}
else
- if ((IRR & INTFAD) && 0 == (MKH & 0x01))
+ if ((IRR & INTFAD) && 0 == (MKH & 0x01))
{
vector = 0x0020;
}
else
- if ((IRR & INTFSR) && 0 == (MKH & 0x02))
+ if ((IRR & INTFSR) && 0 == (MKH & 0x02))
{
vector = 0x0028;
- IRR&=~INTFSR;
+ IRR&=~INTFSR;
}
else
- if ((IRR & INTFST) && 0 == (MKH & 0x04))
+ if ((IRR & INTFST) && 0 == (MKH & 0x04))
{
vector = 0x0028;
- IRR&=~INTFST;
+ IRR&=~INTFST;
}
break;
}
@@ -1002,13 +1002,13 @@ static void upd7810_write_EOM(upd7810_state *cpustate)
{
switch (EOM & 0x0e)
{
- case 0x02: /* toggle CO0 */
+ case 0x02: /* toggle CO0 */
CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
break;
- case 0x04: /* reset CO0 */
+ case 0x04: /* reset CO0 */
CO0 = 0;
break;
- case 0x08: /* set CO0 */
+ case 0x08: /* set CO0 */
CO0 = 1;
break;
}
@@ -1017,13 +1017,13 @@ static void upd7810_write_EOM(upd7810_state *cpustate)
{
switch (EOM & 0xe0)
{
- case 0x20: /* toggle CO1 */
+ case 0x20: /* toggle CO1 */
CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
break;
- case 0x40: /* reset CO1 */
+ case 0x40: /* reset CO1 */
CO1 = 0;
break;
- case 0x80: /* set CO1 */
+ case 0x80: /* set CO1 */
CO1 = 1;
break;
}
@@ -1049,80 +1049,80 @@ static void upd7810_sio_output(upd7810_state *cpustate)
cpustate->txs >>= 1;
cpustate->txcnt--;
if (0 == cpustate->txcnt)
- IRR |= INTFST; /* serial transfer completed */
+ IRR |= INTFST; /* serial transfer completed */
}
else
if (SMH & 0x04) /* send enable ? */
{
/* nothing written into the transmitter buffer ? */
- if (0 == cpustate->txbuf)
+ if (0 == cpustate->txbuf)
return;
- cpustate->txbuf = 0;
+ cpustate->txbuf = 0;
- if (SML & 0x03) /* asynchronous mode ? */
+ if (SML & 0x03) /* asynchronous mode ? */
{
switch (SML & 0xfc)
{
- case 0x48: /* 7bits, no parity, 1 stop bit */
- case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ case 0x48: /* 7bits, no parity, 1 stop bit */
+ case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
/* insert start bit in bit0, stop bit int bit8 */
cpustate->txs = (TXB << 1) | (1 << 8);
cpustate->txcnt = 9;
break;
- case 0x4c: /* 8bits, no parity, 1 stop bit */
- case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ case 0x4c: /* 8bits, no parity, 1 stop bit */
+ case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
/* insert start bit in bit0, stop bit int bit9 */
cpustate->txs = (TXB << 1) | (1 << 9);
cpustate->txcnt = 10;
break;
- case 0x58: /* 7bits, odd parity, 1 stop bit */
+ case 0x58: /* 7bits, odd parity, 1 stop bit */
/* insert start bit in bit0, parity in bit 8, stop bit in bit9 */
cpustate->txs = (TXB << 1) | (PAR7(TXB) << 8) | (1 << 9);
cpustate->txcnt = 10;
break;
- case 0x5c: /* 8bits, odd parity, 1 stop bit */
+ case 0x5c: /* 8bits, odd parity, 1 stop bit */
/* insert start bit in bit0, parity in bit 9, stop bit int bit10 */
cpustate->txs = (TXB << 1) | (PAR8(TXB) << 9) | (1 << 10);
cpustate->txcnt = 11;
break;
- case 0x78: /* 7bits, even parity, 1 stop bit */
+ case 0x78: /* 7bits, even parity, 1 stop bit */
/* insert start bit in bit0, parity in bit 8, stop bit in bit9 */
cpustate->txs = (TXB << 1) | ((PAR7(TXB) ^ 1) << 8) | (1 << 9);
cpustate->txcnt = 10;
break;
- case 0x7c: /* 8bits, even parity, 1 stop bit */
+ case 0x7c: /* 8bits, even parity, 1 stop bit */
/* insert start bit in bit0, parity in bit 9, stop bit int bit10 */
cpustate->txs = (TXB << 1) | ((PAR8(TXB) ^ 1) << 9) | (1 << 10);
cpustate->txcnt = 11;
break;
- case 0xc8: /* 7bits, no parity, 2 stop bits */
- case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ case 0xc8: /* 7bits, no parity, 2 stop bits */
+ case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
/* insert start bit in bit0, stop bits int bit8+9 */
cpustate->txs = (TXB << 1) | (3 << 8);
cpustate->txcnt = 10;
break;
- case 0xcc: /* 8bits, no parity, 2 stop bits */
- case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ case 0xcc: /* 8bits, no parity, 2 stop bits */
+ case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
/* insert start bit in bit0, stop bits in bits9+10 */
cpustate->txs = (TXB << 1) | (3 << 9);
cpustate->txcnt = 11;
break;
- case 0xd8: /* 7bits, odd parity, 2 stop bits */
+ case 0xd8: /* 7bits, odd parity, 2 stop bits */
/* insert start bit in bit0, parity in bit 8, stop bits in bits9+10 */
cpustate->txs = (TXB << 1) | (PAR7(TXB) << 8) | (3 << 9);
cpustate->txcnt = 11;
break;
- case 0xdc: /* 8bits, odd parity, 2 stop bits */
+ case 0xdc: /* 8bits, odd parity, 2 stop bits */
/* insert start bit in bit0, parity in bit 9, stop bits int bit10+11 */
cpustate->txs = (TXB << 1) | (PAR8(TXB) << 9) | (3 << 10);
cpustate->txcnt = 12;
break;
- case 0xf8: /* 7bits, even parity, 2 stop bits */
+ case 0xf8: /* 7bits, even parity, 2 stop bits */
/* insert start bit in bit0, parity in bit 8, stop bits in bit9+10 */
cpustate->txs = (TXB << 1) | ((PAR7(TXB) ^ 1) << 8) | (3 << 9);
cpustate->txcnt = 11;
break;
- case 0xfc: /* 8bits, even parity, 2 stop bits */
+ case 0xfc: /* 8bits, even parity, 2 stop bits */
/* insert start bit in bit0, parity in bit 9, stop bits int bits10+10 */
cpustate->txs = (TXB << 1) | ((PAR8(TXB) ^ 1) << 9) | (1 << 10);
cpustate->txcnt = 12;
@@ -1154,105 +1154,105 @@ static void upd7810_sio_input(upd7810_state *cpustate)
/* serial receive completed interrupt */
IRR |= INTFSR;
/* now extract the data from the shift register */
- if (SML & 0x03) /* asynchronous mode ? */
+ if (SML & 0x03) /* asynchronous mode ? */
{
switch (SML & 0xfc)
{
- case 0x48: /* 7bits, no parity, 1 stop bit */
- case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ case 0x48: /* 7bits, no parity, 1 stop bit */
+ case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
cpustate->rxs >>= 16 - 9;
RXB = (cpustate->rxs >> 1) & 0x7f;
if ((1 << 8) != (cpustate->rxs & (1 | (1 << 8))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
break;
- case 0x4c: /* 8bits, no parity, 1 stop bit */
- case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ case 0x4c: /* 8bits, no parity, 1 stop bit */
+ case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
cpustate->rxs >>= 16 - 10;
RXB = (cpustate->rxs >> 1) & 0xff;
if ((1 << 9) != (cpustate->rxs & (1 | (1 << 9))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
break;
- case 0x58: /* 7bits, odd parity, 1 stop bit */
+ case 0x58: /* 7bits, odd parity, 1 stop bit */
cpustate->rxs >>= 16 - 10;
RXB = (cpustate->rxs >> 1) & 0x7f;
if ((1 << 9) != (cpustate->rxs & (1 | (1 << 9))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR7(RXB) != ((cpustate->rxs >> 8) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0x5c: /* 8bits, odd parity, 1 stop bit */
+ case 0x5c: /* 8bits, odd parity, 1 stop bit */
cpustate->rxs >>= 16 - 11;
RXB = (cpustate->rxs >> 1) & 0xff;
if ((1 << 10) != (cpustate->rxs & (1 | (1 << 10))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR8(RXB) != ((cpustate->rxs >> 9) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0x78: /* 7bits, even parity, 1 stop bit */
+ case 0x78: /* 7bits, even parity, 1 stop bit */
cpustate->rxs >>= 16 - 10;
RXB = (cpustate->rxs >> 1) & 0x7f;
if ((1 << 9) != (cpustate->rxs & (1 | (1 << 9))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR7(RXB) != ((cpustate->rxs >> 8) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0x7c: /* 8bits, even parity, 1 stop bit */
+ case 0x7c: /* 8bits, even parity, 1 stop bit */
cpustate->rxs >>= 16 - 11;
RXB = (cpustate->rxs >> 1) & 0xff;
if ((1 << 10) != (cpustate->rxs & (1 | (1 << 10))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR8(RXB) != ((cpustate->rxs >> 9) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0xc8: /* 7bits, no parity, 2 stop bits */
- case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ case 0xc8: /* 7bits, no parity, 2 stop bits */
+ case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
cpustate->rxs >>= 16 - 10;
RXB = (cpustate->rxs >> 1) & 0x7f;
if ((3 << 9) != (cpustate->rxs & (1 | (3 << 9))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR7(RXB) != ((cpustate->rxs >> 8) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0xcc: /* 8bits, no parity, 2 stop bits */
- case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ case 0xcc: /* 8bits, no parity, 2 stop bits */
+ case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
cpustate->rxs >>= 16 - 11;
RXB = (cpustate->rxs >> 1) & 0xff;
if ((3 << 10) != (cpustate->rxs & (1 | (3 << 10))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR8(RXB) != ((cpustate->rxs >> 9) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0xd8: /* 7bits, odd parity, 2 stop bits */
+ case 0xd8: /* 7bits, odd parity, 2 stop bits */
cpustate->rxs >>= 16 - 11;
RXB = (cpustate->rxs >> 1) & 0x7f;
if ((3 << 10) != (cpustate->rxs & (1 | (3 << 10))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR7(RXB) != ((cpustate->rxs >> 8) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0xdc: /* 8bits, odd parity, 2 stop bits */
+ case 0xdc: /* 8bits, odd parity, 2 stop bits */
cpustate->rxs >>= 16 - 12;
RXB = (cpustate->rxs >> 1) & 0xff;
if ((3 << 11) != (cpustate->rxs & (1 | (3 << 11))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR8(RXB) != ((cpustate->rxs >> 9) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0xf8: /* 7bits, even parity, 2 stop bits */
+ case 0xf8: /* 7bits, even parity, 2 stop bits */
cpustate->rxs >>= 16 - 11;
RXB = (cpustate->rxs >> 1) & 0x7f;
if ((3 << 10) != (cpustate->rxs & (1 | (3 << 10))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR7(RXB) != ((cpustate->rxs >> 8) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
- case 0xfc: /* 8bits, even parity, 2 stop bits */
+ case 0xfc: /* 8bits, even parity, 2 stop bits */
cpustate->rxs >>= 16 - 12;
RXB = (cpustate->rxs >> 1) & 0xff;
if ((3 << 11) != (cpustate->rxs & (1 | (3 << 11))))
- IRR |= INTER; /* framing error */
+ IRR |= INTER; /* framing error */
if (PAR8(RXB) != ((cpustate->rxs >> 9) & 1))
- IRR |= INTER; /* parity error */
+ IRR |= INTER; /* parity error */
break;
}
}
@@ -1267,48 +1267,48 @@ static void upd7810_sio_input(upd7810_state *cpustate)
else
if (SMH & 0x08) /* receive enable ? */
{
- if (SML & 0x03) /* asynchronous mode ? */
+ if (SML & 0x03) /* asynchronous mode ? */
{
switch (SML & 0xfc)
{
- case 0x48: /* 7bits, no parity, 1 stop bit */
- case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ case 0x48: /* 7bits, no parity, 1 stop bit */
+ case 0x68: /* 7bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
cpustate->rxcnt = 9;
break;
- case 0x4c: /* 8bits, no parity, 1 stop bit */
- case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
+ case 0x4c: /* 8bits, no parity, 1 stop bit */
+ case 0x6c: /* 8bits, no parity, 1 stop bit (parity select = 1 but parity is off) */
cpustate->rxcnt = 10;
break;
- case 0x58: /* 7bits, odd parity, 1 stop bit */
+ case 0x58: /* 7bits, odd parity, 1 stop bit */
cpustate->rxcnt = 10;
break;
- case 0x5c: /* 8bits, odd parity, 1 stop bit */
+ case 0x5c: /* 8bits, odd parity, 1 stop bit */
cpustate->rxcnt = 11;
break;
- case 0x78: /* 7bits, even parity, 1 stop bit */
+ case 0x78: /* 7bits, even parity, 1 stop bit */
cpustate->rxcnt = 10;
break;
- case 0x7c: /* 8bits, even parity, 1 stop bit */
+ case 0x7c: /* 8bits, even parity, 1 stop bit */
cpustate->rxcnt = 11;
break;
- case 0xc8: /* 7bits, no parity, 2 stop bits */
- case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ case 0xc8: /* 7bits, no parity, 2 stop bits */
+ case 0xe8: /* 7bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
cpustate->rxcnt = 10;
break;
- case 0xcc: /* 8bits, no parity, 2 stop bits */
- case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
+ case 0xcc: /* 8bits, no parity, 2 stop bits */
+ case 0xec: /* 8bits, no parity, 2 stop bits (parity select = 1 but parity is off) */
cpustate->rxcnt = 11;
break;
- case 0xd8: /* 7bits, odd parity, 2 stop bits */
+ case 0xd8: /* 7bits, odd parity, 2 stop bits */
cpustate->rxcnt = 11;
break;
- case 0xdc: /* 8bits, odd parity, 2 stop bits */
+ case 0xdc: /* 8bits, odd parity, 2 stop bits */
cpustate->rxcnt = 12;
break;
- case 0xf8: /* 7bits, even parity, 2 stop bits */
+ case 0xf8: /* 7bits, even parity, 2 stop bits */
cpustate->rxcnt = 11;
break;
- case 0xfc: /* 8bits, even parity, 2 stop bits */
+ case 0xfc: /* 8bits, even parity, 2 stop bits */
cpustate->rxcnt = 12;
break;
}
@@ -1325,13 +1325,13 @@ static void upd7810_sio_input(upd7810_state *cpustate)
static void upd7810_timers(upd7810_state *cpustate, int cycles)
{
/**** TIMER 0 ****/
- if (TMM & 0x10) /* timer 0 upcounter reset ? */
+ if (TMM & 0x10) /* timer 0 upcounter reset ? */
CNT0 = 0;
else
{
switch (TMM & 0x0c) /* timer 0 clock source */
{
- case 0x00: /* clock divided by 12 */
+ case 0x00: /* clock divided by 12 */
OVC0 += cycles;
while (OVC0 >= 12)
{
@@ -1368,7 +1368,7 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
}
}
break;
- case 0x04: /* clock divided by 384 */
+ case 0x04: /* clock divided by 384 */
OVC0 += cycles;
while (OVC0 >= 384)
{
@@ -1405,21 +1405,21 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
}
}
break;
- case 0x08: /* external signal at TI */
+ case 0x08: /* external signal at TI */
break;
- case 0x0c: /* disabled */
+ case 0x0c: /* disabled */
break;
}
}
/**** TIMER 1 ****/
- if (TMM & 0x80) /* timer 1 upcounter reset ? */
+ if (TMM & 0x80) /* timer 1 upcounter reset ? */
CNT1 = 0;
else
{
switch (TMM & 0x60) /* timer 1 clock source */
{
- case 0x00: /* clock divided by 12 */
+ case 0x00: /* clock divided by 12 */
OVC1 += cycles;
while (OVC1 >= 12)
{
@@ -1439,7 +1439,7 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
}
}
break;
- case 0x20: /* clock divided by 384 */
+ case 0x20: /* clock divided by 384 */
OVC1 += cycles;
while (OVC1 >= 384)
{
@@ -1459,9 +1459,9 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
}
}
break;
- case 0x40: /* external signal at TI */
+ case 0x40: /* external signal at TI */
break;
- case 0x60: /* clocked with timer 0 */
+ case 0x60: /* clocked with timer 0 */
break;
}
}
@@ -1495,69 +1495,69 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
ECNT++;
switch (ETMM & 0x0c)
{
- case 0x00: /* clear ECNT */
+ case 0x00: /* clear ECNT */
break;
- case 0x04: /* free running */
+ case 0x04: /* free running */
if (0 == ECNT)
- ITF |= INTOV; /* set overflow flag if counter wrapped */
+ ITF |= INTOV; /* set overflow flag if counter wrapped */
break;
- case 0x08: /* reset at falling edge of CI or TO */
+ case 0x08: /* reset at falling edge of CI or TO */
break;
- case 0x0c: /* reset if ECNT == ETM1 */
+ case 0x0c: /* reset if ECNT == ETM1 */
if (ETM1 == ECNT)
ECNT = 0;
break;
}
switch (ETMM & 0x30)
{
- case 0x00: /* set CO0 if ECNT == ETM0 */
+ case 0x00: /* set CO0 if ECNT == ETM0 */
if (ETM0 == ECNT)
{
switch (EOM & 0x0e)
{
- case 0x02: /* toggle CO0 */
+ case 0x02: /* toggle CO0 */
CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
break;
- case 0x04: /* reset CO0 */
+ case 0x04: /* reset CO0 */
CO0 = 0;
break;
- case 0x08: /* set CO0 */
+ case 0x08: /* set CO0 */
CO0 = 1;
break;
}
}
break;
- case 0x10: /* prohibited */
+ case 0x10: /* prohibited */
break;
- case 0x20: /* set CO0 if ECNT == ETM0 or at falling CI input */
+ case 0x20: /* set CO0 if ECNT == ETM0 or at falling CI input */
if (ETM0 == ECNT)
{
switch (EOM & 0x0e)
{
- case 0x02: /* toggle CO0 */
+ case 0x02: /* toggle CO0 */
CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
break;
- case 0x04: /* reset CO0 */
+ case 0x04: /* reset CO0 */
CO0 = 0;
break;
- case 0x08: /* set CO0 */
+ case 0x08: /* set CO0 */
CO0 = 1;
break;
}
}
break;
- case 0x30: /* latch CO0 if ECNT == ETM0 or ECNT == ETM1 */
+ case 0x30: /* latch CO0 if ECNT == ETM0 or ECNT == ETM1 */
if (ETM0 == ECNT || ETM1 == ECNT)
{
switch (EOM & 0x0e)
{
- case 0x02: /* toggle CO0 */
+ case 0x02: /* toggle CO0 */
CO0 = (CO0 >> 1) | ((CO0 ^ 2) & 2);
break;
- case 0x04: /* reset CO0 */
+ case 0x04: /* reset CO0 */
CO0 = 0;
break;
- case 0x08: /* set CO0 */
+ case 0x08: /* set CO0 */
CO0 = 1;
break;
}
@@ -1566,54 +1566,54 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
}
switch (ETMM & 0xc0)
{
- case 0x00: /* lacth CO1 if ECNT == ETM1 */
+ case 0x00: /* lacth CO1 if ECNT == ETM1 */
if (ETM1 == ECNT)
{
switch (EOM & 0xe0)
{
- case 0x20: /* toggle CO1 */
+ case 0x20: /* toggle CO1 */
CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
break;
- case 0x40: /* reset CO1 */
+ case 0x40: /* reset CO1 */
CO1 = 0;
break;
- case 0x80: /* set CO1 */
+ case 0x80: /* set CO1 */
CO1 = 1;
break;
}
}
break;
- case 0x40: /* prohibited */
+ case 0x40: /* prohibited */
break;
- case 0x80: /* latch CO1 if ECNT == ETM1 or falling edge of CI input */
+ case 0x80: /* latch CO1 if ECNT == ETM1 or falling edge of CI input */
if (ETM1 == ECNT)
{
switch (EOM & 0xe0)
{
- case 0x20: /* toggle CO1 */
+ case 0x20: /* toggle CO1 */
CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
break;
- case 0x40: /* reset CO1 */
+ case 0x40: /* reset CO1 */
CO1 = 0;
break;
- case 0x80: /* set CO1 */
+ case 0x80: /* set CO1 */
CO1 = 1;
break;
}
}
break;
- case 0xc0: /* latch CO1 if ECNT == ETM0 or ECNT == ETM1 */
+ case 0xc0: /* latch CO1 if ECNT == ETM0 or ECNT == ETM1 */
if (ETM0 == ECNT || ETM1 == ECNT)
{
switch (EOM & 0xe0)
{
- case 0x20: /* toggle CO1 */
+ case 0x20: /* toggle CO1 */
CO1 = (CO1 >> 1) | ((CO1 ^ 2) & 2);
break;
- case 0x40: /* reset CO1 */
+ case 0x40: /* reset CO1 */
CO1 = 0;
break;
- case 0x80: /* set CO1 */
+ case 0x80: /* set CO1 */
CO1 = 1;
break;
}
@@ -1626,9 +1626,9 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
/**** SIO ****/
switch (SMH & 0x03)
{
- case 0x00: /* interval timer F/F */
+ case 0x00: /* interval timer F/F */
break;
- case 0x01: /* internal clock divided by 384 */
+ case 0x01: /* internal clock divided by 384 */
OVCS += cycles;
while (OVCS >= 384)
{
@@ -1639,7 +1639,7 @@ static void upd7810_timers(upd7810_state *cpustate, int cycles)
upd7810_sio_output(cpustate);
}
break;
- case 0x02: /* internal clock divided by 24 */
+ case 0x02: /* internal clock divided by 24 */
OVCS += cycles;
while (OVCS >= 24)
{
@@ -1806,7 +1806,7 @@ static CPU_RESET( upd7810 )
switch (cpustate->config.type)
{
case TYPE_7810_GAMEMASTER:
- // needed for lcd screen/ram selection; might be internal in cpu and therefor not needed; 0x10 written in some games
+ // needed for lcd screen/ram selection; might be internal in cpu and therefor not needed; 0x10 written in some games
MC = 0xff&~0x7;
WP( cpustate, UPD7810_PORTC, 1 ); //hyper space
PCD=0x8000;
@@ -1841,7 +1841,7 @@ static CPU_RESET( upd7801 )
cpustate->op74 = op74_7801;
cpustate->opXX = opXX_7801;
cpustate->handle_timers = upd7801_timers;
- MA = 0; /* Port A is output port on the uPD7801 */
+ MA = 0; /* Port A is output port on the uPD7801 */
cpustate->ovc0 = 0;
}
@@ -1857,11 +1857,11 @@ static CPU_RESET( upd78c05 )
cpustate->op70 = op70_78c05;
cpustate->op74 = op74_78c05;
cpustate->opXX = opXX_78c05;
- MA = 0; /* All outputs */
- MC = 0xFF; /* All inputs */
- V = 0xFF; /* The vector register is always pointing to FF00 */
+ MA = 0; /* All outputs */
+ MC = 0xFF; /* All inputs */
+ V = 0xFF; /* The vector register is always pointing to FF00 */
cpustate->handle_timers = upd78c05_timers;
- TM0 = 0xFF; /* Timer seems to be running from boot */
+ TM0 = 0xFF; /* Timer seems to be running from boot */
cpustate->ovc0 = ( ( TMM & 0x04 ) ? 16 * 8 : 8 ) * TM0;
}
@@ -1897,10 +1897,10 @@ static CPU_EXECUTE( upd7810 )
RDOP(OP);
/*
- * clear L0 and/or L1 flags for all opcodes except
- * L0 for "MVI L,xx" or "LXI H,xxxx"
- * L1 for "MVI A,xx"
- */
+ * clear L0 and/or L1 flags for all opcodes except
+ * L0 for "MVI L,xx" or "LXI H,xxxx"
+ * L1 for "MVI A,xx"
+ */
PSW &= ~cpustate->opXX[OP].mask_l0_l1;
/* skip flag set and not SOFTI opcode? */
@@ -2057,65 +2057,65 @@ static CPU_SET_INFO( upd7810 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: set_irq_line(cpustate, UPD7810_INTF1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + UPD7810_INTF2: set_irq_line(cpustate, UPD7810_INTF2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + UPD7810_INTFE1: set_irq_line(cpustate, UPD7810_INTFE1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: set_irq_line(cpustate, UPD7810_INTF1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF2: set_irq_line(cpustate, UPD7810_INTF2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTFE1: set_irq_line(cpustate, UPD7810_INTFE1, info->i); break;
- case CPUINFO_INT_PC: PC = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_PC: PC = info->i; break;
+ case CPUINFO_INT_PC: PC = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_PC: PC = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + UPD7810_SP: SP = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_PSW: PSW = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_A: A = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_V: V = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_EA: EA = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_VA: VA = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_BC: BC = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_DE: DE = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_HL: HL = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_EA2: EA2 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_VA2: VA2 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_BC2: BC2 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_DE2: DE2 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_HL2: HL2 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CNT0: CNT0 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CNT1: CNT1 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_TM0: TM0 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_TM1: TM1 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_ECNT: ECNT = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_ECPT: ECPT = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_ETM0: ETM0 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_ETM1: ETM1 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MA: MA = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MB: MB = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MCC: MCC = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MC: MC = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MM: MM = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MF: MF = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_TMM: TMM = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_ETMM: ETMM = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_EOM: EOM = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_SML: SML = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_SMH: SMH = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_ANM: ANM = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MKL: MKL = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_MKH: MKH = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_ZCM: ZCM = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_TXB: TXB = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_RXB: RXB = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR0: CR0 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR1: CR1 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR2: CR2 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR3: CR3 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_TXD: TXD = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_RXD: RXD = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_SCK: SCK = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_TI: TI = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_TO: TO = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CI: CI = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CO0: CO0 = info->i; break;
- case CPUINFO_INT_REGISTER + UPD7810_CO1: CO1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SP: SP = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_PSW: PSW = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_A: A = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_V: V = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA: EA = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA: VA = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC: BC = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE: DE = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL: HL = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA2: EA2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA2: VA2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC2: BC2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE2: DE2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL2: HL2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT0: CNT0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT1: CNT1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM0: TM0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM1: TM1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECNT: ECNT = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECPT: ECPT = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM0: ETM0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM1: ETM1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MA: MA = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MB: MB = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MCC: MCC = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MC: MC = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MM: MM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MF: MF = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TMM: TMM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETMM: ETMM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EOM: EOM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SML: SML = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SMH: SMH = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ANM: ANM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKL: MKL = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKH: MKH = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ZCM: ZCM = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXB: TXB = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXB: RXB = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR0: CR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR1: CR1 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR2: CR2 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR3: CR3 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXD: TXD = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXD: RXD = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SCK: SCK = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TI: TI = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TO: TO = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CI: CI = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO0: CO0 = info->i; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO1: CO1 = info->i; break;
}
}
@@ -2131,103 +2131,103 @@ CPU_GET_INFO( upd7810 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(upd7810_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = (IRR & INTNMI) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: info->i = (IRR & INTF1) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + UPD7810_INTF2: info->i = (IRR & INTF2) ? ASSERT_LINE : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + UPD7810_INTFE1: info->i = (IRR & INTFE1) ? ASSERT_LINE : CLEAR_LINE; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(upd7810_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 40; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = (IRR & INTNMI) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF1: info->i = (IRR & INTF1) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTF2: info->i = (IRR & INTF2) ? ASSERT_LINE : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + UPD7810_INTFE1: info->i = (IRR & INTFE1) ? ASSERT_LINE : CLEAR_LINE; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = PPC; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + UPD7810_PC: info->i = PC; break;
+ case CPUINFO_INT_REGISTER + UPD7810_PC: info->i = PC; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + UPD7810_SP: info->i = SP; break;
- case CPUINFO_INT_REGISTER + UPD7810_PSW: info->i = PSW; break;
- case CPUINFO_INT_REGISTER + UPD7810_EA: info->i = EA; break;
- case CPUINFO_INT_REGISTER + UPD7810_VA: info->i = VA; break;
- case CPUINFO_INT_REGISTER + UPD7810_BC: info->i = BC; break;
- case CPUINFO_INT_REGISTER + UPD7810_DE: info->i = DE; break;
- case CPUINFO_INT_REGISTER + UPD7810_HL: info->i = HL; break;
- case CPUINFO_INT_REGISTER + UPD7810_EA2: info->i = EA2; break;
- case CPUINFO_INT_REGISTER + UPD7810_VA2: info->i = VA2; break;
- case CPUINFO_INT_REGISTER + UPD7810_BC2: info->i = BC2; break;
- case CPUINFO_INT_REGISTER + UPD7810_DE2: info->i = DE2; break;
- case CPUINFO_INT_REGISTER + UPD7810_HL2: info->i = HL2; break;
- case CPUINFO_INT_REGISTER + UPD7810_CNT0: info->i = CNT0; break;
- case CPUINFO_INT_REGISTER + UPD7810_CNT1: info->i = CNT1; break;
- case CPUINFO_INT_REGISTER + UPD7810_TM0: info->i = TM0; break;
- case CPUINFO_INT_REGISTER + UPD7810_TM1: info->i = TM1; break;
- case CPUINFO_INT_REGISTER + UPD7810_ECNT: info->i = ECNT; break;
- case CPUINFO_INT_REGISTER + UPD7810_ECPT: info->i = ECPT; break;
- case CPUINFO_INT_REGISTER + UPD7810_ETM0: info->i = ETM0; break;
- case CPUINFO_INT_REGISTER + UPD7810_ETM1: info->i = ETM1; break;
- case CPUINFO_INT_REGISTER + UPD7810_MA: info->i = MA; break;
- case CPUINFO_INT_REGISTER + UPD7810_MB: info->i = MB; break;
- case CPUINFO_INT_REGISTER + UPD7810_MCC: info->i = MCC; break;
- case CPUINFO_INT_REGISTER + UPD7810_MC: info->i = MC; break;
- case CPUINFO_INT_REGISTER + UPD7810_MM: info->i = MM; break;
- case CPUINFO_INT_REGISTER + UPD7810_MF: info->i = MF; break;
- case CPUINFO_INT_REGISTER + UPD7810_TMM: info->i = TMM; break;
- case CPUINFO_INT_REGISTER + UPD7810_ETMM: info->i = ETMM; break;
- case CPUINFO_INT_REGISTER + UPD7810_EOM: info->i = EOM; break;
- case CPUINFO_INT_REGISTER + UPD7810_SML: info->i = SML; break;
- case CPUINFO_INT_REGISTER + UPD7810_SMH: info->i = SMH; break;
- case CPUINFO_INT_REGISTER + UPD7810_ANM: info->i = ANM; break;
- case CPUINFO_INT_REGISTER + UPD7810_MKL: info->i = MKL; break;
- case CPUINFO_INT_REGISTER + UPD7810_MKH: info->i = MKH; break;
- case CPUINFO_INT_REGISTER + UPD7810_ZCM: info->i = ZCM; break;
- case CPUINFO_INT_REGISTER + UPD7810_TXB: info->i = TXB; break;
- case CPUINFO_INT_REGISTER + UPD7810_RXB: info->i = RXB; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR0: info->i = CR0; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR1: info->i = CR1; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR2: info->i = CR2; break;
- case CPUINFO_INT_REGISTER + UPD7810_CR3: info->i = CR3; break;
- case CPUINFO_INT_REGISTER + UPD7810_TXD: info->i = TXD; break;
- case CPUINFO_INT_REGISTER + UPD7810_RXD: info->i = RXD; break;
- case CPUINFO_INT_REGISTER + UPD7810_SCK: info->i = SCK; break;
- case CPUINFO_INT_REGISTER + UPD7810_TI: info->i = TI; break;
- case CPUINFO_INT_REGISTER + UPD7810_TO: info->i = TO; break;
- case CPUINFO_INT_REGISTER + UPD7810_CI: info->i = CI; break;
- case CPUINFO_INT_REGISTER + UPD7810_CO0: info->i = CO0; break;
- case CPUINFO_INT_REGISTER + UPD7810_CO1: info->i = CO1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SP: info->i = SP; break;
+ case CPUINFO_INT_REGISTER + UPD7810_PSW: info->i = PSW; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA: info->i = EA; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA: info->i = VA; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC: info->i = BC; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE: info->i = DE; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL: info->i = HL; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EA2: info->i = EA2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_VA2: info->i = VA2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_BC2: info->i = BC2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_DE2: info->i = DE2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_HL2: info->i = HL2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT0: info->i = CNT0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CNT1: info->i = CNT1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM0: info->i = TM0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TM1: info->i = TM1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECNT: info->i = ECNT; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ECPT: info->i = ECPT; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM0: info->i = ETM0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETM1: info->i = ETM1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MA: info->i = MA; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MB: info->i = MB; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MCC: info->i = MCC; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MC: info->i = MC; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MM: info->i = MM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MF: info->i = MF; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TMM: info->i = TMM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ETMM: info->i = ETMM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_EOM: info->i = EOM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SML: info->i = SML; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SMH: info->i = SMH; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ANM: info->i = ANM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKL: info->i = MKL; break;
+ case CPUINFO_INT_REGISTER + UPD7810_MKH: info->i = MKH; break;
+ case CPUINFO_INT_REGISTER + UPD7810_ZCM: info->i = ZCM; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXB: info->i = TXB; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXB: info->i = RXB; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR0: info->i = CR0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR1: info->i = CR1; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR2: info->i = CR2; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CR3: info->i = CR3; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TXD: info->i = TXD; break;
+ case CPUINFO_INT_REGISTER + UPD7810_RXD: info->i = RXD; break;
+ case CPUINFO_INT_REGISTER + UPD7810_SCK: info->i = SCK; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TI: info->i = TI; break;
+ case CPUINFO_INT_REGISTER + UPD7810_TO: info->i = TO; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CI: info->i = CI; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO0: info->i = CO0; break;
+ case CPUINFO_INT_REGISTER + UPD7810_CO1: info->i = CO1; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(upd7810); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(upd7810); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd7810); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(upd7810); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(upd7810); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7810); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(upd7810); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(upd7810); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd7810); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(upd7810); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(upd7810); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7810); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "uPD7810"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC uPD7810"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "0.3"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "uPD7810"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC uPD7810"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "0.3"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%s:%s:%s:%s:%s:%s",
@@ -2239,58 +2239,58 @@ CPU_GET_INFO( upd7810 )
cpustate->psw & 0x01 ? "CY":"--");
break;
- case CPUINFO_STR_REGISTER + UPD7810_PC: sprintf(info->s, "PC :%04X", cpustate->pc.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_SP: sprintf(info->s, "SP :%04X", cpustate->sp.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_PSW: sprintf(info->s, "PSW :%02X", cpustate->psw); break;
- case CPUINFO_STR_REGISTER + UPD7810_A: sprintf(info->s, "A :%02X", cpustate->va.b.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_V: sprintf(info->s, "V :%02X", cpustate->va.b.h); break;
- case CPUINFO_STR_REGISTER + UPD7810_EA: sprintf(info->s, "EA :%04X", cpustate->ea.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_BC: sprintf(info->s, "BC :%04X", cpustate->bc.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_DE: sprintf(info->s, "DE :%04X", cpustate->de.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_HL: sprintf(info->s, "HL :%04X", cpustate->hl.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_A2: sprintf(info->s, "A' :%02X", cpustate->va2.b.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_V2: sprintf(info->s, "V' :%02X", cpustate->va2.b.h); break;
- case CPUINFO_STR_REGISTER + UPD7810_EA2: sprintf(info->s, "EA' :%04X", cpustate->ea2.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_BC2: sprintf(info->s, "BC' :%04X", cpustate->bc2.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_DE2: sprintf(info->s, "DE' :%04X", cpustate->de2.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_HL2: sprintf(info->s, "HL' :%04X", cpustate->hl2.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_CNT0: sprintf(info->s, "CNT0:%02X", cpustate->cnt.b.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_CNT1: sprintf(info->s, "CNT1:%02X", cpustate->cnt.b.h); break;
- case CPUINFO_STR_REGISTER + UPD7810_TM0: sprintf(info->s, "TM0 :%02X", cpustate->tm.b.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_TM1: sprintf(info->s, "TM1 :%02X", cpustate->tm.b.h); break;
- case CPUINFO_STR_REGISTER + UPD7810_ECNT: sprintf(info->s, "ECNT:%04X", cpustate->ecnt.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_ECPT: sprintf(info->s, "ECPT:%04X", cpustate->ecnt.w.h); break;
- case CPUINFO_STR_REGISTER + UPD7810_ETM0: sprintf(info->s, "ETM0:%04X", cpustate->etm.w.l); break;
- case CPUINFO_STR_REGISTER + UPD7810_ETM1: sprintf(info->s, "ETM1:%04X", cpustate->etm.w.h); break;
- case CPUINFO_STR_REGISTER + UPD7810_MA: sprintf(info->s, "MA :%02X", cpustate->ma); break;
- case CPUINFO_STR_REGISTER + UPD7810_MB: sprintf(info->s, "MB :%02X", cpustate->mb); break;
- case CPUINFO_STR_REGISTER + UPD7810_MCC: sprintf(info->s, "MCC :%02X", cpustate->mcc); break;
- case CPUINFO_STR_REGISTER + UPD7810_MC: sprintf(info->s, "MC :%02X", cpustate->mc); break;
- case CPUINFO_STR_REGISTER + UPD7810_MM: sprintf(info->s, "MM :%02X", cpustate->mm); break;
- case CPUINFO_STR_REGISTER + UPD7810_MF: sprintf(info->s, "MF :%02X", cpustate->mf); break;
- case CPUINFO_STR_REGISTER + UPD7810_TMM: sprintf(info->s, "TMM :%02X", cpustate->tmm); break;
- case CPUINFO_STR_REGISTER + UPD7810_ETMM: sprintf(info->s, "ETMM:%02X", cpustate->etmm); break;
- case CPUINFO_STR_REGISTER + UPD7810_EOM: sprintf(info->s, "EOM :%02X", cpustate->eom); break;
- case CPUINFO_STR_REGISTER + UPD7810_SML: sprintf(info->s, "SML :%02X", cpustate->sml); break;
- case CPUINFO_STR_REGISTER + UPD7810_SMH: sprintf(info->s, "SMH :%02X", cpustate->smh); break;
- case CPUINFO_STR_REGISTER + UPD7810_ANM: sprintf(info->s, "ANM :%02X", cpustate->anm); break;
- case CPUINFO_STR_REGISTER + UPD7810_MKL: sprintf(info->s, "MKL :%02X", cpustate->mkl); break;
- case CPUINFO_STR_REGISTER + UPD7810_MKH: sprintf(info->s, "MKH :%02X", cpustate->mkh); break;
- case CPUINFO_STR_REGISTER + UPD7810_ZCM: sprintf(info->s, "ZCM :%02X", cpustate->zcm); break;
- case CPUINFO_STR_REGISTER + UPD7810_CR0: sprintf(info->s, "CR0 :%02X", cpustate->cr0); break;
- case CPUINFO_STR_REGISTER + UPD7810_CR1: sprintf(info->s, "CR1 :%02X", cpustate->cr1); break;
- case CPUINFO_STR_REGISTER + UPD7810_CR2: sprintf(info->s, "CR2 :%02X", cpustate->cr2); break;
- case CPUINFO_STR_REGISTER + UPD7810_CR3: sprintf(info->s, "CR3 :%02X", cpustate->cr3); break;
- case CPUINFO_STR_REGISTER + UPD7810_RXB: sprintf(info->s, "RXB :%02X", cpustate->rxb); break;
- case CPUINFO_STR_REGISTER + UPD7810_TXB: sprintf(info->s, "TXB :%02X", cpustate->txb); break;
- case CPUINFO_STR_REGISTER + UPD7810_TXD: sprintf(info->s, "TXD :%d", cpustate->txd); break;
- case CPUINFO_STR_REGISTER + UPD7810_RXD: sprintf(info->s, "RXD :%d", cpustate->rxd); break;
- case CPUINFO_STR_REGISTER + UPD7810_SCK: sprintf(info->s, "SCK :%d", cpustate->sck); break;
- case CPUINFO_STR_REGISTER + UPD7810_TI: sprintf(info->s, "TI :%d", cpustate->ti); break;
- case CPUINFO_STR_REGISTER + UPD7810_TO: sprintf(info->s, "TO :%d", cpustate->to); break;
- case CPUINFO_STR_REGISTER + UPD7810_CI: sprintf(info->s, "CI :%d", cpustate->ci); break;
- case CPUINFO_STR_REGISTER + UPD7810_CO0: sprintf(info->s, "CO0 :%d", cpustate->co0 & 1); break;
- case CPUINFO_STR_REGISTER + UPD7810_CO1: sprintf(info->s, "CO1 :%d", cpustate->co1 & 1); break;
+ case CPUINFO_STR_REGISTER + UPD7810_PC: sprintf(info->s, "PC :%04X", cpustate->pc.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SP: sprintf(info->s, "SP :%04X", cpustate->sp.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_PSW: sprintf(info->s, "PSW :%02X", cpustate->psw); break;
+ case CPUINFO_STR_REGISTER + UPD7810_A: sprintf(info->s, "A :%02X", cpustate->va.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_V: sprintf(info->s, "V :%02X", cpustate->va.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_EA: sprintf(info->s, "EA :%04X", cpustate->ea.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_BC: sprintf(info->s, "BC :%04X", cpustate->bc.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_DE: sprintf(info->s, "DE :%04X", cpustate->de.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_HL: sprintf(info->s, "HL :%04X", cpustate->hl.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_A2: sprintf(info->s, "A' :%02X", cpustate->va2.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_V2: sprintf(info->s, "V' :%02X", cpustate->va2.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_EA2: sprintf(info->s, "EA' :%04X", cpustate->ea2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_BC2: sprintf(info->s, "BC' :%04X", cpustate->bc2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_DE2: sprintf(info->s, "DE' :%04X", cpustate->de2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_HL2: sprintf(info->s, "HL' :%04X", cpustate->hl2.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CNT0: sprintf(info->s, "CNT0:%02X", cpustate->cnt.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CNT1: sprintf(info->s, "CNT1:%02X", cpustate->cnt.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TM0: sprintf(info->s, "TM0 :%02X", cpustate->tm.b.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TM1: sprintf(info->s, "TM1 :%02X", cpustate->tm.b.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ECNT: sprintf(info->s, "ECNT:%04X", cpustate->ecnt.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ECPT: sprintf(info->s, "ECPT:%04X", cpustate->ecnt.w.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ETM0: sprintf(info->s, "ETM0:%04X", cpustate->etm.w.l); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ETM1: sprintf(info->s, "ETM1:%04X", cpustate->etm.w.h); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MA: sprintf(info->s, "MA :%02X", cpustate->ma); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MB: sprintf(info->s, "MB :%02X", cpustate->mb); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MCC: sprintf(info->s, "MCC :%02X", cpustate->mcc); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MC: sprintf(info->s, "MC :%02X", cpustate->mc); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MM: sprintf(info->s, "MM :%02X", cpustate->mm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MF: sprintf(info->s, "MF :%02X", cpustate->mf); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TMM: sprintf(info->s, "TMM :%02X", cpustate->tmm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ETMM: sprintf(info->s, "ETMM:%02X", cpustate->etmm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_EOM: sprintf(info->s, "EOM :%02X", cpustate->eom); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SML: sprintf(info->s, "SML :%02X", cpustate->sml); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SMH: sprintf(info->s, "SMH :%02X", cpustate->smh); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ANM: sprintf(info->s, "ANM :%02X", cpustate->anm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MKL: sprintf(info->s, "MKL :%02X", cpustate->mkl); break;
+ case CPUINFO_STR_REGISTER + UPD7810_MKH: sprintf(info->s, "MKH :%02X", cpustate->mkh); break;
+ case CPUINFO_STR_REGISTER + UPD7810_ZCM: sprintf(info->s, "ZCM :%02X", cpustate->zcm); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR0: sprintf(info->s, "CR0 :%02X", cpustate->cr0); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR1: sprintf(info->s, "CR1 :%02X", cpustate->cr1); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR2: sprintf(info->s, "CR2 :%02X", cpustate->cr2); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CR3: sprintf(info->s, "CR3 :%02X", cpustate->cr3); break;
+ case CPUINFO_STR_REGISTER + UPD7810_RXB: sprintf(info->s, "RXB :%02X", cpustate->rxb); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TXB: sprintf(info->s, "TXB :%02X", cpustate->txb); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TXD: sprintf(info->s, "TXD :%d", cpustate->txd); break;
+ case CPUINFO_STR_REGISTER + UPD7810_RXD: sprintf(info->s, "RXD :%d", cpustate->rxd); break;
+ case CPUINFO_STR_REGISTER + UPD7810_SCK: sprintf(info->s, "SCK :%d", cpustate->sck); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TI: sprintf(info->s, "TI :%d", cpustate->ti); break;
+ case CPUINFO_STR_REGISTER + UPD7810_TO: sprintf(info->s, "TO :%d", cpustate->to); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CI: sprintf(info->s, "CI :%d", cpustate->ci); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CO0: sprintf(info->s, "CO0 :%d", cpustate->co0 & 1); break;
+ case CPUINFO_STR_REGISTER + UPD7810_CO1: sprintf(info->s, "CO1 :%d", cpustate->co1 & 1); break;
}
}
@@ -2304,35 +2304,35 @@ CPU_GET_INFO( upd7807 )
switch (state)
{
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd7807); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7807); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd7807); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7807); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "uPD7807"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "uPD7807"); break;
- default: CPU_GET_INFO_CALL(upd7810); break;
+ default: CPU_GET_INFO_CALL(upd7810); break;
}
}
CPU_GET_INFO( upd7801 ) {
switch( state ) {
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd7801); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7801); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd7801); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd7801); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "uPD7801"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "uPD7801"); break;
- default: CPU_GET_INFO_CALL(upd7810); break;
+ default: CPU_GET_INFO_CALL(upd7810); break;
}
}
CPU_GET_INFO( upd78c05 ) {
switch ( state ) {
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 4; break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd78c05); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd78c05); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd78c05); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(upd78c05); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C05"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C05"); break;
/* These registers are not present in the uPD78C05 cpu */
case CPUINFO_STR_REGISTER + UPD7810_A2:
@@ -2366,19 +2366,19 @@ CPU_GET_INFO( upd78c05 ) {
case CPUINFO_STR_REGISTER + UPD7810_TO:
case CPUINFO_STR_REGISTER + UPD7810_CI:
case CPUINFO_STR_REGISTER + UPD7810_CO0:
- case CPUINFO_STR_REGISTER + UPD7810_CO1: break;
+ case CPUINFO_STR_REGISTER + UPD7810_CO1: break;
- default: CPU_GET_INFO_CALL(upd7801); break;
+ default: CPU_GET_INFO_CALL(upd7801); break;
}
}
CPU_GET_INFO( upd78c06 ) {
switch ( state ) {
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd78c06); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(upd78c06); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C06"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "uPD78C06"); break;
- default: CPU_GET_INFO_CALL(upd78c05); break;
+ default: CPU_GET_INFO_CALL(upd78c05); break;
}
}
diff --git a/src/emu/cpu/upd7810/upd7810.h b/src/emu/cpu/upd7810/upd7810.h
index ff4998adeae..1c5124550be 100644
--- a/src/emu/cpu/upd7810/upd7810.h
+++ b/src/emu/cpu/upd7810/upd7810.h
@@ -34,8 +34,8 @@ typedef int (*upd7810_io_callback)(device_t *device, int ioline, int state);
// use it as reset parameter in the Machine struct
struct UPD7810_CONFIG {
- UPD7810_TYPE type;
- upd7810_io_callback io_callback;
+ UPD7810_TYPE type;
+ upd7810_io_callback io_callback;
};
enum
@@ -66,9 +66,9 @@ enum
};
/* IRQ lines */
-#define UPD7810_INTF1 0
-#define UPD7810_INTF2 1
-#define UPD7810_INTF0 2
+#define UPD7810_INTF1 0
+#define UPD7810_INTF2 1
+#define UPD7810_INTF0 2
#define UPD7810_INTFE1 4
DECLARE_LEGACY_CPU_DEVICE(UPD7810, upd7810);
diff --git a/src/emu/cpu/v30mz/v30mz.c b/src/emu/cpu/v30mz/v30mz.c
index 085a718ce99..dadda9c5473 100644
--- a/src/emu/cpu/v30mz/v30mz.c
+++ b/src/emu/cpu/v30mz/v30mz.c
@@ -51,32 +51,32 @@ enum WREGS { AW=0, CW, DW, BW, SP, BP, IX, IY };
#define NEC_NMI_INT_VECTOR 2
enum BREGS {
- AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1),
- AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0),
- CL = NATIVE_ENDIAN_VALUE_LE_BE(0x2, 0x3),
- CH = NATIVE_ENDIAN_VALUE_LE_BE(0x3, 0x2),
- DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5),
- DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
- BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
- BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6),
- SPL = NATIVE_ENDIAN_VALUE_LE_BE(0x8, 0x9),
- SPH = NATIVE_ENDIAN_VALUE_LE_BE(0x9, 0x8),
- BPL = NATIVE_ENDIAN_VALUE_LE_BE(0xa, 0xb),
- BPH = NATIVE_ENDIAN_VALUE_LE_BE(0xb, 0xa),
- IXL = NATIVE_ENDIAN_VALUE_LE_BE(0xc, 0xd),
- IXH = NATIVE_ENDIAN_VALUE_LE_BE(0xd, 0xc),
- IYL = NATIVE_ENDIAN_VALUE_LE_BE(0xe, 0xf),
- IYH = NATIVE_ENDIAN_VALUE_LE_BE(0xf, 0xe)
+ AL = NATIVE_ENDIAN_VALUE_LE_BE(0x0, 0x1),
+ AH = NATIVE_ENDIAN_VALUE_LE_BE(0x1, 0x0),
+ CL = NATIVE_ENDIAN_VALUE_LE_BE(0x2, 0x3),
+ CH = NATIVE_ENDIAN_VALUE_LE_BE(0x3, 0x2),
+ DL = NATIVE_ENDIAN_VALUE_LE_BE(0x4, 0x5),
+ DH = NATIVE_ENDIAN_VALUE_LE_BE(0x5, 0x4),
+ BL = NATIVE_ENDIAN_VALUE_LE_BE(0x6, 0x7),
+ BH = NATIVE_ENDIAN_VALUE_LE_BE(0x7, 0x6),
+ SPL = NATIVE_ENDIAN_VALUE_LE_BE(0x8, 0x9),
+ SPH = NATIVE_ENDIAN_VALUE_LE_BE(0x9, 0x8),
+ BPL = NATIVE_ENDIAN_VALUE_LE_BE(0xa, 0xb),
+ BPH = NATIVE_ENDIAN_VALUE_LE_BE(0xb, 0xa),
+ IXL = NATIVE_ENDIAN_VALUE_LE_BE(0xc, 0xd),
+ IXH = NATIVE_ENDIAN_VALUE_LE_BE(0xd, 0xc),
+ IYL = NATIVE_ENDIAN_VALUE_LE_BE(0xe, 0xf),
+ IYH = NATIVE_ENDIAN_VALUE_LE_BE(0xf, 0xe)
};
-#define CF (m_CarryVal!=0)
-#define SF (m_SignVal<0)
-#define ZF (m_ZeroVal==0)
-#define PF m_parity_table[(UINT8)m_ParityVal]
-#define AF (m_AuxVal!=0)
-#define OF (m_OverVal!=0)
-#define MD (m_MF!=0)
+#define CF (m_CarryVal!=0)
+#define SF (m_SignVal<0)
+#define ZF (m_ZeroVal==0)
+#define PF m_parity_table[(UINT8)m_ParityVal]
+#define AF (m_AuxVal!=0)
+#define OF (m_OverVal!=0)
+#define MD (m_MF!=0)
/***************************************************************************/
@@ -207,7 +207,7 @@ void v30mz_cpu_device::state_string_export(const device_state_entry &entry, astr
flags & 0x0002 ? 'N':'.',
flags & 0x0001 ? 'C':'.');
}
- break;
+ break;
}
}
@@ -522,7 +522,7 @@ inline void v30mz_cpu_device::PutbackRMWord(UINT16 data)
{
m_regs.w[ m_Mod_RM.RM.w[ m_modrm ] ] = data;
}
- else
+ else
{
write_word( m_ea, data );
}
@@ -1199,44 +1199,44 @@ inline void v30mz_cpu_device::JMP(bool cond)
inline void v30mz_cpu_device::ADJ4(INT8 param1,INT8 param2)
{
- if (AF || ((m_regs.b[AL] & 0xf) > 9))
- {
- UINT16 tmp;
- tmp = m_regs.b[AL] + param1;
- m_regs.b[AL] = tmp;
- m_AuxVal = 1;
- m_CarryVal |= tmp & 0x100;
- }
- if (CF || (m_regs.b[AL]>0x9f))
- {
- m_regs.b[AL] += param2;
- m_CarryVal = 1;
- }
- set_SZPF_Byte(m_regs.b[AL]);
+ if (AF || ((m_regs.b[AL] & 0xf) > 9))
+ {
+ UINT16 tmp;
+ tmp = m_regs.b[AL] + param1;
+ m_regs.b[AL] = tmp;
+ m_AuxVal = 1;
+ m_CarryVal |= tmp & 0x100;
+ }
+ if (CF || (m_regs.b[AL]>0x9f))
+ {
+ m_regs.b[AL] += param2;
+ m_CarryVal = 1;
+ }
+ set_SZPF_Byte(m_regs.b[AL]);
}
inline void v30mz_cpu_device::ADJB(INT8 param1, INT8 param2)
{
- if (AF || ((m_regs.b[AL] & 0xf) > 9))
- {
- m_regs.b[AL] += param1;
- m_regs.b[AH] += param2;
- m_AuxVal = 1;
- m_CarryVal = 1;
- }
- else
- {
- m_AuxVal = 0;
- m_CarryVal = 0;
- }
- m_regs.b[AL] &= 0x0F;
+ if (AF || ((m_regs.b[AL] & 0xf) > 9))
+ {
+ m_regs.b[AL] += param1;
+ m_regs.b[AH] += param2;
+ m_AuxVal = 1;
+ m_CarryVal = 1;
+ }
+ else
+ {
+ m_AuxVal = 0;
+ m_CarryVal = 0;
+ }
+ m_regs.b[AL] &= 0x0F;
}
void v30mz_cpu_device::interrupt(int int_num)
{
- PUSH( CompressFlags() );
+ PUSH( CompressFlags() );
CLK(2);
m_TF = m_IF = 0;
@@ -1266,7 +1266,7 @@ void v30mz_cpu_device::execute_set_input( int inptnum, int state )
{
return;
}
- m_nmi_state = state;
+ m_nmi_state = state;
if (state != CLEAR_LINE)
{
m_pending_irq |= NMI_IRQ;
@@ -1456,56 +1456,56 @@ void v30mz_cpu_device::execute_run()
switch ( fetch() )
{
- case 0x10: /* Test */
+ case 0x10: /* Test */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = m_regs.b[CL] & 0x7;
m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0;
m_CarryVal = m_OverVal = 0;
break;
- case 0x11: /* Test */
+ case 0x11: /* Test */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = m_regs.b[CL] & 0xf;
m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0;
m_CarryVal = m_OverVal = 0;
break;
- case 0x12: /* Clr */
+ case 0x12: /* Clr */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = m_regs.b[CL] & 0x7;
tmp &= ~(1<<tmp2);
PutbackRMByte(tmp);
break;
- case 0x13: /* Clr */
+ case 0x13: /* Clr */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = m_regs.b[CL] & 0xf;
tmp &= ~(1<<tmp2);
PutbackRMWord(tmp);
break;
- case 0x14: /* Set */
+ case 0x14: /* Set */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = m_regs.b[CL] & 0x7;
tmp |= (1<<tmp2);
PutbackRMByte(tmp);
break;
- case 0x15: /* Set */
+ case 0x15: /* Set */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = m_regs.b[CL] & 0xf;
tmp |= (1<<tmp2);
PutbackRMWord(tmp);
break;
- case 0x16: /* Not */
+ case 0x16: /* Not */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = m_regs.b[CL] & 0x7;
tmp ^= (1 << tmp2);
PutbackRMByte(tmp);
break;
- case 0x17: /* Not */
+ case 0x17: /* Not */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = m_regs.b[CL] & 0xf;
@@ -1513,56 +1513,56 @@ void v30mz_cpu_device::execute_run()
PutbackRMWord(tmp);
break;
- case 0x18: /* Test */
+ case 0x18: /* Test */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = fetch() & 0x7;
m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0;
m_CarryVal = m_OverVal = 0;
break;
- case 0x19: /* Test */
+ case 0x19: /* Test */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = fetch() & 0xf;
m_ZeroVal = (tmp & (1<<tmp2)) ? 1 : 0;
m_CarryVal = m_OverVal = 0;
break;
- case 0x1a: /* Clr */
+ case 0x1a: /* Clr */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = fetch() & 0x7;
tmp &= ~(1<<tmp2);
PutbackRMByte(tmp);
break;
- case 0x1b: /* Clr */
+ case 0x1b: /* Clr */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = fetch() & 0xf;
tmp &= ~(1<<tmp2);
PutbackRMWord(tmp);
break;
- case 0x1c: /* Set */
+ case 0x1c: /* Set */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = fetch() & 0x7;
tmp |= (1<<tmp2);
PutbackRMByte(tmp);
break;
- case 0x1d: /* Set */
+ case 0x1d: /* Set */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = fetch() & 0xf;
tmp |= (1<<tmp2);
PutbackRMWord(tmp);
break;
- case 0x1e: /* Not */
+ case 0x1e: /* Not */
m_modrm = fetch();
tmp = GetRMByte();
tmp2 = fetch() & 0x7;
tmp ^= (1 << tmp2);
PutbackRMByte(tmp);
break;
- case 0x1f: /* Not */
+ case 0x1f: /* Not */
m_modrm = fetch();
tmp = GetRMWord();
tmp2 = fetch() & 0xf;
@@ -1703,7 +1703,7 @@ void v30mz_cpu_device::execute_run()
m_modrm = fetch(); m_modrm = 0; logerror("%s: %06x: Unimplemented bitfield INS\n", tag(), pc()); break;
case 0x33:
m_modrm = fetch(); m_modrm = 0; logerror("%s: %06x: Unimplemented bitfield EXT\n", tag(), pc()); break;
- case 0x92: /* V25/35 FINT */
+ case 0x92: /* V25/35 FINT */
CLK(2);
break;
case 0xe0:
@@ -2242,7 +2242,7 @@ void v30mz_cpu_device::execute_run()
m_regs.w[IY] = POP();
m_regs.w[IX] = POP();
m_regs.w[BP] = POP();
- POP();
+ POP();
m_regs.w[BW] = POP();
m_regs.w[DW] = POP();
m_regs.w[CW] = POP();
@@ -2277,20 +2277,20 @@ void v30mz_cpu_device::execute_run()
switch (next)
{
- case 0x6c: CLK(2); if (c) do { i_insb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6d: CLK(2); if (c) do { i_insw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6e: CLK(2); if (c) do { i_outsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6f: CLK(2); if (c) do { i_outsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa4: CLK(2); if (c) do { i_movsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa5: CLK(2); if (c) do { i_movsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa6: CLK(2); if (c) do { i_cmpsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa7: CLK(2); if (c) do { i_cmpsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaa: CLK(2); if (c) do { i_stosb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xab: CLK(2); if (c) do { i_stosw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xac: CLK(2); if (c) do { i_lodsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xad: CLK(2); if (c) do { i_lodsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xae: CLK(2); if (c) do { i_scasb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6c: CLK(2); if (c) do { i_insb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6d: CLK(2); if (c) do { i_insw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6e: CLK(2); if (c) do { i_outsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6f: CLK(2); if (c) do { i_outsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa4: CLK(2); if (c) do { i_movsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa5: CLK(2); if (c) do { i_movsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa6: CLK(2); if (c) do { i_cmpsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa7: CLK(2); if (c) do { i_cmpsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaa: CLK(2); if (c) do { i_stosb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xab: CLK(2); if (c) do { i_stosw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xac: CLK(2); if (c) do { i_lodsb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xad: CLK(2); if (c) do { i_lodsw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xae: CLK(2); if (c) do { i_scasb(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && !CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
default:
logerror("%s: %06x: REPNC invalid\n", tag(), pc() );
// Decrement IP so the normal instruction will be executed next
@@ -2308,20 +2308,20 @@ void v30mz_cpu_device::execute_run()
switch (next)
{
- case 0x6c: CLK(2); if (c) do { i_insb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6d: CLK(2); if (c) do { i_insw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6e: CLK(2); if (c) do { i_outsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6f: CLK(2); if (c) do { i_outsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa4: CLK(2); if (c) do { i_movsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa5: CLK(2); if (c) do { i_movsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa6: CLK(2); if (c) do { i_cmpsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa7: CLK(2); if (c) do { i_cmpsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaa: CLK(2); if (c) do { i_stosb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xab: CLK(2); if (c) do { i_stosw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xac: CLK(2); if (c) do { i_lodsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xad: CLK(2); if (c) do { i_lodsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xae: CLK(2); if (c) do { i_scasb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6c: CLK(2); if (c) do { i_insb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6d: CLK(2); if (c) do { i_insw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6e: CLK(2); if (c) do { i_outsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6f: CLK(2); if (c) do { i_outsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa4: CLK(2); if (c) do { i_movsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa5: CLK(2); if (c) do { i_movsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa6: CLK(2); if (c) do { i_cmpsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa7: CLK(2); if (c) do { i_cmpsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaa: CLK(2); if (c) do { i_stosb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xab: CLK(2); if (c) do { i_stosw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xac: CLK(2); if (c) do { i_lodsb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xad: CLK(2); if (c) do { i_lodsw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xae: CLK(2); if (c) do { i_scasb(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaf: CLK(2); if (c) do { i_scasw(); c--; } while (c>0 && CF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
default:
logerror("%s: %06x: REPC invalid\n", tag(), pc());
// Decrement IP so the normal instruction will be executed next
@@ -2457,14 +2457,14 @@ void v30mz_cpu_device::execute_run()
else { CLK(3); }
switch (m_modrm & 0x38)
{
- case 0x00: ADDB(); PutbackRMByte(m_dst); break;
- case 0x08: ORB(); PutbackRMByte(m_dst); break;
- case 0x10: m_src += CF ? 1 : 0; ADDB(); PutbackRMByte(m_dst); break;
- case 0x18: m_src += CF ? 1 : 0; SUBB(); PutbackRMByte(m_dst); break;
- case 0x20: ANDB(); PutbackRMByte(m_dst); break;
- case 0x28: SUBB(); PutbackRMByte(m_dst); break;
- case 0x30: XORB(); PutbackRMByte(m_dst); break;
- case 0x38: SUBB(); break; /* CMP */
+ case 0x00: ADDB(); PutbackRMByte(m_dst); break;
+ case 0x08: ORB(); PutbackRMByte(m_dst); break;
+ case 0x10: m_src += CF ? 1 : 0; ADDB(); PutbackRMByte(m_dst); break;
+ case 0x18: m_src += CF ? 1 : 0; SUBB(); PutbackRMByte(m_dst); break;
+ case 0x20: ANDB(); PutbackRMByte(m_dst); break;
+ case 0x28: SUBB(); PutbackRMByte(m_dst); break;
+ case 0x30: XORB(); PutbackRMByte(m_dst); break;
+ case 0x38: SUBB(); break; /* CMP */
}
break;
@@ -2478,14 +2478,14 @@ void v30mz_cpu_device::execute_run()
else { CLK(3); }
switch (m_modrm & 0x38)
{
- case 0x00: ADDW(); PutbackRMWord(m_dst); break;
- case 0x08: ORW(); PutbackRMWord(m_dst); break;
- case 0x10: m_src += CF ? 1 : 0; ADDW(); PutbackRMWord(m_dst); break;
- case 0x18: m_src += CF ? 1 : 0; SUBW(); PutbackRMWord(m_dst); break;
- case 0x20: ANDW(); PutbackRMWord(m_dst); break;
- case 0x28: SUBW(); PutbackRMWord(m_dst); break;
- case 0x30: XORW(); PutbackRMWord(m_dst); break;
- case 0x38: SUBW(); break; /* CMP */
+ case 0x00: ADDW(); PutbackRMWord(m_dst); break;
+ case 0x08: ORW(); PutbackRMWord(m_dst); break;
+ case 0x10: m_src += CF ? 1 : 0; ADDW(); PutbackRMWord(m_dst); break;
+ case 0x18: m_src += CF ? 1 : 0; SUBW(); PutbackRMWord(m_dst); break;
+ case 0x20: ANDW(); PutbackRMWord(m_dst); break;
+ case 0x28: SUBW(); PutbackRMWord(m_dst); break;
+ case 0x30: XORW(); PutbackRMWord(m_dst); break;
+ case 0x38: SUBW(); break; /* CMP */
}
break;
@@ -2499,13 +2499,13 @@ void v30mz_cpu_device::execute_run()
else { CLK(3); }
switch (m_modrm & 0x38)
{
- case 0x00: ADDB(); PutbackRMByte(m_dst); break;
- case 0x08: ORB(); PutbackRMByte(m_dst); break;
- case 0x10: m_src += CF ? 1 : 0; ADDB(); PutbackRMByte(m_dst); break;
- case 0x18: m_src += CF ? 1 : 0; SUBB(); PutbackRMByte(m_dst); break;
- case 0x20: ANDB(); PutbackRMByte(m_dst); break;
- case 0x28: SUBB(); PutbackRMByte(m_dst); break;
- case 0x30: XORB(); PutbackRMByte(m_dst); break;
+ case 0x00: ADDB(); PutbackRMByte(m_dst); break;
+ case 0x08: ORB(); PutbackRMByte(m_dst); break;
+ case 0x10: m_src += CF ? 1 : 0; ADDB(); PutbackRMByte(m_dst); break;
+ case 0x18: m_src += CF ? 1 : 0; SUBB(); PutbackRMByte(m_dst); break;
+ case 0x20: ANDB(); PutbackRMByte(m_dst); break;
+ case 0x28: SUBB(); PutbackRMByte(m_dst); break;
+ case 0x30: XORB(); PutbackRMByte(m_dst); break;
case 0x38: SUBB(); break; /* CMP */
}
break;
@@ -2606,16 +2606,16 @@ void v30mz_cpu_device::execute_run()
CLKM(2,3);
switch (m_modrm & 0x38)
{
- case 0x00: /* mov es,ew */
+ case 0x00: /* mov es,ew */
m_sregs[ES] = m_src;
break;
- case 0x08: /* mov cs,ew */
+ case 0x08: /* mov cs,ew */
m_sregs[CS] = m_src;
break;
- case 0x10: /* mov ss,ew */
+ case 0x10: /* mov ss,ew */
m_sregs[SS] = m_src;
break;
- case 0x18: /* mov ds,ew */
+ case 0x18: /* mov ds,ew */
m_sregs[DS] = m_src;
break;
default:
@@ -3356,20 +3356,20 @@ void v30mz_cpu_device::execute_run()
switch (next)
{
- case 0x6c: CLK(3); if (c) do { i_insb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6d: CLK(3); if (c) do { i_insw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6e: CLK(3); if (c) do { i_outsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6f: CLK(3); if (c) do { i_outsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa4: CLK(3); if (c) do { i_movsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa5: CLK(3); if (c) do { i_movsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa6: CLK(3); if (c) do { i_cmpsb(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa7: CLK(3); if (c) do { i_cmpsw(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaa: CLK(3); if (c) do { i_stosb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xab: CLK(3); if (c) do { i_stosw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xac: CLK(3); if (c) do { i_lodsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xad: CLK(3); if (c) do { i_lodsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xae: CLK(3); if (c) do { i_scasb(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaf: CLK(3); if (c) do { i_scasw(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6c: CLK(3); if (c) do { i_insb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6d: CLK(3); if (c) do { i_insw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6e: CLK(3); if (c) do { i_outsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6f: CLK(3); if (c) do { i_outsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa4: CLK(3); if (c) do { i_movsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa5: CLK(3); if (c) do { i_movsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa6: CLK(3); if (c) do { i_cmpsb(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa7: CLK(3); if (c) do { i_cmpsw(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaa: CLK(3); if (c) do { i_stosb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xab: CLK(3); if (c) do { i_stosw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xac: CLK(3); if (c) do { i_lodsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xad: CLK(3); if (c) do { i_lodsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xae: CLK(3); if (c) do { i_scasb(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaf: CLK(3); if (c) do { i_scasw(); c--; } while (c>0 && !ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
default:
logerror("%s: %06x: REPNE invalid\n", tag(), pc());
// Decrement IP so the normal instruction will be executed next
@@ -3386,20 +3386,20 @@ void v30mz_cpu_device::execute_run()
switch (next)
{
- case 0x6c: CLK(3); if (c) do { i_insb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6d: CLK(3); if (c) do { i_insw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6e: CLK(3); if (c) do { i_outsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0x6f: CLK(3); if (c) do { i_outsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa4: CLK(3); if (c) do { i_movsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa5: CLK(3); if (c) do { i_movsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa6: CLK(3); if (c) do { i_cmpsb(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xa7: CLK(3); if (c) do { i_cmpsw(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaa: CLK(3); if (c) do { i_stosb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xab: CLK(3); if (c) do { i_stosw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xac: CLK(3); if (c) do { i_lodsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xad: CLK(3); if (c) do { i_lodsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xae: CLK(3); if (c) do { i_scasb(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
- case 0xaf: CLK(3); if (c) do { i_scasw(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6c: CLK(3); if (c) do { i_insb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6d: CLK(3); if (c) do { i_insw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6e: CLK(3); if (c) do { i_outsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0x6f: CLK(3); if (c) do { i_outsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa4: CLK(3); if (c) do { i_movsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa5: CLK(3); if (c) do { i_movsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa6: CLK(3); if (c) do { i_cmpsb(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xa7: CLK(3); if (c) do { i_cmpsw(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaa: CLK(3); if (c) do { i_stosb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xab: CLK(3); if (c) do { i_stosw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xac: CLK(3); if (c) do { i_lodsb(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xad: CLK(3); if (c) do { i_lodsw(); c--; } while (c>0); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xae: CLK(3); if (c) do { i_scasb(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
+ case 0xaf: CLK(3); if (c) do { i_scasw(); c--; } while (c>0 && ZF); m_regs.w[CW]=c; m_seg_prefix = false; m_seg_prefix_next = false; break;
default:
logerror("%s: %06x: REPE invalid\n", tag(), pc());
// Decrement IP so the normal instruction will be executed next
@@ -3429,7 +3429,7 @@ void v30mz_cpu_device::execute_run()
tmp = GetRMByte();
switch ( m_modrm & 0x38 )
{
- case 0x00: /* TEST */
+ case 0x00: /* TEST */
tmp &= fetch();
m_CarryVal = m_OverVal = 0;
set_SZPF_Byte(tmp);
@@ -3438,30 +3438,30 @@ void v30mz_cpu_device::execute_run()
case 0x08:
logerror("%s: %06x: Undefined opcode 0xf6 0x08\n", tag(), pc());
break;
- case 0x10: /* NOT */
+ case 0x10: /* NOT */
PutbackRMByte(~tmp);
CLKM(1,3);
break;
- case 0x18: /* NEG */
+ case 0x18: /* NEG */
m_CarryVal = (tmp!=0) ? 1 : 0;
tmp = (~tmp)+1;
set_SZPF_Byte(tmp);
PutbackRMByte(tmp&0xff);
CLKM(1,3);
break;
- case 0x20: /* MULU */
+ case 0x20: /* MULU */
uresult = m_regs.b[AL] * tmp;
m_regs.w[AW] = (UINT16)uresult;
m_CarryVal = m_OverVal = (m_regs.b[AH]!=0) ? 1 : 0;
CLKM(3,4);
break;
- case 0x28: /* MUL */
+ case 0x28: /* MUL */
result = (INT16)((INT8)m_regs.b[AL])*(INT16)((INT8)tmp);
m_regs.w[AW] = (UINT16)result;
m_CarryVal = m_OverVal = (m_regs.b[AH]!=0) ? 1 : 0;
CLKM(3,4);
break;
- case 0x30: /* DIVU */
+ case 0x30: /* DIVU */
if (tmp)
{
uresult = m_regs.w[AW];
@@ -3482,7 +3482,7 @@ void v30mz_cpu_device::execute_run()
}
CLKM(15,16);
break;
- case 0x38: /* DIV */
+ case 0x38: /* DIV */
if (tmp)
{
result = (INT16)m_regs.w[AW];
@@ -3518,7 +3518,7 @@ void v30mz_cpu_device::execute_run()
tmp = GetRMWord();
switch ( m_modrm & 0x38 )
{
- case 0x00: /* TEST */
+ case 0x00: /* TEST */
tmp2 = fetch_word();
tmp &= tmp2;
m_CarryVal = m_OverVal = 0;
@@ -3528,32 +3528,32 @@ void v30mz_cpu_device::execute_run()
case 0x08:
logerror("%s: %06x: Undefined opcode 0xf7 0x08\n", tag(), pc());
break;
- case 0x10: /* NOT */
+ case 0x10: /* NOT */
PutbackRMWord(~tmp);
CLKM(1,3);
break;
- case 0x18: /* NEG */
+ case 0x18: /* NEG */
m_CarryVal = (tmp!=0) ? 1 : 0;
tmp = (~tmp) + 1;
set_SZPF_Word(tmp);
PutbackRMWord(tmp);
CLKM(1,3);
break;
- case 0x20: /* MULU */
+ case 0x20: /* MULU */
uresult = m_regs.w[AW]*tmp;
m_regs.w[AW] = uresult & 0xffff;
m_regs.w[DW] = ((UINT32)uresult)>>16;
m_CarryVal = m_OverVal = (m_regs.w[DW] != 0) ? 1 : 0;
CLKM(3,4);
break;
- case 0x28: /* MUL */
+ case 0x28: /* MUL */
result = (INT32)((INT16)m_regs.w[AW]) * (INT32)((INT16)tmp);
m_regs.w[AW] = result & 0xffff;
m_regs.w[DW] = result >> 16;
m_CarryVal = m_OverVal = (m_regs.w[DW] != 0) ? 1 : 0;
CLKM(3,4);
break;
- case 0x30: /* DIVU */
+ case 0x30: /* DIVU */
if (tmp)
{
uresult = (((UINT32)m_regs.w[DW]) << 16) | m_regs.w[AW];
@@ -3574,7 +3574,7 @@ void v30mz_cpu_device::execute_run()
}
CLKM(23,24);
break;
- case 0x38: /* DIV */
+ case 0x38: /* DIV */
if (tmp)
{
result = ((UINT32)m_regs.w[DW] << 16) + m_regs.w[AW];
@@ -3637,7 +3637,7 @@ void v30mz_cpu_device::execute_run()
tmp = GetRMByte();
switch ( m_modrm & 0x38 )
{
- case 0x00: /* INC */
+ case 0x00: /* INC */
tmp1 = tmp+1;
m_OverVal = (tmp==0x7f);
set_AF(tmp1,tmp,1);
@@ -3645,7 +3645,7 @@ void v30mz_cpu_device::execute_run()
PutbackRMByte(tmp1);
CLKM(1,3);
break;
- case 0x08: /* DEC */
+ case 0x08: /* DEC */
tmp1 = tmp-1;
m_OverVal = (tmp==0x80);
set_AF(tmp1,tmp,1);
@@ -3667,7 +3667,7 @@ void v30mz_cpu_device::execute_run()
tmp = GetRMWord();
switch ( m_modrm & 0x38 )
{
- case 0x00: /* INC */
+ case 0x00: /* INC */
tmp1 = tmp+1;
m_OverVal = (tmp==0x7fff);
set_AF(tmp1,tmp,1);
@@ -3675,7 +3675,7 @@ void v30mz_cpu_device::execute_run()
PutbackRMWord(tmp1);
CLKM(1,3);
break;
- case 0x08: /* DEC */
+ case 0x08: /* DEC */
tmp1 = tmp-1;
m_OverVal = (tmp==0x8000);
set_AF(tmp1,tmp,1);
@@ -3683,12 +3683,12 @@ void v30mz_cpu_device::execute_run()
PutbackRMWord(tmp1);
CLKM(1,3);
break;
- case 0x10: /* CALL */
+ case 0x10: /* CALL */
PUSH(m_ip);
m_ip = tmp;
CLKM(5,6);
break;
- case 0x18: /* CALL FAR */
+ case 0x18: /* CALL FAR */
tmp1 = m_sregs[CS];
m_sregs[CS] = GetnextRMWord();
PUSH(tmp1);
@@ -3696,11 +3696,11 @@ void v30mz_cpu_device::execute_run()
m_ip = tmp;
CLKM(5,12);
break;
- case 0x20: /* JMP */
+ case 0x20: /* JMP */
m_ip = tmp;
CLKM(4,5);
break;
- case 0x28: /* JMP FAR */
+ case 0x28: /* JMP FAR */
m_ip = tmp;
m_sregs[CS] = GetnextRMWord();
CLK(10);
@@ -3724,4 +3724,3 @@ void v30mz_cpu_device::execute_run()
}
}
}
-
diff --git a/src/emu/cpu/v30mz/v30mz.h b/src/emu/cpu/v30mz/v30mz.h
index f62b5f68581..4c4ac750acf 100644
--- a/src/emu/cpu/v30mz/v30mz.h
+++ b/src/emu/cpu/v30mz/v30mz.h
@@ -4,7 +4,7 @@
struct nec_config
{
- const UINT8* v25v35_decryptiontable; // internal decryption table
+ const UINT8* v25v35_decryptiontable; // internal decryption table
};
enum
@@ -173,19 +173,19 @@ protected:
UINT16 w[8]; /* viewed as 16 bits registers */
UINT8 b[16]; /* or as 8 bit registers */
} m_regs;
- UINT16 m_sregs[4];
+ UINT16 m_sregs[4];
- UINT16 m_ip;
+ UINT16 m_ip;
- INT32 m_SignVal;
+ INT32 m_SignVal;
UINT32 m_AuxVal, m_OverVal, m_ZeroVal, m_CarryVal, m_ParityVal; /* 0 or non-0 valued flags */
- UINT8 m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
- UINT32 m_int_vector;
- UINT32 m_pending_irq;
- UINT32 m_nmi_state;
- UINT32 m_irq_state;
- UINT8 m_no_interrupt;
- UINT8 m_fire_trap;
+ UINT8 m_TF, m_IF, m_DF, m_MF; /* 0 or 1 valued flags */ /* OB[19.07.99] added Mode Flag V30 */
+ UINT32 m_int_vector;
+ UINT32 m_pending_irq;
+ UINT32 m_nmi_state;
+ UINT32 m_irq_state;
+ UINT8 m_no_interrupt;
+ UINT8 m_fire_trap;
device_irq_acknowledge_callback m_irq_callback;
address_space *m_program;
@@ -193,19 +193,19 @@ protected:
address_space *m_io;
int m_icount;
- UINT32 m_prefix_base; /* base address of the latest prefix segment */
- bool m_seg_prefix; /* prefix segment indicator */
- bool m_seg_prefix_next; /* prefix segment for next instruction */
+ UINT32 m_prefix_base; /* base address of the latest prefix segment */
+ bool m_seg_prefix; /* prefix segment indicator */
+ bool m_seg_prefix_next; /* prefix segment for next instruction */
UINT32 m_ea;
UINT16 m_eo;
UINT16 m_e16;
// Used during execution of instructions
- UINT8 m_modrm;
- UINT32 m_dst;
- UINT32 m_src;
- UINT32 m_pc;
+ UINT8 m_modrm;
+ UINT32 m_dst;
+ UINT32 m_src;
+ UINT32 m_pc;
// Lookup tables
UINT8 m_parity_table[256];
diff --git a/src/emu/cpu/v60/am.c b/src/emu/cpu/v60/am.c
index 3d5c17171eb..f237844f8e6 100644
--- a/src/emu/cpu/v60/am.c
+++ b/src/emu/cpu/v60/am.c
@@ -80,5 +80,3 @@ static UINT32 WriteAM(v60_state *cpustate)
cpustate->modval = OpRead8(cpustate, cpustate->modadd);
return AMTable3[cpustate->modm][cpustate->modval >> 5](cpustate);
}
-
-
diff --git a/src/emu/cpu/v60/am1.c b/src/emu/cpu/v60/am1.c
index 40548d70835..6969b46820f 100644
--- a/src/emu/cpu/v60/am1.c
+++ b/src/emu/cpu/v60/am1.c
@@ -1231,19 +1231,19 @@ static UINT32 (*const AMTable1_G7[32])(v60_state *) =
am1PCDisplacement8,
am1PCDisplacement16,
am1PCDisplacement32,
- am1DirectAddress,
+ am1DirectAddress,
am1Immediate,
am1Error2,
am1Error2,
am1Error2,
- am1PCDisplacementIndirect8,
- am1PCDisplacementIndirect16,
- am1PCDisplacementIndirect32,
+ am1PCDisplacementIndirect8,
+ am1PCDisplacementIndirect16,
+ am1PCDisplacementIndirect32,
am1DirectAddressDeferred,
am1PCDoubleDisplacement8,
am1PCDoubleDisplacement16,
am1PCDoubleDisplacement32,
- am1Error2
+ am1Error2
};
static UINT32 (*const BAMTable1_G7[32])(v60_state *) =
@@ -1267,19 +1267,19 @@ static UINT32 (*const BAMTable1_G7[32])(v60_state *) =
bam1PCDisplacement8,
bam1PCDisplacement16,
bam1PCDisplacement32,
- bam1DirectAddress,
+ bam1DirectAddress,
bam1Error6,
bam1Error2,
bam1Error2,
bam1Error2,
- bam1PCDisplacementIndirect8,
- bam1PCDisplacementIndirect16,
- bam1PCDisplacementIndirect32,
+ bam1PCDisplacementIndirect8,
+ bam1PCDisplacementIndirect16,
+ bam1PCDisplacementIndirect32,
bam1DirectAddressDeferred,
bam1PCDoubleDisplacement8,
bam1PCDoubleDisplacement16,
bam1PCDoubleDisplacement32,
- bam1Error2
+ bam1Error2
};
@@ -1382,7 +1382,3 @@ static UINT32 (*const BAMTable1[2][8])(v60_state *) =
bam1Error1
}
};
-
-
-
-
diff --git a/src/emu/cpu/v60/am2.c b/src/emu/cpu/v60/am2.c
index 3524b559402..c682a42df49 100644
--- a/src/emu/cpu/v60/am2.c
+++ b/src/emu/cpu/v60/am2.c
@@ -1251,7 +1251,3 @@ static UINT32 (*const BAMTable2[2][8])(v60_state *) =
bam2Error1
}
};
-
-
-
-
diff --git a/src/emu/cpu/v60/am3.c b/src/emu/cpu/v60/am3.c
index 84c7ec6a958..3857bb3bb4a 100644
--- a/src/emu/cpu/v60/am3.c
+++ b/src/emu/cpu/v60/am3.c
@@ -814,19 +814,19 @@ static UINT32 (*const AMTable3_G7[32])(v60_state *) =
am3PCDisplacement8,
am3PCDisplacement16,
am3PCDisplacement32,
- am3DirectAddress,
+ am3DirectAddress,
am3Immediate,
am3Error2,
am3Error2,
am3Error2,
- am3PCDisplacementIndirect8,
- am3PCDisplacementIndirect16,
- am3PCDisplacementIndirect32,
+ am3PCDisplacementIndirect8,
+ am3PCDisplacementIndirect16,
+ am3PCDisplacementIndirect32,
am3DirectAddressDeferred,
am3PCDoubleDisplacement8,
am3PCDoubleDisplacement16,
am3PCDoubleDisplacement32,
- am3Error2
+ am3Error2
};
static UINT32 (*const AMTable3_G6[8])(v60_state *) =
@@ -882,6 +882,3 @@ static UINT32 (*const AMTable3[2][8])(v60_state *) =
am3Error1
}
};
-
-
-
diff --git a/src/emu/cpu/v60/op12.c b/src/emu/cpu/v60/op12.c
index f8e999cd4e1..cfae254d48b 100644
--- a/src/emu/cpu/v60/op12.c
+++ b/src/emu/cpu/v60/op12.c
@@ -16,40 +16,40 @@
* Macro to access data in operands decoded with ReadAMAddress(cpustate)
*/
-#define F12LOADOPBYTE(cs, num) \
- if ((cs)->flag##num) \
- appb = (UINT8)(cs)->reg[(cs)->op##num]; \
- else \
+#define F12LOADOPBYTE(cs, num) \
+ if ((cs)->flag##num) \
+ appb = (UINT8)(cs)->reg[(cs)->op##num]; \
+ else \
appb = (cs)->program->read_byte((cs)->op##num);
-#define F12LOADOPHALF(cs, num) \
- if ((cs)->flag##num) \
- apph = (UINT16)(cs)->reg[(cs)->op##num]; \
- else \
+#define F12LOADOPHALF(cs, num) \
+ if ((cs)->flag##num) \
+ apph = (UINT16)(cs)->reg[(cs)->op##num]; \
+ else \
apph = (cs)->program->read_word_unaligned((cs)->op##num);
-#define F12LOADOPWORD(cs, num) \
- if ((cs)->flag##num) \
- appw = (cs)->reg[(cs)->op##num]; \
- else \
+#define F12LOADOPWORD(cs, num) \
+ if ((cs)->flag##num) \
+ appw = (cs)->reg[(cs)->op##num]; \
+ else \
appw = (cs)->program->read_dword_unaligned((cs)->op##num);
-#define F12STOREOPBYTE(cs, num) \
- if ((cs)->flag##num) \
- SETREG8((cs)->reg[(cs)->op##num], appb); \
- else \
+#define F12STOREOPBYTE(cs, num) \
+ if ((cs)->flag##num) \
+ SETREG8((cs)->reg[(cs)->op##num], appb); \
+ else \
(cs)->program->write_byte((cs)->op##num, appb);
-#define F12STOREOPHALF(cs, num) \
- if ((cs)->flag##num) \
- SETREG16((cs)->reg[(cs)->op##num], apph); \
- else \
+#define F12STOREOPHALF(cs, num) \
+ if ((cs)->flag##num) \
+ SETREG16((cs)->reg[(cs)->op##num], apph); \
+ else \
(cs)->program->write_word_unaligned((cs)->op##num, apph);
-#define F12STOREOPWORD(cs, num) \
- if ((cs)->flag##num) \
- (cs)->reg[(cs)->op##num] = appw; \
- else \
+#define F12STOREOPWORD(cs, num) \
+ if ((cs)->flag##num) \
+ (cs)->reg[(cs)->op##num] = appw; \
+ else \
(cs)->program->write_dword_unaligned((cs)->op##num, appw);
#define F12LOADOP1BYTE(cs) F12LOADOPBYTE(cs, 1)
@@ -68,7 +68,7 @@
#define F12STOREOP2HALF(cs) F12STOREOPHALF(cs, 2)
#define F12STOREOP2WORD(cs) F12STOREOPWORD(cs, 2)
-#define F12END(cs) \
+#define F12END(cs) \
return (cs)->amlength1 + (cs)->amlength2 + 2;
@@ -665,7 +665,7 @@ static UINT32 opDIVUB(v60_state *cpustate) /* TRUSTED */
F12LOADOP2BYTE(cpustate);
cpustate->_OV = 0;
- if (cpustate->op1) appb /= (UINT8)cpustate->op1;
+ if (cpustate->op1) appb /= (UINT8)cpustate->op1;
cpustate->_Z = (appb == 0);
cpustate->_S = ((appb & 0x80) != 0);
@@ -681,7 +681,7 @@ static UINT32 opDIVUH(v60_state *cpustate) /* TRUSTED */
F12LOADOP2HALF(cpustate);
cpustate->_OV = 0;
- if (cpustate->op1) apph /= (UINT16)cpustate->op1;
+ if (cpustate->op1) apph /= (UINT16)cpustate->op1;
cpustate->_Z = (apph == 0);
cpustate->_S = ((apph & 0x8000) != 0);
@@ -697,7 +697,7 @@ static UINT32 opDIVUW(v60_state *cpustate) /* TRUSTED */
F12LOADOP2WORD(cpustate);
cpustate->_OV = 0;
- if (cpustate->op1) appw /= cpustate->op1;
+ if (cpustate->op1) appw /= cpustate->op1;
cpustate->_Z = (appw == 0);
cpustate->_S = ((appw & 0x80000000) != 0);
@@ -755,7 +755,7 @@ static UINT32 opLDPR(v60_state *cpustate)
F12DecodeOperands(cpustate, ReadAMAddress, 2,ReadAM, 2);
if (cpustate->op2 <= 28)
{
- if (cpustate->flag1 &&(!(OpRead8(cpustate, cpustate->PC + 1)&0x80 && OpRead8(cpustate, cpustate->PC + 2) == 0xf4 ) ))
+ if (cpustate->flag1 &&(!(OpRead8(cpustate, cpustate->PC + 1)&0x80 && OpRead8(cpustate, cpustate->PC + 2) == 0xf4 ) ))
cpustate->reg[cpustate->op2 + 36] = cpustate->reg[cpustate->op1];
else
cpustate->reg[cpustate->op2 + 36] = cpustate->op1;
@@ -920,7 +920,7 @@ static UINT32 opMOVTHB(v60_state *cpustate)
// Check for overflow: the truncated bits must match the sign
// of the result, otherwise overflow
if (((cpustate->modwritevalb & 0x80) == 0x80 && ((cpustate->op1 & 0xFF00) == 0xFF00)) ||
- ((cpustate->modwritevalb & 0x80) == 0 && ((cpustate->op1 & 0xFF00) == 0x0000)))
+ ((cpustate->modwritevalb & 0x80) == 0 && ((cpustate->op1 & 0xFF00) == 0x0000)))
cpustate->_OV = 0;
else
cpustate->_OV = 1;
@@ -937,7 +937,7 @@ static UINT32 opMOVTWB(v60_state *cpustate)
// Check for overflow: the truncated bits must match the sign
// of the result, otherwise overflow
if (((cpustate->modwritevalb & 0x80) == 0x80 && ((cpustate->op1 & 0xFFFFFF00) == 0xFFFFFF00)) ||
- ((cpustate->modwritevalb & 0x80) == 0 && ((cpustate->op1 & 0xFFFFFF00) == 0x00000000)))
+ ((cpustate->modwritevalb & 0x80) == 0 && ((cpustate->op1 & 0xFFFFFF00) == 0x00000000)))
cpustate->_OV = 0;
else
cpustate->_OV = 1;
@@ -954,7 +954,7 @@ static UINT32 opMOVTWH(v60_state *cpustate)
// Check for overflow: the truncated bits must match the sign
// of the result, otherwise overflow
if (((cpustate->modwritevalh & 0x8000) == 0x8000 && ((cpustate->op1 & 0xFFFF0000) == 0xFFFF0000)) ||
- ((cpustate->modwritevalh & 0x8000) == 0 && ((cpustate->op1 & 0xFFFF0000) == 0x00000000)))
+ ((cpustate->modwritevalh & 0x8000) == 0 && ((cpustate->op1 & 0xFFFF0000) == 0x00000000)))
cpustate->_OV = 0;
else
cpustate->_OV = 1;
@@ -1592,13 +1592,13 @@ static UINT32 opRVBIT(v60_state *cpustate)
cpustate->modwritevalb =(UINT8)
(((cpustate->op1 & (1 << 0)) << 7) |
- ((cpustate->op1 & (1 << 1)) << 5) |
- ((cpustate->op1 & (1 << 2)) << 3) |
- ((cpustate->op1 & (1 << 3)) << 1) |
- ((cpustate->op1 & (1 << 4)) >> 1) |
- ((cpustate->op1 & (1 << 5)) >> 3) |
- ((cpustate->op1 & (1 << 6)) >> 5) |
- ((cpustate->op1 & (1 << 7)) >> 7));
+ ((cpustate->op1 & (1 << 1)) << 5) |
+ ((cpustate->op1 & (1 << 2)) << 3) |
+ ((cpustate->op1 & (1 << 3)) << 1) |
+ ((cpustate->op1 & (1 << 4)) >> 1) |
+ ((cpustate->op1 & (1 << 5)) >> 3) |
+ ((cpustate->op1 & (1 << 6)) >> 5) |
+ ((cpustate->op1 & (1 << 7)) >> 7));
F12WriteSecondOperand(cpustate, 0);
F12END(cpustate);
@@ -1609,9 +1609,9 @@ static UINT32 opRVBYT(v60_state *cpustate) /* TRUSTED */
F12DecodeFirstOperand(cpustate, ReadAM, 2);
cpustate->modwritevalw = ((cpustate->op1 & 0x000000FF) << 24) |
- ((cpustate->op1 & 0x0000FF00) << 8) |
- ((cpustate->op1 & 0x00FF0000) >> 8) |
- ((cpustate->op1 & 0xFF000000) >> 24);
+ ((cpustate->op1 & 0x0000FF00) << 8) |
+ ((cpustate->op1 & 0x00FF0000) >> 8) |
+ ((cpustate->op1 & 0xFF000000) >> 24);
F12WriteSecondOperand(cpustate, 2);
F12END(cpustate);
@@ -1932,12 +1932,12 @@ static UINT32 opSHLB(v60_state *cpustate) /* TRUSTED */
// carry gets the last bit shifted out,
// overflow is always CLEARed
- cpustate->_OV = 0; // default to no overflow
+ cpustate->_OV = 0; // default to no overflow
// now handle carry
tmp = appb & 0xff;
tmp <<= count;
- SetCFB(tmp); // set carry properly
+ SetCFB(tmp); // set carry properly
// do the actual shift...
appb <<= count;
@@ -1951,7 +1951,7 @@ static UINT32 opSHLB(v60_state *cpustate) /* TRUSTED */
{
// special case: clear carry and overflow, do nothing else
cpustate->_CY = cpustate->_OV = 0;
- SetSZPF_Byte(appb); // doc. is unclear if this is true...
+ SetSZPF_Byte(appb); // doc. is unclear if this is true...
}
else
{
@@ -1997,7 +1997,7 @@ static UINT32 opSHLH(v60_state *cpustate) /* TRUSTED */
// now handle carry
tmp = apph & 0xffff;
tmp <<= count;
- SetCFW(tmp); // set carry properly
+ SetCFW(tmp); // set carry properly
// do the actual shift...
apph <<= count;
@@ -2011,7 +2011,7 @@ static UINT32 opSHLH(v60_state *cpustate) /* TRUSTED */
{
// special case: clear carry and overflow, do nothing else
cpustate->_CY = cpustate->_OV = 0;
- SetSZPF_Word(apph); // doc. is unclear if this is true...
+ SetSZPF_Word(apph); // doc. is unclear if this is true...
}
else
{
@@ -2056,7 +2056,7 @@ static UINT32 opSHLW(v60_state *cpustate) /* TRUSTED */
// now handle carry
tmp = appw & 0xffffffff;
tmp <<= count;
- SetCFL(tmp); // set carry properly
+ SetCFL(tmp); // set carry properly
// do the actual shift...
appw <<= count;
@@ -2070,7 +2070,7 @@ static UINT32 opSHLW(v60_state *cpustate) /* TRUSTED */
{
// special case: clear carry and overflow, do nothing else
cpustate->_CY = cpustate->_OV = 0;
- SetSZPF_Long(appw); // doc. is unclear if this is true...
+ SetSZPF_Long(appw); // doc. is unclear if this is true...
}
else
{
diff --git a/src/emu/cpu/v60/op2.c b/src/emu/cpu/v60/op2.c
index b1c7b58d9c1..defb328e425 100644
--- a/src/emu/cpu/v60/op2.c
+++ b/src/emu/cpu/v60/op2.c
@@ -3,16 +3,16 @@
#define F2END(cs) \
return 2 + (cs)->amlength1 + (cs)->amlength2;
-#define F2LOADOPFLOAT(cs, num) \
- if ((cs)->flag##num) \
- appf = u2f((cs)->reg[(cs)->op##num]); \
- else \
+#define F2LOADOPFLOAT(cs, num) \
+ if ((cs)->flag##num) \
+ appf = u2f((cs)->reg[(cs)->op##num]); \
+ else \
appf = u2f((cs)->program->read_dword_unaligned((cs)->op##num));
-#define F2STOREOPFLOAT(cs,num) \
- if ((cs)->flag##num) \
- (cs)->reg[(cs)->op##num] = f2u(appf); \
- else \
+#define F2STOREOPFLOAT(cs,num) \
+ if ((cs)->flag##num) \
+ (cs)->reg[(cs)->op##num] = f2u(appf); \
+ else \
(cs)->program->write_dword_unaligned((cs)->op##num, f2u(appf));
static void F2DecodeFirstOperand(v60_state *cpustate, UINT32 (*DecodeOp1)(v60_state *), UINT8 dim1)
diff --git a/src/emu/cpu/v60/op3.c b/src/emu/cpu/v60/op3.c
index f7e5f674237..722dc81ab81 100644
--- a/src/emu/cpu/v60/op3.c
+++ b/src/emu/cpu/v60/op3.c
@@ -174,7 +174,7 @@ static UINT32 opJSR(v60_state *cpustate) /* TRUSTED */
return 0;
}
-static UINT32 opPREPARE(v60_state *cpustate) /* somewhat TRUSTED */
+static UINT32 opPREPARE(v60_state *cpustate) /* somewhat TRUSTED */
{
cpustate->modadd = cpustate->PC + 1;
cpustate->moddim = 2;
diff --git a/src/emu/cpu/v60/op4.c b/src/emu/cpu/v60/op4.c
index dd83915c1c9..6332052354e 100644
--- a/src/emu/cpu/v60/op4.c
+++ b/src/emu/cpu/v60/op4.c
@@ -351,4 +351,3 @@ static UINT32 opBSR(v60_state *cpustate) /* TRUSTED */
cpustate->PC += (INT16)OpRead16(cpustate, cpustate->PC + 1);
return 0;
}
-
diff --git a/src/emu/cpu/v60/op5.c b/src/emu/cpu/v60/op5.c
index 8c6808c6285..6373a3ce8e1 100644
--- a/src/emu/cpu/v60/op5.c
+++ b/src/emu/cpu/v60/op5.c
@@ -84,10 +84,3 @@ static UINT32 opTRAPFL(v60_state *cpustate)
return 1;
}
-
-
-
-
-
-
-
diff --git a/src/emu/cpu/v60/op6.c b/src/emu/cpu/v60/op6.c
index 0441c83bb87..af9fa875700 100644
--- a/src/emu/cpu/v60/op6.c
+++ b/src/emu/cpu/v60/op6.c
@@ -251,4 +251,3 @@ static UINT32 opC7(v60_state *cpustate) /* TRUSTED */
UINT8 appb = OpRead8(cpustate, cpustate->PC + 1);
return OpC7Table[appb >> 5](cpustate, appb & 0x1f);
}
-
diff --git a/src/emu/cpu/v60/op7a.c b/src/emu/cpu/v60/op7a.c
index 08303c3eb8b..071681cb543 100644
--- a/src/emu/cpu/v60/op7a.c
+++ b/src/emu/cpu/v60/op7a.c
@@ -12,19 +12,19 @@
* they do the opposite (set if not found, reset if found)
*/
-#define F7AEND(cs) \
+#define F7AEND(cs) \
return (cs)->amlength1 + (cs)->amlength2 + 4;
-#define F7BEND(cs) \
+#define F7BEND(cs) \
return (cs)->amlength1 + (cs)->amlength2 + 3;
-#define F7CEND(cs) \
+#define F7CEND(cs) \
return (cs)->amlength1 + (cs)->amlength2 + 3;
-#define F7BCREATEBITMASK(x) \
+#define F7BCREATEBITMASK(x) \
x = ((1 << (x)) - 1)
-#define F7CCREATEBITMASK(x) \
+#define F7CCREATEBITMASK(x) \
x = ((1 << (x)) - 1)
static void F7aDecodeOperands(v60_state *cpustate, UINT32 (*DecodeOp1)(v60_state *), UINT8 dim1, UINT32 (*DecodeOp2)(v60_state *), UINT8 dim2)
@@ -193,11 +193,11 @@ static UINT32 opCMPSTRB(v60_state *cpustate, UINT8 bFill, UINT8 bStop)
if (c1 > c2)
{
- cpustate->_S = 1; break;
+ cpustate->_S = 1; break;
}
else if (c2 > c1)
{
- cpustate->_S = 0; break;
+ cpustate->_S = 0; break;
}
if (bStop)
@@ -259,11 +259,11 @@ static UINT32 opCMPSTRH(v60_state *cpustate, UINT8 bFill, UINT8 bStop)
if (c1 > c2)
{
- cpustate->_S = 1; break;
+ cpustate->_S = 1; break;
}
else if (c2 > c1)
{
- cpustate->_S = 0; break;
+ cpustate->_S = 0; break;
}
if (bStop)
@@ -1035,7 +1035,7 @@ static UINT32 (*const Op5BTable[32])(v60_state *) =
opSCH0BSU,
op5BUNHANDLED,
opSCH1BSU,
- op5BUNHANDLED,
+ op5BUNHANDLED,
op5BUNHANDLED,
op5BUNHANDLED,
op5BUNHANDLED,
diff --git a/src/emu/cpu/v60/v60.c b/src/emu/cpu/v60/v60.c
index 9d3eeae0379..f910deb802e 100644
--- a/src/emu/cpu/v60/v60.c
+++ b/src/emu/cpu/v60/v60.c
@@ -9,17 +9,17 @@
// memory accessors
#if defined(LSB_FIRST) && !defined(ALIGN_INTS)
-#define OpRead8(s, a) ((s)->direct->read_decrypted_byte(a))
-#define OpRead16(s, a) ((s)->direct->read_decrypted_word(a))
-#define OpRead32(s, a) ((s)->direct->read_decrypted_dword(a))
+#define OpRead8(s, a) ((s)->direct->read_decrypted_byte(a))
+#define OpRead16(s, a) ((s)->direct->read_decrypted_word(a))
+#define OpRead32(s, a) ((s)->direct->read_decrypted_dword(a))
#else
#define OpRead8(s, a) ((s)->direct->read_decrypted_byte((a), (s)->fetch_xor))
-#define OpRead16(s, a) (((s)->direct->read_decrypted_byte(((a)+0), (s)->fetch_xor) << 0) | \
- ((s)->direct->read_decrypted_byte(((a)+1), (s)->fetch_xor) << 8))
-#define OpRead32(s, a) (((s)->direct->read_decrypted_byte(((a)+0), (s)->fetch_xor) << 0) | \
- ((s)->direct->read_decrypted_byte(((a)+1), (s)->fetch_xor) << 8) | \
- ((s)->direct->read_decrypted_byte(((a)+2), (s)->fetch_xor) << 16) | \
- ((s)->direct->read_decrypted_byte(((a)+3), (s)->fetch_xor) << 24))
+#define OpRead16(s, a) (((s)->direct->read_decrypted_byte(((a)+0), (s)->fetch_xor) << 0) | \
+ ((s)->direct->read_decrypted_byte(((a)+1), (s)->fetch_xor) << 8))
+#define OpRead32(s, a) (((s)->direct->read_decrypted_byte(((a)+0), (s)->fetch_xor) << 0) | \
+ ((s)->direct->read_decrypted_byte(((a)+1), (s)->fetch_xor) << 8) | \
+ ((s)->direct->read_decrypted_byte(((a)+2), (s)->fetch_xor) << 16) | \
+ ((s)->direct->read_decrypted_byte(((a)+3), (s)->fetch_xor) << 24))
#endif
@@ -29,47 +29,47 @@
// parameter x = result, y = source 1, z = source 2
-#define SetOFL_Add(x, y,z) (cpustate->_OV = (((x) ^ (y)) & ((x) ^ (z)) & 0x80000000) ? 1: 0)
-#define SetOFW_Add(x, y,z) (cpustate->_OV = (((x) ^ (y)) & ((x) ^ (z)) & 0x8000) ? 1 : 0)
-#define SetOFB_Add(x, y,z) (cpustate->_OV = (((x) ^ (y)) & ((x) ^ (z)) & 0x80) ? 1 : 0)
+#define SetOFL_Add(x, y,z) (cpustate->_OV = (((x) ^ (y)) & ((x) ^ (z)) & 0x80000000) ? 1: 0)
+#define SetOFW_Add(x, y,z) (cpustate->_OV = (((x) ^ (y)) & ((x) ^ (z)) & 0x8000) ? 1 : 0)
+#define SetOFB_Add(x, y,z) (cpustate->_OV = (((x) ^ (y)) & ((x) ^ (z)) & 0x80) ? 1 : 0)
-#define SetOFL_Sub(x, y,z) (cpustate->_OV = (((z) ^ (y)) & ((z) ^ (x)) & 0x80000000) ? 1 : 0)
-#define SetOFW_Sub(x, y,z) (cpustate->_OV = (((z) ^ (y)) & ((z) ^ (x)) & 0x8000) ? 1 : 0)
-#define SetOFB_Sub(x, y,z) (cpustate->_OV = (((z) ^ (y)) & ((z) ^ (x)) & 0x80) ? 1 : 0)
+#define SetOFL_Sub(x, y,z) (cpustate->_OV = (((z) ^ (y)) & ((z) ^ (x)) & 0x80000000) ? 1 : 0)
+#define SetOFW_Sub(x, y,z) (cpustate->_OV = (((z) ^ (y)) & ((z) ^ (x)) & 0x8000) ? 1 : 0)
+#define SetOFB_Sub(x, y,z) (cpustate->_OV = (((z) ^ (y)) & ((z) ^ (x)) & 0x80) ? 1 : 0)
-#define SetCFB(x) {cpustate->_CY = ((x) & 0x100) ? 1 : 0; }
-#define SetCFW(x) {cpustate->_CY = ((x) & 0x10000) ? 1 : 0; }
-#define SetCFL(x) {cpustate->_CY = ((x) & (((UINT64)1) << 32)) ? 1 : 0; }
+#define SetCFB(x) {cpustate->_CY = ((x) & 0x100) ? 1 : 0; }
+#define SetCFW(x) {cpustate->_CY = ((x) & 0x10000) ? 1 : 0; }
+#define SetCFL(x) {cpustate->_CY = ((x) & (((UINT64)1) << 32)) ? 1 : 0; }
-#define SetSF(x) (cpustate->_S = (x))
-#define SetZF(x) (cpustate->_Z = (x))
+#define SetSF(x) (cpustate->_S = (x))
+#define SetZF(x) (cpustate->_Z = (x))
-#define SetSZPF_Byte(x) {cpustate->_Z = ((UINT8)(x) == 0); cpustate->_S = ((x)&0x80) ? 1 : 0; }
-#define SetSZPF_Word(x) {cpustate->_Z = ((UINT16)(x) == 0); cpustate->_S = ((x)&0x8000) ? 1 : 0; }
-#define SetSZPF_Long(x) {cpustate->_Z = ((UINT32)(x) == 0); cpustate->_S = ((x)&0x80000000) ? 1 : 0; }
+#define SetSZPF_Byte(x) {cpustate->_Z = ((UINT8)(x) == 0); cpustate->_S = ((x)&0x80) ? 1 : 0; }
+#define SetSZPF_Word(x) {cpustate->_Z = ((UINT16)(x) == 0); cpustate->_S = ((x)&0x8000) ? 1 : 0; }
+#define SetSZPF_Long(x) {cpustate->_Z = ((UINT32)(x) == 0); cpustate->_S = ((x)&0x80000000) ? 1 : 0; }
-#define ORB(dst, src) { (dst) |= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Byte(dst); }
-#define ORW(dst, src) { (dst) |= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Word(dst); }
-#define ORL(dst, src) { (dst) |= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Long(dst); }
+#define ORB(dst, src) { (dst) |= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Byte(dst); }
+#define ORW(dst, src) { (dst) |= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Word(dst); }
+#define ORL(dst, src) { (dst) |= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Long(dst); }
-#define ANDB(dst, src) { (dst) &= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Byte(dst); }
-#define ANDW(dst, src) { (dst) &= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Word(dst); }
-#define ANDL(dst, src) { (dst) &= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Long(dst); }
+#define ANDB(dst, src) { (dst) &= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Byte(dst); }
+#define ANDW(dst, src) { (dst) &= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Word(dst); }
+#define ANDL(dst, src) { (dst) &= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Long(dst); }
-#define XORB(dst, src) { (dst) ^= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Byte(dst); }
-#define XORW(dst, src) { (dst) ^= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Word(dst); }
-#define XORL(dst, src) { (dst) ^= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Long(dst); }
+#define XORB(dst, src) { (dst) ^= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Byte(dst); }
+#define XORW(dst, src) { (dst) ^= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Word(dst); }
+#define XORL(dst, src) { (dst) ^= (src); cpustate->_CY = cpustate->_OV = 0; SetSZPF_Long(dst); }
-#define SUBB(dst, src) { unsigned res = (dst) - (src); SetCFB(res); SetOFB_Sub(res, src, dst); SetSZPF_Byte(res); dst = (UINT8)res; }
-#define SUBW(dst, src) { unsigned res = (dst) - (src); SetCFW(res); SetOFW_Sub(res, src, dst); SetSZPF_Word(res); dst = (UINT16)res; }
-#define SUBL(dst, src) { UINT64 res = (UINT64)(dst) - (INT64)(src); SetCFL(res); SetOFL_Sub(res, src, dst); SetSZPF_Long(res); dst = (UINT32)res; }
+#define SUBB(dst, src) { unsigned res = (dst) - (src); SetCFB(res); SetOFB_Sub(res, src, dst); SetSZPF_Byte(res); dst = (UINT8)res; }
+#define SUBW(dst, src) { unsigned res = (dst) - (src); SetCFW(res); SetOFW_Sub(res, src, dst); SetSZPF_Word(res); dst = (UINT16)res; }
+#define SUBL(dst, src) { UINT64 res = (UINT64)(dst) - (INT64)(src); SetCFL(res); SetOFL_Sub(res, src, dst); SetSZPF_Long(res); dst = (UINT32)res; }
-#define ADDB(dst, src) { unsigned res = (dst) + (src); SetCFB(res); SetOFB_Add(res, src, dst); SetSZPF_Byte(res); dst = (UINT8)res; }
-#define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetSZPF_Word(res); dst = (UINT16)res; }
-#define ADDL(dst, src) { UINT64 res = (UINT64)(dst) + (UINT64)(src); SetCFL(res); SetOFL_Add(res, src, dst); SetSZPF_Long(res); dst = (UINT32)res; }
+#define ADDB(dst, src) { unsigned res = (dst) + (src); SetCFB(res); SetOFB_Add(res, src, dst); SetSZPF_Byte(res); dst = (UINT8)res; }
+#define ADDW(dst, src) { unsigned res = (dst) + (src); SetCFW(res); SetOFW_Add(res, src, dst); SetSZPF_Word(res); dst = (UINT16)res; }
+#define ADDL(dst, src) { UINT64 res = (UINT64)(dst) + (UINT64)(src); SetCFL(res); SetOFL_Add(res, src, dst); SetSZPF_Long(res); dst = (UINT32)res; }
-#define SETREG8(a, b) (a) = ((a) & ~0xff) | ((b) & 0xff)
-#define SETREG16(a, b) (a) = ((a) & ~0xffff) | ((b) & 0xffff)
+#define SETREG8(a, b) (a) = ((a) & ~0xff) | ((b) & 0xff)
+#define SETREG16(a, b) (a) = ((a) & ~0xffff) | ((b) & 0xffff)
struct v60_flags
{
@@ -82,52 +82,52 @@ struct v60_flags
// v60 Register Inside (Hm... It's not a pentium inside :-))) )
struct v60_state
{
- offs_t fetch_xor;
- offs_t start_pc;
- UINT32 reg[68];
- v60_flags flags;
- UINT8 irq_line;
- UINT8 nmi_line;
- device_irq_acknowledge_callback irq_cb;
- legacy_cpu_device * device;
+ offs_t fetch_xor;
+ offs_t start_pc;
+ UINT32 reg[68];
+ v60_flags flags;
+ UINT8 irq_line;
+ UINT8 nmi_line;
+ device_irq_acknowledge_callback irq_cb;
+ legacy_cpu_device * device;
address_space *program;
- direct_read_data * direct;
+ direct_read_data * direct;
address_space *io;
- UINT32 PPC;
- int icount;
- int stall_io;
+ UINT32 PPC;
+ int icount;
+ int stall_io;
- UINT32 op1, op2;
- UINT8 flag1, flag2;
- UINT8 instflags;
- UINT32 lenop1, lenop2;
- UINT8 subop;
- UINT32 bamoffset1, bamoffset2;
+ UINT32 op1, op2;
+ UINT8 flag1, flag2;
+ UINT8 instflags;
+ UINT32 lenop1, lenop2;
+ UINT8 subop;
+ UINT32 bamoffset1, bamoffset2;
// Output variables for ReadAMAddress(cpustate)
- UINT8 amflag;
- UINT32 amout;
- UINT32 bamoffset;
+ UINT8 amflag;
+ UINT32 amout;
+ UINT32 bamoffset;
// Appo temp var
- UINT32 amlength1, amlength2;
+ UINT32 amlength1, amlength2;
// Global vars used by AM functions
- UINT32 modadd;
- UINT8 modm;
- UINT8 modval;
- UINT8 modval2;
- UINT8 modwritevalb;
- UINT16 modwritevalh;
- UINT32 modwritevalw;
- UINT8 moddim;
+ UINT32 modadd;
+ UINT8 modm;
+ UINT8 modval;
+ UINT8 modval2;
+ UINT8 modwritevalb;
+ UINT16 modwritevalh;
+ UINT32 modwritevalw;
+ UINT8 moddim;
};
INLINE v60_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == V60 ||
- device->type() == V70);
+ device->type() == V70);
return (v60_state *)downcast<legacy_cpu_device *>(device)->token();
}
@@ -139,84 +139,84 @@ INLINE v60_state *get_safe_token(device_t *device)
*/
#undef _S
-#define _CY flags.CY
-#define _OV flags.OV
-#define _S flags.S
-#define _Z flags.Z
+#define _CY flags.CY
+#define _OV flags.OV
+#define _S flags.S
+#define _Z flags.Z
// Defines of all v60 register...
-#define R0 reg[0]
-#define R1 reg[1]
-#define R2 reg[2]
-#define R3 reg[3]
-#define R4 reg[4]
-#define R5 reg[5]
-#define R6 reg[6]
-#define R7 reg[7]
-#define R8 reg[8]
-#define R9 reg[9]
-#define R10 reg[10]
-#define R11 reg[11]
-#define R12 reg[12]
-#define R13 reg[13]
-#define R14 reg[14]
-#define R15 reg[15]
-#define R16 reg[16]
-#define R17 reg[17]
-#define R18 reg[18]
-#define R19 reg[19]
-#define R20 reg[20]
-#define R21 reg[21]
-#define R22 reg[22]
-#define R23 reg[23]
-#define R24 reg[24]
-#define R25 reg[25]
-#define R26 reg[26]
-#define R27 reg[27]
-#define R28 reg[28]
-#define AP reg[29]
-#define FP reg[30]
-#define SP reg[31]
-
-#define PC reg[32]
-#define PSW reg[33]
+#define R0 reg[0]
+#define R1 reg[1]
+#define R2 reg[2]
+#define R3 reg[3]
+#define R4 reg[4]
+#define R5 reg[5]
+#define R6 reg[6]
+#define R7 reg[7]
+#define R8 reg[8]
+#define R9 reg[9]
+#define R10 reg[10]
+#define R11 reg[11]
+#define R12 reg[12]
+#define R13 reg[13]
+#define R14 reg[14]
+#define R15 reg[15]
+#define R16 reg[16]
+#define R17 reg[17]
+#define R18 reg[18]
+#define R19 reg[19]
+#define R20 reg[20]
+#define R21 reg[21]
+#define R22 reg[22]
+#define R23 reg[23]
+#define R24 reg[24]
+#define R25 reg[25]
+#define R26 reg[26]
+#define R27 reg[27]
+#define R28 reg[28]
+#define AP reg[29]
+#define FP reg[30]
+#define SP reg[31]
+
+#define PC reg[32]
+#define PSW reg[33]
// Privileged registers
-#define ISP reg[36]
-#define L0SP reg[37]
-#define L1SP reg[38]
-#define L2SP reg[39]
-#define L3SP reg[40]
-#define SBR reg[41]
-#define TR reg[42]
-#define SYCW reg[43]
-#define TKCW reg[44]
-#define PIR reg[45]
+#define ISP reg[36]
+#define L0SP reg[37]
+#define L1SP reg[38]
+#define L2SP reg[39]
+#define L3SP reg[40]
+#define SBR reg[41]
+#define TR reg[42]
+#define SYCW reg[43]
+#define TKCW reg[44]
+#define PIR reg[45]
//10-14 reserved
-#define PSW2 reg[51]
-#define ATBR0 reg[52]
-#define ATLR0 reg[53]
-#define ATBR1 reg[54]
-#define ATLR1 reg[55]
-#define ATBR2 reg[56]
-#define ATLR2 reg[57]
-#define ATBR3 reg[58]
-#define ATLR3 reg[59]
-#define TRMODE reg[60]
-#define ADTR0 reg[61]
-#define ADTR1 reg[62]
-#define ADTMR0 reg[63]
-#define ADTMR1 reg[64]
+#define PSW2 reg[51]
+#define ATBR0 reg[52]
+#define ATLR0 reg[53]
+#define ATBR1 reg[54]
+#define ATLR1 reg[55]
+#define ATBR2 reg[56]
+#define ATLR2 reg[57]
+#define ATBR3 reg[58]
+#define ATLR3 reg[59]
+#define TRMODE reg[60]
+#define ADTR0 reg[61]
+#define ADTR1 reg[62]
+#define ADTMR0 reg[63]
+#define ADTMR1 reg[64]
//29-31 reserved
// Defines...
#define NORMALIZEFLAGS(cs) \
{ \
- (cs)->_S = (cs)->_S ? 1 : 0; \
- (cs)->_OV = (cs)->_OV ? 1 : 0; \
- (cs)->_Z = (cs)->_Z ? 1 : 0; \
- (cs)->_CY = (cs)->_CY ? 1 : 0; \
+ (cs)->_S = (cs)->_S ? 1 : 0; \
+ (cs)->_OV = (cs)->_OV ? 1 : 0; \
+ (cs)->_Z = (cs)->_Z ? 1 : 0; \
+ (cs)->_CY = (cs)->_CY ? 1 : 0; \
}
static void v60_try_irq(v60_state *cpustate);
@@ -297,8 +297,8 @@ INLINE UINT32 v60_update_psw_for_exception(v60_state *cpustate, int is_interrupt
}
-#define GETINTVECT(cs, nint) (cs)->program->read_dword(((cs)->SBR & ~0xfff) + (nint) * 4)
-#define EXCEPTION_CODE_AND_SIZE(code, size) (((code) << 16) | (size))
+#define GETINTVECT(cs, nint) (cs)->program->read_dword(((cs)->SBR & ~0xfff) + (nint) * 4)
+#define EXCEPTION_CODE_AND_SIZE(code, size) (((code) << 16) | (size))
// Addressing mode decoding functions
@@ -378,17 +378,17 @@ static CPU_RESET( v60 )
{
v60_state *cpustate = get_safe_token(device);
- cpustate->PSW = 0x10000000;
- cpustate->PC = cpustate->start_pc;
- cpustate->SBR = 0x00000000;
- cpustate->SYCW = 0x00000070;
- cpustate->TKCW = 0x0000e000;
- cpustate->PSW2 = 0x0000f002;
-
- cpustate->_CY = 0;
- cpustate->_OV = 0;
- cpustate->_S = 0;
- cpustate->_Z = 0;
+ cpustate->PSW = 0x10000000;
+ cpustate->PC = cpustate->start_pc;
+ cpustate->SBR = 0x00000000;
+ cpustate->SYCW = 0x00000070;
+ cpustate->TKCW = 0x0000e000;
+ cpustate->PSW2 = 0x0000f002;
+
+ cpustate->_CY = 0;
+ cpustate->_OV = 0;
+ cpustate->_S = 0;
+ cpustate->_Z = 0;
}
static CPU_EXIT( v60 )
@@ -464,7 +464,7 @@ static CPU_EXECUTE( v60 )
UINT32 inc;
cpustate->PPC = cpustate->PC;
debugger_instruction_hook(device, cpustate->PC);
- cpustate->icount -= 8; /* fix me -- this is just an average */
+ cpustate->icount -= 8; /* fix me -- this is just an average */
inc = OpCodeTable[OpRead8(cpustate, cpustate->PC)](cpustate);
cpustate->PC += inc;
if (cpustate->irq_line != CLEAR_LINE)
@@ -488,70 +488,70 @@ static CPU_SET_INFO( v60 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i);break;
-
- case CPUINFO_INT_PC: cpustate->PC = info->i; break;
- case CPUINFO_INT_SP: cpustate->SP = info->i; break;
-
- case CPUINFO_INT_REGISTER + V60_R0: cpustate->R0 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R1: cpustate->R1 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R2: cpustate->R2 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R3: cpustate->R3 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R4: cpustate->R4 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R5: cpustate->R5 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R6: cpustate->R6 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R7: cpustate->R7 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R8: cpustate->R8 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R9: cpustate->R9 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R10: cpustate->R10 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R11: cpustate->R11 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R12: cpustate->R12 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R13: cpustate->R13 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R14: cpustate->R14 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R15: cpustate->R15 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R16: cpustate->R16 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R17: cpustate->R17 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R18: cpustate->R18 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R19: cpustate->R19 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R20: cpustate->R20 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R21: cpustate->R21 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R22: cpustate->R22 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R23: cpustate->R23 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R24: cpustate->R24 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R25: cpustate->R25 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R26: cpustate->R26 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R27: cpustate->R27 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_R28: cpustate->R28 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_AP: cpustate->AP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_FP: cpustate->FP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_SP: cpustate->SP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_PC: cpustate->PC = info->i; break;
- case CPUINFO_INT_REGISTER + V60_PSW: v60WritePSW(cpustate, info->i); break;
- case CPUINFO_INT_REGISTER + V60_ISP: cpustate->ISP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_L0SP: cpustate->L0SP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_L1SP: cpustate->L1SP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_L2SP: cpustate->L2SP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_L3SP: cpustate->L3SP = info->i; break;
- case CPUINFO_INT_REGISTER + V60_SBR: cpustate->SBR = info->i; break;
- case CPUINFO_INT_REGISTER + V60_TR: cpustate->TR = info->i; break;
- case CPUINFO_INT_REGISTER + V60_SYCW: cpustate->SYCW = info->i; break;
- case CPUINFO_INT_REGISTER + V60_TKCW: cpustate->TKCW = info->i; break;
- case CPUINFO_INT_REGISTER + V60_PIR: cpustate->PIR = info->i; break;
- case CPUINFO_INT_REGISTER + V60_PSW2: cpustate->PSW2 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATBR0: cpustate->ATBR0 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATLR0: cpustate->ATLR0 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATBR1: cpustate->ATBR1 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATLR1: cpustate->ATLR1 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATBR2: cpustate->ATBR2 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATLR2: cpustate->ATLR2 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATBR3: cpustate->ATBR3 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ATLR3: cpustate->ATLR3 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_TRMODE: cpustate->TRMODE = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ADTR0: cpustate->ADTR0 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ADTR1: cpustate->ADTR1 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ADTMR0: cpustate->ADTMR0 = info->i; break;
- case CPUINFO_INT_REGISTER + V60_ADTMR1: cpustate->ADTMR1 = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i);break;
+
+ case CPUINFO_INT_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_SP: cpustate->SP = info->i; break;
+
+ case CPUINFO_INT_REGISTER + V60_R0: cpustate->R0 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R1: cpustate->R1 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R2: cpustate->R2 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R3: cpustate->R3 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R4: cpustate->R4 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R5: cpustate->R5 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R6: cpustate->R6 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R7: cpustate->R7 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R8: cpustate->R8 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R9: cpustate->R9 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R10: cpustate->R10 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R11: cpustate->R11 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R12: cpustate->R12 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R13: cpustate->R13 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R14: cpustate->R14 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R15: cpustate->R15 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R16: cpustate->R16 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R17: cpustate->R17 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R18: cpustate->R18 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R19: cpustate->R19 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R20: cpustate->R20 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R21: cpustate->R21 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R22: cpustate->R22 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R23: cpustate->R23 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R24: cpustate->R24 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R25: cpustate->R25 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R26: cpustate->R26 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R27: cpustate->R27 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_R28: cpustate->R28 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_AP: cpustate->AP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_FP: cpustate->FP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_SP: cpustate->SP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_PSW: v60WritePSW(cpustate, info->i); break;
+ case CPUINFO_INT_REGISTER + V60_ISP: cpustate->ISP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_L0SP: cpustate->L0SP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_L1SP: cpustate->L1SP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_L2SP: cpustate->L2SP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_L3SP: cpustate->L3SP = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_SBR: cpustate->SBR = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_TR: cpustate->TR = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_SYCW: cpustate->SYCW = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_TKCW: cpustate->TKCW = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_PIR: cpustate->PIR = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_PSW2: cpustate->PSW2 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR0: cpustate->ATBR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR0: cpustate->ATLR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR1: cpustate->ATBR1 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR1: cpustate->ATLR1 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR2: cpustate->ATBR2 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR2: cpustate->ATLR2 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR3: cpustate->ATBR3 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR3: cpustate->ATLR3 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_TRMODE: cpustate->TRMODE = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ADTR0: cpustate->ADTR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ADTR1: cpustate->ADTR1 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ADTMR0: cpustate->ADTMR0 = info->i; break;
+ case CPUINFO_INT_REGISTER + V60_ADTMR1: cpustate->ADTMR1 = info->i; break;
}
}
@@ -568,170 +568,170 @@ CPU_GET_INFO( v60 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(v60_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 22; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 24; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_line; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PPC; break;
-
- case CPUINFO_INT_REGISTER + V60_R0: info->i = cpustate->R0; break;
- case CPUINFO_INT_REGISTER + V60_R1: info->i = cpustate->R1; break;
- case CPUINFO_INT_REGISTER + V60_R2: info->i = cpustate->R2; break;
- case CPUINFO_INT_REGISTER + V60_R3: info->i = cpustate->R3; break;
- case CPUINFO_INT_REGISTER + V60_R4: info->i = cpustate->R4; break;
- case CPUINFO_INT_REGISTER + V60_R5: info->i = cpustate->R5; break;
- case CPUINFO_INT_REGISTER + V60_R6: info->i = cpustate->R6; break;
- case CPUINFO_INT_REGISTER + V60_R7: info->i = cpustate->R7; break;
- case CPUINFO_INT_REGISTER + V60_R8: info->i = cpustate->R8; break;
- case CPUINFO_INT_REGISTER + V60_R9: info->i = cpustate->R9; break;
- case CPUINFO_INT_REGISTER + V60_R10: info->i = cpustate->R10; break;
- case CPUINFO_INT_REGISTER + V60_R11: info->i = cpustate->R11; break;
- case CPUINFO_INT_REGISTER + V60_R12: info->i = cpustate->R12; break;
- case CPUINFO_INT_REGISTER + V60_R13: info->i = cpustate->R13; break;
- case CPUINFO_INT_REGISTER + V60_R14: info->i = cpustate->R14; break;
- case CPUINFO_INT_REGISTER + V60_R15: info->i = cpustate->R15; break;
- case CPUINFO_INT_REGISTER + V60_R16: info->i = cpustate->R16; break;
- case CPUINFO_INT_REGISTER + V60_R17: info->i = cpustate->R17; break;
- case CPUINFO_INT_REGISTER + V60_R18: info->i = cpustate->R18; break;
- case CPUINFO_INT_REGISTER + V60_R19: info->i = cpustate->R19; break;
- case CPUINFO_INT_REGISTER + V60_R20: info->i = cpustate->R20; break;
- case CPUINFO_INT_REGISTER + V60_R21: info->i = cpustate->R21; break;
- case CPUINFO_INT_REGISTER + V60_R22: info->i = cpustate->R22; break;
- case CPUINFO_INT_REGISTER + V60_R23: info->i = cpustate->R23; break;
- case CPUINFO_INT_REGISTER + V60_R24: info->i = cpustate->R24; break;
- case CPUINFO_INT_REGISTER + V60_R25: info->i = cpustate->R25; break;
- case CPUINFO_INT_REGISTER + V60_R26: info->i = cpustate->R26; break;
- case CPUINFO_INT_REGISTER + V60_R27: info->i = cpustate->R27; break;
- case CPUINFO_INT_REGISTER + V60_R28: info->i = cpustate->R28; break;
- case CPUINFO_INT_REGISTER + V60_AP: info->i = cpustate->AP; break;
- case CPUINFO_INT_REGISTER + V60_FP: info->i = cpustate->FP; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(v60_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 1; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 22; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 1; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 24; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_line; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PPC; break;
+
+ case CPUINFO_INT_REGISTER + V60_R0: info->i = cpustate->R0; break;
+ case CPUINFO_INT_REGISTER + V60_R1: info->i = cpustate->R1; break;
+ case CPUINFO_INT_REGISTER + V60_R2: info->i = cpustate->R2; break;
+ case CPUINFO_INT_REGISTER + V60_R3: info->i = cpustate->R3; break;
+ case CPUINFO_INT_REGISTER + V60_R4: info->i = cpustate->R4; break;
+ case CPUINFO_INT_REGISTER + V60_R5: info->i = cpustate->R5; break;
+ case CPUINFO_INT_REGISTER + V60_R6: info->i = cpustate->R6; break;
+ case CPUINFO_INT_REGISTER + V60_R7: info->i = cpustate->R7; break;
+ case CPUINFO_INT_REGISTER + V60_R8: info->i = cpustate->R8; break;
+ case CPUINFO_INT_REGISTER + V60_R9: info->i = cpustate->R9; break;
+ case CPUINFO_INT_REGISTER + V60_R10: info->i = cpustate->R10; break;
+ case CPUINFO_INT_REGISTER + V60_R11: info->i = cpustate->R11; break;
+ case CPUINFO_INT_REGISTER + V60_R12: info->i = cpustate->R12; break;
+ case CPUINFO_INT_REGISTER + V60_R13: info->i = cpustate->R13; break;
+ case CPUINFO_INT_REGISTER + V60_R14: info->i = cpustate->R14; break;
+ case CPUINFO_INT_REGISTER + V60_R15: info->i = cpustate->R15; break;
+ case CPUINFO_INT_REGISTER + V60_R16: info->i = cpustate->R16; break;
+ case CPUINFO_INT_REGISTER + V60_R17: info->i = cpustate->R17; break;
+ case CPUINFO_INT_REGISTER + V60_R18: info->i = cpustate->R18; break;
+ case CPUINFO_INT_REGISTER + V60_R19: info->i = cpustate->R19; break;
+ case CPUINFO_INT_REGISTER + V60_R20: info->i = cpustate->R20; break;
+ case CPUINFO_INT_REGISTER + V60_R21: info->i = cpustate->R21; break;
+ case CPUINFO_INT_REGISTER + V60_R22: info->i = cpustate->R22; break;
+ case CPUINFO_INT_REGISTER + V60_R23: info->i = cpustate->R23; break;
+ case CPUINFO_INT_REGISTER + V60_R24: info->i = cpustate->R24; break;
+ case CPUINFO_INT_REGISTER + V60_R25: info->i = cpustate->R25; break;
+ case CPUINFO_INT_REGISTER + V60_R26: info->i = cpustate->R26; break;
+ case CPUINFO_INT_REGISTER + V60_R27: info->i = cpustate->R27; break;
+ case CPUINFO_INT_REGISTER + V60_R28: info->i = cpustate->R28; break;
+ case CPUINFO_INT_REGISTER + V60_AP: info->i = cpustate->AP; break;
+ case CPUINFO_INT_REGISTER + V60_FP: info->i = cpustate->FP; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + V60_SP: info->i = cpustate->SP; break;
+ case CPUINFO_INT_REGISTER + V60_SP: info->i = cpustate->SP; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + V60_PC: info->i = cpustate->PC; break;
- case CPUINFO_INT_REGISTER + V60_PSW: info->i = v60ReadPSW(cpustate); break;
- case CPUINFO_INT_REGISTER + V60_ISP: info->i = cpustate->ISP; break;
- case CPUINFO_INT_REGISTER + V60_L0SP: info->i = cpustate->L0SP; break;
- case CPUINFO_INT_REGISTER + V60_L1SP: info->i = cpustate->L1SP; break;
- case CPUINFO_INT_REGISTER + V60_L2SP: info->i = cpustate->L2SP; break;
- case CPUINFO_INT_REGISTER + V60_L3SP: info->i = cpustate->L3SP; break;
- case CPUINFO_INT_REGISTER + V60_SBR: info->i = cpustate->SBR; break;
- case CPUINFO_INT_REGISTER + V60_TR: info->i = cpustate->TR; break;
- case CPUINFO_INT_REGISTER + V60_SYCW: info->i = cpustate->SYCW; break;
- case CPUINFO_INT_REGISTER + V60_TKCW: info->i = cpustate->TKCW; break;
- case CPUINFO_INT_REGISTER + V60_PIR: info->i = cpustate->PIR; break;
- case CPUINFO_INT_REGISTER + V60_PSW2: info->i = cpustate->PSW2; break;
- case CPUINFO_INT_REGISTER + V60_ATBR0: info->i = cpustate->ATBR0; break;
- case CPUINFO_INT_REGISTER + V60_ATLR0: info->i = cpustate->ATLR0; break;
- case CPUINFO_INT_REGISTER + V60_ATBR1: info->i = cpustate->ATBR1; break;
- case CPUINFO_INT_REGISTER + V60_ATLR1: info->i = cpustate->ATLR1; break;
- case CPUINFO_INT_REGISTER + V60_ATBR2: info->i = cpustate->ATBR2; break;
- case CPUINFO_INT_REGISTER + V60_ATLR2: info->i = cpustate->ATLR2; break;
- case CPUINFO_INT_REGISTER + V60_ATBR3: info->i = cpustate->ATBR3; break;
- case CPUINFO_INT_REGISTER + V60_ATLR3: info->i = cpustate->ATLR3; break;
- case CPUINFO_INT_REGISTER + V60_TRMODE: info->i = cpustate->TRMODE; break;
- case CPUINFO_INT_REGISTER + V60_ADTR0: info->i = cpustate->ADTR0; break;
- case CPUINFO_INT_REGISTER + V60_ADTR1: info->i = cpustate->ADTR1; break;
- case CPUINFO_INT_REGISTER + V60_ADTMR0: info->i = cpustate->ADTMR0; break;
- case CPUINFO_INT_REGISTER + V60_ADTMR1: info->i = cpustate->ADTMR1; break;
+ case CPUINFO_INT_REGISTER + V60_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_REGISTER + V60_PSW: info->i = v60ReadPSW(cpustate); break;
+ case CPUINFO_INT_REGISTER + V60_ISP: info->i = cpustate->ISP; break;
+ case CPUINFO_INT_REGISTER + V60_L0SP: info->i = cpustate->L0SP; break;
+ case CPUINFO_INT_REGISTER + V60_L1SP: info->i = cpustate->L1SP; break;
+ case CPUINFO_INT_REGISTER + V60_L2SP: info->i = cpustate->L2SP; break;
+ case CPUINFO_INT_REGISTER + V60_L3SP: info->i = cpustate->L3SP; break;
+ case CPUINFO_INT_REGISTER + V60_SBR: info->i = cpustate->SBR; break;
+ case CPUINFO_INT_REGISTER + V60_TR: info->i = cpustate->TR; break;
+ case CPUINFO_INT_REGISTER + V60_SYCW: info->i = cpustate->SYCW; break;
+ case CPUINFO_INT_REGISTER + V60_TKCW: info->i = cpustate->TKCW; break;
+ case CPUINFO_INT_REGISTER + V60_PIR: info->i = cpustate->PIR; break;
+ case CPUINFO_INT_REGISTER + V60_PSW2: info->i = cpustate->PSW2; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR0: info->i = cpustate->ATBR0; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR0: info->i = cpustate->ATLR0; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR1: info->i = cpustate->ATBR1; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR1: info->i = cpustate->ATLR1; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR2: info->i = cpustate->ATBR2; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR2: info->i = cpustate->ATLR2; break;
+ case CPUINFO_INT_REGISTER + V60_ATBR3: info->i = cpustate->ATBR3; break;
+ case CPUINFO_INT_REGISTER + V60_ATLR3: info->i = cpustate->ATLR3; break;
+ case CPUINFO_INT_REGISTER + V60_TRMODE: info->i = cpustate->TRMODE; break;
+ case CPUINFO_INT_REGISTER + V60_ADTR0: info->i = cpustate->ADTR0; break;
+ case CPUINFO_INT_REGISTER + V60_ADTR1: info->i = cpustate->ADTR1; break;
+ case CPUINFO_INT_REGISTER + V60_ADTMR0: info->i = cpustate->ADTMR0; break;
+ case CPUINFO_INT_REGISTER + V60_ADTMR1: info->i = cpustate->ADTMR1; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v60); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v60); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(v60); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(v60); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(v60); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v60); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v60); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v60); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(v60); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(v60); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(v60); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v60); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V60"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V60"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Farfetch'd and R.Belmont"); break;
-
- case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
-
- case CPUINFO_STR_REGISTER + V60_R0: sprintf(info->s, "R0:%08X", cpustate->R0); break;
- case CPUINFO_STR_REGISTER + V60_R1: sprintf(info->s, "R1:%08X", cpustate->R1); break;
- case CPUINFO_STR_REGISTER + V60_R2: sprintf(info->s, "R2:%08X", cpustate->R2); break;
- case CPUINFO_STR_REGISTER + V60_R3: sprintf(info->s, "R3:%08X", cpustate->R3); break;
- case CPUINFO_STR_REGISTER + V60_R4: sprintf(info->s, "R4:%08X", cpustate->R4); break;
- case CPUINFO_STR_REGISTER + V60_R5: sprintf(info->s, "R5:%08X", cpustate->R5); break;
- case CPUINFO_STR_REGISTER + V60_R6: sprintf(info->s, "R6:%08X", cpustate->R6); break;
- case CPUINFO_STR_REGISTER + V60_R7: sprintf(info->s, "R7:%08X", cpustate->R7); break;
- case CPUINFO_STR_REGISTER + V60_R8: sprintf(info->s, "R8:%08X", cpustate->R8); break;
- case CPUINFO_STR_REGISTER + V60_R9: sprintf(info->s, "R9:%08X", cpustate->R9); break;
- case CPUINFO_STR_REGISTER + V60_R10: sprintf(info->s, "R10:%08X", cpustate->R10); break;
- case CPUINFO_STR_REGISTER + V60_R11: sprintf(info->s, "R11:%08X", cpustate->R11); break;
- case CPUINFO_STR_REGISTER + V60_R12: sprintf(info->s, "R12:%08X", cpustate->R12); break;
- case CPUINFO_STR_REGISTER + V60_R13: sprintf(info->s, "R13:%08X", cpustate->R13); break;
- case CPUINFO_STR_REGISTER + V60_R14: sprintf(info->s, "R14:%08X", cpustate->R14); break;
- case CPUINFO_STR_REGISTER + V60_R15: sprintf(info->s, "R15:%08X", cpustate->R15); break;
- case CPUINFO_STR_REGISTER + V60_R16: sprintf(info->s, "R16:%08X", cpustate->R16); break;
- case CPUINFO_STR_REGISTER + V60_R17: sprintf(info->s, "R17:%08X", cpustate->R17); break;
- case CPUINFO_STR_REGISTER + V60_R18: sprintf(info->s, "R18:%08X", cpustate->R18); break;
- case CPUINFO_STR_REGISTER + V60_R19: sprintf(info->s, "R19:%08X", cpustate->R19); break;
- case CPUINFO_STR_REGISTER + V60_R20: sprintf(info->s, "R20:%08X", cpustate->R20); break;
- case CPUINFO_STR_REGISTER + V60_R21: sprintf(info->s, "R21:%08X", cpustate->R21); break;
- case CPUINFO_STR_REGISTER + V60_R22: sprintf(info->s, "R22:%08X", cpustate->R22); break;
- case CPUINFO_STR_REGISTER + V60_R23: sprintf(info->s, "R23:%08X", cpustate->R23); break;
- case CPUINFO_STR_REGISTER + V60_R24: sprintf(info->s, "R24:%08X", cpustate->R24); break;
- case CPUINFO_STR_REGISTER + V60_R25: sprintf(info->s, "R25:%08X", cpustate->R25); break;
- case CPUINFO_STR_REGISTER + V60_R26: sprintf(info->s, "R26:%08X", cpustate->R26); break;
- case CPUINFO_STR_REGISTER + V60_R27: sprintf(info->s, "R27:%08X", cpustate->R27); break;
- case CPUINFO_STR_REGISTER + V60_R28: sprintf(info->s, "R28:%08X", cpustate->R28); break;
- case CPUINFO_STR_REGISTER + V60_AP: sprintf(info->s, "AP:%08X", cpustate->AP); break;
- case CPUINFO_STR_REGISTER + V60_FP: sprintf(info->s, "FP:%08X", cpustate->FP); break;
- case CPUINFO_STR_REGISTER + V60_SP: sprintf(info->s, "SP:%08X", cpustate->SP); break;
- case CPUINFO_STR_REGISTER + V60_PC: sprintf(info->s, "PC:%08X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + V60_PSW: sprintf(info->s, "PSW:%08X", v60ReadPSW(cpustate)); break;
- case CPUINFO_STR_REGISTER + V60_ISP: sprintf(info->s, "ISP:%08X", cpustate->ISP); break;
- case CPUINFO_STR_REGISTER + V60_L0SP: sprintf(info->s, "L0SP:%08X", cpustate->L0SP); break;
- case CPUINFO_STR_REGISTER + V60_L1SP: sprintf(info->s, "L1SP:%08X", cpustate->L1SP); break;
- case CPUINFO_STR_REGISTER + V60_L2SP: sprintf(info->s, "L2SP:%08X", cpustate->L2SP); break;
- case CPUINFO_STR_REGISTER + V60_L3SP: sprintf(info->s, "L3SP:%08X", cpustate->L3SP); break;
- case CPUINFO_STR_REGISTER + V60_SBR: sprintf(info->s, "SBR:%08X", cpustate->SBR); break;
- case CPUINFO_STR_REGISTER + V60_TR: sprintf(info->s, "TR:%08X", cpustate->TR); break;
- case CPUINFO_STR_REGISTER + V60_SYCW: sprintf(info->s, "SYCW:%08X", cpustate->SYCW); break;
- case CPUINFO_STR_REGISTER + V60_TKCW: sprintf(info->s, "TKCW:%08X", cpustate->TKCW); break;
- case CPUINFO_STR_REGISTER + V60_PIR: sprintf(info->s, "PIR:%08X", cpustate->PIR); break;
- case CPUINFO_STR_REGISTER + V60_PSW2: sprintf(info->s, "PSW2:%08X", cpustate->PSW2); break;
- case CPUINFO_STR_REGISTER + V60_ATBR0: sprintf(info->s, "ATBR0:%08X", cpustate->ATBR0); break;
- case CPUINFO_STR_REGISTER + V60_ATLR0: sprintf(info->s, "ATLR0:%08X", cpustate->ATLR0); break;
- case CPUINFO_STR_REGISTER + V60_ATBR1: sprintf(info->s, "ATBR1:%08X", cpustate->ATBR1); break;
- case CPUINFO_STR_REGISTER + V60_ATLR1: sprintf(info->s, "ATLR1:%08X", cpustate->ATLR1); break;
- case CPUINFO_STR_REGISTER + V60_ATBR2: sprintf(info->s, "ATBR2:%08X", cpustate->ATBR2); break;
- case CPUINFO_STR_REGISTER + V60_ATLR2: sprintf(info->s, "ATLR2:%08X", cpustate->ATLR2); break;
- case CPUINFO_STR_REGISTER + V60_ATBR3: sprintf(info->s, "ATBR3:%08X", cpustate->ATBR3); break;
- case CPUINFO_STR_REGISTER + V60_ATLR3: sprintf(info->s, "ATLR3:%08X", cpustate->ATLR3); break;
- case CPUINFO_STR_REGISTER + V60_TRMODE: sprintf(info->s, "TRMODE:%08X", cpustate->TRMODE); break;
- case CPUINFO_STR_REGISTER + V60_ADTR0: sprintf(info->s, "ADTR0:%08X", cpustate->ADTR0); break;
- case CPUINFO_STR_REGISTER + V60_ADTR1: sprintf(info->s, "ADTR1:%08X", cpustate->ADTR1); break;
- case CPUINFO_STR_REGISTER + V60_ADTMR0: sprintf(info->s, "ADTMR0:%08X", cpustate->ADTMR0); break;
- case CPUINFO_STR_REGISTER + V60_ADTMR1: sprintf(info->s, "ADTMR1:%08X", cpustate->ADTMR1); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V60"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V60"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Farfetch'd and R.Belmont"); break;
+
+ case CPUINFO_STR_FLAGS: strcpy(info->s, " "); break;
+
+ case CPUINFO_STR_REGISTER + V60_R0: sprintf(info->s, "R0:%08X", cpustate->R0); break;
+ case CPUINFO_STR_REGISTER + V60_R1: sprintf(info->s, "R1:%08X", cpustate->R1); break;
+ case CPUINFO_STR_REGISTER + V60_R2: sprintf(info->s, "R2:%08X", cpustate->R2); break;
+ case CPUINFO_STR_REGISTER + V60_R3: sprintf(info->s, "R3:%08X", cpustate->R3); break;
+ case CPUINFO_STR_REGISTER + V60_R4: sprintf(info->s, "R4:%08X", cpustate->R4); break;
+ case CPUINFO_STR_REGISTER + V60_R5: sprintf(info->s, "R5:%08X", cpustate->R5); break;
+ case CPUINFO_STR_REGISTER + V60_R6: sprintf(info->s, "R6:%08X", cpustate->R6); break;
+ case CPUINFO_STR_REGISTER + V60_R7: sprintf(info->s, "R7:%08X", cpustate->R7); break;
+ case CPUINFO_STR_REGISTER + V60_R8: sprintf(info->s, "R8:%08X", cpustate->R8); break;
+ case CPUINFO_STR_REGISTER + V60_R9: sprintf(info->s, "R9:%08X", cpustate->R9); break;
+ case CPUINFO_STR_REGISTER + V60_R10: sprintf(info->s, "R10:%08X", cpustate->R10); break;
+ case CPUINFO_STR_REGISTER + V60_R11: sprintf(info->s, "R11:%08X", cpustate->R11); break;
+ case CPUINFO_STR_REGISTER + V60_R12: sprintf(info->s, "R12:%08X", cpustate->R12); break;
+ case CPUINFO_STR_REGISTER + V60_R13: sprintf(info->s, "R13:%08X", cpustate->R13); break;
+ case CPUINFO_STR_REGISTER + V60_R14: sprintf(info->s, "R14:%08X", cpustate->R14); break;
+ case CPUINFO_STR_REGISTER + V60_R15: sprintf(info->s, "R15:%08X", cpustate->R15); break;
+ case CPUINFO_STR_REGISTER + V60_R16: sprintf(info->s, "R16:%08X", cpustate->R16); break;
+ case CPUINFO_STR_REGISTER + V60_R17: sprintf(info->s, "R17:%08X", cpustate->R17); break;
+ case CPUINFO_STR_REGISTER + V60_R18: sprintf(info->s, "R18:%08X", cpustate->R18); break;
+ case CPUINFO_STR_REGISTER + V60_R19: sprintf(info->s, "R19:%08X", cpustate->R19); break;
+ case CPUINFO_STR_REGISTER + V60_R20: sprintf(info->s, "R20:%08X", cpustate->R20); break;
+ case CPUINFO_STR_REGISTER + V60_R21: sprintf(info->s, "R21:%08X", cpustate->R21); break;
+ case CPUINFO_STR_REGISTER + V60_R22: sprintf(info->s, "R22:%08X", cpustate->R22); break;
+ case CPUINFO_STR_REGISTER + V60_R23: sprintf(info->s, "R23:%08X", cpustate->R23); break;
+ case CPUINFO_STR_REGISTER + V60_R24: sprintf(info->s, "R24:%08X", cpustate->R24); break;
+ case CPUINFO_STR_REGISTER + V60_R25: sprintf(info->s, "R25:%08X", cpustate->R25); break;
+ case CPUINFO_STR_REGISTER + V60_R26: sprintf(info->s, "R26:%08X", cpustate->R26); break;
+ case CPUINFO_STR_REGISTER + V60_R27: sprintf(info->s, "R27:%08X", cpustate->R27); break;
+ case CPUINFO_STR_REGISTER + V60_R28: sprintf(info->s, "R28:%08X", cpustate->R28); break;
+ case CPUINFO_STR_REGISTER + V60_AP: sprintf(info->s, "AP:%08X", cpustate->AP); break;
+ case CPUINFO_STR_REGISTER + V60_FP: sprintf(info->s, "FP:%08X", cpustate->FP); break;
+ case CPUINFO_STR_REGISTER + V60_SP: sprintf(info->s, "SP:%08X", cpustate->SP); break;
+ case CPUINFO_STR_REGISTER + V60_PC: sprintf(info->s, "PC:%08X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + V60_PSW: sprintf(info->s, "PSW:%08X", v60ReadPSW(cpustate)); break;
+ case CPUINFO_STR_REGISTER + V60_ISP: sprintf(info->s, "ISP:%08X", cpustate->ISP); break;
+ case CPUINFO_STR_REGISTER + V60_L0SP: sprintf(info->s, "L0SP:%08X", cpustate->L0SP); break;
+ case CPUINFO_STR_REGISTER + V60_L1SP: sprintf(info->s, "L1SP:%08X", cpustate->L1SP); break;
+ case CPUINFO_STR_REGISTER + V60_L2SP: sprintf(info->s, "L2SP:%08X", cpustate->L2SP); break;
+ case CPUINFO_STR_REGISTER + V60_L3SP: sprintf(info->s, "L3SP:%08X", cpustate->L3SP); break;
+ case CPUINFO_STR_REGISTER + V60_SBR: sprintf(info->s, "SBR:%08X", cpustate->SBR); break;
+ case CPUINFO_STR_REGISTER + V60_TR: sprintf(info->s, "TR:%08X", cpustate->TR); break;
+ case CPUINFO_STR_REGISTER + V60_SYCW: sprintf(info->s, "SYCW:%08X", cpustate->SYCW); break;
+ case CPUINFO_STR_REGISTER + V60_TKCW: sprintf(info->s, "TKCW:%08X", cpustate->TKCW); break;
+ case CPUINFO_STR_REGISTER + V60_PIR: sprintf(info->s, "PIR:%08X", cpustate->PIR); break;
+ case CPUINFO_STR_REGISTER + V60_PSW2: sprintf(info->s, "PSW2:%08X", cpustate->PSW2); break;
+ case CPUINFO_STR_REGISTER + V60_ATBR0: sprintf(info->s, "ATBR0:%08X", cpustate->ATBR0); break;
+ case CPUINFO_STR_REGISTER + V60_ATLR0: sprintf(info->s, "ATLR0:%08X", cpustate->ATLR0); break;
+ case CPUINFO_STR_REGISTER + V60_ATBR1: sprintf(info->s, "ATBR1:%08X", cpustate->ATBR1); break;
+ case CPUINFO_STR_REGISTER + V60_ATLR1: sprintf(info->s, "ATLR1:%08X", cpustate->ATLR1); break;
+ case CPUINFO_STR_REGISTER + V60_ATBR2: sprintf(info->s, "ATBR2:%08X", cpustate->ATBR2); break;
+ case CPUINFO_STR_REGISTER + V60_ATLR2: sprintf(info->s, "ATLR2:%08X", cpustate->ATLR2); break;
+ case CPUINFO_STR_REGISTER + V60_ATBR3: sprintf(info->s, "ATBR3:%08X", cpustate->ATBR3); break;
+ case CPUINFO_STR_REGISTER + V60_ATLR3: sprintf(info->s, "ATLR3:%08X", cpustate->ATLR3); break;
+ case CPUINFO_STR_REGISTER + V60_TRMODE: sprintf(info->s, "TRMODE:%08X", cpustate->TRMODE); break;
+ case CPUINFO_STR_REGISTER + V60_ADTR0: sprintf(info->s, "ADTR0:%08X", cpustate->ADTR0); break;
+ case CPUINFO_STR_REGISTER + V60_ADTR1: sprintf(info->s, "ADTR1:%08X", cpustate->ADTR1); break;
+ case CPUINFO_STR_REGISTER + V60_ADTMR0: sprintf(info->s, "ADTMR0:%08X", cpustate->ADTMR0); break;
+ case CPUINFO_STR_REGISTER + V60_ADTMR1: sprintf(info->s, "ADTMR1:%08X", cpustate->ADTMR1); break;
}
}
@@ -745,18 +745,18 @@ CPU_GET_INFO( v70 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v70); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v70); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v70); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v70); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V70"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V70"); break;
- default: CPU_GET_INFO_CALL(v60); break;
+ default: CPU_GET_INFO_CALL(v60); break;
}
}
diff --git a/src/emu/cpu/v60/v60d.c b/src/emu/cpu/v60/v60d.c
index 1a181b448b2..98f953f3761 100644
--- a/src/emu/cpu/v60/v60d.c
+++ b/src/emu/cpu/v60/v60d.c
@@ -27,7 +27,7 @@ static const char *const v60_reg_names[69] = {
static const UINT8 *rombase;
static offs_t pcbase;
-#define readop(a) rombase[(a) - pcbase]
+#define readop(a) rombase[(a) - pcbase]
static signed char read8(unsigned pc)
{
@@ -238,7 +238,7 @@ static int decode_AM(unsigned ipc, unsigned pc, int m, int opsize, char *out)
out_AM_DisplacementIndexed(readop(pc+1)&0x1F, mod&0x1F, read32(pc+2), opsize, out);
return 6;
- case 3: // Register indirect indexed
+ case 3: // Register indirect indexed
out_AM_RegisterIndirectIndexed(readop(pc+1)&0x1F, mod&0x1F, opsize, out);
return 2;
diff --git a/src/emu/cpu/v810/v810.c b/src/emu/cpu/v810/v810.c
index 04a182176cc..8b8892224a7 100644
--- a/src/emu/cpu/v810/v810.c
+++ b/src/emu/cpu/v810/v810.c
@@ -86,37 +86,37 @@ INLINE v810_state *get_safe_token(device_t *device)
#define R30 reg[30]
#define R31 reg[31]
-#define EIPC reg[32]
-#define EIPSW reg[33]
-#define FEPC reg[34]
-#define FEPSW reg[35]
-#define ECR reg[36]
-#define PSW reg[37]
-#define PIR reg[38]
-#define TKCW reg[39]
-#define CHCW reg[56]
-#define ADTRE reg[57]
-
-#define PC reg[64]
+#define EIPC reg[32]
+#define EIPSW reg[33]
+#define FEPC reg[34]
+#define FEPSW reg[35]
+#define ECR reg[36]
+#define PSW reg[37]
+#define PIR reg[38]
+#define TKCW reg[39]
+#define CHCW reg[56]
+#define ADTRE reg[57]
+
+#define PC reg[64]
/* Flags */
-#define GET_Z ( cpustate->PSW & 0x00000001)
-#define GET_S ((cpustate->PSW & 0x00000002)>>1)
-#define GET_OV ((cpustate->PSW & 0x00000004)>>2)
-#define GET_CY ((cpustate->PSW & 0x00000008)>>3)
-#define GET_ID ((cpustate->PSW & 0x00001000)>>12)
-#define GET_AE ((cpustate->PSW & 0x00002000)>>13)
-#define GET_EP ((cpustate->PSW & 0x00004000)>>14)
-#define GET_NP ((cpustate->PSW & 0x00008000)>>15)
-
-#define SET_Z(val) (cpustate->PSW = (cpustate->PSW & ~0x00000001) | (val))
-#define SET_S(val) (cpustate->PSW = (cpustate->PSW & ~0x00000002) | ((val) << 1))
-#define SET_OV(val) (cpustate->PSW = (cpustate->PSW & ~0x00000004) | ((val) << 2))
-#define SET_CY(val) (cpustate->PSW = (cpustate->PSW & ~0x00000008) | ((val) << 3))
-#define SET_ID(val) (cpustate->PSW = (cpustate->PSW & ~0x00001000) | ((val) << 12))
-#define SET_AE(val) (cpustate->PSW = (cpustate->PSW & ~0x00002000) | ((val) << 13))
-#define SET_EP(val) (cpustate->PSW = (cpustate->PSW & ~0x00004000) | ((val) << 14))
-#define SET_NP(val) (cpustate->PSW = (cpustate->PSW & ~0x00008000) | ((val) << 15))
+#define GET_Z ( cpustate->PSW & 0x00000001)
+#define GET_S ((cpustate->PSW & 0x00000002)>>1)
+#define GET_OV ((cpustate->PSW & 0x00000004)>>2)
+#define GET_CY ((cpustate->PSW & 0x00000008)>>3)
+#define GET_ID ((cpustate->PSW & 0x00001000)>>12)
+#define GET_AE ((cpustate->PSW & 0x00002000)>>13)
+#define GET_EP ((cpustate->PSW & 0x00004000)>>14)
+#define GET_NP ((cpustate->PSW & 0x00008000)>>15)
+
+#define SET_Z(val) (cpustate->PSW = (cpustate->PSW & ~0x00000001) | (val))
+#define SET_S(val) (cpustate->PSW = (cpustate->PSW & ~0x00000002) | ((val) << 1))
+#define SET_OV(val) (cpustate->PSW = (cpustate->PSW & ~0x00000004) | ((val) << 2))
+#define SET_CY(val) (cpustate->PSW = (cpustate->PSW & ~0x00000008) | ((val) << 3))
+#define SET_ID(val) (cpustate->PSW = (cpustate->PSW & ~0x00001000) | ((val) << 12))
+#define SET_AE(val) (cpustate->PSW = (cpustate->PSW & ~0x00002000) | ((val) << 13))
+#define SET_EP(val) (cpustate->PSW = (cpustate->PSW & ~0x00004000) | ((val) << 14))
+#define SET_NP(val) (cpustate->PSW = (cpustate->PSW & ~0x00008000) | ((val) << 15))
#define R_B(cs, addr) ((cs)->program->read_byte(addr))
#define R_H(cs, addr) ((cs)->program->read_word(addr))
@@ -137,7 +137,7 @@ INLINE v810_state *get_safe_token(device_t *device)
#define WIO_H(cs, addr, val) ((cs)->io->write_word(addr,val))
#define WIO_W(cs, addr, val) ((cs)->io->write_dword(addr,val))
-#define R_OP(cs, addr) ((cs)->direct->read_decrypted_word(addr))
+#define R_OP(cs, addr) ((cs)->direct->read_decrypted_word(addr))
#define GET1 (op&0x1f)
#define GET2 ((op>>5)&0x1f)
@@ -150,14 +150,14 @@ INLINE v810_state *get_safe_token(device_t *device)
#define D9(x) ((x&0x1ff)|((x&0x100)?0xfffffe00:0))
#define SO(opcode) (((opcode)&0xfc00)>>10)
-#define CHECK_CY(x) cpustate->PSW=(cpustate->PSW & ~8)|(((x) & (((UINT64)1) << 32)) ? 8 : 0)
-#define CHECK_OVADD(x,y,z) cpustate->PSW=(cpustate->PSW & ~0x00000004) |(( ((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 4: 0)
-#define CHECK_OVSUB(x,y,z) cpustate->PSW=(cpustate->PSW & ~0x00000004) |(( ((y) ^ (z)) & ((x) ^ (y)) & 0x80000000) ? 4: 0)
-#define CHECK_ZS(x) cpustate->PSW=(cpustate->PSW & ~3)|((UINT32)(x)==0)|(((x)&0x80000000) ? 2: 0)
+#define CHECK_CY(x) cpustate->PSW=(cpustate->PSW & ~8)|(((x) & (((UINT64)1) << 32)) ? 8 : 0)
+#define CHECK_OVADD(x,y,z) cpustate->PSW=(cpustate->PSW & ~0x00000004) |(( ((x) ^ (z)) & ((y) ^ (z)) & 0x80000000) ? 4: 0)
+#define CHECK_OVSUB(x,y,z) cpustate->PSW=(cpustate->PSW & ~0x00000004) |(( ((y) ^ (z)) & ((x) ^ (y)) & 0x80000000) ? 4: 0)
+#define CHECK_ZS(x) cpustate->PSW=(cpustate->PSW & ~3)|((UINT32)(x)==0)|(((x)&0x80000000) ? 2: 0)
-#define ADD(dst, src) { UINT64 res=(UINT64)(dst)+(UINT64)(src); SetCF(res); SetOF_Add(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
-#define SUB(dst, src) { UINT64 res=(UINT64)(dst)-(INT64)(src); SetCF(res); SetOF_Sub(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
+#define ADD(dst, src) { UINT64 res=(UINT64)(dst)+(UINT64)(src); SetCF(res); SetOF_Add(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
+#define SUB(dst, src) { UINT64 res=(UINT64)(dst)-(INT64)(src); SetCF(res); SetOF_Sub(res,src,dst); SetSZPF(res); dst=(UINT32)res; }
@@ -188,7 +188,7 @@ static UINT32 opMOVr(v810_state *cpustate,UINT32 op) // mov reg1, reg2
return clkIF;
}
-static UINT32 opMOVEA(v810_state *cpustate,UINT32 op) // movea imm16, reg1, reg2
+static UINT32 opMOVEA(v810_state *cpustate,UINT32 op) // movea imm16, reg1, reg2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=R_OP(cpustate,cpustate->PC);
@@ -198,7 +198,7 @@ static UINT32 opMOVEA(v810_state *cpustate,UINT32 op) // movea imm16, reg1, reg2
return clkIF;
}
-static UINT32 opMOVHI(v810_state *cpustate,UINT32 op) // movhi imm16, reg1 ,reg2
+static UINT32 opMOVHI(v810_state *cpustate,UINT32 op) // movhi imm16, reg1 ,reg2
{
UINT32 op2=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -208,13 +208,13 @@ static UINT32 opMOVHI(v810_state *cpustate,UINT32 op) // movhi imm16, reg1 ,reg2
return clkIF;
}
-static UINT32 opMOVi(v810_state *cpustate,UINT32 op) // mov imm5,r2
+static UINT32 opMOVi(v810_state *cpustate,UINT32 op) // mov imm5,r2
{
SETREG(cpustate,GET2,I5(op));
return clkIF;
}
-static UINT32 opADDr(v810_state *cpustate,UINT32 op) // add r1,r2
+static UINT32 opADDr(v810_state *cpustate,UINT32 op) // add r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -226,7 +226,7 @@ static UINT32 opADDr(v810_state *cpustate,UINT32 op) // add r1,r2
return clkIF;
}
-static UINT32 opADDi(v810_state *cpustate,UINT32 op) // add imm5,r2
+static UINT32 opADDi(v810_state *cpustate,UINT32 op) // add imm5,r2
{
UINT32 op1=I5(op);
UINT32 op2=GETREG(cpustate,GET2);
@@ -239,7 +239,7 @@ static UINT32 opADDi(v810_state *cpustate,UINT32 op) // add imm5,r2
}
-static UINT32 opADDI(v810_state *cpustate,UINT32 op) // addi imm16, reg1, reg2
+static UINT32 opADDI(v810_state *cpustate,UINT32 op) // addi imm16, reg1, reg2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=R_OP(cpustate,cpustate->PC);
@@ -254,7 +254,7 @@ static UINT32 opADDI(v810_state *cpustate,UINT32 op) // addi imm16, reg1, reg2
return clkIF;
}
-static UINT32 opSUBr(v810_state *cpustate,UINT32 op) // sub r1,r2
+static UINT32 opSUBr(v810_state *cpustate,UINT32 op) // sub r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -267,7 +267,7 @@ static UINT32 opSUBr(v810_state *cpustate,UINT32 op) // sub r1,r2
}
-static UINT32 opCMPr(v810_state *cpustate,UINT32 op) // cmp r1,r2
+static UINT32 opCMPr(v810_state *cpustate,UINT32 op) // cmp r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -278,7 +278,7 @@ static UINT32 opCMPr(v810_state *cpustate,UINT32 op) // cmp r1,r2
return clkIF;
}
-static UINT32 opCMPi(v810_state *cpustate,UINT32 op) // cmpi imm5,r2
+static UINT32 opCMPi(v810_state *cpustate,UINT32 op) // cmpi imm5,r2
{
UINT32 op1=I5(op);
UINT32 op2=GETREG(cpustate,GET2);
@@ -289,7 +289,7 @@ static UINT32 opCMPi(v810_state *cpustate,UINT32 op) // cmpi imm5,r2
return clkIF;
}
-static UINT32 opSETFi(v810_state *cpustate,UINT32 op) // setf imm5,r2
+static UINT32 opSETFi(v810_state *cpustate,UINT32 op) // setf imm5,r2
{
UINT32 op1=I5(op);
UINT8 res=0;
@@ -365,7 +365,7 @@ static UINT32 opSETFi(v810_state *cpustate,UINT32 op) // setf imm5,r2
}
-static UINT32 opANDr(v810_state *cpustate,UINT32 op) // and r1,r2
+static UINT32 opANDr(v810_state *cpustate,UINT32 op) // and r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -376,7 +376,7 @@ static UINT32 opANDr(v810_state *cpustate,UINT32 op) // and r1,r2
return clkIF;
}
-static UINT32 opANDI(v810_state *cpustate,UINT32 op) // andi imm16,r1,r2
+static UINT32 opANDI(v810_state *cpustate,UINT32 op) // andi imm16,r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=R_OP(cpustate,cpustate->PC);
@@ -390,7 +390,7 @@ static UINT32 opANDI(v810_state *cpustate,UINT32 op) // andi imm16,r1,r2
return clkIF;
}
-static UINT32 opORr(v810_state *cpustate,UINT32 op) // or r1,r2
+static UINT32 opORr(v810_state *cpustate,UINT32 op) // or r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -401,7 +401,7 @@ static UINT32 opORr(v810_state *cpustate,UINT32 op) // or r1,r2
return clkIF;
}
-static UINT32 opORI(v810_state *cpustate,UINT32 op) // ori imm16,r1,r2
+static UINT32 opORI(v810_state *cpustate,UINT32 op) // ori imm16,r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=R_OP(cpustate,cpustate->PC);
@@ -415,7 +415,7 @@ static UINT32 opORI(v810_state *cpustate,UINT32 op) // ori imm16,r1,r2
return clkIF;
}
-static UINT32 opXORr(v810_state *cpustate,UINT32 op) // xor r1,r2
+static UINT32 opXORr(v810_state *cpustate,UINT32 op) // xor r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -442,7 +442,7 @@ static UINT32 opSTSR(v810_state *cpustate,UINT32 op) // ldsr regID,reg2
}
-static UINT32 opXORI(v810_state *cpustate,UINT32 op) // xori imm16,r1,r2
+static UINT32 opXORI(v810_state *cpustate,UINT32 op) // xori imm16,r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=R_OP(cpustate,cpustate->PC);
@@ -456,7 +456,7 @@ static UINT32 opXORI(v810_state *cpustate,UINT32 op) // xori imm16,r1,r2
return clkIF;
}
-static UINT32 opNOTr(v810_state *cpustate,UINT32 op) // not r1,r2
+static UINT32 opNOTr(v810_state *cpustate,UINT32 op) // not r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=~op1;
@@ -466,7 +466,7 @@ static UINT32 opNOTr(v810_state *cpustate,UINT32 op) // not r1,r2
return clkIF;
}
-static UINT32 opSHLr(v810_state *cpustate,UINT32 op) // shl r1,r2
+static UINT32 opSHLr(v810_state *cpustate,UINT32 op) // shl r1,r2
{
UINT64 tmp;
UINT32 count=GETREG(cpustate,GET1);
@@ -486,7 +486,7 @@ static UINT32 opSHLr(v810_state *cpustate,UINT32 op) // shl r1,r2
return clkIF;
}
-static UINT32 opSHLi(v810_state *cpustate,UINT32 op) // shl imm5,r2
+static UINT32 opSHLi(v810_state *cpustate,UINT32 op) // shl imm5,r2
{
UINT64 tmp;
UINT32 count=UI5(op);
@@ -505,7 +505,7 @@ static UINT32 opSHLi(v810_state *cpustate,UINT32 op) // shl imm5,r2
return clkIF;
}
-static UINT32 opSHRr(v810_state *cpustate,UINT32 op) // shr r1,r2
+static UINT32 opSHRr(v810_state *cpustate,UINT32 op) // shr r1,r2
{
UINT64 tmp;
UINT32 count=GETREG(cpustate,GET1);
@@ -523,7 +523,7 @@ static UINT32 opSHRr(v810_state *cpustate,UINT32 op) // shr r1,r2
return clkIF;
}
-static UINT32 opSHRi(v810_state *cpustate,UINT32 op) // shr imm5,r2
+static UINT32 opSHRi(v810_state *cpustate,UINT32 op) // shr imm5,r2
{
UINT64 tmp;
UINT32 count=UI5(op);
@@ -541,7 +541,7 @@ static UINT32 opSHRi(v810_state *cpustate,UINT32 op) // shr imm5,r2
return clkIF;
}
-static UINT32 opSARr(v810_state *cpustate,UINT32 op) // sar r1,r2
+static UINT32 opSARr(v810_state *cpustate,UINT32 op) // sar r1,r2
{
INT32 tmp;
UINT32 count=GETREG(cpustate,GET1);
@@ -560,7 +560,7 @@ static UINT32 opSARr(v810_state *cpustate,UINT32 op) // sar r1,r2
return clkIF;
}
-static UINT32 opSARi(v810_state *cpustate,UINT32 op) // sar imm5,r2
+static UINT32 opSARi(v810_state *cpustate,UINT32 op) // sar imm5,r2
{
INT32 tmp;
UINT32 count=UI5(op);
@@ -716,7 +716,7 @@ static UINT32 opB(v810_state *cpustate,UINT32 op)
return clkIF;
}
-static UINT32 opLDB(v810_state *cpustate,UINT32 op) // ld.b disp16[reg1],reg2
+static UINT32 opLDB(v810_state *cpustate,UINT32 op) // ld.b disp16[reg1],reg2
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -728,7 +728,7 @@ static UINT32 opLDB(v810_state *cpustate,UINT32 op) // ld.b disp16[reg1],reg2
return clkIF+clkMEM;
}
-static UINT32 opLDH(v810_state *cpustate,UINT32 op) // ld.h disp16[reg1],reg2
+static UINT32 opLDH(v810_state *cpustate,UINT32 op) // ld.h disp16[reg1],reg2
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -740,7 +740,7 @@ static UINT32 opLDH(v810_state *cpustate,UINT32 op) // ld.h disp16[reg1],reg2
return clkIF+clkMEM;
}
-static UINT32 opLDW(v810_state *cpustate,UINT32 op) // ld.w disp16[reg1],reg2
+static UINT32 opLDW(v810_state *cpustate,UINT32 op) // ld.w disp16[reg1],reg2
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -751,7 +751,7 @@ static UINT32 opLDW(v810_state *cpustate,UINT32 op) // ld.w disp16[reg1],reg2
return clkIF+clkMEM;
}
-static UINT32 opINB(v810_state *cpustate,UINT32 op) // in.b disp16[reg1],reg2
+static UINT32 opINB(v810_state *cpustate,UINT32 op) // in.b disp16[reg1],reg2
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -762,14 +762,14 @@ static UINT32 opINB(v810_state *cpustate,UINT32 op) // in.b disp16[reg1],reg2
return clkIF+clkMEM;
}
-static UINT32 opCAXI(v810_state *cpustate,UINT32 op) // caxi disp16[reg1],reg2
+static UINT32 opCAXI(v810_state *cpustate,UINT32 op) // caxi disp16[reg1],reg2
{
printf("V810 CAXI execute\n");
cpustate->PC+=2;
return clkIF;
}
-static UINT32 opINH(v810_state *cpustate,UINT32 op) // in.h disp16[reg1],reg2
+static UINT32 opINH(v810_state *cpustate,UINT32 op) // in.h disp16[reg1],reg2
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -780,7 +780,7 @@ static UINT32 opINH(v810_state *cpustate,UINT32 op) // in.h disp16[reg1],reg2
return clkIF+clkMEM;
}
-static UINT32 opINW(v810_state *cpustate,UINT32 op) // in.w disp16[reg1],reg2
+static UINT32 opINW(v810_state *cpustate,UINT32 op) // in.w disp16[reg1],reg2
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -791,7 +791,7 @@ static UINT32 opINW(v810_state *cpustate,UINT32 op) // in.w disp16[reg1],reg2
return clkIF+clkMEM;
}
-static UINT32 opSTB(v810_state *cpustate,UINT32 op) // st.b reg2, disp16[reg1]
+static UINT32 opSTB(v810_state *cpustate,UINT32 op) // st.b reg2, disp16[reg1]
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -801,7 +801,7 @@ static UINT32 opSTB(v810_state *cpustate,UINT32 op) // st.b reg2, disp16[reg1]
return clkIF+clkMEM;
}
-static UINT32 opSTH(v810_state *cpustate,UINT32 op) // st.h reg2, disp16[reg1]
+static UINT32 opSTH(v810_state *cpustate,UINT32 op) // st.h reg2, disp16[reg1]
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -811,7 +811,7 @@ static UINT32 opSTH(v810_state *cpustate,UINT32 op) // st.h reg2, disp16[reg1]
return clkIF+clkMEM;
}
-static UINT32 opSTW(v810_state *cpustate,UINT32 op) // st.w reg2, disp16[reg1]
+static UINT32 opSTW(v810_state *cpustate,UINT32 op) // st.w reg2, disp16[reg1]
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -821,7 +821,7 @@ static UINT32 opSTW(v810_state *cpustate,UINT32 op) // st.w reg2, disp16[reg1]
return clkIF+clkMEM;
}
-static UINT32 opOUTB(v810_state *cpustate,UINT32 op) // out.b reg2, disp16[reg1]
+static UINT32 opOUTB(v810_state *cpustate,UINT32 op) // out.b reg2, disp16[reg1]
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -831,7 +831,7 @@ static UINT32 opOUTB(v810_state *cpustate,UINT32 op) // out.b reg2, disp16[reg1]
return clkIF+clkMEM;
}
-static UINT32 opOUTH(v810_state *cpustate,UINT32 op) // out.h reg2, disp16[reg1]
+static UINT32 opOUTH(v810_state *cpustate,UINT32 op) // out.h reg2, disp16[reg1]
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -841,7 +841,7 @@ static UINT32 opOUTH(v810_state *cpustate,UINT32 op) // out.h reg2, disp16[reg1]
return clkIF+clkMEM;
}
-static UINT32 opOUTW(v810_state *cpustate,UINT32 op) // out.w reg2, disp16[reg1]
+static UINT32 opOUTW(v810_state *cpustate,UINT32 op) // out.w reg2, disp16[reg1]
{
UINT32 tmp=R_OP(cpustate,cpustate->PC);
cpustate->PC+=2;
@@ -851,7 +851,7 @@ static UINT32 opOUTW(v810_state *cpustate,UINT32 op) // out.w reg2, disp16[reg1]
return clkIF+clkMEM;
}
-static UINT32 opMULr(v810_state *cpustate,UINT32 op) // mul r1,r2
+static UINT32 opMULr(v810_state *cpustate,UINT32 op) // mul r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -868,7 +868,7 @@ static UINT32 opMULr(v810_state *cpustate,UINT32 op) // mul r1,r2
return clkIF;
}
-static UINT32 opMULUr(v810_state *cpustate,UINT32 op) // mulu r1,r2
+static UINT32 opMULUr(v810_state *cpustate,UINT32 op) // mulu r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -885,7 +885,7 @@ static UINT32 opMULUr(v810_state *cpustate,UINT32 op) // mulu r1,r2
return clkIF;
}
-static UINT32 opDIVr(v810_state *cpustate,UINT32 op) // div r1,r2
+static UINT32 opDIVr(v810_state *cpustate,UINT32 op) // div r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -901,7 +901,7 @@ static UINT32 opDIVr(v810_state *cpustate,UINT32 op) // div r1,r2
return clkIF;
}
-static UINT32 opDIVUr(v810_state *cpustate,UINT32 op) // divu r1,r2
+static UINT32 opDIVUr(v810_state *cpustate,UINT32 op) // divu r1,r2
{
UINT32 op1=GETREG(cpustate,GET1);
UINT32 op2=GETREG(cpustate,GET2);
@@ -1179,70 +1179,70 @@ static UINT32 opBSU(v810_state *cpustate,UINT32 op)
static UINT32 (*const OpCodeTable[64])(v810_state *cpustate,UINT32 op) =
{
- /* 0x00 */ opMOVr, // mov r1,r2 1
- /* 0x01 */ opADDr, // add r1,r2 1
- /* 0x02 */ opSUBr, // sub r1,r2 1
- /* 0x03 */ opCMPr, // cmp2 r1,r2 1
- /* 0x04 */ opSHLr, // shl r1,r2 1
- /* 0x05 */ opSHRr, // shr r1,r2 1
- /* 0x06 */ opJMPr, // jmp [r1] 1
- /* 0x07 */ opSARr, // sar r1,r2 1
- /* 0x08 */ opMULr, // mul r1,r2 1
- /* 0x09 */ opDIVr, // div r1,r2 1
- /* 0x0a */ opMULUr, // mulu r1,r2 1
- /* 0x0b */ opDIVUr, // divu r1,r2 1
- /* 0x0c */ opORr, // or r1,r2 1
- /* 0x0d */ opANDr, // and r1,r2 1
- /* 0x0e */ opXORr, // xor r1,r2 1
- /* 0x0f */ opNOTr, // not r1,r2 1
- /* 0x10 */ opMOVi, // mov imm5,r2 2
- /* 0x11 */ opADDi, // add imm5,r2 2
- /* 0x12 */ opSETFi, // setf imm5,r2 2
- /* 0x13 */ opCMPi, // cmp imm5,r2 2
- /* 0x14 */ opSHLi, // shl imm5,r2 2
- /* 0x15 */ opSHRi, // shr imm5,r2 2
- /* 0x16 */ opEI, // ei 2
- /* 0x17 */ opSARi, // sar imm5,r2 2
+ /* 0x00 */ opMOVr, // mov r1,r2 1
+ /* 0x01 */ opADDr, // add r1,r2 1
+ /* 0x02 */ opSUBr, // sub r1,r2 1
+ /* 0x03 */ opCMPr, // cmp2 r1,r2 1
+ /* 0x04 */ opSHLr, // shl r1,r2 1
+ /* 0x05 */ opSHRr, // shr r1,r2 1
+ /* 0x06 */ opJMPr, // jmp [r1] 1
+ /* 0x07 */ opSARr, // sar r1,r2 1
+ /* 0x08 */ opMULr, // mul r1,r2 1
+ /* 0x09 */ opDIVr, // div r1,r2 1
+ /* 0x0a */ opMULUr, // mulu r1,r2 1
+ /* 0x0b */ opDIVUr, // divu r1,r2 1
+ /* 0x0c */ opORr, // or r1,r2 1
+ /* 0x0d */ opANDr, // and r1,r2 1
+ /* 0x0e */ opXORr, // xor r1,r2 1
+ /* 0x0f */ opNOTr, // not r1,r2 1
+ /* 0x10 */ opMOVi, // mov imm5,r2 2
+ /* 0x11 */ opADDi, // add imm5,r2 2
+ /* 0x12 */ opSETFi, // setf imm5,r2 2
+ /* 0x13 */ opCMPi, // cmp imm5,r2 2
+ /* 0x14 */ opSHLi, // shl imm5,r2 2
+ /* 0x15 */ opSHRi, // shr imm5,r2 2
+ /* 0x16 */ opEI, // ei 2
+ /* 0x17 */ opSARi, // sar imm5,r2 2
/* 0x18 */ opTRAP,
/* 0x19 */ opRETI,
- /* 0x1a */ opHALT, // halt 2
+ /* 0x1a */ opHALT, // halt 2
/* 0x1b */ opUNDEF,
- /* 0x1c */ opLDSR, // ldsr reg2,regID 2
- /* 0x1d */ opSTSR, // stsr regID,reg2 2
- /* 0x1e */ opDI, // DI 2
+ /* 0x1c */ opLDSR, // ldsr reg2,regID 2
+ /* 0x1d */ opSTSR, // stsr regID,reg2 2
+ /* 0x1e */ opDI, // DI 2
/* 0x1f */ opBSU,
- /* 0x20 */ opB, // Branch (7 bit opcode)
- /* 0x21 */ opB, // Branch (7 bit opcode)
- /* 0x22 */ opB, // Branch (7 bit opcode)
- /* 0x23 */ opB, // Branch (7 bit opcode)
- /* 0x24 */ opB, // Branch (7 bit opcode)
- /* 0x25 */ opB, // Branch (7 bit opcode)
- /* 0x26 */ opB, // Branch (7 bit opcode)
- /* 0x27 */ opB, // Branch (7 bit opcode)
- /* 0x28 */ opMOVEA, // movea imm16, reg1, reg2 5
- /* 0x29 */ opADDI, // addi imm16, reg1, reg2 5
- /* 0x2a */ opJR, // jr disp26 4
- /* 0x2b */ opJAL, // jal disp26 4
- /* 0x2c */ opORI, // ori imm16, reg1, reg2 5
- /* 0x2d */ opANDI, // andi imm16, reg1, reg2 5
- /* 0x2e */ opXORI, // xori imm16, reg1, reg2 5
- /* 0x2f */ opMOVHI, // movhi imm16, reg1 ,reg2 5
- /* 0x30 */ opLDB, // ld.b disp16[reg1],reg2 6a
- /* 0x31 */ opLDH, // ld.h disp16[reg1],reg2 6a
+ /* 0x20 */ opB, // Branch (7 bit opcode)
+ /* 0x21 */ opB, // Branch (7 bit opcode)
+ /* 0x22 */ opB, // Branch (7 bit opcode)
+ /* 0x23 */ opB, // Branch (7 bit opcode)
+ /* 0x24 */ opB, // Branch (7 bit opcode)
+ /* 0x25 */ opB, // Branch (7 bit opcode)
+ /* 0x26 */ opB, // Branch (7 bit opcode)
+ /* 0x27 */ opB, // Branch (7 bit opcode)
+ /* 0x28 */ opMOVEA, // movea imm16, reg1, reg2 5
+ /* 0x29 */ opADDI, // addi imm16, reg1, reg2 5
+ /* 0x2a */ opJR, // jr disp26 4
+ /* 0x2b */ opJAL, // jal disp26 4
+ /* 0x2c */ opORI, // ori imm16, reg1, reg2 5
+ /* 0x2d */ opANDI, // andi imm16, reg1, reg2 5
+ /* 0x2e */ opXORI, // xori imm16, reg1, reg2 5
+ /* 0x2f */ opMOVHI, // movhi imm16, reg1 ,reg2 5
+ /* 0x30 */ opLDB, // ld.b disp16[reg1],reg2 6a
+ /* 0x31 */ opLDH, // ld.h disp16[reg1],reg2 6a
/* 0x32 */ opUNDEF,
- /* 0x33 */ opLDW, // ld.w disp16[reg1],reg2 6a
- /* 0x34 */ opSTB, // st.b reg2, disp16[reg1] 6b
- /* 0x35 */ opSTH, // st.h reg2, disp16[reg1] 6b
+ /* 0x33 */ opLDW, // ld.w disp16[reg1],reg2 6a
+ /* 0x34 */ opSTB, // st.b reg2, disp16[reg1] 6b
+ /* 0x35 */ opSTH, // st.h reg2, disp16[reg1] 6b
/* 0x36 */ opUNDEF,
- /* 0x37 */ opSTW, // st.w reg2, disp16[reg1] 6b
- /* 0x38 */ opINB, // in.b disp16[reg1], reg2 6a
- /* 0x39 */ opINH, // in.h disp16[reg1], reg2 6a
- /* 0x3a */ opCAXI, // caxi disp16[reg1],reg2 6a
- /* 0x3b */ opINW, // in.w disp16[reg1], reg2 6a
- /* 0x3c */ opOUTB, // out.b reg2, disp16[reg1] 6b
- /* 0x3d */ opOUTH, // out.h reg2, disp16[reg1] 6b
+ /* 0x37 */ opSTW, // st.w reg2, disp16[reg1] 6b
+ /* 0x38 */ opINB, // in.b disp16[reg1], reg2 6a
+ /* 0x39 */ opINH, // in.h disp16[reg1], reg2 6a
+ /* 0x3a */ opCAXI, // caxi disp16[reg1],reg2 6a
+ /* 0x3b */ opINW, // in.w disp16[reg1], reg2 6a
+ /* 0x3c */ opOUTB, // out.b reg2, disp16[reg1] 6b
+ /* 0x3d */ opOUTH, // out.h reg2, disp16[reg1] 6b
/* 0x3e */ opFpoint, //floating point opcodes
- /* 0x3f */ opOUTW // out.w reg2, disp16[reg1] 6b
+ /* 0x3f */ opOUTW // out.w reg2, disp16[reg1] 6b
};
static CPU_INIT( v810 )
@@ -1270,10 +1270,10 @@ static CPU_RESET( v810 )
{
v810_state *cpustate = get_safe_token(device);
int i;
- for(i=0;i<64;i++) cpustate->reg[i]=0;
+ for(i=0;i<64;i++) cpustate->reg[i]=0;
cpustate->PC = 0xfffffff0;
cpustate->PSW = 0x1000;
- cpustate->ECR = 0x0000fff0;
+ cpustate->ECR = 0x0000fff0;
}
static void take_interrupt(v810_state *cpustate)
@@ -1289,7 +1289,7 @@ static void take_interrupt(v810_state *cpustate)
cpustate->PSW &= 0xfff0ffff; // clear interrupt level
SET_EP(1);
- SET_ID(1);
+ SET_ID(1);
cpustate->PSW |= num << 16;
cpustate->icount-= clkIF;
@@ -1336,73 +1336,73 @@ static CPU_SET_INFO( v810 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(cpustate, 1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 2: set_irq_line(cpustate, 2, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 3: set_irq_line(cpustate, 3, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 4: set_irq_line(cpustate, 4, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 5: set_irq_line(cpustate, 5, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 6: set_irq_line(cpustate, 6, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 7: set_irq_line(cpustate, 7, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 8: set_irq_line(cpustate, 8, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 9: set_irq_line(cpustate, 9, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 10: set_irq_line(cpustate, 10, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 11: set_irq_line(cpustate, 11, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 12: set_irq_line(cpustate, 12, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 13: set_irq_line(cpustate, 13, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 14: set_irq_line(cpustate, 14, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 15: set_irq_line(cpustate, 15, info->i); break;
-
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
-
- case CPUINFO_INT_PREVIOUSPC: cpustate->PPC = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 2: set_irq_line(cpustate, 2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 3: set_irq_line(cpustate, 3, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 4: set_irq_line(cpustate, 4, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 5: set_irq_line(cpustate, 5, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 6: set_irq_line(cpustate, 6, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 7: set_irq_line(cpustate, 7, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 8: set_irq_line(cpustate, 8, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 9: set_irq_line(cpustate, 9, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 10: set_irq_line(cpustate, 10, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 11: set_irq_line(cpustate, 11, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 12: set_irq_line(cpustate, 12, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 13: set_irq_line(cpustate, 13, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 14: set_irq_line(cpustate, 14, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 15: set_irq_line(cpustate, 15, info->i); break;
+
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+
+ case CPUINFO_INT_PREVIOUSPC: cpustate->PPC = info->i; break;
case CPUINFO_INT_REGISTER + V810_PC:
- case CPUINFO_INT_PC: cpustate->PC = info->i; break;
+ case CPUINFO_INT_PC: cpustate->PC = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R0: cpustate->R0 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R1: cpustate->R1 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R2: cpustate->R2 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R0: cpustate->R0 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R1: cpustate->R1 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R2: cpustate->R2 = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + V810_SP: cpustate->SP = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R4: cpustate->R4 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R5: cpustate->R5 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R6: cpustate->R6 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R7: cpustate->R7 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R8: cpustate->R8 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R9: cpustate->R9 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R10: cpustate->R10 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R11: cpustate->R11 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R12: cpustate->R12 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R13: cpustate->R13 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R14: cpustate->R14 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R15: cpustate->R15 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R16: cpustate->R16 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R17: cpustate->R17 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R18: cpustate->R18 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R19: cpustate->R19 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R20: cpustate->R20 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R21: cpustate->R21 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R22: cpustate->R22 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R23: cpustate->R23 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R24: cpustate->R24 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R25: cpustate->R25 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R26: cpustate->R26 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R27: cpustate->R27 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R28: cpustate->R28 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R29: cpustate->R29 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R30: cpustate->R30 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_R31: cpustate->R31 = info->i; break;
- case CPUINFO_INT_REGISTER + V810_PSW: cpustate->PSW = info->i; break;
- case CPUINFO_INT_REGISTER + V810_EIPC: cpustate->EIPC = info->i; break;
- case CPUINFO_INT_REGISTER + V810_EIPSW: cpustate->EIPSW = info->i; break;
- case CPUINFO_INT_REGISTER + V810_FEPC: cpustate->FEPC = info->i; break;
- case CPUINFO_INT_REGISTER + V810_FEPSW: cpustate->FEPSW = info->i; break;
- case CPUINFO_INT_REGISTER + V810_ECR: cpustate->ECR = info->i; break;
- case CPUINFO_INT_REGISTER + V810_PIR: cpustate->PIR = info->i; break;
- case CPUINFO_INT_REGISTER + V810_TKCW: cpustate->TKCW = info->i; break;
- case CPUINFO_INT_REGISTER + V810_CHCW: cpustate->CHCW = info->i; break;
- case CPUINFO_INT_REGISTER + V810_ADTRE: cpustate->ADTRE = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_SP: cpustate->SP = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R4: cpustate->R4 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R5: cpustate->R5 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R6: cpustate->R6 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R7: cpustate->R7 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R8: cpustate->R8 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R9: cpustate->R9 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R10: cpustate->R10 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R11: cpustate->R11 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R12: cpustate->R12 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R13: cpustate->R13 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R14: cpustate->R14 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R15: cpustate->R15 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R16: cpustate->R16 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R17: cpustate->R17 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R18: cpustate->R18 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R19: cpustate->R19 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R20: cpustate->R20 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R21: cpustate->R21 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R22: cpustate->R22 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R23: cpustate->R23 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R24: cpustate->R24 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R25: cpustate->R25 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R26: cpustate->R26 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R27: cpustate->R27 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R28: cpustate->R28 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R29: cpustate->R29 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R30: cpustate->R30 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_R31: cpustate->R31 = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_PSW: cpustate->PSW = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_EIPC: cpustate->EIPC = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_EIPSW: cpustate->EIPSW = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_FEPC: cpustate->FEPC = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_FEPSW: cpustate->FEPSW = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_ECR: cpustate->ECR = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_PIR: cpustate->PIR = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_TKCW: cpustate->TKCW = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_CHCW: cpustate->CHCW = info->i; break;
+ case CPUINFO_INT_REGISTER + V810_ADTRE: cpustate->ADTRE = info->i; break;
}
}
@@ -1432,154 +1432,154 @@ CPU_GET_INFO( v810 )
GET_Z ? 'Z':'.');
break;
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(v810_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 6; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 32; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->irq_line == 0) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 1: info->i = (cpustate->irq_line == 1) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 2: info->i = (cpustate->irq_line == 2) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 3: info->i = (cpustate->irq_line == 3) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 4: info->i = (cpustate->irq_line == 4) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 5: info->i = (cpustate->irq_line == 5) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 6: info->i = (cpustate->irq_line == 6) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 7: info->i = (cpustate->irq_line == 7) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 8: info->i = (cpustate->irq_line == 8) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 9: info->i = (cpustate->irq_line == 9) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 10: info->i = (cpustate->irq_line == 10) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 11: info->i = (cpustate->irq_line == 11) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 12: info->i = (cpustate->irq_line == 12) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 13: info->i = (cpustate->irq_line == 13) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 14: info->i = (cpustate->irq_line == 14) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + 15: info->i = (cpustate->irq_line == 15) ? cpustate->irq_state : CLEAR_LINE; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break;
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PPC; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(v810_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 16; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 3; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 6; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 32; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = (cpustate->irq_line == 0) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 1: info->i = (cpustate->irq_line == 1) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 2: info->i = (cpustate->irq_line == 2) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 3: info->i = (cpustate->irq_line == 3) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 4: info->i = (cpustate->irq_line == 4) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 5: info->i = (cpustate->irq_line == 5) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 6: info->i = (cpustate->irq_line == 6) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 7: info->i = (cpustate->irq_line == 7) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 8: info->i = (cpustate->irq_line == 8) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 9: info->i = (cpustate->irq_line == 9) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 10: info->i = (cpustate->irq_line == 10) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 11: info->i = (cpustate->irq_line == 11) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 12: info->i = (cpustate->irq_line == 12) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 13: info->i = (cpustate->irq_line == 13) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 14: info->i = (cpustate->irq_line == 14) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + 15: info->i = (cpustate->irq_line == 15) ? cpustate->irq_state : CLEAR_LINE; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_line; break;
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->PPC; break;
case CPUINFO_INT_REGISTER + V810_PC:
- case CPUINFO_INT_PC: info->i = cpustate->PC; break;
+ case CPUINFO_INT_PC: info->i = cpustate->PC; break;
- case CPUINFO_INT_REGISTER + V810_R0: info->i = cpustate->R0; break;
- case CPUINFO_INT_REGISTER + V810_R1: info->i = cpustate->R1; break;
- case CPUINFO_INT_REGISTER + V810_R2: info->i = cpustate->R2; break;
+ case CPUINFO_INT_REGISTER + V810_R0: info->i = cpustate->R0; break;
+ case CPUINFO_INT_REGISTER + V810_R1: info->i = cpustate->R1; break;
+ case CPUINFO_INT_REGISTER + V810_R2: info->i = cpustate->R2; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + V810_SP: info->i = cpustate->SP; break;
- case CPUINFO_INT_REGISTER + V810_R4: info->i = cpustate->R4; break;
- case CPUINFO_INT_REGISTER + V810_R5: info->i = cpustate->R5; break;
- case CPUINFO_INT_REGISTER + V810_R6: info->i = cpustate->R6; break;
- case CPUINFO_INT_REGISTER + V810_R7: info->i = cpustate->R7; break;
- case CPUINFO_INT_REGISTER + V810_R8: info->i = cpustate->R8; break;
- case CPUINFO_INT_REGISTER + V810_R9: info->i = cpustate->R9; break;
- case CPUINFO_INT_REGISTER + V810_R10: info->i = cpustate->R10; break;
- case CPUINFO_INT_REGISTER + V810_R11: info->i = cpustate->R11; break;
- case CPUINFO_INT_REGISTER + V810_R12: info->i = cpustate->R12; break;
- case CPUINFO_INT_REGISTER + V810_R13: info->i = cpustate->R13; break;
- case CPUINFO_INT_REGISTER + V810_R14: info->i = cpustate->R14; break;
- case CPUINFO_INT_REGISTER + V810_R15: info->i = cpustate->R15; break;
- case CPUINFO_INT_REGISTER + V810_R16: info->i = cpustate->R16; break;
- case CPUINFO_INT_REGISTER + V810_R17: info->i = cpustate->R17; break;
- case CPUINFO_INT_REGISTER + V810_R18: info->i = cpustate->R18; break;
- case CPUINFO_INT_REGISTER + V810_R19: info->i = cpustate->R19; break;
- case CPUINFO_INT_REGISTER + V810_R20: info->i = cpustate->R20; break;
- case CPUINFO_INT_REGISTER + V810_R21: info->i = cpustate->R21; break;
- case CPUINFO_INT_REGISTER + V810_R22: info->i = cpustate->R22; break;
- case CPUINFO_INT_REGISTER + V810_R23: info->i = cpustate->R23; break;
- case CPUINFO_INT_REGISTER + V810_R24: info->i = cpustate->R24; break;
- case CPUINFO_INT_REGISTER + V810_R25: info->i = cpustate->R25; break;
- case CPUINFO_INT_REGISTER + V810_R26: info->i = cpustate->R26; break;
- case CPUINFO_INT_REGISTER + V810_R27: info->i = cpustate->R27; break;
- case CPUINFO_INT_REGISTER + V810_R28: info->i = cpustate->R28; break;
- case CPUINFO_INT_REGISTER + V810_R29: info->i = cpustate->R29; break;
- case CPUINFO_INT_REGISTER + V810_R30: info->i = cpustate->R30; break;
- case CPUINFO_INT_REGISTER + V810_R31: info->i = cpustate->R31; break;
- case CPUINFO_INT_REGISTER + V810_PSW: info->i = cpustate->PSW; break;
- case CPUINFO_INT_REGISTER + V810_EIPC: info->i = cpustate->EIPC; break;
- case CPUINFO_INT_REGISTER + V810_EIPSW: info->i = cpustate->EIPSW; break;
- case CPUINFO_INT_REGISTER + V810_FEPC: info->i = cpustate->FEPC; break;
- case CPUINFO_INT_REGISTER + V810_FEPSW: info->i = cpustate->FEPSW; break;
- case CPUINFO_INT_REGISTER + V810_ECR: info->i = cpustate->ECR; break;
- case CPUINFO_INT_REGISTER + V810_PIR: info->i = cpustate->PIR; break;
- case CPUINFO_INT_REGISTER + V810_TKCW: info->i = cpustate->TKCW; break;
- case CPUINFO_INT_REGISTER + V810_CHCW: info->i = cpustate->CHCW; break;
- case CPUINFO_INT_REGISTER + V810_ADTRE: info->i = cpustate->ADTRE; break;
+ case CPUINFO_INT_REGISTER + V810_SP: info->i = cpustate->SP; break;
+ case CPUINFO_INT_REGISTER + V810_R4: info->i = cpustate->R4; break;
+ case CPUINFO_INT_REGISTER + V810_R5: info->i = cpustate->R5; break;
+ case CPUINFO_INT_REGISTER + V810_R6: info->i = cpustate->R6; break;
+ case CPUINFO_INT_REGISTER + V810_R7: info->i = cpustate->R7; break;
+ case CPUINFO_INT_REGISTER + V810_R8: info->i = cpustate->R8; break;
+ case CPUINFO_INT_REGISTER + V810_R9: info->i = cpustate->R9; break;
+ case CPUINFO_INT_REGISTER + V810_R10: info->i = cpustate->R10; break;
+ case CPUINFO_INT_REGISTER + V810_R11: info->i = cpustate->R11; break;
+ case CPUINFO_INT_REGISTER + V810_R12: info->i = cpustate->R12; break;
+ case CPUINFO_INT_REGISTER + V810_R13: info->i = cpustate->R13; break;
+ case CPUINFO_INT_REGISTER + V810_R14: info->i = cpustate->R14; break;
+ case CPUINFO_INT_REGISTER + V810_R15: info->i = cpustate->R15; break;
+ case CPUINFO_INT_REGISTER + V810_R16: info->i = cpustate->R16; break;
+ case CPUINFO_INT_REGISTER + V810_R17: info->i = cpustate->R17; break;
+ case CPUINFO_INT_REGISTER + V810_R18: info->i = cpustate->R18; break;
+ case CPUINFO_INT_REGISTER + V810_R19: info->i = cpustate->R19; break;
+ case CPUINFO_INT_REGISTER + V810_R20: info->i = cpustate->R20; break;
+ case CPUINFO_INT_REGISTER + V810_R21: info->i = cpustate->R21; break;
+ case CPUINFO_INT_REGISTER + V810_R22: info->i = cpustate->R22; break;
+ case CPUINFO_INT_REGISTER + V810_R23: info->i = cpustate->R23; break;
+ case CPUINFO_INT_REGISTER + V810_R24: info->i = cpustate->R24; break;
+ case CPUINFO_INT_REGISTER + V810_R25: info->i = cpustate->R25; break;
+ case CPUINFO_INT_REGISTER + V810_R26: info->i = cpustate->R26; break;
+ case CPUINFO_INT_REGISTER + V810_R27: info->i = cpustate->R27; break;
+ case CPUINFO_INT_REGISTER + V810_R28: info->i = cpustate->R28; break;
+ case CPUINFO_INT_REGISTER + V810_R29: info->i = cpustate->R29; break;
+ case CPUINFO_INT_REGISTER + V810_R30: info->i = cpustate->R30; break;
+ case CPUINFO_INT_REGISTER + V810_R31: info->i = cpustate->R31; break;
+ case CPUINFO_INT_REGISTER + V810_PSW: info->i = cpustate->PSW; break;
+ case CPUINFO_INT_REGISTER + V810_EIPC: info->i = cpustate->EIPC; break;
+ case CPUINFO_INT_REGISTER + V810_EIPSW: info->i = cpustate->EIPSW; break;
+ case CPUINFO_INT_REGISTER + V810_FEPC: info->i = cpustate->FEPC; break;
+ case CPUINFO_INT_REGISTER + V810_FEPSW: info->i = cpustate->FEPSW; break;
+ case CPUINFO_INT_REGISTER + V810_ECR: info->i = cpustate->ECR; break;
+ case CPUINFO_INT_REGISTER + V810_PIR: info->i = cpustate->PIR; break;
+ case CPUINFO_INT_REGISTER + V810_TKCW: info->i = cpustate->TKCW; break;
+ case CPUINFO_INT_REGISTER + V810_CHCW: info->i = cpustate->CHCW; break;
+ case CPUINFO_INT_REGISTER + V810_ADTRE: info->i = cpustate->ADTRE; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v810); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v810); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(v810); break;
- case CPUINFO_FCT_EXIT: info->exit = NULL; break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(v810); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v810); break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(v810); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(v810); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(v810); break;
+ case CPUINFO_FCT_EXIT: info->exit = NULL; break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(v810); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(v810); break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "V810"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V810"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Tomasz Slanina"); break;
-
- case CPUINFO_STR_REGISTER + V810_PC: sprintf(info->s, "PC:%08X", cpustate->PC); break;
- case CPUINFO_STR_REGISTER + V810_R0: sprintf(info->s, "R0 :%08X", cpustate->R0); break;
- case CPUINFO_STR_REGISTER + V810_R1: sprintf(info->s, "R1 :%08X", cpustate->R1); break;
- case CPUINFO_STR_REGISTER + V810_R2: sprintf(info->s, "R2 :%08X", cpustate->R2); break;
- case CPUINFO_STR_REGISTER + V810_SP: sprintf(info->s, "SP :%08X", cpustate->SP); break;
- case CPUINFO_STR_REGISTER + V810_R4: sprintf(info->s, "R4 :%08X", cpustate->R4); break;
- case CPUINFO_STR_REGISTER + V810_R5: sprintf(info->s, "R5 :%08X", cpustate->R5); break;
- case CPUINFO_STR_REGISTER + V810_R6: sprintf(info->s, "R6 :%08X", cpustate->R6); break;
- case CPUINFO_STR_REGISTER + V810_R7: sprintf(info->s, "R7 :%08X", cpustate->R7); break;
- case CPUINFO_STR_REGISTER + V810_R8: sprintf(info->s, "R8 :%08X", cpustate->R8); break;
- case CPUINFO_STR_REGISTER + V810_R9: sprintf(info->s, "R9 :%08X", cpustate->R9); break;
- case CPUINFO_STR_REGISTER + V810_R10: sprintf(info->s, "R10:%08X", cpustate->R10); break;
- case CPUINFO_STR_REGISTER + V810_R11: sprintf(info->s, "R11:%08X", cpustate->R11); break;
- case CPUINFO_STR_REGISTER + V810_R12: sprintf(info->s, "R12:%08X", cpustate->R12); break;
- case CPUINFO_STR_REGISTER + V810_R13: sprintf(info->s, "R13:%08X", cpustate->R13); break;
- case CPUINFO_STR_REGISTER + V810_R14: sprintf(info->s, "R14:%08X", cpustate->R14); break;
- case CPUINFO_STR_REGISTER + V810_R15: sprintf(info->s, "R15:%08X", cpustate->R15); break;
- case CPUINFO_STR_REGISTER + V810_R16: sprintf(info->s, "R16:%08X", cpustate->R16); break;
- case CPUINFO_STR_REGISTER + V810_R17: sprintf(info->s, "R17:%08X", cpustate->R17); break;
- case CPUINFO_STR_REGISTER + V810_R18: sprintf(info->s, "R18:%08X", cpustate->R18); break;
- case CPUINFO_STR_REGISTER + V810_R19: sprintf(info->s, "R19:%08X", cpustate->R19); break;
- case CPUINFO_STR_REGISTER + V810_R20: sprintf(info->s, "R20:%08X", cpustate->R20); break;
- case CPUINFO_STR_REGISTER + V810_R21: sprintf(info->s, "R21:%08X", cpustate->R21); break;
- case CPUINFO_STR_REGISTER + V810_R22: sprintf(info->s, "R22:%08X", cpustate->R22); break;
- case CPUINFO_STR_REGISTER + V810_R23: sprintf(info->s, "R23:%08X", cpustate->R23); break;
- case CPUINFO_STR_REGISTER + V810_R24: sprintf(info->s, "R24:%08X", cpustate->R24); break;
- case CPUINFO_STR_REGISTER + V810_R25: sprintf(info->s, "R25:%08X", cpustate->R25); break;
- case CPUINFO_STR_REGISTER + V810_R26: sprintf(info->s, "R26:%08X", cpustate->R26); break;
- case CPUINFO_STR_REGISTER + V810_R27: sprintf(info->s, "R27:%08X", cpustate->R27); break;
- case CPUINFO_STR_REGISTER + V810_R28: sprintf(info->s, "R28:%08X", cpustate->R28); break;
- case CPUINFO_STR_REGISTER + V810_R29: sprintf(info->s, "R29:%08X", cpustate->R29); break;
- case CPUINFO_STR_REGISTER + V810_R30: sprintf(info->s, "R30:%08X", cpustate->R30); break;
- case CPUINFO_STR_REGISTER + V810_R31: sprintf(info->s, "R31:%08X", cpustate->R31); break;
- case CPUINFO_STR_REGISTER + V810_EIPC: sprintf(info->s, "EIPC :%08X", cpustate->EIPC); break;
- case CPUINFO_STR_REGISTER + V810_PSW: sprintf(info->s, "PSW :%08X", cpustate->PSW); break;
- case CPUINFO_STR_REGISTER + V810_EIPSW: sprintf(info->s, "EIPSW:%08X", cpustate->EIPSW); break;
- case CPUINFO_STR_REGISTER + V810_FEPC: sprintf(info->s, "FEPC :%08X", cpustate->FEPC); break;
- case CPUINFO_STR_REGISTER + V810_FEPSW: sprintf(info->s, "FEPSW:%08X", cpustate->FEPSW); break;
- case CPUINFO_STR_REGISTER + V810_ECR: sprintf(info->s, "ECR :%08X", cpustate->ECR); break;
- case CPUINFO_STR_REGISTER + V810_PIR: sprintf(info->s, "PIR :%08X", cpustate->PIR); break;
- case CPUINFO_STR_REGISTER + V810_TKCW: sprintf(info->s, "TKCW :%08X", cpustate->TKCW); break;
- case CPUINFO_STR_REGISTER + V810_CHCW: sprintf(info->s, "CHCW :%08X", cpustate->CHCW); break;
- case CPUINFO_STR_REGISTER + V810_ADTRE: sprintf(info->s, "ADTRE:%08X", cpustate->ADTRE); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "V810"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "NEC V810"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Tomasz Slanina"); break;
+
+ case CPUINFO_STR_REGISTER + V810_PC: sprintf(info->s, "PC:%08X", cpustate->PC); break;
+ case CPUINFO_STR_REGISTER + V810_R0: sprintf(info->s, "R0 :%08X", cpustate->R0); break;
+ case CPUINFO_STR_REGISTER + V810_R1: sprintf(info->s, "R1 :%08X", cpustate->R1); break;
+ case CPUINFO_STR_REGISTER + V810_R2: sprintf(info->s, "R2 :%08X", cpustate->R2); break;
+ case CPUINFO_STR_REGISTER + V810_SP: sprintf(info->s, "SP :%08X", cpustate->SP); break;
+ case CPUINFO_STR_REGISTER + V810_R4: sprintf(info->s, "R4 :%08X", cpustate->R4); break;
+ case CPUINFO_STR_REGISTER + V810_R5: sprintf(info->s, "R5 :%08X", cpustate->R5); break;
+ case CPUINFO_STR_REGISTER + V810_R6: sprintf(info->s, "R6 :%08X", cpustate->R6); break;
+ case CPUINFO_STR_REGISTER + V810_R7: sprintf(info->s, "R7 :%08X", cpustate->R7); break;
+ case CPUINFO_STR_REGISTER + V810_R8: sprintf(info->s, "R8 :%08X", cpustate->R8); break;
+ case CPUINFO_STR_REGISTER + V810_R9: sprintf(info->s, "R9 :%08X", cpustate->R9); break;
+ case CPUINFO_STR_REGISTER + V810_R10: sprintf(info->s, "R10:%08X", cpustate->R10); break;
+ case CPUINFO_STR_REGISTER + V810_R11: sprintf(info->s, "R11:%08X", cpustate->R11); break;
+ case CPUINFO_STR_REGISTER + V810_R12: sprintf(info->s, "R12:%08X", cpustate->R12); break;
+ case CPUINFO_STR_REGISTER + V810_R13: sprintf(info->s, "R13:%08X", cpustate->R13); break;
+ case CPUINFO_STR_REGISTER + V810_R14: sprintf(info->s, "R14:%08X", cpustate->R14); break;
+ case CPUINFO_STR_REGISTER + V810_R15: sprintf(info->s, "R15:%08X", cpustate->R15); break;
+ case CPUINFO_STR_REGISTER + V810_R16: sprintf(info->s, "R16:%08X", cpustate->R16); break;
+ case CPUINFO_STR_REGISTER + V810_R17: sprintf(info->s, "R17:%08X", cpustate->R17); break;
+ case CPUINFO_STR_REGISTER + V810_R18: sprintf(info->s, "R18:%08X", cpustate->R18); break;
+ case CPUINFO_STR_REGISTER + V810_R19: sprintf(info->s, "R19:%08X", cpustate->R19); break;
+ case CPUINFO_STR_REGISTER + V810_R20: sprintf(info->s, "R20:%08X", cpustate->R20); break;
+ case CPUINFO_STR_REGISTER + V810_R21: sprintf(info->s, "R21:%08X", cpustate->R21); break;
+ case CPUINFO_STR_REGISTER + V810_R22: sprintf(info->s, "R22:%08X", cpustate->R22); break;
+ case CPUINFO_STR_REGISTER + V810_R23: sprintf(info->s, "R23:%08X", cpustate->R23); break;
+ case CPUINFO_STR_REGISTER + V810_R24: sprintf(info->s, "R24:%08X", cpustate->R24); break;
+ case CPUINFO_STR_REGISTER + V810_R25: sprintf(info->s, "R25:%08X", cpustate->R25); break;
+ case CPUINFO_STR_REGISTER + V810_R26: sprintf(info->s, "R26:%08X", cpustate->R26); break;
+ case CPUINFO_STR_REGISTER + V810_R27: sprintf(info->s, "R27:%08X", cpustate->R27); break;
+ case CPUINFO_STR_REGISTER + V810_R28: sprintf(info->s, "R28:%08X", cpustate->R28); break;
+ case CPUINFO_STR_REGISTER + V810_R29: sprintf(info->s, "R29:%08X", cpustate->R29); break;
+ case CPUINFO_STR_REGISTER + V810_R30: sprintf(info->s, "R30:%08X", cpustate->R30); break;
+ case CPUINFO_STR_REGISTER + V810_R31: sprintf(info->s, "R31:%08X", cpustate->R31); break;
+ case CPUINFO_STR_REGISTER + V810_EIPC: sprintf(info->s, "EIPC :%08X", cpustate->EIPC); break;
+ case CPUINFO_STR_REGISTER + V810_PSW: sprintf(info->s, "PSW :%08X", cpustate->PSW); break;
+ case CPUINFO_STR_REGISTER + V810_EIPSW: sprintf(info->s, "EIPSW:%08X", cpustate->EIPSW); break;
+ case CPUINFO_STR_REGISTER + V810_FEPC: sprintf(info->s, "FEPC :%08X", cpustate->FEPC); break;
+ case CPUINFO_STR_REGISTER + V810_FEPSW: sprintf(info->s, "FEPSW:%08X", cpustate->FEPSW); break;
+ case CPUINFO_STR_REGISTER + V810_ECR: sprintf(info->s, "ECR :%08X", cpustate->ECR); break;
+ case CPUINFO_STR_REGISTER + V810_PIR: sprintf(info->s, "PIR :%08X", cpustate->PIR); break;
+ case CPUINFO_STR_REGISTER + V810_TKCW: sprintf(info->s, "TKCW :%08X", cpustate->TKCW); break;
+ case CPUINFO_STR_REGISTER + V810_CHCW: sprintf(info->s, "CHCW :%08X", cpustate->CHCW); break;
+ case CPUINFO_STR_REGISTER + V810_ADTRE: sprintf(info->s, "ADTRE:%08X", cpustate->ADTRE); break;
}
}
diff --git a/src/emu/cpu/v810/v810dasm.c b/src/emu/cpu/v810/v810dasm.c
index 3503ae09a83..1ffcc26bd8c 100644
--- a/src/emu/cpu/v810/v810dasm.c
+++ b/src/emu/cpu/v810/v810dasm.c
@@ -59,7 +59,7 @@ CPU_DISASSEMBLE( v810 )
case 0x09: sprintf(buffer,"DIV %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
case 0x0a: sprintf(buffer,"MULU %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
case 0x0b: sprintf(buffer,"DIVU %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
- case 0x0c: sprintf(buffer,"OR %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
+ case 0x0c: sprintf(buffer,"OR %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
case 0x0d: sprintf(buffer,"AND %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
case 0x0e: sprintf(buffer,"XOR %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
case 0x0f: sprintf(buffer,"NOT %s,%s",GET1s(opc),GET2s(opc)); size=2; break;
@@ -81,22 +81,22 @@ CPU_DISASSEMBLE( v810 )
case 0x1f:
switch(opc&0x1f)
{
- case 0x00: sprintf(buffer,"SCH0BSU"); break;
- case 0x01: sprintf(buffer,"SCH0BSD"); break;
- case 0x02: sprintf(buffer,"SCH1BSU"); break;
- case 0x03: sprintf(buffer,"SCH1BSD"); break;
- case 0x04: sprintf(buffer,"UnkS 4"); break;
- case 0x05: sprintf(buffer,"UnkS 5"); break;
- case 0x06: sprintf(buffer,"UnkS 6"); break;
- case 0x08: sprintf(buffer,"ORBSU"); break;
- case 0x09: sprintf(buffer,"ANDBSU"); break;
- case 0x0a: sprintf(buffer,"XORBSU"); break;
- case 0x0b: sprintf(buffer,"MOVBSU"); break;
- case 0x0c: sprintf(buffer,"ORNBSU"); break;
- case 0x0d: sprintf(buffer,"ANDNBSU"); break;
- case 0x0e: sprintf(buffer,"XORNBSU"); break;
- case 0x0f: sprintf(buffer,"NOTBSU"); break;
- default: sprintf(buffer,"UnkBS 0x%X",opc&0x1f); break;
+ case 0x00: sprintf(buffer,"SCH0BSU"); break;
+ case 0x01: sprintf(buffer,"SCH0BSD"); break;
+ case 0x02: sprintf(buffer,"SCH1BSU"); break;
+ case 0x03: sprintf(buffer,"SCH1BSD"); break;
+ case 0x04: sprintf(buffer,"UnkS 4"); break;
+ case 0x05: sprintf(buffer,"UnkS 5"); break;
+ case 0x06: sprintf(buffer,"UnkS 6"); break;
+ case 0x08: sprintf(buffer,"ORBSU"); break;
+ case 0x09: sprintf(buffer,"ANDBSU"); break;
+ case 0x0a: sprintf(buffer,"XORBSU"); break;
+ case 0x0b: sprintf(buffer,"MOVBSU"); break;
+ case 0x0c: sprintf(buffer,"ORNBSU"); break;
+ case 0x0d: sprintf(buffer,"ANDNBSU"); break;
+ case 0x0e: sprintf(buffer,"XORNBSU"); break;
+ case 0x0f: sprintf(buffer,"NOTBSU"); break;
+ default: sprintf(buffer,"UnkBS 0x%X",opc&0x1f); break;
}
size=2;
break;
@@ -108,7 +108,7 @@ CPU_DISASSEMBLE( v810 )
case 0x25:
case 0x26:
case 0x27: switch( (opc>>9) &0xf)
- {
+ {
case 0x0: sprintf(buffer,"BV %X",pc+D9(opc)); break;
case 0x1: sprintf(buffer,"BL %X",pc+D9(opc)); break;
case 0x2: sprintf(buffer,"BE %X",pc+D9(opc)); break;
@@ -125,33 +125,33 @@ CPU_DISASSEMBLE( v810 )
case 0xd: sprintf(buffer,"NOP"); break;
case 0xe: sprintf(buffer,"BGE %X",pc+D9(opc)); break;
case 0xf: sprintf(buffer,"BGT %X",pc+D9(opc)); break;
- }
- size=2;
- break;
+ }
+ size=2;
+ break;
- case 0x28: sprintf(buffer,"MOVEA %X, %s, %s",I16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x29: sprintf(buffer,"ADDI %X, %s, %s",I16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x2a: sprintf(buffer,"JR %X",pc+D26(opc,opc2));size=4; break;
- case 0x2b: sprintf(buffer,"JAL %X",pc+D26(opc,opc2));size=4; flags = DASMFLAG_STEP_OVER; break;
- case 0x2c: sprintf(buffer,"ORI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x2d: sprintf(buffer,"ANDI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x2e: sprintf(buffer,"XORI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x2f: sprintf(buffer,"MOVHI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x30: sprintf(buffer,"LDB %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x31: sprintf(buffer,"LDH %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x28: sprintf(buffer,"MOVEA %X, %s, %s",I16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x29: sprintf(buffer,"ADDI %X, %s, %s",I16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x2a: sprintf(buffer,"JR %X",pc+D26(opc,opc2));size=4; break;
+ case 0x2b: sprintf(buffer,"JAL %X",pc+D26(opc,opc2));size=4; flags = DASMFLAG_STEP_OVER; break;
+ case 0x2c: sprintf(buffer,"ORI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x2d: sprintf(buffer,"ANDI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x2e: sprintf(buffer,"XORI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x2f: sprintf(buffer,"MOVHI %X, %s, %s",UI16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x30: sprintf(buffer,"LDB %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x31: sprintf(buffer,"LDH %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
case 0x32: sprintf(buffer,"Unk 0x32"); size=2; break;
- case 0x33: sprintf(buffer,"LDW %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x34: sprintf(buffer,"STB %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
- case 0x35: sprintf(buffer,"STH %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
+ case 0x33: sprintf(buffer,"LDW %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x34: sprintf(buffer,"STB %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
+ case 0x35: sprintf(buffer,"STH %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
case 0x36: sprintf(buffer,"Unk 0x36"); size=2; break;
- case 0x37: sprintf(buffer,"STW %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
- case 0x38: sprintf(buffer,"INB %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x39: sprintf(buffer,"INH %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x3a: sprintf(buffer,"CAXI %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x3b: sprintf(buffer,"INW %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x37: sprintf(buffer,"STW %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
+ case 0x38: sprintf(buffer,"INB %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x39: sprintf(buffer,"INH %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x3a: sprintf(buffer,"CAXI %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
+ case 0x3b: sprintf(buffer,"INW %X[%s], %s",D16(opc2),GET1s(opc),GET2s(opc));size=4; break;
- case 0x3c: sprintf(buffer,"OUTB %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
- case 0x3d: sprintf(buffer,"OUTH %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
+ case 0x3c: sprintf(buffer,"OUTB %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
+ case 0x3d: sprintf(buffer,"OUTH %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
case 0x3e:
switch((opc2&0xfc00)>>10)
{
@@ -167,10 +167,9 @@ CPU_DISASSEMBLE( v810 )
}
size=4;
break;
- case 0x3f: sprintf(buffer,"OUTW %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
+ case 0x3f: sprintf(buffer,"OUTW %s, %X[%s]",GET2s(opc),D16(opc2),GET1s(opc));size=4; break;
default : size=2;
}
return size | flags | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/vtlb.c b/src/emu/cpu/vtlb.c
index b6092f4ecae..5b83f87c4b3 100644
--- a/src/emu/cpu/vtlb.c
+++ b/src/emu/cpu/vtlb.c
@@ -19,7 +19,7 @@
DEBUGGING
***************************************************************************/
-#define PRINTF_TLB (0)
+#define PRINTF_TLB (0)
@@ -30,17 +30,17 @@
/* VTLB state */
struct vtlb_state
{
- cpu_device * cpudevice; /* CPU device */
- address_spacenum space; /* address space */
- int dynamic; /* number of dynamic entries */
- int fixed; /* number of fixed entries */
- int dynindex; /* index of next dynamic entry */
- int pageshift; /* bits to shift to get page index */
- int addrwidth; /* logical address bus width */
- offs_t * live; /* array of live entries by table index */
- int * fixedpages; /* number of pages each fixed entry covers */
- vtlb_entry * table; /* table of entries by address */
- vtlb_entry * save; /* cache of live table entries for saving */
+ cpu_device * cpudevice; /* CPU device */
+ address_spacenum space; /* address space */
+ int dynamic; /* number of dynamic entries */
+ int fixed; /* number of fixed entries */
+ int dynindex; /* index of next dynamic entry */
+ int pageshift; /* bits to shift to get page index */
+ int addrwidth; /* logical address bus width */
+ offs_t * live; /* array of live entries by table index */
+ int * fixedpages; /* number of pages each fixed entry covers */
+ vtlb_entry * table; /* table of entries by address */
+ vtlb_entry * save; /* cache of live table entries for saving */
};
diff --git a/src/emu/cpu/vtlb.h b/src/emu/cpu/vtlb.h
index 98805fe949e..fe21b7d9176 100644
--- a/src/emu/cpu/vtlb.h
+++ b/src/emu/cpu/vtlb.h
@@ -21,16 +21,16 @@
CONSTANTS
***************************************************************************/
-#define VTLB_FLAGS_MASK 0xff
-
-#define VTLB_READ_ALLOWED 0x01 /* (1 << TRANSLATE_READ) */
-#define VTLB_WRITE_ALLOWED 0x02 /* (1 << TRANSLATE_WRITE) */
-#define VTLB_FETCH_ALLOWED 0x04 /* (1 << TRANSLATE_FETCH) */
-#define VTLB_FLAG_VALID 0x08
-#define VTLB_USER_READ_ALLOWED 0x10 /* (1 << TRANSLATE_READ_USER) */
-#define VTLB_USER_WRITE_ALLOWED 0x20 /* (1 << TRANSLATE_WRITE_USER) */
-#define VTLB_USER_FETCH_ALLOWED 0x40 /* (1 << TRANSLATE_FETCH_USER) */
-#define VTLB_FLAG_FIXED 0x80
+#define VTLB_FLAGS_MASK 0xff
+
+#define VTLB_READ_ALLOWED 0x01 /* (1 << TRANSLATE_READ) */
+#define VTLB_WRITE_ALLOWED 0x02 /* (1 << TRANSLATE_WRITE) */
+#define VTLB_FETCH_ALLOWED 0x04 /* (1 << TRANSLATE_FETCH) */
+#define VTLB_FLAG_VALID 0x08
+#define VTLB_USER_READ_ALLOWED 0x10 /* (1 << TRANSLATE_READ_USER) */
+#define VTLB_USER_WRITE_ALLOWED 0x20 /* (1 << TRANSLATE_WRITE_USER) */
+#define VTLB_USER_FETCH_ALLOWED 0x40 /* (1 << TRANSLATE_FETCH_USER) */
+#define VTLB_FLAG_FIXED 0x80
diff --git a/src/emu/cpu/x86emit.h b/src/emu/cpu/x86emit.h
index 7d4129d0def..5ca12233d26 100644
--- a/src/emu/cpu/x86emit.h
+++ b/src/emu/cpu/x86emit.h
@@ -54,13 +54,13 @@
#define __X86EMIT_H__
// use x86code * to reference generated code
-typedef UINT8 x86code;
+typedef UINT8 x86code;
// this structure tracks information about a link
struct emit_link
{
- x86code * target;
- UINT8 size;
+ x86code * target;
+ UINT8 size;
};
// structure for describing memory references
@@ -69,9 +69,9 @@ class x86_memref
public:
x86_memref(UINT8 basereg, UINT8 indreg, UINT8 scale, INT32 disp)
: m_base(basereg),
- m_index(indreg),
- m_scale(scale),
- m_disp(disp) { }
+ m_index(indreg),
+ m_scale(scale),
+ m_disp(disp) { }
x86_memref operator+(INT32 offset) { return x86_memref(m_base, m_index, m_scale, m_disp + offset); }
@@ -108,182 +108,182 @@ namespace x64emit
//**************************************************************************
// opcode size flag; low 4 bits must match REX low 4 bits, hence the odd numbers here
-const UINT8 OP_16BIT = 0x10;
-const UINT8 OP_32BIT = 0x00;
-const UINT8 OP_64BIT = 0x08;
+const UINT8 OP_16BIT = 0x10;
+const UINT8 OP_32BIT = 0x00;
+const UINT8 OP_64BIT = 0x08;
// 16 registers on x64, only 8 on x86
#if (X86EMIT_SIZE == 64)
-const int REG_MAX = 16;
+const int REG_MAX = 16;
#else
-const int REG_MAX = 8;
+const int REG_MAX = 8;
#endif
// invalid register index for "none"
-const UINT8 REG_NONE = REG_MAX;
+const UINT8 REG_NONE = REG_MAX;
// 8-bit registers -- note that we assume a flat model for 64-bit
-const UINT8 REG_AL = 0;
-const UINT8 REG_CL = 1;
-const UINT8 REG_DL = 2;
-const UINT8 REG_BL = 3;
+const UINT8 REG_AL = 0;
+const UINT8 REG_CL = 1;
+const UINT8 REG_DL = 2;
+const UINT8 REG_BL = 3;
#if (X86EMIT_SIZE == 32)
-const UINT8 REG_AH = 4;
-const UINT8 REG_CH = 5;
-const UINT8 REG_DH = 6;
-const UINT8 REG_BH = 7;
+const UINT8 REG_AH = 4;
+const UINT8 REG_CH = 5;
+const UINT8 REG_DH = 6;
+const UINT8 REG_BH = 7;
#else
-const UINT8 REG_SPL = 4;
-const UINT8 REG_BPL = 5;
-const UINT8 REG_SIL = 6;
-const UINT8 REG_DIL = 7;
-const UINT8 REG_R8L = 8;
-const UINT8 REG_R9L = 9;
-const UINT8 REG_R10L = 10;
-const UINT8 REG_R11L = 11;
-const UINT8 REG_R12L = 12;
-const UINT8 REG_R13L = 13;
-const UINT8 REG_R14L = 14;
-const UINT8 REG_R15L = 15;
+const UINT8 REG_SPL = 4;
+const UINT8 REG_BPL = 5;
+const UINT8 REG_SIL = 6;
+const UINT8 REG_DIL = 7;
+const UINT8 REG_R8L = 8;
+const UINT8 REG_R9L = 9;
+const UINT8 REG_R10L = 10;
+const UINT8 REG_R11L = 11;
+const UINT8 REG_R12L = 12;
+const UINT8 REG_R13L = 13;
+const UINT8 REG_R14L = 14;
+const UINT8 REG_R15L = 15;
#endif
// 16-bit registers
-const UINT8 REG_AX = 0;
-const UINT8 REG_CX = 1;
-const UINT8 REG_DX = 2;
-const UINT8 REG_BX = 3;
-const UINT8 REG_SP = 4;
-const UINT8 REG_BP = 5;
-const UINT8 REG_SI = 6;
-const UINT8 REG_DI = 7;
+const UINT8 REG_AX = 0;
+const UINT8 REG_CX = 1;
+const UINT8 REG_DX = 2;
+const UINT8 REG_BX = 3;
+const UINT8 REG_SP = 4;
+const UINT8 REG_BP = 5;
+const UINT8 REG_SI = 6;
+const UINT8 REG_DI = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_R8W = 8;
-const UINT8 REG_R9W = 9;
-const UINT8 REG_R10W = 10;
-const UINT8 REG_R11W = 11;
-const UINT8 REG_R12W = 12;
-const UINT8 REG_R13W = 13;
-const UINT8 REG_R14W = 14;
-const UINT8 REG_R15W = 15;
+const UINT8 REG_R8W = 8;
+const UINT8 REG_R9W = 9;
+const UINT8 REG_R10W = 10;
+const UINT8 REG_R11W = 11;
+const UINT8 REG_R12W = 12;
+const UINT8 REG_R13W = 13;
+const UINT8 REG_R14W = 14;
+const UINT8 REG_R15W = 15;
#endif
// 32-bit registers
-const UINT8 REG_EAX = 0;
-const UINT8 REG_ECX = 1;
-const UINT8 REG_EDX = 2;
-const UINT8 REG_EBX = 3;
-const UINT8 REG_ESP = 4;
-const UINT8 REG_EBP = 5;
-const UINT8 REG_ESI = 6;
-const UINT8 REG_EDI = 7;
+const UINT8 REG_EAX = 0;
+const UINT8 REG_ECX = 1;
+const UINT8 REG_EDX = 2;
+const UINT8 REG_EBX = 3;
+const UINT8 REG_ESP = 4;
+const UINT8 REG_EBP = 5;
+const UINT8 REG_ESI = 6;
+const UINT8 REG_EDI = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_R8D = 8;
-const UINT8 REG_R9D = 9;
-const UINT8 REG_R10D = 10;
-const UINT8 REG_R11D = 11;
-const UINT8 REG_R12D = 12;
-const UINT8 REG_R13D = 13;
-const UINT8 REG_R14D = 14;
-const UINT8 REG_R15D = 15;
+const UINT8 REG_R8D = 8;
+const UINT8 REG_R9D = 9;
+const UINT8 REG_R10D = 10;
+const UINT8 REG_R11D = 11;
+const UINT8 REG_R12D = 12;
+const UINT8 REG_R13D = 13;
+const UINT8 REG_R14D = 14;
+const UINT8 REG_R15D = 15;
#endif
// 64-bit registers
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_RAX = 0;
-const UINT8 REG_RCX = 1;
-const UINT8 REG_RDX = 2;
-const UINT8 REG_RBX = 3;
-const UINT8 REG_RSP = 4;
-const UINT8 REG_RBP = 5;
-const UINT8 REG_RSI = 6;
-const UINT8 REG_RDI = 7;
-const UINT8 REG_R8 = 8;
-const UINT8 REG_R9 = 9;
-const UINT8 REG_R10 = 10;
-const UINT8 REG_R11 = 11;
-const UINT8 REG_R12 = 12;
-const UINT8 REG_R13 = 13;
-const UINT8 REG_R14 = 14;
-const UINT8 REG_R15 = 15;
+const UINT8 REG_RAX = 0;
+const UINT8 REG_RCX = 1;
+const UINT8 REG_RDX = 2;
+const UINT8 REG_RBX = 3;
+const UINT8 REG_RSP = 4;
+const UINT8 REG_RBP = 5;
+const UINT8 REG_RSI = 6;
+const UINT8 REG_RDI = 7;
+const UINT8 REG_R8 = 8;
+const UINT8 REG_R9 = 9;
+const UINT8 REG_R10 = 10;
+const UINT8 REG_R11 = 11;
+const UINT8 REG_R12 = 12;
+const UINT8 REG_R13 = 13;
+const UINT8 REG_R14 = 14;
+const UINT8 REG_R15 = 15;
#endif
// 64-bit MMX registers
-const UINT8 REG_MM0 = 0;
-const UINT8 REG_MM1 = 1;
-const UINT8 REG_MM2 = 2;
-const UINT8 REG_MM3 = 3;
-const UINT8 REG_MM4 = 4;
-const UINT8 REG_MM5 = 5;
-const UINT8 REG_MM6 = 6;
-const UINT8 REG_MM7 = 7;
+const UINT8 REG_MM0 = 0;
+const UINT8 REG_MM1 = 1;
+const UINT8 REG_MM2 = 2;
+const UINT8 REG_MM3 = 3;
+const UINT8 REG_MM4 = 4;
+const UINT8 REG_MM5 = 5;
+const UINT8 REG_MM6 = 6;
+const UINT8 REG_MM7 = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_MM8 = 8;
-const UINT8 REG_MM9 = 9;
-const UINT8 REG_MM10 = 10;
-const UINT8 REG_MM11 = 11;
-const UINT8 REG_MM12 = 12;
-const UINT8 REG_MM13 = 13;
-const UINT8 REG_MM14 = 14;
-const UINT8 REG_MM15 = 15;
+const UINT8 REG_MM8 = 8;
+const UINT8 REG_MM9 = 9;
+const UINT8 REG_MM10 = 10;
+const UINT8 REG_MM11 = 11;
+const UINT8 REG_MM12 = 12;
+const UINT8 REG_MM13 = 13;
+const UINT8 REG_MM14 = 14;
+const UINT8 REG_MM15 = 15;
#endif
// 128-bit XMM registers
-const UINT8 REG_XMM0 = 0;
-const UINT8 REG_XMM1 = 1;
-const UINT8 REG_XMM2 = 2;
-const UINT8 REG_XMM3 = 3;
-const UINT8 REG_XMM4 = 4;
-const UINT8 REG_XMM5 = 5;
-const UINT8 REG_XMM6 = 6;
-const UINT8 REG_XMM7 = 7;
+const UINT8 REG_XMM0 = 0;
+const UINT8 REG_XMM1 = 1;
+const UINT8 REG_XMM2 = 2;
+const UINT8 REG_XMM3 = 3;
+const UINT8 REG_XMM4 = 4;
+const UINT8 REG_XMM5 = 5;
+const UINT8 REG_XMM6 = 6;
+const UINT8 REG_XMM7 = 7;
#if (X86EMIT_SIZE == 64)
-const UINT8 REG_XMM8 = 8;
-const UINT8 REG_XMM9 = 9;
-const UINT8 REG_XMM10 = 10;
-const UINT8 REG_XMM11 = 11;
-const UINT8 REG_XMM12 = 12;
-const UINT8 REG_XMM13 = 13;
-const UINT8 REG_XMM14 = 14;
-const UINT8 REG_XMM15 = 15;
+const UINT8 REG_XMM8 = 8;
+const UINT8 REG_XMM9 = 9;
+const UINT8 REG_XMM10 = 10;
+const UINT8 REG_XMM11 = 11;
+const UINT8 REG_XMM12 = 12;
+const UINT8 REG_XMM13 = 13;
+const UINT8 REG_XMM14 = 14;
+const UINT8 REG_XMM15 = 15;
#endif
// conditions
-const UINT8 COND_A = 7;
-const UINT8 COND_AE = 3;
-const UINT8 COND_B = 2;
-const UINT8 COND_BE = 6;
-const UINT8 COND_C = 2;
-const UINT8 COND_E = 4;
-const UINT8 COND_Z = 4;
-const UINT8 COND_G = 15;
-const UINT8 COND_GE = 13;
-const UINT8 COND_L = 12;
-const UINT8 COND_LE = 14;
-const UINT8 COND_NA = 6;
-const UINT8 COND_NAE = 2;
-const UINT8 COND_NB = 3;
-const UINT8 COND_NBE = 7;
-const UINT8 COND_NC = 3;
-const UINT8 COND_NE = 5;
-const UINT8 COND_NG = 14;
-const UINT8 COND_NGE = 12;
-const UINT8 COND_NL = 13;
-const UINT8 COND_NLE = 15;
-const UINT8 COND_NO = 1;
-const UINT8 COND_NP = 11;
-const UINT8 COND_NS = 9;
-const UINT8 COND_NZ = 5;
-const UINT8 COND_O = 0;
-const UINT8 COND_P = 10;
-const UINT8 COND_PE = 10;
-const UINT8 COND_PO = 11;
-const UINT8 COND_S = 8;
+const UINT8 COND_A = 7;
+const UINT8 COND_AE = 3;
+const UINT8 COND_B = 2;
+const UINT8 COND_BE = 6;
+const UINT8 COND_C = 2;
+const UINT8 COND_E = 4;
+const UINT8 COND_Z = 4;
+const UINT8 COND_G = 15;
+const UINT8 COND_GE = 13;
+const UINT8 COND_L = 12;
+const UINT8 COND_LE = 14;
+const UINT8 COND_NA = 6;
+const UINT8 COND_NAE = 2;
+const UINT8 COND_NB = 3;
+const UINT8 COND_NBE = 7;
+const UINT8 COND_NC = 3;
+const UINT8 COND_NE = 5;
+const UINT8 COND_NG = 14;
+const UINT8 COND_NGE = 12;
+const UINT8 COND_NL = 13;
+const UINT8 COND_NLE = 15;
+const UINT8 COND_NO = 1;
+const UINT8 COND_NP = 11;
+const UINT8 COND_NS = 9;
+const UINT8 COND_NZ = 5;
+const UINT8 COND_O = 0;
+const UINT8 COND_P = 10;
+const UINT8 COND_PE = 10;
+const UINT8 COND_PO = 11;
+const UINT8 COND_S = 8;
// floating point rounding modes
-const UINT8 FPRND_NEAR = 0;
-const UINT8 FPRND_DOWN = 1;
-const UINT8 FPRND_UP = 2;
-const UINT8 FPRND_CHOP = 3;
+const UINT8 FPRND_NEAR = 0;
+const UINT8 FPRND_DOWN = 1;
+const UINT8 FPRND_UP = 2;
+const UINT8 FPRND_CHOP = 3;
@@ -292,907 +292,907 @@ const UINT8 FPRND_CHOP = 3;
//**************************************************************************
// opcode flags (in upper 8 bits of opcode)
-const UINT32 OPFLAG_8BITREG = (1 << 24);
-const UINT32 OPFLAG_8BITRM = (1 << 25);
+const UINT32 OPFLAG_8BITREG = (1 << 24);
+const UINT32 OPFLAG_8BITRM = (1 << 25);
// single byte opcodes
-const UINT32 OP_ADD_Eb_Gb = (0x00 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADD_Ev_Gv = 0x01;
-const UINT32 OP_ADD_Gb_Eb = (0x02 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADD_Gv_Ev = 0x03;
-const UINT32 OP_ADD_AL_Ib = 0x04;
-const UINT32 OP_ADD_rAX_Iz = 0x05;
-const UINT32 OP_PUSH_ES = 0x06;
-const UINT32 OP_POP_ES = 0x07;
-const UINT32 OP_OR_Eb_Gb = (0x08 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_OR_Ev_Gv = 0x09;
-const UINT32 OP_OR_Gb_Eb = (0x0a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_OR_Gv_Ev = 0x0b;
-const UINT32 OP_OR_AL_Ib = 0x0c;
-const UINT32 OP_OR_eAX_Iv = 0x0d;
-const UINT32 OP_PUSH_CS = 0x0e;
-const UINT32 OP_EXTENDED = 0x0f;
-
-const UINT32 OP_ADC_Eb_Gb = (0x10 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADC_Ev_Gv = 0x11;
-const UINT32 OP_ADC_Gb_Eb = (0x12 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_ADC_Gv_Ev = 0x13;
-const UINT32 OP_ADC_AL_Ib = 0x14;
-const UINT32 OP_ADC_rAX_Iz = 0x15;
-const UINT32 OP_PUSH_SS = 0x16;
-const UINT32 OP_POP_SS = 0x17;
-const UINT32 OP_SBB_Eb_Gb = (0x18 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SBB_Ev_Gv = 0x19;
-const UINT32 OP_SBB_Gb_Eb = (0x1a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SBB_Gv_Ev = 0x1b;
-const UINT32 OP_SBB_AL_Ib = 0x1c;
-const UINT32 OP_SBB_eAX_Iv = 0x1d;
-const UINT32 OP_PUSH_DS = 0x1e;
-const UINT32 OP_POP_DS = 0x1f;
-
-const UINT32 OP_AND_Eb_Gb = (0x20 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_AND_Ev_Gv = 0x21;
-const UINT32 OP_AND_Gb_Eb = (0x22 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_AND_Gv_Ev = 0x23;
-const UINT32 OP_AND_AL_Ib = 0x24;
-const UINT32 OP_AND_rAX_Iz = 0x25;
-const UINT32 PREFIX_ES = 0x26;
-const UINT32 OP_DAA = 0x27;
-const UINT32 OP_SUB_Eb_Gb = (0x28 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SUB_Ev_Gv = 0x29;
-const UINT32 OP_SUB_Gb_Eb = (0x2a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_SUB_Gv_Ev = 0x2b;
-const UINT32 OP_SUB_AL_Ib = 0x2c;
-const UINT32 OP_SUB_eAX_Iv = 0x2d;
-const UINT32 PREFIX_CS = 0x2e;
-const UINT32 OP_DAS = 0x2f;
-
-const UINT32 OP_XOR_Eb_Gb = (0x30 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XOR_Ev_Gv = 0x31;
-const UINT32 OP_XOR_Gb_Eb = (0x32 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XOR_Gv_Ev = 0x33;
-const UINT32 OP_XOR_AL_Ib = 0x34;
-const UINT32 OP_XOR_rAX_Iz = 0x35;
-const UINT32 PREFIX_SS = 0x36;
-const UINT32 OP_AAA = 0x37;
-const UINT32 OP_CMP_Eb_Gb = (0x38 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_CMP_Ev_Gv = 0x39;
-const UINT32 OP_CMP_Gb_Eb = (0x3a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_CMP_Gv_Ev = 0x3b;
-const UINT32 OP_CMP_AL_Ib = 0x3c;
-const UINT32 OP_CMP_eAX_Iv = 0x3d;
-const UINT32 PREFIX_DS = 0x3e;
-const UINT32 OP_AAS = 0x3f;
-
-const UINT32 OP_REX = 0x40;
-const UINT32 OP_REX_B = 0x41;
-const UINT32 OP_REX_X = 0x42;
-const UINT32 OP_REX_XB = 0x43;
-const UINT32 OP_REX_R = 0x44;
-const UINT32 OP_REX_RB = 0x45;
-const UINT32 OP_REX_RX = 0x46;
-const UINT32 OP_REX_RXB = 0x47;
-const UINT32 OP_REX_W = 0x48;
-const UINT32 OP_REX_WB = 0x49;
-const UINT32 OP_REX_WX = 0x4a;
-const UINT32 OP_REX_WXB = 0x4b;
-const UINT32 OP_REX_WR = 0x4c;
-const UINT32 OP_REX_WRB = 0x4d;
-const UINT32 OP_REX_WRX = 0x4e;
-const UINT32 OP_REX_WRXB = 0x4f;
-
-const UINT32 OP_PUSH_rAX = 0x50;
-const UINT32 OP_PUSH_rCX = 0x51;
-const UINT32 OP_PUSH_rDX = 0x52;
-const UINT32 OP_PUSH_rBX = 0x53;
-const UINT32 OP_PUSH_rSP = 0x54;
-const UINT32 OP_PUSH_rBP = 0x55;
-const UINT32 OP_PUSH_rSI = 0x56;
-const UINT32 OP_PUSH_rDI = 0x57;
-const UINT32 OP_POP_rAX = 0x58;
-const UINT32 OP_POP_rCX = 0x59;
-const UINT32 OP_POP_rDX = 0x5a;
-const UINT32 OP_POP_rBX = 0x5b;
-const UINT32 OP_POP_rSP = 0x5c;
-const UINT32 OP_POP_rBP = 0x5d;
-const UINT32 OP_POP_rSI = 0x5e;
-const UINT32 OP_POP_rDI = 0x5f;
-
-const UINT32 OP_PUSHA = 0x60;
-const UINT32 OP_POPA = 0x61;
-const UINT32 OP_BOUND_Gv_Ma = 0x62;
-const UINT32 OP_ARPL_Ew_Gw = 0x63;
-const UINT32 OP_MOVSXD_Gv_Ev = 0x63;
-const UINT32 PREFIX_FS = 0x64;
-const UINT32 PREFIX_GS = 0x65;
-const UINT32 PREFIX_OPSIZE = 0x66;
-const UINT32 PREFIX_ADSIZE = 0x67;
-const UINT32 OP_PUSH_Iz = 0x68;
-const UINT32 OP_IMUL_Gv_Ev_Iz = 0x69;
-const UINT32 OP_PUSH_Ib = 0x6a;
-const UINT32 OP_IMUL_Gv_Ev_Ib = 0x6b;
-const UINT32 OP_INS_Yb_DX = 0x6c;
-const UINT32 OP_INS_Yz_DX = 0x6d;
-const UINT32 OP_OUTS_DX_Xb = 0x6e;
-const UINT32 OP_OUTS_DX_Xz = 0x6f;
-
-const UINT32 OP_JCC_O_Jb = 0x70;
-const UINT32 OP_JCC_NO_Jb = 0x71;
-const UINT32 OP_JCC_B_Jb = 0x72;
-const UINT32 OP_JCC_C_Jb = 0x72;
-const UINT32 OP_JCC_NAE_Jb = 0x72;
-const UINT32 OP_JCC_AE_Jb = 0x73;
-const UINT32 OP_JCC_NB_Jb = 0x73;
-const UINT32 OP_JCC_NC_Jb = 0x73;
-const UINT32 OP_JCC_E_Jb = 0x74;
-const UINT32 OP_JCC_Z_Jb = 0x74;
-const UINT32 OP_JCC_NE_Jb = 0x75;
-const UINT32 OP_JCC_NZ_Jb = 0x75;
-const UINT32 OP_JCC_BE_Jb = 0x76;
-const UINT32 OP_JCC_NA_Jb = 0x76;
-const UINT32 OP_JCC_A_Jb = 0x77;
-const UINT32 OP_JCC_NBE_Jb = 0x77;
-const UINT32 OP_JCC_S_Jb = 0x78;
-const UINT32 OP_JCC_NS_Jb = 0x79;
-const UINT32 OP_JCC_P_Jb = 0x7a;
-const UINT32 OP_JCC_PE_Jb = 0x7a;
-const UINT32 OP_JCC_NP_Jb = 0x7b;
-const UINT32 OP_JCC_PO_Jb = 0x7b;
-const UINT32 OP_JCC_L_Jb = 0x7c;
-const UINT32 OP_JCC_NGE_Jb = 0x7c;
-const UINT32 OP_JCC_NL_Jb = 0x7d;
-const UINT32 OP_JCC_GE_Jb = 0x7d;
-const UINT32 OP_JCC_LE_Jb = 0x7e;
-const UINT32 OP_JCC_NG_Jb = 0x7e;
-const UINT32 OP_JCC_NLE_Jb = 0x7f;
-const UINT32 OP_JCC_G_Jb = 0x7f;
-
-const UINT32 OP_G1_Eb_Ib = (0x80 | OPFLAG_8BITRM);
-const UINT32 OP_G1_Ev_Iz = 0x81;
-const UINT32 OP_G1_Eb_Ibx = (0x82 | OPFLAG_8BITRM);
-const UINT32 OP_G1_Ev_Ib = 0x83;
-const UINT32 OP_TEST_Eb_Gb = (0x84 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_TEST_Ev_Gv = 0x85;
-const UINT32 OP_XCHG_Eb_Gb = (0x86 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XCHG_Ev_Gv = 0x87;
-const UINT32 OP_MOV_Eb_Gb = (0x88 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_MOV_Ev_Gv = 0x89;
-const UINT32 OP_MOV_Gb_Eb = (0x8a | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_MOV_Gv_Ev = 0x8b;
-const UINT32 OP_MOV_Ev_Sw = 0x8c;
-const UINT32 OP_LEA_Gv_M = 0x8d;
-const UINT32 OP_MOV_Sw_Ew = 0x8e;
-const UINT32 OP_G1A_Ev = 0x8f;
-
-const UINT32 OP_NOP = 0x90;
-const UINT32 OP_PAUSE = 0x90;
-const UINT32 OP_XCHG_rCX = 0x91;
-const UINT32 OP_XCHG_rDX = 0x92;
-const UINT32 OP_XCHG_rBX = 0x93;
-const UINT32 OP_XCHG_rSP = 0x94;
-const UINT32 OP_XCHG_rBP = 0x95;
-const UINT32 OP_XCHG_rSI = 0x96;
-const UINT32 OP_XCHG_rDI = 0x97;
-const UINT32 OP_CBW = 0x98;
-const UINT32 OP_CWDE = 0x98;
-const UINT32 OP_CDQE = 0x98;
-const UINT32 OP_CWD = 0x99;
-const UINT32 OP_CDQ = 0x99;
-const UINT32 OP_CQO = 0x99;
-const UINT32 OP_CALLF_Ap = 0x9a;
-const UINT32 OP_FWAIT = 0x9b;
-const UINT32 OP_PUSHF_Fv = 0x9c;
-const UINT32 OP_POPF_Fv = 0x9d;
-const UINT32 OP_SAHF = 0x9e;
-const UINT32 OP_LAHF = 0x9f;
-
-const UINT32 OP_MOV_AL_Ob = 0xa0;
-const UINT32 OP_MOV_rAX_Ov = 0xa1;
-const UINT32 OP_MOV_Ob_AL = 0xa2;
-const UINT32 OP_MOV_Ov_rAX = 0xa3;
-const UINT32 OP_MOVS_Xb_Yb = 0xa4;
-const UINT32 OP_MOVS_Xv_Yv = 0xa5;
-const UINT32 OP_CMPS_Xb_Yb = 0xa6;
-const UINT32 OP_CMPS_Xv_Yv = 0xa7;
-const UINT32 OP_TEST_AL_Ib = 0xa8;
-const UINT32 OP_TEST_rAX_Iz = 0xa9;
-const UINT32 OP_STOS_Yb_AL = 0xaa;
-const UINT32 OP_STOS_Yv_rAX = 0xab;
-const UINT32 OP_LODS_AL_Xb = 0xac;
-const UINT32 OP_LODS_rAX_Xv = 0xad;
-const UINT32 OP_SCAS_AL_Yb = 0xae;
-const UINT32 OP_SCAC_rAX_Yv = 0xaf;
-
-const UINT32 OP_MOV_AL_Ib = 0xb0;
-const UINT32 OP_MOV_CL_Ib = 0xb1;
-const UINT32 OP_MOV_DL_Ib = 0xb2;
-const UINT32 OP_MOV_BL_Ib = 0xb3;
-const UINT32 OP_MOV_AH_Ib = 0xb4;
-const UINT32 OP_MOV_CH_Ib = 0xb5;
-const UINT32 OP_MOV_DH_Ib = 0xb6;
-const UINT32 OP_MOV_BH_Ib = 0xb7;
-const UINT32 OP_MOV_rAX_Iv = 0xb8;
-const UINT32 OP_MOV_rCX_Iv = 0xb9;
-const UINT32 OP_MOV_rDX_Iv = 0xba;
-const UINT32 OP_MOV_rBX_Iv = 0xbb;
-const UINT32 OP_MOV_rSP_Iv = 0xbc;
-const UINT32 OP_MOV_rBP_Iv = 0xbd;
-const UINT32 OP_MOV_rSI_Iv = 0xbe;
-const UINT32 OP_MOV_rDI_Iv = 0xbf;
-
-const UINT32 OP_G2_Eb_Ib = (0xc0 | OPFLAG_8BITRM);
-const UINT32 OP_G2_Ev_Ib = 0xc1;
-const UINT32 OP_RETN_Iw = 0xc2;
-const UINT32 OP_RETN = 0xc3;
-const UINT32 OP_LES_Gz_Mp = 0xc4;
-const UINT32 OP_LDS_Gz_Mp = 0xc5;
-const UINT32 OP_G11_Eb_Ib = (0xc6 | OPFLAG_8BITRM);
-const UINT32 OP_G11_Ev_Iz = 0xc7;
-const UINT32 OP_ENTER_Iw_Ib = 0xc8;
-const UINT32 OP_LEAVE = 0xc9;
-const UINT32 OP_RETF_Iw = 0xca;
-const UINT32 OP_RETF = 0xcb;
-const UINT32 OP_INT_3 = 0xcc;
-const UINT32 OP_INT_Ib = 0xcd;
-const UINT32 OP_INTO = 0xce;
-const UINT32 OP_IRET = 0xcf;
-
-const UINT32 OP_G2_Eb_1 = (0xd0 | OPFLAG_8BITRM);
-const UINT32 OP_G2_Ev_1 = 0xd1;
-const UINT32 OP_G2_Eb_CL = (0xd2 | OPFLAG_8BITRM);
-const UINT32 OP_G2_Ev_CL = 0xd3;
-const UINT32 OP_AAM = 0xd4;
-const UINT32 OP_AAD = 0xd5;
-const UINT32 OP_XLAT = 0xd7;
-const UINT32 OP_ESC_D8 = 0xd8;
-const UINT32 OP_ESC_D9 = 0xd9;
-const UINT32 OP_ESC_DA = 0xda;
-const UINT32 OP_ESC_DB = 0xdb;
-const UINT32 OP_ESC_DC = 0xdc;
-const UINT32 OP_ESC_DD = 0xdd;
-const UINT32 OP_ESC_DE = 0xde;
-const UINT32 OP_ESC_DF = 0xdf;
-
-const UINT32 OP_LOOPNE_Jb = 0xe0;
-const UINT32 OP_LOOPE_Jb = 0xe1;
-const UINT32 OP_LOOP_Jb = 0xe2;
-const UINT32 OP_JrCXZ_Jb = 0xe3;
-const UINT32 OP_IN_AL_Ib = 0xe4;
-const UINT32 OP_IN_eAX_Ib = 0xe5;
-const UINT32 OP_OUT_Ib_AL = 0xe6;
-const UINT32 OP_OUT_Ib_eAX = 0xe7;
-const UINT32 OP_CALL_Jz = 0xe8;
-const UINT32 OP_JMP_Jz = 0xe9;
-const UINT32 OP_JMPF_AP = 0xea;
-const UINT32 OP_JMP_Jb = 0xeb;
-const UINT32 OP_IN_AL_DX = 0xec;
-const UINT32 OP_IN_eAX_D = 0xed;
-const UINT32 OP_OUT_DX_AL = 0xee;
-const UINT32 OP_OUT_DX_eAX = 0xef;
-
-const UINT32 PREFIX_LOCK = 0xf0;
-const UINT32 PREFIX_REPNE = 0xf2;
-const UINT32 PREFIX_REPE = 0xf3;
-const UINT32 OP_HLT = 0xf4;
-const UINT32 OP_CMC = 0xf5;
-const UINT32 OP_G3_Eb = (0xf6 | OPFLAG_8BITRM);
-const UINT32 OP_G3_Ev = 0xf7;
-const UINT32 OP_CLC = 0xf8;
-const UINT32 OP_STC = 0xf9;
-const UINT32 OP_CLI = 0xfa;
-const UINT32 OP_STI = 0xfb;
-const UINT32 OP_CLD = 0xfc;
-const UINT32 OP_STD = 0xfd;
-const UINT32 OP_G4 = 0xfe;
-const UINT32 OP_G5 = 0xff;
+const UINT32 OP_ADD_Eb_Gb = (0x00 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_ADD_Ev_Gv = 0x01;
+const UINT32 OP_ADD_Gb_Eb = (0x02 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_ADD_Gv_Ev = 0x03;
+const UINT32 OP_ADD_AL_Ib = 0x04;
+const UINT32 OP_ADD_rAX_Iz = 0x05;
+const UINT32 OP_PUSH_ES = 0x06;
+const UINT32 OP_POP_ES = 0x07;
+const UINT32 OP_OR_Eb_Gb = (0x08 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_OR_Ev_Gv = 0x09;
+const UINT32 OP_OR_Gb_Eb = (0x0a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_OR_Gv_Ev = 0x0b;
+const UINT32 OP_OR_AL_Ib = 0x0c;
+const UINT32 OP_OR_eAX_Iv = 0x0d;
+const UINT32 OP_PUSH_CS = 0x0e;
+const UINT32 OP_EXTENDED = 0x0f;
+
+const UINT32 OP_ADC_Eb_Gb = (0x10 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_ADC_Ev_Gv = 0x11;
+const UINT32 OP_ADC_Gb_Eb = (0x12 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_ADC_Gv_Ev = 0x13;
+const UINT32 OP_ADC_AL_Ib = 0x14;
+const UINT32 OP_ADC_rAX_Iz = 0x15;
+const UINT32 OP_PUSH_SS = 0x16;
+const UINT32 OP_POP_SS = 0x17;
+const UINT32 OP_SBB_Eb_Gb = (0x18 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_SBB_Ev_Gv = 0x19;
+const UINT32 OP_SBB_Gb_Eb = (0x1a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_SBB_Gv_Ev = 0x1b;
+const UINT32 OP_SBB_AL_Ib = 0x1c;
+const UINT32 OP_SBB_eAX_Iv = 0x1d;
+const UINT32 OP_PUSH_DS = 0x1e;
+const UINT32 OP_POP_DS = 0x1f;
+
+const UINT32 OP_AND_Eb_Gb = (0x20 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_AND_Ev_Gv = 0x21;
+const UINT32 OP_AND_Gb_Eb = (0x22 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_AND_Gv_Ev = 0x23;
+const UINT32 OP_AND_AL_Ib = 0x24;
+const UINT32 OP_AND_rAX_Iz = 0x25;
+const UINT32 PREFIX_ES = 0x26;
+const UINT32 OP_DAA = 0x27;
+const UINT32 OP_SUB_Eb_Gb = (0x28 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_SUB_Ev_Gv = 0x29;
+const UINT32 OP_SUB_Gb_Eb = (0x2a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_SUB_Gv_Ev = 0x2b;
+const UINT32 OP_SUB_AL_Ib = 0x2c;
+const UINT32 OP_SUB_eAX_Iv = 0x2d;
+const UINT32 PREFIX_CS = 0x2e;
+const UINT32 OP_DAS = 0x2f;
+
+const UINT32 OP_XOR_Eb_Gb = (0x30 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_XOR_Ev_Gv = 0x31;
+const UINT32 OP_XOR_Gb_Eb = (0x32 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_XOR_Gv_Ev = 0x33;
+const UINT32 OP_XOR_AL_Ib = 0x34;
+const UINT32 OP_XOR_rAX_Iz = 0x35;
+const UINT32 PREFIX_SS = 0x36;
+const UINT32 OP_AAA = 0x37;
+const UINT32 OP_CMP_Eb_Gb = (0x38 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_CMP_Ev_Gv = 0x39;
+const UINT32 OP_CMP_Gb_Eb = (0x3a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_CMP_Gv_Ev = 0x3b;
+const UINT32 OP_CMP_AL_Ib = 0x3c;
+const UINT32 OP_CMP_eAX_Iv = 0x3d;
+const UINT32 PREFIX_DS = 0x3e;
+const UINT32 OP_AAS = 0x3f;
+
+const UINT32 OP_REX = 0x40;
+const UINT32 OP_REX_B = 0x41;
+const UINT32 OP_REX_X = 0x42;
+const UINT32 OP_REX_XB = 0x43;
+const UINT32 OP_REX_R = 0x44;
+const UINT32 OP_REX_RB = 0x45;
+const UINT32 OP_REX_RX = 0x46;
+const UINT32 OP_REX_RXB = 0x47;
+const UINT32 OP_REX_W = 0x48;
+const UINT32 OP_REX_WB = 0x49;
+const UINT32 OP_REX_WX = 0x4a;
+const UINT32 OP_REX_WXB = 0x4b;
+const UINT32 OP_REX_WR = 0x4c;
+const UINT32 OP_REX_WRB = 0x4d;
+const UINT32 OP_REX_WRX = 0x4e;
+const UINT32 OP_REX_WRXB = 0x4f;
+
+const UINT32 OP_PUSH_rAX = 0x50;
+const UINT32 OP_PUSH_rCX = 0x51;
+const UINT32 OP_PUSH_rDX = 0x52;
+const UINT32 OP_PUSH_rBX = 0x53;
+const UINT32 OP_PUSH_rSP = 0x54;
+const UINT32 OP_PUSH_rBP = 0x55;
+const UINT32 OP_PUSH_rSI = 0x56;
+const UINT32 OP_PUSH_rDI = 0x57;
+const UINT32 OP_POP_rAX = 0x58;
+const UINT32 OP_POP_rCX = 0x59;
+const UINT32 OP_POP_rDX = 0x5a;
+const UINT32 OP_POP_rBX = 0x5b;
+const UINT32 OP_POP_rSP = 0x5c;
+const UINT32 OP_POP_rBP = 0x5d;
+const UINT32 OP_POP_rSI = 0x5e;
+const UINT32 OP_POP_rDI = 0x5f;
+
+const UINT32 OP_PUSHA = 0x60;
+const UINT32 OP_POPA = 0x61;
+const UINT32 OP_BOUND_Gv_Ma = 0x62;
+const UINT32 OP_ARPL_Ew_Gw = 0x63;
+const UINT32 OP_MOVSXD_Gv_Ev = 0x63;
+const UINT32 PREFIX_FS = 0x64;
+const UINT32 PREFIX_GS = 0x65;
+const UINT32 PREFIX_OPSIZE = 0x66;
+const UINT32 PREFIX_ADSIZE = 0x67;
+const UINT32 OP_PUSH_Iz = 0x68;
+const UINT32 OP_IMUL_Gv_Ev_Iz = 0x69;
+const UINT32 OP_PUSH_Ib = 0x6a;
+const UINT32 OP_IMUL_Gv_Ev_Ib = 0x6b;
+const UINT32 OP_INS_Yb_DX = 0x6c;
+const UINT32 OP_INS_Yz_DX = 0x6d;
+const UINT32 OP_OUTS_DX_Xb = 0x6e;
+const UINT32 OP_OUTS_DX_Xz = 0x6f;
+
+const UINT32 OP_JCC_O_Jb = 0x70;
+const UINT32 OP_JCC_NO_Jb = 0x71;
+const UINT32 OP_JCC_B_Jb = 0x72;
+const UINT32 OP_JCC_C_Jb = 0x72;
+const UINT32 OP_JCC_NAE_Jb = 0x72;
+const UINT32 OP_JCC_AE_Jb = 0x73;
+const UINT32 OP_JCC_NB_Jb = 0x73;
+const UINT32 OP_JCC_NC_Jb = 0x73;
+const UINT32 OP_JCC_E_Jb = 0x74;
+const UINT32 OP_JCC_Z_Jb = 0x74;
+const UINT32 OP_JCC_NE_Jb = 0x75;
+const UINT32 OP_JCC_NZ_Jb = 0x75;
+const UINT32 OP_JCC_BE_Jb = 0x76;
+const UINT32 OP_JCC_NA_Jb = 0x76;
+const UINT32 OP_JCC_A_Jb = 0x77;
+const UINT32 OP_JCC_NBE_Jb = 0x77;
+const UINT32 OP_JCC_S_Jb = 0x78;
+const UINT32 OP_JCC_NS_Jb = 0x79;
+const UINT32 OP_JCC_P_Jb = 0x7a;
+const UINT32 OP_JCC_PE_Jb = 0x7a;
+const UINT32 OP_JCC_NP_Jb = 0x7b;
+const UINT32 OP_JCC_PO_Jb = 0x7b;
+const UINT32 OP_JCC_L_Jb = 0x7c;
+const UINT32 OP_JCC_NGE_Jb = 0x7c;
+const UINT32 OP_JCC_NL_Jb = 0x7d;
+const UINT32 OP_JCC_GE_Jb = 0x7d;
+const UINT32 OP_JCC_LE_Jb = 0x7e;
+const UINT32 OP_JCC_NG_Jb = 0x7e;
+const UINT32 OP_JCC_NLE_Jb = 0x7f;
+const UINT32 OP_JCC_G_Jb = 0x7f;
+
+const UINT32 OP_G1_Eb_Ib = (0x80 | OPFLAG_8BITRM);
+const UINT32 OP_G1_Ev_Iz = 0x81;
+const UINT32 OP_G1_Eb_Ibx = (0x82 | OPFLAG_8BITRM);
+const UINT32 OP_G1_Ev_Ib = 0x83;
+const UINT32 OP_TEST_Eb_Gb = (0x84 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_TEST_Ev_Gv = 0x85;
+const UINT32 OP_XCHG_Eb_Gb = (0x86 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_XCHG_Ev_Gv = 0x87;
+const UINT32 OP_MOV_Eb_Gb = (0x88 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_MOV_Ev_Gv = 0x89;
+const UINT32 OP_MOV_Gb_Eb = (0x8a | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_MOV_Gv_Ev = 0x8b;
+const UINT32 OP_MOV_Ev_Sw = 0x8c;
+const UINT32 OP_LEA_Gv_M = 0x8d;
+const UINT32 OP_MOV_Sw_Ew = 0x8e;
+const UINT32 OP_G1A_Ev = 0x8f;
+
+const UINT32 OP_NOP = 0x90;
+const UINT32 OP_PAUSE = 0x90;
+const UINT32 OP_XCHG_rCX = 0x91;
+const UINT32 OP_XCHG_rDX = 0x92;
+const UINT32 OP_XCHG_rBX = 0x93;
+const UINT32 OP_XCHG_rSP = 0x94;
+const UINT32 OP_XCHG_rBP = 0x95;
+const UINT32 OP_XCHG_rSI = 0x96;
+const UINT32 OP_XCHG_rDI = 0x97;
+const UINT32 OP_CBW = 0x98;
+const UINT32 OP_CWDE = 0x98;
+const UINT32 OP_CDQE = 0x98;
+const UINT32 OP_CWD = 0x99;
+const UINT32 OP_CDQ = 0x99;
+const UINT32 OP_CQO = 0x99;
+const UINT32 OP_CALLF_Ap = 0x9a;
+const UINT32 OP_FWAIT = 0x9b;
+const UINT32 OP_PUSHF_Fv = 0x9c;
+const UINT32 OP_POPF_Fv = 0x9d;
+const UINT32 OP_SAHF = 0x9e;
+const UINT32 OP_LAHF = 0x9f;
+
+const UINT32 OP_MOV_AL_Ob = 0xa0;
+const UINT32 OP_MOV_rAX_Ov = 0xa1;
+const UINT32 OP_MOV_Ob_AL = 0xa2;
+const UINT32 OP_MOV_Ov_rAX = 0xa3;
+const UINT32 OP_MOVS_Xb_Yb = 0xa4;
+const UINT32 OP_MOVS_Xv_Yv = 0xa5;
+const UINT32 OP_CMPS_Xb_Yb = 0xa6;
+const UINT32 OP_CMPS_Xv_Yv = 0xa7;
+const UINT32 OP_TEST_AL_Ib = 0xa8;
+const UINT32 OP_TEST_rAX_Iz = 0xa9;
+const UINT32 OP_STOS_Yb_AL = 0xaa;
+const UINT32 OP_STOS_Yv_rAX = 0xab;
+const UINT32 OP_LODS_AL_Xb = 0xac;
+const UINT32 OP_LODS_rAX_Xv = 0xad;
+const UINT32 OP_SCAS_AL_Yb = 0xae;
+const UINT32 OP_SCAC_rAX_Yv = 0xaf;
+
+const UINT32 OP_MOV_AL_Ib = 0xb0;
+const UINT32 OP_MOV_CL_Ib = 0xb1;
+const UINT32 OP_MOV_DL_Ib = 0xb2;
+const UINT32 OP_MOV_BL_Ib = 0xb3;
+const UINT32 OP_MOV_AH_Ib = 0xb4;
+const UINT32 OP_MOV_CH_Ib = 0xb5;
+const UINT32 OP_MOV_DH_Ib = 0xb6;
+const UINT32 OP_MOV_BH_Ib = 0xb7;
+const UINT32 OP_MOV_rAX_Iv = 0xb8;
+const UINT32 OP_MOV_rCX_Iv = 0xb9;
+const UINT32 OP_MOV_rDX_Iv = 0xba;
+const UINT32 OP_MOV_rBX_Iv = 0xbb;
+const UINT32 OP_MOV_rSP_Iv = 0xbc;
+const UINT32 OP_MOV_rBP_Iv = 0xbd;
+const UINT32 OP_MOV_rSI_Iv = 0xbe;
+const UINT32 OP_MOV_rDI_Iv = 0xbf;
+
+const UINT32 OP_G2_Eb_Ib = (0xc0 | OPFLAG_8BITRM);
+const UINT32 OP_G2_Ev_Ib = 0xc1;
+const UINT32 OP_RETN_Iw = 0xc2;
+const UINT32 OP_RETN = 0xc3;
+const UINT32 OP_LES_Gz_Mp = 0xc4;
+const UINT32 OP_LDS_Gz_Mp = 0xc5;
+const UINT32 OP_G11_Eb_Ib = (0xc6 | OPFLAG_8BITRM);
+const UINT32 OP_G11_Ev_Iz = 0xc7;
+const UINT32 OP_ENTER_Iw_Ib = 0xc8;
+const UINT32 OP_LEAVE = 0xc9;
+const UINT32 OP_RETF_Iw = 0xca;
+const UINT32 OP_RETF = 0xcb;
+const UINT32 OP_INT_3 = 0xcc;
+const UINT32 OP_INT_Ib = 0xcd;
+const UINT32 OP_INTO = 0xce;
+const UINT32 OP_IRET = 0xcf;
+
+const UINT32 OP_G2_Eb_1 = (0xd0 | OPFLAG_8BITRM);
+const UINT32 OP_G2_Ev_1 = 0xd1;
+const UINT32 OP_G2_Eb_CL = (0xd2 | OPFLAG_8BITRM);
+const UINT32 OP_G2_Ev_CL = 0xd3;
+const UINT32 OP_AAM = 0xd4;
+const UINT32 OP_AAD = 0xd5;
+const UINT32 OP_XLAT = 0xd7;
+const UINT32 OP_ESC_D8 = 0xd8;
+const UINT32 OP_ESC_D9 = 0xd9;
+const UINT32 OP_ESC_DA = 0xda;
+const UINT32 OP_ESC_DB = 0xdb;
+const UINT32 OP_ESC_DC = 0xdc;
+const UINT32 OP_ESC_DD = 0xdd;
+const UINT32 OP_ESC_DE = 0xde;
+const UINT32 OP_ESC_DF = 0xdf;
+
+const UINT32 OP_LOOPNE_Jb = 0xe0;
+const UINT32 OP_LOOPE_Jb = 0xe1;
+const UINT32 OP_LOOP_Jb = 0xe2;
+const UINT32 OP_JrCXZ_Jb = 0xe3;
+const UINT32 OP_IN_AL_Ib = 0xe4;
+const UINT32 OP_IN_eAX_Ib = 0xe5;
+const UINT32 OP_OUT_Ib_AL = 0xe6;
+const UINT32 OP_OUT_Ib_eAX = 0xe7;
+const UINT32 OP_CALL_Jz = 0xe8;
+const UINT32 OP_JMP_Jz = 0xe9;
+const UINT32 OP_JMPF_AP = 0xea;
+const UINT32 OP_JMP_Jb = 0xeb;
+const UINT32 OP_IN_AL_DX = 0xec;
+const UINT32 OP_IN_eAX_D = 0xed;
+const UINT32 OP_OUT_DX_AL = 0xee;
+const UINT32 OP_OUT_DX_eAX = 0xef;
+
+const UINT32 PREFIX_LOCK = 0xf0;
+const UINT32 PREFIX_REPNE = 0xf2;
+const UINT32 PREFIX_REPE = 0xf3;
+const UINT32 OP_HLT = 0xf4;
+const UINT32 OP_CMC = 0xf5;
+const UINT32 OP_G3_Eb = (0xf6 | OPFLAG_8BITRM);
+const UINT32 OP_G3_Ev = 0xf7;
+const UINT32 OP_CLC = 0xf8;
+const UINT32 OP_STC = 0xf9;
+const UINT32 OP_CLI = 0xfa;
+const UINT32 OP_STI = 0xfb;
+const UINT32 OP_CLD = 0xfc;
+const UINT32 OP_STD = 0xfd;
+const UINT32 OP_G4 = 0xfe;
+const UINT32 OP_G5 = 0xff;
// double byte opcodes
-const UINT32 OP_G6 = 0x0f00;
-const UINT32 OP_G7 = 0x0f01;
-const UINT32 OP_LAR_Gv_Ew = 0x0f02;
-const UINT32 OP_LSL_Gv_Ew = 0x0f03;
-const UINT32 OP_SYSCALL = 0x0f05;
-const UINT32 OP_CLTS = 0x0f06;
-const UINT32 OP_SYSRET = 0x0f07;
-const UINT32 OP_INVD = 0x0f08;
-const UINT32 OP_WBINVD = 0x0f09;
-const UINT32 OP_UD2 = 0x0f0b;
-const UINT32 OP_NOP0d_Ev = 0x0f0d;
-
-const UINT32 OP_MOVUPS_Vps_Wps = 0x0f10;
-const UINT32 OP_MOVSS_Vss_Wss = 0xf30f10;
-const UINT32 OP_MOVUPD_Vpd_Wpd = 0x660f10;
-const UINT32 OP_MOVSD_Vsd_Wsd = 0xf20f10;
-const UINT32 OP_MOVUPS_Wps_Vps = 0x0f11;
-const UINT32 OP_MOVSS_Wss_Vss = 0xf30f11;
-const UINT32 OP_MOVUPD_Wpd_Vpd = 0x660f11;
-const UINT32 OP_MOVSD_Wsd_Vsd = 0xf20f11;
-const UINT32 OP_MOVLPS_Vq_Mq = 0x0f12;
-const UINT32 OP_MOVLPD_Vq_Mq = 0x660f12;
-const UINT32 OP_MOVHLPS_Vq_Uq = 0x0f12;
-const UINT32 OP_MOVDDUP_Vq_Wq = 0xf20f12;
-const UINT32 OP_MOVSLDUP_Vq_Wq = 0xf30f12;
-const UINT32 OP_MOVLPS_Mq_Vq = 0x0f13;
-const UINT32 OP_MOVLPD_Mq_Vq = 0x660f13;
-const UINT32 OP_UNPCKLPS_Vps_Wq = 0x0f14;
-const UINT32 OP_UNPCKLPD_Vpd_Wq = 0x660f14;
-const UINT32 OP_UNPCKHPS_Vps_Wq = 0x0f15;
-const UINT32 OP_UNPCKHPD_Vpd_Wq = 0x660f15;
-const UINT32 OP_MOVHPS_Vq_Mq = 0x0f16;
-const UINT32 OP_MOVHPD_Vq_Mq = 0x660f16;
-const UINT32 OP_MOVLHPS_Vq_Uq = 0x0f16;
-const UINT32 OP_MOVSHDUP_Vq_Wq = 0xf30f16;
-const UINT32 OP_MOVHPS_Mq_Vq = 0x0f17;
-const UINT32 OP_MOVHPD_Mq_Vq = 0x660f17;
-const UINT32 OP_PREFETCH_G16 = 0x0f18;
-const UINT32 OP_NOP1f_Ev = 0x0f1f;
-
-const UINT32 OP_MOV_Rd_Cd = 0x0f20;
-const UINT32 OP_MOV_Rd_Dd = 0x0f21;
-const UINT32 OP_MOV_Cd_Rd = 0x0f22;
-const UINT32 OP_MOV_Dd_Rd = 0x0f23;
-const UINT32 OP_MOVAPS_Vps_Wps = 0x0f28;
-const UINT32 OP_MOVAPD_Vpd_Wpd = 0x660f28;
-const UINT32 OP_MOVAPS_Wps_Vps = 0x0f29;
-const UINT32 OP_MOVAPD_Wpd_Vpd = 0x660f29;
-const UINT32 OP_CVTPI2PS_Vps_Qq = 0x0f2a;
-const UINT32 OP_CVTSI2SS_Vss_Ed = 0xf30f2a;
-const UINT32 OP_CVTPI2PD_Vpd_Qq = 0x660f2a;
-const UINT32 OP_CVTSI2SD_Vsd_Ed = 0xf20f2a;
-const UINT32 OP_MOVNTPS_Mps_Vps = 0x0f2b;
-const UINT32 OP_MOVNTPD_Mpd_Vpd = 0x660f2b;
-const UINT32 OP_CVTTPS2PI_Pq_Wq = 0x0f2c;
-const UINT32 OP_CVTTSS2SI_Gd_Wss = 0xf30f2c;
-const UINT32 OP_CVTTPD2PI_Pq_Wpd = 0x660f2c;
-const UINT32 OP_CVTTSD2SI_Gd_Wsd = 0xf20f2c;
-const UINT32 OP_CVTPS2PI_Pq_Wq = 0x0f2d;
-const UINT32 OP_CVTSS2SI_Gd_Wss = 0xf30f2d;
-const UINT32 OP_CVTPD2PI_Pq_Wpd = 0x660f2d;
-const UINT32 OP_CVTSD2SI_Gd_Wsd = 0xf20f2d;
-const UINT32 OP_UCOMISS_Vss_Wss = 0x0f2e;
-const UINT32 OP_UCOMISD_Vsd_Wsd = 0x660f2e;
-const UINT32 OP_COMISS_Vss_Wss = 0x0f2f;
-const UINT32 OP_COMISD_Vsd_Wsd = 0x660f2f;
-
-const UINT32 OP_WRMSR = 0x0f30;
-const UINT32 OP_RDTSC = 0x0f31;
-const UINT32 OP_RDMSR = 0x0f32;
-const UINT32 OP_RDPMC = 0x0f33;
-const UINT32 OP_SYSENTER = 0x0f34;
-const UINT32 OP_SYSEXIT = 0x0f35;
-const UINT32 OP_GETSEC = 0x0f37;
-
-const UINT32 OP_CMOV_O_Gv_Ev = 0x0f40;
-const UINT32 OP_CMOV_NO_Gv_Ev = 0x0f41;
-const UINT32 OP_CMOV_B_Gv_Ev = 0x0f42;
-const UINT32 OP_CMOV_C_Gv_Ev = 0x0f42;
-const UINT32 OP_CMOV_AE_Gv_Ev = 0x0f43;
-const UINT32 OP_CMOV_NC_Gv_Ev = 0x0f43;
-const UINT32 OP_CMOV_E_Gv_Ev = 0x0f44;
-const UINT32 OP_CMOV_Z_Gv_Ev = 0x0f44;
-const UINT32 OP_CMOV_NE_Gv_Ev = 0x0f45;
-const UINT32 OP_CMOV_NZ_Gv_Ev = 0x0f45;
-const UINT32 OP_CMOV_BE_Gv_Ev = 0x0f46;
-const UINT32 OP_CMOV_A_Gv_Ev = 0x0f47;
-const UINT32 OP_CMOV_S_Gv_Ev = 0x0f48;
-const UINT32 OP_CMOV_NS_Gv_Ev = 0x0f49;
-const UINT32 OP_CMOV_P_Gv_Ev = 0x0f4a;
-const UINT32 OP_CMOV_PE_Gv_Ev = 0x0f4a;
-const UINT32 OP_CMOV_NP_Gv_Ev = 0x0f4b;
-const UINT32 OP_CMOV_PO_Gv_Ev = 0x0f4b;
-const UINT32 OP_CMOV_L_Gv_Ev = 0x0f4c;
-const UINT32 OP_CMOV_NGE_Gv_Ev = 0x0f4c;
-const UINT32 OP_CMOV_NL_Gv_Ev = 0x0f4d;
-const UINT32 OP_CMOV_GE_Gv_Ev = 0x0f4d;
-const UINT32 OP_CMOV_LE_Gv_Ev = 0x0f4e;
-const UINT32 OP_CMOV_NG_Gv_Ev = 0x0f4e;
-const UINT32 OP_CMOV_NLE_Gv_Ev = 0x0f4f;
-const UINT32 OP_CMOV_G_Gv_Ev = 0x0f4f;
-
-const UINT32 OP_MOVMSKPS_Gd_Ups = 0x0f50;
-const UINT32 OP_MOVMSKPD_Gd_Upd = 0x660f50;
-const UINT32 OP_SQRTPS_Vps_Wps = 0x0f51;
-const UINT32 OP_SQRTSS_Vss_Wss = 0xf30f51;
-const UINT32 OP_SQRTPD_Vpd_Wpd = 0x660f51;
-const UINT32 OP_SQRTSD_Vsd_Wsd = 0xf20f51;
-const UINT32 OP_RSQRTPS_Vps_Wps = 0x0f52;
-const UINT32 OP_RSQRTSS_Vss_Wss = 0xf30f52;
-const UINT32 OP_RCPPS_Vps_Wps = 0x0f53;
-const UINT32 OP_RCPSS_Vss_Wss = 0xf30f53;
-const UINT32 OP_ANDPS_Vps_Wps = 0x0f54;
-const UINT32 OP_ANDPD_Vpd_Wpd = 0x660f54;
-const UINT32 OP_ANDNPS_Vps_Wps = 0x0f55;
-const UINT32 OP_ANDNPD_Vpd_Wpd = 0x660f55;
-const UINT32 OP_ORPS_Vps_Wps = 0x0f56;
-const UINT32 OP_ORPD_Vpd_Wpd = 0x660f56;
-const UINT32 OP_XORPS_Vps_Wps = 0x0f57;
-const UINT32 OP_XORPD_Vpd_Wpd = 0x660f57;
-const UINT32 OP_ADDPS_Vps_Wps = 0x0f58;
-const UINT32 OP_ADDSS_Vss_Wss = 0xf30f58;
-const UINT32 OP_ADDPD_Vpd_Wpd = 0x660f58;
-const UINT32 OP_ADDSD_Vsd_Wsd = 0xf20f58;
-const UINT32 OP_MULPS_Vps_Wps = 0x0f59;
-const UINT32 OP_MULSS_Vss_Wss = 0xf30f59;
-const UINT32 OP_MULPD_Vpd_Wpd = 0x660f59;
-const UINT32 OP_MULSD_Vsd_Wsd = 0xf20f59;
-const UINT32 OP_CVTPS2PD_Vpd_Wq = 0x0f5a;
-const UINT32 OP_CVTSS2SD_Vsd_Wss = 0xf30f5a;
-const UINT32 OP_CVTPD2PS_Vps_Wpd = 0x660f5a;
-const UINT32 OP_CVTSD2SS_Vss_Wsd = 0xf20f5a;
-const UINT32 OP_CVTDQ2PS_Vps_Wdq = 0x0f5b;
-const UINT32 OP_CVTPS2DQ_Vdq_Wps = 0x660f5b;
-const UINT32 OP_CVTTPS2DQ_Vdq_Wps = 0xf30f5b;
-const UINT32 OP_SUBPS_Vps_Wps = 0x0f5c;
-const UINT32 OP_SUBSS_Vss_Wss = 0xf30f5c;
-const UINT32 OP_SUBPD_Vpd_Wpd = 0x660f5c;
-const UINT32 OP_SUBSD_Vsd_Wsd = 0xf20f5c;
-const UINT32 OP_MINPS_Vps_Wps = 0x0f5d;
-const UINT32 OP_MINSS_Vss_Wss = 0xf30f5d;
-const UINT32 OP_MINPD_Vpd_Wpd = 0x660f5d;
-const UINT32 OP_MINSD_Vsd_Wsd = 0xf20f5d;
-const UINT32 OP_DIVPS_Vps_Wps = 0x0f5e;
-const UINT32 OP_DIVSS_Vss_Wss = 0xf30f5e;
-const UINT32 OP_DIVPD_Vpd_Wpd = 0x660f5e;
-const UINT32 OP_DIVSD_Vsd_Wsd = 0xf20f5e;
-const UINT32 OP_MAXPS_Vps_Wps = 0x0f5f;
-const UINT32 OP_MAXSS_Vss_Wss = 0xf30f5f;
-const UINT32 OP_MAXPD_Vpd_Wpd = 0x660f5f;
-const UINT32 OP_MAXSD_Vsd_Wsd = 0xf20f5f;
-
-const UINT32 OP_PUNPCKLBW_Pq_Qd = 0x0f60;
-const UINT32 OP_PUNPCKLBW_Vdq_Wdq = 0x660f60;
-const UINT32 OP_PUNPCKLWD_Pq_Qd = 0x0f61;
-const UINT32 OP_PUNPCKLWD_Vdq_Wdq = 0x660f61;
-const UINT32 OP_PUNPCKLDQ_Pq_Qd = 0x0f62;
-const UINT32 OP_PUNPCKLDQ_Vdq_Wdq = 0x660f62;
-const UINT32 OP_PACKSSWB_Pq_Qq = 0x0f63;
-const UINT32 OP_PACKSSWB_Vdq_Wdq = 0x660f63;
-const UINT32 OP_PCMPGTB_Pq_Qq = 0x0f64;
-const UINT32 OP_PCMPGTB_Vdq_Wdq = 0x660f64;
-const UINT32 OP_PCMPGTW_Pq_Qq = 0x0f65;
-const UINT32 OP_PCMPGTW_Vdq_Wdq = 0x660f65;
-const UINT32 OP_PCMPGTD_Pq_Qq = 0x0f66;
-const UINT32 OP_PCMPGTD_Vdq_Wdq = 0x660f66;
-const UINT32 OP_PACKUSWB_Pq_Qq = 0x0f67;
-const UINT32 OP_PACKUSWB_Vdq_Wdq = 0x660f67;
-const UINT32 OP_PUNPCKHBW_Pq_Qq = 0x0f68;
-const UINT32 OP_PUNPCKHBW_Vdq_Qdq = 0x660f68;
-const UINT32 OP_PUNPCKHWD_Pq_Qq = 0x0f69;
-const UINT32 OP_PUNPCKHWD_Vdq_Qdq = 0x660f69;
-const UINT32 OP_PUNPCKHDQ_Pq_Qq = 0x0f6a;
-const UINT32 OP_PUNPCKHDQ_Vdq_Qdq = 0x660f6a;
-const UINT32 OP_PACKSSDW_Pq_Qq = 0x0f6b;
-const UINT32 OP_PACKSSDW_Vdq_Qdq = 0x660f6b;
-const UINT32 OP_PUNPCKLQDQ_Vdq_Wdq = 0x660f6c;
-const UINT32 OP_PUNPCKHQDQ_Vdq_Wdq = 0x660f6d;
-const UINT32 OP_MOVD_Pd_Ed = 0x0f6e;
-const UINT32 OP_MOVD_Vd_Ed = 0x660f6e;
-const UINT32 OP_MOVQ_Pq_Qq = 0x0f6f;
-const UINT32 OP_MOVDQA_Vdq_Wdq = 0x660f6f;
-const UINT32 OP_MOVDQU_Vdq_Wdq = 0xf30f6f;
-
-const UINT32 OP_PSHUFW_Pq_Qq_Ib = 0x0f70;
-const UINT32 OP_PSHUFD_Vdq_Wdq_Ib = 0x660f70;
-const UINT32 OP_PSHUFHW_Vdq_Wdq_Ib = 0xf30f70;
-const UINT32 OP_PSHUFLW_Vdq_Wdq_Ib = 0xf20f70;
-const UINT32 OP_G12 = 0x0f71;
-const UINT32 OP_G13 = 0x0f72;
-const UINT32 OP_G14 = 0x0f73;
-const UINT32 OP_PCMPEQB_Pq_Qq = 0x0f74;
-const UINT32 OP_PCMPEQB_Vdq_Wdq = 0x660f74;
-const UINT32 OP_PCMPEQW_Pq_Qq = 0x0f75;
-const UINT32 OP_PCMPEQW_Vdq_Wdq = 0x660f75;
-const UINT32 OP_PCMPEQD_Pq_Qq = 0x0f76;
-const UINT32 OP_PCMPEQD_Vdq_Wdq = 0x660f76;
-const UINT32 OP_EMMS = 0x0f77;
-const UINT32 OP_VMREAD_Ed_Gd = 0x0f78;
-const UINT32 OP_VMWRITE_Gd_Ed = 0x0f79;
-const UINT32 OP_HADDPD_Vpd_Wpd = 0x660f7c;
-const UINT32 OP_HADDPS_Vps_Wps = 0xf20f7c;
-const UINT32 OP_HSUBPD_Vpd_Wpd = 0x660f7d;
-const UINT32 OP_HSUBPS_Vps_Wps = 0xf20f7d;
-const UINT32 OP_MOVD_Ed_Pd = 0x0f7e;
-const UINT32 OP_MOVD_Ed_Vd = 0x660f7e;
-const UINT32 OP_MOVQ_Vq_Wq = 0xf30f7e;
-const UINT32 OP_MOVQ_Qq_Pq = 0x0f7f;
-const UINT32 OP_MOVDQA_Wdq_Vdq = 0x660f7f;
-const UINT32 OP_MOVDQU_Wdq_Vdq = 0xf30f7f;
-
-const UINT32 OP_JCC_O_Jv = 0x0f80;
-const UINT32 OP_JCC_NO_Jv = 0x0f81;
-const UINT32 OP_JCC_B_Jv = 0x0f82;
-const UINT32 OP_JCC_C_Jv = 0x0f82;
-const UINT32 OP_JCC_NAE_Jv = 0x0f82;
-const UINT32 OP_JCC_AE_Jv = 0x0f83;
-const UINT32 OP_JCC_NB_Jv = 0x0f83;
-const UINT32 OP_JCC_NC_Jv = 0x0f83;
-const UINT32 OP_JCC_E_Jv = 0x0f84;
-const UINT32 OP_JCC_Z_Jv = 0x0f84;
-const UINT32 OP_JCC_NE_Jv = 0x0f85;
-const UINT32 OP_JCC_NZ_Jv = 0x0f85;
-const UINT32 OP_JCC_BE_Jv = 0x0f86;
-const UINT32 OP_JCC_NA_Jv = 0x0f86;
-const UINT32 OP_JCC_A_Jv = 0x0f87;
-const UINT32 OP_JCC_NBE_Jv = 0x0f87;
-const UINT32 OP_JCC_S_Jv = 0x0f88;
-const UINT32 OP_JCC_NS_Jv = 0x0f89;
-const UINT32 OP_JCC_P_Jv = 0x0f8a;
-const UINT32 OP_JCC_PE_Jv = 0x0f8a;
-const UINT32 OP_JCC_NP_Jv = 0x0f8b;
-const UINT32 OP_JCC_PO_Jv = 0x0f8b;
-const UINT32 OP_JCC_L_Jv = 0x0f8c;
-const UINT32 OP_JCC_NGE_Jv = 0x0f8c;
-const UINT32 OP_JCC_NL_Jv = 0x0f8d;
-const UINT32 OP_JCC_GE_Jv = 0x0f8d;
-const UINT32 OP_JCC_LE_Jv = 0x0f8e;
-const UINT32 OP_JCC_NG_Jv = 0x0f8e;
-const UINT32 OP_JCC_NLE_Jv = 0x0f8f;
-const UINT32 OP_JCC_G_Jv = 0x0f8f;
-
-const UINT32 OP_SETCC_O_Eb = (0x0f90 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NO_Eb = (0x0f91 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_B_Eb = (0x0f92 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_C_Eb = (0x0f92 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NAE_Eb = (0x0f92 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_AE_Eb = (0x0f93 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NB_Eb = (0x0f93 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NC_Eb = (0x0f93 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_E_Eb = (0x0f94 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_Z_Eb = (0x0f94 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NE_Eb = (0x0f95 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NZ_Eb = (0x0f95 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_BE_Eb = (0x0f96 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NA_Eb = (0x0f96 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_A_Eb = (0x0f97 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NBE_Eb = (0x0f97 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_S_Eb = (0x0f98 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NS_Eb = (0x0f99 | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_P_Eb = (0x0f9a | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_PE_Eb = (0x0f9a | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NP_Eb = (0x0f9b | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_PO_Eb = (0x0f9b | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_L_Eb = (0x0f9c | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NGE_Eb = (0x0f9c | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NL_Eb = (0x0f9d | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_GE_Eb = (0x0f9d | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_LE_Eb = (0x0f9e | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NG_Eb = (0x0f9e | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_NLE_Eb = (0x0f9f | OPFLAG_8BITRM);
-const UINT32 OP_SETCC_G_Eb = (0x0f9f | OPFLAG_8BITRM);
-
-const UINT32 OP_PUSH_FS = 0x0fa0;
-const UINT32 OP_POP_FS = 0x0fa1;
-const UINT32 OP_CPUID = 0x0fa2;
-const UINT32 OP_BT_Ev_Gv = 0x0fa3;
-const UINT32 OP_SHLD_Ev_Gv_Ib = 0x0fa4;
-const UINT32 OP_SHLD_Ev_Gv_CL = 0x0fa5;
-const UINT32 OP_PUSH_GS = 0x0fa8;
-const UINT32 OP_POP_GS = 0x0fa9;
-const UINT32 OP_RSM = 0x0faa;
-const UINT32 OP_BTS_Ev_Gv = 0x0fab;
-const UINT32 OP_SHRD_Ev_Gv_Ib = 0x0fac;
-const UINT32 OP_SHRD_Ev_Gv_CL = 0x0fad;
-const UINT32 OP_G16 = 0x0fae;
-const UINT32 OP_IMUL_Gv_Ev = 0x0faf;
-
-const UINT32 OP_CMPXCHG_Eb_Gb = (0x0fb0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_CMPXCHG_Ev_Gv = 0x0fb1;
-const UINT32 OP_LSS_Mp = 0x0fb2;
-const UINT32 OP_BTR_Ev_Gv = 0x0fb3;
-const UINT32 OP_LFS_Mp = 0x0fb4;
-const UINT32 OP_LGS_Mp = 0x0fb5;
-const UINT32 OP_MOVZX_Gv_Eb = (0x0fb6 | OPFLAG_8BITRM);
-const UINT32 OP_MOVZX_Gv_Ew = 0x0fb7;
-const UINT32 OP_JMPE = 0x0fb8;
-const UINT32 OP_POPCNT_Gv_Ev = 0xf30fb8;
-const UINT32 OP_G10_INVALID = 0x0fb9;
-const UINT32 OP_G8_Ev_Ib = 0x0fba;
-const UINT32 OP_BTC_Ev_Gv = 0x0fbb;
-const UINT32 OP_BSF_Gv_Ev = 0x0fbc;
-const UINT32 OP_BSR_Gv_Ev = 0x0fbd;
-const UINT32 OP_MOVSX_Gv_Eb = (0x0fbe | OPFLAG_8BITRM);
-const UINT32 OP_MOVSX_Gv_Ew = 0x0fbf;
-
-const UINT32 OP_XADD_Eb_Gb = (0x0fc0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
-const UINT32 OP_XADD_Ev_Gv = 0x0fc1;
-const UINT32 OP_CMPPS_Vps_Wps_Ib = 0x0fc2;
-const UINT32 OP_CMPSS_Vss_Wss_Ib = 0xf30fc2;
-const UINT32 OP_CMPPD_Vpd_Wpd_Ib = 0x660fc2;
-const UINT32 OP_CMPSD_Vsd_Wsd_Ib = 0xf20fc2;
-const UINT32 OP_MOVNTI_Md_Gd = 0x0fc3;
-const UINT32 OP_PINSRW_Pw_Ew_Ib = 0x0fc4;
-const UINT32 OP_PINSRW_Vw_Ew_Ib = 0x660fc4;
-const UINT32 OP_PEXTRW_Gw_Pw_Ib = 0x0fc5;
-const UINT32 OP_PEXTRW_Gw_Vw_Ib = 0x660fc5;
-const UINT32 OP_SHUFPS_Vps_Wps_Ib = 0x0fc6;
-const UINT32 OP_SHUFPD_Vpd_Wpd_Ib = 0x660fc6;
-const UINT32 OP_G9 = 0x0fc7;
-const UINT32 OP_BSWAP_EAX = 0x0fc8;
-const UINT32 OP_BSWAP_ECX = 0x0fc9;
-const UINT32 OP_BSWAP_EDX = 0x0fca;
-const UINT32 OP_BSWAP_EBX = 0x0fcb;
-const UINT32 OP_BSWAP_ESP = 0x0fcc;
-const UINT32 OP_BSWAP_EBP = 0x0fcd;
-const UINT32 OP_BSWAP_ESI = 0x0fce;
-const UINT32 OP_BSWAP_EDI = 0x0fcf;
-
-const UINT32 OP_ADDSUBPD_Vpd_Wpd = 0x0fd0;
-const UINT32 OP_ADDSUBPS_Vps_Wps = 0xf20fd0;
-const UINT32 OP_PSRLW_Pq_Qq = 0x0fd1;
-const UINT32 OP_PSRLW_Vdq_Wdq = 0x660fd1;
-const UINT32 OP_PSRLD_Pq_Qq = 0x0fd2;
-const UINT32 OP_PSRLD_Vdq_Wdq = 0x660fd2;
-const UINT32 OP_PSRLQ_Pq_Qq = 0x0fd3;
-const UINT32 OP_PSRLQ_Vdq_Wdq = 0x660fd3;
-const UINT32 OP_PADDQ_Pq_Qq = 0x0fd4;
-const UINT32 OP_PADDQ_Vdq_Wdq = 0x660fd4;
-const UINT32 OP_PMULLW_Pq_Qq = 0x0fd5;
-const UINT32 OP_PMULLW_Vdq_Wdq = 0x660fd5;
-const UINT32 OP_MOVQ_Wq_Vq = 0x0fd6;
-const UINT32 OP_MOVQ2DQ_Vdq_Qq = 0xf30fd6;
-const UINT32 OP_MOVDQ2Q_Pq_Vq = 0xf20fd6;
-const UINT32 OP_PMOVMSKB_Gd_Pq = 0x0fd7;
-const UINT32 OP_PMOVMSKB_Gd_Vdq = 0x660fd7;
-const UINT32 OP_PSUBUSB_Pq_Qq = 0x0fd8;
-const UINT32 OP_PSUBUSB_Vdq_Wdq = 0x660fd8;
-const UINT32 OP_PSUBUSW_Pq_Qq = 0x0fd9;
-const UINT32 OP_PSUBUSW_Vdq_Wdq = 0x660fd9;
-const UINT32 OP_PMINUB_Pq_Qq = 0x0fda;
-const UINT32 OP_PMINUB_Vdq_Wdq = 0x660fda;
-const UINT32 OP_PAND_Pq_Qq = 0x0fdb;
-const UINT32 OP_PAND_Vdq_Wdq = 0x660fdb;
-const UINT32 OP_PADDUSB_Pq_Qq = 0x0fdc;
-const UINT32 OP_PADDUSB_Vdq_Wdq = 0x660fdc;
-const UINT32 OP_PADDUSW_Pq_Qq = 0x0fdd;
-const UINT32 OP_PADDUSW_Vdq_Wdq = 0x660fdd;
-const UINT32 OP_PMAXUB_Pq_Qq = 0x0fde;
-const UINT32 OP_PMAXUB_Vdq_Wdq = 0x660fde;
-const UINT32 OP_PANDN_Pq_Qq = 0x0fdf;
-const UINT32 OP_PANDN_Vdq_Wdq = 0x660fdf;
-
-const UINT32 OP_PAVGB_Pq_Qq = 0x0fe0;
-const UINT32 OP_PAVGB_Vdq_Wdq = 0x660fe0;
-const UINT32 OP_PSRAW_Pq_Qq = 0x0fe1;
-const UINT32 OP_PSRAW_Vdq_Wdq = 0x660fe1;
-const UINT32 OP_PSRAD_Pq_Qq = 0x0fe2;
-const UINT32 OP_PSRAD_Vdq_Wdq = 0x660fe2;
-const UINT32 OP_PAVGW_Pq_Qq = 0x0fe3;
-const UINT32 OP_PAVGW_Vdq_Wdq = 0x660fe3;
-const UINT32 OP_PMULHUW_Pq_Qq = 0x0fe4;
-const UINT32 OP_PMULHUW_Vdq_Wdq = 0x660fe4;
-const UINT32 OP_PMULHW_Pq_Qq = 0x0fe5;
-const UINT32 OP_PMULHW_Vdq_Wdq = 0x660fe5;
-const UINT32 OP_CVTPD2DQ_Vdq_Wpd = 0xf20fe6;
-const UINT32 OP_CVTTPD2DQ_Vdq_Wpd = 0x660fe6;
-const UINT32 OP_CVTDQ2PD_Vpd_Wq = 0xf30fe6;
-const UINT32 OP_MOVNTQ_Mq_Vq = 0x0fe7;
-const UINT32 OP_MOVNTDQ_Mdq_Vdq = 0x660fe7;
-const UINT32 OP_PSUBSB_Pq_Qq = 0x0fe8;
-const UINT32 OP_PSUBSB_Vdq_Wdq = 0x660fe8;
-const UINT32 OP_PSUBSW_Pq_Qq = 0x0fe9;
-const UINT32 OP_PSUBSW_Vdq_Wdq = 0x660fe9;
-const UINT32 OP_PMINSW_Pq_Qq = 0x0fea;
-const UINT32 OP_PMINSW_Vdq_Wdq = 0x660fea;
-const UINT32 OP_POR_Pq_Qq = 0x0feb;
-const UINT32 OP_POR_Vdq_Wdq = 0x660feb;
-const UINT32 OP_PADDSB_Pq_Qq = 0x0fec;
-const UINT32 OP_PADDSB_Vdq_Wdq = 0x660fec;
-const UINT32 OP_PADDSW_Pq_Qq = 0x0fed;
-const UINT32 OP_PADDSW_Vdq_Wdq = 0x660fed;
-const UINT32 OP_PMAXSW_Pq_Qq = 0x0fee;
-const UINT32 OP_PMAXSW_Vdq_Wdq = 0x660fee;
-const UINT32 OP_PXOR_Pq_Qq = 0x0fef;
-const UINT32 OP_PXOR_Vdq_Wdq = 0x660fef;
-
-const UINT32 OP_LDDQU_Vdq_Mdq = 0xf20ff0;
-const UINT32 OP_PSLLW_Pq_Qq = 0x0ff1;
-const UINT32 OP_PSLLW_Vdq_Wdq = 0x660ff1;
-const UINT32 OP_PSLLD_Pq_Qq = 0x0ff2;
-const UINT32 OP_PSLLD_Vdq_Wdq = 0x660ff2;
-const UINT32 OP_PSLLQ_Pq_Qq = 0x0ff3;
-const UINT32 OP_PSLLQ_Vdq_Wdq = 0x660ff3;
-const UINT32 OP_PMULUDQ_Pq_Qq = 0x0ff4;
-const UINT32 OP_PMULUDQ_Vdq_Wdq = 0x660ff4;
-const UINT32 OP_PMADDWD_Pq_Qq = 0x0ff5;
-const UINT32 OP_PMADDWD_Vdq_Wdq = 0x660ff5;
-const UINT32 OP_PSADBW_Pq_Qq = 0x0ff6;
-const UINT32 OP_PSADBW_Vdq_Wdq = 0x660ff6;
-const UINT32 OP_MASKMOVQ_Pq_Qq = 0x0ff7;
-const UINT32 OP_MASKMOVDQU_Vdq_Wdq = 0x660ff7;
-const UINT32 OP_PSUBB_Pq_Qq = 0x0ff8;
-const UINT32 OP_PSUBB_Vdq_Wdq = 0x660ff8;
-const UINT32 OP_PSUBW_Pq_Qq = 0x0ff9;
-const UINT32 OP_PSUBW_Vdq_Wdq = 0x660ff9;
-const UINT32 OP_PSUBD_Pq_Qq = 0x0ffa;
-const UINT32 OP_PSUBD_Vdq_Wdq = 0x660ffa;
-const UINT32 OP_PSUBQ_Pq_Qq = 0x0ffb;
-const UINT32 OP_PSUBQ_Vdq_Wdq = 0x660ffb;
-const UINT32 OP_PADDB_Pq_Qq = 0x0ffc;
-const UINT32 OP_PADDB_Vdq_Wdq = 0x660ffc;
-const UINT32 OP_PADDW_Pq_Qq = 0x0ffd;
-const UINT32 OP_PADDW_Vdq_Wdq = 0x660ffd;
-const UINT32 OP_PADDD_Pq_Qq = 0x0ffe;
-const UINT32 OP_PADDD_Vdq_Wdq = 0x660ffe;
+const UINT32 OP_G6 = 0x0f00;
+const UINT32 OP_G7 = 0x0f01;
+const UINT32 OP_LAR_Gv_Ew = 0x0f02;
+const UINT32 OP_LSL_Gv_Ew = 0x0f03;
+const UINT32 OP_SYSCALL = 0x0f05;
+const UINT32 OP_CLTS = 0x0f06;
+const UINT32 OP_SYSRET = 0x0f07;
+const UINT32 OP_INVD = 0x0f08;
+const UINT32 OP_WBINVD = 0x0f09;
+const UINT32 OP_UD2 = 0x0f0b;
+const UINT32 OP_NOP0d_Ev = 0x0f0d;
+
+const UINT32 OP_MOVUPS_Vps_Wps = 0x0f10;
+const UINT32 OP_MOVSS_Vss_Wss = 0xf30f10;
+const UINT32 OP_MOVUPD_Vpd_Wpd = 0x660f10;
+const UINT32 OP_MOVSD_Vsd_Wsd = 0xf20f10;
+const UINT32 OP_MOVUPS_Wps_Vps = 0x0f11;
+const UINT32 OP_MOVSS_Wss_Vss = 0xf30f11;
+const UINT32 OP_MOVUPD_Wpd_Vpd = 0x660f11;
+const UINT32 OP_MOVSD_Wsd_Vsd = 0xf20f11;
+const UINT32 OP_MOVLPS_Vq_Mq = 0x0f12;
+const UINT32 OP_MOVLPD_Vq_Mq = 0x660f12;
+const UINT32 OP_MOVHLPS_Vq_Uq = 0x0f12;
+const UINT32 OP_MOVDDUP_Vq_Wq = 0xf20f12;
+const UINT32 OP_MOVSLDUP_Vq_Wq = 0xf30f12;
+const UINT32 OP_MOVLPS_Mq_Vq = 0x0f13;
+const UINT32 OP_MOVLPD_Mq_Vq = 0x660f13;
+const UINT32 OP_UNPCKLPS_Vps_Wq = 0x0f14;
+const UINT32 OP_UNPCKLPD_Vpd_Wq = 0x660f14;
+const UINT32 OP_UNPCKHPS_Vps_Wq = 0x0f15;
+const UINT32 OP_UNPCKHPD_Vpd_Wq = 0x660f15;
+const UINT32 OP_MOVHPS_Vq_Mq = 0x0f16;
+const UINT32 OP_MOVHPD_Vq_Mq = 0x660f16;
+const UINT32 OP_MOVLHPS_Vq_Uq = 0x0f16;
+const UINT32 OP_MOVSHDUP_Vq_Wq = 0xf30f16;
+const UINT32 OP_MOVHPS_Mq_Vq = 0x0f17;
+const UINT32 OP_MOVHPD_Mq_Vq = 0x660f17;
+const UINT32 OP_PREFETCH_G16 = 0x0f18;
+const UINT32 OP_NOP1f_Ev = 0x0f1f;
+
+const UINT32 OP_MOV_Rd_Cd = 0x0f20;
+const UINT32 OP_MOV_Rd_Dd = 0x0f21;
+const UINT32 OP_MOV_Cd_Rd = 0x0f22;
+const UINT32 OP_MOV_Dd_Rd = 0x0f23;
+const UINT32 OP_MOVAPS_Vps_Wps = 0x0f28;
+const UINT32 OP_MOVAPD_Vpd_Wpd = 0x660f28;
+const UINT32 OP_MOVAPS_Wps_Vps = 0x0f29;
+const UINT32 OP_MOVAPD_Wpd_Vpd = 0x660f29;
+const UINT32 OP_CVTPI2PS_Vps_Qq = 0x0f2a;
+const UINT32 OP_CVTSI2SS_Vss_Ed = 0xf30f2a;
+const UINT32 OP_CVTPI2PD_Vpd_Qq = 0x660f2a;
+const UINT32 OP_CVTSI2SD_Vsd_Ed = 0xf20f2a;
+const UINT32 OP_MOVNTPS_Mps_Vps = 0x0f2b;
+const UINT32 OP_MOVNTPD_Mpd_Vpd = 0x660f2b;
+const UINT32 OP_CVTTPS2PI_Pq_Wq = 0x0f2c;
+const UINT32 OP_CVTTSS2SI_Gd_Wss = 0xf30f2c;
+const UINT32 OP_CVTTPD2PI_Pq_Wpd = 0x660f2c;
+const UINT32 OP_CVTTSD2SI_Gd_Wsd = 0xf20f2c;
+const UINT32 OP_CVTPS2PI_Pq_Wq = 0x0f2d;
+const UINT32 OP_CVTSS2SI_Gd_Wss = 0xf30f2d;
+const UINT32 OP_CVTPD2PI_Pq_Wpd = 0x660f2d;
+const UINT32 OP_CVTSD2SI_Gd_Wsd = 0xf20f2d;
+const UINT32 OP_UCOMISS_Vss_Wss = 0x0f2e;
+const UINT32 OP_UCOMISD_Vsd_Wsd = 0x660f2e;
+const UINT32 OP_COMISS_Vss_Wss = 0x0f2f;
+const UINT32 OP_COMISD_Vsd_Wsd = 0x660f2f;
+
+const UINT32 OP_WRMSR = 0x0f30;
+const UINT32 OP_RDTSC = 0x0f31;
+const UINT32 OP_RDMSR = 0x0f32;
+const UINT32 OP_RDPMC = 0x0f33;
+const UINT32 OP_SYSENTER = 0x0f34;
+const UINT32 OP_SYSEXIT = 0x0f35;
+const UINT32 OP_GETSEC = 0x0f37;
+
+const UINT32 OP_CMOV_O_Gv_Ev = 0x0f40;
+const UINT32 OP_CMOV_NO_Gv_Ev = 0x0f41;
+const UINT32 OP_CMOV_B_Gv_Ev = 0x0f42;
+const UINT32 OP_CMOV_C_Gv_Ev = 0x0f42;
+const UINT32 OP_CMOV_AE_Gv_Ev = 0x0f43;
+const UINT32 OP_CMOV_NC_Gv_Ev = 0x0f43;
+const UINT32 OP_CMOV_E_Gv_Ev = 0x0f44;
+const UINT32 OP_CMOV_Z_Gv_Ev = 0x0f44;
+const UINT32 OP_CMOV_NE_Gv_Ev = 0x0f45;
+const UINT32 OP_CMOV_NZ_Gv_Ev = 0x0f45;
+const UINT32 OP_CMOV_BE_Gv_Ev = 0x0f46;
+const UINT32 OP_CMOV_A_Gv_Ev = 0x0f47;
+const UINT32 OP_CMOV_S_Gv_Ev = 0x0f48;
+const UINT32 OP_CMOV_NS_Gv_Ev = 0x0f49;
+const UINT32 OP_CMOV_P_Gv_Ev = 0x0f4a;
+const UINT32 OP_CMOV_PE_Gv_Ev = 0x0f4a;
+const UINT32 OP_CMOV_NP_Gv_Ev = 0x0f4b;
+const UINT32 OP_CMOV_PO_Gv_Ev = 0x0f4b;
+const UINT32 OP_CMOV_L_Gv_Ev = 0x0f4c;
+const UINT32 OP_CMOV_NGE_Gv_Ev = 0x0f4c;
+const UINT32 OP_CMOV_NL_Gv_Ev = 0x0f4d;
+const UINT32 OP_CMOV_GE_Gv_Ev = 0x0f4d;
+const UINT32 OP_CMOV_LE_Gv_Ev = 0x0f4e;
+const UINT32 OP_CMOV_NG_Gv_Ev = 0x0f4e;
+const UINT32 OP_CMOV_NLE_Gv_Ev = 0x0f4f;
+const UINT32 OP_CMOV_G_Gv_Ev = 0x0f4f;
+
+const UINT32 OP_MOVMSKPS_Gd_Ups = 0x0f50;
+const UINT32 OP_MOVMSKPD_Gd_Upd = 0x660f50;
+const UINT32 OP_SQRTPS_Vps_Wps = 0x0f51;
+const UINT32 OP_SQRTSS_Vss_Wss = 0xf30f51;
+const UINT32 OP_SQRTPD_Vpd_Wpd = 0x660f51;
+const UINT32 OP_SQRTSD_Vsd_Wsd = 0xf20f51;
+const UINT32 OP_RSQRTPS_Vps_Wps = 0x0f52;
+const UINT32 OP_RSQRTSS_Vss_Wss = 0xf30f52;
+const UINT32 OP_RCPPS_Vps_Wps = 0x0f53;
+const UINT32 OP_RCPSS_Vss_Wss = 0xf30f53;
+const UINT32 OP_ANDPS_Vps_Wps = 0x0f54;
+const UINT32 OP_ANDPD_Vpd_Wpd = 0x660f54;
+const UINT32 OP_ANDNPS_Vps_Wps = 0x0f55;
+const UINT32 OP_ANDNPD_Vpd_Wpd = 0x660f55;
+const UINT32 OP_ORPS_Vps_Wps = 0x0f56;
+const UINT32 OP_ORPD_Vpd_Wpd = 0x660f56;
+const UINT32 OP_XORPS_Vps_Wps = 0x0f57;
+const UINT32 OP_XORPD_Vpd_Wpd = 0x660f57;
+const UINT32 OP_ADDPS_Vps_Wps = 0x0f58;
+const UINT32 OP_ADDSS_Vss_Wss = 0xf30f58;
+const UINT32 OP_ADDPD_Vpd_Wpd = 0x660f58;
+const UINT32 OP_ADDSD_Vsd_Wsd = 0xf20f58;
+const UINT32 OP_MULPS_Vps_Wps = 0x0f59;
+const UINT32 OP_MULSS_Vss_Wss = 0xf30f59;
+const UINT32 OP_MULPD_Vpd_Wpd = 0x660f59;
+const UINT32 OP_MULSD_Vsd_Wsd = 0xf20f59;
+const UINT32 OP_CVTPS2PD_Vpd_Wq = 0x0f5a;
+const UINT32 OP_CVTSS2SD_Vsd_Wss = 0xf30f5a;
+const UINT32 OP_CVTPD2PS_Vps_Wpd = 0x660f5a;
+const UINT32 OP_CVTSD2SS_Vss_Wsd = 0xf20f5a;
+const UINT32 OP_CVTDQ2PS_Vps_Wdq = 0x0f5b;
+const UINT32 OP_CVTPS2DQ_Vdq_Wps = 0x660f5b;
+const UINT32 OP_CVTTPS2DQ_Vdq_Wps = 0xf30f5b;
+const UINT32 OP_SUBPS_Vps_Wps = 0x0f5c;
+const UINT32 OP_SUBSS_Vss_Wss = 0xf30f5c;
+const UINT32 OP_SUBPD_Vpd_Wpd = 0x660f5c;
+const UINT32 OP_SUBSD_Vsd_Wsd = 0xf20f5c;
+const UINT32 OP_MINPS_Vps_Wps = 0x0f5d;
+const UINT32 OP_MINSS_Vss_Wss = 0xf30f5d;
+const UINT32 OP_MINPD_Vpd_Wpd = 0x660f5d;
+const UINT32 OP_MINSD_Vsd_Wsd = 0xf20f5d;
+const UINT32 OP_DIVPS_Vps_Wps = 0x0f5e;
+const UINT32 OP_DIVSS_Vss_Wss = 0xf30f5e;
+const UINT32 OP_DIVPD_Vpd_Wpd = 0x660f5e;
+const UINT32 OP_DIVSD_Vsd_Wsd = 0xf20f5e;
+const UINT32 OP_MAXPS_Vps_Wps = 0x0f5f;
+const UINT32 OP_MAXSS_Vss_Wss = 0xf30f5f;
+const UINT32 OP_MAXPD_Vpd_Wpd = 0x660f5f;
+const UINT32 OP_MAXSD_Vsd_Wsd = 0xf20f5f;
+
+const UINT32 OP_PUNPCKLBW_Pq_Qd = 0x0f60;
+const UINT32 OP_PUNPCKLBW_Vdq_Wdq = 0x660f60;
+const UINT32 OP_PUNPCKLWD_Pq_Qd = 0x0f61;
+const UINT32 OP_PUNPCKLWD_Vdq_Wdq = 0x660f61;
+const UINT32 OP_PUNPCKLDQ_Pq_Qd = 0x0f62;
+const UINT32 OP_PUNPCKLDQ_Vdq_Wdq = 0x660f62;
+const UINT32 OP_PACKSSWB_Pq_Qq = 0x0f63;
+const UINT32 OP_PACKSSWB_Vdq_Wdq = 0x660f63;
+const UINT32 OP_PCMPGTB_Pq_Qq = 0x0f64;
+const UINT32 OP_PCMPGTB_Vdq_Wdq = 0x660f64;
+const UINT32 OP_PCMPGTW_Pq_Qq = 0x0f65;
+const UINT32 OP_PCMPGTW_Vdq_Wdq = 0x660f65;
+const UINT32 OP_PCMPGTD_Pq_Qq = 0x0f66;
+const UINT32 OP_PCMPGTD_Vdq_Wdq = 0x660f66;
+const UINT32 OP_PACKUSWB_Pq_Qq = 0x0f67;
+const UINT32 OP_PACKUSWB_Vdq_Wdq = 0x660f67;
+const UINT32 OP_PUNPCKHBW_Pq_Qq = 0x0f68;
+const UINT32 OP_PUNPCKHBW_Vdq_Qdq = 0x660f68;
+const UINT32 OP_PUNPCKHWD_Pq_Qq = 0x0f69;
+const UINT32 OP_PUNPCKHWD_Vdq_Qdq = 0x660f69;
+const UINT32 OP_PUNPCKHDQ_Pq_Qq = 0x0f6a;
+const UINT32 OP_PUNPCKHDQ_Vdq_Qdq = 0x660f6a;
+const UINT32 OP_PACKSSDW_Pq_Qq = 0x0f6b;
+const UINT32 OP_PACKSSDW_Vdq_Qdq = 0x660f6b;
+const UINT32 OP_PUNPCKLQDQ_Vdq_Wdq = 0x660f6c;
+const UINT32 OP_PUNPCKHQDQ_Vdq_Wdq = 0x660f6d;
+const UINT32 OP_MOVD_Pd_Ed = 0x0f6e;
+const UINT32 OP_MOVD_Vd_Ed = 0x660f6e;
+const UINT32 OP_MOVQ_Pq_Qq = 0x0f6f;
+const UINT32 OP_MOVDQA_Vdq_Wdq = 0x660f6f;
+const UINT32 OP_MOVDQU_Vdq_Wdq = 0xf30f6f;
+
+const UINT32 OP_PSHUFW_Pq_Qq_Ib = 0x0f70;
+const UINT32 OP_PSHUFD_Vdq_Wdq_Ib = 0x660f70;
+const UINT32 OP_PSHUFHW_Vdq_Wdq_Ib = 0xf30f70;
+const UINT32 OP_PSHUFLW_Vdq_Wdq_Ib = 0xf20f70;
+const UINT32 OP_G12 = 0x0f71;
+const UINT32 OP_G13 = 0x0f72;
+const UINT32 OP_G14 = 0x0f73;
+const UINT32 OP_PCMPEQB_Pq_Qq = 0x0f74;
+const UINT32 OP_PCMPEQB_Vdq_Wdq = 0x660f74;
+const UINT32 OP_PCMPEQW_Pq_Qq = 0x0f75;
+const UINT32 OP_PCMPEQW_Vdq_Wdq = 0x660f75;
+const UINT32 OP_PCMPEQD_Pq_Qq = 0x0f76;
+const UINT32 OP_PCMPEQD_Vdq_Wdq = 0x660f76;
+const UINT32 OP_EMMS = 0x0f77;
+const UINT32 OP_VMREAD_Ed_Gd = 0x0f78;
+const UINT32 OP_VMWRITE_Gd_Ed = 0x0f79;
+const UINT32 OP_HADDPD_Vpd_Wpd = 0x660f7c;
+const UINT32 OP_HADDPS_Vps_Wps = 0xf20f7c;
+const UINT32 OP_HSUBPD_Vpd_Wpd = 0x660f7d;
+const UINT32 OP_HSUBPS_Vps_Wps = 0xf20f7d;
+const UINT32 OP_MOVD_Ed_Pd = 0x0f7e;
+const UINT32 OP_MOVD_Ed_Vd = 0x660f7e;
+const UINT32 OP_MOVQ_Vq_Wq = 0xf30f7e;
+const UINT32 OP_MOVQ_Qq_Pq = 0x0f7f;
+const UINT32 OP_MOVDQA_Wdq_Vdq = 0x660f7f;
+const UINT32 OP_MOVDQU_Wdq_Vdq = 0xf30f7f;
+
+const UINT32 OP_JCC_O_Jv = 0x0f80;
+const UINT32 OP_JCC_NO_Jv = 0x0f81;
+const UINT32 OP_JCC_B_Jv = 0x0f82;
+const UINT32 OP_JCC_C_Jv = 0x0f82;
+const UINT32 OP_JCC_NAE_Jv = 0x0f82;
+const UINT32 OP_JCC_AE_Jv = 0x0f83;
+const UINT32 OP_JCC_NB_Jv = 0x0f83;
+const UINT32 OP_JCC_NC_Jv = 0x0f83;
+const UINT32 OP_JCC_E_Jv = 0x0f84;
+const UINT32 OP_JCC_Z_Jv = 0x0f84;
+const UINT32 OP_JCC_NE_Jv = 0x0f85;
+const UINT32 OP_JCC_NZ_Jv = 0x0f85;
+const UINT32 OP_JCC_BE_Jv = 0x0f86;
+const UINT32 OP_JCC_NA_Jv = 0x0f86;
+const UINT32 OP_JCC_A_Jv = 0x0f87;
+const UINT32 OP_JCC_NBE_Jv = 0x0f87;
+const UINT32 OP_JCC_S_Jv = 0x0f88;
+const UINT32 OP_JCC_NS_Jv = 0x0f89;
+const UINT32 OP_JCC_P_Jv = 0x0f8a;
+const UINT32 OP_JCC_PE_Jv = 0x0f8a;
+const UINT32 OP_JCC_NP_Jv = 0x0f8b;
+const UINT32 OP_JCC_PO_Jv = 0x0f8b;
+const UINT32 OP_JCC_L_Jv = 0x0f8c;
+const UINT32 OP_JCC_NGE_Jv = 0x0f8c;
+const UINT32 OP_JCC_NL_Jv = 0x0f8d;
+const UINT32 OP_JCC_GE_Jv = 0x0f8d;
+const UINT32 OP_JCC_LE_Jv = 0x0f8e;
+const UINT32 OP_JCC_NG_Jv = 0x0f8e;
+const UINT32 OP_JCC_NLE_Jv = 0x0f8f;
+const UINT32 OP_JCC_G_Jv = 0x0f8f;
+
+const UINT32 OP_SETCC_O_Eb = (0x0f90 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NO_Eb = (0x0f91 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_B_Eb = (0x0f92 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_C_Eb = (0x0f92 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NAE_Eb = (0x0f92 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_AE_Eb = (0x0f93 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NB_Eb = (0x0f93 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NC_Eb = (0x0f93 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_E_Eb = (0x0f94 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_Z_Eb = (0x0f94 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NE_Eb = (0x0f95 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NZ_Eb = (0x0f95 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_BE_Eb = (0x0f96 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NA_Eb = (0x0f96 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_A_Eb = (0x0f97 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NBE_Eb = (0x0f97 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_S_Eb = (0x0f98 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NS_Eb = (0x0f99 | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_P_Eb = (0x0f9a | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_PE_Eb = (0x0f9a | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NP_Eb = (0x0f9b | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_PO_Eb = (0x0f9b | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_L_Eb = (0x0f9c | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NGE_Eb = (0x0f9c | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NL_Eb = (0x0f9d | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_GE_Eb = (0x0f9d | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_LE_Eb = (0x0f9e | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NG_Eb = (0x0f9e | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_NLE_Eb = (0x0f9f | OPFLAG_8BITRM);
+const UINT32 OP_SETCC_G_Eb = (0x0f9f | OPFLAG_8BITRM);
+
+const UINT32 OP_PUSH_FS = 0x0fa0;
+const UINT32 OP_POP_FS = 0x0fa1;
+const UINT32 OP_CPUID = 0x0fa2;
+const UINT32 OP_BT_Ev_Gv = 0x0fa3;
+const UINT32 OP_SHLD_Ev_Gv_Ib = 0x0fa4;
+const UINT32 OP_SHLD_Ev_Gv_CL = 0x0fa5;
+const UINT32 OP_PUSH_GS = 0x0fa8;
+const UINT32 OP_POP_GS = 0x0fa9;
+const UINT32 OP_RSM = 0x0faa;
+const UINT32 OP_BTS_Ev_Gv = 0x0fab;
+const UINT32 OP_SHRD_Ev_Gv_Ib = 0x0fac;
+const UINT32 OP_SHRD_Ev_Gv_CL = 0x0fad;
+const UINT32 OP_G16 = 0x0fae;
+const UINT32 OP_IMUL_Gv_Ev = 0x0faf;
+
+const UINT32 OP_CMPXCHG_Eb_Gb = (0x0fb0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_CMPXCHG_Ev_Gv = 0x0fb1;
+const UINT32 OP_LSS_Mp = 0x0fb2;
+const UINT32 OP_BTR_Ev_Gv = 0x0fb3;
+const UINT32 OP_LFS_Mp = 0x0fb4;
+const UINT32 OP_LGS_Mp = 0x0fb5;
+const UINT32 OP_MOVZX_Gv_Eb = (0x0fb6 | OPFLAG_8BITRM);
+const UINT32 OP_MOVZX_Gv_Ew = 0x0fb7;
+const UINT32 OP_JMPE = 0x0fb8;
+const UINT32 OP_POPCNT_Gv_Ev = 0xf30fb8;
+const UINT32 OP_G10_INVALID = 0x0fb9;
+const UINT32 OP_G8_Ev_Ib = 0x0fba;
+const UINT32 OP_BTC_Ev_Gv = 0x0fbb;
+const UINT32 OP_BSF_Gv_Ev = 0x0fbc;
+const UINT32 OP_BSR_Gv_Ev = 0x0fbd;
+const UINT32 OP_MOVSX_Gv_Eb = (0x0fbe | OPFLAG_8BITRM);
+const UINT32 OP_MOVSX_Gv_Ew = 0x0fbf;
+
+const UINT32 OP_XADD_Eb_Gb = (0x0fc0 | OPFLAG_8BITRM | OPFLAG_8BITREG);
+const UINT32 OP_XADD_Ev_Gv = 0x0fc1;
+const UINT32 OP_CMPPS_Vps_Wps_Ib = 0x0fc2;
+const UINT32 OP_CMPSS_Vss_Wss_Ib = 0xf30fc2;
+const UINT32 OP_CMPPD_Vpd_Wpd_Ib = 0x660fc2;
+const UINT32 OP_CMPSD_Vsd_Wsd_Ib = 0xf20fc2;
+const UINT32 OP_MOVNTI_Md_Gd = 0x0fc3;
+const UINT32 OP_PINSRW_Pw_Ew_Ib = 0x0fc4;
+const UINT32 OP_PINSRW_Vw_Ew_Ib = 0x660fc4;
+const UINT32 OP_PEXTRW_Gw_Pw_Ib = 0x0fc5;
+const UINT32 OP_PEXTRW_Gw_Vw_Ib = 0x660fc5;
+const UINT32 OP_SHUFPS_Vps_Wps_Ib = 0x0fc6;
+const UINT32 OP_SHUFPD_Vpd_Wpd_Ib = 0x660fc6;
+const UINT32 OP_G9 = 0x0fc7;
+const UINT32 OP_BSWAP_EAX = 0x0fc8;
+const UINT32 OP_BSWAP_ECX = 0x0fc9;
+const UINT32 OP_BSWAP_EDX = 0x0fca;
+const UINT32 OP_BSWAP_EBX = 0x0fcb;
+const UINT32 OP_BSWAP_ESP = 0x0fcc;
+const UINT32 OP_BSWAP_EBP = 0x0fcd;
+const UINT32 OP_BSWAP_ESI = 0x0fce;
+const UINT32 OP_BSWAP_EDI = 0x0fcf;
+
+const UINT32 OP_ADDSUBPD_Vpd_Wpd = 0x0fd0;
+const UINT32 OP_ADDSUBPS_Vps_Wps = 0xf20fd0;
+const UINT32 OP_PSRLW_Pq_Qq = 0x0fd1;
+const UINT32 OP_PSRLW_Vdq_Wdq = 0x660fd1;
+const UINT32 OP_PSRLD_Pq_Qq = 0x0fd2;
+const UINT32 OP_PSRLD_Vdq_Wdq = 0x660fd2;
+const UINT32 OP_PSRLQ_Pq_Qq = 0x0fd3;
+const UINT32 OP_PSRLQ_Vdq_Wdq = 0x660fd3;
+const UINT32 OP_PADDQ_Pq_Qq = 0x0fd4;
+const UINT32 OP_PADDQ_Vdq_Wdq = 0x660fd4;
+const UINT32 OP_PMULLW_Pq_Qq = 0x0fd5;
+const UINT32 OP_PMULLW_Vdq_Wdq = 0x660fd5;
+const UINT32 OP_MOVQ_Wq_Vq = 0x0fd6;
+const UINT32 OP_MOVQ2DQ_Vdq_Qq = 0xf30fd6;
+const UINT32 OP_MOVDQ2Q_Pq_Vq = 0xf20fd6;
+const UINT32 OP_PMOVMSKB_Gd_Pq = 0x0fd7;
+const UINT32 OP_PMOVMSKB_Gd_Vdq = 0x660fd7;
+const UINT32 OP_PSUBUSB_Pq_Qq = 0x0fd8;
+const UINT32 OP_PSUBUSB_Vdq_Wdq = 0x660fd8;
+const UINT32 OP_PSUBUSW_Pq_Qq = 0x0fd9;
+const UINT32 OP_PSUBUSW_Vdq_Wdq = 0x660fd9;
+const UINT32 OP_PMINUB_Pq_Qq = 0x0fda;
+const UINT32 OP_PMINUB_Vdq_Wdq = 0x660fda;
+const UINT32 OP_PAND_Pq_Qq = 0x0fdb;
+const UINT32 OP_PAND_Vdq_Wdq = 0x660fdb;
+const UINT32 OP_PADDUSB_Pq_Qq = 0x0fdc;
+const UINT32 OP_PADDUSB_Vdq_Wdq = 0x660fdc;
+const UINT32 OP_PADDUSW_Pq_Qq = 0x0fdd;
+const UINT32 OP_PADDUSW_Vdq_Wdq = 0x660fdd;
+const UINT32 OP_PMAXUB_Pq_Qq = 0x0fde;
+const UINT32 OP_PMAXUB_Vdq_Wdq = 0x660fde;
+const UINT32 OP_PANDN_Pq_Qq = 0x0fdf;
+const UINT32 OP_PANDN_Vdq_Wdq = 0x660fdf;
+
+const UINT32 OP_PAVGB_Pq_Qq = 0x0fe0;
+const UINT32 OP_PAVGB_Vdq_Wdq = 0x660fe0;
+const UINT32 OP_PSRAW_Pq_Qq = 0x0fe1;
+const UINT32 OP_PSRAW_Vdq_Wdq = 0x660fe1;
+const UINT32 OP_PSRAD_Pq_Qq = 0x0fe2;
+const UINT32 OP_PSRAD_Vdq_Wdq = 0x660fe2;
+const UINT32 OP_PAVGW_Pq_Qq = 0x0fe3;
+const UINT32 OP_PAVGW_Vdq_Wdq = 0x660fe3;
+const UINT32 OP_PMULHUW_Pq_Qq = 0x0fe4;
+const UINT32 OP_PMULHUW_Vdq_Wdq = 0x660fe4;
+const UINT32 OP_PMULHW_Pq_Qq = 0x0fe5;
+const UINT32 OP_PMULHW_Vdq_Wdq = 0x660fe5;
+const UINT32 OP_CVTPD2DQ_Vdq_Wpd = 0xf20fe6;
+const UINT32 OP_CVTTPD2DQ_Vdq_Wpd = 0x660fe6;
+const UINT32 OP_CVTDQ2PD_Vpd_Wq = 0xf30fe6;
+const UINT32 OP_MOVNTQ_Mq_Vq = 0x0fe7;
+const UINT32 OP_MOVNTDQ_Mdq_Vdq = 0x660fe7;
+const UINT32 OP_PSUBSB_Pq_Qq = 0x0fe8;
+const UINT32 OP_PSUBSB_Vdq_Wdq = 0x660fe8;
+const UINT32 OP_PSUBSW_Pq_Qq = 0x0fe9;
+const UINT32 OP_PSUBSW_Vdq_Wdq = 0x660fe9;
+const UINT32 OP_PMINSW_Pq_Qq = 0x0fea;
+const UINT32 OP_PMINSW_Vdq_Wdq = 0x660fea;
+const UINT32 OP_POR_Pq_Qq = 0x0feb;
+const UINT32 OP_POR_Vdq_Wdq = 0x660feb;
+const UINT32 OP_PADDSB_Pq_Qq = 0x0fec;
+const UINT32 OP_PADDSB_Vdq_Wdq = 0x660fec;
+const UINT32 OP_PADDSW_Pq_Qq = 0x0fed;
+const UINT32 OP_PADDSW_Vdq_Wdq = 0x660fed;
+const UINT32 OP_PMAXSW_Pq_Qq = 0x0fee;
+const UINT32 OP_PMAXSW_Vdq_Wdq = 0x660fee;
+const UINT32 OP_PXOR_Pq_Qq = 0x0fef;
+const UINT32 OP_PXOR_Vdq_Wdq = 0x660fef;
+
+const UINT32 OP_LDDQU_Vdq_Mdq = 0xf20ff0;
+const UINT32 OP_PSLLW_Pq_Qq = 0x0ff1;
+const UINT32 OP_PSLLW_Vdq_Wdq = 0x660ff1;
+const UINT32 OP_PSLLD_Pq_Qq = 0x0ff2;
+const UINT32 OP_PSLLD_Vdq_Wdq = 0x660ff2;
+const UINT32 OP_PSLLQ_Pq_Qq = 0x0ff3;
+const UINT32 OP_PSLLQ_Vdq_Wdq = 0x660ff3;
+const UINT32 OP_PMULUDQ_Pq_Qq = 0x0ff4;
+const UINT32 OP_PMULUDQ_Vdq_Wdq = 0x660ff4;
+const UINT32 OP_PMADDWD_Pq_Qq = 0x0ff5;
+const UINT32 OP_PMADDWD_Vdq_Wdq = 0x660ff5;
+const UINT32 OP_PSADBW_Pq_Qq = 0x0ff6;
+const UINT32 OP_PSADBW_Vdq_Wdq = 0x660ff6;
+const UINT32 OP_MASKMOVQ_Pq_Qq = 0x0ff7;
+const UINT32 OP_MASKMOVDQU_Vdq_Wdq = 0x660ff7;
+const UINT32 OP_PSUBB_Pq_Qq = 0x0ff8;
+const UINT32 OP_PSUBB_Vdq_Wdq = 0x660ff8;
+const UINT32 OP_PSUBW_Pq_Qq = 0x0ff9;
+const UINT32 OP_PSUBW_Vdq_Wdq = 0x660ff9;
+const UINT32 OP_PSUBD_Pq_Qq = 0x0ffa;
+const UINT32 OP_PSUBD_Vdq_Wdq = 0x660ffa;
+const UINT32 OP_PSUBQ_Pq_Qq = 0x0ffb;
+const UINT32 OP_PSUBQ_Vdq_Wdq = 0x660ffb;
+const UINT32 OP_PADDB_Pq_Qq = 0x0ffc;
+const UINT32 OP_PADDB_Vdq_Wdq = 0x660ffc;
+const UINT32 OP_PADDW_Pq_Qq = 0x0ffd;
+const UINT32 OP_PADDW_Vdq_Wdq = 0x660ffd;
+const UINT32 OP_PADDD_Pq_Qq = 0x0ffe;
+const UINT32 OP_PADDD_Vdq_Wdq = 0x660ffe;
// triple byte opcodes (0f 38)
-const UINT32 OP_PSHUFB_Pq_Qq = 0x0f3800;
-const UINT32 OP_PSHUFB_Vdq_Wdq = 0x660f3800;
-const UINT32 OP_PHADDW_Pq_Qq = 0x0f3801;
-const UINT32 OP_PHADDW_Vdq_Wdq = 0x660f3801;
-const UINT32 OP_PHADDD_Pq_Qq = 0x0f3802;
-const UINT32 OP_PHADDD_Vdq_Wdq = 0x660f3802;
-const UINT32 OP_PHADDSW_Pq_Qq = 0x0f3803;
-const UINT32 OP_PHADDSW_Vdq_Wdq = 0x660f3803;
-const UINT32 OP_PMADDUBSW_Pq_Qq = 0x0f3804;
-const UINT32 OP_PMADDUBSW_Vdq_Wdq = 0x660f3804;
-const UINT32 OP_PHSUBW_Pq_Qq = 0x0f3805;
-const UINT32 OP_PHSUBW_Vdq_Wdq = 0x660f3805;
-const UINT32 OP_PHSUBD_Pq_Qq = 0x0f3806;
-const UINT32 OP_PHSUBD_Vdq_Wdq = 0x660f3806;
-const UINT32 OP_PHSUBSW_Pq_Qq = 0x0f3807;
-const UINT32 OP_PHSUBSW_Vdq_Wdq = 0x660f3807;
-const UINT32 OP_PSIGNB_Pq_Qq = 0x0f3808;
-const UINT32 OP_PSIGNB_Vdq_Wdq = 0x660f3808;
-const UINT32 OP_PSIGNW_Pq_Qq = 0x0f3809;
-const UINT32 OP_PSIGNW_Vdq_Wdq = 0x660f3809;
-const UINT32 OP_PSIGND_Pq_Qq = 0x0f380a;
-const UINT32 OP_PSIGND_Vdq_Wdq = 0x660f380a;
-const UINT32 OP_PMULHRSW_Pq_Qq = 0x0f380b;
-const UINT32 OP_PMULHRSW_Vdq_Wdq = 0x660f380b;
-
-const UINT32 OP_PBLENDVB_Vdq_Wdq = 0x660f3810;
-const UINT32 OP_PBLENDVPS_Vdq_Wdq = 0x660f3814;
-const UINT32 OP_PBLENDVPD_Vdq_Wdq = 0x660f3815;
-const UINT32 OP_PTEST_Vdq_Wdq = 0x660f3817;
-const UINT32 OP_PABSB_Pq_Qq = 0x0f381c;
-const UINT32 OP_PABSB_Vdq_Wdq = 0x660f381c;
-const UINT32 OP_PABSW_Pq_Qq = 0x0f381d;
-const UINT32 OP_PABSW_Vdq_Wdq = 0x660f381d;
-const UINT32 OP_PABSD_Pq_Qq = 0x0f381e;
-const UINT32 OP_PABSD_Vdq_Wdq = 0x660f381e;
-
-const UINT32 OP_PMOVSXBW_Vdq_Udq = 0x660f3820;
-const UINT32 OP_PMOVSXBD_Vdq_Udq = 0x660f3821;
-const UINT32 OP_PMOVSXBQ_Vdq_Udq = 0x660f3822;
-const UINT32 OP_PMOVSXWD_Vdq_Udq = 0x660f3823;
-const UINT32 OP_PMOVSXWQ_Vdq_Udq = 0x660f3824;
-const UINT32 OP_PMOVSXDQ_Vdq_Udq = 0x660f3825;
-const UINT32 OP_PMULDQ_Vdq_Udq = 0x660f3828;
-const UINT32 OP_PCMPEQQ_Vdq_Udq = 0x660f3829;
-const UINT32 OP_MOVNTDQA_Vdq_Udq = 0x660f382a;
-const UINT32 OP_PACKUSDW_Vdq_Udq = 0x660f382b;
-
-const UINT32 OP_PMOVZXBW_Vdq_Udq = 0x660f3830;
-const UINT32 OP_PMOVZXBD_Vdq_Udq = 0x660f3831;
-const UINT32 OP_PMOVZXBQ_Vdq_Udq = 0x660f3832;
-const UINT32 OP_PMOVZXWD_Vdq_Udq = 0x660f3833;
-const UINT32 OP_PMOVZXWQ_Vdq_Udq = 0x660f3834;
-const UINT32 OP_PMOVZXDQ_Vdq_Udq = 0x660f3835;
-const UINT32 OP_PMINSB_Vdq_Udq = 0x660f3838;
-const UINT32 OP_PMINSD_Vdq_Udq = 0x660f3839;
-const UINT32 OP_PMINUW_Vdq_Udq = 0x660f383a;
-const UINT32 OP_PMINUD_Vdq_Udq = 0x660f383b;
-const UINT32 OP_PMAXSB_Vdq_Udq = 0x660f383c;
-const UINT32 OP_PMAXSD_Vdq_Udq = 0x660f383d;
-const UINT32 OP_PMAXUW_Vdq_Udq = 0x660f383e;
-const UINT32 OP_PMAXUD_Vdq_Udq = 0x660f383f;
-
-const UINT32 OP_MULLD_Vdq_Wdq = 0x660f3840;
-const UINT32 OP_PHMINPOSUW_Vdq_Wdq = 0x660f3841;
-
-const UINT32 OP_NVEPT_Gd_Mdq = 0x660f3880;
-const UINT32 OP_NVVPID_Gd_Mdq = 0x660f3881;
-
-const UINT32 OP_MOVBE_Gv_Mv = 0x0f38f0;
-const UINT32 OP_CRC32_Gd_Eb = 0xf20f38f0;
-const UINT32 OP_MOVBE_Mv_Gv = 0x0f38f1;
-const UINT32 OP_CRC32_Gd_Ev = 0xf20f38f1;
+const UINT32 OP_PSHUFB_Pq_Qq = 0x0f3800;
+const UINT32 OP_PSHUFB_Vdq_Wdq = 0x660f3800;
+const UINT32 OP_PHADDW_Pq_Qq = 0x0f3801;
+const UINT32 OP_PHADDW_Vdq_Wdq = 0x660f3801;
+const UINT32 OP_PHADDD_Pq_Qq = 0x0f3802;
+const UINT32 OP_PHADDD_Vdq_Wdq = 0x660f3802;
+const UINT32 OP_PHADDSW_Pq_Qq = 0x0f3803;
+const UINT32 OP_PHADDSW_Vdq_Wdq = 0x660f3803;
+const UINT32 OP_PMADDUBSW_Pq_Qq = 0x0f3804;
+const UINT32 OP_PMADDUBSW_Vdq_Wdq = 0x660f3804;
+const UINT32 OP_PHSUBW_Pq_Qq = 0x0f3805;
+const UINT32 OP_PHSUBW_Vdq_Wdq = 0x660f3805;
+const UINT32 OP_PHSUBD_Pq_Qq = 0x0f3806;
+const UINT32 OP_PHSUBD_Vdq_Wdq = 0x660f3806;
+const UINT32 OP_PHSUBSW_Pq_Qq = 0x0f3807;
+const UINT32 OP_PHSUBSW_Vdq_Wdq = 0x660f3807;
+const UINT32 OP_PSIGNB_Pq_Qq = 0x0f3808;
+const UINT32 OP_PSIGNB_Vdq_Wdq = 0x660f3808;
+const UINT32 OP_PSIGNW_Pq_Qq = 0x0f3809;
+const UINT32 OP_PSIGNW_Vdq_Wdq = 0x660f3809;
+const UINT32 OP_PSIGND_Pq_Qq = 0x0f380a;
+const UINT32 OP_PSIGND_Vdq_Wdq = 0x660f380a;
+const UINT32 OP_PMULHRSW_Pq_Qq = 0x0f380b;
+const UINT32 OP_PMULHRSW_Vdq_Wdq = 0x660f380b;
+
+const UINT32 OP_PBLENDVB_Vdq_Wdq = 0x660f3810;
+const UINT32 OP_PBLENDVPS_Vdq_Wdq = 0x660f3814;
+const UINT32 OP_PBLENDVPD_Vdq_Wdq = 0x660f3815;
+const UINT32 OP_PTEST_Vdq_Wdq = 0x660f3817;
+const UINT32 OP_PABSB_Pq_Qq = 0x0f381c;
+const UINT32 OP_PABSB_Vdq_Wdq = 0x660f381c;
+const UINT32 OP_PABSW_Pq_Qq = 0x0f381d;
+const UINT32 OP_PABSW_Vdq_Wdq = 0x660f381d;
+const UINT32 OP_PABSD_Pq_Qq = 0x0f381e;
+const UINT32 OP_PABSD_Vdq_Wdq = 0x660f381e;
+
+const UINT32 OP_PMOVSXBW_Vdq_Udq = 0x660f3820;
+const UINT32 OP_PMOVSXBD_Vdq_Udq = 0x660f3821;
+const UINT32 OP_PMOVSXBQ_Vdq_Udq = 0x660f3822;
+const UINT32 OP_PMOVSXWD_Vdq_Udq = 0x660f3823;
+const UINT32 OP_PMOVSXWQ_Vdq_Udq = 0x660f3824;
+const UINT32 OP_PMOVSXDQ_Vdq_Udq = 0x660f3825;
+const UINT32 OP_PMULDQ_Vdq_Udq = 0x660f3828;
+const UINT32 OP_PCMPEQQ_Vdq_Udq = 0x660f3829;
+const UINT32 OP_MOVNTDQA_Vdq_Udq = 0x660f382a;
+const UINT32 OP_PACKUSDW_Vdq_Udq = 0x660f382b;
+
+const UINT32 OP_PMOVZXBW_Vdq_Udq = 0x660f3830;
+const UINT32 OP_PMOVZXBD_Vdq_Udq = 0x660f3831;
+const UINT32 OP_PMOVZXBQ_Vdq_Udq = 0x660f3832;
+const UINT32 OP_PMOVZXWD_Vdq_Udq = 0x660f3833;
+const UINT32 OP_PMOVZXWQ_Vdq_Udq = 0x660f3834;
+const UINT32 OP_PMOVZXDQ_Vdq_Udq = 0x660f3835;
+const UINT32 OP_PMINSB_Vdq_Udq = 0x660f3838;
+const UINT32 OP_PMINSD_Vdq_Udq = 0x660f3839;
+const UINT32 OP_PMINUW_Vdq_Udq = 0x660f383a;
+const UINT32 OP_PMINUD_Vdq_Udq = 0x660f383b;
+const UINT32 OP_PMAXSB_Vdq_Udq = 0x660f383c;
+const UINT32 OP_PMAXSD_Vdq_Udq = 0x660f383d;
+const UINT32 OP_PMAXUW_Vdq_Udq = 0x660f383e;
+const UINT32 OP_PMAXUD_Vdq_Udq = 0x660f383f;
+
+const UINT32 OP_MULLD_Vdq_Wdq = 0x660f3840;
+const UINT32 OP_PHMINPOSUW_Vdq_Wdq = 0x660f3841;
+
+const UINT32 OP_NVEPT_Gd_Mdq = 0x660f3880;
+const UINT32 OP_NVVPID_Gd_Mdq = 0x660f3881;
+
+const UINT32 OP_MOVBE_Gv_Mv = 0x0f38f0;
+const UINT32 OP_CRC32_Gd_Eb = 0xf20f38f0;
+const UINT32 OP_MOVBE_Mv_Gv = 0x0f38f1;
+const UINT32 OP_CRC32_Gd_Ev = 0xf20f38f1;
// triple byte opcodes (0f 3a)
-const UINT32 OP_ROUNDPS_Vdq_Wdq_Ib = 0x660f3a08;
-const UINT32 OP_ROUNDPD_Vdq_Wdq_Ib = 0x660f3a09;
-const UINT32 OP_ROUNDSS_Vss_Wss_Ib = 0x660f3a0a;
-const UINT32 OP_ROUNDSD_Vsd_Wsd_Ib = 0x660f3a0b;
-const UINT32 OP_BLENDPS_Vdq_Wdq_Ib = 0x660f3a0c;
-const UINT32 OP_BLENDPD_Vdq_Wdq_Ib = 0x660f3a0d;
-const UINT32 OP_PBLENDW_Vdq_Wdq_Ib = 0x660f3a0e;
-const UINT32 OP_PALIGNR_Pq_Qq_Ib = 0x0f3a0f;
-const UINT32 OP_PALIGNR_Vdq_Wdq_Ib = 0x660f3a0f;
-
-const UINT32 OP_EXTRB_Rd_Vdq_Ib = 0x660f3a14;
-const UINT32 OP_EXTRW_Rd_Vdq_Ib = 0x660f3a15;
-const UINT32 OP_EXTRD_Rd_Vdq_Ib = 0x660f3a16;
-const UINT32 OP_EXTRACTPS_Ed_Vdq_Ib = 0x660f3a17;
-
-const UINT32 OP_PINSRB_Vdq_Rd_Ib = 0x660f3a20;
-const UINT32 OP_INSERTPS_Vdq_Udq_Ib = 0x660f3a21;
-const UINT32 OP_PINSRD_Vdq_Ed_Ib = 0x660f3a22;
-
-const UINT32 OP_DPPS_Vdq_Wdq_Ib = 0x660f3a40;
-const UINT32 OP_DPPD_Vdq_Wdq_Ib = 0x660f3a41;
-const UINT32 OP_MPSADBW_Vdq_Wdq_Ib = 0x660f3a42;
-
-const UINT32 OP_PCMPESTRM_Vdq_Wdq_Ib = 0x660f3a60;
-const UINT32 OP_PCMPESTRI_Vdq_Wdq_Ib = 0x660f3a61;
-const UINT32 OP_PCMPISTRM_Vdq_Wdq_Ib = 0x660f3a62;
-const UINT32 OP_PCMPISTRI_Vdq_Wdq_Ib = 0x660f3a63;
+const UINT32 OP_ROUNDPS_Vdq_Wdq_Ib = 0x660f3a08;
+const UINT32 OP_ROUNDPD_Vdq_Wdq_Ib = 0x660f3a09;
+const UINT32 OP_ROUNDSS_Vss_Wss_Ib = 0x660f3a0a;
+const UINT32 OP_ROUNDSD_Vsd_Wsd_Ib = 0x660f3a0b;
+const UINT32 OP_BLENDPS_Vdq_Wdq_Ib = 0x660f3a0c;
+const UINT32 OP_BLENDPD_Vdq_Wdq_Ib = 0x660f3a0d;
+const UINT32 OP_PBLENDW_Vdq_Wdq_Ib = 0x660f3a0e;
+const UINT32 OP_PALIGNR_Pq_Qq_Ib = 0x0f3a0f;
+const UINT32 OP_PALIGNR_Vdq_Wdq_Ib = 0x660f3a0f;
+
+const UINT32 OP_EXTRB_Rd_Vdq_Ib = 0x660f3a14;
+const UINT32 OP_EXTRW_Rd_Vdq_Ib = 0x660f3a15;
+const UINT32 OP_EXTRD_Rd_Vdq_Ib = 0x660f3a16;
+const UINT32 OP_EXTRACTPS_Ed_Vdq_Ib = 0x660f3a17;
+
+const UINT32 OP_PINSRB_Vdq_Rd_Ib = 0x660f3a20;
+const UINT32 OP_INSERTPS_Vdq_Udq_Ib = 0x660f3a21;
+const UINT32 OP_PINSRD_Vdq_Ed_Ib = 0x660f3a22;
+
+const UINT32 OP_DPPS_Vdq_Wdq_Ib = 0x660f3a40;
+const UINT32 OP_DPPD_Vdq_Wdq_Ib = 0x660f3a41;
+const UINT32 OP_MPSADBW_Vdq_Wdq_Ib = 0x660f3a42;
+
+const UINT32 OP_PCMPESTRM_Vdq_Wdq_Ib = 0x660f3a60;
+const UINT32 OP_PCMPESTRI_Vdq_Wdq_Ib = 0x660f3a61;
+const UINT32 OP_PCMPISTRM_Vdq_Wdq_Ib = 0x660f3a62;
+const UINT32 OP_PCMPISTRI_Vdq_Wdq_Ib = 0x660f3a63;
// floating point opcodes
-const UINT32 OP_FADD_ST0_STn = 0xd8c0;
-const UINT32 OP_FMUL_ST0_STn = 0xd8c8;
-const UINT32 OP_FCOM_ST0_STn = 0xd8d0;
-const UINT32 OP_FCOMP_ST0_STn = 0xd8d8;
-const UINT32 OP_FSUB_ST0_STn = 0xd8e0;
-const UINT32 OP_FSUBR_ST0_STn = 0xd8e8;
-const UINT32 OP_FDIV_ST0_STn = 0xd8f0;
-const UINT32 OP_FDIVR_ST0_STn = 0xd8f8;
-const UINT32 OP_FLD_ST0_STn = 0xd9c0;
-const UINT32 OP_FXCH_ST0_STn = 0xd9c8;
-const UINT32 OP_FNOP = 0xd9d0;
-const UINT32 OP_FCHS = 0xd9e0;
-const UINT32 OP_FABS = 0xd9e1;
-const UINT32 OP_FTST = 0xd9e4;
-const UINT32 OP_FXAM = 0xd9e5;
-const UINT32 OP_FLD1 = 0xd9e8;
-const UINT32 OP_FLDL2T = 0xd9e9;
-const UINT32 OP_FLDL2E = 0xd9ea;
-const UINT32 OP_FLDPI = 0xd9eb;
-const UINT32 OP_FLDLG2 = 0xd9ec;
-const UINT32 OP_FLDLN2 = 0xd9ed;
-const UINT32 OP_FLDZ = 0xd9ee;
-const UINT32 OP_F2XM1 = 0xd9f0;
-const UINT32 OP_FYL2X = 0xd9f1;
-const UINT32 OP_FPTAN = 0xd9f2;
-const UINT32 OP_FPATAN = 0xd9f3;
-const UINT32 OP_FXTRACT = 0xd9f4;
-const UINT32 OP_FPREM1 = 0xd9f5;
-const UINT32 OP_FDECSTP = 0xd9f6;
-const UINT32 OP_FINCSTP = 0xd9f7;
-const UINT32 OP_FPREM = 0xd9f8;
-const UINT32 OP_FYL2XP1 = 0xd9f9;
-const UINT32 OP_FSQRT = 0xd9fa;
-const UINT32 OP_FSINCOS = 0xd9fb;
-const UINT32 OP_FRNDINT = 0xd9fc;
-const UINT32 OP_FSCALE = 0xd9fd;
-const UINT32 OP_FSIN = 0xd9fe;
-const UINT32 OP_FCOS = 0xd9ff;
-const UINT32 OP_FCMOVB_ST0_STn = 0xdac0;
-const UINT32 OP_FCMOVE_ST0_STn = 0xdac8;
-const UINT32 OP_FCMOVBE_ST0_STn = 0xdad0;
-const UINT32 OP_FCMOVU_ST0_STn = 0xdad8;
-const UINT32 OP_FUCOMPP = 0xdae9;
-const UINT32 OP_FCMOVNB_ST0_STn = 0xdbc0;
-const UINT32 OP_FCMOVNE_ST0_STn = 0xdbc8;
-const UINT32 OP_FCMOVNBE_ST0_STn = 0xdbd0;
-const UINT32 OP_FCMOVNU_ST0_STn = 0xdbd8;
-const UINT32 OP_FCLEX = 0xdbe2;
-const UINT32 OP_FINIT = 0xdbe3;
-const UINT32 OP_FUCOMI_ST0_STn = 0xdbe8;
-const UINT32 OP_FCOMI_ST0_STn = 0xdbf0;
-const UINT32 OP_FADD_STn_ST0 = 0xdcc0;
-const UINT32 OP_FMUL_STn_ST0 = 0xdcc8;
-const UINT32 OP_FSUBR_STn_ST0 = 0xdce0;
-const UINT32 OP_FSUB_STn_ST0 = 0xdce8;
-const UINT32 OP_FDIVR_STn_ST0 = 0xdcf0;
-const UINT32 OP_FDIV_STn_ST0 = 0xdcf8;
-const UINT32 OP_FFREE_STn = 0xddc0;
-const UINT32 OP_FST_STn = 0xddd0;
-const UINT32 OP_FSTP_STn = 0xddd8;
-const UINT32 OP_FUCOM_STn_ST0 = 0xdde0;
-const UINT32 OP_FUCOMP_STn = 0xdde8;
-const UINT32 OP_FADDP_STn_ST0 = 0xdec0;
-const UINT32 OP_FMULP_STn_ST0 = 0xdec8;
-const UINT32 OP_FCOMPP = 0xded9;
-const UINT32 OP_FSUBRP_STn_ST0 = 0xdee0;
-const UINT32 OP_FSUBP_STn_ST0 = 0xdee8;
-const UINT32 OP_FDIVRP_STn_ST0 = 0xdef0;
-const UINT32 OP_FDIVP_STn_ST0 = 0xdef8;
-const UINT32 OP_FSTSW_AX = 0xdfe0;
-const UINT32 OP_FCOMIP_ST0_STn = 0xdff0;
+const UINT32 OP_FADD_ST0_STn = 0xd8c0;
+const UINT32 OP_FMUL_ST0_STn = 0xd8c8;
+const UINT32 OP_FCOM_ST0_STn = 0xd8d0;
+const UINT32 OP_FCOMP_ST0_STn = 0xd8d8;
+const UINT32 OP_FSUB_ST0_STn = 0xd8e0;
+const UINT32 OP_FSUBR_ST0_STn = 0xd8e8;
+const UINT32 OP_FDIV_ST0_STn = 0xd8f0;
+const UINT32 OP_FDIVR_ST0_STn = 0xd8f8;
+const UINT32 OP_FLD_ST0_STn = 0xd9c0;
+const UINT32 OP_FXCH_ST0_STn = 0xd9c8;
+const UINT32 OP_FNOP = 0xd9d0;
+const UINT32 OP_FCHS = 0xd9e0;
+const UINT32 OP_FABS = 0xd9e1;
+const UINT32 OP_FTST = 0xd9e4;
+const UINT32 OP_FXAM = 0xd9e5;
+const UINT32 OP_FLD1 = 0xd9e8;
+const UINT32 OP_FLDL2T = 0xd9e9;
+const UINT32 OP_FLDL2E = 0xd9ea;
+const UINT32 OP_FLDPI = 0xd9eb;
+const UINT32 OP_FLDLG2 = 0xd9ec;
+const UINT32 OP_FLDLN2 = 0xd9ed;
+const UINT32 OP_FLDZ = 0xd9ee;
+const UINT32 OP_F2XM1 = 0xd9f0;
+const UINT32 OP_FYL2X = 0xd9f1;
+const UINT32 OP_FPTAN = 0xd9f2;
+const UINT32 OP_FPATAN = 0xd9f3;
+const UINT32 OP_FXTRACT = 0xd9f4;
+const UINT32 OP_FPREM1 = 0xd9f5;
+const UINT32 OP_FDECSTP = 0xd9f6;
+const UINT32 OP_FINCSTP = 0xd9f7;
+const UINT32 OP_FPREM = 0xd9f8;
+const UINT32 OP_FYL2XP1 = 0xd9f9;
+const UINT32 OP_FSQRT = 0xd9fa;
+const UINT32 OP_FSINCOS = 0xd9fb;
+const UINT32 OP_FRNDINT = 0xd9fc;
+const UINT32 OP_FSCALE = 0xd9fd;
+const UINT32 OP_FSIN = 0xd9fe;
+const UINT32 OP_FCOS = 0xd9ff;
+const UINT32 OP_FCMOVB_ST0_STn = 0xdac0;
+const UINT32 OP_FCMOVE_ST0_STn = 0xdac8;
+const UINT32 OP_FCMOVBE_ST0_STn = 0xdad0;
+const UINT32 OP_FCMOVU_ST0_STn = 0xdad8;
+const UINT32 OP_FUCOMPP = 0xdae9;
+const UINT32 OP_FCMOVNB_ST0_STn = 0xdbc0;
+const UINT32 OP_FCMOVNE_ST0_STn = 0xdbc8;
+const UINT32 OP_FCMOVNBE_ST0_STn = 0xdbd0;
+const UINT32 OP_FCMOVNU_ST0_STn = 0xdbd8;
+const UINT32 OP_FCLEX = 0xdbe2;
+const UINT32 OP_FINIT = 0xdbe3;
+const UINT32 OP_FUCOMI_ST0_STn = 0xdbe8;
+const UINT32 OP_FCOMI_ST0_STn = 0xdbf0;
+const UINT32 OP_FADD_STn_ST0 = 0xdcc0;
+const UINT32 OP_FMUL_STn_ST0 = 0xdcc8;
+const UINT32 OP_FSUBR_STn_ST0 = 0xdce0;
+const UINT32 OP_FSUB_STn_ST0 = 0xdce8;
+const UINT32 OP_FDIVR_STn_ST0 = 0xdcf0;
+const UINT32 OP_FDIV_STn_ST0 = 0xdcf8;
+const UINT32 OP_FFREE_STn = 0xddc0;
+const UINT32 OP_FST_STn = 0xddd0;
+const UINT32 OP_FSTP_STn = 0xddd8;
+const UINT32 OP_FUCOM_STn_ST0 = 0xdde0;
+const UINT32 OP_FUCOMP_STn = 0xdde8;
+const UINT32 OP_FADDP_STn_ST0 = 0xdec0;
+const UINT32 OP_FMULP_STn_ST0 = 0xdec8;
+const UINT32 OP_FCOMPP = 0xded9;
+const UINT32 OP_FSUBRP_STn_ST0 = 0xdee0;
+const UINT32 OP_FSUBP_STn_ST0 = 0xdee8;
+const UINT32 OP_FDIVRP_STn_ST0 = 0xdef0;
+const UINT32 OP_FDIVP_STn_ST0 = 0xdef8;
+const UINT32 OP_FSTSW_AX = 0xdfe0;
+const UINT32 OP_FCOMIP_ST0_STn = 0xdff0;
@@ -1805,15 +1805,15 @@ inline void emit_jrcxz(x86code *&emitptr, x86code *target)
//-------------------------------------------------
#if (X86EMIT_SIZE == 32)
-inline void emit_call_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
-inline void emit_call_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 2, memref); }
-inline void emit_jmp_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
-inline void emit_jmp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 4, memref); }
+inline void emit_call_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
+inline void emit_call_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 2, memref); }
+inline void emit_jmp_r32(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
+inline void emit_jmp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 4, memref); }
#else
-inline void emit_call_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
-inline void emit_call_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 2, memref); }
-inline void emit_jmp_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
-inline void emit_jmp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 4, memref); }
+inline void emit_call_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 2, dreg); }
+inline void emit_call_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 2, memref); }
+inline void emit_jmp_r64(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G5, OP_32BIT, 4, dreg); }
+inline void emit_jmp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 4, memref); }
#endif
@@ -1849,17 +1849,17 @@ inline void emit_push_imm(x86code *&emitptr, INT32 imm)
#if (X86EMIT_SIZE == 32)
-inline void emit_push_r32(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
-inline void emit_push_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 6, memref); }
-inline void emit_pop_r32(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
-inline void emit_pop_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G1A_Ev, OP_32BIT, 0, memref); }
+inline void emit_push_r32(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_push_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 6, memref); }
+inline void emit_pop_r32(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_pop_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G1A_Ev, OP_32BIT, 0, memref); }
#else
-inline void emit_push_r64(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
-inline void emit_push_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 6, memref); }
-inline void emit_pop_r64(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
-inline void emit_pop_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G1A_Ev, OP_32BIT, 0, memref); }
+inline void emit_push_r64(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_PUSH_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_push_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G5, OP_32BIT, 6, memref); }
+inline void emit_pop_r64(x86code *&emitptr, UINT8 reg) { emit_op_reg(emitptr, OP_POP_rAX + (reg & 7), OP_32BIT, reg); }
+inline void emit_pop_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G1A_Ev, OP_32BIT, 0, memref); }
#endif
@@ -1879,10 +1879,10 @@ inline void emit_mov_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm)
emit_byte(emitptr, imm);
}
-inline void emit_mov_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_mov_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_mov_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Eb_Gb, OP_32BIT, sreg, memref); }
-inline void emit_mov_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G11_Eb_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_mov_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_mov_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_mov_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Eb_Gb, OP_32BIT, sreg, memref); }
+inline void emit_mov_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G11_Eb_Ib, OP_32BIT, 0, memref, imm); }
//-------------------------------------------------
@@ -1910,16 +1910,16 @@ inline void emit_mov_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm)
emit_word(emitptr, imm);
}
-inline void emit_mov_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_mov_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_mov_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm16(emitptr, OP_G11_Ev_Iz, OP_16BIT, 0, memref, imm); }
-inline void emit_mov_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_16BIT, sreg, memref); }
-inline void emit_movsx_r16_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, sreg); }
-inline void emit_movsx_r16_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, memref); }
-inline void emit_movzx_r16_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, sreg); }
-inline void emit_movzx_r16_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, memref); }
-inline void emit_cmovcc_r16_r16(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, sreg); }
-inline void emit_cmovcc_r16_m16(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, memref); }
+inline void emit_mov_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_mov_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_mov_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm16(emitptr, OP_G11_Ev_Iz, OP_16BIT, 0, memref, imm); }
+inline void emit_mov_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_movsx_r16_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, sreg); }
+inline void emit_movsx_r16_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_16BIT, dreg, memref); }
+inline void emit_movzx_r16_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, sreg); }
+inline void emit_movzx_r16_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_16BIT, dreg, memref); }
+inline void emit_cmovcc_r16_r16(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, sreg); }
+inline void emit_cmovcc_r16_m16(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_16BIT, dreg, memref); }
//-------------------------------------------------
@@ -1947,31 +1947,31 @@ inline void emit_mov_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm)
emit_dword(emitptr, imm);
}
-inline void emit_mov_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_mov_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_mov_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_32BIT, 0, memref, imm); }
-inline void emit_mov_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_32BIT, sreg, memref); }
-inline void emit_movsx_r32_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_movsx_r32_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, memref); }
-inline void emit_movsx_r32_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, sreg); }
-inline void emit_movsx_r32_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, memref); }
+inline void emit_mov_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_mov_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_mov_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_32BIT, 0, memref, imm); }
+inline void emit_mov_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_movsx_r32_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_movsx_r32_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_32BIT, dreg, memref); }
+inline void emit_movsx_r32_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, sreg); }
+inline void emit_movsx_r32_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_32BIT, dreg, memref); }
inline void emit_movzx_r32_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
{
#if (X86EMIT_SIZE == 32)
if (sreg >= 4)
{
- emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg); // mov dreg,sreg
- emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, 0xff); // and dreg,0xff
+ emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_32BIT, dreg, sreg); // mov dreg,sreg
+ emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, 0xff); // and dreg,0xff
}
else
#endif
emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, sreg);
}
-inline void emit_movzx_r32_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, memref); }
-inline void emit_movzx_r32_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, sreg); }
-inline void emit_movzx_r32_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, memref); }
-inline void emit_cmovcc_r32_r32(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, sreg); }
-inline void emit_cmovcc_r32_m32(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, memref); }
+inline void emit_movzx_r32_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_32BIT, dreg, memref); }
+inline void emit_movzx_r32_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, sreg); }
+inline void emit_movzx_r32_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_32BIT, dreg, memref); }
+inline void emit_cmovcc_r32_r32(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, sreg); }
+inline void emit_cmovcc_r32_m32(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_32BIT, dreg, memref); }
//-------------------------------------------------
@@ -2011,22 +2011,22 @@ inline void emit_mov_r64_imm(x86code *&emitptr, UINT8 dreg, UINT64 imm)
}
}
-inline void emit_mov_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_mov_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_mov_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_64BIT, 0, memref, imm); }
-inline void emit_mov_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_64BIT, sreg, memref); }
-inline void emit_movsx_r64_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, sreg); }
-inline void emit_movsx_r64_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, memref); }
-inline void emit_movsx_r64_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, sreg); }
-inline void emit_movsx_r64_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, memref); }
-inline void emit_movsxd_r64_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_movsxd_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_movzx_r64_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, sreg); }
-inline void emit_movzx_r64_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, memref); }
-inline void emit_movzx_r64_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, sreg); }
-inline void emit_movzx_r64_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, memref); }
-inline void emit_cmovcc_r64_r64(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, sreg); }
-inline void emit_cmovcc_r64_m64(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, memref); }
+inline void emit_mov_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_mov_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOV_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_mov_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G11_Ev_Iz, OP_64BIT, 0, memref, imm); }
+inline void emit_mov_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOV_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_movsx_r64_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, sreg); }
+inline void emit_movsx_r64_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Eb, OP_64BIT, dreg, memref); }
+inline void emit_movsx_r64_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, sreg); }
+inline void emit_movsx_r64_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSX_Gv_Ew, OP_64BIT, dreg, memref); }
+inline void emit_movsxd_r64_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_movsxd_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSXD_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_movzx_r64_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, sreg); }
+inline void emit_movzx_r64_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Eb, OP_64BIT, dreg, memref); }
+inline void emit_movzx_r64_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, sreg); }
+inline void emit_movzx_r64_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVZX_Gv_Ew, OP_64BIT, dreg, memref); }
+inline void emit_cmovcc_r64_r64(x86code *&emitptr, UINT8 cond, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, sreg); }
+inline void emit_cmovcc_r64_m64(x86code *&emitptr, UINT8 cond, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMOV_O_Gv_Ev + cond, OP_64BIT, dreg, memref); }
//-------------------------------------------------
@@ -2054,174 +2054,174 @@ inline void emit_xchg_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg)
// emit_arith_r8_*
//-------------------------------------------------
-inline void emit_add_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, dreg, imm); }
-inline void emit_add_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, memref, imm); }
-inline void emit_add_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_add_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_add_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_or_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, dreg, imm); }
-inline void emit_or_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, memref, imm); }
-inline void emit_or_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_or_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_or_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_adc_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, dreg, imm); }
-inline void emit_adc_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, memref, imm); }
-inline void emit_adc_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_adc_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_adc_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_sbb_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, dreg, imm); }
-inline void emit_sbb_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, memref, imm); }
-inline void emit_sbb_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_sbb_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_sbb_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_and_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, dreg, imm); }
-inline void emit_and_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, memref, imm); }
-inline void emit_and_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_and_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_and_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_sub_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, dreg, imm); }
-inline void emit_sub_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, memref, imm); }
-inline void emit_sub_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_sub_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_sub_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_xor_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, dreg, imm); }
-inline void emit_xor_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, memref, imm); }
-inline void emit_xor_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_xor_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_xor_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_cmp_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, dreg, imm); }
-inline void emit_cmp_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, memref, imm); }
-inline void emit_cmp_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, sreg); }
-inline void emit_cmp_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, memref); }
-inline void emit_cmp_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Eb_Gb, OP_32BIT, sreg, memref); }
-
-inline void emit_test_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, dreg, imm); }
-inline void emit_test_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, memref, imm); }
-inline void emit_test_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, dreg); }
-inline void emit_test_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, memref); }
+inline void emit_add_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, dreg, imm); }
+inline void emit_add_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_add_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_add_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_add_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_or_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, dreg, imm); }
+inline void emit_or_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 1, memref, imm); }
+inline void emit_or_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_or_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_or_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_adc_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, dreg, imm); }
+inline void emit_adc_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 2, memref, imm); }
+inline void emit_adc_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_adc_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_adc_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_sbb_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, dreg, imm); }
+inline void emit_sbb_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 3, memref, imm); }
+inline void emit_sbb_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_sbb_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_sbb_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_and_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, dreg, imm); }
+inline void emit_and_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 4, memref, imm); }
+inline void emit_and_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_and_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_and_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_sub_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, dreg, imm); }
+inline void emit_sub_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 5, memref, imm); }
+inline void emit_sub_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_sub_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_sub_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_xor_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, dreg, imm); }
+inline void emit_xor_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 6, memref, imm); }
+inline void emit_xor_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_xor_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_xor_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_cmp_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, dreg, imm); }
+inline void emit_cmp_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G1_Eb_Ib, OP_32BIT, 7, memref, imm); }
+inline void emit_cmp_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, sreg); }
+inline void emit_cmp_r8_m8(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gb_Eb, OP_32BIT, dreg, memref); }
+inline void emit_cmp_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Eb_Gb, OP_32BIT, sreg, memref); }
+
+inline void emit_test_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, dreg, imm); }
+inline void emit_test_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_G3_Eb, OP_32BIT, 0, memref, imm); }
+inline void emit_test_r8_r8(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, dreg); }
+inline void emit_test_m8_r8(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Eb_Gb, OP_32BIT, sreg, memref); }
//-------------------------------------------------
// emit_arith_r16_*
//-------------------------------------------------
-inline void emit_add_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, dreg, imm); }
-inline void emit_add_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, memref, imm); }
-inline void emit_add_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_add_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_add_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_or_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, dreg, imm); }
-inline void emit_or_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, memref, imm); }
-inline void emit_or_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_or_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_or_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_adc_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, dreg, imm); }
-inline void emit_adc_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, memref, imm); }
-inline void emit_adc_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_adc_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_adc_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_sbb_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, dreg, imm); }
-inline void emit_sbb_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, memref, imm); }
-inline void emit_sbb_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_sbb_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_sbb_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_and_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, dreg, imm); }
-inline void emit_and_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, memref, imm); }
-inline void emit_and_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_and_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_and_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_sub_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, dreg, imm); }
-inline void emit_sub_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, memref, imm); }
-inline void emit_sub_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_sub_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_sub_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_xor_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, dreg, imm); }
-inline void emit_xor_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, memref, imm); }
-inline void emit_xor_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_xor_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_xor_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_cmp_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, dreg, imm); }
-inline void emit_cmp_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, memref, imm); }
-inline void emit_cmp_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_cmp_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_cmp_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_16BIT, sreg, memref); }
-
-inline void emit_test_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, dreg, imm); }
-inline void emit_test_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, memref, imm); }
-inline void emit_test_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, dreg); }
-inline void emit_test_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, memref); }
+inline void emit_add_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, dreg, imm); }
+inline void emit_add_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 0, memref, imm); }
+inline void emit_add_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_add_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_add_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_or_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, dreg, imm); }
+inline void emit_or_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 1, memref, imm); }
+inline void emit_or_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_or_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_or_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_adc_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, dreg, imm); }
+inline void emit_adc_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 2, memref, imm); }
+inline void emit_adc_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_adc_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_adc_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_sbb_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, dreg, imm); }
+inline void emit_sbb_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 3, memref, imm); }
+inline void emit_sbb_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_sbb_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_sbb_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_and_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, dreg, imm); }
+inline void emit_and_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 4, memref, imm); }
+inline void emit_and_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_and_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_and_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_sub_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, dreg, imm); }
+inline void emit_sub_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 5, memref, imm); }
+inline void emit_sub_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_sub_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_sub_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_xor_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, dreg, imm); }
+inline void emit_xor_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 6, memref, imm); }
+inline void emit_xor_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_xor_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_xor_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_cmp_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, dreg, imm); }
+inline void emit_cmp_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_16BIT, 7, memref, imm); }
+inline void emit_cmp_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_cmp_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_cmp_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_16BIT, sreg, memref); }
+
+inline void emit_test_r16_imm(x86code *&emitptr, UINT8 dreg, UINT16 imm) { emit_op_modrm_reg_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, dreg, imm); }
+inline void emit_test_m16_imm(x86code *&emitptr, x86_memref memref, UINT16 imm) { emit_op_modrm_mem_imm16(emitptr, OP_G3_Ev, OP_16BIT, 0, memref, imm); }
+inline void emit_test_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, dreg); }
+inline void emit_test_m16_r16(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_16BIT, sreg, memref); }
//-------------------------------------------------
// emit_arith_r32_*
//-------------------------------------------------
-inline void emit_add_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, dreg, imm); }
-inline void emit_add_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, memref, imm); }
-inline void emit_add_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_add_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_add_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_or_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, dreg, imm); }
-inline void emit_or_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, memref, imm); }
-inline void emit_or_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_or_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_or_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_adc_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, dreg, imm); }
-inline void emit_adc_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, memref, imm); }
-inline void emit_adc_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_adc_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_adc_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_sbb_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, dreg, imm); }
-inline void emit_sbb_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, memref, imm); }
-inline void emit_sbb_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_sbb_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_sbb_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_and_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, imm); }
-inline void emit_and_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, memref, imm); }
-inline void emit_and_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_and_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_and_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_sub_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, dreg, imm); }
-inline void emit_sub_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, memref, imm); }
-inline void emit_sub_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_sub_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_sub_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_xor_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, dreg, imm); }
-inline void emit_xor_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, memref, imm); }
-inline void emit_xor_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_xor_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_xor_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_cmp_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, dreg, imm); }
-inline void emit_cmp_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, memref, imm); }
-inline void emit_cmp_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_cmp_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_cmp_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_32BIT, sreg, memref); }
-
-inline void emit_test_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, dreg, imm); }
-inline void emit_test_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, memref, imm); }
-inline void emit_test_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, dreg); }
-inline void emit_test_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, memref); }
+inline void emit_add_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, dreg, imm); }
+inline void emit_add_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 0, memref, imm); }
+inline void emit_add_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_add_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_add_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_or_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, dreg, imm); }
+inline void emit_or_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 1, memref, imm); }
+inline void emit_or_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_or_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_or_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_adc_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, dreg, imm); }
+inline void emit_adc_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 2, memref, imm); }
+inline void emit_adc_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_adc_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_adc_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_sbb_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, dreg, imm); }
+inline void emit_sbb_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 3, memref, imm); }
+inline void emit_sbb_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_sbb_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_sbb_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_and_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, dreg, imm); }
+inline void emit_and_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 4, memref, imm); }
+inline void emit_and_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_and_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_and_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_sub_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, dreg, imm); }
+inline void emit_sub_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 5, memref, imm); }
+inline void emit_sub_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_sub_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_sub_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_xor_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, dreg, imm); }
+inline void emit_xor_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 6, memref, imm); }
+inline void emit_xor_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_xor_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_xor_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_cmp_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, dreg, imm); }
+inline void emit_cmp_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_32BIT, 7, memref, imm); }
+inline void emit_cmp_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_cmp_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_cmp_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_32BIT, sreg, memref); }
+
+inline void emit_test_r32_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, dreg, imm); }
+inline void emit_test_m32_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_32BIT, 0, memref, imm); }
+inline void emit_test_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, dreg); }
+inline void emit_test_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_32BIT, sreg, memref); }
//-------------------------------------------------
@@ -2230,58 +2230,58 @@ inline void emit_test_m32_r32(x86code *&emitptr, x86_memref memref, UINT8 sreg)
#if (X86EMIT_SIZE == 64)
-inline void emit_add_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, dreg, imm); }
-inline void emit_add_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, memref, imm); }
-inline void emit_add_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_add_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_add_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_or_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, dreg, imm); }
-inline void emit_or_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, memref, imm); }
-inline void emit_or_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_or_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_or_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_adc_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, dreg, imm); }
-inline void emit_adc_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, memref, imm); }
-inline void emit_adc_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_adc_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_adc_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_sbb_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, dreg, imm); }
-inline void emit_sbb_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, memref, imm); }
-inline void emit_sbb_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_sbb_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_sbb_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_and_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, dreg, imm); }
-inline void emit_and_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, memref, imm); }
-inline void emit_and_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_and_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_and_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_sub_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, dreg, imm); }
-inline void emit_sub_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, memref, imm); }
-inline void emit_sub_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_sub_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_sub_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_xor_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, dreg, imm); }
-inline void emit_xor_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, memref, imm); }
-inline void emit_xor_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_xor_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_xor_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_cmp_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, dreg, imm); }
-inline void emit_cmp_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, memref, imm); }
-inline void emit_cmp_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_cmp_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_cmp_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_64BIT, sreg, memref); }
-
-inline void emit_test_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, dreg, imm); }
-inline void emit_test_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, memref, imm); }
-inline void emit_test_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, dreg); }
-inline void emit_test_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, memref); }
+inline void emit_add_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, dreg, imm); }
+inline void emit_add_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 0, memref, imm); }
+inline void emit_add_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_add_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADD_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_add_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADD_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_or_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, dreg, imm); }
+inline void emit_or_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 1, memref, imm); }
+inline void emit_or_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_or_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_OR_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_or_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_OR_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_adc_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, dreg, imm); }
+inline void emit_adc_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 2, memref, imm); }
+inline void emit_adc_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_adc_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADC_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_adc_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_ADC_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_sbb_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, dreg, imm); }
+inline void emit_sbb_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 3, memref, imm); }
+inline void emit_sbb_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_sbb_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SBB_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_sbb_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SBB_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_and_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, dreg, imm); }
+inline void emit_and_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 4, memref, imm); }
+inline void emit_and_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_and_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_AND_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_and_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_AND_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_sub_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, dreg, imm); }
+inline void emit_sub_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 5, memref, imm); }
+inline void emit_sub_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_sub_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUB_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_sub_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SUB_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_xor_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, dreg, imm); }
+inline void emit_xor_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 6, memref, imm); }
+inline void emit_xor_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_xor_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XOR_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_xor_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_XOR_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_cmp_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, dreg, imm); }
+inline void emit_cmp_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_G1_Ev_Ib, OP_G1_Ev_Iz, OP_64BIT, 7, memref, imm); }
+inline void emit_cmp_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_cmp_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CMP_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_cmp_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_CMP_Ev_Gv, OP_64BIT, sreg, memref); }
+
+inline void emit_test_r64_imm(x86code *&emitptr, UINT8 dreg, UINT32 imm) { emit_op_modrm_reg_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, dreg, imm); }
+inline void emit_test_m64_imm(x86code *&emitptr, x86_memref memref, UINT32 imm) { emit_op_modrm_mem_imm32(emitptr, OP_G3_Ev, OP_64BIT, 0, memref, imm); }
+inline void emit_test_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, dreg); }
+inline void emit_test_m64_r64(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_TEST_Ev_Gv, OP_64BIT, sreg, memref); }
#endif
@@ -2316,130 +2316,130 @@ inline void emit_shift_mem_imm(x86code *&emitptr, UINT32 op1, UINT32 opn, UINT8
// emit_shift_r8_*
//-------------------------------------------------
-inline void emit_rol_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, dreg, imm); }
-inline void emit_rol_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, memref, imm); }
-inline void emit_rol_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, dreg); }
-inline void emit_rol_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, memref); }
+inline void emit_rol_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, dreg, imm); }
+inline void emit_rol_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_rol_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, dreg); }
+inline void emit_rol_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 0, memref); }
-inline void emit_ror_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, dreg, imm); }
-inline void emit_ror_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, memref, imm); }
-inline void emit_ror_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, dreg); }
-inline void emit_ror_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, memref); }
+inline void emit_ror_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, dreg, imm); }
+inline void emit_ror_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 1, memref, imm); }
+inline void emit_ror_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, dreg); }
+inline void emit_ror_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 1, memref); }
-inline void emit_rcl_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, dreg, imm); }
-inline void emit_rcl_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, memref, imm); }
-inline void emit_rcl_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, dreg); }
-inline void emit_rcl_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, memref); }
+inline void emit_rcl_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, dreg, imm); }
+inline void emit_rcl_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 2, memref, imm); }
+inline void emit_rcl_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, dreg); }
+inline void emit_rcl_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 2, memref); }
-inline void emit_rcr_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, dreg, imm); }
-inline void emit_rcr_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, memref, imm); }
-inline void emit_rcr_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, dreg); }
-inline void emit_rcr_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, memref); }
+inline void emit_rcr_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, dreg, imm); }
+inline void emit_rcr_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 3, memref, imm); }
+inline void emit_rcr_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, dreg); }
+inline void emit_rcr_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 3, memref); }
-inline void emit_shl_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, dreg, imm); }
-inline void emit_shl_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, memref, imm); }
-inline void emit_shl_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, dreg); }
-inline void emit_shl_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, memref); }
+inline void emit_shl_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, dreg, imm); }
+inline void emit_shl_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 4, memref, imm); }
+inline void emit_shl_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, dreg); }
+inline void emit_shl_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 4, memref); }
-inline void emit_shr_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, dreg, imm); }
-inline void emit_shr_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, memref, imm); }
-inline void emit_shr_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, dreg); }
-inline void emit_shr_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, memref); }
+inline void emit_shr_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, dreg, imm); }
+inline void emit_shr_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 5, memref, imm); }
+inline void emit_shr_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, dreg); }
+inline void emit_shr_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 5, memref); }
-inline void emit_sar_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, dreg, imm); }
-inline void emit_sar_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, memref, imm); }
-inline void emit_sar_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, dreg); }
-inline void emit_sar_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, memref); }
+inline void emit_sar_r8_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, dreg, imm); }
+inline void emit_sar_m8_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Eb_1, OP_G2_Eb_Ib, OP_32BIT, 7, memref, imm); }
+inline void emit_sar_r8_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, dreg); }
+inline void emit_sar_m8_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Eb_CL, OP_32BIT, 7, memref); }
//-------------------------------------------------
// emit_shift_r16_*
//-------------------------------------------------
-inline void emit_rol_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, dreg, imm); }
-inline void emit_rol_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, memref, imm); }
-inline void emit_rol_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, dreg); }
-inline void emit_rol_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, memref); }
+inline void emit_rol_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, dreg, imm); }
+inline void emit_rol_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 0, memref, imm); }
+inline void emit_rol_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, dreg); }
+inline void emit_rol_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 0, memref); }
-inline void emit_ror_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, dreg, imm); }
-inline void emit_ror_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, memref, imm); }
-inline void emit_ror_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, dreg); }
-inline void emit_ror_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, memref); }
+inline void emit_ror_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, dreg, imm); }
+inline void emit_ror_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 1, memref, imm); }
+inline void emit_ror_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, dreg); }
+inline void emit_ror_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 1, memref); }
-inline void emit_rcl_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, dreg, imm); }
-inline void emit_rcl_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, memref, imm); }
-inline void emit_rcl_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, dreg); }
-inline void emit_rcl_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, memref); }
+inline void emit_rcl_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, dreg, imm); }
+inline void emit_rcl_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 2, memref, imm); }
+inline void emit_rcl_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, dreg); }
+inline void emit_rcl_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 2, memref); }
-inline void emit_rcr_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, dreg, imm); }
-inline void emit_rcr_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, memref, imm); }
-inline void emit_rcr_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, dreg); }
-inline void emit_rcr_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, memref); }
+inline void emit_rcr_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, dreg, imm); }
+inline void emit_rcr_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 3, memref, imm); }
+inline void emit_rcr_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, dreg); }
+inline void emit_rcr_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 3, memref); }
-inline void emit_shl_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, dreg, imm); }
-inline void emit_shl_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, memref, imm); }
-inline void emit_shl_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, dreg); }
-inline void emit_shl_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, memref); }
+inline void emit_shl_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, dreg, imm); }
+inline void emit_shl_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 4, memref, imm); }
+inline void emit_shl_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, dreg); }
+inline void emit_shl_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 4, memref); }
-inline void emit_shr_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, dreg, imm); }
-inline void emit_shr_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, memref, imm); }
-inline void emit_shr_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, dreg); }
-inline void emit_shr_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, memref); }
+inline void emit_shr_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, dreg, imm); }
+inline void emit_shr_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 5, memref, imm); }
+inline void emit_shr_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, dreg); }
+inline void emit_shr_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 5, memref); }
-inline void emit_sar_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, dreg, imm); }
-inline void emit_sar_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, memref, imm); }
-inline void emit_sar_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, dreg); }
-inline void emit_sar_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, memref); }
+inline void emit_sar_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, dreg, imm); }
+inline void emit_sar_m16_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_16BIT, 7, memref, imm); }
+inline void emit_sar_r16_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, dreg); }
+inline void emit_sar_m16_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_16BIT, 7, memref); }
//-------------------------------------------------
// emit_shift_r32_*
//-------------------------------------------------
-inline void emit_rol_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, dreg, imm); }
-inline void emit_rol_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, memref, imm); }
-inline void emit_rol_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, dreg); }
-inline void emit_rol_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, memref); }
+inline void emit_rol_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, dreg, imm); }
+inline void emit_rol_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 0, memref, imm); }
+inline void emit_rol_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, dreg); }
+inline void emit_rol_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 0, memref); }
-inline void emit_ror_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, dreg, imm); }
-inline void emit_ror_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, memref, imm); }
-inline void emit_ror_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, dreg); }
-inline void emit_ror_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, memref); }
+inline void emit_ror_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, dreg, imm); }
+inline void emit_ror_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 1, memref, imm); }
+inline void emit_ror_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, dreg); }
+inline void emit_ror_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 1, memref); }
-inline void emit_rcl_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, dreg, imm); }
-inline void emit_rcl_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, memref, imm); }
-inline void emit_rcl_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, dreg); }
-inline void emit_rcl_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, memref); }
+inline void emit_rcl_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, dreg, imm); }
+inline void emit_rcl_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 2, memref, imm); }
+inline void emit_rcl_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, dreg); }
+inline void emit_rcl_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 2, memref); }
-inline void emit_rcr_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, dreg, imm); }
-inline void emit_rcr_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, memref, imm); }
-inline void emit_rcr_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, dreg); }
-inline void emit_rcr_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, memref); }
+inline void emit_rcr_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, dreg, imm); }
+inline void emit_rcr_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 3, memref, imm); }
+inline void emit_rcr_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, dreg); }
+inline void emit_rcr_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 3, memref); }
-inline void emit_shl_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, dreg, imm); }
-inline void emit_shl_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, memref, imm); }
-inline void emit_shl_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, dreg); }
-inline void emit_shl_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, memref); }
+inline void emit_shl_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, dreg, imm); }
+inline void emit_shl_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 4, memref, imm); }
+inline void emit_shl_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, dreg); }
+inline void emit_shl_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 4, memref); }
-inline void emit_shr_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, dreg, imm); }
-inline void emit_shr_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, memref, imm); }
-inline void emit_shr_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, dreg); }
-inline void emit_shr_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, memref); }
+inline void emit_shr_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, dreg, imm); }
+inline void emit_shr_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 5, memref, imm); }
+inline void emit_shr_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, dreg); }
+inline void emit_shr_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 5, memref); }
-inline void emit_sar_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, dreg, imm); }
-inline void emit_sar_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, memref, imm); }
-inline void emit_sar_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, dreg); }
-inline void emit_sar_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, memref); }
+inline void emit_sar_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, dreg, imm); }
+inline void emit_sar_m32_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_32BIT, 7, memref, imm); }
+inline void emit_sar_r32_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, dreg); }
+inline void emit_sar_m32_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_32BIT, 7, memref); }
-inline void emit_shld_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
-inline void emit_shld_m32_r32_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
-inline void emit_shld_r32_r32_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
-inline void emit_shld_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
+inline void emit_shld_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
+inline void emit_shld_m32_r32_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
+inline void emit_shld_r32_r32_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
+inline void emit_shld_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
-inline void emit_shrd_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
-inline void emit_shrd_m32_r32_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
-inline void emit_shrd_r32_r32_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
-inline void emit_shrd_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
+inline void emit_shrd_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, dreg, imm); }
+inline void emit_shrd_m32_r32_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_32BIT, sreg, memref, imm); }
+inline void emit_shrd_r32_r32_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, dreg); }
+inline void emit_shrd_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_32BIT, sreg, memref); }
//-------------------------------------------------
@@ -2448,50 +2448,50 @@ inline void emit_shrd_m32_r32_cl(x86code *&emitptr, x86_memref memref, UINT8 sre
#if (X86EMIT_SIZE == 64)
-inline void emit_rol_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, dreg, imm); }
-inline void emit_rol_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, memref, imm); }
-inline void emit_rol_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, dreg); }
-inline void emit_rol_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, memref); }
-
-inline void emit_ror_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, dreg, imm); }
-inline void emit_ror_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, memref, imm); }
-inline void emit_ror_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, dreg); }
-inline void emit_ror_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, memref); }
-
-inline void emit_rcl_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, dreg, imm); }
-inline void emit_rcl_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, memref, imm); }
-inline void emit_rcl_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, dreg); }
-inline void emit_rcl_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, memref); }
-
-inline void emit_rcr_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, dreg, imm); }
-inline void emit_rcr_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, memref, imm); }
-inline void emit_rcr_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, dreg); }
-inline void emit_rcr_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, memref); }
-
-inline void emit_shl_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, dreg, imm); }
-inline void emit_shl_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, memref, imm); }
-inline void emit_shl_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, dreg); }
-inline void emit_shl_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, memref); }
-
-inline void emit_shr_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, dreg, imm); }
-inline void emit_shr_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, memref, imm); }
-inline void emit_shr_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, dreg); }
-inline void emit_shr_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, memref); }
-
-inline void emit_sar_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, dreg, imm); }
-inline void emit_sar_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, memref, imm); }
-inline void emit_sar_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, dreg); }
-inline void emit_sar_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, memref); }
-
-inline void emit_shld_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
-inline void emit_shld_m64_r64_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
-inline void emit_shld_r64_r64_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
-inline void emit_shld_m64_r64_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
-
-inline void emit_shrd_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
-inline void emit_shrd_m64_r64_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
-inline void emit_shrd_r64_r64_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
-inline void emit_shrd_m64_r64_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
+inline void emit_rol_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, dreg, imm); }
+inline void emit_rol_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 0, memref, imm); }
+inline void emit_rol_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, dreg); }
+inline void emit_rol_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 0, memref); }
+
+inline void emit_ror_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, dreg, imm); }
+inline void emit_ror_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 1, memref, imm); }
+inline void emit_ror_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, dreg); }
+inline void emit_ror_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 1, memref); }
+
+inline void emit_rcl_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, dreg, imm); }
+inline void emit_rcl_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 2, memref, imm); }
+inline void emit_rcl_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, dreg); }
+inline void emit_rcl_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 2, memref); }
+
+inline void emit_rcr_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, dreg, imm); }
+inline void emit_rcr_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 3, memref, imm); }
+inline void emit_rcr_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, dreg); }
+inline void emit_rcr_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 3, memref); }
+
+inline void emit_shl_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, dreg, imm); }
+inline void emit_shl_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 4, memref, imm); }
+inline void emit_shl_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, dreg); }
+inline void emit_shl_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 4, memref); }
+
+inline void emit_shr_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, dreg, imm); }
+inline void emit_shr_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 5, memref, imm); }
+inline void emit_shr_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, dreg); }
+inline void emit_shr_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 5, memref); }
+
+inline void emit_sar_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 imm) { emit_shift_reg_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, dreg, imm); }
+inline void emit_sar_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) { emit_shift_mem_imm(emitptr, OP_G2_Ev_1, OP_G2_Ev_Ib, OP_64BIT, 7, memref, imm); }
+inline void emit_sar_r64_cl(x86code *&emitptr, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, dreg); }
+inline void emit_sar_m64_cl(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G2_Ev_CL, OP_64BIT, 7, memref); }
+
+inline void emit_shld_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
+inline void emit_shld_m64_r64_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHLD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
+inline void emit_shld_r64_r64_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
+inline void emit_shld_m64_r64_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHLD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
+
+inline void emit_shrd_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, dreg, imm); }
+inline void emit_shrd_m64_r64_imm(x86code *&emitptr, x86_memref memref, UINT8 sreg, UINT8 imm) { emit_op_modrm_mem_imm8(emitptr, OP_SHRD_Ev_Gv_Ib, OP_64BIT, sreg, memref, imm); }
+inline void emit_shrd_r64_r64_cl(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, dreg); }
+inline void emit_shrd_m64_r64_cl(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_SHRD_Ev_Gv_CL, OP_64BIT, sreg, memref); }
#endif
@@ -2606,22 +2606,22 @@ inline void emit_idiv_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_
// emit_imul_r16_*
//-------------------------------------------------
-inline void emit_imul_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_imul_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_imul_r16_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, sreg, imm); }
-inline void emit_imul_r16_m16_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, memref, imm); }
+inline void emit_imul_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_imul_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_imul_r16_r16_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT16 imm) { emit_op_modrm_reg_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, sreg, imm); }
+inline void emit_imul_r16_m16_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT16 imm) { emit_op_modrm_mem_imm816(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_16BIT, dreg, memref, imm); }
-inline void emit_imul_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_imul_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_imul_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, sreg, imm); }
-inline void emit_imul_r32_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, memref, imm); }
+inline void emit_imul_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_imul_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_imul_r32_r32_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, sreg, imm); }
+inline void emit_imul_r32_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_32BIT, dreg, memref, imm); }
#if (X86EMIT_SIZE == 64)
-inline void emit_imul_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_imul_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_imul_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, sreg, imm); }
-inline void emit_imul_r64_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, memref, imm); }
+inline void emit_imul_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_imul_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_IMUL_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_imul_r64_r64_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, INT32 imm) { emit_op_modrm_reg_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, sreg, imm); }
+inline void emit_imul_r64_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, INT32 imm) { emit_op_modrm_mem_imm832(emitptr, OP_IMUL_Gv_Ev_Ib, OP_IMUL_Gv_Ev_Iz, OP_64BIT, dreg, memref, imm); }
#endif
@@ -2635,29 +2635,29 @@ inline void emit_imul_r64_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memr
// emit_bswap_*
//-------------------------------------------------
-inline void emit_bswap_r32(x86code *&emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_32BIT, dreg); }
-inline void emit_bswap_r64(x86code *&emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_64BIT, dreg); }
+inline void emit_bswap_r32(x86code *&emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_32BIT, dreg); }
+inline void emit_bswap_r64(x86code *&emitptr, UINT8 dreg) { emit_op_reg(emitptr, OP_BSWAP_EAX + (dreg & 7), OP_64BIT, dreg); }
//-------------------------------------------------
// emit_bsr/bsf_r16_*
//-------------------------------------------------
-inline void emit_bsf_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_bsf_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_bsr_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, sreg); }
-inline void emit_bsr_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_bsf_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_bsf_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_16BIT, dreg, memref); }
+inline void emit_bsr_r16_r16(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, sreg); }
+inline void emit_bsr_r16_m16(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_16BIT, dreg, memref); }
-inline void emit_bsf_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_bsf_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, memref); }
-inline void emit_bsr_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, sreg); }
-inline void emit_bsr_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_bsf_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_bsf_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_32BIT, dreg, memref); }
+inline void emit_bsr_r32_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, sreg); }
+inline void emit_bsr_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_bsf_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_bsf_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, memref); }
-inline void emit_bsr_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, sreg); }
-inline void emit_bsr_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_bsf_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_bsf_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSF_Gv_Ev, OP_64BIT, dreg, memref); }
+inline void emit_bsr_r64_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, sreg); }
+inline void emit_bsr_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_BSR_Gv_Ev, OP_64BIT, dreg, memref); }
#endif
@@ -2745,10 +2745,10 @@ inline void emit_btc_m64_imm(x86code *&emitptr, x86_memref memref, UINT8 imm) {
// LEA EMITTERS
//**************************************************************************
-inline void emit_lea_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_32BIT, dreg, memref); }
+inline void emit_lea_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_lea_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_64BIT, dreg, memref); }
+inline void emit_lea_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_LEA_Gv_M, OP_64BIT, dreg, memref); }
#endif
@@ -2761,8 +2761,8 @@ inline void emit_lea_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) {
// emit_setcc_*
//-------------------------------------------------
-inline void emit_setcc_r8(x86code *&emitptr, UINT8 cond, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, dreg); }
-inline void emit_setcc_m8(x86code *&emitptr, UINT8 cond, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, memref); }
+inline void emit_setcc_r8(x86code *&emitptr, UINT8 cond, UINT8 dreg) { emit_op_modrm_reg(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, dreg); }
+inline void emit_setcc_m8(x86code *&emitptr, UINT8 cond, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SETCC_O_Eb + cond, OP_32BIT, 0, memref); }
@@ -2816,53 +2816,53 @@ inline void emit_fstsw_ax(x86code *&emitptr) { emit_op_simple(emitptr, OP_FSTSW_
#if (X86EMIT_SIZE == 32)
-inline void emit_ffree_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FFREE_STn + reg, OP_32BIT); }
-inline void emit_fst_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FST_STn + reg, OP_32BIT); }
-inline void emit_fstp_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSTP_STn + reg, OP_32BIT); }
-inline void emit_fucomp_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOMP_STn + reg, OP_32BIT); }
-
-inline void emit_fadd_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADD_ST0_STn + reg, OP_32BIT); }
-inline void emit_fmul_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMUL_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcom_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOM_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcomp_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMP_ST0_STn + reg, OP_32BIT); }
-inline void emit_fsub_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUB_ST0_STn + reg, OP_32BIT); }
-inline void emit_fsubr_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBR_ST0_STn + reg, OP_32BIT); }
-inline void emit_fdiv_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIV_ST0_STn + reg, OP_32BIT); }
-inline void emit_fdivr_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVR_ST0_STn + reg, OP_32BIT); }
-inline void emit_fld_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FLD_ST0_STn + reg, OP_32BIT); }
-inline void emit_fxch_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FXCH_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovb_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVB_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmove_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovbe_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVBE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovu_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVU_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovnb_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNB_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovne_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovnbe_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNBE_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcmovnu_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNU_ST0_STn + reg, OP_32BIT); }
-inline void emit_fucomi_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOMI_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcomi_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMI_ST0_STn + reg, OP_32BIT); }
-inline void emit_fcomip_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMIP_ST0_STn + reg, OP_32BIT); }
-
-inline void emit_fadd_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADD_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fmul_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMUL_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsubr_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBR_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsub_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUB_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdivr_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVR_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdiv_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIV_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fucom_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOM_STn_ST0 + reg, OP_32BIT); }
-inline void emit_faddp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADDP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fmulp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMULP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsubrp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBRP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fsubp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdivrp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVRP_STn_ST0 + reg, OP_32BIT); }
-inline void emit_fdivp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVP_STn_ST0 + reg, OP_32BIT); }
-
-inline void emit_faddp(x86code *&emitptr) { emit_faddp_stn_st0(emitptr, 1); }
-inline void emit_fmulp(x86code *&emitptr) { emit_fmulp_stn_st0(emitptr, 1); }
-inline void emit_fsubrp(x86code *&emitptr) { emit_fsubrp_stn_st0(emitptr, 1); }
-inline void emit_fsubp(x86code *&emitptr) { emit_fsubp_stn_st0(emitptr, 1); }
-inline void emit_fdivrp(x86code *&emitptr) { emit_fdivrp_stn_st0(emitptr, 1); }
-inline void emit_fdivp(x86code *&emitptr) { emit_fdivp_stn_st0(emitptr, 1); }
+inline void emit_ffree_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FFREE_STn + reg, OP_32BIT); }
+inline void emit_fst_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FST_STn + reg, OP_32BIT); }
+inline void emit_fstp_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSTP_STn + reg, OP_32BIT); }
+inline void emit_fucomp_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOMP_STn + reg, OP_32BIT); }
+
+inline void emit_fadd_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADD_ST0_STn + reg, OP_32BIT); }
+inline void emit_fmul_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMUL_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcom_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOM_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcomp_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMP_ST0_STn + reg, OP_32BIT); }
+inline void emit_fsub_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUB_ST0_STn + reg, OP_32BIT); }
+inline void emit_fsubr_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBR_ST0_STn + reg, OP_32BIT); }
+inline void emit_fdiv_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIV_ST0_STn + reg, OP_32BIT); }
+inline void emit_fdivr_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVR_ST0_STn + reg, OP_32BIT); }
+inline void emit_fld_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FLD_ST0_STn + reg, OP_32BIT); }
+inline void emit_fxch_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FXCH_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovb_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVB_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmove_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovbe_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVBE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovu_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVU_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovnb_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNB_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovne_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovnbe_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNBE_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcmovnu_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCMOVNU_ST0_STn + reg, OP_32BIT); }
+inline void emit_fucomi_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOMI_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcomi_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMI_ST0_STn + reg, OP_32BIT); }
+inline void emit_fcomip_st0_stn(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FCOMIP_ST0_STn + reg, OP_32BIT); }
+
+inline void emit_fadd_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADD_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fmul_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMUL_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsubr_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBR_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsub_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUB_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdivr_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVR_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdiv_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIV_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fucom_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FUCOM_STn_ST0 + reg, OP_32BIT); }
+inline void emit_faddp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FADDP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fmulp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FMULP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsubrp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBRP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fsubp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FSUBP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdivrp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVRP_STn_ST0 + reg, OP_32BIT); }
+inline void emit_fdivp_stn_st0(x86code *&emitptr, UINT8 reg) { emit_op_simple(emitptr, OP_FDIVP_STn_ST0 + reg, OP_32BIT); }
+
+inline void emit_faddp(x86code *&emitptr) { emit_faddp_stn_st0(emitptr, 1); }
+inline void emit_fmulp(x86code *&emitptr) { emit_fmulp_stn_st0(emitptr, 1); }
+inline void emit_fsubrp(x86code *&emitptr) { emit_fsubrp_stn_st0(emitptr, 1); }
+inline void emit_fsubp(x86code *&emitptr) { emit_fsubp_stn_st0(emitptr, 1); }
+inline void emit_fdivrp(x86code *&emitptr) { emit_fdivrp_stn_st0(emitptr, 1); }
+inline void emit_fdivp(x86code *&emitptr) { emit_fdivp_stn_st0(emitptr, 1); }
#endif
@@ -2874,73 +2874,73 @@ inline void emit_fdivp(x86code *&emitptr) { emit_fdivp_stn_st0(emitptr, 1);
#if (X86EMIT_SIZE == 32)
-inline void emit_fadd_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 0, memref); }
-inline void emit_fmul_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 1, memref); }
-inline void emit_fcom_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 2, memref); }
-inline void emit_fcomp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 3, memref); }
-inline void emit_fsub_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 4, memref); }
-inline void emit_fsubr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 5, memref); }
-inline void emit_fdiv_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 6, memref); }
-inline void emit_fdivr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 7, memref); }
-
-inline void emit_fld_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 0, memref); }
-inline void emit_fst_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 2, memref); }
-inline void emit_fstp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 3, memref); }
-inline void emit_fldenv_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 4, memref); }
-inline void emit_fldcw_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 5, memref); }
-inline void emit_fstenv_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 6, memref); }
-inline void emit_fstcw_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 7, memref); }
-
-inline void emit_fiadd_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 0, memref); }
-inline void emit_fimul_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 1, memref); }
-inline void emit_ficom_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 2, memref); }
-inline void emit_ficomp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 3, memref); }
-inline void emit_fisub_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 4, memref); }
-inline void emit_fisubr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 5, memref); }
-inline void emit_fidiv_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 6, memref); }
-inline void emit_fidivr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 7, memref); }
-
-inline void emit_fild_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 0, memref); }
-inline void emit_fisttp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 1, memref); }
-inline void emit_fist_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 2, memref); }
-inline void emit_fistp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 3, memref); }
-inline void emit_fld_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 5, memref); }
-inline void emit_fstp_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 7, memref); }
-
-inline void emit_fadd_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 0, memref); }
-inline void emit_fmul_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 1, memref); }
-inline void emit_fcom_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 2, memref); }
-inline void emit_fcomp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 3, memref); }
-inline void emit_fsub_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 4, memref); }
-inline void emit_fsubr_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 5, memref); }
-inline void emit_fdiv_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 6, memref); }
-inline void emit_fdivr_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 7, memref); }
-
-inline void emit_fld_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 0, memref); }
-inline void emit_fisttp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 1, memref); }
-inline void emit_fst_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 2, memref); }
-inline void emit_fstp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 3, memref); }
-inline void emit_frstor_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 4, memref); }
-inline void emit_fsave_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 6, memref); }
-inline void emit_fstsw_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 7, memref); }
-
-inline void emit_fiadd_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 0, memref); }
-inline void emit_fimul_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 1, memref); }
-inline void emit_ficom_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 2, memref); }
-inline void emit_ficomp_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 3, memref); }
-inline void emit_fisub_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 4, memref); }
-inline void emit_fisubr_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 5, memref); }
-inline void emit_fidiv_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 6, memref); }
-inline void emit_fidivr_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 7, memref); }
-
-inline void emit_fild_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 0, memref); }
-inline void emit_fisttp_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 1, memref); }
-inline void emit_fist_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 2, memref); }
-inline void emit_fistp_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 3, memref); }
-inline void emit_fbld_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 4, memref); }
-inline void emit_fild_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 5, memref); }
-inline void emit_fbstp_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 6, memref); }
-inline void emit_fistp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 7, memref); }
+inline void emit_fadd_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 0, memref); }
+inline void emit_fmul_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 1, memref); }
+inline void emit_fcom_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 2, memref); }
+inline void emit_fcomp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 3, memref); }
+inline void emit_fsub_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 4, memref); }
+inline void emit_fsubr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 5, memref); }
+inline void emit_fdiv_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 6, memref); }
+inline void emit_fdivr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D8, OP_32BIT, 7, memref); }
+
+inline void emit_fld_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 0, memref); }
+inline void emit_fst_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 2, memref); }
+inline void emit_fstp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 3, memref); }
+inline void emit_fldenv_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 4, memref); }
+inline void emit_fldcw_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 5, memref); }
+inline void emit_fstenv_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 6, memref); }
+inline void emit_fstcw_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_D9, OP_32BIT, 7, memref); }
+
+inline void emit_fiadd_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 0, memref); }
+inline void emit_fimul_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 1, memref); }
+inline void emit_ficom_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 2, memref); }
+inline void emit_ficomp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 3, memref); }
+inline void emit_fisub_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 4, memref); }
+inline void emit_fisubr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 5, memref); }
+inline void emit_fidiv_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 6, memref); }
+inline void emit_fidivr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DA, OP_32BIT, 7, memref); }
+
+inline void emit_fild_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 0, memref); }
+inline void emit_fisttp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 1, memref); }
+inline void emit_fist_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 2, memref); }
+inline void emit_fistp_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 3, memref); }
+inline void emit_fld_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 5, memref); }
+inline void emit_fstp_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DB, OP_32BIT, 7, memref); }
+
+inline void emit_fadd_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 0, memref); }
+inline void emit_fmul_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 1, memref); }
+inline void emit_fcom_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 2, memref); }
+inline void emit_fcomp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 3, memref); }
+inline void emit_fsub_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 4, memref); }
+inline void emit_fsubr_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 5, memref); }
+inline void emit_fdiv_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 6, memref); }
+inline void emit_fdivr_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DC, OP_32BIT, 7, memref); }
+
+inline void emit_fld_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 0, memref); }
+inline void emit_fisttp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 1, memref); }
+inline void emit_fst_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 2, memref); }
+inline void emit_fstp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 3, memref); }
+inline void emit_frstor_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 4, memref); }
+inline void emit_fsave_m(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 6, memref); }
+inline void emit_fstsw_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DD, OP_32BIT, 7, memref); }
+
+inline void emit_fiadd_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 0, memref); }
+inline void emit_fimul_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 1, memref); }
+inline void emit_ficom_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 2, memref); }
+inline void emit_ficomp_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 3, memref); }
+inline void emit_fisub_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 4, memref); }
+inline void emit_fisubr_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 5, memref); }
+inline void emit_fidiv_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 6, memref); }
+inline void emit_fidivr_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DE, OP_32BIT, 7, memref); }
+
+inline void emit_fild_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 0, memref); }
+inline void emit_fisttp_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 1, memref); }
+inline void emit_fist_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 2, memref); }
+inline void emit_fistp_m16(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 3, memref); }
+inline void emit_fbld_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 4, memref); }
+inline void emit_fild_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 5, memref); }
+inline void emit_fbstp_m80(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 6, memref); }
+inline void emit_fistp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ESC_DF, OP_32BIT, 7, memref); }
#endif
@@ -2950,8 +2950,8 @@ inline void emit_fistp_m64(x86code *&emitptr, x86_memref memref) { emit_op_modrm
// GROUP16 EMITTERS
//**************************************************************************
-inline void emit_ldmxcsr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G16, OP_32BIT, 2, memref); }
-inline void emit_stmxcsr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G16, OP_32BIT, 3, memref); }
+inline void emit_ldmxcsr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G16, OP_32BIT, 2, memref); }
+inline void emit_stmxcsr_m32(x86code *&emitptr, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_G16, OP_32BIT, 3, memref); }
@@ -2959,17 +2959,17 @@ inline void emit_stmxcsr_m32(x86code *&emitptr, x86_memref memref) { emit_op_mod
// MISC SSE EMITTERS
//**************************************************************************
-inline void emit_movd_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, sreg); }
-inline void emit_movd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, memref); }
-inline void emit_movd_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, dreg); }
-inline void emit_movd_m32_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, memref); }
+inline void emit_movd_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, sreg); }
+inline void emit_movd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_32BIT, dreg, memref); }
+inline void emit_movd_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, dreg); }
+inline void emit_movd_m32_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_32BIT, sreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_movq_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, sreg); }
-inline void emit_movq_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, memref); }
-inline void emit_movq_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, dreg); }
-inline void emit_movq_m64_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, memref); }
+inline void emit_movq_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, sreg); }
+inline void emit_movq_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVD_Vd_Ed, OP_64BIT, dreg, memref); }
+inline void emit_movq_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, dreg); }
+inline void emit_movq_m64_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVD_Ed_Vd, OP_64BIT, sreg, memref); }
#endif
@@ -2979,66 +2979,66 @@ inline void emit_movq_m64_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg)
// SSE SCALAR SINGLE EMITTERS
//**************************************************************************
-inline void emit_movss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_movss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_movss_m32_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVSS_Wss_Vss, OP_32BIT, sreg, memref); }
+inline void emit_movss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_movss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_movss_m32_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVSS_Wss_Vss, OP_32BIT, sreg, memref); }
-inline void emit_addss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_addss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_addss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_addss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_subss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_subss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_subss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_subss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_mulss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_mulss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_mulss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_mulss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_divss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_divss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_divss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_divss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_rcpss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_rcpss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_rcpss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_rcpss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_sqrtss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_sqrtss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_rsqrtss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_rsqrtss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_rsqrtss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_rsqrtss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTSS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_comiss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_comiss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_comiss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_comiss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_ucomiss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_ucomiss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, memref); }
+inline void emit_ucomiss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_ucomiss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISS_Vss_Wss, OP_32BIT, dreg, memref); }
-inline void emit_cvtsi2ss_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsi2ss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, memref); }
+inline void emit_cvtsi2ss_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsi2ss_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtsi2ss_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, sreg); }
-inline void emit_cvtsi2ss_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, memref); }
+inline void emit_cvtsi2ss_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, sreg); }
+inline void emit_cvtsi2ss_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SS_Vss_Ed, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvtsd2ss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsd2ss_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_cvtsd2ss_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsd2ss_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SS_Vss_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_cvtss2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_cvtss2si_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
+inline void emit_cvtss2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_cvtss2si_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtss2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
-inline void emit_cvtss2si_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
+inline void emit_cvtss2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
+inline void emit_cvtss2si_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvttss2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_cvttss2si_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
+inline void emit_cvttss2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_cvttss2si_r32_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvttss2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
-inline void emit_cvttss2si_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
+inline void emit_cvttss2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, sreg); }
+inline void emit_cvttss2si_r64_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSS2SI_Gd_Wss, OP_64BIT, dreg, memref); }
#endif
-inline void emit_roundss_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
-inline void emit_roundss_r128_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
+inline void emit_roundss_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundss_r128_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSS_Vss_Wss_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
@@ -3046,57 +3046,57 @@ inline void emit_roundss_r128_m32_imm(x86code *&emitptr, UINT8 dreg, x86_memref
// SSE PACKED SINGLE EMITTERS
//**************************************************************************
-inline void emit_movps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_movps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_movps_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Wps_Vps, OP_32BIT, sreg, memref); }
+inline void emit_movps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_movps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_movps_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPS_Wps_Vps, OP_32BIT, sreg, memref); }
-inline void emit_addps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_addps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_addps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_addps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_subps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_subps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_subps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_subps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_mulps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_mulps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_mulps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_mulps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_divps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_divps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_divps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_divps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_rcpps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_rcpps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_rcpps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_rcpps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RCPPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_sqrtps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_sqrtps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_rsqrtps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_rsqrtps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_rsqrtps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_rsqrtps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_RSQRTPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_andps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_andps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_andps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_andps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_andnps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_andnps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_andnps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_andnps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_orps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_orps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_orps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_orps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_xorps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_xorps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, memref); }
+inline void emit_xorps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_xorps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPS_Vps_Wps, OP_32BIT, dreg, memref); }
-inline void emit_cvtdq2ps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, sreg); }
-inline void emit_cvtdq2ps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, memref); }
+inline void emit_cvtdq2ps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, sreg); }
+inline void emit_cvtdq2ps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PS_Vps_Wdq, OP_32BIT, dreg, memref); }
-inline void emit_cvtpd2ps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtpd2ps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_cvtpd2ps_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtpd2ps_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2PS_Vps_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_cvtps2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_cvtps2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
+inline void emit_cvtps2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_cvtps2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
-inline void emit_cvttps2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
-inline void emit_cvttps2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
+inline void emit_cvttps2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, sreg); }
+inline void emit_cvttps2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPS2DQ_Vdq_Wps, OP_32BIT, dreg, memref); }
-inline void emit_roundps_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
-inline void emit_roundps_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
+inline void emit_roundps_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundps_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPS_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
@@ -3104,60 +3104,60 @@ inline void emit_roundps_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref
// SSE SCALAR DOUBLE EMITTERS
//**************************************************************************
-inline void emit_movsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_movsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_movsd_m64_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVSD_Wsd_Vsd, OP_32BIT, sreg, memref); }
+inline void emit_movsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_movsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_movsd_m64_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVSD_Wsd_Vsd, OP_32BIT, sreg, memref); }
-inline void emit_addsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_addsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_addsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_addsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_subsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_subsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_subsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_subsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_mulsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_mulsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_mulsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_mulsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_divsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_divsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_divsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_divsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_sqrtsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_sqrtsd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtsd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTSD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_comisd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_comisd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_comisd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_comisd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_COMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_ucomisd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_ucomisd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_ucomisd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_ucomisd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_UCOMISD_Vsd_Wsd, OP_32BIT, dreg, memref); }
-inline void emit_cvtsi2sd_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsi2sd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, memref); }
+inline void emit_cvtsi2sd_r128_r32(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsi2sd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtsi2sd_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, sreg); }
-inline void emit_cvtsi2sd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, memref); }
+inline void emit_cvtsi2sd_r128_r64(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, sreg); }
+inline void emit_cvtsi2sd_r128_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSI2SD_Vsd_Ed, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvtss2sd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, sreg); }
-inline void emit_cvtss2sd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, memref); }
+inline void emit_cvtss2sd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, sreg); }
+inline void emit_cvtss2sd_r128_m32(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSS2SD_Vsd_Wss, OP_32BIT, dreg, memref); }
-inline void emit_cvtsd2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtsd2si_r32_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_cvtsd2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtsd2si_r32_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvtsd2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
-inline void emit_cvtsd2si_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
+inline void emit_cvtsd2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
+inline void emit_cvtsd2si_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
#endif
-inline void emit_cvttsd2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
-inline void emit_cvttsd2si_r32_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
+inline void emit_cvttsd2si_r32_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, sreg); }
+inline void emit_cvttsd2si_r32_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_32BIT, dreg, memref); }
#if (X86EMIT_SIZE == 64)
-inline void emit_cvttsd2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
-inline void emit_cvttsd2si_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
+inline void emit_cvttsd2si_r64_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, sreg); }
+inline void emit_cvttsd2si_r64_m64(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTSD2SI_Gd_Wsd, OP_64BIT, dreg, memref); }
#endif
-inline void emit_roundsd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
-inline void emit_roundsd_r128_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
+inline void emit_roundsd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundsd_r128_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDSD_Vsd_Wsd_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
@@ -3165,50 +3165,50 @@ inline void emit_roundsd_r128_m64_imm(x86code *&emitptr, UINT8 dreg, x86_memref
// SSE PACKED DOUBLE EMITTERS
//**************************************************************************
-inline void emit_movpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_movpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_movpd_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Wpd_Vpd, OP_32BIT, sreg, memref); }
+inline void emit_movpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_movpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_movpd_m128_r128(x86code *&emitptr, x86_memref memref, UINT8 sreg) { emit_op_modrm_mem(emitptr, OP_MOVAPD_Wpd_Vpd, OP_32BIT, sreg, memref); }
-inline void emit_addpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_addpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_addpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_addpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ADDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_subpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_subpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_subpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_subpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SUBPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_mulpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_mulpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_mulpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_mulpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_MULPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_divpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_divpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_divpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_divpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_DIVPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_sqrtpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_sqrtpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_sqrtpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_sqrtpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_SQRTPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_andpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_andpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_andpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_andpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_andnpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_andnpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_andnpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_andnpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ANDNPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_orpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_orpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_orpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_orpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_ORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_xorpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_xorpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_xorpd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_xorpd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_XORPD_Vpd_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_cvtdq2pd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
-inline void emit_cvtdq2pd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
+inline void emit_cvtdq2pd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
+inline void emit_cvtdq2pd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTDQ2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
-inline void emit_cvtps2pd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
-inline void emit_cvtps2pd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
+inline void emit_cvtps2pd_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, sreg); }
+inline void emit_cvtps2pd_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPS2PD_Vpd_Wq, OP_32BIT, dreg, memref); }
-inline void emit_cvtpd2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_cvtpd2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_cvtpd2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_cvtpd2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_cvttpd2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
-inline void emit_cvttpd2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
+inline void emit_cvttpd2dq_r128_r128(x86code *&emitptr, UINT8 dreg, UINT8 sreg) { emit_op_modrm_reg(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, sreg); }
+inline void emit_cvttpd2dq_r128_m128(x86code *&emitptr, UINT8 dreg, x86_memref memref) { emit_op_modrm_mem(emitptr, OP_CVTTPD2DQ_Vdq_Wpd, OP_32BIT, dreg, memref); }
-inline void emit_roundpd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
+inline void emit_roundpd_r128_r128_imm(x86code *&emitptr, UINT8 dreg, UINT8 sreg, UINT8 imm) { emit_op_modrm_reg(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, sreg); emit_byte(emitptr, imm); }
inline void emit_roundpd_r128_m128_imm(x86code *&emitptr, UINT8 dreg, x86_memref memref, UINT8 imm) { emit_op_modrm_mem(emitptr, OP_ROUNDPD_Vdq_Wdq_Ib, OP_32BIT, dreg, memref); emit_byte(emitptr, imm); }
};
diff --git a/src/emu/cpu/x86log.c b/src/emu/cpu/x86log.c
index e72483e823f..5f01b2c8e43 100644
--- a/src/emu/cpu/x86log.c
+++ b/src/emu/cpu/x86log.c
@@ -20,9 +20,9 @@
***************************************************************************/
/* comment parameters */
-#define MAX_COMMENTS 4000
-#define MAX_DATA_RANGES 1000
-#define COMMENT_POOL_SIZE (MAX_COMMENTS * 40)
+#define MAX_COMMENTS 4000
+#define MAX_DATA_RANGES 1000
+#define COMMENT_POOL_SIZE (MAX_COMMENTS * 40)
@@ -33,34 +33,34 @@
/* code logging info */
struct log_comment
{
- x86code * base;
- const char * string;
+ x86code * base;
+ const char * string;
};
/* data ranges */
struct data_range_t
{
- x86code * base;
- x86code * end;
- int size;
+ x86code * base;
+ x86code * end;
+ int size;
};
/* the code logging context */
struct x86log_context
{
- astring filename; /* name of the file */
- FILE * file; /* file we are logging to */
+ astring filename; /* name of the file */
+ FILE * file; /* file we are logging to */
- data_range_t data_range[MAX_DATA_RANGES]; /* list of data ranges */
- int data_range_count; /* number of data ranges */
+ data_range_t data_range[MAX_DATA_RANGES]; /* list of data ranges */
+ int data_range_count; /* number of data ranges */
- log_comment comment_list[MAX_COMMENTS]; /* list of comments */
- int comment_count; /* number of live comments */
+ log_comment comment_list[MAX_COMMENTS]; /* list of comments */
+ int comment_count; /* number of live comments */
- char comment_pool[COMMENT_POOL_SIZE];/* string pool to hold comments */
- char * comment_pool_next; /* pointer to next string pool location */
+ char comment_pool[COMMENT_POOL_SIZE];/* string pool to hold comments */
+ char * comment_pool_next; /* pointer to next string pool location */
};
@@ -214,10 +214,10 @@ void x86log_disasm_code_range(x86log_context *log, const char *label, x86code *s
switch (curdata->size)
{
default:
- case 1: sprintf(buffer, "db %02X", *cur); break;
- case 2: sprintf(buffer, "dw %04X", *(UINT16 *)cur); break;
- case 4: sprintf(buffer, "dd %08X", *(UINT32 *)cur); break;
- case 8: sprintf(buffer, "dq %08X%08X", ((UINT32 *)cur)[1], ((UINT32 *)cur)[0]); break;
+ case 1: sprintf(buffer, "db %02X", *cur); break;
+ case 2: sprintf(buffer, "dw %04X", *(UINT16 *)cur); break;
+ case 4: sprintf(buffer, "dd %08X", *(UINT32 *)cur); break;
+ case 8: sprintf(buffer, "dq %08X%08X", ((UINT32 *)cur)[1], ((UINT32 *)cur)[0]); break;
}
}
diff --git a/src/emu/cpu/x86log.h b/src/emu/cpu/x86log.h
index ff3834c0208..5fa968d83ed 100644
--- a/src/emu/cpu/x86log.h
+++ b/src/emu/cpu/x86log.h
@@ -49,4 +49,4 @@ void x86log_disasm_code_range(x86log_context *log, const char *label, x86code *s
void x86log_printf(x86log_context *log, const char *format, ...) ATTR_PRINTF(2, 3);
-#endif /* __X86LOG_H__ */
+#endif /* __X86LOG_H__ */
diff --git a/src/emu/cpu/z180/z180.c b/src/emu/cpu/z180/z180.c
index dc313efacc6..e14da552d3d 100644
--- a/src/emu/cpu/z180/z180.c
+++ b/src/emu/cpu/z180/z180.c
@@ -93,22 +93,22 @@ Hitachi HD647180 series:
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* interrupt priorities */
-#define Z180_INT_TRAP 0 /* Undefined opcode */
-#define Z180_INT_NMI 1 /* NMI */
-#define Z180_INT_IRQ0 2 /* Execute IRQ1 */
-#define Z180_INT_IRQ1 3 /* Execute IRQ1 */
-#define Z180_INT_IRQ2 4 /* Execute IRQ2 */
-#define Z180_INT_PRT0 5 /* Internal PRT channel 0 */
-#define Z180_INT_PRT1 6 /* Internal PRT channel 1 */
-#define Z180_INT_DMA0 7 /* Internal DMA channel 0 */
-#define Z180_INT_DMA1 8 /* Internal DMA channel 1 */
-#define Z180_INT_CSIO 9 /* Internal CSI/O */
-#define Z180_INT_ASCI0 10 /* Internal ASCI channel 0 */
-#define Z180_INT_ASCI1 11 /* Internal ASCI channel 1 */
-#define Z180_INT_MAX Z180_INT_ASCI1
+#define Z180_INT_TRAP 0 /* Undefined opcode */
+#define Z180_INT_NMI 1 /* NMI */
+#define Z180_INT_IRQ0 2 /* Execute IRQ1 */
+#define Z180_INT_IRQ1 3 /* Execute IRQ1 */
+#define Z180_INT_IRQ2 4 /* Execute IRQ2 */
+#define Z180_INT_PRT0 5 /* Internal PRT channel 0 */
+#define Z180_INT_PRT1 6 /* Internal PRT channel 1 */
+#define Z180_INT_DMA0 7 /* Internal DMA channel 0 */
+#define Z180_INT_DMA1 8 /* Internal DMA channel 1 */
+#define Z180_INT_CSIO 9 /* Internal CSI/O */
+#define Z180_INT_ASCI0 10 /* Internal ASCI channel 0 */
+#define Z180_INT_ASCI1 11 /* Internal ASCI channel 1 */
+#define Z180_INT_MAX Z180_INT_ASCI1
/****************************************************************************/
/* The Z180 registers. HALT is set to 1 when the CPU is halted, the refresh */
@@ -116,36 +116,36 @@ Hitachi HD647180 series:
/****************************************************************************/
struct z180_state
{
- PAIR PREPC,PC,SP,AF,BC,DE,HL,IX,IY;
- PAIR AF2,BC2,DE2,HL2;
- UINT8 R,R2,IFF1,IFF2,HALT,IM,I;
- UINT8 tmdr_latch; /* flag latched TMDR0H, TMDR1H values */
- UINT8 read_tcr_tmdr[2]; /* flag to indicate that TCR or TMDR was read */
- UINT32 iol; /* I/O line status bits */
- UINT8 io[64]; /* 64 internal 8 bit registers */
- offs_t mmu[16]; /* MMU address translation */
- UINT8 tmdrh[2]; /* latched TMDR0H and TMDR1H values */
- UINT16 tmdr_value[2]; /* TMDR values used byt PRT0 and PRT1 as down counter */
- UINT8 tif[2]; /* TIF0 and TIF1 values */
- UINT8 nmi_state; /* nmi line state */
- UINT8 nmi_pending; /* nmi pending */
- UINT8 irq_state[3]; /* irq line states (INT0,INT1,INT2) */
- UINT8 int_pending[Z180_INT_MAX + 1]; /* interrupt pending */
- UINT8 after_EI; /* are we in the EI shadow? */
- UINT32 ea;
- UINT8 timer_cnt; /* timer counter / divide by 20 */
- UINT8 dma0_cnt; /* dma0 counter / divide by 20 */
- UINT8 dma1_cnt; /* dma1 counter / divide by 20 */
+ PAIR PREPC,PC,SP,AF,BC,DE,HL,IX,IY;
+ PAIR AF2,BC2,DE2,HL2;
+ UINT8 R,R2,IFF1,IFF2,HALT,IM,I;
+ UINT8 tmdr_latch; /* flag latched TMDR0H, TMDR1H values */
+ UINT8 read_tcr_tmdr[2]; /* flag to indicate that TCR or TMDR was read */
+ UINT32 iol; /* I/O line status bits */
+ UINT8 io[64]; /* 64 internal 8 bit registers */
+ offs_t mmu[16]; /* MMU address translation */
+ UINT8 tmdrh[2]; /* latched TMDR0H and TMDR1H values */
+ UINT16 tmdr_value[2]; /* TMDR values used byt PRT0 and PRT1 as down counter */
+ UINT8 tif[2]; /* TIF0 and TIF1 values */
+ UINT8 nmi_state; /* nmi line state */
+ UINT8 nmi_pending; /* nmi pending */
+ UINT8 irq_state[3]; /* irq line states (INT0,INT1,INT2) */
+ UINT8 int_pending[Z180_INT_MAX + 1]; /* interrupt pending */
+ UINT8 after_EI; /* are we in the EI shadow? */
+ UINT32 ea;
+ UINT8 timer_cnt; /* timer counter / divide by 20 */
+ UINT8 dma0_cnt; /* dma0 counter / divide by 20 */
+ UINT8 dma1_cnt; /* dma1 counter / divide by 20 */
z80_daisy_chain daisy;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *iospace;
- UINT8 rtemp;
- UINT32 ioltemp;
+ UINT8 rtemp;
+ UINT32 ioltemp;
int icount;
- int extra_cycles; /* extra cpu cycles */
+ int extra_cycles; /* extra cpu cycles */
UINT8 *cc[6];
};
@@ -158,35 +158,35 @@ INLINE z180_state *get_safe_token(device_t *device)
static void set_irq_line(z180_state *cpustate, int irqline, int state);
-#define CF 0x01
-#define NF 0x02
-#define PF 0x04
-#define VF PF
-#define XF 0x08
-#define HF 0x10
-#define YF 0x20
-#define ZF 0x40
-#define SF 0x80
+#define CF 0x01
+#define NF 0x02
+#define PF 0x04
+#define VF PF
+#define XF 0x08
+#define HF 0x10
+#define YF 0x20
+#define ZF 0x40
+#define SF 0x80
/* I/O line status flags */
-#define Z180_CKA0 0x00000001 /* I/O asynchronous clock 0 (active high) or DREQ0 (mux) */
-#define Z180_CKA1 0x00000002 /* I/O asynchronous clock 1 (active high) or TEND1 (mux) */
-#define Z180_CKS 0x00000004 /* I/O serial clock (active high) */
-#define Z180_CTS0 0x00000100 /* I clear to send 0 (active low) */
-#define Z180_CTS1 0x00000200 /* I clear to send 1 (active low) or RXS (mux) */
-#define Z180_DCD0 0x00000400 /* I data carrier detect (active low) */
-#define Z180_DREQ0 0x00000800 /* I data request DMA ch 0 (active low) or CKA0 (mux) */
-#define Z180_DREQ1 0x00001000 /* I data request DMA ch 1 (active low) */
-#define Z180_RXA0 0x00002000 /* I asynchronous receive data 0 (active high) */
-#define Z180_RXA1 0x00004000 /* I asynchronous receive data 1 (active high) */
-#define Z180_RXS 0x00008000 /* I clocked serial receive data (active high) or CTS1 (mux) */
-#define Z180_RTS0 0x00010000 /* O request to send (active low) */
-#define Z180_TEND0 0x00020000 /* O transfer end 0 (active low) or CKA1 (mux) */
-#define Z180_TEND1 0x00040000 /* O transfer end 1 (active low) */
+#define Z180_CKA0 0x00000001 /* I/O asynchronous clock 0 (active high) or DREQ0 (mux) */
+#define Z180_CKA1 0x00000002 /* I/O asynchronous clock 1 (active high) or TEND1 (mux) */
+#define Z180_CKS 0x00000004 /* I/O serial clock (active high) */
+#define Z180_CTS0 0x00000100 /* I clear to send 0 (active low) */
+#define Z180_CTS1 0x00000200 /* I clear to send 1 (active low) or RXS (mux) */
+#define Z180_DCD0 0x00000400 /* I data carrier detect (active low) */
+#define Z180_DREQ0 0x00000800 /* I data request DMA ch 0 (active low) or CKA0 (mux) */
+#define Z180_DREQ1 0x00001000 /* I data request DMA ch 1 (active low) */
+#define Z180_RXA0 0x00002000 /* I asynchronous receive data 0 (active high) */
+#define Z180_RXA1 0x00004000 /* I asynchronous receive data 1 (active high) */
+#define Z180_RXS 0x00008000 /* I clocked serial receive data (active high) or CTS1 (mux) */
+#define Z180_RTS0 0x00010000 /* O request to send (active low) */
+#define Z180_TEND0 0x00020000 /* O transfer end 0 (active low) or CKA1 (mux) */
+#define Z180_TEND1 0x00040000 /* O transfer end 1 (active low) */
#define Z180_A18_TOUT 0x00080000 /* O transfer out (PRT channel, active low) or A18 (mux) */
-#define Z180_TXA0 0x00100000 /* O asynchronous transmit data 0 (active high) */
-#define Z180_TXA1 0x00200000 /* O asynchronous transmit data 1 (active high) */
-#define Z180_TXS 0x00400000 /* O clocked serial transmit data (active high) */
+#define Z180_TXA0 0x00100000 /* O asynchronous transmit data 0 (active high) */
+#define Z180_TXA1 0x00200000 /* O asynchronous transmit data 1 (active high) */
+#define Z180_TXS 0x00400000 /* O clocked serial transmit data (active high) */
/*
* Prevent warnings on NetBSD. All identifiers beginning with an underscore
@@ -198,600 +198,600 @@ static void set_irq_line(z180_state *cpustate, int irqline, int state);
#undef _C
#undef _L
-#define _PPC PREPC.d /* previous program counter */
-
-#define _PCD PC.d
-#define _PC PC.w.l
-
-#define _SPD SP.d
-#define _SP SP.w.l
-
-#define _AFD AF.d
-#define _AF AF.w.l
-#define _A AF.b.h
-#define _F AF.b.l
-
-#define _BCD BC.d
-#define _BC BC.w.l
-#define _B BC.b.h
-#define _C BC.b.l
-
-#define _DED DE.d
-#define _DE DE.w.l
-#define _D DE.b.h
-#define _E DE.b.l
-
-#define _HLD HL.d
-#define _HL HL.w.l
-#define _H HL.b.h
-#define _L HL.b.l
-
-#define _IXD IX.d
-#define _IX IX.w.l
-#define _HX IX.b.h
-#define _LX IX.b.l
-
-#define _IYD IY.d
-#define _IY IY.w.l
-#define _HY IY.b.h
-#define _LY IY.b.l
-
-#define IO(n) io[(n)-Z180_CNTLA0]
-#define IO_CNTLA0 IO(Z180_CNTLA0)
-#define IO_CNTLA1 IO(Z180_CNTLA1)
-#define IO_CNTLB0 IO(Z180_CNTLB0)
-#define IO_CNTLB1 IO(Z180_CNTLB1)
-#define IO_STAT0 IO(Z180_STAT0)
-#define IO_STAT1 IO(Z180_STAT1)
-#define IO_TDR0 IO(Z180_TDR0)
-#define IO_TDR1 IO(Z180_TDR1)
-#define IO_RDR0 IO(Z180_RDR0)
-#define IO_RDR1 IO(Z180_RDR1)
-#define IO_CNTR IO(Z180_CNTR)
-#define IO_TRDR IO(Z180_TRDR)
-#define IO_TMDR0L IO(Z180_TMDR0L)
-#define IO_TMDR0H IO(Z180_TMDR0H)
-#define IO_RLDR0L IO(Z180_RLDR0L)
-#define IO_RLDR0H IO(Z180_RLDR0H)
-#define IO_TCR IO(Z180_TCR)
-#define IO_IO11 IO(Z180_IO11)
-#define IO_ASEXT0 IO(Z180_ASEXT0)
-#define IO_ASEXT1 IO(Z180_ASEXT1)
-#define IO_TMDR1L IO(Z180_TMDR1L)
-#define IO_TMDR1H IO(Z180_TMDR1H)
-#define IO_RLDR1L IO(Z180_RLDR1L)
-#define IO_RLDR1H IO(Z180_RLDR1H)
-#define IO_FRC IO(Z180_FRC)
-#define IO_IO19 IO(Z180_IO19)
-#define IO_ASTC0L IO(Z180_ASTC0L)
-#define IO_ASTC0H IO(Z180_ASTC0H)
-#define IO_ASTC1L IO(Z180_ASTC1L)
-#define IO_ASTC1H IO(Z180_ASTC1H)
-#define IO_CMR IO(Z180_CMR)
-#define IO_CCR IO(Z180_CCR)
-#define IO_SAR0L IO(Z180_SAR0L)
-#define IO_SAR0H IO(Z180_SAR0H)
-#define IO_SAR0B IO(Z180_SAR0B)
-#define IO_DAR0L IO(Z180_DAR0L)
-#define IO_DAR0H IO(Z180_DAR0H)
-#define IO_DAR0B IO(Z180_DAR0B)
-#define IO_BCR0L IO(Z180_BCR0L)
-#define IO_BCR0H IO(Z180_BCR0H)
-#define IO_MAR1L IO(Z180_MAR1L)
-#define IO_MAR1H IO(Z180_MAR1H)
-#define IO_MAR1B IO(Z180_MAR1B)
-#define IO_IAR1L IO(Z180_IAR1L)
-#define IO_IAR1H IO(Z180_IAR1H)
-#define IO_IAR1B IO(Z180_IAR1B)
-#define IO_BCR1L IO(Z180_BCR1L)
-#define IO_BCR1H IO(Z180_BCR1H)
-#define IO_DSTAT IO(Z180_DSTAT)
-#define IO_DMODE IO(Z180_DMODE)
-#define IO_DCNTL IO(Z180_DCNTL)
-#define IO_IL IO(Z180_IL)
-#define IO_ITC IO(Z180_ITC)
-#define IO_IO35 IO(Z180_IO35)
-#define IO_RCR IO(Z180_RCR)
-#define IO_IO37 IO(Z180_IO37)
-#define IO_CBR IO(Z180_CBR)
-#define IO_BBR IO(Z180_BBR)
-#define IO_CBAR IO(Z180_CBAR)
-#define IO_IO3B IO(Z180_IO3B)
-#define IO_IO3C IO(Z180_IO3C)
-#define IO_IO3D IO(Z180_IO3D)
-#define IO_OMCR IO(Z180_OMCR)
-#define IO_IOCR IO(Z180_IOCR)
+#define _PPC PREPC.d /* previous program counter */
+
+#define _PCD PC.d
+#define _PC PC.w.l
+
+#define _SPD SP.d
+#define _SP SP.w.l
+
+#define _AFD AF.d
+#define _AF AF.w.l
+#define _A AF.b.h
+#define _F AF.b.l
+
+#define _BCD BC.d
+#define _BC BC.w.l
+#define _B BC.b.h
+#define _C BC.b.l
+
+#define _DED DE.d
+#define _DE DE.w.l
+#define _D DE.b.h
+#define _E DE.b.l
+
+#define _HLD HL.d
+#define _HL HL.w.l
+#define _H HL.b.h
+#define _L HL.b.l
+
+#define _IXD IX.d
+#define _IX IX.w.l
+#define _HX IX.b.h
+#define _LX IX.b.l
+
+#define _IYD IY.d
+#define _IY IY.w.l
+#define _HY IY.b.h
+#define _LY IY.b.l
+
+#define IO(n) io[(n)-Z180_CNTLA0]
+#define IO_CNTLA0 IO(Z180_CNTLA0)
+#define IO_CNTLA1 IO(Z180_CNTLA1)
+#define IO_CNTLB0 IO(Z180_CNTLB0)
+#define IO_CNTLB1 IO(Z180_CNTLB1)
+#define IO_STAT0 IO(Z180_STAT0)
+#define IO_STAT1 IO(Z180_STAT1)
+#define IO_TDR0 IO(Z180_TDR0)
+#define IO_TDR1 IO(Z180_TDR1)
+#define IO_RDR0 IO(Z180_RDR0)
+#define IO_RDR1 IO(Z180_RDR1)
+#define IO_CNTR IO(Z180_CNTR)
+#define IO_TRDR IO(Z180_TRDR)
+#define IO_TMDR0L IO(Z180_TMDR0L)
+#define IO_TMDR0H IO(Z180_TMDR0H)
+#define IO_RLDR0L IO(Z180_RLDR0L)
+#define IO_RLDR0H IO(Z180_RLDR0H)
+#define IO_TCR IO(Z180_TCR)
+#define IO_IO11 IO(Z180_IO11)
+#define IO_ASEXT0 IO(Z180_ASEXT0)
+#define IO_ASEXT1 IO(Z180_ASEXT1)
+#define IO_TMDR1L IO(Z180_TMDR1L)
+#define IO_TMDR1H IO(Z180_TMDR1H)
+#define IO_RLDR1L IO(Z180_RLDR1L)
+#define IO_RLDR1H IO(Z180_RLDR1H)
+#define IO_FRC IO(Z180_FRC)
+#define IO_IO19 IO(Z180_IO19)
+#define IO_ASTC0L IO(Z180_ASTC0L)
+#define IO_ASTC0H IO(Z180_ASTC0H)
+#define IO_ASTC1L IO(Z180_ASTC1L)
+#define IO_ASTC1H IO(Z180_ASTC1H)
+#define IO_CMR IO(Z180_CMR)
+#define IO_CCR IO(Z180_CCR)
+#define IO_SAR0L IO(Z180_SAR0L)
+#define IO_SAR0H IO(Z180_SAR0H)
+#define IO_SAR0B IO(Z180_SAR0B)
+#define IO_DAR0L IO(Z180_DAR0L)
+#define IO_DAR0H IO(Z180_DAR0H)
+#define IO_DAR0B IO(Z180_DAR0B)
+#define IO_BCR0L IO(Z180_BCR0L)
+#define IO_BCR0H IO(Z180_BCR0H)
+#define IO_MAR1L IO(Z180_MAR1L)
+#define IO_MAR1H IO(Z180_MAR1H)
+#define IO_MAR1B IO(Z180_MAR1B)
+#define IO_IAR1L IO(Z180_IAR1L)
+#define IO_IAR1H IO(Z180_IAR1H)
+#define IO_IAR1B IO(Z180_IAR1B)
+#define IO_BCR1L IO(Z180_BCR1L)
+#define IO_BCR1H IO(Z180_BCR1H)
+#define IO_DSTAT IO(Z180_DSTAT)
+#define IO_DMODE IO(Z180_DMODE)
+#define IO_DCNTL IO(Z180_DCNTL)
+#define IO_IL IO(Z180_IL)
+#define IO_ITC IO(Z180_ITC)
+#define IO_IO35 IO(Z180_IO35)
+#define IO_RCR IO(Z180_RCR)
+#define IO_IO37 IO(Z180_IO37)
+#define IO_CBR IO(Z180_CBR)
+#define IO_BBR IO(Z180_BBR)
+#define IO_CBAR IO(Z180_CBAR)
+#define IO_IO3B IO(Z180_IO3B)
+#define IO_IO3C IO(Z180_IO3C)
+#define IO_IO3D IO(Z180_IO3D)
+#define IO_OMCR IO(Z180_OMCR)
+#define IO_IOCR IO(Z180_IOCR)
/* 00 ASCI control register A ch 0 */
-#define Z180_CNTLA0_MPE 0x80
-#define Z180_CNTLA0_RE 0x40
-#define Z180_CNTLA0_TE 0x20
-#define Z180_CNTLA0_RTS0 0x10
-#define Z180_CNTLA0_MPBR_EFR 0x08
-#define Z180_CNTLA0_MODE_DATA 0x04
+#define Z180_CNTLA0_MPE 0x80
+#define Z180_CNTLA0_RE 0x40
+#define Z180_CNTLA0_TE 0x20
+#define Z180_CNTLA0_RTS0 0x10
+#define Z180_CNTLA0_MPBR_EFR 0x08
+#define Z180_CNTLA0_MODE_DATA 0x04
#define Z180_CNTLA0_MODE_PARITY 0x02
-#define Z180_CNTLA0_MODE_STOPB 0x01
+#define Z180_CNTLA0_MODE_STOPB 0x01
-#define Z180_CNTLA0_RESET 0x10
-#define Z180_CNTLA0_RMASK 0xff
-#define Z180_CNTLA0_WMASK 0xff
+#define Z180_CNTLA0_RESET 0x10
+#define Z180_CNTLA0_RMASK 0xff
+#define Z180_CNTLA0_WMASK 0xff
/* 01 ASCI control register A ch 1 */
-#define Z180_CNTLA1_MPE 0x80
-#define Z180_CNTLA1_RE 0x40
-#define Z180_CNTLA1_TE 0x20
-#define Z180_CNTLA1_CKA1D 0x10
-#define Z180_CNTLA1_MPBR_EFR 0x08
-#define Z180_CNTLA1_MODE 0x07
+#define Z180_CNTLA1_MPE 0x80
+#define Z180_CNTLA1_RE 0x40
+#define Z180_CNTLA1_TE 0x20
+#define Z180_CNTLA1_CKA1D 0x10
+#define Z180_CNTLA1_MPBR_EFR 0x08
+#define Z180_CNTLA1_MODE 0x07
-#define Z180_CNTLA1_RESET 0x10
-#define Z180_CNTLA1_RMASK 0xff
-#define Z180_CNTLA1_WMASK 0xff
+#define Z180_CNTLA1_RESET 0x10
+#define Z180_CNTLA1_RMASK 0xff
+#define Z180_CNTLA1_WMASK 0xff
/* 02 ASCI control register B ch 0 */
-#define Z180_CNTLB0_MPBT 0x80
-#define Z180_CNTLB0_MP 0x40
-#define Z180_CNTLB0_CTS_PS 0x20
-#define Z180_CNTLB0_PEO 0x10
-#define Z180_CNTLB0_DR 0x08
-#define Z180_CNTLB0_SS 0x07
+#define Z180_CNTLB0_MPBT 0x80
+#define Z180_CNTLB0_MP 0x40
+#define Z180_CNTLB0_CTS_PS 0x20
+#define Z180_CNTLB0_PEO 0x10
+#define Z180_CNTLB0_DR 0x08
+#define Z180_CNTLB0_SS 0x07
-#define Z180_CNTLB0_RESET 0x07
-#define Z180_CNTLB0_RMASK 0xff
-#define Z180_CNTLB0_WMASK 0xff
+#define Z180_CNTLB0_RESET 0x07
+#define Z180_CNTLB0_RMASK 0xff
+#define Z180_CNTLB0_WMASK 0xff
/* 03 ASCI control register B ch 1 */
-#define Z180_CNTLB1_MPBT 0x80
-#define Z180_CNTLB1_MP 0x40
-#define Z180_CNTLB1_CTS_PS 0x20
-#define Z180_CNTLB1_PEO 0x10
-#define Z180_CNTLB1_DR 0x08
-#define Z180_CNTLB1_SS 0x07
+#define Z180_CNTLB1_MPBT 0x80
+#define Z180_CNTLB1_MP 0x40
+#define Z180_CNTLB1_CTS_PS 0x20
+#define Z180_CNTLB1_PEO 0x10
+#define Z180_CNTLB1_DR 0x08
+#define Z180_CNTLB1_SS 0x07
-#define Z180_CNTLB1_RESET 0x07
-#define Z180_CNTLB1_RMASK 0xff
-#define Z180_CNTLB1_WMASK 0xff
+#define Z180_CNTLB1_RESET 0x07
+#define Z180_CNTLB1_RMASK 0xff
+#define Z180_CNTLB1_WMASK 0xff
/* 04 ASCI status register 0 */
-#define Z180_STAT0_RDRF 0x80
-#define Z180_STAT0_OVRN 0x40
-#define Z180_STAT0_PE 0x20
-#define Z180_STAT0_FE 0x10
-#define Z180_STAT0_RIE 0x08
-#define Z180_STAT0_DCD0 0x04
-#define Z180_STAT0_TDRE 0x02
-#define Z180_STAT0_TIE 0x01
-
-#define Z180_STAT0_RESET 0x00
-#define Z180_STAT0_RMASK 0xff
-#define Z180_STAT0_WMASK 0x09
+#define Z180_STAT0_RDRF 0x80
+#define Z180_STAT0_OVRN 0x40
+#define Z180_STAT0_PE 0x20
+#define Z180_STAT0_FE 0x10
+#define Z180_STAT0_RIE 0x08
+#define Z180_STAT0_DCD0 0x04
+#define Z180_STAT0_TDRE 0x02
+#define Z180_STAT0_TIE 0x01
+
+#define Z180_STAT0_RESET 0x00
+#define Z180_STAT0_RMASK 0xff
+#define Z180_STAT0_WMASK 0x09
/* 05 ASCI status register 1 */
-#define Z180_STAT1_RDRF 0x80
-#define Z180_STAT1_OVRN 0x40
-#define Z180_STAT1_PE 0x20
-#define Z180_STAT1_FE 0x10
-#define Z180_STAT1_RIE 0x08
-#define Z180_STAT1_CTS1E 0x04
-#define Z180_STAT1_TDRE 0x02
-#define Z180_STAT1_TIE 0x01
-
-#define Z180_STAT1_RESET 0x02
-#define Z180_STAT1_RMASK 0xff
-#define Z180_STAT1_WMASK 0x0d
+#define Z180_STAT1_RDRF 0x80
+#define Z180_STAT1_OVRN 0x40
+#define Z180_STAT1_PE 0x20
+#define Z180_STAT1_FE 0x10
+#define Z180_STAT1_RIE 0x08
+#define Z180_STAT1_CTS1E 0x04
+#define Z180_STAT1_TDRE 0x02
+#define Z180_STAT1_TIE 0x01
+
+#define Z180_STAT1_RESET 0x02
+#define Z180_STAT1_RMASK 0xff
+#define Z180_STAT1_WMASK 0x0d
/* 06 ASCI transmit data register 0 */
-#define Z180_TDR0_TDR 0xff
+#define Z180_TDR0_TDR 0xff
-#define Z180_TDR0_RESET 0x00
-#define Z180_TDR0_RMASK 0xff
-#define Z180_TDR0_WMASK 0xff
+#define Z180_TDR0_RESET 0x00
+#define Z180_TDR0_RMASK 0xff
+#define Z180_TDR0_WMASK 0xff
/* 07 ASCI transmit data register 1 */
-#define Z180_TDR1_TDR 0xff
+#define Z180_TDR1_TDR 0xff
-#define Z180_TDR1_RESET 0x00
-#define Z180_TDR1_RMASK 0xff
-#define Z180_TDR1_WMASK 0xff
+#define Z180_TDR1_RESET 0x00
+#define Z180_TDR1_RMASK 0xff
+#define Z180_TDR1_WMASK 0xff
/* 08 ASCI receive register 0 */
-#define Z180_RDR0_RDR 0xff
+#define Z180_RDR0_RDR 0xff
-#define Z180_RDR0_RESET 0x00
-#define Z180_RDR0_RMASK 0xff
-#define Z180_RDR0_WMASK 0xff
+#define Z180_RDR0_RESET 0x00
+#define Z180_RDR0_RMASK 0xff
+#define Z180_RDR0_WMASK 0xff
/* 09 ASCI receive register 1 */
-#define Z180_RDR1_RDR 0xff
+#define Z180_RDR1_RDR 0xff
-#define Z180_RDR1_RESET 0x00
-#define Z180_RDR1_RMASK 0xff
-#define Z180_RDR1_WMASK 0xff
+#define Z180_RDR1_RESET 0x00
+#define Z180_RDR1_RMASK 0xff
+#define Z180_RDR1_WMASK 0xff
/* 0a CSI/O control/status register */
-#define Z180_CNTR_EF 0x80
-#define Z180_CNTR_EIE 0x40
-#define Z180_CNTR_RE 0x20
-#define Z180_CNTR_TE 0x10
-#define Z180_CNTR_SS 0x07
+#define Z180_CNTR_EF 0x80
+#define Z180_CNTR_EIE 0x40
+#define Z180_CNTR_RE 0x20
+#define Z180_CNTR_TE 0x10
+#define Z180_CNTR_SS 0x07
-#define Z180_CNTR_RESET 0x07
-#define Z180_CNTR_RMASK 0xff
-#define Z180_CNTR_WMASK 0x7f
+#define Z180_CNTR_RESET 0x07
+#define Z180_CNTR_RMASK 0xff
+#define Z180_CNTR_WMASK 0x7f
/* 0b CSI/O transmit/receive register */
-#define Z180_TRDR_RESET 0x00
-#define Z180_TRDR_RMASK 0xff
-#define Z180_TRDR_WMASK 0xff
+#define Z180_TRDR_RESET 0x00
+#define Z180_TRDR_RMASK 0xff
+#define Z180_TRDR_WMASK 0xff
/* 0c TIMER data register ch 0 L */
-#define Z180_TMDR0L_RESET 0x00
-#define Z180_TMDR0L_RMASK 0xff
-#define Z180_TMDR0L_WMASK 0xff
+#define Z180_TMDR0L_RESET 0x00
+#define Z180_TMDR0L_RMASK 0xff
+#define Z180_TMDR0L_WMASK 0xff
/* 0d TIMER data register ch 0 H */
-#define Z180_TMDR0H_RESET 0x00
-#define Z180_TMDR0H_RMASK 0xff
-#define Z180_TMDR0H_WMASK 0xff
+#define Z180_TMDR0H_RESET 0x00
+#define Z180_TMDR0H_RMASK 0xff
+#define Z180_TMDR0H_WMASK 0xff
/* 0e TIMER reload register ch 0 L */
-#define Z180_RLDR0L_RESET 0xff
-#define Z180_RLDR0L_RMASK 0xff
-#define Z180_RLDR0L_WMASK 0xff
+#define Z180_RLDR0L_RESET 0xff
+#define Z180_RLDR0L_RMASK 0xff
+#define Z180_RLDR0L_WMASK 0xff
/* 0f TIMER reload register ch 0 H */
-#define Z180_RLDR0H_RESET 0xff
-#define Z180_RLDR0H_RMASK 0xff
-#define Z180_RLDR0H_WMASK 0xff
+#define Z180_RLDR0H_RESET 0xff
+#define Z180_RLDR0H_RMASK 0xff
+#define Z180_RLDR0H_WMASK 0xff
/* 10 TIMER control register */
-#define Z180_TCR_TIF1 0x80
-#define Z180_TCR_TIF0 0x40
-#define Z180_TCR_TIE1 0x20
-#define Z180_TCR_TIE0 0x10
-#define Z180_TCR_TOC1 0x08
-#define Z180_TCR_TOC0 0x04
-#define Z180_TCR_TDE1 0x02
-#define Z180_TCR_TDE0 0x01
-
-#define Z180_TCR_RESET 0x00
-#define Z180_TCR_RMASK 0xff
-#define Z180_TCR_WMASK 0x3f
+#define Z180_TCR_TIF1 0x80
+#define Z180_TCR_TIF0 0x40
+#define Z180_TCR_TIE1 0x20
+#define Z180_TCR_TIE0 0x10
+#define Z180_TCR_TOC1 0x08
+#define Z180_TCR_TOC0 0x04
+#define Z180_TCR_TDE1 0x02
+#define Z180_TCR_TDE0 0x01
+
+#define Z180_TCR_RESET 0x00
+#define Z180_TCR_RMASK 0xff
+#define Z180_TCR_WMASK 0x3f
/* 11 reserved */
-#define Z180_IO11_RESET 0x00
-#define Z180_IO11_RMASK 0xff
-#define Z180_IO11_WMASK 0xff
+#define Z180_IO11_RESET 0x00
+#define Z180_IO11_RMASK 0xff
+#define Z180_IO11_WMASK 0xff
/* 12 (Z8S180/Z8L180) ASCI extension control register 0 */
-#define Z180_ASEXT0_RDRF 0x80
-#define Z180_ASEXT0_DCD0 0x40
-#define Z180_ASEXT0_CTS0 0x20
+#define Z180_ASEXT0_RDRF 0x80
+#define Z180_ASEXT0_DCD0 0x40
+#define Z180_ASEXT0_CTS0 0x20
#define Z180_ASEXT0_X1_BIT_CLK0 0x10
-#define Z180_ASEXT0_BRG0_MODE 0x08
-#define Z180_ASEXT0_BRK_EN 0x04
-#define Z180_ASEXT0_BRK_DET 0x02
-#define Z180_ASEXT0_BRK_SEND 0x01
+#define Z180_ASEXT0_BRG0_MODE 0x08
+#define Z180_ASEXT0_BRK_EN 0x04
+#define Z180_ASEXT0_BRK_DET 0x02
+#define Z180_ASEXT0_BRK_SEND 0x01
-#define Z180_ASEXT0_RESET 0x00
-#define Z180_ASEXT0_RMASK 0xff
-#define Z180_ASEXT0_WMASK 0xfd
+#define Z180_ASEXT0_RESET 0x00
+#define Z180_ASEXT0_RMASK 0xff
+#define Z180_ASEXT0_WMASK 0xfd
/* 13 (Z8S180/Z8L180) ASCI extension control register 0 */
-#define Z180_ASEXT1_RDRF 0x80
+#define Z180_ASEXT1_RDRF 0x80
#define Z180_ASEXT1_X1_BIT_CLK1 0x10
-#define Z180_ASEXT1_BRG1_MODE 0x08
-#define Z180_ASEXT1_BRK_EN 0x04
-#define Z180_ASEXT1_BRK_DET 0x02
-#define Z180_ASEXT1_BRK_SEND 0x01
+#define Z180_ASEXT1_BRG1_MODE 0x08
+#define Z180_ASEXT1_BRK_EN 0x04
+#define Z180_ASEXT1_BRK_DET 0x02
+#define Z180_ASEXT1_BRK_SEND 0x01
-#define Z180_ASEXT1_RESET 0x00
-#define Z180_ASEXT1_RMASK 0xff
-#define Z180_ASEXT1_WMASK 0xfd
+#define Z180_ASEXT1_RESET 0x00
+#define Z180_ASEXT1_RMASK 0xff
+#define Z180_ASEXT1_WMASK 0xfd
/* 14 TIMER data register ch 1 L */
-#define Z180_TMDR1L_RESET 0x00
-#define Z180_TMDR1L_RMASK 0xff
-#define Z180_TMDR1L_WMASK 0xff
+#define Z180_TMDR1L_RESET 0x00
+#define Z180_TMDR1L_RMASK 0xff
+#define Z180_TMDR1L_WMASK 0xff
/* 15 TIMER data register ch 1 H */
-#define Z180_TMDR1H_RESET 0x00
-#define Z180_TMDR1H_RMASK 0xff
-#define Z180_TMDR1H_WMASK 0xff
+#define Z180_TMDR1H_RESET 0x00
+#define Z180_TMDR1H_RMASK 0xff
+#define Z180_TMDR1H_WMASK 0xff
/* 16 TIMER reload register ch 1 L */
-#define Z180_RLDR1L_RESET 0x00
-#define Z180_RLDR1L_RMASK 0xff
-#define Z180_RLDR1L_WMASK 0xff
+#define Z180_RLDR1L_RESET 0x00
+#define Z180_RLDR1L_RMASK 0xff
+#define Z180_RLDR1L_WMASK 0xff
/* 17 TIMER reload register ch 1 H */
-#define Z180_RLDR1H_RESET 0x00
-#define Z180_RLDR1H_RMASK 0xff
-#define Z180_RLDR1H_WMASK 0xff
+#define Z180_RLDR1H_RESET 0x00
+#define Z180_RLDR1H_RMASK 0xff
+#define Z180_RLDR1H_WMASK 0xff
/* 18 free running counter */
-#define Z180_FRC_RESET 0x00
-#define Z180_FRC_RMASK 0xff
-#define Z180_FRC_WMASK 0xff
+#define Z180_FRC_RESET 0x00
+#define Z180_FRC_RMASK 0xff
+#define Z180_FRC_WMASK 0xff
/* 19 reserved */
-#define Z180_IO19_RESET 0x00
-#define Z180_IO19_RMASK 0xff
-#define Z180_IO19_WMASK 0xff
+#define Z180_IO19_RESET 0x00
+#define Z180_IO19_RMASK 0xff
+#define Z180_IO19_WMASK 0xff
/* 1a ASCI time constant ch 0 L */
-#define Z180_ASTC0L_RESET 0x00
-#define Z180_ASTC0L_RMASK 0xff
-#define Z180_ASTC0L_WMASK 0xff
+#define Z180_ASTC0L_RESET 0x00
+#define Z180_ASTC0L_RMASK 0xff
+#define Z180_ASTC0L_WMASK 0xff
/* 1b ASCI time constant ch 0 H */
-#define Z180_ASTC0H_RESET 0x00
-#define Z180_ASTC0H_RMASK 0xff
-#define Z180_ASTC0H_WMASK 0xff
+#define Z180_ASTC0H_RESET 0x00
+#define Z180_ASTC0H_RMASK 0xff
+#define Z180_ASTC0H_WMASK 0xff
/* 1c ASCI time constant ch 1 L */
-#define Z180_ASTC1L_RESET 0x00
-#define Z180_ASTC1L_RMASK 0xff
-#define Z180_ASTC1L_WMASK 0xff
+#define Z180_ASTC1L_RESET 0x00
+#define Z180_ASTC1L_RMASK 0xff
+#define Z180_ASTC1L_WMASK 0xff
/* 1d ASCI time constant ch 1 H */
-#define Z180_ASTC1H_RESET 0x00
-#define Z180_ASTC1H_RMASK 0xff
-#define Z180_ASTC1H_WMASK 0xff
+#define Z180_ASTC1H_RESET 0x00
+#define Z180_ASTC1H_RMASK 0xff
+#define Z180_ASTC1H_WMASK 0xff
/* 1e clock multiplier */
-#define Z180_CMR_X2 0x80
+#define Z180_CMR_X2 0x80
-#define Z180_CMR_RESET 0x7f
-#define Z180_CMR_RMASK 0x80
-#define Z180_CMR_WMASK 0x80
+#define Z180_CMR_RESET 0x7f
+#define Z180_CMR_RMASK 0x80
+#define Z180_CMR_WMASK 0x80
/* 1f chip control register */
-#define Z180_CCR_CLOCK_DIVIDE 0x80
-#define Z180_CCR_STDBY_IDLE1 0x40
-#define Z180_CCR_BREXT 0x20
-#define Z180_CCR_LNPHI 0x10
-#define Z180_CCR_STDBY_IDLE0 0x08
-#define Z180_CCR_LNIO 0x04
-#define Z180_CCR_LNCPU_CTL 0x02
-#define Z180_CCR_LNAD_DATA 0x01
-
-#define Z180_CCR_RESET 0x00
-#define Z180_CCR_RMASK 0xff
-#define Z180_CCR_WMASK 0xff
+#define Z180_CCR_CLOCK_DIVIDE 0x80
+#define Z180_CCR_STDBY_IDLE1 0x40
+#define Z180_CCR_BREXT 0x20
+#define Z180_CCR_LNPHI 0x10
+#define Z180_CCR_STDBY_IDLE0 0x08
+#define Z180_CCR_LNIO 0x04
+#define Z180_CCR_LNCPU_CTL 0x02
+#define Z180_CCR_LNAD_DATA 0x01
+
+#define Z180_CCR_RESET 0x00
+#define Z180_CCR_RMASK 0xff
+#define Z180_CCR_WMASK 0xff
/* 20 DMA source address register ch 0 L */
-#define Z180_SAR0L_SAR 0xff
+#define Z180_SAR0L_SAR 0xff
-#define Z180_SAR0L_RESET 0x00
-#define Z180_SAR0L_RMASK 0xff
-#define Z180_SAR0L_WMASK 0xff
+#define Z180_SAR0L_RESET 0x00
+#define Z180_SAR0L_RMASK 0xff
+#define Z180_SAR0L_WMASK 0xff
/* 21 DMA source address register ch 0 H */
-#define Z180_SAR0H_SAR 0xff
+#define Z180_SAR0H_SAR 0xff
-#define Z180_SAR0H_RESET 0x00
-#define Z180_SAR0H_RMASK 0xff
-#define Z180_SAR0H_WMASK 0xff
+#define Z180_SAR0H_RESET 0x00
+#define Z180_SAR0H_RMASK 0xff
+#define Z180_SAR0H_WMASK 0xff
/* 22 DMA source address register ch 0 B */
-#define Z180_SAR0B_SAR 0x0f
+#define Z180_SAR0B_SAR 0x0f
-#define Z180_SAR0B_RESET 0x00
-#define Z180_SAR0B_RMASK 0x0f
-#define Z180_SAR0B_WMASK 0x0f
+#define Z180_SAR0B_RESET 0x00
+#define Z180_SAR0B_RMASK 0x0f
+#define Z180_SAR0B_WMASK 0x0f
/* 23 DMA destination address register ch 0 L */
-#define Z180_DAR0L_DAR 0xff
+#define Z180_DAR0L_DAR 0xff
-#define Z180_DAR0L_RESET 0x00
-#define Z180_DAR0L_RMASK 0xff
-#define Z180_DAR0L_WMASK 0xff
+#define Z180_DAR0L_RESET 0x00
+#define Z180_DAR0L_RMASK 0xff
+#define Z180_DAR0L_WMASK 0xff
/* 24 DMA destination address register ch 0 H */
-#define Z180_DAR0H_DAR 0xff
+#define Z180_DAR0H_DAR 0xff
-#define Z180_DAR0H_RESET 0x00
-#define Z180_DAR0H_RMASK 0xff
-#define Z180_DAR0H_WMASK 0xff
+#define Z180_DAR0H_RESET 0x00
+#define Z180_DAR0H_RMASK 0xff
+#define Z180_DAR0H_WMASK 0xff
/* 25 DMA destination address register ch 0 B */
-#define Z180_DAR0B_DAR 0x00
+#define Z180_DAR0B_DAR 0x00
-#define Z180_DAR0B_RESET 0x00
-#define Z180_DAR0B_RMASK 0x0f
-#define Z180_DAR0B_WMASK 0x0f
+#define Z180_DAR0B_RESET 0x00
+#define Z180_DAR0B_RMASK 0x0f
+#define Z180_DAR0B_WMASK 0x0f
/* 26 DMA byte count register ch 0 L */
-#define Z180_BCR0L_BCR 0xff
+#define Z180_BCR0L_BCR 0xff
-#define Z180_BCR0L_RESET 0x00
-#define Z180_BCR0L_RMASK 0xff
-#define Z180_BCR0L_WMASK 0xff
+#define Z180_BCR0L_RESET 0x00
+#define Z180_BCR0L_RMASK 0xff
+#define Z180_BCR0L_WMASK 0xff
/* 27 DMA byte count register ch 0 H */
-#define Z180_BCR0H_BCR 0xff
+#define Z180_BCR0H_BCR 0xff
-#define Z180_BCR0H_RESET 0x00
-#define Z180_BCR0H_RMASK 0xff
-#define Z180_BCR0H_WMASK 0xff
+#define Z180_BCR0H_RESET 0x00
+#define Z180_BCR0H_RMASK 0xff
+#define Z180_BCR0H_WMASK 0xff
/* 28 DMA memory address register ch 1 L */
-#define Z180_MAR1L_MAR 0xff
+#define Z180_MAR1L_MAR 0xff
-#define Z180_MAR1L_RESET 0x00
-#define Z180_MAR1L_RMASK 0xff
-#define Z180_MAR1L_WMASK 0xff
+#define Z180_MAR1L_RESET 0x00
+#define Z180_MAR1L_RMASK 0xff
+#define Z180_MAR1L_WMASK 0xff
/* 29 DMA memory address register ch 1 H */
-#define Z180_MAR1H_MAR 0xff
+#define Z180_MAR1H_MAR 0xff
-#define Z180_MAR1H_RESET 0x00
-#define Z180_MAR1H_RMASK 0xff
-#define Z180_MAR1H_WMASK 0xff
+#define Z180_MAR1H_RESET 0x00
+#define Z180_MAR1H_RMASK 0xff
+#define Z180_MAR1H_WMASK 0xff
/* 2a DMA memory address register ch 1 B */
-#define Z180_MAR1B_MAR 0x0f
+#define Z180_MAR1B_MAR 0x0f
-#define Z180_MAR1B_RESET 0x00
-#define Z180_MAR1B_RMASK 0x0f
-#define Z180_MAR1B_WMASK 0x0f
+#define Z180_MAR1B_RESET 0x00
+#define Z180_MAR1B_RMASK 0x0f
+#define Z180_MAR1B_WMASK 0x0f
/* 2b DMA I/O address register ch 1 L */
-#define Z180_IAR1L_IAR 0xff
+#define Z180_IAR1L_IAR 0xff
-#define Z180_IAR1L_RESET 0x00
-#define Z180_IAR1L_RMASK 0xff
-#define Z180_IAR1L_WMASK 0xff
+#define Z180_IAR1L_RESET 0x00
+#define Z180_IAR1L_RMASK 0xff
+#define Z180_IAR1L_WMASK 0xff
/* 2c DMA I/O address register ch 1 H */
-#define Z180_IAR1H_IAR 0xff
+#define Z180_IAR1H_IAR 0xff
-#define Z180_IAR1H_RESET 0x00
-#define Z180_IAR1H_RMASK 0xff
-#define Z180_IAR1H_WMASK 0xff
+#define Z180_IAR1H_RESET 0x00
+#define Z180_IAR1H_RMASK 0xff
+#define Z180_IAR1H_WMASK 0xff
/* 2d (Z8S180/Z8L180) DMA I/O address register ch 1 B */
-#define Z180_IAR1B_IAR 0x0f
+#define Z180_IAR1B_IAR 0x0f
-#define Z180_IAR1B_RESET 0x00
-#define Z180_IAR1B_RMASK 0x0f
-#define Z180_IAR1B_WMASK 0x0f
+#define Z180_IAR1B_RESET 0x00
+#define Z180_IAR1B_RMASK 0x0f
+#define Z180_IAR1B_WMASK 0x0f
/* 2e DMA byte count register ch 1 L */
-#define Z180_BCR1L_BCR 0xff
+#define Z180_BCR1L_BCR 0xff
-#define Z180_BCR1L_RESET 0x00
-#define Z180_BCR1L_RMASK 0xff
-#define Z180_BCR1L_WMASK 0xff
+#define Z180_BCR1L_RESET 0x00
+#define Z180_BCR1L_RMASK 0xff
+#define Z180_BCR1L_WMASK 0xff
/* 2f DMA byte count register ch 1 H */
-#define Z180_BCR1H_BCR 0xff
+#define Z180_BCR1H_BCR 0xff
-#define Z180_BCR1H_RESET 0x00
-#define Z180_BCR1H_RMASK 0xff
-#define Z180_BCR1H_WMASK 0xff
+#define Z180_BCR1H_RESET 0x00
+#define Z180_BCR1H_RMASK 0xff
+#define Z180_BCR1H_WMASK 0xff
/* 30 DMA status register */
-#define Z180_DSTAT_DE1 0x80 /* DMA enable ch 1 */
-#define Z180_DSTAT_DE0 0x40 /* DMA enable ch 0 */
-#define Z180_DSTAT_DWE1 0x20 /* DMA write enable ch 0 (active low) */
-#define Z180_DSTAT_DWE0 0x10 /* DMA write enable ch 1 (active low) */
-#define Z180_DSTAT_DIE1 0x08 /* DMA IRQ enable ch 1 */
-#define Z180_DSTAT_DIE0 0x04 /* DMA IRQ enable ch 0 */
-#define Z180_DSTAT_DME 0x01 /* DMA enable (read only) */
-
-#define Z180_DSTAT_RESET 0x30
-#define Z180_DSTAT_RMASK 0xfd
-#define Z180_DSTAT_WMASK 0xcc
+#define Z180_DSTAT_DE1 0x80 /* DMA enable ch 1 */
+#define Z180_DSTAT_DE0 0x40 /* DMA enable ch 0 */
+#define Z180_DSTAT_DWE1 0x20 /* DMA write enable ch 0 (active low) */
+#define Z180_DSTAT_DWE0 0x10 /* DMA write enable ch 1 (active low) */
+#define Z180_DSTAT_DIE1 0x08 /* DMA IRQ enable ch 1 */
+#define Z180_DSTAT_DIE0 0x04 /* DMA IRQ enable ch 0 */
+#define Z180_DSTAT_DME 0x01 /* DMA enable (read only) */
+
+#define Z180_DSTAT_RESET 0x30
+#define Z180_DSTAT_RMASK 0xfd
+#define Z180_DSTAT_WMASK 0xcc
/* 31 DMA mode register */
-#define Z180_DMODE_DM 0x30
-#define Z180_DMODE_SM 0x0c
-#define Z180_DMODE_MMOD 0x04
+#define Z180_DMODE_DM 0x30
+#define Z180_DMODE_SM 0x0c
+#define Z180_DMODE_MMOD 0x04
-#define Z180_DMODE_RESET 0x00
-#define Z180_DMODE_RMASK 0x3e
-#define Z180_DMODE_WMASK 0x3e
+#define Z180_DMODE_RESET 0x00
+#define Z180_DMODE_RMASK 0x3e
+#define Z180_DMODE_WMASK 0x3e
/* 32 DMA/WAIT control register */
-#define Z180_DCNTL_MWI1 0x80
-#define Z180_DCNTL_MWI0 0x40
-#define Z180_DCNTL_IWI1 0x20
-#define Z180_DCNTL_IWI0 0x10
-#define Z180_DCNTL_DMS1 0x08
-#define Z180_DCNTL_DMS0 0x04
-#define Z180_DCNTL_DIM1 0x02
-#define Z180_DCNTL_DIM0 0x01
-
-#define Z180_DCNTL_RESET 0x00
-#define Z180_DCNTL_RMASK 0xff
-#define Z180_DCNTL_WMASK 0xff
+#define Z180_DCNTL_MWI1 0x80
+#define Z180_DCNTL_MWI0 0x40
+#define Z180_DCNTL_IWI1 0x20
+#define Z180_DCNTL_IWI0 0x10
+#define Z180_DCNTL_DMS1 0x08
+#define Z180_DCNTL_DMS0 0x04
+#define Z180_DCNTL_DIM1 0x02
+#define Z180_DCNTL_DIM0 0x01
+
+#define Z180_DCNTL_RESET 0x00
+#define Z180_DCNTL_RMASK 0xff
+#define Z180_DCNTL_WMASK 0xff
/* 33 INT vector low register */
-#define Z180_IL_IL 0xe0
+#define Z180_IL_IL 0xe0
-#define Z180_IL_RESET 0x00
-#define Z180_IL_RMASK 0xe0
-#define Z180_IL_WMASK 0xe0
+#define Z180_IL_RESET 0x00
+#define Z180_IL_RMASK 0xe0
+#define Z180_IL_WMASK 0xe0
/* 34 INT/TRAP control register */
-#define Z180_ITC_TRAP 0x80
-#define Z180_ITC_UFO 0x40
-#define Z180_ITC_ITE2 0x04
-#define Z180_ITC_ITE1 0x02
-#define Z180_ITC_ITE0 0x01
+#define Z180_ITC_TRAP 0x80
+#define Z180_ITC_UFO 0x40
+#define Z180_ITC_ITE2 0x04
+#define Z180_ITC_ITE1 0x02
+#define Z180_ITC_ITE0 0x01
-#define Z180_ITC_RESET 0x01
-#define Z180_ITC_RMASK 0xc7
-#define Z180_ITC_WMASK 0x87
+#define Z180_ITC_RESET 0x01
+#define Z180_ITC_RMASK 0xc7
+#define Z180_ITC_WMASK 0x87
/* 35 reserved */
-#define Z180_IO35_RESET 0x00
-#define Z180_IO35_RMASK 0xff
-#define Z180_IO35_WMASK 0xff
+#define Z180_IO35_RESET 0x00
+#define Z180_IO35_RMASK 0xff
+#define Z180_IO35_WMASK 0xff
/* 36 refresh control register */
-#define Z180_RCR_REFE 0x80
-#define Z180_RCR_REFW 0x80
-#define Z180_RCR_CYC 0x03
+#define Z180_RCR_REFE 0x80
+#define Z180_RCR_REFW 0x80
+#define Z180_RCR_CYC 0x03
-#define Z180_RCR_RESET 0xc0
-#define Z180_RCR_RMASK 0xc3
-#define Z180_RCR_WMASK 0xc3
+#define Z180_RCR_RESET 0xc0
+#define Z180_RCR_RMASK 0xc3
+#define Z180_RCR_WMASK 0xc3
/* 37 reserved */
-#define Z180_IO37_RESET 0x00
-#define Z180_IO37_RMASK 0xff
-#define Z180_IO37_WMASK 0xff
+#define Z180_IO37_RESET 0x00
+#define Z180_IO37_RMASK 0xff
+#define Z180_IO37_WMASK 0xff
/* 38 MMU common base register */
-#define Z180_CBR_CB 0xff
+#define Z180_CBR_CB 0xff
-#define Z180_CBR_RESET 0x00
-#define Z180_CBR_RMASK 0xff
-#define Z180_CBR_WMASK 0xff
+#define Z180_CBR_RESET 0x00
+#define Z180_CBR_RMASK 0xff
+#define Z180_CBR_WMASK 0xff
/* 39 MMU bank base register */
-#define Z180_BBR_BB 0xff
+#define Z180_BBR_BB 0xff
-#define Z180_BBR_RESET 0x00
-#define Z180_BBR_RMASK 0xff
-#define Z180_BBR_WMASK 0xff
+#define Z180_BBR_RESET 0x00
+#define Z180_BBR_RMASK 0xff
+#define Z180_BBR_WMASK 0xff
/* 3a MMU common/bank area register */
-#define Z180_CBAR_CA 0xf0
-#define Z180_CBAR_BA 0x0f
+#define Z180_CBAR_CA 0xf0
+#define Z180_CBAR_BA 0x0f
-#define Z180_CBAR_RESET 0xf0
-#define Z180_CBAR_RMASK 0xff
-#define Z180_CBAR_WMASK 0xff
+#define Z180_CBAR_RESET 0xf0
+#define Z180_CBAR_RMASK 0xff
+#define Z180_CBAR_WMASK 0xff
/* 3b reserved */
-#define Z180_IO3B_RESET 0x00
-#define Z180_IO3B_RMASK 0xff
-#define Z180_IO3B_WMASK 0xff
+#define Z180_IO3B_RESET 0x00
+#define Z180_IO3B_RMASK 0xff
+#define Z180_IO3B_WMASK 0xff
/* 3c reserved */
-#define Z180_IO3C_RESET 0x00
-#define Z180_IO3C_RMASK 0xff
-#define Z180_IO3C_WMASK 0xff
+#define Z180_IO3C_RESET 0x00
+#define Z180_IO3C_RMASK 0xff
+#define Z180_IO3C_WMASK 0xff
/* 3d reserved */
-#define Z180_IO3D_RESET 0x00
-#define Z180_IO3D_RMASK 0xff
-#define Z180_IO3D_WMASK 0xff
+#define Z180_IO3D_RESET 0x00
+#define Z180_IO3D_RMASK 0xff
+#define Z180_IO3D_WMASK 0xff
/* 3e operation mode control register */
-#define Z180_OMCR_RESET 0x00
-#define Z180_OMCR_RMASK 0xff
-#define Z180_OMCR_WMASK 0xff
+#define Z180_OMCR_RESET 0x00
+#define Z180_OMCR_RMASK 0xff
+#define Z180_OMCR_WMASK 0xff
/* 3f I/O control register */
-#define Z180_IOCR_RESET 0x00
-#define Z180_IOCR_RMASK 0xff
-#define Z180_IOCR_WMASK 0xff
+#define Z180_IOCR_RESET 0x00
+#define Z180_IOCR_RMASK 0xff
+#define Z180_IOCR_WMASK 0xff
/***************************************************************************
CPU PREFIXES
@@ -799,20 +799,20 @@ static void set_irq_line(z180_state *cpustate, int irqline, int state);
order is important here - see z180tbl.h
***************************************************************************/
-#define Z180_PREFIX_op 0
-#define Z180_PREFIX_cb 1
-#define Z180_PREFIX_dd 2
-#define Z180_PREFIX_ed 3
-#define Z180_PREFIX_fd 4
-#define Z180_PREFIX_xycb 5
+#define Z180_PREFIX_op 0
+#define Z180_PREFIX_cb 1
+#define Z180_PREFIX_dd 2
+#define Z180_PREFIX_ed 3
+#define Z180_PREFIX_fd 4
+#define Z180_PREFIX_xycb 5
-#define Z180_PREFIX_COUNT (Z180_PREFIX_xycb + 1)
+#define Z180_PREFIX_COUNT (Z180_PREFIX_xycb + 1)
-static UINT8 SZ[256]; /* zero and sign flags */
-static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
-static UINT8 SZP[256]; /* zero, sign and parity flags */
+static UINT8 SZ[256]; /* zero and sign flags */
+static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
+static UINT8 SZP[256]; /* zero, sign and parity flags */
static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
@@ -1642,16 +1642,16 @@ static int z180_dma0(z180_state *cpustate, int max_cycles)
}
switch( cpustate->IO_DMODE & (Z180_DMODE_SM | Z180_DMODE_DM) )
{
- case 0x00: /* memory SAR0+1 to memory DAR0+1 */
+ case 0x00: /* memory SAR0+1 to memory DAR0+1 */
cpustate->program->write_byte(dar0++, cpustate->program->read_byte(sar0++));
break;
- case 0x04: /* memory SAR0-1 to memory DAR0+1 */
+ case 0x04: /* memory SAR0-1 to memory DAR0+1 */
cpustate->program->write_byte(dar0++, cpustate->program->read_byte(sar0--));
break;
- case 0x08: /* memory SAR0 fixed to memory DAR0+1 */
+ case 0x08: /* memory SAR0 fixed to memory DAR0+1 */
cpustate->program->write_byte(dar0++, cpustate->program->read_byte(sar0));
break;
- case 0x0c: /* I/O SAR0 fixed to memory DAR0+1 */
+ case 0x0c: /* I/O SAR0 fixed to memory DAR0+1 */
if (cpustate->iol & Z180_DREQ0)
{
cpustate->program->write_byte(dar0++, IN(cpustate, sar0));
@@ -1663,18 +1663,18 @@ static int z180_dma0(z180_state *cpustate, int max_cycles)
}
}
break;
- case 0x10: /* memory SAR0+1 to memory DAR0-1 */
+ case 0x10: /* memory SAR0+1 to memory DAR0-1 */
cpustate->program->write_byte(dar0--, cpustate->program->read_byte(sar0++));
break;
- case 0x14: /* memory SAR0-1 to memory DAR0-1 */
+ case 0x14: /* memory SAR0-1 to memory DAR0-1 */
cpustate->program->write_byte(dar0--, cpustate->program->read_byte(sar0--));
break;
- case 0x18: /* memory SAR0 fixed to memory DAR0-1 */
+ case 0x18: /* memory SAR0 fixed to memory DAR0-1 */
cpustate->program->write_byte(dar0--, cpustate->program->read_byte(sar0));
break;
- case 0x1c: /* I/O SAR0 fixed to memory DAR0-1 */
+ case 0x1c: /* I/O SAR0 fixed to memory DAR0-1 */
if (cpustate->iol & Z180_DREQ0)
- {
+ {
cpustate->program->write_byte(dar0--, IN(cpustate, sar0));
/* edge sensitive DREQ0 ? */
if (cpustate->IO_DCNTL & Z180_DCNTL_DIM0)
@@ -1684,19 +1684,19 @@ static int z180_dma0(z180_state *cpustate, int max_cycles)
}
}
break;
- case 0x20: /* memory SAR0+1 to memory DAR0 fixed */
+ case 0x20: /* memory SAR0+1 to memory DAR0 fixed */
cpustate->program->write_byte(dar0, cpustate->program->read_byte(sar0++));
break;
- case 0x24: /* memory SAR0-1 to memory DAR0 fixed */
+ case 0x24: /* memory SAR0-1 to memory DAR0 fixed */
cpustate->program->write_byte(dar0, cpustate->program->read_byte(sar0--));
break;
- case 0x28: /* reserved */
+ case 0x28: /* reserved */
break;
- case 0x2c: /* reserved */
+ case 0x2c: /* reserved */
break;
- case 0x30: /* memory SAR0+1 to I/O DAR0 fixed */
+ case 0x30: /* memory SAR0+1 to I/O DAR0 fixed */
if (cpustate->iol & Z180_DREQ0)
- {
+ {
OUT(cpustate, dar0, cpustate->program->read_byte(sar0++));
/* edge sensitive DREQ0 ? */
if (cpustate->IO_DCNTL & Z180_DCNTL_DIM0)
@@ -1706,9 +1706,9 @@ static int z180_dma0(z180_state *cpustate, int max_cycles)
}
}
break;
- case 0x34: /* memory SAR0-1 to I/O DAR0 fixed */
+ case 0x34: /* memory SAR0-1 to I/O DAR0 fixed */
if (cpustate->iol & Z180_DREQ0)
- {
+ {
OUT(cpustate, dar0, cpustate->program->read_byte(sar0--));
/* edge sensitive DREQ0 ? */
if (cpustate->IO_DCNTL & Z180_DCNTL_DIM0)
@@ -1718,9 +1718,9 @@ static int z180_dma0(z180_state *cpustate, int max_cycles)
}
}
break;
- case 0x38: /* reserved */
+ case 0x38: /* reserved */
break;
- case 0x3c: /* reserved */
+ case 0x3c: /* reserved */
break;
}
bcr0--;
@@ -1776,16 +1776,16 @@ static int z180_dma1(z180_state *cpustate)
switch (cpustate->IO_DCNTL & (Z180_DCNTL_DIM1 | Z180_DCNTL_DIM0))
{
- case 0x00: /* memory MAR1+1 to I/O IAR1 fixed */
+ case 0x00: /* memory MAR1+1 to I/O IAR1 fixed */
cpustate->iospace->write_byte(iar1, cpustate->program->read_byte(mar1++));
break;
- case 0x01: /* memory MAR1-1 to I/O IAR1 fixed */
+ case 0x01: /* memory MAR1-1 to I/O IAR1 fixed */
cpustate->iospace->write_byte(iar1, cpustate->program->read_byte(mar1--));
break;
- case 0x02: /* I/O IAR1 fixed to memory MAR1+1 */
+ case 0x02: /* I/O IAR1 fixed to memory MAR1+1 */
cpustate->program->write_byte(mar1++, cpustate->iospace->read_byte(iar1));
break;
- case 0x03: /* I/O IAR1 fixed to memory MAR1-1 */
+ case 0x03: /* I/O IAR1 fixed to memory MAR1-1 */
cpustate->program->write_byte(mar1--, cpustate->iospace->read_byte(iar1));
break;
}
@@ -1817,124 +1817,124 @@ static void z180_write_iolines(z180_state *cpustate, UINT32 data)
{
UINT32 changes = cpustate->iol ^ data;
- /* I/O asynchronous clock 0 (active high) or DREQ0 (mux) */
+ /* I/O asynchronous clock 0 (active high) or DREQ0 (mux) */
if (changes & Z180_CKA0)
{
LOG(("Z180 '%s' CKA0 %d\n", cpustate->device->tag(), data & Z180_CKA0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CKA0) | (data & Z180_CKA0);
- }
+ }
- /* I/O asynchronous clock 1 (active high) or TEND1 (mux) */
+ /* I/O asynchronous clock 1 (active high) or TEND1 (mux) */
if (changes & Z180_CKA1)
{
LOG(("Z180 '%s' CKA1 %d\n", cpustate->device->tag(), data & Z180_CKA1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CKA1) | (data & Z180_CKA1);
- }
+ }
- /* I/O serial clock (active high) */
+ /* I/O serial clock (active high) */
if (changes & Z180_CKS)
{
LOG(("Z180 '%s' CKS %d\n", cpustate->device->tag(), data & Z180_CKS ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CKS) | (data & Z180_CKS);
- }
+ }
- /* I clear to send 0 (active low) */
+ /* I clear to send 0 (active low) */
if (changes & Z180_CTS0)
{
LOG(("Z180 '%s' CTS0 %d\n", cpustate->device->tag(), data & Z180_CTS0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CTS0) | (data & Z180_CTS0);
- }
+ }
- /* I clear to send 1 (active low) or RXS (mux) */
+ /* I clear to send 1 (active low) or RXS (mux) */
if (changes & Z180_CTS1)
{
LOG(("Z180 '%s' CTS1 %d\n", cpustate->device->tag(), data & Z180_CTS1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_CTS1) | (data & Z180_CTS1);
- }
+ }
- /* I data carrier detect (active low) */
+ /* I data carrier detect (active low) */
if (changes & Z180_DCD0)
{
LOG(("Z180 '%s' DCD0 %d\n", cpustate->device->tag(), data & Z180_DCD0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_DCD0) | (data & Z180_DCD0);
- }
+ }
- /* I data request DMA ch 0 (active low) or CKA0 (mux) */
+ /* I data request DMA ch 0 (active low) or CKA0 (mux) */
if (changes & Z180_DREQ0)
{
LOG(("Z180 '%s' DREQ0 %d\n", cpustate->device->tag(), data & Z180_DREQ0 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_DREQ0) | (data & Z180_DREQ0);
- }
+ }
- /* I data request DMA ch 1 (active low) */
+ /* I data request DMA ch 1 (active low) */
if (changes & Z180_DREQ1)
{
LOG(("Z180 '%s' DREQ1 %d\n", cpustate->device->tag(), data & Z180_DREQ1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_DREQ1) | (data & Z180_DREQ1);
- }
+ }
- /* I asynchronous receive data 0 (active high) */
+ /* I asynchronous receive data 0 (active high) */
if (changes & Z180_RXA0)
{
LOG(("Z180 '%s' RXA0 %d\n", cpustate->device->tag(), data & Z180_RXA0 ? 1 : 0));
- cpustate->iol = (cpustate->iol & ~Z180_RXA0) | (data & Z180_RXA0);
- }
+ cpustate->iol = (cpustate->iol & ~Z180_RXA0) | (data & Z180_RXA0);
+ }
- /* I asynchronous receive data 1 (active high) */
+ /* I asynchronous receive data 1 (active high) */
if (changes & Z180_RXA1)
{
LOG(("Z180 '%s' RXA1 %d\n", cpustate->device->tag(), data & Z180_RXA1 ? 1 : 0));
cpustate->iol = (cpustate->iol & ~Z180_RXA1) | (data & Z180_RXA1);
- }
+ }
- /* I clocked serial receive data (active high) or CTS1 (mux) */
+ /* I clocked serial receive data (active high) or CTS1 (mux) */
if (changes & Z180_RXS)
{
LOG(("Z180 '%s' RXS %d\n", cpustate->device->tag(), data & Z180_RXS ? 1 : 0));
- cpustate->iol = (cpustate->iol & ~Z180_RXS) | (data & Z180_RXS);
- }
+ cpustate->iol = (cpustate->iol & ~Z180_RXS) | (data & Z180_RXS);
+ }
- /* O request to send (active low) */
+ /* O request to send (active low) */
if (changes & Z180_RTS0)
{
LOG(("Z180 '%s' RTS0 won't change output\n", cpustate->device->tag()));
- }
+ }
- /* O transfer end 0 (active low) or CKA1 (mux) */
+ /* O transfer end 0 (active low) or CKA1 (mux) */
if (changes & Z180_TEND0)
{
LOG(("Z180 '%s' TEND0 won't change output\n", cpustate->device->tag()));
- }
+ }
- /* O transfer end 1 (active low) */
+ /* O transfer end 1 (active low) */
if (changes & Z180_TEND1)
{
LOG(("Z180 '%s' TEND1 won't change output\n", cpustate->device->tag()));
- }
+ }
- /* O transfer out (PRT channel, active low) or A18 (mux) */
+ /* O transfer out (PRT channel, active low) or A18 (mux) */
if (changes & Z180_A18_TOUT)
{
LOG(("Z180 '%s' TOUT won't change output\n", cpustate->device->tag()));
- }
+ }
- /* O asynchronous transmit data 0 (active high) */
+ /* O asynchronous transmit data 0 (active high) */
if (changes & Z180_TXA0)
{
LOG(("Z180 '%s' TXA0 won't change output\n", cpustate->device->tag()));
- }
+ }
- /* O asynchronous transmit data 1 (active high) */
+ /* O asynchronous transmit data 1 (active high) */
if (changes & Z180_TXA1)
{
LOG(("Z180 '%s' TXA1 won't change output\n", cpustate->device->tag()));
- }
+ }
- /* O clocked serial transmit data (active high) */
+ /* O clocked serial transmit data (active high) */
if (changes & Z180_TXS)
{
LOG(("Z180 '%s' TXS won't change output\n", cpustate->device->tag()));
- }
+ }
}
@@ -2103,9 +2103,9 @@ static CPU_RESET( z180 )
int oldval, newval, val;
UINT8 *padd, *padc, *psub, *psbc;
/* allocate big flag arrays once */
- padd = &SZHVC_add[ 0*256];
+ padd = &SZHVC_add[ 0*256];
padc = &SZHVC_add[256*256];
- psub = &SZHVC_sub[ 0*256];
+ psub = &SZHVC_sub[ 0*256];
psbc = &SZHVC_sub[256*256];
for (oldval = 0; oldval < 256; oldval++)
{
@@ -2114,7 +2114,7 @@ static CPU_RESET( z180 )
/* add or adc w/o carry set */
val = newval - oldval;
*padd = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
- *padd |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *padd |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) < (oldval & 0x0f) ) *padd |= HF;
if( newval < oldval ) *padd |= CF;
@@ -2124,7 +2124,7 @@ static CPU_RESET( z180 )
/* adc with carry set */
val = newval - oldval - 1;
*padc = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
- *padc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *padc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) <= (oldval & 0x0f) ) *padc |= HF;
if( newval <= oldval ) *padc |= CF;
if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padc |= VF;
@@ -2133,7 +2133,7 @@ static CPU_RESET( z180 )
/* cp, sub or sbc w/o carry set */
val = oldval - newval;
*psub = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
- *psub |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *psub |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) > (oldval & 0x0f) ) *psub |= HF;
if( newval > oldval ) *psub |= CF;
if( (val^oldval) & (oldval^newval) & 0x80 ) *psub |= VF;
@@ -2142,7 +2142,7 @@ static CPU_RESET( z180 )
/* sbc with carry set */
val = oldval - newval - 1;
*psbc = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
- *psbc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *psbc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) >= (oldval & 0x0f) ) *psbc |= HF;
if( newval >= oldval ) *psbc |= CF;
if( (val^oldval) & (oldval^newval) & 0x80 ) *psbc |= VF;
@@ -2161,9 +2161,9 @@ static CPU_RESET( z180 )
if( i&0x40 ) ++p;
if( i&0x80 ) ++p;
SZ[i] = i ? i & SF : ZF;
- SZ[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
+ SZ[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
SZ_BIT[i] = i ? i & SF : ZF | PF;
- SZ_BIT[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
+ SZ_BIT[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
SZP[i] = SZ[i] | ((p & 1) ? 0 : PF);
SZHV_inc[i] = SZ[i];
if( i == 0x80 ) SZHV_inc[i] |= VF;
@@ -2219,7 +2219,7 @@ static CPU_RESET( z180 )
memcpy(cpustate->cc, (UINT8 *)cc_default, sizeof(cpustate->cc));
cpustate->_IX = cpustate->_IY = 0xffff; /* IX and IY are FFFF after a reset! */
- cpustate->_F = ZF; /* Zero flag is set */
+ cpustate->_F = ZF; /* Zero flag is set */
for (i=0; i <= Z180_INT_MAX; i++)
cpustate->int_pending[i] = 0;
@@ -2245,7 +2245,7 @@ static CPU_RESET( z180 )
cpustate->IO_TMDR0H = Z180_TMDR0H_RESET;
cpustate->IO_RLDR0L = Z180_RLDR0L_RESET;
cpustate->IO_RLDR0H = Z180_RLDR0H_RESET;
- cpustate->IO_TCR = Z180_TCR_RESET;
+ cpustate->IO_TCR = Z180_TCR_RESET;
cpustate->IO_IO11 = Z180_IO11_RESET;
cpustate->IO_ASEXT0 = Z180_ASEXT0_RESET;
cpustate->IO_ASEXT1 = Z180_ASEXT1_RESET;
@@ -2253,14 +2253,14 @@ static CPU_RESET( z180 )
cpustate->IO_TMDR1H = Z180_TMDR1H_RESET;
cpustate->IO_RLDR1L = Z180_RLDR1L_RESET;
cpustate->IO_RLDR1H = Z180_RLDR1H_RESET;
- cpustate->IO_FRC = Z180_FRC_RESET;
+ cpustate->IO_FRC = Z180_FRC_RESET;
cpustate->IO_IO19 = Z180_IO19_RESET;
cpustate->IO_ASTC0L = Z180_ASTC0L_RESET;
cpustate->IO_ASTC0H = Z180_ASTC0H_RESET;
cpustate->IO_ASTC1L = Z180_ASTC1L_RESET;
cpustate->IO_ASTC1H = Z180_ASTC1H_RESET;
- cpustate->IO_CMR = Z180_CMR_RESET;
- cpustate->IO_CCR = Z180_CCR_RESET;
+ cpustate->IO_CMR = Z180_CMR_RESET;
+ cpustate->IO_CCR = Z180_CCR_RESET;
cpustate->IO_SAR0L = Z180_SAR0L_RESET;
cpustate->IO_SAR0H = Z180_SAR0H_RESET;
cpustate->IO_SAR0B = Z180_SAR0B_RESET;
@@ -2280,13 +2280,13 @@ static CPU_RESET( z180 )
cpustate->IO_DSTAT = Z180_DSTAT_RESET;
cpustate->IO_DMODE = Z180_DMODE_RESET;
cpustate->IO_DCNTL = Z180_DCNTL_RESET;
- cpustate->IO_IL = Z180_IL_RESET;
- cpustate->IO_ITC = Z180_ITC_RESET;
+ cpustate->IO_IL = Z180_IL_RESET;
+ cpustate->IO_ITC = Z180_ITC_RESET;
cpustate->IO_IO35 = Z180_IO35_RESET;
- cpustate->IO_RCR = Z180_RCR_RESET;
+ cpustate->IO_RCR = Z180_RCR_RESET;
cpustate->IO_IO37 = Z180_IO37_RESET;
- cpustate->IO_CBR = Z180_CBR_RESET;
- cpustate->IO_BBR = Z180_BBR_RESET;
+ cpustate->IO_CBR = Z180_CBR_RESET;
+ cpustate->IO_BBR = Z180_BBR_RESET;
cpustate->IO_CBAR = Z180_CBAR_RESET;
cpustate->IO_IO3B = Z180_IO3B_RESET;
cpustate->IO_IO3C = Z180_IO3C_RESET;
@@ -2405,8 +2405,8 @@ static CPU_EXECUTE( z180 )
if (cpustate->nmi_pending)
{
LOG(("Z180 '%s' take NMI\n", cpustate->device->tag()));
- cpustate->_PPC = -1; /* there isn't a valid previous program counter */
- LEAVE_HALT(cpustate); /* Check if processor was halted */
+ cpustate->_PPC = -1; /* there isn't a valid previous program counter */
+ LEAVE_HALT(cpustate); /* Check if processor was halted */
/* disable DMA transfers!! */
cpustate->IO_DSTAT &= ~Z180_DSTAT_DME;
@@ -2421,7 +2421,7 @@ static CPU_EXECUTE( z180 )
}
again:
- /* check if any DMA transfer is running */
+ /* check if any DMA transfer is running */
if ((cpustate->IO_DSTAT & Z180_DSTAT_DME) == Z180_DSTAT_DME)
{
/* check if DMA channel 0 is running and also is in burst mode */
@@ -2439,7 +2439,7 @@ again:
{
do
{
- curcycles = check_interrupts(cpustate);
+ curcycles = check_interrupts(cpustate);
cpustate->icount -= curcycles;
handle_io_timers(cpustate, curcycles);
cpustate->after_EI = 0;
@@ -2462,13 +2462,13 @@ again:
handle_io_timers(cpustate, curcycles);
/* FIXME:
- * For simultaneous DREQ0 and DREQ1 requests, channel 0 has priority
- * over channel 1. When channel 0 is performing a memory to/from memory
- * transfer, channel 1 cannot operate until the channel 0 operation has
- * terminated. If channel 1 is operating, channel 0 cannot operate until
- * channel 1 releases control of the bus.
- *
- */
+ * For simultaneous DREQ0 and DREQ1 requests, channel 0 has priority
+ * over channel 1. When channel 0 is performing a memory to/from memory
+ * transfer, channel 1 cannot operate until the channel 0 operation has
+ * terminated. If channel 1 is operating, channel 0 cannot operate until
+ * channel 1 releases control of the bus.
+ *
+ */
curcycles = z180_dma0(cpustate, 6);
cpustate->icount -= curcycles;
handle_io_timers(cpustate, curcycles);
@@ -2482,13 +2482,13 @@ again:
break;
} while( cpustate->icount > 0 );
}
- }
+ }
- if (cpustate->icount > 0)
- {
- do
+ if (cpustate->icount > 0)
+ {
+ do
{
- curcycles = check_interrupts(cpustate);
+ curcycles = check_interrupts(cpustate);
cpustate->icount -= curcycles;
handle_io_timers(cpustate, curcycles);
cpustate->after_EI = 0;
@@ -2512,10 +2512,10 @@ again:
/* If DMA is started go to check the mode */
if ((cpustate->IO_DSTAT & Z180_DSTAT_DME) == Z180_DSTAT_DME)
goto again;
- } while( cpustate->icount > 0 );
+ } while( cpustate->icount > 0 );
}
- //cpustate->old_icount -= cpustate->icount;
+ //cpustate->old_icount -= cpustate->icount;
}
/****************************************************************************
@@ -2654,18 +2654,18 @@ static CPU_SET_INFO( z180 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + Z180_IRQ0: set_irq_line(cpustate, Z180_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + Z180_IRQ1: set_irq_line(cpustate, Z180_IRQ1, info->i); break;
- case CPUINFO_INT_INPUT_STATE + Z180_IRQ2: set_irq_line(cpustate, Z180_IRQ2, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + Z180_IRQ0: set_irq_line(cpustate, Z180_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + Z180_IRQ1: set_irq_line(cpustate, Z180_IRQ1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + Z180_IRQ2: set_irq_line(cpustate, Z180_IRQ2, info->i); break;
/* --- the following bits of info are set as pointers to data or functions --- */
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cpustate->cc[Z180_TABLE_op] = (UINT8 *)info->p; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cpustate->cc[Z180_TABLE_cb] = (UINT8 *)info->p; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cpustate->cc[Z180_TABLE_ed] = (UINT8 *)info->p; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cpustate->cc[Z180_TABLE_xy] = (UINT8 *)info->p; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cpustate->cc[Z180_TABLE_xycb] = (UINT8 *)info->p; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cpustate->cc[Z180_TABLE_ex] = (UINT8 *)info->p; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: cpustate->cc[Z180_TABLE_op] = (UINT8 *)info->p; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: cpustate->cc[Z180_TABLE_cb] = (UINT8 *)info->p; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: cpustate->cc[Z180_TABLE_ed] = (UINT8 *)info->p; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: cpustate->cc[Z180_TABLE_xy] = (UINT8 *)info->p; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: cpustate->cc[Z180_TABLE_xycb] = (UINT8 *)info->p; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: cpustate->cc[Z180_TABLE_ex] = (UINT8 *)info->p; break;
}
}
@@ -2680,57 +2680,57 @@ CPU_GET_INFO( z180 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z180_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
- case CPUINFO_INT_INPUT_STATE + Z180_IRQ0: info->i = cpustate->irq_state[0]; break;
- case CPUINFO_INT_INPUT_STATE + Z180_IRQ1: info->i = cpustate->irq_state[1]; break;
- case CPUINFO_INT_INPUT_STATE + Z180_IRQ2: info->i = cpustate->irq_state[2]; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z180_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 3; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 1; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + Z180_IRQ0: info->i = cpustate->irq_state[0]; break;
+ case CPUINFO_INT_INPUT_STATE + Z180_IRQ1: info->i = cpustate->irq_state[1]; break;
+ case CPUINFO_INT_INPUT_STATE + Z180_IRQ2: info->i = cpustate->irq_state[2]; break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z180); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z180); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z180); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z180); break;
- case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(z180); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z180); break;
- case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(z180); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z180); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z180); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(z180); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z180); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z180); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z180); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z180); break;
+ case CPUINFO_FCT_BURN: info->burn = CPU_BURN_NAME(z180); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z180); break;
+ case CPUINFO_FCT_TRANSLATE: info->translate = CPU_TRANSLATE_NAME(z180); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z180); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z180); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(z180); break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: info->p = (void *)cpustate->cc[Z180_TABLE_op]; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: info->p = (void *)cpustate->cc[Z180_TABLE_cb]; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: info->p = (void *)cpustate->cc[Z180_TABLE_ed]; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: info->p = (void *)cpustate->cc[Z180_TABLE_xy]; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: info->p = (void *)cpustate->cc[Z180_TABLE_xycb]; break;
- case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: info->p = (void *)cpustate->cc[Z180_TABLE_ex]; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_op: info->p = (void *)cpustate->cc[Z180_TABLE_op]; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_cb: info->p = (void *)cpustate->cc[Z180_TABLE_cb]; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ed: info->p = (void *)cpustate->cc[Z180_TABLE_ed]; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xy: info->p = (void *)cpustate->cc[Z180_TABLE_xy]; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_xycb: info->p = (void *)cpustate->cc[Z180_TABLE_xycb]; break;
+ case CPUINFO_PTR_Z180_CYCLE_TABLE + Z180_TABLE_ex: info->p = (void *)cpustate->cc[Z180_TABLE_ex]; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Z180"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z8x180"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "0.4"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Z180"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z8x180"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "0.4"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
}
}
diff --git a/src/emu/cpu/z180/z180.h b/src/emu/cpu/z180/z180.h
index 7cb62db363d..26ca10ac079 100644
--- a/src/emu/cpu/z180/z180.h
+++ b/src/emu/cpu/z180/z180.h
@@ -35,71 +35,71 @@ enum
Z180_DC1,
Z180_DC2,
Z180_DC3,
- Z180_CNTLA0, /* 00 ASCI control register A ch 0 */
- Z180_CNTLA1, /* 01 ASCI control register A ch 1 */
- Z180_CNTLB0, /* 02 ASCI control register B ch 0 */
- Z180_CNTLB1, /* 03 ASCI control register B ch 1 */
- Z180_STAT0, /* 04 ASCI status register 0 */
- Z180_STAT1, /* 05 ASCI status register 1 */
- Z180_TDR0, /* 06 ASCI transmit data register 0 */
- Z180_TDR1, /* 07 ASCI transmit data register 1 */
- Z180_RDR0, /* 08 ASCI receive data register 0 */
- Z180_RDR1, /* 09 ASCI receive data register 1 */
- Z180_CNTR, /* 0a CSI/O control/status register */
- Z180_TRDR, /* 0b CSI/O transmit/receive register */
- Z180_TMDR0L, /* 0c TIMER data register ch 0 L */
- Z180_TMDR0H, /* 0d TIMER data register ch 0 H */
- Z180_RLDR0L, /* 0e TIMER reload register ch 0 L */
- Z180_RLDR0H, /* 0f TIMER reload register ch 0 H */
- Z180_TCR, /* 10 TIMER control register */
- Z180_IO11, /* 11 reserved */
- Z180_ASEXT0, /* 12 (Z8S180/Z8L180) ASCI extension control register 0 */
- Z180_ASEXT1, /* 13 (Z8S180/Z8L180) ASCI extension control register 0 */
- Z180_TMDR1L, /* 14 TIMER data register ch 1 L */
- Z180_TMDR1H, /* 15 TIMER data register ch 1 H */
- Z180_RLDR1L, /* 16 TIMER reload register ch 1 L */
- Z180_RLDR1H, /* 17 TIMER reload register ch 1 H */
- Z180_FRC, /* 18 free running counter */
- Z180_IO19, /* 19 reserved */
- Z180_ASTC0L, /* 1a ASCI time constant ch 0 L */
- Z180_ASTC0H, /* 1b ASCI time constant ch 0 H */
- Z180_ASTC1L, /* 1c ASCI time constant ch 1 L */
- Z180_ASTC1H, /* 1d ASCI time constant ch 1 H */
- Z180_CMR, /* 1e clock multiplier */
- Z180_CCR, /* 1f chip control register */
- Z180_SAR0L, /* 20 DMA source address register ch 0 L */
- Z180_SAR0H, /* 21 DMA source address register ch 0 H */
- Z180_SAR0B, /* 22 DMA source address register ch 0 B */
- Z180_DAR0L, /* 23 DMA destination address register ch 0 L */
- Z180_DAR0H, /* 24 DMA destination address register ch 0 H */
- Z180_DAR0B, /* 25 DMA destination address register ch 0 B */
- Z180_BCR0L, /* 26 DMA byte count register ch 0 L */
- Z180_BCR0H, /* 27 DMA byte count register ch 0 H */
- Z180_MAR1L, /* 28 DMA memory address register ch 1 L */
- Z180_MAR1H, /* 29 DMA memory address register ch 1 H */
- Z180_MAR1B, /* 2a DMA memory address register ch 1 B */
- Z180_IAR1L, /* 2b DMA I/O address register ch 1 L */
- Z180_IAR1H, /* 2c DMA I/O address register ch 1 H */
- Z180_IAR1B, /* 2d (Z8S180/Z8L180) DMA I/O address register ch 1 B */
- Z180_BCR1L, /* 2e DMA byte count register ch 1 L */
- Z180_BCR1H, /* 2f DMA byte count register ch 1 H */
- Z180_DSTAT, /* 30 DMA status register */
- Z180_DMODE, /* 31 DMA mode register */
- Z180_DCNTL, /* 32 DMA/WAIT control register */
- Z180_IL, /* 33 INT vector low register */
- Z180_ITC, /* 34 INT/TRAP control register */
- Z180_IO35, /* 35 reserved */
- Z180_RCR, /* 36 refresh control register */
- Z180_IO37, /* 37 reserved */
- Z180_CBR, /* 38 MMU common base register */
- Z180_BBR, /* 39 MMU bank base register */
- Z180_CBAR, /* 3a MMU common/bank area register */
- Z180_IO3B, /* 3b reserved */
- Z180_IO3C, /* 3c reserved */
- Z180_IO3D, /* 3d reserved */
- Z180_OMCR, /* 3e operation mode control register */
- Z180_IOCR, /* 3f I/O control register */
- Z180_IOLINES, /* read/write I/O lines */
+ Z180_CNTLA0, /* 00 ASCI control register A ch 0 */
+ Z180_CNTLA1, /* 01 ASCI control register A ch 1 */
+ Z180_CNTLB0, /* 02 ASCI control register B ch 0 */
+ Z180_CNTLB1, /* 03 ASCI control register B ch 1 */
+ Z180_STAT0, /* 04 ASCI status register 0 */
+ Z180_STAT1, /* 05 ASCI status register 1 */
+ Z180_TDR0, /* 06 ASCI transmit data register 0 */
+ Z180_TDR1, /* 07 ASCI transmit data register 1 */
+ Z180_RDR0, /* 08 ASCI receive data register 0 */
+ Z180_RDR1, /* 09 ASCI receive data register 1 */
+ Z180_CNTR, /* 0a CSI/O control/status register */
+ Z180_TRDR, /* 0b CSI/O transmit/receive register */
+ Z180_TMDR0L, /* 0c TIMER data register ch 0 L */
+ Z180_TMDR0H, /* 0d TIMER data register ch 0 H */
+ Z180_RLDR0L, /* 0e TIMER reload register ch 0 L */
+ Z180_RLDR0H, /* 0f TIMER reload register ch 0 H */
+ Z180_TCR, /* 10 TIMER control register */
+ Z180_IO11, /* 11 reserved */
+ Z180_ASEXT0, /* 12 (Z8S180/Z8L180) ASCI extension control register 0 */
+ Z180_ASEXT1, /* 13 (Z8S180/Z8L180) ASCI extension control register 0 */
+ Z180_TMDR1L, /* 14 TIMER data register ch 1 L */
+ Z180_TMDR1H, /* 15 TIMER data register ch 1 H */
+ Z180_RLDR1L, /* 16 TIMER reload register ch 1 L */
+ Z180_RLDR1H, /* 17 TIMER reload register ch 1 H */
+ Z180_FRC, /* 18 free running counter */
+ Z180_IO19, /* 19 reserved */
+ Z180_ASTC0L, /* 1a ASCI time constant ch 0 L */
+ Z180_ASTC0H, /* 1b ASCI time constant ch 0 H */
+ Z180_ASTC1L, /* 1c ASCI time constant ch 1 L */
+ Z180_ASTC1H, /* 1d ASCI time constant ch 1 H */
+ Z180_CMR, /* 1e clock multiplier */
+ Z180_CCR, /* 1f chip control register */
+ Z180_SAR0L, /* 20 DMA source address register ch 0 L */
+ Z180_SAR0H, /* 21 DMA source address register ch 0 H */
+ Z180_SAR0B, /* 22 DMA source address register ch 0 B */
+ Z180_DAR0L, /* 23 DMA destination address register ch 0 L */
+ Z180_DAR0H, /* 24 DMA destination address register ch 0 H */
+ Z180_DAR0B, /* 25 DMA destination address register ch 0 B */
+ Z180_BCR0L, /* 26 DMA byte count register ch 0 L */
+ Z180_BCR0H, /* 27 DMA byte count register ch 0 H */
+ Z180_MAR1L, /* 28 DMA memory address register ch 1 L */
+ Z180_MAR1H, /* 29 DMA memory address register ch 1 H */
+ Z180_MAR1B, /* 2a DMA memory address register ch 1 B */
+ Z180_IAR1L, /* 2b DMA I/O address register ch 1 L */
+ Z180_IAR1H, /* 2c DMA I/O address register ch 1 H */
+ Z180_IAR1B, /* 2d (Z8S180/Z8L180) DMA I/O address register ch 1 B */
+ Z180_BCR1L, /* 2e DMA byte count register ch 1 L */
+ Z180_BCR1H, /* 2f DMA byte count register ch 1 H */
+ Z180_DSTAT, /* 30 DMA status register */
+ Z180_DMODE, /* 31 DMA mode register */
+ Z180_DCNTL, /* 32 DMA/WAIT control register */
+ Z180_IL, /* 33 INT vector low register */
+ Z180_ITC, /* 34 INT/TRAP control register */
+ Z180_IO35, /* 35 reserved */
+ Z180_RCR, /* 36 refresh control register */
+ Z180_IO37, /* 37 reserved */
+ Z180_CBR, /* 38 MMU common base register */
+ Z180_BBR, /* 39 MMU bank base register */
+ Z180_CBAR, /* 3a MMU common/bank area register */
+ Z180_IO3B, /* 3b reserved */
+ Z180_IO3C, /* 3c reserved */
+ Z180_IO3D, /* 3d reserved */
+ Z180_OMCR, /* 3e operation mode control register */
+ Z180_IOCR, /* 3f I/O control register */
+ Z180_IOLINES, /* read/write I/O lines */
Z180_GENPC = STATE_GENPC,
Z180_GENSP = STATE_GENSP,
@@ -113,7 +113,7 @@ enum
Z180_TABLE_ed,
Z180_TABLE_xy,
Z180_TABLE_xycb,
- Z180_TABLE_ex /* cycles counts for taken jr/jp/call and interrupt latency (rst opcodes) */
+ Z180_TABLE_ex /* cycles counts for taken jr/jp/call and interrupt latency (rst opcodes) */
};
enum
@@ -123,9 +123,9 @@ enum
};
-#define Z180_IRQ0 0 /* Execute IRQ1 */
-#define Z180_IRQ1 1 /* Execute IRQ1 */
-#define Z180_IRQ2 2 /* Execute IRQ2 */
+#define Z180_IRQ0 0 /* Execute IRQ1 */
+#define Z180_IRQ1 1 /* Execute IRQ1 */
+#define Z180_IRQ2 2 /* Execute IRQ2 */
#ifdef UNUSED_DEFINITION
diff --git a/src/emu/cpu/z180/z180cb.c b/src/emu/cpu/z180/z180cb.c
index 6c24c6971e5..e90e7c4afe6 100644
--- a/src/emu/cpu/z180/z180cb.c
+++ b/src/emu/cpu/z180/z180cb.c
@@ -2,292 +2,290 @@
* opcodes with CB prefix
* rotate, shift and bit operations
**********************************************************/
-OP(cb,00) { cpustate->_B = RLC(cpustate, cpustate->_B); } /* RLC B */
-OP(cb,01) { cpustate->_C = RLC(cpustate, cpustate->_C); } /* RLC C */
-OP(cb,02) { cpustate->_D = RLC(cpustate, cpustate->_D); } /* RLC D */
-OP(cb,03) { cpustate->_E = RLC(cpustate, cpustate->_E); } /* RLC E */
-OP(cb,04) { cpustate->_H = RLC(cpustate, cpustate->_H); } /* RLC H */
-OP(cb,05) { cpustate->_L = RLC(cpustate, cpustate->_L); } /* RLC L */
-OP(cb,06) { WM(cpustate, cpustate->_HL, RLC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RLC (HL) */
-OP(cb,07) { cpustate->_A = RLC(cpustate, cpustate->_A); } /* RLC A */
-
-OP(cb,08) { cpustate->_B = RRC(cpustate, cpustate->_B); } /* RRC B */
-OP(cb,09) { cpustate->_C = RRC(cpustate, cpustate->_C); } /* RRC C */
-OP(cb,0a) { cpustate->_D = RRC(cpustate, cpustate->_D); } /* RRC D */
-OP(cb,0b) { cpustate->_E = RRC(cpustate, cpustate->_E); } /* RRC E */
-OP(cb,0c) { cpustate->_H = RRC(cpustate, cpustate->_H); } /* RRC H */
-OP(cb,0d) { cpustate->_L = RRC(cpustate, cpustate->_L); } /* RRC L */
-OP(cb,0e) { WM(cpustate, cpustate->_HL, RRC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RRC (HL) */
-OP(cb,0f) { cpustate->_A = RRC(cpustate, cpustate->_A); } /* RRC A */
-
-OP(cb,10) { cpustate->_B = RL(cpustate, cpustate->_B); } /* RL B */
-OP(cb,11) { cpustate->_C = RL(cpustate, cpustate->_C); } /* RL C */
-OP(cb,12) { cpustate->_D = RL(cpustate, cpustate->_D); } /* RL D */
-OP(cb,13) { cpustate->_E = RL(cpustate, cpustate->_E); } /* RL E */
-OP(cb,14) { cpustate->_H = RL(cpustate, cpustate->_H); } /* RL H */
-OP(cb,15) { cpustate->_L = RL(cpustate, cpustate->_L); } /* RL L */
-OP(cb,16) { WM(cpustate, cpustate->_HL, RL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RL (HL) */
-OP(cb,17) { cpustate->_A = RL(cpustate, cpustate->_A); } /* RL A */
-
-OP(cb,18) { cpustate->_B = RR(cpustate, cpustate->_B); } /* RR B */
-OP(cb,19) { cpustate->_C = RR(cpustate, cpustate->_C); } /* RR C */
-OP(cb,1a) { cpustate->_D = RR(cpustate, cpustate->_D); } /* RR D */
-OP(cb,1b) { cpustate->_E = RR(cpustate, cpustate->_E); } /* RR E */
-OP(cb,1c) { cpustate->_H = RR(cpustate, cpustate->_H); } /* RR H */
-OP(cb,1d) { cpustate->_L = RR(cpustate, cpustate->_L); } /* RR L */
-OP(cb,1e) { WM(cpustate, cpustate->_HL, RR(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RR (HL) */
-OP(cb,1f) { cpustate->_A = RR(cpustate, cpustate->_A); } /* RR A */
-
-OP(cb,20) { cpustate->_B = SLA(cpustate, cpustate->_B); } /* SLA B */
-OP(cb,21) { cpustate->_C = SLA(cpustate, cpustate->_C); } /* SLA C */
-OP(cb,22) { cpustate->_D = SLA(cpustate, cpustate->_D); } /* SLA D */
-OP(cb,23) { cpustate->_E = SLA(cpustate, cpustate->_E); } /* SLA E */
-OP(cb,24) { cpustate->_H = SLA(cpustate, cpustate->_H); } /* SLA H */
-OP(cb,25) { cpustate->_L = SLA(cpustate, cpustate->_L); } /* SLA L */
-OP(cb,26) { WM(cpustate, cpustate->_HL, SLA(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SLA (HL) */
-OP(cb,27) { cpustate->_A = SLA(cpustate, cpustate->_A); } /* SLA A */
-
-OP(cb,28) { cpustate->_B = SRA(cpustate, cpustate->_B); } /* SRA B */
-OP(cb,29) { cpustate->_C = SRA(cpustate, cpustate->_C); } /* SRA C */
-OP(cb,2a) { cpustate->_D = SRA(cpustate, cpustate->_D); } /* SRA D */
-OP(cb,2b) { cpustate->_E = SRA(cpustate, cpustate->_E); } /* SRA E */
-OP(cb,2c) { cpustate->_H = SRA(cpustate, cpustate->_H); } /* SRA H */
-OP(cb,2d) { cpustate->_L = SRA(cpustate, cpustate->_L); } /* SRA L */
-OP(cb,2e) { WM(cpustate, cpustate->_HL, SRA(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SRA (HL) */
-OP(cb,2f) { cpustate->_A = SRA(cpustate, cpustate->_A); } /* SRA A */
-
-OP(cb,30) { cpustate->_B = SLL(cpustate, cpustate->_B); } /* SLL B */
-OP(cb,31) { cpustate->_C = SLL(cpustate, cpustate->_C); } /* SLL C */
-OP(cb,32) { cpustate->_D = SLL(cpustate, cpustate->_D); } /* SLL D */
-OP(cb,33) { cpustate->_E = SLL(cpustate, cpustate->_E); } /* SLL E */
-OP(cb,34) { cpustate->_H = SLL(cpustate, cpustate->_H); } /* SLL H */
-OP(cb,35) { cpustate->_L = SLL(cpustate, cpustate->_L); } /* SLL L */
-OP(cb,36) { WM(cpustate, cpustate->_HL, SLL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SLL (HL) */
-OP(cb,37) { cpustate->_A = SLL(cpustate, cpustate->_A); } /* SLL A */
-
-OP(cb,38) { cpustate->_B = SRL(cpustate, cpustate->_B); } /* SRL B */
-OP(cb,39) { cpustate->_C = SRL(cpustate, cpustate->_C); } /* SRL C */
-OP(cb,3a) { cpustate->_D = SRL(cpustate, cpustate->_D); } /* SRL D */
-OP(cb,3b) { cpustate->_E = SRL(cpustate, cpustate->_E); } /* SRL E */
-OP(cb,3c) { cpustate->_H = SRL(cpustate, cpustate->_H); } /* SRL H */
-OP(cb,3d) { cpustate->_L = SRL(cpustate, cpustate->_L); } /* SRL L */
-OP(cb,3e) { WM(cpustate, cpustate->_HL, SRL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SRL (HL) */
-OP(cb,3f) { cpustate->_A = SRL(cpustate, cpustate->_A); } /* SRL A */
-
-OP(cb,40) { BIT(0,cpustate->_B); } /* BIT 0,B */
-OP(cb,41) { BIT(0,cpustate->_C); } /* BIT 0,C */
-OP(cb,42) { BIT(0,cpustate->_D); } /* BIT 0,D */
-OP(cb,43) { BIT(0,cpustate->_E); } /* BIT 0,E */
-OP(cb,44) { BIT(0,cpustate->_H); } /* BIT 0,H */
-OP(cb,45) { BIT(0,cpustate->_L); } /* BIT 0,L */
-OP(cb,46) { BIT(0,RM(cpustate, cpustate->_HL)); } /* BIT 0,(HL) */
-OP(cb,47) { BIT(0,cpustate->_A); } /* BIT 0,A */
-
-OP(cb,48) { BIT(1,cpustate->_B); } /* BIT 1,B */
-OP(cb,49) { BIT(1,cpustate->_C); } /* BIT 1,C */
-OP(cb,4a) { BIT(1,cpustate->_D); } /* BIT 1,D */
-OP(cb,4b) { BIT(1,cpustate->_E); } /* BIT 1,E */
-OP(cb,4c) { BIT(1,cpustate->_H); } /* BIT 1,H */
-OP(cb,4d) { BIT(1,cpustate->_L); } /* BIT 1,L */
-OP(cb,4e) { BIT(1,RM(cpustate, cpustate->_HL)); } /* BIT 1,(HL) */
-OP(cb,4f) { BIT(1,cpustate->_A); } /* BIT 1,A */
-
-OP(cb,50) { BIT(2,cpustate->_B); } /* BIT 2,B */
-OP(cb,51) { BIT(2,cpustate->_C); } /* BIT 2,C */
-OP(cb,52) { BIT(2,cpustate->_D); } /* BIT 2,D */
-OP(cb,53) { BIT(2,cpustate->_E); } /* BIT 2,E */
-OP(cb,54) { BIT(2,cpustate->_H); } /* BIT 2,H */
-OP(cb,55) { BIT(2,cpustate->_L); } /* BIT 2,L */
-OP(cb,56) { BIT(2,RM(cpustate, cpustate->_HL)); } /* BIT 2,(HL) */
-OP(cb,57) { BIT(2,cpustate->_A); } /* BIT 2,A */
-
-OP(cb,58) { BIT(3,cpustate->_B); } /* BIT 3,B */
-OP(cb,59) { BIT(3,cpustate->_C); } /* BIT 3,C */
-OP(cb,5a) { BIT(3,cpustate->_D); } /* BIT 3,D */
-OP(cb,5b) { BIT(3,cpustate->_E); } /* BIT 3,E */
-OP(cb,5c) { BIT(3,cpustate->_H); } /* BIT 3,H */
-OP(cb,5d) { BIT(3,cpustate->_L); } /* BIT 3,L */
-OP(cb,5e) { BIT(3,RM(cpustate, cpustate->_HL)); } /* BIT 3,(HL) */
-OP(cb,5f) { BIT(3,cpustate->_A); } /* BIT 3,A */
-
-OP(cb,60) { BIT(4,cpustate->_B); } /* BIT 4,B */
-OP(cb,61) { BIT(4,cpustate->_C); } /* BIT 4,C */
-OP(cb,62) { BIT(4,cpustate->_D); } /* BIT 4,D */
-OP(cb,63) { BIT(4,cpustate->_E); } /* BIT 4,E */
-OP(cb,64) { BIT(4,cpustate->_H); } /* BIT 4,H */
-OP(cb,65) { BIT(4,cpustate->_L); } /* BIT 4,L */
-OP(cb,66) { BIT(4,RM(cpustate, cpustate->_HL)); } /* BIT 4,(HL) */
-OP(cb,67) { BIT(4,cpustate->_A); } /* BIT 4,A */
-
-OP(cb,68) { BIT(5,cpustate->_B); } /* BIT 5,B */
-OP(cb,69) { BIT(5,cpustate->_C); } /* BIT 5,C */
-OP(cb,6a) { BIT(5,cpustate->_D); } /* BIT 5,D */
-OP(cb,6b) { BIT(5,cpustate->_E); } /* BIT 5,E */
-OP(cb,6c) { BIT(5,cpustate->_H); } /* BIT 5,H */
-OP(cb,6d) { BIT(5,cpustate->_L); } /* BIT 5,L */
-OP(cb,6e) { BIT(5,RM(cpustate, cpustate->_HL)); } /* BIT 5,(HL) */
-OP(cb,6f) { BIT(5,cpustate->_A); } /* BIT 5,A */
-
-OP(cb,70) { BIT(6,cpustate->_B); } /* BIT 6,B */
-OP(cb,71) { BIT(6,cpustate->_C); } /* BIT 6,C */
-OP(cb,72) { BIT(6,cpustate->_D); } /* BIT 6,D */
-OP(cb,73) { BIT(6,cpustate->_E); } /* BIT 6,E */
-OP(cb,74) { BIT(6,cpustate->_H); } /* BIT 6,H */
-OP(cb,75) { BIT(6,cpustate->_L); } /* BIT 6,L */
-OP(cb,76) { BIT(6,RM(cpustate, cpustate->_HL)); } /* BIT 6,(HL) */
-OP(cb,77) { BIT(6,cpustate->_A); } /* BIT 6,A */
-
-OP(cb,78) { BIT(7,cpustate->_B); } /* BIT 7,B */
-OP(cb,79) { BIT(7,cpustate->_C); } /* BIT 7,C */
-OP(cb,7a) { BIT(7,cpustate->_D); } /* BIT 7,D */
-OP(cb,7b) { BIT(7,cpustate->_E); } /* BIT 7,E */
-OP(cb,7c) { BIT(7,cpustate->_H); } /* BIT 7,H */
-OP(cb,7d) { BIT(7,cpustate->_L); } /* BIT 7,L */
-OP(cb,7e) { BIT(7,RM(cpustate, cpustate->_HL)); } /* BIT 7,(HL) */
-OP(cb,7f) { BIT(7,cpustate->_A); } /* BIT 7,A */
-
-OP(cb,80) { cpustate->_B = RES(0,cpustate->_B); } /* RES 0,B */
-OP(cb,81) { cpustate->_C = RES(0,cpustate->_C); } /* RES 0,C */
-OP(cb,82) { cpustate->_D = RES(0,cpustate->_D); } /* RES 0,D */
-OP(cb,83) { cpustate->_E = RES(0,cpustate->_E); } /* RES 0,E */
-OP(cb,84) { cpustate->_H = RES(0,cpustate->_H); } /* RES 0,H */
-OP(cb,85) { cpustate->_L = RES(0,cpustate->_L); } /* RES 0,L */
-OP(cb,86) { WM(cpustate, cpustate->_HL, RES(0,RM(cpustate, cpustate->_HL)) ); } /* RES 0,(HL) */
-OP(cb,87) { cpustate->_A = RES(0,cpustate->_A); } /* RES 0,A */
-
-OP(cb,88) { cpustate->_B = RES(1,cpustate->_B); } /* RES 1,B */
-OP(cb,89) { cpustate->_C = RES(1,cpustate->_C); } /* RES 1,C */
-OP(cb,8a) { cpustate->_D = RES(1,cpustate->_D); } /* RES 1,D */
-OP(cb,8b) { cpustate->_E = RES(1,cpustate->_E); } /* RES 1,E */
-OP(cb,8c) { cpustate->_H = RES(1,cpustate->_H); } /* RES 1,H */
-OP(cb,8d) { cpustate->_L = RES(1,cpustate->_L); } /* RES 1,L */
-OP(cb,8e) { WM(cpustate, cpustate->_HL, RES(1,RM(cpustate, cpustate->_HL)) ); } /* RES 1,(HL) */
-OP(cb,8f) { cpustate->_A = RES(1,cpustate->_A); } /* RES 1,A */
-
-OP(cb,90) { cpustate->_B = RES(2,cpustate->_B); } /* RES 2,B */
-OP(cb,91) { cpustate->_C = RES(2,cpustate->_C); } /* RES 2,C */
-OP(cb,92) { cpustate->_D = RES(2,cpustate->_D); } /* RES 2,D */
-OP(cb,93) { cpustate->_E = RES(2,cpustate->_E); } /* RES 2,E */
-OP(cb,94) { cpustate->_H = RES(2,cpustate->_H); } /* RES 2,H */
-OP(cb,95) { cpustate->_L = RES(2,cpustate->_L); } /* RES 2,L */
-OP(cb,96) { WM(cpustate, cpustate->_HL, RES(2,RM(cpustate, cpustate->_HL)) ); } /* RES 2,(HL) */
-OP(cb,97) { cpustate->_A = RES(2,cpustate->_A); } /* RES 2,A */
-
-OP(cb,98) { cpustate->_B = RES(3,cpustate->_B); } /* RES 3,B */
-OP(cb,99) { cpustate->_C = RES(3,cpustate->_C); } /* RES 3,C */
-OP(cb,9a) { cpustate->_D = RES(3,cpustate->_D); } /* RES 3,D */
-OP(cb,9b) { cpustate->_E = RES(3,cpustate->_E); } /* RES 3,E */
-OP(cb,9c) { cpustate->_H = RES(3,cpustate->_H); } /* RES 3,H */
-OP(cb,9d) { cpustate->_L = RES(3,cpustate->_L); } /* RES 3,L */
-OP(cb,9e) { WM(cpustate, cpustate->_HL, RES(3,RM(cpustate, cpustate->_HL)) ); } /* RES 3,(HL) */
-OP(cb,9f) { cpustate->_A = RES(3,cpustate->_A); } /* RES 3,A */
-
-OP(cb,a0) { cpustate->_B = RES(4,cpustate->_B); } /* RES 4,B */
-OP(cb,a1) { cpustate->_C = RES(4,cpustate->_C); } /* RES 4,C */
-OP(cb,a2) { cpustate->_D = RES(4,cpustate->_D); } /* RES 4,D */
-OP(cb,a3) { cpustate->_E = RES(4,cpustate->_E); } /* RES 4,E */
-OP(cb,a4) { cpustate->_H = RES(4,cpustate->_H); } /* RES 4,H */
-OP(cb,a5) { cpustate->_L = RES(4,cpustate->_L); } /* RES 4,L */
-OP(cb,a6) { WM(cpustate, cpustate->_HL, RES(4,RM(cpustate, cpustate->_HL)) ); } /* RES 4,(HL) */
-OP(cb,a7) { cpustate->_A = RES(4,cpustate->_A); } /* RES 4,A */
-
-OP(cb,a8) { cpustate->_B = RES(5,cpustate->_B); } /* RES 5,B */
-OP(cb,a9) { cpustate->_C = RES(5,cpustate->_C); } /* RES 5,C */
-OP(cb,aa) { cpustate->_D = RES(5,cpustate->_D); } /* RES 5,D */
-OP(cb,ab) { cpustate->_E = RES(5,cpustate->_E); } /* RES 5,E */
-OP(cb,ac) { cpustate->_H = RES(5,cpustate->_H); } /* RES 5,H */
-OP(cb,ad) { cpustate->_L = RES(5,cpustate->_L); } /* RES 5,L */
-OP(cb,ae) { WM(cpustate, cpustate->_HL, RES(5,RM(cpustate, cpustate->_HL)) ); } /* RES 5,(HL) */
-OP(cb,af) { cpustate->_A = RES(5,cpustate->_A); } /* RES 5,A */
-
-OP(cb,b0) { cpustate->_B = RES(6,cpustate->_B); } /* RES 6,B */
-OP(cb,b1) { cpustate->_C = RES(6,cpustate->_C); } /* RES 6,C */
-OP(cb,b2) { cpustate->_D = RES(6,cpustate->_D); } /* RES 6,D */
-OP(cb,b3) { cpustate->_E = RES(6,cpustate->_E); } /* RES 6,E */
-OP(cb,b4) { cpustate->_H = RES(6,cpustate->_H); } /* RES 6,H */
-OP(cb,b5) { cpustate->_L = RES(6,cpustate->_L); } /* RES 6,L */
-OP(cb,b6) { WM(cpustate, cpustate->_HL, RES(6,RM(cpustate, cpustate->_HL)) ); } /* RES 6,(HL) */
-OP(cb,b7) { cpustate->_A = RES(6,cpustate->_A); } /* RES 6,A */
-
-OP(cb,b8) { cpustate->_B = RES(7,cpustate->_B); } /* RES 7,B */
-OP(cb,b9) { cpustate->_C = RES(7,cpustate->_C); } /* RES 7,C */
-OP(cb,ba) { cpustate->_D = RES(7,cpustate->_D); } /* RES 7,D */
-OP(cb,bb) { cpustate->_E = RES(7,cpustate->_E); } /* RES 7,E */
-OP(cb,bc) { cpustate->_H = RES(7,cpustate->_H); } /* RES 7,H */
-OP(cb,bd) { cpustate->_L = RES(7,cpustate->_L); } /* RES 7,L */
-OP(cb,be) { WM(cpustate, cpustate->_HL, RES(7,RM(cpustate, cpustate->_HL)) ); } /* RES 7,(HL) */
-OP(cb,bf) { cpustate->_A = RES(7,cpustate->_A); } /* RES 7,A */
-
-OP(cb,c0) { cpustate->_B = SET(0,cpustate->_B); } /* SET 0,B */
-OP(cb,c1) { cpustate->_C = SET(0,cpustate->_C); } /* SET 0,C */
-OP(cb,c2) { cpustate->_D = SET(0,cpustate->_D); } /* SET 0,D */
-OP(cb,c3) { cpustate->_E = SET(0,cpustate->_E); } /* SET 0,E */
-OP(cb,c4) { cpustate->_H = SET(0,cpustate->_H); } /* SET 0,H */
-OP(cb,c5) { cpustate->_L = SET(0,cpustate->_L); } /* SET 0,L */
-OP(cb,c6) { WM(cpustate, cpustate->_HL, SET(0,RM(cpustate, cpustate->_HL)) ); } /* SET 0,(HL) */
-OP(cb,c7) { cpustate->_A = SET(0,cpustate->_A); } /* SET 0,A */
-
-OP(cb,c8) { cpustate->_B = SET(1,cpustate->_B); } /* SET 1,B */
-OP(cb,c9) { cpustate->_C = SET(1,cpustate->_C); } /* SET 1,C */
-OP(cb,ca) { cpustate->_D = SET(1,cpustate->_D); } /* SET 1,D */
-OP(cb,cb) { cpustate->_E = SET(1,cpustate->_E); } /* SET 1,E */
-OP(cb,cc) { cpustate->_H = SET(1,cpustate->_H); } /* SET 1,H */
-OP(cb,cd) { cpustate->_L = SET(1,cpustate->_L); } /* SET 1,L */
-OP(cb,ce) { WM(cpustate, cpustate->_HL, SET(1,RM(cpustate, cpustate->_HL)) ); } /* SET 1,(HL) */
-OP(cb,cf) { cpustate->_A = SET(1,cpustate->_A); } /* SET 1,A */
-
-OP(cb,d0) { cpustate->_B = SET(2,cpustate->_B); } /* SET 2,B */
-OP(cb,d1) { cpustate->_C = SET(2,cpustate->_C); } /* SET 2,C */
-OP(cb,d2) { cpustate->_D = SET(2,cpustate->_D); } /* SET 2,D */
-OP(cb,d3) { cpustate->_E = SET(2,cpustate->_E); } /* SET 2,E */
-OP(cb,d4) { cpustate->_H = SET(2,cpustate->_H); } /* SET 2,H */
-OP(cb,d5) { cpustate->_L = SET(2,cpustate->_L); } /* SET 2,L */
-OP(cb,d6) { WM(cpustate, cpustate->_HL, SET(2,RM(cpustate, cpustate->_HL)) ); }/* SET 2,(HL) */
-OP(cb,d7) { cpustate->_A = SET(2,cpustate->_A); } /* SET 2,A */
-
-OP(cb,d8) { cpustate->_B = SET(3,cpustate->_B); } /* SET 3,B */
-OP(cb,d9) { cpustate->_C = SET(3,cpustate->_C); } /* SET 3,C */
-OP(cb,da) { cpustate->_D = SET(3,cpustate->_D); } /* SET 3,D */
-OP(cb,db) { cpustate->_E = SET(3,cpustate->_E); } /* SET 3,E */
-OP(cb,dc) { cpustate->_H = SET(3,cpustate->_H); } /* SET 3,H */
-OP(cb,dd) { cpustate->_L = SET(3,cpustate->_L); } /* SET 3,L */
-OP(cb,de) { WM(cpustate, cpustate->_HL, SET(3,RM(cpustate, cpustate->_HL)) ); } /* SET 3,(HL) */
-OP(cb,df) { cpustate->_A = SET(3,cpustate->_A); } /* SET 3,A */
-
-OP(cb,e0) { cpustate->_B = SET(4,cpustate->_B); } /* SET 4,B */
-OP(cb,e1) { cpustate->_C = SET(4,cpustate->_C); } /* SET 4,C */
-OP(cb,e2) { cpustate->_D = SET(4,cpustate->_D); } /* SET 4,D */
-OP(cb,e3) { cpustate->_E = SET(4,cpustate->_E); } /* SET 4,E */
-OP(cb,e4) { cpustate->_H = SET(4,cpustate->_H); } /* SET 4,H */
-OP(cb,e5) { cpustate->_L = SET(4,cpustate->_L); } /* SET 4,L */
-OP(cb,e6) { WM(cpustate, cpustate->_HL, SET(4,RM(cpustate, cpustate->_HL)) ); } /* SET 4,(HL) */
-OP(cb,e7) { cpustate->_A = SET(4,cpustate->_A); } /* SET 4,A */
-
-OP(cb,e8) { cpustate->_B = SET(5,cpustate->_B); } /* SET 5,B */
-OP(cb,e9) { cpustate->_C = SET(5,cpustate->_C); } /* SET 5,C */
-OP(cb,ea) { cpustate->_D = SET(5,cpustate->_D); } /* SET 5,D */
-OP(cb,eb) { cpustate->_E = SET(5,cpustate->_E); } /* SET 5,E */
-OP(cb,ec) { cpustate->_H = SET(5,cpustate->_H); } /* SET 5,H */
-OP(cb,ed) { cpustate->_L = SET(5,cpustate->_L); } /* SET 5,L */
-OP(cb,ee) { WM(cpustate, cpustate->_HL, SET(5,RM(cpustate, cpustate->_HL)) ); } /* SET 5,(HL) */
-OP(cb,ef) { cpustate->_A = SET(5,cpustate->_A); } /* SET 5,A */
-
-OP(cb,f0) { cpustate->_B = SET(6,cpustate->_B); } /* SET 6,B */
-OP(cb,f1) { cpustate->_C = SET(6,cpustate->_C); } /* SET 6,C */
-OP(cb,f2) { cpustate->_D = SET(6,cpustate->_D); } /* SET 6,D */
-OP(cb,f3) { cpustate->_E = SET(6,cpustate->_E); } /* SET 6,E */
-OP(cb,f4) { cpustate->_H = SET(6,cpustate->_H); } /* SET 6,H */
-OP(cb,f5) { cpustate->_L = SET(6,cpustate->_L); } /* SET 6,L */
-OP(cb,f6) { WM(cpustate, cpustate->_HL, SET(6,RM(cpustate, cpustate->_HL)) ); } /* SET 6,(HL) */
-OP(cb,f7) { cpustate->_A = SET(6,cpustate->_A); } /* SET 6,A */
-
-OP(cb,f8) { cpustate->_B = SET(7,cpustate->_B); } /* SET 7,B */
-OP(cb,f9) { cpustate->_C = SET(7,cpustate->_C); } /* SET 7,C */
-OP(cb,fa) { cpustate->_D = SET(7,cpustate->_D); } /* SET 7,D */
-OP(cb,fb) { cpustate->_E = SET(7,cpustate->_E); } /* SET 7,E */
-OP(cb,fc) { cpustate->_H = SET(7,cpustate->_H); } /* SET 7,H */
-OP(cb,fd) { cpustate->_L = SET(7,cpustate->_L); } /* SET 7,L */
-OP(cb,fe) { WM(cpustate, cpustate->_HL, SET(7,RM(cpustate, cpustate->_HL)) ); } /* SET 7,(HL) */
-OP(cb,ff) { cpustate->_A = SET(7,cpustate->_A); } /* SET 7,A */
-
-
+OP(cb,00) { cpustate->_B = RLC(cpustate, cpustate->_B); } /* RLC B */
+OP(cb,01) { cpustate->_C = RLC(cpustate, cpustate->_C); } /* RLC C */
+OP(cb,02) { cpustate->_D = RLC(cpustate, cpustate->_D); } /* RLC D */
+OP(cb,03) { cpustate->_E = RLC(cpustate, cpustate->_E); } /* RLC E */
+OP(cb,04) { cpustate->_H = RLC(cpustate, cpustate->_H); } /* RLC H */
+OP(cb,05) { cpustate->_L = RLC(cpustate, cpustate->_L); } /* RLC L */
+OP(cb,06) { WM(cpustate, cpustate->_HL, RLC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RLC (HL) */
+OP(cb,07) { cpustate->_A = RLC(cpustate, cpustate->_A); } /* RLC A */
+
+OP(cb,08) { cpustate->_B = RRC(cpustate, cpustate->_B); } /* RRC B */
+OP(cb,09) { cpustate->_C = RRC(cpustate, cpustate->_C); } /* RRC C */
+OP(cb,0a) { cpustate->_D = RRC(cpustate, cpustate->_D); } /* RRC D */
+OP(cb,0b) { cpustate->_E = RRC(cpustate, cpustate->_E); } /* RRC E */
+OP(cb,0c) { cpustate->_H = RRC(cpustate, cpustate->_H); } /* RRC H */
+OP(cb,0d) { cpustate->_L = RRC(cpustate, cpustate->_L); } /* RRC L */
+OP(cb,0e) { WM(cpustate, cpustate->_HL, RRC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RRC (HL) */
+OP(cb,0f) { cpustate->_A = RRC(cpustate, cpustate->_A); } /* RRC A */
+
+OP(cb,10) { cpustate->_B = RL(cpustate, cpustate->_B); } /* RL B */
+OP(cb,11) { cpustate->_C = RL(cpustate, cpustate->_C); } /* RL C */
+OP(cb,12) { cpustate->_D = RL(cpustate, cpustate->_D); } /* RL D */
+OP(cb,13) { cpustate->_E = RL(cpustate, cpustate->_E); } /* RL E */
+OP(cb,14) { cpustate->_H = RL(cpustate, cpustate->_H); } /* RL H */
+OP(cb,15) { cpustate->_L = RL(cpustate, cpustate->_L); } /* RL L */
+OP(cb,16) { WM(cpustate, cpustate->_HL, RL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RL (HL) */
+OP(cb,17) { cpustate->_A = RL(cpustate, cpustate->_A); } /* RL A */
+
+OP(cb,18) { cpustate->_B = RR(cpustate, cpustate->_B); } /* RR B */
+OP(cb,19) { cpustate->_C = RR(cpustate, cpustate->_C); } /* RR C */
+OP(cb,1a) { cpustate->_D = RR(cpustate, cpustate->_D); } /* RR D */
+OP(cb,1b) { cpustate->_E = RR(cpustate, cpustate->_E); } /* RR E */
+OP(cb,1c) { cpustate->_H = RR(cpustate, cpustate->_H); } /* RR H */
+OP(cb,1d) { cpustate->_L = RR(cpustate, cpustate->_L); } /* RR L */
+OP(cb,1e) { WM(cpustate, cpustate->_HL, RR(cpustate, RM(cpustate, cpustate->_HL)) ); } /* RR (HL) */
+OP(cb,1f) { cpustate->_A = RR(cpustate, cpustate->_A); } /* RR A */
+
+OP(cb,20) { cpustate->_B = SLA(cpustate, cpustate->_B); } /* SLA B */
+OP(cb,21) { cpustate->_C = SLA(cpustate, cpustate->_C); } /* SLA C */
+OP(cb,22) { cpustate->_D = SLA(cpustate, cpustate->_D); } /* SLA D */
+OP(cb,23) { cpustate->_E = SLA(cpustate, cpustate->_E); } /* SLA E */
+OP(cb,24) { cpustate->_H = SLA(cpustate, cpustate->_H); } /* SLA H */
+OP(cb,25) { cpustate->_L = SLA(cpustate, cpustate->_L); } /* SLA L */
+OP(cb,26) { WM(cpustate, cpustate->_HL, SLA(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SLA (HL) */
+OP(cb,27) { cpustate->_A = SLA(cpustate, cpustate->_A); } /* SLA A */
+
+OP(cb,28) { cpustate->_B = SRA(cpustate, cpustate->_B); } /* SRA B */
+OP(cb,29) { cpustate->_C = SRA(cpustate, cpustate->_C); } /* SRA C */
+OP(cb,2a) { cpustate->_D = SRA(cpustate, cpustate->_D); } /* SRA D */
+OP(cb,2b) { cpustate->_E = SRA(cpustate, cpustate->_E); } /* SRA E */
+OP(cb,2c) { cpustate->_H = SRA(cpustate, cpustate->_H); } /* SRA H */
+OP(cb,2d) { cpustate->_L = SRA(cpustate, cpustate->_L); } /* SRA L */
+OP(cb,2e) { WM(cpustate, cpustate->_HL, SRA(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SRA (HL) */
+OP(cb,2f) { cpustate->_A = SRA(cpustate, cpustate->_A); } /* SRA A */
+
+OP(cb,30) { cpustate->_B = SLL(cpustate, cpustate->_B); } /* SLL B */
+OP(cb,31) { cpustate->_C = SLL(cpustate, cpustate->_C); } /* SLL C */
+OP(cb,32) { cpustate->_D = SLL(cpustate, cpustate->_D); } /* SLL D */
+OP(cb,33) { cpustate->_E = SLL(cpustate, cpustate->_E); } /* SLL E */
+OP(cb,34) { cpustate->_H = SLL(cpustate, cpustate->_H); } /* SLL H */
+OP(cb,35) { cpustate->_L = SLL(cpustate, cpustate->_L); } /* SLL L */
+OP(cb,36) { WM(cpustate, cpustate->_HL, SLL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SLL (HL) */
+OP(cb,37) { cpustate->_A = SLL(cpustate, cpustate->_A); } /* SLL A */
+
+OP(cb,38) { cpustate->_B = SRL(cpustate, cpustate->_B); } /* SRL B */
+OP(cb,39) { cpustate->_C = SRL(cpustate, cpustate->_C); } /* SRL C */
+OP(cb,3a) { cpustate->_D = SRL(cpustate, cpustate->_D); } /* SRL D */
+OP(cb,3b) { cpustate->_E = SRL(cpustate, cpustate->_E); } /* SRL E */
+OP(cb,3c) { cpustate->_H = SRL(cpustate, cpustate->_H); } /* SRL H */
+OP(cb,3d) { cpustate->_L = SRL(cpustate, cpustate->_L); } /* SRL L */
+OP(cb,3e) { WM(cpustate, cpustate->_HL, SRL(cpustate, RM(cpustate, cpustate->_HL)) ); } /* SRL (HL) */
+OP(cb,3f) { cpustate->_A = SRL(cpustate, cpustate->_A); } /* SRL A */
+
+OP(cb,40) { BIT(0,cpustate->_B); } /* BIT 0,B */
+OP(cb,41) { BIT(0,cpustate->_C); } /* BIT 0,C */
+OP(cb,42) { BIT(0,cpustate->_D); } /* BIT 0,D */
+OP(cb,43) { BIT(0,cpustate->_E); } /* BIT 0,E */
+OP(cb,44) { BIT(0,cpustate->_H); } /* BIT 0,H */
+OP(cb,45) { BIT(0,cpustate->_L); } /* BIT 0,L */
+OP(cb,46) { BIT(0,RM(cpustate, cpustate->_HL)); } /* BIT 0,(HL) */
+OP(cb,47) { BIT(0,cpustate->_A); } /* BIT 0,A */
+
+OP(cb,48) { BIT(1,cpustate->_B); } /* BIT 1,B */
+OP(cb,49) { BIT(1,cpustate->_C); } /* BIT 1,C */
+OP(cb,4a) { BIT(1,cpustate->_D); } /* BIT 1,D */
+OP(cb,4b) { BIT(1,cpustate->_E); } /* BIT 1,E */
+OP(cb,4c) { BIT(1,cpustate->_H); } /* BIT 1,H */
+OP(cb,4d) { BIT(1,cpustate->_L); } /* BIT 1,L */
+OP(cb,4e) { BIT(1,RM(cpustate, cpustate->_HL)); } /* BIT 1,(HL) */
+OP(cb,4f) { BIT(1,cpustate->_A); } /* BIT 1,A */
+
+OP(cb,50) { BIT(2,cpustate->_B); } /* BIT 2,B */
+OP(cb,51) { BIT(2,cpustate->_C); } /* BIT 2,C */
+OP(cb,52) { BIT(2,cpustate->_D); } /* BIT 2,D */
+OP(cb,53) { BIT(2,cpustate->_E); } /* BIT 2,E */
+OP(cb,54) { BIT(2,cpustate->_H); } /* BIT 2,H */
+OP(cb,55) { BIT(2,cpustate->_L); } /* BIT 2,L */
+OP(cb,56) { BIT(2,RM(cpustate, cpustate->_HL)); } /* BIT 2,(HL) */
+OP(cb,57) { BIT(2,cpustate->_A); } /* BIT 2,A */
+
+OP(cb,58) { BIT(3,cpustate->_B); } /* BIT 3,B */
+OP(cb,59) { BIT(3,cpustate->_C); } /* BIT 3,C */
+OP(cb,5a) { BIT(3,cpustate->_D); } /* BIT 3,D */
+OP(cb,5b) { BIT(3,cpustate->_E); } /* BIT 3,E */
+OP(cb,5c) { BIT(3,cpustate->_H); } /* BIT 3,H */
+OP(cb,5d) { BIT(3,cpustate->_L); } /* BIT 3,L */
+OP(cb,5e) { BIT(3,RM(cpustate, cpustate->_HL)); } /* BIT 3,(HL) */
+OP(cb,5f) { BIT(3,cpustate->_A); } /* BIT 3,A */
+
+OP(cb,60) { BIT(4,cpustate->_B); } /* BIT 4,B */
+OP(cb,61) { BIT(4,cpustate->_C); } /* BIT 4,C */
+OP(cb,62) { BIT(4,cpustate->_D); } /* BIT 4,D */
+OP(cb,63) { BIT(4,cpustate->_E); } /* BIT 4,E */
+OP(cb,64) { BIT(4,cpustate->_H); } /* BIT 4,H */
+OP(cb,65) { BIT(4,cpustate->_L); } /* BIT 4,L */
+OP(cb,66) { BIT(4,RM(cpustate, cpustate->_HL)); } /* BIT 4,(HL) */
+OP(cb,67) { BIT(4,cpustate->_A); } /* BIT 4,A */
+
+OP(cb,68) { BIT(5,cpustate->_B); } /* BIT 5,B */
+OP(cb,69) { BIT(5,cpustate->_C); } /* BIT 5,C */
+OP(cb,6a) { BIT(5,cpustate->_D); } /* BIT 5,D */
+OP(cb,6b) { BIT(5,cpustate->_E); } /* BIT 5,E */
+OP(cb,6c) { BIT(5,cpustate->_H); } /* BIT 5,H */
+OP(cb,6d) { BIT(5,cpustate->_L); } /* BIT 5,L */
+OP(cb,6e) { BIT(5,RM(cpustate, cpustate->_HL)); } /* BIT 5,(HL) */
+OP(cb,6f) { BIT(5,cpustate->_A); } /* BIT 5,A */
+
+OP(cb,70) { BIT(6,cpustate->_B); } /* BIT 6,B */
+OP(cb,71) { BIT(6,cpustate->_C); } /* BIT 6,C */
+OP(cb,72) { BIT(6,cpustate->_D); } /* BIT 6,D */
+OP(cb,73) { BIT(6,cpustate->_E); } /* BIT 6,E */
+OP(cb,74) { BIT(6,cpustate->_H); } /* BIT 6,H */
+OP(cb,75) { BIT(6,cpustate->_L); } /* BIT 6,L */
+OP(cb,76) { BIT(6,RM(cpustate, cpustate->_HL)); } /* BIT 6,(HL) */
+OP(cb,77) { BIT(6,cpustate->_A); } /* BIT 6,A */
+
+OP(cb,78) { BIT(7,cpustate->_B); } /* BIT 7,B */
+OP(cb,79) { BIT(7,cpustate->_C); } /* BIT 7,C */
+OP(cb,7a) { BIT(7,cpustate->_D); } /* BIT 7,D */
+OP(cb,7b) { BIT(7,cpustate->_E); } /* BIT 7,E */
+OP(cb,7c) { BIT(7,cpustate->_H); } /* BIT 7,H */
+OP(cb,7d) { BIT(7,cpustate->_L); } /* BIT 7,L */
+OP(cb,7e) { BIT(7,RM(cpustate, cpustate->_HL)); } /* BIT 7,(HL) */
+OP(cb,7f) { BIT(7,cpustate->_A); } /* BIT 7,A */
+
+OP(cb,80) { cpustate->_B = RES(0,cpustate->_B); } /* RES 0,B */
+OP(cb,81) { cpustate->_C = RES(0,cpustate->_C); } /* RES 0,C */
+OP(cb,82) { cpustate->_D = RES(0,cpustate->_D); } /* RES 0,D */
+OP(cb,83) { cpustate->_E = RES(0,cpustate->_E); } /* RES 0,E */
+OP(cb,84) { cpustate->_H = RES(0,cpustate->_H); } /* RES 0,H */
+OP(cb,85) { cpustate->_L = RES(0,cpustate->_L); } /* RES 0,L */
+OP(cb,86) { WM(cpustate, cpustate->_HL, RES(0,RM(cpustate, cpustate->_HL)) ); } /* RES 0,(HL) */
+OP(cb,87) { cpustate->_A = RES(0,cpustate->_A); } /* RES 0,A */
+
+OP(cb,88) { cpustate->_B = RES(1,cpustate->_B); } /* RES 1,B */
+OP(cb,89) { cpustate->_C = RES(1,cpustate->_C); } /* RES 1,C */
+OP(cb,8a) { cpustate->_D = RES(1,cpustate->_D); } /* RES 1,D */
+OP(cb,8b) { cpustate->_E = RES(1,cpustate->_E); } /* RES 1,E */
+OP(cb,8c) { cpustate->_H = RES(1,cpustate->_H); } /* RES 1,H */
+OP(cb,8d) { cpustate->_L = RES(1,cpustate->_L); } /* RES 1,L */
+OP(cb,8e) { WM(cpustate, cpustate->_HL, RES(1,RM(cpustate, cpustate->_HL)) ); } /* RES 1,(HL) */
+OP(cb,8f) { cpustate->_A = RES(1,cpustate->_A); } /* RES 1,A */
+
+OP(cb,90) { cpustate->_B = RES(2,cpustate->_B); } /* RES 2,B */
+OP(cb,91) { cpustate->_C = RES(2,cpustate->_C); } /* RES 2,C */
+OP(cb,92) { cpustate->_D = RES(2,cpustate->_D); } /* RES 2,D */
+OP(cb,93) { cpustate->_E = RES(2,cpustate->_E); } /* RES 2,E */
+OP(cb,94) { cpustate->_H = RES(2,cpustate->_H); } /* RES 2,H */
+OP(cb,95) { cpustate->_L = RES(2,cpustate->_L); } /* RES 2,L */
+OP(cb,96) { WM(cpustate, cpustate->_HL, RES(2,RM(cpustate, cpustate->_HL)) ); } /* RES 2,(HL) */
+OP(cb,97) { cpustate->_A = RES(2,cpustate->_A); } /* RES 2,A */
+
+OP(cb,98) { cpustate->_B = RES(3,cpustate->_B); } /* RES 3,B */
+OP(cb,99) { cpustate->_C = RES(3,cpustate->_C); } /* RES 3,C */
+OP(cb,9a) { cpustate->_D = RES(3,cpustate->_D); } /* RES 3,D */
+OP(cb,9b) { cpustate->_E = RES(3,cpustate->_E); } /* RES 3,E */
+OP(cb,9c) { cpustate->_H = RES(3,cpustate->_H); } /* RES 3,H */
+OP(cb,9d) { cpustate->_L = RES(3,cpustate->_L); } /* RES 3,L */
+OP(cb,9e) { WM(cpustate, cpustate->_HL, RES(3,RM(cpustate, cpustate->_HL)) ); } /* RES 3,(HL) */
+OP(cb,9f) { cpustate->_A = RES(3,cpustate->_A); } /* RES 3,A */
+
+OP(cb,a0) { cpustate->_B = RES(4,cpustate->_B); } /* RES 4,B */
+OP(cb,a1) { cpustate->_C = RES(4,cpustate->_C); } /* RES 4,C */
+OP(cb,a2) { cpustate->_D = RES(4,cpustate->_D); } /* RES 4,D */
+OP(cb,a3) { cpustate->_E = RES(4,cpustate->_E); } /* RES 4,E */
+OP(cb,a4) { cpustate->_H = RES(4,cpustate->_H); } /* RES 4,H */
+OP(cb,a5) { cpustate->_L = RES(4,cpustate->_L); } /* RES 4,L */
+OP(cb,a6) { WM(cpustate, cpustate->_HL, RES(4,RM(cpustate, cpustate->_HL)) ); } /* RES 4,(HL) */
+OP(cb,a7) { cpustate->_A = RES(4,cpustate->_A); } /* RES 4,A */
+
+OP(cb,a8) { cpustate->_B = RES(5,cpustate->_B); } /* RES 5,B */
+OP(cb,a9) { cpustate->_C = RES(5,cpustate->_C); } /* RES 5,C */
+OP(cb,aa) { cpustate->_D = RES(5,cpustate->_D); } /* RES 5,D */
+OP(cb,ab) { cpustate->_E = RES(5,cpustate->_E); } /* RES 5,E */
+OP(cb,ac) { cpustate->_H = RES(5,cpustate->_H); } /* RES 5,H */
+OP(cb,ad) { cpustate->_L = RES(5,cpustate->_L); } /* RES 5,L */
+OP(cb,ae) { WM(cpustate, cpustate->_HL, RES(5,RM(cpustate, cpustate->_HL)) ); } /* RES 5,(HL) */
+OP(cb,af) { cpustate->_A = RES(5,cpustate->_A); } /* RES 5,A */
+
+OP(cb,b0) { cpustate->_B = RES(6,cpustate->_B); } /* RES 6,B */
+OP(cb,b1) { cpustate->_C = RES(6,cpustate->_C); } /* RES 6,C */
+OP(cb,b2) { cpustate->_D = RES(6,cpustate->_D); } /* RES 6,D */
+OP(cb,b3) { cpustate->_E = RES(6,cpustate->_E); } /* RES 6,E */
+OP(cb,b4) { cpustate->_H = RES(6,cpustate->_H); } /* RES 6,H */
+OP(cb,b5) { cpustate->_L = RES(6,cpustate->_L); } /* RES 6,L */
+OP(cb,b6) { WM(cpustate, cpustate->_HL, RES(6,RM(cpustate, cpustate->_HL)) ); } /* RES 6,(HL) */
+OP(cb,b7) { cpustate->_A = RES(6,cpustate->_A); } /* RES 6,A */
+
+OP(cb,b8) { cpustate->_B = RES(7,cpustate->_B); } /* RES 7,B */
+OP(cb,b9) { cpustate->_C = RES(7,cpustate->_C); } /* RES 7,C */
+OP(cb,ba) { cpustate->_D = RES(7,cpustate->_D); } /* RES 7,D */
+OP(cb,bb) { cpustate->_E = RES(7,cpustate->_E); } /* RES 7,E */
+OP(cb,bc) { cpustate->_H = RES(7,cpustate->_H); } /* RES 7,H */
+OP(cb,bd) { cpustate->_L = RES(7,cpustate->_L); } /* RES 7,L */
+OP(cb,be) { WM(cpustate, cpustate->_HL, RES(7,RM(cpustate, cpustate->_HL)) ); } /* RES 7,(HL) */
+OP(cb,bf) { cpustate->_A = RES(7,cpustate->_A); } /* RES 7,A */
+
+OP(cb,c0) { cpustate->_B = SET(0,cpustate->_B); } /* SET 0,B */
+OP(cb,c1) { cpustate->_C = SET(0,cpustate->_C); } /* SET 0,C */
+OP(cb,c2) { cpustate->_D = SET(0,cpustate->_D); } /* SET 0,D */
+OP(cb,c3) { cpustate->_E = SET(0,cpustate->_E); } /* SET 0,E */
+OP(cb,c4) { cpustate->_H = SET(0,cpustate->_H); } /* SET 0,H */
+OP(cb,c5) { cpustate->_L = SET(0,cpustate->_L); } /* SET 0,L */
+OP(cb,c6) { WM(cpustate, cpustate->_HL, SET(0,RM(cpustate, cpustate->_HL)) ); } /* SET 0,(HL) */
+OP(cb,c7) { cpustate->_A = SET(0,cpustate->_A); } /* SET 0,A */
+
+OP(cb,c8) { cpustate->_B = SET(1,cpustate->_B); } /* SET 1,B */
+OP(cb,c9) { cpustate->_C = SET(1,cpustate->_C); } /* SET 1,C */
+OP(cb,ca) { cpustate->_D = SET(1,cpustate->_D); } /* SET 1,D */
+OP(cb,cb) { cpustate->_E = SET(1,cpustate->_E); } /* SET 1,E */
+OP(cb,cc) { cpustate->_H = SET(1,cpustate->_H); } /* SET 1,H */
+OP(cb,cd) { cpustate->_L = SET(1,cpustate->_L); } /* SET 1,L */
+OP(cb,ce) { WM(cpustate, cpustate->_HL, SET(1,RM(cpustate, cpustate->_HL)) ); } /* SET 1,(HL) */
+OP(cb,cf) { cpustate->_A = SET(1,cpustate->_A); } /* SET 1,A */
+
+OP(cb,d0) { cpustate->_B = SET(2,cpustate->_B); } /* SET 2,B */
+OP(cb,d1) { cpustate->_C = SET(2,cpustate->_C); } /* SET 2,C */
+OP(cb,d2) { cpustate->_D = SET(2,cpustate->_D); } /* SET 2,D */
+OP(cb,d3) { cpustate->_E = SET(2,cpustate->_E); } /* SET 2,E */
+OP(cb,d4) { cpustate->_H = SET(2,cpustate->_H); } /* SET 2,H */
+OP(cb,d5) { cpustate->_L = SET(2,cpustate->_L); } /* SET 2,L */
+OP(cb,d6) { WM(cpustate, cpustate->_HL, SET(2,RM(cpustate, cpustate->_HL)) ); }/* SET 2,(HL) */
+OP(cb,d7) { cpustate->_A = SET(2,cpustate->_A); } /* SET 2,A */
+
+OP(cb,d8) { cpustate->_B = SET(3,cpustate->_B); } /* SET 3,B */
+OP(cb,d9) { cpustate->_C = SET(3,cpustate->_C); } /* SET 3,C */
+OP(cb,da) { cpustate->_D = SET(3,cpustate->_D); } /* SET 3,D */
+OP(cb,db) { cpustate->_E = SET(3,cpustate->_E); } /* SET 3,E */
+OP(cb,dc) { cpustate->_H = SET(3,cpustate->_H); } /* SET 3,H */
+OP(cb,dd) { cpustate->_L = SET(3,cpustate->_L); } /* SET 3,L */
+OP(cb,de) { WM(cpustate, cpustate->_HL, SET(3,RM(cpustate, cpustate->_HL)) ); } /* SET 3,(HL) */
+OP(cb,df) { cpustate->_A = SET(3,cpustate->_A); } /* SET 3,A */
+
+OP(cb,e0) { cpustate->_B = SET(4,cpustate->_B); } /* SET 4,B */
+OP(cb,e1) { cpustate->_C = SET(4,cpustate->_C); } /* SET 4,C */
+OP(cb,e2) { cpustate->_D = SET(4,cpustate->_D); } /* SET 4,D */
+OP(cb,e3) { cpustate->_E = SET(4,cpustate->_E); } /* SET 4,E */
+OP(cb,e4) { cpustate->_H = SET(4,cpustate->_H); } /* SET 4,H */
+OP(cb,e5) { cpustate->_L = SET(4,cpustate->_L); } /* SET 4,L */
+OP(cb,e6) { WM(cpustate, cpustate->_HL, SET(4,RM(cpustate, cpustate->_HL)) ); } /* SET 4,(HL) */
+OP(cb,e7) { cpustate->_A = SET(4,cpustate->_A); } /* SET 4,A */
+
+OP(cb,e8) { cpustate->_B = SET(5,cpustate->_B); } /* SET 5,B */
+OP(cb,e9) { cpustate->_C = SET(5,cpustate->_C); } /* SET 5,C */
+OP(cb,ea) { cpustate->_D = SET(5,cpustate->_D); } /* SET 5,D */
+OP(cb,eb) { cpustate->_E = SET(5,cpustate->_E); } /* SET 5,E */
+OP(cb,ec) { cpustate->_H = SET(5,cpustate->_H); } /* SET 5,H */
+OP(cb,ed) { cpustate->_L = SET(5,cpustate->_L); } /* SET 5,L */
+OP(cb,ee) { WM(cpustate, cpustate->_HL, SET(5,RM(cpustate, cpustate->_HL)) ); } /* SET 5,(HL) */
+OP(cb,ef) { cpustate->_A = SET(5,cpustate->_A); } /* SET 5,A */
+
+OP(cb,f0) { cpustate->_B = SET(6,cpustate->_B); } /* SET 6,B */
+OP(cb,f1) { cpustate->_C = SET(6,cpustate->_C); } /* SET 6,C */
+OP(cb,f2) { cpustate->_D = SET(6,cpustate->_D); } /* SET 6,D */
+OP(cb,f3) { cpustate->_E = SET(6,cpustate->_E); } /* SET 6,E */
+OP(cb,f4) { cpustate->_H = SET(6,cpustate->_H); } /* SET 6,H */
+OP(cb,f5) { cpustate->_L = SET(6,cpustate->_L); } /* SET 6,L */
+OP(cb,f6) { WM(cpustate, cpustate->_HL, SET(6,RM(cpustate, cpustate->_HL)) ); } /* SET 6,(HL) */
+OP(cb,f7) { cpustate->_A = SET(6,cpustate->_A); } /* SET 6,A */
+
+OP(cb,f8) { cpustate->_B = SET(7,cpustate->_B); } /* SET 7,B */
+OP(cb,f9) { cpustate->_C = SET(7,cpustate->_C); } /* SET 7,C */
+OP(cb,fa) { cpustate->_D = SET(7,cpustate->_D); } /* SET 7,D */
+OP(cb,fb) { cpustate->_E = SET(7,cpustate->_E); } /* SET 7,E */
+OP(cb,fc) { cpustate->_H = SET(7,cpustate->_H); } /* SET 7,H */
+OP(cb,fd) { cpustate->_L = SET(7,cpustate->_L); } /* SET 7,L */
+OP(cb,fe) { WM(cpustate, cpustate->_HL, SET(7,RM(cpustate, cpustate->_HL)) ); } /* SET 7,(HL) */
+OP(cb,ff) { cpustate->_A = SET(7,cpustate->_A); } /* SET 7,A */
diff --git a/src/emu/cpu/z180/z180dasm.c b/src/emu/cpu/z180/z180dasm.c
index 21fcc66f39b..39fcaee8f3c 100644
--- a/src/emu/cpu/z180/z180dasm.c
+++ b/src/emu/cpu/z180/z180dasm.c
@@ -230,7 +230,7 @@ static const z80dasm mnemonic_ed[256]= {
{zIN0,"a,(B)"}, {zOUT0,"(B),a"},{zDB,"?"}, {zDB,"?"},
{zTST,"a"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zIN,"b,(c)"}, {zOUT,"(c),b"}, {zSBC,"hl,bc"}, {zLD,"(W),bc"},
- {zNEG,0}, {zRETN,0}, {zIM,"0"}, {zLD,"i,a"},
+ {zNEG,0}, {zRETN,0}, {zIM,"0"}, {zLD,"i,a"},
{zIN,"c,(c)"}, {zOUT,"(c),c"}, {zADC,"hl,bc"}, {zLD,"bc,(W)"},
{zMLT,"bc"}, {zRETI,0}, {zIM,"0"}, {zLD,"r,a"},
{zIN,"d,(c)"}, {zOUT,"(c),d"}, {zSBC,"hl,de"}, {zLD,"(W),de"},
@@ -253,13 +253,13 @@ static const z80dasm mnemonic_ed[256]= {
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zOTDMR,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDI,0}, {zCPI,0}, {zINI,0}, {zOUTI,0},
+ {zLDI,0}, {zCPI,0}, {zINI,0}, {zOUTI,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDD,0}, {zCPD,0}, {zIND,0}, {zOUTD,0},
+ {zLDD,0}, {zCPD,0}, {zIND,0}, {zOUTD,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDIR,0}, {zCPIR,0}, {zINIR,0}, {zOTIR,0},
+ {zLDIR,0}, {zCPIR,0}, {zINIR,0}, {zOTIR,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDDR,0}, {zCPDR,0}, {zINDR,0}, {zOTDR,0},
+ {zLDDR,0}, {zCPDR,0}, {zINDR,0}, {zOTDR,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
@@ -347,7 +347,7 @@ static const z80dasm mnemonic_xx[256]= {
};
static const z80dasm mnemonic_main[256]= {
- {zNOP,0}, {zLD,"bc,N"}, {zLD,"(bc),a"}, {zINC,"bc"},
+ {zNOP,0}, {zLD,"bc,N"}, {zLD,"(bc),a"}, {zINC,"bc"},
{zINC,"b"}, {zDEC,"b"}, {zLD,"b,B"}, {zRLCA,0},
{zEX,"af,af'"}, {zADD,"hl,bc"}, {zLD,"a,(bc)"}, {zDEC,"bc"},
{zINC,"c"}, {zDEC,"c"}, {zLD,"c,B"}, {zRRCA,0},
@@ -415,7 +415,7 @@ static const z80dasm mnemonic_main[256]= {
static char sign(INT8 offset)
{
- return (offset < 0)? '-':'+';
+ return (offset < 0)? '-':'+';
}
static int offs(INT8 offset)
diff --git a/src/emu/cpu/z180/z180dd.c b/src/emu/cpu/z180/z180dd.c
index dd7a4c0a7ec..d606394c59b 100644
--- a/src/emu/cpu/z180/z180dd.c
+++ b/src/emu/cpu/z180/z180dd.c
@@ -6,291 +6,290 @@ OP(illegal,1) {
/**********************************************************
* IX register related opcodes (DD prefix)
**********************************************************/
-OP(dd,00) { illegal_1(cpustate); op_00(cpustate); } /* DB DD */
-OP(dd,01) { illegal_1(cpustate); op_01(cpustate); } /* DB DD */
-OP(dd,02) { illegal_1(cpustate); op_02(cpustate); } /* DB DD */
-OP(dd,03) { illegal_1(cpustate); op_03(cpustate); } /* DB DD */
-OP(dd,04) { illegal_1(cpustate); op_04(cpustate); } /* DB DD */
-OP(dd,05) { illegal_1(cpustate); op_05(cpustate); } /* DB DD */
-OP(dd,06) { illegal_1(cpustate); op_06(cpustate); } /* DB DD */
-OP(dd,07) { illegal_1(cpustate); op_07(cpustate); } /* DB DD */
-
-OP(dd,08) { illegal_1(cpustate); op_08(cpustate); } /* DB DD */
-OP(dd,09) { cpustate->R++; ADD16(IX,BC); } /* ADD IX,BC */
-OP(dd,0a) { illegal_1(cpustate); op_0a(cpustate); } /* DB DD */
-OP(dd,0b) { illegal_1(cpustate); op_0b(cpustate); } /* DB DD */
-OP(dd,0c) { illegal_1(cpustate); op_0c(cpustate); } /* DB DD */
-OP(dd,0d) { illegal_1(cpustate); op_0d(cpustate); } /* DB DD */
-OP(dd,0e) { illegal_1(cpustate); op_0e(cpustate); } /* DB DD */
-OP(dd,0f) { illegal_1(cpustate); op_0f(cpustate); } /* DB DD */
-
-OP(dd,10) { illegal_1(cpustate); op_10(cpustate); } /* DB DD */
-OP(dd,11) { illegal_1(cpustate); op_11(cpustate); } /* DB DD */
-OP(dd,12) { illegal_1(cpustate); op_12(cpustate); } /* DB DD */
-OP(dd,13) { illegal_1(cpustate); op_13(cpustate); } /* DB DD */
-OP(dd,14) { illegal_1(cpustate); op_14(cpustate); } /* DB DD */
-OP(dd,15) { illegal_1(cpustate); op_15(cpustate); } /* DB DD */
-OP(dd,16) { illegal_1(cpustate); op_16(cpustate); } /* DB DD */
-OP(dd,17) { illegal_1(cpustate); op_17(cpustate); } /* DB DD */
-
-OP(dd,18) { illegal_1(cpustate); op_18(cpustate); } /* DB DD */
-OP(dd,19) { cpustate->R++; ADD16(IX,DE); } /* ADD IX,DE */
-OP(dd,1a) { illegal_1(cpustate); op_1a(cpustate); } /* DB DD */
-OP(dd,1b) { illegal_1(cpustate); op_1b(cpustate); } /* DB DD */
-OP(dd,1c) { illegal_1(cpustate); op_1c(cpustate); } /* DB DD */
-OP(dd,1d) { illegal_1(cpustate); op_1d(cpustate); } /* DB DD */
-OP(dd,1e) { illegal_1(cpustate); op_1e(cpustate); } /* DB DD */
-OP(dd,1f) { illegal_1(cpustate); op_1f(cpustate); } /* DB DD */
-
-OP(dd,20) { illegal_1(cpustate); op_20(cpustate); } /* DB DD */
-OP(dd,21) { cpustate->R++; cpustate->_IX = ARG16(cpustate); } /* LD IX,w */
-OP(dd,22) { cpustate->R++; cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->IX ); } /* LD (w),IX */
-OP(dd,23) { cpustate->R++; cpustate->_IX++; } /* INC IX */
-OP(dd,24) { cpustate->R++; cpustate->_HX = INC(cpustate, cpustate->_HX); } /* INC HX */
-OP(dd,25) { cpustate->R++; cpustate->_HX = DEC(cpustate, cpustate->_HX); } /* DEC HX */
-OP(dd,26) { cpustate->R++; cpustate->_HX = ARG(cpustate); } /* LD HX,n */
-OP(dd,27) { illegal_1(cpustate); op_27(cpustate); } /* DB DD */
-
-OP(dd,28) { illegal_1(cpustate); op_28(cpustate); } /* DB DD */
-OP(dd,29) { cpustate->R++; ADD16(IX,IX); } /* ADD IX,IX */
-OP(dd,2a) { cpustate->R++; cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->IX ); } /* LD IX,(w) */
-OP(dd,2b) { cpustate->R++; cpustate->_IX--; } /* DEC IX */
-OP(dd,2c) { cpustate->R++; cpustate->_LX = INC(cpustate, cpustate->_LX); } /* INC LX */
-OP(dd,2d) { cpustate->R++; cpustate->_LX = DEC(cpustate, cpustate->_LX); } /* DEC LX */
-OP(dd,2e) { cpustate->R++; cpustate->_LX = ARG(cpustate); } /* LD LX,n */
-OP(dd,2f) { illegal_1(cpustate); op_2f(cpustate); } /* DB DD */
-
-OP(dd,30) { illegal_1(cpustate); op_30(cpustate); } /* DB DD */
-OP(dd,31) { illegal_1(cpustate); op_31(cpustate); } /* DB DD */
-OP(dd,32) { illegal_1(cpustate); op_32(cpustate); } /* DB DD */
-OP(dd,33) { illegal_1(cpustate); op_33(cpustate); } /* DB DD */
-OP(dd,34) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, INC(cpustate, RM(cpustate, cpustate->ea)) ); } /* INC (IX+o) */
-OP(dd,35) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, DEC(cpustate, RM(cpustate, cpustate->ea)) ); } /* DEC (IX+o) */
-OP(dd,36) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IX+o),n */
-OP(dd,37) { illegal_1(cpustate); op_37(cpustate); } /* DB DD */
-
-OP(dd,38) { illegal_1(cpustate); op_38(cpustate); } /* DB DD */
-OP(dd,39) { cpustate->R++; ADD16(IX,SP); } /* ADD IX,SP */
-OP(dd,3a) { illegal_1(cpustate); op_3a(cpustate); } /* DB DD */
-OP(dd,3b) { illegal_1(cpustate); op_3b(cpustate); } /* DB DD */
-OP(dd,3c) { illegal_1(cpustate); op_3c(cpustate); } /* DB DD */
-OP(dd,3d) { illegal_1(cpustate); op_3d(cpustate); } /* DB DD */
-OP(dd,3e) { illegal_1(cpustate); op_3e(cpustate); } /* DB DD */
-OP(dd,3f) { illegal_1(cpustate); op_3f(cpustate); } /* DB DD */
-
-OP(dd,40) { illegal_1(cpustate); op_40(cpustate); } /* DB DD */
-OP(dd,41) { illegal_1(cpustate); op_41(cpustate); } /* DB DD */
-OP(dd,42) { illegal_1(cpustate); op_42(cpustate); } /* DB DD */
-OP(dd,43) { illegal_1(cpustate); op_43(cpustate); } /* DB DD */
-OP(dd,44) { cpustate->R++; cpustate->_B = cpustate->_HX; } /* LD B,HX */
-OP(dd,45) { cpustate->R++; cpustate->_B = cpustate->_LX; } /* LD B,LX */
-OP(dd,46) { cpustate->R++; EAX(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IX+o) */
-OP(dd,47) { illegal_1(cpustate); op_47(cpustate); } /* DB DD */
-
-OP(dd,48) { illegal_1(cpustate); op_48(cpustate); } /* DB DD */
-OP(dd,49) { illegal_1(cpustate); op_49(cpustate); } /* DB DD */
-OP(dd,4a) { illegal_1(cpustate); op_4a(cpustate); } /* DB DD */
-OP(dd,4b) { illegal_1(cpustate); op_4b(cpustate); } /* DB DD */
-OP(dd,4c) { cpustate->R++; cpustate->_C = cpustate->_HX; } /* LD C,HX */
-OP(dd,4d) { cpustate->R++; cpustate->_C = cpustate->_LX; } /* LD C,LX */
-OP(dd,4e) { cpustate->R++; EAX(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IX+o) */
-OP(dd,4f) { illegal_1(cpustate); op_4f(cpustate); } /* DB DD */
-
-OP(dd,50) { illegal_1(cpustate); op_50(cpustate); } /* DB DD */
-OP(dd,51) { illegal_1(cpustate); op_51(cpustate); } /* DB DD */
-OP(dd,52) { illegal_1(cpustate); op_52(cpustate); } /* DB DD */
-OP(dd,53) { illegal_1(cpustate); op_53(cpustate); } /* DB DD */
-OP(dd,54) { cpustate->R++; cpustate->_D = cpustate->_HX; } /* LD D,HX */
-OP(dd,55) { cpustate->R++; cpustate->_D = cpustate->_LX; } /* LD D,LX */
-OP(dd,56) { cpustate->R++; EAX(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IX+o) */
-OP(dd,57) { illegal_1(cpustate); op_57(cpustate); } /* DB DD */
-
-OP(dd,58) { illegal_1(cpustate); op_58(cpustate); } /* DB DD */
-OP(dd,59) { illegal_1(cpustate); op_59(cpustate); } /* DB DD */
-OP(dd,5a) { illegal_1(cpustate); op_5a(cpustate); } /* DB DD */
-OP(dd,5b) { illegal_1(cpustate); op_5b(cpustate); } /* DB DD */
-OP(dd,5c) { cpustate->R++; cpustate->_E = cpustate->_HX; } /* LD E,HX */
-OP(dd,5d) { cpustate->R++; cpustate->_E = cpustate->_LX; } /* LD E,LX */
-OP(dd,5e) { cpustate->R++; EAX(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IX+o) */
-OP(dd,5f) { illegal_1(cpustate); op_5f(cpustate); } /* DB DD */
-
-OP(dd,60) { cpustate->R++; cpustate->_HX = cpustate->_B; } /* LD HX,B */
-OP(dd,61) { cpustate->R++; cpustate->_HX = cpustate->_C; } /* LD HX,C */
-OP(dd,62) { cpustate->R++; cpustate->_HX = cpustate->_D; } /* LD HX,D */
-OP(dd,63) { cpustate->R++; cpustate->_HX = cpustate->_E; } /* LD HX,E */
-OP(dd,64) { } /* LD HX,HX */
-OP(dd,65) { cpustate->R++; cpustate->_HX = cpustate->_LX; } /* LD HX,LX */
-OP(dd,66) { cpustate->R++; EAX(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IX+o) */
-OP(dd,67) { cpustate->R++; cpustate->_HX = cpustate->_A; } /* LD HX,A */
-
-OP(dd,68) { cpustate->R++; cpustate->_LX = cpustate->_B; } /* LD LX,B */
-OP(dd,69) { cpustate->R++; cpustate->_LX = cpustate->_C; } /* LD LX,C */
-OP(dd,6a) { cpustate->R++; cpustate->_LX = cpustate->_D; } /* LD LX,D */
-OP(dd,6b) { cpustate->R++; cpustate->_LX = cpustate->_E; } /* LD LX,E */
-OP(dd,6c) { cpustate->R++; cpustate->_LX = cpustate->_HX; } /* LD LX,HX */
-OP(dd,6d) { } /* LD LX,LX */
-OP(dd,6e) { cpustate->R++; EAX(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IX+o) */
-OP(dd,6f) { cpustate->R++; cpustate->_LX = cpustate->_A; } /* LD LX,A */
-
-OP(dd,70) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_B ); } /* LD (IX+o),B */
-OP(dd,71) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_C ); } /* LD (IX+o),C */
-OP(dd,72) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_D ); } /* LD (IX+o),D */
-OP(dd,73) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_E ); } /* LD (IX+o),E */
-OP(dd,74) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_H ); } /* LD (IX+o),H */
-OP(dd,75) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_L ); } /* LD (IX+o),L */
-OP(dd,76) { illegal_1(cpustate); op_76(cpustate); } /* DB DD */
-OP(dd,77) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_A ); } /* LD (IX+o),A */
-
-OP(dd,78) { illegal_1(cpustate); op_78(cpustate); } /* DB DD */
-OP(dd,79) { illegal_1(cpustate); op_79(cpustate); } /* DB DD */
-OP(dd,7a) { illegal_1(cpustate); op_7a(cpustate); } /* DB DD */
-OP(dd,7b) { illegal_1(cpustate); op_7b(cpustate); } /* DB DD */
-OP(dd,7c) { cpustate->R++; cpustate->_A = cpustate->_HX; } /* LD A,HX */
-OP(dd,7d) { cpustate->R++; cpustate->_A = cpustate->_LX; } /* LD A,LX */
-OP(dd,7e) { cpustate->R++; EAX(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IX+o) */
-OP(dd,7f) { illegal_1(cpustate); op_7f(cpustate); } /* DB DD */
-
-OP(dd,80) { illegal_1(cpustate); op_80(cpustate); } /* DB DD */
-OP(dd,81) { illegal_1(cpustate); op_81(cpustate); } /* DB DD */
-OP(dd,82) { illegal_1(cpustate); op_82(cpustate); } /* DB DD */
-OP(dd,83) { illegal_1(cpustate); op_83(cpustate); } /* DB DD */
-OP(dd,84) { cpustate->R++; ADD(cpustate->_HX); } /* ADD A,HX */
-OP(dd,85) { cpustate->R++; ADD(cpustate->_LX); } /* ADD A,LX */
-OP(dd,86) { cpustate->R++; EAX(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IX+o) */
-OP(dd,87) { illegal_1(cpustate); op_87(cpustate); } /* DB DD */
-
-OP(dd,88) { illegal_1(cpustate); op_88(cpustate); } /* DB DD */
-OP(dd,89) { illegal_1(cpustate); op_89(cpustate); } /* DB DD */
-OP(dd,8a) { illegal_1(cpustate); op_8a(cpustate); } /* DB DD */
-OP(dd,8b) { illegal_1(cpustate); op_8b(cpustate); } /* DB DD */
-OP(dd,8c) { cpustate->R++; ADC(cpustate->_HX); } /* ADC A,HX */
-OP(dd,8d) { cpustate->R++; ADC(cpustate->_LX); } /* ADC A,LX */
-OP(dd,8e) { cpustate->R++; EAX(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IX+o) */
-OP(dd,8f) { illegal_1(cpustate); op_8f(cpustate); } /* DB DD */
-
-OP(dd,90) { illegal_1(cpustate); op_90(cpustate); } /* DB DD */
-OP(dd,91) { illegal_1(cpustate); op_91(cpustate); } /* DB DD */
-OP(dd,92) { illegal_1(cpustate); op_92(cpustate); } /* DB DD */
-OP(dd,93) { illegal_1(cpustate); op_93(cpustate); } /* DB DD */
-OP(dd,94) { cpustate->R++; SUB(cpustate->_HX); } /* SUB HX */
-OP(dd,95) { cpustate->R++; SUB(cpustate->_LX); } /* SUB LX */
-OP(dd,96) { cpustate->R++; EAX(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IX+o) */
-OP(dd,97) { illegal_1(cpustate); op_97(cpustate); } /* DB DD */
-
-OP(dd,98) { illegal_1(cpustate); op_98(cpustate); } /* DB DD */
-OP(dd,99) { illegal_1(cpustate); op_99(cpustate); } /* DB DD */
-OP(dd,9a) { illegal_1(cpustate); op_9a(cpustate); } /* DB DD */
-OP(dd,9b) { illegal_1(cpustate); op_9b(cpustate); } /* DB DD */
-OP(dd,9c) { cpustate->R++; SBC(cpustate->_HX); } /* SBC A,HX */
-OP(dd,9d) { cpustate->R++; SBC(cpustate->_LX); } /* SBC A,LX */
-OP(dd,9e) { cpustate->R++; EAX(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IX+o) */
-OP(dd,9f) { illegal_1(cpustate); op_9f(cpustate); } /* DB DD */
-
-OP(dd,a0) { illegal_1(cpustate); op_a0(cpustate); } /* DB DD */
-OP(dd,a1) { illegal_1(cpustate); op_a1(cpustate); } /* DB DD */
-OP(dd,a2) { illegal_1(cpustate); op_a2(cpustate); } /* DB DD */
-OP(dd,a3) { illegal_1(cpustate); op_a3(cpustate); } /* DB DD */
-OP(dd,a4) { cpustate->R++; AND(cpustate->_HX); } /* AND HX */
-OP(dd,a5) { cpustate->R++; AND(cpustate->_LX); } /* AND LX */
-OP(dd,a6) { cpustate->R++; EAX(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IX+o) */
-OP(dd,a7) { illegal_1(cpustate); op_a7(cpustate); } /* DB DD */
-
-OP(dd,a8) { illegal_1(cpustate); op_a8(cpustate); } /* DB DD */
-OP(dd,a9) { illegal_1(cpustate); op_a9(cpustate); } /* DB DD */
-OP(dd,aa) { illegal_1(cpustate); op_aa(cpustate); } /* DB DD */
-OP(dd,ab) { illegal_1(cpustate); op_ab(cpustate); } /* DB DD */
-OP(dd,ac) { cpustate->R++; XOR(cpustate->_HX); } /* XOR HX */
-OP(dd,ad) { cpustate->R++; XOR(cpustate->_LX); } /* XOR LX */
-OP(dd,ae) { cpustate->R++; EAX(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IX+o) */
-OP(dd,af) { illegal_1(cpustate); op_af(cpustate); } /* DB DD */
-
-OP(dd,b0) { illegal_1(cpustate); op_b0(cpustate); } /* DB DD */
-OP(dd,b1) { illegal_1(cpustate); op_b1(cpustate); } /* DB DD */
-OP(dd,b2) { illegal_1(cpustate); op_b2(cpustate); } /* DB DD */
-OP(dd,b3) { illegal_1(cpustate); op_b3(cpustate); } /* DB DD */
-OP(dd,b4) { cpustate->R++; OR(cpustate->_HX); } /* OR HX */
-OP(dd,b5) { cpustate->R++; OR(cpustate->_LX); } /* OR LX */
-OP(dd,b6) { cpustate->R++; EAX(cpustate); OR(RM(cpustate, cpustate->ea)); } /* OR (IX+o) */
-OP(dd,b7) { illegal_1(cpustate); op_b7(cpustate); } /* DB DD */
-
-OP(dd,b8) { illegal_1(cpustate); op_b8(cpustate); } /* DB DD */
-OP(dd,b9) { illegal_1(cpustate); op_b9(cpustate); } /* DB DD */
-OP(dd,ba) { illegal_1(cpustate); op_ba(cpustate); } /* DB DD */
-OP(dd,bb) { illegal_1(cpustate); op_bb(cpustate); } /* DB DD */
-OP(dd,bc) { cpustate->R++; CP(cpustate->_HX); } /* CP HX */
-OP(dd,bd) { cpustate->R++; CP(cpustate->_LX); } /* CP LX */
-OP(dd,be) { cpustate->R++; EAX(cpustate); CP(RM(cpustate, cpustate->ea)); } /* CP (IX+o) */
-OP(dd,bf) { illegal_1(cpustate); op_bf(cpustate); } /* DB DD */
-
-OP(dd,c0) { illegal_1(cpustate); op_c0(cpustate); } /* DB DD */
-OP(dd,c1) { illegal_1(cpustate); op_c1(cpustate); } /* DB DD */
-OP(dd,c2) { illegal_1(cpustate); op_c2(cpustate); } /* DB DD */
-OP(dd,c3) { illegal_1(cpustate); op_c3(cpustate); } /* DB DD */
-OP(dd,c4) { illegal_1(cpustate); op_c4(cpustate); } /* DB DD */
-OP(dd,c5) { illegal_1(cpustate); op_c5(cpustate); } /* DB DD */
-OP(dd,c6) { illegal_1(cpustate); op_c6(cpustate); } /* DB DD */
-OP(dd,c7) { illegal_1(cpustate); op_c7(cpustate); } /* DB DD */
-
-OP(dd,c8) { illegal_1(cpustate); op_c8(cpustate); } /* DB DD */
-OP(dd,c9) { illegal_1(cpustate); op_c9(cpustate); } /* DB DD */
-OP(dd,ca) { illegal_1(cpustate); op_ca(cpustate); } /* DB DD */
-OP(dd,cb) { cpustate->R++; EAX(cpustate); cpustate->extra_cycles += exec_xycb(cpustate,ARG(cpustate)); } /* ** DD CB xx */
-OP(dd,cc) { illegal_1(cpustate); op_cc(cpustate); } /* DB DD */
-OP(dd,cd) { illegal_1(cpustate); op_cd(cpustate); } /* DB DD */
-OP(dd,ce) { illegal_1(cpustate); op_ce(cpustate); } /* DB DD */
-OP(dd,cf) { illegal_1(cpustate); op_cf(cpustate); } /* DB DD */
-
-OP(dd,d0) { illegal_1(cpustate); op_d0(cpustate); } /* DB DD */
-OP(dd,d1) { illegal_1(cpustate); op_d1(cpustate); } /* DB DD */
-OP(dd,d2) { illegal_1(cpustate); op_d2(cpustate); } /* DB DD */
-OP(dd,d3) { illegal_1(cpustate); op_d3(cpustate); } /* DB DD */
-OP(dd,d4) { illegal_1(cpustate); op_d4(cpustate); } /* DB DD */
-OP(dd,d5) { illegal_1(cpustate); op_d5(cpustate); } /* DB DD */
-OP(dd,d6) { illegal_1(cpustate); op_d6(cpustate); } /* DB DD */
-OP(dd,d7) { illegal_1(cpustate); op_d7(cpustate); } /* DB DD */
-
-OP(dd,d8) { illegal_1(cpustate); op_d8(cpustate); } /* DB DD */
-OP(dd,d9) { illegal_1(cpustate); op_d9(cpustate); } /* DB DD */
-OP(dd,da) { illegal_1(cpustate); op_da(cpustate); } /* DB DD */
-OP(dd,db) { illegal_1(cpustate); op_db(cpustate); } /* DB DD */
-OP(dd,dc) { illegal_1(cpustate); op_dc(cpustate); } /* DB DD */
-OP(dd,dd) { illegal_1(cpustate); op_dd(cpustate); } /* DB DD */
-OP(dd,de) { illegal_1(cpustate); op_de(cpustate); } /* DB DD */
-OP(dd,df) { illegal_1(cpustate); op_df(cpustate); } /* DB DD */
-
-OP(dd,e0) { illegal_1(cpustate); op_e0(cpustate); } /* DB DD */
-OP(dd,e1) { cpustate->R++; POP(cpustate, IX); } /* POP IX */
-OP(dd,e2) { illegal_1(cpustate); op_e2(cpustate); } /* DB DD */
-OP(dd,e3) { cpustate->R++; EXSP(IX); } /* EX (SP),IX */
-OP(dd,e4) { illegal_1(cpustate); op_e4(cpustate); } /* DB DD */
-OP(dd,e5) { cpustate->R++; PUSH(cpustate, IX ); } /* PUSH IX */
-OP(dd,e6) { illegal_1(cpustate); op_e6(cpustate); } /* DB DD */
-OP(dd,e7) { illegal_1(cpustate); op_e7(cpustate); } /* DB DD */
-
-OP(dd,e8) { illegal_1(cpustate); op_e8(cpustate); } /* DB DD */
-OP(dd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IX; } /* JP (IX) */
-OP(dd,ea) { illegal_1(cpustate); op_ea(cpustate); } /* DB DD */
-OP(dd,eb) { illegal_1(cpustate); op_eb(cpustate); } /* DB DD */
-OP(dd,ec) { illegal_1(cpustate); op_ec(cpustate); } /* DB DD */
-OP(dd,ed) { illegal_1(cpustate); op_ed(cpustate); } /* DB DD */
-OP(dd,ee) { illegal_1(cpustate); op_ee(cpustate); } /* DB DD */
-OP(dd,ef) { illegal_1(cpustate); op_ef(cpustate); } /* DB DD */
-
-OP(dd,f0) { illegal_1(cpustate); op_f0(cpustate); } /* DB DD */
-OP(dd,f1) { illegal_1(cpustate); op_f1(cpustate); } /* DB DD */
-OP(dd,f2) { illegal_1(cpustate); op_f2(cpustate); } /* DB DD */
-OP(dd,f3) { illegal_1(cpustate); op_f3(cpustate); } /* DB DD */
-OP(dd,f4) { illegal_1(cpustate); op_f4(cpustate); } /* DB DD */
-OP(dd,f5) { illegal_1(cpustate); op_f5(cpustate); } /* DB DD */
-OP(dd,f6) { illegal_1(cpustate); op_f6(cpustate); } /* DB DD */
-OP(dd,f7) { illegal_1(cpustate); op_f7(cpustate); } /* DB DD */
-
-OP(dd,f8) { illegal_1(cpustate); op_f8(cpustate); } /* DB DD */
-OP(dd,f9) { cpustate->R++; cpustate->_SP = cpustate->_IX; } /* LD SP,IX */
-OP(dd,fa) { illegal_1(cpustate); op_fa(cpustate); } /* DB DD */
-OP(dd,fb) { illegal_1(cpustate); op_fb(cpustate); } /* DB DD */
-OP(dd,fc) { illegal_1(cpustate); op_fc(cpustate); } /* DB DD */
-OP(dd,fd) { illegal_1(cpustate); op_fd(cpustate); } /* DB DD */
-OP(dd,fe) { illegal_1(cpustate); op_fe(cpustate); } /* DB DD */
-OP(dd,ff) { illegal_1(cpustate); op_ff(cpustate); } /* DB DD */
-
+OP(dd,00) { illegal_1(cpustate); op_00(cpustate); } /* DB DD */
+OP(dd,01) { illegal_1(cpustate); op_01(cpustate); } /* DB DD */
+OP(dd,02) { illegal_1(cpustate); op_02(cpustate); } /* DB DD */
+OP(dd,03) { illegal_1(cpustate); op_03(cpustate); } /* DB DD */
+OP(dd,04) { illegal_1(cpustate); op_04(cpustate); } /* DB DD */
+OP(dd,05) { illegal_1(cpustate); op_05(cpustate); } /* DB DD */
+OP(dd,06) { illegal_1(cpustate); op_06(cpustate); } /* DB DD */
+OP(dd,07) { illegal_1(cpustate); op_07(cpustate); } /* DB DD */
+
+OP(dd,08) { illegal_1(cpustate); op_08(cpustate); } /* DB DD */
+OP(dd,09) { cpustate->R++; ADD16(IX,BC); } /* ADD IX,BC */
+OP(dd,0a) { illegal_1(cpustate); op_0a(cpustate); } /* DB DD */
+OP(dd,0b) { illegal_1(cpustate); op_0b(cpustate); } /* DB DD */
+OP(dd,0c) { illegal_1(cpustate); op_0c(cpustate); } /* DB DD */
+OP(dd,0d) { illegal_1(cpustate); op_0d(cpustate); } /* DB DD */
+OP(dd,0e) { illegal_1(cpustate); op_0e(cpustate); } /* DB DD */
+OP(dd,0f) { illegal_1(cpustate); op_0f(cpustate); } /* DB DD */
+
+OP(dd,10) { illegal_1(cpustate); op_10(cpustate); } /* DB DD */
+OP(dd,11) { illegal_1(cpustate); op_11(cpustate); } /* DB DD */
+OP(dd,12) { illegal_1(cpustate); op_12(cpustate); } /* DB DD */
+OP(dd,13) { illegal_1(cpustate); op_13(cpustate); } /* DB DD */
+OP(dd,14) { illegal_1(cpustate); op_14(cpustate); } /* DB DD */
+OP(dd,15) { illegal_1(cpustate); op_15(cpustate); } /* DB DD */
+OP(dd,16) { illegal_1(cpustate); op_16(cpustate); } /* DB DD */
+OP(dd,17) { illegal_1(cpustate); op_17(cpustate); } /* DB DD */
+
+OP(dd,18) { illegal_1(cpustate); op_18(cpustate); } /* DB DD */
+OP(dd,19) { cpustate->R++; ADD16(IX,DE); } /* ADD IX,DE */
+OP(dd,1a) { illegal_1(cpustate); op_1a(cpustate); } /* DB DD */
+OP(dd,1b) { illegal_1(cpustate); op_1b(cpustate); } /* DB DD */
+OP(dd,1c) { illegal_1(cpustate); op_1c(cpustate); } /* DB DD */
+OP(dd,1d) { illegal_1(cpustate); op_1d(cpustate); } /* DB DD */
+OP(dd,1e) { illegal_1(cpustate); op_1e(cpustate); } /* DB DD */
+OP(dd,1f) { illegal_1(cpustate); op_1f(cpustate); } /* DB DD */
+
+OP(dd,20) { illegal_1(cpustate); op_20(cpustate); } /* DB DD */
+OP(dd,21) { cpustate->R++; cpustate->_IX = ARG16(cpustate); } /* LD IX,w */
+OP(dd,22) { cpustate->R++; cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->IX ); } /* LD (w),IX */
+OP(dd,23) { cpustate->R++; cpustate->_IX++; } /* INC IX */
+OP(dd,24) { cpustate->R++; cpustate->_HX = INC(cpustate, cpustate->_HX); } /* INC HX */
+OP(dd,25) { cpustate->R++; cpustate->_HX = DEC(cpustate, cpustate->_HX); } /* DEC HX */
+OP(dd,26) { cpustate->R++; cpustate->_HX = ARG(cpustate); } /* LD HX,n */
+OP(dd,27) { illegal_1(cpustate); op_27(cpustate); } /* DB DD */
+
+OP(dd,28) { illegal_1(cpustate); op_28(cpustate); } /* DB DD */
+OP(dd,29) { cpustate->R++; ADD16(IX,IX); } /* ADD IX,IX */
+OP(dd,2a) { cpustate->R++; cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->IX ); } /* LD IX,(w) */
+OP(dd,2b) { cpustate->R++; cpustate->_IX--; } /* DEC IX */
+OP(dd,2c) { cpustate->R++; cpustate->_LX = INC(cpustate, cpustate->_LX); } /* INC LX */
+OP(dd,2d) { cpustate->R++; cpustate->_LX = DEC(cpustate, cpustate->_LX); } /* DEC LX */
+OP(dd,2e) { cpustate->R++; cpustate->_LX = ARG(cpustate); } /* LD LX,n */
+OP(dd,2f) { illegal_1(cpustate); op_2f(cpustate); } /* DB DD */
+
+OP(dd,30) { illegal_1(cpustate); op_30(cpustate); } /* DB DD */
+OP(dd,31) { illegal_1(cpustate); op_31(cpustate); } /* DB DD */
+OP(dd,32) { illegal_1(cpustate); op_32(cpustate); } /* DB DD */
+OP(dd,33) { illegal_1(cpustate); op_33(cpustate); } /* DB DD */
+OP(dd,34) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, INC(cpustate, RM(cpustate, cpustate->ea)) ); } /* INC (IX+o) */
+OP(dd,35) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, DEC(cpustate, RM(cpustate, cpustate->ea)) ); } /* DEC (IX+o) */
+OP(dd,36) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IX+o),n */
+OP(dd,37) { illegal_1(cpustate); op_37(cpustate); } /* DB DD */
+
+OP(dd,38) { illegal_1(cpustate); op_38(cpustate); } /* DB DD */
+OP(dd,39) { cpustate->R++; ADD16(IX,SP); } /* ADD IX,SP */
+OP(dd,3a) { illegal_1(cpustate); op_3a(cpustate); } /* DB DD */
+OP(dd,3b) { illegal_1(cpustate); op_3b(cpustate); } /* DB DD */
+OP(dd,3c) { illegal_1(cpustate); op_3c(cpustate); } /* DB DD */
+OP(dd,3d) { illegal_1(cpustate); op_3d(cpustate); } /* DB DD */
+OP(dd,3e) { illegal_1(cpustate); op_3e(cpustate); } /* DB DD */
+OP(dd,3f) { illegal_1(cpustate); op_3f(cpustate); } /* DB DD */
+
+OP(dd,40) { illegal_1(cpustate); op_40(cpustate); } /* DB DD */
+OP(dd,41) { illegal_1(cpustate); op_41(cpustate); } /* DB DD */
+OP(dd,42) { illegal_1(cpustate); op_42(cpustate); } /* DB DD */
+OP(dd,43) { illegal_1(cpustate); op_43(cpustate); } /* DB DD */
+OP(dd,44) { cpustate->R++; cpustate->_B = cpustate->_HX; } /* LD B,HX */
+OP(dd,45) { cpustate->R++; cpustate->_B = cpustate->_LX; } /* LD B,LX */
+OP(dd,46) { cpustate->R++; EAX(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IX+o) */
+OP(dd,47) { illegal_1(cpustate); op_47(cpustate); } /* DB DD */
+
+OP(dd,48) { illegal_1(cpustate); op_48(cpustate); } /* DB DD */
+OP(dd,49) { illegal_1(cpustate); op_49(cpustate); } /* DB DD */
+OP(dd,4a) { illegal_1(cpustate); op_4a(cpustate); } /* DB DD */
+OP(dd,4b) { illegal_1(cpustate); op_4b(cpustate); } /* DB DD */
+OP(dd,4c) { cpustate->R++; cpustate->_C = cpustate->_HX; } /* LD C,HX */
+OP(dd,4d) { cpustate->R++; cpustate->_C = cpustate->_LX; } /* LD C,LX */
+OP(dd,4e) { cpustate->R++; EAX(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IX+o) */
+OP(dd,4f) { illegal_1(cpustate); op_4f(cpustate); } /* DB DD */
+
+OP(dd,50) { illegal_1(cpustate); op_50(cpustate); } /* DB DD */
+OP(dd,51) { illegal_1(cpustate); op_51(cpustate); } /* DB DD */
+OP(dd,52) { illegal_1(cpustate); op_52(cpustate); } /* DB DD */
+OP(dd,53) { illegal_1(cpustate); op_53(cpustate); } /* DB DD */
+OP(dd,54) { cpustate->R++; cpustate->_D = cpustate->_HX; } /* LD D,HX */
+OP(dd,55) { cpustate->R++; cpustate->_D = cpustate->_LX; } /* LD D,LX */
+OP(dd,56) { cpustate->R++; EAX(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IX+o) */
+OP(dd,57) { illegal_1(cpustate); op_57(cpustate); } /* DB DD */
+
+OP(dd,58) { illegal_1(cpustate); op_58(cpustate); } /* DB DD */
+OP(dd,59) { illegal_1(cpustate); op_59(cpustate); } /* DB DD */
+OP(dd,5a) { illegal_1(cpustate); op_5a(cpustate); } /* DB DD */
+OP(dd,5b) { illegal_1(cpustate); op_5b(cpustate); } /* DB DD */
+OP(dd,5c) { cpustate->R++; cpustate->_E = cpustate->_HX; } /* LD E,HX */
+OP(dd,5d) { cpustate->R++; cpustate->_E = cpustate->_LX; } /* LD E,LX */
+OP(dd,5e) { cpustate->R++; EAX(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IX+o) */
+OP(dd,5f) { illegal_1(cpustate); op_5f(cpustate); } /* DB DD */
+
+OP(dd,60) { cpustate->R++; cpustate->_HX = cpustate->_B; } /* LD HX,B */
+OP(dd,61) { cpustate->R++; cpustate->_HX = cpustate->_C; } /* LD HX,C */
+OP(dd,62) { cpustate->R++; cpustate->_HX = cpustate->_D; } /* LD HX,D */
+OP(dd,63) { cpustate->R++; cpustate->_HX = cpustate->_E; } /* LD HX,E */
+OP(dd,64) { } /* LD HX,HX */
+OP(dd,65) { cpustate->R++; cpustate->_HX = cpustate->_LX; } /* LD HX,LX */
+OP(dd,66) { cpustate->R++; EAX(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IX+o) */
+OP(dd,67) { cpustate->R++; cpustate->_HX = cpustate->_A; } /* LD HX,A */
+
+OP(dd,68) { cpustate->R++; cpustate->_LX = cpustate->_B; } /* LD LX,B */
+OP(dd,69) { cpustate->R++; cpustate->_LX = cpustate->_C; } /* LD LX,C */
+OP(dd,6a) { cpustate->R++; cpustate->_LX = cpustate->_D; } /* LD LX,D */
+OP(dd,6b) { cpustate->R++; cpustate->_LX = cpustate->_E; } /* LD LX,E */
+OP(dd,6c) { cpustate->R++; cpustate->_LX = cpustate->_HX; } /* LD LX,HX */
+OP(dd,6d) { } /* LD LX,LX */
+OP(dd,6e) { cpustate->R++; EAX(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IX+o) */
+OP(dd,6f) { cpustate->R++; cpustate->_LX = cpustate->_A; } /* LD LX,A */
+
+OP(dd,70) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_B ); } /* LD (IX+o),B */
+OP(dd,71) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_C ); } /* LD (IX+o),C */
+OP(dd,72) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_D ); } /* LD (IX+o),D */
+OP(dd,73) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_E ); } /* LD (IX+o),E */
+OP(dd,74) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_H ); } /* LD (IX+o),H */
+OP(dd,75) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_L ); } /* LD (IX+o),L */
+OP(dd,76) { illegal_1(cpustate); op_76(cpustate); } /* DB DD */
+OP(dd,77) { cpustate->R++; EAX(cpustate); WM(cpustate, cpustate->ea, cpustate->_A ); } /* LD (IX+o),A */
+
+OP(dd,78) { illegal_1(cpustate); op_78(cpustate); } /* DB DD */
+OP(dd,79) { illegal_1(cpustate); op_79(cpustate); } /* DB DD */
+OP(dd,7a) { illegal_1(cpustate); op_7a(cpustate); } /* DB DD */
+OP(dd,7b) { illegal_1(cpustate); op_7b(cpustate); } /* DB DD */
+OP(dd,7c) { cpustate->R++; cpustate->_A = cpustate->_HX; } /* LD A,HX */
+OP(dd,7d) { cpustate->R++; cpustate->_A = cpustate->_LX; } /* LD A,LX */
+OP(dd,7e) { cpustate->R++; EAX(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IX+o) */
+OP(dd,7f) { illegal_1(cpustate); op_7f(cpustate); } /* DB DD */
+
+OP(dd,80) { illegal_1(cpustate); op_80(cpustate); } /* DB DD */
+OP(dd,81) { illegal_1(cpustate); op_81(cpustate); } /* DB DD */
+OP(dd,82) { illegal_1(cpustate); op_82(cpustate); } /* DB DD */
+OP(dd,83) { illegal_1(cpustate); op_83(cpustate); } /* DB DD */
+OP(dd,84) { cpustate->R++; ADD(cpustate->_HX); } /* ADD A,HX */
+OP(dd,85) { cpustate->R++; ADD(cpustate->_LX); } /* ADD A,LX */
+OP(dd,86) { cpustate->R++; EAX(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IX+o) */
+OP(dd,87) { illegal_1(cpustate); op_87(cpustate); } /* DB DD */
+
+OP(dd,88) { illegal_1(cpustate); op_88(cpustate); } /* DB DD */
+OP(dd,89) { illegal_1(cpustate); op_89(cpustate); } /* DB DD */
+OP(dd,8a) { illegal_1(cpustate); op_8a(cpustate); } /* DB DD */
+OP(dd,8b) { illegal_1(cpustate); op_8b(cpustate); } /* DB DD */
+OP(dd,8c) { cpustate->R++; ADC(cpustate->_HX); } /* ADC A,HX */
+OP(dd,8d) { cpustate->R++; ADC(cpustate->_LX); } /* ADC A,LX */
+OP(dd,8e) { cpustate->R++; EAX(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IX+o) */
+OP(dd,8f) { illegal_1(cpustate); op_8f(cpustate); } /* DB DD */
+
+OP(dd,90) { illegal_1(cpustate); op_90(cpustate); } /* DB DD */
+OP(dd,91) { illegal_1(cpustate); op_91(cpustate); } /* DB DD */
+OP(dd,92) { illegal_1(cpustate); op_92(cpustate); } /* DB DD */
+OP(dd,93) { illegal_1(cpustate); op_93(cpustate); } /* DB DD */
+OP(dd,94) { cpustate->R++; SUB(cpustate->_HX); } /* SUB HX */
+OP(dd,95) { cpustate->R++; SUB(cpustate->_LX); } /* SUB LX */
+OP(dd,96) { cpustate->R++; EAX(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IX+o) */
+OP(dd,97) { illegal_1(cpustate); op_97(cpustate); } /* DB DD */
+
+OP(dd,98) { illegal_1(cpustate); op_98(cpustate); } /* DB DD */
+OP(dd,99) { illegal_1(cpustate); op_99(cpustate); } /* DB DD */
+OP(dd,9a) { illegal_1(cpustate); op_9a(cpustate); } /* DB DD */
+OP(dd,9b) { illegal_1(cpustate); op_9b(cpustate); } /* DB DD */
+OP(dd,9c) { cpustate->R++; SBC(cpustate->_HX); } /* SBC A,HX */
+OP(dd,9d) { cpustate->R++; SBC(cpustate->_LX); } /* SBC A,LX */
+OP(dd,9e) { cpustate->R++; EAX(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IX+o) */
+OP(dd,9f) { illegal_1(cpustate); op_9f(cpustate); } /* DB DD */
+
+OP(dd,a0) { illegal_1(cpustate); op_a0(cpustate); } /* DB DD */
+OP(dd,a1) { illegal_1(cpustate); op_a1(cpustate); } /* DB DD */
+OP(dd,a2) { illegal_1(cpustate); op_a2(cpustate); } /* DB DD */
+OP(dd,a3) { illegal_1(cpustate); op_a3(cpustate); } /* DB DD */
+OP(dd,a4) { cpustate->R++; AND(cpustate->_HX); } /* AND HX */
+OP(dd,a5) { cpustate->R++; AND(cpustate->_LX); } /* AND LX */
+OP(dd,a6) { cpustate->R++; EAX(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IX+o) */
+OP(dd,a7) { illegal_1(cpustate); op_a7(cpustate); } /* DB DD */
+
+OP(dd,a8) { illegal_1(cpustate); op_a8(cpustate); } /* DB DD */
+OP(dd,a9) { illegal_1(cpustate); op_a9(cpustate); } /* DB DD */
+OP(dd,aa) { illegal_1(cpustate); op_aa(cpustate); } /* DB DD */
+OP(dd,ab) { illegal_1(cpustate); op_ab(cpustate); } /* DB DD */
+OP(dd,ac) { cpustate->R++; XOR(cpustate->_HX); } /* XOR HX */
+OP(dd,ad) { cpustate->R++; XOR(cpustate->_LX); } /* XOR LX */
+OP(dd,ae) { cpustate->R++; EAX(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IX+o) */
+OP(dd,af) { illegal_1(cpustate); op_af(cpustate); } /* DB DD */
+
+OP(dd,b0) { illegal_1(cpustate); op_b0(cpustate); } /* DB DD */
+OP(dd,b1) { illegal_1(cpustate); op_b1(cpustate); } /* DB DD */
+OP(dd,b2) { illegal_1(cpustate); op_b2(cpustate); } /* DB DD */
+OP(dd,b3) { illegal_1(cpustate); op_b3(cpustate); } /* DB DD */
+OP(dd,b4) { cpustate->R++; OR(cpustate->_HX); } /* OR HX */
+OP(dd,b5) { cpustate->R++; OR(cpustate->_LX); } /* OR LX */
+OP(dd,b6) { cpustate->R++; EAX(cpustate); OR(RM(cpustate, cpustate->ea)); } /* OR (IX+o) */
+OP(dd,b7) { illegal_1(cpustate); op_b7(cpustate); } /* DB DD */
+
+OP(dd,b8) { illegal_1(cpustate); op_b8(cpustate); } /* DB DD */
+OP(dd,b9) { illegal_1(cpustate); op_b9(cpustate); } /* DB DD */
+OP(dd,ba) { illegal_1(cpustate); op_ba(cpustate); } /* DB DD */
+OP(dd,bb) { illegal_1(cpustate); op_bb(cpustate); } /* DB DD */
+OP(dd,bc) { cpustate->R++; CP(cpustate->_HX); } /* CP HX */
+OP(dd,bd) { cpustate->R++; CP(cpustate->_LX); } /* CP LX */
+OP(dd,be) { cpustate->R++; EAX(cpustate); CP(RM(cpustate, cpustate->ea)); } /* CP (IX+o) */
+OP(dd,bf) { illegal_1(cpustate); op_bf(cpustate); } /* DB DD */
+
+OP(dd,c0) { illegal_1(cpustate); op_c0(cpustate); } /* DB DD */
+OP(dd,c1) { illegal_1(cpustate); op_c1(cpustate); } /* DB DD */
+OP(dd,c2) { illegal_1(cpustate); op_c2(cpustate); } /* DB DD */
+OP(dd,c3) { illegal_1(cpustate); op_c3(cpustate); } /* DB DD */
+OP(dd,c4) { illegal_1(cpustate); op_c4(cpustate); } /* DB DD */
+OP(dd,c5) { illegal_1(cpustate); op_c5(cpustate); } /* DB DD */
+OP(dd,c6) { illegal_1(cpustate); op_c6(cpustate); } /* DB DD */
+OP(dd,c7) { illegal_1(cpustate); op_c7(cpustate); } /* DB DD */
+
+OP(dd,c8) { illegal_1(cpustate); op_c8(cpustate); } /* DB DD */
+OP(dd,c9) { illegal_1(cpustate); op_c9(cpustate); } /* DB DD */
+OP(dd,ca) { illegal_1(cpustate); op_ca(cpustate); } /* DB DD */
+OP(dd,cb) { cpustate->R++; EAX(cpustate); cpustate->extra_cycles += exec_xycb(cpustate,ARG(cpustate)); } /* ** DD CB xx */
+OP(dd,cc) { illegal_1(cpustate); op_cc(cpustate); } /* DB DD */
+OP(dd,cd) { illegal_1(cpustate); op_cd(cpustate); } /* DB DD */
+OP(dd,ce) { illegal_1(cpustate); op_ce(cpustate); } /* DB DD */
+OP(dd,cf) { illegal_1(cpustate); op_cf(cpustate); } /* DB DD */
+
+OP(dd,d0) { illegal_1(cpustate); op_d0(cpustate); } /* DB DD */
+OP(dd,d1) { illegal_1(cpustate); op_d1(cpustate); } /* DB DD */
+OP(dd,d2) { illegal_1(cpustate); op_d2(cpustate); } /* DB DD */
+OP(dd,d3) { illegal_1(cpustate); op_d3(cpustate); } /* DB DD */
+OP(dd,d4) { illegal_1(cpustate); op_d4(cpustate); } /* DB DD */
+OP(dd,d5) { illegal_1(cpustate); op_d5(cpustate); } /* DB DD */
+OP(dd,d6) { illegal_1(cpustate); op_d6(cpustate); } /* DB DD */
+OP(dd,d7) { illegal_1(cpustate); op_d7(cpustate); } /* DB DD */
+
+OP(dd,d8) { illegal_1(cpustate); op_d8(cpustate); } /* DB DD */
+OP(dd,d9) { illegal_1(cpustate); op_d9(cpustate); } /* DB DD */
+OP(dd,da) { illegal_1(cpustate); op_da(cpustate); } /* DB DD */
+OP(dd,db) { illegal_1(cpustate); op_db(cpustate); } /* DB DD */
+OP(dd,dc) { illegal_1(cpustate); op_dc(cpustate); } /* DB DD */
+OP(dd,dd) { illegal_1(cpustate); op_dd(cpustate); } /* DB DD */
+OP(dd,de) { illegal_1(cpustate); op_de(cpustate); } /* DB DD */
+OP(dd,df) { illegal_1(cpustate); op_df(cpustate); } /* DB DD */
+
+OP(dd,e0) { illegal_1(cpustate); op_e0(cpustate); } /* DB DD */
+OP(dd,e1) { cpustate->R++; POP(cpustate, IX); } /* POP IX */
+OP(dd,e2) { illegal_1(cpustate); op_e2(cpustate); } /* DB DD */
+OP(dd,e3) { cpustate->R++; EXSP(IX); } /* EX (SP),IX */
+OP(dd,e4) { illegal_1(cpustate); op_e4(cpustate); } /* DB DD */
+OP(dd,e5) { cpustate->R++; PUSH(cpustate, IX ); } /* PUSH IX */
+OP(dd,e6) { illegal_1(cpustate); op_e6(cpustate); } /* DB DD */
+OP(dd,e7) { illegal_1(cpustate); op_e7(cpustate); } /* DB DD */
+
+OP(dd,e8) { illegal_1(cpustate); op_e8(cpustate); } /* DB DD */
+OP(dd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IX; } /* JP (IX) */
+OP(dd,ea) { illegal_1(cpustate); op_ea(cpustate); } /* DB DD */
+OP(dd,eb) { illegal_1(cpustate); op_eb(cpustate); } /* DB DD */
+OP(dd,ec) { illegal_1(cpustate); op_ec(cpustate); } /* DB DD */
+OP(dd,ed) { illegal_1(cpustate); op_ed(cpustate); } /* DB DD */
+OP(dd,ee) { illegal_1(cpustate); op_ee(cpustate); } /* DB DD */
+OP(dd,ef) { illegal_1(cpustate); op_ef(cpustate); } /* DB DD */
+
+OP(dd,f0) { illegal_1(cpustate); op_f0(cpustate); } /* DB DD */
+OP(dd,f1) { illegal_1(cpustate); op_f1(cpustate); } /* DB DD */
+OP(dd,f2) { illegal_1(cpustate); op_f2(cpustate); } /* DB DD */
+OP(dd,f3) { illegal_1(cpustate); op_f3(cpustate); } /* DB DD */
+OP(dd,f4) { illegal_1(cpustate); op_f4(cpustate); } /* DB DD */
+OP(dd,f5) { illegal_1(cpustate); op_f5(cpustate); } /* DB DD */
+OP(dd,f6) { illegal_1(cpustate); op_f6(cpustate); } /* DB DD */
+OP(dd,f7) { illegal_1(cpustate); op_f7(cpustate); } /* DB DD */
+
+OP(dd,f8) { illegal_1(cpustate); op_f8(cpustate); } /* DB DD */
+OP(dd,f9) { cpustate->R++; cpustate->_SP = cpustate->_IX; } /* LD SP,IX */
+OP(dd,fa) { illegal_1(cpustate); op_fa(cpustate); } /* DB DD */
+OP(dd,fb) { illegal_1(cpustate); op_fb(cpustate); } /* DB DD */
+OP(dd,fc) { illegal_1(cpustate); op_fc(cpustate); } /* DB DD */
+OP(dd,fd) { illegal_1(cpustate); op_fd(cpustate); } /* DB DD */
+OP(dd,fe) { illegal_1(cpustate); op_fe(cpustate); } /* DB DD */
+OP(dd,ff) { illegal_1(cpustate); op_ff(cpustate); } /* DB DD */
diff --git a/src/emu/cpu/z180/z180ed.c b/src/emu/cpu/z180/z180ed.c
index 1777e7592c3..2a57b7c30e6 100644
--- a/src/emu/cpu/z180/z180ed.c
+++ b/src/emu/cpu/z180/z180ed.c
@@ -7,291 +7,290 @@ OP(illegal,2)
/**********************************************************
* special opcodes (ED prefix)
**********************************************************/
-OP(ed,00) { unsigned n = ARG(cpustate); cpustate->_B = IN(cpustate, n ); } /* IN0 B,(n) */
-OP(ed,01) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_B ); } /* OUT0 (n),B */
-OP(ed,02) { illegal_2(cpustate); } /* DB ED */
-OP(ed,03) { illegal_2(cpustate); } /* DB ED */
-OP(ed,04) { TST( cpustate->_B ); } /* TST B */
-OP(ed,05) { illegal_2(cpustate); } /* DB ED */
-OP(ed,06) { illegal_2(cpustate); } /* DB ED */
-OP(ed,07) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,08) { unsigned n = ARG(cpustate); cpustate->_C = IN(cpustate, n ); } /* IN0 C,(n) */
-OP(ed,09) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_C ); } /* OUT0 (n),C */
-OP(ed,0a) { illegal_2(cpustate); } /* DB ED */
-OP(ed,0b) { illegal_2(cpustate); } /* DB ED */
-OP(ed,0c) { TST( cpustate->_C ); } /* TST C */
-OP(ed,0d) { illegal_2(cpustate); } /* DB ED */
-OP(ed,0e) { illegal_2(cpustate); } /* DB ED */
-OP(ed,0f) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,10) { unsigned n = ARG(cpustate); cpustate->_D = IN(cpustate, n ); } /* IN0 D,(n) */
-OP(ed,11) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_D ); } /* OUT0 (n),D */
-OP(ed,12) { illegal_2(cpustate); } /* DB ED */
-OP(ed,13) { illegal_2(cpustate); } /* DB ED */
-OP(ed,14) { TST( cpustate->_D ); } /* TST D */
-OP(ed,15) { illegal_2(cpustate); } /* DB ED */
-OP(ed,16) { illegal_2(cpustate); } /* DB ED */
-OP(ed,17) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,18) { unsigned n = ARG(cpustate); cpustate->_E = IN(cpustate, n ); } /* IN0 E,(n) */
-OP(ed,19) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_E ); } /* OUT0 (n),E */
-OP(ed,1a) { illegal_2(cpustate); } /* DB ED */
-OP(ed,1b) { illegal_2(cpustate); } /* DB ED */
-OP(ed,1c) { TST( cpustate->_E ); } /* TST E */
-OP(ed,1d) { illegal_2(cpustate); } /* DB ED */
-OP(ed,1e) { illegal_2(cpustate); } /* DB ED */
-OP(ed,1f) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,20) { unsigned n = ARG(cpustate); cpustate->_H = IN(cpustate, n ); } /* IN0 H,(n) */
-OP(ed,21) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_H ); } /* OUT0 (n),H */
-OP(ed,22) { illegal_2(cpustate); } /* DB ED */
-OP(ed,23) { illegal_2(cpustate); } /* DB ED */
-OP(ed,24) { TST( cpustate->_H ); } /* TST H */
-OP(ed,25) { illegal_2(cpustate); } /* DB ED */
-OP(ed,26) { illegal_2(cpustate); } /* DB ED */
-OP(ed,27) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,28) { unsigned n = ARG(cpustate); cpustate->_L = IN(cpustate, n ); } /* IN0 L,(n) */
-OP(ed,29) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_L ); } /* OUT0 (n),L */
-OP(ed,2a) { illegal_2(cpustate); } /* DB ED */
-OP(ed,2b) { illegal_2(cpustate); } /* DB ED */
-OP(ed,2c) { TST( cpustate->_L ); } /* TST L */
-OP(ed,2d) { illegal_2(cpustate); } /* DB ED */
-OP(ed,2e) { illegal_2(cpustate); } /* DB ED */
-OP(ed,2f) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,30) { unsigned n = ARG(cpustate); IN(cpustate, n ); } /* IN0 (n) */
-OP(ed,31) { unsigned n = ARG(cpustate); OUT(cpustate, n, 0 ); } /* OUT0 (n) */
-OP(ed,32) { illegal_2(cpustate); } /* DB ED */
-OP(ed,33) { illegal_2(cpustate); } /* DB ED */
-OP(ed,34) { TST( RM(cpustate, cpustate->_HL) ); } /* TST (HL) */
-OP(ed,35) { illegal_2(cpustate); } /* DB ED */
-OP(ed,36) { illegal_2(cpustate); } /* DB ED */
-OP(ed,37) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,38) { unsigned n = ARG(cpustate); cpustate->_A = IN(cpustate, n ); } /* IN0 A,(n) */
-OP(ed,39) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_A ); } /* OUT0 (n),A */
-OP(ed,3a) { illegal_2(cpustate); } /* DB ED */
-OP(ed,3b) { illegal_2(cpustate); } /* DB ED */
-OP(ed,3c) { TST( cpustate->_A ); } /* TST A */
-OP(ed,3d) { illegal_2(cpustate); } /* DB ED */
-OP(ed,3e) { illegal_2(cpustate); } /* DB ED */
-OP(ed,3f) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,40) { cpustate->_B = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_B]; } /* IN B,(C) */
-OP(ed,41) { OUT(cpustate, cpustate->_BC,cpustate->_B); } /* OUT (C),B */
-OP(ed,42) { SBC16( BC ); } /* SBC HL,BC */
-OP(ed,43) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD (w),BC */
-OP(ed,44) { NEG; } /* NEG */
-OP(ed,45) { RETN; } /* RETN; */
-OP(ed,46) { cpustate->IM = 0; } /* IM 0 */
-OP(ed,47) { LD_I_A; } /* LD I,A */
-
-OP(ed,48) { cpustate->_C = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_C]; } /* IN C,(C) */
-OP(ed,49) { OUT(cpustate, cpustate->_BC,cpustate->_C); } /* OUT (C),C */
-OP(ed,4a) { ADC16( BC ); } /* ADC HL,BC */
-OP(ed,4b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD BC,(w) */
-OP(ed,4c) { MLT( BC ); } /* MLT BC */
-OP(ed,4d) { RETI; } /* RETI */
-OP(ed,4e) { cpustate->IM = 0; } /* IM 0 */
-OP(ed,4f) { LD_R_A; } /* LD R,A */
-
-OP(ed,50) { cpustate->_D = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_D]; } /* IN D,(C) */
-OP(ed,51) { OUT(cpustate, cpustate->_BC,cpustate->_D); } /* OUT (C),D */
-OP(ed,52) { SBC16( DE ); } /* SBC HL,DE */
-OP(ed,53) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD (w),DE */
-OP(ed,54) { NEG; } /* NEG */
-OP(ed,55) { RETN; } /* RETN; */
-OP(ed,56) { cpustate->IM = 1; } /* IM 1 */
-OP(ed,57) { LD_A_I; } /* LD A,I */
-
-OP(ed,58) { cpustate->_E = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_E]; } /* IN E,(C) */
-OP(ed,59) { OUT(cpustate, cpustate->_BC,cpustate->_E); } /* OUT (C),E */
-OP(ed,5a) { ADC16( DE ); } /* ADC HL,DE */
-OP(ed,5b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD DE,(w) */
-OP(ed,5c) { MLT( DE ); } /* MLT DE */
-OP(ed,5d) { RETI; } /* RETI */
-OP(ed,5e) { cpustate->IM = 2; } /* IM 2 */
-OP(ed,5f) { LD_A_R; } /* LD A,R */
-
-OP(ed,60) { cpustate->_H = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_H]; } /* IN H,(C) */
-OP(ed,61) { OUT(cpustate, cpustate->_BC,cpustate->_H); } /* OUT (C),H */
-OP(ed,62) { SBC16( HL ); } /* SBC HL,HL */
-OP(ed,63) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */
-OP(ed,64) { unsigned m = ARG(cpustate); TST( m ); } /* TST m */
-OP(ed,65) { RETN; } /* RETN; */
-OP(ed,66) { cpustate->IM = 0; } /* IM 0 */
-OP(ed,67) { RRD; } /* RRD (HL) */
-
-OP(ed,68) { cpustate->_L = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_L]; } /* IN L,(C) */
-OP(ed,69) { OUT(cpustate, cpustate->_BC,cpustate->_L); } /* OUT (C),L */
-OP(ed,6a) { ADC16( HL ); } /* ADC HL,HL */
-OP(ed,6b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */
-OP(ed,6c) { MLT( HL ); } /* MLT HL */
-OP(ed,6d) { RETI; } /* RETI */
-OP(ed,6e) { cpustate->IM = 0; } /* IM 0 */
-OP(ed,6f) { RLD; } /* RLD (HL) */
-
-OP(ed,70) { UINT8 res = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[res]; } /* IN 0,(C) */
-OP(ed,71) { OUT(cpustate, cpustate->_BC,0); } /* OUT (C),0 */
-OP(ed,72) { SBC16( SP ); } /* SBC HL,SP */
-OP(ed,73) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD (w),SP */
-OP(ed,74) { unsigned m = ARG(cpustate); cpustate->_F = (cpustate->_F & CF) | SZP[IN(cpustate, cpustate->_C) & m]; } /* TSTIO m */
-OP(ed,75) { RETN; } /* RETN; */
-OP(ed,76) { SLP; } /* SLP */
-OP(ed,77) { illegal_2(cpustate); } /* DB ED,77 */
-
-OP(ed,78) { cpustate->_A = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_A]; } /* IN E,(C) */
-OP(ed,79) { OUT(cpustate, cpustate->_BC,cpustate->_A); } /* OUT (C),E */
-OP(ed,7a) { ADC16( SP ); } /* ADC HL,SP */
-OP(ed,7b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD SP,(w) */
-OP(ed,7c) { MLT( SP ); } /* MLT SP */
-OP(ed,7d) { RETI; } /* RETI */
-OP(ed,7e) { cpustate->IM = 2; } /* IM 2 */
-OP(ed,7f) { illegal_2(cpustate); } /* DB ED,7F */
-
-OP(ed,80) { illegal_2(cpustate); } /* DB ED */
-OP(ed,81) { illegal_2(cpustate); } /* DB ED */
-OP(ed,82) { illegal_2(cpustate); } /* DB ED */
-OP(ed,83) { OTIM; } /* OTIM */
-OP(ed,84) { illegal_2(cpustate); } /* DB ED */
-OP(ed,85) { illegal_2(cpustate); } /* DB ED */
-OP(ed,86) { illegal_2(cpustate); } /* DB ED */
-OP(ed,87) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,88) { illegal_2(cpustate); } /* DB ED */
-OP(ed,89) { illegal_2(cpustate); } /* DB ED */
-OP(ed,8a) { illegal_2(cpustate); } /* DB ED */
-OP(ed,8b) { OTDM; } /* OTDM */
-OP(ed,8c) { illegal_2(cpustate); } /* DB ED */
-OP(ed,8d) { illegal_2(cpustate); } /* DB ED */
-OP(ed,8e) { illegal_2(cpustate); } /* DB ED */
-OP(ed,8f) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,90) { illegal_2(cpustate); } /* DB ED */
-OP(ed,91) { illegal_2(cpustate); } /* DB ED */
-OP(ed,92) { illegal_2(cpustate); } /* DB ED */
-OP(ed,93) { OTIMR; } /* OTIMR */
-OP(ed,94) { illegal_2(cpustate); } /* DB ED */
-OP(ed,95) { illegal_2(cpustate); } /* DB ED */
-OP(ed,96) { illegal_2(cpustate); } /* DB ED */
-OP(ed,97) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,98) { illegal_2(cpustate); } /* DB ED */
-OP(ed,99) { illegal_2(cpustate); } /* DB ED */
-OP(ed,9a) { illegal_2(cpustate); } /* DB ED */
-OP(ed,9b) { OTDMR; } /* OTDMR */
-OP(ed,9c) { illegal_2(cpustate); } /* DB ED */
-OP(ed,9d) { illegal_2(cpustate); } /* DB ED */
-OP(ed,9e) { illegal_2(cpustate); } /* DB ED */
-OP(ed,9f) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,a0) { LDI; } /* LDI */
-OP(ed,a1) { CPI; } /* CPI */
-OP(ed,a2) { INI; } /* INI */
-OP(ed,a3) { OUTI; } /* OUTI */
-OP(ed,a4) { illegal_2(cpustate); } /* DB ED */
-OP(ed,a5) { illegal_2(cpustate); } /* DB ED */
-OP(ed,a6) { illegal_2(cpustate); } /* DB ED */
-OP(ed,a7) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,a8) { LDD; } /* LDD */
-OP(ed,a9) { CPD; } /* CPD */
-OP(ed,aa) { IND; } /* IND */
-OP(ed,ab) { OUTD; } /* OUTD */
-OP(ed,ac) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ad) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ae) { illegal_2(cpustate); } /* DB ED */
-OP(ed,af) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,b0) { LDIR; } /* LDIR */
-OP(ed,b1) { CPIR; } /* CPIR */
-OP(ed,b2) { INIR; } /* INIR */
-OP(ed,b3) { OTIR; } /* OTIR */
-OP(ed,b4) { illegal_2(cpustate); } /* DB ED */
-OP(ed,b5) { illegal_2(cpustate); } /* DB ED */
-OP(ed,b6) { illegal_2(cpustate); } /* DB ED */
-OP(ed,b7) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,b8) { LDDR; } /* LDDR */
-OP(ed,b9) { CPDR; } /* CPDR */
-OP(ed,ba) { INDR; } /* INDR */
-OP(ed,bb) { OTDR; } /* OTDR */
-OP(ed,bc) { illegal_2(cpustate); } /* DB ED */
-OP(ed,bd) { illegal_2(cpustate); } /* DB ED */
-OP(ed,be) { illegal_2(cpustate); } /* DB ED */
-OP(ed,bf) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,c0) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c1) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c2) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c3) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c4) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c5) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c6) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c7) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,c8) { illegal_2(cpustate); } /* DB ED */
-OP(ed,c9) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ca) { illegal_2(cpustate); } /* DB ED */
-OP(ed,cb) { illegal_2(cpustate); } /* DB ED */
-OP(ed,cc) { illegal_2(cpustate); } /* DB ED */
-OP(ed,cd) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ce) { illegal_2(cpustate); } /* DB ED */
-OP(ed,cf) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,d0) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d1) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d2) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d3) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d4) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d5) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d6) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d7) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,d8) { illegal_2(cpustate); } /* DB ED */
-OP(ed,d9) { illegal_2(cpustate); } /* DB ED */
-OP(ed,da) { illegal_2(cpustate); } /* DB ED */
-OP(ed,db) { illegal_2(cpustate); } /* DB ED */
-OP(ed,dc) { illegal_2(cpustate); } /* DB ED */
-OP(ed,dd) { illegal_2(cpustate); } /* DB ED */
-OP(ed,de) { illegal_2(cpustate); } /* DB ED */
-OP(ed,df) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,e0) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e1) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e2) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e3) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e4) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e5) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e6) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e7) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,e8) { illegal_2(cpustate); } /* DB ED */
-OP(ed,e9) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ea) { illegal_2(cpustate); } /* DB ED */
-OP(ed,eb) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ec) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ed) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ee) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ef) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,f0) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f1) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f2) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f3) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f4) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f5) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f6) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f7) { illegal_2(cpustate); } /* DB ED */
-
-OP(ed,f8) { illegal_2(cpustate); } /* DB ED */
-OP(ed,f9) { illegal_2(cpustate); } /* DB ED */
-OP(ed,fa) { illegal_2(cpustate); } /* DB ED */
-OP(ed,fb) { illegal_2(cpustate); } /* DB ED */
-OP(ed,fc) { illegal_2(cpustate); } /* DB ED */
-OP(ed,fd) { illegal_2(cpustate); } /* DB ED */
-OP(ed,fe) { illegal_2(cpustate); } /* DB ED */
-OP(ed,ff) { illegal_2(cpustate); } /* DB ED */
-
+OP(ed,00) { unsigned n = ARG(cpustate); cpustate->_B = IN(cpustate, n ); } /* IN0 B,(n) */
+OP(ed,01) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_B ); } /* OUT0 (n),B */
+OP(ed,02) { illegal_2(cpustate); } /* DB ED */
+OP(ed,03) { illegal_2(cpustate); } /* DB ED */
+OP(ed,04) { TST( cpustate->_B ); } /* TST B */
+OP(ed,05) { illegal_2(cpustate); } /* DB ED */
+OP(ed,06) { illegal_2(cpustate); } /* DB ED */
+OP(ed,07) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,08) { unsigned n = ARG(cpustate); cpustate->_C = IN(cpustate, n ); } /* IN0 C,(n) */
+OP(ed,09) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_C ); } /* OUT0 (n),C */
+OP(ed,0a) { illegal_2(cpustate); } /* DB ED */
+OP(ed,0b) { illegal_2(cpustate); } /* DB ED */
+OP(ed,0c) { TST( cpustate->_C ); } /* TST C */
+OP(ed,0d) { illegal_2(cpustate); } /* DB ED */
+OP(ed,0e) { illegal_2(cpustate); } /* DB ED */
+OP(ed,0f) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,10) { unsigned n = ARG(cpustate); cpustate->_D = IN(cpustate, n ); } /* IN0 D,(n) */
+OP(ed,11) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_D ); } /* OUT0 (n),D */
+OP(ed,12) { illegal_2(cpustate); } /* DB ED */
+OP(ed,13) { illegal_2(cpustate); } /* DB ED */
+OP(ed,14) { TST( cpustate->_D ); } /* TST D */
+OP(ed,15) { illegal_2(cpustate); } /* DB ED */
+OP(ed,16) { illegal_2(cpustate); } /* DB ED */
+OP(ed,17) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,18) { unsigned n = ARG(cpustate); cpustate->_E = IN(cpustate, n ); } /* IN0 E,(n) */
+OP(ed,19) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_E ); } /* OUT0 (n),E */
+OP(ed,1a) { illegal_2(cpustate); } /* DB ED */
+OP(ed,1b) { illegal_2(cpustate); } /* DB ED */
+OP(ed,1c) { TST( cpustate->_E ); } /* TST E */
+OP(ed,1d) { illegal_2(cpustate); } /* DB ED */
+OP(ed,1e) { illegal_2(cpustate); } /* DB ED */
+OP(ed,1f) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,20) { unsigned n = ARG(cpustate); cpustate->_H = IN(cpustate, n ); } /* IN0 H,(n) */
+OP(ed,21) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_H ); } /* OUT0 (n),H */
+OP(ed,22) { illegal_2(cpustate); } /* DB ED */
+OP(ed,23) { illegal_2(cpustate); } /* DB ED */
+OP(ed,24) { TST( cpustate->_H ); } /* TST H */
+OP(ed,25) { illegal_2(cpustate); } /* DB ED */
+OP(ed,26) { illegal_2(cpustate); } /* DB ED */
+OP(ed,27) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,28) { unsigned n = ARG(cpustate); cpustate->_L = IN(cpustate, n ); } /* IN0 L,(n) */
+OP(ed,29) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_L ); } /* OUT0 (n),L */
+OP(ed,2a) { illegal_2(cpustate); } /* DB ED */
+OP(ed,2b) { illegal_2(cpustate); } /* DB ED */
+OP(ed,2c) { TST( cpustate->_L ); } /* TST L */
+OP(ed,2d) { illegal_2(cpustate); } /* DB ED */
+OP(ed,2e) { illegal_2(cpustate); } /* DB ED */
+OP(ed,2f) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,30) { unsigned n = ARG(cpustate); IN(cpustate, n ); } /* IN0 (n) */
+OP(ed,31) { unsigned n = ARG(cpustate); OUT(cpustate, n, 0 ); } /* OUT0 (n) */
+OP(ed,32) { illegal_2(cpustate); } /* DB ED */
+OP(ed,33) { illegal_2(cpustate); } /* DB ED */
+OP(ed,34) { TST( RM(cpustate, cpustate->_HL) ); } /* TST (HL) */
+OP(ed,35) { illegal_2(cpustate); } /* DB ED */
+OP(ed,36) { illegal_2(cpustate); } /* DB ED */
+OP(ed,37) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,38) { unsigned n = ARG(cpustate); cpustate->_A = IN(cpustate, n ); } /* IN0 A,(n) */
+OP(ed,39) { unsigned n = ARG(cpustate); OUT(cpustate, n, cpustate->_A ); } /* OUT0 (n),A */
+OP(ed,3a) { illegal_2(cpustate); } /* DB ED */
+OP(ed,3b) { illegal_2(cpustate); } /* DB ED */
+OP(ed,3c) { TST( cpustate->_A ); } /* TST A */
+OP(ed,3d) { illegal_2(cpustate); } /* DB ED */
+OP(ed,3e) { illegal_2(cpustate); } /* DB ED */
+OP(ed,3f) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,40) { cpustate->_B = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_B]; } /* IN B,(C) */
+OP(ed,41) { OUT(cpustate, cpustate->_BC,cpustate->_B); } /* OUT (C),B */
+OP(ed,42) { SBC16( BC ); } /* SBC HL,BC */
+OP(ed,43) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD (w),BC */
+OP(ed,44) { NEG; } /* NEG */
+OP(ed,45) { RETN; } /* RETN; */
+OP(ed,46) { cpustate->IM = 0; } /* IM 0 */
+OP(ed,47) { LD_I_A; } /* LD I,A */
+
+OP(ed,48) { cpustate->_C = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_C]; } /* IN C,(C) */
+OP(ed,49) { OUT(cpustate, cpustate->_BC,cpustate->_C); } /* OUT (C),C */
+OP(ed,4a) { ADC16( BC ); } /* ADC HL,BC */
+OP(ed,4b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->BC ); } /* LD BC,(w) */
+OP(ed,4c) { MLT( BC ); } /* MLT BC */
+OP(ed,4d) { RETI; } /* RETI */
+OP(ed,4e) { cpustate->IM = 0; } /* IM 0 */
+OP(ed,4f) { LD_R_A; } /* LD R,A */
+
+OP(ed,50) { cpustate->_D = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_D]; } /* IN D,(C) */
+OP(ed,51) { OUT(cpustate, cpustate->_BC,cpustate->_D); } /* OUT (C),D */
+OP(ed,52) { SBC16( DE ); } /* SBC HL,DE */
+OP(ed,53) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD (w),DE */
+OP(ed,54) { NEG; } /* NEG */
+OP(ed,55) { RETN; } /* RETN; */
+OP(ed,56) { cpustate->IM = 1; } /* IM 1 */
+OP(ed,57) { LD_A_I; } /* LD A,I */
+
+OP(ed,58) { cpustate->_E = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_E]; } /* IN E,(C) */
+OP(ed,59) { OUT(cpustate, cpustate->_BC,cpustate->_E); } /* OUT (C),E */
+OP(ed,5a) { ADC16( DE ); } /* ADC HL,DE */
+OP(ed,5b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->DE ); } /* LD DE,(w) */
+OP(ed,5c) { MLT( DE ); } /* MLT DE */
+OP(ed,5d) { RETI; } /* RETI */
+OP(ed,5e) { cpustate->IM = 2; } /* IM 2 */
+OP(ed,5f) { LD_A_R; } /* LD A,R */
+
+OP(ed,60) { cpustate->_H = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_H]; } /* IN H,(C) */
+OP(ed,61) { OUT(cpustate, cpustate->_BC,cpustate->_H); } /* OUT (C),H */
+OP(ed,62) { SBC16( HL ); } /* SBC HL,HL */
+OP(ed,63) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */
+OP(ed,64) { unsigned m = ARG(cpustate); TST( m ); } /* TST m */
+OP(ed,65) { RETN; } /* RETN; */
+OP(ed,66) { cpustate->IM = 0; } /* IM 0 */
+OP(ed,67) { RRD; } /* RRD (HL) */
+
+OP(ed,68) { cpustate->_L = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_L]; } /* IN L,(C) */
+OP(ed,69) { OUT(cpustate, cpustate->_BC,cpustate->_L); } /* OUT (C),L */
+OP(ed,6a) { ADC16( HL ); } /* ADC HL,HL */
+OP(ed,6b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */
+OP(ed,6c) { MLT( HL ); } /* MLT HL */
+OP(ed,6d) { RETI; } /* RETI */
+OP(ed,6e) { cpustate->IM = 0; } /* IM 0 */
+OP(ed,6f) { RLD; } /* RLD (HL) */
+
+OP(ed,70) { UINT8 res = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[res]; } /* IN 0,(C) */
+OP(ed,71) { OUT(cpustate, cpustate->_BC,0); } /* OUT (C),0 */
+OP(ed,72) { SBC16( SP ); } /* SBC HL,SP */
+OP(ed,73) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD (w),SP */
+OP(ed,74) { unsigned m = ARG(cpustate); cpustate->_F = (cpustate->_F & CF) | SZP[IN(cpustate, cpustate->_C) & m]; } /* TSTIO m */
+OP(ed,75) { RETN; } /* RETN; */
+OP(ed,76) { SLP; } /* SLP */
+OP(ed,77) { illegal_2(cpustate); } /* DB ED,77 */
+
+OP(ed,78) { cpustate->_A = IN(cpustate, cpustate->_BC); cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_A]; } /* IN E,(C) */
+OP(ed,79) { OUT(cpustate, cpustate->_BC,cpustate->_A); } /* OUT (C),E */
+OP(ed,7a) { ADC16( SP ); } /* ADC HL,SP */
+OP(ed,7b) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->SP ); } /* LD SP,(w) */
+OP(ed,7c) { MLT( SP ); } /* MLT SP */
+OP(ed,7d) { RETI; } /* RETI */
+OP(ed,7e) { cpustate->IM = 2; } /* IM 2 */
+OP(ed,7f) { illegal_2(cpustate); } /* DB ED,7F */
+
+OP(ed,80) { illegal_2(cpustate); } /* DB ED */
+OP(ed,81) { illegal_2(cpustate); } /* DB ED */
+OP(ed,82) { illegal_2(cpustate); } /* DB ED */
+OP(ed,83) { OTIM; } /* OTIM */
+OP(ed,84) { illegal_2(cpustate); } /* DB ED */
+OP(ed,85) { illegal_2(cpustate); } /* DB ED */
+OP(ed,86) { illegal_2(cpustate); } /* DB ED */
+OP(ed,87) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,88) { illegal_2(cpustate); } /* DB ED */
+OP(ed,89) { illegal_2(cpustate); } /* DB ED */
+OP(ed,8a) { illegal_2(cpustate); } /* DB ED */
+OP(ed,8b) { OTDM; } /* OTDM */
+OP(ed,8c) { illegal_2(cpustate); } /* DB ED */
+OP(ed,8d) { illegal_2(cpustate); } /* DB ED */
+OP(ed,8e) { illegal_2(cpustate); } /* DB ED */
+OP(ed,8f) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,90) { illegal_2(cpustate); } /* DB ED */
+OP(ed,91) { illegal_2(cpustate); } /* DB ED */
+OP(ed,92) { illegal_2(cpustate); } /* DB ED */
+OP(ed,93) { OTIMR; } /* OTIMR */
+OP(ed,94) { illegal_2(cpustate); } /* DB ED */
+OP(ed,95) { illegal_2(cpustate); } /* DB ED */
+OP(ed,96) { illegal_2(cpustate); } /* DB ED */
+OP(ed,97) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,98) { illegal_2(cpustate); } /* DB ED */
+OP(ed,99) { illegal_2(cpustate); } /* DB ED */
+OP(ed,9a) { illegal_2(cpustate); } /* DB ED */
+OP(ed,9b) { OTDMR; } /* OTDMR */
+OP(ed,9c) { illegal_2(cpustate); } /* DB ED */
+OP(ed,9d) { illegal_2(cpustate); } /* DB ED */
+OP(ed,9e) { illegal_2(cpustate); } /* DB ED */
+OP(ed,9f) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,a0) { LDI; } /* LDI */
+OP(ed,a1) { CPI; } /* CPI */
+OP(ed,a2) { INI; } /* INI */
+OP(ed,a3) { OUTI; } /* OUTI */
+OP(ed,a4) { illegal_2(cpustate); } /* DB ED */
+OP(ed,a5) { illegal_2(cpustate); } /* DB ED */
+OP(ed,a6) { illegal_2(cpustate); } /* DB ED */
+OP(ed,a7) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,a8) { LDD; } /* LDD */
+OP(ed,a9) { CPD; } /* CPD */
+OP(ed,aa) { IND; } /* IND */
+OP(ed,ab) { OUTD; } /* OUTD */
+OP(ed,ac) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ad) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ae) { illegal_2(cpustate); } /* DB ED */
+OP(ed,af) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,b0) { LDIR; } /* LDIR */
+OP(ed,b1) { CPIR; } /* CPIR */
+OP(ed,b2) { INIR; } /* INIR */
+OP(ed,b3) { OTIR; } /* OTIR */
+OP(ed,b4) { illegal_2(cpustate); } /* DB ED */
+OP(ed,b5) { illegal_2(cpustate); } /* DB ED */
+OP(ed,b6) { illegal_2(cpustate); } /* DB ED */
+OP(ed,b7) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,b8) { LDDR; } /* LDDR */
+OP(ed,b9) { CPDR; } /* CPDR */
+OP(ed,ba) { INDR; } /* INDR */
+OP(ed,bb) { OTDR; } /* OTDR */
+OP(ed,bc) { illegal_2(cpustate); } /* DB ED */
+OP(ed,bd) { illegal_2(cpustate); } /* DB ED */
+OP(ed,be) { illegal_2(cpustate); } /* DB ED */
+OP(ed,bf) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,c0) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c1) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c2) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c3) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c4) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c5) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c6) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c7) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,c8) { illegal_2(cpustate); } /* DB ED */
+OP(ed,c9) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ca) { illegal_2(cpustate); } /* DB ED */
+OP(ed,cb) { illegal_2(cpustate); } /* DB ED */
+OP(ed,cc) { illegal_2(cpustate); } /* DB ED */
+OP(ed,cd) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ce) { illegal_2(cpustate); } /* DB ED */
+OP(ed,cf) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,d0) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d1) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d2) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d3) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d4) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d5) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d6) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d7) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,d8) { illegal_2(cpustate); } /* DB ED */
+OP(ed,d9) { illegal_2(cpustate); } /* DB ED */
+OP(ed,da) { illegal_2(cpustate); } /* DB ED */
+OP(ed,db) { illegal_2(cpustate); } /* DB ED */
+OP(ed,dc) { illegal_2(cpustate); } /* DB ED */
+OP(ed,dd) { illegal_2(cpustate); } /* DB ED */
+OP(ed,de) { illegal_2(cpustate); } /* DB ED */
+OP(ed,df) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,e0) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e1) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e2) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e3) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e4) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e5) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e6) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e7) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,e8) { illegal_2(cpustate); } /* DB ED */
+OP(ed,e9) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ea) { illegal_2(cpustate); } /* DB ED */
+OP(ed,eb) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ec) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ed) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ee) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ef) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,f0) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f1) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f2) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f3) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f4) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f5) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f6) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f7) { illegal_2(cpustate); } /* DB ED */
+
+OP(ed,f8) { illegal_2(cpustate); } /* DB ED */
+OP(ed,f9) { illegal_2(cpustate); } /* DB ED */
+OP(ed,fa) { illegal_2(cpustate); } /* DB ED */
+OP(ed,fb) { illegal_2(cpustate); } /* DB ED */
+OP(ed,fc) { illegal_2(cpustate); } /* DB ED */
+OP(ed,fd) { illegal_2(cpustate); } /* DB ED */
+OP(ed,fe) { illegal_2(cpustate); } /* DB ED */
+OP(ed,ff) { illegal_2(cpustate); } /* DB ED */
diff --git a/src/emu/cpu/z180/z180fd.c b/src/emu/cpu/z180/z180fd.c
index 1cd28612796..11e0cb48973 100644
--- a/src/emu/cpu/z180/z180fd.c
+++ b/src/emu/cpu/z180/z180fd.c
@@ -1,291 +1,290 @@
/**********************************************************
* IY register related opcodes (FD prefix)
**********************************************************/
-OP(fd,00) { illegal_1(cpustate); op_00(cpustate); } /* DB FD */
-OP(fd,01) { illegal_1(cpustate); op_01(cpustate); } /* DB FD */
-OP(fd,02) { illegal_1(cpustate); op_02(cpustate); } /* DB FD */
-OP(fd,03) { illegal_1(cpustate); op_03(cpustate); } /* DB FD */
-OP(fd,04) { illegal_1(cpustate); op_04(cpustate); } /* DB FD */
-OP(fd,05) { illegal_1(cpustate); op_05(cpustate); } /* DB FD */
-OP(fd,06) { illegal_1(cpustate); op_06(cpustate); } /* DB FD */
-OP(fd,07) { illegal_1(cpustate); op_07(cpustate); } /* DB FD */
-
-OP(fd,08) { illegal_1(cpustate); op_08(cpustate); } /* DB FD */
-OP(fd,09) { cpustate->R++; ADD16(IY,BC); } /* ADD IY,BC */
-OP(fd,0a) { illegal_1(cpustate); op_0a(cpustate); } /* DB FD */
-OP(fd,0b) { illegal_1(cpustate); op_0b(cpustate); } /* DB FD */
-OP(fd,0c) { illegal_1(cpustate); op_0c(cpustate); } /* DB FD */
-OP(fd,0d) { illegal_1(cpustate); op_0d(cpustate); } /* DB FD */
-OP(fd,0e) { illegal_1(cpustate); op_0e(cpustate); } /* DB FD */
-OP(fd,0f) { illegal_1(cpustate); op_0f(cpustate); } /* DB FD */
-
-OP(fd,10) { illegal_1(cpustate); op_10(cpustate); } /* DB FD */
-OP(fd,11) { illegal_1(cpustate); op_11(cpustate); } /* DB FD */
-OP(fd,12) { illegal_1(cpustate); op_12(cpustate); } /* DB FD */
-OP(fd,13) { illegal_1(cpustate); op_13(cpustate); } /* DB FD */
-OP(fd,14) { illegal_1(cpustate); op_14(cpustate); } /* DB FD */
-OP(fd,15) { illegal_1(cpustate); op_15(cpustate); } /* DB FD */
-OP(fd,16) { illegal_1(cpustate); op_16(cpustate); } /* DB FD */
-OP(fd,17) { illegal_1(cpustate); op_17(cpustate); } /* DB FD */
-
-OP(fd,18) { illegal_1(cpustate); op_18(cpustate); } /* DB FD */
-OP(fd,19) { cpustate->R++; ADD16(IY,DE); } /* ADD IY,DE */
-OP(fd,1a) { illegal_1(cpustate); op_1a(cpustate); } /* DB FD */
-OP(fd,1b) { illegal_1(cpustate); op_1b(cpustate); } /* DB FD */
-OP(fd,1c) { illegal_1(cpustate); op_1c(cpustate); } /* DB FD */
-OP(fd,1d) { illegal_1(cpustate); op_1d(cpustate); } /* DB FD */
-OP(fd,1e) { illegal_1(cpustate); op_1e(cpustate); } /* DB FD */
-OP(fd,1f) { illegal_1(cpustate); op_1f(cpustate); } /* DB FD */
-
-OP(fd,20) { illegal_1(cpustate); op_20(cpustate); } /* DB FD */
-OP(fd,21) { cpustate->R++; cpustate->_IY = ARG16(cpustate); } /* LD IY,w */
-OP(fd,22) { cpustate->R++; cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->IY ); } /* LD (w),IY */
-OP(fd,23) { cpustate->R++; cpustate->_IY++; } /* INC IY */
-OP(fd,24) { cpustate->R++; cpustate->_HY = INC(cpustate, cpustate->_HY); } /* INC HY */
-OP(fd,25) { cpustate->R++; cpustate->_HY = DEC(cpustate, cpustate->_HY); } /* DEC HY */
-OP(fd,26) { cpustate->R++; cpustate->_HY = ARG(cpustate); } /* LD HY,n */
-OP(fd,27) { illegal_1(cpustate); op_27(cpustate); } /* DB FD */
-
-OP(fd,28) { illegal_1(cpustate); op_28(cpustate); } /* DB FD */
-OP(fd,29) { cpustate->R++; ADD16(IY,IY); } /* ADD IY,IY */
-OP(fd,2a) { cpustate->R++; cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->IY ); } /* LD IY,(w) */
-OP(fd,2b) { cpustate->R++; cpustate->_IY--; } /* DEC IY */
-OP(fd,2c) { cpustate->R++; cpustate->_LY = INC(cpustate, cpustate->_LY); } /* INC LY */
-OP(fd,2d) { cpustate->R++; cpustate->_LY = DEC(cpustate, cpustate->_LY); } /* DEC LY */
-OP(fd,2e) { cpustate->R++; cpustate->_LY = ARG(cpustate); } /* LD LY,n */
-OP(fd,2f) { illegal_1(cpustate); op_2f(cpustate); } /* DB FD */
-
-OP(fd,30) { illegal_1(cpustate); op_30(cpustate); } /* DB FD */
-OP(fd,31) { illegal_1(cpustate); op_31(cpustate); } /* DB FD */
-OP(fd,32) { illegal_1(cpustate); op_32(cpustate); } /* DB FD */
-OP(fd,33) { illegal_1(cpustate); op_33(cpustate); } /* DB FD */
-OP(fd,34) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, INC(cpustate, RM(cpustate, cpustate->ea)) ); } /* INC (IY+o) */
-OP(fd,35) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, DEC(cpustate, RM(cpustate, cpustate->ea)) ); } /* DEC (IY+o) */
-OP(fd,36) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IY+o),n */
-OP(fd,37) { illegal_1(cpustate); op_37(cpustate); } /* DB FD */
-
-OP(fd,38) { illegal_1(cpustate); op_38(cpustate); } /* DB FD */
-OP(fd,39) { cpustate->R++; ADD16(IY,SP); } /* ADD IY,SP */
-OP(fd,3a) { illegal_1(cpustate); op_3a(cpustate); } /* DB FD */
-OP(fd,3b) { illegal_1(cpustate); op_3b(cpustate); } /* DB FD */
-OP(fd,3c) { illegal_1(cpustate); op_3c(cpustate); } /* DB FD */
-OP(fd,3d) { illegal_1(cpustate); op_3d(cpustate); } /* DB FD */
-OP(fd,3e) { illegal_1(cpustate); op_3e(cpustate); } /* DB FD */
-OP(fd,3f) { illegal_1(cpustate); op_3f(cpustate); } /* DB FD */
-
-OP(fd,40) { illegal_1(cpustate); op_40(cpustate); } /* DB FD */
-OP(fd,41) { illegal_1(cpustate); op_41(cpustate); } /* DB FD */
-OP(fd,42) { illegal_1(cpustate); op_42(cpustate); } /* DB FD */
-OP(fd,43) { illegal_1(cpustate); op_43(cpustate); } /* DB FD */
-OP(fd,44) { cpustate->R++; cpustate->_B = cpustate->_HY; } /* LD B,HY */
-OP(fd,45) { cpustate->R++; cpustate->_B = cpustate->_LY; } /* LD B,LY */
-OP(fd,46) { cpustate->R++; EAY(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IY+o) */
-OP(fd,47) { illegal_1(cpustate); op_47(cpustate); } /* DB FD */
-
-OP(fd,48) { illegal_1(cpustate); op_48(cpustate); } /* DB FD */
-OP(fd,49) { illegal_1(cpustate); op_49(cpustate); } /* DB FD */
-OP(fd,4a) { illegal_1(cpustate); op_4a(cpustate); } /* DB FD */
-OP(fd,4b) { illegal_1(cpustate); op_4b(cpustate); } /* DB FD */
-OP(fd,4c) { cpustate->R++; cpustate->_C = cpustate->_HY; } /* LD C,HY */
-OP(fd,4d) { cpustate->R++; cpustate->_C = cpustate->_LY; } /* LD C,LY */
-OP(fd,4e) { cpustate->R++; EAY(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IY+o) */
-OP(fd,4f) { illegal_1(cpustate); op_4f(cpustate); } /* DB FD */
-
-OP(fd,50) { illegal_1(cpustate); op_50(cpustate); } /* DB FD */
-OP(fd,51) { illegal_1(cpustate); op_51(cpustate); } /* DB FD */
-OP(fd,52) { illegal_1(cpustate); op_52(cpustate); } /* DB FD */
-OP(fd,53) { illegal_1(cpustate); op_53(cpustate); } /* DB FD */
-OP(fd,54) { cpustate->R++; cpustate->_D = cpustate->_HY; } /* LD D,HY */
-OP(fd,55) { cpustate->R++; cpustate->_D = cpustate->_LY; } /* LD D,LY */
-OP(fd,56) { cpustate->R++; EAY(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IY+o) */
-OP(fd,57) { illegal_1(cpustate); op_57(cpustate); } /* DB FD */
-
-OP(fd,58) { illegal_1(cpustate); op_58(cpustate); } /* DB FD */
-OP(fd,59) { illegal_1(cpustate); op_59(cpustate); } /* DB FD */
-OP(fd,5a) { illegal_1(cpustate); op_5a(cpustate); } /* DB FD */
-OP(fd,5b) { illegal_1(cpustate); op_5b(cpustate); } /* DB FD */
-OP(fd,5c) { cpustate->R++; cpustate->_E = cpustate->_HY; } /* LD E,HY */
-OP(fd,5d) { cpustate->R++; cpustate->_E = cpustate->_LY; } /* LD E,LY */
-OP(fd,5e) { cpustate->R++; EAY(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IY+o) */
-OP(fd,5f) { illegal_1(cpustate); op_5f(cpustate); } /* DB FD */
-
-OP(fd,60) { cpustate->R++; cpustate->_HY = cpustate->_B; } /* LD HY,B */
-OP(fd,61) { cpustate->R++; cpustate->_HY = cpustate->_C; } /* LD HY,C */
-OP(fd,62) { cpustate->R++; cpustate->_HY = cpustate->_D; } /* LD HY,D */
-OP(fd,63) { cpustate->R++; cpustate->_HY = cpustate->_E; } /* LD HY,E */
-OP(fd,64) { cpustate->R++; } /* LD HY,HY */
-OP(fd,65) { cpustate->R++; cpustate->_HY = cpustate->_LY; } /* LD HY,LY */
-OP(fd,66) { cpustate->R++; EAY(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IY+o) */
-OP(fd,67) { cpustate->R++; cpustate->_HY = cpustate->_A; } /* LD HY,A */
-
-OP(fd,68) { cpustate->R++; cpustate->_LY = cpustate->_B; } /* LD LY,B */
-OP(fd,69) { cpustate->R++; cpustate->_LY = cpustate->_C; } /* LD LY,C */
-OP(fd,6a) { cpustate->R++; cpustate->_LY = cpustate->_D; } /* LD LY,D */
-OP(fd,6b) { cpustate->R++; cpustate->_LY = cpustate->_E; } /* LD LY,E */
-OP(fd,6c) { cpustate->R++; cpustate->_LY = cpustate->_HY; } /* LD LY,HY */
-OP(fd,6d) { cpustate->R++; } /* LD LY,LY */
-OP(fd,6e) { cpustate->R++; EAY(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IY+o) */
-OP(fd,6f) { cpustate->R++; cpustate->_LY = cpustate->_A; } /* LD LY,A */
-
-OP(fd,70) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_B ); } /* LD (IY+o),B */
-OP(fd,71) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_C ); } /* LD (IY+o),C */
-OP(fd,72) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_D ); } /* LD (IY+o),D */
-OP(fd,73) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_E ); } /* LD (IY+o),E */
-OP(fd,74) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_H ); } /* LD (IY+o),H */
-OP(fd,75) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_L ); } /* LD (IY+o),L */
-OP(fd,76) { illegal_1(cpustate); op_76(cpustate); } /* DB FD */
-OP(fd,77) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_A ); } /* LD (IY+o),A */
-
-OP(fd,78) { illegal_1(cpustate); op_78(cpustate); } /* DB FD */
-OP(fd,79) { illegal_1(cpustate); op_79(cpustate); } /* DB FD */
-OP(fd,7a) { illegal_1(cpustate); op_7a(cpustate); } /* DB FD */
-OP(fd,7b) { illegal_1(cpustate); op_7b(cpustate); } /* DB FD */
-OP(fd,7c) { cpustate->R++; cpustate->_A = cpustate->_HY; } /* LD A,HY */
-OP(fd,7d) { cpustate->R++; cpustate->_A = cpustate->_LY; } /* LD A,LY */
-OP(fd,7e) { cpustate->R++; EAY(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IY+o) */
-OP(fd,7f) { illegal_1(cpustate); op_7f(cpustate); } /* DB FD */
-
-OP(fd,80) { illegal_1(cpustate); op_80(cpustate); } /* DB FD */
-OP(fd,81) { illegal_1(cpustate); op_81(cpustate); } /* DB FD */
-OP(fd,82) { illegal_1(cpustate); op_82(cpustate); } /* DB FD */
-OP(fd,83) { illegal_1(cpustate); op_83(cpustate); } /* DB FD */
-OP(fd,84) { cpustate->R++; ADD(cpustate->_HY); } /* ADD A,HY */
-OP(fd,85) { cpustate->R++; ADD(cpustate->_LY); } /* ADD A,LY */
-OP(fd,86) { cpustate->R++; EAY(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IY+o) */
-OP(fd,87) { illegal_1(cpustate); op_87(cpustate); } /* DB FD */
-
-OP(fd,88) { illegal_1(cpustate); op_88(cpustate); } /* DB FD */
-OP(fd,89) { illegal_1(cpustate); op_89(cpustate); } /* DB FD */
-OP(fd,8a) { illegal_1(cpustate); op_8a(cpustate); } /* DB FD */
-OP(fd,8b) { illegal_1(cpustate); op_8b(cpustate); } /* DB FD */
-OP(fd,8c) { cpustate->R++; ADC(cpustate->_HY); } /* ADC A,HY */
-OP(fd,8d) { cpustate->R++; ADC(cpustate->_LY); } /* ADC A,LY */
-OP(fd,8e) { cpustate->R++; EAY(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IY+o) */
-OP(fd,8f) { illegal_1(cpustate); op_8f(cpustate); } /* DB FD */
-
-OP(fd,90) { illegal_1(cpustate); op_90(cpustate); } /* DB FD */
-OP(fd,91) { illegal_1(cpustate); op_91(cpustate); } /* DB FD */
-OP(fd,92) { illegal_1(cpustate); op_92(cpustate); } /* DB FD */
-OP(fd,93) { illegal_1(cpustate); op_93(cpustate); } /* DB FD */
-OP(fd,94) { cpustate->R++; SUB(cpustate->_HY); } /* SUB HY */
-OP(fd,95) { cpustate->R++; SUB(cpustate->_LY); } /* SUB LY */
-OP(fd,96) { cpustate->R++; EAY(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IY+o) */
-OP(fd,97) { illegal_1(cpustate); op_97(cpustate); } /* DB FD */
-
-OP(fd,98) { illegal_1(cpustate); op_98(cpustate); } /* DB FD */
-OP(fd,99) { illegal_1(cpustate); op_99(cpustate); } /* DB FD */
-OP(fd,9a) { illegal_1(cpustate); op_9a(cpustate); } /* DB FD */
-OP(fd,9b) { illegal_1(cpustate); op_9b(cpustate); } /* DB FD */
-OP(fd,9c) { cpustate->R++; SBC(cpustate->_HY); } /* SBC A,HY */
-OP(fd,9d) { cpustate->R++; SBC(cpustate->_LY); } /* SBC A,LY */
-OP(fd,9e) { cpustate->R++; EAY(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IY+o) */
-OP(fd,9f) { illegal_1(cpustate); op_9f(cpustate); } /* DB FD */
-
-OP(fd,a0) { illegal_1(cpustate); op_a0(cpustate); } /* DB FD */
-OP(fd,a1) { illegal_1(cpustate); op_a1(cpustate); } /* DB FD */
-OP(fd,a2) { illegal_1(cpustate); op_a2(cpustate); } /* DB FD */
-OP(fd,a3) { illegal_1(cpustate); op_a3(cpustate); } /* DB FD */
-OP(fd,a4) { cpustate->R++; AND(cpustate->_HY); } /* AND HY */
-OP(fd,a5) { cpustate->R++; AND(cpustate->_LY); } /* AND LY */
-OP(fd,a6) { cpustate->R++; EAY(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IY+o) */
-OP(fd,a7) { illegal_1(cpustate); op_a7(cpustate); } /* DB FD */
-
-OP(fd,a8) { illegal_1(cpustate); op_a8(cpustate); } /* DB FD */
-OP(fd,a9) { illegal_1(cpustate); op_a9(cpustate); } /* DB FD */
-OP(fd,aa) { illegal_1(cpustate); op_aa(cpustate); } /* DB FD */
-OP(fd,ab) { illegal_1(cpustate); op_ab(cpustate); } /* DB FD */
-OP(fd,ac) { cpustate->R++; XOR(cpustate->_HY); } /* XOR HY */
-OP(fd,ad) { cpustate->R++; XOR(cpustate->_LY); } /* XOR LY */
-OP(fd,ae) { cpustate->R++; EAY(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IY+o) */
-OP(fd,af) { illegal_1(cpustate); op_af(cpustate); } /* DB FD */
-
-OP(fd,b0) { illegal_1(cpustate); op_b0(cpustate); } /* DB FD */
-OP(fd,b1) { illegal_1(cpustate); op_b1(cpustate); } /* DB FD */
-OP(fd,b2) { illegal_1(cpustate); op_b2(cpustate); } /* DB FD */
-OP(fd,b3) { illegal_1(cpustate); op_b3(cpustate); } /* DB FD */
-OP(fd,b4) { cpustate->R++; OR(cpustate->_HY); } /* OR HY */
-OP(fd,b5) { cpustate->R++; OR(cpustate->_LY); } /* OR LY */
-OP(fd,b6) { cpustate->R++; EAY(cpustate); OR(RM(cpustate, cpustate->ea)); } /* OR (IY+o) */
-OP(fd,b7) { illegal_1(cpustate); op_b7(cpustate); } /* DB FD */
-
-OP(fd,b8) { illegal_1(cpustate); op_b8(cpustate); } /* DB FD */
-OP(fd,b9) { illegal_1(cpustate); op_b9(cpustate); } /* DB FD */
-OP(fd,ba) { illegal_1(cpustate); op_ba(cpustate); } /* DB FD */
-OP(fd,bb) { illegal_1(cpustate); op_bb(cpustate); } /* DB FD */
-OP(fd,bc) { cpustate->R++; CP(cpustate->_HY); } /* CP HY */
-OP(fd,bd) { cpustate->R++; CP(cpustate->_LY); } /* CP LY */
-OP(fd,be) { cpustate->R++; EAY(cpustate); CP(RM(cpustate, cpustate->ea)); } /* CP (IY+o) */
-OP(fd,bf) { illegal_1(cpustate); op_bf(cpustate); } /* DB FD */
-
-OP(fd,c0) { illegal_1(cpustate); op_c0(cpustate); } /* DB FD */
-OP(fd,c1) { illegal_1(cpustate); op_c1(cpustate); } /* DB FD */
-OP(fd,c2) { illegal_1(cpustate); op_c2(cpustate); } /* DB FD */
-OP(fd,c3) { illegal_1(cpustate); op_c3(cpustate); } /* DB FD */
-OP(fd,c4) { illegal_1(cpustate); op_c4(cpustate); } /* DB FD */
-OP(fd,c5) { illegal_1(cpustate); op_c5(cpustate); } /* DB FD */
-OP(fd,c6) { illegal_1(cpustate); op_c6(cpustate); } /* DB FD */
-OP(fd,c7) { illegal_1(cpustate); op_c7(cpustate); } /* DB FD */
-
-OP(fd,c8) { illegal_1(cpustate); op_c8(cpustate); } /* DB FD */
-OP(fd,c9) { illegal_1(cpustate); op_c9(cpustate); } /* DB FD */
-OP(fd,ca) { illegal_1(cpustate); op_ca(cpustate); } /* DB FD */
-OP(fd,cb) { cpustate->R++; EAY(cpustate); cpustate->extra_cycles += exec_xycb(cpustate,ARG(cpustate)); } /* ** FD CB xx */
-OP(fd,cc) { illegal_1(cpustate); op_cc(cpustate); } /* DB FD */
-OP(fd,cd) { illegal_1(cpustate); op_cd(cpustate); } /* DB FD */
-OP(fd,ce) { illegal_1(cpustate); op_ce(cpustate); } /* DB FD */
-OP(fd,cf) { illegal_1(cpustate); op_cf(cpustate); } /* DB FD */
-
-OP(fd,d0) { illegal_1(cpustate); op_d0(cpustate); } /* DB FD */
-OP(fd,d1) { illegal_1(cpustate); op_d1(cpustate); } /* DB FD */
-OP(fd,d2) { illegal_1(cpustate); op_d2(cpustate); } /* DB FD */
-OP(fd,d3) { illegal_1(cpustate); op_d3(cpustate); } /* DB FD */
-OP(fd,d4) { illegal_1(cpustate); op_d4(cpustate); } /* DB FD */
-OP(fd,d5) { illegal_1(cpustate); op_d5(cpustate); } /* DB FD */
-OP(fd,d6) { illegal_1(cpustate); op_d6(cpustate); } /* DB FD */
-OP(fd,d7) { illegal_1(cpustate); op_d7(cpustate); } /* DB FD */
-
-OP(fd,d8) { illegal_1(cpustate); op_d8(cpustate); } /* DB FD */
-OP(fd,d9) { illegal_1(cpustate); op_d9(cpustate); } /* DB FD */
-OP(fd,da) { illegal_1(cpustate); op_da(cpustate); } /* DB FD */
-OP(fd,db) { illegal_1(cpustate); op_db(cpustate); } /* DB FD */
-OP(fd,dc) { illegal_1(cpustate); op_dc(cpustate); } /* DB FD */
-OP(fd,dd) { illegal_1(cpustate); op_dd(cpustate); } /* DB FD */
-OP(fd,de) { illegal_1(cpustate); op_de(cpustate); } /* DB FD */
-OP(fd,df) { illegal_1(cpustate); op_df(cpustate); } /* DB FD */
-
-OP(fd,e0) { illegal_1(cpustate); op_e0(cpustate); } /* DB FD */
-OP(fd,e1) { cpustate->R++; POP(cpustate, IY); } /* POP IY */
-OP(fd,e2) { illegal_1(cpustate); op_e2(cpustate); } /* DB FD */
-OP(fd,e3) { cpustate->R++; EXSP(IY); } /* EX (SP),IY */
-OP(fd,e4) { illegal_1(cpustate); op_e4(cpustate); } /* DB FD */
-OP(fd,e5) { cpustate->R++; PUSH(cpustate, IY ); } /* PUSH IY */
-OP(fd,e6) { illegal_1(cpustate); op_e6(cpustate); } /* DB FD */
-OP(fd,e7) { illegal_1(cpustate); op_e7(cpustate); } /* DB FD */
-
-OP(fd,e8) { illegal_1(cpustate); op_e8(cpustate); } /* DB FD */
-OP(fd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IY; } /* JP (IY) */
-OP(fd,ea) { illegal_1(cpustate); op_ea(cpustate); } /* DB FD */
-OP(fd,eb) { illegal_1(cpustate); op_eb(cpustate); } /* DB FD */
-OP(fd,ec) { illegal_1(cpustate); op_ec(cpustate); } /* DB FD */
-OP(fd,ed) { illegal_1(cpustate); op_ed(cpustate); } /* DB FD */
-OP(fd,ee) { illegal_1(cpustate); op_ee(cpustate); } /* DB FD */
-OP(fd,ef) { illegal_1(cpustate); op_ef(cpustate); } /* DB FD */
-
-OP(fd,f0) { illegal_1(cpustate); op_f0(cpustate); } /* DB FD */
-OP(fd,f1) { illegal_1(cpustate); op_f1(cpustate); } /* DB FD */
-OP(fd,f2) { illegal_1(cpustate); op_f2(cpustate); } /* DB FD */
-OP(fd,f3) { illegal_1(cpustate); op_f3(cpustate); } /* DB FD */
-OP(fd,f4) { illegal_1(cpustate); op_f4(cpustate); } /* DB FD */
-OP(fd,f5) { illegal_1(cpustate); op_f5(cpustate); } /* DB FD */
-OP(fd,f6) { illegal_1(cpustate); op_f6(cpustate); } /* DB FD */
-OP(fd,f7) { illegal_1(cpustate); op_f7(cpustate); } /* DB FD */
-
-OP(fd,f8) { illegal_1(cpustate); op_f8(cpustate); } /* DB FD */
-OP(fd,f9) { cpustate->R++; cpustate->_SP = cpustate->_IY; } /* LD SP,IY */
-OP(fd,fa) { illegal_1(cpustate); op_fa(cpustate); } /* DB FD */
-OP(fd,fb) { illegal_1(cpustate); op_fb(cpustate); } /* DB FD */
-OP(fd,fc) { illegal_1(cpustate); op_fc(cpustate); } /* DB FD */
-OP(fd,fd) { illegal_1(cpustate); op_fd(cpustate); } /* DB FD */
-OP(fd,fe) { illegal_1(cpustate); op_fe(cpustate); } /* DB FD */
-OP(fd,ff) { illegal_1(cpustate); op_ff(cpustate); } /* DB FD */
-
+OP(fd,00) { illegal_1(cpustate); op_00(cpustate); } /* DB FD */
+OP(fd,01) { illegal_1(cpustate); op_01(cpustate); } /* DB FD */
+OP(fd,02) { illegal_1(cpustate); op_02(cpustate); } /* DB FD */
+OP(fd,03) { illegal_1(cpustate); op_03(cpustate); } /* DB FD */
+OP(fd,04) { illegal_1(cpustate); op_04(cpustate); } /* DB FD */
+OP(fd,05) { illegal_1(cpustate); op_05(cpustate); } /* DB FD */
+OP(fd,06) { illegal_1(cpustate); op_06(cpustate); } /* DB FD */
+OP(fd,07) { illegal_1(cpustate); op_07(cpustate); } /* DB FD */
+
+OP(fd,08) { illegal_1(cpustate); op_08(cpustate); } /* DB FD */
+OP(fd,09) { cpustate->R++; ADD16(IY,BC); } /* ADD IY,BC */
+OP(fd,0a) { illegal_1(cpustate); op_0a(cpustate); } /* DB FD */
+OP(fd,0b) { illegal_1(cpustate); op_0b(cpustate); } /* DB FD */
+OP(fd,0c) { illegal_1(cpustate); op_0c(cpustate); } /* DB FD */
+OP(fd,0d) { illegal_1(cpustate); op_0d(cpustate); } /* DB FD */
+OP(fd,0e) { illegal_1(cpustate); op_0e(cpustate); } /* DB FD */
+OP(fd,0f) { illegal_1(cpustate); op_0f(cpustate); } /* DB FD */
+
+OP(fd,10) { illegal_1(cpustate); op_10(cpustate); } /* DB FD */
+OP(fd,11) { illegal_1(cpustate); op_11(cpustate); } /* DB FD */
+OP(fd,12) { illegal_1(cpustate); op_12(cpustate); } /* DB FD */
+OP(fd,13) { illegal_1(cpustate); op_13(cpustate); } /* DB FD */
+OP(fd,14) { illegal_1(cpustate); op_14(cpustate); } /* DB FD */
+OP(fd,15) { illegal_1(cpustate); op_15(cpustate); } /* DB FD */
+OP(fd,16) { illegal_1(cpustate); op_16(cpustate); } /* DB FD */
+OP(fd,17) { illegal_1(cpustate); op_17(cpustate); } /* DB FD */
+
+OP(fd,18) { illegal_1(cpustate); op_18(cpustate); } /* DB FD */
+OP(fd,19) { cpustate->R++; ADD16(IY,DE); } /* ADD IY,DE */
+OP(fd,1a) { illegal_1(cpustate); op_1a(cpustate); } /* DB FD */
+OP(fd,1b) { illegal_1(cpustate); op_1b(cpustate); } /* DB FD */
+OP(fd,1c) { illegal_1(cpustate); op_1c(cpustate); } /* DB FD */
+OP(fd,1d) { illegal_1(cpustate); op_1d(cpustate); } /* DB FD */
+OP(fd,1e) { illegal_1(cpustate); op_1e(cpustate); } /* DB FD */
+OP(fd,1f) { illegal_1(cpustate); op_1f(cpustate); } /* DB FD */
+
+OP(fd,20) { illegal_1(cpustate); op_20(cpustate); } /* DB FD */
+OP(fd,21) { cpustate->R++; cpustate->_IY = ARG16(cpustate); } /* LD IY,w */
+OP(fd,22) { cpustate->R++; cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->IY ); } /* LD (w),IY */
+OP(fd,23) { cpustate->R++; cpustate->_IY++; } /* INC IY */
+OP(fd,24) { cpustate->R++; cpustate->_HY = INC(cpustate, cpustate->_HY); } /* INC HY */
+OP(fd,25) { cpustate->R++; cpustate->_HY = DEC(cpustate, cpustate->_HY); } /* DEC HY */
+OP(fd,26) { cpustate->R++; cpustate->_HY = ARG(cpustate); } /* LD HY,n */
+OP(fd,27) { illegal_1(cpustate); op_27(cpustate); } /* DB FD */
+
+OP(fd,28) { illegal_1(cpustate); op_28(cpustate); } /* DB FD */
+OP(fd,29) { cpustate->R++; ADD16(IY,IY); } /* ADD IY,IY */
+OP(fd,2a) { cpustate->R++; cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->IY ); } /* LD IY,(w) */
+OP(fd,2b) { cpustate->R++; cpustate->_IY--; } /* DEC IY */
+OP(fd,2c) { cpustate->R++; cpustate->_LY = INC(cpustate, cpustate->_LY); } /* INC LY */
+OP(fd,2d) { cpustate->R++; cpustate->_LY = DEC(cpustate, cpustate->_LY); } /* DEC LY */
+OP(fd,2e) { cpustate->R++; cpustate->_LY = ARG(cpustate); } /* LD LY,n */
+OP(fd,2f) { illegal_1(cpustate); op_2f(cpustate); } /* DB FD */
+
+OP(fd,30) { illegal_1(cpustate); op_30(cpustate); } /* DB FD */
+OP(fd,31) { illegal_1(cpustate); op_31(cpustate); } /* DB FD */
+OP(fd,32) { illegal_1(cpustate); op_32(cpustate); } /* DB FD */
+OP(fd,33) { illegal_1(cpustate); op_33(cpustate); } /* DB FD */
+OP(fd,34) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, INC(cpustate, RM(cpustate, cpustate->ea)) ); } /* INC (IY+o) */
+OP(fd,35) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, DEC(cpustate, RM(cpustate, cpustate->ea)) ); } /* DEC (IY+o) */
+OP(fd,36) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, ARG(cpustate) ); } /* LD (IY+o),n */
+OP(fd,37) { illegal_1(cpustate); op_37(cpustate); } /* DB FD */
+
+OP(fd,38) { illegal_1(cpustate); op_38(cpustate); } /* DB FD */
+OP(fd,39) { cpustate->R++; ADD16(IY,SP); } /* ADD IY,SP */
+OP(fd,3a) { illegal_1(cpustate); op_3a(cpustate); } /* DB FD */
+OP(fd,3b) { illegal_1(cpustate); op_3b(cpustate); } /* DB FD */
+OP(fd,3c) { illegal_1(cpustate); op_3c(cpustate); } /* DB FD */
+OP(fd,3d) { illegal_1(cpustate); op_3d(cpustate); } /* DB FD */
+OP(fd,3e) { illegal_1(cpustate); op_3e(cpustate); } /* DB FD */
+OP(fd,3f) { illegal_1(cpustate); op_3f(cpustate); } /* DB FD */
+
+OP(fd,40) { illegal_1(cpustate); op_40(cpustate); } /* DB FD */
+OP(fd,41) { illegal_1(cpustate); op_41(cpustate); } /* DB FD */
+OP(fd,42) { illegal_1(cpustate); op_42(cpustate); } /* DB FD */
+OP(fd,43) { illegal_1(cpustate); op_43(cpustate); } /* DB FD */
+OP(fd,44) { cpustate->R++; cpustate->_B = cpustate->_HY; } /* LD B,HY */
+OP(fd,45) { cpustate->R++; cpustate->_B = cpustate->_LY; } /* LD B,LY */
+OP(fd,46) { cpustate->R++; EAY(cpustate); cpustate->_B = RM(cpustate, cpustate->ea); } /* LD B,(IY+o) */
+OP(fd,47) { illegal_1(cpustate); op_47(cpustate); } /* DB FD */
+
+OP(fd,48) { illegal_1(cpustate); op_48(cpustate); } /* DB FD */
+OP(fd,49) { illegal_1(cpustate); op_49(cpustate); } /* DB FD */
+OP(fd,4a) { illegal_1(cpustate); op_4a(cpustate); } /* DB FD */
+OP(fd,4b) { illegal_1(cpustate); op_4b(cpustate); } /* DB FD */
+OP(fd,4c) { cpustate->R++; cpustate->_C = cpustate->_HY; } /* LD C,HY */
+OP(fd,4d) { cpustate->R++; cpustate->_C = cpustate->_LY; } /* LD C,LY */
+OP(fd,4e) { cpustate->R++; EAY(cpustate); cpustate->_C = RM(cpustate, cpustate->ea); } /* LD C,(IY+o) */
+OP(fd,4f) { illegal_1(cpustate); op_4f(cpustate); } /* DB FD */
+
+OP(fd,50) { illegal_1(cpustate); op_50(cpustate); } /* DB FD */
+OP(fd,51) { illegal_1(cpustate); op_51(cpustate); } /* DB FD */
+OP(fd,52) { illegal_1(cpustate); op_52(cpustate); } /* DB FD */
+OP(fd,53) { illegal_1(cpustate); op_53(cpustate); } /* DB FD */
+OP(fd,54) { cpustate->R++; cpustate->_D = cpustate->_HY; } /* LD D,HY */
+OP(fd,55) { cpustate->R++; cpustate->_D = cpustate->_LY; } /* LD D,LY */
+OP(fd,56) { cpustate->R++; EAY(cpustate); cpustate->_D = RM(cpustate, cpustate->ea); } /* LD D,(IY+o) */
+OP(fd,57) { illegal_1(cpustate); op_57(cpustate); } /* DB FD */
+
+OP(fd,58) { illegal_1(cpustate); op_58(cpustate); } /* DB FD */
+OP(fd,59) { illegal_1(cpustate); op_59(cpustate); } /* DB FD */
+OP(fd,5a) { illegal_1(cpustate); op_5a(cpustate); } /* DB FD */
+OP(fd,5b) { illegal_1(cpustate); op_5b(cpustate); } /* DB FD */
+OP(fd,5c) { cpustate->R++; cpustate->_E = cpustate->_HY; } /* LD E,HY */
+OP(fd,5d) { cpustate->R++; cpustate->_E = cpustate->_LY; } /* LD E,LY */
+OP(fd,5e) { cpustate->R++; EAY(cpustate); cpustate->_E = RM(cpustate, cpustate->ea); } /* LD E,(IY+o) */
+OP(fd,5f) { illegal_1(cpustate); op_5f(cpustate); } /* DB FD */
+
+OP(fd,60) { cpustate->R++; cpustate->_HY = cpustate->_B; } /* LD HY,B */
+OP(fd,61) { cpustate->R++; cpustate->_HY = cpustate->_C; } /* LD HY,C */
+OP(fd,62) { cpustate->R++; cpustate->_HY = cpustate->_D; } /* LD HY,D */
+OP(fd,63) { cpustate->R++; cpustate->_HY = cpustate->_E; } /* LD HY,E */
+OP(fd,64) { cpustate->R++; } /* LD HY,HY */
+OP(fd,65) { cpustate->R++; cpustate->_HY = cpustate->_LY; } /* LD HY,LY */
+OP(fd,66) { cpustate->R++; EAY(cpustate); cpustate->_H = RM(cpustate, cpustate->ea); } /* LD H,(IY+o) */
+OP(fd,67) { cpustate->R++; cpustate->_HY = cpustate->_A; } /* LD HY,A */
+
+OP(fd,68) { cpustate->R++; cpustate->_LY = cpustate->_B; } /* LD LY,B */
+OP(fd,69) { cpustate->R++; cpustate->_LY = cpustate->_C; } /* LD LY,C */
+OP(fd,6a) { cpustate->R++; cpustate->_LY = cpustate->_D; } /* LD LY,D */
+OP(fd,6b) { cpustate->R++; cpustate->_LY = cpustate->_E; } /* LD LY,E */
+OP(fd,6c) { cpustate->R++; cpustate->_LY = cpustate->_HY; } /* LD LY,HY */
+OP(fd,6d) { cpustate->R++; } /* LD LY,LY */
+OP(fd,6e) { cpustate->R++; EAY(cpustate); cpustate->_L = RM(cpustate, cpustate->ea); } /* LD L,(IY+o) */
+OP(fd,6f) { cpustate->R++; cpustate->_LY = cpustate->_A; } /* LD LY,A */
+
+OP(fd,70) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_B ); } /* LD (IY+o),B */
+OP(fd,71) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_C ); } /* LD (IY+o),C */
+OP(fd,72) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_D ); } /* LD (IY+o),D */
+OP(fd,73) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_E ); } /* LD (IY+o),E */
+OP(fd,74) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_H ); } /* LD (IY+o),H */
+OP(fd,75) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_L ); } /* LD (IY+o),L */
+OP(fd,76) { illegal_1(cpustate); op_76(cpustate); } /* DB FD */
+OP(fd,77) { cpustate->R++; EAY(cpustate); WM(cpustate, cpustate->ea, cpustate->_A ); } /* LD (IY+o),A */
+
+OP(fd,78) { illegal_1(cpustate); op_78(cpustate); } /* DB FD */
+OP(fd,79) { illegal_1(cpustate); op_79(cpustate); } /* DB FD */
+OP(fd,7a) { illegal_1(cpustate); op_7a(cpustate); } /* DB FD */
+OP(fd,7b) { illegal_1(cpustate); op_7b(cpustate); } /* DB FD */
+OP(fd,7c) { cpustate->R++; cpustate->_A = cpustate->_HY; } /* LD A,HY */
+OP(fd,7d) { cpustate->R++; cpustate->_A = cpustate->_LY; } /* LD A,LY */
+OP(fd,7e) { cpustate->R++; EAY(cpustate); cpustate->_A = RM(cpustate, cpustate->ea); } /* LD A,(IY+o) */
+OP(fd,7f) { illegal_1(cpustate); op_7f(cpustate); } /* DB FD */
+
+OP(fd,80) { illegal_1(cpustate); op_80(cpustate); } /* DB FD */
+OP(fd,81) { illegal_1(cpustate); op_81(cpustate); } /* DB FD */
+OP(fd,82) { illegal_1(cpustate); op_82(cpustate); } /* DB FD */
+OP(fd,83) { illegal_1(cpustate); op_83(cpustate); } /* DB FD */
+OP(fd,84) { cpustate->R++; ADD(cpustate->_HY); } /* ADD A,HY */
+OP(fd,85) { cpustate->R++; ADD(cpustate->_LY); } /* ADD A,LY */
+OP(fd,86) { cpustate->R++; EAY(cpustate); ADD(RM(cpustate, cpustate->ea)); } /* ADD A,(IY+o) */
+OP(fd,87) { illegal_1(cpustate); op_87(cpustate); } /* DB FD */
+
+OP(fd,88) { illegal_1(cpustate); op_88(cpustate); } /* DB FD */
+OP(fd,89) { illegal_1(cpustate); op_89(cpustate); } /* DB FD */
+OP(fd,8a) { illegal_1(cpustate); op_8a(cpustate); } /* DB FD */
+OP(fd,8b) { illegal_1(cpustate); op_8b(cpustate); } /* DB FD */
+OP(fd,8c) { cpustate->R++; ADC(cpustate->_HY); } /* ADC A,HY */
+OP(fd,8d) { cpustate->R++; ADC(cpustate->_LY); } /* ADC A,LY */
+OP(fd,8e) { cpustate->R++; EAY(cpustate); ADC(RM(cpustate, cpustate->ea)); } /* ADC A,(IY+o) */
+OP(fd,8f) { illegal_1(cpustate); op_8f(cpustate); } /* DB FD */
+
+OP(fd,90) { illegal_1(cpustate); op_90(cpustate); } /* DB FD */
+OP(fd,91) { illegal_1(cpustate); op_91(cpustate); } /* DB FD */
+OP(fd,92) { illegal_1(cpustate); op_92(cpustate); } /* DB FD */
+OP(fd,93) { illegal_1(cpustate); op_93(cpustate); } /* DB FD */
+OP(fd,94) { cpustate->R++; SUB(cpustate->_HY); } /* SUB HY */
+OP(fd,95) { cpustate->R++; SUB(cpustate->_LY); } /* SUB LY */
+OP(fd,96) { cpustate->R++; EAY(cpustate); SUB(RM(cpustate, cpustate->ea)); } /* SUB (IY+o) */
+OP(fd,97) { illegal_1(cpustate); op_97(cpustate); } /* DB FD */
+
+OP(fd,98) { illegal_1(cpustate); op_98(cpustate); } /* DB FD */
+OP(fd,99) { illegal_1(cpustate); op_99(cpustate); } /* DB FD */
+OP(fd,9a) { illegal_1(cpustate); op_9a(cpustate); } /* DB FD */
+OP(fd,9b) { illegal_1(cpustate); op_9b(cpustate); } /* DB FD */
+OP(fd,9c) { cpustate->R++; SBC(cpustate->_HY); } /* SBC A,HY */
+OP(fd,9d) { cpustate->R++; SBC(cpustate->_LY); } /* SBC A,LY */
+OP(fd,9e) { cpustate->R++; EAY(cpustate); SBC(RM(cpustate, cpustate->ea)); } /* SBC A,(IY+o) */
+OP(fd,9f) { illegal_1(cpustate); op_9f(cpustate); } /* DB FD */
+
+OP(fd,a0) { illegal_1(cpustate); op_a0(cpustate); } /* DB FD */
+OP(fd,a1) { illegal_1(cpustate); op_a1(cpustate); } /* DB FD */
+OP(fd,a2) { illegal_1(cpustate); op_a2(cpustate); } /* DB FD */
+OP(fd,a3) { illegal_1(cpustate); op_a3(cpustate); } /* DB FD */
+OP(fd,a4) { cpustate->R++; AND(cpustate->_HY); } /* AND HY */
+OP(fd,a5) { cpustate->R++; AND(cpustate->_LY); } /* AND LY */
+OP(fd,a6) { cpustate->R++; EAY(cpustate); AND(RM(cpustate, cpustate->ea)); } /* AND (IY+o) */
+OP(fd,a7) { illegal_1(cpustate); op_a7(cpustate); } /* DB FD */
+
+OP(fd,a8) { illegal_1(cpustate); op_a8(cpustate); } /* DB FD */
+OP(fd,a9) { illegal_1(cpustate); op_a9(cpustate); } /* DB FD */
+OP(fd,aa) { illegal_1(cpustate); op_aa(cpustate); } /* DB FD */
+OP(fd,ab) { illegal_1(cpustate); op_ab(cpustate); } /* DB FD */
+OP(fd,ac) { cpustate->R++; XOR(cpustate->_HY); } /* XOR HY */
+OP(fd,ad) { cpustate->R++; XOR(cpustate->_LY); } /* XOR LY */
+OP(fd,ae) { cpustate->R++; EAY(cpustate); XOR(RM(cpustate, cpustate->ea)); } /* XOR (IY+o) */
+OP(fd,af) { illegal_1(cpustate); op_af(cpustate); } /* DB FD */
+
+OP(fd,b0) { illegal_1(cpustate); op_b0(cpustate); } /* DB FD */
+OP(fd,b1) { illegal_1(cpustate); op_b1(cpustate); } /* DB FD */
+OP(fd,b2) { illegal_1(cpustate); op_b2(cpustate); } /* DB FD */
+OP(fd,b3) { illegal_1(cpustate); op_b3(cpustate); } /* DB FD */
+OP(fd,b4) { cpustate->R++; OR(cpustate->_HY); } /* OR HY */
+OP(fd,b5) { cpustate->R++; OR(cpustate->_LY); } /* OR LY */
+OP(fd,b6) { cpustate->R++; EAY(cpustate); OR(RM(cpustate, cpustate->ea)); } /* OR (IY+o) */
+OP(fd,b7) { illegal_1(cpustate); op_b7(cpustate); } /* DB FD */
+
+OP(fd,b8) { illegal_1(cpustate); op_b8(cpustate); } /* DB FD */
+OP(fd,b9) { illegal_1(cpustate); op_b9(cpustate); } /* DB FD */
+OP(fd,ba) { illegal_1(cpustate); op_ba(cpustate); } /* DB FD */
+OP(fd,bb) { illegal_1(cpustate); op_bb(cpustate); } /* DB FD */
+OP(fd,bc) { cpustate->R++; CP(cpustate->_HY); } /* CP HY */
+OP(fd,bd) { cpustate->R++; CP(cpustate->_LY); } /* CP LY */
+OP(fd,be) { cpustate->R++; EAY(cpustate); CP(RM(cpustate, cpustate->ea)); } /* CP (IY+o) */
+OP(fd,bf) { illegal_1(cpustate); op_bf(cpustate); } /* DB FD */
+
+OP(fd,c0) { illegal_1(cpustate); op_c0(cpustate); } /* DB FD */
+OP(fd,c1) { illegal_1(cpustate); op_c1(cpustate); } /* DB FD */
+OP(fd,c2) { illegal_1(cpustate); op_c2(cpustate); } /* DB FD */
+OP(fd,c3) { illegal_1(cpustate); op_c3(cpustate); } /* DB FD */
+OP(fd,c4) { illegal_1(cpustate); op_c4(cpustate); } /* DB FD */
+OP(fd,c5) { illegal_1(cpustate); op_c5(cpustate); } /* DB FD */
+OP(fd,c6) { illegal_1(cpustate); op_c6(cpustate); } /* DB FD */
+OP(fd,c7) { illegal_1(cpustate); op_c7(cpustate); } /* DB FD */
+
+OP(fd,c8) { illegal_1(cpustate); op_c8(cpustate); } /* DB FD */
+OP(fd,c9) { illegal_1(cpustate); op_c9(cpustate); } /* DB FD */
+OP(fd,ca) { illegal_1(cpustate); op_ca(cpustate); } /* DB FD */
+OP(fd,cb) { cpustate->R++; EAY(cpustate); cpustate->extra_cycles += exec_xycb(cpustate,ARG(cpustate)); } /* ** FD CB xx */
+OP(fd,cc) { illegal_1(cpustate); op_cc(cpustate); } /* DB FD */
+OP(fd,cd) { illegal_1(cpustate); op_cd(cpustate); } /* DB FD */
+OP(fd,ce) { illegal_1(cpustate); op_ce(cpustate); } /* DB FD */
+OP(fd,cf) { illegal_1(cpustate); op_cf(cpustate); } /* DB FD */
+
+OP(fd,d0) { illegal_1(cpustate); op_d0(cpustate); } /* DB FD */
+OP(fd,d1) { illegal_1(cpustate); op_d1(cpustate); } /* DB FD */
+OP(fd,d2) { illegal_1(cpustate); op_d2(cpustate); } /* DB FD */
+OP(fd,d3) { illegal_1(cpustate); op_d3(cpustate); } /* DB FD */
+OP(fd,d4) { illegal_1(cpustate); op_d4(cpustate); } /* DB FD */
+OP(fd,d5) { illegal_1(cpustate); op_d5(cpustate); } /* DB FD */
+OP(fd,d6) { illegal_1(cpustate); op_d6(cpustate); } /* DB FD */
+OP(fd,d7) { illegal_1(cpustate); op_d7(cpustate); } /* DB FD */
+
+OP(fd,d8) { illegal_1(cpustate); op_d8(cpustate); } /* DB FD */
+OP(fd,d9) { illegal_1(cpustate); op_d9(cpustate); } /* DB FD */
+OP(fd,da) { illegal_1(cpustate); op_da(cpustate); } /* DB FD */
+OP(fd,db) { illegal_1(cpustate); op_db(cpustate); } /* DB FD */
+OP(fd,dc) { illegal_1(cpustate); op_dc(cpustate); } /* DB FD */
+OP(fd,dd) { illegal_1(cpustate); op_dd(cpustate); } /* DB FD */
+OP(fd,de) { illegal_1(cpustate); op_de(cpustate); } /* DB FD */
+OP(fd,df) { illegal_1(cpustate); op_df(cpustate); } /* DB FD */
+
+OP(fd,e0) { illegal_1(cpustate); op_e0(cpustate); } /* DB FD */
+OP(fd,e1) { cpustate->R++; POP(cpustate, IY); } /* POP IY */
+OP(fd,e2) { illegal_1(cpustate); op_e2(cpustate); } /* DB FD */
+OP(fd,e3) { cpustate->R++; EXSP(IY); } /* EX (SP),IY */
+OP(fd,e4) { illegal_1(cpustate); op_e4(cpustate); } /* DB FD */
+OP(fd,e5) { cpustate->R++; PUSH(cpustate, IY ); } /* PUSH IY */
+OP(fd,e6) { illegal_1(cpustate); op_e6(cpustate); } /* DB FD */
+OP(fd,e7) { illegal_1(cpustate); op_e7(cpustate); } /* DB FD */
+
+OP(fd,e8) { illegal_1(cpustate); op_e8(cpustate); } /* DB FD */
+OP(fd,e9) { cpustate->R++; cpustate->_PC = cpustate->_IY; } /* JP (IY) */
+OP(fd,ea) { illegal_1(cpustate); op_ea(cpustate); } /* DB FD */
+OP(fd,eb) { illegal_1(cpustate); op_eb(cpustate); } /* DB FD */
+OP(fd,ec) { illegal_1(cpustate); op_ec(cpustate); } /* DB FD */
+OP(fd,ed) { illegal_1(cpustate); op_ed(cpustate); } /* DB FD */
+OP(fd,ee) { illegal_1(cpustate); op_ee(cpustate); } /* DB FD */
+OP(fd,ef) { illegal_1(cpustate); op_ef(cpustate); } /* DB FD */
+
+OP(fd,f0) { illegal_1(cpustate); op_f0(cpustate); } /* DB FD */
+OP(fd,f1) { illegal_1(cpustate); op_f1(cpustate); } /* DB FD */
+OP(fd,f2) { illegal_1(cpustate); op_f2(cpustate); } /* DB FD */
+OP(fd,f3) { illegal_1(cpustate); op_f3(cpustate); } /* DB FD */
+OP(fd,f4) { illegal_1(cpustate); op_f4(cpustate); } /* DB FD */
+OP(fd,f5) { illegal_1(cpustate); op_f5(cpustate); } /* DB FD */
+OP(fd,f6) { illegal_1(cpustate); op_f6(cpustate); } /* DB FD */
+OP(fd,f7) { illegal_1(cpustate); op_f7(cpustate); } /* DB FD */
+
+OP(fd,f8) { illegal_1(cpustate); op_f8(cpustate); } /* DB FD */
+OP(fd,f9) { cpustate->R++; cpustate->_SP = cpustate->_IY; } /* LD SP,IY */
+OP(fd,fa) { illegal_1(cpustate); op_fa(cpustate); } /* DB FD */
+OP(fd,fb) { illegal_1(cpustate); op_fb(cpustate); } /* DB FD */
+OP(fd,fc) { illegal_1(cpustate); op_fc(cpustate); } /* DB FD */
+OP(fd,fd) { illegal_1(cpustate); op_fd(cpustate); } /* DB FD */
+OP(fd,fe) { illegal_1(cpustate); op_fe(cpustate); } /* DB FD */
+OP(fd,ff) { illegal_1(cpustate); op_ff(cpustate); } /* DB FD */
diff --git a/src/emu/cpu/z180/z180op.c b/src/emu/cpu/z180/z180op.c
index 1dd7018663b..c90c4745847 100644
--- a/src/emu/cpu/z180/z180op.c
+++ b/src/emu/cpu/z180/z180op.c
@@ -2,294 +2,294 @@
/**********************************************************
* main opcodes
**********************************************************/
-OP(op,00) { } /* NOP */
-OP(op,01) { cpustate->_BC = ARG16(cpustate); } /* LD BC,w */
-OP(op,02) { WM(cpustate, cpustate->_BC, cpustate->_A ); } /* LD (BC),A */
-OP(op,03) { cpustate->_BC++; } /* INC BC */
-OP(op,04) { cpustate->_B = INC(cpustate, cpustate->_B); } /* INC B */
-OP(op,05) { cpustate->_B = DEC(cpustate, cpustate->_B); } /* DEC B */
-OP(op,06) { cpustate->_B = ARG(cpustate); } /* LD B,n */
-OP(op,07) { RLCA; } /* RLCA */
-
-OP(op,08) { EX_AF; } /* EX AF,AF' */
-OP(op,09) { ADD16(HL,BC); } /* ADD HL,BC */
-OP(op,0a) { cpustate->_A = RM(cpustate, cpustate->_BC); } /* LD A,(BC) */
-OP(op,0b) { cpustate->_BC--; } /* DEC BC */
-OP(op,0c) { cpustate->_C = INC(cpustate, cpustate->_C); } /* INC C */
-OP(op,0d) { cpustate->_C = DEC(cpustate, cpustate->_C); } /* DEC C */
-OP(op,0e) { cpustate->_C = ARG(cpustate); } /* LD C,n */
-OP(op,0f) { RRCA; } /* RRCA */
-
-OP(op,10) { cpustate->_B--; JR_COND( cpustate->_B, 0x10 ); } /* DJNZ o */
-OP(op,11) { cpustate->_DE = ARG16(cpustate); } /* LD DE,w */
-OP(op,12) { WM(cpustate, cpustate->_DE, cpustate->_A ); } /* LD (DE),A */
-OP(op,13) { cpustate->_DE++; } /* INC DE */
-OP(op,14) { cpustate->_D = INC(cpustate, cpustate->_D); } /* INC D */
-OP(op,15) { cpustate->_D = DEC(cpustate, cpustate->_D); } /* DEC D */
-OP(op,16) { cpustate->_D = ARG(cpustate); } /* LD D,n */
-OP(op,17) { RLA; } /* RLA */
-
-OP(op,18) { JR(); } /* JR o */
-OP(op,19) { ADD16(HL,DE); } /* ADD HL,DE */
-OP(op,1a) { cpustate->_A = RM(cpustate, cpustate->_DE); } /* LD A,(DE) */
-OP(op,1b) { cpustate->_DE--; ; } /* DEC DE */
-OP(op,1c) { cpustate->_E = INC(cpustate, cpustate->_E); } /* INC E */
-OP(op,1d) { cpustate->_E = DEC(cpustate, cpustate->_E); } /* DEC E */
-OP(op,1e) { cpustate->_E = ARG(cpustate); } /* LD E,n */
-OP(op,1f) { RRA; } /* RRA */
-
-OP(op,20) { JR_COND( !(cpustate->_F & ZF), 0x20 ); } /* JR NZ,o */
-OP(op,21) { cpustate->_HL = ARG16(cpustate); } /* LD HL,w */
-OP(op,22) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */
-OP(op,23) { cpustate->_HL++; } /* INC HL */
-OP(op,24) { cpustate->_H = INC(cpustate, cpustate->_H); } /* INC H */
-OP(op,25) { cpustate->_H = DEC(cpustate, cpustate->_H); } /* DEC H */
-OP(op,26) { cpustate->_H = ARG(cpustate); } /* LD H,n */
-OP(op,27) { DAA; } /* DAA */
-
-OP(op,28) { JR_COND( cpustate->_F & ZF, 0x28 ); } /* JR Z,o */
-OP(op,29) { ADD16(HL,HL); } /* ADD HL,HL */
-OP(op,2a) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */
-OP(op,2b) { cpustate->_HL--; } /* DEC HL */
-OP(op,2c) { cpustate->_L = INC(cpustate, cpustate->_L); } /* INC L */
-OP(op,2d) { cpustate->_L = DEC(cpustate, cpustate->_L); } /* DEC L */
-OP(op,2e) { cpustate->_L = ARG(cpustate); } /* LD L,n */
+OP(op,00) { } /* NOP */
+OP(op,01) { cpustate->_BC = ARG16(cpustate); } /* LD BC,w */
+OP(op,02) { WM(cpustate, cpustate->_BC, cpustate->_A ); } /* LD (BC),A */
+OP(op,03) { cpustate->_BC++; } /* INC BC */
+OP(op,04) { cpustate->_B = INC(cpustate, cpustate->_B); } /* INC B */
+OP(op,05) { cpustate->_B = DEC(cpustate, cpustate->_B); } /* DEC B */
+OP(op,06) { cpustate->_B = ARG(cpustate); } /* LD B,n */
+OP(op,07) { RLCA; } /* RLCA */
+
+OP(op,08) { EX_AF; } /* EX AF,AF' */
+OP(op,09) { ADD16(HL,BC); } /* ADD HL,BC */
+OP(op,0a) { cpustate->_A = RM(cpustate, cpustate->_BC); } /* LD A,(BC) */
+OP(op,0b) { cpustate->_BC--; } /* DEC BC */
+OP(op,0c) { cpustate->_C = INC(cpustate, cpustate->_C); } /* INC C */
+OP(op,0d) { cpustate->_C = DEC(cpustate, cpustate->_C); } /* DEC C */
+OP(op,0e) { cpustate->_C = ARG(cpustate); } /* LD C,n */
+OP(op,0f) { RRCA; } /* RRCA */
+
+OP(op,10) { cpustate->_B--; JR_COND( cpustate->_B, 0x10 ); } /* DJNZ o */
+OP(op,11) { cpustate->_DE = ARG16(cpustate); } /* LD DE,w */
+OP(op,12) { WM(cpustate, cpustate->_DE, cpustate->_A ); } /* LD (DE),A */
+OP(op,13) { cpustate->_DE++; } /* INC DE */
+OP(op,14) { cpustate->_D = INC(cpustate, cpustate->_D); } /* INC D */
+OP(op,15) { cpustate->_D = DEC(cpustate, cpustate->_D); } /* DEC D */
+OP(op,16) { cpustate->_D = ARG(cpustate); } /* LD D,n */
+OP(op,17) { RLA; } /* RLA */
+
+OP(op,18) { JR(); } /* JR o */
+OP(op,19) { ADD16(HL,DE); } /* ADD HL,DE */
+OP(op,1a) { cpustate->_A = RM(cpustate, cpustate->_DE); } /* LD A,(DE) */
+OP(op,1b) { cpustate->_DE--; ; } /* DEC DE */
+OP(op,1c) { cpustate->_E = INC(cpustate, cpustate->_E); } /* INC E */
+OP(op,1d) { cpustate->_E = DEC(cpustate, cpustate->_E); } /* DEC E */
+OP(op,1e) { cpustate->_E = ARG(cpustate); } /* LD E,n */
+OP(op,1f) { RRA; } /* RRA */
+
+OP(op,20) { JR_COND( !(cpustate->_F & ZF), 0x20 ); } /* JR NZ,o */
+OP(op,21) { cpustate->_HL = ARG16(cpustate); } /* LD HL,w */
+OP(op,22) { cpustate->ea = ARG16(cpustate); WM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD (w),HL */
+OP(op,23) { cpustate->_HL++; } /* INC HL */
+OP(op,24) { cpustate->_H = INC(cpustate, cpustate->_H); } /* INC H */
+OP(op,25) { cpustate->_H = DEC(cpustate, cpustate->_H); } /* DEC H */
+OP(op,26) { cpustate->_H = ARG(cpustate); } /* LD H,n */
+OP(op,27) { DAA; } /* DAA */
+
+OP(op,28) { JR_COND( cpustate->_F & ZF, 0x28 ); } /* JR Z,o */
+OP(op,29) { ADD16(HL,HL); } /* ADD HL,HL */
+OP(op,2a) { cpustate->ea = ARG16(cpustate); RM16(cpustate, cpustate->ea, &cpustate->HL ); } /* LD HL,(w) */
+OP(op,2b) { cpustate->_HL--; } /* DEC HL */
+OP(op,2c) { cpustate->_L = INC(cpustate, cpustate->_L); } /* INC L */
+OP(op,2d) { cpustate->_L = DEC(cpustate, cpustate->_L); } /* DEC L */
+OP(op,2e) { cpustate->_L = ARG(cpustate); } /* LD L,n */
OP(op,2f) { cpustate->_A ^= 0xff; cpustate->_F = (cpustate->_F&(SF|ZF|PF|CF))|HF|NF|(cpustate->_A&(YF|XF)); } /* CPL */
-OP(op,30) { JR_COND( !(cpustate->_F & CF), 0x30 ); } /* JR NC,o */
-OP(op,31) { cpustate->_SP = ARG16(cpustate); } /* LD SP,w */
-OP(op,32) { cpustate->ea = ARG16(cpustate); WM(cpustate, cpustate->ea, cpustate->_A ); } /* LD (w),A */
-OP(op,33) { cpustate->_SP++; } /* INC SP */
-OP(op,34) { WM(cpustate, cpustate->_HL, INC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* INC (HL) */
-OP(op,35) { WM(cpustate, cpustate->_HL, DEC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* DEC (HL) */
-OP(op,36) { WM(cpustate, cpustate->_HL, ARG(cpustate) ); } /* LD (HL),n */
-OP(op,37) { cpustate->_F = (cpustate->_F & (SF|ZF|PF)) | CF | (cpustate->_A & (YF|XF)); } /* SCF */
-
-OP(op,38) { JR_COND( cpustate->_F & CF, 0x38 ); } /* JR C,o */
-OP(op,39) { ADD16(HL,SP); } /* ADD HL,SP */
-OP(op,3a) { cpustate->ea = ARG16(cpustate); cpustate->_A = RM(cpustate, cpustate->ea ); } /* LD A,(w) */
-OP(op,3b) { cpustate->_SP--; } /* DEC SP */
-OP(op,3c) { cpustate->_A = INC(cpustate, cpustate->_A); } /* INC A */
-OP(op,3d) { cpustate->_A = DEC(cpustate, cpustate->_A); } /* DEC A */
-OP(op,3e) { cpustate->_A = ARG(cpustate); } /* LD A,n */
+OP(op,30) { JR_COND( !(cpustate->_F & CF), 0x30 ); } /* JR NC,o */
+OP(op,31) { cpustate->_SP = ARG16(cpustate); } /* LD SP,w */
+OP(op,32) { cpustate->ea = ARG16(cpustate); WM(cpustate, cpustate->ea, cpustate->_A ); } /* LD (w),A */
+OP(op,33) { cpustate->_SP++; } /* INC SP */
+OP(op,34) { WM(cpustate, cpustate->_HL, INC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* INC (HL) */
+OP(op,35) { WM(cpustate, cpustate->_HL, DEC(cpustate, RM(cpustate, cpustate->_HL)) ); } /* DEC (HL) */
+OP(op,36) { WM(cpustate, cpustate->_HL, ARG(cpustate) ); } /* LD (HL),n */
+OP(op,37) { cpustate->_F = (cpustate->_F & (SF|ZF|PF)) | CF | (cpustate->_A & (YF|XF)); } /* SCF */
+
+OP(op,38) { JR_COND( cpustate->_F & CF, 0x38 ); } /* JR C,o */
+OP(op,39) { ADD16(HL,SP); } /* ADD HL,SP */
+OP(op,3a) { cpustate->ea = ARG16(cpustate); cpustate->_A = RM(cpustate, cpustate->ea ); } /* LD A,(w) */
+OP(op,3b) { cpustate->_SP--; } /* DEC SP */
+OP(op,3c) { cpustate->_A = INC(cpustate, cpustate->_A); } /* INC A */
+OP(op,3d) { cpustate->_A = DEC(cpustate, cpustate->_A); } /* DEC A */
+OP(op,3e) { cpustate->_A = ARG(cpustate); } /* LD A,n */
OP(op,3f) { cpustate->_F = ((cpustate->_F&(SF|ZF|PF|CF))|((cpustate->_F&CF)<<4)|(cpustate->_A&(YF|XF)))^CF; } /* CCF */
//OP(op,3f) { cpustate->_F = ((cpustate->_F & ~(HF|NF)) | ((cpustate->_F & CF)<<4)) ^ CF; } /* CCF */
-OP(op,40) { } /* LD B,B */
-OP(op,41) { cpustate->_B = cpustate->_C; } /* LD B,C */
-OP(op,42) { cpustate->_B = cpustate->_D; } /* LD B,D */
-OP(op,43) { cpustate->_B = cpustate->_E; } /* LD B,E */
-OP(op,44) { cpustate->_B = cpustate->_H; } /* LD B,H */
-OP(op,45) { cpustate->_B = cpustate->_L; } /* LD B,L */
-OP(op,46) { cpustate->_B = RM(cpustate, cpustate->_HL); } /* LD B,(HL) */
-OP(op,47) { cpustate->_B = cpustate->_A; } /* LD B,A */
-
-OP(op,48) { cpustate->_C = cpustate->_B; } /* LD C,B */
-OP(op,49) { } /* LD C,C */
-OP(op,4a) { cpustate->_C = cpustate->_D; } /* LD C,D */
-OP(op,4b) { cpustate->_C = cpustate->_E; } /* LD C,E */
-OP(op,4c) { cpustate->_C = cpustate->_H; } /* LD C,H */
-OP(op,4d) { cpustate->_C = cpustate->_L; } /* LD C,L */
-OP(op,4e) { cpustate->_C = RM(cpustate, cpustate->_HL); } /* LD C,(HL) */
-OP(op,4f) { cpustate->_C = cpustate->_A; } /* LD C,A */
-
-OP(op,50) { cpustate->_D = cpustate->_B; } /* LD D,B */
-OP(op,51) { cpustate->_D = cpustate->_C; } /* LD D,C */
-OP(op,52) { } /* LD D,D */
-OP(op,53) { cpustate->_D = cpustate->_E; } /* LD D,E */
-OP(op,54) { cpustate->_D = cpustate->_H; } /* LD D,H */
-OP(op,55) { cpustate->_D = cpustate->_L; } /* LD D,L */
-OP(op,56) { cpustate->_D = RM(cpustate, cpustate->_HL); } /* LD D,(HL) */
-OP(op,57) { cpustate->_D = cpustate->_A; } /* LD D,A */
-
-OP(op,58) { cpustate->_E = cpustate->_B; } /* LD E,B */
-OP(op,59) { cpustate->_E = cpustate->_C; } /* LD E,C */
-OP(op,5a) { cpustate->_E = cpustate->_D; } /* LD E,D */
-OP(op,5b) { } /* LD E,E */
-OP(op,5c) { cpustate->_E = cpustate->_H; } /* LD E,H */
-OP(op,5d) { cpustate->_E = cpustate->_L; } /* LD E,L */
-OP(op,5e) { cpustate->_E = RM(cpustate, cpustate->_HL); } /* LD E,(HL) */
-OP(op,5f) { cpustate->_E = cpustate->_A; } /* LD E,A */
-
-OP(op,60) { cpustate->_H = cpustate->_B; } /* LD H,B */
-OP(op,61) { cpustate->_H = cpustate->_C; } /* LD H,C */
-OP(op,62) { cpustate->_H = cpustate->_D; } /* LD H,D */
-OP(op,63) { cpustate->_H = cpustate->_E; } /* LD H,E */
-OP(op,64) { } /* LD H,H */
-OP(op,65) { cpustate->_H = cpustate->_L; } /* LD H,L */
-OP(op,66) { cpustate->_H = RM(cpustate, cpustate->_HL); } /* LD H,(HL) */
-OP(op,67) { cpustate->_H = cpustate->_A; } /* LD H,A */
-
-OP(op,68) { cpustate->_L = cpustate->_B; } /* LD L,B */
-OP(op,69) { cpustate->_L = cpustate->_C; } /* LD L,C */
-OP(op,6a) { cpustate->_L = cpustate->_D; } /* LD L,D */
-OP(op,6b) { cpustate->_L = cpustate->_E; } /* LD L,E */
-OP(op,6c) { cpustate->_L = cpustate->_H; } /* LD L,H */
-OP(op,6d) { } /* LD L,L */
-OP(op,6e) { cpustate->_L = RM(cpustate, cpustate->_HL); } /* LD L,(HL) */
-OP(op,6f) { cpustate->_L = cpustate->_A; } /* LD L,A */
-
-OP(op,70) { WM(cpustate, cpustate->_HL, cpustate->_B ); } /* LD (HL),B */
-OP(op,71) { WM(cpustate, cpustate->_HL, cpustate->_C ); } /* LD (HL),C */
-OP(op,72) { WM(cpustate, cpustate->_HL, cpustate->_D ); } /* LD (HL),D */
-OP(op,73) { WM(cpustate, cpustate->_HL, cpustate->_E ); } /* LD (HL),E */
-OP(op,74) { WM(cpustate, cpustate->_HL, cpustate->_H ); } /* LD (HL),H */
-OP(op,75) { WM(cpustate, cpustate->_HL, cpustate->_L ); } /* LD (HL),L */
-OP(op,76) { ENTER_HALT(cpustate); } /* HALT */
-OP(op,77) { WM(cpustate, cpustate->_HL, cpustate->_A ); } /* LD (HL),A */
-
-OP(op,78) { cpustate->_A = cpustate->_B; } /* LD A,B */
-OP(op,79) { cpustate->_A = cpustate->_C; } /* LD A,C */
-OP(op,7a) { cpustate->_A = cpustate->_D; } /* LD A,D */
-OP(op,7b) { cpustate->_A = cpustate->_E; } /* LD A,E */
-OP(op,7c) { cpustate->_A = cpustate->_H; } /* LD A,H */
-OP(op,7d) { cpustate->_A = cpustate->_L; } /* LD A,L */
-OP(op,7e) { cpustate->_A = RM(cpustate, cpustate->_HL); } /* LD A,(HL) */
-OP(op,7f) { } /* LD A,A */
-
-OP(op,80) { ADD(cpustate->_B); } /* ADD A,B */
-OP(op,81) { ADD(cpustate->_C); } /* ADD A,C */
-OP(op,82) { ADD(cpustate->_D); } /* ADD A,D */
-OP(op,83) { ADD(cpustate->_E); } /* ADD A,E */
-OP(op,84) { ADD(cpustate->_H); } /* ADD A,H */
-OP(op,85) { ADD(cpustate->_L); } /* ADD A,L */
-OP(op,86) { ADD(RM(cpustate, cpustate->_HL)); } /* ADD A,(HL) */
-OP(op,87) { ADD(cpustate->_A); } /* ADD A,A */
-
-OP(op,88) { ADC(cpustate->_B); } /* ADC A,B */
-OP(op,89) { ADC(cpustate->_C); } /* ADC A,C */
-OP(op,8a) { ADC(cpustate->_D); } /* ADC A,D */
-OP(op,8b) { ADC(cpustate->_E); } /* ADC A,E */
-OP(op,8c) { ADC(cpustate->_H); } /* ADC A,H */
-OP(op,8d) { ADC(cpustate->_L); } /* ADC A,L */
-OP(op,8e) { ADC(RM(cpustate, cpustate->_HL)); } /* ADC A,(HL) */
-OP(op,8f) { ADC(cpustate->_A); } /* ADC A,A */
-
-OP(op,90) { SUB(cpustate->_B); } /* SUB B */
-OP(op,91) { SUB(cpustate->_C); } /* SUB C */
-OP(op,92) { SUB(cpustate->_D); } /* SUB D */
-OP(op,93) { SUB(cpustate->_E); } /* SUB E */
-OP(op,94) { SUB(cpustate->_H); } /* SUB H */
-OP(op,95) { SUB(cpustate->_L); } /* SUB L */
-OP(op,96) { SUB(RM(cpustate, cpustate->_HL)); } /* SUB (HL) */
-OP(op,97) { SUB(cpustate->_A); } /* SUB A */
-
-OP(op,98) { SBC(cpustate->_B); } /* SBC A,B */
-OP(op,99) { SBC(cpustate->_C); } /* SBC A,C */
-OP(op,9a) { SBC(cpustate->_D); } /* SBC A,D */
-OP(op,9b) { SBC(cpustate->_E); } /* SBC A,E */
-OP(op,9c) { SBC(cpustate->_H); } /* SBC A,H */
-OP(op,9d) { SBC(cpustate->_L); } /* SBC A,L */
-OP(op,9e) { SBC(RM(cpustate, cpustate->_HL)); } /* SBC A,(HL) */
-OP(op,9f) { SBC(cpustate->_A); } /* SBC A,A */
-
-OP(op,a0) { AND(cpustate->_B); } /* AND B */
-OP(op,a1) { AND(cpustate->_C); } /* AND C */
-OP(op,a2) { AND(cpustate->_D); } /* AND D */
-OP(op,a3) { AND(cpustate->_E); } /* AND E */
-OP(op,a4) { AND(cpustate->_H); } /* AND H */
-OP(op,a5) { AND(cpustate->_L); } /* AND L */
-OP(op,a6) { AND(RM(cpustate, cpustate->_HL)); } /* AND (HL) */
-OP(op,a7) { AND(cpustate->_A); } /* AND A */
-
-OP(op,a8) { XOR(cpustate->_B); } /* XOR B */
-OP(op,a9) { XOR(cpustate->_C); } /* XOR C */
-OP(op,aa) { XOR(cpustate->_D); } /* XOR D */
-OP(op,ab) { XOR(cpustate->_E); } /* XOR E */
-OP(op,ac) { XOR(cpustate->_H); } /* XOR H */
-OP(op,ad) { XOR(cpustate->_L); } /* XOR L */
-OP(op,ae) { XOR(RM(cpustate, cpustate->_HL)); } /* XOR (HL) */
-OP(op,af) { XOR(cpustate->_A); } /* XOR A */
-
-OP(op,b0) { OR(cpustate->_B); } /* OR B */
-OP(op,b1) { OR(cpustate->_C); } /* OR C */
-OP(op,b2) { OR(cpustate->_D); } /* OR D */
-OP(op,b3) { OR(cpustate->_E); } /* OR E */
-OP(op,b4) { OR(cpustate->_H); } /* OR H */
-OP(op,b5) { OR(cpustate->_L); } /* OR L */
-OP(op,b6) { OR(RM(cpustate, cpustate->_HL)); } /* OR (HL) */
-OP(op,b7) { OR(cpustate->_A); } /* OR A */
-
-OP(op,b8) { CP(cpustate->_B); } /* CP B */
-OP(op,b9) { CP(cpustate->_C); } /* CP C */
-OP(op,ba) { CP(cpustate->_D); } /* CP D */
-OP(op,bb) { CP(cpustate->_E); } /* CP E */
-OP(op,bc) { CP(cpustate->_H); } /* CP H */
-OP(op,bd) { CP(cpustate->_L); } /* CP L */
-OP(op,be) { CP(RM(cpustate, cpustate->_HL)); } /* CP (HL) */
-OP(op,bf) { CP(cpustate->_A); } /* CP A */
-
-OP(op,c0) { RET_COND( !(cpustate->_F & ZF), 0xc0 ); } /* RET NZ */
-OP(op,c1) { POP(cpustate, BC); } /* POP BC */
-OP(op,c2) { JP_COND( !(cpustate->_F & ZF) ); } /* JP NZ,a */
-OP(op,c3) { JP; } /* JP a */
-OP(op,c4) { CALL_COND( !(cpustate->_F & ZF), 0xc4 ); } /* CALL NZ,a */
-OP(op,c5) { PUSH(cpustate, BC ); } /* PUSH BC */
-OP(op,c6) { ADD(ARG(cpustate)); } /* ADD A,n */
-OP(op,c7) { RST(0x00); } /* RST 0 */
-
-OP(op,c8) { RET_COND( cpustate->_F & ZF, 0xc8 ); } /* RET Z */
-OP(op,c9) { POP(cpustate, PC); } /* RET */
-OP(op,ca) { JP_COND( cpustate->_F & ZF ); } /* JP Z,a */
-OP(op,cb) { cpustate->R++; cpustate->extra_cycles += exec_cb(cpustate,ROP(cpustate)); } /* **** CB xx */
-OP(op,cc) { CALL_COND( cpustate->_F & ZF, 0xcc ); } /* CALL Z,a */
-OP(op,cd) { CALL(); } /* CALL a */
-OP(op,ce) { ADC(ARG(cpustate)); } /* ADC A,n */
-OP(op,cf) { RST(0x08); } /* RST 1 */
-
-OP(op,d0) { RET_COND( !(cpustate->_F & CF), 0xd0 ); } /* RET NC */
-OP(op,d1) { POP(cpustate, DE); } /* POP DE */
-OP(op,d2) { JP_COND( !(cpustate->_F & CF) ); } /* JP NC,a */
-OP(op,d3) { unsigned n = ARG(cpustate) | (cpustate->_A << 8); OUT( cpustate, n, cpustate->_A ); } /* OUT (n),A */
-OP(op,d4) { CALL_COND( !(cpustate->_F & CF), 0xd4 ); } /* CALL NC,a */
-OP(op,d5) { PUSH(cpustate, DE ); } /* PUSH DE */
-OP(op,d6) { SUB(ARG(cpustate)); } /* SUB n */
-OP(op,d7) { RST(0x10); } /* RST 2 */
-
-OP(op,d8) { RET_COND( cpustate->_F & CF, 0xd8 ); } /* RET C */
-OP(op,d9) { EXX; } /* EXX */
-OP(op,da) { JP_COND( cpustate->_F & CF ); } /* JP C,a */
-OP(op,db) { unsigned n = ARG(cpustate) | (cpustate->_A << 8); cpustate->_A = IN( cpustate, n ); } /* IN A,(n) */
-OP(op,dc) { CALL_COND( cpustate->_F & CF, 0xdc ); } /* CALL C,a */
-OP(op,dd) { cpustate->R++; cpustate->extra_cycles += exec_dd(cpustate,ROP(cpustate)); } /* **** DD xx */
-OP(op,de) { SBC(ARG(cpustate)); } /* SBC A,n */
-OP(op,df) { RST(0x18); } /* RST 3 */
-
-OP(op,e0) { RET_COND( !(cpustate->_F & PF), 0xe0 ); } /* RET PO */
-OP(op,e1) { POP(cpustate, HL); } /* POP HL */
-OP(op,e2) { JP_COND( !(cpustate->_F & PF) ); } /* JP PO,a */
-OP(op,e3) { EXSP(HL); } /* EX HL,(SP) */
-OP(op,e4) { CALL_COND( !(cpustate->_F & PF), 0xe4 ); } /* CALL PO,a */
-OP(op,e5) { PUSH(cpustate, HL ); } /* PUSH HL */
-OP(op,e6) { AND(ARG(cpustate)); } /* AND n */
-OP(op,e7) { RST(0x20); } /* RST 4 */
-
-OP(op,e8) { RET_COND( cpustate->_F & PF, 0xe8 ); } /* RET PE */
-OP(op,e9) { cpustate->_PC = cpustate->_HL; } /* JP (HL) */
-OP(op,ea) { JP_COND( cpustate->_F & PF ); } /* JP PE,a */
-OP(op,eb) { EX_DE_HL; } /* EX DE,HL */
-OP(op,ec) { CALL_COND( cpustate->_F & PF, 0xec ); } /* CALL PE,a */
-OP(op,ed) { cpustate->R++; cpustate->extra_cycles += exec_ed(cpustate,ROP(cpustate)); } /* **** ED xx */
-OP(op,ee) { XOR(ARG(cpustate)); } /* XOR n */
-OP(op,ef) { RST(0x28); } /* RST 5 */
-
-OP(op,f0) { RET_COND( !(cpustate->_F & SF), 0xf0 ); } /* RET P */
-OP(op,f1) { POP(cpustate, AF); } /* POP AF */
-OP(op,f2) { JP_COND( !(cpustate->_F & SF) ); } /* JP P,a */
-OP(op,f3) { cpustate->IFF1 = cpustate->IFF2 = 0; } /* DI */
-OP(op,f4) { CALL_COND( !(cpustate->_F & SF), 0xf4 ); } /* CALL P,a */
-OP(op,f5) { PUSH(cpustate, AF ); } /* PUSH AF */
-OP(op,f6) { OR(ARG(cpustate)); } /* OR n */
-OP(op,f7) { RST(0x30); } /* RST 6 */
-
-OP(op,f8) { RET_COND( cpustate->_F & SF, 0xf8 ); } /* RET M */
-OP(op,f9) { cpustate->_SP = cpustate->_HL; } /* LD SP,HL */
-OP(op,fa) { JP_COND(cpustate->_F & SF); } /* JP M,a */
-OP(op,fb) { EI; } /* EI */
-OP(op,fc) { CALL_COND( cpustate->_F & SF, 0xfc ); } /* CALL M,a */
-OP(op,fd) { cpustate->R++; cpustate->extra_cycles += exec_fd(cpustate,ROP(cpustate)); } /* **** FD xx */
-OP(op,fe) { CP(ARG(cpustate)); } /* CP n */
-OP(op,ff) { RST(0x38); } /* RST 7 */
+OP(op,40) { } /* LD B,B */
+OP(op,41) { cpustate->_B = cpustate->_C; } /* LD B,C */
+OP(op,42) { cpustate->_B = cpustate->_D; } /* LD B,D */
+OP(op,43) { cpustate->_B = cpustate->_E; } /* LD B,E */
+OP(op,44) { cpustate->_B = cpustate->_H; } /* LD B,H */
+OP(op,45) { cpustate->_B = cpustate->_L; } /* LD B,L */
+OP(op,46) { cpustate->_B = RM(cpustate, cpustate->_HL); } /* LD B,(HL) */
+OP(op,47) { cpustate->_B = cpustate->_A; } /* LD B,A */
+
+OP(op,48) { cpustate->_C = cpustate->_B; } /* LD C,B */
+OP(op,49) { } /* LD C,C */
+OP(op,4a) { cpustate->_C = cpustate->_D; } /* LD C,D */
+OP(op,4b) { cpustate->_C = cpustate->_E; } /* LD C,E */
+OP(op,4c) { cpustate->_C = cpustate->_H; } /* LD C,H */
+OP(op,4d) { cpustate->_C = cpustate->_L; } /* LD C,L */
+OP(op,4e) { cpustate->_C = RM(cpustate, cpustate->_HL); } /* LD C,(HL) */
+OP(op,4f) { cpustate->_C = cpustate->_A; } /* LD C,A */
+
+OP(op,50) { cpustate->_D = cpustate->_B; } /* LD D,B */
+OP(op,51) { cpustate->_D = cpustate->_C; } /* LD D,C */
+OP(op,52) { } /* LD D,D */
+OP(op,53) { cpustate->_D = cpustate->_E; } /* LD D,E */
+OP(op,54) { cpustate->_D = cpustate->_H; } /* LD D,H */
+OP(op,55) { cpustate->_D = cpustate->_L; } /* LD D,L */
+OP(op,56) { cpustate->_D = RM(cpustate, cpustate->_HL); } /* LD D,(HL) */
+OP(op,57) { cpustate->_D = cpustate->_A; } /* LD D,A */
+
+OP(op,58) { cpustate->_E = cpustate->_B; } /* LD E,B */
+OP(op,59) { cpustate->_E = cpustate->_C; } /* LD E,C */
+OP(op,5a) { cpustate->_E = cpustate->_D; } /* LD E,D */
+OP(op,5b) { } /* LD E,E */
+OP(op,5c) { cpustate->_E = cpustate->_H; } /* LD E,H */
+OP(op,5d) { cpustate->_E = cpustate->_L; } /* LD E,L */
+OP(op,5e) { cpustate->_E = RM(cpustate, cpustate->_HL); } /* LD E,(HL) */
+OP(op,5f) { cpustate->_E = cpustate->_A; } /* LD E,A */
+
+OP(op,60) { cpustate->_H = cpustate->_B; } /* LD H,B */
+OP(op,61) { cpustate->_H = cpustate->_C; } /* LD H,C */
+OP(op,62) { cpustate->_H = cpustate->_D; } /* LD H,D */
+OP(op,63) { cpustate->_H = cpustate->_E; } /* LD H,E */
+OP(op,64) { } /* LD H,H */
+OP(op,65) { cpustate->_H = cpustate->_L; } /* LD H,L */
+OP(op,66) { cpustate->_H = RM(cpustate, cpustate->_HL); } /* LD H,(HL) */
+OP(op,67) { cpustate->_H = cpustate->_A; } /* LD H,A */
+
+OP(op,68) { cpustate->_L = cpustate->_B; } /* LD L,B */
+OP(op,69) { cpustate->_L = cpustate->_C; } /* LD L,C */
+OP(op,6a) { cpustate->_L = cpustate->_D; } /* LD L,D */
+OP(op,6b) { cpustate->_L = cpustate->_E; } /* LD L,E */
+OP(op,6c) { cpustate->_L = cpustate->_H; } /* LD L,H */
+OP(op,6d) { } /* LD L,L */
+OP(op,6e) { cpustate->_L = RM(cpustate, cpustate->_HL); } /* LD L,(HL) */
+OP(op,6f) { cpustate->_L = cpustate->_A; } /* LD L,A */
+
+OP(op,70) { WM(cpustate, cpustate->_HL, cpustate->_B ); } /* LD (HL),B */
+OP(op,71) { WM(cpustate, cpustate->_HL, cpustate->_C ); } /* LD (HL),C */
+OP(op,72) { WM(cpustate, cpustate->_HL, cpustate->_D ); } /* LD (HL),D */
+OP(op,73) { WM(cpustate, cpustate->_HL, cpustate->_E ); } /* LD (HL),E */
+OP(op,74) { WM(cpustate, cpustate->_HL, cpustate->_H ); } /* LD (HL),H */
+OP(op,75) { WM(cpustate, cpustate->_HL, cpustate->_L ); } /* LD (HL),L */
+OP(op,76) { ENTER_HALT(cpustate); } /* HALT */
+OP(op,77) { WM(cpustate, cpustate->_HL, cpustate->_A ); } /* LD (HL),A */
+
+OP(op,78) { cpustate->_A = cpustate->_B; } /* LD A,B */
+OP(op,79) { cpustate->_A = cpustate->_C; } /* LD A,C */
+OP(op,7a) { cpustate->_A = cpustate->_D; } /* LD A,D */
+OP(op,7b) { cpustate->_A = cpustate->_E; } /* LD A,E */
+OP(op,7c) { cpustate->_A = cpustate->_H; } /* LD A,H */
+OP(op,7d) { cpustate->_A = cpustate->_L; } /* LD A,L */
+OP(op,7e) { cpustate->_A = RM(cpustate, cpustate->_HL); } /* LD A,(HL) */
+OP(op,7f) { } /* LD A,A */
+
+OP(op,80) { ADD(cpustate->_B); } /* ADD A,B */
+OP(op,81) { ADD(cpustate->_C); } /* ADD A,C */
+OP(op,82) { ADD(cpustate->_D); } /* ADD A,D */
+OP(op,83) { ADD(cpustate->_E); } /* ADD A,E */
+OP(op,84) { ADD(cpustate->_H); } /* ADD A,H */
+OP(op,85) { ADD(cpustate->_L); } /* ADD A,L */
+OP(op,86) { ADD(RM(cpustate, cpustate->_HL)); } /* ADD A,(HL) */
+OP(op,87) { ADD(cpustate->_A); } /* ADD A,A */
+
+OP(op,88) { ADC(cpustate->_B); } /* ADC A,B */
+OP(op,89) { ADC(cpustate->_C); } /* ADC A,C */
+OP(op,8a) { ADC(cpustate->_D); } /* ADC A,D */
+OP(op,8b) { ADC(cpustate->_E); } /* ADC A,E */
+OP(op,8c) { ADC(cpustate->_H); } /* ADC A,H */
+OP(op,8d) { ADC(cpustate->_L); } /* ADC A,L */
+OP(op,8e) { ADC(RM(cpustate, cpustate->_HL)); } /* ADC A,(HL) */
+OP(op,8f) { ADC(cpustate->_A); } /* ADC A,A */
+
+OP(op,90) { SUB(cpustate->_B); } /* SUB B */
+OP(op,91) { SUB(cpustate->_C); } /* SUB C */
+OP(op,92) { SUB(cpustate->_D); } /* SUB D */
+OP(op,93) { SUB(cpustate->_E); } /* SUB E */
+OP(op,94) { SUB(cpustate->_H); } /* SUB H */
+OP(op,95) { SUB(cpustate->_L); } /* SUB L */
+OP(op,96) { SUB(RM(cpustate, cpustate->_HL)); } /* SUB (HL) */
+OP(op,97) { SUB(cpustate->_A); } /* SUB A */
+
+OP(op,98) { SBC(cpustate->_B); } /* SBC A,B */
+OP(op,99) { SBC(cpustate->_C); } /* SBC A,C */
+OP(op,9a) { SBC(cpustate->_D); } /* SBC A,D */
+OP(op,9b) { SBC(cpustate->_E); } /* SBC A,E */
+OP(op,9c) { SBC(cpustate->_H); } /* SBC A,H */
+OP(op,9d) { SBC(cpustate->_L); } /* SBC A,L */
+OP(op,9e) { SBC(RM(cpustate, cpustate->_HL)); } /* SBC A,(HL) */
+OP(op,9f) { SBC(cpustate->_A); } /* SBC A,A */
+
+OP(op,a0) { AND(cpustate->_B); } /* AND B */
+OP(op,a1) { AND(cpustate->_C); } /* AND C */
+OP(op,a2) { AND(cpustate->_D); } /* AND D */
+OP(op,a3) { AND(cpustate->_E); } /* AND E */
+OP(op,a4) { AND(cpustate->_H); } /* AND H */
+OP(op,a5) { AND(cpustate->_L); } /* AND L */
+OP(op,a6) { AND(RM(cpustate, cpustate->_HL)); } /* AND (HL) */
+OP(op,a7) { AND(cpustate->_A); } /* AND A */
+
+OP(op,a8) { XOR(cpustate->_B); } /* XOR B */
+OP(op,a9) { XOR(cpustate->_C); } /* XOR C */
+OP(op,aa) { XOR(cpustate->_D); } /* XOR D */
+OP(op,ab) { XOR(cpustate->_E); } /* XOR E */
+OP(op,ac) { XOR(cpustate->_H); } /* XOR H */
+OP(op,ad) { XOR(cpustate->_L); } /* XOR L */
+OP(op,ae) { XOR(RM(cpustate, cpustate->_HL)); } /* XOR (HL) */
+OP(op,af) { XOR(cpustate->_A); } /* XOR A */
+
+OP(op,b0) { OR(cpustate->_B); } /* OR B */
+OP(op,b1) { OR(cpustate->_C); } /* OR C */
+OP(op,b2) { OR(cpustate->_D); } /* OR D */
+OP(op,b3) { OR(cpustate->_E); } /* OR E */
+OP(op,b4) { OR(cpustate->_H); } /* OR H */
+OP(op,b5) { OR(cpustate->_L); } /* OR L */
+OP(op,b6) { OR(RM(cpustate, cpustate->_HL)); } /* OR (HL) */
+OP(op,b7) { OR(cpustate->_A); } /* OR A */
+
+OP(op,b8) { CP(cpustate->_B); } /* CP B */
+OP(op,b9) { CP(cpustate->_C); } /* CP C */
+OP(op,ba) { CP(cpustate->_D); } /* CP D */
+OP(op,bb) { CP(cpustate->_E); } /* CP E */
+OP(op,bc) { CP(cpustate->_H); } /* CP H */
+OP(op,bd) { CP(cpustate->_L); } /* CP L */
+OP(op,be) { CP(RM(cpustate, cpustate->_HL)); } /* CP (HL) */
+OP(op,bf) { CP(cpustate->_A); } /* CP A */
+
+OP(op,c0) { RET_COND( !(cpustate->_F & ZF), 0xc0 ); } /* RET NZ */
+OP(op,c1) { POP(cpustate, BC); } /* POP BC */
+OP(op,c2) { JP_COND( !(cpustate->_F & ZF) ); } /* JP NZ,a */
+OP(op,c3) { JP; } /* JP a */
+OP(op,c4) { CALL_COND( !(cpustate->_F & ZF), 0xc4 ); } /* CALL NZ,a */
+OP(op,c5) { PUSH(cpustate, BC ); } /* PUSH BC */
+OP(op,c6) { ADD(ARG(cpustate)); } /* ADD A,n */
+OP(op,c7) { RST(0x00); } /* RST 0 */
+
+OP(op,c8) { RET_COND( cpustate->_F & ZF, 0xc8 ); } /* RET Z */
+OP(op,c9) { POP(cpustate, PC); } /* RET */
+OP(op,ca) { JP_COND( cpustate->_F & ZF ); } /* JP Z,a */
+OP(op,cb) { cpustate->R++; cpustate->extra_cycles += exec_cb(cpustate,ROP(cpustate)); } /* **** CB xx */
+OP(op,cc) { CALL_COND( cpustate->_F & ZF, 0xcc ); } /* CALL Z,a */
+OP(op,cd) { CALL(); } /* CALL a */
+OP(op,ce) { ADC(ARG(cpustate)); } /* ADC A,n */
+OP(op,cf) { RST(0x08); } /* RST 1 */
+
+OP(op,d0) { RET_COND( !(cpustate->_F & CF), 0xd0 ); } /* RET NC */
+OP(op,d1) { POP(cpustate, DE); } /* POP DE */
+OP(op,d2) { JP_COND( !(cpustate->_F & CF) ); } /* JP NC,a */
+OP(op,d3) { unsigned n = ARG(cpustate) | (cpustate->_A << 8); OUT( cpustate, n, cpustate->_A ); } /* OUT (n),A */
+OP(op,d4) { CALL_COND( !(cpustate->_F & CF), 0xd4 ); } /* CALL NC,a */
+OP(op,d5) { PUSH(cpustate, DE ); } /* PUSH DE */
+OP(op,d6) { SUB(ARG(cpustate)); } /* SUB n */
+OP(op,d7) { RST(0x10); } /* RST 2 */
+
+OP(op,d8) { RET_COND( cpustate->_F & CF, 0xd8 ); } /* RET C */
+OP(op,d9) { EXX; } /* EXX */
+OP(op,da) { JP_COND( cpustate->_F & CF ); } /* JP C,a */
+OP(op,db) { unsigned n = ARG(cpustate) | (cpustate->_A << 8); cpustate->_A = IN( cpustate, n ); } /* IN A,(n) */
+OP(op,dc) { CALL_COND( cpustate->_F & CF, 0xdc ); } /* CALL C,a */
+OP(op,dd) { cpustate->R++; cpustate->extra_cycles += exec_dd(cpustate,ROP(cpustate)); } /* **** DD xx */
+OP(op,de) { SBC(ARG(cpustate)); } /* SBC A,n */
+OP(op,df) { RST(0x18); } /* RST 3 */
+
+OP(op,e0) { RET_COND( !(cpustate->_F & PF), 0xe0 ); } /* RET PO */
+OP(op,e1) { POP(cpustate, HL); } /* POP HL */
+OP(op,e2) { JP_COND( !(cpustate->_F & PF) ); } /* JP PO,a */
+OP(op,e3) { EXSP(HL); } /* EX HL,(SP) */
+OP(op,e4) { CALL_COND( !(cpustate->_F & PF), 0xe4 ); } /* CALL PO,a */
+OP(op,e5) { PUSH(cpustate, HL ); } /* PUSH HL */
+OP(op,e6) { AND(ARG(cpustate)); } /* AND n */
+OP(op,e7) { RST(0x20); } /* RST 4 */
+
+OP(op,e8) { RET_COND( cpustate->_F & PF, 0xe8 ); } /* RET PE */
+OP(op,e9) { cpustate->_PC = cpustate->_HL; } /* JP (HL) */
+OP(op,ea) { JP_COND( cpustate->_F & PF ); } /* JP PE,a */
+OP(op,eb) { EX_DE_HL; } /* EX DE,HL */
+OP(op,ec) { CALL_COND( cpustate->_F & PF, 0xec ); } /* CALL PE,a */
+OP(op,ed) { cpustate->R++; cpustate->extra_cycles += exec_ed(cpustate,ROP(cpustate)); } /* **** ED xx */
+OP(op,ee) { XOR(ARG(cpustate)); } /* XOR n */
+OP(op,ef) { RST(0x28); } /* RST 5 */
+
+OP(op,f0) { RET_COND( !(cpustate->_F & SF), 0xf0 ); } /* RET P */
+OP(op,f1) { POP(cpustate, AF); } /* POP AF */
+OP(op,f2) { JP_COND( !(cpustate->_F & SF) ); } /* JP P,a */
+OP(op,f3) { cpustate->IFF1 = cpustate->IFF2 = 0; } /* DI */
+OP(op,f4) { CALL_COND( !(cpustate->_F & SF), 0xf4 ); } /* CALL P,a */
+OP(op,f5) { PUSH(cpustate, AF ); } /* PUSH AF */
+OP(op,f6) { OR(ARG(cpustate)); } /* OR n */
+OP(op,f7) { RST(0x30); } /* RST 6 */
+
+OP(op,f8) { RET_COND( cpustate->_F & SF, 0xf8 ); } /* RET M */
+OP(op,f9) { cpustate->_SP = cpustate->_HL; } /* LD SP,HL */
+OP(op,fa) { JP_COND(cpustate->_F & SF); } /* JP M,a */
+OP(op,fb) { EI; } /* EI */
+OP(op,fc) { CALL_COND( cpustate->_F & SF, 0xfc ); } /* CALL M,a */
+OP(op,fd) { cpustate->R++; cpustate->extra_cycles += exec_fd(cpustate,ROP(cpustate)); } /* **** FD xx */
+OP(op,fe) { CP(ARG(cpustate)); } /* CP n */
+OP(op,ff) { RST(0x38); } /* RST 7 */
static int take_interrupt(z180_state *cpustate, int irq)
@@ -346,18 +346,18 @@ static int take_interrupt(z180_state *cpustate, int irq)
LOG(("Z180 '%s' IM0 $%04x\n",cpustate->device->tag() , irq_vector));
switch (irq_vector & 0xff0000)
{
- case 0xcd0000: /* call */
+ case 0xcd0000: /* call */
PUSH(cpustate, PC );
cpustate->_PCD = irq_vector & 0xffff;
/* CALL $xxxx + 'interrupt latency' cycles */
cycles += cpustate->cc[Z180_TABLE_op][0xcd] - cpustate->cc[Z180_TABLE_ex][0xff];
break;
- case 0xc30000: /* jump */
+ case 0xc30000: /* jump */
cpustate->_PCD = irq_vector & 0xffff;
/* JP $xxxx + 2 cycles */
cycles += cpustate->cc[Z180_TABLE_op][0xc3] - cpustate->cc[Z180_TABLE_ex][0xff];
break;
- default: /* rst (or other opcodes?) */
+ default: /* rst (or other opcodes?) */
PUSH(cpustate, PC );
cpustate->_PCD = irq_vector & 0x0038;
/* RST $xx + 2 cycles */
@@ -379,4 +379,3 @@ static int take_interrupt(z180_state *cpustate, int irq)
return cycles;
}
-
diff --git a/src/emu/cpu/z180/z180ops.h b/src/emu/cpu/z180/z180ops.h
index b2efef210cb..ff9f476a2e3 100644
--- a/src/emu/cpu/z180/z180ops.h
+++ b/src/emu/cpu/z180/z180ops.h
@@ -1,35 +1,35 @@
/***************************************************************
* Enter HALT state; write 1 to fake port on first execution
***************************************************************/
-#define ENTER_HALT(cs) { \
- (cs)->_PC--; \
- (cs)->HALT = 1; \
+#define ENTER_HALT(cs) { \
+ (cs)->_PC--; \
+ (cs)->HALT = 1; \
}
/***************************************************************
* Leave HALT state; write 0 to fake port
***************************************************************/
-#define LEAVE_HALT(cs) { \
- if( (cs)->HALT ) \
- { \
- (cs)->HALT = 0; \
- (cs)->_PC++; \
- } \
+#define LEAVE_HALT(cs) { \
+ if( (cs)->HALT ) \
+ { \
+ (cs)->HALT = 0; \
+ (cs)->_PC++; \
+ } \
}
/***************************************************************
* Input a byte from given I/O port
***************************************************************/
-#define IN(cs,port) \
- (((port ^ (cs)->IO_IOCR) & 0xffc0) == 0) ? \
+#define IN(cs,port) \
+ (((port ^ (cs)->IO_IOCR) & 0xffc0) == 0) ? \
z180_readcontrol(cs, port) : (cs)->iospace->read_byte(port)
/***************************************************************
* Output a byte to given I/O port
***************************************************************/
-#define OUT(cs,port,value) \
- if (((port ^ (cs)->IO_IOCR) & 0xffc0) == 0) \
- z180_writecontrol(cs,port,value); \
+#define OUT(cs,port,value) \
+ if (((port ^ (cs)->IO_IOCR) & 0xffc0) == 0) \
+ z180_writecontrol(cs,port,value); \
else (cs)->iospace->write_byte(port,value)
/***************************************************************
@@ -66,7 +66,7 @@ INLINE void z180_mmu(z180_state *cpustate)
/***************************************************************
* Read a byte from given memory location
***************************************************************/
-#define RM(cs,addr) (cs)->program->read_byte(MMU_REMAP_ADDR(cs,addr))
+#define RM(cs,addr) (cs)->program->read_byte(MMU_REMAP_ADDR(cs,addr))
#ifdef UNUSED_FUNCTION
UINT8 z180_readmem(device_t *device, offs_t offset)
{
@@ -157,134 +157,134 @@ INLINE UINT32 ARG16(z180_state *cpustate)
/***************************************************************
* JP
***************************************************************/
-#define JP { \
- cpustate->_PCD = ARG16(cpustate); \
+#define JP { \
+ cpustate->_PCD = ARG16(cpustate); \
}
/***************************************************************
* JP_COND
***************************************************************/
-#define JP_COND(cond) \
- if( cond ) \
- { \
- cpustate->_PCD = ARG16(cpustate); \
- } \
- else \
- { \
- cpustate->_PC += 2; \
+#define JP_COND(cond) \
+ if( cond ) \
+ { \
+ cpustate->_PCD = ARG16(cpustate); \
+ } \
+ else \
+ { \
+ cpustate->_PC += 2; \
}
/***************************************************************
* JR
***************************************************************/
-#define JR() \
-{ \
- INT8 arg = (INT8)ARG(cpustate); /* ARG(cpustate) also increments cpustate->_PC */ \
- cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \
+#define JR() \
+{ \
+ INT8 arg = (INT8)ARG(cpustate); /* ARG(cpustate) also increments cpustate->_PC */ \
+ cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \
}
/***************************************************************
* JR_COND
***************************************************************/
-#define JR_COND(cond,opcode) \
- if( cond ) \
- { \
+#define JR_COND(cond,opcode) \
+ if( cond ) \
+ { \
INT8 arg = (INT8)ARG(cpustate); /* ARG(cpustate) also increments cpustate->_PC */ \
- cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \
- CC(ex,opcode); \
- } \
- else cpustate->_PC++; \
+ cpustate->_PC += arg; /* so don't do cpustate->_PC += ARG(cpustate) */ \
+ CC(ex,opcode); \
+ } \
+ else cpustate->_PC++; \
/***************************************************************
* CALL
***************************************************************/
-#define CALL() \
- cpustate->ea = ARG16(cpustate); \
- PUSH(cpustate, PC ); \
+#define CALL() \
+ cpustate->ea = ARG16(cpustate); \
+ PUSH(cpustate, PC ); \
cpustate->_PCD = cpustate->ea;
/***************************************************************
* CALL_COND
***************************************************************/
-#define CALL_COND(cond,opcode) \
- if( cond ) \
- { \
- cpustate->ea = ARG16(cpustate); \
- PUSH(cpustate, PC ); \
- cpustate->_PCD = cpustate->ea; \
- CC(ex,opcode); \
- } \
- else \
- { \
- cpustate->_PC+=2; \
+#define CALL_COND(cond,opcode) \
+ if( cond ) \
+ { \
+ cpustate->ea = ARG16(cpustate); \
+ PUSH(cpustate, PC ); \
+ cpustate->_PCD = cpustate->ea; \
+ CC(ex,opcode); \
+ } \
+ else \
+ { \
+ cpustate->_PC+=2; \
}
/***************************************************************
* RET_COND
***************************************************************/
-#define RET_COND(cond,opcode) \
- if( cond ) \
- { \
- POP(cpustate, PC); \
- CC(ex,opcode); \
+#define RET_COND(cond,opcode) \
+ if( cond ) \
+ { \
+ POP(cpustate, PC); \
+ CC(ex,opcode); \
}
/***************************************************************
* RETN
***************************************************************/
-#define RETN { \
+#define RETN { \
LOG(("Z180 '%s' RETN IFF1:%d IFF2:%d\n", cpustate->device->tag(), cpustate->IFF1, cpustate->IFF2)); \
- POP(cpustate, PC); \
- cpustate->IFF1 = cpustate->IFF2; \
+ POP(cpustate, PC); \
+ cpustate->IFF1 = cpustate->IFF2; \
}
/***************************************************************
* RETI
***************************************************************/
-#define RETI { \
- POP(cpustate, PC); \
-/* according to http://www.msxnet.org/tech/Z80/z80undoc.txt */ \
-/* cpustate->IFF1 = cpustate->IFF2; */ \
- cpustate->daisy.call_reti_device(); \
+#define RETI { \
+ POP(cpustate, PC); \
+/* according to http://www.msxnet.org/tech/Z80/z80undoc.txt */ \
+/* cpustate->IFF1 = cpustate->IFF2; */ \
+ cpustate->daisy.call_reti_device(); \
}
/***************************************************************
* LD R,A
***************************************************************/
-#define LD_R_A { \
- cpustate->R = cpustate->_A; \
- cpustate->R2 = cpustate->_A & 0x80; /* keep bit 7 of R */ \
+#define LD_R_A { \
+ cpustate->R = cpustate->_A; \
+ cpustate->R2 = cpustate->_A & 0x80; /* keep bit 7 of R */ \
}
/***************************************************************
* LD A,R
***************************************************************/
-#define LD_A_R { \
- cpustate->_A = (cpustate->R & 0x7f) | cpustate->R2; \
- cpustate->_F = (cpustate->_F & CF) | SZ[cpustate->_A] | ( cpustate->IFF2 << 2 ); \
+#define LD_A_R { \
+ cpustate->_A = (cpustate->R & 0x7f) | cpustate->R2; \
+ cpustate->_F = (cpustate->_F & CF) | SZ[cpustate->_A] | ( cpustate->IFF2 << 2 ); \
}
/***************************************************************
* LD I,A
***************************************************************/
-#define LD_I_A { \
- cpustate->I = cpustate->_A; \
+#define LD_I_A { \
+ cpustate->I = cpustate->_A; \
}
/***************************************************************
* LD A,I
***************************************************************/
-#define LD_A_I { \
- cpustate->_A = cpustate->I; \
- cpustate->_F = (cpustate->_F & CF) | SZ[cpustate->_A] | ( cpustate->IFF2 << 2 ); \
+#define LD_A_I { \
+ cpustate->_A = cpustate->I; \
+ cpustate->_F = (cpustate->_F & CF) | SZ[cpustate->_A] | ( cpustate->IFF2 << 2 ); \
}
/***************************************************************
* RST
***************************************************************/
-#define RST(addr) \
- PUSH(cpustate, PC ); \
+#define RST(addr) \
+ PUSH(cpustate, PC ); \
cpustate->_PCD = addr;
/***************************************************************
@@ -310,234 +310,234 @@ INLINE UINT8 DEC(z180_state *cpustate, UINT8 value)
/***************************************************************
* RLCA
***************************************************************/
-#define RLCA \
- cpustate->_A = (cpustate->_A << 1) | (cpustate->_A >> 7); \
+#define RLCA \
+ cpustate->_A = (cpustate->_A << 1) | (cpustate->_A >> 7); \
cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | (cpustate->_A & (YF | XF | CF))
/***************************************************************
* RRCA
***************************************************************/
-#define RRCA \
- cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | (cpustate->_A & (YF | XF | CF)); \
+#define RRCA \
+ cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | (cpustate->_A & (YF | XF | CF)); \
cpustate->_A = (cpustate->_A >> 1) | (cpustate->_A << 7)
/***************************************************************
* RLA
***************************************************************/
-#define RLA { \
- UINT8 res = (cpustate->_A << 1) | (cpustate->_F & CF); \
- UINT8 c = (cpustate->_A & 0x80) ? CF : 0; \
- cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
- cpustate->_A = res; \
+#define RLA { \
+ UINT8 res = (cpustate->_A << 1) | (cpustate->_F & CF); \
+ UINT8 c = (cpustate->_A & 0x80) ? CF : 0; \
+ cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
+ cpustate->_A = res; \
}
/***************************************************************
* RRA
***************************************************************/
-#define RRA { \
- UINT8 res = (cpustate->_A >> 1) | (cpustate->_F << 7); \
- UINT8 c = (cpustate->_A & 0x01) ? CF : 0; \
- cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
- cpustate->_A = res; \
+#define RRA { \
+ UINT8 res = (cpustate->_A >> 1) | (cpustate->_F << 7); \
+ UINT8 c = (cpustate->_A & 0x01) ? CF : 0; \
+ cpustate->_F = (cpustate->_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
+ cpustate->_A = res; \
}
/***************************************************************
* RRD
***************************************************************/
-#define RRD { \
- UINT8 n = RM(cpustate, cpustate->_HL); \
- WM(cpustate, cpustate->_HL, (n >> 4) | (cpustate->_A << 4) ); \
- cpustate->_A = (cpustate->_A & 0xf0) | (n & 0x0f); \
- cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_A]; \
+#define RRD { \
+ UINT8 n = RM(cpustate, cpustate->_HL); \
+ WM(cpustate, cpustate->_HL, (n >> 4) | (cpustate->_A << 4) ); \
+ cpustate->_A = (cpustate->_A & 0xf0) | (n & 0x0f); \
+ cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_A]; \
}
/***************************************************************
* RLD
***************************************************************/
-#define RLD { \
- UINT8 n = RM(cpustate, cpustate->_HL); \
- WM(cpustate, cpustate->_HL, (n << 4) | (cpustate->_A & 0x0f) ); \
- cpustate->_A = (cpustate->_A & 0xf0) | (n >> 4); \
- cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_A]; \
+#define RLD { \
+ UINT8 n = RM(cpustate, cpustate->_HL); \
+ WM(cpustate, cpustate->_HL, (n << 4) | (cpustate->_A & 0x0f) ); \
+ cpustate->_A = (cpustate->_A & 0xf0) | (n >> 4); \
+ cpustate->_F = (cpustate->_F & CF) | SZP[cpustate->_A]; \
}
/***************************************************************
* ADD A,n
***************************************************************/
-#define ADD(value) \
-{ \
- UINT32 ah = cpustate->_AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) + value); \
- cpustate->_F = SZHVC_add[ah | res]; \
- cpustate->_A = res; \
+#define ADD(value) \
+{ \
+ UINT32 ah = cpustate->_AFD & 0xff00; \
+ UINT32 res = (UINT8)((ah >> 8) + value); \
+ cpustate->_F = SZHVC_add[ah | res]; \
+ cpustate->_A = res; \
}
/***************************************************************
* ADC A,n
***************************************************************/
-#define ADC(value) \
-{ \
- UINT32 ah = cpustate->_AFD & 0xff00, c = cpustate->_AFD & 1; \
- UINT32 res = (UINT8)((ah >> 8) + value + c); \
- cpustate->_F = SZHVC_add[(c << 16) | ah | res]; \
- cpustate->_A = res; \
+#define ADC(value) \
+{ \
+ UINT32 ah = cpustate->_AFD & 0xff00, c = cpustate->_AFD & 1; \
+ UINT32 res = (UINT8)((ah >> 8) + value + c); \
+ cpustate->_F = SZHVC_add[(c << 16) | ah | res]; \
+ cpustate->_A = res; \
}
/***************************************************************
* SUB n
***************************************************************/
-#define SUB(value) \
-{ \
- UINT32 ah = cpustate->_AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) - value); \
- cpustate->_F = SZHVC_sub[ah | res]; \
- cpustate->_A = res; \
+#define SUB(value) \
+{ \
+ UINT32 ah = cpustate->_AFD & 0xff00; \
+ UINT32 res = (UINT8)((ah >> 8) - value); \
+ cpustate->_F = SZHVC_sub[ah | res]; \
+ cpustate->_A = res; \
}
/***************************************************************
* SBC A,n
***************************************************************/
-#define SBC(value) \
-{ \
- UINT32 ah = cpustate->_AFD & 0xff00, c = cpustate->_AFD & 1; \
- UINT32 res = (UINT8)((ah >> 8) - value - c); \
- cpustate->_F = SZHVC_sub[(c<<16) | ah | res]; \
- cpustate->_A = res; \
+#define SBC(value) \
+{ \
+ UINT32 ah = cpustate->_AFD & 0xff00, c = cpustate->_AFD & 1; \
+ UINT32 res = (UINT8)((ah >> 8) - value - c); \
+ cpustate->_F = SZHVC_sub[(c<<16) | ah | res]; \
+ cpustate->_A = res; \
}
/***************************************************************
* NEG
***************************************************************/
-#define NEG { \
- UINT8 value = cpustate->_A; \
- cpustate->_A = 0; \
- SUB(value); \
+#define NEG { \
+ UINT8 value = cpustate->_A; \
+ cpustate->_A = 0; \
+ SUB(value); \
}
/***************************************************************
* DAA
***************************************************************/
-#define DAA { \
- UINT8 r = cpustate->_A; \
- if (cpustate->_F&NF) { \
- if ((cpustate->_F&HF)|((cpustate->_A&0xf)>9)) r-=6; \
- if ((cpustate->_F&CF)|(cpustate->_A>0x99)) r-=0x60; \
- } \
- else { \
- if ((cpustate->_F&HF)|((cpustate->_A&0xf)>9)) r+=6; \
- if ((cpustate->_F&CF)|(cpustate->_A>0x99)) r+=0x60; \
- } \
- cpustate->_F=(cpustate->_F&3)|(cpustate->_A>0x99)|((cpustate->_A^r)&HF)|SZP[r]; \
- cpustate->_A=r; \
+#define DAA { \
+ UINT8 r = cpustate->_A; \
+ if (cpustate->_F&NF) { \
+ if ((cpustate->_F&HF)|((cpustate->_A&0xf)>9)) r-=6; \
+ if ((cpustate->_F&CF)|(cpustate->_A>0x99)) r-=0x60; \
+ } \
+ else { \
+ if ((cpustate->_F&HF)|((cpustate->_A&0xf)>9)) r+=6; \
+ if ((cpustate->_F&CF)|(cpustate->_A>0x99)) r+=0x60; \
+ } \
+ cpustate->_F=(cpustate->_F&3)|(cpustate->_A>0x99)|((cpustate->_A^r)&HF)|SZP[r]; \
+ cpustate->_A=r; \
}
/***************************************************************
* AND n
***************************************************************/
-#define AND(value) \
- cpustate->_A &= value; \
+#define AND(value) \
+ cpustate->_A &= value; \
cpustate->_F = SZP[cpustate->_A] | HF
/***************************************************************
* OR n
***************************************************************/
-#define OR(value) \
- cpustate->_A |= value; \
+#define OR(value) \
+ cpustate->_A |= value; \
cpustate->_F = SZP[cpustate->_A]
/***************************************************************
* XOR n
***************************************************************/
-#define XOR(value) \
- cpustate->_A ^= value; \
+#define XOR(value) \
+ cpustate->_A ^= value; \
cpustate->_F = SZP[cpustate->_A]
/***************************************************************
* CP n
***************************************************************/
-#define CP(value) \
-{ \
- UINT32 ah = cpustate->_AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) - value); \
- cpustate->_F = SZHVC_sub[ah | res]; \
+#define CP(value) \
+{ \
+ UINT32 ah = cpustate->_AFD & 0xff00; \
+ UINT32 res = (UINT8)((ah >> 8) - value); \
+ cpustate->_F = SZHVC_sub[ah | res]; \
}
/***************************************************************
* EX AF,AF'
***************************************************************/
-#define EX_AF { \
- PAIR tmp; \
- tmp = cpustate->AF; cpustate->AF = cpustate->AF2; cpustate->AF2 = tmp; \
+#define EX_AF { \
+ PAIR tmp; \
+ tmp = cpustate->AF; cpustate->AF = cpustate->AF2; cpustate->AF2 = tmp; \
}
/***************************************************************
* EX DE,HL
***************************************************************/
-#define EX_DE_HL { \
- PAIR tmp; \
- tmp = cpustate->DE; cpustate->DE = cpustate->HL; cpustate->HL = tmp; \
+#define EX_DE_HL { \
+ PAIR tmp; \
+ tmp = cpustate->DE; cpustate->DE = cpustate->HL; cpustate->HL = tmp; \
}
/***************************************************************
* EXX
***************************************************************/
-#define EXX { \
- PAIR tmp; \
- tmp = cpustate->BC; cpustate->BC = cpustate->BC2; cpustate->BC2 = tmp; \
- tmp = cpustate->DE; cpustate->DE = cpustate->DE2; cpustate->DE2 = tmp; \
- tmp = cpustate->HL; cpustate->HL = cpustate->HL2; cpustate->HL2 = tmp; \
+#define EXX { \
+ PAIR tmp; \
+ tmp = cpustate->BC; cpustate->BC = cpustate->BC2; cpustate->BC2 = tmp; \
+ tmp = cpustate->DE; cpustate->DE = cpustate->DE2; cpustate->DE2 = tmp; \
+ tmp = cpustate->HL; cpustate->HL = cpustate->HL2; cpustate->HL2 = tmp; \
}
/***************************************************************
* EX (SP),r16
***************************************************************/
-#define EXSP(DR) \
-{ \
- PAIR tmp = { { 0, 0, 0, 0 } }; \
- RM16(cpustate, cpustate->_SPD, &tmp ); \
- WM16(cpustate, cpustate->_SPD, &cpustate->DR ); \
- cpustate->DR = tmp; \
+#define EXSP(DR) \
+{ \
+ PAIR tmp = { { 0, 0, 0, 0 } }; \
+ RM16(cpustate, cpustate->_SPD, &tmp ); \
+ WM16(cpustate, cpustate->_SPD, &cpustate->DR ); \
+ cpustate->DR = tmp; \
}
/***************************************************************
* ADD16
***************************************************************/
-#define ADD16(DR,SR) \
-{ \
- UINT32 res = cpustate->DR.d + cpustate->SR.d; \
- cpustate->_F = (cpustate->_F & (SF | ZF | VF)) | \
- (((cpustate->DR.d ^ res ^ cpustate->SR.d) >> 8) & HF) | \
- ((res >> 16) & CF); \
- cpustate->DR.w.l = (UINT16)res; \
+#define ADD16(DR,SR) \
+{ \
+ UINT32 res = cpustate->DR.d + cpustate->SR.d; \
+ cpustate->_F = (cpustate->_F & (SF | ZF | VF)) | \
+ (((cpustate->DR.d ^ res ^ cpustate->SR.d) >> 8) & HF) | \
+ ((res >> 16) & CF); \
+ cpustate->DR.w.l = (UINT16)res; \
}
/***************************************************************
* ADC r16,r16
***************************************************************/
-#define ADC16(DR) \
-{ \
- UINT32 res = cpustate->_HLD + cpustate->DR.d + (cpustate->_F & CF); \
- cpustate->_F = (((cpustate->_HLD ^ res ^ cpustate->DR.d) >> 8) & HF) | \
- ((res >> 16) & CF) | \
- ((res >> 8) & SF) | \
- ((res & 0xffff) ? 0 : ZF) | \
+#define ADC16(DR) \
+{ \
+ UINT32 res = cpustate->_HLD + cpustate->DR.d + (cpustate->_F & CF); \
+ cpustate->_F = (((cpustate->_HLD ^ res ^ cpustate->DR.d) >> 8) & HF) | \
+ ((res >> 16) & CF) | \
+ ((res >> 8) & SF) | \
+ ((res & 0xffff) ? 0 : ZF) | \
(((cpustate->DR.d ^ cpustate->_HLD ^ 0x8000) & (cpustate->DR.d ^ res) & 0x8000) >> 13); \
- cpustate->_HL = (UINT16)res; \
+ cpustate->_HL = (UINT16)res; \
}
/***************************************************************
* SBC r16,r16
***************************************************************/
-#define SBC16(DR) \
-{ \
- UINT32 res = cpustate->_HLD - cpustate->DR.d - (cpustate->_F & CF); \
- cpustate->_F = (((cpustate->_HLD ^ res ^ cpustate->DR.d) >> 8) & HF) | NF | \
- ((res >> 16) & CF) | \
- ((res >> 8) & SF) | \
- ((res & 0xffff) ? 0 : ZF) | \
- (((cpustate->DR.d ^ cpustate->_HLD) & (cpustate->_HLD ^ res) &0x8000) >> 13); \
- cpustate->_HL = (UINT16)res; \
+#define SBC16(DR) \
+{ \
+ UINT32 res = cpustate->_HLD - cpustate->DR.d - (cpustate->_F & CF); \
+ cpustate->_F = (((cpustate->_HLD ^ res ^ cpustate->DR.d) >> 8) & HF) | NF | \
+ ((res >> 16) & CF) | \
+ ((res >> 8) & SF) | \
+ ((res & 0xffff) ? 0 : ZF) | \
+ (((cpustate->DR.d ^ cpustate->_HLD) & (cpustate->_HLD ^ res) &0x8000) >> 13); \
+ cpustate->_HL = (UINT16)res; \
}
/***************************************************************
@@ -640,13 +640,13 @@ INLINE UINT8 SRL(z180_state *cpustate, UINT8 value)
* BIT bit,r8
***************************************************************/
#undef BIT
-#define BIT(bit,reg) \
+#define BIT(bit,reg) \
cpustate->_F = (cpustate->_F & CF) | HF | SZ_BIT[reg & (1<<bit)]
/***************************************************************
* BIT bit,(IX/Y+o)
***************************************************************/
-#define BIT_XY(bit,reg) \
+#define BIT_XY(bit,reg) \
cpustate->_F = (cpustate->_F & CF) | HF | (SZ_BIT[reg & (1<<bit)] & ~(YF|XF)) | ((cpustate->ea>>8) & (YF|XF))
/***************************************************************
@@ -668,287 +668,286 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value)
/***************************************************************
* LDI
***************************************************************/
-#define LDI { \
- UINT8 io = RM(cpustate, cpustate->_HL); \
- WM(cpustate, cpustate->_DE, io ); \
- cpustate->_F &= SF | ZF | CF; \
- if( (cpustate->_A + io) & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
- if( (cpustate->_A + io) & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
- cpustate->_HL++; cpustate->_DE++; cpustate->_BC--; \
- if( cpustate->_BC ) cpustate->_F |= VF; \
+#define LDI { \
+ UINT8 io = RM(cpustate, cpustate->_HL); \
+ WM(cpustate, cpustate->_DE, io ); \
+ cpustate->_F &= SF | ZF | CF; \
+ if( (cpustate->_A + io) & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
+ if( (cpustate->_A + io) & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
+ cpustate->_HL++; cpustate->_DE++; cpustate->_BC--; \
+ if( cpustate->_BC ) cpustate->_F |= VF; \
}
/***************************************************************
* CPI
***************************************************************/
-#define CPI { \
- UINT8 val = RM(cpustate, cpustate->_HL); \
- UINT8 res = cpustate->_A - val; \
- cpustate->_HL++; cpustate->_BC--; \
+#define CPI { \
+ UINT8 val = RM(cpustate, cpustate->_HL); \
+ UINT8 res = cpustate->_A - val; \
+ cpustate->_HL++; cpustate->_BC--; \
cpustate->_F = (cpustate->_F & CF) | (SZ[res] & ~(YF|XF)) | ((cpustate->_A ^ val ^ res) & HF) | NF; \
- if( cpustate->_F & HF ) res -= 1; \
- if( res & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
- if( res & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
- if( cpustate->_BC ) cpustate->_F |= VF; \
+ if( cpustate->_F & HF ) res -= 1; \
+ if( res & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
+ if( res & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
+ if( cpustate->_BC ) cpustate->_F |= VF; \
}
/***************************************************************
* INI
***************************************************************/
-#define INI { \
- UINT8 io = IN(cpustate, cpustate->_BC); \
- cpustate->_B--; \
- WM(cpustate, cpustate->_HL, io ); \
- cpustate->_HL++; \
- cpustate->_F = SZ[cpustate->_B]; \
- if( io & SF ) cpustate->_F |= NF; \
- if( (cpustate->_C + io + 1) & 0x100 ) cpustate->_F |= HF | CF; \
- if( (irep_tmp1[cpustate->_C & 3][io & 3] ^ \
- breg_tmp2[cpustate->_B] ^ \
- (cpustate->_C >> 2) ^ \
- (io >> 2)) & 1 ) \
- cpustate->_F |= PF; \
+#define INI { \
+ UINT8 io = IN(cpustate, cpustate->_BC); \
+ cpustate->_B--; \
+ WM(cpustate, cpustate->_HL, io ); \
+ cpustate->_HL++; \
+ cpustate->_F = SZ[cpustate->_B]; \
+ if( io & SF ) cpustate->_F |= NF; \
+ if( (cpustate->_C + io + 1) & 0x100 ) cpustate->_F |= HF | CF; \
+ if( (irep_tmp1[cpustate->_C & 3][io & 3] ^ \
+ breg_tmp2[cpustate->_B] ^ \
+ (cpustate->_C >> 2) ^ \
+ (io >> 2)) & 1 ) \
+ cpustate->_F |= PF; \
}
/***************************************************************
* OUTI
***************************************************************/
-#define OUTI { \
- UINT8 io = RM(cpustate, cpustate->_HL); \
- cpustate->_B--; \
- OUT(cpustate, cpustate->_BC, io ); \
- cpustate->_HL++; \
- cpustate->_F = SZ[cpustate->_B]; \
- if( io & SF ) cpustate->_F |= NF; \
- if( (cpustate->_C + io + 1) & 0x100 ) cpustate->_F |= HF | CF; \
- if( (irep_tmp1[cpustate->_C & 3][io & 3] ^ \
- breg_tmp2[cpustate->_B] ^ \
- (cpustate->_C >> 2) ^ \
- (io >> 2)) & 1 ) \
- cpustate->_F |= PF; \
+#define OUTI { \
+ UINT8 io = RM(cpustate, cpustate->_HL); \
+ cpustate->_B--; \
+ OUT(cpustate, cpustate->_BC, io ); \
+ cpustate->_HL++; \
+ cpustate->_F = SZ[cpustate->_B]; \
+ if( io & SF ) cpustate->_F |= NF; \
+ if( (cpustate->_C + io + 1) & 0x100 ) cpustate->_F |= HF | CF; \
+ if( (irep_tmp1[cpustate->_C & 3][io & 3] ^ \
+ breg_tmp2[cpustate->_B] ^ \
+ (cpustate->_C >> 2) ^ \
+ (io >> 2)) & 1 ) \
+ cpustate->_F |= PF; \
}
/***************************************************************
* LDD
***************************************************************/
-#define LDD { \
- UINT8 io = RM(cpustate, cpustate->_HL); \
- WM(cpustate, cpustate->_DE, io ); \
- cpustate->_F &= SF | ZF | CF; \
- if( (cpustate->_A + io) & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
- if( (cpustate->_A + io) & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
- cpustate->_HL--; cpustate->_DE--; cpustate->_BC--; \
- if( cpustate->_BC ) cpustate->_F |= VF; \
+#define LDD { \
+ UINT8 io = RM(cpustate, cpustate->_HL); \
+ WM(cpustate, cpustate->_DE, io ); \
+ cpustate->_F &= SF | ZF | CF; \
+ if( (cpustate->_A + io) & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
+ if( (cpustate->_A + io) & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
+ cpustate->_HL--; cpustate->_DE--; cpustate->_BC--; \
+ if( cpustate->_BC ) cpustate->_F |= VF; \
}
/***************************************************************
* CPD
***************************************************************/
-#define CPD { \
- UINT8 val = RM(cpustate, cpustate->_HL); \
- UINT8 res = cpustate->_A - val; \
- cpustate->_HL--; cpustate->_BC--; \
+#define CPD { \
+ UINT8 val = RM(cpustate, cpustate->_HL); \
+ UINT8 res = cpustate->_A - val; \
+ cpustate->_HL--; cpustate->_BC--; \
cpustate->_F = (cpustate->_F & CF) | (SZ[res] & ~(YF|XF)) | ((cpustate->_A ^ val ^ res) & HF) | NF; \
- if( cpustate->_F & HF ) res -= 1; \
- if( res & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
- if( res & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
- if( cpustate->_BC ) cpustate->_F |= VF; \
+ if( cpustate->_F & HF ) res -= 1; \
+ if( res & 0x02 ) cpustate->_F |= YF; /* bit 1 -> flag 5 */ \
+ if( res & 0x08 ) cpustate->_F |= XF; /* bit 3 -> flag 3 */ \
+ if( cpustate->_BC ) cpustate->_F |= VF; \
}
/***************************************************************
* IND
***************************************************************/
-#define IND { \
- UINT8 io = IN(cpustate, cpustate->_BC); \
- cpustate->_B--; \
- WM(cpustate, cpustate->_HL, io ); \
- cpustate->_HL--; \
- cpustate->_F = SZ[cpustate->_B]; \
- if( io & SF ) cpustate->_F |= NF; \
- if( (cpustate->_C + io - 1) & 0x100 ) cpustate->_F |= HF | CF; \
- if( (drep_tmp1[cpustate->_C & 3][io & 3] ^ \
- breg_tmp2[cpustate->_B] ^ \
- (cpustate->_C >> 2) ^ \
- (io >> 2)) & 1 ) \
- cpustate->_F |= PF; \
+#define IND { \
+ UINT8 io = IN(cpustate, cpustate->_BC); \
+ cpustate->_B--; \
+ WM(cpustate, cpustate->_HL, io ); \
+ cpustate->_HL--; \
+ cpustate->_F = SZ[cpustate->_B]; \
+ if( io & SF ) cpustate->_F |= NF; \
+ if( (cpustate->_C + io - 1) & 0x100 ) cpustate->_F |= HF | CF; \
+ if( (drep_tmp1[cpustate->_C & 3][io & 3] ^ \
+ breg_tmp2[cpustate->_B] ^ \
+ (cpustate->_C >> 2) ^ \
+ (io >> 2)) & 1 ) \
+ cpustate->_F |= PF; \
}
/***************************************************************
* OUTD
***************************************************************/
-#define OUTD { \
- UINT8 io = RM(cpustate, cpustate->_HL); \
- cpustate->_B--; \
- OUT(cpustate, cpustate->_BC, io ); \
- cpustate->_HL--; \
- cpustate->_F = SZ[cpustate->_B]; \
- if( io & SF ) cpustate->_F |= NF; \
- if( (cpustate->_C + io - 1) & 0x100 ) cpustate->_F |= HF | CF; \
- if( (drep_tmp1[cpustate->_C & 3][io & 3] ^ \
- breg_tmp2[cpustate->_B] ^ \
- (cpustate->_C >> 2) ^ \
- (io >> 2)) & 1 ) \
- cpustate->_F |= PF; \
+#define OUTD { \
+ UINT8 io = RM(cpustate, cpustate->_HL); \
+ cpustate->_B--; \
+ OUT(cpustate, cpustate->_BC, io ); \
+ cpustate->_HL--; \
+ cpustate->_F = SZ[cpustate->_B]; \
+ if( io & SF ) cpustate->_F |= NF; \
+ if( (cpustate->_C + io - 1) & 0x100 ) cpustate->_F |= HF | CF; \
+ if( (drep_tmp1[cpustate->_C & 3][io & 3] ^ \
+ breg_tmp2[cpustate->_B] ^ \
+ (cpustate->_C >> 2) ^ \
+ (io >> 2)) & 1 ) \
+ cpustate->_F |= PF; \
}
/***************************************************************
* LDIR
***************************************************************/
-#define LDIR \
- LDI; \
- if( cpustate->_BC ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb0); \
+#define LDIR \
+ LDI; \
+ if( cpustate->_BC ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb0); \
}
/***************************************************************
* CPIR
***************************************************************/
-#define CPIR \
- CPI; \
- if( cpustate->_BC && !(cpustate->_F & ZF) ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb1); \
+#define CPIR \
+ CPI; \
+ if( cpustate->_BC && !(cpustate->_F & ZF) ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb1); \
}
/***************************************************************
* INIR
***************************************************************/
-#define INIR \
- INI; \
- if( cpustate->_B ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb2); \
+#define INIR \
+ INI; \
+ if( cpustate->_B ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb2); \
}
/***************************************************************
* OTIR
***************************************************************/
-#define OTIR \
- OUTI; \
- if( cpustate->_B ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb3); \
+#define OTIR \
+ OUTI; \
+ if( cpustate->_B ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb3); \
}
/***************************************************************
* LDDR
***************************************************************/
-#define LDDR \
- LDD; \
- if( cpustate->_BC ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb8); \
+#define LDDR \
+ LDD; \
+ if( cpustate->_BC ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb8); \
}
/***************************************************************
* CPDR
***************************************************************/
-#define CPDR \
- CPD; \
- if( cpustate->_BC && !(cpustate->_F & ZF) ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb9); \
+#define CPDR \
+ CPD; \
+ if( cpustate->_BC && !(cpustate->_F & ZF) ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb9); \
}
/***************************************************************
* INDR
***************************************************************/
-#define INDR \
- IND; \
- if( cpustate->_B ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xba); \
+#define INDR \
+ IND; \
+ if( cpustate->_B ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xba); \
}
/***************************************************************
* OTDR
***************************************************************/
-#define OTDR \
- OUTD; \
- if( cpustate->_B ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xbb); \
+#define OTDR \
+ OUTD; \
+ if( cpustate->_B ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xbb); \
}
/***************************************************************
* EI
***************************************************************/
-#define EI { \
- cpustate->IFF1 = cpustate->IFF2 = 1; \
- cpustate->after_EI = 1; \
+#define EI { \
+ cpustate->IFF1 = cpustate->IFF2 = 1; \
+ cpustate->after_EI = 1; \
}
/***************************************************************
* TST n
***************************************************************/
-#define TST(value) \
+#define TST(value) \
cpustate->_F = SZP[cpustate->_A & value] | HF
/***************************************************************
* MLT rr
***************************************************************/
-#define MLT(DR) { \
- cpustate->DR.w.l = cpustate->DR.b.l * cpustate->DR.b.h; \
+#define MLT(DR) { \
+ cpustate->DR.w.l = cpustate->DR.b.l * cpustate->DR.b.h; \
}
/***************************************************************
* OTIM
***************************************************************/
-#define OTIM { \
- cpustate->_B--; \
- OUT(cpustate, cpustate->_C, RM(cpustate, cpustate->_HL) ); \
- cpustate->_HL++; \
- cpustate->_C++; \
- cpustate->_F = (cpustate->_B) ? NF : NF | ZF; \
+#define OTIM { \
+ cpustate->_B--; \
+ OUT(cpustate, cpustate->_C, RM(cpustate, cpustate->_HL) ); \
+ cpustate->_HL++; \
+ cpustate->_C++; \
+ cpustate->_F = (cpustate->_B) ? NF : NF | ZF; \
}
/***************************************************************
* OTDM
***************************************************************/
-#define OTDM { \
- cpustate->_B--; \
- OUT(cpustate, cpustate->_C, RM(cpustate, cpustate->_HL) ); \
- cpustate->_HL--; \
- cpustate->_C--; \
- cpustate->_F = (cpustate->_B) ? NF : NF | ZF; \
+#define OTDM { \
+ cpustate->_B--; \
+ OUT(cpustate, cpustate->_C, RM(cpustate, cpustate->_HL) ); \
+ cpustate->_HL--; \
+ cpustate->_C--; \
+ cpustate->_F = (cpustate->_B) ? NF : NF | ZF; \
}
/***************************************************************
* OTIMR
***************************************************************/
-#define OTIMR \
- OTIM; \
- if( cpustate->_B ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb3); \
+#define OTIMR \
+ OTIM; \
+ if( cpustate->_B ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb3); \
}
/***************************************************************
* OTDMR
***************************************************************/
-#define OTDMR \
- OTDM; \
- if( cpustate->_B ) \
- { \
- cpustate->_PC -= 2; \
- CC(ex,0xb3); \
+#define OTDMR \
+ OTDM; \
+ if( cpustate->_B ) \
+ { \
+ cpustate->_PC -= 2; \
+ CC(ex,0xb3); \
}
/***************************************************************
* OTDMR
***************************************************************/
-#define SLP { \
- cpustate->icount = 0; \
- cpustate->HALT = 2; \
+#define SLP { \
+ cpustate->icount = 0; \
+ cpustate->HALT = 2; \
}
-
diff --git a/src/emu/cpu/z180/z180tbl.h b/src/emu/cpu/z180/z180tbl.h
index 01864a68d36..3b693acfbe2 100644
--- a/src/emu/cpu/z180/z180tbl.h
+++ b/src/emu/cpu/z180/z180tbl.h
@@ -30,129 +30,129 @@ static const UINT8 breg_tmp2[256] = {
static const UINT8 cc_op[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
- 3, 9, 7, 4, 4, 4, 6, 3, 4, 7, 6, 4, 4, 4, 6, 3,
- 7, 9, 7, 4, 4, 4, 6, 3, 8, 7, 6, 4, 4, 4, 6, 3,
- 6, 9,16, 4, 4, 4, 6, 4, 6, 7,15, 4, 4, 4, 6, 3,
- 6, 9,13, 4,10,10, 9, 3, 6, 7,12, 4, 4, 4, 6, 3,
- 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
- 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
- 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
- 7, 7, 7, 7, 7, 7, 3, 7, 4, 4, 4, 4, 4, 4, 6, 4,
- 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
- 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
- 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
- 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
- 5, 9, 6, 9, 6,11, 6,11, 5, 9, 6, 0, 6,16, 6,11,
- 5, 9, 6,10, 6,11, 6,11, 5, 3, 6, 9, 6, 0, 6,11,
- 5, 9, 6,16, 6,11, 6,11, 5, 3, 6, 3, 6, 0, 6,11,
- 5, 9, 6, 3, 6,11, 6,11, 5, 4, 6, 3, 6, 0, 6,11
+ 3, 9, 7, 4, 4, 4, 6, 3, 4, 7, 6, 4, 4, 4, 6, 3,
+ 7, 9, 7, 4, 4, 4, 6, 3, 8, 7, 6, 4, 4, 4, 6, 3,
+ 6, 9,16, 4, 4, 4, 6, 4, 6, 7,15, 4, 4, 4, 6, 3,
+ 6, 9,13, 4,10,10, 9, 3, 6, 7,12, 4, 4, 4, 6, 3,
+ 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
+ 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
+ 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
+ 7, 7, 7, 7, 7, 7, 3, 7, 4, 4, 4, 4, 4, 4, 6, 4,
+ 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
+ 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
+ 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
+ 4, 4, 4, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 6, 4,
+ 5, 9, 6, 9, 6,11, 6,11, 5, 9, 6, 0, 6,16, 6,11,
+ 5, 9, 6,10, 6,11, 6,11, 5, 3, 6, 9, 6, 0, 6,11,
+ 5, 9, 6,16, 6,11, 6,11, 5, 3, 6, 3, 6, 0, 6,11,
+ 5, 9, 6, 3, 6,11, 6,11, 5, 4, 6, 3, 6, 0, 6,11
};
static const UINT8 cc_cb[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
- 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
- 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
- 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
- 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
+ 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
+ 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
+ 6, 6, 6, 6, 6, 6, 9, 6, 6, 6, 6, 6, 6, 6, 9, 6,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7,
+ 7, 7, 7, 7, 7, 7,13, 7, 7, 7, 7, 7, 7, 7,13, 7
};
static const UINT8 cc_ed[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
- 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
- 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
- 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6,10, 6, 6, 6,
- 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
- 9,10,10,19, 6,12, 6, 6, 9,10,10,18,17,12, 6, 6,
- 9,10,10,19, 6,12, 6, 6, 9,10,10,18,17,12, 6, 6,
- 9,10,10,19, 6,12, 6,16, 9,10,10,18,17,12, 6,16,
- 9,10,10,19,12,12, 8, 6, 9,10,10,18,17,12, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 12,12,12,12, 6, 6, 6, 6,12,12,12,12, 6, 6, 6, 6,
- 12,12,12,12, 6, 6, 6, 6,12,12,12,12, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6
+ 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
+ 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
+ 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6,10, 6, 6, 6,
+ 12,13, 6, 6, 9, 6, 6, 6,12,13, 6, 6, 9, 6, 6, 6,
+ 9,10,10,19, 6,12, 6, 6, 9,10,10,18,17,12, 6, 6,
+ 9,10,10,19, 6,12, 6, 6, 9,10,10,18,17,12, 6, 6,
+ 9,10,10,19, 6,12, 6,16, 9,10,10,18,17,12, 6,16,
+ 9,10,10,19,12,12, 8, 6, 9,10,10,18,17,12, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 12,12,12,12, 6, 6, 6, 6,12,12,12,12, 6, 6, 6, 6,
+ 12,12,12,12, 6, 6, 6, 6,12,12,12,12, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6
};
static const UINT8 cc_xy[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
- 4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4,
- 4,12,19, 7, 9, 9,15, 4, 4,10,18, 7, 9, 9, 9, 4,
- 4, 4, 4, 4,18,18,15, 4, 4,10, 4, 4, 4, 4, 4, 4,
- 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
- 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
- 9, 9, 9, 9, 9, 9,14, 9, 9, 9, 9, 9, 9, 9,14, 9,
- 15,15,15,15,15,15, 4,15, 4, 4, 4, 4, 9, 9,14, 4,
- 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
- 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
- 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
- 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, 4, 4, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- 4,12, 4,19, 4,14, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4
+ 4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4,
+ 4,12,19, 7, 9, 9,15, 4, 4,10,18, 7, 9, 9, 9, 4,
+ 4, 4, 4, 4,18,18,15, 4, 4,10, 4, 4, 4, 4, 4, 4,
+ 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
+ 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
+ 9, 9, 9, 9, 9, 9,14, 9, 9, 9, 9, 9, 9, 9,14, 9,
+ 15,15,15,15,15,15, 4,15, 4, 4, 4, 4, 9, 9,14, 4,
+ 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
+ 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
+ 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
+ 4, 4, 4, 4, 9, 9,14, 4, 4, 4, 4, 4, 9, 9,14, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, 4, 4, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
+ 4,12, 4,19, 4,14, 4, 4, 4, 6, 4, 4, 4, 4, 4, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4
};
static const UINT8 cc_xycb[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
- 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
- 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
- 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
- 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
+ 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
+ 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
+ 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,
+ 19,19,19,19,19,19,19,19,19,19,19,19,19,19,19,19
};
/* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */
static const UINT8 cc_ex[0x100] = {
/*-0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -a -b -c -d -e -f */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
- 2, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
- 2, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, /* JR NC/JR C */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 4, 4, 4, 4, 0, 0, 0, 0, 4, 4, 4, 4, 0, 0, 0, 0, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
- 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2,
- 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2,
- 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2,
- 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
+ 2, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
+ 2, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 0, /* JR NC/JR C */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,10, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 4, 4, 4, 4, 0, 0, 0, 0, 4, 4, 4, 4, 0, 0, 0, 0, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
+ 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2,
+ 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2,
+ 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2,
+ 5, 0, 3, 0,10, 0, 0, 2, 5, 0, 3, 0,10, 0, 0, 2
};
static const UINT8 *const cc_default[6] = { cc_op, cc_cb, cc_ed, cc_xy, cc_xycb, cc_ex };
-#define Z180_TABLE_dd Z180_TABLE_xy
-#define Z180_TABLE_fd Z180_TABLE_xy
+#define Z180_TABLE_dd Z180_TABLE_xy
+#define Z180_TABLE_fd Z180_TABLE_xy
static int take_interrupt(z180_state *cpustate, int irq);
@@ -289,10 +289,10 @@ static void (*const Z180ops[Z180_PREFIX_COUNT][0x100])(z180_state *cpustate) =
***************************************************************/
#define EXEC_PROTOTYPE(prefix) \
-INLINE int exec##_##prefix(z180_state *cpustate, const UINT8 opcode) \
-{ \
- (*Z180ops[Z180_PREFIX_##prefix][opcode])(cpustate); \
- return cpustate->cc[Z180_TABLE_##prefix][opcode]; \
+INLINE int exec##_##prefix(z180_state *cpustate, const UINT8 opcode) \
+{ \
+ (*Z180ops[Z180_PREFIX_##prefix][opcode])(cpustate); \
+ return cpustate->cc[Z180_TABLE_##prefix][opcode]; \
}
EXEC_PROTOTYPE(op)
@@ -301,4 +301,3 @@ EXEC_PROTOTYPE(dd)
EXEC_PROTOTYPE(ed)
EXEC_PROTOTYPE(fd)
EXEC_PROTOTYPE(xycb)
-
diff --git a/src/emu/cpu/z180/z180xy.c b/src/emu/cpu/z180/z180xy.c
index 5cc0b5fcff6..ed8c815976a 100644
--- a/src/emu/cpu/z180/z180xy.c
+++ b/src/emu/cpu/z180/z180xy.c
@@ -2,291 +2,290 @@
* opcodes with DD/FD CB prefix
* rotate, shift and bit operations with (IX+o)
**********************************************************/
-OP(xycb,00) { cpustate->_B = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RLC B=(XY+o) */
-OP(xycb,01) { cpustate->_C = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RLC C=(XY+o) */
-OP(xycb,02) { cpustate->_D = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RLC D=(XY+o) */
-OP(xycb,03) { cpustate->_E = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RLC E=(XY+o) */
-OP(xycb,04) { cpustate->_H = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RLC H=(XY+o) */
-OP(xycb,05) { cpustate->_L = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RLC L=(XY+o) */
-OP(xycb,06) { WM(cpustate, cpustate->ea, RLC( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RLC (XY+o) */
-OP(xycb,07) { cpustate->_A = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RLC A=(XY+o) */
-
-OP(xycb,08) { cpustate->_B = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RRC B=(XY+o) */
-OP(xycb,09) { cpustate->_C = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RRC C=(XY+o) */
-OP(xycb,0a) { cpustate->_D = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RRC D=(XY+o) */
-OP(xycb,0b) { cpustate->_E = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RRC E=(XY+o) */
-OP(xycb,0c) { cpustate->_H = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RRC H=(XY+o) */
-OP(xycb,0d) { cpustate->_L = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RRC L=(XY+o) */
-OP(xycb,0e) { WM(cpustate, cpustate->ea,RRC( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RRC (XY+o) */
-OP(xycb,0f) { cpustate->_A = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RRC A=(XY+o) */
-
-OP(xycb,10) { cpustate->_B = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RL B=(XY+o) */
-OP(xycb,11) { cpustate->_C = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RL C=(XY+o) */
-OP(xycb,12) { cpustate->_D = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RL D=(XY+o) */
-OP(xycb,13) { cpustate->_E = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RL E=(XY+o) */
-OP(xycb,14) { cpustate->_H = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RL H=(XY+o) */
-OP(xycb,15) { cpustate->_L = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RL L=(XY+o) */
-OP(xycb,16) { WM(cpustate, cpustate->ea,RL( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RL (XY+o) */
-OP(xycb,17) { cpustate->_A = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RL A=(XY+o) */
-
-OP(xycb,18) { cpustate->_B = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RR B=(XY+o) */
-OP(xycb,19) { cpustate->_C = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RR C=(XY+o) */
-OP(xycb,1a) { cpustate->_D = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RR D=(XY+o) */
-OP(xycb,1b) { cpustate->_E = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RR E=(XY+o) */
-OP(xycb,1c) { cpustate->_H = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RR H=(XY+o) */
-OP(xycb,1d) { cpustate->_L = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RR L=(XY+o) */
-OP(xycb,1e) { WM(cpustate, cpustate->ea,RR( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RR (XY+o) */
-OP(xycb,1f) { cpustate->_A = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RR A=(XY+o) */
-
-OP(xycb,20) { cpustate->_B = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SLA B=(XY+o) */
-OP(xycb,21) { cpustate->_C = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SLA C=(XY+o) */
-OP(xycb,22) { cpustate->_D = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SLA D=(XY+o) */
-OP(xycb,23) { cpustate->_E = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SLA E=(XY+o) */
-OP(xycb,24) { cpustate->_H = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SLA H=(XY+o) */
-OP(xycb,25) { cpustate->_L = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SLA L=(XY+o) */
-OP(xycb,26) { WM(cpustate, cpustate->ea,SLA( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SLA (XY+o) */
-OP(xycb,27) { cpustate->_A = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SLA A=(XY+o) */
-
-OP(xycb,28) { cpustate->_B = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SRA B=(XY+o) */
-OP(xycb,29) { cpustate->_C = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SRA C=(XY+o) */
-OP(xycb,2a) { cpustate->_D = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SRA D=(XY+o) */
-OP(xycb,2b) { cpustate->_E = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SRA E=(XY+o) */
-OP(xycb,2c) { cpustate->_H = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SRA H=(XY+o) */
-OP(xycb,2d) { cpustate->_L = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SRA L=(XY+o) */
-OP(xycb,2e) { WM(cpustate, cpustate->ea,SRA( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SRA (XY+o) */
-OP(xycb,2f) { cpustate->_A = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SRA A=(XY+o) */
-
-OP(xycb,30) { cpustate->_B = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SLL B=(XY+o) */
-OP(xycb,31) { cpustate->_C = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SLL C=(XY+o) */
-OP(xycb,32) { cpustate->_D = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SLL D=(XY+o) */
-OP(xycb,33) { cpustate->_E = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SLL E=(XY+o) */
-OP(xycb,34) { cpustate->_H = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SLL H=(XY+o) */
-OP(xycb,35) { cpustate->_L = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SLL L=(XY+o) */
-OP(xycb,36) { WM(cpustate, cpustate->ea,SLL( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SLL (XY+o) */
-OP(xycb,37) { cpustate->_A = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SLL A=(XY+o) */
-
-OP(xycb,38) { cpustate->_B = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SRL B=(XY+o) */
-OP(xycb,39) { cpustate->_C = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SRL C=(XY+o) */
-OP(xycb,3a) { cpustate->_D = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SRL D=(XY+o) */
-OP(xycb,3b) { cpustate->_E = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SRL E=(XY+o) */
-OP(xycb,3c) { cpustate->_H = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SRL H=(XY+o) */
-OP(xycb,3d) { cpustate->_L = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SRL L=(XY+o) */
-OP(xycb,3e) { WM(cpustate, cpustate->ea,SRL( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SRL (XY+o) */
-OP(xycb,3f) { cpustate->_A = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SRL A=(XY+o) */
-
-OP(xycb,40) { xycb_46(cpustate); } /* BIT 0,B=(XY+o) */
-OP(xycb,41) { xycb_46(cpustate); } /* BIT 0,C=(XY+o) */
-OP(xycb,42) { xycb_46(cpustate); } /* BIT 0,D=(XY+o) */
-OP(xycb,43) { xycb_46(cpustate); } /* BIT 0,E=(XY+o) */
-OP(xycb,44) { xycb_46(cpustate); } /* BIT 0,H=(XY+o) */
-OP(xycb,45) { xycb_46(cpustate); } /* BIT 0,L=(XY+o) */
-OP(xycb,46) { BIT_XY(0,RM(cpustate, cpustate->ea)); } /* BIT 0,(XY+o) */
-OP(xycb,47) { xycb_46(cpustate); } /* BIT 0,A=(XY+o) */
-
-OP(xycb,48) { xycb_4e(cpustate); } /* BIT 1,B=(XY+o) */
-OP(xycb,49) { xycb_4e(cpustate); } /* BIT 1,C=(XY+o) */
-OP(xycb,4a) { xycb_4e(cpustate); } /* BIT 1,D=(XY+o) */
-OP(xycb,4b) { xycb_4e(cpustate); } /* BIT 1,E=(XY+o) */
-OP(xycb,4c) { xycb_4e(cpustate); } /* BIT 1,H=(XY+o) */
-OP(xycb,4d) { xycb_4e(cpustate); } /* BIT 1,L=(XY+o) */
-OP(xycb,4e) { BIT_XY(1,RM(cpustate, cpustate->ea)); } /* BIT 1,(XY+o) */
-OP(xycb,4f) { xycb_4e(cpustate); } /* BIT 1,A=(XY+o) */
-
-OP(xycb,50) { xycb_56(cpustate); } /* BIT 2,B=(XY+o) */
-OP(xycb,51) { xycb_56(cpustate); } /* BIT 2,C=(XY+o) */
-OP(xycb,52) { xycb_56(cpustate); } /* BIT 2,D=(XY+o) */
-OP(xycb,53) { xycb_56(cpustate); } /* BIT 2,E=(XY+o) */
-OP(xycb,54) { xycb_56(cpustate); } /* BIT 2,H=(XY+o) */
-OP(xycb,55) { xycb_56(cpustate); } /* BIT 2,L=(XY+o) */
-OP(xycb,56) { BIT_XY(2,RM(cpustate, cpustate->ea)); } /* BIT 2,(XY+o) */
-OP(xycb,57) { xycb_56(cpustate); } /* BIT 2,A=(XY+o) */
-
-OP(xycb,58) { xycb_5e(cpustate); } /* BIT 3,B=(XY+o) */
-OP(xycb,59) { xycb_5e(cpustate); } /* BIT 3,C=(XY+o) */
-OP(xycb,5a) { xycb_5e(cpustate); } /* BIT 3,D=(XY+o) */
-OP(xycb,5b) { xycb_5e(cpustate); } /* BIT 3,E=(XY+o) */
-OP(xycb,5c) { xycb_5e(cpustate); } /* BIT 3,H=(XY+o) */
-OP(xycb,5d) { xycb_5e(cpustate); } /* BIT 3,L=(XY+o) */
-OP(xycb,5e) { BIT_XY(3,RM(cpustate, cpustate->ea)); } /* BIT 3,(XY+o) */
-OP(xycb,5f) { xycb_5e(cpustate); } /* BIT 3,A=(XY+o) */
-
-OP(xycb,60) { xycb_66(cpustate); } /* BIT 4,B=(XY+o) */
-OP(xycb,61) { xycb_66(cpustate); } /* BIT 4,C=(XY+o) */
-OP(xycb,62) { xycb_66(cpustate); } /* BIT 4,D=(XY+o) */
-OP(xycb,63) { xycb_66(cpustate); } /* BIT 4,E=(XY+o) */
-OP(xycb,64) { xycb_66(cpustate); } /* BIT 4,H=(XY+o) */
-OP(xycb,65) { xycb_66(cpustate); } /* BIT 4,L=(XY+o) */
-OP(xycb,66) { BIT_XY(4,RM(cpustate, cpustate->ea)); } /* BIT 4,(XY+o) */
-OP(xycb,67) { xycb_66(cpustate); } /* BIT 4,A=(XY+o) */
-
-OP(xycb,68) { xycb_6e(cpustate); } /* BIT 5,B=(XY+o) */
-OP(xycb,69) { xycb_6e(cpustate); } /* BIT 5,C=(XY+o) */
-OP(xycb,6a) { xycb_6e(cpustate); } /* BIT 5,D=(XY+o) */
-OP(xycb,6b) { xycb_6e(cpustate); } /* BIT 5,E=(XY+o) */
-OP(xycb,6c) { xycb_6e(cpustate); } /* BIT 5,H=(XY+o) */
-OP(xycb,6d) { xycb_6e(cpustate); } /* BIT 5,L=(XY+o) */
-OP(xycb,6e) { BIT_XY(5,RM(cpustate, cpustate->ea)); } /* BIT 5,(XY+o) */
-OP(xycb,6f) { xycb_6e(cpustate); } /* BIT 5,A=(XY+o) */
-
-OP(xycb,70) { xycb_76(cpustate); } /* BIT 6,B=(XY+o) */
-OP(xycb,71) { xycb_76(cpustate); } /* BIT 6,C=(XY+o) */
-OP(xycb,72) { xycb_76(cpustate); } /* BIT 6,D=(XY+o) */
-OP(xycb,73) { xycb_76(cpustate); } /* BIT 6,E=(XY+o) */
-OP(xycb,74) { xycb_76(cpustate); } /* BIT 6,H=(XY+o) */
-OP(xycb,75) { xycb_76(cpustate); } /* BIT 6,L=(XY+o) */
-OP(xycb,76) { BIT_XY(6,RM(cpustate, cpustate->ea)); } /* BIT 6,(XY+o) */
-OP(xycb,77) { xycb_76(cpustate); } /* BIT 6,A=(XY+o) */
-
-OP(xycb,78) { xycb_7e(cpustate); } /* BIT 7,B=(XY+o) */
-OP(xycb,79) { xycb_7e(cpustate); } /* BIT 7,C=(XY+o) */
-OP(xycb,7a) { xycb_7e(cpustate); } /* BIT 7,D=(XY+o) */
-OP(xycb,7b) { xycb_7e(cpustate); } /* BIT 7,E=(XY+o) */
-OP(xycb,7c) { xycb_7e(cpustate); } /* BIT 7,H=(XY+o) */
-OP(xycb,7d) { xycb_7e(cpustate); } /* BIT 7,L=(XY+o) */
-OP(xycb,7e) { BIT_XY(7,RM(cpustate, cpustate->ea)); } /* BIT 7,(XY+o) */
-OP(xycb,7f) { xycb_7e(cpustate); } /* BIT 7,A=(XY+o) */
-
-OP(xycb,80) { cpustate->_B = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 0,B=(XY+o) */
-OP(xycb,81) { cpustate->_C = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 0,C=(XY+o) */
-OP(xycb,82) { cpustate->_D = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 0,D=(XY+o) */
-OP(xycb,83) { cpustate->_E = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 0,E=(XY+o) */
-OP(xycb,84) { cpustate->_H = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 0,H=(XY+o) */
-OP(xycb,85) { cpustate->_L = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 0,L=(XY+o) */
-OP(xycb,86) { WM(cpustate, cpustate->ea, RES(0,RM(cpustate, cpustate->ea)) ); } /* RES 0,(XY+o) */
-OP(xycb,87) { cpustate->_A = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 0,A=(XY+o) */
-
-OP(xycb,88) { cpustate->_B = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 1,B=(XY+o) */
-OP(xycb,89) { cpustate->_C = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 1,C=(XY+o) */
-OP(xycb,8a) { cpustate->_D = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 1,D=(XY+o) */
-OP(xycb,8b) { cpustate->_E = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 1,E=(XY+o) */
-OP(xycb,8c) { cpustate->_H = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 1,H=(XY+o) */
-OP(xycb,8d) { cpustate->_L = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 1,L=(XY+o) */
-OP(xycb,8e) { WM(cpustate, cpustate->ea, RES(1,RM(cpustate, cpustate->ea)) ); } /* RES 1,(XY+o) */
-OP(xycb,8f) { cpustate->_A = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 1,A=(XY+o) */
-
-OP(xycb,90) { cpustate->_B = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 2,B=(XY+o) */
-OP(xycb,91) { cpustate->_C = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 2,C=(XY+o) */
-OP(xycb,92) { cpustate->_D = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 2,D=(XY+o) */
-OP(xycb,93) { cpustate->_E = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 2,E=(XY+o) */
-OP(xycb,94) { cpustate->_H = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 2,H=(XY+o) */
-OP(xycb,95) { cpustate->_L = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 2,L=(XY+o) */
-OP(xycb,96) { WM(cpustate, cpustate->ea, RES(2,RM(cpustate, cpustate->ea)) ); } /* RES 2,(XY+o) */
-OP(xycb,97) { cpustate->_A = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 2,A=(XY+o) */
-
-OP(xycb,98) { cpustate->_B = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 3,B=(XY+o) */
-OP(xycb,99) { cpustate->_C = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 3,C=(XY+o) */
-OP(xycb,9a) { cpustate->_D = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 3,D=(XY+o) */
-OP(xycb,9b) { cpustate->_E = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 3,E=(XY+o) */
-OP(xycb,9c) { cpustate->_H = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 3,H=(XY+o) */
-OP(xycb,9d) { cpustate->_L = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 3,L=(XY+o) */
-OP(xycb,9e) { WM(cpustate, cpustate->ea, RES(3,RM(cpustate, cpustate->ea)) ); } /* RES 3,(XY+o) */
-OP(xycb,9f) { cpustate->_A = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 3,A=(XY+o) */
-
-OP(xycb,a0) { cpustate->_B = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 4,B=(XY+o) */
-OP(xycb,a1) { cpustate->_C = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 4,C=(XY+o) */
-OP(xycb,a2) { cpustate->_D = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 4,D=(XY+o) */
-OP(xycb,a3) { cpustate->_E = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 4,E=(XY+o) */
-OP(xycb,a4) { cpustate->_H = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 4,H=(XY+o) */
-OP(xycb,a5) { cpustate->_L = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 4,L=(XY+o) */
-OP(xycb,a6) { WM(cpustate, cpustate->ea, RES(4,RM(cpustate, cpustate->ea)) ); } /* RES 4,(XY+o) */
-OP(xycb,a7) { cpustate->_A = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 4,A=(XY+o) */
-
-OP(xycb,a8) { cpustate->_B = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 5,B=(XY+o) */
-OP(xycb,a9) { cpustate->_C = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 5,C=(XY+o) */
-OP(xycb,aa) { cpustate->_D = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 5,D=(XY+o) */
-OP(xycb,ab) { cpustate->_E = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 5,E=(XY+o) */
-OP(xycb,ac) { cpustate->_H = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 5,H=(XY+o) */
-OP(xycb,ad) { cpustate->_L = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 5,L=(XY+o) */
-OP(xycb,ae) { WM(cpustate, cpustate->ea, RES(5,RM(cpustate, cpustate->ea)) ); } /* RES 5,(XY+o) */
-OP(xycb,af) { cpustate->_A = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 5,A=(XY+o) */
-
-OP(xycb,b0) { cpustate->_B = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 6,B=(XY+o) */
-OP(xycb,b1) { cpustate->_C = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 6,C=(XY+o) */
-OP(xycb,b2) { cpustate->_D = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 6,D=(XY+o) */
-OP(xycb,b3) { cpustate->_E = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 6,E=(XY+o) */
-OP(xycb,b4) { cpustate->_H = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 6,H=(XY+o) */
-OP(xycb,b5) { cpustate->_L = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 6,L=(XY+o) */
-OP(xycb,b6) { WM(cpustate, cpustate->ea, RES(6,RM(cpustate, cpustate->ea)) ); } /* RES 6,(XY+o) */
-OP(xycb,b7) { cpustate->_A = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 6,A=(XY+o) */
-
-OP(xycb,b8) { cpustate->_B = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 7,B=(XY+o) */
-OP(xycb,b9) { cpustate->_C = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 7,C=(XY+o) */
-OP(xycb,ba) { cpustate->_D = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 7,D=(XY+o) */
-OP(xycb,bb) { cpustate->_E = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 7,E=(XY+o) */
-OP(xycb,bc) { cpustate->_H = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 7,H=(XY+o) */
-OP(xycb,bd) { cpustate->_L = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 7,L=(XY+o) */
-OP(xycb,be) { WM(cpustate, cpustate->ea, RES(7,RM(cpustate, cpustate->ea)) ); } /* RES 7,(XY+o) */
-OP(xycb,bf) { cpustate->_A = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 7,A=(XY+o) */
-
-OP(xycb,c0) { cpustate->_B = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 0,B=(XY+o) */
-OP(xycb,c1) { cpustate->_C = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 0,C=(XY+o) */
-OP(xycb,c2) { cpustate->_D = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 0,D=(XY+o) */
-OP(xycb,c3) { cpustate->_E = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 0,E=(XY+o) */
-OP(xycb,c4) { cpustate->_H = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 0,H=(XY+o) */
-OP(xycb,c5) { cpustate->_L = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 0,L=(XY+o) */
-OP(xycb,c6) { WM(cpustate, cpustate->ea, SET(0,RM(cpustate, cpustate->ea)) ); } /* SET 0,(XY+o) */
-OP(xycb,c7) { cpustate->_A = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 0,A=(XY+o) */
-
-OP(xycb,c8) { cpustate->_B = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 1,B=(XY+o) */
-OP(xycb,c9) { cpustate->_C = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 1,C=(XY+o) */
-OP(xycb,ca) { cpustate->_D = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 1,D=(XY+o) */
-OP(xycb,cb) { cpustate->_E = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 1,E=(XY+o) */
-OP(xycb,cc) { cpustate->_H = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 1,H=(XY+o) */
-OP(xycb,cd) { cpustate->_L = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 1,L=(XY+o) */
-OP(xycb,ce) { WM(cpustate, cpustate->ea, SET(1,RM(cpustate, cpustate->ea)) ); } /* SET 1,(XY+o) */
-OP(xycb,cf) { cpustate->_A = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 1,A=(XY+o) */
-
-OP(xycb,d0) { cpustate->_B = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 2,B=(XY+o) */
-OP(xycb,d1) { cpustate->_C = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 2,C=(XY+o) */
-OP(xycb,d2) { cpustate->_D = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 2,D=(XY+o) */
-OP(xycb,d3) { cpustate->_E = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 2,E=(XY+o) */
-OP(xycb,d4) { cpustate->_H = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 2,H=(XY+o) */
-OP(xycb,d5) { cpustate->_L = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 2,L=(XY+o) */
-OP(xycb,d6) { WM(cpustate, cpustate->ea, SET(2,RM(cpustate, cpustate->ea)) ); } /* SET 2,(XY+o) */
-OP(xycb,d7) { cpustate->_A = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 2,A=(XY+o) */
-
-OP(xycb,d8) { cpustate->_B = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 3,B=(XY+o) */
-OP(xycb,d9) { cpustate->_C = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 3,C=(XY+o) */
-OP(xycb,da) { cpustate->_D = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 3,D=(XY+o) */
-OP(xycb,db) { cpustate->_E = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 3,E=(XY+o) */
-OP(xycb,dc) { cpustate->_H = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 3,H=(XY+o) */
-OP(xycb,dd) { cpustate->_L = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 3,L=(XY+o) */
-OP(xycb,de) { WM(cpustate, cpustate->ea, SET(3,RM(cpustate, cpustate->ea)) ); } /* SET 3,(XY+o) */
-OP(xycb,df) { cpustate->_A = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 3,A=(XY+o) */
-
-OP(xycb,e0) { cpustate->_B = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 4,B=(XY+o) */
-OP(xycb,e1) { cpustate->_C = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 4,C=(XY+o) */
-OP(xycb,e2) { cpustate->_D = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 4,D=(XY+o) */
-OP(xycb,e3) { cpustate->_E = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 4,E=(XY+o) */
-OP(xycb,e4) { cpustate->_H = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 4,H=(XY+o) */
-OP(xycb,e5) { cpustate->_L = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 4,L=(XY+o) */
-OP(xycb,e6) { WM(cpustate, cpustate->ea, SET(4,RM(cpustate, cpustate->ea)) ); } /* SET 4,(XY+o) */
-OP(xycb,e7) { cpustate->_A = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 4,A=(XY+o) */
-
-OP(xycb,e8) { cpustate->_B = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 5,B=(XY+o) */
-OP(xycb,e9) { cpustate->_C = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 5,C=(XY+o) */
-OP(xycb,ea) { cpustate->_D = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 5,D=(XY+o) */
-OP(xycb,eb) { cpustate->_E = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 5,E=(XY+o) */
-OP(xycb,ec) { cpustate->_H = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 5,H=(XY+o) */
-OP(xycb,ed) { cpustate->_L = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 5,L=(XY+o) */
-OP(xycb,ee) { WM(cpustate, cpustate->ea, SET(5,RM(cpustate, cpustate->ea)) ); } /* SET 5,(XY+o) */
-OP(xycb,ef) { cpustate->_A = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 5,A=(XY+o) */
-
-OP(xycb,f0) { cpustate->_B = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 6,B=(XY+o) */
-OP(xycb,f1) { cpustate->_C = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 6,C=(XY+o) */
-OP(xycb,f2) { cpustate->_D = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 6,D=(XY+o) */
-OP(xycb,f3) { cpustate->_E = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 6,E=(XY+o) */
-OP(xycb,f4) { cpustate->_H = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 6,H=(XY+o) */
-OP(xycb,f5) { cpustate->_L = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 6,L=(XY+o) */
-OP(xycb,f6) { WM(cpustate, cpustate->ea, SET(6,RM(cpustate, cpustate->ea)) ); } /* SET 6,(XY+o) */
-OP(xycb,f7) { cpustate->_A = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 6,A=(XY+o) */
-
-OP(xycb,f8) { cpustate->_B = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 7,B=(XY+o) */
-OP(xycb,f9) { cpustate->_C = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 7,C=(XY+o) */
-OP(xycb,fa) { cpustate->_D = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 7,D=(XY+o) */
-OP(xycb,fb) { cpustate->_E = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 7,E=(XY+o) */
-OP(xycb,fc) { cpustate->_H = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 7,H=(XY+o) */
-OP(xycb,fd) { cpustate->_L = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 7,L=(XY+o) */
-OP(xycb,fe) { WM(cpustate, cpustate->ea, SET(7,RM(cpustate, cpustate->ea)) ); } /* SET 7,(XY+o) */
-OP(xycb,ff) { cpustate->_A = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 7,A=(XY+o) */
-
+OP(xycb,00) { cpustate->_B = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RLC B=(XY+o) */
+OP(xycb,01) { cpustate->_C = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RLC C=(XY+o) */
+OP(xycb,02) { cpustate->_D = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RLC D=(XY+o) */
+OP(xycb,03) { cpustate->_E = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RLC E=(XY+o) */
+OP(xycb,04) { cpustate->_H = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RLC H=(XY+o) */
+OP(xycb,05) { cpustate->_L = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RLC L=(XY+o) */
+OP(xycb,06) { WM(cpustate, cpustate->ea, RLC( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RLC (XY+o) */
+OP(xycb,07) { cpustate->_A = RLC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RLC A=(XY+o) */
+
+OP(xycb,08) { cpustate->_B = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RRC B=(XY+o) */
+OP(xycb,09) { cpustate->_C = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RRC C=(XY+o) */
+OP(xycb,0a) { cpustate->_D = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RRC D=(XY+o) */
+OP(xycb,0b) { cpustate->_E = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RRC E=(XY+o) */
+OP(xycb,0c) { cpustate->_H = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RRC H=(XY+o) */
+OP(xycb,0d) { cpustate->_L = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RRC L=(XY+o) */
+OP(xycb,0e) { WM(cpustate, cpustate->ea,RRC( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RRC (XY+o) */
+OP(xycb,0f) { cpustate->_A = RRC( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RRC A=(XY+o) */
+
+OP(xycb,10) { cpustate->_B = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RL B=(XY+o) */
+OP(xycb,11) { cpustate->_C = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RL C=(XY+o) */
+OP(xycb,12) { cpustate->_D = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RL D=(XY+o) */
+OP(xycb,13) { cpustate->_E = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RL E=(XY+o) */
+OP(xycb,14) { cpustate->_H = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RL H=(XY+o) */
+OP(xycb,15) { cpustate->_L = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RL L=(XY+o) */
+OP(xycb,16) { WM(cpustate, cpustate->ea,RL( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RL (XY+o) */
+OP(xycb,17) { cpustate->_A = RL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RL A=(XY+o) */
+
+OP(xycb,18) { cpustate->_B = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RR B=(XY+o) */
+OP(xycb,19) { cpustate->_C = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RR C=(XY+o) */
+OP(xycb,1a) { cpustate->_D = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RR D=(XY+o) */
+OP(xycb,1b) { cpustate->_E = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RR E=(XY+o) */
+OP(xycb,1c) { cpustate->_H = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RR H=(XY+o) */
+OP(xycb,1d) { cpustate->_L = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RR L=(XY+o) */
+OP(xycb,1e) { WM(cpustate, cpustate->ea,RR( cpustate, RM(cpustate, cpustate->ea) ) ); } /* RR (XY+o) */
+OP(xycb,1f) { cpustate->_A = RR( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RR A=(XY+o) */
+
+OP(xycb,20) { cpustate->_B = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SLA B=(XY+o) */
+OP(xycb,21) { cpustate->_C = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SLA C=(XY+o) */
+OP(xycb,22) { cpustate->_D = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SLA D=(XY+o) */
+OP(xycb,23) { cpustate->_E = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SLA E=(XY+o) */
+OP(xycb,24) { cpustate->_H = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SLA H=(XY+o) */
+OP(xycb,25) { cpustate->_L = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SLA L=(XY+o) */
+OP(xycb,26) { WM(cpustate, cpustate->ea,SLA( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SLA (XY+o) */
+OP(xycb,27) { cpustate->_A = SLA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SLA A=(XY+o) */
+
+OP(xycb,28) { cpustate->_B = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SRA B=(XY+o) */
+OP(xycb,29) { cpustate->_C = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SRA C=(XY+o) */
+OP(xycb,2a) { cpustate->_D = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SRA D=(XY+o) */
+OP(xycb,2b) { cpustate->_E = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SRA E=(XY+o) */
+OP(xycb,2c) { cpustate->_H = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SRA H=(XY+o) */
+OP(xycb,2d) { cpustate->_L = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SRA L=(XY+o) */
+OP(xycb,2e) { WM(cpustate, cpustate->ea,SRA( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SRA (XY+o) */
+OP(xycb,2f) { cpustate->_A = SRA( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SRA A=(XY+o) */
+
+OP(xycb,30) { cpustate->_B = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SLL B=(XY+o) */
+OP(xycb,31) { cpustate->_C = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SLL C=(XY+o) */
+OP(xycb,32) { cpustate->_D = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SLL D=(XY+o) */
+OP(xycb,33) { cpustate->_E = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SLL E=(XY+o) */
+OP(xycb,34) { cpustate->_H = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SLL H=(XY+o) */
+OP(xycb,35) { cpustate->_L = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SLL L=(XY+o) */
+OP(xycb,36) { WM(cpustate, cpustate->ea,SLL( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SLL (XY+o) */
+OP(xycb,37) { cpustate->_A = SLL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SLL A=(XY+o) */
+
+OP(xycb,38) { cpustate->_B = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SRL B=(XY+o) */
+OP(xycb,39) { cpustate->_C = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SRL C=(XY+o) */
+OP(xycb,3a) { cpustate->_D = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SRL D=(XY+o) */
+OP(xycb,3b) { cpustate->_E = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SRL E=(XY+o) */
+OP(xycb,3c) { cpustate->_H = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SRL H=(XY+o) */
+OP(xycb,3d) { cpustate->_L = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SRL L=(XY+o) */
+OP(xycb,3e) { WM(cpustate, cpustate->ea,SRL( cpustate, RM(cpustate, cpustate->ea) ) ); } /* SRL (XY+o) */
+OP(xycb,3f) { cpustate->_A = SRL( cpustate, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SRL A=(XY+o) */
+
+OP(xycb,40) { xycb_46(cpustate); } /* BIT 0,B=(XY+o) */
+OP(xycb,41) { xycb_46(cpustate); } /* BIT 0,C=(XY+o) */
+OP(xycb,42) { xycb_46(cpustate); } /* BIT 0,D=(XY+o) */
+OP(xycb,43) { xycb_46(cpustate); } /* BIT 0,E=(XY+o) */
+OP(xycb,44) { xycb_46(cpustate); } /* BIT 0,H=(XY+o) */
+OP(xycb,45) { xycb_46(cpustate); } /* BIT 0,L=(XY+o) */
+OP(xycb,46) { BIT_XY(0,RM(cpustate, cpustate->ea)); } /* BIT 0,(XY+o) */
+OP(xycb,47) { xycb_46(cpustate); } /* BIT 0,A=(XY+o) */
+
+OP(xycb,48) { xycb_4e(cpustate); } /* BIT 1,B=(XY+o) */
+OP(xycb,49) { xycb_4e(cpustate); } /* BIT 1,C=(XY+o) */
+OP(xycb,4a) { xycb_4e(cpustate); } /* BIT 1,D=(XY+o) */
+OP(xycb,4b) { xycb_4e(cpustate); } /* BIT 1,E=(XY+o) */
+OP(xycb,4c) { xycb_4e(cpustate); } /* BIT 1,H=(XY+o) */
+OP(xycb,4d) { xycb_4e(cpustate); } /* BIT 1,L=(XY+o) */
+OP(xycb,4e) { BIT_XY(1,RM(cpustate, cpustate->ea)); } /* BIT 1,(XY+o) */
+OP(xycb,4f) { xycb_4e(cpustate); } /* BIT 1,A=(XY+o) */
+
+OP(xycb,50) { xycb_56(cpustate); } /* BIT 2,B=(XY+o) */
+OP(xycb,51) { xycb_56(cpustate); } /* BIT 2,C=(XY+o) */
+OP(xycb,52) { xycb_56(cpustate); } /* BIT 2,D=(XY+o) */
+OP(xycb,53) { xycb_56(cpustate); } /* BIT 2,E=(XY+o) */
+OP(xycb,54) { xycb_56(cpustate); } /* BIT 2,H=(XY+o) */
+OP(xycb,55) { xycb_56(cpustate); } /* BIT 2,L=(XY+o) */
+OP(xycb,56) { BIT_XY(2,RM(cpustate, cpustate->ea)); } /* BIT 2,(XY+o) */
+OP(xycb,57) { xycb_56(cpustate); } /* BIT 2,A=(XY+o) */
+
+OP(xycb,58) { xycb_5e(cpustate); } /* BIT 3,B=(XY+o) */
+OP(xycb,59) { xycb_5e(cpustate); } /* BIT 3,C=(XY+o) */
+OP(xycb,5a) { xycb_5e(cpustate); } /* BIT 3,D=(XY+o) */
+OP(xycb,5b) { xycb_5e(cpustate); } /* BIT 3,E=(XY+o) */
+OP(xycb,5c) { xycb_5e(cpustate); } /* BIT 3,H=(XY+o) */
+OP(xycb,5d) { xycb_5e(cpustate); } /* BIT 3,L=(XY+o) */
+OP(xycb,5e) { BIT_XY(3,RM(cpustate, cpustate->ea)); } /* BIT 3,(XY+o) */
+OP(xycb,5f) { xycb_5e(cpustate); } /* BIT 3,A=(XY+o) */
+
+OP(xycb,60) { xycb_66(cpustate); } /* BIT 4,B=(XY+o) */
+OP(xycb,61) { xycb_66(cpustate); } /* BIT 4,C=(XY+o) */
+OP(xycb,62) { xycb_66(cpustate); } /* BIT 4,D=(XY+o) */
+OP(xycb,63) { xycb_66(cpustate); } /* BIT 4,E=(XY+o) */
+OP(xycb,64) { xycb_66(cpustate); } /* BIT 4,H=(XY+o) */
+OP(xycb,65) { xycb_66(cpustate); } /* BIT 4,L=(XY+o) */
+OP(xycb,66) { BIT_XY(4,RM(cpustate, cpustate->ea)); } /* BIT 4,(XY+o) */
+OP(xycb,67) { xycb_66(cpustate); } /* BIT 4,A=(XY+o) */
+
+OP(xycb,68) { xycb_6e(cpustate); } /* BIT 5,B=(XY+o) */
+OP(xycb,69) { xycb_6e(cpustate); } /* BIT 5,C=(XY+o) */
+OP(xycb,6a) { xycb_6e(cpustate); } /* BIT 5,D=(XY+o) */
+OP(xycb,6b) { xycb_6e(cpustate); } /* BIT 5,E=(XY+o) */
+OP(xycb,6c) { xycb_6e(cpustate); } /* BIT 5,H=(XY+o) */
+OP(xycb,6d) { xycb_6e(cpustate); } /* BIT 5,L=(XY+o) */
+OP(xycb,6e) { BIT_XY(5,RM(cpustate, cpustate->ea)); } /* BIT 5,(XY+o) */
+OP(xycb,6f) { xycb_6e(cpustate); } /* BIT 5,A=(XY+o) */
+
+OP(xycb,70) { xycb_76(cpustate); } /* BIT 6,B=(XY+o) */
+OP(xycb,71) { xycb_76(cpustate); } /* BIT 6,C=(XY+o) */
+OP(xycb,72) { xycb_76(cpustate); } /* BIT 6,D=(XY+o) */
+OP(xycb,73) { xycb_76(cpustate); } /* BIT 6,E=(XY+o) */
+OP(xycb,74) { xycb_76(cpustate); } /* BIT 6,H=(XY+o) */
+OP(xycb,75) { xycb_76(cpustate); } /* BIT 6,L=(XY+o) */
+OP(xycb,76) { BIT_XY(6,RM(cpustate, cpustate->ea)); } /* BIT 6,(XY+o) */
+OP(xycb,77) { xycb_76(cpustate); } /* BIT 6,A=(XY+o) */
+
+OP(xycb,78) { xycb_7e(cpustate); } /* BIT 7,B=(XY+o) */
+OP(xycb,79) { xycb_7e(cpustate); } /* BIT 7,C=(XY+o) */
+OP(xycb,7a) { xycb_7e(cpustate); } /* BIT 7,D=(XY+o) */
+OP(xycb,7b) { xycb_7e(cpustate); } /* BIT 7,E=(XY+o) */
+OP(xycb,7c) { xycb_7e(cpustate); } /* BIT 7,H=(XY+o) */
+OP(xycb,7d) { xycb_7e(cpustate); } /* BIT 7,L=(XY+o) */
+OP(xycb,7e) { BIT_XY(7,RM(cpustate, cpustate->ea)); } /* BIT 7,(XY+o) */
+OP(xycb,7f) { xycb_7e(cpustate); } /* BIT 7,A=(XY+o) */
+
+OP(xycb,80) { cpustate->_B = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 0,B=(XY+o) */
+OP(xycb,81) { cpustate->_C = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 0,C=(XY+o) */
+OP(xycb,82) { cpustate->_D = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 0,D=(XY+o) */
+OP(xycb,83) { cpustate->_E = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 0,E=(XY+o) */
+OP(xycb,84) { cpustate->_H = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 0,H=(XY+o) */
+OP(xycb,85) { cpustate->_L = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 0,L=(XY+o) */
+OP(xycb,86) { WM(cpustate, cpustate->ea, RES(0,RM(cpustate, cpustate->ea)) ); } /* RES 0,(XY+o) */
+OP(xycb,87) { cpustate->_A = RES(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 0,A=(XY+o) */
+
+OP(xycb,88) { cpustate->_B = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 1,B=(XY+o) */
+OP(xycb,89) { cpustate->_C = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 1,C=(XY+o) */
+OP(xycb,8a) { cpustate->_D = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 1,D=(XY+o) */
+OP(xycb,8b) { cpustate->_E = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 1,E=(XY+o) */
+OP(xycb,8c) { cpustate->_H = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 1,H=(XY+o) */
+OP(xycb,8d) { cpustate->_L = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 1,L=(XY+o) */
+OP(xycb,8e) { WM(cpustate, cpustate->ea, RES(1,RM(cpustate, cpustate->ea)) ); } /* RES 1,(XY+o) */
+OP(xycb,8f) { cpustate->_A = RES(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 1,A=(XY+o) */
+
+OP(xycb,90) { cpustate->_B = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 2,B=(XY+o) */
+OP(xycb,91) { cpustate->_C = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 2,C=(XY+o) */
+OP(xycb,92) { cpustate->_D = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 2,D=(XY+o) */
+OP(xycb,93) { cpustate->_E = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 2,E=(XY+o) */
+OP(xycb,94) { cpustate->_H = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 2,H=(XY+o) */
+OP(xycb,95) { cpustate->_L = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 2,L=(XY+o) */
+OP(xycb,96) { WM(cpustate, cpustate->ea, RES(2,RM(cpustate, cpustate->ea)) ); } /* RES 2,(XY+o) */
+OP(xycb,97) { cpustate->_A = RES(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 2,A=(XY+o) */
+
+OP(xycb,98) { cpustate->_B = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 3,B=(XY+o) */
+OP(xycb,99) { cpustate->_C = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 3,C=(XY+o) */
+OP(xycb,9a) { cpustate->_D = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 3,D=(XY+o) */
+OP(xycb,9b) { cpustate->_E = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 3,E=(XY+o) */
+OP(xycb,9c) { cpustate->_H = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 3,H=(XY+o) */
+OP(xycb,9d) { cpustate->_L = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 3,L=(XY+o) */
+OP(xycb,9e) { WM(cpustate, cpustate->ea, RES(3,RM(cpustate, cpustate->ea)) ); } /* RES 3,(XY+o) */
+OP(xycb,9f) { cpustate->_A = RES(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 3,A=(XY+o) */
+
+OP(xycb,a0) { cpustate->_B = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 4,B=(XY+o) */
+OP(xycb,a1) { cpustate->_C = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 4,C=(XY+o) */
+OP(xycb,a2) { cpustate->_D = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 4,D=(XY+o) */
+OP(xycb,a3) { cpustate->_E = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 4,E=(XY+o) */
+OP(xycb,a4) { cpustate->_H = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 4,H=(XY+o) */
+OP(xycb,a5) { cpustate->_L = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 4,L=(XY+o) */
+OP(xycb,a6) { WM(cpustate, cpustate->ea, RES(4,RM(cpustate, cpustate->ea)) ); } /* RES 4,(XY+o) */
+OP(xycb,a7) { cpustate->_A = RES(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 4,A=(XY+o) */
+
+OP(xycb,a8) { cpustate->_B = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 5,B=(XY+o) */
+OP(xycb,a9) { cpustate->_C = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 5,C=(XY+o) */
+OP(xycb,aa) { cpustate->_D = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 5,D=(XY+o) */
+OP(xycb,ab) { cpustate->_E = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 5,E=(XY+o) */
+OP(xycb,ac) { cpustate->_H = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 5,H=(XY+o) */
+OP(xycb,ad) { cpustate->_L = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 5,L=(XY+o) */
+OP(xycb,ae) { WM(cpustate, cpustate->ea, RES(5,RM(cpustate, cpustate->ea)) ); } /* RES 5,(XY+o) */
+OP(xycb,af) { cpustate->_A = RES(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 5,A=(XY+o) */
+
+OP(xycb,b0) { cpustate->_B = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 6,B=(XY+o) */
+OP(xycb,b1) { cpustate->_C = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 6,C=(XY+o) */
+OP(xycb,b2) { cpustate->_D = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 6,D=(XY+o) */
+OP(xycb,b3) { cpustate->_E = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 6,E=(XY+o) */
+OP(xycb,b4) { cpustate->_H = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 6,H=(XY+o) */
+OP(xycb,b5) { cpustate->_L = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 6,L=(XY+o) */
+OP(xycb,b6) { WM(cpustate, cpustate->ea, RES(6,RM(cpustate, cpustate->ea)) ); } /* RES 6,(XY+o) */
+OP(xycb,b7) { cpustate->_A = RES(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 6,A=(XY+o) */
+
+OP(xycb,b8) { cpustate->_B = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* RES 7,B=(XY+o) */
+OP(xycb,b9) { cpustate->_C = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* RES 7,C=(XY+o) */
+OP(xycb,ba) { cpustate->_D = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* RES 7,D=(XY+o) */
+OP(xycb,bb) { cpustate->_E = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* RES 7,E=(XY+o) */
+OP(xycb,bc) { cpustate->_H = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* RES 7,H=(XY+o) */
+OP(xycb,bd) { cpustate->_L = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* RES 7,L=(XY+o) */
+OP(xycb,be) { WM(cpustate, cpustate->ea, RES(7,RM(cpustate, cpustate->ea)) ); } /* RES 7,(XY+o) */
+OP(xycb,bf) { cpustate->_A = RES(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* RES 7,A=(XY+o) */
+
+OP(xycb,c0) { cpustate->_B = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 0,B=(XY+o) */
+OP(xycb,c1) { cpustate->_C = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 0,C=(XY+o) */
+OP(xycb,c2) { cpustate->_D = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 0,D=(XY+o) */
+OP(xycb,c3) { cpustate->_E = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 0,E=(XY+o) */
+OP(xycb,c4) { cpustate->_H = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 0,H=(XY+o) */
+OP(xycb,c5) { cpustate->_L = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 0,L=(XY+o) */
+OP(xycb,c6) { WM(cpustate, cpustate->ea, SET(0,RM(cpustate, cpustate->ea)) ); } /* SET 0,(XY+o) */
+OP(xycb,c7) { cpustate->_A = SET(0, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 0,A=(XY+o) */
+
+OP(xycb,c8) { cpustate->_B = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 1,B=(XY+o) */
+OP(xycb,c9) { cpustate->_C = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 1,C=(XY+o) */
+OP(xycb,ca) { cpustate->_D = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 1,D=(XY+o) */
+OP(xycb,cb) { cpustate->_E = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 1,E=(XY+o) */
+OP(xycb,cc) { cpustate->_H = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 1,H=(XY+o) */
+OP(xycb,cd) { cpustate->_L = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 1,L=(XY+o) */
+OP(xycb,ce) { WM(cpustate, cpustate->ea, SET(1,RM(cpustate, cpustate->ea)) ); } /* SET 1,(XY+o) */
+OP(xycb,cf) { cpustate->_A = SET(1, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 1,A=(XY+o) */
+
+OP(xycb,d0) { cpustate->_B = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 2,B=(XY+o) */
+OP(xycb,d1) { cpustate->_C = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 2,C=(XY+o) */
+OP(xycb,d2) { cpustate->_D = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 2,D=(XY+o) */
+OP(xycb,d3) { cpustate->_E = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 2,E=(XY+o) */
+OP(xycb,d4) { cpustate->_H = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 2,H=(XY+o) */
+OP(xycb,d5) { cpustate->_L = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 2,L=(XY+o) */
+OP(xycb,d6) { WM(cpustate, cpustate->ea, SET(2,RM(cpustate, cpustate->ea)) ); } /* SET 2,(XY+o) */
+OP(xycb,d7) { cpustate->_A = SET(2, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 2,A=(XY+o) */
+
+OP(xycb,d8) { cpustate->_B = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 3,B=(XY+o) */
+OP(xycb,d9) { cpustate->_C = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 3,C=(XY+o) */
+OP(xycb,da) { cpustate->_D = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 3,D=(XY+o) */
+OP(xycb,db) { cpustate->_E = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 3,E=(XY+o) */
+OP(xycb,dc) { cpustate->_H = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 3,H=(XY+o) */
+OP(xycb,dd) { cpustate->_L = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 3,L=(XY+o) */
+OP(xycb,de) { WM(cpustate, cpustate->ea, SET(3,RM(cpustate, cpustate->ea)) ); } /* SET 3,(XY+o) */
+OP(xycb,df) { cpustate->_A = SET(3, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 3,A=(XY+o) */
+
+OP(xycb,e0) { cpustate->_B = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 4,B=(XY+o) */
+OP(xycb,e1) { cpustate->_C = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 4,C=(XY+o) */
+OP(xycb,e2) { cpustate->_D = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 4,D=(XY+o) */
+OP(xycb,e3) { cpustate->_E = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 4,E=(XY+o) */
+OP(xycb,e4) { cpustate->_H = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 4,H=(XY+o) */
+OP(xycb,e5) { cpustate->_L = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 4,L=(XY+o) */
+OP(xycb,e6) { WM(cpustate, cpustate->ea, SET(4,RM(cpustate, cpustate->ea)) ); } /* SET 4,(XY+o) */
+OP(xycb,e7) { cpustate->_A = SET(4, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 4,A=(XY+o) */
+
+OP(xycb,e8) { cpustate->_B = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 5,B=(XY+o) */
+OP(xycb,e9) { cpustate->_C = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 5,C=(XY+o) */
+OP(xycb,ea) { cpustate->_D = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 5,D=(XY+o) */
+OP(xycb,eb) { cpustate->_E = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 5,E=(XY+o) */
+OP(xycb,ec) { cpustate->_H = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 5,H=(XY+o) */
+OP(xycb,ed) { cpustate->_L = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 5,L=(XY+o) */
+OP(xycb,ee) { WM(cpustate, cpustate->ea, SET(5,RM(cpustate, cpustate->ea)) ); } /* SET 5,(XY+o) */
+OP(xycb,ef) { cpustate->_A = SET(5, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 5,A=(XY+o) */
+
+OP(xycb,f0) { cpustate->_B = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 6,B=(XY+o) */
+OP(xycb,f1) { cpustate->_C = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 6,C=(XY+o) */
+OP(xycb,f2) { cpustate->_D = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 6,D=(XY+o) */
+OP(xycb,f3) { cpustate->_E = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 6,E=(XY+o) */
+OP(xycb,f4) { cpustate->_H = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 6,H=(XY+o) */
+OP(xycb,f5) { cpustate->_L = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 6,L=(XY+o) */
+OP(xycb,f6) { WM(cpustate, cpustate->ea, SET(6,RM(cpustate, cpustate->ea)) ); } /* SET 6,(XY+o) */
+OP(xycb,f7) { cpustate->_A = SET(6, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 6,A=(XY+o) */
+
+OP(xycb,f8) { cpustate->_B = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_B ); } /* SET 7,B=(XY+o) */
+OP(xycb,f9) { cpustate->_C = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_C ); } /* SET 7,C=(XY+o) */
+OP(xycb,fa) { cpustate->_D = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_D ); } /* SET 7,D=(XY+o) */
+OP(xycb,fb) { cpustate->_E = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_E ); } /* SET 7,E=(XY+o) */
+OP(xycb,fc) { cpustate->_H = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_H ); } /* SET 7,H=(XY+o) */
+OP(xycb,fd) { cpustate->_L = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_L ); } /* SET 7,L=(XY+o) */
+OP(xycb,fe) { WM(cpustate, cpustate->ea, SET(7,RM(cpustate, cpustate->ea)) ); } /* SET 7,(XY+o) */
+OP(xycb,ff) { cpustate->_A = SET(7, RM(cpustate, cpustate->ea) ); WM(cpustate, cpustate->ea,cpustate->_A ); } /* SET 7,A=(XY+o) */
diff --git a/src/emu/cpu/z8/z8.c b/src/emu/cpu/z8/z8.c
index f3a897c66cb..75730ad6743 100644
--- a/src/emu/cpu/z8/z8.c
+++ b/src/emu/cpu/z8/z8.c
@@ -53,86 +53,86 @@ enum
Z8_REGISTER_SPL
};
-#define Z8_P3_DAV0 0x04 /* not supported */
-#define Z8_P3_DAV1 0x08 /* not supported */
-#define Z8_P3_DAV2 0x02 /* not supported */
-#define Z8_P3_RDY0 0x20 /* not supported */
-#define Z8_P3_RDY1 0x10 /* not supported */
-#define Z8_P3_RDY2 0x40 /* not supported */
-#define Z8_P3_IRQ0 0x04 /* not supported */
-#define Z8_P3_IRQ1 0x08 /* not supported */
-#define Z8_P3_IRQ2 0x02 /* not supported */
-#define Z8_P3_IRQ3 0x01 /* not supported */
-#define Z8_P3_DI 0x01 /* not supported */
-#define Z8_P3_DO 0x80 /* not supported */
-#define Z8_P3_TIN 0x02 /* not supported */
-#define Z8_P3_TOUT 0x40 /* not supported */
-#define Z8_P3_DM 0x10 /* not supported */
-
-#define Z8_PRE0_COUNT_MODULO_N 0x01
-
-#define Z8_PRE1_COUNT_MODULO_N 0x01
-#define Z8_PRE1_INTERNAL_CLOCK 0x02
-
-#define Z8_TMR_LOAD_T0 0x01
-#define Z8_TMR_ENABLE_T0 0x02
-#define Z8_TMR_LOAD_T1 0x04
-#define Z8_TMR_ENABLE_T1 0x08
-#define Z8_TMR_TIN_MASK 0x30 /* not supported */
-#define Z8_TMR_TIN_EXTERNAL_CLK 0x00 /* not supported */
-#define Z8_TMR_TIN_GATE 0x10 /* not supported */
-#define Z8_TMR_TIN_TRIGGER 0x20 /* not supported */
-#define Z8_TMR_TIN_RETRIGGER 0x30 /* not supported */
-#define Z8_TMR_TOUT_MASK 0xc0 /* not supported */
-#define Z8_TMR_TOUT_OFF 0x00 /* not supported */
-#define Z8_TMR_TOUT_T0 0x40 /* not supported */
-#define Z8_TMR_TOUT_T1 0x80 /* not supported */
-#define Z8_TMR_TOUT_INTERNAL_CLK 0xc0 /* not supported */
-
-#define Z8_P01M_P0L_MODE_MASK 0x03
-#define Z8_P01M_P0L_MODE_OUTPUT 0x00
-#define Z8_P01M_P0L_MODE_INPUT 0x01
-#define Z8_P01M_P0L_MODE_A8_A11 0x02 /* not supported */
-#define Z8_P01M_INTERNAL_STACK 0x04
-#define Z8_P01M_P1_MODE_MASK 0x18
-#define Z8_P01M_P1_MODE_OUTPUT 0x00
-#define Z8_P01M_P1_MODE_INPUT 0x08
-#define Z8_P01M_P1_MODE_AD0_AD7 0x10 /* not supported */
-#define Z8_P01M_P1_MODE_HI_Z 0x18 /* not supported */
-#define Z8_P01M_EXTENDED_TIMING 0x20 /* not supported */
-#define Z8_P01M_P0H_MODE_MASK 0xc0
-#define Z8_P01M_P0H_MODE_OUTPUT 0x00
-#define Z8_P01M_P0H_MODE_INPUT 0x40
-#define Z8_P01M_P0H_MODE_A12_A15 0x80 /* not supported */
-
-#define Z8_P3M_P2_ACTIVE_PULLUPS 0x01 /* not supported */
-#define Z8_P3M_P0_STROBED 0x04 /* not supported */
-#define Z8_P3M_P33_P34_MASK 0x18
-#define Z8_P3M_P33_P34_INPUT_OUTPUT 0x00
-#define Z8_P3M_P33_P34_INPUT_DM 0x08 /* not supported */
-#define Z8_P3M_P33_P34_INPUT_DM_2 0x10 /* not supported */
-#define Z8_P3M_P33_P34_DAV1_RDY1 0x18 /* not supported */
-#define Z8_P3M_P2_STROBED 0x20 /* not supported */
-#define Z8_P3M_P3_SERIAL 0x40 /* not supported */
-#define Z8_P3M_PARITY 0x80 /* not supported */
-
-#define Z8_IMR_ENABLE 0x80 /* not supported */
-#define Z8_IMR_RAM_PROTECT 0x40 /* not supported */
-#define Z8_IMR_ENABLE_IRQ5 0x20 /* not supported */
-#define Z8_IMR_ENABLE_IRQ4 0x10 /* not supported */
-#define Z8_IMR_ENABLE_IRQ3 0x08 /* not supported */
-#define Z8_IMR_ENABLE_IRQ2 0x04 /* not supported */
-#define Z8_IMR_ENABLE_IRQ1 0x02 /* not supported */
-#define Z8_IMR_ENABLE_IRQ0 0x01 /* not supported */
-
-#define Z8_FLAGS_F1 0x01
-#define Z8_FLAGS_F2 0x02
-#define Z8_FLAGS_H 0x04
-#define Z8_FLAGS_D 0x08
-#define Z8_FLAGS_V 0x10
-#define Z8_FLAGS_S 0x20
-#define Z8_FLAGS_Z 0x40
-#define Z8_FLAGS_C 0x80
+#define Z8_P3_DAV0 0x04 /* not supported */
+#define Z8_P3_DAV1 0x08 /* not supported */
+#define Z8_P3_DAV2 0x02 /* not supported */
+#define Z8_P3_RDY0 0x20 /* not supported */
+#define Z8_P3_RDY1 0x10 /* not supported */
+#define Z8_P3_RDY2 0x40 /* not supported */
+#define Z8_P3_IRQ0 0x04 /* not supported */
+#define Z8_P3_IRQ1 0x08 /* not supported */
+#define Z8_P3_IRQ2 0x02 /* not supported */
+#define Z8_P3_IRQ3 0x01 /* not supported */
+#define Z8_P3_DI 0x01 /* not supported */
+#define Z8_P3_DO 0x80 /* not supported */
+#define Z8_P3_TIN 0x02 /* not supported */
+#define Z8_P3_TOUT 0x40 /* not supported */
+#define Z8_P3_DM 0x10 /* not supported */
+
+#define Z8_PRE0_COUNT_MODULO_N 0x01
+
+#define Z8_PRE1_COUNT_MODULO_N 0x01
+#define Z8_PRE1_INTERNAL_CLOCK 0x02
+
+#define Z8_TMR_LOAD_T0 0x01
+#define Z8_TMR_ENABLE_T0 0x02
+#define Z8_TMR_LOAD_T1 0x04
+#define Z8_TMR_ENABLE_T1 0x08
+#define Z8_TMR_TIN_MASK 0x30 /* not supported */
+#define Z8_TMR_TIN_EXTERNAL_CLK 0x00 /* not supported */
+#define Z8_TMR_TIN_GATE 0x10 /* not supported */
+#define Z8_TMR_TIN_TRIGGER 0x20 /* not supported */
+#define Z8_TMR_TIN_RETRIGGER 0x30 /* not supported */
+#define Z8_TMR_TOUT_MASK 0xc0 /* not supported */
+#define Z8_TMR_TOUT_OFF 0x00 /* not supported */
+#define Z8_TMR_TOUT_T0 0x40 /* not supported */
+#define Z8_TMR_TOUT_T1 0x80 /* not supported */
+#define Z8_TMR_TOUT_INTERNAL_CLK 0xc0 /* not supported */
+
+#define Z8_P01M_P0L_MODE_MASK 0x03
+#define Z8_P01M_P0L_MODE_OUTPUT 0x00
+#define Z8_P01M_P0L_MODE_INPUT 0x01
+#define Z8_P01M_P0L_MODE_A8_A11 0x02 /* not supported */
+#define Z8_P01M_INTERNAL_STACK 0x04
+#define Z8_P01M_P1_MODE_MASK 0x18
+#define Z8_P01M_P1_MODE_OUTPUT 0x00
+#define Z8_P01M_P1_MODE_INPUT 0x08
+#define Z8_P01M_P1_MODE_AD0_AD7 0x10 /* not supported */
+#define Z8_P01M_P1_MODE_HI_Z 0x18 /* not supported */
+#define Z8_P01M_EXTENDED_TIMING 0x20 /* not supported */
+#define Z8_P01M_P0H_MODE_MASK 0xc0
+#define Z8_P01M_P0H_MODE_OUTPUT 0x00
+#define Z8_P01M_P0H_MODE_INPUT 0x40
+#define Z8_P01M_P0H_MODE_A12_A15 0x80 /* not supported */
+
+#define Z8_P3M_P2_ACTIVE_PULLUPS 0x01 /* not supported */
+#define Z8_P3M_P0_STROBED 0x04 /* not supported */
+#define Z8_P3M_P33_P34_MASK 0x18
+#define Z8_P3M_P33_P34_INPUT_OUTPUT 0x00
+#define Z8_P3M_P33_P34_INPUT_DM 0x08 /* not supported */
+#define Z8_P3M_P33_P34_INPUT_DM_2 0x10 /* not supported */
+#define Z8_P3M_P33_P34_DAV1_RDY1 0x18 /* not supported */
+#define Z8_P3M_P2_STROBED 0x20 /* not supported */
+#define Z8_P3M_P3_SERIAL 0x40 /* not supported */
+#define Z8_P3M_PARITY 0x80 /* not supported */
+
+#define Z8_IMR_ENABLE 0x80 /* not supported */
+#define Z8_IMR_RAM_PROTECT 0x40 /* not supported */
+#define Z8_IMR_ENABLE_IRQ5 0x20 /* not supported */
+#define Z8_IMR_ENABLE_IRQ4 0x10 /* not supported */
+#define Z8_IMR_ENABLE_IRQ3 0x08 /* not supported */
+#define Z8_IMR_ENABLE_IRQ2 0x04 /* not supported */
+#define Z8_IMR_ENABLE_IRQ1 0x02 /* not supported */
+#define Z8_IMR_ENABLE_IRQ0 0x01 /* not supported */
+
+#define Z8_FLAGS_F1 0x01
+#define Z8_FLAGS_F2 0x02
+#define Z8_FLAGS_H 0x04
+#define Z8_FLAGS_D 0x08
+#define Z8_FLAGS_V 0x10
+#define Z8_FLAGS_S 0x20
+#define Z8_FLAGS_Z 0x40
+#define Z8_FLAGS_C 0x80
enum
{
@@ -144,13 +144,13 @@ enum
MACROS
***************************************************************************/
-#define P01M cpustate->r[Z8_REGISTER_P01M]
-#define P2M cpustate->r[Z8_REGISTER_P2M]
-#define P3M cpustate->r[Z8_REGISTER_P3M]
-#define T0 cpustate->r[Z8_REGISTER_T0]
-#define T1 cpustate->r[Z8_REGISTER_T1]
-#define PRE0 cpustate->r[Z8_REGISTER_PRE0]
-#define PRE1 cpustate->r[Z8_REGISTER_PRE1]
+#define P01M cpustate->r[Z8_REGISTER_P01M]
+#define P2M cpustate->r[Z8_REGISTER_P2M]
+#define P3M cpustate->r[Z8_REGISTER_P3M]
+#define T0 cpustate->r[Z8_REGISTER_T0]
+#define T1 cpustate->r[Z8_REGISTER_T1]
+#define PRE0 cpustate->r[Z8_REGISTER_PRE0]
+#define PRE1 cpustate->r[Z8_REGISTER_PRE1]
/***************************************************************************
TYPE DEFINITIONS
@@ -158,29 +158,29 @@ enum
struct z8_state
{
- address_space *program;
- direct_read_data *direct;
- address_space *data;
- address_space *io;
+ address_space *program;
+ direct_read_data *direct;
+ address_space *data;
+ address_space *io;
/* registers */
- UINT16 pc; /* program counter */
- UINT8 r[256]; /* register file */
- UINT8 input[4]; /* port input latches */
- UINT8 output[4]; /* port output latches */
- UINT8 t0; /* timer 0 current count */
- UINT8 t1; /* timer 1 current count */
+ UINT16 pc; /* program counter */
+ UINT8 r[256]; /* register file */
+ UINT8 input[4]; /* port input latches */
+ UINT8 output[4]; /* port output latches */
+ UINT8 t0; /* timer 0 current count */
+ UINT8 t1; /* timer 1 current count */
/* fake registers */
- UINT16 fake_sp; /* fake stack pointer */
- UINT8 fake_r[16]; /* fake working registers */
+ UINT16 fake_sp; /* fake stack pointer */
+ UINT8 fake_r[16]; /* fake working registers */
/* interrupts */
- int irq[6]; /* interrupts */
+ int irq[6]; /* interrupts */
/* execution logic */
- int clock; /* clock */
- int icount; /* instruction counter */
+ int clock; /* clock */
+ int icount; /* instruction counter */
/* timers */
emu_timer *t0_timer;
@@ -219,16 +219,16 @@ INLINE UINT8 register_read(z8_state *cpustate, UINT8 offset)
case Z8_REGISTER_P0:
switch (P01M & Z8_P01M_P0L_MODE_MASK)
{
- case Z8_P01M_P0L_MODE_OUTPUT: data = cpustate->output[offset] & 0x0f; break;
- case Z8_P01M_P0L_MODE_INPUT: mask = 0x0f; break;
- default: /* A8...A11 */ data = 0x0f; break;
+ case Z8_P01M_P0L_MODE_OUTPUT: data = cpustate->output[offset] & 0x0f; break;
+ case Z8_P01M_P0L_MODE_INPUT: mask = 0x0f; break;
+ default: /* A8...A11 */ data = 0x0f; break;
}
switch (P01M & Z8_P01M_P0H_MODE_MASK)
{
- case Z8_P01M_P0H_MODE_OUTPUT: data |= cpustate->output[offset] & 0xf0; break;
- case Z8_P01M_P0H_MODE_INPUT: mask |= 0xf0; break;
- default: /* A12...A15 */ data |= 0xf0; break;
+ case Z8_P01M_P0H_MODE_OUTPUT: data |= cpustate->output[offset] & 0xf0; break;
+ case Z8_P01M_P0H_MODE_INPUT: mask |= 0xf0; break;
+ default: /* A12...A15 */ data |= 0xf0; break;
}
if (!(P3M & Z8_P3M_P0_STROBED))
@@ -242,9 +242,9 @@ INLINE UINT8 register_read(z8_state *cpustate, UINT8 offset)
case Z8_REGISTER_P1:
switch (P01M & Z8_P01M_P1_MODE_MASK)
{
- case Z8_P01M_P1_MODE_OUTPUT: data = cpustate->output[offset]; break;
- case Z8_P01M_P1_MODE_INPUT: mask = 0xff; break;
- default: /* AD0..AD7 */ data = 0xff; break;
+ case Z8_P01M_P1_MODE_OUTPUT: data = cpustate->output[offset]; break;
+ case Z8_P01M_P1_MODE_INPUT: mask = 0xff; break;
+ default: /* AD0..AD7 */ data = 0xff; break;
}
if ((P3M & Z8_P3M_P33_P34_MASK) != Z8_P3M_P33_P34_DAV1_RDY1)
@@ -514,12 +514,12 @@ INLINE void set_flag(z8_state *cpustate, UINT8 flag, int state)
cpustate->r[Z8_REGISTER_FLAGS] &= ~flag;
}
-#define set_flag_h(state) set_flag(cpustate, Z8_FLAGS_H, state);
-#define set_flag_d(state) set_flag(cpustate, Z8_FLAGS_D, state);
-#define set_flag_v(state) set_flag(cpustate, Z8_FLAGS_V, state);
-#define set_flag_s(state) set_flag(cpustate, Z8_FLAGS_S, state);
-#define set_flag_z(state) set_flag(cpustate, Z8_FLAGS_Z, state);
-#define set_flag_c(state) set_flag(cpustate, Z8_FLAGS_C, state);
+#define set_flag_h(state) set_flag(cpustate, Z8_FLAGS_H, state);
+#define set_flag_d(state) set_flag(cpustate, Z8_FLAGS_D, state);
+#define set_flag_v(state) set_flag(cpustate, Z8_FLAGS_V, state);
+#define set_flag_s(state) set_flag(cpustate, Z8_FLAGS_S, state);
+#define set_flag_z(state) set_flag(cpustate, Z8_FLAGS_Z, state);
+#define set_flag_c(state) set_flag(cpustate, Z8_FLAGS_C, state);
/***************************************************************************
OPCODE HANDLERS
@@ -542,60 +542,60 @@ typedef void (*z8_opcode_func) (z8_state *cpustate, UINT8 opcode, int *cycles);
struct z8_opcode_map
{
- z8_opcode_func function;
- int execution_cycles;
- int pipeline_cycles;
+ z8_opcode_func function;
+ int execution_cycles;
+ int pipeline_cycles;
};
static const z8_opcode_map Z8601_OPCODE_MAP[] =
{
- { dec_R1, 6, 5 }, { dec_IR1, 6, 5 }, { add_r1_r2, 10, 5 }, { add_r1_Ir2, 10, 5 }, { add_R2_R1, 10, 5 }, { add_IR2_R1, 10, 5 }, { add_R1_IM, 10, 5 }, { add_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { dec_R1, 6, 5 }, { dec_IR1, 6, 5 }, { add_r1_r2, 10, 5 }, { add_r1_Ir2, 10, 5 }, { add_R2_R1, 10, 5 }, { add_IR2_R1, 10, 5 }, { add_R1_IM, 10, 5 }, { add_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { rlc_R1, 6, 5 }, { rlc_IR1, 6, 5 }, { adc_r1_r2, 6, 5 }, { adc_r1_Ir2, 6, 5 }, { adc_R2_R1, 10, 5 }, { adc_IR2_R1, 10, 5 }, { adc_R1_IM, 10, 5 }, { adc_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { rlc_R1, 6, 5 }, { rlc_IR1, 6, 5 }, { adc_r1_r2, 6, 5 }, { adc_r1_Ir2, 6, 5 }, { adc_R2_R1, 10, 5 }, { adc_IR2_R1, 10, 5 }, { adc_R1_IM, 10, 5 }, { adc_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { inc_R1, 6, 5 }, { inc_IR1, 6, 5 }, { sub_r1_r2, 6, 5 }, { sub_r1_Ir2, 6, 5 }, { sub_R2_R1, 10, 5 }, { sub_IR2_R1, 10, 5 }, { sub_R1_IM, 10, 5 }, { sub_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { inc_R1, 6, 5 }, { inc_IR1, 6, 5 }, { sub_r1_r2, 6, 5 }, { sub_r1_Ir2, 6, 5 }, { sub_R2_R1, 10, 5 }, { sub_IR2_R1, 10, 5 }, { sub_R1_IM, 10, 5 }, { sub_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { jp_IRR1, 8, 0 }, { srp_IM, 6, 1 }, { sbc_r1_r2, 6, 5 }, { sbc_r1_Ir2, 6, 5 }, { sbc_R2_R1, 10, 5 }, { sbc_IR2_R1, 10, 5 }, { sbc_R1_IM, 10, 5 }, { sbc_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { jp_IRR1, 8, 0 }, { srp_IM, 6, 1 }, { sbc_r1_r2, 6, 5 }, { sbc_r1_Ir2, 6, 5 }, { sbc_R2_R1, 10, 5 }, { sbc_IR2_R1, 10, 5 }, { sbc_R1_IM, 10, 5 }, { sbc_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { da_R1, 8, 5 }, { da_IR1, 8, 5 }, { or_r1_r2, 6, 5 }, { or_r1_Ir2, 6, 5 }, { or_R2_R1, 10, 5 }, { or_IR2_R1, 10, 5 }, { or_R1_IM, 10, 5 }, { or_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { da_R1, 8, 5 }, { da_IR1, 8, 5 }, { or_r1_r2, 6, 5 }, { or_r1_Ir2, 6, 5 }, { or_R2_R1, 10, 5 }, { or_IR2_R1, 10, 5 }, { or_R1_IM, 10, 5 }, { or_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { pop_R1, 10, 5 }, { pop_IR1, 10, 5 }, { and_r1_r2, 6, 5 }, { and_r1_Ir2, 6, 5 }, { and_R2_R1, 10, 5 }, { and_IR2_R1, 10, 5 }, { and_R1_IM, 10, 5 }, { and_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { pop_R1, 10, 5 }, { pop_IR1, 10, 5 }, { and_r1_r2, 6, 5 }, { and_r1_Ir2, 6, 5 }, { and_R2_R1, 10, 5 }, { and_IR2_R1, 10, 5 }, { and_R1_IM, 10, 5 }, { and_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { com_R1, 6, 5 }, { com_IR1, 6, 5 }, { tcm_r1_r2, 6, 5 }, { tcm_r1_Ir2, 6, 5 }, { tcm_R2_R1, 10, 5 }, { tcm_IR2_R1, 10, 5 }, { tcm_R1_IM, 10, 5 }, { tcm_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { com_R1, 6, 5 }, { com_IR1, 6, 5 }, { tcm_r1_r2, 6, 5 }, { tcm_r1_Ir2, 6, 5 }, { tcm_R2_R1, 10, 5 }, { tcm_IR2_R1, 10, 5 }, { tcm_R1_IM, 10, 5 }, { tcm_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { push_R2, 10, 1 }, { push_IR2, 12, 1 },{ tm_r1_r2, 6, 5 }, { tm_r1_Ir2, 6, 5 }, { tm_R2_R1, 10, 5 }, { tm_IR2_R1, 10, 5 }, { tm_R1_IM, 10, 5 }, { tm_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
+ { push_R2, 10, 1 }, { push_IR2, 12, 1 },{ tm_r1_r2, 6, 5 }, { tm_r1_Ir2, 6, 5 }, { tm_R2_R1, 10, 5 }, { tm_IR2_R1, 10, 5 }, { tm_R1_IM, 10, 5 }, { tm_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { illegal, 0, 0 },
- { decw_RR1, 10, 5 },{ decw_IR1, 10, 5 },{ lde_r1_Irr2, 12, 0 }, { ldei_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { di, 6, 1 },
+ { decw_RR1, 10, 5 },{ decw_IR1, 10, 5 },{ lde_r1_Irr2, 12, 0 }, { ldei_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { di, 6, 1 },
- { rl_R1, 6, 5 }, { rl_IR1, 6, 5 }, { lde_r2_Irr1, 12, 0 }, { ldei_Ir2_Irr1, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ei, 6, 1 },
+ { rl_R1, 6, 5 }, { rl_IR1, 6, 5 }, { lde_r2_Irr1, 12, 0 }, { ldei_Ir2_Irr1, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ei, 6, 1 },
- { incw_RR1, 10, 5 },{ incw_IR1, 10, 5 },{ cp_r1_r2, 6, 5 }, { cp_r1_Ir2, 6, 5 }, { cp_R2_R1, 10, 5 }, { cp_IR2_R1, 10, 5 }, { cp_R1_IM, 10, 5 }, { cp_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ret, 14, 0 },
+ { incw_RR1, 10, 5 },{ incw_IR1, 10, 5 },{ cp_r1_r2, 6, 5 }, { cp_r1_Ir2, 6, 5 }, { cp_R2_R1, 10, 5 }, { cp_IR2_R1, 10, 5 }, { cp_R1_IM, 10, 5 }, { cp_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ret, 14, 0 },
- { clr_R1, 6, 5 }, { clr_IR1, 6, 5 }, { xor_r1_r2, 6, 5 }, { xor_r1_Ir2, 6, 5 }, { xor_R2_R1, 10, 5 }, { xor_IR2_R1, 10, 5 }, { xor_R1_IM, 10, 5 }, { xor_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { iret, 16, 0 },
+ { clr_R1, 6, 5 }, { clr_IR1, 6, 5 }, { xor_r1_r2, 6, 5 }, { xor_r1_Ir2, 6, 5 }, { xor_R2_R1, 10, 5 }, { xor_IR2_R1, 10, 5 }, { xor_R1_IM, 10, 5 }, { xor_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { iret, 16, 0 },
- { rrc_R1, 6, 5 }, { rrc_IR1, 6, 5 }, { ldc_r1_Irr2, 12, 0 }, { ldci_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { ld_r1_x_R2, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { rcf, 6, 5 },
+ { rrc_R1, 6, 5 }, { rrc_IR1, 6, 5 }, { ldc_r1_Irr2, 12, 0 }, { ldci_Ir1_Irr2, 18, 0 },{ illegal, 0, 0 }, { illegal, 0, 0 }, { illegal, 0, 0 }, { ld_r1_x_R2, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { rcf, 6, 5 },
- { sra_R1, 6, 5 }, { sra_IR1, 6, 5 }, { ldc_r2_Irr1, 12, 0 }, { ldci_Ir2_Irr1, 18, 0 },{ call_IRR1, 20, 0 }, { illegal, 0, 0 }, { call_DA, 20, 0 }, { ld_r2_x_R1, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { scf, 6, 5 },
+ { sra_R1, 6, 5 }, { sra_IR1, 6, 5 }, { ldc_r2_Irr1, 12, 0 }, { ldci_Ir2_Irr1, 18, 0 },{ call_IRR1, 20, 0 }, { illegal, 0, 0 }, { call_DA, 20, 0 }, { ld_r2_x_R1, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { scf, 6, 5 },
- { rr_R1, 6, 5 }, { rr_IR1, 6, 5 }, { illegal, 0, 0 }, { ld_r1_Ir2, 6, 5 }, { ld_R2_R1, 10, 5 }, { ld_IR2_R1, 10, 5 }, { ld_R1_IM, 10, 5 }, { ld_IR1_IM, 10, 5 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ccf, 6, 5 },
+ { rr_R1, 6, 5 }, { rr_IR1, 6, 5 }, { illegal, 0, 0 }, { ld_r1_Ir2, 6, 5 }, { ld_R2_R1, 10, 5 }, { ld_IR2_R1, 10, 5 }, { ld_R1_IM, 10, 5 }, { ld_IR1_IM, 10, 5 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { ccf, 6, 5 },
- { swap_R1, 8, 5 }, { swap_IR1, 8, 5 }, { illegal, 0, 0 }, { ld_Ir1_r2, 6, 5 }, { illegal, 0, 0 }, { ld_R2_IR1, 10, 5 }, { illegal, 0, 0 }, { illegal, 0, 0 },
- { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { nop, 6, 0 },
+ { swap_R1, 8, 5 }, { swap_IR1, 8, 5 }, { illegal, 0, 0 }, { ld_Ir1_r2, 6, 5 }, { illegal, 0, 0 }, { ld_R2_IR1, 10, 5 }, { illegal, 0, 0 }, { illegal, 0, 0 },
+ { ld_r1_R2, 6, 5 }, { ld_r2_R1, 6, 5 }, { djnz_r1_RA, 10, 5 }, { jr_cc_RA, 10, 0 }, { ld_r1_IM, 6, 5 }, { jp_cc_DA, 10, 0 }, { inc_r1, 6, 5 }, { nop, 6, 0 },
};
/***************************************************************************
@@ -794,12 +794,12 @@ static CPU_EXPORT_STRING( z8 )
switch (entry.index())
{
case STATE_GENFLAGS: string.printf("%c%c%c%c%c%c",
- cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_C ? 'C' : '.',
- cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_Z ? 'Z' : '.',
- cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_S ? 'S' : '.',
- cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_V ? 'V' : '.',
- cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_D ? 'D' : '.',
- cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_H ? 'H' : '.'); break;
+ cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_C ? 'C' : '.',
+ cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_Z ? 'Z' : '.',
+ cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_S ? 'S' : '.',
+ cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_V ? 'V' : '.',
+ cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_D ? 'D' : '.',
+ cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS_H ? 'H' : '.'); break;
}
}
@@ -813,10 +813,10 @@ static CPU_SET_INFO( z8 )
switch (state)
{
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: cpustate->irq[0] = info->i; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ1: cpustate->irq[1] = info->i; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ2: cpustate->irq[2] = info->i; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ3: cpustate->irq[3] = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: cpustate->irq[0] = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ1: cpustate->irq[1] = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ2: cpustate->irq[2] = info->i; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ3: cpustate->irq[3] = info->i; break;
}
}
@@ -827,46 +827,46 @@ static CPU_GET_INFO( z8 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z8_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 6; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 20; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 2; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z8_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 3; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 6; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 20; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 2; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z8); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z8); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z8); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z8); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z8); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z8); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z8); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(z8); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z8); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z8); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z8); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z8); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z8); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z8); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z8); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(z8); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Z8"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z8"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright MESS Team"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Z8"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z8"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.0"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright MESS Team"); break;
}
}
@@ -879,12 +879,12 @@ CPU_GET_INFO( z8601 )
switch (state)
{
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_2kb); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_2kb); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Z8601"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Z8601"); break;
- default: CPU_GET_INFO_CALL(z8); break;
+ default: CPU_GET_INFO_CALL(z8); break;
}
}
@@ -893,12 +893,12 @@ CPU_GET_INFO( ub8830d )
switch (state)
{
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_2kb); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_2kb); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "UB8830D"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "UB8830D"); break;
- default: CPU_GET_INFO_CALL(z8); break;
+ default: CPU_GET_INFO_CALL(z8); break;
}
}
@@ -907,12 +907,12 @@ CPU_GET_INFO( z8611 )
switch (state)
{
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_4kb); break;
+ case CPUINFO_PTR_INTERNAL_MEMORY_MAP + AS_PROGRAM: info->internal_map8 = ADDRESS_MAP_NAME(program_4kb); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Z8611"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Z8611"); break;
- default: CPU_GET_INFO_CALL(z8); break;
+ default: CPU_GET_INFO_CALL(z8); break;
}
}
diff --git a/src/emu/cpu/z8/z8dasm.c b/src/emu/cpu/z8/z8dasm.c
index 1e8eba79c4d..285a970a8b3 100644
--- a/src/emu/cpu/z8/z8dasm.c
+++ b/src/emu/cpu/z8/z8dasm.c
@@ -36,45 +36,45 @@ static const char *const CONDITION_CODE[16] =
MACROS
***************************************************************************/
-#define r "R%u"
-#define Ir "@R%u"
-#define R "%02Xh"
-#define RR "%02Xh"
-#define IR "@%02Xh"
-#define Irr "@RR%u"
-#define IRR "@%02Xh"
-#define IM "#%02Xh"
-#define X "%02Xh(R%u)"
-#define DA "%04Xh"
-#define RA "%04Xh"
+#define r "R%u"
+#define Ir "@R%u"
+#define R "%02Xh"
+#define RR "%02Xh"
+#define IR "@%02Xh"
+#define Irr "@RR%u"
+#define IRR "@%02Xh"
+#define IM "#%02Xh"
+#define X "%02Xh(R%u)"
+#define DA "%04Xh"
+#define RA "%04Xh"
-#define B0 oprom[0]
-#define B1 oprom[1]
-#define B0H (B0 >> 4)
-#define B0L (B0 & 0x0f)
-#define OPH (opcode >> 4)
+#define B0 oprom[0]
+#define B1 oprom[1]
+#define B0H (B0 >> 4)
+#define B0L (B0 & 0x0f)
+#define OPH (opcode >> 4)
-#define ARG(_formatting, _value) { if (argc) dst += sprintf(dst, ", "); dst += sprintf(dst, _formatting, _value); argc++; }
+#define ARG(_formatting, _value) { if (argc) dst += sprintf(dst, ", "); dst += sprintf(dst, _formatting, _value); argc++; }
-#define arg_name(_value) ARG("%s", REGISTER_NAME[_value])
-#define arg_cc ARG("%s", CONDITION_CODE[OPH])
-#define arg_r(_value) ARG(r, _value)
-#define arg_Ir(_value) ARG(Ir, _value)
-#define arg_Irr(_value) ARG(Irr, _value & 0x0f)
-#define arg_R(_value) if ((_value & 0xf0) == 0xe0) ARG(r, _value & 0x0f) else if ((_value < 4) || (_value >= 0xf0)) arg_name(_value) else ARG(R, _value)
-#define arg_RR(_value) if ((_value & 0xf0) == 0xe0) ARG(r, _value & 0x0f) else ARG(R, _value)
-#define arg_IR(_value) if ((_value & 0xf0) == 0xe0) ARG(Ir, _value & 0x0f) else ARG(IR, _value)
-#define arg_IRR(_value) if ((_value & 0xf0) == 0xe0) ARG(Irr, _value & 0x0f) else ARG(IRR, _value)
-#define arg_IM(_value) ARG(IM, _value)
-#define arg_RA ARG(RA, pc + (INT8)B0 + 2)
-#define arg_DA ARG(DA, B0 << 8 | B1)
-#define arg_X(_value1, _value2) { if (argc) dst += sprintf(dst, ", "); dst += sprintf(dst, X, _value1, _value2); argc++; }
+#define arg_name(_value) ARG("%s", REGISTER_NAME[_value])
+#define arg_cc ARG("%s", CONDITION_CODE[OPH])
+#define arg_r(_value) ARG(r, _value)
+#define arg_Ir(_value) ARG(Ir, _value)
+#define arg_Irr(_value) ARG(Irr, _value & 0x0f)
+#define arg_R(_value) if ((_value & 0xf0) == 0xe0) ARG(r, _value & 0x0f) else if ((_value < 4) || (_value >= 0xf0)) arg_name(_value) else ARG(R, _value)
+#define arg_RR(_value) if ((_value & 0xf0) == 0xe0) ARG(r, _value & 0x0f) else ARG(R, _value)
+#define arg_IR(_value) if ((_value & 0xf0) == 0xe0) ARG(Ir, _value & 0x0f) else ARG(IR, _value)
+#define arg_IRR(_value) if ((_value & 0xf0) == 0xe0) ARG(Irr, _value & 0x0f) else ARG(IRR, _value)
+#define arg_IM(_value) ARG(IM, _value)
+#define arg_RA ARG(RA, pc + (INT8)B0 + 2)
+#define arg_DA ARG(DA, B0 << 8 | B1)
+#define arg_X(_value1, _value2) { if (argc) dst += sprintf(dst, ", "); dst += sprintf(dst, X, _value1, _value2); argc++; }
-#define illegal dst += sprintf(dst, "Illegal")
-#define mnemonic(_mnemonic) dst += sprintf(dst, "%-5s", _mnemonic)
-#define bytes(_count) oprom += (_count - 1)
-#define step_over flags = DASMFLAG_STEP_OVER
-#define step_out flags = DASMFLAG_STEP_OUT
+#define illegal dst += sprintf(dst, "Illegal")
+#define mnemonic(_mnemonic) dst += sprintf(dst, "%-5s", _mnemonic)
+#define bytes(_count) oprom += (_count - 1)
+#define step_over flags = DASMFLAG_STEP_OVER
+#define step_out flags = DASMFLAG_STEP_OUT
/***************************************************************************
DISASSEMBLER
@@ -100,277 +100,277 @@ CPU_DISASSEMBLE( z8 )
default:
switch (opcode)
{
- case 0x00: mnemonic("DEC"); arg_R(B0); bytes(2); break;
- case 0x01: mnemonic("DEC"); arg_IR(B0); bytes(2); break;
- case 0x02: mnemonic("ADD"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x03: mnemonic("ADD"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x04: mnemonic("ADD"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x05: mnemonic("ADD"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x06: mnemonic("ADD"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x07: mnemonic("ADD"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x08: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x09: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x0a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x0b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x0c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x0d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x0e: mnemonic("INC"); arg_r(OPH); break;
- case 0x0f: illegal; break;
+ case 0x00: mnemonic("DEC"); arg_R(B0); bytes(2); break;
+ case 0x01: mnemonic("DEC"); arg_IR(B0); bytes(2); break;
+ case 0x02: mnemonic("ADD"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x03: mnemonic("ADD"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x04: mnemonic("ADD"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x05: mnemonic("ADD"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x06: mnemonic("ADD"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x07: mnemonic("ADD"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x08: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x09: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x0a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x0b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x0c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x0d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x0e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x0f: illegal; break;
- case 0x10: mnemonic("RLC"); arg_R(B0); bytes(2); break;
- case 0x11: mnemonic("RLC"); arg_IR(B0); bytes(2); break;
- case 0x12: mnemonic("ADC"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x13: mnemonic("ADC"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x14: mnemonic("ADC"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x15: mnemonic("ADC"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x16: mnemonic("ADC"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x17: mnemonic("ADC"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x18: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x19: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x1a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x1b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x1c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x1d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x1e: mnemonic("INC"); arg_r(OPH); break;
- case 0x1f: illegal; break;
+ case 0x10: mnemonic("RLC"); arg_R(B0); bytes(2); break;
+ case 0x11: mnemonic("RLC"); arg_IR(B0); bytes(2); break;
+ case 0x12: mnemonic("ADC"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x13: mnemonic("ADC"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x14: mnemonic("ADC"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x15: mnemonic("ADC"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x16: mnemonic("ADC"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x17: mnemonic("ADC"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x18: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x19: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x1a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x1b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x1c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x1d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x1e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x1f: illegal; break;
- case 0x20: mnemonic("INC"); arg_R(B0); bytes(2); break;
- case 0x21: mnemonic("INC"); arg_IR(B0); bytes(2); break;
- case 0x22: mnemonic("SUB"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x23: mnemonic("SUB"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x24: mnemonic("SUB"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x25: mnemonic("SUB"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x26: mnemonic("SUB"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x27: mnemonic("SUB"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x28: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x29: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x2a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x2b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x2c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x2d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x2e: mnemonic("INC"); arg_r(OPH); break;
- case 0x2f: illegal; break;
+ case 0x20: mnemonic("INC"); arg_R(B0); bytes(2); break;
+ case 0x21: mnemonic("INC"); arg_IR(B0); bytes(2); break;
+ case 0x22: mnemonic("SUB"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x23: mnemonic("SUB"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x24: mnemonic("SUB"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x25: mnemonic("SUB"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x26: mnemonic("SUB"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x27: mnemonic("SUB"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x28: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x29: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x2a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x2b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x2c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x2d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x2e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x2f: illegal; break;
- case 0x30: mnemonic("JP"); arg_IRR(B0); bytes(2); break;
- case 0x31: mnemonic("SRP"); arg_IM(*oprom++); break;
- case 0x32: mnemonic("SBC"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x33: mnemonic("SBC"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x34: mnemonic("SBC"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x35: mnemonic("SBC"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x36: mnemonic("SBC"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x37: mnemonic("SBC"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x38: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x39: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x3a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x3b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x3c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x3d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x3e: mnemonic("INC"); arg_r(OPH); break;
- case 0x3f: illegal; break;
+ case 0x30: mnemonic("JP"); arg_IRR(B0); bytes(2); break;
+ case 0x31: mnemonic("SRP"); arg_IM(*oprom++); break;
+ case 0x32: mnemonic("SBC"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x33: mnemonic("SBC"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x34: mnemonic("SBC"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x35: mnemonic("SBC"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x36: mnemonic("SBC"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x37: mnemonic("SBC"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x38: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x39: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x3a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x3b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x3c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x3d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x3e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x3f: illegal; break;
- case 0x40: mnemonic("DA"); arg_R(B0); bytes(2); break;
- case 0x41: mnemonic("DA"); arg_IR(B0); bytes(2); break;
- case 0x42: mnemonic("OR"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x43: mnemonic("OR"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x44: mnemonic("OR"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x45: mnemonic("OR"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x46: mnemonic("OR"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x47: mnemonic("OR"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x48: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x49: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x4a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x4b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x4c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x4d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x4e: mnemonic("INC"); arg_r(OPH); break;
- case 0x4f: illegal; /* mnemonic("WDH"); */ break;
+ case 0x40: mnemonic("DA"); arg_R(B0); bytes(2); break;
+ case 0x41: mnemonic("DA"); arg_IR(B0); bytes(2); break;
+ case 0x42: mnemonic("OR"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x43: mnemonic("OR"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x44: mnemonic("OR"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x45: mnemonic("OR"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x46: mnemonic("OR"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x47: mnemonic("OR"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x48: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x49: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x4a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x4b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x4c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x4d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x4e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x4f: illegal; /* mnemonic("WDH"); */ break;
- case 0x50: mnemonic("POP"); arg_R(B0); bytes(2); break;
- case 0x51: mnemonic("POP"); arg_IR(B0); bytes(2); break;
- case 0x52: mnemonic("AND"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x53: mnemonic("AND"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x54: mnemonic("AND"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x55: mnemonic("AND"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x56: mnemonic("AND"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x57: mnemonic("AND"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x58: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x59: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x5a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x5b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x5c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x5d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x5e: mnemonic("INC"); arg_r(OPH); break;
- case 0x5f: illegal; /* mnemonic("WDT"); */ break;
+ case 0x50: mnemonic("POP"); arg_R(B0); bytes(2); break;
+ case 0x51: mnemonic("POP"); arg_IR(B0); bytes(2); break;
+ case 0x52: mnemonic("AND"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x53: mnemonic("AND"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x54: mnemonic("AND"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x55: mnemonic("AND"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x56: mnemonic("AND"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x57: mnemonic("AND"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x58: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x59: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x5a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x5b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x5c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x5d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x5e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x5f: illegal; /* mnemonic("WDT"); */ break;
- case 0x60: mnemonic("COM"); arg_R(B0); bytes(2); break;
- case 0x61: mnemonic("COM"); arg_IR(B0); bytes(2); break;
- case 0x62: mnemonic("TCM"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x63: mnemonic("TCM"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x64: mnemonic("TCM"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x65: mnemonic("TCM"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x66: mnemonic("TCM"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x67: mnemonic("TCM"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x68: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x69: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x6a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x6b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x6c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x6d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x6e: mnemonic("INC"); arg_r(OPH); break;
- case 0x6f: illegal; /* mnemonic("STOP"); */ break;
+ case 0x60: mnemonic("COM"); arg_R(B0); bytes(2); break;
+ case 0x61: mnemonic("COM"); arg_IR(B0); bytes(2); break;
+ case 0x62: mnemonic("TCM"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x63: mnemonic("TCM"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x64: mnemonic("TCM"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x65: mnemonic("TCM"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x66: mnemonic("TCM"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x67: mnemonic("TCM"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x68: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x69: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x6a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x6b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x6c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x6d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x6e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x6f: illegal; /* mnemonic("STOP"); */ break;
- case 0x70: mnemonic("PUSH"); arg_R(B0); bytes(2); break;
- case 0x71: mnemonic("PUSH"); arg_IR(B0); bytes(2); break;
- case 0x72: mnemonic("TM"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0x73: mnemonic("TM"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0x74: mnemonic("TM"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0x75: mnemonic("TM"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0x76: mnemonic("TM"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0x77: mnemonic("TM"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0x78: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x79: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x7a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x7b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x7c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x7d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x7e: mnemonic("INC"); arg_r(OPH); break;
- case 0x7f: illegal; /* mnemonic("HALT"); */ break;
+ case 0x70: mnemonic("PUSH"); arg_R(B0); bytes(2); break;
+ case 0x71: mnemonic("PUSH"); arg_IR(B0); bytes(2); break;
+ case 0x72: mnemonic("TM"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0x73: mnemonic("TM"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0x74: mnemonic("TM"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0x75: mnemonic("TM"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0x76: mnemonic("TM"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0x77: mnemonic("TM"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0x78: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x79: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x7a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x7b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x7c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x7d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x7e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x7f: illegal; /* mnemonic("HALT"); */ break;
- case 0x80: mnemonic("DECW"); arg_RR(*oprom++); break;
- case 0x81: mnemonic("DECW"); arg_IR(B0); bytes(2); break;
- case 0x82: mnemonic("LDE"); arg_r(B0H); arg_Irr(B0L); bytes(2); break;
- case 0x83: mnemonic("LDEI"); arg_Ir(B0H); arg_Irr(B0L); bytes(2); break;
- case 0x84: illegal; break;
- case 0x85: illegal; break;
- case 0x86: illegal; break;
- case 0x87: illegal; break;
- case 0x88: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x89: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x8a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x8b: mnemonic("JR"); arg_RA; bytes(2); break;
- case 0x8c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x8d: mnemonic("JP"); arg_DA; bytes(3); break;
- case 0x8e: mnemonic("INC"); arg_r(OPH); break;
- case 0x8f: mnemonic("DI"); break;
+ case 0x80: mnemonic("DECW"); arg_RR(*oprom++); break;
+ case 0x81: mnemonic("DECW"); arg_IR(B0); bytes(2); break;
+ case 0x82: mnemonic("LDE"); arg_r(B0H); arg_Irr(B0L); bytes(2); break;
+ case 0x83: mnemonic("LDEI"); arg_Ir(B0H); arg_Irr(B0L); bytes(2); break;
+ case 0x84: illegal; break;
+ case 0x85: illegal; break;
+ case 0x86: illegal; break;
+ case 0x87: illegal; break;
+ case 0x88: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x89: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x8a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x8b: mnemonic("JR"); arg_RA; bytes(2); break;
+ case 0x8c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x8d: mnemonic("JP"); arg_DA; bytes(3); break;
+ case 0x8e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x8f: mnemonic("DI"); break;
- case 0x90: mnemonic("RL"); arg_R(B0); bytes(2); break;
- case 0x91: mnemonic("RL"); arg_IR(B0); bytes(2); break;
- case 0x92: mnemonic("LDE"); arg_r(B0L); arg_Irr(B0H); bytes(2); break;
- case 0x93: mnemonic("LDEI"); arg_Ir(B0L); arg_Irr(B0H); bytes(2); break;
- case 0x94: illegal; break;
- case 0x95: illegal; break;
- case 0x96: illegal; break;
- case 0x97: illegal; break;
- case 0x98: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0x99: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0x9a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0x9b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0x9c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0x9d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0x9e: mnemonic("INC"); arg_r(OPH); break;
- case 0x9f: mnemonic("EI"); break;
+ case 0x90: mnemonic("RL"); arg_R(B0); bytes(2); break;
+ case 0x91: mnemonic("RL"); arg_IR(B0); bytes(2); break;
+ case 0x92: mnemonic("LDE"); arg_r(B0L); arg_Irr(B0H); bytes(2); break;
+ case 0x93: mnemonic("LDEI"); arg_Ir(B0L); arg_Irr(B0H); bytes(2); break;
+ case 0x94: illegal; break;
+ case 0x95: illegal; break;
+ case 0x96: illegal; break;
+ case 0x97: illegal; break;
+ case 0x98: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0x99: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0x9a: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0x9b: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0x9c: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0x9d: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0x9e: mnemonic("INC"); arg_r(OPH); break;
+ case 0x9f: mnemonic("EI"); break;
- case 0xa0: mnemonic("INCW"); arg_RR(B0); bytes(2); break;
- case 0xa1: mnemonic("INCW"); arg_IR(B0); bytes(2); break;
- case 0xa2: mnemonic("CP"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0xa3: mnemonic("CP"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0xa4: mnemonic("CP"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0xa5: mnemonic("CP"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0xa6: mnemonic("CP"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0xa7: mnemonic("CP"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0xa8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0xa9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0xaa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0xab: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0xac: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0xad: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0xae: mnemonic("INC"); arg_r(OPH); break;
- case 0xaf: mnemonic("RET"); step_out; break;
+ case 0xa0: mnemonic("INCW"); arg_RR(B0); bytes(2); break;
+ case 0xa1: mnemonic("INCW"); arg_IR(B0); bytes(2); break;
+ case 0xa2: mnemonic("CP"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0xa3: mnemonic("CP"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0xa4: mnemonic("CP"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0xa5: mnemonic("CP"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0xa6: mnemonic("CP"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0xa7: mnemonic("CP"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0xa8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0xa9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0xaa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0xab: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0xac: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0xad: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0xae: mnemonic("INC"); arg_r(OPH); break;
+ case 0xaf: mnemonic("RET"); step_out; break;
- case 0xb0: mnemonic("CLR"); arg_R(B0); bytes(2); break;
- case 0xb1: mnemonic("CLR"); arg_IR(B0); bytes(2); break;
- case 0xb2: mnemonic("XOR"); arg_r(B0H); arg_r(B0L); bytes(2); break;
- case 0xb3: mnemonic("XOR"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0xb4: mnemonic("XOR"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0xb5: mnemonic("XOR"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0xb6: mnemonic("XOR"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0xb7: mnemonic("XOR"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0xb8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0xb9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0xba: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0xbb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0xbc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0xbd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0xbe: mnemonic("INC"); arg_r(OPH); break;
- case 0xbf: mnemonic("IRET"); step_out; break;
+ case 0xb0: mnemonic("CLR"); arg_R(B0); bytes(2); break;
+ case 0xb1: mnemonic("CLR"); arg_IR(B0); bytes(2); break;
+ case 0xb2: mnemonic("XOR"); arg_r(B0H); arg_r(B0L); bytes(2); break;
+ case 0xb3: mnemonic("XOR"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0xb4: mnemonic("XOR"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0xb5: mnemonic("XOR"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0xb6: mnemonic("XOR"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0xb7: mnemonic("XOR"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0xb8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0xb9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0xba: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0xbb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0xbc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0xbd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0xbe: mnemonic("INC"); arg_r(OPH); break;
+ case 0xbf: mnemonic("IRET"); step_out; break;
- case 0xc0: mnemonic("RRC"); arg_R(B0); bytes(2); break;
- case 0xc1: mnemonic("RRC"); arg_IR(B0); bytes(2); break;
- case 0xc2: mnemonic("LDC"); arg_r(B0H); arg_Irr(B0L); bytes(2); break;
- case 0xc3: mnemonic("LDCI"); arg_Ir(B0H); arg_Irr(B0L); bytes(2); break;
- case 0xc4: illegal; break;
- case 0xc5: illegal; break;
- case 0xc6: illegal; break;
- case 0xc7: mnemonic("LD"); arg_r(B0H); arg_X(B1, B0L); bytes(3); break;
- case 0xc8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0xc9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0xca: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0xcb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0xcc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0xcd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0xce: mnemonic("INC"); arg_r(OPH); break;
- case 0xcf: mnemonic("RCF"); break;
+ case 0xc0: mnemonic("RRC"); arg_R(B0); bytes(2); break;
+ case 0xc1: mnemonic("RRC"); arg_IR(B0); bytes(2); break;
+ case 0xc2: mnemonic("LDC"); arg_r(B0H); arg_Irr(B0L); bytes(2); break;
+ case 0xc3: mnemonic("LDCI"); arg_Ir(B0H); arg_Irr(B0L); bytes(2); break;
+ case 0xc4: illegal; break;
+ case 0xc5: illegal; break;
+ case 0xc6: illegal; break;
+ case 0xc7: mnemonic("LD"); arg_r(B0H); arg_X(B1, B0L); bytes(3); break;
+ case 0xc8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0xc9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0xca: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0xcb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0xcc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0xcd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0xce: mnemonic("INC"); arg_r(OPH); break;
+ case 0xcf: mnemonic("RCF"); break;
- case 0xd0: mnemonic("SRA"); arg_R(B0); bytes(2); break;
- case 0xd1: mnemonic("SRA"); arg_IR(B0); bytes(2); break;
- case 0xd2: mnemonic("LDC"); arg_Irr(B0L); arg_r(B0H); bytes(2); break;
- case 0xd3: mnemonic("LDCI"); arg_Irr(B0L); arg_Ir(B0H); bytes(2); break;
- case 0xd4: mnemonic("CALL"); arg_IRR(B0); bytes(2); step_over; break;
- case 0xd5: illegal; break;
- case 0xd6: mnemonic("CALL"); arg_DA; bytes(3); step_over; break;
- case 0xd7: mnemonic("LD"); arg_r(B0L); arg_X(B1, B0H); bytes(3); break;
- case 0xd8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0xd9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0xda: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0xdb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0xdc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0xdd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0xde: mnemonic("INC"); arg_r(OPH); break;
- case 0xdf: mnemonic("SCF"); break;
+ case 0xd0: mnemonic("SRA"); arg_R(B0); bytes(2); break;
+ case 0xd1: mnemonic("SRA"); arg_IR(B0); bytes(2); break;
+ case 0xd2: mnemonic("LDC"); arg_Irr(B0L); arg_r(B0H); bytes(2); break;
+ case 0xd3: mnemonic("LDCI"); arg_Irr(B0L); arg_Ir(B0H); bytes(2); break;
+ case 0xd4: mnemonic("CALL"); arg_IRR(B0); bytes(2); step_over; break;
+ case 0xd5: illegal; break;
+ case 0xd6: mnemonic("CALL"); arg_DA; bytes(3); step_over; break;
+ case 0xd7: mnemonic("LD"); arg_r(B0L); arg_X(B1, B0H); bytes(3); break;
+ case 0xd8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0xd9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0xda: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0xdb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0xdc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0xdd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0xde: mnemonic("INC"); arg_r(OPH); break;
+ case 0xdf: mnemonic("SCF"); break;
- case 0xe0: mnemonic("RR"); arg_R(B0); bytes(2); break;
- case 0xe1: mnemonic("RR"); arg_IR(B0); bytes(2); break;
- case 0xe2: illegal; break;
- case 0xe3: mnemonic("LD"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
- case 0xe4: mnemonic("LD"); arg_R(B1); arg_R(B0); bytes(3); break;
- case 0xe5: mnemonic("LD"); arg_R(B1); arg_IR(B0); bytes(3); break;
- case 0xe6: mnemonic("LD"); arg_R(B0); arg_IM(B1); bytes(3); break;
- case 0xe7: mnemonic("LD"); arg_IR(B0); arg_IM(B1); bytes(3); break;
- case 0xe8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0xe9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0xea: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0xeb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0xec: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0xed: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0xee: mnemonic("INC"); arg_r(OPH); break;
- case 0xef: mnemonic("CCF"); break;
+ case 0xe0: mnemonic("RR"); arg_R(B0); bytes(2); break;
+ case 0xe1: mnemonic("RR"); arg_IR(B0); bytes(2); break;
+ case 0xe2: illegal; break;
+ case 0xe3: mnemonic("LD"); arg_r(B0H); arg_Ir(B0L); bytes(2); break;
+ case 0xe4: mnemonic("LD"); arg_R(B1); arg_R(B0); bytes(3); break;
+ case 0xe5: mnemonic("LD"); arg_R(B1); arg_IR(B0); bytes(3); break;
+ case 0xe6: mnemonic("LD"); arg_R(B0); arg_IM(B1); bytes(3); break;
+ case 0xe7: mnemonic("LD"); arg_IR(B0); arg_IM(B1); bytes(3); break;
+ case 0xe8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0xe9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0xea: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0xeb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0xec: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0xed: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0xee: mnemonic("INC"); arg_r(OPH); break;
+ case 0xef: mnemonic("CCF"); break;
- case 0xf0: mnemonic("SWAP"); arg_R(B0); bytes(2); break;
- case 0xf1: mnemonic("SWAP"); arg_IR(B0); bytes(2); break;
- case 0xf2: illegal; break;
- case 0xf3: mnemonic("LD"); arg_Ir(B0H); arg_r(B0L); bytes(2); break;
- case 0xf4: illegal; break;
- case 0xf5: mnemonic("LD"); arg_IR(B0); arg_R(B1); bytes(3); break;
- case 0xf6: illegal; break;
- case 0xf7: illegal; break;
- case 0xf8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
- case 0xf9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
- case 0xfa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
- case 0xfb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
- case 0xfc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
- case 0xfd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
- case 0xfe: mnemonic("INC"); arg_r(OPH); break;
- case 0xff: mnemonic("NOP"); break;
+ case 0xf0: mnemonic("SWAP"); arg_R(B0); bytes(2); break;
+ case 0xf1: mnemonic("SWAP"); arg_IR(B0); bytes(2); break;
+ case 0xf2: illegal; break;
+ case 0xf3: mnemonic("LD"); arg_Ir(B0H); arg_r(B0L); bytes(2); break;
+ case 0xf4: illegal; break;
+ case 0xf5: mnemonic("LD"); arg_IR(B0); arg_R(B1); bytes(3); break;
+ case 0xf6: illegal; break;
+ case 0xf7: illegal; break;
+ case 0xf8: mnemonic("LD"); arg_r(OPH); arg_R(B0); bytes(2); break;
+ case 0xf9: mnemonic("LD"); arg_R(B0); arg_r(OPH); bytes(2); break;
+ case 0xfa: mnemonic("DJNZ"); arg_r(OPH); arg_RA; bytes(2); break;
+ case 0xfb: mnemonic("JR"); arg_cc; arg_RA; bytes(2); break;
+ case 0xfc: mnemonic("LD"); arg_r(OPH); arg_IM(B0); bytes(2); break;
+ case 0xfd: mnemonic("JP"); arg_cc; arg_DA; bytes(3); break;
+ case 0xfe: mnemonic("INC"); arg_r(OPH); break;
+ case 0xff: mnemonic("NOP"); break;
}
}
diff --git a/src/emu/cpu/z8/z8ops.c b/src/emu/cpu/z8/z8ops.c
index 43ef894235e..5069b23230e 100644
--- a/src/emu/cpu/z8/z8ops.c
+++ b/src/emu/cpu/z8/z8ops.c
@@ -11,16 +11,16 @@
MACROS
***************************************************************************/
-#define read(_reg) register_read(cpustate, _reg)
-#define r(_data) get_working_register(cpustate, _data)
-#define Ir(_data) get_intermediate_register(cpustate, get_working_register(cpustate, _data))
-#define R get_register(cpustate, fetch(cpustate))
-#define IR get_intermediate_register(cpustate, get_register(cpustate, fetch(cpustate)))
-#define RR get_intermediate_register(cpustate, get_register(cpustate, fetch(cpustate)))
-#define IM fetch(cpustate)
-#define flag(_flag) ((cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS##_##_flag) ? 1 : 0)
-
-#define mode_r1_r2(_func) \
+#define read(_reg) register_read(cpustate, _reg)
+#define r(_data) get_working_register(cpustate, _data)
+#define Ir(_data) get_intermediate_register(cpustate, get_working_register(cpustate, _data))
+#define R get_register(cpustate, fetch(cpustate))
+#define IR get_intermediate_register(cpustate, get_register(cpustate, fetch(cpustate)))
+#define RR get_intermediate_register(cpustate, get_register(cpustate, fetch(cpustate)))
+#define IM fetch(cpustate)
+#define flag(_flag) ((cpustate->r[Z8_REGISTER_FLAGS] & Z8_FLAGS##_##_flag) ? 1 : 0)
+
+#define mode_r1_r2(_func) \
UINT8 dst_src = fetch(cpustate);\
UINT8 dst = r(dst_src >> 4);\
UINT8 src = read(r(dst_src & 0x0f));\
@@ -116,8 +116,8 @@ static void clear(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, 0);
}
-INSTRUCTION( clr_R1 ) { mode_R1(clear) }
-INSTRUCTION( clr_IR1 ) { mode_IR1(clear) }
+INSTRUCTION( clr_R1 ) { mode_R1(clear) }
+INSTRUCTION( clr_IR1 ) { mode_IR1(clear) }
static void load(z8_state *cpustate, UINT8 dst, UINT8 src)
{
@@ -125,20 +125,20 @@ static void load(z8_state *cpustate, UINT8 dst, UINT8 src)
register_write(cpustate, dst, src);
}
-INSTRUCTION( ld_r1_IM ) { mode_r1_IM(load) }
-INSTRUCTION( ld_r1_R2 ) { mode_r1_R2(load) }
-INSTRUCTION( ld_r2_R1 ) { mode_r2_R1(load) }
-INSTRUCTION( ld_Ir1_r2 ) { mode_Ir1_r2(load) }
-INSTRUCTION( ld_R2_IR1 ) { mode_R2_IR1(load) }
-INSTRUCTION( ld_r1_x_R2 ) { mode_r1_x_R2(load) }
-INSTRUCTION( ld_r2_x_R1 ) { mode_r2_x_R1(load) }
+INSTRUCTION( ld_r1_IM ) { mode_r1_IM(load) }
+INSTRUCTION( ld_r1_R2 ) { mode_r1_R2(load) }
+INSTRUCTION( ld_r2_R1 ) { mode_r2_R1(load) }
+INSTRUCTION( ld_Ir1_r2 ) { mode_Ir1_r2(load) }
+INSTRUCTION( ld_R2_IR1 ) { mode_R2_IR1(load) }
+INSTRUCTION( ld_r1_x_R2 ) { mode_r1_x_R2(load) }
+INSTRUCTION( ld_r2_x_R1 ) { mode_r2_x_R1(load) }
-INSTRUCTION( ld_r1_r2 ) { mode_r1_r2(load) }
-INSTRUCTION( ld_r1_Ir2 ) { mode_r1_Ir2(load) }
-INSTRUCTION( ld_R2_R1 ) { mode_R2_R1(load) }
-INSTRUCTION( ld_IR2_R1 ) { mode_IR2_R1(load) }
-INSTRUCTION( ld_R1_IM ) { mode_R1_IM(load) }
-INSTRUCTION( ld_IR1_IM ) { mode_IR1_IM(load) }
+INSTRUCTION( ld_r1_r2 ) { mode_r1_r2(load) }
+INSTRUCTION( ld_r1_Ir2 ) { mode_r1_Ir2(load) }
+INSTRUCTION( ld_R2_R1 ) { mode_R2_R1(load) }
+INSTRUCTION( ld_IR2_R1 ) { mode_IR2_R1(load) }
+INSTRUCTION( ld_R1_IM ) { mode_R1_IM(load) }
+INSTRUCTION( ld_IR1_IM ) { mode_IR1_IM(load) }
static void load_from_memory(z8_state *cpustate, address_space *space)
{
@@ -196,34 +196,34 @@ static void load_to_memory_autoinc(z8_state *cpustate, address_space *space)
register_write(cpustate, src, real_src + 1);
}
-INSTRUCTION( ldc_r1_Irr2 ) { load_from_memory(cpustate, cpustate->program); }
-INSTRUCTION( ldc_r2_Irr1 ) { load_to_memory(cpustate, cpustate->program); }
-INSTRUCTION( ldci_Ir1_Irr2 ) { load_from_memory_autoinc(cpustate, cpustate->program); }
-INSTRUCTION( ldci_Ir2_Irr1 ) { load_to_memory_autoinc(cpustate, cpustate->program); }
-INSTRUCTION( lde_r1_Irr2 ) { load_from_memory(cpustate, cpustate->data); }
-INSTRUCTION( lde_r2_Irr1 ) { load_to_memory(cpustate, cpustate->data); }
-INSTRUCTION( ldei_Ir1_Irr2 ) { load_from_memory_autoinc(cpustate, cpustate->data); }
-INSTRUCTION( ldei_Ir2_Irr1 ) { load_to_memory_autoinc(cpustate, cpustate->data); }
+INSTRUCTION( ldc_r1_Irr2 ) { load_from_memory(cpustate, cpustate->program); }
+INSTRUCTION( ldc_r2_Irr1 ) { load_to_memory(cpustate, cpustate->program); }
+INSTRUCTION( ldci_Ir1_Irr2 ) { load_from_memory_autoinc(cpustate, cpustate->program); }
+INSTRUCTION( ldci_Ir2_Irr1 ) { load_to_memory_autoinc(cpustate, cpustate->program); }
+INSTRUCTION( lde_r1_Irr2 ) { load_from_memory(cpustate, cpustate->data); }
+INSTRUCTION( lde_r2_Irr1 ) { load_to_memory(cpustate, cpustate->data); }
+INSTRUCTION( ldei_Ir1_Irr2 ) { load_from_memory_autoinc(cpustate, cpustate->data); }
+INSTRUCTION( ldei_Ir2_Irr1 ) { load_to_memory_autoinc(cpustate, cpustate->data); }
static void pop(z8_state *cpustate, UINT8 dst)
{
/* dst <- @SP
- SP <- SP + 1 */
+ SP <- SP + 1 */
register_write(cpustate, dst, stack_pop_byte(cpustate));
}
-INSTRUCTION( pop_R1 ) { mode_R1(pop) }
-INSTRUCTION( pop_IR1 ) { mode_IR1(pop) }
+INSTRUCTION( pop_R1 ) { mode_R1(pop) }
+INSTRUCTION( pop_IR1 ) { mode_IR1(pop) }
static void push(z8_state *cpustate, UINT8 src)
{
/* SP <- SP - 1
- @SP <- src */
+ @SP <- src */
stack_push_byte(cpustate, read(src));
}
-INSTRUCTION( push_R2 ) { mode_R1(push) }
-INSTRUCTION( push_IR2 ) { mode_IR1(push) }
+INSTRUCTION( push_R2 ) { mode_R1(push) }
+INSTRUCTION( push_IR2 ) { mode_IR1(push) }
/***************************************************************************
ARITHMETIC INSTRUCTIONS
@@ -245,12 +245,12 @@ static void add_carry(z8_state *cpustate, UINT8 dst, INT8 src)
register_write(cpustate, dst, new_data & 0xff);
}
-INSTRUCTION( adc_r1_r2 ) { mode_r1_r2(add_carry) }
-INSTRUCTION( adc_r1_Ir2 ) { mode_r1_Ir2(add_carry) }
-INSTRUCTION( adc_R2_R1 ) { mode_R2_R1(add_carry) }
-INSTRUCTION( adc_IR2_R1 ) { mode_IR2_R1(add_carry) }
-INSTRUCTION( adc_R1_IM ) { mode_R1_IM(add_carry) }
-INSTRUCTION( adc_IR1_IM ) { mode_IR1_IM(add_carry) }
+INSTRUCTION( adc_r1_r2 ) { mode_r1_r2(add_carry) }
+INSTRUCTION( adc_r1_Ir2 ) { mode_r1_Ir2(add_carry) }
+INSTRUCTION( adc_R2_R1 ) { mode_R2_R1(add_carry) }
+INSTRUCTION( adc_IR2_R1 ) { mode_IR2_R1(add_carry) }
+INSTRUCTION( adc_R1_IM ) { mode_R1_IM(add_carry) }
+INSTRUCTION( adc_IR1_IM ) { mode_IR1_IM(add_carry) }
static void add(z8_state *cpustate, UINT8 dst, INT8 src)
{
@@ -268,12 +268,12 @@ static void add(z8_state *cpustate, UINT8 dst, INT8 src)
register_write(cpustate, dst, new_data & 0xff);
}
-INSTRUCTION( add_r1_r2 ) { mode_r1_r2(add) }
-INSTRUCTION( add_r1_Ir2 ) { mode_r1_Ir2(add) }
-INSTRUCTION( add_R2_R1 ) { mode_R2_R1(add) }
-INSTRUCTION( add_IR2_R1 ) { mode_IR2_R1(add) }
-INSTRUCTION( add_R1_IM ) { mode_R1_IM(add) }
-INSTRUCTION( add_IR1_IM ) { mode_IR1_IM(add) }
+INSTRUCTION( add_r1_r2 ) { mode_r1_r2(add) }
+INSTRUCTION( add_r1_Ir2 ) { mode_r1_Ir2(add) }
+INSTRUCTION( add_R2_R1 ) { mode_R2_R1(add) }
+INSTRUCTION( add_IR2_R1 ) { mode_IR2_R1(add) }
+INSTRUCTION( add_R1_IM ) { mode_R1_IM(add) }
+INSTRUCTION( add_IR1_IM ) { mode_IR1_IM(add) }
static void compare(z8_state *cpustate, UINT8 dst, UINT8 src)
{
@@ -287,19 +287,19 @@ static void compare(z8_state *cpustate, UINT8 dst, UINT8 src)
set_flag_v(((data & 0x80) != (src & 0x80)) && ((new_data & 0x80) == (src & 0x80)));
}
-INSTRUCTION( cp_r1_r2 ) { mode_r1_r2(compare) }
-INSTRUCTION( cp_r1_Ir2 ) { mode_r1_Ir2(compare) }
-INSTRUCTION( cp_R2_R1 ) { mode_R2_R1(compare) }
-INSTRUCTION( cp_IR2_R1 ) { mode_IR2_R1(compare) }
-INSTRUCTION( cp_R1_IM ) { mode_R1_IM(compare) }
-INSTRUCTION( cp_IR1_IM ) { mode_IR1_IM(compare) }
+INSTRUCTION( cp_r1_r2 ) { mode_r1_r2(compare) }
+INSTRUCTION( cp_r1_Ir2 ) { mode_r1_Ir2(compare) }
+INSTRUCTION( cp_R2_R1 ) { mode_R2_R1(compare) }
+INSTRUCTION( cp_IR2_R1 ) { mode_IR2_R1(compare) }
+INSTRUCTION( cp_R1_IM ) { mode_R1_IM(compare) }
+INSTRUCTION( cp_IR1_IM ) { mode_IR1_IM(compare) }
static void decimal_adjust(z8_state *cpustate, UINT8 dst)
{
}
-INSTRUCTION( da_R1 ) { mode_R1(decimal_adjust) }
-INSTRUCTION( da_IR1 ) { mode_IR1(decimal_adjust) }
+INSTRUCTION( da_R1 ) { mode_R1(decimal_adjust) }
+INSTRUCTION( da_IR1 ) { mode_IR1(decimal_adjust) }
static void decrement(z8_state *cpustate, UINT8 dst)
{
@@ -313,8 +313,8 @@ static void decrement(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, data);
}
-INSTRUCTION( dec_R1 ) { mode_R1(decrement) }
-INSTRUCTION( dec_IR1 ) { mode_IR1(decrement) }
+INSTRUCTION( dec_R1 ) { mode_R1(decrement) }
+INSTRUCTION( dec_IR1 ) { mode_IR1(decrement) }
static void decrement_word(z8_state *cpustate, UINT8 dst)
{
@@ -328,8 +328,8 @@ static void decrement_word(z8_state *cpustate, UINT8 dst)
register_pair_write(cpustate, dst, data);
}
-INSTRUCTION( decw_RR1 ) { mode_RR1(decrement_word) }
-INSTRUCTION( decw_IR1 ) { mode_IR1(decrement_word) }
+INSTRUCTION( decw_RR1 ) { mode_RR1(decrement_word) }
+INSTRUCTION( decw_IR1 ) { mode_IR1(decrement_word) }
static void increment(z8_state *cpustate, UINT8 dst)
{
@@ -343,9 +343,9 @@ static void increment(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, data);
}
-INSTRUCTION( inc_r1 ) { mode_r1(increment) }
-INSTRUCTION( inc_R1 ) { mode_R1(increment) }
-INSTRUCTION( inc_IR1 ) { mode_IR1(increment) }
+INSTRUCTION( inc_r1 ) { mode_r1(increment) }
+INSTRUCTION( inc_R1 ) { mode_R1(increment) }
+INSTRUCTION( inc_IR1 ) { mode_IR1(increment) }
static void increment_word(z8_state *cpustate, UINT8 dst)
{
@@ -359,8 +359,8 @@ static void increment_word(z8_state *cpustate, UINT8 dst)
register_pair_write(cpustate, dst, data);
}
-INSTRUCTION( incw_RR1 ) { mode_RR1(increment_word) }
-INSTRUCTION( incw_IR1 ) { mode_IR1(increment_word) }
+INSTRUCTION( incw_RR1 ) { mode_RR1(increment_word) }
+INSTRUCTION( incw_IR1 ) { mode_IR1(increment_word) }
static void subtract_carry(z8_state *cpustate, UINT8 dst, UINT8 src)
{
@@ -378,12 +378,12 @@ static void subtract_carry(z8_state *cpustate, UINT8 dst, UINT8 src)
register_write(cpustate, dst, new_data & 0xff);
}
-INSTRUCTION( sbc_r1_r2 ) { mode_r1_r2(subtract_carry) }
-INSTRUCTION( sbc_r1_Ir2 ) { mode_r1_Ir2(subtract_carry) }
-INSTRUCTION( sbc_R2_R1 ) { mode_R2_R1(subtract_carry) }
-INSTRUCTION( sbc_IR2_R1 ) { mode_IR2_R1(subtract_carry) }
-INSTRUCTION( sbc_R1_IM ) { mode_R1_IM(subtract_carry) }
-INSTRUCTION( sbc_IR1_IM ) { mode_IR1_IM(subtract_carry) }
+INSTRUCTION( sbc_r1_r2 ) { mode_r1_r2(subtract_carry) }
+INSTRUCTION( sbc_r1_Ir2 ) { mode_r1_Ir2(subtract_carry) }
+INSTRUCTION( sbc_R2_R1 ) { mode_R2_R1(subtract_carry) }
+INSTRUCTION( sbc_IR2_R1 ) { mode_IR2_R1(subtract_carry) }
+INSTRUCTION( sbc_R1_IM ) { mode_R1_IM(subtract_carry) }
+INSTRUCTION( sbc_IR1_IM ) { mode_IR1_IM(subtract_carry) }
static void subtract(z8_state *cpustate, UINT8 dst, UINT8 src)
{
@@ -401,12 +401,12 @@ static void subtract(z8_state *cpustate, UINT8 dst, UINT8 src)
register_write(cpustate, dst, new_data & 0xff);
}
-INSTRUCTION( sub_r1_r2 ) { mode_r1_r2(subtract) }
-INSTRUCTION( sub_r1_Ir2 ) { mode_r1_Ir2(subtract) }
-INSTRUCTION( sub_R2_R1 ) { mode_R2_R1(subtract) }
-INSTRUCTION( sub_IR2_R1 ) { mode_IR2_R1(subtract) }
-INSTRUCTION( sub_R1_IM ) { mode_R1_IM(subtract) }
-INSTRUCTION( sub_IR1_IM ) { mode_IR1_IM(subtract) }
+INSTRUCTION( sub_r1_r2 ) { mode_r1_r2(subtract) }
+INSTRUCTION( sub_r1_Ir2 ) { mode_r1_Ir2(subtract) }
+INSTRUCTION( sub_R2_R1 ) { mode_R2_R1(subtract) }
+INSTRUCTION( sub_IR2_R1 ) { mode_IR2_R1(subtract) }
+INSTRUCTION( sub_R1_IM ) { mode_R1_IM(subtract) }
+INSTRUCTION( sub_IR1_IM ) { mode_IR1_IM(subtract) }
/***************************************************************************
LOGICAL INSTRUCTIONS
@@ -423,12 +423,12 @@ static void _and(z8_state *cpustate, UINT8 dst, UINT8 src)
set_flag_v(0);
}
-INSTRUCTION( and_r1_r2 ) { mode_r1_r2(_and) }
-INSTRUCTION( and_r1_Ir2 ) { mode_r1_Ir2(_and) }
-INSTRUCTION( and_R2_R1 ) { mode_R2_R1(_and) }
-INSTRUCTION( and_IR2_R1 ) { mode_IR2_R1(_and) }
-INSTRUCTION( and_R1_IM ) { mode_R1_IM(_and) }
-INSTRUCTION( and_IR1_IM ) { mode_IR1_IM(_and) }
+INSTRUCTION( and_r1_r2 ) { mode_r1_r2(_and) }
+INSTRUCTION( and_r1_Ir2 ) { mode_r1_Ir2(_and) }
+INSTRUCTION( and_R2_R1 ) { mode_R2_R1(_and) }
+INSTRUCTION( and_IR2_R1 ) { mode_IR2_R1(_and) }
+INSTRUCTION( and_R1_IM ) { mode_R1_IM(_and) }
+INSTRUCTION( and_IR1_IM ) { mode_IR1_IM(_and) }
static void complement(z8_state *cpustate, UINT8 dst)
{
@@ -441,8 +441,8 @@ static void complement(z8_state *cpustate, UINT8 dst)
set_flag_v(0);
}
-INSTRUCTION( com_R1 ) { mode_R1(complement) }
-INSTRUCTION( com_IR1 ) { mode_IR1(complement) }
+INSTRUCTION( com_R1 ) { mode_R1(complement) }
+INSTRUCTION( com_IR1 ) { mode_IR1(complement) }
static void _or(z8_state *cpustate, UINT8 dst, UINT8 src)
{
@@ -455,12 +455,12 @@ static void _or(z8_state *cpustate, UINT8 dst, UINT8 src)
set_flag_v(0);
}
-INSTRUCTION( or_r1_r2 ) { mode_r1_r2(_or) }
-INSTRUCTION( or_r1_Ir2 ) { mode_r1_Ir2(_or) }
-INSTRUCTION( or_R2_R1 ) { mode_R2_R1(_or) }
-INSTRUCTION( or_IR2_R1 ) { mode_IR2_R1(_or) }
-INSTRUCTION( or_R1_IM ) { mode_R1_IM(_or) }
-INSTRUCTION( or_IR1_IM ) { mode_IR1_IM(_or) }
+INSTRUCTION( or_r1_r2 ) { mode_r1_r2(_or) }
+INSTRUCTION( or_r1_Ir2 ) { mode_r1_Ir2(_or) }
+INSTRUCTION( or_R2_R1 ) { mode_R2_R1(_or) }
+INSTRUCTION( or_IR2_R1 ) { mode_IR2_R1(_or) }
+INSTRUCTION( or_R1_IM ) { mode_R1_IM(_or) }
+INSTRUCTION( or_IR1_IM ) { mode_IR1_IM(_or) }
static void _xor(z8_state *cpustate, UINT8 dst, UINT8 src)
{
@@ -473,12 +473,12 @@ static void _xor(z8_state *cpustate, UINT8 dst, UINT8 src)
set_flag_v(0);
}
-INSTRUCTION( xor_r1_r2 ) { mode_r1_r2(_xor) }
-INSTRUCTION( xor_r1_Ir2 ) { mode_r1_Ir2(_xor) }
-INSTRUCTION( xor_R2_R1 ) { mode_R2_R1(_xor) }
-INSTRUCTION( xor_IR2_R1 ) { mode_IR2_R1(_xor) }
-INSTRUCTION( xor_R1_IM ) { mode_R1_IM(_xor) }
-INSTRUCTION( xor_IR1_IM ) { mode_IR1_IM(_xor) }
+INSTRUCTION( xor_r1_r2 ) { mode_r1_r2(_xor) }
+INSTRUCTION( xor_r1_Ir2 ) { mode_r1_Ir2(_xor) }
+INSTRUCTION( xor_R2_R1 ) { mode_R2_R1(_xor) }
+INSTRUCTION( xor_IR2_R1 ) { mode_IR2_R1(_xor) }
+INSTRUCTION( xor_R1_IM ) { mode_R1_IM(_xor) }
+INSTRUCTION( xor_IR1_IM ) { mode_IR1_IM(_xor) }
/***************************************************************************
PROGRAM CONTROL INSTRUCTIONS
@@ -490,8 +490,8 @@ static void call(z8_state *cpustate, UINT16 dst)
cpustate->pc = dst;
}
-INSTRUCTION( call_IRR1 ) { UINT16 dst = register_pair_read(cpustate, get_intermediate_register(cpustate, get_register(cpustate, fetch(cpustate)))); call(cpustate, dst); }
-INSTRUCTION( call_DA ) { UINT16 dst = (fetch(cpustate) << 8) | fetch(cpustate); call(cpustate, dst); }
+INSTRUCTION( call_IRR1 ) { UINT16 dst = register_pair_read(cpustate, get_intermediate_register(cpustate, get_register(cpustate, fetch(cpustate)))); call(cpustate, dst); }
+INSTRUCTION( call_DA ) { UINT16 dst = (fetch(cpustate) << 8) | fetch(cpustate); call(cpustate, dst); }
INSTRUCTION( djnz_r1_RA )
{
@@ -513,11 +513,11 @@ INSTRUCTION( djnz_r1_RA )
INSTRUCTION( iret )
{
/* FLAGS <- @SP
- SP <- SP + 1 */
+ SP <- SP + 1 */
register_write(cpustate, Z8_REGISTER_FLAGS, stack_pop_byte(cpustate));
/* PC <- @SP
- SP <- SP + 2 */
+ SP <- SP + 2 */
cpustate->pc = stack_pop_word(cpustate);
/* IMR (7) <- 1 */
@@ -527,7 +527,7 @@ INSTRUCTION( iret )
INSTRUCTION( ret )
{
/* PC <- @SP
- SP <- SP + 2 */
+ SP <- SP + 2 */
cpustate->pc = stack_pop_word(cpustate);
}
@@ -537,7 +537,7 @@ static void jump(z8_state *cpustate, UINT16 dst)
cpustate->pc = dst;
}
-INSTRUCTION( jp_IRR1 ) { jump(cpustate, register_pair_read(cpustate, IR)); }
+INSTRUCTION( jp_IRR1 ) { jump(cpustate, register_pair_read(cpustate, IR)); }
static int check_condition_code(z8_state *cpustate, int cc)
{
@@ -545,22 +545,22 @@ static int check_condition_code(z8_state *cpustate, int cc)
switch (cc)
{
- case CC_F: truth = 0; break;
- case CC_LT: truth = flag(S) ^ flag(V); break;
- case CC_LE: truth = (flag(Z) | (flag(S) ^ flag(V))); break;
- case CC_ULE: truth = flag(C) | flag(Z); break;
- case CC_OV: truth = flag(V); break;
- case CC_MI: truth = flag(S); break;
- case CC_Z: truth = flag(Z); break;
- case CC_C: truth = flag(C); break;
- case CC_T: truth = 1; break;
- case CC_GE: truth = !(flag(S) ^ flag(V)); break;
- case CC_GT: truth = !(flag(Z) | (flag(S) ^ flag(V))); break;
- case CC_UGT: truth = ((!flag(C)) & (!flag(Z))); break;
- case CC_NOV: truth = !flag(V); break;
- case CC_PL: truth = !flag(S); break;
- case CC_NZ: truth = !flag(Z); break;
- case CC_NC: truth = !flag(C); break;
+ case CC_F: truth = 0; break;
+ case CC_LT: truth = flag(S) ^ flag(V); break;
+ case CC_LE: truth = (flag(Z) | (flag(S) ^ flag(V))); break;
+ case CC_ULE: truth = flag(C) | flag(Z); break;
+ case CC_OV: truth = flag(V); break;
+ case CC_MI: truth = flag(S); break;
+ case CC_Z: truth = flag(Z); break;
+ case CC_C: truth = flag(C); break;
+ case CC_T: truth = 1; break;
+ case CC_GE: truth = !(flag(S) ^ flag(V)); break;
+ case CC_GT: truth = !(flag(Z) | (flag(S) ^ flag(V))); break;
+ case CC_UGT: truth = ((!flag(C)) & (!flag(Z))); break;
+ case CC_NOV: truth = !flag(V); break;
+ case CC_PL: truth = !flag(S); break;
+ case CC_NZ: truth = !flag(Z); break;
+ case CC_NC: truth = !flag(C); break;
}
return truth;
@@ -605,12 +605,12 @@ static void test_complement_under_mask(z8_state *cpustate, UINT8 dst, UINT8 src)
set_flag_v(0);
}
-INSTRUCTION( tcm_r1_r2 ) { mode_r1_r2(test_complement_under_mask) }
-INSTRUCTION( tcm_r1_Ir2 ) { mode_r1_Ir2(test_complement_under_mask) }
-INSTRUCTION( tcm_R2_R1 ) { mode_R2_R1(test_complement_under_mask) }
-INSTRUCTION( tcm_IR2_R1 ) { mode_IR2_R1(test_complement_under_mask) }
-INSTRUCTION( tcm_R1_IM ) { mode_R1_IM(test_complement_under_mask) }
-INSTRUCTION( tcm_IR1_IM ) { mode_IR1_IM(test_complement_under_mask) }
+INSTRUCTION( tcm_r1_r2 ) { mode_r1_r2(test_complement_under_mask) }
+INSTRUCTION( tcm_r1_Ir2 ) { mode_r1_Ir2(test_complement_under_mask) }
+INSTRUCTION( tcm_R2_R1 ) { mode_R2_R1(test_complement_under_mask) }
+INSTRUCTION( tcm_IR2_R1 ) { mode_IR2_R1(test_complement_under_mask) }
+INSTRUCTION( tcm_R1_IM ) { mode_R1_IM(test_complement_under_mask) }
+INSTRUCTION( tcm_IR1_IM ) { mode_IR1_IM(test_complement_under_mask) }
static void test_under_mask(z8_state *cpustate, UINT8 dst, UINT8 src)
{
@@ -622,12 +622,12 @@ static void test_under_mask(z8_state *cpustate, UINT8 dst, UINT8 src)
set_flag_v(0);
}
-INSTRUCTION( tm_r1_r2 ) { mode_r1_r2(test_under_mask) }
-INSTRUCTION( tm_r1_Ir2 ) { mode_r1_Ir2(test_under_mask) }
-INSTRUCTION( tm_R2_R1 ) { mode_R2_R1(test_under_mask) }
-INSTRUCTION( tm_IR2_R1 ) { mode_IR2_R1(test_under_mask) }
-INSTRUCTION( tm_R1_IM ) { mode_R1_IM(test_under_mask) }
-INSTRUCTION( tm_IR1_IM ) { mode_IR1_IM(test_under_mask) }
+INSTRUCTION( tm_r1_r2 ) { mode_r1_r2(test_under_mask) }
+INSTRUCTION( tm_r1_Ir2 ) { mode_r1_Ir2(test_under_mask) }
+INSTRUCTION( tm_R2_R1 ) { mode_R2_R1(test_under_mask) }
+INSTRUCTION( tm_IR2_R1 ) { mode_IR2_R1(test_under_mask) }
+INSTRUCTION( tm_R1_IM ) { mode_R1_IM(test_under_mask) }
+INSTRUCTION( tm_IR1_IM ) { mode_IR1_IM(test_under_mask) }
/***************************************************************************
ROTATE AND SHIFT INSTRUCTIONS
@@ -647,8 +647,8 @@ static void rotate_left(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, new_data);
}
-INSTRUCTION( rl_R1 ) { mode_R1(rotate_left) }
-INSTRUCTION( rl_IR1 ) { mode_IR1(rotate_left) }
+INSTRUCTION( rl_R1 ) { mode_R1(rotate_left) }
+INSTRUCTION( rl_IR1 ) { mode_IR1(rotate_left) }
static void rotate_left_carry(z8_state *cpustate, UINT8 dst)
{
@@ -664,8 +664,8 @@ static void rotate_left_carry(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, new_data);
}
-INSTRUCTION( rlc_R1 ) { mode_R1(rotate_left_carry) }
-INSTRUCTION( rlc_IR1 ) { mode_IR1(rotate_left_carry) }
+INSTRUCTION( rlc_R1 ) { mode_R1(rotate_left_carry) }
+INSTRUCTION( rlc_IR1 ) { mode_IR1(rotate_left_carry) }
static void rotate_right(z8_state *cpustate, UINT8 dst)
{
@@ -681,8 +681,8 @@ static void rotate_right(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, new_data);
}
-INSTRUCTION( rr_R1 ) { mode_R1(rotate_right) }
-INSTRUCTION( rr_IR1 ) { mode_IR1(rotate_right) }
+INSTRUCTION( rr_R1 ) { mode_R1(rotate_right) }
+INSTRUCTION( rr_IR1 ) { mode_IR1(rotate_right) }
static void rotate_right_carry(z8_state *cpustate, UINT8 dst)
{
@@ -698,8 +698,8 @@ static void rotate_right_carry(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, new_data);
}
-INSTRUCTION( rrc_R1 ) { mode_R1(rotate_right_carry) }
-INSTRUCTION( rrc_IR1 ) { mode_IR1(rotate_right_carry) }
+INSTRUCTION( rrc_R1 ) { mode_R1(rotate_right_carry) }
+INSTRUCTION( rrc_IR1 ) { mode_IR1(rotate_right_carry) }
static void shift_right_arithmetic(z8_state *cpustate, UINT8 dst)
{
@@ -715,8 +715,8 @@ static void shift_right_arithmetic(z8_state *cpustate, UINT8 dst)
register_write(cpustate, dst, new_data);
}
-INSTRUCTION( sra_R1 ) { mode_R1(shift_right_arithmetic) }
-INSTRUCTION( sra_IR1 ) { mode_IR1(shift_right_arithmetic) }
+INSTRUCTION( sra_R1 ) { mode_R1(shift_right_arithmetic) }
+INSTRUCTION( sra_IR1 ) { mode_IR1(shift_right_arithmetic) }
static void swap(z8_state *cpustate, UINT8 dst)
{
@@ -730,17 +730,17 @@ static void swap(z8_state *cpustate, UINT8 dst)
// set_flag_v(0); undefined
}
-INSTRUCTION( swap_R1 ) { mode_R1(swap) }
-INSTRUCTION( swap_IR1 ) { mode_IR1(swap) }
+INSTRUCTION( swap_R1 ) { mode_R1(swap) }
+INSTRUCTION( swap_IR1 ) { mode_IR1(swap) }
/***************************************************************************
CPU CONTROL INSTRUCTIONS
***************************************************************************/
-INSTRUCTION( ccf ) { cpustate->r[Z8_REGISTER_FLAGS] ^= Z8_FLAGS_C; }
-INSTRUCTION( di ) { cpustate->r[Z8_REGISTER_IMR] &= ~Z8_IMR_ENABLE; }
-INSTRUCTION( ei ) { cpustate->r[Z8_REGISTER_IMR] |= Z8_IMR_ENABLE; }
-INSTRUCTION( nop ) { /* no operation */ }
-INSTRUCTION( rcf ) { set_flag_c(0); }
-INSTRUCTION( scf ) { set_flag_c(1); }
-INSTRUCTION( srp_IM ) { cpustate->r[Z8_REGISTER_RP] = fetch(cpustate); }
+INSTRUCTION( ccf ) { cpustate->r[Z8_REGISTER_FLAGS] ^= Z8_FLAGS_C; }
+INSTRUCTION( di ) { cpustate->r[Z8_REGISTER_IMR] &= ~Z8_IMR_ENABLE; }
+INSTRUCTION( ei ) { cpustate->r[Z8_REGISTER_IMR] |= Z8_IMR_ENABLE; }
+INSTRUCTION( nop ) { /* no operation */ }
+INSTRUCTION( rcf ) { set_flag_c(0); }
+INSTRUCTION( scf ) { set_flag_c(1); }
+INSTRUCTION( srp_IM ) { cpustate->r[Z8_REGISTER_RP] = fetch(cpustate); }
diff --git a/src/emu/cpu/z80/z80.c b/src/emu/cpu/z80/z80.c
index b095169f837..a8334ce7ce6 100644
--- a/src/emu/cpu/z80/z80.c
+++ b/src/emu/cpu/z80/z80.c
@@ -123,18 +123,18 @@
#include "z80.h"
#include "z80daisy.h"
-#define VERBOSE 0
+#define VERBOSE 0
/* On an NMOS Z80, if LD A,I or LD A,R is interrupted, P/V flag gets reset,
even if IFF2 was set before this instruction. This issue was fixed on
the CMOS Z80, so until knowing (most) Z80 types on hardware, it's disabled */
-#define HAS_LDAIR_QUIRK 0
+#define HAS_LDAIR_QUIRK 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* execute main opcodes inside a big switch statement */
#ifndef BIG_SWITCH
-#define BIG_SWITCH 1
+#define BIG_SWITCH 1
#endif
@@ -144,32 +144,32 @@
/****************************************************************************/
struct z80_state
{
- PAIR prvpc,pc,sp,af,bc,de,hl,ix,iy,wz;
- PAIR af2,bc2,de2,hl2;
- UINT8 r,r2,iff1,iff2,halt,im,i;
- UINT8 nmi_state; /* nmi line state */
- UINT8 nmi_pending; /* nmi pending */
- UINT8 irq_state; /* irq line state */
- UINT8 nsc800_irq_state[4];/* state of NSC800 restart interrupts A, B, C */
- int wait_state; // wait line state
- int busrq_state; // bus request line state
- UINT8 after_ei; /* are we in the EI shadow? */
- UINT8 after_ldair; /* same, but for LD A,I or LD A,R */
- UINT32 ea;
+ PAIR prvpc,pc,sp,af,bc,de,hl,ix,iy,wz;
+ PAIR af2,bc2,de2,hl2;
+ UINT8 r,r2,iff1,iff2,halt,im,i;
+ UINT8 nmi_state; /* nmi line state */
+ UINT8 nmi_pending; /* nmi pending */
+ UINT8 irq_state; /* irq line state */
+ UINT8 nsc800_irq_state[4];/* state of NSC800 restart interrupts A, B, C */
+ int wait_state; // wait line state
+ int busrq_state; // bus request line state
+ UINT8 after_ei; /* are we in the EI shadow? */
+ UINT8 after_ldair; /* same, but for LD A,I or LD A,R */
+ UINT32 ea;
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
direct_read_data *direct;
address_space *io;
- int icount;
+ int icount;
z80_daisy_chain daisy;
- UINT8 rtemp;
- const UINT8 * cc_op;
- const UINT8 * cc_cb;
- const UINT8 * cc_ed;
- const UINT8 * cc_xy;
- const UINT8 * cc_xycb;
- const UINT8 * cc_ex;
+ UINT8 rtemp;
+ const UINT8 * cc_op;
+ const UINT8 * cc_cb;
+ const UINT8 * cc_ed;
+ const UINT8 * cc_xy;
+ const UINT8 * cc_xycb;
+ const UINT8 * cc_ex;
};
INLINE z80_state *get_safe_token(device_t *device)
@@ -179,65 +179,65 @@ INLINE z80_state *get_safe_token(device_t *device)
return (z80_state *)downcast<legacy_cpu_device *>(device)->token();
}
-#define CF 0x01
-#define NF 0x02
-#define PF 0x04
-#define VF PF
-#define XF 0x08
-#define HF 0x10
-#define YF 0x20
-#define ZF 0x40
-#define SF 0x80
+#define CF 0x01
+#define NF 0x02
+#define PF 0x04
+#define VF PF
+#define XF 0x08
+#define HF 0x10
+#define YF 0x20
+#define ZF 0x40
+#define SF 0x80
#define INT_IRQ 0x01
#define NMI_IRQ 0x02
-#define PRVPC prvpc.d /* previous program counter */
+#define PRVPC prvpc.d /* previous program counter */
-#define PCD pc.d
-#define PC pc.w.l
+#define PCD pc.d
+#define PC pc.w.l
-#define SPD sp.d
-#define SP sp.w.l
+#define SPD sp.d
+#define SP sp.w.l
-#define AFD af.d
-#define AF af.w.l
-#define A af.b.h
-#define F af.b.l
+#define AFD af.d
+#define AF af.w.l
+#define A af.b.h
+#define F af.b.l
-#define BCD bc.d
-#define BC bc.w.l
-#define B bc.b.h
-#define C bc.b.l
+#define BCD bc.d
+#define BC bc.w.l
+#define B bc.b.h
+#define C bc.b.l
-#define DED de.d
-#define DE de.w.l
-#define D de.b.h
-#define E de.b.l
+#define DED de.d
+#define DE de.w.l
+#define D de.b.h
+#define E de.b.l
-#define HLD hl.d
-#define HL hl.w.l
-#define H hl.b.h
-#define L hl.b.l
+#define HLD hl.d
+#define HL hl.w.l
+#define H hl.b.h
+#define L hl.b.l
-#define IXD ix.d
-#define IX ix.w.l
-#define HX ix.b.h
-#define LX ix.b.l
+#define IXD ix.d
+#define IX ix.w.l
+#define HX ix.b.h
+#define LX ix.b.l
-#define IYD iy.d
-#define IY iy.w.l
-#define HY iy.b.h
-#define LY iy.b.l
+#define IYD iy.d
+#define IY iy.w.l
+#define HY iy.b.h
+#define LY iy.b.l
-#define WZ wz.w.l
-#define WZ_H wz.b.h
-#define WZ_L wz.b.l
+#define WZ wz.w.l
+#define WZ_H wz.b.h
+#define WZ_L wz.b.l
-static UINT8 SZ[256]; /* zero and sign flags */
-static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
-static UINT8 SZP[256]; /* zero, sign and parity flags */
+static UINT8 SZ[256]; /* zero and sign flags */
+static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
+static UINT8 SZP[256]; /* zero, sign and parity flags */
static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
@@ -245,80 +245,80 @@ static UINT8 *SZHVC_add = 0;
static UINT8 *SZHVC_sub = 0;
static const UINT8 cc_op[0x100] = {
- 4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4,
- 8,10, 7, 6, 4, 4, 7, 4,12,11, 7, 6, 4, 4, 7, 4,
- 7,10,16, 6, 4, 4, 7, 4, 7,11,16, 6, 4, 4, 7, 4,
- 7,10,13, 6,11,11,10, 4, 7,11,13, 6, 4, 4, 7, 4,
- 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
- 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
- 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
- 7, 7, 7, 7, 7, 7, 4, 7, 4, 4, 4, 4, 4, 4, 7, 4,
- 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
- 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
- 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
- 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
- 5,10,10,10,10,11, 7,11, 5,10,10, 0,10,17, 7,11, /* cb -> cc_cb */
- 5,10,10,11,10,11, 7,11, 5, 4,10,11,10, 0, 7,11, /* dd -> cc_xy */
- 5,10,10,19,10,11, 7,11, 5, 4,10, 4,10, 0, 7,11, /* ed -> cc_ed */
- 5,10,10, 4,10,11, 7,11, 5, 6,10, 4,10, 0, 7,11 /* fd -> cc_xy */
+ 4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4,
+ 8,10, 7, 6, 4, 4, 7, 4,12,11, 7, 6, 4, 4, 7, 4,
+ 7,10,16, 6, 4, 4, 7, 4, 7,11,16, 6, 4, 4, 7, 4,
+ 7,10,13, 6,11,11,10, 4, 7,11,13, 6, 4, 4, 7, 4,
+ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
+ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
+ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
+ 7, 7, 7, 7, 7, 7, 4, 7, 4, 4, 4, 4, 4, 4, 7, 4,
+ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
+ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
+ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
+ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
+ 5,10,10,10,10,11, 7,11, 5,10,10, 0,10,17, 7,11, /* cb -> cc_cb */
+ 5,10,10,11,10,11, 7,11, 5, 4,10,11,10, 0, 7,11, /* dd -> cc_xy */
+ 5,10,10,19,10,11, 7,11, 5, 4,10, 4,10, 0, 7,11, /* ed -> cc_ed */
+ 5,10,10, 4,10,11, 7,11, 5, 6,10, 4,10, 0, 7,11 /* fd -> cc_xy */
};
static const UINT8 cc_cb[0x100] = {
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
- 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
- 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
- 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
- 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
+ 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
+ 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
+ 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
+ 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8
};
static const UINT8 cc_ed[0x100] = {
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
12,12,15,20, 8,14, 8, 9,12,12,15,20, 8,14, 8, 9,
12,12,15,20, 8,14, 8, 9,12,12,15,20, 8,14, 8, 9,
12,12,15,20, 8,14, 8,18,12,12,15,20, 8,14, 8,18,
12,12,15,20, 8,14, 8, 8,12,12,15,20, 8,14, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8
};
/* ix/iy: with the exception of (i+offset) opcodes, t-states are main_opcode_table + 4 */
static const UINT8 cc_xy[0x100] = {
- 4+4,10+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4, 4+4,11+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,
- 8+4,10+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,12+4,11+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,
- 7+4,10+4,16+4, 6+4, 4+4, 4+4, 7+4, 4+4, 7+4,11+4,16+4, 6+4, 4+4, 4+4, 7+4, 4+4,
- 7+4,10+4,13+4, 6+4,23 ,23 ,19 , 4+4, 7+4,11+4,13+4, 6+4, 4+4, 4+4, 7+4, 4+4,
- 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
- 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
- 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
+ 4+4,10+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4, 4+4,11+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,
+ 8+4,10+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,12+4,11+4, 7+4, 6+4, 4+4, 4+4, 7+4, 4+4,
+ 7+4,10+4,16+4, 6+4, 4+4, 4+4, 7+4, 4+4, 7+4,11+4,16+4, 6+4, 4+4, 4+4, 7+4, 4+4,
+ 7+4,10+4,13+4, 6+4,23 ,23 ,19 , 4+4, 7+4,11+4,13+4, 6+4, 4+4, 4+4, 7+4, 4+4,
+ 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
+ 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
+ 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
19 ,19 ,19 ,19 ,19 ,19 , 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
- 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
- 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
- 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
- 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
- 5+4,10+4,10+4,10+4,10+4,11+4, 7+4,11+4, 5+4,10+4,10+4, 0 ,10+4,17+4, 7+4,11+4, /* cb -> cc_xycb */
- 5+4,10+4,10+4,11+4,10+4,11+4, 7+4,11+4, 5+4, 4+4,10+4,11+4,10+4, 4 , 7+4,11+4, /* dd -> cc_xy again */
- 5+4,10+4,10+4,19+4,10+4,11+4, 7+4,11+4, 5+4, 4+4,10+4, 4+4,10+4, 4 , 7+4,11+4, /* ed -> cc_ed */
- 5+4,10+4,10+4, 4+4,10+4,11+4, 7+4,11+4, 5+4, 6+4,10+4, 4+4,10+4, 4 , 7+4,11+4 /* fd -> cc_xy again */
+ 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
+ 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
+ 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
+ 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4, 4+4, 4+4, 4+4, 4+4, 4+4, 4+4,19 , 4+4,
+ 5+4,10+4,10+4,10+4,10+4,11+4, 7+4,11+4, 5+4,10+4,10+4, 0 ,10+4,17+4, 7+4,11+4, /* cb -> cc_xycb */
+ 5+4,10+4,10+4,11+4,10+4,11+4, 7+4,11+4, 5+4, 4+4,10+4,11+4,10+4, 4 , 7+4,11+4, /* dd -> cc_xy again */
+ 5+4,10+4,10+4,19+4,10+4,11+4, 7+4,11+4, 5+4, 4+4,10+4, 4+4,10+4, 4 , 7+4,11+4, /* ed -> cc_ed */
+ 5+4,10+4,10+4, 4+4,10+4,11+4, 7+4,11+4, 5+4, 6+4,10+4, 4+4,10+4, 4 , 7+4,11+4 /* fd -> cc_xy again */
};
static const UINT8 cc_xycb[0x100] = {
@@ -342,26 +342,26 @@ static const UINT8 cc_xycb[0x100] = {
/* extra cycles if jr/jp/call taken and 'interrupt latency' on rst 0-7 */
static const UINT8 cc_ex[0x100] = {
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
- 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
- 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NC/JR C */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 5, 5, 5, 5, 0, 0, 0, 0, 5, 5, 5, 5, 0, 0, 0, 0, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
- 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
- 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
- 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
- 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* DJNZ */
+ 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NZ/JR Z */
+ 5, 0, 0, 0, 0, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, /* JR NC/JR C */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 5, 5, 5, 5, 0, 0, 0, 0, 5, 5, 5, 5, 0, 0, 0, 0, /* LDIR/CPIR/INIR/OTIR LDDR/CPDR/INDR/OTDR */
+ 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
+ 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
+ 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2,
+ 6, 0, 0, 0, 7, 0, 0, 2, 6, 0, 0, 0, 7, 0, 0, 2
};
-#define cc_dd cc_xy
-#define cc_fd cc_xy
+#define cc_dd cc_xy
+#define cc_fd cc_xy
static void take_interrupt(z80_state *z80);
static void take_interrupt_nsc800(z80_state *z80);
@@ -433,7 +433,7 @@ typedef void (*funcptr)(z80_state *z80);
INLINE void prefix##_f4(z80_state *z80); INLINE void prefix##_f5(z80_state *z80); INLINE void prefix##_f6(z80_state *z80); INLINE void prefix##_f7(z80_state *z80); \
INLINE void prefix##_f8(z80_state *z80); INLINE void prefix##_f9(z80_state *z80); INLINE void prefix##_fa(z80_state *z80); INLINE void prefix##_fb(z80_state *z80); \
INLINE void prefix##_fc(z80_state *z80); INLINE void prefix##_fd(z80_state *z80); INLINE void prefix##_fe(z80_state *z80); INLINE void prefix##_ff(z80_state *z80); \
-static const funcptr tablename[0x100] = { \
+static const funcptr tablename[0x100] = { \
prefix##_00,prefix##_01,prefix##_02,prefix##_03,prefix##_04,prefix##_05,prefix##_06,prefix##_07, \
prefix##_08,prefix##_09,prefix##_0a,prefix##_0b,prefix##_0c,prefix##_0d,prefix##_0e,prefix##_0f, \
prefix##_10,prefix##_11,prefix##_12,prefix##_13,prefix##_14,prefix##_15,prefix##_16,prefix##_17, \
@@ -483,25 +483,25 @@ PROTOTYPES(Z80xycb,xycb);
/***************************************************************
* adjust cycle count by n T-states
***************************************************************/
-#define CC(Z,prefix,opcode) do { (Z)->icount -= z80->cc_##prefix[opcode]; } while (0)
+#define CC(Z,prefix,opcode) do { (Z)->icount -= z80->cc_##prefix[opcode]; } while (0)
/***************************************************************
* execute an opcode
***************************************************************/
-#define EXEC(Z,prefix,opcode) \
-{ \
- unsigned op = opcode; \
- CC(Z,prefix,op); \
- (*Z80##prefix[op])(Z); \
+#define EXEC(Z,prefix,opcode) \
+{ \
+ unsigned op = opcode; \
+ CC(Z,prefix,op); \
+ (*Z80##prefix[op])(Z); \
}
#if BIG_SWITCH
-#define EXEC_INLINE(Z,prefix,opcode) \
-{ \
- unsigned op = opcode; \
- CC(Z,prefix,op); \
- switch(op) \
- { \
+#define EXEC_INLINE(Z,prefix,opcode) \
+{ \
+ unsigned op = opcode; \
+ CC(Z,prefix,op); \
+ switch(op) \
+ { \
case 0x00:prefix##_##00(Z);break; case 0x01:prefix##_##01(Z);break; case 0x02:prefix##_##02(Z);break; case 0x03:prefix##_##03(Z);break; \
case 0x04:prefix##_##04(Z);break; case 0x05:prefix##_##05(Z);break; case 0x06:prefix##_##06(Z);break; case 0x07:prefix##_##07(Z);break; \
case 0x08:prefix##_##08(Z);break; case 0x09:prefix##_##09(Z);break; case 0x0a:prefix##_##0a(Z);break; case 0x0b:prefix##_##0b(Z);break; \
@@ -566,7 +566,7 @@ PROTOTYPES(Z80xycb,xycb);
case 0xf4:prefix##_##f4(Z);break; case 0xf5:prefix##_##f5(Z);break; case 0xf6:prefix##_##f6(Z);break; case 0xf7:prefix##_##f7(Z);break; \
case 0xf8:prefix##_##f8(Z);break; case 0xf9:prefix##_##f9(Z);break; case 0xfa:prefix##_##fa(Z);break; case 0xfb:prefix##_##fb(Z);break; \
case 0xfc:prefix##_##fc(Z);break; case 0xfd:prefix##_##fd(Z);break; case 0xfe:prefix##_##fe(Z);break; case 0xff:prefix##_##ff(Z);break; \
- } \
+ } \
}
#else
#define EXEC_INLINE EXEC
@@ -576,36 +576,36 @@ PROTOTYPES(Z80xycb,xycb);
/***************************************************************
* Enter halt state; write 1 to fake port on first execution
***************************************************************/
-#define ENTER_HALT(Z) do { \
- (Z)->PC--; \
- (Z)->halt = 1; \
+#define ENTER_HALT(Z) do { \
+ (Z)->PC--; \
+ (Z)->halt = 1; \
} while (0)
/***************************************************************
* Leave halt state; write 0 to fake port
***************************************************************/
-#define LEAVE_HALT(Z) do { \
- if( (Z)->halt ) \
- { \
- (Z)->halt = 0; \
- (Z)->PC++; \
- } \
+#define LEAVE_HALT(Z) do { \
+ if( (Z)->halt ) \
+ { \
+ (Z)->halt = 0; \
+ (Z)->PC++; \
+ } \
} while (0)
/***************************************************************
* Input a byte from given I/O port
***************************************************************/
-#define IN(Z,port) (Z)->io->read_byte(port)
+#define IN(Z,port) (Z)->io->read_byte(port)
/***************************************************************
* Output a byte to given I/O port
***************************************************************/
-#define OUT(Z,port,value) (Z)->io->write_byte(port, value)
+#define OUT(Z,port,value) (Z)->io->write_byte(port, value)
/***************************************************************
* Read a byte from given memory location
***************************************************************/
-#define RM(Z,addr) (Z)->program->read_byte(addr)
+#define RM(Z,addr) (Z)->program->read_byte(addr)
/***************************************************************
* Read a word from given memory location
@@ -619,7 +619,7 @@ INLINE void RM16(z80_state *z80, UINT32 addr, PAIR *r)
/***************************************************************
* Write a byte to given memory location
***************************************************************/
-#define WM(Z,addr,value) (Z)->program->write_byte(addr, value)
+#define WM(Z,addr,value) (Z)->program->write_byte(addr, value)
/***************************************************************
* Write a word to given memory location
@@ -666,164 +666,164 @@ INLINE UINT32 ARG16(z80_state *z80)
* Calculate the effective address EA of an opcode using
* IX+offset resp. IY+offset addressing.
***************************************************************/
-#define EAX(Z) do { (Z)->ea = (UINT32)(UINT16)((Z)->IX + (INT8)ARG(Z)); (Z)->WZ = (Z)->ea; } while (0)
-#define EAY(Z) do { (Z)->ea = (UINT32)(UINT16)((Z)->IY + (INT8)ARG(Z)); (Z)->WZ = (Z)->ea; } while (0)
+#define EAX(Z) do { (Z)->ea = (UINT32)(UINT16)((Z)->IX + (INT8)ARG(Z)); (Z)->WZ = (Z)->ea; } while (0)
+#define EAY(Z) do { (Z)->ea = (UINT32)(UINT16)((Z)->IY + (INT8)ARG(Z)); (Z)->WZ = (Z)->ea; } while (0)
/***************************************************************
* POP
***************************************************************/
-#define POP(Z,DR) do { RM16((Z), (Z)->SPD, &(Z)->DR); (Z)->SP += 2; } while (0)
+#define POP(Z,DR) do { RM16((Z), (Z)->SPD, &(Z)->DR); (Z)->SP += 2; } while (0)
/***************************************************************
* PUSH
***************************************************************/
-#define PUSH(Z,SR) do { (Z)->SP -= 2; WM16((Z), (Z)->SPD, &(Z)->SR); } while (0)
+#define PUSH(Z,SR) do { (Z)->SP -= 2; WM16((Z), (Z)->SPD, &(Z)->SR); } while (0)
/***************************************************************
* JP
***************************************************************/
-#define JP(Z) do { \
- (Z)->PCD = ARG16(Z); \
- (Z)->WZ = (Z)->PCD; \
+#define JP(Z) do { \
+ (Z)->PCD = ARG16(Z); \
+ (Z)->WZ = (Z)->PCD; \
} while (0)
/***************************************************************
* JP_COND
***************************************************************/
-#define JP_COND(Z, cond) do { \
- if (cond) \
- { \
- (Z)->PCD = ARG16(Z); \
- (Z)->WZ = (Z)->PCD; \
- } \
- else \
- { \
- (Z)->WZ = ARG16(Z); /* implicit do PC += 2 */ \
- } \
+#define JP_COND(Z, cond) do { \
+ if (cond) \
+ { \
+ (Z)->PCD = ARG16(Z); \
+ (Z)->WZ = (Z)->PCD; \
+ } \
+ else \
+ { \
+ (Z)->WZ = ARG16(Z); /* implicit do PC += 2 */ \
+ } \
} while (0)
/***************************************************************
* JR
***************************************************************/
-#define JR(Z) do { \
- INT8 arg = (INT8)ARG(Z); /* ARG() also increments PC */ \
- (Z)->PC += arg; /* so don't do PC += ARG() */ \
- (Z)->WZ = (Z)->PC; \
+#define JR(Z) do { \
+ INT8 arg = (INT8)ARG(Z); /* ARG() also increments PC */ \
+ (Z)->PC += arg; /* so don't do PC += ARG() */ \
+ (Z)->WZ = (Z)->PC; \
} while (0)
/***************************************************************
* JR_COND
***************************************************************/
-#define JR_COND(Z, cond, opcode) do { \
- if (cond) \
- { \
- JR(Z); \
- CC(Z, ex, opcode); \
- } \
- else (Z)->PC++; \
+#define JR_COND(Z, cond, opcode) do { \
+ if (cond) \
+ { \
+ JR(Z); \
+ CC(Z, ex, opcode); \
+ } \
+ else (Z)->PC++; \
} while (0)
/***************************************************************
* CALL
***************************************************************/
-#define CALL(Z) do { \
- (Z)->ea = ARG16(Z); \
- (Z)->WZ = (Z)->ea; \
- PUSH((Z), pc); \
- (Z)->PCD = (Z)->ea; \
+#define CALL(Z) do { \
+ (Z)->ea = ARG16(Z); \
+ (Z)->WZ = (Z)->ea; \
+ PUSH((Z), pc); \
+ (Z)->PCD = (Z)->ea; \
} while (0)
/***************************************************************
* CALL_COND
***************************************************************/
-#define CALL_COND(Z, cond, opcode) do { \
- if (cond) \
- { \
- (Z)->ea = ARG16(Z); \
- (Z)->WZ = (Z)->ea; \
- PUSH((Z), pc); \
- (Z)->PCD = (Z)->ea; \
- CC(Z, ex, opcode); \
- } \
- else \
- { \
- z80->WZ = ARG16(z80); /* implicit call PC+=2; */ \
- } \
+#define CALL_COND(Z, cond, opcode) do { \
+ if (cond) \
+ { \
+ (Z)->ea = ARG16(Z); \
+ (Z)->WZ = (Z)->ea; \
+ PUSH((Z), pc); \
+ (Z)->PCD = (Z)->ea; \
+ CC(Z, ex, opcode); \
+ } \
+ else \
+ { \
+ z80->WZ = ARG16(z80); /* implicit call PC+=2; */ \
+ } \
} while (0)
/***************************************************************
* RET_COND
***************************************************************/
-#define RET_COND(Z, cond, opcode) do { \
- if (cond) \
- { \
- POP((Z), pc); \
- (Z)->WZ = (Z)->PC; \
- CC(Z, ex, opcode); \
- } \
+#define RET_COND(Z, cond, opcode) do { \
+ if (cond) \
+ { \
+ POP((Z), pc); \
+ (Z)->WZ = (Z)->PC; \
+ CC(Z, ex, opcode); \
+ } \
} while (0)
/***************************************************************
* RETN
***************************************************************/
-#define RETN(Z) do { \
- LOG(("Z80 '%s' RETN z80->iff1:%d z80->iff2:%d\n", \
- (Z)->device->tag(), (Z)->iff1, (Z)->iff2)); \
- POP((Z), pc); \
- (Z)->WZ = (Z)->PC; \
- (Z)->iff1 = (Z)->iff2; \
+#define RETN(Z) do { \
+ LOG(("Z80 '%s' RETN z80->iff1:%d z80->iff2:%d\n", \
+ (Z)->device->tag(), (Z)->iff1, (Z)->iff2)); \
+ POP((Z), pc); \
+ (Z)->WZ = (Z)->PC; \
+ (Z)->iff1 = (Z)->iff2; \
} while (0)
/***************************************************************
* RETI
***************************************************************/
-#define RETI(Z) do { \
- POP((Z), pc); \
- (Z)->WZ = (Z)->PC; \
- (Z)->iff1 = (Z)->iff2; \
- (Z)->daisy.call_reti_device(); \
+#define RETI(Z) do { \
+ POP((Z), pc); \
+ (Z)->WZ = (Z)->PC; \
+ (Z)->iff1 = (Z)->iff2; \
+ (Z)->daisy.call_reti_device(); \
} while (0)
/***************************************************************
* LD R,A
***************************************************************/
-#define LD_R_A(Z) do { \
- (Z)->r = (Z)->A; \
- (Z)->r2 = (Z)->A & 0x80; /* keep bit 7 of r */ \
+#define LD_R_A(Z) do { \
+ (Z)->r = (Z)->A; \
+ (Z)->r2 = (Z)->A & 0x80; /* keep bit 7 of r */ \
} while (0)
/***************************************************************
* LD A,R
***************************************************************/
-#define LD_A_R(Z) do { \
- (Z)->A = ((Z)->r & 0x7f) | (Z)->r2; \
- (Z)->F = ((Z)->F & CF) | SZ[(Z)->A] | ((Z)->iff2 << 2); \
- (Z)->after_ldair = TRUE; \
+#define LD_A_R(Z) do { \
+ (Z)->A = ((Z)->r & 0x7f) | (Z)->r2; \
+ (Z)->F = ((Z)->F & CF) | SZ[(Z)->A] | ((Z)->iff2 << 2); \
+ (Z)->after_ldair = TRUE; \
} while (0)
/***************************************************************
* LD I,A
***************************************************************/
-#define LD_I_A(Z) do { \
- (Z)->i = (Z)->A; \
+#define LD_I_A(Z) do { \
+ (Z)->i = (Z)->A; \
} while (0)
/***************************************************************
* LD A,I
***************************************************************/
-#define LD_A_I(Z) do { \
- (Z)->A = (Z)->i; \
- (Z)->F = ((Z)->F & CF) | SZ[(Z)->A] | ((Z)->iff2 << 2); \
- (Z)->after_ldair = TRUE; \
+#define LD_A_I(Z) do { \
+ (Z)->A = (Z)->i; \
+ (Z)->F = ((Z)->F & CF) | SZ[(Z)->A] | ((Z)->iff2 << 2); \
+ (Z)->after_ldair = TRUE; \
} while (0)
/***************************************************************
* RST
***************************************************************/
-#define RST(Z, addr) do { \
- PUSH((Z), pc); \
- (Z)->PCD = addr; \
- (Z)->WZ = (Z)->PC; \
+#define RST(Z, addr) do { \
+ PUSH((Z), pc); \
+ (Z)->PCD = addr; \
+ (Z)->WZ = (Z)->PC; \
} while (0)
/***************************************************************
@@ -849,239 +849,239 @@ INLINE UINT8 DEC(z80_state *z80, UINT8 value)
/***************************************************************
* RLCA
***************************************************************/
-#define RLCA(Z) do { \
- (Z)->A = ((Z)->A << 1) | ((Z)->A >> 7); \
+#define RLCA(Z) do { \
+ (Z)->A = ((Z)->A << 1) | ((Z)->A >> 7); \
(Z)->F = ((Z)->F & (SF | ZF | PF)) | ((Z)->A & (YF | XF | CF)); \
} while (0)
/***************************************************************
* RRCA
***************************************************************/
-#define RRCA(Z) do { \
- (Z)->F = ((Z)->F & (SF | ZF | PF)) | ((Z)->A & CF); \
- (Z)->A = ((Z)->A >> 1) | ((Z)->A << 7); \
- (Z)->F |= ((Z)->A & (YF | XF)); \
+#define RRCA(Z) do { \
+ (Z)->F = ((Z)->F & (SF | ZF | PF)) | ((Z)->A & CF); \
+ (Z)->A = ((Z)->A >> 1) | ((Z)->A << 7); \
+ (Z)->F |= ((Z)->A & (YF | XF)); \
} while (0)
/***************************************************************
* RLA
***************************************************************/
-#define RLA(Z) do { \
- UINT8 res = ((Z)->A << 1) | ((Z)->F & CF); \
- UINT8 c = ((Z)->A & 0x80) ? CF : 0; \
- (Z)->F = ((Z)->F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
- (Z)->A = res; \
+#define RLA(Z) do { \
+ UINT8 res = ((Z)->A << 1) | ((Z)->F & CF); \
+ UINT8 c = ((Z)->A & 0x80) ? CF : 0; \
+ (Z)->F = ((Z)->F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
+ (Z)->A = res; \
} while (0)
/***************************************************************
* RRA
***************************************************************/
-#define RRA(Z) do { \
- UINT8 res = ((Z)->A >> 1) | ((Z)->F << 7); \
- UINT8 c = ((Z)->A & 0x01) ? CF : 0; \
- (Z)->F = ((Z)->F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
- (Z)->A = res; \
+#define RRA(Z) do { \
+ UINT8 res = ((Z)->A >> 1) | ((Z)->F << 7); \
+ UINT8 c = ((Z)->A & 0x01) ? CF : 0; \
+ (Z)->F = ((Z)->F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
+ (Z)->A = res; \
} while (0)
/***************************************************************
* RRD
***************************************************************/
-#define RRD(Z) do { \
- UINT8 n = RM((Z), (Z)->HL); \
- (Z)->WZ = (Z)->HL+1; \
- WM((Z), (Z)->HL, (n >> 4) | ((Z)->A << 4)); \
- (Z)->A = ((Z)->A & 0xf0) | (n & 0x0f); \
- (Z)->F = ((Z)->F & CF) | SZP[(Z)->A]; \
+#define RRD(Z) do { \
+ UINT8 n = RM((Z), (Z)->HL); \
+ (Z)->WZ = (Z)->HL+1; \
+ WM((Z), (Z)->HL, (n >> 4) | ((Z)->A << 4)); \
+ (Z)->A = ((Z)->A & 0xf0) | (n & 0x0f); \
+ (Z)->F = ((Z)->F & CF) | SZP[(Z)->A]; \
} while (0)
/***************************************************************
* RLD
***************************************************************/
-#define RLD(Z) do { \
- UINT8 n = RM((Z), (Z)->HL); \
- (Z)->WZ = (Z)->HL+1; \
- WM((Z), (Z)->HL, (n << 4) | ((Z)->A & 0x0f)); \
- (Z)->A = ((Z)->A & 0xf0) | (n >> 4); \
- (Z)->F = ((Z)->F & CF) | SZP[(Z)->A]; \
+#define RLD(Z) do { \
+ UINT8 n = RM((Z), (Z)->HL); \
+ (Z)->WZ = (Z)->HL+1; \
+ WM((Z), (Z)->HL, (n << 4) | ((Z)->A & 0x0f)); \
+ (Z)->A = ((Z)->A & 0xf0) | (n >> 4); \
+ (Z)->F = ((Z)->F & CF) | SZP[(Z)->A]; \
} while (0)
/***************************************************************
* ADD A,n
***************************************************************/
-#define ADD(Z, value) do { \
- UINT32 ah = (Z)->AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) + value); \
- (Z)->F = SZHVC_add[ah | res]; \
- (Z)->A = res; \
+#define ADD(Z, value) do { \
+ UINT32 ah = (Z)->AFD & 0xff00; \
+ UINT32 res = (UINT8)((ah >> 8) + value); \
+ (Z)->F = SZHVC_add[ah | res]; \
+ (Z)->A = res; \
} while (0)
/***************************************************************
* ADC A,n
***************************************************************/
-#define ADC(Z, value) do { \
- UINT32 ah = (Z)->AFD & 0xff00, c = (Z)->AFD & 1; \
- UINT32 res = (UINT8)((ah >> 8) + value + c); \
- (Z)->F = SZHVC_add[(c << 16) | ah | res]; \
- (Z)->A = res; \
+#define ADC(Z, value) do { \
+ UINT32 ah = (Z)->AFD & 0xff00, c = (Z)->AFD & 1; \
+ UINT32 res = (UINT8)((ah >> 8) + value + c); \
+ (Z)->F = SZHVC_add[(c << 16) | ah | res]; \
+ (Z)->A = res; \
} while (0)
/***************************************************************
* SUB n
***************************************************************/
-#define SUB(Z, value) do { \
- UINT32 ah = (Z)->AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) - value); \
- (Z)->F = SZHVC_sub[ah | res]; \
- (Z)->A = res; \
+#define SUB(Z, value) do { \
+ UINT32 ah = (Z)->AFD & 0xff00; \
+ UINT32 res = (UINT8)((ah >> 8) - value); \
+ (Z)->F = SZHVC_sub[ah | res]; \
+ (Z)->A = res; \
} while (0)
/***************************************************************
* SBC A,n
***************************************************************/
-#define SBC(Z, value) do { \
- UINT32 ah = (Z)->AFD & 0xff00, c = (Z)->AFD & 1; \
- UINT32 res = (UINT8)((ah >> 8) - value - c); \
- (Z)->F = SZHVC_sub[(c<<16) | ah | res]; \
- (Z)->A = res; \
+#define SBC(Z, value) do { \
+ UINT32 ah = (Z)->AFD & 0xff00, c = (Z)->AFD & 1; \
+ UINT32 res = (UINT8)((ah >> 8) - value - c); \
+ (Z)->F = SZHVC_sub[(c<<16) | ah | res]; \
+ (Z)->A = res; \
} while (0)
/***************************************************************
* NEG
***************************************************************/
-#define NEG(Z) do { \
- UINT8 value = (Z)->A; \
- (Z)->A = 0; \
- SUB(Z, value); \
+#define NEG(Z) do { \
+ UINT8 value = (Z)->A; \
+ (Z)->A = 0; \
+ SUB(Z, value); \
} while (0)
/***************************************************************
* DAA
***************************************************************/
-#define DAA(Z) do { \
- UINT8 a = (Z)->A; \
- if ((Z)->F & NF) { \
- if (((Z)->F&HF) | (((Z)->A&0xf)>9)) a-=6; \
- if (((Z)->F&CF) | ((Z)->A>0x99)) a-=0x60; \
- } \
- else { \
- if (((Z)->F&HF) | (((Z)->A&0xf)>9)) a+=6; \
- if (((Z)->F&CF) | ((Z)->A>0x99)) a+=0x60; \
- } \
+#define DAA(Z) do { \
+ UINT8 a = (Z)->A; \
+ if ((Z)->F & NF) { \
+ if (((Z)->F&HF) | (((Z)->A&0xf)>9)) a-=6; \
+ if (((Z)->F&CF) | ((Z)->A>0x99)) a-=0x60; \
+ } \
+ else { \
+ if (((Z)->F&HF) | (((Z)->A&0xf)>9)) a+=6; \
+ if (((Z)->F&CF) | ((Z)->A>0x99)) a+=0x60; \
+ } \
\
(Z)->F = ((Z)->F&(CF|NF)) | ((Z)->A>0x99) | (((Z)->A^a)&HF) | SZP[a]; \
- (Z)->A = a; \
+ (Z)->A = a; \
} while (0)
/***************************************************************
* AND n
***************************************************************/
-#define AND(Z, value) do { \
- (Z)->A &= value; \
- (Z)->F = SZP[(Z)->A] | HF; \
+#define AND(Z, value) do { \
+ (Z)->A &= value; \
+ (Z)->F = SZP[(Z)->A] | HF; \
} while (0)
/***************************************************************
* OR n
***************************************************************/
-#define OR(Z, value) do { \
- (Z)->A |= value; \
- (Z)->F = SZP[(Z)->A]; \
+#define OR(Z, value) do { \
+ (Z)->A |= value; \
+ (Z)->F = SZP[(Z)->A]; \
} while (0)
/***************************************************************
* XOR n
***************************************************************/
-#define XOR(Z, value) do { \
- (Z)->A ^= value; \
- (Z)->F = SZP[(Z)->A]; \
+#define XOR(Z, value) do { \
+ (Z)->A ^= value; \
+ (Z)->F = SZP[(Z)->A]; \
} while (0)
/***************************************************************
* CP n
***************************************************************/
-#define CP(Z, value) do { \
- unsigned val = value; \
- UINT32 ah = (Z)->AFD & 0xff00; \
- UINT32 res = (UINT8)((ah >> 8) - val); \
- (Z)->F = (SZHVC_sub[ah | res] & ~(YF | XF)) | \
- (val & (YF | XF)); \
+#define CP(Z, value) do { \
+ unsigned val = value; \
+ UINT32 ah = (Z)->AFD & 0xff00; \
+ UINT32 res = (UINT8)((ah >> 8) - val); \
+ (Z)->F = (SZHVC_sub[ah | res] & ~(YF | XF)) | \
+ (val & (YF | XF)); \
} while (0)
/***************************************************************
* EX AF,AF'
***************************************************************/
-#define EX_AF(Z) do { \
- PAIR tmp; \
- tmp = (Z)->af; (Z)->af = (Z)->af2; (Z)->af2 = tmp; \
+#define EX_AF(Z) do { \
+ PAIR tmp; \
+ tmp = (Z)->af; (Z)->af = (Z)->af2; (Z)->af2 = tmp; \
} while (0)
/***************************************************************
* EX DE,HL
***************************************************************/
-#define EX_DE_HL(Z) do { \
- PAIR tmp; \
- tmp = (Z)->de; (Z)->de = (Z)->hl; (Z)->hl = tmp; \
+#define EX_DE_HL(Z) do { \
+ PAIR tmp; \
+ tmp = (Z)->de; (Z)->de = (Z)->hl; (Z)->hl = tmp; \
} while (0)
/***************************************************************
* EXX
***************************************************************/
-#define EXX(Z) do { \
- PAIR tmp; \
- tmp = (Z)->bc; (Z)->bc = (Z)->bc2; (Z)->bc2 = tmp; \
- tmp = (Z)->de; (Z)->de = (Z)->de2; (Z)->de2 = tmp; \
- tmp = (Z)->hl; (Z)->hl = (Z)->hl2; (Z)->hl2 = tmp; \
+#define EXX(Z) do { \
+ PAIR tmp; \
+ tmp = (Z)->bc; (Z)->bc = (Z)->bc2; (Z)->bc2 = tmp; \
+ tmp = (Z)->de; (Z)->de = (Z)->de2; (Z)->de2 = tmp; \
+ tmp = (Z)->hl; (Z)->hl = (Z)->hl2; (Z)->hl2 = tmp; \
} while (0)
/***************************************************************
* EX (SP),r16
***************************************************************/
-#define EXSP(Z, DR) do { \
- PAIR tmp = { { 0, 0, 0, 0 } }; \
- RM16((Z), (Z)->SPD, &tmp); \
- WM16((Z), (Z)->SPD, &(Z)->DR); \
- (Z)->DR = tmp; \
- (Z)->WZ = (Z)->DR.d; \
+#define EXSP(Z, DR) do { \
+ PAIR tmp = { { 0, 0, 0, 0 } }; \
+ RM16((Z), (Z)->SPD, &tmp); \
+ WM16((Z), (Z)->SPD, &(Z)->DR); \
+ (Z)->DR = tmp; \
+ (Z)->WZ = (Z)->DR.d; \
} while (0)
/***************************************************************
* ADD16
***************************************************************/
-#define ADD16(Z, DR, SR) do { \
- UINT32 res = (Z)->DR.d + (Z)->SR.d; \
- (Z)->WZ = (Z)->DR.d + 1; \
- (Z)->F = ((Z)->F & (SF | ZF | VF)) | \
- ((((Z)->DR.d ^ res ^ (Z)->SR.d) >> 8) & HF) | \
- ((res >> 16) & CF) | ((res >> 8) & (YF | XF)); \
- (Z)->DR.w.l = (UINT16)res; \
+#define ADD16(Z, DR, SR) do { \
+ UINT32 res = (Z)->DR.d + (Z)->SR.d; \
+ (Z)->WZ = (Z)->DR.d + 1; \
+ (Z)->F = ((Z)->F & (SF | ZF | VF)) | \
+ ((((Z)->DR.d ^ res ^ (Z)->SR.d) >> 8) & HF) | \
+ ((res >> 16) & CF) | ((res >> 8) & (YF | XF)); \
+ (Z)->DR.w.l = (UINT16)res; \
} while (0)
/***************************************************************
* ADC r16,r16
***************************************************************/
-#define ADC16(Z, Reg) do { \
- UINT32 res = (Z)->HLD + (Z)->Reg.d + ((Z)->F & CF); \
- (Z)->WZ = (Z)->HL + 1; \
- (Z)->F = ((((Z)->HLD ^ res ^ (Z)->Reg.d) >> 8) & HF) | \
- ((res >> 16) & CF) | \
- ((res >> 8) & (SF | YF | XF)) | \
- ((res & 0xffff) ? 0 : ZF) | \
+#define ADC16(Z, Reg) do { \
+ UINT32 res = (Z)->HLD + (Z)->Reg.d + ((Z)->F & CF); \
+ (Z)->WZ = (Z)->HL + 1; \
+ (Z)->F = ((((Z)->HLD ^ res ^ (Z)->Reg.d) >> 8) & HF) | \
+ ((res >> 16) & CF) | \
+ ((res >> 8) & (SF | YF | XF)) | \
+ ((res & 0xffff) ? 0 : ZF) | \
((((Z)->Reg.d ^ (Z)->HLD ^ 0x8000) & ((Z)->Reg.d ^ res) & 0x8000) >> 13); \
- (Z)->HL = (UINT16)res; \
+ (Z)->HL = (UINT16)res; \
} while (0)
/***************************************************************
* SBC r16,r16
***************************************************************/
-#define SBC16(Z, Reg) do { \
- UINT32 res = (Z)->HLD - (Z)->Reg.d - ((Z)->F & CF); \
- (Z)->WZ = (Z)->HL + 1; \
- (Z)->F = ((((Z)->HLD ^ res ^ (Z)->Reg.d) >> 8) & HF) | NF | \
- ((res >> 16) & CF) | \
- ((res >> 8) & (SF | YF | XF)) | \
- ((res & 0xffff) ? 0 : ZF) | \
+#define SBC16(Z, Reg) do { \
+ UINT32 res = (Z)->HLD - (Z)->Reg.d - ((Z)->F & CF); \
+ (Z)->WZ = (Z)->HL + 1; \
+ (Z)->F = ((((Z)->HLD ^ res ^ (Z)->Reg.d) >> 8) & HF) | NF | \
+ ((res >> 16) & CF) | \
+ ((res >> 8) & (SF | YF | XF)) | \
+ ((res & 0xffff) ? 0 : ZF) | \
((((Z)->Reg.d ^ (Z)->HLD) & ((Z)->HLD ^ res) &0x8000) >> 13); \
- (Z)->HL = (UINT16)res; \
+ (Z)->HL = (UINT16)res; \
} while (0)
/***************************************************************
@@ -1184,21 +1184,21 @@ INLINE UINT8 SRL(z80_state *z80, UINT8 value)
* BIT bit,r8
***************************************************************/
#undef BIT
-#define BIT(Z, bit, reg) do { \
+#define BIT(Z, bit, reg) do { \
(Z)->F = ((Z)->F & CF) | HF | (SZ_BIT[reg & (1<<bit)] & ~(YF|XF)) | (reg & (YF|XF)); \
} while (0)
/***************************************************************
* BIT bit,(HL)
***************************************************************/
-#define BIT_HL(Z, bit, reg) do { \
+#define BIT_HL(Z, bit, reg) do { \
(Z)->F = ((Z)->F & CF) | HF | (SZ_BIT[reg & (1<<bit)] & ~(YF|XF)) | ((Z)->WZ_H & (YF|XF)); \
} while (0)
/***************************************************************
* BIT bit,(IX/Y+o)
***************************************************************/
-#define BIT_XY(Z, bit, reg) do { \
+#define BIT_XY(Z, bit, reg) do { \
(Z)->F = ((Z)->F & CF) | HF | (SZ_BIT[reg & (1<<bit)] & ~(YF|XF)) | (((Z)->ea>>8) & (YF|XF)); \
} while (0)
@@ -1221,819 +1221,819 @@ INLINE UINT8 SET(UINT8 bit, UINT8 value)
/***************************************************************
* LDI
***************************************************************/
-#define LDI(Z) do { \
- UINT8 io = RM((Z), (Z)->HL); \
- WM((Z), (Z)->DE, io); \
- (Z)->F &= SF | ZF | CF; \
+#define LDI(Z) do { \
+ UINT8 io = RM((Z), (Z)->HL); \
+ WM((Z), (Z)->DE, io); \
+ (Z)->F &= SF | ZF | CF; \
if (((Z)->A + io) & 0x02) (Z)->F |= YF; /* bit 1 -> flag 5 */ \
if (((Z)->A + io) & 0x08) (Z)->F |= XF; /* bit 3 -> flag 3 */ \
- (Z)->HL++; (Z)->DE++; (Z)->BC--; \
- if((Z)->BC) (Z)->F |= VF; \
+ (Z)->HL++; (Z)->DE++; (Z)->BC--; \
+ if((Z)->BC) (Z)->F |= VF; \
} while (0)
/***************************************************************
* CPI
***************************************************************/
-#define CPI(Z) do { \
- UINT8 val = RM((Z), (Z)->HL); \
- UINT8 res = (Z)->A - val; \
- (Z)->WZ++; \
- (Z)->HL++; (Z)->BC--; \
+#define CPI(Z) do { \
+ UINT8 val = RM((Z), (Z)->HL); \
+ UINT8 res = (Z)->A - val; \
+ (Z)->WZ++; \
+ (Z)->HL++; (Z)->BC--; \
(Z)->F = ((Z)->F & CF) | (SZ[res]&~(YF|XF)) | (((Z)->A^val^res)&HF) | NF; \
- if ((Z)->F & HF) res -= 1; \
- if (res & 0x02) (Z)->F |= YF; /* bit 1 -> flag 5 */ \
- if (res & 0x08) (Z)->F |= XF; /* bit 3 -> flag 3 */ \
- if ((Z)->BC) (Z)->F |= VF; \
+ if ((Z)->F & HF) res -= 1; \
+ if (res & 0x02) (Z)->F |= YF; /* bit 1 -> flag 5 */ \
+ if (res & 0x08) (Z)->F |= XF; /* bit 3 -> flag 3 */ \
+ if ((Z)->BC) (Z)->F |= VF; \
} while (0)
/***************************************************************
* INI
***************************************************************/
-#define INI(Z) do { \
- unsigned t; \
- UINT8 io = IN((Z), (Z)->BC); \
- (Z)->WZ = (Z)->BC + 1; \
- (Z)->B--; \
- WM((Z), (Z)->HL, io); \
- (Z)->HL++; \
- (Z)->F = SZ[(Z)->B]; \
- t = (unsigned)(((Z)->C + 1) & 0xff) + (unsigned)io; \
- if (io & SF) (Z)->F |= NF; \
- if (t & 0x100) (Z)->F |= HF | CF; \
- (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
+#define INI(Z) do { \
+ unsigned t; \
+ UINT8 io = IN((Z), (Z)->BC); \
+ (Z)->WZ = (Z)->BC + 1; \
+ (Z)->B--; \
+ WM((Z), (Z)->HL, io); \
+ (Z)->HL++; \
+ (Z)->F = SZ[(Z)->B]; \
+ t = (unsigned)(((Z)->C + 1) & 0xff) + (unsigned)io; \
+ if (io & SF) (Z)->F |= NF; \
+ if (t & 0x100) (Z)->F |= HF | CF; \
+ (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
} while (0)
/***************************************************************
* OUTI
***************************************************************/
-#define OUTI(Z) do { \
- unsigned t; \
- UINT8 io = RM((Z), (Z)->HL); \
- (Z)->B--; \
- (Z)->WZ = (Z)->BC + 1; \
- OUT((Z), (Z)->BC, io); \
- (Z)->HL++; \
- (Z)->F = SZ[(Z)->B]; \
- t = (unsigned)(Z)->L + (unsigned)io; \
- if (io & SF) (Z)->F |= NF; \
- if (t & 0x100) (Z)->F |= HF | CF; \
- (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
+#define OUTI(Z) do { \
+ unsigned t; \
+ UINT8 io = RM((Z), (Z)->HL); \
+ (Z)->B--; \
+ (Z)->WZ = (Z)->BC + 1; \
+ OUT((Z), (Z)->BC, io); \
+ (Z)->HL++; \
+ (Z)->F = SZ[(Z)->B]; \
+ t = (unsigned)(Z)->L + (unsigned)io; \
+ if (io & SF) (Z)->F |= NF; \
+ if (t & 0x100) (Z)->F |= HF | CF; \
+ (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
} while (0)
/***************************************************************
* LDD
***************************************************************/
-#define LDD(Z) do { \
- UINT8 io = RM((Z), (Z)->HL); \
- WM((Z), (Z)->DE, io); \
- (Z)->F &= SF | ZF | CF; \
+#define LDD(Z) do { \
+ UINT8 io = RM((Z), (Z)->HL); \
+ WM((Z), (Z)->DE, io); \
+ (Z)->F &= SF | ZF | CF; \
if (((Z)->A + io) & 0x02) (Z)->F |= YF; /* bit 1 -> flag 5 */ \
if (((Z)->A + io) & 0x08) (Z)->F |= XF; /* bit 3 -> flag 3 */ \
- (Z)->HL--; (Z)->DE--; (Z)->BC--; \
- if ((Z)->BC) (Z)->F |= VF; \
+ (Z)->HL--; (Z)->DE--; (Z)->BC--; \
+ if ((Z)->BC) (Z)->F |= VF; \
} while (0)
/***************************************************************
* CPD
***************************************************************/
-#define CPD(Z) do { \
- UINT8 val = RM((Z), (Z)->HL); \
- UINT8 res = (Z)->A - val; \
- (Z)->WZ--; \
- (Z)->HL--; (Z)->BC--; \
+#define CPD(Z) do { \
+ UINT8 val = RM((Z), (Z)->HL); \
+ UINT8 res = (Z)->A - val; \
+ (Z)->WZ--; \
+ (Z)->HL--; (Z)->BC--; \
(Z)->F = ((Z)->F & CF) | (SZ[res]&~(YF|XF)) | (((Z)->A^val^res)&HF) | NF; \
- if ((Z)->F & HF) res -= 1; \
- if (res & 0x02) (Z)->F |= YF; /* bit 1 -> flag 5 */ \
- if (res & 0x08) (Z)->F |= XF; /* bit 3 -> flag 3 */ \
- if ((Z)->BC) (Z)->F |= VF; \
+ if ((Z)->F & HF) res -= 1; \
+ if (res & 0x02) (Z)->F |= YF; /* bit 1 -> flag 5 */ \
+ if (res & 0x08) (Z)->F |= XF; /* bit 3 -> flag 3 */ \
+ if ((Z)->BC) (Z)->F |= VF; \
} while (0)
/***************************************************************
* IND
***************************************************************/
-#define IND(Z) do { \
- unsigned t; \
- UINT8 io = IN((Z), (Z)->BC); \
- (Z)->WZ = (Z)->BC - 1; \
- (Z)->B--; \
- WM((Z), (Z)->HL, io); \
- (Z)->HL--; \
- (Z)->F = SZ[(Z)->B]; \
- t = ((unsigned)((Z)->C - 1) & 0xff) + (unsigned)io; \
- if (io & SF) (Z)->F |= NF; \
- if (t & 0x100) (Z)->F |= HF | CF; \
- (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
+#define IND(Z) do { \
+ unsigned t; \
+ UINT8 io = IN((Z), (Z)->BC); \
+ (Z)->WZ = (Z)->BC - 1; \
+ (Z)->B--; \
+ WM((Z), (Z)->HL, io); \
+ (Z)->HL--; \
+ (Z)->F = SZ[(Z)->B]; \
+ t = ((unsigned)((Z)->C - 1) & 0xff) + (unsigned)io; \
+ if (io & SF) (Z)->F |= NF; \
+ if (t & 0x100) (Z)->F |= HF | CF; \
+ (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
} while (0)
/***************************************************************
* OUTD
***************************************************************/
-#define OUTD(Z) do { \
- unsigned t; \
- UINT8 io = RM((Z), (Z)->HL); \
- (Z)->B--; \
- (Z)->WZ = (Z)->BC - 1; \
- OUT((Z), (Z)->BC, io); \
- (Z)->HL--; \
- (Z)->F = SZ[(Z)->B]; \
- t = (unsigned)(Z)->L + (unsigned)io; \
- if (io & SF) (Z)->F |= NF; \
- if (t & 0x100) (Z)->F |= HF | CF; \
- (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
+#define OUTD(Z) do { \
+ unsigned t; \
+ UINT8 io = RM((Z), (Z)->HL); \
+ (Z)->B--; \
+ (Z)->WZ = (Z)->BC - 1; \
+ OUT((Z), (Z)->BC, io); \
+ (Z)->HL--; \
+ (Z)->F = SZ[(Z)->B]; \
+ t = (unsigned)(Z)->L + (unsigned)io; \
+ if (io & SF) (Z)->F |= NF; \
+ if (t & 0x100) (Z)->F |= HF | CF; \
+ (Z)->F |= SZP[(UINT8)(t & 0x07) ^ (Z)->B] & PF; \
} while (0)
/***************************************************************
* LDIR
***************************************************************/
-#define LDIR(Z) do { \
- LDI(Z); \
- if ((Z)->BC != 0) \
- { \
- (Z)->PC -= 2; \
- (Z)->WZ = (Z)->PC + 1; \
- CC(Z, ex, 0xb0); \
- } \
+#define LDIR(Z) do { \
+ LDI(Z); \
+ if ((Z)->BC != 0) \
+ { \
+ (Z)->PC -= 2; \
+ (Z)->WZ = (Z)->PC + 1; \
+ CC(Z, ex, 0xb0); \
+ } \
} while (0)
/***************************************************************
* CPIR
***************************************************************/
-#define CPIR(Z) do { \
- CPI(Z); \
- if ((Z)->BC != 0 && !((Z)->F & ZF)) \
- { \
- (Z)->PC -= 2; \
- (Z)->WZ = (Z)->PC + 1; \
- CC(Z, ex, 0xb1); \
- } \
+#define CPIR(Z) do { \
+ CPI(Z); \
+ if ((Z)->BC != 0 && !((Z)->F & ZF)) \
+ { \
+ (Z)->PC -= 2; \
+ (Z)->WZ = (Z)->PC + 1; \
+ CC(Z, ex, 0xb1); \
+ } \
} while (0)
/***************************************************************
* INIR
***************************************************************/
-#define INIR(Z) do { \
- INI(Z); \
- if ((Z)->B != 0) \
- { \
- (Z)->PC -= 2; \
- CC(Z, ex, 0xb2); \
- } \
+#define INIR(Z) do { \
+ INI(Z); \
+ if ((Z)->B != 0) \
+ { \
+ (Z)->PC -= 2; \
+ CC(Z, ex, 0xb2); \
+ } \
} while (0)
/***************************************************************
* OTIR
***************************************************************/
-#define OTIR(Z) do { \
- OUTI(Z); \
- if ((Z)->B != 0) \
- { \
- (Z)->PC -= 2; \
- CC(Z, ex, 0xb3); \
- } \
+#define OTIR(Z) do { \
+ OUTI(Z); \
+ if ((Z)->B != 0) \
+ { \
+ (Z)->PC -= 2; \
+ CC(Z, ex, 0xb3); \
+ } \
} while (0)
/***************************************************************
* LDDR
***************************************************************/
-#define LDDR(Z) do { \
- LDD(Z); \
- if ((Z)->BC != 0) \
- { \
- (Z)->PC -= 2; \
- (Z)->WZ = (Z)->PC + 1; \
- CC(Z, ex, 0xb8); \
- } \
+#define LDDR(Z) do { \
+ LDD(Z); \
+ if ((Z)->BC != 0) \
+ { \
+ (Z)->PC -= 2; \
+ (Z)->WZ = (Z)->PC + 1; \
+ CC(Z, ex, 0xb8); \
+ } \
} while (0)
/***************************************************************
* CPDR
***************************************************************/
-#define CPDR(Z) do { \
- CPD(Z); \
- if ((Z)->BC != 0 && !((Z)->F & ZF)) \
- { \
- (Z)->PC -= 2; \
- (Z)->WZ = (Z)->PC + 1; \
- CC(Z, ex, 0xb9); \
- } \
+#define CPDR(Z) do { \
+ CPD(Z); \
+ if ((Z)->BC != 0 && !((Z)->F & ZF)) \
+ { \
+ (Z)->PC -= 2; \
+ (Z)->WZ = (Z)->PC + 1; \
+ CC(Z, ex, 0xb9); \
+ } \
} while (0)
/***************************************************************
* INDR
***************************************************************/
-#define INDR(Z) do { \
- IND(Z); \
- if ((Z)->B != 0) \
- { \
- (Z)->PC -= 2; \
- CC(Z, ex, 0xba); \
- } \
+#define INDR(Z) do { \
+ IND(Z); \
+ if ((Z)->B != 0) \
+ { \
+ (Z)->PC -= 2; \
+ CC(Z, ex, 0xba); \
+ } \
} while (0)
/***************************************************************
* OTDR
***************************************************************/
-#define OTDR(Z) do { \
- OUTD(Z); \
- if ((Z)->B != 0) \
- { \
- (Z)->PC -= 2; \
- CC(Z, ex, 0xbb); \
- } \
+#define OTDR(Z) do { \
+ OUTD(Z); \
+ if ((Z)->B != 0) \
+ { \
+ (Z)->PC -= 2; \
+ CC(Z, ex, 0xbb); \
+ } \
} while (0)
/***************************************************************
* EI
***************************************************************/
-#define EI(Z) do { \
- (Z)->iff1 = (Z)->iff2 = 1; \
- (Z)->after_ei = TRUE; \
+#define EI(Z) do { \
+ (Z)->iff1 = (Z)->iff2 = 1; \
+ (Z)->after_ei = TRUE; \
} while (0)
/**********************************************************
* opcodes with CB prefix
* rotate, shift and bit operations
**********************************************************/
-OP(cb,00) { z80->B = RLC(z80, z80->B); } /* RLC B */
-OP(cb,01) { z80->C = RLC(z80, z80->C); } /* RLC C */
-OP(cb,02) { z80->D = RLC(z80, z80->D); } /* RLC D */
-OP(cb,03) { z80->E = RLC(z80, z80->E); } /* RLC E */
-OP(cb,04) { z80->H = RLC(z80, z80->H); } /* RLC H */
-OP(cb,05) { z80->L = RLC(z80, z80->L); } /* RLC L */
-OP(cb,06) { WM(z80, z80->HL, RLC(z80, RM(z80, z80->HL))); } /* RLC (HL) */
-OP(cb,07) { z80->A = RLC(z80, z80->A); } /* RLC A */
-
-OP(cb,08) { z80->B = RRC(z80, z80->B); } /* RRC B */
-OP(cb,09) { z80->C = RRC(z80, z80->C); } /* RRC C */
-OP(cb,0a) { z80->D = RRC(z80, z80->D); } /* RRC D */
-OP(cb,0b) { z80->E = RRC(z80, z80->E); } /* RRC E */
-OP(cb,0c) { z80->H = RRC(z80, z80->H); } /* RRC H */
-OP(cb,0d) { z80->L = RRC(z80, z80->L); } /* RRC L */
-OP(cb,0e) { WM(z80, z80->HL, RRC(z80, RM(z80, z80->HL))); } /* RRC (HL) */
-OP(cb,0f) { z80->A = RRC(z80, z80->A); } /* RRC A */
-
-OP(cb,10) { z80->B = RL(z80, z80->B); } /* RL B */
-OP(cb,11) { z80->C = RL(z80, z80->C); } /* RL C */
-OP(cb,12) { z80->D = RL(z80, z80->D); } /* RL D */
-OP(cb,13) { z80->E = RL(z80, z80->E); } /* RL E */
-OP(cb,14) { z80->H = RL(z80, z80->H); } /* RL H */
-OP(cb,15) { z80->L = RL(z80, z80->L); } /* RL L */
-OP(cb,16) { WM(z80, z80->HL, RL(z80, RM(z80, z80->HL))); } /* RL (HL) */
-OP(cb,17) { z80->A = RL(z80, z80->A); } /* RL A */
-
-OP(cb,18) { z80->B = RR(z80, z80->B); } /* RR B */
-OP(cb,19) { z80->C = RR(z80, z80->C); } /* RR C */
-OP(cb,1a) { z80->D = RR(z80, z80->D); } /* RR D */
-OP(cb,1b) { z80->E = RR(z80, z80->E); } /* RR E */
-OP(cb,1c) { z80->H = RR(z80, z80->H); } /* RR H */
-OP(cb,1d) { z80->L = RR(z80, z80->L); } /* RR L */
-OP(cb,1e) { WM(z80, z80->HL, RR(z80, RM(z80, z80->HL))); } /* RR (HL) */
-OP(cb,1f) { z80->A = RR(z80, z80->A); } /* RR A */
-
-OP(cb,20) { z80->B = SLA(z80, z80->B); } /* SLA B */
-OP(cb,21) { z80->C = SLA(z80, z80->C); } /* SLA C */
-OP(cb,22) { z80->D = SLA(z80, z80->D); } /* SLA D */
-OP(cb,23) { z80->E = SLA(z80, z80->E); } /* SLA E */
-OP(cb,24) { z80->H = SLA(z80, z80->H); } /* SLA H */
-OP(cb,25) { z80->L = SLA(z80, z80->L); } /* SLA L */
-OP(cb,26) { WM(z80, z80->HL, SLA(z80, RM(z80, z80->HL))); } /* SLA (HL) */
-OP(cb,27) { z80->A = SLA(z80, z80->A); } /* SLA A */
-
-OP(cb,28) { z80->B = SRA(z80, z80->B); } /* SRA B */
-OP(cb,29) { z80->C = SRA(z80, z80->C); } /* SRA C */
-OP(cb,2a) { z80->D = SRA(z80, z80->D); } /* SRA D */
-OP(cb,2b) { z80->E = SRA(z80, z80->E); } /* SRA E */
-OP(cb,2c) { z80->H = SRA(z80, z80->H); } /* SRA H */
-OP(cb,2d) { z80->L = SRA(z80, z80->L); } /* SRA L */
-OP(cb,2e) { WM(z80, z80->HL, SRA(z80, RM(z80, z80->HL))); } /* SRA (HL) */
-OP(cb,2f) { z80->A = SRA(z80, z80->A); } /* SRA A */
-
-OP(cb,30) { z80->B = SLL(z80, z80->B); } /* SLL B */
-OP(cb,31) { z80->C = SLL(z80, z80->C); } /* SLL C */
-OP(cb,32) { z80->D = SLL(z80, z80->D); } /* SLL D */
-OP(cb,33) { z80->E = SLL(z80, z80->E); } /* SLL E */
-OP(cb,34) { z80->H = SLL(z80, z80->H); } /* SLL H */
-OP(cb,35) { z80->L = SLL(z80, z80->L); } /* SLL L */
-OP(cb,36) { WM(z80, z80->HL, SLL(z80, RM(z80, z80->HL))); } /* SLL (HL) */
-OP(cb,37) { z80->A = SLL(z80, z80->A); } /* SLL A */
-
-OP(cb,38) { z80->B = SRL(z80, z80->B); } /* SRL B */
-OP(cb,39) { z80->C = SRL(z80, z80->C); } /* SRL C */
-OP(cb,3a) { z80->D = SRL(z80, z80->D); } /* SRL D */
-OP(cb,3b) { z80->E = SRL(z80, z80->E); } /* SRL E */
-OP(cb,3c) { z80->H = SRL(z80, z80->H); } /* SRL H */
-OP(cb,3d) { z80->L = SRL(z80, z80->L); } /* SRL L */
-OP(cb,3e) { WM(z80, z80->HL, SRL(z80, RM(z80, z80->HL))); } /* SRL (HL) */
-OP(cb,3f) { z80->A = SRL(z80, z80->A); } /* SRL A */
-
-OP(cb,40) { BIT(z80, 0, z80->B); } /* BIT 0,B */
-OP(cb,41) { BIT(z80, 0, z80->C); } /* BIT 0,C */
-OP(cb,42) { BIT(z80, 0, z80->D); } /* BIT 0,D */
-OP(cb,43) { BIT(z80, 0, z80->E); } /* BIT 0,E */
-OP(cb,44) { BIT(z80, 0, z80->H); } /* BIT 0,H */
-OP(cb,45) { BIT(z80, 0, z80->L); } /* BIT 0,L */
-OP(cb,46) { BIT_HL(z80, 0, RM(z80, z80->HL)); } /* BIT 0,(HL) */
-OP(cb,47) { BIT(z80, 0, z80->A); } /* BIT 0,A */
-
-OP(cb,48) { BIT(z80, 1, z80->B); } /* BIT 1,B */
-OP(cb,49) { BIT(z80, 1, z80->C); } /* BIT 1,C */
-OP(cb,4a) { BIT(z80, 1, z80->D); } /* BIT 1,D */
-OP(cb,4b) { BIT(z80, 1, z80->E); } /* BIT 1,E */
-OP(cb,4c) { BIT(z80, 1, z80->H); } /* BIT 1,H */
-OP(cb,4d) { BIT(z80, 1, z80->L); } /* BIT 1,L */
-OP(cb,4e) { BIT_HL(z80, 1, RM(z80, z80->HL)); } /* BIT 1,(HL) */
-OP(cb,4f) { BIT(z80, 1, z80->A); } /* BIT 1,A */
-
-OP(cb,50) { BIT(z80, 2, z80->B); } /* BIT 2,B */
-OP(cb,51) { BIT(z80, 2, z80->C); } /* BIT 2,C */
-OP(cb,52) { BIT(z80, 2, z80->D); } /* BIT 2,D */
-OP(cb,53) { BIT(z80, 2, z80->E); } /* BIT 2,E */
-OP(cb,54) { BIT(z80, 2, z80->H); } /* BIT 2,H */
-OP(cb,55) { BIT(z80, 2, z80->L); } /* BIT 2,L */
-OP(cb,56) { BIT_HL(z80, 2, RM(z80, z80->HL)); } /* BIT 2,(HL) */
-OP(cb,57) { BIT(z80, 2, z80->A); } /* BIT 2,A */
-
-OP(cb,58) { BIT(z80, 3, z80->B); } /* BIT 3,B */
-OP(cb,59) { BIT(z80, 3, z80->C); } /* BIT 3,C */
-OP(cb,5a) { BIT(z80, 3, z80->D); } /* BIT 3,D */
-OP(cb,5b) { BIT(z80, 3, z80->E); } /* BIT 3,E */
-OP(cb,5c) { BIT(z80, 3, z80->H); } /* BIT 3,H */
-OP(cb,5d) { BIT(z80, 3, z80->L); } /* BIT 3,L */
-OP(cb,5e) { BIT_HL(z80, 3, RM(z80, z80->HL)); } /* BIT 3,(HL) */
-OP(cb,5f) { BIT(z80, 3, z80->A); } /* BIT 3,A */
-
-OP(cb,60) { BIT(z80, 4, z80->B); } /* BIT 4,B */
-OP(cb,61) { BIT(z80, 4, z80->C); } /* BIT 4,C */
-OP(cb,62) { BIT(z80, 4, z80->D); } /* BIT 4,D */
-OP(cb,63) { BIT(z80, 4, z80->E); } /* BIT 4,E */
-OP(cb,64) { BIT(z80, 4, z80->H); } /* BIT 4,H */
-OP(cb,65) { BIT(z80, 4, z80->L); } /* BIT 4,L */
-OP(cb,66) { BIT_HL(z80, 4, RM(z80, z80->HL)); } /* BIT 4,(HL) */
-OP(cb,67) { BIT(z80, 4, z80->A); } /* BIT 4,A */
-
-OP(cb,68) { BIT(z80, 5, z80->B); } /* BIT 5,B */
-OP(cb,69) { BIT(z80, 5, z80->C); } /* BIT 5,C */
-OP(cb,6a) { BIT(z80, 5, z80->D); } /* BIT 5,D */
-OP(cb,6b) { BIT(z80, 5, z80->E); } /* BIT 5,E */
-OP(cb,6c) { BIT(z80, 5, z80->H); } /* BIT 5,H */
-OP(cb,6d) { BIT(z80, 5, z80->L); } /* BIT 5,L */
-OP(cb,6e) { BIT_HL(z80, 5, RM(z80, z80->HL)); } /* BIT 5,(HL) */
-OP(cb,6f) { BIT(z80, 5, z80->A); } /* BIT 5,A */
-
-OP(cb,70) { BIT(z80, 6, z80->B); } /* BIT 6,B */
-OP(cb,71) { BIT(z80, 6, z80->C); } /* BIT 6,C */
-OP(cb,72) { BIT(z80, 6, z80->D); } /* BIT 6,D */
-OP(cb,73) { BIT(z80, 6, z80->E); } /* BIT 6,E */
-OP(cb,74) { BIT(z80, 6, z80->H); } /* BIT 6,H */
-OP(cb,75) { BIT(z80, 6, z80->L); } /* BIT 6,L */
-OP(cb,76) { BIT_HL(z80, 6, RM(z80, z80->HL)); } /* BIT 6,(HL) */
-OP(cb,77) { BIT(z80, 6, z80->A); } /* BIT 6,A */
-
-OP(cb,78) { BIT(z80, 7, z80->B); } /* BIT 7,B */
-OP(cb,79) { BIT(z80, 7, z80->C); } /* BIT 7,C */
-OP(cb,7a) { BIT(z80, 7, z80->D); } /* BIT 7,D */
-OP(cb,7b) { BIT(z80, 7, z80->E); } /* BIT 7,E */
-OP(cb,7c) { BIT(z80, 7, z80->H); } /* BIT 7,H */
-OP(cb,7d) { BIT(z80, 7, z80->L); } /* BIT 7,L */
-OP(cb,7e) { BIT_HL(z80, 7, RM(z80, z80->HL)); } /* BIT 7,(HL) */
-OP(cb,7f) { BIT(z80, 7, z80->A); } /* BIT 7,A */
-
-OP(cb,80) { z80->B = RES(0, z80->B); } /* RES 0,B */
-OP(cb,81) { z80->C = RES(0, z80->C); } /* RES 0,C */
-OP(cb,82) { z80->D = RES(0, z80->D); } /* RES 0,D */
-OP(cb,83) { z80->E = RES(0, z80->E); } /* RES 0,E */
-OP(cb,84) { z80->H = RES(0, z80->H); } /* RES 0,H */
-OP(cb,85) { z80->L = RES(0, z80->L); } /* RES 0,L */
-OP(cb,86) { WM(z80, z80->HL, RES(0, RM(z80, z80->HL))); } /* RES 0,(HL) */
-OP(cb,87) { z80->A = RES(0, z80->A); } /* RES 0,A */
-
-OP(cb,88) { z80->B = RES(1, z80->B); } /* RES 1,B */
-OP(cb,89) { z80->C = RES(1, z80->C); } /* RES 1,C */
-OP(cb,8a) { z80->D = RES(1, z80->D); } /* RES 1,D */
-OP(cb,8b) { z80->E = RES(1, z80->E); } /* RES 1,E */
-OP(cb,8c) { z80->H = RES(1, z80->H); } /* RES 1,H */
-OP(cb,8d) { z80->L = RES(1, z80->L); } /* RES 1,L */
-OP(cb,8e) { WM(z80, z80->HL, RES(1, RM(z80, z80->HL))); } /* RES 1,(HL) */
-OP(cb,8f) { z80->A = RES(1, z80->A); } /* RES 1,A */
-
-OP(cb,90) { z80->B = RES(2, z80->B); } /* RES 2,B */
-OP(cb,91) { z80->C = RES(2, z80->C); } /* RES 2,C */
-OP(cb,92) { z80->D = RES(2, z80->D); } /* RES 2,D */
-OP(cb,93) { z80->E = RES(2, z80->E); } /* RES 2,E */
-OP(cb,94) { z80->H = RES(2, z80->H); } /* RES 2,H */
-OP(cb,95) { z80->L = RES(2, z80->L); } /* RES 2,L */
-OP(cb,96) { WM(z80, z80->HL, RES(2, RM(z80, z80->HL))); } /* RES 2,(HL) */
-OP(cb,97) { z80->A = RES(2, z80->A); } /* RES 2,A */
-
-OP(cb,98) { z80->B = RES(3, z80->B); } /* RES 3,B */
-OP(cb,99) { z80->C = RES(3, z80->C); } /* RES 3,C */
-OP(cb,9a) { z80->D = RES(3, z80->D); } /* RES 3,D */
-OP(cb,9b) { z80->E = RES(3, z80->E); } /* RES 3,E */
-OP(cb,9c) { z80->H = RES(3, z80->H); } /* RES 3,H */
-OP(cb,9d) { z80->L = RES(3, z80->L); } /* RES 3,L */
-OP(cb,9e) { WM(z80, z80->HL, RES(3, RM(z80, z80->HL))); } /* RES 3,(HL) */
-OP(cb,9f) { z80->A = RES(3, z80->A); } /* RES 3,A */
-
-OP(cb,a0) { z80->B = RES(4, z80->B); } /* RES 4,B */
-OP(cb,a1) { z80->C = RES(4, z80->C); } /* RES 4,C */
-OP(cb,a2) { z80->D = RES(4, z80->D); } /* RES 4,D */
-OP(cb,a3) { z80->E = RES(4, z80->E); } /* RES 4,E */
-OP(cb,a4) { z80->H = RES(4, z80->H); } /* RES 4,H */
-OP(cb,a5) { z80->L = RES(4, z80->L); } /* RES 4,L */
-OP(cb,a6) { WM(z80, z80->HL, RES(4, RM(z80, z80->HL))); } /* RES 4,(HL) */
-OP(cb,a7) { z80->A = RES(4, z80->A); } /* RES 4,A */
-
-OP(cb,a8) { z80->B = RES(5, z80->B); } /* RES 5,B */
-OP(cb,a9) { z80->C = RES(5, z80->C); } /* RES 5,C */
-OP(cb,aa) { z80->D = RES(5, z80->D); } /* RES 5,D */
-OP(cb,ab) { z80->E = RES(5, z80->E); } /* RES 5,E */
-OP(cb,ac) { z80->H = RES(5, z80->H); } /* RES 5,H */
-OP(cb,ad) { z80->L = RES(5, z80->L); } /* RES 5,L */
-OP(cb,ae) { WM(z80, z80->HL, RES(5, RM(z80, z80->HL))); } /* RES 5,(HL) */
-OP(cb,af) { z80->A = RES(5, z80->A); } /* RES 5,A */
-
-OP(cb,b0) { z80->B = RES(6, z80->B); } /* RES 6,B */
-OP(cb,b1) { z80->C = RES(6, z80->C); } /* RES 6,C */
-OP(cb,b2) { z80->D = RES(6, z80->D); } /* RES 6,D */
-OP(cb,b3) { z80->E = RES(6, z80->E); } /* RES 6,E */
-OP(cb,b4) { z80->H = RES(6, z80->H); } /* RES 6,H */
-OP(cb,b5) { z80->L = RES(6, z80->L); } /* RES 6,L */
-OP(cb,b6) { WM(z80, z80->HL, RES(6, RM(z80, z80->HL))); } /* RES 6,(HL) */
-OP(cb,b7) { z80->A = RES(6, z80->A); } /* RES 6,A */
-
-OP(cb,b8) { z80->B = RES(7, z80->B); } /* RES 7,B */
-OP(cb,b9) { z80->C = RES(7, z80->C); } /* RES 7,C */
-OP(cb,ba) { z80->D = RES(7, z80->D); } /* RES 7,D */
-OP(cb,bb) { z80->E = RES(7, z80->E); } /* RES 7,E */
-OP(cb,bc) { z80->H = RES(7, z80->H); } /* RES 7,H */
-OP(cb,bd) { z80->L = RES(7, z80->L); } /* RES 7,L */
-OP(cb,be) { WM(z80, z80->HL, RES(7, RM(z80, z80->HL))); } /* RES 7,(HL) */
-OP(cb,bf) { z80->A = RES(7, z80->A); } /* RES 7,A */
-
-OP(cb,c0) { z80->B = SET(0, z80->B); } /* SET 0,B */
-OP(cb,c1) { z80->C = SET(0, z80->C); } /* SET 0,C */
-OP(cb,c2) { z80->D = SET(0, z80->D); } /* SET 0,D */
-OP(cb,c3) { z80->E = SET(0, z80->E); } /* SET 0,E */
-OP(cb,c4) { z80->H = SET(0, z80->H); } /* SET 0,H */
-OP(cb,c5) { z80->L = SET(0, z80->L); } /* SET 0,L */
-OP(cb,c6) { WM(z80, z80->HL, SET(0, RM(z80, z80->HL))); } /* SET 0,(HL) */
-OP(cb,c7) { z80->A = SET(0, z80->A); } /* SET 0,A */
-
-OP(cb,c8) { z80->B = SET(1, z80->B); } /* SET 1,B */
-OP(cb,c9) { z80->C = SET(1, z80->C); } /* SET 1,C */
-OP(cb,ca) { z80->D = SET(1, z80->D); } /* SET 1,D */
-OP(cb,cb) { z80->E = SET(1, z80->E); } /* SET 1,E */
-OP(cb,cc) { z80->H = SET(1, z80->H); } /* SET 1,H */
-OP(cb,cd) { z80->L = SET(1, z80->L); } /* SET 1,L */
-OP(cb,ce) { WM(z80, z80->HL, SET(1, RM(z80, z80->HL))); } /* SET 1,(HL) */
-OP(cb,cf) { z80->A = SET(1, z80->A); } /* SET 1,A */
-
-OP(cb,d0) { z80->B = SET(2, z80->B); } /* SET 2,B */
-OP(cb,d1) { z80->C = SET(2, z80->C); } /* SET 2,C */
-OP(cb,d2) { z80->D = SET(2, z80->D); } /* SET 2,D */
-OP(cb,d3) { z80->E = SET(2, z80->E); } /* SET 2,E */
-OP(cb,d4) { z80->H = SET(2, z80->H); } /* SET 2,H */
-OP(cb,d5) { z80->L = SET(2, z80->L); } /* SET 2,L */
-OP(cb,d6) { WM(z80, z80->HL, SET(2, RM(z80, z80->HL))); } /* SET 2,(HL) */
-OP(cb,d7) { z80->A = SET(2, z80->A); } /* SET 2,A */
-
-OP(cb,d8) { z80->B = SET(3, z80->B); } /* SET 3,B */
-OP(cb,d9) { z80->C = SET(3, z80->C); } /* SET 3,C */
-OP(cb,da) { z80->D = SET(3, z80->D); } /* SET 3,D */
-OP(cb,db) { z80->E = SET(3, z80->E); } /* SET 3,E */
-OP(cb,dc) { z80->H = SET(3, z80->H); } /* SET 3,H */
-OP(cb,dd) { z80->L = SET(3, z80->L); } /* SET 3,L */
-OP(cb,de) { WM(z80, z80->HL, SET(3, RM(z80, z80->HL))); } /* SET 3,(HL) */
-OP(cb,df) { z80->A = SET(3, z80->A); } /* SET 3,A */
-
-OP(cb,e0) { z80->B = SET(4, z80->B); } /* SET 4,B */
-OP(cb,e1) { z80->C = SET(4, z80->C); } /* SET 4,C */
-OP(cb,e2) { z80->D = SET(4, z80->D); } /* SET 4,D */
-OP(cb,e3) { z80->E = SET(4, z80->E); } /* SET 4,E */
-OP(cb,e4) { z80->H = SET(4, z80->H); } /* SET 4,H */
-OP(cb,e5) { z80->L = SET(4, z80->L); } /* SET 4,L */
-OP(cb,e6) { WM(z80, z80->HL, SET(4, RM(z80, z80->HL))); } /* SET 4,(HL) */
-OP(cb,e7) { z80->A = SET(4, z80->A); } /* SET 4,A */
-
-OP(cb,e8) { z80->B = SET(5, z80->B); } /* SET 5,B */
-OP(cb,e9) { z80->C = SET(5, z80->C); } /* SET 5,C */
-OP(cb,ea) { z80->D = SET(5, z80->D); } /* SET 5,D */
-OP(cb,eb) { z80->E = SET(5, z80->E); } /* SET 5,E */
-OP(cb,ec) { z80->H = SET(5, z80->H); } /* SET 5,H */
-OP(cb,ed) { z80->L = SET(5, z80->L); } /* SET 5,L */
-OP(cb,ee) { WM(z80, z80->HL, SET(5, RM(z80, z80->HL))); } /* SET 5,(HL) */
-OP(cb,ef) { z80->A = SET(5, z80->A); } /* SET 5,A */
-
-OP(cb,f0) { z80->B = SET(6, z80->B); } /* SET 6,B */
-OP(cb,f1) { z80->C = SET(6, z80->C); } /* SET 6,C */
-OP(cb,f2) { z80->D = SET(6, z80->D); } /* SET 6,D */
-OP(cb,f3) { z80->E = SET(6, z80->E); } /* SET 6,E */
-OP(cb,f4) { z80->H = SET(6, z80->H); } /* SET 6,H */
-OP(cb,f5) { z80->L = SET(6, z80->L); } /* SET 6,L */
-OP(cb,f6) { WM(z80, z80->HL, SET(6, RM(z80, z80->HL))); } /* SET 6,(HL) */
-OP(cb,f7) { z80->A = SET(6, z80->A); } /* SET 6,A */
-
-OP(cb,f8) { z80->B = SET(7, z80->B); } /* SET 7,B */
-OP(cb,f9) { z80->C = SET(7, z80->C); } /* SET 7,C */
-OP(cb,fa) { z80->D = SET(7, z80->D); } /* SET 7,D */
-OP(cb,fb) { z80->E = SET(7, z80->E); } /* SET 7,E */
-OP(cb,fc) { z80->H = SET(7, z80->H); } /* SET 7,H */
-OP(cb,fd) { z80->L = SET(7, z80->L); } /* SET 7,L */
-OP(cb,fe) { WM(z80, z80->HL, SET(7, RM(z80, z80->HL))); } /* SET 7,(HL) */
-OP(cb,ff) { z80->A = SET(7, z80->A); } /* SET 7,A */
+OP(cb,00) { z80->B = RLC(z80, z80->B); } /* RLC B */
+OP(cb,01) { z80->C = RLC(z80, z80->C); } /* RLC C */
+OP(cb,02) { z80->D = RLC(z80, z80->D); } /* RLC D */
+OP(cb,03) { z80->E = RLC(z80, z80->E); } /* RLC E */
+OP(cb,04) { z80->H = RLC(z80, z80->H); } /* RLC H */
+OP(cb,05) { z80->L = RLC(z80, z80->L); } /* RLC L */
+OP(cb,06) { WM(z80, z80->HL, RLC(z80, RM(z80, z80->HL))); } /* RLC (HL) */
+OP(cb,07) { z80->A = RLC(z80, z80->A); } /* RLC A */
+
+OP(cb,08) { z80->B = RRC(z80, z80->B); } /* RRC B */
+OP(cb,09) { z80->C = RRC(z80, z80->C); } /* RRC C */
+OP(cb,0a) { z80->D = RRC(z80, z80->D); } /* RRC D */
+OP(cb,0b) { z80->E = RRC(z80, z80->E); } /* RRC E */
+OP(cb,0c) { z80->H = RRC(z80, z80->H); } /* RRC H */
+OP(cb,0d) { z80->L = RRC(z80, z80->L); } /* RRC L */
+OP(cb,0e) { WM(z80, z80->HL, RRC(z80, RM(z80, z80->HL))); } /* RRC (HL) */
+OP(cb,0f) { z80->A = RRC(z80, z80->A); } /* RRC A */
+
+OP(cb,10) { z80->B = RL(z80, z80->B); } /* RL B */
+OP(cb,11) { z80->C = RL(z80, z80->C); } /* RL C */
+OP(cb,12) { z80->D = RL(z80, z80->D); } /* RL D */
+OP(cb,13) { z80->E = RL(z80, z80->E); } /* RL E */
+OP(cb,14) { z80->H = RL(z80, z80->H); } /* RL H */
+OP(cb,15) { z80->L = RL(z80, z80->L); } /* RL L */
+OP(cb,16) { WM(z80, z80->HL, RL(z80, RM(z80, z80->HL))); } /* RL (HL) */
+OP(cb,17) { z80->A = RL(z80, z80->A); } /* RL A */
+
+OP(cb,18) { z80->B = RR(z80, z80->B); } /* RR B */
+OP(cb,19) { z80->C = RR(z80, z80->C); } /* RR C */
+OP(cb,1a) { z80->D = RR(z80, z80->D); } /* RR D */
+OP(cb,1b) { z80->E = RR(z80, z80->E); } /* RR E */
+OP(cb,1c) { z80->H = RR(z80, z80->H); } /* RR H */
+OP(cb,1d) { z80->L = RR(z80, z80->L); } /* RR L */
+OP(cb,1e) { WM(z80, z80->HL, RR(z80, RM(z80, z80->HL))); } /* RR (HL) */
+OP(cb,1f) { z80->A = RR(z80, z80->A); } /* RR A */
+
+OP(cb,20) { z80->B = SLA(z80, z80->B); } /* SLA B */
+OP(cb,21) { z80->C = SLA(z80, z80->C); } /* SLA C */
+OP(cb,22) { z80->D = SLA(z80, z80->D); } /* SLA D */
+OP(cb,23) { z80->E = SLA(z80, z80->E); } /* SLA E */
+OP(cb,24) { z80->H = SLA(z80, z80->H); } /* SLA H */
+OP(cb,25) { z80->L = SLA(z80, z80->L); } /* SLA L */
+OP(cb,26) { WM(z80, z80->HL, SLA(z80, RM(z80, z80->HL))); } /* SLA (HL) */
+OP(cb,27) { z80->A = SLA(z80, z80->A); } /* SLA A */
+
+OP(cb,28) { z80->B = SRA(z80, z80->B); } /* SRA B */
+OP(cb,29) { z80->C = SRA(z80, z80->C); } /* SRA C */
+OP(cb,2a) { z80->D = SRA(z80, z80->D); } /* SRA D */
+OP(cb,2b) { z80->E = SRA(z80, z80->E); } /* SRA E */
+OP(cb,2c) { z80->H = SRA(z80, z80->H); } /* SRA H */
+OP(cb,2d) { z80->L = SRA(z80, z80->L); } /* SRA L */
+OP(cb,2e) { WM(z80, z80->HL, SRA(z80, RM(z80, z80->HL))); } /* SRA (HL) */
+OP(cb,2f) { z80->A = SRA(z80, z80->A); } /* SRA A */
+
+OP(cb,30) { z80->B = SLL(z80, z80->B); } /* SLL B */
+OP(cb,31) { z80->C = SLL(z80, z80->C); } /* SLL C */
+OP(cb,32) { z80->D = SLL(z80, z80->D); } /* SLL D */
+OP(cb,33) { z80->E = SLL(z80, z80->E); } /* SLL E */
+OP(cb,34) { z80->H = SLL(z80, z80->H); } /* SLL H */
+OP(cb,35) { z80->L = SLL(z80, z80->L); } /* SLL L */
+OP(cb,36) { WM(z80, z80->HL, SLL(z80, RM(z80, z80->HL))); } /* SLL (HL) */
+OP(cb,37) { z80->A = SLL(z80, z80->A); } /* SLL A */
+
+OP(cb,38) { z80->B = SRL(z80, z80->B); } /* SRL B */
+OP(cb,39) { z80->C = SRL(z80, z80->C); } /* SRL C */
+OP(cb,3a) { z80->D = SRL(z80, z80->D); } /* SRL D */
+OP(cb,3b) { z80->E = SRL(z80, z80->E); } /* SRL E */
+OP(cb,3c) { z80->H = SRL(z80, z80->H); } /* SRL H */
+OP(cb,3d) { z80->L = SRL(z80, z80->L); } /* SRL L */
+OP(cb,3e) { WM(z80, z80->HL, SRL(z80, RM(z80, z80->HL))); } /* SRL (HL) */
+OP(cb,3f) { z80->A = SRL(z80, z80->A); } /* SRL A */
+
+OP(cb,40) { BIT(z80, 0, z80->B); } /* BIT 0,B */
+OP(cb,41) { BIT(z80, 0, z80->C); } /* BIT 0,C */
+OP(cb,42) { BIT(z80, 0, z80->D); } /* BIT 0,D */
+OP(cb,43) { BIT(z80, 0, z80->E); } /* BIT 0,E */
+OP(cb,44) { BIT(z80, 0, z80->H); } /* BIT 0,H */
+OP(cb,45) { BIT(z80, 0, z80->L); } /* BIT 0,L */
+OP(cb,46) { BIT_HL(z80, 0, RM(z80, z80->HL)); } /* BIT 0,(HL) */
+OP(cb,47) { BIT(z80, 0, z80->A); } /* BIT 0,A */
+
+OP(cb,48) { BIT(z80, 1, z80->B); } /* BIT 1,B */
+OP(cb,49) { BIT(z80, 1, z80->C); } /* BIT 1,C */
+OP(cb,4a) { BIT(z80, 1, z80->D); } /* BIT 1,D */
+OP(cb,4b) { BIT(z80, 1, z80->E); } /* BIT 1,E */
+OP(cb,4c) { BIT(z80, 1, z80->H); } /* BIT 1,H */
+OP(cb,4d) { BIT(z80, 1, z80->L); } /* BIT 1,L */
+OP(cb,4e) { BIT_HL(z80, 1, RM(z80, z80->HL)); } /* BIT 1,(HL) */
+OP(cb,4f) { BIT(z80, 1, z80->A); } /* BIT 1,A */
+
+OP(cb,50) { BIT(z80, 2, z80->B); } /* BIT 2,B */
+OP(cb,51) { BIT(z80, 2, z80->C); } /* BIT 2,C */
+OP(cb,52) { BIT(z80, 2, z80->D); } /* BIT 2,D */
+OP(cb,53) { BIT(z80, 2, z80->E); } /* BIT 2,E */
+OP(cb,54) { BIT(z80, 2, z80->H); } /* BIT 2,H */
+OP(cb,55) { BIT(z80, 2, z80->L); } /* BIT 2,L */
+OP(cb,56) { BIT_HL(z80, 2, RM(z80, z80->HL)); } /* BIT 2,(HL) */
+OP(cb,57) { BIT(z80, 2, z80->A); } /* BIT 2,A */
+
+OP(cb,58) { BIT(z80, 3, z80->B); } /* BIT 3,B */
+OP(cb,59) { BIT(z80, 3, z80->C); } /* BIT 3,C */
+OP(cb,5a) { BIT(z80, 3, z80->D); } /* BIT 3,D */
+OP(cb,5b) { BIT(z80, 3, z80->E); } /* BIT 3,E */
+OP(cb,5c) { BIT(z80, 3, z80->H); } /* BIT 3,H */
+OP(cb,5d) { BIT(z80, 3, z80->L); } /* BIT 3,L */
+OP(cb,5e) { BIT_HL(z80, 3, RM(z80, z80->HL)); } /* BIT 3,(HL) */
+OP(cb,5f) { BIT(z80, 3, z80->A); } /* BIT 3,A */
+
+OP(cb,60) { BIT(z80, 4, z80->B); } /* BIT 4,B */
+OP(cb,61) { BIT(z80, 4, z80->C); } /* BIT 4,C */
+OP(cb,62) { BIT(z80, 4, z80->D); } /* BIT 4,D */
+OP(cb,63) { BIT(z80, 4, z80->E); } /* BIT 4,E */
+OP(cb,64) { BIT(z80, 4, z80->H); } /* BIT 4,H */
+OP(cb,65) { BIT(z80, 4, z80->L); } /* BIT 4,L */
+OP(cb,66) { BIT_HL(z80, 4, RM(z80, z80->HL)); } /* BIT 4,(HL) */
+OP(cb,67) { BIT(z80, 4, z80->A); } /* BIT 4,A */
+
+OP(cb,68) { BIT(z80, 5, z80->B); } /* BIT 5,B */
+OP(cb,69) { BIT(z80, 5, z80->C); } /* BIT 5,C */
+OP(cb,6a) { BIT(z80, 5, z80->D); } /* BIT 5,D */
+OP(cb,6b) { BIT(z80, 5, z80->E); } /* BIT 5,E */
+OP(cb,6c) { BIT(z80, 5, z80->H); } /* BIT 5,H */
+OP(cb,6d) { BIT(z80, 5, z80->L); } /* BIT 5,L */
+OP(cb,6e) { BIT_HL(z80, 5, RM(z80, z80->HL)); } /* BIT 5,(HL) */
+OP(cb,6f) { BIT(z80, 5, z80->A); } /* BIT 5,A */
+
+OP(cb,70) { BIT(z80, 6, z80->B); } /* BIT 6,B */
+OP(cb,71) { BIT(z80, 6, z80->C); } /* BIT 6,C */
+OP(cb,72) { BIT(z80, 6, z80->D); } /* BIT 6,D */
+OP(cb,73) { BIT(z80, 6, z80->E); } /* BIT 6,E */
+OP(cb,74) { BIT(z80, 6, z80->H); } /* BIT 6,H */
+OP(cb,75) { BIT(z80, 6, z80->L); } /* BIT 6,L */
+OP(cb,76) { BIT_HL(z80, 6, RM(z80, z80->HL)); } /* BIT 6,(HL) */
+OP(cb,77) { BIT(z80, 6, z80->A); } /* BIT 6,A */
+
+OP(cb,78) { BIT(z80, 7, z80->B); } /* BIT 7,B */
+OP(cb,79) { BIT(z80, 7, z80->C); } /* BIT 7,C */
+OP(cb,7a) { BIT(z80, 7, z80->D); } /* BIT 7,D */
+OP(cb,7b) { BIT(z80, 7, z80->E); } /* BIT 7,E */
+OP(cb,7c) { BIT(z80, 7, z80->H); } /* BIT 7,H */
+OP(cb,7d) { BIT(z80, 7, z80->L); } /* BIT 7,L */
+OP(cb,7e) { BIT_HL(z80, 7, RM(z80, z80->HL)); } /* BIT 7,(HL) */
+OP(cb,7f) { BIT(z80, 7, z80->A); } /* BIT 7,A */
+
+OP(cb,80) { z80->B = RES(0, z80->B); } /* RES 0,B */
+OP(cb,81) { z80->C = RES(0, z80->C); } /* RES 0,C */
+OP(cb,82) { z80->D = RES(0, z80->D); } /* RES 0,D */
+OP(cb,83) { z80->E = RES(0, z80->E); } /* RES 0,E */
+OP(cb,84) { z80->H = RES(0, z80->H); } /* RES 0,H */
+OP(cb,85) { z80->L = RES(0, z80->L); } /* RES 0,L */
+OP(cb,86) { WM(z80, z80->HL, RES(0, RM(z80, z80->HL))); } /* RES 0,(HL) */
+OP(cb,87) { z80->A = RES(0, z80->A); } /* RES 0,A */
+
+OP(cb,88) { z80->B = RES(1, z80->B); } /* RES 1,B */
+OP(cb,89) { z80->C = RES(1, z80->C); } /* RES 1,C */
+OP(cb,8a) { z80->D = RES(1, z80->D); } /* RES 1,D */
+OP(cb,8b) { z80->E = RES(1, z80->E); } /* RES 1,E */
+OP(cb,8c) { z80->H = RES(1, z80->H); } /* RES 1,H */
+OP(cb,8d) { z80->L = RES(1, z80->L); } /* RES 1,L */
+OP(cb,8e) { WM(z80, z80->HL, RES(1, RM(z80, z80->HL))); } /* RES 1,(HL) */
+OP(cb,8f) { z80->A = RES(1, z80->A); } /* RES 1,A */
+
+OP(cb,90) { z80->B = RES(2, z80->B); } /* RES 2,B */
+OP(cb,91) { z80->C = RES(2, z80->C); } /* RES 2,C */
+OP(cb,92) { z80->D = RES(2, z80->D); } /* RES 2,D */
+OP(cb,93) { z80->E = RES(2, z80->E); } /* RES 2,E */
+OP(cb,94) { z80->H = RES(2, z80->H); } /* RES 2,H */
+OP(cb,95) { z80->L = RES(2, z80->L); } /* RES 2,L */
+OP(cb,96) { WM(z80, z80->HL, RES(2, RM(z80, z80->HL))); } /* RES 2,(HL) */
+OP(cb,97) { z80->A = RES(2, z80->A); } /* RES 2,A */
+
+OP(cb,98) { z80->B = RES(3, z80->B); } /* RES 3,B */
+OP(cb,99) { z80->C = RES(3, z80->C); } /* RES 3,C */
+OP(cb,9a) { z80->D = RES(3, z80->D); } /* RES 3,D */
+OP(cb,9b) { z80->E = RES(3, z80->E); } /* RES 3,E */
+OP(cb,9c) { z80->H = RES(3, z80->H); } /* RES 3,H */
+OP(cb,9d) { z80->L = RES(3, z80->L); } /* RES 3,L */
+OP(cb,9e) { WM(z80, z80->HL, RES(3, RM(z80, z80->HL))); } /* RES 3,(HL) */
+OP(cb,9f) { z80->A = RES(3, z80->A); } /* RES 3,A */
+
+OP(cb,a0) { z80->B = RES(4, z80->B); } /* RES 4,B */
+OP(cb,a1) { z80->C = RES(4, z80->C); } /* RES 4,C */
+OP(cb,a2) { z80->D = RES(4, z80->D); } /* RES 4,D */
+OP(cb,a3) { z80->E = RES(4, z80->E); } /* RES 4,E */
+OP(cb,a4) { z80->H = RES(4, z80->H); } /* RES 4,H */
+OP(cb,a5) { z80->L = RES(4, z80->L); } /* RES 4,L */
+OP(cb,a6) { WM(z80, z80->HL, RES(4, RM(z80, z80->HL))); } /* RES 4,(HL) */
+OP(cb,a7) { z80->A = RES(4, z80->A); } /* RES 4,A */
+
+OP(cb,a8) { z80->B = RES(5, z80->B); } /* RES 5,B */
+OP(cb,a9) { z80->C = RES(5, z80->C); } /* RES 5,C */
+OP(cb,aa) { z80->D = RES(5, z80->D); } /* RES 5,D */
+OP(cb,ab) { z80->E = RES(5, z80->E); } /* RES 5,E */
+OP(cb,ac) { z80->H = RES(5, z80->H); } /* RES 5,H */
+OP(cb,ad) { z80->L = RES(5, z80->L); } /* RES 5,L */
+OP(cb,ae) { WM(z80, z80->HL, RES(5, RM(z80, z80->HL))); } /* RES 5,(HL) */
+OP(cb,af) { z80->A = RES(5, z80->A); } /* RES 5,A */
+
+OP(cb,b0) { z80->B = RES(6, z80->B); } /* RES 6,B */
+OP(cb,b1) { z80->C = RES(6, z80->C); } /* RES 6,C */
+OP(cb,b2) { z80->D = RES(6, z80->D); } /* RES 6,D */
+OP(cb,b3) { z80->E = RES(6, z80->E); } /* RES 6,E */
+OP(cb,b4) { z80->H = RES(6, z80->H); } /* RES 6,H */
+OP(cb,b5) { z80->L = RES(6, z80->L); } /* RES 6,L */
+OP(cb,b6) { WM(z80, z80->HL, RES(6, RM(z80, z80->HL))); } /* RES 6,(HL) */
+OP(cb,b7) { z80->A = RES(6, z80->A); } /* RES 6,A */
+
+OP(cb,b8) { z80->B = RES(7, z80->B); } /* RES 7,B */
+OP(cb,b9) { z80->C = RES(7, z80->C); } /* RES 7,C */
+OP(cb,ba) { z80->D = RES(7, z80->D); } /* RES 7,D */
+OP(cb,bb) { z80->E = RES(7, z80->E); } /* RES 7,E */
+OP(cb,bc) { z80->H = RES(7, z80->H); } /* RES 7,H */
+OP(cb,bd) { z80->L = RES(7, z80->L); } /* RES 7,L */
+OP(cb,be) { WM(z80, z80->HL, RES(7, RM(z80, z80->HL))); } /* RES 7,(HL) */
+OP(cb,bf) { z80->A = RES(7, z80->A); } /* RES 7,A */
+
+OP(cb,c0) { z80->B = SET(0, z80->B); } /* SET 0,B */
+OP(cb,c1) { z80->C = SET(0, z80->C); } /* SET 0,C */
+OP(cb,c2) { z80->D = SET(0, z80->D); } /* SET 0,D */
+OP(cb,c3) { z80->E = SET(0, z80->E); } /* SET 0,E */
+OP(cb,c4) { z80->H = SET(0, z80->H); } /* SET 0,H */
+OP(cb,c5) { z80->L = SET(0, z80->L); } /* SET 0,L */
+OP(cb,c6) { WM(z80, z80->HL, SET(0, RM(z80, z80->HL))); } /* SET 0,(HL) */
+OP(cb,c7) { z80->A = SET(0, z80->A); } /* SET 0,A */
+
+OP(cb,c8) { z80->B = SET(1, z80->B); } /* SET 1,B */
+OP(cb,c9) { z80->C = SET(1, z80->C); } /* SET 1,C */
+OP(cb,ca) { z80->D = SET(1, z80->D); } /* SET 1,D */
+OP(cb,cb) { z80->E = SET(1, z80->E); } /* SET 1,E */
+OP(cb,cc) { z80->H = SET(1, z80->H); } /* SET 1,H */
+OP(cb,cd) { z80->L = SET(1, z80->L); } /* SET 1,L */
+OP(cb,ce) { WM(z80, z80->HL, SET(1, RM(z80, z80->HL))); } /* SET 1,(HL) */
+OP(cb,cf) { z80->A = SET(1, z80->A); } /* SET 1,A */
+
+OP(cb,d0) { z80->B = SET(2, z80->B); } /* SET 2,B */
+OP(cb,d1) { z80->C = SET(2, z80->C); } /* SET 2,C */
+OP(cb,d2) { z80->D = SET(2, z80->D); } /* SET 2,D */
+OP(cb,d3) { z80->E = SET(2, z80->E); } /* SET 2,E */
+OP(cb,d4) { z80->H = SET(2, z80->H); } /* SET 2,H */
+OP(cb,d5) { z80->L = SET(2, z80->L); } /* SET 2,L */
+OP(cb,d6) { WM(z80, z80->HL, SET(2, RM(z80, z80->HL))); } /* SET 2,(HL) */
+OP(cb,d7) { z80->A = SET(2, z80->A); } /* SET 2,A */
+
+OP(cb,d8) { z80->B = SET(3, z80->B); } /* SET 3,B */
+OP(cb,d9) { z80->C = SET(3, z80->C); } /* SET 3,C */
+OP(cb,da) { z80->D = SET(3, z80->D); } /* SET 3,D */
+OP(cb,db) { z80->E = SET(3, z80->E); } /* SET 3,E */
+OP(cb,dc) { z80->H = SET(3, z80->H); } /* SET 3,H */
+OP(cb,dd) { z80->L = SET(3, z80->L); } /* SET 3,L */
+OP(cb,de) { WM(z80, z80->HL, SET(3, RM(z80, z80->HL))); } /* SET 3,(HL) */
+OP(cb,df) { z80->A = SET(3, z80->A); } /* SET 3,A */
+
+OP(cb,e0) { z80->B = SET(4, z80->B); } /* SET 4,B */
+OP(cb,e1) { z80->C = SET(4, z80->C); } /* SET 4,C */
+OP(cb,e2) { z80->D = SET(4, z80->D); } /* SET 4,D */
+OP(cb,e3) { z80->E = SET(4, z80->E); } /* SET 4,E */
+OP(cb,e4) { z80->H = SET(4, z80->H); } /* SET 4,H */
+OP(cb,e5) { z80->L = SET(4, z80->L); } /* SET 4,L */
+OP(cb,e6) { WM(z80, z80->HL, SET(4, RM(z80, z80->HL))); } /* SET 4,(HL) */
+OP(cb,e7) { z80->A = SET(4, z80->A); } /* SET 4,A */
+
+OP(cb,e8) { z80->B = SET(5, z80->B); } /* SET 5,B */
+OP(cb,e9) { z80->C = SET(5, z80->C); } /* SET 5,C */
+OP(cb,ea) { z80->D = SET(5, z80->D); } /* SET 5,D */
+OP(cb,eb) { z80->E = SET(5, z80->E); } /* SET 5,E */
+OP(cb,ec) { z80->H = SET(5, z80->H); } /* SET 5,H */
+OP(cb,ed) { z80->L = SET(5, z80->L); } /* SET 5,L */
+OP(cb,ee) { WM(z80, z80->HL, SET(5, RM(z80, z80->HL))); } /* SET 5,(HL) */
+OP(cb,ef) { z80->A = SET(5, z80->A); } /* SET 5,A */
+
+OP(cb,f0) { z80->B = SET(6, z80->B); } /* SET 6,B */
+OP(cb,f1) { z80->C = SET(6, z80->C); } /* SET 6,C */
+OP(cb,f2) { z80->D = SET(6, z80->D); } /* SET 6,D */
+OP(cb,f3) { z80->E = SET(6, z80->E); } /* SET 6,E */
+OP(cb,f4) { z80->H = SET(6, z80->H); } /* SET 6,H */
+OP(cb,f5) { z80->L = SET(6, z80->L); } /* SET 6,L */
+OP(cb,f6) { WM(z80, z80->HL, SET(6, RM(z80, z80->HL))); } /* SET 6,(HL) */
+OP(cb,f7) { z80->A = SET(6, z80->A); } /* SET 6,A */
+
+OP(cb,f8) { z80->B = SET(7, z80->B); } /* SET 7,B */
+OP(cb,f9) { z80->C = SET(7, z80->C); } /* SET 7,C */
+OP(cb,fa) { z80->D = SET(7, z80->D); } /* SET 7,D */
+OP(cb,fb) { z80->E = SET(7, z80->E); } /* SET 7,E */
+OP(cb,fc) { z80->H = SET(7, z80->H); } /* SET 7,H */
+OP(cb,fd) { z80->L = SET(7, z80->L); } /* SET 7,L */
+OP(cb,fe) { WM(z80, z80->HL, SET(7, RM(z80, z80->HL))); } /* SET 7,(HL) */
+OP(cb,ff) { z80->A = SET(7, z80->A); } /* SET 7,A */
/**********************************************************
* opcodes with DD/FD CB prefix
* rotate, shift and bit operations with (IX+o)
**********************************************************/
-OP(xycb,00) { z80->B = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RLC B=(XY+o) */
-OP(xycb,01) { z80->C = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RLC C=(XY+o) */
-OP(xycb,02) { z80->D = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RLC D=(XY+o) */
-OP(xycb,03) { z80->E = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RLC E=(XY+o) */
-OP(xycb,04) { z80->H = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RLC H=(XY+o) */
-OP(xycb,05) { z80->L = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RLC L=(XY+o) */
-OP(xycb,06) { WM(z80, z80->ea, RLC(z80, RM(z80, z80->ea))); } /* RLC (XY+o) */
-OP(xycb,07) { z80->A = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RLC A=(XY+o) */
-
-OP(xycb,08) { z80->B = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RRC B=(XY+o) */
-OP(xycb,09) { z80->C = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RRC C=(XY+o) */
-OP(xycb,0a) { z80->D = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RRC D=(XY+o) */
-OP(xycb,0b) { z80->E = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RRC E=(XY+o) */
-OP(xycb,0c) { z80->H = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RRC H=(XY+o) */
-OP(xycb,0d) { z80->L = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RRC L=(XY+o) */
-OP(xycb,0e) { WM(z80, z80->ea,RRC(z80, RM(z80, z80->ea))); } /* RRC (XY+o) */
-OP(xycb,0f) { z80->A = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RRC A=(XY+o) */
-
-OP(xycb,10) { z80->B = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RL B=(XY+o) */
-OP(xycb,11) { z80->C = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RL C=(XY+o) */
-OP(xycb,12) { z80->D = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RL D=(XY+o) */
-OP(xycb,13) { z80->E = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RL E=(XY+o) */
-OP(xycb,14) { z80->H = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RL H=(XY+o) */
-OP(xycb,15) { z80->L = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RL L=(XY+o) */
-OP(xycb,16) { WM(z80, z80->ea,RL(z80, RM(z80, z80->ea))); } /* RL (XY+o) */
-OP(xycb,17) { z80->A = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RL A=(XY+o) */
-
-OP(xycb,18) { z80->B = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RR B=(XY+o) */
-OP(xycb,19) { z80->C = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RR C=(XY+o) */
-OP(xycb,1a) { z80->D = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RR D=(XY+o) */
-OP(xycb,1b) { z80->E = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RR E=(XY+o) */
-OP(xycb,1c) { z80->H = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RR H=(XY+o) */
-OP(xycb,1d) { z80->L = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RR L=(XY+o) */
-OP(xycb,1e) { WM(z80, z80->ea,RR(z80, RM(z80, z80->ea))); } /* RR (XY+o) */
-OP(xycb,1f) { z80->A = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RR A=(XY+o) */
-
-OP(xycb,20) { z80->B = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SLA B=(XY+o) */
-OP(xycb,21) { z80->C = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SLA C=(XY+o) */
-OP(xycb,22) { z80->D = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SLA D=(XY+o) */
-OP(xycb,23) { z80->E = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SLA E=(XY+o) */
-OP(xycb,24) { z80->H = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SLA H=(XY+o) */
-OP(xycb,25) { z80->L = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SLA L=(XY+o) */
-OP(xycb,26) { WM(z80, z80->ea,SLA(z80, RM(z80, z80->ea))); } /* SLA (XY+o) */
-OP(xycb,27) { z80->A = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SLA A=(XY+o) */
-
-OP(xycb,28) { z80->B = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SRA B=(XY+o) */
-OP(xycb,29) { z80->C = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SRA C=(XY+o) */
-OP(xycb,2a) { z80->D = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SRA D=(XY+o) */
-OP(xycb,2b) { z80->E = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SRA E=(XY+o) */
-OP(xycb,2c) { z80->H = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SRA H=(XY+o) */
-OP(xycb,2d) { z80->L = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SRA L=(XY+o) */
-OP(xycb,2e) { WM(z80, z80->ea,SRA(z80, RM(z80, z80->ea))); } /* SRA (XY+o) */
-OP(xycb,2f) { z80->A = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SRA A=(XY+o) */
-
-OP(xycb,30) { z80->B = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SLL B=(XY+o) */
-OP(xycb,31) { z80->C = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SLL C=(XY+o) */
-OP(xycb,32) { z80->D = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SLL D=(XY+o) */
-OP(xycb,33) { z80->E = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SLL E=(XY+o) */
-OP(xycb,34) { z80->H = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SLL H=(XY+o) */
-OP(xycb,35) { z80->L = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SLL L=(XY+o) */
-OP(xycb,36) { WM(z80, z80->ea,SLL(z80, RM(z80, z80->ea))); } /* SLL (XY+o) */
-OP(xycb,37) { z80->A = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SLL A=(XY+o) */
-
-OP(xycb,38) { z80->B = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SRL B=(XY+o) */
-OP(xycb,39) { z80->C = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SRL C=(XY+o) */
-OP(xycb,3a) { z80->D = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SRL D=(XY+o) */
-OP(xycb,3b) { z80->E = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SRL E=(XY+o) */
-OP(xycb,3c) { z80->H = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SRL H=(XY+o) */
-OP(xycb,3d) { z80->L = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SRL L=(XY+o) */
-OP(xycb,3e) { WM(z80, z80->ea,SRL(z80, RM(z80, z80->ea))); } /* SRL (XY+o) */
-OP(xycb,3f) { z80->A = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SRL A=(XY+o) */
-
-OP(xycb,40) { xycb_46(z80); } /* BIT 0,(XY+o) */
-OP(xycb,41) { xycb_46(z80); } /* BIT 0,(XY+o) */
-OP(xycb,42) { xycb_46(z80); } /* BIT 0,(XY+o) */
-OP(xycb,43) { xycb_46(z80); } /* BIT 0,(XY+o) */
-OP(xycb,44) { xycb_46(z80); } /* BIT 0,(XY+o) */
-OP(xycb,45) { xycb_46(z80); } /* BIT 0,(XY+o) */
-OP(xycb,46) { BIT_XY(z80, 0, RM(z80, z80->ea)); } /* BIT 0,(XY+o) */
-OP(xycb,47) { xycb_46(z80); } /* BIT 0,(XY+o) */
-
-OP(xycb,48) { xycb_4e(z80); } /* BIT 1,(XY+o) */
-OP(xycb,49) { xycb_4e(z80); } /* BIT 1,(XY+o) */
-OP(xycb,4a) { xycb_4e(z80); } /* BIT 1,(XY+o) */
-OP(xycb,4b) { xycb_4e(z80); } /* BIT 1,(XY+o) */
-OP(xycb,4c) { xycb_4e(z80); } /* BIT 1,(XY+o) */
-OP(xycb,4d) { xycb_4e(z80); } /* BIT 1,(XY+o) */
-OP(xycb,4e) { BIT_XY(z80, 1, RM(z80, z80->ea)); } /* BIT 1,(XY+o) */
-OP(xycb,4f) { xycb_4e(z80); } /* BIT 1,(XY+o) */
-
-OP(xycb,50) { xycb_56(z80); } /* BIT 2,(XY+o) */
-OP(xycb,51) { xycb_56(z80); } /* BIT 2,(XY+o) */
-OP(xycb,52) { xycb_56(z80); } /* BIT 2,(XY+o) */
-OP(xycb,53) { xycb_56(z80); } /* BIT 2,(XY+o) */
-OP(xycb,54) { xycb_56(z80); } /* BIT 2,(XY+o) */
-OP(xycb,55) { xycb_56(z80); } /* BIT 2,(XY+o) */
-OP(xycb,56) { BIT_XY(z80, 2, RM(z80, z80->ea)); } /* BIT 2,(XY+o) */
-OP(xycb,57) { xycb_56(z80); } /* BIT 2,(XY+o) */
-
-OP(xycb,58) { xycb_5e(z80); } /* BIT 3,(XY+o) */
-OP(xycb,59) { xycb_5e(z80); } /* BIT 3,(XY+o) */
-OP(xycb,5a) { xycb_5e(z80); } /* BIT 3,(XY+o) */
-OP(xycb,5b) { xycb_5e(z80); } /* BIT 3,(XY+o) */
-OP(xycb,5c) { xycb_5e(z80); } /* BIT 3,(XY+o) */
-OP(xycb,5d) { xycb_5e(z80); } /* BIT 3,(XY+o) */
-OP(xycb,5e) { BIT_XY(z80, 3, RM(z80, z80->ea)); } /* BIT 3,(XY+o) */
-OP(xycb,5f) { xycb_5e(z80); } /* BIT 3,(XY+o) */
-
-OP(xycb,60) { xycb_66(z80); } /* BIT 4,(XY+o) */
-OP(xycb,61) { xycb_66(z80); } /* BIT 4,(XY+o) */
-OP(xycb,62) { xycb_66(z80); } /* BIT 4,(XY+o) */
-OP(xycb,63) { xycb_66(z80); } /* BIT 4,(XY+o) */
-OP(xycb,64) { xycb_66(z80); } /* BIT 4,(XY+o) */
-OP(xycb,65) { xycb_66(z80); } /* BIT 4,(XY+o) */
-OP(xycb,66) { BIT_XY(z80, 4, RM(z80, z80->ea)); } /* BIT 4,(XY+o) */
-OP(xycb,67) { xycb_66(z80); } /* BIT 4,(XY+o) */
-
-OP(xycb,68) { xycb_6e(z80); } /* BIT 5,(XY+o) */
-OP(xycb,69) { xycb_6e(z80); } /* BIT 5,(XY+o) */
-OP(xycb,6a) { xycb_6e(z80); } /* BIT 5,(XY+o) */
-OP(xycb,6b) { xycb_6e(z80); } /* BIT 5,(XY+o) */
-OP(xycb,6c) { xycb_6e(z80); } /* BIT 5,(XY+o) */
-OP(xycb,6d) { xycb_6e(z80); } /* BIT 5,(XY+o) */
-OP(xycb,6e) { BIT_XY(z80, 5, RM(z80, z80->ea)); } /* BIT 5,(XY+o) */
-OP(xycb,6f) { xycb_6e(z80); } /* BIT 5,(XY+o) */
-
-OP(xycb,70) { xycb_76(z80); } /* BIT 6,(XY+o) */
-OP(xycb,71) { xycb_76(z80); } /* BIT 6,(XY+o) */
-OP(xycb,72) { xycb_76(z80); } /* BIT 6,(XY+o) */
-OP(xycb,73) { xycb_76(z80); } /* BIT 6,(XY+o) */
-OP(xycb,74) { xycb_76(z80); } /* BIT 6,(XY+o) */
-OP(xycb,75) { xycb_76(z80); } /* BIT 6,(XY+o) */
-OP(xycb,76) { BIT_XY(z80, 6, RM(z80, z80->ea)); } /* BIT 6,(XY+o) */
-OP(xycb,77) { xycb_76(z80); } /* BIT 6,(XY+o) */
-
-OP(xycb,78) { xycb_7e(z80); } /* BIT 7,(XY+o) */
-OP(xycb,79) { xycb_7e(z80); } /* BIT 7,(XY+o) */
-OP(xycb,7a) { xycb_7e(z80); } /* BIT 7,(XY+o) */
-OP(xycb,7b) { xycb_7e(z80); } /* BIT 7,(XY+o) */
-OP(xycb,7c) { xycb_7e(z80); } /* BIT 7,(XY+o) */
-OP(xycb,7d) { xycb_7e(z80); } /* BIT 7,(XY+o) */
-OP(xycb,7e) { BIT_XY(z80, 7, RM(z80, z80->ea)); } /* BIT 7,(XY+o) */
-OP(xycb,7f) { xycb_7e(z80); } /* BIT 7,(XY+o) */
-
-OP(xycb,80) { z80->B = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 0,B=(XY+o) */
-OP(xycb,81) { z80->C = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 0,C=(XY+o) */
-OP(xycb,82) { z80->D = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 0,D=(XY+o) */
-OP(xycb,83) { z80->E = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 0,E=(XY+o) */
-OP(xycb,84) { z80->H = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 0,H=(XY+o) */
-OP(xycb,85) { z80->L = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 0,L=(XY+o) */
-OP(xycb,86) { WM(z80, z80->ea, RES(0, RM(z80, z80->ea))); } /* RES 0,(XY+o) */
-OP(xycb,87) { z80->A = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 0,A=(XY+o) */
-
-OP(xycb,88) { z80->B = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 1,B=(XY+o) */
-OP(xycb,89) { z80->C = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 1,C=(XY+o) */
-OP(xycb,8a) { z80->D = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 1,D=(XY+o) */
-OP(xycb,8b) { z80->E = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 1,E=(XY+o) */
-OP(xycb,8c) { z80->H = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 1,H=(XY+o) */
-OP(xycb,8d) { z80->L = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 1,L=(XY+o) */
-OP(xycb,8e) { WM(z80, z80->ea, RES(1, RM(z80, z80->ea))); } /* RES 1,(XY+o) */
-OP(xycb,8f) { z80->A = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 1,A=(XY+o) */
-
-OP(xycb,90) { z80->B = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 2,B=(XY+o) */
-OP(xycb,91) { z80->C = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 2,C=(XY+o) */
-OP(xycb,92) { z80->D = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 2,D=(XY+o) */
-OP(xycb,93) { z80->E = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 2,E=(XY+o) */
-OP(xycb,94) { z80->H = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 2,H=(XY+o) */
-OP(xycb,95) { z80->L = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 2,L=(XY+o) */
-OP(xycb,96) { WM(z80, z80->ea, RES(2, RM(z80, z80->ea))); } /* RES 2,(XY+o) */
-OP(xycb,97) { z80->A = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 2,A=(XY+o) */
-
-OP(xycb,98) { z80->B = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 3,B=(XY+o) */
-OP(xycb,99) { z80->C = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 3,C=(XY+o) */
-OP(xycb,9a) { z80->D = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 3,D=(XY+o) */
-OP(xycb,9b) { z80->E = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 3,E=(XY+o) */
-OP(xycb,9c) { z80->H = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 3,H=(XY+o) */
-OP(xycb,9d) { z80->L = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 3,L=(XY+o) */
-OP(xycb,9e) { WM(z80, z80->ea, RES(3, RM(z80, z80->ea))); } /* RES 3,(XY+o) */
-OP(xycb,9f) { z80->A = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 3,A=(XY+o) */
-
-OP(xycb,a0) { z80->B = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 4,B=(XY+o) */
-OP(xycb,a1) { z80->C = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 4,C=(XY+o) */
-OP(xycb,a2) { z80->D = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 4,D=(XY+o) */
-OP(xycb,a3) { z80->E = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 4,E=(XY+o) */
-OP(xycb,a4) { z80->H = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 4,H=(XY+o) */
-OP(xycb,a5) { z80->L = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 4,L=(XY+o) */
-OP(xycb,a6) { WM(z80, z80->ea, RES(4, RM(z80, z80->ea))); } /* RES 4,(XY+o) */
-OP(xycb,a7) { z80->A = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 4,A=(XY+o) */
-
-OP(xycb,a8) { z80->B = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 5,B=(XY+o) */
-OP(xycb,a9) { z80->C = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 5,C=(XY+o) */
-OP(xycb,aa) { z80->D = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 5,D=(XY+o) */
-OP(xycb,ab) { z80->E = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 5,E=(XY+o) */
-OP(xycb,ac) { z80->H = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 5,H=(XY+o) */
-OP(xycb,ad) { z80->L = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 5,L=(XY+o) */
-OP(xycb,ae) { WM(z80, z80->ea, RES(5, RM(z80, z80->ea))); } /* RES 5,(XY+o) */
-OP(xycb,af) { z80->A = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 5,A=(XY+o) */
-
-OP(xycb,b0) { z80->B = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 6,B=(XY+o) */
-OP(xycb,b1) { z80->C = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 6,C=(XY+o) */
-OP(xycb,b2) { z80->D = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 6,D=(XY+o) */
-OP(xycb,b3) { z80->E = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 6,E=(XY+o) */
-OP(xycb,b4) { z80->H = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 6,H=(XY+o) */
-OP(xycb,b5) { z80->L = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 6,L=(XY+o) */
-OP(xycb,b6) { WM(z80, z80->ea, RES(6, RM(z80, z80->ea))); } /* RES 6,(XY+o) */
-OP(xycb,b7) { z80->A = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 6,A=(XY+o) */
-
-OP(xycb,b8) { z80->B = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 7,B=(XY+o) */
-OP(xycb,b9) { z80->C = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 7,C=(XY+o) */
-OP(xycb,ba) { z80->D = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 7,D=(XY+o) */
-OP(xycb,bb) { z80->E = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 7,E=(XY+o) */
-OP(xycb,bc) { z80->H = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 7,H=(XY+o) */
-OP(xycb,bd) { z80->L = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 7,L=(XY+o) */
-OP(xycb,be) { WM(z80, z80->ea, RES(7, RM(z80, z80->ea))); } /* RES 7,(XY+o) */
-OP(xycb,bf) { z80->A = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 7,A=(XY+o) */
-
-OP(xycb,c0) { z80->B = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 0,B=(XY+o) */
-OP(xycb,c1) { z80->C = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 0,C=(XY+o) */
-OP(xycb,c2) { z80->D = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 0,D=(XY+o) */
-OP(xycb,c3) { z80->E = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 0,E=(XY+o) */
-OP(xycb,c4) { z80->H = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 0,H=(XY+o) */
-OP(xycb,c5) { z80->L = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 0,L=(XY+o) */
-OP(xycb,c6) { WM(z80, z80->ea, SET(0, RM(z80, z80->ea))); } /* SET 0,(XY+o) */
-OP(xycb,c7) { z80->A = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 0,A=(XY+o) */
-
-OP(xycb,c8) { z80->B = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 1,B=(XY+o) */
-OP(xycb,c9) { z80->C = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 1,C=(XY+o) */
-OP(xycb,ca) { z80->D = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 1,D=(XY+o) */
-OP(xycb,cb) { z80->E = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 1,E=(XY+o) */
-OP(xycb,cc) { z80->H = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 1,H=(XY+o) */
-OP(xycb,cd) { z80->L = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 1,L=(XY+o) */
-OP(xycb,ce) { WM(z80, z80->ea, SET(1, RM(z80, z80->ea))); } /* SET 1,(XY+o) */
-OP(xycb,cf) { z80->A = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 1,A=(XY+o) */
-
-OP(xycb,d0) { z80->B = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 2,B=(XY+o) */
-OP(xycb,d1) { z80->C = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 2,C=(XY+o) */
-OP(xycb,d2) { z80->D = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 2,D=(XY+o) */
-OP(xycb,d3) { z80->E = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 2,E=(XY+o) */
-OP(xycb,d4) { z80->H = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 2,H=(XY+o) */
-OP(xycb,d5) { z80->L = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 2,L=(XY+o) */
-OP(xycb,d6) { WM(z80, z80->ea, SET(2, RM(z80, z80->ea))); } /* SET 2,(XY+o) */
-OP(xycb,d7) { z80->A = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 2,A=(XY+o) */
-
-OP(xycb,d8) { z80->B = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 3,B=(XY+o) */
-OP(xycb,d9) { z80->C = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 3,C=(XY+o) */
-OP(xycb,da) { z80->D = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 3,D=(XY+o) */
-OP(xycb,db) { z80->E = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 3,E=(XY+o) */
-OP(xycb,dc) { z80->H = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 3,H=(XY+o) */
-OP(xycb,dd) { z80->L = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 3,L=(XY+o) */
-OP(xycb,de) { WM(z80, z80->ea, SET(3, RM(z80, z80->ea))); } /* SET 3,(XY+o) */
-OP(xycb,df) { z80->A = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 3,A=(XY+o) */
-
-OP(xycb,e0) { z80->B = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 4,B=(XY+o) */
-OP(xycb,e1) { z80->C = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 4,C=(XY+o) */
-OP(xycb,e2) { z80->D = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 4,D=(XY+o) */
-OP(xycb,e3) { z80->E = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 4,E=(XY+o) */
-OP(xycb,e4) { z80->H = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 4,H=(XY+o) */
-OP(xycb,e5) { z80->L = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 4,L=(XY+o) */
-OP(xycb,e6) { WM(z80, z80->ea, SET(4, RM(z80, z80->ea))); } /* SET 4,(XY+o) */
-OP(xycb,e7) { z80->A = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 4,A=(XY+o) */
-
-OP(xycb,e8) { z80->B = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 5,B=(XY+o) */
-OP(xycb,e9) { z80->C = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 5,C=(XY+o) */
-OP(xycb,ea) { z80->D = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 5,D=(XY+o) */
-OP(xycb,eb) { z80->E = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 5,E=(XY+o) */
-OP(xycb,ec) { z80->H = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 5,H=(XY+o) */
-OP(xycb,ed) { z80->L = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 5,L=(XY+o) */
-OP(xycb,ee) { WM(z80, z80->ea, SET(5, RM(z80, z80->ea))); } /* SET 5,(XY+o) */
-OP(xycb,ef) { z80->A = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 5,A=(XY+o) */
-
-OP(xycb,f0) { z80->B = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 6,B=(XY+o) */
-OP(xycb,f1) { z80->C = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 6,C=(XY+o) */
-OP(xycb,f2) { z80->D = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 6,D=(XY+o) */
-OP(xycb,f3) { z80->E = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 6,E=(XY+o) */
-OP(xycb,f4) { z80->H = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 6,H=(XY+o) */
-OP(xycb,f5) { z80->L = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 6,L=(XY+o) */
-OP(xycb,f6) { WM(z80, z80->ea, SET(6, RM(z80, z80->ea))); } /* SET 6,(XY+o) */
-OP(xycb,f7) { z80->A = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 6,A=(XY+o) */
-
-OP(xycb,f8) { z80->B = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 7,B=(XY+o) */
-OP(xycb,f9) { z80->C = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 7,C=(XY+o) */
-OP(xycb,fa) { z80->D = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 7,D=(XY+o) */
-OP(xycb,fb) { z80->E = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 7,E=(XY+o) */
-OP(xycb,fc) { z80->H = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 7,H=(XY+o) */
-OP(xycb,fd) { z80->L = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 7,L=(XY+o) */
-OP(xycb,fe) { WM(z80, z80->ea, SET(7, RM(z80, z80->ea))); } /* SET 7,(XY+o) */
-OP(xycb,ff) { z80->A = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 7,A=(XY+o) */
+OP(xycb,00) { z80->B = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RLC B=(XY+o) */
+OP(xycb,01) { z80->C = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RLC C=(XY+o) */
+OP(xycb,02) { z80->D = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RLC D=(XY+o) */
+OP(xycb,03) { z80->E = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RLC E=(XY+o) */
+OP(xycb,04) { z80->H = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RLC H=(XY+o) */
+OP(xycb,05) { z80->L = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RLC L=(XY+o) */
+OP(xycb,06) { WM(z80, z80->ea, RLC(z80, RM(z80, z80->ea))); } /* RLC (XY+o) */
+OP(xycb,07) { z80->A = RLC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RLC A=(XY+o) */
+
+OP(xycb,08) { z80->B = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RRC B=(XY+o) */
+OP(xycb,09) { z80->C = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RRC C=(XY+o) */
+OP(xycb,0a) { z80->D = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RRC D=(XY+o) */
+OP(xycb,0b) { z80->E = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RRC E=(XY+o) */
+OP(xycb,0c) { z80->H = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RRC H=(XY+o) */
+OP(xycb,0d) { z80->L = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RRC L=(XY+o) */
+OP(xycb,0e) { WM(z80, z80->ea,RRC(z80, RM(z80, z80->ea))); } /* RRC (XY+o) */
+OP(xycb,0f) { z80->A = RRC(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RRC A=(XY+o) */
+
+OP(xycb,10) { z80->B = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RL B=(XY+o) */
+OP(xycb,11) { z80->C = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RL C=(XY+o) */
+OP(xycb,12) { z80->D = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RL D=(XY+o) */
+OP(xycb,13) { z80->E = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RL E=(XY+o) */
+OP(xycb,14) { z80->H = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RL H=(XY+o) */
+OP(xycb,15) { z80->L = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RL L=(XY+o) */
+OP(xycb,16) { WM(z80, z80->ea,RL(z80, RM(z80, z80->ea))); } /* RL (XY+o) */
+OP(xycb,17) { z80->A = RL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RL A=(XY+o) */
+
+OP(xycb,18) { z80->B = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RR B=(XY+o) */
+OP(xycb,19) { z80->C = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RR C=(XY+o) */
+OP(xycb,1a) { z80->D = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RR D=(XY+o) */
+OP(xycb,1b) { z80->E = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RR E=(XY+o) */
+OP(xycb,1c) { z80->H = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RR H=(XY+o) */
+OP(xycb,1d) { z80->L = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RR L=(XY+o) */
+OP(xycb,1e) { WM(z80, z80->ea,RR(z80, RM(z80, z80->ea))); } /* RR (XY+o) */
+OP(xycb,1f) { z80->A = RR(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RR A=(XY+o) */
+
+OP(xycb,20) { z80->B = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SLA B=(XY+o) */
+OP(xycb,21) { z80->C = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SLA C=(XY+o) */
+OP(xycb,22) { z80->D = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SLA D=(XY+o) */
+OP(xycb,23) { z80->E = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SLA E=(XY+o) */
+OP(xycb,24) { z80->H = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SLA H=(XY+o) */
+OP(xycb,25) { z80->L = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SLA L=(XY+o) */
+OP(xycb,26) { WM(z80, z80->ea,SLA(z80, RM(z80, z80->ea))); } /* SLA (XY+o) */
+OP(xycb,27) { z80->A = SLA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SLA A=(XY+o) */
+
+OP(xycb,28) { z80->B = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SRA B=(XY+o) */
+OP(xycb,29) { z80->C = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SRA C=(XY+o) */
+OP(xycb,2a) { z80->D = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SRA D=(XY+o) */
+OP(xycb,2b) { z80->E = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SRA E=(XY+o) */
+OP(xycb,2c) { z80->H = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SRA H=(XY+o) */
+OP(xycb,2d) { z80->L = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SRA L=(XY+o) */
+OP(xycb,2e) { WM(z80, z80->ea,SRA(z80, RM(z80, z80->ea))); } /* SRA (XY+o) */
+OP(xycb,2f) { z80->A = SRA(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SRA A=(XY+o) */
+
+OP(xycb,30) { z80->B = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SLL B=(XY+o) */
+OP(xycb,31) { z80->C = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SLL C=(XY+o) */
+OP(xycb,32) { z80->D = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SLL D=(XY+o) */
+OP(xycb,33) { z80->E = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SLL E=(XY+o) */
+OP(xycb,34) { z80->H = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SLL H=(XY+o) */
+OP(xycb,35) { z80->L = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SLL L=(XY+o) */
+OP(xycb,36) { WM(z80, z80->ea,SLL(z80, RM(z80, z80->ea))); } /* SLL (XY+o) */
+OP(xycb,37) { z80->A = SLL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SLL A=(XY+o) */
+
+OP(xycb,38) { z80->B = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SRL B=(XY+o) */
+OP(xycb,39) { z80->C = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SRL C=(XY+o) */
+OP(xycb,3a) { z80->D = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SRL D=(XY+o) */
+OP(xycb,3b) { z80->E = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SRL E=(XY+o) */
+OP(xycb,3c) { z80->H = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SRL H=(XY+o) */
+OP(xycb,3d) { z80->L = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SRL L=(XY+o) */
+OP(xycb,3e) { WM(z80, z80->ea,SRL(z80, RM(z80, z80->ea))); } /* SRL (XY+o) */
+OP(xycb,3f) { z80->A = SRL(z80, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SRL A=(XY+o) */
+
+OP(xycb,40) { xycb_46(z80); } /* BIT 0,(XY+o) */
+OP(xycb,41) { xycb_46(z80); } /* BIT 0,(XY+o) */
+OP(xycb,42) { xycb_46(z80); } /* BIT 0,(XY+o) */
+OP(xycb,43) { xycb_46(z80); } /* BIT 0,(XY+o) */
+OP(xycb,44) { xycb_46(z80); } /* BIT 0,(XY+o) */
+OP(xycb,45) { xycb_46(z80); } /* BIT 0,(XY+o) */
+OP(xycb,46) { BIT_XY(z80, 0, RM(z80, z80->ea)); } /* BIT 0,(XY+o) */
+OP(xycb,47) { xycb_46(z80); } /* BIT 0,(XY+o) */
+
+OP(xycb,48) { xycb_4e(z80); } /* BIT 1,(XY+o) */
+OP(xycb,49) { xycb_4e(z80); } /* BIT 1,(XY+o) */
+OP(xycb,4a) { xycb_4e(z80); } /* BIT 1,(XY+o) */
+OP(xycb,4b) { xycb_4e(z80); } /* BIT 1,(XY+o) */
+OP(xycb,4c) { xycb_4e(z80); } /* BIT 1,(XY+o) */
+OP(xycb,4d) { xycb_4e(z80); } /* BIT 1,(XY+o) */
+OP(xycb,4e) { BIT_XY(z80, 1, RM(z80, z80->ea)); } /* BIT 1,(XY+o) */
+OP(xycb,4f) { xycb_4e(z80); } /* BIT 1,(XY+o) */
+
+OP(xycb,50) { xycb_56(z80); } /* BIT 2,(XY+o) */
+OP(xycb,51) { xycb_56(z80); } /* BIT 2,(XY+o) */
+OP(xycb,52) { xycb_56(z80); } /* BIT 2,(XY+o) */
+OP(xycb,53) { xycb_56(z80); } /* BIT 2,(XY+o) */
+OP(xycb,54) { xycb_56(z80); } /* BIT 2,(XY+o) */
+OP(xycb,55) { xycb_56(z80); } /* BIT 2,(XY+o) */
+OP(xycb,56) { BIT_XY(z80, 2, RM(z80, z80->ea)); } /* BIT 2,(XY+o) */
+OP(xycb,57) { xycb_56(z80); } /* BIT 2,(XY+o) */
+
+OP(xycb,58) { xycb_5e(z80); } /* BIT 3,(XY+o) */
+OP(xycb,59) { xycb_5e(z80); } /* BIT 3,(XY+o) */
+OP(xycb,5a) { xycb_5e(z80); } /* BIT 3,(XY+o) */
+OP(xycb,5b) { xycb_5e(z80); } /* BIT 3,(XY+o) */
+OP(xycb,5c) { xycb_5e(z80); } /* BIT 3,(XY+o) */
+OP(xycb,5d) { xycb_5e(z80); } /* BIT 3,(XY+o) */
+OP(xycb,5e) { BIT_XY(z80, 3, RM(z80, z80->ea)); } /* BIT 3,(XY+o) */
+OP(xycb,5f) { xycb_5e(z80); } /* BIT 3,(XY+o) */
+
+OP(xycb,60) { xycb_66(z80); } /* BIT 4,(XY+o) */
+OP(xycb,61) { xycb_66(z80); } /* BIT 4,(XY+o) */
+OP(xycb,62) { xycb_66(z80); } /* BIT 4,(XY+o) */
+OP(xycb,63) { xycb_66(z80); } /* BIT 4,(XY+o) */
+OP(xycb,64) { xycb_66(z80); } /* BIT 4,(XY+o) */
+OP(xycb,65) { xycb_66(z80); } /* BIT 4,(XY+o) */
+OP(xycb,66) { BIT_XY(z80, 4, RM(z80, z80->ea)); } /* BIT 4,(XY+o) */
+OP(xycb,67) { xycb_66(z80); } /* BIT 4,(XY+o) */
+
+OP(xycb,68) { xycb_6e(z80); } /* BIT 5,(XY+o) */
+OP(xycb,69) { xycb_6e(z80); } /* BIT 5,(XY+o) */
+OP(xycb,6a) { xycb_6e(z80); } /* BIT 5,(XY+o) */
+OP(xycb,6b) { xycb_6e(z80); } /* BIT 5,(XY+o) */
+OP(xycb,6c) { xycb_6e(z80); } /* BIT 5,(XY+o) */
+OP(xycb,6d) { xycb_6e(z80); } /* BIT 5,(XY+o) */
+OP(xycb,6e) { BIT_XY(z80, 5, RM(z80, z80->ea)); } /* BIT 5,(XY+o) */
+OP(xycb,6f) { xycb_6e(z80); } /* BIT 5,(XY+o) */
+
+OP(xycb,70) { xycb_76(z80); } /* BIT 6,(XY+o) */
+OP(xycb,71) { xycb_76(z80); } /* BIT 6,(XY+o) */
+OP(xycb,72) { xycb_76(z80); } /* BIT 6,(XY+o) */
+OP(xycb,73) { xycb_76(z80); } /* BIT 6,(XY+o) */
+OP(xycb,74) { xycb_76(z80); } /* BIT 6,(XY+o) */
+OP(xycb,75) { xycb_76(z80); } /* BIT 6,(XY+o) */
+OP(xycb,76) { BIT_XY(z80, 6, RM(z80, z80->ea)); } /* BIT 6,(XY+o) */
+OP(xycb,77) { xycb_76(z80); } /* BIT 6,(XY+o) */
+
+OP(xycb,78) { xycb_7e(z80); } /* BIT 7,(XY+o) */
+OP(xycb,79) { xycb_7e(z80); } /* BIT 7,(XY+o) */
+OP(xycb,7a) { xycb_7e(z80); } /* BIT 7,(XY+o) */
+OP(xycb,7b) { xycb_7e(z80); } /* BIT 7,(XY+o) */
+OP(xycb,7c) { xycb_7e(z80); } /* BIT 7,(XY+o) */
+OP(xycb,7d) { xycb_7e(z80); } /* BIT 7,(XY+o) */
+OP(xycb,7e) { BIT_XY(z80, 7, RM(z80, z80->ea)); } /* BIT 7,(XY+o) */
+OP(xycb,7f) { xycb_7e(z80); } /* BIT 7,(XY+o) */
+
+OP(xycb,80) { z80->B = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 0,B=(XY+o) */
+OP(xycb,81) { z80->C = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 0,C=(XY+o) */
+OP(xycb,82) { z80->D = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 0,D=(XY+o) */
+OP(xycb,83) { z80->E = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 0,E=(XY+o) */
+OP(xycb,84) { z80->H = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 0,H=(XY+o) */
+OP(xycb,85) { z80->L = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 0,L=(XY+o) */
+OP(xycb,86) { WM(z80, z80->ea, RES(0, RM(z80, z80->ea))); } /* RES 0,(XY+o) */
+OP(xycb,87) { z80->A = RES(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 0,A=(XY+o) */
+
+OP(xycb,88) { z80->B = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 1,B=(XY+o) */
+OP(xycb,89) { z80->C = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 1,C=(XY+o) */
+OP(xycb,8a) { z80->D = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 1,D=(XY+o) */
+OP(xycb,8b) { z80->E = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 1,E=(XY+o) */
+OP(xycb,8c) { z80->H = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 1,H=(XY+o) */
+OP(xycb,8d) { z80->L = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 1,L=(XY+o) */
+OP(xycb,8e) { WM(z80, z80->ea, RES(1, RM(z80, z80->ea))); } /* RES 1,(XY+o) */
+OP(xycb,8f) { z80->A = RES(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 1,A=(XY+o) */
+
+OP(xycb,90) { z80->B = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 2,B=(XY+o) */
+OP(xycb,91) { z80->C = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 2,C=(XY+o) */
+OP(xycb,92) { z80->D = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 2,D=(XY+o) */
+OP(xycb,93) { z80->E = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 2,E=(XY+o) */
+OP(xycb,94) { z80->H = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 2,H=(XY+o) */
+OP(xycb,95) { z80->L = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 2,L=(XY+o) */
+OP(xycb,96) { WM(z80, z80->ea, RES(2, RM(z80, z80->ea))); } /* RES 2,(XY+o) */
+OP(xycb,97) { z80->A = RES(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 2,A=(XY+o) */
+
+OP(xycb,98) { z80->B = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 3,B=(XY+o) */
+OP(xycb,99) { z80->C = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 3,C=(XY+o) */
+OP(xycb,9a) { z80->D = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 3,D=(XY+o) */
+OP(xycb,9b) { z80->E = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 3,E=(XY+o) */
+OP(xycb,9c) { z80->H = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 3,H=(XY+o) */
+OP(xycb,9d) { z80->L = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 3,L=(XY+o) */
+OP(xycb,9e) { WM(z80, z80->ea, RES(3, RM(z80, z80->ea))); } /* RES 3,(XY+o) */
+OP(xycb,9f) { z80->A = RES(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 3,A=(XY+o) */
+
+OP(xycb,a0) { z80->B = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 4,B=(XY+o) */
+OP(xycb,a1) { z80->C = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 4,C=(XY+o) */
+OP(xycb,a2) { z80->D = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 4,D=(XY+o) */
+OP(xycb,a3) { z80->E = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 4,E=(XY+o) */
+OP(xycb,a4) { z80->H = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 4,H=(XY+o) */
+OP(xycb,a5) { z80->L = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 4,L=(XY+o) */
+OP(xycb,a6) { WM(z80, z80->ea, RES(4, RM(z80, z80->ea))); } /* RES 4,(XY+o) */
+OP(xycb,a7) { z80->A = RES(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 4,A=(XY+o) */
+
+OP(xycb,a8) { z80->B = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 5,B=(XY+o) */
+OP(xycb,a9) { z80->C = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 5,C=(XY+o) */
+OP(xycb,aa) { z80->D = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 5,D=(XY+o) */
+OP(xycb,ab) { z80->E = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 5,E=(XY+o) */
+OP(xycb,ac) { z80->H = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 5,H=(XY+o) */
+OP(xycb,ad) { z80->L = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 5,L=(XY+o) */
+OP(xycb,ae) { WM(z80, z80->ea, RES(5, RM(z80, z80->ea))); } /* RES 5,(XY+o) */
+OP(xycb,af) { z80->A = RES(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 5,A=(XY+o) */
+
+OP(xycb,b0) { z80->B = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 6,B=(XY+o) */
+OP(xycb,b1) { z80->C = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 6,C=(XY+o) */
+OP(xycb,b2) { z80->D = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 6,D=(XY+o) */
+OP(xycb,b3) { z80->E = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 6,E=(XY+o) */
+OP(xycb,b4) { z80->H = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 6,H=(XY+o) */
+OP(xycb,b5) { z80->L = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 6,L=(XY+o) */
+OP(xycb,b6) { WM(z80, z80->ea, RES(6, RM(z80, z80->ea))); } /* RES 6,(XY+o) */
+OP(xycb,b7) { z80->A = RES(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 6,A=(XY+o) */
+
+OP(xycb,b8) { z80->B = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* RES 7,B=(XY+o) */
+OP(xycb,b9) { z80->C = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* RES 7,C=(XY+o) */
+OP(xycb,ba) { z80->D = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* RES 7,D=(XY+o) */
+OP(xycb,bb) { z80->E = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* RES 7,E=(XY+o) */
+OP(xycb,bc) { z80->H = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* RES 7,H=(XY+o) */
+OP(xycb,bd) { z80->L = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* RES 7,L=(XY+o) */
+OP(xycb,be) { WM(z80, z80->ea, RES(7, RM(z80, z80->ea))); } /* RES 7,(XY+o) */
+OP(xycb,bf) { z80->A = RES(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* RES 7,A=(XY+o) */
+
+OP(xycb,c0) { z80->B = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 0,B=(XY+o) */
+OP(xycb,c1) { z80->C = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 0,C=(XY+o) */
+OP(xycb,c2) { z80->D = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 0,D=(XY+o) */
+OP(xycb,c3) { z80->E = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 0,E=(XY+o) */
+OP(xycb,c4) { z80->H = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 0,H=(XY+o) */
+OP(xycb,c5) { z80->L = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 0,L=(XY+o) */
+OP(xycb,c6) { WM(z80, z80->ea, SET(0, RM(z80, z80->ea))); } /* SET 0,(XY+o) */
+OP(xycb,c7) { z80->A = SET(0, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 0,A=(XY+o) */
+
+OP(xycb,c8) { z80->B = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 1,B=(XY+o) */
+OP(xycb,c9) { z80->C = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 1,C=(XY+o) */
+OP(xycb,ca) { z80->D = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 1,D=(XY+o) */
+OP(xycb,cb) { z80->E = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 1,E=(XY+o) */
+OP(xycb,cc) { z80->H = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 1,H=(XY+o) */
+OP(xycb,cd) { z80->L = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 1,L=(XY+o) */
+OP(xycb,ce) { WM(z80, z80->ea, SET(1, RM(z80, z80->ea))); } /* SET 1,(XY+o) */
+OP(xycb,cf) { z80->A = SET(1, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 1,A=(XY+o) */
+
+OP(xycb,d0) { z80->B = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 2,B=(XY+o) */
+OP(xycb,d1) { z80->C = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 2,C=(XY+o) */
+OP(xycb,d2) { z80->D = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 2,D=(XY+o) */
+OP(xycb,d3) { z80->E = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 2,E=(XY+o) */
+OP(xycb,d4) { z80->H = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 2,H=(XY+o) */
+OP(xycb,d5) { z80->L = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 2,L=(XY+o) */
+OP(xycb,d6) { WM(z80, z80->ea, SET(2, RM(z80, z80->ea))); } /* SET 2,(XY+o) */
+OP(xycb,d7) { z80->A = SET(2, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 2,A=(XY+o) */
+
+OP(xycb,d8) { z80->B = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 3,B=(XY+o) */
+OP(xycb,d9) { z80->C = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 3,C=(XY+o) */
+OP(xycb,da) { z80->D = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 3,D=(XY+o) */
+OP(xycb,db) { z80->E = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 3,E=(XY+o) */
+OP(xycb,dc) { z80->H = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 3,H=(XY+o) */
+OP(xycb,dd) { z80->L = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 3,L=(XY+o) */
+OP(xycb,de) { WM(z80, z80->ea, SET(3, RM(z80, z80->ea))); } /* SET 3,(XY+o) */
+OP(xycb,df) { z80->A = SET(3, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 3,A=(XY+o) */
+
+OP(xycb,e0) { z80->B = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 4,B=(XY+o) */
+OP(xycb,e1) { z80->C = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 4,C=(XY+o) */
+OP(xycb,e2) { z80->D = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 4,D=(XY+o) */
+OP(xycb,e3) { z80->E = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 4,E=(XY+o) */
+OP(xycb,e4) { z80->H = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 4,H=(XY+o) */
+OP(xycb,e5) { z80->L = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 4,L=(XY+o) */
+OP(xycb,e6) { WM(z80, z80->ea, SET(4, RM(z80, z80->ea))); } /* SET 4,(XY+o) */
+OP(xycb,e7) { z80->A = SET(4, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 4,A=(XY+o) */
+
+OP(xycb,e8) { z80->B = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 5,B=(XY+o) */
+OP(xycb,e9) { z80->C = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 5,C=(XY+o) */
+OP(xycb,ea) { z80->D = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 5,D=(XY+o) */
+OP(xycb,eb) { z80->E = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 5,E=(XY+o) */
+OP(xycb,ec) { z80->H = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 5,H=(XY+o) */
+OP(xycb,ed) { z80->L = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 5,L=(XY+o) */
+OP(xycb,ee) { WM(z80, z80->ea, SET(5, RM(z80, z80->ea))); } /* SET 5,(XY+o) */
+OP(xycb,ef) { z80->A = SET(5, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 5,A=(XY+o) */
+
+OP(xycb,f0) { z80->B = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 6,B=(XY+o) */
+OP(xycb,f1) { z80->C = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 6,C=(XY+o) */
+OP(xycb,f2) { z80->D = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 6,D=(XY+o) */
+OP(xycb,f3) { z80->E = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 6,E=(XY+o) */
+OP(xycb,f4) { z80->H = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 6,H=(XY+o) */
+OP(xycb,f5) { z80->L = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 6,L=(XY+o) */
+OP(xycb,f6) { WM(z80, z80->ea, SET(6, RM(z80, z80->ea))); } /* SET 6,(XY+o) */
+OP(xycb,f7) { z80->A = SET(6, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 6,A=(XY+o) */
+
+OP(xycb,f8) { z80->B = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->B); } /* SET 7,B=(XY+o) */
+OP(xycb,f9) { z80->C = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->C); } /* SET 7,C=(XY+o) */
+OP(xycb,fa) { z80->D = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->D); } /* SET 7,D=(XY+o) */
+OP(xycb,fb) { z80->E = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->E); } /* SET 7,E=(XY+o) */
+OP(xycb,fc) { z80->H = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->H); } /* SET 7,H=(XY+o) */
+OP(xycb,fd) { z80->L = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->L); } /* SET 7,L=(XY+o) */
+OP(xycb,fe) { WM(z80, z80->ea, SET(7, RM(z80, z80->ea))); } /* SET 7,(XY+o) */
+OP(xycb,ff) { z80->A = SET(7, RM(z80, z80->ea)); WM(z80, z80->ea,z80->A); } /* SET 7,A=(XY+o) */
OP(illegal,1) {
logerror("Z80 '%s' ill. opcode $%02x $%02x\n",
@@ -2043,584 +2043,584 @@ OP(illegal,1) {
/**********************************************************
* IX register related opcodes (DD prefix)
**********************************************************/
-OP(dd,00) { illegal_1(z80); op_00(z80); } /* DB DD */
-OP(dd,01) { illegal_1(z80); op_01(z80); } /* DB DD */
-OP(dd,02) { illegal_1(z80); op_02(z80); } /* DB DD */
-OP(dd,03) { illegal_1(z80); op_03(z80); } /* DB DD */
-OP(dd,04) { illegal_1(z80); op_04(z80); } /* DB DD */
-OP(dd,05) { illegal_1(z80); op_05(z80); } /* DB DD */
-OP(dd,06) { illegal_1(z80); op_06(z80); } /* DB DD */
-OP(dd,07) { illegal_1(z80); op_07(z80); } /* DB DD */
-
-OP(dd,08) { illegal_1(z80); op_08(z80); } /* DB DD */
-OP(dd,09) { ADD16(z80, ix, bc); } /* ADD IX,BC */
-OP(dd,0a) { illegal_1(z80); op_0a(z80); } /* DB DD */
-OP(dd,0b) { illegal_1(z80); op_0b(z80); } /* DB DD */
-OP(dd,0c) { illegal_1(z80); op_0c(z80); } /* DB DD */
-OP(dd,0d) { illegal_1(z80); op_0d(z80); } /* DB DD */
-OP(dd,0e) { illegal_1(z80); op_0e(z80); } /* DB DD */
-OP(dd,0f) { illegal_1(z80); op_0f(z80); } /* DB DD */
-
-OP(dd,10) { illegal_1(z80); op_10(z80); } /* DB DD */
-OP(dd,11) { illegal_1(z80); op_11(z80); } /* DB DD */
-OP(dd,12) { illegal_1(z80); op_12(z80); } /* DB DD */
-OP(dd,13) { illegal_1(z80); op_13(z80); } /* DB DD */
-OP(dd,14) { illegal_1(z80); op_14(z80); } /* DB DD */
-OP(dd,15) { illegal_1(z80); op_15(z80); } /* DB DD */
-OP(dd,16) { illegal_1(z80); op_16(z80); } /* DB DD */
-OP(dd,17) { illegal_1(z80); op_17(z80); } /* DB DD */
-
-OP(dd,18) { illegal_1(z80); op_18(z80); } /* DB DD */
-OP(dd,19) { ADD16(z80, ix, de); } /* ADD IX,DE */
-OP(dd,1a) { illegal_1(z80); op_1a(z80); } /* DB DD */
-OP(dd,1b) { illegal_1(z80); op_1b(z80); } /* DB DD */
-OP(dd,1c) { illegal_1(z80); op_1c(z80); } /* DB DD */
-OP(dd,1d) { illegal_1(z80); op_1d(z80); } /* DB DD */
-OP(dd,1e) { illegal_1(z80); op_1e(z80); } /* DB DD */
-OP(dd,1f) { illegal_1(z80); op_1f(z80); } /* DB DD */
-
-OP(dd,20) { illegal_1(z80); op_20(z80); } /* DB DD */
-OP(dd,21) { z80->IX = ARG16(z80); } /* LD IX,w */
-OP(dd,22) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->ix); z80->WZ = z80->ea+1;} /* LD (w),IX */
-OP(dd,23) { z80->IX++; } /* INC IX */
-OP(dd,24) { z80->HX = INC(z80, z80->HX); } /* INC HX */
-OP(dd,25) { z80->HX = DEC(z80, z80->HX); } /* DEC HX */
-OP(dd,26) { z80->HX = ARG(z80); } /* LD HX,n */
-OP(dd,27) { illegal_1(z80); op_27(z80); } /* DB DD */
-
-OP(dd,28) { illegal_1(z80); op_28(z80); } /* DB DD */
-OP(dd,29) { ADD16(z80, ix, ix); } /* ADD IX,IX */
-OP(dd,2a) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->ix); z80->WZ = z80->ea+1;} /* LD IX,(w) */
-OP(dd,2b) { z80->IX--; } /* DEC IX */
-OP(dd,2c) { z80->LX = INC(z80, z80->LX); } /* INC LX */
-OP(dd,2d) { z80->LX = DEC(z80, z80->LX); } /* DEC LX */
-OP(dd,2e) { z80->LX = ARG(z80); } /* LD LX,n */
-OP(dd,2f) { illegal_1(z80); op_2f(z80); } /* DB DD */
-
-OP(dd,30) { illegal_1(z80); op_30(z80); } /* DB DD */
-OP(dd,31) { illegal_1(z80); op_31(z80); } /* DB DD */
-OP(dd,32) { illegal_1(z80); op_32(z80); } /* DB DD */
-OP(dd,33) { illegal_1(z80); op_33(z80); } /* DB DD */
-OP(dd,34) { EAX(z80); WM(z80, z80->ea, INC(z80, RM(z80, z80->ea))); } /* INC (IX+o) */
-OP(dd,35) { EAX(z80); WM(z80, z80->ea, DEC(z80, RM(z80, z80->ea))); } /* DEC (IX+o) */
-OP(dd,36) { EAX(z80); WM(z80, z80->ea, ARG(z80)); } /* LD (IX+o),n */
-OP(dd,37) { illegal_1(z80); op_37(z80); } /* DB DD */
-
-OP(dd,38) { illegal_1(z80); op_38(z80); } /* DB DD */
-OP(dd,39) { ADD16(z80, ix, sp); } /* ADD IX,SP */
-OP(dd,3a) { illegal_1(z80); op_3a(z80); } /* DB DD */
-OP(dd,3b) { illegal_1(z80); op_3b(z80); } /* DB DD */
-OP(dd,3c) { illegal_1(z80); op_3c(z80); } /* DB DD */
-OP(dd,3d) { illegal_1(z80); op_3d(z80); } /* DB DD */
-OP(dd,3e) { illegal_1(z80); op_3e(z80); } /* DB DD */
-OP(dd,3f) { illegal_1(z80); op_3f(z80); } /* DB DD */
-
-OP(dd,40) { illegal_1(z80); op_40(z80); } /* DB DD */
-OP(dd,41) { illegal_1(z80); op_41(z80); } /* DB DD */
-OP(dd,42) { illegal_1(z80); op_42(z80); } /* DB DD */
-OP(dd,43) { illegal_1(z80); op_43(z80); } /* DB DD */
-OP(dd,44) { z80->B = z80->HX; } /* LD B,HX */
-OP(dd,45) { z80->B = z80->LX; } /* LD B,LX */
-OP(dd,46) { EAX(z80); z80->B = RM(z80, z80->ea); } /* LD B,(IX+o) */
-OP(dd,47) { illegal_1(z80); op_47(z80); } /* DB DD */
-
-OP(dd,48) { illegal_1(z80); op_48(z80); } /* DB DD */
-OP(dd,49) { illegal_1(z80); op_49(z80); } /* DB DD */
-OP(dd,4a) { illegal_1(z80); op_4a(z80); } /* DB DD */
-OP(dd,4b) { illegal_1(z80); op_4b(z80); } /* DB DD */
-OP(dd,4c) { z80->C = z80->HX; } /* LD C,HX */
-OP(dd,4d) { z80->C = z80->LX; } /* LD C,LX */
-OP(dd,4e) { EAX(z80); z80->C = RM(z80, z80->ea); } /* LD C,(IX+o) */
-OP(dd,4f) { illegal_1(z80); op_4f(z80); } /* DB DD */
-
-OP(dd,50) { illegal_1(z80); op_50(z80); } /* DB DD */
-OP(dd,51) { illegal_1(z80); op_51(z80); } /* DB DD */
-OP(dd,52) { illegal_1(z80); op_52(z80); } /* DB DD */
-OP(dd,53) { illegal_1(z80); op_53(z80); } /* DB DD */
-OP(dd,54) { z80->D = z80->HX; } /* LD D,HX */
-OP(dd,55) { z80->D = z80->LX; } /* LD D,LX */
-OP(dd,56) { EAX(z80); z80->D = RM(z80, z80->ea); } /* LD D,(IX+o) */
-OP(dd,57) { illegal_1(z80); op_57(z80); } /* DB DD */
-
-OP(dd,58) { illegal_1(z80); op_58(z80); } /* DB DD */
-OP(dd,59) { illegal_1(z80); op_59(z80); } /* DB DD */
-OP(dd,5a) { illegal_1(z80); op_5a(z80); } /* DB DD */
-OP(dd,5b) { illegal_1(z80); op_5b(z80); } /* DB DD */
-OP(dd,5c) { z80->E = z80->HX; } /* LD E,HX */
-OP(dd,5d) { z80->E = z80->LX; } /* LD E,LX */
-OP(dd,5e) { EAX(z80); z80->E = RM(z80, z80->ea); } /* LD E,(IX+o) */
-OP(dd,5f) { illegal_1(z80); op_5f(z80); } /* DB DD */
-
-OP(dd,60) { z80->HX = z80->B; } /* LD HX,B */
-OP(dd,61) { z80->HX = z80->C; } /* LD HX,C */
-OP(dd,62) { z80->HX = z80->D; } /* LD HX,D */
-OP(dd,63) { z80->HX = z80->E; } /* LD HX,E */
-OP(dd,64) { } /* LD HX,HX */
-OP(dd,65) { z80->HX = z80->LX; } /* LD HX,LX */
-OP(dd,66) { EAX(z80); z80->H = RM(z80, z80->ea); } /* LD H,(IX+o) */
-OP(dd,67) { z80->HX = z80->A; } /* LD HX,A */
-
-OP(dd,68) { z80->LX = z80->B; } /* LD LX,B */
-OP(dd,69) { z80->LX = z80->C; } /* LD LX,C */
-OP(dd,6a) { z80->LX = z80->D; } /* LD LX,D */
-OP(dd,6b) { z80->LX = z80->E; } /* LD LX,E */
-OP(dd,6c) { z80->LX = z80->HX; } /* LD LX,HX */
-OP(dd,6d) { } /* LD LX,LX */
-OP(dd,6e) { EAX(z80); z80->L = RM(z80, z80->ea); } /* LD L,(IX+o) */
-OP(dd,6f) { z80->LX = z80->A; } /* LD LX,A */
-
-OP(dd,70) { EAX(z80); WM(z80, z80->ea, z80->B); } /* LD (IX+o),B */
-OP(dd,71) { EAX(z80); WM(z80, z80->ea, z80->C); } /* LD (IX+o),C */
-OP(dd,72) { EAX(z80); WM(z80, z80->ea, z80->D); } /* LD (IX+o),D */
-OP(dd,73) { EAX(z80); WM(z80, z80->ea, z80->E); } /* LD (IX+o),E */
-OP(dd,74) { EAX(z80); WM(z80, z80->ea, z80->H); } /* LD (IX+o),H */
-OP(dd,75) { EAX(z80); WM(z80, z80->ea, z80->L); } /* LD (IX+o),L */
-OP(dd,76) { illegal_1(z80); op_76(z80); } /* DB DD */
-OP(dd,77) { EAX(z80); WM(z80, z80->ea, z80->A); } /* LD (IX+o),A */
-
-OP(dd,78) { illegal_1(z80); op_78(z80); } /* DB DD */
-OP(dd,79) { illegal_1(z80); op_79(z80); } /* DB DD */
-OP(dd,7a) { illegal_1(z80); op_7a(z80); } /* DB DD */
-OP(dd,7b) { illegal_1(z80); op_7b(z80); } /* DB DD */
-OP(dd,7c) { z80->A = z80->HX; } /* LD A,HX */
-OP(dd,7d) { z80->A = z80->LX; } /* LD A,LX */
-OP(dd,7e) { EAX(z80); z80->A = RM(z80, z80->ea); } /* LD A,(IX+o) */
-OP(dd,7f) { illegal_1(z80); op_7f(z80); } /* DB DD */
-
-OP(dd,80) { illegal_1(z80); op_80(z80); } /* DB DD */
-OP(dd,81) { illegal_1(z80); op_81(z80); } /* DB DD */
-OP(dd,82) { illegal_1(z80); op_82(z80); } /* DB DD */
-OP(dd,83) { illegal_1(z80); op_83(z80); } /* DB DD */
-OP(dd,84) { ADD(z80, z80->HX); } /* ADD A,HX */
-OP(dd,85) { ADD(z80, z80->LX); } /* ADD A,LX */
-OP(dd,86) { EAX(z80); ADD(z80, RM(z80, z80->ea)); } /* ADD A,(IX+o) */
-OP(dd,87) { illegal_1(z80); op_87(z80); } /* DB DD */
-
-OP(dd,88) { illegal_1(z80); op_88(z80); } /* DB DD */
-OP(dd,89) { illegal_1(z80); op_89(z80); } /* DB DD */
-OP(dd,8a) { illegal_1(z80); op_8a(z80); } /* DB DD */
-OP(dd,8b) { illegal_1(z80); op_8b(z80); } /* DB DD */
-OP(dd,8c) { ADC(z80, z80->HX); } /* ADC A,HX */
-OP(dd,8d) { ADC(z80, z80->LX); } /* ADC A,LX */
-OP(dd,8e) { EAX(z80); ADC(z80, RM(z80, z80->ea)); } /* ADC A,(IX+o) */
-OP(dd,8f) { illegal_1(z80); op_8f(z80); } /* DB DD */
-
-OP(dd,90) { illegal_1(z80); op_90(z80); } /* DB DD */
-OP(dd,91) { illegal_1(z80); op_91(z80); } /* DB DD */
-OP(dd,92) { illegal_1(z80); op_92(z80); } /* DB DD */
-OP(dd,93) { illegal_1(z80); op_93(z80); } /* DB DD */
-OP(dd,94) { SUB(z80, z80->HX); } /* SUB HX */
-OP(dd,95) { SUB(z80, z80->LX); } /* SUB LX */
-OP(dd,96) { EAX(z80); SUB(z80, RM(z80, z80->ea)); } /* SUB (IX+o) */
-OP(dd,97) { illegal_1(z80); op_97(z80); } /* DB DD */
-
-OP(dd,98) { illegal_1(z80); op_98(z80); } /* DB DD */
-OP(dd,99) { illegal_1(z80); op_99(z80); } /* DB DD */
-OP(dd,9a) { illegal_1(z80); op_9a(z80); } /* DB DD */
-OP(dd,9b) { illegal_1(z80); op_9b(z80); } /* DB DD */
-OP(dd,9c) { SBC(z80, z80->HX); } /* SBC A,HX */
-OP(dd,9d) { SBC(z80, z80->LX); } /* SBC A,LX */
-OP(dd,9e) { EAX(z80); SBC(z80, RM(z80, z80->ea)); } /* SBC A,(IX+o) */
-OP(dd,9f) { illegal_1(z80); op_9f(z80); } /* DB DD */
-
-OP(dd,a0) { illegal_1(z80); op_a0(z80); } /* DB DD */
-OP(dd,a1) { illegal_1(z80); op_a1(z80); } /* DB DD */
-OP(dd,a2) { illegal_1(z80); op_a2(z80); } /* DB DD */
-OP(dd,a3) { illegal_1(z80); op_a3(z80); } /* DB DD */
-OP(dd,a4) { AND(z80, z80->HX); } /* AND HX */
-OP(dd,a5) { AND(z80, z80->LX); } /* AND LX */
-OP(dd,a6) { EAX(z80); AND(z80, RM(z80, z80->ea)); } /* AND (IX+o) */
-OP(dd,a7) { illegal_1(z80); op_a7(z80); } /* DB DD */
-
-OP(dd,a8) { illegal_1(z80); op_a8(z80); } /* DB DD */
-OP(dd,a9) { illegal_1(z80); op_a9(z80); } /* DB DD */
-OP(dd,aa) { illegal_1(z80); op_aa(z80); } /* DB DD */
-OP(dd,ab) { illegal_1(z80); op_ab(z80); } /* DB DD */
-OP(dd,ac) { XOR(z80, z80->HX); } /* XOR HX */
-OP(dd,ad) { XOR(z80, z80->LX); } /* XOR LX */
-OP(dd,ae) { EAX(z80); XOR(z80, RM(z80, z80->ea)); } /* XOR (IX+o) */
-OP(dd,af) { illegal_1(z80); op_af(z80); } /* DB DD */
-
-OP(dd,b0) { illegal_1(z80); op_b0(z80); } /* DB DD */
-OP(dd,b1) { illegal_1(z80); op_b1(z80); } /* DB DD */
-OP(dd,b2) { illegal_1(z80); op_b2(z80); } /* DB DD */
-OP(dd,b3) { illegal_1(z80); op_b3(z80); } /* DB DD */
-OP(dd,b4) { OR(z80, z80->HX); } /* OR HX */
-OP(dd,b5) { OR(z80, z80->LX); } /* OR LX */
-OP(dd,b6) { EAX(z80); OR(z80, RM(z80, z80->ea)); } /* OR (IX+o) */
-OP(dd,b7) { illegal_1(z80); op_b7(z80); } /* DB DD */
-
-OP(dd,b8) { illegal_1(z80); op_b8(z80); } /* DB DD */
-OP(dd,b9) { illegal_1(z80); op_b9(z80); } /* DB DD */
-OP(dd,ba) { illegal_1(z80); op_ba(z80); } /* DB DD */
-OP(dd,bb) { illegal_1(z80); op_bb(z80); } /* DB DD */
-OP(dd,bc) { CP(z80, z80->HX); } /* CP HX */
-OP(dd,bd) { CP(z80, z80->LX); } /* CP LX */
-OP(dd,be) { EAX(z80); CP(z80, RM(z80, z80->ea)); } /* CP (IX+o) */
-OP(dd,bf) { illegal_1(z80); op_bf(z80); } /* DB DD */
-
-OP(dd,c0) { illegal_1(z80); op_c0(z80); } /* DB DD */
-OP(dd,c1) { illegal_1(z80); op_c1(z80); } /* DB DD */
-OP(dd,c2) { illegal_1(z80); op_c2(z80); } /* DB DD */
-OP(dd,c3) { illegal_1(z80); op_c3(z80); } /* DB DD */
-OP(dd,c4) { illegal_1(z80); op_c4(z80); } /* DB DD */
-OP(dd,c5) { illegal_1(z80); op_c5(z80); } /* DB DD */
-OP(dd,c6) { illegal_1(z80); op_c6(z80); } /* DB DD */
-OP(dd,c7) { illegal_1(z80); op_c7(z80); } /* DB DD */
-
-OP(dd,c8) { illegal_1(z80); op_c8(z80); } /* DB DD */
-OP(dd,c9) { illegal_1(z80); op_c9(z80); } /* DB DD */
-OP(dd,ca) { illegal_1(z80); op_ca(z80); } /* DB DD */
-OP(dd,cb) { EAX(z80); EXEC(z80,xycb,ARG(z80)); } /* ** DD CB xx */
-OP(dd,cc) { illegal_1(z80); op_cc(z80); } /* DB DD */
-OP(dd,cd) { illegal_1(z80); op_cd(z80); } /* DB DD */
-OP(dd,ce) { illegal_1(z80); op_ce(z80); } /* DB DD */
-OP(dd,cf) { illegal_1(z80); op_cf(z80); } /* DB DD */
-
-OP(dd,d0) { illegal_1(z80); op_d0(z80); } /* DB DD */
-OP(dd,d1) { illegal_1(z80); op_d1(z80); } /* DB DD */
-OP(dd,d2) { illegal_1(z80); op_d2(z80); } /* DB DD */
-OP(dd,d3) { illegal_1(z80); op_d3(z80); } /* DB DD */
-OP(dd,d4) { illegal_1(z80); op_d4(z80); } /* DB DD */
-OP(dd,d5) { illegal_1(z80); op_d5(z80); } /* DB DD */
-OP(dd,d6) { illegal_1(z80); op_d6(z80); } /* DB DD */
-OP(dd,d7) { illegal_1(z80); op_d7(z80); } /* DB DD */
-
-OP(dd,d8) { illegal_1(z80); op_d8(z80); } /* DB DD */
-OP(dd,d9) { illegal_1(z80); op_d9(z80); } /* DB DD */
-OP(dd,da) { illegal_1(z80); op_da(z80); } /* DB DD */
-OP(dd,db) { illegal_1(z80); op_db(z80); } /* DB DD */
-OP(dd,dc) { illegal_1(z80); op_dc(z80); } /* DB DD */
-OP(dd,dd) { illegal_1(z80); op_dd(z80); } /* DB DD */
-OP(dd,de) { illegal_1(z80); op_de(z80); } /* DB DD */
-OP(dd,df) { illegal_1(z80); op_df(z80); } /* DB DD */
-
-OP(dd,e0) { illegal_1(z80); op_e0(z80); } /* DB DD */
-OP(dd,e1) { POP(z80, ix); } /* POP IX */
-OP(dd,e2) { illegal_1(z80); op_e2(z80); } /* DB DD */
-OP(dd,e3) { EXSP(z80, ix); } /* EX (SP),IX */
-OP(dd,e4) { illegal_1(z80); op_e4(z80); } /* DB DD */
-OP(dd,e5) { PUSH(z80, ix); } /* PUSH IX */
-OP(dd,e6) { illegal_1(z80); op_e6(z80); } /* DB DD */
-OP(dd,e7) { illegal_1(z80); op_e7(z80); } /* DB DD */
-
-OP(dd,e8) { illegal_1(z80); op_e8(z80); } /* DB DD */
-OP(dd,e9) { z80->PC = z80->IX; } /* JP (IX) */
-OP(dd,ea) { illegal_1(z80); op_ea(z80); } /* DB DD */
-OP(dd,eb) { illegal_1(z80); op_eb(z80); } /* DB DD */
-OP(dd,ec) { illegal_1(z80); op_ec(z80); } /* DB DD */
-OP(dd,ed) { illegal_1(z80); op_ed(z80); } /* DB DD */
-OP(dd,ee) { illegal_1(z80); op_ee(z80); } /* DB DD */
-OP(dd,ef) { illegal_1(z80); op_ef(z80); } /* DB DD */
-
-OP(dd,f0) { illegal_1(z80); op_f0(z80); } /* DB DD */
-OP(dd,f1) { illegal_1(z80); op_f1(z80); } /* DB DD */
-OP(dd,f2) { illegal_1(z80); op_f2(z80); } /* DB DD */
-OP(dd,f3) { illegal_1(z80); op_f3(z80); } /* DB DD */
-OP(dd,f4) { illegal_1(z80); op_f4(z80); } /* DB DD */
-OP(dd,f5) { illegal_1(z80); op_f5(z80); } /* DB DD */
-OP(dd,f6) { illegal_1(z80); op_f6(z80); } /* DB DD */
-OP(dd,f7) { illegal_1(z80); op_f7(z80); } /* DB DD */
-
-OP(dd,f8) { illegal_1(z80); op_f8(z80); } /* DB DD */
-OP(dd,f9) { z80->SP = z80->IX; } /* LD SP,IX */
-OP(dd,fa) { illegal_1(z80); op_fa(z80); } /* DB DD */
-OP(dd,fb) { illegal_1(z80); op_fb(z80); } /* DB DD */
-OP(dd,fc) { illegal_1(z80); op_fc(z80); } /* DB DD */
-OP(dd,fd) { illegal_1(z80); op_fd(z80); } /* DB DD */
-OP(dd,fe) { illegal_1(z80); op_fe(z80); } /* DB DD */
-OP(dd,ff) { illegal_1(z80); op_ff(z80); } /* DB DD */
+OP(dd,00) { illegal_1(z80); op_00(z80); } /* DB DD */
+OP(dd,01) { illegal_1(z80); op_01(z80); } /* DB DD */
+OP(dd,02) { illegal_1(z80); op_02(z80); } /* DB DD */
+OP(dd,03) { illegal_1(z80); op_03(z80); } /* DB DD */
+OP(dd,04) { illegal_1(z80); op_04(z80); } /* DB DD */
+OP(dd,05) { illegal_1(z80); op_05(z80); } /* DB DD */
+OP(dd,06) { illegal_1(z80); op_06(z80); } /* DB DD */
+OP(dd,07) { illegal_1(z80); op_07(z80); } /* DB DD */
+
+OP(dd,08) { illegal_1(z80); op_08(z80); } /* DB DD */
+OP(dd,09) { ADD16(z80, ix, bc); } /* ADD IX,BC */
+OP(dd,0a) { illegal_1(z80); op_0a(z80); } /* DB DD */
+OP(dd,0b) { illegal_1(z80); op_0b(z80); } /* DB DD */
+OP(dd,0c) { illegal_1(z80); op_0c(z80); } /* DB DD */
+OP(dd,0d) { illegal_1(z80); op_0d(z80); } /* DB DD */
+OP(dd,0e) { illegal_1(z80); op_0e(z80); } /* DB DD */
+OP(dd,0f) { illegal_1(z80); op_0f(z80); } /* DB DD */
+
+OP(dd,10) { illegal_1(z80); op_10(z80); } /* DB DD */
+OP(dd,11) { illegal_1(z80); op_11(z80); } /* DB DD */
+OP(dd,12) { illegal_1(z80); op_12(z80); } /* DB DD */
+OP(dd,13) { illegal_1(z80); op_13(z80); } /* DB DD */
+OP(dd,14) { illegal_1(z80); op_14(z80); } /* DB DD */
+OP(dd,15) { illegal_1(z80); op_15(z80); } /* DB DD */
+OP(dd,16) { illegal_1(z80); op_16(z80); } /* DB DD */
+OP(dd,17) { illegal_1(z80); op_17(z80); } /* DB DD */
+
+OP(dd,18) { illegal_1(z80); op_18(z80); } /* DB DD */
+OP(dd,19) { ADD16(z80, ix, de); } /* ADD IX,DE */
+OP(dd,1a) { illegal_1(z80); op_1a(z80); } /* DB DD */
+OP(dd,1b) { illegal_1(z80); op_1b(z80); } /* DB DD */
+OP(dd,1c) { illegal_1(z80); op_1c(z80); } /* DB DD */
+OP(dd,1d) { illegal_1(z80); op_1d(z80); } /* DB DD */
+OP(dd,1e) { illegal_1(z80); op_1e(z80); } /* DB DD */
+OP(dd,1f) { illegal_1(z80); op_1f(z80); } /* DB DD */
+
+OP(dd,20) { illegal_1(z80); op_20(z80); } /* DB DD */
+OP(dd,21) { z80->IX = ARG16(z80); } /* LD IX,w */
+OP(dd,22) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->ix); z80->WZ = z80->ea+1;} /* LD (w),IX */
+OP(dd,23) { z80->IX++; } /* INC IX */
+OP(dd,24) { z80->HX = INC(z80, z80->HX); } /* INC HX */
+OP(dd,25) { z80->HX = DEC(z80, z80->HX); } /* DEC HX */
+OP(dd,26) { z80->HX = ARG(z80); } /* LD HX,n */
+OP(dd,27) { illegal_1(z80); op_27(z80); } /* DB DD */
+
+OP(dd,28) { illegal_1(z80); op_28(z80); } /* DB DD */
+OP(dd,29) { ADD16(z80, ix, ix); } /* ADD IX,IX */
+OP(dd,2a) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->ix); z80->WZ = z80->ea+1;} /* LD IX,(w) */
+OP(dd,2b) { z80->IX--; } /* DEC IX */
+OP(dd,2c) { z80->LX = INC(z80, z80->LX); } /* INC LX */
+OP(dd,2d) { z80->LX = DEC(z80, z80->LX); } /* DEC LX */
+OP(dd,2e) { z80->LX = ARG(z80); } /* LD LX,n */
+OP(dd,2f) { illegal_1(z80); op_2f(z80); } /* DB DD */
+
+OP(dd,30) { illegal_1(z80); op_30(z80); } /* DB DD */
+OP(dd,31) { illegal_1(z80); op_31(z80); } /* DB DD */
+OP(dd,32) { illegal_1(z80); op_32(z80); } /* DB DD */
+OP(dd,33) { illegal_1(z80); op_33(z80); } /* DB DD */
+OP(dd,34) { EAX(z80); WM(z80, z80->ea, INC(z80, RM(z80, z80->ea))); } /* INC (IX+o) */
+OP(dd,35) { EAX(z80); WM(z80, z80->ea, DEC(z80, RM(z80, z80->ea))); } /* DEC (IX+o) */
+OP(dd,36) { EAX(z80); WM(z80, z80->ea, ARG(z80)); } /* LD (IX+o),n */
+OP(dd,37) { illegal_1(z80); op_37(z80); } /* DB DD */
+
+OP(dd,38) { illegal_1(z80); op_38(z80); } /* DB DD */
+OP(dd,39) { ADD16(z80, ix, sp); } /* ADD IX,SP */
+OP(dd,3a) { illegal_1(z80); op_3a(z80); } /* DB DD */
+OP(dd,3b) { illegal_1(z80); op_3b(z80); } /* DB DD */
+OP(dd,3c) { illegal_1(z80); op_3c(z80); } /* DB DD */
+OP(dd,3d) { illegal_1(z80); op_3d(z80); } /* DB DD */
+OP(dd,3e) { illegal_1(z80); op_3e(z80); } /* DB DD */
+OP(dd,3f) { illegal_1(z80); op_3f(z80); } /* DB DD */
+
+OP(dd,40) { illegal_1(z80); op_40(z80); } /* DB DD */
+OP(dd,41) { illegal_1(z80); op_41(z80); } /* DB DD */
+OP(dd,42) { illegal_1(z80); op_42(z80); } /* DB DD */
+OP(dd,43) { illegal_1(z80); op_43(z80); } /* DB DD */
+OP(dd,44) { z80->B = z80->HX; } /* LD B,HX */
+OP(dd,45) { z80->B = z80->LX; } /* LD B,LX */
+OP(dd,46) { EAX(z80); z80->B = RM(z80, z80->ea); } /* LD B,(IX+o) */
+OP(dd,47) { illegal_1(z80); op_47(z80); } /* DB DD */
+
+OP(dd,48) { illegal_1(z80); op_48(z80); } /* DB DD */
+OP(dd,49) { illegal_1(z80); op_49(z80); } /* DB DD */
+OP(dd,4a) { illegal_1(z80); op_4a(z80); } /* DB DD */
+OP(dd,4b) { illegal_1(z80); op_4b(z80); } /* DB DD */
+OP(dd,4c) { z80->C = z80->HX; } /* LD C,HX */
+OP(dd,4d) { z80->C = z80->LX; } /* LD C,LX */
+OP(dd,4e) { EAX(z80); z80->C = RM(z80, z80->ea); } /* LD C,(IX+o) */
+OP(dd,4f) { illegal_1(z80); op_4f(z80); } /* DB DD */
+
+OP(dd,50) { illegal_1(z80); op_50(z80); } /* DB DD */
+OP(dd,51) { illegal_1(z80); op_51(z80); } /* DB DD */
+OP(dd,52) { illegal_1(z80); op_52(z80); } /* DB DD */
+OP(dd,53) { illegal_1(z80); op_53(z80); } /* DB DD */
+OP(dd,54) { z80->D = z80->HX; } /* LD D,HX */
+OP(dd,55) { z80->D = z80->LX; } /* LD D,LX */
+OP(dd,56) { EAX(z80); z80->D = RM(z80, z80->ea); } /* LD D,(IX+o) */
+OP(dd,57) { illegal_1(z80); op_57(z80); } /* DB DD */
+
+OP(dd,58) { illegal_1(z80); op_58(z80); } /* DB DD */
+OP(dd,59) { illegal_1(z80); op_59(z80); } /* DB DD */
+OP(dd,5a) { illegal_1(z80); op_5a(z80); } /* DB DD */
+OP(dd,5b) { illegal_1(z80); op_5b(z80); } /* DB DD */
+OP(dd,5c) { z80->E = z80->HX; } /* LD E,HX */
+OP(dd,5d) { z80->E = z80->LX; } /* LD E,LX */
+OP(dd,5e) { EAX(z80); z80->E = RM(z80, z80->ea); } /* LD E,(IX+o) */
+OP(dd,5f) { illegal_1(z80); op_5f(z80); } /* DB DD */
+
+OP(dd,60) { z80->HX = z80->B; } /* LD HX,B */
+OP(dd,61) { z80->HX = z80->C; } /* LD HX,C */
+OP(dd,62) { z80->HX = z80->D; } /* LD HX,D */
+OP(dd,63) { z80->HX = z80->E; } /* LD HX,E */
+OP(dd,64) { } /* LD HX,HX */
+OP(dd,65) { z80->HX = z80->LX; } /* LD HX,LX */
+OP(dd,66) { EAX(z80); z80->H = RM(z80, z80->ea); } /* LD H,(IX+o) */
+OP(dd,67) { z80->HX = z80->A; } /* LD HX,A */
+
+OP(dd,68) { z80->LX = z80->B; } /* LD LX,B */
+OP(dd,69) { z80->LX = z80->C; } /* LD LX,C */
+OP(dd,6a) { z80->LX = z80->D; } /* LD LX,D */
+OP(dd,6b) { z80->LX = z80->E; } /* LD LX,E */
+OP(dd,6c) { z80->LX = z80->HX; } /* LD LX,HX */
+OP(dd,6d) { } /* LD LX,LX */
+OP(dd,6e) { EAX(z80); z80->L = RM(z80, z80->ea); } /* LD L,(IX+o) */
+OP(dd,6f) { z80->LX = z80->A; } /* LD LX,A */
+
+OP(dd,70) { EAX(z80); WM(z80, z80->ea, z80->B); } /* LD (IX+o),B */
+OP(dd,71) { EAX(z80); WM(z80, z80->ea, z80->C); } /* LD (IX+o),C */
+OP(dd,72) { EAX(z80); WM(z80, z80->ea, z80->D); } /* LD (IX+o),D */
+OP(dd,73) { EAX(z80); WM(z80, z80->ea, z80->E); } /* LD (IX+o),E */
+OP(dd,74) { EAX(z80); WM(z80, z80->ea, z80->H); } /* LD (IX+o),H */
+OP(dd,75) { EAX(z80); WM(z80, z80->ea, z80->L); } /* LD (IX+o),L */
+OP(dd,76) { illegal_1(z80); op_76(z80); } /* DB DD */
+OP(dd,77) { EAX(z80); WM(z80, z80->ea, z80->A); } /* LD (IX+o),A */
+
+OP(dd,78) { illegal_1(z80); op_78(z80); } /* DB DD */
+OP(dd,79) { illegal_1(z80); op_79(z80); } /* DB DD */
+OP(dd,7a) { illegal_1(z80); op_7a(z80); } /* DB DD */
+OP(dd,7b) { illegal_1(z80); op_7b(z80); } /* DB DD */
+OP(dd,7c) { z80->A = z80->HX; } /* LD A,HX */
+OP(dd,7d) { z80->A = z80->LX; } /* LD A,LX */
+OP(dd,7e) { EAX(z80); z80->A = RM(z80, z80->ea); } /* LD A,(IX+o) */
+OP(dd,7f) { illegal_1(z80); op_7f(z80); } /* DB DD */
+
+OP(dd,80) { illegal_1(z80); op_80(z80); } /* DB DD */
+OP(dd,81) { illegal_1(z80); op_81(z80); } /* DB DD */
+OP(dd,82) { illegal_1(z80); op_82(z80); } /* DB DD */
+OP(dd,83) { illegal_1(z80); op_83(z80); } /* DB DD */
+OP(dd,84) { ADD(z80, z80->HX); } /* ADD A,HX */
+OP(dd,85) { ADD(z80, z80->LX); } /* ADD A,LX */
+OP(dd,86) { EAX(z80); ADD(z80, RM(z80, z80->ea)); } /* ADD A,(IX+o) */
+OP(dd,87) { illegal_1(z80); op_87(z80); } /* DB DD */
+
+OP(dd,88) { illegal_1(z80); op_88(z80); } /* DB DD */
+OP(dd,89) { illegal_1(z80); op_89(z80); } /* DB DD */
+OP(dd,8a) { illegal_1(z80); op_8a(z80); } /* DB DD */
+OP(dd,8b) { illegal_1(z80); op_8b(z80); } /* DB DD */
+OP(dd,8c) { ADC(z80, z80->HX); } /* ADC A,HX */
+OP(dd,8d) { ADC(z80, z80->LX); } /* ADC A,LX */
+OP(dd,8e) { EAX(z80); ADC(z80, RM(z80, z80->ea)); } /* ADC A,(IX+o) */
+OP(dd,8f) { illegal_1(z80); op_8f(z80); } /* DB DD */
+
+OP(dd,90) { illegal_1(z80); op_90(z80); } /* DB DD */
+OP(dd,91) { illegal_1(z80); op_91(z80); } /* DB DD */
+OP(dd,92) { illegal_1(z80); op_92(z80); } /* DB DD */
+OP(dd,93) { illegal_1(z80); op_93(z80); } /* DB DD */
+OP(dd,94) { SUB(z80, z80->HX); } /* SUB HX */
+OP(dd,95) { SUB(z80, z80->LX); } /* SUB LX */
+OP(dd,96) { EAX(z80); SUB(z80, RM(z80, z80->ea)); } /* SUB (IX+o) */
+OP(dd,97) { illegal_1(z80); op_97(z80); } /* DB DD */
+
+OP(dd,98) { illegal_1(z80); op_98(z80); } /* DB DD */
+OP(dd,99) { illegal_1(z80); op_99(z80); } /* DB DD */
+OP(dd,9a) { illegal_1(z80); op_9a(z80); } /* DB DD */
+OP(dd,9b) { illegal_1(z80); op_9b(z80); } /* DB DD */
+OP(dd,9c) { SBC(z80, z80->HX); } /* SBC A,HX */
+OP(dd,9d) { SBC(z80, z80->LX); } /* SBC A,LX */
+OP(dd,9e) { EAX(z80); SBC(z80, RM(z80, z80->ea)); } /* SBC A,(IX+o) */
+OP(dd,9f) { illegal_1(z80); op_9f(z80); } /* DB DD */
+
+OP(dd,a0) { illegal_1(z80); op_a0(z80); } /* DB DD */
+OP(dd,a1) { illegal_1(z80); op_a1(z80); } /* DB DD */
+OP(dd,a2) { illegal_1(z80); op_a2(z80); } /* DB DD */
+OP(dd,a3) { illegal_1(z80); op_a3(z80); } /* DB DD */
+OP(dd,a4) { AND(z80, z80->HX); } /* AND HX */
+OP(dd,a5) { AND(z80, z80->LX); } /* AND LX */
+OP(dd,a6) { EAX(z80); AND(z80, RM(z80, z80->ea)); } /* AND (IX+o) */
+OP(dd,a7) { illegal_1(z80); op_a7(z80); } /* DB DD */
+
+OP(dd,a8) { illegal_1(z80); op_a8(z80); } /* DB DD */
+OP(dd,a9) { illegal_1(z80); op_a9(z80); } /* DB DD */
+OP(dd,aa) { illegal_1(z80); op_aa(z80); } /* DB DD */
+OP(dd,ab) { illegal_1(z80); op_ab(z80); } /* DB DD */
+OP(dd,ac) { XOR(z80, z80->HX); } /* XOR HX */
+OP(dd,ad) { XOR(z80, z80->LX); } /* XOR LX */
+OP(dd,ae) { EAX(z80); XOR(z80, RM(z80, z80->ea)); } /* XOR (IX+o) */
+OP(dd,af) { illegal_1(z80); op_af(z80); } /* DB DD */
+
+OP(dd,b0) { illegal_1(z80); op_b0(z80); } /* DB DD */
+OP(dd,b1) { illegal_1(z80); op_b1(z80); } /* DB DD */
+OP(dd,b2) { illegal_1(z80); op_b2(z80); } /* DB DD */
+OP(dd,b3) { illegal_1(z80); op_b3(z80); } /* DB DD */
+OP(dd,b4) { OR(z80, z80->HX); } /* OR HX */
+OP(dd,b5) { OR(z80, z80->LX); } /* OR LX */
+OP(dd,b6) { EAX(z80); OR(z80, RM(z80, z80->ea)); } /* OR (IX+o) */
+OP(dd,b7) { illegal_1(z80); op_b7(z80); } /* DB DD */
+
+OP(dd,b8) { illegal_1(z80); op_b8(z80); } /* DB DD */
+OP(dd,b9) { illegal_1(z80); op_b9(z80); } /* DB DD */
+OP(dd,ba) { illegal_1(z80); op_ba(z80); } /* DB DD */
+OP(dd,bb) { illegal_1(z80); op_bb(z80); } /* DB DD */
+OP(dd,bc) { CP(z80, z80->HX); } /* CP HX */
+OP(dd,bd) { CP(z80, z80->LX); } /* CP LX */
+OP(dd,be) { EAX(z80); CP(z80, RM(z80, z80->ea)); } /* CP (IX+o) */
+OP(dd,bf) { illegal_1(z80); op_bf(z80); } /* DB DD */
+
+OP(dd,c0) { illegal_1(z80); op_c0(z80); } /* DB DD */
+OP(dd,c1) { illegal_1(z80); op_c1(z80); } /* DB DD */
+OP(dd,c2) { illegal_1(z80); op_c2(z80); } /* DB DD */
+OP(dd,c3) { illegal_1(z80); op_c3(z80); } /* DB DD */
+OP(dd,c4) { illegal_1(z80); op_c4(z80); } /* DB DD */
+OP(dd,c5) { illegal_1(z80); op_c5(z80); } /* DB DD */
+OP(dd,c6) { illegal_1(z80); op_c6(z80); } /* DB DD */
+OP(dd,c7) { illegal_1(z80); op_c7(z80); } /* DB DD */
+
+OP(dd,c8) { illegal_1(z80); op_c8(z80); } /* DB DD */
+OP(dd,c9) { illegal_1(z80); op_c9(z80); } /* DB DD */
+OP(dd,ca) { illegal_1(z80); op_ca(z80); } /* DB DD */
+OP(dd,cb) { EAX(z80); EXEC(z80,xycb,ARG(z80)); } /* ** DD CB xx */
+OP(dd,cc) { illegal_1(z80); op_cc(z80); } /* DB DD */
+OP(dd,cd) { illegal_1(z80); op_cd(z80); } /* DB DD */
+OP(dd,ce) { illegal_1(z80); op_ce(z80); } /* DB DD */
+OP(dd,cf) { illegal_1(z80); op_cf(z80); } /* DB DD */
+
+OP(dd,d0) { illegal_1(z80); op_d0(z80); } /* DB DD */
+OP(dd,d1) { illegal_1(z80); op_d1(z80); } /* DB DD */
+OP(dd,d2) { illegal_1(z80); op_d2(z80); } /* DB DD */
+OP(dd,d3) { illegal_1(z80); op_d3(z80); } /* DB DD */
+OP(dd,d4) { illegal_1(z80); op_d4(z80); } /* DB DD */
+OP(dd,d5) { illegal_1(z80); op_d5(z80); } /* DB DD */
+OP(dd,d6) { illegal_1(z80); op_d6(z80); } /* DB DD */
+OP(dd,d7) { illegal_1(z80); op_d7(z80); } /* DB DD */
+
+OP(dd,d8) { illegal_1(z80); op_d8(z80); } /* DB DD */
+OP(dd,d9) { illegal_1(z80); op_d9(z80); } /* DB DD */
+OP(dd,da) { illegal_1(z80); op_da(z80); } /* DB DD */
+OP(dd,db) { illegal_1(z80); op_db(z80); } /* DB DD */
+OP(dd,dc) { illegal_1(z80); op_dc(z80); } /* DB DD */
+OP(dd,dd) { illegal_1(z80); op_dd(z80); } /* DB DD */
+OP(dd,de) { illegal_1(z80); op_de(z80); } /* DB DD */
+OP(dd,df) { illegal_1(z80); op_df(z80); } /* DB DD */
+
+OP(dd,e0) { illegal_1(z80); op_e0(z80); } /* DB DD */
+OP(dd,e1) { POP(z80, ix); } /* POP IX */
+OP(dd,e2) { illegal_1(z80); op_e2(z80); } /* DB DD */
+OP(dd,e3) { EXSP(z80, ix); } /* EX (SP),IX */
+OP(dd,e4) { illegal_1(z80); op_e4(z80); } /* DB DD */
+OP(dd,e5) { PUSH(z80, ix); } /* PUSH IX */
+OP(dd,e6) { illegal_1(z80); op_e6(z80); } /* DB DD */
+OP(dd,e7) { illegal_1(z80); op_e7(z80); } /* DB DD */
+
+OP(dd,e8) { illegal_1(z80); op_e8(z80); } /* DB DD */
+OP(dd,e9) { z80->PC = z80->IX; } /* JP (IX) */
+OP(dd,ea) { illegal_1(z80); op_ea(z80); } /* DB DD */
+OP(dd,eb) { illegal_1(z80); op_eb(z80); } /* DB DD */
+OP(dd,ec) { illegal_1(z80); op_ec(z80); } /* DB DD */
+OP(dd,ed) { illegal_1(z80); op_ed(z80); } /* DB DD */
+OP(dd,ee) { illegal_1(z80); op_ee(z80); } /* DB DD */
+OP(dd,ef) { illegal_1(z80); op_ef(z80); } /* DB DD */
+
+OP(dd,f0) { illegal_1(z80); op_f0(z80); } /* DB DD */
+OP(dd,f1) { illegal_1(z80); op_f1(z80); } /* DB DD */
+OP(dd,f2) { illegal_1(z80); op_f2(z80); } /* DB DD */
+OP(dd,f3) { illegal_1(z80); op_f3(z80); } /* DB DD */
+OP(dd,f4) { illegal_1(z80); op_f4(z80); } /* DB DD */
+OP(dd,f5) { illegal_1(z80); op_f5(z80); } /* DB DD */
+OP(dd,f6) { illegal_1(z80); op_f6(z80); } /* DB DD */
+OP(dd,f7) { illegal_1(z80); op_f7(z80); } /* DB DD */
+
+OP(dd,f8) { illegal_1(z80); op_f8(z80); } /* DB DD */
+OP(dd,f9) { z80->SP = z80->IX; } /* LD SP,IX */
+OP(dd,fa) { illegal_1(z80); op_fa(z80); } /* DB DD */
+OP(dd,fb) { illegal_1(z80); op_fb(z80); } /* DB DD */
+OP(dd,fc) { illegal_1(z80); op_fc(z80); } /* DB DD */
+OP(dd,fd) { illegal_1(z80); op_fd(z80); } /* DB DD */
+OP(dd,fe) { illegal_1(z80); op_fe(z80); } /* DB DD */
+OP(dd,ff) { illegal_1(z80); op_ff(z80); } /* DB DD */
/**********************************************************
* IY register related opcodes (FD prefix)
**********************************************************/
-OP(fd,00) { illegal_1(z80); op_00(z80); } /* DB FD */
-OP(fd,01) { illegal_1(z80); op_01(z80); } /* DB FD */
-OP(fd,02) { illegal_1(z80); op_02(z80); } /* DB FD */
-OP(fd,03) { illegal_1(z80); op_03(z80); } /* DB FD */
-OP(fd,04) { illegal_1(z80); op_04(z80); } /* DB FD */
-OP(fd,05) { illegal_1(z80); op_05(z80); } /* DB FD */
-OP(fd,06) { illegal_1(z80); op_06(z80); } /* DB FD */
-OP(fd,07) { illegal_1(z80); op_07(z80); } /* DB FD */
-
-OP(fd,08) { illegal_1(z80); op_08(z80); } /* DB FD */
-OP(fd,09) { ADD16(z80, iy, bc); } /* ADD IY,BC */
-OP(fd,0a) { illegal_1(z80); op_0a(z80); } /* DB FD */
-OP(fd,0b) { illegal_1(z80); op_0b(z80); } /* DB FD */
-OP(fd,0c) { illegal_1(z80); op_0c(z80); } /* DB FD */
-OP(fd,0d) { illegal_1(z80); op_0d(z80); } /* DB FD */
-OP(fd,0e) { illegal_1(z80); op_0e(z80); } /* DB FD */
-OP(fd,0f) { illegal_1(z80); op_0f(z80); } /* DB FD */
-
-OP(fd,10) { illegal_1(z80); op_10(z80); } /* DB FD */
-OP(fd,11) { illegal_1(z80); op_11(z80); } /* DB FD */
-OP(fd,12) { illegal_1(z80); op_12(z80); } /* DB FD */
-OP(fd,13) { illegal_1(z80); op_13(z80); } /* DB FD */
-OP(fd,14) { illegal_1(z80); op_14(z80); } /* DB FD */
-OP(fd,15) { illegal_1(z80); op_15(z80); } /* DB FD */
-OP(fd,16) { illegal_1(z80); op_16(z80); } /* DB FD */
-OP(fd,17) { illegal_1(z80); op_17(z80); } /* DB FD */
-
-OP(fd,18) { illegal_1(z80); op_18(z80); } /* DB FD */
-OP(fd,19) { ADD16(z80, iy, de); } /* ADD IY,DE */
-OP(fd,1a) { illegal_1(z80); op_1a(z80); } /* DB FD */
-OP(fd,1b) { illegal_1(z80); op_1b(z80); } /* DB FD */
-OP(fd,1c) { illegal_1(z80); op_1c(z80); } /* DB FD */
-OP(fd,1d) { illegal_1(z80); op_1d(z80); } /* DB FD */
-OP(fd,1e) { illegal_1(z80); op_1e(z80); } /* DB FD */
-OP(fd,1f) { illegal_1(z80); op_1f(z80); } /* DB FD */
-
-OP(fd,20) { illegal_1(z80); op_20(z80); } /* DB FD */
-OP(fd,21) { z80->IY = ARG16(z80); } /* LD IY,w */
+OP(fd,00) { illegal_1(z80); op_00(z80); } /* DB FD */
+OP(fd,01) { illegal_1(z80); op_01(z80); } /* DB FD */
+OP(fd,02) { illegal_1(z80); op_02(z80); } /* DB FD */
+OP(fd,03) { illegal_1(z80); op_03(z80); } /* DB FD */
+OP(fd,04) { illegal_1(z80); op_04(z80); } /* DB FD */
+OP(fd,05) { illegal_1(z80); op_05(z80); } /* DB FD */
+OP(fd,06) { illegal_1(z80); op_06(z80); } /* DB FD */
+OP(fd,07) { illegal_1(z80); op_07(z80); } /* DB FD */
+
+OP(fd,08) { illegal_1(z80); op_08(z80); } /* DB FD */
+OP(fd,09) { ADD16(z80, iy, bc); } /* ADD IY,BC */
+OP(fd,0a) { illegal_1(z80); op_0a(z80); } /* DB FD */
+OP(fd,0b) { illegal_1(z80); op_0b(z80); } /* DB FD */
+OP(fd,0c) { illegal_1(z80); op_0c(z80); } /* DB FD */
+OP(fd,0d) { illegal_1(z80); op_0d(z80); } /* DB FD */
+OP(fd,0e) { illegal_1(z80); op_0e(z80); } /* DB FD */
+OP(fd,0f) { illegal_1(z80); op_0f(z80); } /* DB FD */
+
+OP(fd,10) { illegal_1(z80); op_10(z80); } /* DB FD */
+OP(fd,11) { illegal_1(z80); op_11(z80); } /* DB FD */
+OP(fd,12) { illegal_1(z80); op_12(z80); } /* DB FD */
+OP(fd,13) { illegal_1(z80); op_13(z80); } /* DB FD */
+OP(fd,14) { illegal_1(z80); op_14(z80); } /* DB FD */
+OP(fd,15) { illegal_1(z80); op_15(z80); } /* DB FD */
+OP(fd,16) { illegal_1(z80); op_16(z80); } /* DB FD */
+OP(fd,17) { illegal_1(z80); op_17(z80); } /* DB FD */
+
+OP(fd,18) { illegal_1(z80); op_18(z80); } /* DB FD */
+OP(fd,19) { ADD16(z80, iy, de); } /* ADD IY,DE */
+OP(fd,1a) { illegal_1(z80); op_1a(z80); } /* DB FD */
+OP(fd,1b) { illegal_1(z80); op_1b(z80); } /* DB FD */
+OP(fd,1c) { illegal_1(z80); op_1c(z80); } /* DB FD */
+OP(fd,1d) { illegal_1(z80); op_1d(z80); } /* DB FD */
+OP(fd,1e) { illegal_1(z80); op_1e(z80); } /* DB FD */
+OP(fd,1f) { illegal_1(z80); op_1f(z80); } /* DB FD */
+
+OP(fd,20) { illegal_1(z80); op_20(z80); } /* DB FD */
+OP(fd,21) { z80->IY = ARG16(z80); } /* LD IY,w */
OP(fd,22) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->iy); z80->WZ = z80->ea+1;} /* LD (w),IY */
-OP(fd,23) { z80->IY++; } /* INC IY */
-OP(fd,24) { z80->HY = INC(z80, z80->HY); } /* INC HY */
-OP(fd,25) { z80->HY = DEC(z80, z80->HY); } /* DEC HY */
-OP(fd,26) { z80->HY = ARG(z80); } /* LD HY,n */
-OP(fd,27) { illegal_1(z80); op_27(z80); } /* DB FD */
-
-OP(fd,28) { illegal_1(z80); op_28(z80); } /* DB FD */
-OP(fd,29) { ADD16(z80, iy, iy); } /* ADD IY,IY */
+OP(fd,23) { z80->IY++; } /* INC IY */
+OP(fd,24) { z80->HY = INC(z80, z80->HY); } /* INC HY */
+OP(fd,25) { z80->HY = DEC(z80, z80->HY); } /* DEC HY */
+OP(fd,26) { z80->HY = ARG(z80); } /* LD HY,n */
+OP(fd,27) { illegal_1(z80); op_27(z80); } /* DB FD */
+
+OP(fd,28) { illegal_1(z80); op_28(z80); } /* DB FD */
+OP(fd,29) { ADD16(z80, iy, iy); } /* ADD IY,IY */
OP(fd,2a) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->iy); z80->WZ = z80->ea+1;} /* LD IY,(w) */
-OP(fd,2b) { z80->IY--; } /* DEC IY */
-OP(fd,2c) { z80->LY = INC(z80, z80->LY); } /* INC LY */
-OP(fd,2d) { z80->LY = DEC(z80, z80->LY); } /* DEC LY */
-OP(fd,2e) { z80->LY = ARG(z80); } /* LD LY,n */
-OP(fd,2f) { illegal_1(z80); op_2f(z80); } /* DB FD */
-
-OP(fd,30) { illegal_1(z80); op_30(z80); } /* DB FD */
-OP(fd,31) { illegal_1(z80); op_31(z80); } /* DB FD */
-OP(fd,32) { illegal_1(z80); op_32(z80); } /* DB FD */
-OP(fd,33) { illegal_1(z80); op_33(z80); } /* DB FD */
-OP(fd,34) { EAY(z80); WM(z80, z80->ea, INC(z80, RM(z80, z80->ea))); } /* INC (IY+o) */
-OP(fd,35) { EAY(z80); WM(z80, z80->ea, DEC(z80, RM(z80, z80->ea))); } /* DEC (IY+o) */
-OP(fd,36) { EAY(z80); WM(z80, z80->ea, ARG(z80)); } /* LD (IY+o),n */
-OP(fd,37) { illegal_1(z80); op_37(z80); } /* DB FD */
-
-OP(fd,38) { illegal_1(z80); op_38(z80); } /* DB FD */
-OP(fd,39) { ADD16(z80, iy, sp); } /* ADD IY,SP */
-OP(fd,3a) { illegal_1(z80); op_3a(z80); } /* DB FD */
-OP(fd,3b) { illegal_1(z80); op_3b(z80); } /* DB FD */
-OP(fd,3c) { illegal_1(z80); op_3c(z80); } /* DB FD */
-OP(fd,3d) { illegal_1(z80); op_3d(z80); } /* DB FD */
-OP(fd,3e) { illegal_1(z80); op_3e(z80); } /* DB FD */
-OP(fd,3f) { illegal_1(z80); op_3f(z80); } /* DB FD */
-
-OP(fd,40) { illegal_1(z80); op_40(z80); } /* DB FD */
-OP(fd,41) { illegal_1(z80); op_41(z80); } /* DB FD */
-OP(fd,42) { illegal_1(z80); op_42(z80); } /* DB FD */
-OP(fd,43) { illegal_1(z80); op_43(z80); } /* DB FD */
-OP(fd,44) { z80->B = z80->HY; } /* LD B,HY */
-OP(fd,45) { z80->B = z80->LY; } /* LD B,LY */
-OP(fd,46) { EAY(z80); z80->B = RM(z80, z80->ea); } /* LD B,(IY+o) */
-OP(fd,47) { illegal_1(z80); op_47(z80); } /* DB FD */
-
-OP(fd,48) { illegal_1(z80); op_48(z80); } /* DB FD */
-OP(fd,49) { illegal_1(z80); op_49(z80); } /* DB FD */
-OP(fd,4a) { illegal_1(z80); op_4a(z80); } /* DB FD */
-OP(fd,4b) { illegal_1(z80); op_4b(z80); } /* DB FD */
-OP(fd,4c) { z80->C = z80->HY; } /* LD C,HY */
-OP(fd,4d) { z80->C = z80->LY; } /* LD C,LY */
-OP(fd,4e) { EAY(z80); z80->C = RM(z80, z80->ea); } /* LD C,(IY+o) */
-OP(fd,4f) { illegal_1(z80); op_4f(z80); } /* DB FD */
-
-OP(fd,50) { illegal_1(z80); op_50(z80); } /* DB FD */
-OP(fd,51) { illegal_1(z80); op_51(z80); } /* DB FD */
-OP(fd,52) { illegal_1(z80); op_52(z80); } /* DB FD */
-OP(fd,53) { illegal_1(z80); op_53(z80); } /* DB FD */
-OP(fd,54) { z80->D = z80->HY; } /* LD D,HY */
-OP(fd,55) { z80->D = z80->LY; } /* LD D,LY */
-OP(fd,56) { EAY(z80); z80->D = RM(z80, z80->ea); } /* LD D,(IY+o) */
-OP(fd,57) { illegal_1(z80); op_57(z80); } /* DB FD */
-
-OP(fd,58) { illegal_1(z80); op_58(z80); } /* DB FD */
-OP(fd,59) { illegal_1(z80); op_59(z80); } /* DB FD */
-OP(fd,5a) { illegal_1(z80); op_5a(z80); } /* DB FD */
-OP(fd,5b) { illegal_1(z80); op_5b(z80); } /* DB FD */
-OP(fd,5c) { z80->E = z80->HY; } /* LD E,HY */
-OP(fd,5d) { z80->E = z80->LY; } /* LD E,LY */
-OP(fd,5e) { EAY(z80); z80->E = RM(z80, z80->ea); } /* LD E,(IY+o) */
-OP(fd,5f) { illegal_1(z80); op_5f(z80); } /* DB FD */
-
-OP(fd,60) { z80->HY = z80->B; } /* LD HY,B */
-OP(fd,61) { z80->HY = z80->C; } /* LD HY,C */
-OP(fd,62) { z80->HY = z80->D; } /* LD HY,D */
-OP(fd,63) { z80->HY = z80->E; } /* LD HY,E */
-OP(fd,64) { } /* LD HY,HY */
-OP(fd,65) { z80->HY = z80->LY; } /* LD HY,LY */
-OP(fd,66) { EAY(z80); z80->H = RM(z80, z80->ea); } /* LD H,(IY+o) */
-OP(fd,67) { z80->HY = z80->A; } /* LD HY,A */
-
-OP(fd,68) { z80->LY = z80->B; } /* LD LY,B */
-OP(fd,69) { z80->LY = z80->C; } /* LD LY,C */
-OP(fd,6a) { z80->LY = z80->D; } /* LD LY,D */
-OP(fd,6b) { z80->LY = z80->E; } /* LD LY,E */
-OP(fd,6c) { z80->LY = z80->HY; } /* LD LY,HY */
-OP(fd,6d) { } /* LD LY,LY */
-OP(fd,6e) { EAY(z80); z80->L = RM(z80, z80->ea); } /* LD L,(IY+o) */
-OP(fd,6f) { z80->LY = z80->A; } /* LD LY,A */
-
-OP(fd,70) { EAY(z80); WM(z80, z80->ea, z80->B); } /* LD (IY+o),B */
-OP(fd,71) { EAY(z80); WM(z80, z80->ea, z80->C); } /* LD (IY+o),C */
-OP(fd,72) { EAY(z80); WM(z80, z80->ea, z80->D); } /* LD (IY+o),D */
-OP(fd,73) { EAY(z80); WM(z80, z80->ea, z80->E); } /* LD (IY+o),E */
-OP(fd,74) { EAY(z80); WM(z80, z80->ea, z80->H); } /* LD (IY+o),H */
-OP(fd,75) { EAY(z80); WM(z80, z80->ea, z80->L); } /* LD (IY+o),L */
-OP(fd,76) { illegal_1(z80); op_76(z80); } /* DB FD */
-OP(fd,77) { EAY(z80); WM(z80, z80->ea, z80->A); } /* LD (IY+o),A */
-
-OP(fd,78) { illegal_1(z80); op_78(z80); } /* DB FD */
-OP(fd,79) { illegal_1(z80); op_79(z80); } /* DB FD */
-OP(fd,7a) { illegal_1(z80); op_7a(z80); } /* DB FD */
-OP(fd,7b) { illegal_1(z80); op_7b(z80); } /* DB FD */
-OP(fd,7c) { z80->A = z80->HY; } /* LD A,HY */
-OP(fd,7d) { z80->A = z80->LY; } /* LD A,LY */
-OP(fd,7e) { EAY(z80); z80->A = RM(z80, z80->ea); } /* LD A,(IY+o) */
-OP(fd,7f) { illegal_1(z80); op_7f(z80); } /* DB FD */
-
-OP(fd,80) { illegal_1(z80); op_80(z80); } /* DB FD */
-OP(fd,81) { illegal_1(z80); op_81(z80); } /* DB FD */
-OP(fd,82) { illegal_1(z80); op_82(z80); } /* DB FD */
-OP(fd,83) { illegal_1(z80); op_83(z80); } /* DB FD */
-OP(fd,84) { ADD(z80, z80->HY); } /* ADD A,HY */
-OP(fd,85) { ADD(z80, z80->LY); } /* ADD A,LY */
-OP(fd,86) { EAY(z80); ADD(z80, RM(z80, z80->ea)); } /* ADD A,(IY+o) */
-OP(fd,87) { illegal_1(z80); op_87(z80); } /* DB FD */
-
-OP(fd,88) { illegal_1(z80); op_88(z80); } /* DB FD */
-OP(fd,89) { illegal_1(z80); op_89(z80); } /* DB FD */
-OP(fd,8a) { illegal_1(z80); op_8a(z80); } /* DB FD */
-OP(fd,8b) { illegal_1(z80); op_8b(z80); } /* DB FD */
-OP(fd,8c) { ADC(z80, z80->HY); } /* ADC A,HY */
-OP(fd,8d) { ADC(z80, z80->LY); } /* ADC A,LY */
-OP(fd,8e) { EAY(z80); ADC(z80, RM(z80, z80->ea)); } /* ADC A,(IY+o) */
-OP(fd,8f) { illegal_1(z80); op_8f(z80); } /* DB FD */
-
-OP(fd,90) { illegal_1(z80); op_90(z80); } /* DB FD */
-OP(fd,91) { illegal_1(z80); op_91(z80); } /* DB FD */
-OP(fd,92) { illegal_1(z80); op_92(z80); } /* DB FD */
-OP(fd,93) { illegal_1(z80); op_93(z80); } /* DB FD */
-OP(fd,94) { SUB(z80, z80->HY); } /* SUB HY */
-OP(fd,95) { SUB(z80, z80->LY); } /* SUB LY */
-OP(fd,96) { EAY(z80); SUB(z80, RM(z80, z80->ea)); } /* SUB (IY+o) */
-OP(fd,97) { illegal_1(z80); op_97(z80); } /* DB FD */
-
-OP(fd,98) { illegal_1(z80); op_98(z80); } /* DB FD */
-OP(fd,99) { illegal_1(z80); op_99(z80); } /* DB FD */
-OP(fd,9a) { illegal_1(z80); op_9a(z80); } /* DB FD */
-OP(fd,9b) { illegal_1(z80); op_9b(z80); } /* DB FD */
-OP(fd,9c) { SBC(z80, z80->HY); } /* SBC A,HY */
-OP(fd,9d) { SBC(z80, z80->LY); } /* SBC A,LY */
-OP(fd,9e) { EAY(z80); SBC(z80, RM(z80, z80->ea)); } /* SBC A,(IY+o) */
-OP(fd,9f) { illegal_1(z80); op_9f(z80); } /* DB FD */
-
-OP(fd,a0) { illegal_1(z80); op_a0(z80); } /* DB FD */
-OP(fd,a1) { illegal_1(z80); op_a1(z80); } /* DB FD */
-OP(fd,a2) { illegal_1(z80); op_a2(z80); } /* DB FD */
-OP(fd,a3) { illegal_1(z80); op_a3(z80); } /* DB FD */
-OP(fd,a4) { AND(z80, z80->HY); } /* AND HY */
-OP(fd,a5) { AND(z80, z80->LY); } /* AND LY */
-OP(fd,a6) { EAY(z80); AND(z80, RM(z80, z80->ea)); } /* AND (IY+o) */
-OP(fd,a7) { illegal_1(z80); op_a7(z80); } /* DB FD */
-
-OP(fd,a8) { illegal_1(z80); op_a8(z80); } /* DB FD */
-OP(fd,a9) { illegal_1(z80); op_a9(z80); } /* DB FD */
-OP(fd,aa) { illegal_1(z80); op_aa(z80); } /* DB FD */
-OP(fd,ab) { illegal_1(z80); op_ab(z80); } /* DB FD */
-OP(fd,ac) { XOR(z80, z80->HY); } /* XOR HY */
-OP(fd,ad) { XOR(z80, z80->LY); } /* XOR LY */
-OP(fd,ae) { EAY(z80); XOR(z80, RM(z80, z80->ea)); } /* XOR (IY+o) */
-OP(fd,af) { illegal_1(z80); op_af(z80); } /* DB FD */
-
-OP(fd,b0) { illegal_1(z80); op_b0(z80); } /* DB FD */
-OP(fd,b1) { illegal_1(z80); op_b1(z80); } /* DB FD */
-OP(fd,b2) { illegal_1(z80); op_b2(z80); } /* DB FD */
-OP(fd,b3) { illegal_1(z80); op_b3(z80); } /* DB FD */
-OP(fd,b4) { OR(z80, z80->HY); } /* OR HY */
-OP(fd,b5) { OR(z80, z80->LY); } /* OR LY */
-OP(fd,b6) { EAY(z80); OR(z80, RM(z80, z80->ea)); } /* OR (IY+o) */
-OP(fd,b7) { illegal_1(z80); op_b7(z80); } /* DB FD */
-
-OP(fd,b8) { illegal_1(z80); op_b8(z80); } /* DB FD */
-OP(fd,b9) { illegal_1(z80); op_b9(z80); } /* DB FD */
-OP(fd,ba) { illegal_1(z80); op_ba(z80); } /* DB FD */
-OP(fd,bb) { illegal_1(z80); op_bb(z80); } /* DB FD */
-OP(fd,bc) { CP(z80, z80->HY); } /* CP HY */
-OP(fd,bd) { CP(z80, z80->LY); } /* CP LY */
-OP(fd,be) { EAY(z80); CP(z80, RM(z80, z80->ea)); } /* CP (IY+o) */
-OP(fd,bf) { illegal_1(z80); op_bf(z80); } /* DB FD */
-
-OP(fd,c0) { illegal_1(z80); op_c0(z80); } /* DB FD */
-OP(fd,c1) { illegal_1(z80); op_c1(z80); } /* DB FD */
-OP(fd,c2) { illegal_1(z80); op_c2(z80); } /* DB FD */
-OP(fd,c3) { illegal_1(z80); op_c3(z80); } /* DB FD */
-OP(fd,c4) { illegal_1(z80); op_c4(z80); } /* DB FD */
-OP(fd,c5) { illegal_1(z80); op_c5(z80); } /* DB FD */
-OP(fd,c6) { illegal_1(z80); op_c6(z80); } /* DB FD */
-OP(fd,c7) { illegal_1(z80); op_c7(z80); } /* DB FD */
-
-OP(fd,c8) { illegal_1(z80); op_c8(z80); } /* DB FD */
-OP(fd,c9) { illegal_1(z80); op_c9(z80); } /* DB FD */
-OP(fd,ca) { illegal_1(z80); op_ca(z80); } /* DB FD */
-OP(fd,cb) { EAY(z80); EXEC(z80,xycb,ARG(z80)); } /* ** FD CB xx */
-OP(fd,cc) { illegal_1(z80); op_cc(z80); } /* DB FD */
-OP(fd,cd) { illegal_1(z80); op_cd(z80); } /* DB FD */
-OP(fd,ce) { illegal_1(z80); op_ce(z80); } /* DB FD */
-OP(fd,cf) { illegal_1(z80); op_cf(z80); } /* DB FD */
-
-OP(fd,d0) { illegal_1(z80); op_d0(z80); } /* DB FD */
-OP(fd,d1) { illegal_1(z80); op_d1(z80); } /* DB FD */
-OP(fd,d2) { illegal_1(z80); op_d2(z80); } /* DB FD */
-OP(fd,d3) { illegal_1(z80); op_d3(z80); } /* DB FD */
-OP(fd,d4) { illegal_1(z80); op_d4(z80); } /* DB FD */
-OP(fd,d5) { illegal_1(z80); op_d5(z80); } /* DB FD */
-OP(fd,d6) { illegal_1(z80); op_d6(z80); } /* DB FD */
-OP(fd,d7) { illegal_1(z80); op_d7(z80); } /* DB FD */
-
-OP(fd,d8) { illegal_1(z80); op_d8(z80); } /* DB FD */
-OP(fd,d9) { illegal_1(z80); op_d9(z80); } /* DB FD */
-OP(fd,da) { illegal_1(z80); op_da(z80); } /* DB FD */
-OP(fd,db) { illegal_1(z80); op_db(z80); } /* DB FD */
-OP(fd,dc) { illegal_1(z80); op_dc(z80); } /* DB FD */
-OP(fd,dd) { illegal_1(z80); op_dd(z80); } /* DB FD */
-OP(fd,de) { illegal_1(z80); op_de(z80); } /* DB FD */
-OP(fd,df) { illegal_1(z80); op_df(z80); } /* DB FD */
-
-OP(fd,e0) { illegal_1(z80); op_e0(z80); } /* DB FD */
-OP(fd,e1) { POP(z80, iy); } /* POP IY */
-OP(fd,e2) { illegal_1(z80); op_e2(z80); } /* DB FD */
-OP(fd,e3) { EXSP(z80, iy); } /* EX (SP),IY */
-OP(fd,e4) { illegal_1(z80); op_e4(z80); } /* DB FD */
-OP(fd,e5) { PUSH(z80, iy); } /* PUSH IY */
-OP(fd,e6) { illegal_1(z80); op_e6(z80); } /* DB FD */
-OP(fd,e7) { illegal_1(z80); op_e7(z80); } /* DB FD */
-
-OP(fd,e8) { illegal_1(z80); op_e8(z80); } /* DB FD */
-OP(fd,e9) { z80->PC = z80->IY; } /* JP (IY) */
-OP(fd,ea) { illegal_1(z80); op_ea(z80); } /* DB FD */
-OP(fd,eb) { illegal_1(z80); op_eb(z80); } /* DB FD */
-OP(fd,ec) { illegal_1(z80); op_ec(z80); } /* DB FD */
-OP(fd,ed) { illegal_1(z80); op_ed(z80); } /* DB FD */
-OP(fd,ee) { illegal_1(z80); op_ee(z80); } /* DB FD */
-OP(fd,ef) { illegal_1(z80); op_ef(z80); } /* DB FD */
-
-OP(fd,f0) { illegal_1(z80); op_f0(z80); } /* DB FD */
-OP(fd,f1) { illegal_1(z80); op_f1(z80); } /* DB FD */
-OP(fd,f2) { illegal_1(z80); op_f2(z80); } /* DB FD */
-OP(fd,f3) { illegal_1(z80); op_f3(z80); } /* DB FD */
-OP(fd,f4) { illegal_1(z80); op_f4(z80); } /* DB FD */
-OP(fd,f5) { illegal_1(z80); op_f5(z80); } /* DB FD */
-OP(fd,f6) { illegal_1(z80); op_f6(z80); } /* DB FD */
-OP(fd,f7) { illegal_1(z80); op_f7(z80); } /* DB FD */
-
-OP(fd,f8) { illegal_1(z80); op_f8(z80); } /* DB FD */
-OP(fd,f9) { z80->SP = z80->IY; } /* LD SP,IY */
-OP(fd,fa) { illegal_1(z80); op_fa(z80); } /* DB FD */
-OP(fd,fb) { illegal_1(z80); op_fb(z80); } /* DB FD */
-OP(fd,fc) { illegal_1(z80); op_fc(z80); } /* DB FD */
-OP(fd,fd) { illegal_1(z80); op_fd(z80); } /* DB FD */
-OP(fd,fe) { illegal_1(z80); op_fe(z80); } /* DB FD */
-OP(fd,ff) { illegal_1(z80); op_ff(z80); } /* DB FD */
+OP(fd,2b) { z80->IY--; } /* DEC IY */
+OP(fd,2c) { z80->LY = INC(z80, z80->LY); } /* INC LY */
+OP(fd,2d) { z80->LY = DEC(z80, z80->LY); } /* DEC LY */
+OP(fd,2e) { z80->LY = ARG(z80); } /* LD LY,n */
+OP(fd,2f) { illegal_1(z80); op_2f(z80); } /* DB FD */
+
+OP(fd,30) { illegal_1(z80); op_30(z80); } /* DB FD */
+OP(fd,31) { illegal_1(z80); op_31(z80); } /* DB FD */
+OP(fd,32) { illegal_1(z80); op_32(z80); } /* DB FD */
+OP(fd,33) { illegal_1(z80); op_33(z80); } /* DB FD */
+OP(fd,34) { EAY(z80); WM(z80, z80->ea, INC(z80, RM(z80, z80->ea))); } /* INC (IY+o) */
+OP(fd,35) { EAY(z80); WM(z80, z80->ea, DEC(z80, RM(z80, z80->ea))); } /* DEC (IY+o) */
+OP(fd,36) { EAY(z80); WM(z80, z80->ea, ARG(z80)); } /* LD (IY+o),n */
+OP(fd,37) { illegal_1(z80); op_37(z80); } /* DB FD */
+
+OP(fd,38) { illegal_1(z80); op_38(z80); } /* DB FD */
+OP(fd,39) { ADD16(z80, iy, sp); } /* ADD IY,SP */
+OP(fd,3a) { illegal_1(z80); op_3a(z80); } /* DB FD */
+OP(fd,3b) { illegal_1(z80); op_3b(z80); } /* DB FD */
+OP(fd,3c) { illegal_1(z80); op_3c(z80); } /* DB FD */
+OP(fd,3d) { illegal_1(z80); op_3d(z80); } /* DB FD */
+OP(fd,3e) { illegal_1(z80); op_3e(z80); } /* DB FD */
+OP(fd,3f) { illegal_1(z80); op_3f(z80); } /* DB FD */
+
+OP(fd,40) { illegal_1(z80); op_40(z80); } /* DB FD */
+OP(fd,41) { illegal_1(z80); op_41(z80); } /* DB FD */
+OP(fd,42) { illegal_1(z80); op_42(z80); } /* DB FD */
+OP(fd,43) { illegal_1(z80); op_43(z80); } /* DB FD */
+OP(fd,44) { z80->B = z80->HY; } /* LD B,HY */
+OP(fd,45) { z80->B = z80->LY; } /* LD B,LY */
+OP(fd,46) { EAY(z80); z80->B = RM(z80, z80->ea); } /* LD B,(IY+o) */
+OP(fd,47) { illegal_1(z80); op_47(z80); } /* DB FD */
+
+OP(fd,48) { illegal_1(z80); op_48(z80); } /* DB FD */
+OP(fd,49) { illegal_1(z80); op_49(z80); } /* DB FD */
+OP(fd,4a) { illegal_1(z80); op_4a(z80); } /* DB FD */
+OP(fd,4b) { illegal_1(z80); op_4b(z80); } /* DB FD */
+OP(fd,4c) { z80->C = z80->HY; } /* LD C,HY */
+OP(fd,4d) { z80->C = z80->LY; } /* LD C,LY */
+OP(fd,4e) { EAY(z80); z80->C = RM(z80, z80->ea); } /* LD C,(IY+o) */
+OP(fd,4f) { illegal_1(z80); op_4f(z80); } /* DB FD */
+
+OP(fd,50) { illegal_1(z80); op_50(z80); } /* DB FD */
+OP(fd,51) { illegal_1(z80); op_51(z80); } /* DB FD */
+OP(fd,52) { illegal_1(z80); op_52(z80); } /* DB FD */
+OP(fd,53) { illegal_1(z80); op_53(z80); } /* DB FD */
+OP(fd,54) { z80->D = z80->HY; } /* LD D,HY */
+OP(fd,55) { z80->D = z80->LY; } /* LD D,LY */
+OP(fd,56) { EAY(z80); z80->D = RM(z80, z80->ea); } /* LD D,(IY+o) */
+OP(fd,57) { illegal_1(z80); op_57(z80); } /* DB FD */
+
+OP(fd,58) { illegal_1(z80); op_58(z80); } /* DB FD */
+OP(fd,59) { illegal_1(z80); op_59(z80); } /* DB FD */
+OP(fd,5a) { illegal_1(z80); op_5a(z80); } /* DB FD */
+OP(fd,5b) { illegal_1(z80); op_5b(z80); } /* DB FD */
+OP(fd,5c) { z80->E = z80->HY; } /* LD E,HY */
+OP(fd,5d) { z80->E = z80->LY; } /* LD E,LY */
+OP(fd,5e) { EAY(z80); z80->E = RM(z80, z80->ea); } /* LD E,(IY+o) */
+OP(fd,5f) { illegal_1(z80); op_5f(z80); } /* DB FD */
+
+OP(fd,60) { z80->HY = z80->B; } /* LD HY,B */
+OP(fd,61) { z80->HY = z80->C; } /* LD HY,C */
+OP(fd,62) { z80->HY = z80->D; } /* LD HY,D */
+OP(fd,63) { z80->HY = z80->E; } /* LD HY,E */
+OP(fd,64) { } /* LD HY,HY */
+OP(fd,65) { z80->HY = z80->LY; } /* LD HY,LY */
+OP(fd,66) { EAY(z80); z80->H = RM(z80, z80->ea); } /* LD H,(IY+o) */
+OP(fd,67) { z80->HY = z80->A; } /* LD HY,A */
+
+OP(fd,68) { z80->LY = z80->B; } /* LD LY,B */
+OP(fd,69) { z80->LY = z80->C; } /* LD LY,C */
+OP(fd,6a) { z80->LY = z80->D; } /* LD LY,D */
+OP(fd,6b) { z80->LY = z80->E; } /* LD LY,E */
+OP(fd,6c) { z80->LY = z80->HY; } /* LD LY,HY */
+OP(fd,6d) { } /* LD LY,LY */
+OP(fd,6e) { EAY(z80); z80->L = RM(z80, z80->ea); } /* LD L,(IY+o) */
+OP(fd,6f) { z80->LY = z80->A; } /* LD LY,A */
+
+OP(fd,70) { EAY(z80); WM(z80, z80->ea, z80->B); } /* LD (IY+o),B */
+OP(fd,71) { EAY(z80); WM(z80, z80->ea, z80->C); } /* LD (IY+o),C */
+OP(fd,72) { EAY(z80); WM(z80, z80->ea, z80->D); } /* LD (IY+o),D */
+OP(fd,73) { EAY(z80); WM(z80, z80->ea, z80->E); } /* LD (IY+o),E */
+OP(fd,74) { EAY(z80); WM(z80, z80->ea, z80->H); } /* LD (IY+o),H */
+OP(fd,75) { EAY(z80); WM(z80, z80->ea, z80->L); } /* LD (IY+o),L */
+OP(fd,76) { illegal_1(z80); op_76(z80); } /* DB FD */
+OP(fd,77) { EAY(z80); WM(z80, z80->ea, z80->A); } /* LD (IY+o),A */
+
+OP(fd,78) { illegal_1(z80); op_78(z80); } /* DB FD */
+OP(fd,79) { illegal_1(z80); op_79(z80); } /* DB FD */
+OP(fd,7a) { illegal_1(z80); op_7a(z80); } /* DB FD */
+OP(fd,7b) { illegal_1(z80); op_7b(z80); } /* DB FD */
+OP(fd,7c) { z80->A = z80->HY; } /* LD A,HY */
+OP(fd,7d) { z80->A = z80->LY; } /* LD A,LY */
+OP(fd,7e) { EAY(z80); z80->A = RM(z80, z80->ea); } /* LD A,(IY+o) */
+OP(fd,7f) { illegal_1(z80); op_7f(z80); } /* DB FD */
+
+OP(fd,80) { illegal_1(z80); op_80(z80); } /* DB FD */
+OP(fd,81) { illegal_1(z80); op_81(z80); } /* DB FD */
+OP(fd,82) { illegal_1(z80); op_82(z80); } /* DB FD */
+OP(fd,83) { illegal_1(z80); op_83(z80); } /* DB FD */
+OP(fd,84) { ADD(z80, z80->HY); } /* ADD A,HY */
+OP(fd,85) { ADD(z80, z80->LY); } /* ADD A,LY */
+OP(fd,86) { EAY(z80); ADD(z80, RM(z80, z80->ea)); } /* ADD A,(IY+o) */
+OP(fd,87) { illegal_1(z80); op_87(z80); } /* DB FD */
+
+OP(fd,88) { illegal_1(z80); op_88(z80); } /* DB FD */
+OP(fd,89) { illegal_1(z80); op_89(z80); } /* DB FD */
+OP(fd,8a) { illegal_1(z80); op_8a(z80); } /* DB FD */
+OP(fd,8b) { illegal_1(z80); op_8b(z80); } /* DB FD */
+OP(fd,8c) { ADC(z80, z80->HY); } /* ADC A,HY */
+OP(fd,8d) { ADC(z80, z80->LY); } /* ADC A,LY */
+OP(fd,8e) { EAY(z80); ADC(z80, RM(z80, z80->ea)); } /* ADC A,(IY+o) */
+OP(fd,8f) { illegal_1(z80); op_8f(z80); } /* DB FD */
+
+OP(fd,90) { illegal_1(z80); op_90(z80); } /* DB FD */
+OP(fd,91) { illegal_1(z80); op_91(z80); } /* DB FD */
+OP(fd,92) { illegal_1(z80); op_92(z80); } /* DB FD */
+OP(fd,93) { illegal_1(z80); op_93(z80); } /* DB FD */
+OP(fd,94) { SUB(z80, z80->HY); } /* SUB HY */
+OP(fd,95) { SUB(z80, z80->LY); } /* SUB LY */
+OP(fd,96) { EAY(z80); SUB(z80, RM(z80, z80->ea)); } /* SUB (IY+o) */
+OP(fd,97) { illegal_1(z80); op_97(z80); } /* DB FD */
+
+OP(fd,98) { illegal_1(z80); op_98(z80); } /* DB FD */
+OP(fd,99) { illegal_1(z80); op_99(z80); } /* DB FD */
+OP(fd,9a) { illegal_1(z80); op_9a(z80); } /* DB FD */
+OP(fd,9b) { illegal_1(z80); op_9b(z80); } /* DB FD */
+OP(fd,9c) { SBC(z80, z80->HY); } /* SBC A,HY */
+OP(fd,9d) { SBC(z80, z80->LY); } /* SBC A,LY */
+OP(fd,9e) { EAY(z80); SBC(z80, RM(z80, z80->ea)); } /* SBC A,(IY+o) */
+OP(fd,9f) { illegal_1(z80); op_9f(z80); } /* DB FD */
+
+OP(fd,a0) { illegal_1(z80); op_a0(z80); } /* DB FD */
+OP(fd,a1) { illegal_1(z80); op_a1(z80); } /* DB FD */
+OP(fd,a2) { illegal_1(z80); op_a2(z80); } /* DB FD */
+OP(fd,a3) { illegal_1(z80); op_a3(z80); } /* DB FD */
+OP(fd,a4) { AND(z80, z80->HY); } /* AND HY */
+OP(fd,a5) { AND(z80, z80->LY); } /* AND LY */
+OP(fd,a6) { EAY(z80); AND(z80, RM(z80, z80->ea)); } /* AND (IY+o) */
+OP(fd,a7) { illegal_1(z80); op_a7(z80); } /* DB FD */
+
+OP(fd,a8) { illegal_1(z80); op_a8(z80); } /* DB FD */
+OP(fd,a9) { illegal_1(z80); op_a9(z80); } /* DB FD */
+OP(fd,aa) { illegal_1(z80); op_aa(z80); } /* DB FD */
+OP(fd,ab) { illegal_1(z80); op_ab(z80); } /* DB FD */
+OP(fd,ac) { XOR(z80, z80->HY); } /* XOR HY */
+OP(fd,ad) { XOR(z80, z80->LY); } /* XOR LY */
+OP(fd,ae) { EAY(z80); XOR(z80, RM(z80, z80->ea)); } /* XOR (IY+o) */
+OP(fd,af) { illegal_1(z80); op_af(z80); } /* DB FD */
+
+OP(fd,b0) { illegal_1(z80); op_b0(z80); } /* DB FD */
+OP(fd,b1) { illegal_1(z80); op_b1(z80); } /* DB FD */
+OP(fd,b2) { illegal_1(z80); op_b2(z80); } /* DB FD */
+OP(fd,b3) { illegal_1(z80); op_b3(z80); } /* DB FD */
+OP(fd,b4) { OR(z80, z80->HY); } /* OR HY */
+OP(fd,b5) { OR(z80, z80->LY); } /* OR LY */
+OP(fd,b6) { EAY(z80); OR(z80, RM(z80, z80->ea)); } /* OR (IY+o) */
+OP(fd,b7) { illegal_1(z80); op_b7(z80); } /* DB FD */
+
+OP(fd,b8) { illegal_1(z80); op_b8(z80); } /* DB FD */
+OP(fd,b9) { illegal_1(z80); op_b9(z80); } /* DB FD */
+OP(fd,ba) { illegal_1(z80); op_ba(z80); } /* DB FD */
+OP(fd,bb) { illegal_1(z80); op_bb(z80); } /* DB FD */
+OP(fd,bc) { CP(z80, z80->HY); } /* CP HY */
+OP(fd,bd) { CP(z80, z80->LY); } /* CP LY */
+OP(fd,be) { EAY(z80); CP(z80, RM(z80, z80->ea)); } /* CP (IY+o) */
+OP(fd,bf) { illegal_1(z80); op_bf(z80); } /* DB FD */
+
+OP(fd,c0) { illegal_1(z80); op_c0(z80); } /* DB FD */
+OP(fd,c1) { illegal_1(z80); op_c1(z80); } /* DB FD */
+OP(fd,c2) { illegal_1(z80); op_c2(z80); } /* DB FD */
+OP(fd,c3) { illegal_1(z80); op_c3(z80); } /* DB FD */
+OP(fd,c4) { illegal_1(z80); op_c4(z80); } /* DB FD */
+OP(fd,c5) { illegal_1(z80); op_c5(z80); } /* DB FD */
+OP(fd,c6) { illegal_1(z80); op_c6(z80); } /* DB FD */
+OP(fd,c7) { illegal_1(z80); op_c7(z80); } /* DB FD */
+
+OP(fd,c8) { illegal_1(z80); op_c8(z80); } /* DB FD */
+OP(fd,c9) { illegal_1(z80); op_c9(z80); } /* DB FD */
+OP(fd,ca) { illegal_1(z80); op_ca(z80); } /* DB FD */
+OP(fd,cb) { EAY(z80); EXEC(z80,xycb,ARG(z80)); } /* ** FD CB xx */
+OP(fd,cc) { illegal_1(z80); op_cc(z80); } /* DB FD */
+OP(fd,cd) { illegal_1(z80); op_cd(z80); } /* DB FD */
+OP(fd,ce) { illegal_1(z80); op_ce(z80); } /* DB FD */
+OP(fd,cf) { illegal_1(z80); op_cf(z80); } /* DB FD */
+
+OP(fd,d0) { illegal_1(z80); op_d0(z80); } /* DB FD */
+OP(fd,d1) { illegal_1(z80); op_d1(z80); } /* DB FD */
+OP(fd,d2) { illegal_1(z80); op_d2(z80); } /* DB FD */
+OP(fd,d3) { illegal_1(z80); op_d3(z80); } /* DB FD */
+OP(fd,d4) { illegal_1(z80); op_d4(z80); } /* DB FD */
+OP(fd,d5) { illegal_1(z80); op_d5(z80); } /* DB FD */
+OP(fd,d6) { illegal_1(z80); op_d6(z80); } /* DB FD */
+OP(fd,d7) { illegal_1(z80); op_d7(z80); } /* DB FD */
+
+OP(fd,d8) { illegal_1(z80); op_d8(z80); } /* DB FD */
+OP(fd,d9) { illegal_1(z80); op_d9(z80); } /* DB FD */
+OP(fd,da) { illegal_1(z80); op_da(z80); } /* DB FD */
+OP(fd,db) { illegal_1(z80); op_db(z80); } /* DB FD */
+OP(fd,dc) { illegal_1(z80); op_dc(z80); } /* DB FD */
+OP(fd,dd) { illegal_1(z80); op_dd(z80); } /* DB FD */
+OP(fd,de) { illegal_1(z80); op_de(z80); } /* DB FD */
+OP(fd,df) { illegal_1(z80); op_df(z80); } /* DB FD */
+
+OP(fd,e0) { illegal_1(z80); op_e0(z80); } /* DB FD */
+OP(fd,e1) { POP(z80, iy); } /* POP IY */
+OP(fd,e2) { illegal_1(z80); op_e2(z80); } /* DB FD */
+OP(fd,e3) { EXSP(z80, iy); } /* EX (SP),IY */
+OP(fd,e4) { illegal_1(z80); op_e4(z80); } /* DB FD */
+OP(fd,e5) { PUSH(z80, iy); } /* PUSH IY */
+OP(fd,e6) { illegal_1(z80); op_e6(z80); } /* DB FD */
+OP(fd,e7) { illegal_1(z80); op_e7(z80); } /* DB FD */
+
+OP(fd,e8) { illegal_1(z80); op_e8(z80); } /* DB FD */
+OP(fd,e9) { z80->PC = z80->IY; } /* JP (IY) */
+OP(fd,ea) { illegal_1(z80); op_ea(z80); } /* DB FD */
+OP(fd,eb) { illegal_1(z80); op_eb(z80); } /* DB FD */
+OP(fd,ec) { illegal_1(z80); op_ec(z80); } /* DB FD */
+OP(fd,ed) { illegal_1(z80); op_ed(z80); } /* DB FD */
+OP(fd,ee) { illegal_1(z80); op_ee(z80); } /* DB FD */
+OP(fd,ef) { illegal_1(z80); op_ef(z80); } /* DB FD */
+
+OP(fd,f0) { illegal_1(z80); op_f0(z80); } /* DB FD */
+OP(fd,f1) { illegal_1(z80); op_f1(z80); } /* DB FD */
+OP(fd,f2) { illegal_1(z80); op_f2(z80); } /* DB FD */
+OP(fd,f3) { illegal_1(z80); op_f3(z80); } /* DB FD */
+OP(fd,f4) { illegal_1(z80); op_f4(z80); } /* DB FD */
+OP(fd,f5) { illegal_1(z80); op_f5(z80); } /* DB FD */
+OP(fd,f6) { illegal_1(z80); op_f6(z80); } /* DB FD */
+OP(fd,f7) { illegal_1(z80); op_f7(z80); } /* DB FD */
+
+OP(fd,f8) { illegal_1(z80); op_f8(z80); } /* DB FD */
+OP(fd,f9) { z80->SP = z80->IY; } /* LD SP,IY */
+OP(fd,fa) { illegal_1(z80); op_fa(z80); } /* DB FD */
+OP(fd,fb) { illegal_1(z80); op_fb(z80); } /* DB FD */
+OP(fd,fc) { illegal_1(z80); op_fc(z80); } /* DB FD */
+OP(fd,fd) { illegal_1(z80); op_fd(z80); } /* DB FD */
+OP(fd,fe) { illegal_1(z80); op_fe(z80); } /* DB FD */
+OP(fd,ff) { illegal_1(z80); op_ff(z80); } /* DB FD */
OP(illegal,2)
{
@@ -2631,585 +2631,585 @@ OP(illegal,2)
/**********************************************************
* special opcodes (ED prefix)
**********************************************************/
-OP(ed,00) { illegal_2(z80); } /* DB ED */
-OP(ed,01) { illegal_2(z80); } /* DB ED */
-OP(ed,02) { illegal_2(z80); } /* DB ED */
-OP(ed,03) { illegal_2(z80); } /* DB ED */
-OP(ed,04) { illegal_2(z80); } /* DB ED */
-OP(ed,05) { illegal_2(z80); } /* DB ED */
-OP(ed,06) { illegal_2(z80); } /* DB ED */
-OP(ed,07) { illegal_2(z80); } /* DB ED */
-
-OP(ed,08) { illegal_2(z80); } /* DB ED */
-OP(ed,09) { illegal_2(z80); } /* DB ED */
-OP(ed,0a) { illegal_2(z80); } /* DB ED */
-OP(ed,0b) { illegal_2(z80); } /* DB ED */
-OP(ed,0c) { illegal_2(z80); } /* DB ED */
-OP(ed,0d) { illegal_2(z80); } /* DB ED */
-OP(ed,0e) { illegal_2(z80); } /* DB ED */
-OP(ed,0f) { illegal_2(z80); } /* DB ED */
-
-OP(ed,10) { illegal_2(z80); } /* DB ED */
-OP(ed,11) { illegal_2(z80); } /* DB ED */
-OP(ed,12) { illegal_2(z80); } /* DB ED */
-OP(ed,13) { illegal_2(z80); } /* DB ED */
-OP(ed,14) { illegal_2(z80); } /* DB ED */
-OP(ed,15) { illegal_2(z80); } /* DB ED */
-OP(ed,16) { illegal_2(z80); } /* DB ED */
-OP(ed,17) { illegal_2(z80); } /* DB ED */
-
-OP(ed,18) { illegal_2(z80); } /* DB ED */
-OP(ed,19) { illegal_2(z80); } /* DB ED */
-OP(ed,1a) { illegal_2(z80); } /* DB ED */
-OP(ed,1b) { illegal_2(z80); } /* DB ED */
-OP(ed,1c) { illegal_2(z80); } /* DB ED */
-OP(ed,1d) { illegal_2(z80); } /* DB ED */
-OP(ed,1e) { illegal_2(z80); } /* DB ED */
-OP(ed,1f) { illegal_2(z80); } /* DB ED */
-
-OP(ed,20) { illegal_2(z80); } /* DB ED */
-OP(ed,21) { illegal_2(z80); } /* DB ED */
-OP(ed,22) { illegal_2(z80); } /* DB ED */
-OP(ed,23) { illegal_2(z80); } /* DB ED */
-OP(ed,24) { illegal_2(z80); } /* DB ED */
-OP(ed,25) { illegal_2(z80); } /* DB ED */
-OP(ed,26) { illegal_2(z80); } /* DB ED */
-OP(ed,27) { illegal_2(z80); } /* DB ED */
-
-OP(ed,28) { illegal_2(z80); } /* DB ED */
-OP(ed,29) { illegal_2(z80); } /* DB ED */
-OP(ed,2a) { illegal_2(z80); } /* DB ED */
-OP(ed,2b) { illegal_2(z80); } /* DB ED */
-OP(ed,2c) { illegal_2(z80); } /* DB ED */
-OP(ed,2d) { illegal_2(z80); } /* DB ED */
-OP(ed,2e) { illegal_2(z80); } /* DB ED */
-OP(ed,2f) { illegal_2(z80); } /* DB ED */
-
-OP(ed,30) { illegal_2(z80); } /* DB ED */
-OP(ed,31) { illegal_2(z80); } /* DB ED */
-OP(ed,32) { illegal_2(z80); } /* DB ED */
-OP(ed,33) { illegal_2(z80); } /* DB ED */
-OP(ed,34) { illegal_2(z80); } /* DB ED */
-OP(ed,35) { illegal_2(z80); } /* DB ED */
-OP(ed,36) { illegal_2(z80); } /* DB ED */
-OP(ed,37) { illegal_2(z80); } /* DB ED */
-
-OP(ed,38) { illegal_2(z80); } /* DB ED */
-OP(ed,39) { illegal_2(z80); } /* DB ED */
-OP(ed,3a) { illegal_2(z80); } /* DB ED */
-OP(ed,3b) { illegal_2(z80); } /* DB ED */
-OP(ed,3c) { illegal_2(z80); } /* DB ED */
-OP(ed,3d) { illegal_2(z80); } /* DB ED */
-OP(ed,3e) { illegal_2(z80); } /* DB ED */
-OP(ed,3f) { illegal_2(z80); } /* DB ED */
-
-OP(ed,40) { z80->B = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->B]; } /* IN B,(C) */
-OP(ed,41) { OUT(z80, z80->BC, z80->B); } /* OUT (C),B */
-OP(ed,42) { SBC16(z80, bc); } /* SBC HL,BC */
+OP(ed,00) { illegal_2(z80); } /* DB ED */
+OP(ed,01) { illegal_2(z80); } /* DB ED */
+OP(ed,02) { illegal_2(z80); } /* DB ED */
+OP(ed,03) { illegal_2(z80); } /* DB ED */
+OP(ed,04) { illegal_2(z80); } /* DB ED */
+OP(ed,05) { illegal_2(z80); } /* DB ED */
+OP(ed,06) { illegal_2(z80); } /* DB ED */
+OP(ed,07) { illegal_2(z80); } /* DB ED */
+
+OP(ed,08) { illegal_2(z80); } /* DB ED */
+OP(ed,09) { illegal_2(z80); } /* DB ED */
+OP(ed,0a) { illegal_2(z80); } /* DB ED */
+OP(ed,0b) { illegal_2(z80); } /* DB ED */
+OP(ed,0c) { illegal_2(z80); } /* DB ED */
+OP(ed,0d) { illegal_2(z80); } /* DB ED */
+OP(ed,0e) { illegal_2(z80); } /* DB ED */
+OP(ed,0f) { illegal_2(z80); } /* DB ED */
+
+OP(ed,10) { illegal_2(z80); } /* DB ED */
+OP(ed,11) { illegal_2(z80); } /* DB ED */
+OP(ed,12) { illegal_2(z80); } /* DB ED */
+OP(ed,13) { illegal_2(z80); } /* DB ED */
+OP(ed,14) { illegal_2(z80); } /* DB ED */
+OP(ed,15) { illegal_2(z80); } /* DB ED */
+OP(ed,16) { illegal_2(z80); } /* DB ED */
+OP(ed,17) { illegal_2(z80); } /* DB ED */
+
+OP(ed,18) { illegal_2(z80); } /* DB ED */
+OP(ed,19) { illegal_2(z80); } /* DB ED */
+OP(ed,1a) { illegal_2(z80); } /* DB ED */
+OP(ed,1b) { illegal_2(z80); } /* DB ED */
+OP(ed,1c) { illegal_2(z80); } /* DB ED */
+OP(ed,1d) { illegal_2(z80); } /* DB ED */
+OP(ed,1e) { illegal_2(z80); } /* DB ED */
+OP(ed,1f) { illegal_2(z80); } /* DB ED */
+
+OP(ed,20) { illegal_2(z80); } /* DB ED */
+OP(ed,21) { illegal_2(z80); } /* DB ED */
+OP(ed,22) { illegal_2(z80); } /* DB ED */
+OP(ed,23) { illegal_2(z80); } /* DB ED */
+OP(ed,24) { illegal_2(z80); } /* DB ED */
+OP(ed,25) { illegal_2(z80); } /* DB ED */
+OP(ed,26) { illegal_2(z80); } /* DB ED */
+OP(ed,27) { illegal_2(z80); } /* DB ED */
+
+OP(ed,28) { illegal_2(z80); } /* DB ED */
+OP(ed,29) { illegal_2(z80); } /* DB ED */
+OP(ed,2a) { illegal_2(z80); } /* DB ED */
+OP(ed,2b) { illegal_2(z80); } /* DB ED */
+OP(ed,2c) { illegal_2(z80); } /* DB ED */
+OP(ed,2d) { illegal_2(z80); } /* DB ED */
+OP(ed,2e) { illegal_2(z80); } /* DB ED */
+OP(ed,2f) { illegal_2(z80); } /* DB ED */
+
+OP(ed,30) { illegal_2(z80); } /* DB ED */
+OP(ed,31) { illegal_2(z80); } /* DB ED */
+OP(ed,32) { illegal_2(z80); } /* DB ED */
+OP(ed,33) { illegal_2(z80); } /* DB ED */
+OP(ed,34) { illegal_2(z80); } /* DB ED */
+OP(ed,35) { illegal_2(z80); } /* DB ED */
+OP(ed,36) { illegal_2(z80); } /* DB ED */
+OP(ed,37) { illegal_2(z80); } /* DB ED */
+
+OP(ed,38) { illegal_2(z80); } /* DB ED */
+OP(ed,39) { illegal_2(z80); } /* DB ED */
+OP(ed,3a) { illegal_2(z80); } /* DB ED */
+OP(ed,3b) { illegal_2(z80); } /* DB ED */
+OP(ed,3c) { illegal_2(z80); } /* DB ED */
+OP(ed,3d) { illegal_2(z80); } /* DB ED */
+OP(ed,3e) { illegal_2(z80); } /* DB ED */
+OP(ed,3f) { illegal_2(z80); } /* DB ED */
+
+OP(ed,40) { z80->B = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->B]; } /* IN B,(C) */
+OP(ed,41) { OUT(z80, z80->BC, z80->B); } /* OUT (C),B */
+OP(ed,42) { SBC16(z80, bc); } /* SBC HL,BC */
OP(ed,43) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->bc); z80->WZ = z80->ea+1;} /* LD (w),BC */
-OP(ed,44) { NEG(z80); } /* NEG */
-OP(ed,45) { RETN(z80); } /* RETN */
-OP(ed,46) { z80->im = 0; } /* im 0 */
-OP(ed,47) { LD_I_A(z80); } /* LD i,A */
-
-OP(ed,48) { z80->C = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->C]; } /* IN C,(C) */
-OP(ed,49) { OUT(z80, z80->BC, z80->C); } /* OUT (C),C */
-OP(ed,4a) { ADC16(z80, bc); } /* ADC HL,BC */
+OP(ed,44) { NEG(z80); } /* NEG */
+OP(ed,45) { RETN(z80); } /* RETN */
+OP(ed,46) { z80->im = 0; } /* im 0 */
+OP(ed,47) { LD_I_A(z80); } /* LD i,A */
+
+OP(ed,48) { z80->C = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->C]; } /* IN C,(C) */
+OP(ed,49) { OUT(z80, z80->BC, z80->C); } /* OUT (C),C */
+OP(ed,4a) { ADC16(z80, bc); } /* ADC HL,BC */
OP(ed,4b) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->bc); z80->WZ = z80->ea+1;} /* LD BC,(w) */
-OP(ed,4c) { NEG(z80); } /* NEG */
-OP(ed,4d) { RETI(z80); } /* RETI */
-OP(ed,4e) { z80->im = 0; } /* im 0 */
-OP(ed,4f) { LD_R_A(z80); } /* LD r,A */
-
-OP(ed,50) { z80->D = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->D]; } /* IN D,(C) */
-OP(ed,51) { OUT(z80, z80->BC, z80->D); } /* OUT (C),D */
-OP(ed,52) { SBC16(z80, de); } /* SBC HL,DE */
+OP(ed,4c) { NEG(z80); } /* NEG */
+OP(ed,4d) { RETI(z80); } /* RETI */
+OP(ed,4e) { z80->im = 0; } /* im 0 */
+OP(ed,4f) { LD_R_A(z80); } /* LD r,A */
+
+OP(ed,50) { z80->D = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->D]; } /* IN D,(C) */
+OP(ed,51) { OUT(z80, z80->BC, z80->D); } /* OUT (C),D */
+OP(ed,52) { SBC16(z80, de); } /* SBC HL,DE */
OP(ed,53) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->de); z80->WZ = z80->ea+1;} /* LD (w),DE */
-OP(ed,54) { NEG(z80); } /* NEG */
-OP(ed,55) { RETN(z80); } /* RETN */
-OP(ed,56) { z80->im = 1; } /* im 1 */
-OP(ed,57) { LD_A_I(z80); } /* LD A,i */
-
-OP(ed,58) { z80->E = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->E]; } /* IN E,(C) */
-OP(ed,59) { OUT(z80, z80->BC, z80->E); } /* OUT (C),E */
-OP(ed,5a) { ADC16(z80, de); } /* ADC HL,DE */
+OP(ed,54) { NEG(z80); } /* NEG */
+OP(ed,55) { RETN(z80); } /* RETN */
+OP(ed,56) { z80->im = 1; } /* im 1 */
+OP(ed,57) { LD_A_I(z80); } /* LD A,i */
+
+OP(ed,58) { z80->E = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->E]; } /* IN E,(C) */
+OP(ed,59) { OUT(z80, z80->BC, z80->E); } /* OUT (C),E */
+OP(ed,5a) { ADC16(z80, de); } /* ADC HL,DE */
OP(ed,5b) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->de); z80->WZ = z80->ea+1;} /* LD DE,(w) */
-OP(ed,5c) { NEG(z80); } /* NEG */
-OP(ed,5d) { RETI(z80); } /* RETI */
-OP(ed,5e) { z80->im = 2; } /* im 2 */
-OP(ed,5f) { LD_A_R(z80); } /* LD A,r */
-
-OP(ed,60) { z80->H = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->H]; } /* IN H,(C) */
-OP(ed,61) { OUT(z80, z80->BC, z80->H); } /* OUT (C),H */
-OP(ed,62) { SBC16(z80, hl); } /* SBC HL,HL */
+OP(ed,5c) { NEG(z80); } /* NEG */
+OP(ed,5d) { RETI(z80); } /* RETI */
+OP(ed,5e) { z80->im = 2; } /* im 2 */
+OP(ed,5f) { LD_A_R(z80); } /* LD A,r */
+
+OP(ed,60) { z80->H = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->H]; } /* IN H,(C) */
+OP(ed,61) { OUT(z80, z80->BC, z80->H); } /* OUT (C),H */
+OP(ed,62) { SBC16(z80, hl); } /* SBC HL,HL */
OP(ed,63) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->hl); z80->WZ = z80->ea+1;} /* LD (w),HL */
-OP(ed,64) { NEG(z80); } /* NEG */
-OP(ed,65) { RETN(z80); } /* RETN */
-OP(ed,66) { z80->im = 0; } /* im 0 */
-OP(ed,67) { RRD(z80); } /* RRD (HL) */
-
-OP(ed,68) { z80->L = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->L]; } /* IN L,(C) */
-OP(ed,69) { OUT(z80, z80->BC, z80->L); } /* OUT (C),L */
-OP(ed,6a) { ADC16(z80, hl); } /* ADC HL,HL */
+OP(ed,64) { NEG(z80); } /* NEG */
+OP(ed,65) { RETN(z80); } /* RETN */
+OP(ed,66) { z80->im = 0; } /* im 0 */
+OP(ed,67) { RRD(z80); } /* RRD (HL) */
+
+OP(ed,68) { z80->L = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->L]; } /* IN L,(C) */
+OP(ed,69) { OUT(z80, z80->BC, z80->L); } /* OUT (C),L */
+OP(ed,6a) { ADC16(z80, hl); } /* ADC HL,HL */
OP(ed,6b) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->hl); z80->WZ = z80->ea+1;} /* LD HL,(w) */
-OP(ed,6c) { NEG(z80); } /* NEG */
-OP(ed,6d) { RETI(z80); } /* RETI */
-OP(ed,6e) { z80->im = 0; } /* im 0 */
-OP(ed,6f) { RLD(z80); } /* RLD (HL) */
-
-OP(ed,70) { UINT8 res = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[res]; } /* IN 0,(C) */
-OP(ed,71) { OUT(z80, z80->BC, 0); } /* OUT (C),0 */
-OP(ed,72) { SBC16(z80, sp); } /* SBC HL,SP */
+OP(ed,6c) { NEG(z80); } /* NEG */
+OP(ed,6d) { RETI(z80); } /* RETI */
+OP(ed,6e) { z80->im = 0; } /* im 0 */
+OP(ed,6f) { RLD(z80); } /* RLD (HL) */
+
+OP(ed,70) { UINT8 res = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[res]; } /* IN 0,(C) */
+OP(ed,71) { OUT(z80, z80->BC, 0); } /* OUT (C),0 */
+OP(ed,72) { SBC16(z80, sp); } /* SBC HL,SP */
OP(ed,73) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->sp); z80->WZ = z80->ea+1;} /* LD (w),SP */
-OP(ed,74) { NEG(z80); } /* NEG */
-OP(ed,75) { RETN(z80); } /* RETN */
-OP(ed,76) { z80->im = 1; } /* im 1 */
-OP(ed,77) { illegal_2(z80); } /* DB ED,77 */
-
-OP(ed,78) { z80->A = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->A]; z80->WZ = z80->BC + 1; } /* IN A,(C) */
-OP(ed,79) { OUT(z80, z80->BC, z80->A); z80->WZ = z80->BC + 1; } /* OUT (C),A */
-OP(ed,7a) { ADC16(z80, sp); } /* ADC HL,SP */
+OP(ed,74) { NEG(z80); } /* NEG */
+OP(ed,75) { RETN(z80); } /* RETN */
+OP(ed,76) { z80->im = 1; } /* im 1 */
+OP(ed,77) { illegal_2(z80); } /* DB ED,77 */
+
+OP(ed,78) { z80->A = IN(z80, z80->BC); z80->F = (z80->F & CF) | SZP[z80->A]; z80->WZ = z80->BC + 1; } /* IN A,(C) */
+OP(ed,79) { OUT(z80, z80->BC, z80->A); z80->WZ = z80->BC + 1; } /* OUT (C),A */
+OP(ed,7a) { ADC16(z80, sp); } /* ADC HL,SP */
OP(ed,7b) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->sp); z80->WZ = z80->ea+1;} /* LD SP,(w) */
-OP(ed,7c) { NEG(z80); } /* NEG */
-OP(ed,7d) { RETI(z80); } /* RETI */
-OP(ed,7e) { z80->im = 2; } /* im 2 */
-OP(ed,7f) { illegal_2(z80); } /* DB ED,7F */
-
-OP(ed,80) { illegal_2(z80); } /* DB ED */
-OP(ed,81) { illegal_2(z80); } /* DB ED */
-OP(ed,82) { illegal_2(z80); } /* DB ED */
-OP(ed,83) { illegal_2(z80); } /* DB ED */
-OP(ed,84) { illegal_2(z80); } /* DB ED */
-OP(ed,85) { illegal_2(z80); } /* DB ED */
-OP(ed,86) { illegal_2(z80); } /* DB ED */
-OP(ed,87) { illegal_2(z80); } /* DB ED */
-
-OP(ed,88) { illegal_2(z80); } /* DB ED */
-OP(ed,89) { illegal_2(z80); } /* DB ED */
-OP(ed,8a) { illegal_2(z80); } /* DB ED */
-OP(ed,8b) { illegal_2(z80); } /* DB ED */
-OP(ed,8c) { illegal_2(z80); } /* DB ED */
-OP(ed,8d) { illegal_2(z80); } /* DB ED */
-OP(ed,8e) { illegal_2(z80); } /* DB ED */
-OP(ed,8f) { illegal_2(z80); } /* DB ED */
-
-OP(ed,90) { illegal_2(z80); } /* DB ED */
-OP(ed,91) { illegal_2(z80); } /* DB ED */
-OP(ed,92) { illegal_2(z80); } /* DB ED */
-OP(ed,93) { illegal_2(z80); } /* DB ED */
-OP(ed,94) { illegal_2(z80); } /* DB ED */
-OP(ed,95) { illegal_2(z80); } /* DB ED */
-OP(ed,96) { illegal_2(z80); } /* DB ED */
-OP(ed,97) { illegal_2(z80); } /* DB ED */
-
-OP(ed,98) { illegal_2(z80); } /* DB ED */
-OP(ed,99) { illegal_2(z80); } /* DB ED */
-OP(ed,9a) { illegal_2(z80); } /* DB ED */
-OP(ed,9b) { illegal_2(z80); } /* DB ED */
-OP(ed,9c) { illegal_2(z80); } /* DB ED */
-OP(ed,9d) { illegal_2(z80); } /* DB ED */
-OP(ed,9e) { illegal_2(z80); } /* DB ED */
-OP(ed,9f) { illegal_2(z80); } /* DB ED */
-
-OP(ed,a0) { LDI(z80); } /* LDI */
-OP(ed,a1) { CPI(z80); } /* CPI */
-OP(ed,a2) { INI(z80); } /* INI */
-OP(ed,a3) { OUTI(z80); } /* OUTI */
-OP(ed,a4) { illegal_2(z80); } /* DB ED */
-OP(ed,a5) { illegal_2(z80); } /* DB ED */
-OP(ed,a6) { illegal_2(z80); } /* DB ED */
-OP(ed,a7) { illegal_2(z80); } /* DB ED */
-
-OP(ed,a8) { LDD(z80); } /* LDD */
-OP(ed,a9) { CPD(z80); } /* CPD */
-OP(ed,aa) { IND(z80); } /* IND */
-OP(ed,ab) { OUTD(z80); } /* OUTD */
-OP(ed,ac) { illegal_2(z80); } /* DB ED */
-OP(ed,ad) { illegal_2(z80); } /* DB ED */
-OP(ed,ae) { illegal_2(z80); } /* DB ED */
-OP(ed,af) { illegal_2(z80); } /* DB ED */
-
-OP(ed,b0) { LDIR(z80); } /* LDIR */
-OP(ed,b1) { CPIR(z80); } /* CPIR */
-OP(ed,b2) { INIR(z80); } /* INIR */
-OP(ed,b3) { OTIR(z80); } /* OTIR */
-OP(ed,b4) { illegal_2(z80); } /* DB ED */
-OP(ed,b5) { illegal_2(z80); } /* DB ED */
-OP(ed,b6) { illegal_2(z80); } /* DB ED */
-OP(ed,b7) { illegal_2(z80); } /* DB ED */
-
-OP(ed,b8) { LDDR(z80); } /* LDDR */
-OP(ed,b9) { CPDR(z80); } /* CPDR */
-OP(ed,ba) { INDR(z80); } /* INDR */
-OP(ed,bb) { OTDR(z80); } /* OTDR */
-OP(ed,bc) { illegal_2(z80); } /* DB ED */
-OP(ed,bd) { illegal_2(z80); } /* DB ED */
-OP(ed,be) { illegal_2(z80); } /* DB ED */
-OP(ed,bf) { illegal_2(z80); } /* DB ED */
-
-OP(ed,c0) { illegal_2(z80); } /* DB ED */
-OP(ed,c1) { illegal_2(z80); } /* DB ED */
-OP(ed,c2) { illegal_2(z80); } /* DB ED */
-OP(ed,c3) { illegal_2(z80); } /* DB ED */
-OP(ed,c4) { illegal_2(z80); } /* DB ED */
-OP(ed,c5) { illegal_2(z80); } /* DB ED */
-OP(ed,c6) { illegal_2(z80); } /* DB ED */
-OP(ed,c7) { illegal_2(z80); } /* DB ED */
-
-OP(ed,c8) { illegal_2(z80); } /* DB ED */
-OP(ed,c9) { illegal_2(z80); } /* DB ED */
-OP(ed,ca) { illegal_2(z80); } /* DB ED */
-OP(ed,cb) { illegal_2(z80); } /* DB ED */
-OP(ed,cc) { illegal_2(z80); } /* DB ED */
-OP(ed,cd) { illegal_2(z80); } /* DB ED */
-OP(ed,ce) { illegal_2(z80); } /* DB ED */
-OP(ed,cf) { illegal_2(z80); } /* DB ED */
-
-OP(ed,d0) { illegal_2(z80); } /* DB ED */
-OP(ed,d1) { illegal_2(z80); } /* DB ED */
-OP(ed,d2) { illegal_2(z80); } /* DB ED */
-OP(ed,d3) { illegal_2(z80); } /* DB ED */
-OP(ed,d4) { illegal_2(z80); } /* DB ED */
-OP(ed,d5) { illegal_2(z80); } /* DB ED */
-OP(ed,d6) { illegal_2(z80); } /* DB ED */
-OP(ed,d7) { illegal_2(z80); } /* DB ED */
-
-OP(ed,d8) { illegal_2(z80); } /* DB ED */
-OP(ed,d9) { illegal_2(z80); } /* DB ED */
-OP(ed,da) { illegal_2(z80); } /* DB ED */
-OP(ed,db) { illegal_2(z80); } /* DB ED */
-OP(ed,dc) { illegal_2(z80); } /* DB ED */
-OP(ed,dd) { illegal_2(z80); } /* DB ED */
-OP(ed,de) { illegal_2(z80); } /* DB ED */
-OP(ed,df) { illegal_2(z80); } /* DB ED */
-
-OP(ed,e0) { illegal_2(z80); } /* DB ED */
-OP(ed,e1) { illegal_2(z80); } /* DB ED */
-OP(ed,e2) { illegal_2(z80); } /* DB ED */
-OP(ed,e3) { illegal_2(z80); } /* DB ED */
-OP(ed,e4) { illegal_2(z80); } /* DB ED */
-OP(ed,e5) { illegal_2(z80); } /* DB ED */
-OP(ed,e6) { illegal_2(z80); } /* DB ED */
-OP(ed,e7) { illegal_2(z80); } /* DB ED */
-
-OP(ed,e8) { illegal_2(z80); } /* DB ED */
-OP(ed,e9) { illegal_2(z80); } /* DB ED */
-OP(ed,ea) { illegal_2(z80); } /* DB ED */
-OP(ed,eb) { illegal_2(z80); } /* DB ED */
-OP(ed,ec) { illegal_2(z80); } /* DB ED */
-OP(ed,ed) { illegal_2(z80); } /* DB ED */
-OP(ed,ee) { illegal_2(z80); } /* DB ED */
-OP(ed,ef) { illegal_2(z80); } /* DB ED */
-
-OP(ed,f0) { illegal_2(z80); } /* DB ED */
-OP(ed,f1) { illegal_2(z80); } /* DB ED */
-OP(ed,f2) { illegal_2(z80); } /* DB ED */
-OP(ed,f3) { illegal_2(z80); } /* DB ED */
-OP(ed,f4) { illegal_2(z80); } /* DB ED */
-OP(ed,f5) { illegal_2(z80); } /* DB ED */
-OP(ed,f6) { illegal_2(z80); } /* DB ED */
-OP(ed,f7) { illegal_2(z80); } /* DB ED */
-
-OP(ed,f8) { illegal_2(z80); } /* DB ED */
-OP(ed,f9) { illegal_2(z80); } /* DB ED */
-OP(ed,fa) { illegal_2(z80); } /* DB ED */
-OP(ed,fb) { illegal_2(z80); } /* DB ED */
-OP(ed,fc) { illegal_2(z80); } /* DB ED */
-OP(ed,fd) { illegal_2(z80); } /* DB ED */
-OP(ed,fe) { illegal_2(z80); } /* DB ED */
-OP(ed,ff) { illegal_2(z80); } /* DB ED */
+OP(ed,7c) { NEG(z80); } /* NEG */
+OP(ed,7d) { RETI(z80); } /* RETI */
+OP(ed,7e) { z80->im = 2; } /* im 2 */
+OP(ed,7f) { illegal_2(z80); } /* DB ED,7F */
+
+OP(ed,80) { illegal_2(z80); } /* DB ED */
+OP(ed,81) { illegal_2(z80); } /* DB ED */
+OP(ed,82) { illegal_2(z80); } /* DB ED */
+OP(ed,83) { illegal_2(z80); } /* DB ED */
+OP(ed,84) { illegal_2(z80); } /* DB ED */
+OP(ed,85) { illegal_2(z80); } /* DB ED */
+OP(ed,86) { illegal_2(z80); } /* DB ED */
+OP(ed,87) { illegal_2(z80); } /* DB ED */
+
+OP(ed,88) { illegal_2(z80); } /* DB ED */
+OP(ed,89) { illegal_2(z80); } /* DB ED */
+OP(ed,8a) { illegal_2(z80); } /* DB ED */
+OP(ed,8b) { illegal_2(z80); } /* DB ED */
+OP(ed,8c) { illegal_2(z80); } /* DB ED */
+OP(ed,8d) { illegal_2(z80); } /* DB ED */
+OP(ed,8e) { illegal_2(z80); } /* DB ED */
+OP(ed,8f) { illegal_2(z80); } /* DB ED */
+
+OP(ed,90) { illegal_2(z80); } /* DB ED */
+OP(ed,91) { illegal_2(z80); } /* DB ED */
+OP(ed,92) { illegal_2(z80); } /* DB ED */
+OP(ed,93) { illegal_2(z80); } /* DB ED */
+OP(ed,94) { illegal_2(z80); } /* DB ED */
+OP(ed,95) { illegal_2(z80); } /* DB ED */
+OP(ed,96) { illegal_2(z80); } /* DB ED */
+OP(ed,97) { illegal_2(z80); } /* DB ED */
+
+OP(ed,98) { illegal_2(z80); } /* DB ED */
+OP(ed,99) { illegal_2(z80); } /* DB ED */
+OP(ed,9a) { illegal_2(z80); } /* DB ED */
+OP(ed,9b) { illegal_2(z80); } /* DB ED */
+OP(ed,9c) { illegal_2(z80); } /* DB ED */
+OP(ed,9d) { illegal_2(z80); } /* DB ED */
+OP(ed,9e) { illegal_2(z80); } /* DB ED */
+OP(ed,9f) { illegal_2(z80); } /* DB ED */
+
+OP(ed,a0) { LDI(z80); } /* LDI */
+OP(ed,a1) { CPI(z80); } /* CPI */
+OP(ed,a2) { INI(z80); } /* INI */
+OP(ed,a3) { OUTI(z80); } /* OUTI */
+OP(ed,a4) { illegal_2(z80); } /* DB ED */
+OP(ed,a5) { illegal_2(z80); } /* DB ED */
+OP(ed,a6) { illegal_2(z80); } /* DB ED */
+OP(ed,a7) { illegal_2(z80); } /* DB ED */
+
+OP(ed,a8) { LDD(z80); } /* LDD */
+OP(ed,a9) { CPD(z80); } /* CPD */
+OP(ed,aa) { IND(z80); } /* IND */
+OP(ed,ab) { OUTD(z80); } /* OUTD */
+OP(ed,ac) { illegal_2(z80); } /* DB ED */
+OP(ed,ad) { illegal_2(z80); } /* DB ED */
+OP(ed,ae) { illegal_2(z80); } /* DB ED */
+OP(ed,af) { illegal_2(z80); } /* DB ED */
+
+OP(ed,b0) { LDIR(z80); } /* LDIR */
+OP(ed,b1) { CPIR(z80); } /* CPIR */
+OP(ed,b2) { INIR(z80); } /* INIR */
+OP(ed,b3) { OTIR(z80); } /* OTIR */
+OP(ed,b4) { illegal_2(z80); } /* DB ED */
+OP(ed,b5) { illegal_2(z80); } /* DB ED */
+OP(ed,b6) { illegal_2(z80); } /* DB ED */
+OP(ed,b7) { illegal_2(z80); } /* DB ED */
+
+OP(ed,b8) { LDDR(z80); } /* LDDR */
+OP(ed,b9) { CPDR(z80); } /* CPDR */
+OP(ed,ba) { INDR(z80); } /* INDR */
+OP(ed,bb) { OTDR(z80); } /* OTDR */
+OP(ed,bc) { illegal_2(z80); } /* DB ED */
+OP(ed,bd) { illegal_2(z80); } /* DB ED */
+OP(ed,be) { illegal_2(z80); } /* DB ED */
+OP(ed,bf) { illegal_2(z80); } /* DB ED */
+
+OP(ed,c0) { illegal_2(z80); } /* DB ED */
+OP(ed,c1) { illegal_2(z80); } /* DB ED */
+OP(ed,c2) { illegal_2(z80); } /* DB ED */
+OP(ed,c3) { illegal_2(z80); } /* DB ED */
+OP(ed,c4) { illegal_2(z80); } /* DB ED */
+OP(ed,c5) { illegal_2(z80); } /* DB ED */
+OP(ed,c6) { illegal_2(z80); } /* DB ED */
+OP(ed,c7) { illegal_2(z80); } /* DB ED */
+
+OP(ed,c8) { illegal_2(z80); } /* DB ED */
+OP(ed,c9) { illegal_2(z80); } /* DB ED */
+OP(ed,ca) { illegal_2(z80); } /* DB ED */
+OP(ed,cb) { illegal_2(z80); } /* DB ED */
+OP(ed,cc) { illegal_2(z80); } /* DB ED */
+OP(ed,cd) { illegal_2(z80); } /* DB ED */
+OP(ed,ce) { illegal_2(z80); } /* DB ED */
+OP(ed,cf) { illegal_2(z80); } /* DB ED */
+
+OP(ed,d0) { illegal_2(z80); } /* DB ED */
+OP(ed,d1) { illegal_2(z80); } /* DB ED */
+OP(ed,d2) { illegal_2(z80); } /* DB ED */
+OP(ed,d3) { illegal_2(z80); } /* DB ED */
+OP(ed,d4) { illegal_2(z80); } /* DB ED */
+OP(ed,d5) { illegal_2(z80); } /* DB ED */
+OP(ed,d6) { illegal_2(z80); } /* DB ED */
+OP(ed,d7) { illegal_2(z80); } /* DB ED */
+
+OP(ed,d8) { illegal_2(z80); } /* DB ED */
+OP(ed,d9) { illegal_2(z80); } /* DB ED */
+OP(ed,da) { illegal_2(z80); } /* DB ED */
+OP(ed,db) { illegal_2(z80); } /* DB ED */
+OP(ed,dc) { illegal_2(z80); } /* DB ED */
+OP(ed,dd) { illegal_2(z80); } /* DB ED */
+OP(ed,de) { illegal_2(z80); } /* DB ED */
+OP(ed,df) { illegal_2(z80); } /* DB ED */
+
+OP(ed,e0) { illegal_2(z80); } /* DB ED */
+OP(ed,e1) { illegal_2(z80); } /* DB ED */
+OP(ed,e2) { illegal_2(z80); } /* DB ED */
+OP(ed,e3) { illegal_2(z80); } /* DB ED */
+OP(ed,e4) { illegal_2(z80); } /* DB ED */
+OP(ed,e5) { illegal_2(z80); } /* DB ED */
+OP(ed,e6) { illegal_2(z80); } /* DB ED */
+OP(ed,e7) { illegal_2(z80); } /* DB ED */
+
+OP(ed,e8) { illegal_2(z80); } /* DB ED */
+OP(ed,e9) { illegal_2(z80); } /* DB ED */
+OP(ed,ea) { illegal_2(z80); } /* DB ED */
+OP(ed,eb) { illegal_2(z80); } /* DB ED */
+OP(ed,ec) { illegal_2(z80); } /* DB ED */
+OP(ed,ed) { illegal_2(z80); } /* DB ED */
+OP(ed,ee) { illegal_2(z80); } /* DB ED */
+OP(ed,ef) { illegal_2(z80); } /* DB ED */
+
+OP(ed,f0) { illegal_2(z80); } /* DB ED */
+OP(ed,f1) { illegal_2(z80); } /* DB ED */
+OP(ed,f2) { illegal_2(z80); } /* DB ED */
+OP(ed,f3) { illegal_2(z80); } /* DB ED */
+OP(ed,f4) { illegal_2(z80); } /* DB ED */
+OP(ed,f5) { illegal_2(z80); } /* DB ED */
+OP(ed,f6) { illegal_2(z80); } /* DB ED */
+OP(ed,f7) { illegal_2(z80); } /* DB ED */
+
+OP(ed,f8) { illegal_2(z80); } /* DB ED */
+OP(ed,f9) { illegal_2(z80); } /* DB ED */
+OP(ed,fa) { illegal_2(z80); } /* DB ED */
+OP(ed,fb) { illegal_2(z80); } /* DB ED */
+OP(ed,fc) { illegal_2(z80); } /* DB ED */
+OP(ed,fd) { illegal_2(z80); } /* DB ED */
+OP(ed,fe) { illegal_2(z80); } /* DB ED */
+OP(ed,ff) { illegal_2(z80); } /* DB ED */
/**********************************************************
* main opcodes
**********************************************************/
-OP(op,00) { } /* NOP */
-OP(op,01) { z80->BC = ARG16(z80); } /* LD BC,w */
+OP(op,00) { } /* NOP */
+OP(op,01) { z80->BC = ARG16(z80); } /* LD BC,w */
OP(op,02) { WM(z80,z80->BC,z80->A); z80->WZ_L = (z80->BC + 1) & 0xFF; z80->WZ_H = z80->A; } /* LD (BC),A */
-OP(op,03) { z80->BC++; } /* INC BC */
-OP(op,04) { z80->B = INC(z80, z80->B); } /* INC B */
-OP(op,05) { z80->B = DEC(z80, z80->B); } /* DEC B */
-OP(op,06) { z80->B = ARG(z80); } /* LD B,n */
-OP(op,07) { RLCA(z80); } /* RLCA */
-
-OP(op,08) { EX_AF(z80); } /* EX AF,AF' */
-OP(op,09) { ADD16(z80, hl, bc); } /* ADD HL,BC */
-OP(op,0a) { z80->A = RM(z80, z80->BC); z80->WZ=z80->BC+1; } /* LD A,(BC) */
-OP(op,0b) { z80->BC--; } /* DEC BC */
-OP(op,0c) { z80->C = INC(z80, z80->C); } /* INC C */
-OP(op,0d) { z80->C = DEC(z80, z80->C); } /* DEC C */
-OP(op,0e) { z80->C = ARG(z80); } /* LD C,n */
-OP(op,0f) { RRCA(z80); } /* RRCA */
-
-OP(op,10) { z80->B--; JR_COND(z80, z80->B, 0x10); } /* DJNZ o */
-OP(op,11) { z80->DE = ARG16(z80); } /* LD DE,w */
+OP(op,03) { z80->BC++; } /* INC BC */
+OP(op,04) { z80->B = INC(z80, z80->B); } /* INC B */
+OP(op,05) { z80->B = DEC(z80, z80->B); } /* DEC B */
+OP(op,06) { z80->B = ARG(z80); } /* LD B,n */
+OP(op,07) { RLCA(z80); } /* RLCA */
+
+OP(op,08) { EX_AF(z80); } /* EX AF,AF' */
+OP(op,09) { ADD16(z80, hl, bc); } /* ADD HL,BC */
+OP(op,0a) { z80->A = RM(z80, z80->BC); z80->WZ=z80->BC+1; } /* LD A,(BC) */
+OP(op,0b) { z80->BC--; } /* DEC BC */
+OP(op,0c) { z80->C = INC(z80, z80->C); } /* INC C */
+OP(op,0d) { z80->C = DEC(z80, z80->C); } /* DEC C */
+OP(op,0e) { z80->C = ARG(z80); } /* LD C,n */
+OP(op,0f) { RRCA(z80); } /* RRCA */
+
+OP(op,10) { z80->B--; JR_COND(z80, z80->B, 0x10); } /* DJNZ o */
+OP(op,11) { z80->DE = ARG16(z80); } /* LD DE,w */
OP(op,12) { WM(z80,z80->DE,z80->A); z80->WZ_L = (z80->DE + 1) & 0xFF; z80->WZ_H = z80->A; } /* LD (DE),A */
-OP(op,13) { z80->DE++; } /* INC DE */
-OP(op,14) { z80->D = INC(z80, z80->D); } /* INC D */
-OP(op,15) { z80->D = DEC(z80, z80->D); } /* DEC D */
-OP(op,16) { z80->D = ARG(z80); } /* LD D,n */
-OP(op,17) { RLA(z80); } /* RLA */
-
-OP(op,18) { JR(z80); } /* JR o */
-OP(op,19) { ADD16(z80, hl, de); } /* ADD HL,DE */
-OP(op,1a) { z80->A = RM(z80, z80->DE); z80->WZ=z80->DE+1; } /* LD A,(DE) */
-OP(op,1b) { z80->DE--; } /* DEC DE */
-OP(op,1c) { z80->E = INC(z80, z80->E); } /* INC E */
-OP(op,1d) { z80->E = DEC(z80, z80->E); } /* DEC E */
-OP(op,1e) { z80->E = ARG(z80); } /* LD E,n */
-OP(op,1f) { RRA(z80); } /* RRA */
-
-OP(op,20) { JR_COND(z80, !(z80->F & ZF), 0x20); } /* JR NZ,o */
-OP(op,21) { z80->HL = ARG16(z80); } /* LD HL,w */
-OP(op,22) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->hl); z80->WZ = z80->ea+1;} /* LD (w),HL */
-OP(op,23) { z80->HL++; } /* INC HL */
-OP(op,24) { z80->H = INC(z80, z80->H); } /* INC H */
-OP(op,25) { z80->H = DEC(z80, z80->H); } /* DEC H */
-OP(op,26) { z80->H = ARG(z80); } /* LD H,n */
-OP(op,27) { DAA(z80); } /* DAA */
-
-OP(op,28) { JR_COND(z80, z80->F & ZF, 0x28); } /* JR Z,o */
-OP(op,29) { ADD16(z80, hl, hl); } /* ADD HL,HL */
-OP(op,2a) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->hl); z80->WZ = z80->ea+1;} /* LD HL,(w) */
-OP(op,2b) { z80->HL--; } /* DEC HL */
-OP(op,2c) { z80->L = INC(z80, z80->L); } /* INC L */
-OP(op,2d) { z80->L = DEC(z80, z80->L); } /* DEC L */
-OP(op,2e) { z80->L = ARG(z80); } /* LD L,n */
-OP(op,2f) { z80->A ^= 0xff; z80->F = (z80->F&(SF|ZF|PF|CF))|HF|NF|(z80->A&(YF|XF)); } /* CPL */
-
-OP(op,30) { JR_COND(z80, !(z80->F & CF), 0x30); } /* JR NC,o */
-OP(op,31) { z80->SP = ARG16(z80); } /* LD SP,w */
+OP(op,13) { z80->DE++; } /* INC DE */
+OP(op,14) { z80->D = INC(z80, z80->D); } /* INC D */
+OP(op,15) { z80->D = DEC(z80, z80->D); } /* DEC D */
+OP(op,16) { z80->D = ARG(z80); } /* LD D,n */
+OP(op,17) { RLA(z80); } /* RLA */
+
+OP(op,18) { JR(z80); } /* JR o */
+OP(op,19) { ADD16(z80, hl, de); } /* ADD HL,DE */
+OP(op,1a) { z80->A = RM(z80, z80->DE); z80->WZ=z80->DE+1; } /* LD A,(DE) */
+OP(op,1b) { z80->DE--; } /* DEC DE */
+OP(op,1c) { z80->E = INC(z80, z80->E); } /* INC E */
+OP(op,1d) { z80->E = DEC(z80, z80->E); } /* DEC E */
+OP(op,1e) { z80->E = ARG(z80); } /* LD E,n */
+OP(op,1f) { RRA(z80); } /* RRA */
+
+OP(op,20) { JR_COND(z80, !(z80->F & ZF), 0x20); } /* JR NZ,o */
+OP(op,21) { z80->HL = ARG16(z80); } /* LD HL,w */
+OP(op,22) { z80->ea = ARG16(z80); WM16(z80, z80->ea, &z80->hl); z80->WZ = z80->ea+1;} /* LD (w),HL */
+OP(op,23) { z80->HL++; } /* INC HL */
+OP(op,24) { z80->H = INC(z80, z80->H); } /* INC H */
+OP(op,25) { z80->H = DEC(z80, z80->H); } /* DEC H */
+OP(op,26) { z80->H = ARG(z80); } /* LD H,n */
+OP(op,27) { DAA(z80); } /* DAA */
+
+OP(op,28) { JR_COND(z80, z80->F & ZF, 0x28); } /* JR Z,o */
+OP(op,29) { ADD16(z80, hl, hl); } /* ADD HL,HL */
+OP(op,2a) { z80->ea = ARG16(z80); RM16(z80, z80->ea, &z80->hl); z80->WZ = z80->ea+1;} /* LD HL,(w) */
+OP(op,2b) { z80->HL--; } /* DEC HL */
+OP(op,2c) { z80->L = INC(z80, z80->L); } /* INC L */
+OP(op,2d) { z80->L = DEC(z80, z80->L); } /* DEC L */
+OP(op,2e) { z80->L = ARG(z80); } /* LD L,n */
+OP(op,2f) { z80->A ^= 0xff; z80->F = (z80->F&(SF|ZF|PF|CF))|HF|NF|(z80->A&(YF|XF)); } /* CPL */
+
+OP(op,30) { JR_COND(z80, !(z80->F & CF), 0x30); } /* JR NC,o */
+OP(op,31) { z80->SP = ARG16(z80); } /* LD SP,w */
OP(op,32) { z80->ea=ARG16(z80);WM(z80,z80->ea,z80->A);z80->WZ_L=(z80->ea+1)&0xFF;z80->WZ_H=z80->A; } /* LD (w),A */
-OP(op,33) { z80->SP++; } /* INC SP */
-OP(op,34) { WM(z80, z80->HL, INC(z80, RM(z80, z80->HL))); } /* INC (HL) */
-OP(op,35) { WM(z80, z80->HL, DEC(z80, RM(z80, z80->HL))); } /* DEC (HL) */
-OP(op,36) { WM(z80, z80->HL, ARG(z80)); } /* LD (HL),n */
-OP(op,37) { z80->F = (z80->F & (SF|ZF|YF|XF|PF)) | CF | (z80->A & (YF|XF)); } /* SCF */
-
-OP(op,38) { JR_COND(z80, z80->F & CF, 0x38); } /* JR C,o */
-OP(op,39) { ADD16(z80, hl, sp); } /* ADD HL,SP */
-OP(op,3a) { z80->ea = ARG16(z80); z80->A = RM(z80, z80->ea); z80->WZ=z80->ea+1; } /* LD A,(w) */
-OP(op,3b) { z80->SP--; } /* DEC SP */
-OP(op,3c) { z80->A = INC(z80, z80->A); } /* INC A */
-OP(op,3d) { z80->A = DEC(z80, z80->A); } /* DEC A */
-OP(op,3e) { z80->A = ARG(z80); } /* LD A,n */
+OP(op,33) { z80->SP++; } /* INC SP */
+OP(op,34) { WM(z80, z80->HL, INC(z80, RM(z80, z80->HL))); } /* INC (HL) */
+OP(op,35) { WM(z80, z80->HL, DEC(z80, RM(z80, z80->HL))); } /* DEC (HL) */
+OP(op,36) { WM(z80, z80->HL, ARG(z80)); } /* LD (HL),n */
+OP(op,37) { z80->F = (z80->F & (SF|ZF|YF|XF|PF)) | CF | (z80->A & (YF|XF)); } /* SCF */
+
+OP(op,38) { JR_COND(z80, z80->F & CF, 0x38); } /* JR C,o */
+OP(op,39) { ADD16(z80, hl, sp); } /* ADD HL,SP */
+OP(op,3a) { z80->ea = ARG16(z80); z80->A = RM(z80, z80->ea); z80->WZ=z80->ea+1; } /* LD A,(w) */
+OP(op,3b) { z80->SP--; } /* DEC SP */
+OP(op,3c) { z80->A = INC(z80, z80->A); } /* INC A */
+OP(op,3d) { z80->A = DEC(z80, z80->A); } /* DEC A */
+OP(op,3e) { z80->A = ARG(z80); } /* LD A,n */
OP(op,3f) { z80->F = ((z80->F&(SF|ZF|YF|XF|PF|CF))|((z80->F&CF)<<4)|(z80->A&(YF|XF)))^CF; } /* CCF */
-OP(op,40) { } /* LD B,B */
-OP(op,41) { z80->B = z80->C; } /* LD B,C */
-OP(op,42) { z80->B = z80->D; } /* LD B,D */
-OP(op,43) { z80->B = z80->E; } /* LD B,E */
-OP(op,44) { z80->B = z80->H; } /* LD B,H */
-OP(op,45) { z80->B = z80->L; } /* LD B,L */
-OP(op,46) { z80->B = RM(z80, z80->HL); } /* LD B,(HL) */
-OP(op,47) { z80->B = z80->A; } /* LD B,A */
-
-OP(op,48) { z80->C = z80->B; } /* LD C,B */
-OP(op,49) { } /* LD C,C */
-OP(op,4a) { z80->C = z80->D; } /* LD C,D */
-OP(op,4b) { z80->C = z80->E; } /* LD C,E */
-OP(op,4c) { z80->C = z80->H; } /* LD C,H */
-OP(op,4d) { z80->C = z80->L; } /* LD C,L */
-OP(op,4e) { z80->C = RM(z80, z80->HL); } /* LD C,(HL) */
-OP(op,4f) { z80->C = z80->A; } /* LD C,A */
-
-OP(op,50) { z80->D = z80->B; } /* LD D,B */
-OP(op,51) { z80->D = z80->C; } /* LD D,C */
-OP(op,52) { } /* LD D,D */
-OP(op,53) { z80->D = z80->E; } /* LD D,E */
-OP(op,54) { z80->D = z80->H; } /* LD D,H */
-OP(op,55) { z80->D = z80->L; } /* LD D,L */
-OP(op,56) { z80->D = RM(z80, z80->HL); } /* LD D,(HL) */
-OP(op,57) { z80->D = z80->A; } /* LD D,A */
-
-OP(op,58) { z80->E = z80->B; } /* LD E,B */
-OP(op,59) { z80->E = z80->C; } /* LD E,C */
-OP(op,5a) { z80->E = z80->D; } /* LD E,D */
-OP(op,5b) { } /* LD E,E */
-OP(op,5c) { z80->E = z80->H; } /* LD E,H */
-OP(op,5d) { z80->E = z80->L; } /* LD E,L */
-OP(op,5e) { z80->E = RM(z80, z80->HL); } /* LD E,(HL) */
-OP(op,5f) { z80->E = z80->A; } /* LD E,A */
-
-OP(op,60) { z80->H = z80->B; } /* LD H,B */
-OP(op,61) { z80->H = z80->C; } /* LD H,C */
-OP(op,62) { z80->H = z80->D; } /* LD H,D */
-OP(op,63) { z80->H = z80->E; } /* LD H,E */
-OP(op,64) { } /* LD H,H */
-OP(op,65) { z80->H = z80->L; } /* LD H,L */
-OP(op,66) { z80->H = RM(z80, z80->HL); } /* LD H,(HL) */
-OP(op,67) { z80->H = z80->A; } /* LD H,A */
-
-OP(op,68) { z80->L = z80->B; } /* LD L,B */
-OP(op,69) { z80->L = z80->C; } /* LD L,C */
-OP(op,6a) { z80->L = z80->D; } /* LD L,D */
-OP(op,6b) { z80->L = z80->E; } /* LD L,E */
-OP(op,6c) { z80->L = z80->H; } /* LD L,H */
-OP(op,6d) { } /* LD L,L */
-OP(op,6e) { z80->L = RM(z80, z80->HL); } /* LD L,(HL) */
-OP(op,6f) { z80->L = z80->A; } /* LD L,A */
-
-OP(op,70) { WM(z80, z80->HL, z80->B); } /* LD (HL),B */
-OP(op,71) { WM(z80, z80->HL, z80->C); } /* LD (HL),C */
-OP(op,72) { WM(z80, z80->HL, z80->D); } /* LD (HL),D */
-OP(op,73) { WM(z80, z80->HL, z80->E); } /* LD (HL),E */
-OP(op,74) { WM(z80, z80->HL, z80->H); } /* LD (HL),H */
-OP(op,75) { WM(z80, z80->HL, z80->L); } /* LD (HL),L */
-OP(op,76) { ENTER_HALT(z80); } /* halt */
-OP(op,77) { WM(z80, z80->HL, z80->A); } /* LD (HL),A */
-
-OP(op,78) { z80->A = z80->B; } /* LD A,B */
-OP(op,79) { z80->A = z80->C; } /* LD A,C */
-OP(op,7a) { z80->A = z80->D; } /* LD A,D */
-OP(op,7b) { z80->A = z80->E; } /* LD A,E */
-OP(op,7c) { z80->A = z80->H; } /* LD A,H */
-OP(op,7d) { z80->A = z80->L; } /* LD A,L */
-OP(op,7e) { z80->A = RM(z80, z80->HL); } /* LD A,(HL) */
-OP(op,7f) { } /* LD A,A */
-
-OP(op,80) { ADD(z80, z80->B); } /* ADD A,B */
-OP(op,81) { ADD(z80, z80->C); } /* ADD A,C */
-OP(op,82) { ADD(z80, z80->D); } /* ADD A,D */
-OP(op,83) { ADD(z80, z80->E); } /* ADD A,E */
-OP(op,84) { ADD(z80, z80->H); } /* ADD A,H */
-OP(op,85) { ADD(z80, z80->L); } /* ADD A,L */
-OP(op,86) { ADD(z80, RM(z80, z80->HL)); } /* ADD A,(HL) */
-OP(op,87) { ADD(z80, z80->A); } /* ADD A,A */
-
-OP(op,88) { ADC(z80, z80->B); } /* ADC A,B */
-OP(op,89) { ADC(z80, z80->C); } /* ADC A,C */
-OP(op,8a) { ADC(z80, z80->D); } /* ADC A,D */
-OP(op,8b) { ADC(z80, z80->E); } /* ADC A,E */
-OP(op,8c) { ADC(z80, z80->H); } /* ADC A,H */
-OP(op,8d) { ADC(z80, z80->L); } /* ADC A,L */
-OP(op,8e) { ADC(z80, RM(z80, z80->HL)); } /* ADC A,(HL) */
-OP(op,8f) { ADC(z80, z80->A); } /* ADC A,A */
-
-OP(op,90) { SUB(z80, z80->B); } /* SUB B */
-OP(op,91) { SUB(z80, z80->C); } /* SUB C */
-OP(op,92) { SUB(z80, z80->D); } /* SUB D */
-OP(op,93) { SUB(z80, z80->E); } /* SUB E */
-OP(op,94) { SUB(z80, z80->H); } /* SUB H */
-OP(op,95) { SUB(z80, z80->L); } /* SUB L */
-OP(op,96) { SUB(z80, RM(z80, z80->HL)); } /* SUB (HL) */
-OP(op,97) { SUB(z80, z80->A); } /* SUB A */
-
-OP(op,98) { SBC(z80, z80->B); } /* SBC A,B */
-OP(op,99) { SBC(z80, z80->C); } /* SBC A,C */
-OP(op,9a) { SBC(z80, z80->D); } /* SBC A,D */
-OP(op,9b) { SBC(z80, z80->E); } /* SBC A,E */
-OP(op,9c) { SBC(z80, z80->H); } /* SBC A,H */
-OP(op,9d) { SBC(z80, z80->L); } /* SBC A,L */
-OP(op,9e) { SBC(z80, RM(z80, z80->HL)); } /* SBC A,(HL) */
-OP(op,9f) { SBC(z80, z80->A); } /* SBC A,A */
-
-OP(op,a0) { AND(z80, z80->B); } /* AND B */
-OP(op,a1) { AND(z80, z80->C); } /* AND C */
-OP(op,a2) { AND(z80, z80->D); } /* AND D */
-OP(op,a3) { AND(z80, z80->E); } /* AND E */
-OP(op,a4) { AND(z80, z80->H); } /* AND H */
-OP(op,a5) { AND(z80, z80->L); } /* AND L */
-OP(op,a6) { AND(z80, RM(z80, z80->HL)); } /* AND (HL) */
-OP(op,a7) { AND(z80, z80->A); } /* AND A */
-
-OP(op,a8) { XOR(z80, z80->B); } /* XOR B */
-OP(op,a9) { XOR(z80, z80->C); } /* XOR C */
-OP(op,aa) { XOR(z80, z80->D); } /* XOR D */
-OP(op,ab) { XOR(z80, z80->E); } /* XOR E */
-OP(op,ac) { XOR(z80, z80->H); } /* XOR H */
-OP(op,ad) { XOR(z80, z80->L); } /* XOR L */
-OP(op,ae) { XOR(z80, RM(z80, z80->HL)); } /* XOR (HL) */
-OP(op,af) { XOR(z80, z80->A); } /* XOR A */
-
-OP(op,b0) { OR(z80, z80->B); } /* OR B */
-OP(op,b1) { OR(z80, z80->C); } /* OR C */
-OP(op,b2) { OR(z80, z80->D); } /* OR D */
-OP(op,b3) { OR(z80, z80->E); } /* OR E */
-OP(op,b4) { OR(z80, z80->H); } /* OR H */
-OP(op,b5) { OR(z80, z80->L); } /* OR L */
-OP(op,b6) { OR(z80, RM(z80, z80->HL)); } /* OR (HL) */
-OP(op,b7) { OR(z80, z80->A); } /* OR A */
-
-OP(op,b8) { CP(z80, z80->B); } /* CP B */
-OP(op,b9) { CP(z80, z80->C); } /* CP C */
-OP(op,ba) { CP(z80, z80->D); } /* CP D */
-OP(op,bb) { CP(z80, z80->E); } /* CP E */
-OP(op,bc) { CP(z80, z80->H); } /* CP H */
-OP(op,bd) { CP(z80, z80->L); } /* CP L */
-OP(op,be) { CP(z80, RM(z80, z80->HL)); } /* CP (HL) */
-OP(op,bf) { CP(z80, z80->A); } /* CP A */
-
-OP(op,c0) { RET_COND(z80, !(z80->F & ZF), 0xc0); } /* RET NZ */
-OP(op,c1) { POP(z80, bc); } /* POP BC */
-OP(op,c2) { JP_COND(z80, !(z80->F & ZF)); } /* JP NZ,a */
-OP(op,c3) { JP(z80); } /* JP a */
-OP(op,c4) { CALL_COND(z80, !(z80->F & ZF), 0xc4); } /* CALL NZ,a */
-OP(op,c5) { PUSH(z80, bc); } /* PUSH BC */
-OP(op,c6) { ADD(z80, ARG(z80)); } /* ADD A,n */
-OP(op,c7) { RST(z80, 0x00); } /* RST 0 */
-
-OP(op,c8) { RET_COND(z80, z80->F & ZF, 0xc8); } /* RET Z */
-OP(op,c9) { POP(z80, pc); z80->WZ=z80->PCD; } /* RET */
-OP(op,ca) { JP_COND(z80, z80->F & ZF); } /* JP Z,a */
-OP(op,cb) { z80->r++; EXEC(z80,cb,ROP(z80)); } /* **** CB xx */
-OP(op,cc) { CALL_COND(z80, z80->F & ZF, 0xcc); } /* CALL Z,a */
-OP(op,cd) { CALL(z80); } /* CALL a */
-OP(op,ce) { ADC(z80, ARG(z80)); } /* ADC A,n */
-OP(op,cf) { RST(z80, 0x08); } /* RST 1 */
-
-OP(op,d0) { RET_COND(z80, !(z80->F & CF), 0xd0); } /* RET NC */
-OP(op,d1) { POP(z80, de); } /* POP DE */
-OP(op,d2) { JP_COND(z80, !(z80->F & CF)); } /* JP NC,a */
-OP(op,d3) { unsigned n = ARG(z80) | (z80->A << 8); OUT(z80, n, z80->A); z80->WZ_L = ((n & 0xff) + 1) & 0xff; z80->WZ_H = z80->A; } /* OUT (n),A */
-OP(op,d4) { CALL_COND(z80, !(z80->F & CF), 0xd4); } /* CALL NC,a */
-OP(op,d5) { PUSH(z80, de); } /* PUSH DE */
-OP(op,d6) { SUB(z80, ARG(z80)); } /* SUB n */
-OP(op,d7) { RST(z80, 0x10); } /* RST 2 */
-
-OP(op,d8) { RET_COND(z80, z80->F & CF, 0xd8); } /* RET C */
-OP(op,d9) { EXX(z80); } /* EXX */
-OP(op,da) { JP_COND(z80, z80->F & CF); } /* JP C,a */
-OP(op,db) { unsigned n = ARG(z80) | (z80->A << 8); z80->A = IN(z80, n); z80->WZ = n + 1; } /* IN A,(n) */
-OP(op,dc) { CALL_COND(z80, z80->F & CF, 0xdc); } /* CALL C,a */
-OP(op,dd) { z80->r++; EXEC(z80,dd,ROP(z80)); } /* **** DD xx */
-OP(op,de) { SBC(z80, ARG(z80)); } /* SBC A,n */
-OP(op,df) { RST(z80, 0x18); } /* RST 3 */
-
-OP(op,e0) { RET_COND(z80, !(z80->F & PF), 0xe0); } /* RET PO */
-OP(op,e1) { POP(z80, hl); } /* POP HL */
-OP(op,e2) { JP_COND(z80, !(z80->F & PF)); } /* JP PO,a */
-OP(op,e3) { EXSP(z80, hl); } /* EX HL,(SP) */
-OP(op,e4) { CALL_COND(z80, !(z80->F & PF), 0xe4); } /* CALL PO,a */
-OP(op,e5) { PUSH(z80, hl); } /* PUSH HL */
-OP(op,e6) { AND(z80, ARG(z80)); } /* AND n */
-OP(op,e7) { RST(z80, 0x20); } /* RST 4 */
-
-OP(op,e8) { RET_COND(z80, z80->F & PF, 0xe8); } /* RET PE */
-OP(op,e9) { z80->PC = z80->HL; } /* JP (HL) */
-OP(op,ea) { JP_COND(z80, z80->F & PF); } /* JP PE,a */
-OP(op,eb) { EX_DE_HL(z80); } /* EX DE,HL */
-OP(op,ec) { CALL_COND(z80, z80->F & PF, 0xec); } /* CALL PE,a */
-OP(op,ed) { z80->r++; EXEC(z80,ed,ROP(z80)); } /* **** ED xx */
-OP(op,ee) { XOR(z80, ARG(z80)); } /* XOR n */
-OP(op,ef) { RST(z80, 0x28); } /* RST 5 */
-
-OP(op,f0) { RET_COND(z80, !(z80->F & SF), 0xf0); } /* RET P */
-OP(op,f1) { POP(z80, af); } /* POP AF */
-OP(op,f2) { JP_COND(z80, !(z80->F & SF)); } /* JP P,a */
-OP(op,f3) { z80->iff1 = z80->iff2 = 0; } /* DI */
-OP(op,f4) { CALL_COND(z80, !(z80->F & SF), 0xf4); } /* CALL P,a */
-OP(op,f5) { PUSH(z80, af); } /* PUSH AF */
-OP(op,f6) { OR(z80, ARG(z80)); } /* OR n */
-OP(op,f7) { RST(z80, 0x30); } /* RST 6 */
-
-OP(op,f8) { RET_COND(z80, z80->F & SF, 0xf8); } /* RET M */
-OP(op,f9) { z80->SP = z80->HL; } /* LD SP,HL */
-OP(op,fa) { JP_COND(z80, z80->F & SF); } /* JP M,a */
-OP(op,fb) { EI(z80); } /* EI */
-OP(op,fc) { CALL_COND(z80, z80->F & SF, 0xfc); } /* CALL M,a */
-OP(op,fd) { z80->r++; EXEC(z80,fd,ROP(z80)); } /* **** FD xx */
-OP(op,fe) { CP(z80, ARG(z80)); } /* CP n */
-OP(op,ff) { RST(z80, 0x38); } /* RST 7 */
+OP(op,40) { } /* LD B,B */
+OP(op,41) { z80->B = z80->C; } /* LD B,C */
+OP(op,42) { z80->B = z80->D; } /* LD B,D */
+OP(op,43) { z80->B = z80->E; } /* LD B,E */
+OP(op,44) { z80->B = z80->H; } /* LD B,H */
+OP(op,45) { z80->B = z80->L; } /* LD B,L */
+OP(op,46) { z80->B = RM(z80, z80->HL); } /* LD B,(HL) */
+OP(op,47) { z80->B = z80->A; } /* LD B,A */
+
+OP(op,48) { z80->C = z80->B; } /* LD C,B */
+OP(op,49) { } /* LD C,C */
+OP(op,4a) { z80->C = z80->D; } /* LD C,D */
+OP(op,4b) { z80->C = z80->E; } /* LD C,E */
+OP(op,4c) { z80->C = z80->H; } /* LD C,H */
+OP(op,4d) { z80->C = z80->L; } /* LD C,L */
+OP(op,4e) { z80->C = RM(z80, z80->HL); } /* LD C,(HL) */
+OP(op,4f) { z80->C = z80->A; } /* LD C,A */
+
+OP(op,50) { z80->D = z80->B; } /* LD D,B */
+OP(op,51) { z80->D = z80->C; } /* LD D,C */
+OP(op,52) { } /* LD D,D */
+OP(op,53) { z80->D = z80->E; } /* LD D,E */
+OP(op,54) { z80->D = z80->H; } /* LD D,H */
+OP(op,55) { z80->D = z80->L; } /* LD D,L */
+OP(op,56) { z80->D = RM(z80, z80->HL); } /* LD D,(HL) */
+OP(op,57) { z80->D = z80->A; } /* LD D,A */
+
+OP(op,58) { z80->E = z80->B; } /* LD E,B */
+OP(op,59) { z80->E = z80->C; } /* LD E,C */
+OP(op,5a) { z80->E = z80->D; } /* LD E,D */
+OP(op,5b) { } /* LD E,E */
+OP(op,5c) { z80->E = z80->H; } /* LD E,H */
+OP(op,5d) { z80->E = z80->L; } /* LD E,L */
+OP(op,5e) { z80->E = RM(z80, z80->HL); } /* LD E,(HL) */
+OP(op,5f) { z80->E = z80->A; } /* LD E,A */
+
+OP(op,60) { z80->H = z80->B; } /* LD H,B */
+OP(op,61) { z80->H = z80->C; } /* LD H,C */
+OP(op,62) { z80->H = z80->D; } /* LD H,D */
+OP(op,63) { z80->H = z80->E; } /* LD H,E */
+OP(op,64) { } /* LD H,H */
+OP(op,65) { z80->H = z80->L; } /* LD H,L */
+OP(op,66) { z80->H = RM(z80, z80->HL); } /* LD H,(HL) */
+OP(op,67) { z80->H = z80->A; } /* LD H,A */
+
+OP(op,68) { z80->L = z80->B; } /* LD L,B */
+OP(op,69) { z80->L = z80->C; } /* LD L,C */
+OP(op,6a) { z80->L = z80->D; } /* LD L,D */
+OP(op,6b) { z80->L = z80->E; } /* LD L,E */
+OP(op,6c) { z80->L = z80->H; } /* LD L,H */
+OP(op,6d) { } /* LD L,L */
+OP(op,6e) { z80->L = RM(z80, z80->HL); } /* LD L,(HL) */
+OP(op,6f) { z80->L = z80->A; } /* LD L,A */
+
+OP(op,70) { WM(z80, z80->HL, z80->B); } /* LD (HL),B */
+OP(op,71) { WM(z80, z80->HL, z80->C); } /* LD (HL),C */
+OP(op,72) { WM(z80, z80->HL, z80->D); } /* LD (HL),D */
+OP(op,73) { WM(z80, z80->HL, z80->E); } /* LD (HL),E */
+OP(op,74) { WM(z80, z80->HL, z80->H); } /* LD (HL),H */
+OP(op,75) { WM(z80, z80->HL, z80->L); } /* LD (HL),L */
+OP(op,76) { ENTER_HALT(z80); } /* halt */
+OP(op,77) { WM(z80, z80->HL, z80->A); } /* LD (HL),A */
+
+OP(op,78) { z80->A = z80->B; } /* LD A,B */
+OP(op,79) { z80->A = z80->C; } /* LD A,C */
+OP(op,7a) { z80->A = z80->D; } /* LD A,D */
+OP(op,7b) { z80->A = z80->E; } /* LD A,E */
+OP(op,7c) { z80->A = z80->H; } /* LD A,H */
+OP(op,7d) { z80->A = z80->L; } /* LD A,L */
+OP(op,7e) { z80->A = RM(z80, z80->HL); } /* LD A,(HL) */
+OP(op,7f) { } /* LD A,A */
+
+OP(op,80) { ADD(z80, z80->B); } /* ADD A,B */
+OP(op,81) { ADD(z80, z80->C); } /* ADD A,C */
+OP(op,82) { ADD(z80, z80->D); } /* ADD A,D */
+OP(op,83) { ADD(z80, z80->E); } /* ADD A,E */
+OP(op,84) { ADD(z80, z80->H); } /* ADD A,H */
+OP(op,85) { ADD(z80, z80->L); } /* ADD A,L */
+OP(op,86) { ADD(z80, RM(z80, z80->HL)); } /* ADD A,(HL) */
+OP(op,87) { ADD(z80, z80->A); } /* ADD A,A */
+
+OP(op,88) { ADC(z80, z80->B); } /* ADC A,B */
+OP(op,89) { ADC(z80, z80->C); } /* ADC A,C */
+OP(op,8a) { ADC(z80, z80->D); } /* ADC A,D */
+OP(op,8b) { ADC(z80, z80->E); } /* ADC A,E */
+OP(op,8c) { ADC(z80, z80->H); } /* ADC A,H */
+OP(op,8d) { ADC(z80, z80->L); } /* ADC A,L */
+OP(op,8e) { ADC(z80, RM(z80, z80->HL)); } /* ADC A,(HL) */
+OP(op,8f) { ADC(z80, z80->A); } /* ADC A,A */
+
+OP(op,90) { SUB(z80, z80->B); } /* SUB B */
+OP(op,91) { SUB(z80, z80->C); } /* SUB C */
+OP(op,92) { SUB(z80, z80->D); } /* SUB D */
+OP(op,93) { SUB(z80, z80->E); } /* SUB E */
+OP(op,94) { SUB(z80, z80->H); } /* SUB H */
+OP(op,95) { SUB(z80, z80->L); } /* SUB L */
+OP(op,96) { SUB(z80, RM(z80, z80->HL)); } /* SUB (HL) */
+OP(op,97) { SUB(z80, z80->A); } /* SUB A */
+
+OP(op,98) { SBC(z80, z80->B); } /* SBC A,B */
+OP(op,99) { SBC(z80, z80->C); } /* SBC A,C */
+OP(op,9a) { SBC(z80, z80->D); } /* SBC A,D */
+OP(op,9b) { SBC(z80, z80->E); } /* SBC A,E */
+OP(op,9c) { SBC(z80, z80->H); } /* SBC A,H */
+OP(op,9d) { SBC(z80, z80->L); } /* SBC A,L */
+OP(op,9e) { SBC(z80, RM(z80, z80->HL)); } /* SBC A,(HL) */
+OP(op,9f) { SBC(z80, z80->A); } /* SBC A,A */
+
+OP(op,a0) { AND(z80, z80->B); } /* AND B */
+OP(op,a1) { AND(z80, z80->C); } /* AND C */
+OP(op,a2) { AND(z80, z80->D); } /* AND D */
+OP(op,a3) { AND(z80, z80->E); } /* AND E */
+OP(op,a4) { AND(z80, z80->H); } /* AND H */
+OP(op,a5) { AND(z80, z80->L); } /* AND L */
+OP(op,a6) { AND(z80, RM(z80, z80->HL)); } /* AND (HL) */
+OP(op,a7) { AND(z80, z80->A); } /* AND A */
+
+OP(op,a8) { XOR(z80, z80->B); } /* XOR B */
+OP(op,a9) { XOR(z80, z80->C); } /* XOR C */
+OP(op,aa) { XOR(z80, z80->D); } /* XOR D */
+OP(op,ab) { XOR(z80, z80->E); } /* XOR E */
+OP(op,ac) { XOR(z80, z80->H); } /* XOR H */
+OP(op,ad) { XOR(z80, z80->L); } /* XOR L */
+OP(op,ae) { XOR(z80, RM(z80, z80->HL)); } /* XOR (HL) */
+OP(op,af) { XOR(z80, z80->A); } /* XOR A */
+
+OP(op,b0) { OR(z80, z80->B); } /* OR B */
+OP(op,b1) { OR(z80, z80->C); } /* OR C */
+OP(op,b2) { OR(z80, z80->D); } /* OR D */
+OP(op,b3) { OR(z80, z80->E); } /* OR E */
+OP(op,b4) { OR(z80, z80->H); } /* OR H */
+OP(op,b5) { OR(z80, z80->L); } /* OR L */
+OP(op,b6) { OR(z80, RM(z80, z80->HL)); } /* OR (HL) */
+OP(op,b7) { OR(z80, z80->A); } /* OR A */
+
+OP(op,b8) { CP(z80, z80->B); } /* CP B */
+OP(op,b9) { CP(z80, z80->C); } /* CP C */
+OP(op,ba) { CP(z80, z80->D); } /* CP D */
+OP(op,bb) { CP(z80, z80->E); } /* CP E */
+OP(op,bc) { CP(z80, z80->H); } /* CP H */
+OP(op,bd) { CP(z80, z80->L); } /* CP L */
+OP(op,be) { CP(z80, RM(z80, z80->HL)); } /* CP (HL) */
+OP(op,bf) { CP(z80, z80->A); } /* CP A */
+
+OP(op,c0) { RET_COND(z80, !(z80->F & ZF), 0xc0); } /* RET NZ */
+OP(op,c1) { POP(z80, bc); } /* POP BC */
+OP(op,c2) { JP_COND(z80, !(z80->F & ZF)); } /* JP NZ,a */
+OP(op,c3) { JP(z80); } /* JP a */
+OP(op,c4) { CALL_COND(z80, !(z80->F & ZF), 0xc4); } /* CALL NZ,a */
+OP(op,c5) { PUSH(z80, bc); } /* PUSH BC */
+OP(op,c6) { ADD(z80, ARG(z80)); } /* ADD A,n */
+OP(op,c7) { RST(z80, 0x00); } /* RST 0 */
+
+OP(op,c8) { RET_COND(z80, z80->F & ZF, 0xc8); } /* RET Z */
+OP(op,c9) { POP(z80, pc); z80->WZ=z80->PCD; } /* RET */
+OP(op,ca) { JP_COND(z80, z80->F & ZF); } /* JP Z,a */
+OP(op,cb) { z80->r++; EXEC(z80,cb,ROP(z80)); } /* **** CB xx */
+OP(op,cc) { CALL_COND(z80, z80->F & ZF, 0xcc); } /* CALL Z,a */
+OP(op,cd) { CALL(z80); } /* CALL a */
+OP(op,ce) { ADC(z80, ARG(z80)); } /* ADC A,n */
+OP(op,cf) { RST(z80, 0x08); } /* RST 1 */
+
+OP(op,d0) { RET_COND(z80, !(z80->F & CF), 0xd0); } /* RET NC */
+OP(op,d1) { POP(z80, de); } /* POP DE */
+OP(op,d2) { JP_COND(z80, !(z80->F & CF)); } /* JP NC,a */
+OP(op,d3) { unsigned n = ARG(z80) | (z80->A << 8); OUT(z80, n, z80->A); z80->WZ_L = ((n & 0xff) + 1) & 0xff; z80->WZ_H = z80->A; } /* OUT (n),A */
+OP(op,d4) { CALL_COND(z80, !(z80->F & CF), 0xd4); } /* CALL NC,a */
+OP(op,d5) { PUSH(z80, de); } /* PUSH DE */
+OP(op,d6) { SUB(z80, ARG(z80)); } /* SUB n */
+OP(op,d7) { RST(z80, 0x10); } /* RST 2 */
+
+OP(op,d8) { RET_COND(z80, z80->F & CF, 0xd8); } /* RET C */
+OP(op,d9) { EXX(z80); } /* EXX */
+OP(op,da) { JP_COND(z80, z80->F & CF); } /* JP C,a */
+OP(op,db) { unsigned n = ARG(z80) | (z80->A << 8); z80->A = IN(z80, n); z80->WZ = n + 1; } /* IN A,(n) */
+OP(op,dc) { CALL_COND(z80, z80->F & CF, 0xdc); } /* CALL C,a */
+OP(op,dd) { z80->r++; EXEC(z80,dd,ROP(z80)); } /* **** DD xx */
+OP(op,de) { SBC(z80, ARG(z80)); } /* SBC A,n */
+OP(op,df) { RST(z80, 0x18); } /* RST 3 */
+
+OP(op,e0) { RET_COND(z80, !(z80->F & PF), 0xe0); } /* RET PO */
+OP(op,e1) { POP(z80, hl); } /* POP HL */
+OP(op,e2) { JP_COND(z80, !(z80->F & PF)); } /* JP PO,a */
+OP(op,e3) { EXSP(z80, hl); } /* EX HL,(SP) */
+OP(op,e4) { CALL_COND(z80, !(z80->F & PF), 0xe4); } /* CALL PO,a */
+OP(op,e5) { PUSH(z80, hl); } /* PUSH HL */
+OP(op,e6) { AND(z80, ARG(z80)); } /* AND n */
+OP(op,e7) { RST(z80, 0x20); } /* RST 4 */
+
+OP(op,e8) { RET_COND(z80, z80->F & PF, 0xe8); } /* RET PE */
+OP(op,e9) { z80->PC = z80->HL; } /* JP (HL) */
+OP(op,ea) { JP_COND(z80, z80->F & PF); } /* JP PE,a */
+OP(op,eb) { EX_DE_HL(z80); } /* EX DE,HL */
+OP(op,ec) { CALL_COND(z80, z80->F & PF, 0xec); } /* CALL PE,a */
+OP(op,ed) { z80->r++; EXEC(z80,ed,ROP(z80)); } /* **** ED xx */
+OP(op,ee) { XOR(z80, ARG(z80)); } /* XOR n */
+OP(op,ef) { RST(z80, 0x28); } /* RST 5 */
+
+OP(op,f0) { RET_COND(z80, !(z80->F & SF), 0xf0); } /* RET P */
+OP(op,f1) { POP(z80, af); } /* POP AF */
+OP(op,f2) { JP_COND(z80, !(z80->F & SF)); } /* JP P,a */
+OP(op,f3) { z80->iff1 = z80->iff2 = 0; } /* DI */
+OP(op,f4) { CALL_COND(z80, !(z80->F & SF), 0xf4); } /* CALL P,a */
+OP(op,f5) { PUSH(z80, af); } /* PUSH AF */
+OP(op,f6) { OR(z80, ARG(z80)); } /* OR n */
+OP(op,f7) { RST(z80, 0x30); } /* RST 6 */
+
+OP(op,f8) { RET_COND(z80, z80->F & SF, 0xf8); } /* RET M */
+OP(op,f9) { z80->SP = z80->HL; } /* LD SP,HL */
+OP(op,fa) { JP_COND(z80, z80->F & SF); } /* JP M,a */
+OP(op,fb) { EI(z80); } /* EI */
+OP(op,fc) { CALL_COND(z80, z80->F & SF, 0xfc); } /* CALL M,a */
+OP(op,fd) { z80->r++; EXEC(z80,fd,ROP(z80)); } /* **** FD xx */
+OP(op,fe) { CP(z80, ARG(z80)); } /* CP n */
+OP(op,ff) { RST(z80, 0x38); } /* RST 7 */
static void take_interrupt(z80_state *z80)
@@ -3267,18 +3267,18 @@ static void take_interrupt(z80_state *z80)
{
switch (irq_vector & 0xff0000)
{
- case 0xcd0000: /* call */
+ case 0xcd0000: /* call */
PUSH(z80, pc);
z80->PCD = irq_vector & 0xffff;
- /* CALL $xxxx cycles */
+ /* CALL $xxxx cycles */
z80->icount -= z80->cc_op[0xcd];
break;
- case 0xc30000: /* jump */
+ case 0xc30000: /* jump */
z80->PCD = irq_vector & 0xffff;
/* JP $xxxx cycles */
z80->icount -= z80->cc_op[0xc3];
break;
- default: /* rst (or other opcodes?) */
+ default: /* rst (or other opcodes?) */
PUSH(z80, pc);
z80->PCD = irq_vector & 0x0038;
/* RST $xx cycles */
@@ -3341,9 +3341,9 @@ static CPU_INIT( z80 )
/* allocate big flag arrays once */
SZHVC_add = global_alloc_array(UINT8, 2*256*256);
SZHVC_sub = global_alloc_array(UINT8, 2*256*256);
- padd = &SZHVC_add[ 0*256];
+ padd = &SZHVC_add[ 0*256];
padc = &SZHVC_add[256*256];
- psub = &SZHVC_sub[ 0*256];
+ psub = &SZHVC_sub[ 0*256];
psbc = &SZHVC_sub[256*256];
for (oldval = 0; oldval < 256; oldval++)
{
@@ -3352,7 +3352,7 @@ static CPU_INIT( z80 )
/* add or adc w/o carry set */
val = newval - oldval;
*padd = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
- *padd |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *padd |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) < (oldval & 0x0f) ) *padd |= HF;
if( newval < oldval ) *padd |= CF;
if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padd |= VF;
@@ -3361,7 +3361,7 @@ static CPU_INIT( z80 )
/* adc with carry set */
val = newval - oldval - 1;
*padc = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
- *padc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *padc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) <= (oldval & 0x0f) ) *padc |= HF;
if( newval <= oldval ) *padc |= CF;
if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padc |= VF;
@@ -3370,7 +3370,7 @@ static CPU_INIT( z80 )
/* cp, sub or sbc w/o carry set */
val = oldval - newval;
*psub = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
- *psub |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *psub |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) > (oldval & 0x0f) ) *psub |= HF;
if( newval > oldval ) *psub |= CF;
if( (val^oldval) & (oldval^newval) & 0x80 ) *psub |= VF;
@@ -3379,7 +3379,7 @@ static CPU_INIT( z80 )
/* sbc with carry set */
val = oldval - newval - 1;
*psbc = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
- *psbc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
+ *psbc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
if( (newval & 0x0f) >= (oldval & 0x0f) ) *psbc |= HF;
if( newval >= oldval ) *psbc |= CF;
if( (val^oldval) & (oldval^newval) & 0x80 ) *psbc |= VF;
@@ -3400,9 +3400,9 @@ static CPU_INIT( z80 )
if( i&0x40 ) ++p;
if( i&0x80 ) ++p;
SZ[i] = i ? i & SF : ZF;
- SZ[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
+ SZ[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
SZ_BIT[i] = i ? i & SF : ZF | PF;
- SZ_BIT[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
+ SZ_BIT[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
SZP[i] = SZ[i] | ((p & 1) ? 0 : PF);
SZHV_inc[i] = SZ[i];
if( i == 0x80 ) SZHV_inc[i] |= VF;
@@ -3480,7 +3480,7 @@ static CPU_INIT( z80 )
z80->direct = &z80->program->direct();
z80->io = &device->space(AS_IO);
z80->IX = z80->IY = 0xffff; /* IX and IY are FFFF after a reset! */
- z80->F = ZF; /* Zero flag is set */
+ z80->F = ZF; /* Zero flag is set */
/* set up the state table */
{
@@ -3560,7 +3560,7 @@ static CPU_RESET( z80 )
z80->WZ=z80->PCD;
}
- static CPU_RESET( nsc800 )
+ static CPU_RESET( nsc800 )
{
z80_state *z80 = get_safe_token(device);
memset(z80->nsc800_irq_state, 0, sizeof(z80->nsc800_irq_state));
@@ -3588,8 +3588,8 @@ static CPU_EXECUTE( z80 )
if (z80->nmi_pending)
{
LOG(("Z80 '%s' take NMI\n", z80->device->tag()));
- z80->PRVPC = -1; /* there isn't a valid previous program counter */
- LEAVE_HALT(z80); /* Check if processor was halted */
+ z80->PRVPC = -1; /* there isn't a valid previous program counter */
+ LEAVE_HALT(z80); /* Check if processor was halted */
#if HAS_LDAIR_QUIRK
/* reset parity flag after LD A,I or LD A,R */
@@ -3626,7 +3626,7 @@ static CPU_EXECUTE( z80 )
} while (z80->icount > 0);
}
- static CPU_EXECUTE( nsc800 )
+ static CPU_EXECUTE( nsc800 )
{
z80_state *z80 = get_safe_token(device);
@@ -3636,8 +3636,8 @@ static CPU_EXECUTE( z80 )
if (z80->nmi_pending)
{
LOG(("Z80 '%s' take NMI\n", z80->device->tag()));
- z80->PRVPC = -1; /* there isn't a valid previous program counter */
- LEAVE_HALT(z80); /* Check if processor was halted */
+ z80->PRVPC = -1; /* there isn't a valid previous program counter */
+ LEAVE_HALT(z80); /* Check if processor was halted */
z80->iff1 = 0;
PUSH(z80, pc);
@@ -3812,10 +3812,10 @@ static CPU_SET_INFO( z80 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_BUSRQ: set_irq_line(z80, Z80_INPUT_LINE_BUSRQ, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(z80, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: set_irq_line(z80, INPUT_LINE_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_WAIT: set_irq_line(z80, Z80_INPUT_LINE_WAIT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_BUSRQ: set_irq_line(z80, Z80_INPUT_LINE_BUSRQ, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(z80, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: set_irq_line(z80, INPUT_LINE_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_WAIT: set_irq_line(z80, Z80_INPUT_LINE_WAIT, info->i); break;
}
}
@@ -3825,13 +3825,13 @@ static CPU_SET_INFO( nsc800 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_BUSRQ: set_irq_line(z80, Z80_INPUT_LINE_BUSRQ, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line_nsc800(z80, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NSC800_RSTA: set_irq_line_nsc800(z80, NSC800_RSTA, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NSC800_RSTB: set_irq_line_nsc800(z80, NSC800_RSTB, info->i); break;
- case CPUINFO_INT_INPUT_STATE + NSC800_RSTC: set_irq_line_nsc800(z80, NSC800_RSTC, info->i); break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: set_irq_line_nsc800(z80, INPUT_LINE_IRQ0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_WAIT: set_irq_line(z80, Z80_INPUT_LINE_WAIT, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_BUSRQ: set_irq_line(z80, Z80_INPUT_LINE_BUSRQ, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line_nsc800(z80, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NSC800_RSTA: set_irq_line_nsc800(z80, NSC800_RSTA, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NSC800_RSTB: set_irq_line_nsc800(z80, NSC800_RSTB, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + NSC800_RSTC: set_irq_line_nsc800(z80, NSC800_RSTC, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: set_irq_line_nsc800(z80, INPUT_LINE_IRQ0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_WAIT: set_irq_line(z80, Z80_INPUT_LINE_WAIT, info->i); break;
}
}
@@ -3858,49 +3858,49 @@ CPU_GET_INFO( z80 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z80_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_BUSRQ: info->i = z80->busrq_state; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = z80->nmi_state; break;
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: info->i = z80->irq_state; break;
- case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_WAIT: info->i = z80->wait_state; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z80_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 4; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 4; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 16; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_BUSRQ: info->i = z80->busrq_state; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = z80->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_IRQ0: info->i = z80->irq_state; break;
+ case CPUINFO_INT_INPUT_STATE + Z80_INPUT_LINE_WAIT: info->i = z80->wait_state; break;
/* --- the following bits of info are returned as pointers to functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z80); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z80); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z80); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z80); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z80); break;
- case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z80); break;
- case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z80); break;
- case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(z80); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z80); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z80); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z80); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z80); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z80); break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z80); break;
+ case CPUINFO_FCT_IMPORT_STATE: info->import_state = CPU_IMPORT_STATE_NAME(z80); break;
+ case CPUINFO_FCT_EXPORT_STATE: info->export_state = CPU_EXPORT_STATE_NAME(z80); break;
+ case CPUINFO_FCT_EXPORT_STRING: info->export_string = CPU_EXPORT_STRING_NAME(z80); break;
/* --- the following bits of info are returned as pointers --- */
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &z80->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Z80"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z80"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "3.9"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Z80"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z80"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "3.9"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
}
}
@@ -3909,20 +3909,20 @@ CPU_GET_INFO( nsc800 )
z80_state *z80 = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL;
switch (state)
{
- case CPUINFO_INT_INPUT_LINES: info->i = 7; break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 7; break;
- case CPUINFO_INT_INPUT_STATE + NSC800_RSTA: info->i = z80->nsc800_irq_state[NSC800_RSTA]; break;
- case CPUINFO_INT_INPUT_STATE + NSC800_RSTB: info->i = z80->nsc800_irq_state[NSC800_RSTB]; break;
- case CPUINFO_INT_INPUT_STATE + NSC800_RSTC: info->i = z80->nsc800_irq_state[NSC800_RSTC]; break;
+ case CPUINFO_INT_INPUT_STATE + NSC800_RSTA: info->i = z80->nsc800_irq_state[NSC800_RSTA]; break;
+ case CPUINFO_INT_INPUT_STATE + NSC800_RSTB: info->i = z80->nsc800_irq_state[NSC800_RSTB]; break;
+ case CPUINFO_INT_INPUT_STATE + NSC800_RSTC: info->i = z80->nsc800_irq_state[NSC800_RSTC]; break;
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(nsc800); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(nsc800); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(nsc800); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(nsc800); break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(nsc800); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(nsc800); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(nsc800); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(nsc800); break;
- case CPUINFO_STR_NAME: strcpy(info->s, "NSC800"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "NSC800"); break;
- default: CPU_GET_INFO_CALL(z80); break;
+ default: CPU_GET_INFO_CALL(z80); break;
}
}
diff --git a/src/emu/cpu/z80/z80.h b/src/emu/cpu/z80/z80.h
index b92c7174071..b284f1b868c 100644
--- a/src/emu/cpu/z80/z80.h
+++ b/src/emu/cpu/z80/z80.h
@@ -17,7 +17,7 @@ enum
Z80_PC, Z80_SP,
Z80_A, Z80_B, Z80_C, Z80_D, Z80_E, Z80_H, Z80_L,
Z80_AF, Z80_BC, Z80_DE, Z80_HL,
- Z80_IX, Z80_IY, Z80_AF2, Z80_BC2, Z80_DE2, Z80_HL2,
+ Z80_IX, Z80_IY, Z80_AF2, Z80_BC2, Z80_DE2, Z80_HL2,
Z80_R, Z80_I, Z80_IM, Z80_IFF1, Z80_IFF2, Z80_HALT,
Z80_DC0, Z80_DC1, Z80_DC2, Z80_DC3, Z80_WZ,
diff --git a/src/emu/cpu/z80/z80daisy.c b/src/emu/cpu/z80/z80daisy.c
index 9ecc46bcb4e..ce2597ce914 100644
--- a/src/emu/cpu/z80/z80daisy.c
+++ b/src/emu/cpu/z80/z80daisy.c
@@ -163,8 +163,8 @@ void z80_daisy_chain::call_reti_device()
z80_daisy_chain::daisy_entry::daisy_entry(device_t *device)
: m_next(NULL),
- m_device(device),
- m_interface(NULL)
+ m_device(device),
+ m_interface(NULL)
{
device->interface(m_interface);
}
diff --git a/src/emu/cpu/z80/z80daisy.h b/src/emu/cpu/z80/z80daisy.h
index 5dbfd66294b..7d527248988 100644
--- a/src/emu/cpu/z80/z80daisy.h
+++ b/src/emu/cpu/z80/z80daisy.h
@@ -18,8 +18,8 @@
//**************************************************************************
// these constants are returned from the irq_state function
-const UINT8 Z80_DAISY_INT = 0x01; // interrupt request mask
-const UINT8 Z80_DAISY_IEO = 0x02; // interrupt disable mask (IEO)
+const UINT8 Z80_DAISY_INT = 0x01; // interrupt request mask
+const UINT8 Z80_DAISY_IEO = 0x02; // interrupt disable mask (IEO)
@@ -32,7 +32,7 @@ const UINT8 Z80_DAISY_IEO = 0x02; // interrupt disable mask (IEO)
struct z80_daisy_config
{
- const char * devname; // name of the device
+ const char * devname; // name of the device
};
@@ -75,12 +75,12 @@ protected:
public:
daisy_entry(device_t *device);
- daisy_entry * m_next; // next device
- device_t * m_device; // associated device
- device_z80daisy_interface * m_interface; // associated device's daisy interface
+ daisy_entry * m_next; // next device
+ device_t * m_device; // associated device
+ device_z80daisy_interface * m_interface; // associated device's daisy interface
};
- daisy_entry * m_daisy_list; // head of the daisy chain
+ daisy_entry * m_daisy_list; // head of the daisy chain
};
diff --git a/src/emu/cpu/z80/z80dasm.c b/src/emu/cpu/z80/z80dasm.c
index f9cd3a72d78..00485bab86a 100644
--- a/src/emu/cpu/z80/z80dasm.c
+++ b/src/emu/cpu/z80/z80dasm.c
@@ -25,15 +25,15 @@
enum e_mnemonics
{
- zADC ,zADD ,zAND ,zBIT ,zCALL ,zCCF ,zCP ,zCPD ,
- zCPDR ,zCPI ,zCPIR ,zCPL ,zDAA ,zDB ,zDEC ,zDI ,
- zDJNZ ,zEI ,zEX ,zEXX ,zHLT ,zIM ,zIN ,zINC ,
- zIND ,zINDR ,zINI ,zINIR ,zJP ,zJR ,zLD ,zLDD ,
- zLDDR ,zLDI ,zLDIR ,zNEG ,zNOP ,zOR ,zOTDR ,zOTIR ,
- zOUT ,zOUTD ,zOUTI ,zPOP ,zPUSH ,zRES ,zRET ,zRETI ,
- zRETN ,zRL ,zRLA ,zRLC ,zRLCA ,zRLD ,zRR ,zRRA ,
- zRRC ,zRRCA ,zRRD ,zRST ,zSBC ,zSCF ,zSET ,zSLA ,
- zSLL ,zSRA ,zSRL ,zSUB ,zXOR
+ zADC ,zADD ,zAND ,zBIT ,zCALL ,zCCF ,zCP ,zCPD ,
+ zCPDR ,zCPI ,zCPIR ,zCPL ,zDAA ,zDB ,zDEC ,zDI ,
+ zDJNZ ,zEI ,zEX ,zEXX ,zHLT ,zIM ,zIN ,zINC ,
+ zIND ,zINDR ,zINI ,zINIR ,zJP ,zJR ,zLD ,zLDD ,
+ zLDDR ,zLDI ,zLDIR ,zNEG ,zNOP ,zOR ,zOTDR ,zOTIR ,
+ zOUT ,zOUTD ,zOUTI ,zPOP ,zPUSH ,zRES ,zRET ,zRETI ,
+ zRETN ,zRL ,zRLA ,zRLC ,zRLCA ,zRLD ,zRR ,zRRA ,
+ zRRC ,zRRCA ,zRRD ,zRST ,zSBC ,zSCF ,zSET ,zSLA ,
+ zSLL ,zSRA ,zSRL ,zSUB ,zXOR
};
static const char *const s_mnemonic[] =
@@ -226,7 +226,7 @@ static const z80dasm mnemonic_ed[256] =
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zIN,"b,(c)"}, {zOUT,"(c),b"}, {zSBC,"hl,bc"}, {zLD,"(W),bc"},
- {zNEG,0}, {zRETN,0}, {zIM,"0"}, {zLD,"i,a"},
+ {zNEG,0}, {zRETN,0}, {zIM,"0"}, {zLD,"i,a"},
{zIN,"c,(c)"}, {zOUT,"(c),c"}, {zADC,"hl,bc"}, {zLD,"bc,(W)"},
{zNEG,"*"}, {zRETI,0}, {zIM,"0"}, {zLD,"r,a"},
{zIN,"d,(c)"}, {zOUT,"(c),d"}, {zSBC,"hl,de"}, {zLD,"(W),de"},
@@ -249,13 +249,13 @@ static const z80dasm mnemonic_ed[256] =
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDI,0}, {zCPI,0}, {zINI,0}, {zOUTI,0},
+ {zLDI,0}, {zCPI,0}, {zINI,0}, {zOUTI,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDD,0}, {zCPD,0}, {zIND,0}, {zOUTD,0},
+ {zLDD,0}, {zCPD,0}, {zIND,0}, {zOUTD,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDIR,0}, {zCPIR,0}, {zINIR,0}, {zOTIR,0},
+ {zLDIR,0}, {zCPIR,0}, {zINIR,0}, {zOTIR,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDDR,0}, {zCPDR,0}, {zINDR,0}, {zOTDR,0},
+ {zLDDR,0}, {zCPDR,0}, {zINDR,0}, {zOTDR,0},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
@@ -345,7 +345,7 @@ static const z80dasm mnemonic_xx[256] =
static const z80dasm mnemonic_main[256] =
{
- {zNOP,0}, {zLD,"bc,N"}, {zLD,"(bc),a"}, {zINC,"bc"},
+ {zNOP,0}, {zLD,"bc,N"}, {zLD,"(bc),a"}, {zINC,"bc"},
{zINC,"b"}, {zDEC,"b"}, {zLD,"b,B"}, {zRLCA,0},
{zEX,"af,af'"}, {zADD,"hl,bc"}, {zLD,"a,(bc)"}, {zDEC,"bc"},
{zINC,"c"}, {zDEC,"c"}, {zLD,"c,B"}, {zRRCA,0},
@@ -427,7 +427,7 @@ static int offs(INT8 offset)
****************************************************************************/
CPU_DISASSEMBLE( z80 )
{
- const z80dasm *d;
+ const z80dasm *d;
const char *src, *ixy;
char *dst;
INT8 offset = 0;
diff --git a/src/emu/cpu/z8000/8000dasm.c b/src/emu/cpu/z8000/8000dasm.c
index c3fc111235d..d88c4f8c862 100644
--- a/src/emu/cpu/z8000/8000dasm.c
+++ b/src/emu/cpu/z8000/8000dasm.c
@@ -48,9 +48,9 @@
#include "z8000.h"
#include "z8000cpu.h"
-static int n[16]; /* opcode nibbles */
-static int b[8]; /* opcode bytes */
-static int w[4]; /* opcode words */
+static int n[16]; /* opcode nibbles */
+static int b[8]; /* opcode bytes */
+static int w[4]; /* opcode words */
static void GET_OP(const UINT8 *oprom, int i, unsigned offset)
{
@@ -93,7 +93,7 @@ CPU_DISASSEMBLE( z8000 )
if(z8000_exec == NULL)
z8000_init_tables();
- GET_OP(oprom, 0, new_pc - pc);
+ GET_OP(oprom, 0, new_pc - pc);
new_pc += 2;
switch (pc)
{
@@ -102,10 +102,10 @@ CPU_DISASSEMBLE( z8000 )
break;
case 0x0002:
dst += sprintf(dst, ".word #%%%04x ;RST FCW", w[0]);
- break;
+ break;
case 0x0004:
dst += sprintf(dst, ".word #%%%04x ;RST PC", w[0]);
- break;
+ break;
default:
o = &z8000_exec[w[0]];
if (o->size > 1) { GET_OP(oprom, 1, new_pc - pc); new_pc += 2; }
@@ -220,11 +220,11 @@ CPU_DISASSEMBLE( z8000 )
case 0x1a8: dst += sprintf(dst, "outd "); break;
case 0x1b0: dst += sprintf(dst, "soutd "); break;
case 0x1b8: dst += sprintf(dst, "sotdr "); flags = DASMFLAG_STEP_OVER; break;
- default:
+ default:
dst += sprintf(dst, "unk(0x%x)", tmp);
}
- break;
- case 'a':
+ break;
+ case 'a':
/* address */
src++;
i = *src++ - '0';
@@ -248,7 +248,7 @@ CPU_DISASSEMBLE( z8000 )
/* condition code */
src++;
i = *src++ - '0';
- if (n[i] == 8) { /* always? */
+ if (n[i] == 8) { /* always? */
/* skip following comma */
if (*src == ',')
src++;
@@ -346,4 +346,3 @@ CPU_DISASSEMBLE( z8000 )
}
return (new_pc - pc) | flags | DASMFLAG_SUPPORTED;
}
-
diff --git a/src/emu/cpu/z8000/makedab.c b/src/emu/cpu/z8000/makedab.c
index e9ec0fe91c6..cebce6e42c5 100644
--- a/src/emu/cpu/z8000/makedab.c
+++ b/src/emu/cpu/z8000/makedab.c
@@ -1,8 +1,8 @@
#include <stdio.h>
-#define CF 0x100
-#define HF 0x200
-#define DF 0x400
+#define CF 0x100
+#define HF 0x200
+#define DF 0x400
int dab[0x800];
@@ -36,52 +36,52 @@ int main(int ac, char **av)
return 1;
}
- }
- }
+ }
+ }
- if (i & CF) {
+ if (i & CF) {
if (i & HF) {
dab[DF+i] = CF | ((i + 0x9a) & 0xff);
} else {
dab[DF+i] = CF | ((i + 0xa0) & 0xff);
- }
+ }
} else {
if (i & HF) {
dab[DF+i] = CF | ((i + 0xfa) & 0xff);
- } else {
+ } else {
dab[DF+i] = (i & 0xff);
- }
- }
- }
+ }
+ }
+ }
printf("/************************************************ \n");
- printf(" * Result table for Z8000 DAB instruction \n");
- printf(" * \n");
- printf(" * bits description \n");
- printf(" * ---------------------------------------------- \n");
- printf(" * 0..7 destination value \n");
- printf(" * 8 carry flag before \n");
- printf(" * 9 half carry flag before \n");
- printf(" * 10 D flag (0 add/adc, 1 sub/sbc) \n");
- printf(" * \n");
- printf(" * result description \n");
- printf(" * ---------------------------------------------- \n");
- printf(" * 0..7 result value \n");
- printf(" * 8 carry flag after \n");
- printf(" ************************************************/\n");
- printf("static const UINT16 Z8000_dab[0x800] = {\n");
- for (i = 0; i < 0x800; i++) {
+ printf(" * Result table for Z8000 DAB instruction \n");
+ printf(" * \n");
+ printf(" * bits description \n");
+ printf(" * ---------------------------------------------- \n");
+ printf(" * 0..7 destination value \n");
+ printf(" * 8 carry flag before \n");
+ printf(" * 9 half carry flag before \n");
+ printf(" * 10 D flag (0 add/adc, 1 sub/sbc) \n");
+ printf(" * \n");
+ printf(" * result description \n");
+ printf(" * ---------------------------------------------- \n");
+ printf(" * 0..7 result value \n");
+ printf(" * 8 carry flag after \n");
+ printf(" ************************************************/\n");
+ printf("static const UINT16 Z8000_dab[0x800] = {\n");
+ for (i = 0; i < 0x800; i++) {
if ((i & 0x3ff) == 0) {
if (i & 0x400)
printf("\t/* sub/sbc results */\n");
else
printf("\t/* add/adc results */\n");
}
- if ((i & 7) == 0) printf("\t");
+ if ((i & 7) == 0) printf("\t");
printf("0x%03x,",dab[i]);
if ((i & 7) == 7) printf("\n");
}
printf("};\n");
- return 0;
+ return 0;
}
diff --git a/src/emu/cpu/z8000/z8000.c b/src/emu/cpu/z8000/z8000.c
index 725b6b03f81..51814ab745a 100644
--- a/src/emu/cpu/z8000/z8000.c
+++ b/src/emu/cpu/z8000/z8000.c
@@ -54,34 +54,34 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
union z8000_reg_file
{
- UINT8 B[16]; /* RL0,RH0,RL1,RH1...RL7,RH7 */
- UINT16 W[16]; /* R0,R1,R2...R15 */
- UINT32 L[8]; /* RR0,RR2,RR4..RR14 */
- UINT64 Q[4]; /* RQ0,RQ4,..RQ12 */
+ UINT8 B[16]; /* RL0,RH0,RL1,RH1...RL7,RH7 */
+ UINT16 W[16]; /* R0,R1,R2...R15 */
+ UINT32 L[8]; /* RR0,RR2,RR4..RR14 */
+ UINT64 Q[4]; /* RQ0,RQ4,..RQ12 */
};
struct z8000_state
{
- UINT32 op[4]; /* opcodes/data of current instruction */
- UINT32 ppc; /* previous program counter */
- UINT32 pc; /* program counter */
- UINT16 psapseg; /* program status pointer, segment (Z8001 only) */
- UINT16 psapoff; /* program status pointer, offset */
- UINT16 fcw; /* flags and control word */
- UINT16 refresh; /* refresh timer/counter */
- UINT16 nspseg; /* system stack pointer, segment (Z8001 only) */
- UINT16 nspoff; /* system stack pointer, offset */
- UINT16 irq_req; /* CPU is halted, interrupt or trap request */
- UINT16 irq_srv; /* serviced interrupt request */
- UINT16 irq_vec; /* interrupt vector */
- unsigned int op_valid; /* bit field indicating if given op[] field is already initialized */
- z8000_reg_file regs;/* registers */
- int nmi_state; /* NMI line state */
- int irq_state[2]; /* IRQ line states (NVI, VI) */
+ UINT32 op[4]; /* opcodes/data of current instruction */
+ UINT32 ppc; /* previous program counter */
+ UINT32 pc; /* program counter */
+ UINT16 psapseg; /* program status pointer, segment (Z8001 only) */
+ UINT16 psapoff; /* program status pointer, offset */
+ UINT16 fcw; /* flags and control word */
+ UINT16 refresh; /* refresh timer/counter */
+ UINT16 nspseg; /* system stack pointer, segment (Z8001 only) */
+ UINT16 nspoff; /* system stack pointer, offset */
+ UINT16 irq_req; /* CPU is halted, interrupt or trap request */
+ UINT16 irq_srv; /* serviced interrupt request */
+ UINT16 irq_vec; /* interrupt vector */
+ unsigned int op_valid; /* bit field indicating if given op[] field is already initialized */
+ z8000_reg_file regs;/* registers */
+ int nmi_state; /* NMI line state */
+ int irq_state[2]; /* IRQ line states (NVI, VI) */
device_irq_acknowledge_callback irq_callback;
legacy_cpu_device *device;
address_space *program;
@@ -129,83 +129,83 @@ INLINE UINT32 addr_sub(z8000_state *cpustate, UINT32 addr, UINT32 subtrahend)
INLINE UINT16 RDOP(z8000_state *cpustate)
{
UINT16 res = cpustate->program->read_word(cpustate->pc);
- cpustate->pc += 2;
- return res;
+ cpustate->pc += 2;
+ return res;
}
INLINE UINT32 get_operand (z8000_state *cpustate, int opnum)
{
- int i;
- assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
+ int i;
+ assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
- for (i = 0; i < opnum; i++)
- assert (cpustate->op_valid & (1 << i));
+ for (i = 0; i < opnum; i++)
+ assert (cpustate->op_valid & (1 << i));
- if (! (cpustate->op_valid & (1 << opnum)))
- {
- cpustate->op[opnum] = cpustate->program->read_word(cpustate->pc);
- cpustate->pc += 2;
- cpustate->op_valid |= (1 << opnum);
- }
- return cpustate->op[opnum];
+ if (! (cpustate->op_valid & (1 << opnum)))
+ {
+ cpustate->op[opnum] = cpustate->program->read_word(cpustate->pc);
+ cpustate->pc += 2;
+ cpustate->op_valid |= (1 << opnum);
+ }
+ return cpustate->op[opnum];
}
INLINE UINT32 get_addr_operand (z8000_state *cpustate, int opnum)
{
- int i;
- assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
-
- for (i = 0; i < opnum; i++)
- assert (cpustate->op_valid & (1 << i));
-
- if (! (cpustate->op_valid & (1 << opnum)))
- {
- UINT32 seg = cpustate->program->read_word(cpustate->pc);
- cpustate->pc += 2;
- if (segmented_mode(cpustate))
- {
- if (seg & 0x8000)
- {
- cpustate->op[opnum] = ((seg & 0x7f00) << 8) | cpustate->program->read_word(cpustate->pc);
- cpustate->pc += 2;
- }
- else
- cpustate->op[opnum] = ((seg & 0x7f00) << 8) | (seg & 0xff);
- }
- else
- cpustate->op[opnum] = seg;
- cpustate->op_valid |= (1 << opnum);
- }
- return cpustate->op[opnum];
+ int i;
+ assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
+
+ for (i = 0; i < opnum; i++)
+ assert (cpustate->op_valid & (1 << i));
+
+ if (! (cpustate->op_valid & (1 << opnum)))
+ {
+ UINT32 seg = cpustate->program->read_word(cpustate->pc);
+ cpustate->pc += 2;
+ if (segmented_mode(cpustate))
+ {
+ if (seg & 0x8000)
+ {
+ cpustate->op[opnum] = ((seg & 0x7f00) << 8) | cpustate->program->read_word(cpustate->pc);
+ cpustate->pc += 2;
+ }
+ else
+ cpustate->op[opnum] = ((seg & 0x7f00) << 8) | (seg & 0xff);
+ }
+ else
+ cpustate->op[opnum] = seg;
+ cpustate->op_valid |= (1 << opnum);
+ }
+ return cpustate->op[opnum];
}
INLINE UINT32 get_raw_addr_operand (z8000_state *cpustate, int opnum)
{
- int i;
- assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
-
- for (i = 0; i < opnum; i++)
- assert (cpustate->op_valid & (1 << i));
-
- if (! (cpustate->op_valid & (1 << opnum)))
- {
- UINT32 seg = cpustate->program->read_word(cpustate->pc);
- cpustate->pc += 2;
- if (segmented_mode(cpustate))
- {
- if (seg & 0x8000)
- {
- cpustate->op[opnum] = (seg << 16) | cpustate->program->read_word(cpustate->pc);
- cpustate->pc += 2;
- }
- else
- cpustate->op[opnum] = (seg << 16) | (seg & 0xff);
- }
- else
- cpustate->op[opnum] = seg;
- cpustate->op_valid |= (1 << opnum);
- }
- return cpustate->op[opnum];
+ int i;
+ assert (cpustate->device->type() == Z8001 || cpustate->device->type() == Z8002);
+
+ for (i = 0; i < opnum; i++)
+ assert (cpustate->op_valid & (1 << i));
+
+ if (! (cpustate->op_valid & (1 << opnum)))
+ {
+ UINT32 seg = cpustate->program->read_word(cpustate->pc);
+ cpustate->pc += 2;
+ if (segmented_mode(cpustate))
+ {
+ if (seg & 0x8000)
+ {
+ cpustate->op[opnum] = (seg << 16) | cpustate->program->read_word(cpustate->pc);
+ cpustate->pc += 2;
+ }
+ else
+ cpustate->op[opnum] = (seg << 16) | (seg & 0xff);
+ }
+ else
+ cpustate->op[opnum] = seg;
+ cpustate->op_valid |= (1 << opnum);
+ }
+ return cpustate->op[opnum];
}
INLINE UINT32 adjust_addr_for_nonseg_mode(z8000_state *cpustate, UINT32 addr)
@@ -230,11 +230,11 @@ INLINE UINT16 RDMEM_W(z8000_state *cpustate, address_spacenum spacenum, UINT32 a
{
addr = adjust_addr_for_nonseg_mode(cpustate, addr);
addr &= ~1;
- /* hack for m20 driver: BIOS accesses 0x7f0000 and expects a segmentation violation */
- if (addr >= 0x7f0000) {
- cpustate->irq_req = Z8000_SEGTRAP;
- return 0xffff;
- }
+ /* hack for m20 driver: BIOS accesses 0x7f0000 and expects a segmentation violation */
+ if (addr >= 0x7f0000) {
+ cpustate->irq_req = Z8000_SEGTRAP;
+ return 0xffff;
+ }
if (spacenum == AS_PROGRAM)
return cpustate->program->read_word(addr);
else
@@ -310,15 +310,15 @@ INLINE UINT16 RDPORT_W(z8000_state *cpustate, int mode, UINT16 addr)
{
if(mode == 0)
{
- if (cpustate->device->type() == Z8001)
- {
- return cpustate->io->read_word((UINT16)addr);
- }
- else
- {
- return cpustate->io->read_byte((UINT16)(addr)) +
- (cpustate->io->read_byte((UINT16)(addr+1)) << 8);
- }
+ if (cpustate->device->type() == Z8001)
+ {
+ return cpustate->io->read_word((UINT16)addr);
+ }
+ else
+ {
+ return cpustate->io->read_byte((UINT16)(addr)) +
+ (cpustate->io->read_byte((UINT16)(addr+1)) << 8);
+ }
}
else
{
@@ -331,32 +331,32 @@ INLINE void WRPORT_B(z8000_state *cpustate, int mode, UINT16 addr, UINT8 value)
{
if(mode == 0)
{
- cpustate->io->write_byte(addr,value);
+ cpustate->io->write_byte(addr,value);
}
else
{
/* how to handle MMU writes? */
- }
+ }
}
INLINE void WRPORT_W(z8000_state *cpustate, int mode, UINT16 addr, UINT16 value)
{
if(mode == 0)
{
- if (cpustate->device->type() == Z8001)
- {
- cpustate->io->write_word((UINT16)addr, value);
- }
- else
- {
- cpustate->io->write_byte((UINT16)(addr),value & 0xff);
- cpustate->io->write_byte((UINT16)(addr+1),(value >> 8) & 0xff);
- }
+ if (cpustate->device->type() == Z8001)
+ {
+ cpustate->io->write_word((UINT16)addr, value);
+ }
+ else
+ {
+ cpustate->io->write_byte((UINT16)(addr),value & 0xff);
+ cpustate->io->write_byte((UINT16)(addr+1),(value >> 8) & 0xff);
+ }
}
else
{
/* how to handle MMU writes? */
- }
+ }
}
INLINE void cycles(z8000_state *cpustate, int cycles)
@@ -369,55 +369,55 @@ INLINE void cycles(z8000_state *cpustate, int cycles)
INLINE void set_irq(z8000_state *cpustate, int type)
{
- switch ((type >> 8) & 255)
- {
- case Z8000_EPU >> 8:
- if (cpustate->irq_srv >= Z8000_EPU)
- return;
- cpustate->irq_req = type;
- break;
- case Z8000_TRAP >> 8:
- if (cpustate->irq_srv >= Z8000_TRAP)
- return; /* double TRAP.. very bad :( */
- cpustate->irq_req = type;
- break;
- case Z8000_NMI >> 8:
- if (cpustate->irq_srv >= Z8000_NMI)
- return; /* no NMIs inside trap */
- cpustate->irq_req = type;
- break;
- case Z8000_SEGTRAP >> 8:
- if (cpustate->irq_srv >= Z8000_SEGTRAP)
- return; /* no SEGTRAPs inside NMI/TRAP */
- cpustate->irq_req = type;
- break;
- case Z8000_NVI >> 8:
- if (cpustate->irq_srv >= Z8000_NVI)
- return; /* no NVIs inside SEGTRAP/NMI/TRAP */
- cpustate->irq_req = type;
- break;
- case Z8000_VI >> 8:
- if (cpustate->irq_srv >= Z8000_VI)
- return; /* no VIs inside NVI/SEGTRAP/NMI/TRAP */
- cpustate->irq_req = type;
- break;
- case Z8000_SYSCALL >> 8:
- LOG(("Z8K '%s' SYSCALL $%02x\n", cpustate->device->tag(), type & 0xff));
- cpustate->irq_req = type;
- break;
- default:
- logerror("Z8000 invalid Cause_Interrupt %04x\n", type);
- return;
- }
- /* set interrupt request flag, reset HALT flag */
- cpustate->irq_req = type & ~Z8000_HALT;
+ switch ((type >> 8) & 255)
+ {
+ case Z8000_EPU >> 8:
+ if (cpustate->irq_srv >= Z8000_EPU)
+ return;
+ cpustate->irq_req = type;
+ break;
+ case Z8000_TRAP >> 8:
+ if (cpustate->irq_srv >= Z8000_TRAP)
+ return; /* double TRAP.. very bad :( */
+ cpustate->irq_req = type;
+ break;
+ case Z8000_NMI >> 8:
+ if (cpustate->irq_srv >= Z8000_NMI)
+ return; /* no NMIs inside trap */
+ cpustate->irq_req = type;
+ break;
+ case Z8000_SEGTRAP >> 8:
+ if (cpustate->irq_srv >= Z8000_SEGTRAP)
+ return; /* no SEGTRAPs inside NMI/TRAP */
+ cpustate->irq_req = type;
+ break;
+ case Z8000_NVI >> 8:
+ if (cpustate->irq_srv >= Z8000_NVI)
+ return; /* no NVIs inside SEGTRAP/NMI/TRAP */
+ cpustate->irq_req = type;
+ break;
+ case Z8000_VI >> 8:
+ if (cpustate->irq_srv >= Z8000_VI)
+ return; /* no VIs inside NVI/SEGTRAP/NMI/TRAP */
+ cpustate->irq_req = type;
+ break;
+ case Z8000_SYSCALL >> 8:
+ LOG(("Z8K '%s' SYSCALL $%02x\n", cpustate->device->tag(), type & 0xff));
+ cpustate->irq_req = type;
+ break;
+ default:
+ logerror("Z8000 invalid Cause_Interrupt %04x\n", type);
+ return;
+ }
+ /* set interrupt request flag, reset HALT flag */
+ cpustate->irq_req = type & ~Z8000_HALT;
}
#define PUSH_PC() do { \
if (cpustate->device->type() == Z8001) \
- PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc)); /* save current cpustate->pc */ \
- else \
- PUSHW(cpustate, SP, cpustate->pc); /* save current cpustate->pc */ \
+ PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc)); /* save current cpustate->pc */ \
+ else \
+ PUSHW(cpustate, SP, cpustate->pc); /* save current cpustate->pc */ \
} while (0)
#define GET_PC(VEC) (cpustate->device->type() == Z8001 ? segmented_addr(RDMEM_L(cpustate, AS_PROGRAM, VEC + 4)) : RDMEM_W(cpustate, AS_PROGRAM, VEC + 2))
@@ -426,116 +426,116 @@ if (cpustate->device->type() == Z8001) \
INLINE void Interrupt(z8000_state *cpustate)
{
- UINT16 fcw = cpustate->fcw;
-
- if (cpustate->irq_req & Z8000_NVI)
- {
- int type = (*cpustate->irq_callback)(cpustate->device, 0);
- set_irq(cpustate, type | Z8000_NVI);
- }
-
- if (cpustate->irq_req & Z8000_VI)
- {
- int type = (*cpustate->irq_callback)(cpustate->device, 1);
- set_irq(cpustate, type | Z8000_VI);
- }
-
- /* trap ? */
- if (cpustate->irq_req & Z8000_EPU)
- {
- CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
- PUSH_PC();
- PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
- PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
- cpustate->irq_srv = cpustate->irq_req;
- cpustate->irq_req &= ~Z8000_EPU;
- CHANGE_FCW(cpustate, GET_FCW(EPU));
- cpustate->pc = GET_PC(EPU);
- LOG(("Z8K '%s' ext instr trap $%04x\n", cpustate->device->tag(), cpustate->pc));
- }
- else
- if (cpustate->irq_req & Z8000_TRAP)
- {
- CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
- PUSH_PC();
- PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
- PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
- cpustate->irq_srv = cpustate->irq_req;
- cpustate->irq_req &= ~Z8000_TRAP;
- CHANGE_FCW(cpustate, GET_FCW(TRAP));
- cpustate->pc = GET_PC(TRAP);
- LOG(("Z8K '%s' priv instr trap $%04x\n", cpustate->device->tag(), cpustate->pc));
- }
- else
- if (cpustate->irq_req & Z8000_SYSCALL)
- {
- CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
- PUSH_PC();
- PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
- PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
- cpustate->irq_srv = cpustate->irq_req;
- cpustate->irq_req &= ~Z8000_SYSCALL;
- CHANGE_FCW(cpustate, GET_FCW(SYSCALL));
- cpustate->pc = GET_PC(SYSCALL);
- LOG(("Z8K '%s' syscall $%04x\n", cpustate->device->tag(), cpustate->pc));
- }
- else
- if (cpustate->irq_req & Z8000_SEGTRAP)
- {
- CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
- PUSH_PC();
- PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
- PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
- cpustate->irq_srv = cpustate->irq_req;
- cpustate->irq_req &= ~Z8000_SEGTRAP;
- CHANGE_FCW(cpustate, GET_FCW(SEGTRAP));
- cpustate->pc = GET_PC(SEGTRAP);
- LOG(("Z8K '%s' segtrap $%04x\n", cpustate->device->tag(), cpustate->pc));
- }
- else
- if (cpustate->irq_req & Z8000_NMI)
- {
- CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
- PUSH_PC();
- PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
- PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
- cpustate->irq_srv = cpustate->irq_req;
- cpustate->pc = RDMEM_W(cpustate, AS_PROGRAM, NMI);
- cpustate->irq_req &= ~Z8000_NMI;
- CHANGE_FCW(cpustate, GET_FCW(NMI));
- cpustate->pc = GET_PC(NMI);
- LOG(("Z8K '%s' NMI $%04x\n", cpustate->device->tag(), cpustate->pc));
- }
- else
- if ((cpustate->irq_req & Z8000_NVI) && (cpustate->fcw & F_NVIE))
- {
- CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
- PUSH_PC();
- PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
- PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
- cpustate->irq_srv = cpustate->irq_req;
- cpustate->pc = GET_PC(NVI);
- cpustate->irq_req &= ~Z8000_NVI;
- CHANGE_FCW(cpustate, GET_FCW(NVI));
- LOG(("Z8K '%s' NVI $%04x\n", cpustate->device->tag(), cpustate->pc));
- }
- else
- if ((cpustate->irq_req & Z8000_VI) && (cpustate->fcw & F_VIE))
- {
- CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
- PUSH_PC();
- PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
- PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
- cpustate->irq_srv = cpustate->irq_req;
+ UINT16 fcw = cpustate->fcw;
+
+ if (cpustate->irq_req & Z8000_NVI)
+ {
+ int type = (*cpustate->irq_callback)(cpustate->device, 0);
+ set_irq(cpustate, type | Z8000_NVI);
+ }
+
+ if (cpustate->irq_req & Z8000_VI)
+ {
+ int type = (*cpustate->irq_callback)(cpustate->device, 1);
+ set_irq(cpustate, type | Z8000_VI);
+ }
+
+ /* trap ? */
+ if (cpustate->irq_req & Z8000_EPU)
+ {
+ CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
+ PUSH_PC();
+ PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
+ PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
+ cpustate->irq_srv = cpustate->irq_req;
+ cpustate->irq_req &= ~Z8000_EPU;
+ CHANGE_FCW(cpustate, GET_FCW(EPU));
+ cpustate->pc = GET_PC(EPU);
+ LOG(("Z8K '%s' ext instr trap $%04x\n", cpustate->device->tag(), cpustate->pc));
+ }
+ else
+ if (cpustate->irq_req & Z8000_TRAP)
+ {
+ CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
+ PUSH_PC();
+ PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
+ PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
+ cpustate->irq_srv = cpustate->irq_req;
+ cpustate->irq_req &= ~Z8000_TRAP;
+ CHANGE_FCW(cpustate, GET_FCW(TRAP));
+ cpustate->pc = GET_PC(TRAP);
+ LOG(("Z8K '%s' priv instr trap $%04x\n", cpustate->device->tag(), cpustate->pc));
+ }
+ else
+ if (cpustate->irq_req & Z8000_SYSCALL)
+ {
+ CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
+ PUSH_PC();
+ PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
+ PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
+ cpustate->irq_srv = cpustate->irq_req;
+ cpustate->irq_req &= ~Z8000_SYSCALL;
+ CHANGE_FCW(cpustate, GET_FCW(SYSCALL));
+ cpustate->pc = GET_PC(SYSCALL);
+ LOG(("Z8K '%s' syscall $%04x\n", cpustate->device->tag(), cpustate->pc));
+ }
+ else
+ if (cpustate->irq_req & Z8000_SEGTRAP)
+ {
+ CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
+ PUSH_PC();
+ PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
+ PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
+ cpustate->irq_srv = cpustate->irq_req;
+ cpustate->irq_req &= ~Z8000_SEGTRAP;
+ CHANGE_FCW(cpustate, GET_FCW(SEGTRAP));
+ cpustate->pc = GET_PC(SEGTRAP);
+ LOG(("Z8K '%s' segtrap $%04x\n", cpustate->device->tag(), cpustate->pc));
+ }
+ else
+ if (cpustate->irq_req & Z8000_NMI)
+ {
+ CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
+ PUSH_PC();
+ PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
+ PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
+ cpustate->irq_srv = cpustate->irq_req;
+ cpustate->pc = RDMEM_W(cpustate, AS_PROGRAM, NMI);
+ cpustate->irq_req &= ~Z8000_NMI;
+ CHANGE_FCW(cpustate, GET_FCW(NMI));
+ cpustate->pc = GET_PC(NMI);
+ LOG(("Z8K '%s' NMI $%04x\n", cpustate->device->tag(), cpustate->pc));
+ }
+ else
+ if ((cpustate->irq_req & Z8000_NVI) && (cpustate->fcw & F_NVIE))
+ {
+ CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
+ PUSH_PC();
+ PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
+ PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
+ cpustate->irq_srv = cpustate->irq_req;
+ cpustate->pc = GET_PC(NVI);
+ cpustate->irq_req &= ~Z8000_NVI;
+ CHANGE_FCW(cpustate, GET_FCW(NVI));
+ LOG(("Z8K '%s' NVI $%04x\n", cpustate->device->tag(), cpustate->pc));
+ }
+ else
+ if ((cpustate->irq_req & Z8000_VI) && (cpustate->fcw & F_VIE))
+ {
+ CHANGE_FCW(cpustate, fcw | F_S_N | F_SEG_Z8001);/* switch to segmented (on Z8001) system mode */
+ PUSH_PC();
+ PUSHW(cpustate, SP, fcw); /* save current cpustate->fcw */
+ PUSHW(cpustate, SP, cpustate->irq_req); /* save interrupt/trap type tag */
+ cpustate->irq_srv = cpustate->irq_req;
if (cpustate->device->type() == Z8001)
cpustate->pc = segmented_addr(RDMEM_L(cpustate, AS_PROGRAM, VEC00 + 4 * (cpustate->irq_req & 0xff)));
else
cpustate->pc = RDMEM_W(cpustate, AS_PROGRAM, VEC00 + 2 * (cpustate->irq_req & 0xff));
- cpustate->irq_req &= ~Z8000_VI;
- CHANGE_FCW(cpustate, GET_FCW(VI));
- //printf ("z8k VI (vec 0x%x)\n", cpustate->irq_req & 0xff);
- LOG(("Z8K '%s' VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", cpustate->device->tag(), cpustate->irq_vec, VEC00 + (cpustate->device->type() == Z8001 ? 4 : 2) * (cpustate->irq_req & 0xff), cpustate->fcw, cpustate->pc));
- }
+ cpustate->irq_req &= ~Z8000_VI;
+ CHANGE_FCW(cpustate, GET_FCW(VI));
+ //printf ("z8k VI (vec 0x%x)\n", cpustate->irq_req & 0xff);
+ LOG(("Z8K '%s' VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", cpustate->device->tag(), cpustate->irq_vec, VEC00 + (cpustate->device->type() == Z8001 ? 4 : 2) * (cpustate->irq_req & 0xff), cpustate->fcw, cpustate->pc));
+ }
}
static CPU_INIT( z8001 )
@@ -548,7 +548,7 @@ static CPU_INIT( z8001 )
cpustate->device = device;
cpustate->program = &device->space(AS_PROGRAM);
/* If the system decodes STn lines to distinguish between data and program memory fetches,
- install the data space. If it doesn't, install the program memory into data memory space. */
+ install the data space. If it doesn't, install the program memory into data memory space. */
if (device->has_space(AS_DATA))
cpustate->data = &device->space(AS_DATA);
else
@@ -571,7 +571,7 @@ static CPU_INIT( z8002 )
cpustate->device = device;
cpustate->program = &device->space(AS_PROGRAM);
/* If the system decodes STn lines to distinguish between data and program memory fetches,
- install the data space. If it doesn't, install the program memory into data memory space. */
+ install the data space. If it doesn't, install the program memory into data memory space. */
if (device->has_space(AS_DATA))
cpustate->data = &device->space(AS_DATA);
else
@@ -616,31 +616,31 @@ static CPU_EXECUTE( z8000 )
{
z8000_state *cpustate = get_safe_token(device);
- do
- {
- /* any interrupt request pending? */
- if (cpustate->irq_req)
+ do
+ {
+ /* any interrupt request pending? */
+ if (cpustate->irq_req)
Interrupt(cpustate);
debugger_instruction_hook(device, cpustate->pc);
if (cpustate->irq_req & Z8000_HALT)
- {
- cpustate->icount = 0;
- }
- else
- {
- Z8000_exec *exec;
+ {
+ cpustate->icount = 0;
+ }
+ else
+ {
+ Z8000_exec *exec;
- cpustate->op[0] = RDOP(cpustate);
- cpustate->op_valid = 1;
- exec = &z8000_exec[cpustate->op[0]];
+ cpustate->op[0] = RDOP(cpustate);
+ cpustate->op_valid = 1;
+ exec = &z8000_exec[cpustate->op[0]];
- cpustate->icount -= exec->cycles;
- (*exec->opcode)(cpustate);
- cpustate->op_valid = 0;
- }
- } while (cpustate->icount > 0);
+ cpustate->icount -= exec->cycles;
+ (*exec->opcode)(cpustate);
+ cpustate->op_valid = 0;
+ }
+ } while (cpustate->icount > 0);
}
@@ -651,11 +651,11 @@ static void set_irq_line(z8000_state *cpustate, int irqline, int state)
if (cpustate->nmi_state == state)
return;
- cpustate->nmi_state = state;
+ cpustate->nmi_state = state;
- if (state != CLEAR_LINE)
+ if (state != CLEAR_LINE)
{
- if (cpustate->irq_srv >= Z8000_NMI) /* no NMIs inside trap */
+ if (cpustate->irq_srv >= Z8000_NMI) /* no NMIs inside trap */
return;
cpustate->irq_req = Z8000_NMI;
cpustate->irq_vec = NMI;
@@ -675,7 +675,7 @@ static void set_irq_line(z8000_state *cpustate, int irqline, int state)
{
if (cpustate->fcw & F_NVIE)
cpustate->irq_req |= Z8000_NVI;
- }
+ }
}
else
{
@@ -706,36 +706,36 @@ static CPU_SET_INFO( z8002 )
switch (state)
{
/* --- the following bits of info are set as 64-bit signed integers --- */
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
- case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(cpustate, 1, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
+ case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(cpustate, 1, info->i); break;
- case CPUINFO_INT_PC: cpustate->pc = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_PC: cpustate->pc = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_PC: cpustate->pc = info->i; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + Z8000_NSP: cpustate->nspoff = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_FCW: cpustate->fcw = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_PSAP: cpustate->psapoff = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_REFRESH: cpustate->refresh = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_IRQ_REQ: cpustate->irq_req = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_IRQ_SRV: cpustate->irq_srv = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_IRQ_VEC: cpustate->irq_vec = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R0: cpustate->RW( 0) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R1: cpustate->RW( 1) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R2: cpustate->RW( 2) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R3: cpustate->RW( 3) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R4: cpustate->RW( 4) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R5: cpustate->RW( 5) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R6: cpustate->RW( 6) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R7: cpustate->RW( 7) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R8: cpustate->RW( 8) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R9: cpustate->RW( 9) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R10: cpustate->RW(10) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R11: cpustate->RW(11) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R12: cpustate->RW(12) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R13: cpustate->RW(13) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R14: cpustate->RW(14) = info->i; break;
- case CPUINFO_INT_REGISTER + Z8000_R15: cpustate->RW(15) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_NSP: cpustate->nspoff = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_FCW: cpustate->fcw = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_PSAP: cpustate->psapoff = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_REFRESH: cpustate->refresh = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_IRQ_REQ: cpustate->irq_req = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_IRQ_SRV: cpustate->irq_srv = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_IRQ_VEC: cpustate->irq_vec = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R0: cpustate->RW( 0) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R1: cpustate->RW( 1) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R2: cpustate->RW( 2) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R3: cpustate->RW( 3) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R4: cpustate->RW( 4) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R5: cpustate->RW( 5) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R6: cpustate->RW( 6) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R7: cpustate->RW( 7) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R8: cpustate->RW( 8) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R9: cpustate->RW( 9) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R10: cpustate->RW(10) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R11: cpustate->RW(11) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R12: cpustate->RW(12) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R13: cpustate->RW(13) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R14: cpustate->RW(14) = info->i; break;
+ case CPUINFO_INT_REGISTER + Z8000_R15: cpustate->RW(15) = info->i; break;
}
}
@@ -752,76 +752,76 @@ CPU_GET_INFO( z8002 )
switch (state)
{
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z8000_state); break;
- case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
- case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
- case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
- case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
- case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
- case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
- case CPUINFO_INT_MAX_CYCLES: info->i = 744; break;
-
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
-
- case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
- case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state[0]; break; /* NVI */
- case CPUINFO_INT_INPUT_STATE + 1: info->i = cpustate->irq_state[1]; break; /* VI */
-
- case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc; break;
+ case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(z8000_state); break;
+ case CPUINFO_INT_INPUT_LINES: info->i = 2; break;
+ case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0xff; break;
+ case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break;
+ case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
+ case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 6; break;
+ case CPUINFO_INT_MIN_CYCLES: info->i = 2; break;
+ case CPUINFO_INT_MAX_CYCLES: info->i = 744; break;
+
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 8; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break;
+
+ case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: info->i = cpustate->nmi_state; break;
+ case CPUINFO_INT_INPUT_STATE + 0: info->i = cpustate->irq_state[0]; break; /* NVI */
+ case CPUINFO_INT_INPUT_STATE + 1: info->i = cpustate->irq_state[1]; break; /* VI */
+
+ case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->ppc; break;
case CPUINFO_INT_PC:
- case CPUINFO_INT_REGISTER + Z8000_PC: info->i = cpustate->pc; break;
+ case CPUINFO_INT_REGISTER + Z8000_PC: info->i = cpustate->pc; break;
case CPUINFO_INT_SP:
- case CPUINFO_INT_REGISTER + Z8000_NSP: info->i = cpustate->nspoff; break;
- case CPUINFO_INT_REGISTER + Z8000_FCW: info->i = cpustate->fcw; break;
- case CPUINFO_INT_REGISTER + Z8000_PSAP: info->i = cpustate->psapoff; break;
- case CPUINFO_INT_REGISTER + Z8000_REFRESH: info->i = cpustate->refresh; break;
- case CPUINFO_INT_REGISTER + Z8000_IRQ_REQ: info->i = cpustate->irq_req; break;
- case CPUINFO_INT_REGISTER + Z8000_IRQ_SRV: info->i = cpustate->irq_srv; break;
- case CPUINFO_INT_REGISTER + Z8000_IRQ_VEC: info->i = cpustate->irq_vec; break;
- case CPUINFO_INT_REGISTER + Z8000_R0: info->i = cpustate->RW( 0); break;
- case CPUINFO_INT_REGISTER + Z8000_R1: info->i = cpustate->RW( 1); break;
- case CPUINFO_INT_REGISTER + Z8000_R2: info->i = cpustate->RW( 2); break;
- case CPUINFO_INT_REGISTER + Z8000_R3: info->i = cpustate->RW( 3); break;
- case CPUINFO_INT_REGISTER + Z8000_R4: info->i = cpustate->RW( 4); break;
- case CPUINFO_INT_REGISTER + Z8000_R5: info->i = cpustate->RW( 5); break;
- case CPUINFO_INT_REGISTER + Z8000_R6: info->i = cpustate->RW( 6); break;
- case CPUINFO_INT_REGISTER + Z8000_R7: info->i = cpustate->RW( 7); break;
- case CPUINFO_INT_REGISTER + Z8000_R8: info->i = cpustate->RW( 8); break;
- case CPUINFO_INT_REGISTER + Z8000_R9: info->i = cpustate->RW( 9); break;
- case CPUINFO_INT_REGISTER + Z8000_R10: info->i = cpustate->RW(10); break;
- case CPUINFO_INT_REGISTER + Z8000_R11: info->i = cpustate->RW(11); break;
- case CPUINFO_INT_REGISTER + Z8000_R12: info->i = cpustate->RW(12); break;
- case CPUINFO_INT_REGISTER + Z8000_R13: info->i = cpustate->RW(13); break;
- case CPUINFO_INT_REGISTER + Z8000_R14: info->i = cpustate->RW(14); break;
- case CPUINFO_INT_REGISTER + Z8000_R15: info->i = cpustate->RW(15); break;
+ case CPUINFO_INT_REGISTER + Z8000_NSP: info->i = cpustate->nspoff; break;
+ case CPUINFO_INT_REGISTER + Z8000_FCW: info->i = cpustate->fcw; break;
+ case CPUINFO_INT_REGISTER + Z8000_PSAP: info->i = cpustate->psapoff; break;
+ case CPUINFO_INT_REGISTER + Z8000_REFRESH: info->i = cpustate->refresh; break;
+ case CPUINFO_INT_REGISTER + Z8000_IRQ_REQ: info->i = cpustate->irq_req; break;
+ case CPUINFO_INT_REGISTER + Z8000_IRQ_SRV: info->i = cpustate->irq_srv; break;
+ case CPUINFO_INT_REGISTER + Z8000_IRQ_VEC: info->i = cpustate->irq_vec; break;
+ case CPUINFO_INT_REGISTER + Z8000_R0: info->i = cpustate->RW( 0); break;
+ case CPUINFO_INT_REGISTER + Z8000_R1: info->i = cpustate->RW( 1); break;
+ case CPUINFO_INT_REGISTER + Z8000_R2: info->i = cpustate->RW( 2); break;
+ case CPUINFO_INT_REGISTER + Z8000_R3: info->i = cpustate->RW( 3); break;
+ case CPUINFO_INT_REGISTER + Z8000_R4: info->i = cpustate->RW( 4); break;
+ case CPUINFO_INT_REGISTER + Z8000_R5: info->i = cpustate->RW( 5); break;
+ case CPUINFO_INT_REGISTER + Z8000_R6: info->i = cpustate->RW( 6); break;
+ case CPUINFO_INT_REGISTER + Z8000_R7: info->i = cpustate->RW( 7); break;
+ case CPUINFO_INT_REGISTER + Z8000_R8: info->i = cpustate->RW( 8); break;
+ case CPUINFO_INT_REGISTER + Z8000_R9: info->i = cpustate->RW( 9); break;
+ case CPUINFO_INT_REGISTER + Z8000_R10: info->i = cpustate->RW(10); break;
+ case CPUINFO_INT_REGISTER + Z8000_R11: info->i = cpustate->RW(11); break;
+ case CPUINFO_INT_REGISTER + Z8000_R12: info->i = cpustate->RW(12); break;
+ case CPUINFO_INT_REGISTER + Z8000_R13: info->i = cpustate->RW(13); break;
+ case CPUINFO_INT_REGISTER + Z8000_R14: info->i = cpustate->RW(14); break;
+ case CPUINFO_INT_REGISTER + Z8000_R15: info->i = cpustate->RW(15); break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z8002); break;
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z8002); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z8002); break;
- case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z8000); break;
- case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z8000); break;
- case CPUINFO_FCT_BURN: info->burn = NULL; break;
- case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z8000);break;
- case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
+ case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(z8002); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z8002); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z8002); break;
+ case CPUINFO_FCT_EXIT: info->exit = CPU_EXIT_NAME(z8000); break;
+ case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(z8000); break;
+ case CPUINFO_FCT_BURN: info->burn = NULL; break;
+ case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(z8000);break;
+ case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Z8002"); break;
- case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z8000"); break;
- case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
- case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
- case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Z8002"); break;
+ case CPUINFO_STR_FAMILY: strcpy(info->s, "Zilog Z8000"); break;
+ case CPUINFO_STR_VERSION: strcpy(info->s, "1.1"); break;
+ case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
+ case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Juergen Buchmueller, all rights reserved."); break;
case CPUINFO_STR_FLAGS:
sprintf(info->s, "%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
@@ -841,32 +841,32 @@ CPU_GET_INFO( z8002 )
cpustate->fcw & 0x0004 ? 'H':'.',
cpustate->fcw & 0x0002 ? '?':'.',
cpustate->fcw & 0x0001 ? '?':'.');
- break;
-
- case CPUINFO_STR_REGISTER + Z8000_PC: sprintf(info->s, "pc :%08X", cpustate->pc); break;
- case CPUINFO_STR_REGISTER + Z8000_NSP: sprintf(info->s, "SP :%04X", cpustate->nspoff); break;
- case CPUINFO_STR_REGISTER + Z8000_FCW: sprintf(info->s, "fcw:%04X", cpustate->fcw); break;
- case CPUINFO_STR_REGISTER + Z8000_PSAP: sprintf(info->s, "psapoff:%04X", cpustate->psapoff); break;
- case CPUINFO_STR_REGISTER + Z8000_REFRESH: sprintf(info->s, "REFR:%04X", cpustate->refresh); break;
- case CPUINFO_STR_REGISTER + Z8000_IRQ_REQ: sprintf(info->s, "IRQR:%04X", cpustate->irq_req); break;
- case CPUINFO_STR_REGISTER + Z8000_IRQ_SRV: sprintf(info->s, "IRQS:%04X", cpustate->irq_srv); break;
- case CPUINFO_STR_REGISTER + Z8000_IRQ_VEC: sprintf(info->s, "IRQV:%04X", cpustate->irq_vec); break;
- case CPUINFO_STR_REGISTER + Z8000_R0: sprintf(info->s, "R0 :%04X", cpustate->RW(0)); break;
- case CPUINFO_STR_REGISTER + Z8000_R1: sprintf(info->s, "R1 :%04X", cpustate->RW(1)); break;
- case CPUINFO_STR_REGISTER + Z8000_R2: sprintf(info->s, "R2 :%04X", cpustate->RW(2)); break;
- case CPUINFO_STR_REGISTER + Z8000_R3: sprintf(info->s, "R3 :%04X", cpustate->RW(3)); break;
- case CPUINFO_STR_REGISTER + Z8000_R4: sprintf(info->s, "R4 :%04X", cpustate->RW(4)); break;
- case CPUINFO_STR_REGISTER + Z8000_R5: sprintf(info->s, "R5 :%04X", cpustate->RW(5)); break;
- case CPUINFO_STR_REGISTER + Z8000_R6: sprintf(info->s, "R6 :%04X", cpustate->RW(6)); break;
- case CPUINFO_STR_REGISTER + Z8000_R7: sprintf(info->s, "R7 :%04X", cpustate->RW(7)); break;
- case CPUINFO_STR_REGISTER + Z8000_R8: sprintf(info->s, "R8 :%04X", cpustate->RW(8)); break;
- case CPUINFO_STR_REGISTER + Z8000_R9: sprintf(info->s, "R9 :%04X", cpustate->RW(9)); break;
- case CPUINFO_STR_REGISTER + Z8000_R10: sprintf(info->s, "R10:%04X", cpustate->RW(10)); break;
- case CPUINFO_STR_REGISTER + Z8000_R11: sprintf(info->s, "R11:%04X", cpustate->RW(11)); break;
- case CPUINFO_STR_REGISTER + Z8000_R12: sprintf(info->s, "R12:%04X", cpustate->RW(12)); break;
- case CPUINFO_STR_REGISTER + Z8000_R13: sprintf(info->s, "R13:%04X", cpustate->RW(13)); break;
- case CPUINFO_STR_REGISTER + Z8000_R14: sprintf(info->s, "R14:%04X", cpustate->RW(14)); break;
- case CPUINFO_STR_REGISTER + Z8000_R15: sprintf(info->s, "R15:%04X", cpustate->RW(15)); break;
+ break;
+
+ case CPUINFO_STR_REGISTER + Z8000_PC: sprintf(info->s, "pc :%08X", cpustate->pc); break;
+ case CPUINFO_STR_REGISTER + Z8000_NSP: sprintf(info->s, "SP :%04X", cpustate->nspoff); break;
+ case CPUINFO_STR_REGISTER + Z8000_FCW: sprintf(info->s, "fcw:%04X", cpustate->fcw); break;
+ case CPUINFO_STR_REGISTER + Z8000_PSAP: sprintf(info->s, "psapoff:%04X", cpustate->psapoff); break;
+ case CPUINFO_STR_REGISTER + Z8000_REFRESH: sprintf(info->s, "REFR:%04X", cpustate->refresh); break;
+ case CPUINFO_STR_REGISTER + Z8000_IRQ_REQ: sprintf(info->s, "IRQR:%04X", cpustate->irq_req); break;
+ case CPUINFO_STR_REGISTER + Z8000_IRQ_SRV: sprintf(info->s, "IRQS:%04X", cpustate->irq_srv); break;
+ case CPUINFO_STR_REGISTER + Z8000_IRQ_VEC: sprintf(info->s, "IRQV:%04X", cpustate->irq_vec); break;
+ case CPUINFO_STR_REGISTER + Z8000_R0: sprintf(info->s, "R0 :%04X", cpustate->RW(0)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R1: sprintf(info->s, "R1 :%04X", cpustate->RW(1)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R2: sprintf(info->s, "R2 :%04X", cpustate->RW(2)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R3: sprintf(info->s, "R3 :%04X", cpustate->RW(3)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R4: sprintf(info->s, "R4 :%04X", cpustate->RW(4)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R5: sprintf(info->s, "R5 :%04X", cpustate->RW(5)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R6: sprintf(info->s, "R6 :%04X", cpustate->RW(6)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R7: sprintf(info->s, "R7 :%04X", cpustate->RW(7)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R8: sprintf(info->s, "R8 :%04X", cpustate->RW(8)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R9: sprintf(info->s, "R9 :%04X", cpustate->RW(9)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R10: sprintf(info->s, "R10:%04X", cpustate->RW(10)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R11: sprintf(info->s, "R11:%04X", cpustate->RW(11)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R12: sprintf(info->s, "R12:%04X", cpustate->RW(12)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R13: sprintf(info->s, "R13:%04X", cpustate->RW(13)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R14: sprintf(info->s, "R14:%04X", cpustate->RW(14)); break;
+ case CPUINFO_STR_REGISTER + Z8000_R15: sprintf(info->s, "R15:%04X", cpustate->RW(15)); break;
}
}
@@ -878,24 +878,24 @@ CPU_GET_INFO( z8001 )
{
switch (state)
{
- case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 20; break;
- case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
- case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 20; break;
+ case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 16; break;
+ case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 16; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z8001); break;
- case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z8001); break;
+ case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(z8001); break;
+ case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(z8001); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case CPUINFO_STR_NAME: strcpy(info->s, "Zilog Z8001"); break;
+ case CPUINFO_STR_NAME: strcpy(info->s, "Zilog Z8001"); break;
- case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
- case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
+ case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 2; break;
+ case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 8; break;
- default: CPU_GET_INFO_CALL(z8002); break;
+ default: CPU_GET_INFO_CALL(z8002); break;
}
}
diff --git a/src/emu/cpu/z8000/z8000.h b/src/emu/cpu/z8000/z8000.h
index f61a6e4e801..e752a9d6f9c 100644
--- a/src/emu/cpu/z8000/z8000.h
+++ b/src/emu/cpu/z8000/z8000.h
@@ -15,14 +15,14 @@ enum
};
/* Interrupt Types that can be generated by outside sources */
-#define Z8000_EPU 0x8000 /* extended instruction trap */
-#define Z8000_TRAP 0x4000 /* privileged instruction trap */
-#define Z8000_NMI 0x2000 /* non maskable interrupt */
-#define Z8000_SEGTRAP 0x1000 /* segment trap (Z8001) */
-#define Z8000_NVI 0x0800 /* non vectored interrupt */
-#define Z8000_VI 0x0400 /* vectored interrupt (LSB is vector) */
-#define Z8000_SYSCALL 0x0200 /* system call (lsb is vector) */
-#define Z8000_HALT 0x0100 /* halted flag */
+#define Z8000_EPU 0x8000 /* extended instruction trap */
+#define Z8000_TRAP 0x4000 /* privileged instruction trap */
+#define Z8000_NMI 0x2000 /* non maskable interrupt */
+#define Z8000_SEGTRAP 0x1000 /* segment trap (Z8001) */
+#define Z8000_NVI 0x0800 /* non vectored interrupt */
+#define Z8000_VI 0x0400 /* vectored interrupt (LSB is vector) */
+#define Z8000_SYSCALL 0x0200 /* system call (lsb is vector) */
+#define Z8000_HALT 0x0100 /* halted flag */
/* PUBLIC FUNCTIONS */
DECLARE_LEGACY_CPU_DEVICE(Z8001, z8001);
diff --git a/src/emu/cpu/z8000/z8000cpu.h b/src/emu/cpu/z8000/z8000cpu.h
index ffdad4be074..3063b77d092 100644
--- a/src/emu/cpu/z8000/z8000cpu.h
+++ b/src/emu/cpu/z8000/z8000cpu.h
@@ -60,45 +60,45 @@
#define PSA_ADDR (cpustate->device->type() == Z8001 ? segmented_addr((cpustate->psapseg << 16) | cpustate->psapoff) : cpustate->psapoff)
/* these vectors are based on cpustate->psap @@@*/
-#define RST (PSA_ADDR + 0) /* start up cpustate->fcw and cpustate->pc */
-#define EPU (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0008 : 0x0004)) /* extension processor unit? trap */
-#define TRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0010 : 0x0008)) /* privilege violation trap */
-#define SYSCALL (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0018 : 0x000c)) /* system call SC */
-#define SEGTRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0020 : 0x0010)) /* segment trap */
-#define NMI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0028 : 0x0014)) /* non maskable interrupt */
-#define NVI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0030 : 0x0018)) /* non vectored interrupt */
-#define VI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0038 : 0x001c)) /* vectored interrupt */
-#define VEC00 (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x003c : 0x001e)) /* vector n cpustate->pc value */
+#define RST (PSA_ADDR + 0) /* start up cpustate->fcw and cpustate->pc */
+#define EPU (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0008 : 0x0004)) /* extension processor unit? trap */
+#define TRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0010 : 0x0008)) /* privilege violation trap */
+#define SYSCALL (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0018 : 0x000c)) /* system call SC */
+#define SEGTRAP (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0020 : 0x0010)) /* segment trap */
+#define NMI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0028 : 0x0014)) /* non maskable interrupt */
+#define NVI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0030 : 0x0018)) /* non vectored interrupt */
+#define VI (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x0038 : 0x001c)) /* vectored interrupt */
+#define VEC00 (PSA_ADDR + (cpustate->device->type() == Z8001 ? 0x003c : 0x001e)) /* vector n cpustate->pc value */
/* bits of the cpustate->fcw */
-#define F_SEG 0x8000 /* segmented mode (Z8001 only) */
-#define F_S_N 0x4000 /* system / normal mode */
-#define F_EPU 0x2000 /* extension processor unit? */
-#define F_VIE 0x1000 /* vectored interrupt enable */
-#define F_NVIE 0x0800 /* non vectored interrupt enable */
-#define F_10 0x0400 /* unused */
-#define F_9 0x0200 /* unused */
-#define F_8 0x0100 /* unused */
-#define F_C 0x0080 /* carry flag */
-#define F_Z 0x0040 /* zero flag */
-#define F_S 0x0020 /* sign flag */
-#define F_PV 0x0010 /* parity/overflow flag */
-#define F_DA 0x0008 /* decimal adjust flag (0 add/adc, 1 sub/sbc) */
-#define F_H 0x0004 /* half carry flag (byte arithmetic only) */
-#define F_1 0x0002 /* unused */
-#define F_0 0x0001 /* unused */
+#define F_SEG 0x8000 /* segmented mode (Z8001 only) */
+#define F_S_N 0x4000 /* system / normal mode */
+#define F_EPU 0x2000 /* extension processor unit? */
+#define F_VIE 0x1000 /* vectored interrupt enable */
+#define F_NVIE 0x0800 /* non vectored interrupt enable */
+#define F_10 0x0400 /* unused */
+#define F_9 0x0200 /* unused */
+#define F_8 0x0100 /* unused */
+#define F_C 0x0080 /* carry flag */
+#define F_Z 0x0040 /* zero flag */
+#define F_S 0x0020 /* sign flag */
+#define F_PV 0x0010 /* parity/overflow flag */
+#define F_DA 0x0008 /* decimal adjust flag (0 add/adc, 1 sub/sbc) */
+#define F_H 0x0004 /* half carry flag (byte arithmetic only) */
+#define F_1 0x0002 /* unused */
+#define F_0 0x0001 /* unused */
/* opcode word numbers in cpustate->op[] array */
-#define OP0 0
+#define OP0 0
#define OP1 1
#define OP2 2
/* nibble shift factors for an opcode word */
/* left to right: 0x1340 -> NIB0=1, NIB1=3, NIB2=4, NIB3=0 */
#define NIB0 12
-#define NIB1 8
-#define NIB2 4
-#define NIB3 0
+#define NIB1 8
+#define NIB2 4
+#define NIB3 0
/* sign bit masks for byte, word and long */
#define S08 0x80
@@ -107,107 +107,107 @@
/* get a single flag bit 0/1 */
#define GET_C ((cpustate->fcw >> 7) & 1)
-#define GET_Z ((cpustate->fcw >> 6) & 1)
-#define GET_S ((cpustate->fcw >> 5) & 1)
-#define GET_PV ((cpustate->fcw >> 4) & 1)
-#define GET_DA ((cpustate->fcw >> 3) & 1)
-#define GET_H ((cpustate->fcw >> 2) & 1)
+#define GET_Z ((cpustate->fcw >> 6) & 1)
+#define GET_S ((cpustate->fcw >> 5) & 1)
+#define GET_PV ((cpustate->fcw >> 4) & 1)
+#define GET_DA ((cpustate->fcw >> 3) & 1)
+#define GET_H ((cpustate->fcw >> 2) & 1)
/* clear a single flag bit */
#define CLR_C cpustate->fcw &= ~F_C
-#define CLR_Z cpustate->fcw &= ~F_Z
-#define CLR_S cpustate->fcw &= ~F_S
-#define CLR_P cpustate->fcw &= ~F_PV
-#define CLR_V cpustate->fcw &= ~F_PV
-#define CLR_DA cpustate->fcw &= ~F_DA
-#define CLR_H cpustate->fcw &= ~F_H
+#define CLR_Z cpustate->fcw &= ~F_Z
+#define CLR_S cpustate->fcw &= ~F_S
+#define CLR_P cpustate->fcw &= ~F_PV
+#define CLR_V cpustate->fcw &= ~F_PV
+#define CLR_DA cpustate->fcw &= ~F_DA
+#define CLR_H cpustate->fcw &= ~F_H
/* clear a flag bit combination */
#define CLR_CZS cpustate->fcw &= ~(F_C|F_Z|F_S)
-#define CLR_CZSP cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV)
-#define CLR_CZSV cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV)
-#define CLR_CZSVH cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV|F_H)
-#define CLR_ZS cpustate->fcw &= ~(F_Z|F_S)
-#define CLR_ZSV cpustate->fcw &= ~(F_Z|F_S|F_PV)
-#define CLR_ZSP cpustate->fcw &= ~(F_Z|F_S|F_PV)
+#define CLR_CZSP cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV)
+#define CLR_CZSV cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV)
+#define CLR_CZSVH cpustate->fcw &= ~(F_C|F_Z|F_S|F_PV|F_H)
+#define CLR_ZS cpustate->fcw &= ~(F_Z|F_S)
+#define CLR_ZSV cpustate->fcw &= ~(F_Z|F_S|F_PV)
+#define CLR_ZSP cpustate->fcw &= ~(F_Z|F_S|F_PV)
/* set a single flag bit */
#define SET_C cpustate->fcw |= F_C
-#define SET_Z cpustate->fcw |= F_Z
-#define SET_S cpustate->fcw |= F_S
-#define SET_P cpustate->fcw |= F_PV
-#define SET_V cpustate->fcw |= F_PV
-#define SET_DA cpustate->fcw |= F_DA
-#define SET_H cpustate->fcw |= F_H
+#define SET_Z cpustate->fcw |= F_Z
+#define SET_S cpustate->fcw |= F_S
+#define SET_P cpustate->fcw |= F_PV
+#define SET_V cpustate->fcw |= F_PV
+#define SET_DA cpustate->fcw |= F_DA
+#define SET_H cpustate->fcw |= F_H
/* set a flag bit combination */
#define SET_SC cpustate->fcw |= F_C | F_S
/* check condition codes */
-#define CC0 (0) /* always false */
-#define CC1 (GET_PV^GET_S) /* less than */
-#define CC2 (GET_Z|(GET_PV^GET_S)) /* less than or equal */
-#define CC3 (GET_Z|GET_C) /* unsigned less than or equal */
-#define CC4 GET_PV /* parity even / overflow */
-#define CC5 GET_S /* minus (signed) */
-#define CC6 GET_Z /* zero / equal */
-#define CC7 GET_C /* carry / unsigned less than */
-
-#define CC8 (1) /* always true */
-#define CC9 !(GET_PV^GET_S) /* greater than or equal */
-#define CCA !(GET_Z|(GET_PV^GET_S)) /* greater than */
-#define CCB !(GET_Z|GET_C) /* unsigned greater than */
-#define CCC !GET_PV /* parity odd / no overflow */
-#define CCD !GET_S /* plus (not signed) */
-#define CCE !GET_Z /* not zero / not equal */
-#define CCF !GET_C /* not carry / unsigned greater than */
+#define CC0 (0) /* always false */
+#define CC1 (GET_PV^GET_S) /* less than */
+#define CC2 (GET_Z|(GET_PV^GET_S)) /* less than or equal */
+#define CC3 (GET_Z|GET_C) /* unsigned less than or equal */
+#define CC4 GET_PV /* parity even / overflow */
+#define CC5 GET_S /* minus (signed) */
+#define CC6 GET_Z /* zero / equal */
+#define CC7 GET_C /* carry / unsigned less than */
+
+#define CC8 (1) /* always true */
+#define CC9 !(GET_PV^GET_S) /* greater than or equal */
+#define CCA !(GET_Z|(GET_PV^GET_S)) /* greater than */
+#define CCB !(GET_Z|GET_C) /* unsigned greater than */
+#define CCC !GET_PV /* parity odd / no overflow */
+#define CCD !GET_S /* plus (not signed) */
+#define CCE !GET_Z /* not zero / not equal */
+#define CCF !GET_C /* not carry / unsigned greater than */
/* get data from the opcode words */
/* o is the opcode word offset */
/* s is a nibble shift factor */
#define GET_BIT(o) UINT16 bit = 1 << (get_operand(cpustate, o) & 15)
-#define GET_CCC(o,s) UINT8 cc = (get_operand(cpustate, o) >> (s)) & 15
-
-#define GET_DST(o,s) UINT8 dst = (get_operand(cpustate, o) >> (s)) & 15
-#define GET_SRC(o,s) UINT8 src = (get_operand(cpustate, o) >> (s)) & 15
-#define GET_IDX(o,s) UINT8 idx = (get_operand(cpustate, o) >> (s)) & 15
-#define GET_CNT(o,s) INT8 cnt = (get_operand(cpustate, o) >> (s)) & 15
-#define GET_IMM4(o,s) UINT8 imm4 = (get_operand(cpustate, o) >> (s)) & 15
-
-#define GET_I4M1(o,s) UINT8 i4p1 = ((get_operand(cpustate, o) >> (s)) & 15) + 1
-#define GET_IMM1(o,s) UINT8 imm1 = (get_operand(cpustate, o) >> (s)) & 2
-#define GET_IMM2(o,s) UINT8 imm2 = (get_operand(cpustate, o) >> (s)) & 3
-#define GET_IMM3(o,s) UINT8 imm3 = (get_operand(cpustate, o) >> (s)) & 7
-
-#define GET_IMM8(o) UINT8 imm8 = (UINT8)get_operand(cpustate, o)
-
-#define GET_IMM16(o) UINT16 imm16 = get_operand(cpustate, o)
-#define GET_IDX16(o) UINT32 idx16 = get_operand(cpustate, o)
-#define GET_IMM32 UINT32 imm32 = (get_operand(cpustate, 1) << 16) + get_operand(cpustate, 2)
-#define GET_DSP7 UINT8 dsp7 = get_operand(cpustate, 0) & 127
-#define GET_DSP8 INT8 dsp8 = (INT8)get_operand(cpustate, 0)
-#define GET_DSP16 UINT32 dsp16 = addr_add(cpustate, cpustate->pc, (INT16)get_operand(cpustate, 1))
-#define GET_ADDR(o) UINT32 addr = (UINT32)get_addr_operand(cpustate, o)
-#define GET_ADDR_RAW(o) UINT32 addr = (UINT32)get_raw_addr_operand(cpustate, o)
+#define GET_CCC(o,s) UINT8 cc = (get_operand(cpustate, o) >> (s)) & 15
+
+#define GET_DST(o,s) UINT8 dst = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_SRC(o,s) UINT8 src = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_IDX(o,s) UINT8 idx = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_CNT(o,s) INT8 cnt = (get_operand(cpustate, o) >> (s)) & 15
+#define GET_IMM4(o,s) UINT8 imm4 = (get_operand(cpustate, o) >> (s)) & 15
+
+#define GET_I4M1(o,s) UINT8 i4p1 = ((get_operand(cpustate, o) >> (s)) & 15) + 1
+#define GET_IMM1(o,s) UINT8 imm1 = (get_operand(cpustate, o) >> (s)) & 2
+#define GET_IMM2(o,s) UINT8 imm2 = (get_operand(cpustate, o) >> (s)) & 3
+#define GET_IMM3(o,s) UINT8 imm3 = (get_operand(cpustate, o) >> (s)) & 7
+
+#define GET_IMM8(o) UINT8 imm8 = (UINT8)get_operand(cpustate, o)
+
+#define GET_IMM16(o) UINT16 imm16 = get_operand(cpustate, o)
+#define GET_IDX16(o) UINT32 idx16 = get_operand(cpustate, o)
+#define GET_IMM32 UINT32 imm32 = (get_operand(cpustate, 1) << 16) + get_operand(cpustate, 2)
+#define GET_DSP7 UINT8 dsp7 = get_operand(cpustate, 0) & 127
+#define GET_DSP8 INT8 dsp8 = (INT8)get_operand(cpustate, 0)
+#define GET_DSP16 UINT32 dsp16 = addr_add(cpustate, cpustate->pc, (INT16)get_operand(cpustate, 1))
+#define GET_ADDR(o) UINT32 addr = (UINT32)get_addr_operand(cpustate, o)
+#define GET_ADDR_RAW(o) UINT32 addr = (UINT32)get_raw_addr_operand(cpustate, o)
struct z8000_state;
/* structure for the opcode definition table */
struct Z8000_init {
- int beg, end, step;
- int size, cycles;
- void (*opcode)(z8000_state *cpustate);
- const char *dasm;
- UINT32 dasmflags;
+ int beg, end, step;
+ int size, cycles;
+ void (*opcode)(z8000_state *cpustate);
+ const char *dasm;
+ UINT32 dasmflags;
};
/* structure for the opcode execution table / disassembler */
struct Z8000_exec {
- void (*opcode)(z8000_state *cpustate);
- int cycles;
- int size;
- const char *dasm;
- UINT32 dasmflags;
+ void (*opcode)(z8000_state *cpustate);
+ int cycles;
+ int size;
+ const char *dasm;
+ UINT32 dasmflags;
};
/* opcode execution table */
diff --git a/src/emu/cpu/z8000/z8000ops.c b/src/emu/cpu/z8000/z8000ops.c
index c2736c7ad1b..0802d54a6f5 100644
--- a/src/emu/cpu/z8000/z8000ops.c
+++ b/src/emu/cpu/z8000/z8000ops.c
@@ -32,62 +32,62 @@
******************************************/
INLINE void CHANGE_FCW(z8000_state *cpustate, UINT16 fcw)
{
- if (fcw & F_S_N) { /* system mode now? */
- if (!(cpustate->fcw & F_S_N)) { /* and not before? */
- if (cpustate->device->type() == Z8001) {
- UINT16 tmp = cpustate->RW(15);
- cpustate->RW(15) = cpustate->nspoff;
- cpustate->nspoff = tmp;
- tmp = cpustate->RW(14);
- cpustate->RW(14) = cpustate->nspseg;
- cpustate->nspseg = tmp;
- }
- else {
- UINT16 tmp = cpustate->RW(SP);
- cpustate->RW(SP) = cpustate->nspoff;
- cpustate->nspoff = tmp;
- }
+ if (fcw & F_S_N) { /* system mode now? */
+ if (!(cpustate->fcw & F_S_N)) { /* and not before? */
+ if (cpustate->device->type() == Z8001) {
+ UINT16 tmp = cpustate->RW(15);
+ cpustate->RW(15) = cpustate->nspoff;
+ cpustate->nspoff = tmp;
+ tmp = cpustate->RW(14);
+ cpustate->RW(14) = cpustate->nspseg;
+ cpustate->nspseg = tmp;
+ }
+ else {
+ UINT16 tmp = cpustate->RW(SP);
+ cpustate->RW(SP) = cpustate->nspoff;
+ cpustate->nspoff = tmp;
+ }
}
- } else { /* user mode now */
- if (cpustate->fcw & F_S_N) { /* and not before? */
- if (cpustate->device->type() == Z8001) {
- UINT16 tmp = cpustate->RW(15);
- cpustate->RW(15) = cpustate->nspoff;
- cpustate->nspoff = tmp;
- tmp = cpustate->RW(14);
- cpustate->RW(14) = cpustate->nspseg;
- cpustate->nspseg = tmp;
- }
- else {
- UINT16 tmp = cpustate->RW(SP);
- cpustate->RW(SP) = cpustate->nspoff;
- cpustate->nspoff = tmp;
- }
- }
- }
- if (!(cpustate->fcw & F_NVIE) && (fcw & F_NVIE) && (cpustate->irq_state[0] != CLEAR_LINE))
+ } else { /* user mode now */
+ if (cpustate->fcw & F_S_N) { /* and not before? */
+ if (cpustate->device->type() == Z8001) {
+ UINT16 tmp = cpustate->RW(15);
+ cpustate->RW(15) = cpustate->nspoff;
+ cpustate->nspoff = tmp;
+ tmp = cpustate->RW(14);
+ cpustate->RW(14) = cpustate->nspseg;
+ cpustate->nspseg = tmp;
+ }
+ else {
+ UINT16 tmp = cpustate->RW(SP);
+ cpustate->RW(SP) = cpustate->nspoff;
+ cpustate->nspoff = tmp;
+ }
+ }
+ }
+ if (!(cpustate->fcw & F_NVIE) && (fcw & F_NVIE) && (cpustate->irq_state[0] != CLEAR_LINE))
cpustate->irq_req |= Z8000_NVI;
if (!(cpustate->fcw & F_VIE) && (fcw & F_VIE) && (cpustate->irq_state[1] != CLEAR_LINE))
cpustate->irq_req |= Z8000_VI;
- cpustate->fcw = fcw; /* set new cpustate->fcw */
+ cpustate->fcw = fcw; /* set new cpustate->fcw */
}
INLINE UINT32 make_segmented_addr(UINT32 addr)
{
- return ((addr & 0x007f0000) << 8) | 0x80000000 | (addr & 0xffff);
+ return ((addr & 0x007f0000) << 8) | 0x80000000 | (addr & 0xffff);
}
INLINE UINT32 segmented_addr(UINT32 addr)
{
- return ((addr & 0x7f000000) >> 8) | (addr & 0xffff);
+ return ((addr & 0x7f000000) >> 8) | (addr & 0xffff);
}
INLINE UINT32 addr_from_reg(z8000_state *cpustate, int regno)
{
- if (segmented_mode(cpustate))
- return segmented_addr(cpustate->RL(regno));
- else
- return cpustate->RW(regno);
+ if (segmented_mode(cpustate))
+ return segmented_addr(cpustate->RL(regno));
+ else
+ return cpustate->RW(regno);
}
INLINE void addr_to_reg(z8000_state *cpustate, int regno, UINT32 addr)
@@ -97,8 +97,8 @@ INLINE void addr_to_reg(z8000_state *cpustate, int regno, UINT32 addr)
cpustate->RW(regno) = (cpustate->RW(regno) & 0x80ff) | ((segaddr >> 16) & 0x7f00);
cpustate->RW(regno | 1) = segaddr & 0xffff;
}
- else
- cpustate->RW(regno) = addr;
+ else
+ cpustate->RW(regno) = addr;
}
INLINE void add_to_addr_reg(z8000_state *cpustate, int regno, UINT16 addend)
@@ -125,39 +125,39 @@ INLINE void set_pc(z8000_state *cpustate, UINT32 addr)
INLINE void PUSHW(z8000_state *cpustate, UINT8 dst, UINT16 value)
{
- if (segmented_mode(cpustate))
- cpustate->RW(dst | 1) -= 2;
- else
- cpustate->RW(dst) -= 2;
+ if (segmented_mode(cpustate))
+ cpustate->RW(dst | 1) -= 2;
+ else
+ cpustate->RW(dst) -= 2;
WRMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, dst), value);
}
INLINE UINT16 POPW(z8000_state *cpustate, UINT8 src)
{
UINT16 result = RDMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, src));
- if (segmented_mode(cpustate))
- cpustate->RW(src | 1) += 2;
- else
- cpustate->RW(src) += 2;
+ if (segmented_mode(cpustate))
+ cpustate->RW(src | 1) += 2;
+ else
+ cpustate->RW(src) += 2;
return result;
}
INLINE void PUSHL(z8000_state *cpustate, UINT8 dst, UINT32 value)
{
- if (segmented_mode(cpustate))
- cpustate->RW(dst | 1) -= 4;
- else
- cpustate->RW(dst) -= 4;
+ if (segmented_mode(cpustate))
+ cpustate->RW(dst | 1) -= 4;
+ else
+ cpustate->RW(dst) -= 4;
WRMEM_L(cpustate, AS_DATA, addr_from_reg(cpustate, dst), value);
}
INLINE UINT32 POPL(z8000_state *cpustate, UINT8 src)
{
UINT32 result = RDMEM_L(cpustate, AS_DATA, addr_from_reg(cpustate, src));
- if (segmented_mode(cpustate))
- cpustate->RW(src | 1) += 4;
- else
- cpustate->RW(src) += 4;
+ if (segmented_mode(cpustate))
+ cpustate->RW(src | 1) += 4;
+ else
+ cpustate->RW(src) += 4;
return result;
}
@@ -178,10 +178,10 @@ INLINE UINT32 POPL(z8000_state *cpustate, UINT8 src)
/* check half carry for A addition and S subtraction */
#define CHK_ADDB_H if ((result & 15) < (dest & 15)) SET_H
-#define CHK_ADCB_H if ((result & 15) < (dest & 15) || ((result & 15) == (dest & 15) && (value & 15))) SET_H
+#define CHK_ADCB_H if ((result & 15) < (dest & 15) || ((result & 15) == (dest & 15) && (value & 15))) SET_H
#define CHK_SUBB_H if ((result & 15) > (dest & 15)) SET_H
-#define CHK_SBCB_H if ((result & 15) > (dest & 15) || ((result & 15) == (dest & 15) && (value & 15))) SET_H
+#define CHK_SBCB_H if ((result & 15) > (dest & 15) || ((result & 15) == (dest & 15) && (value & 15))) SET_H
/* check overflow for addition for byte, word and long */
#define CHK_ADDB_V if (((value & dest & ~result) | (~value & ~dest & result)) & S08) SET_V
@@ -207,12 +207,12 @@ INLINE UINT32 POPL(z8000_state *cpustate, UINT8 src)
INLINE UINT8 ADDB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest + value;
- CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
- CLR_DA; /* clear DA (decimal adjust) flag for addb */
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
- CHK_ADDX_C; /* set C if result overflowed */
- CHK_ADDB_V; /* set V if result has incorrect sign */
- CHK_ADDB_H; /* set H if lower nibble overflowed */
+ CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
+ CLR_DA; /* clear DA (decimal adjust) flag for addb */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_ADDX_C; /* set C if result overflowed */
+ CHK_ADDB_V; /* set V if result has incorrect sign */
+ CHK_ADDB_H; /* set H if lower nibble overflowed */
return result;
}
@@ -223,10 +223,10 @@ INLINE UINT8 ADDB(z8000_state *cpustate, UINT8 dest, UINT8 value)
INLINE UINT16 ADDW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest + value;
- CLR_CZSV; /* first clear C, Z, S, P/V flags */
- CHK_XXXW_ZS; /* set Z and S flags for result word */
- CHK_ADDX_C; /* set C if result overflowed */
- CHK_ADDW_V; /* set V if result has incorrect sign */
+ CLR_CZSV; /* first clear C, Z, S, P/V flags */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_ADDX_C; /* set C if result overflowed */
+ CHK_ADDW_V; /* set V if result has incorrect sign */
return result;
}
@@ -237,10 +237,10 @@ INLINE UINT16 ADDW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE UINT32 ADDL(z8000_state *cpustate, UINT32 dest, UINT32 value)
{
UINT32 result = dest + value;
- CLR_CZSV; /* first clear C, Z, S, P/V flags */
- CHK_XXXL_ZS; /* set Z and S flags for result long */
- CHK_ADDX_C; /* set C if result overflowed */
- CHK_ADDL_V; /* set V if result has incorrect sign */
+ CLR_CZSV; /* first clear C, Z, S, P/V flags */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_ADDX_C; /* set C if result overflowed */
+ CHK_ADDL_V; /* set V if result has incorrect sign */
return result;
}
@@ -251,12 +251,12 @@ INLINE UINT32 ADDL(z8000_state *cpustate, UINT32 dest, UINT32 value)
INLINE UINT8 ADCB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest + value + GET_C;
- CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
- CLR_DA; /* clear DA (decimal adjust) flag for adcb */
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
- CHK_ADCX_C; /* set C if result overflowed */
- CHK_ADDB_V; /* set V if result has incorrect sign */
- CHK_ADCB_H; /* set H if lower nibble overflowed */
+ CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
+ CLR_DA; /* clear DA (decimal adjust) flag for adcb */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_ADCX_C; /* set C if result overflowed */
+ CHK_ADDB_V; /* set V if result has incorrect sign */
+ CHK_ADCB_H; /* set H if lower nibble overflowed */
return result;
}
@@ -267,10 +267,10 @@ INLINE UINT8 ADCB(z8000_state *cpustate, UINT8 dest, UINT8 value)
INLINE UINT16 ADCW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest + value + GET_C;
- CLR_CZSV; /* first clear C, Z, S, P/V flags */
- CHK_XXXW_ZS; /* set Z and S flags for result word */
- CHK_ADCX_C; /* set C if result overflowed */
- CHK_ADDW_V; /* set V if result has incorrect sign */
+ CLR_CZSV; /* first clear C, Z, S, P/V flags */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_ADCX_C; /* set C if result overflowed */
+ CHK_ADDW_V; /* set V if result has incorrect sign */
return result;
}
@@ -281,12 +281,12 @@ INLINE UINT16 ADCW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE UINT8 SUBB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest - value;
- CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
- SET_DA; /* set DA (decimal adjust) flag for subb */
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
- CHK_SUBX_C; /* set C if result underflowed */
- CHK_SUBB_V; /* set V if result has incorrect sign */
- CHK_SUBB_H; /* set H if lower nibble underflowed */
+ CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
+ SET_DA; /* set DA (decimal adjust) flag for subb */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_SUBX_C; /* set C if result underflowed */
+ CHK_SUBB_V; /* set V if result has incorrect sign */
+ CHK_SUBB_H; /* set H if lower nibble underflowed */
return result;
}
@@ -297,10 +297,10 @@ INLINE UINT8 SUBB(z8000_state *cpustate, UINT8 dest, UINT8 value)
INLINE UINT16 SUBW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest - value;
- CLR_CZSV; /* first clear C, Z, S, P/V flags */
- CHK_XXXW_ZS; /* set Z and S flags for result word */
- CHK_SUBX_C; /* set C if result underflowed */
- CHK_SUBW_V; /* set V if result has incorrect sign */
+ CLR_CZSV; /* first clear C, Z, S, P/V flags */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_SUBX_C; /* set C if result underflowed */
+ CHK_SUBW_V; /* set V if result has incorrect sign */
return result;
}
@@ -311,10 +311,10 @@ INLINE UINT16 SUBW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE UINT32 SUBL(z8000_state *cpustate, UINT32 dest, UINT32 value)
{
UINT32 result = dest - value;
- CLR_CZSV; /* first clear C, Z, S, P/V flags */
- CHK_XXXL_ZS; /* set Z and S flags for result long */
- CHK_SUBX_C; /* set C if result underflowed */
- CHK_SUBL_V; /* set V if result has incorrect sign */
+ CLR_CZSV; /* first clear C, Z, S, P/V flags */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_SUBX_C; /* set C if result underflowed */
+ CHK_SUBL_V; /* set V if result has incorrect sign */
return result;
}
@@ -325,12 +325,12 @@ INLINE UINT32 SUBL(z8000_state *cpustate, UINT32 dest, UINT32 value)
INLINE UINT8 SBCB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest - value - GET_C;
- CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
- SET_DA; /* set DA (decimal adjust) flag for sbcb */
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
- CHK_SBCX_C; /* set C if result underflowed */
- CHK_SUBB_V; /* set V if result has incorrect sign */
- CHK_SBCB_H; /* set H if lower nibble underflowed */
+ CLR_CZSVH; /* first clear C, Z, S, P/V and H flags */
+ SET_DA; /* set DA (decimal adjust) flag for sbcb */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_SBCX_C; /* set C if result underflowed */
+ CHK_SUBB_V; /* set V if result has incorrect sign */
+ CHK_SBCB_H; /* set H if lower nibble underflowed */
return result;
}
@@ -341,10 +341,10 @@ INLINE UINT8 SBCB(z8000_state *cpustate, UINT8 dest, UINT8 value)
INLINE UINT16 SBCW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest - value - GET_C;
- CLR_CZSV; /* first clear C, Z, S, P/V flags */
- CHK_XXXW_ZS; /* set Z and S flags for result word */
- CHK_SBCX_C; /* set C if result underflowed */
- CHK_SUBW_V; /* set V if result has incorrect sign */
+ CLR_CZSV; /* first clear C, Z, S, P/V flags */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_SBCX_C; /* set C if result underflowed */
+ CHK_SUBW_V; /* set V if result has incorrect sign */
return result;
}
@@ -355,8 +355,8 @@ INLINE UINT16 SBCW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE UINT8 ORB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest | value;
- CLR_ZSP; /* first clear Z, S, P/V flags */
- CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
+ CLR_ZSP; /* first clear Z, S, P/V flags */
+ CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
}
@@ -367,8 +367,8 @@ INLINE UINT8 ORB(z8000_state *cpustate, UINT8 dest, UINT8 value)
INLINE UINT16 ORW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest | value;
- CLR_ZS; /* first clear Z, and S flags */
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CLR_ZS; /* first clear Z, and S flags */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
}
@@ -379,8 +379,8 @@ INLINE UINT16 ORW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE UINT8 ANDB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest & value;
- CLR_ZSP; /* first clear Z,S and P/V flags */
- CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
+ CLR_ZSP; /* first clear Z,S and P/V flags */
+ CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
}
@@ -391,8 +391,8 @@ INLINE UINT8 ANDB(z8000_state *cpustate, UINT8 dest, UINT8 value)
INLINE UINT16 ANDW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest & value;
- CLR_ZS; /* first clear Z and S flags */
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CLR_ZS; /* first clear Z and S flags */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
}
@@ -403,8 +403,8 @@ INLINE UINT16 ANDW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE UINT8 XORB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest ^ value;
- CLR_ZSP; /* first clear Z, S and P/V flags */
- CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
+ CLR_ZSP; /* first clear Z, S and P/V flags */
+ CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
}
@@ -415,8 +415,8 @@ INLINE UINT8 XORB(z8000_state *cpustate, UINT8 dest, UINT8 value)
INLINE UINT16 XORW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest ^ value;
- CLR_ZS; /* first clear Z and S flags */
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CLR_ZS; /* first clear Z and S flags */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
}
@@ -428,9 +428,9 @@ INLINE UINT16 XORW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE void CPB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
UINT8 result = dest - value;
- CLR_CZSV; /* first clear C, Z, S and P/V flags */
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
- CHK_SUBX_C; /* set C if result underflowed */
+ CLR_CZSV; /* first clear C, Z, S and P/V flags */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_SUBX_C; /* set C if result underflowed */
CHK_SUBB_V;
}
@@ -442,8 +442,8 @@ INLINE void CPW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT16 result = dest - value;
CLR_CZSV;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
- CHK_SUBX_C; /* set C if result underflowed */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_SUBX_C; /* set C if result underflowed */
CHK_SUBW_V;
}
@@ -455,8 +455,8 @@ INLINE void CPL(z8000_state *cpustate, UINT32 dest, UINT32 value)
{
UINT32 result = dest - value;
CLR_CZSV;
- CHK_XXXL_ZS; /* set Z and S flags for result long */
- CHK_SUBX_C; /* set C if result underflowed */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_SUBX_C; /* set C if result underflowed */
CHK_SUBL_V;
}
@@ -468,7 +468,7 @@ INLINE UINT8 COMB(z8000_state *cpustate, UINT8 dest)
{
UINT8 result = ~dest;
CLR_ZSP;
- CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
+ CHK_XXXB_ZSP; /* set Z, S and P flags for result byte */
return result;
}
@@ -480,7 +480,7 @@ INLINE UINT16 COMW(z8000_state *cpustate, UINT16 dest)
{
UINT16 result = ~dest;
CLR_ZS;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
return result;
}
@@ -492,9 +492,9 @@ INLINE UINT8 NEGB(z8000_state *cpustate, UINT8 dest)
{
UINT8 result = (UINT8) -dest;
CLR_CZSV;
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (result > 0) SET_C;
- if (result == S08) SET_V;
+ if (result == S08) SET_V;
return result;
}
@@ -506,9 +506,9 @@ INLINE UINT16 NEGW(z8000_state *cpustate, UINT16 dest)
{
UINT16 result = (UINT16) -dest;
CLR_CZSV;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (result > 0) SET_C;
- if (result == S16) SET_V;
+ if (result == S16) SET_V;
return result;
}
@@ -519,7 +519,7 @@ INLINE UINT16 NEGW(z8000_state *cpustate, UINT16 dest)
INLINE void TESTB(z8000_state *cpustate, UINT8 result)
{
CLR_ZSP;
- CHK_XXXB_ZSP; /* set Z and S flags for result byte */
+ CHK_XXXB_ZSP; /* set Z and S flags for result byte */
}
/******************************************
@@ -529,7 +529,7 @@ INLINE void TESTB(z8000_state *cpustate, UINT8 result)
INLINE void TESTW(z8000_state *cpustate, UINT16 dest)
{
CLR_ZS;
- if (!dest) SET_Z; else if (dest & S16) SET_S;
+ if (!dest) SET_Z; else if (dest & S16) SET_S;
}
/******************************************
@@ -548,10 +548,10 @@ INLINE void TESTL(z8000_state *cpustate, UINT32 dest)
******************************************/
INLINE UINT8 INCB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
- UINT8 result = dest + value;
+ UINT8 result = dest + value;
CLR_ZSV;
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
- CHK_ADDB_V; /* set V if result overflowed */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_ADDB_V; /* set V if result overflowed */
return result;
}
@@ -561,10 +561,10 @@ INLINE UINT8 INCB(z8000_state *cpustate, UINT8 dest, UINT8 value)
******************************************/
INLINE UINT16 INCW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
- UINT16 result = dest + value;
+ UINT16 result = dest + value;
CLR_ZSV;
- CHK_XXXW_ZS; /* set Z and S flags for result byte */
- CHK_ADDW_V; /* set V if result overflowed */
+ CHK_XXXW_ZS; /* set Z and S flags for result byte */
+ CHK_ADDW_V; /* set V if result overflowed */
return result;
}
@@ -574,10 +574,10 @@ INLINE UINT16 INCW(z8000_state *cpustate, UINT16 dest, UINT16 value)
******************************************/
INLINE UINT8 DECB(z8000_state *cpustate, UINT8 dest, UINT8 value)
{
- UINT8 result = dest - value;
+ UINT8 result = dest - value;
CLR_ZSV;
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
- CHK_SUBB_V; /* set V if result overflowed */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_SUBB_V; /* set V if result overflowed */
return result;
}
@@ -587,10 +587,10 @@ INLINE UINT8 DECB(z8000_state *cpustate, UINT8 dest, UINT8 value)
******************************************/
INLINE UINT16 DECW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
- UINT16 result = dest - value;
+ UINT16 result = dest - value;
CLR_ZSV;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
- CHK_SUBW_V; /* set V if result overflowed */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_SUBW_V; /* set V if result overflowed */
return result;
}
@@ -602,11 +602,11 @@ INLINE UINT32 MULTW(z8000_state *cpustate, UINT16 dest, UINT16 value)
{
UINT32 result = (INT32)(INT16)dest * (INT16)value;
CLR_CZSV;
- CHK_XXXL_ZS;
+ CHK_XXXL_ZS;
if(!value)
{
/* multiplication with zero is faster */
- cpustate->icount += (70-18);
+ cpustate->icount += (70-18);
}
if((INT32)result < -0x7fff || (INT32)result >= 0x7fff) SET_C;
return result;
@@ -619,7 +619,7 @@ INLINE UINT32 MULTW(z8000_state *cpustate, UINT16 dest, UINT16 value)
INLINE UINT64 MULTL(z8000_state *cpustate, UINT32 dest, UINT32 value)
{
UINT64 result = (INT64)(INT32)dest * (INT32)value;
- if(!value)
+ if(!value)
{
/* multiplication with zero is faster */
cpustate->icount += (282 - 30);
@@ -629,8 +629,8 @@ INLINE UINT64 MULTL(z8000_state *cpustate, UINT32 dest, UINT32 value)
int n;
for(n = 0; n < 32; n++)
if(dest & (1L << n)) cpustate->icount -= 7;
- }
- CLR_CZSV;
+ }
+ CLR_CZSV;
CHK_XXXQ_ZS;
if((INT64)result < -0x7fffffffL || (INT64)result >= 0x7fffffffL) SET_C;
return result;
@@ -671,12 +671,12 @@ INLINE UINT32 DIVW(z8000_state *cpustate, UINT32 dest, UINT16 value)
CHK_XXXW_ZS;
}
result = ((UINT32)remainder << 16) | (result & 0xffff);
- }
- else
- {
+ }
+ else
+ {
SET_Z;
- SET_V;
- }
+ SET_V;
+ }
return result;
}
@@ -715,12 +715,12 @@ INLINE UINT64 DIVL(z8000_state *cpustate, UINT64 dest, UINT32 value)
CHK_XXXL_ZS;
}
result = ((UINT64)remainder << 32) | (result & 0xffffffff);
- }
- else
- {
+ }
+ else
+ {
SET_Z;
- SET_V;
- }
+ SET_V;
+ }
return result;
}
@@ -733,9 +733,9 @@ INLINE UINT8 RLB(z8000_state *cpustate, UINT8 dest, UINT8 twice)
UINT8 result = (dest << 1) | (dest >> 7);
CLR_CZSV;
if (twice) result = (result << 1) | (result >> 7);
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (result & 0x01) SET_C;
- if ((result ^ dest) & S08) SET_V;
+ if ((result ^ dest) & S08) SET_V;
return result;
}
@@ -748,9 +748,9 @@ INLINE UINT16 RLW(z8000_state *cpustate, UINT16 dest, UINT8 twice)
UINT16 result = (dest << 1) | (dest >> 15);
CLR_CZSV;
if (twice) result = (result << 1) | (result >> 15);
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (result & 0x0001) SET_C;
- if ((result ^ dest) & S16) SET_V;
+ if ((result ^ dest) & S16) SET_V;
return result;
}
@@ -760,17 +760,17 @@ INLINE UINT16 RLW(z8000_state *cpustate, UINT16 dest, UINT8 twice)
******************************************/
INLINE UINT8 RLCB(z8000_state *cpustate, UINT8 dest, UINT8 twice)
{
- UINT8 c = dest & S08;
+ UINT8 c = dest & S08;
UINT8 result = (dest << 1) | GET_C;
CLR_CZSV;
if (twice) {
UINT8 c1 = c >> 7;
- c = result & S08;
+ c = result & S08;
result = (result << 1) | c1;
}
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
- if ((result ^ dest) & S08) SET_V;
+ if ((result ^ dest) & S08) SET_V;
return result;
}
@@ -780,17 +780,17 @@ INLINE UINT8 RLCB(z8000_state *cpustate, UINT8 dest, UINT8 twice)
******************************************/
INLINE UINT16 RLCW(z8000_state *cpustate, UINT16 dest, UINT8 twice)
{
- UINT16 c = dest & S16;
+ UINT16 c = dest & S16;
UINT16 result = (dest << 1) | GET_C;
CLR_CZSV;
if (twice) {
UINT16 c1 = c >> 15;
- c = result & S16;
+ c = result & S16;
result = (result << 1) | c1;
- }
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ }
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
- if ((result ^ dest) & S16) SET_V;
+ if ((result ^ dest) & S16) SET_V;
return result;
}
@@ -803,8 +803,8 @@ INLINE UINT8 RRB(z8000_state *cpustate, UINT8 dest, UINT8 twice)
UINT8 result = (dest >> 1) | (dest << 7);
CLR_CZSV;
if (twice) result = (result >> 1) | (result << 7);
- if (!result) SET_Z; else if (result & S08) SET_SC;
- if ((result ^ dest) & S08) SET_V;
+ if (!result) SET_Z; else if (result & S08) SET_SC;
+ if ((result ^ dest) & S08) SET_V;
return result;
}
@@ -817,8 +817,8 @@ INLINE UINT16 RRW(z8000_state *cpustate, UINT16 dest, UINT8 twice)
UINT16 result = (dest >> 1) | (dest << 15);
CLR_CZSV;
if (twice) result = (result >> 1) | (result << 15);
- if (!result) SET_Z; else if (result & S16) SET_SC;
- if ((result ^ dest) & S16) SET_V;
+ if (!result) SET_Z; else if (result & S16) SET_SC;
+ if ((result ^ dest) & S16) SET_V;
return result;
}
@@ -836,9 +836,9 @@ INLINE UINT8 RRCB(z8000_state *cpustate, UINT8 dest, UINT8 twice)
c = result & 1;
result = (result >> 1) | c1;
}
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
- if ((result ^ dest) & S08) SET_V;
+ if ((result ^ dest) & S08) SET_V;
return result;
}
@@ -855,10 +855,10 @@ INLINE UINT16 RRCW(z8000_state *cpustate, UINT16 dest, UINT8 twice)
UINT16 c1 = c << 15;
c = result & 1;
result = (result >> 1) | c1;
- }
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ }
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
- if ((result ^ dest) & S16) SET_V;
+ if ((result ^ dest) & S16) SET_V;
return result;
}
@@ -872,7 +872,7 @@ INLINE UINT8 SDAB(z8000_state *cpustate, UINT8 dest, INT8 count)
UINT8 c = 0;
CLR_CZSV;
while (count > 0) {
- c = result & S08;
+ c = result & S08;
result <<= 1;
count--;
}
@@ -881,9 +881,9 @@ INLINE UINT8 SDAB(z8000_state *cpustate, UINT8 dest, INT8 count)
result >>= 1;
count++;
}
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
- if ((result ^ dest) & S08) SET_V;
+ if ((result ^ dest) & S08) SET_V;
return (UINT8)result;
}
@@ -897,7 +897,7 @@ INLINE UINT16 SDAW(z8000_state *cpustate, UINT16 dest, INT8 count)
UINT16 c = 0;
CLR_CZSV;
while (count > 0) {
- c = result & S16;
+ c = result & S16;
result <<= 1;
count--;
}
@@ -906,9 +906,9 @@ INLINE UINT16 SDAW(z8000_state *cpustate, UINT16 dest, INT8 count)
result >>= 1;
count++;
}
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
- if ((result ^ dest) & S16) SET_V;
+ if ((result ^ dest) & S16) SET_V;
return (UINT16)result;
}
@@ -922,7 +922,7 @@ INLINE UINT32 SDAL(z8000_state *cpustate, UINT32 dest, INT8 count)
UINT32 c = 0;
CLR_CZSV;
while (count > 0) {
- c = result & S32;
+ c = result & S32;
result <<= 1;
count--;
}
@@ -931,9 +931,9 @@ INLINE UINT32 SDAL(z8000_state *cpustate, UINT32 dest, INT8 count)
result >>= 1;
count++;
}
- CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
- if ((result ^ dest) & S32) SET_V;
+ if ((result ^ dest) & S32) SET_V;
return (UINT32) result;
}
@@ -947,7 +947,7 @@ INLINE UINT8 SDLB(z8000_state *cpustate, UINT8 dest, INT8 count)
UINT8 c = 0;
CLR_CZSV;
while (count > 0) {
- c = result & S08;
+ c = result & S08;
result <<= 1;
count--;
}
@@ -956,9 +956,9 @@ INLINE UINT8 SDLB(z8000_state *cpustate, UINT8 dest, INT8 count)
result >>= 1;
count++;
}
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
- if ((result ^ dest) & S08) SET_V;
+ if ((result ^ dest) & S08) SET_V;
return result;
}
@@ -970,9 +970,9 @@ INLINE UINT16 SDLW(z8000_state *cpustate, UINT16 dest, INT8 count)
{
UINT16 result = dest;
UINT16 c = 0;
- CLR_CZSV;
+ CLR_CZSV;
while (count > 0) {
- c = result & S16;
+ c = result & S16;
result <<= 1;
count--;
}
@@ -981,9 +981,9 @@ INLINE UINT16 SDLW(z8000_state *cpustate, UINT16 dest, INT8 count)
result >>= 1;
count++;
}
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
- if ((result ^ dest) & S16) SET_V;
+ if ((result ^ dest) & S16) SET_V;
return result;
}
@@ -995,9 +995,9 @@ INLINE UINT32 SDLL(z8000_state *cpustate, UINT32 dest, INT8 count)
{
UINT32 result = dest;
UINT32 c = 0;
- CLR_CZSV;
+ CLR_CZSV;
while (count > 0) {
- c = result & S32;
+ c = result & S32;
result <<= 1;
count--;
}
@@ -1006,9 +1006,9 @@ INLINE UINT32 SDLL(z8000_state *cpustate, UINT32 dest, INT8 count)
result >>= 1;
count++;
}
- CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
- if ((result ^ dest) & S32) SET_V;
+ if ((result ^ dest) & S32) SET_V;
return result;
}
@@ -1018,12 +1018,12 @@ INLINE UINT32 SDLL(z8000_state *cpustate, UINT32 dest, INT8 count)
******************************************/
INLINE UINT8 SLAB(z8000_state *cpustate, UINT8 dest, UINT8 count)
{
- UINT8 c = (count) ? (dest << (count - 1)) & S08 : 0;
+ UINT8 c = (count) ? (dest << (count - 1)) & S08 : 0;
UINT8 result = (UINT8)((INT8)dest << count);
CLR_CZSV;
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
- if ((result ^ dest) & S08) SET_V;
+ if ((result ^ dest) & S08) SET_V;
return result;
}
@@ -1033,12 +1033,12 @@ INLINE UINT8 SLAB(z8000_state *cpustate, UINT8 dest, UINT8 count)
******************************************/
INLINE UINT16 SLAW(z8000_state *cpustate, UINT16 dest, UINT8 count)
{
- UINT16 c = (count) ? (dest << (count - 1)) & S16 : 0;
+ UINT16 c = (count) ? (dest << (count - 1)) & S16 : 0;
UINT16 result = (UINT16)((INT16)dest << count);
CLR_CZSV;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
- if ((result ^ dest) & S16) SET_V;
+ if ((result ^ dest) & S16) SET_V;
return result;
}
@@ -1048,12 +1048,12 @@ INLINE UINT16 SLAW(z8000_state *cpustate, UINT16 dest, UINT8 count)
******************************************/
INLINE UINT32 SLAL(z8000_state *cpustate, UINT32 dest, UINT8 count)
{
- UINT32 c = (count) ? (dest << (count - 1)) & S32 : 0;
+ UINT32 c = (count) ? (dest << (count - 1)) & S32 : 0;
UINT32 result = (UINT32)((INT32)dest << count);
CLR_CZSV;
- CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
- if ((result ^ dest) & S32) SET_V;
+ if ((result ^ dest) & S32) SET_V;
return result;
}
@@ -1063,10 +1063,10 @@ INLINE UINT32 SLAL(z8000_state *cpustate, UINT32 dest, UINT8 count)
******************************************/
INLINE UINT8 SLLB(z8000_state *cpustate, UINT8 dest, UINT8 count)
{
- UINT8 c = (count) ? (dest << (count - 1)) & S08 : 0;
+ UINT8 c = (count) ? (dest << (count - 1)) & S08 : 0;
UINT8 result = dest << count;
CLR_CZS;
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
return result;
}
@@ -1077,10 +1077,10 @@ INLINE UINT8 SLLB(z8000_state *cpustate, UINT8 dest, UINT8 count)
******************************************/
INLINE UINT16 SLLW(z8000_state *cpustate, UINT16 dest, UINT8 count)
{
- UINT16 c = (count) ? (dest << (count - 1)) & S16 : 0;
+ UINT16 c = (count) ? (dest << (count - 1)) & S16 : 0;
UINT16 result = dest << count;
CLR_CZS;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
return result;
}
@@ -1091,10 +1091,10 @@ INLINE UINT16 SLLW(z8000_state *cpustate, UINT16 dest, UINT8 count)
******************************************/
INLINE UINT32 SLLL(z8000_state *cpustate, UINT32 dest, UINT8 count)
{
- UINT32 c = (count) ? (dest << (count - 1)) & S32 : 0;
+ UINT32 c = (count) ? (dest << (count - 1)) & S32 : 0;
UINT32 result = dest << count;
CLR_CZS;
- CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
return result;
}
@@ -1108,7 +1108,7 @@ INLINE UINT8 SRAB(z8000_state *cpustate, UINT8 dest, UINT8 count)
UINT8 c = (count) ? ((INT8)dest >> (count - 1)) & 1 : 0;
UINT8 result = (UINT8)((INT8)dest >> count);
CLR_CZSV;
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
return result;
}
@@ -1122,7 +1122,7 @@ INLINE UINT16 SRAW(z8000_state *cpustate, UINT16 dest, UINT8 count)
UINT8 c = (count) ? ((INT16)dest >> (count - 1)) & 1 : 0;
UINT16 result = (UINT16)((INT16)dest >> count);
CLR_CZSV;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
return result;
}
@@ -1136,7 +1136,7 @@ INLINE UINT32 SRAL(z8000_state *cpustate, UINT32 dest, UINT8 count)
UINT8 c = (count) ? ((INT32)dest >> (count - 1)) & 1 : 0;
UINT32 result = (UINT32)((INT32)dest >> count);
CLR_CZSV;
- CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
return result;
}
@@ -1150,7 +1150,7 @@ INLINE UINT8 SRLB(z8000_state *cpustate, UINT8 dest, UINT8 count)
UINT8 c = (count) ? (dest >> (count - 1)) & 1 : 0;
UINT8 result = dest >> count;
CLR_CZS;
- CHK_XXXB_ZS; /* set Z and S flags for result byte */
+ CHK_XXXB_ZS; /* set Z and S flags for result byte */
if (c) SET_C;
return result;
}
@@ -1164,7 +1164,7 @@ INLINE UINT16 SRLW(z8000_state *cpustate, UINT16 dest, UINT8 count)
UINT8 c = (count) ? (dest >> (count - 1)) & 1 : 0;
UINT16 result = dest >> count;
CLR_CZS;
- CHK_XXXW_ZS; /* set Z and S flags for result word */
+ CHK_XXXW_ZS; /* set Z and S flags for result word */
if (c) SET_C;
return result;
}
@@ -1178,7 +1178,7 @@ INLINE UINT32 SRLL(z8000_state *cpustate, UINT32 dest, UINT8 count)
UINT8 c = (count) ? (dest >> (count - 1)) & 1 : 0;
UINT32 result = dest >> count;
CLR_CZS;
- CHK_XXXL_ZS; /* set Z and S flags for result long */
+ CHK_XXXL_ZS; /* set Z and S flags for result long */
if (c) SET_C;
return result;
}
@@ -1485,7 +1485,7 @@ static void Z0C_ddN0_0001_imm8(z8000_state *cpustate)
static void Z0C_ddN0_0010(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_B(cpustate, AS_DATA, addr, NEGB(cpustate, RDMEM_B(cpustate, AS_DATA, addr)));
}
@@ -1517,9 +1517,9 @@ static void Z0C_ddN0_0101_imm8(z8000_state *cpustate)
static void Z0C_ddN0_0110(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
- if (RDMEM_B(cpustate, AS_DATA, addr) & S08) SET_S; else CLR_S;
- WRMEM_B(cpustate, AS_DATA, addr, 0xff);
+ UINT32 addr = addr_from_reg(cpustate, dst);
+ if (RDMEM_B(cpustate, AS_DATA, addr) & S08) SET_S; else CLR_S;
+ WRMEM_B(cpustate, AS_DATA, addr, 0xff);
}
/******************************************
@@ -1539,7 +1539,7 @@ static void Z0C_ddN0_1000(z8000_state *cpustate)
static void Z0D_ddN0_0000(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_W(cpustate, AS_DATA, addr, COMW(cpustate, RDMEM_W(cpustate, AS_DATA, addr)));
}
@@ -1561,7 +1561,7 @@ static void Z0D_ddN0_0001_imm16(z8000_state *cpustate)
static void Z0D_ddN0_0010(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_W(cpustate, AS_DATA, addr, NEGW(cpustate, RDMEM_W(cpustate, AS_DATA, addr)));
}
@@ -1593,9 +1593,9 @@ static void Z0D_ddN0_0101_imm16(z8000_state *cpustate)
static void Z0D_ddN0_0110(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
- if (RDMEM_W(cpustate, AS_DATA, addr) & S16) SET_S; else CLR_S;
- WRMEM_W(cpustate, AS_DATA, addr, 0xffff);
+ UINT32 addr = addr_from_reg(cpustate, dst);
+ if (RDMEM_W(cpustate, AS_DATA, addr) & S16) SET_S; else CLR_S;
+ WRMEM_W(cpustate, AS_DATA, addr, 0xffff);
}
/******************************************
@@ -1625,10 +1625,10 @@ static void Z0D_ddN0_1001_imm16(z8000_state *cpustate)
******************************************/
static void Z0E_imm8(z8000_state *cpustate)
{
- CHECK_EXT_INSTR();
+ CHECK_EXT_INSTR();
GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext0e $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
}
@@ -1640,13 +1640,13 @@ static void Z0E_imm8(z8000_state *cpustate)
******************************************/
static void Z0F_imm8(z8000_state *cpustate)
{
- CHECK_EXT_INSTR();
+ CHECK_EXT_INSTR();
GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext0f $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -1885,15 +1885,15 @@ static void Z1C_ddN0_1000(z8000_state *cpustate)
******************************************/
static void Z1C_ddN0_1001_0000_ssss_0000_nmin1(z8000_state *cpustate)
{
- GET_DST(OP0,NIB2);
- GET_CNT(OP1,NIB3);
- GET_SRC(OP1,NIB1);
+ GET_DST(OP0,NIB2);
+ GET_CNT(OP1,NIB3);
+ GET_SRC(OP1,NIB1);
UINT32 addr = addr_from_reg(cpustate, dst);
- while (cnt-- >= 0) {
- WRMEM_W(cpustate, AS_DATA, addr, cpustate->RW(src));
+ while (cnt-- >= 0) {
+ WRMEM_W(cpustate, AS_DATA, addr, cpustate->RW(src));
addr = addr_add(cpustate, addr, 2);
src = (src+1) & 15;
- }
+ }
}
/******************************************
@@ -1910,7 +1910,7 @@ static void Z1C_ssN0_0001_0000_dddd_0000_nmin1(z8000_state *cpustate)
cpustate->RW(dst) = RDMEM_W(cpustate, AS_DATA, addr);
addr = addr_add(cpustate, addr, 2);
dst = (dst+1) & 15;
- }
+ }
}
/******************************************
@@ -1959,11 +1959,11 @@ static void Z1E_ddN0_cccc(z8000_state *cpustate)
static void Z1F_ddN0_0000(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- if (segmented_mode(cpustate))
- PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
- else
- PUSHW(cpustate, SP, cpustate->pc);
- set_pc(cpustate, addr_from_reg(cpustate, dst));
+ if (segmented_mode(cpustate))
+ PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+ else
+ PUSHW(cpustate, SP, cpustate->pc);
+ set_pc(cpustate, addr_from_reg(cpustate, dst));
}
/******************************************
@@ -1974,7 +1974,7 @@ static void Z20_ssN0_dddd(z8000_state *cpustate)
{
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
- cpustate->RB(dst) = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src));
+ cpustate->RB(dst) = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src));
}
/******************************************
@@ -2018,7 +2018,7 @@ static void Z22_ddN0_imm4(z8000_state *cpustate)
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_B(cpustate, AS_DATA, addr, RDMEM_B(cpustate, AS_DATA, addr) & ~bit);
}
@@ -2041,7 +2041,7 @@ static void Z23_ddN0_imm4(z8000_state *cpustate)
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_W(cpustate, AS_DATA, addr, RDMEM_W(cpustate, AS_DATA, addr) & ~bit);
}
@@ -2064,7 +2064,7 @@ static void Z24_ddN0_imm4(z8000_state *cpustate)
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_B(cpustate, AS_DATA, addr, RDMEM_B(cpustate, AS_DATA, addr) | bit);
}
@@ -2087,7 +2087,7 @@ static void Z25_ddN0_imm4(z8000_state *cpustate)
{
GET_BIT(OP0);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_W(cpustate, AS_DATA, addr, RDMEM_W(cpustate, AS_DATA, addr) | bit);
}
@@ -2143,7 +2143,7 @@ static void Z28_ddN0_imm4m1(z8000_state *cpustate)
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_B(cpustate, AS_DATA, addr, INCB(cpustate, RDMEM_B(cpustate, AS_DATA, addr), i4p1));
}
@@ -2155,7 +2155,7 @@ static void Z29_ddN0_imm4m1(z8000_state *cpustate)
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_W(cpustate, AS_DATA, addr, INCW(cpustate, RDMEM_W(cpustate, AS_DATA, addr), i4p1));
}
@@ -2167,7 +2167,7 @@ static void Z2A_ddN0_imm4m1(z8000_state *cpustate)
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_B(cpustate, AS_DATA, addr, DECB(cpustate, RDMEM_B(cpustate, AS_DATA, addr), i4p1));
}
@@ -2179,7 +2179,7 @@ static void Z2B_ddN0_imm4m1(z8000_state *cpustate)
{
GET_I4M1(OP0,NIB3);
GET_DST(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, dst);
+ UINT32 addr = addr_from_reg(cpustate, dst);
WRMEM_W(cpustate, AS_DATA, addr, DECW(cpustate, RDMEM_W(cpustate, AS_DATA, addr), i4p1));
}
@@ -2191,7 +2191,7 @@ static void Z2C_ssN0_dddd(z8000_state *cpustate)
{
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, src);
+ UINT32 addr = addr_from_reg(cpustate, src);
UINT8 tmp = RDMEM_B(cpustate, AS_DATA, addr);
WRMEM_B(cpustate, AS_DATA, addr, cpustate->RB(dst));
cpustate->RB(dst) = tmp;
@@ -2205,7 +2205,7 @@ static void Z2D_ssN0_dddd(z8000_state *cpustate)
{
GET_DST(OP0,NIB3);
GET_SRC(OP0,NIB2);
- UINT32 addr = addr_from_reg(cpustate, src);
+ UINT32 addr = addr_from_reg(cpustate, src);
UINT16 tmp = RDMEM_W(cpustate, AS_DATA, addr);
WRMEM_W(cpustate, AS_DATA, addr, cpustate->RW(dst));
cpustate->RW(dst) = tmp;
@@ -2400,10 +2400,10 @@ static void Z36_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd36 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -2438,10 +2438,10 @@ static void Z38_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd38 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -2450,18 +2450,18 @@ static void Z38_imm8(z8000_state *cpustate)
******************************************/
static void Z39_ssN0_0000(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
UINT16 fcw;
- if (segmented_mode(cpustate)) {
- UINT32 addr = addr_from_reg(cpustate, src);
- fcw = RDMEM_W(cpustate, AS_DATA, addr + 2);
- set_pc(cpustate, segmented_addr(RDMEM_L(cpustate, AS_DATA, addr + 4)));
- }
- else {
- fcw = RDMEM_W(cpustate, AS_DATA, cpustate->RW(src));
- set_pc(cpustate, RDMEM_W(cpustate, AS_DATA, (UINT16)(cpustate->RW(src) + 2)));
- }
+ if (segmented_mode(cpustate)) {
+ UINT32 addr = addr_from_reg(cpustate, src);
+ fcw = RDMEM_W(cpustate, AS_DATA, addr + 2);
+ set_pc(cpustate, segmented_addr(RDMEM_L(cpustate, AS_DATA, addr + 4)));
+ }
+ else {
+ fcw = RDMEM_W(cpustate, AS_DATA, cpustate->RW(src));
+ set_pc(cpustate, RDMEM_W(cpustate, AS_DATA, (UINT16)(cpustate->RW(src) + 2)));
+ }
if ((fcw ^ cpustate->fcw) & F_SEG) printf("ldps 1 (0x%05x): changing from %ssegmented mode to %ssegmented mode\n", cpustate->pc, (fcw & F_SEG) ? "non-" : "", (fcw & F_SEG) ? "" : "non-");
CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
}
@@ -2472,12 +2472,12 @@ static void Z39_ssN0_0000(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
- GET_DST(OP1,NIB2);
- GET_CCC(OP1,NIB3);
- WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDPORT_B(cpustate, 0, cpustate->RW(src)));
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_CNT(OP1,NIB1);
+ GET_DST(OP1,NIB2);
+ GET_CCC(OP1,NIB3);
+ WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDPORT_B(cpustate, 0, cpustate->RW(src)));
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
}
@@ -2489,14 +2489,14 @@ static void Z3A_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@@
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
- GET_DST(OP1,NIB2);
- GET_CCC(OP1,NIB3);
- WRMEM_B(cpustate, AS_DATA, cpustate->RW(dst), RDPORT_B(cpustate, 1, cpustate->RW(src)));
- cpustate->RW(dst)++;
- cpustate->RW(src)++;
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_CNT(OP1,NIB1);
+ GET_DST(OP1,NIB2);
+ GET_CCC(OP1,NIB3);
+ WRMEM_B(cpustate, AS_DATA, cpustate->RW(dst), RDPORT_B(cpustate, 1, cpustate->RW(src)));
+ cpustate->RW(dst)++;
+ cpustate->RW(src)++;
if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
}
@@ -2507,12 +2507,12 @@ static void Z3A_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
- GET_DST(OP1,NIB2);
- GET_CCC(OP1,NIB3);
- WRPORT_B(cpustate, 0, cpustate->RW(dst), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_CNT(OP1,NIB1);
+ GET_DST(OP1,NIB2);
+ GET_CCC(OP1,NIB3);
+ WRPORT_B(cpustate, 0, cpustate->RW(dst), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
add_to_addr_reg(cpustate, src, 1);
if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
}
@@ -2524,14 +2524,14 @@ static void Z3A_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_0011_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@@
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
- GET_DST(OP1,NIB2);
- GET_CCC(OP1,NIB3);
- WRPORT_B(cpustate, 1, cpustate->RW(dst), RDMEM_B(cpustate, AS_DATA, cpustate->RW(src)));
- cpustate->RW(dst)++;
- cpustate->RW(src)++;
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_CNT(OP1,NIB1);
+ GET_DST(OP1,NIB2);
+ GET_CCC(OP1,NIB3);
+ WRPORT_B(cpustate, 1, cpustate->RW(dst), RDMEM_B(cpustate, AS_DATA, cpustate->RW(src)));
+ cpustate->RW(dst)++;
+ cpustate->RW(src)++;
if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
}
@@ -2541,10 +2541,10 @@ static void Z3A_ssss_0011_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3A_dddd_0100_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_DST(OP0,NIB2);
- GET_IMM16(OP1);
- cpustate->RB(dst) = RDPORT_B(cpustate, 0, imm16);
+ CHECK_PRIVILEGED_INSTR();
+ GET_DST(OP0,NIB2);
+ GET_IMM16(OP1);
+ cpustate->RB(dst) = RDPORT_B(cpustate, 0, imm16);
}
/******************************************
@@ -2553,10 +2553,10 @@ static void Z3A_dddd_0100_imm16(z8000_state *cpustate)
******************************************/
static void Z3A_dddd_0101_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_DST(OP0,NIB2);
- GET_IMM16(OP1);
- cpustate->RB(dst) = RDPORT_B(cpustate, 1, imm16);
+ CHECK_PRIVILEGED_INSTR();
+ GET_DST(OP0,NIB2);
+ GET_IMM16(OP1);
+ cpustate->RB(dst) = RDPORT_B(cpustate, 1, imm16);
}
/******************************************
@@ -2565,10 +2565,10 @@ static void Z3A_dddd_0101_imm16(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_0110_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_IMM16(OP1);
- WRPORT_B(cpustate, 0, imm16, cpustate->RB(src));
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_IMM16(OP1);
+ WRPORT_B(cpustate, 0, imm16, cpustate->RB(src));
}
/******************************************
@@ -2577,10 +2577,10 @@ static void Z3A_ssss_0110_imm16(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_0111_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_IMM16(OP1);
- WRPORT_B(cpustate, 1, imm16, cpustate->RB(src));
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_IMM16(OP1);
+ WRPORT_B(cpustate, 1, imm16, cpustate->RB(src));
}
/******************************************
@@ -2590,7 +2590,7 @@ static void Z3A_ssss_0111_imm16(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
@@ -2608,7 +2608,7 @@ static void Z3A_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
@@ -2626,7 +2626,7 @@ static void Z3A_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
@@ -2644,7 +2644,7 @@ static void Z3A_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3A_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
@@ -2662,9 +2662,9 @@ static void Z3A_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRMEM_W(cpustate, AS_DATA, cpustate->RW(dst), RDPORT_W(cpustate, 0, cpustate->RW(src)));
@@ -2680,9 +2680,9 @@ static void Z3B_ssss_0000_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRMEM_W(cpustate, AS_DATA, cpustate->RW(dst), RDPORT_W(cpustate, 1, cpustate->RW(src)));
@@ -2698,9 +2698,9 @@ static void Z3B_ssss_0001_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRPORT_W(cpustate, 0, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, cpustate->RW(src)));
@@ -2716,9 +2716,9 @@ static void Z3B_ssss_0010_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_0011_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRPORT_W(cpustate, 1, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, cpustate->RW(src)));
@@ -2733,9 +2733,9 @@ static void Z3B_ssss_0011_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_dddd_0100_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_DST(OP0,NIB2);
- GET_IMM16(OP1);
+ CHECK_PRIVILEGED_INSTR();
+ GET_DST(OP0,NIB2);
+ GET_IMM16(OP1);
cpustate->RW(dst) = RDPORT_W(cpustate, 0, imm16);
}
@@ -2745,9 +2745,9 @@ static void Z3B_dddd_0100_imm16(z8000_state *cpustate)
******************************************/
static void Z3B_dddd_0101_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_DST(OP0,NIB2);
- GET_IMM16(OP1);
+ CHECK_PRIVILEGED_INSTR();
+ GET_DST(OP0,NIB2);
+ GET_IMM16(OP1);
cpustate->RW(dst) = RDPORT_W(cpustate, 1, imm16);
}
@@ -2757,9 +2757,9 @@ static void Z3B_dddd_0101_imm16(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_0110_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_IMM16(OP1);
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_IMM16(OP1);
WRPORT_W(cpustate, 0, imm16, cpustate->RW(src));
}
@@ -2769,9 +2769,9 @@ static void Z3B_ssss_0110_imm16(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_0111_imm16(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
- GET_SRC(OP0,NIB2);
- GET_IMM16(OP1);
+ CHECK_PRIVILEGED_INSTR();
+ GET_SRC(OP0,NIB2);
+ GET_IMM16(OP1);
WRPORT_W(cpustate, 1, imm16, cpustate->RW(src));
}
@@ -2782,9 +2782,9 @@ static void Z3B_ssss_0111_imm16(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRMEM_W(cpustate, AS_DATA, cpustate->RW(dst), RDPORT_W(cpustate, 0, cpustate->RW(src)));
@@ -2800,9 +2800,9 @@ static void Z3B_ssss_1000_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRMEM_W(cpustate, AS_DATA, cpustate->RW(dst), RDPORT_W(cpustate, 1, cpustate->RW(src)));
@@ -2818,9 +2818,9 @@ static void Z3B_ssss_1001_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRPORT_W(cpustate, 0, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, cpustate->RW(src)));
@@ -2836,9 +2836,9 @@ static void Z3B_ssss_1010_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3B_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRPORT_W(cpustate, 1, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, cpustate->RW(src)));
@@ -2853,7 +2853,7 @@ static void Z3B_ssss_1011_0000_aaaa_dddd_x000(z8000_state *cpustate)
******************************************/
static void Z3C_ssss_dddd(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_DST(OP0,NIB3);
cpustate->RB(dst) = RDPORT_B(cpustate, 0, cpustate->RW(src));
@@ -2865,7 +2865,7 @@ static void Z3C_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z3D_ssss_dddd(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_DST(OP0,NIB3);
cpustate->RW(dst) = RDPORT_W(cpustate, 0, cpustate->RW(src));
@@ -2877,7 +2877,7 @@ static void Z3D_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z3E_dddd_ssss(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_DST(OP0,NIB2);
GET_SRC(OP0,NIB3);
WRPORT_B(cpustate, 0, cpustate->RW(dst), cpustate->RB(src));
@@ -2889,7 +2889,7 @@ static void Z3E_dddd_ssss(z8000_state *cpustate)
******************************************/
static void Z3F_dddd_ssss(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_DST(OP0,NIB2);
GET_SRC(OP0,NIB3);
WRPORT_W(cpustate, 0, cpustate->RW(dst), cpustate->RW(src));
@@ -2940,7 +2940,7 @@ static void Z41_ssN0_dddd_addr(z8000_state *cpustate)
GET_SRC(OP0,NIB2);
GET_ADDR(OP1);
addr = addr_add(cpustate, addr, cpustate->RW(src));
- cpustate->RW(dst) = ADDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, addr)); /* ASG */
+ cpustate->RW(dst) = ADDW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, addr)); /* ASG */
}
/******************************************
@@ -3242,8 +3242,8 @@ static void Z4C_0000_0101_addr_imm8(z8000_state *cpustate)
static void Z4C_0000_0110_addr(z8000_state *cpustate)
{
GET_ADDR(OP1);
- if (RDMEM_B(cpustate, AS_DATA, addr) & S08) SET_S; else CLR_S;
- WRMEM_B(cpustate, AS_DATA, addr, 0xff);
+ if (RDMEM_B(cpustate, AS_DATA, addr) & S08) SET_S; else CLR_S;
+ WRMEM_B(cpustate, AS_DATA, addr, 0xff);
}
/******************************************
@@ -3327,8 +3327,8 @@ static void Z4C_ddN0_0110_addr(z8000_state *cpustate)
GET_DST(OP0,NIB2);
GET_ADDR(OP1);
addr = addr_add(cpustate, addr, cpustate->RW(dst));
- if (RDMEM_B(cpustate, AS_DATA, addr) & S08) SET_S; else CLR_S;
- WRMEM_B(cpustate, AS_DATA, addr, 0xff);
+ if (RDMEM_B(cpustate, AS_DATA, addr) & S08) SET_S; else CLR_S;
+ WRMEM_B(cpustate, AS_DATA, addr, 0xff);
}
/******************************************
@@ -3402,8 +3402,8 @@ static void Z4D_0000_0101_addr_imm16(z8000_state *cpustate)
static void Z4D_0000_0110_addr(z8000_state *cpustate)
{
GET_ADDR(OP1);
- if (RDMEM_W(cpustate, AS_DATA, addr) & S16) SET_S; else CLR_S;
- WRMEM_W(cpustate, AS_DATA, addr, 0xffff);
+ if (RDMEM_W(cpustate, AS_DATA, addr) & S16) SET_S; else CLR_S;
+ WRMEM_W(cpustate, AS_DATA, addr, 0xffff);
}
/******************************************
@@ -3487,8 +3487,8 @@ static void Z4D_ddN0_0110_addr(z8000_state *cpustate)
GET_DST(OP0,NIB2);
GET_ADDR(OP1);
addr = addr_add(cpustate, addr, cpustate->RW(dst));
- if (RDMEM_W(cpustate, AS_DATA, addr) & S16) SET_S; else CLR_S;
- WRMEM_W(cpustate, AS_DATA, addr, 0xffff);
+ if (RDMEM_W(cpustate, AS_DATA, addr) & S16) SET_S; else CLR_S;
+ WRMEM_W(cpustate, AS_DATA, addr, 0xffff);
}
/******************************************
@@ -3816,7 +3816,7 @@ static void Z5C_0000_0001_0000_dddd_0000_nmin1_addr(z8000_state *cpustate)
while (cnt-- >= 0) {
cpustate->RW(dst) = RDMEM_W(cpustate, AS_DATA, addr);
dst = (dst+1) & 15;
- addr = addr_add (cpustate, addr, 2);
+ addr = addr_add (cpustate, addr, 2);
}
}
@@ -3842,7 +3842,7 @@ static void Z5C_0000_1001_0000_ssss_0000_nmin1_addr(z8000_state *cpustate)
while (cnt-- >= 0) {
WRMEM_W(cpustate, AS_DATA, addr, cpustate->RW(src));
src = (src+1) & 15;
- addr = addr_add (cpustate, addr, 2);
+ addr = addr_add (cpustate, addr, 2);
}
}
@@ -3983,10 +3983,10 @@ static void Z5E_ddN0_cccc_addr(z8000_state *cpustate)
static void Z5F_0000_0000_addr(z8000_state *cpustate)
{
GET_ADDR(OP1);
- if (segmented_mode(cpustate))
- PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
- else
- PUSHW(cpustate, SP, cpustate->pc);
+ if (segmented_mode(cpustate))
+ PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+ else
+ PUSHW(cpustate, SP, cpustate->pc);
set_pc(cpustate, addr);
}
@@ -3998,10 +3998,10 @@ static void Z5F_ddN0_0000_addr(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
GET_ADDR(OP1);
- if (segmented_mode(cpustate))
- PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
- else
- PUSHW(cpustate, SP, cpustate->pc);
+ if (segmented_mode(cpustate))
+ PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+ else
+ PUSHW(cpustate, SP, cpustate->pc);
addr = addr_add(cpustate, addr, cpustate->RW(dst));
set_pc(cpustate, addr);
}
@@ -4171,7 +4171,7 @@ static void Z66_ddN0_imm4_addr(z8000_state *cpustate)
GET_DST(OP0,NIB2);
GET_ADDR(OP1);
addr = addr_add(cpustate, addr, cpustate->RW(dst));
- if (RDMEM_B(cpustate, AS_DATA, addr) & bit) CLR_Z; else SET_Z;
+ if (RDMEM_B(cpustate, AS_DATA, addr) & bit) CLR_Z; else SET_Z;
}
/******************************************
@@ -4320,7 +4320,7 @@ static void Z6C_ssN0_dddd_addr(z8000_state *cpustate)
addr = addr_add(cpustate, addr, cpustate->RW(src));
tmp = RDMEM_B(cpustate, AS_DATA, addr);
WRMEM_B(cpustate, AS_DATA, addr, cpustate->RB(dst));
- cpustate->RB(dst) = tmp;
+ cpustate->RB(dst) = tmp;
}
/******************************************
@@ -4349,7 +4349,7 @@ static void Z6D_ssN0_dddd_addr(z8000_state *cpustate)
addr = addr_add(cpustate, addr, cpustate->RW(src));
tmp = RDMEM_W(cpustate, AS_DATA, addr);
WRMEM_W(cpustate, AS_DATA, addr, cpustate->RW(dst));
- cpustate->RW(dst) = tmp;
+ cpustate->RW(dst) = tmp;
}
/******************************************
@@ -4532,10 +4532,10 @@ static void Z78_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd78 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -4544,7 +4544,7 @@ static void Z78_imm8(z8000_state *cpustate)
******************************************/
static void Z79_0000_0000_addr(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_ADDR(OP1);
UINT16 fcw;
if (segmented_mode(cpustate)) {
@@ -4564,19 +4564,19 @@ static void Z79_0000_0000_addr(z8000_state *cpustate)
******************************************/
static void Z79_ssN0_0000_addr(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_SRC(OP0,NIB2);
GET_ADDR(OP1);
UINT16 fcw;
addr = addr_add(cpustate, addr, cpustate->RW(src));
- if (segmented_mode(cpustate)) {
- fcw = RDMEM_W(cpustate, AS_DATA, addr + 2);
- set_pc(cpustate, segmented_addr(RDMEM_L(cpustate, AS_DATA, addr + 4)));
- }
- else {
- fcw = RDMEM_W(cpustate, AS_DATA, addr);
- cpustate->pc = RDMEM_W(cpustate, AS_DATA, (UINT16)(addr + 2));
- }
+ if (segmented_mode(cpustate)) {
+ fcw = RDMEM_W(cpustate, AS_DATA, addr + 2);
+ set_pc(cpustate, segmented_addr(RDMEM_L(cpustate, AS_DATA, addr + 4)));
+ }
+ else {
+ fcw = RDMEM_W(cpustate, AS_DATA, addr);
+ cpustate->pc = RDMEM_W(cpustate, AS_DATA, (UINT16)(addr + 2));
+ }
if ((fcw ^ cpustate->fcw) & F_SEG) printf("ldps 3 (0x%05x): changing from %ssegmented mode to %ssegmented mode\n", cpustate->pc, (fcw & F_SEG) ? "non-" : "", (fcw & F_SEG) ? "" : "non-");
CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
}
@@ -4587,7 +4587,7 @@ static void Z79_ssN0_0000_addr(z8000_state *cpustate)
******************************************/
static void Z7A_0000_0000(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
cpustate->irq_req |= Z8000_HALT;
if (cpustate->icount > 0) cpustate->icount = 0;
}
@@ -4599,15 +4599,15 @@ static void Z7A_0000_0000(z8000_state *cpustate)
static void Z7B_0000_0000(z8000_state *cpustate)
{
UINT16 tag, fcw;
- CHECK_PRIVILEGED_INSTR();
- tag = POPW(cpustate, SP); /* get type tag */
- fcw = POPW(cpustate, SP); /* get cpustate->fcw */
- if (segmented_mode(cpustate))
- set_pc(cpustate, segmented_addr(POPL(cpustate, SP)));
- else
- cpustate->pc = POPW(cpustate, SP); /* get cpustate->pc */
- cpustate->irq_srv &= ~tag; /* remove IRQ serviced flag */
- CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
+ CHECK_PRIVILEGED_INSTR();
+ tag = POPW(cpustate, SP); /* get type tag */
+ fcw = POPW(cpustate, SP); /* get cpustate->fcw */
+ if (segmented_mode(cpustate))
+ set_pc(cpustate, segmented_addr(POPL(cpustate, SP)));
+ else
+ cpustate->pc = POPW(cpustate, SP); /* get cpustate->pc */
+ cpustate->irq_srv &= ~tag; /* remove IRQ serviced flag */
+ CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
LOG(("Z8K '%s' IRET tag $%04x, fcw $%04x, pc $%04x\n", cpustate->device->tag(), tag, fcw, cpustate->pc));
}
@@ -4617,7 +4617,7 @@ static void Z7B_0000_0000(z8000_state *cpustate)
******************************************/
static void Z7B_0000_1000(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
/* set mu-0 line */
}
@@ -4627,7 +4627,7 @@ static void Z7B_0000_1000(z8000_state *cpustate)
******************************************/
static void Z7B_0000_1001(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
/* reset mu-0 line */
}
@@ -4637,7 +4637,7 @@ static void Z7B_0000_1001(z8000_state *cpustate)
******************************************/
static void Z7B_0000_1010(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
/* test mu-I line */
}
@@ -4647,7 +4647,7 @@ static void Z7B_0000_1010(z8000_state *cpustate)
******************************************/
static void Z7B_dddd_1101(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
/* test mu-I line, invert cascade to mu-0 */
}
@@ -4657,7 +4657,7 @@ static void Z7B_dddd_1101(z8000_state *cpustate)
******************************************/
static void Z7C_0000_00ii(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_IMM2(OP0,NIB3);
UINT16 fcw = cpustate->fcw;
fcw &= (imm2 << 11) | 0xe7ff;
@@ -4670,7 +4670,7 @@ static void Z7C_0000_00ii(z8000_state *cpustate)
******************************************/
static void Z7C_0000_01ii(z8000_state *cpustate)
{
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_IMM2(OP0,NIB3);
UINT16 fcw = cpustate->fcw;
fcw |= ((~imm2) << 11) & 0x1800;
@@ -4683,7 +4683,7 @@ static void Z7C_0000_01ii(z8000_state *cpustate)
******************************************/
static void Z7D_dddd_0ccc(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_IMM3(OP0,NIB3);
GET_DST(OP0,NIB2);
switch (imm3) {
@@ -4707,7 +4707,7 @@ static void Z7D_dddd_0ccc(z8000_state *cpustate)
break;
default:
LOG(("Z8K '%s' LDCTL R%d,%d\n", cpustate->device->tag(), dst, imm3));
- }
+ }
}
/******************************************
@@ -4716,7 +4716,7 @@ static void Z7D_dddd_0ccc(z8000_state *cpustate)
******************************************/
static void Z7D_ssss_1ccc(z8000_state *cpustate)
{//@@@
- CHECK_PRIVILEGED_INSTR();
+ CHECK_PRIVILEGED_INSTR();
GET_IMM3(OP0,NIB3);
GET_SRC(OP0,NIB2);
switch (imm3) {
@@ -4726,7 +4726,7 @@ static void Z7D_ssss_1ccc(z8000_state *cpustate)
fcw = cpustate->RW(src);
CHANGE_FCW(cpustate, fcw); /* check for user/system mode change */
}
- break;
+ break;
case 3:
cpustate->refresh = cpustate->RW(src);
break;
@@ -4744,7 +4744,7 @@ static void Z7D_ssss_1ccc(z8000_state *cpustate)
break;
default:
LOG(("Z8K '%s' LDCTL %d,R%d\n", cpustate->device->tag(), imm3, src));
- }
+ }
}
/******************************************
@@ -4755,10 +4755,10 @@ static void Z7E_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd7e $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -4767,7 +4767,7 @@ static void Z7E_imm8(z8000_state *cpustate)
******************************************/
static void Z7F_imm8(z8000_state *cpustate)
{
- GET_IMM8(0);
+ GET_IMM8(0);
/* execute system call via IRQ */
cpustate->irq_req = Z8000_SYSCALL | imm8;
@@ -4942,8 +4942,8 @@ static void Z8C_dddd_0100(z8000_state *cpustate)
static void Z8C_dddd_0110(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- if (cpustate->RB(dst) & S08) SET_S; else CLR_S;
- cpustate->RB(dst) = 0xff;
+ if (cpustate->RB(dst) & S08) SET_S; else CLR_S;
+ cpustate->RB(dst) = 0xff;
}
/******************************************
@@ -4973,8 +4973,8 @@ static void Z8C_dddd_1000(z8000_state *cpustate)
static void Z8C_dddd_1001(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- cpustate->fcw &= ~0x00fc;
- cpustate->fcw |= (cpustate->RB(dst) & 0xfc);
+ cpustate->fcw &= ~0x00fc;
+ cpustate->fcw |= (cpustate->RB(dst) & 0xfc);
}
/******************************************
@@ -5023,8 +5023,8 @@ static void Z8D_dddd_0100(z8000_state *cpustate)
static void Z8D_dddd_0110(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- if (cpustate->RW(dst) & S16) SET_S; else CLR_S;
- cpustate->RW(dst) = 0xffff;
+ if (cpustate->RW(dst) & S16) SET_S; else CLR_S;
+ cpustate->RW(dst) = 0xffff;
}
/******************************************
@@ -5070,13 +5070,13 @@ static void Z8D_imm4_0101(z8000_state *cpustate)
******************************************/
static void Z8E_imm8(z8000_state *cpustate)
{
- CHECK_EXT_INSTR();
+ CHECK_EXT_INSTR();
GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext8e $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -5085,13 +5085,13 @@ static void Z8E_imm8(z8000_state *cpustate)
******************************************/
static void Z8F_imm8(z8000_state *cpustate)
{
- CHECK_EXT_INSTR();
+ CHECK_EXT_INSTR();
GET_IMM8(0);
LOG(("Z8K '%s' %04x: ext8f $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -5100,9 +5100,9 @@ static void Z8F_imm8(z8000_state *cpustate)
******************************************/
static void Z90_ssss_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
- CPL(cpustate, cpustate->RL(dst), cpustate->RL(src));
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
+ CPL(cpustate, cpustate->RL(dst), cpustate->RL(src));
}
/******************************************
@@ -5111,9 +5111,9 @@ static void Z90_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z91_ddN0_ssss(z8000_state *cpustate)
{
- GET_SRC(OP0,NIB3);
- GET_DST(OP0,NIB2);
- PUSHL(cpustate, dst, cpustate->RL(src));
+ GET_SRC(OP0,NIB3);
+ GET_DST(OP0,NIB2);
+ PUSHL(cpustate, dst, cpustate->RL(src));
}
/******************************************
@@ -5122,9 +5122,9 @@ static void Z91_ddN0_ssss(z8000_state *cpustate)
******************************************/
static void Z92_ssss_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
- cpustate->RL(dst) = SUBL(cpustate, cpustate->RL(dst), cpustate->RL(src));
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
+ cpustate->RL(dst) = SUBL(cpustate, cpustate->RL(dst), cpustate->RL(src));
}
/******************************************
@@ -5155,9 +5155,9 @@ static void Z94_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z95_ssN0_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
- cpustate->RL(dst) = POPL(cpustate, src);
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
+ cpustate->RL(dst) = POPL(cpustate, src);
}
/******************************************
@@ -5177,9 +5177,9 @@ static void Z96_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z97_ssN0_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
- cpustate->RW(dst) = POPW(cpustate, src);
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
+ cpustate->RW(dst) = POPW(cpustate, src);
}
/******************************************
@@ -5188,8 +5188,8 @@ static void Z97_ssN0_dddd(z8000_state *cpustate)
******************************************/
static void Z98_ssss_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
cpustate->RQ(dst) = MULTL(cpustate, cpustate->RQ(dst), cpustate->RL(src));
}
@@ -5199,8 +5199,8 @@ static void Z98_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z99_ssss_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
cpustate->RL(dst) = MULTW(cpustate, cpustate->RL(dst), cpustate->RW(src));
}
@@ -5210,9 +5210,9 @@ static void Z99_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z9A_ssss_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
- cpustate->RQ(dst) = DIVL(cpustate, cpustate->RQ(dst), cpustate->RL(src));
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
+ cpustate->RQ(dst) = DIVL(cpustate, cpustate->RQ(dst), cpustate->RL(src));
}
/******************************************
@@ -5221,9 +5221,9 @@ static void Z9A_ssss_dddd(z8000_state *cpustate)
******************************************/
static void Z9B_ssss_dddd(z8000_state *cpustate)
{
- GET_DST(OP0,NIB3);
- GET_SRC(OP0,NIB2);
- cpustate->RL(dst) = DIVW(cpustate, cpustate->RL(dst), cpustate->RW(src));
+ GET_DST(OP0,NIB3);
+ GET_SRC(OP0,NIB2);
+ cpustate->RL(dst) = DIVW(cpustate, cpustate->RL(dst), cpustate->RW(src));
}
/******************************************
@@ -5235,7 +5235,7 @@ static void Z9C_dddd_1000(z8000_state *cpustate)
GET_DST(OP0,NIB2);
CLR_ZS;
if (!cpustate->RL(dst)) SET_Z;
- else if (cpustate->RL(dst) & S32) SET_S;
+ else if (cpustate->RL(dst) & S32) SET_S;
}
/******************************************
@@ -5246,10 +5246,10 @@ static void Z9D_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd9d $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -5259,8 +5259,8 @@ static void Z9D_imm8(z8000_state *cpustate)
static void Z9E_0000_cccc(z8000_state *cpustate)
{
GET_CCC(OP0,NIB3);
- if (segmented_mode(cpustate))
- switch (cc) {
+ if (segmented_mode(cpustate))
+ switch (cc) {
case 0: if (CC0) set_pc(cpustate, segmented_addr(POPL(cpustate, SP))); break;
case 1: if (CC1) set_pc(cpustate, segmented_addr(POPL(cpustate, SP))); break;
case 2: if (CC2) set_pc(cpustate, segmented_addr(POPL(cpustate, SP))); break;
@@ -5277,9 +5277,9 @@ static void Z9E_0000_cccc(z8000_state *cpustate)
case 13: if (CCD) set_pc(cpustate, segmented_addr(POPL(cpustate, SP))); break;
case 14: if (CCE) set_pc(cpustate, segmented_addr(POPL(cpustate, SP))); break;
case 15: if (CCF) set_pc(cpustate, segmented_addr(POPL(cpustate, SP))); break;
- }
- else
- switch (cc) {
+ }
+ else
+ switch (cc) {
case 0: if (CC0) set_pc(cpustate, POPW(cpustate, SP)); break;
case 1: if (CC1) set_pc(cpustate, POPW(cpustate, SP)); break;
case 2: if (CC2) set_pc(cpustate, POPW(cpustate, SP)); break;
@@ -5296,7 +5296,7 @@ static void Z9E_0000_cccc(z8000_state *cpustate)
case 13: if (CCD) set_pc(cpustate, POPW(cpustate, SP)); break;
case 14: if (CCE) set_pc(cpustate, POPW(cpustate, SP)); break;
case 15: if (CCF) set_pc(cpustate, POPW(cpustate, SP)); break;
- }
+ }
}
/******************************************
@@ -5307,10 +5307,10 @@ static void Z9F_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvd9f $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
}
/******************************************
@@ -5497,7 +5497,7 @@ static void ZAE_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) tmp |= 1; break;
case 14: if (CCE) tmp |= 1; break;
case 15: if (CCF) tmp |= 1; break;
- }
+ }
cpustate->RB(dst) = tmp;
}
@@ -5527,7 +5527,7 @@ static void ZAF_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) tmp |= 1; break;
case 14: if (CCE) tmp |= 1; break;
case 15: if (CCF) tmp |= 1; break;
- }
+ }
cpustate->RW(dst) = tmp;
}
@@ -5540,8 +5540,8 @@ static void ZB0_dddd_0000(z8000_state *cpustate)
GET_DST(OP0,NIB2);
UINT8 result;
UINT16 idx = cpustate->RB(dst);
- if (cpustate->fcw & F_C) idx |= 0x100;
- if (cpustate->fcw & F_H) idx |= 0x200;
+ if (cpustate->fcw & F_C) idx |= 0x100;
+ if (cpustate->fcw & F_H) idx |= 0x200;
if (cpustate->fcw & F_DA) idx |= 0x400;
result = Z8000_dab[idx];
CLR_CZS;
@@ -5557,7 +5557,7 @@ static void ZB0_dddd_0000(z8000_state *cpustate)
static void ZB1_dddd_0000(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- cpustate->RW(dst) = (cpustate->RW(dst) & 0xff) | ((cpustate->RW(dst) & S08) ? 0xff00 : 0x0000);
+ cpustate->RW(dst) = (cpustate->RW(dst) & 0xff) | ((cpustate->RW(dst) & S08) ? 0xff00 : 0x0000);
}
/******************************************
@@ -5578,7 +5578,7 @@ static void ZB1_dddd_0111(z8000_state *cpustate)
static void ZB1_dddd_1010(z8000_state *cpustate)
{
GET_DST(OP0,NIB2);
- cpustate->RL(dst) = (cpustate->RL(dst) & 0xffff) | ((cpustate->RL(dst) & S16) ?
+ cpustate->RL(dst) = (cpustate->RL(dst) & 0xffff) | ((cpustate->RL(dst) & S16) ?
0xffff0000ul : 0x00000000ul);
}
@@ -5693,7 +5693,7 @@ static void ZB3_dddd_0001_imm8(z8000_state *cpustate)
if (imm16 & S16)
cpustate->RW(dst) = SRLW(cpustate, cpustate->RW(dst), -(INT16)imm16);
else
- cpustate->RW(dst) = SLLW(cpustate, cpustate->RW(dst), imm16);
+ cpustate->RW(dst) = SLLW(cpustate, cpustate->RW(dst), imm16);
}
/******************************************
@@ -5769,7 +5769,7 @@ static void ZB3_dddd_1001_imm8(z8000_state *cpustate)
if (imm16 & S16)
cpustate->RW(dst) = SRAW(cpustate, cpustate->RW(dst), -(INT16)imm16);
else
- cpustate->RW(dst) = SLAW(cpustate, cpustate->RW(dst), imm16);
+ cpustate->RW(dst) = SLAW(cpustate, cpustate->RW(dst), imm16);
}
/******************************************
@@ -5886,7 +5886,7 @@ static void ZB8_ddN0_0010_0000_rrrr_ssN0_0000(z8000_state *cpustate)
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
- cpustate->RB(1) = xlt; /* load RH1 */
+ cpustate->RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
@@ -5902,13 +5902,13 @@ static void ZB8_ddN0_0110_0000_rrrr_ssN0_1110(z8000_state *cpustate)
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
- cpustate->RB(1) = xlt; /* load RH1 */
+ cpustate->RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) {
- CLR_V;
- if (!xlt)
- cpustate->pc -= 4;
+ CLR_V;
+ if (!xlt)
+ cpustate->pc -= 4;
}
else SET_V;
}
@@ -5923,7 +5923,7 @@ static void ZB8_ddN0_1010_0000_rrrr_ssN0_0000(z8000_state *cpustate)
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
- cpustate->RB(1) = xlt; /* load RH1 */
+ cpustate->RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
sub_from_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
@@ -5939,13 +5939,13 @@ static void ZB8_ddN0_1110_0000_rrrr_ssN0_1110(z8000_state *cpustate)
GET_SRC(OP1,NIB2);
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
- cpustate->RB(1) = xlt; /* load RH1 */
+ cpustate->RB(1) = xlt; /* load RH1 */
if (xlt) CLR_Z; else SET_Z;
sub_from_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) {
- CLR_V;
- if (!xlt)
- cpustate->pc -= 4;
+ CLR_V;
+ if (!xlt)
+ cpustate->pc -= 4;
}
else SET_V;
}
@@ -5961,7 +5961,7 @@ static void ZB8_ddN0_0000_0000_rrrr_ssN0_0000(z8000_state *cpustate)
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), xlt);
- cpustate->RB(1) = xlt; /* destroy RH1 */
+ cpustate->RB(1) = xlt; /* destroy RH1 */
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
}
@@ -5977,7 +5977,7 @@ static void ZB8_ddN0_0100_0000_rrrr_ssN0_0000(z8000_state *cpustate)
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), xlt);
- cpustate->RB(1) = xlt; /* destroy RH1 */
+ cpustate->RB(1) = xlt; /* destroy RH1 */
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) { CLR_V; cpustate->pc -= 4; } else SET_V;
}
@@ -5993,7 +5993,7 @@ static void ZB8_ddN0_1000_0000_rrrr_ssN0_0000(z8000_state *cpustate)
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), xlt);
- cpustate->RB(1) = xlt; /* destroy RH1 */
+ cpustate->RB(1) = xlt; /* destroy RH1 */
sub_from_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
}
@@ -6009,7 +6009,7 @@ static void ZB8_ddN0_1100_0000_rrrr_ssN0_0000(z8000_state *cpustate)
GET_CNT(OP1,NIB1);
UINT8 xlt = RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src) + RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)));
WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), xlt);
- cpustate->RB(1) = xlt; /* destroy RH1 */
+ cpustate->RB(1) = xlt; /* destroy RH1 */
sub_from_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) { CLR_V; cpustate->pc -= 4; } else SET_V;
}
@@ -6022,10 +6022,10 @@ static void ZB9_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvdb9 $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
(void)imm8;
}
@@ -6057,7 +6057,7 @@ static void ZBA_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 1);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
}
@@ -6070,10 +6070,10 @@ static void ZBA_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
static void ZBA_ssN0_0001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
{
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
- GET_CCC(OP1,NIB3); /* repeat? */
- WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
+ GET_CCC(OP1,NIB3); /* repeat? */
+ WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
add_to_addr_reg(cpustate, src, 1);
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
@@ -6107,7 +6107,7 @@ static void ZBA_ssN0_0010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 1);
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
@@ -6141,7 +6141,7 @@ static void ZBA_ssN0_0100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 1);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
}
@@ -6174,7 +6174,7 @@ static void ZBA_ssN0_0110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 1);
add_to_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
@@ -6190,8 +6190,8 @@ static void ZBA_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
GET_CCC(OP1,NIB3);
GET_DST(OP1,NIB2);
GET_CNT(OP1,NIB1);
- CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
- switch (cc) {
+ CPB(cpustate, cpustate->RB(dst), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
+ switch (cc) {
case 0: if (CC0) SET_Z; else CLR_Z; break;
case 1: if (CC1) SET_Z; else CLR_Z; break;
case 2: if (CC2) SET_Z; else CLR_Z; break;
@@ -6208,7 +6208,7 @@ static void ZBA_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
sub_from_addr_reg(cpustate, src, 1);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
}
@@ -6221,7 +6221,7 @@ static void ZBA_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
static void ZBA_ssN0_1001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
{
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
@@ -6240,7 +6240,7 @@ static void ZBA_ssN0_1010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
GET_CCC(OP1,NIB3);
GET_DST(OP1,NIB2);
GET_CNT(OP1,NIB1);
- CPB(cpustate, RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
+ CPB(cpustate, RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
switch (cc) {
case 0: if (CC0) SET_Z; else CLR_Z; break;
case 1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6258,7 +6258,7 @@ static void ZBA_ssN0_1010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
sub_from_addr_reg(cpustate, src, 1);
sub_from_addr_reg(cpustate, dst, 1);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
@@ -6292,7 +6292,7 @@ static void ZBA_ssN0_1100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
sub_from_addr_reg(cpustate, src, 1);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
}
@@ -6307,7 +6307,7 @@ static void ZBA_ssN0_1110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
GET_CCC(OP1,NIB3);
GET_DST(OP1,NIB2);
GET_CNT(OP1,NIB1);
- CPB(cpustate, RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
+ CPB(cpustate, RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, dst)), RDMEM_B(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
switch (cc) {
case 0: if (CC0) SET_Z; else CLR_Z; break;
case 1: if (CC1) SET_Z; else CLR_Z; break;
@@ -6342,7 +6342,7 @@ static void ZBB_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
GET_DST(OP1,NIB2);
GET_CNT(OP1,NIB1);
CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
- switch (cc) {
+ switch (cc) {
case 0: if (CC0) SET_Z; else CLR_Z; break;
case 1: if (CC1) SET_Z; else CLR_Z; break;
case 2: if (CC2) SET_Z; else CLR_Z; break;
@@ -6359,7 +6359,7 @@ static void ZBB_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 2);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
}
@@ -6372,7 +6372,7 @@ static void ZBB_ssN0_0000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
static void ZBB_ssN0_0001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
{
GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
+ GET_CNT(OP1,NIB1);
GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
WRMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
@@ -6409,7 +6409,7 @@ static void ZBB_ssN0_0010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 2);
add_to_addr_reg(cpustate, dst, 2);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
@@ -6443,7 +6443,7 @@ static void ZBB_ssN0_0100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 2);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
}
@@ -6476,7 +6476,7 @@ static void ZBB_ssN0_0110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
add_to_addr_reg(cpustate, src, 2);
add_to_addr_reg(cpustate, dst, 2);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
@@ -6493,7 +6493,7 @@ static void ZBB_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
GET_DST(OP1,NIB2);
GET_CNT(OP1,NIB1);
CPW(cpustate, cpustate->RW(dst), RDMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
- switch (cc) {
+ switch (cc) {
case 0: if (CC0) SET_Z; else CLR_Z; break;
case 1: if (CC1) SET_Z; else CLR_Z; break;
case 2: if (CC2) SET_Z; else CLR_Z; break;
@@ -6510,7 +6510,7 @@ static void ZBB_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
sub_from_addr_reg(cpustate, src, 2);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
}
@@ -6522,11 +6522,11 @@ static void ZBB_ssN0_1000_0000_rrrr_dddd_cccc(z8000_state *cpustate)
******************************************/
static void ZBB_ssN0_1001_0000_rrrr_ddN0_x000(z8000_state *cpustate)
{
- GET_SRC(OP0,NIB2);
- GET_CNT(OP1,NIB1);
- GET_DST(OP1,NIB2);
+ GET_SRC(OP0,NIB2);
+ GET_CNT(OP1,NIB1);
+ GET_DST(OP1,NIB2);
GET_CCC(OP1,NIB3);
- WRMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
+ WRMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, dst), RDMEM_W(cpustate, AS_DATA, addr_from_reg(cpustate, src)));
sub_from_addr_reg(cpustate, src, 2);
sub_from_addr_reg(cpustate, dst, 2);
if (--cpustate->RW(cnt)) { CLR_V; if (cc == 0) cpustate->pc -= 4; } else SET_V;
@@ -6560,7 +6560,7 @@ static void ZBB_ssN0_1010_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
sub_from_addr_reg(cpustate, src, 2);
sub_from_addr_reg(cpustate, dst, 2);
if (--cpustate->RW(cnt)) CLR_V; else SET_V;
@@ -6594,7 +6594,7 @@ static void ZBB_ssN0_1100_0000_rrrr_dddd_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
sub_from_addr_reg(cpustate, src, 2);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
}
@@ -6627,7 +6627,7 @@ static void ZBB_ssN0_1110_0000_rrrr_ddN0_cccc(z8000_state *cpustate)
case 13: if (CCD) SET_Z; else CLR_Z; break;
case 14: if (CCE) SET_Z; else CLR_Z; break;
case 15: if (CCF) SET_Z; else CLR_Z; break;
- }
+ }
sub_from_addr_reg(cpustate, src, 2);
sub_from_addr_reg(cpustate, dst, 2);
if (--cpustate->RW(cnt)) { CLR_V; if (!(cpustate->fcw & F_Z)) cpustate->pc -= 4; } else SET_V;
@@ -6644,7 +6644,7 @@ static void ZBC_aaaa_bbbb(z8000_state *cpustate)
UINT8 tmp = cpustate->RB(b);
cpustate->RB(a) = (cpustate->RB(a) >> 4) | (cpustate->RB(b) << 4);
cpustate->RB(b) = (cpustate->RB(b) & 0xf0) | (tmp & 0x0f);
- if (cpustate->RB(b)) CLR_Z; else SET_Z;
+ if (cpustate->RB(b)) CLR_Z; else SET_Z;
}
/******************************************
@@ -6680,10 +6680,10 @@ static void ZBF_imm8(z8000_state *cpustate)
{
GET_IMM8(0);
LOG(("Z8K '%s' %04x: rsvdbf $%02x\n", cpustate->device->tag(), cpustate->pc, imm8));
- if (cpustate->fcw & F_EPU) {
+ if (cpustate->fcw & F_EPU) {
/* Z8001 EPU code goes here */
(void)imm8;
- }
+ }
(void)imm8;
}
@@ -6705,10 +6705,10 @@ static void ZC_dddd_imm8(z8000_state *cpustate)
static void ZD_dsp12(z8000_state *cpustate)
{
INT16 dsp12 = cpustate->op[0] & 0xfff;
- if (segmented_mode(cpustate))
- PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
- else
- PUSHW(cpustate, SP, cpustate->pc);
+ if (segmented_mode(cpustate))
+ PUSHL(cpustate, SP, make_segmented_addr(cpustate->pc));
+ else
+ PUSHW(cpustate, SP, cpustate->pc);
dsp12 = (dsp12 & 2048) ? 4096 - 2 * (dsp12 & 2047) : -2 * (dsp12 & 2047);
set_pc(cpustate, addr_add(cpustate, cpustate->pc, dsp12));
}
@@ -6748,11 +6748,11 @@ static void ZE_cccc_dsp8(z8000_state *cpustate)
static void ZF_dddd_0dsp7(z8000_state *cpustate)
{
GET_DST(OP0,NIB1);
- GET_DSP7;
- cpustate->RB(dst) -= 1;
- if (cpustate->RB(dst)) {
- set_pc(cpustate, addr_sub(cpustate, cpustate->pc, 2 * dsp7));
- }
+ GET_DSP7;
+ cpustate->RB(dst) -= 1;
+ if (cpustate->RB(dst)) {
+ set_pc(cpustate, addr_sub(cpustate, cpustate->pc, 2 * dsp7));
+ }
}
/******************************************
@@ -6765,6 +6765,6 @@ static void ZF_dddd_1dsp7(z8000_state *cpustate)
GET_DSP7;
cpustate->RW(dst) -= 1;
if (cpustate->RW(dst)) {
- set_pc(cpustate, addr_sub(cpustate, cpustate->pc, 2 * dsp7));
+ set_pc(cpustate, addr_sub(cpustate, cpustate->pc, 2 * dsp7));
}
}
diff --git a/src/emu/cpu/z8000/z8000tbl.c b/src/emu/cpu/z8000/z8000tbl.c
index 03ada404ff7..4cd5adf1242 100644
--- a/src/emu/cpu/z8000/z8000tbl.c
+++ b/src/emu/cpu/z8000/z8000tbl.c
@@ -22,524 +22,524 @@
*****************************************************************************/
static const Z8000_init table[] = {
-{0x0000,0x000f, 1,2, 7,Z00_0000_dddd_imm8, "addb %rb3,%#b3", 0},
-{0x0010,0x00ff, 1,1, 7,Z00_ssN0_dddd, "addb %rb3,@%rw2", 0},
-{0x0100,0x010f, 1,2, 7,Z01_0000_dddd_imm16, "add %rw3,%#w1", 0},
-{0x0110,0x01ff, 1,1, 7,Z01_ssN0_dddd, "add %rw3,@%rw2", 0},
-{0x0200,0x020f, 1,2, 7,Z02_0000_dddd_imm8, "subb %rb3,%#b3", 0},
-{0x0210,0x02ff, 1,1, 7,Z02_ssN0_dddd, "subb %rb3,@%rw2", 0},
-{0x0300,0x030f, 1,2, 7,Z03_0000_dddd_imm16, "sub %rw3,%#w1", 0},
-{0x0310,0x03ff, 1,1, 7,Z03_ssN0_dddd, "sub %rw3,@%rw2", 0},
-{0x0400,0x040f, 1,2, 7,Z04_0000_dddd_imm8, "orb %rb3,%#b3", 0},
-{0x0410,0x04ff, 1,1, 7,Z04_ssN0_dddd, "orb %rb3,@%rw2", 0},
-{0x0500,0x050f, 1,2, 7,Z05_0000_dddd_imm16, "or %rw3,%#w1", 0},
-{0x0510,0x05ff, 1,1, 7,Z05_ssN0_dddd, "or %rw3,@%rw2", 0},
-{0x0600,0x060f, 1,2, 7,Z06_0000_dddd_imm8, "andb %rb3,%#b3", 0},
-{0x0610,0x06ff, 1,1, 7,Z06_ssN0_dddd, "andb %rb3,@%rw2", 0},
-{0x0700,0x070f, 1,2, 7,Z07_0000_dddd_imm16, "and %rw3,%#w1", 0},
-{0x0710,0x07ff, 1,1, 7,Z07_ssN0_dddd, "and %rw3,@%rw2", 0},
-{0x0800,0x080f, 1,2, 7,Z08_0000_dddd_imm8, "xorb %rb3,%#b3", 0},
-{0x0810,0x08ff, 1,1, 7,Z08_ssN0_dddd, "xorb %rb3,@%rw2", 0},
-{0x0900,0x090f, 1,2, 7,Z09_0000_dddd_imm16, "xor %rw3,%#w1", 0},
-{0x0910,0x09ff, 1,1, 7,Z09_ssN0_dddd, "xor %rw3,@%rw2", 0},
-{0x0a00,0x0a0f, 1,2, 7,Z0A_0000_dddd_imm8, "cpb %rb3,%#b3", 0},
-{0x0a10,0x0aff, 1,1, 7,Z0A_ssN0_dddd, "cpb %rb3,@%rw2", 0},
-{0x0b00,0x0b0f, 1,2, 7,Z0B_0000_dddd_imm16, "cp %rw3,%#w1", 0},
-{0x0b10,0x0bff, 1,1, 7,Z0B_ssN0_dddd, "cp %rw3,@%rw2", 0},
-{0x0c10,0x0cf0,16,1, 12,Z0C_ddN0_0000, "comb @%rw2", 0},
-{0x0c11,0x0cf1,16,2, 11,Z0C_ddN0_0001_imm8, "cpb @%rw2,%#b3", 0},
-{0x0c12,0x0cf2,16,1, 12,Z0C_ddN0_0010, "negb @%rw2", 0},
-{0x0c14,0x0cf4,16,1, 8,Z0C_ddN0_0100, "testb @%rw2", 0},
-{0x0c15,0x0cf5,16,2, 7,Z0C_ddN0_0101_imm8, "ldb @%rw2,%#b3", 0},
-{0x0c16,0x0cf6,16,1, 11,Z0C_ddN0_0110, "tsetb @%rw2", 0},
-{0x0c18,0x0cf8,16,1, 8,Z0C_ddN0_1000, "clrb @%rw2", 0},
-{0x0d10,0x0df0,16,1, 12,Z0D_ddN0_0000, "com @%rw2", 0},
-{0x0d11,0x0df1,16,2, 11,Z0D_ddN0_0001_imm16, "cp @%rw2,%#w1", 0},
-{0x0d12,0x0df2,16,1, 12,Z0D_ddN0_0010, "neg @%rw2", 0},
-{0x0d14,0x0df4,16,1, 8,Z0D_ddN0_0100, "test @%rw2", 0},
-{0x0d15,0x0df5,16,2, 11,Z0D_ddN0_0101_imm16, "ld @%rw2,%#w1", 0}, /* fix cycles ld IR,IM */
-{0x0d16,0x0df6,16,1, 11,Z0D_ddN0_0110, "tset @%rw2", 0},
-{0x0d18,0x0df8,16,1, 8,Z0D_ddN0_1000, "clr @%rw2", 0},
-{0x0d19,0x0df9,16,2, 12,Z0D_ddN0_1001_imm16, "push @%rw2,%#w1", 0},
-{0x0e00,0x0eff, 1,1, 10,Z0E_imm8, "ext0e %#b1", 0},
-{0x0f00,0x0fff, 1,1, 10,Z0F_imm8, "ext0f %#b1", 0},
-{0x1000,0x100f, 1,3, 14,Z10_0000_dddd_imm32, "cpl %rl3,%#l1", 0},
-{0x1010,0x10ff, 1,1, 14,Z10_ssN0_dddd, "cpl %rl3,@%rw2", 0},
-{0x1111,0x11ff, 1,1, 20,Z11_ddN0_ssN0, "pushl @%rw2,@%rw3", 0},
-{0x1200,0x120f, 1,3, 14,Z12_0000_dddd_imm32, "subl %rl3,%#l1", 0},
-{0x1210,0x12ff, 1,1, 14,Z12_ssN0_dddd, "subl %rl3,@%rw2", 0},
-{0x1311,0x13ff, 1,1, 13,Z13_ddN0_ssN0, "push @%rw2,@%rw3", 0},
-{0x1400,0x140f, 1,3, 11,Z14_0000_dddd_imm32, "ldl %rl3,%#l1", 0},
-{0x1410,0x14ff, 1,1, 11,Z14_ssN0_dddd, "ldl %rl3,@%rw2", 0},
-{0x1511,0x15ff, 1,1, 19,Z15_ssN0_ddN0, "popl @%rw3,@%rw2", 0},
-{0x1600,0x160f, 1,3, 14,Z16_0000_dddd_imm32, "addl %rl3,%#l1", 0},
-{0x1610,0x16ff, 1,1, 14,Z16_ssN0_dddd, "addl %rl3,@%rw2", 0},
-{0x1711,0x17ff, 1,1, 12,Z17_ssN0_ddN0, "pop @%rw3,@%rw2", 0},
-{0x1800,0x180f, 1,1,282,Z18_00N0_dddd_imm32, "multl %rq3,@%l#1", 0},
-{0x1810,0x18ff, 1,1,282,Z18_ssN0_dddd, "multl %rq3,@%rw2", 0},
-{0x1900,0x190f, 1,2, 70,Z19_0000_dddd_imm16, "mult %rl3,%#w1", 0},
-{0x1910,0x19ff, 1,1, 70,Z19_ssN0_dddd, "mult %rl3,@%rw2", 0},
-{0x1a00,0x1a0f, 1,3,744,Z1A_0000_dddd_imm32, "divl %rq3,%#l1", 0},
-{0x1a10,0x1aff, 1,1,744,Z1A_ssN0_dddd, "divl %rq3,@%rw2", 0},
-{0x1b00,0x1b0f, 1,2,107,Z1B_0000_dddd_imm16, "div %rl3,%#w1", 0},
-{0x1b10,0x1bff, 1,1,107,Z1B_ssN0_dddd, "div %rl3,@%rw2", 0},
-{0x1c11,0x1cf1,16,2, 11,Z1C_ssN0_0001_0000_dddd_0000_nmin1, "ldm %rw5,@%rw2,#%n", 0},
-{0x1c18,0x1cf8,16,1, 13,Z1C_ddN0_1000, "testl @%rw2", 0},
-{0x1c19,0x1cf9,16,2, 11,Z1C_ddN0_1001_0000_ssss_0000_nmin1, "ldm @%rw2,%rw5,#%n", 0},
-{0x1d10,0x1dff, 1,1, 11,Z1D_ddN0_ssss, "ldl @%rw2,%rl3", 0},
-{0x1e10,0x1eff, 1,1, 10,Z1E_ddN0_cccc, "jp %c3,@%rl2", 0},
-{0x1f10,0x1ff0,16,1, 10,Z1F_ddN0_0000, "call %rw2", DASMFLAG_STEP_OVER},
-{0x2010,0x20ff, 1,1, 7,Z20_ssN0_dddd, "ldb %rb3,@%rw2", 0},
-{0x2100,0x210f, 1,2, 7,Z21_0000_dddd_imm16, "ld %rw3,%#w1", 0},
-{0x2110,0x21ff, 1,1, 7,Z21_ssN0_dddd, "ld %rw3,@%rw2", 0},
-{0x2200,0x220f, 1,2, 10,Z22_0000_ssss_0000_dddd_0000_0000, "resb %rb5,%rw3", 0},
-{0x2210,0x22ff, 1,1, 11,Z22_ddN0_imm4, "resb @%rw3,%3", 0},
-{0x2300,0x230f, 1,2, 10,Z23_0000_ssss_0000_dddd_0000_0000, "res %rw5,%rw3", 0},
-{0x2310,0x23ff, 1,1, 11,Z23_ddN0_imm4, "res @%rw3,%3", 0},
-{0x2400,0x240f, 1,2, 10,Z24_0000_ssss_0000_dddd_0000_0000, "setb %rb5,%rw3", 0},
-{0x2410,0x24ff, 1,1, 11,Z24_ddN0_imm4, "setb @%rw3,%3", 0},
-{0x2500,0x250f, 1,2, 10,Z25_0000_ssss_0000_dddd_0000_0000, "set %rw5,%rw3", 0},
-{0x2510,0x25ff, 1,1, 11,Z25_ddN0_imm4, "set @%rw3,%3", 0},
-{0x2600,0x260f, 1,2, 10,Z26_0000_ssss_0000_dddd_0000_0000, "bitb %rb5,%rw3", 0},
-{0x2610,0x26ff, 1,1, 8,Z26_ddN0_imm4, "bitb @%rw3,%3", 0},
-{0x2700,0x270f, 1,2, 10,Z27_0000_ssss_0000_dddd_0000_0000, "bit %rw5,%rw3", 0},
-{0x2710,0x27ff, 1,1, 8,Z27_ddN0_imm4, "bit @%rw2,%3", 0},
-{0x2810,0x28ff, 1,1, 11,Z28_ddN0_imm4m1, "incb @%rw2,%+3", 0},
-{0x2910,0x29ff, 1,1, 11,Z29_ddN0_imm4m1, "inc @%rw2,%+3", 0},
-{0x2a10,0x2aff, 1,1, 11,Z2A_ddN0_imm4m1, "decb @%rw2,%+3", 0},
-{0x2b10,0x2bff, 1,1, 11,Z2B_ddN0_imm4m1, "dec @%rw2,%+3", 0},
-{0x2c10,0x2cff, 1,1, 12,Z2C_ssN0_dddd, "exb %rb3,@%rw2", 0},
-{0x2d10,0x2dff, 1,1, 12,Z2D_ssN0_dddd, "ex %rw3,@%rw2", 0},
-{0x2e10,0x2eff, 1,1, 8,Z2E_ddN0_ssss, "ldb @%rw2,%rb3", 0},
-{0x2f10,0x2fff, 1,1, 8,Z2F_ddN0_ssss, "ld @%rw2,%rw3", 0},
-{0x3000,0x300f, 1,2, 14,Z30_0000_dddd_dsp16, "ldrb %rb3,%p1", 0},
-{0x3010,0x30ff, 1,2, 14,Z30_ssN0_dddd_imm16, "ldb %rb3,%rw2(%#w1)", 0},
-{0x3100,0x310f, 1,2, 14,Z31_0000_dddd_dsp16, "ldr %rw3,%p1", 0},
-{0x3110,0x31ff, 1,2, 14,Z31_ssN0_dddd_imm16, "ld %rw3,%rw2(%#w1)", 0},
-{0x3200,0x320f, 1,2, 14,Z32_0000_ssss_dsp16, "ldrb %p1,%rb3", 0},
-{0x3210,0x32ff, 1,2, 14,Z32_ddN0_ssss_imm16, "ldb %rw2(%#w1),%rb3", 0},
-{0x3300,0x330f, 1,2, 14,Z33_0000_ssss_dsp16, "ldr %p1,%rw3", 0},
-{0x3310,0x33ff, 1,2, 14,Z33_ddN0_ssss_imm16, "ld %rw2(%#w1),%rw3", 0},
-{0x3400,0x340f, 1,2, 15,Z34_0000_dddd_dsp16, "ldar p%rw3,%p1", 0},
-{0x3410,0x34ff, 1,2, 15,Z34_ssN0_dddd_imm16, "lda p%rw3,%rw2(%#w1)", 0},
-{0x3500,0x350f, 1,2, 17,Z35_0000_dddd_dsp16, "ldrl %rl3,%p1", 0},
-{0x3510,0x35ff, 1,2, 17,Z35_ssN0_dddd_imm16, "ldl %rl3,%rw2(%#w1)", 0},
-{0x3600,0x3600, 1,1, 2,Z36_0000_0000, "bpt", 0},
-{0x3601,0x36ff, 1,1, 10,Z36_imm8, "rsvd36", 0},
-{0x3700,0x370f, 1,2, 17,Z37_0000_ssss_dsp16, "ldrl %p1,%rl3", 0},
-{0x3710,0x37ff, 1,2, 17,Z37_ddN0_ssss_imm16, "ldl %rw2(%#w1),%rl3", 0},
-{0x3800,0x38ff, 1,1, 10,Z38_imm8, "rsvd38", 0},
-{0x3910,0x39f0,16,1, 12,Z39_ssN0_0000, "ldps @%rw2", 0},
-{0x3a00,0x3af0,16,2, 21,Z3A_ssss_0000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3a01,0x3af1,16,2, 21,Z3A_ssss_0001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3a02,0x3af2,16,2, 21,Z3A_ssss_0010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3a03,0x3af3,16,2, 21,Z3A_ssss_0011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3a04,0x3af4,16,2, 10,Z3A_dddd_0100_imm16, "%R %rb2,%#w1", 0},
-{0x3a05,0x3af5,16,2, 10,Z3A_dddd_0101_imm16, "%R %rb2,%#w1", 0},
-{0x3a06,0x3af6,16,2, 12,Z3A_ssss_0110_imm16, "%R %#w1,%rb2", 0},
-{0x3a07,0x3af7,16,2, 12,Z3A_ssss_0111_imm16, "%R %#w1,%rb2", 0},
-{0x3a08,0x3af8,16,2, 21,Z3A_ssss_1000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3a09,0x3af9,16,2, 21,Z3A_ssss_1001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3a0a,0x3afa,16,2, 21,Z3A_ssss_1010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3a0b,0x3afb,16,2, 21,Z3A_ssss_1011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3b00,0x3bf0,16,2, 21,Z3B_ssss_0000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3b01,0x3bf1,16,2, 21,Z3B_ssss_0001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3b02,0x3bf2,16,2, 21,Z3B_ssss_0010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3b03,0x3bf3,16,2, 21,Z3B_ssss_0011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3b04,0x3bf4,16,2, 12,Z3B_dddd_0100_imm16, "%R %rw2,%#w1", 0},
-{0x3b05,0x3bf5,16,2, 12,Z3B_dddd_0101_imm16, "%R %rw2,%#w1", 0},
-{0x3b06,0x3bf6,16,2, 12,Z3B_ssss_0110_imm16, "%R %#w1,%rw2", 0},
-{0x3b07,0x3bf7,16,2, 12,Z3B_ssss_0111_imm16, "%R %#w1,%rw2", 0},
-{0x3b08,0x3bf8,16,2, 21,Z3B_ssss_1000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3b09,0x3bf9,16,2, 21,Z3B_ssss_1001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
-{0x3b0a,0x3bfa,16,2, 21,Z3B_ssss_1010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rb5", 0},
-{0x3b0b,0x3bfb,16,2, 21,Z3B_ssss_1011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rb5", 0},
-{0x3c00,0x3cff, 1,1, 10,Z3C_ssss_dddd, "inb %rb3,@%rw2", 0},
-{0x3d00,0x3dff, 1,1, 10,Z3D_ssss_dddd, "in %rw3,@%rw2", 0},
-{0x3e00,0x3eff, 1,1, 12,Z3E_dddd_ssss, "outb @%rw2,%rb3", 0},
-{0x3f00,0x3fff, 1,1, 12,Z3F_dddd_ssss, "out @%rw2,%rw3", 0},
-{0x4000,0x400f, 1,2, 9,Z40_0000_dddd_addr, "addb %rb3,%a1", 0},
-{0x4010,0x40ff, 1,2, 10,Z40_ssN0_dddd_addr, "addb %rb3,%a1(%rw2)", 0},
-{0x4100,0x410f, 1,2, 9,Z41_0000_dddd_addr, "add %rw3,%a1", 0},
-{0x4110,0x41ff, 1,2, 10,Z41_ssN0_dddd_addr, "add %rw3,%a1(%rw2)", 0},
-{0x4200,0x420f, 1,2, 9,Z42_0000_dddd_addr, "subb %rb3,%a1", 0},
-{0x4210,0x42ff, 1,2, 10,Z42_ssN0_dddd_addr, "subb %rb3,%a1(%rw2)", 0},
-{0x4300,0x430f, 1,2, 9,Z43_0000_dddd_addr, "sub %rw3,%a1", 0},
-{0x4310,0x43ff, 1,2, 10,Z43_ssN0_dddd_addr, "sub %rw3,%a1(%rw2)", 0},
-{0x4400,0x440f, 1,2, 9,Z44_0000_dddd_addr, "orb %rb3,%a1", 0},
-{0x4410,0x44ff, 1,2, 10,Z44_ssN0_dddd_addr, "orb %rb3,%a1(%rw2)", 0},
-{0x4500,0x450f, 1,2, 9,Z45_0000_dddd_addr, "or %rw3,%a1", 0},
-{0x4510,0x45ff, 1,2, 10,Z45_ssN0_dddd_addr, "or %rw3,%a1(%rw2)", 0},
-{0x4600,0x460f, 1,2, 9,Z46_0000_dddd_addr, "andb %rb3,%a1", 0},
-{0x4610,0x46ff, 1,2, 10,Z46_ssN0_dddd_addr, "andb %rb3,%a1(%rw2)", 0},
-{0x4700,0x470f, 1,2, 9,Z47_0000_dddd_addr, "and %rw3,%a1", 0},
-{0x4710,0x47ff, 1,2, 10,Z47_ssN0_dddd_addr, "and %rw3,%a1(%rw2)", 0},
-{0x4800,0x480f, 1,2, 9,Z48_0000_dddd_addr, "xorb %rb3,%a1", 0},
-{0x4810,0x48ff, 1,2, 10,Z48_ssN0_dddd_addr, "xorb %rb3,%a1(%rw2)", 0},
-{0x4900,0x490f, 1,2, 9,Z49_0000_dddd_addr, "xor %rw3,%a1", 0},
-{0x4910,0x49ff, 1,2, 10,Z49_ssN0_dddd_addr, "xor %rw3,%a1(%rw2)", 0},
-{0x4a00,0x4a0f, 1,2, 9,Z4A_0000_dddd_addr, "cpb %rb3,%a1", 0},
-{0x4a10,0x4aff, 1,2, 10,Z4A_ssN0_dddd_addr, "cpb %rb3,%a1(%rw2)", 0},
-{0x4b00,0x4b0f, 1,2, 9,Z4B_0000_dddd_addr, "cp %rw3,%a1", 0},
-{0x4b10,0x4bff, 1,2, 10,Z4B_ssN0_dddd_addr, "cp %rw3,%a1(%rw2)", 0},
-{0x4c00,0x4c00, 1,2, 15,Z4C_0000_0000_addr, "comb %a1", 0},
-{0x4c01,0x4c01, 1,3, 14,Z4C_0000_0001_addr_imm8, "cpb %a1,%#b3", 0},
-{0x4c02,0x4c02, 1,2, 15,Z4C_0000_0010_addr, "negb %a1", 0},
-{0x4c04,0x4c04, 1,2, 11,Z4C_0000_0100_addr, "testb %a1", 0},
-{0x4c05,0x4c05, 1,3, 14,Z4C_0000_0101_addr_imm8, "ldb %a1,%#b3", 0},
-{0x4c06,0x4c06, 1,2, 14,Z4C_0000_0110_addr, "tsetb %a1", 0},
-{0x4c08,0x4c08, 1,2, 11,Z4C_0000_1000_addr, "clrb %a1", 0},
-{0x4c10,0x4cf0,16,2, 16,Z4C_ddN0_0000_addr, "comb %a1(%rw2)", 0},
-{0x4c11,0x4cf1,16,3, 15,Z4C_ddN0_0001_addr_imm8, "cpb %a1(%rw2),%#b3", 0},
-{0x4c12,0x4cf2,16,2, 16,Z4C_ddN0_0010_addr, "negb %a1(%rw2)", 0},
-{0x4c14,0x4cf4,16,2, 12,Z4C_ddN0_0100_addr, "testb %a1(%rw2)", 0},
-{0x4c15,0x4cf5,16,3, 15,Z4C_ddN0_0101_addr_imm8, "ldb %a1(%rw2),%#b3", 0},
-{0x4c16,0x4cf6,16,2, 15,Z4C_ddN0_0110_addr, "tsetb %a1(%rw2)", 0},
-{0x4c18,0x4cf8,16,2, 12,Z4C_ddN0_1000_addr, "clrb %a1(%rw2)", 0},
-{0x4d00,0x4d00, 1,2, 15,Z4D_0000_0000_addr, "com %a1", 0},
-{0x4d01,0x4d01, 1,3, 14,Z4D_0000_0001_addr_imm16, "cp %a1,%#w2", 0},
-{0x4d02,0x4d02, 1,2, 15,Z4D_0000_0010_addr, "neg %a1", 0},
-{0x4d04,0x4d04, 1,2, 11,Z4D_0000_0100_addr, "test %a1", 0},
-{0x4d05,0x4d05, 1,3, 14,Z4D_0000_0101_addr_imm16, "ld %a1,%#w2", 0},
-{0x4d06,0x4d06, 1,2, 14,Z4D_0000_0110_addr, "tset %a1", 0},
-{0x4d08,0x4d08, 1,2, 11,Z4D_0000_1000_addr, "clr %a1", 0},
-{0x4d10,0x4df0,16,2, 16,Z4D_ddN0_0000_addr, "com %a1(%rw2)", 0},
-{0x4d11,0x4df1,16,3, 15,Z4D_ddN0_0001_addr_imm16, "cp %a1(%rw2),%#w2", 0},
-{0x4d12,0x4df2,16,2, 16,Z4D_ddN0_0010_addr, "neg %a1(%rw2)", 0},
-{0x4d14,0x4df4,16,2, 12,Z4D_ddN0_0100_addr, "test %a1(%rw2)", 0},
-{0x4d15,0x4df5,16,3, 15,Z4D_ddN0_0101_addr_imm16, "ld %a1(%rw2),%#w2", 0},
-{0x4d16,0x4df6,16,2, 15,Z4D_ddN0_0110_addr, "tset %a1(%rw2)", 0},
-{0x4d18,0x4df8,16,2, 12,Z4D_ddN0_1000_addr, "clr %a1(%rw2)", 0},
-{0x4e11,0x4ef0,16,2, 12,Z4E_ddN0_ssN0_addr, "ldb %a1(%rw2),%rb3", 0},
-{0x5000,0x500f, 1,2, 15,Z50_0000_dddd_addr, "cpl %rl3,%a1", 0},
-{0x5010,0x50ff, 1,2, 16,Z50_ssN0_dddd_addr, "cpl %rl3,%a1(%rw2)", 0},
-{0x5110,0x51f0,16,2, 21,Z51_ddN0_0000_addr, "pushl @%rw2,%a1", 0},
-{0x5111,0x51f1,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5112,0x51f2,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5113,0x51f3,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5114,0x51f4,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5115,0x51f5,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5116,0x51f6,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5117,0x51f7,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5118,0x51f8,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5119,0x51f9,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x511a,0x51fa,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x511b,0x51fb,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x511c,0x51fc,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x511d,0x51fd,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x511e,0x51fe,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x511f,0x51ff,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
-{0x5200,0x520f, 1,2, 15,Z52_0000_dddd_addr, "subl %rl3,%a1", 0},
-{0x5210,0x52ff, 1,2, 16,Z52_ssN0_dddd_addr, "subl %rl3,%a1(%rw2)", 0},
-{0x5310,0x53f0,16,2, 14,Z53_ddN0_0000_addr, "push @%rw2,%a1", 0},
-{0x5311,0x53f1,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5312,0x53f2,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5313,0x53f3,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5314,0x53f4,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5315,0x53f5,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5316,0x53f6,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5317,0x53f7,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5318,0x53f8,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5319,0x53f9,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x531a,0x53fa,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x531b,0x53fb,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x531c,0x53fc,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x531d,0x53fd,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x531e,0x53fe,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x531f,0x53ff,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
-{0x5400,0x540f, 1,2, 12,Z54_0000_dddd_addr, "ldl %rl3,%a1", 0},
-{0x5410,0x54ff, 1,2, 13,Z54_ssN0_dddd_addr, "ldl %rl3,%a1(%rw2)", 0},
-{0x5510,0x55f0,16,2, 23,Z55_ssN0_0000_addr, "popl %a1,@%rw2", 0},
-{0x5511,0x55f1,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5512,0x55f2,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5513,0x55f3,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5514,0x55f4,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5515,0x55f5,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5516,0x55f6,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5517,0x55f7,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5518,0x55f8,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5519,0x55f9,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x551a,0x55fa,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x551b,0x55fb,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x551c,0x55fc,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x551d,0x55fd,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x551e,0x55fe,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x551f,0x55ff,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
-{0x5600,0x560f, 1,2, 15,Z56_0000_dddd_addr, "addl %rl3,%a1", 0},
-{0x5610,0x56ff, 1,2, 16,Z56_ssN0_dddd_addr, "addl %rl3,%a1(%rw2)", 0},
-{0x5710,0x57f0,16,2, 16,Z57_ssN0_0000_addr, "pop %a1,@%rw2", 0},
-{0x5711,0x57f1,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5712,0x57f2,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5713,0x57f3,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5714,0x57f4,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5715,0x57f5,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5716,0x57f6,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5717,0x57f7,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5718,0x57f8,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5719,0x57f9,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x571a,0x57fa,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x571b,0x57fb,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x571c,0x57fc,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x571d,0x57fd,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x571e,0x57fe,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x571f,0x57ff,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
-{0x5800,0x580f, 1,2,283,Z58_0000_dddd_addr, "multl %rq3,%a1", 0},
-{0x5810,0x58ff, 1,2,284,Z58_ssN0_dddd_addr, "multl %rq3,%a1(%rw2)", 0},
-{0x5900,0x590f, 1,2, 71,Z59_0000_dddd_addr, "mult %rl3,%a1", 0},
-{0x5910,0x59ff, 1,2, 72,Z59_ssN0_dddd_addr, "mult %rl3,%a1(%rw2)", 0},
-{0x5a00,0x5a0f, 1,2,745,Z5A_0000_dddd_addr, "divl %rq3,%a1", 0},
-{0x5a10,0x5aff, 1,2,746,Z5A_ssN0_dddd_addr, "divl %rq3,%a1(%rw2)", 0},
-{0x5b00,0x5b0f, 1,2,108,Z5B_0000_dddd_addr, "div %rl3,%a1", 0},
-{0x5b10,0x5bff, 1,2,109,Z5B_ssN0_dddd_addr, "div %rl3,%a1(%rw2)", 0},
-{0x5c01,0x5c01, 1,3, 14,Z5C_0000_0001_0000_dddd_0000_nmin1_addr, "ldm %rw5,%a2,#%n", 0},
-{0x5c08,0x5c08, 1,2, 16,Z5C_0000_1000_addr, "testl %a1", 0},
-{0x5c09,0x5c09, 1,3, 14,Z5C_0000_1001_0000_ssss_0000_nmin1_addr, "ldm %a2,%rw5,#%n", 0},
-{0x5c11,0x5cf1,16,3, 15,Z5C_ssN0_0001_0000_dddd_0000_nmin1_addr, "ldm %rw5,%a2(%rw2),#%n", 0},
-{0x5c18,0x5cf8,16,2, 17,Z5C_ddN0_1000_addr, "testl %a1(%rw2)", 0},
-{0x5c19,0x5cf9,16,3, 15,Z5C_ddN0_1001_0000_ssN0_0000_nmin1_addr, "ldm %a2(%rw2),%rw5,#%n", 0},
-{0x5d00,0x5d0f, 1,2, 15,Z5D_0000_ssss_addr, "ldl %a1,%rl3", 0},
-{0x5d10,0x5dff, 1,2, 14,Z5D_ddN0_ssss_addr, "ldl %a1(%rw2),%rl3", 0},
-{0x5e00,0x5e0f, 1,2, 7,Z5E_0000_cccc_addr, "jp %c3,%a1", 0},
-{0x5e10,0x5eff, 1,2, 8,Z5E_ddN0_cccc_addr, "jp %c3,%a1(%rw2)", 0},
-{0x5f00,0x5f00, 1,2, 12,Z5F_0000_0000_addr, "call %a1", DASMFLAG_STEP_OVER},
-{0x5f10,0x5ff0,16,2, 13,Z5F_ddN0_0000_addr, "call %a1(%rw2)", DASMFLAG_STEP_OVER},
-{0x6000,0x600f, 1,2, 9,Z60_0000_dddd_addr, "ldb %rb3,%a1", 0},
-{0x6010,0x60ff, 1,2, 10,Z60_ssN0_dddd_addr, "ldb %rb3,%a1(%rw2)", 0},
-{0x6100,0x610f, 1,2, 9,Z61_0000_dddd_addr, "ld %rw3,%a1", 0},
-{0x6110,0x61ff, 1,2, 10,Z61_ssN0_dddd_addr, "ld %rw3,%a1(%rw2)", 0},
-{0x6200,0x620f, 1,2, 13,Z62_0000_imm4_addr, "resb %a1,%3", 0},
-{0x6210,0x62ff, 1,2, 14,Z62_ddN0_imm4_addr, "resb %a1(%rw2),%3", 0},
-{0x6300,0x630f, 1,2, 13,Z63_0000_imm4_addr, "res %a1,%3", 0},
-{0x6310,0x63ff, 1,2, 14,Z63_ddN0_imm4_addr, "res %a1(%rw2),%3", 0},
-{0x6400,0x640f, 1,2, 13,Z64_0000_imm4_addr, "setb %a1,%3", 0},
-{0x6410,0x64ff, 1,2, 14,Z64_ddN0_imm4_addr, "setb %a1(%rw2),%3", 0},
-{0x6500,0x650f, 1,2, 13,Z65_0000_imm4_addr, "set %a1,%3", 0},
-{0x6510,0x65ff, 1,2, 14,Z65_ddN0_imm4_addr, "set %a1(%rw2),%3", 0},
-{0x6600,0x660f, 1,2, 10,Z66_0000_imm4_addr, "bitb %a1,%3", 0},
-{0x6610,0x66ff, 1,2, 11,Z66_ddN0_imm4_addr, "bitb %a1(%rw2),%3", 0},
-{0x6700,0x670f, 1,2, 10,Z67_0000_imm4_addr, "bit %a1,%3", 0},
-{0x6710,0x67ff, 1,2, 11,Z67_ddN0_imm4_addr, "bit %a1(%rw2),%3", 0},
-{0x6800,0x680f, 1,2, 13,Z68_0000_imm4m1_addr, "incb %a1,%+3", 0},
-{0x6810,0x68ff, 1,2, 14,Z68_ddN0_imm4m1_addr, "incb %a1(%rw2),%+3", 0},
-{0x6900,0x690f, 1,2, 13,Z69_0000_imm4m1_addr, "inc %a1,%+3", 0},
-{0x6910,0x69ff, 1,2, 14,Z69_ddN0_imm4m1_addr, "inc %a1(%rw2),%+3", 0},
-{0x6a00,0x6a0f, 1,2, 13,Z6A_0000_imm4m1_addr, "decb %a1,%+3", 0},
-{0x6a10,0x6aff, 1,2, 14,Z6A_ddN0_imm4m1_addr, "decb %a1(%rw2),%+3", 0},
-{0x6b00,0x6b0f, 1,2, 13,Z6B_0000_imm4m1_addr, "dec %a1,%+3", 0},
-{0x6b10,0x6bff, 1,2, 14,Z6B_ddN0_imm4m1_addr, "dec %a1(%rw2),%+3", 0},
-{0x6c00,0x6c0f, 1,2, 15,Z6C_0000_dddd_addr, "exb %rb3,%a1", 0},
-{0x6c10,0x6cff, 1,2, 16,Z6C_ssN0_dddd_addr, "exb %rb3,%a1(%rw2)", 0},
-{0x6d00,0x6d0f, 1,2, 15,Z6D_0000_dddd_addr, "ex %rw3,%a1", 0},
-{0x6d10,0x6dff, 1,2, 16,Z6D_ssN0_dddd_addr, "ex %rw3,%a1(%rw2)", 0},
-{0x6e00,0x6e0f, 1,2, 11,Z6E_0000_ssss_addr, "ldb %a1,%rb3", 0},
-{0x6e10,0x6eff, 1,2, 11,Z6E_ddN0_ssss_addr, "ldb %a1(%rw2),%rb3", 0},
-{0x6f00,0x6f0f, 1,2, 11,Z6F_0000_ssss_addr, "ld %a1,%rw3", 0},
-{0x6f10,0x6fff, 1,2, 12,Z6F_ddN0_ssss_addr, "ld %a1(%rw2),%rw3", 0},
-{0x7010,0x70ff, 1,2, 14,Z70_ssN0_dddd_0000_xxxx_0000_0000, "ldb %rb3,%rw2(%rw5)", 0},
-{0x7110,0x71ff, 1,2, 14,Z71_ssN0_dddd_0000_xxxx_0000_0000, "ld %rw3,%rw2(%rw5)", 0},
-{0x7210,0x72ff, 1,2, 14,Z72_ddN0_ssss_0000_xxxx_0000_0000, "ldb %rw2(%rw5),%rb3", 0},
-{0x7310,0x73ff, 1,2, 14,Z73_ddN0_ssss_0000_xxxx_0000_0000, "ld %rw2(%rw5),%rw3", 0},
-{0x7410,0x74ff, 1,2, 15,Z74_ssN0_dddd_0000_xxxx_0000_0000, "lda p%rw3,%rw2(%rw5)", 0},
-{0x7510,0x75ff, 1,2, 17,Z75_ssN0_dddd_0000_xxxx_0000_0000, "ldl %rl3,%rw2(%rw5)", 0},
-{0x7600,0x760f, 1,2, 12,Z76_0000_dddd_addr, "lda p%rw3,%a1", 0},
-{0x7610,0x76ff, 1,2, 13,Z76_ssN0_dddd_addr, "lda p%rw3,%a1(%rw2)", 0},
-{0x7710,0x77ff, 1,2, 17,Z77_ddN0_ssss_0000_xxxx_0000_0000, "ldl %rw2(%rw5),%rl3", 0},
-{0x7800,0x78ff, 1,1, 10,Z78_imm8, "rsvd78", 0},
-{0x7900,0x7900, 1,2, 16,Z79_0000_0000_addr, "ldps %a1", 0},
-{0x7910,0x79f0,16,2, 17,Z79_ssN0_0000_addr, "ldps %a1(%rw2)", 0},
-{0x7a00,0x7a00, 1,1, 8,Z7A_0000_0000, "halt", DASMFLAG_STEP_OVER},
-{0x7b00,0x7b00, 1,1, 13,Z7B_0000_0000, "iret", DASMFLAG_STEP_OUT},
-{0x7b08,0x7b08, 1,1, 5,Z7B_0000_1000, "mset", 0},
-{0x7b09,0x7b09, 1,1, 5,Z7B_0000_1001, "mres", 0},
-{0x7b0a,0x7b0a, 1,1, 7,Z7B_0000_1010, "mbit", 0},
-{0x7b0d,0x7bfd,16,1, 12,Z7B_dddd_1101, "mreq %rw2", 0},
-{0x7c00,0x7c03, 1,1, 7,Z7C_0000_00ii, "di %i3", 0},
-{0x7c04,0x7c07, 1,1, 7,Z7C_0000_01ii, "ei %i3", 0},
-{0x7d00,0x7df0,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,ctrl0", 0},
-{0x7d01,0x7df1,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,ctrl1", 0},
-{0x7d02,0x7df2,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,fcw", 0},
-{0x7d03,0x7df3,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,refresh", 0},
-{0x7d04,0x7df4,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,psapseg", 0},
-{0x7d05,0x7df5,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,psapoff", 0},
-{0x7d06,0x7df6,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,nspseg", 0},
-{0x7d07,0x7df7,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,nspoff", 0},
-{0x7d08,0x7df8,16,1, 7,Z7D_ssss_1ccc, "ldctl ctrl0,%rw2", 0},
-{0x7d09,0x7df9,16,1, 7,Z7D_ssss_1ccc, "ldctl ctrl1,%rw2", 0},
-{0x7d0a,0x7dfa,16,1, 7,Z7D_ssss_1ccc, "ldctl fcw,%rw2", 0},
-{0x7d0b,0x7dfb,16,1, 7,Z7D_ssss_1ccc, "ldctl refresh,%rw2", 0},
-{0x7d0c,0x7dfc,16,1, 7,Z7D_ssss_1ccc, "ldctl psapseg,%rw2", 0},
-{0x7d0d,0x7dfd,16,1, 7,Z7D_ssss_1ccc, "ldctl psapoff,%rw2", 0},
-{0x7d0e,0x7dfe,16,1, 7,Z7D_ssss_1ccc, "ldctl nspseg,%rw2", 0},
-{0x7d0f,0x7dff,16,1, 7,Z7D_ssss_1ccc, "ldctl nspoff,%rw2", 0},
-{0x7e00,0x7eff, 1,1, 10,Z7E_imm8, "rsvd7e %#b1", 0},
-{0x7f00,0x7fff, 1,1, 33,Z7F_imm8, "sc %#b1", 0},
-{0x8000,0x80ff, 1,1, 4,Z80_ssss_dddd, "addb %rb3,%rb2", 0},
-{0x8100,0x81ff, 1,1, 4,Z81_ssss_dddd, "add %rw3,%rw2", 0},
-{0x8200,0x82ff, 1,1, 4,Z82_ssss_dddd, "subb %rb3,%rb2", 0},
-{0x8300,0x83ff, 1,1, 4,Z83_ssss_dddd, "sub %rw3,%rw2", 0},
-{0x8400,0x84ff, 1,1, 4,Z84_ssss_dddd, "orb %rb3,%rb2", 0},
-{0x8500,0x85ff, 1,1, 4,Z85_ssss_dddd, "or %rw3,%rw2", 0},
-{0x8600,0x86ff, 1,1, 4,Z86_ssss_dddd, "andb %rb3,%rb2", 0},
-{0x8700,0x87ff, 1,1, 4,Z87_ssss_dddd, "and %rw3,%rw2", 0},
-{0x8800,0x88ff, 1,1, 4,Z88_ssss_dddd, "xorb %rb3,%rb2", 0},
-{0x8900,0x89ff, 1,1, 4,Z89_ssss_dddd, "xor %rw3,%rw2", 0},
-{0x8a00,0x8aff, 1,1, 4,Z8A_ssss_dddd, "cpb %rb3,%rb2", 0},
-{0x8b00,0x8bff, 1,1, 4,Z8B_ssss_dddd, "cp %rw3,%rw2", 0},
-{0x8c00,0x8cf0,16,1, 7,Z8C_dddd_0000, "comb %rb2", 0},
-{0x8c02,0x8cf2,16,1, 7,Z8C_dddd_0010, "negb %rb2", 0},
-{0x8c04,0x8cf4,16,1, 7,Z8C_dddd_0100, "testb %rb2", 0},
-{0x8c06,0x8cf6,16,1, 7,Z8C_dddd_0110, "tsetb %rb2", 0},
-{0x8c01,0x8cf1,16,1, 7,Z8C_dddd_0001, "ldctlb %rb2,flags", 0},
-{0x8c08,0x8cf8,16,1, 7,Z8C_dddd_1000, "clrb %rb2", 0},
-{0x8c09,0x8cf9,16,1, 7,Z8C_dddd_1001, "ldctlb flags,%rb2", 0},
-{0x8d00,0x8df0,16,1, 7,Z8D_dddd_0000, "com %rw2", 0},
-{0x8d01,0x8df1,16,1, 7,Z8D_imm4_0001, "setflg %f2", 0},
-{0x8d02,0x8df2,16,1, 7,Z8D_dddd_0010, "neg %rw2", 0},
-{0x8d03,0x8df3,16,1, 7,Z8D_imm4_0011, "resflg %f2", 0},
-{0x8d04,0x8df4,16,1, 7,Z8D_dddd_0100, "test %rw2", 0},
-{0x8d05,0x8df5,16,1, 7,Z8D_imm4_0101, "comflg %f2", 0},
-{0x8d06,0x8df6,16,1, 7,Z8D_dddd_0110, "tset %rw2", 0},
-{0x8d07,0x8d07, 1,1, 7,Z8D_0000_0111, "nop", 0},
-{0x8d08,0x8df8,16,1, 7,Z8D_dddd_1000, "clr %rw2", 0},
-{0x8e00,0x8eff, 1,1, 10,Z8E_imm8, "ext8e %#b1", 0},
-{0x8f00,0x8fff, 1,1, 10,Z8F_imm8, "ext8f %#b1", 0},
-{0x9000,0x90ff, 1,1, 8,Z90_ssss_dddd, "cpl %rl3,%rl2", 0},
-{0x9110,0x91ff, 1,1, 12,Z91_ddN0_ssss, "pushl @%rw2,%rl3", 0},
-{0x9200,0x92ff, 1,1, 8,Z92_ssss_dddd, "subl %rl3,%rl2", 0},
-{0x9310,0x93ff, 1,1, 9,Z93_ddN0_ssss, "push @%rw2,%rw3", 0},
-{0x9400,0x94ff, 1,1, 5,Z94_ssss_dddd, "ldl %rl3,%rl2", 0},
-{0x9510,0x95ff, 1,1, 12,Z95_ssN0_dddd, "popl %rl3,@%rw2", 0},
-{0x9600,0x96ff, 1,1, 8,Z96_ssss_dddd, "addl %rl3,%rl2", 0},
-{0x9710,0x97ff, 1,1, 8,Z97_ssN0_dddd, "pop %rw3,@%rw2", 0},
-{0x9800,0x98ff, 1,1,282,Z98_ssss_dddd, "multl %rq3,%rl2", 0},
-{0x9900,0x99ff, 1,1, 70,Z99_ssss_dddd, "mult %rl3,%rw2", 0},
-{0x9a00,0x9aff, 1,1,744,Z9A_ssss_dddd, "divl %rq3,%rl2", 0},
-{0x9b00,0x9bff, 1,1,107,Z9B_ssss_dddd, "div %rl3,%rw2", 0},
-{0x9c08,0x9cf8,16,1, 13,Z9C_dddd_1000, "testl %rl2", 0},
-{0x9d00,0x9dff, 1,1, 10,Z9D_imm8, "rsvd9d", 0},
-{0x9e00,0x9e0f, 1,1, 10,Z9E_0000_cccc, "ret %c3", DASMFLAG_STEP_OUT},
-{0x9f00,0x9fff, 1,1, 10,Z9F_imm8, "rsvd9f", 0},
-{0xa000,0xa0ff, 1,1, 3,ZA0_ssss_dddd, "ldb %rb3,%rb2", 0},
-{0xa100,0xa1ff, 1,1, 3,ZA1_ssss_dddd, "ld %rw3,%rw2", 0},
-{0xa200,0xa2ff, 1,1, 4,ZA2_dddd_imm4, "resb %rb2,%3", 0},
-{0xa300,0xa3ff, 1,1, 4,ZA3_dddd_imm4, "res %rw2,%3", 0},
-{0xa400,0xa4ff, 1,1, 4,ZA4_dddd_imm4, "setb %rb2,%3", 0},
-{0xa500,0xa5ff, 1,1, 4,ZA5_dddd_imm4, "set %rw2,%3", 0},
-{0xa600,0xa6ff, 1,1, 4,ZA6_dddd_imm4, "bitb %rb2,%3", 0},
-{0xa700,0xa7ff, 1,1, 4,ZA7_dddd_imm4, "bit %rw2,%3", 0},
-{0xa800,0xa8ff, 1,1, 4,ZA8_dddd_imm4m1, "incb %rb2,%+3", 0},
-{0xa900,0xa9ff, 1,1, 4,ZA9_dddd_imm4m1, "inc %rw2,%+3", 0},
-{0xaa00,0xaaff, 1,1, 4,ZAA_dddd_imm4m1, "decb %rb2,%+3", 0},
-{0xab00,0xabff, 1,1, 4,ZAB_dddd_imm4m1, "dec %rw2,%+3", 0},
-{0xac00,0xacff, 1,1, 6,ZAC_ssss_dddd, "exb %rb3,%rb2", 0},
-{0xad00,0xadff, 1,1, 6,ZAD_ssss_dddd, "ex %rw3,%rw2", 0},
-{0xae00,0xaeff, 1,1, 5,ZAE_dddd_cccc, "tccb %c3,%rb2", 0},
-{0xaf00,0xafff, 1,1, 5,ZAF_dddd_cccc, "tcc %c3,%rw2", 0},
-{0xb000,0xb0f0,16,1, 5,ZB0_dddd_0000, "dab %rb2", 0},
-{0xb100,0xb1f0,16,1, 11,ZB1_dddd_0000, "extsb %rw2", 0},
-{0xb107,0xb1f7,16,1, 11,ZB1_dddd_0111, "extsl %rq2", 0},
-{0xb10a,0xb1fa,16,1, 11,ZB1_dddd_1010, "exts %rl2", 0},
-{0xb200,0xb2f0,16,1, 6,ZB2_dddd_00I0, "rlb %rb2,%?3", 0},
-{0xb201,0xb2f1,16,2, 13,ZB2_dddd_0001_imm8, "s%*lb %rb2,%$3", 0},
-{0xb202,0xb2f2,16,1, 6,ZB2_dddd_00I0, "rlb %rb2,%?3", 0},
-{0xb203,0xb2f3,16,2, 15,ZB2_dddd_0011_0000_ssss_0000_0000, "sdlb %rb2,%rw5", 0},
-{0xb204,0xb2f4,16,1, 6,ZB2_dddd_01I0, "rrb %rb2,%?3", 0},
-{0xb206,0xb2f6,16,1, 6,ZB2_dddd_01I0, "rrb %rb2,%?3", 0},
-{0xb208,0xb2f8,16,1, 9,ZB2_dddd_10I0, "rlcb %rb2,%?3", 0},
-{0xb209,0xb2f9,16,2, 13,ZB2_dddd_1001_imm8, "s%*ab %rb2,%$3", 0},
-{0xb20a,0xb2fa,16,1, 9,ZB2_dddd_10I0, "rlcb %rb2,%?3", 0},
-{0xb20b,0xb2fb,16,2, 15,ZB2_dddd_1011_0000_ssss_0000_0000, "sdab %rb2,%rw5", 0},
-{0xb20c,0xb2fc,16,1, 9,ZB2_dddd_11I0, "rrcb %rb2,%?3", 0},
-{0xb20e,0xb2fe,16,1, 9,ZB2_dddd_11I0, "rrcb %rb2,%?3", 0},
-{0xb300,0xb3f0,16,1, 6,ZB3_dddd_00I0, "rl %rw2,%?3", 0},
-{0xb301,0xb3f1,16,2, 13,ZB3_dddd_0001_imm8, "s%*l %rw2,%$3", 0},
-{0xb302,0xb3f2,16,1, 6,ZB3_dddd_00I0, "rl %rw2,%?3", 0},
-{0xb303,0xb3f3,16,2, 15,ZB3_dddd_0011_0000_ssss_0000_0000, "sdl %rw2,%rw5", 0},
-{0xb304,0xb3f4,16,1, 6,ZB3_dddd_01I0, "rr %rw2,%?3", 0},
-{0xb305,0xb3f5,16,2, 13,ZB3_dddd_0101_imm8, "s%*ll %rl2,%$3", 0},
-{0xb306,0xb3f6,16,1, 6,ZB3_dddd_01I0, "rr %rw2,%?3", 0},
-{0xb307,0xb3f7,16,2, 15,ZB3_dddd_0111_0000_ssss_0000_0000, "sdll %rl2,%rw5", 0},
-{0xb308,0xb3f8,16,1, 6,ZB3_dddd_10I0, "rlc %rw2,%?3", 0},
-{0xb309,0xb3f9,16,2, 13,ZB3_dddd_1001_imm8, "s%*a %rw2,%$3", 0},
-{0xb30a,0xb3fa,16,1, 6,ZB3_dddd_10I0, "rlc %rw2,%?3", 0},
-{0xb30b,0xb3fb,16,2, 15,ZB3_dddd_1011_0000_ssss_0000_0000, "sda %rw2,%rw5", 0},
-{0xb30c,0xb3fc,16,1, 6,ZB3_dddd_11I0, "rrc %rw2,%?3", 0},
-{0xb30d,0xb3fd,16,2, 13,ZB3_dddd_1101_imm8, "s%*al %rl2,%$3", 0},
-{0xb30e,0xb3fe,16,1, 6,ZB3_dddd_11I0, "rrc %rw2,%?3", 0},
-{0xb30f,0xb3ff,16,2, 15,ZB3_dddd_1111_0000_ssss_0000_0000, "sdal %rl2,%rw5", 0},
-{0xb400,0xb4ff, 1,1, 5,ZB4_ssss_dddd, "adcb %rb3,%rb2", 0},
-{0xb500,0xb5ff, 1,1, 5,ZB5_ssss_dddd, "adc %rw3,%rw2", 0},
-{0xb600,0xb6ff, 1,1, 5,ZB6_ssss_dddd, "sbcb %rb3,%rb2", 0},
-{0xb700,0xb7ff, 1,1, 5,ZB7_ssss_dddd, "sbc %rw3,%rw2", 0},
-{0xb810,0xb8f0,16,2, 25,ZB8_ddN0_0000_0000_rrrr_ssN0_0000, "trib @%rw2,@%rw6,%rb5", 0},
-{0xb812,0xb8f2,16,2, 25,ZB8_ddN0_0010_0000_rrrr_ssN0_0000, "trtib @%rw2,@%rw6,%rb5", 0},
-{0xb814,0xb8f4,16,2, 25,ZB8_ddN0_0100_0000_rrrr_ssN0_0000, "trirb @%rw2,@%rw6,%rb5", 0},
-{0xb816,0xb8f6,16,2, 25,ZB8_ddN0_0110_0000_rrrr_ssN0_1110, "trtirb @%rw2,@%rw6,%rb5", 0},
-{0xb818,0xb8f8,16,2, 25,ZB8_ddN0_1000_0000_rrrr_ssN0_0000, "trdb @%rw2,@%rw6,%rb5", 0},
-{0xb81a,0xb8fa,16,2, 25,ZB8_ddN0_1010_0000_rrrr_ssN0_0000, "trtrb @%rw2,@%rw6,%rb5", 0},
-{0xb81c,0xb8fc,16,2, 25,ZB8_ddN0_1100_0000_rrrr_ssN0_0000, "trdrb @%rw2,@%rw6,%rb5", 0},
-{0xb81e,0xb8fe,16,2, 25,ZB8_ddN0_1110_0000_rrrr_ssN0_1110, "trtdrb @%rw2,@%rw6,%rb5", 0},
-{0xb900,0xb9ff,16,1, 10,ZB9_imm8, "rsvdb9", 0},
-{0xba10,0xbaf0,16,2, 11,ZBA_ssN0_0000_0000_rrrr_dddd_cccc, "cpib %rb6,@%rw2,%rw5,%c7", 0},
-{0xba11,0xbaf1,16,2, 11,ZBA_ssN0_0001_0000_rrrr_ddN0_x000, "ldirb @%rw6,@%rw2,%rw5", DASMFLAG_STEP_OVER},
-{0xba12,0xbaf2,16,2, 11,ZBA_ssN0_0010_0000_rrrr_ddN0_cccc, "cpsib @%rw6,@%rw2,%rw5,%c7", 0},
-{0xba14,0xbaf4,16,2, 11,ZBA_ssN0_0100_0000_rrrr_dddd_cccc, "cpirb %rb6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xba16,0xbaf6,16,2, 11,ZBA_ssN0_0110_0000_rrrr_ddN0_cccc, "cpsirb @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xba18,0xbaf8,16,2, 11,ZBA_ssN0_1000_0000_rrrr_dddd_cccc, "cpdb %rb6,@%rw2,%rw5,%c7", 0},
-{0xba19,0xbaf9,16,2, 11,ZBA_ssN0_1001_0000_rrrr_ddN0_x000, "lddrb @%rw2,@%rw6,%rw5", DASMFLAG_STEP_OVER},
-{0xba1a,0xbafa,16,2, 11,ZBA_ssN0_1010_0000_rrrr_ddN0_cccc, "cpsdb @%rw6,@%rw2,%rw5,%c7", 0},
-{0xba1c,0xbafc,16,2, 11,ZBA_ssN0_1100_0000_rrrr_dddd_cccc, "cpdrb %rb6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xba1e,0xbafe,16,2, 11,ZBA_ssN0_1110_0000_rrrr_ddN0_cccc, "cpsdrb @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xbb10,0xbbf0,16,2, 11,ZBB_ssN0_0000_0000_rrrr_dddd_cccc, "cpi %rw6,@%rw2,%rw5,%c7", 0},
-{0xbb11,0xbbf1,16,2, 11,ZBB_ssN0_0001_0000_rrrr_ddN0_x000, "ldir @%rw6,@%rw2,%rw5", DASMFLAG_STEP_OVER},
-{0xbb12,0xbbf2,16,2, 11,ZBB_ssN0_0010_0000_rrrr_ddN0_cccc, "cpsi @%rw6,@%rw2,%rw5,%c7", 0},
-{0xbb14,0xbbf4,16,2, 11,ZBB_ssN0_0100_0000_rrrr_dddd_cccc, "cpir %rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xbb16,0xbbf6,16,2, 11,ZBB_ssN0_0110_0000_rrrr_ddN0_cccc, "cpsir @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xbb18,0xbbf8,16,2, 11,ZBB_ssN0_1000_0000_rrrr_dddd_cccc, "cpd %rw6,@%rw2,%rw5,%c7", 0},
-{0xbb19,0xbbf9,16,2, 11,ZBB_ssN0_1001_0000_rrrr_ddN0_x000, "lddr @%rw2,@%rw6,%rw5", DASMFLAG_STEP_OVER},
-{0xbb1a,0xbbfa,16,2, 11,ZBB_ssN0_1010_0000_rrrr_ddN0_cccc, "cpsd @%rw6,@%rw2,%rw5,%c7", 0},
-{0xbb1c,0xbbfc,16,2, 11,ZBB_ssN0_1100_0000_rrrr_dddd_cccc, "cpdr %rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xbb1e,0xbbfe,16,2, 11,ZBB_ssN0_1110_0000_rrrr_ddN0_cccc, "cpsdr @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
-{0xbc00,0xbcff, 1,1, 9,ZBC_aaaa_bbbb, "rrdb %rb3,%rb2", 0},
-{0xbd00,0xbdff, 1,1, 5,ZBD_dddd_imm4, "ldk %rw2,%3", 0},
-{0xbe00,0xbeff, 1,1, 9,ZBE_aaaa_bbbb, "rldb %rb3,%rb2", 0},
-{0xbf00,0xbfff, 1,1, 10,ZBF_imm8, "rsvdbf", 0},
-{0xc000,0xcfff, 1,1, 5,ZC_dddd_imm8, "ldb %rb1,%#b1", 0},
-{0xd000,0xdfff, 1,1, 10,ZD_dsp12, "calr %d2", DASMFLAG_STEP_OVER},
-{0xe000,0xefff, 1,1, 6,ZE_cccc_dsp8, "jr %c1,%d1", 0},
-{0xf000,0xf07f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf100,0xf17f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf200,0xf27f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf300,0xf37f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf400,0xf47f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf500,0xf57f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf600,0xf67f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf700,0xf77f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf800,0xf87f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf900,0xf97f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xfa00,0xfa7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xfb00,0xfb7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xfc00,0xfc7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xfd00,0xfd7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xfe00,0xfe7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xff00,0xff7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
-{0xf080,0xf0ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf180,0xf1ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf280,0xf2ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf380,0xf3ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf480,0xf4ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf580,0xf5ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf680,0xf6ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf780,0xf7ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf880,0xf8ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xf980,0xf9ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xfa80,0xfaff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xfb80,0xfbff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xfc80,0xfcff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xfd80,0xfdff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xfe80,0xfeff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0xff80,0xffff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
-{0, 0, 0,0, 0,NULL, NULL, 0}
+{0x0000,0x000f, 1,2, 7,Z00_0000_dddd_imm8, "addb %rb3,%#b3", 0},
+{0x0010,0x00ff, 1,1, 7,Z00_ssN0_dddd, "addb %rb3,@%rw2", 0},
+{0x0100,0x010f, 1,2, 7,Z01_0000_dddd_imm16, "add %rw3,%#w1", 0},
+{0x0110,0x01ff, 1,1, 7,Z01_ssN0_dddd, "add %rw3,@%rw2", 0},
+{0x0200,0x020f, 1,2, 7,Z02_0000_dddd_imm8, "subb %rb3,%#b3", 0},
+{0x0210,0x02ff, 1,1, 7,Z02_ssN0_dddd, "subb %rb3,@%rw2", 0},
+{0x0300,0x030f, 1,2, 7,Z03_0000_dddd_imm16, "sub %rw3,%#w1", 0},
+{0x0310,0x03ff, 1,1, 7,Z03_ssN0_dddd, "sub %rw3,@%rw2", 0},
+{0x0400,0x040f, 1,2, 7,Z04_0000_dddd_imm8, "orb %rb3,%#b3", 0},
+{0x0410,0x04ff, 1,1, 7,Z04_ssN0_dddd, "orb %rb3,@%rw2", 0},
+{0x0500,0x050f, 1,2, 7,Z05_0000_dddd_imm16, "or %rw3,%#w1", 0},
+{0x0510,0x05ff, 1,1, 7,Z05_ssN0_dddd, "or %rw3,@%rw2", 0},
+{0x0600,0x060f, 1,2, 7,Z06_0000_dddd_imm8, "andb %rb3,%#b3", 0},
+{0x0610,0x06ff, 1,1, 7,Z06_ssN0_dddd, "andb %rb3,@%rw2", 0},
+{0x0700,0x070f, 1,2, 7,Z07_0000_dddd_imm16, "and %rw3,%#w1", 0},
+{0x0710,0x07ff, 1,1, 7,Z07_ssN0_dddd, "and %rw3,@%rw2", 0},
+{0x0800,0x080f, 1,2, 7,Z08_0000_dddd_imm8, "xorb %rb3,%#b3", 0},
+{0x0810,0x08ff, 1,1, 7,Z08_ssN0_dddd, "xorb %rb3,@%rw2", 0},
+{0x0900,0x090f, 1,2, 7,Z09_0000_dddd_imm16, "xor %rw3,%#w1", 0},
+{0x0910,0x09ff, 1,1, 7,Z09_ssN0_dddd, "xor %rw3,@%rw2", 0},
+{0x0a00,0x0a0f, 1,2, 7,Z0A_0000_dddd_imm8, "cpb %rb3,%#b3", 0},
+{0x0a10,0x0aff, 1,1, 7,Z0A_ssN0_dddd, "cpb %rb3,@%rw2", 0},
+{0x0b00,0x0b0f, 1,2, 7,Z0B_0000_dddd_imm16, "cp %rw3,%#w1", 0},
+{0x0b10,0x0bff, 1,1, 7,Z0B_ssN0_dddd, "cp %rw3,@%rw2", 0},
+{0x0c10,0x0cf0,16,1, 12,Z0C_ddN0_0000, "comb @%rw2", 0},
+{0x0c11,0x0cf1,16,2, 11,Z0C_ddN0_0001_imm8, "cpb @%rw2,%#b3", 0},
+{0x0c12,0x0cf2,16,1, 12,Z0C_ddN0_0010, "negb @%rw2", 0},
+{0x0c14,0x0cf4,16,1, 8,Z0C_ddN0_0100, "testb @%rw2", 0},
+{0x0c15,0x0cf5,16,2, 7,Z0C_ddN0_0101_imm8, "ldb @%rw2,%#b3", 0},
+{0x0c16,0x0cf6,16,1, 11,Z0C_ddN0_0110, "tsetb @%rw2", 0},
+{0x0c18,0x0cf8,16,1, 8,Z0C_ddN0_1000, "clrb @%rw2", 0},
+{0x0d10,0x0df0,16,1, 12,Z0D_ddN0_0000, "com @%rw2", 0},
+{0x0d11,0x0df1,16,2, 11,Z0D_ddN0_0001_imm16, "cp @%rw2,%#w1", 0},
+{0x0d12,0x0df2,16,1, 12,Z0D_ddN0_0010, "neg @%rw2", 0},
+{0x0d14,0x0df4,16,1, 8,Z0D_ddN0_0100, "test @%rw2", 0},
+{0x0d15,0x0df5,16,2, 11,Z0D_ddN0_0101_imm16, "ld @%rw2,%#w1", 0}, /* fix cycles ld IR,IM */
+{0x0d16,0x0df6,16,1, 11,Z0D_ddN0_0110, "tset @%rw2", 0},
+{0x0d18,0x0df8,16,1, 8,Z0D_ddN0_1000, "clr @%rw2", 0},
+{0x0d19,0x0df9,16,2, 12,Z0D_ddN0_1001_imm16, "push @%rw2,%#w1", 0},
+{0x0e00,0x0eff, 1,1, 10,Z0E_imm8, "ext0e %#b1", 0},
+{0x0f00,0x0fff, 1,1, 10,Z0F_imm8, "ext0f %#b1", 0},
+{0x1000,0x100f, 1,3, 14,Z10_0000_dddd_imm32, "cpl %rl3,%#l1", 0},
+{0x1010,0x10ff, 1,1, 14,Z10_ssN0_dddd, "cpl %rl3,@%rw2", 0},
+{0x1111,0x11ff, 1,1, 20,Z11_ddN0_ssN0, "pushl @%rw2,@%rw3", 0},
+{0x1200,0x120f, 1,3, 14,Z12_0000_dddd_imm32, "subl %rl3,%#l1", 0},
+{0x1210,0x12ff, 1,1, 14,Z12_ssN0_dddd, "subl %rl3,@%rw2", 0},
+{0x1311,0x13ff, 1,1, 13,Z13_ddN0_ssN0, "push @%rw2,@%rw3", 0},
+{0x1400,0x140f, 1,3, 11,Z14_0000_dddd_imm32, "ldl %rl3,%#l1", 0},
+{0x1410,0x14ff, 1,1, 11,Z14_ssN0_dddd, "ldl %rl3,@%rw2", 0},
+{0x1511,0x15ff, 1,1, 19,Z15_ssN0_ddN0, "popl @%rw3,@%rw2", 0},
+{0x1600,0x160f, 1,3, 14,Z16_0000_dddd_imm32, "addl %rl3,%#l1", 0},
+{0x1610,0x16ff, 1,1, 14,Z16_ssN0_dddd, "addl %rl3,@%rw2", 0},
+{0x1711,0x17ff, 1,1, 12,Z17_ssN0_ddN0, "pop @%rw3,@%rw2", 0},
+{0x1800,0x180f, 1,1,282,Z18_00N0_dddd_imm32, "multl %rq3,@%l#1", 0},
+{0x1810,0x18ff, 1,1,282,Z18_ssN0_dddd, "multl %rq3,@%rw2", 0},
+{0x1900,0x190f, 1,2, 70,Z19_0000_dddd_imm16, "mult %rl3,%#w1", 0},
+{0x1910,0x19ff, 1,1, 70,Z19_ssN0_dddd, "mult %rl3,@%rw2", 0},
+{0x1a00,0x1a0f, 1,3,744,Z1A_0000_dddd_imm32, "divl %rq3,%#l1", 0},
+{0x1a10,0x1aff, 1,1,744,Z1A_ssN0_dddd, "divl %rq3,@%rw2", 0},
+{0x1b00,0x1b0f, 1,2,107,Z1B_0000_dddd_imm16, "div %rl3,%#w1", 0},
+{0x1b10,0x1bff, 1,1,107,Z1B_ssN0_dddd, "div %rl3,@%rw2", 0},
+{0x1c11,0x1cf1,16,2, 11,Z1C_ssN0_0001_0000_dddd_0000_nmin1, "ldm %rw5,@%rw2,#%n", 0},
+{0x1c18,0x1cf8,16,1, 13,Z1C_ddN0_1000, "testl @%rw2", 0},
+{0x1c19,0x1cf9,16,2, 11,Z1C_ddN0_1001_0000_ssss_0000_nmin1, "ldm @%rw2,%rw5,#%n", 0},
+{0x1d10,0x1dff, 1,1, 11,Z1D_ddN0_ssss, "ldl @%rw2,%rl3", 0},
+{0x1e10,0x1eff, 1,1, 10,Z1E_ddN0_cccc, "jp %c3,@%rl2", 0},
+{0x1f10,0x1ff0,16,1, 10,Z1F_ddN0_0000, "call %rw2", DASMFLAG_STEP_OVER},
+{0x2010,0x20ff, 1,1, 7,Z20_ssN0_dddd, "ldb %rb3,@%rw2", 0},
+{0x2100,0x210f, 1,2, 7,Z21_0000_dddd_imm16, "ld %rw3,%#w1", 0},
+{0x2110,0x21ff, 1,1, 7,Z21_ssN0_dddd, "ld %rw3,@%rw2", 0},
+{0x2200,0x220f, 1,2, 10,Z22_0000_ssss_0000_dddd_0000_0000, "resb %rb5,%rw3", 0},
+{0x2210,0x22ff, 1,1, 11,Z22_ddN0_imm4, "resb @%rw3,%3", 0},
+{0x2300,0x230f, 1,2, 10,Z23_0000_ssss_0000_dddd_0000_0000, "res %rw5,%rw3", 0},
+{0x2310,0x23ff, 1,1, 11,Z23_ddN0_imm4, "res @%rw3,%3", 0},
+{0x2400,0x240f, 1,2, 10,Z24_0000_ssss_0000_dddd_0000_0000, "setb %rb5,%rw3", 0},
+{0x2410,0x24ff, 1,1, 11,Z24_ddN0_imm4, "setb @%rw3,%3", 0},
+{0x2500,0x250f, 1,2, 10,Z25_0000_ssss_0000_dddd_0000_0000, "set %rw5,%rw3", 0},
+{0x2510,0x25ff, 1,1, 11,Z25_ddN0_imm4, "set @%rw3,%3", 0},
+{0x2600,0x260f, 1,2, 10,Z26_0000_ssss_0000_dddd_0000_0000, "bitb %rb5,%rw3", 0},
+{0x2610,0x26ff, 1,1, 8,Z26_ddN0_imm4, "bitb @%rw3,%3", 0},
+{0x2700,0x270f, 1,2, 10,Z27_0000_ssss_0000_dddd_0000_0000, "bit %rw5,%rw3", 0},
+{0x2710,0x27ff, 1,1, 8,Z27_ddN0_imm4, "bit @%rw2,%3", 0},
+{0x2810,0x28ff, 1,1, 11,Z28_ddN0_imm4m1, "incb @%rw2,%+3", 0},
+{0x2910,0x29ff, 1,1, 11,Z29_ddN0_imm4m1, "inc @%rw2,%+3", 0},
+{0x2a10,0x2aff, 1,1, 11,Z2A_ddN0_imm4m1, "decb @%rw2,%+3", 0},
+{0x2b10,0x2bff, 1,1, 11,Z2B_ddN0_imm4m1, "dec @%rw2,%+3", 0},
+{0x2c10,0x2cff, 1,1, 12,Z2C_ssN0_dddd, "exb %rb3,@%rw2", 0},
+{0x2d10,0x2dff, 1,1, 12,Z2D_ssN0_dddd, "ex %rw3,@%rw2", 0},
+{0x2e10,0x2eff, 1,1, 8,Z2E_ddN0_ssss, "ldb @%rw2,%rb3", 0},
+{0x2f10,0x2fff, 1,1, 8,Z2F_ddN0_ssss, "ld @%rw2,%rw3", 0},
+{0x3000,0x300f, 1,2, 14,Z30_0000_dddd_dsp16, "ldrb %rb3,%p1", 0},
+{0x3010,0x30ff, 1,2, 14,Z30_ssN0_dddd_imm16, "ldb %rb3,%rw2(%#w1)", 0},
+{0x3100,0x310f, 1,2, 14,Z31_0000_dddd_dsp16, "ldr %rw3,%p1", 0},
+{0x3110,0x31ff, 1,2, 14,Z31_ssN0_dddd_imm16, "ld %rw3,%rw2(%#w1)", 0},
+{0x3200,0x320f, 1,2, 14,Z32_0000_ssss_dsp16, "ldrb %p1,%rb3", 0},
+{0x3210,0x32ff, 1,2, 14,Z32_ddN0_ssss_imm16, "ldb %rw2(%#w1),%rb3", 0},
+{0x3300,0x330f, 1,2, 14,Z33_0000_ssss_dsp16, "ldr %p1,%rw3", 0},
+{0x3310,0x33ff, 1,2, 14,Z33_ddN0_ssss_imm16, "ld %rw2(%#w1),%rw3", 0},
+{0x3400,0x340f, 1,2, 15,Z34_0000_dddd_dsp16, "ldar p%rw3,%p1", 0},
+{0x3410,0x34ff, 1,2, 15,Z34_ssN0_dddd_imm16, "lda p%rw3,%rw2(%#w1)", 0},
+{0x3500,0x350f, 1,2, 17,Z35_0000_dddd_dsp16, "ldrl %rl3,%p1", 0},
+{0x3510,0x35ff, 1,2, 17,Z35_ssN0_dddd_imm16, "ldl %rl3,%rw2(%#w1)", 0},
+{0x3600,0x3600, 1,1, 2,Z36_0000_0000, "bpt", 0},
+{0x3601,0x36ff, 1,1, 10,Z36_imm8, "rsvd36", 0},
+{0x3700,0x370f, 1,2, 17,Z37_0000_ssss_dsp16, "ldrl %p1,%rl3", 0},
+{0x3710,0x37ff, 1,2, 17,Z37_ddN0_ssss_imm16, "ldl %rw2(%#w1),%rl3", 0},
+{0x3800,0x38ff, 1,1, 10,Z38_imm8, "rsvd38", 0},
+{0x3910,0x39f0,16,1, 12,Z39_ssN0_0000, "ldps @%rw2", 0},
+{0x3a00,0x3af0,16,2, 21,Z3A_ssss_0000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3a01,0x3af1,16,2, 21,Z3A_ssss_0001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3a02,0x3af2,16,2, 21,Z3A_ssss_0010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3a03,0x3af3,16,2, 21,Z3A_ssss_0011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3a04,0x3af4,16,2, 10,Z3A_dddd_0100_imm16, "%R %rb2,%#w1", 0},
+{0x3a05,0x3af5,16,2, 10,Z3A_dddd_0101_imm16, "%R %rb2,%#w1", 0},
+{0x3a06,0x3af6,16,2, 12,Z3A_ssss_0110_imm16, "%R %#w1,%rb2", 0},
+{0x3a07,0x3af7,16,2, 12,Z3A_ssss_0111_imm16, "%R %#w1,%rb2", 0},
+{0x3a08,0x3af8,16,2, 21,Z3A_ssss_1000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3a09,0x3af9,16,2, 21,Z3A_ssss_1001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3a0a,0x3afa,16,2, 21,Z3A_ssss_1010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3a0b,0x3afb,16,2, 21,Z3A_ssss_1011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3b00,0x3bf0,16,2, 21,Z3B_ssss_0000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3b01,0x3bf1,16,2, 21,Z3B_ssss_0001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3b02,0x3bf2,16,2, 21,Z3B_ssss_0010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3b03,0x3bf3,16,2, 21,Z3B_ssss_0011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3b04,0x3bf4,16,2, 12,Z3B_dddd_0100_imm16, "%R %rw2,%#w1", 0},
+{0x3b05,0x3bf5,16,2, 12,Z3B_dddd_0101_imm16, "%R %rw2,%#w1", 0},
+{0x3b06,0x3bf6,16,2, 12,Z3B_ssss_0110_imm16, "%R %#w1,%rw2", 0},
+{0x3b07,0x3bf7,16,2, 12,Z3B_ssss_0111_imm16, "%R %#w1,%rw2", 0},
+{0x3b08,0x3bf8,16,2, 21,Z3B_ssss_1000_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3b09,0x3bf9,16,2, 21,Z3B_ssss_1001_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rw5", 0},
+{0x3b0a,0x3bfa,16,2, 21,Z3B_ssss_1010_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rb5", 0},
+{0x3b0b,0x3bfb,16,2, 21,Z3B_ssss_1011_0000_aaaa_dddd_x000, "%R @%rw6,@%rw2,%rb5", 0},
+{0x3c00,0x3cff, 1,1, 10,Z3C_ssss_dddd, "inb %rb3,@%rw2", 0},
+{0x3d00,0x3dff, 1,1, 10,Z3D_ssss_dddd, "in %rw3,@%rw2", 0},
+{0x3e00,0x3eff, 1,1, 12,Z3E_dddd_ssss, "outb @%rw2,%rb3", 0},
+{0x3f00,0x3fff, 1,1, 12,Z3F_dddd_ssss, "out @%rw2,%rw3", 0},
+{0x4000,0x400f, 1,2, 9,Z40_0000_dddd_addr, "addb %rb3,%a1", 0},
+{0x4010,0x40ff, 1,2, 10,Z40_ssN0_dddd_addr, "addb %rb3,%a1(%rw2)", 0},
+{0x4100,0x410f, 1,2, 9,Z41_0000_dddd_addr, "add %rw3,%a1", 0},
+{0x4110,0x41ff, 1,2, 10,Z41_ssN0_dddd_addr, "add %rw3,%a1(%rw2)", 0},
+{0x4200,0x420f, 1,2, 9,Z42_0000_dddd_addr, "subb %rb3,%a1", 0},
+{0x4210,0x42ff, 1,2, 10,Z42_ssN0_dddd_addr, "subb %rb3,%a1(%rw2)", 0},
+{0x4300,0x430f, 1,2, 9,Z43_0000_dddd_addr, "sub %rw3,%a1", 0},
+{0x4310,0x43ff, 1,2, 10,Z43_ssN0_dddd_addr, "sub %rw3,%a1(%rw2)", 0},
+{0x4400,0x440f, 1,2, 9,Z44_0000_dddd_addr, "orb %rb3,%a1", 0},
+{0x4410,0x44ff, 1,2, 10,Z44_ssN0_dddd_addr, "orb %rb3,%a1(%rw2)", 0},
+{0x4500,0x450f, 1,2, 9,Z45_0000_dddd_addr, "or %rw3,%a1", 0},
+{0x4510,0x45ff, 1,2, 10,Z45_ssN0_dddd_addr, "or %rw3,%a1(%rw2)", 0},
+{0x4600,0x460f, 1,2, 9,Z46_0000_dddd_addr, "andb %rb3,%a1", 0},
+{0x4610,0x46ff, 1,2, 10,Z46_ssN0_dddd_addr, "andb %rb3,%a1(%rw2)", 0},
+{0x4700,0x470f, 1,2, 9,Z47_0000_dddd_addr, "and %rw3,%a1", 0},
+{0x4710,0x47ff, 1,2, 10,Z47_ssN0_dddd_addr, "and %rw3,%a1(%rw2)", 0},
+{0x4800,0x480f, 1,2, 9,Z48_0000_dddd_addr, "xorb %rb3,%a1", 0},
+{0x4810,0x48ff, 1,2, 10,Z48_ssN0_dddd_addr, "xorb %rb3,%a1(%rw2)", 0},
+{0x4900,0x490f, 1,2, 9,Z49_0000_dddd_addr, "xor %rw3,%a1", 0},
+{0x4910,0x49ff, 1,2, 10,Z49_ssN0_dddd_addr, "xor %rw3,%a1(%rw2)", 0},
+{0x4a00,0x4a0f, 1,2, 9,Z4A_0000_dddd_addr, "cpb %rb3,%a1", 0},
+{0x4a10,0x4aff, 1,2, 10,Z4A_ssN0_dddd_addr, "cpb %rb3,%a1(%rw2)", 0},
+{0x4b00,0x4b0f, 1,2, 9,Z4B_0000_dddd_addr, "cp %rw3,%a1", 0},
+{0x4b10,0x4bff, 1,2, 10,Z4B_ssN0_dddd_addr, "cp %rw3,%a1(%rw2)", 0},
+{0x4c00,0x4c00, 1,2, 15,Z4C_0000_0000_addr, "comb %a1", 0},
+{0x4c01,0x4c01, 1,3, 14,Z4C_0000_0001_addr_imm8, "cpb %a1,%#b3", 0},
+{0x4c02,0x4c02, 1,2, 15,Z4C_0000_0010_addr, "negb %a1", 0},
+{0x4c04,0x4c04, 1,2, 11,Z4C_0000_0100_addr, "testb %a1", 0},
+{0x4c05,0x4c05, 1,3, 14,Z4C_0000_0101_addr_imm8, "ldb %a1,%#b3", 0},
+{0x4c06,0x4c06, 1,2, 14,Z4C_0000_0110_addr, "tsetb %a1", 0},
+{0x4c08,0x4c08, 1,2, 11,Z4C_0000_1000_addr, "clrb %a1", 0},
+{0x4c10,0x4cf0,16,2, 16,Z4C_ddN0_0000_addr, "comb %a1(%rw2)", 0},
+{0x4c11,0x4cf1,16,3, 15,Z4C_ddN0_0001_addr_imm8, "cpb %a1(%rw2),%#b3", 0},
+{0x4c12,0x4cf2,16,2, 16,Z4C_ddN0_0010_addr, "negb %a1(%rw2)", 0},
+{0x4c14,0x4cf4,16,2, 12,Z4C_ddN0_0100_addr, "testb %a1(%rw2)", 0},
+{0x4c15,0x4cf5,16,3, 15,Z4C_ddN0_0101_addr_imm8, "ldb %a1(%rw2),%#b3", 0},
+{0x4c16,0x4cf6,16,2, 15,Z4C_ddN0_0110_addr, "tsetb %a1(%rw2)", 0},
+{0x4c18,0x4cf8,16,2, 12,Z4C_ddN0_1000_addr, "clrb %a1(%rw2)", 0},
+{0x4d00,0x4d00, 1,2, 15,Z4D_0000_0000_addr, "com %a1", 0},
+{0x4d01,0x4d01, 1,3, 14,Z4D_0000_0001_addr_imm16, "cp %a1,%#w2", 0},
+{0x4d02,0x4d02, 1,2, 15,Z4D_0000_0010_addr, "neg %a1", 0},
+{0x4d04,0x4d04, 1,2, 11,Z4D_0000_0100_addr, "test %a1", 0},
+{0x4d05,0x4d05, 1,3, 14,Z4D_0000_0101_addr_imm16, "ld %a1,%#w2", 0},
+{0x4d06,0x4d06, 1,2, 14,Z4D_0000_0110_addr, "tset %a1", 0},
+{0x4d08,0x4d08, 1,2, 11,Z4D_0000_1000_addr, "clr %a1", 0},
+{0x4d10,0x4df0,16,2, 16,Z4D_ddN0_0000_addr, "com %a1(%rw2)", 0},
+{0x4d11,0x4df1,16,3, 15,Z4D_ddN0_0001_addr_imm16, "cp %a1(%rw2),%#w2", 0},
+{0x4d12,0x4df2,16,2, 16,Z4D_ddN0_0010_addr, "neg %a1(%rw2)", 0},
+{0x4d14,0x4df4,16,2, 12,Z4D_ddN0_0100_addr, "test %a1(%rw2)", 0},
+{0x4d15,0x4df5,16,3, 15,Z4D_ddN0_0101_addr_imm16, "ld %a1(%rw2),%#w2", 0},
+{0x4d16,0x4df6,16,2, 15,Z4D_ddN0_0110_addr, "tset %a1(%rw2)", 0},
+{0x4d18,0x4df8,16,2, 12,Z4D_ddN0_1000_addr, "clr %a1(%rw2)", 0},
+{0x4e11,0x4ef0,16,2, 12,Z4E_ddN0_ssN0_addr, "ldb %a1(%rw2),%rb3", 0},
+{0x5000,0x500f, 1,2, 15,Z50_0000_dddd_addr, "cpl %rl3,%a1", 0},
+{0x5010,0x50ff, 1,2, 16,Z50_ssN0_dddd_addr, "cpl %rl3,%a1(%rw2)", 0},
+{0x5110,0x51f0,16,2, 21,Z51_ddN0_0000_addr, "pushl @%rw2,%a1", 0},
+{0x5111,0x51f1,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5112,0x51f2,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5113,0x51f3,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5114,0x51f4,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5115,0x51f5,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5116,0x51f6,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5117,0x51f7,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5118,0x51f8,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5119,0x51f9,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x511a,0x51fa,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x511b,0x51fb,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x511c,0x51fc,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x511d,0x51fd,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x511e,0x51fe,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x511f,0x51ff,16,2, 21,Z51_ddN0_ssN0_addr, "pushl @%rw2,%a1(%rw3)", 0},
+{0x5200,0x520f, 1,2, 15,Z52_0000_dddd_addr, "subl %rl3,%a1", 0},
+{0x5210,0x52ff, 1,2, 16,Z52_ssN0_dddd_addr, "subl %rl3,%a1(%rw2)", 0},
+{0x5310,0x53f0,16,2, 14,Z53_ddN0_0000_addr, "push @%rw2,%a1", 0},
+{0x5311,0x53f1,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5312,0x53f2,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5313,0x53f3,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5314,0x53f4,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5315,0x53f5,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5316,0x53f6,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5317,0x53f7,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5318,0x53f8,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5319,0x53f9,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x531a,0x53fa,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x531b,0x53fb,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x531c,0x53fc,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x531d,0x53fd,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x531e,0x53fe,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x531f,0x53ff,16,2, 14,Z53_ddN0_ssN0_addr, "push @%rw2,%a1(%rw3)", 0},
+{0x5400,0x540f, 1,2, 12,Z54_0000_dddd_addr, "ldl %rl3,%a1", 0},
+{0x5410,0x54ff, 1,2, 13,Z54_ssN0_dddd_addr, "ldl %rl3,%a1(%rw2)", 0},
+{0x5510,0x55f0,16,2, 23,Z55_ssN0_0000_addr, "popl %a1,@%rw2", 0},
+{0x5511,0x55f1,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5512,0x55f2,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5513,0x55f3,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5514,0x55f4,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5515,0x55f5,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5516,0x55f6,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5517,0x55f7,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5518,0x55f8,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5519,0x55f9,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x551a,0x55fa,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x551b,0x55fb,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x551c,0x55fc,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x551d,0x55fd,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x551e,0x55fe,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x551f,0x55ff,16,2, 23,Z55_ssN0_ddN0_addr, "popl %a1(%rw3),@%rw2", 0},
+{0x5600,0x560f, 1,2, 15,Z56_0000_dddd_addr, "addl %rl3,%a1", 0},
+{0x5610,0x56ff, 1,2, 16,Z56_ssN0_dddd_addr, "addl %rl3,%a1(%rw2)", 0},
+{0x5710,0x57f0,16,2, 16,Z57_ssN0_0000_addr, "pop %a1,@%rw2", 0},
+{0x5711,0x57f1,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5712,0x57f2,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5713,0x57f3,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5714,0x57f4,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5715,0x57f5,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5716,0x57f6,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5717,0x57f7,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5718,0x57f8,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5719,0x57f9,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x571a,0x57fa,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x571b,0x57fb,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x571c,0x57fc,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x571d,0x57fd,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x571e,0x57fe,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x571f,0x57ff,16,2, 16,Z57_ssN0_ddN0_addr, "pop %a1(%rw3),@%rw2", 0},
+{0x5800,0x580f, 1,2,283,Z58_0000_dddd_addr, "multl %rq3,%a1", 0},
+{0x5810,0x58ff, 1,2,284,Z58_ssN0_dddd_addr, "multl %rq3,%a1(%rw2)", 0},
+{0x5900,0x590f, 1,2, 71,Z59_0000_dddd_addr, "mult %rl3,%a1", 0},
+{0x5910,0x59ff, 1,2, 72,Z59_ssN0_dddd_addr, "mult %rl3,%a1(%rw2)", 0},
+{0x5a00,0x5a0f, 1,2,745,Z5A_0000_dddd_addr, "divl %rq3,%a1", 0},
+{0x5a10,0x5aff, 1,2,746,Z5A_ssN0_dddd_addr, "divl %rq3,%a1(%rw2)", 0},
+{0x5b00,0x5b0f, 1,2,108,Z5B_0000_dddd_addr, "div %rl3,%a1", 0},
+{0x5b10,0x5bff, 1,2,109,Z5B_ssN0_dddd_addr, "div %rl3,%a1(%rw2)", 0},
+{0x5c01,0x5c01, 1,3, 14,Z5C_0000_0001_0000_dddd_0000_nmin1_addr, "ldm %rw5,%a2,#%n", 0},
+{0x5c08,0x5c08, 1,2, 16,Z5C_0000_1000_addr, "testl %a1", 0},
+{0x5c09,0x5c09, 1,3, 14,Z5C_0000_1001_0000_ssss_0000_nmin1_addr, "ldm %a2,%rw5,#%n", 0},
+{0x5c11,0x5cf1,16,3, 15,Z5C_ssN0_0001_0000_dddd_0000_nmin1_addr, "ldm %rw5,%a2(%rw2),#%n", 0},
+{0x5c18,0x5cf8,16,2, 17,Z5C_ddN0_1000_addr, "testl %a1(%rw2)", 0},
+{0x5c19,0x5cf9,16,3, 15,Z5C_ddN0_1001_0000_ssN0_0000_nmin1_addr, "ldm %a2(%rw2),%rw5,#%n", 0},
+{0x5d00,0x5d0f, 1,2, 15,Z5D_0000_ssss_addr, "ldl %a1,%rl3", 0},
+{0x5d10,0x5dff, 1,2, 14,Z5D_ddN0_ssss_addr, "ldl %a1(%rw2),%rl3", 0},
+{0x5e00,0x5e0f, 1,2, 7,Z5E_0000_cccc_addr, "jp %c3,%a1", 0},
+{0x5e10,0x5eff, 1,2, 8,Z5E_ddN0_cccc_addr, "jp %c3,%a1(%rw2)", 0},
+{0x5f00,0x5f00, 1,2, 12,Z5F_0000_0000_addr, "call %a1", DASMFLAG_STEP_OVER},
+{0x5f10,0x5ff0,16,2, 13,Z5F_ddN0_0000_addr, "call %a1(%rw2)", DASMFLAG_STEP_OVER},
+{0x6000,0x600f, 1,2, 9,Z60_0000_dddd_addr, "ldb %rb3,%a1", 0},
+{0x6010,0x60ff, 1,2, 10,Z60_ssN0_dddd_addr, "ldb %rb3,%a1(%rw2)", 0},
+{0x6100,0x610f, 1,2, 9,Z61_0000_dddd_addr, "ld %rw3,%a1", 0},
+{0x6110,0x61ff, 1,2, 10,Z61_ssN0_dddd_addr, "ld %rw3,%a1(%rw2)", 0},
+{0x6200,0x620f, 1,2, 13,Z62_0000_imm4_addr, "resb %a1,%3", 0},
+{0x6210,0x62ff, 1,2, 14,Z62_ddN0_imm4_addr, "resb %a1(%rw2),%3", 0},
+{0x6300,0x630f, 1,2, 13,Z63_0000_imm4_addr, "res %a1,%3", 0},
+{0x6310,0x63ff, 1,2, 14,Z63_ddN0_imm4_addr, "res %a1(%rw2),%3", 0},
+{0x6400,0x640f, 1,2, 13,Z64_0000_imm4_addr, "setb %a1,%3", 0},
+{0x6410,0x64ff, 1,2, 14,Z64_ddN0_imm4_addr, "setb %a1(%rw2),%3", 0},
+{0x6500,0x650f, 1,2, 13,Z65_0000_imm4_addr, "set %a1,%3", 0},
+{0x6510,0x65ff, 1,2, 14,Z65_ddN0_imm4_addr, "set %a1(%rw2),%3", 0},
+{0x6600,0x660f, 1,2, 10,Z66_0000_imm4_addr, "bitb %a1,%3", 0},
+{0x6610,0x66ff, 1,2, 11,Z66_ddN0_imm4_addr, "bitb %a1(%rw2),%3", 0},
+{0x6700,0x670f, 1,2, 10,Z67_0000_imm4_addr, "bit %a1,%3", 0},
+{0x6710,0x67ff, 1,2, 11,Z67_ddN0_imm4_addr, "bit %a1(%rw2),%3", 0},
+{0x6800,0x680f, 1,2, 13,Z68_0000_imm4m1_addr, "incb %a1,%+3", 0},
+{0x6810,0x68ff, 1,2, 14,Z68_ddN0_imm4m1_addr, "incb %a1(%rw2),%+3", 0},
+{0x6900,0x690f, 1,2, 13,Z69_0000_imm4m1_addr, "inc %a1,%+3", 0},
+{0x6910,0x69ff, 1,2, 14,Z69_ddN0_imm4m1_addr, "inc %a1(%rw2),%+3", 0},
+{0x6a00,0x6a0f, 1,2, 13,Z6A_0000_imm4m1_addr, "decb %a1,%+3", 0},
+{0x6a10,0x6aff, 1,2, 14,Z6A_ddN0_imm4m1_addr, "decb %a1(%rw2),%+3", 0},
+{0x6b00,0x6b0f, 1,2, 13,Z6B_0000_imm4m1_addr, "dec %a1,%+3", 0},
+{0x6b10,0x6bff, 1,2, 14,Z6B_ddN0_imm4m1_addr, "dec %a1(%rw2),%+3", 0},
+{0x6c00,0x6c0f, 1,2, 15,Z6C_0000_dddd_addr, "exb %rb3,%a1", 0},
+{0x6c10,0x6cff, 1,2, 16,Z6C_ssN0_dddd_addr, "exb %rb3,%a1(%rw2)", 0},
+{0x6d00,0x6d0f, 1,2, 15,Z6D_0000_dddd_addr, "ex %rw3,%a1", 0},
+{0x6d10,0x6dff, 1,2, 16,Z6D_ssN0_dddd_addr, "ex %rw3,%a1(%rw2)", 0},
+{0x6e00,0x6e0f, 1,2, 11,Z6E_0000_ssss_addr, "ldb %a1,%rb3", 0},
+{0x6e10,0x6eff, 1,2, 11,Z6E_ddN0_ssss_addr, "ldb %a1(%rw2),%rb3", 0},
+{0x6f00,0x6f0f, 1,2, 11,Z6F_0000_ssss_addr, "ld %a1,%rw3", 0},
+{0x6f10,0x6fff, 1,2, 12,Z6F_ddN0_ssss_addr, "ld %a1(%rw2),%rw3", 0},
+{0x7010,0x70ff, 1,2, 14,Z70_ssN0_dddd_0000_xxxx_0000_0000, "ldb %rb3,%rw2(%rw5)", 0},
+{0x7110,0x71ff, 1,2, 14,Z71_ssN0_dddd_0000_xxxx_0000_0000, "ld %rw3,%rw2(%rw5)", 0},
+{0x7210,0x72ff, 1,2, 14,Z72_ddN0_ssss_0000_xxxx_0000_0000, "ldb %rw2(%rw5),%rb3", 0},
+{0x7310,0x73ff, 1,2, 14,Z73_ddN0_ssss_0000_xxxx_0000_0000, "ld %rw2(%rw5),%rw3", 0},
+{0x7410,0x74ff, 1,2, 15,Z74_ssN0_dddd_0000_xxxx_0000_0000, "lda p%rw3,%rw2(%rw5)", 0},
+{0x7510,0x75ff, 1,2, 17,Z75_ssN0_dddd_0000_xxxx_0000_0000, "ldl %rl3,%rw2(%rw5)", 0},
+{0x7600,0x760f, 1,2, 12,Z76_0000_dddd_addr, "lda p%rw3,%a1", 0},
+{0x7610,0x76ff, 1,2, 13,Z76_ssN0_dddd_addr, "lda p%rw3,%a1(%rw2)", 0},
+{0x7710,0x77ff, 1,2, 17,Z77_ddN0_ssss_0000_xxxx_0000_0000, "ldl %rw2(%rw5),%rl3", 0},
+{0x7800,0x78ff, 1,1, 10,Z78_imm8, "rsvd78", 0},
+{0x7900,0x7900, 1,2, 16,Z79_0000_0000_addr, "ldps %a1", 0},
+{0x7910,0x79f0,16,2, 17,Z79_ssN0_0000_addr, "ldps %a1(%rw2)", 0},
+{0x7a00,0x7a00, 1,1, 8,Z7A_0000_0000, "halt", DASMFLAG_STEP_OVER},
+{0x7b00,0x7b00, 1,1, 13,Z7B_0000_0000, "iret", DASMFLAG_STEP_OUT},
+{0x7b08,0x7b08, 1,1, 5,Z7B_0000_1000, "mset", 0},
+{0x7b09,0x7b09, 1,1, 5,Z7B_0000_1001, "mres", 0},
+{0x7b0a,0x7b0a, 1,1, 7,Z7B_0000_1010, "mbit", 0},
+{0x7b0d,0x7bfd,16,1, 12,Z7B_dddd_1101, "mreq %rw2", 0},
+{0x7c00,0x7c03, 1,1, 7,Z7C_0000_00ii, "di %i3", 0},
+{0x7c04,0x7c07, 1,1, 7,Z7C_0000_01ii, "ei %i3", 0},
+{0x7d00,0x7df0,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,ctrl0", 0},
+{0x7d01,0x7df1,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,ctrl1", 0},
+{0x7d02,0x7df2,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,fcw", 0},
+{0x7d03,0x7df3,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,refresh", 0},
+{0x7d04,0x7df4,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,psapseg", 0},
+{0x7d05,0x7df5,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,psapoff", 0},
+{0x7d06,0x7df6,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,nspseg", 0},
+{0x7d07,0x7df7,16,1, 7,Z7D_dddd_0ccc, "ldctl %rw2,nspoff", 0},
+{0x7d08,0x7df8,16,1, 7,Z7D_ssss_1ccc, "ldctl ctrl0,%rw2", 0},
+{0x7d09,0x7df9,16,1, 7,Z7D_ssss_1ccc, "ldctl ctrl1,%rw2", 0},
+{0x7d0a,0x7dfa,16,1, 7,Z7D_ssss_1ccc, "ldctl fcw,%rw2", 0},
+{0x7d0b,0x7dfb,16,1, 7,Z7D_ssss_1ccc, "ldctl refresh,%rw2", 0},
+{0x7d0c,0x7dfc,16,1, 7,Z7D_ssss_1ccc, "ldctl psapseg,%rw2", 0},
+{0x7d0d,0x7dfd,16,1, 7,Z7D_ssss_1ccc, "ldctl psapoff,%rw2", 0},
+{0x7d0e,0x7dfe,16,1, 7,Z7D_ssss_1ccc, "ldctl nspseg,%rw2", 0},
+{0x7d0f,0x7dff,16,1, 7,Z7D_ssss_1ccc, "ldctl nspoff,%rw2", 0},
+{0x7e00,0x7eff, 1,1, 10,Z7E_imm8, "rsvd7e %#b1", 0},
+{0x7f00,0x7fff, 1,1, 33,Z7F_imm8, "sc %#b1", 0},
+{0x8000,0x80ff, 1,1, 4,Z80_ssss_dddd, "addb %rb3,%rb2", 0},
+{0x8100,0x81ff, 1,1, 4,Z81_ssss_dddd, "add %rw3,%rw2", 0},
+{0x8200,0x82ff, 1,1, 4,Z82_ssss_dddd, "subb %rb3,%rb2", 0},
+{0x8300,0x83ff, 1,1, 4,Z83_ssss_dddd, "sub %rw3,%rw2", 0},
+{0x8400,0x84ff, 1,1, 4,Z84_ssss_dddd, "orb %rb3,%rb2", 0},
+{0x8500,0x85ff, 1,1, 4,Z85_ssss_dddd, "or %rw3,%rw2", 0},
+{0x8600,0x86ff, 1,1, 4,Z86_ssss_dddd, "andb %rb3,%rb2", 0},
+{0x8700,0x87ff, 1,1, 4,Z87_ssss_dddd, "and %rw3,%rw2", 0},
+{0x8800,0x88ff, 1,1, 4,Z88_ssss_dddd, "xorb %rb3,%rb2", 0},
+{0x8900,0x89ff, 1,1, 4,Z89_ssss_dddd, "xor %rw3,%rw2", 0},
+{0x8a00,0x8aff, 1,1, 4,Z8A_ssss_dddd, "cpb %rb3,%rb2", 0},
+{0x8b00,0x8bff, 1,1, 4,Z8B_ssss_dddd, "cp %rw3,%rw2", 0},
+{0x8c00,0x8cf0,16,1, 7,Z8C_dddd_0000, "comb %rb2", 0},
+{0x8c02,0x8cf2,16,1, 7,Z8C_dddd_0010, "negb %rb2", 0},
+{0x8c04,0x8cf4,16,1, 7,Z8C_dddd_0100, "testb %rb2", 0},
+{0x8c06,0x8cf6,16,1, 7,Z8C_dddd_0110, "tsetb %rb2", 0},
+{0x8c01,0x8cf1,16,1, 7,Z8C_dddd_0001, "ldctlb %rb2,flags", 0},
+{0x8c08,0x8cf8,16,1, 7,Z8C_dddd_1000, "clrb %rb2", 0},
+{0x8c09,0x8cf9,16,1, 7,Z8C_dddd_1001, "ldctlb flags,%rb2", 0},
+{0x8d00,0x8df0,16,1, 7,Z8D_dddd_0000, "com %rw2", 0},
+{0x8d01,0x8df1,16,1, 7,Z8D_imm4_0001, "setflg %f2", 0},
+{0x8d02,0x8df2,16,1, 7,Z8D_dddd_0010, "neg %rw2", 0},
+{0x8d03,0x8df3,16,1, 7,Z8D_imm4_0011, "resflg %f2", 0},
+{0x8d04,0x8df4,16,1, 7,Z8D_dddd_0100, "test %rw2", 0},
+{0x8d05,0x8df5,16,1, 7,Z8D_imm4_0101, "comflg %f2", 0},
+{0x8d06,0x8df6,16,1, 7,Z8D_dddd_0110, "tset %rw2", 0},
+{0x8d07,0x8d07, 1,1, 7,Z8D_0000_0111, "nop", 0},
+{0x8d08,0x8df8,16,1, 7,Z8D_dddd_1000, "clr %rw2", 0},
+{0x8e00,0x8eff, 1,1, 10,Z8E_imm8, "ext8e %#b1", 0},
+{0x8f00,0x8fff, 1,1, 10,Z8F_imm8, "ext8f %#b1", 0},
+{0x9000,0x90ff, 1,1, 8,Z90_ssss_dddd, "cpl %rl3,%rl2", 0},
+{0x9110,0x91ff, 1,1, 12,Z91_ddN0_ssss, "pushl @%rw2,%rl3", 0},
+{0x9200,0x92ff, 1,1, 8,Z92_ssss_dddd, "subl %rl3,%rl2", 0},
+{0x9310,0x93ff, 1,1, 9,Z93_ddN0_ssss, "push @%rw2,%rw3", 0},
+{0x9400,0x94ff, 1,1, 5,Z94_ssss_dddd, "ldl %rl3,%rl2", 0},
+{0x9510,0x95ff, 1,1, 12,Z95_ssN0_dddd, "popl %rl3,@%rw2", 0},
+{0x9600,0x96ff, 1,1, 8,Z96_ssss_dddd, "addl %rl3,%rl2", 0},
+{0x9710,0x97ff, 1,1, 8,Z97_ssN0_dddd, "pop %rw3,@%rw2", 0},
+{0x9800,0x98ff, 1,1,282,Z98_ssss_dddd, "multl %rq3,%rl2", 0},
+{0x9900,0x99ff, 1,1, 70,Z99_ssss_dddd, "mult %rl3,%rw2", 0},
+{0x9a00,0x9aff, 1,1,744,Z9A_ssss_dddd, "divl %rq3,%rl2", 0},
+{0x9b00,0x9bff, 1,1,107,Z9B_ssss_dddd, "div %rl3,%rw2", 0},
+{0x9c08,0x9cf8,16,1, 13,Z9C_dddd_1000, "testl %rl2", 0},
+{0x9d00,0x9dff, 1,1, 10,Z9D_imm8, "rsvd9d", 0},
+{0x9e00,0x9e0f, 1,1, 10,Z9E_0000_cccc, "ret %c3", DASMFLAG_STEP_OUT},
+{0x9f00,0x9fff, 1,1, 10,Z9F_imm8, "rsvd9f", 0},
+{0xa000,0xa0ff, 1,1, 3,ZA0_ssss_dddd, "ldb %rb3,%rb2", 0},
+{0xa100,0xa1ff, 1,1, 3,ZA1_ssss_dddd, "ld %rw3,%rw2", 0},
+{0xa200,0xa2ff, 1,1, 4,ZA2_dddd_imm4, "resb %rb2,%3", 0},
+{0xa300,0xa3ff, 1,1, 4,ZA3_dddd_imm4, "res %rw2,%3", 0},
+{0xa400,0xa4ff, 1,1, 4,ZA4_dddd_imm4, "setb %rb2,%3", 0},
+{0xa500,0xa5ff, 1,1, 4,ZA5_dddd_imm4, "set %rw2,%3", 0},
+{0xa600,0xa6ff, 1,1, 4,ZA6_dddd_imm4, "bitb %rb2,%3", 0},
+{0xa700,0xa7ff, 1,1, 4,ZA7_dddd_imm4, "bit %rw2,%3", 0},
+{0xa800,0xa8ff, 1,1, 4,ZA8_dddd_imm4m1, "incb %rb2,%+3", 0},
+{0xa900,0xa9ff, 1,1, 4,ZA9_dddd_imm4m1, "inc %rw2,%+3", 0},
+{0xaa00,0xaaff, 1,1, 4,ZAA_dddd_imm4m1, "decb %rb2,%+3", 0},
+{0xab00,0xabff, 1,1, 4,ZAB_dddd_imm4m1, "dec %rw2,%+3", 0},
+{0xac00,0xacff, 1,1, 6,ZAC_ssss_dddd, "exb %rb3,%rb2", 0},
+{0xad00,0xadff, 1,1, 6,ZAD_ssss_dddd, "ex %rw3,%rw2", 0},
+{0xae00,0xaeff, 1,1, 5,ZAE_dddd_cccc, "tccb %c3,%rb2", 0},
+{0xaf00,0xafff, 1,1, 5,ZAF_dddd_cccc, "tcc %c3,%rw2", 0},
+{0xb000,0xb0f0,16,1, 5,ZB0_dddd_0000, "dab %rb2", 0},
+{0xb100,0xb1f0,16,1, 11,ZB1_dddd_0000, "extsb %rw2", 0},
+{0xb107,0xb1f7,16,1, 11,ZB1_dddd_0111, "extsl %rq2", 0},
+{0xb10a,0xb1fa,16,1, 11,ZB1_dddd_1010, "exts %rl2", 0},
+{0xb200,0xb2f0,16,1, 6,ZB2_dddd_00I0, "rlb %rb2,%?3", 0},
+{0xb201,0xb2f1,16,2, 13,ZB2_dddd_0001_imm8, "s%*lb %rb2,%$3", 0},
+{0xb202,0xb2f2,16,1, 6,ZB2_dddd_00I0, "rlb %rb2,%?3", 0},
+{0xb203,0xb2f3,16,2, 15,ZB2_dddd_0011_0000_ssss_0000_0000, "sdlb %rb2,%rw5", 0},
+{0xb204,0xb2f4,16,1, 6,ZB2_dddd_01I0, "rrb %rb2,%?3", 0},
+{0xb206,0xb2f6,16,1, 6,ZB2_dddd_01I0, "rrb %rb2,%?3", 0},
+{0xb208,0xb2f8,16,1, 9,ZB2_dddd_10I0, "rlcb %rb2,%?3", 0},
+{0xb209,0xb2f9,16,2, 13,ZB2_dddd_1001_imm8, "s%*ab %rb2,%$3", 0},
+{0xb20a,0xb2fa,16,1, 9,ZB2_dddd_10I0, "rlcb %rb2,%?3", 0},
+{0xb20b,0xb2fb,16,2, 15,ZB2_dddd_1011_0000_ssss_0000_0000, "sdab %rb2,%rw5", 0},
+{0xb20c,0xb2fc,16,1, 9,ZB2_dddd_11I0, "rrcb %rb2,%?3", 0},
+{0xb20e,0xb2fe,16,1, 9,ZB2_dddd_11I0, "rrcb %rb2,%?3", 0},
+{0xb300,0xb3f0,16,1, 6,ZB3_dddd_00I0, "rl %rw2,%?3", 0},
+{0xb301,0xb3f1,16,2, 13,ZB3_dddd_0001_imm8, "s%*l %rw2,%$3", 0},
+{0xb302,0xb3f2,16,1, 6,ZB3_dddd_00I0, "rl %rw2,%?3", 0},
+{0xb303,0xb3f3,16,2, 15,ZB3_dddd_0011_0000_ssss_0000_0000, "sdl %rw2,%rw5", 0},
+{0xb304,0xb3f4,16,1, 6,ZB3_dddd_01I0, "rr %rw2,%?3", 0},
+{0xb305,0xb3f5,16,2, 13,ZB3_dddd_0101_imm8, "s%*ll %rl2,%$3", 0},
+{0xb306,0xb3f6,16,1, 6,ZB3_dddd_01I0, "rr %rw2,%?3", 0},
+{0xb307,0xb3f7,16,2, 15,ZB3_dddd_0111_0000_ssss_0000_0000, "sdll %rl2,%rw5", 0},
+{0xb308,0xb3f8,16,1, 6,ZB3_dddd_10I0, "rlc %rw2,%?3", 0},
+{0xb309,0xb3f9,16,2, 13,ZB3_dddd_1001_imm8, "s%*a %rw2,%$3", 0},
+{0xb30a,0xb3fa,16,1, 6,ZB3_dddd_10I0, "rlc %rw2,%?3", 0},
+{0xb30b,0xb3fb,16,2, 15,ZB3_dddd_1011_0000_ssss_0000_0000, "sda %rw2,%rw5", 0},
+{0xb30c,0xb3fc,16,1, 6,ZB3_dddd_11I0, "rrc %rw2,%?3", 0},
+{0xb30d,0xb3fd,16,2, 13,ZB3_dddd_1101_imm8, "s%*al %rl2,%$3", 0},
+{0xb30e,0xb3fe,16,1, 6,ZB3_dddd_11I0, "rrc %rw2,%?3", 0},
+{0xb30f,0xb3ff,16,2, 15,ZB3_dddd_1111_0000_ssss_0000_0000, "sdal %rl2,%rw5", 0},
+{0xb400,0xb4ff, 1,1, 5,ZB4_ssss_dddd, "adcb %rb3,%rb2", 0},
+{0xb500,0xb5ff, 1,1, 5,ZB5_ssss_dddd, "adc %rw3,%rw2", 0},
+{0xb600,0xb6ff, 1,1, 5,ZB6_ssss_dddd, "sbcb %rb3,%rb2", 0},
+{0xb700,0xb7ff, 1,1, 5,ZB7_ssss_dddd, "sbc %rw3,%rw2", 0},
+{0xb810,0xb8f0,16,2, 25,ZB8_ddN0_0000_0000_rrrr_ssN0_0000, "trib @%rw2,@%rw6,%rb5", 0},
+{0xb812,0xb8f2,16,2, 25,ZB8_ddN0_0010_0000_rrrr_ssN0_0000, "trtib @%rw2,@%rw6,%rb5", 0},
+{0xb814,0xb8f4,16,2, 25,ZB8_ddN0_0100_0000_rrrr_ssN0_0000, "trirb @%rw2,@%rw6,%rb5", 0},
+{0xb816,0xb8f6,16,2, 25,ZB8_ddN0_0110_0000_rrrr_ssN0_1110, "trtirb @%rw2,@%rw6,%rb5", 0},
+{0xb818,0xb8f8,16,2, 25,ZB8_ddN0_1000_0000_rrrr_ssN0_0000, "trdb @%rw2,@%rw6,%rb5", 0},
+{0xb81a,0xb8fa,16,2, 25,ZB8_ddN0_1010_0000_rrrr_ssN0_0000, "trtrb @%rw2,@%rw6,%rb5", 0},
+{0xb81c,0xb8fc,16,2, 25,ZB8_ddN0_1100_0000_rrrr_ssN0_0000, "trdrb @%rw2,@%rw6,%rb5", 0},
+{0xb81e,0xb8fe,16,2, 25,ZB8_ddN0_1110_0000_rrrr_ssN0_1110, "trtdrb @%rw2,@%rw6,%rb5", 0},
+{0xb900,0xb9ff,16,1, 10,ZB9_imm8, "rsvdb9", 0},
+{0xba10,0xbaf0,16,2, 11,ZBA_ssN0_0000_0000_rrrr_dddd_cccc, "cpib %rb6,@%rw2,%rw5,%c7", 0},
+{0xba11,0xbaf1,16,2, 11,ZBA_ssN0_0001_0000_rrrr_ddN0_x000, "ldirb @%rw6,@%rw2,%rw5", DASMFLAG_STEP_OVER},
+{0xba12,0xbaf2,16,2, 11,ZBA_ssN0_0010_0000_rrrr_ddN0_cccc, "cpsib @%rw6,@%rw2,%rw5,%c7", 0},
+{0xba14,0xbaf4,16,2, 11,ZBA_ssN0_0100_0000_rrrr_dddd_cccc, "cpirb %rb6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xba16,0xbaf6,16,2, 11,ZBA_ssN0_0110_0000_rrrr_ddN0_cccc, "cpsirb @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xba18,0xbaf8,16,2, 11,ZBA_ssN0_1000_0000_rrrr_dddd_cccc, "cpdb %rb6,@%rw2,%rw5,%c7", 0},
+{0xba19,0xbaf9,16,2, 11,ZBA_ssN0_1001_0000_rrrr_ddN0_x000, "lddrb @%rw2,@%rw6,%rw5", DASMFLAG_STEP_OVER},
+{0xba1a,0xbafa,16,2, 11,ZBA_ssN0_1010_0000_rrrr_ddN0_cccc, "cpsdb @%rw6,@%rw2,%rw5,%c7", 0},
+{0xba1c,0xbafc,16,2, 11,ZBA_ssN0_1100_0000_rrrr_dddd_cccc, "cpdrb %rb6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xba1e,0xbafe,16,2, 11,ZBA_ssN0_1110_0000_rrrr_ddN0_cccc, "cpsdrb @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xbb10,0xbbf0,16,2, 11,ZBB_ssN0_0000_0000_rrrr_dddd_cccc, "cpi %rw6,@%rw2,%rw5,%c7", 0},
+{0xbb11,0xbbf1,16,2, 11,ZBB_ssN0_0001_0000_rrrr_ddN0_x000, "ldir @%rw6,@%rw2,%rw5", DASMFLAG_STEP_OVER},
+{0xbb12,0xbbf2,16,2, 11,ZBB_ssN0_0010_0000_rrrr_ddN0_cccc, "cpsi @%rw6,@%rw2,%rw5,%c7", 0},
+{0xbb14,0xbbf4,16,2, 11,ZBB_ssN0_0100_0000_rrrr_dddd_cccc, "cpir %rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xbb16,0xbbf6,16,2, 11,ZBB_ssN0_0110_0000_rrrr_ddN0_cccc, "cpsir @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xbb18,0xbbf8,16,2, 11,ZBB_ssN0_1000_0000_rrrr_dddd_cccc, "cpd %rw6,@%rw2,%rw5,%c7", 0},
+{0xbb19,0xbbf9,16,2, 11,ZBB_ssN0_1001_0000_rrrr_ddN0_x000, "lddr @%rw2,@%rw6,%rw5", DASMFLAG_STEP_OVER},
+{0xbb1a,0xbbfa,16,2, 11,ZBB_ssN0_1010_0000_rrrr_ddN0_cccc, "cpsd @%rw6,@%rw2,%rw5,%c7", 0},
+{0xbb1c,0xbbfc,16,2, 11,ZBB_ssN0_1100_0000_rrrr_dddd_cccc, "cpdr %rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xbb1e,0xbbfe,16,2, 11,ZBB_ssN0_1110_0000_rrrr_ddN0_cccc, "cpsdr @%rw6,@%rw2,%rw5,%c7", DASMFLAG_STEP_OVER},
+{0xbc00,0xbcff, 1,1, 9,ZBC_aaaa_bbbb, "rrdb %rb3,%rb2", 0},
+{0xbd00,0xbdff, 1,1, 5,ZBD_dddd_imm4, "ldk %rw2,%3", 0},
+{0xbe00,0xbeff, 1,1, 9,ZBE_aaaa_bbbb, "rldb %rb3,%rb2", 0},
+{0xbf00,0xbfff, 1,1, 10,ZBF_imm8, "rsvdbf", 0},
+{0xc000,0xcfff, 1,1, 5,ZC_dddd_imm8, "ldb %rb1,%#b1", 0},
+{0xd000,0xdfff, 1,1, 10,ZD_dsp12, "calr %d2", DASMFLAG_STEP_OVER},
+{0xe000,0xefff, 1,1, 6,ZE_cccc_dsp8, "jr %c1,%d1", 0},
+{0xf000,0xf07f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf100,0xf17f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf200,0xf27f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf300,0xf37f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf400,0xf47f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf500,0xf57f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf600,0xf67f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf700,0xf77f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf800,0xf87f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf900,0xf97f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xfa00,0xfa7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xfb00,0xfb7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xfc00,0xfc7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xfd00,0xfd7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xfe00,0xfe7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xff00,0xff7f, 1,1, 11,ZF_dddd_0dsp7, "dbjnz %rb1,%d0", DASMFLAG_STEP_OVER},
+{0xf080,0xf0ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf180,0xf1ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf280,0xf2ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf380,0xf3ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf480,0xf4ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf580,0xf5ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf680,0xf6ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf780,0xf7ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf880,0xf8ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xf980,0xf9ff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xfa80,0xfaff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xfb80,0xfbff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xfc80,0xfcff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xfd80,0xfdff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xfe80,0xfeff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0xff80,0xffff, 1,1, 11,ZF_dddd_1dsp7, "djnz %rw1,%d0", DASMFLAG_STEP_OVER},
+{0, 0, 0,0, 0,NULL, NULL, 0}
};
@@ -552,22 +552,22 @@ void z8000_init_tables(void)
z8000_exec = global_alloc_array(Z8000_exec, 0x10000);
/* set up the zero, sign, parity lookup table */
- for (i = 0; i < 256; i++)
+ for (i = 0; i < 256; i++)
z8000_zsp[i] = ((i == 0) ? F_Z : 0) |
- ((i & 128) ? F_S : 0) |
- ((((i>>7)^(i>>6)^(i>>5)^(i>>4)^(i>>3)^(i>>2)^(i>>1)^i) & 1) ? F_PV : 0);
+ ((i & 128) ? F_S : 0) |
+ ((((i>>7)^(i>>6)^(i>>5)^(i>>4)^(i>>3)^(i>>2)^(i>>1)^i) & 1) ? F_PV : 0);
- /* first set all 64K opcodes to invalid */
+ /* first set all 64K opcodes to invalid */
for (i = 0; i < 0x10000; i++)
{
z8000_exec[i].opcode = zinvalid;
z8000_exec[i].cycles = 4;
- z8000_exec[i].size = 1;
- z8000_exec[i].dasm = ".word %#w0";
+ z8000_exec[i].size = 1;
+ z8000_exec[i].dasm = ".word %#w0";
z8000_exec[i].dasmflags = 0;
}
- /* now decompose the initialization table */
+ /* now decompose the initialization table */
for (init = table; init->size; init++)
{
for (i = init->beg; i <= init->end; i += init->step)
@@ -577,8 +577,8 @@ void z8000_init_tables(void)
z8000_exec[i].opcode = init->opcode;
z8000_exec[i].cycles = init->cycles;
- z8000_exec[i].size = init->size;
- z8000_exec[i].dasm = init->dasm;
+ z8000_exec[i].size = init->size;
+ z8000_exec[i].dasm = init->dasm;
z8000_exec[i].dasmflags = init->dasmflags;
}
}
@@ -589,4 +589,3 @@ void z8000_deinit_tables(void)
global_free( z8000_exec );
z8000_exec = 0;
}
-
diff --git a/src/emu/crsshair.c b/src/emu/crsshair.c
index b5520133e06..c693468f2f8 100644
--- a/src/emu/crsshair.c
+++ b/src/emu/crsshair.c
@@ -22,8 +22,8 @@
CONSTANTS
***************************************************************************/
-#define CROSSHAIR_RAW_SIZE 100
-#define CROSSHAIR_RAW_ROWBYTES ((CROSSHAIR_RAW_SIZE + 7) / 8)
+#define CROSSHAIR_RAW_SIZE 100
+#define CROSSHAIR_RAW_ROWBYTES ((CROSSHAIR_RAW_SIZE + 7) / 8)
/***************************************************************************
@@ -32,22 +32,22 @@
struct crosshair_global
{
- UINT8 usage; /* true if any crosshairs are used */
- UINT8 used[MAX_PLAYERS]; /* usage per player */
- UINT8 mode[MAX_PLAYERS]; /* visibility mode per player */
- UINT8 visible[MAX_PLAYERS]; /* visibility per player */
- bitmap_argb32 * bitmap[MAX_PLAYERS]; /* bitmap per player */
- render_texture * texture[MAX_PLAYERS]; /* texture per player */
- device_t *screen[MAX_PLAYERS]; /* the screen on which this player's crosshair is drawn */
- float x[MAX_PLAYERS]; /* current X position */
- float y[MAX_PLAYERS]; /* current Y position */
- float last_x[MAX_PLAYERS]; /* last X position */
- float last_y[MAX_PLAYERS]; /* last Y position */
- UINT8 fade; /* color fading factor */
- UINT8 animation_counter; /* animation frame index */
- UINT16 auto_time; /* time in seconds to turn invisible */
- UINT16 time[MAX_PLAYERS]; /* time since last movement */
- char name[MAX_PLAYERS][CROSSHAIR_PIC_NAME_LENGTH + 1]; /* name of crosshair png file */
+ UINT8 usage; /* true if any crosshairs are used */
+ UINT8 used[MAX_PLAYERS]; /* usage per player */
+ UINT8 mode[MAX_PLAYERS]; /* visibility mode per player */
+ UINT8 visible[MAX_PLAYERS]; /* visibility per player */
+ bitmap_argb32 * bitmap[MAX_PLAYERS]; /* bitmap per player */
+ render_texture * texture[MAX_PLAYERS]; /* texture per player */
+ device_t *screen[MAX_PLAYERS]; /* the screen on which this player's crosshair is drawn */
+ float x[MAX_PLAYERS]; /* current X position */
+ float y[MAX_PLAYERS]; /* current Y position */
+ float last_x[MAX_PLAYERS]; /* last X position */
+ float last_y[MAX_PLAYERS]; /* last Y position */
+ UINT8 fade; /* color fading factor */
+ UINT8 animation_counter; /* animation frame index */
+ UINT16 auto_time; /* time in seconds to turn invisible */
+ UINT16 time[MAX_PLAYERS]; /* time since last movement */
+ char name[MAX_PLAYERS][CROSSHAIR_PIC_NAME_LENGTH + 1]; /* name of crosshair png file */
};
diff --git a/src/emu/crsshair.h b/src/emu/crsshair.h
index 5f777accb05..af316f55c5d 100644
--- a/src/emu/crsshair.h
+++ b/src/emu/crsshair.h
@@ -19,22 +19,22 @@
CONSTANTS
***************************************************************************/
-#define CROSSHAIR_SCREEN_NONE ((device_t *) 0)
-#define CROSSHAIR_SCREEN_ALL ((device_t *) ~0)
+#define CROSSHAIR_SCREEN_NONE ((device_t *) 0)
+#define CROSSHAIR_SCREEN_ALL ((device_t *) ~0)
/* user settings for visibility mode */
-#define CROSSHAIR_VISIBILITY_OFF 0
-#define CROSSHAIR_VISIBILITY_ON 1
-#define CROSSHAIR_VISIBILITY_AUTO 2
-#define CROSSHAIR_VISIBILITY_DEFAULT CROSSHAIR_VISIBILITY_AUTO
+#define CROSSHAIR_VISIBILITY_OFF 0
+#define CROSSHAIR_VISIBILITY_ON 1
+#define CROSSHAIR_VISIBILITY_AUTO 2
+#define CROSSHAIR_VISIBILITY_DEFAULT CROSSHAIR_VISIBILITY_AUTO
/* range allowed for auto visibility */
-#define CROSSHAIR_VISIBILITY_AUTOTIME_MIN 0
-#define CROSSHAIR_VISIBILITY_AUTOTIME_MAX 50
-#define CROSSHAIR_VISIBILITY_AUTOTIME_DEFAULT 15
+#define CROSSHAIR_VISIBILITY_AUTOTIME_MIN 0
+#define CROSSHAIR_VISIBILITY_AUTOTIME_MAX 50
+#define CROSSHAIR_VISIBILITY_AUTOTIME_DEFAULT 15
/* maximum crosshair pic filename size */
-#define CROSSHAIR_PIC_NAME_LENGTH 12
+#define CROSSHAIR_PIC_NAME_LENGTH 12
@@ -45,10 +45,10 @@
/* user-controllable settings for a player */
struct crosshair_user_settings
{
- UINT8 used; /* is used */
- UINT8 mode; /* visibility mode */
- UINT8 auto_time; /* time in seconds to blank crosshair if no movement */
- char name[CROSSHAIR_PIC_NAME_LENGTH + 1]; /* bitmap name */
+ UINT8 used; /* is used */
+ UINT8 mode; /* visibility mode */
+ UINT8 auto_time; /* time in seconds to blank crosshair if no movement */
+ char name[CROSSHAIR_PIC_NAME_LENGTH + 1]; /* bitmap name */
};
@@ -76,4 +76,4 @@ void crosshair_get_user_settings(running_machine &machine, UINT8 player, crossha
void crosshair_set_user_settings(running_machine &machine, UINT8 player, crosshair_user_settings *settings);
-#endif /* __CRSSHAIR_H__ */
+#endif /* __CRSSHAIR_H__ */
diff --git a/src/emu/debug/debugcmd.c b/src/emu/debug/debugcmd.c
index 3df869a3a69..ad9ff5f7e47 100644
--- a/src/emu/debug/debugcmd.c
+++ b/src/emu/debug/debugcmd.c
@@ -26,7 +26,7 @@
CONSTANTS
***************************************************************************/
-#define MAX_GLOBALS 1000
+#define MAX_GLOBALS 1000
@@ -36,39 +36,39 @@
struct global_entry
{
- void * base;
- UINT32 size;
+ void * base;
+ UINT32 size;
};
struct cheat_map
{
- UINT64 offset;
- UINT64 first_value;
- UINT64 previous_value;
- UINT8 state:1;
- UINT8 undo:7;
+ UINT64 offset;
+ UINT64 first_value;
+ UINT64 previous_value;
+ UINT8 state:1;
+ UINT8 undo:7;
};
struct cheat_system
{
- char cpu;
- UINT64 length;
- UINT8 width;
- cheat_map * cheatmap;
- UINT8 undo;
- UINT8 signed_cheat;
- UINT8 swapped_cheat;
+ char cpu;
+ UINT64 length;
+ UINT8 width;
+ cheat_map * cheatmap;
+ UINT8 undo;
+ UINT8 signed_cheat;
+ UINT8 swapped_cheat;
};
struct cheat_region_map
{
- UINT64 offset;
- UINT64 endoffset;
+ UINT64 offset;
+ UINT64 endoffset;
const char *share;
- UINT8 disabled;
+ UINT8 disabled;
};
@@ -176,9 +176,9 @@ INLINE UINT64 cheat_sign_extend(const cheat_system *cheatsys, UINT64 value)
{
switch (cheatsys->width)
{
- case 1: value = (INT8)value; break;
- case 2: value = (INT16)value; break;
- case 4: value = (INT32)value; break;
+ case 1: value = (INT8)value; break;
+ case 2: value = (INT16)value; break;
+ case 4: value = (INT32)value; break;
}
}
return value;
@@ -193,10 +193,10 @@ INLINE UINT64 cheat_byte_swap(const cheat_system *cheatsys, UINT64 value)
{
switch (cheatsys->width)
{
- case 2: value = ((value >> 8) & 0x00ff) | ((value << 8) & 0xff00); break;
- case 4: value = ((value >> 24) & 0x000000ff) | ((value >> 8) & 0x0000ff00) | ((value << 8) & 0x00ff0000) | ((value << 24) & 0xff000000); break;
- case 8: value = ((value >> 56) & U64(0x00000000000000ff)) | ((value >> 40) & U64(0x000000000000ff00)) | ((value >> 24) & U64(0x0000000000ff0000)) | ((value >> 8) & U64(0x00000000ff000000)) |
- ((value << 8) & U64(0x000000ff00000000)) | ((value << 24) & U64(0x0000ff0000000000)) | ((value << 40) & U64(0x00ff000000000000)) | ((value << 56) & U64(0xff00000000000000)); break;
+ case 2: value = ((value >> 8) & 0x00ff) | ((value << 8) & 0xff00); break;
+ case 4: value = ((value >> 24) & 0x000000ff) | ((value >> 8) & 0x0000ff00) | ((value << 8) & 0x00ff0000) | ((value << 24) & 0xff000000); break;
+ case 8: value = ((value >> 56) & U64(0x00000000000000ff)) | ((value >> 40) & U64(0x000000000000ff00)) | ((value >> 24) & U64(0x0000000000ff0000)) | ((value >> 8) & U64(0x00000000ff000000)) |
+ ((value << 8) & U64(0x000000ff00000000)) | ((value << 24) & U64(0x0000ff0000000000)) | ((value << 40) & U64(0x00ff000000000000)) | ((value << 56) & U64(0xff00000000000000)); break;
}
}
return value;
@@ -284,10 +284,10 @@ void debug_command_init(running_machine &machine)
debug_console_register_command(machine, "ignore", CMDFLAG_NONE, 0, 0, MAX_COMMAND_PARAMS, execute_ignore);
debug_console_register_command(machine, "observe", CMDFLAG_NONE, 0, 0, MAX_COMMAND_PARAMS, execute_observe);
- debug_console_register_command(machine, "comadd", CMDFLAG_NONE, 0, 1, 2, execute_comment);
+ debug_console_register_command(machine, "comadd", CMDFLAG_NONE, 0, 1, 2, execute_comment);
debug_console_register_command(machine, "//", CMDFLAG_NONE, 0, 1, 2, execute_comment);
- debug_console_register_command(machine, "comdelete", CMDFLAG_NONE, 0, 1, 1, execute_comment_del);
- debug_console_register_command(machine, "comsave", CMDFLAG_NONE, 0, 0, 0, execute_comment_save);
+ debug_console_register_command(machine, "comdelete", CMDFLAG_NONE, 0, 1, 1, execute_comment_del);
+ debug_console_register_command(machine, "comsave", CMDFLAG_NONE, 0, 0, 0, execute_comment_save);
debug_console_register_command(machine, "bpset", CMDFLAG_NONE, 0, 1, 3, execute_bpset);
debug_console_register_command(machine, "bp", CMDFLAG_NONE, 0, 1, 3, execute_bpset);
@@ -357,19 +357,19 @@ void debug_command_init(running_machine &machine)
debug_console_register_command(machine, "source", CMDFLAG_NONE, 0, 1, 1, execute_source);
- debug_console_register_command(machine, "map", CMDFLAG_NONE, AS_PROGRAM, 1, 1, execute_map);
- debug_console_register_command(machine, "mapd", CMDFLAG_NONE, AS_DATA, 1, 1, execute_map);
- debug_console_register_command(machine, "mapi", CMDFLAG_NONE, AS_IO, 1, 1, execute_map);
- debug_console_register_command(machine, "memdump", CMDFLAG_NONE, 0, 0, 1, execute_memdump);
+ debug_console_register_command(machine, "map", CMDFLAG_NONE, AS_PROGRAM, 1, 1, execute_map);
+ debug_console_register_command(machine, "mapd", CMDFLAG_NONE, AS_DATA, 1, 1, execute_map);
+ debug_console_register_command(machine, "mapi", CMDFLAG_NONE, AS_IO, 1, 1, execute_map);
+ debug_console_register_command(machine, "memdump", CMDFLAG_NONE, 0, 0, 1, execute_memdump);
- debug_console_register_command(machine, "symlist", CMDFLAG_NONE, 0, 0, 1, execute_symlist);
+ debug_console_register_command(machine, "symlist", CMDFLAG_NONE, 0, 0, 1, execute_symlist);
- debug_console_register_command(machine, "softreset", CMDFLAG_NONE, 0, 0, 1, execute_softreset);
- debug_console_register_command(machine, "hardreset", CMDFLAG_NONE, 0, 0, 1, execute_hardreset);
+ debug_console_register_command(machine, "softreset", CMDFLAG_NONE, 0, 0, 1, execute_softreset);
+ debug_console_register_command(machine, "hardreset", CMDFLAG_NONE, 0, 0, 1, execute_hardreset);
- debug_console_register_command(machine, "images", CMDFLAG_NONE, 0, 0, 0, execute_images);
- debug_console_register_command(machine, "mount", CMDFLAG_NONE, 0, 2, 2, execute_mount);
- debug_console_register_command(machine, "unmount", CMDFLAG_NONE, 0, 1, 1, execute_unmount);
+ debug_console_register_command(machine, "images", CMDFLAG_NONE, 0, 0, 0, execute_images);
+ debug_console_register_command(machine, "mount", CMDFLAG_NONE, 0, 2, 2, execute_mount);
+ debug_console_register_command(machine, "unmount", CMDFLAG_NONE, 0, 1, 1, execute_unmount);
machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(debug_command_exit), &machine));
@@ -440,10 +440,10 @@ static UINT64 global_get(symbol_table &table, void *ref)
global_entry *global = (global_entry *)ref;
switch (global->size)
{
- case 1: return *(UINT8 *)global->base;
- case 2: return *(UINT16 *)global->base;
- case 4: return *(UINT32 *)global->base;
- case 8: return *(UINT64 *)global->base;
+ case 1: return *(UINT8 *)global->base;
+ case 2: return *(UINT16 *)global->base;
+ case 4: return *(UINT32 *)global->base;
+ case 8: return *(UINT64 *)global->base;
}
return ~0;
}
@@ -458,10 +458,10 @@ static void global_set(symbol_table &table, void *ref, UINT64 value)
global_entry *global = (global_entry *)ref;
switch (global->size)
{
- case 1: *(UINT8 *)global->base = value; break;
- case 2: *(UINT16 *)global->base = value; break;
- case 4: *(UINT32 *)global->base = value; break;
- case 8: *(UINT64 *)global->base = value; break;
+ case 1: *(UINT8 *)global->base = value; break;
+ case 2: *(UINT16 *)global->base = value; break;
+ case 4: *(UINT32 *)global->base = value; break;
+ case 8: *(UINT64 *)global->base = value; break;
}
}
@@ -691,9 +691,9 @@ static int mini_printf(running_machine &machine, char *buffer, const char *forma
if (!c) break;
switch (c)
{
- case '\\': *p++ = c; break;
- case 'n': *p++ = '\n'; break;
- default: break;
+ case '\\': *p++ = c; break;
+ case 'n': *p++ = '\n'; break;
+ default: break;
}
continue;
}
@@ -2078,18 +2078,18 @@ static void execute_cheatlist(running_machine &machine, int ref, int params, con
switch (space->spacenum())
{
default:
- case AS_PROGRAM: spaceletter = 'p'; break;
- case AS_DATA: spaceletter = 'd'; break;
- case AS_IO: spaceletter = 'i'; break;
+ case AS_PROGRAM: spaceletter = 'p'; break;
+ case AS_DATA: spaceletter = 'd'; break;
+ case AS_IO: spaceletter = 'i'; break;
}
switch (cheat.width)
{
default:
- case 1: sizeletter = 'b'; sizemask = 0xff; break;
- case 2: sizeletter = 'w'; sizemask = 0xffff; break;
- case 4: sizeletter = 'd'; sizemask = 0xffffffff; break;
- case 8: sizeletter = 'q'; sizemask = U64(0xffffffffffffffff); break;
+ case 1: sizeletter = 'b'; sizemask = 0xff; break;
+ case 2: sizeletter = 'w'; sizemask = 0xffff; break;
+ case 4: sizeletter = 'd'; sizemask = 0xffffffff; break;
+ case 8: sizeletter = 'q'; sizemask = U64(0xffffffffffffffff); break;
}
/* write the cheat list */
@@ -2223,11 +2223,11 @@ static void execute_find(running_machine &machine, int ref, int params, const ch
{
switch (data_size[j])
{
- case 1: match = ((UINT8)debug_read_byte(*space, i + suboffset, TRUE) == (UINT8)data_to_find[j]); break;
- case 2: match = ((UINT16)debug_read_word(*space, i + suboffset, TRUE) == (UINT16)data_to_find[j]); break;
- case 4: match = ((UINT32)debug_read_dword(*space, i + suboffset, TRUE) == (UINT32)data_to_find[j]); break;
- case 8: match = ((UINT64)debug_read_qword(*space, i + suboffset, TRUE) == (UINT64)data_to_find[j]); break;
- default: /* all other cases are wildcards */ break;
+ case 1: match = ((UINT8)debug_read_byte(*space, i + suboffset, TRUE) == (UINT8)data_to_find[j]); break;
+ case 2: match = ((UINT16)debug_read_word(*space, i + suboffset, TRUE) == (UINT16)data_to_find[j]); break;
+ case 4: match = ((UINT32)debug_read_dword(*space, i + suboffset, TRUE) == (UINT32)data_to_find[j]); break;
+ case 8: match = ((UINT64)debug_read_qword(*space, i + suboffset, TRUE) == (UINT64)data_to_find[j]); break;
+ default: /* all other cases are wildcards */ break;
}
suboffset += data_size[j] & 0x0f;
}
diff --git a/src/emu/debug/debugcmd.h b/src/emu/debug/debugcmd.h
index 0944df45f89..058267622bb 100644
--- a/src/emu/debug/debugcmd.h
+++ b/src/emu/debug/debugcmd.h
@@ -27,7 +27,7 @@ void debug_command_init(running_machine &machine);
/* ----- parameter validation ----- */
/* validates a number parameter */
-int debug_command_parameter_number(running_machine &machine, const char *param, UINT64 *result);
+int debug_command_parameter_number(running_machine &machine, const char *param, UINT64 *result);
/* validates a parameter as a cpu */
int debug_command_parameter_cpu(running_machine &machine, const char *param, device_t **result);
diff --git a/src/emu/debug/debugcon.c b/src/emu/debug/debugcon.c
index 846f54b5575..e51ec8d2eb8 100644
--- a/src/emu/debug/debugcon.c
+++ b/src/emu/debug/debugcon.c
@@ -24,11 +24,11 @@
CONSTANTS
***************************************************************************/
-#define CONSOLE_BUF_SIZE (1024 * 1024)
-#define CONSOLE_MAX_LINES (CONSOLE_BUF_SIZE / 20)
+#define CONSOLE_BUF_SIZE (1024 * 1024)
+#define CONSOLE_MAX_LINES (CONSOLE_BUF_SIZE / 20)
-#define ERRORLOG_BUF_SIZE (1024 * 1024)
-#define ERRORLOG_MAX_LINES (ERRORLOG_BUF_SIZE / 20)
+#define ERRORLOG_BUF_SIZE (1024 * 1024)
+#define ERRORLOG_MAX_LINES (ERRORLOG_BUF_SIZE / 20)
@@ -38,16 +38,16 @@
struct debug_command
{
- debug_command * next;
- char command[32];
- const char * params;
- const char * help;
- void (*handler)(running_machine &machine, int ref, int params, const char **param);
- void (*handler_ex)(int ref);
- UINT32 flags;
- int ref;
- int minparams;
- int maxparams;
+ debug_command * next;
+ char command[32];
+ const char * params;
+ const char * help;
+ void (*handler)(running_machine &machine, int ref, int params, const char **param);
+ void (*handler_ex)(int ref);
+ UINT32 flags;
+ int ref;
+ int minparams;
+ int maxparams;
};
@@ -296,20 +296,20 @@ static CMDERR internal_parse_command(running_machine &machine, const char *origi
{
switch (c)
{
- case '"': instring = TRUE; break;
+ case '"': instring = TRUE; break;
case '(':
case '[':
- case '{': parens[parendex++] = c; break;
- case ')': if (parendex == 0 || parens[--parendex] != '(') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break;
- case ']': if (parendex == 0 || parens[--parendex] != '[') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break;
- case '}': if (parendex == 0 || parens[--parendex] != '{') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break;
- case ',': if (parendex == 0) params[paramcount++] = p; break;
- case ';': if (parendex == 0) foundend = TRUE; break;
- case '-': if (parendex == 0 && paramcount == 1 && p[1] == '-') isexpr = TRUE; *p = c; break;
- case '+': if (parendex == 0 && paramcount == 1 && p[1] == '+') isexpr = TRUE; *p = c; break;
- case '=': if (parendex == 0 && paramcount == 1) isexpr = TRUE; *p = c; break;
- case 0: foundend = TRUE; break;
- default: *p = tolower((UINT8)c); break;
+ case '{': parens[parendex++] = c; break;
+ case ')': if (parendex == 0 || parens[--parendex] != '(') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break;
+ case ']': if (parendex == 0 || parens[--parendex] != '[') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break;
+ case '}': if (parendex == 0 || parens[--parendex] != '{') return MAKE_CMDERR_UNBALANCED_PARENS(p - command); break;
+ case ',': if (parendex == 0) params[paramcount++] = p; break;
+ case ';': if (parendex == 0) foundend = TRUE; break;
+ case '-': if (parendex == 0 && paramcount == 1 && p[1] == '-') isexpr = TRUE; *p = c; break;
+ case '+': if (parendex == 0 && paramcount == 1 && p[1] == '+') isexpr = TRUE; *p = c; break;
+ case '=': if (parendex == 0 && paramcount == 1) isexpr = TRUE; *p = c; break;
+ case 0: foundend = TRUE; break;
+ default: *p = tolower((UINT8)c); break;
}
}
}
@@ -448,14 +448,14 @@ const char *debug_cmderr_to_string(CMDERR error)
{
switch (CMDERR_ERROR_CLASS(error))
{
- case CMDERR_UNKNOWN_COMMAND: return "unknown command";
- case CMDERR_AMBIGUOUS_COMMAND: return "ambiguous command";
- case CMDERR_UNBALANCED_PARENS: return "unbalanced parentheses";
- case CMDERR_UNBALANCED_QUOTES: return "unbalanced quotes";
- case CMDERR_NOT_ENOUGH_PARAMS: return "not enough parameters for command";
- case CMDERR_TOO_MANY_PARAMS: return "too many parameters for command";
- case CMDERR_EXPRESSION_ERROR: return "error in assignment expression";
- default: return "unknown error";
+ case CMDERR_UNKNOWN_COMMAND: return "unknown command";
+ case CMDERR_AMBIGUOUS_COMMAND: return "ambiguous command";
+ case CMDERR_UNBALANCED_PARENS: return "unbalanced parentheses";
+ case CMDERR_UNBALANCED_QUOTES: return "unbalanced quotes";
+ case CMDERR_NOT_ENOUGH_PARAMS: return "not enough parameters for command";
+ case CMDERR_TOO_MANY_PARAMS: return "too many parameters for command";
+ case CMDERR_EXPRESSION_ERROR: return "error in assignment expression";
+ default: return "unknown error";
}
}
@@ -564,4 +564,3 @@ text_buffer *debug_errorlog_get_textbuf(void)
{
return errorlog_textbuf;
}
-
diff --git a/src/emu/debug/debugcon.h b/src/emu/debug/debugcon.h
index 9977a19b578..62161c133ee 100644
--- a/src/emu/debug/debugcon.h
+++ b/src/emu/debug/debugcon.h
@@ -19,26 +19,26 @@
CONSTANTS
***************************************************************************/
-#define MAX_COMMAND_LENGTH 512
-#define MAX_COMMAND_PARAMS 16
+#define MAX_COMMAND_LENGTH 512
+#define MAX_COMMAND_PARAMS 16
/* flags for command parsing */
-#define CMDFLAG_NONE (0x0000)
-#define CMDFLAG_KEEP_QUOTES (0x0001)
+#define CMDFLAG_NONE (0x0000)
+#define CMDFLAG_KEEP_QUOTES (0x0001)
/* values for the error code in a command error */
-#define CMDERR_NONE (0)
-#define CMDERR_UNKNOWN_COMMAND (1)
-#define CMDERR_AMBIGUOUS_COMMAND (2)
-#define CMDERR_UNBALANCED_PARENS (3)
-#define CMDERR_UNBALANCED_QUOTES (4)
-#define CMDERR_NOT_ENOUGH_PARAMS (5)
-#define CMDERR_TOO_MANY_PARAMS (6)
-#define CMDERR_EXPRESSION_ERROR (7)
+#define CMDERR_NONE (0)
+#define CMDERR_UNKNOWN_COMMAND (1)
+#define CMDERR_AMBIGUOUS_COMMAND (2)
+#define CMDERR_UNBALANCED_PARENS (3)
+#define CMDERR_UNBALANCED_QUOTES (4)
+#define CMDERR_NOT_ENOUGH_PARAMS (5)
+#define CMDERR_TOO_MANY_PARAMS (6)
+#define CMDERR_EXPRESSION_ERROR (7)
/* parameter separator macros */
-#define CMDPARAM_SEPARATOR "\0"
-#define CMDPARAM_TERMINATOR "\0\0"
+#define CMDPARAM_SEPARATOR "\0"
+#define CMDPARAM_TERMINATOR "\0\0"
@@ -47,18 +47,18 @@
***************************************************************************/
/* command error assembly/disassembly macros */
-#define CMDERR_ERROR_CLASS(x) ((x) >> 16)
-#define CMDERR_ERROR_OFFSET(x) ((x) & 0xffff)
-#define MAKE_CMDERR(a,b) (((a) << 16) | ((b) & 0xffff))
+#define CMDERR_ERROR_CLASS(x) ((x) >> 16)
+#define CMDERR_ERROR_OFFSET(x) ((x) & 0xffff)
+#define MAKE_CMDERR(a,b) (((a) << 16) | ((b) & 0xffff))
/* macros to assemble specific error conditions */
-#define MAKE_CMDERR_UNKNOWN_COMMAND(x) MAKE_CMDERR(CMDERR_UNKNOWN_COMMAND, (x))
-#define MAKE_CMDERR_AMBIGUOUS_COMMAND(x) MAKE_CMDERR(CMDERR_AMBIGUOUS_COMMAND, (x))
-#define MAKE_CMDERR_UNBALANCED_PARENS(x) MAKE_CMDERR(CMDERR_UNBALANCED_PARENS, (x))
-#define MAKE_CMDERR_UNBALANCED_QUOTES(x) MAKE_CMDERR(CMDERR_UNBALANCED_QUOTES, (x))
-#define MAKE_CMDERR_NOT_ENOUGH_PARAMS(x) MAKE_CMDERR(CMDERR_NOT_ENOUGH_PARAMS, (x))
-#define MAKE_CMDERR_TOO_MANY_PARAMS(x) MAKE_CMDERR(CMDERR_TOO_MANY_PARAMS, (x))
-#define MAKE_CMDERR_EXPRESSION_ERROR(x) MAKE_CMDERR(CMDERR_EXPRESSION_ERROR, (x))
+#define MAKE_CMDERR_UNKNOWN_COMMAND(x) MAKE_CMDERR(CMDERR_UNKNOWN_COMMAND, (x))
+#define MAKE_CMDERR_AMBIGUOUS_COMMAND(x) MAKE_CMDERR(CMDERR_AMBIGUOUS_COMMAND, (x))
+#define MAKE_CMDERR_UNBALANCED_PARENS(x) MAKE_CMDERR(CMDERR_UNBALANCED_PARENS, (x))
+#define MAKE_CMDERR_UNBALANCED_QUOTES(x) MAKE_CMDERR(CMDERR_UNBALANCED_QUOTES, (x))
+#define MAKE_CMDERR_NOT_ENOUGH_PARAMS(x) MAKE_CMDERR(CMDERR_NOT_ENOUGH_PARAMS, (x))
+#define MAKE_CMDERR_TOO_MANY_PARAMS(x) MAKE_CMDERR(CMDERR_TOO_MANY_PARAMS, (x))
+#define MAKE_CMDERR_EXPRESSION_ERROR(x) MAKE_CMDERR(CMDERR_EXPRESSION_ERROR, (x))
/***************************************************************************
@@ -75,22 +75,22 @@ typedef UINT32 CMDERR;
***************************************************************************/
/* initialization */
-void debug_console_init(running_machine &machine);
+void debug_console_init(running_machine &machine);
/* command handling */
-CMDERR debug_console_execute_command(running_machine &machine, const char *command, int echo);
-CMDERR debug_console_validate_command(running_machine &machine, const char *command);
-void debug_console_register_command(running_machine &machine, const char *command, UINT32 flags, int ref, int minparams, int maxparams, void (*handler)(running_machine &machine, int ref, int params, const char **param));
-const char * debug_cmderr_to_string(CMDERR error);
+CMDERR debug_console_execute_command(running_machine &machine, const char *command, int echo);
+CMDERR debug_console_validate_command(running_machine &machine, const char *command);
+void debug_console_register_command(running_machine &machine, const char *command, UINT32 flags, int ref, int minparams, int maxparams, void (*handler)(running_machine &machine, int ref, int params, const char **param));
+const char * debug_cmderr_to_string(CMDERR error);
/* console management */
-void CLIB_DECL debug_console_printf(running_machine &machine, const char *format, ...) ATTR_PRINTF(2,3);
-void CLIB_DECL debug_console_vprintf(running_machine &machine, const char *format, va_list args);
-void CLIB_DECL debug_console_printf_wrap(running_machine &machine, int wrapcol, const char *format, ...) ATTR_PRINTF(3,4);
-text_buffer * debug_console_get_textbuf(void);
+void CLIB_DECL debug_console_printf(running_machine &machine, const char *format, ...) ATTR_PRINTF(2,3);
+void CLIB_DECL debug_console_vprintf(running_machine &machine, const char *format, va_list args);
+void CLIB_DECL debug_console_printf_wrap(running_machine &machine, int wrapcol, const char *format, ...) ATTR_PRINTF(3,4);
+text_buffer * debug_console_get_textbuf(void);
/* errorlog management */
-void debug_errorlog_write_line(running_machine &machine, const char *line);
-text_buffer * debug_errorlog_get_textbuf(void);
+void debug_errorlog_write_line(running_machine &machine, const char *line);
+text_buffer * debug_errorlog_get_textbuf(void);
#endif
diff --git a/src/emu/debug/debugcpu.c b/src/emu/debug/debugcpu.c
index dc649898ecd..d0db48c106b 100644
--- a/src/emu/debug/debugcpu.c
+++ b/src/emu/debug/debugcpu.c
@@ -57,7 +57,7 @@
CONSTANTS
***************************************************************************/
-#define NUM_TEMP_VARIABLES 10
+#define NUM_TEMP_VARIABLES 10
enum
{
@@ -77,28 +77,28 @@ struct debugcpu_private
device_t *visiblecpu;
device_t *breakcpu;
- FILE * source_file; /* script source file */
+ FILE * source_file; /* script source file */
- symbol_table * symtable; /* global symbol table */
+ symbol_table * symtable; /* global symbol table */
- bool within_instruction_hook;
- bool vblank_occurred;
- bool memory_modified;
- bool debugger_access;
+ bool within_instruction_hook;
+ bool vblank_occurred;
+ bool memory_modified;
+ bool debugger_access;
- int execution_state;
- device_t * m_stop_when_not_device; // stop execution when the device ceases to be this
+ int execution_state;
+ device_t * m_stop_when_not_device; // stop execution when the device ceases to be this
- UINT32 bpindex;
- UINT32 wpindex;
+ UINT32 bpindex;
+ UINT32 wpindex;
- UINT64 wpdata;
- UINT64 wpaddr;
- UINT64 tempvar[NUM_TEMP_VARIABLES];
+ UINT64 wpdata;
+ UINT64 wpaddr;
+ UINT64 tempvar[NUM_TEMP_VARIABLES];
- osd_ticks_t last_periodic_update_time;
+ osd_ticks_t last_periodic_update_time;
- bool comments_loaded;
+ bool comments_loaded;
};
@@ -199,8 +199,8 @@ void debug_cpu_configure_memory(running_machine &machine, symbol_table &table)
void debug_cpu_flush_traces(running_machine &machine)
{
/* this can be called on exit even when no debugging is enabled, so
- make sure the devdebug is valid before proceeding */
- device_iterator iter(machine.root_device());
+ make sure the devdebug is valid before proceeding */
+ device_iterator iter(machine.root_device());
for (device_t *device = iter.first(); device != NULL; device = iter.next())
if (device->debug() != NULL)
device->debug()->trace_flush();
@@ -668,10 +668,10 @@ UINT64 debug_read_memory(address_space &space, offs_t address, int size, int app
UINT64 result = ~(UINT64)0 >> (64 - 8*size);
switch (size)
{
- case 1: result = debug_read_byte(space, address, apply_translation); break;
- case 2: result = debug_read_word(space, address, apply_translation); break;
- case 4: result = debug_read_dword(space, address, apply_translation); break;
- case 8: result = debug_read_qword(space, address, apply_translation); break;
+ case 1: result = debug_read_byte(space, address, apply_translation); break;
+ case 2: result = debug_read_word(space, address, apply_translation); break;
+ case 4: result = debug_read_dword(space, address, apply_translation); break;
+ case 8: result = debug_read_qword(space, address, apply_translation); break;
}
return result;
}
@@ -875,10 +875,10 @@ void debug_write_memory(address_space &space, offs_t address, UINT64 data, int s
{
switch (size)
{
- case 1: debug_write_byte(space, address, data, apply_translation); break;
- case 2: debug_write_word(space, address, data, apply_translation); break;
- case 4: debug_write_dword(space, address, data, apply_translation); break;
- case 8: debug_write_qword(space, address, data, apply_translation); break;
+ case 1: debug_write_byte(space, address, data, apply_translation); break;
+ case 2: debug_write_word(space, address, data, apply_translation); break;
+ case 4: debug_write_dword(space, address, data, apply_translation); break;
+ case 8: debug_write_qword(space, address, data, apply_translation); break;
}
}
@@ -1633,28 +1633,28 @@ static UINT64 get_cpunum(symbol_table &table, void *ref)
device_debug::device_debug(device_t &device)
: m_device(device),
- m_exec(NULL),
- m_memory(NULL),
- m_state(NULL),
- m_disasm(NULL),
- m_flags(0),
- m_symtable(&device, debug_cpu_get_global_symtable(device.machine())),
- m_instrhook(NULL),
- m_dasm_override(NULL),
- m_opwidth(0),
- m_stepaddr(0),
- m_stepsleft(0),
- m_stopaddr(0),
- m_stoptime(attotime::zero),
- m_stopirq(0),
- m_stopexception(0),
- m_endexectime(attotime::zero),
- m_pc_history_index(0),
- m_bplist(NULL),
- m_trace(NULL),
- m_hotspots(NULL),
- m_hotspot_count(0),
- m_hotspot_threshhold(0)
+ m_exec(NULL),
+ m_memory(NULL),
+ m_state(NULL),
+ m_disasm(NULL),
+ m_flags(0),
+ m_symtable(&device, debug_cpu_get_global_symtable(device.machine())),
+ m_instrhook(NULL),
+ m_dasm_override(NULL),
+ m_opwidth(0),
+ m_stepaddr(0),
+ m_stepsleft(0),
+ m_stopaddr(0),
+ m_stoptime(attotime::zero),
+ m_stopirq(0),
+ m_stopexception(0),
+ m_endexectime(attotime::zero),
+ m_pc_history_index(0),
+ m_bplist(NULL),
+ m_trace(NULL),
+ m_hotspots(NULL),
+ m_hotspot_count(0),
+ m_hotspot_threshhold(0)
{
memset(m_pc_history, 0, sizeof(m_pc_history));
memset(m_wplist, 0, sizeof(m_wplist));
@@ -3138,11 +3138,11 @@ void device_debug::set_state(symbol_table &table, void *ref, UINT64 value)
device_debug::breakpoint::breakpoint(symbol_table &symbols, int index, offs_t address, const char *condition, const char *action)
: m_next(NULL),
- m_index(index),
- m_enabled(true),
- m_address(address),
- m_condition(&symbols, (condition != NULL) ? condition : "1"),
- m_action((action != NULL) ? action : "")
+ m_index(index),
+ m_enabled(true),
+ m_address(address),
+ m_condition(&symbols, (condition != NULL) ? condition : "1"),
+ m_action((action != NULL) ? action : "")
{
}
@@ -3189,14 +3189,14 @@ bool device_debug::breakpoint::hit(offs_t pc)
device_debug::watchpoint::watchpoint(symbol_table &symbols, int index, address_space &space, int type, offs_t address, offs_t length, const char *condition, const char *action)
: m_next(NULL),
- m_space(space),
- m_index(index),
- m_enabled(true),
- m_type(type),
- m_address(space.address_to_byte(address) & space.bytemask()),
- m_length(space.address_to_byte(length)),
- m_condition(&symbols, (condition != NULL) ? condition : "1"),
- m_action((action != NULL) ? action : "")
+ m_space(space),
+ m_index(index),
+ m_enabled(true),
+ m_type(type),
+ m_address(space.address_to_byte(address) & space.bytemask()),
+ m_length(space.address_to_byte(length)),
+ m_condition(&symbols, (condition != NULL) ? condition : "1"),
+ m_action((action != NULL) ? action : "")
{
}
@@ -3246,12 +3246,12 @@ bool device_debug::watchpoint::hit(int type, offs_t address, int size)
device_debug::tracer::tracer(device_debug &debug, FILE &file, bool trace_over, const char *action)
: m_debug(debug),
- m_file(file),
- m_action((action != NULL) ? action : ""),
- m_loops(0),
- m_nextdex(0),
- m_trace_over(trace_over),
- m_trace_over_target(~0)
+ m_file(file),
+ m_action((action != NULL) ? action : ""),
+ m_loops(0),
+ m_nextdex(0),
+ m_trace_over(trace_over),
+ m_trace_over_target(~0)
{
memset(m_history, 0, sizeof(m_history));
}
@@ -3365,9 +3365,9 @@ void device_debug::tracer::flush()
device_debug::dasm_comment::dasm_comment(const char *text, offs_t address, rgb_t color, UINT32 crc)
: m_next(NULL),
- m_address(address),
- m_color(color),
- m_crc(crc),
- m_text(text)
+ m_address(address),
+ m_color(color),
+ m_crc(crc),
+ m_text(text)
{
}
diff --git a/src/emu/debug/debugcpu.h b/src/emu/debug/debugcpu.h
index 1805b8101d4..6ec0a080bb0 100644
--- a/src/emu/debug/debugcpu.h
+++ b/src/emu/debug/debugcpu.h
@@ -49,11 +49,11 @@
// CONSTANTS
//**************************************************************************
-const UINT8 WATCHPOINT_READ = 1;
-const UINT8 WATCHPOINT_WRITE = 2;
-const UINT8 WATCHPOINT_READWRITE = WATCHPOINT_READ | WATCHPOINT_WRITE;
+const UINT8 WATCHPOINT_READ = 1;
+const UINT8 WATCHPOINT_WRITE = 2;
+const UINT8 WATCHPOINT_READWRITE = WATCHPOINT_READ | WATCHPOINT_WRITE;
-const int COMMENT_VERSION = 1;
+const int COMMENT_VERSION = 1;
@@ -93,12 +93,12 @@ public:
// internals
bool hit(offs_t pc);
- breakpoint * m_next; // next in the list
- int m_index; // user reported index
- UINT8 m_enabled; // enabled?
- offs_t m_address; // execution address
- parsed_expression m_condition; // condition
- astring m_action; // action
+ breakpoint * m_next; // next in the list
+ int m_index; // user reported index
+ UINT8 m_enabled; // enabled?
+ offs_t m_address; // execution address
+ parsed_expression m_condition; // condition
+ astring m_action; // action
};
// watchpoint class
@@ -125,15 +125,15 @@ public:
// internals
bool hit(int type, offs_t address, int size);
- watchpoint * m_next; // next in the list
- address_space & m_space; // address space
- int m_index; // user reported index
- bool m_enabled; // enabled?
- UINT8 m_type; // type (read/write)
- offs_t m_address; // start address
- offs_t m_length; // length of watch area
- parsed_expression m_condition; // condition
- astring m_action; // action
+ watchpoint * m_next; // next in the list
+ address_space & m_space; // address space
+ int m_index; // user reported index
+ bool m_enabled; // enabled?
+ UINT8 m_type; // type (read/write)
+ offs_t m_address; // start address
+ offs_t m_length; // length of watch area
+ parsed_expression m_condition; // condition
+ astring m_action; // action
};
public:
@@ -250,39 +250,39 @@ private:
static void set_state(symbol_table &table, void *ref, UINT64 value);
// basic device information
- device_t & m_device; // device we are attached to
- device_execute_interface *m_exec; // execute interface, if present
- device_memory_interface *m_memory; // memory interface, if present
- device_state_interface *m_state; // state interface, if present
- device_disasm_interface *m_disasm; // disasm interface, if present
+ device_t & m_device; // device we are attached to
+ device_execute_interface *m_exec; // execute interface, if present
+ device_memory_interface *m_memory; // memory interface, if present
+ device_state_interface *m_state; // state interface, if present
+ device_disasm_interface *m_disasm; // disasm interface, if present
// global state
- UINT32 m_flags; // debugging flags for this CPU
- symbol_table m_symtable; // symbol table for expression evaluation
- debug_instruction_hook_func m_instrhook; // per-instruction callback hook
+ UINT32 m_flags; // debugging flags for this CPU
+ symbol_table m_symtable; // symbol table for expression evaluation
+ debug_instruction_hook_func m_instrhook; // per-instruction callback hook
// disassembly
- dasm_override_func m_dasm_override; // pointer to provided override function
- UINT8 m_opwidth; // width of an opcode
+ dasm_override_func m_dasm_override; // pointer to provided override function
+ UINT8 m_opwidth; // width of an opcode
// stepping information
- offs_t m_stepaddr; // step target address for DEBUG_FLAG_STEPPING_OVER
- int m_stepsleft; // number of steps left until done
+ offs_t m_stepaddr; // step target address for DEBUG_FLAG_STEPPING_OVER
+ int m_stepsleft; // number of steps left until done
// execution information
- offs_t m_stopaddr; // stop address for DEBUG_FLAG_STOP_PC
- attotime m_stoptime; // stop time for DEBUG_FLAG_STOP_TIME
- int m_stopirq; // stop IRQ number for DEBUG_FLAG_STOP_INTERRUPT
- int m_stopexception; // stop exception number for DEBUG_FLAG_STOP_EXCEPTION
- attotime m_endexectime; // ending time of the current execution
+ offs_t m_stopaddr; // stop address for DEBUG_FLAG_STOP_PC
+ attotime m_stoptime; // stop time for DEBUG_FLAG_STOP_TIME
+ int m_stopirq; // stop IRQ number for DEBUG_FLAG_STOP_INTERRUPT
+ int m_stopexception; // stop exception number for DEBUG_FLAG_STOP_EXCEPTION
+ attotime m_endexectime; // ending time of the current execution
// history
- offs_t m_pc_history[HISTORY_SIZE]; // history of recent PCs
- UINT32 m_pc_history_index; // current history index
+ offs_t m_pc_history[HISTORY_SIZE]; // history of recent PCs
+ UINT32 m_pc_history_index; // current history index
// breakpoints and watchpoints
- breakpoint * m_bplist; // list of breakpoints
- watchpoint * m_wplist[ADDRESS_SPACES]; // watchpoint lists for each address space
+ breakpoint * m_bplist; // list of breakpoints
+ watchpoint * m_wplist[ADDRESS_SPACES]; // watchpoint lists for each address space
// tracing
class tracer
@@ -298,30 +298,30 @@ private:
private:
static const int TRACE_LOOPS = 64;
- device_debug & m_debug; // reference to our owner
- FILE & m_file; // tracing file for this CPU
- astring m_action; // action to perform during a trace
- offs_t m_history[TRACE_LOOPS]; // history of recent PCs
- int m_loops; // number of instructions in a loop
- int m_nextdex; // next index
- bool m_trace_over; // true if we're tracing over
- offs_t m_trace_over_target; // target for tracing over
- // (0 = not tracing over,
- // ~0 = not currently tracing over)
+ device_debug & m_debug; // reference to our owner
+ FILE & m_file; // tracing file for this CPU
+ astring m_action; // action to perform during a trace
+ offs_t m_history[TRACE_LOOPS]; // history of recent PCs
+ int m_loops; // number of instructions in a loop
+ int m_nextdex; // next index
+ bool m_trace_over; // true if we're tracing over
+ offs_t m_trace_over_target; // target for tracing over
+ // (0 = not tracing over,
+ // ~0 = not currently tracing over)
};
- tracer * m_trace; // tracer state
+ tracer * m_trace; // tracer state
// hotspots
struct hotspot_entry
{
- offs_t m_access; // access address
- offs_t m_pc; // PC of the access
- address_space * m_space; // space where the access occurred
- UINT32 m_count; // number of hits
+ offs_t m_access; // access address
+ offs_t m_pc; // PC of the access
+ address_space * m_space; // space where the access occurred
+ UINT32 m_count; // number of hits
};
- hotspot_entry * m_hotspots; // hotspot list
- int m_hotspot_count; // number of hotspots
- int m_hotspot_threshhold; // threshhold for the number of hits to print
+ hotspot_entry * m_hotspots; // hotspot list
+ int m_hotspot_count; // number of hotspots
+ int m_hotspot_threshhold; // threshhold for the number of hits to print
// comments
class dasm_comment
@@ -331,34 +331,34 @@ private:
dasm_comment *next() const { return m_next; }
- dasm_comment * m_next; // next comment in the list
- offs_t m_address; // address in question
- rgb_t m_color; // color to use
- UINT32 m_crc; // CRC of code
- astring m_text; // text
+ dasm_comment * m_next; // next comment in the list
+ offs_t m_address; // address in question
+ rgb_t m_color; // color to use
+ UINT32 m_crc; // CRC of code
+ astring m_text; // text
};
- simple_list<dasm_comment> m_comment_list; // list of comments
- UINT32 m_comment_change; // change counter for comments
+ simple_list<dasm_comment> m_comment_list; // list of comments
+ UINT32 m_comment_change; // change counter for comments
// internal flag values
- static const UINT32 DEBUG_FLAG_OBSERVING = 0x00000001; // observing this CPU
- static const UINT32 DEBUG_FLAG_HISTORY = 0x00000002; // tracking this CPU's history
- static const UINT32 DEBUG_FLAG_TRACING = 0x00000004; // tracing this CPU
- static const UINT32 DEBUG_FLAG_TRACING_OVER = 0x00000008; // tracing this CPU with step over behavior
- static const UINT32 DEBUG_FLAG_HOOKED = 0x00000010; // per-instruction callback hook
- static const UINT32 DEBUG_FLAG_STEPPING = 0x00000020; // CPU is single stepping
- static const UINT32 DEBUG_FLAG_STEPPING_OVER = 0x00000040; // CPU is stepping over a function
- static const UINT32 DEBUG_FLAG_STEPPING_OUT = 0x00000080; // CPU is stepping out of a function
- static const UINT32 DEBUG_FLAG_STOP_PC = 0x00000100; // there is a pending stop at cpu->breakpc
- static const UINT32 DEBUG_FLAG_STOP_INTERRUPT = 0x00000400; // there is a pending stop on the next interrupt
- static const UINT32 DEBUG_FLAG_STOP_EXCEPTION = 0x00000800; // there is a pending stop on the next exception
- static const UINT32 DEBUG_FLAG_STOP_VBLANK = 0x00001000; // there is a pending stop on the next VBLANK
- static const UINT32 DEBUG_FLAG_STOP_TIME = 0x00002000; // there is a pending stop at cpu->stoptime
- static const UINT32 DEBUG_FLAG_LIVE_BP = 0x00010000; // there are live breakpoints for this CPU
-
- static const UINT32 DEBUG_FLAG_STEPPING_ANY = DEBUG_FLAG_STEPPING | DEBUG_FLAG_STEPPING_OVER | DEBUG_FLAG_STEPPING_OUT;
- static const UINT32 DEBUG_FLAG_TRACING_ANY = DEBUG_FLAG_TRACING | DEBUG_FLAG_TRACING_OVER;
- static const UINT32 DEBUG_FLAG_TRANSIENT = DEBUG_FLAG_STEPPING_ANY | DEBUG_FLAG_STOP_PC |
+ static const UINT32 DEBUG_FLAG_OBSERVING = 0x00000001; // observing this CPU
+ static const UINT32 DEBUG_FLAG_HISTORY = 0x00000002; // tracking this CPU's history
+ static const UINT32 DEBUG_FLAG_TRACING = 0x00000004; // tracing this CPU
+ static const UINT32 DEBUG_FLAG_TRACING_OVER = 0x00000008; // tracing this CPU with step over behavior
+ static const UINT32 DEBUG_FLAG_HOOKED = 0x00000010; // per-instruction callback hook
+ static const UINT32 DEBUG_FLAG_STEPPING = 0x00000020; // CPU is single stepping
+ static const UINT32 DEBUG_FLAG_STEPPING_OVER = 0x00000040; // CPU is stepping over a function
+ static const UINT32 DEBUG_FLAG_STEPPING_OUT = 0x00000080; // CPU is stepping out of a function
+ static const UINT32 DEBUG_FLAG_STOP_PC = 0x00000100; // there is a pending stop at cpu->breakpc
+ static const UINT32 DEBUG_FLAG_STOP_INTERRUPT = 0x00000400; // there is a pending stop on the next interrupt
+ static const UINT32 DEBUG_FLAG_STOP_EXCEPTION = 0x00000800; // there is a pending stop on the next exception
+ static const UINT32 DEBUG_FLAG_STOP_VBLANK = 0x00001000; // there is a pending stop on the next VBLANK
+ static const UINT32 DEBUG_FLAG_STOP_TIME = 0x00002000; // there is a pending stop at cpu->stoptime
+ static const UINT32 DEBUG_FLAG_LIVE_BP = 0x00010000; // there are live breakpoints for this CPU
+
+ static const UINT32 DEBUG_FLAG_STEPPING_ANY = DEBUG_FLAG_STEPPING | DEBUG_FLAG_STEPPING_OVER | DEBUG_FLAG_STEPPING_OUT;
+ static const UINT32 DEBUG_FLAG_TRACING_ANY = DEBUG_FLAG_TRACING | DEBUG_FLAG_TRACING_OVER;
+ static const UINT32 DEBUG_FLAG_TRANSIENT = DEBUG_FLAG_STEPPING_ANY | DEBUG_FLAG_STOP_PC |
DEBUG_FLAG_STOP_INTERRUPT | DEBUG_FLAG_STOP_EXCEPTION | DEBUG_FLAG_STOP_VBLANK | DEBUG_FLAG_STOP_TIME;
};
@@ -388,7 +388,7 @@ device_t *debug_cpu_get_visible_cpu(running_machine &machine);
int debug_cpu_within_instruction_hook(running_machine &machine);
/* return TRUE if the current execution state is stopped */
-int debug_cpu_is_stopped(running_machine &machine);
+int debug_cpu_is_stopped(running_machine &machine);
diff --git a/src/emu/debug/debughlp.c b/src/emu/debug/debughlp.c
index 12eeab5daa9..cf2eedf51a9 100644
--- a/src/emu/debug/debughlp.c
+++ b/src/emu/debug/debughlp.c
@@ -19,8 +19,8 @@
CONSTANTS
***************************************************************************/
-#define CONSOLE_HISTORY (10000)
-#define CONSOLE_LINE_CHARS (100)
+#define CONSOLE_HISTORY (10000)
+#define CONSOLE_LINE_CHARS (100)
@@ -30,8 +30,8 @@
struct help_item
{
- const char * tag;
- const char * help;
+ const char * tag;
+ const char * help;
};
@@ -640,7 +640,7 @@ static const help_item static_help_list[] =
" gt[ime] <milliseconds>\n"
"\n"
"The gtime command resumes execution of the current code. Control will not be returned to the "
- "debugger until a specified delay has elapsed. The delay is in milliseconds.\n"
+ "debugger until a specified delay has elapsed. The delay is in milliseconds.\n"
"\n"
"Example:\n"
"\n"
@@ -1319,4 +1319,3 @@ const char *debug_get_help(const char *tag)
msglen += sprintf(&ambig_message[msglen], " help %s?\n", static_help_list[i].tag);
return ambig_message;
}
-
diff --git a/src/emu/debug/debughlp.h b/src/emu/debug/debughlp.h
index d7ce2806320..b921e564b90 100644
--- a/src/emu/debug/debughlp.h
+++ b/src/emu/debug/debughlp.h
@@ -18,6 +18,6 @@
***************************************************************************/
/* help management */
-const char * debug_get_help(const char *tag);
+const char * debug_get_help(const char *tag);
#endif
diff --git a/src/emu/debug/debugvw.c b/src/emu/debug/debugvw.c
index 9d6eb2008e9..88d57258f06 100644
--- a/src/emu/debug/debugvw.c
+++ b/src/emu/debug/debugvw.c
@@ -61,9 +61,9 @@
debug_view_source::debug_view_source(const char *name, device_t *device)
: m_next(NULL),
- m_name(name),
- m_device(device),
- m_is_octal(false)
+ m_name(name),
+ m_device(device),
+ m_is_octal(false)
{
device_execute_interface *intf;
if (device && device->interface(intf))
@@ -92,9 +92,9 @@ debug_view_source::~debug_view_source()
debug_view_source_list::debug_view_source_list(running_machine &machine)
: m_machine(machine),
- m_head(NULL),
- m_tail(NULL),
- m_count(0)
+ m_head(NULL),
+ m_tail(NULL),
+ m_count(0)
{
}
@@ -206,24 +206,24 @@ const debug_view_source *debug_view_source_list::match_device(device_t *device)
debug_view::debug_view(running_machine &machine, debug_view_type type, debug_view_osd_update_func osdupdate, void *osdprivate)
: m_next(NULL),
- m_type(type),
- m_source(NULL),
- m_source_list(machine),
- m_osdupdate(osdupdate),
- m_osdprivate(osdprivate),
- m_visible(10,10),
- m_total(10,10),
- m_topleft(0,0),
- m_cursor(0,0),
- m_supports_cursor(false),
- m_cursor_visible(false),
- m_recompute(true),
- m_update_level(0),
- m_update_pending(true),
- m_osd_update_pending(true),
- m_viewdata(NULL),
- m_viewdata_size(0),
- m_machine(machine)
+ m_type(type),
+ m_source(NULL),
+ m_source_list(machine),
+ m_osdupdate(osdupdate),
+ m_osdprivate(osdprivate),
+ m_visible(10,10),
+ m_total(10,10),
+ m_topleft(0,0),
+ m_cursor(0,0),
+ m_supports_cursor(false),
+ m_cursor_visible(false),
+ m_recompute(true),
+ m_update_level(0),
+ m_update_pending(true),
+ m_osd_update_pending(true),
+ m_viewdata(NULL),
+ m_viewdata_size(0),
+ m_machine(machine)
{
// allocate memory for the buffer
m_viewdata_size = m_visible.y * m_visible.x;
@@ -440,7 +440,7 @@ void debug_view::view_char(int chval)
debug_view_manager::debug_view_manager(running_machine &machine)
: m_machine(machine),
- m_viewlist(NULL)
+ m_viewlist(NULL)
{
}
@@ -562,10 +562,10 @@ debug_view *debug_view_manager::append(debug_view *view)
debug_view_expression::debug_view_expression(running_machine &machine)
: m_machine(machine),
- m_dirty(true),
- m_result(0),
- m_parsed(debug_cpu_get_global_symtable(machine)),
- m_string("0")
+ m_dirty(true),
+ m_result(0),
+ m_parsed(debug_cpu_get_global_symtable(machine)),
+ m_string("0")
{
}
diff --git a/src/emu/debug/debugvw.h b/src/emu/debug/debugvw.h
index b77f8eff607..cecc5adb7b0 100644
--- a/src/emu/debug/debugvw.h
+++ b/src/emu/debug/debugvw.h
@@ -72,29 +72,29 @@ enum debug_view_notification
// attribute bits for debug_view_char.attrib
-const UINT8 DCA_NORMAL = 0x00; // in Windows: black on white
-const UINT8 DCA_CHANGED = 0x01; // in Windows: red foreground
-const UINT8 DCA_SELECTED = 0x02; // in Windows: light red background
-const UINT8 DCA_INVALID = 0x04; // in Windows: dark blue foreground
-const UINT8 DCA_DISABLED = 0x08; // in Windows: darker foreground
-const UINT8 DCA_ANCILLARY = 0x10; // in Windows: grey background
-const UINT8 DCA_CURRENT = 0x20; // in Windows: yellow background
-const UINT8 DCA_COMMENT = 0x40; // in Windows: green foreground
+const UINT8 DCA_NORMAL = 0x00; // in Windows: black on white
+const UINT8 DCA_CHANGED = 0x01; // in Windows: red foreground
+const UINT8 DCA_SELECTED = 0x02; // in Windows: light red background
+const UINT8 DCA_INVALID = 0x04; // in Windows: dark blue foreground
+const UINT8 DCA_DISABLED = 0x08; // in Windows: darker foreground
+const UINT8 DCA_ANCILLARY = 0x10; // in Windows: grey background
+const UINT8 DCA_CURRENT = 0x20; // in Windows: yellow background
+const UINT8 DCA_COMMENT = 0x40; // in Windows: green foreground
// special characters that can be passed to process_char()
-const int DCH_UP = 1; // up arrow
-const int DCH_DOWN = 2; // down arrow
-const int DCH_LEFT = 3; // left arrow
-const int DCH_RIGHT = 4; // right arrow
-const int DCH_PUP = 5; // page up
-const int DCH_PDOWN = 6; // page down
-const int DCH_HOME = 7; // home
-const int DCH_CTRLHOME = 8; // ctrl+home
-const int DCH_END = 9; // end
-const int DCH_CTRLEND = 10; // ctrl+end
-const int DCH_CTRLRIGHT = 11; // ctrl+right
-const int DCH_CTRLLEFT = 12; // ctrl+left
+const int DCH_UP = 1; // up arrow
+const int DCH_DOWN = 2; // down arrow
+const int DCH_LEFT = 3; // left arrow
+const int DCH_RIGHT = 4; // right arrow
+const int DCH_PUP = 5; // page up
+const int DCH_PDOWN = 6; // page down
+const int DCH_HOME = 7; // home
+const int DCH_CTRLHOME = 8; // ctrl+home
+const int DCH_END = 9; // end
+const int DCH_CTRLEND = 10; // ctrl+end
+const int DCH_CTRLRIGHT = 11; // ctrl+right
+const int DCH_CTRLLEFT = 12; // ctrl+left
@@ -113,8 +113,8 @@ typedef void (*debug_view_osd_update_func)(debug_view &view, void *osdprivate);
// a single "character" in the debug view has an ASCII value and an attribute byte
struct debug_view_char
{
- UINT8 byte;
- UINT8 attrib;
+ UINT8 byte;
+ UINT8 attrib;
};
@@ -124,8 +124,8 @@ class debug_view_xy
public:
debug_view_xy(int _x = 0, int _y = 0) : x(_x), y(_y) { }
- INT32 x;
- INT32 y;
+ INT32 x;
+ INT32 y;
};
@@ -149,10 +149,10 @@ public:
private:
// internal state
- debug_view_source * m_next; // link to next item
- astring m_name; // name of the source item
- device_t * m_device; // associated device (if applicable)
- bool m_is_octal; // is view in octal or hex
+ debug_view_source * m_next; // link to next item
+ astring m_name; // name of the source item
+ device_t * m_device; // associated device (if applicable)
+ bool m_is_octal; // is view in octal or hex
};
@@ -181,10 +181,10 @@ public:
private:
// internal state
- running_machine & m_machine; // reference to our machine
- debug_view_source * m_head; // head of the list
- debug_view_source * m_tail; // end of the tail
- UINT32 m_count; // number of items in the list
+ running_machine & m_machine; // reference to our machine
+ debug_view_source * m_head; // head of the list
+ debug_view_source * m_tail; // end of the tail
+ UINT32 m_count; // number of items in the list
};
@@ -241,33 +241,33 @@ protected:
protected:
// core view data
- debug_view * m_next; // link to the next view
- debug_view_type m_type; // type of view
- const debug_view_source *m_source; // currently selected data source
- debug_view_source_list m_source_list; // list of available data sources
+ debug_view * m_next; // link to the next view
+ debug_view_type m_type; // type of view
+ const debug_view_source *m_source; // currently selected data source
+ debug_view_source_list m_source_list; // list of available data sources
// OSD data
- debug_view_osd_update_func m_osdupdate; // callback for the update
- void * m_osdprivate; // OSD-managed private data
+ debug_view_osd_update_func m_osdupdate; // callback for the update
+ void * m_osdprivate; // OSD-managed private data
// visibility info
- debug_view_xy m_visible; // visible size (in rows and columns)
- debug_view_xy m_total; // total size (in rows and columns)
- debug_view_xy m_topleft; // top-left visible position (in rows and columns)
- debug_view_xy m_cursor; // cursor position
- bool m_supports_cursor; // does this view support a cursor?
- bool m_cursor_visible; // is the cursor visible?
+ debug_view_xy m_visible; // visible size (in rows and columns)
+ debug_view_xy m_total; // total size (in rows and columns)
+ debug_view_xy m_topleft; // top-left visible position (in rows and columns)
+ debug_view_xy m_cursor; // cursor position
+ bool m_supports_cursor; // does this view support a cursor?
+ bool m_cursor_visible; // is the cursor visible?
// update info
- bool m_recompute; // does this view require a recomputation?
- UINT8 m_update_level; // update level; updates when this hits 0
- bool m_update_pending; // true if there is a pending update
- bool m_osd_update_pending; // true if there is a pending update
- debug_view_char * m_viewdata; // current array of view data
- int m_viewdata_size; // number of elements of the viewdata array
+ bool m_recompute; // does this view require a recomputation?
+ UINT8 m_update_level; // update level; updates when this hits 0
+ bool m_update_pending; // true if there is a pending update
+ bool m_osd_update_pending; // true if there is a pending update
+ debug_view_char * m_viewdata; // current array of view data
+ int m_viewdata_size; // number of elements of the viewdata array
private:
- running_machine & m_machine; // machine associated with this view
+ running_machine & m_machine; // machine associated with this view
};
@@ -295,8 +295,8 @@ private:
debug_view *append(debug_view *view);
// internal state
- running_machine & m_machine; // reference to our machine
- debug_view * m_viewlist; // list of views
+ running_machine & m_machine; // reference to our machine
+ debug_view * m_viewlist; // list of views
};
@@ -326,11 +326,11 @@ private:
bool recompute();
// internal state
- running_machine & m_machine; // reference to the machine
- bool m_dirty; // true if the expression needs to be re-evaluated
- UINT64 m_result; // last result from the expression
- parsed_expression m_parsed; // parsed expression data
- astring m_string; // copy of the expression string
+ running_machine & m_machine; // reference to the machine
+ bool m_dirty; // true if the expression needs to be re-evaluated
+ UINT64 m_result; // last result from the expression
+ parsed_expression m_parsed; // parsed expression data
+ astring m_string; // copy of the expression string
};
diff --git a/src/emu/debug/dvdisasm.c b/src/emu/debug/dvdisasm.c
index 735a85d98be..eec6f4787bc 100644
--- a/src/emu/debug/dvdisasm.c
+++ b/src/emu/debug/dvdisasm.c
@@ -54,9 +54,9 @@
debug_view_disasm_source::debug_view_disasm_source(const char *name, device_t &device)
: debug_view_source(name, &device),
- m_device(device),
- m_disasmintf(dynamic_cast<device_disasm_interface *>(&device)),
- m_space(device.memory().space(AS_PROGRAM))
+ m_device(device),
+ m_disasmintf(dynamic_cast<device_disasm_interface *>(&device)),
+ m_space(device.memory().space(AS_PROGRAM))
{
}
@@ -72,20 +72,20 @@ debug_view_disasm_source::debug_view_disasm_source(const char *name, device_t &d
debug_view_disasm::debug_view_disasm(running_machine &machine, debug_view_osd_update_func osdupdate, void *osdprivate)
: debug_view(machine, DVT_DISASSEMBLY, osdupdate, osdprivate),
- m_right_column(DASM_RIGHTCOL_RAW),
- m_backwards_steps(3),
- m_dasm_width(DEFAULT_DASM_WIDTH),
- m_last_direct_raw(NULL),
- m_last_direct_decrypted(NULL),
- m_last_change_count(0),
- m_last_pcbyte(0),
- m_divider1(0),
- m_divider2(0),
- m_divider3(0),
- m_expression(machine),
- m_allocated(0,0),
- m_byteaddress(NULL),
- m_dasm(NULL)
+ m_right_column(DASM_RIGHTCOL_RAW),
+ m_backwards_steps(3),
+ m_dasm_width(DEFAULT_DASM_WIDTH),
+ m_last_direct_raw(NULL),
+ m_last_direct_decrypted(NULL),
+ m_last_change_count(0),
+ m_last_pcbyte(0),
+ m_divider1(0),
+ m_divider2(0),
+ m_divider3(0),
+ m_expression(machine),
+ m_allocated(0,0),
+ m_byteaddress(NULL),
+ m_dasm(NULL)
{
// fail if no available sources
enumerate_sources();
@@ -199,7 +199,7 @@ void debug_view_disasm::view_char(int chval)
m_cursor.y = temp;
break;
- case DCH_HOME: // set the active column to the PC
+ case DCH_HOME: // set the active column to the PC
{
const debug_view_disasm_source &source = downcast<const debug_view_disasm_source &>(*m_source);
offs_t pc = source.m_space.address_to_byte(source.m_device.safe_pc()) & source.m_space.logbytemask();
@@ -367,7 +367,7 @@ bool debug_view_disasm::recompute(offs_t pc, int startline, int lines)
m_total.x = m_divider2 + 1 + char_num * maxbytes_clamped + (maxbytes_clamped / minbytes - 1) + 1;
}
else if (m_right_column == DASM_RIGHTCOL_COMMENTS)
- m_total.x = m_divider2 + 1 + 50; // DEBUG_COMMENT_MAX_LINE_LENGTH
+ m_total.x = m_divider2 + 1 + 50; // DEBUG_COMMENT_MAX_LINE_LENGTH
else
m_total.x = m_divider2 + 1;
diff --git a/src/emu/debug/dvdisasm.h b/src/emu/debug/dvdisasm.h
index f7caac74c66..556e6907c7f 100644
--- a/src/emu/debug/dvdisasm.h
+++ b/src/emu/debug/dvdisasm.h
@@ -77,9 +77,9 @@ public:
private:
// internal state
- device_t & m_device; // underlying device
- device_disasm_interface *m_disasmintf; // disassembly interface
- address_space & m_space; // address space to display
+ device_t & m_device; // underlying device
+ device_disasm_interface *m_disasmintf; // disassembly interface
+ address_space & m_space; // address space to display
};
@@ -122,19 +122,19 @@ private:
bool recompute(offs_t pc, int startline, int lines);
// internal state
- disasm_right_column m_right_column; // right column contents
- UINT32 m_backwards_steps; // number of backwards steps
- UINT32 m_dasm_width; // width of the disassembly area
- UINT8 * m_last_direct_raw; // last direct raw value
- UINT8 * m_last_direct_decrypted;// last direct decrypted value
- UINT32 m_last_change_count; // last comment change count
- offs_t m_last_pcbyte; // last PC byte value
- int m_divider1, m_divider2; // left and right divider columns
- int m_divider3; // comment divider column
- debug_view_expression m_expression; // expression-related information
- debug_view_xy m_allocated; // allocated rows/columns
- offs_t * m_byteaddress; // addresses of the instructions
- char * m_dasm; // disassembled instructions
+ disasm_right_column m_right_column; // right column contents
+ UINT32 m_backwards_steps; // number of backwards steps
+ UINT32 m_dasm_width; // width of the disassembly area
+ UINT8 * m_last_direct_raw; // last direct raw value
+ UINT8 * m_last_direct_decrypted;// last direct decrypted value
+ UINT32 m_last_change_count; // last comment change count
+ offs_t m_last_pcbyte; // last PC byte value
+ int m_divider1, m_divider2; // left and right divider columns
+ int m_divider3; // comment divider column
+ debug_view_expression m_expression; // expression-related information
+ debug_view_xy m_allocated; // allocated rows/columns
+ offs_t * m_byteaddress; // addresses of the instructions
+ char * m_dasm; // disassembled instructions
// constants
static const int DEFAULT_DASM_LINES = 1000;
diff --git a/src/emu/debug/dvmemory.c b/src/emu/debug/dvmemory.c
index c511e26cf3e..949bf71e995 100644
--- a/src/emu/debug/dvmemory.c
+++ b/src/emu/debug/dvmemory.c
@@ -74,37 +74,37 @@ const debug_view_memory::memory_view_pos debug_view_memory::s_memory_pos_table[9
debug_view_memory_source::debug_view_memory_source(const char *name, address_space &space)
: debug_view_source(name, &space.device()),
- m_space(&space),
- m_memintf(dynamic_cast<device_memory_interface *>(&space.device())),
- m_base(NULL),
- m_length(0),
- m_offsetxor(0),
- m_endianness(space.endianness()),
- m_prefsize(space.data_width() / 8)
+ m_space(&space),
+ m_memintf(dynamic_cast<device_memory_interface *>(&space.device())),
+ m_base(NULL),
+ m_length(0),
+ m_offsetxor(0),
+ m_endianness(space.endianness()),
+ m_prefsize(space.data_width() / 8)
{
}
debug_view_memory_source::debug_view_memory_source(const char *name, memory_region &region)
: debug_view_source(name),
- m_space(NULL),
- m_memintf(NULL),
- m_base(region),
- m_length(region.bytes()),
- m_offsetxor(NATIVE_ENDIAN_VALUE_LE_BE(region.width() - 1, 0)),
- m_endianness(region.endianness()),
- m_prefsize(MIN(region.width(), 8))
+ m_space(NULL),
+ m_memintf(NULL),
+ m_base(region),
+ m_length(region.bytes()),
+ m_offsetxor(NATIVE_ENDIAN_VALUE_LE_BE(region.width() - 1, 0)),
+ m_endianness(region.endianness()),
+ m_prefsize(MIN(region.width(), 8))
{
}
debug_view_memory_source::debug_view_memory_source(const char *name, void *base, int element_size, int num_elements)
: debug_view_source(name),
- m_space(NULL),
- m_memintf(NULL),
- m_base(base),
- m_length(element_size * num_elements),
- m_offsetxor(0),
- m_endianness(ENDIANNESS_NATIVE),
- m_prefsize(MIN(element_size, 8))
+ m_space(NULL),
+ m_memintf(NULL),
+ m_base(base),
+ m_length(element_size * num_elements),
+ m_offsetxor(0),
+ m_endianness(ENDIANNESS_NATIVE),
+ m_prefsize(MIN(element_size, 8))
{
}
@@ -120,15 +120,15 @@ debug_view_memory_source::debug_view_memory_source(const char *name, void *base,
debug_view_memory::debug_view_memory(running_machine &machine, debug_view_osd_update_func osdupdate, void *osdprivate)
: debug_view(machine, DVT_MEMORY, osdupdate, osdprivate),
- m_expression(machine),
- m_chunks_per_row(16),
- m_bytes_per_chunk(1),
- m_reverse_view(false),
- m_ascii_view(true),
- m_no_translation(false),
- m_maxaddr(0),
- m_bytes_per_row(16),
- m_byte_offset(0)
+ m_expression(machine),
+ m_chunks_per_row(16),
+ m_bytes_per_chunk(1),
+ m_reverse_view(false),
+ m_ascii_view(true),
+ m_no_translation(false),
+ m_maxaddr(0),
+ m_bytes_per_row(16),
+ m_byte_offset(0)
{
// fail if no available sources
enumerate_sources();
@@ -181,10 +181,10 @@ void debug_view_memory::enumerate_sources()
break;
// add pretty much anything that's not a timer (we may wish to cull other items later)
- // also, don't trim the front of the name, it's important to know which VIA6522 we're looking at, e.g.
- if (strncmp(itemname, "timer/", 6))
+ // also, don't trim the front of the name, it's important to know which VIA6522 we're looking at, e.g.
+ if (strncmp(itemname, "timer/", 6))
{
- name.cpy(itemname);
+ name.cpy(itemname);
m_source_list.append(*auto_alloc(machine(), debug_view_memory_source(name, base, valsize, valcount)));
}
}
@@ -627,10 +627,10 @@ bool debug_view_memory::read(UINT8 size, offs_t offs, UINT64 &data)
{
switch (size)
{
- case 1: data = debug_read_byte(*source.m_space, offs, !m_no_translation); break;
- case 2: data = debug_read_word(*source.m_space, offs, !m_no_translation); break;
- case 4: data = debug_read_dword(*source.m_space, offs, !m_no_translation); break;
- case 8: data = debug_read_qword(*source.m_space, offs, !m_no_translation); break;
+ case 1: data = debug_read_byte(*source.m_space, offs, !m_no_translation); break;
+ case 2: data = debug_read_word(*source.m_space, offs, !m_no_translation); break;
+ case 4: data = debug_read_dword(*source.m_space, offs, !m_no_translation); break;
+ case 8: data = debug_read_qword(*source.m_space, offs, !m_no_translation); break;
}
}
return ismapped;
@@ -674,10 +674,10 @@ void debug_view_memory::write(UINT8 size, offs_t offs, UINT64 data)
{
switch (size)
{
- case 1: debug_write_byte(*source.m_space, offs, data, !m_no_translation); break;
- case 2: debug_write_word(*source.m_space, offs, data, !m_no_translation); break;
- case 4: debug_write_dword(*source.m_space, offs, data, !m_no_translation); break;
- case 8: debug_write_qword(*source.m_space, offs, data, !m_no_translation); break;
+ case 1: debug_write_byte(*source.m_space, offs, data, !m_no_translation); break;
+ case 2: debug_write_word(*source.m_space, offs, data, !m_no_translation); break;
+ case 4: debug_write_dword(*source.m_space, offs, data, !m_no_translation); break;
+ case 8: debug_write_qword(*source.m_space, offs, data, !m_no_translation); break;
}
return;
}
diff --git a/src/emu/debug/dvmemory.h b/src/emu/debug/dvmemory.h
index 2436b1a6199..66aac33e8f3 100644
--- a/src/emu/debug/dvmemory.h
+++ b/src/emu/debug/dvmemory.h
@@ -60,13 +60,13 @@ public:
address_space *space() const { return m_space; }
private:
- address_space *m_space; // address space we reference (if any)
- device_memory_interface *m_memintf; // pointer to the memory interface of the device
- void * m_base; // pointer to memory base
- offs_t m_length; // length of memory
- offs_t m_offsetxor; // XOR to apply to offsets
- endianness_t m_endianness; // endianness of memory
- UINT8 m_prefsize; // preferred bytes per chunk
+ address_space *m_space; // address space we reference (if any)
+ device_memory_interface *m_memintf; // pointer to the memory interface of the device
+ void * m_base; // pointer to memory base
+ offs_t m_length; // length of memory
+ offs_t m_offsetxor; // XOR to apply to offsets
+ endianness_t m_endianness; // endianness of memory
+ UINT8 m_prefsize; // preferred bytes per chunk
};
@@ -126,31 +126,31 @@ private:
void write(UINT8 size, offs_t offs, UINT64 data);
// internal state
- debug_view_expression m_expression; // expression describing the start address
- UINT32 m_chunks_per_row; // number of chunks displayed per line
- UINT8 m_bytes_per_chunk; // bytes per chunk
- bool m_reverse_view; // reverse-endian view?
- bool m_ascii_view; // display ASCII characters?
- bool m_no_translation; // don't run addresses through the cpu translation hook
- offs_t m_maxaddr; // (derived) maximum address to display
- UINT32 m_bytes_per_row; // (derived) number of bytes displayed per line
- UINT32 m_byte_offset; // (derived) offset of starting visible byte
- astring m_addrformat; // (derived) format string to use to print addresses
+ debug_view_expression m_expression; // expression describing the start address
+ UINT32 m_chunks_per_row; // number of chunks displayed per line
+ UINT8 m_bytes_per_chunk; // bytes per chunk
+ bool m_reverse_view; // reverse-endian view?
+ bool m_ascii_view; // display ASCII characters?
+ bool m_no_translation; // don't run addresses through the cpu translation hook
+ offs_t m_maxaddr; // (derived) maximum address to display
+ UINT32 m_bytes_per_row; // (derived) number of bytes displayed per line
+ UINT32 m_byte_offset; // (derived) offset of starting visible byte
+ astring m_addrformat; // (derived) format string to use to print addresses
struct section
{
bool contains(int x) const { return x >= m_pos && x < m_pos + m_width; }
- INT32 m_pos; /* starting position */
- INT32 m_width; /* width of this section */
+ INT32 m_pos; /* starting position */
+ INT32 m_width; /* width of this section */
};
- section m_section[3]; // (derived) 3 sections to manage
+ section m_section[3]; // (derived) 3 sections to manage
struct memory_view_pos
{
- UINT8 m_spacing; /* spacing between each entry */
- UINT8 m_shift[24]; /* shift for each character */
+ UINT8 m_spacing; /* spacing between each entry */
+ UINT8 m_shift[24]; /* shift for each character */
};
- static const memory_view_pos s_memory_pos_table[9]; // table for rendering at different chunk sizes
+ static const memory_view_pos s_memory_pos_table[9]; // table for rendering at different chunk sizes
// constants
static const int MEM_MAX_LINE_WIDTH = 1024;
diff --git a/src/emu/debug/dvstate.c b/src/emu/debug/dvstate.c
index 4882e7a9006..fafaefaa842 100644
--- a/src/emu/debug/dvstate.c
+++ b/src/emu/debug/dvstate.c
@@ -53,9 +53,9 @@
debug_view_state_source::debug_view_state_source(const char *name, device_t &device)
: debug_view_source(name, &device),
- m_device(device),
- m_stateintf(dynamic_cast<device_state_interface *>(&device)),
- m_execintf(dynamic_cast<device_execute_interface *>(&device))
+ m_device(device),
+ m_stateintf(dynamic_cast<device_state_interface *>(&device)),
+ m_execintf(dynamic_cast<device_execute_interface *>(&device))
{
}
@@ -71,9 +71,9 @@ debug_view_state_source::debug_view_state_source(const char *name, device_t &dev
debug_view_state::debug_view_state(running_machine &machine, debug_view_osd_update_func osdupdate, void *osdprivate)
: debug_view(machine, DVT_STATE, osdupdate, osdprivate),
- m_divider(0),
- m_last_update(0),
- m_state_list(NULL)
+ m_divider(0),
+ m_last_update(0),
+ m_state_list(NULL)
{
// fail if no available sources
enumerate_sources();
@@ -361,10 +361,10 @@ void debug_view_state::view_update()
debug_view_state::state_item::state_item(int index, const char *name, UINT8 valuechars)
: m_next(NULL),
- m_lastval(0),
- m_currval(0),
- m_index(index),
- m_vallen(valuechars),
- m_symbol(name)
+ m_lastval(0),
+ m_currval(0),
+ m_index(index),
+ m_vallen(valuechars),
+ m_symbol(name)
{
}
diff --git a/src/emu/debug/dvstate.h b/src/emu/debug/dvstate.h
index 406ce2c35c6..f47f51c5141 100644
--- a/src/emu/debug/dvstate.h
+++ b/src/emu/debug/dvstate.h
@@ -61,9 +61,9 @@ public:
private:
// internal state
- device_t & m_device; // underlying device
- device_state_interface *m_stateintf; // state interface
- device_execute_interface *m_execintf; // execution interface
+ device_t & m_device; // underlying device
+ device_state_interface *m_stateintf; // state interface
+ device_execute_interface *m_execintf; // execution interface
};
@@ -87,12 +87,12 @@ private:
{
state_item(int index, const char *name, UINT8 valuechars);
- state_item * m_next; // next item
- UINT64 m_lastval; // last value
- UINT64 m_currval; // current value
- int m_index; // index
- UINT8 m_vallen; // number of value chars
- astring m_symbol; // symbol
+ state_item * m_next; // next item
+ UINT64 m_lastval; // last value
+ UINT64 m_currval; // current value
+ int m_index; // index
+ UINT8 m_vallen; // number of value chars
+ astring m_symbol; // symbol
};
// internal helpers
@@ -101,16 +101,16 @@ private:
void recompute();
// internal state
- int m_divider; // dividing column
- UINT64 m_last_update; // execution counter at last update
- state_item * m_state_list; // state data
+ int m_divider; // dividing column
+ UINT64 m_last_update; // execution counter at last update
+ state_item * m_state_list; // state data
// constants
- static const int REG_DIVIDER = -10;
- static const int REG_CYCLES = -11;
- static const int REG_BEAMX = -12;
- static const int REG_BEAMY = -13;
- static const int REG_FRAME = -14;
+ static const int REG_DIVIDER = -10;
+ static const int REG_CYCLES = -11;
+ static const int REG_BEAMX = -12;
+ static const int REG_BEAMY = -13;
+ static const int REG_FRAME = -14;
};
diff --git a/src/emu/debug/dvtext.c b/src/emu/debug/dvtext.c
index 8e42b182f86..d8b216a19cb 100644
--- a/src/emu/debug/dvtext.c
+++ b/src/emu/debug/dvtext.c
@@ -54,9 +54,9 @@
debug_view_textbuf::debug_view_textbuf(running_machine &machine, debug_view_type type, debug_view_osd_update_func osdupdate, void *osdprivate, text_buffer &textbuf)
: debug_view(machine, type, osdupdate, osdprivate),
- m_textbuf(textbuf),
- m_at_bottom(true),
- m_topseq(0)
+ m_textbuf(textbuf),
+ m_at_bottom(true),
+ m_topseq(0)
{
}
diff --git a/src/emu/debug/dvtext.h b/src/emu/debug/dvtext.h
index dcaa02eaa74..d46db988701 100644
--- a/src/emu/debug/dvtext.h
+++ b/src/emu/debug/dvtext.h
@@ -65,9 +65,9 @@ protected:
private:
// internal state
- text_buffer & m_textbuf; /* pointer to the text buffer */
- bool m_at_bottom; /* are we tracking new stuff being added? */
- UINT32 m_topseq; /* sequence number of the top line */
+ text_buffer & m_textbuf; /* pointer to the text buffer */
+ bool m_at_bottom; /* are we tracking new stuff being added? */
+ UINT32 m_topseq; /* sequence number of the top line */
};
diff --git a/src/emu/debug/express.c b/src/emu/debug/express.c
index b9a0b15276f..196ce062f6f 100644
--- a/src/emu/debug/express.c
+++ b/src/emu/debug/express.c
@@ -68,7 +68,7 @@
DEBUGGING
***************************************************************************/
-#define DEBUG_TOKENS 0
+#define DEBUG_TOKENS 0
@@ -77,7 +77,7 @@
***************************************************************************/
#ifndef DEFAULT_BASE
-#define DEFAULT_BASE 16 // hex unless otherwise specified
+#define DEFAULT_BASE 16 // hex unless otherwise specified
#endif
@@ -156,9 +156,9 @@ private:
static void internal_setter(symbol_table &table, void *symref, UINT64 value);
// internal state
- symbol_table::getter_func m_getter;
- symbol_table::setter_func m_setter;
- UINT64 m_value;
+ symbol_table::getter_func m_getter;
+ symbol_table::setter_func m_setter;
+ UINT64 m_value;
};
@@ -179,9 +179,9 @@ public:
private:
// internal state
- UINT16 m_minparams;
- UINT16 m_maxparams;
- symbol_table::execute_func m_execute;
+ UINT16 m_minparams;
+ UINT16 m_maxparams;
+ symbol_table::execute_func m_execute;
};
@@ -199,26 +199,26 @@ const char *expression_error::code_string() const
{
switch (m_code)
{
- case NOT_LVAL: return "not an lvalue";
- case NOT_RVAL: return "not an rvalue";
- case SYNTAX: return "syntax error";
- case UNKNOWN_SYMBOL: return "unknown symbol";
- case INVALID_NUMBER: return "invalid number";
- case INVALID_TOKEN: return "invalid token";
- case STACK_OVERFLOW: return "stack overflow";
- case STACK_UNDERFLOW: return "stack underflow";
- case UNBALANCED_PARENS: return "unbalanced parentheses";
- case DIVIDE_BY_ZERO: return "divide by zero";
- case OUT_OF_MEMORY: return "out of memory";
- case INVALID_PARAM_COUNT: return "invalid number of parameters";
- case UNBALANCED_QUOTES: return "unbalanced quotes";
- case TOO_MANY_STRINGS: return "too many strings";
- case INVALID_MEMORY_SIZE: return "invalid memory size (b/w/d/q expected)";
- case NO_SUCH_MEMORY_SPACE: return "non-existent memory space";
- case INVALID_MEMORY_SPACE: return "invalid memory space (p/d/i/o/r/m expected)";
- case INVALID_MEMORY_NAME: return "invalid memory name";
- case MISSING_MEMORY_NAME: return "missing memory name";
- default: return "unknown error";
+ case NOT_LVAL: return "not an lvalue";
+ case NOT_RVAL: return "not an rvalue";
+ case SYNTAX: return "syntax error";
+ case UNKNOWN_SYMBOL: return "unknown symbol";
+ case INVALID_NUMBER: return "invalid number";
+ case INVALID_TOKEN: return "invalid token";
+ case STACK_OVERFLOW: return "stack overflow";
+ case STACK_UNDERFLOW: return "stack underflow";
+ case UNBALANCED_PARENS: return "unbalanced parentheses";
+ case DIVIDE_BY_ZERO: return "divide by zero";
+ case OUT_OF_MEMORY: return "out of memory";
+ case INVALID_PARAM_COUNT: return "invalid number of parameters";
+ case UNBALANCED_QUOTES: return "unbalanced quotes";
+ case TOO_MANY_STRINGS: return "too many strings";
+ case INVALID_MEMORY_SIZE: return "invalid memory size (b/w/d/q expected)";
+ case NO_SUCH_MEMORY_SPACE: return "non-existent memory space";
+ case INVALID_MEMORY_SPACE: return "invalid memory space (p/d/i/o/r/m expected)";
+ case INVALID_MEMORY_NAME: return "invalid memory name";
+ case MISSING_MEMORY_NAME: return "missing memory name";
+ default: return "unknown error";
}
}
@@ -234,10 +234,10 @@ const char *expression_error::code_string() const
symbol_entry::symbol_entry(symbol_table &table, symbol_type type, const char *name, void *ref)
: m_next(NULL),
- m_table(table),
- m_type(type),
- m_name(name),
- m_ref(ref)
+ m_table(table),
+ m_type(type),
+ m_name(name),
+ m_ref(ref)
{
}
@@ -262,27 +262,27 @@ symbol_entry::~symbol_entry()
integer_symbol_entry::integer_symbol_entry(symbol_table &table, const char *name, symbol_table::read_write rw, UINT64 *ptr)
: symbol_entry(table, SMT_INTEGER, name, (ptr == NULL) ? &m_value : ptr),
- m_getter(internal_getter),
- m_setter((rw == symbol_table::READ_ONLY) ? NULL : internal_setter),
- m_value(0)
+ m_getter(internal_getter),
+ m_setter((rw == symbol_table::READ_ONLY) ? NULL : internal_setter),
+ m_value(0)
{
}
integer_symbol_entry::integer_symbol_entry(symbol_table &table, const char *name, UINT64 constval)
: symbol_entry(table, SMT_INTEGER, name, &m_value),
- m_getter(internal_getter),
- m_setter(NULL),
- m_value(constval)
+ m_getter(internal_getter),
+ m_setter(NULL),
+ m_value(constval)
{
}
integer_symbol_entry::integer_symbol_entry(symbol_table &table, const char *name, void *ref, symbol_table::getter_func getter, symbol_table::setter_func setter)
: symbol_entry(table, SMT_INTEGER, name, ref),
- m_getter(getter),
- m_setter(setter),
- m_value(0)
+ m_getter(getter),
+ m_setter(setter),
+ m_value(0)
{
}
@@ -353,9 +353,9 @@ void integer_symbol_entry::internal_setter(symbol_table &table, void *symref, UI
function_symbol_entry::function_symbol_entry(symbol_table &table, const char *name, void *ref, int minparams, int maxparams, symbol_table::execute_func execute)
: symbol_entry(table, SMT_FUNCTION, name, ref),
- m_minparams(minparams),
- m_maxparams(maxparams),
- m_execute(execute)
+ m_minparams(minparams),
+ m_maxparams(maxparams),
+ m_execute(execute)
{
}
@@ -415,11 +415,11 @@ UINT64 function_symbol_entry::execute(int numparams, const UINT64 *paramlist)
symbol_table::symbol_table(void *globalref, symbol_table *parent)
: m_parent(parent),
- m_globalref(globalref),
- m_memory_param(NULL),
- m_memory_valid(NULL),
- m_memory_read(NULL),
- m_memory_write(NULL)
+ m_globalref(globalref),
+ m_memory_param(NULL),
+ m_memory_valid(NULL),
+ m_memory_read(NULL),
+ m_memory_write(NULL)
{
}
@@ -669,51 +669,51 @@ void parsed_expression::print_tokens(FILE *out)
case parse_token::OPERATOR:
switch (token->value.i)
{
- case TVL_LPAREN: fprintf(out, "(\n"); break;
- case TVL_RPAREN: fprintf(out, ")\n"); break;
- case TVL_PLUSPLUS: fprintf(out, "++ (unspecified)\n"); break;
- case TVL_MINUSMINUS: fprintf(out, "-- (unspecified)\n"); break;
- case TVL_PREINCREMENT: fprintf(out, "++ (prefix)\n"); break;
- case TVL_PREDECREMENT: fprintf(out, "-- (prefix)\n"); break;
- case TVL_POSTINCREMENT: fprintf(out, "++ (postfix)\n"); break;
- case TVL_POSTDECREMENT: fprintf(out, "-- (postfix)\n"); break;
- case TVL_COMPLEMENT: fprintf(out, "!\n"); break;
- case TVL_NOT: fprintf(out, "~\n"); break;
- case TVL_UPLUS: fprintf(out, "+ (unary)\n"); break;
- case TVL_UMINUS: fprintf(out, "- (unary)\n"); break;
- case TVL_MULTIPLY: fprintf(out, "*\n"); break;
- case TVL_DIVIDE: fprintf(out, "/\n"); break;
- case TVL_MODULO: fprintf(out, "%%\n"); break;
- case TVL_ADD: fprintf(out, "+\n"); break;
- case TVL_SUBTRACT: fprintf(out, "-\n"); break;
- case TVL_LSHIFT: fprintf(out, "<<\n"); break;
- case TVL_RSHIFT: fprintf(out, ">>\n"); break;
- case TVL_LESS: fprintf(out, "<\n"); break;
- case TVL_LESSOREQUAL: fprintf(out, "<=\n"); break;
- case TVL_GREATER: fprintf(out, ">\n"); break;
- case TVL_GREATEROREQUAL:fprintf(out, ">=\n"); break;
- case TVL_EQUAL: fprintf(out, "==\n"); break;
- case TVL_NOTEQUAL: fprintf(out, "!=\n"); break;
- case TVL_BAND: fprintf(out, "&\n"); break;
- case TVL_BXOR: fprintf(out, "^\n"); break;
- case TVL_BOR: fprintf(out, "|\n"); break;
- case TVL_LAND: fprintf(out, "&&\n"); break;
- case TVL_LOR: fprintf(out, "||\n"); break;
- case TVL_ASSIGN: fprintf(out, "=\n"); break;
- case TVL_ASSIGNMULTIPLY:fprintf(out, "*=\n"); break;
- case TVL_ASSIGNDIVIDE: fprintf(out, "/=\n"); break;
- case TVL_ASSIGNMODULO: fprintf(out, "%%=\n"); break;
- case TVL_ASSIGNADD: fprintf(out, "+=\n"); break;
- case TVL_ASSIGNSUBTRACT:fprintf(out, "-=\n"); break;
- case TVL_ASSIGNLSHIFT: fprintf(out, "<<=\n"); break;
- case TVL_ASSIGNRSHIFT: fprintf(out, ">>=\n"); break;
- case TVL_ASSIGNBAND: fprintf(out, "&=\n"); break;
- case TVL_ASSIGNBXOR: fprintf(out, "^=\n"); break;
- case TVL_ASSIGNBOR: fprintf(out, "|=\n"); break;
- case TVL_COMMA: fprintf(out, ",\n"); break;
- case TVL_MEMORYAT: fprintf(out, "mem@\n"); break;
- case TVL_EXECUTEFUNC: fprintf(out, "execute\n"); break;
- default: fprintf(out, "INVALID OPERATOR\n"); break;
+ case TVL_LPAREN: fprintf(out, "(\n"); break;
+ case TVL_RPAREN: fprintf(out, ")\n"); break;
+ case TVL_PLUSPLUS: fprintf(out, "++ (unspecified)\n"); break;
+ case TVL_MINUSMINUS: fprintf(out, "-- (unspecified)\n"); break;
+ case TVL_PREINCREMENT: fprintf(out, "++ (prefix)\n"); break;
+ case TVL_PREDECREMENT: fprintf(out, "-- (prefix)\n"); break;
+ case TVL_POSTINCREMENT: fprintf(out, "++ (postfix)\n"); break;
+ case TVL_POSTDECREMENT: fprintf(out, "-- (postfix)\n"); break;
+ case TVL_COMPLEMENT: fprintf(out, "!\n"); break;
+ case TVL_NOT: fprintf(out, "~\n"); break;
+ case TVL_UPLUS: fprintf(out, "+ (unary)\n"); break;
+ case TVL_UMINUS: fprintf(out, "- (unary)\n"); break;
+ case TVL_MULTIPLY: fprintf(out, "*\n"); break;
+ case TVL_DIVIDE: fprintf(out, "/\n"); break;
+ case TVL_MODULO: fprintf(out, "%%\n"); break;
+ case TVL_ADD: fprintf(out, "+\n"); break;
+ case TVL_SUBTRACT: fprintf(out, "-\n"); break;
+ case TVL_LSHIFT: fprintf(out, "<<\n"); break;
+ case TVL_RSHIFT: fprintf(out, ">>\n"); break;
+ case TVL_LESS: fprintf(out, "<\n"); break;
+ case TVL_LESSOREQUAL: fprintf(out, "<=\n"); break;
+ case TVL_GREATER: fprintf(out, ">\n"); break;
+ case TVL_GREATEROREQUAL:fprintf(out, ">=\n"); break;
+ case TVL_EQUAL: fprintf(out, "==\n"); break;
+ case TVL_NOTEQUAL: fprintf(out, "!=\n"); break;
+ case TVL_BAND: fprintf(out, "&\n"); break;
+ case TVL_BXOR: fprintf(out, "^\n"); break;
+ case TVL_BOR: fprintf(out, "|\n"); break;
+ case TVL_LAND: fprintf(out, "&&\n"); break;
+ case TVL_LOR: fprintf(out, "||\n"); break;
+ case TVL_ASSIGN: fprintf(out, "=\n"); break;
+ case TVL_ASSIGNMULTIPLY:fprintf(out, "*=\n"); break;
+ case TVL_ASSIGNDIVIDE: fprintf(out, "/=\n"); break;
+ case TVL_ASSIGNMODULO: fprintf(out, "%%=\n"); break;
+ case TVL_ASSIGNADD: fprintf(out, "+=\n"); break;
+ case TVL_ASSIGNSUBTRACT:fprintf(out, "-=\n"); break;
+ case TVL_ASSIGNLSHIFT: fprintf(out, "<<=\n"); break;
+ case TVL_ASSIGNRSHIFT: fprintf(out, ">>=\n"); break;
+ case TVL_ASSIGNBAND: fprintf(out, "&=\n"); break;
+ case TVL_ASSIGNBXOR: fprintf(out, "^=\n"); break;
+ case TVL_ASSIGNBOR: fprintf(out, "|=\n"); break;
+ case TVL_COMMA: fprintf(out, ",\n"); break;
+ case TVL_MEMORYAT: fprintf(out, "mem@\n"); break;
+ case TVL_EXECUTEFUNC: fprintf(out, "execute\n"); break;
+ default: fprintf(out, "INVALID OPERATOR\n"); break;
}
break;
}
@@ -1136,25 +1136,25 @@ void parsed_expression::parse_memory_operator(parse_token &token, const char *st
expression_space memspace = EXPSPACE_INVALID;
switch (space)
{
- case 'p': memspace = physical ? EXPSPACE_PROGRAM_PHYSICAL : EXPSPACE_PROGRAM_LOGICAL; break;
- case 'd': memspace = physical ? EXPSPACE_DATA_PHYSICAL : EXPSPACE_DATA_LOGICAL; break;
- case 'i': memspace = physical ? EXPSPACE_IO_PHYSICAL : EXPSPACE_IO_LOGICAL; break;
- case '3': memspace = physical ? EXPSPACE_SPACE3_PHYSICAL : EXPSPACE_SPACE3_LOGICAL; break;
- case 'o': memspace = EXPSPACE_OPCODE; break;
- case 'r': memspace = EXPSPACE_RAMWRITE; break;
- case 'm': memspace = EXPSPACE_REGION; break;
- default: throw expression_error(expression_error::INVALID_MEMORY_SPACE, token.offset() + (string - startstring));
+ case 'p': memspace = physical ? EXPSPACE_PROGRAM_PHYSICAL : EXPSPACE_PROGRAM_LOGICAL; break;
+ case 'd': memspace = physical ? EXPSPACE_DATA_PHYSICAL : EXPSPACE_DATA_LOGICAL; break;
+ case 'i': memspace = physical ? EXPSPACE_IO_PHYSICAL : EXPSPACE_IO_LOGICAL; break;
+ case '3': memspace = physical ? EXPSPACE_SPACE3_PHYSICAL : EXPSPACE_SPACE3_LOGICAL; break;
+ case 'o': memspace = EXPSPACE_OPCODE; break;
+ case 'r': memspace = EXPSPACE_RAMWRITE; break;
+ case 'm': memspace = EXPSPACE_REGION; break;
+ default: throw expression_error(expression_error::INVALID_MEMORY_SPACE, token.offset() + (string - startstring));
}
// convert the size to flags
int memsize;
switch (size)
{
- case 'b': memsize = 0; break;
- case 'w': memsize = 1; break;
- case 'd': memsize = 2; break;
- case 'q': memsize = 3; break;
- default: throw expression_error(expression_error::INVALID_MEMORY_SIZE, token.offset() + (string - startstring) + length - 1);
+ case 'b': memsize = 0; break;
+ case 'w': memsize = 1; break;
+ case 'd': memsize = 2; break;
+ case 'q': memsize = 3; break;
+ default: throw expression_error(expression_error::INVALID_MEMORY_SIZE, token.offset() + (string - startstring) + length - 1);
}
// validate the name
@@ -1210,7 +1210,7 @@ void parsed_expression::normalize_operator(parse_token *prevtoken, parse_token &
case TVL_ADD:
case TVL_SUBTRACT:
// Assume we're unary if we are the first token, or if the previous token is not
- // a symbol, a number, or a right parenthesis
+ // a symbol, a number, or a right parenthesis
if (prevtoken == NULL || (!prevtoken->is_symbol() && !prevtoken->is_number() && !prevtoken->is_operator(TVL_RPAREN)))
thistoken.configure_operator(thistoken.is_operator(TVL_ADD) ? TVL_UPLUS : TVL_UMINUS, 2);
break;
@@ -1268,8 +1268,8 @@ void parsed_expression::infix_to_postfix()
stack.prepend(*token);
// if the token is a closing parenthesis, pop all operators until we
- // reach an opening parenthesis and append them to the result string,
- // discaring the open parenthesis
+ // reach an opening parenthesis and append them to the result string,
+ // discaring the open parenthesis
else if (token->is_operator(TVL_RPAREN))
{
// loop until we find our matching opener
@@ -1291,8 +1291,8 @@ void parsed_expression::infix_to_postfix()
}
// if the token is an operator, pop operators until we reach an opening parenthesis,
- // an operator of lower precedence, or a right associative symbol of equal precedence.
- // Push the operator onto the stack.
+ // an operator of lower precedence, or a right associative symbol of equal precedence.
+ // Push the operator onto the stack.
else
{
int our_precedence = token->precedence();
@@ -1687,12 +1687,12 @@ UINT64 parsed_expression::execute_tokens()
parsed_expression::parse_token::parse_token(int offset)
: m_next(NULL),
- m_type(INVALID),
- m_offset(offset),
- m_value(0),
- m_flags(0),
- m_string(NULL),
- m_symbol(NULL)
+ m_type(INVALID),
+ m_offset(offset),
+ m_value(0),
+ m_flags(0),
+ m_string(NULL),
+ m_symbol(NULL)
{
}
diff --git a/src/emu/debug/express.h b/src/emu/debug/express.h
index 8b348c67ef0..f1c0d189a3b 100644
--- a/src/emu/debug/express.h
+++ b/src/emu/debug/express.h
@@ -110,7 +110,7 @@ public:
// construction/destruction
expression_error(error_code code, int offset = 0)
: m_code(code),
- m_offset(offset) { }
+ m_offset(offset) { }
// operators
operator error_code() const { return m_code; }
@@ -122,8 +122,8 @@ public:
private:
// internal state
- error_code m_code;
- int m_offset;
+ error_code m_code;
+ int m_offset;
};
@@ -161,11 +161,11 @@ public:
protected:
// internal state
- symbol_entry * m_next; // link to next entry
- symbol_table & m_table; // pointer back to the owning table
- symbol_type m_type; // type of symbol
- astring m_name; // name of the symbol
- void * m_ref; // internal reference
+ symbol_entry * m_next; // link to next entry
+ symbol_table & m_table; // pointer back to the owning table
+ symbol_type m_type; // type of symbol
+ astring m_name; // name of the symbol
+ void * m_ref; // internal reference
};
@@ -224,13 +224,13 @@ public:
private:
// internal state
- symbol_table * m_parent; // pointer to the parent symbol table
- void * m_globalref; // global reference parameter
- tagged_list<symbol_entry> m_symlist; // list of symbols
- void * m_memory_param; // callback parameter for memory
- valid_func m_memory_valid; // validation callback
- read_func m_memory_read; // read callback
- write_func m_memory_write; // write callback
+ symbol_table * m_parent; // pointer to the parent symbol table
+ void * m_globalref; // global reference parameter
+ tagged_list<symbol_entry> m_symlist; // list of symbols
+ void * m_memory_param; // callback parameter for memory
+ valid_func m_memory_valid; // validation callback
+ read_func m_memory_read; // read callback
+ write_func m_memory_write; // write callback
};
@@ -269,18 +269,18 @@ private:
// operator flags
enum
{
- TIN_OPTYPE_SHIFT = 0, // 8 bits (0-7)
- TIN_OPTYPE_MASK = 0xff << TIN_OPTYPE_SHIFT,
- TIN_RIGHT_TO_LEFT_SHIFT = 16, // 1 bit (16)
- TIN_RIGHT_TO_LEFT_MASK = 1 << TIN_RIGHT_TO_LEFT_SHIFT,
- TIN_FUNCTION_SHIFT = 17, // 1 bit (17)
- TIN_FUNCTION_MASK = 1 << TIN_FUNCTION_SHIFT,
- TIN_MEMORY_SIZE_SHIFT = 18, // 2 bits (18-19)
- TIN_MEMORY_SIZE_MASK = 3 << TIN_MEMORY_SIZE_SHIFT,
- TIN_MEMORY_SPACE_SHIFT = 20, // 4 bits (20-23)
- TIN_MEMORY_SPACE_MASK = 0xf << TIN_MEMORY_SPACE_SHIFT,
- TIN_PRECEDENCE_SHIFT = 24, // 8 bits (24-31)
- TIN_PRECEDENCE_MASK = 0xff << TIN_PRECEDENCE_SHIFT
+ TIN_OPTYPE_SHIFT = 0, // 8 bits (0-7)
+ TIN_OPTYPE_MASK = 0xff << TIN_OPTYPE_SHIFT,
+ TIN_RIGHT_TO_LEFT_SHIFT = 16, // 1 bit (16)
+ TIN_RIGHT_TO_LEFT_MASK = 1 << TIN_RIGHT_TO_LEFT_SHIFT,
+ TIN_FUNCTION_SHIFT = 17, // 1 bit (17)
+ TIN_FUNCTION_MASK = 1 << TIN_FUNCTION_SHIFT,
+ TIN_MEMORY_SIZE_SHIFT = 18, // 2 bits (18-19)
+ TIN_MEMORY_SIZE_MASK = 3 << TIN_MEMORY_SIZE_SHIFT,
+ TIN_MEMORY_SPACE_SHIFT = 20, // 4 bits (20-23)
+ TIN_MEMORY_SPACE_MASK = 0xf << TIN_MEMORY_SPACE_SHIFT,
+ TIN_PRECEDENCE_SHIFT = 24, // 8 bits (24-31)
+ TIN_PRECEDENCE_MASK = 0xff << TIN_PRECEDENCE_SHIFT
};
// types of tokens
@@ -343,13 +343,13 @@ private:
private:
// internal state
- parse_token * m_next; // next token in list
- token_type m_type; // type of token
- int m_offset; // offset within the string
- UINT64 m_value; // integral value
- UINT32 m_flags; // additional flags/info
- const char * m_string; // associated string
- symbol_entry * m_symbol; // symbol pointer
+ parse_token * m_next; // next token in list
+ token_type m_type; // type of token
+ int m_offset; // offset within the string
+ UINT64 m_value; // integral value
+ UINT32 m_flags; // additional flags/info
+ const char * m_string; // associated string
+ symbol_entry * m_symbol; // symbol pointer
};
// an expression_string holds an indexed string parsed from the expression
@@ -361,7 +361,7 @@ private:
// construction/destruction
expression_string(const char *string, int length = 0)
: m_next(NULL),
- m_string(string, (length == 0) ? strlen(string) : length) { }
+ m_string(string, (length == 0) ? strlen(string) : length) { }
// operators
operator const char *() { return m_string; }
@@ -369,8 +369,8 @@ private:
private:
// internal state
- expression_string * m_next; // next string in list
- astring m_string; // copy of the string
+ expression_string * m_next; // next string in list
+ astring m_string; // copy of the string
};
// internal helpers
@@ -401,12 +401,12 @@ private:
static const int MAX_STACK_DEPTH = 16;
// internal state
- symbol_table * m_symtable; // symbol table
- astring m_original_string; // original string (prior to parsing)
- simple_list<parse_token> m_tokenlist; // token list
- simple_list<expression_string> m_stringlist; // string list
- int m_token_stack_ptr; // stack pointer (used during execution)
- parse_token m_token_stack[MAX_STACK_DEPTH]; // token stack (used during execution)
+ symbol_table * m_symtable; // symbol table
+ astring m_original_string; // original string (prior to parsing)
+ simple_list<parse_token> m_tokenlist; // token list
+ simple_list<expression_string> m_stringlist; // string list
+ int m_token_stack_ptr; // stack pointer (used during execution)
+ parse_token m_token_stack[MAX_STACK_DEPTH]; // token stack (used during execution)
};
diff --git a/src/emu/debug/textbuf.c b/src/emu/debug/textbuf.c
index 0721c75327f..4551de4e6cb 100644
--- a/src/emu/debug/textbuf.c
+++ b/src/emu/debug/textbuf.c
@@ -18,7 +18,7 @@
CONSTANTS
***************************************************************************/
-#define MAX_LINE_LENGTH 250
+#define MAX_LINE_LENGTH 250
@@ -28,16 +28,16 @@
struct text_buffer
{
- char * buffer;
- INT32 * lineoffs;
- INT32 bufsize;
- INT32 bufstart;
- INT32 bufend;
- INT32 linesize;
- INT32 linestart;
- INT32 lineend;
- UINT32 linestartseq;
- INT32 maxwidth;
+ char * buffer;
+ INT32 * lineoffs;
+ INT32 bufsize;
+ INT32 bufstart;
+ INT32 bufend;
+ INT32 linesize;
+ INT32 linestart;
+ INT32 lineend;
+ UINT32 linestartseq;
+ INT32 maxwidth;
};
diff --git a/src/emu/debug/textbuf.h b/src/emu/debug/textbuf.h
index 86b66caa952..151a9b0c06c 100644
--- a/src/emu/debug/textbuf.h
+++ b/src/emu/debug/textbuf.h
@@ -53,4 +53,4 @@ UINT32 text_buffer_line_index_to_seqnum(text_buffer *text, UINT32 index);
const char *text_buffer_get_seqnum_line(text_buffer *text, UINT32 seqnum);
-#endif /* __TEXTBUF_H__ */
+#endif /* __TEXTBUF_H__ */
diff --git a/src/emu/debugger.c b/src/emu/debugger.c
index 313da918570..a89d0328120 100644
--- a/src/emu/debugger.c
+++ b/src/emu/debugger.c
@@ -28,8 +28,8 @@
struct machine_entry
{
- machine_entry * next;
- running_machine * machine;
+ machine_entry * next;
+ running_machine * machine;
};
diff --git a/src/emu/debugger.h b/src/emu/debugger.h
index 6b2978974eb..14d07835d90 100644
--- a/src/emu/debugger.h
+++ b/src/emu/debugger.h
@@ -137,4 +137,4 @@ INLINE int debugger_within_instruction_hook(running_machine &machine)
}
-#endif /* __DEBUGGER_H__ */
+#endif /* __DEBUGGER_H__ */
diff --git a/src/emu/debugint/debugint.c b/src/emu/debugint/debugint.c
index a47038ffbf2..652e991c2f8 100644
--- a/src/emu/debugint/debugint.c
+++ b/src/emu/debugint/debugint.c
@@ -45,11 +45,11 @@ enum
enum
{
- VIEW_STATE_BUTTON = 0x01,
- VIEW_STATE_MOVING = 0x02,
- VIEW_STATE_SIZING = 0x04,
- VIEW_STATE_NEEDS_UPDATE = 0x08,
- VIEW_STATE_FOLLOW_CPU = 0x10,
+ VIEW_STATE_BUTTON = 0x01,
+ VIEW_STATE_MOVING = 0x02,
+ VIEW_STATE_SIZING = 0x04,
+ VIEW_STATE_NEEDS_UPDATE = 0x08,
+ VIEW_STATE_FOLLOW_CPU = 0x10,
};
/***************************************************************************
@@ -110,13 +110,13 @@ enum
struct adjustment
{
- int visible;
- int lower;
- int upper;
- int value;
- int step_increment;
- int page_increment;
- int page_size;
+ int visible;
+ int lower;
+ int upper;
+ int value;
+ int step_increment;
+ int page_increment;
+ int page_size;
};
class DView;
@@ -130,9 +130,9 @@ public:
{ }
~DView_edit()
{ }
- int active;
- render_container * container;
- astring str;
+ int active;
+ render_container * container;
+ astring str;
};
/***************************************************************************
@@ -149,11 +149,11 @@ class DView
public:
DView(render_target *target, running_machine &machine, debug_view_type type, int flags)
: next(NULL),
- type(0),
- state(0),
- ofs_x(0),
- ofs_y(0)
- {
+ type(0),
+ state(0),
+ ofs_x(0),
+ ofs_y(0)
+ {
this->target = target;
//dv->container = render_target_get_component_container(target, name, &pos);
this->container = target->debug_alloc();
@@ -176,7 +176,7 @@ public:
default:
break;
}
- }
+ }
~DView()
{
this->target->debug_free(*this->container);
@@ -185,29 +185,29 @@ public:
running_machine &machine() const { assert(m_machine != NULL); return *m_machine; }
- DView * next;
+ DView * next;
- int type;
- debug_view * view;
- render_container * container;
- render_target * target;
- running_machine * m_machine;
- int state;
+ int type;
+ debug_view * view;
+ render_container * container;
+ render_target * target;
+ running_machine * m_machine;
+ int state;
// drawing
- rectangle bounds;
- int ofs_x;
- int ofs_y;
- astring title;
- int last_x;
- int last_y;
+ rectangle bounds;
+ int ofs_x;
+ int ofs_y;
+ astring title;
+ int last_x;
+ int last_y;
// Scrollbars
- adjustment hsb;
- adjustment vsb;
+ adjustment hsb;
+ adjustment vsb;
// render target tracking
- INT32 rt_width;
- INT32 rt_height;
+ INT32 rt_width;
+ INT32 rt_height;
//optional
- DView_edit editor;
+ DView_edit editor;
};
@@ -237,15 +237,15 @@ INLINE void dview_set_state(DView *dv, int state, int onoff)
LOCAL VARIABLES
***************************************************************************/
-static render_font * debug_font;
-static int debug_font_width;
-static int debug_font_height;
-static float debug_font_aspect;
-static DView * list;
-static DView * focus_view;
+static render_font * debug_font;
+static int debug_font_width;
+static int debug_font_height;
+static float debug_font_aspect;
+static DView * list;
+static DView * focus_view;
-static ui_menu * menu;
-static DView_edit * cur_editor;
+static ui_menu * menu;
+static DView_edit * cur_editor;
static void set_focus_view(DView *dv)
{
@@ -1058,10 +1058,10 @@ static void on_view_opcodes_activate(DView *dv, const ui_menu_event *event)
{
switch (rc)
{
- case DASM_RIGHTCOL_RAW: new_rc = DASM_RIGHTCOL_ENCRYPTED; break;
- case DASM_RIGHTCOL_ENCRYPTED: new_rc = DASM_RIGHTCOL_COMMENTS; break;
- case DASM_RIGHTCOL_COMMENTS: new_rc = DASM_RIGHTCOL_RAW; break;
- default: break;
+ case DASM_RIGHTCOL_RAW: new_rc = DASM_RIGHTCOL_ENCRYPTED; break;
+ case DASM_RIGHTCOL_ENCRYPTED: new_rc = DASM_RIGHTCOL_COMMENTS; break;
+ case DASM_RIGHTCOL_COMMENTS: new_rc = DASM_RIGHTCOL_RAW; break;
+ default: break;
}
dasmview->set_right_column(new_rc);
dview_set_state(dv, VIEW_STATE_NEEDS_UPDATE, TRUE);
@@ -1092,7 +1092,7 @@ static void render_editor(DView_edit *editor)
editor->container->empty();
/* get the size of the text */
ui_draw_text_full(editor->container, editor->str, 0.0f, 0.0f, 1.0f, JUSTIFY_CENTER, WRAP_TRUNCATE,
- DRAW_NONE, ARGB_WHITE, ARGB_BLACK, &width, NULL);
+ DRAW_NONE, ARGB_WHITE, ARGB_BLACK, &width, NULL);
width += 2 * UI_BOX_LR_BORDER;
maxwidth = MAX(width, 0.5);
@@ -1113,7 +1113,7 @@ static void render_editor(DView_edit *editor)
/* draw the text within it */
ui_draw_text_full(editor->container, editor->str, x1, y1, x2 - x1, JUSTIFY_CENTER, WRAP_TRUNCATE,
- DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
+ DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
}
@@ -1168,9 +1168,9 @@ static void CreateMainMenu(running_machine &machine)
rc = downcast<debug_view_disasm *>(focus_view->view)->right_column();
switch(rc)
{
- case DASM_RIGHTCOL_RAW: subtext = "Raw Opcodes"; break;
- case DASM_RIGHTCOL_ENCRYPTED: subtext = "Enc Opcodes"; break;
- case DASM_RIGHTCOL_COMMENTS: subtext = "Comments"; break;
+ case DASM_RIGHTCOL_RAW: subtext = "Raw Opcodes"; break;
+ case DASM_RIGHTCOL_ENCRYPTED: subtext = "Enc Opcodes"; break;
+ case DASM_RIGHTCOL_COMMENTS: subtext = "Comments"; break;
}
menu->item_append("View", subtext, MENU_FLAG_RIGHT_ARROW, (void *)on_view_opcodes_activate);
menu->item_append("Run to cursor", NULL, 0, (void *)on_run_to_cursor_activate);
@@ -1232,9 +1232,9 @@ static int map_point(DView *dv, INT32 target_x, INT32 target_y, INT32 *mapped_x,
static void handle_mouse(running_machine &machine)
{
- render_target * mouse_target;
- INT32 x,y;
- int button;
+ render_target * mouse_target;
+ INT32 x,y;
+ int button;
if (menu != NULL)
return;
diff --git a/src/emu/delegate.h b/src/emu/delegate.h
index 3e2de1160cc..c37f28d84f6 100644
--- a/src/emu/delegate.h
+++ b/src/emu/delegate.h
@@ -254,21 +254,21 @@ public:
// default constructor
delegate_mfp()
: m_rawdata(s_null_mfp),
- m_realobject(NULL),
- m_stubfunction(NULL) { }
+ m_realobject(NULL),
+ m_stubfunction(NULL) { }
// copy constructor
delegate_mfp(const delegate_mfp &src)
: m_rawdata(src.m_rawdata),
- m_realobject(src.m_realobject),
- m_stubfunction(src.m_stubfunction) { }
+ m_realobject(src.m_realobject),
+ m_stubfunction(src.m_stubfunction) { }
// construct from any member function pointer
template<typename _MemberFunctionType, class _MemberFunctionClass, typename _ReturnType, typename _StaticFunctionType>
delegate_mfp(_MemberFunctionType mfp, _MemberFunctionClass *, _ReturnType *, _StaticFunctionType)
: m_rawdata(s_null_mfp),
- m_realobject(NULL),
- m_stubfunction(make_generic<_StaticFunctionType>(&delegate_mfp::method_stub<_MemberFunctionClass, _ReturnType>))
+ m_realobject(NULL),
+ m_stubfunction(make_generic<_StaticFunctionType>(&delegate_mfp::method_stub<_MemberFunctionClass, _ReturnType>))
{
assert(sizeof(mfp) <= sizeof(m_rawdata));
*reinterpret_cast<_MemberFunctionType *>(&m_rawdata) = mfp;
@@ -293,58 +293,58 @@ public:
private:
// helper stubs for calling encased member function pointers
template<class _FunctionClass, typename _ReturnType>
- static _ReturnType method_stub(delegate_generic_class *object)
- {
- delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
- typedef _ReturnType (_FunctionClass::*mfptype)();
- mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
- return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)();
- }
+ static _ReturnType method_stub(delegate_generic_class *object)
+ {
+ delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
+ typedef _ReturnType (_FunctionClass::*mfptype)();
+ mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
+ return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)();
+ }
template<class _FunctionClass, typename _ReturnType, typename _P1Type>
- static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1)
- {
- delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
- typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1);
- mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
- return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1);
- }
+ static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1)
+ {
+ delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
+ typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1);
+ mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
+ return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1);
+ }
template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type>
- static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2)
- {
- delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
- typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2);
- mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
- return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2);
- }
+ static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2)
+ {
+ delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
+ typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2);
+ mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
+ return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2);
+ }
template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type>
- static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3)
- {
- delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
- typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3);
- mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
- return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3);
- }
+ static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3)
+ {
+ delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
+ typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3);
+ mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
+ return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3);
+ }
template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type>
- static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4)
- {
- delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
- typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4);
- mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
- return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4);
- }
+ static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4)
+ {
+ delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
+ typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4);
+ mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
+ return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4);
+ }
template<class _FunctionClass, typename _ReturnType, typename _P1Type, typename _P2Type, typename _P3Type, typename _P4Type, typename _P5Type>
- static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5)
- {
- delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
- typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5);
- mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
- return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4, p5);
- }
+ static _ReturnType method_stub(delegate_generic_class *object, _P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5)
+ {
+ delegate_mfp *_this = reinterpret_cast<delegate_mfp *>(object);
+ typedef _ReturnType (_FunctionClass::*mfptype)(_P1Type p1, _P2Type p2, _P3Type p3, _P4Type p4, _P5Type p5);
+ mfptype &mfp = *reinterpret_cast<mfptype *>(&_this->m_rawdata);
+ return (reinterpret_cast<_FunctionClass *>(_this->m_realobject)->*mfp)(p1, p2, p3, p4, p5);
+ }
// helper to convert a function of a given type to a generic function, forcing template
// instantiation to match the source type
@@ -362,10 +362,10 @@ private:
};
// internal state
- raw_mfp_data m_rawdata; // raw buffer to hold the copy of the function pointer
- delegate_generic_class * m_realobject; // pointer to the object used for calling
- delegate_generic_function m_stubfunction; // pointer to our matching stub function
- static raw_mfp_data s_null_mfp; // NULL mfp
+ raw_mfp_data m_rawdata; // raw buffer to hold the copy of the function pointer
+ delegate_generic_class * m_realobject; // pointer to the object used for calling
+ delegate_generic_function m_stubfunction; // pointer to our matching stub function
+ static raw_mfp_data s_null_mfp; // NULL mfp
};
#elif (USE_DELEGATE_TYPE == DELEGATE_TYPE_INTERNAL)
@@ -379,12 +379,12 @@ public:
// default constructor
delegate_mfp()
: m_function(0),
- m_this_delta(0) { }
+ m_this_delta(0) { }
// copy constructor
delegate_mfp(const delegate_mfp &src)
: m_function(src.m_function),
- m_this_delta(src.m_this_delta) { }
+ m_this_delta(src.m_this_delta) { }
// construct from any member function pointer
template<typename _MemberFunctionType, class _MemberFunctionClass, typename _ReturnType, typename _StaticFunctionType>
@@ -413,10 +413,10 @@ private:
delegate_generic_function convert_to_generic(delegate_generic_class *&object) const;
// actual state
- FPTR m_function; // first item can be one of two things:
+ FPTR m_function; // first item can be one of two things:
// if even, it's a pointer to the function
// if odd, it's the byte offset into the vtable
- int m_this_delta; // delta to apply to the 'this' pointer
+ int m_this_delta; // delta to apply to the 'this' pointer
};
#endif
@@ -447,19 +447,19 @@ public:
// generic constructor
delegate_base()
: m_function(NULL),
- m_object(NULL),
- m_name(NULL),
- m_latebinder(NULL),
- m_raw_function(NULL) { }
+ m_object(NULL),
+ m_name(NULL),
+ m_latebinder(NULL),
+ m_raw_function(NULL) { }
// copy constructor
delegate_base(const delegate_base &src)
: m_function(src.m_function),
- m_object(NULL),
- m_name(src.m_name),
- m_latebinder(src.m_latebinder),
- m_raw_function(src.m_raw_function),
- m_raw_mfp(src.m_raw_mfp)
+ m_object(NULL),
+ m_name(src.m_name),
+ m_latebinder(src.m_latebinder),
+ m_raw_function(src.m_raw_function),
+ m_raw_mfp(src.m_raw_mfp)
{
bind(src.object());
}
@@ -467,11 +467,11 @@ public:
// copy constructor with late bind
delegate_base(const delegate_base &src, delegate_late_bind &object)
: m_function(src.m_function),
- m_object(NULL),
- m_name(src.m_name),
- m_latebinder(src.m_latebinder),
- m_raw_function(src.m_raw_function),
- m_raw_mfp(src.m_raw_mfp)
+ m_object(NULL),
+ m_name(src.m_name),
+ m_latebinder(src.m_latebinder),
+ m_raw_function(src.m_raw_function),
+ m_raw_mfp(src.m_raw_mfp)
{
late_bind(object);
}
@@ -480,11 +480,11 @@ public:
template<class _FunctionClass>
delegate_base(typename traits<_FunctionClass>::member_func_type funcptr, const char *name, _FunctionClass *object)
: m_function(NULL),
- m_object(NULL),
- m_name(name),
- m_latebinder(&late_bind_helper<_FunctionClass>),
- m_raw_function(NULL),
- m_raw_mfp(funcptr, object, (_ReturnType *)0, (generic_static_func)0)
+ m_object(NULL),
+ m_name(name),
+ m_latebinder(&late_bind_helper<_FunctionClass>),
+ m_raw_function(NULL),
+ m_raw_mfp(funcptr, object, (_ReturnType *)0, (generic_static_func)0)
{
bind(reinterpret_cast<delegate_generic_class *>(object));
}
@@ -493,10 +493,10 @@ public:
template<class _FunctionClass>
delegate_base(typename traits<_FunctionClass>::static_func_type funcptr, const char *name, _FunctionClass *object)
: m_function(reinterpret_cast<generic_static_func>(funcptr)),
- m_object(NULL),
- m_name(name),
- m_latebinder(&late_bind_helper<_FunctionClass>),
- m_raw_function(reinterpret_cast<generic_static_func>(funcptr))
+ m_object(NULL),
+ m_name(name),
+ m_latebinder(&late_bind_helper<_FunctionClass>),
+ m_raw_function(reinterpret_cast<generic_static_func>(funcptr))
{
bind(reinterpret_cast<delegate_generic_class *>(object));
}
@@ -505,10 +505,10 @@ public:
template<class _FunctionClass>
delegate_base(typename traits<_FunctionClass>::static_ref_func_type funcptr, const char *name, _FunctionClass *object)
: m_function(reinterpret_cast<generic_static_func>(funcptr)),
- m_object(NULL),
- m_name(name),
- m_latebinder(&late_bind_helper<_FunctionClass>),
- m_raw_function(reinterpret_cast<generic_static_func>(funcptr))
+ m_object(NULL),
+ m_name(name),
+ m_latebinder(&late_bind_helper<_FunctionClass>),
+ m_raw_function(reinterpret_cast<generic_static_func>(funcptr))
{
bind(reinterpret_cast<delegate_generic_class *>(object));
}
@@ -582,12 +582,12 @@ protected:
}
// internal state
- generic_static_func m_function; // resolved static function pointer
- delegate_generic_class * m_object; // resolved object to the post-cast object
- const char * m_name; // name string
- late_bind_func m_latebinder; // late binding helper
- generic_static_func m_raw_function; // raw static function pointer
- delegate_mfp m_raw_mfp; // raw member function pointer
+ generic_static_func m_function; // resolved static function pointer
+ delegate_generic_class * m_object; // resolved object to the post-cast object
+ const char * m_name; // name string
+ late_bind_func m_latebinder; // late binding helper
+ generic_static_func m_raw_function; // raw static function pointer
+ delegate_mfp m_raw_mfp; // raw member function pointer
};
@@ -703,4 +703,4 @@ public:
delegate &operator=(const basetype &src) { *static_cast<basetype *>(this) = src; return *this; }
};
-#endif /* __DELEGATE_H__ */
+#endif /* __DELEGATE_H__ */
diff --git a/src/emu/devcb.c b/src/emu/devcb.c
index f0fb2899e1d..6faa1d10db1 100644
--- a/src/emu/devcb.c
+++ b/src/emu/devcb.c
@@ -427,7 +427,7 @@ void devcb_resolved_read8::resolve(const devcb_read8 &desc, device_t &device)
m_object.device = devcb_resolver::resolve_device(desc.index, desc.tag, device);
if (desc.readdevice != NULL)
{
- m_helper.read8_device = desc.readdevice;
+ m_helper.read8_device = desc.readdevice;
*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8device, desc.name, this);
}
else
@@ -439,7 +439,7 @@ void devcb_resolved_read8::resolve(const devcb_read8 &desc, device_t &device)
case DEVCB_TYPE_LEGACY_SPACE:
m_object.space = &devcb_resolver::resolve_space(desc.index, desc.tag, device);
- m_helper.read8_space = desc.readspace;
+ m_helper.read8_space = desc.readspace;
*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8space, desc.name, this);
break;
diff --git a/src/emu/devcb.h b/src/emu/devcb.h
index a795a1f8215..0afbc113f3f 100644
--- a/src/emu/devcb.h
+++ b/src/emu/devcb.h
@@ -97,13 +97,13 @@
// callback types
enum
{
- DEVCB_TYPE_NULL = 0, // NULL callback
- DEVCB_TYPE_IOPORT, // I/O port read/write
- DEVCB_TYPE_DEVICE, // device read/write
- DEVCB_TYPE_LEGACY_SPACE, // legacy address space read/write
- DEVCB_TYPE_INPUT_LINE, // device input line write
- DEVCB_TYPE_CONSTANT, // constant value read
- DEVCB_TYPE_UNMAP // unmapped line
+ DEVCB_TYPE_NULL = 0, // NULL callback
+ DEVCB_TYPE_IOPORT, // I/O port read/write
+ DEVCB_TYPE_DEVICE, // device read/write
+ DEVCB_TYPE_LEGACY_SPACE, // legacy address space read/write
+ DEVCB_TYPE_INPUT_LINE, // device input line write
+ DEVCB_TYPE_CONSTANT, // constant value read
+ DEVCB_TYPE_UNMAP // unmapped line
};
@@ -195,48 +195,48 @@ void devcb_stub64(device_t *device, address_space &space, offs_t offset, UINT64
(target->*_Function)(space, offset, data, mem_mask);
}
-#define DEVCB_NULL { DEVCB_TYPE_NULL }
+#define DEVCB_NULL { DEVCB_TYPE_NULL }
// standard line or read/write handlers with the calling device passed
-#define DEVCB_LINE(func) { DEVCB_TYPE_DEVICE, 0, "", #func, func, NULL, NULL }
-#define DEVCB_LINE_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, &devcb_line_stub<cls, &cls::memb>, NULL, NULL }
-#define DEVCB_HANDLER(func) { DEVCB_TYPE_DEVICE, 0, "", #func, NULL, func, NULL }
-#define DEVCB_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub<cls, &cls::memb>, NULL }
-#define DEVCB_MEMBER16(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub16<cls, &cls::memb>, NULL }
-#define DEVCB_MEMBER32(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub32<cls, &cls::memb>, NULL }
-#define DEVCB_MEMBER64(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub64<cls, &cls::memb>, NULL }
+#define DEVCB_LINE(func) { DEVCB_TYPE_DEVICE, 0, "", #func, func, NULL, NULL }
+#define DEVCB_LINE_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, &devcb_line_stub<cls, &cls::memb>, NULL, NULL }
+#define DEVCB_HANDLER(func) { DEVCB_TYPE_DEVICE, 0, "", #func, NULL, func, NULL }
+#define DEVCB_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub<cls, &cls::memb>, NULL }
+#define DEVCB_MEMBER16(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub16<cls, &cls::memb>, NULL }
+#define DEVCB_MEMBER32(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub32<cls, &cls::memb>, NULL }
+#define DEVCB_MEMBER64(cls,memb) { DEVCB_TYPE_DEVICE, 0, "", #cls "::" #memb, NULL, &devcb_stub64<cls, &cls::memb>, NULL }
// line or read/write handlers for the driver device
-#define DEVCB_DRIVER_LINE_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, &devcb_line_stub<cls, &cls::memb>, NULL, NULL }
-#define DEVCB_DRIVER_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub<cls, &cls::memb>, NULL }
-#define DEVCB_DRIVER_MEMBER16(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub16<cls, &cls::memb>, NULL }
-#define DEVCB_DRIVER_MEMBER32(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub32<cls, &cls::memb>, NULL }
-#define DEVCB_DRIVER_MEMBER64(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub64<cls, &cls::memb>, NULL }
+#define DEVCB_DRIVER_LINE_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, &devcb_line_stub<cls, &cls::memb>, NULL, NULL }
+#define DEVCB_DRIVER_MEMBER(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub<cls, &cls::memb>, NULL }
+#define DEVCB_DRIVER_MEMBER16(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub16<cls, &cls::memb>, NULL }
+#define DEVCB_DRIVER_MEMBER32(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub32<cls, &cls::memb>, NULL }
+#define DEVCB_DRIVER_MEMBER64(cls,memb) { DEVCB_TYPE_DEVICE, 0, ":", #cls "::" #memb, NULL, &devcb_stub64<cls, &cls::memb>, NULL }
// line or read/write handlers for another device
-#define DEVCB_DEVICE_LINE(tag,func) { DEVCB_TYPE_DEVICE, 0, tag, #func, func, NULL, NULL }
-#define DEVCB_DEVICE_LINE_MEMBER(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, &devcb_line_stub<cls, &cls::memb>, NULL, NULL }
-#define DEVCB_DEVICE_HANDLER(tag,func) { DEVCB_TYPE_DEVICE, 0, tag, #func, NULL, func, NULL }
-#define DEVCB_DEVICE_MEMBER(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub<cls, &cls::memb>, NULL }
-#define DEVCB_DEVICE_MEMBER16(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub16<cls, &cls::memb>, NULL }
-#define DEVCB_DEVICE_MEMBER32(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub32<cls, &cls::memb>, NULL }
-#define DEVCB_DEVICE_MEMBER64(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub64<cls, &cls::memb>, NULL }
+#define DEVCB_DEVICE_LINE(tag,func) { DEVCB_TYPE_DEVICE, 0, tag, #func, func, NULL, NULL }
+#define DEVCB_DEVICE_LINE_MEMBER(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, &devcb_line_stub<cls, &cls::memb>, NULL, NULL }
+#define DEVCB_DEVICE_HANDLER(tag,func) { DEVCB_TYPE_DEVICE, 0, tag, #func, NULL, func, NULL }
+#define DEVCB_DEVICE_MEMBER(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub<cls, &cls::memb>, NULL }
+#define DEVCB_DEVICE_MEMBER16(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub16<cls, &cls::memb>, NULL }
+#define DEVCB_DEVICE_MEMBER32(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub32<cls, &cls::memb>, NULL }
+#define DEVCB_DEVICE_MEMBER64(tag,cls,memb) { DEVCB_TYPE_DEVICE, 0, tag, #cls "::" #memb, NULL, &devcb_stub64<cls, &cls::memb>, NULL }
// constant values
-#define DEVCB_CONSTANT(value) { DEVCB_TYPE_CONSTANT, value, NULL, NULL, NULL, NULL }
-#define DEVCB_LINE_GND DEVCB_CONSTANT(0)
-#define DEVCB_LINE_VCC DEVCB_CONSTANT(1)
+#define DEVCB_CONSTANT(value) { DEVCB_TYPE_CONSTANT, value, NULL, NULL, NULL, NULL }
+#define DEVCB_LINE_GND DEVCB_CONSTANT(0)
+#define DEVCB_LINE_VCC DEVCB_CONSTANT(1)
-#define DEVCB_UNMAPPED { DEVCB_TYPE_UNMAP, 0, NULL, NULL, NULL, NULL }
+#define DEVCB_UNMAPPED { DEVCB_TYPE_UNMAP, 0, NULL, NULL, NULL, NULL }
// read/write handlers for a given CPU's address space
-#define DEVCB_MEMORY_HANDLER(cpu,space,func) { DEVCB_TYPE_LEGACY_SPACE, AS_##space, (cpu), #func, NULL, NULL, func }
+#define DEVCB_MEMORY_HANDLER(cpu,space,func) { DEVCB_TYPE_LEGACY_SPACE, AS_##space, (cpu), #func, NULL, NULL, func }
// read handlers for an I/O port by tag
-#define DEVCB_INPUT_PORT(tag) { DEVCB_TYPE_IOPORT, 0, (tag), NULL, NULL, NULL, NULL }
+#define DEVCB_INPUT_PORT(tag) { DEVCB_TYPE_IOPORT, 0, (tag), NULL, NULL, NULL, NULL }
// write handlers for a CPU input line
-#define DEVCB_CPU_INPUT_LINE(tag,line) { DEVCB_TYPE_INPUT_LINE, (line), (tag), NULL, NULL, NULL, NULL }
+#define DEVCB_CPU_INPUT_LINE(tag,line) { DEVCB_TYPE_INPUT_LINE, (line), (tag), NULL, NULL, NULL, NULL }
@@ -249,11 +249,11 @@ void devcb_stub64(device_t *device, address_space &space, offs_t offset, UINT64
// resolving a devcb may produce one of the following object types
union devcb_resolved_objects
{
- ioport_port * port;
- address_space * space;
- device_t * device;
- device_execute_interface * execute;
- UINT32 constant;
+ ioport_port * port;
+ address_space * space;
+ device_t * device;
+ device_execute_interface * execute;
+ UINT32 constant;
};
@@ -262,31 +262,31 @@ union devcb_resolved_objects
// resolving a devcb may produce one of the following helper functions/additional info
union devcb_resolved_read_helpers
{
- UINT8 * null_indicator;
- read_line_device_func read_line;
- read8_device_func read8_device;
- read8_space_func read8_space;
- read16_device_func read16_device;
- read16_space_func read16_space;
- read32_device_func read32_device;
- read32_space_func read32_space;
- read64_device_func read64_device;
- read64_space_func read64_space;
+ UINT8 * null_indicator;
+ read_line_device_func read_line;
+ read8_device_func read8_device;
+ read8_space_func read8_space;
+ read16_device_func read16_device;
+ read16_space_func read16_space;
+ read32_device_func read32_device;
+ read32_space_func read32_space;
+ read64_device_func read64_device;
+ read64_space_func read64_space;
};
union devcb_resolved_write_helpers
{
- UINT8 * null_indicator;
- write_line_device_func write_line;
- write8_device_func write8_device;
- write8_space_func write8_space;
- write16_device_func write16_device;
- write16_space_func write16_space;
- write32_device_func write32_device;
- write32_space_func write32_space;
- write64_device_func write64_device;
- write64_space_func write64_space;
- int input_line;
+ UINT8 * null_indicator;
+ write_line_device_func write_line;
+ write8_device_func write8_device;
+ write8_space_func write8_space;
+ write16_device_func write16_device;
+ write16_space_func write16_space;
+ write32_device_func write32_device;
+ write32_space_func write32_space;
+ write64_device_func write64_device;
+ write64_space_func write64_space;
+ int input_line;
};
@@ -295,13 +295,13 @@ union devcb_resolved_write_helpers
// static structure used for device configuration when the desired callback type is a read_line_device_func
struct devcb_read_line
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- read_line_device_func readline; // read line function
- read8_device_func readdevice; // read device function
- read8_space_func readspace; // read space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ read_line_device_func readline; // read line function
+ read8_device_func readdevice; // read device function
+ read8_space_func readspace; // read space function
};
@@ -334,9 +334,9 @@ private:
int from_unmap();
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_read_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_read_helpers m_helper;
+ static UINT8 s_null;
};
@@ -345,13 +345,13 @@ private:
// static structure used for device configuration when the desired callback type is a write_line_device_func
struct devcb_write_line
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- write_line_device_func writeline; // write line function
- write8_device_func writedevice; // write device function
- write8_space_func writespace; // write space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ write_line_device_func writeline; // write line function
+ write8_device_func writedevice; // write device function
+ write8_space_func writespace; // write space function
};
@@ -385,9 +385,9 @@ private:
void to_unmap(int state);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_write_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_write_helpers m_helper;
+ static UINT8 s_null;
};
@@ -396,13 +396,13 @@ private:
// static structure used for device configuration when the desired callback type is a read8_device_func
struct devcb_read8
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- read_line_device_func readline; // read line function
- read8_device_func readdevice; // read device function
- read8_space_func readspace; // read space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ read_line_device_func readline; // read line function
+ read8_device_func readdevice; // read device function
+ read8_space_func readspace; // read space function
};
@@ -440,9 +440,9 @@ private:
UINT8 from_unmap(offs_t offset, UINT8 mem_mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_read_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_read_helpers m_helper;
+ static UINT8 s_null;
};
@@ -451,13 +451,13 @@ private:
// static structure used for device configuration when the desired callback type is a write8_device_func
struct devcb_write8
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- write_line_device_func writeline; // write line function
- write8_device_func writedevice; // write device function
- write8_space_func writespace; // write space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ write_line_device_func writeline; // write line function
+ write8_device_func writedevice; // write device function
+ write8_space_func writespace; // write space function
};
@@ -496,9 +496,9 @@ private:
void to_unmap(offs_t offset, UINT8 data, UINT8 mem_mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_write_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_write_helpers m_helper;
+ static UINT8 s_null;
};
@@ -507,13 +507,13 @@ private:
// static structure used for device configuration when the desired callback type is a read16_device_func
struct devcb_read16
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- read_line_device_func readline; // read line function
- read16_device_func readdevice; // read device function
- read16_space_func readspace; // read space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ read_line_device_func readline; // read line function
+ read16_device_func readdevice; // read device function
+ read16_space_func readspace; // read space function
};
@@ -550,9 +550,9 @@ private:
UINT16 from_unmap(offs_t offset, UINT16 mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_read_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_read_helpers m_helper;
+ static UINT8 s_null;
};
@@ -561,13 +561,13 @@ private:
// static structure used for device configuration when the desired callback type is a write16_device_func
struct devcb_write16
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- write_line_device_func writeline; // write line function
- write16_device_func writedevice; // write device function
- write16_space_func writespace; // write space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ write_line_device_func writeline; // write line function
+ write16_device_func writedevice; // write device function
+ write16_space_func writespace; // write space function
};
@@ -605,9 +605,9 @@ private:
void to_unmap(offs_t offset, UINT16 data, UINT16 mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_write_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_write_helpers m_helper;
+ static UINT8 s_null;
};
// ======================> devcb_read32
@@ -615,13 +615,13 @@ private:
// static structure used for device configuration when the desired callback type is a read32_device_func
struct devcb_read32
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- read_line_device_func readline; // read line function
- read32_device_func readdevice; // read device function
- read32_space_func readspace; // read space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ read_line_device_func readline; // read line function
+ read32_device_func readdevice; // read device function
+ read32_space_func readspace; // read space function
};
@@ -658,9 +658,9 @@ private:
UINT32 from_unmap(offs_t offset, UINT32 mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_read_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_read_helpers m_helper;
+ static UINT8 s_null;
};
@@ -669,13 +669,13 @@ private:
// static structure used for device configuration when the desired callback type is a write32_device_func
struct devcb_write32
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- write_line_device_func writeline; // write line function
- write32_device_func writedevice; // write device function
- write32_space_func writespace; // write space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ write_line_device_func writeline; // write line function
+ write32_device_func writedevice; // write device function
+ write32_space_func writespace; // write space function
};
@@ -713,9 +713,9 @@ private:
void to_unmap(offs_t offset, UINT32 data, UINT32 mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_write_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_write_helpers m_helper;
+ static UINT8 s_null;
};
// ======================> devcb_read64
@@ -723,13 +723,13 @@ private:
// static structure used for device configuration when the desired callback type is a read64_device_func
struct devcb_read64
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- read_line_device_func readline; // read line function
- read64_device_func readdevice; // read device function
- read64_space_func readspace; // read space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ read_line_device_func readline; // read line function
+ read64_device_func readdevice; // read device function
+ read64_space_func readspace; // read space function
};
@@ -766,9 +766,9 @@ private:
UINT64 from_unmap(offs_t offset, UINT64 mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_read_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_read_helpers m_helper;
+ static UINT8 s_null;
};
@@ -777,13 +777,13 @@ private:
// static structure used for device configuration when the desired callback type is a write64_device_func
struct devcb_write64
{
- UINT16 type; // one of the special DEVCB_TYPE values
- UINT16 index; // index related to the above types
- const char * tag; // tag of target, where appropriate
- const char * name; // name of the target function
- write_line_device_func writeline; // write line function
- write64_device_func writedevice; // write device function
- write64_space_func writespace; // write space function
+ UINT16 type; // one of the special DEVCB_TYPE values
+ UINT16 index; // index related to the above types
+ const char * tag; // tag of target, where appropriate
+ const char * name; // name of the target function
+ write_line_device_func writeline; // write line function
+ write64_device_func writedevice; // write device function
+ write64_space_func writespace; // write space function
};
@@ -821,9 +821,9 @@ private:
void to_unmap(offs_t offset, UINT64 data, UINT64 mask);
// internal state
- devcb_resolved_objects m_object;
- devcb_resolved_write_helpers m_helper;
- static UINT8 s_null;
+ devcb_resolved_objects m_object;
+ devcb_resolved_write_helpers m_helper;
+ static UINT8 s_null;
};
-#endif // __DEVCB_H__
+#endif // __DEVCB_H__
diff --git a/src/emu/devcb2.c b/src/emu/devcb2.c
index f4f2bfe8a92..404990e22e4 100644
--- a/src/emu/devcb2.c
+++ b/src/emu/devcb2.c
@@ -51,9 +51,9 @@
devcb2_base::devcb2_base(device_t &device, UINT64 defmask)
: m_device(device),
- m_rshift(0),
- m_mask(defmask),
- m_xor(0)
+ m_rshift(0),
+ m_mask(defmask),
+ m_xor(0)
{
reset();
}
diff --git a/src/emu/devcb2.h b/src/emu/devcb2.h
index bf318f8287a..db5d33b0eff 100644
--- a/src/emu/devcb2.h
+++ b/src/emu/devcb2.h
@@ -195,25 +195,25 @@ protected:
// the callback target is going to be one of these
union callback_target
{
- void * ptr;
- device_t * device;
- ioport_port * ioport;
+ void * ptr;
+ device_t * device;
+ ioport_port * ioport;
};
// configuration
- device_t & m_device; // reference to our owning device
- callback_type m_type; // type of callback registered
- const char * m_target_tag; // tag of target object
- UINT64 m_target_int; // integer value of target object
- const char * m_space_tag; // tag of address space device
- address_spacenum m_space_num; // address space number of space device
+ device_t & m_device; // reference to our owning device
+ callback_type m_type; // type of callback registered
+ const char * m_target_tag; // tag of target object
+ UINT64 m_target_int; // integer value of target object
+ const char * m_space_tag; // tag of address space device
+ address_spacenum m_space_num; // address space number of space device
// derived state
- address_space * m_space; // target address space
- callback_target m_target; // resolved pointer to target object
- int m_rshift; // right shift to apply to data read
- UINT64 m_mask; // mask to apply to data read
- UINT64 m_xor; // XOR to apply to data read
+ address_space * m_space; // target address space
+ callback_target m_target; // resolved pointer to target object
+ int m_rshift; // right shift to apply to data read
+ UINT64 m_mask; // mask to apply to data read
+ UINT64 m_xor; // XOR to apply to data read
};
@@ -254,15 +254,15 @@ protected:
UINT64 read_constant_adapter(address_space &space, offs_t offset, UINT64 mask);
// configuration
- read_line_delegate m_readline; // copy of registered line reader
- read8_delegate m_read8; // copy of registered 8-bit reader
- read16_delegate m_read16; // copy of registered 16-bit reader
- read32_delegate m_read32; // copy of registered 32-bit reader
- read64_delegate m_read64; // copy of registered 64-bit reader
+ read_line_delegate m_readline; // copy of registered line reader
+ read8_delegate m_read8; // copy of registered 8-bit reader
+ read16_delegate m_read16; // copy of registered 16-bit reader
+ read32_delegate m_read32; // copy of registered 32-bit reader
+ read64_delegate m_read64; // copy of registered 64-bit reader
// derived state
typedef UINT64 (devcb2_read_base::*adapter_func)(address_space &, offs_t, UINT64);
- adapter_func m_adapter; // actual callback to invoke
+ adapter_func m_adapter; // actual callback to invoke
};
@@ -304,15 +304,15 @@ protected:
void write_inputline_adapter(address_space &space, offs_t offset, UINT64 data, UINT64 mask);
// configuration
- write_line_delegate m_writeline; // copy of registered line writer
- write8_delegate m_write8; // copy of registered 8-bit writer
- write16_delegate m_write16; // copy of registered 16-bit writer
- write32_delegate m_write32; // copy of registered 32-bit writer
- write64_delegate m_write64; // copy of registered 64-bit writer
+ write_line_delegate m_writeline; // copy of registered line writer
+ write8_delegate m_write8; // copy of registered 8-bit writer
+ write16_delegate m_write16; // copy of registered 16-bit writer
+ write32_delegate m_write32; // copy of registered 32-bit writer
+ write64_delegate m_write64; // copy of registered 64-bit writer
// derived state
typedef void (devcb2_write_base::*adapter_func)(address_space &, offs_t, UINT64, UINT64);
- adapter_func m_adapter; // actual callback to invoke
+ adapter_func m_adapter; // actual callback to invoke
};
@@ -430,4 +430,4 @@ public:
};
-#endif /* __DEVCB2_H__ */
+#endif /* __DEVCB2_H__ */
diff --git a/src/emu/devcpu.c b/src/emu/devcpu.c
index 1999e99e731..59381845822 100644
--- a/src/emu/devcpu.c
+++ b/src/emu/devcpu.c
@@ -52,10 +52,10 @@
cpu_device::cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_execute_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- device_state_interface(mconfig, *this),
- device_disasm_interface(mconfig, *this)
+ device_execute_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ device_state_interface(mconfig, *this),
+ device_disasm_interface(mconfig, *this)
{
}
@@ -75,22 +75,22 @@ cpu_device::~cpu_device()
legacy_cpu_device::legacy_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock, cpu_get_info_func get_info)
: cpu_device(mconfig, type, "CPU", tag, owner, clock),
- m_get_info(get_info),
- m_token(NULL),
- m_set_info(reinterpret_cast<cpu_set_info_func>(get_legacy_fct(CPUINFO_FCT_SET_INFO))),
- m_execute(reinterpret_cast<cpu_execute_func>(get_legacy_fct(CPUINFO_FCT_EXECUTE))),
- m_burn(reinterpret_cast<cpu_burn_func>(get_legacy_fct(CPUINFO_FCT_BURN))),
- m_translate(reinterpret_cast<cpu_translate_func>(get_legacy_fct(CPUINFO_FCT_TRANSLATE))),
- m_read(reinterpret_cast<cpu_read_func>(get_legacy_fct(CPUINFO_FCT_READ))),
- m_write(reinterpret_cast<cpu_write_func>(get_legacy_fct(CPUINFO_FCT_WRITE))),
- m_readop(reinterpret_cast<cpu_readop_func>(get_legacy_fct(CPUINFO_FCT_READOP))),
- m_disassemble(reinterpret_cast<cpu_disassemble_func>(get_legacy_fct(CPUINFO_FCT_DISASSEMBLE))),
- m_state_import(reinterpret_cast<cpu_state_io_func>(get_legacy_fct(CPUINFO_FCT_IMPORT_STATE))),
- m_state_export(reinterpret_cast<cpu_state_io_func>(get_legacy_fct(CPUINFO_FCT_EXPORT_STATE))),
- m_string_export(reinterpret_cast<cpu_string_io_func>(get_legacy_fct(CPUINFO_FCT_EXPORT_STRING))),
- m_exit(reinterpret_cast<cpu_exit_func>(get_legacy_fct(CPUINFO_FCT_EXIT))),
- m_using_legacy_state(false),
- m_inited(false)
+ m_get_info(get_info),
+ m_token(NULL),
+ m_set_info(reinterpret_cast<cpu_set_info_func>(get_legacy_fct(CPUINFO_FCT_SET_INFO))),
+ m_execute(reinterpret_cast<cpu_execute_func>(get_legacy_fct(CPUINFO_FCT_EXECUTE))),
+ m_burn(reinterpret_cast<cpu_burn_func>(get_legacy_fct(CPUINFO_FCT_BURN))),
+ m_translate(reinterpret_cast<cpu_translate_func>(get_legacy_fct(CPUINFO_FCT_TRANSLATE))),
+ m_read(reinterpret_cast<cpu_read_func>(get_legacy_fct(CPUINFO_FCT_READ))),
+ m_write(reinterpret_cast<cpu_write_func>(get_legacy_fct(CPUINFO_FCT_WRITE))),
+ m_readop(reinterpret_cast<cpu_readop_func>(get_legacy_fct(CPUINFO_FCT_READOP))),
+ m_disassemble(reinterpret_cast<cpu_disassemble_func>(get_legacy_fct(CPUINFO_FCT_DISASSEMBLE))),
+ m_state_import(reinterpret_cast<cpu_state_io_func>(get_legacy_fct(CPUINFO_FCT_IMPORT_STATE))),
+ m_state_export(reinterpret_cast<cpu_state_io_func>(get_legacy_fct(CPUINFO_FCT_EXPORT_STATE))),
+ m_string_export(reinterpret_cast<cpu_string_io_func>(get_legacy_fct(CPUINFO_FCT_EXPORT_STRING))),
+ m_exit(reinterpret_cast<cpu_exit_func>(get_legacy_fct(CPUINFO_FCT_EXIT))),
+ m_using_legacy_state(false),
+ m_inited(false)
{
// build up our address spaces; legacy devices don't have logical spaces
memset(m_space_config, 0, sizeof(m_space_config));
@@ -443,7 +443,7 @@ void legacy_cpu_device::state_import(const device_state_entry &entry)
if (m_using_legacy_state)
{
if (entry.index() == STATE_GENFLAGS)
- ; // do nothing
+ ; // do nothing
else
set_legacy_int(CPUINFO_INT_REGISTER + entry.index(), m_state_io);
}
diff --git a/src/emu/devcpu.h b/src/emu/devcpu.h
index 35cff542e77..e52fb08d9e4 100644
--- a/src/emu/devcpu.h
+++ b/src/emu/devcpu.h
@@ -59,20 +59,20 @@ enum
{
// --- the following bits of info are returned as 64-bit signed integers ---
CPUINFO_INT_FIRST = 0x00000,
- CPUINFO_INT_ENDIANNESS = CPUINFO_INT_FIRST, // R/O: either ENDIANNESS_BIG or ENDIANNESS_LITTLE
- CPUINFO_INT_DATABUS_WIDTH, // R/O: data bus size for each address space (8,16,32,64)
+ CPUINFO_INT_ENDIANNESS = CPUINFO_INT_FIRST, // R/O: either ENDIANNESS_BIG or ENDIANNESS_LITTLE
+ CPUINFO_INT_DATABUS_WIDTH, // R/O: data bus size for each address space (8,16,32,64)
CPUINFO_INT_DATABUS_WIDTH_0 = CPUINFO_INT_DATABUS_WIDTH + 0,
CPUINFO_INT_DATABUS_WIDTH_1 = CPUINFO_INT_DATABUS_WIDTH + 1,
CPUINFO_INT_DATABUS_WIDTH_2 = CPUINFO_INT_DATABUS_WIDTH + 2,
CPUINFO_INT_DATABUS_WIDTH_3 = CPUINFO_INT_DATABUS_WIDTH + 3,
CPUINFO_INT_DATABUS_WIDTH_LAST = CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACES - 1,
- CPUINFO_INT_ADDRBUS_WIDTH, // R/O: address bus size for each address space (12-32)
+ CPUINFO_INT_ADDRBUS_WIDTH, // R/O: address bus size for each address space (12-32)
CPUINFO_INT_ADDRBUS_WIDTH_0 = CPUINFO_INT_ADDRBUS_WIDTH + 0,
CPUINFO_INT_ADDRBUS_WIDTH_1 = CPUINFO_INT_ADDRBUS_WIDTH + 1,
CPUINFO_INT_ADDRBUS_WIDTH_2 = CPUINFO_INT_ADDRBUS_WIDTH + 2,
CPUINFO_INT_ADDRBUS_WIDTH_3 = CPUINFO_INT_ADDRBUS_WIDTH + 3,
CPUINFO_INT_ADDRBUS_WIDTH_LAST = CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACES - 1,
- CPUINFO_INT_ADDRBUS_SHIFT, // R/O: shift applied to addresses each address space (+3 means >>3, -1 means <<1)
+ CPUINFO_INT_ADDRBUS_SHIFT, // R/O: shift applied to addresses each address space (+3 means >>3, -1 means <<1)
CPUINFO_INT_ADDRBUS_SHIFT_0 = CPUINFO_INT_ADDRBUS_SHIFT + 0,
CPUINFO_INT_ADDRBUS_SHIFT_1 = CPUINFO_INT_ADDRBUS_SHIFT + 1,
CPUINFO_INT_ADDRBUS_SHIFT_2 = CPUINFO_INT_ADDRBUS_SHIFT + 2,
@@ -80,50 +80,50 @@ enum
CPUINFO_INT_ADDRBUS_SHIFT_LAST = CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACES - 1,
// CPU-specific additionsg
- CPUINFO_INT_CONTEXT_SIZE = 0x04000, // R/O: size of CPU context in bytes
- CPUINFO_INT_INPUT_LINES, // R/O: number of input lines
- CPUINFO_INT_DEFAULT_IRQ_VECTOR, // R/O: default IRQ vector
- CPUINFO_INT_CLOCK_MULTIPLIER, // R/O: internal clock multiplier
- CPUINFO_INT_CLOCK_DIVIDER, // R/O: internal clock divider
- CPUINFO_INT_MIN_INSTRUCTION_BYTES, // R/O: minimum bytes per instruction
- CPUINFO_INT_MAX_INSTRUCTION_BYTES, // R/O: maximum bytes per instruction
- CPUINFO_INT_MIN_CYCLES, // R/O: minimum cycles for a single instruction
- CPUINFO_INT_MAX_CYCLES, // R/O: maximum cycles for a single instruction
-
- CPUINFO_INT_LOGADDR_WIDTH, // R/O: address bus size for logical accesses in each space (0=same as physical)
+ CPUINFO_INT_CONTEXT_SIZE = 0x04000, // R/O: size of CPU context in bytes
+ CPUINFO_INT_INPUT_LINES, // R/O: number of input lines
+ CPUINFO_INT_DEFAULT_IRQ_VECTOR, // R/O: default IRQ vector
+ CPUINFO_INT_CLOCK_MULTIPLIER, // R/O: internal clock multiplier
+ CPUINFO_INT_CLOCK_DIVIDER, // R/O: internal clock divider
+ CPUINFO_INT_MIN_INSTRUCTION_BYTES, // R/O: minimum bytes per instruction
+ CPUINFO_INT_MAX_INSTRUCTION_BYTES, // R/O: maximum bytes per instruction
+ CPUINFO_INT_MIN_CYCLES, // R/O: minimum cycles for a single instruction
+ CPUINFO_INT_MAX_CYCLES, // R/O: maximum cycles for a single instruction
+
+ CPUINFO_INT_LOGADDR_WIDTH, // R/O: address bus size for logical accesses in each space (0=same as physical)
CPUINFO_INT_LOGADDR_WIDTH_PROGRAM = CPUINFO_INT_LOGADDR_WIDTH + AS_PROGRAM,
CPUINFO_INT_LOGADDR_WIDTH_DATA = CPUINFO_INT_LOGADDR_WIDTH + AS_DATA,
CPUINFO_INT_LOGADDR_WIDTH_IO = CPUINFO_INT_LOGADDR_WIDTH + AS_IO,
CPUINFO_INT_LOGADDR_WIDTH_LAST = CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACES - 1,
- CPUINFO_INT_PAGE_SHIFT, // R/O: size of a page log 2 (i.e., 12=4096), or 0 if paging not supported
+ CPUINFO_INT_PAGE_SHIFT, // R/O: size of a page log 2 (i.e., 12=4096), or 0 if paging not supported
CPUINFO_INT_PAGE_SHIFT_PROGRAM = CPUINFO_INT_PAGE_SHIFT + AS_PROGRAM,
CPUINFO_INT_PAGE_SHIFT_DATA = CPUINFO_INT_PAGE_SHIFT + AS_DATA,
CPUINFO_INT_PAGE_SHIFT_IO = CPUINFO_INT_PAGE_SHIFT + AS_IO,
CPUINFO_INT_PAGE_SHIFT_LAST = CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACES - 1,
- CPUINFO_INT_INPUT_STATE, // R/W: states for each input line
+ CPUINFO_INT_INPUT_STATE, // R/W: states for each input line
CPUINFO_INT_INPUT_STATE_LAST = CPUINFO_INT_INPUT_STATE + MAX_INPUT_LINES - 1,
- CPUINFO_INT_REGISTER = CPUINFO_INT_INPUT_STATE_LAST + 10, // R/W: values of up to MAX_REGs registers
- CPUINFO_INT_SP = CPUINFO_INT_REGISTER + STATE_GENSP, // R/W: the current stack pointer value
- CPUINFO_INT_PC = CPUINFO_INT_REGISTER + STATE_GENPC, // R/W: the current PC value
- CPUINFO_INT_PREVIOUSPC = CPUINFO_INT_REGISTER + STATE_GENPCBASE, // R/W: the previous PC value
+ CPUINFO_INT_REGISTER = CPUINFO_INT_INPUT_STATE_LAST + 10, // R/W: values of up to MAX_REGs registers
+ CPUINFO_INT_SP = CPUINFO_INT_REGISTER + STATE_GENSP, // R/W: the current stack pointer value
+ CPUINFO_INT_PC = CPUINFO_INT_REGISTER + STATE_GENPC, // R/W: the current PC value
+ CPUINFO_INT_PREVIOUSPC = CPUINFO_INT_REGISTER + STATE_GENPCBASE, // R/W: the previous PC value
- CPUINFO_IS_OCTAL = CPUINFO_INT_REGISTER + MAX_REGS - 2, // R/O: determine if default is octal or hexadecimal
+ CPUINFO_IS_OCTAL = CPUINFO_INT_REGISTER + MAX_REGS - 2, // R/O: determine if default is octal or hexadecimal
CPUINFO_INT_REGISTER_LAST = CPUINFO_INT_REGISTER + MAX_REGS - 1,
- CPUINFO_INT_CPU_SPECIFIC = 0x08000, // R/W: CPU-specific values start here
+ CPUINFO_INT_CPU_SPECIFIC = 0x08000, // R/W: CPU-specific values start here
// --- the following bits of info are returned as pointers to data or functions ---
CPUINFO_PTR_FIRST = 0x10000,
- CPUINFO_PTR_INTERNAL_MEMORY_MAP = CPUINFO_PTR_FIRST, // R/O: address_map_constructor map
+ CPUINFO_PTR_INTERNAL_MEMORY_MAP = CPUINFO_PTR_FIRST, // R/O: address_map_constructor map
CPUINFO_PTR_INTERNAL_MEMORY_MAP_0 = CPUINFO_PTR_INTERNAL_MEMORY_MAP + 0,
CPUINFO_PTR_INTERNAL_MEMORY_MAP_1 = CPUINFO_PTR_INTERNAL_MEMORY_MAP + 1,
CPUINFO_PTR_INTERNAL_MEMORY_MAP_2 = CPUINFO_PTR_INTERNAL_MEMORY_MAP + 2,
CPUINFO_PTR_INTERNAL_MEMORY_MAP_3 = CPUINFO_PTR_INTERNAL_MEMORY_MAP + 3,
CPUINFO_PTR_INTERNAL_MEMORY_MAP_LAST = CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACES - 1,
- CPUINFO_PTR_DEFAULT_MEMORY_MAP, // R/O: address_map_constructor map
+ CPUINFO_PTR_DEFAULT_MEMORY_MAP, // R/O: address_map_constructor map
CPUINFO_PTR_DEFAULT_MEMORY_MAP_0 = CPUINFO_PTR_DEFAULT_MEMORY_MAP + 0,
CPUINFO_PTR_DEFAULT_MEMORY_MAP_1 = CPUINFO_PTR_DEFAULT_MEMORY_MAP + 1,
CPUINFO_PTR_DEFAULT_MEMORY_MAP_2 = CPUINFO_PTR_DEFAULT_MEMORY_MAP + 2,
@@ -134,45 +134,45 @@ enum
CPUINFO_PTR_INSTRUCTION_COUNTER = 0x14000,
// R/O: int *icount
- CPUINFO_PTR_CPU_SPECIFIC = 0x18000, // R/W: CPU-specific values start here
+ CPUINFO_PTR_CPU_SPECIFIC = 0x18000, // R/W: CPU-specific values start here
// --- the following bits of info are returned as pointers to functions ---
CPUINFO_FCT_FIRST = 0x20000,
// CPU-specific additions
- CPUINFO_FCT_SET_INFO = 0x24000, // R/O: void (*set_info)(legacy_cpu_device *device, UINT32 state, INT64 data, void *ptr)
- CPUINFO_FCT_INIT, // R/O: void (*init)(legacy_cpu_device *device, int index, int clock, int (*irqcallback)(legacy_cpu_device *device, int))
- CPUINFO_FCT_RESET, // R/O: void (*reset)(legacy_cpu_device *device)
- CPUINFO_FCT_EXIT, // R/O: void (*exit)(legacy_cpu_device *device)
- CPUINFO_FCT_EXECUTE, // R/O: int (*execute)(legacy_cpu_device *device, int cycles)
- CPUINFO_FCT_BURN, // R/O: void (*burn)(legacy_cpu_device *device, int cycles)
- CPUINFO_FCT_DISASSEMBLE, // R/O: offs_t (*disassemble)(legacy_cpu_device *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options)
- CPUINFO_FCT_TRANSLATE, // R/O: int (*translate)(legacy_cpu_device *device, address_spacenum space, int intention, offs_t *address)
- CPUINFO_FCT_READ, // R/O: int (*read)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 *value)
- CPUINFO_FCT_WRITE, // R/O: int (*write)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 value)
- CPUINFO_FCT_READOP, // R/O: int (*readop)(legacy_cpu_device *device, UINT32 offset, int size, UINT64 *value)
- CPUINFO_FCT_DEBUG_INIT, // R/O: void (*debug_init)(legacy_cpu_device *device)
- CPUINFO_FCT_IMPORT_STATE, // R/O: void (*import_state)(legacy_cpu_device *device, const device_state_entry &entry)
- CPUINFO_FCT_EXPORT_STATE, // R/O: void (*export_state)(legacy_cpu_device *device, const device_state_entry &entry)
- CPUINFO_FCT_IMPORT_STRING, // R/O: void (*import_string)(legacy_cpu_device *device, const device_state_entry &entry, astring &string)
- CPUINFO_FCT_EXPORT_STRING, // R/O: void (*export_string)(legacy_cpu_device *device, const device_state_entry &entry, astring &string)
-
- CPUINFO_FCT_CPU_SPECIFIC = 0x28000, // R/W: CPU-specific values start here
+ CPUINFO_FCT_SET_INFO = 0x24000, // R/O: void (*set_info)(legacy_cpu_device *device, UINT32 state, INT64 data, void *ptr)
+ CPUINFO_FCT_INIT, // R/O: void (*init)(legacy_cpu_device *device, int index, int clock, int (*irqcallback)(legacy_cpu_device *device, int))
+ CPUINFO_FCT_RESET, // R/O: void (*reset)(legacy_cpu_device *device)
+ CPUINFO_FCT_EXIT, // R/O: void (*exit)(legacy_cpu_device *device)
+ CPUINFO_FCT_EXECUTE, // R/O: int (*execute)(legacy_cpu_device *device, int cycles)
+ CPUINFO_FCT_BURN, // R/O: void (*burn)(legacy_cpu_device *device, int cycles)
+ CPUINFO_FCT_DISASSEMBLE, // R/O: offs_t (*disassemble)(legacy_cpu_device *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options)
+ CPUINFO_FCT_TRANSLATE, // R/O: int (*translate)(legacy_cpu_device *device, address_spacenum space, int intention, offs_t *address)
+ CPUINFO_FCT_READ, // R/O: int (*read)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 *value)
+ CPUINFO_FCT_WRITE, // R/O: int (*write)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 value)
+ CPUINFO_FCT_READOP, // R/O: int (*readop)(legacy_cpu_device *device, UINT32 offset, int size, UINT64 *value)
+ CPUINFO_FCT_DEBUG_INIT, // R/O: void (*debug_init)(legacy_cpu_device *device)
+ CPUINFO_FCT_IMPORT_STATE, // R/O: void (*import_state)(legacy_cpu_device *device, const device_state_entry &entry)
+ CPUINFO_FCT_EXPORT_STATE, // R/O: void (*export_state)(legacy_cpu_device *device, const device_state_entry &entry)
+ CPUINFO_FCT_IMPORT_STRING, // R/O: void (*import_string)(legacy_cpu_device *device, const device_state_entry &entry, astring &string)
+ CPUINFO_FCT_EXPORT_STRING, // R/O: void (*export_string)(legacy_cpu_device *device, const device_state_entry &entry, astring &string)
+
+ CPUINFO_FCT_CPU_SPECIFIC = 0x28000, // R/W: CPU-specific values start here
// --- the following bits of info are returned as NULL-terminated strings ---
CPUINFO_STR_FIRST = 0x30000,
- CPUINFO_STR_NAME = CPUINFO_STR_FIRST, // R/O: name of the device
- CPUINFO_STR_SHORTNAME, // R/O: search path of device, used for media loading
- CPUINFO_STR_FAMILY, // R/O: family of the device
- CPUINFO_STR_VERSION, // R/O: version of the device
- CPUINFO_STR_SOURCE_FILE, // R/O: file containing the device implementation
- CPUINFO_STR_CREDITS, // R/O: credits for the device implementation
+ CPUINFO_STR_NAME = CPUINFO_STR_FIRST, // R/O: name of the device
+ CPUINFO_STR_SHORTNAME, // R/O: search path of device, used for media loading
+ CPUINFO_STR_FAMILY, // R/O: family of the device
+ CPUINFO_STR_VERSION, // R/O: version of the device
+ CPUINFO_STR_SOURCE_FILE, // R/O: file containing the device implementation
+ CPUINFO_STR_CREDITS, // R/O: credits for the device implementation
// CPU-specific additions
- CPUINFO_STR_REGISTER = 0x34000 + 10, // R/O: string representation of up to MAX_REGs registers
- CPUINFO_STR_FLAGS = CPUINFO_STR_REGISTER + STATE_GENFLAGS, // R/O: string representation of the main flags value
+ CPUINFO_STR_REGISTER = 0x34000 + 10, // R/O: string representation of up to MAX_REGs registers
+ CPUINFO_STR_FLAGS = CPUINFO_STR_REGISTER + STATE_GENFLAGS, // R/O: string representation of the main flags value
CPUINFO_STR_REGISTER_LAST = CPUINFO_STR_REGISTER + MAX_REGS - 1,
- CPUINFO_STR_CPU_SPECIFIC = 0x38000 // R/W: CPU-specific values start here
+ CPUINFO_STR_CPU_SPECIFIC = 0x38000 // R/W: CPU-specific values start here
};
@@ -204,94 +204,94 @@ enum
//**************************************************************************
// macro for declaring the configuration and device classes of a legacy CPU device
-#define DECLARE_LEGACY_CPU_DEVICE(name, basename) \
+#define DECLARE_LEGACY_CPU_DEVICE(name, basename) \
\
-CPU_GET_INFO( basename ); \
+CPU_GET_INFO( basename ); \
\
-class basename##_device : public legacy_cpu_device \
-{ \
-public: \
- basename##_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock); \
-}; \
+class basename##_device : public legacy_cpu_device \
+{ \
+public: \
+ basename##_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock); \
+}; \
\
extern const device_type name;
// macro for defining the implementation needed for configuration and device classes
-#define DEFINE_LEGACY_CPU_DEVICE(name, basename) \
+#define DEFINE_LEGACY_CPU_DEVICE(name, basename) \
\
-basename##_device::basename##_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock) \
- : legacy_cpu_device(mconfig, type, tag, owner, clock, CPU_GET_INFO_NAME(basename)) \
-{ \
-} \
+basename##_device::basename##_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock) \
+ : legacy_cpu_device(mconfig, type, tag, owner, clock, CPU_GET_INFO_NAME(basename)) \
+{ \
+} \
\
const device_type name = &legacy_device_creator<basename##_device>
// CPU interface functions
-#define CPU_GET_INFO_NAME(name) cpu_get_info_##name
-#define CPU_GET_INFO(name) void CPU_GET_INFO_NAME(name)(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
-#define CPU_GET_INFO_CALL(name) CPU_GET_INFO_NAME(name)(device, state, info)
+#define CPU_GET_INFO_NAME(name) cpu_get_info_##name
+#define CPU_GET_INFO(name) void CPU_GET_INFO_NAME(name)(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
+#define CPU_GET_INFO_CALL(name) CPU_GET_INFO_NAME(name)(device, state, info)
-#define CPU_SET_INFO_NAME(name) cpu_set_info_##name
-#define CPU_SET_INFO(name) void CPU_SET_INFO_NAME(name)(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
-#define CPU_SET_INFO_CALL(name) CPU_SET_INFO_NAME(name)(device, state, info)
+#define CPU_SET_INFO_NAME(name) cpu_set_info_##name
+#define CPU_SET_INFO(name) void CPU_SET_INFO_NAME(name)(legacy_cpu_device *device, UINT32 state, cpuinfo *info)
+#define CPU_SET_INFO_CALL(name) CPU_SET_INFO_NAME(name)(device, state, info)
-#define CPU_INIT_NAME(name) cpu_init_##name
-#define CPU_INIT(name) void CPU_INIT_NAME(name)(legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback)
-#define CPU_INIT_CALL(name) CPU_INIT_NAME(name)(device, irqcallback)
+#define CPU_INIT_NAME(name) cpu_init_##name
+#define CPU_INIT(name) void CPU_INIT_NAME(name)(legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback)
+#define CPU_INIT_CALL(name) CPU_INIT_NAME(name)(device, irqcallback)
-#define CPU_RESET_NAME(name) cpu_reset_##name
-#define CPU_RESET(name) void CPU_RESET_NAME(name)(legacy_cpu_device *device)
-#define CPU_RESET_CALL(name) CPU_RESET_NAME(name)(device)
+#define CPU_RESET_NAME(name) cpu_reset_##name
+#define CPU_RESET(name) void CPU_RESET_NAME(name)(legacy_cpu_device *device)
+#define CPU_RESET_CALL(name) CPU_RESET_NAME(name)(device)
-#define CPU_EXIT_NAME(name) cpu_exit_##name
-#define CPU_EXIT(name) void CPU_EXIT_NAME(name)(legacy_cpu_device *device)
-#define CPU_EXIT_CALL(name) CPU_EXIT_NAME(name)(device)
+#define CPU_EXIT_NAME(name) cpu_exit_##name
+#define CPU_EXIT(name) void CPU_EXIT_NAME(name)(legacy_cpu_device *device)
+#define CPU_EXIT_CALL(name) CPU_EXIT_NAME(name)(device)
-#define CPU_EXECUTE_NAME(name) cpu_execute_##name
-#define CPU_EXECUTE(name) void CPU_EXECUTE_NAME(name)(legacy_cpu_device *device)
-#define CPU_EXECUTE_CALL(name) CPU_EXECUTE_NAME(name)(device, cycles)
+#define CPU_EXECUTE_NAME(name) cpu_execute_##name
+#define CPU_EXECUTE(name) void CPU_EXECUTE_NAME(name)(legacy_cpu_device *device)
+#define CPU_EXECUTE_CALL(name) CPU_EXECUTE_NAME(name)(device, cycles)
-#define CPU_BURN_NAME(name) cpu_burn_##name
-#define CPU_BURN(name) void CPU_BURN_NAME(name)(legacy_cpu_device *device, int cycles)
-#define CPU_BURN_CALL(name) CPU_BURN_NAME(name)(device, cycles)
+#define CPU_BURN_NAME(name) cpu_burn_##name
+#define CPU_BURN(name) void CPU_BURN_NAME(name)(legacy_cpu_device *device, int cycles)
+#define CPU_BURN_CALL(name) CPU_BURN_NAME(name)(device, cycles)
-#define CPU_TRANSLATE_NAME(name) cpu_translate_##name
-#define CPU_TRANSLATE(name) int CPU_TRANSLATE_NAME(name)(legacy_cpu_device *device, address_spacenum space, int intention, offs_t *address)
-#define CPU_TRANSLATE_CALL(name) CPU_TRANSLATE_NAME(name)(device, space, intention, address)
+#define CPU_TRANSLATE_NAME(name) cpu_translate_##name
+#define CPU_TRANSLATE(name) int CPU_TRANSLATE_NAME(name)(legacy_cpu_device *device, address_spacenum space, int intention, offs_t *address)
+#define CPU_TRANSLATE_CALL(name) CPU_TRANSLATE_NAME(name)(device, space, intention, address)
-#define CPU_READ_NAME(name) cpu_read_##name
-#define CPU_READ(name) int CPU_READ_NAME(name)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 *value)
-#define CPU_READ_CALL(name) CPU_READ_NAME(name)(device, space, offset, size, value)
+#define CPU_READ_NAME(name) cpu_read_##name
+#define CPU_READ(name) int CPU_READ_NAME(name)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 *value)
+#define CPU_READ_CALL(name) CPU_READ_NAME(name)(device, space, offset, size, value)
-#define CPU_WRITE_NAME(name) cpu_write_##name
-#define CPU_WRITE(name) int CPU_WRITE_NAME(name)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 value)
-#define CPU_WRITE_CALL(name) CPU_WRITE_NAME(name)(device, space, offset, size, value)
+#define CPU_WRITE_NAME(name) cpu_write_##name
+#define CPU_WRITE(name) int CPU_WRITE_NAME(name)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 value)
+#define CPU_WRITE_CALL(name) CPU_WRITE_NAME(name)(device, space, offset, size, value)
-#define CPU_READOP_NAME(name) cpu_readop_##name
-#define CPU_READOP(name) int CPU_READOP_NAME(name)(legacy_cpu_device *device, UINT32 offset, int size, UINT64 *value)
-#define CPU_READOP_CALL(name) CPU_READOP_NAME(name)(device, offset, size, value)
+#define CPU_READOP_NAME(name) cpu_readop_##name
+#define CPU_READOP(name) int CPU_READOP_NAME(name)(legacy_cpu_device *device, UINT32 offset, int size, UINT64 *value)
+#define CPU_READOP_CALL(name) CPU_READOP_NAME(name)(device, offset, size, value)
-#define CPU_DEBUG_INIT_NAME(name) cpu_debug_init_##name
-#define CPU_DEBUG_INIT(name) void CPU_DEBUG_INIT_NAME(name)(legacy_cpu_device *device)
-#define CPU_DEBUG_INIT_CALL(name) CPU_DEBUG_INIT_NAME(name)(device)
+#define CPU_DEBUG_INIT_NAME(name) cpu_debug_init_##name
+#define CPU_DEBUG_INIT(name) void CPU_DEBUG_INIT_NAME(name)(legacy_cpu_device *device)
+#define CPU_DEBUG_INIT_CALL(name) CPU_DEBUG_INIT_NAME(name)(device)
-#define CPU_DISASSEMBLE_NAME(name) cpu_disassemble_##name
-#define CPU_DISASSEMBLE(name) offs_t CPU_DISASSEMBLE_NAME(name)(legacy_cpu_device *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options)
-#define CPU_DISASSEMBLE_CALL(name) CPU_DISASSEMBLE_NAME(name)(device, buffer, pc, oprom, opram, options)
+#define CPU_DISASSEMBLE_NAME(name) cpu_disassemble_##name
+#define CPU_DISASSEMBLE(name) offs_t CPU_DISASSEMBLE_NAME(name)(legacy_cpu_device *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options)
+#define CPU_DISASSEMBLE_CALL(name) CPU_DISASSEMBLE_NAME(name)(device, buffer, pc, oprom, opram, options)
-#define CPU_IMPORT_STATE_NAME(name) cpu_state_import_##name
-#define CPU_IMPORT_STATE(name) void CPU_IMPORT_STATE_NAME(name)(legacy_cpu_device *device, const device_state_entry &entry)
-#define CPU_IMPORT_STATE_CALL(name) CPU_IMPORT_STATE_NAME(name)(device, entry)
+#define CPU_IMPORT_STATE_NAME(name) cpu_state_import_##name
+#define CPU_IMPORT_STATE(name) void CPU_IMPORT_STATE_NAME(name)(legacy_cpu_device *device, const device_state_entry &entry)
+#define CPU_IMPORT_STATE_CALL(name) CPU_IMPORT_STATE_NAME(name)(device, entry)
-#define CPU_EXPORT_STATE_NAME(name) cpu_state_export_##name
-#define CPU_EXPORT_STATE(name) void CPU_EXPORT_STATE_NAME(name)(legacy_cpu_device *device, const device_state_entry &entry)
-#define CPU_EXPORT_STATE_CALL(name) CPU_EXPORT_STATE_NAME(name)(device, entry)
+#define CPU_EXPORT_STATE_NAME(name) cpu_state_export_##name
+#define CPU_EXPORT_STATE(name) void CPU_EXPORT_STATE_NAME(name)(legacy_cpu_device *device, const device_state_entry &entry)
+#define CPU_EXPORT_STATE_CALL(name) CPU_EXPORT_STATE_NAME(name)(device, entry)
-#define CPU_EXPORT_STRING_NAME(name) cpu_string_export_##name
-#define CPU_EXPORT_STRING(name) void CPU_EXPORT_STRING_NAME(name)(legacy_cpu_device *device, const device_state_entry &entry, astring &string)
-#define CPU_EXPORT_STRING_CALL(name) CPU_EXPORT_STRING_NAME(name)(device, entry, string)
+#define CPU_EXPORT_STRING_NAME(name) cpu_string_export_##name
+#define CPU_EXPORT_STRING(name) void CPU_EXPORT_STRING_NAME(name)(legacy_cpu_device *device, const device_state_entry &entry, astring &string)
+#define CPU_EXPORT_STRING_CALL(name) CPU_EXPORT_STRING_NAME(name)(device, entry, string)
// this template function creates a stub which constructs a device
@@ -319,10 +319,10 @@ typedef void (*cpu_reset_func)(legacy_cpu_device *device);
typedef void (*cpu_exit_func)(legacy_cpu_device *device);
typedef void (*cpu_execute_func)(legacy_cpu_device *device);
typedef void (*cpu_burn_func)(legacy_cpu_device *device, int cycles);
-typedef int (*cpu_translate_func)(legacy_cpu_device *device, address_spacenum space, int intention, offs_t *address);
-typedef int (*cpu_read_func)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 *value);
-typedef int (*cpu_write_func)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 value);
-typedef int (*cpu_readop_func)(legacy_cpu_device *device, UINT32 offset, int size, UINT64 *value);
+typedef int (*cpu_translate_func)(legacy_cpu_device *device, address_spacenum space, int intention, offs_t *address);
+typedef int (*cpu_read_func)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 *value);
+typedef int (*cpu_write_func)(legacy_cpu_device *device, address_spacenum space, UINT32 offset, int size, UINT64 value);
+typedef int (*cpu_readop_func)(legacy_cpu_device *device, UINT32 offset, int size, UINT64 *value);
typedef void (*cpu_debug_init_func)(legacy_cpu_device *device);
typedef offs_t (*cpu_disassemble_func)(legacy_cpu_device *device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options);
typedef void (*cpu_state_io_func)(legacy_cpu_device *device, const device_state_entry &entry);
@@ -332,43 +332,43 @@ typedef void (*cpu_string_io_func)(legacy_cpu_device *device, const device_state
// cpuinfo union used to pass data to/from the get_info/set_info functions
union cpuinfo
{
- INT64 i; // generic integers
- void * p; // generic pointers
- genf * f; // generic function pointers
- char * s; // generic strings
-
- cpu_set_info_func setinfo; // CPUINFO_FCT_SET_INFO
- cpu_init_func init; // CPUINFO_FCT_INIT
- cpu_reset_func reset; // CPUINFO_FCT_RESET
- cpu_exit_func exit; // CPUINFO_FCT_EXIT
- cpu_execute_func execute; // CPUINFO_FCT_EXECUTE
- cpu_burn_func burn; // CPUINFO_FCT_BURN
- cpu_translate_func translate; // CPUINFO_FCT_TRANSLATE
- cpu_read_func read; // CPUINFO_FCT_READ
- cpu_write_func write; // CPUINFO_FCT_WRITE
- cpu_readop_func readop; // CPUINFO_FCT_READOP
- cpu_debug_init_func debug_init; // CPUINFO_FCT_DEBUG_INIT
- cpu_disassemble_func disassemble; // CPUINFO_FCT_DISASSEMBLE
- cpu_state_io_func import_state; // CPUINFO_FCT_IMPORT_STATE
- cpu_state_io_func export_state; // CPUINFO_FCT_EXPORT_STATE
- cpu_string_io_func import_string; // CPUINFO_FCT_IMPORT_STRING
- cpu_string_io_func export_string; // CPUINFO_FCT_EXPORT_STRING
- int * icount; // CPUINFO_PTR_INSTRUCTION_COUNTER
- address_map_constructor internal_map8; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
- address_map_constructor internal_map16; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
- address_map_constructor internal_map32; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
- address_map_constructor internal_map64; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
- address_map_constructor default_map8; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
- address_map_constructor default_map16; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
- address_map_constructor default_map32; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
- address_map_constructor default_map64; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
+ INT64 i; // generic integers
+ void * p; // generic pointers
+ genf * f; // generic function pointers
+ char * s; // generic strings
+
+ cpu_set_info_func setinfo; // CPUINFO_FCT_SET_INFO
+ cpu_init_func init; // CPUINFO_FCT_INIT
+ cpu_reset_func reset; // CPUINFO_FCT_RESET
+ cpu_exit_func exit; // CPUINFO_FCT_EXIT
+ cpu_execute_func execute; // CPUINFO_FCT_EXECUTE
+ cpu_burn_func burn; // CPUINFO_FCT_BURN
+ cpu_translate_func translate; // CPUINFO_FCT_TRANSLATE
+ cpu_read_func read; // CPUINFO_FCT_READ
+ cpu_write_func write; // CPUINFO_FCT_WRITE
+ cpu_readop_func readop; // CPUINFO_FCT_READOP
+ cpu_debug_init_func debug_init; // CPUINFO_FCT_DEBUG_INIT
+ cpu_disassemble_func disassemble; // CPUINFO_FCT_DISASSEMBLE
+ cpu_state_io_func import_state; // CPUINFO_FCT_IMPORT_STATE
+ cpu_state_io_func export_state; // CPUINFO_FCT_EXPORT_STATE
+ cpu_string_io_func import_string; // CPUINFO_FCT_IMPORT_STRING
+ cpu_string_io_func export_string; // CPUINFO_FCT_EXPORT_STRING
+ int * icount; // CPUINFO_PTR_INSTRUCTION_COUNTER
+ address_map_constructor internal_map8; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
+ address_map_constructor internal_map16; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
+ address_map_constructor internal_map32; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
+ address_map_constructor internal_map64; // CPUINFO_PTR_INTERNAL_MEMORY_MAP
+ address_map_constructor default_map8; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
+ address_map_constructor default_map16; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
+ address_map_constructor default_map32; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
+ address_map_constructor default_map64; // CPUINFO_PTR_DEFAULT_MEMORY_MAP
};
// ======================> cpu_device
-class cpu_device : public device_t,
+class cpu_device : public device_t,
public device_execute_interface,
public device_memory_interface,
public device_state_interface,
@@ -442,27 +442,27 @@ protected:
protected:
// internal state
- cpu_get_info_func m_get_info;
- address_space_config m_space_config[3]; // array of address space configs
- void * m_token; // pointer to our state
-
- cpu_set_info_func m_set_info; // extracted legacy function pointers
- cpu_execute_func m_execute; //
- cpu_burn_func m_burn; //
- cpu_translate_func m_translate; //
- cpu_read_func m_read; //
- cpu_write_func m_write; //
- cpu_readop_func m_readop; //
- cpu_disassemble_func m_disassemble; //
- cpu_state_io_func m_state_import; //
- cpu_state_io_func m_state_export; //
- cpu_string_io_func m_string_export; //
- cpu_exit_func m_exit; //
-
- UINT64 m_state_io; // temporary buffer for state I/O
- bool m_using_legacy_state; // true if we are using the old-style state access
- bool m_inited;
+ cpu_get_info_func m_get_info;
+ address_space_config m_space_config[3]; // array of address space configs
+ void * m_token; // pointer to our state
+
+ cpu_set_info_func m_set_info; // extracted legacy function pointers
+ cpu_execute_func m_execute; //
+ cpu_burn_func m_burn; //
+ cpu_translate_func m_translate; //
+ cpu_read_func m_read; //
+ cpu_write_func m_write; //
+ cpu_readop_func m_readop; //
+ cpu_disassemble_func m_disassemble; //
+ cpu_state_io_func m_state_import; //
+ cpu_state_io_func m_state_export; //
+ cpu_string_io_func m_string_export; //
+ cpu_exit_func m_exit; //
+
+ UINT64 m_state_io; // temporary buffer for state I/O
+ bool m_using_legacy_state; // true if we are using the old-style state access
+ bool m_inited;
};
-#endif /* __CPUINTRF_H__ */
+#endif /* __CPUINTRF_H__ */
diff --git a/src/emu/devdelegate.h b/src/emu/devdelegate.h
index d641813a893..55e979cb6c8 100644
--- a/src/emu/devdelegate.h
+++ b/src/emu/devdelegate.h
@@ -103,4 +103,4 @@ public:
};
-#endif /* __DEVDELEGATE_H__ */
+#endif /* __DEVDELEGATE_H__ */
diff --git a/src/emu/device.c b/src/emu/device.c
index 24e52a3b630..50fe3d4dfa5 100644
--- a/src/emu/device.c
+++ b/src/emu/device.c
@@ -46,8 +46,8 @@
// CONSTANTS
//**************************************************************************
-#define TEMP_STRING_POOL_ENTRIES 16
-#define MAX_STRING_LENGTH 256
+#define TEMP_STRING_POOL_ENTRIES 16
+#define MAX_STRING_LENGTH 256
@@ -98,33 +98,33 @@ resource_pool &machine_get_pool(running_machine &machine)
device_t::device_t(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: m_type(type),
- m_name(name),
- m_owner(owner),
- m_next(NULL),
-
- m_interface_list(NULL),
- m_execute(NULL),
- m_memory(NULL),
- m_state(NULL),
-
- m_configured_clock(clock),
- m_unscaled_clock(clock),
- m_clock(clock),
- m_clock_scale(1.0),
- m_attoseconds_per_clock((clock == 0) ? 0 : HZ_TO_ATTOSECONDS(clock)),
-
- m_debug(NULL),
- m_region(NULL),
- m_machine_config(mconfig),
- m_static_config(NULL),
- m_input_defaults(NULL),
-
- m_machine(NULL),
- m_save(NULL),
- m_basetag(tag),
- m_config_complete(false),
- m_started(false),
- m_auto_finder_list(NULL)
+ m_name(name),
+ m_owner(owner),
+ m_next(NULL),
+
+ m_interface_list(NULL),
+ m_execute(NULL),
+ m_memory(NULL),
+ m_state(NULL),
+
+ m_configured_clock(clock),
+ m_unscaled_clock(clock),
+ m_clock(clock),
+ m_clock_scale(1.0),
+ m_attoseconds_per_clock((clock == 0) ? 0 : HZ_TO_ATTOSECONDS(clock)),
+
+ m_debug(NULL),
+ m_region(NULL),
+ m_machine_config(mconfig),
+ m_static_config(NULL),
+ m_input_defaults(NULL),
+
+ m_machine(NULL),
+ m_save(NULL),
+ m_basetag(tag),
+ m_config_complete(false),
+ m_started(false),
+ m_auto_finder_list(NULL)
{
if (owner != NULL)
m_tag.cpy((owner->owner() == NULL) ? "" : owner->tag()).cat(":").cat(tag);
@@ -136,35 +136,35 @@ device_t::device_t(const machine_config &mconfig, device_type type, const char *
device_t::device_t(const machine_config &mconfig, device_type type, const char *name, const char *shortname, const char *tag, device_t *owner, UINT32 clock)
: m_type(type),
- m_name(name),
- m_shortname(shortname),
- m_searchpath(shortname),
- m_owner(owner),
- m_next(NULL),
-
- m_interface_list(NULL),
- m_execute(NULL),
- m_memory(NULL),
- m_state(NULL),
-
- m_configured_clock(clock),
- m_unscaled_clock(clock),
- m_clock(clock),
- m_clock_scale(1.0),
- m_attoseconds_per_clock((clock == 0) ? 0 : HZ_TO_ATTOSECONDS(clock)),
-
- m_debug(NULL),
- m_region(NULL),
- m_machine_config(mconfig),
- m_static_config(NULL),
- m_input_defaults(NULL),
-
- m_machine(NULL),
- m_save(NULL),
- m_basetag(tag),
- m_config_complete(false),
- m_started(false),
- m_auto_finder_list(NULL)
+ m_name(name),
+ m_shortname(shortname),
+ m_searchpath(shortname),
+ m_owner(owner),
+ m_next(NULL),
+
+ m_interface_list(NULL),
+ m_execute(NULL),
+ m_memory(NULL),
+ m_state(NULL),
+
+ m_configured_clock(clock),
+ m_unscaled_clock(clock),
+ m_clock(clock),
+ m_clock_scale(1.0),
+ m_attoseconds_per_clock((clock == 0) ? 0 : HZ_TO_ATTOSECONDS(clock)),
+
+ m_debug(NULL),
+ m_region(NULL),
+ m_machine_config(mconfig),
+ m_static_config(NULL),
+ m_input_defaults(NULL),
+
+ m_machine(NULL),
+ m_save(NULL),
+ m_basetag(tag),
+ m_config_complete(false),
+ m_started(false),
+ m_auto_finder_list(NULL)
{
if (owner != NULL)
m_tag.cpy((owner->owner() == NULL) ? "" : owner->tag()).cat(":").cat(tag);
@@ -895,8 +895,8 @@ device_t::finder_base *device_t::register_auto_finder(finder_base &autodev)
device_t::finder_base::finder_base(device_t &base, const char *tag)
: m_next(base.register_auto_finder(*this)),
- m_base(base),
- m_tag(tag)
+ m_base(base),
+ m_tag(tag)
{
}
@@ -965,7 +965,7 @@ bool device_t::finder_base::report_missing(bool found, const char *objname, bool
device_interface::device_interface(device_t &device)
: m_interface_next(NULL),
- m_device(device)
+ m_device(device)
{
device_interface **tailptr;
for (tailptr = &device.m_interface_list; *tailptr != NULL; tailptr = &(*tailptr)->m_interface_next) ;
diff --git a/src/emu/device.h b/src/emu/device.h
index 638b577ed00..51132968ef9 100644
--- a/src/emu/device.h
+++ b/src/emu/device.h
@@ -53,7 +53,7 @@
//**************************************************************************
// macro for specifying a clock derived from an owning device
-#define DERIVED_CLOCK(num, den) (0xff000000 | ((num) << 12) | ((den) << 0))
+#define DERIVED_CLOCK(num, den) (0xff000000 | ((num) << 12) | ((den) << 0))
@@ -76,13 +76,13 @@
// macros for defining read_line/write_line functions
-#define READ_LINE_DEVICE_HANDLER(name) int name(ATTR_UNUSED device_t *device)
-#define WRITE_LINE_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED int state)
+#define READ_LINE_DEVICE_HANDLER(name) int name(ATTR_UNUSED device_t *device)
+#define WRITE_LINE_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED int state)
-#define DECLARE_READ_LINE_MEMBER(name) int name()
-#define READ_LINE_MEMBER(name) int name()
-#define DECLARE_WRITE_LINE_MEMBER(name) void name(ATTR_UNUSED int state)
-#define WRITE_LINE_MEMBER(name) void name(ATTR_UNUSED int state)
+#define DECLARE_READ_LINE_MEMBER(name) int name()
+#define READ_LINE_MEMBER(name) int name()
+#define DECLARE_WRITE_LINE_MEMBER(name) void name(ATTR_UNUSED int state)
+#define WRITE_LINE_MEMBER(name) void name(ATTR_UNUSED int state)
@@ -298,38 +298,38 @@ protected:
//------------------- end derived class overrides
// core device properties
- const device_type m_type; // device type
- astring m_name; // name of the device
- astring m_shortname; // short name of the device
- astring m_searchpath; // search path, used for media loading
+ const device_type m_type; // device type
+ astring m_name; // name of the device
+ astring m_shortname; // short name of the device
+ astring m_searchpath; // search path, used for media loading
// device relationships
- device_t * m_owner; // device that owns us
- device_t * m_next; // next device by the same owner (of any type/class)
- simple_list<device_t> m_subdevice_list; // list of sub-devices we own
- mutable tagmap_t<device_t *> m_device_map; // map of device names looked up and found
+ device_t * m_owner; // device that owns us
+ device_t * m_next; // next device by the same owner (of any type/class)
+ simple_list<device_t> m_subdevice_list; // list of sub-devices we own
+ mutable tagmap_t<device_t *> m_device_map; // map of device names looked up and found
// device interfaces
- device_interface * m_interface_list; // head of interface list
- device_execute_interface *m_execute; // pre-cached pointer to execute interface
- device_memory_interface *m_memory; // pre-cached pointer to memory interface
- device_state_interface *m_state; // pre-cached pointer to state interface
+ device_interface * m_interface_list; // head of interface list
+ device_execute_interface *m_execute; // pre-cached pointer to execute interface
+ device_memory_interface *m_memory; // pre-cached pointer to memory interface
+ device_state_interface *m_state; // pre-cached pointer to state interface
// device clocks
- UINT32 m_configured_clock; // originally configured device clock
- UINT32 m_unscaled_clock; // current unscaled device clock
- UINT32 m_clock; // current device clock, after scaling
- double m_clock_scale; // clock scale factor
- attoseconds_t m_attoseconds_per_clock;// period in attoseconds
-
- device_debug * m_debug;
- memory_region * m_region; // our device-local region
- const machine_config & m_machine_config; // reference to the machine's configuration
- const void * m_static_config; // static device configuration
+ UINT32 m_configured_clock; // originally configured device clock
+ UINT32 m_unscaled_clock; // current unscaled device clock
+ UINT32 m_clock; // current device clock, after scaling
+ double m_clock_scale; // clock scale factor
+ attoseconds_t m_attoseconds_per_clock;// period in attoseconds
+
+ device_debug * m_debug;
+ memory_region * m_region; // our device-local region
+ const machine_config & m_machine_config; // reference to the machine's configuration
+ const void * m_static_config; // static device configuration
const input_device_default *m_input_defaults; // devices input ports default overrides
- UINT8 m_system_bios; // the system BIOS we wish to load
- UINT8 m_default_bios; // the default system BIOS
+ UINT8 m_system_bios; // the system BIOS we wish to load
+ UINT8 m_default_bios; // the default system BIOS
private:
// private helpers
device_t *add_subdevice(device_type type, const char *tag, UINT32 clock);
@@ -338,13 +338,13 @@ private:
device_t *subdevice_slow(const char *tag) const;
// private state; accessor use required
- running_machine * m_machine;
- save_manager * m_save;
- astring m_tag; // full tag for this instance
- astring m_basetag; // base part of the tag
- bool m_config_complete; // have we completed our configuration?
- bool m_started; // true if the start function has succeeded
- finder_base * m_auto_finder_list; // list of objects to auto-find
+ running_machine * m_machine;
+ save_manager * m_save;
+ astring m_tag; // full tag for this instance
+ astring m_basetag; // base part of the tag
+ bool m_config_complete; // have we completed our configuration?
+ bool m_started; // true if the start function has succeeded
+ finder_base * m_auto_finder_list; // list of objects to auto-find
};
@@ -385,7 +385,7 @@ public:
// construction/destruction
object_finder_base(device_t &base, const char *tag)
: finder_base(base, tag),
- m_target(NULL) { }
+ m_target(NULL) { }
// operators to make use transparent
operator _ObjectClass *() const { return m_target; }
@@ -569,9 +569,9 @@ public:
// construction/destruction
shared_ptr_finder(device_t &base, const char *tag, UINT8 width = sizeof(_PointerType) * 8)
: object_finder_base<_PointerType>(base, tag),
- m_bytes(0),
- m_allocated(false),
- m_width(width) { }
+ m_bytes(0),
+ m_allocated(false),
+ m_width(width) { }
virtual ~shared_ptr_finder() { if (m_allocated) global_free(this->m_target); }
@@ -714,8 +714,8 @@ public:
protected:
// internal state
- device_interface * m_interface_next;
- device_t & m_device;
+ device_interface * m_interface_next;
+ device_t & m_device;
};
@@ -728,9 +728,9 @@ public:
// construction
device_iterator(device_t &root, int maxdepth = 255)
: m_root(&root),
- m_current(NULL),
- m_curdepth(0),
- m_maxdepth(maxdepth) { }
+ m_current(NULL),
+ m_curdepth(0),
+ m_maxdepth(maxdepth) { }
// getters
device_t *current() const { return m_current; }
@@ -808,10 +808,10 @@ public:
private:
// internal state
- device_t * m_root;
- device_t * m_current;
- int m_curdepth;
- int m_maxdepth;
+ device_t * m_root;
+ device_t * m_current;
+ int m_curdepth;
+ int m_maxdepth;
};
@@ -877,7 +877,7 @@ public:
private:
// internal state
- device_iterator m_iterator;
+ device_iterator m_iterator;
};
@@ -892,7 +892,7 @@ public:
// construction
device_interface_iterator(device_t &root, int maxdepth = 255)
: m_iterator(root, maxdepth),
- m_current(NULL) { }
+ m_current(NULL) { }
// getters
_InterfaceClass *current() const { return m_current; }
@@ -945,8 +945,8 @@ public:
private:
// internal state
- device_iterator m_iterator;
- _InterfaceClass * m_current;
+ device_iterator m_iterator;
+ _InterfaceClass * m_current;
};
@@ -1002,4 +1002,4 @@ inline device_t *device_t::siblingdevice(const char *tag) const
return (tag[0] == ':') ? subdevice(tag) : NULL;
}
-#endif /* __DEVINTRF_H__ */
+#endif /* __DEVINTRF_H__ */
diff --git a/src/emu/devlegcy.h b/src/emu/devlegcy.h
index 601760714a3..2c6d2661637 100644
--- a/src/emu/devlegcy.h
+++ b/src/emu/devlegcy.h
@@ -48,17 +48,17 @@
// MACROS
//**************************************************************************
-#define DEVICE_START_NAME(name) device_start_##name
-#define DEVICE_START(name) void DEVICE_START_NAME(name)(device_t *device)
-#define DEVICE_START_CALL(name) DEVICE_START_NAME(name)(device)
+#define DEVICE_START_NAME(name) device_start_##name
+#define DEVICE_START(name) void DEVICE_START_NAME(name)(device_t *device)
+#define DEVICE_START_CALL(name) DEVICE_START_NAME(name)(device)
-#define DEVICE_STOP_NAME(name) device_stop_##name
-#define DEVICE_STOP(name) void DEVICE_STOP_NAME(name)(device_t *device)
-#define DEVICE_STOP_CALL(name) DEVICE_STOP_NAME(name)(device)
+#define DEVICE_STOP_NAME(name) device_stop_##name
+#define DEVICE_STOP(name) void DEVICE_STOP_NAME(name)(device_t *device)
+#define DEVICE_STOP_CALL(name) DEVICE_STOP_NAME(name)(device)
-#define DEVICE_RESET_NAME(name) device_reset_##name
-#define DEVICE_RESET(name) void DEVICE_RESET_NAME(name)(device_t *device)
-#define DEVICE_RESET_CALL(name) DEVICE_RESET_NAME(name)(device)
+#define DEVICE_RESET_NAME(name) device_reset_##name
+#define DEVICE_RESET(name) void DEVICE_RESET_NAME(name)(device_t *device)
+#define DEVICE_RESET_CALL(name) DEVICE_RESET_NAME(name)(device)
//**************************************************************************
// TYPE DEFINITIONS
@@ -68,4 +68,4 @@ class device_t;
typedef void (*device_start_func)(device_t *device);
-#endif /* __DEVLEGCY_H__ */
+#endif /* __DEVLEGCY_H__ */
diff --git a/src/emu/didisasm.h b/src/emu/didisasm.h
index ade6827cd72..18226472e80 100644
--- a/src/emu/didisasm.h
+++ b/src/emu/didisasm.h
@@ -52,12 +52,12 @@
//**************************************************************************
// Disassembler constants
-const UINT32 DASMFLAG_SUPPORTED = 0x80000000; // are disassembly flags supported?
-const UINT32 DASMFLAG_STEP_OUT = 0x40000000; // this instruction should be the end of a step out sequence
-const UINT32 DASMFLAG_STEP_OVER = 0x20000000; // this instruction should be stepped over by setting a breakpoint afterwards
-const UINT32 DASMFLAG_OVERINSTMASK = 0x18000000; // number of extra instructions to skip when stepping over
-const UINT32 DASMFLAG_OVERINSTSHIFT = 27; // bits to shift after masking to get the value
-const UINT32 DASMFLAG_LENGTHMASK = 0x0000ffff; // the low 16-bits contain the actual length
+const UINT32 DASMFLAG_SUPPORTED = 0x80000000; // are disassembly flags supported?
+const UINT32 DASMFLAG_STEP_OUT = 0x40000000; // this instruction should be the end of a step out sequence
+const UINT32 DASMFLAG_STEP_OVER = 0x20000000; // this instruction should be stepped over by setting a breakpoint afterwards
+const UINT32 DASMFLAG_OVERINSTMASK = 0x18000000; // number of extra instructions to skip when stepping over
+const UINT32 DASMFLAG_OVERINSTSHIFT = 27; // bits to shift after masking to get the value
+const UINT32 DASMFLAG_LENGTHMASK = 0x0000ffff; // the low 16-bits contain the actual length
@@ -65,7 +65,7 @@ const UINT32 DASMFLAG_LENGTHMASK = 0x0000ffff; // the low 16-bits contain the ac
// MACROS
//**************************************************************************
-#define DASMFLAG_STEP_OVER_EXTRA(x) ((x) << DASMFLAG_OVERINSTSHIFT)
+#define DASMFLAG_STEP_OVER_EXTRA(x) ((x) << DASMFLAG_OVERINSTSHIFT)
@@ -102,4 +102,4 @@ protected:
typedef device_interface_iterator<device_disasm_interface> disasm_interface_iterator;
-#endif /* __DIDISASM_H__ */
+#endif /* __DIDISASM_H__ */
diff --git a/src/emu/diexec.c b/src/emu/diexec.c
index 44b2c40e0c7..58b2316f1af 100644
--- a/src/emu/diexec.c
+++ b/src/emu/diexec.c
@@ -47,9 +47,9 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define TEMPLOG 0
+#define TEMPLOG 0
@@ -57,8 +57,8 @@
// CONSTANTS
//**************************************************************************
-const int TRIGGER_INT = -2000;
-const int TRIGGER_SUSPENDTIME = -4000;
+const int TRIGGER_INT = -2000;
+const int TRIGGER_SUSPENDTIME = -4000;
@@ -72,30 +72,30 @@ const int TRIGGER_SUSPENDTIME = -4000;
device_execute_interface::device_execute_interface(const machine_config &mconfig, device_t &device)
: device_interface(device),
- m_disabled(false),
- m_vblank_interrupt_legacy(NULL),
- m_vblank_interrupt_screen(NULL),
- m_timed_interrupt_legacy(NULL),
- m_timed_interrupt_period(attotime::zero),
- m_is_octal(false),
- m_nextexec(NULL),
- m_driver_irq(0),
- m_timedint_timer(NULL),
- m_profiler(PROFILER_IDLE),
- m_icountptr(NULL),
- m_cycles_running(0),
- m_cycles_stolen(0),
- m_suspend(0),
- m_nextsuspend(0),
- m_eatcycles(0),
- m_nexteatcycles(0),
- m_trigger(0),
- m_inttrigger(0),
- m_totalcycles(0),
- m_divisor(0),
- m_divshift(0),
- m_cycles_per_second(0),
- m_attoseconds_per_cycle(0)
+ m_disabled(false),
+ m_vblank_interrupt_legacy(NULL),
+ m_vblank_interrupt_screen(NULL),
+ m_timed_interrupt_legacy(NULL),
+ m_timed_interrupt_period(attotime::zero),
+ m_is_octal(false),
+ m_nextexec(NULL),
+ m_driver_irq(0),
+ m_timedint_timer(NULL),
+ m_profiler(PROFILER_IDLE),
+ m_icountptr(NULL),
+ m_cycles_running(0),
+ m_cycles_stolen(0),
+ m_suspend(0),
+ m_nextsuspend(0),
+ m_eatcycles(0),
+ m_nexteatcycles(0),
+ m_trigger(0),
+ m_inttrigger(0),
+ m_totalcycles(0),
+ m_divisor(0),
+ m_divshift(0),
+ m_cycles_per_second(0),
+ m_attoseconds_per_cycle(0)
{
memset(&m_localtime, 0, sizeof(m_localtime));
@@ -747,12 +747,12 @@ void device_execute_interface::trigger_periodic_interrupt()
device_execute_interface::device_input::device_input()
: m_execute(NULL),
- m_device(NULL),
- m_linenum(0),
- m_stored_vector(0),
- m_curvector(0),
- m_curstate(CLEAR_LINE),
- m_qindex(0)
+ m_device(NULL),
+ m_linenum(0),
+ m_stored_vector(0),
+ m_curvector(0),
+ m_curstate(CLEAR_LINE),
+ m_qindex(0)
{
memset(m_queue, 0, sizeof(m_queue));
}
diff --git a/src/emu/diexec.h b/src/emu/diexec.h
index a27ab6ec09b..5ba27962c02 100644
--- a/src/emu/diexec.h
+++ b/src/emu/diexec.h
@@ -52,22 +52,22 @@
//**************************************************************************
// suspension reasons for executing devices
-const UINT32 SUSPEND_REASON_HALT = 0x0001; // HALT line set (or equivalent)
-const UINT32 SUSPEND_REASON_RESET = 0x0002; // RESET line set (or equivalent)
-const UINT32 SUSPEND_REASON_SPIN = 0x0004; // currently spinning
-const UINT32 SUSPEND_REASON_TRIGGER = 0x0008; // waiting for a trigger
-const UINT32 SUSPEND_REASON_DISABLE = 0x0010; // disabled (due to disable flag)
-const UINT32 SUSPEND_REASON_TIMESLICE = 0x0020; // waiting for the next timeslice
-const UINT32 SUSPEND_ANY_REASON = ~0; // all of the above
+const UINT32 SUSPEND_REASON_HALT = 0x0001; // HALT line set (or equivalent)
+const UINT32 SUSPEND_REASON_RESET = 0x0002; // RESET line set (or equivalent)
+const UINT32 SUSPEND_REASON_SPIN = 0x0004; // currently spinning
+const UINT32 SUSPEND_REASON_TRIGGER = 0x0008; // waiting for a trigger
+const UINT32 SUSPEND_REASON_DISABLE = 0x0010; // disabled (due to disable flag)
+const UINT32 SUSPEND_REASON_TIMESLICE = 0x0020; // waiting for the next timeslice
+const UINT32 SUSPEND_ANY_REASON = ~0; // all of the above
// I/O line states
enum line_state
{
- CLEAR_LINE = 0, // clear (a fired or held) line
- ASSERT_LINE, // assert an interrupt immediately
- HOLD_LINE, // hold interrupt line until acknowledged
- PULSE_LINE // pulse interrupt line instantaneously (only for NMI, RESET)
+ CLEAR_LINE = 0, // clear (a fired or held) line
+ ASSERT_LINE, // assert an interrupt immediately
+ HOLD_LINE, // hold interrupt line until acknowledged
+ PULSE_LINE // pulse interrupt line instantaneously (only for NMI, RESET)
};
@@ -100,11 +100,11 @@ enum
//**************************************************************************
// IRQ callback to be called by device implementations when an IRQ is actually taken
-#define IRQ_CALLBACK(func) int func(device_t *device, int irqline)
+#define IRQ_CALLBACK(func) int func(device_t *device, int irqline)
// interrupt generator callback called as a VBLANK or periodic interrupt
-#define INTERRUPT_GEN(func) void func(device_t *device)
-#define INTERRUPT_GEN_MEMBER(func) void func(device_t &device)
+#define INTERRUPT_GEN(func) void func(device_t *device)
+#define INTERRUPT_GEN_MEMBER(func) void func(device_t &device)
@@ -124,7 +124,7 @@ enum
#define MCFG_DEVICE_VBLANK_INT_DEVICE(_devtag, _tag, _class, _func) \
device_execute_interface::static_set_vblank_int(*device, device_interrupt_delegate(&_class::_func, #_class "::" #_func, _devtag, (_class *)0), _tag); \
-#define MCFG_DEVICE_PERIODIC_INT(_func, _rate) \
+#define MCFG_DEVICE_PERIODIC_INT(_func, _rate) \
device_execute_interface::static_set_periodic_int(*device, _func, attotime::from_hz(_rate)); \
#define MCFG_DEVICE_PERIODIC_INT_DRIVER(_class, _func, _rate) \
@@ -271,14 +271,14 @@ protected:
int default_irq_callback();
device_execute_interface *m_execute;// pointer to the execute interface
- device_t * m_device; // pointer to our device
- int m_linenum; // which input line we are
+ device_t * m_device; // pointer to our device
+ int m_linenum; // which input line we are
- INT32 m_stored_vector; // most recently written vector
- INT32 m_curvector; // most recently processed vector
- UINT8 m_curstate; // most recently processed state
- INT32 m_queue[32]; // queue of pending events
- int m_qindex; // index within the queue
+ INT32 m_stored_vector; // most recently written vector
+ INT32 m_curvector; // most recently processed vector
+ UINT8 m_curstate; // most recently processed state
+ INT32 m_queue[32]; // queue of pending events
+ int m_qindex; // index within the queue
private:
static void static_empty_event_queue(running_machine &machine, void *ptr, int param);
@@ -286,44 +286,44 @@ protected:
};
// configuration
- bool m_disabled; // disabled from executing?
- device_interrupt_delegate m_vblank_interrupt; // for interrupts tied to VBLANK
- device_interrupt_func m_vblank_interrupt_legacy; // for interrupts tied to VBLANK
- const char * m_vblank_interrupt_screen; // the screen that causes the VBLANK interrupt
- device_interrupt_delegate m_timed_interrupt; // for interrupts not tied to VBLANK
- device_interrupt_func m_timed_interrupt_legacy; // for interrupts not tied to VBLANK
- attotime m_timed_interrupt_period; // period for periodic interrupts
- bool m_is_octal; // to determine if messages/debugger will show octal or hex
+ bool m_disabled; // disabled from executing?
+ device_interrupt_delegate m_vblank_interrupt; // for interrupts tied to VBLANK
+ device_interrupt_func m_vblank_interrupt_legacy; // for interrupts tied to VBLANK
+ const char * m_vblank_interrupt_screen; // the screen that causes the VBLANK interrupt
+ device_interrupt_delegate m_timed_interrupt; // for interrupts not tied to VBLANK
+ device_interrupt_func m_timed_interrupt_legacy; // for interrupts not tied to VBLANK
+ attotime m_timed_interrupt_period; // period for periodic interrupts
+ bool m_is_octal; // to determine if messages/debugger will show octal or hex
// execution lists
- device_execute_interface *m_nextexec; // pointer to the next device to execute, in order
+ device_execute_interface *m_nextexec; // pointer to the next device to execute, in order
// input states and IRQ callbacks
- device_irq_acknowledge_callback m_driver_irq; // driver-specific IRQ callback
- device_input m_input[MAX_INPUT_LINES]; // data about inputs
- emu_timer * m_timedint_timer; // reference to this device's periodic interrupt timer
+ device_irq_acknowledge_callback m_driver_irq; // driver-specific IRQ callback
+ device_input m_input[MAX_INPUT_LINES]; // data about inputs
+ emu_timer * m_timedint_timer; // reference to this device's periodic interrupt timer
// cycle counting and executing
- profile_type m_profiler; // profiler tag
- int * m_icountptr; // pointer to the icount
- int m_cycles_running; // number of cycles we are executing
- int m_cycles_stolen; // number of cycles we artificially stole
+ profile_type m_profiler; // profiler tag
+ int * m_icountptr; // pointer to the icount
+ int m_cycles_running; // number of cycles we are executing
+ int m_cycles_stolen; // number of cycles we artificially stole
// suspend states
- UINT32 m_suspend; // suspend reason mask (0 = not suspended)
- UINT32 m_nextsuspend; // pending suspend reason mask
- UINT8 m_eatcycles; // true if we eat cycles while suspended
- UINT8 m_nexteatcycles; // pending value
- INT32 m_trigger; // pending trigger to release a trigger suspension
- INT32 m_inttrigger; // interrupt trigger index
+ UINT32 m_suspend; // suspend reason mask (0 = not suspended)
+ UINT32 m_nextsuspend; // pending suspend reason mask
+ UINT8 m_eatcycles; // true if we eat cycles while suspended
+ UINT8 m_nexteatcycles; // pending value
+ INT32 m_trigger; // pending trigger to release a trigger suspension
+ INT32 m_inttrigger; // interrupt trigger index
// clock and timing information
- UINT64 m_totalcycles; // total device cycles executed
- attotime m_localtime; // local time, relative to the timer system's global time
- INT32 m_divisor; // 32-bit attoseconds_per_cycle divisor
- UINT8 m_divshift; // right shift amount to fit the divisor into 32 bits
- UINT32 m_cycles_per_second; // cycles per second, adjusted for multipliers
- attoseconds_t m_attoseconds_per_cycle; // attoseconds per adjusted clock cycle
+ UINT64 m_totalcycles; // total device cycles executed
+ attotime m_localtime; // local time, relative to the timer system's global time
+ INT32 m_divisor; // 32-bit attoseconds_per_cycle divisor
+ UINT8 m_divshift; // right shift amount to fit the divisor into 32 bits
+ UINT32 m_cycles_per_second; // cycles per second, adjusted for multipliers
+ attoseconds_t m_attoseconds_per_cycle; // attoseconds per adjusted clock cycle
private:
// callbacks
@@ -341,4 +341,4 @@ private:
typedef device_interface_iterator<device_execute_interface> execute_interface_iterator;
-#endif /* __DIEXEC_H__ */
+#endif /* __DIEXEC_H__ */
diff --git a/src/emu/diimage.c b/src/emu/diimage.c
index ef6614efaba..f4e7f547564 100644
--- a/src/emu/diimage.c
+++ b/src/emu/diimage.c
@@ -50,23 +50,23 @@
//**************************************************************************
const image_device_type_info device_image_interface::m_device_info_array[] =
{
- { IO_UNKNOWN, "unknown", "unkn" },
- { IO_CARTSLOT, "cartridge", "cart" }, /* 0 */
- { IO_FLOPPY, "floppydisk", "flop" }, /* 1 */
- { IO_HARDDISK, "harddisk", "hard" }, /* 2 */
- { IO_CYLINDER, "cylinder", "cyln" }, /* 3 */
- { IO_CASSETTE, "cassette", "cass" }, /* 4 */
- { IO_PUNCHCARD, "punchcard", "pcrd" }, /* 5 */
- { IO_PUNCHTAPE, "punchtape", "ptap" }, /* 6 */
- { IO_PRINTER, "printer", "prin" }, /* 7 */
- { IO_SERIAL, "serial", "serl" }, /* 8 */
- { IO_PARALLEL, "parallel", "parl" }, /* 9 */
- { IO_SNAPSHOT, "snapshot", "dump" }, /* 10 */
- { IO_QUICKLOAD, "quickload", "quik" }, /* 11 */
- { IO_MEMCARD, "memcard", "memc" }, /* 12 */
+ { IO_UNKNOWN, "unknown", "unkn" },
+ { IO_CARTSLOT, "cartridge", "cart" }, /* 0 */
+ { IO_FLOPPY, "floppydisk", "flop" }, /* 1 */
+ { IO_HARDDISK, "harddisk", "hard" }, /* 2 */
+ { IO_CYLINDER, "cylinder", "cyln" }, /* 3 */
+ { IO_CASSETTE, "cassette", "cass" }, /* 4 */
+ { IO_PUNCHCARD, "punchcard", "pcrd" }, /* 5 */
+ { IO_PUNCHTAPE, "punchtape", "ptap" }, /* 6 */
+ { IO_PRINTER, "printer", "prin" }, /* 7 */
+ { IO_SERIAL, "serial", "serl" }, /* 8 */
+ { IO_PARALLEL, "parallel", "parl" }, /* 9 */
+ { IO_SNAPSHOT, "snapshot", "dump" }, /* 10 */
+ { IO_QUICKLOAD, "quickload", "quik" }, /* 11 */
+ { IO_MEMCARD, "memcard", "memc" }, /* 12 */
{ IO_CDROM, "cdrom", "cdrm" }, /* 13 */
- { IO_MAGTAPE, "magtape", "magt" }, /* 14 */
- { IO_ROM, "romimage", "rom" }, /* 15 */
+ { IO_MAGTAPE, "magtape", "magt" }, /* 14 */
+ { IO_ROM, "romimage", "rom" }, /* 15 */
};
@@ -80,16 +80,16 @@ const image_device_type_info device_image_interface::m_device_info_array[] =
device_image_interface::device_image_interface(const machine_config &mconfig, device_t &device)
: device_interface(device),
- m_file(NULL),
- m_mame_file(NULL),
- m_full_software_name(NULL),
- m_software_info_ptr(NULL),
- m_software_part_ptr(NULL),
- m_software_list_name(NULL),
- m_readonly(false),
- m_created(false),
- m_formatlist(NULL),
- m_is_loading(FALSE)
+ m_file(NULL),
+ m_mame_file(NULL),
+ m_full_software_name(NULL),
+ m_software_info_ptr(NULL),
+ m_software_part_ptr(NULL),
+ m_software_list_name(NULL),
+ m_readonly(false),
+ m_created(false),
+ m_formatlist(NULL),
+ m_is_loading(FALSE)
{
}
@@ -100,7 +100,7 @@ device_image_interface::device_image_interface(const machine_config &mconfig, de
device_image_interface::~device_image_interface()
{
- image_device_format **formatptr = &m_formatlist;
+ image_device_format **formatptr = &m_formatlist;
/* free all entries */
while (*formatptr != NULL)
@@ -187,8 +187,8 @@ void device_image_interface::device_compute_hash(hash_collection &hashes, const
image_error_t device_image_interface::set_image_filename(const char *filename)
{
- m_image_name = filename;
- zippath_parent(m_working_directory, filename);
+ m_image_name = filename;
+ zippath_parent(m_working_directory, filename);
m_basename.cpy(m_image_name);
int loc1 = m_image_name.rchr(0,'\\');
@@ -215,7 +215,7 @@ image_error_t device_image_interface::set_image_filename(const char *filename)
m_filetype = m_filetype.substr(loc + 1,m_filetype.len()-loc);
}
- return IMAGE_ERROR_SUCCESS;
+ return IMAGE_ERROR_SUCCESS;
}
/****************************************************************************
@@ -230,10 +230,10 @@ image_error_t device_image_interface::set_image_filename(const char *filename)
const image_device_format *device_image_interface::device_get_indexed_creatable_format(int index)
{
- const image_device_format *format = device_get_creatable_formats();
- while(index-- && (format != NULL))
- format = format->m_next;
- return format;
+ const image_device_format *format = device_get_creatable_formats();
+ while(index-- && (format != NULL))
+ format = format->m_next;
+ return format;
}
@@ -246,10 +246,10 @@ const image_device_format *device_image_interface::device_get_indexed_creatable_
const image_device_format *device_image_interface::device_get_named_creatable_format(const char *format_name)
{
- const image_device_format *format = device_get_creatable_formats();
- while((format != NULL) && strcmp(format->m_name, format_name))
- format = format->m_next;
- return format;
+ const image_device_format *format = device_get_creatable_formats();
+ while((format != NULL) && strcmp(format->m_name, format_name))
+ format = format->m_next;
+ return format;
}
/****************************************************************************
@@ -263,11 +263,11 @@ const image_device_format *device_image_interface::device_get_named_creatable_fo
void device_image_interface::clear_error()
{
- m_err = IMAGE_ERROR_SUCCESS;
- if (m_err_message)
- {
- m_err_message.reset();
- }
+ m_err = IMAGE_ERROR_SUCCESS;
+ if (m_err_message)
+ {
+ m_err_message.reset();
+ }
}
@@ -290,7 +290,7 @@ static const char *const messages[] =
const char *device_image_interface::error()
{
- return (m_err_message) ? m_err_message.cstr() : messages[m_err];
+ return (m_err_message) ? m_err_message.cstr() : messages[m_err];
}
@@ -301,12 +301,12 @@ const char *device_image_interface::error()
void device_image_interface::seterror(image_error_t err, const char *message)
{
- clear_error();
- m_err = err;
- if (message != NULL)
- {
- m_err_message = message;
- }
+ clear_error();
+ m_err = err;
+ if (message != NULL)
+ {
+ m_err_message = message;
+ }
}
@@ -318,18 +318,18 @@ void device_image_interface::seterror(image_error_t err, const char *message)
void device_image_interface::message(const char *format, ...)
{
- va_list args;
- char buffer[256];
-
- /* format the message */
- va_start(args, format);
- vsnprintf(buffer, ARRAY_LENGTH(buffer), format, args);
- va_end(args);
-
- /* display the popup for a standard amount of time */
- ui_popup_time(5, "%s: %s",
- basename(),
- buffer);
+ va_list args;
+ char buffer[256];
+
+ /* format the message */
+ va_start(args, format);
+ vsnprintf(buffer, ARRAY_LENGTH(buffer), format, args);
+ va_end(args);
+
+ /* display the popup for a standard amount of time */
+ ui_popup_time(5, "%s: %s",
+ basename(),
+ buffer);
}
@@ -344,31 +344,31 @@ void device_image_interface::message(const char *format, ...)
-------------------------------------------------*/
bool device_image_interface::try_change_working_directory(const char *subdir)
{
- osd_directory *directory;
- const osd_directory_entry *entry;
- bool success = FALSE;
- bool done = FALSE;
-
- directory = osd_opendir(m_working_directory.cstr());
- if (directory != NULL)
- {
- while(!done && (entry = osd_readdir(directory)) != NULL)
- {
- if (!mame_stricmp(subdir, entry->name))
- {
- done = TRUE;
- success = entry->type == ENTTYPE_DIR;
- }
- }
-
- osd_closedir(directory);
- }
-
- /* did we successfully identify the directory? */
- if (success)
- zippath_combine(m_working_directory, m_working_directory, subdir);
-
- return success;
+ osd_directory *directory;
+ const osd_directory_entry *entry;
+ bool success = FALSE;
+ bool done = FALSE;
+
+ directory = osd_opendir(m_working_directory.cstr());
+ if (directory != NULL)
+ {
+ while(!done && (entry = osd_readdir(directory)) != NULL)
+ {
+ if (!mame_stricmp(subdir, entry->name))
+ {
+ done = TRUE;
+ success = entry->type == ENTTYPE_DIR;
+ }
+ }
+
+ osd_closedir(directory);
+ }
+
+ /* did we successfully identify the directory? */
+ if (success)
+ zippath_combine(m_working_directory, m_working_directory, subdir);
+
+ return success;
}
/*-------------------------------------------------
setup_working_directory - sets up the working
@@ -380,19 +380,19 @@ void device_image_interface::setup_working_directory()
char *dst = NULL;
osd_get_full_path(&dst,".");
- /* first set up the working directory to be the starting directory */
- m_working_directory = dst;
-
- /* now try browsing down to "software" */
- if (try_change_working_directory("software"))
- {
- /* now down to a directory for this computer */
- int gamedrv = driver_list::find(device().machine().system());
- while(gamedrv != -1 && !try_change_working_directory(driver_list::driver(gamedrv).name))
- {
- gamedrv = driver_list::compatible_with(gamedrv);
- }
- }
+ /* first set up the working directory to be the starting directory */
+ m_working_directory = dst;
+
+ /* now try browsing down to "software" */
+ if (try_change_working_directory("software"))
+ {
+ /* now down to a directory for this computer */
+ int gamedrv = driver_list::find(device().machine().system());
+ while(gamedrv != -1 && !try_change_working_directory(driver_list::driver(gamedrv).name))
+ {
+ gamedrv = driver_list::compatible_with(gamedrv);
+ }
+ }
osd_free(dst);
}
@@ -404,11 +404,11 @@ void device_image_interface::setup_working_directory()
const char * device_image_interface::working_directory()
{
- /* check to see if we've never initialized the working directory */
- if (!m_working_directory)
- setup_working_directory();
+ /* check to see if we've never initialized the working directory */
+ if (!m_working_directory)
+ setup_working_directory();
- return m_working_directory;
+ return m_working_directory;
}
@@ -434,10 +434,10 @@ UINT8 *device_image_interface::get_software_region(const char *tag)
UINT32 device_image_interface::get_software_region_length(const char *tag)
{
- char full_tag[256];
+ char full_tag[256];
- sprintf( full_tag, "%s:%s", device().tag(), tag );
- return device().machine().root_device().memregion( full_tag )->bytes();
+ sprintf( full_tag, "%s:%s", device().tag(), tag );
+ return device().machine().root_device().memregion( full_tag )->bytes();
}
@@ -469,66 +469,66 @@ const char *device_image_interface::get_feature(const char *feature_name)
****************************************************************************/
void device_image_interface::run_hash(void (*partialhash)(hash_collection &, const unsigned char *, unsigned long, const char *),
- hash_collection &hashes, const char *types)
+ hash_collection &hashes, const char *types)
{
- UINT32 size;
- UINT8 *buf = NULL;
+ UINT32 size;
+ UINT8 *buf = NULL;
- hashes.reset();
- size = (UINT32) length();
+ hashes.reset();
+ size = (UINT32) length();
- buf = (UINT8*)malloc(size);
+ buf = (UINT8*)malloc(size);
memset(buf,0,size);
- /* read the file */
- fseek(0, SEEK_SET);
- fread(buf, size);
+ /* read the file */
+ fseek(0, SEEK_SET);
+ fread(buf, size);
- if (partialhash)
- partialhash(hashes, buf, size, types);
- else
- hashes.compute(buf, size, types);
+ if (partialhash)
+ partialhash(hashes, buf, size, types);
+ else
+ hashes.compute(buf, size, types);
- /* cleanup */
- free(buf);
- fseek(0, SEEK_SET);
+ /* cleanup */
+ free(buf);
+ fseek(0, SEEK_SET);
}
void device_image_interface::image_checkhash()
{
- device_image_partialhash_func partialhash;
+ device_image_partialhash_func partialhash;
- /* only calculate CRC if it hasn't been calculated, and the open_mode is read only */
- UINT32 crcval;
- if (!m_hash.crc(crcval) && m_readonly && !m_created)
- {
- /* do not cause a linear read of 600 megs please */
- /* TODO: use SHA1 in the CHD header as the hash */
- if (image_type() == IO_CDROM)
- return;
+ /* only calculate CRC if it hasn't been calculated, and the open_mode is read only */
+ UINT32 crcval;
+ if (!m_hash.crc(crcval) && m_readonly && !m_created)
+ {
+ /* do not cause a linear read of 600 megs please */
+ /* TODO: use SHA1 in the CHD header as the hash */
+ if (image_type() == IO_CDROM)
+ return;
/* Skip calculating the hash when we have an image mounted through a software list */
if ( m_software_info_ptr )
return;
- /* retrieve the partial hash func */
- partialhash = get_partial_hash();
+ /* retrieve the partial hash func */
+ partialhash = get_partial_hash();
- run_hash(partialhash, m_hash, hash_collection::HASH_TYPES_ALL);
- }
- return;
+ run_hash(partialhash, m_hash, hash_collection::HASH_TYPES_ALL);
+ }
+ return;
}
UINT32 device_image_interface::crc()
{
- UINT32 crc = 0;
+ UINT32 crc = 0;
image_checkhash();
- m_hash.crc(crc);
+ m_hash.crc(crc);
- return crc;
+ return crc;
}
/****************************************************************************
@@ -547,9 +547,9 @@ UINT32 device_image_interface::crc()
-------------------------------------------------*/
void device_image_interface::battery_load(void *buffer, int length, int fill)
{
- astring fname(device().machine().system().name, PATH_SEPARATOR, m_basename_noext, ".nv");
+ astring fname(device().machine().system().name, PATH_SEPARATOR, m_basename_noext, ".nv");
- image_battery_load_by_name(device().machine().options(), fname, buffer, length, fill);
+ image_battery_load_by_name(device().machine().options(), fname, buffer, length, fill);
}
/*-------------------------------------------------
@@ -560,9 +560,9 @@ void device_image_interface::battery_load(void *buffer, int length, int fill)
-------------------------------------------------*/
void device_image_interface::battery_save(const void *buffer, int length)
{
- astring fname(device().machine().system().name, PATH_SEPARATOR, m_basename_noext, ".nv");
+ astring fname(device().machine().system().name, PATH_SEPARATOR, m_basename_noext, ".nv");
- image_battery_save_by_name(device().machine().options(), fname, buffer, length);
+ image_battery_save_by_name(device().machine().options(), fname, buffer, length);
}
//-------------------------------------------------
@@ -572,10 +572,10 @@ void device_image_interface::battery_save(const void *buffer, int length)
bool device_image_interface::uses_file_extension(const char *file_extension) const
{
- bool result = FALSE;
+ bool result = FALSE;
if (file_extension[0] == '.')
- file_extension++;
+ file_extension++;
/* find the extensions */
astring extensions(file_extensions());
@@ -583,13 +583,13 @@ bool device_image_interface::uses_file_extension(const char *file_extension) con
while (ext != NULL)
{
if (!mame_stricmp(ext, file_extension))
- {
- result = TRUE;
- break;
- }
+ {
+ result = TRUE;
+ break;
+ }
ext = strtok (NULL, ",");
}
- return result;
+ return result;
}
/****************************************************************************
@@ -603,7 +603,7 @@ bool device_image_interface::uses_file_extension(const char *file_extension) con
bool device_image_interface::is_loaded()
{
- return (m_file != NULL);
+ return (m_file != NULL);
}
/*-------------------------------------------------
@@ -613,53 +613,53 @@ bool device_image_interface::is_loaded()
image_error_t device_image_interface::load_image_by_path(UINT32 open_flags, const char *path)
{
- file_error filerr = FILERR_NOT_FOUND;
- image_error_t err = IMAGE_ERROR_FILENOTFOUND;
- astring revised_path;
-
- /* attempt to read the file */
- filerr = zippath_fopen(path, open_flags, m_file, revised_path);
-
- /* did the open succeed? */
- switch(filerr)
- {
- case FILERR_NONE:
- /* success! */
- m_readonly = (open_flags & OPEN_FLAG_WRITE) ? 0 : 1;
- m_created = (open_flags & OPEN_FLAG_CREATE) ? 1 : 0;
- err = IMAGE_ERROR_SUCCESS;
- break;
-
- case FILERR_NOT_FOUND:
- case FILERR_ACCESS_DENIED:
- /* file not found (or otherwise cannot open); continue */
- err = IMAGE_ERROR_FILENOTFOUND;
- break;
-
- case FILERR_OUT_OF_MEMORY:
- /* out of memory */
- err = IMAGE_ERROR_OUTOFMEMORY;
- break;
-
- case FILERR_ALREADY_OPEN:
- /* this shouldn't happen */
- err = IMAGE_ERROR_ALREADYOPEN;
- break;
-
- case FILERR_FAILURE:
- case FILERR_TOO_MANY_FILES:
- case FILERR_INVALID_DATA:
- default:
- /* other errors */
- err = IMAGE_ERROR_INTERNAL;
- break;
- }
-
- /* if successful, set the file name */
- if (filerr == FILERR_NONE)
- set_image_filename(revised_path);
-
- return err;
+ file_error filerr = FILERR_NOT_FOUND;
+ image_error_t err = IMAGE_ERROR_FILENOTFOUND;
+ astring revised_path;
+
+ /* attempt to read the file */
+ filerr = zippath_fopen(path, open_flags, m_file, revised_path);
+
+ /* did the open succeed? */
+ switch(filerr)
+ {
+ case FILERR_NONE:
+ /* success! */
+ m_readonly = (open_flags & OPEN_FLAG_WRITE) ? 0 : 1;
+ m_created = (open_flags & OPEN_FLAG_CREATE) ? 1 : 0;
+ err = IMAGE_ERROR_SUCCESS;
+ break;
+
+ case FILERR_NOT_FOUND:
+ case FILERR_ACCESS_DENIED:
+ /* file not found (or otherwise cannot open); continue */
+ err = IMAGE_ERROR_FILENOTFOUND;
+ break;
+
+ case FILERR_OUT_OF_MEMORY:
+ /* out of memory */
+ err = IMAGE_ERROR_OUTOFMEMORY;
+ break;
+
+ case FILERR_ALREADY_OPEN:
+ /* this shouldn't happen */
+ err = IMAGE_ERROR_ALREADYOPEN;
+ break;
+
+ case FILERR_FAILURE:
+ case FILERR_TOO_MANY_FILES:
+ case FILERR_INVALID_DATA:
+ default:
+ /* other errors */
+ err = IMAGE_ERROR_INTERNAL;
+ break;
+ }
+
+ /* if successful, set the file name */
+ if (filerr == FILERR_NONE)
+ set_image_filename(revised_path);
+
+ return err;
}
int device_image_interface::reopen_for_write(const char *path)
@@ -667,53 +667,53 @@ int device_image_interface::reopen_for_write(const char *path)
if(m_file)
core_fclose(m_file);
- file_error filerr = FILERR_NOT_FOUND;
- image_error_t err = IMAGE_ERROR_FILENOTFOUND;
- astring revised_path;
-
- /* attempt to open the file for writing*/
- filerr = zippath_fopen(path, OPEN_FLAG_READ|OPEN_FLAG_WRITE|OPEN_FLAG_CREATE, m_file, revised_path);
-
- /* did the open succeed? */
- switch(filerr)
- {
- case FILERR_NONE:
- /* success! */
- m_readonly = 0;
- m_created = 1;
- err = IMAGE_ERROR_SUCCESS;
- break;
-
- case FILERR_NOT_FOUND:
- case FILERR_ACCESS_DENIED:
- /* file not found (or otherwise cannot open); continue */
- err = IMAGE_ERROR_FILENOTFOUND;
- break;
-
- case FILERR_OUT_OF_MEMORY:
- /* out of memory */
- err = IMAGE_ERROR_OUTOFMEMORY;
- break;
-
- case FILERR_ALREADY_OPEN:
- /* this shouldn't happen */
- err = IMAGE_ERROR_ALREADYOPEN;
- break;
-
- case FILERR_FAILURE:
- case FILERR_TOO_MANY_FILES:
- case FILERR_INVALID_DATA:
- default:
- /* other errors */
- err = IMAGE_ERROR_INTERNAL;
- break;
- }
-
- /* if successful, set the file name */
- if (filerr == FILERR_NONE)
- set_image_filename(revised_path);
-
- return err;
+ file_error filerr = FILERR_NOT_FOUND;
+ image_error_t err = IMAGE_ERROR_FILENOTFOUND;
+ astring revised_path;
+
+ /* attempt to open the file for writing*/
+ filerr = zippath_fopen(path, OPEN_FLAG_READ|OPEN_FLAG_WRITE|OPEN_FLAG_CREATE, m_file, revised_path);
+
+ /* did the open succeed? */
+ switch(filerr)
+ {
+ case FILERR_NONE:
+ /* success! */
+ m_readonly = 0;
+ m_created = 1;
+ err = IMAGE_ERROR_SUCCESS;
+ break;
+
+ case FILERR_NOT_FOUND:
+ case FILERR_ACCESS_DENIED:
+ /* file not found (or otherwise cannot open); continue */
+ err = IMAGE_ERROR_FILENOTFOUND;
+ break;
+
+ case FILERR_OUT_OF_MEMORY:
+ /* out of memory */
+ err = IMAGE_ERROR_OUTOFMEMORY;
+ break;
+
+ case FILERR_ALREADY_OPEN:
+ /* this shouldn't happen */
+ err = IMAGE_ERROR_ALREADYOPEN;
+ break;
+
+ case FILERR_FAILURE:
+ case FILERR_TOO_MANY_FILES:
+ case FILERR_INVALID_DATA:
+ default:
+ /* other errors */
+ err = IMAGE_ERROR_INTERNAL;
+ break;
+ }
+
+ /* if successful, set the file name */
+ if (filerr == FILERR_NONE)
+ set_image_filename(revised_path);
+
+ return err;
}
/*-------------------------------------------------
@@ -723,18 +723,18 @@ int device_image_interface::reopen_for_write(const char *path)
void device_image_interface::determine_open_plan(int is_create, UINT32 *open_plan)
{
- int i = 0;
-
- /* emit flags */
- if (!is_create && is_readable() && is_writeable())
- open_plan[i++] = OPEN_FLAG_READ | OPEN_FLAG_WRITE;
- if (!is_create && !is_readable() && is_writeable())
- open_plan[i++] = OPEN_FLAG_WRITE;
- if (!is_create && is_readable())
- open_plan[i++] = OPEN_FLAG_READ;
- if (is_writeable() && is_creatable())
- open_plan[i++] = OPEN_FLAG_READ | OPEN_FLAG_WRITE | OPEN_FLAG_CREATE;
- open_plan[i] = 0;
+ int i = 0;
+
+ /* emit flags */
+ if (!is_create && is_readable() && is_writeable())
+ open_plan[i++] = OPEN_FLAG_READ | OPEN_FLAG_WRITE;
+ if (!is_create && !is_readable() && is_writeable())
+ open_plan[i++] = OPEN_FLAG_WRITE;
+ if (!is_create && is_readable())
+ open_plan[i++] = OPEN_FLAG_READ;
+ if (is_writeable() && is_creatable())
+ open_plan[i++] = OPEN_FLAG_READ | OPEN_FLAG_WRITE | OPEN_FLAG_CREATE;
+ open_plan[i] = 0;
}
/*-------------------------------------------------
@@ -896,7 +896,7 @@ bool device_image_interface::load_software(char *swlist, char *swname, rom_entry
break; // load first item for start
}
- romp++; /* something else; skip */
+ romp++; /* something else; skip */
}
}
if (warningcount > 0)
@@ -912,8 +912,8 @@ bool device_image_interface::load_software(char *swlist, char *swname, rom_entry
bool device_image_interface::load_internal(const char *path, bool is_create, int create_format, option_resolution *create_args, bool just_load)
{
- UINT32 open_plan[4];
- int i;
+ UINT32 open_plan[4];
+ int i;
bool softload = FALSE;
m_from_swlist = FALSE;
@@ -921,20 +921,20 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int
astring pathstr(path);
bool filename_has_period = (pathstr.rchr(0, '.') != -1) ? TRUE : FALSE;
- /* first unload the image */
- unload();
+ /* first unload the image */
+ unload();
- /* clear any possible error messages */
- clear_error();
+ /* clear any possible error messages */
+ clear_error();
- /* we are now loading */
- m_is_loading = TRUE;
+ /* we are now loading */
+ m_is_loading = TRUE;
- /* record the filename */
- m_err = set_image_filename(path);
+ /* record the filename */
+ m_err = set_image_filename(path);
- if (m_err)
- goto done;
+ if (m_err)
+ goto done;
/* Check if there's a software list defined for this device and use that if we're not creating an image */
if (!filename_has_period && !just_load)
@@ -988,14 +988,14 @@ bool device_image_interface::load_internal(const char *path, bool is_create, int
if (m_err)
goto done;
}
- /* success! */
+ /* success! */
done:
if (just_load) {
if(m_err) clear();
return m_err ? IMAGE_INIT_FAIL : IMAGE_INIT_PASS;
}
- if (m_err!=0) {
+ if (m_err!=0) {
if (!m_init_phase)
{
if (device().machine().phase() == MACHINE_PHASE_RUNNING)
@@ -1031,7 +1031,7 @@ done:
bool device_image_interface::load(const char *path)
{
- return load_internal(path, FALSE, 0, NULL, FALSE);
+ return load_internal(path, FALSE, 0, NULL, FALSE);
}
/*-------------------------------------------------
@@ -1059,40 +1059,40 @@ bool device_image_interface::open_image_file(emu_options &options)
bool device_image_interface::finish_load()
{
- bool err = IMAGE_INIT_PASS;
+ bool err = IMAGE_INIT_PASS;
- if (m_is_loading)
- {
+ if (m_is_loading)
+ {
image_checkhash();
if (m_from_swlist)
call_display_info();
if (has_been_created())
- {
- err = call_create(m_create_format, m_create_args);
- if (err)
- {
- if (!m_err)
- m_err = IMAGE_ERROR_UNSPECIFIED;
- }
- }
- else
- {
- /* using device load */
- err = call_load();
- if (err)
- {
- if (!m_err)
- m_err = IMAGE_ERROR_UNSPECIFIED;
- }
- }
- }
- m_is_loading = FALSE;
- m_create_format = 0;
- m_create_args = NULL;
+ {
+ err = call_create(m_create_format, m_create_args);
+ if (err)
+ {
+ if (!m_err)
+ m_err = IMAGE_ERROR_UNSPECIFIED;
+ }
+ }
+ else
+ {
+ /* using device load */
+ err = call_load();
+ if (err)
+ {
+ if (!m_err)
+ m_err = IMAGE_ERROR_UNSPECIFIED;
+ }
+ }
+ }
+ m_is_loading = FALSE;
+ m_create_format = 0;
+ m_create_args = NULL;
m_init_phase = FALSE;
- return err;
+ return err;
}
/*-------------------------------------------------
@@ -1101,8 +1101,8 @@ bool device_image_interface::finish_load()
bool device_image_interface::create(const char *path, const image_device_format *create_format, option_resolution *create_args)
{
- int format_index = (create_format != NULL) ? create_format->m_index : 0;
- return load_internal(path, TRUE, format_index, create_args, FALSE);
+ int format_index = (create_format != NULL) ? create_format->m_index : 0;
+ return load_internal(path, TRUE, format_index, create_args, FALSE);
}
@@ -1114,7 +1114,7 @@ bool device_image_interface::create(const char *path, const image_device_format
void device_image_interface::clear()
{
if (m_mame_file)
- {
+ {
global_free(m_mame_file);
m_mame_file = NULL;
m_file = NULL;
@@ -1126,15 +1126,15 @@ void device_image_interface::clear()
}
}
- m_image_name.reset();
- m_readonly = false;
- m_created = false;
+ m_image_name.reset();
+ m_readonly = false;
+ m_created = false;
- m_longname.reset();
- m_manufacturer.reset();
- m_year.reset();
+ m_longname.reset();
+ m_manufacturer.reset();
+ m_year.reset();
m_basename.reset();
- m_basename_noext.reset();
+ m_basename_noext.reset();
m_filetype.reset();
m_full_software_name = NULL;
@@ -1153,7 +1153,7 @@ void device_image_interface::unload()
{
call_unload();
}
- clear();
+ clear();
clear_error();
}
diff --git a/src/emu/diimage.h b/src/emu/diimage.h
index 6a5e7f50b42..fdd9b87c27a 100644
--- a/src/emu/diimage.h
+++ b/src/emu/diimage.h
@@ -52,37 +52,37 @@
enum iodevice_t
{
- /* List of all supported devices. Refer to the device by these names only */
- IO_UNKNOWN,
- IO_CARTSLOT, /* 1 - Cartridge Port, as found on most console and on some computers */
- IO_FLOPPY, /* 2 - Floppy Disk unit */
- IO_HARDDISK, /* 3 - Hard Disk unit */
- IO_CYLINDER, /* 4 - Magnetically-Coated Cylinder */
- IO_CASSETTE, /* 5 - Cassette Recorder (common on early home computers) */
- IO_PUNCHCARD, /* 6 - Card Puncher/Reader */
- IO_PUNCHTAPE, /* 7 - Tape Puncher/Reader (reels instead of punchcards) */
- IO_PRINTER, /* 8 - Printer device */
- IO_SERIAL, /* 9 - Generic Serial Port */
- IO_PARALLEL, /* 10 - Generic Parallel Port */
- IO_SNAPSHOT, /* 11 - Complete 'snapshot' of the state of the computer */
- IO_QUICKLOAD, /* 12 - Allow to load program/data into memory, without matching any actual device */
- IO_MEMCARD, /* 13 - Memory card */
- IO_CDROM, /* 14 - optical CD-ROM disc */
+ /* List of all supported devices. Refer to the device by these names only */
+ IO_UNKNOWN,
+ IO_CARTSLOT, /* 1 - Cartridge Port, as found on most console and on some computers */
+ IO_FLOPPY, /* 2 - Floppy Disk unit */
+ IO_HARDDISK, /* 3 - Hard Disk unit */
+ IO_CYLINDER, /* 4 - Magnetically-Coated Cylinder */
+ IO_CASSETTE, /* 5 - Cassette Recorder (common on early home computers) */
+ IO_PUNCHCARD, /* 6 - Card Puncher/Reader */
+ IO_PUNCHTAPE, /* 7 - Tape Puncher/Reader (reels instead of punchcards) */
+ IO_PRINTER, /* 8 - Printer device */
+ IO_SERIAL, /* 9 - Generic Serial Port */
+ IO_PARALLEL, /* 10 - Generic Parallel Port */
+ IO_SNAPSHOT, /* 11 - Complete 'snapshot' of the state of the computer */
+ IO_QUICKLOAD, /* 12 - Allow to load program/data into memory, without matching any actual device */
+ IO_MEMCARD, /* 13 - Memory card */
+ IO_CDROM, /* 14 - optical CD-ROM disc */
IO_MAGTAPE, /* 15 - Magentic tape */
- IO_ROM, /* 16 - Individual ROM image - the Amstrad CPC has a few applications that were sold on 16kB ROMs */
- IO_COUNT /* 17 - Total Number of IO_devices for searching */
+ IO_ROM, /* 16 - Individual ROM image - the Amstrad CPC has a few applications that were sold on 16kB ROMs */
+ IO_COUNT /* 17 - Total Number of IO_devices for searching */
};
enum image_error_t
{
- IMAGE_ERROR_SUCCESS,
- IMAGE_ERROR_INTERNAL,
- IMAGE_ERROR_UNSUPPORTED,
- IMAGE_ERROR_OUTOFMEMORY,
- IMAGE_ERROR_FILENOTFOUND,
- IMAGE_ERROR_INVALIDIMAGE,
- IMAGE_ERROR_ALREADYOPEN,
- IMAGE_ERROR_UNSPECIFIED
+ IMAGE_ERROR_SUCCESS,
+ IMAGE_ERROR_INTERNAL,
+ IMAGE_ERROR_UNSUPPORTED,
+ IMAGE_ERROR_OUTOFMEMORY,
+ IMAGE_ERROR_FILENOTFOUND,
+ IMAGE_ERROR_INVALIDIMAGE,
+ IMAGE_ERROR_ALREADYOPEN,
+ IMAGE_ERROR_UNSPECIFIED
};
struct image_device_type_info
@@ -94,12 +94,12 @@ struct image_device_type_info
struct image_device_format
{
- image_device_format *m_next;
- int m_index;
- astring m_name;
- astring m_description;
- astring m_extensions;
- astring m_optspec;
+ image_device_format *m_next;
+ int m_index;
+ astring m_name;
+ astring m_description;
+ astring m_extensions;
+ astring m_optspec;
};
class device_image_interface;
@@ -117,10 +117,10 @@ typedef void (*device_image_display_info_func)(device_image_interface &image);
// MACROS
//**************************************************************************
-#define IMAGE_INIT_PASS FALSE
-#define IMAGE_INIT_FAIL TRUE
-#define IMAGE_VERIFY_PASS FALSE
-#define IMAGE_VERIFY_FAIL TRUE
+#define IMAGE_INIT_PASS FALSE
+#define IMAGE_INIT_FAIL TRUE
+#define IMAGE_VERIFY_PASS FALSE
+#define IMAGE_VERIFY_FAIL TRUE
#define DEVICE_IMAGE_LOAD_NAME(name) device_load_##name
#define DEVICE_IMAGE_LOAD(name) int DEVICE_IMAGE_LOAD_NAME(name)(device_image_interface &image)
@@ -261,11 +261,11 @@ protected:
static const image_device_type_info *find_device_type(iodevice_t type);
static const image_device_type_info m_device_info_array[];
- /* error related info */
- image_error_t m_err;
- astring m_err_message;
+ /* error related info */
+ image_error_t m_err;
+ astring m_err_message;
- /* variables that are only non-zero when an image is mounted */
+ /* variables that are only non-zero when an image is mounted */
core_file *m_file;
emu_file *m_mame_file;
astring m_image_name;
@@ -282,29 +282,29 @@ protected:
software_part *m_software_part_ptr;
char *m_software_list_name;
- /* info read from the hash file/software list */
+ /* info read from the hash file/software list */
astring m_longname;
astring m_manufacturer;
astring m_year;
UINT32 m_supported;
- /* flags */
- bool m_readonly;
- bool m_created;
+ /* flags */
+ bool m_readonly;
+ bool m_created;
bool m_init_phase;
bool m_from_swlist;
- /* special - used when creating */
- int m_create_format;
- option_resolution *m_create_args;
+ /* special - used when creating */
+ int m_create_format;
+ option_resolution *m_create_args;
hash_collection m_hash;
astring m_brief_instance_name;
astring m_instance_name;
- /* creation info */
- image_device_format *m_formatlist;
+ /* creation info */
+ image_device_format *m_formatlist;
bool m_is_loading;
};
@@ -343,4 +343,4 @@ protected:
virtual void hook_load(astring filename, bool softlist);
};
-#endif /* __DIIMAGE_H__ */
+#endif /* __DIIMAGE_H__ */
diff --git a/src/emu/dimemory.c b/src/emu/dimemory.c
index f67ecbc71e0..b174841173e 100644
--- a/src/emu/dimemory.c
+++ b/src/emu/dimemory.c
@@ -45,7 +45,7 @@
// PARAMETERS
//**************************************************************************
-#define DETECT_OVERLAPPING_MEMORY (0)
+#define DETECT_OVERLAPPING_MEMORY (0)
@@ -67,40 +67,40 @@ const int TRIGGER_SUSPENDTIME = -4000;
address_space_config::address_space_config()
: m_name("unknown"),
- m_endianness(ENDIANNESS_NATIVE),
- m_databus_width(0),
- m_addrbus_width(0),
- m_addrbus_shift(0),
- m_logaddr_width(0),
- m_page_shift(0),
- m_internal_map(NULL),
- m_default_map(NULL)
+ m_endianness(ENDIANNESS_NATIVE),
+ m_databus_width(0),
+ m_addrbus_width(0),
+ m_addrbus_shift(0),
+ m_logaddr_width(0),
+ m_page_shift(0),
+ m_internal_map(NULL),
+ m_default_map(NULL)
{
}
address_space_config::address_space_config(const char *name, endianness_t endian, UINT8 datawidth, UINT8 addrwidth, INT8 addrshift, address_map_constructor internal, address_map_constructor defmap)
: m_name(name),
- m_endianness(endian),
- m_databus_width(datawidth),
- m_addrbus_width(addrwidth),
- m_addrbus_shift(addrshift),
- m_logaddr_width(addrwidth),
- m_page_shift(0),
- m_internal_map(internal),
- m_default_map(defmap)
+ m_endianness(endian),
+ m_databus_width(datawidth),
+ m_addrbus_width(addrwidth),
+ m_addrbus_shift(addrshift),
+ m_logaddr_width(addrwidth),
+ m_page_shift(0),
+ m_internal_map(internal),
+ m_default_map(defmap)
{
}
address_space_config::address_space_config(const char *name, endianness_t endian, UINT8 datawidth, UINT8 addrwidth, INT8 addrshift, UINT8 logwidth, UINT8 pageshift, address_map_constructor internal, address_map_constructor defmap)
: m_name(name),
- m_endianness(endian),
- m_databus_width(datawidth),
- m_addrbus_width(addrwidth),
- m_addrbus_shift(addrshift),
- m_logaddr_width(logwidth),
- m_page_shift(pageshift),
- m_internal_map(internal),
- m_default_map(defmap)
+ m_endianness(endian),
+ m_databus_width(datawidth),
+ m_addrbus_width(addrwidth),
+ m_addrbus_shift(addrshift),
+ m_logaddr_width(logwidth),
+ m_page_shift(pageshift),
+ m_internal_map(internal),
+ m_default_map(defmap)
{
}
@@ -269,7 +269,7 @@ void device_memory_interface::interface_validity_check(validity_checker &valid)
for (scan = map->m_entrylist.first(); scan != entry; scan = scan->next())
if (entry->m_addrstart <= scan->m_addrend && entry->m_addrend >= scan->m_addrstart &&
((entry->m_read.m_type != AMH_NONE && scan->m_read.m_type != AMH_NONE) ||
- (entry->m_write.m_type != AMH_NONE && scan->m_write.m_type != AMH_NONE)))
+ (entry->m_write.m_type != AMH_NONE && scan->m_write.m_type != AMH_NONE)))
{
mame_printf_warning("%s space has overlapping memory (%X-%X,%d,%d) vs (%X-%X,%d,%d)\n", spaceconfig->m_name, entry->m_addrstart, entry->m_addrend, entry->m_read.m_type, entry->m_write.m_type, scan->m_addrstart, scan->m_addrend, scan->m_read.m_type, scan->m_write.m_type);
detected_overlap = true;
diff --git a/src/emu/dimemory.h b/src/emu/dimemory.h
index 9fd75532a07..b2b059ec7c7 100644
--- a/src/emu/dimemory.h
+++ b/src/emu/dimemory.h
@@ -52,19 +52,19 @@
//**************************************************************************
// Translation intentions
-const int TRANSLATE_TYPE_MASK = 0x03; // read write or fetch
-const int TRANSLATE_USER_MASK = 0x04; // user mode or fully privileged
-const int TRANSLATE_DEBUG_MASK = 0x08; // debug mode (no side effects)
+const int TRANSLATE_TYPE_MASK = 0x03; // read write or fetch
+const int TRANSLATE_USER_MASK = 0x04; // user mode or fully privileged
+const int TRANSLATE_DEBUG_MASK = 0x08; // debug mode (no side effects)
-const int TRANSLATE_READ = 0; // translate for read
-const int TRANSLATE_WRITE = 1; // translate for write
-const int TRANSLATE_FETCH = 2; // translate for instruction fetch
-const int TRANSLATE_READ_USER = (TRANSLATE_READ | TRANSLATE_USER_MASK);
-const int TRANSLATE_WRITE_USER = (TRANSLATE_WRITE | TRANSLATE_USER_MASK);
-const int TRANSLATE_FETCH_USER = (TRANSLATE_FETCH | TRANSLATE_USER_MASK);
-const int TRANSLATE_READ_DEBUG = (TRANSLATE_READ | TRANSLATE_DEBUG_MASK);
-const int TRANSLATE_WRITE_DEBUG = (TRANSLATE_WRITE | TRANSLATE_DEBUG_MASK);
-const int TRANSLATE_FETCH_DEBUG = (TRANSLATE_FETCH | TRANSLATE_DEBUG_MASK);
+const int TRANSLATE_READ = 0; // translate for read
+const int TRANSLATE_WRITE = 1; // translate for write
+const int TRANSLATE_FETCH = 2; // translate for instruction fetch
+const int TRANSLATE_READ_USER = (TRANSLATE_READ | TRANSLATE_USER_MASK);
+const int TRANSLATE_WRITE_USER = (TRANSLATE_WRITE | TRANSLATE_USER_MASK);
+const int TRANSLATE_FETCH_USER = (TRANSLATE_FETCH | TRANSLATE_USER_MASK);
+const int TRANSLATE_READ_DEBUG = (TRANSLATE_READ | TRANSLATE_DEBUG_MASK);
+const int TRANSLATE_WRITE_DEBUG = (TRANSLATE_WRITE | TRANSLATE_DEBUG_MASK);
+const int TRANSLATE_FETCH_DEBUG = (TRANSLATE_FETCH | TRANSLATE_DEBUG_MASK);
@@ -143,8 +143,8 @@ protected:
virtual void interface_validity_check(validity_checker &valid) const;
// configuration
- address_map_constructor m_address_map[ADDRESS_SPACES]; // address maps for each address space
- address_space * m_addrspace[ADDRESS_SPACES]; // reported address spaces
+ address_map_constructor m_address_map[ADDRESS_SPACES]; // address maps for each address space
+ address_space * m_addrspace[ADDRESS_SPACES]; // reported address spaces
};
// iterator
@@ -170,4 +170,4 @@ inline const address_space_config *device_get_space_config(const device_t &devic
}
-#endif /* __DIMEMORY_H__ */
+#endif /* __DIMEMORY_H__ */
diff --git a/src/emu/dinvram.h b/src/emu/dinvram.h
index ad9947ea1cc..23902d30481 100644
--- a/src/emu/dinvram.h
+++ b/src/emu/dinvram.h
@@ -78,4 +78,4 @@ protected:
typedef device_interface_iterator<device_nvram_interface> nvram_interface_iterator;
-#endif /* __DINVRAM_H__ */
+#endif /* __DINVRAM_H__ */
diff --git a/src/emu/dirtc.c b/src/emu/dirtc.c
index 38ad08ab573..2c73f7d4392 100644
--- a/src/emu/dirtc.c
+++ b/src/emu/dirtc.c
@@ -80,7 +80,7 @@ void device_rtc_interface::set_current_time(running_machine &machine)
machine.base_datetime(systime);
set_time(true, systime.local_time.year, systime.local_time.month + 1, systime.local_time.mday, systime.local_time.weekday + 1,
- systime.local_time.hour, systime.local_time.minute, systime.local_time.second);
+ systime.local_time.hour, systime.local_time.minute, systime.local_time.second);
}
diff --git a/src/emu/dirtc.h b/src/emu/dirtc.h
index 3273cac623a..43d3ede1ff1 100644
--- a/src/emu/dirtc.h
+++ b/src/emu/dirtc.h
@@ -74,4 +74,4 @@ protected:
};
-#endif /* __DIRTC_H__ */
+#endif /* __DIRTC_H__ */
diff --git a/src/emu/diserial.c b/src/emu/diserial.c
index f74700bfcb7..14b90b6cea4 100644
--- a/src/emu/diserial.c
+++ b/src/emu/diserial.c
@@ -20,10 +20,10 @@ start of start bit. This is used to synchronise with the data being transfered *
device_serial_interface::device_serial_interface(const machine_config &mconfig, device_t &device)
: device_interface(device),
- m_other_connection(NULL)
+ m_other_connection(NULL)
{
/* if sum of all bits in the byte is even, then the data
- has even parity, otherwise it has odd parity */
+ has even parity, otherwise it has odd parity */
for (int i=0; i<256; i++)
{
int sum = 0;
@@ -415,7 +415,7 @@ void device_serial_interface::connect(device_serial_interface *other_connection)
{
/* both connections should have their in connection setup! */
/* the in connection is the callback they use to update their state based
- on the output from the other side */
+ on the output from the other side */
set_other_connection(other_connection);
other_connection->set_other_connection(this);
@@ -434,8 +434,8 @@ const device_type SERIAL_SOURCE = &device_creator<serial_source_device>;
//-------------------------------------------------
serial_source_device::serial_source_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, SERIAL_SOURCE, "Serial source", tag, owner, clock),
- device_serial_interface(mconfig, *this)
+ : device_t(mconfig, SERIAL_SOURCE, "Serial source", tag, owner, clock),
+ device_serial_interface(mconfig, *this)
{
}
diff --git a/src/emu/diserial.h b/src/emu/diserial.h
index aa59ac569d1..5c3d788431c 100644
--- a/src/emu/diserial.h
+++ b/src/emu/diserial.h
@@ -17,11 +17,11 @@
*/
enum
{
- SERIAL_PARITY_NONE, /* no parity. a parity bit will not be in the transmitted/received data */
- SERIAL_PARITY_ODD, /* odd parity */
- SERIAL_PARITY_EVEN, /* even parity */
- SERIAL_PARITY_MARK, /* one parity */
- SERIAL_PARITY_SPACE /* zero parity */
+ SERIAL_PARITY_NONE, /* no parity. a parity bit will not be in the transmitted/received data */
+ SERIAL_PARITY_ODD, /* odd parity */
+ SERIAL_PARITY_EVEN, /* even parity */
+ SERIAL_PARITY_MARK, /* one parity */
+ SERIAL_PARITY_SPACE /* zero parity */
};
/*
@@ -34,7 +34,7 @@ enum
This output is active low on serial chips (e.g. 0 is CTS is set),
but here it is active high!
*/
-#define SERIAL_STATE_CTS 0x0001
+#define SERIAL_STATE_CTS 0x0001
/*
RTS = Request to Send. (OUTPUT)
@@ -46,7 +46,7 @@ enum
This output is active low on serial chips (e.g. 0 is RTS is set),
but here it is active high!
*/
-#define SERIAL_STATE_RTS 0x0002
+#define SERIAL_STATE_RTS 0x0002
/*
DSR = Data Set ready. (INPUT)
@@ -58,7 +58,7 @@ enum
This output is active low on serial chips (e.g. 0 is DSR is set),
but here it is active high!
*/
-#define SERIAL_STATE_DSR 0x0004
+#define SERIAL_STATE_DSR 0x0004
/*
DTR = Data terminal Ready. (OUTPUT)
@@ -69,11 +69,11 @@ enum
This output is active low on serial chips (e.g. 0 is DTR is set),
but here it is active high!
*/
-#define SERIAL_STATE_DTR 0x0008
+#define SERIAL_STATE_DTR 0x0008
/* RX = Recieve data. (INPUT) */
-#define SERIAL_STATE_RX_DATA 0x00010
+#define SERIAL_STATE_RX_DATA 0x00010
/* TX = Transmit data. (OUTPUT) */
-#define SERIAL_STATE_TX_DATA 0x00020
+#define SERIAL_STATE_TX_DATA 0x00020
// ======================> device_serial_interface
class device_serial_interface : public device_interface
@@ -173,22 +173,22 @@ private:
class serial_source_device : public device_t,
- public device_serial_interface
+ public device_serial_interface
{
public:
- // construction/destruction
- serial_source_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ serial_source_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual void input_callback(UINT8 state);
void send_bit(UINT8 data);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
};
extern const device_type SERIAL_SOURCE;
-#define MCFG_SERIAL_SOURCE_ADD(_tag) \
+#define MCFG_SERIAL_SOURCE_ADD(_tag) \
MCFG_DEVICE_ADD((_tag), SERIAL_SOURCE, 0)
#endif /* __DISERIAL_H__ */
diff --git a/src/emu/dislot.c b/src/emu/dislot.c
index df52082e83e..211b16b9e1a 100644
--- a/src/emu/dislot.c
+++ b/src/emu/dislot.c
@@ -61,4 +61,3 @@ device_slot_card_interface::device_slot_card_interface(const machine_config &mco
device_slot_card_interface::~device_slot_card_interface()
{
}
-
diff --git a/src/emu/dislot.h b/src/emu/dislot.h
index 7b56f1995e1..aef6e4a8229 100644
--- a/src/emu/dislot.h
+++ b/src/emu/dislot.h
@@ -15,9 +15,9 @@
struct slot_interface
{
- const char * name;
+ const char * name;
const device_type & devtype;
- bool internal;
+ bool internal;
};
#define MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _def_inp, _fixed) \
@@ -27,11 +27,11 @@ struct slot_interface
device_slot_interface::static_set_slot_info(*device, SLOT_INTERFACE_NAME(_slot_intf), _def_slot, DEVICE_INPUT_DEFAULTS_NAME(_def_inp), _def_config, _def_clock, _fixed);
-#define SLOT_INTERFACE_NAME(name) slot_interface_##name
+#define SLOT_INTERFACE_NAME(name) slot_interface_##name
-#define SLOT_INTERFACE_START(name) \
- const slot_interface slot_interface_##name[] = \
- { \
+#define SLOT_INTERFACE_START(name) \
+ const slot_interface slot_interface_##name[] = \
+ { \
#define SLOT_INTERFACE(tag,device) \
{ tag, device, false }, \
@@ -40,7 +40,7 @@ struct slot_interface
{ tag, device, true }, \
#define SLOT_INTERFACE_END \
- { NULL, NULL, false } \
+ { NULL, NULL, false } \
};
#define SLOT_INTERFACE_EXTERN(name) extern const slot_interface slot_interface_##name[]
diff --git a/src/emu/disound.c b/src/emu/disound.c
index 55466db8b77..975495ae72c 100644
--- a/src/emu/disound.c
+++ b/src/emu/disound.c
@@ -51,8 +51,8 @@
device_sound_interface::device_sound_interface(const machine_config &mconfig, device_t &device)
: device_interface(device),
- m_outputs(0),
- m_auto_allocated_inputs(0)
+ m_outputs(0),
+ m_auto_allocated_inputs(0)
{
}
@@ -389,11 +389,11 @@ void device_sound_interface::interface_pre_reset()
device_sound_interface::sound_route::sound_route(int output, int input, float gain, const char *target, UINT32 mixoutput)
: m_next(NULL),
- m_output(output),
- m_input(input),
- m_mixoutput(mixoutput),
- m_gain(gain),
- m_target(target)
+ m_output(output),
+ m_input(input),
+ m_mixoutput(mixoutput),
+ m_gain(gain),
+ m_target(target)
{
}
@@ -409,8 +409,8 @@ device_sound_interface::sound_route::sound_route(int output, int input, float ga
device_mixer_interface::device_mixer_interface(const machine_config &mconfig, device_t &device, int outputs)
: device_sound_interface(mconfig, device),
- m_outputs(outputs),
- m_mixer_stream(NULL)
+ m_outputs(outputs),
+ m_mixer_stream(NULL)
{
}
diff --git a/src/emu/disound.h b/src/emu/disound.h
index 393443c628f..a9bd58944e5 100644
--- a/src/emu/disound.h
+++ b/src/emu/disound.h
@@ -51,8 +51,8 @@
// CONSTANTS
//**************************************************************************
-const int ALL_OUTPUTS = 65535; // special value indicating all outputs for the current chip
-const int AUTO_ALLOC_INPUT = 65535;
+const int ALL_OUTPUTS = 65535; // special value indicating all outputs for the current chip
+const int AUTO_ALLOC_INPUT = 65535;
@@ -109,12 +109,12 @@ public:
const sound_route *next() const { return m_next; }
- sound_route * m_next; // pointer to next route
- UINT32 m_output; // output index, or ALL_OUTPUTS
- UINT32 m_input; // target input index
- UINT32 m_mixoutput; // target mixer output
- float m_gain; // gain
- astring m_target; // target tag
+ sound_route * m_next; // pointer to next route
+ UINT32 m_output; // output index, or ALL_OUTPUTS
+ UINT32 m_input; // target input index
+ UINT32 m_mixoutput; // target mixer output
+ float m_gain; // gain
+ astring m_target; // target tag
};
// construction/destruction
@@ -151,9 +151,9 @@ protected:
virtual void interface_pre_reset();
// internal state
- simple_list<sound_route> m_route_list; // list of sound routes
- int m_outputs; // number of outputs from this instance
- int m_auto_allocated_inputs; // number of auto-allocated inputs targeting us
+ simple_list<sound_route> m_route_list; // list of sound routes
+ int m_outputs; // number of outputs from this instance
+ int m_auto_allocated_inputs; // number of auto-allocated inputs targeting us
};
// iterator
@@ -179,13 +179,13 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
// internal state
- UINT8 m_outputs; // number of outputs
- dynamic_array<UINT8> m_outputmap; // map of inputs to outputs
- sound_stream * m_mixer_stream; // mixing stream
+ UINT8 m_outputs; // number of outputs
+ dynamic_array<UINT8> m_outputmap; // map of inputs to outputs
+ sound_stream * m_mixer_stream; // mixing stream
};
// iterator
typedef device_interface_iterator<device_mixer_interface> mixer_interface_iterator;
-#endif /* __DISOUND_H__ */
+#endif /* __DISOUND_H__ */
diff --git a/src/emu/distate.c b/src/emu/distate.c
index d08d6c93cdb..7af6f23e2d1 100644
--- a/src/emu/distate.c
+++ b/src/emu/distate.c
@@ -80,13 +80,13 @@ const UINT64 device_state_entry::k_decimal_divisor[] =
device_state_entry::device_state_entry(int index, const char *symbol, void *dataptr, UINT8 size)
: m_next(NULL),
- m_index(index),
- m_datamask(0),
- m_datasize(size),
- m_flags(0),
- m_symbol(symbol),
- m_default_format(true),
- m_sizemask(0)
+ m_index(index),
+ m_datamask(0),
+ m_datasize(size),
+ m_flags(0),
+ m_symbol(symbol),
+ m_default_format(true),
+ m_sizemask(0)
{
// set the data pointer
m_dataptr.v = dataptr;
@@ -166,10 +166,10 @@ UINT64 device_state_entry::value() const
switch (m_datasize)
{
default:
- case 1: result = *m_dataptr.u8; break;
- case 2: result = *m_dataptr.u16; break;
- case 4: result = *m_dataptr.u32; break;
- case 8: result = *m_dataptr.u64; break;
+ case 1: result = *m_dataptr.u8; break;
+ case 2: result = *m_dataptr.u16; break;
+ case 4: result = *m_dataptr.u32; break;
+ case 8: result = *m_dataptr.u64; break;
}
return result & m_datamask;
}
@@ -231,8 +231,8 @@ astring &device_state_entry::format(astring &dest, const char *string, bool maxo
break;
// 1-9 accumulate into the width
- case '1': case '2': case '3': case '4': case '5':
- case '6': case '7': case '8': case '9':
+ case '1': case '2': case '3': case '4': case '5':
+ case '6': case '7': case '8': case '9':
width = width * 10 + (*fptr - '0');
break;
@@ -355,10 +355,10 @@ void device_state_entry::set_value(UINT64 value) const
switch (m_datasize)
{
default:
- case 1: *m_dataptr.u8 = value; break;
- case 2: *m_dataptr.u16 = value; break;
- case 4: *m_dataptr.u32 = value; break;
- case 8: *m_dataptr.u64 = value; break;
+ case 1: *m_dataptr.u8 = value; break;
+ case 2: *m_dataptr.u16 = value; break;
+ case 4: *m_dataptr.u32 = value; break;
+ case 8: *m_dataptr.u64 = value; break;
}
}
diff --git a/src/emu/distate.h b/src/emu/distate.h
index 281494c2bbe..6047435841c 100644
--- a/src/emu/distate.h
+++ b/src/emu/distate.h
@@ -54,10 +54,10 @@
// standard state indexes
enum
{
- STATE_GENPC = -1, // generic program counter (live)
- STATE_GENPCBASE = -2, // generic program counter (base of current instruction)
- STATE_GENSP = -3, // generic stack pointer
- STATE_GENFLAGS = -4 // generic flags
+ STATE_GENPC = -1, // generic program counter (live)
+ STATE_GENPCBASE = -2, // generic program counter (base of current instruction)
+ STATE_GENSP = -3, // generic stack pointer
+ STATE_GENFLAGS = -4 // generic flags
};
@@ -99,11 +99,11 @@ public:
protected:
// device state flags
- static const UINT8 DSF_NOSHOW = 0x01; // don't display this entry in the registers view
- static const UINT8 DSF_IMPORT = 0x02; // call the import function after writing new data
- static const UINT8 DSF_IMPORT_SEXT = 0x04; // sign-extend the data when writing new data
- static const UINT8 DSF_EXPORT = 0x08; // call the export function prior to fetching the data
- static const UINT8 DSF_CUSTOM_STRING = 0x10; // set if the format has a custom string
+ static const UINT8 DSF_NOSHOW = 0x01; // don't display this entry in the registers view
+ static const UINT8 DSF_IMPORT = 0x02; // call the import function after writing new data
+ static const UINT8 DSF_IMPORT_SEXT = 0x04; // sign-extend the data when writing new data
+ static const UINT8 DSF_EXPORT = 0x08; // call the export function prior to fetching the data
+ static const UINT8 DSF_CUSTOM_STRING = 0x10; // set if the format has a custom string
// helpers
bool needs_custom_string() const { return ((m_flags & DSF_CUSTOM_STRING) != 0); }
@@ -120,19 +120,19 @@ protected:
void set_value(const char *string) const;
// statics
- static const UINT64 k_decimal_divisor[20]; // divisors for outputting decimal values
+ static const UINT64 k_decimal_divisor[20]; // divisors for outputting decimal values
// public state description
- device_state_entry * m_next; // link to next item
- UINT32 m_index; // index by which this item is referred
- generic_ptr m_dataptr; // pointer to where the data lives
- UINT64 m_datamask; // mask that applies to the data
- UINT8 m_datasize; // size of the data
- UINT8 m_flags; // flags for this data
- astring m_symbol; // symbol for display; all lower-case version for expressions
- astring m_format; // supported formats
- bool m_default_format; // true if we are still using default format
- UINT64 m_sizemask; // mask derived from the data size
+ device_state_entry * m_next; // link to next item
+ UINT32 m_index; // index by which this item is referred
+ generic_ptr m_dataptr; // pointer to where the data lives
+ UINT64 m_datamask; // mask that applies to the data
+ UINT8 m_datasize; // size of the data
+ UINT8 m_flags; // flags for this data
+ astring m_symbol; // symbol for display; all lower-case version for expressions
+ astring m_format; // supported formats
+ bool m_default_format; // true if we are still using default format
+ UINT64 m_sizemask; // mask derived from the data size
};
@@ -170,7 +170,7 @@ public:
offs_t safe_pc() { return pc(); }
offs_t safe_pcbase() { return pcbase(); }
-public: // protected eventually
+public: // protected eventually
// add a new state item
template<class _ItemType> device_state_entry &state_add(int index, const char *symbol, _ItemType &data)
@@ -193,12 +193,12 @@ protected:
const device_state_entry *state_find_entry(int index);
// constants
- static const int FAST_STATE_MIN = -4; // range for fast state
- static const int FAST_STATE_MAX = 256; // lookups
+ static const int FAST_STATE_MIN = -4; // range for fast state
+ static const int FAST_STATE_MAX = 256; // lookups
// state
- simple_list<device_state_entry> m_state_list; // head of state list
- device_state_entry * m_fast_state[FAST_STATE_MAX + 1 - FAST_STATE_MIN];
+ simple_list<device_state_entry> m_state_list; // head of state list
+ device_state_entry * m_fast_state[FAST_STATE_MAX + 1 - FAST_STATE_MIN];
// fast access to common entries
};
@@ -233,4 +233,4 @@ inline offs_t device_t::safe_pcbase()
}
-#endif /* __DISTATE_H__ */
+#endif /* __DISTATE_H__ */
diff --git a/src/emu/drawgfx.c b/src/emu/drawgfx.c
index 5051d22871a..c4d0690572c 100644
--- a/src/emu/drawgfx.c
+++ b/src/emu/drawgfx.c
@@ -212,73 +212,73 @@ void gfx_init(running_machine &machine)
gfx_element::gfx_element(running_machine &machine)
: m_width(0),
- m_height(0),
- m_startx(0),
- m_starty(0),
- m_origwidth(0),
- m_origheight(0),
- m_total_elements(0),
- m_color_base(0),
- m_color_depth(0),
- m_color_granularity(0),
- m_total_colors(0),
- m_line_modulo(0),
- m_char_modulo(0),
- m_srcdata(NULL),
- m_dirtyseq(1),
- m_gfxdata(NULL),
- m_layout_is_raw(false),
- m_layout_planes(0),
- m_layout_charincrement(0),
- m_machine(machine)
+ m_height(0),
+ m_startx(0),
+ m_starty(0),
+ m_origwidth(0),
+ m_origheight(0),
+ m_total_elements(0),
+ m_color_base(0),
+ m_color_depth(0),
+ m_color_granularity(0),
+ m_total_colors(0),
+ m_line_modulo(0),
+ m_char_modulo(0),
+ m_srcdata(NULL),
+ m_dirtyseq(1),
+ m_gfxdata(NULL),
+ m_layout_is_raw(false),
+ m_layout_planes(0),
+ m_layout_charincrement(0),
+ m_machine(machine)
{
}
gfx_element::gfx_element(running_machine &machine, UINT8 *base, UINT32 width, UINT32 height, UINT32 rowbytes, UINT32 color_base, UINT32 color_granularity)
: m_width(width),
- m_height(height),
- m_startx(0),
- m_starty(0),
- m_origwidth(width),
- m_origheight(height),
- m_total_elements(1),
- m_color_base(color_base),
- m_color_depth(color_granularity),
- m_color_granularity(color_granularity),
- m_total_colors((machine.total_colors() - color_base) / color_granularity),
- m_line_modulo(rowbytes),
- m_char_modulo(0),
- m_srcdata(base),
- m_dirtyseq(1),
- m_gfxdata(base),
- m_layout_is_raw(true),
- m_layout_planes(0),
- m_layout_charincrement(0),
- m_machine(machine)
+ m_height(height),
+ m_startx(0),
+ m_starty(0),
+ m_origwidth(width),
+ m_origheight(height),
+ m_total_elements(1),
+ m_color_base(color_base),
+ m_color_depth(color_granularity),
+ m_color_granularity(color_granularity),
+ m_total_colors((machine.total_colors() - color_base) / color_granularity),
+ m_line_modulo(rowbytes),
+ m_char_modulo(0),
+ m_srcdata(base),
+ m_dirtyseq(1),
+ m_gfxdata(base),
+ m_layout_is_raw(true),
+ m_layout_planes(0),
+ m_layout_charincrement(0),
+ m_machine(machine)
{
}
gfx_element::gfx_element(running_machine &machine, const gfx_layout &gl, const UINT8 *srcdata, UINT32 total_colors, UINT32 color_base)
: m_width(0),
- m_height(0),
- m_startx(0),
- m_starty(0),
- m_origwidth(0),
- m_origheight(0),
- m_total_elements(0),
- m_color_base(color_base),
- m_color_depth(0),
- m_color_granularity(0),
- m_total_colors(total_colors),
- m_line_modulo(0),
- m_char_modulo(0),
- m_srcdata(NULL),
- m_dirtyseq(1),
- m_gfxdata(NULL),
- m_layout_is_raw(false),
- m_layout_planes(0),
- m_layout_charincrement(0),
- m_machine(machine)
+ m_height(0),
+ m_startx(0),
+ m_starty(0),
+ m_origwidth(0),
+ m_origheight(0),
+ m_total_elements(0),
+ m_color_base(color_base),
+ m_color_depth(0),
+ m_color_granularity(0),
+ m_total_colors(total_colors),
+ m_line_modulo(0),
+ m_char_modulo(0),
+ m_srcdata(NULL),
+ m_dirtyseq(1),
+ m_gfxdata(NULL),
+ m_layout_is_raw(false),
+ m_layout_planes(0),
+ m_layout_charincrement(0),
+ m_machine(machine)
{
// set the layout
set_layout(gl, srcdata);
@@ -1817,14 +1817,14 @@ void copybitmap_trans(bitmap_rgb32 &dest, bitmap_rgb32 &src, int flipx, int flip
void copyscrollbitmap(bitmap_ind16 &dest, bitmap_ind16 &src, UINT32 numrows, const INT32 *rowscroll, UINT32 numcols, const INT32 *colscroll, const rectangle &cliprect)
{
// just call through to the transparent case as the underlying copybitmap will
- // optimize for pen == 0xffffffff
+ // optimize for pen == 0xffffffff
copyscrollbitmap_trans(dest, src, numrows, rowscroll, numcols, colscroll, cliprect, 0xffffffff);
}
void copyscrollbitmap(bitmap_rgb32 &dest, bitmap_rgb32 &src, UINT32 numrows, const INT32 *rowscroll, UINT32 numcols, const INT32 *colscroll, const rectangle &cliprect)
{
// just call through to the transparent case as the underlying copybitmap will
- // optimize for pen == 0xffffffff
+ // optimize for pen == 0xffffffff
copyscrollbitmap_trans(dest, src, numrows, rowscroll, numcols, colscroll, cliprect, 0xffffffff);
}
@@ -1878,7 +1878,7 @@ static inline void copyscrollbitmap_trans_common(_BitmapClass &dest, _BitmapClas
// count consecutive columns scrolled by the same amount
for (groupcols = 1; col + groupcols < numcols; groupcols++)
- if (colscroll[col + groupcols] != yscroll)
+ if (colscroll[col + groupcols] != yscroll)
break;
// iterate over reps of the columns in question
@@ -1915,7 +1915,7 @@ static inline void copyscrollbitmap_trans_common(_BitmapClass &dest, _BitmapClas
// count consecutive rows scrolled by the same amount
for (grouprows = 1; row + grouprows < numrows; grouprows++)
- if (rowscroll[row + grouprows] != xscroll)
+ if (rowscroll[row + grouprows] != xscroll)
break;
// iterate over reps of the rows in question
diff --git a/src/emu/drawgfx.h b/src/emu/drawgfx.h
index c96c8570670..7307438e3bc 100644
--- a/src/emu/drawgfx.h
+++ b/src/emu/drawgfx.h
@@ -24,14 +24,14 @@
CONSTANTS
***************************************************************************/
-#define MAX_GFX_PLANES 8
-#define MAX_GFX_SIZE 32
-#define MAX_ABS_GFX_SIZE 1024
+#define MAX_GFX_PLANES 8
+#define MAX_GFX_SIZE 32
+#define MAX_ABS_GFX_SIZE 1024
-#define EXTENDED_XOFFS { 0 }
-#define EXTENDED_YOFFS { 0 }
+#define EXTENDED_XOFFS { 0 }
+#define EXTENDED_YOFFS { 0 }
-#define GFX_RAW 0x12345678
+#define GFX_RAW 0x12345678
// When planeoffset[0] is set to GFX_RAW, the gfx data is left as-is, with no conversion.
// No buffer is allocated for the decoded data, and gfxdata is set to point to the source
// data.
@@ -58,24 +58,24 @@ enum
// these macros describe gfx_layouts in terms of fractions of a region
// they can be used for total, planeoffset, xoffset, yoffset
-#define RGN_FRAC(num,den) (0x80000000 | (((num) & 0x0f) << 27) | (((den) & 0x0f) << 23))
-#define IS_FRAC(offset) ((offset) & 0x80000000)
-#define FRAC_NUM(offset) (((offset) >> 27) & 0x0f)
-#define FRAC_DEN(offset) (((offset) >> 23) & 0x0f)
-#define FRAC_OFFSET(offset) ((offset) & 0x007fffff)
+#define RGN_FRAC(num,den) (0x80000000 | (((num) & 0x0f) << 27) | (((den) & 0x0f) << 23))
+#define IS_FRAC(offset) ((offset) & 0x80000000)
+#define FRAC_NUM(offset) (((offset) >> 27) & 0x0f)
+#define FRAC_DEN(offset) (((offset) >> 23) & 0x0f)
+#define FRAC_OFFSET(offset) ((offset) & 0x007fffff)
// these macros are useful in gfx_layouts
-#define STEP2(START,STEP) (START),(START)+(STEP)
-#define STEP4(START,STEP) STEP2(START,STEP),STEP2((START)+2*(STEP),STEP)
-#define STEP8(START,STEP) STEP4(START,STEP),STEP4((START)+4*(STEP),STEP)
-#define STEP16(START,STEP) STEP8(START,STEP),STEP8((START)+8*(STEP),STEP)
-#define STEP32(START,STEP) STEP16(START,STEP),STEP16((START)+16*(STEP),STEP)
-#define STEP64(START,STEP) STEP32(START,STEP),STEP32((START)+32*(STEP),STEP)
-#define STEP128(START,STEP) STEP64(START,STEP),STEP64((START)+64*(STEP),STEP)
-#define STEP256(START,STEP) STEP128(START,STEP),STEP128((START)+128*(STEP),STEP)
-#define STEP512(START,STEP) STEP256(START,STEP),STEP256((START)+256*(STEP),STEP)
-#define STEP1024(START,STEP) STEP512(START,STEP),STEP512((START)+512*(STEP),STEP)
-#define STEP2048(START,STEP) STEP1024(START,STEP),STEP1024((START)+1024*(STEP),STEP)
+#define STEP2(START,STEP) (START),(START)+(STEP)
+#define STEP4(START,STEP) STEP2(START,STEP),STEP2((START)+2*(STEP),STEP)
+#define STEP8(START,STEP) STEP4(START,STEP),STEP4((START)+4*(STEP),STEP)
+#define STEP16(START,STEP) STEP8(START,STEP),STEP8((START)+8*(STEP),STEP)
+#define STEP32(START,STEP) STEP16(START,STEP),STEP16((START)+16*(STEP),STEP)
+#define STEP64(START,STEP) STEP32(START,STEP),STEP32((START)+32*(STEP),STEP)
+#define STEP128(START,STEP) STEP64(START,STEP),STEP64((START)+64*(STEP),STEP)
+#define STEP256(START,STEP) STEP128(START,STEP),STEP128((START)+128*(STEP),STEP)
+#define STEP512(START,STEP) STEP256(START,STEP),STEP256((START)+256*(STEP),STEP)
+#define STEP1024(START,STEP) STEP512(START,STEP),STEP512((START)+512*(STEP),STEP)
+#define STEP2048(START,STEP) STEP1024(START,STEP),STEP1024((START)+1024*(STEP),STEP)
// these macros are used for declaring gfx_decode_entry_entry info arrays.
@@ -101,16 +101,16 @@ struct gfx_layout
UINT32 xoffs(int x) const { return (extxoffs != NULL) ? extxoffs[x] : xoffset[x]; }
UINT32 yoffs(int y) const { return (extyoffs != NULL) ? extyoffs[y] : yoffset[y]; }
- UINT16 width; // pixel width of each element
- UINT16 height; // pixel height of each element
- UINT32 total; // total number of elements, or RGN_FRAC()
- UINT16 planes; // number of bitplanes
- UINT32 planeoffset[MAX_GFX_PLANES]; // bit offset of each bitplane
- UINT32 xoffset[MAX_GFX_SIZE]; // bit offset of each horizontal pixel
- UINT32 yoffset[MAX_GFX_SIZE]; // bit offset of each vertical pixel
- UINT32 charincrement; // distance between two consecutive elements (in bits)
- const UINT32 * extxoffs; // extended X offset array for really big layouts
- const UINT32 * extyoffs; // extended Y offset array for really big layouts
+ UINT16 width; // pixel width of each element
+ UINT16 height; // pixel height of each element
+ UINT32 total; // total number of elements, or RGN_FRAC()
+ UINT16 planes; // number of bitplanes
+ UINT32 planeoffset[MAX_GFX_PLANES]; // bit offset of each bitplane
+ UINT32 xoffset[MAX_GFX_SIZE]; // bit offset of each horizontal pixel
+ UINT32 yoffset[MAX_GFX_SIZE]; // bit offset of each vertical pixel
+ UINT32 charincrement; // distance between two consecutive elements (in bits)
+ const UINT32 * extxoffs; // extended X offset array for really big layouts
+ const UINT32 * extyoffs; // extended Y offset array for really big layouts
};
@@ -169,50 +169,50 @@ public:
private:
// internal state
- UINT16 m_width; // current pixel width of each element (changeble with source clipping)
- UINT16 m_height; // current pixel height of each element (changeble with source clipping)
- UINT16 m_startx; // current source clip X offset
- UINT16 m_starty; // current source clip Y offset
-
- UINT16 m_origwidth; // starting pixel width of each element
- UINT16 m_origheight; // staring pixel height of each element
- UINT32 m_total_elements; // total number of decoded elements
-
- UINT32 m_color_base; // base color for rendering
- UINT16 m_color_depth; // number of colors each pixel can represent
- UINT16 m_color_granularity; // number of colors for each color code
- UINT32 m_total_colors; // number of color codes
-
- UINT32 m_line_modulo; // bytes between each row of data
- UINT32 m_char_modulo; // bytes between each element
- const UINT8 * m_srcdata; // pointer to the source data for decoding
- UINT32 m_dirtyseq; // sequence number; incremented each time a tile is dirtied
-
- UINT8 * m_gfxdata; // pointer to decoded pixel data, 8bpp
- dynamic_buffer m_gfxdata_allocated; // allocated decoded pixel data, 8bpp
- dynamic_buffer m_dirty; // dirty array for detecting chars that need decoding
- dynamic_array<UINT32> m_pen_usage; // bitmask of pens that are used (pens 0-31 only)
-
- bool m_layout_is_raw; // raw layout?
- UINT8 m_layout_planes; // bit planes in the layout
- UINT32 m_layout_charincrement; // per-character increment in source data
+ UINT16 m_width; // current pixel width of each element (changeble with source clipping)
+ UINT16 m_height; // current pixel height of each element (changeble with source clipping)
+ UINT16 m_startx; // current source clip X offset
+ UINT16 m_starty; // current source clip Y offset
+
+ UINT16 m_origwidth; // starting pixel width of each element
+ UINT16 m_origheight; // staring pixel height of each element
+ UINT32 m_total_elements; // total number of decoded elements
+
+ UINT32 m_color_base; // base color for rendering
+ UINT16 m_color_depth; // number of colors each pixel can represent
+ UINT16 m_color_granularity; // number of colors for each color code
+ UINT32 m_total_colors; // number of color codes
+
+ UINT32 m_line_modulo; // bytes between each row of data
+ UINT32 m_char_modulo; // bytes between each element
+ const UINT8 * m_srcdata; // pointer to the source data for decoding
+ UINT32 m_dirtyseq; // sequence number; incremented each time a tile is dirtied
+
+ UINT8 * m_gfxdata; // pointer to decoded pixel data, 8bpp
+ dynamic_buffer m_gfxdata_allocated; // allocated decoded pixel data, 8bpp
+ dynamic_buffer m_dirty; // dirty array for detecting chars that need decoding
+ dynamic_array<UINT32> m_pen_usage; // bitmask of pens that are used (pens 0-31 only)
+
+ bool m_layout_is_raw; // raw layout?
+ UINT8 m_layout_planes; // bit planes in the layout
+ UINT32 m_layout_charincrement; // per-character increment in source data
dynamic_array<UINT32> m_layout_planeoffset;// plane offsets
- dynamic_array<UINT32> m_layout_xoffset; // X offsets
- dynamic_array<UINT32> m_layout_yoffset; // Y offsets
+ dynamic_array<UINT32> m_layout_xoffset; // X offsets
+ dynamic_array<UINT32> m_layout_yoffset; // Y offsets
- running_machine &m_machine; // pointer to the owning machine
+ running_machine &m_machine; // pointer to the owning machine
};
struct gfx_decode_entry
{
- const char * memory_region; // memory region where the data resides
- UINT32 start; // offset of beginning of data to decode
- const gfx_layout *gfxlayout; // pointer to gfx_layout describing the layout; NULL marks the end of the array
- UINT16 color_codes_start; // offset in the color lookup table where color codes start
- UINT16 total_color_codes; // total number of color codes
- UINT8 xscale; // optional horizontal scaling factor; 0 means 1x
- UINT8 yscale; // optional vertical scaling factor; 0 means 1x
+ const char * memory_region; // memory region where the data resides
+ UINT32 start; // offset of beginning of data to decode
+ const gfx_layout *gfxlayout; // pointer to gfx_layout describing the layout; NULL marks the end of the array
+ UINT16 color_codes_start; // offset in the color lookup table where color codes start
+ UINT16 total_color_codes; // total number of color codes
+ UINT8 xscale; // optional horizontal scaling factor; 0 means 1x
+ UINT8 yscale; // optional vertical scaling factor; 0 means 1x
};
@@ -411,8 +411,8 @@ inline UINT32 alpha_blend_r16(UINT32 d, UINT32 s, UINT8 level)
{
int alphad = 256 - level;
return ((((s & 0x001f) * level + (d & 0x001f) * alphad) >> 8)) |
- ((((s & 0x03e0) * level + (d & 0x03e0) * alphad) >> 8) & 0x03e0) |
- ((((s & 0x7c00) * level + (d & 0x7c00) * alphad) >> 8) & 0x7c00);
+ ((((s & 0x03e0) * level + (d & 0x03e0) * alphad) >> 8) & 0x03e0) |
+ ((((s & 0x7c00) * level + (d & 0x7c00) * alphad) >> 8) & 0x7c00);
}
@@ -425,9 +425,9 @@ inline UINT32 alpha_blend_r32(UINT32 d, UINT32 s, UINT8 level)
{
int alphad = 256 - level;
return ((((s & 0x0000ff) * level + (d & 0x0000ff) * alphad) >> 8)) |
- ((((s & 0x00ff00) * level + (d & 0x00ff00) * alphad) >> 8) & 0x00ff00) |
- ((((s & 0xff0000) * level + (d & 0xff0000) * alphad) >> 8) & 0xff0000);
+ ((((s & 0x00ff00) * level + (d & 0x00ff00) * alphad) >> 8) & 0x00ff00) |
+ ((((s & 0xff0000) * level + (d & 0xff0000) * alphad) >> 8) & 0xff0000);
}
-#endif // __DRAWGFX_H__
+#endif // __DRAWGFX_H__
diff --git a/src/emu/drawgfxm.h b/src/emu/drawgfxm.h
index 5686f788882..05d67fe2e3a 100644
--- a/src/emu/drawgfxm.h
+++ b/src/emu/drawgfxm.h
@@ -63,9 +63,9 @@ extern bitmap_ind8 drawgfx_dummy_priority_bitmap;
/* macros for using the optional priority */
-#define PRIORITY_VALID(x) (sizeof(x) != sizeof(NO_PRIORITY))
-#define PRIORITY_ADDR(p,t,y,x) (PRIORITY_VALID(t) ? (&(p).pixt<t>(y, x)) : NULL)
-#define PRIORITY_ADVANCE(t,p,i) do { if (PRIORITY_VALID(t)) (p) += (i); } while (0)
+#define PRIORITY_VALID(x) (sizeof(x) != sizeof(NO_PRIORITY))
+#define PRIORITY_ADDR(p,t,y,x) (PRIORITY_VALID(t) ? (&(p).pixt<t>(y, x)) : NULL)
+#define PRIORITY_ADVANCE(t,p,i) do { if (PRIORITY_VALID(t)) (p) += (i); } while (0)
/***************************************************************************
@@ -77,12 +77,12 @@ extern bitmap_ind8 drawgfx_dummy_priority_bitmap;
regardless of pen, copying directly
-------------------------------------------------*/
-#define PIXEL_OP_COPY_OPAQUE(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- (DEST) = SOURCE; \
-} \
-while (0) \
+#define PIXEL_OP_COPY_OPAQUE(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ (DEST) = SOURCE; \
+} \
+while (0) \
/*-------------------------------------------------
@@ -91,14 +91,14 @@ while (0) \
directly
-------------------------------------------------*/
-#define PIXEL_OP_COPY_TRANSPEN(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (srcdata != transpen) \
- (DEST) = SOURCE; \
-} \
-while (0) \
+#define PIXEL_OP_COPY_TRANSPEN(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (srcdata != transpen) \
+ (DEST) = SOURCE; \
+} \
+while (0) \
/*-------------------------------------------------
@@ -107,21 +107,21 @@ while (0) \
'paldata' array
-------------------------------------------------*/
-#define PIXEL_OP_REMAP_OPAQUE(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- (DEST) = paldata[SOURCE]; \
-} \
-while (0) \
+#define PIXEL_OP_REMAP_OPAQUE(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ (DEST) = paldata[SOURCE]; \
+} \
+while (0) \
-#define PIXEL_OP_REMAP_OPAQUE_PRIORITY(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
- (DEST) = paldata[SOURCE]; \
- (PRIORITY) = 31; \
-} \
-while (0) \
+#define PIXEL_OP_REMAP_OPAQUE_PRIORITY(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
+ (DEST) = paldata[SOURCE]; \
+ (PRIORITY) = 31; \
+} \
+while (0) \
/*-------------------------------------------------
@@ -130,27 +130,27 @@ while (0) \
pen via the 'paldata' array
-------------------------------------------------*/
-#define PIXEL_OP_REMAP_TRANSPEN(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (srcdata != transpen) \
- (DEST) = paldata[srcdata]; \
-} \
-while (0) \
-
-#define PIXEL_OP_REMAP_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (srcdata != transpen) \
- { \
- if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
- (DEST) = paldata[srcdata]; \
- (PRIORITY) = 31; \
- } \
-} \
-while (0) \
+#define PIXEL_OP_REMAP_TRANSPEN(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (srcdata != transpen) \
+ (DEST) = paldata[srcdata]; \
+} \
+while (0) \
+
+#define PIXEL_OP_REMAP_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (srcdata != transpen) \
+ { \
+ if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
+ (DEST) = paldata[srcdata]; \
+ (PRIORITY) = 31; \
+ } \
+} \
+while (0) \
/*-------------------------------------------------
@@ -159,27 +159,27 @@ while (0) \
'color' to the pen value
-------------------------------------------------*/
-#define PIXEL_OP_REBASE_TRANSPEN(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (srcdata != transpen) \
- (DEST) = color + srcdata; \
-} \
-while (0) \
-
-#define PIXEL_OP_REBASE_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (srcdata != transpen) \
- { \
- if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
- (DEST) = color + srcdata; \
- (PRIORITY) = 31; \
- } \
-} \
-while (0) \
+#define PIXEL_OP_REBASE_TRANSPEN(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (srcdata != transpen) \
+ (DEST) = color + srcdata; \
+} \
+while (0) \
+
+#define PIXEL_OP_REBASE_TRANSPEN_PRIORITY(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (srcdata != transpen) \
+ { \
+ if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
+ (DEST) = color + srcdata; \
+ (PRIORITY) = 31; \
+ } \
+} \
+while (0) \
/*-------------------------------------------------
@@ -188,27 +188,27 @@ while (0) \
pen via the 'paldata' array
-------------------------------------------------*/
-#define PIXEL_OP_REMAP_TRANSMASK(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (((transmask >> srcdata) & 1) == 0) \
- (DEST) = paldata[srcdata]; \
-} \
-while (0) \
-
-#define PIXEL_OP_REMAP_TRANSMASK_PRIORITY(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (((transmask >> srcdata) & 1) == 0) \
- { \
- if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
- (DEST) = paldata[srcdata]; \
- (PRIORITY) = 31; \
- } \
-} \
-while (0) \
+#define PIXEL_OP_REMAP_TRANSMASK(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (((transmask >> srcdata) & 1) == 0) \
+ (DEST) = paldata[srcdata]; \
+} \
+while (0) \
+
+#define PIXEL_OP_REMAP_TRANSMASK_PRIORITY(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (((transmask >> srcdata) & 1) == 0) \
+ { \
+ if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
+ (DEST) = paldata[srcdata]; \
+ (PRIORITY) = 31; \
+ } \
+} \
+while (0) \
/*-------------------------------------------------
@@ -220,81 +220,81 @@ while (0) \
the destination pixel using 'shadowtable'
-------------------------------------------------*/
-#define PIXEL_OP_REMAP_TRANSTABLE16(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- UINT32 entry = pentable[srcdata]; \
- if (entry != DRAWMODE_NONE) \
- { \
- if (entry == DRAWMODE_SOURCE) \
- (DEST) = paldata[srcdata]; \
- else \
- (DEST) = shadowtable[DEST]; \
- } \
-} \
-while (0) \
-
-#define PIXEL_OP_REMAP_TRANSTABLE32(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- UINT32 entry = pentable[srcdata]; \
- if (entry != DRAWMODE_NONE) \
- { \
- if (entry == DRAWMODE_SOURCE) \
- (DEST) = paldata[srcdata]; \
- else \
- (DEST) = shadowtable[rgb_to_rgb15(DEST)]; \
- } \
-} \
-while (0) \
-
-#define PIXEL_OP_REMAP_TRANSTABLE16_PRIORITY(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- UINT32 entry = pentable[srcdata]; \
- if (entry != DRAWMODE_NONE) \
- { \
- UINT8 pridata = (PRIORITY); \
- if (entry == DRAWMODE_SOURCE) \
- { \
- if (((1 << (pridata & 0x1f)) & pmask) == 0) \
- (DEST) = paldata[srcdata]; \
- (PRIORITY) = 31; \
- } \
- else if ((pridata & 0x80) == 0 && ((1 << (pridata & 0x1f)) & pmask) == 0) \
- { \
- (DEST) = shadowtable[DEST]; \
- (PRIORITY) = pridata | 0x80; \
- } \
- } \
-} \
-while (0) \
-
-#define PIXEL_OP_REMAP_TRANSTABLE32_PRIORITY(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- UINT32 entry = pentable[srcdata]; \
- if (entry != DRAWMODE_NONE) \
- { \
- UINT8 pridata = (PRIORITY); \
- if (entry == DRAWMODE_SOURCE) \
- { \
- if (((1 << (pridata & 0x1f)) & pmask) == 0) \
- (DEST) = paldata[srcdata]; \
- (PRIORITY) = 31; \
- } \
- else if ((pridata & 0x80) == 0 && ((1 << (pridata & 0x1f)) & pmask) == 0) \
- { \
- (DEST) = shadowtable[rgb_to_rgb15(DEST)]; \
- (PRIORITY) = pridata | 0x80; \
- } \
- } \
-} \
-while (0) \
+#define PIXEL_OP_REMAP_TRANSTABLE16(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ UINT32 entry = pentable[srcdata]; \
+ if (entry != DRAWMODE_NONE) \
+ { \
+ if (entry == DRAWMODE_SOURCE) \
+ (DEST) = paldata[srcdata]; \
+ else \
+ (DEST) = shadowtable[DEST]; \
+ } \
+} \
+while (0) \
+
+#define PIXEL_OP_REMAP_TRANSTABLE32(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ UINT32 entry = pentable[srcdata]; \
+ if (entry != DRAWMODE_NONE) \
+ { \
+ if (entry == DRAWMODE_SOURCE) \
+ (DEST) = paldata[srcdata]; \
+ else \
+ (DEST) = shadowtable[rgb_to_rgb15(DEST)]; \
+ } \
+} \
+while (0) \
+
+#define PIXEL_OP_REMAP_TRANSTABLE16_PRIORITY(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ UINT32 entry = pentable[srcdata]; \
+ if (entry != DRAWMODE_NONE) \
+ { \
+ UINT8 pridata = (PRIORITY); \
+ if (entry == DRAWMODE_SOURCE) \
+ { \
+ if (((1 << (pridata & 0x1f)) & pmask) == 0) \
+ (DEST) = paldata[srcdata]; \
+ (PRIORITY) = 31; \
+ } \
+ else if ((pridata & 0x80) == 0 && ((1 << (pridata & 0x1f)) & pmask) == 0) \
+ { \
+ (DEST) = shadowtable[DEST]; \
+ (PRIORITY) = pridata | 0x80; \
+ } \
+ } \
+} \
+while (0) \
+
+#define PIXEL_OP_REMAP_TRANSTABLE32_PRIORITY(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ UINT32 entry = pentable[srcdata]; \
+ if (entry != DRAWMODE_NONE) \
+ { \
+ UINT8 pridata = (PRIORITY); \
+ if (entry == DRAWMODE_SOURCE) \
+ { \
+ if (((1 << (pridata & 0x1f)) & pmask) == 0) \
+ (DEST) = paldata[srcdata]; \
+ (PRIORITY) = 31; \
+ } \
+ else if ((pridata & 0x80) == 0 && ((1 << (pridata & 0x1f)) & pmask) == 0) \
+ { \
+ (DEST) = shadowtable[rgb_to_rgb15(DEST)]; \
+ (PRIORITY) = pridata | 0x80; \
+ } \
+ } \
+} \
+while (0) \
/*-------------------------------------------------
@@ -305,27 +305,27 @@ while (0) \
against the destination using 'alpha'
-------------------------------------------------*/
-#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (srcdata != transpen) \
- (DEST) = alpha_blend_r32((DEST), paldata[srcdata], alpha); \
-} \
-while (0) \
-
-#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32_PRIORITY(DEST, PRIORITY, SOURCE) \
-do \
-{ \
- UINT32 srcdata = (SOURCE); \
- if (srcdata != transpen) \
- { \
- if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
- (DEST) = alpha_blend_r32((DEST), paldata[srcdata], alpha); \
- (PRIORITY) = 31; \
- } \
-} \
-while (0) \
+#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (srcdata != transpen) \
+ (DEST) = alpha_blend_r32((DEST), paldata[srcdata], alpha); \
+} \
+while (0) \
+
+#define PIXEL_OP_REMAP_TRANSPEN_ALPHA32_PRIORITY(DEST, PRIORITY, SOURCE) \
+do \
+{ \
+ UINT32 srcdata = (SOURCE); \
+ if (srcdata != transpen) \
+ { \
+ if (((1 << ((PRIORITY) & 0x1f)) & pmask) == 0) \
+ (DEST) = alpha_blend_r32((DEST), paldata[srcdata], alpha); \
+ (PRIORITY) = 31; \
+ } \
+} \
+while (0) \
@@ -349,153 +349,153 @@ while (0) \
*/
-#define DRAWGFX_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
-do { \
- g_profiler.start(PROFILER_DRAWGFX); \
- do { \
- const UINT8 *srcdata; \
- INT32 destendx, destendy; \
- INT32 srcx, srcy; \
- INT32 curx, cury; \
- INT32 dy; \
+#define DRAWGFX_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
+do { \
+ g_profiler.start(PROFILER_DRAWGFX); \
+ do { \
+ const UINT8 *srcdata; \
+ INT32 destendx, destendy; \
+ INT32 srcx, srcy; \
+ INT32 curx, cury; \
+ INT32 dy; \
\
- assert(dest.valid()); \
- assert(gfx != NULL); \
- assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
- assert(dest.cliprect().contains(cliprect)); \
- assert(code < gfx->elements()); \
+ assert(dest.valid()); \
+ assert(gfx != NULL); \
+ assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
+ assert(dest.cliprect().contains(cliprect)); \
+ assert(code < gfx->elements()); \
\
- /* ignore empty/invalid cliprects */ \
- if (cliprect.empty()) \
- break; \
+ /* ignore empty/invalid cliprects */ \
+ if (cliprect.empty()) \
+ break; \
\
- /* compute final pixel in X and exit if we are entirely clipped */ \
- destendx = destx + gfx->width() - 1; \
- if (destx > cliprect.max_x || destendx < cliprect.min_x) \
- break; \
+ /* compute final pixel in X and exit if we are entirely clipped */ \
+ destendx = destx + gfx->width() - 1; \
+ if (destx > cliprect.max_x || destendx < cliprect.min_x) \
+ break; \
\
- /* apply left clip */ \
- srcx = 0; \
- if (destx < cliprect.min_x) \
- { \
- srcx = cliprect.min_x - destx; \
- destx = cliprect.min_x; \
- } \
+ /* apply left clip */ \
+ srcx = 0; \
+ if (destx < cliprect.min_x) \
+ { \
+ srcx = cliprect.min_x - destx; \
+ destx = cliprect.min_x; \
+ } \
\
- /* apply right clip */ \
- if (destendx > cliprect.max_x) \
- destendx = cliprect.max_x; \
+ /* apply right clip */ \
+ if (destendx > cliprect.max_x) \
+ destendx = cliprect.max_x; \
\
- /* compute final pixel in Y and exit if we are entirely clipped */ \
- destendy = desty + gfx->height() - 1; \
- if (desty > cliprect.max_y || destendy < cliprect.min_y) \
- break; \
+ /* compute final pixel in Y and exit if we are entirely clipped */ \
+ destendy = desty + gfx->height() - 1; \
+ if (desty > cliprect.max_y || destendy < cliprect.min_y) \
+ break; \
\
- /* apply top clip */ \
- srcy = 0; \
- if (desty < cliprect.min_y) \
- { \
- srcy = cliprect.min_y - desty; \
- desty = cliprect.min_y; \
- } \
+ /* apply top clip */ \
+ srcy = 0; \
+ if (desty < cliprect.min_y) \
+ { \
+ srcy = cliprect.min_y - desty; \
+ desty = cliprect.min_y; \
+ } \
\
- /* apply bottom clip */ \
- if (destendy > cliprect.max_y) \
- destendy = cliprect.max_y; \
+ /* apply bottom clip */ \
+ if (destendy > cliprect.max_y) \
+ destendy = cliprect.max_y; \
\
- /* apply X flipping */ \
- if (flipx) \
- srcx = gfx->width() - 1 - srcx; \
+ /* apply X flipping */ \
+ if (flipx) \
+ srcx = gfx->width() - 1 - srcx; \
\
- /* apply Y flipping */ \
- dy = gfx->rowbytes(); \
- if (flipy) \
- { \
- srcy = gfx->height() - 1 - srcy; \
- dy = -dy; \
- } \
+ /* apply Y flipping */ \
+ dy = gfx->rowbytes(); \
+ if (flipy) \
+ { \
+ srcy = gfx->height() - 1 - srcy; \
+ dy = -dy; \
+ } \
\
- /* fetch the source data */ \
- srcdata = gfx->get_data(code); \
+ /* fetch the source data */ \
+ srcdata = gfx->get_data(code); \
\
- /* compute how many blocks of 4 pixels we have */ \
- UINT32 numblocks = (destendx + 1 - destx) / 4; \
- UINT32 leftovers = (destendx + 1 - destx) - 4 * numblocks; \
+ /* compute how many blocks of 4 pixels we have */ \
+ UINT32 numblocks = (destendx + 1 - destx) / 4; \
+ UINT32 leftovers = (destendx + 1 - destx) - 4 * numblocks; \
\
- /* adjust srcdata to point to the first source pixel of the row */ \
- srcdata += srcy * gfx->rowbytes() + srcx; \
+ /* adjust srcdata to point to the first source pixel of the row */ \
+ srcdata += srcy * gfx->rowbytes() + srcx; \
\
- /* non-flipped 8bpp case */ \
- if (!flipx) \
- { \
- /* iterate over pixels in Y */ \
- for (cury = desty; cury <= destendy; cury++) \
- { \
+ /* non-flipped 8bpp case */ \
+ if (!flipx) \
+ { \
+ /* iterate over pixels in Y */ \
+ for (cury = desty; cury <= destendy; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, destx); \
- PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
- const UINT8 *srcptr = srcdata; \
- srcdata += dy; \
+ PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
+ const UINT8 *srcptr = srcdata; \
+ srcdata += dy; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \
- PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \
- PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \
\
- srcptr += 4; \
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ srcptr += 4; \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- srcptr++; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ srcptr++; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
\
- /* flipped 8bpp case */ \
- else \
- { \
- /* iterate over pixels in Y */ \
- for (cury = desty; cury <= destendy; cury++) \
- { \
+ /* flipped 8bpp case */ \
+ else \
+ { \
+ /* iterate over pixels in Y */ \
+ for (cury = desty; cury <= destendy; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, destx); \
- PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
- const UINT8 *srcptr = srcdata; \
- srcdata += dy; \
+ PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
+ const UINT8 *srcptr = srcdata; \
+ srcdata += dy; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \
- PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \
- PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \
- PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \
\
- srcptr -= 4; \
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ srcptr -= 4; \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- srcptr--; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
- } while (0); \
- g_profiler.stop(); \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ srcptr--; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
+ } while (0); \
+ g_profiler.stop(); \
} while (0)
@@ -522,130 +522,130 @@ do { \
*/
-#define DRAWGFXZOOM_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
-do { \
- g_profiler.start(PROFILER_DRAWGFX); \
- do { \
- const UINT8 *srcdata; \
- UINT32 dstwidth, dstheight; \
- INT32 destendx, destendy; \
- INT32 srcx, srcy; \
- INT32 curx, cury; \
- INT32 dx, dy; \
+#define DRAWGFXZOOM_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
+do { \
+ g_profiler.start(PROFILER_DRAWGFX); \
+ do { \
+ const UINT8 *srcdata; \
+ UINT32 dstwidth, dstheight; \
+ INT32 destendx, destendy; \
+ INT32 srcx, srcy; \
+ INT32 curx, cury; \
+ INT32 dx, dy; \
\
- assert(dest.valid()); \
- assert(gfx != NULL); \
- assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
- assert(dest.cliprect().contains(cliprect)); \
+ assert(dest.valid()); \
+ assert(gfx != NULL); \
+ assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
+ assert(dest.cliprect().contains(cliprect)); \
\
- /* ignore empty/invalid cliprects */ \
- if (cliprect.empty()) \
- break; \
+ /* ignore empty/invalid cliprects */ \
+ if (cliprect.empty()) \
+ break; \
\
- /* compute scaled size */ \
- dstwidth = (scalex * gfx->width() + 0x8000) >> 16; \
- dstheight = (scaley * gfx->height() + 0x8000) >> 16; \
- if (dstwidth < 1 || dstheight < 1) \
- break; \
+ /* compute scaled size */ \
+ dstwidth = (scalex * gfx->width() + 0x8000) >> 16; \
+ dstheight = (scaley * gfx->height() + 0x8000) >> 16; \
+ if (dstwidth < 1 || dstheight < 1) \
+ break; \
\
- /* compute 16.16 source steps in dx and dy */ \
- dx = (gfx->width() << 16) / dstwidth; \
- dy = (gfx->height() << 16) / dstheight; \
+ /* compute 16.16 source steps in dx and dy */ \
+ dx = (gfx->width() << 16) / dstwidth; \
+ dy = (gfx->height() << 16) / dstheight; \
\
- /* compute final pixel in X and exit if we are entirely clipped */ \
- destendx = destx + dstwidth - 1; \
- if (destx > cliprect.max_x || destendx < cliprect.min_x) \
- break; \
+ /* compute final pixel in X and exit if we are entirely clipped */ \
+ destendx = destx + dstwidth - 1; \
+ if (destx > cliprect.max_x || destendx < cliprect.min_x) \
+ break; \
\
- /* apply left clip */ \
- srcx = 0; \
- if (destx < cliprect.min_x) \
- { \
- srcx = (cliprect.min_x - destx) * dx; \
- destx = cliprect.min_x; \
- } \
+ /* apply left clip */ \
+ srcx = 0; \
+ if (destx < cliprect.min_x) \
+ { \
+ srcx = (cliprect.min_x - destx) * dx; \
+ destx = cliprect.min_x; \
+ } \
\
- /* apply right clip */ \
- if (destendx > cliprect.max_x) \
- destendx = cliprect.max_x; \
+ /* apply right clip */ \
+ if (destendx > cliprect.max_x) \
+ destendx = cliprect.max_x; \
\
- /* compute final pixel in Y and exit if we are entirely clipped */ \
- destendy = desty + dstheight - 1; \
- if (desty > cliprect.max_y || destendy < cliprect.min_y) \
- { \
- g_profiler.stop(); \
- return; \
- } \
+ /* compute final pixel in Y and exit if we are entirely clipped */ \
+ destendy = desty + dstheight - 1; \
+ if (desty > cliprect.max_y || destendy < cliprect.min_y) \
+ { \
+ g_profiler.stop(); \
+ return; \
+ } \
\
- /* apply top clip */ \
- srcy = 0; \
- if (desty < cliprect.min_y) \
- { \
- srcy = (cliprect.min_y - desty) * dy; \
- desty = cliprect.min_y; \
- } \
+ /* apply top clip */ \
+ srcy = 0; \
+ if (desty < cliprect.min_y) \
+ { \
+ srcy = (cliprect.min_y - desty) * dy; \
+ desty = cliprect.min_y; \
+ } \
\
- /* apply bottom clip */ \
- if (destendy > cliprect.max_y) \
- destendy = cliprect.max_y; \
+ /* apply bottom clip */ \
+ if (destendy > cliprect.max_y) \
+ destendy = cliprect.max_y; \
\
- /* apply X flipping */ \
- if (flipx) \
- { \
- srcx = (dstwidth - 1) * dx - srcx; \
- dx = -dx; \
- } \
+ /* apply X flipping */ \
+ if (flipx) \
+ { \
+ srcx = (dstwidth - 1) * dx - srcx; \
+ dx = -dx; \
+ } \
\
- /* apply Y flipping */ \
- if (flipy) \
- { \
- srcy = (dstheight - 1) * dy - srcy; \
- dy = -dy; \
- } \
+ /* apply Y flipping */ \
+ if (flipy) \
+ { \
+ srcy = (dstheight - 1) * dy - srcy; \
+ dy = -dy; \
+ } \
\
- /* fetch the source data */ \
- srcdata = gfx->get_data(code); \
+ /* fetch the source data */ \
+ srcdata = gfx->get_data(code); \
\
- /* compute how many blocks of 4 pixels we have */ \
- UINT32 numblocks = (destendx + 1 - destx) / 4; \
- UINT32 leftovers = (destendx + 1 - destx) - 4 * numblocks; \
+ /* compute how many blocks of 4 pixels we have */ \
+ UINT32 numblocks = (destendx + 1 - destx) / 4; \
+ UINT32 leftovers = (destendx + 1 - destx) - 4 * numblocks; \
\
- /* iterate over pixels in Y */ \
- for (cury = desty; cury <= destendy; cury++) \
- { \
+ /* iterate over pixels in Y */ \
+ for (cury = desty; cury <= destendy; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, destx); \
- PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
- const UINT8 *srcptr = srcdata + (srcy >> 16) * gfx->rowbytes(); \
- INT32 cursrcx = srcx; \
- srcy += dy; \
+ PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
+ const UINT8 *srcptr = srcdata + (srcy >> 16) * gfx->rowbytes(); \
+ INT32 cursrcx = srcx; \
+ srcy += dy; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[cursrcx >> 16]); \
- cursrcx += dx; \
- PIXEL_OP(destptr[1], priptr[1], srcptr[cursrcx >> 16]); \
- cursrcx += dx; \
- PIXEL_OP(destptr[2], priptr[2], srcptr[cursrcx >> 16]); \
- cursrcx += dx; \
- PIXEL_OP(destptr[3], priptr[3], srcptr[cursrcx >> 16]); \
- cursrcx += dx; \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[cursrcx >> 16]); \
+ cursrcx += dx; \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[cursrcx >> 16]); \
+ cursrcx += dx; \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[cursrcx >> 16]); \
+ cursrcx += dx; \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[cursrcx >> 16]); \
+ cursrcx += dx; \
\
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[cursrcx >> 16]); \
- cursrcx += dx; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } while (0); \
- g_profiler.stop(); \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[cursrcx >> 16]); \
+ cursrcx += dx; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } while (0); \
+ g_profiler.stop(); \
} while (0)
@@ -667,156 +667,156 @@ do { \
bitmap_t &priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
-#define COPYBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
-do { \
- g_profiler.start(PROFILER_COPYBITMAP); \
- do { \
- const PIXEL_TYPE *srcdata; \
- UINT32 numblocks, leftovers; \
- INT32 destendx, destendy; \
- INT32 srcx, srcy; \
- INT32 curx, cury; \
- INT32 dx, dy; \
+#define COPYBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
+do { \
+ g_profiler.start(PROFILER_COPYBITMAP); \
+ do { \
+ const PIXEL_TYPE *srcdata; \
+ UINT32 numblocks, leftovers; \
+ INT32 destendx, destendy; \
+ INT32 srcx, srcy; \
+ INT32 curx, cury; \
+ INT32 dx, dy; \
\
- assert(dest.valid()); \
- assert(src.valid()); \
- assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
- assert(dest.cliprect().contains(cliprect)); \
+ assert(dest.valid()); \
+ assert(src.valid()); \
+ assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
+ assert(dest.cliprect().contains(cliprect)); \
\
- /* ignore empty/invalid cliprects */ \
- if (cliprect.empty()) \
- break; \
+ /* ignore empty/invalid cliprects */ \
+ if (cliprect.empty()) \
+ break; \
\
- /* standard setup; dx counts bytes in X, dy counts pixels in Y */ \
- dx = 1; \
- dy = src.rowpixels(); \
+ /* standard setup; dx counts bytes in X, dy counts pixels in Y */ \
+ dx = 1; \
+ dy = src.rowpixels(); \
\
- /* compute final pixel in X and exit if we are entirely clipped */ \
- destendx = destx + src.width() - 1; \
- if (destx > cliprect.max_x || destendx < cliprect.min_x) \
- break; \
+ /* compute final pixel in X and exit if we are entirely clipped */ \
+ destendx = destx + src.width() - 1; \
+ if (destx > cliprect.max_x || destendx < cliprect.min_x) \
+ break; \
\
- /* apply left clip */ \
- srcx = 0; \
- if (destx < cliprect.min_x) \
- { \
- srcx = cliprect.min_x - destx; \
- destx = cliprect.min_x; \
- } \
+ /* apply left clip */ \
+ srcx = 0; \
+ if (destx < cliprect.min_x) \
+ { \
+ srcx = cliprect.min_x - destx; \
+ destx = cliprect.min_x; \
+ } \
\
- /* apply right clip */ \
- if (destendx > cliprect.max_x) \
- destendx = cliprect.max_x; \
+ /* apply right clip */ \
+ if (destendx > cliprect.max_x) \
+ destendx = cliprect.max_x; \
\
- /* compute final pixel in Y and exit if we are entirely clipped */ \
- destendy = desty + src.height() - 1; \
- if (desty > cliprect.max_y || destendy < cliprect.min_y) \
- break; \
+ /* compute final pixel in Y and exit if we are entirely clipped */ \
+ destendy = desty + src.height() - 1; \
+ if (desty > cliprect.max_y || destendy < cliprect.min_y) \
+ break; \
\
- /* apply top clip */ \
- srcy = 0; \
- if (desty < cliprect.min_y) \
- { \
- srcy = cliprect.min_y - desty; \
- desty = cliprect.min_y; \
- } \
+ /* apply top clip */ \
+ srcy = 0; \
+ if (desty < cliprect.min_y) \
+ { \
+ srcy = cliprect.min_y - desty; \
+ desty = cliprect.min_y; \
+ } \
\
- /* apply bottom clip */ \
- if (destendy > cliprect.max_y) \
- destendy = cliprect.max_y; \
+ /* apply bottom clip */ \
+ if (destendy > cliprect.max_y) \
+ destendy = cliprect.max_y; \
\
- /* apply X flipping */ \
- if (flipx) \
- { \
- srcx = src.width() - 1 - srcx; \
- dx = -dx; \
- } \
+ /* apply X flipping */ \
+ if (flipx) \
+ { \
+ srcx = src.width() - 1 - srcx; \
+ dx = -dx; \
+ } \
\
- /* apply Y flipping */ \
- if (flipy) \
- { \
- srcy = src.height() - 1 - srcy; \
- dy = -dy; \
- } \
+ /* apply Y flipping */ \
+ if (flipy) \
+ { \
+ srcy = src.height() - 1 - srcy; \
+ dy = -dy; \
+ } \
\
- /* compute how many blocks of 4 pixels we have */ \
- numblocks = (destendx + 1 - destx) / 4; \
- leftovers = (destendx + 1 - destx) - 4 * numblocks; \
+ /* compute how many blocks of 4 pixels we have */ \
+ numblocks = (destendx + 1 - destx) / 4; \
+ leftovers = (destendx + 1 - destx) - 4 * numblocks; \
\
- /* compute the address of the first source pixel of the first row */ \
- srcdata = &src.pixt<PIXEL_TYPE>(srcy, srcx); \
+ /* compute the address of the first source pixel of the first row */ \
+ srcdata = &src.pixt<PIXEL_TYPE>(srcy, srcx); \
\
- /* non-flipped case */ \
- if (!flipx) \
- { \
- /* iterate over pixels in Y */ \
- for (cury = desty; cury <= destendy; cury++) \
- { \
+ /* non-flipped case */ \
+ if (!flipx) \
+ { \
+ /* iterate over pixels in Y */ \
+ for (cury = desty; cury <= destendy; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, destx); \
- PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
- const PIXEL_TYPE *srcptr = srcdata; \
- srcdata += dy; \
+ PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
+ const PIXEL_TYPE *srcptr = srcdata; \
+ srcdata += dy; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \
- PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \
- PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \
\
- srcptr += 4; \
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ srcptr += 4; \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- srcptr++; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ srcptr++; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
\
- /* flipped case */ \
- else \
- { \
- /* iterate over pixels in Y */ \
- for (cury = desty; cury <= destendy; cury++) \
- { \
+ /* flipped case */ \
+ else \
+ { \
+ /* iterate over pixels in Y */ \
+ for (cury = desty; cury <= destendy; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, destx); \
- PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
- const PIXEL_TYPE *srcptr = srcdata; \
- srcdata += dy; \
+ PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, destx); \
+ const PIXEL_TYPE *srcptr = srcdata; \
+ srcdata += dy; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \
- PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \
- PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \
- PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[ 0]); \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[-1]); \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[-2]); \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[-3]); \
\
- srcptr -= 4; \
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ srcptr -= 4; \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- srcptr--; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
- } while (0); \
- g_profiler.stop(); \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ srcptr--; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
+ } while (0); \
+ g_profiler.stop(); \
} while (0)
@@ -841,280 +841,280 @@ do { \
bitmap_t &priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
-#define COPYROZBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
-do { \
- UINT32 srcfixwidth, srcfixheight; \
- UINT32 numblocks, leftovers; \
- INT32 curx, cury; \
+#define COPYROZBITMAP_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
+do { \
+ UINT32 srcfixwidth, srcfixheight; \
+ UINT32 numblocks, leftovers; \
+ INT32 curx, cury; \
\
- g_profiler.start(PROFILER_COPYBITMAP); \
+ g_profiler.start(PROFILER_COPYBITMAP); \
\
- assert(dest.valid()); \
- assert(dest.valid()); \
- assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
- assert(dest.cliprect().contains(cliprect)); \
- assert(!wraparound || (src.width() & (src.width() - 1)) == 0); \
- assert(!wraparound || (src.height() & (src.height() - 1)) == 0); \
+ assert(dest.valid()); \
+ assert(dest.valid()); \
+ assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
+ assert(dest.cliprect().contains(cliprect)); \
+ assert(!wraparound || (src.width() & (src.width() - 1)) == 0); \
+ assert(!wraparound || (src.height() & (src.height() - 1)) == 0); \
\
- /* ignore empty/invalid cliprects */ \
- if (cliprect.empty()) \
- break; \
+ /* ignore empty/invalid cliprects */ \
+ if (cliprect.empty()) \
+ break; \
\
- /* compute fixed-point 16.16 size of the source bitmap */ \
- srcfixwidth = src.width() << 16; \
- srcfixheight = src.height() << 16; \
+ /* compute fixed-point 16.16 size of the source bitmap */ \
+ srcfixwidth = src.width() << 16; \
+ srcfixheight = src.height() << 16; \
\
- /* advance the starting coordinates to the top-left of the cliprect */ \
- startx += cliprect.min_x * incxx + cliprect.min_y * incyx; \
- starty += cliprect.min_x * incxy + cliprect.min_y * incyy; \
+ /* advance the starting coordinates to the top-left of the cliprect */ \
+ startx += cliprect.min_x * incxx + cliprect.min_y * incyx; \
+ starty += cliprect.min_x * incxy + cliprect.min_y * incyy; \
\
- /* compute how many blocks of 4 pixels we have */ \
- numblocks = cliprect.width() / 4; \
- leftovers = cliprect.width() - 4 * numblocks; \
+ /* compute how many blocks of 4 pixels we have */ \
+ numblocks = cliprect.width() / 4; \
+ leftovers = cliprect.width() - 4 * numblocks; \
\
- /* if incxy and incyx are 0, then we aren't rotating, just zooming */ \
- if (incxy == 0 && incyx == 0) \
- { \
- /* zoom-only, non-wraparound case */ \
- if (!wraparound) \
- { \
- /* iterate over pixels in Y */ \
- for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
- { \
+ /* if incxy and incyx are 0, then we aren't rotating, just zooming */ \
+ if (incxy == 0 && incyx == 0) \
+ { \
+ /* zoom-only, non-wraparound case */ \
+ if (!wraparound) \
+ { \
+ /* iterate over pixels in Y */ \
+ for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, cliprect.min_x); \
PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, cliprect.min_x); \
- const PIXEL_TYPE *srcptr; \
- INT32 srcx = startx; \
- INT32 srcy = starty; \
+ const PIXEL_TYPE *srcptr; \
+ INT32 srcx = startx; \
+ INT32 srcy = starty; \
\
- starty += incyy; \
+ starty += incyy; \
\
- /* check srcy for the whole row at once */ \
- if ((UINT32)srcy < srcfixheight) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16); \
+ /* check srcy for the whole row at once */ \
+ if ((UINT32)srcy < srcfixheight) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16); \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- if ((UINT32)srcx < srcfixwidth) \
- PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
- srcx += incxx; \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ if ((UINT32)srcx < srcfixwidth) \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
+ srcx += incxx; \
\
- if ((UINT32)srcx < srcfixwidth) \
- PIXEL_OP(destptr[1], priptr[1], srcptr[srcx >> 16]); \
- srcx += incxx; \
+ if ((UINT32)srcx < srcfixwidth) \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[srcx >> 16]); \
+ srcx += incxx; \
\
- if ((UINT32)srcx < srcfixwidth) \
- PIXEL_OP(destptr[2], priptr[2], srcptr[srcx >> 16]); \
- srcx += incxx; \
+ if ((UINT32)srcx < srcfixwidth) \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[srcx >> 16]); \
+ srcx += incxx; \
\
- if ((UINT32)srcx < srcfixwidth) \
- PIXEL_OP(destptr[3], priptr[3], srcptr[srcx >> 16]); \
- srcx += incxx; \
+ if ((UINT32)srcx < srcfixwidth) \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[srcx >> 16]); \
+ srcx += incxx; \
\
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- if ((UINT32)srcx < srcfixwidth) \
- PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
- srcx += incxx; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
- } \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ if ((UINT32)srcx < srcfixwidth) \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
+ srcx += incxx; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
+ } \
\
- /* zoom-only, wraparound case */ \
- else \
- { \
- /* convert srcfixwidth/height into a mask and apply */ \
- srcfixwidth--; \
- srcfixheight--; \
- startx &= srcfixwidth; \
- starty &= srcfixheight; \
+ /* zoom-only, wraparound case */ \
+ else \
+ { \
+ /* convert srcfixwidth/height into a mask and apply */ \
+ srcfixwidth--; \
+ srcfixheight--; \
+ startx &= srcfixwidth; \
+ starty &= srcfixheight; \
\
- /* iterate over pixels in Y */ \
- for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
- { \
+ /* iterate over pixels in Y */ \
+ for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, cliprect.min_x); \
PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, cliprect.min_x); \
- const PIXEL_TYPE *srcptr = &src.pixt<PIXEL_TYPE>(starty >> 16); \
- INT32 srcx = startx; \
+ const PIXEL_TYPE *srcptr = &src.pixt<PIXEL_TYPE>(starty >> 16); \
+ INT32 srcx = startx; \
\
- starty = (starty + incyy) & srcfixheight; \
+ starty = (starty + incyy) & srcfixheight; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
- srcx = (srcx + incxx) & srcfixwidth; \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
\
- PIXEL_OP(destptr[1], priptr[1], srcptr[srcx >> 16]); \
- srcx = (srcx + incxx) & srcfixwidth; \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[srcx >> 16]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
\
- PIXEL_OP(destptr[2], priptr[2], srcptr[srcx >> 16]); \
- srcx = (srcx + incxx) & srcfixwidth; \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[srcx >> 16]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
\
- PIXEL_OP(destptr[3], priptr[3], srcptr[srcx >> 16]); \
- srcx = (srcx + incxx) & srcfixwidth; \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[srcx >> 16]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
\
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
- srcx = (srcx + incxx) & srcfixwidth; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
- } \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[srcx >> 16]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
+ } \
\
- /* full rotation case */ \
- else \
- { \
- /* full rotation, non-wraparound case */ \
- if (!wraparound) \
- { \
- /* iterate over pixels in Y */ \
- for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
- { \
+ /* full rotation case */ \
+ else \
+ { \
+ /* full rotation, non-wraparound case */ \
+ if (!wraparound) \
+ { \
+ /* iterate over pixels in Y */ \
+ for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, cliprect.min_x); \
PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, cliprect.min_x); \
- const PIXEL_TYPE *srcptr; \
- INT32 srcx = startx; \
- INT32 srcy = starty; \
+ const PIXEL_TYPE *srcptr; \
+ INT32 srcx = startx; \
+ INT32 srcy = starty; \
\
- startx += incyx; \
- starty += incyy; \
+ startx += incyx; \
+ starty += incyy; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- } \
- srcx += incxx; \
- srcy += incxy; \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ } \
+ srcx += incxx; \
+ srcy += incxy; \
\
- if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[1], priptr[1], srcptr[0]); \
- } \
- srcx += incxx; \
- srcy += incxy; \
+ if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[0]); \
+ } \
+ srcx += incxx; \
+ srcy += incxy; \
\
- if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[2], priptr[2], srcptr[0]); \
- } \
- srcx += incxx; \
- srcy += incxy; \
+ if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[0]); \
+ } \
+ srcx += incxx; \
+ srcy += incxy; \
\
- if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[3], priptr[3], srcptr[0]); \
- } \
- srcx += incxx; \
- srcy += incxy; \
+ if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[0]); \
+ } \
+ srcx += incxx; \
+ srcy += incxy; \
\
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- } \
- srcx += incxx; \
- srcy += incxy; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ if ((UINT32)srcx < srcfixwidth && (UINT32)srcy < srcfixheight) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ } \
+ srcx += incxx; \
+ srcy += incxy; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
\
- /* zoom-only, wraparound case */ \
- else \
- { \
- /* convert srcfixwidth/height into a mask and apply */ \
- srcfixwidth--; \
- srcfixheight--; \
- startx &= srcfixwidth; \
- starty &= srcfixheight; \
+ /* zoom-only, wraparound case */ \
+ else \
+ { \
+ /* convert srcfixwidth/height into a mask and apply */ \
+ srcfixwidth--; \
+ srcfixheight--; \
+ startx &= srcfixwidth; \
+ starty &= srcfixheight; \
\
- /* iterate over pixels in Y */ \
- for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
- { \
+ /* iterate over pixels in Y */ \
+ for (cury = cliprect.min_y; cury <= cliprect.max_y; cury++) \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, cury, cliprect.min_x); \
PIXEL_TYPE *destptr = &dest.pixt<PIXEL_TYPE>(cury, cliprect.min_x); \
- const PIXEL_TYPE *srcptr; \
- INT32 srcx = startx; \
- INT32 srcy = starty; \
+ const PIXEL_TYPE *srcptr; \
+ INT32 srcx = startx; \
+ INT32 srcy = starty; \
\
- startx = (startx + incyx) & srcfixwidth; \
- starty = (starty + incyy) & srcfixheight; \
+ startx = (startx + incyx) & srcfixwidth; \
+ starty = (starty + incyy) & srcfixheight; \
\
- /* iterate over unrolled blocks of 4 */ \
- for (curx = 0; curx < numblocks; curx++) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- srcx = (srcx + incxx) & srcfixwidth; \
- srcy = (srcy + incxy) & srcfixheight; \
+ /* iterate over unrolled blocks of 4 */ \
+ for (curx = 0; curx < numblocks; curx++) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
+ srcy = (srcy + incxy) & srcfixheight; \
\
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[1], priptr[1], srcptr[0]); \
- srcx = (srcx + incxx) & srcfixwidth; \
- srcy = (srcy + incxy) & srcfixheight; \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[0]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
+ srcy = (srcy + incxy) & srcfixheight; \
\
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[2], priptr[2], srcptr[0]); \
- srcx = (srcx + incxx) & srcfixwidth; \
- srcy = (srcy + incxy) & srcfixheight; \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[0]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
+ srcy = (srcy + incxy) & srcfixheight; \
\
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[3], priptr[3], srcptr[0]); \
- srcx = (srcx + incxx) & srcfixwidth; \
- srcy = (srcy + incxy) & srcfixheight; \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[0]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
+ srcy = (srcy + incxy) & srcfixheight; \
\
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- for (curx = 0; curx < leftovers; curx++) \
- { \
- srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- srcx = (srcx + incxx) & srcfixwidth; \
- srcy = (srcy + incxy) & srcfixheight; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
- } \
- } \
- g_profiler.stop(); \
+ /* iterate over leftover pixels */ \
+ for (curx = 0; curx < leftovers; curx++) \
+ { \
+ srcptr = &src.pixt<PIXEL_TYPE>(srcy >> 16, srcx >> 16); \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ srcx = (srcx + incxx) & srcfixwidth; \
+ srcy = (srcy + incxy) & srcfixheight; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
+ } \
+ } \
+ g_profiler.stop(); \
} while (0)
@@ -1134,43 +1134,43 @@ do { \
bitmap_t &priority - the priority bitmap (even if PRIORITY_TYPE is NO_PRIORITY, at least needs a dummy)
*/
-#define DRAWSCANLINE_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
-do { \
- assert(bitmap.valid()); \
- assert(destx >= 0); \
- assert(destx + length <= bitmap.width()); \
- assert(desty >= 0); \
- assert(desty < bitmap.height()); \
- assert(srcptr != NULL); \
- assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
+#define DRAWSCANLINE_CORE(PIXEL_TYPE, PIXEL_OP, PRIORITY_TYPE) \
+do { \
+ assert(bitmap.valid()); \
+ assert(destx >= 0); \
+ assert(destx + length <= bitmap.width()); \
+ assert(desty >= 0); \
+ assert(desty < bitmap.height()); \
+ assert(srcptr != NULL); \
+ assert(!PRIORITY_VALID(PRIORITY_TYPE) || priority.valid()); \
\
- { \
+ { \
PRIORITY_TYPE *priptr = PRIORITY_ADDR(priority, PRIORITY_TYPE, desty, destx); \
- PIXEL_TYPE *destptr = &bitmap.pixt<PIXEL_TYPE>(desty, destx); \
+ PIXEL_TYPE *destptr = &bitmap.pixt<PIXEL_TYPE>(desty, destx); \
\
- /* iterate over unrolled blocks of 4 */ \
- while (length >= 4) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \
- PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \
- PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \
+ /* iterate over unrolled blocks of 4 */ \
+ while (length >= 4) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ PIXEL_OP(destptr[1], priptr[1], srcptr[1]); \
+ PIXEL_OP(destptr[2], priptr[2], srcptr[2]); \
+ PIXEL_OP(destptr[3], priptr[3], srcptr[3]); \
\
- length -= 4; \
- srcptr += 4; \
- destptr += 4; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
- } \
+ length -= 4; \
+ srcptr += 4; \
+ destptr += 4; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 4); \
+ } \
\
- /* iterate over leftover pixels */ \
- while (length-- > 0) \
- { \
- PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
- srcptr++; \
- destptr++; \
- PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
- } \
- } \
+ /* iterate over leftover pixels */ \
+ while (length-- > 0) \
+ { \
+ PIXEL_OP(destptr[0], priptr[0], srcptr[0]); \
+ srcptr++; \
+ destptr++; \
+ PRIORITY_ADVANCE(PRIORITY_TYPE, priptr, 1); \
+ } \
+ } \
} while (0)
@@ -1189,40 +1189,40 @@ do { \
UINTx *destptr - pointer to memory to receive the extracted pixels
*/
-#define EXTRACTSCANLINE_CORE(PIXEL_TYPE) \
-do { \
- assert(bitmap.valid()); \
- assert(srcx >= 0); \
- assert(srcx + length <= bitmap.width()); \
- assert(srcy >= 0); \
- assert(srcy < bitmap.height()); \
- assert(destptr != NULL); \
+#define EXTRACTSCANLINE_CORE(PIXEL_TYPE) \
+do { \
+ assert(bitmap.valid()); \
+ assert(srcx >= 0); \
+ assert(srcx + length <= bitmap.width()); \
+ assert(srcy >= 0); \
+ assert(srcy < bitmap.height()); \
+ assert(destptr != NULL); \
\
- { \
- const PIXEL_TYPE *srcptr = &bitmap.pixt<PIXEL_TYPE>(srcy, srcx); \
+ { \
+ const PIXEL_TYPE *srcptr = &bitmap.pixt<PIXEL_TYPE>(srcy, srcx); \
\
- /* iterate over unrolled blocks of 4 */ \
- while (length >= 4) \
- { \
- destptr[0] = srcptr[0]; \
- destptr[1] = srcptr[1]; \
- destptr[2] = srcptr[2]; \
- destptr[3] = srcptr[3]; \
- length -= 4; \
- srcptr += 4; \
- destptr += 4; \
- } \
+ /* iterate over unrolled blocks of 4 */ \
+ while (length >= 4) \
+ { \
+ destptr[0] = srcptr[0]; \
+ destptr[1] = srcptr[1]; \
+ destptr[2] = srcptr[2]; \
+ destptr[3] = srcptr[3]; \
+ length -= 4; \
+ srcptr += 4; \
+ destptr += 4; \
+ } \
\
- /* iterate over leftover pixels */ \
- while (length > 0) \
- { \
- destptr[0] = srcptr[0]; \
- length--; \
- srcptr++; \
- destptr++; \
- } \
- } \
+ /* iterate over leftover pixels */ \
+ while (length > 0) \
+ { \
+ destptr[0] = srcptr[0]; \
+ length--; \
+ srcptr++; \
+ destptr++; \
+ } \
+ } \
} while (0)
-#endif /* __DRAWGFXM_H__ */
+#endif /* __DRAWGFXM_H__ */
diff --git a/src/emu/drivenum.c b/src/emu/drivenum.c
index 2f06589ad2b..9c9063a00cd 100644
--- a/src/emu/drivenum.c
+++ b/src/emu/drivenum.c
@@ -158,10 +158,10 @@ int driver_list::penalty_compare(const char *source, const char *target)
driver_enumerator::driver_enumerator(emu_options &options)
: m_current(-1),
- m_filtered_count(0),
- m_options(options),
- m_included(global_alloc_array(UINT8, s_driver_count)),
- m_config(global_alloc_array_clear(machine_config *, s_driver_count))
+ m_filtered_count(0),
+ m_options(options),
+ m_included(global_alloc_array(UINT8, s_driver_count)),
+ m_config(global_alloc_array_clear(machine_config *, s_driver_count))
{
include_all();
}
@@ -169,10 +169,10 @@ driver_enumerator::driver_enumerator(emu_options &options)
driver_enumerator::driver_enumerator(emu_options &options, const char *string)
: m_current(-1),
- m_filtered_count(0),
- m_options(options),
- m_included(global_alloc_array(UINT8, s_driver_count)),
- m_config(global_alloc_array_clear(machine_config *, s_driver_count))
+ m_filtered_count(0),
+ m_options(options),
+ m_included(global_alloc_array(UINT8, s_driver_count)),
+ m_config(global_alloc_array_clear(machine_config *, s_driver_count))
{
filter(string);
}
@@ -180,10 +180,10 @@ driver_enumerator::driver_enumerator(emu_options &options, const char *string)
driver_enumerator::driver_enumerator(emu_options &options, const game_driver &driver)
: m_current(-1),
- m_filtered_count(0),
- m_options(options),
- m_included(global_alloc_array(UINT8, s_driver_count)),
- m_config(global_alloc_array_clear(machine_config *, s_driver_count))
+ m_filtered_count(0),
+ m_options(options),
+ m_included(global_alloc_array(UINT8, s_driver_count)),
+ m_config(global_alloc_array_clear(machine_config *, s_driver_count))
{
filter(driver);
}
@@ -419,8 +419,8 @@ void driver_enumerator::find_approximate_matches(const char *string, int count,
driver_enumerator::config_entry::config_entry(machine_config &config, int index)
: m_next(NULL),
- m_config(&config),
- m_index(index)
+ m_config(&config),
+ m_index(index)
{
}
diff --git a/src/emu/drivenum.h b/src/emu/drivenum.h
index 40fc2ea0c13..7cdb72276ac 100644
--- a/src/emu/drivenum.h
+++ b/src/emu/drivenum.h
@@ -86,8 +86,8 @@ protected:
static int penalty_compare(const char *source, const char *target);
// internal state
- static int s_driver_count;
- static const game_driver * const s_drivers_sorted[];
+ static int s_driver_count;
+ static const game_driver * const s_drivers_sorted[];
};
@@ -162,19 +162,19 @@ private:
private:
// internal state
- config_entry * m_next;
- machine_config * m_config;
- int m_index;
+ config_entry * m_next;
+ machine_config * m_config;
+ int m_index;
};
static const int CONFIG_CACHE_COUNT = 100;
// internal state
- int m_current;
- int m_filtered_count;
- emu_options & m_options;
- UINT8 * m_included;
- machine_config ** m_config;
+ int m_current;
+ int m_filtered_count;
+ emu_options & m_options;
+ UINT8 * m_included;
+ machine_config ** m_config;
mutable simple_list<config_entry> m_config_cache;
};
diff --git a/src/emu/driver.c b/src/emu/driver.c
index 20077c6b650..c8ff12f5e48 100644
--- a/src/emu/driver.c
+++ b/src/emu/driver.c
@@ -62,18 +62,18 @@ ADDRESS_MAP_END
driver_device::driver_device(const machine_config &mconfig, device_type type, const char *tag)
: device_t(mconfig, type, "Driver Device", tag, NULL, 0),
- device_memory_interface(mconfig, *this),
- m_generic_paletteram_8(*this, "paletteram"),
- m_generic_paletteram2_8(*this, "paletteram2"),
- m_generic_paletteram_16(*this, "paletteram"),
- m_generic_paletteram2_16(*this, "paletteram2"),
- m_generic_paletteram_32(*this, "paletteram"),
- m_generic_paletteram2_32(*this, "paletteram2"),
- m_space_config("generic", ENDIANNESS_LITTLE, 8, 32, 0, NULL, *ADDRESS_MAP_NAME(generic)),
- m_system(NULL),
- m_latch_clear_value(0),
- m_flip_screen_x(0),
- m_flip_screen_y(0)
+ device_memory_interface(mconfig, *this),
+ m_generic_paletteram_8(*this, "paletteram"),
+ m_generic_paletteram2_8(*this, "paletteram2"),
+ m_generic_paletteram_16(*this, "paletteram"),
+ m_generic_paletteram2_16(*this, "paletteram2"),
+ m_generic_paletteram_32(*this, "paletteram"),
+ m_generic_paletteram2_32(*this, "paletteram2"),
+ m_space_config("generic", ENDIANNESS_LITTLE, 8, 32, 0, NULL, *ADDRESS_MAP_NAME(generic)),
+ m_system(NULL),
+ m_latch_clear_value(0),
+ m_flip_screen_x(0),
+ m_flip_screen_y(0)
{
memset(m_legacy_callbacks, 0, sizeof(m_legacy_callbacks));
memset(m_latched_value, 0, sizeof(m_latched_value));
@@ -395,45 +395,45 @@ void driver_device::generic_pulse_irq_line_and_vector(device_execute_interface &
// NMI callbacks
//-------------------------------------------------
-INTERRUPT_GEN_MEMBER( driver_device::nmi_line_pulse ) { device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::nmi_line_assert ) { device.execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::nmi_line_pulse ) { device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::nmi_line_assert ) { device.execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE); }
//-------------------------------------------------
// IRQn callbacks
//-------------------------------------------------
-INTERRUPT_GEN_MEMBER( driver_device::irq0_line_hold ) { device.execute().set_input_line(0, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq0_line_pulse ) { generic_pulse_irq_line(device.execute(), 0, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq0_line_assert ) { device.execute().set_input_line(0, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq0_line_hold ) { device.execute().set_input_line(0, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq0_line_pulse ) { generic_pulse_irq_line(device.execute(), 0, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq0_line_assert ) { device.execute().set_input_line(0, ASSERT_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq1_line_hold ) { device.execute().set_input_line(1, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq1_line_pulse ) { generic_pulse_irq_line(device.execute(), 1, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq1_line_assert ) { device.execute().set_input_line(1, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq1_line_hold ) { device.execute().set_input_line(1, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq1_line_pulse ) { generic_pulse_irq_line(device.execute(), 1, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq1_line_assert ) { device.execute().set_input_line(1, ASSERT_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq2_line_hold ) { device.execute().set_input_line(2, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq2_line_pulse ) { generic_pulse_irq_line(device.execute(), 2, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq2_line_assert ) { device.execute().set_input_line(2, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq2_line_hold ) { device.execute().set_input_line(2, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq2_line_pulse ) { generic_pulse_irq_line(device.execute(), 2, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq2_line_assert ) { device.execute().set_input_line(2, ASSERT_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq3_line_hold ) { device.execute().set_input_line(3, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq3_line_pulse ) { generic_pulse_irq_line(device.execute(), 3, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq3_line_assert ) { device.execute().set_input_line(3, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq3_line_hold ) { device.execute().set_input_line(3, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq3_line_pulse ) { generic_pulse_irq_line(device.execute(), 3, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq3_line_assert ) { device.execute().set_input_line(3, ASSERT_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq4_line_hold ) { device.execute().set_input_line(4, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq4_line_pulse ) { generic_pulse_irq_line(device.execute(), 4, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq4_line_assert ) { device.execute().set_input_line(4, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq4_line_hold ) { device.execute().set_input_line(4, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq4_line_pulse ) { generic_pulse_irq_line(device.execute(), 4, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq4_line_assert ) { device.execute().set_input_line(4, ASSERT_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq5_line_hold ) { device.execute().set_input_line(5, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq5_line_pulse ) { generic_pulse_irq_line(device.execute(), 5, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq5_line_assert ) { device.execute().set_input_line(5, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq5_line_hold ) { device.execute().set_input_line(5, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq5_line_pulse ) { generic_pulse_irq_line(device.execute(), 5, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq5_line_assert ) { device.execute().set_input_line(5, ASSERT_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq6_line_hold ) { device.execute().set_input_line(6, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq6_line_pulse ) { generic_pulse_irq_line(device.execute(), 6, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq6_line_assert ) { device.execute().set_input_line(6, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq6_line_hold ) { device.execute().set_input_line(6, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq6_line_pulse ) { generic_pulse_irq_line(device.execute(), 6, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq6_line_assert ) { device.execute().set_input_line(6, ASSERT_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq7_line_hold ) { device.execute().set_input_line(7, HOLD_LINE); }
-INTERRUPT_GEN_MEMBER( driver_device::irq7_line_pulse ) { generic_pulse_irq_line(device.execute(), 7, 1); }
-INTERRUPT_GEN_MEMBER( driver_device::irq7_line_assert ) { device.execute().set_input_line(7, ASSERT_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq7_line_hold ) { device.execute().set_input_line(7, HOLD_LINE); }
+INTERRUPT_GEN_MEMBER( driver_device::irq7_line_pulse ) { generic_pulse_irq_line(device.execute(), 7, 1); }
+INTERRUPT_GEN_MEMBER( driver_device::irq7_line_assert ) { device.execute().set_input_line(7, ASSERT_LINE); }
@@ -496,14 +496,14 @@ void driver_device::soundlatch_sync_callback(void *ptr, INT32 param)
//-------------------------------------------------
void driver_device::soundlatch_write(UINT8 index, UINT32 data) { machine().scheduler().synchronize(timer_expired_delegate(FUNC(driver_device::soundlatch_sync_callback), this), index | (data << 8)); }
-WRITE8_MEMBER( driver_device::soundlatch_byte_w ) { soundlatch_write(0, data); }
-WRITE16_MEMBER( driver_device::soundlatch_word_w ) { soundlatch_write(0, data); }
-WRITE8_MEMBER( driver_device::soundlatch2_byte_w ) { soundlatch_write(1, data); }
-WRITE16_MEMBER( driver_device::soundlatch2_word_w ) { soundlatch_write(1, data); }
-WRITE8_MEMBER( driver_device::soundlatch3_byte_w ) { soundlatch_write(2, data); }
-WRITE16_MEMBER( driver_device::soundlatch3_word_w ) { soundlatch_write(2, data); }
-WRITE8_MEMBER( driver_device::soundlatch4_byte_w ) { soundlatch_write(3, data); }
-WRITE16_MEMBER( driver_device::soundlatch4_word_w ) { soundlatch_write(3, data); }
+WRITE8_MEMBER( driver_device::soundlatch_byte_w ) { soundlatch_write(0, data); }
+WRITE16_MEMBER( driver_device::soundlatch_word_w ) { soundlatch_write(0, data); }
+WRITE8_MEMBER( driver_device::soundlatch2_byte_w ) { soundlatch_write(1, data); }
+WRITE16_MEMBER( driver_device::soundlatch2_word_w ) { soundlatch_write(1, data); }
+WRITE8_MEMBER( driver_device::soundlatch3_byte_w ) { soundlatch_write(2, data); }
+WRITE16_MEMBER( driver_device::soundlatch3_word_w ) { soundlatch_write(2, data); }
+WRITE8_MEMBER( driver_device::soundlatch4_byte_w ) { soundlatch_write(3, data); }
+WRITE16_MEMBER( driver_device::soundlatch4_word_w ) { soundlatch_write(3, data); }
//-------------------------------------------------
@@ -512,14 +512,14 @@ WRITE16_MEMBER( driver_device::soundlatch4_word_w ) { soundlatch_write(3, data);
//-------------------------------------------------
UINT32 driver_device::soundlatch_read(UINT8 index) { m_latch_read[index] = 1; return m_latched_value[index]; }
-READ8_MEMBER( driver_device::soundlatch_byte_r ) { return soundlatch_read(0); }
-READ16_MEMBER( driver_device::soundlatch_word_r ) { return soundlatch_read(0); }
-READ8_MEMBER( driver_device::soundlatch2_byte_r ) { return soundlatch_read(1); }
-READ16_MEMBER( driver_device::soundlatch2_word_r ) { return soundlatch_read(1); }
-READ8_MEMBER( driver_device::soundlatch3_byte_r ) { return soundlatch_read(2); }
-READ16_MEMBER( driver_device::soundlatch3_word_r ) { return soundlatch_read(2); }
-READ8_MEMBER( driver_device::soundlatch4_byte_r ) { return soundlatch_read(3); }
-READ16_MEMBER( driver_device::soundlatch4_word_r ) { return soundlatch_read(3); }
+READ8_MEMBER( driver_device::soundlatch_byte_r ) { return soundlatch_read(0); }
+READ16_MEMBER( driver_device::soundlatch_word_r ) { return soundlatch_read(0); }
+READ8_MEMBER( driver_device::soundlatch2_byte_r ) { return soundlatch_read(1); }
+READ16_MEMBER( driver_device::soundlatch2_word_r ) { return soundlatch_read(1); }
+READ8_MEMBER( driver_device::soundlatch3_byte_r ) { return soundlatch_read(2); }
+READ16_MEMBER( driver_device::soundlatch3_word_r ) { return soundlatch_read(2); }
+READ8_MEMBER( driver_device::soundlatch4_byte_r ) { return soundlatch_read(3); }
+READ16_MEMBER( driver_device::soundlatch4_word_r ) { return soundlatch_read(3); }
//-------------------------------------------------
@@ -600,9 +600,9 @@ void driver_device::flip_screen_set(UINT32 on)
void driver_device::flip_screen_set_no_update(UINT32 on)
{
// flip_screen_y is not updated on purpose
- // this function is for drivers which
- // where writing to flip_screen_x to
- // bypass update_flip
+ // this function is for drivers which
+ // where writing to flip_screen_x to
+ // bypass update_flip
if (on)
on = ~0;
m_flip_screen_x = on;
@@ -660,8 +660,8 @@ WRITE8_MEMBER( driver_device::paletteram_BBGGRRII_byte_w )
m_generic_paletteram_8[offset] = data;
int i = (data >> 0) & 3;
palette_set_color_rgb(machine(), offset, pal4bit(((data >> 0) & 0x0c) | i),
- pal4bit(((data >> 2) & 0x0c) | i),
- pal4bit(((data >> 4) & 0x0c) | i));
+ pal4bit(((data >> 2) & 0x0c) | i),
+ pal4bit(((data >> 4) & 0x0c) | i));
}
@@ -750,8 +750,8 @@ WRITE16_MEMBER( driver_device::paletteram_RRRRGGGGBBBBRGBx_word_w )
COMBINE_DATA(&m_generic_paletteram_16[offset]);
data = m_generic_paletteram_16[offset];
palette_set_color_rgb(machine(), offset, pal5bit(((data >> 11) & 0x1e) | ((data >> 3) & 0x01)),
- pal5bit(((data >> 7) & 0x1e) | ((data >> 2) & 0x01)),
- pal5bit(((data >> 3) & 0x1e) | ((data >> 1) & 0x01)));
+ pal5bit(((data >> 7) & 0x1e) | ((data >> 2) & 0x01)),
+ pal5bit(((data >> 3) & 0x1e) | ((data >> 1) & 0x01)));
}
@@ -782,5 +782,3 @@ WRITE8_MEMBER( driver_device::fatal_generic_write )
{
throw emu_fatalerror("Attempted to write to generic address space (offs %X = %02X)\n", offset, data);
}
-
-
diff --git a/src/emu/driver.h b/src/emu/driver.h
index 991419d7759..001f363d3db 100644
--- a/src/emu/driver.h
+++ b/src/emu/driver.h
@@ -105,50 +105,50 @@
//**************************************************************************
// macros to wrap legacy callbacks
-#define MACHINE_START_NAME(name) machine_start_##name
-#define MACHINE_START(name) void MACHINE_START_NAME(name)(running_machine &machine)
-#define MACHINE_START_CALL(name) MACHINE_START_NAME(name)(machine)
-#define MACHINE_START_CALL_MEMBER(name) MACHINE_START_NAME(name)()
-#define MACHINE_START_CALL_LEGACY(name) MACHINE_START_NAME(name)(machine())
-#define DECLARE_MACHINE_START(name) void MACHINE_START_NAME(name)()
+#define MACHINE_START_NAME(name) machine_start_##name
+#define MACHINE_START(name) void MACHINE_START_NAME(name)(running_machine &machine)
+#define MACHINE_START_CALL(name) MACHINE_START_NAME(name)(machine)
+#define MACHINE_START_CALL_MEMBER(name) MACHINE_START_NAME(name)()
+#define MACHINE_START_CALL_LEGACY(name) MACHINE_START_NAME(name)(machine())
+#define DECLARE_MACHINE_START(name) void MACHINE_START_NAME(name)()
#define MACHINE_START_MEMBER(cls,name) void cls::MACHINE_START_NAME(name)()
-#define MACHINE_RESET_NAME(name) machine_reset_##name
-#define MACHINE_RESET(name) void MACHINE_RESET_NAME(name)(running_machine &machine)
-#define MACHINE_RESET_CALL(name) MACHINE_RESET_NAME(name)(machine)
-#define MACHINE_RESET_CALL_MEMBER(name) MACHINE_RESET_NAME(name)()
-#define MACHINE_RESET_CALL_LEGACY(name) MACHINE_RESET_NAME(name)(machine())
-#define DECLARE_MACHINE_RESET(name) void MACHINE_RESET_NAME(name)()
+#define MACHINE_RESET_NAME(name) machine_reset_##name
+#define MACHINE_RESET(name) void MACHINE_RESET_NAME(name)(running_machine &machine)
+#define MACHINE_RESET_CALL(name) MACHINE_RESET_NAME(name)(machine)
+#define MACHINE_RESET_CALL_MEMBER(name) MACHINE_RESET_NAME(name)()
+#define MACHINE_RESET_CALL_LEGACY(name) MACHINE_RESET_NAME(name)(machine())
+#define DECLARE_MACHINE_RESET(name) void MACHINE_RESET_NAME(name)()
#define MACHINE_RESET_MEMBER(cls,name) void cls::MACHINE_RESET_NAME(name)()
-#define SOUND_START_NAME(name) sound_start_##name
-#define SOUND_START(name) void SOUND_START_NAME(name)(running_machine &machine)
-#define SOUND_START_CALL(name) SOUND_START_NAME(name)(machine)
+#define SOUND_START_NAME(name) sound_start_##name
+#define SOUND_START(name) void SOUND_START_NAME(name)(running_machine &machine)
+#define SOUND_START_CALL(name) SOUND_START_NAME(name)(machine)
-#define SOUND_RESET_NAME(name) sound_reset_##name
-#define SOUND_RESET(name) void SOUND_RESET_NAME(name)(running_machine &machine)
-#define SOUND_RESET_CALL(name) SOUND_RESET_NAME(name)(machine)
+#define SOUND_RESET_NAME(name) sound_reset_##name
+#define SOUND_RESET(name) void SOUND_RESET_NAME(name)(running_machine &machine)
+#define SOUND_RESET_CALL(name) SOUND_RESET_NAME(name)(machine)
-#define PALETTE_INIT_NAME(name) palette_init_##name
-#define PALETTE_INIT(name) void PALETTE_INIT_NAME(name)(running_machine &machine)
-#define PALETTE_INIT_CALL(name) PALETTE_INIT_NAME(name)(machine)
-#define PALETTE_INIT_CALL_MEMBER(name) PALETTE_INIT_NAME(name)()
-#define DECLARE_PALETTE_INIT(name) void PALETTE_INIT_NAME(name)()
+#define PALETTE_INIT_NAME(name) palette_init_##name
+#define PALETTE_INIT(name) void PALETTE_INIT_NAME(name)(running_machine &machine)
+#define PALETTE_INIT_CALL(name) PALETTE_INIT_NAME(name)(machine)
+#define PALETTE_INIT_CALL_MEMBER(name) PALETTE_INIT_NAME(name)()
+#define DECLARE_PALETTE_INIT(name) void PALETTE_INIT_NAME(name)()
#define PALETTE_INIT_MEMBER(cls,name) void cls::PALETTE_INIT_NAME(name)()
-#define VIDEO_START_NAME(name) video_start_##name
-#define VIDEO_START(name) void VIDEO_START_NAME(name)(running_machine &machine)
-#define VIDEO_START_CALL(name) VIDEO_START_NAME(name)(machine)
-#define VIDEO_START_CALL_MEMBER(name) VIDEO_START_NAME(name)()
-#define VIDEO_START_CALL_LEGACY(name) VIDEO_START_NAME(name)(machine())
-#define DECLARE_VIDEO_START(name) void VIDEO_START_NAME(name)()
+#define VIDEO_START_NAME(name) video_start_##name
+#define VIDEO_START(name) void VIDEO_START_NAME(name)(running_machine &machine)
+#define VIDEO_START_CALL(name) VIDEO_START_NAME(name)(machine)
+#define VIDEO_START_CALL_MEMBER(name) VIDEO_START_NAME(name)()
+#define VIDEO_START_CALL_LEGACY(name) VIDEO_START_NAME(name)(machine())
+#define DECLARE_VIDEO_START(name) void VIDEO_START_NAME(name)()
#define VIDEO_START_MEMBER(cls,name) void cls::VIDEO_START_NAME(name)()
-#define VIDEO_RESET_NAME(name) video_reset_##name
-#define VIDEO_RESET(name) void VIDEO_RESET_NAME(name)(running_machine &machine)
-#define VIDEO_RESET_CALL(name) VIDEO_RESET_NAME(name)(machine)
-#define VIDEO_RESET_CALL_MEMBER(name) VIDEO_RESET_NAME(name)()
-#define DECLARE_VIDEO_RESET(name) void VIDEO_RESET_NAME(name)()
+#define VIDEO_RESET_NAME(name) video_reset_##name
+#define VIDEO_RESET(name) void VIDEO_RESET_NAME(name)(running_machine &machine)
+#define VIDEO_RESET_CALL(name) VIDEO_RESET_NAME(name)(machine)
+#define VIDEO_RESET_CALL_MEMBER(name) VIDEO_RESET_NAME(name)()
+#define DECLARE_VIDEO_RESET(name) void VIDEO_RESET_NAME(name)()
#define VIDEO_RESET_MEMBER(cls,name) void cls::VIDEO_RESET_NAME(name)()
@@ -166,7 +166,7 @@ typedef void (*legacy_callback_func)(running_machine &machine);
// ======================> driver_device
// base class for machine driver-specific devices
-class driver_device : public device_t,
+class driver_device : public device_t,
public device_memory_interface
{
public:
@@ -457,18 +457,18 @@ private:
const address_space_config m_space_config;
// internal state
- const game_driver * m_system; // pointer to the game driver
- driver_callback_delegate m_callbacks[CB_COUNT]; // start/reset callbacks
- legacy_callback_func m_legacy_callbacks[CB_COUNT]; // legacy start/reset callbacks
+ const game_driver * m_system; // pointer to the game driver
+ driver_callback_delegate m_callbacks[CB_COUNT]; // start/reset callbacks
+ legacy_callback_func m_legacy_callbacks[CB_COUNT]; // legacy start/reset callbacks
// generic audio
- UINT16 m_latch_clear_value;
- UINT16 m_latched_value[4];
- UINT8 m_latch_read[4];
+ UINT16 m_latch_clear_value;
+ UINT16 m_latched_value[4];
+ UINT8 m_latch_read[4];
// generic video
- UINT32 m_flip_screen_x;
- UINT32 m_flip_screen_y;
+ UINT32 m_flip_screen_x;
+ UINT32 m_flip_screen_y;
};
@@ -602,4 +602,4 @@ WRITE32_MEMBER(driver_device::palette_32bit_dword_w)
palette_set_color_rgb(machine(), offset, palexpand<_RedBits>(paldata >> _RedShift), palexpand<_GreenBits>(paldata >> _GreenShift), palexpand<_BlueBits>(paldata >> _BlueShift));
}
-#endif /* __DRIVER_H__ */
+#endif /* __DRIVER_H__ */
diff --git a/src/emu/drivers/emudummy.c b/src/emu/drivers/emudummy.c
index a5dc5534a2f..80b8e63c4b1 100644
--- a/src/emu/drivers/emudummy.c
+++ b/src/emu/drivers/emudummy.c
@@ -63,5 +63,3 @@ ROM_END
GAME( 1900, __dummy, 0, __dummy, 0, driver_device, 0, ROT0, "(none)", "Dummy", GAME_NO_SOUND )
-
-
diff --git a/src/emu/drivers/testcpu.c b/src/emu/drivers/testcpu.c
index 08e141f2ffc..eabc7312a7b 100644
--- a/src/emu/drivers/testcpu.c
+++ b/src/emu/drivers/testcpu.c
@@ -60,8 +60,8 @@ public:
// constructor
testcpu_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_cpu(*this, "maincpu"),
- m_ram(*this, "ram")
+ m_cpu(*this, "maincpu"),
+ m_ram(*this, "ram")
{
}
@@ -70,13 +70,13 @@ public:
{
static const UINT32 sample_instructions[] =
{
- 0x3d40f900, // li r10,0xf9000000
- 0x394af000, // addi r10,r10,-0x1000
- 0x38600146, // li r3,0x00000146
- 0x38800004, // li r4,0x00000004
- 0x7c64572c, // sthbrx r3,r4,r10
- 0x38600000, // li r3,0x00000000
- 0x986a0070 // stb r3,0x0070(r10)
+ 0x3d40f900, // li r10,0xf9000000
+ 0x394af000, // addi r10,r10,-0x1000
+ 0x38600146, // li r3,0x00000146
+ 0x38800004, // li r4,0x00000004
+ 0x7c64572c, // sthbrx r3,r4,r10
+ 0x38600000, // li r3,0x00000000
+ 0x986a0070 // stb r3,0x0070(r10)
};
// iterate over instructions
@@ -217,7 +217,7 @@ ADDRESS_MAP_END
static const powerpc_config ppc_config =
{
// 603e, Stretch, 1.3
- 66000000 // Multiplier 1, Bus = 66MHz, Core = 66MHz
+ 66000000 // Multiplier 1, Bus = 66MHz, Core = 66MHz
};
static MACHINE_CONFIG_START( testcpu, testcpu_state )
diff --git a/src/emu/drivers/xtal.h b/src/emu/drivers/xtal.h
index 6bf8f7390df..b386b095289 100644
--- a/src/emu/drivers/xtal.h
+++ b/src/emu/drivers/xtal.h
@@ -45,178 +45,178 @@ enum
/*
Name = Frequency Examples
------------------ ------------ ------------------------------------------------------------ */
- XTAL_32_768kHz = 32768, /* 32.768kHz, used to drive RTC chips */
- XTAL_1MHz = 1000000, /* Used to drive OKI M6295 chips */
- XTAL_1_75MHz = 1750000, /* RCA CDP1861 */
- XTAL_1_8432MHz = 1843200, /* Bondwell 12/14 */
- XTAL_1_9968MHz = 1996800, /* NEC PC-98xx */
- XTAL_2MHz = 2000000,
- XTAL_2_01216MHz = 2012160, /* Cidelsa Draco sound board */
- XTAL_2_4576MHz = 2457600, /* Atari ST MFP, NEC PC-98xx */
- XTAL_2_5MHz = 2500000, /* Janken Man units */
- XTAL_3MHz = 3000000, /* Probably only used to drive 68705 or similar MCUs on 80's Taito PCBs */
- XTAL_3_12MHz = 3120000, /* SP0250 clock on Gottlieb games */
- XTAL_3_52128MHz = 3521280, /* RCA COSMAC VIP */
- XTAL_3_579545MHz = 3579545, /* NTSC color subcarrier, extremely common, used on 100's of PCBs (Keytronic custom part #48-300-010 is equivalent) */
- XTAL_3_6864MHz = 3686400, /* CPS3 */
- XTAL_4MHz = 4000000,
- XTAL_4_028MHz = 4028000, /* Sony SMC-777 */
- XTAL_4_096MHz = 4096000, /* Used to drive OKI M9810 chips */
- XTAL_4_224MHz = 4224000, /* Used to drive OKI M6295 chips, usually with /4 divider */
- XTAL_4_41MHz = 4410000, /* Pioneer PR-8210 ldplayer */
- XTAL_4_43361MHz = 4433610, /* Cidelsa Draco */
- XTAL_4_433619MHz = 4433619, /* PAL color subcarrier (technically 4.43361875mhz)*/
- XTAL_4_608MHz = 4608000, /* Luxor ABC-77 keyboard (Keytronic custom part #48-300-107 is equivalent) */
- XTAL_4_9152MHz = 4915200,
- XTAL_5MHz = 5000000, /* Mutant Night */
- XTAL_5_0688MHz = 5068800, /* Xerox 820, DEC VK100 */
- XTAL_5_626MHz = 5626000, /* RCA CDP1869 PAL dot clock */
- XTAL_5_67MHz = 5670000, /* RCA CDP1869 NTSC dot clock */
- XTAL_5_7143MHz = 5714300, /* Cidelsa Destroyer */
- XTAL_5_911MHz = 5911000, /* Philips Videopac Plus G7400 */
- XTAL_5_9904MHz = 5990400, /* Luxor ABC 800 keyboard (Keytronic custom part #48-300-008 is equivalent) */
- XTAL_6MHz = 6000000, /* American Poker II */
- XTAL_6_5MHz = 6500000, /* Jupiter Ace */
- XTAL_6_144MHz = 6144000, /* Used on Alpha Denshi early 80's games sound board */
- XTAL_7MHz = 7000000, /* Jaleco Mega System PCBs */
- XTAL_7_15909MHz = 7159090, /* Blood Bros (2x NTSC subcarrier) */
- XTAL_7_3728MHz = 7372800,
- XTAL_7_8643MHz = 7864300, /* Used on InterFlip games as video clock */
- XTAL_8MHz = 8000000, /* Extremely common, used on 100's of PCBs */
- XTAL_8_2MHz = 8200000, /* Universal Mr. Do - Model 8021 PCB */
- XTAL_8_4672MHz = 8467200, /* Subsino's Ying Hua Lian */
- XTAL_8_664MHz = 8664000, /* Touchmaster */
- XTAL_8_7MHz = 8700000, /* Tandberg TDV 2324 */
- XTAL_8_867236MHz = 8867236, /* RCA CDP1869 PAL color clock (~2x PAL subcarrier) */
- XTAL_8_867238MHz = 8867238, /* ETI-660 (~2x PAL subcarrier) */
- XTAL_9_216MHz = 9216000, /* Conitec PROF-180X */
- XTAL_8_945MHz = 8945000, /* Hit Me */
- XTAL_9_828MHz = 9828000, /* Universal PCBs */
- XTAL_9_8304MHz = 9830400, /* Epson PX-8 */
- XTAL_9_987MHz = 9987000, /* Crazy Balloon */
- XTAL_10MHz = 10000000,
- XTAL_10_245MHz = 10245000, /* PES Speech box */
- XTAL_10_595MHz = 10595000, /* Mad Alien */
- XTAL_10_6875MHz = 10687500, /* BBC Bridge Companion */
- XTAL_10_69425MHz = 10694250, /* Xerox 820 */
- XTAL_10_730MHz = 10730000, /* Ruleta RE-900 VDP Clock */
- XTAL_10_733MHz = 10733000, /* The Fairyland Story */
- XTAL_10_738635MHz = 10738635, /* TMS9918 family (3x NTSC subcarrier) */
- XTAL_10_816MHz = 10816000, /* Universal 1979-1980 (Cosmic Alien, etc) */
- XTAL_11MHz = 11000000, /* Mario I8039 sound */
- XTAL_11_0592MHz = 11059200, /* Lethal Justice, Ruleta RE-900 */
- XTAL_11_2MHz = 11200000, /* New York, New York */
- XTAL_11_289MHz = 11289000, /* Vanguard */
- XTAL_11_6688MHz = 11668800, /* Gameplan pixel clock */
- XTAL_11_8MHz = 11800000, /* IBM PC Music Feature Card */
- XTAL_11_9808MHz = 11980800, /* Luxor ABC 80 */
- XTAL_12MHz = 12000000, /* Extremely common, used on 100's of PCBs */
- XTAL_12_096MHz = 12096000, /* Some early 80's Atari games */
- XTAL_12_288MHz = 12288000, /* Sega Model 3 digital audio board */
- XTAL_12_4725MHz = 12472500, /* Bonanza's Mini Boy 7 */
- XTAL_12_48MHz = 12480000, /* TRS-80 Model II */
- XTAL_12_5MHz = 12500000, /* Red Alert audio board */
- XTAL_12_9792MHz = 12979200, /* Exidy 440 */
- XTAL_13_3MHz = 13300000, /* BMC bowling */
- XTAL_13_33056MHz = 13330560, /* Taito L */
- XTAL_13_4MHz = 13400000, /* TNK3, Ikari Warriors h/w */
- XTAL_13_4952MHz = 13495200, /* Used on Shadow Force pcb and maybe other Technos pcbs? */
- XTAL_14MHz = 14000000,
- XTAL_14_112MHz = 14112000, /* Timex/Sinclair TS2068 */
- XTAL_14_31818MHz = 14318181, /* Extremely common, used on 100's of PCBs (4x NTSC subcarrier) */
- XTAL_14_705882MHz = 14705882, /* Aleck64 */
- XTAL_14_7456MHz = 14745600, /* Namco System 12 & System Super 22/23 for H8/3002 CPU */
- XTAL_15MHz = 15000000, /* Sinclair QL */
- XTAL_15_36MHz = 15360000, /* Visual 1050 */
- XTAL_15_468MHz = 15468480, /* Bank Panic h/w, Sega G80 */
- XTAL_16MHz = 16000000, /* Extremely common, used on 100's of PCBs */
- XTAL_16_9344MHz = 16934400, /* Usually used to drive 90's Yamaha OPL/FM chips */
- XTAL_17_36MHz = 17360000, /* OMTI Series 10 SCSI controller */
- XTAL_17_73447MHz = 17734470, /* (~4x PAL subcarrier) */
- XTAL_17_734472MHz = 17734472, /* actually ~4x PAL subcarrier */
- XTAL_18MHz = 18000000, /* S.A.R, Ikari Warriors 3 */
- XTAL_18_432MHz = 18432000, /* Extremely common, used on 100's of PCBs */
- XTAL_18_720MHz = 18720000, /* Nokia MikroMikko 1 */
- XTAL_19_6MHz = 19600000, /* Universal Mr. Do - Model 8021 PCB */
- XTAL_19_6608MHz = 19660800, /* Euro League (bootleg), labeled as "UKI 19.6608 20PF" */
- XTAL_19_923MHz = 19923000, /* Cinematronics vectors */
- XTAL_19_968MHz = 19968000, /* Used mostly by some Taito games */
- XTAL_20MHz = 20000000,
- XTAL_20_16MHz = 20160000, /* Nintendo 8080 */
- XTAL_20_079MHz = 20790000, /* Blockade-hardware Gremlin games */
- XTAL_21MHz = 21000000, /* Lock-On pixel clock */
- XTAL_21_3MHz = 21300000,
- XTAL_21_4772MHz = 21477272, /* BMC bowling, some Data East 90's games, Vtech Socrates; (6x NTSC subcarrier) */
- XTAL_22MHz = 22000000,
- XTAL_22_1184MHz = 22118400,
- XTAL_23_9616MHz = 23961600, /* Osborne 4 (Vixen) */
- XTAL_24MHz = 24000000, /* Mario, 80's Data East games, 80's Konami games */
- XTAL_24_0734MHz = 24073400, /* DEC Rainbow 100 */
- XTAL_24_576MHz = 24576000, /* Pole Position h/w, Model 3 CPU board */
- XTAL_24_8832MHz = 24883200, /* DEC VT100 */
- XTAL_25MHz = 25000000, /* Namco System 22, Taito GNET, Dogyuun h/w */
- XTAL_25_1748MHz = 25174800, /* Sega S16A, S16B */
- XTAL_25_39836MHz = 25398360, /* Tandberg TDV 2324 */
- XTAL_25_447MHz = 25447000, /* Namco EVA3A (Funcube2) */
- XTAL_25_590906MHz = 25590906, /* Atari Jaguar NTSC */
- XTAL_25_593900MHz = 25593900, /* Atari Jaguar PAL */
- XTAL_26_601712MHz = 26601712, /* Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */
- XTAL_26_66666MHz = 26666666, /* Irem M92 but most use 27MHz */
- XTAL_26_686MHz = 26686000, /* Typically used on 90's Taito PCBs to drive the custom chips */
- XTAL_27MHz = 27000000, /* Some Banpresto games macrossp, Irem M92 and 90's Toaplan games */
- XTAL_27_164MHz = 27164000, /* Typically used on 90's Taito PCBs to drive the custom chips */
- XTAL_27_2109MHz = 27210900, /* LA Girl */
- XTAL_28MHz = 28000000,
- XTAL_28_37516MHz = 28375160, /* Amiga PAL systems */
- XTAL_28_48MHz = 28480000, /* Chromatics CGC-7900 */
- XTAL_28_63636MHz = 28636363, /* Later Leland games and Atari GT, Amiga NTSC, Raiden2 h/w (8x NTSC subcarrier)*/
- XTAL_30MHz = 30000000, /* Impera Magic Card */
- XTAL_30_4761MHz = 30476100, /* Taito JC */
- XTAL_32MHz = 32000000,
- XTAL_32_22MHz = 32220000, /* Typically used on 90's Data East PCBs */
- XTAL_32_5304MHz = 32530400, /* Seta 2 */
- XTAL_33MHz = 33000000, /* Sega Model 3 video board */
- XTAL_33_333MHz = 33333000, /* Sega Model 3 CPU board, Vegas */
- XTAL_33_833MHz = 33833000,
- XTAL_33_8688MHz = 33868800, /* Usually used to drive 90's Yamaha OPL/FM chips with /2 divider */
- XTAL_36MHz = 36000000, /* Sega Model 1 video board */
- XTAL_38_76922MHz = 38769220, /* Namco System 21 video board */
- XTAL_40MHz = 40000000,
- XTAL_42MHz = 42000000, /* BMC A-00211 - Popo Bear */
- XTAL_42_9545MHz = 42954545, /* CPS3 (12x NTSC subcarrier)*/
- XTAL_44_1MHz = 44100000, /* Subsino's Bishou Jan */
- XTAL_45MHz = 45000000, /* Eolith with Hyperstone CPUs */
- XTAL_45_158MHz = 45158000, /* Sega Model 2A video board, Model 3 CPU board */
- XTAL_45_6192Mhz = 45619200, /* DEC VK100 */
- XTAL_48MHz = 48000000, /* Williams/Midway Y/Z-unit system */
- XTAL_48_66MHz = 48660000, /* Zaxxon */
- XTAL_49_152MHz = 49152000, /* Used on some Namco PCBs, Baraduke h/w, System 21, Super System 22 */
- XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */
- XTAL_52MHz = 52000000, /* Cojag */
- XTAL_52_832MHz = 52832000, /* Wang PC TIG video controller */
- XTAL_53_693175MHz = 53693175, /* PSX-based h/w, Sony ZN1-2-based (15x NTSC subcarrier) */
- XTAL_54MHz = 54000000, /* Taito JC */
- XTAL_55MHz = 55000000, /* Eolith Vega */
- XTAL_57_2727MHz = 57272727, /* Psikyo SH2 with /2 divider (16x NTSC subcarrier)*/
- XTAL_60MHz = 60000000,
- XTAL_61_44MHz = 61440000, /* dkong */
- XTAL_64MHz = 64000000, /* BattleToads */
- XTAL_66_6667MHz = 66666700, /* Later Midway games */
- XTAL_67_7376MHz = 67737600, /* PSX-based h/w, Sony ZN1-2-based */
- XTAL_72_576MHz = 72576000, /* Centipede, Millipede, Missile Command, Let's Go Bowling "Multipede" */
- XTAL_73_728MHz = 73728000, /* Ms. Pac-Man/Galaga 20th Anniversary */
- XTAL_100MHz = 100000000, /* PSX-based Namco System 12, Vegas, Sony ZN1-2-based */
- XTAL_101_4912MHz = 101491200, /* PSX-based Namco System 10 */
- XTAL_200MHz = 200000000, /* Base SH4 CPU (Naomi, Hikaru etc.) */
+ XTAL_32_768kHz = 32768, /* 32.768kHz, used to drive RTC chips */
+ XTAL_1MHz = 1000000, /* Used to drive OKI M6295 chips */
+ XTAL_1_75MHz = 1750000, /* RCA CDP1861 */
+ XTAL_1_8432MHz = 1843200, /* Bondwell 12/14 */
+ XTAL_1_9968MHz = 1996800, /* NEC PC-98xx */
+ XTAL_2MHz = 2000000,
+ XTAL_2_01216MHz = 2012160, /* Cidelsa Draco sound board */
+ XTAL_2_4576MHz = 2457600, /* Atari ST MFP, NEC PC-98xx */
+ XTAL_2_5MHz = 2500000, /* Janken Man units */
+ XTAL_3MHz = 3000000, /* Probably only used to drive 68705 or similar MCUs on 80's Taito PCBs */
+ XTAL_3_12MHz = 3120000, /* SP0250 clock on Gottlieb games */
+ XTAL_3_52128MHz = 3521280, /* RCA COSMAC VIP */
+ XTAL_3_579545MHz = 3579545, /* NTSC color subcarrier, extremely common, used on 100's of PCBs (Keytronic custom part #48-300-010 is equivalent) */
+ XTAL_3_6864MHz = 3686400, /* CPS3 */
+ XTAL_4MHz = 4000000,
+ XTAL_4_028MHz = 4028000, /* Sony SMC-777 */
+ XTAL_4_096MHz = 4096000, /* Used to drive OKI M9810 chips */
+ XTAL_4_224MHz = 4224000, /* Used to drive OKI M6295 chips, usually with /4 divider */
+ XTAL_4_41MHz = 4410000, /* Pioneer PR-8210 ldplayer */
+ XTAL_4_43361MHz = 4433610, /* Cidelsa Draco */
+ XTAL_4_433619MHz = 4433619, /* PAL color subcarrier (technically 4.43361875mhz)*/
+ XTAL_4_608MHz = 4608000, /* Luxor ABC-77 keyboard (Keytronic custom part #48-300-107 is equivalent) */
+ XTAL_4_9152MHz = 4915200,
+ XTAL_5MHz = 5000000, /* Mutant Night */
+ XTAL_5_0688MHz = 5068800, /* Xerox 820, DEC VK100 */
+ XTAL_5_626MHz = 5626000, /* RCA CDP1869 PAL dot clock */
+ XTAL_5_67MHz = 5670000, /* RCA CDP1869 NTSC dot clock */
+ XTAL_5_7143MHz = 5714300, /* Cidelsa Destroyer */
+ XTAL_5_911MHz = 5911000, /* Philips Videopac Plus G7400 */
+ XTAL_5_9904MHz = 5990400, /* Luxor ABC 800 keyboard (Keytronic custom part #48-300-008 is equivalent) */
+ XTAL_6MHz = 6000000, /* American Poker II */
+ XTAL_6_5MHz = 6500000, /* Jupiter Ace */
+ XTAL_6_144MHz = 6144000, /* Used on Alpha Denshi early 80's games sound board */
+ XTAL_7MHz = 7000000, /* Jaleco Mega System PCBs */
+ XTAL_7_15909MHz = 7159090, /* Blood Bros (2x NTSC subcarrier) */
+ XTAL_7_3728MHz = 7372800,
+ XTAL_7_8643MHz = 7864300, /* Used on InterFlip games as video clock */
+ XTAL_8MHz = 8000000, /* Extremely common, used on 100's of PCBs */
+ XTAL_8_2MHz = 8200000, /* Universal Mr. Do - Model 8021 PCB */
+ XTAL_8_4672MHz = 8467200, /* Subsino's Ying Hua Lian */
+ XTAL_8_664MHz = 8664000, /* Touchmaster */
+ XTAL_8_7MHz = 8700000, /* Tandberg TDV 2324 */
+ XTAL_8_867236MHz = 8867236, /* RCA CDP1869 PAL color clock (~2x PAL subcarrier) */
+ XTAL_8_867238MHz = 8867238, /* ETI-660 (~2x PAL subcarrier) */
+ XTAL_9_216MHz = 9216000, /* Conitec PROF-180X */
+ XTAL_8_945MHz = 8945000, /* Hit Me */
+ XTAL_9_828MHz = 9828000, /* Universal PCBs */
+ XTAL_9_8304MHz = 9830400, /* Epson PX-8 */
+ XTAL_9_987MHz = 9987000, /* Crazy Balloon */
+ XTAL_10MHz = 10000000,
+ XTAL_10_245MHz = 10245000, /* PES Speech box */
+ XTAL_10_595MHz = 10595000, /* Mad Alien */
+ XTAL_10_6875MHz = 10687500, /* BBC Bridge Companion */
+ XTAL_10_69425MHz = 10694250, /* Xerox 820 */
+ XTAL_10_730MHz = 10730000, /* Ruleta RE-900 VDP Clock */
+ XTAL_10_733MHz = 10733000, /* The Fairyland Story */
+ XTAL_10_738635MHz = 10738635, /* TMS9918 family (3x NTSC subcarrier) */
+ XTAL_10_816MHz = 10816000, /* Universal 1979-1980 (Cosmic Alien, etc) */
+ XTAL_11MHz = 11000000, /* Mario I8039 sound */
+ XTAL_11_0592MHz = 11059200, /* Lethal Justice, Ruleta RE-900 */
+ XTAL_11_2MHz = 11200000, /* New York, New York */
+ XTAL_11_289MHz = 11289000, /* Vanguard */
+ XTAL_11_6688MHz = 11668800, /* Gameplan pixel clock */
+ XTAL_11_8MHz = 11800000, /* IBM PC Music Feature Card */
+ XTAL_11_9808MHz = 11980800, /* Luxor ABC 80 */
+ XTAL_12MHz = 12000000, /* Extremely common, used on 100's of PCBs */
+ XTAL_12_096MHz = 12096000, /* Some early 80's Atari games */
+ XTAL_12_288MHz = 12288000, /* Sega Model 3 digital audio board */
+ XTAL_12_4725MHz = 12472500, /* Bonanza's Mini Boy 7 */
+ XTAL_12_48MHz = 12480000, /* TRS-80 Model II */
+ XTAL_12_5MHz = 12500000, /* Red Alert audio board */
+ XTAL_12_9792MHz = 12979200, /* Exidy 440 */
+ XTAL_13_3MHz = 13300000, /* BMC bowling */
+ XTAL_13_33056MHz = 13330560, /* Taito L */
+ XTAL_13_4MHz = 13400000, /* TNK3, Ikari Warriors h/w */
+ XTAL_13_4952MHz = 13495200, /* Used on Shadow Force pcb and maybe other Technos pcbs? */
+ XTAL_14MHz = 14000000,
+ XTAL_14_112MHz = 14112000, /* Timex/Sinclair TS2068 */
+ XTAL_14_31818MHz = 14318181, /* Extremely common, used on 100's of PCBs (4x NTSC subcarrier) */
+ XTAL_14_705882MHz = 14705882, /* Aleck64 */
+ XTAL_14_7456MHz = 14745600, /* Namco System 12 & System Super 22/23 for H8/3002 CPU */
+ XTAL_15MHz = 15000000, /* Sinclair QL */
+ XTAL_15_36MHz = 15360000, /* Visual 1050 */
+ XTAL_15_468MHz = 15468480, /* Bank Panic h/w, Sega G80 */
+ XTAL_16MHz = 16000000, /* Extremely common, used on 100's of PCBs */
+ XTAL_16_9344MHz = 16934400, /* Usually used to drive 90's Yamaha OPL/FM chips */
+ XTAL_17_36MHz = 17360000, /* OMTI Series 10 SCSI controller */
+ XTAL_17_73447MHz = 17734470, /* (~4x PAL subcarrier) */
+ XTAL_17_734472MHz = 17734472, /* actually ~4x PAL subcarrier */
+ XTAL_18MHz = 18000000, /* S.A.R, Ikari Warriors 3 */
+ XTAL_18_432MHz = 18432000, /* Extremely common, used on 100's of PCBs */
+ XTAL_18_720MHz = 18720000, /* Nokia MikroMikko 1 */
+ XTAL_19_6MHz = 19600000, /* Universal Mr. Do - Model 8021 PCB */
+ XTAL_19_6608MHz = 19660800, /* Euro League (bootleg), labeled as "UKI 19.6608 20PF" */
+ XTAL_19_923MHz = 19923000, /* Cinematronics vectors */
+ XTAL_19_968MHz = 19968000, /* Used mostly by some Taito games */
+ XTAL_20MHz = 20000000,
+ XTAL_20_16MHz = 20160000, /* Nintendo 8080 */
+ XTAL_20_079MHz = 20790000, /* Blockade-hardware Gremlin games */
+ XTAL_21MHz = 21000000, /* Lock-On pixel clock */
+ XTAL_21_3MHz = 21300000,
+ XTAL_21_4772MHz = 21477272, /* BMC bowling, some Data East 90's games, Vtech Socrates; (6x NTSC subcarrier) */
+ XTAL_22MHz = 22000000,
+ XTAL_22_1184MHz = 22118400,
+ XTAL_23_9616MHz = 23961600, /* Osborne 4 (Vixen) */
+ XTAL_24MHz = 24000000, /* Mario, 80's Data East games, 80's Konami games */
+ XTAL_24_0734MHz = 24073400, /* DEC Rainbow 100 */
+ XTAL_24_576MHz = 24576000, /* Pole Position h/w, Model 3 CPU board */
+ XTAL_24_8832MHz = 24883200, /* DEC VT100 */
+ XTAL_25MHz = 25000000, /* Namco System 22, Taito GNET, Dogyuun h/w */
+ XTAL_25_1748MHz = 25174800, /* Sega S16A, S16B */
+ XTAL_25_39836MHz = 25398360, /* Tandberg TDV 2324 */
+ XTAL_25_447MHz = 25447000, /* Namco EVA3A (Funcube2) */
+ XTAL_25_590906MHz = 25590906, /* Atari Jaguar NTSC */
+ XTAL_25_593900MHz = 25593900, /* Atari Jaguar PAL */
+ XTAL_26_601712MHz = 26601712, /* Astro Corp.'s Show Hand, PAL Vtech/Yeno Socrates (6x PAL subcarrier) */
+ XTAL_26_66666MHz = 26666666, /* Irem M92 but most use 27MHz */
+ XTAL_26_686MHz = 26686000, /* Typically used on 90's Taito PCBs to drive the custom chips */
+ XTAL_27MHz = 27000000, /* Some Banpresto games macrossp, Irem M92 and 90's Toaplan games */
+ XTAL_27_164MHz = 27164000, /* Typically used on 90's Taito PCBs to drive the custom chips */
+ XTAL_27_2109MHz = 27210900, /* LA Girl */
+ XTAL_28MHz = 28000000,
+ XTAL_28_37516MHz = 28375160, /* Amiga PAL systems */
+ XTAL_28_48MHz = 28480000, /* Chromatics CGC-7900 */
+ XTAL_28_63636MHz = 28636363, /* Later Leland games and Atari GT, Amiga NTSC, Raiden2 h/w (8x NTSC subcarrier)*/
+ XTAL_30MHz = 30000000, /* Impera Magic Card */
+ XTAL_30_4761MHz = 30476100, /* Taito JC */
+ XTAL_32MHz = 32000000,
+ XTAL_32_22MHz = 32220000, /* Typically used on 90's Data East PCBs */
+ XTAL_32_5304MHz = 32530400, /* Seta 2 */
+ XTAL_33MHz = 33000000, /* Sega Model 3 video board */
+ XTAL_33_333MHz = 33333000, /* Sega Model 3 CPU board, Vegas */
+ XTAL_33_833MHz = 33833000,
+ XTAL_33_8688MHz = 33868800, /* Usually used to drive 90's Yamaha OPL/FM chips with /2 divider */
+ XTAL_36MHz = 36000000, /* Sega Model 1 video board */
+ XTAL_38_76922MHz = 38769220, /* Namco System 21 video board */
+ XTAL_40MHz = 40000000,
+ XTAL_42MHz = 42000000, /* BMC A-00211 - Popo Bear */
+ XTAL_42_9545MHz = 42954545, /* CPS3 (12x NTSC subcarrier)*/
+ XTAL_44_1MHz = 44100000, /* Subsino's Bishou Jan */
+ XTAL_45MHz = 45000000, /* Eolith with Hyperstone CPUs */
+ XTAL_45_158MHz = 45158000, /* Sega Model 2A video board, Model 3 CPU board */
+ XTAL_45_6192Mhz = 45619200, /* DEC VK100 */
+ XTAL_48MHz = 48000000, /* Williams/Midway Y/Z-unit system */
+ XTAL_48_66MHz = 48660000, /* Zaxxon */
+ XTAL_49_152MHz = 49152000, /* Used on some Namco PCBs, Baraduke h/w, System 21, Super System 22 */
+ XTAL_50MHz = 50000000, /* Williams/Midway T/W/V-unit system */
+ XTAL_52MHz = 52000000, /* Cojag */
+ XTAL_52_832MHz = 52832000, /* Wang PC TIG video controller */
+ XTAL_53_693175MHz = 53693175, /* PSX-based h/w, Sony ZN1-2-based (15x NTSC subcarrier) */
+ XTAL_54MHz = 54000000, /* Taito JC */
+ XTAL_55MHz = 55000000, /* Eolith Vega */
+ XTAL_57_2727MHz = 57272727, /* Psikyo SH2 with /2 divider (16x NTSC subcarrier)*/
+ XTAL_60MHz = 60000000,
+ XTAL_61_44MHz = 61440000, /* dkong */
+ XTAL_64MHz = 64000000, /* BattleToads */
+ XTAL_66_6667MHz = 66666700, /* Later Midway games */
+ XTAL_67_7376MHz = 67737600, /* PSX-based h/w, Sony ZN1-2-based */
+ XTAL_72_576MHz = 72576000, /* Centipede, Millipede, Missile Command, Let's Go Bowling "Multipede" */
+ XTAL_73_728MHz = 73728000, /* Ms. Pac-Man/Galaga 20th Anniversary */
+ XTAL_100MHz = 100000000, /* PSX-based Namco System 12, Vegas, Sony ZN1-2-based */
+ XTAL_101_4912MHz = 101491200, /* PSX-based Namco System 10 */
+ XTAL_200MHz = 200000000, /* Base SH4 CPU (Naomi, Hikaru etc.) */
/* Resonators (There are probably more) */
- XTAL_384kHz = 384000, /* Commonly used for driving OKI MSM5205 */
- XTAL_400kHz = 400000, /* OKI MSM5205 on Great Swordman h/w */
- XTAL_455kHz = 455000, /* OKI MSM5205 on Gladiator h/w */
- XTAL_512kHz = 512000, /* Toshiba TC8830F */
- XTAL_640kHz = 640000, /* NEC UPD7759, Texas Instruments Speech Chips */
- XTAL_1_056MHz = 1056000 /* OKI M6295 on Trio The Punch h/w */
+ XTAL_384kHz = 384000, /* Commonly used for driving OKI MSM5205 */
+ XTAL_400kHz = 400000, /* OKI MSM5205 on Great Swordman h/w */
+ XTAL_455kHz = 455000, /* OKI MSM5205 on Gladiator h/w */
+ XTAL_512kHz = 512000, /* Toshiba TC8830F */
+ XTAL_640kHz = 640000, /* NEC UPD7759, Texas Instruments Speech Chips */
+ XTAL_1_056MHz = 1056000 /* OKI M6295 on Trio The Punch h/w */
};
diff --git a/src/emu/eigccppc.h b/src/emu/eigccppc.h
index 268853cce55..8422a3910ee 100644
--- a/src/emu/eigccppc.h
+++ b/src/emu/eigccppc.h
@@ -256,8 +256,8 @@ _count_leading_zeros(UINT32 value)
__asm__ (
" cntlzw %[result], %[value] \n"
- : [result] "=r" (result) /* result can be in any register */
- : [value] "r" (value) /* 'value' can be in any register */
+ : [result] "=r" (result) /* result can be in any register */
+ : [value] "r" (value) /* 'value' can be in any register */
);
return result;
@@ -278,8 +278,8 @@ _count_leading_ones(UINT32 value)
__asm__ (
" not %[result], %[value] \n"
" cntlzw %[result], %[result] \n"
- : [result] "=r" (result) /* result can be in any register */
- : [value] "r" (value) /* 'value' can be in any register */
+ : [result] "=r" (result) /* result can be in any register */
+ : [value] "r" (value) /* 'value' can be in any register */
);
return result;
@@ -312,12 +312,12 @@ _compare_exchange32(INT32 volatile *ptr, INT32 compare, INT32 exchange)
" stwcx. %[exchange], 0, %[ptr] \n"
" bne- 1b \n"
"2: "
- : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
- , [result] "=&r" (result)
- : [ptr] "r" (ptr)
- , [exchange] "r" (exchange)
- , [compare] "r" (compare)
- : "cr0"
+ : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
+ , [result] "=&r" (result)
+ : [ptr] "r" (ptr)
+ , [exchange] "r" (exchange)
+ , [compare] "r" (compare)
+ : "cr0"
);
return result;
@@ -345,12 +345,12 @@ _compare_exchange64(INT64 volatile *ptr, INT64 compare, INT64 exchange)
" stdcx. %[exchange], 0, %[ptr] \n"
" bne- 1b \n"
"2: "
- : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
- , [result] "=&r" (result)
- : [ptr] "r" (ptr)
- , [exchange] "r" (exchange)
- , [compare] "r" (compare)
- : "cr0"
+ : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
+ , [result] "=&r" (result)
+ : [ptr] "r" (ptr)
+ , [exchange] "r" (exchange)
+ , [compare] "r" (compare)
+ : "cr0"
);
return result;
@@ -375,11 +375,11 @@ _atomic_exchange32(INT32 volatile *ptr, INT32 exchange)
" sync \n"
" stwcx. %[exchange], 0, %[ptr] \n"
" bne- 1b \n"
- : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
- , [result] "=&r" (result)
- : [ptr] "r" (ptr)
- , [exchange] "r" (exchange)
- : "cr0"
+ : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
+ , [result] "=&r" (result)
+ : [ptr] "r" (ptr)
+ , [exchange] "r" (exchange)
+ : "cr0"
);
return result;
@@ -404,11 +404,11 @@ _atomic_add32(INT32 volatile *ptr, INT32 delta)
" sync \n"
" stwcx. %[result], 0, %[ptr] \n"
" bne- 1b \n"
- : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
- , [result] "=&b" (result)
- : [ptr] "r" (ptr)
- , [delta] "r" (delta)
- : "cr0"
+ : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
+ , [result] "=&b" (result)
+ : [ptr] "r" (ptr)
+ , [delta] "r" (delta)
+ : "cr0"
);
return result;
@@ -433,10 +433,10 @@ _atomic_increment32(INT32 volatile *ptr)
" sync \n"
" stwcx. %[result], 0, %[ptr] \n"
" bne- 1b \n"
- : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
- , [result] "=&b" (result)
- : [ptr] "r" (ptr)
- : "cr0"
+ : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
+ , [result] "=&b" (result)
+ : [ptr] "r" (ptr)
+ : "cr0"
);
return result;
@@ -461,10 +461,10 @@ _atomic_decrement32(INT32 volatile *ptr)
" sync \n"
" stwcx. %[result], 0, %[ptr] \n"
" bne- 1b \n"
- : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
- , [result] "=&b" (result)
- : [ptr] "r" (ptr)
- : "cr0"
+ : [dummy] "+m" (*ptr) /* Lets GCC know that *ptr will be read/written in case it's not marked volatile */
+ , [result] "=&b" (result)
+ : [ptr] "r" (ptr)
+ : "cr0"
);
return result;
diff --git a/src/emu/eigccx86.h b/src/emu/eigccx86.h
index d7ad34d89e3..bc7bee1c636 100644
--- a/src/emu/eigccx86.h
+++ b/src/emu/eigccx86.h
@@ -17,9 +17,9 @@
#ifdef __SSE2__
#include <stdlib.h>
-#include <mmintrin.h> /* MMX */
-#include <xmmintrin.h> /* SSE */
-#include <emmintrin.h> /* SSE2 */
+#include <mmintrin.h> /* MMX */
+#include <xmmintrin.h> /* SSE */
+#include <emmintrin.h> /* SSE2 */
#endif
@@ -31,7 +31,7 @@ union _x86_union
{
UINT64 u64;
struct {
- UINT32 l, h;
+ UINT32 l, h;
} u32;
};
@@ -49,10 +49,10 @@ _mul_32x32(INT32 a, INT32 b)
__asm__ (
" imull %[b] ;"
- : [result] "=A" (result) /* result in edx:eax */
- : [a] "%a" (a) /* 'a' should also be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- : "cc" /* Clobbers condition codes */
+ : [result] "=A" (result) /* result in edx:eax */
+ : [a] "%a" (a) /* 'a' should also be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -75,10 +75,10 @@ _mulu_32x32(UINT32 a, UINT32 b)
__asm__ (
" mull %[b] ;"
- : [result] "=A" (result) /* result in edx:eax */
- : [a] "%a" (a) /* 'a' should also be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- : "cc" /* Clobbers condition codes */
+ : [result] "=A" (result) /* result in edx:eax */
+ : [a] "%a" (a) /* 'a' should also be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -96,15 +96,15 @@ _mulu_32x32(UINT32 a, UINT32 b)
INLINE INT32 ATTR_CONST ATTR_FORCE_INLINE
_mul_32x32_hi(INT32 a, INT32 b)
{
- register INT32 result, temp;
+ register INT32 result, temp;
__asm__ (
" imull %[b] ;"
- : [result] "=d" (result) /* result in edx */
- , [temp] "=a" (temp) /* This is effectively a clobber */
- : [a] "a" (a) /* 'a' should be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- : "cc" /* Clobbers condition codes */
+ : [result] "=d" (result) /* result in edx */
+ , [temp] "=a" (temp) /* This is effectively a clobber */
+ : [a] "a" (a) /* 'a' should be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -121,15 +121,15 @@ _mul_32x32_hi(INT32 a, INT32 b)
INLINE UINT32 ATTR_CONST ATTR_FORCE_INLINE
_mulu_32x32_hi(UINT32 a, UINT32 b)
{
- register UINT32 result, temp;
+ register UINT32 result, temp;
__asm__ (
" mull %[b] ;"
- : [result] "=d" (result) /* result in edx */
- , [temp] "=a" (temp) /* This is effectively a clobber */
- : [a] "a" (a) /* 'a' should be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- : "cc" /* Clobbers condition codes */
+ : [result] "=d" (result) /* result in edx */
+ , [temp] "=a" (temp) /* This is effectively a clobber */
+ : [a] "a" (a) /* 'a' should be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -154,11 +154,11 @@ _mul_32x32_shift(INT32 a, INT32 b, UINT8 shift)
__asm__ (
" imull %[b] ;"
" shrdl %[shift], %%edx, %[result] ;"
- : [result] "=a" (result) /* result ends up in eax */
- : [a] "%0" (a) /* 'a' should also be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
- : "%edx", "cc" /* clobbers edx and condition codes */
+ : [result] "=a" (result) /* result ends up in eax */
+ : [a] "%0" (a) /* 'a' should also be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
+ : "%edx", "cc" /* clobbers edx and condition codes */
);
return result;
@@ -184,11 +184,11 @@ _mulu_32x32_shift(UINT32 a, UINT32 b, UINT8 shift)
__asm__ (
" mull %[b] ;"
" shrdl %[shift], %%edx, %[result] ;"
- : [result] "=a" (result) /* result ends up in eax */
- : [a] "%0" (a) /* 'a' should also be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
- : "%edx", "cc" /* clobbers edx and condition codes */
+ : [result] "=a" (result) /* result ends up in eax */
+ : [a] "%0" (a) /* 'a' should also be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
+ : "%edx", "cc" /* clobbers edx and condition codes */
);
return result;
@@ -211,11 +211,11 @@ _div_64x32(INT64 a, INT32 b)
/* Throws arithmetic exception if result doesn't fit in 32 bits */
__asm__ (
" idivl %[b] ;"
- : [result] "=a" (result) /* Result ends up in eax */
- , [temp] "=d" (temp) /* This is effectively a clobber */
- : [a] "A" (a) /* 'a' in edx:eax */
- , [b] "rm" (b) /* 'b' in register or memory */
- : "cc" /* Clobbers condition codes */
+ : [result] "=a" (result) /* Result ends up in eax */
+ , [temp] "=d" (temp) /* This is effectively a clobber */
+ : [a] "A" (a) /* 'a' in edx:eax */
+ , [b] "rm" (b) /* 'b' in register or memory */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -238,11 +238,11 @@ _divu_64x32(UINT64 a, UINT32 b)
/* Throws arithmetic exception if result doesn't fit in 32 bits */
__asm__ (
" divl %[b] ;"
- : [result] "=a" (result) /* Result ends up in eax */
- , [temp] "=d" (temp) /* This is effectively a clobber */
- : [a] "A" (a) /* 'a' in edx:eax */
- , [b] "rm" (b) /* 'b' in register or memory */
- : "cc" /* Clobbers condition codes */
+ : [result] "=a" (result) /* Result ends up in eax */
+ , [temp] "=d" (temp) /* This is effectively a clobber */
+ : [a] "A" (a) /* 'a' in edx:eax */
+ , [b] "rm" (b) /* 'b' in register or memory */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -266,11 +266,11 @@ _div_64x32_rem(INT64 dividend, INT32 divisor, INT32 *remainder)
/* Throws arithmetic exception if result doesn't fit in 32 bits */
__asm__ (
" idivl %[divisor] ;"
- : [result] "=a" (quotient) /* Quotient ends up in eax */
- , [remainder] "=d" (*remainder) /* Remainder ends up in edx */
- : [dividend] "A" (dividend) /* 'dividend' in edx:eax */
- , [divisor] "rm" (divisor) /* 'divisor' in register or memory */
- : "cc" /* Clobbers condition codes */
+ : [result] "=a" (quotient) /* Quotient ends up in eax */
+ , [remainder] "=d" (*remainder) /* Remainder ends up in edx */
+ : [dividend] "A" (dividend) /* 'dividend' in edx:eax */
+ , [divisor] "rm" (divisor) /* 'divisor' in register or memory */
+ : "cc" /* Clobbers condition codes */
);
return quotient;
@@ -294,11 +294,11 @@ _divu_64x32_rem(UINT64 dividend, UINT32 divisor, UINT32 *remainder)
/* Throws arithmetic exception if result doesn't fit in 32 bits */
__asm__ (
" divl %[divisor] ;"
- : [result] "=a" (quotient) /* Quotient ends up in eax */
- , [remainder] "=d" (*remainder) /* Remainder ends up in edx */
- : [dividend] "A" (dividend) /* 'dividend' in edx:eax */
- , [divisor] "rm" (divisor) /* 'divisor' in register or memory */
- : "cc" /* Clobbers condition codes */
+ : [result] "=a" (quotient) /* Quotient ends up in eax */
+ , [remainder] "=d" (*remainder) /* Remainder ends up in edx */
+ : [dividend] "A" (dividend) /* 'dividend' in edx:eax */
+ , [divisor] "rm" (divisor) /* 'divisor' in register or memory */
+ : "cc" /* Clobbers condition codes */
);
return quotient;
@@ -316,12 +316,12 @@ _divu_64x32_rem(UINT64 dividend, UINT32 divisor, UINT32 *remainder)
/* Throws arithmetic exception if result doesn't fit in 32 bits */
__asm__ (
" divl %[divisor] ;"
- : [result] "=a" (quotient) /* Quotient ends up in eax */
- , [remainder] "=d" (*remainder) /* Remainder ends up in edx */
- : [divl] "a" (r.u32.l) /* 'dividend' in edx:eax */
+ : [result] "=a" (quotient) /* Quotient ends up in eax */
+ , [remainder] "=d" (*remainder) /* Remainder ends up in edx */
+ : [divl] "a" (r.u32.l) /* 'dividend' in edx:eax */
, [divh] "d" (r.u32.h)
- , [divisor] "rm" (divisor) /* 'divisor' in register or memory */
- : "cc" /* Clobbers condition codes */
+ , [divisor] "rm" (divisor) /* 'divisor' in register or memory */
+ : "cc" /* Clobbers condition codes */
);
return quotient;
@@ -345,15 +345,15 @@ _div_32x32_shift(INT32 a, INT32 b, UINT8 shift)
/* Valid for (0 <= shift <= 31) */
/* Throws arithmetic exception if result doesn't fit in 32 bits */
__asm__ (
- " cdq ;"
- " shldl %[shift], %[a], %%edx ;"
+ " cdq ;"
+ " shldl %[shift], %[a], %%edx ;"
" shll %[shift], %[a] ;"
" idivl %[b] ;"
- : [result] "=&a" (result) /* result ends up in eax */
- : [a] "0" (a) /* 'a' should also be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
- : "%edx", "cc" /* clobbers edx and condition codes */
+ : [result] "=&a" (result) /* result ends up in eax */
+ : [a] "0" (a) /* 'a' should also be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
+ : "%edx", "cc" /* clobbers edx and condition codes */
);
return result;
@@ -377,15 +377,15 @@ _divu_32x32_shift(UINT32 a, UINT32 b, UINT8 shift)
/* Valid for (0 <= shift <= 31) */
/* Throws arithmetic exception if result doesn't fit in 32 bits */
__asm__ (
- " clr %%edx ;"
- " shldl %[shift], %[a], %%edx ;"
+ " clr %%edx ;"
+ " shldl %[shift], %[a], %%edx ;"
" shll %[shift], %[a] ;"
" divl %[b] ;"
- : [result] "=&a" (result) /* result ends up in eax */
- : [a] "0" (a) /* 'a' should also be in eax on entry */
- , [b] "rm" (b) /* 'b' can be memory or register */
- , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
- : "%edx", "cc" /* clobbers edx and condition codes */
+ : [result] "=&a" (result) /* result ends up in eax */
+ : [a] "0" (a) /* 'a' should also be in eax on entry */
+ , [b] "rm" (b) /* 'b' can be memory or register */
+ , [shift] "Ic" (shift) /* 'shift' must be constant in 0-31 range or in cl */
+ : "%edx", "cc" /* clobbers edx and condition codes */
);
return result;
@@ -408,11 +408,11 @@ _mod_64x32(INT64 a, INT32 b)
/* Throws arithmetic exception if quotient doesn't fit in 32 bits */
__asm__ (
" idivl %[b] ;"
- : [result] "=d" (result) /* Result ends up in edx */
- , [temp] "=a" (temp) /* This is effectively a clobber */
- : [a] "A" (a) /* 'a' in edx:eax */
- , [b] "rm" (b) /* 'b' in register or memory */
- : "cc" /* Clobbers condition codes */
+ : [result] "=d" (result) /* Result ends up in edx */
+ , [temp] "=a" (temp) /* This is effectively a clobber */
+ : [a] "A" (a) /* 'a' in edx:eax */
+ , [b] "rm" (b) /* 'b' in register or memory */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -435,11 +435,11 @@ _modu_64x32(UINT64 a, UINT32 b)
/* Throws arithmetic exception if quotient doesn't fit in 32 bits */
__asm__ (
" divl %[b] ;"
- : [result] "=d" (result) /* Result ends up in edx */
- , [temp] "=a" (temp) /* This is effectively a clobber */
- : [a] "A" (a) /* 'a' in edx:eax */
- , [b] "rm" (b) /* 'b' in register or memory */
- : "cc" /* Clobbers condition codes */
+ : [result] "=d" (result) /* Result ends up in edx */
+ , [temp] "=a" (temp) /* This is effectively a clobber */
+ : [a] "A" (a) /* 'a' in edx:eax */
+ , [b] "rm" (b) /* 'b' in register or memory */
+ : "cc" /* Clobbers condition codes */
);
return result;
@@ -487,9 +487,9 @@ _count_leading_zeros(UINT32 value)
" jnz 1f ;"
" movl $63, %[result] ;"
"1: xorl $31, %[result] ;"
- : [result] "=r" (result) /* result can be in any register */
- : [value] "rm" (value) /* 'value' can be register or memory */
- : "cc" /* clobbers condition codes */
+ : [result] "=r" (result) /* result can be in any register */
+ : [value] "rm" (value) /* 'value' can be register or memory */
+ : "cc" /* clobbers condition codes */
);
return result;
@@ -514,9 +514,9 @@ _count_leading_ones(UINT32 value)
" jnz 1f ;"
" movl $63, %[result] ;"
"1: xorl $31, %[result] ;"
- : [result] "=r" (result) /* result can be in any register */
- : [value] "rmi" (value) /* 'value' can be register, memory or immediate */
- : "cc" /* clobbers condition codes */
+ : [result] "=r" (result) /* result can be in any register */
+ : [value] "rmi" (value) /* 'value' can be register, memory or immediate */
+ : "cc" /* clobbers condition codes */
);
return result;
@@ -543,11 +543,11 @@ _compare_exchange32(INT32 volatile *ptr, INT32 compare, INT32 exchange)
__asm__ __volatile__ (
" lock ; cmpxchgl %[exchange], %[ptr] ;"
- : [ptr] "+m" (*ptr)
- , [result] "=a" (result)
- : [compare] "1" (compare)
- , [exchange] "q" (exchange)
- : "cc"
+ : [ptr] "+m" (*ptr)
+ , [result] "=a" (result)
+ : [compare] "1" (compare)
+ , [exchange] "q" (exchange)
+ : "cc"
);
return result;
@@ -570,11 +570,11 @@ _compare_exchange64(INT64 volatile *ptr, INT64 compare, INT64 exchange)
__asm__ __volatile__ (
" lock ; cmpxchgq %[exchange], %[ptr] ;"
- : [ptr] "+m" (*ptr)
- , [result] "=a" (result)
- : [compare] "1" (compare)
- , [exchange] "q" (exchange)
- : "cc"
+ : [ptr] "+m" (*ptr)
+ , [result] "=a" (result)
+ : [compare] "1" (compare)
+ , [exchange] "q" (exchange)
+ : "cc"
);
return result;
@@ -619,10 +619,10 @@ _atomic_add32(INT32 volatile *ptr, INT32 delta)
__asm__ __volatile__ (
" lock ; xaddl %[result], %[ptr] ;"
- : [ptr] "+m" (*ptr)
- , [result] "+r" (result)
- :
- : "cc"
+ : [ptr] "+m" (*ptr)
+ , [result] "+r" (result)
+ :
+ : "cc"
);
return result + delta;
@@ -643,10 +643,10 @@ _atomic_increment32(INT32 volatile *ptr)
__asm__ __volatile__ (
" lock ; xaddl %[result], %[ptr] ;"
- : [ptr] "+m" (*ptr)
- , [result] "+r" (result)
- :
- : "cc"
+ : [ptr] "+m" (*ptr)
+ , [result] "+r" (result)
+ :
+ : "cc"
);
return result + 1;
@@ -667,10 +667,10 @@ _atomic_decrement32(INT32 volatile *ptr)
__asm__ __volatile__ (
" lock ; xaddl %[result], %[ptr] ;"
- : [ptr] "+m" (*ptr)
- , [result] "+r" (result)
- :
- : "cc"
+ : [ptr] "+m" (*ptr)
+ , [result] "+r" (result)
+ :
+ : "cc"
);
return result - 1;
@@ -694,23 +694,23 @@ _atomic_decrement32(INT32 volatile *ptr)
#ifndef __x86_64__
INLINE UINT64 ATTR_UNUSED ATTR_FORCE_INLINE _get_profile_ticks(void)
{
- UINT64 result;
- __asm__ __volatile__ (
- "rdtsc"
- : "=A" (result)
- );
- return result;
+ UINT64 result;
+ __asm__ __volatile__ (
+ "rdtsc"
+ : "=A" (result)
+ );
+ return result;
}
#else
INLINE UINT64 ATTR_UNUSED ATTR_FORCE_INLINE _get_profile_ticks(void)
{
_x86_union r;
- __asm__ __volatile__ (
- "rdtsc"
- : "=a" (r.u32.l), "=d" (r.u32.h)
- );
+ __asm__ __volatile__ (
+ "rdtsc"
+ : "=a" (r.u32.l), "=d" (r.u32.h)
+ );
- return (UINT64) r.u64;
+ return (UINT64) r.u64;
}
#endif
diff --git a/src/emu/emu.h b/src/emu/emu.h
index c492e8ed7ea..006cbab0e93 100644
--- a/src/emu/emu.h
+++ b/src/emu/emu.h
@@ -144,4 +144,4 @@ typedef device_t * (*machine_config_constructor)(machine_config &config, device_
#include "machine/generic.h"
#include "video/generic.h"
-#endif /* __EMU_H__ */
+#endif /* __EMU_H__ */
diff --git a/src/emu/emu.mak b/src/emu/emu.mak
index 9ec49bdb5a3..c956f3257b0 100644
--- a/src/emu/emu.mak
+++ b/src/emu/emu.mak
@@ -141,211 +141,211 @@ EMUDRIVEROBJS = \
$(EMUDRIVERS)/testcpu.o \
EMUMACHINEOBJS = \
- $(EMUMACHINE)/53c7xx.o \
- $(EMUMACHINE)/53c810.o \
- $(EMUMACHINE)/6522via.o \
- $(EMUMACHINE)/6525tpi.o \
- $(EMUMACHINE)/6526cia.o \
- $(EMUMACHINE)/6532riot.o \
- $(EMUMACHINE)/6551acia.o \
- $(EMUMACHINE)/6821pia.o \
- $(EMUMACHINE)/6840ptm.o \
- $(EMUMACHINE)/6850acia.o \
- $(EMUMACHINE)/68681.o \
- $(EMUMACHINE)/n68681.o \
- $(EMUMACHINE)/74123.o \
- $(EMUMACHINE)/74148.o \
- $(EMUMACHINE)/74153.o \
- $(EMUMACHINE)/74181.o \
- $(EMUMACHINE)/7474.o \
- $(EMUMACHINE)/8042kbdc.o \
- $(EMUMACHINE)/8237dma.o \
- $(EMUMACHINE)/8257dma.o \
- $(EMUMACHINE)/aakart.o \
- $(EMUMACHINE)/adc0808.o \
- $(EMUMACHINE)/adc083x.o \
- $(EMUMACHINE)/adc1038.o \
- $(EMUMACHINE)/adc1213x.o \
- $(EMUMACHINE)/am53cf96.o \
- $(EMUMACHINE)/am9517a.o \
- $(EMUMACHINE)/amigafdc.o \
- $(EMUMACHINE)/at28c16.o \
- $(EMUMACHINE)/cdp1852.o \
- $(EMUMACHINE)/cdp1871.o \
- $(EMUMACHINE)/com8116.o \
- $(EMUMACHINE)/cr589.o \
- $(EMUMACHINE)/ctronics.o \
- $(EMUMACHINE)/ds1302.o \
- $(EMUMACHINE)/ds2401.o \
- $(EMUMACHINE)/ds2404.o \
- $(EMUMACHINE)/ds75160a.o \
- $(EMUMACHINE)/ds75161a.o \
- $(EMUMACHINE)/e0516.o \
- $(EMUMACHINE)/eeprom.o \
- $(EMUMACHINE)/er2055.o \
- $(EMUMACHINE)/f3853.o \
- $(EMUMACHINE)/fdc_pll.o \
- $(EMUMACHINE)/generic.o \
- $(EMUMACHINE)/i2cmem.o \
- $(EMUMACHINE)/i8155.o \
- $(EMUMACHINE)/i8212.o \
- $(EMUMACHINE)/i8214.o \
- $(EMUMACHINE)/i8243.o \
- $(EMUMACHINE)/i8251.o \
- $(EMUMACHINE)/i8255.o \
- $(EMUMACHINE)/i8279.o \
- $(EMUMACHINE)/i8355.o \
- $(EMUMACHINE)/idectrl.o \
- $(EMUMACHINE)/im6402.o \
- $(EMUMACHINE)/ins8154.o \
- $(EMUMACHINE)/ins8250.o \
- $(EMUMACHINE)/intelfsh.o \
- $(EMUMACHINE)/jvsdev.o \
- $(EMUMACHINE)/jvshost.o \
- $(EMUMACHINE)/k033906.o \
- $(EMUMACHINE)/k053252.o \
- $(EMUMACHINE)/k056230.o \
- $(EMUMACHINE)/latch8.o \
- $(EMUMACHINE)/laserdsc.o \
- $(EMUMACHINE)/lc89510.o \
- $(EMUMACHINE)/ldstub.o \
- $(EMUMACHINE)/ldpr8210.o \
- $(EMUMACHINE)/ldv1000.o \
- $(EMUMACHINE)/ldvp931.o \
- $(EMUMACHINE)/m6m80011ap.o \
- $(EMUMACHINE)/matsucd.o \
- $(EMUMACHINE)/mb14241.o \
- $(EMUMACHINE)/mb3773.o \
- $(EMUMACHINE)/mb87078.o \
- $(EMUMACHINE)/mc146818.o \
- $(EMUMACHINE)/mc2661.o \
- $(EMUMACHINE)/mc6852.o \
- $(EMUMACHINE)/mc68901.o \
- $(EMUMACHINE)/mccs1850.o \
- $(EMUMACHINE)/mm74c922.o \
- $(EMUMACHINE)/microtch.o \
- $(EMUMACHINE)/mos6526.o \
- $(EMUMACHINE)/mos6529.o \
- $(EMUMACHINE)/msm5832.o \
- $(EMUMACHINE)/msm58321.o \
- $(EMUMACHINE)/msm6242.o \
- $(EMUMACHINE)/ncr539x.o \
- $(EMUMACHINE)/netlist.o \
- $(EMUMACHINE)/net_lib.o \
- $(EMUMACHINE)/nmc9306.o \
+ $(EMUMACHINE)/53c7xx.o \
+ $(EMUMACHINE)/53c810.o \
+ $(EMUMACHINE)/6522via.o \
+ $(EMUMACHINE)/6525tpi.o \
+ $(EMUMACHINE)/6526cia.o \
+ $(EMUMACHINE)/6532riot.o \
+ $(EMUMACHINE)/6551acia.o \
+ $(EMUMACHINE)/6821pia.o \
+ $(EMUMACHINE)/6840ptm.o \
+ $(EMUMACHINE)/6850acia.o \
+ $(EMUMACHINE)/68681.o \
+ $(EMUMACHINE)/n68681.o \
+ $(EMUMACHINE)/74123.o \
+ $(EMUMACHINE)/74148.o \
+ $(EMUMACHINE)/74153.o \
+ $(EMUMACHINE)/74181.o \
+ $(EMUMACHINE)/7474.o \
+ $(EMUMACHINE)/8042kbdc.o \
+ $(EMUMACHINE)/8237dma.o \
+ $(EMUMACHINE)/8257dma.o \
+ $(EMUMACHINE)/aakart.o \
+ $(EMUMACHINE)/adc0808.o \
+ $(EMUMACHINE)/adc083x.o \
+ $(EMUMACHINE)/adc1038.o \
+ $(EMUMACHINE)/adc1213x.o \
+ $(EMUMACHINE)/am53cf96.o \
+ $(EMUMACHINE)/am9517a.o \
+ $(EMUMACHINE)/amigafdc.o \
+ $(EMUMACHINE)/at28c16.o \
+ $(EMUMACHINE)/cdp1852.o \
+ $(EMUMACHINE)/cdp1871.o \
+ $(EMUMACHINE)/com8116.o \
+ $(EMUMACHINE)/cr589.o \
+ $(EMUMACHINE)/ctronics.o \
+ $(EMUMACHINE)/ds1302.o \
+ $(EMUMACHINE)/ds2401.o \
+ $(EMUMACHINE)/ds2404.o \
+ $(EMUMACHINE)/ds75160a.o \
+ $(EMUMACHINE)/ds75161a.o \
+ $(EMUMACHINE)/e0516.o \
+ $(EMUMACHINE)/eeprom.o \
+ $(EMUMACHINE)/er2055.o \
+ $(EMUMACHINE)/f3853.o \
+ $(EMUMACHINE)/fdc_pll.o \
+ $(EMUMACHINE)/generic.o \
+ $(EMUMACHINE)/i2cmem.o \
+ $(EMUMACHINE)/i8155.o \
+ $(EMUMACHINE)/i8212.o \
+ $(EMUMACHINE)/i8214.o \
+ $(EMUMACHINE)/i8243.o \
+ $(EMUMACHINE)/i8251.o \
+ $(EMUMACHINE)/i8255.o \
+ $(EMUMACHINE)/i8279.o \
+ $(EMUMACHINE)/i8355.o \
+ $(EMUMACHINE)/idectrl.o \
+ $(EMUMACHINE)/im6402.o \
+ $(EMUMACHINE)/ins8154.o \
+ $(EMUMACHINE)/ins8250.o \
+ $(EMUMACHINE)/intelfsh.o \
+ $(EMUMACHINE)/jvsdev.o \
+ $(EMUMACHINE)/jvshost.o \
+ $(EMUMACHINE)/k033906.o \
+ $(EMUMACHINE)/k053252.o \
+ $(EMUMACHINE)/k056230.o \
+ $(EMUMACHINE)/latch8.o \
+ $(EMUMACHINE)/laserdsc.o \
+ $(EMUMACHINE)/lc89510.o \
+ $(EMUMACHINE)/ldstub.o \
+ $(EMUMACHINE)/ldpr8210.o \
+ $(EMUMACHINE)/ldv1000.o \
+ $(EMUMACHINE)/ldvp931.o \
+ $(EMUMACHINE)/m6m80011ap.o \
+ $(EMUMACHINE)/matsucd.o \
+ $(EMUMACHINE)/mb14241.o \
+ $(EMUMACHINE)/mb3773.o \
+ $(EMUMACHINE)/mb87078.o \
+ $(EMUMACHINE)/mc146818.o \
+ $(EMUMACHINE)/mc2661.o \
+ $(EMUMACHINE)/mc6852.o \
+ $(EMUMACHINE)/mc68901.o \
+ $(EMUMACHINE)/mccs1850.o \
+ $(EMUMACHINE)/mm74c922.o \
+ $(EMUMACHINE)/microtch.o \
+ $(EMUMACHINE)/mos6526.o \
+ $(EMUMACHINE)/mos6529.o \
+ $(EMUMACHINE)/msm5832.o \
+ $(EMUMACHINE)/msm58321.o \
+ $(EMUMACHINE)/msm6242.o \
+ $(EMUMACHINE)/ncr539x.o \
+ $(EMUMACHINE)/netlist.o \
+ $(EMUMACHINE)/net_lib.o \
+ $(EMUMACHINE)/nmc9306.o \
$(EMUMACHINE)/nscsi_bus.o \
$(EMUMACHINE)/nscsi_cd.o \
$(EMUMACHINE)/nscsi_hd.o \
- $(EMUMACHINE)/nvram.o \
- $(EMUMACHINE)/pc16552d.o \
- $(EMUMACHINE)/pci.o \
- $(EMUMACHINE)/pd4990a.o \
- $(EMUMACHINE)/pic8259.o \
- $(EMUMACHINE)/pit8253.o \
- $(EMUMACHINE)/pla.o \
- $(EMUMACHINE)/ram.o \
- $(EMUMACHINE)/roc10937.o \
- $(EMUMACHINE)/rp5c01.o \
- $(EMUMACHINE)/rp5c15.o \
- $(EMUMACHINE)/rp5h01.o \
- $(EMUMACHINE)/rtc4543.o \
- $(EMUMACHINE)/rtc65271.o \
- $(EMUMACHINE)/rtc9701.o \
- $(EMUMACHINE)/s3c2400.o \
- $(EMUMACHINE)/s3c2410.o \
- $(EMUMACHINE)/s3c2440.o \
- $(EMUMACHINE)/s3520cf.o \
- $(EMUMACHINE)/scsibus.o \
- $(EMUMACHINE)/scsicb.o \
- $(EMUMACHINE)/scsicd.o \
- $(EMUMACHINE)/scsidev.o \
- $(EMUMACHINE)/scsihd.o \
- $(EMUMACHINE)/scsihle.o \
- $(EMUMACHINE)/secflash.o \
- $(EMUMACHINE)/seibu_cop.o \
- $(EMUMACHINE)/smc91c9x.o \
- $(EMUMACHINE)/tc009xlvc.o \
- $(EMUMACHINE)/timekpr.o \
- $(EMUMACHINE)/tmp68301.o \
- $(EMUMACHINE)/tms6100.o \
- $(EMUMACHINE)/tms9901.o \
- $(EMUMACHINE)/tms9902.o \
- $(EMUMACHINE)/upd1990a.o \
- $(EMUMACHINE)/upd4701.o \
- $(EMUMACHINE)/upd7201.o \
- $(EMUMACHINE)/upd765.o \
- $(EMUMACHINE)/v3021.o \
- $(EMUMACHINE)/wd17xx.o \
- $(EMUMACHINE)/wd33c93.o \
- $(EMUMACHINE)/wd_fdc.o \
- $(EMUMACHINE)/x2212.o \
- $(EMUMACHINE)/x76f041.o \
- $(EMUMACHINE)/x76f100.o \
- $(EMUMACHINE)/z80ctc.o \
- $(EMUMACHINE)/z80dart.o \
- $(EMUMACHINE)/z80dma.o \
- $(EMUMACHINE)/z80pio.o \
- $(EMUMACHINE)/z80sio.o \
- $(EMUMACHINE)/z80sti.o \
- $(EMUMACHINE)/z8536.o \
+ $(EMUMACHINE)/nvram.o \
+ $(EMUMACHINE)/pc16552d.o \
+ $(EMUMACHINE)/pci.o \
+ $(EMUMACHINE)/pd4990a.o \
+ $(EMUMACHINE)/pic8259.o \
+ $(EMUMACHINE)/pit8253.o \
+ $(EMUMACHINE)/pla.o \
+ $(EMUMACHINE)/ram.o \
+ $(EMUMACHINE)/roc10937.o \
+ $(EMUMACHINE)/rp5c01.o \
+ $(EMUMACHINE)/rp5c15.o \
+ $(EMUMACHINE)/rp5h01.o \
+ $(EMUMACHINE)/rtc4543.o \
+ $(EMUMACHINE)/rtc65271.o \
+ $(EMUMACHINE)/rtc9701.o \
+ $(EMUMACHINE)/s3c2400.o \
+ $(EMUMACHINE)/s3c2410.o \
+ $(EMUMACHINE)/s3c2440.o \
+ $(EMUMACHINE)/s3520cf.o \
+ $(EMUMACHINE)/scsibus.o \
+ $(EMUMACHINE)/scsicb.o \
+ $(EMUMACHINE)/scsicd.o \
+ $(EMUMACHINE)/scsidev.o \
+ $(EMUMACHINE)/scsihd.o \
+ $(EMUMACHINE)/scsihle.o \
+ $(EMUMACHINE)/secflash.o \
+ $(EMUMACHINE)/seibu_cop.o \
+ $(EMUMACHINE)/smc91c9x.o \
+ $(EMUMACHINE)/tc009xlvc.o \
+ $(EMUMACHINE)/timekpr.o \
+ $(EMUMACHINE)/tmp68301.o \
+ $(EMUMACHINE)/tms6100.o \
+ $(EMUMACHINE)/tms9901.o \
+ $(EMUMACHINE)/tms9902.o \
+ $(EMUMACHINE)/upd1990a.o \
+ $(EMUMACHINE)/upd4701.o \
+ $(EMUMACHINE)/upd7201.o \
+ $(EMUMACHINE)/upd765.o \
+ $(EMUMACHINE)/v3021.o \
+ $(EMUMACHINE)/wd17xx.o \
+ $(EMUMACHINE)/wd33c93.o \
+ $(EMUMACHINE)/wd_fdc.o \
+ $(EMUMACHINE)/x2212.o \
+ $(EMUMACHINE)/x76f041.o \
+ $(EMUMACHINE)/x76f100.o \
+ $(EMUMACHINE)/z80ctc.o \
+ $(EMUMACHINE)/z80dart.o \
+ $(EMUMACHINE)/z80dma.o \
+ $(EMUMACHINE)/z80pio.o \
+ $(EMUMACHINE)/z80sio.o \
+ $(EMUMACHINE)/z80sti.o \
+ $(EMUMACHINE)/z8536.o \
EMUVIDEOOBJS = \
- $(EMUVIDEO)/315_5124.o \
- $(EMUVIDEO)/bufsprite.o \
- $(EMUVIDEO)/cdp1861.o \
- $(EMUVIDEO)/cdp1862.o \
- $(EMUVIDEO)/crt9007.o \
- $(EMUVIDEO)/crt9021.o \
- $(EMUVIDEO)/crt9212.o \
- $(EMUVIDEO)/dm9368.o \
- $(EMUVIDEO)/generic.o \
- $(EMUVIDEO)/h63484.o \
- $(EMUVIDEO)/hd44102.o \
- $(EMUVIDEO)/hd61830.o \
- $(EMUVIDEO)/hd63484.o \
- $(EMUVIDEO)/huc6202.o \
- $(EMUVIDEO)/huc6260.o \
- $(EMUVIDEO)/huc6261.o \
- $(EMUVIDEO)/huc6270.o \
- $(EMUVIDEO)/huc6272.o \
- $(EMUVIDEO)/i8275.o \
- $(EMUVIDEO)/i8275x.o \
- $(EMUVIDEO)/k053250.o \
- $(EMUVIDEO)/m50458.o \
- $(EMUVIDEO)/mb90082.o \
- $(EMUVIDEO)/mc6845.o \
- $(EMUVIDEO)/msm6255.o \
- $(EMUVIDEO)/pc_cga.o \
- $(EMUVIDEO)/cgapal.o \
- $(EMUVIDEO)/pc_vga.o \
- $(EMUVIDEO)/poly.o \
- $(EMUVIDEO)/psx.o \
- $(EMUVIDEO)/ramdac.o \
- $(EMUVIDEO)/resnet.o \
- $(EMUVIDEO)/rgbutil.o \
- $(EMUVIDEO)/s2636.o \
- $(EMUVIDEO)/saa5050.o \
- $(EMUVIDEO)/sed1330.o \
- $(EMUVIDEO)/tlc34076.o \
- $(EMUVIDEO)/tms34061.o \
- $(EMUVIDEO)/tms9927.o \
- $(EMUVIDEO)/tms9928a.o \
- $(EMUVIDEO)/upd3301.o \
- $(EMUVIDEO)/v9938.o \
- $(EMUVIDEO)/vector.o \
- $(EMUVIDEO)/voodoo.o \
+ $(EMUVIDEO)/315_5124.o \
+ $(EMUVIDEO)/bufsprite.o \
+ $(EMUVIDEO)/cdp1861.o \
+ $(EMUVIDEO)/cdp1862.o \
+ $(EMUVIDEO)/crt9007.o \
+ $(EMUVIDEO)/crt9021.o \
+ $(EMUVIDEO)/crt9212.o \
+ $(EMUVIDEO)/dm9368.o \
+ $(EMUVIDEO)/generic.o \
+ $(EMUVIDEO)/h63484.o \
+ $(EMUVIDEO)/hd44102.o \
+ $(EMUVIDEO)/hd61830.o \
+ $(EMUVIDEO)/hd63484.o \
+ $(EMUVIDEO)/huc6202.o \
+ $(EMUVIDEO)/huc6260.o \
+ $(EMUVIDEO)/huc6261.o \
+ $(EMUVIDEO)/huc6270.o \
+ $(EMUVIDEO)/huc6272.o \
+ $(EMUVIDEO)/i8275.o \
+ $(EMUVIDEO)/i8275x.o \
+ $(EMUVIDEO)/k053250.o \
+ $(EMUVIDEO)/m50458.o \
+ $(EMUVIDEO)/mb90082.o \
+ $(EMUVIDEO)/mc6845.o \
+ $(EMUVIDEO)/msm6255.o \
+ $(EMUVIDEO)/pc_cga.o \
+ $(EMUVIDEO)/cgapal.o \
+ $(EMUVIDEO)/pc_vga.o \
+ $(EMUVIDEO)/poly.o \
+ $(EMUVIDEO)/psx.o \
+ $(EMUVIDEO)/ramdac.o \
+ $(EMUVIDEO)/resnet.o \
+ $(EMUVIDEO)/rgbutil.o \
+ $(EMUVIDEO)/s2636.o \
+ $(EMUVIDEO)/saa5050.o \
+ $(EMUVIDEO)/sed1330.o \
+ $(EMUVIDEO)/tlc34076.o \
+ $(EMUVIDEO)/tms34061.o \
+ $(EMUVIDEO)/tms9927.o \
+ $(EMUVIDEO)/tms9928a.o \
+ $(EMUVIDEO)/upd3301.o \
+ $(EMUVIDEO)/v9938.o \
+ $(EMUVIDEO)/vector.o \
+ $(EMUVIDEO)/voodoo.o \
EMUIMAGEDEVOBJS = \
- $(EMUIMAGEDEV)/bitbngr.o \
- $(EMUIMAGEDEV)/cartslot.o \
- $(EMUIMAGEDEV)/cassette.o \
- $(EMUIMAGEDEV)/chd_cd.o \
- $(EMUIMAGEDEV)/flopdrv.o \
- $(EMUIMAGEDEV)/floppy.o \
- $(EMUIMAGEDEV)/harddriv.o \
- $(EMUIMAGEDEV)/printer.o \
- $(EMUIMAGEDEV)/serial.o \
- $(EMUIMAGEDEV)/snapquik.o \
+ $(EMUIMAGEDEV)/bitbngr.o \
+ $(EMUIMAGEDEV)/cartslot.o \
+ $(EMUIMAGEDEV)/cassette.o \
+ $(EMUIMAGEDEV)/chd_cd.o \
+ $(EMUIMAGEDEV)/flopdrv.o \
+ $(EMUIMAGEDEV)/floppy.o \
+ $(EMUIMAGEDEV)/harddriv.o \
+ $(EMUIMAGEDEV)/printer.o \
+ $(EMUIMAGEDEV)/serial.o \
+ $(EMUIMAGEDEV)/snapquik.o \
LIBEMUOBJS = $(EMUOBJS) $(EMUSOUNDOBJS) $(EMUAUDIOOBJS) $(EMUDRIVEROBJS) $(EMUMACHINEOBJS) $(EMUIMAGEDEVOBJS) $(EMUVIDEOOBJS)
@@ -380,20 +380,20 @@ $(LIBSOUND): $(SOUNDOBJS)
# additional dependencies
#-------------------------------------------------
-$(EMUOBJ)/rendfont.o: $(EMUOBJ)/uismall.fh
+$(EMUOBJ)/rendfont.o: $(EMUOBJ)/uismall.fh
-$(EMUOBJ)/video.o: $(EMUSRC)/rendersw.c
+$(EMUOBJ)/video.o: $(EMUSRC)/rendersw.c
-$(EMUMACHINE)/s3c2400.o: $(EMUSRC)/machine/s3c24xx.c
-$(EMUMACHINE)/s3c2410.o: $(EMUSRC)/machine/s3c24xx.c
-$(EMUMACHINE)/s3c2440.o: $(EMUSRC)/machine/s3c24xx.c
+$(EMUMACHINE)/s3c2400.o: $(EMUSRC)/machine/s3c24xx.c
+$(EMUMACHINE)/s3c2410.o: $(EMUSRC)/machine/s3c24xx.c
+$(EMUMACHINE)/s3c2440.o: $(EMUSRC)/machine/s3c24xx.c
#-------------------------------------------------
# core layouts
#-------------------------------------------------
-$(EMUOBJ)/rendlay.o: $(EMULAYOUT)/dualhovu.lh \
+$(EMUOBJ)/rendlay.o: $(EMULAYOUT)/dualhovu.lh \
$(EMULAYOUT)/dualhsxs.lh \
$(EMULAYOUT)/dualhuov.lh \
$(EMULAYOUT)/horizont.lh \
@@ -404,4 +404,4 @@ $(EMUOBJ)/rendlay.o: $(EMULAYOUT)/dualhovu.lh \
$(EMULAYOUT)/lcd_rot.lh \
$(EMULAYOUT)/noscreens.lh \
-$(EMUOBJ)/video.o: $(EMULAYOUT)/snap.lh
+$(EMUOBJ)/video.o: $(EMULAYOUT)/snap.lh
diff --git a/src/emu/emualloc.c b/src/emu/emualloc.c
index 4d4668ffd77..063a5632525 100644
--- a/src/emu/emualloc.c
+++ b/src/emu/emualloc.c
@@ -45,7 +45,7 @@
// DEBUGGING
//**************************************************************************
-#define LOG_ALLOCS (0)
+#define LOG_ALLOCS (0)
@@ -79,22 +79,22 @@ const int memory_block_alloc_chunk = 256;
class memory_entry
{
public:
- memory_entry * m_next; // link to the next entry
- memory_entry * m_prev; // link to the previous entry
- size_t m_size; // size of the allocation (not including this header)
- void * m_base; // base of the allocation
- const char * m_file; // file the allocation was made from
- int m_line; // line number within that file
- UINT64 m_id; // unique id
-
- static const int k_hash_prime = 6151;
-
- static UINT64 s_curid; // current ID
- static osd_lock * s_lock; // lock for managing the list
- static bool s_lock_alloc; // set to true temporarily during lock allocation
- static bool s_tracking; // set to true when tracking is live
+ memory_entry * m_next; // link to the next entry
+ memory_entry * m_prev; // link to the previous entry
+ size_t m_size; // size of the allocation (not including this header)
+ void * m_base; // base of the allocation
+ const char * m_file; // file the allocation was made from
+ int m_line; // line number within that file
+ UINT64 m_id; // unique id
+
+ static const int k_hash_prime = 6151;
+
+ static UINT64 s_curid; // current ID
+ static osd_lock * s_lock; // lock for managing the list
+ static bool s_lock_alloc; // set to true temporarily during lock allocation
+ static bool s_tracking; // set to true when tracking is live
static memory_entry *s_hash[k_hash_prime];// hash table based on pointer
- static memory_entry *s_freehead; // pointer to the head of the free list
+ static memory_entry *s_freehead; // pointer to the head of the free list
static memory_entry *allocate(size_t size, void *base, const char *file, int line);
static memory_entry *find(void *ptr);
@@ -255,10 +255,10 @@ void dump_unfreed_mem()
resource_pool::resource_pool(int hash_size)
: m_hash_size(hash_size),
- m_listlock(osd_lock_alloc()),
- m_hash(new resource_pool_item *[hash_size]),
- m_ordered_head(NULL),
- m_ordered_tail(NULL)
+ m_listlock(osd_lock_alloc()),
+ m_hash(new resource_pool_item *[hash_size]),
+ m_ordered_head(NULL),
+ m_ordered_tail(NULL)
{
memset(m_hash, 0, hash_size * sizeof(m_hash[0]));
}
diff --git a/src/emu/emualloc.h b/src/emu/emualloc.h
index 48f2897a1d5..781305a4713 100644
--- a/src/emu/emualloc.h
+++ b/src/emu/emualloc.h
@@ -51,7 +51,7 @@
//**************************************************************************
// set to 1 to track memory allocated by emualloc.h itself as well
-#define TRACK_SELF_MEMORY (0)
+#define TRACK_SELF_MEMORY (0)
@@ -67,18 +67,18 @@
#endif
// pool allocation helpers
-#define pool_alloc(_pool, _type) (_pool).add_object(new(__FILE__, __LINE__) _type)
-#define pool_alloc_clear(_pool, _type) (_pool).add_object(new(__FILE__, __LINE__, zeromem) _type)
-#define pool_alloc_array(_pool, _type, _num) (_pool).add_array(new(__FILE__, __LINE__) _type[_num], (_num))
-#define pool_alloc_array_clear(_pool, _type, _num) (_pool).add_array(new(__FILE__, __LINE__, zeromem) _type[_num], (_num))
-#define pool_free(_pool, v) (_pool).remove(v)
+#define pool_alloc(_pool, _type) (_pool).add_object(new(__FILE__, __LINE__) _type)
+#define pool_alloc_clear(_pool, _type) (_pool).add_object(new(__FILE__, __LINE__, zeromem) _type)
+#define pool_alloc_array(_pool, _type, _num) (_pool).add_array(new(__FILE__, __LINE__) _type[_num], (_num))
+#define pool_alloc_array_clear(_pool, _type, _num) (_pool).add_array(new(__FILE__, __LINE__, zeromem) _type[_num], (_num))
+#define pool_free(_pool, v) (_pool).remove(v)
// global allocation helpers
-#define global_alloc(_type) pool_alloc(global_resource_pool(), _type)
-#define global_alloc_clear(_type) pool_alloc_clear(global_resource_pool(), _type)
-#define global_alloc_array(_type, _num) pool_alloc_array(global_resource_pool(), _type, _num)
-#define global_alloc_array_clear(_type, _num) pool_alloc_array_clear(global_resource_pool(), _type, _num)
-#define global_free(v) pool_free(global_resource_pool(), v)
+#define global_alloc(_type) pool_alloc(global_resource_pool(), _type)
+#define global_alloc_clear(_type) pool_alloc_clear(global_resource_pool(), _type)
+#define global_alloc_array(_type, _num) pool_alloc_array(global_resource_pool(), _type, _num)
+#define global_alloc_array_clear(_type, _num) pool_alloc_array_clear(global_resource_pool(), _type, _num)
+#define global_free(v) pool_free(global_resource_pool(), v)
@@ -216,19 +216,19 @@ private:
public:
resource_pool_item(void *ptr, size_t size)
: m_next(NULL),
- m_ordered_next(NULL),
- m_ordered_prev(NULL),
- m_ptr(ptr),
- m_size(size),
- m_id(~(UINT64)0) { }
+ m_ordered_next(NULL),
+ m_ordered_prev(NULL),
+ m_ptr(ptr),
+ m_size(size),
+ m_id(~(UINT64)0) { }
virtual ~resource_pool_item() { }
- resource_pool_item * m_next;
- resource_pool_item * m_ordered_next;
- resource_pool_item * m_ordered_prev;
- void * m_ptr;
- size_t m_size;
- UINT64 m_id;
+ resource_pool_item * m_next;
+ resource_pool_item * m_ordered_next;
+ resource_pool_item * m_ordered_prev;
+ void * m_ptr;
+ size_t m_size;
+ UINT64 m_id;
};
@@ -243,11 +243,11 @@ private:
public:
resource_pool_object(_ObjectClass *object)
: resource_pool_item(reinterpret_cast<void *>(object), sizeof(_ObjectClass)),
- m_object(object) { }
+ m_object(object) { }
virtual ~resource_pool_object() { delete m_object; }
private:
- _ObjectClass * m_object;
+ _ObjectClass * m_object;
};
@@ -262,13 +262,13 @@ private:
public:
resource_pool_array(_ObjectClass *array, int count)
: resource_pool_item(reinterpret_cast<void *>(array), sizeof(_ObjectClass) * count),
- m_array(array),
- m_count(count) { }
+ m_array(array),
+ m_count(count) { }
virtual ~resource_pool_array() { delete[] m_array; }
private:
- _ObjectClass * m_array;
- int m_count;
+ _ObjectClass * m_array;
+ int m_count;
};
@@ -295,11 +295,11 @@ public:
template<class _ObjectClass> _ObjectClass *add_array(_ObjectClass* array, int count) { add(*EMUALLOC_SELF_NEW resource_pool_array<_ObjectClass>(array, count)); return array; }
private:
- int m_hash_size;
- osd_lock * m_listlock;
- resource_pool_item ** m_hash;
- resource_pool_item * m_ordered_head;
- resource_pool_item * m_ordered_tail;
+ int m_hash_size;
+ osd_lock * m_listlock;
+ resource_pool_item ** m_hash;
+ resource_pool_item * m_ordered_head;
+ resource_pool_item * m_ordered_tail;
};
@@ -327,10 +327,10 @@ resource_pool &global_resource_pool();
#undef realloc
#undef free
-#define malloc(x) malloc_array_file_line(x, __FILE__, __LINE__)
-#define calloc(x,y) __error_use_auto_alloc_clear_or_global_alloc_clear_instead__
-#define realloc(x,y) __error_realloc_is_dangerous__
-#define free(x) free_file_line(x, __FILE__, __LINE__)
+#define malloc(x) malloc_array_file_line(x, __FILE__, __LINE__)
+#define calloc(x,y) __error_use_auto_alloc_clear_or_global_alloc_clear_instead__
+#define realloc(x,y) __error_realloc_is_dangerous__
+#define free(x) free_file_line(x, __FILE__, __LINE__)
#endif
-#endif /* __EMUALLOC_H__ */
+#endif /* __EMUALLOC_H__ */
diff --git a/src/emu/emucore.h b/src/emu/emucore.h
index dbb312babeb..69ad52a8c23 100644
--- a/src/emu/emucore.h
+++ b/src/emu/emucore.h
@@ -85,15 +85,15 @@ class running_machine;
// generic_ptr is a union of pointers to various sizes
union generic_ptr
{
- void * v;
- INT8 * i8;
- UINT8 * u8;
- INT16 * i16;
- UINT16 * u16;
- INT32 * i32;
- UINT32 * u32;
- INT64 * i64;
- UINT64 * u64;
+ void * v;
+ INT8 * i8;
+ UINT8 * u8;
+ INT16 * i16;
+ UINT16 * u16;
+ INT32 * i32;
+ UINT32 * u32;
+ INT64 * i64;
+ UINT64 * u64;
};
@@ -163,19 +163,19 @@ const endianness_t ENDIANNESS_NATIVE = ENDIANNESS_BIG;
// M_PI is not part of the C/C++ standards and is not present on
// strict ANSI compilers or when compiling under GCC with -ansi
#ifndef M_PI
-#define M_PI 3.14159265358979323846
+#define M_PI 3.14159265358979323846
#endif
// orientation of bitmaps
-#define ORIENTATION_FLIP_X 0x0001 /* mirror everything in the X direction */
-#define ORIENTATION_FLIP_Y 0x0002 /* mirror everything in the Y direction */
-#define ORIENTATION_SWAP_XY 0x0004 /* mirror along the top-left/bottom-right diagonal */
+#define ORIENTATION_FLIP_X 0x0001 /* mirror everything in the X direction */
+#define ORIENTATION_FLIP_Y 0x0002 /* mirror everything in the Y direction */
+#define ORIENTATION_SWAP_XY 0x0004 /* mirror along the top-left/bottom-right diagonal */
-#define ROT0 0
-#define ROT90 (ORIENTATION_SWAP_XY | ORIENTATION_FLIP_X) /* rotate clockwise 90 degrees */
-#define ROT180 (ORIENTATION_FLIP_X | ORIENTATION_FLIP_Y) /* rotate 180 degrees */
-#define ROT270 (ORIENTATION_SWAP_XY | ORIENTATION_FLIP_Y) /* rotate counter-clockwise 90 degrees */
+#define ROT0 0
+#define ROT90 (ORIENTATION_SWAP_XY | ORIENTATION_FLIP_X) /* rotate clockwise 90 degrees */
+#define ROT180 (ORIENTATION_FLIP_X | ORIENTATION_FLIP_Y) /* rotate 180 degrees */
+#define ROT270 (ORIENTATION_SWAP_XY | ORIENTATION_FLIP_Y) /* rotate counter-clockwise 90 degrees */
@@ -211,19 +211,19 @@ inline void operator--(_Type &value, int) { value = (_Type)((int)value - 1); }
#undef assert_always
#ifdef MAME_DEBUG
-#define assert(x) do { if (!(x)) throw emu_fatalerror("assert: %s:%d: %s", __FILE__, __LINE__, #x); } while (0)
-#define assert_always(x, msg) do { if (!(x)) throw emu_fatalerror("Fatal error: %s\nCaused by assert: %s:%d: %s", msg, __FILE__, __LINE__, #x); } while (0)
+#define assert(x) do { if (!(x)) throw emu_fatalerror("assert: %s:%d: %s", __FILE__, __LINE__, #x); } while (0)
+#define assert_always(x, msg) do { if (!(x)) throw emu_fatalerror("Fatal error: %s\nCaused by assert: %s:%d: %s", msg, __FILE__, __LINE__, #x); } while (0)
#else
-#define assert(x) do { } while (0)
-#define assert_always(x, msg) do { if (!(x)) throw emu_fatalerror("Fatal error: %s (%s:%d)", msg, __FILE__, __LINE__); } while (0)
+#define assert(x) do { } while (0)
+#define assert_always(x, msg) do { if (!(x)) throw emu_fatalerror("Fatal error: %s (%s:%d)", msg, __FILE__, __LINE__); } while (0)
#endif
// map mame_* helpers to core_* helpers */
-#define mame_stricmp core_stricmp
-#define mame_strnicmp core_strnicmp
-#define mame_strdup core_strdup
-#define mame_strwildcmp core_strwildcmp
+#define mame_stricmp core_stricmp
+#define mame_strnicmp core_strnicmp
+#define mame_strdup core_strdup
+#define mame_strwildcmp core_strwildcmp
// macros to convert radians to degrees and degrees to radians
@@ -232,13 +232,13 @@ inline void operator--(_Type &value, int) { value = (_Type)((int)value - 1); }
// endian-based value: first value is if 'endian' is little-endian, second is if 'endian' is big-endian
-#define ENDIAN_VALUE_LE_BE(endian,leval,beval) (((endian) == ENDIANNESS_LITTLE) ? (leval) : (beval))
+#define ENDIAN_VALUE_LE_BE(endian,leval,beval) (((endian) == ENDIANNESS_LITTLE) ? (leval) : (beval))
// endian-based value: first value is if native endianness is little-endian, second is if native is big-endian
-#define NATIVE_ENDIAN_VALUE_LE_BE(leval,beval) ENDIAN_VALUE_LE_BE(ENDIANNESS_NATIVE, leval, beval)
+#define NATIVE_ENDIAN_VALUE_LE_BE(leval,beval) ENDIAN_VALUE_LE_BE(ENDIANNESS_NATIVE, leval, beval)
// endian-based value: first value is if 'endian' matches native, second is if 'endian' doesn't match native
-#define ENDIAN_VALUE_NE_NNE(endian,leval,beval) (((endian) == ENDIANNESS_NATIVE) ? (neval) : (nneval))
+#define ENDIAN_VALUE_NE_NNE(endian,leval,beval) (((endian) == ENDIANNESS_NATIVE) ? (neval) : (nneval))
// useful macros to deal with bit shuffling encryptions
@@ -246,31 +246,31 @@ inline void operator--(_Type &value, int) { value = (_Type)((int)value - 1); }
#define BITSWAP8(val,B7,B6,B5,B4,B3,B2,B1,B0) \
((BIT(val,B7) << 7) | (BIT(val,B6) << 6) | (BIT(val,B5) << 5) | (BIT(val,B4) << 4) | \
- (BIT(val,B3) << 3) | (BIT(val,B2) << 2) | (BIT(val,B1) << 1) | (BIT(val,B0) << 0))
+ (BIT(val,B3) << 3) | (BIT(val,B2) << 2) | (BIT(val,B1) << 1) | (BIT(val,B0) << 0))
#define BITSWAP16(val,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \
((BIT(val,B15) << 15) | (BIT(val,B14) << 14) | (BIT(val,B13) << 13) | (BIT(val,B12) << 12) | \
- (BIT(val,B11) << 11) | (BIT(val,B10) << 10) | (BIT(val, B9) << 9) | (BIT(val, B8) << 8) | \
- (BIT(val, B7) << 7) | (BIT(val, B6) << 6) | (BIT(val, B5) << 5) | (BIT(val, B4) << 4) | \
- (BIT(val, B3) << 3) | (BIT(val, B2) << 2) | (BIT(val, B1) << 1) | (BIT(val, B0) << 0))
+ (BIT(val,B11) << 11) | (BIT(val,B10) << 10) | (BIT(val, B9) << 9) | (BIT(val, B8) << 8) | \
+ (BIT(val, B7) << 7) | (BIT(val, B6) << 6) | (BIT(val, B5) << 5) | (BIT(val, B4) << 4) | \
+ (BIT(val, B3) << 3) | (BIT(val, B2) << 2) | (BIT(val, B1) << 1) | (BIT(val, B0) << 0))
#define BITSWAP24(val,B23,B22,B21,B20,B19,B18,B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \
((BIT(val,B23) << 23) | (BIT(val,B22) << 22) | (BIT(val,B21) << 21) | (BIT(val,B20) << 20) | \
- (BIT(val,B19) << 19) | (BIT(val,B18) << 18) | (BIT(val,B17) << 17) | (BIT(val,B16) << 16) | \
- (BIT(val,B15) << 15) | (BIT(val,B14) << 14) | (BIT(val,B13) << 13) | (BIT(val,B12) << 12) | \
- (BIT(val,B11) << 11) | (BIT(val,B10) << 10) | (BIT(val, B9) << 9) | (BIT(val, B8) << 8) | \
- (BIT(val, B7) << 7) | (BIT(val, B6) << 6) | (BIT(val, B5) << 5) | (BIT(val, B4) << 4) | \
- (BIT(val, B3) << 3) | (BIT(val, B2) << 2) | (BIT(val, B1) << 1) | (BIT(val, B0) << 0))
+ (BIT(val,B19) << 19) | (BIT(val,B18) << 18) | (BIT(val,B17) << 17) | (BIT(val,B16) << 16) | \
+ (BIT(val,B15) << 15) | (BIT(val,B14) << 14) | (BIT(val,B13) << 13) | (BIT(val,B12) << 12) | \
+ (BIT(val,B11) << 11) | (BIT(val,B10) << 10) | (BIT(val, B9) << 9) | (BIT(val, B8) << 8) | \
+ (BIT(val, B7) << 7) | (BIT(val, B6) << 6) | (BIT(val, B5) << 5) | (BIT(val, B4) << 4) | \
+ (BIT(val, B3) << 3) | (BIT(val, B2) << 2) | (BIT(val, B1) << 1) | (BIT(val, B0) << 0))
#define BITSWAP32(val,B31,B30,B29,B28,B27,B26,B25,B24,B23,B22,B21,B20,B19,B18,B17,B16,B15,B14,B13,B12,B11,B10,B9,B8,B7,B6,B5,B4,B3,B2,B1,B0) \
((BIT(val,B31) << 31) | (BIT(val,B30) << 30) | (BIT(val,B29) << 29) | (BIT(val,B28) << 28) | \
- (BIT(val,B27) << 27) | (BIT(val,B26) << 26) | (BIT(val,B25) << 25) | (BIT(val,B24) << 24) | \
- (BIT(val,B23) << 23) | (BIT(val,B22) << 22) | (BIT(val,B21) << 21) | (BIT(val,B20) << 20) | \
- (BIT(val,B19) << 19) | (BIT(val,B18) << 18) | (BIT(val,B17) << 17) | (BIT(val,B16) << 16) | \
- (BIT(val,B15) << 15) | (BIT(val,B14) << 14) | (BIT(val,B13) << 13) | (BIT(val,B12) << 12) | \
- (BIT(val,B11) << 11) | (BIT(val,B10) << 10) | (BIT(val, B9) << 9) | (BIT(val, B8) << 8) | \
- (BIT(val, B7) << 7) | (BIT(val, B6) << 6) | (BIT(val, B5) << 5) | (BIT(val, B4) << 4) | \
- (BIT(val, B3) << 3) | (BIT(val, B2) << 2) | (BIT(val, B1) << 1) | (BIT(val, B0) << 0))
+ (BIT(val,B27) << 27) | (BIT(val,B26) << 26) | (BIT(val,B25) << 25) | (BIT(val,B24) << 24) | \
+ (BIT(val,B23) << 23) | (BIT(val,B22) << 22) | (BIT(val,B21) << 21) | (BIT(val,B20) << 20) | \
+ (BIT(val,B19) << 19) | (BIT(val,B18) << 18) | (BIT(val,B17) << 17) | (BIT(val,B16) << 16) | \
+ (BIT(val,B15) << 15) | (BIT(val,B14) << 14) | (BIT(val,B13) << 13) | (BIT(val,B12) << 12) | \
+ (BIT(val,B11) << 11) | (BIT(val,B10) << 10) | (BIT(val, B9) << 9) | (BIT(val, B8) << 8) | \
+ (BIT(val, B7) << 7) | (BIT(val, B6) << 6) | (BIT(val, B5) << 5) | (BIT(val, B4) << 4) | \
+ (BIT(val, B3) << 3) | (BIT(val, B2) << 2) | (BIT(val, B1) << 1) | (BIT(val, B0) << 0))
@@ -499,4 +499,4 @@ inline UINT64 d2u(double d)
return u.vv;
}
-#endif /* __EMUCORE_H__ */
+#endif /* __EMUCORE_H__ */
diff --git a/src/emu/emuopts.c b/src/emu/emuopts.c
index 97114077ab2..0f1eb1a708b 100644
--- a/src/emu/emuopts.c
+++ b/src/emu/emuopts.c
@@ -194,7 +194,7 @@ const options_entry emu_options::s_option_entries[] =
{ OPTION_UI_FONT, "default", OPTION_STRING, "specify a font to use" },
{ OPTION_RAMSIZE ";ram", NULL, OPTION_STRING, "size of RAM (if supported by driver)" },
{ OPTION_CONFIRM_QUIT, "0", OPTION_BOOLEAN, "display confirm quit screen on exit" },
- { OPTION_UI_MOUSE, "0", OPTION_BOOLEAN, "display ui mouse cursor" },
+ { OPTION_UI_MOUSE, "0", OPTION_BOOLEAN, "display ui mouse cursor" },
{ NULL }
};
diff --git a/src/emu/emuopts.h b/src/emu/emuopts.h
index 8d6f30844ba..94e8a184db9 100644
--- a/src/emu/emuopts.h
+++ b/src/emu/emuopts.h
@@ -68,136 +68,136 @@ enum
};
// core options
-#define OPTION_SYSTEMNAME core_options::unadorned(0)
-#define OPTION_SOFTWARENAME core_options::unadorned(1)
+#define OPTION_SYSTEMNAME core_options::unadorned(0)
+#define OPTION_SOFTWARENAME core_options::unadorned(1)
// core configuration options
-#define OPTION_READCONFIG "readconfig"
-#define OPTION_WRITECONFIG "writeconfig"
+#define OPTION_READCONFIG "readconfig"
+#define OPTION_WRITECONFIG "writeconfig"
// core search path options
-#define OPTION_MEDIAPATH "rompath"
-#define OPTION_HASHPATH "hashpath"
-#define OPTION_SAMPLEPATH "samplepath"
-#define OPTION_ARTPATH "artpath"
-#define OPTION_CTRLRPATH "ctrlrpath"
-#define OPTION_INIPATH "inipath"
-#define OPTION_FONTPATH "fontpath"
-#define OPTION_CHEATPATH "cheatpath"
-#define OPTION_CROSSHAIRPATH "crosshairpath"
+#define OPTION_MEDIAPATH "rompath"
+#define OPTION_HASHPATH "hashpath"
+#define OPTION_SAMPLEPATH "samplepath"
+#define OPTION_ARTPATH "artpath"
+#define OPTION_CTRLRPATH "ctrlrpath"
+#define OPTION_INIPATH "inipath"
+#define OPTION_FONTPATH "fontpath"
+#define OPTION_CHEATPATH "cheatpath"
+#define OPTION_CROSSHAIRPATH "crosshairpath"
// core directory options
-#define OPTION_CFG_DIRECTORY "cfg_directory"
-#define OPTION_NVRAM_DIRECTORY "nvram_directory"
-#define OPTION_MEMCARD_DIRECTORY "memcard_directory"
-#define OPTION_INPUT_DIRECTORY "input_directory"
-#define OPTION_STATE_DIRECTORY "state_directory"
-#define OPTION_SNAPSHOT_DIRECTORY "snapshot_directory"
-#define OPTION_DIFF_DIRECTORY "diff_directory"
-#define OPTION_COMMENT_DIRECTORY "comment_directory"
+#define OPTION_CFG_DIRECTORY "cfg_directory"
+#define OPTION_NVRAM_DIRECTORY "nvram_directory"
+#define OPTION_MEMCARD_DIRECTORY "memcard_directory"
+#define OPTION_INPUT_DIRECTORY "input_directory"
+#define OPTION_STATE_DIRECTORY "state_directory"
+#define OPTION_SNAPSHOT_DIRECTORY "snapshot_directory"
+#define OPTION_DIFF_DIRECTORY "diff_directory"
+#define OPTION_COMMENT_DIRECTORY "comment_directory"
// core state/playback options
-#define OPTION_STATE "state"
-#define OPTION_AUTOSAVE "autosave"
-#define OPTION_PLAYBACK "playback"
-#define OPTION_RECORD "record"
-#define OPTION_MNGWRITE "mngwrite"
-#define OPTION_AVIWRITE "aviwrite"
-#define OPTION_WAVWRITE "wavwrite"
-#define OPTION_SNAPNAME "snapname"
-#define OPTION_SNAPSIZE "snapsize"
-#define OPTION_SNAPVIEW "snapview"
-#define OPTION_BURNIN "burnin"
+#define OPTION_STATE "state"
+#define OPTION_AUTOSAVE "autosave"
+#define OPTION_PLAYBACK "playback"
+#define OPTION_RECORD "record"
+#define OPTION_MNGWRITE "mngwrite"
+#define OPTION_AVIWRITE "aviwrite"
+#define OPTION_WAVWRITE "wavwrite"
+#define OPTION_SNAPNAME "snapname"
+#define OPTION_SNAPSIZE "snapsize"
+#define OPTION_SNAPVIEW "snapview"
+#define OPTION_BURNIN "burnin"
// core performance options
-#define OPTION_AUTOFRAMESKIP "autoframeskip"
-#define OPTION_FRAMESKIP "frameskip"
-#define OPTION_SECONDS_TO_RUN "seconds_to_run"
-#define OPTION_THROTTLE "throttle"
-#define OPTION_SLEEP "sleep"
-#define OPTION_SPEED "speed"
-#define OPTION_REFRESHSPEED "refreshspeed"
+#define OPTION_AUTOFRAMESKIP "autoframeskip"
+#define OPTION_FRAMESKIP "frameskip"
+#define OPTION_SECONDS_TO_RUN "seconds_to_run"
+#define OPTION_THROTTLE "throttle"
+#define OPTION_SLEEP "sleep"
+#define OPTION_SPEED "speed"
+#define OPTION_REFRESHSPEED "refreshspeed"
// core rotation options
-#define OPTION_ROTATE "rotate"
-#define OPTION_ROR "ror"
-#define OPTION_ROL "rol"
-#define OPTION_AUTOROR "autoror"
-#define OPTION_AUTOROL "autorol"
-#define OPTION_FLIPX "flipx"
-#define OPTION_FLIPY "flipy"
+#define OPTION_ROTATE "rotate"
+#define OPTION_ROR "ror"
+#define OPTION_ROL "rol"
+#define OPTION_AUTOROR "autoror"
+#define OPTION_AUTOROL "autorol"
+#define OPTION_FLIPX "flipx"
+#define OPTION_FLIPY "flipy"
// core artwork options
-#define OPTION_ARTWORK_CROP "artwork_crop"
-#define OPTION_USE_BACKDROPS "use_backdrops"
-#define OPTION_USE_OVERLAYS "use_overlays"
-#define OPTION_USE_BEZELS "use_bezels"
-#define OPTION_USE_CPANELS "use_cpanels"
-#define OPTION_USE_MARQUEES "use_marquees"
+#define OPTION_ARTWORK_CROP "artwork_crop"
+#define OPTION_USE_BACKDROPS "use_backdrops"
+#define OPTION_USE_OVERLAYS "use_overlays"
+#define OPTION_USE_BEZELS "use_bezels"
+#define OPTION_USE_CPANELS "use_cpanels"
+#define OPTION_USE_MARQUEES "use_marquees"
// core screen options
-#define OPTION_BRIGHTNESS "brightness"
-#define OPTION_CONTRAST "contrast"
-#define OPTION_GAMMA "gamma"
-#define OPTION_PAUSE_BRIGHTNESS "pause_brightness"
-#define OPTION_EFFECT "effect"
+#define OPTION_BRIGHTNESS "brightness"
+#define OPTION_CONTRAST "contrast"
+#define OPTION_GAMMA "gamma"
+#define OPTION_PAUSE_BRIGHTNESS "pause_brightness"
+#define OPTION_EFFECT "effect"
// core vector options
-#define OPTION_ANTIALIAS "antialias"
-#define OPTION_BEAM "beam"
-#define OPTION_FLICKER "flicker"
+#define OPTION_ANTIALIAS "antialias"
+#define OPTION_BEAM "beam"
+#define OPTION_FLICKER "flicker"
// core sound options
-#define OPTION_SOUND "sound"
-#define OPTION_SAMPLERATE "samplerate"
-#define OPTION_SAMPLES "samples"
-#define OPTION_VOLUME "volume"
+#define OPTION_SOUND "sound"
+#define OPTION_SAMPLERATE "samplerate"
+#define OPTION_SAMPLES "samples"
+#define OPTION_VOLUME "volume"
// core input options
-#define OPTION_COIN_LOCKOUT "coin_lockout"
-#define OPTION_CTRLR "ctrlr"
-#define OPTION_MOUSE "mouse"
-#define OPTION_JOYSTICK "joystick"
-#define OPTION_LIGHTGUN "lightgun"
-#define OPTION_MULTIKEYBOARD "multikeyboard"
-#define OPTION_MULTIMOUSE "multimouse"
-#define OPTION_STEADYKEY "steadykey"
-#define OPTION_UI_ACTIVE "ui_active"
-#define OPTION_OFFSCREEN_RELOAD "offscreen_reload"
-#define OPTION_JOYSTICK_MAP "joystick_map"
-#define OPTION_JOYSTICK_DEADZONE "joystick_deadzone"
-#define OPTION_JOYSTICK_SATURATION "joystick_saturation"
-#define OPTION_NATURAL_KEYBOARD "natural"
-#define OPTION_JOYSTICK_CONTRADICTORY "joystick_contradictory"
-#define OPTION_COIN_IMPULSE "coin_impulse"
+#define OPTION_COIN_LOCKOUT "coin_lockout"
+#define OPTION_CTRLR "ctrlr"
+#define OPTION_MOUSE "mouse"
+#define OPTION_JOYSTICK "joystick"
+#define OPTION_LIGHTGUN "lightgun"
+#define OPTION_MULTIKEYBOARD "multikeyboard"
+#define OPTION_MULTIMOUSE "multimouse"
+#define OPTION_STEADYKEY "steadykey"
+#define OPTION_UI_ACTIVE "ui_active"
+#define OPTION_OFFSCREEN_RELOAD "offscreen_reload"
+#define OPTION_JOYSTICK_MAP "joystick_map"
+#define OPTION_JOYSTICK_DEADZONE "joystick_deadzone"
+#define OPTION_JOYSTICK_SATURATION "joystick_saturation"
+#define OPTION_NATURAL_KEYBOARD "natural"
+#define OPTION_JOYSTICK_CONTRADICTORY "joystick_contradictory"
+#define OPTION_COIN_IMPULSE "coin_impulse"
// input autoenable options
-#define OPTION_PADDLE_DEVICE "paddle_device"
-#define OPTION_ADSTICK_DEVICE "adstick_device"
-#define OPTION_PEDAL_DEVICE "pedal_device"
-#define OPTION_DIAL_DEVICE "dial_device"
-#define OPTION_TRACKBALL_DEVICE "trackball_device"
-#define OPTION_LIGHTGUN_DEVICE "lightgun_device"
-#define OPTION_POSITIONAL_DEVICE "positional_device"
-#define OPTION_MOUSE_DEVICE "mouse_device"
+#define OPTION_PADDLE_DEVICE "paddle_device"
+#define OPTION_ADSTICK_DEVICE "adstick_device"
+#define OPTION_PEDAL_DEVICE "pedal_device"
+#define OPTION_DIAL_DEVICE "dial_device"
+#define OPTION_TRACKBALL_DEVICE "trackball_device"
+#define OPTION_LIGHTGUN_DEVICE "lightgun_device"
+#define OPTION_POSITIONAL_DEVICE "positional_device"
+#define OPTION_MOUSE_DEVICE "mouse_device"
// core debugging options
-#define OPTION_LOG "log"
-#define OPTION_VERBOSE "verbose"
-#define OPTION_UPDATEINPAUSE "update_in_pause"
-#define OPTION_DEBUG "debug"
-#define OPTION_DEBUG_INTERNAL "debug_internal"
-#define OPTION_DEBUGSCRIPT "debugscript"
+#define OPTION_LOG "log"
+#define OPTION_VERBOSE "verbose"
+#define OPTION_UPDATEINPAUSE "update_in_pause"
+#define OPTION_DEBUG "debug"
+#define OPTION_DEBUG_INTERNAL "debug_internal"
+#define OPTION_DEBUGSCRIPT "debugscript"
// core misc options
-#define OPTION_BIOS "bios"
-#define OPTION_CHEAT "cheat"
-#define OPTION_SKIP_GAMEINFO "skip_gameinfo"
-#define OPTION_UI_FONT "uifont"
-#define OPTION_RAMSIZE "ramsize"
+#define OPTION_BIOS "bios"
+#define OPTION_CHEAT "cheat"
+#define OPTION_SKIP_GAMEINFO "skip_gameinfo"
+#define OPTION_UI_FONT "uifont"
+#define OPTION_RAMSIZE "ramsize"
-#define OPTION_CONFIRM_QUIT "confirm_quit"
-#define OPTION_UI_MOUSE "ui_mouse"
+#define OPTION_CONFIRM_QUIT "confirm_quit"
+#define OPTION_UI_MOUSE "ui_mouse"
//**************************************************************************
@@ -373,4 +373,4 @@ private:
};
-#endif /* __EMUOPTS_H__ */
+#endif /* __EMUOPTS_H__ */
diff --git a/src/emu/emupal.c b/src/emu/emupal.c
index 8bf85386e7a..004d5092bec 100644
--- a/src/emu/emupal.c
+++ b/src/emu/emupal.c
@@ -18,9 +18,9 @@
CONSTANTS
***************************************************************************/
-#define PEN_BRIGHTNESS_BITS 8
-#define MAX_PEN_BRIGHTNESS (4 << PEN_BRIGHTNESS_BITS)
-#define MAX_SHADOW_PRESETS 4
+#define PEN_BRIGHTNESS_BITS 8
+#define MAX_PEN_BRIGHTNESS (4 << PEN_BRIGHTNESS_BITS)
+#define MAX_SHADOW_PRESETS 4
@@ -31,28 +31,28 @@
/* information about a shadow table */
struct shadow_table_data
{
- UINT32 * base; /* pointer to the base of the table */
- INT16 dr; /* delta red value */
- INT16 dg; /* delta green value */
- INT16 db; /* delta blue value */
- UINT8 noclip; /* clip? */
+ UINT32 * base; /* pointer to the base of the table */
+ INT16 dr; /* delta red value */
+ INT16 dg; /* delta green value */
+ INT16 db; /* delta blue value */
+ UINT8 noclip; /* clip? */
};
struct palette_private
{
- bitmap_format format; /* format assumed for palette data */
+ bitmap_format format; /* format assumed for palette data */
- UINT32 shadow_group; /* index of the shadow group, or 0 if none */
- UINT32 hilight_group; /* index of the hilight group, or 0 if none */
+ UINT32 shadow_group; /* index of the shadow group, or 0 if none */
+ UINT32 hilight_group; /* index of the hilight group, or 0 if none */
- pen_t black_pen; /* precomputed black pen value */
- pen_t white_pen; /* precomputed white pen value */
+ pen_t black_pen; /* precomputed black pen value */
+ pen_t white_pen; /* precomputed white pen value */
- shadow_table_data shadow_table[MAX_SHADOW_PRESETS]; /* array of shadow table data */
+ shadow_table_data shadow_table[MAX_SHADOW_PRESETS]; /* array of shadow table data */
- pen_t * save_pen; /* pens for save/restore */
- float * save_bright; /* brightness for save/restore */
+ pen_t * save_pen; /* pens for save/restore */
+ float * save_bright; /* brightness for save/restore */
};
@@ -64,13 +64,13 @@ public:
running_machine &machine() const { return m_machine; }
- UINT32 entries; /* number of entries */
- UINT32 palentries; /* number of palette entries */
- UINT16 * raw; /* raw data about each entry */
- rgb_t * palette; /* palette entries */
+ UINT32 entries; /* number of entries */
+ UINT32 palentries; /* number of palette entries */
+ UINT16 * raw; /* raw data about each entry */
+ rgb_t * palette; /* palette entries */
private:
- running_machine & m_machine; /* associated machine */
+ running_machine & m_machine; /* associated machine */
};
diff --git a/src/emu/emupal.h b/src/emu/emupal.h
index 27377f57dac..5b22b005d33 100644
--- a/src/emu/emupal.h
+++ b/src/emu/emupal.h
@@ -247,4 +247,4 @@ INLINE void palette_set_colors(running_machine &machine, pen_t color_base, const
}
-#endif /* __PALETTE_H__ */
+#endif /* __PALETTE_H__ */
diff --git a/src/emu/emutempl.h b/src/emu/emutempl.h
index 5d21b46194c..da963ada56a 100644
--- a/src/emu/emutempl.h
+++ b/src/emu/emutempl.h
@@ -61,9 +61,9 @@ public:
// construction/destruction
simple_list(resource_pool &pool = global_resource_pool())
: m_head(NULL),
- m_tail(NULL),
- m_pool(pool),
- m_count(0) { }
+ m_tail(NULL),
+ m_pool(pool),
+ m_count(0) { }
virtual ~simple_list() { reset(); }
@@ -258,10 +258,10 @@ public:
private:
// internal state
- _ElementType * m_head; // head of the singly-linked list
- _ElementType * m_tail; // tail of the singly-linked list
- resource_pool & m_pool; // resource pool where objects are freed
- int m_count; // number of objects in the list
+ _ElementType * m_head; // head of the singly-linked list
+ _ElementType * m_tail; // tail of the singly-linked list
+ resource_pool & m_pool; // resource pool where objects are freed
+ int m_count; // number of objects in the list
};
@@ -279,7 +279,7 @@ public:
// construction/destruction
simple_list_wrapper(_ObjectType *object)
: m_next(NULL),
- m_object(object) { }
+ m_object(object) { }
// operators
operator _ObjectType *() { return m_object; }
@@ -293,8 +293,8 @@ public:
private:
// internal state
- simple_list_wrapper * m_next;
- _ObjectType * m_object;
+ simple_list_wrapper * m_next;
+ _ObjectType * m_object;
};
@@ -330,7 +330,7 @@ public:
private:
// internal state
- simple_list<_ItemType> m_freelist; // list of free objects
+ simple_list<_ItemType> m_freelist; // list of free objects
};
@@ -425,9 +425,9 @@ public:
private:
// internal state
- simple_list<_ElementType> m_list;
- tagmap_t<_ElementType *> m_map;
+ simple_list<_ElementType> m_list;
+ tagmap_t<_ElementType *> m_map;
};
-#endif /* __EMUTEMPL_H__ */
+#endif /* __EMUTEMPL_H__ */
diff --git a/src/emu/fileio.c b/src/emu/fileio.c
index ab0b361f560..d2f55fabec8 100644
--- a/src/emu/fileio.c
+++ b/src/emu/fileio.c
@@ -46,7 +46,7 @@
#include "fileio.h"
-const UINT32 OPEN_FLAG_HAS_CRC = 0x10000;
+const UINT32 OPEN_FLAG_HAS_CRC = 0x10000;
@@ -60,8 +60,8 @@ const UINT32 OPEN_FLAG_HAS_CRC = 0x10000;
path_iterator::path_iterator(const char *rawsearchpath)
: m_base(rawsearchpath),
- m_current(m_base),
- m_index(0)
+ m_current(m_base),
+ m_index(0)
{
}
@@ -110,8 +110,8 @@ bool path_iterator::next(astring &buffer, const char *name)
file_enumerator::file_enumerator(const char *searchpath)
: m_iterator(searchpath),
- m_curdir(NULL),
- m_buflen(0)
+ m_curdir(NULL),
+ m_buflen(0)
{
}
@@ -172,16 +172,16 @@ const osd_directory_entry *file_enumerator::next()
emu_file::emu_file(UINT32 openflags)
: m_file(NULL),
- m_iterator(""),
- m_crc(0),
- m_openflags(openflags),
- m_zipfile(NULL),
- m_zipdata(NULL),
- m_ziplength(0),
- m__7zfile(NULL),
- m__7zdata(NULL),
- m__7zlength(0),
- m_remove_on_close(false)
+ m_iterator(""),
+ m_crc(0),
+ m_openflags(openflags),
+ m_zipfile(NULL),
+ m_zipdata(NULL),
+ m_ziplength(0),
+ m__7zfile(NULL),
+ m__7zdata(NULL),
+ m__7zlength(0),
+ m_remove_on_close(false)
{
// sanity check the open flags
if ((m_openflags & OPEN_FLAG_HAS_CRC) && (m_openflags & OPEN_FLAG_WRITE))
@@ -190,16 +190,16 @@ emu_file::emu_file(UINT32 openflags)
emu_file::emu_file(const char *searchpath, UINT32 openflags)
: m_file(NULL),
- m_iterator(searchpath),
- m_crc(0),
- m_openflags(openflags),
- m_zipfile(NULL),
- m_zipdata(NULL),
- m_ziplength(0),
- m__7zfile(NULL),
- m__7zdata(NULL),
- m__7zlength(0),
- m_remove_on_close(false)
+ m_iterator(searchpath),
+ m_crc(0),
+ m_openflags(openflags),
+ m_zipfile(NULL),
+ m_zipdata(NULL),
+ m_ziplength(0),
+ m__7zfile(NULL),
+ m__7zdata(NULL),
+ m__7zlength(0),
+ m_remove_on_close(false)
{
// sanity check the open flags
if ((m_openflags & OPEN_FLAG_HAS_CRC) && (m_openflags & OPEN_FLAG_WRITE))
diff --git a/src/emu/fileio.h b/src/emu/fileio.h
index 96dc84162bd..42e3a134f95 100644
--- a/src/emu/fileio.h
+++ b/src/emu/fileio.h
@@ -78,9 +78,9 @@ public:
private:
// internal state
- const char * m_base;
- const char * m_current;
- int m_index;
+ const char * m_base;
+ const char * m_current;
+ int m_index;
};
@@ -100,10 +100,10 @@ public:
private:
// internal state
- path_iterator m_iterator;
- osd_directory * m_curdir;
- astring m_pathbuffer;
- int m_buflen;
+ path_iterator m_iterator;
+ osd_directory * m_curdir;
+ astring m_pathbuffer;
+ int m_buflen;
};
@@ -176,24 +176,24 @@ private:
file_error load__7zped_file();
// internal state
- astring m_filename; // original filename provided
- astring m_fullpath; // full filename
- core_file * m_file; // core file pointer
- path_iterator m_iterator; // iterator for paths
- UINT32 m_crc; // iterator for paths
- UINT32 m_openflags; // flags we used for the open
- hash_collection m_hashes; // collection of hashes
-
- zip_file * m_zipfile; // ZIP file pointer
- UINT8 * m_zipdata; // ZIP file data
- UINT64 m_ziplength; // ZIP file length
-
- _7z_file * m__7zfile; // 7Z file pointer
- UINT8 * m__7zdata; // 7Z file data
- UINT64 m__7zlength; // 7Z file length
-
- bool m_remove_on_close; // flag: remove the file when closing
+ astring m_filename; // original filename provided
+ astring m_fullpath; // full filename
+ core_file * m_file; // core file pointer
+ path_iterator m_iterator; // iterator for paths
+ UINT32 m_crc; // iterator for paths
+ UINT32 m_openflags; // flags we used for the open
+ hash_collection m_hashes; // collection of hashes
+
+ zip_file * m_zipfile; // ZIP file pointer
+ UINT8 * m_zipdata; // ZIP file data
+ UINT64 m_ziplength; // ZIP file length
+
+ _7z_file * m__7zfile; // 7Z file pointer
+ UINT8 * m__7zdata; // 7Z file data
+ UINT64 m__7zlength; // 7Z file length
+
+ bool m_remove_on_close; // flag: remove the file when closing
};
-#endif /* __FILEIO_H__ */
+#endif /* __FILEIO_H__ */
diff --git a/src/emu/gamedrv.h b/src/emu/gamedrv.h
index c38d9e07181..6c9cc1ec8cc 100644
--- a/src/emu/gamedrv.h
+++ b/src/emu/gamedrv.h
@@ -51,32 +51,32 @@
const int MAX_DRIVER_NAME_CHARS = 8;
// flags for game drivers
-const UINT32 ORIENTATION_MASK = 0x00000007;
-const UINT32 GAME_NOT_WORKING = 0x00000008;
-const UINT32 GAME_UNEMULATED_PROTECTION = 0x00000010; // game's protection not fully emulated
-const UINT32 GAME_WRONG_COLORS = 0x00000020; // colors are totally wrong
-const UINT32 GAME_IMPERFECT_COLORS = 0x00000040; // colors are not 100% accurate, but close
-const UINT32 GAME_IMPERFECT_GRAPHICS = 0x00000080; // graphics are wrong/incomplete
-const UINT32 GAME_NO_COCKTAIL = 0x00000100; // screen flip support is missing
-const UINT32 GAME_NO_SOUND = 0x00000200; // sound is missing
-const UINT32 GAME_IMPERFECT_SOUND = 0x00000400; // sound is known to be wrong
-const UINT32 GAME_SUPPORTS_SAVE = 0x00000800; // game supports save states
-const UINT32 GAME_IS_BIOS_ROOT = 0x00001000; // this driver entry is a BIOS root
-const UINT32 GAME_NO_STANDALONE = 0x00002000; // this driver cannot stand alone
-const UINT32 GAME_REQUIRES_ARTWORK = 0x00004000; // the driver requires external artwork for key elements of the game
-const UINT32 GAME_UNOFFICIAL = 0x00008000; // unofficial hardware change
-const UINT32 GAME_NO_SOUND_HW = 0x00010000; // sound hardware not available
-const UINT32 GAME_MECHANICAL = 0x00020000; // contains mechanical parts (pinball, redemption games,...)
-const UINT32 GAME_TYPE_ARCADE = 0x00040000; // arcade machine (coin operated machines)
-const UINT32 GAME_TYPE_CONSOLE = 0x00080000; // console system
-const UINT32 GAME_TYPE_COMPUTER = 0x00100000; // any kind of computer including home computers, minis, calcs,...
-const UINT32 GAME_TYPE_OTHER = 0x00200000; // any other emulated system that doesn't fit above (ex. clock, satelite receiver,...)
-const UINT32 GAME_IMPERFECT_KEYBOARD = 0x00400000; // keyboard is known to be wrong
-const UINT32 GAME_CLICKABLE_ARTWORK = 0x00800000; // marking that artwork is clickable and require mouse cursor
+const UINT32 ORIENTATION_MASK = 0x00000007;
+const UINT32 GAME_NOT_WORKING = 0x00000008;
+const UINT32 GAME_UNEMULATED_PROTECTION = 0x00000010; // game's protection not fully emulated
+const UINT32 GAME_WRONG_COLORS = 0x00000020; // colors are totally wrong
+const UINT32 GAME_IMPERFECT_COLORS = 0x00000040; // colors are not 100% accurate, but close
+const UINT32 GAME_IMPERFECT_GRAPHICS = 0x00000080; // graphics are wrong/incomplete
+const UINT32 GAME_NO_COCKTAIL = 0x00000100; // screen flip support is missing
+const UINT32 GAME_NO_SOUND = 0x00000200; // sound is missing
+const UINT32 GAME_IMPERFECT_SOUND = 0x00000400; // sound is known to be wrong
+const UINT32 GAME_SUPPORTS_SAVE = 0x00000800; // game supports save states
+const UINT32 GAME_IS_BIOS_ROOT = 0x00001000; // this driver entry is a BIOS root
+const UINT32 GAME_NO_STANDALONE = 0x00002000; // this driver cannot stand alone
+const UINT32 GAME_REQUIRES_ARTWORK = 0x00004000; // the driver requires external artwork for key elements of the game
+const UINT32 GAME_UNOFFICIAL = 0x00008000; // unofficial hardware change
+const UINT32 GAME_NO_SOUND_HW = 0x00010000; // sound hardware not available
+const UINT32 GAME_MECHANICAL = 0x00020000; // contains mechanical parts (pinball, redemption games,...)
+const UINT32 GAME_TYPE_ARCADE = 0x00040000; // arcade machine (coin operated machines)
+const UINT32 GAME_TYPE_CONSOLE = 0x00080000; // console system
+const UINT32 GAME_TYPE_COMPUTER = 0x00100000; // any kind of computer including home computers, minis, calcs,...
+const UINT32 GAME_TYPE_OTHER = 0x00200000; // any other emulated system that doesn't fit above (ex. clock, satelite receiver,...)
+const UINT32 GAME_IMPERFECT_KEYBOARD = 0x00400000; // keyboard is known to be wrong
+const UINT32 GAME_CLICKABLE_ARTWORK = 0x00800000; // marking that artwork is clickable and require mouse cursor
// useful combinations of flags
-const UINT32 GAME_IS_SKELETON = GAME_NO_SOUND | GAME_NOT_WORKING; // mask for skelly games
-const UINT32 GAME_IS_SKELETON_MECHANICAL = GAME_IS_SKELETON | GAME_MECHANICAL | GAME_REQUIRES_ARTWORK; // mask for skelly mechanical games
+const UINT32 GAME_IS_SKELETON = GAME_NO_SOUND | GAME_NOT_WORKING; // mask for skelly games
+const UINT32 GAME_IS_SKELETON_MECHANICAL = GAME_IS_SKELETON | GAME_MECHANICAL | GAME_REQUIRES_ARTWORK; // mask for skelly mechanical games
@@ -90,19 +90,19 @@ typedef void (*driver_init_func)(running_machine &machine);
// static POD structure describing each game driver entry
struct game_driver
{
- const char * source_file; // set this to __FILE__
- const char * parent; // if this is a clone, the name of the parent
- const char * name; // short (8-character) name of the game
- const char * description; // full name of the game
- const char * year; // year the game was released
- const char * manufacturer; // manufacturer of the game
- machine_config_constructor machine_config; // machine driver tokens
- ioport_constructor ipt; // pointer to constructor for input ports
- void (*driver_init)(running_machine &machine); // DRIVER_INIT callback
- const rom_entry * rom; // pointer to list of ROMs for the game
- const char * compatible_with;
- UINT32 flags; // orientation and other flags; see defines below
- const char * default_layout; // default internally defined layout
+ const char * source_file; // set this to __FILE__
+ const char * parent; // if this is a clone, the name of the parent
+ const char * name; // short (8-character) name of the game
+ const char * description; // full name of the game
+ const char * year; // year the game was released
+ const char * manufacturer; // manufacturer of the game
+ machine_config_constructor machine_config; // machine driver tokens
+ ioport_constructor ipt; // pointer to constructor for input ports
+ void (*driver_init)(running_machine &machine); // DRIVER_INIT callback
+ const rom_entry * rom; // pointer to list of ROMs for the game
+ const char * compatible_with;
+ UINT32 flags; // orientation and other flags; see defines below
+ const char * default_layout; // default internally defined layout
};
@@ -112,93 +112,93 @@ struct game_driver
//**************************************************************************
// wrappers for the DRIVER_INIT callback
-#define DRIVER_INIT_NAME(name) init_##name
-#define DECLARE_DRIVER_INIT(name) void DRIVER_INIT_NAME(name)()
+#define DRIVER_INIT_NAME(name) init_##name
+#define DECLARE_DRIVER_INIT(name) void DRIVER_INIT_NAME(name)()
#define DRIVER_INIT_MEMBER(cls,name) void cls::DRIVER_INIT_NAME(name)()
-#define DRIVER_INIT_CALL(name) DRIVER_INIT_NAME(name)()
+#define DRIVER_INIT_CALL(name) DRIVER_INIT_NAME(name)()
// wrappers for declaring and defining game drivers
#define GAME_NAME(name) driver_##name
#define GAME_EXTERN(name) extern const game_driver GAME_NAME(name)
// standard GAME() macro
-#define GAME(YEAR,NAME,PARENT,MACHINE,INPUT,CLASS,INIT,MONITOR,COMPANY,FULLNAME,FLAGS) \
+#define GAME(YEAR,NAME,PARENT,MACHINE,INPUT,CLASS,INIT,MONITOR,COMPANY,FULLNAME,FLAGS) \
GAMEL(YEAR,NAME,PARENT,MACHINE,INPUT,CLASS,INIT,MONITOR,COMPANY,FULLNAME,FLAGS,((const char *)0))
// standard macro with additional layout
-#define GAMEL(YEAR,NAME,PARENT,MACHINE,INPUT,CLASS,INIT,MONITOR,COMPANY,FULLNAME,FLAGS,LAYOUT) \
-extern const game_driver GAME_NAME(NAME) = \
-{ \
- __FILE__, \
- #PARENT, \
- #NAME, \
- FULLNAME, \
- #YEAR, \
- COMPANY, \
- MACHINE_CONFIG_NAME(MACHINE), \
- INPUT_PORTS_NAME(INPUT), \
- &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
- ROM_NAME(NAME), \
- NULL, \
- (MONITOR)|(FLAGS)|GAME_TYPE_ARCADE, \
- &LAYOUT[0] \
+#define GAMEL(YEAR,NAME,PARENT,MACHINE,INPUT,CLASS,INIT,MONITOR,COMPANY,FULLNAME,FLAGS,LAYOUT) \
+extern const game_driver GAME_NAME(NAME) = \
+{ \
+ __FILE__, \
+ #PARENT, \
+ #NAME, \
+ FULLNAME, \
+ #YEAR, \
+ COMPANY, \
+ MACHINE_CONFIG_NAME(MACHINE), \
+ INPUT_PORTS_NAME(INPUT), \
+ &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
+ ROM_NAME(NAME), \
+ NULL, \
+ (MONITOR)|(FLAGS)|GAME_TYPE_ARCADE, \
+ &LAYOUT[0] \
};
// standard console definition macro
-#define CONS(YEAR,NAME,PARENT,COMPAT,MACHINE,INPUT,CLASS,INIT,COMPANY,FULLNAME,FLAGS) \
-extern const game_driver GAME_NAME(NAME) = \
-{ \
- __FILE__, \
- #PARENT, \
- #NAME, \
- FULLNAME, \
- #YEAR, \
- COMPANY, \
- MACHINE_CONFIG_NAME(MACHINE), \
- INPUT_PORTS_NAME(INPUT), \
- &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
- ROM_NAME(NAME), \
- #COMPAT, \
- ROT0|(FLAGS)|GAME_TYPE_CONSOLE, \
- NULL \
+#define CONS(YEAR,NAME,PARENT,COMPAT,MACHINE,INPUT,CLASS,INIT,COMPANY,FULLNAME,FLAGS) \
+extern const game_driver GAME_NAME(NAME) = \
+{ \
+ __FILE__, \
+ #PARENT, \
+ #NAME, \
+ FULLNAME, \
+ #YEAR, \
+ COMPANY, \
+ MACHINE_CONFIG_NAME(MACHINE), \
+ INPUT_PORTS_NAME(INPUT), \
+ &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
+ ROM_NAME(NAME), \
+ #COMPAT, \
+ ROT0|(FLAGS)|GAME_TYPE_CONSOLE, \
+ NULL \
};
// standard computer definition macro
-#define COMP(YEAR,NAME,PARENT,COMPAT,MACHINE,INPUT,CLASS,INIT,COMPANY,FULLNAME,FLAGS) \
-extern const game_driver GAME_NAME(NAME) = \
-{ \
- __FILE__, \
- #PARENT, \
- #NAME, \
- FULLNAME, \
- #YEAR, \
- COMPANY, \
- MACHINE_CONFIG_NAME(MACHINE), \
- INPUT_PORTS_NAME(INPUT), \
- &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
- ROM_NAME(NAME), \
- #COMPAT, \
- ROT0|(FLAGS)|GAME_TYPE_COMPUTER, \
- NULL \
+#define COMP(YEAR,NAME,PARENT,COMPAT,MACHINE,INPUT,CLASS,INIT,COMPANY,FULLNAME,FLAGS) \
+extern const game_driver GAME_NAME(NAME) = \
+{ \
+ __FILE__, \
+ #PARENT, \
+ #NAME, \
+ FULLNAME, \
+ #YEAR, \
+ COMPANY, \
+ MACHINE_CONFIG_NAME(MACHINE), \
+ INPUT_PORTS_NAME(INPUT), \
+ &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
+ ROM_NAME(NAME), \
+ #COMPAT, \
+ ROT0|(FLAGS)|GAME_TYPE_COMPUTER, \
+ NULL \
};
// standard system definition macro
-#define SYST(YEAR,NAME,PARENT,COMPAT,MACHINE,INPUT,CLASS,INIT,COMPANY,FULLNAME,FLAGS) \
-extern const game_driver GAME_NAME(NAME) = \
-{ \
- __FILE__, \
- #PARENT, \
- #NAME, \
- FULLNAME, \
- #YEAR, \
- COMPANY, \
- MACHINE_CONFIG_NAME(MACHINE), \
- INPUT_PORTS_NAME(INPUT), \
- &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
- ROM_NAME(NAME), \
- #COMPAT, \
- ROT0|(FLAGS)|GAME_TYPE_OTHER, \
- NULL \
+#define SYST(YEAR,NAME,PARENT,COMPAT,MACHINE,INPUT,CLASS,INIT,COMPANY,FULLNAME,FLAGS) \
+extern const game_driver GAME_NAME(NAME) = \
+{ \
+ __FILE__, \
+ #PARENT, \
+ #NAME, \
+ FULLNAME, \
+ #YEAR, \
+ COMPANY, \
+ MACHINE_CONFIG_NAME(MACHINE), \
+ INPUT_PORTS_NAME(INPUT), \
+ &driver_device::driver_init_wrapper<CLASS, &CLASS::init_##INIT>, \
+ ROM_NAME(NAME), \
+ #COMPAT, \
+ ROT0|(FLAGS)|GAME_TYPE_OTHER, \
+ NULL \
};
diff --git a/src/emu/hash.c b/src/emu/hash.c
index 76053a4d939..5cc9067a951 100644
--- a/src/emu/hash.c
+++ b/src/emu/hash.c
@@ -64,16 +64,16 @@ const char *hash_collection::HASH_TYPES_ALL = "RS";
hash_collection::hash_collection()
: m_has_crc32(false),
- m_has_sha1(false),
- m_creator(NULL)
+ m_has_sha1(false),
+ m_creator(NULL)
{
}
hash_collection::hash_collection(const char *string)
: m_has_crc32(false),
- m_has_sha1(false),
- m_creator(NULL)
+ m_has_sha1(false),
+ m_creator(NULL)
{
from_internal_string(string);
}
@@ -81,8 +81,8 @@ hash_collection::hash_collection(const char *string)
hash_collection::hash_collection(const hash_collection &src)
: m_has_crc32(false),
- m_has_sha1(false),
- m_creator(NULL)
+ m_has_sha1(false),
+ m_creator(NULL)
{
copyfrom(src);
}
diff --git a/src/emu/hash.h b/src/emu/hash.h
index e12aa4ce974..81e87d1f701 100644
--- a/src/emu/hash.h
+++ b/src/emu/hash.h
@@ -52,10 +52,10 @@
//**************************************************************************
// use these to define compile-time internal-format hash strings
-#define CRC(x) "R" #x
-#define SHA1(x) "S" #x
-#define NO_DUMP "!"
-#define BAD_DUMP "^"
+#define CRC(x) "R" #x
+#define SHA1(x) "S" #x
+#define NO_DUMP "!"
+#define BAD_DUMP "^"
@@ -84,19 +84,19 @@ public:
static const char FLAG_BAD_DUMP = '^';
// construction/destruction
- hash_collection();
- hash_collection(const char *string);
- hash_collection(const hash_collection &src);
- ~hash_collection();
+ hash_collection();
+ hash_collection(const char *string);
+ hash_collection(const hash_collection &src);
+ ~hash_collection();
- // operators
- hash_collection &operator=(const hash_collection &src);
- bool operator==(const hash_collection &rhs) const;
- bool operator!=(const hash_collection &rhs) const { return !(*this == rhs); }
+ // operators
+ hash_collection &operator=(const hash_collection &src);
+ bool operator==(const hash_collection &rhs) const;
+ bool operator!=(const hash_collection &rhs) const { return !(*this == rhs); }
// getters
- bool flag(char flag) const { return (m_flags.chr(0, flag) != -1); }
- const char *hash_types(astring &buffer) const;
+ bool flag(char flag) const { return (m_flags.chr(0, flag) != -1); }
+ const char *hash_types(astring &buffer) const;
// hash manipulators
void reset();
@@ -112,38 +112,38 @@ public:
void add_sha1(sha1_t sha1) { m_has_sha1 = true; m_sha1 = sha1; }
// string conversion
- const char *internal_string(astring &buffer) const;
- const char *macro_string(astring &buffer) const;
- const char *attribute_string(astring &buffer) const;
- bool from_internal_string(const char *string);
+ const char *internal_string(astring &buffer) const;
+ const char *macro_string(astring &buffer) const;
+ const char *attribute_string(astring &buffer) const;
+ bool from_internal_string(const char *string);
// creation
- void begin(const char *types = NULL);
- void buffer(const UINT8 *data, UINT32 length);
- void end();
- void compute(const UINT8 *data, UINT32 length, const char *types = NULL) { begin(types); buffer(data, length); end(); }
+ void begin(const char *types = NULL);
+ void buffer(const UINT8 *data, UINT32 length);
+ void end();
+ void compute(const UINT8 *data, UINT32 length, const char *types = NULL) { begin(types); buffer(data, length); end(); }
private:
// internal helpers
- void copyfrom(const hash_collection &src);
+ void copyfrom(const hash_collection &src);
// internal state
- astring m_flags;
- bool m_has_crc32;
- crc32_t m_crc32;
- bool m_has_sha1;
- sha1_t m_sha1;
+ astring m_flags;
+ bool m_has_crc32;
+ crc32_t m_crc32;
+ bool m_has_sha1;
+ sha1_t m_sha1;
// creators
struct hash_creator
{
- bool m_doing_crc32;
- crc32_creator m_crc32_creator;
- bool m_doing_sha1;
- sha1_creator m_sha1_creator;
+ bool m_doing_crc32;
+ crc32_creator m_crc32_creator;
+ bool m_doing_sha1;
+ sha1_creator m_sha1_creator;
};
- hash_creator * m_creator;
+ hash_creator * m_creator;
};
-#endif /* __HASH_H__ */
+#endif /* __HASH_H__ */
diff --git a/src/emu/hashfile.c b/src/emu/hashfile.c
index a7da359c420..fb9a4d07a2c 100644
--- a/src/emu/hashfile.c
+++ b/src/emu/hashfile.c
@@ -226,7 +226,7 @@ static void start_handler(void *data, const char *tagname, const char **attribut
unknown_attribute_value(state, attributes[0], attributes[1]);
else
{
- // device = (iodevice_t) i;
+ // device = (iodevice_t) i;
}
}
else
diff --git a/src/emu/image.c b/src/emu/image.c
index 471ed902da0..6d1d21ac73e 100644
--- a/src/emu/image.c
+++ b/src/emu/image.c
@@ -157,7 +157,7 @@ static int write_config(emu_options &options, const char *filename, const game_d
static void image_options_extract(running_machine &machine)
{
/* only extract the device options if we've added them
- no need to assert in case they are missing */
+ no need to assert in case they are missing */
{
int index = 0;
@@ -264,7 +264,7 @@ void image_postdevice_init(running_machine &machine)
/* make sure that any required devices have been allocated */
image_interface_iterator iter(machine.root_device());
for (device_image_interface *image = iter.first(); image != NULL; image = iter.next())
- {
+ {
int result = image->finish_load();
/* did the image load fail? */
if (result)
@@ -438,19 +438,19 @@ astring &image_info_astring(running_machine &machine, astring &string)
void image_battery_load_by_name(emu_options &options, const char *filename, void *buffer, int length, int fill)
{
- file_error filerr;
- int bytes_read = 0;
+ file_error filerr;
+ int bytes_read = 0;
- assert_always(buffer && (length > 0), "Must specify sensical buffer/length");
+ assert_always(buffer && (length > 0), "Must specify sensical buffer/length");
- /* try to open the battery file and read it in, if possible */
- emu_file file(options.nvram_directory(), OPEN_FLAG_READ);
- filerr = file.open(filename);
- if (filerr == FILERR_NONE)
- bytes_read = file.read(buffer, length);
+ /* try to open the battery file and read it in, if possible */
+ emu_file file(options.nvram_directory(), OPEN_FLAG_READ);
+ filerr = file.open(filename);
+ if (filerr == FILERR_NONE)
+ bytes_read = file.read(buffer, length);
- /* fill remaining bytes (if necessary) */
- memset(((char *) buffer) + bytes_read, fill, length - bytes_read);
+ /* fill remaining bytes (if necessary) */
+ memset(((char *) buffer) + bytes_read, fill, length - bytes_read);
}
/*-------------------------------------------------
@@ -460,11 +460,11 @@ void image_battery_load_by_name(emu_options &options, const char *filename, void
-------------------------------------------------*/
void image_battery_save_by_name(emu_options &options, const char *filename, const void *buffer, int length)
{
- assert_always(buffer && (length > 0), "Must specify sensical buffer/length");
+ assert_always(buffer && (length > 0), "Must specify sensical buffer/length");
- /* try to open the battery file and write it out, if possible */
- emu_file file(options.nvram_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS);
- file_error filerr = file.open(filename);
- if (filerr == FILERR_NONE)
- file.write(buffer, length);
+ /* try to open the battery file and write it out, if possible */
+ emu_file file(options.nvram_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS);
+ file_error filerr = file.open(filename);
+ if (filerr == FILERR_NONE)
+ file.write(buffer, length);
}
diff --git a/src/emu/imagedev/bitbngr.c b/src/emu/imagedev/bitbngr.c
index 05a8162e449..ae68bf0a482 100644
--- a/src/emu/imagedev/bitbngr.c
+++ b/src/emu/imagedev/bitbngr.c
@@ -23,7 +23,7 @@ const device_type BITBANGER = &device_creator<bitbanger_device>;
bitbanger_device::bitbanger_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, BITBANGER, "Bitbanger", tag, owner, clock),
- device_image_interface(mconfig, *this)
+ device_image_interface(mconfig, *this)
{
m_output_timer = NULL;
m_input_timer = NULL;
@@ -128,7 +128,7 @@ bool bitbanger_device::dec_mode(bool test)
const char *bitbanger_device::tune_string(void)
{
static const char *const tunes[] = {"-2.0%", "-1.75%", "-1.5%", "-1.25%", "-1.0%", "-0.75%", "-0.5", "-0.25%", "\xc2\xb1""0%",
- "+0.25%", "+0.5%", "+0.75%", "+1.0%", "+1.25%", "+1.5%", "+1.75%", "+2.0%"};
+ "+0.25%", "+0.5%", "+0.75%", "+1.0%", "+1.25%", "+1.5%", "+1.75%", "+2.0%"};
return tunes[m_tune];
}
@@ -141,7 +141,7 @@ const char *bitbanger_device::tune_string(void)
float bitbanger_device::tune_value(void)
{
static const float tunes[] = {0.97f, 0.9825f, 0.985f, 0.9875f, 0.99f, 0.9925f, 0.995f, 0.9975f, 1.0f,
- 1.0025f, 1.005f, 1.0075f, 1.01f, 1.0125f, 1.015f, 1.0175f, 1.02f};
+ 1.0025f, 1.005f, 1.0075f, 1.01f, 1.0125f, 1.015f, 1.0175f, 1.02f};
return tunes[m_tune];
}
@@ -154,7 +154,7 @@ float bitbanger_device::tune_value(void)
UINT32 bitbanger_device::baud_value(void)
{
static const float bauds[] = { 150.0f, 300.0f, 600.0f, 1200.0f, 2400.0f, 4800.0f, 9600.0f,
- 14400.0f, 19200.0f, 28800.0f, 38400.0f, 57600.0f, 115200.0f};
+ 14400.0f, 19200.0f, 28800.0f, 38400.0f, 57600.0f, 115200.0f};
float result = tune_value() * bauds[m_baud];
return (UINT32)result;
}
@@ -167,7 +167,7 @@ UINT32 bitbanger_device::baud_value(void)
const char *bitbanger_device::baud_string(void)
{
static const char *const bauds[] = { "150", "300", "600", "1200", "2400", "4800",
- "9600", "14400", "19200", "28800", "38400", "57600", "115200"};
+ "9600", "14400", "19200", "28800", "38400", "57600", "115200"};
return(bauds[m_baud]);
}
@@ -455,10 +455,10 @@ void bitbanger_device::set_input_line(UINT8 line)
void bitbanger_device::output(int value)
{
- attotime one_point_five_baud;
+ attotime one_point_five_baud;
- if( m_build_count == 0 && m_output_value == 1 && value == 0 )
- {
+ if( m_build_count == 0 && m_output_value == 1 && value == 0 )
+ {
/* we found our start bit */
/* eight bits of data, plus one of stop */
m_build_count = 9;
@@ -466,10 +466,10 @@ void bitbanger_device::output(int value)
one_point_five_baud = m_current_baud + m_current_baud / 2;
m_output_timer->adjust(one_point_five_baud, 0, m_current_baud);
- }
+ }
- //fprintf(stderr,"%s, %d\n", device->machine().time().as_string(9), value);
- m_output_value = value;
+ //fprintf(stderr,"%s, %d\n", device->machine().time().as_string(9), value);
+ m_output_value = value;
}
@@ -497,4 +497,3 @@ void bitbanger_device::call_unload(void)
{
m_input_timer->enable(false);
}
-
diff --git a/src/emu/imagedev/bitbngr.h b/src/emu/imagedev/bitbngr.h
index aa0adf71751..301481f4390 100644
--- a/src/emu/imagedev/bitbngr.h
+++ b/src/emu/imagedev/bitbngr.h
@@ -14,11 +14,11 @@
enum
{
- BITBANGER_PRINTER = 0,
+ BITBANGER_PRINTER = 0,
BITBANGER_MODEM,
BITBANGER_MODE_MAX,
- BITBANGER_150 = 0,
+ BITBANGER_150 = 0,
BITBANGER_300,
BITBANGER_600,
BITBANGER_1200,
@@ -68,21 +68,21 @@ enum
struct bitbanger_config
{
/* callback to driver */
- devcb_write_line m_input_callback;
+ devcb_write_line m_input_callback;
/* emulating a printer or modem */
- int m_default_mode;
+ int m_default_mode;
/* output bits per second */
- int m_default_baud;
+ int m_default_baud;
/* fine tune adjustment to the baud */
- int m_default_tune;
+ int m_default_tune;
};
-class bitbanger_device : public device_t,
+class bitbanger_device : public device_t,
public device_image_interface,
public bitbanger_config
{
@@ -143,21 +143,21 @@ private:
void set_input_line(UINT8 line);
// variables
- emu_timer * m_output_timer;
- emu_timer * m_input_timer;
- devcb_resolved_write_line m_input_func;
- int m_output_value;
- int m_build_count;
- int m_build_byte;
- attotime m_idle_delay;
- attotime m_current_baud;
- UINT32 m_input_buffer_size;
- UINT32 m_input_buffer_cursor;
- int m_mode;
- int m_baud;
- int m_tune;
- UINT8 m_current_input;
- UINT8 m_input_buffer[1000];
+ emu_timer * m_output_timer;
+ emu_timer * m_input_timer;
+ devcb_resolved_write_line m_input_func;
+ int m_output_value;
+ int m_build_count;
+ int m_build_byte;
+ attotime m_idle_delay;
+ attotime m_current_baud;
+ UINT32 m_input_buffer_size;
+ UINT32 m_input_buffer_cursor;
+ int m_mode;
+ int m_baud;
+ int m_tune;
+ UINT8 m_current_input;
+ UINT8 m_input_buffer[1000];
};
// device type definition
diff --git a/src/emu/imagedev/cartslot.c b/src/emu/imagedev/cartslot.c
index 3d85bff90a3..d8f536017ff 100644
--- a/src/emu/imagedev/cartslot.c
+++ b/src/emu/imagedev/cartslot.c
@@ -19,16 +19,16 @@ const device_type CARTSLOT = &device_creator<cartslot_image_device>;
//-------------------------------------------------
cartslot_image_device::cartslot_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CARTSLOT, "Cartslot", tag, owner, clock),
- device_image_interface(mconfig, *this),
- m_extensions("bin"),
- m_interface(NULL),
- m_must_be_loaded(0),
- m_device_start(NULL),
- m_device_load(NULL),
- m_device_unload(NULL),
- m_device_partialhash(NULL),
- m_device_displayinfo(NULL)
+ : device_t(mconfig, CARTSLOT, "Cartslot", tag, owner, clock),
+ device_image_interface(mconfig, *this),
+ m_extensions("bin"),
+ m_interface(NULL),
+ m_must_be_loaded(0),
+ m_device_start(NULL),
+ m_device_load(NULL),
+ m_device_unload(NULL),
+ m_device_partialhash(NULL),
+ m_device_displayinfo(NULL)
{
}
@@ -245,5 +245,3 @@ void cartslot_image_device::call_unload()
}
process_cartridge(false);
}
-
-
diff --git a/src/emu/imagedev/cartslot.h b/src/emu/imagedev/cartslot.h
index e42287f0f3e..a767d931adc 100644
--- a/src/emu/imagedev/cartslot.h
+++ b/src/emu/imagedev/cartslot.h
@@ -13,14 +13,14 @@
/***************************************************************************
MACROS
***************************************************************************/
-#define ROM_CART_LOAD(tag,offset,length,flags) \
+#define ROM_CART_LOAD(tag,offset,length,flags) \
{ NULL, tag, offset, length, ROMENTRYTYPE_CARTRIDGE | (flags) },
-#define ROM_MIRROR 0x01000000
-#define ROM_NOMIRROR 0x00000000
-#define ROM_FULLSIZE 0x02000000
-#define ROM_FILL_FF 0x04000000
-#define ROM_NOCLEAR 0x08000000
+#define ROM_MIRROR 0x01000000
+#define ROM_NOMIRROR 0x00000000
+#define ROM_FULLSIZE 0x02000000
+#define ROM_FILL_FF 0x04000000
+#define ROM_NOCLEAR 0x08000000
/***************************************************************************
TYPE DEFINITIONS
@@ -28,7 +28,7 @@
// ======================> cartslot_image_device
-class cartslot_image_device : public device_t,
+class cartslot_image_device : public device_t,
public device_image_interface
{
public:
@@ -40,7 +40,7 @@ public:
virtual bool call_load();
virtual void call_unload();
virtual void call_display_info() { if (m_device_displayinfo) m_device_displayinfo(*this); }
- virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry) { load_software_part_region( this, swlist, swname, start_entry ); return TRUE; }
+ virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry) { load_software_part_region( this, swlist, swname, start_entry ); return TRUE; }
virtual device_image_partialhash_func get_partial_hash() const { return m_device_partialhash; }
virtual iodevice_t image_type() const { return IO_CARTSLOT; }
@@ -65,21 +65,21 @@ public:
protected:
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
int load_cartridge(const rom_entry *romrgn, const rom_entry *roment, bool load);
int process_cartridge(bool load);
- const char * m_extensions;
- const char * m_interface;
- bool m_must_be_loaded;
- device_start_func m_device_start;
- device_image_load_func m_device_load;
- device_image_unload_func m_device_unload;
- device_image_partialhash_func m_device_partialhash;
- device_image_display_info_func m_device_displayinfo;
+ const char * m_extensions;
+ const char * m_interface;
+ bool m_must_be_loaded;
+ device_start_func m_device_start;
+ device_image_load_func m_device_load;
+ device_image_unload_func m_device_unload;
+ device_image_partialhash_func m_device_partialhash;
+ device_image_display_info_func m_device_displayinfo;
};
// device type definition
@@ -89,37 +89,37 @@ extern const device_type CARTSLOT;
DEVICE CONFIGURATION MACROS
***************************************************************************/
-#define MCFG_CARTSLOT_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, CARTSLOT, 0) \
+#define MCFG_CARTSLOT_ADD(_tag) \
+ MCFG_DEVICE_ADD(_tag, CARTSLOT, 0) \
-#define MCFG_CARTSLOT_MODIFY(_tag) \
- MCFG_DEVICE_MODIFY(_tag) \
+#define MCFG_CARTSLOT_MODIFY(_tag) \
+ MCFG_DEVICE_MODIFY(_tag) \
-#define MCFG_CARTSLOT_EXTENSION_LIST(_extensions) \
+#define MCFG_CARTSLOT_EXTENSION_LIST(_extensions) \
static_cast<cartslot_image_device *>(device)->set_extensions(_extensions);
-#define MCFG_CARTSLOT_INTERFACE(_interface) \
+#define MCFG_CARTSLOT_INTERFACE(_interface) \
static_cast<cartslot_image_device *>(device)->set_interface(_interface);
-#define MCFG_CARTSLOT_NOT_MANDATORY \
+#define MCFG_CARTSLOT_NOT_MANDATORY \
static_cast<cartslot_image_device *>(device)->set_must_be_loaded(FALSE);
-#define MCFG_CARTSLOT_MANDATORY \
+#define MCFG_CARTSLOT_MANDATORY \
static_cast<cartslot_image_device *>(device)->set_must_be_loaded(TRUE);
-#define MCFG_CARTSLOT_START(_start) \
+#define MCFG_CARTSLOT_START(_start) \
static_cast<cartslot_image_device *>(device)->set_device_start(DEVICE_START_NAME(_start));
-#define MCFG_CARTSLOT_LOAD(_load) \
+#define MCFG_CARTSLOT_LOAD(_load) \
static_cast<cartslot_image_device *>(device)->set_device_load(DEVICE_IMAGE_LOAD_NAME(_load));
-#define MCFG_CARTSLOT_UNLOAD(_unload) \
+#define MCFG_CARTSLOT_UNLOAD(_unload) \
static_cast<cartslot_image_device *>(device)->set_device_unload(DEVICE_IMAGE_UNLOAD_NAME(_unload));
-#define MCFG_CARTSLOT_PARTIALHASH(_partialhash) \
+#define MCFG_CARTSLOT_PARTIALHASH(_partialhash) \
static_cast<cartslot_image_device *>(device)->set_partialhash(_partialhash);
-#define MCFG_CARTSLOT_DISPLAY_INFO(_displayinfo) \
+#define MCFG_CARTSLOT_DISPLAY_INFO(_displayinfo) \
static_cast<cartslot_image_device *>(device)->set_displayinfo(DEVICE_IMAGE_DISPLAY_INFO_NAME(_displayinfo));
#endif /* __CARTSLOT_H__ */
diff --git a/src/emu/imagedev/cassette.c b/src/emu/imagedev/cassette.c
index b1584e873a0..32bc1100973 100644
--- a/src/emu/imagedev/cassette.c
+++ b/src/emu/imagedev/cassette.c
@@ -12,10 +12,10 @@
#include "ui.h"
-#define ANIMATION_FPS 1
-#define ANIMATION_FRAMES 4
+#define ANIMATION_FPS 1
+#define ANIMATION_FRAMES 4
-#define VERBOSE 0
+#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* Default cassette_interface for drivers only wav files */
@@ -37,8 +37,8 @@ const device_type CASSETTE = &device_creator<cassette_image_device>;
//-------------------------------------------------
cassette_image_device::cassette_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CASSETTE, "Cassette", tag, owner, clock),
- device_image_interface(mconfig, *this)
+ : device_t(mconfig, CASSETTE, "Cassette", tag, owner, clock),
+ device_image_interface(mconfig, *this)
{
}
@@ -396,13 +396,13 @@ void cassette_image_device::call_display()
/* THE ANIMATION HASN'T WORKED SINCE 0.114 - LEFT HERE FOR REFERENCE */
/* NEVER SEEN THE PLAY / RECORD ICONS */
/* character pairs 2-3, 4-5, 6-7, 8-9 form little tape cassette images */
- n * 2 + 2, /* cassette icon left */
- n * 2 + 3, /* cassette icon right */
- (uistate == CASSETTE_PLAY) ? 16 : 14, /* play or record icon */
+ n * 2 + 2, /* cassette icon left */
+ n * 2 + 3, /* cassette icon right */
+ (uistate == CASSETTE_PLAY) ? 16 : 14, /* play or record icon */
#else
- shapes[n], /* cassette icon left */
- shapes[n|4], /* cassette icon right */
- (uistate == CASSETTE_PLAY) ? 0x50 : 0x52, /* play (P) or record (R) */
+ shapes[n], /* cassette icon left */
+ shapes[n|4], /* cassette icon right */
+ (uistate == CASSETTE_PLAY) ? 0x50 : 0x52, /* play (P) or record (R) */
#endif
((int) position / 60),
((int) position % 60),
diff --git a/src/emu/imagedev/cassette.h b/src/emu/imagedev/cassette.h
index 3d273b93251..59ae9455a9d 100644
--- a/src/emu/imagedev/cassette.h
+++ b/src/emu/imagedev/cassette.h
@@ -16,21 +16,21 @@
enum cassette_state
{
/* this part of the state is controlled by the UI */
- CASSETTE_STOPPED = 0,
- CASSETTE_PLAY = 1,
- CASSETTE_RECORD = 2,
+ CASSETTE_STOPPED = 0,
+ CASSETTE_PLAY = 1,
+ CASSETTE_RECORD = 2,
/* this part of the state is controlled by drivers */
- CASSETTE_MOTOR_ENABLED = 0,
- CASSETTE_MOTOR_DISABLED = 4,
- CASSETTE_SPEAKER_ENABLED = 0,
- CASSETTE_SPEAKER_MUTED = 8,
+ CASSETTE_MOTOR_ENABLED = 0,
+ CASSETTE_MOTOR_DISABLED = 4,
+ CASSETTE_SPEAKER_ENABLED = 0,
+ CASSETTE_SPEAKER_MUTED = 8,
/* masks */
- CASSETTE_MASK_UISTATE = 3,
- CASSETTE_MASK_MOTOR = 4,
- CASSETTE_MASK_SPEAKER = 8,
- CASSETTE_MASK_DRVSTATE = 12
+ CASSETTE_MASK_UISTATE = 3,
+ CASSETTE_MASK_MOTOR = 4,
+ CASSETTE_MASK_SPEAKER = 8,
+ CASSETTE_MASK_DRVSTATE = 12
};
@@ -42,16 +42,16 @@ enum cassette_state
struct cassette_interface
{
- const struct CassetteFormat* const *m_formats;
- const struct CassetteOptions *m_create_opts;
- cassette_state m_default_state;
- const char * m_interface;
- device_image_display_info_func m_device_displayinfo;
+ const struct CassetteFormat* const *m_formats;
+ const struct CassetteOptions *m_create_opts;
+ cassette_state m_default_state;
+ const char * m_interface;
+ device_image_display_info_func m_device_displayinfo;
};
// ======================> cassette_image_device
-class cassette_image_device : public device_t,
+class cassette_image_device : public device_t,
public cassette_interface,
public device_image_interface
{
@@ -101,18 +101,18 @@ protected:
void update();
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
private:
- cassette_image *m_cassette;
- cassette_state m_state;
- double m_position;
- double m_position_time;
- INT32 m_value;
- int m_channel;
- double m_speed; // speed multiplier for tape speeds other than standard 1.875ips (used in adam driver)
- int m_direction; // direction select
- char m_extension_list[256];
+ cassette_image *m_cassette;
+ cassette_state m_state;
+ double m_position;
+ double m_position_time;
+ INT32 m_value;
+ int m_channel;
+ double m_speed; // speed multiplier for tape speeds other than standard 1.875ips (used in adam driver)
+ int m_direction; // direction select
+ char m_extension_list[256];
};
// device type definition
@@ -124,15 +124,15 @@ typedef device_type_iterator<&device_creator<cassette_image_device>, cassette_im
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
-#define CASSETTE_TAG "cassette"
-#define CASSETTE2_TAG "cassette2"
+#define CASSETTE_TAG "cassette"
+#define CASSETTE2_TAG "cassette2"
-#define MCFG_CASSETTE_ADD(_tag, _config) \
- MCFG_DEVICE_ADD(_tag, CASSETTE, 0) \
+#define MCFG_CASSETTE_ADD(_tag, _config) \
+ MCFG_DEVICE_ADD(_tag, CASSETTE, 0) \
MCFG_DEVICE_CONFIG(_config)
-#define MCFG_CASSETTE_MODIFY(_tag, _config) \
- MCFG_DEVICE_MODIFY(_tag) \
+#define MCFG_CASSETTE_MODIFY(_tag, _config) \
+ MCFG_DEVICE_MODIFY(_tag) \
MCFG_DEVICE_CONFIG(_config)
extern const cassette_interface default_cassette_interface;
diff --git a/src/emu/imagedev/chd_cd.c b/src/emu/imagedev/chd_cd.c
index c031cfbbf88..264dc2d78d6 100644
--- a/src/emu/imagedev/chd_cd.c
+++ b/src/emu/imagedev/chd_cd.c
@@ -12,7 +12,7 @@
static OPTION_GUIDE_START(cd_option_guide)
- OPTION_INT('K', "hunksize", "Hunk Bytes")
+ OPTION_INT('K', "hunksize", "Hunk Bytes")
OPTION_GUIDE_END
static const char cd_option_spec[] = "K512/1024/2048/[4096]";
@@ -25,8 +25,8 @@ const device_type CDROM = &device_creator<cdrom_image_device>;
//-------------------------------------------------
cdrom_image_device::cdrom_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CDROM, "Cdrom", tag, owner, clock),
- device_image_interface(mconfig, *this)
+ : device_t(mconfig, CDROM, "Cdrom", tag, owner, clock),
+ device_image_interface(mconfig, *this)
{
}
@@ -55,19 +55,19 @@ void cdrom_image_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_interface, 0, sizeof(m_interface));
+ memset(&m_interface, 0, sizeof(m_interface));
memset(&m_device_displayinfo, 0, sizeof(m_device_displayinfo));
}
m_extension_list = "chd,cue,toc,nrg,gdi,iso,cdr";
image_device_format *format = global_alloc_clear(image_device_format);;
- format->m_index = 0;
+ format->m_index = 0;
format->m_name = "chdcd";
format->m_description = "CD-ROM drive";
format->m_extensions = m_extension_list;
format->m_optspec = cd_option_spec;
- format->m_next = NULL;
+ format->m_next = NULL;
m_formatlist = format;
@@ -106,8 +106,8 @@ void cdrom_image_device::device_stop()
bool cdrom_image_device::call_load()
{
- chd_error err = (chd_error)0;
- chd_file *chd = NULL;
+ chd_error err = (chd_error)0;
+ chd_file *chd = NULL;
astring tempstring;
if (m_cdrom_handle)
@@ -116,7 +116,7 @@ bool cdrom_image_device::call_load()
if (software_entry() == NULL)
{
if (strstr(m_image_name,".chd") && is_loaded()) {
- err = m_self_chd.open( *image_core_file() ); /* CDs are never writeable */
+ err = m_self_chd.open( *image_core_file() ); /* CDs are never writeable */
if ( err )
goto error;
chd = &m_self_chd;
diff --git a/src/emu/imagedev/chd_cd.h b/src/emu/imagedev/chd_cd.h
index a5e7ca5cfa3..98437e7be32 100644
--- a/src/emu/imagedev/chd_cd.h
+++ b/src/emu/imagedev/chd_cd.h
@@ -18,13 +18,13 @@
struct cdrom_interface
{
- const char * m_interface;
- device_image_display_info_func m_device_displayinfo;
+ const char * m_interface;
+ device_image_display_info_func m_device_displayinfo;
};
// ======================> cdrom_image_device
-class cdrom_image_device : public device_t,
+class cdrom_image_device : public device_t,
public cdrom_interface,
public device_image_interface
{
@@ -54,14 +54,14 @@ public:
cdrom_file *get_cdrom_file() { return m_cdrom_handle; }
protected:
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
virtual void device_stop();
- chd_file m_self_chd;
- cdrom_file *m_cdrom_handle;
+ chd_file m_self_chd;
+ cdrom_file *m_cdrom_handle;
image_device_format m_format;
- const char *m_extension_list;
+ const char *m_extension_list;
};
// device type definition
@@ -74,6 +74,6 @@ extern const device_type CDROM;
#define MCFG_CDROM_ADD(_tag, _config) \
MCFG_DEVICE_ADD(_tag, CDROM, 0) \
- MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_CONFIG(_config) \
#endif /* CHD_CD_H */
diff --git a/src/emu/imagedev/flopdrv.c b/src/emu/imagedev/flopdrv.c
index b6933801034..ba9034723b1 100644
--- a/src/emu/imagedev/flopdrv.c
+++ b/src/emu/imagedev/flopdrv.c
@@ -15,15 +15,15 @@
#include "formats/imageutl.h"
#include "flopdrv.h"
-#define VERBOSE 0
+#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/***************************************************************************
CONSTANTS
***************************************************************************/
-#define FLOPDRVTAG "flopdrv"
-#define LOG_FLOPPY 0
+#define FLOPDRVTAG "flopdrv"
+#define LOG_FLOPPY 0
/***************************************************************************
TYPE DEFINITIONS
@@ -50,13 +50,13 @@ struct floppy_drive
int tk00; /* track 00 */
int wpt; /* write protect */
int rdy; /* ready */
- int dskchg; /* disk changed */
+ int dskchg; /* disk changed */
/* drive select logic */
int drive_id;
int active;
- const floppy_interface *config;
+ const floppy_interface *config;
/* flags */
int flags;
@@ -65,17 +65,17 @@ struct floppy_drive
/* num sides */
int num_sides;
/* current track - this may or may not relate to the present cylinder number
- stored by the fdc */
+ stored by the fdc */
int current_track;
/* index pulse timer */
- emu_timer *index_timer;
+ emu_timer *index_timer;
/* index pulse callback */
- void (*index_pulse_callback)(device_t *controller,device_t *image, int state);
+ void (*index_pulse_callback)(device_t *controller,device_t *image, int state);
/* rotation per minute => gives index pulse frequency */
float rpm;
- void (*ready_state_change_callback)(device_t *controller,device_t *img, int state);
+ void (*ready_state_change_callback)(device_t *controller,device_t *img, int state);
int id_index;
@@ -104,11 +104,11 @@ struct floppy_error_map
static const floppy_error_map errmap[] =
{
- { FLOPPY_ERROR_SUCCESS, IMAGE_ERROR_SUCCESS },
- { FLOPPY_ERROR_INTERNAL, IMAGE_ERROR_INTERNAL },
- { FLOPPY_ERROR_UNSUPPORTED, IMAGE_ERROR_UNSUPPORTED },
- { FLOPPY_ERROR_OUTOFMEMORY, IMAGE_ERROR_OUTOFMEMORY },
- { FLOPPY_ERROR_INVALIDIMAGE, IMAGE_ERROR_INVALIDIMAGE }
+ { FLOPPY_ERROR_SUCCESS, IMAGE_ERROR_SUCCESS },
+ { FLOPPY_ERROR_INTERNAL, IMAGE_ERROR_INTERNAL },
+ { FLOPPY_ERROR_UNSUPPORTED, IMAGE_ERROR_UNSUPPORTED },
+ { FLOPPY_ERROR_OUTOFMEMORY, IMAGE_ERROR_OUTOFMEMORY },
+ { FLOPPY_ERROR_INVALIDIMAGE, IMAGE_ERROR_INVALIDIMAGE }
};
/***************************************************************************
@@ -289,7 +289,7 @@ void floppy_drive_set_ready_state(device_t *img, int state, int flag)
if (flag)
{
/* set ready only if drive is present, disk is in the drive,
- and disk motor is on - for Amstrad, Spectrum and PCW*/
+ and disk motor is on - for Amstrad, Spectrum and PCW*/
/* drive present? */
/* disk inserted? */
@@ -312,7 +312,7 @@ void floppy_drive_set_ready_state(device_t *img, int state, int flag)
}
/* get flag state */
-int floppy_drive_get_flag_state(device_t *img, int flag)
+int floppy_drive_get_flag_state(device_t *img, int flag)
{
floppy_drive *drv = get_safe_token( img );
int drive_flags;
@@ -323,9 +323,9 @@ int floppy_drive_get_flag_state(device_t *img, int flag)
drive_flags = drv->flags;
/* these flags are independent of a real drive/disk image */
- flags |= drive_flags & (FLOPPY_DRIVE_READY | FLOPPY_DRIVE_INDEX);
+ flags |= drive_flags & (FLOPPY_DRIVE_READY | FLOPPY_DRIVE_INDEX);
- flags &= flag;
+ flags &= flag;
return flags;
}
@@ -370,7 +370,7 @@ void floppy_drive_seek(device_t *img, signed int signed_tracks)
/* this is not accurate. But it will do for now */
-int floppy_drive_get_next_id(device_t *img, int side, chrn_id *id)
+int floppy_drive_get_next_id(device_t *img, int side, chrn_id *id)
{
floppy_drive *pDrive;
int spt;
@@ -509,7 +509,7 @@ void floppy_drive_set_ready_state_change_callback(device_t *img, void (*callback
pDrive->ready_state_change_callback = callback;
}
-int floppy_drive_get_current_track(device_t *img)
+int floppy_drive_get_current_track(device_t *img)
{
floppy_drive *drv = get_safe_token( img );
return drv->current_track;
@@ -668,9 +668,9 @@ int floppy_get_count(running_machine &machine)
{
int cnt = 0;
if (machine.device(FLOPPY_0)) cnt++;
- if (machine.device(FLOPPY_1)) cnt++;
- if (machine.device(FLOPPY_2)) cnt++;
- if (machine.device(FLOPPY_3)) cnt++;
+ if (machine.device(FLOPPY_1)) cnt++;
+ if (machine.device(FLOPPY_2)) cnt++;
+ if (machine.device(FLOPPY_3)) cnt++;
return cnt;
}
@@ -849,17 +849,17 @@ const device_type LEGACY_FLOPPY = &device_creator<legacy_floppy_image_device>;
//-------------------------------------------------
legacy_floppy_image_device::legacy_floppy_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, LEGACY_FLOPPY, "Floppy Disk", tag, owner, clock),
- device_image_interface(mconfig, *this),
- m_token(NULL)
+ : device_t(mconfig, LEGACY_FLOPPY, "Floppy Disk", tag, owner, clock),
+ device_image_interface(mconfig, *this),
+ m_token(NULL)
{
m_token = global_alloc_clear(floppy_drive);
}
legacy_floppy_image_device::legacy_floppy_image_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, type, name, tag, owner, clock),
- device_image_interface(mconfig, *this),
- m_token(NULL)
+ : device_t(mconfig, type, name, tag, owner, clock),
+ device_image_interface(mconfig, *this),
+ m_token(NULL)
{
m_token = global_alloc_clear(floppy_drive);
}
@@ -919,10 +919,10 @@ void legacy_floppy_image_device::device_start()
void legacy_floppy_image_device::device_config_complete()
{
- image_device_format **formatptr;
- image_device_format *format;
- formatptr = &m_formatlist;
- int cnt = 0;
+ image_device_format **formatptr;
+ image_device_format *format;
+ formatptr = &m_formatlist;
+ int cnt = 0;
m_extension_list[0] = '\0';
const struct FloppyFormat *floppy_options = ((floppy_interface*)static_config())->formats;
@@ -1019,7 +1019,7 @@ bool legacy_floppy_image_device::is_creatable() const
if (static_config() )
{
const struct FloppyFormat *floppy_options = ((floppy_interface*)static_config())->formats;
- int i;
+ int i;
for ( i = 0; floppy_options[i].construct; i++ ) {
if(floppy_options[i].param_guidelines) cnt++;
}
diff --git a/src/emu/imagedev/flopdrv.h b/src/emu/imagedev/flopdrv.h
index c7a1cf28762..037bb40881a 100644
--- a/src/emu/imagedev/flopdrv.h
+++ b/src/emu/imagedev/flopdrv.h
@@ -9,14 +9,14 @@
#include "formats/flopimg.h"
#define FLOPPY_TYPE_REGULAR 0
-#define FLOPPY_TYPE_APPLE 1
-#define FLOPPY_TYPE_SONY 2
+#define FLOPPY_TYPE_APPLE 1
+#define FLOPPY_TYPE_SONY 2
-#define FLOPPY_DRIVE_2_8_INCH 1
-#define FLOPPY_DRIVE_3_INCH 2
-#define FLOPPY_DRIVE_3_5_INCH 3
-#define FLOPPY_DRIVE_5_25_INCH 4
-#define FLOPPY_DRIVE_8_INCH 5
+#define FLOPPY_DRIVE_2_8_INCH 1
+#define FLOPPY_DRIVE_3_INCH 2
+#define FLOPPY_DRIVE_3_5_INCH 3
+#define FLOPPY_DRIVE_5_25_INCH 4
+#define FLOPPY_DRIVE_8_INCH 5
// Maximum supported density
#define FLOPPY_DRIVE_SD 1
@@ -73,7 +73,7 @@ struct floppy_interface
floppy_type_t floppy_type;
const struct FloppyFormat *formats;
const char *interface;
- device_image_display_info_func device_displayinfo;
+ device_image_display_info_func device_displayinfo;
};
struct chrn_id
@@ -82,14 +82,14 @@ struct chrn_id
unsigned char H;
unsigned char R;
unsigned char N;
- int data_id; // id for read/write data command
+ int data_id; // id for read/write data command
unsigned long flags;
};
/* set if drive is ready */
-#define FLOPPY_DRIVE_READY 0x0010
+#define FLOPPY_DRIVE_READY 0x0010
/* set if index has just occurred */
-#define FLOPPY_DRIVE_INDEX 0x0020
+#define FLOPPY_DRIVE_INDEX 0x0020
/* a callback which will be executed if the ready state of the drive changes e.g. not ready->ready, ready->not ready */
void floppy_drive_set_ready_state_change_callback(device_t *img, void (*callback)(device_t *controller,device_t *img, int state));
@@ -178,7 +178,7 @@ READ_LINE_DEVICE_HANDLER( floppy_index_r );
// drive ready
READ_LINE_DEVICE_HANDLER( floppy_ready_r );
-class legacy_floppy_image_device : public device_t,
+class legacy_floppy_image_device : public device_t,
public device_image_interface
{
public:
@@ -188,7 +188,7 @@ public:
~legacy_floppy_image_device();
virtual bool call_load();
- virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry) { return load_software(swlist, swname, start_entry); }
+ virtual bool call_softlist_load(char *swlist, char *swname, rom_entry *start_entry) { return load_software(swlist, swname, start_entry); }
virtual bool call_create(int format_type, option_resolution *format_options);
virtual void call_unload();
virtual void call_display_info();
@@ -212,7 +212,7 @@ protected:
virtual void device_start();
void *m_token;
- char m_extension_list[256];
+ char m_extension_list[256];
};
// device type definition
@@ -227,54 +227,54 @@ extern const device_type LEGACY_FLOPPY;
#define FLOPPY_3 "floppy3"
-#define MCFG_LEGACY_FLOPPY_DRIVE_ADD(_tag, _config) \
- MCFG_DEVICE_ADD(_tag, LEGACY_FLOPPY, 0) \
+#define MCFG_LEGACY_FLOPPY_DRIVE_ADD(_tag, _config) \
+ MCFG_DEVICE_ADD(_tag, LEGACY_FLOPPY, 0) \
MCFG_DEVICE_CONFIG(_config)
-#define MCFG_LEGACY_FLOPPY_DRIVE_MODIFY(_tag, _config) \
- MCFG_DEVICE_MODIFY(_tag) \
+#define MCFG_LEGACY_FLOPPY_DRIVE_MODIFY(_tag, _config) \
+ MCFG_DEVICE_MODIFY(_tag) \
MCFG_DEVICE_CONFIG(_config)
-#define MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(_config) \
- MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_ADD(FLOPPY_2, LEGACY_FLOPPY, 0) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_ADD(FLOPPY_3, LEGACY_FLOPPY, 0) \
+#define MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(_config) \
+ MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_ADD(FLOPPY_2, LEGACY_FLOPPY, 0) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_ADD(FLOPPY_3, LEGACY_FLOPPY, 0) \
MCFG_DEVICE_CONFIG(_config)
-#define MCFG_LEGACY_FLOPPY_4_DRIVES_MODIFY(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_0) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_1) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_2) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_3) \
+#define MCFG_LEGACY_FLOPPY_4_DRIVES_MODIFY(_config) \
+ MCFG_DEVICE_MODIFY(FLOPPY_0) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_MODIFY(FLOPPY_1) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_MODIFY(FLOPPY_2) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_MODIFY(FLOPPY_3) \
MCFG_DEVICE_CONFIG(_config)
-#define MCFG_LEGACY_FLOPPY_4_DRIVES_REMOVE() \
- MCFG_DEVICE_REMOVE(FLOPPY_0) \
- MCFG_DEVICE_REMOVE(FLOPPY_1) \
- MCFG_DEVICE_REMOVE(FLOPPY_2) \
+#define MCFG_LEGACY_FLOPPY_4_DRIVES_REMOVE() \
+ MCFG_DEVICE_REMOVE(FLOPPY_0) \
+ MCFG_DEVICE_REMOVE(FLOPPY_1) \
+ MCFG_DEVICE_REMOVE(FLOPPY_2) \
MCFG_DEVICE_REMOVE(FLOPPY_3)
-#define MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(_config) \
- MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0) \
+#define MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(_config) \
+ MCFG_DEVICE_ADD(FLOPPY_0, LEGACY_FLOPPY, 0) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_ADD(FLOPPY_1, LEGACY_FLOPPY, 0) \
MCFG_DEVICE_CONFIG(_config)
-#define MCFG_LEGACY_FLOPPY_2_DRIVES_MODIFY(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_0) \
- MCFG_DEVICE_CONFIG(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_1) \
+#define MCFG_LEGACY_FLOPPY_2_DRIVES_MODIFY(_config) \
+ MCFG_DEVICE_MODIFY(FLOPPY_0) \
+ MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_MODIFY(FLOPPY_1) \
MCFG_DEVICE_CONFIG(_config)
-#define MCFG_LEGACY_FLOPPY_2_DRIVES_REMOVE() \
- MCFG_DEVICE_REMOVE(FLOPPY_0) \
+#define MCFG_LEGACY_FLOPPY_2_DRIVES_REMOVE() \
+ MCFG_DEVICE_REMOVE(FLOPPY_0) \
MCFG_DEVICE_REMOVE(FLOPPY_1)
#endif /* __FLOPDRV_H__ */
diff --git a/src/emu/imagedev/floppy.c b/src/emu/imagedev/floppy.c
index a06a8d289fe..2d16977978b 100644
--- a/src/emu/imagedev/floppy.c
+++ b/src/emu/imagedev/floppy.c
@@ -760,7 +760,7 @@ void ui_menu_control_floppy_image::hook_load(astring filename, bool softlist)
const rom_entry *romp = region + 1;
UINT32 crc = 0;
bool has_crc = hash_collection(ROM_GETHASHDATA(romp)).crc(crc);
-
+
filename = try_file(astring(swlist_name) + PATH_SEPARATOR + astring(swname), ROM_GETNAME(romp), has_crc, crc);
if(filename == "")
filename = try_file(astring(swlist_name) + PATH_SEPARATOR + astring(parentname), ROM_GETNAME(romp), has_crc, crc);
diff --git a/src/emu/imagedev/harddriv.c b/src/emu/imagedev/harddriv.c
index 8f9f80e3a82..05b3c76ab3e 100644
--- a/src/emu/imagedev/harddriv.c
+++ b/src/emu/imagedev/harddriv.c
@@ -18,11 +18,11 @@
static OPTION_GUIDE_START(hd_option_guide)
- OPTION_INT('C', "cylinders", "Cylinders")
- OPTION_INT('H', "heads", "Heads")
- OPTION_INT('S', "sectors", "Sectors")
- OPTION_INT('L', "sectorlength", "Sector Bytes")
- OPTION_INT('K', "hunksize", "Hunk Bytes")
+ OPTION_INT('C', "cylinders", "Cylinders")
+ OPTION_INT('H', "heads", "Heads")
+ OPTION_INT('S', "sectors", "Sectors")
+ OPTION_INT('L', "sectorlength", "Sector Bytes")
+ OPTION_INT('K', "hunksize", "Hunk Bytes")
OPTION_GUIDE_END
static const char *hd_option_spec =
@@ -37,10 +37,10 @@ const device_type HARDDISK = &device_creator<harddisk_image_device>;
//-------------------------------------------------
harddisk_image_device::harddisk_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, HARDDISK, "Harddisk", tag, owner, clock),
- device_image_interface(mconfig, *this),
- m_chd(NULL),
- m_hard_disk_handle(NULL)
+ : device_t(mconfig, HARDDISK, "Harddisk", tag, owner, clock),
+ device_image_interface(mconfig, *this),
+ m_chd(NULL),
+ m_hard_disk_handle(NULL)
{
}
@@ -76,12 +76,12 @@ void harddisk_image_device::device_config_complete()
}
image_device_format *format = global_alloc_clear(image_device_format);;
- format->m_index = 0;
+ format->m_index = 0;
format->m_name = "chd";
format->m_description = "CHD Hard drive";
format->m_extensions = "chd,hd";
format->m_optspec = hd_option_spec;
- format->m_next = NULL;
+ format->m_next = NULL;
m_formatlist = format;
@@ -143,11 +143,11 @@ bool harddisk_image_device::call_create(int create_format, option_resolution *cr
UINT32 cylinders, heads, sectors, totalsectors;
astring metadata;
- cylinders = option_resolution_lookup_int(create_args, 'C');
- heads = option_resolution_lookup_int(create_args, 'H');
- sectors = option_resolution_lookup_int(create_args, 'S');
- sectorsize = option_resolution_lookup_int(create_args, 'L');
- hunksize = option_resolution_lookup_int(create_args, 'K');
+ cylinders = option_resolution_lookup_int(create_args, 'C');
+ heads = option_resolution_lookup_int(create_args, 'H');
+ sectors = option_resolution_lookup_int(create_args, 'S');
+ sectorsize = option_resolution_lookup_int(create_args, 'L');
+ hunksize = option_resolution_lookup_int(create_args, 'K');
totalsectors = cylinders * heads * sectors;
diff --git a/src/emu/imagedev/harddriv.h b/src/emu/imagedev/harddriv.h
index 53691049d01..b04b06177a9 100644
--- a/src/emu/imagedev/harddriv.h
+++ b/src/emu/imagedev/harddriv.h
@@ -20,15 +20,15 @@
struct harddisk_interface
{
- device_image_load_func m_device_image_load;
- device_image_unload_func m_device_image_unload;
- const char * m_interface;
- device_image_display_info_func m_device_displayinfo;
+ device_image_load_func m_device_image_load;
+ device_image_unload_func m_device_image_unload;
+ const char * m_interface;
+ device_image_display_info_func m_device_displayinfo;
};
// ======================> harddisk_image_device
-class harddisk_image_device : public device_t,
+class harddisk_image_device : public device_t,
public harddisk_interface,
public device_image_interface
{
@@ -61,16 +61,16 @@ public:
protected:
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
virtual void device_stop();
int internal_load_hd();
- chd_file *m_chd;
- chd_file m_origchd; /* handle to the original CHD */
- chd_file m_diffchd; /* handle to the diff CHD */
- hard_disk_file *m_hard_disk_handle;
+ chd_file *m_chd;
+ chd_file m_origchd; /* handle to the original CHD */
+ chd_file m_diffchd; /* handle to the diff CHD */
+ hard_disk_file *m_hard_disk_handle;
image_device_format m_format;
};
@@ -87,6 +87,6 @@ extern const device_type HARDDISK;
#define MCFG_HARDDISK_CONFIG_ADD(_tag,_config) \
MCFG_DEVICE_ADD(_tag, HARDDISK, 0) \
- MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_CONFIG(_config) \
#endif /* HARDDRIV_H */
diff --git a/src/emu/imagedev/printer.c b/src/emu/imagedev/printer.c
index 81731040ab8..98b21cd47c7 100644
--- a/src/emu/imagedev/printer.c
+++ b/src/emu/imagedev/printer.c
@@ -18,8 +18,8 @@ const device_type PRINTER = &device_creator<printer_image_device>;
//-------------------------------------------------
printer_image_device::printer_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, PRINTER, "Printer", tag, owner, clock),
- device_image_interface(mconfig, *this)
+ : device_t(mconfig, PRINTER, "Printer", tag, owner, clock),
+ device_image_interface(mconfig, *this)
{
}
@@ -48,7 +48,7 @@ void printer_image_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_online, 0, sizeof(m_online));
+ memset(&m_online, 0, sizeof(m_online));
}
// set brief and instance name
@@ -62,7 +62,7 @@ void printer_image_device::device_config_complete()
void printer_image_device::device_start()
{
- m_online_func.resolve(m_online, *this);
+ m_online_func.resolve(m_online, *this);
}
/***************************************************************************
@@ -125,4 +125,3 @@ void printer_image_device::call_unload()
if (!m_online_func.isnull())
m_online_func(FALSE);
}
-
diff --git a/src/emu/imagedev/printer.h b/src/emu/imagedev/printer.h
index d0da1daca0b..59ce5066257 100644
--- a/src/emu/imagedev/printer.h
+++ b/src/emu/imagedev/printer.h
@@ -20,12 +20,12 @@
struct printer_interface
{
- devcb_write_line m_online;
+ devcb_write_line m_online;
};
// ======================> printer_image_device
-class printer_image_device : public device_t,
+class printer_image_device : public device_t,
public printer_interface,
public device_image_interface
{
@@ -58,7 +58,7 @@ public:
void output(UINT8 data);
protected:
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
devcb_resolved_write_line m_online_func;
diff --git a/src/emu/imagedev/serial.c b/src/emu/imagedev/serial.c
index 3e102af2390..761f79449fd 100644
--- a/src/emu/imagedev/serial.c
+++ b/src/emu/imagedev/serial.c
@@ -18,9 +18,9 @@ const device_type SERIAL = &device_creator<serial_image_device>;
//-------------------------------------------------
serial_image_device::serial_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, SERIAL, "Serial", tag, owner, clock),
- device_serial_interface(mconfig, *this),
- device_image_interface(mconfig, *this)
+ : device_t(mconfig, SERIAL, "Serial", tag, owner, clock),
+ device_serial_interface(mconfig, *this),
+ device_image_interface(mconfig, *this)
{
}
@@ -49,7 +49,7 @@ void serial_image_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- m_baud_rate = 2400;
+ m_baud_rate = 2400;
m_data_bits = 8;
m_stop_bits = 2;
m_parity = SERIAL_PARITY_NONE;
@@ -310,4 +310,3 @@ void serial_image_device::call_unload()
data_stream_free(&m_transmit);
data_stream_free(&m_receive);
}
-
diff --git a/src/emu/imagedev/serial.h b/src/emu/imagedev/serial.h
index ba494e8649d..eae304d0e5f 100644
--- a/src/emu/imagedev/serial.h
+++ b/src/emu/imagedev/serial.h
@@ -34,7 +34,7 @@ struct serial_data_stream
struct serial_image_interface
{
- int m_baud_rate;
+ int m_baud_rate;
int m_data_bits;
int m_stop_bits;
int m_parity;
@@ -44,7 +44,7 @@ struct serial_image_interface
// ======================> serial_image_device
-class serial_image_device : public device_t,
+class serial_image_device : public device_t,
public serial_image_interface,
public device_serial_interface,
public device_image_interface
@@ -80,10 +80,10 @@ public:
int data_stream_get_data_bit_from_data_byte(serial_data_stream *stream);
void data_stream_reset(serial_data_stream *stream);
void data_stream_free(serial_data_stream *stream);
- void data_stream_init(serial_data_stream *stream, unsigned char *pData, unsigned long DataLength) ;
+ void data_stream_init(serial_data_stream *stream, unsigned char *pData, unsigned long DataLength) ;
protected:
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
private:
@@ -95,7 +95,7 @@ private:
int m_transmit_state;
/* baud rate timer */
- emu_timer *m_timer;
+ emu_timer *m_timer;
};
@@ -105,6 +105,6 @@ extern const device_type SERIAL;
#define MCFG_SERIAL_ADD(_tag,_config) \
MCFG_DEVICE_ADD(_tag, SERIAL, 0) \
- MCFG_DEVICE_CONFIG(_config) \
+ MCFG_DEVICE_CONFIG(_config) \
#endif /* __SERIAL_H__ */
diff --git a/src/emu/imagedev/snapquik.c b/src/emu/imagedev/snapquik.c
index da87c282611..84db8011af2 100644
--- a/src/emu/imagedev/snapquik.c
+++ b/src/emu/imagedev/snapquik.c
@@ -17,16 +17,16 @@ const device_type SNAPSHOT = &device_creator<snapshot_image_device>;
//-------------------------------------------------
snapshot_image_device::snapshot_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, SNAPSHOT, "Snapshot", tag, owner, clock),
- device_image_interface(mconfig, *this),
- m_delay_attoseconds(0)
+ : device_t(mconfig, SNAPSHOT, "Snapshot", tag, owner, clock),
+ device_image_interface(mconfig, *this),
+ m_delay_attoseconds(0)
{
}
snapshot_image_device::snapshot_image_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
- device_t(mconfig, type, name, tag, owner, clock),
+ device_t(mconfig, type, name, tag, owner, clock),
device_image_interface(mconfig, *this),
- m_delay_attoseconds(0)
+ m_delay_attoseconds(0)
{
}
//-------------------------------------------------
@@ -95,7 +95,6 @@ const device_type QUICKLOAD = &device_creator<quickload_image_device>;
//-------------------------------------------------
quickload_image_device::quickload_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : snapshot_image_device(mconfig, QUICKLOAD, "Quickload", tag, owner, clock)
+ : snapshot_image_device(mconfig, QUICKLOAD, "Quickload", tag, owner, clock)
{
}
-
diff --git a/src/emu/imagedev/snapquik.h b/src/emu/imagedev/snapquik.h
index 67bcdb17d42..00016b66c02 100644
--- a/src/emu/imagedev/snapquik.h
+++ b/src/emu/imagedev/snapquik.h
@@ -12,7 +12,7 @@
typedef int (*snapquick_load_func)(device_image_interface &image, const char *file_type, int file_size);
// ======================> snapshot_image_device
-class snapshot_image_device : public device_t,
+class snapshot_image_device : public device_t,
public device_image_interface
{
public:
@@ -38,14 +38,14 @@ public:
void set_handler(snapquick_load_func load, const char *ext, seconds_t sec) { m_load = load; m_file_extensions = ext; m_delay_seconds = sec; };
protected:
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
- snapquick_load_func m_load; /* loading function */
- const char * m_file_extensions; /* file extensions */
- seconds_t m_delay_seconds; /* loading delay (seconds) */
- attoseconds_t m_delay_attoseconds; /* loading delay (attoseconds) */
- emu_timer *m_timer;
+ snapquick_load_func m_load; /* loading function */
+ const char * m_file_extensions; /* file extensions */
+ seconds_t m_delay_seconds; /* loading delay (seconds) */
+ attoseconds_t m_delay_attoseconds; /* loading delay (attoseconds) */
+ emu_timer *m_timer;
};
// device type definition
@@ -68,18 +68,18 @@ extern const device_type QUICKLOAD;
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
-#define SNAPSHOT_LOAD_NAME(name) snapshot_load_##name
-#define SNAPSHOT_LOAD(name) int SNAPSHOT_LOAD_NAME(name)(device_image_interface &image, const char *file_type, int snapshot_size)
+#define SNAPSHOT_LOAD_NAME(name) snapshot_load_##name
+#define SNAPSHOT_LOAD(name) int SNAPSHOT_LOAD_NAME(name)(device_image_interface &image, const char *file_type, int snapshot_size)
-#define QUICKLOAD_LOAD_NAME(name) quickload_load_##name
-#define QUICKLOAD_LOAD(name) int QUICKLOAD_LOAD_NAME(name)(device_image_interface &image, const char *file_type, int quickload_size)
+#define QUICKLOAD_LOAD_NAME(name) quickload_load_##name
+#define QUICKLOAD_LOAD(name) int QUICKLOAD_LOAD_NAME(name)(device_image_interface &image, const char *file_type, int quickload_size)
#define MCFG_SNAPSHOT_ADD(_tag, _load, _file_extensions, _delay) \
MCFG_DEVICE_ADD(_tag, SNAPSHOT, 0) \
static_cast<snapshot_image_device *>(device)->set_handler(SNAPSHOT_LOAD_NAME(_load), _file_extensions, _delay);
-#define MCFG_QUICKLOAD_ADD(_tag, _load, _file_extensions, _delay) \
+#define MCFG_QUICKLOAD_ADD(_tag, _load, _file_extensions, _delay) \
MCFG_DEVICE_ADD(_tag, QUICKLOAD, 0) \
static_cast<quickload_image_device *>(device)->set_handler(QUICKLOAD_LOAD_NAME(_load), _file_extensions, _delay);
diff --git a/src/emu/info.c b/src/emu/info.c
index f075203cfc0..606fdfe40ea 100644
--- a/src/emu/info.c
+++ b/src/emu/info.c
@@ -201,8 +201,8 @@ const char info_xml_creator::s_dtd_string[] =
info_xml_creator::info_xml_creator(driver_enumerator &drivlist)
: m_output(NULL),
- m_drivlist(drivlist),
- m_lookup_options(m_drivlist.options())
+ m_drivlist(drivlist),
+ m_lookup_options(m_drivlist.options())
{
m_lookup_options.remove_device_options();
}
@@ -696,10 +696,10 @@ void info_xml_creator::output_display(device_t &device, const char *root_tag)
switch (screendev->screen_type())
{
- case SCREEN_TYPE_RASTER: fprintf(m_output, " type=\"raster\""); break;
- case SCREEN_TYPE_VECTOR: fprintf(m_output, " type=\"vector\""); break;
- case SCREEN_TYPE_LCD: fprintf(m_output, " type=\"lcd\""); break;
- default: fprintf(m_output, " type=\"unknown\""); break;
+ case SCREEN_TYPE_RASTER: fprintf(m_output, " type=\"raster\""); break;
+ case SCREEN_TYPE_VECTOR: fprintf(m_output, " type=\"vector\""); break;
+ case SCREEN_TYPE_LCD: fprintf(m_output, " type=\"lcd\""); break;
+ default: fprintf(m_output, " type=\"unknown\""); break;
}
// output the orientation as a string
@@ -812,14 +812,14 @@ void info_xml_creator::output_input(const ioport_list &portlist)
// initialize the list of control types
struct
{
- const char * type; /* general type of input */
- bool analog;
- bool keyb;
- INT32 min; /* analog minimum value */
- INT32 max; /* analog maximum value */
- INT32 sensitivity; /* default analog sensitivity */
- INT32 keydelta; /* default analog keydelta */
- bool reverse; /* default analog reverse setting */
+ const char * type; /* general type of input */
+ bool analog;
+ bool keyb;
+ INT32 min; /* analog minimum value */
+ INT32 max; /* analog maximum value */
+ INT32 sensitivity; /* default analog sensitivity */
+ INT32 keydelta; /* default analog keydelta */
+ bool reverse; /* default analog reverse setting */
} control_info[ANALOG_TYPE_COUNT];
memset(&control_info, 0, sizeof(control_info));
@@ -851,20 +851,20 @@ void info_xml_creator::output_input(const ioport_list &portlist)
switch (field->type())
{
// map which joystick directions are present
- case IPT_JOYSTICK_UP: joytype[0] |= DIR_UP | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICK_DOWN: joytype[0] |= DIR_DOWN | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICK_LEFT: joytype[0] |= DIR_LEFT | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICK_RIGHT: joytype[0] |= DIR_RIGHT | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICK_UP: joytype[0] |= DIR_UP | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICK_DOWN: joytype[0] |= DIR_DOWN | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICK_LEFT: joytype[0] |= DIR_LEFT | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICK_RIGHT: joytype[0] |= DIR_RIGHT | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKLEFT_UP: joytype[1] |= DIR_UP | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKLEFT_DOWN: joytype[1] |= DIR_DOWN | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKLEFT_LEFT: joytype[1] |= DIR_LEFT | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKLEFT_RIGHT: joytype[1] |= DIR_RIGHT | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKLEFT_UP: joytype[1] |= DIR_UP | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKLEFT_DOWN: joytype[1] |= DIR_DOWN | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKLEFT_LEFT: joytype[1] |= DIR_LEFT | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKLEFT_RIGHT: joytype[1] |= DIR_RIGHT | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKRIGHT_UP: joytype[2] |= DIR_UP | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKRIGHT_DOWN: joytype[2] |= DIR_DOWN | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKRIGHT_LEFT: joytype[2] |= DIR_LEFT | ((field->way() == 4) ? DIR_4WAY : 0); break;
- case IPT_JOYSTICKRIGHT_RIGHT: joytype[2] |= DIR_RIGHT | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKRIGHT_UP: joytype[2] |= DIR_UP | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKRIGHT_DOWN: joytype[2] |= DIR_DOWN | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKRIGHT_LEFT: joytype[2] |= DIR_LEFT | ((field->way() == 4) ? DIR_4WAY : 0); break;
+ case IPT_JOYSTICKRIGHT_RIGHT: joytype[2] |= DIR_RIGHT | ((field->way() == 4) ? DIR_4WAY : 0); break;
// mark as an analog input, and get analog stats after switch
case IPT_AD_STICK_X:
@@ -1262,7 +1262,7 @@ void info_xml_creator::output_slots(device_t &device, const char *root_tag)
slot_interface_iterator iter(device);
for (const device_slot_interface *slot = iter.first(); slot != NULL; slot = iter.next())
{
- if (slot->fixed()) continue; // or shall we list these as non-configurable?
+ if (slot->fixed()) continue; // or shall we list these as non-configurable?
if (strcmp(slot->device().tag(), device.tag()))
{
@@ -1273,9 +1273,9 @@ void info_xml_creator::output_slots(device_t &device, const char *root_tag)
fprintf(m_output, "\t\t<slot name=\"%s\">\n", xml_normalize_string(newtag));
/*
- if (slot->slot_interface()[0])
- fprintf(m_output, " interface=\"%s\"", xml_normalize_string(slot->slot_interface()));
- */
+ if (slot->slot_interface()[0])
+ fprintf(m_output, " interface=\"%s\"", xml_normalize_string(slot->slot_interface()));
+ */
const slot_interface* intf = slot->get_slot_interfaces();
for (int i = 0; intf && intf[i].name != NULL && !intf[i].internal; i++)
diff --git a/src/emu/info.h b/src/emu/info.h
index 9a6968fc8d3..98d36d3f12a 100644
--- a/src/emu/info.h
+++ b/src/emu/info.h
@@ -85,12 +85,12 @@ private:
const char *get_merge_name(const hash_collection &romhashes);
// internal state
- FILE * m_output;
- driver_enumerator & m_drivlist;
- emu_options m_lookup_options;
+ FILE * m_output;
+ driver_enumerator & m_drivlist;
+ emu_options m_lookup_options;
static const char s_dtd_string[];
};
-#endif /* __INFO_H__ */
+#endif /* __INFO_H__ */
diff --git a/src/emu/input.c b/src/emu/input.c
index 3932362b7ab..c11382c2081 100644
--- a/src/emu/input.c
+++ b/src/emu/input.c
@@ -56,7 +56,7 @@
//**************************************************************************
// invalid memory value for axis polling
-const INT32 INVALID_AXIS_VALUE = 0x7fffffff;
+const INT32 INVALID_AXIS_VALUE = 0x7fffffff;
// additional expanded input codes for sequences
const input_code input_seq::end_code(DEVICE_CLASS_INTERNAL, 0, ITEM_CLASS_INVALID, ITEM_MODIFIER_NONE, ITEM_ID_SEQ_END);
@@ -107,17 +107,17 @@ public:
protected:
// internal state
- input_device & m_device; // reference to our owning device
- astring m_name; // string name of item
- void * m_internal; // internal callback pointer
- input_item_id m_itemid; // originally specified item id
- input_item_class m_itemclass; // class of the item
- item_get_state_func m_getstate; // get state callback
- astring m_token; // tokenized name for non-standard items
+ input_device & m_device; // reference to our owning device
+ astring m_name; // string name of item
+ void * m_internal; // internal callback pointer
+ input_item_id m_itemid; // originally specified item id
+ input_item_class m_itemclass; // class of the item
+ item_get_state_func m_getstate; // get state callback
+ astring m_token; // tokenized name for non-standard items
// live state
- INT32 m_current; // current raw value
- INT32 m_memory; // "memory" value, to remember where we started during polling
+ INT32 m_current; // current raw value
+ INT32 m_memory; // "memory" value, to remember where we started during polling
};
@@ -141,8 +141,8 @@ public:
private:
// internal state
- INT32 m_steadykey; // the live steadykey state
- INT32 m_oldkey; // old live state
+ INT32 m_steadykey; // the live steadykey state
+ INT32 m_oldkey; // old live state
};
@@ -199,8 +199,8 @@ struct code_string_table
return NULL;
}
- UINT32 m_code;
- const char * m_string;
+ UINT32 m_code;
+ const char * m_string;
};
@@ -426,8 +426,8 @@ static const code_string_table itemid_token_table[] =
{ ITEM_ID_ADD_SWITCH1, "ADDSW1" },
{ ITEM_ID_ADD_SWITCH2, "ADDSW2" },
{ ITEM_ID_ADD_SWITCH3, "ADDSW3" },
- { ITEM_ID_ADD_SWITCH4, "ADDSW4" },
- { ITEM_ID_ADD_SWITCH5, "ADDSW5" },
+ { ITEM_ID_ADD_SWITCH4, "ADDSW4" },
+ { ITEM_ID_ADD_SWITCH5, "ADDSW5" },
{ ITEM_ID_ADD_SWITCH6, "ADDSW6" },
{ ITEM_ID_ADD_SWITCH7, "ADDSW7" },
{ ITEM_ID_ADD_SWITCH8, "ADDSW8" },
@@ -482,9 +482,9 @@ static const code_string_table itemid_token_table[] =
//**************************************************************************
// standard joystick mappings
-const char joystick_map_8way[] = "7778...4445";
-const char joystick_map_4way_sticky[] = "s8.4s8.44s8.4445";
-const char joystick_map_4way_diagonal[] = "4444s8888..444458888.444555888.ss5.222555666.222256666.2222s6666.2222s6666";
+const char joystick_map_8way[] = "7778...4445";
+const char joystick_map_4way_sticky[] = "s8.4s8.44s8.4445";
+const char joystick_map_4way_diagonal[] = "4444s8888..444458888.444555888.ss5.222555666.222256666.2222s6666.2222s6666";
@@ -600,17 +600,17 @@ const char *joystick_map::to_string(astring &string) const
for (int colnum = 0; colnum < 9; colnum++)
switch (m_map[rownum][colnum])
{
- case JOYSTICK_MAP_UP | JOYSTICK_MAP_LEFT: string.catprintf("7"); break;
- case JOYSTICK_MAP_UP: string.catprintf("8"); break;
- case JOYSTICK_MAP_UP | JOYSTICK_MAP_RIGHT: string.catprintf("9"); break;
- case JOYSTICK_MAP_LEFT: string.catprintf("4"); break;
- case JOYSTICK_MAP_NEUTRAL: string.catprintf("5"); break;
- case JOYSTICK_MAP_RIGHT: string.catprintf("6"); break;
- case JOYSTICK_MAP_DOWN | JOYSTICK_MAP_LEFT: string.catprintf("1"); break;
- case JOYSTICK_MAP_DOWN: string.catprintf("2"); break;
- case JOYSTICK_MAP_DOWN | JOYSTICK_MAP_RIGHT:string.catprintf("3"); break;
- case JOYSTICK_MAP_STICKY: string.catprintf("s"); break;
- default: string.catprintf("?"); break;
+ case JOYSTICK_MAP_UP | JOYSTICK_MAP_LEFT: string.catprintf("7"); break;
+ case JOYSTICK_MAP_UP: string.catprintf("8"); break;
+ case JOYSTICK_MAP_UP | JOYSTICK_MAP_RIGHT: string.catprintf("9"); break;
+ case JOYSTICK_MAP_LEFT: string.catprintf("4"); break;
+ case JOYSTICK_MAP_NEUTRAL: string.catprintf("5"); break;
+ case JOYSTICK_MAP_RIGHT: string.catprintf("6"); break;
+ case JOYSTICK_MAP_DOWN | JOYSTICK_MAP_LEFT: string.catprintf("1"); break;
+ case JOYSTICK_MAP_DOWN: string.catprintf("2"); break;
+ case JOYSTICK_MAP_DOWN | JOYSTICK_MAP_RIGHT:string.catprintf("3"); break;
+ case JOYSTICK_MAP_STICKY: string.catprintf("s"); break;
+ default: string.catprintf("?"); break;
}
string.catprintf("\n");
@@ -852,14 +852,14 @@ void input_seq::replace(input_code oldcode, input_code newcode)
input_device::input_device(input_class &_class, int devindex, const char *name, void *internal)
: m_class(_class),
- m_name(name),
- m_devindex(devindex),
- m_maxitem(input_item_id(0)),
- m_internal(internal),
- m_joystick_deadzone((INT32)(_class.manager().machine().options().joystick_deadzone() * INPUT_ABSOLUTE_MAX)),
- m_joystick_saturation((INT32)(_class.manager().machine().options().joystick_saturation() * INPUT_ABSOLUTE_MAX)),
- m_steadykey_enabled(_class.manager().machine().options().steadykey()),
- m_lightgun_reload_button(_class.manager().machine().options().offscreen_reload())
+ m_name(name),
+ m_devindex(devindex),
+ m_maxitem(input_item_id(0)),
+ m_internal(internal),
+ m_joystick_deadzone((INT32)(_class.manager().machine().options().joystick_deadzone() * INPUT_ABSOLUTE_MAX)),
+ m_joystick_saturation((INT32)(_class.manager().machine().options().joystick_saturation() * INPUT_ABSOLUTE_MAX)),
+ m_steadykey_enabled(_class.manager().machine().options().steadykey()),
+ m_lightgun_reload_button(_class.manager().machine().options().offscreen_reload())
{
// reset the items
memset(m_item, 0, sizeof(m_item));
@@ -1014,10 +1014,10 @@ void input_device::apply_steadykey() const
input_class::input_class(input_manager &manager, input_device_class devclass, bool enabled, bool multi)
: m_manager(manager),
- m_devclass(devclass),
- m_maxindex(0),
- m_enabled(enabled),
- m_multi(multi)
+ m_devclass(devclass),
+ m_maxindex(0),
+ m_enabled(enabled),
+ m_multi(multi)
{
memset(m_device, 0, sizeof(m_device));
@@ -1107,12 +1107,12 @@ void input_class::frame_callback()
input_manager::input_manager(running_machine &machine)
: m_machine(machine),
- m_keyboard_class(*this, DEVICE_CLASS_KEYBOARD, true, machine.options().multi_keyboard()),
- m_mouse_class(*this, DEVICE_CLASS_MOUSE, machine.options().mouse(), machine.options().multi_mouse()),
- m_joystick_class(*this, DEVICE_CLASS_JOYSTICK, machine.options().joystick(), true),
- m_lightgun_class(*this, DEVICE_CLASS_LIGHTGUN, machine.options().lightgun(), true),
- m_poll_seq_last_ticks(0),
- m_poll_seq_class(ITEM_CLASS_SWITCH)
+ m_keyboard_class(*this, DEVICE_CLASS_KEYBOARD, true, machine.options().multi_keyboard()),
+ m_mouse_class(*this, DEVICE_CLASS_MOUSE, machine.options().mouse(), machine.options().multi_mouse()),
+ m_joystick_class(*this, DEVICE_CLASS_JOYSTICK, machine.options().joystick(), true),
+ m_lightgun_class(*this, DEVICE_CLASS_LIGHTGUN, machine.options().lightgun(), true),
+ m_poll_seq_last_ticks(0),
+ m_poll_seq_class(ITEM_CLASS_SWITCH)
{
// reset code memory
reset_memory();
@@ -1298,7 +1298,7 @@ input_code input_manager::poll_switches()
if (code_pressed_once(code))
return code;
else
- continue;
+ continue;
}
// skip if there is not enough axis movement
@@ -1393,13 +1393,13 @@ bool input_manager::code_check_axis(input_device_item &item, input_code code)
if (item.memory() == INVALID_AXIS_VALUE)
return false;
- // ignore min/max for lightguns
- // so the selection will not be affected by a gun going out of range
+ // ignore min/max for lightguns
+ // so the selection will not be affected by a gun going out of range
INT32 curval = code_value(code);
- if (code.device_class() == DEVICE_CLASS_LIGHTGUN &&
+ if (code.device_class() == DEVICE_CLASS_LIGHTGUN &&
(code.item_id() == ITEM_ID_XAXIS || code.item_id() == ITEM_ID_YAXIS) &&
(curval == INPUT_ABSOLUTE_MAX || curval == INPUT_ABSOLUTE_MIN))
- return false;
+ return false;
// compute the diff against memory
INT32 diff = curval - item.memory();
@@ -1419,7 +1419,7 @@ bool input_manager::code_check_axis(input_device_item &item, input_code code)
item.set_memory(INVALID_AXIS_VALUE);
return true;
}
- return false;
+ return false;
}
@@ -1950,10 +1950,10 @@ bool input_manager::seq_poll()
// increment the modifier, wrapping back to none
switch (lastcode.item_modifier())
{
- case ITEM_MODIFIER_NONE: newcode.set_item_modifier(ITEM_MODIFIER_POS); break;
- case ITEM_MODIFIER_POS: newcode.set_item_modifier(ITEM_MODIFIER_NEG); break;
+ case ITEM_MODIFIER_NONE: newcode.set_item_modifier(ITEM_MODIFIER_POS); break;
+ case ITEM_MODIFIER_POS: newcode.set_item_modifier(ITEM_MODIFIER_NEG); break;
default:
- case ITEM_MODIFIER_NEG: newcode.set_item_modifier(ITEM_MODIFIER_NONE); break;
+ case ITEM_MODIFIER_NEG: newcode.set_item_modifier(ITEM_MODIFIER_NONE); break;
}
// back up over the previous code so we can re-append
@@ -2164,13 +2164,13 @@ bool input_manager::set_global_joystick_map(const char *mapstring)
input_device_item::input_device_item(input_device &device, const char *name, void *internal, input_item_id itemid, item_get_state_func getstate, input_item_class itemclass)
: m_device(device),
- m_name(name),
- m_internal(internal),
- m_itemid(itemid),
- m_itemclass(itemclass),
- m_getstate(getstate),
- m_current(0),
- m_memory(0)
+ m_name(name),
+ m_internal(internal),
+ m_itemid(itemid),
+ m_itemclass(itemclass),
+ m_getstate(getstate),
+ m_current(0),
+ m_memory(0)
{
// use a standard token name for know item IDs
if (itemid <= ITEM_ID_MAXIMUM && (*itemid_token_table)[itemid] != NULL)
@@ -2193,8 +2193,8 @@ input_device_item::input_device_item(input_device &device, const char *name, voi
input_device_switch_item::input_device_switch_item(input_device &device, const char *name, void *internal, input_item_id itemid, item_get_state_func getstate)
: input_device_item(device, name, internal, itemid, getstate, ITEM_CLASS_SWITCH),
- m_steadykey(0),
- m_oldkey(0)
+ m_steadykey(0),
+ m_oldkey(0)
{
}
diff --git a/src/emu/input.h b/src/emu/input.h
index 2fd586ee664..75144aa89c4 100644
--- a/src/emu/input.h
+++ b/src/emu/input.h
@@ -384,12 +384,12 @@ public:
UINT8 update(INT32 xaxisval, INT32 yaxisval);
// joystick mapping codes
- static const UINT8 JOYSTICK_MAP_NEUTRAL = 0x00;
- static const UINT8 JOYSTICK_MAP_LEFT = 0x01;
- static const UINT8 JOYSTICK_MAP_RIGHT = 0x02;
- static const UINT8 JOYSTICK_MAP_UP = 0x04;
- static const UINT8 JOYSTICK_MAP_DOWN = 0x08;
- static const UINT8 JOYSTICK_MAP_STICKY = 0x0f;
+ static const UINT8 JOYSTICK_MAP_NEUTRAL = 0x00;
+ static const UINT8 JOYSTICK_MAP_LEFT = 0x01;
+ static const UINT8 JOYSTICK_MAP_RIGHT = 0x02;
+ static const UINT8 JOYSTICK_MAP_UP = 0x04;
+ static const UINT8 JOYSTICK_MAP_DOWN = 0x08;
+ static const UINT8 JOYSTICK_MAP_STICKY = 0x0f;
private:
// internal helpers
@@ -401,9 +401,9 @@ private:
}
// internal state
- UINT8 m_map[9][9]; // 9x9 grid
- UINT8 m_lastmap; // last value returned (for sticky tracking)
- astring m_origstring; // originally parsed string
+ UINT8 m_map[9][9]; // 9x9 grid
+ UINT8 m_lastmap; // last value returned (for sticky tracking)
+ astring m_origstring; // originally parsed string
};
@@ -448,7 +448,7 @@ public:
private:
// internal state
- UINT32 m_internal;
+ UINT32 m_internal;
};
@@ -493,7 +493,7 @@ public:
private:
// internal state
- input_code m_code[16];
+ input_code m_code[16];
};
@@ -532,19 +532,19 @@ public:
private:
// internal state
- input_class & m_class; // reference to our class
- astring m_name; // string name of device
- int m_devindex; // device index of this device
- input_device_item * m_item[ITEM_ID_ABSOLUTE_MAXIMUM+1]; // array of pointers to items
- input_item_id m_maxitem; // maximum item index
- void * m_internal; // internal callback pointer
+ input_class & m_class; // reference to our class
+ astring m_name; // string name of device
+ int m_devindex; // device index of this device
+ input_device_item * m_item[ITEM_ID_ABSOLUTE_MAXIMUM+1]; // array of pointers to items
+ input_item_id m_maxitem; // maximum item index
+ void * m_internal; // internal callback pointer
// joystick information
- joystick_map m_joymap; // joystick map for this device
- INT32 m_joystick_deadzone; // deadzone for joystick
- INT32 m_joystick_saturation; // saturation position for joystick
- bool m_steadykey_enabled; // steadykey enabled for keyboards
- bool m_lightgun_reload_button; // lightgun reload hack
+ joystick_map m_joymap; // joystick map for this device
+ INT32 m_joystick_deadzone; // deadzone for joystick
+ INT32 m_joystick_saturation; // saturation position for joystick
+ bool m_steadykey_enabled; // steadykey enabled for keyboards
+ bool m_lightgun_reload_button; // lightgun reload hack
};
@@ -582,12 +582,12 @@ private:
void frame_callback();
// internal state
- input_manager & m_manager; // reference to our manager
- input_device * m_device[DEVICE_INDEX_MAXIMUM]; // array of devices in this class
- input_device_class m_devclass; // our device class
- int m_maxindex; // maximum populated index
- bool m_enabled; // is this class enabled?
- bool m_multi; // are multiple instances of this class allowed?
+ input_manager & m_manager; // reference to our manager
+ input_device * m_device[DEVICE_INDEX_MAXIMUM]; // array of devices in this class
+ input_device_class m_devclass; // our device class
+ int m_maxindex; // maximum populated index
+ bool m_enabled; // is this class enabled?
+ bool m_multi; // are multiple instances of this class allowed?
};
@@ -646,20 +646,20 @@ private:
bool code_check_axis(input_device_item &item, input_code code);
// internal state
- running_machine & m_machine;
- input_code m_switch_memory[64];
+ running_machine & m_machine;
+ input_code m_switch_memory[64];
// classes
- input_class m_keyboard_class;
- input_class m_mouse_class;
- input_class m_joystick_class;
- input_class m_lightgun_class;
- input_class * m_class[DEVICE_CLASS_MAXIMUM];
+ input_class m_keyboard_class;
+ input_class m_mouse_class;
+ input_class m_joystick_class;
+ input_class m_lightgun_class;
+ input_class * m_class[DEVICE_CLASS_MAXIMUM];
// sequence polling state
- input_seq m_poll_seq;
- osd_ticks_t m_poll_seq_last_ticks;
- input_item_class m_poll_seq_class;
+ input_seq m_poll_seq;
+ osd_ticks_t m_poll_seq_last_ticks;
+ input_item_class m_poll_seq_class;
};
@@ -1084,4 +1084,4 @@ inline input_device_class input_device::devclass() const { return m_class.devcla
inline running_machine &input_class::machine() const { return m_manager.machine(); }
-#endif // __INPUT_H__
+#endif // __INPUT_H__
diff --git a/src/emu/ioport.c b/src/emu/ioport.c
index 2c3c2b3aed3..2abe71e2c81 100644
--- a/src/emu/ioport.c
+++ b/src/emu/ioport.c
@@ -134,14 +134,14 @@
// temporary: set this to 1 to enable the originally defined behavior that
// a field specified via PORT_MODIFY which intersects a previously-defined
// field completely wipes out the previous definition
-#define INPUT_PORT_OVERRIDE_FULLY_NUKES_PREVIOUS 1
+#define INPUT_PORT_OVERRIDE_FULLY_NUKES_PREVIOUS 1
//**************************************************************************
// DEBUGGING
//**************************************************************************
-#define LOG_NATURAL_KEYBOARD 0
+#define LOG_NATURAL_KEYBOARD 0
@@ -192,46 +192,46 @@ private:
INT32 apply_inverse_sensitivity(INT32 value) const;
// internal state
- analog_field * m_next; // link to the next analog state for this port
- ioport_field & m_field; // pointer to the input field referenced
+ analog_field * m_next; // link to the next analog state for this port
+ ioport_field & m_field; // pointer to the input field referenced
// adjusted values (right-justified and tweaked)
- UINT8 m_shift; // shift to align final value in the port
- INT32 m_adjdefvalue; // adjusted default value from the config
- INT32 m_adjmin; // adjusted minimum value from the config
- INT32 m_adjmax; // adjusted maximum value from the config
+ UINT8 m_shift; // shift to align final value in the port
+ INT32 m_adjdefvalue; // adjusted default value from the config
+ INT32 m_adjmin; // adjusted minimum value from the config
+ INT32 m_adjmax; // adjusted maximum value from the config
// live values of configurable parameters
- INT32 m_sensitivity; // current live sensitivity (100=normal)
- bool m_reverse; // current live reverse flag
- INT32 m_delta; // current live delta to apply each frame a digital inc/dec key is pressed
- INT32 m_centerdelta; // current live delta to apply each frame no digital inputs are pressed
+ INT32 m_sensitivity; // current live sensitivity (100=normal)
+ bool m_reverse; // current live reverse flag
+ INT32 m_delta; // current live delta to apply each frame a digital inc/dec key is pressed
+ INT32 m_centerdelta; // current live delta to apply each frame no digital inputs are pressed
// live analog value tracking
- INT32 m_accum; // accumulated value (including relative adjustments)
- INT32 m_previous; // previous adjusted value
- INT32 m_previousanalog; // previous analog value
+ INT32 m_accum; // accumulated value (including relative adjustments)
+ INT32 m_previous; // previous adjusted value
+ INT32 m_previousanalog; // previous analog value
// parameters for modifying live values
- INT32 m_minimum; // minimum adjusted value
- INT32 m_maximum; // maximum adjusted value
- INT32 m_center; // center adjusted value for autocentering
- INT32 m_reverse_val; // value where we subtract from to reverse directions
+ INT32 m_minimum; // minimum adjusted value
+ INT32 m_maximum; // maximum adjusted value
+ INT32 m_center; // center adjusted value for autocentering
+ INT32 m_reverse_val; // value where we subtract from to reverse directions
// scaling factors
- INT64 m_scalepos; // scale factor to apply to positive adjusted values
- INT64 m_scaleneg; // scale factor to apply to negative adjusted values
- INT64 m_keyscalepos; // scale factor to apply to the key delta field when pos
- INT64 m_keyscaleneg; // scale factor to apply to the key delta field when neg
- INT64 m_positionalscale; // scale factor to divide a joystick into positions
+ INT64 m_scalepos; // scale factor to apply to positive adjusted values
+ INT64 m_scaleneg; // scale factor to apply to negative adjusted values
+ INT64 m_keyscalepos; // scale factor to apply to the key delta field when pos
+ INT64 m_keyscaleneg; // scale factor to apply to the key delta field when neg
+ INT64 m_positionalscale; // scale factor to divide a joystick into positions
// misc flags
- bool m_absolute; // is this an absolute or relative input?
- bool m_wraps; // does the control wrap around?
- bool m_autocenter; // autocenter this input?
- bool m_single_scale; // scale joystick differently if default is between min/max
- bool m_interpolate; // should we do linear interpolation for mid-frame reads?
- bool m_lastdigital; // was the last modification caused by a digital form?
+ bool m_absolute; // is this an absolute or relative input?
+ bool m_wraps; // does the control wrap around?
+ bool m_autocenter; // autocenter this input?
+ bool m_single_scale; // scale joystick differently if default is between min/max
+ bool m_interpolate; // should we do linear interpolation for mid-frame reads?
+ bool m_lastdigital; // was the last modification caused by a digital form?
};
@@ -254,10 +254,10 @@ public:
private:
// internal state
- dynamic_field * m_next; // linked list of info for this port
- ioport_field & m_field; // reference to the input field
- UINT8 m_shift; // shift to apply to the final result
- ioport_value m_oldval; // last value
+ dynamic_field * m_next; // linked list of info for this port
+ ioport_field & m_field; // reference to the input field
+ UINT8 m_shift; // shift to apply to the final result
+ ioport_value m_oldval; // last value
};
@@ -268,14 +268,14 @@ struct ioport_field_live
ioport_field_live(ioport_field &field, analog_field *analog);
// public state
- analog_field * analog; // pointer to live analog data if this is an analog field
- digital_joystick * joystick; // pointer to digital joystick information
- input_seq seq[SEQ_TYPE_TOTAL];// currently configured input sequences
- ioport_value value; // current value of this port
- UINT8 impulse; // counter for impulse controls
- bool last; // were we pressed last time?
- digital_joystick::direction_t joydir; // digital joystick direction index
- astring name; // overridden name
+ analog_field * analog; // pointer to live analog data if this is an analog field
+ digital_joystick * joystick; // pointer to digital joystick information
+ input_seq seq[SEQ_TYPE_TOTAL];// currently configured input sequences
+ ioport_value value; // current value of this port
+ UINT8 impulse; // counter for impulse controls
+ bool last; // were we pressed last time?
+ digital_joystick::direction_t joydir; // digital joystick direction index
+ astring name; // overridden name
};
@@ -286,12 +286,12 @@ struct ioport_port_live
ioport_port_live(ioport_port &port);
// public state
- simple_list<analog_field> analoglist; // list of analog port info
- simple_list<dynamic_field> readlist; // list of dynamic read fields
- simple_list<dynamic_field> writelist; // list of dynamic write fields
- ioport_value defvalue; // combined default value across the port
- ioport_value digital; // current value from all digital inputs
- ioport_value outputvalue; // current value for outputs
+ simple_list<analog_field> analoglist; // list of analog port info
+ simple_list<dynamic_field> readlist; // list of dynamic read fields
+ simple_list<dynamic_field> writelist; // list of dynamic write fields
+ ioport_value defvalue; // combined default value across the port
+ ioport_value digital; // current value from all digital inputs
+ ioport_value outputvalue; // current value for outputs
};
@@ -300,7 +300,7 @@ struct char_info
{
unicode_char ch;
const char *name;
- const char *alternate; // alternative string, in UTF-8
+ const char *alternate; // alternative string, in UTF-8
static const char_info *find(unicode_char target);
};
@@ -355,296 +355,296 @@ static const char *const seqtypestrings[] = { "standard", "increment", "decremen
// master character info table
static const char_info charinfo[] =
{
- { 0x0008, "Backspace", NULL }, // Backspace
- { 0x0009, "Tab", " " }, // Tab
- { 0x000c, "Clear", NULL }, // Clear
- { 0x000d, "Enter", NULL }, // Enter
- { 0x001a, "Esc", NULL }, // Esc
- { 0x0020, "Space", " " }, // Space
- { 0x0061, NULL, "A" }, // a
- { 0x0062, NULL, "B" }, // b
- { 0x0063, NULL, "C" }, // c
- { 0x0064, NULL, "D" }, // d
- { 0x0065, NULL, "E" }, // e
- { 0x0066, NULL, "F" }, // f
- { 0x0067, NULL, "G" }, // g
- { 0x0068, NULL, "H" }, // h
- { 0x0069, NULL, "I" }, // i
- { 0x006a, NULL, "J" }, // j
- { 0x006b, NULL, "K" }, // k
- { 0x006c, NULL, "L" }, // l
- { 0x006d, NULL, "M" }, // m
- { 0x006e, NULL, "N" }, // n
- { 0x006f, NULL, "O" }, // o
- { 0x0070, NULL, "P" }, // p
- { 0x0071, NULL, "Q" }, // q
- { 0x0072, NULL, "R" }, // r
- { 0x0073, NULL, "S" }, // s
- { 0x0074, NULL, "T" }, // t
- { 0x0075, NULL, "U" }, // u
- { 0x0076, NULL, "V" }, // v
- { 0x0077, NULL, "W" }, // w
- { 0x0078, NULL, "X" }, // x
- { 0x0079, NULL, "Y" }, // y
- { 0x007a, NULL, "Z" }, // z
- { 0x00a0, NULL, " " }, // non breaking space
- { 0x00a1, NULL, "!" }, // inverted exclaimation mark
- { 0x00a6, NULL, "|" }, // broken bar
- { 0x00a9, NULL, "(c)" }, // copyright sign
- { 0x00ab, NULL, "<<" }, // left pointing double angle
- { 0x00ae, NULL, "(r)" }, // registered sign
- { 0x00bb, NULL, ">>" }, // right pointing double angle
- { 0x00bc, NULL, "1/4" }, // vulgar fraction one quarter
- { 0x00bd, NULL, "1/2" }, // vulgar fraction one half
- { 0x00be, NULL, "3/4" }, // vulgar fraction three quarters
- { 0x00bf, NULL, "?" }, // inverted question mark
- { 0x00c0, NULL, "A" }, // 'A' grave
- { 0x00c1, NULL, "A" }, // 'A' acute
- { 0x00c2, NULL, "A" }, // 'A' circumflex
- { 0x00c3, NULL, "A" }, // 'A' tilde
- { 0x00c4, NULL, "A" }, // 'A' diaeresis
- { 0x00c5, NULL, "A" }, // 'A' ring above
- { 0x00c6, NULL, "AE" }, // 'AE' ligature
- { 0x00c7, NULL, "C" }, // 'C' cedilla
- { 0x00c8, NULL, "E" }, // 'E' grave
- { 0x00c9, NULL, "E" }, // 'E' acute
- { 0x00ca, NULL, "E" }, // 'E' circumflex
- { 0x00cb, NULL, "E" }, // 'E' diaeresis
- { 0x00cc, NULL, "I" }, // 'I' grave
- { 0x00cd, NULL, "I" }, // 'I' acute
- { 0x00ce, NULL, "I" }, // 'I' circumflex
- { 0x00cf, NULL, "I" }, // 'I' diaeresis
- { 0x00d0, NULL, "D" }, // 'ETH'
- { 0x00d1, NULL, "N" }, // 'N' tilde
- { 0x00d2, NULL, "O" }, // 'O' grave
- { 0x00d3, NULL, "O" }, // 'O' acute
- { 0x00d4, NULL, "O" }, // 'O' circumflex
- { 0x00d5, NULL, "O" }, // 'O' tilde
- { 0x00d6, NULL, "O" }, // 'O' diaeresis
- { 0x00d7, NULL, "X" }, // multiplication sign
- { 0x00d8, NULL, "O" }, // 'O' stroke
- { 0x00d9, NULL, "U" }, // 'U' grave
- { 0x00da, NULL, "U" }, // 'U' acute
- { 0x00db, NULL, "U" }, // 'U' circumflex
- { 0x00dc, NULL, "U" }, // 'U' diaeresis
- { 0x00dd, NULL, "Y" }, // 'Y' acute
- { 0x00df, NULL, "SS" }, // sharp S
- { 0x00e0, NULL, "a" }, // 'a' grave
- { 0x00e1, NULL, "a" }, // 'a' acute
- { 0x00e2, NULL, "a" }, // 'a' circumflex
- { 0x00e3, NULL, "a" }, // 'a' tilde
- { 0x00e4, NULL, "a" }, // 'a' diaeresis
- { 0x00e5, NULL, "a" }, // 'a' ring above
- { 0x00e6, NULL, "ae" }, // 'ae' ligature
- { 0x00e7, NULL, "c" }, // 'c' cedilla
- { 0x00e8, NULL, "e" }, // 'e' grave
- { 0x00e9, NULL, "e" }, // 'e' acute
- { 0x00ea, NULL, "e" }, // 'e' circumflex
- { 0x00eb, NULL, "e" }, // 'e' diaeresis
- { 0x00ec, NULL, "i" }, // 'i' grave
- { 0x00ed, NULL, "i" }, // 'i' acute
- { 0x00ee, NULL, "i" }, // 'i' circumflex
- { 0x00ef, NULL, "i" }, // 'i' diaeresis
- { 0x00f0, NULL, "d" }, // 'eth'
- { 0x00f1, NULL, "n" }, // 'n' tilde
- { 0x00f2, NULL, "o" }, // 'o' grave
- { 0x00f3, NULL, "o" }, // 'o' acute
- { 0x00f4, NULL, "o" }, // 'o' circumflex
- { 0x00f5, NULL, "o" }, // 'o' tilde
- { 0x00f6, NULL, "o" }, // 'o' diaeresis
- { 0x00f8, NULL, "o" }, // 'o' stroke
- { 0x00f9, NULL, "u" }, // 'u' grave
- { 0x00fa, NULL, "u" }, // 'u' acute
- { 0x00fb, NULL, "u" }, // 'u' circumflex
- { 0x00fc, NULL, "u" }, // 'u' diaeresis
- { 0x00fd, NULL, "y" }, // 'y' acute
- { 0x00ff, NULL, "y" }, // 'y' diaeresis
- { 0x2010, NULL, "-" }, // hyphen
- { 0x2011, NULL, "-" }, // non-breaking hyphen
- { 0x2012, NULL, "-" }, // figure dash
- { 0x2013, NULL, "-" }, // en dash
- { 0x2014, NULL, "-" }, // em dash
- { 0x2015, NULL, "-" }, // horizontal dash
- { 0x2018, NULL, "\'" }, // left single quotation mark
- { 0x2019, NULL, "\'" }, // right single quotation mark
- { 0x201a, NULL, "\'" }, // single low quotation mark
- { 0x201b, NULL, "\'" }, // single high reversed quotation mark
- { 0x201c, NULL, "\"" }, // left double quotation mark
- { 0x201d, NULL, "\"" }, // right double quotation mark
- { 0x201e, NULL, "\"" }, // double low quotation mark
- { 0x201f, NULL, "\"" }, // double high reversed quotation mark
- { 0x2024, NULL, "." }, // one dot leader
- { 0x2025, NULL, ".." }, // two dot leader
- { 0x2026, NULL, "..." }, // horizontal ellipsis
- { 0x2047, NULL, "??" }, // double question mark
- { 0x2048, NULL, "?!" }, // question exclamation mark
- { 0x2049, NULL, "!?" }, // exclamation question mark
- { 0xff01, NULL, "!" }, // fullwidth exclamation point
- { 0xff02, NULL, "\"" }, // fullwidth quotation mark
- { 0xff03, NULL, "#" }, // fullwidth number sign
- { 0xff04, NULL, "$" }, // fullwidth dollar sign
- { 0xff05, NULL, "%" }, // fullwidth percent sign
- { 0xff06, NULL, "&" }, // fullwidth ampersand
- { 0xff07, NULL, "\'" }, // fullwidth apostrophe
- { 0xff08, NULL, "(" }, // fullwidth left parenthesis
- { 0xff09, NULL, ")" }, // fullwidth right parenthesis
- { 0xff0a, NULL, "*" }, // fullwidth asterisk
- { 0xff0b, NULL, "+" }, // fullwidth plus
- { 0xff0c, NULL, "," }, // fullwidth comma
- { 0xff0d, NULL, "-" }, // fullwidth minus
- { 0xff0e, NULL, "." }, // fullwidth period
- { 0xff0f, NULL, "/" }, // fullwidth slash
- { 0xff10, NULL, "0" }, // fullwidth zero
- { 0xff11, NULL, "1" }, // fullwidth one
- { 0xff12, NULL, "2" }, // fullwidth two
- { 0xff13, NULL, "3" }, // fullwidth three
- { 0xff14, NULL, "4" }, // fullwidth four
- { 0xff15, NULL, "5" }, // fullwidth five
- { 0xff16, NULL, "6" }, // fullwidth six
- { 0xff17, NULL, "7" }, // fullwidth seven
- { 0xff18, NULL, "8" }, // fullwidth eight
- { 0xff19, NULL, "9" }, // fullwidth nine
- { 0xff1a, NULL, ":" }, // fullwidth colon
- { 0xff1b, NULL, ";" }, // fullwidth semicolon
- { 0xff1c, NULL, "<" }, // fullwidth less than sign
- { 0xff1d, NULL, "=" }, // fullwidth equals sign
- { 0xff1e, NULL, ">" }, // fullwidth greater than sign
- { 0xff1f, NULL, "?" }, // fullwidth question mark
- { 0xff20, NULL, "@" }, // fullwidth at sign
- { 0xff21, NULL, "A" }, // fullwidth 'A'
- { 0xff22, NULL, "B" }, // fullwidth 'B'
- { 0xff23, NULL, "C" }, // fullwidth 'C'
- { 0xff24, NULL, "D" }, // fullwidth 'D'
- { 0xff25, NULL, "E" }, // fullwidth 'E'
- { 0xff26, NULL, "F" }, // fullwidth 'F'
- { 0xff27, NULL, "G" }, // fullwidth 'G'
- { 0xff28, NULL, "H" }, // fullwidth 'H'
- { 0xff29, NULL, "I" }, // fullwidth 'I'
- { 0xff2a, NULL, "J" }, // fullwidth 'J'
- { 0xff2b, NULL, "K" }, // fullwidth 'K'
- { 0xff2c, NULL, "L" }, // fullwidth 'L'
- { 0xff2d, NULL, "M" }, // fullwidth 'M'
- { 0xff2e, NULL, "N" }, // fullwidth 'N'
- { 0xff2f, NULL, "O" }, // fullwidth 'O'
- { 0xff30, NULL, "P" }, // fullwidth 'P'
- { 0xff31, NULL, "Q" }, // fullwidth 'Q'
- { 0xff32, NULL, "R" }, // fullwidth 'R'
- { 0xff33, NULL, "S" }, // fullwidth 'S'
- { 0xff34, NULL, "T" }, // fullwidth 'T'
- { 0xff35, NULL, "U" }, // fullwidth 'U'
- { 0xff36, NULL, "V" }, // fullwidth 'V'
- { 0xff37, NULL, "W" }, // fullwidth 'W'
- { 0xff38, NULL, "X" }, // fullwidth 'X'
- { 0xff39, NULL, "Y" }, // fullwidth 'Y'
- { 0xff3a, NULL, "Z" }, // fullwidth 'Z'
- { 0xff3b, NULL, "[" }, // fullwidth left bracket
- { 0xff3c, NULL, "\\" }, // fullwidth backslash
- { 0xff3d, NULL, "]" }, // fullwidth right bracket
- { 0xff3e, NULL, "^" }, // fullwidth caret
- { 0xff3f, NULL, "_" }, // fullwidth underscore
- { 0xff40, NULL, "`" }, // fullwidth backquote
- { 0xff41, NULL, "a" }, // fullwidth 'a'
- { 0xff42, NULL, "b" }, // fullwidth 'b'
- { 0xff43, NULL, "c" }, // fullwidth 'c'
- { 0xff44, NULL, "d" }, // fullwidth 'd'
- { 0xff45, NULL, "e" }, // fullwidth 'e'
- { 0xff46, NULL, "f" }, // fullwidth 'f'
- { 0xff47, NULL, "g" }, // fullwidth 'g'
- { 0xff48, NULL, "h" }, // fullwidth 'h'
- { 0xff49, NULL, "i" }, // fullwidth 'i'
- { 0xff4a, NULL, "j" }, // fullwidth 'j'
- { 0xff4b, NULL, "k" }, // fullwidth 'k'
- { 0xff4c, NULL, "l" }, // fullwidth 'l'
- { 0xff4d, NULL, "m" }, // fullwidth 'm'
- { 0xff4e, NULL, "n" }, // fullwidth 'n'
- { 0xff4f, NULL, "o" }, // fullwidth 'o'
- { 0xff50, NULL, "p" }, // fullwidth 'p'
- { 0xff51, NULL, "q" }, // fullwidth 'q'
- { 0xff52, NULL, "r" }, // fullwidth 'r'
- { 0xff53, NULL, "s" }, // fullwidth 's'
- { 0xff54, NULL, "t" }, // fullwidth 't'
- { 0xff55, NULL, "u" }, // fullwidth 'u'
- { 0xff56, NULL, "v" }, // fullwidth 'v'
- { 0xff57, NULL, "w" }, // fullwidth 'w'
- { 0xff58, NULL, "x" }, // fullwidth 'x'
- { 0xff59, NULL, "y" }, // fullwidth 'y'
- { 0xff5a, NULL, "z" }, // fullwidth 'z'
- { 0xff5b, NULL, "{" }, // fullwidth left brace
- { 0xff5c, NULL, "|" }, // fullwidth vertical bar
- { 0xff5d, NULL, "}" }, // fullwidth right brace
- { 0xff5e, NULL, "~" }, // fullwidth tilde
- { 0xff5f, NULL, "((" }, // fullwidth double left parenthesis
- { 0xff60, NULL, "))" }, // fullwidth double right parenthesis
- { 0xffe0, NULL, "\xC2\xA2" }, // fullwidth cent sign
- { 0xffe1, NULL, "\xC2\xA3" }, // fullwidth pound sign
- { 0xffe4, NULL, "\xC2\xA4" }, // fullwidth broken bar
- { 0xffe5, NULL, "\xC2\xA5" }, // fullwidth yen sign
- { 0xffe6, NULL, "\xE2\x82\xA9" }, // fullwidth won sign
- { 0xffe9, NULL, "\xE2\x86\x90" }, // fullwidth left arrow
- { 0xffea, NULL, "\xE2\x86\x91" }, // fullwidth up arrow
- { 0xffeb, NULL, "\xE2\x86\x92" }, // fullwidth right arrow
- { 0xffec, NULL, "\xE2\x86\x93" }, // fullwidth down arrow
- { 0xffed, NULL, "\xE2\x96\xAA" }, // fullwidth solid box
- { 0xffee, NULL, "\xE2\x97\xA6" }, // fullwidth open circle
- { UCHAR_SHIFT_1, "Shift", NULL }, // Shift key
- { UCHAR_SHIFT_2, "Ctrl", NULL }, // Ctrl key
- { UCHAR_MAMEKEY(F1), "F1", NULL }, // F1 function key
- { UCHAR_MAMEKEY(F2), "F2", NULL }, // F2 function key
- { UCHAR_MAMEKEY(F3), "F3", NULL }, // F3 function key
- { UCHAR_MAMEKEY(F4), "F4", NULL }, // F4 function key
- { UCHAR_MAMEKEY(F5), "F5", NULL }, // F5 function key
- { UCHAR_MAMEKEY(F6), "F6", NULL }, // F6 function key
- { UCHAR_MAMEKEY(F7), "F7", NULL }, // F7 function key
- { UCHAR_MAMEKEY(F8), "F8", NULL }, // F8 function key
- { UCHAR_MAMEKEY(F9), "F9", NULL }, // F9 function key
- { UCHAR_MAMEKEY(F10), "F10", NULL }, // F10 function key
- { UCHAR_MAMEKEY(F11), "F11", NULL }, // F11 function key
- { UCHAR_MAMEKEY(F12), "F12", NULL }, // F12 function key
- { UCHAR_MAMEKEY(F13), "F13", NULL }, // F13 function key
- { UCHAR_MAMEKEY(F14), "F14", NULL }, // F14 function key
- { UCHAR_MAMEKEY(F15), "F15", NULL }, // F15 function key
- { UCHAR_MAMEKEY(ESC), "Esc", "\033" }, // Esc key
- { UCHAR_MAMEKEY(INSERT), "Insert", NULL }, // Insert key
- { UCHAR_MAMEKEY(DEL), "Delete", "\010" }, // Delete key
- { UCHAR_MAMEKEY(HOME), "Home", "\014" }, // Home key
- { UCHAR_MAMEKEY(END), "End", NULL }, // End key
- { UCHAR_MAMEKEY(PGUP), "Page Up", NULL }, // Page Up key
- { UCHAR_MAMEKEY(PGDN), "Page Down", NULL }, // Page Down key
- { UCHAR_MAMEKEY(LEFT), "Cursor Left", NULL }, // Cursor Left
- { UCHAR_MAMEKEY(RIGHT), "Cursor Right", NULL }, // Cursor Right
- { UCHAR_MAMEKEY(UP), "Cursor Up", NULL }, // Cursor Up
- { UCHAR_MAMEKEY(DOWN), "Cursor Down", NULL }, // Cursor Down
- { UCHAR_MAMEKEY(0_PAD), "Keypad 0", NULL }, // 0 on the numeric keypad
- { UCHAR_MAMEKEY(1_PAD), "Keypad 1", NULL }, // 1 on the numeric keypad
- { UCHAR_MAMEKEY(2_PAD), "Keypad 2", NULL }, // 2 on the numeric keypad
- { UCHAR_MAMEKEY(3_PAD), "Keypad 3", NULL }, // 3 on the numeric keypad
- { UCHAR_MAMEKEY(4_PAD), "Keypad 4", NULL }, // 4 on the numeric keypad
- { UCHAR_MAMEKEY(5_PAD), "Keypad 5", NULL }, // 5 on the numeric keypad
- { UCHAR_MAMEKEY(6_PAD), "Keypad 6", NULL }, // 6 on the numeric keypad
- { UCHAR_MAMEKEY(7_PAD), "Keypad 7", NULL }, // 7 on the numeric keypad
- { UCHAR_MAMEKEY(8_PAD), "Keypad 8", NULL }, // 8 on the numeric keypad
- { UCHAR_MAMEKEY(9_PAD), "Keypad 9", NULL }, // 9 on the numeric keypad
- { UCHAR_MAMEKEY(SLASH_PAD), "Keypad /", NULL }, // / on the numeric keypad
- { UCHAR_MAMEKEY(ASTERISK), "Keypad *", NULL }, // * on the numeric keypad
- { UCHAR_MAMEKEY(MINUS_PAD), "Keypad -", NULL }, // - on the numeric Keypad
- { UCHAR_MAMEKEY(PLUS_PAD), "Keypad +", NULL }, // + on the numeric Keypad
- { UCHAR_MAMEKEY(DEL_PAD), "Keypad .", NULL }, // . on the numeric keypad
- { UCHAR_MAMEKEY(ENTER_PAD), "Keypad Enter", NULL }, // Enter on the numeric keypad
- { UCHAR_MAMEKEY(PRTSCR), "Print Screen", NULL }, // Print Screen key
- { UCHAR_MAMEKEY(PAUSE), "Pause", NULL }, // Pause key
- { UCHAR_MAMEKEY(LSHIFT), "Left Shift", NULL }, // Left Shift key
- { UCHAR_MAMEKEY(RSHIFT), "Right Shift", NULL }, // Right Shift key
- { UCHAR_MAMEKEY(LCONTROL), "Left Ctrl", NULL }, // Left Control key
- { UCHAR_MAMEKEY(RCONTROL), "Right Ctrl", NULL }, // Right Control key
- { UCHAR_MAMEKEY(LALT), "Left Alt", NULL }, // Left Alt key
- { UCHAR_MAMEKEY(RALT), "Right Alt", NULL }, // Right Alt key
- { UCHAR_MAMEKEY(SCRLOCK), "Scroll Lock", NULL }, // Scroll Lock key
- { UCHAR_MAMEKEY(NUMLOCK), "Num Lock", NULL }, // Num Lock key
- { UCHAR_MAMEKEY(CAPSLOCK), "Caps Lock", NULL }, // Caps Lock key
- { UCHAR_MAMEKEY(LWIN), "Left Win", NULL }, // Left Win key
- { UCHAR_MAMEKEY(RWIN), "Right Win", NULL }, // Right Win key
- { UCHAR_MAMEKEY(MENU), "Menu", NULL }, // Menu key
- { UCHAR_MAMEKEY(CANCEL), "Break", NULL } // Break/Pause key
+ { 0x0008, "Backspace", NULL }, // Backspace
+ { 0x0009, "Tab", " " }, // Tab
+ { 0x000c, "Clear", NULL }, // Clear
+ { 0x000d, "Enter", NULL }, // Enter
+ { 0x001a, "Esc", NULL }, // Esc
+ { 0x0020, "Space", " " }, // Space
+ { 0x0061, NULL, "A" }, // a
+ { 0x0062, NULL, "B" }, // b
+ { 0x0063, NULL, "C" }, // c
+ { 0x0064, NULL, "D" }, // d
+ { 0x0065, NULL, "E" }, // e
+ { 0x0066, NULL, "F" }, // f
+ { 0x0067, NULL, "G" }, // g
+ { 0x0068, NULL, "H" }, // h
+ { 0x0069, NULL, "I" }, // i
+ { 0x006a, NULL, "J" }, // j
+ { 0x006b, NULL, "K" }, // k
+ { 0x006c, NULL, "L" }, // l
+ { 0x006d, NULL, "M" }, // m
+ { 0x006e, NULL, "N" }, // n
+ { 0x006f, NULL, "O" }, // o
+ { 0x0070, NULL, "P" }, // p
+ { 0x0071, NULL, "Q" }, // q
+ { 0x0072, NULL, "R" }, // r
+ { 0x0073, NULL, "S" }, // s
+ { 0x0074, NULL, "T" }, // t
+ { 0x0075, NULL, "U" }, // u
+ { 0x0076, NULL, "V" }, // v
+ { 0x0077, NULL, "W" }, // w
+ { 0x0078, NULL, "X" }, // x
+ { 0x0079, NULL, "Y" }, // y
+ { 0x007a, NULL, "Z" }, // z
+ { 0x00a0, NULL, " " }, // non breaking space
+ { 0x00a1, NULL, "!" }, // inverted exclaimation mark
+ { 0x00a6, NULL, "|" }, // broken bar
+ { 0x00a9, NULL, "(c)" }, // copyright sign
+ { 0x00ab, NULL, "<<" }, // left pointing double angle
+ { 0x00ae, NULL, "(r)" }, // registered sign
+ { 0x00bb, NULL, ">>" }, // right pointing double angle
+ { 0x00bc, NULL, "1/4" }, // vulgar fraction one quarter
+ { 0x00bd, NULL, "1/2" }, // vulgar fraction one half
+ { 0x00be, NULL, "3/4" }, // vulgar fraction three quarters
+ { 0x00bf, NULL, "?" }, // inverted question mark
+ { 0x00c0, NULL, "A" }, // 'A' grave
+ { 0x00c1, NULL, "A" }, // 'A' acute
+ { 0x00c2, NULL, "A" }, // 'A' circumflex
+ { 0x00c3, NULL, "A" }, // 'A' tilde
+ { 0x00c4, NULL, "A" }, // 'A' diaeresis
+ { 0x00c5, NULL, "A" }, // 'A' ring above
+ { 0x00c6, NULL, "AE" }, // 'AE' ligature
+ { 0x00c7, NULL, "C" }, // 'C' cedilla
+ { 0x00c8, NULL, "E" }, // 'E' grave
+ { 0x00c9, NULL, "E" }, // 'E' acute
+ { 0x00ca, NULL, "E" }, // 'E' circumflex
+ { 0x00cb, NULL, "E" }, // 'E' diaeresis
+ { 0x00cc, NULL, "I" }, // 'I' grave
+ { 0x00cd, NULL, "I" }, // 'I' acute
+ { 0x00ce, NULL, "I" }, // 'I' circumflex
+ { 0x00cf, NULL, "I" }, // 'I' diaeresis
+ { 0x00d0, NULL, "D" }, // 'ETH'
+ { 0x00d1, NULL, "N" }, // 'N' tilde
+ { 0x00d2, NULL, "O" }, // 'O' grave
+ { 0x00d3, NULL, "O" }, // 'O' acute
+ { 0x00d4, NULL, "O" }, // 'O' circumflex
+ { 0x00d5, NULL, "O" }, // 'O' tilde
+ { 0x00d6, NULL, "O" }, // 'O' diaeresis
+ { 0x00d7, NULL, "X" }, // multiplication sign
+ { 0x00d8, NULL, "O" }, // 'O' stroke
+ { 0x00d9, NULL, "U" }, // 'U' grave
+ { 0x00da, NULL, "U" }, // 'U' acute
+ { 0x00db, NULL, "U" }, // 'U' circumflex
+ { 0x00dc, NULL, "U" }, // 'U' diaeresis
+ { 0x00dd, NULL, "Y" }, // 'Y' acute
+ { 0x00df, NULL, "SS" }, // sharp S
+ { 0x00e0, NULL, "a" }, // 'a' grave
+ { 0x00e1, NULL, "a" }, // 'a' acute
+ { 0x00e2, NULL, "a" }, // 'a' circumflex
+ { 0x00e3, NULL, "a" }, // 'a' tilde
+ { 0x00e4, NULL, "a" }, // 'a' diaeresis
+ { 0x00e5, NULL, "a" }, // 'a' ring above
+ { 0x00e6, NULL, "ae" }, // 'ae' ligature
+ { 0x00e7, NULL, "c" }, // 'c' cedilla
+ { 0x00e8, NULL, "e" }, // 'e' grave
+ { 0x00e9, NULL, "e" }, // 'e' acute
+ { 0x00ea, NULL, "e" }, // 'e' circumflex
+ { 0x00eb, NULL, "e" }, // 'e' diaeresis
+ { 0x00ec, NULL, "i" }, // 'i' grave
+ { 0x00ed, NULL, "i" }, // 'i' acute
+ { 0x00ee, NULL, "i" }, // 'i' circumflex
+ { 0x00ef, NULL, "i" }, // 'i' diaeresis
+ { 0x00f0, NULL, "d" }, // 'eth'
+ { 0x00f1, NULL, "n" }, // 'n' tilde
+ { 0x00f2, NULL, "o" }, // 'o' grave
+ { 0x00f3, NULL, "o" }, // 'o' acute
+ { 0x00f4, NULL, "o" }, // 'o' circumflex
+ { 0x00f5, NULL, "o" }, // 'o' tilde
+ { 0x00f6, NULL, "o" }, // 'o' diaeresis
+ { 0x00f8, NULL, "o" }, // 'o' stroke
+ { 0x00f9, NULL, "u" }, // 'u' grave
+ { 0x00fa, NULL, "u" }, // 'u' acute
+ { 0x00fb, NULL, "u" }, // 'u' circumflex
+ { 0x00fc, NULL, "u" }, // 'u' diaeresis
+ { 0x00fd, NULL, "y" }, // 'y' acute
+ { 0x00ff, NULL, "y" }, // 'y' diaeresis
+ { 0x2010, NULL, "-" }, // hyphen
+ { 0x2011, NULL, "-" }, // non-breaking hyphen
+ { 0x2012, NULL, "-" }, // figure dash
+ { 0x2013, NULL, "-" }, // en dash
+ { 0x2014, NULL, "-" }, // em dash
+ { 0x2015, NULL, "-" }, // horizontal dash
+ { 0x2018, NULL, "\'" }, // left single quotation mark
+ { 0x2019, NULL, "\'" }, // right single quotation mark
+ { 0x201a, NULL, "\'" }, // single low quotation mark
+ { 0x201b, NULL, "\'" }, // single high reversed quotation mark
+ { 0x201c, NULL, "\"" }, // left double quotation mark
+ { 0x201d, NULL, "\"" }, // right double quotation mark
+ { 0x201e, NULL, "\"" }, // double low quotation mark
+ { 0x201f, NULL, "\"" }, // double high reversed quotation mark
+ { 0x2024, NULL, "." }, // one dot leader
+ { 0x2025, NULL, ".." }, // two dot leader
+ { 0x2026, NULL, "..." }, // horizontal ellipsis
+ { 0x2047, NULL, "??" }, // double question mark
+ { 0x2048, NULL, "?!" }, // question exclamation mark
+ { 0x2049, NULL, "!?" }, // exclamation question mark
+ { 0xff01, NULL, "!" }, // fullwidth exclamation point
+ { 0xff02, NULL, "\"" }, // fullwidth quotation mark
+ { 0xff03, NULL, "#" }, // fullwidth number sign
+ { 0xff04, NULL, "$" }, // fullwidth dollar sign
+ { 0xff05, NULL, "%" }, // fullwidth percent sign
+ { 0xff06, NULL, "&" }, // fullwidth ampersand
+ { 0xff07, NULL, "\'" }, // fullwidth apostrophe
+ { 0xff08, NULL, "(" }, // fullwidth left parenthesis
+ { 0xff09, NULL, ")" }, // fullwidth right parenthesis
+ { 0xff0a, NULL, "*" }, // fullwidth asterisk
+ { 0xff0b, NULL, "+" }, // fullwidth plus
+ { 0xff0c, NULL, "," }, // fullwidth comma
+ { 0xff0d, NULL, "-" }, // fullwidth minus
+ { 0xff0e, NULL, "." }, // fullwidth period
+ { 0xff0f, NULL, "/" }, // fullwidth slash
+ { 0xff10, NULL, "0" }, // fullwidth zero
+ { 0xff11, NULL, "1" }, // fullwidth one
+ { 0xff12, NULL, "2" }, // fullwidth two
+ { 0xff13, NULL, "3" }, // fullwidth three
+ { 0xff14, NULL, "4" }, // fullwidth four
+ { 0xff15, NULL, "5" }, // fullwidth five
+ { 0xff16, NULL, "6" }, // fullwidth six
+ { 0xff17, NULL, "7" }, // fullwidth seven
+ { 0xff18, NULL, "8" }, // fullwidth eight
+ { 0xff19, NULL, "9" }, // fullwidth nine
+ { 0xff1a, NULL, ":" }, // fullwidth colon
+ { 0xff1b, NULL, ";" }, // fullwidth semicolon
+ { 0xff1c, NULL, "<" }, // fullwidth less than sign
+ { 0xff1d, NULL, "=" }, // fullwidth equals sign
+ { 0xff1e, NULL, ">" }, // fullwidth greater than sign
+ { 0xff1f, NULL, "?" }, // fullwidth question mark
+ { 0xff20, NULL, "@" }, // fullwidth at sign
+ { 0xff21, NULL, "A" }, // fullwidth 'A'
+ { 0xff22, NULL, "B" }, // fullwidth 'B'
+ { 0xff23, NULL, "C" }, // fullwidth 'C'
+ { 0xff24, NULL, "D" }, // fullwidth 'D'
+ { 0xff25, NULL, "E" }, // fullwidth 'E'
+ { 0xff26, NULL, "F" }, // fullwidth 'F'
+ { 0xff27, NULL, "G" }, // fullwidth 'G'
+ { 0xff28, NULL, "H" }, // fullwidth 'H'
+ { 0xff29, NULL, "I" }, // fullwidth 'I'
+ { 0xff2a, NULL, "J" }, // fullwidth 'J'
+ { 0xff2b, NULL, "K" }, // fullwidth 'K'
+ { 0xff2c, NULL, "L" }, // fullwidth 'L'
+ { 0xff2d, NULL, "M" }, // fullwidth 'M'
+ { 0xff2e, NULL, "N" }, // fullwidth 'N'
+ { 0xff2f, NULL, "O" }, // fullwidth 'O'
+ { 0xff30, NULL, "P" }, // fullwidth 'P'
+ { 0xff31, NULL, "Q" }, // fullwidth 'Q'
+ { 0xff32, NULL, "R" }, // fullwidth 'R'
+ { 0xff33, NULL, "S" }, // fullwidth 'S'
+ { 0xff34, NULL, "T" }, // fullwidth 'T'
+ { 0xff35, NULL, "U" }, // fullwidth 'U'
+ { 0xff36, NULL, "V" }, // fullwidth 'V'
+ { 0xff37, NULL, "W" }, // fullwidth 'W'
+ { 0xff38, NULL, "X" }, // fullwidth 'X'
+ { 0xff39, NULL, "Y" }, // fullwidth 'Y'
+ { 0xff3a, NULL, "Z" }, // fullwidth 'Z'
+ { 0xff3b, NULL, "[" }, // fullwidth left bracket
+ { 0xff3c, NULL, "\\" }, // fullwidth backslash
+ { 0xff3d, NULL, "]" }, // fullwidth right bracket
+ { 0xff3e, NULL, "^" }, // fullwidth caret
+ { 0xff3f, NULL, "_" }, // fullwidth underscore
+ { 0xff40, NULL, "`" }, // fullwidth backquote
+ { 0xff41, NULL, "a" }, // fullwidth 'a'
+ { 0xff42, NULL, "b" }, // fullwidth 'b'
+ { 0xff43, NULL, "c" }, // fullwidth 'c'
+ { 0xff44, NULL, "d" }, // fullwidth 'd'
+ { 0xff45, NULL, "e" }, // fullwidth 'e'
+ { 0xff46, NULL, "f" }, // fullwidth 'f'
+ { 0xff47, NULL, "g" }, // fullwidth 'g'
+ { 0xff48, NULL, "h" }, // fullwidth 'h'
+ { 0xff49, NULL, "i" }, // fullwidth 'i'
+ { 0xff4a, NULL, "j" }, // fullwidth 'j'
+ { 0xff4b, NULL, "k" }, // fullwidth 'k'
+ { 0xff4c, NULL, "l" }, // fullwidth 'l'
+ { 0xff4d, NULL, "m" }, // fullwidth 'm'
+ { 0xff4e, NULL, "n" }, // fullwidth 'n'
+ { 0xff4f, NULL, "o" }, // fullwidth 'o'
+ { 0xff50, NULL, "p" }, // fullwidth 'p'
+ { 0xff51, NULL, "q" }, // fullwidth 'q'
+ { 0xff52, NULL, "r" }, // fullwidth 'r'
+ { 0xff53, NULL, "s" }, // fullwidth 's'
+ { 0xff54, NULL, "t" }, // fullwidth 't'
+ { 0xff55, NULL, "u" }, // fullwidth 'u'
+ { 0xff56, NULL, "v" }, // fullwidth 'v'
+ { 0xff57, NULL, "w" }, // fullwidth 'w'
+ { 0xff58, NULL, "x" }, // fullwidth 'x'
+ { 0xff59, NULL, "y" }, // fullwidth 'y'
+ { 0xff5a, NULL, "z" }, // fullwidth 'z'
+ { 0xff5b, NULL, "{" }, // fullwidth left brace
+ { 0xff5c, NULL, "|" }, // fullwidth vertical bar
+ { 0xff5d, NULL, "}" }, // fullwidth right brace
+ { 0xff5e, NULL, "~" }, // fullwidth tilde
+ { 0xff5f, NULL, "((" }, // fullwidth double left parenthesis
+ { 0xff60, NULL, "))" }, // fullwidth double right parenthesis
+ { 0xffe0, NULL, "\xC2\xA2" }, // fullwidth cent sign
+ { 0xffe1, NULL, "\xC2\xA3" }, // fullwidth pound sign
+ { 0xffe4, NULL, "\xC2\xA4" }, // fullwidth broken bar
+ { 0xffe5, NULL, "\xC2\xA5" }, // fullwidth yen sign
+ { 0xffe6, NULL, "\xE2\x82\xA9" }, // fullwidth won sign
+ { 0xffe9, NULL, "\xE2\x86\x90" }, // fullwidth left arrow
+ { 0xffea, NULL, "\xE2\x86\x91" }, // fullwidth up arrow
+ { 0xffeb, NULL, "\xE2\x86\x92" }, // fullwidth right arrow
+ { 0xffec, NULL, "\xE2\x86\x93" }, // fullwidth down arrow
+ { 0xffed, NULL, "\xE2\x96\xAA" }, // fullwidth solid box
+ { 0xffee, NULL, "\xE2\x97\xA6" }, // fullwidth open circle
+ { UCHAR_SHIFT_1, "Shift", NULL }, // Shift key
+ { UCHAR_SHIFT_2, "Ctrl", NULL }, // Ctrl key
+ { UCHAR_MAMEKEY(F1), "F1", NULL }, // F1 function key
+ { UCHAR_MAMEKEY(F2), "F2", NULL }, // F2 function key
+ { UCHAR_MAMEKEY(F3), "F3", NULL }, // F3 function key
+ { UCHAR_MAMEKEY(F4), "F4", NULL }, // F4 function key
+ { UCHAR_MAMEKEY(F5), "F5", NULL }, // F5 function key
+ { UCHAR_MAMEKEY(F6), "F6", NULL }, // F6 function key
+ { UCHAR_MAMEKEY(F7), "F7", NULL }, // F7 function key
+ { UCHAR_MAMEKEY(F8), "F8", NULL }, // F8 function key
+ { UCHAR_MAMEKEY(F9), "F9", NULL }, // F9 function key
+ { UCHAR_MAMEKEY(F10), "F10", NULL }, // F10 function key
+ { UCHAR_MAMEKEY(F11), "F11", NULL }, // F11 function key
+ { UCHAR_MAMEKEY(F12), "F12", NULL }, // F12 function key
+ { UCHAR_MAMEKEY(F13), "F13", NULL }, // F13 function key
+ { UCHAR_MAMEKEY(F14), "F14", NULL }, // F14 function key
+ { UCHAR_MAMEKEY(F15), "F15", NULL }, // F15 function key
+ { UCHAR_MAMEKEY(ESC), "Esc", "\033" }, // Esc key
+ { UCHAR_MAMEKEY(INSERT), "Insert", NULL }, // Insert key
+ { UCHAR_MAMEKEY(DEL), "Delete", "\010" }, // Delete key
+ { UCHAR_MAMEKEY(HOME), "Home", "\014" }, // Home key
+ { UCHAR_MAMEKEY(END), "End", NULL }, // End key
+ { UCHAR_MAMEKEY(PGUP), "Page Up", NULL }, // Page Up key
+ { UCHAR_MAMEKEY(PGDN), "Page Down", NULL }, // Page Down key
+ { UCHAR_MAMEKEY(LEFT), "Cursor Left", NULL }, // Cursor Left
+ { UCHAR_MAMEKEY(RIGHT), "Cursor Right", NULL }, // Cursor Right
+ { UCHAR_MAMEKEY(UP), "Cursor Up", NULL }, // Cursor Up
+ { UCHAR_MAMEKEY(DOWN), "Cursor Down", NULL }, // Cursor Down
+ { UCHAR_MAMEKEY(0_PAD), "Keypad 0", NULL }, // 0 on the numeric keypad
+ { UCHAR_MAMEKEY(1_PAD), "Keypad 1", NULL }, // 1 on the numeric keypad
+ { UCHAR_MAMEKEY(2_PAD), "Keypad 2", NULL }, // 2 on the numeric keypad
+ { UCHAR_MAMEKEY(3_PAD), "Keypad 3", NULL }, // 3 on the numeric keypad
+ { UCHAR_MAMEKEY(4_PAD), "Keypad 4", NULL }, // 4 on the numeric keypad
+ { UCHAR_MAMEKEY(5_PAD), "Keypad 5", NULL }, // 5 on the numeric keypad
+ { UCHAR_MAMEKEY(6_PAD), "Keypad 6", NULL }, // 6 on the numeric keypad
+ { UCHAR_MAMEKEY(7_PAD), "Keypad 7", NULL }, // 7 on the numeric keypad
+ { UCHAR_MAMEKEY(8_PAD), "Keypad 8", NULL }, // 8 on the numeric keypad
+ { UCHAR_MAMEKEY(9_PAD), "Keypad 9", NULL }, // 9 on the numeric keypad
+ { UCHAR_MAMEKEY(SLASH_PAD), "Keypad /", NULL }, // / on the numeric keypad
+ { UCHAR_MAMEKEY(ASTERISK), "Keypad *", NULL }, // * on the numeric keypad
+ { UCHAR_MAMEKEY(MINUS_PAD), "Keypad -", NULL }, // - on the numeric Keypad
+ { UCHAR_MAMEKEY(PLUS_PAD), "Keypad +", NULL }, // + on the numeric Keypad
+ { UCHAR_MAMEKEY(DEL_PAD), "Keypad .", NULL }, // . on the numeric keypad
+ { UCHAR_MAMEKEY(ENTER_PAD), "Keypad Enter", NULL }, // Enter on the numeric keypad
+ { UCHAR_MAMEKEY(PRTSCR), "Print Screen", NULL }, // Print Screen key
+ { UCHAR_MAMEKEY(PAUSE), "Pause", NULL }, // Pause key
+ { UCHAR_MAMEKEY(LSHIFT), "Left Shift", NULL }, // Left Shift key
+ { UCHAR_MAMEKEY(RSHIFT), "Right Shift", NULL }, // Right Shift key
+ { UCHAR_MAMEKEY(LCONTROL), "Left Ctrl", NULL }, // Left Control key
+ { UCHAR_MAMEKEY(RCONTROL), "Right Ctrl", NULL }, // Right Control key
+ { UCHAR_MAMEKEY(LALT), "Left Alt", NULL }, // Left Alt key
+ { UCHAR_MAMEKEY(RALT), "Right Alt", NULL }, // Right Alt key
+ { UCHAR_MAMEKEY(SCRLOCK), "Scroll Lock", NULL }, // Scroll Lock key
+ { UCHAR_MAMEKEY(NUMLOCK), "Num Lock", NULL }, // Num Lock key
+ { UCHAR_MAMEKEY(CAPSLOCK), "Caps Lock", NULL }, // Caps Lock key
+ { UCHAR_MAMEKEY(LWIN), "Left Win", NULL }, // Left Win key
+ { UCHAR_MAMEKEY(RWIN), "Right Win", NULL }, // Right Win key
+ { UCHAR_MAMEKEY(MENU), "Menu", NULL }, // Menu key
+ { UCHAR_MAMEKEY(CANCEL), "Break", NULL } // Break/Pause key
};
@@ -833,22 +833,22 @@ void ioport_list::append(device_t &device, astring &errorbuf)
input_type_entry::input_type_entry(ioport_type type, ioport_group group, int player, const char *token, const char *name, input_seq standard)
: m_next(NULL),
- m_type(type),
- m_group(group),
- m_player(player),
- m_token(token),
- m_name(name)
+ m_type(type),
+ m_group(group),
+ m_player(player),
+ m_token(token),
+ m_name(name)
{
m_defseq[SEQ_TYPE_STANDARD] = m_seq[SEQ_TYPE_STANDARD] = standard;
}
input_type_entry::input_type_entry(ioport_type type, ioport_group group, int player, const char *token, const char *name, input_seq standard, input_seq decrement, input_seq increment)
: m_next(NULL),
- m_type(type),
- m_group(group),
- m_player(player),
- m_token(token),
- m_name(name)
+ m_type(type),
+ m_group(group),
+ m_player(player),
+ m_token(token),
+ m_name(name)
{
m_defseq[SEQ_TYPE_STANDARD] = m_seq[SEQ_TYPE_STANDARD] = standard;
m_defseq[SEQ_TYPE_INCREMENT] = m_seq[SEQ_TYPE_INCREMENT] = increment;
@@ -879,10 +879,10 @@ void input_type_entry::configure_osd(const char *token, const char *name)
digital_joystick::digital_joystick(int player, int number)
: m_player(player),
- m_number(number),
- m_current(0),
- m_current4way(0),
- m_previous(0)
+ m_number(number),
+ m_current(0),
+ m_current4way(0),
+ m_previous(0)
{
}
@@ -984,12 +984,12 @@ void digital_joystick::frame_update()
natural_keyboard::natural_keyboard(running_machine &machine)
: m_machine(machine),
- m_bufbegin(0),
- m_bufend(0),
- m_status_keydown(false),
- m_last_cr(false),
- m_timer(NULL),
- m_current_rate(attotime::zero)
+ m_bufbegin(0),
+ m_bufend(0),
+ m_status_keydown(false),
+ m_last_cr(false),
+ m_timer(NULL),
+ m_current_rate(attotime::zero)
{
m_queue_chars = ioport_queue_chars_delegate();
m_accept_char = ioport_accept_char_delegate();
@@ -1147,34 +1147,34 @@ void natural_keyboard::post_coded(const char *text, size_t length, attotime rate
unicode_char code;
} codes[] =
{
- { "BACKSPACE", 8 },
- { "BS", 8 },
- { "BKSP", 8 },
- { "DEL", UCHAR_MAMEKEY(DEL) },
- { "DELETE", UCHAR_MAMEKEY(DEL) },
- { "END", UCHAR_MAMEKEY(END) },
- { "ENTER", 13 },
- { "ESC", '\033' },
- { "HOME", UCHAR_MAMEKEY(HOME) },
- { "INS", UCHAR_MAMEKEY(INSERT) },
- { "INSERT", UCHAR_MAMEKEY(INSERT) },
- { "PGDN", UCHAR_MAMEKEY(PGDN) },
- { "PGUP", UCHAR_MAMEKEY(PGUP) },
- { "SPACE", 32 },
- { "TAB", 9 },
- { "F1", UCHAR_MAMEKEY(F1) },
- { "F2", UCHAR_MAMEKEY(F2) },
- { "F3", UCHAR_MAMEKEY(F3) },
- { "F4", UCHAR_MAMEKEY(F4) },
- { "F5", UCHAR_MAMEKEY(F5) },
- { "F6", UCHAR_MAMEKEY(F6) },
- { "F7", UCHAR_MAMEKEY(F7) },
- { "F8", UCHAR_MAMEKEY(F8) },
- { "F9", UCHAR_MAMEKEY(F9) },
- { "F10", UCHAR_MAMEKEY(F10) },
- { "F11", UCHAR_MAMEKEY(F11) },
- { "F12", UCHAR_MAMEKEY(F12) },
- { "QUOTE", '\"' }
+ { "BACKSPACE", 8 },
+ { "BS", 8 },
+ { "BKSP", 8 },
+ { "DEL", UCHAR_MAMEKEY(DEL) },
+ { "DELETE", UCHAR_MAMEKEY(DEL) },
+ { "END", UCHAR_MAMEKEY(END) },
+ { "ENTER", 13 },
+ { "ESC", '\033' },
+ { "HOME", UCHAR_MAMEKEY(HOME) },
+ { "INS", UCHAR_MAMEKEY(INSERT) },
+ { "INSERT", UCHAR_MAMEKEY(INSERT) },
+ { "PGDN", UCHAR_MAMEKEY(PGDN) },
+ { "PGUP", UCHAR_MAMEKEY(PGUP) },
+ { "SPACE", 32 },
+ { "TAB", 9 },
+ { "F1", UCHAR_MAMEKEY(F1) },
+ { "F2", UCHAR_MAMEKEY(F2) },
+ { "F3", UCHAR_MAMEKEY(F3) },
+ { "F4", UCHAR_MAMEKEY(F4) },
+ { "F5", UCHAR_MAMEKEY(F5) },
+ { "F6", UCHAR_MAMEKEY(F6) },
+ { "F7", UCHAR_MAMEKEY(F7) },
+ { "F8", UCHAR_MAMEKEY(F8) },
+ { "F9", UCHAR_MAMEKEY(F9) },
+ { "F10", UCHAR_MAMEKEY(F10) },
+ { "F11", UCHAR_MAMEKEY(F11) },
+ { "F12", UCHAR_MAMEKEY(F12) },
+ { "QUOTE", '\"' }
};
// set the fixed rate
@@ -1398,10 +1398,10 @@ const char *natural_keyboard::unicode_to_string(astring &buffer, unicode_char ch
switch (ch)
{
// check some magic values
- case '\0': buffer.cpy("\\0"); break;
- case '\r': buffer.cpy("\\r"); break;
- case '\n': buffer.cpy("\\n"); break;
- case '\t': buffer.cpy("\\t"); break;
+ case '\0': buffer.cpy("\\0"); break;
+ case '\r': buffer.cpy("\\r"); break;
+ case '\n': buffer.cpy("\\n"); break;
+ case '\t': buffer.cpy("\\t"); break;
default:
// seven bit ASCII is easy
@@ -1572,13 +1572,13 @@ bool ioport_condition::eval(device_t &device) const
ioport_value condvalue = device.ioport(m_tag)->read();
switch (m_condition)
{
- case ALWAYS: return true;
- case EQUALS: return ((condvalue & m_mask) == m_value);
- case NOTEQUALS: return ((condvalue & m_mask) != m_value);
- case GREATERTHAN: return ((condvalue & m_mask) > m_value);
- case NOTGREATERTHAN: return ((condvalue & m_mask) <= m_value);
- case LESSTHAN: return ((condvalue & m_mask) < m_value);
- case NOTLESSTHAN: return ((condvalue & m_mask) >= m_value);
+ case ALWAYS: return true;
+ case EQUALS: return ((condvalue & m_mask) == m_value);
+ case NOTEQUALS: return ((condvalue & m_mask) != m_value);
+ case GREATERTHAN: return ((condvalue & m_mask) > m_value);
+ case NOTGREATERTHAN: return ((condvalue & m_mask) <= m_value);
+ case LESSTHAN: return ((condvalue & m_mask) < m_value);
+ case NOTLESSTHAN: return ((condvalue & m_mask) >= m_value);
}
return true;
}
@@ -1595,9 +1595,9 @@ bool ioport_condition::eval(device_t &device) const
ioport_setting::ioport_setting(ioport_field &field, ioport_value _value, const char *_name)
: m_next(NULL),
- m_field(field),
- m_value(_value),
- m_name(_name)
+ m_field(field),
+ m_value(_value),
+ m_name(_name)
{
}
@@ -1613,9 +1613,9 @@ ioport_setting::ioport_setting(ioport_field &field, ioport_value _value, const c
ioport_diplocation::ioport_diplocation(const char *name, UINT8 swnum, bool invert)
: m_next(NULL),
- m_name(name),
- m_number(swnum),
- m_invert(invert)
+ m_name(name),
+ m_number(swnum),
+ m_invert(invert)
{
}
@@ -1631,30 +1631,30 @@ ioport_diplocation::ioport_diplocation(const char *name, UINT8 swnum, bool inver
ioport_field::ioport_field(ioport_port &port, ioport_type type, ioport_value defvalue, ioport_value maskbits, const char *name)
: m_next(NULL),
- m_port(port),
- m_live(NULL),
- m_modcount(port.modcount()),
- m_mask(maskbits),
- m_defvalue(defvalue & maskbits),
- m_type(type),
- m_player(0),
- m_flags(0),
- m_impulse(0),
- m_name(name),
- m_read_param(NULL),
- m_write_param(NULL),
- m_min(0),
- m_max(maskbits),
- m_sensitivity(0),
- m_delta(0),
- m_centerdelta(0),
- m_crosshair_axis(CROSSHAIR_AXIS_NONE),
- m_crosshair_scale(1.0),
- m_crosshair_offset(0),
- m_crosshair_altaxis(0),
- m_full_turn_count(0),
- m_remap_table(NULL),
- m_way(0)
+ m_port(port),
+ m_live(NULL),
+ m_modcount(port.modcount()),
+ m_mask(maskbits),
+ m_defvalue(defvalue & maskbits),
+ m_type(type),
+ m_player(0),
+ m_flags(0),
+ m_impulse(0),
+ m_name(name),
+ m_read_param(NULL),
+ m_write_param(NULL),
+ m_min(0),
+ m_max(maskbits),
+ m_sensitivity(0),
+ m_delta(0),
+ m_centerdelta(0),
+ m_crosshair_axis(CROSSHAIR_AXIS_NONE),
+ m_crosshair_scale(1.0),
+ m_crosshair_offset(0),
+ m_crosshair_altaxis(0),
+ m_full_turn_count(0),
+ m_remap_table(NULL),
+ m_way(0)
{
// reset sequences and chars
for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
@@ -2311,11 +2311,11 @@ void ioport_field::init_live_state(analog_field *analog)
ioport_field_live::ioport_field_live(ioport_field &field, analog_field *analog)
: analog(analog),
- joystick(NULL),
- value(field.defvalue()),
- impulse(0),
- last(0),
- joydir(digital_joystick::JOYDIR_COUNT)
+ joystick(NULL),
+ value(field.defvalue()),
+ impulse(0),
+ last(0),
+ joydir(digital_joystick::JOYDIR_COUNT)
{
// fill in the basic values
for (input_seq_type seqtype = SEQ_TYPE_STANDARD; seqtype < SEQ_TYPE_TOTAL; seqtype++)
@@ -2362,11 +2362,11 @@ ioport_field_live::ioport_field_live(ioport_field &field, analog_field *analog)
ioport_port::ioport_port(device_t &owner, const char *tag)
: m_next(NULL),
- m_device(owner),
- m_tag(tag),
- m_modcount(0),
- m_active(0),
- m_live(NULL)
+ m_device(owner),
+ m_tag(tag),
+ m_modcount(0),
+ m_active(0),
+ m_live(NULL)
{
}
@@ -2572,8 +2572,8 @@ void ioport_port::init_live_state()
ioport_port_live::ioport_port_live(ioport_port &port)
: defvalue(0),
- digital(0),
- outputvalue(0)
+ digital(0),
+ outputvalue(0)
{
// iterate over fields
for (ioport_field *field = port.first_field(); field != NULL; field = field->next())
@@ -2608,14 +2608,14 @@ ioport_port_live::ioport_port_live(ioport_port &port)
ioport_manager::ioport_manager(running_machine &machine)
: m_machine(machine),
- m_safe_to_read(false),
- m_natkeyboard(machine),
- m_last_frame_time(attotime::zero),
- m_last_delta_nsec(0),
- m_record_file(machine.options().input_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS),
- m_playback_file(machine.options().input_directory(), OPEN_FLAG_READ),
- m_playback_accumulated_speed(0),
- m_playback_accumulated_frames(0)
+ m_safe_to_read(false),
+ m_natkeyboard(machine),
+ m_last_frame_time(attotime::zero),
+ m_last_delta_nsec(0),
+ m_record_file(machine.options().input_directory(), OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS),
+ m_playback_file(machine.options().input_directory(), OPEN_FLAG_READ),
+ m_playback_accumulated_speed(0),
+ m_playback_accumulated_frames(0)
{
memset(m_type_to_entry, 0, sizeof(m_type_to_entry));
}
@@ -3753,11 +3753,11 @@ void ioport_manager::record_port(ioport_port &port)
ioport_configurer::ioport_configurer(device_t &owner, ioport_list &portlist, astring &errorbuf)
: m_owner(owner),
- m_portlist(portlist),
- m_errorbuf(errorbuf),
- m_curport(NULL),
- m_curfield(NULL),
- m_cursetting(NULL)
+ m_portlist(portlist),
+ m_errorbuf(errorbuf),
+ m_curport(NULL),
+ m_curfield(NULL),
+ m_cursetting(NULL)
{
}
@@ -3975,9 +3975,9 @@ const char_info *char_info::find(unicode_char target)
dynamic_field::dynamic_field(ioport_field &field)
: m_next(NULL),
- m_field(field),
- m_shift(0),
- m_oldval(field.defvalue())
+ m_field(field),
+ m_shift(0),
+ m_oldval(field.defvalue())
{
// fill in the data
for (ioport_value mask = field.mask(); !(mask & 1); mask >>= 1)
@@ -4033,33 +4033,33 @@ void dynamic_field::write(ioport_value newval)
analog_field::analog_field(ioport_field &field)
: m_next(NULL),
- m_field(field),
- m_shift(0),
- m_adjdefvalue(field.defvalue() & field.mask()),
- m_adjmin(field.minval() & field.mask()),
- m_adjmax(field.maxval() & field.mask()),
- m_sensitivity(field.sensitivity()),
- m_reverse(field.analog_reverse()),
- m_delta(field.delta()),
- m_centerdelta(field.centerdelta()),
- m_accum(0),
- m_previous(0),
- m_previousanalog(0),
- m_minimum(INPUT_ABSOLUTE_MIN),
- m_maximum(INPUT_ABSOLUTE_MAX),
- m_center(0),
- m_reverse_val(0),
- m_scalepos(0),
- m_scaleneg(0),
- m_keyscalepos(0),
- m_keyscaleneg(0),
- m_positionalscale(0),
- m_absolute(false),
- m_wraps(false),
- m_autocenter(false),
- m_single_scale(false),
- m_interpolate(false),
- m_lastdigital(false)
+ m_field(field),
+ m_shift(0),
+ m_adjdefvalue(field.defvalue() & field.mask()),
+ m_adjmin(field.minval() & field.mask()),
+ m_adjmax(field.maxval() & field.mask()),
+ m_sensitivity(field.sensitivity()),
+ m_reverse(field.analog_reverse()),
+ m_delta(field.delta()),
+ m_centerdelta(field.centerdelta()),
+ m_accum(0),
+ m_previous(0),
+ m_previousanalog(0),
+ m_minimum(INPUT_ABSOLUTE_MIN),
+ m_maximum(INPUT_ABSOLUTE_MAX),
+ m_center(0),
+ m_reverse_val(0),
+ m_scalepos(0),
+ m_scaleneg(0),
+ m_keyscalepos(0),
+ m_keyscaleneg(0),
+ m_positionalscale(0),
+ m_absolute(false),
+ m_wraps(false),
+ m_autocenter(false),
+ m_single_scale(false),
+ m_interpolate(false),
+ m_lastdigital(false)
{
// compute the shift amount and number of bits
for (ioport_value mask = field.mask(); !(mask & 1); mask >>= 1)
@@ -4586,5 +4586,3 @@ int validate_natural_keyboard_statics(void)
return error;
}
*/
-
-
diff --git a/src/emu/ioport.h b/src/emu/ioport.h
index 4da0ca0a61e..869b7ded52e 100644
--- a/src/emu/ioport.h
+++ b/src/emu/ioport.h
@@ -171,10 +171,10 @@ enum ioport_type
IPT_INTERLOCK,
IPT_VOLUME_UP,
IPT_VOLUME_DOWN,
- IPT_START, // MESS only
- IPT_SELECT, // MESS only
- IPT_KEYPAD, // MESS only
- IPT_KEYBOARD, // MESS only
+ IPT_START, // MESS only
+ IPT_SELECT, // MESS only
+ IPT_KEYPAD, // MESS only
+ IPT_KEYBOARD, // MESS only
// digital joystick inputs
IPT_DIGITAL_JOYSTICK_FIRST,
@@ -238,7 +238,7 @@ enum ioport_type
IPT_MAHJONG_KAN,
IPT_MAHJONG_PON,
IPT_MAHJONG_CHI,
- IPT_MAHJONG_REACH, //IPT_MAHJONG_RIICHI, // REACH is Japanglish
+ IPT_MAHJONG_REACH, //IPT_MAHJONG_RIICHI, // REACH is Japanglish
IPT_MAHJONG_RON,
IPT_MAHJONG_BET,
IPT_MAHJONG_LAST_CHANCE,
@@ -269,25 +269,25 @@ enum ioport_type
// gambling inputs
IPT_GAMBLING_FIRST,
- IPT_GAMBLE_KEYIN, // attendant
- IPT_GAMBLE_KEYOUT, // attendant
- IPT_GAMBLE_SERVICE, // attendant
- IPT_GAMBLE_BOOK, // attendant
- IPT_GAMBLE_DOOR, // attendant
+ IPT_GAMBLE_KEYIN, // attendant
+ IPT_GAMBLE_KEYOUT, // attendant
+ IPT_GAMBLE_SERVICE, // attendant
+ IPT_GAMBLE_BOOK, // attendant
+ IPT_GAMBLE_DOOR, // attendant
// IPT_GAMBLE_DOOR2, // many gambling games have several doors.
// IPT_GAMBLE_DOOR3,
// IPT_GAMBLE_DOOR4,
// IPT_GAMBLE_DOOR5,
- IPT_GAMBLE_HIGH, // player
- IPT_GAMBLE_LOW, // player
- IPT_GAMBLE_HALF, // player
- IPT_GAMBLE_DEAL, // player
- IPT_GAMBLE_D_UP, // player
- IPT_GAMBLE_TAKE, // player
- IPT_GAMBLE_STAND, // player
- IPT_GAMBLE_BET, // player
- IPT_GAMBLE_PAYOUT, // player
+ IPT_GAMBLE_HIGH, // player
+ IPT_GAMBLE_LOW, // player
+ IPT_GAMBLE_HALF, // player
+ IPT_GAMBLE_DEAL, // player
+ IPT_GAMBLE_D_UP, // player
+ IPT_GAMBLE_TAKE, // player
+ IPT_GAMBLE_STAND, // player
+ IPT_GAMBLE_BET, // player
+ IPT_GAMBLE_PAYOUT, // player
// IPT_GAMBLE_BUTTON1, // player
// IPT_GAMBLE_BUTTON2, // many many gambling games have multi-games and/or multi-function-buttons
// IPT_GAMBLE_BUTTON3, // I suggest to eliminate specific names
@@ -328,27 +328,27 @@ enum ioport_type
IPT_ANALOG_ABSOLUTE_FIRST,
- IPT_AD_STICK_X, // absolute // autocenter
- IPT_AD_STICK_Y, // absolute // autocenter
- IPT_AD_STICK_Z, // absolute // autocenter
- IPT_PADDLE, // absolute // autocenter
- IPT_PADDLE_V, // absolute // autocenter
- IPT_PEDAL, // absolute // autocenter
- IPT_PEDAL2, // absolute // autocenter
- IPT_PEDAL3, // absolute // autocenter
- IPT_LIGHTGUN_X, // absolute
- IPT_LIGHTGUN_Y, // absolute
- IPT_POSITIONAL, // absolute // autocenter if not wraps
- IPT_POSITIONAL_V, // absolute // autocenter if not wraps
+ IPT_AD_STICK_X, // absolute // autocenter
+ IPT_AD_STICK_Y, // absolute // autocenter
+ IPT_AD_STICK_Z, // absolute // autocenter
+ IPT_PADDLE, // absolute // autocenter
+ IPT_PADDLE_V, // absolute // autocenter
+ IPT_PEDAL, // absolute // autocenter
+ IPT_PEDAL2, // absolute // autocenter
+ IPT_PEDAL3, // absolute // autocenter
+ IPT_LIGHTGUN_X, // absolute
+ IPT_LIGHTGUN_Y, // absolute
+ IPT_POSITIONAL, // absolute // autocenter if not wraps
+ IPT_POSITIONAL_V, // absolute // autocenter if not wraps
IPT_ANALOG_ABSOLUTE_LAST,
- IPT_DIAL, // relative
- IPT_DIAL_V, // relative
- IPT_TRACKBALL_X, // relative
- IPT_TRACKBALL_Y, // relative
- IPT_MOUSE_X, // relative
- IPT_MOUSE_Y, // relative
+ IPT_DIAL, // relative
+ IPT_DIAL_V, // relative
+ IPT_TRACKBALL_X, // relative
+ IPT_TRACKBALL_Y, // relative
+ IPT_MOUSE_X, // relative
+ IPT_MOUSE_Y, // relative
IPT_ANALOG_LAST,
@@ -460,21 +460,21 @@ enum
// INPUT_STRING_15C_1C, // 0.066667
// INPUT_STRING_10C_1C, // 0.100000
#define __input_string_coinage_start INPUT_STRING_9C_1C
- INPUT_STRING_9C_1C, // 0.111111
- INPUT_STRING_8C_1C, // 0.125000
- INPUT_STRING_7C_1C, // 0.142857
- INPUT_STRING_6C_1C, // 0.166667
+ INPUT_STRING_9C_1C, // 0.111111
+ INPUT_STRING_8C_1C, // 0.125000
+ INPUT_STRING_7C_1C, // 0.142857
+ INPUT_STRING_6C_1C, // 0.166667
// INPUT_STRING_10C_2C, // 0.200000
- INPUT_STRING_5C_1C, // 0.200000
+ INPUT_STRING_5C_1C, // 0.200000
// INPUT_STRING_9C_2C, // 0.222222
// INPUT_STRING_8C_2C, // 0.250000
- INPUT_STRING_4C_1C, // 0.250000
+ INPUT_STRING_4C_1C, // 0.250000
// INPUT_STRING_7C_2C, // 0.285714
// INPUT_STRING_10C_3C, // 0.300000
// INPUT_STRING_9C_3C, // 0.333333
// INPUT_STRING_6C_2C, // 0.333333
- INPUT_STRING_3C_1C, // 0.333333
- INPUT_STRING_8C_3C, // 0.375000
+ INPUT_STRING_3C_1C, // 0.333333
+ INPUT_STRING_8C_3C, // 0.375000
// INPUT_STRING_10C_4C, // 0.400000
// INPUT_STRING_5C_2C, // 0.400000
// INPUT_STRING_7C_3C, // 0.428571
@@ -482,20 +482,20 @@ enum
// INPUT_STRING_10C_5C, // 0.500000
// INPUT_STRING_8C_4C, // 0.500000
// INPUT_STRING_6C_3C, // 0.500000
- INPUT_STRING_4C_2C, // 0.500000
- INPUT_STRING_2C_1C, // 0.500000
+ INPUT_STRING_4C_2C, // 0.500000
+ INPUT_STRING_2C_1C, // 0.500000
// INPUT_STRING_9C_5C, // 0.555556
// INPUT_STRING_7C_4C, // 0.571429
// INPUT_STRING_10C_6C, // 0.600000
- INPUT_STRING_5C_3C, // 0.600000
+ INPUT_STRING_5C_3C, // 0.600000
// INPUT_STRING_8C_5C, // 0.625000
// INPUT_STRING_9C_6C, // 0.666667
// INPUT_STRING_6C_4C, // 0.666667
- INPUT_STRING_3C_2C, // 0.666667
+ INPUT_STRING_3C_2C, // 0.666667
// INPUT_STRING_10C_7C, // 0.700000
// INPUT_STRING_7C_5C, // 0.714286
// INPUT_STRING_8C_6C, // 0.750000
- INPUT_STRING_4C_3C, // 0.750000
+ INPUT_STRING_4C_3C, // 0.750000
// INPUT_STRING_9C_7C, // 0.777778
// INPUT_STRING_10C_8C, // 0.800000
// INPUT_STRING_5C_4C, // 0.800000
@@ -510,54 +510,54 @@ enum
// INPUT_STRING_7C_7C, // 1.000000
// INPUT_STRING_6C_6C, // 1.000000
// INPUT_STRING_5C_5C, // 1.000000
- INPUT_STRING_4C_4C, // 1.000000
- INPUT_STRING_3C_3C, // 1.000000
- INPUT_STRING_2C_2C, // 1.000000
- INPUT_STRING_1C_1C, // 1.000000
+ INPUT_STRING_4C_4C, // 1.000000
+ INPUT_STRING_3C_3C, // 1.000000
+ INPUT_STRING_2C_2C, // 1.000000
+ INPUT_STRING_1C_1C, // 1.000000
// INPUT_STRING_9C_10C, // 1.111111
// INPUT_STRING_8C_9C, // 1.125000
// INPUT_STRING_7C_8C, // 1.142857
// INPUT_STRING_6C_7C, // 1.166667
// INPUT_STRING_5C_6C, // 1.200000
// INPUT_STRING_8C_10C, // 1.250000
- INPUT_STRING_4C_5C, // 1.250000
+ INPUT_STRING_4C_5C, // 1.250000
// INPUT_STRING_7C_9C, // 1.285714
// INPUT_STRING_6C_8C, // 1.333333
- INPUT_STRING_3C_4C, // 1.333333
+ INPUT_STRING_3C_4C, // 1.333333
// INPUT_STRING_5C_7C, // 1.400000
// INPUT_STRING_7C_10C, // 1.428571
// INPUT_STRING_6C_9C, // 1.500000
// INPUT_STRING_4C_6C, // 1.500000
- INPUT_STRING_2C_3C, // 1.500000
+ INPUT_STRING_2C_3C, // 1.500000
// INPUT_STRING_5C_8C, // 1.600000
// INPUT_STRING_6C_10C, // 1.666667
// INPUT_STRING_3C_5C, // 1.666667
- INPUT_STRING_4C_7C, // 1.750000
+ INPUT_STRING_4C_7C, // 1.750000
// INPUT_STRING_5C_9C, // 1.800000
// INPUT_STRING_5C_10C, // 2.000000
// INPUT_STRING_4C_8C, // 2.000000
// INPUT_STRING_3C_6C, // 2.000000
- INPUT_STRING_2C_4C, // 2.000000
- INPUT_STRING_1C_2C, // 2.000000
+ INPUT_STRING_2C_4C, // 2.000000
+ INPUT_STRING_1C_2C, // 2.000000
// INPUT_STRING_4C_9C, // 2.250000
// INPUT_STRING_3C_7C, // 2.333333
// INPUT_STRING_4C_10C, // 2.500000
- INPUT_STRING_2C_5C, // 2.500000
+ INPUT_STRING_2C_5C, // 2.500000
// INPUT_STRING_3C_8C, // 2.666667
// INPUT_STRING_3C_9C, // 3.000000
- INPUT_STRING_2C_6C, // 3.000000
- INPUT_STRING_1C_3C, // 3.000000
+ INPUT_STRING_2C_6C, // 3.000000
+ INPUT_STRING_1C_3C, // 3.000000
// INPUT_STRING_3C_10C, // 3.333333
- INPUT_STRING_2C_7C, // 3.500000
- INPUT_STRING_2C_8C, // 4.000000
- INPUT_STRING_1C_4C, // 4.000000
+ INPUT_STRING_2C_7C, // 3.500000
+ INPUT_STRING_2C_8C, // 4.000000
+ INPUT_STRING_1C_4C, // 4.000000
// INPUT_STRING_2C_9C, // 4.500000
// INPUT_STRING_2C_10C, // 5.000000
- INPUT_STRING_1C_5C, // 5.000000
- INPUT_STRING_1C_6C, // 6.000000
- INPUT_STRING_1C_7C, // 7.000000
- INPUT_STRING_1C_8C, // 8.000000
- INPUT_STRING_1C_9C, // 9.000000
+ INPUT_STRING_1C_5C, // 5.000000
+ INPUT_STRING_1C_6C, // 6.000000
+ INPUT_STRING_1C_7C, // 7.000000
+ INPUT_STRING_1C_8C, // 8.000000
+ INPUT_STRING_1C_9C, // 9.000000
#define __input_string_coinage_end INPUT_STRING_1C_9C
// INPUT_STRING_1C_10C, // 10.000000
// INPUT_STRING_1C_11C, // 11.000000
@@ -707,13 +707,13 @@ typedef delegate<bool ()> ioport_charqueue_empty_delegate;
// header at the front of INP files
struct inp_header
{
- char header[8]; // +00: 8 byte header - must be "MAMEINP\0"
- UINT64 basetime; // +08: base time of recording
- UINT8 majversion; // +10: major INP version
- UINT8 minversion; // +11: minor INP version
- UINT8 reserved[2]; // +12: must be zero
- char gamename[12]; // +14: game name string, NULL-terminated
- char version[32]; // +20: system version string, NULL-terminated
+ char header[8]; // +00: 8 byte header - must be "MAMEINP\0"
+ UINT64 basetime; // +08: base time of recording
+ UINT8 majversion; // +10: major INP version
+ UINT8 minversion; // +11: minor INP version
+ UINT8 reserved[2]; // +12: must be zero
+ char gamename[12]; // +14: game name string, NULL-terminated
+ char version[32]; // +20: system version string, NULL-terminated
};
@@ -722,9 +722,9 @@ struct inp_header
// device defined default input settings
struct input_device_default
{
- const char * tag; // tag of port to update
- ioport_value mask; // mask to apply to the port
- ioport_value defvalue; // new default value
+ const char * tag; // tag of port to update
+ ioport_value mask; // mask to apply to the port
+ ioport_value defvalue; // new default value
};
@@ -756,14 +756,14 @@ public:
private:
// internal state
- input_type_entry * m_next; // next description in the list
- ioport_type m_type; // IPT_* for this entry
- ioport_group m_group; // which group the port belongs to
- UINT8 m_player; // player number (0 is player 1)
- const char * m_token; // token used to store settings
- const char * m_name; // user-friendly name
- input_seq m_defseq[SEQ_TYPE_TOTAL];// default input sequence
- input_seq m_seq[SEQ_TYPE_TOTAL];// currently configured sequences
+ input_type_entry * m_next; // next description in the list
+ ioport_type m_type; // IPT_* for this entry
+ ioport_group m_group; // which group the port belongs to
+ UINT8 m_player; // player number (0 is player 1)
+ const char * m_token; // token used to store settings
+ const char * m_name; // user-friendly name
+ input_seq m_defseq[SEQ_TYPE_TOTAL];// default input sequence
+ input_seq m_seq[SEQ_TYPE_TOTAL];// currently configured sequences
};
@@ -810,13 +810,13 @@ public:
private:
// internal state
- digital_joystick * m_next; // next joystick in the list
- int m_player; // player number represented
- int m_number; // joystick number represented
- simple_list<simple_list_wrapper<ioport_field> > m_field[JOYDIR_COUNT]; // potential input fields for each direction
- UINT8 m_current; // current value
- UINT8 m_current4way; // current 4-way value
- UINT8 m_previous; // previous value
+ digital_joystick * m_next; // next joystick in the list
+ int m_player; // player number represented
+ int m_number; // joystick number represented
+ simple_list<simple_list_wrapper<ioport_field> > m_field[JOYDIR_COUNT]; // potential input fields for each direction
+ UINT8 m_current; // current value
+ UINT8 m_current4way; // current 4-way value
+ UINT8 m_previous; // previous value
};
DECLARE_ENUM_OPERATORS(digital_joystick::direction_t)
@@ -857,8 +857,8 @@ private:
// internal keyboard code information
struct keycode_map_entry
{
- unicode_char ch;
- ioport_field * field[UCHAR_SHIFT_END + 1 - UCHAR_SHIFT_BEGIN];
+ unicode_char ch;
+ ioport_field * field[UCHAR_SHIFT_END + 1 - UCHAR_SHIFT_BEGIN];
};
// internal helpers
@@ -876,18 +876,18 @@ private:
static void execute_dumpkbd(running_machine &machine, int ref, int params, const char *param[]);
// internal state
- running_machine & m_machine; // reference to our machine
- UINT32 m_bufbegin; // index of starting character
- UINT32 m_bufend; // index of ending character
- dynamic_array<unicode_char> m_buffer; // actual buffer
- bool m_status_keydown; // current keydown status
- bool m_last_cr; // was the last char a CR?
- emu_timer * m_timer; // timer for posting characters
- attotime m_current_rate; // current rate for posting
- ioport_queue_chars_delegate m_queue_chars; // queue characters callback
- ioport_accept_char_delegate m_accept_char; // accept character callback
+ running_machine & m_machine; // reference to our machine
+ UINT32 m_bufbegin; // index of starting character
+ UINT32 m_bufend; // index of ending character
+ dynamic_array<unicode_char> m_buffer; // actual buffer
+ bool m_status_keydown; // current keydown status
+ bool m_last_cr; // was the last char a CR?
+ emu_timer * m_timer; // timer for posting characters
+ attotime m_current_rate; // current rate for posting
+ ioport_queue_chars_delegate m_queue_chars; // queue characters callback
+ ioport_accept_char_delegate m_accept_char; // accept character callback
ioport_charqueue_empty_delegate m_charqueue_empty; // character queue empty callback
- dynamic_array<keycode_map_entry> m_keycode_map; // keycode map
+ dynamic_array<keycode_map_entry> m_keycode_map; // keycode map
};
@@ -933,10 +933,10 @@ public:
private:
// internal state
- condition_t m_condition; // condition to use
- const char * m_tag; // tag of port whose condition is to be tested
- ioport_value m_mask; // mask to apply to the port
- ioport_value m_value; // value to compare against
+ condition_t m_condition; // condition to use
+ const char * m_tag; // tag of port whose condition is to be tested
+ ioport_value m_mask; // mask to apply to the port
+ ioport_value m_value; // value to compare against
};
@@ -966,11 +966,11 @@ public:
private:
// internal state
- ioport_setting * m_next; // pointer to next setting in sequence
- ioport_field & m_field; // pointer back to the field that owns us
- ioport_value m_value; // value of the bits in this setting
- const char * m_name; // user-friendly name to display
- ioport_condition m_condition; // condition under which this setting is valid
+ ioport_setting * m_next; // pointer to next setting in sequence
+ ioport_field & m_field; // pointer back to the field that owns us
+ ioport_value m_value; // value of the bits in this setting
+ const char * m_name; // user-friendly name to display
+ ioport_condition m_condition; // condition under which this setting is valid
};
@@ -993,10 +993,10 @@ public:
bool inverted() const { return m_invert; }
private:
- ioport_diplocation * m_next; // pointer to the next bit
- astring m_name; // name of the physical DIP switch
- UINT8 m_number; // physical switch number
- bool m_invert; // is this an active-high DIP?
+ ioport_diplocation * m_next; // pointer to the next bit
+ astring m_name; // name of the physical DIP switch
+ UINT8 m_number; // physical switch number
+ bool m_invert; // is this an active-high DIP?
};
@@ -1011,14 +1011,14 @@ class ioport_field
friend class dynamic_field;
// flags for ioport_fields
- static const int FIELD_FLAG_UNUSED = 0x01; // set if this field is unused but relevant to other games on the same hw
- static const int FIELD_FLAG_COCKTAIL = 0x02; // set if this field is relevant only for cocktail cabinets
- static const int FIELD_FLAG_TOGGLE = 0x04; // set if this field should behave as a toggle
- static const int FIELD_FLAG_ROTATED = 0x08; // set if this field represents a rotated control
- static const int ANALOG_FLAG_REVERSE = 0x10; // analog only: reverse the sense of the axis
- static const int ANALOG_FLAG_RESET = 0x20; // analog only: always preload in->default for relative axes, returning only deltas
- static const int ANALOG_FLAG_WRAPS = 0x40; // analog only: positional count wraps around
- static const int ANALOG_FLAG_INVERT = 0x80; // analog only: bitwise invert bits
+ static const int FIELD_FLAG_UNUSED = 0x01; // set if this field is unused but relevant to other games on the same hw
+ static const int FIELD_FLAG_COCKTAIL = 0x02; // set if this field is relevant only for cocktail cabinets
+ static const int FIELD_FLAG_TOGGLE = 0x04; // set if this field should behave as a toggle
+ static const int FIELD_FLAG_ROTATED = 0x08; // set if this field represents a rotated control
+ static const int ANALOG_FLAG_REVERSE = 0x10; // analog only: reverse the sense of the axis
+ static const int ANALOG_FLAG_RESET = 0x20; // analog only: always preload in->default for relative axes, returning only deltas
+ static const int ANALOG_FLAG_WRAPS = 0x40; // analog only: positional count wraps around
+ static const int ANALOG_FLAG_INVERT = 0x80; // analog only: bitwise invert bits
public:
// construction/destruction
@@ -1099,12 +1099,12 @@ public:
// user-controllable settings for a field
struct user_settings
{
- ioport_value value; // for DIP switches
- input_seq seq[SEQ_TYPE_TOTAL]; // sequences of all types
- INT32 sensitivity; // for analog controls
- INT32 delta; // for analog controls
- INT32 centerdelta; // for analog controls
- bool reverse; // for analog controls
+ ioport_value value; // for DIP switches
+ input_seq seq[SEQ_TYPE_TOTAL]; // sequences of all types
+ INT32 sensitivity; // for analog controls
+ INT32 delta; // for analog controls
+ INT32 centerdelta; // for analog controls
+ bool reverse; // for analog controls
};
void get_user_settings(user_settings &settings);
void set_user_settings(const user_settings &settings);
@@ -1113,45 +1113,45 @@ private:
void expand_diplocation(const char *location, astring &errorbuf);
// internal state
- ioport_field * m_next; // pointer to next field in sequence
- ioport_port & m_port; // reference to the port that owns us
- ioport_field_live * m_live; // live state of field (NULL if not live)
- int m_modcount; // modification count
- simple_list<ioport_setting> m_settinglist; // list of input_setting_configs
- simple_list<ioport_diplocation> m_diploclist; // list of locations for various bits
+ ioport_field * m_next; // pointer to next field in sequence
+ ioport_port & m_port; // reference to the port that owns us
+ ioport_field_live * m_live; // live state of field (NULL if not live)
+ int m_modcount; // modification count
+ simple_list<ioport_setting> m_settinglist; // list of input_setting_configs
+ simple_list<ioport_diplocation> m_diploclist; // list of locations for various bits
// generally-applicable data
- ioport_value m_mask; // mask of bits belonging to the field
- ioport_value m_defvalue; // default value of these bits
- ioport_condition m_condition; // condition under which this field is relevant
- ioport_type m_type; // IPT_* type for this port
- UINT8 m_player; // player number (0-based)
- UINT32 m_flags; // combination of FIELD_FLAG_* and ANALOG_FLAG_* above
- UINT8 m_impulse; // number of frames before reverting to defvalue
- const char * m_name; // user-friendly name to display
- input_seq m_seq[SEQ_TYPE_TOTAL];// sequences of all types
- ioport_field_read_delegate m_read; // read callback routine
- void * m_read_param; // parameter for read callback routine
- ioport_field_write_delegate m_write; // write callback routine
- void * m_write_param; // parameter for write callback routine
+ ioport_value m_mask; // mask of bits belonging to the field
+ ioport_value m_defvalue; // default value of these bits
+ ioport_condition m_condition; // condition under which this field is relevant
+ ioport_type m_type; // IPT_* type for this port
+ UINT8 m_player; // player number (0-based)
+ UINT32 m_flags; // combination of FIELD_FLAG_* and ANALOG_FLAG_* above
+ UINT8 m_impulse; // number of frames before reverting to defvalue
+ const char * m_name; // user-friendly name to display
+ input_seq m_seq[SEQ_TYPE_TOTAL];// sequences of all types
+ ioport_field_read_delegate m_read; // read callback routine
+ void * m_read_param; // parameter for read callback routine
+ ioport_field_write_delegate m_write; // write callback routine
+ void * m_write_param; // parameter for write callback routine
// data relevant to analog control types
- ioport_value m_min; // minimum value for absolute axes
- ioport_value m_max; // maximum value for absolute axes
- INT32 m_sensitivity; // sensitivity (100=normal)
- INT32 m_delta; // delta to apply each frame a digital inc/dec key is pressed
- INT32 m_centerdelta; // delta to apply each frame no digital inputs are pressed
- crosshair_axis_t m_crosshair_axis; // crosshair axis
- double m_crosshair_scale; // crosshair scale
- double m_crosshair_offset; // crosshair offset
- double m_crosshair_altaxis;// crosshair alternate axis value
+ ioport_value m_min; // minimum value for absolute axes
+ ioport_value m_max; // maximum value for absolute axes
+ INT32 m_sensitivity; // sensitivity (100=normal)
+ INT32 m_delta; // delta to apply each frame a digital inc/dec key is pressed
+ INT32 m_centerdelta; // delta to apply each frame no digital inputs are pressed
+ crosshair_axis_t m_crosshair_axis; // crosshair axis
+ double m_crosshair_scale; // crosshair scale
+ double m_crosshair_offset; // crosshair offset
+ double m_crosshair_altaxis;// crosshair alternate axis value
ioport_field_crossmap_delegate m_crosshair_mapper; // crosshair mapping function
- UINT16 m_full_turn_count; // number of optical counts for 1 full turn of the original control
- const ioport_value * m_remap_table; // pointer to an array that remaps the port value
+ UINT16 m_full_turn_count; // number of optical counts for 1 full turn of the original control
+ const ioport_value * m_remap_table; // pointer to an array that remaps the port value
// data relevant to other specific types
- UINT8 m_way; // digital joystick 2/4/8-way descriptions
- unicode_char m_chars[4]; // unicode key data
+ UINT8 m_way; // digital joystick 2/4/8-way descriptions
+ unicode_char m_chars[4]; // unicode key data
};
@@ -1214,13 +1214,13 @@ private:
void insert_field(ioport_field &newfield, ioport_value &disallowedbits, astring &errorbuf);
// internal state
- ioport_port * m_next; // pointer to next port
- device_t & m_device; // associated device
- simple_list<ioport_field> m_fieldlist; // list of ioport_fields
- astring m_tag; // copy of this port's tag
- int m_modcount; // modification count
- ioport_value m_active; // mask of active bits in the port
- ioport_port_live * m_live; // live state of port (NULL if not live)
+ ioport_port * m_next; // pointer to next port
+ device_t & m_device; // associated device
+ simple_list<ioport_field> m_fieldlist; // list of ioport_fields
+ astring m_tag; // copy of this port's tag
+ int m_modcount; // modification count
+ ioport_value m_active; // mask of active bits in the port
+ ioport_port_live * m_live; // live state of port (NULL if not live)
};
@@ -1301,27 +1301,27 @@ private:
void record_port(ioport_port &port);
// internal state
- running_machine & m_machine; // reference to owning machine
- bool m_safe_to_read; // clear at start; set after state is loaded
- ioport_list m_portlist; // list of input port configurations
+ running_machine & m_machine; // reference to owning machine
+ bool m_safe_to_read; // clear at start; set after state is loaded
+ ioport_list m_portlist; // list of input port configurations
// types
- simple_list<input_type_entry> m_typelist; // list of live type states
- input_type_entry * m_type_to_entry[IPT_COUNT][MAX_PLAYERS]; // map from type/player to type state
+ simple_list<input_type_entry> m_typelist; // list of live type states
+ input_type_entry * m_type_to_entry[IPT_COUNT][MAX_PLAYERS]; // map from type/player to type state
// specific special global input states
- simple_list<digital_joystick> m_joystick_list; // list of digital joysticks
- natural_keyboard m_natkeyboard; // natural keyboard support
+ simple_list<digital_joystick> m_joystick_list; // list of digital joysticks
+ natural_keyboard m_natkeyboard; // natural keyboard support
// frame time tracking
- attotime m_last_frame_time; // time of the last frame callback
- attoseconds_t m_last_delta_nsec; // nanoseconds that passed since the previous callback
+ attotime m_last_frame_time; // time of the last frame callback
+ attoseconds_t m_last_delta_nsec; // nanoseconds that passed since the previous callback
// playback/record information
- emu_file m_record_file; // recording file (NULL if not recording)
- emu_file m_playback_file; // playback file (NULL if not recording)
- UINT64 m_playback_accumulated_speed; // accumulated speed during playback
- UINT32 m_playback_accumulated_frames; // accumulated frames during playback
+ emu_file m_record_file; // recording file (NULL if not recording)
+ emu_file m_playback_file; // playback file (NULL if not recording)
+ UINT64 m_playback_accumulated_speed; // accumulated speed during playback
+ UINT32 m_playback_accumulated_frames; // accumulated frames during playback
};
@@ -1378,13 +1378,13 @@ public:
private:
// internal state
- device_t & m_owner;
- ioport_list & m_portlist;
- astring & m_errorbuf;
+ device_t & m_owner;
+ ioport_list & m_portlist;
+ astring & m_errorbuf;
- ioport_port * m_curport;
- ioport_field * m_curfield;
- ioport_setting * m_cursetting;
+ ioport_port * m_curport;
+ ioport_field * m_curfield;
+ ioport_setting * m_cursetting;
};
@@ -1393,21 +1393,21 @@ private:
// MACROS
//**************************************************************************
-#define UCHAR_MAMEKEY(code) (UCHAR_MAMEKEY_BEGIN + ITEM_ID_##code)
+#define UCHAR_MAMEKEY(code) (UCHAR_MAMEKEY_BEGIN + ITEM_ID_##code)
// macro for a read callback function (PORT_CUSTOM)
-#define CUSTOM_INPUT(name) ioport_value name(device_t &device, ioport_field &field, void *param)
-#define CUSTOM_INPUT_MEMBER(name) ioport_value name(ioport_field &field, void *param)
-#define DECLARE_CUSTOM_INPUT_MEMBER(name) ioport_value name(ioport_field &field, void *param)
+#define CUSTOM_INPUT(name) ioport_value name(device_t &device, ioport_field &field, void *param)
+#define CUSTOM_INPUT_MEMBER(name) ioport_value name(ioport_field &field, void *param)
+#define DECLARE_CUSTOM_INPUT_MEMBER(name) ioport_value name(ioport_field &field, void *param)
// macro for port write callback functions (PORT_CHANGED)
-#define INPUT_CHANGED_MEMBER(name) void name(ioport_field &field, void *param, ioport_value oldval, ioport_value newval)
-#define DECLARE_INPUT_CHANGED_MEMBER(name) void name(ioport_field &field, void *param, ioport_value oldval, ioport_value newval)
+#define INPUT_CHANGED_MEMBER(name) void name(ioport_field &field, void *param, ioport_value oldval, ioport_value newval)
+#define DECLARE_INPUT_CHANGED_MEMBER(name) void name(ioport_field &field, void *param, ioport_value oldval, ioport_value newval)
// macro for port changed callback functions (PORT_CROSSHAIR_MAPPER)
-#define CROSSHAIR_MAPPER(name) float name(device_t &device, ioport_field &field, float linear_value)
-#define CROSSHAIR_MAPPER_MEMBER(name) float name(ioport_field &field, float linear_value)
-#define DECLARE_CROSSHAIR_MAPPER_MEMBER(name) float name(ioport_field &field, float linear_value)
+#define CROSSHAIR_MAPPER(name) float name(device_t &device, ioport_field &field, float linear_value)
+#define CROSSHAIR_MAPPER_MEMBER(name) float name(ioport_field &field, float linear_value)
+#define DECLARE_CROSSHAIR_MAPPER_MEMBER(name) float name(ioport_field &field, float linear_value)
// macro for wrapping a default string
#define DEF_STR(str_num) ((const char *)INPUT_STRING_##str_num)
@@ -1708,4 +1708,4 @@ inline device_t &ioport_setting::device() const { return m_field.device(); }
inline running_machine &ioport_setting::machine() const { return m_field.machine(); }
-#endif // __INPTPORT_H__ */
+#endif // __INPTPORT_H__ */
diff --git a/src/emu/machine.c b/src/emu/machine.c
index 3ee33f60d66..412ebb290a5 100644
--- a/src/emu/machine.c
+++ b/src/emu/machine.c
@@ -134,49 +134,49 @@ static char giant_string_buffer[65536] = { 0 };
running_machine::running_machine(const machine_config &_config, osd_interface &osd, bool exit_to_game_select)
: firstcpu(NULL),
- primary_screen(NULL),
- palette(NULL),
- pens(NULL),
- colortable(NULL),
- shadow_table(NULL),
- debug_flags(0),
- palette_data(NULL),
- romload_data(NULL),
- ui_input_data(NULL),
- debugcpu_data(NULL),
- generic_machine_data(NULL),
-
- m_config(_config),
- m_system(_config.gamedrv()),
- m_osd(osd),
- m_cheat(NULL),
- m_render(NULL),
- m_input(NULL),
- m_sound(NULL),
- m_video(NULL),
- m_tilemap(NULL),
- m_debug_view(NULL),
- m_current_phase(MACHINE_PHASE_PREINIT),
- m_paused(false),
- m_hard_reset_pending(false),
- m_exit_pending(false),
- m_exit_to_game_select(exit_to_game_select),
- m_new_driver_pending(NULL),
- m_soft_reset_timer(NULL),
- m_rand_seed(0x9d14abd7),
- m_ui_active(_config.options().ui_active()),
- m_basename(_config.gamedrv().name),
- m_sample_rate(_config.options().sample_rate()),
- m_logfile(NULL),
- m_saveload_schedule(SLS_NONE),
- m_saveload_schedule_time(attotime::zero),
- m_saveload_searchpath(NULL),
- m_logerror_list(m_respool),
-
- m_save(*this),
- m_memory(*this),
- m_ioport(*this),
- m_scheduler(*this)
+ primary_screen(NULL),
+ palette(NULL),
+ pens(NULL),
+ colortable(NULL),
+ shadow_table(NULL),
+ debug_flags(0),
+ palette_data(NULL),
+ romload_data(NULL),
+ ui_input_data(NULL),
+ debugcpu_data(NULL),
+ generic_machine_data(NULL),
+
+ m_config(_config),
+ m_system(_config.gamedrv()),
+ m_osd(osd),
+ m_cheat(NULL),
+ m_render(NULL),
+ m_input(NULL),
+ m_sound(NULL),
+ m_video(NULL),
+ m_tilemap(NULL),
+ m_debug_view(NULL),
+ m_current_phase(MACHINE_PHASE_PREINIT),
+ m_paused(false),
+ m_hard_reset_pending(false),
+ m_exit_pending(false),
+ m_exit_to_game_select(exit_to_game_select),
+ m_new_driver_pending(NULL),
+ m_soft_reset_timer(NULL),
+ m_rand_seed(0x9d14abd7),
+ m_ui_active(_config.options().ui_active()),
+ m_basename(_config.gamedrv().name),
+ m_sample_rate(_config.options().sample_rate()),
+ m_logfile(NULL),
+ m_saveload_schedule(SLS_NONE),
+ m_saveload_schedule_time(attotime::zero),
+ m_saveload_searchpath(NULL),
+ m_logerror_list(m_respool),
+
+ m_save(*this),
+ m_memory(*this),
+ m_ioport(*this),
+ m_scheduler(*this)
{
memset(gfx, 0, sizeof(gfx));
memset(&m_base_time, 0, sizeof(m_base_time));
@@ -719,7 +719,7 @@ UINT32 running_machine::rand()
m_rand_seed = 1664525 * m_rand_seed + 1013904223;
// return rotated by 16 bits; the low bits have a short period
- // and are frequently used
+ // and are frequently used
return (m_rand_seed >> 16) | (m_rand_seed << 16);
}
@@ -1048,7 +1048,7 @@ void running_machine::postload_all_devices()
running_machine::notifier_callback_item::notifier_callback_item(machine_notify_delegate func)
: m_next(NULL),
- m_func(func)
+ m_func(func)
{
}
@@ -1059,7 +1059,7 @@ running_machine::notifier_callback_item::notifier_callback_item(machine_notify_d
running_machine::logerror_callback_item::logerror_callback_item(logerror_callback func)
: m_next(NULL),
- m_func(func)
+ m_func(func)
{
}
@@ -1098,13 +1098,13 @@ void system_time::set(time_t t)
void system_time::full_time::set(struct tm &t)
{
- second = t.tm_sec;
- minute = t.tm_min;
- hour = t.tm_hour;
- mday = t.tm_mday;
- month = t.tm_mon;
- year = t.tm_year + 1900;
- weekday = t.tm_wday;
- day = t.tm_yday;
- is_dst = t.tm_isdst;
+ second = t.tm_sec;
+ minute = t.tm_min;
+ hour = t.tm_hour;
+ mday = t.tm_mday;
+ month = t.tm_mon;
+ year = t.tm_year + 1900;
+ weekday = t.tm_wday;
+ day = t.tm_yday;
+ is_dst = t.tm_isdst;
}
diff --git a/src/emu/machine.h b/src/emu/machine.h
index cb65054aef7..e4c4c137a8b 100644
--- a/src/emu/machine.h
+++ b/src/emu/machine.h
@@ -83,26 +83,26 @@ enum machine_notification
// output channels
enum output_channel
{
- OUTPUT_CHANNEL_ERROR,
- OUTPUT_CHANNEL_WARNING,
- OUTPUT_CHANNEL_INFO,
- OUTPUT_CHANNEL_DEBUG,
- OUTPUT_CHANNEL_VERBOSE,
- OUTPUT_CHANNEL_LOG,
- OUTPUT_CHANNEL_COUNT
+ OUTPUT_CHANNEL_ERROR,
+ OUTPUT_CHANNEL_WARNING,
+ OUTPUT_CHANNEL_INFO,
+ OUTPUT_CHANNEL_DEBUG,
+ OUTPUT_CHANNEL_VERBOSE,
+ OUTPUT_CHANNEL_LOG,
+ OUTPUT_CHANNEL_COUNT
};
// debug flags
-const int DEBUG_FLAG_ENABLED = 0x00000001; // debugging is enabled
-const int DEBUG_FLAG_CALL_HOOK = 0x00000002; // CPU cores must call instruction hook
-const int DEBUG_FLAG_WPR_PROGRAM = 0x00000010; // watchpoints are enabled for PROGRAM memory reads
-const int DEBUG_FLAG_WPR_DATA = 0x00000020; // watchpoints are enabled for DATA memory reads
-const int DEBUG_FLAG_WPR_IO = 0x00000040; // watchpoints are enabled for IO memory reads
-const int DEBUG_FLAG_WPW_PROGRAM = 0x00000100; // watchpoints are enabled for PROGRAM memory writes
-const int DEBUG_FLAG_WPW_DATA = 0x00000200; // watchpoints are enabled for DATA memory writes
-const int DEBUG_FLAG_WPW_IO = 0x00000400; // watchpoints are enabled for IO memory writes
-const int DEBUG_FLAG_OSD_ENABLED = 0x00001000; // The OSD debugger is enabled
+const int DEBUG_FLAG_ENABLED = 0x00000001; // debugging is enabled
+const int DEBUG_FLAG_CALL_HOOK = 0x00000002; // CPU cores must call instruction hook
+const int DEBUG_FLAG_WPR_PROGRAM = 0x00000010; // watchpoints are enabled for PROGRAM memory reads
+const int DEBUG_FLAG_WPR_DATA = 0x00000020; // watchpoints are enabled for DATA memory reads
+const int DEBUG_FLAG_WPR_IO = 0x00000040; // watchpoints are enabled for IO memory reads
+const int DEBUG_FLAG_WPW_PROGRAM = 0x00000100; // watchpoints are enabled for PROGRAM memory writes
+const int DEBUG_FLAG_WPW_DATA = 0x00000200; // watchpoints are enabled for DATA memory writes
+const int DEBUG_FLAG_WPW_IO = 0x00000400; // watchpoints are enabled for IO memory writes
+const int DEBUG_FLAG_OSD_ENABLED = 0x00001000; // The OSD debugger is enabled
@@ -111,29 +111,29 @@ const int DEBUG_FLAG_OSD_ENABLED = 0x00001000; // The OSD debugger is enabled
//**************************************************************************
// NULL versions
-#define machine_start_0 NULL
-#define machine_reset_0 NULL
-#define sound_start_0 NULL
-#define sound_reset_0 NULL
-#define video_start_0 NULL
-#define video_reset_0 NULL
-#define palette_init_0 NULL
+#define machine_start_0 NULL
+#define machine_reset_0 NULL
+#define sound_start_0 NULL
+#define sound_reset_0 NULL
+#define video_start_0 NULL
+#define video_reset_0 NULL
+#define palette_init_0 NULL
// global allocation helpers
-#define auto_alloc(m, t) pool_alloc(static_cast<running_machine &>(m).respool(), t)
-#define auto_alloc_clear(m, t) pool_alloc_clear(static_cast<running_machine &>(m).respool(), t)
-#define auto_alloc_array(m, t, c) pool_alloc_array(static_cast<running_machine &>(m).respool(), t, c)
-#define auto_alloc_array_clear(m, t, c) pool_alloc_array_clear(static_cast<running_machine &>(m).respool(), t, c)
-#define auto_free(m, v) pool_free(static_cast<running_machine &>(m).respool(), v)
+#define auto_alloc(m, t) pool_alloc(static_cast<running_machine &>(m).respool(), t)
+#define auto_alloc_clear(m, t) pool_alloc_clear(static_cast<running_machine &>(m).respool(), t)
+#define auto_alloc_array(m, t, c) pool_alloc_array(static_cast<running_machine &>(m).respool(), t, c)
+#define auto_alloc_array_clear(m, t, c) pool_alloc_array_clear(static_cast<running_machine &>(m).respool(), t, c)
+#define auto_free(m, v) pool_free(static_cast<running_machine &>(m).respool(), v)
-#define auto_bitmap_alloc(m, w, h, f) auto_alloc(m, bitmap_t(w, h, f))
-#define auto_bitmap_ind8_alloc(m, w, h) auto_alloc(m, bitmap_ind8(w, h))
-#define auto_bitmap_ind16_alloc(m, w, h) auto_alloc(m, bitmap_ind16(w, h))
-#define auto_bitmap_ind32_alloc(m, w, h) auto_alloc(m, bitmap_ind32(w, h))
-#define auto_bitmap_rgb32_alloc(m, w, h) auto_alloc(m, bitmap_rgb32(w, h))
-#define auto_strdup(m, s) strcpy(auto_alloc_array(m, char, strlen(s) + 1), s)
+#define auto_bitmap_alloc(m, w, h, f) auto_alloc(m, bitmap_t(w, h, f))
+#define auto_bitmap_ind8_alloc(m, w, h) auto_alloc(m, bitmap_ind8(w, h))
+#define auto_bitmap_ind16_alloc(m, w, h) auto_alloc(m, bitmap_ind16(w, h))
+#define auto_bitmap_ind32_alloc(m, w, h) auto_alloc(m, bitmap_ind32(w, h))
+#define auto_bitmap_rgb32_alloc(m, w, h) auto_alloc(m, bitmap_rgb32(w, h))
+#define auto_strdup(m, s) strcpy(auto_alloc_array(m, char, strlen(s) + 1), s)
@@ -172,20 +172,20 @@ public:
{
void set(struct tm &t);
- UINT8 second; // seconds (0-59)
- UINT8 minute; // minutes (0-59)
- UINT8 hour; // hours (0-23)
- UINT8 mday; // day of month (1-31)
- UINT8 month; // month (0-11)
- INT32 year; // year (1=1 AD)
- UINT8 weekday; // day of week (0-6)
- UINT16 day; // day of year (0-365)
- UINT8 is_dst; // is this daylight savings?
+ UINT8 second; // seconds (0-59)
+ UINT8 minute; // minutes (0-59)
+ UINT8 hour; // hours (0-23)
+ UINT8 mday; // day of month (1-31)
+ UINT8 month; // month (0-11)
+ INT32 year; // year (1=1 AD)
+ UINT8 weekday; // day of week (0-6)
+ UINT16 day; // day of year (0-365)
+ UINT8 is_dst; // is this daylight savings?
};
- INT64 time; // number of seconds elapsed since midnight, January 1 1970 UTC
- full_time local_time; // local time
- full_time utc_time; // UTC coordinated time
+ INT64 time; // number of seconds elapsed since midnight, January 1 1970 UTC
+ full_time local_time; // local time
+ full_time utc_time; // UTC coordinated time
};
@@ -205,7 +205,7 @@ class running_machine
typedef void (*logerror_callback)(running_machine &machine, const char *string);
// must be at top of member variables
- resource_pool m_respool; // pool of resources for this machine
+ resource_pool m_respool; // pool of resources for this machine
public:
// construction/destruction
@@ -287,27 +287,27 @@ public:
const char *describe_context();
// CPU information
- cpu_device * firstcpu; // first CPU
+ cpu_device * firstcpu; // first CPU
// video-related information
- gfx_element * gfx[MAX_GFX_ELEMENTS];// array of pointers to graphic sets (chars, sprites)
- screen_device * primary_screen; // the primary screen device, or NULL if screenless
- palette_t * palette; // global palette object
+ gfx_element * gfx[MAX_GFX_ELEMENTS];// array of pointers to graphic sets (chars, sprites)
+ screen_device * primary_screen; // the primary screen device, or NULL if screenless
+ palette_t * palette; // global palette object
// palette-related information
- const pen_t * pens; // remapped palette pen numbers
- colortable_t * colortable; // global colortable for remapping
- pen_t * shadow_table; // table for looking up a shadowed pen
- bitmap_ind8 priority_bitmap; // priority bitmap
+ const pen_t * pens; // remapped palette pen numbers
+ colortable_t * colortable; // global colortable for remapping
+ pen_t * shadow_table; // table for looking up a shadowed pen
+ bitmap_ind8 priority_bitmap; // priority bitmap
// debugger-related information
- UINT32 debug_flags; // the current debug flags
+ UINT32 debug_flags; // the current debug flags
// internal core information
- palette_private * palette_data; // internal data from palette.c
- romload_private * romload_data; // internal data from romload.c
- ui_input_private * ui_input_data; // internal data from uiinput.c
- debugcpu_private * debugcpu_data; // internal data from debugcpu.c
+ palette_private * palette_data; // internal data from palette.c
+ romload_private * romload_data; // internal data from romload.c
+ ui_input_private * ui_input_data; // internal data from uiinput.c
+ debugcpu_private * debugcpu_data; // internal data from debugcpu.c
generic_machine_private *generic_machine_data; // internal data from machine/generic.c
private:
@@ -331,41 +331,41 @@ private:
void postload_all_devices();
// internal state
- const machine_config & m_config; // reference to the constructed machine_config
- const game_driver & m_system; // reference to the definition of the game machine
- osd_interface & m_osd; // reference to OSD system
+ const machine_config & m_config; // reference to the constructed machine_config
+ const game_driver & m_system; // reference to the definition of the game machine
+ osd_interface & m_osd; // reference to OSD system
// managers
- cheat_manager * m_cheat; // internal data from cheat.c
- render_manager * m_render; // internal data from render.c
- input_manager * m_input; // internal data from input.c
- sound_manager * m_sound; // internal data from sound.c
- video_manager * m_video; // internal data from video.c
- tilemap_manager * m_tilemap; // internal data from tilemap.c
- debug_view_manager * m_debug_view; // internal data from debugvw.c
+ cheat_manager * m_cheat; // internal data from cheat.c
+ render_manager * m_render; // internal data from render.c
+ input_manager * m_input; // internal data from input.c
+ sound_manager * m_sound; // internal data from sound.c
+ video_manager * m_video; // internal data from video.c
+ tilemap_manager * m_tilemap; // internal data from tilemap.c
+ debug_view_manager * m_debug_view; // internal data from debugvw.c
// system state
- machine_phase m_current_phase; // current execution phase
- bool m_paused; // paused?
- bool m_hard_reset_pending; // is a hard reset pending?
- bool m_exit_pending; // is an exit pending?
- bool m_exit_to_game_select; // when we exit, go we go back to the game select?
- const game_driver * m_new_driver_pending; // pointer to the next pending driver
- emu_timer * m_soft_reset_timer; // timer used to schedule a soft reset
+ machine_phase m_current_phase; // current execution phase
+ bool m_paused; // paused?
+ bool m_hard_reset_pending; // is a hard reset pending?
+ bool m_exit_pending; // is an exit pending?
+ bool m_exit_to_game_select; // when we exit, go we go back to the game select?
+ const game_driver * m_new_driver_pending; // pointer to the next pending driver
+ emu_timer * m_soft_reset_timer; // timer used to schedule a soft reset
// watchdog state
- bool m_watchdog_enabled; // is the watchdog enabled?
- INT32 m_watchdog_counter; // counter for watchdog tracking
- emu_timer * m_watchdog_timer; // timer for watchdog tracking
+ bool m_watchdog_enabled; // is the watchdog enabled?
+ INT32 m_watchdog_counter; // counter for watchdog tracking
+ emu_timer * m_watchdog_timer; // timer for watchdog tracking
// misc state
- UINT32 m_rand_seed; // current random number seed
- bool m_ui_active; // ui active or not (useful for games / systems with keyboard inputs)
- time_t m_base_time; // real time at initial emulation time
- astring m_basename; // basename used for game-related paths
- astring m_context; // context string buffer
- int m_sample_rate; // the digital audio sample rate
- emu_file * m_logfile; // pointer to the active log file
+ UINT32 m_rand_seed; // current random number seed
+ bool m_ui_active; // ui active or not (useful for games / systems with keyboard inputs)
+ time_t m_base_time; // real time at initial emulation time
+ astring m_basename; // basename used for game-related paths
+ astring m_context; // context string buffer
+ int m_sample_rate; // the digital audio sample rate
+ emu_file * m_logfile; // pointer to the active log file
// load/save management
enum saveload_schedule
@@ -374,10 +374,10 @@ private:
SLS_SAVE,
SLS_LOAD
};
- saveload_schedule m_saveload_schedule;
- attotime m_saveload_schedule_time;
- astring m_saveload_pending_file;
- const char * m_saveload_searchpath;
+ saveload_schedule m_saveload_schedule;
+ attotime m_saveload_schedule_time;
+ astring m_saveload_pending_file;
+ const char * m_saveload_searchpath;
// notifier callbacks
struct notifier_callback_item
@@ -389,8 +389,8 @@ private:
notifier_callback_item *next() const { return m_next; }
// state
- notifier_callback_item * m_next;
- machine_notify_delegate m_func;
+ notifier_callback_item * m_next;
+ machine_notify_delegate m_func;
};
simple_list<notifier_callback_item> m_notifier_list[MACHINE_NOTIFY_COUNT];
@@ -405,17 +405,17 @@ private:
logerror_callback_item *next() const { return m_next; }
// state
- logerror_callback_item * m_next;
- logerror_callback m_func;
+ logerror_callback_item * m_next;
+ logerror_callback m_func;
};
simple_list<logerror_callback_item> m_logerror_list;
// embedded managers and objects
- save_manager m_save; // save manager
- memory_manager m_memory; // memory manager
- ioport_manager m_ioport; // I/O port manager
- device_scheduler m_scheduler; // scheduler object
+ save_manager m_save; // save manager
+ memory_manager m_memory; // memory manager
+ ioport_manager m_ioport; // I/O port manager
+ device_scheduler m_scheduler; // scheduler object
};
-#endif /* __MACHINE_H__ */
+#endif /* __MACHINE_H__ */
diff --git a/src/emu/machine/53c7xx.c b/src/emu/machine/53c7xx.c
index 4266b9e878b..f27449db737 100644
--- a/src/emu/machine/53c7xx.c
+++ b/src/emu/machine/53c7xx.c
@@ -1,14 +1,14 @@
/*********************************************************************
- 53c7xx.c
+ 53c7xx.c
- NCR 53C700 SCSI I/O Processor
+ NCR 53C700 SCSI I/O Processor
- TODO:
- * Low-level register accesses
- * Remove arbitrary delays
- * Add unimplemented SCRIPTS opcodes
+ TODO:
+ * Low-level register accesses
+ * Remove arbitrary delays
+ * Add unimplemented SCRIPTS opcodes
*********************************************************************/
@@ -21,11 +21,11 @@
// DEBUGGERY
//**************************************************************************
-#define DEBUG_LOG 1
-#define DEBUG_LEVEL 0
+#define DEBUG_LOG 1
+#define DEBUG_LEVEL 0
#if DEBUG_LOG
- #define VERBOSE_LOG(machine, level, ...) verbose_log(machine, level, __VA_ARGS__)
+ #define VERBOSE_LOG(machine, level, ...) verbose_log(machine, level, __VA_ARGS__)
#else
#define VERBOSE_LOG(machine, level, ...)
#endif
@@ -57,7 +57,7 @@ const device_type NCR53C7XX = &device_creator<ncr53c7xx_device>;
//-------------------------------------------------
ncr53c7xx_device::ncr53c7xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : nscsi_device(mconfig, NCR53C7XX, "53C7xx SCSI", tag, owner, clock),
+ : nscsi_device(mconfig, NCR53C7XX, "53C7xx SCSI", tag, owner, clock),
device_execute_interface(mconfig, *this),
m_icount(0)
{
@@ -90,35 +90,35 @@ void ncr53c7xx_device::device_start()
void ncr53c7xx_device::device_reset()
{
// Reset registers to defaults
- m_scntl[0] = 3 << SCNTL0_ARB_SHIFT;
- m_scntl[1] = 0;
- m_sdid = 0;
- m_sien = 0;
- m_scid = 0;
- m_sxfer = 0;
- m_sodl = 0;
- m_socl = 0;
- m_sfbr = 0;
- m_sidl = 0;
- m_sbdl = 0;
- m_sbcl = 0;
- m_dstat = DSTAT_DFE;
- m_sstat[0] = 0;
- m_sstat[1] = 0;
- m_sstat[2] = 0;
- m_ctest[0] = 0;
- m_ctest[1] = 0xf0;
- m_ctest[2] = 0x21;
- m_ctest[3] = 0;
- m_ctest[4] = 0;
- m_ctest[5] = 0;
- m_ctest[6] = 0;
- m_ctest[7] = 0;
- m_dfifo = 0;
- m_istat = 0;//ISTAT_PRE;
- m_dmode = 0;
- m_dien = 0;
- m_dcntl = 0;
+ m_scntl[0] = 3 << SCNTL0_ARB_SHIFT;
+ m_scntl[1] = 0;
+ m_sdid = 0;
+ m_sien = 0;
+ m_scid = 0;
+ m_sxfer = 0;
+ m_sodl = 0;
+ m_socl = 0;
+ m_sfbr = 0;
+ m_sidl = 0;
+ m_sbdl = 0;
+ m_sbcl = 0;
+ m_dstat = DSTAT_DFE;
+ m_sstat[0] = 0;
+ m_sstat[1] = 0;
+ m_sstat[2] = 0;
+ m_ctest[0] = 0;
+ m_ctest[1] = 0xf0;
+ m_ctest[2] = 0x21;
+ m_ctest[3] = 0;
+ m_ctest[4] = 0;
+ m_ctest[5] = 0;
+ m_ctest[6] = 0;
+ m_ctest[7] = 0;
+ m_dfifo = 0;
+ m_istat = 0;//ISTAT_PRE;
+ m_dmode = 0;
+ m_dien = 0;
+ m_dcntl = 0;
m_finished = false;
m_connected = false;
@@ -653,7 +653,7 @@ void ncr53c7xx_device::set_scsi_state(int state)
//-------------------------------------------------
// delay - step the SCSI state machine following
-// a time delay
+// a time delay
//-------------------------------------------------
void ncr53c7xx_device::delay(const attotime &delay)
@@ -735,9 +735,9 @@ void ncr53c7xx_device::step(bool timeout)
{
set_scsi_state(FINISHED);
m_connected = false;
-// istatus |= I_DISCONNECT;
-// reset_disconnect();
-// check_irq();
+// istatus |= I_DISCONNECT;
+// reset_disconnect();
+// check_irq();
}
switch (m_scsi_state & SUB_MASK ? m_scsi_state & SUB_MASK : m_scsi_state & STATE_MASK)
@@ -1078,7 +1078,7 @@ void ncr53c7xx_device::step(bool timeout)
// SCSI SCRIPTS
//**************************************************************************
-#define UNIMPLEMENTED fatalerror("%s is unimplemented\n", __FUNCTION__)
+#define UNIMPLEMENTED fatalerror("%s is unimplemented\n", __FUNCTION__)
//-------------------------------------------------
// set_scripts_state -
@@ -1557,8 +1557,8 @@ void ncr53c7xx_device::io_i_clear()
void ncr53c7xx_device::tc_jump()
{
-// if (m_dbc & (1 << 16))
-// printf("Must wait for valid phase?\n");
+// if (m_dbc & (1 << 16))
+// printf("Must wait for valid phase?\n");
bool jump = true;
diff --git a/src/emu/machine/53c7xx.h b/src/emu/machine/53c7xx.h
index 5615ea0e8c5..0593612bfdc 100644
--- a/src/emu/machine/53c7xx.h
+++ b/src/emu/machine/53c7xx.h
@@ -1,8 +1,8 @@
/*********************************************************************
- 53c7xx.h
-
- NCR 53C700 SCSI I/O Processor
+ 53c7xx.h
+
+ NCR 53C700 SCSI I/O Processor
*********************************************************************/
@@ -16,66 +16,66 @@
// REGISTER DEFINES (INCOMPLETE)
//**************************************************************************
-#define SCNTL0_TRG 0x01
-#define SCNTL0_AAP 0x02
-#define SCNTL0_EPG 0x04
-#define SCNTL0_EPC 0x08
-#define SCNTL0_WATN 0x10
-#define SCNTL0_START 0x20
-#define SCNTL0_ARB_MASK 3
-#define SCNTL0_ARB_SHIFT 6
-
-#define SSTAT0_PAR 0x01
-#define SSTAT0_RST 0x02
-#define SSTAT0_UDC 0x04
-#define SSTAT0_SGE 0x08
-#define SSTAT0_SEL 0x10
-#define SSTAT0_STO 0x20
-#define SSTAT0_CMP 0x40
-#define SSTAT0_MA 0x80
-
-#define SSTAT1_SDP 0x01
-#define SSTAT1_RST 0x02
-#define SSTAT1_WOA 0x04
-#define SSTAT1_LOA 0x08
-#define SSTAT1_AIP 0x10
-#define SSTAT1_ORF 0x20
-#define SSTAT1_OLF 0x40
-#define SSTAT1_ILF 0x80
-
-#define ISTAT_DIP 0x01
-#define ISTAT_SIP 0x02
-#define ISTAT_PRE 0x04
-#define ISTAT_CON 0x08
-#define ISTAT_ABRT 0x80
-
-#define DSTAT_OPC 0x01
-#define DSTAT_WTD 0x02
-#define DSTAT_SIR 0x04
-#define DSTAT_SSI 0x08
-#define DSTAT_ABRT 0x10
-#define DSTAT_DFE 0x80
+#define SCNTL0_TRG 0x01
+#define SCNTL0_AAP 0x02
+#define SCNTL0_EPG 0x04
+#define SCNTL0_EPC 0x08
+#define SCNTL0_WATN 0x10
+#define SCNTL0_START 0x20
+#define SCNTL0_ARB_MASK 3
+#define SCNTL0_ARB_SHIFT 6
+
+#define SSTAT0_PAR 0x01
+#define SSTAT0_RST 0x02
+#define SSTAT0_UDC 0x04
+#define SSTAT0_SGE 0x08
+#define SSTAT0_SEL 0x10
+#define SSTAT0_STO 0x20
+#define SSTAT0_CMP 0x40
+#define SSTAT0_MA 0x80
+
+#define SSTAT1_SDP 0x01
+#define SSTAT1_RST 0x02
+#define SSTAT1_WOA 0x04
+#define SSTAT1_LOA 0x08
+#define SSTAT1_AIP 0x10
+#define SSTAT1_ORF 0x20
+#define SSTAT1_OLF 0x40
+#define SSTAT1_ILF 0x80
+
+#define ISTAT_DIP 0x01
+#define ISTAT_SIP 0x02
+#define ISTAT_PRE 0x04
+#define ISTAT_CON 0x08
+#define ISTAT_ABRT 0x80
+
+#define DSTAT_OPC 0x01
+#define DSTAT_WTD 0x02
+#define DSTAT_SIR 0x04
+#define DSTAT_SSI 0x08
+#define DSTAT_ABRT 0x10
+#define DSTAT_DFE 0x80
struct NCR53C7XXinterface
{
- devcb_write_line m_out_irq_cb;
- UINT32 (*host_r)(running_machine &machine, bool io, offs_t addr);
- void (*host_w)(running_machine &machine, bool io, offs_t addr, UINT32 data, UINT32 mem_mask);
+ devcb_write_line m_out_irq_cb;
+ UINT32 (*host_r)(running_machine &machine, bool io, offs_t addr);
+ void (*host_w)(running_machine &machine, bool io, offs_t addr, UINT32 data, UINT32 mem_mask);
};
class ncr53c7xx_device : public nscsi_device,
- public device_execute_interface,
- public NCR53C7XXinterface
+ public device_execute_interface,
+ public NCR53C7XXinterface
{
public:
// construction/destruction
ncr53c7xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// our API
- DECLARE_READ32_MEMBER(read);
- DECLARE_WRITE32_MEMBER(write);
+ DECLARE_READ32_MEMBER(read);
+ DECLARE_WRITE32_MEMBER(write);
protected:
@@ -83,7 +83,7 @@ protected:
virtual void device_start();
virtual void device_reset();
virtual void device_config_complete();
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual void execute_run();
int m_icount;
@@ -120,7 +120,7 @@ private:
INIT_XFER,
INIT_XFER_WAIT_REQ,
INIT_XFER_SEND_BYTE,
- INIT_XFER_RECV_PAD,
+ INIT_XFER_RECV_PAD,
INIT_XFER_RECV_BYTE_ACK,
INIT_XFER_RECV_BYTE_NACK,
SEND_WAIT_REQ_0,
@@ -146,7 +146,7 @@ private:
SCRIPTS_FETCH,
SCRIPTS_EXECUTE,
};
-
+
void set_scripts_state(scripts_state state);
void scripts_yield();
void scripts_decode_bm(void);
@@ -174,49 +174,49 @@ private:
// SCSI registers
- UINT8 m_scntl[2];
- UINT8 m_sdid;
- UINT8 m_sien;
- UINT8 m_scid;
- UINT8 m_sxfer;
- UINT8 m_sodl;
- UINT8 m_socl;
- UINT8 m_sfbr;
- UINT8 m_sidl;
- UINT8 m_sbdl;
- UINT8 m_sbcl;
- UINT8 m_dstat;
- UINT8 m_sstat[3];
- UINT8 m_ctest[8];
- UINT32 m_temp;
- UINT8 m_dfifo;
- UINT8 m_istat;
- UINT32 m_dbc;
- UINT8 m_dcmd;
- UINT32 m_dnad;
- UINT32 m_dsp;
- UINT32 m_dsps;
- UINT8 m_dmode;
- UINT8 m_dien;
- UINT8 m_dwt;
- UINT8 m_dcntl;
+ UINT8 m_scntl[2];
+ UINT8 m_sdid;
+ UINT8 m_sien;
+ UINT8 m_scid;
+ UINT8 m_sxfer;
+ UINT8 m_sodl;
+ UINT8 m_socl;
+ UINT8 m_sfbr;
+ UINT8 m_sidl;
+ UINT8 m_sbdl;
+ UINT8 m_sbcl;
+ UINT8 m_dstat;
+ UINT8 m_sstat[3];
+ UINT8 m_ctest[8];
+ UINT32 m_temp;
+ UINT8 m_dfifo;
+ UINT8 m_istat;
+ UINT32 m_dbc;
+ UINT8 m_dcmd;
+ UINT32 m_dnad;
+ UINT32 m_dsp;
+ UINT32 m_dsps;
+ UINT8 m_dmode;
+ UINT8 m_dien;
+ UINT8 m_dwt;
+ UINT8 m_dcntl;
// other state
- int m_scsi_state;
- bool m_connected;
- bool m_finished;
- UINT8 m_last_data;
- UINT32 m_xfr_phase;
- emu_timer *m_tm;
+ int m_scsi_state;
+ bool m_connected;
+ bool m_finished;
+ UINT8 m_last_data;
+ UINT32 m_xfr_phase;
+ emu_timer *m_tm;
- int m_scripts_state;
- int m_scripts_substate;
- void (ncr53c7xx_device::*m_scripts_op)();
+ int m_scripts_state;
+ int m_scripts_substate;
+ void (ncr53c7xx_device::*m_scripts_op)();
// callbacks
- devcb_resolved_write_line m_out_irq_func;
- devcb_resolved_write_line m_out_drq_func;
+ devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_write_line m_out_drq_func;
};
// device type definition
diff --git a/src/emu/machine/53c810.c b/src/emu/machine/53c810.c
index a1811949c48..4a30126f7df 100644
--- a/src/emu/machine/53c810.c
+++ b/src/emu/machine/53c810.c
@@ -4,7 +4,7 @@
#include "53c810.h"
#include "machine/scsihle.h"
-#define DMA_MAX_ICOUNT 512 /* Maximum number of DMA Scripts opcodes to run */
+#define DMA_MAX_ICOUNT 512 /* Maximum number of DMA Scripts opcodes to run */
#define DASM_OPCODES 0
UINT32 lsi53c810_device::FETCH()
@@ -38,8 +38,8 @@ void lsi53c810_device::dmaop_interrupt()
}
dsps = FETCH();
- istat |= 0x1; /* DMA interrupt pending */
- dstat |= 0x4; /* SIR (SCRIPTS Interrupt Instruction Received) */
+ istat |= 0x1; /* DMA interrupt pending */
+ dstat |= 0x4; /* SIR (SCRIPTS Interrupt Instruction Received) */
if(irq_callback != NULL) {
irq_callback(machine(), 1);
@@ -108,11 +108,11 @@ void lsi53c810_device::dmaop_select()
/* initiator mode */
logerror("53c810: SELECT: our ID %d, target ID %d\n", scid&7, (dcmd>>16)&7);
- sstat1 &= ~0x07; // clear current bus phase
- if (dcmd & 0x01000000) // select with ATN
+ sstat1 &= ~0x07; // clear current bus phase
+ if (dcmd & 0x01000000) // select with ATN
{
mame_printf_debug("53c810: want select with ATN, setting message phase\n");
- sstat1 |= 0x7; // ATN means we want message in phase
+ sstat1 |= 0x7; // ATN means we want message in phase
}
}
}
@@ -137,7 +137,7 @@ void lsi53c810_device::dmaop_wait_disconnect()
void lsi53c810_device::dmaop_wait_reselect()
{
- // UINT32 operand;
+ // UINT32 operand;
// operand = FETCH();
@@ -321,7 +321,7 @@ void lsi53c810_device::dmaop_jump()
}
else
{
- FETCH(); // skip operand to continue on
+ FETCH(); // skip operand to continue on
}
}
@@ -337,7 +337,7 @@ void lsi53c810_device::dmaop_call()
}
else
{
- FETCH(); // skip operand to continue on
+ FETCH(); // skip operand to continue on
}
}
@@ -351,7 +351,7 @@ void lsi53c810_device::dmaop_return()
}
else
{
- FETCH(); // skip operand to continue on
+ FETCH(); // skip operand to continue on
}
}
@@ -396,37 +396,37 @@ UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space.device().safe_pc());
switch(offset)
{
- case 0x00: /* SCNTL0 */
+ case 0x00: /* SCNTL0 */
return scntl0;
- case 0x01: /* SCNTL1 */
+ case 0x01: /* SCNTL1 */
return scntl1;
- case 0x02: /* SCNTL2 */
+ case 0x02: /* SCNTL2 */
return scntl2;
- case 0x03: /* SCNTL3 */
+ case 0x03: /* SCNTL3 */
return scntl3;
- case 0x04: /* SCID */
+ case 0x04: /* SCID */
return scid;
- case 0x05: /* SXFER */
+ case 0x05: /* SXFER */
return sxfer;
- case 0x09: /* SOCL */
+ case 0x09: /* SOCL */
return socl;
- case 0x0c: /* DSTAT */
+ case 0x0c: /* DSTAT */
return dstat;
- case 0x0d: /* SSTAT0 */
+ case 0x0d: /* SSTAT0 */
return sstat0;
- case 0x0e: /* SSTAT1 */
+ case 0x0e: /* SSTAT1 */
return sstat1;
- case 0x0f: /* SSTAT2 */
+ case 0x0f: /* SSTAT2 */
return sstat2;
- case 0x10: /* DSA [7-0] */
+ case 0x10: /* DSA [7-0] */
return dsa & 0xff;
- case 0x11: /* DSA [15-8] */
+ case 0x11: /* DSA [15-8] */
return (dsa >> 8) & 0xff;
- case 0x12: /* DSA [23-16] */
+ case 0x12: /* DSA [23-16] */
return (dsa >> 16) & 0xff;
- case 0x13: /* DSA [31-24] */
+ case 0x13: /* DSA [31-24] */
return (dsa >> 24) & 0xff;
- case 0x14: /* ISTAT */
+ case 0x14: /* ISTAT */
// clear the interrupt on service
if(irq_callback != NULL)
{
@@ -434,34 +434,34 @@ UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
}
return istat;
- case 0x2c: /* DSP [7-0] */
+ case 0x2c: /* DSP [7-0] */
return dsp & 0xff;
- case 0x2d: /* DSP [15-8] */
+ case 0x2d: /* DSP [15-8] */
return (dsp >> 8) & 0xff;
- case 0x2e: /* DSP [23-16] */
+ case 0x2e: /* DSP [23-16] */
return (dsp >> 16) & 0xff;
- case 0x2f: /* DSP [31-24] */
+ case 0x2f: /* DSP [31-24] */
return (dsp >> 24) & 0xff;
- case 0x34: /* SCRATCH A */
+ case 0x34: /* SCRATCH A */
case 0x35:
case 0x36:
case 0x37:
return scratch_a[offset % 4];
- case 0x39: /* DIEN */
+ case 0x39: /* DIEN */
return dien;
- case 0x3b: /* DCNTL */
+ case 0x3b: /* DCNTL */
return dcntl;
- case 0x40: /* SIEN0 */
+ case 0x40: /* SIEN0 */
return sien0;
- case 0x41: /* SIEN1 */
+ case 0x41: /* SIEN1 */
return sien1;
- case 0x48: /* STIME0 */
+ case 0x48: /* STIME0 */
return stime0;
- case 0x4a: /* RESPID */
+ case 0x4a: /* RESPID */
return respid;
- case 0x4d: /* STEST1 */
+ case 0x4d: /* STEST1 */
return stest1;
- case 0x5c: /* SCRATCH B */
+ case 0x5c: /* SCRATCH B */
case 0x5d:
case 0x5e:
case 0x5f:
@@ -479,68 +479,68 @@ void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space.device().safe_pc());
switch(offset)
{
- case 0x00: /* SCNTL0 */
+ case 0x00: /* SCNTL0 */
scntl0 = data;
break;
- case 0x01: /* SCNTL1 */
+ case 0x01: /* SCNTL1 */
scntl1 = data;
break;
- case 0x02: /* SCNTL2 */
+ case 0x02: /* SCNTL2 */
scntl2 = data;
break;
- case 0x03: /* SCNTL3 */
+ case 0x03: /* SCNTL3 */
scntl3 = data;
break;
- case 0x04: /* SCID */
+ case 0x04: /* SCID */
scid = data;
break;
- case 0x05: /* SXFER */
+ case 0x05: /* SXFER */
sxfer = data;
break;
- case 0x09: /* SOCL */
+ case 0x09: /* SOCL */
socl = data;
break;
- case 0x0d: /* SSTAT0 */
+ case 0x0d: /* SSTAT0 */
sstat0 = data;
break;
- case 0x0e: /* SSTAT1 */
+ case 0x0e: /* SSTAT1 */
sstat1 = data;
break;
- case 0x0f: /* SSTAT2 */
+ case 0x0f: /* SSTAT2 */
sstat2 = data;
break;
- case 0x10: /* DSA [7-0] */
+ case 0x10: /* DSA [7-0] */
dsa &= 0xffffff00;
dsa |= data;
break;
- case 0x11: /* DSA [15-8] */
+ case 0x11: /* DSA [15-8] */
dsa &= 0xffff00ff;
dsa |= data << 8;
break;
- case 0x12: /* DSA [23-16] */
+ case 0x12: /* DSA [23-16] */
dsa &= 0xff00ffff;
dsa |= data << 16;
break;
- case 0x13: /* DSA [31-24] */
+ case 0x13: /* DSA [31-24] */
dsa &= 0x00ffffff;
dsa |= data << 24;
break;
- case 0x14: /* ISTAT */
+ case 0x14: /* ISTAT */
istat = data;
break;
- case 0x2c: /* DSP [7-0] */
+ case 0x2c: /* DSP [7-0] */
dsp &= 0xffffff00;
dsp |= data;
break;
- case 0x2d: /* DSP [15-8] */
+ case 0x2d: /* DSP [15-8] */
dsp &= 0xffff00ff;
dsp |= data << 8;
break;
- case 0x2e: /* DSP [23-16] */
+ case 0x2e: /* DSP [23-16] */
dsp &= 0xff00ffff;
dsp |= data << 16;
break;
- case 0x2f: /* DSP [31-24] */
+ case 0x2f: /* DSP [31-24] */
dsp &= 0x00ffffff;
dsp |= data << 24;
halted = 0;
@@ -548,55 +548,55 @@ void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
dma_exec();
}
break;
- case 0x34: /* SCRATCH A */
+ case 0x34: /* SCRATCH A */
case 0x35:
case 0x36:
case 0x37:
scratch_a[offset % 4] = data;
break;
- case 0x38: /* DMODE */
+ case 0x38: /* DMODE */
dmode = data;
break;
- case 0x39: /* DIEN */
+ case 0x39: /* DIEN */
dien = data;
break;
- case 0x3b: /* DCNTL */
+ case 0x3b: /* DCNTL */
dcntl = data;
- if(dcntl & 0x14 && !halted) /* single-step & start DMA */
+ if(dcntl & 0x14 && !halted) /* single-step & start DMA */
{
int op;
dcmd = FETCH();
op = (dcmd >> 24) & 0xff;
dma_opcode[op]();
- istat |= 0x3; /* DMA interrupt pending */
- dstat |= 0x8; /* SSI (Single Step Interrupt) */
+ istat |= 0x3; /* DMA interrupt pending */
+ dstat |= 0x8; /* SSI (Single Step Interrupt) */
if(irq_callback != NULL) {
irq_callback(machine(), 1);
}
}
- else if(dcntl & 0x04 && !halted) /* manual start DMA */
+ else if(dcntl & 0x04 && !halted) /* manual start DMA */
{
dma_exec();
}
break;
- case 0x40: /* SIEN0 */
+ case 0x40: /* SIEN0 */
sien0 = data;
break;
- case 0x41: /* SIEN1 */
+ case 0x41: /* SIEN1 */
sien1 = data;
break;
- case 0x48: /* STIME0 */
+ case 0x48: /* STIME0 */
stime0 = data;
break;
- case 0x4a: /* RESPID */
+ case 0x4a: /* RESPID */
respid = data;
break;
- case 0x4d: /* STEST1 */
+ case 0x4d: /* STEST1 */
stest1 = data;
break;
- case 0x5c: /* SCRATCH B */
+ case 0x5c: /* SCRATCH B */
case 0x5d:
case 0x5e:
case 0x5f:
@@ -619,7 +619,7 @@ void lsi53c810_device::add_opcode(UINT8 op, UINT8 mask, opcode_handler_delegate
}
lsi53c810_device::lsi53c810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, LSI53C810, "53C810 SCSI", tag, owner, clock)
+ : device_t(mconfig, LSI53C810, "53C810 SCSI", tag, owner, clock)
{
}
diff --git a/src/emu/machine/53c810.h b/src/emu/machine/53c810.h
index 273d4a18473..03d882be207 100644
--- a/src/emu/machine/53c810.h
+++ b/src/emu/machine/53c810.h
@@ -6,7 +6,7 @@
struct LSI53C810interface
{
void (*irq_callback)(running_machine &machine, int); /* IRQ callback */
- void (*dma_callback)(running_machine &machine, UINT32, UINT32, int, int); /* DMA callback */
+ void (*dma_callback)(running_machine &machine, UINT32, UINT32, int, int); /* DMA callback */
UINT32 (*fetch)(running_machine &machine, UINT32 dsp);
};
@@ -15,7 +15,7 @@ struct LSI53C810interface
MCFG_DEVICE_CONFIG(_config)
class lsi53c810_device : public device_t,
- public LSI53C810interface
+ public LSI53C810interface
{
public:
// construction/destruction
@@ -62,7 +62,7 @@ private:
UINT32 lsi53c810_dasm_fetch(UINT32 pc);
unsigned lsi53c810_dasm(char *buf, UINT32 pc);
- scsihle_device *devices[8]; /* SCSI IDs 0-7 */
+ scsihle_device *devices[8]; /* SCSI IDs 0-7 */
UINT8 last_id;
UINT8 scntl0;
diff --git a/src/emu/machine/6522via.c b/src/emu/machine/6522via.c
index 6b7182760ad..d934d91e4d3 100644
--- a/src/emu/machine/6522via.c
+++ b/src/emu/machine/6522via.c
@@ -30,7 +30,7 @@
PARAMETERS
***************************************************************************/
-#define TRACE_VIA 0
+#define TRACE_VIA 0
/***************************************************************************
@@ -38,65 +38,65 @@
***************************************************************************/
/* Macros for PCR */
-#define CA1_LOW_TO_HIGH(c) (c & 0x01)
-#define CA1_HIGH_TO_LOW(c) (!(c & 0x01))
-
-#define CB1_LOW_TO_HIGH(c) (c & 0x10)
-#define CB1_HIGH_TO_LOW(c) (!(c & 0x10))
-
-#define CA2_INPUT(c) (!(c & 0x08))
-#define CA2_LOW_TO_HIGH(c) ((c & 0x0c) == 0x04)
-#define CA2_HIGH_TO_LOW(c) ((c & 0x0c) == 0x00)
-#define CA2_IND_IRQ(c) ((c & 0x0a) == 0x02)
-
-#define CA2_OUTPUT(c) (c & 0x08)
-#define CA2_AUTO_HS(c) ((c & 0x0c) == 0x08)
-#define CA2_HS_OUTPUT(c) ((c & 0x0e) == 0x08)
-#define CA2_PULSE_OUTPUT(c) ((c & 0x0e) == 0x0a)
-#define CA2_FIX_OUTPUT(c) ((c & 0x0c) == 0x0c)
-#define CA2_OUTPUT_LEVEL(c) ((c & 0x02) >> 1)
-
-#define CB2_INPUT(c) (!(c & 0x80))
-#define CB2_LOW_TO_HIGH(c) ((c & 0xc0) == 0x40)
-#define CB2_HIGH_TO_LOW(c) ((c & 0xc0) == 0x00)
-#define CB2_IND_IRQ(c) ((c & 0xa0) == 0x20)
-
-#define CB2_OUTPUT(c) (c & 0x80)
-#define CB2_AUTO_HS(c) ((c & 0xc0) == 0x80)
-#define CB2_HS_OUTPUT(c) ((c & 0xe0) == 0x80)
-#define CB2_PULSE_OUTPUT(c) ((c & 0xe0) == 0xa0)
-#define CB2_FIX_OUTPUT(c) ((c & 0xc0) == 0xc0)
-#define CB2_OUTPUT_LEVEL(c) ((c & 0x20) >> 5)
+#define CA1_LOW_TO_HIGH(c) (c & 0x01)
+#define CA1_HIGH_TO_LOW(c) (!(c & 0x01))
+
+#define CB1_LOW_TO_HIGH(c) (c & 0x10)
+#define CB1_HIGH_TO_LOW(c) (!(c & 0x10))
+
+#define CA2_INPUT(c) (!(c & 0x08))
+#define CA2_LOW_TO_HIGH(c) ((c & 0x0c) == 0x04)
+#define CA2_HIGH_TO_LOW(c) ((c & 0x0c) == 0x00)
+#define CA2_IND_IRQ(c) ((c & 0x0a) == 0x02)
+
+#define CA2_OUTPUT(c) (c & 0x08)
+#define CA2_AUTO_HS(c) ((c & 0x0c) == 0x08)
+#define CA2_HS_OUTPUT(c) ((c & 0x0e) == 0x08)
+#define CA2_PULSE_OUTPUT(c) ((c & 0x0e) == 0x0a)
+#define CA2_FIX_OUTPUT(c) ((c & 0x0c) == 0x0c)
+#define CA2_OUTPUT_LEVEL(c) ((c & 0x02) >> 1)
+
+#define CB2_INPUT(c) (!(c & 0x80))
+#define CB2_LOW_TO_HIGH(c) ((c & 0xc0) == 0x40)
+#define CB2_HIGH_TO_LOW(c) ((c & 0xc0) == 0x00)
+#define CB2_IND_IRQ(c) ((c & 0xa0) == 0x20)
+
+#define CB2_OUTPUT(c) (c & 0x80)
+#define CB2_AUTO_HS(c) ((c & 0xc0) == 0x80)
+#define CB2_HS_OUTPUT(c) ((c & 0xe0) == 0x80)
+#define CB2_PULSE_OUTPUT(c) ((c & 0xe0) == 0xa0)
+#define CB2_FIX_OUTPUT(c) ((c & 0xc0) == 0xc0)
+#define CB2_OUTPUT_LEVEL(c) ((c & 0x20) >> 5)
/* Macros for ACR */
-#define PA_LATCH_ENABLE(c) (c & 0x01)
-#define PB_LATCH_ENABLE(c) (c & 0x02)
-
-#define SR_DISABLED(c) (!(c & 0x1c))
-#define SI_T2_CONTROL(c) ((c & 0x1c) == 0x04)
-#define SI_O2_CONTROL(c) ((c & 0x1c) == 0x08)
-#define SI_EXT_CONTROL(c) ((c & 0x1c) == 0x0c)
-#define SO_T2_RATE(c) ((c & 0x1c) == 0x10)
-#define SO_T2_CONTROL(c) ((c & 0x1c) == 0x14)
-#define SO_O2_CONTROL(c) ((c & 0x1c) == 0x18)
-#define SO_EXT_CONTROL(c) ((c & 0x1c) == 0x1c)
-
-#define T1_SET_PB7(c) (c & 0x80)
-#define T1_CONTINUOUS(c) (c & 0x40)
-#define T2_COUNT_PB6(c) (c & 0x20)
+#define PA_LATCH_ENABLE(c) (c & 0x01)
+#define PB_LATCH_ENABLE(c) (c & 0x02)
+
+#define SR_DISABLED(c) (!(c & 0x1c))
+#define SI_T2_CONTROL(c) ((c & 0x1c) == 0x04)
+#define SI_O2_CONTROL(c) ((c & 0x1c) == 0x08)
+#define SI_EXT_CONTROL(c) ((c & 0x1c) == 0x0c)
+#define SO_T2_RATE(c) ((c & 0x1c) == 0x10)
+#define SO_T2_CONTROL(c) ((c & 0x1c) == 0x14)
+#define SO_O2_CONTROL(c) ((c & 0x1c) == 0x18)
+#define SO_EXT_CONTROL(c) ((c & 0x1c) == 0x1c)
+
+#define T1_SET_PB7(c) (c & 0x80)
+#define T1_CONTINUOUS(c) (c & 0x40)
+#define T2_COUNT_PB6(c) (c & 0x20)
/* Interrupt flags */
-#define INT_CA2 0x01
-#define INT_CA1 0x02
-#define INT_SR 0x04
-#define INT_CB2 0x08
-#define INT_CB1 0x10
-#define INT_T2 0x20
-#define INT_T1 0x40
-#define INT_ANY 0x80
-
-#define CLR_PA_INT() clear_int(INT_CA1 | ((!CA2_IND_IRQ(m_pcr)) ? INT_CA2: 0))
-#define CLR_PB_INT() clear_int(INT_CB1 | ((!CB2_IND_IRQ(m_pcr)) ? INT_CB2: 0))
+#define INT_CA2 0x01
+#define INT_CA1 0x02
+#define INT_SR 0x04
+#define INT_CB2 0x08
+#define INT_CB1 0x10
+#define INT_T2 0x20
+#define INT_T1 0x40
+#define INT_ANY 0x80
+
+#define CLR_PA_INT() clear_int(INT_CA1 | ((!CA2_IND_IRQ(m_pcr)) ? INT_CA2: 0))
+#define CLR_PB_INT() clear_int(INT_CB1 | ((!CB2_IND_IRQ(m_pcr)) ? INT_CB2: 0))
#define IFR_DELAY 3
@@ -149,7 +149,7 @@ const device_type VIA6522 = &device_creator<via6522_device>;
via6522_device::via6522_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, VIA6522, "6522 VIA", tag, owner, clock),
- m_irq(CLEAR_LINE)
+ m_irq(CLEAR_LINE)
{
}
@@ -571,7 +571,7 @@ READ8_MEMBER( via6522_device::read )
CLR_PA_INT();
/* If CA2 is configured as output and in pulse or handshake mode,
- CA2 is set now */
+ CA2 is set now */
if (CA2_PULSE_OUTPUT(m_pcr))
{
/* call the CA2 output function */
@@ -581,7 +581,7 @@ READ8_MEMBER( via6522_device::read )
m_ca2_timer->adjust(clocks_to_attotime(1));
}
/* If CA2 is configured as output and in pulse or handshake mode,
- CA2 is set now */
+ CA2 is set now */
else if (CA2_AUTO_HS(m_pcr))
{
if (m_out_ca2)
@@ -735,7 +735,7 @@ WRITE8_MEMBER( via6522_device::write )
CLR_PB_INT();
/* If CB2 is configured as output and in pulse or handshake mode,
- CB2 is set now */
+ CB2 is set now */
if (CB2_AUTO_HS(m_pcr))
{
if (m_out_cb2)
@@ -761,7 +761,7 @@ WRITE8_MEMBER( via6522_device::write )
CLR_PA_INT();
/* If CA2 is configured as output and in pulse or handshake mode,
- CA2 is set now */
+ CA2 is set now */
if (CA2_PULSE_OUTPUT(m_pcr))
{
/* call the CA2 output function */
@@ -1008,7 +1008,7 @@ WRITE_LINE_MEMBER( via6522_device::write_ca1 )
set_int(INT_CA1);
/* CA2 is configured as output and in pulse or handshake mode,
- CA2 is cleared now */
+ CA2 is cleared now */
if (CA2_AUTO_HS(m_pcr))
{
if (!m_out_ca2)
@@ -1082,7 +1082,7 @@ WRITE_LINE_MEMBER( via6522_device::write_cb1 )
set_int(INT_CB1);
/* CB2 is configured as output and in pulse or handshake mode,
- CB2 is cleared now */
+ CB2 is cleared now */
if (CB2_AUTO_HS(m_pcr))
{
if (!m_out_cb2)
diff --git a/src/emu/machine/6522via.h b/src/emu/machine/6522via.h
index 466231069af..53d8258263b 100644
--- a/src/emu/machine/6522via.h
+++ b/src/emu/machine/6522via.h
@@ -25,8 +25,8 @@
//**************************************************************************
#define MCFG_VIA6522_ADD(_tag, _clock, _intrf) \
- MCFG_DEVICE_ADD(_tag, VIA6522, _clock) \
- MCFG_DEVICE_CONFIG(_intrf)
+ MCFG_DEVICE_ADD(_tag, VIA6522, _clock) \
+ MCFG_DEVICE_CONFIG(_intrf)
@@ -34,22 +34,22 @@
MACROS / CONSTANTS
***************************************************************************/
-#define VIA_PB 0
-#define VIA_PA 1
-#define VIA_DDRB 2
-#define VIA_DDRA 3
-#define VIA_T1CL 4
-#define VIA_T1CH 5
-#define VIA_T1LL 6
-#define VIA_T1LH 7
-#define VIA_T2CL 8
-#define VIA_T2CH 9
-#define VIA_SR 10
-#define VIA_ACR 11
-#define VIA_PCR 12
-#define VIA_IFR 13
-#define VIA_IER 14
-#define VIA_PANH 15
+#define VIA_PB 0
+#define VIA_PA 1
+#define VIA_DDRB 2
+#define VIA_DDRA 3
+#define VIA_T1CL 4
+#define VIA_T1CH 5
+#define VIA_T1LL 6
+#define VIA_T1LH 7
+#define VIA_T2CL 8
+#define VIA_T2CH 9
+#define VIA_SR 10
+#define VIA_ACR 11
+#define VIA_PCR 12
+#define VIA_IFR 13
+#define VIA_IER 14
+#define VIA_PANH 15
/***************************************************************************
@@ -61,58 +61,58 @@
struct via6522_interface
{
- devcb_read8 m_in_a_cb;
- devcb_read8 m_in_b_cb;
- devcb_read_line m_in_ca1_cb;
- devcb_read_line m_in_cb1_cb;
- devcb_read_line m_in_ca2_cb;
- devcb_read_line m_in_cb2_cb;
- devcb_write8 m_out_a_cb;
- devcb_write8 m_out_b_cb;
- devcb_write_line m_out_ca1_cb;
- devcb_write_line m_out_cb1_cb;
- devcb_write_line m_out_ca2_cb;
- devcb_write_line m_out_cb2_cb;
- devcb_write_line m_irq_cb;
+ devcb_read8 m_in_a_cb;
+ devcb_read8 m_in_b_cb;
+ devcb_read_line m_in_ca1_cb;
+ devcb_read_line m_in_cb1_cb;
+ devcb_read_line m_in_ca2_cb;
+ devcb_read_line m_in_cb2_cb;
+ devcb_write8 m_out_a_cb;
+ devcb_write8 m_out_b_cb;
+ devcb_write_line m_out_ca1_cb;
+ devcb_write_line m_out_cb1_cb;
+ devcb_write_line m_out_ca2_cb;
+ devcb_write_line m_out_cb2_cb;
+ devcb_write_line m_irq_cb;
};
// ======================> via6522_device
class via6522_device : public device_t,
- public via6522_interface
+ public via6522_interface
{
- friend class dart_channel;
+ friend class dart_channel;
public:
- // construction/destruction
- via6522_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ via6522_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
- DECLARE_WRITE8_MEMBER( write_porta ) { m_in_a = data; }
+ DECLARE_WRITE8_MEMBER( write_porta ) { m_in_a = data; }
- DECLARE_READ8_MEMBER( read_portb ) { return m_in_b; }
- DECLARE_WRITE8_MEMBER( write_portb ) { m_in_b = data; }
+ DECLARE_READ8_MEMBER( read_portb ) { return m_in_b; }
+ DECLARE_WRITE8_MEMBER( write_portb ) { m_in_b = data; }
- DECLARE_READ_LINE_MEMBER( read_ca1 ) { return m_in_ca1; }
- DECLARE_WRITE_LINE_MEMBER( write_ca1 );
+ DECLARE_READ_LINE_MEMBER( read_ca1 ) { return m_in_ca1; }
+ DECLARE_WRITE_LINE_MEMBER( write_ca1 );
- DECLARE_READ_LINE_MEMBER( read_ca2 ) { return m_in_ca2; }
- DECLARE_WRITE_LINE_MEMBER( write_ca2 );
+ DECLARE_READ_LINE_MEMBER( read_ca2 ) { return m_in_ca2; }
+ DECLARE_WRITE_LINE_MEMBER( write_ca2 );
- DECLARE_READ_LINE_MEMBER( read_cb1 ) { return m_in_cb1; }
- DECLARE_WRITE_LINE_MEMBER( write_cb1 );
+ DECLARE_READ_LINE_MEMBER( read_cb1 ) { return m_in_cb1; }
+ DECLARE_WRITE_LINE_MEMBER( write_cb1 );
- DECLARE_READ_LINE_MEMBER( read_cb2 ) { return m_in_cb2; }
- DECLARE_WRITE_LINE_MEMBER( write_cb2 );
+ DECLARE_READ_LINE_MEMBER( read_cb2 ) { return m_in_cb2; }
+ DECLARE_WRITE_LINE_MEMBER( write_cb2 );
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@@ -121,67 +121,67 @@ private:
static const device_timer_id TIMER_T2 = 2;
static const device_timer_id TIMER_CA2 = 3;
- UINT16 get_counter1_value();
+ UINT16 get_counter1_value();
inline void set_irq_line(int state);
- void set_int(int data);
- void clear_int(int data);
- void shift();
-
- devcb_resolved_read8 m_in_a_func;
- devcb_resolved_read8 m_in_b_func;
- devcb_resolved_read_line m_in_ca1_func;
- devcb_resolved_read_line m_in_cb1_func;
- devcb_resolved_read_line m_in_ca2_func;
- devcb_resolved_read_line m_in_cb2_func;
- devcb_resolved_write8 m_out_a_func;
- devcb_resolved_write8 m_out_b_func;
- devcb_resolved_write_line m_out_ca1_func;
- devcb_resolved_write_line m_out_cb1_func;
- devcb_resolved_write_line m_out_ca2_func;
- devcb_resolved_write_line m_out_cb2_func;
- devcb_resolved_write_line m_irq_func;
-
- UINT8 m_in_a;
- UINT8 m_in_ca1;
- UINT8 m_in_ca2;
- UINT8 m_out_a;
- UINT8 m_out_ca2;
- UINT8 m_ddr_a;
-
- UINT8 m_in_b;
- UINT8 m_in_cb1;
- UINT8 m_in_cb2;
- UINT8 m_out_b;
- UINT8 m_out_cb2;
- UINT8 m_ddr_b;
-
- UINT8 m_t1cl;
- UINT8 m_t1ch;
- UINT8 m_t1ll;
- UINT8 m_t1lh;
- UINT8 m_t2cl;
- UINT8 m_t2ch;
- UINT8 m_t2ll;
- UINT8 m_t2lh;
-
- UINT8 m_sr;
- UINT8 m_pcr;
- UINT8 m_acr;
- UINT8 m_ier;
- UINT8 m_ifr;
+ void set_int(int data);
+ void clear_int(int data);
+ void shift();
+
+ devcb_resolved_read8 m_in_a_func;
+ devcb_resolved_read8 m_in_b_func;
+ devcb_resolved_read_line m_in_ca1_func;
+ devcb_resolved_read_line m_in_cb1_func;
+ devcb_resolved_read_line m_in_ca2_func;
+ devcb_resolved_read_line m_in_cb2_func;
+ devcb_resolved_write8 m_out_a_func;
+ devcb_resolved_write8 m_out_b_func;
+ devcb_resolved_write_line m_out_ca1_func;
+ devcb_resolved_write_line m_out_cb1_func;
+ devcb_resolved_write_line m_out_ca2_func;
+ devcb_resolved_write_line m_out_cb2_func;
+ devcb_resolved_write_line m_irq_func;
+
+ UINT8 m_in_a;
+ UINT8 m_in_ca1;
+ UINT8 m_in_ca2;
+ UINT8 m_out_a;
+ UINT8 m_out_ca2;
+ UINT8 m_ddr_a;
+
+ UINT8 m_in_b;
+ UINT8 m_in_cb1;
+ UINT8 m_in_cb2;
+ UINT8 m_out_b;
+ UINT8 m_out_cb2;
+ UINT8 m_ddr_b;
+
+ UINT8 m_t1cl;
+ UINT8 m_t1ch;
+ UINT8 m_t1ll;
+ UINT8 m_t1lh;
+ UINT8 m_t2cl;
+ UINT8 m_t2ch;
+ UINT8 m_t2ll;
+ UINT8 m_t2lh;
+
+ UINT8 m_sr;
+ UINT8 m_pcr;
+ UINT8 m_acr;
+ UINT8 m_ier;
+ UINT8 m_ifr;
int m_irq;
- emu_timer *m_t1;
- attotime m_time1;
- UINT8 m_t1_active;
- emu_timer *m_t2;
- attotime m_time2;
- UINT8 m_t2_active;
+ emu_timer *m_t1;
+ attotime m_time1;
+ UINT8 m_t1_active;
+ emu_timer *m_t2;
+ attotime m_time2;
+ UINT8 m_t2_active;
emu_timer *m_ca2_timer;
- emu_timer *m_shift_timer;
- UINT8 m_shift_counter;
+ emu_timer *m_shift_timer;
+ UINT8 m_shift_counter;
};
diff --git a/src/emu/machine/6525tpi.c b/src/emu/machine/6525tpi.c
index 12b0c089c71..b523ff6e816 100644
--- a/src/emu/machine/6525tpi.c
+++ b/src/emu/machine/6525tpi.c
@@ -108,15 +108,15 @@
struct tpi6525_state
{
- devcb_resolved_write_line out_irq_func;
- devcb_resolved_read8 in_pa_func;
- devcb_resolved_write8 out_pa_func;
- devcb_resolved_read8 in_pb_func;
- devcb_resolved_write8 out_pb_func;
- devcb_resolved_read8 in_pc_func;
- devcb_resolved_write8 out_pc_func;
- devcb_resolved_write_line out_ca_func;
- devcb_resolved_write_line out_cb_func;
+ devcb_resolved_write_line out_irq_func;
+ devcb_resolved_read8 in_pa_func;
+ devcb_resolved_write8 out_pa_func;
+ devcb_resolved_read8 in_pb_func;
+ devcb_resolved_write8 out_pb_func;
+ devcb_resolved_read8 in_pc_func;
+ devcb_resolved_write8 out_pc_func;
+ devcb_resolved_write_line out_ca_func;
+ devcb_resolved_write_line out_cb_func;
UINT8 port_a, ddr_a, in_a;
UINT8 port_b, ddr_b, in_b;
@@ -646,5 +646,3 @@ void tpi6525_device::device_reset()
{
DEVICE_RESET_NAME( tpi6525 )(this);
}
-
-
diff --git a/src/emu/machine/6525tpi.h b/src/emu/machine/6525tpi.h
index 8813b42d9df..dce7687700d 100644
--- a/src/emu/machine/6525tpi.h
+++ b/src/emu/machine/6525tpi.h
@@ -36,19 +36,19 @@
struct tpi6525_interface
{
- devcb_write_line out_irq_func;
+ devcb_write_line out_irq_func;
- devcb_read8 in_pa_func;
- devcb_write8 out_pa_func;
+ devcb_read8 in_pa_func;
+ devcb_write8 out_pa_func;
- devcb_read8 in_pb_func;
- devcb_write8 out_pb_func;
+ devcb_read8 in_pb_func;
+ devcb_write8 out_pb_func;
- devcb_read8 in_pc_func;
- devcb_write8 out_pc_func;
+ devcb_read8 in_pc_func;
+ devcb_write8 out_pc_func;
- devcb_write_line out_ca_func;
- devcb_write_line out_cb_func;
+ devcb_write_line out_ca_func;
+ devcb_write_line out_cb_func;
};
diff --git a/src/emu/machine/6526cia.c b/src/emu/machine/6526cia.c
index d05a2e93e71..d77e008105c 100644
--- a/src/emu/machine/6526cia.c
+++ b/src/emu/machine/6526cia.c
@@ -17,31 +17,31 @@
//**************************************************************************
/* CIA registers */
-#define CIA_PRA 0
-#define CIA_PRB 1
-#define CIA_DDRA 2
-#define CIA_DDRB 3
-#define CIA_TALO 4
-#define CIA_TAHI 5
-#define CIA_TBLO 6
-#define CIA_TBHI 7
-#define CIA_TOD0 8 /* 6526: 1/10 seconds 8520: bits 0- 7 */
-#define CIA_TOD1 9 /* 6526: seconds 8520: bits 8-15 */
-#define CIA_TOD2 10 /* 6526: minutes 8520: bits 16-23 */
-#define CIA_TOD3 11 /* 6526: hours 8520: N/A */
-#define CIA_SDR 12
-#define CIA_ICR 13
-#define CIA_CRA 14
-#define CIA_CRB 15
-
-#define CIA_CRA_START 0x01
-#define CIA_CRA_PBON 0x02
-#define CIA_CRA_OUTMODE 0x04
-#define CIA_CRA_RUNMODE 0x08
-#define CIA_CRA_LOAD 0x10
-#define CIA_CRA_INMODE 0x20
-#define CIA_CRA_SPMODE 0x40
-#define CIA_CRA_TODIN 0x80
+#define CIA_PRA 0
+#define CIA_PRB 1
+#define CIA_DDRA 2
+#define CIA_DDRB 3
+#define CIA_TALO 4
+#define CIA_TAHI 5
+#define CIA_TBLO 6
+#define CIA_TBHI 7
+#define CIA_TOD0 8 /* 6526: 1/10 seconds 8520: bits 0- 7 */
+#define CIA_TOD1 9 /* 6526: seconds 8520: bits 8-15 */
+#define CIA_TOD2 10 /* 6526: minutes 8520: bits 16-23 */
+#define CIA_TOD3 11 /* 6526: hours 8520: N/A */
+#define CIA_SDR 12
+#define CIA_ICR 13
+#define CIA_CRA 14
+#define CIA_CRB 15
+
+#define CIA_CRA_START 0x01
+#define CIA_CRA_PBON 0x02
+#define CIA_CRA_OUTMODE 0x04
+#define CIA_CRA_RUNMODE 0x08
+#define CIA_CRA_LOAD 0x10
+#define CIA_CRA_INMODE 0x20
+#define CIA_CRA_SPMODE 0x40
+#define CIA_CRA_TODIN 0x80
@@ -77,21 +77,21 @@ inline attotime legacy_mos6526_device::cycles_to_time(int c)
//-------------------------------------------------
legacy_mos6526_device::legacy_mos6526_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, type, name, tag, owner, clock)
+ : device_t(mconfig, type, name, tag, owner, clock)
{
}
legacy_mos6526r1_device::legacy_mos6526r1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : legacy_mos6526_device(mconfig, LEGACY_MOS6526R1, "MOS6526r1", tag, owner, clock) { }
+ : legacy_mos6526_device(mconfig, LEGACY_MOS6526R1, "MOS6526r1", tag, owner, clock) { }
legacy_mos6526r2_device::legacy_mos6526r2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : legacy_mos6526_device(mconfig, LEGACY_MOS6526R2, "MOS6526r2", tag, owner, clock) { }
+ : legacy_mos6526_device(mconfig, LEGACY_MOS6526R2, "MOS6526r2", tag, owner, clock) { }
legacy_mos8520_device::legacy_mos8520_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : legacy_mos6526_device(mconfig, LEGACY_MOS8520, "LEGACY_MOS8520", tag, owner, clock) { }
+ : legacy_mos6526_device(mconfig, LEGACY_MOS8520, "LEGACY_MOS8520", tag, owner, clock) { }
legacy_mos5710_device::legacy_mos5710_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : legacy_mos6526_device(mconfig, LEGACY_MOS5710, "LEGACY_MOS5710", tag, owner, clock) { }
+ : legacy_mos6526_device(mconfig, LEGACY_MOS5710, "LEGACY_MOS5710", tag, owner, clock) { }
void legacy_mos6526_device::static_set_tod_clock(device_t &device, int tod_clock)
@@ -164,14 +164,14 @@ void legacy_mos6526_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
- memset(&m_out_pc_cb, 0, sizeof(m_out_pc_cb));
- memset(&m_out_cnt_cb, 0, sizeof(m_out_cnt_cb));
- memset(&m_out_sp_cb, 0, sizeof(m_out_sp_cb));
- memset(&m_in_pa_cb, 0, sizeof(m_in_pa_cb));
- memset(&m_out_pa_cb, 0, sizeof(m_out_pa_cb));
- memset(&m_in_pb_cb, 0, sizeof(m_in_pb_cb));
- memset(&m_out_pb_cb, 0, sizeof(m_out_pb_cb));
+ memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
+ memset(&m_out_pc_cb, 0, sizeof(m_out_pc_cb));
+ memset(&m_out_cnt_cb, 0, sizeof(m_out_cnt_cb));
+ memset(&m_out_sp_cb, 0, sizeof(m_out_sp_cb));
+ memset(&m_in_pa_cb, 0, sizeof(m_in_pa_cb));
+ memset(&m_out_pa_cb, 0, sizeof(m_out_pa_cb));
+ memset(&m_in_pb_cb, 0, sizeof(m_in_pb_cb));
+ memset(&m_out_pb_cb, 0, sizeof(m_out_pb_cb));
}
}
@@ -428,7 +428,7 @@ void legacy_mos6526_device::timer_underflow(int timer)
TIMER_CALLBACK( legacy_mos6526_device::timer_proc )
{
- legacy_mos6526_device *cia = reinterpret_cast<legacy_mos6526_device *>(ptr);
+ legacy_mos6526_device *cia = reinterpret_cast<legacy_mos6526_device *>(ptr);
cia->timer_underflow(param);
}
@@ -452,10 +452,10 @@ static UINT8 bcd_increment(UINT8 value)
void legacy_mos6526_device::increment()
{
/* break down TOD value into components */
- UINT8 subsecond = (UINT8) (m_tod >> 0);
- UINT8 second = (UINT8) (m_tod >> 8);
- UINT8 minute = (UINT8) (m_tod >> 16);
- UINT8 hour = (UINT8) (m_tod >> 24);
+ UINT8 subsecond = (UINT8) (m_tod >> 0);
+ UINT8 second = (UINT8) (m_tod >> 8);
+ UINT8 minute = (UINT8) (m_tod >> 16);
+ UINT8 hour = (UINT8) (m_tod >> 24);
subsecond = bcd_increment(subsecond);
if (subsecond >= 0x10)
@@ -484,10 +484,10 @@ void legacy_mos6526_device::increment()
}
/* update the TOD with new value */
- m_tod = (((UINT32) subsecond) << 0)
- | (((UINT32) second) << 8)
- | (((UINT32) minute) << 16)
- | (((UINT32) hour) << 24);
+ m_tod = (((UINT32) subsecond) << 0)
+ | (((UINT32) second) << 8)
+ | (((UINT32) minute) << 16)
+ | (((UINT32) hour) << 24);
}
/*-------------------------------------------------
@@ -501,7 +501,7 @@ void legacy_mos6526_device::clock_tod()
if ((type() == LEGACY_MOS6526R1) || (type() == LEGACY_MOS6526R2))
{
/* The 6526 split the value into hours, minutes, seconds and
- * subseconds */
+ * subseconds */
increment();
}
else if (type() == LEGACY_MOS8520)
diff --git a/src/emu/machine/6526cia.h b/src/emu/machine/6526cia.h
index 171ed596ee4..0f8e953cee7 100644
--- a/src/emu/machine/6526cia.h
+++ b/src/emu/machine/6526cia.h
@@ -81,16 +81,16 @@
struct legacy_mos6526_interface
{
- devcb_write_line m_out_irq_cb;
- devcb_write_line m_out_pc_cb;
- devcb_write_line m_out_cnt_cb;
- devcb_write_line m_out_sp_cb;
+ devcb_write_line m_out_irq_cb;
+ devcb_write_line m_out_pc_cb;
+ devcb_write_line m_out_cnt_cb;
+ devcb_write_line m_out_sp_cb;
- devcb_read8 m_in_pa_cb;
- devcb_write8 m_out_pa_cb;
+ devcb_read8 m_in_pa_cb;
+ devcb_write8 m_out_pa_cb;
- devcb_read8 m_in_pb_cb;
- devcb_write8 m_out_pb_cb;
+ devcb_read8 m_in_pb_cb;
+ devcb_write8 m_out_pb_cb;
};
@@ -98,11 +98,11 @@ struct legacy_mos6526_interface
// ======================> legacy_mos6526_device
class legacy_mos6526_device : public device_t,
- public legacy_mos6526_interface
+ public legacy_mos6526_interface
{
protected:
- // construction/destruction
- legacy_mos6526_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ legacy_mos6526_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
public:
// inline configuration
@@ -139,12 +139,12 @@ public:
void set_port_mask_value(int port, int data);
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
static TIMER_CALLBACK( timer_proc );
@@ -157,7 +157,7 @@ private:
TIMER_TOD
};
- inline attotime cycles_to_time(int c);
+ inline attotime cycles_to_time(int c);
void update_pc();
void update_interrupts();
void timer_bump(int timer);
@@ -173,24 +173,24 @@ private:
UINT16 get_count();
void update(int which, INT32 new_count);
- UINT32 m_clock;
- UINT16 m_latch;
- UINT16 m_count;
- UINT8 m_mode;
- UINT8 m_irq;
- emu_timer* m_timer;
- legacy_mos6526_device* m_cia;
+ UINT32 m_clock;
+ UINT16 m_latch;
+ UINT16 m_count;
+ UINT8 m_mode;
+ UINT8 m_irq;
+ emu_timer* m_timer;
+ legacy_mos6526_device* m_cia;
};
struct cia_port
{
- UINT8 m_ddr;
- UINT8 m_latch;
- UINT8 m_in;
- UINT8 m_out;
- devcb_resolved_read8 m_read;
- devcb_resolved_write8 m_write;
- UINT8 m_mask_value; /* in READ operation the value can be forced by a extern electric circuit */
+ UINT8 m_ddr;
+ UINT8 m_latch;
+ UINT8 m_in;
+ UINT8 m_out;
+ devcb_resolved_read8 m_read;
+ devcb_resolved_write8 m_write;
+ UINT8 m_mask_value; /* in READ operation the value can be forced by a extern electric circuit */
};
devcb_resolved_write_line m_out_irq_func;
@@ -198,30 +198,30 @@ private:
devcb_resolved_write_line m_out_cnt_func;
devcb_resolved_write_line m_out_sp_func;
- cia_port m_port[2];
- cia_timer m_timer[2];
+ cia_port m_port[2];
+ cia_timer m_timer[2];
/* Time Of the Day clock (TOD) */
- int m_tod_clock;
- UINT32 m_tod;
- UINT32 m_tod_latch;
- UINT8 m_tod_latched;
- UINT8 m_tod_running;
- UINT32 m_alarm;
+ int m_tod_clock;
+ UINT32 m_tod;
+ UINT32 m_tod_latch;
+ UINT8 m_tod_latched;
+ UINT8 m_tod_running;
+ UINT32 m_alarm;
/* Interrupts */
- UINT8 m_icr;
- UINT8 m_ics;
- UINT8 m_irq;
- int m_flag;
+ UINT8 m_icr;
+ UINT8 m_ics;
+ UINT8 m_irq;
+ int m_flag;
/* Serial */
- UINT8 m_loaded;
- UINT8 m_sdr;
- UINT8 m_sp;
- UINT8 m_cnt;
- UINT8 m_shift;
- UINT8 m_serial;
+ UINT8 m_loaded;
+ UINT8 m_sdr;
+ UINT8 m_sp;
+ UINT8 m_cnt;
+ UINT8 m_shift;
+ UINT8 m_serial;
emu_timer *m_pc_timer;
emu_timer *m_tod_timer;
diff --git a/src/emu/machine/6532riot.c b/src/emu/machine/6532riot.c
index 842a070502e..5ffe48b6ece 100644
--- a/src/emu/machine/6532riot.c
+++ b/src/emu/machine/6532riot.c
@@ -29,8 +29,8 @@ enum
TIMER_FINISHING
};
-#define TIMER_FLAG 0x80
-#define PA7_FLAG 0x40
+#define TIMER_FLAG 0x80
+#define PA7_FLAG 0x40
@@ -446,7 +446,7 @@ UINT8 riot6532_device::portb_out_get()
riot6532_device::riot6532_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, RIOT6532, "6532 (RIOT)", tag, owner, clock),
- m_irq(CLEAR_LINE)
+ m_irq(CLEAR_LINE)
{
}
diff --git a/src/emu/machine/6532riot.h b/src/emu/machine/6532riot.h
index 566a309f5a6..81a406b641e 100644
--- a/src/emu/machine/6532riot.h
+++ b/src/emu/machine/6532riot.h
@@ -18,8 +18,8 @@
//**************************************************************************
#define MCFG_RIOT6532_ADD(_tag, _clock, _intrf) \
- MCFG_DEVICE_ADD(_tag, RIOT6532, _clock) \
- MCFG_DEVICE_CONFIG(_intrf)
+ MCFG_DEVICE_ADD(_tag, RIOT6532, _clock) \
+ MCFG_DEVICE_CONFIG(_intrf)
@@ -32,11 +32,11 @@
struct riot6532_interface
{
- devcb_read8 m_in_a_cb;
- devcb_read8 m_in_b_cb;
- devcb_write8 m_out_a_cb;
- devcb_write8 m_out_b_cb;
- devcb_write_line m_irq_cb;
+ devcb_read8 m_in_a_cb;
+ devcb_read8 m_in_b_cb;
+ devcb_write8 m_out_a_cb;
+ devcb_write8 m_out_b_cb;
+ devcb_write_line m_irq_cb;
};
@@ -44,69 +44,69 @@ struct riot6532_interface
// ======================> riot6532_device
class riot6532_device : public device_t,
- public riot6532_interface
+ public riot6532_interface
{
public:
- // construction/destruction
- riot6532_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ riot6532_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
- UINT8 reg_r(UINT8 offset, bool debugger_access = false);
- void reg_w(UINT8 offset, UINT8 data);
+ UINT8 reg_r(UINT8 offset, bool debugger_access = false);
+ void reg_w(UINT8 offset, UINT8 data);
- void porta_in_set(UINT8 data, UINT8 mask);
- void portb_in_set(UINT8 data, UINT8 mask);
+ void porta_in_set(UINT8 data, UINT8 mask);
+ void portb_in_set(UINT8 data, UINT8 mask);
- UINT8 porta_in_get();
- UINT8 portb_in_get();
+ UINT8 porta_in_get();
+ UINT8 portb_in_get();
- UINT8 porta_out_get();
- UINT8 portb_out_get();
+ UINT8 porta_out_get();
+ UINT8 portb_out_get();
- void timer_end();
+ void timer_end();
protected:
- class riot6532_port
- {
- public:
- UINT8 m_in;
- UINT8 m_out;
- UINT8 m_ddr;
- devcb_resolved_read8 m_in_func;
- devcb_resolved_write8 m_out_func;
- };
-
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
-
- static TIMER_CALLBACK( timer_end_callback );
+ class riot6532_port
+ {
+ public:
+ UINT8 m_in;
+ UINT8 m_out;
+ UINT8 m_ddr;
+ devcb_resolved_read8 m_in_func;
+ devcb_resolved_write8 m_out_func;
+ };
+
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
+
+ static TIMER_CALLBACK( timer_end_callback );
private:
- void update_irqstate();
- UINT8 apply_ddr(const riot6532_port *port);
- void update_pa7_state();
- UINT8 get_timer();
+ void update_irqstate();
+ UINT8 apply_ddr(const riot6532_port *port);
+ void update_pa7_state();
+ UINT8 get_timer();
- riot6532_port m_port[2];
+ riot6532_port m_port[2];
- devcb_resolved_write_line m_irq_func;
+ devcb_resolved_write_line m_irq_func;
- UINT8 m_irqstate;
- UINT8 m_irqenable;
- int m_irq;
+ UINT8 m_irqstate;
+ UINT8 m_irqenable;
+ int m_irq;
- UINT8 m_pa7dir; /* 0x80 = high-to-low, 0x00 = low-to-high */
- UINT8 m_pa7prev;
+ UINT8 m_pa7dir; /* 0x80 = high-to-low, 0x00 = low-to-high */
+ UINT8 m_pa7prev;
- UINT8 m_timershift;
- UINT8 m_timerstate;
- emu_timer * m_timer;
+ UINT8 m_timershift;
+ UINT8 m_timerstate;
+ emu_timer * m_timer;
};
diff --git a/src/emu/machine/6551acia.c b/src/emu/machine/6551acia.c
index bfb99897462..7ad80d36ee1 100644
--- a/src/emu/machine/6551acia.c
+++ b/src/emu/machine/6551acia.c
@@ -27,8 +27,8 @@ const device_type ACIA6551 = &device_creator<acia6551_device>;
//-------------------------------------------------
acia6551_device::acia6551_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, ACIA6551, "MOS Technology 6551 ACIA", tag, owner, clock),
- device_serial_interface(mconfig, *this)
+ : device_t(mconfig, ACIA6551, "MOS Technology 6551 ACIA", tag, owner, clock),
+ device_serial_interface(mconfig, *this)
{
}
@@ -135,7 +135,7 @@ void acia6551_device::refresh_ints()
}
//if (m_irq_callback != NULL)
- //(*m_irq_callback)(interrupt_state);
+ //(*m_irq_callback)(interrupt_state);
}
@@ -188,25 +188,25 @@ READ8_MEMBER(acia6551_device::read)
break;
/*
- Status cleared by
- b0 Parity error * (1: error) self clearing **
- b1 Framing error * (1: error) self clearing **
- b2 Overrun * (1: error) self clearing **
- b3 Receive Data Register Full (1: full) Read Receive Data Register
- b4 Transmit Data Reg Empty (1: empty) Write Transmit Data Register
- b5 DCD (0: DCD low, 1: DCD high) Not resettable, reflects DCD state
- b6 DSR (0: DSR low, 1: DCD high) Not resettable, reflects DSR state
- b7 IRQ (0: no int., 1: interrupt) Read Status Register
- */
+ Status cleared by
+ b0 Parity error * (1: error) self clearing **
+ b1 Framing error * (1: error) self clearing **
+ b2 Overrun * (1: error) self clearing **
+ b3 Receive Data Register Full (1: full) Read Receive Data Register
+ b4 Transmit Data Reg Empty (1: empty) Write Transmit Data Register
+ b5 DCD (0: DCD low, 1: DCD high) Not resettable, reflects DCD state
+ b6 DSR (0: DSR low, 1: DCD high) Not resettable, reflects DSR state
+ b7 IRQ (0: no int., 1: interrupt) Read Status Register
+ */
case 1:
- {
- data = m_status_register;
+ {
+ data = m_status_register;
/* clear interrupt */
m_status_register &= ~(1<<7);
}
- break;
+ break;
- case 2:
+ case 2:
data = m_command_register;
break;
@@ -276,32 +276,32 @@ WRITE8_MEMBER(acia6551_device::write)
/*
- Command Register:
-
- b0 Data Terminal Ready
- 0 : disable receiver and all interrupts (DTR high)
- 1 : enable receiver and all interrupts (DTR low)
- b1 Receiver Interrupt Enable
- 0 : IRQ interrupt enabled from bit 3 of status register
- 1 : IRQ interrupt disabled
- b3,b2 Transmitter Control
- Transmit Interrupt RTS level Transmitter
- 00 disabled high off
- 01 enabled low on
- 10 disabled low on
- 11 disabled low Transmit BRK
- b4 Normal/Echo Mode for Receiver
- 0 : normal
- 1 : echo (bits 2 and 3 must be 0)
- b5 Parity Enable
- 0 : parity disabled, no parity bit generated or received
- 1 : parity enabled
- b7,b6 Parity
- 00 : odd parity receiver and transmitter
- 01 : even parity receiver and transmitter
- 10 : mark parity bit transmitted, parity check disabled
- 11 : space parity bit transmitted, parity check disabled
- */
+ Command Register:
+
+ b0 Data Terminal Ready
+ 0 : disable receiver and all interrupts (DTR high)
+ 1 : enable receiver and all interrupts (DTR low)
+ b1 Receiver Interrupt Enable
+ 0 : IRQ interrupt enabled from bit 3 of status register
+ 1 : IRQ interrupt disabled
+ b3,b2 Transmitter Control
+ Transmit Interrupt RTS level Transmitter
+ 00 disabled high off
+ 01 enabled low on
+ 10 disabled low on
+ 11 disabled low Transmit BRK
+ b4 Normal/Echo Mode for Receiver
+ 0 : normal
+ 1 : echo (bits 2 and 3 must be 0)
+ b5 Parity Enable
+ 0 : parity disabled, no parity bit generated or received
+ 1 : parity enabled
+ b7,b6 Parity
+ 00 : odd parity receiver and transmitter
+ 01 : even parity receiver and transmitter
+ 10 : mark parity bit transmitted, parity check disabled
+ 11 : space parity bit transmitted, parity check disabled
+ */
case 2:
{
@@ -338,50 +338,50 @@ WRITE8_MEMBER(acia6551_device::write)
break;
/*
- Control register:
-
- b3-b0 baud rate generator:
- 0000 : 16x external clock
- 0001 : 50 baud
- 0010 : 75 25
- 0011 : 110 35
- 0100 : 134.5
- 0101 : 150
- 0110 : 300 150
- 0111 : 600 300
- 1000 : 1200 600
- 1001 : 1800 600
- 1010 : 2400 600
- 1011 : 3600 1200
- 1100 : 4800 1200
- 1101 : 7200 2400
- 1110 : 9600 2400
- 1111 : 19,200 9600
- b4 receiver clock source
- 0 : external receiver clock
- 1 : baud rate generator
- b6,b5 word length
- 00 : 8 bits
- 01 : 7
- 10 : 6
- 11 : 5
- b7 stop bits
- 0 : 1 stop bit
- 1 : 2 stop bits
- (1 stop bit if parity and word length = 8)
- (1 1/2 stop bits if word length = 5 and no parity)
- */
+ Control register:
+
+ b3-b0 baud rate generator:
+ 0000 : 16x external clock
+ 0001 : 50 baud
+ 0010 : 75 25
+ 0011 : 110 35
+ 0100 : 134.5
+ 0101 : 150
+ 0110 : 300 150
+ 0111 : 600 300
+ 1000 : 1200 600
+ 1001 : 1800 600
+ 1010 : 2400 600
+ 1011 : 3600 1200
+ 1100 : 4800 1200
+ 1101 : 7200 2400
+ 1110 : 9600 2400
+ 1111 : 19,200 9600
+ b4 receiver clock source
+ 0 : external receiver clock
+ 1 : baud rate generator
+ b6,b5 word length
+ 00 : 8 bits
+ 01 : 7
+ 10 : 6
+ 11 : 5
+ b7 stop bits
+ 0 : 1 stop bit
+ 1 : 2 stop bits
+ (1 stop bit if parity and word length = 8)
+ (1 1/2 stop bits if word length = 5 and no parity)
+ */
case 3:
{
unsigned char previous_control_register;
- previous_control_register = m_control_register;
+ previous_control_register = m_control_register;
- if (((previous_control_register^data) & 0x07)!=0)
+ if (((previous_control_register^data) & 0x07)!=0)
{
int rate;
- rate = data & 0x07;
+ rate = data & 0x07;
/* baud rate changed? */
m_timer->reset();
diff --git a/src/emu/machine/6551acia.h b/src/emu/machine/6551acia.h
index ce09c0f1420..3c8e324f1a5 100644
--- a/src/emu/machine/6551acia.h
+++ b/src/emu/machine/6551acia.h
@@ -13,7 +13,7 @@
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
-#define MCFG_ACIA6551_ADD(_tag) \
+#define MCFG_ACIA6551_ADD(_tag) \
MCFG_DEVICE_ADD((_tag), ACIA6551, 0)
@@ -24,11 +24,11 @@
// ======================> acia6551_device
class acia6551_device : public device_t,
- public device_serial_interface
+ public device_serial_interface
{
public:
- // construction/destruction
- acia6551_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ acia6551_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
/* read data register */
DECLARE_READ8_MEMBER(read);
@@ -42,8 +42,8 @@ public:
virtual void input_callback(UINT8 state);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
void refresh_ints();
void update_data_form();
@@ -56,7 +56,7 @@ private:
UINT8 m_control_register;
/* internal baud rate timer */
- emu_timer *m_timer;
+ emu_timer *m_timer;
};
// device type definition
diff --git a/src/emu/machine/6821pia.c b/src/emu/machine/6821pia.c
index decc1d2a439..a4aefd1d1d2 100644
--- a/src/emu/machine/6821pia.c
+++ b/src/emu/machine/6821pia.c
@@ -14,25 +14,25 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-
-#define PIA_IRQ1 (0x80)
-#define PIA_IRQ2 (0x40)
-
-#define IRQ1_ENABLED(c) ( (((c) >> 0) & 0x01))
-#define C1_LOW_TO_HIGH(c) ( (((c) >> 1) & 0x01))
-#define C1_HIGH_TO_LOW(c) (!(((c) >> 1) & 0x01))
-#define OUTPUT_SELECTED(c) ( (((c) >> 2) & 0x01))
-#define IRQ2_ENABLED(c) ( (((c) >> 3) & 0x01))
-#define STROBE_E_RESET(c) ( (((c) >> 3) & 0x01))
-#define STROBE_C1_RESET(c) (!(((c) >> 3) & 0x01))
-#define C2_SET(c) ( (((c) >> 3) & 0x01))
-#define C2_LOW_TO_HIGH(c) ( (((c) >> 4) & 0x01))
-#define C2_HIGH_TO_LOW(c) (!(((c) >> 4) & 0x01))
-#define C2_SET_MODE(c) ( (((c) >> 4) & 0x01))
-#define C2_STROBE_MODE(c) (!(((c) >> 4) & 0x01))
-#define C2_OUTPUT(c) ( (((c) >> 5) & 0x01))
-#define C2_INPUT(c) (!(((c) >> 5) & 0x01))
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+
+#define PIA_IRQ1 (0x80)
+#define PIA_IRQ2 (0x40)
+
+#define IRQ1_ENABLED(c) ( (((c) >> 0) & 0x01))
+#define C1_LOW_TO_HIGH(c) ( (((c) >> 1) & 0x01))
+#define C1_HIGH_TO_LOW(c) (!(((c) >> 1) & 0x01))
+#define OUTPUT_SELECTED(c) ( (((c) >> 2) & 0x01))
+#define IRQ2_ENABLED(c) ( (((c) >> 3) & 0x01))
+#define STROBE_E_RESET(c) ( (((c) >> 3) & 0x01))
+#define STROBE_C1_RESET(c) (!(((c) >> 3) & 0x01))
+#define C2_SET(c) ( (((c) >> 3) & 0x01))
+#define C2_LOW_TO_HIGH(c) ( (((c) >> 4) & 0x01))
+#define C2_HIGH_TO_LOW(c) (!(((c) >> 4) & 0x01))
+#define C2_SET_MODE(c) ( (((c) >> 4) & 0x01))
+#define C2_STROBE_MODE(c) (!(((c) >> 4) & 0x01))
+#define C2_OUTPUT(c) ( (((c) >> 5) & 0x01))
+#define C2_INPUT(c) (!(((c) >> 5) & 0x01))
//**************************************************************************
@@ -48,7 +48,7 @@ const device_type PIA6821 = &device_creator<pia6821_device>;
//-------------------------------------------------
pia6821_device::pia6821_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, PIA6821, "6822 PIA", tag, owner, clock)
+ : device_t(mconfig, PIA6821, "6822 PIA", tag, owner, clock)
{
memset(static_cast<pia6821_interface *>(this), 0, sizeof(pia6821_interface));
}
@@ -73,51 +73,51 @@ void pia6821_device::static_set_interface(device_t &device, const pia6821_interf
void pia6821_device::device_start()
{
// resolve callbacks
- m_in_a_func.resolve(m_in_a_cb, *this);
- m_in_b_func.resolve(m_in_b_cb, *this);
- m_in_ca1_func.resolve(m_in_ca1_cb, *this);
- m_in_cb1_func.resolve(m_in_cb1_cb, *this);
- m_in_ca2_func.resolve(m_in_ca2_cb, *this);
- m_in_cb2_func.resolve(m_in_cb2_cb, *this);
- m_out_a_func.resolve(m_out_a_cb, *this);
- m_out_b_func.resolve(m_out_b_cb, *this);
- m_out_ca2_func.resolve(m_out_ca2_cb, *this);
- m_out_cb2_func.resolve(m_out_cb2_cb, *this);
- m_irq_a_func.resolve(m_irq_a_cb, *this);
- m_irq_b_func.resolve(m_irq_b_cb, *this);
-
- save_item(NAME(m_in_a));
- save_item(NAME(m_in_ca1));
- save_item(NAME(m_in_ca2));
- save_item(NAME(m_out_a));
- save_item(NAME(m_out_ca2));
- save_item(NAME(m_port_a_z_mask));
- save_item(NAME(m_ddr_a));
- save_item(NAME(m_ctl_a));
- save_item(NAME(m_irq_a1));
- save_item(NAME(m_irq_a2));
- save_item(NAME(m_irq_a_state));
- save_item(NAME(m_in_b));
- save_item(NAME(m_in_cb1));
- save_item(NAME(m_in_cb2));
- save_item(NAME(m_out_b));
- save_item(NAME(m_out_cb2));
- save_item(NAME(m_last_out_cb2_z));
- save_item(NAME(m_ddr_b));
- save_item(NAME(m_ctl_b));
- save_item(NAME(m_irq_b1));
- save_item(NAME(m_irq_b2));
- save_item(NAME(m_irq_b_state));
- save_item(NAME(m_in_a_pushed));
- save_item(NAME(m_out_a_needs_pulled));
- save_item(NAME(m_in_ca1_pushed));
- save_item(NAME(m_in_ca2_pushed));
- save_item(NAME(m_out_ca2_needs_pulled));
- save_item(NAME(m_in_b_pushed));
- save_item(NAME(m_out_b_needs_pulled));
- save_item(NAME(m_in_cb1_pushed));
- save_item(NAME(m_in_cb2_pushed));
- save_item(NAME(m_out_cb2_needs_pulled));
+ m_in_a_func.resolve(m_in_a_cb, *this);
+ m_in_b_func.resolve(m_in_b_cb, *this);
+ m_in_ca1_func.resolve(m_in_ca1_cb, *this);
+ m_in_cb1_func.resolve(m_in_cb1_cb, *this);
+ m_in_ca2_func.resolve(m_in_ca2_cb, *this);
+ m_in_cb2_func.resolve(m_in_cb2_cb, *this);
+ m_out_a_func.resolve(m_out_a_cb, *this);
+ m_out_b_func.resolve(m_out_b_cb, *this);
+ m_out_ca2_func.resolve(m_out_ca2_cb, *this);
+ m_out_cb2_func.resolve(m_out_cb2_cb, *this);
+ m_irq_a_func.resolve(m_irq_a_cb, *this);
+ m_irq_b_func.resolve(m_irq_b_cb, *this);
+
+ save_item(NAME(m_in_a));
+ save_item(NAME(m_in_ca1));
+ save_item(NAME(m_in_ca2));
+ save_item(NAME(m_out_a));
+ save_item(NAME(m_out_ca2));
+ save_item(NAME(m_port_a_z_mask));
+ save_item(NAME(m_ddr_a));
+ save_item(NAME(m_ctl_a));
+ save_item(NAME(m_irq_a1));
+ save_item(NAME(m_irq_a2));
+ save_item(NAME(m_irq_a_state));
+ save_item(NAME(m_in_b));
+ save_item(NAME(m_in_cb1));
+ save_item(NAME(m_in_cb2));
+ save_item(NAME(m_out_b));
+ save_item(NAME(m_out_cb2));
+ save_item(NAME(m_last_out_cb2_z));
+ save_item(NAME(m_ddr_b));
+ save_item(NAME(m_ctl_b));
+ save_item(NAME(m_irq_b1));
+ save_item(NAME(m_irq_b2));
+ save_item(NAME(m_irq_b_state));
+ save_item(NAME(m_in_a_pushed));
+ save_item(NAME(m_out_a_needs_pulled));
+ save_item(NAME(m_in_ca1_pushed));
+ save_item(NAME(m_in_ca2_pushed));
+ save_item(NAME(m_out_ca2_needs_pulled));
+ save_item(NAME(m_in_b_pushed));
+ save_item(NAME(m_out_b_needs_pulled));
+ save_item(NAME(m_in_cb1_pushed));
+ save_item(NAME(m_in_cb2_pushed));
+ save_item(NAME(m_out_cb2_needs_pulled));
}
@@ -128,11 +128,11 @@ void pia6821_device::device_start()
void pia6821_device::device_reset()
{
//
- // set default read values.
- //
- // ports A,CA1,CA2 default to 1
- // ports B,CB1,CB2 are three-state and undefined (set to 0)
- //
+ // set default read values.
+ //
+ // ports A,CA1,CA2 default to 1
+ // ports B,CB1,CB2 are three-state and undefined (set to 0)
+ //
m_in_a = 0xff;
m_in_ca1 = TRUE;
m_in_ca2 = TRUE;
@@ -185,7 +185,7 @@ void pia6821_device::device_reset()
void pia6821_device::update_interrupts()
{
- // start with IRQ A
+ // start with IRQ A
int new_state = (m_irq_a1 && IRQ1_ENABLED(m_ctl_a)) || (m_irq_a2 && IRQ2_ENABLED(m_ctl_a));
if (new_state != m_irq_a_state)
@@ -216,15 +216,15 @@ UINT8 pia6821_device::get_in_a_value()
// update the input
if (!m_in_a_func.isnull())
- {
+ {
port_a_data = m_in_a_func(0);
- }
+ }
else
{
if (m_in_a_pushed)
- {
+ {
port_a_data = m_in_a;
- }
+ }
else
{
// mark all pins disconnected
@@ -239,11 +239,11 @@ UINT8 pia6821_device::get_in_a_value()
}
// - connected pins are always read
- // - disconnected pins read the output buffer in output mode
- // - disconnected pins are HI in input mode
+ // - disconnected pins read the output buffer in output mode
+ // - disconnected pins are HI in input mode
ret = (~m_port_a_z_mask & port_a_data) |
- ( m_port_a_z_mask & m_ddr_a & m_out_a) |
- ( m_port_a_z_mask & ~m_ddr_a);
+ ( m_port_a_z_mask & m_ddr_a & m_out_a) |
+ ( m_port_a_z_mask & ~m_ddr_a);
return ret;
}
@@ -258,25 +258,25 @@ UINT8 pia6821_device::get_in_b_value()
UINT8 ret;
if (m_ddr_b == 0xff)
- {
+ {
// all output, just return buffer
ret = m_out_b;
- }
+ }
else
{
UINT8 port_b_data;
// update the input
if (!m_in_b_func.isnull())
- {
+ {
port_b_data = m_in_b_func(0);
- }
+ }
else
{
if (m_in_b_pushed)
- {
+ {
port_b_data = m_in_b;
- }
+ }
else
{
if (!m_logged_port_b_not_connected && (m_ddr_b != 0xff))
@@ -307,15 +307,15 @@ UINT8 pia6821_device::get_out_a_value()
UINT8 ret;
if (m_ddr_a == 0xff)
- {
+ {
// all output
ret = m_out_a;
- }
+ }
else
- {
+ {
// input pins don't change
ret = (m_out_a & m_ddr_a) | (get_in_a_value() & ~m_ddr_a);
- }
+ }
return ret;
}
@@ -344,15 +344,15 @@ void pia6821_device::set_out_ca2(int data)
// send to output function
if (!m_out_ca2_func.isnull())
- {
+ {
m_out_ca2_func(m_out_ca2);
- }
+ }
else
{
if (m_out_ca2_needs_pulled)
- {
+ {
logerror("PIA #%s: Warning! No port CA2 write handler. Previous value has been lost!\n", tag());
- }
+ }
m_out_ca2_needs_pulled = true;
}
@@ -375,15 +375,15 @@ void pia6821_device::set_out_cb2(int data)
// send to output function
if (!m_out_cb2_func.isnull())
- {
+ {
m_out_cb2_func(m_out_cb2);
- }
+ }
else
{
if (m_out_cb2_needs_pulled)
- {
+ {
logerror("PIA #%s: Warning! No port CB2 write handler. Previous value has been lost!\n", tag());
- }
+ }
m_out_cb2_needs_pulled = true;
}
@@ -412,9 +412,9 @@ UINT8 pia6821_device::port_a_r()
// if the CA2 strobe is cleared by the E, reset it right away
if(STROBE_E_RESET(m_ctl_a))
- {
+ {
set_out_ca2(TRUE);
- }
+ }
}
LOG(("PIA #%s: port A read = %02X\n", tag(), ret));
@@ -446,13 +446,13 @@ UINT8 pia6821_device::port_b_r()
UINT8 ret = get_in_b_value();
// This read will implicitly clear the IRQ B1 flag. If CB2 is in write-strobe
- // mode with CB1 restore, and a CB1 active transition set the flag,
- // clearing it will cause CB2 to go high again. Note that this is different
- // from what happens with port A.
+ // mode with CB1 restore, and a CB1 active transition set the flag,
+ // clearing it will cause CB2 to go high again. Note that this is different
+ // from what happens with port A.
if(m_irq_b1 && C2_STROBE_MODE(m_ctl_b) && STROBE_C1_RESET(m_ctl_b))
- {
+ {
set_out_cb2(TRUE);
- }
+ }
// IRQ flags implicitly cleared by a read
m_irq_b1 = FALSE;
@@ -489,9 +489,9 @@ UINT8 pia6821_device::control_a_r()
// update CA1 & CA2 if callback exists, these in turn may update IRQ's
if (!m_in_ca1_func.isnull())
- {
+ {
ca1_w(m_in_ca1_func());
- }
+ }
else if(!m_logged_ca1_not_connected && (!m_in_ca1_pushed))
{
logerror("PIA #%s: Warning! No CA1 read handler. Assuming pin not connected\n", tag());
@@ -499,9 +499,9 @@ UINT8 pia6821_device::control_a_r()
}
if (!m_in_ca2_func.isnull())
- {
+ {
ca2_w(m_in_ca2_func());
- }
+ }
else if ( !m_logged_ca2_not_connected && C2_INPUT(m_ctl_a) && !m_in_ca2_pushed)
{
logerror("PIA #%s: Warning! No CA2 read handler. Assuming pin not connected\n", tag());
@@ -513,14 +513,14 @@ UINT8 pia6821_device::control_a_r()
// set the IRQ flags if we have pending IRQs
if(m_irq_a1)
- {
+ {
ret |= PIA_IRQ1;
- }
+ }
if(m_irq_a2 && C2_INPUT(m_ctl_a))
- {
+ {
ret |= PIA_IRQ2;
- }
+ }
LOG(("PIA #%s: control A read = %02X\n", tag(), ret));
@@ -538,9 +538,9 @@ UINT8 pia6821_device::control_b_r()
// update CB1 & CB2 if callback exists, these in turn may update IRQ's
if(!m_in_cb1_func.isnull())
- {
+ {
cb1_w(m_in_cb1_func());
- }
+ }
else if(!m_logged_cb1_not_connected && !m_in_cb1_pushed)
{
logerror("PIA #%s: Error! no CB1 read handler. Three-state pin is undefined\n", tag());
@@ -548,9 +548,9 @@ UINT8 pia6821_device::control_b_r()
}
if(!m_in_cb2_func.isnull())
- {
+ {
cb2_w(m_in_cb2_func());
- }
+ }
else if(!m_logged_cb2_not_connected && C2_INPUT(m_ctl_b) && !m_in_cb2_pushed)
{
logerror("PIA #%s: Error! No CB2 read handler. Three-state pin is undefined\n", tag());
@@ -562,14 +562,14 @@ UINT8 pia6821_device::control_b_r()
// set the IRQ flags if we have pending IRQs
if(m_irq_b1)
- {
+ {
ret |= PIA_IRQ1;
- }
+ }
if(m_irq_b2 && C2_INPUT(m_ctl_b))
- {
+ {
ret |= PIA_IRQ2;
- }
+ }
LOG(("PIA #%s: control B read = %02X\n", tag(), ret));
@@ -590,13 +590,13 @@ UINT8 pia6821_device::reg_r(UINT8 offset)
default: // impossible
case 0x00:
if (OUTPUT_SELECTED(m_ctl_a))
- {
+ {
ret = port_a_r();
- }
+ }
else
- {
+ {
ret = ddr_a_r();
- }
+ }
break;
case 0x01:
@@ -605,13 +605,13 @@ UINT8 pia6821_device::reg_r(UINT8 offset)
case 0x02:
if (OUTPUT_SELECTED(m_ctl_b))
- {
+ {
ret = port_b_r();
- }
+ }
else
- {
+ {
ret = ddr_b_r();
- }
+ }
break;
case 0x03:
@@ -636,15 +636,15 @@ void pia6821_device::send_to_out_a_func(const char* message)
LOG(("PIA #%s: %s = %02X\n", tag(), message, data));
if(!m_out_a_func.isnull())
- {
+ {
m_out_a_func(0, data);
- }
+ }
else
{
if(m_out_a_needs_pulled)
- {
+ {
logerror("PIA #%s: Warning! No port A write handler. Previous value has been lost!\n", tag());
- }
+ }
m_out_a_needs_pulled = true;
}
@@ -663,15 +663,15 @@ void pia6821_device::send_to_out_b_func(const char* message)
LOG(("PIA #%s: %s = %02X\n", tag(), message, data));
if(!m_out_b_func.isnull())
- {
+ {
m_out_b_func(0, data);
- }
+ }
else
{
if(m_out_b_needs_pulled)
- {
+ {
logerror("PIA #%s: Warning! No port B write handler. Previous value has been lost!\n", tag());
- }
+ }
m_out_b_needs_pulled = true;
}
@@ -698,17 +698,17 @@ void pia6821_device::port_a_w(UINT8 data)
void pia6821_device::ddr_a_w(UINT8 data)
{
if(data == 0x00)
- {
+ {
LOG(("PIA #%s: DDR A write = %02X (input mode)\n", tag(), data));
- }
+ }
else if(data == 0xff)
- {
+ {
LOG(("PIA #%s: DDR A write = %02X (output mode)\n", tag(), data));
- }
+ }
else
- {
+ {
LOG(("PIA #%s: DDR A write = %02X (mixed mode)\n", tag(), data));
- }
+ }
if(m_ddr_a != data)
{
@@ -739,9 +739,9 @@ void pia6821_device::port_b_w(UINT8 data)
// if the CB2 strobe is cleared by the E, reset it right away
if(STROBE_E_RESET(m_ctl_b))
- {
+ {
set_out_cb2(TRUE);
- }
+ }
}
}
@@ -753,17 +753,17 @@ void pia6821_device::port_b_w(UINT8 data)
void pia6821_device::ddr_b_w(UINT8 data)
{
if (data == 0x00)
- {
+ {
LOG(("PIA #%s: DDR B write = %02X (input mode)\n", tag(), data));
- }
+ }
else if (data == 0xff)
- {
+ {
LOG(("PIA #%s: DDR B write = %02X (output mode)\n", tag(), data));
- }
+ }
else
- {
+ {
LOG(("PIA #%s: DDR B write = %02X (mixed mode)\n", tag(), data));
- }
+ }
if(m_ddr_b != data)
{
@@ -795,15 +795,15 @@ void pia6821_device::control_a_w(UINT8 data)
int temp;
if(C2_SET_MODE(m_ctl_a))
- {
+ {
// set/reset mode - bit value determines the new output
temp = C2_SET(m_ctl_a);
- }
+ }
else
- {
+ {
// strobe mode - output is always high unless strobed
temp = TRUE;
- }
+ }
set_out_ca2(temp);
}
@@ -830,15 +830,15 @@ void pia6821_device::control_b_w(UINT8 data)
m_ctl_b = data;
if (C2_SET_MODE(m_ctl_b))
- {
+ {
// set/reset mode - bit value determines the new output
temp = C2_SET(m_ctl_b);
- }
+ }
else
- {
+ {
// strobe mode - output is always high unless strobed
temp = TRUE;
- }
+ }
set_out_cb2(temp);
@@ -858,13 +858,13 @@ void pia6821_device::reg_w(UINT8 offset, UINT8 data)
default: // impossible
case 0x00:
if (OUTPUT_SELECTED(m_ctl_a))
- {
+ {
port_a_w(data);
- }
+ }
else
- {
+ {
ddr_a_w(data);
- }
+ }
break;
case 0x01:
@@ -873,13 +873,13 @@ void pia6821_device::reg_w(UINT8 offset, UINT8 data)
case 0x02:
if(OUTPUT_SELECTED(m_ctl_b))
- {
+ {
port_b_w(data);
- }
+ }
else
- {
+ {
ddr_b_w(data);
- }
+ }
break;
case 0x03:
@@ -968,9 +968,9 @@ WRITE_LINE_MEMBER( pia6821_device::ca1_w )
// CA2 is configured as output and in read strobe mode and cleared by a CA1 transition
if(C2_OUTPUT(m_ctl_a) && C2_STROBE_MODE(m_ctl_a) && STROBE_C1_RESET(m_ctl_a))
- {
+ {
set_out_ca2(TRUE);
- }
+ }
}
// set the new value for CA1
@@ -1109,9 +1109,9 @@ WRITE_LINE_MEMBER( pia6821_device::cb1_w )
update_interrupts();
// If CB2 is configured as a write-strobe output which is reset by a CB1
- // transition, this reset will only happen when a read from port B implicitly
- // clears the IRQ B1 flag. So we handle the CB2 reset there. Note that this
- // is different from what happens with port A.
+ // transition, this reset will only happen when a read from port B implicitly
+ // clears the IRQ B1 flag. So we handle the CB2 reset there. Note that this
+ // is different from what happens with port A.
}
// set the new value for CB1
diff --git a/src/emu/machine/6821pia.h b/src/emu/machine/6821pia.h
index 0fee70c6889..f442ae51ae3 100644
--- a/src/emu/machine/6821pia.h
+++ b/src/emu/machine/6821pia.h
@@ -31,19 +31,19 @@
***************************************************************************/
#define MCFG_PIA6821_ADD(_tag, _intrf) \
- MCFG_DEVICE_ADD(_tag, PIA6821, 0) \
+ MCFG_DEVICE_ADD(_tag, PIA6821, 0) \
pia6821_device::static_set_interface(*device, _intrf);
#define MCFG_PIA6821_MODIFY(_tag, _intrf) \
- MCFG_DEVICE_MODIFY(_tag) \
+ MCFG_DEVICE_MODIFY(_tag) \
pia6821_device::static_set_interface(*device, _intrf);
#define MCFG_PIA6822_ADD(_tag, _intrf) \
- MCFG_DEVICE_ADD(_tag, PIA6822, 0) \
+ MCFG_DEVICE_ADD(_tag, PIA6822, 0) \
pia6821_device::static_set_interface(*device, _intrf);
#define MCFG_PIA6822_MODIFY(_tag, _intrf) \
- MCFG_DEVICE_MODIFY(_tag) \
+ MCFG_DEVICE_MODIFY(_tag) \
pia6821_device::static_set_interface(*device, _intrf);
@@ -57,18 +57,18 @@
struct pia6821_interface
{
- devcb_read8 m_in_a_cb;
- devcb_read8 m_in_b_cb;
- devcb_read_line m_in_ca1_cb;
- devcb_read_line m_in_cb1_cb;
- devcb_read_line m_in_ca2_cb;
- devcb_read_line m_in_cb2_cb;
- devcb_write8 m_out_a_cb;
- devcb_write8 m_out_b_cb;
- devcb_write_line m_out_ca2_cb;
- devcb_write_line m_out_cb2_cb;
- devcb_write_line m_irq_a_cb;
- devcb_write_line m_irq_b_cb;
+ devcb_read8 m_in_a_cb;
+ devcb_read8 m_in_b_cb;
+ devcb_read_line m_in_ca1_cb;
+ devcb_read_line m_in_cb1_cb;
+ devcb_read_line m_in_ca2_cb;
+ devcb_read_line m_in_cb2_cb;
+ devcb_write8 m_out_a_cb;
+ devcb_write8 m_out_b_cb;
+ devcb_write_line m_out_ca2_cb;
+ devcb_write_line m_out_cb2_cb;
+ devcb_write_line m_irq_a_cb;
+ devcb_write_line m_irq_b_cb;
};
@@ -76,150 +76,150 @@ struct pia6821_interface
// ======================> pia6821_device
class pia6821_device : public device_t,
- public pia6821_interface
+ public pia6821_interface
{
public:
- // construction/destruction
- pia6821_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ pia6821_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration helpers
static void static_set_interface(device_t &device, const pia6821_interface &interface);
- DECLARE_READ8_MEMBER( read ) { return reg_r(offset); }
- DECLARE_WRITE8_MEMBER( write ) { reg_w(offset, data); }
- DECLARE_READ8_MEMBER( read_alt ) { return reg_r(((offset << 1) & 0x02) | ((offset >> 1) & 0x01)); }
- DECLARE_WRITE8_MEMBER( write_alt ) { reg_w(((offset << 1) & 0x02) | ((offset >> 1) & 0x01), data); }
+ DECLARE_READ8_MEMBER( read ) { return reg_r(offset); }
+ DECLARE_WRITE8_MEMBER( write ) { reg_w(offset, data); }
+ DECLARE_READ8_MEMBER( read_alt ) { return reg_r(((offset << 1) & 0x02) | ((offset >> 1) & 0x01)); }
+ DECLARE_WRITE8_MEMBER( write_alt ) { reg_w(((offset << 1) & 0x02) | ((offset >> 1) & 0x01), data); }
- UINT8 port_b_z_mask() const { return ~m_ddr_b; } // see first note in .c
- void set_port_a_z_mask(UINT8 data) { m_port_a_z_mask = data; }// see second note in .c
+ UINT8 port_b_z_mask() const { return ~m_ddr_b; } // see first note in .c
+ void set_port_a_z_mask(UINT8 data) { m_port_a_z_mask = data; }// see second note in .c
DECLARE_READ8_MEMBER( porta_r );
- UINT8 porta_r() { return porta_r(machine().driver_data()->generic_space(), 0); }
- DECLARE_WRITE8_MEMBER( porta_w );
- void porta_w(UINT8 data) { porta_w(machine().driver_data()->generic_space(), 0, data); }
- void set_a_input(UINT8 data, UINT8 z_mask);
- UINT8 a_output();
+ UINT8 porta_r() { return porta_r(machine().driver_data()->generic_space(), 0); }
+ DECLARE_WRITE8_MEMBER( porta_w );
+ void porta_w(UINT8 data) { porta_w(machine().driver_data()->generic_space(), 0, data); }
+ void set_a_input(UINT8 data, UINT8 z_mask);
+ UINT8 a_output();
- DECLARE_READ_LINE_MEMBER( ca1_r );
- DECLARE_WRITE_LINE_MEMBER( ca1_w );
+ DECLARE_READ_LINE_MEMBER( ca1_r );
+ DECLARE_WRITE_LINE_MEMBER( ca1_w );
- DECLARE_READ_LINE_MEMBER( ca2_r );
- DECLARE_WRITE_LINE_MEMBER( ca2_w );
- int ca2_output();
- int ca2_output_z();
+ DECLARE_READ_LINE_MEMBER( ca2_r );
+ DECLARE_WRITE_LINE_MEMBER( ca2_w );
+ int ca2_output();
+ int ca2_output_z();
DECLARE_READ8_MEMBER( portb_r );
- UINT8 portb_r() { return portb_r(machine().driver_data()->generic_space(), 0); }
- DECLARE_WRITE8_MEMBER( portb_w );
- void portb_w(UINT8 data) { portb_w(machine().driver_data()->generic_space(), 0, data); }
- UINT8 b_output();
+ UINT8 portb_r() { return portb_r(machine().driver_data()->generic_space(), 0); }
+ DECLARE_WRITE8_MEMBER( portb_w );
+ void portb_w(UINT8 data) { portb_w(machine().driver_data()->generic_space(), 0, data); }
+ UINT8 b_output();
- DECLARE_READ_LINE_MEMBER( cb1_r );
- DECLARE_WRITE_LINE_MEMBER( cb1_w );
+ DECLARE_READ_LINE_MEMBER( cb1_r );
+ DECLARE_WRITE_LINE_MEMBER( cb1_w );
- DECLARE_READ_LINE_MEMBER( cb2_r );
- DECLARE_WRITE_LINE_MEMBER( cb2_w );
- int cb2_output();
- int cb2_output_z();
+ DECLARE_READ_LINE_MEMBER( cb2_r );
+ DECLARE_WRITE_LINE_MEMBER( cb2_w );
+ int cb2_output();
+ int cb2_output_z();
int irq_a_state() const { return m_irq_a_state; }
int irq_b_state() const { return m_irq_b_state; }
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
private:
- UINT8 reg_r(UINT8 offset);
- void reg_w(UINT8 offset, UINT8 data);
-
- void update_interrupts();
-
- UINT8 get_in_a_value();
- UINT8 get_in_b_value();
-
- UINT8 get_out_a_value();
- UINT8 get_out_b_value();
-
- void set_out_ca2(int data);
- void set_out_cb2(int data);
-
- UINT8 port_a_r();
- UINT8 ddr_a_r();
- UINT8 control_a_r();
-
- UINT8 port_b_r();
- UINT8 ddr_b_r();
- UINT8 control_b_r();
-
- void send_to_out_a_func(const char* message);
- void send_to_out_b_func(const char* message);
-
- void port_a_w(UINT8 data);
- void ddr_a_w(UINT8 data);
-
- void port_b_w(UINT8 data);
- void ddr_b_w(UINT8 data);
-
- void control_a_w(UINT8 data);
- void control_b_w(UINT8 data);
-
- devcb_resolved_read8 m_in_a_func;
- devcb_resolved_read8 m_in_b_func;
- devcb_resolved_read_line m_in_ca1_func;
- devcb_resolved_read_line m_in_cb1_func;
- devcb_resolved_read_line m_in_ca2_func;
- devcb_resolved_read_line m_in_cb2_func;
- devcb_resolved_write8 m_out_a_func;
- devcb_resolved_write8 m_out_b_func;
- devcb_resolved_write_line m_out_ca2_func;
- devcb_resolved_write_line m_out_cb2_func;
- devcb_resolved_write_line m_irq_a_func;
- devcb_resolved_write_line m_irq_b_func;
-
- UINT8 m_in_a;
- UINT8 m_in_ca1;
- UINT8 m_in_ca2;
- UINT8 m_out_a;
- UINT8 m_out_ca2;
- UINT8 m_port_a_z_mask;
- UINT8 m_ddr_a;
- UINT8 m_ctl_a;
- UINT8 m_irq_a1;
- UINT8 m_irq_a2;
- UINT8 m_irq_a_state;
-
- UINT8 m_in_b;
- UINT8 m_in_cb1;
- UINT8 m_in_cb2;
- UINT8 m_out_b;
- UINT8 m_out_cb2;
- UINT8 m_last_out_cb2_z;
- UINT8 m_ddr_b;
- UINT8 m_ctl_b;
- UINT8 m_irq_b1;
- UINT8 m_irq_b2;
- UINT8 m_irq_b_state;
-
- // variables that indicate if access a line externally -
- // used to for logging purposes ONLY
- bool m_in_a_pushed;
- bool m_out_a_needs_pulled;
- bool m_in_ca1_pushed;
- bool m_in_ca2_pushed;
- bool m_out_ca2_needs_pulled;
- bool m_in_b_pushed;
- bool m_out_b_needs_pulled;
- bool m_in_cb1_pushed;
- bool m_in_cb2_pushed;
- bool m_out_cb2_needs_pulled;
- bool m_logged_port_a_not_connected;
- bool m_logged_port_b_not_connected;
- bool m_logged_ca1_not_connected;
- bool m_logged_ca2_not_connected;
- bool m_logged_cb1_not_connected;
- bool m_logged_cb2_not_connected;
+ UINT8 reg_r(UINT8 offset);
+ void reg_w(UINT8 offset, UINT8 data);
+
+ void update_interrupts();
+
+ UINT8 get_in_a_value();
+ UINT8 get_in_b_value();
+
+ UINT8 get_out_a_value();
+ UINT8 get_out_b_value();
+
+ void set_out_ca2(int data);
+ void set_out_cb2(int data);
+
+ UINT8 port_a_r();
+ UINT8 ddr_a_r();
+ UINT8 control_a_r();
+
+ UINT8 port_b_r();
+ UINT8 ddr_b_r();
+ UINT8 control_b_r();
+
+ void send_to_out_a_func(const char* message);
+ void send_to_out_b_func(const char* message);
+
+ void port_a_w(UINT8 data);
+ void ddr_a_w(UINT8 data);
+
+ void port_b_w(UINT8 data);
+ void ddr_b_w(UINT8 data);
+
+ void control_a_w(UINT8 data);
+ void control_b_w(UINT8 data);
+
+ devcb_resolved_read8 m_in_a_func;
+ devcb_resolved_read8 m_in_b_func;
+ devcb_resolved_read_line m_in_ca1_func;
+ devcb_resolved_read_line m_in_cb1_func;
+ devcb_resolved_read_line m_in_ca2_func;
+ devcb_resolved_read_line m_in_cb2_func;
+ devcb_resolved_write8 m_out_a_func;
+ devcb_resolved_write8 m_out_b_func;
+ devcb_resolved_write_line m_out_ca2_func;
+ devcb_resolved_write_line m_out_cb2_func;
+ devcb_resolved_write_line m_irq_a_func;
+ devcb_resolved_write_line m_irq_b_func;
+
+ UINT8 m_in_a;
+ UINT8 m_in_ca1;
+ UINT8 m_in_ca2;
+ UINT8 m_out_a;
+ UINT8 m_out_ca2;
+ UINT8 m_port_a_z_mask;
+ UINT8 m_ddr_a;
+ UINT8 m_ctl_a;
+ UINT8 m_irq_a1;
+ UINT8 m_irq_a2;
+ UINT8 m_irq_a_state;
+
+ UINT8 m_in_b;
+ UINT8 m_in_cb1;
+ UINT8 m_in_cb2;
+ UINT8 m_out_b;
+ UINT8 m_out_cb2;
+ UINT8 m_last_out_cb2_z;
+ UINT8 m_ddr_b;
+ UINT8 m_ctl_b;
+ UINT8 m_irq_b1;
+ UINT8 m_irq_b2;
+ UINT8 m_irq_b_state;
+
+ // variables that indicate if access a line externally -
+ // used to for logging purposes ONLY
+ bool m_in_a_pushed;
+ bool m_out_a_needs_pulled;
+ bool m_in_ca1_pushed;
+ bool m_in_ca2_pushed;
+ bool m_out_ca2_needs_pulled;
+ bool m_in_b_pushed;
+ bool m_out_b_needs_pulled;
+ bool m_in_cb1_pushed;
+ bool m_in_cb2_pushed;
+ bool m_out_cb2_needs_pulled;
+ bool m_logged_port_a_not_connected;
+ bool m_logged_port_b_not_connected;
+ bool m_logged_ca1_not_connected;
+ bool m_logged_ca2_not_connected;
+ bool m_logged_cb1_not_connected;
+ bool m_logged_cb2_not_connected;
};
diff --git a/src/emu/machine/6840ptm.c b/src/emu/machine/6840ptm.c
index 6522cf081db..db3077389c9 100644
--- a/src/emu/machine/6840ptm.c
+++ b/src/emu/machine/6840ptm.c
@@ -68,7 +68,7 @@ const device_type PTM6840 = &device_creator<ptm6840_device>;
//-------------------------------------------------
ptm6840_device::ptm6840_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, PTM6840, "6840 PTM", tag, owner, clock)
+ : device_t(mconfig, PTM6840, "6840 PTM", tag, owner, clock)
{
memset(static_cast<ptm6840_interface *>(this), 0, sizeof(ptm6840_interface));
}
@@ -152,11 +152,11 @@ void ptm6840_device::device_start()
void ptm6840_device::device_reset()
{
- m_control_reg[2] = 0;
- m_control_reg[1] = 0;
- m_control_reg[0] = 1;
- m_status_reg = 0;
- m_t3_divisor = 1;
+ m_control_reg[2] = 0;
+ m_control_reg[1] = 0;
+ m_control_reg[0] = 1;
+ m_status_reg = 0;
+ m_t3_divisor = 1;
m_status_read_since_int = 0;
m_IRQ = 0;
for (int i = 0; i < 3; i++)
diff --git a/src/emu/machine/6840ptm.h b/src/emu/machine/6840ptm.h
index ff714a62465..48d3ff4ae16 100644
--- a/src/emu/machine/6840ptm.h
+++ b/src/emu/machine/6840ptm.h
@@ -36,8 +36,8 @@ struct ptm6840_interface
double m_internal_clock;
double m_external_clock[3];
- devcb_write8 m_out_cb[3]; // function to call when output[idx] changes
- devcb_write_line m_irq_cb; // function called if IRQ line changes
+ devcb_write8 m_out_cb[3]; // function to call when output[idx] changes
+ devcb_write_line m_irq_cb; // function called if IRQ line changes
};
@@ -45,20 +45,20 @@ struct ptm6840_interface
// ======================> ptm6840_device
class ptm6840_device : public device_t,
- public ptm6840_interface
+ public ptm6840_interface
{
public:
- // construction/destruction
- ptm6840_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ptm6840_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration helpers
static void static_set_interface(device_t &device, const ptm6840_interface &interface);
int status(int clock) const { return m_enabled[clock]; } // get whether timer is enabled
- int irq_state() const { return m_IRQ; } // get IRQ state
- UINT16 count(int counter) const { return compute_counter(counter); } // get counter value
- void set_ext_clock(int counter, double clock); // set clock frequency
- int ext_clock(int counter) const { return m_external_clock[counter]; } // get clock frequency
+ int irq_state() const { return m_IRQ; } // get IRQ state
+ UINT16 count(int counter) const { return compute_counter(counter); } // get counter value
+ void set_ext_clock(int counter, double clock); // set clock frequency
+ int ext_clock(int counter) const { return m_external_clock[counter]; } // get clock frequency
DECLARE_WRITE8_MEMBER( write );
void write(offs_t offset, UINT8 data) { write(machine().driver_data()->generic_space(), offset, data); }
@@ -78,9 +78,9 @@ public:
void update_interrupts();
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@@ -97,15 +97,15 @@ private:
PTM_6840_CTRL2 = 1,
PTM_6840_STATUS = 1,
PTM_6840_MSBBUF1 = 2,
- PTM_6840_LSB1 = 3,
+ PTM_6840_LSB1 = 3,
PTM_6840_MSBBUF2 = 4,
PTM_6840_LSB2 = 5,
PTM_6840_MSBBUF3 = 6,
PTM_6840_LSB3 = 7,
};
- devcb_resolved_write8 m_out_func[3]; // function to call when output[idx] changes
- devcb_resolved_write_line m_irq_func; // function called if IRQ line changes
+ devcb_resolved_write8 m_out_func[3]; // function to call when output[idx] changes
+ devcb_resolved_write_line m_irq_func; // function called if IRQ line changes
UINT8 m_control_reg[3];
UINT8 m_output[3]; // Output states
diff --git a/src/emu/machine/6850acia.c b/src/emu/machine/6850acia.c
index 1eda199cd43..0aa270649b6 100644
--- a/src/emu/machine/6850acia.c
+++ b/src/emu/machine/6850acia.c
@@ -16,10 +16,10 @@
#define LOG 0
-#define CR1_0 0x03
-#define CR4_2 0x1C
-#define CR6_5 0x60
-#define CR7 0x80
+#define CR1_0 0x03
+#define CR4_2 0x1C
+#define CR6_5 0x60
+#define CR7 0x80
#define TXD(_data) \
m_out_tx_func(_data)
@@ -59,7 +59,7 @@ const device_type ACIA6850 = &device_creator<acia6850_device>;
//-------------------------------------------------
acia6850_device::acia6850_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, ACIA6850, "6850 ACIA", tag, owner, clock)
+ : device_t(mconfig, ACIA6850, "6850 ACIA", tag, owner, clock)
{
memset(static_cast<acia6850_interface *>(this), 0, sizeof(acia6850_interface));
}
diff --git a/src/emu/machine/6850acia.h b/src/emu/machine/6850acia.h
index 33e7e5325bb..a0184cc6854 100644
--- a/src/emu/machine/6850acia.h
+++ b/src/emu/machine/6850acia.h
@@ -19,14 +19,14 @@
EXTERNAL MACROS
***************************************************************************/
-#define ACIA6850_STATUS_RDRF 0x01
-#define ACIA6850_STATUS_TDRE 0x02
-#define ACIA6850_STATUS_DCD 0x04
-#define ACIA6850_STATUS_CTS 0x08
-#define ACIA6850_STATUS_FE 0x10
-#define ACIA6850_STATUS_OVRN 0x20
-#define ACIA6850_STATUS_PE 0x40
-#define ACIA6850_STATUS_IRQ 0x80
+#define ACIA6850_STATUS_RDRF 0x01
+#define ACIA6850_STATUS_TDRE 0x02
+#define ACIA6850_STATUS_DCD 0x04
+#define ACIA6850_STATUS_CTS 0x08
+#define ACIA6850_STATUS_FE 0x10
+#define ACIA6850_STATUS_OVRN 0x20
+#define ACIA6850_STATUS_PE 0x40
+#define ACIA6850_STATUS_IRQ 0x80
@@ -51,17 +51,17 @@
struct acia6850_interface
{
- int m_tx_clock;
- int m_rx_clock;
+ int m_tx_clock;
+ int m_rx_clock;
- devcb_read_line m_in_rx_cb;
- devcb_write_line m_out_tx_cb;
+ devcb_read_line m_in_rx_cb;
+ devcb_write_line m_out_tx_cb;
- devcb_read_line m_in_cts_cb;
- devcb_write_line m_out_rts_cb;
- devcb_read_line m_in_dcd_cb;
+ devcb_read_line m_in_cts_cb;
+ devcb_write_line m_out_rts_cb;
+ devcb_read_line m_in_dcd_cb;
- devcb_write_line m_out_irq_cb;
+ devcb_write_line m_out_irq_cb;
};
@@ -69,11 +69,11 @@ struct acia6850_interface
// ======================> acia6850_device
class acia6850_device : public device_t,
- public acia6850_interface
+ public acia6850_interface
{
public:
- // construction/destruction
- acia6850_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ acia6850_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration helpers
static void static_set_interface(device_t &device, const acia6850_interface &interface);
@@ -92,9 +92,9 @@ public:
void receive_data(UINT8 data);
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@@ -128,51 +128,51 @@ private:
EVEN
};
- devcb_resolved_read_line m_in_rx_func;
- devcb_resolved_write_line m_out_tx_func;
- devcb_resolved_read_line m_in_cts_func;
- devcb_resolved_write_line m_out_rts_func;
- devcb_resolved_read_line m_in_dcd_func;
- devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_read_line m_in_rx_func;
+ devcb_resolved_write_line m_out_tx_func;
+ devcb_resolved_read_line m_in_cts_func;
+ devcb_resolved_write_line m_out_rts_func;
+ devcb_resolved_read_line m_in_dcd_func;
+ devcb_resolved_write_line m_out_irq_func;
- UINT8 m_ctrl;
- UINT8 m_status;
+ UINT8 m_ctrl;
+ UINT8 m_status;
- UINT8 m_tdr;
- UINT8 m_rdr;
- UINT8 m_rx_shift;
- UINT8 m_tx_shift;
+ UINT8 m_tdr;
+ UINT8 m_rdr;
+ UINT8 m_rx_shift;
+ UINT8 m_tx_shift;
- UINT8 m_rx_counter;
- UINT8 m_tx_counter;
+ UINT8 m_rx_counter;
+ UINT8 m_tx_counter;
- int m_divide;
+ int m_divide;
// Counters
- int m_tx_bits;
- int m_rx_bits;
- int m_tx_parity;
- int m_rx_parity;
+ int m_tx_bits;
+ int m_rx_bits;
+ int m_tx_parity;
+ int m_rx_parity;
// TX/RX state
- int m_bits;
- parity_type m_parity;
- int m_stopbits;
- int m_tx_int;
+ int m_bits;
+ parity_type m_parity;
+ int m_stopbits;
+ int m_tx_int;
// Signals
- int m_overrun;
- int m_reset;
- int m_rts;
- int m_brk;
- int m_first_reset;
- int m_status_read;
+ int m_overrun;
+ int m_reset;
+ int m_rts;
+ int m_brk;
+ int m_first_reset;
+ int m_status_read;
serial_state m_rx_state;
serial_state m_tx_state;
- int m_irq;
+ int m_irq;
- emu_timer *m_rx_timer;
- emu_timer *m_tx_timer;
+ emu_timer *m_rx_timer;
+ emu_timer *m_tx_timer;
static const int ACIA6850_DIVIDE[3];
static const int ACIA6850_WORD[8][3];
diff --git a/src/emu/machine/68681.c b/src/emu/machine/68681.c
index f764fe95933..e6a12ea038d 100644
--- a/src/emu/machine/68681.c
+++ b/src/emu/machine/68681.c
@@ -10,7 +10,7 @@
#include "68681.h"
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
static const char *const duart68681_reg_read_names[0x10] =
{
@@ -22,27 +22,27 @@ static const char *const duart68681_reg_write_names[0x10] =
"MRA", "CSRA", "CRA", "THRA", "ACR", "IMR", "CRUR", "CTLR", "MRB", "CSRB", "CRB", "THRB", "IVR", "OPCR", "Set OP Bits", "Reset OP Bits"
};
-#define INT_INPUT_PORT_CHANGE 0x80
-#define INT_DELTA_BREAK_B 0x40
-#define INT_RXRDY_FFULLB 0x20
-#define INT_TXRDYB 0x10
-#define INT_COUNTER_READY 0x08
-#define INT_DELTA_BREAK_A 0x04
-#define INT_RXRDY_FFULLA 0x02
-#define INT_TXRDYA 0x01
+#define INT_INPUT_PORT_CHANGE 0x80
+#define INT_DELTA_BREAK_B 0x40
+#define INT_RXRDY_FFULLB 0x20
+#define INT_TXRDYB 0x10
+#define INT_COUNTER_READY 0x08
+#define INT_DELTA_BREAK_A 0x04
+#define INT_RXRDY_FFULLA 0x02
+#define INT_TXRDYA 0x01
-#define STATUS_RECEIVED_BREAK 0x80
-#define STATUS_FRAMING_ERROR 0x40
-#define STATUS_PARITY_ERROR 0x20
-#define STATUS_OVERRUN_ERROR 0x10
-#define STATUS_TRANSMITTER_EMPTY 0x08
-#define STATUS_TRANSMITTER_READY 0x04
-#define STATUS_FIFO_FULL 0x02
-#define STATUS_RECEIVER_READY 0x01
+#define STATUS_RECEIVED_BREAK 0x80
+#define STATUS_FRAMING_ERROR 0x40
+#define STATUS_PARITY_ERROR 0x20
+#define STATUS_OVERRUN_ERROR 0x10
+#define STATUS_TRANSMITTER_EMPTY 0x08
+#define STATUS_TRANSMITTER_READY 0x04
+#define STATUS_FIFO_FULL 0x02
+#define STATUS_RECEIVER_READY 0x01
-#define MODE_RX_INT_SELECT_BIT 0x40
+#define MODE_RX_INT_SELECT_BIT 0x40
-#define RX_FIFO_SIZE 3
+#define RX_FIFO_SIZE 3
struct DUART68681_CHANNEL
{
@@ -112,20 +112,20 @@ INLINE duart68681_state *get_safe_token(device_t *device)
static void duart68681_update_interrupts(duart68681_state *duart68681)
{
/* update SR state and update interrupt ISR state for the following bits:
- SRn: bits 7-4: handled elsewhere.
- SRn: bit 3 (TxEMTn) (we can assume since we're not actually emulating the delay/timing of sending bits, that as long as TxRDYn is set, TxEMTn is also set since the transmit byte has 'already happened', therefore TxEMTn is always 1 assuming tx is enabled on channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined)
- SRn: bit 2 (TxRDYn) (we COULD assume since we're not emulating delay and timing output, that as long as tx is enabled on channel n, TxRDY is 1 for channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined; however, tx_ready is already nicely handled for us elsewhere, so we can use that instead for now, though we may need to retool that code as well)
- SRn: bit 1 (FFULLn) (this bit we actually emulate; if the receive fifo for channel n is full, this bit is 1, otherwise it is 0. the receive fifo should be three words long.)
- SRn: bit 0 (RxRDYn) (this bit we also emulate; the bit is always asserted if the receive fifo is not empty)
- ISR: bit 7: Input Port change; this should be handled elsewhere, on the input port handler
- ISR: bit 6: Delta Break B; this should be handled elsewhere, on the data receive handler
- ISR: bit 5: RxRDYB/FFULLB: this is handled here; depending on whether MSR1B bit 6 is 0 or 1, this bit holds the state of SRB bit 0 or bit 1 respectively
- ISR: bit 4: TxRDYB: this is handled here; it mirrors SRB bit 2
- ISR: bit 3: Counter ready; this should be handled by the timer generator
- ISR: bit 2: Delta Break A; this should be handled elsewhere, on the data receive handler
- ISR: bit 1: RxRDYA/FFULLA: this is handled here; depending on whether MSR1A bit 6 is 0 or 1, this bit holds the state of SRA bit 0 or bit 1 respectively
- ISR: bit 0: TxRDYA: this is handled here; it mirrors SRA bit 2
- */
+ SRn: bits 7-4: handled elsewhere.
+ SRn: bit 3 (TxEMTn) (we can assume since we're not actually emulating the delay/timing of sending bits, that as long as TxRDYn is set, TxEMTn is also set since the transmit byte has 'already happened', therefore TxEMTn is always 1 assuming tx is enabled on channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined)
+ SRn: bit 2 (TxRDYn) (we COULD assume since we're not emulating delay and timing output, that as long as tx is enabled on channel n, TxRDY is 1 for channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined; however, tx_ready is already nicely handled for us elsewhere, so we can use that instead for now, though we may need to retool that code as well)
+ SRn: bit 1 (FFULLn) (this bit we actually emulate; if the receive fifo for channel n is full, this bit is 1, otherwise it is 0. the receive fifo should be three words long.)
+ SRn: bit 0 (RxRDYn) (this bit we also emulate; the bit is always asserted if the receive fifo is not empty)
+ ISR: bit 7: Input Port change; this should be handled elsewhere, on the input port handler
+ ISR: bit 6: Delta Break B; this should be handled elsewhere, on the data receive handler
+ ISR: bit 5: RxRDYB/FFULLB: this is handled here; depending on whether MSR1B bit 6 is 0 or 1, this bit holds the state of SRB bit 0 or bit 1 respectively
+ ISR: bit 4: TxRDYB: this is handled here; it mirrors SRB bit 2
+ ISR: bit 3: Counter ready; this should be handled by the timer generator
+ ISR: bit 2: Delta Break A; this should be handled elsewhere, on the data receive handler
+ ISR: bit 1: RxRDYA/FFULLA: this is handled here; depending on whether MSR1A bit 6 is 0 or 1, this bit holds the state of SRA bit 0 or bit 1 respectively
+ ISR: bit 0: TxRDYA: this is handled here; it mirrors SRA bit 2
+ */
UINT8 ch = 0;
//logerror("DEBUG: 68681 int check: upon func call, SRA is %02X, SRB is %02X, ISR is %02X\n", duart68681->channel[0].SR, duart68681->channel[1].SR, duart68681->ISR);
for (ch = 0; ch < 2; ch++)
@@ -235,14 +235,14 @@ static void duart68681_update_interrupts(duart68681_state *duart68681)
duart68681->duart_config->irq_handler( duart68681->device, ASSERT_LINE, duart68681->IVR );
}
}
- else
- {
+ else
+ {
if ( duart68681->duart_config->irq_handler )
{
LOG(( "68681: Interrupt line not active (IMR & ISR = %02X)\n", (duart68681->ISR & duart68681->IMR) ));
duart68681->duart_config->irq_handler( duart68681->device, CLEAR_LINE, duart68681->IVR );
}
- }
+ }
};
double duart68681_get_ct_rate(duart68681_state *duart68681)
@@ -415,7 +415,7 @@ static void duart68681_write_CR(duart68681_state *duart68681, int ch, UINT8 data
else
duart68681->ISR &= ~INT_TXRDYB;
duart68681->channel[ch].tx_timer->adjust(attotime::never, ch);
- break;
+ break;
case 4: /* Reset Error Status */
duart68681->channel[ch].SR &= ~(STATUS_RECEIVED_BREAK | STATUS_FRAMING_ERROR | STATUS_PARITY_ERROR | STATUS_OVERRUN_ERROR);
break;
@@ -462,7 +462,7 @@ static void duart68681_write_CR(duart68681_state *duart68681, int ch, UINT8 data
duart68681->ISR &= ~INT_TXRDYB;
}
- duart68681_update_interrupts(duart68681);
+ duart68681_update_interrupts(duart68681);
};
static UINT8 duart68681_read_rx_fifo(duart68681_state *duart68681, int ch)
@@ -490,7 +490,7 @@ static UINT8 duart68681_read_rx_fifo(duart68681_state *duart68681, int ch)
static TIMER_CALLBACK( tx_timer_callback )
{
device_t *device = (device_t *)ptr;
- duart68681_state *duart68681 = get_safe_token(device);
+ duart68681_state *duart68681 = get_safe_token(device);
int ch = param & 1;
// send the byte unless we're in loopback mode;
@@ -938,5 +938,3 @@ void duart68681_device::device_reset()
{
DEVICE_RESET_NAME( duart68681 )(this);
}
-
-
diff --git a/src/emu/machine/74123.c b/src/emu/machine/74123.c
index 526c7d47d88..2c9169e1d2d 100644
--- a/src/emu/machine/74123.c
+++ b/src/emu/machine/74123.c
@@ -11,7 +11,7 @@
#include "machine/rescap.h"
-#define LOG (0)
+#define LOG (0)
@@ -130,7 +130,7 @@ attotime ttl74123_device::compute_duration()
int ttl74123_device::timer_running()
{
return (m_timer->remaining() > attotime::zero) &&
- (m_timer->remaining() != attotime::never);
+ (m_timer->remaining() != attotime::never);
}
@@ -279,7 +279,7 @@ void ttl74123_device::clear_w(UINT8 data)
{
start_pulse();
}
- else if (!data) /* clear the output */
+ else if (!data) /* clear the output */
{
m_timer->adjust(attotime::zero);
diff --git a/src/emu/machine/74123.h b/src/emu/machine/74123.h
index c7cafe200d9..019ed29b8b2 100644
--- a/src/emu/machine/74123.h
+++ b/src/emu/machine/74123.h
@@ -62,9 +62,9 @@
/* constants for the different ways the cap/res can be connected.
This determines the formula for calculating the pulse width */
-#define TTL74123_NOT_GROUNDED_NO_DIODE (1)
-#define TTL74123_NOT_GROUNDED_DIODE (2)
-#define TTL74123_GROUNDED (3)
+#define TTL74123_NOT_GROUNDED_NO_DIODE (1)
+#define TTL74123_NOT_GROUNDED_DIODE (2)
+#define TTL74123_GROUNDED (3)
/***************************************************************************
@@ -76,13 +76,13 @@
struct ttl74123_interface
{
- int m_connection_type; /* the hook up type - one of the constants above */
- double m_res; /* resistor connected to RCext */
- double m_cap; /* capacitor connected to Cext and RCext */
- int m_a; /* initial/constant value of the A pin */
- int m_b; /* initial/constant value of the B pin */
- int m_clear; /* initial/constant value of the Clear pin */
- devcb_write8 m_output_changed_cb;
+ int m_connection_type; /* the hook up type - one of the constants above */
+ double m_res; /* resistor connected to RCext */
+ double m_cap; /* capacitor connected to Cext and RCext */
+ int m_a; /* initial/constant value of the A pin */
+ int m_b; /* initial/constant value of the B pin */
+ int m_clear; /* initial/constant value of the Clear pin */
+ devcb_write8 m_output_changed_cb;
};
@@ -90,39 +90,39 @@ struct ttl74123_interface
// ======================> ttl74123_device
class ttl74123_device : public device_t,
- public ttl74123_interface
+ public ttl74123_interface
{
public:
- // construction/destruction
- ttl74123_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ttl74123_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- void a_w(UINT8 data);
- void b_w(UINT8 data);
- void clear_w(UINT8 data);
- void reset_w();
+ void a_w(UINT8 data);
+ void b_w(UINT8 data);
+ void clear_w(UINT8 data);
+ void reset_w();
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
- static TIMER_CALLBACK( output_callback );
- static TIMER_CALLBACK( clear_callback );
+ static TIMER_CALLBACK( output_callback );
+ static TIMER_CALLBACK( clear_callback );
private:
- int timer_running();
- void start_pulse();
- void output(INT32 param);
- void set_output();
- attotime compute_duration();
- void clear();
+ int timer_running();
+ void start_pulse();
+ void output(INT32 param);
+ void set_output();
+ attotime compute_duration();
+ void clear();
- emu_timer *m_timer;
- devcb_resolved_write8 m_output_changed;
+ emu_timer *m_timer;
+ devcb_resolved_write8 m_output_changed;
};
diff --git a/src/emu/machine/74148.c b/src/emu/machine/74148.c
index 7d57344ad1e..00d5f710254 100644
--- a/src/emu/machine/74148.c
+++ b/src/emu/machine/74148.c
@@ -48,13 +48,13 @@ struct ttl74148_state
void (*output_cb)(device_t *device);
/* inputs */
- int input_lines[8]; /* pins 1-4,10-13 */
- int enable_input; /* pin 5 */
+ int input_lines[8]; /* pins 1-4,10-13 */
+ int enable_input; /* pin 5 */
/* outputs */
- int output; /* pins 6,7,9 */
- int output_valid; /* pin 14 */
- int enable_output; /* pin 15 */
+ int output; /* pins 6,7,9 */
+ int output_valid; /* pin 14 */
+ int enable_output; /* pin 15 */
/* internals */
int last_output;
@@ -88,40 +88,40 @@ void ttl74148_update(device_t *device)
/* this comes straight off the data sheet schematics */
bit0 = !(((!state->input_lines[1]) &
- state->input_lines[2] &
- state->input_lines[4] &
- state->input_lines[6]) |
- ((!state->input_lines[3]) &
- state->input_lines[4] &
- state->input_lines[6]) |
- ((!state->input_lines[5]) &
- state->input_lines[6]) |
- (!state->input_lines[7]));
+ state->input_lines[2] &
+ state->input_lines[4] &
+ state->input_lines[6]) |
+ ((!state->input_lines[3]) &
+ state->input_lines[4] &
+ state->input_lines[6]) |
+ ((!state->input_lines[5]) &
+ state->input_lines[6]) |
+ (!state->input_lines[7]));
bit1 = !(((!state->input_lines[2]) &
- state->input_lines[4] &
- state->input_lines[5]) |
- ((!state->input_lines[3]) &
- state->input_lines[4] &
- state->input_lines[5]) |
- (!state->input_lines[6]) |
- (!state->input_lines[7]));
+ state->input_lines[4] &
+ state->input_lines[5]) |
+ ((!state->input_lines[3]) &
+ state->input_lines[4] &
+ state->input_lines[5]) |
+ (!state->input_lines[6]) |
+ (!state->input_lines[7]));
bit2 = !((!state->input_lines[4]) |
- (!state->input_lines[5]) |
- (!state->input_lines[6]) |
- (!state->input_lines[7]));
+ (!state->input_lines[5]) |
+ (!state->input_lines[6]) |
+ (!state->input_lines[7]));
state->output = (bit2 << 2) | (bit1 << 1) | bit0;
state->output_valid = (state->input_lines[0] &
- state->input_lines[1] &
- state->input_lines[2] &
- state->input_lines[3] &
- state->input_lines[4] &
- state->input_lines[5] &
- state->input_lines[6] &
- state->input_lines[7]);
+ state->input_lines[1] &
+ state->input_lines[2] &
+ state->input_lines[3] &
+ state->input_lines[4] &
+ state->input_lines[5] &
+ state->input_lines[6] &
+ state->input_lines[7]);
state->enable_output = !state->output_valid;
}
@@ -130,8 +130,8 @@ void ttl74148_update(device_t *device)
/* call callback if any of the outputs changed */
if ( state->output_cb &&
((state->output != state->last_output) ||
- (state->output_valid != state->last_output_valid) ||
- (state->enable_output != state->last_enable_output)))
+ (state->output_valid != state->last_output_valid) ||
+ (state->enable_output != state->last_enable_output)))
{
state->last_output = state->output;
state->last_output_valid = state->output_valid;
@@ -181,16 +181,16 @@ static DEVICE_START( ttl74148 )
{
ttl74148_config *config = (ttl74148_config *)device->static_config();
ttl74148_state *state = get_safe_token(device);
- state->output_cb = config->output_cb;
-
- device->save_item(NAME(state->input_lines));
- device->save_item(NAME(state->enable_input));
- device->save_item(NAME(state->output));
- device->save_item(NAME(state->output_valid));
- device->save_item(NAME(state->enable_output));
- device->save_item(NAME(state->last_output));
- device->save_item(NAME(state->last_output_valid));
- device->save_item(NAME(state->last_enable_output));
+ state->output_cb = config->output_cb;
+
+ device->save_item(NAME(state->input_lines));
+ device->save_item(NAME(state->enable_input));
+ device->save_item(NAME(state->output));
+ device->save_item(NAME(state->output_valid));
+ device->save_item(NAME(state->enable_output));
+ device->save_item(NAME(state->last_output));
+ device->save_item(NAME(state->last_output_valid));
+ device->save_item(NAME(state->last_enable_output));
}
@@ -198,19 +198,19 @@ static DEVICE_RESET( ttl74148 )
{
ttl74148_state *state = get_safe_token(device);
- state->enable_input = 1;
- state->input_lines[0] = 1;
- state->input_lines[1] = 1;
- state->input_lines[2] = 1;
- state->input_lines[3] = 1;
- state->input_lines[4] = 1;
- state->input_lines[5] = 1;
- state->input_lines[6] = 1;
- state->input_lines[7] = 1;
-
- state->last_output = -1;
- state->last_output_valid = -1;
- state->last_enable_output = -1;
+ state->enable_input = 1;
+ state->input_lines[0] = 1;
+ state->input_lines[1] = 1;
+ state->input_lines[2] = 1;
+ state->input_lines[3] = 1;
+ state->input_lines[4] = 1;
+ state->input_lines[5] = 1;
+ state->input_lines[6] = 1;
+ state->input_lines[7] = 1;
+
+ state->last_output = -1;
+ state->last_output_valid = -1;
+ state->last_enable_output = -1;
}
const device_type TTL74148 = &device_creator<ttl74148_device>;
@@ -248,5 +248,3 @@ void ttl74148_device::device_reset()
{
DEVICE_RESET_NAME( ttl74148 )(this);
}
-
-
diff --git a/src/emu/machine/74153.c b/src/emu/machine/74153.c
index a78b6ebac31..09f45e28e31 100644
--- a/src/emu/machine/74153.c
+++ b/src/emu/machine/74153.c
@@ -43,13 +43,13 @@ struct ttl74153_state
void (*output_cb)(device_t *device);
/* inputs */
- int a; /* pin 14 */
- int b; /* pin 2 */
- int input_lines[2][4]; /* pins 3-6,10-13 */
- int enable[2]; /* pins 1,15 */
+ int a; /* pin 14 */
+ int b; /* pin 2 */
+ int input_lines[2][4]; /* pins 3-6,10-13 */
+ int enable[2]; /* pins 1,15 */
/* output */
- int output[2]; /* pins 7,9 */
+ int output[2]; /* pins 7,9 */
/* internals */
int last_output[2];
@@ -79,7 +79,7 @@ void ttl74153_update(device_t *device)
for (section = 0; section < 2; section++)
{
if (state->enable[section])
- state->output[section] = 0; // row 1 in truth table
+ state->output[section] = 0; // row 1 in truth table
else
state->output[section] = state->input_lines[section][sel];
}
@@ -88,7 +88,7 @@ void ttl74153_update(device_t *device)
/* call callback if either of the outputs changed */
if ( state->output_cb &&
((state->output[0] != state->last_output[0]) ||
- (state->output[1] != state->last_output[1])))
+ (state->output[1] != state->last_output[1])))
{
state->last_output[0] = state->output[0];
state->last_output[1] = state->output[1];
@@ -137,20 +137,20 @@ static DEVICE_START( ttl74153 )
{
ttl74153_config *config = (ttl74153_config *)device->static_config();
ttl74153_state *state = get_safe_token(device);
- state->output_cb = config->output_cb;
-
- device->save_item(NAME(state->enable));
- device->save_item(NAME(state->last_output));
- device->save_item(NAME(state->input_lines[0][0]));
- device->save_item(NAME(state->input_lines[0][1]));
- device->save_item(NAME(state->input_lines[0][2]));
- device->save_item(NAME(state->input_lines[0][3]));
- device->save_item(NAME(state->input_lines[1][0]));
- device->save_item(NAME(state->input_lines[1][1]));
- device->save_item(NAME(state->input_lines[1][2]));
- device->save_item(NAME(state->input_lines[1][3]));
- device->save_item(NAME(state->a));
- device->save_item(NAME(state->b));
+ state->output_cb = config->output_cb;
+
+ device->save_item(NAME(state->enable));
+ device->save_item(NAME(state->last_output));
+ device->save_item(NAME(state->input_lines[0][0]));
+ device->save_item(NAME(state->input_lines[0][1]));
+ device->save_item(NAME(state->input_lines[0][2]));
+ device->save_item(NAME(state->input_lines[0][3]));
+ device->save_item(NAME(state->input_lines[1][0]));
+ device->save_item(NAME(state->input_lines[1][1]));
+ device->save_item(NAME(state->input_lines[1][2]));
+ device->save_item(NAME(state->input_lines[1][3]));
+ device->save_item(NAME(state->a));
+ device->save_item(NAME(state->b));
}
@@ -158,21 +158,21 @@ static DEVICE_RESET( ttl74153 )
{
ttl74153_state *state = get_safe_token(device);
- state->a = 1;
- state->b = 1;
- state->enable[0] = 1;
- state->enable[1] = 1;
- state->input_lines[0][0] = 1;
- state->input_lines[0][1] = 1;
- state->input_lines[0][2] = 1;
- state->input_lines[0][3] = 1;
- state->input_lines[1][0] = 1;
- state->input_lines[1][1] = 1;
- state->input_lines[1][2] = 1;
- state->input_lines[1][3] = 1;
-
- state->last_output[0] = -1;
- state->last_output[1] = -1;
+ state->a = 1;
+ state->b = 1;
+ state->enable[0] = 1;
+ state->enable[1] = 1;
+ state->input_lines[0][0] = 1;
+ state->input_lines[0][1] = 1;
+ state->input_lines[0][2] = 1;
+ state->input_lines[0][3] = 1;
+ state->input_lines[1][0] = 1;
+ state->input_lines[1][1] = 1;
+ state->input_lines[1][2] = 1;
+ state->input_lines[1][3] = 1;
+
+ state->last_output[0] = -1;
+ state->last_output[1] = -1;
}
const device_type TTL74153 = &device_creator<ttl74153_device>;
@@ -210,5 +210,3 @@ void ttl74153_device::device_reset()
{
DEVICE_RESET_NAME( ttl74153 )(this);
}
-
-
diff --git a/src/emu/machine/74181.c b/src/emu/machine/74181.c
index 3232d9b54cf..dc54df1db07 100644
--- a/src/emu/machine/74181.c
+++ b/src/emu/machine/74181.c
@@ -10,9 +10,9 @@
-#define TTL74181_MAX_CHIPS (2)
-#define TTL74181_INPUT_TOTAL (14)
-#define TTL74181_OUTPUT_TOTAL (8)
+#define TTL74181_MAX_CHIPS (2)
+#define TTL74181_INPUT_TOTAL (14)
+#define TTL74181_OUTPUT_TOTAL (8)
diff --git a/src/emu/machine/74181.h b/src/emu/machine/74181.h
index 5d15bdac9cf..f5c1abb948a 100644
--- a/src/emu/machine/74181.h
+++ b/src/emu/machine/74181.h
@@ -7,30 +7,30 @@
/* constants for setting input lines */
-#define TTL74181_INPUT_A0 (0)
-#define TTL74181_INPUT_A1 (1)
-#define TTL74181_INPUT_A2 (2)
-#define TTL74181_INPUT_A3 (3)
-#define TTL74181_INPUT_B0 (4)
-#define TTL74181_INPUT_B1 (5)
-#define TTL74181_INPUT_B2 (6)
-#define TTL74181_INPUT_B3 (7)
-#define TTL74181_INPUT_S0 (8)
-#define TTL74181_INPUT_S1 (9)
-#define TTL74181_INPUT_S2 (10)
-#define TTL74181_INPUT_S3 (11)
-#define TTL74181_INPUT_C (12)
-#define TTL74181_INPUT_M (13)
+#define TTL74181_INPUT_A0 (0)
+#define TTL74181_INPUT_A1 (1)
+#define TTL74181_INPUT_A2 (2)
+#define TTL74181_INPUT_A3 (3)
+#define TTL74181_INPUT_B0 (4)
+#define TTL74181_INPUT_B1 (5)
+#define TTL74181_INPUT_B2 (6)
+#define TTL74181_INPUT_B3 (7)
+#define TTL74181_INPUT_S0 (8)
+#define TTL74181_INPUT_S1 (9)
+#define TTL74181_INPUT_S2 (10)
+#define TTL74181_INPUT_S3 (11)
+#define TTL74181_INPUT_C (12)
+#define TTL74181_INPUT_M (13)
/* constants for reads output lines */
-#define TTL74181_OUTPUT_F0 (0)
-#define TTL74181_OUTPUT_F1 (1)
-#define TTL74181_OUTPUT_F2 (2)
-#define TTL74181_OUTPUT_F3 (3)
-#define TTL74181_OUTPUT_AEQB (4)
-#define TTL74181_OUTPUT_P (5)
-#define TTL74181_OUTPUT_G (6)
-#define TTL74181_OUTPUT_CN4 (7)
+#define TTL74181_OUTPUT_F0 (0)
+#define TTL74181_OUTPUT_F1 (1)
+#define TTL74181_OUTPUT_F2 (2)
+#define TTL74181_OUTPUT_F3 (3)
+#define TTL74181_OUTPUT_AEQB (4)
+#define TTL74181_OUTPUT_P (5)
+#define TTL74181_OUTPUT_G (6)
+#define TTL74181_OUTPUT_CN4 (7)
void TTL74181_config(running_machine &machine, int chip, void *interface);
diff --git a/src/emu/machine/7474.c b/src/emu/machine/7474.c
index c66b92c8ede..180dd2c6b79 100644
--- a/src/emu/machine/7474.c
+++ b/src/emu/machine/7474.c
@@ -54,11 +54,11 @@ const device_type MACHINE_TTL7474 = &device_creator<ttl7474_device>;
//-------------------------------------------------
ttl7474_device::ttl7474_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MACHINE_TTL7474, "7474", tag, owner, clock),
- m_output_func(*this),
- m_comp_output_func(*this)
+ : device_t(mconfig, MACHINE_TTL7474, "7474", tag, owner, clock),
+ m_output_func(*this),
+ m_comp_output_func(*this)
{
- init();
+ init();
}
//-------------------------------------------------
@@ -67,15 +67,15 @@ ttl7474_device::ttl7474_device(const machine_config &mconfig, const char *tag, d
void ttl7474_device::device_start()
{
- save_item(NAME(m_clear));
- save_item(NAME(m_preset));
- save_item(NAME(m_clk));
- save_item(NAME(m_d));
- save_item(NAME(m_output));
- save_item(NAME(m_output_comp));
- save_item(NAME(m_last_clock));
- save_item(NAME(m_last_output));
- save_item(NAME(m_last_output_comp));
+ save_item(NAME(m_clear));
+ save_item(NAME(m_preset));
+ save_item(NAME(m_clk));
+ save_item(NAME(m_d));
+ save_item(NAME(m_output));
+ save_item(NAME(m_output_comp));
+ save_item(NAME(m_last_clock));
+ save_item(NAME(m_last_output));
+ save_item(NAME(m_last_output_comp));
m_output_func.resolve_safe();
m_comp_output_func.resolve_safe();
@@ -88,7 +88,7 @@ void ttl7474_device::device_start()
void ttl7474_device::device_reset()
{
- init();
+ init();
}
@@ -98,40 +98,40 @@ void ttl7474_device::device_reset()
void ttl7474_device::update()
{
- if (!m_preset && m_clear) // line 1 in truth table
+ if (!m_preset && m_clear) // line 1 in truth table
{
- m_output = 1;
- m_output_comp = 0;
+ m_output = 1;
+ m_output_comp = 0;
}
- else if (m_preset && !m_clear) // line 2 in truth table
+ else if (m_preset && !m_clear) // line 2 in truth table
{
- m_output = 0;
- m_output_comp = 1;
+ m_output = 0;
+ m_output_comp = 1;
}
- else if (!m_preset && !m_clear) // line 3 in truth table
+ else if (!m_preset && !m_clear) // line 3 in truth table
{
- m_output = 1;
- m_output_comp = 1;
+ m_output = 1;
+ m_output_comp = 1;
}
- else if (!m_last_clock && m_clk) // line 4 in truth table
+ else if (!m_last_clock && m_clk) // line 4 in truth table
{
- m_output = m_d;
- m_output_comp = !m_d;
+ m_output = m_d;
+ m_output_comp = !m_d;
}
- m_last_clock = m_clk;
+ m_last_clock = m_clk;
// call callback if any of the outputs changed
- if (m_output != m_last_output)
+ if (m_output != m_last_output)
{
- m_last_output = m_output;
+ m_last_output = m_output;
m_output_func(m_output);
}
// call callback if any of the outputs changed
- if (m_output_comp != m_last_output_comp)
+ if (m_output_comp != m_last_output_comp)
{
- m_last_output_comp = m_output_comp;
+ m_last_output_comp = m_output_comp;
m_comp_output_func(m_output_comp);
}
}
@@ -143,7 +143,7 @@ void ttl7474_device::update()
WRITE_LINE_MEMBER( ttl7474_device::clear_w )
{
- m_clear = state & 1;
+ m_clear = state & 1;
update();
}
@@ -154,7 +154,7 @@ WRITE_LINE_MEMBER( ttl7474_device::clear_w )
WRITE_LINE_MEMBER( ttl7474_device::preset_w )
{
- m_preset = state & 1;
+ m_preset = state & 1;
update();
}
@@ -165,7 +165,7 @@ WRITE_LINE_MEMBER( ttl7474_device::preset_w )
WRITE_LINE_MEMBER( ttl7474_device::clock_w )
{
- m_clk = state & 1;
+ m_clk = state & 1;
update();
}
@@ -176,7 +176,7 @@ WRITE_LINE_MEMBER( ttl7474_device::clock_w )
WRITE_LINE_MEMBER( ttl7474_device::d_w )
{
- m_d = state & 1;
+ m_d = state & 1;
update();
}
@@ -187,7 +187,7 @@ WRITE_LINE_MEMBER( ttl7474_device::d_w )
READ_LINE_MEMBER( ttl7474_device::output_r )
{
- return m_output;
+ return m_output;
}
@@ -197,18 +197,18 @@ READ_LINE_MEMBER( ttl7474_device::output_r )
READ_LINE_MEMBER( ttl7474_device::output_comp_r )
{
- return m_output_comp;
+ return m_output_comp;
}
void ttl7474_device::init()
{
- m_clear = 1;
- m_preset = 1;
- m_clk = 1;
- m_d = 1;
-
- m_output = -1;
- m_last_clock = 1;
- m_last_output = -1;
- m_last_output_comp = -1;
+ m_clear = 1;
+ m_preset = 1;
+ m_clk = 1;
+ m_d = 1;
+
+ m_output = -1;
+ m_last_clock = 1;
+ m_last_output = -1;
+ m_last_output_comp = -1;
}
diff --git a/src/emu/machine/7474.h b/src/emu/machine/7474.h
index c246f36a31e..2174f409894 100644
--- a/src/emu/machine/7474.h
+++ b/src/emu/machine/7474.h
@@ -51,14 +51,14 @@
//**************************************************************************
#define MCFG_7474_ADD(_tag, _output_cb, _comp_output_cb) \
- MCFG_DEVICE_ADD(_tag, MACHINE_TTL7474, 0) \
- MCFG_7474_OUTPUT_CB(_output_cb) \
- MCFG_7474_COMP_OUTPUT_CB(_comp_output_cb)
+ MCFG_DEVICE_ADD(_tag, MACHINE_TTL7474, 0) \
+ MCFG_7474_OUTPUT_CB(_output_cb) \
+ MCFG_7474_COMP_OUTPUT_CB(_comp_output_cb)
#define MCFG_7474_REPLACE(_tag, _output_cb, _comp_output_cb) \
- MCFG_DEVICE_REPLACE(_tag, TTL7474, 0) \
- MCFG_7474_OUTPUT_CB(_output_cb) \
- MCFG_7474_COMP_OUTPUT_CB(_comp_output_cb)
+ MCFG_DEVICE_REPLACE(_tag, TTL7474, 0) \
+ MCFG_7474_OUTPUT_CB(_output_cb) \
+ MCFG_7474_COMP_OUTPUT_CB(_comp_output_cb)
#define MCFG_7474_OUTPUT_CB(_devcb) \
devcb = &ttl7474_device::set_output_cb(*device, DEVCB2_##_devcb); \
@@ -77,49 +77,49 @@
class ttl7474_device : public device_t
{
public:
- // construction/destruction
- ttl7474_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ttl7474_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration helpers
template<class _Object> static devcb2_base &set_output_cb(device_t &device, _Object object) { return downcast<ttl7474_device &>(device).m_output_func.set_callback(object); }
template<class _Object> static devcb2_base &set_comp_output_cb(device_t &device, _Object object) { return downcast<ttl7474_device &>(device).m_comp_output_func.set_callback(object); }
// public interfaces
- DECLARE_WRITE_LINE_MEMBER( clear_w );
- DECLARE_WRITE_LINE_MEMBER( preset_w );
- DECLARE_WRITE_LINE_MEMBER( clock_w );
- DECLARE_WRITE_LINE_MEMBER( d_w );
- DECLARE_READ_LINE_MEMBER( output_r );
- DECLARE_READ_LINE_MEMBER( output_comp_r ); // NOT strictly the same as !output_r()
+ DECLARE_WRITE_LINE_MEMBER( clear_w );
+ DECLARE_WRITE_LINE_MEMBER( preset_w );
+ DECLARE_WRITE_LINE_MEMBER( clock_w );
+ DECLARE_WRITE_LINE_MEMBER( d_w );
+ DECLARE_READ_LINE_MEMBER( output_r );
+ DECLARE_READ_LINE_MEMBER( output_comp_r ); // NOT strictly the same as !output_r()
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
private:
- // callbacks
- devcb2_write_line m_output_func;
- devcb2_write_line m_comp_output_func;
-
- // inputs
- UINT8 m_clear; // pin 1/13
- UINT8 m_preset; // pin 4/10
- UINT8 m_clk; // pin 3/11
- UINT8 m_d; // pin 2/12
-
- // outputs
- UINT8 m_output; // pin 5/9
- UINT8 m_output_comp; // pin 6/8
-
- // internal
- UINT8 m_last_clock;
- UINT8 m_last_output;
- UINT8 m_last_output_comp;
-
- void update();
- void init();
+ // callbacks
+ devcb2_write_line m_output_func;
+ devcb2_write_line m_comp_output_func;
+
+ // inputs
+ UINT8 m_clear; // pin 1/13
+ UINT8 m_preset; // pin 4/10
+ UINT8 m_clk; // pin 3/11
+ UINT8 m_d; // pin 2/12
+
+ // outputs
+ UINT8 m_output; // pin 5/9
+ UINT8 m_output_comp; // pin 6/8
+
+ // internal
+ UINT8 m_last_clock;
+ UINT8 m_last_output;
+ UINT8 m_last_output_comp;
+
+ void update();
+ void init();
};
diff --git a/src/emu/machine/8042kbdc.c b/src/emu/machine/8042kbdc.c
index 62989cc28b4..665facbfb9d 100644
--- a/src/emu/machine/8042kbdc.c
+++ b/src/emu/machine/8042kbdc.c
@@ -186,11 +186,11 @@
***************************************************************************/
-#define PS2_MOUSE_ON 1
-#define KEYBOARD_ON 1
+#define PS2_MOUSE_ON 1
+#define KEYBOARD_ON 1
-#define LOG_KEYBOARD 0
-#define LOG_ACCESSES 0
+#define LOG_KEYBOARD 0
+#define LOG_ACCESSES 0
@@ -478,15 +478,15 @@ WRITE8_HANDLER(kbdc8042_8_w)
case 1:
/* preceded by writing 0xD1 to port 60h
- * |7|6|5|4|3|2|1|0| 8042 Output Port
- * | | | | | | | `---- system reset line
- * | | | | | | `----- gate A20
- * | | | | `-------- undefined
- * | | | `--------- output buffer full
- * | | `---------- input buffer empty
- * | `----------- keyboard clock (output)
- * `------------ keyboard data (output)
- */
+ * |7|6|5|4|3|2|1|0| 8042 Output Port
+ * | | | | | | | `---- system reset line
+ * | | | | | | `----- gate A20
+ * | | | | `-------- undefined
+ * | | | `--------- output buffer full
+ * | | `---------- input buffer empty
+ * | `----------- keyboard clock (output)
+ * `------------ keyboard data (output)
+ */
at_8042_set_outport(space.machine(), data, 0);
break;
@@ -527,78 +527,78 @@ WRITE8_HANDLER(kbdc8042_8_w)
/* switch based on the command */
switch(data) {
- case 0x20: /* current 8042 command byte is placed on port 60h */
+ case 0x20: /* current 8042 command byte is placed on port 60h */
kbdc8042.data = kbdc8042.command;
break;
- case 0x60: /* next data byte is placed in 8042 command byte */
+ case 0x60: /* next data byte is placed in 8042 command byte */
kbdc8042.operation_write_state = 5;
kbdc8042.send_to_mouse = 0;
break;
- case 0xa7: /* disable auxilary interface */
+ case 0xa7: /* disable auxilary interface */
kbdc8042.mouse.on = 0;
break;
- case 0xa8: /* enable auxilary interface */
+ case 0xa8: /* enable auxilary interface */
kbdc8042.mouse.on = 1;
break;
- case 0xa9: /* test mouse */
+ case 0xa9: /* test mouse */
at_8042_receive(space.machine(), PS2_MOUSE_ON ? 0x00 : 0xff);
break;
- case 0xaa: /* selftest */
+ case 0xaa: /* selftest */
at_8042_receive(space.machine(), 0x55);
break;
- case 0xab: /* test keyboard */
+ case 0xab: /* test keyboard */
at_8042_receive(space.machine(), KEYBOARD_ON ? 0x00 : 0xff);
break;
- case 0xad: /* disable keyboard interface */
+ case 0xad: /* disable keyboard interface */
kbdc8042.keyboard.on = 0;
break;
- case 0xae: /* enable keyboard interface */
+ case 0xae: /* enable keyboard interface */
kbdc8042.keyboard.on = 1;
break;
- case 0xc0: /* read input port */
+ case 0xc0: /* read input port */
/* |7|6|5|4|3 2 1 0| 8042 Input Port
- * | | | | |
- * | | | | `------- undefined
- * | | | |
- * | | | `--------- 1=enable 2nd 256k of Motherboard RAM
- * | | `---------- 1=manufacturing jumper installed
- * | `----------- 1=primary display is MDA, 0=CGA
- * `------------ 1=keyboard not inhibited; 0=inhibited
- */
+ * | | | | |
+ * | | | | `------- undefined
+ * | | | |
+ * | | | `--------- 1=enable 2nd 256k of Motherboard RAM
+ * | | `---------- 1=manufacturing jumper installed
+ * | `----------- 1=primary display is MDA, 0=CGA
+ * `------------ 1=keyboard not inhibited; 0=inhibited
+ */
at_8042_receive(space.machine(), kbdc8042.inport);
break;
- case 0xc1: /* read input port 3..0 until write to 0x60 */
+ case 0xc1: /* read input port 3..0 until write to 0x60 */
kbdc8042.status_read_mode = 1;
break;
- case 0xc2: /* read input port 7..4 until write to 0x60 */
+ case 0xc2: /* read input port 7..4 until write to 0x60 */
kbdc8042.status_read_mode = 2;
break;
- case 0xd0: /* read output port */
+ case 0xd0: /* read output port */
at_8042_receive(space.machine(), kbdc8042.outport);
break;
case 0xd1:
/* write output port; next byte written to port 60h is placed on
- * 8042 output port */
+ * 8042 output port */
kbdc8042.operation_write_state = 1;
return; /* instant delivery */
case 0xd2:
/* write keyboard output register; on PS/2 systems next port 60h
- * write is written to port 60h output register as if initiated
- * by a device; invokes interrupt if enabled */
+ * write is written to port 60h output register as if initiated
+ * by a device; invokes interrupt if enabled */
kbdc8042.operation_write_state = 2;
kbdc8042.send_to_mouse = 0;
break;
case 0xd3:
/* write auxillary output register; on PS/2 systems next port 60h
- * write is written to port 60h input register as if initiated
- * by a device; invokes interrupt if enabled */
+ * write is written to port 60h input register as if initiated
+ * by a device; invokes interrupt if enabled */
kbdc8042.operation_write_state = 3;
kbdc8042.send_to_mouse = 1;
break;
case 0xd4:
/* write auxillary device; on PS/2 systems the next data byte
- * written to input register a port at 60h is sent to the
- * auxiliary device */
+ * written to input register a port at 60h is sent to the
+ * auxiliary device */
kbdc8042.operation_write_state = 4;
break;
case 0xe0:
@@ -615,10 +615,10 @@ WRITE8_HANDLER(kbdc8042_8_w)
case 0xfc:
case 0xfe:
/* Commands 0xF0...0xFF causes certain output lines to be pulsed
- * low for six milliseconds. The bits pulsed low correspond to
- * the bits low set in the command byte. The only pulse that has
- * an effect currently is bit 0, which pulses the CPU's reset line
- */
+ * low for six milliseconds. The bits pulsed low correspond to
+ * the bits low set in the command byte. The only pulse that has
+ * an effect currently is bit 0, which pulses the CPU's reset line
+ */
space.machine().firstcpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
at_8042_set_outport(space.machine(), kbdc8042.outport | 0x02, 0);
break;
diff --git a/src/emu/machine/8042kbdc.h b/src/emu/machine/8042kbdc.h
index 9c08994f7f9..d69e14fe37a 100644
--- a/src/emu/machine/8042kbdc.h
+++ b/src/emu/machine/8042kbdc.h
@@ -13,8 +13,8 @@
enum kbdc8042_type_t
{
KBDC8042_STANDARD,
- KBDC8042_PS2, /* another timing of integrated controller */
- KBDC8042_AT386 /* hack for at386 driver */
+ KBDC8042_PS2, /* another timing of integrated controller */
+ KBDC8042_AT386 /* hack for at386 driver */
};
@@ -38,4 +38,3 @@ DECLARE_READ8_HANDLER(kbdc8042_8_r);
DECLARE_WRITE8_HANDLER(kbdc8042_8_w);
#endif /* KBDC8042_H */
-
diff --git a/src/emu/machine/8237dma.c b/src/emu/machine/8237dma.c
index d1b15dfa7ce..4566b41378e 100644
--- a/src/emu/machine/8237dma.c
+++ b/src/emu/machine/8237dma.c
@@ -26,21 +26,21 @@
MACROS
***************************************************************************/
-#define DMA_MODE_CHANNEL(mode) ((mode) & 0x03)
-#define DMA_MODE_OPERATION(mode) ((mode) & 0x0c)
-#define DMA_MODE_AUTO_INIT(mode) ((mode) & 0x10)
-#define DMA_MODE_DIRECTION(mode) ((mode) & 0x20)
-#define DMA_MODE_TRANSFERMODE(mode) ((mode) & 0xc0)
+#define DMA_MODE_CHANNEL(mode) ((mode) & 0x03)
+#define DMA_MODE_OPERATION(mode) ((mode) & 0x0c)
+#define DMA_MODE_AUTO_INIT(mode) ((mode) & 0x10)
+#define DMA_MODE_DIRECTION(mode) ((mode) & 0x20)
+#define DMA_MODE_TRANSFERMODE(mode) ((mode) & 0xc0)
-#define DMA8237_VERIFY_TRANSFER 0x00
-#define DMA8237_WRITE_TRANSFER 0x04
-#define DMA8237_READ_TRANSFER 0x08
-#define DMA8237_ILLEGAL_TRANSFER 0x0c
+#define DMA8237_VERIFY_TRANSFER 0x00
+#define DMA8237_WRITE_TRANSFER 0x04
+#define DMA8237_READ_TRANSFER 0x08
+#define DMA8237_ILLEGAL_TRANSFER 0x0c
-#define DMA8237_DEMAND_MODE 0x00
-#define DMA8237_SINGLE_MODE 0x40
-#define DMA8237_BLOCK_MODE 0x80
-#define DMA8237_CASCADE_MODE 0xc0
+#define DMA8237_DEMAND_MODE 0x00
+#define DMA8237_SINGLE_MODE 0x40
+#define DMA8237_BLOCK_MODE 0x80
+#define DMA8237_CASCADE_MODE 0xc0
//**************************************************************************
@@ -55,7 +55,7 @@ const device_type I8237 = &device_creator<i8237_device>;
//-------------------------------------------------
i8237_device::i8237_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8237, "Intel 8237", tag, owner, clock)
+ : device_t(mconfig, I8237, "Intel 8237", tag, owner, clock)
{
}
@@ -77,22 +77,22 @@ void i8237_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_out_hrq_cb, 0, sizeof(m_out_hrq_cb));
- memset(&m_out_eop_cb, 0, sizeof(m_out_eop_cb));
- memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
- memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
- memset(&m_in_ior_cb[0], 0, sizeof(m_in_ior_cb[0]));
- memset(&m_in_ior_cb[1], 0, sizeof(m_in_ior_cb[1]));
- memset(&m_in_ior_cb[2], 0, sizeof(m_in_ior_cb[2]));
- memset(&m_in_ior_cb[3], 0, sizeof(m_in_ior_cb[3]));
- memset(&m_out_iow_cb[0], 0, sizeof(m_out_iow_cb[0]));
- memset(&m_out_iow_cb[1], 0, sizeof(m_out_iow_cb[1]));
- memset(&m_out_iow_cb[2], 0, sizeof(m_out_iow_cb[2]));
- memset(&m_out_iow_cb[3], 0, sizeof(m_out_iow_cb[3]));
- memset(&m_out_dack_cb[0], 0, sizeof(m_out_dack_cb[0]));
- memset(&m_out_dack_cb[1], 0, sizeof(m_out_dack_cb[1]));
- memset(&m_out_dack_cb[2], 0, sizeof(m_out_dack_cb[2]));
- memset(&m_out_dack_cb[3], 0, sizeof(m_out_dack_cb[3]));
+ memset(&m_out_hrq_cb, 0, sizeof(m_out_hrq_cb));
+ memset(&m_out_eop_cb, 0, sizeof(m_out_eop_cb));
+ memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
+ memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
+ memset(&m_in_ior_cb[0], 0, sizeof(m_in_ior_cb[0]));
+ memset(&m_in_ior_cb[1], 0, sizeof(m_in_ior_cb[1]));
+ memset(&m_in_ior_cb[2], 0, sizeof(m_in_ior_cb[2]));
+ memset(&m_in_ior_cb[3], 0, sizeof(m_in_ior_cb[3]));
+ memset(&m_out_iow_cb[0], 0, sizeof(m_out_iow_cb[0]));
+ memset(&m_out_iow_cb[1], 0, sizeof(m_out_iow_cb[1]));
+ memset(&m_out_iow_cb[2], 0, sizeof(m_out_iow_cb[2]));
+ memset(&m_out_iow_cb[3], 0, sizeof(m_out_iow_cb[3]));
+ memset(&m_out_dack_cb[0], 0, sizeof(m_out_dack_cb[0]));
+ memset(&m_out_dack_cb[1], 0, sizeof(m_out_dack_cb[1]));
+ memset(&m_out_dack_cb[2], 0, sizeof(m_out_dack_cb[2]));
+ memset(&m_out_dack_cb[3], 0, sizeof(m_out_dack_cb[3]));
}
}
@@ -130,7 +130,7 @@ void i8237_device::device_reset()
m_eop = ASSERT_LINE;
m_state = DMA8237_SI;
m_last_service_channel = 3;
- m_service_channel = 0;
+ m_service_channel = 0;
m_command = 0;
m_drq = 0;
@@ -277,7 +277,7 @@ void i8237_device::i8237_timerproc()
/* Check if a new DMA request has been received. */
/* Bit 6 of the command register determines whether the DREQ signals are active
- high or active low. */
+ high or active low. */
UINT16 pending_request = ( ( m_command & 0x40 ) ? ~m_drq : m_drq ) & ~m_mask;
if ( pending_request & 0x0f )
@@ -320,7 +320,7 @@ void i8237_device::i8237_timerproc()
case DMA8237_S0:
/* S0 is the first of the DMA service. We have requested a hold but are waiting
- for confirmation. */
+ for confirmation. */
if ( m_hlda )
{
if ( DMA_MODE_TRANSFERMODE( m_chan[m_service_channel].m_mode ) == DMA8237_CASCADE_MODE )
@@ -347,7 +347,7 @@ void i8237_device::i8237_timerproc()
}
break;
- case DMA8237_SC: /* Cascade mode, waiting until peripheral is done */
+ case DMA8237_SC: /* Cascade mode, waiting until peripheral is done */
if ( ! ( m_drq & ( 0x01 << m_service_channel ) ) )
{
m_hrq = 0;
@@ -368,11 +368,11 @@ void i8237_device::i8237_timerproc()
}
break;
- case DMA8237_S1: /* Output A8-A15 */
+ case DMA8237_S1: /* Output A8-A15 */
m_state = DMA8237_S2;
break;
- case DMA8237_S2: /* Output A7-A0 */
+ case DMA8237_S2: /* Output A7-A0 */
/* set DACK */
i8327_set_dack(m_service_channel);
@@ -387,12 +387,12 @@ void i8237_device::i8237_timerproc()
}
break;
- case DMA8237_S3: /* Initiate read */
+ case DMA8237_S3: /* Initiate read */
i8237_do_read();
m_state = DMA8237_S4;
break;
- case DMA8237_S4: /* Perform read/write */
+ case DMA8237_S4: /* Perform read/write */
/* Perform read when in compressed timing mode */
if ( m_command & 0x08 )
{
@@ -541,11 +541,11 @@ READ8_DEVICE_HANDLER_TRAMPOLINE(i8237, i8237_r)
data = m_temp;
break;
- case 9: /* DMA write request register */
- case 11: /* DMA mode register */
- case 12: /* DMA clear byte pointer flip-flop */
- case 14: /* DMA clear mask register */
- case 15: /* DMA write mask register */
+ case 9: /* DMA write request register */
+ case 11: /* DMA mode register */
+ case 12: /* DMA clear byte pointer flip-flop */
+ case 14: /* DMA clear mask register */
+ case 15: /* DMA write mask register */
data = 0xFF;
break;
}
diff --git a/src/emu/machine/8237dma.h b/src/emu/machine/8237dma.h
index 94e285b1248..5e8838d8109 100644
--- a/src/emu/machine/8237dma.h
+++ b/src/emu/machine/8237dma.h
@@ -60,17 +60,17 @@
struct i8237_interface
{
- devcb_write_line m_out_hrq_cb;
- devcb_write_line m_out_eop_cb;
+ devcb_write_line m_out_hrq_cb;
+ devcb_write_line m_out_eop_cb;
/* accessors to main memory */
- devcb_read8 m_in_memr_cb;
- devcb_write8 m_out_memw_cb;
+ devcb_read8 m_in_memr_cb;
+ devcb_write8 m_out_memw_cb;
/* channel accessors */
- devcb_read8 m_in_ior_cb[4];
- devcb_write8 m_out_iow_cb[4];
- devcb_write_line m_out_dack_cb[4];
+ devcb_read8 m_in_ior_cb[4];
+ devcb_write8 m_out_iow_cb[4];
+ devcb_write_line m_out_dack_cb[4];
};
@@ -78,11 +78,11 @@ struct i8237_interface
// ======================> i8237_device
class i8237_device : public device_t,
- public i8237_interface
+ public i8237_interface
{
public:
- // construction/destruction
- i8237_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8237_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
/* register access */
UINT8 i8237_r(UINT32 offset);
@@ -97,12 +97,12 @@ public:
void i8237_timerproc();
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
static TIMER_CALLBACK( i8237_timerproc_callback );
static TIMER_CALLBACK( receive_event_callback );
@@ -117,19 +117,19 @@ private:
/* States that the i8237 device can be in */
enum dma8237_state
{
- DMA8237_SI, /* Idle state */
- DMA8237_S0, /* HRQ has been triggered, waiting to receive HLDA */
+ DMA8237_SI, /* Idle state */
+ DMA8237_S0, /* HRQ has been triggered, waiting to receive HLDA */
// DMA8237_SW, /* Wait state */
- DMA8237_SC, /* Cascade mode, waiting for peripheral */
+ DMA8237_SC, /* Cascade mode, waiting for peripheral */
/* Normal transfer states */
- DMA8237_S1, /* Output A8-A15; only used when A8-A15 really needs to be output */
- DMA8237_S2, /* Output A0-A7 */
- DMA8237_S3, /* Initiate read; skipped in compressed timing. On the S2->S3 transition DACK is set. */
- DMA8237_S4, /* Perform read/write */
+ DMA8237_S1, /* Output A8-A15; only used when A8-A15 really needs to be output */
+ DMA8237_S2, /* Output A0-A7 */
+ DMA8237_S3, /* Initiate read; skipped in compressed timing. On the S2->S3 transition DACK is set. */
+ DMA8237_S4, /* Perform read/write */
/* Memory to memory transfer states */
- DMA8237_S11, /* Output A8-A15 */
+ DMA8237_S11, /* Output A8-A15 */
// DMA8237_S12, /* Output A0-A7 */
// DMA8237_S13, /* Initiate read */
// DMA8237_S14, /* Perform read/write */
@@ -139,18 +139,18 @@ private:
// DMA8237_S24, /* Perform read/write */
};
- devcb_resolved_write_line m_out_hrq_func;
- devcb_resolved_write_line m_out_eop_func;
- devcb_resolved_read8 m_in_memr_func;
- devcb_resolved_write8 m_out_memw_func;
+ devcb_resolved_write_line m_out_hrq_func;
+ devcb_resolved_write_line m_out_eop_func;
+ devcb_resolved_read8 m_in_memr_func;
+ devcb_resolved_write8 m_out_memw_func;
emu_timer *m_timer;
struct
{
- devcb_resolved_read8 m_in_ior_func;
- devcb_resolved_write8 m_out_iow_func;
- devcb_resolved_write_line m_out_dack_func;
+ devcb_resolved_read8 m_in_ior_func;
+ devcb_resolved_write8 m_out_iow_func;
+ devcb_resolved_write_line m_out_dack_func;
UINT16 m_base_address;
UINT16 m_base_count;
UINT16 m_address;
@@ -170,12 +170,12 @@ private:
UINT8 m_hlda;
/* bits 0- 3 : Terminal count for channels 0-3
- * bits 4- 7 : Transfer in progress for channels 0-3 */
+ * bits 4- 7 : Transfer in progress for channels 0-3 */
UINT8 m_status;
- dma8237_state m_state; /* State the device is currently in */
- int m_service_channel; /* Channel we will be servicing */
- int m_last_service_channel; /* Previous channel we serviced; used to determine channel priority. */
+ dma8237_state m_state; /* State the device is currently in */
+ int m_service_channel; /* Channel we will be servicing */
+ int m_last_service_channel; /* Previous channel we serviced; used to determine channel priority. */
};
diff --git a/src/emu/machine/8257dma.c b/src/emu/machine/8257dma.c
index ab9b3af9484..9ded1bd3c3f 100644
--- a/src/emu/machine/8257dma.c
+++ b/src/emu/machine/8257dma.c
@@ -33,17 +33,17 @@
#include "8257dma.h"
#include "devhelpr.h"
-#define I8257_STATUS_UPDATE 0x10
-#define I8257_STATUS_TC_CH3 0x08
-#define I8257_STATUS_TC_CH2 0x04
-#define I8257_STATUS_TC_CH1 0x02
-#define I8257_STATUS_TC_CH0 0x01
+#define I8257_STATUS_UPDATE 0x10
+#define I8257_STATUS_TC_CH3 0x08
+#define I8257_STATUS_TC_CH2 0x04
+#define I8257_STATUS_TC_CH1 0x02
+#define I8257_STATUS_TC_CH0 0x01
-#define DMA_MODE_AUTOLOAD(mode) ((mode) & 0x80)
-#define DMA_MODE_TCSTOP(mode) ((mode) & 0x40)
-#define DMA_MODE_EXWRITE(mode) ((mode) & 0x20)
-#define DMA_MODE_ROTPRIO(mode) ((mode) & 0x10)
-#define DMA_MODE_CH_EN(mode, chan) ((mode) & (1 << (chan)))
+#define DMA_MODE_AUTOLOAD(mode) ((mode) & 0x80)
+#define DMA_MODE_TCSTOP(mode) ((mode) & 0x40)
+#define DMA_MODE_EXWRITE(mode) ((mode) & 0x20)
+#define DMA_MODE_ROTPRIO(mode) ((mode) & 0x10)
+#define DMA_MODE_CH_EN(mode, chan) ((mode) & (1 << (chan)))
//**************************************************************************
@@ -58,12 +58,12 @@ const device_type I8257 = &device_creator<i8257_device>;
//-------------------------------------------------
i8257_device::i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8257, "DMA8257", tag, owner, clock),
- m_mode(0),
- m_rr(0),
- m_msb(0),
- m_drq(0),
- m_status(0x0f)
+ : device_t(mconfig, I8257, "DMA8257", tag, owner, clock),
+ m_mode(0),
+ m_rr(0),
+ m_msb(0),
+ m_drq(0),
+ m_status(0x0f)
{
memset(m_registers, 0, sizeof(m_registers));
memset(m_address, 0, sizeof(m_address));
@@ -90,19 +90,19 @@ void i8257_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_out_hrq_cb, 0, sizeof(m_out_hrq_cb));
- memset(&m_out_tc_cb, 0, sizeof(m_out_tc_cb));
- memset(&m_out_mark_cb, 0, sizeof(m_out_mark_cb));
- memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
- memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
- memset(&m_in_ior_cb[0], 0, sizeof(m_in_ior_cb[0]));
- memset(&m_in_ior_cb[1], 0, sizeof(m_in_ior_cb[1]));
- memset(&m_in_ior_cb[2], 0, sizeof(m_in_ior_cb[2]));
- memset(&m_in_ior_cb[3], 0, sizeof(m_in_ior_cb[3]));
- memset(&m_out_iow_cb[0], 0, sizeof(m_out_iow_cb[0]));
- memset(&m_out_iow_cb[1], 0, sizeof(m_out_iow_cb[1]));
- memset(&m_out_iow_cb[2], 0, sizeof(m_out_iow_cb[2]));
- memset(&m_out_iow_cb[3], 0, sizeof(m_out_iow_cb[3]));
+ memset(&m_out_hrq_cb, 0, sizeof(m_out_hrq_cb));
+ memset(&m_out_tc_cb, 0, sizeof(m_out_tc_cb));
+ memset(&m_out_mark_cb, 0, sizeof(m_out_mark_cb));
+ memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
+ memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
+ memset(&m_in_ior_cb[0], 0, sizeof(m_in_ior_cb[0]));
+ memset(&m_in_ior_cb[1], 0, sizeof(m_in_ior_cb[1]));
+ memset(&m_in_ior_cb[2], 0, sizeof(m_in_ior_cb[2]));
+ memset(&m_in_ior_cb[3], 0, sizeof(m_in_ior_cb[3]));
+ memset(&m_out_iow_cb[0], 0, sizeof(m_out_iow_cb[0]));
+ memset(&m_out_iow_cb[1], 0, sizeof(m_out_iow_cb[1]));
+ memset(&m_out_iow_cb[2], 0, sizeof(m_out_iow_cb[2]));
+ memset(&m_out_iow_cb[3], 0, sizeof(m_out_iow_cb[3]));
}
}
diff --git a/src/emu/machine/8257dma.h b/src/emu/machine/8257dma.h
index 365496fc604..86f1e75a9c7 100644
--- a/src/emu/machine/8257dma.h
+++ b/src/emu/machine/8257dma.h
@@ -50,7 +50,7 @@
#define I8257_INTERFACE(_name) \
const i8257_interface (_name) =
-#define I8257_NUM_CHANNELS (4)
+#define I8257_NUM_CHANNELS (4)
/***************************************************************************
@@ -62,17 +62,17 @@
struct i8257_interface
{
- devcb_write_line m_out_hrq_cb;
- devcb_write_line m_out_tc_cb;
- devcb_write_line m_out_mark_cb;
+ devcb_write_line m_out_hrq_cb;
+ devcb_write_line m_out_tc_cb;
+ devcb_write_line m_out_mark_cb;
/* accessors to main memory */
- devcb_read8 m_in_memr_cb; // TODO m_in_memr_cb[I8257_NUM_CHANNELS];
- devcb_write8 m_out_memw_cb; // TODO m_out_memw_cb[I8257_NUM_CHANNELS];
+ devcb_read8 m_in_memr_cb; // TODO m_in_memr_cb[I8257_NUM_CHANNELS];
+ devcb_write8 m_out_memw_cb; // TODO m_out_memw_cb[I8257_NUM_CHANNELS];
/* channel accesors */
- devcb_read8 m_in_ior_cb[I8257_NUM_CHANNELS];
- devcb_write8 m_out_iow_cb[I8257_NUM_CHANNELS];
+ devcb_read8 m_in_ior_cb[I8257_NUM_CHANNELS];
+ devcb_write8 m_out_iow_cb[I8257_NUM_CHANNELS];
};
@@ -80,11 +80,11 @@ struct i8257_interface
// ======================> i8257_device
class i8257_device : public device_t,
- public i8257_interface
+ public i8257_interface
{
public:
- // construction/destruction
- i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8257_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
/* register access */
UINT8 i8257_r(UINT32 offset);
@@ -94,10 +94,10 @@ public:
void i8257_drq_w(int channel, int state);
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@@ -109,13 +109,13 @@ private:
void i8257_update_status();
void i8257_prepare_msb_flip();
- devcb_resolved_write_line m_out_hrq_func;
- devcb_resolved_write_line m_out_tc_func;
- devcb_resolved_write_line m_out_mark_func;
- devcb_resolved_read8 m_in_memr_func;
- devcb_resolved_write8 m_out_memw_func;
- devcb_resolved_read8 m_in_ior_func[I8257_NUM_CHANNELS];
- devcb_resolved_write8 m_out_iow_func[I8257_NUM_CHANNELS];
+ devcb_resolved_write_line m_out_hrq_func;
+ devcb_resolved_write_line m_out_tc_func;
+ devcb_resolved_write_line m_out_mark_func;
+ devcb_resolved_read8 m_in_memr_func;
+ devcb_resolved_write8 m_out_memw_func;
+ devcb_resolved_read8 m_in_ior_func[I8257_NUM_CHANNELS];
+ devcb_resolved_write8 m_out_iow_func[I8257_NUM_CHANNELS];
emu_timer *m_timer;
emu_timer *m_msbflip_timer;
diff --git a/src/emu/machine/aakart.c b/src/emu/machine/aakart.c
index b26d1f95d53..bf35b0e7dbf 100644
--- a/src/emu/machine/aakart.c
+++ b/src/emu/machine/aakart.c
@@ -23,10 +23,10 @@ const device_type AAKART = &device_creator<aakart_device>;
#define RAK1 0xfe
#define RAK2 0xfd
#define BACK 0x3f
-#define SMAK 0x33 /* keyboard + mouse ack */
-#define MACK 0x32 /* mouse ack */
-#define SACK 0x31 /* keyboard ack */
-#define NACK 0x30 /* no data ack */
+#define SMAK 0x33 /* keyboard + mouse ack */
+#define MACK 0x32 /* mouse ack */
+#define SACK 0x31 /* keyboard ack */
+#define NACK 0x30 /* no data ack */
#define RQID 0x20
//**************************************************************************
@@ -61,7 +61,7 @@ void aakart_device::device_validity_check(validity_checker &valid) const
void aakart_device::device_start()
{
m_out_tx_func.resolve(m_out_tx_cb, *this);
- m_out_rx_func.resolve(m_out_rx_cb, *this);
+ m_out_rx_func.resolve(m_out_rx_cb, *this);
m_rxtimer = timer_alloc(RX_TIMER);
m_rxtimer->adjust(attotime::from_hz(clock()), 0, attotime::from_hz(clock()));
m_txtimer = timer_alloc(TX_TIMER);
@@ -220,9 +220,9 @@ void aakart_device::device_timer(emu_timer &timer, device_timer_id id, int param
{
switch(m_tx_latch)
{
- case HRST: { m_rx_latch = HRST; m_keyb_enable = m_mouse_enable = 0; break; }
- case RAK1: { m_rx_latch = RAK1; m_keyb_enable = m_mouse_enable = 0; break; }
- case RAK2: { m_rx_latch = RAK2; m_status = STATUS_NORMAL; break; }
+ case HRST: { m_rx_latch = HRST; m_keyb_enable = m_mouse_enable = 0; break; }
+ case RAK1: { m_rx_latch = RAK1; m_keyb_enable = m_mouse_enable = 0; break; }
+ case RAK2: { m_rx_latch = RAK2; m_status = STATUS_NORMAL; break; }
}
break;
}
diff --git a/src/emu/machine/aakart.h b/src/emu/machine/aakart.h
index 84154e58ae9..6272e05a6b4 100644
--- a/src/emu/machine/aakart.h
+++ b/src/emu/machine/aakart.h
@@ -24,8 +24,8 @@ Acorn Archimedes KART interface
struct aakart_interface
{
- devcb_write_line m_out_tx_cb;
- devcb_write_line m_out_rx_cb;
+ devcb_write_line m_out_tx_cb;
+ devcb_write_line m_out_rx_cb;
};
enum{
@@ -44,7 +44,7 @@ enum{
// ======================> aakart_device
class aakart_device : public device_t,
- public aakart_interface
+ public aakart_interface
{
public:
// construction/destruction
@@ -67,13 +67,13 @@ private:
static const device_timer_id TX_TIMER = 2;
static const device_timer_id MOUSE_TIMER = 3;
static const device_timer_id KEYB_TIMER = 4;
- emu_timer * m_rxtimer;
- emu_timer * m_txtimer;
- emu_timer * m_mousetimer;
- emu_timer * m_keybtimer;
+ emu_timer * m_rxtimer;
+ emu_timer * m_txtimer;
+ emu_timer * m_mousetimer;
+ emu_timer * m_keybtimer;
- devcb_resolved_write_line m_out_tx_func;
- devcb_resolved_write_line m_out_rx_func;
+ devcb_resolved_write_line m_out_tx_func;
+ devcb_resolved_write_line m_out_rx_func;
int m_tx_latch, m_rx_latch;
int m_rx;
int m_new_command;
diff --git a/src/emu/machine/adc0808.c b/src/emu/machine/adc0808.c
index 5d21d2c78f9..48bcce88949 100644
--- a/src/emu/machine/adc0808.c
+++ b/src/emu/machine/adc0808.c
@@ -25,11 +25,11 @@ const device_type ADC0808 = &device_creator<adc0808_device>;
//-------------------------------------------------
adc0808_device::adc0808_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, ADC0808, "ADC0808", tag, owner, clock),
- m_address(0),
- m_start(0),
- m_next_eoc(0),
- m_cycle(0)
+ : device_t(mconfig, ADC0808, "ADC0808", tag, owner, clock),
+ m_address(0),
+ m_start(0),
+ m_next_eoc(0),
+ m_cycle(0)
{
}
diff --git a/src/emu/machine/adc0808.h b/src/emu/machine/adc0808.h
index 68c132bdf9f..b2e346f31a6 100644
--- a/src/emu/machine/adc0808.h
+++ b/src/emu/machine/adc0808.h
@@ -61,12 +61,12 @@ typedef double (*adc0808_analog_read) (device_t *device);
struct adc0808_interface
{
- devcb_write_line m_out_eoc_cb;
+ devcb_write_line m_out_eoc_cb;
- adc0808_analog_read m_in_vref_pos_func;
- adc0808_analog_read m_in_vref_neg_func;
+ adc0808_analog_read m_in_vref_pos_func;
+ adc0808_analog_read m_in_vref_neg_func;
- adc0808_analog_read m_in_in_func[8];
+ adc0808_analog_read m_in_in_func[8];
};
@@ -76,32 +76,32 @@ class adc0808_device : public device_t,
public adc0808_interface
{
public:
- // construction/destruction
- adc0808_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ adc0808_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( data_r );
- DECLARE_WRITE8_MEMBER( ale_w );
+ DECLARE_READ8_MEMBER( data_r );
+ DECLARE_WRITE8_MEMBER( ale_w );
DECLARE_WRITE_LINE_MEMBER( start_w );
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
- devcb_resolved_write_line m_out_eoc_func;
+ devcb_resolved_write_line m_out_eoc_func;
- int m_address; // analog channel address
- int m_start; // start conversion pin
- int m_eoc; // end of conversion pin
- int m_next_eoc; // next value end of conversion pin
+ int m_address; // analog channel address
+ int m_start; // start conversion pin
+ int m_eoc; // end of conversion pin
+ int m_next_eoc; // next value end of conversion pin
- UINT8 m_sar; // successive approximation register
+ UINT8 m_sar; // successive approximation register
- int m_cycle; // clock cycle counter
- int m_bit; // bit counter
+ int m_cycle; // clock cycle counter
+ int m_bit; // bit counter
// timers
emu_timer *m_cycle_timer;
diff --git a/src/emu/machine/adc083x.c b/src/emu/machine/adc083x.c
index edd29573ccf..2dabbd4a20d 100644
--- a/src/emu/machine/adc083x.c
+++ b/src/emu/machine/adc083x.c
@@ -568,5 +568,3 @@ adc0838_device::adc0838_device(const machine_config &mconfig, const char *tag, d
: adc0831_device(mconfig, ADC0838, "A/D Converters 0838", tag, owner, clock)
{
}
-
-
diff --git a/src/emu/machine/adc083x.h b/src/emu/machine/adc083x.h
index 11dd66be889..bc20b01cc44 100644
--- a/src/emu/machine/adc083x.h
+++ b/src/emu/machine/adc083x.h
@@ -16,17 +16,17 @@
CONSTANTS
***************************************************************************/
-#define ADC083X_CH0 0
-#define ADC083X_CH1 1
-#define ADC083X_CH2 2
-#define ADC083X_CH3 3
-#define ADC083X_CH4 4
-#define ADC083X_CH5 5
-#define ADC083X_CH6 6
-#define ADC083X_CH7 7
-#define ADC083X_COM 8
-#define ADC083X_AGND 9
-#define ADC083X_VREF 10
+#define ADC083X_CH0 0
+#define ADC083X_CH1 1
+#define ADC083X_CH2 2
+#define ADC083X_CH3 3
+#define ADC083X_CH4 4
+#define ADC083X_CH5 5
+#define ADC083X_CH6 6
+#define ADC083X_CH7 7
+#define ADC083X_COM 8
+#define ADC083X_AGND 9
+#define ADC083X_VREF 10
/***************************************************************************
MACROS / CONSTANTS
@@ -118,4 +118,4 @@ extern WRITE_LINE_DEVICE_HANDLER( adc083x_se_write );
extern READ_LINE_DEVICE_HANDLER( adc083x_sars_read );
extern READ_LINE_DEVICE_HANDLER( adc083x_do_read );
-#endif /* __ADC083X_H__ */
+#endif /* __ADC083X_H__ */
diff --git a/src/emu/machine/adc1038.c b/src/emu/machine/adc1038.c
index 558c4bb6f83..05675c3de89 100644
--- a/src/emu/machine/adc1038.c
+++ b/src/emu/machine/adc1038.c
@@ -89,16 +89,16 @@ WRITE_LINE_DEVICE_HANDLER( adc1038_clk_write )
{
//printf("ADC CLK, DI = %d, cycle = %d\n", adc1038->data_in, adc1038->cycle);
- if (adc1038->cycle == 0) // A2
+ if (adc1038->cycle == 0) // A2
{
adc1038->adr = 0;
adc1038->adr |= (adc1038->data_in << 2);
}
- else if (adc1038->cycle == 1) // A1
+ else if (adc1038->cycle == 1) // A1
{
adc1038->adr |= (adc1038->data_in << 1);
}
- else if (adc1038->cycle == 2) // A0
+ else if (adc1038->cycle == 2) // A0
{
adc1038->adr |= (adc1038->data_in << 0);
}
@@ -192,5 +192,3 @@ void adc1038_device::device_reset()
{
DEVICE_RESET_NAME( adc1038 )(this);
}
-
-
diff --git a/src/emu/machine/adc1038.h b/src/emu/machine/adc1038.h
index 3f261f9a325..931b323a071 100644
--- a/src/emu/machine/adc1038.h
+++ b/src/emu/machine/adc1038.h
@@ -65,4 +65,4 @@ extern READ_LINE_DEVICE_HANDLER( adc1038_sars_read );
extern WRITE_LINE_DEVICE_HANDLER( adc1038_di_write );
extern WRITE_LINE_DEVICE_HANDLER( adc1038_clk_write );
-#endif /* __ADC1038_H__ */
+#endif /* __ADC1038_H__ */
diff --git a/src/emu/machine/adc1213x.c b/src/emu/machine/adc1213x.c
index 312f003bc34..a87ea7aa991 100644
--- a/src/emu/machine/adc1213x.c
+++ b/src/emu/machine/adc1213x.c
@@ -39,15 +39,15 @@ struct adc12138_state
};
-#define ADC1213X_CONV_MODE_12_MSB_FIRST 0
-#define ADC1213X_CONV_MODE_16_MSB_FIRST 1
-#define ADC1213X_CONV_MODE_12_LSB_FIRST 2
-#define ADC1213X_CONV_MODE_16_LSB_FIRST 3
+#define ADC1213X_CONV_MODE_12_MSB_FIRST 0
+#define ADC1213X_CONV_MODE_16_MSB_FIRST 1
+#define ADC1213X_CONV_MODE_12_LSB_FIRST 2
+#define ADC1213X_CONV_MODE_16_LSB_FIRST 3
-#define ADC1213X_ACQUISITION_TIME_6_CCLK 0
-#define ADC1213X_ACQUISITION_TIME_10_CCLK 1
-#define ADC1213X_ACQUISITION_TIME_18_CCLK 2
-#define ADC1213X_ACQUISITION_TIME_34_CCLK 3
+#define ADC1213X_ACQUISITION_TIME_6_CCLK 0
+#define ADC1213X_ACQUISITION_TIME_10_CCLK 1
+#define ADC1213X_ACQUISITION_TIME_18_CCLK 2
+#define ADC1213X_ACQUISITION_TIME_34_CCLK 3
/***************************************************************************
INLINE FUNCTIONS
@@ -102,42 +102,42 @@ static void adc1213x_convert(device_t *device, int channel, int bits16, int lsbf
switch (channel)
{
- case 0x8: // H L L L - CH0 (single-ended)
+ case 0x8: // H L L L - CH0 (single-ended)
{
input = adc1213x->input_callback_r(device, 0);
break;
}
- case 0xc: // H H L L - CH1 (single-ended)
+ case 0xc: // H H L L - CH1 (single-ended)
{
input = adc1213x->input_callback_r(device, 1);
break;
}
- case 0x9: // H L L H - CH2 (single-ended)
+ case 0x9: // H L L H - CH2 (single-ended)
{
input = adc1213x->input_callback_r(device, 2);
break;
}
- case 0xd: // H H L H - CH3 (single-ended)
+ case 0xd: // H H L H - CH3 (single-ended)
{
input = adc1213x->input_callback_r(device, 3);
break;
}
- case 0xa: // H L H L - CH4 (single-ended)
+ case 0xa: // H L H L - CH4 (single-ended)
{
input = adc1213x->input_callback_r(device, 4);
break;
}
- case 0xe: // H H H L - CH5 (single-ended)
+ case 0xe: // H H H L - CH5 (single-ended)
{
input = adc1213x->input_callback_r(device, 5);
break;
}
- case 0xb: // H L H H - CH6 (single-ended)
+ case 0xb: // H L H H - CH6 (single-ended)
{
input = adc1213x->input_callback_r(device, 6);
break;
}
- case 0xf: // H H H H - CH7 (single-ended)
+ case 0xf: // H H H H - CH7 (single-ended)
{
input = adc1213x->input_callback_r(device, 7);
break;
@@ -191,22 +191,22 @@ WRITE8_DEVICE_HANDLER( adc1213x_cs_w )
switch (mode & 0xf)
{
- case 0x0: // X X X X L L L L - 12 or 13 Bit MSB First conversion
+ case 0x0: // X X X X L L L L - 12 or 13 Bit MSB First conversion
{
adc1213x_convert(device, (mode >> 4) & 0xf, 0, 0);
break;
}
- case 0x1: // X X X X L L L H - 16 or 17 Bit MSB First conversion
+ case 0x1: // X X X X L L L H - 16 or 17 Bit MSB First conversion
{
adc1213x_convert(device, (mode >> 4) & 0xf, 1, 0);
break;
}
- case 0x4: // X X X X L H L L - 12 or 13 Bit LSB First conversion
+ case 0x4: // X X X X L H L L - 12 or 13 Bit LSB First conversion
{
adc1213x_convert(device, (mode >> 4) & 0xf, 0, 1);
break;
}
- case 0x5: // X X X X L H L H - 16 or 17 Bit LSB First conversion
+ case 0x5: // X X X X L H L H - 16 or 17 Bit LSB First conversion
{
adc1213x_convert(device, (mode >> 4) & 0xf, 1, 1);
break;
@@ -216,25 +216,25 @@ WRITE8_DEVICE_HANDLER( adc1213x_cs_w )
{
switch (mode)
{
- case 0x08: // L L L L H L L L - Auto cal
+ case 0x08: // L L L L H L L L - Auto cal
{
adc1213x->auto_cal = 1;
break;
}
- case 0x0e: // L L L L H H H L - Acquisition time 6 CCLK cycles
+ case 0x0e: // L L L L H H H L - Acquisition time 6 CCLK cycles
{
adc1213x->acq_time = ADC1213X_ACQUISITION_TIME_6_CCLK;
break;
}
- case 0x8d: // H L L L H H L H - Data out with sign
+ case 0x8d: // H L L L H H L H - Data out with sign
{
adc1213x->data_out_sign = 1;
break;
}
- case 0x0f: // L L L L H H H H - User mode
+ case 0x0f: // L L L L H H H H - User mode
{
break;
}
@@ -409,5 +409,3 @@ void adc12138_device::device_reset()
{
DEVICE_RESET_NAME( adc12138 )(this);
}
-
-
diff --git a/src/emu/machine/adc1213x.h b/src/emu/machine/adc1213x.h
index 0fed72a1064..bb12cddaca7 100644
--- a/src/emu/machine/adc1213x.h
+++ b/src/emu/machine/adc1213x.h
@@ -89,4 +89,4 @@ extern DECLARE_WRITE8_DEVICE_HANDLER( adc1213x_conv_w );
extern DECLARE_READ8_DEVICE_HANDLER( adc1213x_do_r );
extern DECLARE_READ8_DEVICE_HANDLER( adc1213x_eoc_r );
-#endif /* __ADC1213X_H__ */
+#endif /* __ADC1213X_H__ */
diff --git a/src/emu/machine/am53cf96.c b/src/emu/machine/am53cf96.c
index a2e11e5ea2c..be0dc8f1162 100644
--- a/src/emu/machine/am53cf96.c
+++ b/src/emu/machine/am53cf96.c
@@ -40,7 +40,7 @@ READ8_MEMBER( am53cf96_device::read )
if (offset == REG_IRQSTATE)
{
- scsi_regs[REG_STATUS] &= ~0x80; // clear IRQ flag
+ scsi_regs[REG_STATUS] &= ~0x80; // clear IRQ flag
}
return rv;
@@ -48,8 +48,8 @@ READ8_MEMBER( am53cf96_device::read )
void am53cf96_device::device_timer(emu_timer &timer, device_timer_id tid, int param, void *ptr)
{
- scsi_regs[REG_IRQSTATE] = 8; // indicate success
- scsi_regs[REG_STATUS] |= 0x80; // indicate IRQ
+ scsi_regs[REG_IRQSTATE] = 8; // indicate success
+ scsi_regs[REG_STATUS] |= 0x80; // indicate IRQ
m_irq_handler(1);
}
@@ -65,7 +65,7 @@ WRITE8_MEMBER( am53cf96_device::write )
if (offset == REG_XFERCNTLOW || offset == REG_XFERCNTMID || offset == REG_XFERCNTHI)
{
- scsi_regs[REG_STATUS] &= ~0x10; // clear CTZ bit
+ scsi_regs[REG_STATUS] &= ~0x10; // clear CTZ bit
}
// FIFO
@@ -86,12 +86,12 @@ WRITE8_MEMBER( am53cf96_device::write )
fptr = 0;
switch (data & 0x7f)
{
- case 0: // NOP
- scsi_regs[REG_IRQSTATE] = 8; // indicate success
+ case 0: // NOP
+ scsi_regs[REG_IRQSTATE] = 8; // indicate success
xfer_state = 0;
break;
case 2: // reset device
- scsi_regs[REG_IRQSTATE] = 8; // indicate success
+ scsi_regs[REG_IRQSTATE] = 8; // indicate success
logerror("53cf96: reset target ID = %d (PC = %x)\n", last_id, space.device().safe_pc());
if (devices[last_id])
@@ -105,12 +105,12 @@ WRITE8_MEMBER( am53cf96_device::write )
xfer_state = 0;
break;
- case 3: // reset SCSI bus
- scsi_regs[REG_INTSTATE] = 4; // command sent OK
+ case 3: // reset SCSI bus
+ scsi_regs[REG_INTSTATE] = 4; // command sent OK
xfer_state = 0;
m_transfer_timer->adjust( attotime::from_hz( 16384 ) );
break;
- case 0x42: // select with ATN steps
+ case 0x42: // select with ATN steps
m_transfer_timer->adjust( attotime::from_hz( 16384 ) );
if ((fifo[1] == 0) || (fifo[1] == 0x48) || (fifo[1] == 0x4b))
{
@@ -135,14 +135,14 @@ WRITE8_MEMBER( am53cf96_device::write )
}
xfer_state = 0;
break;
- case 0x44: // enable selection/reselection
+ case 0x44: // enable selection/reselection
xfer_state = 0;
break;
- case 0x10: // information transfer (must not change xfer_state)
- case 0x11: // second phase of information transfer
- case 0x12: // message accepted
+ case 0x10: // information transfer (must not change xfer_state)
+ case 0x11: // second phase of information transfer
+ case 0x12: // message accepted
m_transfer_timer->adjust( attotime::from_hz( 16384 ) );
- scsi_regs[REG_INTSTATE] = 6; // command sent OK
+ scsi_regs[REG_INTSTATE] = 6; // command sent OK
break;
default:
printf( "unsupported command %02x\n", data );
@@ -195,7 +195,7 @@ void am53cf96_device::device_start()
// retrieve data from the SCSI controller
void am53cf96_device::dma_read_data(int bytes, UINT8 *pData)
{
- scsi_regs[REG_STATUS] |= 0x10; // indicate DMA finished
+ scsi_regs[REG_STATUS] |= 0x10; // indicate DMA finished
if (devices[last_id])
{
@@ -212,7 +212,7 @@ void am53cf96_device::dma_write_data(int bytes, UINT8 *pData)
{
// int i;
- scsi_regs[REG_STATUS] |= 0x10; // indicate DMA finished
+ scsi_regs[REG_STATUS] |= 0x10; // indicate DMA finished
if (devices[last_id])
{
diff --git a/src/emu/machine/am53cf96.h b/src/emu/machine/am53cf96.h
index edcbe979f09..8f82cbeaafa 100644
--- a/src/emu/machine/am53cf96.h
+++ b/src/emu/machine/am53cf96.h
@@ -17,23 +17,23 @@
// 53CF96 register set
enum
{
- REG_XFERCNTLOW = 0, // read = current xfer count lo byte, write = set xfer count lo byte
- REG_XFERCNTMID, // read = current xfer count mid byte, write = set xfer count mid byte
- REG_FIFO, // read/write = FIFO
- REG_COMMAND, // read/write = command
-
- REG_STATUS, // read = status, write = destination SCSI ID (4)
- REG_IRQSTATE, // read = IRQ status, write = timeout (5)
- REG_INTSTATE, // read = internal state, write = sync xfer period (6)
- REG_FIFOSTATE, // read = FIFO status, write = sync offset
- REG_CTRL1, // read/write = control 1
- REG_CLOCKFCTR, // clock factor (write only)
- REG_TESTMODE, // test mode (write only)
- REG_CTRL2, // read/write = control 2
- REG_CTRL3, // read/write = control 3
- REG_CTRL4, // read/write = control 4
- REG_XFERCNTHI, // read = current xfer count hi byte, write = set xfer count hi byte
- REG_DATAALIGN // data alignment (write only)
+ REG_XFERCNTLOW = 0, // read = current xfer count lo byte, write = set xfer count lo byte
+ REG_XFERCNTMID, // read = current xfer count mid byte, write = set xfer count mid byte
+ REG_FIFO, // read/write = FIFO
+ REG_COMMAND, // read/write = command
+
+ REG_STATUS, // read = status, write = destination SCSI ID (4)
+ REG_IRQSTATE, // read = IRQ status, write = timeout (5)
+ REG_INTSTATE, // read = internal state, write = sync xfer period (6)
+ REG_FIFOSTATE, // read = FIFO status, write = sync offset
+ REG_CTRL1, // read/write = control 1
+ REG_CLOCKFCTR, // clock factor (write only)
+ REG_TESTMODE, // test mode (write only)
+ REG_CTRL2, // read/write = control 2
+ REG_CTRL3, // read/write = control 3
+ REG_CTRL4, // read/write = control 4
+ REG_XFERCNTHI, // read = current xfer count hi byte, write = set xfer count hi byte
+ REG_DATAALIGN // data alignment (write only)
};
class am53cf96_device : public device_t
diff --git a/src/emu/machine/am9517a.c b/src/emu/machine/am9517a.c
index 63a2dd61eaa..46016ea99eb 100644
--- a/src/emu/machine/am9517a.c
+++ b/src/emu/machine/am9517a.c
@@ -52,28 +52,28 @@ enum
};
-#define COMMAND_MEM_TO_MEM BIT(m_command, 0)
-#define COMMAND_CH0_ADDRESS_HOLD BIT(m_command, 1)
-#define COMMAND_DISABLE BIT(m_command, 2)
-#define COMMAND_COMPRESSED_TIMING BIT(m_command, 3)
-#define COMMAND_ROTATING_PRIORITY BIT(m_command, 4)
-#define COMMAND_EXTENDED_WRITE BIT(m_command, 5)
-#define COMMAND_DREQ_ACTIVE_LOW BIT(m_command, 6)
-#define COMMAND_DACK_ACTIVE_HIGH BIT(m_command, 7)
-
-
-#define MODE_TRANSFER_MASK (m_channel[m_current_channel].m_mode & 0x0c)
-#define MODE_TRANSFER_VERIFY 0x00
-#define MODE_TRANSFER_WRITE 0x04
-#define MODE_TRANSFER_READ 0x08
-#define MODE_TRANSFER_ILLEGAL 0x0c
-#define MODE_AUTOINITIALIZE BIT(m_channel[m_current_channel].m_mode, 4)
-#define MODE_ADDRESS_DECREMENT BIT(m_channel[m_current_channel].m_mode, 5)
-#define MODE_MASK (m_channel[m_current_channel].m_mode & 0xc0)
-#define MODE_DEMAND 0x00
-#define MODE_SINGLE 0x40
-#define MODE_BLOCK 0x80
-#define MODE_CASCADE 0xc0
+#define COMMAND_MEM_TO_MEM BIT(m_command, 0)
+#define COMMAND_CH0_ADDRESS_HOLD BIT(m_command, 1)
+#define COMMAND_DISABLE BIT(m_command, 2)
+#define COMMAND_COMPRESSED_TIMING BIT(m_command, 3)
+#define COMMAND_ROTATING_PRIORITY BIT(m_command, 4)
+#define COMMAND_EXTENDED_WRITE BIT(m_command, 5)
+#define COMMAND_DREQ_ACTIVE_LOW BIT(m_command, 6)
+#define COMMAND_DACK_ACTIVE_HIGH BIT(m_command, 7)
+
+
+#define MODE_TRANSFER_MASK (m_channel[m_current_channel].m_mode & 0x0c)
+#define MODE_TRANSFER_VERIFY 0x00
+#define MODE_TRANSFER_WRITE 0x04
+#define MODE_TRANSFER_READ 0x08
+#define MODE_TRANSFER_ILLEGAL 0x0c
+#define MODE_AUTOINITIALIZE BIT(m_channel[m_current_channel].m_mode, 4)
+#define MODE_ADDRESS_DECREMENT BIT(m_channel[m_current_channel].m_mode, 5)
+#define MODE_MASK (m_channel[m_current_channel].m_mode & 0xc0)
+#define MODE_DEMAND 0x00
+#define MODE_SINGLE 0x40
+#define MODE_BLOCK 0x80
+#define MODE_CASCADE 0xc0
enum
@@ -372,11 +372,11 @@ inline void am9517a_device::end_of_process()
//-------------------------------------------------
am9517a_device::am9517a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, AM9517A, "AM9517A", tag, owner, clock),
- device_execute_interface(mconfig, *this),
- m_icount(0),
- m_hack(0),
- m_ready(1)
+ : device_t(mconfig, AM9517A, "AM9517A", tag, owner, clock),
+ device_execute_interface(mconfig, *this),
+ m_icount(0),
+ m_hack(0),
+ m_ready(1)
{
}
@@ -397,17 +397,17 @@ void am9517a_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_out_hreq_cb, 0, sizeof(m_out_hreq_cb));
- memset(&m_out_eop_cb, 0, sizeof(m_out_eop_cb));
- memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
- memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
+ memset(&m_out_hreq_cb, 0, sizeof(m_out_hreq_cb));
+ memset(&m_out_eop_cb, 0, sizeof(m_out_eop_cb));
+ memset(&m_in_memr_cb, 0, sizeof(m_in_memr_cb));
+ memset(&m_out_memw_cb, 0, sizeof(m_out_memw_cb));
for (int i = 0; i < 4; i++)
{
- memset(&m_in_ior_cb[i], 0, sizeof(m_in_ior_cb[i]));
- memset(&m_out_iow_cb[i], 0, sizeof(m_out_iow_cb[i]));
- memset(&m_out_dack_cb[i], 0, sizeof(m_out_dack_cb[i]));
- }
+ memset(&m_in_ior_cb[i], 0, sizeof(m_in_ior_cb[i]));
+ memset(&m_out_iow_cb[i], 0, sizeof(m_out_iow_cb[i]));
+ memset(&m_out_dack_cb[i], 0, sizeof(m_out_dack_cb[i]));
+ }
}
}
diff --git a/src/emu/machine/am9517a.h b/src/emu/machine/am9517a.h
index a0f60c542b5..cba99d993dc 100644
--- a/src/emu/machine/am9517a.h
+++ b/src/emu/machine/am9517a.h
@@ -68,23 +68,23 @@
struct am9517a_interface
{
- devcb_write_line m_out_hreq_cb;
- devcb_write_line m_out_eop_cb;
+ devcb_write_line m_out_hreq_cb;
+ devcb_write_line m_out_eop_cb;
- devcb_read8 m_in_memr_cb;
- devcb_write8 m_out_memw_cb;
+ devcb_read8 m_in_memr_cb;
+ devcb_write8 m_out_memw_cb;
- devcb_read8 m_in_ior_cb[4];
- devcb_write8 m_out_iow_cb[4];
- devcb_write_line m_out_dack_cb[4];
+ devcb_read8 m_in_ior_cb[4];
+ devcb_write8 m_out_iow_cb[4];
+ devcb_write_line m_out_dack_cb[4];
};
// ======================> am9517a_device
class am9517a_device : public device_t,
- public device_execute_interface,
- public am9517a_interface
+ public device_execute_interface,
+ public am9517a_interface
{
public:
// construction/destruction
@@ -109,7 +109,7 @@ protected:
virtual void device_reset();
virtual void execute_run();
- int m_icount;
+ int m_icount;
private:
inline void dma_request(int channel, int state);
@@ -124,16 +124,16 @@ private:
inline void dma_advance();
inline void end_of_process();
- devcb_resolved_write_line m_out_hreq_func;
- devcb_resolved_write_line m_out_eop_func;
- devcb_resolved_read8 m_in_memr_func;
- devcb_resolved_write8 m_out_memw_func;
+ devcb_resolved_write_line m_out_hreq_func;
+ devcb_resolved_write_line m_out_eop_func;
+ devcb_resolved_read8 m_in_memr_func;
+ devcb_resolved_write8 m_out_memw_func;
struct
{
- devcb_resolved_read8 m_in_ior_func;
- devcb_resolved_write8 m_out_iow_func;
- devcb_resolved_write_line m_out_dack_func;
+ devcb_resolved_read8 m_in_ior_func;
+ devcb_resolved_write8 m_out_iow_func;
+ devcb_resolved_write_line m_out_dack_func;
UINT16 m_address;
UINT16 m_count;
diff --git a/src/emu/machine/amigafdc.h b/src/emu/machine/amigafdc.h
index 4f134978b17..f4f2c775651 100644
--- a/src/emu/machine/amigafdc.h
+++ b/src/emu/machine/amigafdc.h
@@ -4,7 +4,7 @@
#include "emu.h"
#include "imagedev/floppy.h"
-#define MCFG_AMIGA_FDC_ADD(_tag, _clock) \
+#define MCFG_AMIGA_FDC_ADD(_tag, _clock) \
MCFG_DEVICE_ADD(_tag, AMIGA_FDC, _clock)
class amiga_fdc : public device_t {
@@ -29,8 +29,8 @@ public:
DECLARE_FLOPPY_FORMATS( floppy_formats );
protected:
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
diff --git a/src/emu/machine/at28c16.c b/src/emu/machine/at28c16.c
index 99069b0ca3f..cf86fb80c89 100644
--- a/src/emu/machine/at28c16.c
+++ b/src/emu/machine/at28c16.c
@@ -39,11 +39,11 @@ const device_type AT28C16 = &device_creator<at28c16_device>;
at28c16_device::at28c16_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
: device_t(mconfig, AT28C16, "AT28C16", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_a9_12v( 0 ),
- m_oe_12v( 0 ),
- m_last_write( -1 )
+ device_memory_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_a9_12v( 0 ),
+ m_oe_12v( 0 ),
+ m_last_write( -1 )
{
}
diff --git a/src/emu/machine/cdp1852.c b/src/emu/machine/cdp1852.c
index 012cd658955..24f13095591 100644
--- a/src/emu/machine/cdp1852.c
+++ b/src/emu/machine/cdp1852.c
@@ -65,7 +65,7 @@ void cdp1852_device::set_sr_line(int state)
//-------------------------------------------------
cdp1852_device::cdp1852_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CDP1852, "CDP1852", tag, owner, clock)
+ : device_t(mconfig, CDP1852, "CDP1852", tag, owner, clock)
{
}
diff --git a/src/emu/machine/cdp1852.h b/src/emu/machine/cdp1852.h
index 6ddf7eaf8aa..47374d2a334 100644
--- a/src/emu/machine/cdp1852.h
+++ b/src/emu/machine/cdp1852.h
@@ -35,7 +35,7 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define CDP1852_CLOCK_HIGH 0
+#define CDP1852_CLOCK_HIGH 0
#define CDP1852_MODE_INPUT \
DEVCB_LINE_GND
@@ -67,49 +67,49 @@
struct cdp1852_interface
{
- devcb_read_line m_in_mode_cb;
+ devcb_read_line m_in_mode_cb;
- devcb_read8 m_in_data_cb;
- devcb_write8 m_out_data_cb;
+ devcb_read8 m_in_data_cb;
+ devcb_write8 m_out_data_cb;
- devcb_write_line m_out_sr_cb;
+ devcb_write_line m_out_sr_cb;
};
// ======================> cdp1852_device
class cdp1852_device : public device_t,
- public cdp1852_interface
+ public cdp1852_interface
{
public:
- // construction/destruction
- cdp1852_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cdp1852_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
int get_mode();
inline void set_sr_line(int state);
- devcb_resolved_read_line m_in_mode_func;
- devcb_resolved_write_line m_out_sr_func;
- devcb_resolved_read8 m_in_data_func;
- devcb_resolved_write8 m_out_data_func;
+ devcb_resolved_read_line m_in_mode_func;
+ devcb_resolved_write_line m_out_sr_func;
+ devcb_resolved_read8 m_in_data_func;
+ devcb_resolved_write8 m_out_data_func;
- int m_new_data; // new data written
- UINT8 m_data; // data latch
- UINT8 m_next_data; // next data
+ int m_new_data; // new data written
+ UINT8 m_data; // data latch
+ UINT8 m_next_data; // next data
- int m_sr; // service request flag
- int m_next_sr; // next value of service request flag
+ int m_sr; // service request flag
+ int m_next_sr; // next value of service request flag
// timers
emu_timer *m_scan_timer;
diff --git a/src/emu/machine/cdp1871.c b/src/emu/machine/cdp1871.c
index eac72f26dc5..f87a8271aa9 100644
--- a/src/emu/machine/cdp1871.c
+++ b/src/emu/machine/cdp1871.c
@@ -93,12 +93,12 @@ static const UINT8 CDP1871_KEY_CODES[4][11][8] =
//-------------------------------------------------
cdp1871_device::cdp1871_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CDP1871, "RCA CDP1871", tag, owner, clock),
- m_inhibit(false),
- m_sense(0),
- m_drive(0),
- m_next_da(CLEAR_LINE),
- m_next_rpt(CLEAR_LINE)
+ : device_t(mconfig, CDP1871, "RCA CDP1871", tag, owner, clock),
+ m_inhibit(false),
+ m_sense(0),
+ m_drive(0),
+ m_next_da(CLEAR_LINE),
+ m_next_rpt(CLEAR_LINE)
{
}
diff --git a/src/emu/machine/cdp1871.h b/src/emu/machine/cdp1871.h
index cc803c83821..80313c5e764 100644
--- a/src/emu/machine/cdp1871.h
+++ b/src/emu/machine/cdp1871.h
@@ -67,48 +67,48 @@
struct cdp1871_interface
{
- devcb_read8 in_d1_cb;
- devcb_read8 in_d2_cb;
- devcb_read8 in_d3_cb;
- devcb_read8 in_d4_cb;
- devcb_read8 in_d5_cb;
- devcb_read8 in_d6_cb;
- devcb_read8 in_d7_cb;
- devcb_read8 in_d8_cb;
- devcb_read8 in_d9_cb;
- devcb_read8 in_d10_cb;
- devcb_read8 in_d11_cb;
-
- devcb_read_line in_shift_cb;
- devcb_read_line in_control_cb;
- devcb_read_line in_alpha_cb;
+ devcb_read8 in_d1_cb;
+ devcb_read8 in_d2_cb;
+ devcb_read8 in_d3_cb;
+ devcb_read8 in_d4_cb;
+ devcb_read8 in_d5_cb;
+ devcb_read8 in_d6_cb;
+ devcb_read8 in_d7_cb;
+ devcb_read8 in_d8_cb;
+ devcb_read8 in_d9_cb;
+ devcb_read8 in_d10_cb;
+ devcb_read8 in_d11_cb;
+
+ devcb_read_line in_shift_cb;
+ devcb_read_line in_control_cb;
+ devcb_read_line in_alpha_cb;
// this gets called for every change of the DA pin (pin 33)
- devcb_write_line out_da_cb;
+ devcb_write_line out_da_cb;
// this gets called for every change of the RPT pin (pin 35)
- devcb_write_line out_rpt_cb;
+ devcb_write_line out_rpt_cb;
};
// ======================> cdp1871_device
class cdp1871_device : public device_t,
- public cdp1871_interface
+ public cdp1871_interface
{
public:
- // construction/destruction
- cdp1871_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cdp1871_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( data_r );
+ DECLARE_READ8_MEMBER( data_r );
DECLARE_READ_LINE_MEMBER( da_r );
DECLARE_READ_LINE_MEMBER( rpt_r );
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
void change_output_lines();
@@ -116,27 +116,27 @@ protected:
void detect_keypress();
private:
- devcb_resolved_write_line m_out_da_func;
- devcb_resolved_write_line m_out_rpt_func;
- devcb_resolved_read8 m_in_d_func[11];
- devcb_resolved_read_line m_in_shift_func;
- devcb_resolved_read_line m_in_control_func;
- devcb_resolved_read_line m_in_alpha_func;
+ devcb_resolved_write_line m_out_da_func;
+ devcb_resolved_write_line m_out_rpt_func;
+ devcb_resolved_read8 m_in_d_func[11];
+ devcb_resolved_read_line m_in_shift_func;
+ devcb_resolved_read_line m_in_control_func;
+ devcb_resolved_read_line m_in_alpha_func;
- bool m_inhibit; // scan counter clock inhibit
- int m_sense; // sense input scan counter
- int m_drive; // modifier inputs
+ bool m_inhibit; // scan counter clock inhibit
+ int m_sense; // sense input scan counter
+ int m_drive; // modifier inputs
- int m_shift; // latched shift modifier
- int m_control; // latched control modifier
+ int m_shift; // latched shift modifier
+ int m_control; // latched control modifier
- int m_da; // data available flag
- int m_next_da; // next value of data available flag
- int m_rpt; // repeat flag
- int m_next_rpt; // next value of repeat flag
+ int m_da; // data available flag
+ int m_next_da; // next value of data available flag
+ int m_rpt; // repeat flag
+ int m_next_rpt; // next value of repeat flag
// timers
- emu_timer *m_scan_timer; // keyboard scan timer
+ emu_timer *m_scan_timer; // keyboard scan timer
};
diff --git a/src/emu/machine/com8116.c b/src/emu/machine/com8116.c
index 6f141dba2aa..595fd1cd4a0 100644
--- a/src/emu/machine/com8116.c
+++ b/src/emu/machine/com8116.c
@@ -32,7 +32,7 @@ const device_type COM8116 = &device_creator<com8116_device>;
//-------------------------------------------------
com8116_device::com8116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, COM8116, "COM8116", tag, owner, clock)
+ : device_t(mconfig, COM8116, "COM8116", tag, owner, clock)
{
}
diff --git a/src/emu/machine/com8116.h b/src/emu/machine/com8116.h
index 41137a5e95a..5f063890ab7 100644
--- a/src/emu/machine/com8116.h
+++ b/src/emu/machine/com8116.h
@@ -34,7 +34,7 @@
///*************************************************************************
#define MCFG_COM8116_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD(_tag, COM8116, _clock) \
+ MCFG_DEVICE_ADD(_tag, COM8116, _clock) \
MCFG_DEVICE_CONFIG(_config)
@@ -51,9 +51,9 @@
struct com8116_interface
{
- devcb_write_line m_out_fx4_cb;
- devcb_write_line m_out_fr_cb;
- devcb_write_line m_out_ft_cb;
+ devcb_write_line m_out_fx4_cb;
+ devcb_write_line m_out_fr_cb;
+ devcb_write_line m_out_ft_cb;
// receiver divisor ROM (19-bit)
UINT32 m_fr_divisors[16];
@@ -65,20 +65,20 @@ struct com8116_interface
// ======================> com8116_device
-class com8116_device : public device_t,
- public com8116_interface
+class com8116_device : public device_t,
+ public com8116_interface
{
public:
- // construction/destruction
- com8116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ com8116_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_WRITE8_MEMBER( str_w );
- DECLARE_WRITE8_MEMBER( stt_w );
+ DECLARE_WRITE8_MEMBER( str_w );
+ DECLARE_WRITE8_MEMBER( stt_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
virtual void device_timer(emu_timer &timer, device_timer_id id, int m_param, void *ptr);
private:
@@ -86,12 +86,12 @@ private:
static const device_timer_id TIMER_FR = 1;
static const device_timer_id TIMER_FT = 2;
- devcb_resolved_write_line m_out_fx4_func;
- devcb_resolved_write_line m_out_fr_func;
- devcb_resolved_write_line m_out_ft_func;
+ devcb_resolved_write_line m_out_fx4_func;
+ devcb_resolved_write_line m_out_fr_func;
+ devcb_resolved_write_line m_out_ft_func;
- int m_fr; // receiver frequency
- int m_ft; // transmitter frequency
+ int m_fr; // receiver frequency
+ int m_ft; // transmitter frequency
// timers
emu_timer *m_fx4_timer;
diff --git a/src/emu/machine/ctronics.c b/src/emu/machine/ctronics.c
index 1b9e802bb63..50d941e8265 100644
--- a/src/emu/machine/ctronics.c
+++ b/src/emu/machine/ctronics.c
@@ -19,9 +19,9 @@ const device_type CENTRONICS = &device_creator<centronics_device>;
//-------------------------------------------------
centronics_device::centronics_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CENTRONICS, "Centronics", tag, owner, clock),
- device_slot_interface(mconfig, *this),
- m_dev(NULL)
+ : device_t(mconfig, CENTRONICS, "Centronics", tag, owner, clock),
+ device_slot_interface(mconfig, *this),
+ m_dev(NULL)
{
}
@@ -139,8 +139,8 @@ MACHINE_CONFIG_END
//-------------------------------------------------
centronics_printer_device::centronics_printer_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CENTRONICS_PRINTER, "Centronics Printer", tag, owner, clock),
- device_centronics_peripheral_interface( mconfig, *this )
+ : device_t(mconfig, CENTRONICS_PRINTER, "Centronics Printer", tag, owner, clock),
+ device_centronics_peripheral_interface( mconfig, *this )
{
}
//-------------------------------------------------
@@ -169,13 +169,13 @@ WRITE_LINE_MEMBER(centronics_printer_device::printer_online)
static TIMER_CALLBACK( timer_ack_callback )
{
- centronics_printer_device *printer = reinterpret_cast<centronics_printer_device *>(ptr);
+ centronics_printer_device *printer = reinterpret_cast<centronics_printer_device *>(ptr);
printer->ack_callback(param);
}
static TIMER_CALLBACK( timer_busy_callback )
{
- centronics_printer_device *printer = reinterpret_cast<centronics_printer_device *>(ptr);
+ centronics_printer_device *printer = reinterpret_cast<centronics_printer_device *>(ptr);
printer->busy_callback(param);
}
diff --git a/src/emu/machine/ctronics.h b/src/emu/machine/ctronics.h
index a4540ebf19b..89b246fe086 100644
--- a/src/emu/machine/ctronics.h
+++ b/src/emu/machine/ctronics.h
@@ -54,7 +54,7 @@ struct centronics_interface
};
// ======================> centronics_device
-class centronics_device : public device_t,
+class centronics_device : public device_t,
public centronics_interface,
public device_slot_interface
{
@@ -95,7 +95,7 @@ public:
protected:
// device-level overrides
- virtual void device_config_complete();
+ virtual void device_config_complete();
virtual void device_start();
private:
device_centronics_peripheral_interface *m_dev;
@@ -115,8 +115,8 @@ class centronics_printer_device :
public device_centronics_peripheral_interface
{
public:
- // construction/destruction
- centronics_printer_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ centronics_printer_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
@@ -131,9 +131,9 @@ public:
virtual void init_prime_w(UINT8 state);
virtual UINT8 read() { return 0x00; }
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_config_complete() { m_shortname = "centronics_printer"; }
private:
printer_image_device *m_printer;
diff --git a/src/emu/machine/ds1302.c b/src/emu/machine/ds1302.c
index e96a710c73a..9866d1805d7 100644
--- a/src/emu/machine/ds1302.c
+++ b/src/emu/machine/ds1302.c
@@ -27,7 +27,7 @@
#define LOG 0
-#define RAM_SIZE 0x1f // 31 bytes
+#define RAM_SIZE 0x1f // 31 bytes
enum
@@ -51,13 +51,13 @@ enum
};
-#define COMMAND_READ (m_cmd & 0x01)
-#define COMMAND_RAM (m_cmd & 0x40)
-#define COMMAND_VALID (m_cmd & 0x80)
-#define COMMAND_BURST (((m_cmd >> 1) & 0x1f) == 0x1f)
-#define CLOCK_HALT (m_reg[REGISTER_SECONDS] & 0x80)
-#define WRITE_PROTECT (m_reg[REGISTER_CONTROL] & 0x80)
-#define BURST_END (COMMAND_RAM ? 0x1f : 0x09)
+#define COMMAND_READ (m_cmd & 0x01)
+#define COMMAND_RAM (m_cmd & 0x40)
+#define COMMAND_VALID (m_cmd & 0x80)
+#define COMMAND_BURST (((m_cmd >> 1) & 0x1f) == 0x1f)
+#define CLOCK_HALT (m_reg[REGISTER_SECONDS] & 0x80)
+#define WRITE_PROTECT (m_reg[REGISTER_CONTROL] & 0x80)
+#define BURST_END (COMMAND_RAM ? 0x1f : 0x09)
@@ -74,9 +74,9 @@ const device_type DS1302 = &device_creator<ds1302_device>;
//-------------------------------------------------
ds1302_device::ds1302_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, DS1302, "Dallas DS1302", tag, owner, clock),
- device_rtc_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this)
+ : device_t(mconfig, DS1302, "Dallas DS1302", tag, owner, clock),
+ device_rtc_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this)
{
}
diff --git a/src/emu/machine/ds1302.h b/src/emu/machine/ds1302.h
index 7cbcfb06ef1..8103c0e4fb7 100644
--- a/src/emu/machine/ds1302.h
+++ b/src/emu/machine/ds1302.h
@@ -39,53 +39,53 @@
// ======================> ds1302_device
class ds1302_device : public device_t,
- public device_rtc_interface,
- public device_nvram_interface
+ public device_rtc_interface,
+ public device_nvram_interface
{
public:
- // construction/destruction
- ds1302_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ds1302_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_WRITE_LINE_MEMBER( ce_w );
- DECLARE_WRITE_LINE_MEMBER( sclk_w );
- DECLARE_WRITE_LINE_MEMBER( io_w );
- DECLARE_READ_LINE_MEMBER( io_r );
+ DECLARE_WRITE_LINE_MEMBER( ce_w );
+ DECLARE_WRITE_LINE_MEMBER( sclk_w );
+ DECLARE_WRITE_LINE_MEMBER( io_w );
+ DECLARE_READ_LINE_MEMBER( io_r );
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
- // device_nvram_interface overrides
- virtual void nvram_default();
- virtual void nvram_read(emu_file &file);
- virtual void nvram_write(emu_file &file);
+ // device_nvram_interface overrides
+ virtual void nvram_default();
+ virtual void nvram_read(emu_file &file);
+ virtual void nvram_write(emu_file &file);
- // device_rtc_interface overrides
- virtual void rtc_clock_updated(int year, int month, int day, int day_of_week, int hour, int minute, int second);
- virtual bool rtc_feature_leap_year() { return true; }
+ // device_rtc_interface overrides
+ virtual void rtc_clock_updated(int year, int month, int day, int day_of_week, int hour, int minute, int second);
+ virtual bool rtc_feature_leap_year() { return true; }
private:
- void load_shift_register();
- void input_bit();
- void output_bit();
-
- int m_ce;
- int m_clk;
- int m_io;
- int m_state;
- int m_bits;
- UINT8 m_cmd;
- UINT8 m_data;
- int m_addr;
-
- UINT8 m_reg[9];
- UINT8 m_user[9];
+ void load_shift_register();
+ void input_bit();
+ void output_bit();
+
+ int m_ce;
+ int m_clk;
+ int m_io;
+ int m_state;
+ int m_bits;
+ UINT8 m_cmd;
+ UINT8 m_data;
+ int m_addr;
+
+ UINT8 m_reg[9];
+ UINT8 m_user[9];
UINT8 m_ram[0x20];
- // timers
- emu_timer *m_clock_timer;
+ // timers
+ emu_timer *m_clock_timer;
};
diff --git a/src/emu/machine/ds2401.c b/src/emu/machine/ds2401.c
index f0e9e5ce33c..1e469527940 100644
--- a/src/emu/machine/ds2401.c
+++ b/src/emu/machine/ds2401.c
@@ -65,9 +65,9 @@ void ds2401_device::device_reset()
// Ensure the size is correct though
if(m_region->bytes() != SIZE_DATA)
logerror("ds2401 %s: Wrong region length for id data, expected 0x%x, got 0x%x\n",
- tag(),
- SIZE_DATA,
- m_region->bytes());
+ tag(),
+ SIZE_DATA,
+ m_region->bytes());
else {
UINT8 *rb = m_region->base();
memcpy(data, rb, SIZE_DATA);
diff --git a/src/emu/machine/ds2404.c b/src/emu/machine/ds2404.c
index 06bc379c24d..1d4208d247e 100644
--- a/src/emu/machine/ds2404.c
+++ b/src/emu/machine/ds2404.c
@@ -23,8 +23,8 @@ const device_type DS2404 = &device_creator<ds2404_device>;
//-------------------------------------------------
ds2404_device::ds2404_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, DS2404, "DS2404", tag, owner, clock),
- device_nvram_interface(mconfig, *this)
+ : device_t(mconfig, DS2404, "DS2404", tag, owner, clock),
+ device_nvram_interface(mconfig, *this)
{
}
@@ -99,7 +99,7 @@ void ds2404_device::ds2404_rom_cmd(UINT8 cmd)
{
switch(cmd)
{
- case 0xcc: /* Skip ROM */
+ case 0xcc: /* Skip ROM */
m_state[0] = DS2404_STATE_COMMAND;
m_state_ptr = 0;
break;
@@ -114,7 +114,7 @@ void ds2404_device::ds2404_cmd(UINT8 cmd)
{
switch(cmd)
{
- case 0x0f: /* Write scratchpad */
+ case 0x0f: /* Write scratchpad */
m_state[0] = DS2404_STATE_ADDRESS1;
m_state[1] = DS2404_STATE_ADDRESS2;
m_state[2] = DS2404_STATE_INIT_COMMAND;
@@ -122,7 +122,7 @@ void ds2404_device::ds2404_cmd(UINT8 cmd)
m_state_ptr = 0;
break;
- case 0x55: /* Copy scratchpad */
+ case 0x55: /* Copy scratchpad */
m_state[0] = DS2404_STATE_ADDRESS1;
m_state[1] = DS2404_STATE_ADDRESS2;
m_state[2] = DS2404_STATE_OFFSET;
@@ -131,7 +131,7 @@ void ds2404_device::ds2404_cmd(UINT8 cmd)
m_state_ptr = 0;
break;
- case 0xf0: /* Read memory */
+ case 0xf0: /* Read memory */
m_state[0] = DS2404_STATE_ADDRESS1;
m_state[1] = DS2404_STATE_ADDRESS2;
m_state[2] = DS2404_STATE_INIT_COMMAND;
diff --git a/src/emu/machine/ds2404.h b/src/emu/machine/ds2404.h
index d13759f4bcf..154d818a005 100644
--- a/src/emu/machine/ds2404.h
+++ b/src/emu/machine/ds2404.h
@@ -43,11 +43,11 @@
// ======================> ds2404_device
class ds2404_device : public device_t,
- public device_nvram_interface
+ public device_nvram_interface
{
public:
- // construction/destruction
- ds2404_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ds2404_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// inline configuration helpers
static void static_set_ref_year(device_t &device, UINT32 m_ref_year);
@@ -67,11 +67,11 @@ public:
void ds2404_tick();
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset() { }
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset() { }
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
// device_nvram_interface overrides
virtual void nvram_default();
@@ -90,31 +90,31 @@ private:
enum DS2404_STATE
{
- DS2404_STATE_IDLE = 1, /* waiting for ROM command, in 1-wire mode */
- DS2404_STATE_COMMAND, /* waiting for memory command */
- DS2404_STATE_ADDRESS1, /* waiting for address bits 0-7 */
- DS2404_STATE_ADDRESS2, /* waiting for address bits 8-15 */
- DS2404_STATE_OFFSET, /* waiting for ending offset */
+ DS2404_STATE_IDLE = 1, /* waiting for ROM command, in 1-wire mode */
+ DS2404_STATE_COMMAND, /* waiting for memory command */
+ DS2404_STATE_ADDRESS1, /* waiting for address bits 0-7 */
+ DS2404_STATE_ADDRESS2, /* waiting for address bits 8-15 */
+ DS2404_STATE_OFFSET, /* waiting for ending offset */
DS2404_STATE_INIT_COMMAND,
- DS2404_STATE_READ_MEMORY, /* Read Memory command active */
- DS2404_STATE_WRITE_SCRATCHPAD, /* Write Scratchpad command active */
- DS2404_STATE_READ_SCRATCHPAD, /* Read Scratchpad command active */
- DS2404_STATE_COPY_SCRATCHPAD /* Copy Scratchpad command active */
+ DS2404_STATE_READ_MEMORY, /* Read Memory command active */
+ DS2404_STATE_WRITE_SCRATCHPAD, /* Write Scratchpad command active */
+ DS2404_STATE_READ_SCRATCHPAD, /* Read Scratchpad command active */
+ DS2404_STATE_COPY_SCRATCHPAD /* Copy Scratchpad command active */
};
- // configuration state
- UINT32 m_ref_year;
- UINT8 m_ref_month;
- UINT8 m_ref_day;
+ // configuration state
+ UINT32 m_ref_year;
+ UINT8 m_ref_month;
+ UINT8 m_ref_day;
UINT16 m_address;
UINT16 m_offset;
UINT16 m_end_offset;
UINT8 m_a1;
UINT8 m_a2;
- UINT8 m_sram[512]; /* 4096 bits */
- UINT8 m_ram[32]; /* scratchpad ram, 256 bits */
- UINT8 m_rtc[5]; /* 40-bit RTC counter */
+ UINT8 m_sram[512]; /* 4096 bits */
+ UINT8 m_ram[32]; /* scratchpad ram, 256 bits */
+ UINT8 m_rtc[5]; /* 40-bit RTC counter */
DS2404_STATE m_state[8];
int m_state_ptr;
};
diff --git a/src/emu/machine/ds75160a.c b/src/emu/machine/ds75160a.c
index a936d2e9a32..f265316678a 100644
--- a/src/emu/machine/ds75160a.c
+++ b/src/emu/machine/ds75160a.c
@@ -28,10 +28,10 @@ const device_type DS75160A = &device_creator<ds75160a_device>;
//-------------------------------------------------
ds75160a_device::ds75160a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, DS75160A, "DS75160A", tag, owner, clock),
- m_data(0xff),
- m_te(0),
- m_pe(0)
+ : device_t(mconfig, DS75160A, "DS75160A", tag, owner, clock),
+ m_data(0xff),
+ m_te(0),
+ m_pe(0)
{
}
diff --git a/src/emu/machine/ds75160a.h b/src/emu/machine/ds75160a.h
index b274eed7965..eb246ab02dc 100644
--- a/src/emu/machine/ds75160a.h
+++ b/src/emu/machine/ds75160a.h
@@ -34,7 +34,7 @@
///*************************************************************************
#define MCFG_DS75160A_ADD(_tag, _config) \
- MCFG_DEVICE_ADD(_tag, DS75160A, 0) \
+ MCFG_DEVICE_ADD(_tag, DS75160A, 0) \
MCFG_DEVICE_CONFIG(_config)
@@ -51,34 +51,34 @@
struct ds75160a_interface
{
- devcb_read8 m_in_bus_cb;
- devcb_write8 m_out_bus_cb;
+ devcb_read8 m_in_bus_cb;
+ devcb_write8 m_out_bus_cb;
};
// ======================> ds75160a_device
-class ds75160a_device : public device_t,
- public ds75160a_interface
+class ds75160a_device : public device_t,
+ public ds75160a_interface
{
public:
- // construction/destruction
- ds75160a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ds75160a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
- DECLARE_WRITE_LINE_MEMBER( te_w );
- DECLARE_WRITE_LINE_MEMBER( pe_w );
+ DECLARE_WRITE_LINE_MEMBER( te_w );
+ DECLARE_WRITE_LINE_MEMBER( pe_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
private:
- devcb_resolved_read8 m_in_bus_func;
- devcb_resolved_write8 m_out_bus_func;
+ devcb_resolved_read8 m_in_bus_func;
+ devcb_resolved_write8 m_out_bus_func;
UINT8 m_data;
diff --git a/src/emu/machine/ds75161a.c b/src/emu/machine/ds75161a.c
index faa574b7c91..72fadb57677 100644
--- a/src/emu/machine/ds75161a.c
+++ b/src/emu/machine/ds75161a.c
@@ -28,17 +28,17 @@ const device_type DS75161A = &device_creator<ds75161a_device>;
//-------------------------------------------------
ds75161a_device::ds75161a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, DS75161A, "DS75161A", tag, owner, clock),
- m_ren(1),
- m_ifc(1),
- m_ndac(1),
- m_nrfd(1),
- m_dav(1),
- m_eoi(1),
- m_atn(1),
- m_srq(1),
- m_te(0),
- m_dc(0)
+ : device_t(mconfig, DS75161A, "DS75161A", tag, owner, clock),
+ m_ren(1),
+ m_ifc(1),
+ m_ndac(1),
+ m_nrfd(1),
+ m_dav(1),
+ m_eoi(1),
+ m_atn(1),
+ m_srq(1),
+ m_te(0),
+ m_dc(0)
{
}
diff --git a/src/emu/machine/ds75161a.h b/src/emu/machine/ds75161a.h
index 78c37b6f51d..4bd65aceff9 100644
--- a/src/emu/machine/ds75161a.h
+++ b/src/emu/machine/ds75161a.h
@@ -34,7 +34,7 @@
///*************************************************************************
#define MCFG_DS75161A_ADD(_tag, _config) \
- MCFG_DEVICE_ADD(_tag, DS75161A, 0) \
+ MCFG_DEVICE_ADD(_tag, DS75161A, 0) \
MCFG_DEVICE_CONFIG(_config)
@@ -51,81 +51,81 @@
struct ds75161a_interface
{
- devcb_read_line m_in_ren_cb;
- devcb_read_line m_in_ifc_cb;
- devcb_read_line m_in_ndac_cb;
- devcb_read_line m_in_nrfd_cb;
- devcb_read_line m_in_dav_cb;
- devcb_read_line m_in_eoi_cb;
- devcb_read_line m_in_atn_cb;
- devcb_read_line m_in_srq_cb;
-
- devcb_write_line m_out_ren_cb;
- devcb_write_line m_out_ifc_cb;
- devcb_write_line m_out_ndac_cb;
- devcb_write_line m_out_nrfd_cb;
- devcb_write_line m_out_dav_cb;
- devcb_write_line m_out_eoi_cb;
- devcb_write_line m_out_atn_cb;
- devcb_write_line m_out_srq_cb;
+ devcb_read_line m_in_ren_cb;
+ devcb_read_line m_in_ifc_cb;
+ devcb_read_line m_in_ndac_cb;
+ devcb_read_line m_in_nrfd_cb;
+ devcb_read_line m_in_dav_cb;
+ devcb_read_line m_in_eoi_cb;
+ devcb_read_line m_in_atn_cb;
+ devcb_read_line m_in_srq_cb;
+
+ devcb_write_line m_out_ren_cb;
+ devcb_write_line m_out_ifc_cb;
+ devcb_write_line m_out_ndac_cb;
+ devcb_write_line m_out_nrfd_cb;
+ devcb_write_line m_out_dav_cb;
+ devcb_write_line m_out_eoi_cb;
+ devcb_write_line m_out_atn_cb;
+ devcb_write_line m_out_srq_cb;
};
// ======================> ds75161a_device
-class ds75161a_device : public device_t,
- public ds75161a_interface
+class ds75161a_device : public device_t,
+ public ds75161a_interface
{
public:
- // construction/destruction
- ds75161a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
-
- DECLARE_WRITE_LINE_MEMBER( te_w );
- DECLARE_WRITE_LINE_MEMBER( dc_w );
-
- DECLARE_READ_LINE_MEMBER( ren_r );
- DECLARE_READ_LINE_MEMBER( ifc_r );
- DECLARE_READ_LINE_MEMBER( ndac_r );
- DECLARE_READ_LINE_MEMBER( nrfd_r );
- DECLARE_READ_LINE_MEMBER( dav_r );
- DECLARE_READ_LINE_MEMBER( eoi_r );
- DECLARE_READ_LINE_MEMBER( atn_r );
- DECLARE_READ_LINE_MEMBER( srq_r );
-
- DECLARE_WRITE_LINE_MEMBER( ren_w );
- DECLARE_WRITE_LINE_MEMBER( ifc_w );
- DECLARE_WRITE_LINE_MEMBER( ndac_w );
- DECLARE_WRITE_LINE_MEMBER( nrfd_w );
- DECLARE_WRITE_LINE_MEMBER( dav_w );
- DECLARE_WRITE_LINE_MEMBER( eoi_w );
- DECLARE_WRITE_LINE_MEMBER( atn_w );
- DECLARE_WRITE_LINE_MEMBER( srq_w );
+ // construction/destruction
+ ds75161a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ DECLARE_WRITE_LINE_MEMBER( te_w );
+ DECLARE_WRITE_LINE_MEMBER( dc_w );
+
+ DECLARE_READ_LINE_MEMBER( ren_r );
+ DECLARE_READ_LINE_MEMBER( ifc_r );
+ DECLARE_READ_LINE_MEMBER( ndac_r );
+ DECLARE_READ_LINE_MEMBER( nrfd_r );
+ DECLARE_READ_LINE_MEMBER( dav_r );
+ DECLARE_READ_LINE_MEMBER( eoi_r );
+ DECLARE_READ_LINE_MEMBER( atn_r );
+ DECLARE_READ_LINE_MEMBER( srq_r );
+
+ DECLARE_WRITE_LINE_MEMBER( ren_w );
+ DECLARE_WRITE_LINE_MEMBER( ifc_w );
+ DECLARE_WRITE_LINE_MEMBER( ndac_w );
+ DECLARE_WRITE_LINE_MEMBER( nrfd_w );
+ DECLARE_WRITE_LINE_MEMBER( dav_w );
+ DECLARE_WRITE_LINE_MEMBER( eoi_w );
+ DECLARE_WRITE_LINE_MEMBER( atn_w );
+ DECLARE_WRITE_LINE_MEMBER( srq_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
private:
void update_signals();
- devcb_resolved_read_line m_in_ren_func;
- devcb_resolved_read_line m_in_ifc_func;
- devcb_resolved_read_line m_in_ndac_func;
- devcb_resolved_read_line m_in_nrfd_func;
- devcb_resolved_read_line m_in_dav_func;
- devcb_resolved_read_line m_in_eoi_func;
- devcb_resolved_read_line m_in_atn_func;
- devcb_resolved_read_line m_in_srq_func;
-
- devcb_resolved_write_line m_out_ren_func;
- devcb_resolved_write_line m_out_ifc_func;
- devcb_resolved_write_line m_out_ndac_func;
- devcb_resolved_write_line m_out_nrfd_func;
- devcb_resolved_write_line m_out_dav_func;
- devcb_resolved_write_line m_out_eoi_func;
- devcb_resolved_write_line m_out_atn_func;
- devcb_resolved_write_line m_out_srq_func;
+ devcb_resolved_read_line m_in_ren_func;
+ devcb_resolved_read_line m_in_ifc_func;
+ devcb_resolved_read_line m_in_ndac_func;
+ devcb_resolved_read_line m_in_nrfd_func;
+ devcb_resolved_read_line m_in_dav_func;
+ devcb_resolved_read_line m_in_eoi_func;
+ devcb_resolved_read_line m_in_atn_func;
+ devcb_resolved_read_line m_in_srq_func;
+
+ devcb_resolved_write_line m_out_ren_func;
+ devcb_resolved_write_line m_out_ifc_func;
+ devcb_resolved_write_line m_out_ndac_func;
+ devcb_resolved_write_line m_out_nrfd_func;
+ devcb_resolved_write_line m_out_dav_func;
+ devcb_resolved_write_line m_out_eoi_func;
+ devcb_resolved_write_line m_out_atn_func;
+ devcb_resolved_write_line m_out_srq_func;
int m_ren;
int m_ifc;
diff --git a/src/emu/machine/e0516.c b/src/emu/machine/e0516.c
index cff343504c1..1416314cac3 100644
--- a/src/emu/machine/e0516.c
+++ b/src/emu/machine/e0516.c
@@ -40,8 +40,8 @@ const device_type E0516 = &device_creator<e0516_device>;
//-------------------------------------------------
e0516_device::e0516_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, E0516, "E05-16", tag, owner, clock),
- device_rtc_interface(mconfig, *this)
+ : device_t(mconfig, E0516, "E05-16", tag, owner, clock),
+ device_rtc_interface(mconfig, *this)
{
}
diff --git a/src/emu/machine/e0516.h b/src/emu/machine/e0516.h
index 02424f63cb3..e049659062f 100644
--- a/src/emu/machine/e0516.h
+++ b/src/emu/machine/e0516.h
@@ -43,11 +43,11 @@
// ======================> e0516_device
class e0516_device : public device_t,
- public device_rtc_interface
+ public device_rtc_interface
{
public:
- // construction/destruction
- e0516_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ e0516_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE_LINE_MEMBER( cs_w );
DECLARE_WRITE_LINE_MEMBER( clk_w );
@@ -55,20 +55,20 @@ public:
DECLARE_READ_LINE_MEMBER( dio_r );
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
- int m_cs; // chip select
- int m_clk; // clock
- int m_data_latch; // data latch
- int m_reg_latch; // register latch
- int m_read_write; // read/write data
- int m_state; // state
- int m_bits; // number of bits transferred
- int m_dio; // data pin
+ int m_cs; // chip select
+ int m_clk; // clock
+ int m_data_latch; // data latch
+ int m_reg_latch; // register latch
+ int m_read_write; // read/write data
+ int m_state; // state
+ int m_bits; // number of bits transferred
+ int m_dio; // data pin
// timers
emu_timer *m_timer;
diff --git a/src/emu/machine/eeprom.c b/src/emu/machine/eeprom.c
index ef0b3638413..067f33bf7ca 100644
--- a/src/emu/machine/eeprom.c
+++ b/src/emu/machine/eeprom.c
@@ -29,45 +29,45 @@ const device_type EEPROM = &device_creator<eeprom_device>;
const eeprom_interface eeprom_interface_93C46 =
{
- 6, // address bits 6
- 16, // data bits 16
- "*110", // read 1 10 aaaaaa
- "*101", // write 1 01 aaaaaa dddddddddddddddd
- "*111", // erase 1 11 aaaaaa
- "*10000xxxx", // lock 1 00 00xxxx
- "*10011xxxx", // unlock 1 00 11xxxx
- 1, // enable_multi_read
- 0 // reset_delay
+ 6, // address bits 6
+ 16, // data bits 16
+ "*110", // read 1 10 aaaaaa
+ "*101", // write 1 01 aaaaaa dddddddddddddddd
+ "*111", // erase 1 11 aaaaaa
+ "*10000xxxx", // lock 1 00 00xxxx
+ "*10011xxxx", // unlock 1 00 11xxxx
+ 1, // enable_multi_read
+ 0 // reset_delay
// "*10001xxxx" // write all 1 00 01xxxx dddddddddddddddd
// "*10010xxxx" // erase all 1 00 10xxxx
};
const eeprom_interface eeprom_interface_93C46_8bit =
{
- 7, // address bits 7
- 8, // data bits 8
- "*110", // read 1 10 aaaaaa
- "*101", // write 1 01 aaaaaa dddddddd
- "*111", // erase 1 11 aaaaaa
- "*10000xxxx", // lock 1 00 00xxxx
- "*10011xxxx", // unlock 1 00 11xxxx
- 1, // enable_multi_read
- 0 // reset_delay
+ 7, // address bits 7
+ 8, // data bits 8
+ "*110", // read 1 10 aaaaaa
+ "*101", // write 1 01 aaaaaa dddddddd
+ "*111", // erase 1 11 aaaaaa
+ "*10000xxxx", // lock 1 00 00xxxx
+ "*10011xxxx", // unlock 1 00 11xxxx
+ 1, // enable_multi_read
+ 0 // reset_delay
// "*10001xxxx" // write all 1 00 01xxxx dddddddd
// "*10010xxxx" // erase all 1 00 10xxxx
};
const eeprom_interface eeprom_interface_93C66B =
{
- 8, // address bits
- 16, // data bits
- "*110", // read command
- "*101", // write command
- "*111", // erase command
- "*10000xxxxxx", // lock command
+ 8, // address bits
+ 16, // data bits
+ "*110", // read command
+ "*101", // write command
+ "*111", // erase command
+ "*10000xxxxxx", // lock command
"*10011xxxxxx", // unlock command
- 1, // enable_multi_read
- 0 // reset_delay
+ 1, // enable_multi_read
+ 0 // reset_delay
// "*10001xxxxxx", // write all
// "*10010xxxxxx", // erase all
};
@@ -94,20 +94,20 @@ ADDRESS_MAP_END
eeprom_device::eeprom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, EEPROM, "EEPROM", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_default_data_size(0),
- m_default_value(0),
- m_serial_count(0),
- m_data_buffer(0),
- m_read_address(0),
- m_clock_count(0),
- m_latch(0),
- m_reset_line(CLEAR_LINE),
- m_clock_line(CLEAR_LINE),
- m_sending(0),
- m_locked(false),
- m_reset_counter(0)
+ device_memory_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_default_data_size(0),
+ m_default_value(0),
+ m_serial_count(0),
+ m_data_buffer(0),
+ m_read_address(0),
+ m_clock_count(0),
+ m_latch(0),
+ m_reset_line(CLEAR_LINE),
+ m_clock_line(CLEAR_LINE),
+ m_sending(0),
+ m_locked(false),
+ m_reset_counter(0)
{
m_default_data.u8 = NULL;
memset(downcast<eeprom_interface *>(this), 0, sizeof(eeprom_interface));
@@ -356,7 +356,7 @@ WRITE_LINE_MEMBER( eeprom_device::set_cs_line )
m_serial_count = 0;
m_sending = 0;
- m_reset_counter = m_reset_delay; /* delay a little before returning setting data to 1 (needed by wbeachvl) */
+ m_reset_counter = m_reset_delay; /* delay a little before returning setting data to 1 (needed by wbeachvl) */
}
}
@@ -409,10 +409,10 @@ void eeprom_device::write(int bit)
}
m_serial_buffer[m_serial_count++] = (bit ? '1' : '0');
- m_serial_buffer[m_serial_count] = 0; /* nul terminate so we can treat it as a string */
+ m_serial_buffer[m_serial_count] = 0; /* nul terminate so we can treat it as a string */
if ( (m_serial_count > m_address_bits) &&
- command_match((char*)(m_serial_buffer),m_cmd_read,strlen((char*)(m_serial_buffer))-m_address_bits) )
+ command_match((char*)(m_serial_buffer),m_cmd_read,strlen((char*)(m_serial_buffer))-m_address_bits) )
{
int i,address;
@@ -433,7 +433,7 @@ void eeprom_device::write(int bit)
logerror("EEPROM %s read %04x from address %02x\n", tag(), m_data_buffer,address);
}
else if ( (m_serial_count > m_address_bits) &&
- command_match((char*)(m_serial_buffer),m_cmd_erase,strlen((char*)(m_serial_buffer))-m_address_bits) )
+ command_match((char*)(m_serial_buffer),m_cmd_erase,strlen((char*)(m_serial_buffer))-m_address_bits) )
{
int i,address;
@@ -456,7 +456,7 @@ void eeprom_device::write(int bit)
m_serial_count = 0;
}
else if ( (m_serial_count > (m_address_bits + m_data_bits)) &&
- command_match((char*)(m_serial_buffer),m_cmd_write,strlen((char*)(m_serial_buffer))-(m_address_bits + m_data_bits)) )
+ command_match((char*)(m_serial_buffer),m_cmd_write,strlen((char*)(m_serial_buffer))-(m_address_bits + m_data_bits)) )
{
int i,address,data;
@@ -517,8 +517,8 @@ void eeprom_device::write(int bit)
*/
bool eeprom_device::command_match(const char *buf, const char *cmd, int len)
{
- if ( cmd == 0 ) return false;
- if ( len == 0 ) return false;
+ if ( cmd == 0 ) return false;
+ if ( len == 0 ) return false;
for (;len>0;)
{
@@ -532,7 +532,7 @@ bool eeprom_device::command_match(const char *buf, const char *cmd, int len)
{
case '0':
case '1':
- if (b != c) return false;
+ if (b != c) return false;
case 'X':
case 'x':
buf++;
@@ -546,10 +546,10 @@ bool eeprom_device::command_match(const char *buf, const char *cmd, int len)
{
case '0':
case '1':
- if (b == c) { cmd++; }
- else { buf++; len--; }
+ if (b == c) { cmd++; }
+ else { buf++; len--; }
break;
- default: return false;
+ default: return false;
}
}
}
diff --git a/src/emu/machine/eeprom.h b/src/emu/machine/eeprom.h
index c7605dec4db..2a915b21921 100644
--- a/src/emu/machine/eeprom.h
+++ b/src/emu/machine/eeprom.h
@@ -47,15 +47,15 @@
struct eeprom_interface
{
- UINT8 m_address_bits; // EEPROM has 2^address_bits cells
- UINT8 m_data_bits; // every cell has this many bits (8 or 16)
- const char *m_cmd_read; // read command string, e.g. "0110"
- const char *m_cmd_write; // write command string, e.g. "0111"
- const char *m_cmd_erase; // erase command string, or 0 if n/a
- const char *m_cmd_lock; // lock command string, or 0 if n/a
- const char *m_cmd_unlock; // unlock command string, or 0 if n/a
- bool m_enable_multi_read; // set to 1 to enable multiple values to be read from one read command
- int m_reset_delay; // number of times eeprom_read_bit() should return 0 after a reset,
+ UINT8 m_address_bits; // EEPROM has 2^address_bits cells
+ UINT8 m_data_bits; // every cell has this many bits (8 or 16)
+ const char *m_cmd_read; // read command string, e.g. "0110"
+ const char *m_cmd_write; // write command string, e.g. "0111"
+ const char *m_cmd_erase; // erase command string, or 0 if n/a
+ const char *m_cmd_lock; // lock command string, or 0 if n/a
+ const char *m_cmd_unlock; // unlock command string, or 0 if n/a
+ bool m_enable_multi_read; // set to 1 to enable multiple values to be read from one read command
+ int m_reset_delay; // number of times eeprom_read_bit() should return 0 after a reset,
// before starting to return 1.
};
@@ -63,7 +63,7 @@ struct eeprom_interface
// ======================> eeprom_device
-class eeprom_device : public device_t,
+class eeprom_device : public device_t,
public device_memory_interface,
public device_nvram_interface,
public eeprom_interface
@@ -105,23 +105,23 @@ protected:
static const int SERIAL_BUFFER_LENGTH = 40;
// configuration state
- address_space_config m_space_config;
- generic_ptr m_default_data;
- int m_default_data_size;
- UINT32 m_default_value;
+ address_space_config m_space_config;
+ generic_ptr m_default_data;
+ int m_default_data_size;
+ UINT32 m_default_value;
// runtime state
- int m_serial_count;
- UINT8 m_serial_buffer[SERIAL_BUFFER_LENGTH];
- int m_data_buffer;
- int m_read_address;
- int m_clock_count;
- int m_latch;
- int m_reset_line;
- int m_clock_line;
- int m_sending;
- int m_locked;
- int m_reset_counter;
+ int m_serial_count;
+ UINT8 m_serial_buffer[SERIAL_BUFFER_LENGTH];
+ int m_data_buffer;
+ int m_read_address;
+ int m_clock_count;
+ int m_latch;
+ int m_reset_line;
+ int m_clock_line;
+ int m_sending;
+ int m_locked;
+ int m_reset_counter;
};
diff --git a/src/emu/machine/er2055.c b/src/emu/machine/er2055.c
index 2cdfdf61c9a..39db037c5fc 100644
--- a/src/emu/machine/er2055.c
+++ b/src/emu/machine/er2055.c
@@ -64,12 +64,12 @@ ADDRESS_MAP_END
er2055_device::er2055_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ER2055, "ER2055", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_space_config("EAROM", ENDIANNESS_BIG, 8, 6, 0, *ADDRESS_MAP_NAME(er2055_map)),
- m_control_state(0),
- m_address(0),
- m_data(0)
+ device_memory_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_space_config("EAROM", ENDIANNESS_BIG, 8, 6, 0, *ADDRESS_MAP_NAME(er2055_map)),
+ m_control_state(0),
+ m_address(0),
+ m_data(0)
{
}
diff --git a/src/emu/machine/er2055.h b/src/emu/machine/er2055.h
index f47b503d57c..e04d9a5face 100644
--- a/src/emu/machine/er2055.h
+++ b/src/emu/machine/er2055.h
@@ -60,7 +60,7 @@
// ======================> er2055_device
-class er2055_device : public device_t,
+class er2055_device : public device_t,
public device_memory_interface,
public device_nvram_interface
{
@@ -97,12 +97,12 @@ protected:
static const UINT8 CS2 = 0x10;
// configuration state
- address_space_config m_space_config;
+ address_space_config m_space_config;
// internal state
- UINT8 m_control_state;
- UINT8 m_address;
- UINT8 m_data;
+ UINT8 m_control_state;
+ UINT8 m_address;
+ UINT8 m_data;
};
diff --git a/src/emu/machine/f3853.c b/src/emu/machine/f3853.c
index 993028d4595..b9313326a8f 100644
--- a/src/emu/machine/f3853.c
+++ b/src/emu/machine/f3853.c
@@ -49,7 +49,7 @@ const device_type F3853 = &device_creator<f3853_device>;
//-------------------------------------------------
f3853_device::f3853_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, F3853, "F3853", tag, owner, clock)
+ : device_t(mconfig, F3853, "F3853", tag, owner, clock)
{
}
@@ -131,8 +131,8 @@ void f3853_device::device_reset()
void f3853_device::f3853_set_interrupt_request_line()
{
- if(!m_interrupt_request)
- {
+ if(!m_interrupt_request)
+ {
return;
}
@@ -166,12 +166,12 @@ TIMER_CALLBACK( f3853_device::f3853_timer_callback )
void f3853_device::f3853_timer()
{
- if(m_timer_enable)
+ if(m_timer_enable)
{
m_request_flipflop = TRUE;
f3853_set_interrupt_request_line();
- }
- f3853_timer_start(0xfe);
+ }
+ f3853_timer_start(0xfe);
}
@@ -182,12 +182,12 @@ void f3853_set_external_interrupt_in_line(device_t *device, int level)
void f3853_device::f3853_set_external_interrupt_in_line(int level)
{
- if(m_external_interrupt_line && !level && m_external_enable)
- {
+ if(m_external_interrupt_line && !level && m_external_enable)
+ {
m_request_flipflop = TRUE;
}
- m_external_interrupt_line = level;
- f3853_set_interrupt_request_line();
+ m_external_interrupt_line = level;
+ f3853_set_interrupt_request_line();
}
@@ -198,31 +198,31 @@ void f3853_set_priority_in_line(device_t *device, int level)
void f3853_device::f3853_set_priority_in_line(int level)
{
- m_priority_line = level;
- f3853_set_interrupt_request_line();
+ m_priority_line = level;
+ f3853_set_interrupt_request_line();
}
READ8_DEVICE_HANDLER_TRAMPOLINE(f3853, f3853_r)
{
- UINT8 data = 0;
+ UINT8 data = 0;
- switch (offset)
+ switch (offset)
{
- case 0:
+ case 0:
data = m_high;
break;
- case 1:
+ case 1:
data = m_low;
break;
- case 2: // Interrupt control; not readable
- case 3: // Timer; not readable
+ case 2: // Interrupt control; not readable
+ case 3: // Timer; not readable
break;
- }
+ }
- return data;
+ return data;
}
diff --git a/src/emu/machine/f3853.h b/src/emu/machine/f3853.h
index cec1fbb48e2..86f8856ec62 100644
--- a/src/emu/machine/f3853.h
+++ b/src/emu/machine/f3853.h
@@ -60,18 +60,18 @@
struct f3853_interface
{
- void (*m_interrupt_request)(device_t *device, UINT16 addr, int level);
+ void (*m_interrupt_request)(device_t *device, UINT16 addr, int level);
};
// ======================> f3853_device
class f3853_device : public device_t,
- public f3853_interface
+ public f3853_interface
{
public:
- // construction/destruction
- f3853_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ f3853_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
UINT8 f3853_r(UINT32 offset);
void f3853_w(UINT32 offset, UINT8 data);
@@ -80,12 +80,12 @@ public:
void f3853_set_priority_in_line(int level);
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
static TIMER_CALLBACK( f3853_timer_callback );
@@ -95,17 +95,17 @@ private:
void f3853_timer_start(UINT8 value);
void f3853_timer();
- UINT8 m_high;
- UINT8 m_low; // Bit 7 is set to 0 for timer interrupts, 1 for external interrupts
- INT32 m_external_enable;
- INT32 m_timer_enable;
+ UINT8 m_high;
+ UINT8 m_low; // Bit 7 is set to 0 for timer interrupts, 1 for external interrupts
+ INT32 m_external_enable;
+ INT32 m_timer_enable;
- INT32 m_request_flipflop;
+ INT32 m_request_flipflop;
- INT32 m_priority_line; /* inverted level*/
- INT32 m_external_interrupt_line; /* inverted level */
+ INT32 m_priority_line; /* inverted level*/
+ INT32 m_external_interrupt_line; /* inverted level */
- emu_timer *m_timer;
+ emu_timer *m_timer;
UINT8 m_value_to_cycle[0x100];
};
diff --git a/src/emu/machine/generic.c b/src/emu/machine/generic.c
index 38eb23d55a4..7a0fbeb7d1f 100644
--- a/src/emu/machine/generic.c
+++ b/src/emu/machine/generic.c
@@ -31,13 +31,13 @@ static void counters_save(running_machine &machine, int config_type, xml_data_no
struct generic_machine_private
{
/* tickets and coin counters */
- UINT32 dispensed_tickets;
- UINT32 coin_count[COIN_COUNTERS];
- UINT32 coinlockedout[COIN_COUNTERS];
- UINT32 lastcoin[COIN_COUNTERS];
+ UINT32 dispensed_tickets;
+ UINT32 coin_count[COIN_COUNTERS];
+ UINT32 coinlockedout[COIN_COUNTERS];
+ UINT32 lastcoin[COIN_COUNTERS];
/* memory card status */
- int memcard_inserted;
+ int memcard_inserted;
};
diff --git a/src/emu/machine/generic.h b/src/emu/machine/generic.h
index 70f0251ab67..6ff15ceb215 100644
--- a/src/emu/machine/generic.h
+++ b/src/emu/machine/generic.h
@@ -21,12 +21,12 @@
***************************************************************************/
/* total # of coin counters */
-#define COIN_COUNTERS 8
+#define COIN_COUNTERS 8
/* memory card actions */
-#define MEMCARD_CREATE 0
-#define MEMCARD_INSERT 1
-#define MEMCARD_EJECT 2
+#define MEMCARD_CREATE 0
+#define MEMCARD_INSERT 1
+#define MEMCARD_EJECT 2
@@ -145,4 +145,4 @@ INTERRUPT_GEN( irq7_line_hold );
INTERRUPT_GEN( irq7_line_pulse );
INTERRUPT_GEN( irq7_line_assert );
-#endif /* __MACHINE_GENERIC_H__ */
+#endif /* __MACHINE_GENERIC_H__ */
diff --git a/src/emu/machine/i2cmem.c b/src/emu/machine/i2cmem.c
index 4fe535c5bbf..02a8c400e07 100644
--- a/src/emu/machine/i2cmem.c
+++ b/src/emu/machine/i2cmem.c
@@ -74,8 +74,8 @@ ADDRESS_MAP_END
i2cmem_device::i2cmem_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
: device_t(mconfig, I2CMEM, "I2CMEM", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
m_scl( 0 ),
m_sdaw( 0 ),
m_e0( 0 ),
diff --git a/src/emu/machine/i2cmem.h b/src/emu/machine/i2cmem.h
index 6d4496e3ff9..a781dc6d9f9 100644
--- a/src/emu/machine/i2cmem.h
+++ b/src/emu/machine/i2cmem.h
@@ -121,4 +121,4 @@ WRITE_LINE_DEVICE_HANDLER( i2cmem_scl_write );
WRITE_LINE_DEVICE_HANDLER( i2cmem_wc_write );
READ_LINE_DEVICE_HANDLER( i2cmem_sda_read );
-#endif /* __I2CMEM_H__ */
+#endif /* __I2CMEM_H__ */
diff --git a/src/emu/machine/i8155.c b/src/emu/machine/i8155.c
index 98d62844dd3..ff05fa0e950 100644
--- a/src/emu/machine/i8155.c
+++ b/src/emu/machine/i8155.c
@@ -53,8 +53,8 @@ enum
{
PORT_MODE_INPUT = 0,
PORT_MODE_OUTPUT,
- PORT_MODE_STROBED_PORT_A, // not supported
- PORT_MODE_STROBED // not supported
+ PORT_MODE_STROBED_PORT_A, // not supported
+ PORT_MODE_STROBED // not supported
};
enum
@@ -63,34 +63,34 @@ enum
IO
};
-#define COMMAND_PA 0x01
-#define COMMAND_PB 0x02
-#define COMMAND_PC_MASK 0x0c
-#define COMMAND_PC_ALT_1 0x00
-#define COMMAND_PC_ALT_2 0x0c
-#define COMMAND_PC_ALT_3 0x04 // not supported
-#define COMMAND_PC_ALT_4 0x08 // not supported
-#define COMMAND_IEA 0x10 // not supported
-#define COMMAND_IEB 0x20 // not supported
-#define COMMAND_TM_MASK 0xc0
-#define COMMAND_TM_NOP 0x00
-#define COMMAND_TM_STOP 0x40
-#define COMMAND_TM_STOP_AFTER_TC 0x80
-#define COMMAND_TM_START 0xc0
-
-#define STATUS_INTR_A 0x01 // not supported
-#define STATUS_A_BF 0x02 // not supported
-#define STATUS_INTE_A 0x04 // not supported
-#define STATUS_INTR_B 0x08 // not supported
-#define STATUS_B_BF 0x10 // not supported
-#define STATUS_INTE_B 0x20 // not supported
-#define STATUS_TIMER 0x40
-
-#define TIMER_MODE_MASK 0xc0
-#define TIMER_MODE_LOW 0x00
-#define TIMER_MODE_SQUARE_WAVE 0x40
-#define TIMER_MODE_SINGLE_PULSE 0x80
-#define TIMER_MODE_AUTOMATIC_RELOAD 0xc0
+#define COMMAND_PA 0x01
+#define COMMAND_PB 0x02
+#define COMMAND_PC_MASK 0x0c
+#define COMMAND_PC_ALT_1 0x00
+#define COMMAND_PC_ALT_2 0x0c
+#define COMMAND_PC_ALT_3 0x04 // not supported
+#define COMMAND_PC_ALT_4 0x08 // not supported
+#define COMMAND_IEA 0x10 // not supported
+#define COMMAND_IEB 0x20 // not supported
+#define COMMAND_TM_MASK 0xc0
+#define COMMAND_TM_NOP 0x00
+#define COMMAND_TM_STOP 0x40
+#define COMMAND_TM_STOP_AFTER_TC 0x80
+#define COMMAND_TM_START 0xc0
+
+#define STATUS_INTR_A 0x01 // not supported
+#define STATUS_A_BF 0x02 // not supported
+#define STATUS_INTE_A 0x04 // not supported
+#define STATUS_INTR_B 0x08 // not supported
+#define STATUS_B_BF 0x10 // not supported
+#define STATUS_INTE_B 0x20 // not supported
+#define STATUS_TIMER 0x40
+
+#define TIMER_MODE_MASK 0xc0
+#define TIMER_MODE_LOW 0x00
+#define TIMER_MODE_SQUARE_WAVE 0x40
+#define TIMER_MODE_SINGLE_PULSE 0x80
+#define TIMER_MODE_AUTOMATIC_RELOAD 0xc0
@@ -144,10 +144,10 @@ inline int i8155_device::get_port_mode(int port)
case PORT_C:
switch (m_command & COMMAND_PC_MASK)
{
- case COMMAND_PC_ALT_1: mode = PORT_MODE_INPUT; break;
- case COMMAND_PC_ALT_2: mode = PORT_MODE_OUTPUT; break;
+ case COMMAND_PC_ALT_1: mode = PORT_MODE_INPUT; break;
+ case COMMAND_PC_ALT_2: mode = PORT_MODE_OUTPUT; break;
case COMMAND_PC_ALT_3: mode = PORT_MODE_STROBED_PORT_A; break;
- case COMMAND_PC_ALT_4: mode = PORT_MODE_STROBED; break;
+ case COMMAND_PC_ALT_4: mode = PORT_MODE_STROBED; break;
}
break;
}
@@ -200,8 +200,8 @@ inline void i8155_device::write_port(int port, UINT8 data)
i8155_device::i8155_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I8155, "Intel 8155", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("ram", ENDIANNESS_LITTLE, 8, 8, 0, NULL, *ADDRESS_MAP_NAME(i8155))
+ device_memory_interface(mconfig, *this),
+ m_space_config("ram", ENDIANNESS_LITTLE, 8, 8, 0, NULL, *ADDRESS_MAP_NAME(i8155))
{
}
diff --git a/src/emu/machine/i8155.h b/src/emu/machine/i8155.h
index e5e3ec798db..402df5e3c36 100644
--- a/src/emu/machine/i8155.h
+++ b/src/emu/machine/i8155.h
@@ -52,12 +52,12 @@
//**************************************************************************
#define MCFG_I8155_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), I8155, _clock) \
+ MCFG_DEVICE_ADD((_tag), I8155, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define MCFG_I8156_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), I8156, _clock) \
+ MCFG_DEVICE_ADD((_tag), I8156, _clock) \
MCFG_DEVICE_CONFIG(_config)
@@ -78,46 +78,46 @@
struct i8155_interface
{
- devcb_read8 in_pa_cb;
- devcb_write8 out_pa_cb;
+ devcb_read8 in_pa_cb;
+ devcb_write8 out_pa_cb;
- devcb_read8 in_pb_cb;
- devcb_write8 out_pb_cb;
+ devcb_read8 in_pb_cb;
+ devcb_write8 out_pb_cb;
- devcb_read8 in_pc_cb;
- devcb_write8 out_pc_cb;
+ devcb_read8 in_pc_cb;
+ devcb_write8 out_pc_cb;
// this gets called for each change of the TIMER OUT pin (pin 6)
- devcb_write_line out_to_cb;
+ devcb_write_line out_to_cb;
};
// ======================> i8155_device
-class i8155_device : public device_t,
+class i8155_device : public device_t,
public device_memory_interface,
public i8155_interface
{
public:
- // construction/destruction
- i8155_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8155_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( io_r );
- DECLARE_WRITE8_MEMBER( io_w );
+ DECLARE_READ8_MEMBER( io_r );
+ DECLARE_WRITE8_MEMBER( io_w );
- DECLARE_READ8_MEMBER( memory_r );
- DECLARE_WRITE8_MEMBER( memory_w );
+ DECLARE_READ8_MEMBER( memory_r );
+ DECLARE_WRITE8_MEMBER( memory_w );
- DECLARE_WRITE8_MEMBER( ale_w );
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_WRITE8_MEMBER( ale_w );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
@@ -132,28 +132,28 @@ protected:
void register_w(int offset, UINT8 data);
private:
- devcb_resolved_read8 m_in_port_func[3];
- devcb_resolved_write8 m_out_port_func[3];
- devcb_resolved_write_line m_out_to_func;
+ devcb_resolved_read8 m_in_port_func[3];
+ devcb_resolved_write8 m_out_port_func[3];
+ devcb_resolved_write_line m_out_to_func;
// CPU interface
- int m_io_m; // I/O or memory select
- UINT8 m_ad; // address
+ int m_io_m; // I/O or memory select
+ UINT8 m_ad; // address
// registers
- UINT8 m_command; // command register
- UINT8 m_status; // status register
- UINT8 m_output[3]; // output latches
+ UINT8 m_command; // command register
+ UINT8 m_status; // status register
+ UINT8 m_output[3]; // output latches
// counter
- UINT16 m_count_length; // count length register
- UINT16 m_counter; // counter register
- int m_to; // timer output
+ UINT16 m_count_length; // count length register
+ UINT16 m_counter; // counter register
+ int m_to; // timer output
// timers
- emu_timer *m_timer; // counter timer
+ emu_timer *m_timer; // counter timer
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
};
diff --git a/src/emu/machine/i8212.c b/src/emu/machine/i8212.c
index 98a480eae6c..fe2f94ebc22 100644
--- a/src/emu/machine/i8212.c
+++ b/src/emu/machine/i8212.c
@@ -32,9 +32,9 @@ const device_type I8212 = &device_creator<i8212_device>;
//-------------------------------------------------
i8212_device::i8212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8212, "Intel 8212", tag, owner, clock),
- m_md(I8212_MODE_INPUT),
- m_stb(0)
+ : device_t(mconfig, I8212, "Intel 8212", tag, owner, clock),
+ m_md(I8212_MODE_INPUT),
+ m_stb(0)
{
}
diff --git a/src/emu/machine/i8212.h b/src/emu/machine/i8212.h
index 3ed32cbbfe9..3242d448b40 100644
--- a/src/emu/machine/i8212.h
+++ b/src/emu/machine/i8212.h
@@ -48,7 +48,7 @@ enum
///*************************************************************************
#define MCFG_I8212_ADD(_tag, _config) \
- MCFG_DEVICE_ADD((_tag), I8212, 0) \
+ MCFG_DEVICE_ADD((_tag), I8212, 0) \
MCFG_DEVICE_CONFIG(_config)
#define I8212_INTERFACE(name) \
@@ -64,42 +64,42 @@ enum
struct i8212_interface
{
- devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_int_cb;
- devcb_read8 m_in_di_cb;
- devcb_write8 m_out_do_cb;
+ devcb_read8 m_in_di_cb;
+ devcb_write8 m_out_do_cb;
};
// ======================> i8212_device
-class i8212_device : public device_t, public i8212_interface
+class i8212_device : public device_t, public i8212_interface
{
public:
- // construction/destruction
- i8212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( data_r );
- DECLARE_WRITE8_MEMBER( data_w );
+ DECLARE_READ8_MEMBER( data_r );
+ DECLARE_WRITE8_MEMBER( data_w );
DECLARE_WRITE_LINE_MEMBER( md_w );
DECLARE_WRITE_LINE_MEMBER( stb_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
private:
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_read8 m_in_di_func;
- devcb_resolved_write8 m_out_do_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_read8 m_in_di_func;
+ devcb_resolved_write8 m_out_do_func;
- int m_md; // mode
- int m_stb; // strobe
- UINT8 m_data; // data latch
+ int m_md; // mode
+ int m_stb; // strobe
+ UINT8 m_data; // data latch
};
diff --git a/src/emu/machine/i8214.c b/src/emu/machine/i8214.c
index c51bea0648b..3d8217f8706 100644
--- a/src/emu/machine/i8214.c
+++ b/src/emu/machine/i8214.c
@@ -90,7 +90,7 @@ inline void i8214_device::check_interrupt()
//-------------------------------------------------
i8214_device::i8214_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8214, "I8214", tag, owner, clock)
+ : device_t(mconfig, I8214, "I8214", tag, owner, clock)
{
}
diff --git a/src/emu/machine/i8214.h b/src/emu/machine/i8214.h
index 29c528c7997..f5fc9bbeaca 100644
--- a/src/emu/machine/i8214.h
+++ b/src/emu/machine/i8214.h
@@ -36,7 +36,7 @@
///*************************************************************************
#define MCFG_I8214_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD(_tag, I8214, _clock) \
+ MCFG_DEVICE_ADD(_tag, I8214, _clock) \
MCFG_DEVICE_CONFIG(_config)
@@ -53,46 +53,46 @@
struct i8214_interface
{
- devcb_write_line m_out_int_cb;
- devcb_write_line m_out_enlg_cb;
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_enlg_cb;
};
// ======================> i8214_device
-class i8214_device : public device_t, public i8214_interface
+class i8214_device : public device_t, public i8214_interface
{
public:
- // construction/destruction
- i8214_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8214_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE_LINE_MEMBER( sgs_w );
DECLARE_WRITE_LINE_MEMBER( etlg_w );
DECLARE_WRITE_LINE_MEMBER( inte_w );
- UINT8 a_r();
+ UINT8 a_r();
void b_w(UINT8 data);
void r_w(UINT8 data);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
private:
inline void trigger_interrupt(int level);
inline void check_interrupt();
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_write_line m_out_enlg_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_enlg_func;
- int m_inte; // interrupt enable
- int m_int_dis; // interrupt disable flip-flop
- int m_a; // request level
- int m_b; // current status register
- UINT8 m_r; // interrupt request latch
- int m_sgs; // status group select
- int m_etlg; // enable this level group
+ int m_inte; // interrupt enable
+ int m_int_dis; // interrupt disable flip-flop
+ int m_a; // request level
+ int m_b; // current status register
+ UINT8 m_r; // interrupt request latch
+ int m_sgs; // status group select
+ int m_etlg; // enable this level group
};
diff --git a/src/emu/machine/i8243.c b/src/emu/machine/i8243.c
index 80c265b5a90..6ad42c8ea71 100644
--- a/src/emu/machine/i8243.c
+++ b/src/emu/machine/i8243.c
@@ -23,9 +23,9 @@ const device_type I8243 = &device_creator<i8243_device>;
//-------------------------------------------------
i8243_device::i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8243, "I8243", tag, owner, clock),
- m_readhandler(*this),
- m_writehandler(*this)
+ : device_t(mconfig, I8243, "I8243", tag, owner, clock),
+ m_readhandler(*this),
+ m_writehandler(*this)
{
}
diff --git a/src/emu/machine/i8243.h b/src/emu/machine/i8243.h
index a8f30cd0806..f83460a54c7 100644
--- a/src/emu/machine/i8243.h
+++ b/src/emu/machine/i8243.h
@@ -43,8 +43,8 @@
class i8243_device : public device_t
{
public:
- // construction/destruction
- i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8243_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration helpers
template<class _Object> static devcb2_base &set_read_handler(device_t &device, _Object object) { return downcast<i8243_device &>(device).m_readhandler.set_callback(object); }
@@ -56,22 +56,22 @@ public:
DECLARE_WRITE8_MEMBER(i8243_prog_w);
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
private:
- UINT8 m_p[4]; /* 4 ports' worth of data */
- UINT8 m_p2out; /* port 2 bits that will be returned */
- UINT8 m_p2; /* most recent port 2 value */
- UINT8 m_opcode; /* latched opcode */
- UINT8 m_prog; /* previous PROG state */
+ UINT8 m_p[4]; /* 4 ports' worth of data */
+ UINT8 m_p2out; /* port 2 bits that will be returned */
+ UINT8 m_p2; /* most recent port 2 value */
+ UINT8 m_opcode; /* latched opcode */
+ UINT8 m_prog; /* previous PROG state */
- devcb2_read8 m_readhandler;
- devcb2_write8 m_writehandler;
+ devcb2_read8 m_readhandler;
+ devcb2_write8 m_writehandler;
};
diff --git a/src/emu/machine/i8251.c b/src/emu/machine/i8251.c
index b0a36ba3b53..d772e77dea9 100644
--- a/src/emu/machine/i8251.c
+++ b/src/emu/machine/i8251.c
@@ -16,7 +16,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/***************************************************************************
GLOBAL VARIABLES
@@ -59,8 +59,8 @@ const device_type I8251 = &device_creator<i8251_device>;
//-------------------------------------------------
i8251_device::i8251_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8251, "I8251", tag, owner, clock),
- device_serial_interface(mconfig, *this)
+ : device_t(mconfig, I8251, "I8251", tag, owner, clock),
+ device_serial_interface(mconfig, *this)
{
}
@@ -241,10 +241,10 @@ void i8251_device::update_tx_ready()
int tx_ready;
/* tx ready output is set if:
- DB Buffer Empty &
- CTS is set &
- Transmit enable is 1
- */
+ DB Buffer Empty &
+ CTS is set &
+ Transmit enable is 1
+ */
tx_ready = 0;
@@ -362,28 +362,28 @@ WRITE8_MEMBER(i8251_device::control_w)
{
/* Asynchronous
- bit 7,6: stop bit length
- 0 = inhibit
- 1 = 1 bit
- 2 = 1.5 bits
- 3 = 2 bits
- bit 5: parity type
- 0 = parity odd
- 1 = parity even
- bit 4: parity test enable
- 0 = disable
- 1 = enable
- bit 3,2: character length
- 0 = 5 bits
- 1 = 6 bits
- 2 = 7 bits
- 3 = 8 bits
- bit 1,0: baud rate factor
- 0 = defines command byte for synchronous or asynchronous
- 1 = x1
- 2 = x16
- 3 = x64
- */
+ bit 7,6: stop bit length
+ 0 = inhibit
+ 1 = 1 bit
+ 2 = 1.5 bits
+ 3 = 2 bits
+ bit 5: parity type
+ 0 = parity odd
+ 1 = parity even
+ bit 4: parity test enable
+ 0 = disable
+ 1 = enable
+ bit 3,2: character length
+ 0 = 5 bits
+ 1 = 6 bits
+ 2 = 7 bits
+ 3 = 8 bits
+ bit 1,0: baud rate factor
+ 0 = defines command byte for synchronous or asynchronous
+ 1 = x1
+ 2 = x16
+ 3 = x64
+ */
LOG(("I8251: Asynchronous operation\n"));
@@ -483,24 +483,24 @@ WRITE8_MEMBER(i8251_device::control_w)
else
{
/* bit 7: Number of sync characters
- 0 = 1 character
- 1 = 2 character
- bit 6: Synchronous mode
- 0 = Internal synchronisation
- 1 = External synchronisation
- bit 5: parity type
- 0 = parity odd
- 1 = parity even
- bit 4: parity test enable
- 0 = disable
- 1 = enable
- bit 3,2: character length
- 0 = 5 bits
- 1 = 6 bits
- 2 = 7 bits
- 3 = 8 bits
- bit 1,0 = 0
- */
+ 0 = 1 character
+ 1 = 2 character
+ bit 6: Synchronous mode
+ 0 = Internal synchronisation
+ 1 = External synchronisation
+ bit 5: parity type
+ 0 = parity odd
+ 1 = parity even
+ bit 4: parity test enable
+ 0 = disable
+ 1 = enable
+ bit 3,2: character length
+ 0 = 5 bits
+ 1 = 6 bits
+ 2 = 7 bits
+ 3 = 8 bits
+ bit 1,0 = 0
+ */
LOG(("I8251: Synchronous operation\n"));
/* setup for sync byte(s) */
@@ -570,30 +570,30 @@ WRITE8_MEMBER(i8251_device::control_w)
/* bit 7:
- 0 = normal operation
- 1 = hunt mode
- bit 6:
- 0 = normal operation
- 1 = internal reset
- bit 5:
- 0 = /RTS set to 1
- 1 = /RTS set to 0
- bit 4:
- 0 = normal operation
- 1 = reset error flag
- bit 3:
- 0 = normal operation
- 1 = send break character
- bit 2:
- 0 = receive disable
- 1 = receive enable
- bit 1:
- 0 = /DTR set to 1
- 1 = /DTR set to 0
- bit 0:
- 0 = transmit disable
- 1 = transmit enable
- */
+ 0 = normal operation
+ 1 = hunt mode
+ bit 6:
+ 0 = normal operation
+ 1 = internal reset
+ bit 5:
+ 0 = /RTS set to 1
+ 1 = /RTS set to 0
+ bit 4:
+ 0 = normal operation
+ 1 = reset error flag
+ bit 3:
+ 0 = normal operation
+ 1 = send break character
+ bit 2:
+ 0 = receive disable
+ 1 = receive enable
+ bit 1:
+ 0 = /DTR set to 1
+ 1 = /DTR set to 0
+ bit 0:
+ 0 = transmit disable
+ 1 = transmit enable
+ */
m_connection_state &=~SERIAL_STATE_RTS;
if (data & (1<<5))
@@ -625,9 +625,9 @@ WRITE8_MEMBER(i8251_device::control_w)
if (data & (1<<6))
{
- // datasheet says "returns to mode format", not
- // completely resets the chip. behavior of DEC Rainbow
- // backs this up.
+ // datasheet says "returns to mode format", not
+ // completely resets the chip. behavior of DEC Rainbow
+ // backs this up.
m_flags |= I8251_EXPECTING_MODE;
}
diff --git a/src/emu/machine/i8251.h b/src/emu/machine/i8251.h
index 359fa4a626e..c854dc89725 100644
--- a/src/emu/machine/i8251.h
+++ b/src/emu/machine/i8251.h
@@ -14,15 +14,15 @@
CONSTANTS
***************************************************************************/
-#define I8251_EXPECTING_MODE 0x01
-#define I8251_EXPECTING_SYNC_BYTE 0x02
+#define I8251_EXPECTING_MODE 0x01
+#define I8251_EXPECTING_SYNC_BYTE 0x02
-#define I8251_STATUS_FRAMING_ERROR 0x20
-#define I8251_STATUS_OVERRUN_ERROR 0x10
-#define I8251_STATUS_PARITY_ERROR 0x08
-#define I8251_STATUS_TX_EMPTY 0x04
-#define I8251_STATUS_RX_READY 0x02
-#define I8251_STATUS_TX_READY 0x01
+#define I8251_STATUS_FRAMING_ERROR 0x20
+#define I8251_STATUS_OVERRUN_ERROR 0x10
+#define I8251_STATUS_PARITY_ERROR 0x08
+#define I8251_STATUS_TX_EMPTY 0x04
+#define I8251_STATUS_RX_READY 0x02
+#define I8251_STATUS_TX_READY 0x01
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
@@ -43,26 +43,26 @@
struct i8251_interface
{
- devcb_read_line m_in_rxd_cb;
- devcb_write_line m_out_txd_cb;
- devcb_read_line m_in_dsr_cb;
- devcb_write_line m_out_dtr_cb;
- devcb_write_line m_out_rts_cb;
- devcb_write_line m_out_rxrdy_cb;
- devcb_write_line m_out_txrdy_cb;
- devcb_write_line m_out_txempty_cb;
- devcb_write_line m_out_syndet_cb;
+ devcb_read_line m_in_rxd_cb;
+ devcb_write_line m_out_txd_cb;
+ devcb_read_line m_in_dsr_cb;
+ devcb_write_line m_out_dtr_cb;
+ devcb_write_line m_out_rts_cb;
+ devcb_write_line m_out_rxrdy_cb;
+ devcb_write_line m_out_txrdy_cb;
+ devcb_write_line m_out_txempty_cb;
+ devcb_write_line m_out_syndet_cb;
};
// ======================> i8251_device
class i8251_device : public device_t,
- public device_serial_interface,
- public i8251_interface
+ public device_serial_interface,
+ public i8251_interface
{
public:
- // construction/destruction
- i8251_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8251_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
/* read data register */
DECLARE_READ8_MEMBER(data_r);
@@ -86,8 +86,8 @@ public:
virtual void input_callback(UINT8 state);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
virtual void device_config_complete();
virtual void device_reset();
@@ -95,15 +95,15 @@ protected:
void update_tx_ready();
void update_tx_empty();
private:
- devcb_resolved_read_line m_in_rxd_func;
- devcb_resolved_write_line m_out_txd_func;
- devcb_resolved_read_line m_in_dsr_func;
- devcb_resolved_write_line m_out_dtr_func;
- devcb_resolved_write_line m_out_rts_func;
- devcb_resolved_write_line m_out_rxrdy_func;
- devcb_resolved_write_line m_out_txrdy_func;
- devcb_resolved_write_line m_out_txempty_func;
- devcb_resolved_write_line m_out_syndet_func;
+ devcb_resolved_read_line m_in_rxd_func;
+ devcb_resolved_write_line m_out_txd_func;
+ devcb_resolved_read_line m_in_dsr_func;
+ devcb_resolved_write_line m_out_dtr_func;
+ devcb_resolved_write_line m_out_rts_func;
+ devcb_resolved_write_line m_out_rxrdy_func;
+ devcb_resolved_write_line m_out_txrdy_func;
+ devcb_resolved_write_line m_out_txempty_func;
+ devcb_resolved_write_line m_out_syndet_func;
/* flags controlling how i8251_control_w operates */
UINT8 m_flags;
diff --git a/src/emu/machine/i8255.c b/src/emu/machine/i8255.c
index 869e90269b7..e7145df05f8 100644
--- a/src/emu/machine/i8255.c
+++ b/src/emu/machine/i8255.c
@@ -49,13 +49,13 @@ enum
};
-#define CONTROL_PORT_C_LOWER_INPUT 0x01
-#define CONTROL_PORT_B_INPUT 0x02
-#define CONTROL_GROUP_B_MODE_1 0x04
-#define CONTROL_PORT_C_UPPER_INPUT 0x08
-#define CONTROL_PORT_A_INPUT 0x10
-#define CONTROL_GROUP_A_MODE_MASK 0x60
-#define CONTROL_MODE_SET 0x80
+#define CONTROL_PORT_C_LOWER_INPUT 0x01
+#define CONTROL_PORT_B_INPUT 0x02
+#define CONTROL_GROUP_B_MODE_1 0x04
+#define CONTROL_PORT_C_UPPER_INPUT 0x08
+#define CONTROL_PORT_A_INPUT 0x10
+#define CONTROL_GROUP_A_MODE_MASK 0x60
+#define CONTROL_MODE_SET 0x80
@@ -260,7 +260,7 @@ inline int i8255_device::port_c_upper_mode()
//-------------------------------------------------
i8255_device::i8255_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8255, "I8255", tag, owner, clock)
+ : device_t(mconfig, I8255, "I8255", tag, owner, clock)
{
m_intr[PORT_A] = m_intr[PORT_B] = 0;
}
diff --git a/src/emu/machine/i8255.h b/src/emu/machine/i8255.h
index 9189afe9b06..fca729da0b0 100644
--- a/src/emu/machine/i8255.h
+++ b/src/emu/machine/i8255.h
@@ -69,28 +69,28 @@
struct i8255_interface
{
- devcb_read8 m_in_pa_cb;
- devcb_write8 m_out_pa_cb;
- devcb_read8 m_in_pb_cb;
- devcb_write8 m_out_pb_cb;
- devcb_read8 m_in_pc_cb;
- devcb_write8 m_out_pc_cb;
+ devcb_read8 m_in_pa_cb;
+ devcb_write8 m_out_pa_cb;
+ devcb_read8 m_in_pb_cb;
+ devcb_write8 m_out_pb_cb;
+ devcb_read8 m_in_pc_cb;
+ devcb_write8 m_out_pc_cb;
};
// ======================> i8255_device
class i8255_device : public device_t,
- public i8255_interface
+ public i8255_interface
{
public:
- // construction/destruction
- i8255_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8255_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
- DECLARE_READ8_MEMBER( pa_r );
+ DECLARE_READ8_MEMBER( pa_r );
UINT8 pa_r();
DECLARE_READ8_MEMBER( pb_r );
@@ -101,10 +101,10 @@ public:
DECLARE_WRITE_LINE_MEMBER( pc6_w );
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
private:
inline void check_interrupt(int port);
@@ -130,19 +130,19 @@ private:
void set_mode(UINT8 data);
void set_pc_bit(int bit, int state);
- devcb_resolved_read8 m_in_port_func[3];
- devcb_resolved_write8 m_out_port_func[3];
+ devcb_resolved_read8 m_in_port_func[3];
+ devcb_resolved_write8 m_out_port_func[3];
- UINT8 m_control; // mode control word
- UINT8 m_output[3]; // output latch
- UINT8 m_input[3]; // input latch
+ UINT8 m_control; // mode control word
+ UINT8 m_output[3]; // output latch
+ UINT8 m_input[3]; // input latch
- int m_ibf[2]; // input buffer full flag
- int m_obf[2]; // output buffer full flag, negative logic
- int m_inte[2]; // interrupt enable
- int m_inte1; // interrupt enable
- int m_inte2; // interrupt enable
- int m_intr[2]; // interrupt
+ int m_ibf[2]; // input buffer full flag
+ int m_obf[2]; // output buffer full flag, negative logic
+ int m_inte[2]; // interrupt enable
+ int m_inte1; // interrupt enable
+ int m_inte2; // interrupt enable
+ int m_intr[2]; // interrupt
};
diff --git a/src/emu/machine/i8279.c b/src/emu/machine/i8279.c
index 05e75d687de..bb6bc9812da 100644
--- a/src/emu/machine/i8279.c
+++ b/src/emu/machine/i8279.c
@@ -88,7 +88,7 @@ const device_type I8279 = &device_creator<i8279_device>;
//-------------------------------------------------
i8279_device::i8279_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8279, "Intel 8279", tag, owner, clock)
+ : device_t(mconfig, I8279, "Intel 8279", tag, owner, clock)
{
}
@@ -110,13 +110,13 @@ void i8279_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
- memset(&m_out_sl_cb, 0, sizeof(m_out_sl_cb));
- memset(&m_out_disp_cb, 0, sizeof(m_out_disp_cb));
- memset(&m_out_bd_cb, 0, sizeof(m_out_bd_cb));
- memset(&m_in_rl_cb, 0, sizeof(m_in_rl_cb));
- memset(&m_in_shift_cb, 0, sizeof(m_in_shift_cb));
- memset(&m_in_ctrl_cb, 0, sizeof(m_in_ctrl_cb));
+ memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
+ memset(&m_out_sl_cb, 0, sizeof(m_out_sl_cb));
+ memset(&m_out_disp_cb, 0, sizeof(m_out_disp_cb));
+ memset(&m_out_bd_cb, 0, sizeof(m_out_bd_cb));
+ memset(&m_in_rl_cb, 0, sizeof(m_in_rl_cb));
+ memset(&m_in_shift_cb, 0, sizeof(m_in_shift_cb));
+ memset(&m_in_ctrl_cb, 0, sizeof(m_in_ctrl_cb));
}
}
@@ -337,7 +337,7 @@ void i8279_device::timer_mainloop()
if (decoded)
for (addr=0; !BIT(m_scanner, addr); addr++);
- rl ^= 0xff; // inverted
+ rl ^= 0xff; // inverted
if (m_s_ram[addr] != rl)
{
m_s_ram[addr] = rl;
@@ -505,4 +505,3 @@ WRITE8_MEMBER( i8279_device::data_w )
}
m_d_ram_ptr &= 15;
}
-
diff --git a/src/emu/machine/i8279.h b/src/emu/machine/i8279.h
index 0ca1ce0f969..ee450a3afc7 100644
--- a/src/emu/machine/i8279.h
+++ b/src/emu/machine/i8279.h
@@ -61,13 +61,13 @@
struct i8279_interface
{
- devcb_write_line m_out_irq_cb; // IRQ
- devcb_write8 m_out_sl_cb; // Scanlines SL0-3
- devcb_write8 m_out_disp_cb; // B0-3,A0-3
- devcb_write_line m_out_bd_cb; // BD
- devcb_read8 m_in_rl_cb; // kbd readlines RL0-7
- devcb_read_line m_in_shift_cb; // Shift key
- devcb_read_line m_in_ctrl_cb; // Ctrl-Strobe line
+ devcb_write_line m_out_irq_cb; // IRQ
+ devcb_write8 m_out_sl_cb; // Scanlines SL0-3
+ devcb_write8 m_out_disp_cb; // B0-3,A0-3
+ devcb_write_line m_out_bd_cb; // BD
+ devcb_read8 m_in_rl_cb; // kbd readlines RL0-7
+ devcb_read_line m_in_shift_cb; // Shift key
+ devcb_read_line m_in_ctrl_cb; // Ctrl-Strobe line
};
@@ -107,17 +107,17 @@ private:
void set_irq(bool state);
void set_display_mode(UINT8 data);
- devcb_resolved_write_line m_out_irq_func;
- devcb_resolved_write8 m_out_sl_func;
- devcb_resolved_write8 m_out_disp_func;
- devcb_resolved_write_line m_out_bd_func;
- devcb_resolved_read8 m_in_rl_func;
- devcb_resolved_read_line m_in_shift_func;
- devcb_resolved_read_line m_in_ctrl_func;
+ devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_write8 m_out_sl_func;
+ devcb_resolved_write8 m_out_disp_func;
+ devcb_resolved_write_line m_out_bd_func;
+ devcb_resolved_read8 m_in_rl_func;
+ devcb_resolved_read_line m_in_shift_func;
+ devcb_resolved_read_line m_in_ctrl_func;
emu_timer *m_timer;
- UINT8 m_d_ram[16]; // display ram
+ UINT8 m_d_ram[16]; // display ram
UINT8 m_d_ram_ptr;
UINT8 m_s_ram[8]; // might be same as fifo ram
UINT8 m_s_ram_ptr;
diff --git a/src/emu/machine/i8355.c b/src/emu/machine/i8355.c
index 946be0de39a..10f3476fd1f 100644
--- a/src/emu/machine/i8355.c
+++ b/src/emu/machine/i8355.c
@@ -92,9 +92,9 @@ inline void i8355_device::write_port(int port, UINT8 data)
//-------------------------------------------------
i8355_device::i8355_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8355, "Intel 8355", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("ram", ENDIANNESS_LITTLE, 8, 11, 0, NULL, *ADDRESS_MAP_NAME(i8355))
+ : device_t(mconfig, I8355, "Intel 8355", tag, owner, clock),
+ device_memory_interface(mconfig, *this),
+ m_space_config("ram", ENDIANNESS_LITTLE, 8, 11, 0, NULL, *ADDRESS_MAP_NAME(i8355))
{
}
diff --git a/src/emu/machine/i8355.h b/src/emu/machine/i8355.h
index 142b4a36ef1..f1d82bcc8ba 100644
--- a/src/emu/machine/i8355.h
+++ b/src/emu/machine/i8355.h
@@ -51,7 +51,7 @@
///*************************************************************************
#define MCFG_I8355_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), I8355, _clock) \
+ MCFG_DEVICE_ADD((_tag), I8355, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define I8355_INTERFACE(name) \
@@ -67,36 +67,36 @@
struct i8355_interface
{
- devcb_read8 m_in_pa_cb;
- devcb_write8 m_out_pa_cb;
+ devcb_read8 m_in_pa_cb;
+ devcb_write8 m_out_pa_cb;
- devcb_read8 m_in_pb_cb;
- devcb_write8 m_out_pb_cb;
+ devcb_read8 m_in_pb_cb;
+ devcb_write8 m_out_pb_cb;
};
// ======================> i8355_device
-class i8355_device : public device_t,
+class i8355_device : public device_t,
public device_memory_interface,
- public i8355_interface
+ public i8355_interface
{
public:
- // construction/destruction
- i8355_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ i8355_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( io_r );
- DECLARE_WRITE8_MEMBER( io_w );
+ DECLARE_READ8_MEMBER( io_r );
+ DECLARE_WRITE8_MEMBER( io_w );
- DECLARE_READ8_MEMBER( memory_r );
- DECLARE_WRITE8_MEMBER( memory_w );
+ DECLARE_READ8_MEMBER( memory_r );
+ DECLARE_WRITE8_MEMBER( memory_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
@@ -105,14 +105,14 @@ protected:
inline void write_port(int port, UINT8 data);
private:
- devcb_resolved_read8 m_in_port_func[2];
- devcb_resolved_write8 m_out_port_func[2];
+ devcb_resolved_read8 m_in_port_func[2];
+ devcb_resolved_write8 m_out_port_func[2];
// registers
- UINT8 m_output[2]; // output latches
- UINT8 m_ddr[2]; // DDR latches
+ UINT8 m_output[2]; // output latches
+ UINT8 m_ddr[2]; // DDR latches
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
};
diff --git a/src/emu/machine/idectrl.c b/src/emu/machine/idectrl.c
index 63a1fe1e9f4..45658643caa 100644
--- a/src/emu/machine/idectrl.c
+++ b/src/emu/machine/idectrl.c
@@ -12,13 +12,13 @@
DEBUGGING
***************************************************************************/
-#define VERBOSE 0
-#define PRINTF_IDE_COMMANDS 0
-#define PRINTF_IDE_PASSWORD 0
+#define VERBOSE 0
+#define PRINTF_IDE_COMMANDS 0
+#define PRINTF_IDE_PASSWORD 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define LOGPRINT(x) do { if (VERBOSE) logerror x; if (PRINTF_IDE_COMMANDS) mame_printf_debug x; } while (0)
+#define LOGPRINT(x) do { if (VERBOSE) logerror x; if (PRINTF_IDE_COMMANDS) mame_printf_debug x; } while (0)
@@ -26,75 +26,75 @@
CONSTANTS
***************************************************************************/
-#define MINIMUM_COMMAND_TIME (attotime::from_usec(10))
+#define MINIMUM_COMMAND_TIME (attotime::from_usec(10))
-#define TIME_PER_SECTOR (attotime::from_usec(100))
-#define TIME_PER_ROTATION (attotime::from_hz(5400/60))
-#define TIME_SECURITY_ERROR (attotime::from_msec(1000))
+#define TIME_PER_SECTOR (attotime::from_usec(100))
+#define TIME_PER_ROTATION (attotime::from_hz(5400/60))
+#define TIME_SECURITY_ERROR (attotime::from_msec(1000))
-#define TIME_SEEK_MULTISECTOR (attotime::from_msec(13))
-#define TIME_NO_SEEK_MULTISECTOR (attotime::from_nsec(16300))
+#define TIME_SEEK_MULTISECTOR (attotime::from_msec(13))
+#define TIME_NO_SEEK_MULTISECTOR (attotime::from_nsec(16300))
-#define IDE_STATUS_ERROR 0x01
-#define IDE_STATUS_HIT_INDEX 0x02
-#define IDE_STATUS_BUFFER_READY 0x08
-#define IDE_STATUS_SEEK_COMPLETE 0x10
-#define IDE_STATUS_DRIVE_READY 0x40
-#define IDE_STATUS_BUSY 0x80
+#define IDE_STATUS_ERROR 0x01
+#define IDE_STATUS_HIT_INDEX 0x02
+#define IDE_STATUS_BUFFER_READY 0x08
+#define IDE_STATUS_SEEK_COMPLETE 0x10
+#define IDE_STATUS_DRIVE_READY 0x40
+#define IDE_STATUS_BUSY 0x80
#define BANK(b, v) (((v) << 4) | (b))
-#define IDE_BANK0_DATA BANK(0, 0)
-#define IDE_BANK0_ERROR BANK(0, 1)
-#define IDE_BANK0_SECTOR_COUNT BANK(0, 2)
-#define IDE_BANK0_SECTOR_NUMBER BANK(0, 3)
-#define IDE_BANK0_CYLINDER_LSB BANK(0, 4)
-#define IDE_BANK0_CYLINDER_MSB BANK(0, 5)
-#define IDE_BANK0_HEAD_NUMBER BANK(0, 6)
-#define IDE_BANK0_STATUS_COMMAND BANK(0, 7)
-
-#define IDE_BANK1_STATUS_CONTROL BANK(1, 6)
-
-#define IDE_BANK2_CONFIG_UNK BANK(2, 4)
-#define IDE_BANK2_CONFIG_REGISTER BANK(2, 8)
-#define IDE_BANK2_CONFIG_DATA BANK(2, 0xc)
-
-#define IDE_COMMAND_READ_MULTIPLE 0x20
-#define IDE_COMMAND_READ_MULTIPLE_NORETRY 0x21
-#define IDE_COMMAND_WRITE_MULTIPLE 0x30
-#define IDE_COMMAND_WRITE_MULTIPLE_NORETRY 0x31
-#define IDE_COMMAND_DIAGNOSTIC 0x90
-#define IDE_COMMAND_SET_CONFIG 0x91
-#define IDE_COMMAND_READ_MULTIPLE_BLOCK 0xc4
-#define IDE_COMMAND_WRITE_MULTIPLE_BLOCK 0xc5
-#define IDE_COMMAND_SET_BLOCK_COUNT 0xc6
-#define IDE_COMMAND_READ_DMA 0xc8
-#define IDE_COMMAND_WRITE_DMA 0xca
-#define IDE_COMMAND_GET_INFO 0xec
-#define IDE_COMMAND_SET_FEATURES 0xef
-#define IDE_COMMAND_SECURITY_UNLOCK 0xf2
-#define IDE_COMMAND_UNKNOWN_F9 0xf9
-#define IDE_COMMAND_VERIFY_MULTIPLE 0x40
-#define IDE_COMMAND_VERIFY_NORETRY 0x41
-#define IDE_COMMAND_ATAPI_IDENTIFY 0xa1
-#define IDE_COMMAND_RECALIBRATE 0x10
-#define IDE_COMMAND_SEEK 0x70
-#define IDE_COMMAND_IDLE_IMMEDIATE 0xe1
-#define IDE_COMMAND_IDLE 0xe3
-#define IDE_COMMAND_TAITO_GNET_UNLOCK_1 0xfe
-#define IDE_COMMAND_TAITO_GNET_UNLOCK_2 0xfc
-#define IDE_COMMAND_TAITO_GNET_UNLOCK_3 0x0f
-
-#define IDE_ERROR_NONE 0x00
-#define IDE_ERROR_DEFAULT 0x01
-#define IDE_ERROR_TRACK0_NOT_FOUND 0x02
-#define IDE_ERROR_UNKNOWN_COMMAND 0x04
-#define IDE_ERROR_BAD_LOCATION 0x10
-#define IDE_ERROR_BAD_SECTOR 0x80
-
-#define IDE_BUSMASTER_STATUS_ACTIVE 0x01
-#define IDE_BUSMASTER_STATUS_ERROR 0x02
-#define IDE_BUSMASTER_STATUS_IRQ 0x04
+#define IDE_BANK0_DATA BANK(0, 0)
+#define IDE_BANK0_ERROR BANK(0, 1)
+#define IDE_BANK0_SECTOR_COUNT BANK(0, 2)
+#define IDE_BANK0_SECTOR_NUMBER BANK(0, 3)
+#define IDE_BANK0_CYLINDER_LSB BANK(0, 4)
+#define IDE_BANK0_CYLINDER_MSB BANK(0, 5)
+#define IDE_BANK0_HEAD_NUMBER BANK(0, 6)
+#define IDE_BANK0_STATUS_COMMAND BANK(0, 7)
+
+#define IDE_BANK1_STATUS_CONTROL BANK(1, 6)
+
+#define IDE_BANK2_CONFIG_UNK BANK(2, 4)
+#define IDE_BANK2_CONFIG_REGISTER BANK(2, 8)
+#define IDE_BANK2_CONFIG_DATA BANK(2, 0xc)
+
+#define IDE_COMMAND_READ_MULTIPLE 0x20
+#define IDE_COMMAND_READ_MULTIPLE_NORETRY 0x21
+#define IDE_COMMAND_WRITE_MULTIPLE 0x30
+#define IDE_COMMAND_WRITE_MULTIPLE_NORETRY 0x31
+#define IDE_COMMAND_DIAGNOSTIC 0x90
+#define IDE_COMMAND_SET_CONFIG 0x91
+#define IDE_COMMAND_READ_MULTIPLE_BLOCK 0xc4
+#define IDE_COMMAND_WRITE_MULTIPLE_BLOCK 0xc5
+#define IDE_COMMAND_SET_BLOCK_COUNT 0xc6
+#define IDE_COMMAND_READ_DMA 0xc8
+#define IDE_COMMAND_WRITE_DMA 0xca
+#define IDE_COMMAND_GET_INFO 0xec
+#define IDE_COMMAND_SET_FEATURES 0xef
+#define IDE_COMMAND_SECURITY_UNLOCK 0xf2
+#define IDE_COMMAND_UNKNOWN_F9 0xf9
+#define IDE_COMMAND_VERIFY_MULTIPLE 0x40
+#define IDE_COMMAND_VERIFY_NORETRY 0x41
+#define IDE_COMMAND_ATAPI_IDENTIFY 0xa1
+#define IDE_COMMAND_RECALIBRATE 0x10
+#define IDE_COMMAND_SEEK 0x70
+#define IDE_COMMAND_IDLE_IMMEDIATE 0xe1
+#define IDE_COMMAND_IDLE 0xe3
+#define IDE_COMMAND_TAITO_GNET_UNLOCK_1 0xfe
+#define IDE_COMMAND_TAITO_GNET_UNLOCK_2 0xfc
+#define IDE_COMMAND_TAITO_GNET_UNLOCK_3 0x0f
+
+#define IDE_ERROR_NONE 0x00
+#define IDE_ERROR_DEFAULT 0x01
+#define IDE_ERROR_TRACK0_NOT_FOUND 0x02
+#define IDE_ERROR_UNKNOWN_COMMAND 0x04
+#define IDE_ERROR_BAD_LOCATION 0x10
+#define IDE_ERROR_BAD_SECTOR 0x80
+
+#define IDE_BUSMASTER_STATUS_ACTIVE 0x01
+#define IDE_BUSMASTER_STATUS_ERROR 0x02
+#define IDE_BUSMASTER_STATUS_IRQ 0x04
void ide_controller_device::signal_interrupt()
@@ -330,129 +330,129 @@ void ide_hdd_device::ide_build_features()
int sectors_per_track = m_num_heads * m_num_sectors;
/* basic geometry */
- m_features[ 0*2+0] = 0x5a; /* 0: configuration bits */
+ m_features[ 0*2+0] = 0x5a; /* 0: configuration bits */
m_features[ 0*2+1] = 0x04;
- m_features[ 1*2+0] = m_num_cylinders & 0xff; /* 1: logical cylinders */
+ m_features[ 1*2+0] = m_num_cylinders & 0xff; /* 1: logical cylinders */
m_features[ 1*2+1] = m_num_cylinders >> 8;
- m_features[ 2*2+0] = 0; /* 2: reserved */
+ m_features[ 2*2+0] = 0; /* 2: reserved */
m_features[ 2*2+1] = 0;
- m_features[ 3*2+0] = m_num_heads & 0xff; /* 3: logical heads */
+ m_features[ 3*2+0] = m_num_heads & 0xff; /* 3: logical heads */
m_features[ 3*2+1] = 0;/*num_heads >> 8;*/
- m_features[ 4*2+0] = 0; /* 4: vendor specific (obsolete) */
+ m_features[ 4*2+0] = 0; /* 4: vendor specific (obsolete) */
m_features[ 4*2+1] = 0;
- m_features[ 5*2+0] = 0; /* 5: vendor specific (obsolete) */
+ m_features[ 5*2+0] = 0; /* 5: vendor specific (obsolete) */
m_features[ 5*2+1] = 0;
- m_features[ 6*2+0] = m_num_sectors & 0xff; /* 6: logical sectors per logical track */
+ m_features[ 6*2+0] = m_num_sectors & 0xff; /* 6: logical sectors per logical track */
m_features[ 6*2+1] = 0;/*num_sectors >> 8;*/
- m_features[ 7*2+0] = 0; /* 7: vendor-specific */
+ m_features[ 7*2+0] = 0; /* 7: vendor-specific */
m_features[ 7*2+1] = 0;
- m_features[ 8*2+0] = 0; /* 8: vendor-specific */
+ m_features[ 8*2+0] = 0; /* 8: vendor-specific */
m_features[ 8*2+1] = 0;
- m_features[ 9*2+0] = 0; /* 9: vendor-specific */
+ m_features[ 9*2+0] = 0; /* 9: vendor-specific */
m_features[ 9*2+1] = 0;
- swap_strncpy(&m_features[10*2+0], /* 10-19: serial number */
+ swap_strncpy(&m_features[10*2+0], /* 10-19: serial number */
"00000000000000000000", 10);
- m_features[20*2+0] = 0; /* 20: vendor-specific */
+ m_features[20*2+0] = 0; /* 20: vendor-specific */
m_features[20*2+1] = 0;
- m_features[21*2+0] = 0; /* 21: vendor-specific */
+ m_features[21*2+0] = 0; /* 21: vendor-specific */
m_features[21*2+1] = 0;
- m_features[22*2+0] = 4; /* 22: # of vendor-specific bytes on read/write long commands */
+ m_features[22*2+0] = 4; /* 22: # of vendor-specific bytes on read/write long commands */
m_features[22*2+1] = 0;
- swap_strncpy(&m_features[23*2+0], /* 23-26: firmware revision */
+ swap_strncpy(&m_features[23*2+0], /* 23-26: firmware revision */
"1.0", 4);
- swap_strncpy(&m_features[27*2+0], /* 27-46: model number */
+ swap_strncpy(&m_features[27*2+0], /* 27-46: model number */
"MAME Compressed Hard Disk", 20);
- m_features[47*2+0] = 0x01; /* 47: read/write multiple support */
+ m_features[47*2+0] = 0x01; /* 47: read/write multiple support */
m_features[47*2+1] = 0x80;
- m_features[48*2+0] = 0; /* 48: reserved */
+ m_features[48*2+0] = 0; /* 48: reserved */
m_features[48*2+1] = 0;
- m_features[49*2+0] = 0x03; /* 49: capabilities */
+ m_features[49*2+0] = 0x03; /* 49: capabilities */
m_features[49*2+1] = 0x0f;
- m_features[50*2+0] = 0; /* 50: reserved */
+ m_features[50*2+0] = 0; /* 50: reserved */
m_features[50*2+1] = 0;
- m_features[51*2+0] = 2; /* 51: PIO data transfer cycle timing mode */
+ m_features[51*2+0] = 2; /* 51: PIO data transfer cycle timing mode */
m_features[51*2+1] = 0;
- m_features[52*2+0] = 2; /* 52: single word DMA transfer cycle timing mode */
+ m_features[52*2+0] = 2; /* 52: single word DMA transfer cycle timing mode */
m_features[52*2+1] = 0;
- m_features[53*2+0] = 3; /* 53: field validity */
+ m_features[53*2+0] = 3; /* 53: field validity */
m_features[53*2+1] = 0;
- m_features[54*2+0] = m_num_cylinders & 0xff; /* 54: number of current logical cylinders */
+ m_features[54*2+0] = m_num_cylinders & 0xff; /* 54: number of current logical cylinders */
m_features[54*2+1] = m_num_cylinders >> 8;
- m_features[55*2+0] = m_num_heads & 0xff; /* 55: number of current logical heads */
+ m_features[55*2+0] = m_num_heads & 0xff; /* 55: number of current logical heads */
m_features[55*2+1] = 0;/*num_heads >> 8;*/
- m_features[56*2+0] = m_num_sectors & 0xff; /* 56: number of current logical sectors per track */
+ m_features[56*2+0] = m_num_sectors & 0xff; /* 56: number of current logical sectors per track */
m_features[56*2+1] = 0;/*num_sectors >> 8;*/
- m_features[57*2+0] = sectors_per_track & 0xff; /* 57-58: number of current logical sectors per track */
+ m_features[57*2+0] = sectors_per_track & 0xff; /* 57-58: number of current logical sectors per track */
m_features[57*2+1] = sectors_per_track >> 8;
m_features[58*2+0] = sectors_per_track >> 16;
m_features[58*2+1] = sectors_per_track >> 24;
- m_features[59*2+0] = 0; /* 59: multiple sector timing */
+ m_features[59*2+0] = 0; /* 59: multiple sector timing */
m_features[59*2+1] = 0;
- m_features[60*2+0] = total_sectors & 0xff; /* 60-61: total user addressable sectors */
+ m_features[60*2+0] = total_sectors & 0xff; /* 60-61: total user addressable sectors */
m_features[60*2+1] = total_sectors >> 8;
m_features[61*2+0] = total_sectors >> 16;
m_features[61*2+1] = total_sectors >> 24;
- m_features[62*2+0] = 0x07; /* 62: single word dma transfer */
+ m_features[62*2+0] = 0x07; /* 62: single word dma transfer */
m_features[62*2+1] = 0x00;
- m_features[63*2+0] = 0x07; /* 63: multiword DMA transfer */
+ m_features[63*2+0] = 0x07; /* 63: multiword DMA transfer */
m_features[63*2+1] = 0x04;
- m_features[64*2+0] = 0x03; /* 64: flow control PIO transfer modes supported */
+ m_features[64*2+0] = 0x03; /* 64: flow control PIO transfer modes supported */
m_features[64*2+1] = 0x00;
- m_features[65*2+0] = 0x78; /* 65: minimum multiword DMA transfer cycle time per word */
+ m_features[65*2+0] = 0x78; /* 65: minimum multiword DMA transfer cycle time per word */
m_features[65*2+1] = 0x00;
- m_features[66*2+0] = 0x78; /* 66: mfr's recommended multiword DMA transfer cycle time */
+ m_features[66*2+0] = 0x78; /* 66: mfr's recommended multiword DMA transfer cycle time */
m_features[66*2+1] = 0x00;
- m_features[67*2+0] = 0x4d; /* 67: minimum PIO transfer cycle time without flow control */
+ m_features[67*2+0] = 0x4d; /* 67: minimum PIO transfer cycle time without flow control */
m_features[67*2+1] = 0x01;
- m_features[68*2+0] = 0x78; /* 68: minimum PIO transfer cycle time with IORDY */
+ m_features[68*2+0] = 0x78; /* 68: minimum PIO transfer cycle time with IORDY */
m_features[68*2+1] = 0x00;
- m_features[69*2+0] = 0x00; /* 69-70: reserved */
+ m_features[69*2+0] = 0x00; /* 69-70: reserved */
m_features[69*2+1] = 0x00;
- m_features[71*2+0] = 0x00; /* 71: reserved for IDENTIFY PACKET command */
+ m_features[71*2+0] = 0x00; /* 71: reserved for IDENTIFY PACKET command */
m_features[71*2+1] = 0x00;
- m_features[72*2+0] = 0x00; /* 72: reserved for IDENTIFY PACKET command */
+ m_features[72*2+0] = 0x00; /* 72: reserved for IDENTIFY PACKET command */
m_features[72*2+1] = 0x00;
- m_features[73*2+0] = 0x00; /* 73: reserved for IDENTIFY PACKET command */
+ m_features[73*2+0] = 0x00; /* 73: reserved for IDENTIFY PACKET command */
m_features[73*2+1] = 0x00;
- m_features[74*2+0] = 0x00; /* 74: reserved for IDENTIFY PACKET command */
+ m_features[74*2+0] = 0x00; /* 74: reserved for IDENTIFY PACKET command */
m_features[74*2+1] = 0x00;
- m_features[75*2+0] = 0x00; /* 75: queue depth */
+ m_features[75*2+0] = 0x00; /* 75: queue depth */
m_features[75*2+1] = 0x00;
- m_features[76*2+0] = 0x00; /* 76-79: reserved */
+ m_features[76*2+0] = 0x00; /* 76-79: reserved */
m_features[76*2+1] = 0x00;
- m_features[80*2+0] = 0x00; /* 80: major version number */
+ m_features[80*2+0] = 0x00; /* 80: major version number */
m_features[80*2+1] = 0x00;
- m_features[81*2+0] = 0x00; /* 81: minor version number */
+ m_features[81*2+0] = 0x00; /* 81: minor version number */
m_features[81*2+1] = 0x00;
- m_features[82*2+0] = 0x00; /* 82: command set supported */
+ m_features[82*2+0] = 0x00; /* 82: command set supported */
m_features[82*2+1] = 0x00;
- m_features[83*2+0] = 0x00; /* 83: command sets supported */
+ m_features[83*2+0] = 0x00; /* 83: command sets supported */
m_features[83*2+1] = 0x00;
- m_features[84*2+0] = 0x00; /* 84: command set/feature supported extension */
+ m_features[84*2+0] = 0x00; /* 84: command set/feature supported extension */
m_features[84*2+1] = 0x00;
- m_features[85*2+0] = 0x00; /* 85: command set/feature enabled */
+ m_features[85*2+0] = 0x00; /* 85: command set/feature enabled */
m_features[85*2+1] = 0x00;
- m_features[86*2+0] = 0x00; /* 86: command set/feature enabled */
+ m_features[86*2+0] = 0x00; /* 86: command set/feature enabled */
m_features[86*2+1] = 0x00;
- m_features[87*2+0] = 0x00; /* 87: command set/feature default */
+ m_features[87*2+0] = 0x00; /* 87: command set/feature default */
m_features[87*2+1] = 0x00;
- m_features[88*2+0] = 0x00; /* 88: additional DMA modes */
+ m_features[88*2+0] = 0x00; /* 88: additional DMA modes */
m_features[88*2+1] = 0x00;
- m_features[89*2+0] = 0x00; /* 89: time required for security erase unit completion */
+ m_features[89*2+0] = 0x00; /* 89: time required for security erase unit completion */
m_features[89*2+1] = 0x00;
- m_features[90*2+0] = 0x00; /* 90: time required for enhanced security erase unit completion */
+ m_features[90*2+0] = 0x00; /* 90: time required for enhanced security erase unit completion */
m_features[90*2+1] = 0x00;
- m_features[91*2+0] = 0x00; /* 91: current advanced power management value */
+ m_features[91*2+0] = 0x00; /* 91: current advanced power management value */
m_features[91*2+1] = 0x00;
- m_features[92*2+0] = 0x00; /* 92: master password revision code */
+ m_features[92*2+0] = 0x00; /* 92: master password revision code */
m_features[92*2+1] = 0x00;
- m_features[93*2+0] = 0x00; /* 93: hardware reset result */
+ m_features[93*2+0] = 0x00; /* 93: hardware reset result */
m_features[93*2+1] = 0x00;
- m_features[94*2+0] = 0x00; /* 94: acoustic management values */
+ m_features[94*2+0] = 0x00; /* 94: acoustic management values */
m_features[94*2+1] = 0x00;
- m_features[95*2+0] = 0x00; /* 95-99: reserved */
+ m_features[95*2+0] = 0x00; /* 95-99: reserved */
m_features[95*2+1] = 0x00;
- m_features[100*2+0] = total_sectors & 0xff; /* 100-103: maximum 48-bit LBA */
+ m_features[100*2+0] = total_sectors & 0xff; /* 100-103: maximum 48-bit LBA */
m_features[100*2+1] = total_sectors >> 8;
m_features[101*2+0] = total_sectors >> 16;
m_features[101*2+1] = total_sectors >> 24;
@@ -460,23 +460,23 @@ void ide_hdd_device::ide_build_features()
m_features[102*2+1] = 0x00;
m_features[103*2+0] = 0x00;
m_features[103*2+1] = 0x00;
- m_features[104*2+0] = 0x00; /* 104-126: reserved */
+ m_features[104*2+0] = 0x00; /* 104-126: reserved */
m_features[104*2+1] = 0x00;
- m_features[127*2+0] = 0x00; /* 127: removable media status notification */
+ m_features[127*2+0] = 0x00; /* 127: removable media status notification */
m_features[127*2+1] = 0x00;
- m_features[128*2+0] = 0x00; /* 128: security status */
+ m_features[128*2+0] = 0x00; /* 128: security status */
m_features[128*2+1] = 0x00;
- m_features[129*2+0] = 0x00; /* 129-159: vendor specific */
+ m_features[129*2+0] = 0x00; /* 129-159: vendor specific */
m_features[129*2+1] = 0x00;
- m_features[160*2+0] = 0x00; /* 160: CFA power mode 1 */
+ m_features[160*2+0] = 0x00; /* 160: CFA power mode 1 */
m_features[160*2+1] = 0x00;
- m_features[161*2+0] = 0x00; /* 161-175: reserved for CompactFlash */
+ m_features[161*2+0] = 0x00; /* 161-175: reserved for CompactFlash */
m_features[161*2+1] = 0x00;
- m_features[176*2+0] = 0x00; /* 176-205: current media serial number */
+ m_features[176*2+0] = 0x00; /* 176-205: current media serial number */
m_features[176*2+1] = 0x00;
- m_features[206*2+0] = 0x00; /* 206-254: reserved */
+ m_features[206*2+0] = 0x00; /* 206-254: reserved */
m_features[206*2+1] = 0x00;
- m_features[255*2+0] = 0x00; /* 255: integrity word */
+ m_features[255*2+0] = 0x00; /* 255: integrity word */
m_features[255*2+1] = 0x00;
}
@@ -1132,10 +1132,10 @@ void ide_controller_device::handle_command(UINT8 _command)
case IDE_COMMAND_SEEK:
/*
- cur_cylinder, cur_sector and cur_head
- are all already set in this case so no need
- so that implements actual seek
- */
+ cur_cylinder, cur_sector and cur_head
+ are all already set in this case so no need
+ so that implements actual seek
+ */
/* clear the error too */
error = IDE_ERROR_NONE;
@@ -1846,9 +1846,9 @@ const device_type IDE_SLOT = &device_creator<ide_slot_device>;
//-------------------------------------------------
ide_slot_device::ide_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, IDE_SLOT, "IDE Connector", tag, owner, clock),
- device_slot_interface(mconfig, *this),
- m_dev(NULL)
+ : device_t(mconfig, IDE_SLOT, "IDE Connector", tag, owner, clock),
+ device_slot_interface(mconfig, *this),
+ m_dev(NULL)
{
}
@@ -1898,13 +1898,13 @@ const device_type IDE_HARDDISK = &device_creator<ide_hdd_device>;
//-------------------------------------------------
ide_hdd_device::ide_hdd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, IDE_HARDDISK, "IDE Hard Disk", tag, owner, clock),
- ide_device_interface( mconfig, *this )
+ : device_t(mconfig, IDE_HARDDISK, "IDE Hard Disk", tag, owner, clock),
+ ide_device_interface( mconfig, *this )
{
}
ide_hdd_device::ide_hdd_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock) :
- device_t(mconfig, type, name, tag, owner, clock),
+ device_t(mconfig, type, name, tag, owner, clock),
ide_device_interface(mconfig, *this)
{
}
@@ -1966,7 +1966,7 @@ const device_type IDE_HARDDISK_IMAGE = &device_creator<ide_hdd_image_device>;
//-------------------------------------------------
ide_hdd_image_device::ide_hdd_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : ide_hdd_device(mconfig, IDE_HARDDISK_IMAGE, "IDE Hard Disk Image", tag, owner, clock)
+ : ide_hdd_device(mconfig, IDE_HARDDISK_IMAGE, "IDE Hard Disk Image", tag, owner, clock)
{
}
@@ -2025,4 +2025,3 @@ machine_config_constructor ide_hdd_image_device::device_mconfig_additions() cons
{
return MACHINE_CONFIG_NAME( hdd_image );
}
-
diff --git a/src/emu/machine/idectrl.h b/src/emu/machine/idectrl.h
index 74146d9eaf2..4a6c6c55cd1 100644
--- a/src/emu/machine/idectrl.h
+++ b/src/emu/machine/idectrl.h
@@ -19,7 +19,7 @@
#include "harddisk.h"
#include "imagedev/harddriv.h"
-#define IDE_DISK_SECTOR_SIZE 512
+#define IDE_DISK_SECTOR_SIZE 512
/***************************************************************************
TYPE DEFINITIONS
@@ -31,8 +31,8 @@ class ide_device_interface : public device_slot_card_interface
public:
ide_device_interface(const machine_config &mconfig, device_t &device);
public:
- virtual int read_sector(UINT32 lba, void *buffer) = 0;
- virtual int write_sector(UINT32 lba, const void *buffer) = 0;
+ virtual int read_sector(UINT32 lba, void *buffer) = 0;
+ virtual int write_sector(UINT32 lba, const void *buffer) = 0;
UINT8 *get_features() { return m_features;}
@@ -43,23 +43,23 @@ public:
virtual bool is_ready() { return true; }
virtual void read_key(UINT8 key[]) { }
protected:
- UINT8 m_features[IDE_DISK_SECTOR_SIZE];
- UINT16 m_num_cylinders;
- UINT8 m_num_sectors;
- UINT8 m_num_heads;
+ UINT8 m_features[IDE_DISK_SECTOR_SIZE];
+ UINT16 m_num_cylinders;
+ UINT8 m_num_sectors;
+ UINT8 m_num_heads;
};
// ======================> ide_slot_device
-class ide_slot_device : public device_t,
+class ide_slot_device : public device_t,
public device_slot_interface
{
public:
// construction/destruction
ide_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- int read_sector(UINT32 lba, void *buffer) { return (m_dev) ? m_dev->read_sector(lba,buffer) : 0; }
- int write_sector(UINT32 lba, const void *buffer) { return (m_dev) ? m_dev->write_sector(lba,buffer) : 0; }
+ int read_sector(UINT32 lba, void *buffer) { return (m_dev) ? m_dev->read_sector(lba,buffer) : 0; }
+ int write_sector(UINT32 lba, const void *buffer) { return (m_dev) ? m_dev->write_sector(lba,buffer) : 0; }
UINT8 *get_features() { return (m_dev) ? m_dev->get_features() : NULL;}
UINT16 get_cylinders() { return (m_dev) ? m_dev->get_cylinders() : 0; }
@@ -83,19 +83,19 @@ extern const device_type IDE_SLOT;
// ======================> ide_hdd_device
class ide_hdd_device : public device_t,
- public ide_device_interface
+ public ide_device_interface
{
public:
- // construction/destruction
- ide_hdd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ide_hdd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
ide_hdd_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
- virtual int read_sector(UINT32 lba, void *buffer) { return hard_disk_read(m_disk, lba, buffer); }
- virtual int write_sector(UINT32 lba, const void *buffer) { return hard_disk_write(m_disk, lba, buffer); }
+ virtual int read_sector(UINT32 lba, void *buffer) { return hard_disk_read(m_disk, lba, buffer); }
+ virtual int write_sector(UINT32 lba, const void *buffer) { return hard_disk_write(m_disk, lba, buffer); }
virtual void read_key(UINT8 key[]);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
virtual void device_reset();
virtual void device_config_complete() { m_shortname = "hdd"; }
@@ -113,11 +113,11 @@ extern const device_type IDE_HARDDISK;
class ide_hdd_image_device : public ide_hdd_device
{
public:
- // construction/destruction
- ide_hdd_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ide_hdd_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
virtual void device_reset();
virtual void device_config_complete() { m_shortname = "hdd_image"; }
// optional information overrides
@@ -177,15 +177,15 @@ DECLARE_WRITE16_DEVICE_HANDLER( ide_controller16_w );
***************************************************************************/
struct ide_device
{
- UINT16 cur_cylinder;
- UINT8 cur_sector;
- UINT8 cur_head;
- UINT8 cur_head_reg;
- UINT32 cur_lba;
+ UINT16 cur_cylinder;
+ UINT8 cur_sector;
+ UINT8 cur_head;
+ UINT8 cur_head_reg;
+ UINT32 cur_lba;
ide_slot_device *slot;
};
-#define IDE_CONFIG_REGISTERS 0x10
+#define IDE_CONFIG_REGISTERS 0x10
/* ----- device interface ----- */
@@ -212,7 +212,7 @@ public:
void read_sector_done();
void write_sector_done();
- UINT8 status;
+ UINT8 status;
protected:
// device-level overrides
@@ -232,48 +232,48 @@ private:
void handle_command(UINT8 _command);
void continue_write();
- UINT8 adapter_control;
- UINT8 error;
- UINT8 command;
- UINT8 interrupt_pending;
- UINT8 precomp_offset;
+ UINT8 adapter_control;
+ UINT8 error;
+ UINT8 command;
+ UINT8 interrupt_pending;
+ UINT8 precomp_offset;
- UINT8 buffer[IDE_DISK_SECTOR_SIZE];
- UINT16 buffer_offset;
- UINT16 sector_count;
+ UINT8 buffer[IDE_DISK_SECTOR_SIZE];
+ UINT16 buffer_offset;
+ UINT16 sector_count;
- UINT16 block_count;
- UINT16 sectors_until_int;
- UINT8 verify_only;
+ UINT16 block_count;
+ UINT16 sectors_until_int;
+ UINT8 verify_only;
- UINT8 dma_active;
+ UINT8 dma_active;
address_space *dma_space;
- UINT8 dma_address_xor;
- UINT8 dma_last_buffer;
- offs_t dma_address;
- offs_t dma_descriptor;
- UINT32 dma_bytes_left;
+ UINT8 dma_address_xor;
+ UINT8 dma_last_buffer;
+ offs_t dma_address;
+ offs_t dma_descriptor;
+ UINT32 dma_bytes_left;
- UINT8 bus_master_command;
- UINT8 bus_master_status;
- UINT32 bus_master_descriptor;
+ UINT8 bus_master_command;
+ UINT8 bus_master_status;
+ UINT32 bus_master_descriptor;
- UINT8 config_unknown;
- UINT8 config_register[IDE_CONFIG_REGISTERS];
- UINT8 config_register_num;
+ UINT8 config_unknown;
+ UINT8 config_register[IDE_CONFIG_REGISTERS];
+ UINT8 config_register_num;
- emu_timer * last_status_timer;
- emu_timer * reset_timer;
+ emu_timer * last_status_timer;
+ emu_timer * reset_timer;
- UINT8 master_password_enable;
- UINT8 user_password_enable;
- const UINT8 * master_password;
- const UINT8 * user_password;
+ UINT8 master_password_enable;
+ UINT8 user_password_enable;
+ const UINT8 * master_password;
+ const UINT8 * user_password;
- UINT8 gnetreadlock;
+ UINT8 gnetreadlock;
- UINT8 cur_drive;
- ide_device drive[2];
+ UINT8 cur_drive;
+ ide_device drive[2];
devcb2_write_line m_irq_handler;
const char *bmcpu;
@@ -284,4 +284,4 @@ extern const device_type IDE_CONTROLLER;
-#endif /* __IDECTRL_H__ */
+#endif /* __IDECTRL_H__ */
diff --git a/src/emu/machine/im6402.c b/src/emu/machine/im6402.c
index c91f6bf9da9..0f24242dc1b 100644
--- a/src/emu/machine/im6402.c
+++ b/src/emu/machine/im6402.c
@@ -157,8 +157,8 @@ inline void im6402_device::transmit()
//-------------------------------------------------
im6402_device::im6402_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, IM6402, "Intersil IM6402", tag, owner, clock),
- device_serial_interface(mconfig, *this)
+ : device_t(mconfig, IM6402, "Intersil IM6402", tag, owner, clock),
+ device_serial_interface(mconfig, *this)
{
}
diff --git a/src/emu/machine/im6402.h b/src/emu/machine/im6402.h
index 5409c65d926..201fb5e7a12 100644
--- a/src/emu/machine/im6402.h
+++ b/src/emu/machine/im6402.h
@@ -71,19 +71,19 @@ struct im6402_interface
int m_rrc;
int m_trc;
- devcb_read_line m_in_rri_cb;
- devcb_write_line m_out_tro_cb;
- devcb_write_line m_out_dr_cb;
- devcb_write_line m_out_tbre_cb;
- devcb_write_line m_out_tre_cb;
+ devcb_read_line m_in_rri_cb;
+ devcb_write_line m_out_tro_cb;
+ devcb_write_line m_out_dr_cb;
+ devcb_write_line m_out_tbre_cb;
+ devcb_write_line m_out_tre_cb;
};
// ======================> im6402_device
class im6402_device : public device_t,
- public device_serial_interface,
- public im6402_interface
+ public device_serial_interface,
+ public im6402_interface
{
public:
// construction/destruction
@@ -136,11 +136,11 @@ private:
TIMER_TX
};
- devcb_resolved_read_line m_in_rri_func;
- devcb_resolved_write_line m_out_tro_func;
- devcb_resolved_write_line m_out_dr_func;
- devcb_resolved_write_line m_out_tbre_func;
- devcb_resolved_write_line m_out_tre_func;
+ devcb_resolved_read_line m_in_rri_func;
+ devcb_resolved_write_line m_out_tro_func;
+ devcb_resolved_write_line m_out_dr_func;
+ devcb_resolved_write_line m_out_tbre_func;
+ devcb_resolved_write_line m_out_tre_func;
// status
int m_dr;
@@ -160,11 +160,11 @@ private:
// receiver
UINT8 m_rbr;
- int m_rrc_count;
+ int m_rrc_count;
// transmitter
UINT8 m_tbr;
- int m_trc_count;
+ int m_trc_count;
// timers
emu_timer *m_rx_timer;
diff --git a/src/emu/machine/ins8154.c b/src/emu/machine/ins8154.c
index 57e37387cf9..e8853a88196 100644
--- a/src/emu/machine/ins8154.c
+++ b/src/emu/machine/ins8154.c
@@ -43,7 +43,7 @@ const device_type INS8154 = &device_creator<ins8154_device>;
//-------------------------------------------------
ins8154_device::ins8154_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, INS8154, "INS8154", tag, owner, clock)
+ : device_t(mconfig, INS8154, "INS8154", tag, owner, clock)
{
}
@@ -67,11 +67,11 @@ void ins8154_device::device_config_complete()
// or initialize to defaults if none provided
else
{
- memset(&m_in_a_cb, 0, sizeof(m_in_a_cb));
- memset(&m_in_b_cb, 0, sizeof(m_in_b_cb));
- memset(&m_out_a_cb, 0, sizeof(m_out_a_cb));
- memset(&m_out_b_cb, 0, sizeof(m_out_b_cb));
- memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
+ memset(&m_in_a_cb, 0, sizeof(m_in_a_cb));
+ memset(&m_in_b_cb, 0, sizeof(m_in_b_cb));
+ memset(&m_out_a_cb, 0, sizeof(m_out_a_cb));
+ memset(&m_out_b_cb, 0, sizeof(m_out_b_cb));
+ memset(&m_out_irq_cb, 0, sizeof(m_out_irq_cb));
}
}
diff --git a/src/emu/machine/ins8154.h b/src/emu/machine/ins8154.h
index 12b691baf5f..ba130f7be2d 100644
--- a/src/emu/machine/ins8154.h
+++ b/src/emu/machine/ins8154.h
@@ -55,11 +55,11 @@
struct ins8154_interface
{
- devcb_read8 m_in_a_cb;
- devcb_write8 m_out_a_cb;
- devcb_read8 m_in_b_cb;
- devcb_write8 m_out_b_cb;
- devcb_write_line m_out_irq_cb;
+ devcb_read8 m_in_a_cb;
+ devcb_write8 m_out_a_cb;
+ devcb_read8 m_in_b_cb;
+ devcb_write8 m_out_b_cb;
+ devcb_write_line m_out_irq_cb;
};
@@ -67,11 +67,11 @@ struct ins8154_interface
// ======================> ins8154_device
class ins8154_device : public device_t,
- public ins8154_interface
+ public ins8154_interface
{
public:
- // construction/destruction
- ins8154_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ins8154_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
UINT8 ins8154_r(UINT32 offset);
void ins8154_w(UINT32 offset, UINT8 data);
@@ -80,12 +80,12 @@ public:
void ins8154_portb_w(UINT32 offset, UINT8 data);
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
private:
diff --git a/src/emu/machine/ins8250.c b/src/emu/machine/ins8250.c
index 0b13058c775..0d7540a49aa 100644
--- a/src/emu/machine/ins8250.c
+++ b/src/emu/machine/ins8250.c
@@ -90,7 +90,7 @@ const device_type NS16550 = &device_creator<ns16550_device>;
ins8250_uart_device::ins8250_uart_device(const machine_config &mconfig, device_type type, const char* name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_serial_interface(mconfig, *this)
+ device_serial_interface(mconfig, *this)
{
}
@@ -113,7 +113,7 @@ ns16550_device::ns16550_device(const machine_config &mconfig, const char *tag, d
}
/* int's pending */
-#define COM_INT_PENDING_RECEIVED_DATA_AVAILABLE 0x0001
+#define COM_INT_PENDING_RECEIVED_DATA_AVAILABLE 0x0001
#define COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY 0x0002
#define COM_INT_PENDING_RECEIVER_LINE_STATUS 0x0004
#define COM_INT_PENDING_MODEM_STATUS_REGISTER 0x0008
@@ -267,7 +267,7 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
{
m_regs.mcr = data & 0x1f;
- if ( m_regs.mcr & 0x10 ) /* loopback test */
+ if ( m_regs.mcr & 0x10 ) /* loopback test */
{
data = ( ( m_regs.mcr & 0x0c ) << 4 ) | ( ( m_regs.mcr & 0x01 ) << 5 ) | ( ( m_regs.mcr & 0x02 ) << 3 );
if ( ( m_regs.msr & 0x20 ) != ( data & 0x20 ) )
@@ -288,13 +288,13 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
m_out_out2_func(m_regs.mcr & 8);
}
}
- break;
+ break;
case 5:
/*
- This register can be written, but if you write a 1 bit into any of
- bits 5 - 0, you could cause an interrupt if the appropriate IER bit
- is set.
- */
+ This register can be written, but if you write a 1 bit into any of
+ bits 5 - 0, you could cause an interrupt if the appropriate IER bit
+ is set.
+ */
m_regs.lsr = data;
tmp = 0;
@@ -306,10 +306,10 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
break;
case 6:
/*
- This register can be written, but if you write a 1 bit into any of
- bits 3 - 0, you could cause an interrupt if the appropriate IER bit
- is set.
- */
+ This register can be written, but if you write a 1 bit into any of
+ bits 3 - 0, you could cause an interrupt if the appropriate IER bit
+ is set.
+ */
m_regs.msr = data;
if ( m_regs.msr & 0x0f )
@@ -317,7 +317,7 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
break;
case 7:
m_regs.scr = data;
- break;
+ break;
}
}
@@ -348,20 +348,20 @@ READ8_MEMBER( ins8250_uart_device::ins8250_r )
data = (m_regs.dl >> 8);
else
data = m_regs.ier & 0x0f;
- break;
+ break;
case 2:
data = m_regs.iir;
/* The documentation says that reading this register will
- clear the int if this is the source of the int */
+ clear the int if this is the source of the int */
if ( m_regs.ier & COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY )
clear_int(COM_INT_PENDING_TRANSMITTER_HOLDING_REGISTER_EMPTY);
- break;
+ break;
case 3:
data = m_regs.lcr;
- break;
+ break;
case 4:
data = m_regs.mcr;
- break;
+ break;
case 5:
data = m_regs.lsr;
if( m_regs.lsr & 0x1f )
@@ -369,7 +369,7 @@ READ8_MEMBER( ins8250_uart_device::ins8250_r )
/* reading line status register clears int */
clear_int(COM_INT_PENDING_RECEIVER_LINE_STATUS);
- break;
+ break;
case 6:
data = m_regs.msr;
m_regs.msr &= 0xf0; /* reset delta values */
@@ -382,7 +382,7 @@ READ8_MEMBER( ins8250_uart_device::ins8250_r )
data = m_regs.scr;
break;
}
- return data;
+ return data;
}
void ns16550_device::rcv_complete()
diff --git a/src/emu/machine/ins8250.h b/src/emu/machine/ins8250.h
index b3ed0349b55..df21b19d3b0 100644
--- a/src/emu/machine/ins8250.h
+++ b/src/emu/machine/ins8250.h
@@ -14,12 +14,12 @@
***************************************************************************/
struct ins8250_interface
{
- devcb_write_line m_out_tx_cb;
- devcb_write_line m_out_dtr_cb;
- devcb_write_line m_out_rts_cb;
- devcb_write_line m_out_int_cb;
- devcb_write_line m_out_out1_cb;
- devcb_write_line m_out_out2_cb;
+ devcb_write_line m_out_tx_cb;
+ devcb_write_line m_out_dtr_cb;
+ devcb_write_line m_out_rts_cb;
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_out1_cb;
+ devcb_write_line m_out_out2_cb;
};
class ins8250_uart_device : public device_t,
@@ -77,12 +77,12 @@ protected:
private:
UINT8 m_int_pending;
- devcb_resolved_write_line m_out_tx_func;
- devcb_resolved_write_line m_out_dtr_func;
- devcb_resolved_write_line m_out_rts_func;
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_write_line m_out_out1_func;
- devcb_resolved_write_line m_out_out2_func;
+ devcb_resolved_write_line m_out_tx_func;
+ devcb_resolved_write_line m_out_dtr_func;
+ devcb_resolved_write_line m_out_rts_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_out1_func;
+ devcb_resolved_write_line m_out_out2_func;
void update_interrupt();
void update_clock();
diff --git a/src/emu/machine/intelfsh.c b/src/emu/machine/intelfsh.c
index 820285e9f28..f6c5b432f98 100644
--- a/src/emu/machine/intelfsh.c
+++ b/src/emu/machine/intelfsh.c
@@ -21,19 +21,19 @@
enum
{
- FM_NORMAL, // normal read/write
- FM_READID, // read ID
- FM_READSTATUS, // read status
- FM_WRITEPART1, // first half of programming, awaiting second
- FM_CLEARPART1, // first half of clear, awaiting second
- FM_SETMASTER, // first half of set master lock, awaiting on/off
- FM_READAMDID1, // part 1 of alt ID sequence
- FM_READAMDID2, // part 2 of alt ID sequence
- FM_READAMDID3, // part 3 of alt ID sequence
- FM_ERASEAMD1, // part 1 of AMD erase sequence
- FM_ERASEAMD2, // part 2 of AMD erase sequence
- FM_ERASEAMD3, // part 3 of AMD erase sequence
- FM_ERASEAMD4, // part 4 of AMD erase sequence
+ FM_NORMAL, // normal read/write
+ FM_READID, // read ID
+ FM_READSTATUS, // read status
+ FM_WRITEPART1, // first half of programming, awaiting second
+ FM_CLEARPART1, // first half of clear, awaiting second
+ FM_SETMASTER, // first half of set master lock, awaiting on/off
+ FM_READAMDID1, // part 1 of alt ID sequence
+ FM_READAMDID2, // part 2 of alt ID sequence
+ FM_READAMDID3, // part 3 of alt ID sequence
+ FM_ERASEAMD1, // part 1 of AMD erase sequence
+ FM_ERASEAMD2, // part 2 of AMD erase sequence
+ FM_ERASEAMD3, // part 3 of AMD erase sequence
+ FM_ERASEAMD4, // part 4 of AMD erase sequence
FM_BYTEPROGRAM,
FM_BANKSELECT,
FM_WRITEPAGEATMEL
@@ -145,20 +145,20 @@ ADDRESS_MAP_END
intelfsh_device::intelfsh_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant)
: device_t(mconfig, type, name, tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_type(variant),
- m_size(0),
- m_bits(8),
- m_device_id(0),
- m_maker_id(0),
- m_sector_is_4k(false),
- m_status(0x80),
- m_erase_sector(0),
- m_flash_mode(FM_NORMAL),
- m_flash_master_lock(false),
- m_timer(NULL),
- m_bank(0)
+ device_memory_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_type(variant),
+ m_size(0),
+ m_bits(8),
+ m_device_id(0),
+ m_maker_id(0),
+ m_sector_is_4k(false),
+ m_status(0x80),
+ m_erase_sector(0),
+ m_flash_mode(FM_NORMAL),
+ m_flash_master_lock(false),
+ m_timer(NULL),
+ m_bank(0)
{
address_map_constructor map = NULL;
@@ -496,7 +496,7 @@ UINT32 intelfsh_device::read_full(UINT32 address)
//used in Fujitsu 29DL16X 8bits mode
switch (address)
{
- case 0: data = m_maker_id; break;
+ case 0: data = m_maker_id; break;
case 2: data = m_device_id; break;
case 4: data = 0; break;
}
@@ -505,7 +505,7 @@ UINT32 intelfsh_device::read_full(UINT32 address)
{
switch (address)
{
- case 0: data = m_maker_id; break;
+ case 0: data = m_maker_id; break;
case 1: data = m_device_id; break;
case 2: data = 0; break;
}
@@ -516,7 +516,7 @@ UINT32 intelfsh_device::read_full(UINT32 address)
{
switch (address)
{
- case 0: data = m_maker_id; break;
+ case 0: data = m_maker_id; break;
case 2: data = m_device_id; break;
case 4: data = 0; break;
}
@@ -525,13 +525,13 @@ UINT32 intelfsh_device::read_full(UINT32 address)
{
switch (address)
{
- case 0: // maker ID
+ case 0: // maker ID
data = m_maker_id;
break;
- case 1: // chip ID
+ case 1: // chip ID
data = m_device_id;
break;
- case 2: // block lock config
+ case 2: // block lock config
data = 0; // we don't support this yet
break;
case 3: // master lock config
@@ -599,30 +599,30 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
switch( data & 0xff )
{
case 0xf0:
- case 0xff: // reset chip mode
+ case 0xff: // reset chip mode
m_flash_mode = FM_NORMAL;
break;
- case 0x90: // read ID
+ case 0x90: // read ID
m_flash_mode = FM_READID;
break;
case 0x40:
- case 0x10: // program
+ case 0x10: // program
m_flash_mode = FM_WRITEPART1;
break;
- case 0x50: // clear status reg
+ case 0x50: // clear status reg
m_status = 0x80;
m_flash_mode = FM_READSTATUS;
break;
- case 0x20: // block erase
+ case 0x20: // block erase
m_flash_mode = FM_CLEARPART1;
break;
- case 0x60: // set master lock
+ case 0x60: // set master lock
m_flash_mode = FM_SETMASTER;
break;
- case 0x70: // read status
+ case 0x70: // read status
m_flash_mode = FM_READSTATUS;
break;
- case 0xaa: // AMD ID select part 1
+ case 0xaa: // AMD ID select part 1
if( ( address & 0xfff ) == 0x555 )
{
m_flash_mode = FM_READAMDID1;
@@ -779,7 +779,7 @@ void intelfsh_device::write_full(UINT32 address, UINT32 data)
break;
case FM_ERASEAMD3:
if( (( address & 0xfff ) == 0x555 && ( data & 0xff ) == 0x10 ) ||
- (( address & 0xfff ) == 0xaaa && ( data & 0xff ) == 0x10 ) )
+ (( address & 0xfff ) == 0xaaa && ( data & 0xff ) == 0x10 ) )
{
// chip erase
for (offs_t offs = 0; offs < m_size; offs++)
diff --git a/src/emu/machine/intelfsh.h b/src/emu/machine/intelfsh.h
index 0e386db4923..2ce1fdf6f5e 100644
--- a/src/emu/machine/intelfsh.h
+++ b/src/emu/machine/intelfsh.h
@@ -73,7 +73,7 @@ class intelfsh_device;
// ======================> intelfsh_device
-class intelfsh_device : public device_t,
+class intelfsh_device : public device_t,
public device_memory_interface,
public device_nvram_interface
{
@@ -125,23 +125,23 @@ protected:
void write_full(UINT32 offset, UINT32 data);
// configuration state
- address_space_config m_space_config;
- UINT32 m_type;
- INT32 m_size;
- UINT8 m_bits;
- UINT8 m_device_id;
- UINT8 m_maker_id;
- bool m_sector_is_4k;
- UINT8 m_page_size;
+ address_space_config m_space_config;
+ UINT32 m_type;
+ INT32 m_size;
+ UINT8 m_bits;
+ UINT8 m_device_id;
+ UINT8 m_maker_id;
+ bool m_sector_is_4k;
+ UINT8 m_page_size;
// internal state
- UINT8 m_status;
- INT32 m_erase_sector;
- INT32 m_flash_mode;
- bool m_flash_master_lock;
- emu_timer * m_timer;
- INT32 m_bank;
- UINT8 m_byte_count;
+ UINT8 m_status;
+ INT32 m_erase_sector;
+ INT32 m_flash_mode;
+ bool m_flash_master_lock;
+ emu_timer * m_timer;
+ INT32 m_bank;
+ UINT8 m_byte_count;
};
diff --git a/src/emu/machine/jvsdev.c b/src/emu/machine/jvsdev.c
index d80169d0920..22ef6abb9d5 100644
--- a/src/emu/machine/jvsdev.c
+++ b/src/emu/machine/jvsdev.c
@@ -251,4 +251,3 @@ void jvs_device::handle_output(const char *tag, UINT8 id, UINT8 val)
machine().root_device().ioport(tag)->write_safe(jvs_outputs, m);
}
-
diff --git a/src/emu/machine/jvshost.c b/src/emu/machine/jvshost.c
index 438c75b538d..819d20ca736 100644
--- a/src/emu/machine/jvshost.c
+++ b/src/emu/machine/jvshost.c
@@ -154,4 +154,3 @@ void jvs_host::decode(UINT8 *buffer, UINT32 &size)
}
size = pos;
}
-
diff --git a/src/emu/machine/k033906.c b/src/emu/machine/k033906.c
index 535927d3efe..5570ba3ac3e 100644
--- a/src/emu/machine/k033906.c
+++ b/src/emu/machine/k033906.c
@@ -22,7 +22,7 @@ const device_type K033906 = &device_creator<k033906_device>;
//-------------------------------------------------
k033906_device::k033906_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, K033906, "Konami 033906", tag, owner, clock)
+ : device_t(mconfig, K033906, "Konami 033906", tag, owner, clock)
{
}
@@ -78,10 +78,10 @@ UINT32 k033906_device::k033906_reg_r(int reg)
{
switch (reg)
{
- case 0x00: return 0x0001121a; // PCI Vendor ID (0x121a = 3dfx), Device ID (0x0001 = Voodoo)
- case 0x02: return 0x04000000; // Revision ID
- case 0x04: return m_reg[0x04]; // memBaseAddr
- case 0x0f: return m_reg[0x0f]; // interrupt_line, interrupt_pin, min_gnt, max_lat
+ case 0x00: return 0x0001121a; // PCI Vendor ID (0x121a = 3dfx), Device ID (0x0001 = Voodoo)
+ case 0x02: return 0x04000000; // Revision ID
+ case 0x04: return m_reg[0x04]; // memBaseAddr
+ case 0x0f: return m_reg[0x0f]; // interrupt_line, interrupt_pin, min_gnt, max_lat
default:
fatalerror("%s: k033906_reg_r: %08X\n", machine().describe_context(), reg);
@@ -96,10 +96,10 @@ void k033906_device::k033906_reg_w(int reg, UINT32 data)
case 0x00:
break;
- case 0x01: // command register
+ case 0x01: // command register
break;
- case 0x04: // memBaseAddr
+ case 0x04: // memBaseAddr
{
if (data == 0xffffffff)
{
@@ -112,23 +112,23 @@ void k033906_device::k033906_reg_w(int reg, UINT32 data)
break;
}
- case 0x0f: // interrupt_line, interrupt_pin, min_gnt, max_lat
+ case 0x0f: // interrupt_line, interrupt_pin, min_gnt, max_lat
{
m_reg[0x0f] = data;
break;
}
- case 0x10: // initEnable
+ case 0x10: // initEnable
{
voodoo_set_init_enable(m_voodoo, data);
break;
}
- case 0x11: // busSnoop0
- case 0x12: // busSnoop1
+ case 0x11: // busSnoop0
+ case 0x12: // busSnoop1
break;
- case 0x38: // ???
+ case 0x38: // ???
break;
default:
diff --git a/src/emu/machine/k033906.h b/src/emu/machine/k033906.h
index 2e2521ff52c..a841c27495d 100644
--- a/src/emu/machine/k033906.h
+++ b/src/emu/machine/k033906.h
@@ -39,23 +39,23 @@ struct k033906_interface
// ======================> k033906_device
class k033906_device : public device_t,
- public k033906_interface
+ public k033906_interface
{
public:
- // construction/destruction
- k033906_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ k033906_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
UINT32 k033906_r(UINT32 offset);
void k033906_w(UINT32 offset, UINT32 data, UINT32 mem_mask);
void k033906_set_reg(UINT8 state);
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset() { }
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset() { }
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
private:
@@ -66,7 +66,7 @@ private:
UINT32 * m_reg;
UINT32 * m_ram;
- int m_reg_set; // 1 = access reg / 0 = access ram
+ int m_reg_set; // 1 = access reg / 0 = access ram
device_t *m_voodoo;
};
@@ -86,4 +86,4 @@ extern DECLARE_WRITE32_DEVICE_HANDLER( k033906_w );
extern WRITE_LINE_DEVICE_HANDLER( k033906_set_reg );
-#endif /* __K033906_H__ */
+#endif /* __K033906_H__ */
diff --git a/src/emu/machine/k053252.c b/src/emu/machine/k053252.c
index 1e6a432444f..64c57a94f09 100644
--- a/src/emu/machine/k053252.c
+++ b/src/emu/machine/k053252.c
@@ -113,9 +113,9 @@ static void k053252_res_change( device_t *device )
if(k053252->screen != NULL)
{
if(k053252->hc && k053252->vc &&
- k053252->hbp && k053252->hfp &&
- k053252->vbp && k053252->vfp &&
- k053252->hsw && k053252->vsw) //safety checks
+ k053252->hbp && k053252->hfp &&
+ k053252->vbp && k053252->vfp &&
+ k053252->hsw && k053252->vsw) //safety checks
{
rectangle visarea;
//(HC+1) - HFP - HBP - 8*(HSW+1)
@@ -265,6 +265,3 @@ void k053252_device::device_reset()
{
DEVICE_RESET_NAME( k053252 )(this);
}
-
-
-
diff --git a/src/emu/machine/k053252.h b/src/emu/machine/k053252.h
index 8a1f352f063..25e0266cf4f 100644
--- a/src/emu/machine/k053252.h
+++ b/src/emu/machine/k053252.h
@@ -49,9 +49,9 @@ struct k053252_interface
/** Konami 053252 **/
/* CRT and interrupt control unit */
-DECLARE_READ8_DEVICE_HANDLER( k053252_r ); // CCU registers
+DECLARE_READ8_DEVICE_HANDLER( k053252_r ); // CCU registers
DECLARE_WRITE8_DEVICE_HANDLER( k053252_w );
-#endif /* __K033906_H__ */
+#endif /* __K033906_H__ */
diff --git a/src/emu/machine/k056230.c b/src/emu/machine/k056230.c
index 0028da56a1b..28b0a335efb 100644
--- a/src/emu/machine/k056230.c
+++ b/src/emu/machine/k056230.c
@@ -21,7 +21,7 @@ const device_type K056230 = &device_creator<k056230_device>;
//-------------------------------------------------
k056230_device::k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, K056230, "Konami 056230", tag, owner, clock)
+ : device_t(mconfig, K056230, "Konami 056230", tag, owner, clock)
{
}
@@ -76,7 +76,7 @@ READ8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_r)
{
switch (offset)
{
- case 0: // Status register
+ case 0: // Status register
{
return 0x08;
}
@@ -105,11 +105,11 @@ WRITE8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_w)
{
switch(offset)
{
- case 0: // Mode register
+ case 0: // Mode register
{
break;
}
- case 1: // Control register
+ case 1: // Control register
{
if(data & 0x20)
{
@@ -127,7 +127,7 @@ WRITE8_DEVICE_HANDLER_TRAMPOLINE(k056230, k056230_w)
// k056230->cpu->execute().set_input_line(INPUT_LINE_IRQ2, CLEAR_LINE);
break;
}
- case 2: // Sub ID register
+ case 2: // Sub ID register
{
break;
}
diff --git a/src/emu/machine/k056230.h b/src/emu/machine/k056230.h
index 99a7df8957b..beeaf66ef5e 100644
--- a/src/emu/machine/k056230.h
+++ b/src/emu/machine/k056230.h
@@ -40,11 +40,11 @@ struct k056230_interface
// ======================> k056230_device
class k056230_device : public device_t,
- public k056230_interface
+ public k056230_interface
{
public:
- // construction/destruction
- k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
UINT32 lanc_ram_r(UINT32 offset);
void lanc_ram_w(UINT32 offset, UINT32 data, UINT32 mem_mask);
@@ -55,12 +55,12 @@ public:
static TIMER_CALLBACK( network_irq_clear_callback );
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset() { }
- virtual void device_post_load() { }
- virtual void device_clock_changed() { }
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset() { }
+ virtual void device_post_load() { }
+ virtual void device_clock_changed() { }
private:
@@ -86,4 +86,4 @@ extern DECLARE_READ8_DEVICE_HANDLER( k056230_r );
extern DECLARE_WRITE8_DEVICE_HANDLER( k056230_w );
-#endif /* __K056230_H__ */
+#endif /* __K056230_H__ */
diff --git a/src/emu/machine/laserdsc.c b/src/emu/machine/laserdsc.c
index 40b04c63673..073e58389f8 100644
--- a/src/emu/machine/laserdsc.c
+++ b/src/emu/machine/laserdsc.c
@@ -51,7 +51,7 @@
// DEBUGGING
//**************************************************************************
-#define LOG_SLIDER 0
+#define LOG_SLIDER 0
@@ -60,15 +60,15 @@
//**************************************************************************
// these specs code from IEC 60857, for NTSC players
-const UINT32 LEAD_IN_MIN_RADIUS_IN_UM = 53500; // 53.5 mm
-const UINT32 PROGRAM_MIN_RADIUS_IN_UM = 55000; // 55 mm
-const UINT32 PROGRAM_MAX_RADIUS_IN_UM = 145000; // 145 mm
-const UINT32 LEAD_OUT_MIN_SIZE_IN_UM = 2000; // 2 mm
+const UINT32 LEAD_IN_MIN_RADIUS_IN_UM = 53500; // 53.5 mm
+const UINT32 PROGRAM_MIN_RADIUS_IN_UM = 55000; // 55 mm
+const UINT32 PROGRAM_MAX_RADIUS_IN_UM = 145000; // 145 mm
+const UINT32 LEAD_OUT_MIN_SIZE_IN_UM = 2000; // 2 mm
// the track pitch is defined as a range; we pick a nominal pitch
// that ensures we can fit 54,000 tracks
-const UINT32 MIN_TRACK_PITCH_IN_NM = 1400; // 1.4 um
-const UINT32 MAX_TRACK_PITCH_IN_NM = 2000; // 2 um
+const UINT32 MIN_TRACK_PITCH_IN_NM = 1400; // 1.4 um
+const UINT32 MAX_TRACK_PITCH_IN_NM = 2000; // 2 um
const UINT32 NOMINAL_TRACK_PITCH_IN_NM = (PROGRAM_MAX_RADIUS_IN_UM - PROGRAM_MIN_RADIUS_IN_UM) * 1000 / 54000;
// we simulate extra lead-in and lead-out tracks
@@ -88,39 +88,39 @@ const UINT32 VIRTUAL_LEAD_OUT_TRACKS = LEAD_OUT_MIN_SIZE_IN_UM * 1000 / NOMINAL_
laserdisc_device::laserdisc_device(const machine_config &mconfig, device_type type, const char *name, const char *shortname, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, shortname, tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_screen_name(NULL),
- m_overwidth(0),
- m_overheight(0),
- m_overclip(0, -1, 0, -1),
- m_disc(NULL),
- m_width(0),
- m_height(0),
- m_fps_times_1million(0),
- m_samplerate(0),
- m_readresult(CHDERR_NONE),
- m_chdtracks(0),
- m_work_queue(osd_work_queue_alloc(WORK_QUEUE_FLAG_IO)),
- m_audiosquelch(0),
- m_videosquelch(0),
- m_fieldnum(0),
- m_curtrack(0),
- m_maxtrack(0),
- m_attospertrack(0),
- m_sliderupdate(attotime::zero),
- m_videoindex(0),
- m_stream(NULL),
- m_audiobufsize(0),
- m_audiobufin(0),
- m_audiobufout(0),
- m_audiocursamples(0),
- m_audiomaxsamples(0),
- m_videoenable(false),
- m_videotex(NULL),
- m_videopalette(NULL),
- m_overenable(false),
- m_overindex(0),
- m_overtex(NULL)
+ device_sound_interface(mconfig, *this),
+ m_screen_name(NULL),
+ m_overwidth(0),
+ m_overheight(0),
+ m_overclip(0, -1, 0, -1),
+ m_disc(NULL),
+ m_width(0),
+ m_height(0),
+ m_fps_times_1million(0),
+ m_samplerate(0),
+ m_readresult(CHDERR_NONE),
+ m_chdtracks(0),
+ m_work_queue(osd_work_queue_alloc(WORK_QUEUE_FLAG_IO)),
+ m_audiosquelch(0),
+ m_videosquelch(0),
+ m_fieldnum(0),
+ m_curtrack(0),
+ m_maxtrack(0),
+ m_attospertrack(0),
+ m_sliderupdate(attotime::zero),
+ m_videoindex(0),
+ m_stream(NULL),
+ m_audiobufsize(0),
+ m_audiobufin(0),
+ m_audiobufout(0),
+ m_audiocursamples(0),
+ m_audiomaxsamples(0),
+ m_videoenable(false),
+ m_videotex(NULL),
+ m_videopalette(NULL),
+ m_overenable(false),
+ m_overindex(0),
+ m_overtex(NULL)
{
// initialize overlay_config
m_orig_config.m_overposx = m_orig_config.m_overposy = 0.0f;
@@ -583,7 +583,7 @@ INT32 laserdisc_device::generic_update(const vbi_metadata &vbi, int fieldnum, at
case LDSTATE_EJECTING:
// when time expires, switch to the ejected state
if (curtime >= m_player_state.m_endtime)
- newstate.m_state = LDSTATE_EJECTED;
+ newstate.m_state = LDSTATE_EJECTED;
break;
case LDSTATE_EJECTED:
@@ -597,14 +597,14 @@ INT32 laserdisc_device::generic_update(const vbi_metadata &vbi, int fieldnum, at
case LDSTATE_LOADING:
// when time expires, switch to the spinup state
if (curtime >= m_player_state.m_endtime)
- newstate.m_state = LDSTATE_SPINUP;
+ newstate.m_state = LDSTATE_SPINUP;
advanceby = -GENERIC_SEARCH_SPEED;
break;
case LDSTATE_SPINUP:
// when time expires, switch to the playing state
if (curtime >= m_player_state.m_endtime)
- newstate.m_state = LDSTATE_PLAYING;
+ newstate.m_state = LDSTATE_PLAYING;
advanceby = -GENERIC_SEARCH_SPEED;
break;
@@ -612,8 +612,8 @@ INT32 laserdisc_device::generic_update(const vbi_metadata &vbi, int fieldnum, at
// if he hit the start of a frame, switch to paused state
if (is_start_of_frame(vbi))
{
- newstate.m_state = LDSTATE_PAUSED;
- newstate.m_param = fieldnum;
+ newstate.m_state = LDSTATE_PAUSED;
+ newstate.m_param = fieldnum;
}
// else advance until we hit it
@@ -631,8 +631,8 @@ INT32 laserdisc_device::generic_update(const vbi_metadata &vbi, int fieldnum, at
// if we hit the target frame, switch to the paused state
if (m_player_state.m_param > 0 && is_start_of_frame(vbi) && frame_from_metadata(vbi) == m_player_state.m_param)
{
- newstate.m_state = LDSTATE_PAUSED;
- newstate.m_param = fieldnum;
+ newstate.m_state = LDSTATE_PAUSED;
+ newstate.m_param = fieldnum;
}
// otherwise after the second field of each frame
@@ -685,14 +685,14 @@ INT32 laserdisc_device::generic_update(const vbi_metadata &vbi, int fieldnum, at
if (is_start_of_frame(vbi))
{
advanceby = (fieldnum == 1) ? -1 : -2;
- newstate.m_state = LDSTATE_PAUSING;
+ newstate.m_state = LDSTATE_PAUSING;
}
break;
case LDSTATE_STEPPING_FORWARD:
// wait for the first field of the frame and then switch to pausing state
if (is_start_of_frame(vbi))
- newstate.m_state = LDSTATE_PAUSING;
+ newstate.m_state = LDSTATE_PAUSING;
break;
case LDSTATE_SEEKING:
@@ -700,8 +700,8 @@ INT32 laserdisc_device::generic_update(const vbi_metadata &vbi, int fieldnum, at
frame = frame_from_metadata(vbi);
if (m_player_state.m_substate == 1 && is_start_of_frame(vbi) && frame == m_player_state.m_param)
{
- newstate.m_state = LDSTATE_PAUSED;
- newstate.m_param = fieldnum;
+ newstate.m_state = LDSTATE_PAUSED;
+ newstate.m_param = fieldnum;
}
// otherwise, if we got frame data from the VBI, update our seeking logic
@@ -831,9 +831,9 @@ void laserdisc_device::init_video()
// make a copy of the bitmap that clips out the VBI and horizontal blanking areas
frame.m_visbitmap.wrap(&frame.m_bitmap.pix16(44, frame.m_bitmap.width() * 8 / 720),
- frame.m_bitmap.width() - 2 * frame.m_bitmap.width() * 8 / 720,
- frame.m_bitmap.height() - 44,
- frame.m_bitmap.rowpixels());
+ frame.m_bitmap.width() - 2 * frame.m_bitmap.width() * 8 / 720,
+ frame.m_bitmap.height() - 44,
+ frame.m_bitmap.rowpixels());
frame.m_visbitmap.set_palette(m_videopalette);
}
@@ -1245,4 +1245,3 @@ void laserdisc_device::config_save(int config_type, xml_data_node *parentnode)
xml_delete_node(ldnode);
}
}
-
diff --git a/src/emu/machine/laserdsc.h b/src/emu/machine/laserdsc.h
index add1c2e8b5d..f595d928549 100644
--- a/src/emu/machine/laserdsc.h
+++ b/src/emu/machine/laserdsc.h
@@ -53,32 +53,32 @@
// laserdisc field codes
enum laserdisc_field_code
{
- LASERDISC_CODE_WHITE_FLAG = 11, // boolean white flag
- LASERDISC_CODE_LINE16 = 16, // 24-bit line 16 code
- LASERDISC_CODE_LINE17 = 17, // 24-bit line 17 code
- LASERDISC_CODE_LINE18 = 18, // 24-bit line 18 code
- LASERDISC_CODE_LINE1718 = 1718 // 24-bit best of line 17/18 code
+ LASERDISC_CODE_WHITE_FLAG = 11, // boolean white flag
+ LASERDISC_CODE_LINE16 = 16, // 24-bit line 16 code
+ LASERDISC_CODE_LINE17 = 17, // 24-bit line 17 code
+ LASERDISC_CODE_LINE18 = 18, // 24-bit line 18 code
+ LASERDISC_CODE_LINE1718 = 1718 // 24-bit best of line 17/18 code
};
// special frame and chapter numbers from VBI conversion
-#define FRAME_NOT_PRESENT -2 // no frame number information present
-#define FRAME_LEAD_IN -1 // lead-in code detected
-#define FRAME_LEAD_OUT 99999 // lead-out code detected
-#define CHAPTER_NOT_PRESENT -2 // no chapter number information present
-#define CHAPTER_LEAD_IN -1 // lead-in code detected
-#define CHAPTER_LEAD_OUT 100 // lead-out code detected
+#define FRAME_NOT_PRESENT -2 // no frame number information present
+#define FRAME_LEAD_IN -1 // lead-in code detected
+#define FRAME_LEAD_OUT 99999 // lead-out code detected
+#define CHAPTER_NOT_PRESENT -2 // no chapter number information present
+#define CHAPTER_LEAD_IN -1 // lead-in code detected
+#define CHAPTER_LEAD_OUT 100 // lead-out code detected
// generic head movement speeds; use player-specific information where appropriate
-#define GENERIC_SLOW_SPEED (5) // 1/5 normal speed
-#define GENERIC_FAST_SPEED (3) // 3x normal speed
-#define GENERIC_SCAN_SPEED (50) // 50x normal speed
-#define GENERIC_SEARCH_SPEED (5000) // 5000x normal speed
+#define GENERIC_SLOW_SPEED (5) // 1/5 normal speed
+#define GENERIC_FAST_SPEED (3) // 3x normal speed
+#define GENERIC_SCAN_SPEED (50) // 50x normal speed
+#define GENERIC_SEARCH_SPEED (5000) // 5000x normal speed
// generic timings; use player-specific information where appropriate
-#define GENERIC_EJECT_TIME (attotime::from_seconds(5))
-#define GENERIC_SPINUP_TIME (attotime::from_seconds(2))
-#define GENERIC_LOAD_TIME (attotime::from_seconds(5))
+#define GENERIC_EJECT_TIME (attotime::from_seconds(5))
+#define GENERIC_SPINUP_TIME (attotime::from_seconds(2))
+#define GENERIC_LOAD_TIME (attotime::from_seconds(5))
@@ -135,7 +135,7 @@ enum laserdisc_field_code
// MACROS
//**************************************************************************
-#define SCANNING_PARAM(speed,duration) (((speed) << 8) | ((duration) & 0xff))
+#define SCANNING_PARAM(speed,duration) (((speed) << 8) | ((duration) & 0xff))
@@ -156,17 +156,17 @@ typedef delegate<void (laserdisc_device &device, int samplerate, int samples, co
// overlay configuration
struct laserdisc_overlay_config
{
- float m_overposx;
- float m_overposy;
- float m_overscalex;
- float m_overscaley;
+ float m_overposx;
+ float m_overposy;
+ float m_overscalex;
+ float m_overscaley;
};
// ======================> laserdisc_device
// base laserdisc class
-class laserdisc_device : public device_t,
+class laserdisc_device : public device_t,
public device_sound_interface,
public laserdisc_overlay_config
{
@@ -216,53 +216,53 @@ protected:
// common laserdisc states
enum player_state
{
- LDSTATE_NONE, // unspecified state
- LDSTATE_EJECTING, // in the process of ejecting
- LDSTATE_EJECTED, // fully ejected
- LDSTATE_PARKED, // head parked in lead-in
- LDSTATE_LOADING, // loading from ejected state
- LDSTATE_SPINUP, // spinning up
- LDSTATE_PAUSING, // looking for a frame boundary to pause
- LDSTATE_PAUSED, // found a frame boundary; now paused
+ LDSTATE_NONE, // unspecified state
+ LDSTATE_EJECTING, // in the process of ejecting
+ LDSTATE_EJECTED, // fully ejected
+ LDSTATE_PARKED, // head parked in lead-in
+ LDSTATE_LOADING, // loading from ejected state
+ LDSTATE_SPINUP, // spinning up
+ LDSTATE_PAUSING, // looking for a frame boundary to pause
+ LDSTATE_PAUSED, // found a frame boundary; now paused
// parameter specifies the fieldnum of the first frame
- LDSTATE_PLAYING, // playing forward normally, with audio
+ LDSTATE_PLAYING, // playing forward normally, with audio
// parameter specifies the target frame, or 0 if none
- LDSTATE_PLAYING_SLOW_REVERSE, // playing slow in the reverse direction, with no audio
+ LDSTATE_PLAYING_SLOW_REVERSE, // playing slow in the reverse direction, with no audio
// parameter specifies the number of times to repeat each track
- LDSTATE_PLAYING_SLOW_FORWARD, // playing slow in the forward direction, with no audio
+ LDSTATE_PLAYING_SLOW_FORWARD, // playing slow in the forward direction, with no audio
// parameter specifies the number of times to repeat each track
- LDSTATE_PLAYING_FAST_REVERSE, // playing fast in the reverse direction, with no audio
+ LDSTATE_PLAYING_FAST_REVERSE, // playing fast in the reverse direction, with no audio
// parameter specifies the number of frames to skip backwards after each frame
- LDSTATE_PLAYING_FAST_FORWARD, // playing fast in the forward direction, with no audio
+ LDSTATE_PLAYING_FAST_FORWARD, // playing fast in the forward direction, with no audio
// parameter specifies the number of frames to skip forwards after each frame
- LDSTATE_STEPPING_REVERSE, // single frame stepping in the reverse direction
- LDSTATE_STEPPING_FORWARD, // single frame stepping in the forward direction
- LDSTATE_SCANNING, // scanning in the forward or reverse direction
+ LDSTATE_STEPPING_REVERSE, // single frame stepping in the reverse direction
+ LDSTATE_STEPPING_FORWARD, // single frame stepping in the forward direction
+ LDSTATE_SCANNING, // scanning in the forward or reverse direction
// parameter(0:7) controls how many vsyncs until revert to savestate
// parameter(8:31) specifies the speed
- LDSTATE_SEEKING, // seeking to a specific frame
+ LDSTATE_SEEKING, // seeking to a specific frame
// parameter specifies the target frame
- LDSTATE_OTHER // other states start here
+ LDSTATE_OTHER // other states start here
};
// slider position
enum slider_position
{
- SLIDER_MINIMUM, // at the minimum value
- SLIDER_VIRTUAL_LEADIN, // within the virtual lead-in area
- SLIDER_CHD, // within the boundaries of the CHD
- SLIDER_OUTSIDE_CHD, // outside of the CHD area but before the virtual lead-out area
- SLIDER_VIRTUAL_LEADOUT, // within the virtual lead-out area
- SLIDER_MAXIMUM // at the maximum value
+ SLIDER_MINIMUM, // at the minimum value
+ SLIDER_VIRTUAL_LEADIN, // within the virtual lead-in area
+ SLIDER_CHD, // within the boundaries of the CHD
+ SLIDER_OUTSIDE_CHD, // outside of the CHD area but before the virtual lead-out area
+ SLIDER_VIRTUAL_LEADOUT, // within the virtual lead-out area
+ SLIDER_MAXIMUM // at the maximum value
};
// information about the current player state
struct player_state_info
{
- player_state m_state; // current state
- INT32 m_substate; // internal sub-state; starts at 0 on any state change
- INT32 m_param; // parameter for current state
- attotime m_endtime; // minimum ending time for current state
+ player_state m_state; // current state
+ INT32 m_substate; // internal sub-state; starts at 0 on any state change
+ INT32 m_param; // parameter for current state
+ attotime m_endtime; // minimum ending time for current state
};
// subclass overrides
@@ -293,17 +293,17 @@ protected:
int frame_from_metadata(const vbi_metadata &metadata);
int chapter_from_metadata(const vbi_metadata &metadata);
- player_state_info m_player_state; // active state
- player_state_info m_saved_state; // saved state during temporary operations
+ player_state_info m_player_state; // active state
+ player_state_info m_saved_state; // saved state during temporary operations
private:
// internal type definitions
struct frame_data
{
- bitmap_yuy16 m_bitmap; // cached bitmap
- bitmap_yuy16 m_visbitmap; // wrapper around bitmap with only visible lines
- UINT8 m_numfields; // number of fields in this frame
- INT32 m_lastfield; // last absolute field number
+ bitmap_yuy16 m_bitmap; // cached bitmap
+ bitmap_yuy16 m_visbitmap; // wrapper around bitmap with only visible lines
+ UINT8 m_numfields; // number of fields in this frame
+ INT32 m_lastfield; // last absolute field number
};
// internal helpers
@@ -322,68 +322,68 @@ private:
void config_save(int config_type, xml_data_node *parentnode);
// configuration
- laserdisc_get_disc_delegate m_getdisc_callback;
- laserdisc_audio_delegate m_audio_callback; // audio streaming callback
- const char * m_screen_name; // name of the screen device
- laserdisc_overlay_config m_orig_config; // original overlay configuration
- UINT32 m_overwidth; // overlay screen width
- UINT32 m_overheight; // overlay screen height
- rectangle m_overclip; // overlay visarea
+ laserdisc_get_disc_delegate m_getdisc_callback;
+ laserdisc_audio_delegate m_audio_callback; // audio streaming callback
+ const char * m_screen_name; // name of the screen device
+ laserdisc_overlay_config m_orig_config; // original overlay configuration
+ UINT32 m_overwidth; // overlay screen width
+ UINT32 m_overheight; // overlay screen height
+ rectangle m_overclip; // overlay visarea
screen_update_ind16_delegate m_overupdate_ind16; // overlay update delegate
screen_update_rgb32_delegate m_overupdate_rgb32; // overlay update delegate
// disc parameters
- chd_file * m_disc; // handle to the disc itself
- dynamic_buffer m_vbidata; // pointer to precomputed VBI data
- int m_width; // width of video
- int m_height; // height of video
- UINT32 m_fps_times_1million; // frame rate of video
- int m_samplerate; // audio samplerate
- int m_readresult; // result of the most recent read
- UINT32 m_chdtracks; // number of tracks in the CHD
- avhuff_decompress_config m_avhuff_config; // decompression configuration
+ chd_file * m_disc; // handle to the disc itself
+ dynamic_buffer m_vbidata; // pointer to precomputed VBI data
+ int m_width; // width of video
+ int m_height; // height of video
+ UINT32 m_fps_times_1million; // frame rate of video
+ int m_samplerate; // audio samplerate
+ int m_readresult; // result of the most recent read
+ UINT32 m_chdtracks; // number of tracks in the CHD
+ avhuff_decompress_config m_avhuff_config; // decompression configuration
// async operations
- osd_work_queue * m_work_queue; // work queue
- UINT32 m_queued_hunknum; // queued hunk
+ osd_work_queue * m_work_queue; // work queue
+ UINT32 m_queued_hunknum; // queued hunk
// core states
- UINT8 m_audiosquelch; // audio squelch state: bit 0 = audio 1, bit 1 = audio 2
- UINT8 m_videosquelch; // video squelch state: bit 0 = on/off
- UINT8 m_fieldnum; // field number (0 or 1)
- INT32 m_curtrack; // current track at this end of this vsync
- UINT32 m_maxtrack; // maximum track number
- attoseconds_t m_attospertrack; // attoseconds per track, or 0 if not moving
- attotime m_sliderupdate; // time of last slider update
+ UINT8 m_audiosquelch; // audio squelch state: bit 0 = audio 1, bit 1 = audio 2
+ UINT8 m_videosquelch; // video squelch state: bit 0 = on/off
+ UINT8 m_fieldnum; // field number (0 or 1)
+ INT32 m_curtrack; // current track at this end of this vsync
+ UINT32 m_maxtrack; // maximum track number
+ attoseconds_t m_attospertrack; // attoseconds per track, or 0 if not moving
+ attotime m_sliderupdate; // time of last slider update
// video data
- screen_device * m_screen; // pointer to the screen device
- frame_data m_frame[3]; // circular list of frames
- UINT8 m_videoindex; // index of the current video buffer
- bitmap_yuy16 m_emptyframe; // blank frame
+ screen_device * m_screen; // pointer to the screen device
+ frame_data m_frame[3]; // circular list of frames
+ UINT8 m_videoindex; // index of the current video buffer
+ bitmap_yuy16 m_emptyframe; // blank frame
// audio data
- sound_stream * m_stream;
- INT16 * m_audiobuffer[2]; // buffer for audio samples
- UINT32 m_audiobufsize; // size of buffer
- UINT32 m_audiobufin; // input index
- UINT32 m_audiobufout; // output index
- UINT32 m_audiocursamples; // current samples this track
- UINT32 m_audiomaxsamples; // maximum samples per track
+ sound_stream * m_stream;
+ INT16 * m_audiobuffer[2]; // buffer for audio samples
+ UINT32 m_audiobufsize; // size of buffer
+ UINT32 m_audiobufin; // input index
+ UINT32 m_audiobufout; // output index
+ UINT32 m_audiocursamples; // current samples this track
+ UINT32 m_audiomaxsamples; // maximum samples per track
// metadata
- vbi_metadata m_metadata[2]; // metadata parsed from the stream, for each field
+ vbi_metadata m_metadata[2]; // metadata parsed from the stream, for each field
// video updating
- bool m_videoenable; // is video enabled?
- render_texture * m_videotex; // texture for the video
- palette_t * m_videopalette; // palette for the video
+ bool m_videoenable; // is video enabled?
+ render_texture * m_videotex; // texture for the video
+ palette_t * m_videopalette; // palette for the video
// overlays
- bool m_overenable; // is the overlay enabled?
- screen_bitmap m_overbitmap[2]; // overlay bitmaps
- int m_overindex; // index of the overlay bitmap
- render_texture * m_overtex; // texture for the overlay
+ bool m_overenable; // is the overlay enabled?
+ screen_bitmap m_overbitmap[2]; // overlay bitmaps
+ int m_overindex; // index of the overlay bitmap
+ render_texture * m_overtex; // texture for the overlay
};
// iterator - interface iterator works for subclasses too
@@ -403,8 +403,8 @@ typedef device_interface_iterator<laserdisc_device> laserdisc_device_iterator;
inline bool laserdisc_device::is_start_of_frame(const vbi_metadata &vbi)
{
// is it not known if the white flag or the presence of a frame code
- // determines the start of frame; the former seems to be the "official"
- // way, but the latter seems to be the practical implementation
+ // determines the start of frame; the former seems to be the "official"
+ // way, but the latter seems to be the practical implementation
return (vbi.white || (vbi.line1718 & VBI_MASK_CAV_PICTURE) == VBI_CODE_CAV_PICTURE);
}
diff --git a/src/emu/machine/latch8.c b/src/emu/machine/latch8.c
index 32912fd2ed6..d99d9872e44 100644
--- a/src/emu/machine/latch8.c
+++ b/src/emu/machine/latch8.c
@@ -12,12 +12,12 @@
struct latch8_t
{
- latch8_config *intf;
- UINT8 value;
- UINT8 has_node_map;
- UINT8 has_devread;
- UINT8 has_read;
- device_t *devices[8];
+ latch8_config *intf;
+ UINT8 value;
+ UINT8 has_node_map;
+ UINT8 has_devread;
+ UINT8 has_read;
+ device_t *devices[8];
};
/* ----------------------------------------------------------------------- */
@@ -234,7 +234,7 @@ static DEVICE_RESET( latch8 )
const device_type LATCH8 = &device_creator<latch8_device>;
latch8_device::latch8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, LATCH8, "8 bit latch", tag, owner, clock)
+ : device_t(mconfig, LATCH8, "8 bit latch", tag, owner, clock)
{
m_token = global_alloc_clear(latch8_t);
memset((void*)&m_inline_config,0,sizeof(m_inline_config));
diff --git a/src/emu/machine/latch8.h b/src/emu/machine/latch8.h
index e196147398d..6ef634ada14 100644
--- a/src/emu/machine/latch8.h
+++ b/src/emu/machine/latch8.h
@@ -24,21 +24,21 @@
struct latch8_devread
{
/* only for byte reads, does not affect bit reads and node_map */
- UINT32 from_bit;
- const char *tag;
- read8_device_func devread_handler;
- read8_space_func read_handler;
+ UINT32 from_bit;
+ const char *tag;
+ read8_device_func devread_handler;
+ read8_space_func read_handler;
};
struct latch8_config
{
/* only for byte reads, does not affect bit reads and node_map */
- UINT32 maskout;
- UINT32 xorvalue; /* after mask */
- UINT32 nosync;
- UINT32 node_map[8];
- const char * node_device[8];
- latch8_devread devread[8];
+ UINT32 maskout;
+ UINT32 xorvalue; /* after mask */
+ UINT32 nosync;
+ UINT32 node_map[8];
+ const char * node_device[8];
+ latch8_devread devread[8];
};
class latch8_device : public device_t
diff --git a/src/emu/machine/lc89510.c b/src/emu/machine/lc89510.c
index 91e7ccbb934..8ce3988009d 100644
--- a/src/emu/machine/lc89510.c
+++ b/src/emu/machine/lc89510.c
@@ -24,4 +24,3 @@ void lc89510_device::device_reset()
{
}
-
diff --git a/src/emu/machine/lc89510.h b/src/emu/machine/lc89510.h
index 2213c166d31..7d735a6c818 100644
--- a/src/emu/machine/lc89510.h
+++ b/src/emu/machine/lc89510.h
@@ -19,6 +19,3 @@ private:
extern const device_type LC89510;
-
-
-
diff --git a/src/emu/machine/ldpr8210.c b/src/emu/machine/ldpr8210.c
index 79f7f3cf366..57f65c785d5 100644
--- a/src/emu/machine/ldpr8210.c
+++ b/src/emu/machine/ldpr8210.c
@@ -56,9 +56,9 @@
// DEBUGGING
//**************************************************************************
-#define LOG_VBLANK_VBI 0
-#define LOG_SERIAL 0
-#define LOG_SIMUTREK 0
+#define LOG_VBLANK_VBI 0
+#define LOG_SERIAL 0
+#define LOG_SIMUTREK 0
@@ -67,28 +67,28 @@
//**************************************************************************
// Overlay constants, related to 720-pixel wide capture
-#define OVERLAY_GROUP0_X (82.0f / 720.0f)
-#define OVERLAY_GROUP1_X (162.0f / 720.0f)
-#define OVERLAY_GROUP2_X (322.0f / 720.0f)
-#define OVERLAY_GROUP3_X (483.0f / 720.0f)
-#define OVERLAY_Y (104/2)
-#define OVERLAY_PIXEL_WIDTH (4.5f / 720.0f)
-#define OVERLAY_PIXEL_HEIGHT 2
-#define OVERLAY_X_PIXELS 5
-#define OVERLAY_Y_PIXELS 7
+#define OVERLAY_GROUP0_X (82.0f / 720.0f)
+#define OVERLAY_GROUP1_X (162.0f / 720.0f)
+#define OVERLAY_GROUP2_X (322.0f / 720.0f)
+#define OVERLAY_GROUP3_X (483.0f / 720.0f)
+#define OVERLAY_Y (104/2)
+#define OVERLAY_PIXEL_WIDTH (4.5f / 720.0f)
+#define OVERLAY_PIXEL_HEIGHT 2
+#define OVERLAY_X_PIXELS 5
+#define OVERLAY_Y_PIXELS 7
// scanning speeds
-#define SCAN_SPEED (2000 / 30) // 2000 frames/second
-#define SEEK_FAST_SPEED (4000 / 30) // 4000 frames/second
+#define SCAN_SPEED (2000 / 30) // 2000 frames/second
+#define SEEK_FAST_SPEED (4000 / 30) // 4000 frames/second
// serial timing, mostly from the service manual, derived from the XTAL
-#define SERIAL_CLOCK XTAL_455kHz
-#define SERIAL_0_BIT_TIME attotime::from_hz((double)SERIAL_CLOCK / 512)
-#define SERIAL_1_BIT_TIME attotime::from_hz((double)SERIAL_CLOCK / 1024)
-#define SERIAL_MIDPOINT_TIME attotime::from_hz((double)SERIAL_CLOCK / 600)
-#define SERIAL_MAX_BIT_TIME attotime::from_hz((double)SERIAL_CLOCK / 4096)
-#define SERIAL_MAX_WORD_TIME attotime::from_hz((double)SERIAL_CLOCK / 11520)
-#define SERIAL_REJECT_DUPLICATE_TIME attotime::from_hz((double)SERIAL_CLOCK / 11520 / 4)
+#define SERIAL_CLOCK XTAL_455kHz
+#define SERIAL_0_BIT_TIME attotime::from_hz((double)SERIAL_CLOCK / 512)
+#define SERIAL_1_BIT_TIME attotime::from_hz((double)SERIAL_CLOCK / 1024)
+#define SERIAL_MIDPOINT_TIME attotime::from_hz((double)SERIAL_CLOCK / 600)
+#define SERIAL_MAX_BIT_TIME attotime::from_hz((double)SERIAL_CLOCK / 4096)
+#define SERIAL_MAX_WORD_TIME attotime::from_hz((double)SERIAL_CLOCK / 11520)
+#define SERIAL_REJECT_DUPLICATE_TIME attotime::from_hz((double)SERIAL_CLOCK / 11520 / 4)
@@ -104,71 +104,71 @@ const device_type SIMUTREK_SPECIAL = &device_creator<simutrek_special_device>;
// bitmaps for the characters
static const UINT8 text_bitmap[0x40][7] =
{
- { 0 }, // @
- { 0x20,0x50,0x88,0x88,0xf8,0x88,0x88 }, // A
- { 0 }, // B
- { 0x70,0x88,0x80,0x80,0x80,0x88,0x70 }, // C
- { 0 }, // D
- { 0xf8,0x80,0x80,0xf0,0x80,0x80,0xf8 }, // E
- { 0xf8,0x80,0x80,0xf0,0x80,0x80,0x80 }, // F
- { 0 }, // G
- { 0x88,0x88,0x88,0xf8,0x88,0x88,0x88 }, // H
- { 0 }, // I
- { 0 }, // J
- { 0 }, // K
- { 0 }, // L
- { 0x88,0xd8,0xa8,0xa8,0xa8,0x88,0x88 }, // M
- { 0 }, // N
- { 0 }, // O
- { 0xf0,0x88,0x88,0xf0,0x80,0x80,0x80 }, // P
- { 0 }, // Q
- { 0xf0,0x88,0x88,0xf0,0xa0,0x90,0x88 }, // R
- { 0x70,0x88,0x80,0x70,0x08,0x88,0x70 }, // S
- { 0 }, // T
- { 0 }, // U
- { 0 }, // V
- { 0 }, // W
- { 0 }, // X
- { 0 }, // Y
- { 0 }, // Z
- { 0 }, // [
- { 0 }, // <backslash>
- { 0 }, // ]
- { 0 }, // ^
- { 0 }, // _
-
- { 0x00,0x00,0x00,0x00,0x00,0x00,0x00 }, // <space>
- { 0 }, // !
- { 0 }, // "
- { 0 }, // #
- { 0 }, // $
- { 0 }, // %
- { 0 }, // &
- { 0 }, // '
- { 0 }, // (
- { 0 }, // )
- { 0 }, // *
- { 0 }, // +
- { 0 }, // ,
- { 0 }, // -
- { 0x00,0x00,0x00,0x00,0x00,0x00,0x40 }, // .
- { 0 }, // /
- { 0x70,0x88,0x88,0x88,0x88,0x88,0x70 }, // 0
- { 0x20,0x60,0x20,0x20,0x20,0x20,0x70 }, // 1
- { 0x70,0x88,0x08,0x70,0x80,0x80,0xf8 }, // 2
- { 0xf8,0x08,0x10,0x30,0x08,0x88,0x70 }, // 3
- { 0x10,0x30,0x50,0x90,0xf8,0x10,0x10 }, // 4
- { 0xf8,0x80,0xf0,0x08,0x08,0x88,0x70 }, // 5
- { 0x78,0x80,0x80,0xf0,0x88,0x88,0x70 }, // 6
- { 0xf8,0x08,0x08,0x10,0x20,0x40,0x80 }, // 7
- { 0x70,0x88,0x88,0x70,0x88,0x88,0x70 }, // 8
- { 0x70,0x88,0x88,0x78,0x08,0x08,0xf0 }, // 9
- { 0 }, // :
- { 0 }, // ;
- { 0 }, // <
- { 0 }, // =
- { 0 }, // >
- { 0 } // ?
+ { 0 }, // @
+ { 0x20,0x50,0x88,0x88,0xf8,0x88,0x88 }, // A
+ { 0 }, // B
+ { 0x70,0x88,0x80,0x80,0x80,0x88,0x70 }, // C
+ { 0 }, // D
+ { 0xf8,0x80,0x80,0xf0,0x80,0x80,0xf8 }, // E
+ { 0xf8,0x80,0x80,0xf0,0x80,0x80,0x80 }, // F
+ { 0 }, // G
+ { 0x88,0x88,0x88,0xf8,0x88,0x88,0x88 }, // H
+ { 0 }, // I
+ { 0 }, // J
+ { 0 }, // K
+ { 0 }, // L
+ { 0x88,0xd8,0xa8,0xa8,0xa8,0x88,0x88 }, // M
+ { 0 }, // N
+ { 0 }, // O
+ { 0xf0,0x88,0x88,0xf0,0x80,0x80,0x80 }, // P
+ { 0 }, // Q
+ { 0xf0,0x88,0x88,0xf0,0xa0,0x90,0x88 }, // R
+ { 0x70,0x88,0x80,0x70,0x08,0x88,0x70 }, // S
+ { 0 }, // T
+ { 0 }, // U
+ { 0 }, // V
+ { 0 }, // W
+ { 0 }, // X
+ { 0 }, // Y
+ { 0 }, // Z
+ { 0 }, // [
+ { 0 }, // <backslash>
+ { 0 }, // ]
+ { 0 }, // ^
+ { 0 }, // _
+
+ { 0x00,0x00,0x00,0x00,0x00,0x00,0x00 }, // <space>
+ { 0 }, // !
+ { 0 }, // "
+ { 0 }, // #
+ { 0 }, // $
+ { 0 }, // %
+ { 0 }, // &
+ { 0 }, // '
+ { 0 }, // (
+ { 0 }, // )
+ { 0 }, // *
+ { 0 }, // +
+ { 0 }, // ,
+ { 0 }, // -
+ { 0x00,0x00,0x00,0x00,0x00,0x00,0x40 }, // .
+ { 0 }, // /
+ { 0x70,0x88,0x88,0x88,0x88,0x88,0x70 }, // 0
+ { 0x20,0x60,0x20,0x20,0x20,0x20,0x70 }, // 1
+ { 0x70,0x88,0x08,0x70,0x80,0x80,0xf8 }, // 2
+ { 0xf8,0x08,0x10,0x30,0x08,0x88,0x70 }, // 3
+ { 0x10,0x30,0x50,0x90,0xf8,0x10,0x10 }, // 4
+ { 0xf8,0x80,0xf0,0x08,0x08,0x88,0x70 }, // 5
+ { 0x78,0x80,0x80,0xf0,0x88,0x88,0x70 }, // 6
+ { 0xf8,0x08,0x08,0x10,0x20,0x40,0x80 }, // 7
+ { 0x70,0x88,0x88,0x70,0x88,0x88,0x70 }, // 8
+ { 0x70,0x88,0x88,0x78,0x08,0x08,0xf0 }, // 9
+ { 0 }, // :
+ { 0 }, // ;
+ { 0 }, // <
+ { 0 }, // =
+ { 0 }, // >
+ { 0 } // ?
};
@@ -210,33 +210,33 @@ ROM_END
pioneer_pr8210_device::pioneer_pr8210_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: laserdisc_device(mconfig, PIONEER_PR8210, "Pioneer PR-8210", "pr8210", tag, owner, clock),
- m_control(0),
- m_lastcommand(0),
- m_accumulator(0),
- m_lastcommandtime(attotime::zero),
- m_lastbittime(attotime::zero),
- m_firstbittime(attotime::zero),
- m_i8049_cpu(*this, "pr8210"),
- m_slowtrg(attotime::zero),
- m_vsync(false),
- m_i8049_port1(0),
- m_i8049_port2(0)
+ m_control(0),
+ m_lastcommand(0),
+ m_accumulator(0),
+ m_lastcommandtime(attotime::zero),
+ m_lastbittime(attotime::zero),
+ m_firstbittime(attotime::zero),
+ m_i8049_cpu(*this, "pr8210"),
+ m_slowtrg(attotime::zero),
+ m_vsync(false),
+ m_i8049_port1(0),
+ m_i8049_port2(0)
{
}
pioneer_pr8210_device::pioneer_pr8210_device(const machine_config &mconfig, device_type type, const char *name, const char *shortname, const char *tag, device_t *owner, UINT32 clock)
: laserdisc_device(mconfig, type, name, shortname, tag, owner, clock),
- m_control(0),
- m_lastcommand(0),
- m_accumulator(0),
- m_lastcommandtime(attotime::zero),
- m_lastbittime(attotime::zero),
- m_firstbittime(attotime::zero),
- m_i8049_cpu(*this, "pr8210"),
- m_slowtrg(attotime::zero),
- m_vsync(false),
- m_i8049_port1(0),
- m_i8049_port2(0)
+ m_control(0),
+ m_lastcommand(0),
+ m_accumulator(0),
+ m_lastcommandtime(attotime::zero),
+ m_lastbittime(attotime::zero),
+ m_firstbittime(attotime::zero),
+ m_i8049_cpu(*this, "pr8210"),
+ m_slowtrg(attotime::zero),
+ m_vsync(false),
+ m_i8049_port1(0),
+ m_i8049_port2(0)
{
}
@@ -291,8 +291,8 @@ void pioneer_pr8210_device::control_w(UINT8 data)
m_pia.porta = BITSWAP8(newcommand, 0,1,2,3,4,5,6,7);
// the MCU logic requires a 0 to execute many commands; however, nobody
- // consistently sends a 0, whereas they do tend to send duplicate commands...
- // if we assume that each duplicate causes a 0, we get the correct results
+ // consistently sends a 0, whereas they do tend to send duplicate commands...
+ // if we assume that each duplicate causes a 0, we get the correct results
attotime rejectuntil = m_lastcommandtime + SERIAL_REJECT_DUPLICATE_TIME;
m_lastcommandtime = curtime;
if (m_pia.porta == m_lastcommand && curtime < rejectuntil)
@@ -514,13 +514,13 @@ READ8_MEMBER( pioneer_pr8210_device::i8049_pia_r )
switch (offset)
{
// (20-26) 7 characters for the chapter/frame
- case 0x20: case 0x21:
- case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ case 0x20: case 0x21:
+ case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
result = m_pia.frame[offset - 0x20];
break;
// (1D-1F,27) invalid read but normal
- case 0x1d: case 0x1e: case 0x1f:
+ case 0x1d: case 0x1e: case 0x1f:
case 0x27:
break;
@@ -562,10 +562,10 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_pia_w )
switch (offset)
{
// (20-30) 17 characters for the display
- case 0x20: case 0x21:
- case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
- case 0x27: case 0x28: case 0x29: case 0x2a: case 0x2b:
- case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x30:
+ case 0x20: case 0x21:
+ case 0x22: case 0x23: case 0x24: case 0x25: case 0x26:
+ case 0x27: case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f: case 0x30:
m_pia.text[offset - 0x20] = data;
break;
@@ -630,15 +630,15 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_pia_w )
READ8_MEMBER( pioneer_pr8210_device::i8049_bus_r )
{
/*
- $80 = n/c
- $40 = (in) slider pot interrupt source (slider position limit detector, inside and outside)
- $20 = n/c
- $10 = (in) /FOCUS LOCK
- $08 = (in) /SPDL LOCK
- $04 = (in) SIZE 8/12
- $02 = (in) FG via op-amp (spindle motor stop detector)
- $01 = (in) SLOW TIMER OUT
- */
+ $80 = n/c
+ $40 = (in) slider pot interrupt source (slider position limit detector, inside and outside)
+ $20 = n/c
+ $10 = (in) /FOCUS LOCK
+ $08 = (in) /SPDL LOCK
+ $04 = (in) SIZE 8/12
+ $02 = (in) FG via op-amp (spindle motor stop detector)
+ $01 = (in) SLOW TIMER OUT
+ */
UINT8 result = 0x00;
@@ -674,15 +674,15 @@ READ8_MEMBER( pioneer_pr8210_device::i8049_bus_r )
WRITE8_MEMBER( pioneer_pr8210_device::i8049_port1_w )
{
/*
- $80 = (out) SCAN C (F/R)
- $40 = (out) AUDIO SQ
- $20 = (out) VIDEO SQ
- $10 = (out) /SPDL ON
- $08 = (out) /FOCUS ON
- $04 = (out) SCAN B (L/H)
- $02 = (out) SCAN A (/SCAN)
- $01 = (out) JUMP TRG (jump back trigger, clock on high->low)
- */
+ $80 = (out) SCAN C (F/R)
+ $40 = (out) AUDIO SQ
+ $20 = (out) VIDEO SQ
+ $10 = (out) /SPDL ON
+ $08 = (out) /FOCUS ON
+ $04 = (out) SCAN B (L/H)
+ $02 = (out) SCAN A (/SCAN)
+ $01 = (out) JUMP TRG (jump back trigger, clock on high->low)
+ */
// set the new value
UINT8 prev = m_i8049_port1;
@@ -731,15 +731,15 @@ WRITE8_MEMBER( pioneer_pr8210_device::i8049_port1_w )
WRITE8_MEMBER( pioneer_pr8210_device::i8049_port2_w )
{
/*
- $80 = (out) /CS on PIA
- $40 = (out) 0 to self-generate IRQ
- $20 = (out) SLOW TRG
- $10 = (out) STANDBY LED
- $08 = (out) TP2
- $04 = (out) TP1
- $02 = (out) ???
- $01 = (out) LASER ON
- */
+ $80 = (out) /CS on PIA
+ $40 = (out) 0 to self-generate IRQ
+ $20 = (out) SLOW TRG
+ $10 = (out) STANDBY LED
+ $08 = (out) TP2
+ $04 = (out) TP1
+ $02 = (out) ???
+ $01 = (out) LASER ON
+ */
// set the new value
UINT8 prev = m_i8049_port2;
@@ -920,13 +920,13 @@ ROM_END
simutrek_special_device::simutrek_special_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: pioneer_pr8210_device(mconfig, SIMUTREK_SPECIAL, "Simutrek Modified PR-8210", "simutrek", tag, owner, clock),
- m_i8748_cpu(*this, "simutrek"),
- m_audio_squelch(0),
- m_data(0),
- m_data_ready(false),
- m_i8748_port2(0),
- m_controlnext(0),
- m_controlthis(0)
+ m_i8748_cpu(*this, "simutrek"),
+ m_audio_squelch(0),
+ m_data(0),
+ m_data_ready(false),
+ m_i8748_port2(0),
+ m_controlnext(0),
+ m_controlthis(0)
{
}
diff --git a/src/emu/machine/ldpr8210.h b/src/emu/machine/ldpr8210.h
index 9bffa030c99..cee2a2ba842 100644
--- a/src/emu/machine/ldpr8210.h
+++ b/src/emu/machine/ldpr8210.h
@@ -76,15 +76,15 @@ extern const device_type SIMUTREK_SPECIAL;
class pioneer_pia
{
public:
- UINT8 frame[7]; // (20-26) 7 characters for the chapter/frame
- UINT8 text[17]; // (20-30) 17 characters for the display
- UINT8 control; // (40) control lines
- UINT8 latchdisplay; // flag: set if the display was latched
- UINT8 portb; // (60) port B value (LEDs)
- UINT8 display; // (80) display enable
- UINT8 porta; // (A0) port A value (from serial decoder)
- UINT8 vbi1; // (C0) VBI decoding state 1
- UINT8 vbi2; // (E0) VBI decoding state 2
+ UINT8 frame[7]; // (20-26) 7 characters for the chapter/frame
+ UINT8 text[17]; // (20-30) 17 characters for the display
+ UINT8 control; // (40) control lines
+ UINT8 latchdisplay; // flag: set if the display was latched
+ UINT8 portb; // (60) port B value (LEDs)
+ UINT8 display; // (80) display enable
+ UINT8 porta; // (A0) port A value (from serial decoder)
+ UINT8 vbi1; // (C0) VBI decoding state 1
+ UINT8 vbi2; // (E0) VBI decoding state 2
};
@@ -94,8 +94,8 @@ public:
class pioneer_pr8210_device : public laserdisc_device
{
public:
- // construction/destruction
- pioneer_pr8210_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ pioneer_pr8210_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
pioneer_pr8210_device(const machine_config &mconfig, device_type type, const char *name, const char *shortname, const char *tag, device_t *owner, UINT32 clock);
// input and output
@@ -147,20 +147,20 @@ protected:
void overlay_draw_char(bitmap_yuy16 &bitmap, UINT8 ch, float xstart);
// internal state
- UINT8 m_control; // control line state
- UINT8 m_lastcommand; // last command seen
- UINT16 m_accumulator; // bit accumulator
- attotime m_lastcommandtime; // time of the last command
- attotime m_lastbittime; // time of last bit received
- attotime m_firstbittime; // time of first bit in command
+ UINT8 m_control; // control line state
+ UINT8 m_lastcommand; // last command seen
+ UINT16 m_accumulator; // bit accumulator
+ attotime m_lastcommandtime; // time of the last command
+ attotime m_lastbittime; // time of last bit received
+ attotime m_firstbittime; // time of first bit in command
// low-level emulation data
- required_device<i8049_device> m_i8049_cpu; // 8049 CPU device
- attotime m_slowtrg; // time of the last SLOW TRG
- pioneer_pia m_pia; // PIA state
- bool m_vsync; // live VSYNC state
- UINT8 m_i8049_port1; // 8049 port 1 state
- UINT8 m_i8049_port2; // 8049 port 2 state
+ required_device<i8049_device> m_i8049_cpu; // 8049 CPU device
+ attotime m_slowtrg; // time of the last SLOW TRG
+ pioneer_pia m_pia; // PIA state
+ bool m_vsync; // live VSYNC state
+ UINT8 m_i8049_port1; // 8049 port 1 state
+ UINT8 m_i8049_port2; // 8049 port 2 state
};
@@ -169,8 +169,8 @@ protected:
class simutrek_special_device : public pioneer_pr8210_device
{
public:
- // construction/destruction
- simutrek_special_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ simutrek_special_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// input and output
void data_w(UINT8 data);
@@ -212,12 +212,12 @@ public:
protected:
// internal state
required_device<i8748_device> m_i8748_cpu;
- UINT8 m_audio_squelch; // audio squelch value
- UINT8 m_data; // parallel data for simutrek
- bool m_data_ready; // ready flag for simutrek data
- UINT8 m_i8748_port2; // 8748 port 2 state
- UINT8 m_controlnext; // latch to control next pair of fields
- UINT8 m_controlthis; // latched value for our control over the current pair of fields
+ UINT8 m_audio_squelch; // audio squelch value
+ UINT8 m_data; // parallel data for simutrek
+ bool m_data_ready; // ready flag for simutrek data
+ UINT8 m_i8748_port2; // 8748 port 2 state
+ UINT8 m_controlnext; // latch to control next pair of fields
+ UINT8 m_controlthis; // latched value for our control over the current pair of fields
};
diff --git a/src/emu/machine/ldv1000.c b/src/emu/machine/ldv1000.c
index 1d7e270b6c2..4e80f480b3a 100644
--- a/src/emu/machine/ldv1000.c
+++ b/src/emu/machine/ldv1000.c
@@ -56,10 +56,10 @@
// DEBUGGING
//**************************************************************************
-#define LOG_PORT_IO 0
-#define LOG_STATUS_CHANGES 0
-#define LOG_FRAMES_SEEN 0
-#define LOG_COMMANDS 0
+#define LOG_PORT_IO 0
+#define LOG_STATUS_CHANGES 0
+#define LOG_FRAMES_SEEN 0
+#define LOG_COMMANDS 0
@@ -67,10 +67,10 @@
// CONSTANTS
//**************************************************************************
-#define SCAN_SPEED (2000 / 30) // 2000 frames/second
-#define SEEK_FAST_SPEED (4000 / 30) // 4000 frames/second
+#define SCAN_SPEED (2000 / 30) // 2000 frames/second
+#define SEEK_FAST_SPEED (4000 / 30) // 4000 frames/second
-#define MULTIJUMP_TRACK_TIME attotime::from_usec(50)
+#define MULTIJUMP_TRACK_TIME attotime::from_usec(50)
@@ -171,21 +171,21 @@ ROM_END
pioneer_ldv1000_device::pioneer_ldv1000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: laserdisc_device(mconfig, PIONEER_LDV1000, "Pioneer LD-V1000", "ldv1000", tag, owner, clock),
- m_z80_cpu(*this, "ldv1000"),
- m_z80_ctc(*this, "ldvctc"),
- m_multitimer(NULL),
- m_command(0),
- m_status(0),
- m_vsync(false),
- m_counter_start(0),
- m_counter(0),
- m_portc0(0),
- m_portb1(0),
- m_portc1(0),
- m_portselect(0),
- m_dispindex(0),
- m_vbiready(false),
- m_vbiindex(0)
+ m_z80_cpu(*this, "ldv1000"),
+ m_z80_ctc(*this, "ldvctc"),
+ m_multitimer(NULL),
+ m_command(0),
+ m_status(0),
+ m_vsync(false),
+ m_counter_start(0),
+ m_counter(0),
+ m_portc0(0),
+ m_portb1(0),
+ m_portc1(0),
+ m_portselect(0),
+ m_dispindex(0),
+ m_vbiready(false),
+ m_vbiindex(0)
{
}
@@ -403,11 +403,11 @@ WRITE_LINE_MEMBER( pioneer_ldv1000_device::ctc_interrupt )
WRITE8_MEMBER( pioneer_ldv1000_device::z80_decoder_display_port_w )
{
/*
- TX/RX = /A0 (A0=0 -> TX, A0=1 -> RX)
+ TX/RX = /A0 (A0=0 -> TX, A0=1 -> RX)
- Display is 6-bit
- Decoder is 4-bit
- */
+ Display is 6-bit
+ Decoder is 4-bit
+ */
// writes to offset 0 select the target for reads/writes of actual data
if (offset == 0)
@@ -506,11 +506,11 @@ READ8_MEMBER( pioneer_ldv1000_device::ppi0_portb_r )
READ8_MEMBER( pioneer_ldv1000_device::ppi0_portc_r )
{
/*
- $10 = /VSYNC
- $20 = IRQ from decoder chip
- $40 = TRKG LOOP (N24-1)
- $80 = DUMP (N20-1) -- code reads the state and waits for it to change
- */
+ $10 = /VSYNC
+ $20 = IRQ from decoder chip
+ $40 = TRKG LOOP (N24-1)
+ $80 = DUMP (N20-1) -- code reads the state and waits for it to change
+ */
UINT8 result = 0x00;
if (!m_vsync)
@@ -529,11 +529,11 @@ READ8_MEMBER( pioneer_ldv1000_device::ppi0_portc_r )
WRITE8_MEMBER( pioneer_ldv1000_device::ppi0_portc_w )
{
/*
- $01 = preload on up/down counters
- $02 = /MULTI JUMP TRIG
- $04 = SCAN MODE
- $08 = n/c
- */
+ $01 = preload on up/down counters
+ $02 = /MULTI JUMP TRIG
+ $04 = SCAN MODE
+ $08 = n/c
+ */
// set the new value
UINT8 prev = m_portc0;
@@ -565,15 +565,15 @@ WRITE8_MEMBER( pioneer_ldv1000_device::ppi0_portc_w )
READ8_MEMBER( pioneer_ldv1000_device::ppi1_porta_r )
{
/*
- $01 = /FOCS LOCK
- $02 = /SPDL LOCK
- $04 = INSIDE
- $08 = OUTSIDE
- $10 = MOTOR STOP
- $20 = +5V/test point
- $40 = /INT LOCK
- $80 = 8 INCH CHK
- */
+ $01 = /FOCS LOCK
+ $02 = /SPDL LOCK
+ $04 = INSIDE
+ $08 = OUTSIDE
+ $10 = MOTOR STOP
+ $20 = +5V/test point
+ $40 = /INT LOCK
+ $80 = 8 INCH CHK
+ */
slider_position sliderpos = get_slider_position();
UINT8 result = 0x00;
@@ -615,15 +615,15 @@ READ8_MEMBER( pioneer_ldv1000_device::ppi1_porta_r )
WRITE8_MEMBER( pioneer_ldv1000_device::ppi1_portb_w )
{
/*
- $01 = /FOCS ON
- $02 = /SPDL RUN
- $04 = /JUMP TRIG
- $08 = /SCAN A
- $10 = SCAN B
- $20 = SCAN C
- $40 = /LASER ON
- $80 = /SYNC ST0
- */
+ $01 = /FOCS ON
+ $02 = /SPDL RUN
+ $04 = /JUMP TRIG
+ $08 = /SCAN A
+ $10 = SCAN B
+ $20 = SCAN C
+ $40 = /LASER ON
+ $80 = /SYNC ST0
+ */
// set the new value
UINT8 prev = m_portb1;
@@ -669,15 +669,15 @@ WRITE8_MEMBER( pioneer_ldv1000_device::ppi1_portb_w )
WRITE8_MEMBER( pioneer_ldv1000_device::ppi1_portc_w )
{
/*
- $01 = AUD 1
- $02 = AUD 2
- $04 = AUDIO ENABLE
- $08 = /VIDEO SQ
- $10 = COMMAND
- $20 = STATUS
- $40 = SIZE 8/12
- $80 = /LED CAV
- */
+ $01 = AUD 1
+ $02 = AUD 2
+ $04 = AUDIO ENABLE
+ $08 = /VIDEO SQ
+ $10 = COMMAND
+ $20 = STATUS
+ $40 = SIZE 8/12
+ $80 = /LED CAV
+ */
// set the new value
UINT8 prev = m_portc1;
diff --git a/src/emu/machine/ldv1000.h b/src/emu/machine/ldv1000.h
index b42ccf54ff2..007705c59af 100644
--- a/src/emu/machine/ldv1000.h
+++ b/src/emu/machine/ldv1000.h
@@ -76,8 +76,8 @@ extern const device_type PIONEER_LDV1000;
class pioneer_ldv1000_device : public laserdisc_device
{
public:
- // construction/destruction
- pioneer_ldv1000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ pioneer_ldv1000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// input and output
void data_w(UINT8 data);
@@ -129,29 +129,29 @@ public:
protected:
// internal state
- required_device<z80_device> m_z80_cpu; /* CPU index of the Z80 */
- required_device<z80ctc_device> m_z80_ctc; /* CTC device */
- emu_timer * m_multitimer; /* multi-jump timer device */
+ required_device<z80_device> m_z80_cpu; /* CPU index of the Z80 */
+ required_device<z80ctc_device> m_z80_ctc; /* CTC device */
+ emu_timer * m_multitimer; /* multi-jump timer device */
/* communication status */
- UINT8 m_command; /* command byte to the player */
- UINT8 m_status; /* status byte from the player */
- bool m_vsync; /* VSYNC state */
+ UINT8 m_command; /* command byte to the player */
+ UINT8 m_status; /* status byte from the player */
+ bool m_vsync; /* VSYNC state */
/* I/O port states */
- UINT8 m_counter_start; /* starting value for counter */
- UINT8 m_counter; /* current counter value */
- UINT8 m_portc0; /* port C on PPI 0 */
- UINT8 m_portb1; /* port B on PPI 1 */
- UINT8 m_portc1; /* port C on PPI 1 */
+ UINT8 m_counter_start; /* starting value for counter */
+ UINT8 m_counter; /* current counter value */
+ UINT8 m_portc0; /* port C on PPI 0 */
+ UINT8 m_portb1; /* port B on PPI 1 */
+ UINT8 m_portc1; /* port C on PPI 1 */
/* display/decode circuit emulation */
- UINT8 m_portselect; /* selection of which port to access */
- UINT8 m_display[2][20]; /* display lines */
- UINT8 m_dispindex; /* index within the display line */
- UINT8 m_vbi[7*3]; /* VBI data */
- bool m_vbiready; /* VBI ready flag */
- UINT8 m_vbiindex; /* index within the VBI data */
+ UINT8 m_portselect; /* selection of which port to access */
+ UINT8 m_display[2][20]; /* display lines */
+ UINT8 m_dispindex; /* index within the display line */
+ UINT8 m_vbi[7*3]; /* VBI data */
+ bool m_vbiready; /* VBI ready flag */
+ UINT8 m_vbiindex; /* index within the VBI data */
};
diff --git a/src/emu/machine/ldvp931.c b/src/emu/machine/ldvp931.c
index f4b5fde8017..f6901652221 100644
--- a/src/emu/machine/ldvp931.c
+++ b/src/emu/machine/ldvp931.c
@@ -54,8 +54,8 @@
// DEBUGGING
//**************************************************************************
-#define LOG_COMMANDS 0
-#define LOG_PORTS 0
+#define LOG_COMMANDS 0
+#define LOG_PORTS 0
@@ -64,8 +64,8 @@
//**************************************************************************
// scanning speeds
-#define SCAN_SPEED (2000 / 30) // 2000 frames/second
-#define SCAN_FAST_SPEED (4000 / 30) // 4000 frames/second
+#define SCAN_SPEED (2000 / 30) // 2000 frames/second
+#define SCAN_FAST_SPEED (4000 / 30) // 4000 frames/second
@@ -117,22 +117,22 @@ ROM_END
phillips_22vp931_device::phillips_22vp931_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: laserdisc_device(mconfig, PHILLIPS_22VP931, "Phillips 22VP931", "22vp931", tag, owner, clock),
- m_i8049_cpu(*this, "vp931"),
- m_tracktimer(NULL),
- m_i8049_out0(0),
- m_i8049_out1(0),
- m_i8049_port1(0),
- m_daticval(0),
- m_daticerp(0),
- m_datastrobe(0),
- m_fromcontroller(0),
- m_fromcontroller_pending(false),
- m_tocontroller(0),
- m_tocontroller_pending(false),
- m_trackdir(0),
- m_trackstate(0),
- m_cmdcount(0),
- m_advanced(0)
+ m_i8049_cpu(*this, "vp931"),
+ m_tracktimer(NULL),
+ m_i8049_out0(0),
+ m_i8049_out1(0),
+ m_i8049_port1(0),
+ m_daticval(0),
+ m_daticerp(0),
+ m_datastrobe(0),
+ m_fromcontroller(0),
+ m_fromcontroller_pending(false),
+ m_tocontroller(0),
+ m_tocontroller_pending(false),
+ m_trackdir(0),
+ m_trackstate(0),
+ m_cmdcount(0),
+ m_advanced(0)
{
}
@@ -370,15 +370,15 @@ INT32 phillips_22vp931_device::player_update(const vbi_metadata &vbi, int fieldn
WRITE8_MEMBER( phillips_22vp931_device::i8049_output0_w )
{
/*
- $80 = n/c
- $40 = LED (?) -> C335
- $20 = LED (?)
- $10 = LED (?) -> CX
- $08 = EJECT
- $04 = inverted -> AUDIO MUTE II
- $02 = inverted -> AUDIO MUTE I
- $01 = inverted -> VIDEO MUTE
- */
+ $80 = n/c
+ $40 = LED (?) -> C335
+ $20 = LED (?)
+ $10 = LED (?) -> CX
+ $08 = EJECT
+ $04 = inverted -> AUDIO MUTE II
+ $02 = inverted -> AUDIO MUTE I
+ $01 = inverted -> VIDEO MUTE
+ */
if (LOG_PORTS && (m_i8049_out0 ^ data) & 0xff)
{
@@ -408,15 +408,15 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output0_w )
WRITE8_MEMBER( phillips_22vp931_device::i8049_output1_w )
{
/*
- $80 = n/c
- $40 = n/c
- $20 = n/c
- $10 = n/c
- $08 = inverted -> SMS
- $04 = inverted -> SSS
- $02 = inverted -> SCAN CMD
- $01 = OSM
- */
+ $80 = n/c
+ $40 = n/c
+ $20 = n/c
+ $10 = n/c
+ $08 = inverted -> SMS
+ $04 = inverted -> SSS
+ $02 = inverted -> SCAN CMD
+ $01 = OSM
+ */
INT32 speed = 0;
@@ -452,9 +452,9 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output1_w )
WRITE8_MEMBER( phillips_22vp931_device::i8049_lcd_w )
{
/*
- Frame number is written as 5 digits here; however, it is not actually
- connected
- */
+ Frame number is written as 5 digits here; however, it is not actually
+ connected
+ */
}
@@ -477,16 +477,16 @@ READ8_MEMBER( phillips_22vp931_device::i8049_unknown_r )
READ8_MEMBER( phillips_22vp931_device::i8049_keypad_r )
{
/*
- From the code, this is apparently a vestigial keypad with basic controls:
- $01 = play
- $02 = still
- $04 = jump 25 frames backward
- $08 = jump 25 frames forward
- $10 = search for frame 50(?)
- $20 = search for frame 350(?)
- $40 = reset
- $80 = play reverse
- */
+ From the code, this is apparently a vestigial keypad with basic controls:
+ $01 = play
+ $02 = still
+ $04 = jump 25 frames backward
+ $08 = jump 25 frames forward
+ $10 = search for frame 50(?)
+ $20 = search for frame 350(?)
+ $40 = reset
+ $80 = play reverse
+ */
return 0x00;
}
@@ -542,10 +542,10 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_to_controller_w )
READ8_MEMBER( phillips_22vp931_device::i8049_port1_r )
{
/*
- $80 = P17 = (in) unsure
- $40 = P16 = (in) /ERP from datic circuit
- $20 = P15 = (in) D105
- */
+ $80 = P17 = (in) unsure
+ $40 = P16 = (in) /ERP from datic circuit
+ $20 = P15 = (in) D105
+ */
UINT8 result = 0x00;
if (!m_daticerp)
@@ -561,12 +561,12 @@ READ8_MEMBER( phillips_22vp931_device::i8049_port1_r )
WRITE8_MEMBER( phillips_22vp931_device::i8049_port1_w )
{
/*
- $10 = P14 = (out) D104 -> /SPEED
- $08 = P13 = (out) D103 -> /TIMER ENABLE
- $04 = P12 = (out) D102 -> /REV
- $02 = P11 = (out) D101 -> /FORW
- $01 = P10 = (out) D100 -> some op-amp then to C334, B56, B332
- */
+ $10 = P14 = (out) D104 -> /SPEED
+ $08 = P13 = (out) D103 -> /TIMER ENABLE
+ $04 = P12 = (out) D102 -> /REV
+ $02 = P11 = (out) D101 -> /FORW
+ $01 = P10 = (out) D100 -> some op-amp then to C334, B56, B332
+ */
if (LOG_PORTS && (m_i8049_port1 ^ data) & 0x1f)
{
@@ -632,10 +632,10 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_port1_w )
READ8_MEMBER( phillips_22vp931_device::i8049_port2_r )
{
/*
- $80 = P27 = (in) set/reset latch; set by FOC LS, reset by IGR
- $20 = P25 = (in) D125 -> 0 when data written to controller is preset, reset to 1 when read
- $10 = P24 = (in) D124 -> 0 when data from controller is present, reset to 1 on a read
- */
+ $80 = P27 = (in) set/reset latch; set by FOC LS, reset by IGR
+ $20 = P25 = (in) D125 -> 0 when data written to controller is preset, reset to 1 when read
+ $10 = P24 = (in) D124 -> 0 when data from controller is present, reset to 1 on a read
+ */
UINT8 result = 0x00;
if (!m_tocontroller_pending)
@@ -653,9 +653,9 @@ READ8_MEMBER( phillips_22vp931_device::i8049_port2_r )
WRITE8_MEMBER( phillips_22vp931_device::i8049_port2_w )
{
/*
- $40 = P26 = (out) cleared while data is sent back & forth; set afterwards
- [Not actually connected, but this is done in the code]
- */
+ $40 = P26 = (out) cleared while data is sent back & forth; set afterwards
+ [Not actually connected, but this is done in the code]
+ */
}
diff --git a/src/emu/machine/ldvp931.h b/src/emu/machine/ldvp931.h
index a52b8790f23..163767dd846 100644
--- a/src/emu/machine/ldvp931.h
+++ b/src/emu/machine/ldvp931.h
@@ -77,8 +77,8 @@ public:
// types
typedef delegate<void (phillips_22vp931_device &, int)> data_ready_delegate;
- // construction/destruction
- phillips_22vp931_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ phillips_22vp931_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// input and output
void data_w(UINT8 data) { synchronize(TID_DEFERRED_DATA, data); }
@@ -133,35 +133,35 @@ public:
protected:
// internal state
- required_device<i8049_device> m_i8049_cpu; // CPU index of the 8049
- emu_timer * m_tracktimer; // timer device
- data_ready_delegate m_data_ready; // data ready callback
+ required_device<i8049_device> m_i8049_cpu; // CPU index of the 8049
+ emu_timer * m_tracktimer; // timer device
+ data_ready_delegate m_data_ready; // data ready callback
// I/O port states
- UINT8 m_i8049_out0; // output 0 state
- UINT8 m_i8049_out1; // output 1 state
- UINT8 m_i8049_port1; // port 1 state
+ UINT8 m_i8049_out0; // output 0 state
+ UINT8 m_i8049_out1; // output 1 state
+ UINT8 m_i8049_port1; // port 1 state
// DATIC circuit implementation
- UINT8 m_daticval; // latched DATIC value
- UINT8 m_daticerp; // /ERP value from DATIC
- UINT8 m_datastrobe; // DATA STROBE line from DATIC
+ UINT8 m_daticval; // latched DATIC value
+ UINT8 m_daticerp; // /ERP value from DATIC
+ UINT8 m_datastrobe; // DATA STROBE line from DATIC
// communication status
- UINT8 m_reset_state; // state of the reset input
- UINT8 m_fromcontroller; // command byte from the controller
- bool m_fromcontroller_pending; // true if data is pending
- UINT8 m_tocontroller; // command byte to the controller
- bool m_tocontroller_pending; // true if data is pending
+ UINT8 m_reset_state; // state of the reset input
+ UINT8 m_fromcontroller; // command byte from the controller
+ bool m_fromcontroller_pending; // true if data is pending
+ UINT8 m_tocontroller; // command byte to the controller
+ bool m_tocontroller_pending; // true if data is pending
// tracking
- INT8 m_trackdir; // direction of tracking
- UINT8 m_trackstate; // state of tracking
+ INT8 m_trackdir; // direction of tracking
+ UINT8 m_trackstate; // state of tracking
// debugging
- UINT8 m_cmdbuf[3]; // 3 bytes worth of commands
- UINT8 m_cmdcount; // number of command bytes seen
- INT16 m_advanced; // number of frames advanced
+ UINT8 m_cmdbuf[3]; // 3 bytes worth of commands
+ UINT8 m_cmdcount; // number of command bytes seen
+ INT16 m_advanced; // number of frames advanced
};
diff --git a/src/emu/machine/m6m80011ap.c b/src/emu/machine/m6m80011ap.c
index 078ae93cecd..7820e982be1 100644
--- a/src/emu/machine/m6m80011ap.c
+++ b/src/emu/machine/m6m80011ap.c
@@ -27,7 +27,7 @@ const device_type M6M80011AP = &device_creator<m6m80011ap_device>;
m6m80011ap_device::m6m80011ap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, M6M80011AP, "m6m80011ap", tag, owner, clock),
- device_nvram_interface(mconfig, *this)
+ device_nvram_interface(mconfig, *this)
{
}
@@ -230,4 +230,3 @@ WRITE_LINE_MEMBER( m6m80011ap_device::set_clock_line )
}
}
}
-
diff --git a/src/emu/machine/m6m80011ap.h b/src/emu/machine/m6m80011ap.h
index df47d451436..7d719c5731e 100644
--- a/src/emu/machine/m6m80011ap.h
+++ b/src/emu/machine/m6m80011ap.h
@@ -37,8 +37,8 @@ enum eeprom_cmd_t
// ======================> m6m80011ap_device
-class m6m80011ap_device : public device_t,
- public device_nvram_interface
+class m6m80011ap_device : public device_t,
+ public device_nvram_interface
{
public:
// construction/destruction
diff --git a/src/emu/machine/matsucd.c b/src/emu/machine/matsucd.c
index 55476a696ed..30b88d418d5 100644
--- a/src/emu/machine/matsucd.c
+++ b/src/emu/machine/matsucd.c
@@ -18,38 +18,38 @@ can be expanded with support for the other drives as needed.
#include "machine/matsucd.h"
-#define MATSU_STATUS_READY ( 1 << 0 ) /* driver ready */
-#define MATSU_STATUS_DOORLOCKED ( 1 << 1 ) /* door locked */
-#define MATSU_STATUS_PLAYING ( 1 << 2 ) /* drive playing */
-#define MATSU_STATUS_SUCCESS ( 1 << 3 ) /* last command was successful */
-#define MATSU_STATUS_ERROR ( 1 << 4 ) /* last command failed */
-#define MATSU_STATUS_MOTOR ( 1 << 5 ) /* spinning */
-#define MATSU_STATUS_MEDIA ( 1 << 6 ) /* media present (in caddy or tray) */
-#define MATSU_STATUS_DOORCLOSED ( 1 << 7 ) /* tray status */
+#define MATSU_STATUS_READY ( 1 << 0 ) /* driver ready */
+#define MATSU_STATUS_DOORLOCKED ( 1 << 1 ) /* door locked */
+#define MATSU_STATUS_PLAYING ( 1 << 2 ) /* drive playing */
+#define MATSU_STATUS_SUCCESS ( 1 << 3 ) /* last command was successful */
+#define MATSU_STATUS_ERROR ( 1 << 4 ) /* last command failed */
+#define MATSU_STATUS_MOTOR ( 1 << 5 ) /* spinning */
+#define MATSU_STATUS_MEDIA ( 1 << 6 ) /* media present (in caddy or tray) */
+#define MATSU_STATUS_DOORCLOSED ( 1 << 7 ) /* tray status */
struct matsucd
{
- UINT8 enabled; /* /ENABLE - Unit enabled */
- UINT8 cmd_signal; /* /CMD - Command mode */
- UINT8 stch_signal; /* /STCH - Status Changed */
- UINT8 sten_signal; /* /STEN - Status Enabled */
- UINT8 scor_signal; /* /STEN - Subcode Ready */
- UINT8 input[16];
- UINT8 input_pos;
- UINT8 output[16];
- UINT8 output_pos;
- UINT8 output_len;
- UINT8 status;
- UINT8 motor;
- UINT16 sector_size;
- UINT32 lba;
- UINT16 num_blocks;
- UINT16 xfer_offset;
- UINT8 sector_buffer[CD_MAX_SECTOR_DATA];
- UINT8 cdda_set;
- void (*sten_cb)( running_machine &machine, int level ); /* Status enabled callback */
- void (*stch_cb)( running_machine &machine, int level ); /* Status changed callback */
- void (*scor_cb)( running_machine &machine, int level ); /* Subcode ready callback */
+ UINT8 enabled; /* /ENABLE - Unit enabled */
+ UINT8 cmd_signal; /* /CMD - Command mode */
+ UINT8 stch_signal; /* /STCH - Status Changed */
+ UINT8 sten_signal; /* /STEN - Status Enabled */
+ UINT8 scor_signal; /* /STEN - Subcode Ready */
+ UINT8 input[16];
+ UINT8 input_pos;
+ UINT8 output[16];
+ UINT8 output_pos;
+ UINT8 output_len;
+ UINT8 status;
+ UINT8 motor;
+ UINT16 sector_size;
+ UINT32 lba;
+ UINT16 num_blocks;
+ UINT16 xfer_offset;
+ UINT8 sector_buffer[CD_MAX_SECTOR_DATA];
+ UINT8 cdda_set;
+ void (*sten_cb)( running_machine &machine, int level ); /* Status enabled callback */
+ void (*stch_cb)( running_machine &machine, int level ); /* Status changed callback */
+ void (*scor_cb)( running_machine &machine, int level ); /* Subcode ready callback */
cdrom_file *cdrom;
device_t *cdda;
emu_timer *frame_timer;
@@ -188,20 +188,20 @@ static UINT8 matsucd_cdda_getstatus( running_machine &machine, UINT32 *lba )
if (cdda_audio_paused(cdda))
{
- return 0x12; /* audio paused */
+ return 0x12; /* audio paused */
}
else
{
- return 0x11; /* audio in progress */
+ return 0x11; /* audio in progress */
}
}
else if (cdda_audio_ended(cdda))
{
- return 0x13; /* audio ended */
+ return 0x13; /* audio ended */
}
}
- return 0x15; /* no audio status */
+ return 0x15; /* no audio status */
}
void matsucd_enable_w( int level )
@@ -286,8 +286,8 @@ static TIMER_CALLBACK(matsu_subcode_proc)
if (cdda != NULL)
{
- UINT8 s = matsucd_cdda_getstatus(machine, NULL);
- UINT8 newstatus = cd.status;
+ UINT8 s = matsucd_cdda_getstatus(machine, NULL);
+ UINT8 newstatus = cd.status;
if ( s == 0x11 || s == 0x12 )
{
@@ -312,7 +312,7 @@ static TIMER_CALLBACK(matsu_subcode_proc)
static void matsucd_command_error( running_machine &machine )
{
- UINT8 newstatus = cd.status;
+ UINT8 newstatus = cd.status;
newstatus &= ~MATSU_STATUS_SUCCESS;
newstatus |= MATSU_STATUS_ERROR;
@@ -322,7 +322,7 @@ static void matsucd_command_error( running_machine &machine )
static void matsucd_complete_cmd( running_machine &machine, UINT8 len )
{
- UINT8 newstatus = cd.status;
+ UINT8 newstatus = cd.status;
cd.input_pos = 0;
cd.output_pos = 0;
@@ -339,7 +339,7 @@ static void matsucd_complete_cmd( running_machine &machine, UINT8 len )
UINT8 matsucd_response_r( running_machine &machine )
{
- UINT8 v = cd.output[cd.output_pos++];
+ UINT8 v = cd.output[cd.output_pos++];
if ( cd.output_pos < cd.output_len )
{
@@ -352,7 +352,7 @@ UINT8 matsucd_response_r( running_machine &machine )
void matsucd_command_w( running_machine &machine, UINT8 data )
{
- UINT8 cmd;
+ UINT8 cmd;
/* make sure we're enabled */
if ( cd.enabled == 0 )
@@ -379,7 +379,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
switch( cmd )
{
- case 0x01: /* seek */
+ case 0x01: /* seek */
{
if ( cd.input_pos < 7 )
return;
@@ -394,7 +394,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x02: /* read sectors */
+ case 0x02: /* read sectors */
{
if ( cd.input_pos < 7 )
return;
@@ -432,7 +432,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x04: /* motor on */
+ case 0x04: /* motor on */
{
if ( cd.input_pos < 7 )
return;
@@ -444,7 +444,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x05: /* motor off */
+ case 0x05: /* motor off */
{
if ( cd.input_pos < 7 )
return;
@@ -459,9 +459,9 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x09: /* play audio cd, LBA mode */
+ case 0x09: /* play audio cd, LBA mode */
{
- UINT32 lba, numblocks;
+ UINT32 lba, numblocks;
if ( cd.input_pos < 7 )
return;
@@ -487,9 +487,9 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x0a: /* play audio cd, MSF mode */
+ case 0x0a: /* play audio cd, MSF mode */
{
- UINT32 start, end, lba_start, lba_end;
+ UINT32 start, end, lba_start, lba_end;
if ( cd.input_pos < 7 )
return;
@@ -530,13 +530,13 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x0b: /* play audio track and index */
+ case 0x0b: /* play audio track and index */
{
- UINT8 track_start = cd.input[1];
- UINT8 index_start = cd.input[2];
- UINT8 track_end = cd.input[3];
- UINT8 index_end = cd.input[4];
- UINT32 lba_start, lba_end;
+ UINT8 track_start = cd.input[1];
+ UINT8 index_start = cd.input[2];
+ UINT8 track_end = cd.input[3];
+ UINT8 index_end = cd.input[4];
+ UINT32 lba_start, lba_end;
/* TODO: Add index support once the CDDA engine supports it */
(void)index_start;
@@ -569,9 +569,9 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x81: /* status read */
+ case 0x81: /* status read */
{
- UINT8 newstatus = cd.status;
+ UINT8 newstatus = cd.status;
newstatus &= MATSU_STATUS_SUCCESS | MATSU_STATUS_ERROR | MATSU_STATUS_PLAYING;
newstatus |= MATSU_STATUS_READY;
@@ -592,7 +592,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x82: /* error read */
+ case 0x82: /* error read */
{
if ( cd.input_pos < 7 )
return;
@@ -602,7 +602,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x84: /* set mode */
+ case 0x84: /* set mode */
{
if ( cd.input_pos < 7 )
return;
@@ -616,11 +616,11 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x87: /* read SUBQ */
+ case 0x87: /* read SUBQ */
{
- int msfmode;
- UINT32 lba;
- UINT8 track;
+ int msfmode;
+ UINT32 lba;
+ UINT8 track;
if ( cd.input_pos < 7 )
return;
@@ -633,8 +633,8 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
if ( lba > 0 )
{
- UINT32 disk_pos;
- UINT32 track_pos;
+ UINT32 disk_pos;
+ UINT32 track_pos;
track = cdrom_get_track(cd.cdrom, lba);
@@ -666,9 +666,9 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x89: /* read disk info */
+ case 0x89: /* read disk info */
{
- UINT32 end;
+ UINT32 end;
if ( cd.input_pos < 7 )
return;
@@ -688,11 +688,11 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x8a: /* read toc */
+ case 0x8a: /* read toc */
{
- UINT8 track;
- int msfmode;
- UINT32 track_start;
+ UINT8 track;
+ int msfmode;
+ UINT32 track_start;
if ( cd.input_pos < 7 )
return;
@@ -736,7 +736,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0x8b: /* pause audio */
+ case 0x8b: /* pause audio */
{
if ( cd.input_pos < 7 )
return;
@@ -747,7 +747,7 @@ void matsucd_command_w( running_machine &machine, UINT8 data )
}
break;
- case 0xa3: /* front panel */
+ case 0xa3: /* front panel */
{
if ( cd.input_pos < 7 )
return;
diff --git a/src/emu/machine/matsucd.h b/src/emu/machine/matsucd.h
index b1e40690f83..44b4703bb20 100644
--- a/src/emu/machine/matsucd.h
+++ b/src/emu/machine/matsucd.h
@@ -9,11 +9,11 @@ void matsucd_init( cdrom_image_device *cdrom_device, const char *cdda_tag );
/* signaling */
-extern void matsucd_enable_w( int level ); /* /ENABLE pin */
-extern void matsucd_cmd_w( int level ); /* /CMD pin */
-extern int matsucd_stch_r( void ); /* /STCH pin */
-extern int matsucd_sten_r( void ); /* /STEN pin */
-extern int matsucd_scor_r( void ); /* /SCOR pin */
+extern void matsucd_enable_w( int level ); /* /ENABLE pin */
+extern void matsucd_cmd_w( int level ); /* /CMD pin */
+extern int matsucd_stch_r( void ); /* /STCH pin */
+extern int matsucd_sten_r( void ); /* /STEN pin */
+extern int matsucd_scor_r( void ); /* /SCOR pin */
/* callback for signal changes */
extern void matsucd_set_status_enabled_callback( void (*sten_cb)( running_machine &machine, int level ) );
diff --git a/src/emu/machine/mb14241.c b/src/emu/machine/mb14241.c
index 0f88a51c1c8..091397d2caf 100644
--- a/src/emu/machine/mb14241.c
+++ b/src/emu/machine/mb14241.c
@@ -9,8 +9,8 @@
struct mb14241_state
{
- UINT16 shift_data; /* 15 bits only */
- UINT8 shift_count; /* 3 bits */
+ UINT16 shift_data; /* 15 bits only */
+ UINT8 shift_count; /* 3 bits */
};
/*****************************************************************************
@@ -102,5 +102,3 @@ void mb14241_device::device_reset()
{
DEVICE_RESET_NAME( mb14241 )(this);
}
-
-
diff --git a/src/emu/machine/mb87078.c b/src/emu/machine/mb87078.c
index a681a5c2bd5..ae4bfa1b677 100644
--- a/src/emu/machine/mb87078.c
+++ b/src/emu/machine/mb87078.c
@@ -73,9 +73,9 @@
struct mb87078_state
{
- int gain[4]; /* gain index 0-63,64,65 */
- int channel_latch; /* current channel */
- UINT8 latch[2][4]; /* 6bit+3bit 4 data latches */
+ int gain[4]; /* gain index 0-63,64,65 */
+ int channel_latch; /* current channel */
+ UINT8 latch[2][4]; /* 6bit+3bit 4 data latches */
UINT8 reset_comp;
mb87078_gain_changed_cb gain_changed_cb;
@@ -84,26 +84,26 @@ struct mb87078_state
static const float mb87078_gain_decibel[66] = {
0.0, -0.5, -1.0, -1.5, -2.0, -2.5, -3.0, -3.5,
- -4.0, -4.5, -5.0, -5.5, -6.0, -6.5, -7.0, -7.5,
- -8.0, -8.5, -9.0, -9.5,-10.0,-10.5,-11.0,-11.5,
- -12.0,-12.5,-13.0,-13.5,-14.0,-14.5,-15.0,-15.5,
- -16.0,-16.5,-17.0,-17.5,-18.0,-18.5,-19.0,-19.5,
- -20.0,-20.5,-21.0,-21.5,-22.0,-22.5,-23.0,-23.5,
- -24.0,-24.5,-25.0,-25.5,-26.0,-26.5,-27.0,-27.5,
- -28.0,-28.5,-29.0,-29.5,-30.0,-30.5,-31.0,-31.5,
- -32.0, -256.0
- };
+ -4.0, -4.5, -5.0, -5.5, -6.0, -6.5, -7.0, -7.5,
+ -8.0, -8.5, -9.0, -9.5,-10.0,-10.5,-11.0,-11.5,
+ -12.0,-12.5,-13.0,-13.5,-14.0,-14.5,-15.0,-15.5,
+ -16.0,-16.5,-17.0,-17.5,-18.0,-18.5,-19.0,-19.5,
+ -20.0,-20.5,-21.0,-21.5,-22.0,-22.5,-23.0,-23.5,
+ -24.0,-24.5,-25.0,-25.5,-26.0,-26.5,-27.0,-27.5,
+ -28.0,-28.5,-29.0,-29.5,-30.0,-30.5,-31.0,-31.5,
+ -32.0, -256.0
+ };
static const int mb87078_gain_percent[66] = {
- 100,94,89,84,79,74,70,66,
- 63,59,56,53,50,47,44,42,
- 39,37,35,33,31,29,28,26,
- 25,23,22,21,19,18,17,16,
- 15,14,14,13,12,11,11,10,
- 10, 9, 8, 8, 7, 7, 7, 6,
- 6, 5, 5, 5, 5, 4, 4, 4,
- 3, 3, 3, 3, 3, 2, 2, 2,
- 2, 0
+ 100,94,89,84,79,74,70,66,
+ 63,59,56,53,50,47,44,42,
+ 39,37,35,33,31,29,28,26,
+ 25,23,22,21,19,18,17,16,
+ 15,14,14,13,12,11,11,10,
+ 10, 9, 8, 8, 7, 7, 7, 6,
+ 6, 5, 5, 5, 5, 4, 4, 4,
+ 3, 3, 3, 3, 3, 2, 2, 2,
+ 2, 0
};
/*****************************************************************************
@@ -148,7 +148,7 @@ static int calc_gain_index( int data0, int data1 )
if (data1 & 0x10)
{
return GAIN_MAX_INDEX;
- }
+ }
else
{
if (data1 & 0x08)
@@ -187,11 +187,11 @@ void mb87078_data_w( device_t *device, int data, int dsel )
if (mb87078->reset_comp == 0)
return;
- if (dsel == 0) /* gd0 - gd5 */
+ if (dsel == 0) /* gd0 - gd5 */
{
mb87078->latch[0][mb87078->channel_latch] = data & 0x3f;
}
- else /* dcs1, dsc2, en, c0, c32, X */
+ else /* dcs1, dsc2, en, c0, c32, X */
{
mb87078->channel_latch = data & 3;
mb87078->latch[1][mb87078->channel_latch] = data & 0x1f; //always zero bit 5
@@ -300,5 +300,3 @@ void mb87078_device::device_reset()
{
DEVICE_RESET_NAME( mb87078 )(this);
}
-
-
diff --git a/src/emu/machine/mb87078.h b/src/emu/machine/mb87078.h
index 345b30ed920..00bb9d021f8 100644
--- a/src/emu/machine/mb87078.h
+++ b/src/emu/machine/mb87078.h
@@ -74,4 +74,4 @@ float mb87078_gain_decibel_r(device_t *device, int channel);
int mb87078_gain_percent_r(device_t *device, int channel);
-#endif /* __MB87078_H__ */
+#endif /* __MB87078_H__ */
diff --git a/src/emu/machine/mc146818.c b/src/emu/machine/mc146818.c
index c350e083620..dfd8fc3949c 100644
--- a/src/emu/machine/mc146818.c
+++ b/src/emu/machine/mc146818.c
@@ -80,7 +80,7 @@
// DEBUGGING
//**************************************************************************
-#define LOG_MC146818 0
+#define LOG_MC146818 0
@@ -88,15 +88,15 @@
// MACROS
//**************************************************************************
-#define USE_UTC 1
+#define USE_UTC 1
-#define HOURS_24 (m_data[0xb]&2)
-#define BCD_MODE !(m_data[0xb]&4) // book has other description!
-#define CENTURY m_data[100]
-#define YEAR m_data[9]
-#define MONTH m_data[8]
-#define DAY m_data[7]
-#define WEEK_DAY m_data[6]
+#define HOURS_24 (m_data[0xb]&2)
+#define BCD_MODE !(m_data[0xb]&4) // book has other description!
+#define CENTURY m_data[100]
+#define YEAR m_data[9]
+#define MONTH m_data[8]
+#define DAY m_data[7]
+#define WEEK_DAY m_data[6]
@@ -113,13 +113,13 @@ const device_type MC146818 = &device_creator<mc146818_device>;
mc146818_device::mc146818_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MC146818, "NVRAM", tag, owner, clock),
- device_rtc_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_type(MC146818_STANDARD),
- m_index(0),
- m_eindex(0),
- m_updated(false),
- m_last_refresh(attotime::zero)
+ device_rtc_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_type(MC146818_STANDARD),
+ m_index(0),
+ m_eindex(0),
+ m_updated(false),
+ m_last_refresh(attotime::zero)
{
}
@@ -386,11 +386,11 @@ void mc146818_device::set_base_datetime()
if (m_type != MC146818_IGNORE_CENTURY)
CENTURY = dec_2_local(current_time.year /100);
- m_data[0] = dec_2_local(current_time.second);
- m_data[2] = dec_2_local(current_time.minute);
- DAY = dec_2_local(current_time.mday);
- MONTH = dec_2_local(current_time.month + 1);
- YEAR = dec_2_local(current_time.year % 100);
+ m_data[0] = dec_2_local(current_time.second);
+ m_data[2] = dec_2_local(current_time.minute);
+ DAY = dec_2_local(current_time.mday);
+ MONTH = dec_2_local(current_time.month + 1);
+ YEAR = dec_2_local(current_time.year % 100);
WEEK_DAY = current_time.weekday;
if (current_time.is_dst)
@@ -482,7 +482,7 @@ WRITE8_MEMBER( mc146818_device::write )
else m_period = attotime::never;
if(m_data[0x0b] & 0x40)
- rate = attotime::zero;
+ rate = attotime::zero;
else rate = attotime::never;
m_periodic_timer->adjust(rate, 0, m_period);
diff --git a/src/emu/machine/mc146818.h b/src/emu/machine/mc146818.h
index 221076f1b92..5ba26b3333c 100644
--- a/src/emu/machine/mc146818.h
+++ b/src/emu/machine/mc146818.h
@@ -36,12 +36,12 @@
struct mc146818_interface
{
- devcb_write_line m_out_irq_cb;
+ devcb_write_line m_out_irq_cb;
};
// ======================> mc146818_device
-class mc146818_device : public device_t,
+class mc146818_device : public device_t,
public device_rtc_interface,
public device_nvram_interface,
public mc146818_interface
@@ -85,20 +85,20 @@ protected:
void set_base_datetime();
// internal state
- static const int MC146818_DATA_SIZE = 0x80;
+ static const int MC146818_DATA_SIZE = 0x80;
- mc146818_type m_type;
+ mc146818_type m_type;
- UINT8 m_index;
- UINT8 m_data[MC146818_DATA_SIZE];
+ UINT8 m_index;
+ UINT8 m_data[MC146818_DATA_SIZE];
- UINT16 m_eindex;
- UINT8 m_edata[0x2000];
+ UINT16 m_eindex;
+ UINT8 m_edata[0x2000];
- bool m_updated; /* update ended interrupt flag */
+ bool m_updated; /* update ended interrupt flag */
- attotime m_last_refresh;
- attotime m_period;
+ attotime m_last_refresh;
+ attotime m_period;
static const device_timer_id TIMER_CLOCK = 0;
static const device_timer_id TIMER_PERIODIC = 1;
diff --git a/src/emu/machine/mc2661.c b/src/emu/machine/mc2661.c
index 80ec243781e..2fb467f3d89 100644
--- a/src/emu/machine/mc2661.c
+++ b/src/emu/machine/mc2661.c
@@ -36,13 +36,13 @@ enum
};
-#define MODE_BAUD_RATE (m_mr[0] & 0x03)
-#define MODE_CHARACTER ((m_mr[0] >> 2) & 0x03)
-#define MODE_PARITY BIT(m_mr[0], 4)
-#define MODE_PARITY_EVEN BIT(m_mr[0], 5)
-#define MODE_TRANSPARENT BIT(m_mr[0], 6)
-#define MODE_SINGLE_SYN BIT(m_mr[0], 7)
-#define MODE_STOP_BITS ((m_mr[0] >> 6) & 0x03)
+#define MODE_BAUD_RATE (m_mr[0] & 0x03)
+#define MODE_CHARACTER ((m_mr[0] >> 2) & 0x03)
+#define MODE_PARITY BIT(m_mr[0], 4)
+#define MODE_PARITY_EVEN BIT(m_mr[0], 5)
+#define MODE_TRANSPARENT BIT(m_mr[0], 6)
+#define MODE_SINGLE_SYN BIT(m_mr[0], 7)
+#define MODE_STOP_BITS ((m_mr[0] >> 6) & 0x03)
enum
@@ -54,19 +54,19 @@ enum
};
-#define SYN1 m_sync[0]
-#define SYN2 m_sync[1]
-#define DLE m_sync[2]
+#define SYN1 m_sync[0]
+#define SYN2 m_sync[1]
+#define DLE m_sync[2]
-#define COMMAND_TXEN BIT(m_cr, 0)
-#define COMMAND_DTR BIT(m_cr, 1)
-#define COMMAND_RXEN BIT(m_cr, 2)
-#define COMMAND_BREAK BIT(m_cr, 3)
-#define COMMAND_DLE BIT(m_cr, 3)
-#define COMMAND_RESET BIT(m_cr, 4)
-#define COMMAND_RTS BIT(m_cr, 5)
-#define COMMAND_MODE (m_cr >> 6)
+#define COMMAND_TXEN BIT(m_cr, 0)
+#define COMMAND_DTR BIT(m_cr, 1)
+#define COMMAND_RXEN BIT(m_cr, 2)
+#define COMMAND_BREAK BIT(m_cr, 3)
+#define COMMAND_DLE BIT(m_cr, 3)
+#define COMMAND_RESET BIT(m_cr, 4)
+#define COMMAND_RTS BIT(m_cr, 5)
+#define COMMAND_MODE (m_cr >> 6)
enum
@@ -78,16 +78,16 @@ enum
};
-#define STATUS_TXRDY 0x01
-#define STATUS_RXRDY 0x02
-#define STATUS_TXEMT 0x04
-#define STATUS_PE 0x08
-#define STATUS_DLE 0x08
-#define STATUS_OVERRUN 0x10
-#define STATUS_FE 0x20
-#define STATUS_SYN 0x20
-#define STATUS_DCD 0x40
-#define STATUS_DSR 0x80
+#define STATUS_TXRDY 0x01
+#define STATUS_RXRDY 0x02
+#define STATUS_TXEMT 0x04
+#define STATUS_PE 0x08
+#define STATUS_DLE 0x08
+#define STATUS_OVERRUN 0x10
+#define STATUS_FE 0x20
+#define STATUS_SYN 0x20
+#define STATUS_DCD 0x40
+#define STATUS_DSR 0x80
@@ -123,8 +123,8 @@ inline void mc2661_device::transmit()
//-------------------------------------------------
mc2661_device::mc2661_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MC2661, "MC2661", tag, owner, clock),
- device_serial_interface(mconfig, *this)
+ : device_t(mconfig, MC2661, "MC2661", tag, owner, clock),
+ device_serial_interface(mconfig, *this)
{
}
@@ -329,9 +329,9 @@ WRITE8_MEMBER( mc2661_device::write )
switch (MODE_STOP_BITS)
{
- case STOP_BITS_1: stop_bits = 1; break;
- case STOP_BITS_1_5: stop_bits = 1.5; break;
- case STOP_BITS_2: stop_bits = 2; break;
+ case STOP_BITS_1: stop_bits = 1; break;
+ case STOP_BITS_1_5: stop_bits = 1.5; break;
+ case STOP_BITS_2: stop_bits = 2; break;
}
if (!MODE_PARITY) parity_code = SERIAL_PARITY_NONE;
diff --git a/src/emu/machine/mc2661.h b/src/emu/machine/mc2661.h
index f4e282b9c51..f3192441de0 100644
--- a/src/emu/machine/mc2661.h
+++ b/src/emu/machine/mc2661.h
@@ -58,24 +58,24 @@ struct mc2661_interface
int m_rxc;
int m_txc;
- devcb_read_line m_in_rxd_cb;
- devcb_write_line m_out_txd_cb;
-
- devcb_write_line m_out_rxrdy_cb;
- devcb_write_line m_out_txrdy_cb;
- devcb_write_line m_out_rts_cb;
- devcb_write_line m_out_dtr_cb;
- devcb_write_line m_out_txemt_dschg_cb;
- devcb_write_line m_out_bkdet_cb;
- devcb_write_line m_out_xsync_cb;
+ devcb_read_line m_in_rxd_cb;
+ devcb_write_line m_out_txd_cb;
+
+ devcb_write_line m_out_rxrdy_cb;
+ devcb_write_line m_out_txrdy_cb;
+ devcb_write_line m_out_rts_cb;
+ devcb_write_line m_out_dtr_cb;
+ devcb_write_line m_out_txemt_dschg_cb;
+ devcb_write_line m_out_bkdet_cb;
+ devcb_write_line m_out_xsync_cb;
};
// ======================> mc2661_device
class mc2661_device : public device_t,
- public device_serial_interface,
- public mc2661_interface
+ public device_serial_interface,
+ public mc2661_interface
{
public:
// construction/destruction
@@ -114,16 +114,16 @@ private:
TIMER_TX
};
- devcb_resolved_read_line m_in_rxd_func;
- devcb_resolved_write_line m_out_txd_func;
+ devcb_resolved_read_line m_in_rxd_func;
+ devcb_resolved_write_line m_out_txd_func;
- devcb_resolved_write_line m_out_rxrdy_func;
- devcb_resolved_write_line m_out_txrdy_func;
- devcb_resolved_write_line m_out_rts_func;
- devcb_resolved_write_line m_out_dtr_func;
- devcb_resolved_write_line m_out_txemt_dschg_func;
- devcb_resolved_write_line m_out_bkdet_func;
- devcb_resolved_write_line m_out_xsync_func;
+ devcb_resolved_write_line m_out_rxrdy_func;
+ devcb_resolved_write_line m_out_txrdy_func;
+ devcb_resolved_write_line m_out_rts_func;
+ devcb_resolved_write_line m_out_dtr_func;
+ devcb_resolved_write_line m_out_txemt_dschg_func;
+ devcb_resolved_write_line m_out_bkdet_func;
+ devcb_resolved_write_line m_out_xsync_func;
UINT8 m_rhr;
UINT8 m_thr;
diff --git a/src/emu/machine/mc6852.c b/src/emu/machine/mc6852.c
index d8e39b24b9e..37dcf5a3729 100644
--- a/src/emu/machine/mc6852.c
+++ b/src/emu/machine/mc6852.c
@@ -37,49 +37,49 @@ const device_type MC6852 = &device_creator<mc6852_device>;
#define LOG 0
-#define S_RDA 0x01
-#define S_TDRA 0x02
-#define S_DCD 0x04
-#define S_CTS 0x08
-#define S_TUF 0x10
-#define S_RX_OVRN 0x20
-#define S_PE 0x40
-#define S_IRQ 0x80
-
-
-#define C1_RX_RS 0x01
-#define C1_TX_RS 0x02
-#define C1_STRIP_SYNC 0x04
-#define C1_CLEAR_SYNC 0x08
-#define C1_TIE 0x10
-#define C1_RIE 0x20
-#define C1_AC_MASK 0xc0
-#define C1_AC_C2 0x00
-#define C1_AC_C3 0x40
-#define C1_AC_SYNC 0x80
-#define C1_AC_TX_FIFO 0xc0
-
-
-#define C2_PC1 0x01
-#define C2_PC2 0x02
-#define C2_1_2_BYTE 0x04
-#define C2_WS_MASK 0x38
-#define C2_WS_6_E 0x00
-#define C2_WS_6_O 0x08
-#define C2_WS_7 0x10
-#define C2_WS_8 0x18
-#define C2_WS_7_E 0x20
-#define C2_WS_7_O 0x28
-#define C2_WS_8_E 0x30
-#define C2_WS_8_O 0x38
-#define C2_TX_SYNC 0x40
-#define C2_EIE 0x80
-
-
-#define C3_E_I_SYNC 0x01
-#define C3_1_2_SYNC 0x02
-#define C3_CLEAR_CTS 0x04
-#define C3_CTUF 0x08
+#define S_RDA 0x01
+#define S_TDRA 0x02
+#define S_DCD 0x04
+#define S_CTS 0x08
+#define S_TUF 0x10
+#define S_RX_OVRN 0x20
+#define S_PE 0x40
+#define S_IRQ 0x80
+
+
+#define C1_RX_RS 0x01
+#define C1_TX_RS 0x02
+#define C1_STRIP_SYNC 0x04
+#define C1_CLEAR_SYNC 0x08
+#define C1_TIE 0x10
+#define C1_RIE 0x20
+#define C1_AC_MASK 0xc0
+#define C1_AC_C2 0x00
+#define C1_AC_C3 0x40
+#define C1_AC_SYNC 0x80
+#define C1_AC_TX_FIFO 0xc0
+
+
+#define C2_PC1 0x01
+#define C2_PC2 0x02
+#define C2_1_2_BYTE 0x04
+#define C2_WS_MASK 0x38
+#define C2_WS_6_E 0x00
+#define C2_WS_6_O 0x08
+#define C2_WS_7 0x10
+#define C2_WS_8 0x18
+#define C2_WS_7_E 0x20
+#define C2_WS_7_O 0x28
+#define C2_WS_8_E 0x30
+#define C2_WS_8_O 0x38
+#define C2_TX_SYNC 0x40
+#define C2_EIE 0x80
+
+
+#define C3_E_I_SYNC 0x01
+#define C3_1_2_SYNC 0x02
+#define C3_CLEAR_CTS 0x04
+#define C3_CTUF 0x08
//**************************************************************************
@@ -105,7 +105,7 @@ inline void mc6852_device::transmit()
//-------------------------------------------------
mc6852_device::mc6852_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MC6852, "MC6852", tag, owner, clock)
+ : device_t(mconfig, MC6852, "MC6852", tag, owner, clock)
{
}
@@ -272,10 +272,10 @@ WRITE8_MEMBER( mc6852_device::write )
if (data & C1_RX_RS)
{
/* When Rx Rs is set, it clears the receiver
- control logic, sync logic, error logic, Rx Data FIFO Control,
- Parity Error status bit, and DCD interrupt. The Receiver Shift
- Register is set to ones.
- */
+ control logic, sync logic, error logic, Rx Data FIFO Control,
+ Parity Error status bit, and DCD interrupt. The Receiver Shift
+ Register is set to ones.
+ */
if (LOG) logerror("MC6852 '%s' Receiver Reset\n", tag());
@@ -287,11 +287,11 @@ WRITE8_MEMBER( mc6852_device::write )
if (data & C1_TX_RS)
{
/* When Tx Rs is set, it clears the transmitter
- control section, Transmitter Shift Register, Tx Data FIFO
- Control (the Tx Data FIFO can be reloaded after one E clock
- pulse), the Transmitter Underflow status bit, and the CTS interrupt,
- and inhibits the TDRA status bit (in the one-sync-character
- and two-sync-character modes).*/
+ control section, Transmitter Shift Register, Tx Data FIFO
+ Control (the Tx Data FIFO can be reloaded after one E clock
+ pulse), the Transmitter Underflow status bit, and the CTS interrupt,
+ and inhibits the TDRA status bit (in the one-sync-character
+ and two-sync-character modes).*/
if (LOG) logerror("MC6852 '%s' Transmitter Reset\n", tag());
diff --git a/src/emu/machine/mc6852.h b/src/emu/machine/mc6852.h
index c0c6090d624..9d95b35a9f1 100644
--- a/src/emu/machine/mc6852.h
+++ b/src/emu/machine/mc6852.h
@@ -36,7 +36,7 @@
//**************************************************************************
#define MCFG_MC6852_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), MC6852, _clock) \
+ MCFG_DEVICE_ADD((_tag), MC6852, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define MC6852_INTERFACE(name) \
@@ -52,32 +52,32 @@
struct mc6852_interface
{
- UINT32 m_rx_clock;
- UINT32 m_tx_clock;
+ UINT32 m_rx_clock;
+ UINT32 m_tx_clock;
- devcb_read_line m_in_rx_data_cb;
- devcb_write_line m_out_tx_data_cb;
+ devcb_read_line m_in_rx_data_cb;
+ devcb_write_line m_out_tx_data_cb;
- devcb_write_line m_out_irq_cb;
+ devcb_write_line m_out_irq_cb;
- devcb_read_line m_in_cts_cb;
- devcb_read_line m_in_dcd_cb;
- devcb_write_line m_out_sm_dtr_cb;
- devcb_write_line m_out_tuf_cb;
+ devcb_read_line m_in_cts_cb;
+ devcb_read_line m_in_dcd_cb;
+ devcb_write_line m_out_sm_dtr_cb;
+ devcb_write_line m_out_tuf_cb;
};
// ======================> mc6852_device
-class mc6852_device : public device_t,
- public mc6852_interface
+class mc6852_device : public device_t,
+ public mc6852_interface
{
public:
- // construction/destruction
- mc6852_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mc6852_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( rx_clk_w );
DECLARE_WRITE_LINE_MEMBER( tx_clk_w );
@@ -88,10 +88,10 @@ public:
DECLARE_READ_LINE_MEMBER( tuf_r );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int m_param, void *ptr);
private:
@@ -101,29 +101,29 @@ private:
inline void receive();
inline void transmit();
- devcb_resolved_read_line m_in_rx_data_func;
- devcb_resolved_write_line m_out_tx_data_func;
- devcb_resolved_write_line m_out_irq_func;
- devcb_resolved_read_line m_in_cts_func;
- devcb_resolved_read_line m_in_dcd_func;
- devcb_resolved_write_line m_out_sm_dtr_func;
- devcb_resolved_write_line m_out_tuf_func;
+ devcb_resolved_read_line m_in_rx_data_func;
+ devcb_resolved_write_line m_out_tx_data_func;
+ devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_read_line m_in_cts_func;
+ devcb_resolved_read_line m_in_dcd_func;
+ devcb_resolved_write_line m_out_sm_dtr_func;
+ devcb_resolved_write_line m_out_tuf_func;
// registers
- UINT8 m_status; // status register
- UINT8 m_cr[3]; // control registers
- UINT8 m_scr; // sync code register
- UINT8 m_rx_fifo[3]; // receiver FIFO
- UINT8 m_tx_fifo[3]; // transmitter FIFO
- UINT8 m_tdr; // transmit data register
- UINT8 m_tsr; // transmit shift register
- UINT8 m_rdr; // receive data register
- UINT8 m_rsr; // receive shift register
-
- int m_cts; // clear to send
- int m_dcd; // data carrier detect
- int m_sm_dtr; // sync match/data terminal ready
- int m_tuf; // transmitter underflow
+ UINT8 m_status; // status register
+ UINT8 m_cr[3]; // control registers
+ UINT8 m_scr; // sync code register
+ UINT8 m_rx_fifo[3]; // receiver FIFO
+ UINT8 m_tx_fifo[3]; // transmitter FIFO
+ UINT8 m_tdr; // transmit data register
+ UINT8 m_tsr; // transmit shift register
+ UINT8 m_rdr; // receive data register
+ UINT8 m_rsr; // receive shift register
+
+ int m_cts; // clear to send
+ int m_dcd; // data carrier detect
+ int m_sm_dtr; // sync match/data terminal ready
+ int m_tuf; // transmitter underflow
// timers
emu_timer *m_rx_timer;
diff --git a/src/emu/machine/mc68901.c b/src/emu/machine/mc68901.c
index 89fc6230797..cf5c81f6b52 100644
--- a/src/emu/machine/mc68901.c
+++ b/src/emu/machine/mc68901.c
@@ -152,93 +152,93 @@ enum
};
-#define AER_GPIP_0 0x01
-#define AER_GPIP_1 0x02
-#define AER_GPIP_2 0x04
-#define AER_GPIP_3 0x08
-#define AER_GPIP_4 0x10
-#define AER_GPIP_5 0x20
-#define AER_GPIP_6 0x40
-#define AER_GPIP_7 0x80
-
-
-#define VR_S 0x08
-
-
-#define IR_GPIP_0 0x0001
-#define IR_GPIP_1 0x0002
-#define IR_GPIP_2 0x0004
-#define IR_GPIP_3 0x0008
-#define IR_TIMER_D 0x0010
-#define IR_TIMER_C 0x0020
-#define IR_GPIP_4 0x0040
-#define IR_GPIP_5 0x0080
-#define IR_TIMER_B 0x0100
-#define IR_XMIT_ERROR 0x0200
-#define IR_XMIT_BUFFER_EMPTY 0x0400
-#define IR_RCV_ERROR 0x0800
-#define IR_RCV_BUFFER_FULL 0x1000
-#define IR_TIMER_A 0x2000
-#define IR_GPIP_6 0x4000
-#define IR_GPIP_7 0x8000
-
-
-#define TCR_TIMER_STOPPED 0x00
-#define TCR_TIMER_DELAY_4 0x01
-#define TCR_TIMER_DELAY_10 0x02
-#define TCR_TIMER_DELAY_16 0x03
-#define TCR_TIMER_DELAY_50 0x04
-#define TCR_TIMER_DELAY_64 0x05
-#define TCR_TIMER_DELAY_100 0x06
-#define TCR_TIMER_DELAY_200 0x07
-#define TCR_TIMER_EVENT 0x08
-#define TCR_TIMER_PULSE_4 0x09
-#define TCR_TIMER_PULSE_10 0x0a
-#define TCR_TIMER_PULSE_16 0x0b
-#define TCR_TIMER_PULSE_50 0x0c
-#define TCR_TIMER_PULSE_64 0x0d
-#define TCR_TIMER_PULSE_100 0x0e
-#define TCR_TIMER_PULSE_200 0x0f
-#define TCR_TIMER_RESET 0x10
-
-
-#define UCR_PARITY_ENABLED 0x04
-#define UCR_PARITY_EVEN 0x02
-#define UCR_PARITY_ODD 0x00
-#define UCR_WORD_LENGTH_8 0x00
-#define UCR_WORD_LENGTH_7 0x20
-#define UCR_WORD_LENGTH_6 0x40
-#define UCR_WORD_LENGTH_5 0x60
-#define UCR_START_STOP_0_0 0x00
-#define UCR_START_STOP_1_1 0x08
-#define UCR_START_STOP_1_15 0x10
-#define UCR_START_STOP_1_2 0x18
-#define UCR_CLOCK_DIVIDE_16 0x80
-#define UCR_CLOCK_DIVIDE_1 0x00
-
-
-#define RSR_RCV_ENABLE 0x01
-#define RSR_SYNC_STRIP_ENABLE 0x02
-#define RSR_MATCH 0x04
-#define RSR_CHAR_IN_PROGRESS 0x04
-#define RSR_FOUND_SEARCH 0x08
-#define RSR_BREAK 0x08
-#define RSR_FRAME_ERROR 0x10
-#define RSR_PARITY_ERROR 0x20
-#define RSR_OVERRUN_ERROR 0x40
-#define RSR_BUFFER_FULL 0x80
-
-#define TSR_XMIT_ENABLE 0x01
-#define TSR_OUTPUT_HI_Z 0x00
-#define TSR_OUTPUT_LOW 0x02
-#define TSR_OUTPUT_HIGH 0x04
-#define TSR_OUTPUT_LOOP 0x06
-#define TSR_OUTPUT_MASK 0x06
-#define TSR_BREAK 0x08
-#define TSR_END_OF_XMIT 0x10
-#define TSR_AUTO_TURNAROUND 0x20
-#define TSR_UNDERRUN_ERROR 0x40
-#define TSR_BUFFER_EMPTY 0x80
+#define AER_GPIP_0 0x01
+#define AER_GPIP_1 0x02
+#define AER_GPIP_2 0x04
+#define AER_GPIP_3 0x08
+#define AER_GPIP_4 0x10
+#define AER_GPIP_5 0x20
+#define AER_GPIP_6 0x40
+#define AER_GPIP_7 0x80
+
+
+#define VR_S 0x08
+
+
+#define IR_GPIP_0 0x0001
+#define IR_GPIP_1 0x0002
+#define IR_GPIP_2 0x0004
+#define IR_GPIP_3 0x0008
+#define IR_TIMER_D 0x0010
+#define IR_TIMER_C 0x0020
+#define IR_GPIP_4 0x0040
+#define IR_GPIP_5 0x0080
+#define IR_TIMER_B 0x0100
+#define IR_XMIT_ERROR 0x0200
+#define IR_XMIT_BUFFER_EMPTY 0x0400
+#define IR_RCV_ERROR 0x0800
+#define IR_RCV_BUFFER_FULL 0x1000
+#define IR_TIMER_A 0x2000
+#define IR_GPIP_6 0x4000
+#define IR_GPIP_7 0x8000
+
+
+#define TCR_TIMER_STOPPED 0x00
+#define TCR_TIMER_DELAY_4 0x01
+#define TCR_TIMER_DELAY_10 0x02
+#define TCR_TIMER_DELAY_16 0x03
+#define TCR_TIMER_DELAY_50 0x04
+#define TCR_TIMER_DELAY_64 0x05
+#define TCR_TIMER_DELAY_100 0x06
+#define TCR_TIMER_DELAY_200 0x07
+#define TCR_TIMER_EVENT 0x08
+#define TCR_TIMER_PULSE_4 0x09
+#define TCR_TIMER_PULSE_10 0x0a
+#define TCR_TIMER_PULSE_16 0x0b
+#define TCR_TIMER_PULSE_50 0x0c
+#define TCR_TIMER_PULSE_64 0x0d
+#define TCR_TIMER_PULSE_100 0x0e
+#define TCR_TIMER_PULSE_200 0x0f
+#define TCR_TIMER_RESET 0x10
+
+
+#define UCR_PARITY_ENABLED 0x04
+#define UCR_PARITY_EVEN 0x02
+#define UCR_PARITY_ODD 0x00
+#define UCR_WORD_LENGTH_8 0x00
+#define UCR_WORD_LENGTH_7 0x20
+#define UCR_WORD_LENGTH_6 0x40
+#define UCR_WORD_LENGTH_5 0x60
+#define UCR_START_STOP_0_0 0x00
+#define UCR_START_STOP_1_1 0x08
+#define UCR_START_STOP_1_15 0x10
+#define UCR_START_STOP_1_2 0x18
+#define UCR_CLOCK_DIVIDE_16 0x80
+#define UCR_CLOCK_DIVIDE_1 0x00
+
+
+#define RSR_RCV_ENABLE 0x01
+#define RSR_SYNC_STRIP_ENABLE 0x02
+#define RSR_MATCH 0x04
+#define RSR_CHAR_IN_PROGRESS 0x04
+#define RSR_FOUND_SEARCH 0x08
+#define RSR_BREAK 0x08
+#define RSR_FRAME_ERROR 0x10
+#define RSR_PARITY_ERROR 0x20
+#define RSR_OVERRUN_ERROR 0x40
+#define RSR_BUFFER_FULL 0x80
+
+#define TSR_XMIT_ENABLE 0x01
+#define TSR_OUTPUT_HI_Z 0x00
+#define TSR_OUTPUT_LOW 0x02
+#define TSR_OUTPUT_HIGH 0x04
+#define TSR_OUTPUT_LOOP 0x06
+#define TSR_OUTPUT_MASK 0x06
+#define TSR_BREAK 0x08
+#define TSR_END_OF_XMIT 0x10
+#define TSR_AUTO_TURNAROUND 0x20
+#define TSR_UNDERRUN_ERROR 0x40
+#define TSR_BUFFER_EMPTY 0x80
static const int INT_MASK_GPIO[] =
@@ -631,10 +631,10 @@ inline void mc68901_device::serial_transmit()
{
switch (m_xmit_state)
{
- case XMIT_OFF: tx_disabled(); break;
- case XMIT_STARTING: tx_starting(); break;
- case XMIT_BREAK: tx_break(); break;
- case XMIT_ON: tx_enabled(); break;
+ case XMIT_OFF: tx_disabled(); break;
+ case XMIT_STARTING: tx_starting(); break;
+ case XMIT_BREAK: tx_break(); break;
+ case XMIT_ON: tx_enabled(); break;
}
}
@@ -648,10 +648,10 @@ inline void mc68901_device::timer_count(int index)
switch (index)
{
- case TIMER_A: m_out_tao_func(m_to[index]); break;
- case TIMER_B: m_out_tbo_func(m_to[index]); break;
- case TIMER_C: m_out_tco_func(m_to[index]); break;
- case TIMER_D: m_out_tdo_func(m_to[index]); break;
+ case TIMER_A: m_out_tao_func(m_to[index]); break;
+ case TIMER_B: m_out_tbo_func(m_to[index]); break;
+ case TIMER_C: m_out_tco_func(m_to[index]); break;
+ case TIMER_D: m_out_tdo_func(m_to[index]); break;
}
if (m_ier & INT_MASK_TIMER[index])
@@ -740,9 +740,9 @@ inline void mc68901_device::gpio_input(int bit, int state)
//-------------------------------------------------
mc68901_device::mc68901_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MC68901, "Motorola MC68901", tag, owner, clock),
- m_gpip(0),
- m_tsr(TSR_BUFFER_EMPTY)
+ : device_t(mconfig, MC68901, "Motorola MC68901", tag, owner, clock),
+ m_gpip(0),
+ m_tsr(TSR_BUFFER_EMPTY)
{
}
@@ -957,7 +957,7 @@ READ8_MEMBER( mc68901_device::read )
return m_udr;
- default: return 0;
+ default: return 0;
}
}
@@ -1439,14 +1439,14 @@ int mc68901_device::get_vector()
return M68K_INT_ACK_SPURIOUS;
}
-WRITE_LINE_MEMBER( mc68901_device::i0_w ) { gpio_input(0, state); }
-WRITE_LINE_MEMBER( mc68901_device::i1_w ) { gpio_input(1, state); }
-WRITE_LINE_MEMBER( mc68901_device::i2_w ) { gpio_input(2, state); }
-WRITE_LINE_MEMBER( mc68901_device::i3_w ) { gpio_input(3, state); }
-WRITE_LINE_MEMBER( mc68901_device::i4_w ) { gpio_input(4, state); }
-WRITE_LINE_MEMBER( mc68901_device::i5_w ) { gpio_input(5, state); }
-WRITE_LINE_MEMBER( mc68901_device::i6_w ) { gpio_input(6, state); }
-WRITE_LINE_MEMBER( mc68901_device::i7_w ) { gpio_input(7, state); }
+WRITE_LINE_MEMBER( mc68901_device::i0_w ) { gpio_input(0, state); }
+WRITE_LINE_MEMBER( mc68901_device::i1_w ) { gpio_input(1, state); }
+WRITE_LINE_MEMBER( mc68901_device::i2_w ) { gpio_input(2, state); }
+WRITE_LINE_MEMBER( mc68901_device::i3_w ) { gpio_input(3, state); }
+WRITE_LINE_MEMBER( mc68901_device::i4_w ) { gpio_input(4, state); }
+WRITE_LINE_MEMBER( mc68901_device::i5_w ) { gpio_input(5, state); }
+WRITE_LINE_MEMBER( mc68901_device::i6_w ) { gpio_input(6, state); }
+WRITE_LINE_MEMBER( mc68901_device::i7_w ) { gpio_input(7, state); }
WRITE_LINE_MEMBER( mc68901_device::tai_w )
diff --git a/src/emu/machine/mc68901.h b/src/emu/machine/mc68901.h
index 5bfaf4cb2e7..45f1b78e5ee 100644
--- a/src/emu/machine/mc68901.h
+++ b/src/emu/machine/mc68901.h
@@ -55,7 +55,7 @@
//**************************************************************************
#define MCFG_MC68901_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), MC68901, _clock) \
+ MCFG_DEVICE_ADD((_tag), MC68901, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define MC68901_INTERFACE(name) \
@@ -71,39 +71,39 @@
struct mc68901_interface
{
- int m_timer_clock; /* timer clock */
- int m_rx_clock; /* serial receive clock */
- int m_tx_clock; /* serial transmit clock */
+ int m_timer_clock; /* timer clock */
+ int m_rx_clock; /* serial receive clock */
+ int m_tx_clock; /* serial transmit clock */
- devcb_write_line m_out_irq_cb;
+ devcb_write_line m_out_irq_cb;
- devcb_read8 m_in_gpio_cb;
- devcb_write8 m_out_gpio_cb;
+ devcb_read8 m_in_gpio_cb;
+ devcb_write8 m_out_gpio_cb;
- devcb_write_line m_out_tao_cb;
- devcb_write_line m_out_tbo_cb;
- devcb_write_line m_out_tco_cb;
- devcb_write_line m_out_tdo_cb;
+ devcb_write_line m_out_tao_cb;
+ devcb_write_line m_out_tbo_cb;
+ devcb_write_line m_out_tco_cb;
+ devcb_write_line m_out_tdo_cb;
- devcb_read_line m_in_si_cb;
- devcb_write_line m_out_so_cb;
- devcb_write_line m_out_rr_cb;
- devcb_write_line m_out_tr_cb;
+ devcb_read_line m_in_si_cb;
+ devcb_write_line m_out_so_cb;
+ devcb_write_line m_out_rr_cb;
+ devcb_write_line m_out_tr_cb;
};
// ======================> mc68901_device
-class mc68901_device : public device_t,
- public mc68901_interface
+class mc68901_device : public device_t,
+ public mc68901_interface
{
public:
- // construction/destruction
- mc68901_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mc68901_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
int get_vector();
@@ -123,10 +123,10 @@ public:
DECLARE_WRITE_LINE_MEMBER( tc_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
void check_interrupts();
@@ -155,72 +155,72 @@ private:
static const device_timer_id TIMER_RX = 4;
static const device_timer_id TIMER_TX = 5;
- devcb_resolved_read8 m_in_gpio_func;
- devcb_resolved_write8 m_out_gpio_func;
- devcb_resolved_read_line m_in_si_func;
- devcb_resolved_write_line m_out_so_func;
- devcb_resolved_write_line m_out_tao_func;
- devcb_resolved_write_line m_out_tbo_func;
- devcb_resolved_write_line m_out_tco_func;
- devcb_resolved_write_line m_out_tdo_func;
- devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_read8 m_in_gpio_func;
+ devcb_resolved_write8 m_out_gpio_func;
+ devcb_resolved_read_line m_in_si_func;
+ devcb_resolved_write_line m_out_so_func;
+ devcb_resolved_write_line m_out_tao_func;
+ devcb_resolved_write_line m_out_tbo_func;
+ devcb_resolved_write_line m_out_tco_func;
+ devcb_resolved_write_line m_out_tdo_func;
+ devcb_resolved_write_line m_out_irq_func;
- int m_device_type; /* device type */
+ int m_device_type; /* device type */
/* registers */
- UINT8 m_gpip; /* general purpose I/O register */
- UINT8 m_aer; /* active edge register */
- UINT8 m_ddr; /* data direction register */
-
- UINT16 m_ier; /* interrupt enable register */
- UINT16 m_ipr; /* interrupt pending register */
- UINT16 m_isr; /* interrupt in-service register */
- UINT16 m_imr; /* interrupt mask register */
- UINT8 m_vr; /* vector register */
-
- UINT8 m_tacr; /* timer A control register */
- UINT8 m_tbcr; /* timer B control register */
- UINT8 m_tcdcr; /* timers C and D control register */
- UINT8 m_tdr[4]; /* timer data registers */
-
- UINT8 m_scr; /* synchronous character register */
- UINT8 m_ucr; /* USART control register */
- UINT8 m_tsr; /* transmitter status register */
- UINT8 m_rsr; /* receiver status register */
- UINT8 m_udr; /* USART data register */
+ UINT8 m_gpip; /* general purpose I/O register */
+ UINT8 m_aer; /* active edge register */
+ UINT8 m_ddr; /* data direction register */
+
+ UINT16 m_ier; /* interrupt enable register */
+ UINT16 m_ipr; /* interrupt pending register */
+ UINT16 m_isr; /* interrupt in-service register */
+ UINT16 m_imr; /* interrupt mask register */
+ UINT8 m_vr; /* vector register */
+
+ UINT8 m_tacr; /* timer A control register */
+ UINT8 m_tbcr; /* timer B control register */
+ UINT8 m_tcdcr; /* timers C and D control register */
+ UINT8 m_tdr[4]; /* timer data registers */
+
+ UINT8 m_scr; /* synchronous character register */
+ UINT8 m_ucr; /* USART control register */
+ UINT8 m_tsr; /* transmitter status register */
+ UINT8 m_rsr; /* receiver status register */
+ UINT8 m_udr; /* USART data register */
/* counter timer state */
- UINT8 m_tmc[4]; /* timer main counters */
- int m_ti[4]; /* timer in latch */
- int m_to[4]; /* timer out latch */
+ UINT8 m_tmc[4]; /* timer main counters */
+ int m_ti[4]; /* timer in latch */
+ int m_to[4]; /* timer out latch */
/* interrupt state */
- int m_irqlevel; /* interrupt level latch */
+ int m_irqlevel; /* interrupt level latch */
/* serial state */
- UINT8 m_next_rsr; /* receiver status register latch */
- int m_rsr_read; /* receiver status register read flag */
- int m_rxtx_word; /* word length */
- int m_rxtx_start; /* start bits */
- int m_rxtx_stop; /* stop bits */
+ UINT8 m_next_rsr; /* receiver status register latch */
+ int m_rsr_read; /* receiver status register read flag */
+ int m_rxtx_word; /* word length */
+ int m_rxtx_start; /* start bits */
+ int m_rxtx_stop; /* stop bits */
/* receive state */
- UINT8 m_rx_buffer; /* receive buffer */
- int m_rx_bits; /* receive bit count */
- int m_rx_parity; /* receive parity bit */
- int m_rx_state; /* receive state */
+ UINT8 m_rx_buffer; /* receive buffer */
+ int m_rx_bits; /* receive bit count */
+ int m_rx_parity; /* receive parity bit */
+ int m_rx_state; /* receive state */
/* transmit state */
- UINT8 m_tx_buffer; /* transmit buffer */
- int m_tx_bits; /* transmit bit count */
- int m_tx_parity; /* transmit parity bit */
- int m_tx_state; /* transmit state */
- int m_xmit_state; /* transmitter state */
+ UINT8 m_tx_buffer; /* transmit buffer */
+ int m_tx_bits; /* transmit bit count */
+ int m_tx_parity; /* transmit parity bit */
+ int m_tx_state; /* transmit state */
+ int m_xmit_state; /* transmitter state */
// timers
emu_timer *m_timer[4]; /* counter timers */
- emu_timer *m_rx_timer; /* receive timer */
- emu_timer *m_tx_timer; /* transmit timer */
+ emu_timer *m_rx_timer; /* receive timer */
+ emu_timer *m_tx_timer; /* transmit timer */
};
diff --git a/src/emu/machine/mccs1850.c b/src/emu/machine/mccs1850.c
index 0092010b681..fb12d53e054 100644
--- a/src/emu/machine/mccs1850.c
+++ b/src/emu/machine/mccs1850.c
@@ -54,44 +54,44 @@ enum
// clock status/interrupt register
-#define STATUS_TM 0x20 // test mode
-#define STATUS_FTU 0x10 // first time up
-#define STATUS_IT 0x08 // interrupt true
-#define STATUS_LB 0x04 // low battery
-#define STATUS_AI 0x02 // alarm
-#define STATUS_RPD 0x01 // request to power down
+#define STATUS_TM 0x20 // test mode
+#define STATUS_FTU 0x10 // first time up
+#define STATUS_IT 0x08 // interrupt true
+#define STATUS_LB 0x04 // low battery
+#define STATUS_AI 0x02 // alarm
+#define STATUS_RPD 0x01 // request to power down
// clock control register
-#define CONTROL_STR_STP 0x80 // start/stop
-#define CONTROL_PD 0x40 // power down
-#define CONTROL_AR 0x20 // auto restart
-#define CONTROL_AE 0x10 // alarm enable
-#define CONTROL_AC 0x08 // alarm clear
-#define CONTROL_FTUC 0x04 // first time up clear
-#define CONTROL_LBE 0x02 // low battery enable
-#define CONTROL_RPCD 0x01 // request to power down clear
+#define CONTROL_STR_STP 0x80 // start/stop
+#define CONTROL_PD 0x40 // power down
+#define CONTROL_AR 0x20 // auto restart
+#define CONTROL_AE 0x10 // alarm enable
+#define CONTROL_AC 0x08 // alarm clear
+#define CONTROL_FTUC 0x04 // first time up clear
+#define CONTROL_LBE 0x02 // low battery enable
+#define CONTROL_RPCD 0x01 // request to power down clear
// test register 1
-#define TEST1_DIV1 0x80 // divide by 1
-#define TEST1_VOVR 0x40 // Vdd override
-#define TEST1_VDDUP 0x20 // Vdd up
-#define TEST1_VDDON 0x10 // Vdd on
-#define TEST1_VRT 0x08 // valid RAM and time
-#define TEST1_LOW_BAT 0x08 // low battery
-#define TEST1_PCC 0x04 // programmable capacitor C (10.0 pF)
-#define TEST1_PCB 0x02 // programmable capacitor B (5.0 pF)
-#define TEST1_PCA 0x01 // programmable capacitor A (2.5 pF)
+#define TEST1_DIV1 0x80 // divide by 1
+#define TEST1_VOVR 0x40 // Vdd override
+#define TEST1_VDDUP 0x20 // Vdd up
+#define TEST1_VDDON 0x10 // Vdd on
+#define TEST1_VRT 0x08 // valid RAM and time
+#define TEST1_LOW_BAT 0x08 // low battery
+#define TEST1_PCC 0x04 // programmable capacitor C (10.0 pF)
+#define TEST1_PCB 0x02 // programmable capacitor B (5.0 pF)
+#define TEST1_PCA 0x01 // programmable capacitor A (2.5 pF)
// test register 2
-#define TEST2_OSCBY 0x80 // oscillator bypass
-#define TEST2_COMPOVR 0x40 // comparator override
-#define TEST2_POR 0x20 // power on reset
-#define TEST2_SELTCK 0x10 // select test clock
-#define TEST2_FRZ 0x08 // freeze mode
-#define TEST2_DV_MASK 0x07 // divider bits select
+#define TEST2_OSCBY 0x80 // oscillator bypass
+#define TEST2_COMPOVR 0x40 // comparator override
+#define TEST2_POR 0x20 // power on reset
+#define TEST2_SELTCK 0x10 // select test clock
+#define TEST2_FRZ 0x08 // freeze mode
+#define TEST2_DV_MASK 0x07 // divider bits select
@@ -117,10 +117,10 @@ inline void mccs1850_device::check_interrupt()
UINT8 status = m_ram[REGISTER_STATUS];
UINT8 control = m_ram[REGISTER_CONTROL];
- bool interrupt = (((status & STATUS_AI) && (control & CONTROL_AE)) // alarm interrupt
- || ((status & STATUS_LB) && (control & CONTROL_LBE)) // low battery
- || (status & STATUS_FTU) // first time up
- || (status & STATUS_RPD)); // request to power down
+ bool interrupt = (((status & STATUS_AI) && (control & CONTROL_AE)) // alarm interrupt
+ || ((status & STATUS_LB) && (control & CONTROL_LBE)) // low battery
+ || (status & STATUS_FTU) // first time up
+ || (status & STATUS_RPD)); // request to power down
if (interrupt)
{
@@ -282,15 +282,15 @@ inline void mccs1850_device::advance_seconds()
mccs1850_device::mccs1850_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MCCS1850, "MCCS1850", tag, owner, clock),
- device_rtc_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_pse(1),
- m_ce(0),
- m_sck(0),
- m_sdo(1),
- m_sdi(0),
- m_state(STATE_ADDRESS),
- m_bits(0)
+ device_rtc_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_pse(1),
+ m_ce(0),
+ m_sck(0),
+ m_sdo(1),
+ m_sdi(0),
+ m_state(STATE_ADDRESS),
+ m_bits(0)
{
}
diff --git a/src/emu/machine/mccs1850.h b/src/emu/machine/mccs1850.h
index 8f0fa179f20..9b4436f28b8 100644
--- a/src/emu/machine/mccs1850.h
+++ b/src/emu/machine/mccs1850.h
@@ -31,8 +31,8 @@
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
-#define MCFG_MCCS1850_ADD(_tag, _clock, _int_cb, _pse_cb, _nuc_cb) \
- MCFG_DEVICE_ADD(_tag, MCCS1850, _clock) \
+#define MCFG_MCCS1850_ADD(_tag, _clock, _int_cb, _pse_cb, _nuc_cb) \
+ MCFG_DEVICE_ADD(_tag, MCCS1850, _clock) \
downcast<mccs1850_device *>(device)->set_cb(_int_cb, _pse_cb, _nuc_cb);
@@ -42,13 +42,13 @@
// ======================> mccs1850_device
-class mccs1850_device : public device_t,
+class mccs1850_device : public device_t,
public device_rtc_interface,
public device_nvram_interface
{
public:
- // construction/destruction
- mccs1850_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mccs1850_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
void set_cb(line_cb_t int_cb, line_cb_t pse_cb, line_cb_t nuc_cb);
DECLARE_WRITE_LINE_MEMBER( ce_w );
@@ -60,9 +60,9 @@ public:
DECLARE_WRITE_LINE_MEMBER( test_w );
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_nvram_interface overrides
@@ -81,23 +81,23 @@ private:
line_cb_t int_cb, pse_cb, nuc_cb;
- UINT8 m_ram[0x80]; // RAM
+ UINT8 m_ram[0x80]; // RAM
// power supply
- int m_pse; // power supply enable
+ int m_pse; // power supply enable
// counter
- UINT32 m_counter; // seconds counter
+ UINT32 m_counter; // seconds counter
// serial interface
- int m_ce; // chip enable
- int m_sck; // serial clock
- int m_sdo; // serial data out
- int m_sdi; // serial data in
- int m_state; // serial interface state
- UINT8 m_address; // address counter
- int m_bits; // bit counter
- UINT8 m_shift; // shift register
+ int m_ce; // chip enable
+ int m_sck; // serial clock
+ int m_sdo; // serial data out
+ int m_sdi; // serial data in
+ int m_state; // serial interface state
+ UINT8 m_address; // address counter
+ int m_bits; // bit counter
+ UINT8 m_shift; // shift register
// timers
emu_timer *m_clock_timer;
diff --git a/src/emu/machine/microtch.c b/src/emu/machine/microtch.c
index 37453b56b5b..1831d854e86 100644
--- a/src/emu/machine/microtch.c
+++ b/src/emu/machine/microtch.c
@@ -28,9 +28,9 @@ microtouch_device::microtouch_device(const machine_config &mconfig, const char *
int microtouch_device::check_command( const char* commandtocheck, int command_len, UINT8* command_data )
{
if ( (command_len == (strlen(commandtocheck) + 2)) &&
- (command_data[0] == 0x01) &&
- (strncmp(commandtocheck, (const char*)command_data + 1, strlen(commandtocheck)) == 0) &&
- (command_data[command_len-1] == 0x0d) )
+ (command_data[0] == 0x01) &&
+ (strncmp(commandtocheck, (const char*)command_data + 1, strlen(commandtocheck)) == 0) &&
+ (command_data[command_len-1] == 0x0d) )
{
return 1;
}
@@ -86,7 +86,7 @@ void microtouch_device::send_touch_packet()
int ty = ioport("TOUCH_Y")->read();
if ( m_out_touch_cb == NULL ||
- m_out_touch_cb( &tx, &ty ) != 0 )
+ m_out_touch_cb( &tx, &ty ) != 0 )
{
ty = 0x4000 - ty;
@@ -120,8 +120,8 @@ void microtouch_device::device_timer(emu_timer &timer, device_timer_id id, int p
}
if ( (m_reset_done == 0) ||
- (m_format == FORMAT_UNKNOWN) ||
- (m_mode != MODE_STREAM))
+ (m_format == FORMAT_UNKNOWN) ||
+ (m_mode != MODE_STREAM))
{
return;
}
@@ -288,7 +288,7 @@ const device_type MICROTOUCH_SERIAL = &device_creator<microtouch_serial_device>;
microtouch_serial_device::microtouch_serial_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: microtouch_device(mconfig, MICROTOUCH_SERIAL, "Microtouch Serial Touchscreen", tag, owner, clock),
- device_serial_interface(mconfig, *this)
+ device_serial_interface(mconfig, *this)
{
}
diff --git a/src/emu/machine/microtch.h b/src/emu/machine/microtch.h
index ba3415f60de..122f50ff475 100644
--- a/src/emu/machine/microtch.h
+++ b/src/emu/machine/microtch.h
@@ -8,8 +8,8 @@ typedef int (*microtouch_touch_func)(int *touch_x, int *touch_y);
struct microtouch_interface
{
- devcb_write8 m_out_tx_cb;
- microtouch_touch_func m_out_touch_cb;
+ devcb_write8 m_out_tx_cb;
+ microtouch_touch_func m_out_touch_cb;
};
class microtouch_device :
@@ -28,7 +28,7 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual void device_config_complete();
virtual void tx(UINT8 data) { m_out_tx_func(0, data); }
- emu_timer* m_timer;
+ emu_timer* m_timer;
private:
int check_command( const char* commandtocheck, int command_len, UINT8* command_data );
void send_format_table_packet(UINT8 flag, int x, int y);
@@ -47,17 +47,17 @@ private:
MODE_STREAM,
MODE_POINT
};
- UINT8 m_rx_buffer[16];
- int m_rx_buffer_ptr;
- UINT8 m_tx_buffer[16];
- UINT8 m_tx_buffer_num;
- UINT8 m_tx_buffer_ptr;
- int m_reset_done;
- int m_format;
- int m_mode;
- int m_last_touch_state;
- int m_last_x;
- int m_last_y;
+ UINT8 m_rx_buffer[16];
+ int m_rx_buffer_ptr;
+ UINT8 m_tx_buffer[16];
+ UINT8 m_tx_buffer_num;
+ UINT8 m_tx_buffer_ptr;
+ int m_reset_done;
+ int m_format;
+ int m_mode;
+ int m_last_touch_state;
+ int m_last_x;
+ int m_last_y;
devcb_resolved_write8 m_out_tx_func;
};
@@ -74,8 +74,8 @@ struct microtouch_serial_interface
class microtouch_serial_device
: public microtouch_device,
- public device_serial_interface,
- public microtouch_serial_interface
+ public device_serial_interface,
+ public microtouch_serial_interface
{
public:
microtouch_serial_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/machine/mm74c922.c b/src/emu/machine/mm74c922.c
index d5e41de42a4..b94d678e46d 100644
--- a/src/emu/machine/mm74c922.c
+++ b/src/emu/machine/mm74c922.c
@@ -115,10 +115,10 @@ inline void mm74c922_device::detect_keypress()
//-------------------------------------------------
mm74c922_device::mm74c922_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MM74C922, "MM74C922", tag, owner, clock),
- m_x(0),
- m_y(0),
- m_next_da(0)
+ : device_t(mconfig, MM74C922, "MM74C922", tag, owner, clock),
+ m_x(0),
+ m_y(0),
+ m_next_da(0)
{
}
diff --git a/src/emu/machine/mm74c922.h b/src/emu/machine/mm74c922.h
index a51b85b1152..a026d2b54cb 100644
--- a/src/emu/machine/mm74c922.h
+++ b/src/emu/machine/mm74c922.h
@@ -73,37 +73,37 @@
struct mm74c922_interface
{
- double m_cap_osc;
- double m_cap_debounce;
+ double m_cap_osc;
+ double m_cap_debounce;
- devcb_write_line m_out_da_cb;
+ devcb_write_line m_out_da_cb;
- devcb_read8 m_in_x1_cb;
- devcb_read8 m_in_x2_cb;
- devcb_read8 m_in_x3_cb;
- devcb_read8 m_in_x4_cb;
- devcb_read8 m_in_x5_cb;
+ devcb_read8 m_in_x1_cb;
+ devcb_read8 m_in_x2_cb;
+ devcb_read8 m_in_x3_cb;
+ devcb_read8 m_in_x4_cb;
+ devcb_read8 m_in_x5_cb;
};
// ======================> mm74c922_device
class mm74c922_device : public device_t,
- public mm74c922_interface
+ public mm74c922_interface
{
public:
- // construction/destruction
- mm74c922_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mm74c922_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// inline configuration helpers
static void static_set_config(device_t &device, int max_y);
- UINT8 data_out_r();
+ UINT8 data_out_r();
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@@ -113,20 +113,20 @@ private:
int m_max_y;
- devcb_resolved_write_line m_out_da_func;
- devcb_resolved_read8 m_in_x_func[5];
+ devcb_resolved_write_line m_out_da_func;
+ devcb_resolved_read8 m_in_x_func[5];
- int m_inhibit; // scan counter clock inhibit
- int m_x; // currently scanned column
- int m_y; // latched row
+ int m_inhibit; // scan counter clock inhibit
+ int m_x; // currently scanned column
+ int m_y; // latched row
- UINT8 m_data; // data latch
+ UINT8 m_data; // data latch
- int m_da; // data available flag
- int m_next_da; // next value of data available flag
+ int m_da; // data available flag
+ int m_next_da; // next value of data available flag
// timers
- emu_timer *m_scan_timer; // keyboard scan timer
+ emu_timer *m_scan_timer; // keyboard scan timer
};
diff --git a/src/emu/machine/mos6529.c b/src/emu/machine/mos6529.c
index a06010515b2..f81f6b42a77 100644
--- a/src/emu/machine/mos6529.c
+++ b/src/emu/machine/mos6529.c
@@ -31,7 +31,7 @@ const device_type MOS6529 = &device_creator<mos6529_device>;
//-------------------------------------------------
mos6529_device::mos6529_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MOS6529, "MOS6529", tag, owner, clock)
+ : device_t(mconfig, MOS6529, "MOS6529", tag, owner, clock)
{
}
diff --git a/src/emu/machine/mos6529.h b/src/emu/machine/mos6529.h
index 0bf4cbd6730..d81da3fe108 100644
--- a/src/emu/machine/mos6529.h
+++ b/src/emu/machine/mos6529.h
@@ -34,7 +34,7 @@
//**************************************************************************
#define MCFG_MOS6529_ADD(_tag, _config) \
- MCFG_DEVICE_ADD(_tag, MOS6529, 0) \
+ MCFG_DEVICE_ADD(_tag, MOS6529, 0) \
MCFG_DEVICE_CONFIG(_config)
#define MOS6529_INTERFACE(name) \
@@ -50,31 +50,31 @@
struct mos6529_interface
{
- devcb_read8 m_in_p_cb;
- devcb_write8 m_out_p_cb;
+ devcb_read8 m_in_p_cb;
+ devcb_write8 m_out_p_cb;
};
// ======================> mos6529_device
-class mos6529_device : public device_t,
- public mos6529_interface
+class mos6529_device : public device_t,
+ public mos6529_interface
{
public:
- // construction/destruction
- mos6529_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mos6529_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
private:
- devcb_resolved_read8 m_in_p_func;
- devcb_resolved_write8 m_out_p_func;
+ devcb_resolved_read8 m_in_p_func;
+ devcb_resolved_write8 m_out_p_func;
};
diff --git a/src/emu/machine/msm5832.c b/src/emu/machine/msm5832.c
index 6c5f834b319..f60308c6f10 100644
--- a/src/emu/machine/msm5832.c
+++ b/src/emu/machine/msm5832.c
@@ -89,13 +89,13 @@ inline void msm5832_device::write_counter(int counter, int value)
//-------------------------------------------------
msm5832_device::msm5832_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MSM5832, "MSM5832", tag, owner, clock),
- device_rtc_interface(mconfig, *this),
- m_hold(0),
- m_address(0),
- m_read(0),
- m_write(0),
- m_cs(0)
+ : device_t(mconfig, MSM5832, "MSM5832", tag, owner, clock),
+ device_rtc_interface(mconfig, *this),
+ m_hold(0),
+ m_address(0),
+ m_read(0),
+ m_write(0),
+ m_cs(0)
{
for (int i = 0; i < 13; i++)
m_reg[i] = 0;
diff --git a/src/emu/machine/msm5832.h b/src/emu/machine/msm5832.h
index fb52a81a37a..a93d2e6445e 100644
--- a/src/emu/machine/msm5832.h
+++ b/src/emu/machine/msm5832.h
@@ -43,12 +43,12 @@
// ======================> msm5832_device
-class msm5832_device : public device_t,
+class msm5832_device : public device_t,
public device_rtc_interface
{
public:
- // construction/destruction
- msm5832_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ msm5832_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( data_r );
DECLARE_WRITE8_MEMBER( data_w );
@@ -64,9 +64,9 @@ public:
DECLARE_WRITE_LINE_MEMBER( cs_w );
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_rtc_interface overrides
@@ -78,10 +78,10 @@ private:
inline int read_counter(int counter);
inline void write_counter(int counter, int value);
- UINT8 m_reg[13]; // registers
+ UINT8 m_reg[13]; // registers
- int m_hold; // counter hold
- int m_address; // address
+ int m_hold; // counter hold
+ int m_address; // address
int m_read;
int m_write;
diff --git a/src/emu/machine/msm58321.c b/src/emu/machine/msm58321.c
index 0cf910358b7..afe3ffc0c80 100644
--- a/src/emu/machine/msm58321.c
+++ b/src/emu/machine/msm58321.c
@@ -92,8 +92,8 @@ inline void msm58321_device::write_counter(int counter, int value)
//-------------------------------------------------
msm58321_device::msm58321_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MSM58321, "MSM58321", tag, owner, clock),
- device_rtc_interface(mconfig, *this)
+ : device_t(mconfig, MSM58321, "MSM58321", tag, owner, clock),
+ device_rtc_interface(mconfig, *this)
{
for (int i = 0; i < 13; i++)
m_reg[i] = 0;
diff --git a/src/emu/machine/msm58321.h b/src/emu/machine/msm58321.h
index f6cf39cbe19..caa9cdbc197 100644
--- a/src/emu/machine/msm58321.h
+++ b/src/emu/machine/msm58321.h
@@ -32,7 +32,7 @@
//**************************************************************************
#define MCFG_MSM58321_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD(_tag, MSM58321, _clock) \
+ MCFG_DEVICE_ADD(_tag, MSM58321, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define MSM58321_INTERFACE(name) \
@@ -48,20 +48,20 @@
struct msm58321_interface
{
- devcb_write_line m_out_busy_cb;
+ devcb_write_line m_out_busy_cb;
};
// ======================> msm58321_device
-class msm58321_device : public device_t,
+class msm58321_device : public device_t,
public device_rtc_interface,
- public msm58321_interface
+ public msm58321_interface
{
public:
- // construction/destruction
- msm58321_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ msm58321_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
@@ -76,10 +76,10 @@ public:
DECLARE_READ_LINE_MEMBER( busy_r );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_rtc_interface overrides
@@ -92,18 +92,18 @@ private:
inline int read_counter(int counter);
inline void write_counter(int counter, int value);
- devcb_resolved_write_line m_out_busy_func;
+ devcb_resolved_write_line m_out_busy_func;
- int m_cs1; // chip select 1
- int m_cs2; // chip select 2
- int m_busy; // busy flag
- int m_read; // read data
- int m_write; // write data
- int m_address_write; // write address
+ int m_cs1; // chip select 1
+ int m_cs2; // chip select 2
+ int m_busy; // busy flag
+ int m_read; // read data
+ int m_write; // write data
+ int m_address_write; // write address
- UINT8 m_reg[13]; // registers
- UINT8 m_latch; // data latch (not present in real chip)
- UINT8 m_address; // address latch
+ UINT8 m_reg[13]; // registers
+ UINT8 m_latch; // data latch (not present in real chip)
+ UINT8 m_address; // address latch
// timers
emu_timer *m_clock_timer;
diff --git a/src/emu/machine/msm6242.c b/src/emu/machine/msm6242.c
index a70840d86ca..4dbe1a61890 100644
--- a/src/emu/machine/msm6242.c
+++ b/src/emu/machine/msm6242.c
@@ -21,7 +21,7 @@
enum
{
- MSM6242_REG_S1 = 0,
+ MSM6242_REG_S1 = 0,
MSM6242_REG_S10,
MSM6242_REG_MI1,
MSM6242_REG_MI10,
@@ -39,11 +39,11 @@ enum
MSM6242_REG_CF
};
-#define TIMER_RTC_CALLBACK 1
+#define TIMER_RTC_CALLBACK 1
-#define LOG_UNMAPPED 0
-#define LOG_IRQ 0
-#define LOG_IRQ_ENABLE 0
+#define LOG_UNMAPPED 0
+#define LOG_IRQ 0
+#define LOG_IRQ_ENABLE 0
@@ -65,7 +65,7 @@ const device_type msm6242 = &device_creator<msm6242_device>;
msm6242_device::msm6242_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, msm6242, "msm6242", tag, owner, clock),
- device_rtc_interface(mconfig, *this)
+ device_rtc_interface(mconfig, *this)
{
}
@@ -325,7 +325,7 @@ void msm6242_device::update_timer()
UINT64 absolute_callback_ticks = curtime + callback_ticks;
// convert that to an attotime
- attotime absolute_callback_time = attotime::from_ticks(absolute_callback_ticks, clock());
+ attotime absolute_callback_time = attotime::from_ticks(absolute_callback_ticks, clock());
// and finally get the delta as an attotime
callback_time = absolute_callback_time - machine().time();
@@ -380,11 +380,11 @@ const char *msm6242_device::irq_type_string(UINT8 irq_type)
{
switch(irq_type)
{
- case IRQ_64THSECOND: return "1/64th second";
- case IRQ_SECOND: return "second";
- case IRQ_MINUTE: return "minute";
- case IRQ_HOUR: return "hour";
- default: return "???";
+ case IRQ_64THSECOND: return "1/64th second";
+ case IRQ_SECOND: return "second";
+ case IRQ_MINUTE: return "minute";
+ case IRQ_HOUR: return "hour";
+ default: return "???";
}
}
@@ -502,17 +502,17 @@ WRITE8_MEMBER( msm6242_device::write )
switch(offset)
{
case MSM6242_REG_CD:
- // x--- 30s ADJ
- // -x-- IRQ FLAG
- // --x- BUSY
- // ---x HOLD
+ // x--- 30s ADJ
+ // -x-- IRQ FLAG
+ // --x- BUSY
+ // ---x HOLD
m_reg[0] = data & 0x0f;
break;
case MSM6242_REG_CE:
- // xx-- t0,t1 (timing irq)
- // --x- STD
- // ---x MASK
+ // xx-- t0,t1 (timing irq)
+ // --x- STD
+ // ---x MASK
m_reg[1] = data & 0x0f;
if((data & 3) == 0) // MASK & STD = 0
{
@@ -534,10 +534,10 @@ WRITE8_MEMBER( msm6242_device::write )
break;
case MSM6242_REG_CF:
- // x--- TEST
- // -x-- 24/12
- // --x- STOP
- // ---x RESET
+ // x--- TEST
+ // -x-- 24/12
+ // --x- STOP
+ // ---x RESET
// the 12/24 mode bit can only be changed when RESET does a 1 -> 0 transition
if (((data & 0x01) == 0x00) && (m_reg[2] & 0x01))
diff --git a/src/emu/machine/msm6242.h b/src/emu/machine/msm6242.h
index d3564cb5f83..65916197853 100644
--- a/src/emu/machine/msm6242.h
+++ b/src/emu/machine/msm6242.h
@@ -27,13 +27,13 @@
struct msm6242_interface
{
- devcb_write_line m_out_int_func;
+ devcb_write_line m_out_int_func;
};
// ======================> msm6242_device
-class msm6242_device : public device_t, public device_rtc_interface
+class msm6242_device : public device_t, public device_rtc_interface
{
public:
// construction/destruction
@@ -63,15 +63,15 @@ private:
static const UINT8 IRQ_HOUR = 3;
// state
- UINT8 m_reg[3];
- UINT8 m_irq_flag;
- UINT8 m_irq_type;
- UINT16 m_tick;
+ UINT8 m_reg[3];
+ UINT8 m_irq_flag;
+ UINT8 m_irq_type;
+ UINT16 m_tick;
// incidentals
- devcb_resolved_write_line m_res_out_int_func;
- emu_timer * m_timer;
- UINT64 m_last_update_time; // last update time, in clock cycles
+ devcb_resolved_write_line m_res_out_int_func;
+ emu_timer * m_timer;
+ UINT64 m_last_update_time; // last update time, in clock cycles
// methods
void rtc_timer_callback();
diff --git a/src/emu/machine/n68681.c b/src/emu/machine/n68681.c
index 9ec01baae91..c37bb9d2c6f 100644
--- a/src/emu/machine/n68681.c
+++ b/src/emu/machine/n68681.c
@@ -11,7 +11,7 @@
#include "n68681.h"
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
static const char *const duart68681_reg_read_names[0x10] =
{
@@ -26,28 +26,28 @@ static const char *const duart68681_reg_write_names[0x10] =
static const int baud_rate_ACR_0[] = { 50, 110, 134, 200, 300, 600, 1200, 1050, 2400, 4800, 7200, 9600, 38400, 0, 0, 0 };
static const int baud_rate_ACR_1[] = { 75, 110, 134, 150, 300, 600, 1200, 2000, 2400, 4800, 1800, 9600, 19200, 0, 0, 0 };
-#define INT_INPUT_PORT_CHANGE 0x80
-#define INT_DELTA_BREAK_B 0x40
-#define INT_RXRDY_FFULLB 0x20
-#define INT_TXRDYB 0x10
-#define INT_COUNTER_READY 0x08
-#define INT_DELTA_BREAK_A 0x04
-#define INT_RXRDY_FFULLA 0x02
-#define INT_TXRDYA 0x01
-
-#define STATUS_RECEIVED_BREAK 0x80
-#define STATUS_FRAMING_ERROR 0x40
-#define STATUS_PARITY_ERROR 0x20
-#define STATUS_OVERRUN_ERROR 0x10
-#define STATUS_TRANSMITTER_EMPTY 0x08
-#define STATUS_TRANSMITTER_READY 0x04
-#define STATUS_FIFO_FULL 0x02
-#define STATUS_RECEIVER_READY 0x01
-
-#define MODE_RX_INT_SELECT_BIT 0x40
-
-#define CHANA_TAG "cha"
-#define CHANB_TAG "chb"
+#define INT_INPUT_PORT_CHANGE 0x80
+#define INT_DELTA_BREAK_B 0x40
+#define INT_RXRDY_FFULLB 0x20
+#define INT_TXRDYB 0x10
+#define INT_COUNTER_READY 0x08
+#define INT_DELTA_BREAK_A 0x04
+#define INT_RXRDY_FFULLA 0x02
+#define INT_TXRDYA 0x01
+
+#define STATUS_RECEIVED_BREAK 0x80
+#define STATUS_FRAMING_ERROR 0x40
+#define STATUS_PARITY_ERROR 0x20
+#define STATUS_OVERRUN_ERROR 0x10
+#define STATUS_TRANSMITTER_EMPTY 0x08
+#define STATUS_TRANSMITTER_READY 0x04
+#define STATUS_FIFO_FULL 0x02
+#define STATUS_RECEIVER_READY 0x01
+
+#define MODE_RX_INT_SELECT_BIT 0x40
+
+#define CHANA_TAG "cha"
+#define CHANB_TAG "chb"
// device type definition
const device_type DUARTN68681 = &device_creator<duartn68681_device>;
@@ -147,30 +147,30 @@ machine_config_constructor duartn68681_device::device_mconfig_additions() const
void duartn68681_device::update_interrupts()
{
/* update SR state and update interrupt ISR state for the following bits:
- SRn: bits 7-4: handled elsewhere.
- SRn: bit 3 (TxEMTn) (we can assume since we're not actually emulating the delay/timing of sending bits, that as long as TxRDYn is set, TxEMTn is also set since the transmit byte has 'already happened', therefore TxEMTn is always 1 assuming tx is enabled on channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined)
- SRn: bit 2 (TxRDYn) (we COULD assume since we're not emulating delay and timing output, that as long as tx is enabled on channel n, TxRDY is 1 for channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined; however, tx_ready is already nicely handled for us elsewhere, so we can use that instead for now, though we may need to retool that code as well)
- SRn: bit 1 (FFULLn) (this bit we actually emulate; if the receive fifo for channel n is full, this bit is 1, otherwise it is 0. the receive fifo should be three words long.)
- SRn: bit 0 (RxRDYn) (this bit we also emulate; the bit is always asserted if the receive fifo is not empty)
- ISR: bit 7: Input Port change; this should be handled elsewhere, on the input port handler
- ISR: bit 6: Delta Break B; this should be handled elsewhere, on the data receive handler
- ISR: bit 5: RxRDYB/FFULLB: this is handled here; depending on whether MSR1B bit 6 is 0 or 1, this bit holds the state of SRB bit 0 or bit 1 respectively
- ISR: bit 4: TxRDYB: this is handled here; it mirrors SRB bit 2
- ISR: bit 3: Counter ready; this should be handled by the timer generator
- ISR: bit 2: Delta Break A; this should be handled elsewhere, on the data receive handler
- ISR: bit 1: RxRDYA/FFULLA: this is handled here; depending on whether MSR1A bit 6 is 0 or 1, this bit holds the state of SRA bit 0 or bit 1 respectively
- ISR: bit 0: TxRDYA: this is handled here; it mirrors SRA bit 2
- */
+ SRn: bits 7-4: handled elsewhere.
+ SRn: bit 3 (TxEMTn) (we can assume since we're not actually emulating the delay/timing of sending bits, that as long as TxRDYn is set, TxEMTn is also set since the transmit byte has 'already happened', therefore TxEMTn is always 1 assuming tx is enabled on channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined)
+ SRn: bit 2 (TxRDYn) (we COULD assume since we're not emulating delay and timing output, that as long as tx is enabled on channel n, TxRDY is 1 for channel n and the MSR2n mode is 0 or 2; in mode 1 it is explicitly zeroed, and mode 3 is undefined; however, tx_ready is already nicely handled for us elsewhere, so we can use that instead for now, though we may need to retool that code as well)
+ SRn: bit 1 (FFULLn) (this bit we actually emulate; if the receive fifo for channel n is full, this bit is 1, otherwise it is 0. the receive fifo should be three words long.)
+ SRn: bit 0 (RxRDYn) (this bit we also emulate; the bit is always asserted if the receive fifo is not empty)
+ ISR: bit 7: Input Port change; this should be handled elsewhere, on the input port handler
+ ISR: bit 6: Delta Break B; this should be handled elsewhere, on the data receive handler
+ ISR: bit 5: RxRDYB/FFULLB: this is handled here; depending on whether MSR1B bit 6 is 0 or 1, this bit holds the state of SRB bit 0 or bit 1 respectively
+ ISR: bit 4: TxRDYB: this is handled here; it mirrors SRB bit 2
+ ISR: bit 3: Counter ready; this should be handled by the timer generator
+ ISR: bit 2: Delta Break A; this should be handled elsewhere, on the data receive handler
+ ISR: bit 1: RxRDYA/FFULLA: this is handled here; depending on whether MSR1A bit 6 is 0 or 1, this bit holds the state of SRA bit 0 or bit 1 respectively
+ ISR: bit 0: TxRDYA: this is handled here; it mirrors SRA bit 2
+ */
if ( (ISR & IMR) != 0 )
{
LOG(( "68681: Interrupt line active (IMR & ISR = %02X)\n", (ISR & IMR) ));
m_out_irq_func(ASSERT_LINE);
}
- else
- {
+ else
+ {
LOG(( "68681: Interrupt line not active (IMR & ISR = %02X)\n", ISR & IMR));
m_out_irq_func(CLEAR_LINE);
- }
+ }
};
double duartn68681_device::duart68681_get_ct_rate()
@@ -498,8 +498,8 @@ duart68681_channel::duart68681_channel(const machine_config &mconfig, const char
void duart68681_channel::device_start()
{
- m_uart = downcast<duartn68681_device *>(owner());
- m_ch = m_uart->get_ch(this); // get our channel number
+ m_uart = downcast<duartn68681_device *>(owner());
+ m_ch = m_uart->get_ch(this); // get our channel number
save_item(NAME(CR));
save_item(NAME(CSR));
@@ -521,8 +521,8 @@ void duart68681_channel::device_start()
void duart68681_channel::device_reset()
{
- write_CR(0x10); // reset MR
- write_CR(0x20); // reset Rx
+ write_CR(0x10); // reset MR
+ write_CR(0x20); // reset Rx
write_CR(0x30); // reset Tx
write_CR(0x40); // reset errors
@@ -534,7 +534,7 @@ void duart68681_channel::rcv_complete()
{
receive_register_extract();
-// printf("ch %d rcv complete\n", m_ch);
+// printf("ch %d rcv complete\n", m_ch);
if ( rx_enabled )
{
@@ -556,7 +556,7 @@ void duart68681_channel::rcv_complete()
void duart68681_channel::tra_complete()
{
-// printf("ch %d Tx complete\n", m_ch);
+// printf("ch %d Tx complete\n", m_ch);
tx_ready = 1;
SR |= STATUS_TRANSMITTER_READY;
@@ -571,7 +571,7 @@ void duart68681_channel::tra_complete()
void duart68681_channel::tra_callback()
{
int bit = transmit_register_get_data_bit();
-// printf("ch %d transmit %d\n", m_ch, bit);
+// printf("ch %d transmit %d\n", m_ch, bit);
if (m_ch == 0)
{
m_uart->m_out_a_tx_func(bit);
@@ -579,11 +579,11 @@ void duart68681_channel::tra_callback()
else
{
m_uart->m_out_b_tx_func(bit);
- }
+ }
}
-void duart68681_channel::input_callback(UINT8 state)
-{
+void duart68681_channel::input_callback(UINT8 state)
+{
}
void duart68681_channel::update_interrupts()
@@ -686,7 +686,7 @@ UINT8 duart68681_channel::read_rx_fifo()
{
UINT8 rv = 0;
-// printf("read_rx_fifo: rx_fifo_num %d\n", rx_fifo_num);
+// printf("read_rx_fifo: rx_fifo_num %d\n", rx_fifo_num);
if ( rx_fifo_num == 0 )
{
@@ -712,7 +712,7 @@ UINT8 duart68681_channel::read_chan_reg(int reg)
switch (reg)
{
- case 0: // MR1/MR2
+ case 0: // MR1/MR2
if ( MR_ptr == 0 )
{
rv = MR1;
@@ -731,7 +731,7 @@ UINT8 duart68681_channel::read_chan_reg(int reg)
case 2: // CSRA: reading this is prohibited
break;
- case 3: // Rx holding register A
+ case 3: // Rx holding register A
rv = read_rx_fifo();
break;
}
@@ -751,7 +751,7 @@ void duart68681_channel::write_chan_reg(int reg, UINT8 data)
CSR = data;
tx_baud_rate = m_uart->calc_baud(m_ch, data & 0xf);
rx_baud_rate = m_uart->calc_baud(m_ch, (data>>4) & 0xf);
-// printf("ch %d Tx baud %d Rx baud %d\n", m_ch, tx_baud_rate, rx_baud_rate);
+// printf("ch %d Tx baud %d Rx baud %d\n", m_ch, tx_baud_rate, rx_baud_rate);
set_rcv_rate(rx_baud_rate);
set_tra_rate(tx_baud_rate);
break;
@@ -792,7 +792,7 @@ void duart68681_channel::recalc_framing()
stopbits = 1;
break;
- case 2: // "1.5 async, 2 sync"
+ case 2: // "1.5 async, 2 sync"
stopbits = 2;
break;
@@ -803,7 +803,7 @@ void duart68681_channel::recalc_framing()
switch ((MR1>>3) & 3)
{
- case 0: // with parity
+ case 0: // with parity
if (MR1 & 4)
{
parity = SERIAL_PARITY_ODD;
@@ -814,7 +814,7 @@ void duart68681_channel::recalc_framing()
}
break;
- case 1: // force parity
+ case 1: // force parity
if (MR1 & 4)
{
parity = SERIAL_PARITY_MARK;
@@ -825,16 +825,16 @@ void duart68681_channel::recalc_framing()
}
break;
- case 2: // no parity
+ case 2: // no parity
parity = SERIAL_PARITY_NONE;
break;
- case 3: // multidrop mode
+ case 3: // multidrop mode
fatalerror("68681: multidrop parity not supported\n");
break;
}
-// printf("ch %d MR1 %02x MR2 %02x => %d bits / char, %d stop bits, parity %d\n", m_ch, MR1, MR2, (MR1 & 3)+5, stopbits, parity);
+// printf("ch %d MR1 %02x MR2 %02x => %d bits / char, %d stop bits, parity %d\n", m_ch, MR1, MR2, (MR1 & 3)+5, stopbits, parity);
set_data_frame((MR1 & 3)+5, stopbits, parity);
}
@@ -867,7 +867,7 @@ void duart68681_channel::write_CR(UINT8 data)
else
m_uart->clear_ISR_bits(INT_TXRDYB);
transmit_register_reset();
- break;
+ break;
case 4: /* Reset Error Status */
SR &= ~(STATUS_RECEIVED_BREAK | STATUS_FRAMING_ERROR | STATUS_PARITY_ERROR | STATUS_OVERRUN_ERROR);
break;
@@ -914,19 +914,19 @@ void duart68681_channel::write_CR(UINT8 data)
m_uart->clear_ISR_bits(INT_TXRDYB);
}
- update_interrupts();
+ update_interrupts();
};
void duart68681_channel::write_TX(UINT8 data)
{
tx_data = data;
-/* if (!tx_ready)
- {
- printf("Write %02x to TX when TX not ready!\n", data);
- }*/
+/* if (!tx_ready)
+ {
+ printf("Write %02x to TX when TX not ready!\n", data);
+ }*/
-// printf("ch %d Tx %02x\n", m_ch, data);
+// printf("ch %d Tx %02x\n", m_ch, data);
// send the byte unless we're in loopback mode;
// in loopback mode do NOT 'actually' send the byte: the TXn pin is held high when loopback mode is on.
@@ -971,4 +971,3 @@ void duart68681_channel::write_TX(UINT8 data)
update_interrupts();
};
-
diff --git a/src/emu/machine/n68681.h b/src/emu/machine/n68681.h
index e50537c30a3..7488639d2bc 100644
--- a/src/emu/machine/n68681.h
+++ b/src/emu/machine/n68681.h
@@ -19,17 +19,17 @@ class duartn68681_device;
struct duartn68681_config
{
- devcb_write_line m_out_irq_cb;
- devcb_write_line m_out_a_tx_cb;
- devcb_write_line m_out_b_tx_cb;
- devcb_read8 m_in_port_cb;
- devcb_write8 m_out_port_cb;
+ devcb_write_line m_out_irq_cb;
+ devcb_write_line m_out_a_tx_cb;
+ devcb_write_line m_out_b_tx_cb;
+ devcb_read8 m_in_port_cb;
+ devcb_write8 m_out_port_cb;
/* clocks for external baud rates */
INT32 ip3clk, ip4clk, ip5clk, ip6clk;
};
-#define MC68681_RX_FIFO_SIZE 3
+#define MC68681_RX_FIFO_SIZE 3
// forward declaration
class duartn68681_device;
@@ -45,9 +45,9 @@ public:
virtual void device_reset();
// device_serial overrides
- virtual void rcv_complete(); // Rx completed receiving byte
- virtual void tra_complete(); // Tx completed sending byte
- virtual void tra_callback(); // Tx send bit
+ virtual void rcv_complete(); // Rx completed receiving byte
+ virtual void tra_complete(); // Tx completed sending byte
+ virtual void tra_callback(); // Tx send bit
void input_callback(UINT8 state);
UINT8 read_chan_reg(int reg);
@@ -75,7 +75,7 @@ private:
int rx_fifo_write_ptr;
int rx_fifo_num;
- int m_ch;
+ int m_ch;
/* Transmitter */
UINT8 tx_enabled;
@@ -113,7 +113,7 @@ protected:
virtual void device_config_complete();
virtual void device_start();
virtual void device_reset();
- virtual machine_config_constructor device_mconfig_additions() const;
+ virtual machine_config_constructor device_mconfig_additions() const;
private:
TIMER_CALLBACK_MEMBER( duart_timer_callback );
@@ -145,15 +145,14 @@ private:
duart68681_channel *get_channel(int chan);
- devcb_resolved_write_line m_out_irq_func;
- devcb_resolved_write_line m_out_a_tx_func;
- devcb_resolved_write_line m_out_b_tx_func;
- devcb_resolved_read8 m_in_port_func;
- devcb_resolved_write8 m_out_port_func;
+ devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_write_line m_out_a_tx_func;
+ devcb_resolved_write_line m_out_b_tx_func;
+ devcb_resolved_read8 m_in_port_func;
+ devcb_resolved_write8 m_out_port_func;
};
extern const device_type DUARTN68681;
extern const device_type DUART68681CHANNEL;
#endif //_N68681_H
-
diff --git a/src/emu/machine/ncr539x.c b/src/emu/machine/ncr539x.c
index b063b15574d..2a28e18866e 100644
--- a/src/emu/machine/ncr539x.c
+++ b/src/emu/machine/ncr539x.c
@@ -11,8 +11,8 @@
#include "emu.h"
#include "ncr539x.h"
-#define VERBOSE (0)
-#define VERBOSE_READS (0)
+#define VERBOSE (0)
+#define VERBOSE_READS (0)
enum
{
@@ -21,42 +21,42 @@ enum
TIMER_539X_END
};
-#define MAIN_STATUS_INTERRUPT 0x80
-#define MAIN_STATUS_ILLEGAL_OPER 0x40
-#define MAIN_STATUS_PARITY_ERROR 0x20
-#define MAIN_STATUS_COUNT_TO_ZERO 0x10
-#define MAIN_STATUS_GROUP_VALID 0x08
-#define MAIN_STATUS_MESSAGE 0x04
-#define MAIN_STATUS_CMD_DATA 0x02
-#define MAIN_STATUS_IO 0x01
-
-#define IRQ_STATUS_RESET 0x80
-#define IRQ_STATUS_INVALID_COMMAND 0x40
-#define IRQ_STATUS_DISCONNECTED 0x20
-#define IRQ_STATUS_SERVICE_REQUEST 0x10
-#define IRQ_STATUS_SUCCESS 0x08
-#define IRQ_STATUS_RESELECTED 0x04 // we were reselected as a target
-#define IRQ_STATUS_SELECTED_WITH_ATN 0x02 // we were selected as a target with ATN steps
-#define IRQ_STATUS_SELECTED 0x01 // we were selected as a target
-
-#define CR2_ALIGN_ENABLE 0x80
-#define CR2_FEATURES_ENABLE 0x40
-#define CR2_BYTE_ORDER 0x20
-#define CR2_TRISTATE_DMA 0x10
-#define CR2_SCSI2_ENABLE 0x08
-#define CR2_ABORT_ON_PARITY_ERROR 0x04
-#define CR2_GENERATE_REGISTER_PARITY 0x02
-#define CR2_GENERATE_DATA_PARITY 0x01
+#define MAIN_STATUS_INTERRUPT 0x80
+#define MAIN_STATUS_ILLEGAL_OPER 0x40
+#define MAIN_STATUS_PARITY_ERROR 0x20
+#define MAIN_STATUS_COUNT_TO_ZERO 0x10
+#define MAIN_STATUS_GROUP_VALID 0x08
+#define MAIN_STATUS_MESSAGE 0x04
+#define MAIN_STATUS_CMD_DATA 0x02
+#define MAIN_STATUS_IO 0x01
+
+#define IRQ_STATUS_RESET 0x80
+#define IRQ_STATUS_INVALID_COMMAND 0x40
+#define IRQ_STATUS_DISCONNECTED 0x20
+#define IRQ_STATUS_SERVICE_REQUEST 0x10
+#define IRQ_STATUS_SUCCESS 0x08
+#define IRQ_STATUS_RESELECTED 0x04 // we were reselected as a target
+#define IRQ_STATUS_SELECTED_WITH_ATN 0x02 // we were selected as a target with ATN steps
+#define IRQ_STATUS_SELECTED 0x01 // we were selected as a target
+
+#define CR2_ALIGN_ENABLE 0x80
+#define CR2_FEATURES_ENABLE 0x40
+#define CR2_BYTE_ORDER 0x20
+#define CR2_TRISTATE_DMA 0x10
+#define CR2_SCSI2_ENABLE 0x08
+#define CR2_ABORT_ON_PARITY_ERROR 0x04
+#define CR2_GENERATE_REGISTER_PARITY 0x02
+#define CR2_GENERATE_DATA_PARITY 0x01
#if VERBOSE
#if VERBOSE_READS
static const char *rdregs[16] = {
- "Transfer count LSB", // 0
+ "Transfer count LSB", // 0
"Transfer count MSB", // 1
- "FIFO", // 2
- "Command", // 3
- "Status", // 4
- "Interrupt Status", // 5
+ "FIFO", // 2
+ "Command", // 3
+ "Status", // 4
+ "Interrupt Status", // 5
"Internal State",
"Current FIFO/Internal State",
"Control Register 1",
@@ -138,7 +138,7 @@ const device_type NCR539X = &device_creator<ncr539x_device>;
//-------------------------------------------------
ncr539x_device::ncr539x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, NCR539X, "539x SCSI", tag, owner, clock)
+ : device_t(mconfig, NCR539X, "539x SCSI", tag, owner, clock)
{
}
@@ -238,12 +238,12 @@ void ncr539x_device::device_timer(emu_timer &timer, device_timer_id tid, int par
switch (m_command & 0x7f)
{
- case 0x41: // select without ATN steps
+ case 0x41: // select without ATN steps
if (m_scsi_devices[m_last_id])
{
m_irq_status |= IRQ_STATUS_SERVICE_REQUEST | IRQ_STATUS_SUCCESS;
// we should now be in the command phase
- m_status &= ~7; // clear bus phases
+ m_status &= ~7; // clear bus phases
m_status |= MAIN_STATUS_INTERRUPT | SCSI_PHASE_COMMAND;
m_fifo_ptr = 0;
m_selected = true;
@@ -270,12 +270,12 @@ void ncr539x_device::device_timer(emu_timer &timer, device_timer_id tid, int par
m_out_irq_func(ASSERT_LINE);
break;
- case 0x42: // Select with ATN steps
+ case 0x42: // Select with ATN steps
if (m_scsi_devices[m_last_id])
{
m_irq_status |= IRQ_STATUS_SERVICE_REQUEST | IRQ_STATUS_SUCCESS;
// we should now be in the command phase
- m_status &= ~7; // clear bus phases
+ m_status &= ~7; // clear bus phases
m_status |= MAIN_STATUS_INTERRUPT | SCSI_PHASE_COMMAND;
m_fifo_ptr = 0;
m_selected = true;
@@ -301,26 +301,26 @@ void ncr539x_device::device_timer(emu_timer &timer, device_timer_id tid, int par
m_out_irq_func(ASSERT_LINE);
break;
- case 0x11: // initiator command complete
+ case 0x11: // initiator command complete
#if VERBOSE
printf("Initiator command complete\n");
#endif
m_irq_status = IRQ_STATUS_SERVICE_REQUEST;
- m_status &= ~7; // clear phase bits
- m_status |= MAIN_STATUS_INTERRUPT | SCSI_PHASE_DATAIN; // go to data in phase (?)
+ m_status &= ~7; // clear phase bits
+ m_status |= MAIN_STATUS_INTERRUPT | SCSI_PHASE_DATAIN; // go to data in phase (?)
m_out_irq_func(ASSERT_LINE);
// this puts status and message bytes into the FIFO (todo: what are these?)
m_fifo_ptr = 0;
m_xfer_count = 2;
m_buffer_remaining = m_total_data = 0;
- m_fifo[0] = 0; // status byte
- m_fifo[1] = 0; // message byte
+ m_fifo[0] = 0; // status byte
+ m_fifo[1] = 0; // message byte
m_selected = false;
update_fifo_internal_state(2);
break;
- case 0x12: // message accepted
+ case 0x12: // message accepted
#if VERBOSE
printf("Message accepted\n");
#endif
@@ -405,7 +405,7 @@ READ8_MEMBER( ncr539x_device::read )
printf("FIFO empty, asserting service request (buffer_remaining %x)\n", m_buffer_remaining);
#endif
m_irq_status = IRQ_STATUS_SERVICE_REQUEST;
- m_status &= 0x7; // clear everything but the phase bits
+ m_status &= 0x7; // clear everything but the phase bits
m_status |= MAIN_STATUS_INTERRUPT | MAIN_STATUS_COUNT_TO_ZERO;
m_out_irq_func(ASSERT_LINE);
@@ -468,7 +468,7 @@ READ8_MEMBER( ncr539x_device::read )
{
if (m_chipid_available)
{
- rv = 0xa2; // 0x12 for CF94, 0xa2 for CF96
+ rv = 0xa2; // 0x12 for CF94, 0xa2 for CF96
}
else
{
@@ -512,7 +512,7 @@ WRITE8_MEMBER( ncr539x_device::write )
switch (data & 0x7f)
{
- case 0x00: // NOP
+ case 0x00: // NOP
m_irq_status = IRQ_STATUS_SUCCESS;
m_status |= MAIN_STATUS_INTERRUPT;
m_out_irq_func(ASSERT_LINE);
@@ -524,7 +524,7 @@ WRITE8_MEMBER( ncr539x_device::write )
}
break;
- case 0x01: // Clear FIFO (must not change buffer state)
+ case 0x01: // Clear FIFO (must not change buffer state)
m_fifo_ptr = 0;
update_fifo_internal_state(0);
m_irq_status = IRQ_STATUS_SUCCESS;
@@ -532,7 +532,7 @@ WRITE8_MEMBER( ncr539x_device::write )
m_out_irq_func(ASSERT_LINE);
break;
- case 0x02: // Reset device
+ case 0x02: // Reset device
device_reset();
m_irq_status = IRQ_STATUS_SUCCESS;
@@ -540,15 +540,15 @@ WRITE8_MEMBER( ncr539x_device::write )
m_out_irq_func(ASSERT_LINE);
break;
- case 0x03: // Reset SCSI bus
+ case 0x03: // Reset SCSI bus
m_status = 0;
m_irq_status = IRQ_STATUS_SUCCESS;
m_status |= MAIN_STATUS_INTERRUPT;
m_out_irq_func(ASSERT_LINE);
break;
- case 0x10: // information transfer (must happen immediately)
- m_status &= 0x7; // clear everything but the phase bits
+ case 0x10: // information transfer (must happen immediately)
+ m_status &= 0x7; // clear everything but the phase bits
m_status |= MAIN_STATUS_INTERRUPT;
m_irq_status = IRQ_STATUS_SUCCESS;
@@ -559,7 +559,7 @@ WRITE8_MEMBER( ncr539x_device::write )
printf("Information transfer: phase %d buffer remaining %x\n", phase, m_buffer_remaining);
#endif
- if (phase == SCSI_PHASE_DATAIN) // target -> initiator transfer
+ if (phase == SCSI_PHASE_DATAIN) // target -> initiator transfer
{
int amtToGet = m_buffer_size;
@@ -638,7 +638,7 @@ WRITE8_MEMBER( ncr539x_device::write )
m_out_irq_func(ASSERT_LINE);
break;
- case 0x24: // Terminate steps
+ case 0x24: // Terminate steps
#if VERBOSE
printf("Terminate steps\n");
#endif
@@ -649,7 +649,7 @@ WRITE8_MEMBER( ncr539x_device::write )
update_fifo_internal_state(0);
break;
- case 0x27: // Disconnect
+ case 0x27: // Disconnect
#if VERBOSE
printf("Disconnect\n");
#endif
@@ -658,7 +658,7 @@ WRITE8_MEMBER( ncr539x_device::write )
m_out_irq_func(ASSERT_LINE);
break;
- case 0x44: // Enable selection/reselection
+ case 0x44: // Enable selection/reselection
#if VERBOSE
printf("Enable selection/reselection\n");
#endif
@@ -667,12 +667,12 @@ WRITE8_MEMBER( ncr539x_device::write )
m_out_irq_func(ASSERT_LINE);
break;
- case 0x47: // Reselect with ATN3 steps
+ case 0x47: // Reselect with ATN3 steps
if (m_scsi_devices[m_last_id])
{
m_irq_status |= IRQ_STATUS_SERVICE_REQUEST | IRQ_STATUS_SUCCESS;
// we should now be in the command phase
- m_status &= ~7; // clear bus phases
+ m_status &= ~7; // clear bus phases
m_status |= MAIN_STATUS_INTERRUPT | SCSI_PHASE_COMMAND;
m_fifo_ptr = 0;
m_selected = true;
@@ -698,7 +698,7 @@ WRITE8_MEMBER( ncr539x_device::write )
m_out_irq_func(ASSERT_LINE);
break;
- default: // other commands are not instantaneous
+ default: // other commands are not instantaneous
#if VERBOSE
printf("Setting timer for command %02x\n", data);
#endif
@@ -787,8 +787,8 @@ void ncr539x_device::exec_fifo()
m_buffer_remaining = 0;
m_total_data = length;
- m_status &= ~7; // clear bus phases
- m_status |= (phase & 7); // set the phase reported by the device
+ m_status &= ~7; // clear bus phases
+ m_status |= (phase & 7); // set the phase reported by the device
}
void ncr539x_device::check_fifo_executable()
@@ -815,7 +815,7 @@ void ncr539x_device::fifo_write(UINT8 data)
check_fifo_executable();
}
}
- else // phase is DATAOUT
+ else // phase is DATAOUT
{
m_buffer[m_buffer_offset++] = data;
m_xfer_count--;
diff --git a/src/emu/machine/ncr539x.h b/src/emu/machine/ncr539x.h
index 24fb0ddf2fc..b2c4b614967 100644
--- a/src/emu/machine/ncr539x.h
+++ b/src/emu/machine/ncr539x.h
@@ -25,15 +25,15 @@ struct NCR539Xinterface
MCFG_DEVICE_CONFIG(_intrf)
class ncr539x_device : public device_t,
- public NCR539Xinterface
+ public NCR539Xinterface
{
public:
// construction/destruction
ncr539x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// our API
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ DECLARE_READ8_MEMBER(read);
+ DECLARE_WRITE8_MEMBER(write);
void dma_read_data(int bytes, UINT8 *pData);
void dma_write_data(int bytes, UINT8 *pData);
@@ -43,48 +43,48 @@ protected:
virtual void device_start();
virtual void device_reset();
virtual void device_config_complete();
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
- void fifo_write(UINT8 data);
- void check_fifo_executable();
- void exec_fifo();
- void update_fifo_internal_state(int bytes);
+ void fifo_write(UINT8 data);
+ void check_fifo_executable();
+ void exec_fifo();
+ void update_fifo_internal_state(int bytes);
scsihle_device *m_scsi_devices[8];
- UINT32 m_xfer_count;
- UINT32 m_dma_size;
- UINT8 m_command;
+ UINT32 m_xfer_count;
+ UINT32 m_dma_size;
+ UINT8 m_command;
UINT8 m_last_id;
- UINT8 m_timeout;
- UINT8 m_sync_xfer_period;
- UINT8 m_sync_offset;
- UINT8 m_control1, m_control2, m_control3, m_control4;
- UINT8 m_clock_factor;
- UINT8 m_forced_test;
- UINT8 m_data_alignment;
+ UINT8 m_timeout;
+ UINT8 m_sync_xfer_period;
+ UINT8 m_sync_offset;
+ UINT8 m_control1, m_control2, m_control3, m_control4;
+ UINT8 m_clock_factor;
+ UINT8 m_forced_test;
+ UINT8 m_data_alignment;
- bool m_selected;
- bool m_chipid_available, m_chipid_lock;
+ bool m_selected;
+ bool m_chipid_available, m_chipid_lock;
- static const int m_fifo_size = 16;
- UINT8 m_fifo_ptr, m_fifo[m_fifo_size];
+ static const int m_fifo_size = 16;
+ UINT8 m_fifo_ptr, m_fifo[m_fifo_size];
- int m_xfer_remaining; // amount in the FIFO when we're in data in phase
+ int m_xfer_remaining; // amount in the FIFO when we're in data in phase
- // read-only registers
- UINT8 m_status, m_irq_status, m_internal_state, m_fifo_internal_state;
+ // read-only registers
+ UINT8 m_status, m_irq_status, m_internal_state, m_fifo_internal_state;
- static const int m_buffer_size = 2048;
+ static const int m_buffer_size = 2048;
- UINT8 m_buffer[m_buffer_size];
- int m_buffer_offset, m_buffer_remaining, m_total_data;
+ UINT8 m_buffer[m_buffer_size];
+ int m_buffer_offset, m_buffer_remaining, m_total_data;
- emu_timer *m_operation_timer;
+ emu_timer *m_operation_timer;
- devcb_resolved_write_line m_out_irq_func;
- devcb_resolved_write_line m_out_drq_func;
+ devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_write_line m_out_drq_func;
};
// device type definition
diff --git a/src/emu/machine/net_lib.c b/src/emu/machine/net_lib.c
index cd86c529566..9ac3a489616 100644
--- a/src/emu/machine/net_lib.c
+++ b/src/emu/machine/net_lib.c
@@ -353,7 +353,7 @@ NETLIB_UPDATE(nic7448)
const UINT8 nic7448::tab7448[16][7] =
{
- { 1, 1, 1, 1, 1, 1, 0 }, /* 00 - not blanked ! */
+ { 1, 1, 1, 1, 1, 1, 0 }, /* 00 - not blanked ! */
{ 0, 1, 1, 0, 0, 0, 0 }, /* 01 */
{ 1, 1, 0, 1, 1, 0, 1 }, /* 02 */
{ 1, 1, 1, 1, 0, 0, 1 }, /* 03 */
@@ -908,35 +908,35 @@ NETLIB_FUNC_VOID(nic9316sub, update_outputs)
static net_device_t_base_factory *netregistry[] =
{
- ENTRY(netdev_ttl_const, NETDEV_TTL_CONST)
- ENTRY(netdev_analog_const, NETDEV_ANALOG_CONST)
- ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT)
+ ENTRY(netdev_ttl_const, NETDEV_TTL_CONST)
+ ENTRY(netdev_analog_const, NETDEV_ANALOG_CONST)
+ ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT)
ENTRY(netdev_analog_input, NETDEV_ANALOG_INPUT)
- ENTRY(netdev_clock, NETDEV_CLOCK)
- ENTRY(netdev_callback, NETDEV_CALLBACK)
- ENTRY(nicMultiSwitch, NETDEV_SWITCH2)
- ENTRY(nicRSFF, NETDEV_RSFF)
- ENTRY(nicMixer8, NETDEV_MIXER)
- ENTRY(nic7400, TTL_7400_NAND)
- ENTRY(nic7402, TTL_7402_NOR)
- ENTRY(nic7404, TTL_7404_INVERT)
- ENTRY(nic7410, TTL_7410_NAND)
- ENTRY(nic7420, TTL_7420_NAND)
- ENTRY(nic7425, TTL_7425_NOR)
- ENTRY(nic7427, TTL_7427_NOR)
- ENTRY(nic7430, TTL_7430_NAND)
- ENTRY(nic7450, TTL_7450_ANDORINVERT)
- ENTRY(nic7486, TTL_7486_XOR)
- ENTRY(nic7448, TTL_7448)
- ENTRY(nic7474, TTL_7474)
- ENTRY(nic7483, TTL_7483)
- ENTRY(nic7490, TTL_7490)
- ENTRY(nic7493, TTL_7493)
- ENTRY(nic74107, TTL_74107)
- ENTRY(nic74107A, TTL_74107A)
- ENTRY(nic74153, TTL_74153)
- ENTRY(nic9316, TTL_9316)
- ENTRY(nicNE555N_MSTABLE, NE555N_MSTABLE)
+ ENTRY(netdev_clock, NETDEV_CLOCK)
+ ENTRY(netdev_callback, NETDEV_CALLBACK)
+ ENTRY(nicMultiSwitch, NETDEV_SWITCH2)
+ ENTRY(nicRSFF, NETDEV_RSFF)
+ ENTRY(nicMixer8, NETDEV_MIXER)
+ ENTRY(nic7400, TTL_7400_NAND)
+ ENTRY(nic7402, TTL_7402_NOR)
+ ENTRY(nic7404, TTL_7404_INVERT)
+ ENTRY(nic7410, TTL_7410_NAND)
+ ENTRY(nic7420, TTL_7420_NAND)
+ ENTRY(nic7425, TTL_7425_NOR)
+ ENTRY(nic7427, TTL_7427_NOR)
+ ENTRY(nic7430, TTL_7430_NAND)
+ ENTRY(nic7450, TTL_7450_ANDORINVERT)
+ ENTRY(nic7486, TTL_7486_XOR)
+ ENTRY(nic7448, TTL_7448)
+ ENTRY(nic7474, TTL_7474)
+ ENTRY(nic7483, TTL_7483)
+ ENTRY(nic7490, TTL_7490)
+ ENTRY(nic7493, TTL_7493)
+ ENTRY(nic74107, TTL_74107)
+ ENTRY(nic74107A, TTL_74107A)
+ ENTRY(nic74153, TTL_74153)
+ ENTRY(nic9316, TTL_9316)
+ ENTRY(nicNE555N_MSTABLE, NE555N_MSTABLE)
NULL
};
diff --git a/src/emu/machine/net_lib.h b/src/emu/machine/net_lib.h
index 2b6c6801310..441b01f332e 100644
--- a/src/emu/machine/net_lib.h
+++ b/src/emu/machine/net_lib.h
@@ -54,189 +54,189 @@
// Special chips
// ----------------------------------------------------------------------------------------
-#define NETDEV_CLOCK(_name) \
- NET_REGISTER_DEV(netdev_clock, _name) \
+#define NETDEV_CLOCK(_name) \
+ NET_REGISTER_DEV(netdev_clock, _name) \
-#define NETDEV_LOGIC_INPUT(_name) \
- NET_REGISTER_DEV(netdev_logic_input, _name) \
+#define NETDEV_LOGIC_INPUT(_name) \
+ NET_REGISTER_DEV(netdev_logic_input, _name) \
-#define NETDEV_ANALOG_INPUT(_name) \
- NET_REGISTER_DEV(netdev_analog_input, _name) \
+#define NETDEV_ANALOG_INPUT(_name) \
+ NET_REGISTER_DEV(netdev_analog_input, _name) \
-#define NETDEV_CALLBACK(_name, _IN) \
- NET_REGISTER_DEV(netdev_callback, _name) \
- NET_CONNECT(_name, IN, _IN) \
+#define NETDEV_CALLBACK(_name, _IN) \
+ NET_REGISTER_DEV(netdev_callback, _name) \
+ NET_CONNECT(_name, IN, _IN) \
-#define NETDEV_SWITCH2(_name, _i1, _i2) \
- NET_REGISTER_DEV(nicMultiSwitch, _name) \
- NET_CONNECT(_name, i1, _i1) \
- NET_CONNECT(_name, i2, _i2) \
+#define NETDEV_SWITCH2(_name, _i1, _i2) \
+ NET_REGISTER_DEV(nicMultiSwitch, _name) \
+ NET_CONNECT(_name, i1, _i1) \
+ NET_CONNECT(_name, i2, _i2) \
-#define NETDEV_DELAY_RISE(_name, _CLK, _D) \
- NET_REGISTER_DEV(netdev_delay_lh, _name) \
- NET_CONNECT(_name, CLK, _CLK) \
- NET_CONNECT(_name, D, _D) \
+#define NETDEV_DELAY_RISE(_name, _CLK, _D) \
+ NET_REGISTER_DEV(netdev_delay_lh, _name) \
+ NET_CONNECT(_name, CLK, _CLK) \
+ NET_CONNECT(_name, D, _D) \
-#define NETDEV_RSFF(_name, _S, _R) \
- NET_REGISTER_DEV(nicRSFF, _name) \
- NET_CONNECT(_name, S, _S) \
- NET_CONNECT(_name, R, _R) \
+#define NETDEV_RSFF(_name, _S, _R) \
+ NET_REGISTER_DEV(nicRSFF, _name) \
+ NET_CONNECT(_name, S, _S) \
+ NET_CONNECT(_name, R, _R) \
// ----------------------------------------------------------------------------------------
// TTL Logic chips
// ----------------------------------------------------------------------------------------
-#define TTL_7400_NAND(_name, _I1, _I2) \
- NET_REGISTER_DEV(nic7400, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
-
-#define TTL_7402_NOR(_name, _I1, _I2) \
- NET_REGISTER_DEV(nic7402, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
-
-#define TTL_7404_INVERT(_name, _I1) \
- NET_REGISTER_DEV(nic7404, _name) \
- NET_CONNECT(_name, I1, _I1) \
-
-#define TTL_7410_NAND(_name, _I1, _I2, _I3) \
- NET_REGISTER_DEV(nic7410, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
- NET_CONNECT(_name, I3, _I3) \
-
-#define TTL_7420_NAND(_name, _I1, _I2, _I3, _I4) \
- NET_REGISTER_DEV(nic7420, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
- NET_CONNECT(_name, I3, _I3) \
- NET_CONNECT(_name, I4, _I4) \
-
-#define TTL_7425_NOR(_name, _I1, _I2, _I3, _I4) \
- NET_REGISTER_DEV(nic7425, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
- NET_CONNECT(_name, I3, _I3) \
- NET_CONNECT(_name, I4, _I4) \
-
-#define TTL_7427_NOR(_name, _I1, _I2, _I3) \
- NET_REGISTER_DEV(nic7427, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
- NET_CONNECT(_name, I3, _I3) \
-
-#define TTL_7430_NAND(_name, _I1, _I2, _I3, _I4, _I5, _I6, _I7, _I8) \
- NET_REGISTER_DEV(nic7430, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
- NET_CONNECT(_name, I3, _I3) \
- NET_CONNECT(_name, I4, _I4) \
- NET_CONNECT(_name, I5, _I5) \
- NET_CONNECT(_name, I6, _I6) \
- NET_CONNECT(_name, I7, _I7) \
- NET_CONNECT(_name, I8, _I8) \
-
-#define TTL_7450_ANDORINVERT(_name, _I1, _I2, _I3, _I4) \
- NET_REGISTER_DEV(nic7450, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
- NET_CONNECT(_name, I3, _I3) \
- NET_CONNECT(_name, I4, _I4) \
-
-#define TTL_7486_XOR(_name, _I1, _I2) \
- NET_REGISTER_DEV(nic7486, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
-
-#define TTL_7448(_name, _A0, _A1, _A2, _A3, _LTQ, _BIQ, _RBIQ) \
- NET_REGISTER_DEV(nic7448, _name) \
- NET_CONNECT(_name, A0, _A0) \
- NET_CONNECT(_name, A1, _A1) \
- NET_CONNECT(_name, A2, _A2) \
- NET_CONNECT(_name, A3, _A3) \
- NET_CONNECT(_name, LTQ, _LTQ) \
- NET_CONNECT(_name, BIQ, _BIQ) \
- NET_CONNECT(_name, RBIQ, _RBIQ) \
-
-#define TTL_7474(_name, _CLK, _D, _CLRQ, _PREQ) \
- NET_REGISTER_DEV(nic7474, _name) \
- NET_CONNECT(_name, CLK, _CLK) \
- NET_CONNECT(_name, D, _D) \
- NET_CONNECT(_name, CLRQ, _CLRQ) \
- NET_CONNECT(_name, PREQ, _PREQ) \
-
-#define TTL_7483(_name, _A1, _A2, _A3, _A4, _B1, _B2, _B3, _B4, _CI) \
- NET_REGISTER_DEV(nic7483, _name) \
- NET_CONNECT(_name, A1, _A1) \
- NET_CONNECT(_name, A2, _A2) \
- NET_CONNECT(_name, A3, _A3) \
- NET_CONNECT(_name, A4, _A4) \
- NET_CONNECT(_name, B1, _B1) \
- NET_CONNECT(_name, B2, _B2) \
- NET_CONNECT(_name, B3, _B3) \
- NET_CONNECT(_name, B4, _B4) \
- NET_CONNECT(_name, CI, _CI) \
-
-#define TTL_7490(_name, _CLK, _R1, _R2, _R91, _R92) \
- NET_REGISTER_DEV(nic7490, _name) \
- NET_CONNECT(_name, CLK, _CLK) \
- NET_CONNECT(_name, R1, _R1) \
- NET_CONNECT(_name, R2, _R2) \
- NET_CONNECT(_name, R91, _R91) \
- NET_CONNECT(_name, R92, _R92) \
-
-#define TTL_7493(_name, _CLKA, _CLKB, _R1, _R2) \
- NET_REGISTER_DEV(nic7493, _name) \
- NET_CONNECT(_name, CLKA, _CLKA) \
- NET_CONNECT(_name, CLKB, _CLKB) \
- NET_CONNECT(_name, R1, _R1) \
- NET_CONNECT(_name, R2, _R2) \
-
-#define TTL_74107A(_name, _CLK, _J, _K, _CLRQ) \
- NET_REGISTER_DEV(nic74107A, _name) \
- NET_CONNECT(_name, CLK, _CLK) \
- NET_CONNECT(_name, J, _J) \
- NET_CONNECT(_name, K, _K) \
- NET_CONNECT(_name, CLRQ, _CLRQ) \
-
-#define TTL_74107(_name, _CLK, _J, _K, _CLRQ) \
+#define TTL_7400_NAND(_name, _I1, _I2) \
+ NET_REGISTER_DEV(nic7400, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+
+#define TTL_7402_NOR(_name, _I1, _I2) \
+ NET_REGISTER_DEV(nic7402, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+
+#define TTL_7404_INVERT(_name, _I1) \
+ NET_REGISTER_DEV(nic7404, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+
+#define TTL_7410_NAND(_name, _I1, _I2, _I3) \
+ NET_REGISTER_DEV(nic7410, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+ NET_CONNECT(_name, I3, _I3) \
+
+#define TTL_7420_NAND(_name, _I1, _I2, _I3, _I4) \
+ NET_REGISTER_DEV(nic7420, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+ NET_CONNECT(_name, I3, _I3) \
+ NET_CONNECT(_name, I4, _I4) \
+
+#define TTL_7425_NOR(_name, _I1, _I2, _I3, _I4) \
+ NET_REGISTER_DEV(nic7425, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+ NET_CONNECT(_name, I3, _I3) \
+ NET_CONNECT(_name, I4, _I4) \
+
+#define TTL_7427_NOR(_name, _I1, _I2, _I3) \
+ NET_REGISTER_DEV(nic7427, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+ NET_CONNECT(_name, I3, _I3) \
+
+#define TTL_7430_NAND(_name, _I1, _I2, _I3, _I4, _I5, _I6, _I7, _I8) \
+ NET_REGISTER_DEV(nic7430, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+ NET_CONNECT(_name, I3, _I3) \
+ NET_CONNECT(_name, I4, _I4) \
+ NET_CONNECT(_name, I5, _I5) \
+ NET_CONNECT(_name, I6, _I6) \
+ NET_CONNECT(_name, I7, _I7) \
+ NET_CONNECT(_name, I8, _I8) \
+
+#define TTL_7450_ANDORINVERT(_name, _I1, _I2, _I3, _I4) \
+ NET_REGISTER_DEV(nic7450, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+ NET_CONNECT(_name, I3, _I3) \
+ NET_CONNECT(_name, I4, _I4) \
+
+#define TTL_7486_XOR(_name, _I1, _I2) \
+ NET_REGISTER_DEV(nic7486, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+
+#define TTL_7448(_name, _A0, _A1, _A2, _A3, _LTQ, _BIQ, _RBIQ) \
+ NET_REGISTER_DEV(nic7448, _name) \
+ NET_CONNECT(_name, A0, _A0) \
+ NET_CONNECT(_name, A1, _A1) \
+ NET_CONNECT(_name, A2, _A2) \
+ NET_CONNECT(_name, A3, _A3) \
+ NET_CONNECT(_name, LTQ, _LTQ) \
+ NET_CONNECT(_name, BIQ, _BIQ) \
+ NET_CONNECT(_name, RBIQ, _RBIQ) \
+
+#define TTL_7474(_name, _CLK, _D, _CLRQ, _PREQ) \
+ NET_REGISTER_DEV(nic7474, _name) \
+ NET_CONNECT(_name, CLK, _CLK) \
+ NET_CONNECT(_name, D, _D) \
+ NET_CONNECT(_name, CLRQ, _CLRQ) \
+ NET_CONNECT(_name, PREQ, _PREQ) \
+
+#define TTL_7483(_name, _A1, _A2, _A3, _A4, _B1, _B2, _B3, _B4, _CI) \
+ NET_REGISTER_DEV(nic7483, _name) \
+ NET_CONNECT(_name, A1, _A1) \
+ NET_CONNECT(_name, A2, _A2) \
+ NET_CONNECT(_name, A3, _A3) \
+ NET_CONNECT(_name, A4, _A4) \
+ NET_CONNECT(_name, B1, _B1) \
+ NET_CONNECT(_name, B2, _B2) \
+ NET_CONNECT(_name, B3, _B3) \
+ NET_CONNECT(_name, B4, _B4) \
+ NET_CONNECT(_name, CI, _CI) \
+
+#define TTL_7490(_name, _CLK, _R1, _R2, _R91, _R92) \
+ NET_REGISTER_DEV(nic7490, _name) \
+ NET_CONNECT(_name, CLK, _CLK) \
+ NET_CONNECT(_name, R1, _R1) \
+ NET_CONNECT(_name, R2, _R2) \
+ NET_CONNECT(_name, R91, _R91) \
+ NET_CONNECT(_name, R92, _R92) \
+
+#define TTL_7493(_name, _CLKA, _CLKB, _R1, _R2) \
+ NET_REGISTER_DEV(nic7493, _name) \
+ NET_CONNECT(_name, CLKA, _CLKA) \
+ NET_CONNECT(_name, CLKB, _CLKB) \
+ NET_CONNECT(_name, R1, _R1) \
+ NET_CONNECT(_name, R2, _R2) \
+
+#define TTL_74107A(_name, _CLK, _J, _K, _CLRQ) \
+ NET_REGISTER_DEV(nic74107A, _name) \
+ NET_CONNECT(_name, CLK, _CLK) \
+ NET_CONNECT(_name, J, _J) \
+ NET_CONNECT(_name, K, _K) \
+ NET_CONNECT(_name, CLRQ, _CLRQ) \
+
+#define TTL_74107(_name, _CLK, _J, _K, _CLRQ) \
TTL_74107A(_name, _CLK, _J, _K, _CLRQ)
-#define TTL_74153(_name, _A1, _A2, _A3, _A4, _A, _B, _GA) \
- NET_REGISTER_DEV(nic74153, _name) \
- NET_CONNECT(_name, A1, _A1) \
- NET_CONNECT(_name, A2, _A2) \
- NET_CONNECT(_name, A3, _A3) \
- NET_CONNECT(_name, A4, _A4) \
- NET_CONNECT(_name, A, _A) \
- NET_CONNECT(_name, B, _B) \
- NET_CONNECT(_name, GA, _GA) \
-
-#define TTL_9316(_name, _CLK, _ENP, _ENT, _CLRQ, _LOADQ, _A, _B, _C, _D) \
- NET_REGISTER_DEV(nic9316, _name) \
- NET_CONNECT(_name, CLK, _CLK) \
- NET_CONNECT(_name, ENP, _ENP) \
- NET_CONNECT(_name, ENT, _ENT) \
- NET_CONNECT(_name, CLRQ, _CLRQ) \
- NET_CONNECT(_name, LOADQ,_LOADQ) \
- NET_CONNECT(_name, A, _A) \
- NET_CONNECT(_name, B, _B) \
- NET_CONNECT(_name, C, _C) \
- NET_CONNECT(_name, D, _D) \
-
-
-#define NE555N_MSTABLE(_name, _TRIG, _CV) \
- NET_REGISTER_DEV(nicNE555N_MSTABLE, _name) \
- NET_CONNECT(_name, TRIG, _TRIG) \
- NET_CONNECT(_name, CV, _CV) \
-
-#define NETDEV_MIXER3(_name, _I1, _I2, _I3) \
- NET_REGISTER_DEV(nicMixer8, _name) \
- NET_CONNECT(_name, I1, _I1) \
- NET_CONNECT(_name, I2, _I2) \
- NET_CONNECT(_name, I3, _I3) \
+#define TTL_74153(_name, _A1, _A2, _A3, _A4, _A, _B, _GA) \
+ NET_REGISTER_DEV(nic74153, _name) \
+ NET_CONNECT(_name, A1, _A1) \
+ NET_CONNECT(_name, A2, _A2) \
+ NET_CONNECT(_name, A3, _A3) \
+ NET_CONNECT(_name, A4, _A4) \
+ NET_CONNECT(_name, A, _A) \
+ NET_CONNECT(_name, B, _B) \
+ NET_CONNECT(_name, GA, _GA) \
+
+#define TTL_9316(_name, _CLK, _ENP, _ENT, _CLRQ, _LOADQ, _A, _B, _C, _D) \
+ NET_REGISTER_DEV(nic9316, _name) \
+ NET_CONNECT(_name, CLK, _CLK) \
+ NET_CONNECT(_name, ENP, _ENP) \
+ NET_CONNECT(_name, ENT, _ENT) \
+ NET_CONNECT(_name, CLRQ, _CLRQ) \
+ NET_CONNECT(_name, LOADQ,_LOADQ) \
+ NET_CONNECT(_name, A, _A) \
+ NET_CONNECT(_name, B, _B) \
+ NET_CONNECT(_name, C, _C) \
+ NET_CONNECT(_name, D, _D) \
+
+
+#define NE555N_MSTABLE(_name, _TRIG, _CV) \
+ NET_REGISTER_DEV(nicNE555N_MSTABLE, _name) \
+ NET_CONNECT(_name, TRIG, _TRIG) \
+ NET_CONNECT(_name, CV, _CV) \
+
+#define NETDEV_MIXER3(_name, _I1, _I2, _I3) \
+ NET_REGISTER_DEV(nicMixer8, _name) \
+ NET_CONNECT(_name, I1, _I1) \
+ NET_CONNECT(_name, I2, _I2) \
+ NET_CONNECT(_name, I3, _I3) \
// ----------------------------------------------------------------------------------------
// Special support devices ...
@@ -358,7 +358,7 @@ NETLIB_DEVICE(nic7474,
NETLIB_SUBDEVICE(nic7474sub,
ttl_input_t m_clk;
- UINT8 m_nextD;
+ UINT8 m_nextD;
ttl_output_t m_Q;
ttl_output_t m_QQ;
);
@@ -408,7 +408,7 @@ class nic74107 : public nic74107A
{
public:
nic74107()
- : nic74107A() {}
+ : nic74107A() {}
};
diff --git a/src/emu/machine/netlist.c b/src/emu/machine/netlist.c
index 8e53717f4d4..328f34f72d6 100644
--- a/src/emu/machine/netlist.c
+++ b/src/emu/machine/netlist.c
@@ -51,12 +51,12 @@
// DEBUGGING
//============================================================
-#define VERBOSE (0)
-#define KEEP_STATISTICS (0)
+#define VERBOSE (0)
+#define KEEP_STATISTICS (0)
#if (VERBOSE)
-#define VERBOSE_OUT(x) printf x
+#define VERBOSE_OUT(x) printf x
#else
#define VERBOSE_OUT(x)
#endif
@@ -66,15 +66,15 @@
//============================================================
#if KEEP_STATISTICS
-#define add_to_stat(v,x) do { v += (x); } while (0)
-#define inc_stat(v) add_to_stat(v, 1)
-#define begin_timing(v) do { (v) -= get_profile_ticks(); } while (0)
-#define end_timing(v) do { (v) += get_profile_ticks(); } while (0)
+#define add_to_stat(v,x) do { v += (x); } while (0)
+#define inc_stat(v) add_to_stat(v, 1)
+#define begin_timing(v) do { (v) -= get_profile_ticks(); } while (0)
+#define end_timing(v) do { (v) += get_profile_ticks(); } while (0)
#else
-#define add_to_stat(v,x) do { } while (0)
-#define inc_stat(v) add_to_stat(v, 1)
-#define begin_timing(v) do { } while (0)
-#define end_timing(v) do { } while (0)
+#define add_to_stat(v,x) do { } while (0)
+#define inc_stat(v) add_to_stat(v, 1)
+#define begin_timing(v) do { } while (0)
+#define end_timing(v) do { } while (0)
#endif
@@ -884,7 +884,7 @@ const device_type NETLIST = &device_creator<netlist_mame_device>;
netlist_mame_device::netlist_mame_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NETLIST, "netlist", tag, owner, clock),
- device_execute_interface(mconfig, *this)
+ device_execute_interface(mconfig, *this)
{
}
@@ -903,7 +903,7 @@ void netlist_mame_device::device_start()
//double dt = clocks_to_attotime(1).as_double();
m_netlist = global_alloc_clear(netlist_t(*this));
- m_netlist->set_clock_freq(this->clock());
+ m_netlist->set_clock_freq(this->clock());
m_setup = global_alloc_clear(netlist_setup_t(*m_netlist));
@@ -916,7 +916,7 @@ void netlist_mame_device::device_start()
if (!allok)
fatalerror("required elements not found\n");
- m_setup->resolve_inputs();
+ m_setup->resolve_inputs();
//save_item(NAME(m_clockcnt));
save_state();
@@ -981,6 +981,3 @@ ATTR_HOT void netlist_mame_device::execute_run()
m_netlist->process_list(m_icount);
}
-
-
-
diff --git a/src/emu/machine/netlist.h b/src/emu/machine/netlist.h
index 0281216d93d..de4dd5dfdd3 100644
--- a/src/emu/machine/netlist.h
+++ b/src/emu/machine/netlist.h
@@ -55,41 +55,41 @@
// SETUP
//============================================================
-#define USE_DELEGATES (1)
-#define USE_DELEGATES_A (0)
+#define USE_DELEGATES (1)
+#define USE_DELEGATES_A (0)
-#define NETLIST_CLOCK (U64(1000000000))
+#define NETLIST_CLOCK (U64(1000000000))
-#define NLTIME_FROM_NS(_t) netlist_time::from_ns(_t)
-#define NLTIME_FROM_US(_t) netlist_time::from_us(_t)
-#define NLTIME_FROM_MS(_t) netlist_time::from_ms(_t)
-#define NLTIME_IMMEDIATE netlist_time::from_ns(0)
+#define NLTIME_FROM_NS(_t) netlist_time::from_ns(_t)
+#define NLTIME_FROM_US(_t) netlist_time::from_us(_t)
+#define NLTIME_FROM_MS(_t) netlist_time::from_ms(_t)
+#define NLTIME_IMMEDIATE netlist_time::from_ns(0)
-#define NETLIST_HIGHIMP_V (1.23456e20) /* some voltage we should never see */
+#define NETLIST_HIGHIMP_V (1.23456e20) /* some voltage we should never see */
//============================================================
// MACROS / inline netlist definitions
//============================================================
-#define NET_ALIAS(_alias, _name) \
- netlist.register_alias(# _alias, # _name); \
+#define NET_ALIAS(_alias, _name) \
+ netlist.register_alias(# _alias, # _name); \
#define NET_NEW(_type , _name) net_create_device_by_classname(# _type, &netlist, # _name)
-#define NET_REGISTER_DEV(_type, _name) \
- netlist.register_dev(NET_NEW(_type, _name)); \
+#define NET_REGISTER_DEV(_type, _name) \
+ netlist.register_dev(NET_NEW(_type, _name)); \
-#define NET_REMOVE_DEV(_name) \
- netlist.remove_dev(# _name); \
+#define NET_REMOVE_DEV(_name) \
+ netlist.remove_dev(# _name); \
-#define NET_REGISTER_SIGNAL(_type, _name) \
- NET_REGISTER_DEV(_type ## _ ## sig, _name) \
+#define NET_REGISTER_SIGNAL(_type, _name) \
+ NET_REGISTER_DEV(_type ## _ ## sig, _name) \
-#define NET_CONNECT(_name, _input, _output) \
- netlist.register_link(# _name "." # _input, # _output); \
+#define NET_CONNECT(_name, _input, _output) \
+ netlist.register_link(# _name "." # _input, # _output); \
-#define NETDEV_PARAM(_name, _val) \
+#define NETDEV_PARAM(_name, _val) \
netlist.find_param(# _name).initial(_val);
#define NETLIST_NAME(_name) netlist ## _ ## _name
@@ -100,12 +100,12 @@ ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
#define NETLIST_END }
-#define NETLIST_INCLUDE(_name) \
- NETLIST_NAME(_name)(netlist); \
+#define NETLIST_INCLUDE(_name) \
+ NETLIST_NAME(_name)(netlist); \
-#define NETLIST_MEMREGION(_name) \
- netlist.parse((char *)downcast<netlist_t &>(netlist.netlist()).machine().root_device().memregion(_name)->base()); \
+#define NETLIST_MEMREGION(_name) \
+ netlist.parse((char *)downcast<netlist_t &>(netlist.netlist()).machine().root_device().memregion(_name)->base()); \
#if defined(__GNUC__) && (__GNUC__ >= 3)
#if !defined(__ppc__) && !defined (__PPC__) && !defined(__ppc64__) && !defined(__PPC64__)
@@ -126,58 +126,58 @@ ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
#define NETLIB_UPDATE_PARAM(_chip) ATTR_HOT ATTR_ALIGN void _chip :: update_param(void)
#define NETLIB_FUNC_VOID(_chip, _name) ATTR_HOT ATTR_ALIGN inline void _chip :: _name (void)
-#define NETLIB_SIGNAL(_name, _num_input, _check) \
- class _name : public net_signal_t<_num_input, _check> \
- { \
- public: \
- _name () : net_signal_t<_num_input, _check>() { } \
- }; \
-
-#define NETLIB_DEVICE(_name, _priv) \
- class _name : public net_device_t \
- { \
- public: \
- _name () : net_device_t() { } \
- ATTR_HOT void update(); \
- ATTR_COLD void start(); \
- protected: \
- _priv \
- } \
-
-#define NETLIB_SUBDEVICE(_name, _priv) \
- class _name : public net_core_device_t \
- { \
- public: \
- _name () : net_core_device_t() { } \
- ATTR_HOT void update(); \
- /*protected:*/ \
- _priv \
- } \
-
-#define NETLIB_DEVICE_WITH_PARAMS(_name, _priv) \
- class _name : public net_device_t \
- { \
- public: \
- _name () : net_device_t() { } \
- ATTR_HOT void update_param(); \
- ATTR_HOT void update(); \
- ATTR_COLD void start(); \
- /* protected: */ \
- _priv \
- } \
+#define NETLIB_SIGNAL(_name, _num_input, _check) \
+ class _name : public net_signal_t<_num_input, _check> \
+ { \
+ public: \
+ _name () : net_signal_t<_num_input, _check>() { } \
+ }; \
+
+#define NETLIB_DEVICE(_name, _priv) \
+ class _name : public net_device_t \
+ { \
+ public: \
+ _name () : net_device_t() { } \
+ ATTR_HOT void update(); \
+ ATTR_COLD void start(); \
+ protected: \
+ _priv \
+ } \
+
+#define NETLIB_SUBDEVICE(_name, _priv) \
+ class _name : public net_core_device_t \
+ { \
+ public: \
+ _name () : net_core_device_t() { } \
+ ATTR_HOT void update(); \
+ /*protected:*/ \
+ _priv \
+ } \
+
+#define NETLIB_DEVICE_WITH_PARAMS(_name, _priv) \
+ class _name : public net_device_t \
+ { \
+ public: \
+ _name () : net_device_t() { } \
+ ATTR_HOT void update_param(); \
+ ATTR_HOT void update(); \
+ ATTR_COLD void start(); \
+ /* protected: */ \
+ _priv \
+ } \
// MAME specific
-#define MCFG_NETLIST_ADD(_tag, _setup ) \
- MCFG_DEVICE_ADD(_tag, NETLIST, NETLIST_CLOCK) \
- MCFG_NETLIST_SETUP(_setup) \
+#define MCFG_NETLIST_ADD(_tag, _setup ) \
+ MCFG_DEVICE_ADD(_tag, NETLIST, NETLIST_CLOCK) \
+ MCFG_NETLIST_SETUP(_setup) \
-#define MCFG_NETLIST_REPLACE(_tag, _setup) \
- MCFG_DEVICE_REPLACE(_tag, NETLIST, NETLIST_CLOCK) \
- MCFG_NETLIST_SETUP(_setup) \
+#define MCFG_NETLIST_REPLACE(_tag, _setup) \
+ MCFG_DEVICE_REPLACE(_tag, NETLIST, NETLIST_CLOCK) \
+ MCFG_NETLIST_SETUP(_setup) \
-#define MCFG_NETLIST_SETUP(_setup) \
- netlist_mame_device::static_set_constructor(*device, NETLIST_NAME(_setup)); \
+#define MCFG_NETLIST_SETUP(_setup) \
+ netlist_mame_device::static_set_constructor(*device, NETLIST_NAME(_setup)); \
// ----------------------------------------------------------------------------------------
@@ -402,7 +402,7 @@ public:
TYPE_MASK = 0x03,
SIGNAL_DIGITAL = 0x00,
SIGNAL_ANALOG = 0x10,
- SIGNAL_MASK = 0x10,
+ SIGNAL_MASK = 0x10,
};
net_object_t(int atype)
@@ -434,7 +434,7 @@ public:
ATTR_HOT inline bool is_state(const net_input_state astate) { return (m_state & astate); }
ATTR_HOT inline UINT32 state() const { return m_state; }
- ATTR_COLD void set_output(net_output_t *aout) { m_output = aout; }
+ ATTR_COLD void set_output(net_output_t *aout) { m_output = aout; }
ATTR_HOT inline void inactivate();
ATTR_HOT inline void activate();
ATTR_HOT inline void activate_hl();
@@ -510,23 +510,23 @@ public:
friend net_sig_t logic_input_t::Q() const;
- ATTR_HOT inline const net_sig_t last_Q() const { return m_last_Q; }
- ATTR_HOT inline const net_sig_t new_Q() const { return m_new_Q; }
+ ATTR_HOT inline const net_sig_t last_Q() const { return m_last_Q; }
+ ATTR_HOT inline const net_sig_t new_Q() const { return m_new_Q; }
ATTR_HOT inline const double Q_Analog() const
{
switch (object_type(SIGNAL_MASK))
{
- case SIGNAL_DIGITAL: return m_Q ? m_high_V : m_low_V;
- case SIGNAL_ANALOG: return m_Q_analog;
- default: assert(true);
+ case SIGNAL_DIGITAL: return m_Q ? m_high_V : m_low_V;
+ case SIGNAL_ANALOG: return m_Q_analog;
+ default: assert(true);
}
return 0;
}
- inline net_sig_t *Q_ptr() { return &m_Q; }
- inline net_sig_t *new_Q_ptr() { return &m_new_Q; }
+ inline net_sig_t *Q_ptr() { return &m_Q; }
+ inline net_sig_t *new_Q_ptr() { return &m_new_Q; }
ATTR_COLD void register_con(net_input_t &inp);
@@ -544,9 +544,9 @@ public:
protected:
/* prohibit use in device functions
- * current (pending) state can be inquired using new_Q()
- */
- ATTR_HOT inline const net_sig_t Q() const { return m_Q; }
+ * current (pending) state can be inquired using new_Q()
+ */
+ ATTR_HOT inline const net_sig_t Q() const { return m_Q; }
ATTR_HOT inline void register_in_listPS(const netlist_time &delay_ps);
@@ -612,8 +612,8 @@ public:
}
ATTR_COLD void initial(const net_sig_t val) { m_Q = val; m_new_Q = val; m_last_Q = !val; }
- ATTR_HOT inline void clear() { set_Q_PS(0, netlist_time::zero); }
- ATTR_HOT inline void set() { set_Q_PS(1, netlist_time::zero); }
+ ATTR_HOT inline void clear() { set_Q_PS(0, netlist_time::zero); }
+ ATTR_HOT inline void set() { set_Q_PS(1, netlist_time::zero); }
ATTR_HOT inline void setToPS(const UINT8 val, const netlist_time &delay_ps) { set_Q_PS(val, delay_ps); }
ATTR_HOT inline void setToNoCheckPS(const UINT8 val, const netlist_time &delay_ps) { set_Q_NoCheckPS(val, delay_ps); }
ATTR_COLD inline void set_levels(const double low, const double high)
@@ -768,8 +768,8 @@ public:
inline void initial(const double val) { m_param = val; }
inline void initial(const int val) { m_param = val; }
- ATTR_HOT inline double Value() const { return m_param; }
- ATTR_HOT inline int ValueInt() const { return (int) m_param; }
+ ATTR_HOT inline double Value() const { return m_param; }
+ ATTR_HOT inline int ValueInt() const { return (int) m_param; }
ATTR_HOT inline net_core_device_t &netdev() const { return *m_netdev; }
void set_netdev(net_core_device_t &dev) { m_netdev = &dev; }
@@ -921,8 +921,8 @@ public:
protected:
netlist_time m_time_ps;
- UINT32 m_rem;
- UINT32 m_div;
+ UINT32 m_rem;
+ UINT32 m_div;
queue_t m_queue;
@@ -969,13 +969,13 @@ private:
// netdev_*_const
// ----------------------------------------------------------------------------------------
-#define NETDEV_TTL_CONST(_name, _v) \
- NET_REGISTER_DEV(netdev_ttl_const, _name) \
- NETDEV_PARAM(_name.CONST, _v) \
+#define NETDEV_TTL_CONST(_name, _v) \
+ NET_REGISTER_DEV(netdev_ttl_const, _name) \
+ NETDEV_PARAM(_name.CONST, _v) \
-#define NETDEV_ANALOG_CONST(_name, _v) \
- NET_REGISTER_DEV(netdev_analog_const, _name) \
- NETDEV_PARAM(_name.CONST, _v) \
+#define NETDEV_ANALOG_CONST(_name, _v) \
+ NET_REGISTER_DEV(netdev_analog_const, _name) \
+ NETDEV_PARAM(_name.CONST, _v) \
NETLIB_DEVICE_WITH_PARAMS(netdev_ttl_const,
@@ -1026,10 +1026,10 @@ ATTR_HOT inline void net_input_t::activate_lh()
ATTR_HOT inline void net_output_t::register_in_listPS(const netlist_time &delay_ps)
{
m_time = m_netlist->time() + delay_ps;
- m_in_queue = 0; /* not queued */
+ m_in_queue = 0; /* not queued */
if (m_active > 0)
{
- m_in_queue = 1; /* pending */
+ m_in_queue = 1; /* pending */
m_netlist->register_in_listPS1(this, m_time);
}
}
@@ -1041,7 +1041,7 @@ ATTR_HOT inline void net_output_t::inc_active()
{
if (m_time >= m_netlist->time())
{
- m_in_queue = 1; /* pending */
+ m_in_queue = 1; /* pending */
m_netlist->register_in_listPS1(this, m_time);
}
else
@@ -1066,14 +1066,14 @@ ATTR_HOT inline bool analog_input_t::is_highz() const { return output()->Q_Analo
class net_device_t_base_factory
{
public:
- virtual ~net_device_t_base_factory() {}
+ virtual ~net_device_t_base_factory() {}
virtual net_device_t *Create(netlist_setup_t *setup, const char *name) = 0;
const char *name() { return m_name; }
const char *classname() { return m_classname; }
protected:
- const char *m_name; /* device name */
- const char *m_classname; /* device class name */
+ const char *m_name; /* device name */
+ const char *m_classname; /* device class name */
};
template <class C>
@@ -1103,11 +1103,11 @@ public:
netlist_t(device_t &parent)
: netlist_base_t(),
- m_parent(parent)
+ m_parent(parent)
{}
virtual ~netlist_t() { };
- inline running_machine &machine() { return m_parent.machine(); }
+ inline running_machine &machine() { return m_parent.machine(); }
device_t &parent() { return m_parent; }
@@ -1118,7 +1118,7 @@ private:
// ======================> netlist_mame_device
class netlist_mame_device : public device_t,
- public device_execute_interface
+ public device_execute_interface
{
public:
@@ -1133,7 +1133,7 @@ public:
// construction/destruction
netlist_mame_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- virtual ~netlist_mame_device() {}
+ virtual ~netlist_mame_device() {}
static void static_set_constructor(device_t &device, void (*setup_func)(netlist_setup_t &));
@@ -1155,13 +1155,13 @@ protected:
ATTR_HOT virtual void execute_run();
- netlist_t *m_netlist;
+ netlist_t *m_netlist;
netlist_setup_t *m_setup;
private:
- void step_one_clock();
+ void step_one_clock();
void save_state();
void (*m_setup_func)(netlist_setup_t &);
@@ -1177,7 +1177,7 @@ class netlist_mame_device::on_device_start
{
public:
virtual bool OnDeviceStart() = 0;
- virtual ~on_device_start() {}
+ virtual ~on_device_start() {}
};
// device finder template
diff --git a/src/emu/machine/nmc9306.c b/src/emu/machine/nmc9306.c
index 047cc62e878..61a90d09dfb 100644
--- a/src/emu/machine/nmc9306.c
+++ b/src/emu/machine/nmc9306.c
@@ -25,18 +25,18 @@
enum
{
OTHER = 0,
- WRITE, // write register A3A2A1A0
- READ, // read register A3A2A1A0
- ERASE // erase register A3A2A1A0
+ WRITE, // write register A3A2A1A0
+ READ, // read register A3A2A1A0
+ ERASE // erase register A3A2A1A0
};
// other instructions
enum
{
- EWDS = 0, // erase/write disable
- WRAL, // write all registers
- ERAL, // erase all registers
- EWEN, // erase/write enable
+ EWDS = 0, // erase/write disable
+ WRAL, // write all registers
+ ERAL, // erase all registers
+ EWEN, // erase/write enable
};
// states
@@ -106,9 +106,9 @@ inline void nmc9306_device::erase(offs_t offset)
nmc9306_device::nmc9306_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NMC9306, "NMC9306", tag, owner, clock),
- device_nvram_interface(mconfig, *this),
- m_state(STATE_IDLE),
- m_ewen(false)
+ device_nvram_interface(mconfig, *this),
+ m_state(STATE_IDLE),
+ m_ewen(false)
{
}
diff --git a/src/emu/machine/nmc9306.h b/src/emu/machine/nmc9306.h
index 6658775d56e..9ae3243f647 100644
--- a/src/emu/machine/nmc9306.h
+++ b/src/emu/machine/nmc9306.h
@@ -50,8 +50,8 @@ class nmc9306_device : public device_t,
public device_nvram_interface
{
public:
- // construction/destruction
- nmc9306_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ nmc9306_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE_LINE_MEMBER( cs_w );
DECLARE_WRITE_LINE_MEMBER( sk_w );
@@ -59,8 +59,8 @@ public:
DECLARE_READ_LINE_MEMBER( do_r );
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
// device_nvram_interface overrides
virtual void nvram_default();
diff --git a/src/emu/machine/nscsi_bus.c b/src/emu/machine/nscsi_bus.c
index e964b6f12d8..38f72c2f3c7 100644
--- a/src/emu/machine/nscsi_bus.c
+++ b/src/emu/machine/nscsi_bus.c
@@ -40,31 +40,31 @@ void nscsi_bus_device::regen_ctrl(int refid)
if(0) {
logerror("%s: ctrl %c%c%c%c%c%c%c%c%c %s %04x -",
- tag(),
- ctrl & nscsi_device::S_RST ? 'R' : '.',
- ctrl & nscsi_device::S_ATN ? 'A' : '.',
- ctrl & nscsi_device::S_ACK ? 'K' : '.',
- ctrl & nscsi_device::S_REQ ? 'Q' : '.',
- ctrl & nscsi_device::S_SEL ? 'S' : '.',
- ctrl & nscsi_device::S_BSY ? 'B' : '.',
- ctrl & nscsi_device::S_MSG ? 'M' : '.',
- ctrl & nscsi_device::S_CTL ? 'C' : '.',
- ctrl & nscsi_device::S_INP ? 'I' : '.',
- phase[ctrl & 7],
- data);
+ tag(),
+ ctrl & nscsi_device::S_RST ? 'R' : '.',
+ ctrl & nscsi_device::S_ATN ? 'A' : '.',
+ ctrl & nscsi_device::S_ACK ? 'K' : '.',
+ ctrl & nscsi_device::S_REQ ? 'Q' : '.',
+ ctrl & nscsi_device::S_SEL ? 'S' : '.',
+ ctrl & nscsi_device::S_BSY ? 'B' : '.',
+ ctrl & nscsi_device::S_MSG ? 'M' : '.',
+ ctrl & nscsi_device::S_CTL ? 'C' : '.',
+ ctrl & nscsi_device::S_INP ? 'I' : '.',
+ phase[ctrl & 7],
+ data);
for(int i=0; i<devcnt; i++)
if(dev[i].ctrl) {
logerror(" %d=", i);
logerror("%s%s%s%s%s%s%s%s%s",
- dev[i].ctrl & nscsi_device::S_RST ? "R" : "",
- dev[i].ctrl & nscsi_device::S_ATN ? "A" : "",
- dev[i].ctrl & nscsi_device::S_ACK ? "K" : "",
- dev[i].ctrl & nscsi_device::S_REQ ? "Q" : "",
- dev[i].ctrl & nscsi_device::S_MSG ? "M" : "",
- dev[i].ctrl & nscsi_device::S_INP ? "I" : "",
- dev[i].ctrl & nscsi_device::S_CTL ? "C" : "",
- dev[i].ctrl & nscsi_device::S_SEL ? "S" : "",
- dev[i].ctrl & nscsi_device::S_BSY ? "B" : "");
+ dev[i].ctrl & nscsi_device::S_RST ? "R" : "",
+ dev[i].ctrl & nscsi_device::S_ATN ? "A" : "",
+ dev[i].ctrl & nscsi_device::S_ACK ? "K" : "",
+ dev[i].ctrl & nscsi_device::S_REQ ? "Q" : "",
+ dev[i].ctrl & nscsi_device::S_MSG ? "M" : "",
+ dev[i].ctrl & nscsi_device::S_INP ? "I" : "",
+ dev[i].ctrl & nscsi_device::S_CTL ? "C" : "",
+ dev[i].ctrl & nscsi_device::S_SEL ? "S" : "",
+ dev[i].ctrl & nscsi_device::S_BSY ? "B" : "");
}
logerror("\n");
}
@@ -209,8 +209,8 @@ void nscsi_full_device::step(bool timeout)
if(0)
logerror("%s: state=%d.%d %s\n",
- tag(), scsi_state & STATE_MASK, (scsi_state & SUB_MASK) >> SUB_SHIFT,
- timeout ? "timeout" : "change");
+ tag(), scsi_state & STATE_MASK, (scsi_state & SUB_MASK) >> SUB_SHIFT,
+ timeout ? "timeout" : "change");
switch(scsi_state & SUB_MASK ? scsi_state & SUB_MASK : scsi_state & STATE_MASK) {
case IDLE:
@@ -372,8 +372,8 @@ void nscsi_full_device::step(bool timeout)
default:
logerror("%s: step() unexpected state %d.%d\n",
- tag(),
- scsi_state & STATE_MASK, (scsi_state & SUB_MASK) >> SUB_SHIFT);
+ tag(),
+ scsi_state & STATE_MASK, (scsi_state & SUB_MASK) >> SUB_SHIFT);
exit(0);
}
}
@@ -675,4 +675,3 @@ attotime nscsi_full_device::scsi_fast_negation_period()
{
return attotime::from_nsec(30);
}
-
diff --git a/src/emu/machine/nscsi_bus.h b/src/emu/machine/nscsi_bus.h
index 644815c057f..b36915c1bd4 100644
--- a/src/emu/machine/nscsi_bus.h
+++ b/src/emu/machine/nscsi_bus.h
@@ -3,11 +3,11 @@
#include "emu.h"
-#define MCFG_NSCSI_BUS_ADD(_tag) \
+#define MCFG_NSCSI_BUS_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, NSCSI_BUS, 0)
-#define MCFG_NSCSI_ADD(_tag, _slot_intf, _def_slot, _def_inp, _def_config, _def_clock, _fixed) \
- MCFG_DEVICE_ADD(_tag, NSCSI_CONNECTOR, 0) \
+#define MCFG_NSCSI_ADD(_tag, _slot_intf, _def_slot, _def_inp, _def_config, _def_clock, _fixed) \
+ MCFG_DEVICE_ADD(_tag, NSCSI_CONNECTOR, 0) \
MCFG_DEVICE_SLOT_INTERFACE_FULL(_slot_intf, _def_slot, _def_inp, _def_config, _def_clock, _fixed)
class nscsi_device;
@@ -46,7 +46,7 @@ private:
};
class nscsi_connector: public device_t,
- public device_slot_interface
+ public device_slot_interface
{
public:
nscsi_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -59,7 +59,7 @@ protected:
};
class nscsi_device : public device_t,
- public device_slot_card_interface
+ public device_slot_card_interface
{
public:
// Here because the biggest users are the devices, not the bus
@@ -339,4 +339,3 @@ extern const device_type NSCSI_BUS;
extern const device_type NSCSI_CONNECTOR;
#endif
-
diff --git a/src/emu/machine/nscsi_cd.c b/src/emu/machine/nscsi_cd.c
index 3b2b73b2420..436b4a785a1 100644
--- a/src/emu/machine/nscsi_cd.c
+++ b/src/emu/machine/nscsi_cd.c
@@ -64,7 +64,7 @@ void nscsi_cdrom_device::scsi_command()
blocks = 256;
logerror("%s: command READ start=%08x blocks=%04x\n",
- tag(), lba, blocks);
+ tag(), lba, blocks);
scsi_data_in(2, blocks*bytes_per_sector);
scsi_status_complete(SS_GOOD);
@@ -73,8 +73,8 @@ void nscsi_cdrom_device::scsi_command()
case SC_INQUIRY: {
int lun = get_lun(scsi_cmdbuf[1] >> 5);
logerror("%s: command INQUIRY lun=%d EVPD=%d page=%d alloc=%02x link=%02x\n",
- tag(),
- lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]);
+ tag(),
+ lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]);
if(lun) {
bad_lun();
return;
@@ -112,7 +112,7 @@ void nscsi_cdrom_device::scsi_command()
logerror("%s: command READ CAPACITY\n", tag());
UINT32 temp = cdrom_get_track_start(cdrom, 0xaa);
- temp--; // return the last used block on the disc
+ temp--; // return the last used block on the disc
scsi_cmdbuf[0] = (temp>>24) & 0xff;
scsi_cmdbuf[1] = (temp>>16) & 0xff;
@@ -133,7 +133,7 @@ void nscsi_cdrom_device::scsi_command()
blocks = (scsi_cmdbuf[7] << 8) | scsi_cmdbuf[8];
logerror("%s: command READ EXTENDED start=%08x blocks=%04x\n",
- tag(), lba, blocks);
+ tag(), lba, blocks);
scsi_data_in(2, blocks*bytes_per_sector);
scsi_status_complete(SS_GOOD);
diff --git a/src/emu/machine/nscsi_hd.c b/src/emu/machine/nscsi_hd.c
index 6b2d7f1c2e2..bc61d296022 100644
--- a/src/emu/machine/nscsi_hd.c
+++ b/src/emu/machine/nscsi_hd.c
@@ -85,7 +85,7 @@ void nscsi_harddisk_device::scsi_command()
blocks = 256;
logerror("%s: command READ start=%08x blocks=%04x\n",
- tag(), lba, blocks);
+ tag(), lba, blocks);
scsi_data_in(2, blocks*bytes_per_sector);
scsi_status_complete(SS_GOOD);
@@ -94,8 +94,8 @@ void nscsi_harddisk_device::scsi_command()
case SC_INQUIRY: {
int lun = get_lun(scsi_cmdbuf[1] >> 5);
logerror("%s: command INQUIRY lun=%d EVPD=%d page=%d alloc=%02x link=%02x\n",
- tag(),
- lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]);
+ tag(),
+ lun, scsi_cmdbuf[1] & 1, scsi_cmdbuf[2], scsi_cmdbuf[4], scsi_cmdbuf[5]);
if(lun) {
bad_lun();
return;
@@ -126,8 +126,8 @@ void nscsi_harddisk_device::scsi_command()
case SC_MODE_SENSE_6: {
int lun = get_lun(scsi_cmdbuf[1] >> 5);
logerror("%s: command MODE SENSE 6 lun=%d page=%02x alloc=%02x link=%02x\n",
- tag(),
- lun, scsi_cmdbuf[2] & 0x3f, scsi_cmdbuf[4], scsi_cmdbuf[5]);
+ tag(),
+ lun, scsi_cmdbuf[2] & 0x3f, scsi_cmdbuf[4], scsi_cmdbuf[5]);
if(lun) {
bad_lun();
return;
@@ -262,7 +262,7 @@ void nscsi_harddisk_device::scsi_command()
blocks = (scsi_cmdbuf[7] << 8) | scsi_cmdbuf[8];
logerror("%s: command READ EXTENDED start=%08x blocks=%04x\n",
- tag(), lba, blocks);
+ tag(), lba, blocks);
scsi_data_in(2, blocks*bytes_per_sector);
scsi_status_complete(SS_GOOD);
@@ -273,7 +273,7 @@ void nscsi_harddisk_device::scsi_command()
blocks = (scsi_cmdbuf[7] << 8) | scsi_cmdbuf[8];
logerror("%s: command WRITE EXTENDED start=%08x blocks=%04x\n",
- tag(), lba, blocks);
+ tag(), lba, blocks);
scsi_data_out(2, blocks*bytes_per_sector);
scsi_status_complete(SS_GOOD);
diff --git a/src/emu/machine/nvram.c b/src/emu/machine/nvram.c
index 4bacf3047d9..864416d3426 100644
--- a/src/emu/machine/nvram.c
+++ b/src/emu/machine/nvram.c
@@ -55,10 +55,10 @@ const device_type NVRAM = &device_creator<nvram_device>;
nvram_device::nvram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NVRAM, "NVRAM", tag, owner, clock),
- device_nvram_interface(mconfig, *this),
- m_default_value(DEFAULT_ALL_1),
- m_base(NULL),
- m_length(0)
+ device_nvram_interface(mconfig, *this),
+ m_default_value(DEFAULT_ALL_1),
+ m_base(NULL),
+ m_length(0)
{
}
diff --git a/src/emu/machine/nvram.h b/src/emu/machine/nvram.h
index 81a231c6a76..e96c3aa79b2 100644
--- a/src/emu/machine/nvram.h
+++ b/src/emu/machine/nvram.h
@@ -100,7 +100,7 @@ typedef device_delegate<void (nvram_device &, void *, size_t)> nvram_init_delega
// ======================> nvram_device
-class nvram_device : public device_t,
+class nvram_device : public device_t,
public device_nvram_interface
{
public:
@@ -137,12 +137,12 @@ protected:
void determine_final_base();
// configuration state
- default_value m_default_value;
- nvram_init_delegate m_custom_handler;
+ default_value m_default_value;
+ nvram_init_delegate m_custom_handler;
// runtime state
- void * m_base;
- size_t m_length;
+ void * m_base;
+ size_t m_length;
};
diff --git a/src/emu/machine/pc16552d.c b/src/emu/machine/pc16552d.c
index 08d7d263a3f..bd941eb1f8e 100644
--- a/src/emu/machine/pc16552d.c
+++ b/src/emu/machine/pc16552d.c
@@ -8,31 +8,31 @@
#include "emu.h"
#include "pc16552d.h"
-#define REG_RECV_BUFFER 0x0 // Read
-#define REG_XMIT_HOLD 0x0 // Write
-#define REG_INT_ENABLE 0x1
-#define REG_FIFO_CTRL 0x2 // Write
-#define REG_LINE_CTRL 0x3
-#define REG_MODEL_CTRL 0x4
-#define REG_LINE_STATUS 0x5
-#define REG_MODEM_STATUS 0x6
-#define REG_SCRATCH 0x7
-#define REG_DIV_LATCH_LSB 0x0 // When DLAB == 1
-#define REG_DIV_LATCH_MSB 0x1 // When DLAB == 1
-#define REG_ALT_FUNCTION 0x2 // When DLAB == 1
-
-#define LINE_CTRL_DLAB 0x80
-
-#define IRQ_RX_LINE_STATUS 0x1
-#define IRQ_RX_DATA_AVAILABLE 0x2
-#define IRQ_CHARACTER_TIMEOUT 0x4
-#define IRQ_TX_HOLDING_REG_EMPTY 0x8
-#define IRQ_MODEM_STATUS 0x10
-
-#define INT_ENABLE_RX_DATA 0x01
-#define INT_ENABLE_TX_EMPTY 0x02
-#define INT_ENABLE_RX_LINE_STATUS 0x04
-#define INT_ENABLE_MODEM_STATUS 0x08
+#define REG_RECV_BUFFER 0x0 // Read
+#define REG_XMIT_HOLD 0x0 // Write
+#define REG_INT_ENABLE 0x1
+#define REG_FIFO_CTRL 0x2 // Write
+#define REG_LINE_CTRL 0x3
+#define REG_MODEL_CTRL 0x4
+#define REG_LINE_STATUS 0x5
+#define REG_MODEM_STATUS 0x6
+#define REG_SCRATCH 0x7
+#define REG_DIV_LATCH_LSB 0x0 // When DLAB == 1
+#define REG_DIV_LATCH_MSB 0x1 // When DLAB == 1
+#define REG_ALT_FUNCTION 0x2 // When DLAB == 1
+
+#define LINE_CTRL_DLAB 0x80
+
+#define IRQ_RX_LINE_STATUS 0x1
+#define IRQ_RX_DATA_AVAILABLE 0x2
+#define IRQ_CHARACTER_TIMEOUT 0x4
+#define IRQ_TX_HOLDING_REG_EMPTY 0x8
+#define IRQ_MODEM_STATUS 0x10
+
+#define INT_ENABLE_RX_DATA 0x01
+#define INT_ENABLE_TX_EMPTY 0x02
+#define INT_ENABLE_RX_LINE_STATUS 0x04
+#define INT_ENABLE_MODEM_STATUS 0x08
struct PC16552D_CHANNEL
{
@@ -58,7 +58,7 @@ struct PC16552D_REGS
void (* tx_callback)(running_machine &machine, int channel, int count, UINT8* data);
};
-#define MAX_PC16552D_CHIPS 4
+#define MAX_PC16552D_CHIPS 4
static PC16552D_REGS duart[MAX_PC16552D_CHIPS];
@@ -108,7 +108,7 @@ static void duart_push_rx_fifo(running_machine &machine, int chip, int channel,
if (ch->rx_fifo_num == rx_trigger_level[(ch->reg[REG_FIFO_CTRL] >> 6) & 3])
{
- ch->pending_interrupt |= IRQ_RX_DATA_AVAILABLE; // INT ID: received data available
+ ch->pending_interrupt |= IRQ_RX_DATA_AVAILABLE; // INT ID: received data available
check_interrupts(machine, chip, channel);
}
@@ -242,11 +242,11 @@ static UINT8 duart_r(running_machine &machine, int chip, int reg)
{
switch (i)
{
- case 0: r = 0x06; break; // Receiver Line Status
- case 1: r = 0x04; break; // Received Data Available
- case 2: r = 0x0c; break; // Character Timeout Indication
- case 3: r = 0x02; break; // Transmitter Holding Register Empty
- case 4: r = 0x00; break; // MODEM Status
+ case 0: r = 0x06; break; // Receiver Line Status
+ case 1: r = 0x04; break; // Received Data Available
+ case 2: r = 0x0c; break; // Character Timeout Indication
+ case 3: r = 0x02; break; // Transmitter Holding Register Empty
+ case 4: r = 0x00; break; // MODEM Status
}
break;
}
@@ -262,7 +262,7 @@ static UINT8 duart_r(running_machine &machine, int chip, int reg)
break;
}
- case 5: // Line Status Register
+ case 5: // Line Status Register
{
UINT8 r = 0;
@@ -370,13 +370,13 @@ static void duart_w(running_machine &machine, int chip, int reg, UINT8 data)
}
/*if (data & 0x1 && (ch->reg[reg] & 0x1) == 0)
- {
- // cause transmitter empty IRQ
- ch->pending_interrupt |= IRQ_TX_HOLDING_REG_EMPTY;
+ {
+ // cause transmitter empty IRQ
+ ch->pending_interrupt |= IRQ_TX_HOLDING_REG_EMPTY;
- check_interrupts(machine, chip, channel);
- }
- */
+ check_interrupts(machine, chip, channel);
+ }
+ */
}
break;
}
@@ -409,7 +409,7 @@ void pc16552d_init(running_machine &machine, int chip, int frequency, void (* ir
void pc16552d_rx_data(running_machine &machine, int chip, int channel, UINT8 data)
{
- if (duart[chip].ch[channel].reg[REG_FIFO_CTRL] & 0x01) // RCVR & XMIT FIFO enable
+ if (duart[chip].ch[channel].reg[REG_FIFO_CTRL] & 0x01) // RCVR & XMIT FIFO enable
{
duart_push_rx_fifo(machine, chip, channel, data);
}
diff --git a/src/emu/machine/pci.c b/src/emu/machine/pci.c
index 6917d4324c5..efdcf64e19c 100644
--- a/src/emu/machine/pci.c
+++ b/src/emu/machine/pci.c
@@ -72,7 +72,7 @@
#include "emu.h"
#include "machine/pci.h"
-#define LOG_PCI 0
+#define LOG_PCI 0
//**************************************************************************
// GLOBAL VARIABLES
@@ -88,7 +88,7 @@ const device_type PCI_BUS_LEGACY = &device_creator<pci_bus_legacy_device>;
// pci_bus_legacy_device - constructor
//-------------------------------------------------
pci_bus_legacy_device::pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
- device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock),
+ device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock),
m_father(NULL)
{
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
@@ -305,7 +305,7 @@ const device_type PCI_BUS = &device_creator<pci_bus_device>;
// pci_bus_device - constructor
//-------------------------------------------------
pci_bus_device::pci_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
- device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock),
+ device_t(mconfig, PCI_BUS, "PCI Bus", tag, owner, clock),
m_father(NULL)
{
for (int i = 0; i < ARRAY_LENGTH(m_devtag); i++) {
diff --git a/src/emu/machine/pci.h b/src/emu/machine/pci.h
index 3430cbfea68..c7d0d853516 100644
--- a/src/emu/machine/pci.h
+++ b/src/emu/machine/pci.h
@@ -21,8 +21,8 @@ typedef void (*pci_write_func)(device_t *pcibus, device_t *device, int function,
class pci_bus_legacy_device : public device_t
{
public:
- // construction/destruction
- pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ pci_bus_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER( write );
@@ -39,26 +39,26 @@ public:
void add_sibling(pci_bus_legacy_device *sibling, int busnum);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
virtual void device_reset();
- virtual void device_post_load();
+ virtual void device_post_load();
private:
- UINT8 m_busnum;
- const char * m_devtag[32];
- pci_read_func m_read_callback[32];
- pci_write_func m_write_callback[32];
- const char * m_father;
- device_t * m_device[32];
- pci_bus_legacy_device * m_siblings[8];
- UINT8 m_siblings_busnum[8];
- int m_siblings_count;
-
- offs_t m_address;
- INT8 m_devicenum; // device number we are addressing
- INT8 m_busnumber; // pci bus number we are addressing
- pci_bus_legacy_device * m_busnumaddr; // pci bus we are addressing
+ UINT8 m_busnum;
+ const char * m_devtag[32];
+ pci_read_func m_read_callback[32];
+ pci_write_func m_write_callback[32];
+ const char * m_father;
+ device_t * m_device[32];
+ pci_bus_legacy_device * m_siblings[8];
+ UINT8 m_siblings_busnum[8];
+ int m_siblings_count;
+
+ offs_t m_address;
+ INT8 m_devicenum; // device number we are addressing
+ INT8 m_busnumber; // pci bus number we are addressing
+ pci_bus_legacy_device * m_busnumaddr; // pci bus we are addressing
};
// device type definition
@@ -92,7 +92,7 @@ class pci_bus_device;
class pci_device_interface : public device_slot_card_interface
{
public:
- // construction/destruction
+ // construction/destruction
pci_device_interface(const machine_config &mconfig, device_t &device);
virtual ~pci_device_interface();
@@ -102,7 +102,7 @@ private:
};
class pci_connector: public device_t,
- public device_slot_interface
+ public device_slot_interface
{
public:
pci_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -121,8 +121,8 @@ extern const device_type PCI_CONNECTOR;
class pci_bus_device : public device_t
{
public:
- // construction/destruction
- pci_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ pci_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER( write );
@@ -139,26 +139,26 @@ public:
void add_sibling(pci_bus_device *sibling, int busnum);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
virtual void device_reset();
- virtual void device_post_load();
+ virtual void device_post_load();
private:
- UINT8 m_busnum;
+ UINT8 m_busnum;
- const char * m_devtag[32];
+ const char * m_devtag[32];
pci_device_interface *m_device[32];
- const char * m_father;
- pci_bus_device * m_siblings[8];
- UINT8 m_siblings_busnum[8];
- int m_siblings_count;
+ const char * m_father;
+ pci_bus_device * m_siblings[8];
+ UINT8 m_siblings_busnum[8];
+ int m_siblings_count;
- offs_t m_address;
- INT8 m_devicenum; // device number we are addressing
- INT8 m_busnumber; // pci bus number we are addressing
- pci_bus_device * m_busnumaddr; // pci bus we are addressing
+ offs_t m_address;
+ INT8 m_devicenum; // device number we are addressing
+ INT8 m_busnumber; // pci bus number we are addressing
+ pci_bus_device * m_busnumaddr; // pci bus we are addressing
};
// device type definition
diff --git a/src/emu/machine/pckeybrd.h b/src/emu/machine/pckeybrd.h
index 76c8366c505..5dbd5fb5397 100644
--- a/src/emu/machine/pckeybrd.h
+++ b/src/emu/machine/pckeybrd.h
@@ -31,5 +31,3 @@ INPUT_PORTS_EXTERN( pc_keyboard );
INPUT_PORTS_EXTERN( at_keyboard );
#endif /* PCKEYBRD_H */
-
-
diff --git a/src/emu/machine/pcshare.h b/src/emu/machine/pcshare.h
index a746f7a1982..cf6fcea23f7 100644
--- a/src/emu/machine/pcshare.h
+++ b/src/emu/machine/pcshare.h
@@ -1,6 +1,6 @@
/* flags for init_pc_common */
-#define PCCOMMON_KEYBOARD_PC 0
-#define PCCOMMON_KEYBOARD_AT 1
+#define PCCOMMON_KEYBOARD_PC 0
+#define PCCOMMON_KEYBOARD_AT 1
void init_pc_common(running_machine &machine, UINT32 flags, void (*set_keyb_int_func)(running_machine &, int));
diff --git a/src/emu/machine/pd4990a.c b/src/emu/machine/pd4990a.c
index 2b03dace165..88cd6bdaf97 100644
--- a/src/emu/machine/pd4990a.c
+++ b/src/emu/machine/pd4990a.c
@@ -40,9 +40,9 @@
CONSTANTS
***************************************************************************/
-#define DATA_BIT 0x01
-#define CLOCK_BIT 0x02
-#define END_BIT 0x04
+#define DATA_BIT 0x01
+#define CLOCK_BIT 0x02
+#define END_BIT 0x04
/***************************************************************************
TYPE DEFINITIONS
@@ -50,21 +50,21 @@
struct upd4990a_state
{
- int seconds; /* seconds BCD */
- int minutes; /* minutes BCD */
- int hours; /* hours BCD */
- int days; /* days BCD */
- int month; /* month Hexadecimal form */
- int year; /* year BCD */
- int weekday; /* weekday BCD */
+ int seconds; /* seconds BCD */
+ int minutes; /* minutes BCD */
+ int hours; /* hours BCD */
+ int days; /* days BCD */
+ int month; /* month Hexadecimal form */
+ int year; /* year BCD */
+ int weekday; /* weekday BCD */
UINT32 shiftlo;
UINT32 shifthi;
- int retraces; /* Assumes 60 retraces a second */
+ int retraces; /* Assumes 60 retraces a second */
int testwaits;
- int maxwaits; /* Switch test every frame*/
- int testbit; /* Pulses a bit in order to simulate test output */
+ int maxwaits; /* Switch test every frame*/
+ int testbit; /* Pulses a bit in order to simulate test output */
int outputbit;
int bitno;
@@ -72,7 +72,7 @@ struct upd4990a_state
INT8 writing;
int clock_line;
- int command_line; //??
+ int command_line; //??
};
@@ -314,9 +314,9 @@ static void upd4990a_resetbitstream( device_t *device )
static void upd4990a_writebit( device_t *device , UINT8 bit )
{
upd4990a_state *upd4990a = get_safe_token(device);
- if (upd4990a->bitno <= 31) //low part
+ if (upd4990a->bitno <= 31) //low part
upd4990a->shiftlo |= bit << upd4990a->bitno;
- else //high part
+ else //high part
upd4990a->shifthi |= bit << (upd4990a->bitno - 32);
}
@@ -382,24 +382,24 @@ static void upd4990a_process_command( device_t *device )
switch(upd4990a_getcommand(device))
{
- case 0x1: //load output register
+ case 0x1: //load output register
upd4990a->bitno = 0;
if (upd4990a->reading)
- upd4990a_readbit(device); //prepare first bit
+ upd4990a_readbit(device); //prepare first bit
upd4990a->shiftlo = 0;
upd4990a->shifthi = 0;
break;
case 0x2:
- upd4990a->writing = 0; //store register to current date
+ upd4990a->writing = 0; //store register to current date
upd4990a_update_date(device);
break;
- case 0x3: //start reading
+ case 0x3: //start reading
upd4990a->reading = 1;
break;
- case 0x7: //switch testbit every frame
+ case 0x7: //switch testbit every frame
upd4990a->maxwaits = 1;
break;
- case 0x8: //switch testbit every half-second
+ case 0x8: //switch testbit every half-second
upd4990a->maxwaits = 30;
break;
}
@@ -421,7 +421,7 @@ static void upd4990a_serial_control( device_t *device, UINT8 data )
}
upd4990a->command_line = data & END_BIT;
- if(upd4990a->clock_line && !(data & CLOCK_BIT)) //clock lower edge
+ if(upd4990a->clock_line && !(data & CLOCK_BIT)) //clock lower edge
{
upd4990a_writebit(device, data & DATA_BIT);
upd4990a_nextbit(device);
@@ -555,5 +555,3 @@ void upd4990a_old_device::device_reset()
{
DEVICE_RESET_NAME( upd4990a )(this);
}
-
-
diff --git a/src/emu/machine/pd4990a.h b/src/emu/machine/pd4990a.h
index 98f42f52bc5..66e476d51da 100644
--- a/src/emu/machine/pd4990a.h
+++ b/src/emu/machine/pd4990a.h
@@ -53,4 +53,4 @@ extern DECLARE_READ8_DEVICE_HANDLER( upd4990a_databit_r );
extern DECLARE_WRITE16_DEVICE_HANDLER( upd4990a_control_16_w );
-#endif /*__PD4990A_H__*/
+#endif /*__PD4990A_H__*/
diff --git a/src/emu/machine/pic8259.c b/src/emu/machine/pic8259.c
index 81780ceb9ab..a5f31539499 100644
--- a/src/emu/machine/pic8259.c
+++ b/src/emu/machine/pic8259.c
@@ -14,11 +14,11 @@
#include "emu.h"
#include "machine/pic8259.h"
-#define IRQ_COUNT 8
+#define IRQ_COUNT 8
-#define LOG_ICW 0
-#define LOG_OCW 0
-#define LOG_GENERAL 0
+#define LOG_ICW 0
+#define LOG_OCW 0
+#define LOG_GENERAL 0
enum pic8259_state_t
{
@@ -82,7 +82,7 @@ INLINE pic8259_t *get_safe_token(device_t *device) {
static TIMER_CALLBACK( pic8259_timerproc )
{
device_t *device = (device_t *)ptr;
- pic8259_t *pic8259 = get_safe_token(device);
+ pic8259_t *pic8259 = get_safe_token(device);
int irq;
UINT8 mask;
@@ -122,7 +122,7 @@ INLINE void pic8259_set_timer(pic8259_t *pic8259)
static void pic8259_set_irq_line(device_t *device, int irq, int state)
{
- pic8259_t *pic8259 = get_safe_token(device);
+ pic8259_t *pic8259 = get_safe_token(device);
UINT8 mask = (1 << irq);
if (state)
@@ -167,7 +167,7 @@ WRITE_LINE_MEMBER( pic8259_device::ir7_w ) { pic8259_set_irq_line(this, 7, state
int pic8259_acknowledge(device_t *device)
{
- pic8259_t *pic8259 = get_safe_token(device);
+ pic8259_t *pic8259 = get_safe_token(device);
UINT8 mask;
int irq;
@@ -209,7 +209,7 @@ int pic8259_acknowledge(device_t *device)
READ8_DEVICE_HANDLER( pic8259_r )
{
- pic8259_t *pic8259 = get_safe_token(device);
+ pic8259_t *pic8259 = get_safe_token(device);
/* NPW 18-May-2003 - Changing 0xFF to 0x00 as per Ruslan */
UINT8 data = 0x00;
@@ -269,7 +269,7 @@ READ8_MEMBER( pic8259_device::read )
WRITE8_DEVICE_HANDLER( pic8259_w )
{
- pic8259_t *pic8259 = get_safe_token(device);
+ pic8259_t *pic8259 = get_safe_token(device);
switch(offset)
{
@@ -280,15 +280,15 @@ WRITE8_DEVICE_HANDLER( pic8259_w )
if (LOG_ICW)
logerror("pic8259_w(): ICW1; data=0x%02X\n", data);
- pic8259->imr = 0x00;
- pic8259->isr = 0x00;
- pic8259->irr = 0x00;
- pic8259->level_trig_mode = (data & 0x08) ? 1 : 0;
- pic8259->vector_size = (data & 0x04) ? 1 : 0;
- pic8259->cascade = (data & 0x02) ? 0 : 1;
- pic8259->icw4_needed = (data & 0x01) ? 1 : 0;
- pic8259->vector_addr_low = (data & 0xe0);
- pic8259->state = STATE_ICW2;
+ pic8259->imr = 0x00;
+ pic8259->isr = 0x00;
+ pic8259->irr = 0x00;
+ pic8259->level_trig_mode = (data & 0x08) ? 1 : 0;
+ pic8259->vector_size = (data & 0x04) ? 1 : 0;
+ pic8259->cascade = (data & 0x02) ? 0 : 1;
+ pic8259->icw4_needed = (data & 0x01) ? 1 : 0;
+ pic8259->vector_addr_low = (data & 0xe0);
+ pic8259->state = STATE_ICW2;
pic8259->out_int_func(0);
}
else if (pic8259->state == STATE_READY)
@@ -395,7 +395,7 @@ WRITE8_DEVICE_HANDLER( pic8259_w )
if (LOG_ICW)
logerror("pic8259_w(): ICW4; data=0x%02X\n", data);
- pic8259->nested = (data & 0x10) ? 1 : 0;
+ pic8259->nested = (data & 0x10) ? 1 : 0;
pic8259->mode = (data >> 2) & 3;
pic8259->auto_eoi = (data & 0x02) ? 1 : 0;
pic8259->is_x86 = (data & 0x01) ? 1 : 0;
@@ -412,7 +412,7 @@ WRITE8_DEVICE_HANDLER( pic8259_w )
break;
}
break;
- }
+ }
pic8259_set_timer(pic8259);
}
@@ -425,7 +425,7 @@ WRITE8_MEMBER( pic8259_device::write )
static DEVICE_START( pic8259 )
{
- pic8259_t *pic8259 = get_safe_token(device);
+ pic8259_t *pic8259 = get_safe_token(device);
const struct pic8259_interface *intf = (const struct pic8259_interface *)device->static_config();
assert(intf != NULL);
@@ -440,7 +440,7 @@ static DEVICE_START( pic8259 )
static DEVICE_RESET( pic8259 ) {
- pic8259_t *pic8259 = get_safe_token(device);
+ pic8259_t *pic8259 = get_safe_token(device);
pic8259->state = STATE_READY;
pic8259->isr = 0;
@@ -501,5 +501,3 @@ void pic8259_device::device_reset()
{
DEVICE_RESET_NAME( pic8259 )(this);
}
-
-
diff --git a/src/emu/machine/pit8253.c b/src/emu/machine/pit8253.c
index e3360a6a59f..0be424d8ec3 100644
--- a/src/emu/machine/pit8253.c
+++ b/src/emu/machine/pit8253.c
@@ -29,13 +29,13 @@
***************************************************************************/
-#define MAX_TIMER 3
-#define VERBOSE 0
+#define MAX_TIMER 3
+#define VERBOSE 0
-#define LOG1(msg) do { if (VERBOSE >= 1) logerror msg; } while (0)
-#define LOG2(msg) do { if (VERBOSE >= 2) logerror msg; } while (0)
+#define LOG1(msg) do { if (VERBOSE >= 1) logerror msg; } while (0)
+#define LOG2(msg) do { if (VERBOSE >= 2) logerror msg; } while (0)
-#define CYCLES_NEVER ((UINT32) -1)
+#define CYCLES_NEVER ((UINT32) -1)
/* device types */
enum {
@@ -52,46 +52,46 @@ static const char * const device_tags[NUM_TYPES] = { "pit8253", "pit8254" };
struct pit8253_timer
{
- int index; /* index number of the timer */
- double clockin; /* input clock frequency in Hz */
- int clock; /* clock signal when clockin is 0 */
-
- devcb_resolved_read_line in_gate_func; /* callback for gate input */
- devcb_resolved_write_line out_out_func; /* callback function for when output changes */
-
- attotime last_updated; /* time when last updated */
-
- emu_timer *updatetimer; /* MAME timer to process updates */
-
- UINT16 value; /* current counter value ("CE" in Intel docs) */
- UINT16 latch; /* latched counter value ("OL" in Intel docs) */
- UINT16 count; /* new counter value ("CR" in Intel docs) */
- UINT8 control; /* 6-bit control byte */
- UINT8 status; /* status byte - 8254 only */
- UINT8 lowcount; /* LSB of new counter value for 16-bit writes */
- INT32 rmsb; /* 1 = Next read is MSB of 16-bit value */
- INT32 wmsb; /* 1 = Next write is MSB of 16-bit value */
- INT32 output; /* 0 = low, 1 = high */
-
- INT32 gate; /* gate input (0 = low, 1 = high) */
- INT32 latched_count; /* number of bytes of count latched */
- INT32 latched_status; /* 1 = status latched (8254 only) */
- INT32 null_count; /* 1 = mode control or count written, 0 = count loaded */
- INT32 phase; /* see phase definition tables in simulate2(), below */
-
- UINT32 cycles_to_output; /* cycles until output callback called */
+ int index; /* index number of the timer */
+ double clockin; /* input clock frequency in Hz */
+ int clock; /* clock signal when clockin is 0 */
+
+ devcb_resolved_read_line in_gate_func; /* callback for gate input */
+ devcb_resolved_write_line out_out_func; /* callback function for when output changes */
+
+ attotime last_updated; /* time when last updated */
+
+ emu_timer *updatetimer; /* MAME timer to process updates */
+
+ UINT16 value; /* current counter value ("CE" in Intel docs) */
+ UINT16 latch; /* latched counter value ("OL" in Intel docs) */
+ UINT16 count; /* new counter value ("CR" in Intel docs) */
+ UINT8 control; /* 6-bit control byte */
+ UINT8 status; /* status byte - 8254 only */
+ UINT8 lowcount; /* LSB of new counter value for 16-bit writes */
+ INT32 rmsb; /* 1 = Next read is MSB of 16-bit value */
+ INT32 wmsb; /* 1 = Next write is MSB of 16-bit value */
+ INT32 output; /* 0 = low, 1 = high */
+
+ INT32 gate; /* gate input (0 = low, 1 = high) */
+ INT32 latched_count; /* number of bytes of count latched */
+ INT32 latched_status; /* 1 = status latched (8254 only) */
+ INT32 null_count; /* 1 = mode control or count written, 0 = count loaded */
+ INT32 phase; /* see phase definition tables in simulate2(), below */
+
+ UINT32 cycles_to_output; /* cycles until output callback called */
};
-struct pit8253_t
+struct pit8253_t
{
const pit8253_config *config;
- int device_type;
+ int device_type;
pit8253_timer timers[MAX_TIMER];
};
-#define CTRL_ACCESS(control) (((control) >> 4) & 0x03)
-#define CTRL_MODE(control) (((control) >> 1) & (((control) & 0x04) ? 0x03 : 0x07))
-#define CTRL_BCD(control) (((control) >> 0) & 0x01)
+#define CTRL_ACCESS(control) (((control) >> 4) & 0x03)
+#define CTRL_MODE(control) (((control) >> 1) & (((control) & 0x04) ? 0x03 : 0x07))
+#define CTRL_BCD(control) (((control) >> 0) & 0x01)
/***************************************************************************
@@ -110,7 +110,7 @@ INLINE pit8253_t *get_safe_token(device_t *device)
}
-static pit8253_timer *get_timer(pit8253_t *pit,int which)
+static pit8253_timer *get_timer(pit8253_t *pit,int which)
{
which &= 3;
if (which < MAX_TIMER)
@@ -131,49 +131,49 @@ static int pit8253_gate(pit8253_timer *timer)
INLINE UINT32 decimal_from_bcd(UINT16 val)
{
/* In BCD mode, a nybble loaded with value A-F counts down the same as in
- binary mode, but wraps around to 9 instead of F after 0, so loading the
- count register with 0xFFFF gives a period of
- 0xF - for the units to count down to 0
- + 10*0xF - for the tens to count down to 0
- + 100*0xF - for the hundreds to count down to 0
- + 1000*0xF - for the thousands to count down to 0
- = 16665 cycles
- */
+ binary mode, but wraps around to 9 instead of F after 0, so loading the
+ count register with 0xFFFF gives a period of
+ 0xF - for the units to count down to 0
+ + 10*0xF - for the tens to count down to 0
+ + 100*0xF - for the hundreds to count down to 0
+ + 1000*0xF - for the thousands to count down to 0
+ = 16665 cycles
+ */
return
- ((val>>12) & 0xF) * 1000 +
- ((val>> 8) & 0xF) * 100 +
- ((val>> 4) & 0xF) * 10 +
- ( val & 0xF);
+ ((val>>12) & 0xF) * 1000 +
+ ((val>> 8) & 0xF) * 100 +
+ ((val>> 4) & 0xF) * 10 +
+ ( val & 0xF);
}
-static UINT32 adjusted_count(int bcd,UINT16 val)
+static UINT32 adjusted_count(int bcd,UINT16 val)
{
- if (bcd == 0)
- return val == 0 ? 0x10000 : val;
- return val == 0 ? 10000 : decimal_from_bcd(val);
+ if (bcd == 0)
+ return val == 0 ? 0x10000 : val;
+ return val == 0 ? 10000 : decimal_from_bcd(val);
}
/* This function subtracts 1 from timer->value "cycles" times, taking into
account binary or BCD operation, and wrapping around from 0 to 0xFFFF or
0x9999 as necessary. */
-static void decrease_counter_value(pit8253_timer *timer,UINT64 cycles)
+static void decrease_counter_value(pit8253_timer *timer,UINT64 cycles)
{
UINT16 value;
int units, tens, hundreds, thousands;
- if (CTRL_BCD(timer->control) == 0)
+ if (CTRL_BCD(timer->control) == 0)
{
- timer->value -= (cycles & 0xFFFF);
+ timer->value -= (cycles & 0xFFFF);
return;
}
value = timer->value;
- units = value & 0xF;
- tens = (value >> 4) & 0xF;
- hundreds = (value >> 8) & 0xF;
- thousands = (value >> 12) & 0xF;
+ units = value & 0xF;
+ tens = (value >> 4) & 0xF;
+ hundreds = (value >> 8) & 0xF;
+ thousands = (value >> 12) & 0xF;
if (cycles <= units)
{
@@ -182,12 +182,12 @@ static void decrease_counter_value(pit8253_timer *timer,UINT64 cycles)
else
{
cycles -= units;
- units = (10 - cycles%10)%10;
+ units = (10 - cycles%10)%10;
cycles =(cycles+9)/10; /* the +9 is so we get a carry if cycles%10 wasn't 0 */
if (cycles <= tens)
{
- tens -= cycles;
+ tens -= cycles;
}
else
{
@@ -197,19 +197,19 @@ static void decrease_counter_value(pit8253_timer *timer,UINT64 cycles)
cycles = (cycles+9) / 10;
if (cycles <= hundreds)
{
- hundreds -= cycles;
+ hundreds -= cycles;
}
else
{
cycles -= hundreds;
hundreds = (10 - cycles%10)%10;
cycles=(cycles+9)/10;
- thousands = (10 + thousands - cycles%10)%10;
+ thousands = (10 + thousands - cycles%10)%10;
}
}
}
- timer->value = (thousands << 12) | (hundreds << 8) | (tens << 4) | units;
+ timer->value = (thousands << 12) | (hundreds << 8) | (tens << 4) | units;
}
@@ -223,11 +223,11 @@ static void load_counter_value(device_t *device, pit8253_timer *timer)
}
-static void set_output(device_t *device, pit8253_timer *timer,int output)
+static void set_output(device_t *device, pit8253_timer *timer,int output)
{
if (output != timer->output)
{
- timer->output = output;
+ timer->output = output;
timer->out_out_func(timer->output);
}
}
@@ -235,38 +235,38 @@ static void set_output(device_t *device, pit8253_timer *timer,int output)
/* This emulates timer "timer" for "elapsed_cycles" cycles and assumes no
callbacks occur during that time. */
-static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycles)
+static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycles)
{
UINT32 adjusted_value;
- int bcd = CTRL_BCD(timer->control);
- int mode = CTRL_MODE(timer->control);
- int cycles_to_output = 0;
+ int bcd = CTRL_BCD(timer->control);
+ int mode = CTRL_MODE(timer->control);
+ int cycles_to_output = 0;
LOG2(("pit8253: simulate2(): simulating %d cycles for %d in mode %d, bcd = %d, phase = %d, gate = %d, output %d, value = 0x%04x\n",
- (int)elapsed_cycles,timer->index,mode,bcd,timer->phase,pit8253_gate(timer),timer->output,timer->value));
+ (int)elapsed_cycles,timer->index,mode,bcd,timer->phase,pit8253_gate(timer),timer->output,timer->value));
switch (mode) {
case 0:
/* Mode 0: (Interrupt on Terminal Count)
- +------------------
- |
- ----------+
- <- n+1 ->
+ +------------------
+ |
+ ----------+
+ <- n+1 ->
- ^
- +- counter load
+ ^
+ +- counter load
- phase|output|length |value|next|comment
- -----+------+--------+-----+----+----------------------------------
- 0|low |infinity| |1 |waiting for count
- 1|low |1 | |2 |internal delay when counter loaded
- 2|low |n |n..1 |3 |counting down
- 3|high |infinity|0..1 |3 |counting down
+ phase|output|length |value|next|comment
+ -----+------+--------+-----+----+----------------------------------
+ 0|low |infinity| |1 |waiting for count
+ 1|low |1 | |2 |internal delay when counter loaded
+ 2|low |n |n..1 |3 |counting down
+ 3|high |infinity|0..1 |3 |counting down
- Gate level sensitive only. Low disables counting, high enables it. */
+ Gate level sensitive only. Low disables counting, high enables it. */
- if (timer->phase == 0)
+ if (timer->phase == 0)
{
cycles_to_output = CYCLES_NEVER;
}
@@ -288,7 +288,7 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
}
else
{
- if (timer->phase == 2)
+ if (timer->phase == 2)
{
adjusted_value = adjusted_count(bcd,timer->value);
if (elapsed_cycles >= adjusted_value)
@@ -305,9 +305,9 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
switch( timer->phase )
{
- case 1: cycles_to_output = 1; break;
- case 2: cycles_to_output = adjusted_count( bcd, timer->value ); break;
- case 3: cycles_to_output = adjusted_count( bcd, timer->value ); break;
+ case 1: cycles_to_output = 1; break;
+ case 2: cycles_to_output = adjusted_count( bcd, timer->value ); break;
+ case 3: cycles_to_output = adjusted_count( bcd, timer->value ); break;
}
}
}
@@ -317,23 +317,23 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
case 1:
/* Mode 1: (Hardware Retriggerable One-Shot a.k.a. Programmable One-Shot)
- -----+ +------------------
- | |
- +-------+
- <- n ->
+ -----+ +------------------
+ | |
+ +-------+
+ <- n ->
- ^
- +- trigger
+ ^
+ +- trigger
- phase|output|length |value|next|comment
- -----+------+--------+-----+----+----------------------------------
- 0|high |infinity| |1 |counting down
- 1|high |1 | |2 |internal delay to load counter
- 2|low |n |n..1 |3 |counting down
- 3|high |infinity|0..1 |3 |counting down
+ phase|output|length |value|next|comment
+ -----+------+--------+-----+----+----------------------------------
+ 0|high |infinity| |1 |counting down
+ 1|high |1 | |2 |internal delay to load counter
+ 2|low |n |n..1 |3 |counting down
+ 3|high |infinity|0..1 |3 |counting down
- Gate rising-edge sensitive only.
- Rising edge initiates counting and resets output after next clock. */
+ Gate rising-edge sensitive only.
+ Rising edge initiates counting and resets output after next clock. */
if ( elapsed_cycles >= 0 && timer->phase == 1 )
{
@@ -361,9 +361,9 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
switch( timer->phase )
{
- case 1: cycles_to_output = 1; break;
- case 2: cycles_to_output = adjusted_count( bcd, timer->value ); break;
- default: cycles_to_output = CYCLES_NEVER; break;
+ case 1: cycles_to_output = 1; break;
+ case 2: cycles_to_output = adjusted_count( bcd, timer->value ); break;
+ default: cycles_to_output = CYCLES_NEVER; break;
}
break;
@@ -371,29 +371,29 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
case 2:
/* Mode 2: (Rate Generator)
- --------------+ +---------+ +----
- | | | |
- +-+ +-+
- <- n -X- n ->
- <1>
- ^
- +- counter load or trigger
-
- phase|output|length |value|next|comment
- -----+------+--------+-----+----+----------------------------------
- 0|high |infinity| |1 |waiting for count
- 1|high |1 | |2 |internal delay to load counter
- 2|high |n |n..2 |3 |counting down
- 3|low |1 |1 |2 |reload counter
-
- Counter rewrite has no effect until repeated
-
- Gate rising-edge and level sensitive.
- Gate low disables counting and sets output immediately high.
- Rising-edge reloads count and initiates counting
- Gate high enables counting. */
-
- if (pit8253_gate(timer) == 0 || timer->phase == 0)
+ --------------+ +---------+ +----
+ | | | |
+ +-+ +-+
+ <- n -X- n ->
+ <1>
+ ^
+ +- counter load or trigger
+
+ phase|output|length |value|next|comment
+ -----+------+--------+-----+----+----------------------------------
+ 0|high |infinity| |1 |waiting for count
+ 1|high |1 | |2 |internal delay to load counter
+ 2|high |n |n..2 |3 |counting down
+ 3|low |1 |1 |2 |reload counter
+
+ Counter rewrite has no effect until repeated
+
+ Gate rising-edge and level sensitive.
+ Gate low disables counting and sets output immediately high.
+ Rising-edge reloads count and initiates counting
+ Gate high enables counting. */
+
+ if (pit8253_gate(timer) == 0 || timer->phase == 0)
{
/* Gate low or mode control write forces output high */
set_output(device, timer, 1);
@@ -441,8 +441,8 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
switch( timer->phase )
{
- case 1: cycles_to_output = 1; break;
- default: cycles_to_output = (timer->value == 1 ? 1 : (adjusted_count(bcd,timer->value) - 1));
+ case 1: cycles_to_output = 1; break;
+ default: cycles_to_output = (timer->value == 1 ? 1 : (adjusted_count(bcd,timer->value) - 1));
}
}
break;
@@ -451,28 +451,28 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
case 3:
/* Mode 3: (Square Wave Generator)
- ----------------+ +-----------+ +----
- | | | |
- +-----------+ +-----------+
- <- (n+1)/2 -X- n/2 ->
- ^
- +- counter load or trigger
+ ----------------+ +-----------+ +----
+ | | | |
+ +-----------+ +-----------+
+ <- (n+1)/2 -X- n/2 ->
+ ^
+ +- counter load or trigger
- phase|output|length |value|next|comment
- -----+------+--------+-----+----+----------------------------------
- 0|high |infinity| |1 |waiting for count
- 1|high |1 | |2 |internal delay to load counter
- 2|high |n/2(+1) |n..0 |3 |counting down double speed, reload counter
- 3|low |n/2 |n..0 |2 |counting down double speed, reload counter
+ phase|output|length |value|next|comment
+ -----+------+--------+-----+----+----------------------------------
+ 0|high |infinity| |1 |waiting for count
+ 1|high |1 | |2 |internal delay to load counter
+ 2|high |n/2(+1) |n..0 |3 |counting down double speed, reload counter
+ 3|low |n/2 |n..0 |2 |counting down double speed, reload counter
- Counter rewrite has no effect until repeated (output falling or rising)
+ Counter rewrite has no effect until repeated (output falling or rising)
- Gate rising-edge and level sensitive.
- Gate low disables counting and sets output immediately high.
- Rising-edge reloads count and initiates counting
- Gate high enables counting. */
+ Gate rising-edge and level sensitive.
+ Gate low disables counting and sets output immediately high.
+ Rising-edge reloads count and initiates counting
+ Gate high enables counting. */
- if (pit8253_gate(timer) == 0 || timer->phase == 0)
+ if (pit8253_gate(timer) == 0 || timer->phase == 0)
{
/* Gate low or mode control write forces output high */
set_output(device, timer, 1);
@@ -515,14 +515,14 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
}
}
while( ( timer->phase == 2 && elapsed_cycles >= ( ( adjusted_value + 1 ) >> 1 ) ) ||
- ( timer->phase == 3 && elapsed_cycles >= ( adjusted_value >> 1 ) ) );
+ ( timer->phase == 3 && elapsed_cycles >= ( adjusted_value >> 1 ) ) );
decrease_counter_value(timer,elapsed_cycles<<1);
switch( timer->phase )
{
- case 1: cycles_to_output = 1; break;
- case 2: cycles_to_output = ( adjusted_count( bcd, timer->value ) + 1 ) >> 1; break;
- case 3: cycles_to_output = adjusted_count( bcd, timer->value ) >> 1; break;
+ case 1: cycles_to_output = 1; break;
+ case 2: cycles_to_output = ( adjusted_count( bcd, timer->value ) + 1 ) >> 1; break;
+ case 3: cycles_to_output = adjusted_count( bcd, timer->value ) >> 1; break;
}
}
}
@@ -532,30 +532,30 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
case 4:
case 5:
/* Mode 4: (Software Trigger Strobe)
- Mode 5: (Hardware Trigger Strobe)
-
- --------------+ +--------------------
- | |
- +-+
- <- n+1 ->
- ^ <1>
- +- counter load (mode 4) or trigger (mode 5)
-
- phase|output|length |value|next|comment
- -----+------+--------+-----+----+----------------------------------
- 0|high |infinity|0..1 |0 |waiting for count/counting down
- 1|high |1 | |2 |internal delay when counter loaded
- 2|high |n |n..1 |3 |counting down
- 3|low |1 |0 |0 |strobe
-
- Mode 4 only: counter rewrite loads new counter
- Mode 5 only: count not reloaded immediately.
- Mode control write doesn't stop count but sets output high
-
- Mode 4 only: Gate level sensitive only. Low disables counting, high enables it.
- Mode 5 only: Gate rising-edge sensitive only. Rising edge initiates counting */
-
- if (pit8253_gate(timer) == 0 && mode == 4)
+ Mode 5: (Hardware Trigger Strobe)
+
+ --------------+ +--------------------
+ | |
+ +-+
+ <- n+1 ->
+ ^ <1>
+ +- counter load (mode 4) or trigger (mode 5)
+
+ phase|output|length |value|next|comment
+ -----+------+--------+-----+----+----------------------------------
+ 0|high |infinity|0..1 |0 |waiting for count/counting down
+ 1|high |1 | |2 |internal delay when counter loaded
+ 2|high |n |n..1 |3 |counting down
+ 3|low |1 |0 |0 |strobe
+
+ Mode 4 only: counter rewrite loads new counter
+ Mode 5 only: count not reloaded immediately.
+ Mode control write doesn't stop count but sets output high
+
+ Mode 4 only: Gate level sensitive only. Low disables counting, high enables it.
+ Mode 5 only: Gate rising-edge sensitive only. Rising edge initiates counting */
+
+ if (pit8253_gate(timer) == 0 && mode == 4)
{
cycles_to_output = CYCLES_NEVER;
}
@@ -596,16 +596,16 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
switch( timer->phase )
{
- case 1: cycles_to_output = 1; break;
- case 2: cycles_to_output = adjusted_count( bcd, timer->value ); break;
- case 3: cycles_to_output = 1; break;
+ case 1: cycles_to_output = 1; break;
+ case 2: cycles_to_output = adjusted_count( bcd, timer->value ); break;
+ case 3: cycles_to_output = 1; break;
}
}
break;
}
- timer->cycles_to_output = cycles_to_output;
- if (cycles_to_output == CYCLES_NEVER || timer->clockin == 0)
+ timer->cycles_to_output = cycles_to_output;
+ if (cycles_to_output == CYCLES_NEVER || timer->clockin == 0)
{
timer->updatetimer->adjust(attotime::never, timer->index);
}
@@ -616,8 +616,8 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
timer->updatetimer->adjust(next_fire_time - device->machine().time(), timer->index );
}
- LOG2(("pit8253: simulate2(): simulating %d cycles for %d in mode %d, bcd = %d, phase = %d, gate = %d, output %d, value = 0x%04x, cycles_to_output = %04x\n",
- (int)elapsed_cycles,timer->index,mode,bcd,timer->phase,pit8253_gate(timer),timer->output,timer->value,cycles_to_output));
+ LOG2(("pit8253: simulate2(): simulating %d cycles for %d in mode %d, bcd = %d, phase = %d, gate = %d, output %d, value = 0x%04x, cycles_to_output = %04x\n",
+ (int)elapsed_cycles,timer->index,mode,bcd,timer->phase,pit8253_gate(timer),timer->output,timer->value,cycles_to_output));
}
@@ -638,7 +638,7 @@ static void simulate2(device_t *device, pit8253_timer *timer, INT64 elapsed_cycl
inaccurate by more than one cycle, and the output changed multiple
times during the discrepancy. In practice updates should still be O(1).
*/
-static void simulate(device_t *device, pit8253_timer *timer, INT64 elapsed_cycles)
+static void simulate(device_t *device, pit8253_timer *timer, INT64 elapsed_cycles)
{
if ( elapsed_cycles > 0 )
simulate2(device, timer, elapsed_cycles);
@@ -649,19 +649,19 @@ static void simulate(device_t *device, pit8253_timer *timer, INT64 elapsed_cycle
/* This brings timer "timer" up to date */
-static void update(device_t *device, pit8253_timer *timer)
+static void update(device_t *device, pit8253_timer *timer)
{
/* With the 82C54's maximum clockin of 10MHz, 64 bits is nearly 60,000
- years of time. Should be enough for now. */
- attotime now = device->machine().time();
+ years of time. Should be enough for now. */
+ attotime now = device->machine().time();
attotime elapsed_time = now - timer->last_updated;
- INT64 elapsed_cycles = elapsed_time.as_double() * timer->clockin;
+ INT64 elapsed_cycles = elapsed_time.as_double() * timer->clockin;
LOG1(("pit8253: update(): timer %d, %" I64FMT "d elapsed_cycles\n", timer->index, elapsed_cycles));
if ( timer->clockin )
{
- timer->last_updated += elapsed_cycles * attotime::from_hz(timer->clockin);
+ timer->last_updated += elapsed_cycles * attotime::from_hz(timer->clockin);
}
else
{
@@ -675,7 +675,7 @@ static void update(device_t *device, pit8253_timer *timer)
static TIMER_CALLBACK( update_timer_cb )
{
device_t *device = (device_t *)ptr;
- pit8253_t *pit8253 = get_safe_token(device);
+ pit8253_t *pit8253 = get_safe_token(device);
pit8253_timer *timer = get_timer(pit8253,param);
LOG2(("pit8253: output_changed(): timer %d\n",param));
@@ -687,12 +687,12 @@ static TIMER_CALLBACK( update_timer_cb )
/* We recycle bit 0 of timer->value to hold the phase in mode 3 when count is
odd. Since read commands in mode 3 always return even numbers, we need to
mask this bit off. */
-static UINT16 masked_value(pit8253_timer *timer)
+static UINT16 masked_value(pit8253_timer *timer)
{
LOG2(("pit8253: masked_value\n"));
if (CTRL_MODE(timer->control) == 3)
- return timer->value & 0xfffe;
+ return timer->value & 0xfffe;
return timer->value;
}
@@ -703,9 +703,9 @@ static UINT16 masked_value(pit8253_timer *timer)
so they don't affect any timer operations except other reads. */
READ8_DEVICE_HANDLER( pit8253_r )
{
- pit8253_t *pit8253 = get_safe_token(device);
- pit8253_timer *timer = get_timer(pit8253,offset);
- UINT8 data;
+ pit8253_t *pit8253 = get_safe_token(device);
+ pit8253_timer *timer = get_timer(pit8253,offset);
+ UINT8 data;
UINT16 value;
LOG2(("pit8253_r(): offset %d\n", offset));
@@ -724,22 +724,22 @@ READ8_DEVICE_HANDLER( pit8253_r )
{
/* Read status register (8254 only) */
data = timer->status;
- timer->latched_status = 0;
+ timer->latched_status = 0;
}
else
{
- if (timer->latched_count != 0)
+ if (timer->latched_count != 0)
{
/* Read back latched count */
- data = (timer->latch >> (timer->rmsb != 0 ? 8 : 0)) & 0xff;
- timer->rmsb = 1 - timer->rmsb;
+ data = (timer->latch >> (timer->rmsb != 0 ? 8 : 0)) & 0xff;
+ timer->rmsb = 1 - timer->rmsb;
--timer->latched_count;
}
else {
- value = masked_value(timer);
+ value = masked_value(timer);
/* Read back current count */
- switch(CTRL_ACCESS(timer->control)) {
+ switch(CTRL_ACCESS(timer->control)) {
case 0:
default:
/* This should never happen */
@@ -748,18 +748,18 @@ READ8_DEVICE_HANDLER( pit8253_r )
case 1:
/* read counter bits 0-7 only */
- data = (value >> 0) & 0xff;
+ data = (value >> 0) & 0xff;
break;
case 2:
/* read counter bits 8-15 only */
- data = (value >> 8) & 0xff;
+ data = (value >> 8) & 0xff;
break;
case 3:
/* read bits 0-7 first, then 8-15 */
data = (value >> (timer->rmsb != 0 ? 8 : 0)) & 0xff;
- timer->rmsb = 1 - timer->rmsb;
+ timer->rmsb = 1 - timer->rmsb;
break;
}
}
@@ -772,32 +772,32 @@ READ8_DEVICE_HANDLER( pit8253_r )
/* Loads a new value from the bus to the count register (CR) */
-static void load_count(device_t *device, pit8253_timer *timer, UINT16 newcount)
+static void load_count(device_t *device, pit8253_timer *timer, UINT16 newcount)
{
- int mode = CTRL_MODE(timer->control);
+ int mode = CTRL_MODE(timer->control);
LOG1(("pit8253: load_count(): %04x\n",newcount));
- if (newcount == 1)
+ if (newcount == 1)
{
/* Count of 1 is illegal in modes 2 and 3. What happens here was
- determined experimentally. */
- if (mode == 2)
+ determined experimentally. */
+ if (mode == 2)
newcount = 2;
- if (mode == 3)
+ if (mode == 3)
newcount = 0;
}
timer->count = newcount;
- if (mode == 2 || mode == 3)
+ if (mode == 2 || mode == 3)
{
- if (timer->phase == 0)
+ if (timer->phase == 0)
{
timer->phase = 1;
}
}
else
{
- if (mode == 0 || mode == 4)
+ if (mode == 0 || mode == 4)
{
timer->phase = 1;
}
@@ -805,7 +805,7 @@ static void load_count(device_t *device, pit8253_timer *timer, UINT16 newcount)
}
-static void readback(device_t *device, pit8253_timer *timer,int command)
+static void readback(device_t *device, pit8253_timer *timer,int command)
{
UINT16 value;
update(device, timer);
@@ -815,34 +815,34 @@ static void readback(device_t *device, pit8253_timer *timer,int command)
/* readback status command */
if (timer->latched_status == 0)
{
- timer->status = timer->control | (timer->output != 0 ? 0x80 : 0) | (timer->null_count != 0 ? 0x40 : 0);
+ timer->status = timer->control | (timer->output != 0 ? 0x80 : 0) | (timer->null_count != 0 ? 0x40 : 0);
}
- timer->latched_status = 1;
+ timer->latched_status = 1;
}
/* Experimentally determined: the read latch command seems to have no
- effect if we're halfway through a 16-bit read */
+ effect if we're halfway through a 16-bit read */
if ((command & 2) == 0 && timer->rmsb == 0)
{
/* readback count command */
- if (timer->latched_count == 0)
+ if (timer->latched_count == 0)
{
- value = masked_value(timer);
- switch(CTRL_ACCESS(timer->control)) {
+ value = masked_value(timer);
+ switch(CTRL_ACCESS(timer->control)) {
case 0:
/* This should never happen */
break;
case 1:
/* latch bits 0-7 only */
- timer->latch = ((value << 8) & 0xff00) | (value & 0xff);
+ timer->latch = ((value << 8) & 0xff00) | (value & 0xff);
timer->latched_count = 1;
break;
case 2:
/* read bits 8-15 only */
- timer->latch = (value & 0xff00) | ((value >> 8) & 0xff);
+ timer->latch = (value & 0xff00) | ((value >> 8) & 0xff);
timer->latched_count = 1;
break;
@@ -859,15 +859,15 @@ static void readback(device_t *device, pit8253_timer *timer,int command)
WRITE8_DEVICE_HANDLER( pit8253_w )
{
- pit8253_t *pit8253 = get_safe_token(device);
- pit8253_timer *timer = get_timer(pit8253,offset);
- int read_command;
+ pit8253_t *pit8253 = get_safe_token(device);
+ pit8253_timer *timer = get_timer(pit8253,offset);
+ int read_command;
LOG2(("pit8253_w(): offset=%d data=0x%02x\n", offset, data));
if (timer == NULL) {
/* Write to mode control register */
- timer = get_timer(pit8253, (data >> 6) & 3);
+ timer = get_timer(pit8253, (data >> 6) & 3);
if (timer == NULL)
{
/* Readback command. Illegal on 8253 */
@@ -877,12 +877,12 @@ WRITE8_DEVICE_HANDLER( pit8253_w )
LOG1(("pit8253_w(): readback %02x\n", data & 0x3f));
/* Bit 0 of data must be 0. Todo: find out what the hardware does if it isn't. */
- read_command = (data >> 4) & 3;
- if ((data & 2) != 0)
+ read_command = (data >> 4) & 3;
+ if ((data & 2) != 0)
readback(device, get_timer(pit8253,0), read_command);
- if ((data & 4) != 0)
+ if ((data & 4) != 0)
readback(device, get_timer(pit8253,1), read_command);
- if ((data & 8) != 0)
+ if ((data & 8) != 0)
readback(device, get_timer(pit8253,2), read_command);
}
return;
@@ -902,8 +902,8 @@ WRITE8_DEVICE_HANDLER( pit8253_w )
LOG1(("pit8253_write(): timer=%d bytes=%d mode=%d bcd=%d\n", (data >> 6) & 3, (data >> 4) & 3, (data >> 1) & 7,data & 1));
timer->control = (data & 0x3f);
- timer->null_count = 1;
- timer->wmsb = timer->rmsb = 0;
+ timer->null_count = 1;
+ timer->wmsb = timer->rmsb = 0;
/* Phase 0 is always the phase after a mode control write */
timer->phase = 0;
set_output(device, timer, CTRL_MODE(timer->control) ? 1 : 0);
@@ -911,7 +911,7 @@ WRITE8_DEVICE_HANDLER( pit8253_w )
}
else
{
- int middle_of_a_cycle = 0;
+ int middle_of_a_cycle = 0;
update(device, timer);
@@ -920,7 +920,7 @@ WRITE8_DEVICE_HANDLER( pit8253_w )
middle_of_a_cycle = 1;
}
- switch(CTRL_ACCESS(timer->control)) {
+ switch(CTRL_ACCESS(timer->control)) {
case 0:
/* This should never happen */
break;
@@ -953,7 +953,7 @@ WRITE8_DEVICE_HANDLER( pit8253_w )
case 3:
/* read/write bits 0-7 first, then 8-15 */
- if (timer->wmsb != 0)
+ if (timer->wmsb != 0)
{
/* check if we should compensate for not being on a cycle boundary */
if ( middle_of_a_cycle )
@@ -964,17 +964,17 @@ WRITE8_DEVICE_HANDLER( pit8253_w )
}
else
{
- timer->lowcount = data;
+ timer->lowcount = data;
if (CTRL_MODE(timer->control) == 0)
{
/* The Intel docs say that writing the MSB in mode 0, phase
- 2 won't stop the count, but this was experimentally
- determined to be false. */
+ 2 won't stop the count, but this was experimentally
+ determined to be false. */
timer->phase = 0;
set_output( device, timer, 0 );
}
}
- timer->wmsb = 1 - timer->wmsb;
+ timer->wmsb = 1 - timer->wmsb;
break;
}
}
@@ -982,8 +982,8 @@ WRITE8_DEVICE_HANDLER( pit8253_w )
static void pit8253_gate_w(device_t *device, int gate, int state)
{
- pit8253_t *pit8253 = get_safe_token(device);
- pit8253_timer *timer = get_timer(pit8253, gate);
+ pit8253_t *pit8253 = get_safe_token(device);
+ pit8253_timer *timer = get_timer(pit8253, gate);
LOG2(("pit8253_gate_w(): gate=%d state=%d\n", gate, state));
@@ -1001,7 +1001,7 @@ static void pit8253_gate_w(device_t *device, int gate, int state)
int mode = CTRL_MODE(timer->control);
update(device, timer);
- timer->gate = state;
+ timer->gate = state;
if (state != 0 && ( mode == 1 || mode == 2 || mode == 5 ))
{
timer->phase = 1;
@@ -1018,11 +1018,11 @@ WRITE_LINE_DEVICE_HANDLER( pit8253_gate2_w ) { pit8253_gate_w(device, 2, state);
/* ----------------------------------------------------------------------- */
-int pit8253_get_output(device_t *device, int timerno)
+int pit8253_get_output(device_t *device, int timerno)
{
- pit8253_t *pit8253 = get_safe_token(device);
- pit8253_timer *timer = get_timer(pit8253,timerno);
- int result;
+ pit8253_t *pit8253 = get_safe_token(device);
+ pit8253_timer *timer = get_timer(pit8253,timerno);
+ int result;
update(device, timer);
result = timer->output;
@@ -1034,8 +1034,8 @@ int pit8253_get_output(device_t *device, int timerno)
void pit8253_set_clockin(device_t *device, int timerno, double new_clockin)
{
- pit8253_t *pit8253 = get_safe_token(device);
- pit8253_timer *timer = get_timer(pit8253,timerno);
+ pit8253_t *pit8253 = get_safe_token(device);
+ pit8253_timer *timer = get_timer(pit8253,timerno);
LOG2(("pit8253_set_clockin(): PIT timer=%d, clockin = %lf\n", timerno,new_clockin));
@@ -1047,7 +1047,7 @@ void pit8253_set_clockin(device_t *device, int timerno, double new_clockin)
static void pit8253_set_clock_signal(device_t *device, int timerno, int state)
{
- pit8253_t *pit8253 = get_safe_token(device);
+ pit8253_t *pit8253 = get_safe_token(device);
pit8253_timer *timer = get_timer(pit8253,timerno);
LOG2(("pit8253_set_clock_signal(): PIT timer=%d, state = %d\n", timerno, state));
@@ -1067,8 +1067,8 @@ WRITE_LINE_DEVICE_HANDLER( pit8253_clk2_w ) { pit8253_set_clock_signal(device, 2
static void common_start( device_t *device, int device_type ) {
- pit8253_t *pit8253 = get_safe_token(device);
- int timerno;
+ pit8253_t *pit8253 = get_safe_token(device);
+ int timerno;
pit8253->config = (const struct pit8253_config *)device->static_config();
pit8253->device_type = device_type;
@@ -1128,8 +1128,8 @@ static DEVICE_RESET( pit8253 ) {
{
pit8253_timer *timer = get_timer(pit,i);
/* According to Intel's 8254 docs, the state of a timer is undefined
- until the first mode control word is written. Here we define this
- undefined behaviour */
+ until the first mode control word is written. Here we define this
+ undefined behaviour */
timer->index = i;
timer->control = timer->status = 0x30;
timer->rmsb = timer->wmsb = 0;
@@ -1141,7 +1141,7 @@ static DEVICE_RESET( pit8253 ) {
else
timer->gate = 1;
- timer->output = 2; /* output is undetermined */
+ timer->output = 2; /* output is undetermined */
timer->latched_count = 0;
timer->latched_status = 0;
timer->null_count = 1;
@@ -1210,5 +1210,3 @@ void pit8254_device::device_start()
{
DEVICE_START_NAME( pit8254 )(this);
}
-
-
diff --git a/src/emu/machine/pit8253.h b/src/emu/machine/pit8253.h
index ad2247222a0..45517d6c0a9 100644
--- a/src/emu/machine/pit8253.h
+++ b/src/emu/machine/pit8253.h
@@ -31,9 +31,9 @@ struct pit8253_config
{
struct
{
- double clockin; /* timer clock */
- devcb_read_line in_gate_func; /* gate signal */
- devcb_write_line out_out_func; /* out signal */
+ double clockin; /* timer clock */
+ devcb_read_line in_gate_func; /* gate signal */
+ devcb_write_line out_out_func; /* out signal */
} timer[3];
};
@@ -110,4 +110,4 @@ int pit8253_get_output(device_t *device, int timer);
void pit8253_set_clockin(device_t *device, int timer, double new_clockin);
-#endif /* __PIT8253_H__ */
+#endif /* __PIT8253_H__ */
diff --git a/src/emu/machine/pla.c b/src/emu/machine/pla.c
index 00b2ed83ed2..812b7b3732e 100644
--- a/src/emu/machine/pla.c
+++ b/src/emu/machine/pla.c
@@ -30,20 +30,20 @@ const device_type MOS8721 = &device_creator<mos8721_device>;
pla_device::pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 input_mask)
: device_t(mconfig, type, name, tag, owner, clock),
- m_inputs(inputs),
- m_outputs(outputs),
- m_terms(terms),
- m_input_mask(((UINT64)input_mask << 32) | input_mask)
+ m_inputs(inputs),
+ m_outputs(outputs),
+ m_terms(terms),
+ m_input_mask(((UINT64)input_mask << 32) | input_mask)
{
}
pls100_device::pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : pla_device(mconfig, PLS100, "PLS100", tag, owner, clock, 16, 8, 48, 0xffff)
+ : pla_device(mconfig, PLS100, "PLS100", tag, owner, clock, 16, 8, 48, 0xffff)
{
}
mos8721_device::mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : pla_device(mconfig, MOS8721, "MOS8721", tag, owner, clock, 27, 18, 379, 0x7ffffff) // TODO actual number of terms is unknown
+ : pla_device(mconfig, MOS8721, "MOS8721", tag, owner, clock, 27, 18, 379, 0x7ffffff) // TODO actual number of terms is unknown
{
}
diff --git a/src/emu/machine/pla.h b/src/emu/machine/pla.h
index 043acef63fb..4bd1480f621 100644
--- a/src/emu/machine/pla.h
+++ b/src/emu/machine/pla.h
@@ -51,7 +51,7 @@
MCFG_DEVICE_ADD(_tag, PLS100, 0)
#define MCFG_MOS8721_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, MOS8721, 0)
+ MCFG_DEVICE_ADD(_tag, MOS8721, 0)
///*************************************************************************
@@ -60,36 +60,36 @@
// ======================> pla_device
-class pla_device : public device_t
+class pla_device : public device_t
{
public:
- // construction/destruction
- pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 output_mask);
+ // construction/destruction
+ pla_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int inputs, int outputs, int terms, UINT32 output_mask);
UINT32 read(UINT32 input);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
void parse_fusemap();
- int m_inputs;
- int m_outputs;
- int m_terms;
- UINT64 m_input_mask;
+ int m_inputs;
+ int m_outputs;
+ int m_terms;
+ UINT64 m_input_mask;
UINT64 m_xor;
- struct term
- {
- UINT64 m_and;
- UINT64 m_or;
- };
+ struct term
+ {
+ UINT64 m_and;
+ UINT64 m_or;
+ };
- term m_term[MAX_TERMS];
+ term m_term[MAX_TERMS];
- UINT64 m_cache[CACHE_SIZE];
- UINT8 m_cache_ptr;
+ UINT64 m_cache[CACHE_SIZE];
+ UINT8 m_cache_ptr;
};
@@ -98,7 +98,7 @@ protected:
class pls100_device : public pla_device
{
public:
- pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ pls100_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
@@ -107,7 +107,7 @@ public:
class mos8721_device : public pla_device
{
public:
- mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ mos8721_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
diff --git a/src/emu/machine/ram.c b/src/emu/machine/ram.c
index 8767b7e031b..c7ac5bf09ee 100644
--- a/src/emu/machine/ram.c
+++ b/src/emu/machine/ram.c
@@ -28,7 +28,7 @@ const device_type RAM = &device_creator<ram_device>;
//-------------------------------------------------
ram_device::ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, RAM, "RAM", tag, owner, clock)
+ : device_t(mconfig, RAM, "RAM", tag, owner, clock)
{
m_size = 0;
m_pointer = NULL;
diff --git a/src/emu/machine/ram.h b/src/emu/machine/ram.h
index fefb440d5b5..133fea31a7f 100644
--- a/src/emu/machine/ram.h
+++ b/src/emu/machine/ram.h
@@ -14,7 +14,7 @@
CONSTANTS
***************************************************************************/
-#define RAM_TAG "ram"
+#define RAM_TAG "ram"
/***************************************************************************
@@ -28,7 +28,7 @@
MCFG_DEVICE_REMOVE(_tag)
#define MCFG_RAM_MODIFY(_tag) \
- MCFG_DEVICE_MODIFY(_tag) \
+ MCFG_DEVICE_MODIFY(_tag) \
ram_device::static_set_extra_options(*device, NULL);
#define MCFG_RAM_DEFAULT_SIZE(_default_size) \
@@ -48,8 +48,8 @@
class ram_device : public device_t
{
public:
- // construction/destruction
- ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// accessors
UINT32 size(void) const { return m_size; }
@@ -58,15 +58,15 @@ public:
static UINT32 parse_string(const char *s);
UINT32 default_size(void) const;
const char *extra_options(void) const { return m_extra_options; }
-
+
// read/write
- UINT8 read(offs_t offset) { return m_pointer[offset % m_size]; }
- void write(offs_t offset, UINT8 data) { m_pointer[offset % m_size] = data; }
+ UINT8 read(offs_t offset) { return m_pointer[offset % m_size]; }
+ void write(offs_t offset, UINT8 data) { m_pointer[offset % m_size] = data; }
// inline configuration helpers
- static void static_set_default_size(device_t &device, const char *default_size) { downcast<ram_device &>(device).m_default_size = default_size; }
- static void static_set_extra_options(device_t &device, const char *extra_options) { downcast<ram_device &>(device).m_extra_options = extra_options; }
- static void static_set_default_value(device_t &device, UINT8 default_value) { downcast<ram_device &>(device).m_default_value = default_value; }
+ static void static_set_default_size(device_t &device, const char *default_size) { downcast<ram_device &>(device).m_default_size = default_size; }
+ static void static_set_extra_options(device_t &device, const char *extra_options) { downcast<ram_device &>(device).m_extra_options = extra_options; }
+ static void static_set_default_value(device_t &device, UINT8 default_value) { downcast<ram_device &>(device).m_default_value = default_value; }
protected:
virtual void device_start(void);
diff --git a/src/emu/machine/rescap.h b/src/emu/machine/rescap.h
index afac4713f8c..e751623ae6d 100644
--- a/src/emu/machine/rescap.h
+++ b/src/emu/machine/rescap.h
@@ -10,14 +10,14 @@
#define CAP_P(cap) ((double)(cap) * 1e-12)
/* vin --/\r1/\-- out --/\r2/\-- gnd */
-#define RES_VOLTAGE_DIVIDER(r1, r2) ((double)(r2) / ((double)(r1) + (double)(r2)))
+#define RES_VOLTAGE_DIVIDER(r1, r2) ((double)(r2) / ((double)(r1) + (double)(r2)))
-#define RES_2_PARALLEL(r1, r2) (((r1) * (r2)) / ((r1) + (r2)))
-#define RES_3_PARALLEL(r1, r2, r3) (1.0 / (1.0 / (r1) + 1.0 / (r2) + 1.0 / (r3)))
+#define RES_2_PARALLEL(r1, r2) (((r1) * (r2)) / ((r1) + (r2)))
+#define RES_3_PARALLEL(r1, r2, r3) (1.0 / (1.0 / (r1) + 1.0 / (r2) + 1.0 / (r3)))
#define RES_4_PARALLEL(r1, r2, r3, r4) (1.0 / (1.0 / (r1) + 1.0 / (r2) + 1.0 / (r3) + 1.0 / (r4)))
#define RES_5_PARALLEL(r1, r2, r3, r4, r5) (1.0 / (1.0 / (r1) + 1.0 / (r2) + 1.0 / (r3) + 1.0 / (r4) + 1.0 / (r5)))
#define RES_6_PARALLEL(r1, r2, r3, r4, r5, r6) (1.0 / (1.0 / (r1) + 1.0 / (r2) + 1.0 / (r3) + 1.0 / (r4) + 1.0 / (r5) + 1.0 / (r6)))
-#define RES_2_SERIAL(r1,r2) ((r1)+(r2))
+#define RES_2_SERIAL(r1,r2) ((r1)+(r2))
#endif
diff --git a/src/emu/machine/roc10937.c b/src/emu/machine/roc10937.c
index 98a5053b315..1d2a8d15786 100644
--- a/src/emu/machine/roc10937.c
+++ b/src/emu/machine/roc10937.c
@@ -92,9 +92,9 @@ static const UINT16 roc10937charset[]=
0x44FF, // 0100 0100 1111 1111 8.
0x44BF, // 0100 0100 1011 1111 9.
0x0021, // 0000 0000 0010 0001 -
- // -.
+ // -.
0x2001, // 0010 0000 0000 0001 -
- // /.
+ // /.
0x2430, // 0010 0100 0011 0000 <.
0x4430, // 0100 0100 0011 0000 =.
0x8830, // 1000 1000 0011 0000 >.
@@ -146,18 +146,18 @@ void rocvfd_t::static_set_zero(device_t &device, bool reversed)
void rocvfd_t::device_start()
{
- save_item(NAME(m_port_val));
- save_item(NAME(m_reversed));
- save_item(NAME(m_cursor_pos));
+ save_item(NAME(m_port_val));
+ save_item(NAME(m_reversed));
+ save_item(NAME(m_cursor_pos));
save_item(NAME(m_window_size));
save_item(NAME(m_shift_count));
save_item(NAME(m_shift_data));
save_item(NAME(m_pcursor_pos));
- save_item(NAME(m_chars));
- save_item(NAME(m_outputs));
- save_item(NAME(m_brightness));
- save_item(NAME(m_count));
- save_item(NAME(m_duty));
+ save_item(NAME(m_chars));
+ save_item(NAME(m_outputs));
+ save_item(NAME(m_brightness));
+ save_item(NAME(m_count));
+ save_item(NAME(m_duty));
save_item(NAME(m_disp));
@@ -166,7 +166,7 @@ void rocvfd_t::device_start()
void rocvfd_t::device_reset()
{
- m_cursor_pos = 0;
+ m_cursor_pos = 0;
m_window_size = 16;
m_shift_count = 0;
m_shift_data = 0;
@@ -174,10 +174,10 @@ void rocvfd_t::device_reset()
m_brightness =31;
m_count=0;
m_duty=31;
- m_disp = 0;
+ m_disp = 0;
- memset(m_chars, 0, sizeof(m_chars));
- memset(m_outputs, 0, sizeof(m_outputs));
+ memset(m_chars, 0, sizeof(m_chars));
+ memset(m_outputs, 0, sizeof(m_outputs));
}
///////////////////////////////////////////////////////////////////////////
@@ -365,4 +365,3 @@ void roc10957_t::write_char(int data)
}
}
}
-
diff --git a/src/emu/machine/roc10937.h b/src/emu/machine/roc10937.h
index ec29ed5a7ec..26c71f02357 100644
--- a/src/emu/machine/roc10937.h
+++ b/src/emu/machine/roc10937.h
@@ -24,7 +24,7 @@
roc10937_t::static_set_zero(*device, _reversed); \
#define MCFG_ROC10937_REMOVE(_tag) \
- MCFG_DEVICE_REMOVE(_tag)
+ MCFG_DEVICE_REMOVE(_tag)
#define MCFG_ROC10957_ADD(_tag,_val,_reversed) \
MCFG_DEVICE_ADD(_tag, ROC10957,60)\
@@ -38,7 +38,7 @@
roc10957_t::static_set_zero(*device, _reversed); \
#define MCFG_ROC10957_REMOVE(_tag) \
- MCFG_DEVICE_REMOVE(_tag)
+ MCFG_DEVICE_REMOVE(_tag)
#define MCFG_MSC1937_ADD(_tag,_val,_reversed) \
MCFG_DEVICE_ADD(_tag, ROC10937,60)\
@@ -52,7 +52,7 @@
roc10937_t::static_set_zero(*device, _reversed); \
#define MCFG_MSC1937_REMOVE(_tag) \
- MCFG_DEVICE_REMOVE(_tag)
+ MCFG_DEVICE_REMOVE(_tag)
class rocvfd_t : public device_t {
@@ -64,29 +64,29 @@ public:
// inline configuration helpers
static void static_set_value(device_t &device, int val);
static void static_set_zero(device_t &device, bool reversed);
- virtual void update_display();
- UINT8 m_port_val;
+ virtual void update_display();
+ UINT8 m_port_val;
bool m_reversed;
void blank(int data);
void shift_data(int data);
- void write_char(int data);
+ void write_char(int data);
void setdata(int segdata, int data);
- UINT32 set_display(UINT32 segin);
+ UINT32 set_display(UINT32 segin);
protected:
int m_cursor_pos;
- int m_window_size; // window size
- int m_shift_count;
- int m_shift_data;
+ int m_window_size; // window size
+ int m_shift_count;
+ int m_shift_data;
int m_pcursor_pos;
int m_brightness;
int m_count;
int m_duty;
int m_disp;
- UINT8 m_cursor;
- UINT32 m_chars[16];
- UINT32 m_outputs[16];
+ UINT8 m_cursor;
+ UINT32 m_chars[16];
+ UINT32 m_outputs[16];
virtual void device_start();
virtual void device_reset();
@@ -114,7 +114,7 @@ class roc10957_t : public rocvfd_t {
public:
roc10957_t(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- void write_char(int data);
+ void write_char(int data);
protected:
diff --git a/src/emu/machine/rp5c01.c b/src/emu/machine/rp5c01.c
index 170c1c61ee2..d6f58abd62e 100644
--- a/src/emu/machine/rp5c01.c
+++ b/src/emu/machine/rp5c01.c
@@ -79,23 +79,23 @@ enum
// mode register
-#define MODE_MASK 0x03
-#define MODE_ALARM_EN 0x04
-#define MODE_TIMER_EN 0x08
+#define MODE_MASK 0x03
+#define MODE_ALARM_EN 0x04
+#define MODE_TIMER_EN 0x08
// test register
-#define TEST_0 0x01
-#define TEST_1 0x02
-#define TEST_2 0x04
-#define TEST_3 0x08
+#define TEST_0 0x01
+#define TEST_1 0x02
+#define TEST_2 0x04
+#define TEST_3 0x08
// reset register
-#define RESET_ALARM 0x01
-#define RESET_TIMER 0x02
-#define RESET_16_HZ 0x04
-#define RESET_1_HZ 0x08
+#define RESET_ALARM 0x01
+#define RESET_TIMER 0x02
+#define RESET_16_HZ 0x04
+#define RESET_1_HZ 0x08
@@ -174,12 +174,12 @@ inline void rp5c01_device::check_alarm()
rp5c01_device::rp5c01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, RP5C01, "RP5C01", tag, owner, clock),
- device_rtc_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_alarm(1),
- m_alarm_on(1),
- m_1hz(1),
- m_16hz(1)
+ device_rtc_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_alarm(1),
+ m_alarm_on(1),
+ m_1hz(1),
+ m_16hz(1)
{
}
diff --git a/src/emu/machine/rp5c01.h b/src/emu/machine/rp5c01.h
index 5381a88ce37..c318b174299 100644
--- a/src/emu/machine/rp5c01.h
+++ b/src/emu/machine/rp5c01.h
@@ -33,7 +33,7 @@
//**************************************************************************
#define MCFG_RP5C01_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), RP5C01, _clock) \
+ MCFG_DEVICE_ADD((_tag), RP5C01, _clock) \
MCFG_DEVICE_CONFIG(_config)
@@ -50,31 +50,31 @@
struct rp5c01_interface
{
- devcb_write_line m_out_alarm_cb;
+ devcb_write_line m_out_alarm_cb;
};
// ======================> rp5c01_device
-class rp5c01_device : public device_t,
+class rp5c01_device : public device_t,
public device_rtc_interface,
public device_nvram_interface,
- public rp5c01_interface
+ public rp5c01_interface
{
public:
- // construction/destruction
- rp5c01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ rp5c01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( adj_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_rtc_interface overrides
@@ -95,17 +95,17 @@ private:
static const device_timer_id TIMER_CLOCK = 0;
static const device_timer_id TIMER_16HZ = 1;
- devcb_resolved_write_line m_out_alarm_func;
+ devcb_resolved_write_line m_out_alarm_func;
- UINT8 m_reg[2][13]; // clock registers
- UINT8 m_ram[13]; // RAM
+ UINT8 m_reg[2][13]; // clock registers
+ UINT8 m_ram[13]; // RAM
- UINT8 m_mode; // mode register
- UINT8 m_reset; // reset register
- int m_alarm; // alarm output
- int m_alarm_on; // alarm condition
- int m_1hz; // 1 Hz condition
- int m_16hz; // 16 Hz condition
+ UINT8 m_mode; // mode register
+ UINT8 m_reset; // reset register
+ int m_alarm; // alarm output
+ int m_alarm_on; // alarm condition
+ int m_1hz; // 1 Hz condition
+ int m_16hz; // 16 Hz condition
// timers
emu_timer *m_clock_timer;
diff --git a/src/emu/machine/rp5c15.c b/src/emu/machine/rp5c15.c
index be0fa17e1df..a086c8be90d 100644
--- a/src/emu/machine/rp5c15.c
+++ b/src/emu/machine/rp5c15.c
@@ -81,23 +81,23 @@ enum
// mode register
-#define MODE_MASK 0x01
-#define MODE_ALARM_EN 0x04
-#define MODE_TIMER_EN 0x08
+#define MODE_MASK 0x01
+#define MODE_ALARM_EN 0x04
+#define MODE_TIMER_EN 0x08
// test register
-#define TEST_0 0x01
-#define TEST_1 0x02
-#define TEST_2 0x04
-#define TEST_3 0x08
+#define TEST_0 0x01
+#define TEST_1 0x02
+#define TEST_2 0x04
+#define TEST_3 0x08
// reset register
-#define RESET_ALARM 0x01
-#define RESET_TIMER 0x02
-#define RESET_16_HZ 0x04
-#define RESET_1_HZ 0x08
+#define RESET_ALARM 0x01
+#define RESET_TIMER 0x02
+#define RESET_16_HZ 0x04
+#define RESET_1_HZ 0x08
@@ -185,12 +185,12 @@ inline void rp5c15_device::check_alarm()
rp5c15_device::rp5c15_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, RP5C15, "RP5C15", tag, owner, clock),
- device_rtc_interface(mconfig, *this),
- m_alarm(1),
- m_alarm_on(1),
- m_1hz(1),
- m_16hz(1),
- m_clkout(1)
+ device_rtc_interface(mconfig, *this),
+ m_alarm(1),
+ m_alarm_on(1),
+ m_1hz(1),
+ m_16hz(1),
+ m_clkout(1)
{
}
diff --git a/src/emu/machine/rp5c15.h b/src/emu/machine/rp5c15.h
index 3194d9ee66e..1357d3f586d 100644
--- a/src/emu/machine/rp5c15.h
+++ b/src/emu/machine/rp5c15.h
@@ -33,7 +33,7 @@
//**************************************************************************
#define MCFG_RP5C15_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), RP5C15, _clock) \
+ MCFG_DEVICE_ADD((_tag), RP5C15, _clock) \
MCFG_DEVICE_CONFIG(_config)
@@ -50,31 +50,31 @@
struct rp5c15_interface
{
- devcb_write_line m_out_alarm_cb;
- devcb_write_line m_out_clkout_cb;
+ devcb_write_line m_out_alarm_cb;
+ devcb_write_line m_out_clkout_cb;
};
// ======================> rp5c15_device
-class rp5c15_device : public device_t,
+class rp5c15_device : public device_t,
public device_rtc_interface,
- public rp5c15_interface
+ public rp5c15_interface
{
public:
- // construction/destruction
- rp5c15_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ rp5c15_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( adj_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_rtc_interface overrides
@@ -91,19 +91,19 @@ private:
static const device_timer_id TIMER_16HZ = 1;
static const device_timer_id TIMER_CLKOUT = 2;
- devcb_resolved_write_line m_out_alarm_func;
- devcb_resolved_write_line m_out_clkout_func;
+ devcb_resolved_write_line m_out_alarm_func;
+ devcb_resolved_write_line m_out_clkout_func;
- UINT8 m_reg[2][13]; // clock registers
- UINT8 m_ram[13]; // RAM
+ UINT8 m_reg[2][13]; // clock registers
+ UINT8 m_ram[13]; // RAM
- UINT8 m_mode; // mode register
- UINT8 m_reset; // reset register
- int m_alarm; // alarm output
- int m_alarm_on; // alarm condition
- int m_1hz; // 1 Hz condition
- int m_16hz; // 16 Hz condition
- int m_clkout; // clock output
+ UINT8 m_mode; // mode register
+ UINT8 m_reset; // reset register
+ int m_alarm; // alarm output
+ int m_alarm_on; // alarm condition
+ int m_1hz; // 1 Hz condition
+ int m_16hz; // 16 Hz condition
+ int m_clkout; // clock output
// timers
emu_timer *m_clock_timer;
diff --git a/src/emu/machine/rp5h01.c b/src/emu/machine/rp5h01.c
index 47e9cc6eb02..1056b78bf7f 100644
--- a/src/emu/machine/rp5h01.c
+++ b/src/emu/machine/rp5h01.c
@@ -32,10 +32,10 @@ enum {
struct rp5h01_state
{
int counter;
- int counter_mode; /* test pin */
- int enabled; /* chip enable */
- int old_reset; /* reset pin state (level-triggered) */
- int old_clock; /* clock pin state (level-triggered) */
+ int counter_mode; /* test pin */
+ int enabled; /* chip enable */
+ int old_reset; /* reset pin state (level-triggered) */
+ int old_clock; /* clock pin state (level-triggered) */
UINT8 *data;
};
@@ -256,5 +256,3 @@ void rp5h01_device::device_reset()
{
DEVICE_RESET_NAME( rp5h01 )(this);
}
-
-
diff --git a/src/emu/machine/rp5h01.h b/src/emu/machine/rp5h01.h
index e784fa4f15f..025a6bd57a7 100644
--- a/src/emu/machine/rp5h01.h
+++ b/src/emu/machine/rp5h01.h
@@ -48,12 +48,12 @@ extern const device_type RP5H01;
PROTOTYPES
***************************************************************************/
-DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_enable_w ); /* /CE */
-DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_reset_w ); /* RESET */
-DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_cs_w ); /* CS */
-DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_clock_w ); /* DATA CLOCK (active low) */
-DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_test_w ); /* TEST */
-DECLARE_READ8_DEVICE_HANDLER( rp5h01_counter_r ); /* COUNTER OUT */
-DECLARE_READ8_DEVICE_HANDLER( rp5h01_data_r ); /* DATA */
+DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_enable_w ); /* /CE */
+DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_reset_w ); /* RESET */
+DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_cs_w ); /* CS */
+DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_clock_w ); /* DATA CLOCK (active low) */
+DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_test_w ); /* TEST */
+DECLARE_READ8_DEVICE_HANDLER( rp5h01_counter_r ); /* COUNTER OUT */
+DECLARE_READ8_DEVICE_HANDLER( rp5h01_data_r ); /* DATA */
#endif /* __RP5H01_H__ */
diff --git a/src/emu/machine/rtc4543.c b/src/emu/machine/rtc4543.c
index 7bd9ad32fd4..e77f5d42552 100644
--- a/src/emu/machine/rtc4543.c
+++ b/src/emu/machine/rtc4543.c
@@ -28,8 +28,8 @@ const device_type RTC4543 = &device_creator<rtc4543_device>;
//-------------------------------------------------
rtc4543_device::rtc4543_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, RTC4543, "Epson R4543", tag, owner, clock),
- device_rtc_interface(mconfig, *this)
+ : device_t(mconfig, RTC4543, "Epson R4543", tag, owner, clock),
+ device_rtc_interface(mconfig, *this)
{
}
@@ -62,11 +62,11 @@ void rtc4543_device::device_reset()
{
set_current_time(machine());
- m_ce = 0;
- m_wr = 0;
- m_clk = 0;
- m_data = 0;
- m_curreg = 0;
+ m_ce = 0;
+ m_wr = 0;
+ m_clk = 0;
+ m_data = 0;
+ m_curreg = 0;
}
@@ -76,7 +76,7 @@ void rtc4543_device::device_reset()
void rtc4543_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- advance_seconds();
+ advance_seconds();
}
@@ -93,16 +93,16 @@ void rtc4543_device::rtc_clock_updated(int year, int month, int day, int day_of_
{
static const int weekday[7] = { 7, 1, 2, 3, 4, 5, 6 };
- m_regs[0] = make_bcd(second); // seconds (BCD, 0-59) in bits 0-6, bit 7 = battery low
- m_regs[1] = make_bcd(minute); // minutes (BCD, 0-59)
- m_regs[2] = make_bcd(hour); // hour (BCD, 0-23)
- m_regs[3] = make_bcd(weekday[day_of_week-1]); // low nibble = day of the week
- m_regs[3] |= (make_bcd(day) & 0x0f)<<4; // high nibble = low digit of day
- m_regs[4] = (make_bcd(day) >> 4); // low nibble = high digit of day
- m_regs[4] |= (make_bcd(month & 0x0f)<<4); // high nibble = low digit of month
- m_regs[5] = make_bcd(month & 0x0f) >> 4; // low nibble = high digit of month
- m_regs[5] |= (make_bcd(year % 10) << 4); // high nibble = low digit of year
- m_regs[6] = make_bcd(year % 100) >> 4; // low nibble = tens digit of year (BCD, 0-9)
+ m_regs[0] = make_bcd(second); // seconds (BCD, 0-59) in bits 0-6, bit 7 = battery low
+ m_regs[1] = make_bcd(minute); // minutes (BCD, 0-59)
+ m_regs[2] = make_bcd(hour); // hour (BCD, 0-23)
+ m_regs[3] = make_bcd(weekday[day_of_week-1]); // low nibble = day of the week
+ m_regs[3] |= (make_bcd(day) & 0x0f)<<4; // high nibble = low digit of day
+ m_regs[4] = (make_bcd(day) >> 4); // low nibble = high digit of day
+ m_regs[4] |= (make_bcd(month & 0x0f)<<4); // high nibble = low digit of month
+ m_regs[5] = make_bcd(month & 0x0f) >> 4; // low nibble = high digit of month
+ m_regs[5] |= (make_bcd(year % 10) << 4); // high nibble = low digit of year
+ m_regs[6] = make_bcd(year % 100) >> 4; // low nibble = tens digit of year (BCD, 0-9)
}
//-------------------------------------------------
@@ -118,8 +118,8 @@ WRITE_LINE_MEMBER( rtc4543_device::ce_w )
}
else if (state && !m_ce) // start new data transfer
{
- m_curreg = 0;
- m_bit = 8; // force immediate reload of output data
+ m_curreg = 0;
+ m_bit = 8; // force immediate reload of output data
}
m_ce = state;
@@ -148,17 +148,17 @@ WRITE_LINE_MEMBER( rtc4543_device::clk_w )
if (!m_clk && state) // rising edge - read data becomes valid here
{
- if (m_bit > 7) // reload data?
- {
- m_bit = 0;
- m_data = m_regs[m_curreg++];
- }
- else // no reload, just continue with the current byte
- {
- m_data <<= 1;
- }
-
- m_bit++;
+ if (m_bit > 7) // reload data?
+ {
+ m_bit = 0;
+ m_data = m_regs[m_curreg++];
+ }
+ else // no reload, just continue with the current byte
+ {
+ m_data <<= 1;
+ }
+
+ m_bit++;
}
else if (m_clk && !state) // falling edge - write data becomes valid here
{
@@ -188,4 +188,3 @@ READ_LINE_MEMBER( rtc4543_device::data_r )
{
return (m_data & 0x80) ? 1 : 0;
}
-
diff --git a/src/emu/machine/rtc4543.h b/src/emu/machine/rtc4543.h
index 7c05c5f4db0..94d5bf5bdea 100644
--- a/src/emu/machine/rtc4543.h
+++ b/src/emu/machine/rtc4543.h
@@ -30,39 +30,39 @@
// ======================> rtc4543_device
class rtc4543_device : public device_t,
- public device_rtc_interface
+ public device_rtc_interface
{
public:
- // construction/destruction
- rtc4543_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ rtc4543_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_WRITE_LINE_MEMBER( ce_w );
- DECLARE_WRITE_LINE_MEMBER( wr_w );
- DECLARE_WRITE_LINE_MEMBER( clk_w );
- DECLARE_READ_LINE_MEMBER( data_r );
- DECLARE_WRITE_LINE_MEMBER( data_w );
+ DECLARE_WRITE_LINE_MEMBER( ce_w );
+ DECLARE_WRITE_LINE_MEMBER( wr_w );
+ DECLARE_WRITE_LINE_MEMBER( clk_w );
+ DECLARE_READ_LINE_MEMBER( data_r );
+ DECLARE_WRITE_LINE_MEMBER( data_w );
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
- // device_rtc_interface overrides
- virtual void rtc_clock_updated(int year, int month, int day, int day_of_week, int hour, int minute, int second);
- virtual bool rtc_feature_leap_year() { return true; }
+ // device_rtc_interface overrides
+ virtual void rtc_clock_updated(int year, int month, int day, int day_of_week, int hour, int minute, int second);
+ virtual bool rtc_feature_leap_year() { return true; }
private:
- int m_ce;
- int m_clk;
- int m_wr;
- int m_data;
- int m_regs[7];
- int m_curreg;
- int m_bit;
-
- // timers
- emu_timer *m_clock_timer;
+ int m_ce;
+ int m_clk;
+ int m_wr;
+ int m_data;
+ int m_regs[7];
+ int m_curreg;
+ int m_bit;
+
+ // timers
+ emu_timer *m_clock_timer;
};
diff --git a/src/emu/machine/rtc65271.c b/src/emu/machine/rtc65271.c
index 2bc07fd96cb..82c8cab0a84 100644
--- a/src/emu/machine/rtc65271.c
+++ b/src/emu/machine/rtc65271.c
@@ -46,25 +46,25 @@ enum
enum
{
- reg_A_UIP = 0x80,
- reg_A_DV = 0x70,
- reg_A_RS = 0x0F,
-
- reg_B_SET = 0x80,
- reg_B_PIE = 0x40,
- reg_B_AIE = 0x20,
- reg_B_UIE = 0x10,
- reg_B_SQW = 0x08,
- reg_B_DM = 0x04,
- reg_B_24h = 0x02,
- reg_B_DSE = 0x01,
-
- reg_C_IRQF = 0x80,
- reg_C_PF = 0x40,
- reg_C_AF = 0x20,
- reg_C_UF = 0x10,
-
- reg_D_VRT = 0x80
+ reg_A_UIP = 0x80,
+ reg_A_DV = 0x70,
+ reg_A_RS = 0x0F,
+
+ reg_B_SET = 0x80,
+ reg_B_PIE = 0x40,
+ reg_B_AIE = 0x20,
+ reg_B_UIE = 0x10,
+ reg_B_SQW = 0x08,
+ reg_B_DM = 0x04,
+ reg_B_24h = 0x02,
+ reg_B_DSE = 0x01,
+
+ reg_C_IRQF = 0x80,
+ reg_C_PF = 0x40,
+ reg_C_AF = 0x20,
+ reg_C_UF = 0x10,
+
+ reg_D_VRT = 0x80
};
static const int SQW_freq_table[16] =
@@ -163,7 +163,7 @@ void rtc65271_device::nvram_default()
memset(m_regs,0, sizeof(m_regs));
memset(m_xram,0, sizeof(m_xram));
- m_regs[reg_B] |= reg_B_DM; // Firebeat assumes the chip factory defaults to non-BCD mode (or maybe Konami programs it that way?)
+ m_regs[reg_B] |= reg_B_DM; // Firebeat assumes the chip factory defaults to non-BCD mode (or maybe Konami programs it that way?)
}
//-------------------------------------------------
@@ -205,7 +205,7 @@ void rtc65271_device::nvram_read(emu_file &file)
if (file.read(m_xram, 4096) != 4096)
return;
- m_regs[reg_D] |= reg_D_VRT; /* the data was backed up successfully */
+ m_regs[reg_D] |= reg_D_VRT; /* the data was backed up successfully */
/*m_dirty = FALSE;*/
{
@@ -221,7 +221,7 @@ void rtc65271_device::nvram_read(emu_file &file)
/* 24-hour mode */
m_regs[reg_hour] = systime.local_time.hour;
else
- { /* 12-hour mode */
+ { /* 12-hour mode */
if (systime.local_time.hour >= 12)
{
m_regs[reg_hour] = 0x80;
@@ -240,7 +240,7 @@ void rtc65271_device::nvram_read(emu_file &file)
m_regs[reg_month] = systime.local_time.month + 1;
m_regs[reg_year] = systime.local_time.year % 100;
if (! (m_regs[reg_B] & reg_B_DM))
- { /* BCD mode */
+ { /* BCD mode */
m_regs[reg_second] = binary_to_BCD(m_regs[reg_second]);
m_regs[reg_minute] = binary_to_BCD(m_regs[reg_minute]);
m_regs[reg_hour] = (m_regs[reg_hour] & 0x80) | binary_to_BCD(m_regs[reg_hour] & 0x7f);
@@ -319,7 +319,7 @@ UINT8 rtc65271_device::read(int xramsel, offs_t offset)
{
case reg_A:
reply = m_regs[m_cur_reg] & ~reg_A_DV;
- reply |= 0x20; // indicate normal RTC operation
+ reply |= 0x20; // indicate normal RTC operation
break;
case reg_C:
@@ -329,7 +329,7 @@ UINT8 rtc65271_device::read(int xramsel, offs_t offset)
break;
case reg_D:
reply = m_regs[m_cur_reg];
- m_regs[m_cur_reg] = /*0*/reg_D_VRT; /* set VRT flag so that the computer does not complain that the battery is low */
+ m_regs[m_cur_reg] = /*0*/reg_D_VRT; /* set VRT flag so that the computer does not complain that the battery is low */
break;
default:
@@ -379,7 +379,7 @@ void rtc65271_device::write(int xramsel, offs_t offset, UINT8 data)
{
case reg_second:
/* the data sheet says bit 7 is read-only. (I have no idea of
- the reason why it is.) */
+ the reason why it is.) */
m_regs[reg_second] = data & 0x7f;
break;
@@ -399,7 +399,7 @@ void rtc65271_device::write(int xramsel, offs_t offset, UINT8 data)
}
else
{
- m_SQW_internal_state = 0; /* right??? */
+ m_SQW_internal_state = 0; /* right??? */
/* Stop the divider used for SQW and periodic interrupts. */
m_SQW_timer->adjust(attotime::never);
@@ -415,7 +415,7 @@ void rtc65271_device::write(int xramsel, offs_t offset, UINT8 data)
{
/* if we are in SET mode, clear update cycle */
m_regs[reg_A] &= ~reg_A_UIP;
- m_regs[reg_B] &= ~reg_B_UIE; /* the data sheet tells this, but I wonder how much sense it makes */
+ m_regs[reg_B] &= ~reg_B_UIE; /* the data sheet tells this, but I wonder how much sense it makes */
field_interrupts();
}
break;
@@ -466,19 +466,19 @@ void rtc65271_device::field_interrupts()
*/
TIMER_CALLBACK( rtc65271_device::rtc_SQW_callback )
{
- rtc65271_device *rtc = reinterpret_cast<rtc65271_device *>(ptr);
+ rtc65271_device *rtc = reinterpret_cast<rtc65271_device *>(ptr);
rtc->rtc_SQW_cb();
}
TIMER_CALLBACK( rtc65271_device::rtc_begin_update_callback )
{
- rtc65271_device *rtc = reinterpret_cast<rtc65271_device *>(ptr);
+ rtc65271_device *rtc = reinterpret_cast<rtc65271_device *>(ptr);
rtc->rtc_begin_update_cb();
}
TIMER_CALLBACK( rtc65271_device::rtc_end_update_callback )
{
- rtc65271_device *rtc = reinterpret_cast<rtc65271_device *>(ptr);
+ rtc65271_device *rtc = reinterpret_cast<rtc65271_device *>(ptr);
rtc->rtc_end_update_cb();
}
/*
@@ -671,8 +671,8 @@ const device_type RTC65271 = &device_creator<rtc65271_device>;
//-------------------------------------------------
rtc65271_device::rtc65271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, RTC65271, "RTC65271", tag, owner, clock),
- device_nvram_interface(mconfig, *this)
+ : device_t(mconfig, RTC65271, "RTC65271", tag, owner, clock),
+ device_nvram_interface(mconfig, *this)
{
}
@@ -712,4 +712,3 @@ void rtc65271_device::device_start()
save_item(NAME(m_cur_xram_page));
save_item(NAME(m_SQW_internal_state));
}
-
diff --git a/src/emu/machine/rtc65271.h b/src/emu/machine/rtc65271.h
index 9d5a0d082ed..54b3d2a853b 100644
--- a/src/emu/machine/rtc65271.h
+++ b/src/emu/machine/rtc65271.h
@@ -17,12 +17,12 @@
struct rtc65271_interface
{
- devcb_write_line m_interrupt_cb;
+ devcb_write_line m_interrupt_cb;
};
// ======================> rtc65271_device
-class rtc65271_device : public device_t,
+class rtc65271_device : public device_t,
public device_nvram_interface,
public rtc65271_interface
{
@@ -30,9 +30,9 @@ public:
// construction/destruction
rtc65271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
// device_nvram_interface overrides
virtual void nvram_default();
virtual void nvram_read(emu_file &file);
@@ -55,7 +55,7 @@ private:
void rtc_begin_update_cb();
void rtc_end_update_cb();
/* 64 8-bit registers (10 clock registers, 4 control/status registers, and
- 50 bytes of user RAM) */
+ 50 bytes of user RAM) */
UINT8 m_regs[64];
UINT8 m_cur_reg;
diff --git a/src/emu/machine/rtc9701.c b/src/emu/machine/rtc9701.c
index 7812a858696..4ff82073a72 100644
--- a/src/emu/machine/rtc9701.c
+++ b/src/emu/machine/rtc9701.c
@@ -32,10 +32,10 @@ const device_type rtc9701 = &device_creator<rtc9701_device>;
rtc9701_device::rtc9701_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, rtc9701, "rtc9701", tag, owner, clock),
- device_nvram_interface(mconfig, *this),
- m_latch(0),
- m_reset_line(CLEAR_LINE),
- m_clock_line(CLEAR_LINE)
+ device_nvram_interface(mconfig, *this),
+ m_latch(0),
+ m_reset_line(CLEAR_LINE),
+ m_clock_line(CLEAR_LINE)
{
}
@@ -47,14 +47,14 @@ void rtc9701_device::timer_callback()
m_rtc.sec++;
- if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; }
- if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; }
- if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; }
- if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; }
- if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; }
- if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday<<=1; m_rtc.hour = 0; }
- if(m_rtc.wday & 0x80) { m_rtc.wday = 1; }
- if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; }
+ if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; }
+ if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; }
+ if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; }
+ if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; }
+ if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; }
+ if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday<<=1; m_rtc.hour = 0; }
+ if(m_rtc.wday & 0x80) { m_rtc.wday = 1; }
+ if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; }
/* TODO: crude leap year support */
dpm_count = (m_rtc.month & 0xf) + (((m_rtc.month & 0x10) >> 4)*10)-1;
@@ -65,10 +65,10 @@ void rtc9701_device::timer_callback()
{ m_rtc.month++; m_rtc.day = 0x01; }
}
else if((m_rtc.day & 0xff) >= dpm[dpm_count]+1){ m_rtc.month++; m_rtc.day = 0x01; }
- if((m_rtc.month & 0x0f) >= 0x0a) { m_rtc.month = 0x10; }
- if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; }
- if((m_rtc.year & 0x0f) >= 0x0a) { m_rtc.year+=0x10; m_rtc.year&=0xf0; }
- if((m_rtc.year & 0xf0) >= 0xa0) { m_rtc.year = 0; } //2000-2099 possible timeframe
+ if((m_rtc.month & 0x0f) >= 0x0a) { m_rtc.month = 0x10; }
+ if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; }
+ if((m_rtc.year & 0x0f) >= 0x0a) { m_rtc.year+=0x10; m_rtc.year&=0xf0; }
+ if((m_rtc.year & 0xf0) >= 0xa0) { m_rtc.year = 0; } //2000-2099 possible timeframe
}
TIMER_CALLBACK( rtc9701_device::rtc_inc_callback )
@@ -467,5 +467,3 @@ WRITE_LINE_MEMBER( rtc9701_device::set_clock_line )
}
}
}
-
-
diff --git a/src/emu/machine/rtc9701.h b/src/emu/machine/rtc9701.h
index 5cc6bfbd387..9598f893eda 100644
--- a/src/emu/machine/rtc9701.h
+++ b/src/emu/machine/rtc9701.h
@@ -45,7 +45,7 @@ struct rtc_regs_t
// ======================> rtc9701_device
-class rtc9701_device : public device_t,
+class rtc9701_device : public device_t,
public device_nvram_interface
{
public:
@@ -75,9 +75,9 @@ protected:
static TIMER_CALLBACK( rtc_inc_callback );
- int m_latch;
- int m_reset_line;
- int m_clock_line;
+ int m_latch;
+ int m_reset_line;
+ int m_clock_line;
rtc9701_state_t rtc_state;
diff --git a/src/emu/machine/s3520cf.c b/src/emu/machine/s3520cf.c
index 16494011520..39f9abb1f11 100644
--- a/src/emu/machine/s3520cf.c
+++ b/src/emu/machine/s3520cf.c
@@ -46,14 +46,14 @@ void s3520cf_device::timer_callback()
m_rtc.sec++;
- if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; }
- if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; }
- if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; }
- if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; }
- if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; }
- if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday++; m_rtc.hour = 0; }
- if(m_rtc.wday >= 7) { m_rtc.wday = 0; }
- if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; }
+ if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; }
+ if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; }
+ if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; }
+ if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; }
+ if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; }
+ if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday++; m_rtc.hour = 0; }
+ if(m_rtc.wday >= 7) { m_rtc.wday = 0; }
+ if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; }
/* TODO: crude leap year support */
dpm_count = (m_rtc.month & 0xf) + (((m_rtc.month & 0x10) >> 4)*10)-1;
@@ -64,10 +64,10 @@ void s3520cf_device::timer_callback()
{ m_rtc.month++; m_rtc.day = 0x01; }
}
else if((m_rtc.day & 0xff) >= dpm[dpm_count]+1){ m_rtc.month++; m_rtc.day = 0x01; }
- if((m_rtc.month & 0x0f) >= 0x0a) { m_rtc.month = 0x10; }
- if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; }
- if((m_rtc.year & 0x0f) >= 0x0a) { m_rtc.year+=0x10; m_rtc.year&=0xf0; }
- if((m_rtc.year & 0xf0) >= 0xa0) { m_rtc.year = 0; } //1901-2000 possible timeframe
+ if((m_rtc.month & 0x0f) >= 0x0a) { m_rtc.month = 0x10; }
+ if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; }
+ if((m_rtc.year & 0x0f) >= 0x0a) { m_rtc.year+=0x10; m_rtc.year&=0xf0; }
+ if((m_rtc.year & 0xf0) >= 0xa0) { m_rtc.year = 0; } //1901-2000 possible timeframe
}
TIMER_CALLBACK( s3520cf_device::rtc_inc_callback )
diff --git a/src/emu/machine/s3520cf.h b/src/emu/machine/s3520cf.h
index 54724077144..789c4be7664 100644
--- a/src/emu/machine/s3520cf.h
+++ b/src/emu/machine/s3520cf.h
@@ -37,7 +37,7 @@ struct rtc_regs_t
// ======================> s3520cf_device
-class s3520cf_device : public device_t
+class s3520cf_device : public device_t
{
public:
// construction/destruction
diff --git a/src/emu/machine/s3c2400.c b/src/emu/machine/s3c2400.c
index 60479565893..a9db12f0670 100644
--- a/src/emu/machine/s3c2400.c
+++ b/src/emu/machine/s3c2400.c
@@ -69,7 +69,7 @@ DEVICE_START( s3c2400 )
const device_type S3C2400 = &device_creator<s3c2400_device>;
s3c2400_device::s3c2400_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, S3C2400, "Samsung S3C2400", tag, owner, clock)
+ : device_t(mconfig, S3C2400, "Samsung S3C2400", tag, owner, clock)
{
m_token = global_alloc_clear(s3c24xx_t);
}
@@ -106,4 +106,3 @@ void s3c2400_uart_fifo_w( device_t *device, int uart, UINT8 data)
{
s3c24xx_uart_fifo_w( device, uart, data);
}
-
diff --git a/src/emu/machine/s3c2400.h b/src/emu/machine/s3c2400.h
index f1e1ee4f4d5..b38b44fd8ed 100644
--- a/src/emu/machine/s3c2400.h
+++ b/src/emu/machine/s3c2400.h
@@ -16,8 +16,8 @@
#define S3C2400_TAG "s3c2400"
#define MCFG_S3C2400_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD(_tag, S3C2400, _clock) \
- MCFG_DEVICE_CONFIG(_config)
+ MCFG_DEVICE_ADD(_tag, S3C2400, _clock) \
+ MCFG_DEVICE_CONFIG(_config)
#define S3C2400_INTERFACE(name) \
const s3c2400_interface(name) =
@@ -372,19 +372,19 @@ void s3c2400_uart_fifo_w( device_t *device, int uart, UINT8 data);
#define S3C24XX_INT_EINT1 1
#define S3C24XX_INT_EINT0 0
-#define S3C24XX_BPPMODE_STN_01 0x00
-#define S3C24XX_BPPMODE_STN_02 0x01
-#define S3C24XX_BPPMODE_STN_04 0x02
-#define S3C24XX_BPPMODE_STN_08 0x03
-#define S3C24XX_BPPMODE_STN_12_P 0x04
-#define S3C24XX_BPPMODE_STN_12_U 0x05
-#define S3C24XX_BPPMODE_STN_16 0x06
-#define S3C24XX_BPPMODE_TFT_01 0x08
-#define S3C24XX_BPPMODE_TFT_02 0x09
-#define S3C24XX_BPPMODE_TFT_04 0x0A
-#define S3C24XX_BPPMODE_TFT_08 0x0B
-#define S3C24XX_BPPMODE_TFT_16 0x0C
-#define S3C24XX_BPPMODE_TFT_24 0x0D
+#define S3C24XX_BPPMODE_STN_01 0x00
+#define S3C24XX_BPPMODE_STN_02 0x01
+#define S3C24XX_BPPMODE_STN_04 0x02
+#define S3C24XX_BPPMODE_STN_08 0x03
+#define S3C24XX_BPPMODE_STN_12_P 0x04
+#define S3C24XX_BPPMODE_STN_12_U 0x05
+#define S3C24XX_BPPMODE_STN_16 0x06
+#define S3C24XX_BPPMODE_TFT_01 0x08
+#define S3C24XX_BPPMODE_TFT_02 0x09
+#define S3C24XX_BPPMODE_TFT_04 0x0A
+#define S3C24XX_BPPMODE_TFT_08 0x0B
+#define S3C24XX_BPPMODE_TFT_16 0x0C
+#define S3C24XX_BPPMODE_TFT_24 0x0D
#define S3C24XX_PNRMODE_STN_04_DS 0
#define S3C24XX_PNRMODE_STN_04_SS 1
diff --git a/src/emu/machine/s3c2410.c b/src/emu/machine/s3c2410.c
index f02dd3e048a..4b4a83fa38f 100644
--- a/src/emu/machine/s3c2410.c
+++ b/src/emu/machine/s3c2410.c
@@ -72,7 +72,7 @@ DEVICE_START( s3c2410 )
const device_type S3C2410 = &device_creator<s3c2410_device>;
s3c2410_device::s3c2410_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, S3C2410, "Samsung S3C2410", tag, owner, clock)
+ : device_t(mconfig, S3C2410, "Samsung S3C2410", tag, owner, clock)
{
m_token = global_alloc_clear(s3c24xx_t);
}
@@ -130,4 +130,3 @@ void s3c2410_request_eint( device_t *device, UINT32 number)
{
s3c24xx_request_eint( device, number);
}
-
diff --git a/src/emu/machine/s3c2410.h b/src/emu/machine/s3c2410.h
index 98944c1eac9..48f442c42b7 100644
--- a/src/emu/machine/s3c2410.h
+++ b/src/emu/machine/s3c2410.h
@@ -16,8 +16,8 @@
#define S3C2410_TAG "s3c2410"
#define MCFG_S3C2410_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD(_tag, S3C2410, _clock) \
- MCFG_DEVICE_CONFIG(_config)
+ MCFG_DEVICE_ADD(_tag, S3C2410, _clock) \
+ MCFG_DEVICE_CONFIG(_config)
#define S3C2410_INTERFACE(name) \
const s3c2410_interface(name) =
@@ -458,19 +458,19 @@ static const UINT32 MAP_SUBINT_TO_INT[11] =
S3C24XX_INT_ADC, S3C24XX_INT_ADC
};
-#define S3C24XX_BPPMODE_STN_01 0x00
-#define S3C24XX_BPPMODE_STN_02 0x01
-#define S3C24XX_BPPMODE_STN_04 0x02
-#define S3C24XX_BPPMODE_STN_08 0x03
-#define S3C24XX_BPPMODE_STN_12_P 0x04
-#define S3C24XX_BPPMODE_STN_12_U 0x05
-#define S3C24XX_BPPMODE_STN_16 0x06
-#define S3C24XX_BPPMODE_TFT_01 0x08
-#define S3C24XX_BPPMODE_TFT_02 0x09
-#define S3C24XX_BPPMODE_TFT_04 0x0A
-#define S3C24XX_BPPMODE_TFT_08 0x0B
-#define S3C24XX_BPPMODE_TFT_16 0x0C
-#define S3C24XX_BPPMODE_TFT_24 0x0D
+#define S3C24XX_BPPMODE_STN_01 0x00
+#define S3C24XX_BPPMODE_STN_02 0x01
+#define S3C24XX_BPPMODE_STN_04 0x02
+#define S3C24XX_BPPMODE_STN_08 0x03
+#define S3C24XX_BPPMODE_STN_12_P 0x04
+#define S3C24XX_BPPMODE_STN_12_U 0x05
+#define S3C24XX_BPPMODE_STN_16 0x06
+#define S3C24XX_BPPMODE_TFT_01 0x08
+#define S3C24XX_BPPMODE_TFT_02 0x09
+#define S3C24XX_BPPMODE_TFT_04 0x0A
+#define S3C24XX_BPPMODE_TFT_08 0x0B
+#define S3C24XX_BPPMODE_TFT_16 0x0C
+#define S3C24XX_BPPMODE_TFT_24 0x0D
#define S3C24XX_PNRMODE_STN_04_DS 0
#define S3C24XX_PNRMODE_STN_04_SS 1
diff --git a/src/emu/machine/s3c2440.c b/src/emu/machine/s3c2440.c
index c5bf9408255..e5170cfc57a 100644
--- a/src/emu/machine/s3c2440.c
+++ b/src/emu/machine/s3c2440.c
@@ -74,7 +74,7 @@ DEVICE_START( s3c2440 )
const device_type S3C2440 = &device_creator<s3c2440_device>;
s3c2440_device::s3c2440_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, S3C2440, "Samsung S3C2440", tag, owner, clock)
+ : device_t(mconfig, S3C2440, "Samsung S3C2440", tag, owner, clock)
{
m_token = global_alloc_clear(s3c24xx_t);
}
diff --git a/src/emu/machine/s3c2440.h b/src/emu/machine/s3c2440.h
index cffcd69b0d3..73082799272 100644
--- a/src/emu/machine/s3c2440.h
+++ b/src/emu/machine/s3c2440.h
@@ -14,8 +14,8 @@
#define S3C2440_TAG "s3c2440"
#define MCFG_S3C2440_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD(_tag, S3C2440, _clock) \
- MCFG_DEVICE_CONFIG(_config)
+ MCFG_DEVICE_ADD(_tag, S3C2440, _clock) \
+ MCFG_DEVICE_CONFIG(_config)
#define S3C2440_INTERFACE(name) \
const s3c2440_interface(name) =
@@ -486,19 +486,19 @@ static const UINT32 MAP_SUBINT_TO_INT[15] =
S3C24XX_INT_WDT_AC97, S3C24XX_INT_WDT_AC97
};
-#define S3C24XX_BPPMODE_STN_01 0x00
-#define S3C24XX_BPPMODE_STN_02 0x01
-#define S3C24XX_BPPMODE_STN_04 0x02
-#define S3C24XX_BPPMODE_STN_08 0x03
-#define S3C24XX_BPPMODE_STN_12_P 0x04
-#define S3C24XX_BPPMODE_STN_12_U 0x05
-#define S3C24XX_BPPMODE_STN_16 0x06
-#define S3C24XX_BPPMODE_TFT_01 0x08
-#define S3C24XX_BPPMODE_TFT_02 0x09
-#define S3C24XX_BPPMODE_TFT_04 0x0A
-#define S3C24XX_BPPMODE_TFT_08 0x0B
-#define S3C24XX_BPPMODE_TFT_16 0x0C
-#define S3C24XX_BPPMODE_TFT_24 0x0D
+#define S3C24XX_BPPMODE_STN_01 0x00
+#define S3C24XX_BPPMODE_STN_02 0x01
+#define S3C24XX_BPPMODE_STN_04 0x02
+#define S3C24XX_BPPMODE_STN_08 0x03
+#define S3C24XX_BPPMODE_STN_12_P 0x04
+#define S3C24XX_BPPMODE_STN_12_U 0x05
+#define S3C24XX_BPPMODE_STN_16 0x06
+#define S3C24XX_BPPMODE_TFT_01 0x08
+#define S3C24XX_BPPMODE_TFT_02 0x09
+#define S3C24XX_BPPMODE_TFT_04 0x0A
+#define S3C24XX_BPPMODE_TFT_08 0x0B
+#define S3C24XX_BPPMODE_TFT_16 0x0C
+#define S3C24XX_BPPMODE_TFT_24 0x0D
#define S3C24XX_PNRMODE_STN_04_DS 0
#define S3C24XX_PNRMODE_STN_04_SS 1
diff --git a/src/emu/machine/s3c24xx.c b/src/emu/machine/s3c24xx.c
index bb09f9c7867..5756bbb34b4 100644
--- a/src/emu/machine/s3c24xx.c
+++ b/src/emu/machine/s3c24xx.c
@@ -1978,43 +1978,43 @@ static WRITE32_DEVICE_HANDLER( s3c24xx_gpio_w )
{
case S3C24XX_GPADAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_A, gpio->regs.gpacon ^ 0xFFFFFFFF, data & S3C24XX_GPADAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_A, gpio->regs.gpacon ^ 0xFFFFFFFF, data & S3C24XX_GPADAT_MASK);
}
break;
case S3C24XX_GPBDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_B, s3c24xx_gpio_get_mask( gpio->regs.gpbcon, 1) & S3C24XX_GPBDAT_MASK, data & S3C24XX_GPBDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_B, s3c24xx_gpio_get_mask( gpio->regs.gpbcon, 1) & S3C24XX_GPBDAT_MASK, data & S3C24XX_GPBDAT_MASK);
}
break;
case S3C24XX_GPCDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_C, s3c24xx_gpio_get_mask( gpio->regs.gpccon, 1) & S3C24XX_GPCDAT_MASK, data & S3C24XX_GPCDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_C, s3c24xx_gpio_get_mask( gpio->regs.gpccon, 1) & S3C24XX_GPCDAT_MASK, data & S3C24XX_GPCDAT_MASK);
}
break;
case S3C24XX_GPDDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_D, s3c24xx_gpio_get_mask( gpio->regs.gpdcon, 1) & S3C24XX_GPDDAT_MASK, data & S3C24XX_GPDDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_D, s3c24xx_gpio_get_mask( gpio->regs.gpdcon, 1) & S3C24XX_GPDDAT_MASK, data & S3C24XX_GPDDAT_MASK);
}
break;
case S3C24XX_GPEDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_E, s3c24xx_gpio_get_mask( gpio->regs.gpecon, 1) & S3C24XX_GPEDAT_MASK, data & S3C24XX_GPEDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_E, s3c24xx_gpio_get_mask( gpio->regs.gpecon, 1) & S3C24XX_GPEDAT_MASK, data & S3C24XX_GPEDAT_MASK);
}
break;
case S3C24XX_GPFDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_F, s3c24xx_gpio_get_mask( gpio->regs.gpfcon, 1) & S3C24XX_GPFDAT_MASK, data & S3C24XX_GPFDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_F, s3c24xx_gpio_get_mask( gpio->regs.gpfcon, 1) & S3C24XX_GPFDAT_MASK, data & S3C24XX_GPFDAT_MASK);
}
break;
case S3C24XX_GPGDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_G, s3c24xx_gpio_get_mask( gpio->regs.gpgcon, 1) & S3C24XX_GPGDAT_MASK, data & S3C24XX_GPGDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_G, s3c24xx_gpio_get_mask( gpio->regs.gpgcon, 1) & S3C24XX_GPGDAT_MASK, data & S3C24XX_GPGDAT_MASK);
}
break;
#if defined(DEVICE_S3C2410) || defined(DEVICE_S3C2440)
case S3C24XX_GPHDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_H, s3c24xx_gpio_get_mask( gpio->regs.gphcon, 1) & S3C24XX_GPHDAT_MASK, data & S3C24XX_GPHDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_H, s3c24xx_gpio_get_mask( gpio->regs.gphcon, 1) & S3C24XX_GPHDAT_MASK, data & S3C24XX_GPHDAT_MASK);
}
break;
case S3C24XX_EINTPEND :
@@ -2037,7 +2037,7 @@ static WRITE32_DEVICE_HANDLER( s3c24xx_gpio_w )
#if defined(DEVICE_S3C2440)
case S3C24XX_GPJDAT :
{
- iface_gpio_port_w( device, S3C24XX_GPIO_PORT_J, s3c24xx_gpio_get_mask( gpio->regs.gpjcon, 1) & S3C24XX_GPJDAT_MASK, data & S3C24XX_GPJDAT_MASK);
+ iface_gpio_port_w( device, S3C24XX_GPIO_PORT_J, s3c24xx_gpio_get_mask( gpio->regs.gpjcon, 1) & S3C24XX_GPJDAT_MASK, data & S3C24XX_GPJDAT_MASK);
}
break;
#endif
diff --git a/src/emu/machine/scsibus.c b/src/emu/machine/scsibus.c
index c58c6798cc5..6ea20167a54 100644
--- a/src/emu/machine/scsibus.c
+++ b/src/emu/machine/scsibus.c
@@ -32,7 +32,7 @@ void scsibus_device::scsi_update()
}
scsibus_device::scsibus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, SCSIBUS, "SCSI bus", tag, owner, clock)
+ : device_t(mconfig, SCSIBUS, "SCSI bus", tag, owner, clock)
{
}
diff --git a/src/emu/machine/scsicb.c b/src/emu/machine/scsicb.c
index 88c846295bf..a3fe6503cb2 100644
--- a/src/emu/machine/scsicb.c
+++ b/src/emu/machine/scsicb.c
@@ -27,7 +27,7 @@ INLINE void ATTR_PRINTF( 3, 4 ) verboselog( int n_level, running_machine &machin
}
scsicb_device::scsicb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : scsidev_device(mconfig, SCSICB, "SCSI callback", tag, owner, clock),
+ : scsidev_device(mconfig, SCSICB, "SCSI callback", tag, owner, clock),
m_bsy_handler(*this),
m_sel_handler(*this),
m_cd_handler(*this),
diff --git a/src/emu/machine/scsicd.c b/src/emu/machine/scsicd.c
index 89d2d16818a..d9d2863c6f2 100644
--- a/src/emu/machine/scsicd.c
+++ b/src/emu/machine/scsicd.c
@@ -387,18 +387,18 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
memset( data, 0, dataLength );
- data[0] = 0x71; // deferred error
+ data[0] = 0x71; // deferred error
cdda = cdda_from_cdrom(machine(), cdrom);
if (cdda != NULL && cdda_audio_active(cdda))
{
data[12] = 0x00;
- data[13] = 0x11; // AUDIO PLAY OPERATION IN PROGRESS
+ data[13] = 0x11; // AUDIO PLAY OPERATION IN PROGRESS
}
else if (play_err_flag)
{
play_err_flag = 0;
- data[12] = 0x64; // ILLEGAL MODE FOR THIS TRACK
+ data[12] = 0x64; // ILLEGAL MODE FOR THIS TRACK
data[13] = 0x00;
}
// (else 00/00 means no error to report)
@@ -421,7 +421,7 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
logerror("SCSICD: READ CAPACITY\n");
temp = cdrom_get_track_start(cdrom, 0xaa);
- temp--; // return the last used block on the disc
+ temp--; // return the last used block on the disc
data[0] = (temp>>24) & 0xff;
data[1] = (temp>>16) & 0xff;
@@ -468,7 +468,7 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
case 0x42: // READ SUB-CHANNEL
switch (command[3])
{
- case 1: // return current position
+ case 1: // return current position
{
int audio_active;
int msf;
@@ -488,23 +488,23 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
{
if (cdda_audio_paused(cdda))
{
- data[1] = 0x12; // audio is paused
+ data[1] = 0x12; // audio is paused
}
else
{
- data[1] = 0x11; // audio in progress
+ data[1] = 0x11; // audio in progress
}
}
else
{
if (cdda != NULL && cdda_audio_ended(cdda))
{
- data[1] = 0x13; // ended successfully
+ data[1] = 0x13; // ended successfully
}
else
{
// data[1] = 0x14; // stopped due to error
- data[1] = 0x15; // No current audio status to return
+ data[1] = 0x15; // No current audio status to return
}
}
@@ -519,11 +519,11 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
}
data[2] = 0;
- data[3] = 12; // data length
- data[4] = 0x01; // sub-channel format code
+ data[3] = 12; // data length
+ data[4] = 0x01; // sub-channel format code
data[5] = 0x10 | (audio_active ? 0 : 4);
- data[6] = cdrom_get_track(cdrom, last_lba) + 1; // track
- data[7] = 0; // index
+ data[6] = cdrom_get_track(cdrom, last_lba) + 1; // track
+ data[7] = 0; // index
last_phys_frame = last_lba;
@@ -571,15 +571,15 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
case 0x43: // READ TOC
/*
- Track numbers are problematic here: 0 = lead-in, 0xaa = lead-out.
- That makes sense in terms of how real-world CDs are referred to, but
- our internal routines for tracks use "0" as track 1. That probably
- should be fixed...
- */
+ Track numbers are problematic here: 0 = lead-in, 0xaa = lead-out.
+ That makes sense in terms of how real-world CDs are referred to, but
+ our internal routines for tracks use "0" as track 1. That probably
+ should be fixed...
+ */
logerror("SCSICD: READ TOC, format = %d time=%d\n", command[2]&0xf,(command[1]>>1)&1);
switch (command[2] & 0x0f)
{
- case 0: // normal
+ case 0: // normal
{
int start_trk;
int end_trk;
@@ -652,10 +652,10 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
switch (command[2] & 0x3f)
{
- case 0xe: // CD Audio control page
- data[0] = 0x8e; // page E, parameter is savable
- data[1] = 0x0e; // page length
- data[2] = 0x04; // IMMED = 1, SOTC = 0
+ case 0xe: // CD Audio control page
+ data[0] = 0x8e; // page E, parameter is savable
+ data[1] = 0x0e; // page length
+ data[2] = 0x04; // IMMED = 1, SOTC = 0
data[3] = data[4] = data[5] = data[6] = data[7] = 0; // reserved
// connect each audio channel to 1 output port
@@ -667,9 +667,9 @@ void scsicd_device::ReadData( UINT8 *data, int dataLength )
// indicate max volume
data[9] = data[11] = data[13] = data[15] = 0xff;
break;
- case 0x2a: // Page capabilities
+ case 0x2a: // Page capabilities
data[0] = 0x2a;
- data[1] = 0x14; // page length
+ data[1] = 0x14; // page length
data[2] = 0x00; data[3] = 0x00; // CD-R only
data[4] = 0x01; // can play audio
data[5] = 0;
@@ -714,7 +714,7 @@ void scsicd_device::WriteData( UINT8 *data, int dataLength )
switch (data[0] & 0x3f)
{
- case 0x0: // vendor-specific
+ case 0x0: // vendor-specific
// check for SGI extension to force 512-byte blocks
if ((data[3] == 8) && (data[10] == 2))
{
@@ -729,7 +729,7 @@ void scsicd_device::WriteData( UINT8 *data, int dataLength )
}
break;
- case 0xe: // audio page
+ case 0xe: // audio page
logerror("Ch 0 route: %x vol: %x\n", data[8], data[9]);
logerror("Ch 1 route: %x vol: %x\n", data[10], data[11]);
logerror("Ch 2 route: %x vol: %x\n", data[12], data[13]);
diff --git a/src/emu/machine/scsihd.c b/src/emu/machine/scsihd.c
index 22661219479..5a7fa200926 100644
--- a/src/emu/machine/scsihd.c
+++ b/src/emu/machine/scsihd.c
@@ -169,15 +169,15 @@ void scsihd_device::ReadData( UINT8 *data, int dataLength )
switch ( command[0] )
{
- case 0x03: // REQUEST SENSE
- data[0] = 0x80; // valid sense
+ case 0x03: // REQUEST SENSE
+ data[0] = 0x80; // valid sense
for (i = 1; i < 12; i++)
{
data[i] = 0;
}
break;
- case 0x12: // INQUIRY
+ case 0x12: // INQUIRY
memset( data, 0, dataLength );
data[0] = 0x00; // device is direct-access (e.g. hard disk)
data[1] = 0x00; // media is not removable
@@ -189,7 +189,7 @@ void scsihd_device::ReadData( UINT8 *data, int dataLength )
strcpy((char *)&data[32], "1.0");
break;
- case 0x1a: // MODE SENSE (6 byte)
+ case 0x1a: // MODE SENSE (6 byte)
// special Apple ID page. this is a vendor-specific page,
// so unless collisions occur there should be no need
// to change it.
diff --git a/src/emu/machine/scsihle.c b/src/emu/machine/scsihle.c
index ee289685a8a..3e9aa62b43c 100644
--- a/src/emu/machine/scsihle.c
+++ b/src/emu/machine/scsihle.c
@@ -29,7 +29,7 @@ void scsihle_device::device_start()
phase = SCSI_PHASE_BUS_FREE;
}
-#define SCSI_SENSE_SIZE 4
+#define SCSI_SENSE_SIZE 4
void scsihle_device::ExecCommand( int *transferLength )
{
@@ -154,38 +154,38 @@ static const char *const phasenames[] =
#define SCSI_CMD_BUFFER_READ ( 0x3c )
// scsihd
-#define SCSI_CMD_FORMAT_UNIT 0x04
-#define SCSI_CMD_SEARCH_DATA_EQUAL 0x31
-#define SCSI_CMD_READ_DEFECT 0x37
+#define SCSI_CMD_FORMAT_UNIT 0x04
+#define SCSI_CMD_SEARCH_DATA_EQUAL 0x31
+#define SCSI_CMD_READ_DEFECT 0x37
-#define IS_COMMAND(cmd) (command[0]==cmd)
-#define IS_READ_COMMAND() ((command[0]==0x08) || (command[0]==0x28) || (command[0]==0xa8))
-#define IS_WRITE_COMMAND() ((command[0]==0x0a) || (command[0]==0x2a))
+#define IS_COMMAND(cmd) (command[0]==cmd)
+#define IS_READ_COMMAND() ((command[0]==0x08) || (command[0]==0x28) || (command[0]==0xa8))
+#define IS_WRITE_COMMAND() ((command[0]==0x0a) || (command[0]==0x2a))
-#define FORMAT_UNIT_TIMEOUT 5
+#define FORMAT_UNIT_TIMEOUT 5
struct adaptec_sense_t
{
// parameter list
- UINT8 reserved1[3];
- UINT8 length;
+ UINT8 reserved1[3];
+ UINT8 length;
// descriptor list
- UINT8 density;
- UINT8 reserved2[4];
- UINT8 block_size[3];
+ UINT8 density;
+ UINT8 reserved2[4];
+ UINT8 block_size[3];
// drive parameter list
- UINT8 format_code;
- UINT8 cylinder_count[2];
- UINT8 head_count;
- UINT8 reduced_write[2];
- UINT8 write_precomp[2];
- UINT8 landing_zone;
- UINT8 step_pulse_code;
- UINT8 bit_flags;
- UINT8 sectors_per_track;
+ UINT8 format_code;
+ UINT8 cylinder_count[2];
+ UINT8 head_count;
+ UINT8 reduced_write[2];
+ UINT8 write_precomp[2];
+ UINT8 landing_zone;
+ UINT8 step_pulse_code;
+ UINT8 bit_flags;
+ UINT8 sectors_per_track;
};
/*
diff --git a/src/emu/machine/secflash.c b/src/emu/machine/secflash.c
index 0744d86660b..0e6876760fa 100644
--- a/src/emu/machine/secflash.c
+++ b/src/emu/machine/secflash.c
@@ -2,9 +2,9 @@
#include "machine/secflash.h"
device_secure_serial_flash::device_secure_serial_flash(const machine_config &mconfig,
- device_type type,
- const char *name, const char *tag,
- device_t *owner, UINT32 clock) :
+ device_type type,
+ const char *name, const char *tag,
+ device_t *owner, UINT32 clock) :
device_t(mconfig, type, name, tag, owner, clock),
device_nvram_interface(mconfig, *this)
{
diff --git a/src/emu/machine/secflash.h b/src/emu/machine/secflash.h
index 907238a2bd1..4a2e441d65e 100644
--- a/src/emu/machine/secflash.h
+++ b/src/emu/machine/secflash.h
@@ -6,7 +6,7 @@
#include "emu.h"
class device_secure_serial_flash : public device_t,
- public device_nvram_interface
+ public device_nvram_interface
{
public:
void cs_w(bool cs);
diff --git a/src/emu/machine/seibu_cop.c b/src/emu/machine/seibu_cop.c
index a15751f0d44..997255cc6b2 100644
--- a/src/emu/machine/seibu_cop.c
+++ b/src/emu/machine/seibu_cop.c
@@ -68,8 +68,8 @@ inline void seibu_cop_device::write_word(offs_t address, UINT16 data)
seibu_cop_device::seibu_cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEIBU_COP, "seibu_cop", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("io", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(seibu_cop_io))
+ device_memory_interface(mconfig, *this),
+ m_space_config("io", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(seibu_cop_io))
{
}
@@ -178,14 +178,14 @@ WRITE16_MEMBER(seibu_cop_device::pal_brightness_mode_w)
WRITE16_MEMBER(seibu_cop_device::dma_unk_param_w)
{
/*
- This sets up a DMA mode of some sort
- 0x0e00: grainbow, cupsoc
- 0x0a00: legionna, godzilla, denjinmk
- 0x0600: heatbrl
- 0x1e00: zeroteam, xsedae
- raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
- (both only uses 0x14 and 0x15 as DMAs afaik)
- */
+ This sets up a DMA mode of some sort
+ 0x0e00: grainbow, cupsoc
+ 0x0a00: legionna, godzilla, denjinmk
+ 0x0600: heatbrl
+ 0x1e00: zeroteam, xsedae
+ raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
+ (both only uses 0x14 and 0x15 as DMAs afaik)
+ */
COMBINE_DATA(&m_dma_unk_param);
}
@@ -253,10 +253,10 @@ void seibu_cop_device::normal_dma_transfer(void)
/* RE from Seibu Cup Soccer bootleg */
const UINT8 seibu_cop_device::fade_table(int v)
{
- int low = v & 0x001f;
- int high = v & 0x03e0;
+ int low = v & 0x001f;
+ int high = v & 0x03e0;
- return (low * (high | (high >> 5)) + 0x210) >> 10;
+ return (low * (high | (high >> 5)) + 0x210) >> 10;
}
void seibu_cop_device::palette_dma_transfer(void)
@@ -264,18 +264,18 @@ void seibu_cop_device::palette_dma_transfer(void)
UINT32 src,dst,size,i;
/*
- Apparently all of those are just different DMA channels, brightness effects are done through a RAM table and the pal_brightness_val / mode
- 0x80 is used by Legionnaire
- 0x81 is used by SD Gundam and Godzilla
- 0x82 is used by Zero Team and X Se Dae
- 0x86 is used by Seibu Cup Soccer
- 0x87 is used by Denjin Makai
-
- TODO:
- - Denjin Makai mode 4 is totally guessworked.
- - SD Gundam doesn't fade colors correctly, it should have the text layer / sprites with normal gradient and the rest dimmed in most cases,
- presumably bad RAM table or bad algorithm
- */
+ Apparently all of those are just different DMA channels, brightness effects are done through a RAM table and the pal_brightness_val / mode
+ 0x80 is used by Legionnaire
+ 0x81 is used by SD Gundam and Godzilla
+ 0x82 is used by Zero Team and X Se Dae
+ 0x86 is used by Seibu Cup Soccer
+ 0x87 is used by Denjin Makai
+
+ TODO:
+ - Denjin Makai mode 4 is totally guessworked.
+ - SD Gundam doesn't fade colors correctly, it should have the text layer / sprites with normal gradient and the rest dimmed in most cases,
+ presumably bad RAM table or bad algorithm
+ */
src = (m_dma_src[m_dma_trigger] << 6);
dst = (m_dma_dst[m_dma_trigger] << 6);
@@ -386,7 +386,7 @@ WRITE16_MEMBER( seibu_cop_device::dma_write_trigger_w )
{
case 0x008: normal_dma_transfer(); break;
case 0x010: break; // private buffer copy, TODO
- case 0x080: palette_dma_transfer(); break;
+ case 0x080: palette_dma_transfer(); break;
case 0x110: fill_word_transfer(); break; // Godzilla uses this
case 0x118: fill_dword_transfer(); break;
default:
diff --git a/src/emu/machine/seibu_cop.h b/src/emu/machine/seibu_cop.h
index 6f903c8233b..d13326cb19f 100644
--- a/src/emu/machine/seibu_cop.h
+++ b/src/emu/machine/seibu_cop.h
@@ -25,12 +25,12 @@ Template for skeleton device
struct seibu_cop_interface
{
// memory accessors
- devcb_read16 m_in_byte_cb;
- devcb_read16 m_in_word_cb;
- devcb_read16 m_in_dword_cb;
- devcb_write16 m_out_byte_cb;
- devcb_write16 m_out_word_cb;
- devcb_write16 m_out_dword_cb;
+ devcb_read16 m_in_byte_cb;
+ devcb_read16 m_in_word_cb;
+ devcb_read16 m_in_dword_cb;
+ devcb_write16 m_out_byte_cb;
+ devcb_write16 m_out_word_cb;
+ devcb_write16 m_out_dword_cb;
};
@@ -40,7 +40,7 @@ struct seibu_cop_interface
// ======================> seibu_cop_device
-class seibu_cop_device : public device_t,
+class seibu_cop_device : public device_t,
public device_memory_interface,
public seibu_cop_interface
{
@@ -73,12 +73,12 @@ protected:
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
private:
- devcb_resolved_read16 m_in_byte_func;
- devcb_resolved_read16 m_in_word_func;
- devcb_resolved_read16 m_in_dword_func;
- devcb_resolved_write16 m_out_byte_func;
- devcb_resolved_write16 m_out_word_func;
- devcb_resolved_write16 m_out_dword_func;
+ devcb_resolved_read16 m_in_byte_func;
+ devcb_resolved_read16 m_in_word_func;
+ devcb_resolved_read16 m_in_dword_func;
+ devcb_resolved_write16 m_out_byte_func;
+ devcb_resolved_write16 m_out_word_func;
+ devcb_resolved_write16 m_out_dword_func;
inline UINT16 read_word(offs_t address);
inline void write_word(offs_t address, UINT16 data);
@@ -88,7 +88,7 @@ private:
UINT32 m_fill_val;
UINT16 m_pal_brightness_val, m_pal_brightness_mode;
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
const UINT8 fade_table(int v);
void normal_dma_transfer(void);
diff --git a/src/emu/machine/smc91c9x.c b/src/emu/machine/smc91c9x.c
index ea6cae8090a..70866ddcba9 100644
--- a/src/emu/machine/smc91c9x.c
+++ b/src/emu/machine/smc91c9x.c
@@ -20,8 +20,8 @@
DEBUGGING
***************************************************************************/
-#define LOG_ETHERNET (0)
-#define DISPLAY_STATS (0)
+#define LOG_ETHERNET (0)
+#define DISPLAY_STATS (0)
@@ -29,63 +29,63 @@
CONSTANTS
***************************************************************************/
-#define ETHER_BUFFER_SIZE (2048)
-#define ETHER_RX_BUFFERS (4)
+#define ETHER_BUFFER_SIZE (2048)
+#define ETHER_RX_BUFFERS (4)
/* Ethernet registers - bank 0 */
-#define EREG_TCR (0*8 + 0)
-#define EREG_EPH_STATUS (0*8 + 1)
-#define EREG_RCR (0*8 + 2)
-#define EREG_COUNTER (0*8 + 3)
-#define EREG_MIR (0*8 + 4)
-#define EREG_MCR (0*8 + 5)
-#define EREG_BANK (0*8 + 7)
+#define EREG_TCR (0*8 + 0)
+#define EREG_EPH_STATUS (0*8 + 1)
+#define EREG_RCR (0*8 + 2)
+#define EREG_COUNTER (0*8 + 3)
+#define EREG_MIR (0*8 + 4)
+#define EREG_MCR (0*8 + 5)
+#define EREG_BANK (0*8 + 7)
/* Ethernet registers - bank 1 */
-#define EREG_CONFIG (1*8 + 0)
-#define EREG_BASE (1*8 + 1)
-#define EREG_IA0_1 (1*8 + 2)
-#define EREG_IA2_3 (1*8 + 3)
-#define EREG_IA4_5 (1*8 + 4)
-#define EREG_GENERAL_PURP (1*8 + 5)
-#define EREG_CONTROL (1*8 + 6)
+#define EREG_CONFIG (1*8 + 0)
+#define EREG_BASE (1*8 + 1)
+#define EREG_IA0_1 (1*8 + 2)
+#define EREG_IA2_3 (1*8 + 3)
+#define EREG_IA4_5 (1*8 + 4)
+#define EREG_GENERAL_PURP (1*8 + 5)
+#define EREG_CONTROL (1*8 + 6)
/* Ethernet registers - bank 2 */
-#define EREG_MMU_COMMAND (2*8 + 0)
-#define EREG_PNR_ARR (2*8 + 1)
-#define EREG_FIFO_PORTS (2*8 + 2)
-#define EREG_POINTER (2*8 + 3)
-#define EREG_DATA_0 (2*8 + 4)
-#define EREG_DATA_1 (2*8 + 5)
-#define EREG_INTERRUPT (2*8 + 6)
+#define EREG_MMU_COMMAND (2*8 + 0)
+#define EREG_PNR_ARR (2*8 + 1)
+#define EREG_FIFO_PORTS (2*8 + 2)
+#define EREG_POINTER (2*8 + 3)
+#define EREG_DATA_0 (2*8 + 4)
+#define EREG_DATA_1 (2*8 + 5)
+#define EREG_INTERRUPT (2*8 + 6)
/* Ethernet registers - bank 3 */
-#define EREG_MT0_1 (3*8 + 0)
-#define EREG_MT2_3 (3*8 + 1)
-#define EREG_MT4_5 (3*8 + 2)
-#define EREG_MT6_7 (3*8 + 3)
-#define EREG_MGMT (3*8 + 4)
-#define EREG_REVISION (3*8 + 5)
-#define EREG_ERCV (3*8 + 6)
+#define EREG_MT0_1 (3*8 + 0)
+#define EREG_MT2_3 (3*8 + 1)
+#define EREG_MT4_5 (3*8 + 2)
+#define EREG_MT6_7 (3*8 + 3)
+#define EREG_MGMT (3*8 + 4)
+#define EREG_REVISION (3*8 + 5)
+#define EREG_ERCV (3*8 + 6)
/* Ethernet MMU commands */
-#define ECMD_NOP 0
-#define ECMD_ALLOCATE 1
-#define ECMD_RESET_MMU 2
-#define ECMD_REMOVE 3
-#define ECMD_REMOVE_RELEASE 4
-#define ECMD_RELEASE_PACKET 5
-#define ECMD_ENQUEUE_PACKET 6
-#define ECMD_RESET_FIFOS 7
+#define ECMD_NOP 0
+#define ECMD_ALLOCATE 1
+#define ECMD_RESET_MMU 2
+#define ECMD_REMOVE 3
+#define ECMD_REMOVE_RELEASE 4
+#define ECMD_RELEASE_PACKET 5
+#define ECMD_ENQUEUE_PACKET 6
+#define ECMD_RESET_FIFOS 7
/* Ethernet interrupt bits */
-#define EINT_RCV 0x01
-#define EINT_TX 0x02
-#define EINT_TX_EMPTY 0x04
-#define EINT_ALLOC 0x08
-#define EINT_RX_OVRN 0x10
-#define EINT_EPH 0x20
-#define EINT_ERCV 0x40
+#define EINT_RCV 0x01
+#define EINT_TX 0x02
+#define EINT_TX_EMPTY 0x04
+#define EINT_ALLOC 0x08
+#define EINT_RX_OVRN 0x10
+#define EINT_EPH 0x20
+#define EINT_ERCV 0x40
/* Ethernet register names */
static const char *const ethernet_regname[64] =
@@ -112,23 +112,23 @@ struct smc91c9x_state
smc91c9x_irq_func irq_handler;
/* raw register data and masks */
- UINT16 reg[64];
- UINT16 regmask[64];
+ UINT16 reg[64];
+ UINT16 regmask[64];
/* IRQ information */
- UINT8 irq_state;
+ UINT8 irq_state;
/* allocate information */
- UINT8 alloc_count;
+ UINT8 alloc_count;
/* transmit/receive FIFOs */
- UINT8 fifo_count;
- UINT8 rx[ETHER_BUFFER_SIZE * ETHER_RX_BUFFERS];
- UINT8 tx[ETHER_BUFFER_SIZE];
+ UINT8 fifo_count;
+ UINT8 rx[ETHER_BUFFER_SIZE * ETHER_RX_BUFFERS];
+ UINT8 tx[ETHER_BUFFER_SIZE];
/* counters */
- UINT32 sent;
- UINT32 recd;
+ UINT32 sent;
+ UINT32 recd;
};
@@ -360,8 +360,8 @@ READ16_DEVICE_HANDLER( smc91c9x_r )
}
break;
- case EREG_DATA_0: /* data register */
- case EREG_DATA_1: /* data register */
+ case EREG_DATA_0: /* data register */
+ case EREG_DATA_1: /* data register */
{
UINT8 *buffer = (smc->reg[EREG_POINTER] & 0x8000) ? smc->rx : smc->tx;
int addr = smc->reg[EREG_POINTER] & 0x7ff;
@@ -405,7 +405,7 @@ WRITE16_DEVICE_HANDLER( smc91c9x_w )
/* handle it */
switch (offset)
{
- case EREG_TCR: /* transmit control register */
+ case EREG_TCR: /* transmit control register */
if (LOG_ETHERNET)
{
if (data & 0x2000) logerror(" EPH LOOP\n");
@@ -420,7 +420,7 @@ WRITE16_DEVICE_HANDLER( smc91c9x_w )
}
break;
- case EREG_RCR: /* receive control register */
+ case EREG_RCR: /* receive control register */
if (LOG_ETHERNET)
{
if (data & 0x8000) device->reset();
@@ -434,7 +434,7 @@ WRITE16_DEVICE_HANDLER( smc91c9x_w )
}
break;
- case EREG_CONFIG: /* configuration register */
+ case EREG_CONFIG: /* configuration register */
if (LOG_ETHERNET)
{
if (data & 0x1000) logerror(" NO WAIT\n");
@@ -448,7 +448,7 @@ WRITE16_DEVICE_HANDLER( smc91c9x_w )
}
break;
- case EREG_BASE: /* base address register */
+ case EREG_BASE: /* base address register */
if (LOG_ETHERNET)
{
logerror(" base = $%04X\n", (data & 0xe000) | ((data & 0x1f00) >> 3));
@@ -457,7 +457,7 @@ WRITE16_DEVICE_HANDLER( smc91c9x_w )
}
break;
- case EREG_CONTROL: /* control register */
+ case EREG_CONTROL: /* control register */
if (LOG_ETHERNET)
{
if (data & 0x4000) logerror(" RCV_BAD\n");
@@ -472,12 +472,12 @@ WRITE16_DEVICE_HANDLER( smc91c9x_w )
}
break;
- case EREG_MMU_COMMAND: /* command register */
+ case EREG_MMU_COMMAND: /* command register */
process_command(smc, data);
break;
- case EREG_DATA_0: /* data register */
- case EREG_DATA_1: /* data register */
+ case EREG_DATA_0: /* data register */
+ case EREG_DATA_1: /* data register */
{
UINT8 *buffer = (smc->reg[EREG_POINTER] & 0x8000) ? smc->rx : smc->tx;
int addr = smc->reg[EREG_POINTER] & 0x7ff;
@@ -547,37 +547,37 @@ static DEVICE_RESET( smc91c9x )
smc->sent = 0;
smc->recd = 0;
- smc->reg[EREG_TCR] = 0x0000; smc->regmask[EREG_TCR] = 0x3d87;
- smc->reg[EREG_EPH_STATUS] = 0x0000; smc->regmask[EREG_EPH_STATUS] = 0x0000;
- smc->reg[EREG_RCR] = 0x0000; smc->regmask[EREG_RCR] = 0xc307;
- smc->reg[EREG_COUNTER] = 0x0000; smc->regmask[EREG_COUNTER] = 0x0000;
- smc->reg[EREG_MIR] = 0x1212; smc->regmask[EREG_MIR] = 0x0000;
- smc->reg[EREG_MCR] = 0x3300; smc->regmask[EREG_MCR] = 0x00ff;
- smc->reg[EREG_BANK] = 0x3300; smc->regmask[EREG_BANK] = 0x0007;
-
- smc->reg[EREG_CONFIG] = 0x0030; smc->regmask[EREG_CONFIG] = 0x17c6;
- smc->reg[EREG_BASE] = 0x1866; smc->regmask[EREG_BASE] = 0xfffe;
- smc->reg[EREG_IA0_1] = 0x0000; smc->regmask[EREG_IA0_1] = 0xffff;
- smc->reg[EREG_IA2_3] = 0x0000; smc->regmask[EREG_IA2_3] = 0xffff;
- smc->reg[EREG_IA4_5] = 0x0000; smc->regmask[EREG_IA4_5] = 0xffff;
- smc->reg[EREG_GENERAL_PURP] = 0x0000; smc->regmask[EREG_GENERAL_PURP] = 0xffff;
- smc->reg[EREG_CONTROL] = 0x0100; smc->regmask[EREG_CONTROL] = 0x68e7;
-
- smc->reg[EREG_MMU_COMMAND] = 0x0000; smc->regmask[EREG_MMU_COMMAND] = 0x00e7;
- smc->reg[EREG_PNR_ARR] = 0x8000; smc->regmask[EREG_PNR_ARR] = 0x00ff;
- smc->reg[EREG_FIFO_PORTS] = 0x8080; smc->regmask[EREG_FIFO_PORTS] = 0x0000;
- smc->reg[EREG_POINTER] = 0x0000; smc->regmask[EREG_POINTER] = 0xf7ff;
- smc->reg[EREG_DATA_0] = 0x0000; smc->regmask[EREG_DATA_0] = 0xffff;
- smc->reg[EREG_DATA_1] = 0x0000; smc->regmask[EREG_DATA_1] = 0xffff;
- smc->reg[EREG_INTERRUPT] = 0x0004; smc->regmask[EREG_INTERRUPT] = 0x7f00;
-
- smc->reg[EREG_MT0_1] = 0x0000; smc->regmask[EREG_MT0_1] = 0xffff;
- smc->reg[EREG_MT2_3] = 0x0000; smc->regmask[EREG_MT2_3] = 0xffff;
- smc->reg[EREG_MT4_5] = 0x0000; smc->regmask[EREG_MT4_5] = 0xffff;
- smc->reg[EREG_MT6_7] = 0x0000; smc->regmask[EREG_MT6_7] = 0xffff;
- smc->reg[EREG_MGMT] = 0x3030; smc->regmask[EREG_MGMT] = 0x0f0f;
- smc->reg[EREG_REVISION] = 0x3340; smc->regmask[EREG_REVISION] = 0x0000;
- smc->reg[EREG_ERCV] = 0x331f; smc->regmask[EREG_ERCV] = 0x009f;
+ smc->reg[EREG_TCR] = 0x0000; smc->regmask[EREG_TCR] = 0x3d87;
+ smc->reg[EREG_EPH_STATUS] = 0x0000; smc->regmask[EREG_EPH_STATUS] = 0x0000;
+ smc->reg[EREG_RCR] = 0x0000; smc->regmask[EREG_RCR] = 0xc307;
+ smc->reg[EREG_COUNTER] = 0x0000; smc->regmask[EREG_COUNTER] = 0x0000;
+ smc->reg[EREG_MIR] = 0x1212; smc->regmask[EREG_MIR] = 0x0000;
+ smc->reg[EREG_MCR] = 0x3300; smc->regmask[EREG_MCR] = 0x00ff;
+ smc->reg[EREG_BANK] = 0x3300; smc->regmask[EREG_BANK] = 0x0007;
+
+ smc->reg[EREG_CONFIG] = 0x0030; smc->regmask[EREG_CONFIG] = 0x17c6;
+ smc->reg[EREG_BASE] = 0x1866; smc->regmask[EREG_BASE] = 0xfffe;
+ smc->reg[EREG_IA0_1] = 0x0000; smc->regmask[EREG_IA0_1] = 0xffff;
+ smc->reg[EREG_IA2_3] = 0x0000; smc->regmask[EREG_IA2_3] = 0xffff;
+ smc->reg[EREG_IA4_5] = 0x0000; smc->regmask[EREG_IA4_5] = 0xffff;
+ smc->reg[EREG_GENERAL_PURP] = 0x0000; smc->regmask[EREG_GENERAL_PURP] = 0xffff;
+ smc->reg[EREG_CONTROL] = 0x0100; smc->regmask[EREG_CONTROL] = 0x68e7;
+
+ smc->reg[EREG_MMU_COMMAND] = 0x0000; smc->regmask[EREG_MMU_COMMAND] = 0x00e7;
+ smc->reg[EREG_PNR_ARR] = 0x8000; smc->regmask[EREG_PNR_ARR] = 0x00ff;
+ smc->reg[EREG_FIFO_PORTS] = 0x8080; smc->regmask[EREG_FIFO_PORTS] = 0x0000;
+ smc->reg[EREG_POINTER] = 0x0000; smc->regmask[EREG_POINTER] = 0xf7ff;
+ smc->reg[EREG_DATA_0] = 0x0000; smc->regmask[EREG_DATA_0] = 0xffff;
+ smc->reg[EREG_DATA_1] = 0x0000; smc->regmask[EREG_DATA_1] = 0xffff;
+ smc->reg[EREG_INTERRUPT] = 0x0004; smc->regmask[EREG_INTERRUPT] = 0x7f00;
+
+ smc->reg[EREG_MT0_1] = 0x0000; smc->regmask[EREG_MT0_1] = 0xffff;
+ smc->reg[EREG_MT2_3] = 0x0000; smc->regmask[EREG_MT2_3] = 0xffff;
+ smc->reg[EREG_MT4_5] = 0x0000; smc->regmask[EREG_MT4_5] = 0xffff;
+ smc->reg[EREG_MT6_7] = 0x0000; smc->regmask[EREG_MT6_7] = 0xffff;
+ smc->reg[EREG_MGMT] = 0x3030; smc->regmask[EREG_MGMT] = 0x0f0f;
+ smc->reg[EREG_REVISION] = 0x3340; smc->regmask[EREG_REVISION] = 0x0000;
+ smc->reg[EREG_ERCV] = 0x331f; smc->regmask[EREG_ERCV] = 0x009f;
update_ethernet_irq(smc);
}
@@ -632,6 +632,3 @@ smc91c96_device::smc91c96_device(const machine_config &mconfig, const char *tag,
: smc91c9x_device(mconfig, SMC91C96, "SMC91C96", tag, owner, clock)
{
}
-
-
-
diff --git a/src/emu/machine/smc91c9x.h b/src/emu/machine/smc91c9x.h
index 380e96130bb..9a45f0d47e5 100644
--- a/src/emu/machine/smc91c9x.h
+++ b/src/emu/machine/smc91c9x.h
@@ -21,7 +21,7 @@ typedef void (*smc91c9x_irq_func)(device_t *device, int state);
struct smc91c9x_config
{
- smc91c9x_irq_func interrupt;
+ smc91c9x_irq_func interrupt;
};
diff --git a/src/emu/machine/tc009xlvc.c b/src/emu/machine/tc009xlvc.c
index 7ae08240232..d995970e34e 100644
--- a/src/emu/machine/tc009xlvc.c
+++ b/src/emu/machine/tc009xlvc.c
@@ -164,8 +164,8 @@ ADDRESS_MAP_END
tc0091lvc_device::tc0091lvc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TC0091LVC, "TC0091LVC", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("tc0091lvc", ENDIANNESS_LITTLE, 8,20, 0, NULL, *ADDRESS_MAP_NAME(tc0091lvc_map8))
+ device_memory_interface(mconfig, *this),
+ m_space_config("tc0091lvc", ENDIANNESS_LITTLE, 8,20, 0, NULL, *ADDRESS_MAP_NAME(tc0091lvc_map8))
{
}
@@ -392,4 +392,3 @@ void tc0091lvc_device::screen_eof(void)
m_bg1_scroll[1] = m_sprram_buffer[0x3fd];
m_bg1_scroll[2] = m_sprram_buffer[0x3fe];
}
-
diff --git a/src/emu/machine/tc009xlvc.h b/src/emu/machine/tc009xlvc.h
index 0fb81a562ba..857773c3d61 100644
--- a/src/emu/machine/tc009xlvc.h
+++ b/src/emu/machine/tc009xlvc.h
@@ -12,13 +12,13 @@
#include "emu.h"
class tc0091lvc_device : public device_t,
- public device_memory_interface
+ public device_memory_interface
{
public:
tc0091lvc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( vregs_r );
- DECLARE_WRITE8_MEMBER( vregs_w );
+ DECLARE_READ8_MEMBER( vregs_r );
+ DECLARE_WRITE8_MEMBER( vregs_w );
DECLARE_READ8_MEMBER( tc0091lvc_paletteram_r );
DECLARE_WRITE8_MEMBER( tc0091lvc_paletteram_w );
@@ -75,10 +75,9 @@ protected:
virtual void device_start();
virtual void device_reset();
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
- address_space_config m_space_config;
+ address_space_config m_space_config;
};
extern const device_type TC0091LVC;
#endif
-
diff --git a/src/emu/machine/timekpr.c b/src/emu/machine/timekpr.c
index eb7c9737d62..6183aff30f6 100644
--- a/src/emu/machine/timekpr.c
+++ b/src/emu/machine/timekpr.c
@@ -118,8 +118,8 @@ static int counter_from_ram( UINT8 *data, int offset )
//-------------------------------------------------
timekeeper_device::timekeeper_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, type, name, tag, owner, clock),
- device_nvram_interface(mconfig, *this)
+ : device_t(mconfig, type, name, tag, owner, clock),
+ device_nvram_interface(mconfig, *this)
{
}
@@ -443,4 +443,3 @@ void timekeeper_device::nvram_write(emu_file &file)
WRITE8_DEVICE_HANDLER( timekeeper_w ) { downcast<timekeeper_device *>(device)->write(offset, data); }
READ8_DEVICE_HANDLER( timekeeper_r ) { return downcast<timekeeper_device*>(device)->read(offset); }
-
diff --git a/src/emu/machine/timekpr.h b/src/emu/machine/timekpr.h
index 98d4c2acf9c..17977a99370 100644
--- a/src/emu/machine/timekpr.h
+++ b/src/emu/machine/timekpr.h
@@ -56,7 +56,7 @@ struct timekeeper_config
// ======================> timekeeper_device
-class timekeeper_device : public device_t,
+class timekeeper_device : public device_t,
public device_nvram_interface
{
protected:
diff --git a/src/emu/machine/tmp68301.c b/src/emu/machine/tmp68301.c
index f46175844e6..8f87ebe15f8 100644
--- a/src/emu/machine/tmp68301.c
+++ b/src/emu/machine/tmp68301.c
@@ -13,8 +13,8 @@
static UINT16 tmp68301_regs[0x400];
-static UINT8 tmp68301_IE[3]; // 3 External Interrupt Lines
-static emu_timer *tmp68301_timer[3]; // 3 Timers
+static UINT8 tmp68301_IE[3]; // 3 External Interrupt Lines
+static emu_timer *tmp68301_timer[3]; // 3 Timers
static int tmp68301_irq_vector[8];
@@ -30,27 +30,27 @@ static IRQ_CALLBACK(tmp68301_irq_callback)
static TIMER_CALLBACK( tmp68301_timer_callback )
{
int i = param;
- UINT16 TCR = tmp68301_regs[(0x200 + i * 0x20)/2];
- UINT16 IMR = tmp68301_regs[0x94/2]; // Interrupt Mask Register (IMR)
- UINT16 ICR = tmp68301_regs[0x8e/2+i]; // Interrupt Controller Register (ICR7..9)
- UINT16 IVNR = tmp68301_regs[0x9a/2]; // Interrupt Vector Number Register (IVNR)
+ UINT16 TCR = tmp68301_regs[(0x200 + i * 0x20)/2];
+ UINT16 IMR = tmp68301_regs[0x94/2]; // Interrupt Mask Register (IMR)
+ UINT16 ICR = tmp68301_regs[0x8e/2+i]; // Interrupt Controller Register (ICR7..9)
+ UINT16 IVNR = tmp68301_regs[0x9a/2]; // Interrupt Vector Number Register (IVNR)
// logerror("s: callback timer %04X, j = %d\n",machine.describe_context(),i,tcount);
- if ( (TCR & 0x0004) && // INT
+ if ( (TCR & 0x0004) && // INT
!(IMR & (0x100<<i))
)
{
int level = ICR & 0x0007;
// Interrupt Vector Number Register (IVNR)
- tmp68301_irq_vector[level] = IVNR & 0x00e0;
- tmp68301_irq_vector[level] += 4+i;
+ tmp68301_irq_vector[level] = IVNR & 0x00e0;
+ tmp68301_irq_vector[level] += 4+i;
machine.firstcpu->set_input_line(level,HOLD_LINE);
}
- if (TCR & 0x0080) // N/1
+ if (TCR & 0x0080) // N/1
{
// Repeat
tmp68301_update_timer(machine, i);
@@ -63,9 +63,9 @@ static TIMER_CALLBACK( tmp68301_timer_callback )
static void tmp68301_update_timer( running_machine &machine, int i )
{
- UINT16 TCR = tmp68301_regs[(0x200 + i * 0x20)/2];
- UINT16 MAX1 = tmp68301_regs[(0x204 + i * 0x20)/2];
- UINT16 MAX2 = tmp68301_regs[(0x206 + i * 0x20)/2];
+ UINT16 TCR = tmp68301_regs[(0x200 + i * 0x20)/2];
+ UINT16 MAX1 = tmp68301_regs[(0x204 + i * 0x20)/2];
+ UINT16 MAX2 = tmp68301_regs[(0x206 + i * 0x20)/2];
int max = 0;
attotime duration = attotime::zero;
@@ -73,7 +73,7 @@ static void tmp68301_update_timer( running_machine &machine, int i )
tmp68301_timer[i]->adjust(attotime::never,i);
// timers 1&2 only
- switch( (TCR & 0x0030)>>4 ) // MR2..1
+ switch( (TCR & 0x0030)>>4 ) // MR2..1
{
case 1:
max = MAX1;
@@ -83,12 +83,12 @@ static void tmp68301_update_timer( running_machine &machine, int i )
break;
}
- switch ( (TCR & 0xc000)>>14 ) // CK2..1
+ switch ( (TCR & 0xc000)>>14 ) // CK2..1
{
- case 0: // System clock (CLK)
+ case 0: // System clock (CLK)
if (max)
{
- int scale = (TCR & 0x3c00)>>10; // P4..1
+ int scale = (TCR & 0x3c00)>>10; // P4..1
if (scale > 8) scale = 8;
duration = attotime::from_hz(machine.firstcpu->unscaled_clock()) * ((1 << scale) * max);
}
@@ -97,7 +97,7 @@ static void tmp68301_update_timer( running_machine &machine, int i )
// logerror("%s: TMP68301 Timer %d, duration %lf, max %04X\n",machine.describe_context(),i,duration,max);
- if (!(TCR & 0x0002)) // CS
+ if (!(TCR & 0x0002)) // CS
{
if (duration != attotime::zero)
tmp68301_timer[i]->adjust(duration,i);
@@ -130,25 +130,25 @@ static void update_irq_state(running_machine &machine)
/* Take care of external interrupts */
- UINT16 IMR = tmp68301_regs[0x94/2]; // Interrupt Mask Register (IMR)
- UINT16 IVNR = tmp68301_regs[0x9a/2]; // Interrupt Vector Number Register (IVNR)
+ UINT16 IMR = tmp68301_regs[0x94/2]; // Interrupt Mask Register (IMR)
+ UINT16 IVNR = tmp68301_regs[0x9a/2]; // Interrupt Vector Number Register (IVNR)
for (i = 0; i < 3; i++)
{
- if ( (tmp68301_IE[i]) &&
+ if ( (tmp68301_IE[i]) &&
!(IMR & (1<<i))
)
{
- UINT16 ICR = tmp68301_regs[0x80/2+i]; // Interrupt Controller Register (ICR0..2)
+ UINT16 ICR = tmp68301_regs[0x80/2+i]; // Interrupt Controller Register (ICR0..2)
// Interrupt Controller Register (ICR0..2)
int level = ICR & 0x0007;
// Interrupt Vector Number Register (IVNR)
- tmp68301_irq_vector[level] = IVNR & 0x00e0;
- tmp68301_irq_vector[level] += i;
+ tmp68301_irq_vector[level] = IVNR & 0x00e0;
+ tmp68301_irq_vector[level] += i;
- tmp68301_IE[i] = 0; // Interrupts are edge triggerred
+ tmp68301_IE[i] = 0; // Interrupts are edge triggerred
machine.firstcpu->set_input_line(level,HOLD_LINE);
}
@@ -164,7 +164,7 @@ WRITE16_HANDLER( tmp68301_regs_w )
{
COMBINE_DATA(&tmp68301_regs[offset]);
- if (!ACCESSING_BITS_0_7) return;
+ if (!ACCESSING_BITS_0_7) return;
// logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space.device().safe_pc(),offset*2,data,mem_mask^0xffff);
@@ -183,7 +183,6 @@ WRITE16_HANDLER( tmp68301_regs_w )
}
}
-void tmp68301_external_interrupt_0(running_machine &machine) { tmp68301_IE[0] = 1; update_irq_state(machine); }
-void tmp68301_external_interrupt_1(running_machine &machine) { tmp68301_IE[1] = 1; update_irq_state(machine); }
-void tmp68301_external_interrupt_2(running_machine &machine) { tmp68301_IE[2] = 1; update_irq_state(machine); }
-
+void tmp68301_external_interrupt_0(running_machine &machine) { tmp68301_IE[0] = 1; update_irq_state(machine); }
+void tmp68301_external_interrupt_1(running_machine &machine) { tmp68301_IE[1] = 1; update_irq_state(machine); }
+void tmp68301_external_interrupt_2(running_machine &machine) { tmp68301_IE[2] = 1; update_irq_state(machine); }
diff --git a/src/emu/machine/tms6100.c b/src/emu/machine/tms6100.c
index b595a84eb1d..ca1dd2729fa 100644
--- a/src/emu/machine/tms6100.c
+++ b/src/emu/machine/tms6100.c
@@ -62,16 +62,16 @@
#include "emu.h"
#include "tms6100.h"
-#define VERBOSE (0)
+#define VERBOSE (0)
-#if VERBOSE
-#define LOG(x) logerror x
+#if VERBOSE
+#define LOG(x) logerror x
#else
-#define LOG(x)
+#define LOG(x)
#endif
-#define TMS6100_READ_PENDING 0x01
-#define TMS6100_NEXT_READ_IS_DUMMY 0x02
+#define TMS6100_READ_PENDING 0x01
+#define TMS6100_NEXT_READ_IS_DUMMY 0x02
struct tms6100_state
{
@@ -316,5 +316,3 @@ void m58819_device::device_start()
{
DEVICE_START_NAME( m58819 )(this);
}
-
-
diff --git a/src/emu/machine/tms9901.c b/src/emu/machine/tms9901.c
index 9082dd96ac0..ccd76fab8da 100644
--- a/src/emu/machine/tms9901.c
+++ b/src/emu/machine/tms9901.c
@@ -120,7 +120,7 @@ void tms9901_device::field_interrupts(void)
/* int_state: state of lines int1-int15 */
current_ints = m_int_state;
if (m_clock_register != 0)
- { /* if timer is enabled, INT3 pin is overriden by timer */
+ { /* if timer is enabled, INT3 pin is overriden by timer */
if (m_timer_int_pending)
{
if (VERBOSE>8) LOG("tms9901: timer fires\n");
@@ -155,7 +155,7 @@ void tms9901_device::field_interrupts(void)
while ((current_ints & 1)==0)
{
- current_ints >>= 1; /* try next bit */
+ current_ints >>= 1; /* try next bit */
level++;
}
m_int_pending = true;
@@ -197,12 +197,12 @@ void tms9901_device::set_single_int(int pin_number, int state)
void tms9901_device::timer_reload(void)
{
if (m_clock_register != 0)
- { /* reset clock interval */
+ { /* reset clock interval */
m_decrementer_value = m_clock_register;
m_decrementer->enable(true);
}
else
- { /* clock interval == 0 -> no timer */
+ { /* clock interval == 0 -> no timer */
m_decrementer->enable(false);
}
}
@@ -234,11 +234,11 @@ READ8_MEMBER( tms9901_device::read )
{
case 0:
if (m_clock_mode)
- { /* clock mode */
+ { /* clock mode */
answer = ((m_clock_read_register & 0x7F) << 1) | 0x01;
}
else
- { /* interrupt mode */
+ { /* interrupt mode */
// m_int_state stores the INTx values, which are inverted to the pin levels (INTx*)
answer = ((~m_int_state) & m_supported_int_mask) & 0xFF;
@@ -251,13 +251,13 @@ READ8_MEMBER( tms9901_device::read )
break;
case 1:
if (m_clock_mode)
- { /* clock mode */
+ { /* clock mode */
answer = (m_clock_read_register & 0x3F80) >> 7;
if (!m_int_pending)
answer |= 0x80;
}
else
- { /* interrupt mode */
+ { /* interrupt mode */
answer = ((~m_int_state) & m_supported_int_mask) >> 8;
if (!m_read_block.isnull())
@@ -313,11 +313,11 @@ READ8_MEMBER( tms9901_device::read )
*/
WRITE8_MEMBER ( tms9901_device::write )
{
- data &= 1; /* clear extra bits */
+ data &= 1; /* clear extra bits */
offset &= 0x01F;
switch (offset)
{
- case 0x00: /* write to mode bit */
+ case 0x00: /* write to mode bit */
if (data == 0)
{
/* we are quitting clock mode */
@@ -333,7 +333,7 @@ WRITE8_MEMBER ( tms9901_device::write )
if (m_clock_register != 0)
m_clock_read_register = m_decrementer_value;
else
- m_clock_read_register = 0; /* timer inactive... */
+ m_clock_read_register = 0; /* timer inactive... */
}
break;
case 0x01:
@@ -357,39 +357,39 @@ WRITE8_MEMBER ( tms9901_device::write )
//
// offset is the index of the modified bit of register (-> interrupt number -1)
if (m_clock_mode)
- { /* modify clock interval */
- int mask = 1 << ((offset & 0x0F) - 1); /* corresponding mask */
+ { /* modify clock interval */
+ int mask = 1 << ((offset & 0x0F) - 1); /* corresponding mask */
if (data)
- m_clock_register |= mask; /* set bit */
+ m_clock_register |= mask; /* set bit */
else
- m_clock_register &= ~mask; /* clear bit */
+ m_clock_register &= ~mask; /* clear bit */
/* reset clock timer (page 8) */
if (VERBOSE>6) LOG("tms9901: clock register = %04x\n", m_clock_register);
timer_reload();
}
else
- { /* modify interrupt enable mask */
- int mask = 1 << (offset & 0x0F); /* corresponding mask */
+ { /* modify interrupt enable mask */
+ int mask = 1 << (offset & 0x0F); /* corresponding mask */
if (data)
- m_enabled_ints |= mask; /* set bit */
+ m_enabled_ints |= mask; /* set bit */
else
- m_enabled_ints &= ~mask; /* unset bit */
+ m_enabled_ints &= ~mask; /* unset bit */
if (offset == 3)
- m_timer_int_pending = false; /* SBO 3 clears pending timer interrupt (??) */
+ m_timer_int_pending = false; /* SBO 3 clears pending timer interrupt (??) */
if (VERBOSE>6) LOG("tms9901: interrupts = %04x\n", m_enabled_ints);
- field_interrupts(); /* changed interrupt state */
+ field_interrupts(); /* changed interrupt state */
}
break;
case 0x0F:
if (m_clock_mode)
- { /* in clock mode this is the soft reset bit */
+ { /* in clock mode this is the soft reset bit */
if (!data)
- { // TMS9901 soft reset (RST2*)
+ { // TMS9901 soft reset (RST2*)
// Spec: "Writing a 0 to bit 15 while in the clock mode executes a soft reset on the I/O pins.
// [...] RST2* will program all ports to the input mode"
m_pio_direction = 0;
@@ -403,14 +403,14 @@ WRITE8_MEMBER ( tms9901_device::write )
}
}
else
- { /* modify interrupt enable mask */
+ { /* modify interrupt enable mask */
if (data)
- m_enabled_ints |= 0x4000; /* set bit */
+ m_enabled_ints |= 0x4000; /* set bit */
else
- m_enabled_ints &= ~0x4000; /* unset bit */
+ m_enabled_ints &= ~0x4000; /* unset bit */
if (VERBOSE>6) LOG("tms9901: interrupts = %04x\n", m_enabled_ints);
- field_interrupts(); /* changed interrupt state */
+ field_interrupts(); /* changed interrupt state */
}
break;
case 0x10:
@@ -436,7 +436,7 @@ WRITE8_MEMBER ( tms9901_device::write )
// MZ: see above - I think this is wrong
// m_clock_mode = false; // exit timer mode
- m_pio_direction |= mask; /* set up as output pin */
+ m_pio_direction |= mask; /* set up as output pin */
if (data)
m_pio_output |= mask;
@@ -444,11 +444,11 @@ WRITE8_MEMBER ( tms9901_device::write )
m_pio_output &= ~mask;
if (pin >= 7)
- { /* pins P7-P15 are mirrored as INT15*-INT7* */
+ { /* pins P7-P15 are mirrored as INT15*-INT7* */
int pin2 = 22 - pin;
int mask2 = (1 << pin2);
- m_pio_direction_mirror |= mask2; /* set up as output pin */
+ m_pio_direction_mirror |= mask2; /* set up as output pin */
if (data)
m_pio_output_mirror |= mask2;
@@ -477,7 +477,7 @@ void tms9901_device::device_timer(emu_timer &timer, device_timer_id id, int para
if (VERBOSE>6) LOG("tms9901: decrementer = %d\n", m_decrementer_value);
if (m_decrementer_value<=0)
{
- m_timer_int_pending = true; // decrementer interrupt requested
+ m_timer_int_pending = true; // decrementer interrupt requested
field_interrupts();
m_decrementer_value = m_clock_register;
}
diff --git a/src/emu/machine/tms9901.h b/src/emu/machine/tms9901.h
index 394555003bd..d4b8c4351b4 100644
--- a/src/emu/machine/tms9901.h
+++ b/src/emu/machine/tms9901.h
@@ -24,7 +24,7 @@ extern const device_type TMS9901;
/* Masks for the interrupts levels available on TMS9901 */
#define TMS9901_INT1 0x0002
#define TMS9901_INT2 0x0004
-#define TMS9901_INT3 0x0008 // overriden by the timer interrupt
+#define TMS9901_INT3 0x0008 // overriden by the timer interrupt
#define TMS9901_INT4 0x0010
#define TMS9901_INT5 0x0020
#define TMS9901_INT6 0x0040
@@ -52,10 +52,10 @@ enum
struct tms9901_interface
{
- int interrupt_mask; // a bit for each input pin whose state is always notified to the TMS9901 core
- devcb_read8 read_handler; // 4*8 bits, to be selected using the offset (0-3)
- devcb_write_line write_handler[16]; // 16 Pn outputs
- devcb_write8 interrupt_callback; // called when interrupt bus state changes
+ int interrupt_mask; // a bit for each input pin whose state is always notified to the TMS9901 core
+ devcb_read8 read_handler; // 4*8 bits, to be selected using the offset (0-3)
+ devcb_write_line write_handler[16]; // 16 Pn outputs
+ devcb_write8 interrupt_callback; // called when interrupt bus state changes
};
class tms9901_device : public device_t
@@ -86,15 +86,15 @@ private:
// saving the state of interrupt pins and feeding it to the port read
// handlers again
int m_supported_int_mask;
- int m_int_state; // state of the int1-int15 lines (must be inverted when queried)
- int m_old_int_state; // stores the previous value to avoid useless INT line assertions
- int m_enabled_ints; // interrupt enable mask
+ int m_int_state; // state of the int1-int15 lines (must be inverted when queried)
+ int m_old_int_state; // stores the previous value to avoid useless INT line assertions
+ int m_enabled_ints; // interrupt enable mask
- bool m_int_pending; // status of the int* pin (connected to TMS9900)
- bool m_timer_int_pending; // timer int pending (overrides int3 pin if timer enabled)
+ bool m_int_pending; // status of the int* pin (connected to TMS9900)
+ bool m_timer_int_pending; // timer int pending (overrides int3 pin if timer enabled)
// PIO registers
- int m_pio_direction; // direction register for PIO
+ int m_pio_direction; // direction register for PIO
// current PIO output (to be masked with pio_direction)
int m_pio_output;
@@ -126,9 +126,9 @@ private:
// =======================================================================
// Callbacks
- devcb_resolved_read8 m_read_block;
- devcb_resolved_write_line m_write_line[16];
- devcb_resolved_write8 m_interrupt; // also delivers the interrupt level
+ devcb_resolved_read8 m_read_block;
+ devcb_resolved_write_line m_write_line[16];
+ devcb_resolved_write8 m_interrupt; // also delivers the interrupt level
};
/***************************************************************************
diff --git a/src/emu/machine/tms9902.c b/src/emu/machine/tms9902.c
index 653afc190dd..a0175d094fe 100644
--- a/src/emu/machine/tms9902.c
+++ b/src/emu/machine/tms9902.c
@@ -268,14 +268,14 @@ void tms9902_device::device_timer(emu_timer &timer, device_timer_id id, int para
void tms9902_device::reload_interval_timer()
{
if (m_TMR)
- { /* reset clock interval */
+ { /* reset clock interval */
m_dectimer->adjust(
attotime::from_double((double) m_TMR / (m_clock_rate / ((m_CLK4M) ? 4. : 3.) / 64.)),
0,
attotime::from_double((double) m_TMR / (m_clock_rate / ((m_CLK4M) ? 4. : 3.) / 64.)));
}
else
- { /* clock interval == 0 -> no timer */
+ { /* clock interval == 0 -> no timer */
m_dectimer->enable(0);
}
}
@@ -519,23 +519,23 @@ void tms9902_device::reset_uart()
if (VERBOSE>1) LOG("TMS9902: resetting\n");
/* disable all interrupts */
- m_DSCENB = false; // Data Set Change Interrupt Enable
- m_TIMENB = false; // Timer Interrupt Enable
- m_XBIENB = false; // Transmit Buffer Interrupt Enable
- m_RIENB = false; // Read Buffer Interrupt Enable
+ m_DSCENB = false; // Data Set Change Interrupt Enable
+ m_TIMENB = false; // Timer Interrupt Enable
+ m_XBIENB = false; // Transmit Buffer Interrupt Enable
+ m_RIENB = false; // Read Buffer Interrupt Enable
/* initialize transmitter */
- m_XBRE = true; // Transmit Buffer Register Empty
- m_XSRE = true; // Transmit Shift Register Empty
+ m_XBRE = true; // Transmit Buffer Register Empty
+ m_XSRE = true; // Transmit Shift Register Empty
/* initialize receiver */
- m_RBRL = false; // Read Buffer Register Loaded
+ m_RBRL = false; // Read Buffer Register Loaded
/* clear RTS */
- m_RTSON = false; // Request-to-send on (flag)
- m_RTSout = true; // Note we are doing this to ensure the state is sent to the interface
+ m_RTSON = false; // Request-to-send on (flag)
+ m_RTSout = true; // Note we are doing this to ensure the state is sent to the interface
set_rts(CLEAR_LINE);
- m_RTSout = false; // what we actually want
+ m_RTSout = false; // what we actually want
/* set all register load flags to 1 */
m_LDCTRL = true;
@@ -564,7 +564,7 @@ void tms9902_device::reset_uart()
*/
WRITE8_MEMBER( tms9902_device::cruwrite )
{
- data &= 1; /* clear extra bits */
+ data &= 1; /* clear extra bits */
offset &= 0x1F;
if (VERBOSE>5) LOG("TMS9902: Setting bit %d = %02x\n", offset, data);
@@ -574,7 +574,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
UINT16 mask = (1 << offset);
if (m_LDCTRL)
- { // Control Register mode. Values written to bits 0-7 are copied
+ { // Control Register mode. Values written to bits 0-7 are copied
// into the control register.
switch (offset)
{
@@ -615,7 +615,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
}
}
else if (m_LDIR)
- { // Interval Register mode. Values written to bits 0-7 are copied
+ { // Interval Register mode. Values written to bits 0-7 are copied
// into the interval register.
if (offset <= 7)
{
@@ -632,7 +632,7 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
else if (m_LRDR || m_LXDR)
{
if (m_LRDR)
- { // Receive rate register mode. Values written to bits 0-10 are copied
+ { // Receive rate register mode. Values written to bits 0-10 are copied
// into the receive rate register.
if (offset < 10)
{
@@ -663,14 +663,14 @@ WRITE8_MEMBER( tms9902_device::cruwrite )
}
}
else
- { // LDCTRL=LDIR=LRDR=LXRD=0: Transmit buffer register mode. Values
+ { // LDCTRL=LDIR=LRDR=LXRD=0: Transmit buffer register mode. Values
// written to bits 0-7 are transferred into the transmit buffer register.
if (offset <= 7)
{
set_bits8(&m_XBR, mask, (data!=0));
if (offset == 7)
- { /* transmit */
+ { /* transmit */
m_XBRE = false;
// Spec: When the transmitter is active, the contents of the Transmit
// Buffer Register are transferred to the Transmit Shift Register
@@ -834,4 +834,3 @@ void tms9902_device::device_start()
}
const device_type TMS9902 = &device_creator<tms9902_device>;
-
diff --git a/src/emu/machine/tms9902.h b/src/emu/machine/tms9902.h
index 16784d3aa2e..6642c0d3721 100644
--- a/src/emu/machine/tms9902.h
+++ b/src/emu/machine/tms9902.h
@@ -44,133 +44,133 @@ extern const device_type TMS9902;
struct tms9902_interface
{
- devcb_write_line int_callback;
- devcb_write_line rcv_callback;
- devcb_write8 xmit_callback;
- devcb_write8 ctrl_callback;
+ devcb_write_line int_callback;
+ devcb_write_line rcv_callback;
+ devcb_write8 xmit_callback;
+ devcb_write8 ctrl_callback;
};
class tms9902_device : public device_t
{
public:
tms9902_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- void set_clock(bool state);
+ void set_clock(bool state);
- void rcv_cts(line_state state);
- void rcv_dsr(line_state state);
- void rcv_data(UINT8 data);
- void rcv_break(bool value);
- void rcv_framing_error();
- void rcv_parity_error();
+ void rcv_cts(line_state state);
+ void rcv_dsr(line_state state);
+ void rcv_data(UINT8 data);
+ void rcv_break(bool value);
+ void rcv_framing_error();
+ void rcv_parity_error();
- double get_baudpoll();
+ double get_baudpoll();
- int get_config_value();
+ int get_config_value();
DECLARE_READ8_MEMBER( cruread );
DECLARE_WRITE8_MEMBER( cruwrite );
protected:
- void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
- void device_start();
- void device_reset();
- void device_stop();
+ void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
+ void device_start();
+ void device_reset();
+ void device_stop();
private:
- void field_interrupts();
- void reload_interval_timer();
- void send_break(bool state);
- void set_receive_data_rate();
- void set_transmit_data_rate();
- void set_stop_bits();
- void set_data_bits();
- void set_parity();
- void transmit_line_state();
- void set_rts(line_state state);
- void initiate_transmit();
- void reset_uart();
-
- devcb_resolved_write_line int_callback;
- devcb_resolved_write_line rcv_callback;
- devcb_resolved_write8 xmit_callback;
- devcb_resolved_write8 ctrl_callback; // needs to be used with get_config_value
+ void field_interrupts();
+ void reload_interval_timer();
+ void send_break(bool state);
+ void set_receive_data_rate();
+ void set_transmit_data_rate();
+ void set_stop_bits();
+ void set_data_bits();
+ void set_parity();
+ void transmit_line_state();
+ void set_rts(line_state state);
+ void initiate_transmit();
+ void reset_uart();
+
+ devcb_resolved_write_line int_callback;
+ devcb_resolved_write_line rcv_callback;
+ devcb_resolved_write8 xmit_callback;
+ devcb_resolved_write8 ctrl_callback; // needs to be used with get_config_value
// tms9902 clock rate (PHI* pin, normally connected to TMS9900 Phi3*)
// Official range is 2MHz-3.3MHz. Some tms9902s were sold as "MP9214", and
// were tested for speeds up to 4MHz, provided the clk4m control bit is set.
// (warning: 3MHz on a tms9900 is equivalent to 12MHz on a tms9995 or tms99000)
- double m_clock_rate;
+ double m_clock_rate;
/* Modes */
- bool m_LDCTRL; // Load control register
- bool m_LDIR; // Load interval register
- bool m_LRDR; // Load receive data register
- bool m_LXDR; // Load transmit data register
- bool m_TSTMD; // Test mode
+ bool m_LDCTRL; // Load control register
+ bool m_LDIR; // Load interval register
+ bool m_LRDR; // Load receive data register
+ bool m_LXDR; // Load transmit data register
+ bool m_TSTMD; // Test mode
/* output pin */
- bool m_RTSON; // RTS-on request
+ bool m_RTSON; // RTS-on request
/* transmitter registers */
- bool m_BRKON; // BRK-on request
- bool m_BRKout; // indicates the current BRK state
+ bool m_BRKON; // BRK-on request
+ bool m_BRKout; // indicates the current BRK state
- UINT8 m_XBR; // transmit buffer register
- UINT8 m_XSR; // transmit shift register
+ UINT8 m_XBR; // transmit buffer register
+ UINT8 m_XSR; // transmit shift register
/* receiver registers */
- UINT8 m_RBR; // Receive buffer register
+ UINT8 m_RBR; // Receive buffer register
/* Interrupt enable flags */
- bool m_DSCENB; // Data set change interrupt enable
- bool m_RIENB; // Receiver interrupt enable
- bool m_XBIENB; // Tansmit buffer interrupt enable
- bool m_TIMENB; // Timer interrupt enable
+ bool m_DSCENB; // Data set change interrupt enable
+ bool m_RIENB; // Receiver interrupt enable
+ bool m_XBIENB; // Tansmit buffer interrupt enable
+ bool m_TIMENB; // Timer interrupt enable
/*
- Rate registers. The receive bit rate calculates as
- bitrate = clock1 / (2 * (8 ^ RDV8) * RDR)
- (similarly for transmit)
+ Rate registers. The receive bit rate calculates as
+ bitrate = clock1 / (2 * (8 ^ RDV8) * RDR)
+ (similarly for transmit)
- where clock1 = clock_rate / (CLK4M? 4:3)
- */
- UINT16 m_RDR; // Receive data rate
- bool m_RDV8; // Receive data rate divider
- UINT16 m_XDR; // Transmit data rate
- bool m_XDV8; // Transmit data rate divider
+ where clock1 = clock_rate / (CLK4M? 4:3)
+ */
+ UINT16 m_RDR; // Receive data rate
+ bool m_RDV8; // Receive data rate divider
+ UINT16 m_XDR; // Transmit data rate
+ bool m_XDV8; // Transmit data rate divider
/* Status flags */
- bool m_INT; // mirrors /INT output line, inverted
- bool m_DSCH; // Data set status change
+ bool m_INT; // mirrors /INT output line, inverted
+ bool m_DSCH; // Data set status change
- bool m_CTSin; // Inverted /CTS input (i.e. CTS)
- bool m_DSRin; // Inverted /DSR input (i.e. DSR)
- bool m_RTSout; // Current inverted /RTS line state (i.e. RTS)
+ bool m_CTSin; // Inverted /CTS input (i.e. CTS)
+ bool m_DSRin; // Inverted /DSR input (i.e. DSR)
+ bool m_RTSout; // Current inverted /RTS line state (i.e. RTS)
- bool m_TIMELP; // Timer elapsed
- bool m_TIMERR; // Timer error
+ bool m_TIMELP; // Timer elapsed
+ bool m_TIMERR; // Timer error
- bool m_XSRE; // Transmit shift register empty
- bool m_XBRE; // Transmit buffer register empty
- bool m_RBRL; // Receive buffer register loaded
+ bool m_XSRE; // Transmit shift register empty
+ bool m_XBRE; // Transmit buffer register empty
+ bool m_RBRL; // Receive buffer register loaded
- bool m_RIN; // State of the RIN pin
- bool m_RSBD; // Receive start bit detect
- bool m_RFBD; // Receive full bit detect
- bool m_RFER; // Receive framing error
- bool m_ROVER; // Receiver overflow
- bool m_RPER; // Receive parity error
+ bool m_RIN; // State of the RIN pin
+ bool m_RSBD; // Receive start bit detect
+ bool m_RFBD; // Receive full bit detect
+ bool m_RFER; // Receive framing error
+ bool m_ROVER; // Receiver overflow
+ bool m_RPER; // Receive parity error
- UINT8 m_RCL; // Character length
- bool m_ODDP;
- bool m_PENB;
- UINT8 m_STOPB;
- bool m_CLK4M; // /PHI input divide select
+ UINT8 m_RCL; // Character length
+ bool m_ODDP;
+ bool m_PENB;
+ UINT8 m_STOPB;
+ bool m_CLK4M; // /PHI input divide select
- UINT8 m_TMR; /* interval timer */
+ UINT8 m_TMR; /* interval timer */
/* clock registers */
- emu_timer *m_dectimer; /* MESS timer, used to emulate the decrementer register */
+ emu_timer *m_dectimer; /* MESS timer, used to emulate the decrementer register */
emu_timer *m_recvtimer;
emu_timer *m_sendtimer;
@@ -178,10 +178,10 @@ private:
// data source should deliver data bytes at every 1/baudpoll call.
// This is to ensure that data is delivered at a rate that is expected
// from the emulated program.
- double m_baudpoll;
+ double m_baudpoll;
// Caches the last configuration setting (used with the ctrl_callback)
- int m_last_config_value;
+ int m_last_config_value;
};
/***************************************************************************
diff --git a/src/emu/machine/upd1990a.c b/src/emu/machine/upd1990a.c
index aec6bd97653..52414a33bb7 100644
--- a/src/emu/machine/upd1990a.c
+++ b/src/emu/machine/upd1990a.c
@@ -56,8 +56,8 @@ enum
upd1990a_rtc_device::upd1990a_rtc_device(const machine_config &mconfig, device_type type, const char* name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_rtc_interface(mconfig, *this),
- m_data_out(0)
+ device_rtc_interface(mconfig, *this),
+ m_data_out(0)
{
}
@@ -126,7 +126,7 @@ void upd1990a_rtc_device::device_start()
save_item(NAME(m_c));
save_item(NAME(m_clk));
save_item(NAME(m_tp));
- save_item(NAME(m_c_unlatched));
+ save_item(NAME(m_c_unlatched));
}
@@ -255,7 +255,7 @@ WRITE_LINE_MEMBER( upd1990a_rtc_device::stb_w )
if (m_cs && m_stb && !m_clk)
{
- m_c = m_c_unlatched; // if STB = 1, latch in the command bits
+ m_c = m_c_unlatched; // if STB = 1, latch in the command bits
switch (m_c)
{
diff --git a/src/emu/machine/upd1990a.h b/src/emu/machine/upd1990a.h
index 8b7c7b21599..7078ed9569e 100644
--- a/src/emu/machine/upd1990a.h
+++ b/src/emu/machine/upd1990a.h
@@ -38,7 +38,7 @@
//**************************************************************************
#define MCFG_UPD1990A_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), UPD1990A, _clock) \
+ MCFG_DEVICE_ADD((_tag), UPD1990A, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define UPD1990A_INTERFACE(name) \
@@ -54,19 +54,19 @@
struct upd1990a_interface
{
- devcb_write_line m_out_data_cb;
- devcb_write_line m_out_tp_cb;
+ devcb_write_line m_out_data_cb;
+ devcb_write_line m_out_tp_cb;
};
// ======================> upd1990a_device
-class upd1990a_rtc_device : public device_t,
- public device_rtc_interface,
- public upd1990a_interface
+class upd1990a_rtc_device : public device_t,
+ public device_rtc_interface,
+ public upd1990a_interface
{
public:
- // construction/destruction
+ // construction/destruction
upd1990a_rtc_device(const machine_config &mconfig, device_type type, const char* name, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE_LINE_MEMBER( oe_w );
@@ -81,10 +81,10 @@ public:
DECLARE_READ_LINE_MEMBER( tp_r );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_rtc_interface overrides
@@ -101,21 +101,21 @@ private:
static const device_timer_id TIMER_DATA_OUT = 2;
static const device_timer_id TIMER_TEST_MODE = 3;
- devcb_resolved_write_line m_out_data_func;
- devcb_resolved_write_line m_out_tp_func;
-
- UINT8 m_time_counter[5]; // time counter
- UINT8 m_shift_reg[5]; // shift register
-
- int m_oe; // output enable
- int m_cs; // chip select
- int m_stb; // strobe
- int m_data_in; // data in
- int m_data_out; // data out
- int m_c; // command
- int m_clk; // shift clock
- int m_tp; // time pulse
- int m_c_unlatched; // command waiting for STB
+ devcb_resolved_write_line m_out_data_func;
+ devcb_resolved_write_line m_out_tp_func;
+
+ UINT8 m_time_counter[5]; // time counter
+ UINT8 m_shift_reg[5]; // shift register
+
+ int m_oe; // output enable
+ int m_cs; // chip select
+ int m_stb; // strobe
+ int m_data_in; // data in
+ int m_data_out; // data out
+ int m_c; // command
+ int m_clk; // shift clock
+ int m_tp; // time pulse
+ int m_c_unlatched; // command waiting for STB
// timers
emu_timer *m_timer_clock;
diff --git a/src/emu/machine/upd4701.c b/src/emu/machine/upd4701.c
index a82c509bbcc..950338153ce 100644
--- a/src/emu/machine/upd4701.c
+++ b/src/emu/machine/upd4701.c
@@ -335,5 +335,3 @@ void upd4701_device::device_reset()
{
DEVICE_RESET_NAME( upd4701 )(this);
}
-
-
diff --git a/src/emu/machine/upd4701.h b/src/emu/machine/upd4701.h
index 582357a4ebc..80af60e227f 100644
--- a/src/emu/machine/upd4701.h
+++ b/src/emu/machine/upd4701.h
@@ -58,4 +58,4 @@ extern DECLARE_READ8_DEVICE_HANDLER( upd4701_cf_r );
extern DECLARE_READ8_DEVICE_HANDLER( upd4701_sf_r );
-#endif /* __UPD4701_H__ */
+#endif /* __UPD4701_H__ */
diff --git a/src/emu/machine/upd7201.c b/src/emu/machine/upd7201.c
index 9fba5fa2682..06d06ef9b07 100644
--- a/src/emu/machine/upd7201.c
+++ b/src/emu/machine/upd7201.c
@@ -71,7 +71,7 @@ inline void upd7201_device::transmit(int channel)
//-------------------------------------------------
upd7201_device::upd7201_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, UPD7201, "UPD7201", tag, owner, clock)
+ : device_t(mconfig, UPD7201, "UPD7201", tag, owner, clock)
{
}
diff --git a/src/emu/machine/upd7201.h b/src/emu/machine/upd7201.h
index 90d65d53f7d..f711826d127 100644
--- a/src/emu/machine/upd7201.h
+++ b/src/emu/machine/upd7201.h
@@ -44,7 +44,7 @@
//**************************************************************************
#define MCFG_UPD7201_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), UPD7201, _clock) \
+ MCFG_DEVICE_ADD((_tag), UPD7201, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define UPD7201_INTERFACE(name) \
@@ -60,26 +60,26 @@
struct upd7201_interface
{
- devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_int_cb;
struct
{
- int m_rx_clock;
- int m_tx_clock;
+ int m_rx_clock;
+ int m_tx_clock;
- devcb_write_line m_out_drqrx_cb;
- devcb_write_line m_out_drqtx_cb;
+ devcb_write_line m_out_drqrx_cb;
+ devcb_write_line m_out_drqtx_cb;
- devcb_read_line m_in_rxd_cb;
- devcb_write_line m_out_txd_cb;
+ devcb_read_line m_in_rxd_cb;
+ devcb_write_line m_out_txd_cb;
- devcb_read_line m_in_cts_cb;
- devcb_read_line m_in_dcd_cb;
- devcb_write_line m_out_rts_cb;
- devcb_write_line m_out_dtr_cb;
+ devcb_read_line m_in_cts_cb;
+ devcb_read_line m_in_dcd_cb;
+ devcb_write_line m_out_rts_cb;
+ devcb_write_line m_out_dtr_cb;
- devcb_write_line m_out_wait_cb;
- devcb_write_line m_out_sync_cb;
+ devcb_write_line m_out_wait_cb;
+ devcb_write_line m_out_sync_cb;
} m_channel[2];
};
@@ -87,12 +87,12 @@ struct upd7201_interface
// ======================> upd7201_device
-class upd7201_device : public device_t,
- public upd7201_interface
+class upd7201_device : public device_t,
+ public upd7201_interface
{
public:
- // construction/destruction
- upd7201_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ upd7201_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( cd_ba_r );
DECLARE_WRITE8_MEMBER( cd_ba_w );
@@ -118,10 +118,10 @@ public:
DECLARE_WRITE_LINE_MEMBER( txcb_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int m_param, void *ptr);
private:
@@ -133,7 +133,7 @@ private:
inline void receive(int channel);
inline void transmit(int channel);
- devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_int_func;
// timers
emu_timer *m_rx_a_timer;
diff --git a/src/emu/machine/upd765.c b/src/emu/machine/upd765.c
index 057b081562c..416fd890b5e 100644
--- a/src/emu/machine/upd765.c
+++ b/src/emu/machine/upd765.c
@@ -967,7 +967,7 @@ void upd765_family_device::live_run(attotime limit)
live_write_mfm(byte);
if(cur_live.byte_counter == 19)
logerror("%s: formatting sector %02x %02x %02x %02x\n",
- tag(), command[12], command[13], command[14], command[15]);
+ tag(), command[12], command[13], command[14], command[15]);
} else if(cur_live.byte_counter < 22)
live_write_mfm(cur_live.crc >> 8);
else if(cur_live.byte_counter < 44)
@@ -1003,7 +1003,7 @@ void upd765_family_device::live_run(attotime limit)
live_write_fm(byte);
if(cur_live.byte_counter == 10)
logerror("%s: formatting sector %02x %02x %02x %02x\n",
- tag(), command[12], command[13], command[14], command[15]);
+ tag(), command[12], command[13], command[14], command[15]);
} else if(cur_live.byte_counter < 13)
live_write_fm(cur_live.crc >> 8);
else if(cur_live.byte_counter < 24)
@@ -1153,8 +1153,8 @@ void upd765_family_device::start_command(int cmd)
switch(cmd) {
case C_CONFIGURE:
logerror("%s: command configure %02x %02x %02x\n",
- tag(),
- command[1], command[2], command[3]);
+ tag(),
+ command[1], command[2], command[3]);
// byte 1 is ignored, byte 3 is precompensation-related
fifocfg = command[2];
precomp = command[3];
@@ -1280,8 +1280,8 @@ void upd765_family_device::start_command(int cmd)
case C_SPECIFY:
logerror("%s: command specify %02x %02x\n",
- tag(),
- command[1], command[2]);
+ tag(),
+ command[1], command[2]);
spec = (command[1] << 8) | command[2];
main_phase = PHASE_CMD;
break;
@@ -1405,22 +1405,22 @@ void upd765_family_device::read_data_start(floppy_info &fi)
mfm = command[0] & 0x40;
logerror("%s: command read%s data%s%s%s%s cmd=%02x sel=%x chrn=(%d, %d, %d, %d) eot=%02x gpl=%02x dtl=%02x rate=%d\n",
- tag(),
- command[0] & 0x08 ? " deleted" : "",
- command[0] & 0x80 ? " mt" : "",
- command[0] & 0x40 ? " mfm" : "",
- command[0] & 0x20 ? " sk" : "",
- fifocfg & 0x40 ? " seek" : "",
- command[0],
- command[1],
- command[2],
- command[3],
- command[4],
- 128 << (command[5] & 7),
- command[6],
- command[7],
- command[8],
- cur_rate);
+ tag(),
+ command[0] & 0x08 ? " deleted" : "",
+ command[0] & 0x80 ? " mt" : "",
+ command[0] & 0x40 ? " mfm" : "",
+ command[0] & 0x20 ? " sk" : "",
+ fifocfg & 0x40 ? " seek" : "",
+ command[0],
+ command[1],
+ command[2],
+ command[3],
+ command[4],
+ 128 << (command[5] & 7),
+ command[6],
+ command[7],
+ command[8],
+ cur_rate);
fi.st0 = command[1] & 7;
st1 = ST1_MA;
@@ -1499,11 +1499,11 @@ void upd765_family_device::read_data_continue(floppy_info &fi)
return;
}
logerror("%s: reading sector %02x %02x %02x %02x\n",
- tag(),
- cur_live.idbuf[0],
- cur_live.idbuf[1],
- cur_live.idbuf[2],
- cur_live.idbuf[3]);
+ tag(),
+ cur_live.idbuf[0],
+ cur_live.idbuf[1],
+ cur_live.idbuf[2],
+ cur_live.idbuf[3]);
sector_size = calc_sector_size(cur_live.idbuf[3]);
fifo_expect(sector_size, false);
fi.sub_state = SECTOR_READ;
@@ -1583,20 +1583,20 @@ void upd765_family_device::write_data_start(floppy_info &fi)
fi.sub_state = HEAD_LOAD_DONE;
mfm = command[0] & 0x40;
logerror("%s: command write%s data%s%s cmd=%02x sel=%x chrn=(%d, %d, %d, %d) eot=%02x gpl=%02x dtl=%02x rate=%d\n",
- tag(),
- command[0] & 0x08 ? " deleted" : "",
- command[0] & 0x80 ? " mt" : "",
- command[0] & 0x40 ? " mfm" : "",
- command[0],
- command[1],
- command[2],
- command[3],
- command[4],
- 128 << (command[5] & 7),
- command[6],
- command[7],
- command[8],
- cur_rate);
+ tag(),
+ command[0] & 0x08 ? " deleted" : "",
+ command[0] & 0x80 ? " mt" : "",
+ command[0] & 0x40 ? " mfm" : "",
+ command[0],
+ command[1],
+ command[2],
+ command[3],
+ command[4],
+ 128 << (command[5] & 7),
+ command[6],
+ command[7],
+ command[8],
+ cur_rate);
if(fi.dev)
fi.dev->ss_w(command[1] & 4 ? 1 : 0);
@@ -1698,18 +1698,18 @@ void upd765_family_device::read_track_start(floppy_info &fi)
mfm = command[0] & 0x40;
logerror("%s: command read track%s cmd=%02x sel=%x chrn=(%d, %d, %d, %d) eot=%02x gpl=%02x dtl=%02x rate=%d\n",
- tag(),
- command[0] & 0x40 ? " mfm" : "",
- command[0],
- command[1],
- command[2],
- command[3],
- command[4],
- 128 << (command[5] & 7),
- command[6],
- command[7],
- command[8],
- cur_rate);
+ tag(),
+ command[0] & 0x40 ? " mfm" : "",
+ command[0],
+ command[1],
+ command[2],
+ command[3],
+ command[4],
+ 128 << (command[5] & 7),
+ command[6],
+ command[7],
+ command[8],
+ cur_rate);
if(fi.dev)
fi.dev->ss_w(command[1] & 4 ? 1 : 0);
@@ -1819,9 +1819,9 @@ void upd765_family_device::format_track_start(floppy_info &fi)
mfm = command[0] & 0x40;
logerror("%s: command format track %s h=%02x n=%02x sc=%02x gpl=%02x d=%02x\n",
- tag(),
- command[0] & 0x40 ? "mfm" : "fm",
- command[1], command[2], command[3], command[4], command[5]);
+ tag(),
+ command[0] & 0x40 ? "mfm" : "fm",
+ command[1], command[2], command[3], command[4], command[5]);
if(fi.dev)
fi.dev->ss_w(command[1] & 4 ? 1 : 0);
@@ -1875,9 +1875,9 @@ void upd765_family_device::read_id_start(floppy_info &fi)
mfm = command[0] & 0x40;
logerror("%s: command read id%s, rate=%d\n",
- tag(),
- command[0] & 0x40 ? " mfm" : "",
- cur_rate);
+ tag(),
+ command[0] & 0x40 ? " mfm" : "",
+ cur_rate);
if(fi.dev)
fi.dev->ss_w(command[1] & 4 ? 1 : 0);
@@ -2185,8 +2185,8 @@ bool upd765_family_device::sector_matches() const
{
if(0)
logerror("%s: matching %02x %02x %02x %02x - %02x %02x %02x %02x\n", tag(),
- cur_live.idbuf[0], cur_live.idbuf[1], cur_live.idbuf[2], cur_live.idbuf[3],
- command[2], command[3], command[4], command[5]);
+ cur_live.idbuf[0], cur_live.idbuf[1], cur_live.idbuf[2], cur_live.idbuf[3],
+ command[2], command[3], command[4], command[5]);
return
cur_live.idbuf[0] == command[2] &&
cur_live.idbuf[1] == command[3] &&
diff --git a/src/emu/machine/upd765.h b/src/emu/machine/upd765.h
index dc193f9472b..e31f7b8ccb6 100644
--- a/src/emu/machine/upd765.h
+++ b/src/emu/machine/upd765.h
@@ -11,42 +11,42 @@
* mode = MODE_AT, MODE_PS2 or MODE_M30 for the fdcs that have reset-time selection
*/
-#define MCFG_UPD765A_ADD(_tag, _ready, _select) \
- MCFG_DEVICE_ADD(_tag, UPD765A, 0) \
- downcast<upd765a_device *>(device)->set_ready_line_connected(_ready); \
+#define MCFG_UPD765A_ADD(_tag, _ready, _select) \
+ MCFG_DEVICE_ADD(_tag, UPD765A, 0) \
+ downcast<upd765a_device *>(device)->set_ready_line_connected(_ready); \
downcast<upd765a_device *>(device)->set_select_lines_connected(_select);
-#define MCFG_UPD765B_ADD(_tag, _ready, _select) \
- MCFG_DEVICE_ADD(_tag, UPD765B, 0) \
- downcast<upd765b_device *>(device)->set_ready_line_connected(_ready); \
+#define MCFG_UPD765B_ADD(_tag, _ready, _select) \
+ MCFG_DEVICE_ADD(_tag, UPD765B, 0) \
+ downcast<upd765b_device *>(device)->set_ready_line_connected(_ready); \
downcast<upd765b_device *>(device)->set_select_lines_connected(_select);
-#define MCFG_I8272A_ADD(_tag, _ready) \
- MCFG_DEVICE_ADD(_tag, I8272A, 0) \
+#define MCFG_I8272A_ADD(_tag, _ready) \
+ MCFG_DEVICE_ADD(_tag, I8272A, 0) \
downcast<i8272a_device *>(device)->set_ready_line_connected(_ready);
-#define MCFG_UPD72065_ADD(_tag, _ready, _select) \
- MCFG_DEVICE_ADD(_tag, UPD72065, 0) \
- downcast<upd72065_device *>(device)->set_ready_line_connected(_ready); \
+#define MCFG_UPD72065_ADD(_tag, _ready, _select) \
+ MCFG_DEVICE_ADD(_tag, UPD72065, 0) \
+ downcast<upd72065_device *>(device)->set_ready_line_connected(_ready); \
downcast<upd72065_device *>(device)->set_select_lines_connected(_select);
-#define MCFG_SMC37C78_ADD(_tag) \
+#define MCFG_SMC37C78_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, SMC37C78, 0)
-#define MCFG_N82077AA_ADD(_tag, _mode) \
- MCFG_DEVICE_ADD(_tag, N82077AA, 0) \
+#define MCFG_N82077AA_ADD(_tag, _mode) \
+ MCFG_DEVICE_ADD(_tag, N82077AA, 0) \
downcast<n82077aa_device *>(device)->set_mode(_mode);
-#define MCFG_PC_FDC_SUPERIO_ADD(_tag) \
+#define MCFG_PC_FDC_SUPERIO_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, PC_FDC_SUPERIO, 0)
-#define MCFG_DP8473_ADD(_tag) \
+#define MCFG_DP8473_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, DP8473, 0)
-#define MCFG_PC8477A_ADD(_tag) \
+#define MCFG_PC8477A_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, PC8477A, 0)
-#define MCFG_WD37C65C_ADD(_tag) \
+#define MCFG_WD37C65C_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, WD37C65C, 0)
/* Interface required for PC ISA wrapping */
@@ -62,9 +62,9 @@ public:
virtual void setup_drq_cb(line_cb cb) = 0;
/* Note that the address map must cover and handle the whole 0-7
- * range. The upd765, while conforming to the rest of the
- * interface, is not eligible as a result.
- */
+ * range. The upd765, while conforming to the rest of the
+ * interface, is not eligible as a result.
+ */
virtual DECLARE_ADDRESS_MAP(map, 8) = 0;
diff --git a/src/emu/machine/v3021.c b/src/emu/machine/v3021.c
index 09ed13a7bdb..e95dc0ad509 100644
--- a/src/emu/machine/v3021.c
+++ b/src/emu/machine/v3021.c
@@ -44,14 +44,14 @@ void v3021_device::timer_callback()
m_rtc.sec++;
- if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; }
- if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; }
- if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; }
- if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; }
- if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; }
- if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday<<=1; m_rtc.hour = 0; }
- if(m_rtc.wday & 0x80) { m_rtc.wday = 1; }
- if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; }
+ if((m_rtc.sec & 0x0f) >= 0x0a) { m_rtc.sec+=0x10; m_rtc.sec&=0xf0; }
+ if((m_rtc.sec & 0xf0) >= 0x60) { m_rtc.min++; m_rtc.sec = 0; }
+ if((m_rtc.min & 0x0f) >= 0x0a) { m_rtc.min+=0x10; m_rtc.min&=0xf0; }
+ if((m_rtc.min & 0xf0) >= 0x60) { m_rtc.hour++; m_rtc.min = 0; }
+ if((m_rtc.hour & 0x0f) >= 0x0a) { m_rtc.hour+=0x10; m_rtc.hour&=0xf0; }
+ if((m_rtc.hour & 0xff) >= 0x24) { m_rtc.day++; m_rtc.wday<<=1; m_rtc.hour = 0; }
+ if(m_rtc.wday & 0x80) { m_rtc.wday = 1; }
+ if((m_rtc.day & 0x0f) >= 0x0a) { m_rtc.day+=0x10; m_rtc.day&=0xf0; }
/* TODO: crude leap year support */
dpm_count = (m_rtc.month & 0xf) + (((m_rtc.month & 0x10) >> 4)*10)-1;
@@ -62,10 +62,10 @@ void v3021_device::timer_callback()
{ m_rtc.month++; m_rtc.day = 0x01; }
}
else if((m_rtc.day & 0xff) >= dpm[dpm_count]+1){ m_rtc.month++; m_rtc.day = 0x01; }
- if((m_rtc.month & 0x0f) >= 0x0a) { m_rtc.month = 0x10; }
- if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; }
- if((m_rtc.year & 0x0f) >= 0x0a) { m_rtc.year+=0x10; m_rtc.year&=0xf0; }
- if((m_rtc.year & 0xf0) >= 0xa0) { m_rtc.year = 0; } //2000-2099 possible timeframe
+ if((m_rtc.month & 0x0f) >= 0x0a) { m_rtc.month = 0x10; }
+ if(m_rtc.month >= 0x13) { m_rtc.year++; m_rtc.month = 1; }
+ if((m_rtc.year & 0x0f) >= 0x0a) { m_rtc.year+=0x10; m_rtc.year&=0xf0; }
+ if((m_rtc.year & 0xf0) >= 0xa0) { m_rtc.year = 0; } //2000-2099 possible timeframe
}
TIMER_CALLBACK( v3021_device::rtc_inc_callback )
diff --git a/src/emu/machine/v3021.h b/src/emu/machine/v3021.h
index b3934441f90..f4e38c08f39 100644
--- a/src/emu/machine/v3021.h
+++ b/src/emu/machine/v3021.h
@@ -35,7 +35,7 @@ struct rtc_regs_t
// ======================> v3021_device
-class v3021_device : public device_t
+class v3021_device : public device_t
{
public:
// construction/destruction
diff --git a/src/emu/machine/wd17xx.c b/src/emu/machine/wd17xx.c
index 0e465862098..1bdd53647ec 100644
--- a/src/emu/machine/wd17xx.c
+++ b/src/emu/machine/wd17xx.c
@@ -160,125 +160,125 @@
CONSTANTS
***************************************************************************/
-#define VERBOSE 0 /* General logging */
-#define VERBOSE_DATA 0 /* Logging of each byte during read and write */
+#define VERBOSE 0 /* General logging */
+#define VERBOSE_DATA 0 /* Logging of each byte during read and write */
-#define DELAY_ERROR 3
-#define DELAY_NOTREADY 1
-#define DELAY_DATADONE 3
+#define DELAY_ERROR 3
+#define DELAY_NOTREADY 1
+#define DELAY_DATADONE 3
-#define TYPE_I 1
-#define TYPE_II 2
-#define TYPE_III 3
-#define TYPE_IV 4
+#define TYPE_I 1
+#define TYPE_II 2
+#define TYPE_III 3
+#define TYPE_IV 4
#define FDC_STEP_RATE 0x03 /* Type I additional flags */
-#define FDC_STEP_VERIFY 0x04 /* verify track number */
-#define FDC_STEP_HDLOAD 0x08 /* load head */
-#define FDC_STEP_UPDATE 0x10 /* update track register */
+#define FDC_STEP_VERIFY 0x04 /* verify track number */
+#define FDC_STEP_HDLOAD 0x08 /* load head */
+#define FDC_STEP_UPDATE 0x10 /* update track register */
-#define FDC_RESTORE 0x00 /* Type I commands */
-#define FDC_SEEK 0x10
-#define FDC_STEP 0x20
-#define FDC_STEP_IN 0x40
-#define FDC_STEP_OUT 0x60
+#define FDC_RESTORE 0x00 /* Type I commands */
+#define FDC_SEEK 0x10
+#define FDC_STEP 0x20
+#define FDC_STEP_IN 0x40
+#define FDC_STEP_OUT 0x60
-#define FDC_MASK_TYPE_I (FDC_STEP_HDLOAD|FDC_STEP_VERIFY|FDC_STEP_RATE)
+#define FDC_MASK_TYPE_I (FDC_STEP_HDLOAD|FDC_STEP_VERIFY|FDC_STEP_RATE)
/* Type I commands status */
-#define STA_1_BUSY 0x01 /* controller is busy */
-#define STA_1_IPL 0x02 /* index pulse */
-#define STA_1_TRACK0 0x04 /* track 0 detected */
-#define STA_1_CRC_ERR 0x08 /* CRC error */
-#define STA_1_SEEK_ERR 0x10 /* seek error */
-#define STA_1_HD_LOADED 0x20 /* head loaded */
-#define STA_1_WRITE_PRO 0x40 /* floppy is write protected */
-#define STA_1_NOT_READY 0x80 /* drive not ready */
-#define STA_1_MOTOR_ON 0x80 /* status of the Motor On output (WD1770 and WD1772 only) */
+#define STA_1_BUSY 0x01 /* controller is busy */
+#define STA_1_IPL 0x02 /* index pulse */
+#define STA_1_TRACK0 0x04 /* track 0 detected */
+#define STA_1_CRC_ERR 0x08 /* CRC error */
+#define STA_1_SEEK_ERR 0x10 /* seek error */
+#define STA_1_HD_LOADED 0x20 /* head loaded */
+#define STA_1_WRITE_PRO 0x40 /* floppy is write protected */
+#define STA_1_NOT_READY 0x80 /* drive not ready */
+#define STA_1_MOTOR_ON 0x80 /* status of the Motor On output (WD1770 and WD1772 only) */
/* Type II and III additional flags */
-#define FDC_DELETED_AM 0x01 /* read/write deleted address mark */
-#define FDC_SIDE_CMP_T 0x02 /* side compare track data */
-#define FDC_15MS_DELAY 0x04 /* delay 15ms before command */
-#define FDC_SIDE_CMP_S 0x08 /* side compare sector data */
-#define FDC_MULTI_REC 0x10 /* only for type II commands */
+#define FDC_DELETED_AM 0x01 /* read/write deleted address mark */
+#define FDC_SIDE_CMP_T 0x02 /* side compare track data */
+#define FDC_15MS_DELAY 0x04 /* delay 15ms before command */
+#define FDC_SIDE_CMP_S 0x08 /* side compare sector data */
+#define FDC_MULTI_REC 0x10 /* only for type II commands */
/* Type II commands */
-#define FDC_READ_SEC 0x80 /* read sector */
-#define FDC_WRITE_SEC 0xA0 /* write sector */
+#define FDC_READ_SEC 0x80 /* read sector */
+#define FDC_WRITE_SEC 0xA0 /* write sector */
-#define FDC_MASK_TYPE_II (FDC_MULTI_REC|FDC_SIDE_CMP_S|FDC_15MS_DELAY|FDC_SIDE_CMP_T|FDC_DELETED_AM)
+#define FDC_MASK_TYPE_II (FDC_MULTI_REC|FDC_SIDE_CMP_S|FDC_15MS_DELAY|FDC_SIDE_CMP_T|FDC_DELETED_AM)
/* Type II commands status */
-#define STA_2_BUSY 0x01
-#define STA_2_DRQ 0x02
-#define STA_2_LOST_DAT 0x04
-#define STA_2_CRC_ERR 0x08
+#define STA_2_BUSY 0x01
+#define STA_2_DRQ 0x02
+#define STA_2_LOST_DAT 0x04
+#define STA_2_CRC_ERR 0x08
#define STA_2_REC_N_FND 0x10
-#define STA_2_REC_TYPE 0x20
+#define STA_2_REC_TYPE 0x20
#define STA_2_WRITE_PRO 0x40
#define STA_2_NOT_READY 0x80
-#define FDC_MASK_TYPE_III (FDC_SIDE_CMP_S|FDC_15MS_DELAY|FDC_SIDE_CMP_T|FDC_DELETED_AM)
+#define FDC_MASK_TYPE_III (FDC_SIDE_CMP_S|FDC_15MS_DELAY|FDC_SIDE_CMP_T|FDC_DELETED_AM)
/* Type III commands */
-#define FDC_READ_DAM 0xc0 /* read data address mark */
-#define FDC_READ_TRK 0xe0 /* read track */
-#define FDC_WRITE_TRK 0xf0 /* write track (format) */
+#define FDC_READ_DAM 0xc0 /* read data address mark */
+#define FDC_READ_TRK 0xe0 /* read track */
+#define FDC_WRITE_TRK 0xf0 /* write track (format) */
/* Type IV additional flags */
-#define FDC_IM0 0x01 /* interrupt mode 0 */
-#define FDC_IM1 0x02 /* interrupt mode 1 */
-#define FDC_IM2 0x04 /* interrupt mode 2 */
-#define FDC_IM3 0x08 /* interrupt mode 3 */
+#define FDC_IM0 0x01 /* interrupt mode 0 */
+#define FDC_IM1 0x02 /* interrupt mode 1 */
+#define FDC_IM2 0x04 /* interrupt mode 2 */
+#define FDC_IM3 0x08 /* interrupt mode 3 */
-#define FDC_MASK_TYPE_IV (FDC_IM3|FDC_IM2|FDC_IM1|FDC_IM0)
+#define FDC_MASK_TYPE_IV (FDC_IM3|FDC_IM2|FDC_IM1|FDC_IM0)
/* Type IV commands */
-#define FDC_FORCE_INT 0xd0 /* force interrupt */
+#define FDC_FORCE_INT 0xd0 /* force interrupt */
/* structure describing a double density track */
-#define TRKSIZE_DD 6144
+#define TRKSIZE_DD 6144
#if 0
static const UINT8 track_DD[][2] = {
- {16, 0x4e}, /* 16 * 4E (track lead in) */
- { 8, 0x00}, /* 8 * 00 (pre DAM) */
- { 3, 0xf5}, /* 3 * F5 (clear CRC) */
-
- { 1, 0xfe}, /* *** sector *** FE (DAM) */
- { 1, 0x80}, /* 4 bytes track,head,sector,seclen */
- { 1, 0xf7}, /* 1 * F7 (CRC) */
- {22, 0x4e}, /* 22 * 4E (sector lead in) */
- {12, 0x00}, /* 12 * 00 (pre AM) */
- { 3, 0xf5}, /* 3 * F5 (clear CRC) */
- { 1, 0xfb}, /* 1 * FB (AM) */
- { 1, 0x81}, /* x bytes sector data */
- { 1, 0xf7}, /* 1 * F7 (CRC) */
- {16, 0x4e}, /* 16 * 4E (sector lead out) */
- { 8, 0x00}, /* 8 * 00 (post sector) */
- { 0, 0x00}, /* end of data */
+ {16, 0x4e}, /* 16 * 4E (track lead in) */
+ { 8, 0x00}, /* 8 * 00 (pre DAM) */
+ { 3, 0xf5}, /* 3 * F5 (clear CRC) */
+
+ { 1, 0xfe}, /* *** sector *** FE (DAM) */
+ { 1, 0x80}, /* 4 bytes track,head,sector,seclen */
+ { 1, 0xf7}, /* 1 * F7 (CRC) */
+ {22, 0x4e}, /* 22 * 4E (sector lead in) */
+ {12, 0x00}, /* 12 * 00 (pre AM) */
+ { 3, 0xf5}, /* 3 * F5 (clear CRC) */
+ { 1, 0xfb}, /* 1 * FB (AM) */
+ { 1, 0x81}, /* x bytes sector data */
+ { 1, 0xf7}, /* 1 * F7 (CRC) */
+ {16, 0x4e}, /* 16 * 4E (sector lead out) */
+ { 8, 0x00}, /* 8 * 00 (post sector) */
+ { 0, 0x00}, /* end of data */
};
#endif
/* structure describing a single density track */
-#define TRKSIZE_SD 3172
+#define TRKSIZE_SD 3172
#if 0
static const UINT8 track_SD[][2] = {
- {16, 0xff}, /* 16 * FF (track lead in) */
- { 8, 0x00}, /* 8 * 00 (pre DAM) */
- { 1, 0xfc}, /* 1 * FC (clear CRC) */
-
- {11, 0xff}, /* *** sector *** 11 * FF */
- { 6, 0x00}, /* 6 * 00 (pre DAM) */
- { 1, 0xfe}, /* 1 * FE (DAM) */
- { 1, 0x80}, /* 4 bytes track,head,sector,seclen */
- { 1, 0xf7}, /* 1 * F7 (CRC) */
- {10, 0xff}, /* 10 * FF (sector lead in) */
- { 4, 0x00}, /* 4 * 00 (pre AM) */
- { 1, 0xfb}, /* 1 * FB (AM) */
- { 1, 0x81}, /* x bytes sector data */
- { 1, 0xf7}, /* 1 * F7 (CRC) */
- { 0, 0x00}, /* end of data */
+ {16, 0xff}, /* 16 * FF (track lead in) */
+ { 8, 0x00}, /* 8 * 00 (pre DAM) */
+ { 1, 0xfc}, /* 1 * FC (clear CRC) */
+
+ {11, 0xff}, /* *** sector *** 11 * FF */
+ { 6, 0x00}, /* 6 * 00 (pre DAM) */
+ { 1, 0xfe}, /* 1 * FE (DAM) */
+ { 1, 0x80}, /* 4 bytes track,head,sector,seclen */
+ { 1, 0xf7}, /* 1 * F7 (CRC) */
+ {10, 0xff}, /* 10 * FF (sector lead in) */
+ { 4, 0x00}, /* 4 * 00 (pre AM) */
+ { 1, 0xfb}, /* 1 * FB (AM) */
+ { 1, 0x81}, /* x bytes sector data */
+ { 1, 0xf7}, /* 1 * F7 (CRC) */
+ { 0, 0x00}, /* end of data */
};
#endif
@@ -319,37 +319,37 @@ struct wd1770_state
int stepping_rate[4]; /* track stepping rate in ms */
- unsigned short crc; /* Holds the current CRC value for write_track CRC calculation */
- int crc_active; /* Flag indicating that CRC calculation in write_track is active. */
+ unsigned short crc; /* Holds the current CRC value for write_track CRC calculation */
+ int crc_active; /* Flag indicating that CRC calculation in write_track is active. */
- UINT8 track_reg; /* value of track register */
- UINT8 command_type; /* last command type */
- UINT8 head; /* current head # */
+ UINT8 track_reg; /* value of track register */
+ UINT8 command_type; /* last command type */
+ UINT8 head; /* current head # */
- UINT8 read_cmd; /* last read command issued */
- UINT8 write_cmd; /* last write command issued */
- INT8 direction; /* last step direction */
- UINT8 last_command_data; /* last command data */
+ UINT8 read_cmd; /* last read command issued */
+ UINT8 write_cmd; /* last write command issued */
+ INT8 direction; /* last step direction */
+ UINT8 last_command_data; /* last command data */
- UINT8 status_drq; /* status register data request bit */
- UINT8 busy_count; /* how long to keep busy bit set */
+ UINT8 status_drq; /* status register data request bit */
+ UINT8 busy_count; /* how long to keep busy bit set */
- UINT8 buffer[6144]; /* I/O buffer (holds up to a whole track) */
- UINT32 data_offset; /* offset into I/O buffer */
- INT32 data_count; /* transfer count from/into I/O buffer */
+ UINT8 buffer[6144]; /* I/O buffer (holds up to a whole track) */
+ UINT32 data_offset; /* offset into I/O buffer */
+ INT32 data_count; /* transfer count from/into I/O buffer */
- UINT8 *fmt_sector_data[256]; /* pointer to data after formatting a track */
+ UINT8 *fmt_sector_data[256]; /* pointer to data after formatting a track */
- UINT8 dam_list[256][4]; /* list of data address marks while formatting */
- int dam_data[256]; /* offset to data inside buffer while formatting */
- int dam_cnt; /* valid number of entries in the dam_list */
- UINT16 sector_length; /* sector length (byte) */
+ UINT8 dam_list[256][4]; /* list of data address marks while formatting */
+ int dam_data[256]; /* offset to data inside buffer while formatting */
+ int dam_cnt; /* valid number of entries in the dam_list */
+ UINT16 sector_length; /* sector length (byte) */
- UINT8 ddam; /* ddam of sector found - used when reading */
- UINT8 sector_data_id;
- int data_direction;
+ UINT8 ddam; /* ddam of sector found - used when reading */
+ UINT8 sector_data_id;
+ int data_direction;
- int hld_count; /* head loaded counter */
+ int hld_count; /* head loaded counter */
/* timers to delay execution/completion of commands */
emu_timer *timer_cmd, *timer_data, *timer_rs, *timer_ws;
@@ -364,7 +364,7 @@ struct wd1770_state
int pause_time;
/* Were we busy when we received a FORCE_INT command */
- UINT8 was_busy;
+ UINT8 was_busy;
/* Pointer to interface */
const wd17xx_interface *intf;
@@ -480,7 +480,7 @@ static void wd17xx_set_drq(device_t *device)
}
/* clear interrupt request */
-static void wd17xx_clear_intrq(device_t *device)
+static void wd17xx_clear_intrq(device_t *device)
{
wd1770_state *w = get_safe_token(device);
@@ -489,7 +489,7 @@ static void wd17xx_clear_intrq(device_t *device)
}
/* set interrupt request */
-static void wd17xx_set_intrq(device_t *device)
+static void wd17xx_set_intrq(device_t *device)
{
wd1770_state *w = get_safe_token(device);
@@ -518,15 +518,15 @@ static TIMER_CALLBACK( wd17xx_data_callback )
device_t *device = (device_t *)ptr;
wd1770_state *w = get_safe_token(device);
- /* check if this is a write command */
- if( (w->command_type == TYPE_II && w->command == FDC_WRITE_SEC) ||
- (w->command_type == TYPE_III && w->command == FDC_WRITE_TRK) )
- {
- /* we are ready for new data */
- wd17xx_set_drq(device);
+ /* check if this is a write command */
+ if( (w->command_type == TYPE_II && w->command == FDC_WRITE_SEC) ||
+ (w->command_type == TYPE_III && w->command == FDC_WRITE_TRK) )
+ {
+ /* we are ready for new data */
+ wd17xx_set_drq(device);
- return;
- }
+ return;
+ }
/* any bytes remaining? */
if (w->data_count >= 1)
@@ -571,7 +571,7 @@ static TIMER_CALLBACK( wd17xx_data_callback )
else
{
/* Delay the INTRQ 3 byte times because we need to read two CRC bytes and
- compare them with a calculated CRC */
+ compare them with a calculated CRC */
wd17xx_complete_command(device, DELAY_DATADONE);
if (VERBOSE)
@@ -641,7 +641,7 @@ static void wd17xx_command_restore(device_t *device)
w->track = 0;
#if 0
/* simulate seek time busy signal */
- w->busy_count = 0; //w->busy_count * ((w->data & FDC_STEP_RATE) + 1);
+ w->busy_count = 0; //w->busy_count * ((w->data & FDC_STEP_RATE) + 1);
/* when command completes set irq */
wd17xx_set_intrq(device);
@@ -684,24 +684,24 @@ static void write_track(device_t *device)
#endif
/* Get the size in bytes of the current track. For real hardware this
- may vary per system in small degree, and there even for each track
- and head, so we should not assume a fixed value here.
- As we are using a buffered track writing, we have to find out how long
- the track will become. The only object which can tell us is the
- selected format.
- */
+ may vary per system in small degree, and there even for each track
+ and head, so we should not assume a fixed value here.
+ As we are using a buffered track writing, we have to find out how long
+ the track will become. The only object which can tell us is the
+ selected format.
+ */
w->data_count = 0;
floppy = flopimg_get_image(w->drive);
if (floppy != NULL)
w->data_count = floppy_get_track_size(floppy, w->hd, w->track);
- if (w->data_count==0)
- {
+ if (w->data_count==0)
+ {
if (wd17xx_is_sd_only(device))
w->data_count = TRKSIZE_SD;
else
w->data_count = wd17xx_dden(device) ? TRKSIZE_SD : TRKSIZE_DD;
- }
+ }
floppy_drive_write_track_data_info_buffer( w->drive, w->hd, (char *)w->buffer, &(w->data_count) );
@@ -723,15 +723,15 @@ static void read_track(device_t *device)
wd1770_state *w = get_safe_token(device);
floppy_image_legacy *floppy;
#if 0
- UINT8 *psrc; /* pointer to track format structure */
- UINT8 *pdst; /* pointer to track buffer */
- int cnt; /* number of bytes to fill in */
- UINT16 crc; /* id or data CRC */
- UINT8 d; /* data */
+ UINT8 *psrc; /* pointer to track format structure */
+ UINT8 *pdst; /* pointer to track buffer */
+ int cnt; /* number of bytes to fill in */
+ UINT16 crc; /* id or data CRC */
+ UINT8 d; /* data */
UINT8 t = w->track; /* track of DAM */
- UINT8 h = w->head; /* head of DAM */
- UINT8 s = w->sector_dam; /* sector of DAM */
- UINT16 l = w->sector_length; /* sector length of DAM */
+ UINT8 h = w->head; /* head of DAM */
+ UINT8 s = w->sector_dam; /* sector of DAM */
+ UINT16 l = w->sector_length; /* sector length of DAM */
int i;
for (i = 0; i < w->sec_per_track; i++)
@@ -757,7 +757,7 @@ static void read_track(device_t *device)
while (cnt > 0)
{
- if (psrc[0] == 0) /* no more track format info ? */
+ if (psrc[0] == 0) /* no more track format info ? */
{
if (w->dam_cnt < w->sec_per_track) /* but more DAM info ? */
{
@@ -768,52 +768,52 @@ static void read_track(device_t *device)
}
}
- if (psrc[0] != 0) /* more track format info ? */
+ if (psrc[0] != 0) /* more track format info ? */
{
cnt -= psrc[0]; /* subtract size */
d = psrc[1];
- if (d == 0xf5) /* clear CRC ? */
+ if (d == 0xf5) /* clear CRC ? */
{
crc = 0xffff;
- d = 0xa1; /* store A1 */
+ d = 0xa1; /* store A1 */
}
for (i = 0; i < *psrc; i++)
*pdst++ = d; /* fill data */
- if (d == 0xf7) /* store CRC ? */
+ if (d == 0xf7) /* store CRC ? */
{
- pdst--; /* go back one byte */
- *pdst++ = crc & 255; /* put CRC low */
- *pdst++ = crc / 256; /* put CRC high */
- cnt -= 1; /* count one more byte */
+ pdst--; /* go back one byte */
+ *pdst++ = crc & 255; /* put CRC low */
+ *pdst++ = crc / 256; /* put CRC high */
+ cnt -= 1; /* count one more byte */
}
else if (d == 0xfe)/* address mark ? */
{
- crc = 0xffff; /* reset CRC */
+ crc = 0xffff; /* reset CRC */
}
else if (d == 0x80)/* sector ID ? */
{
- pdst--; /* go back one byte */
+ pdst--; /* go back one byte */
t = *pdst++ = w->dam_list[w->dam_cnt][0]; /* track number */
h = *pdst++ = w->dam_list[w->dam_cnt][1]; /* head number */
s = *pdst++ = w->dam_list[w->dam_cnt][2]; /* sector number */
l = *pdst++ = w->dam_list[w->dam_cnt][3]; /* sector length code */
w->dam_cnt++;
- crc = ccitt_crc16_one(crc, t); /* build CRC */
- crc = ccitt_crc16_one(crc, h); /* build CRC */
- crc = ccitt_crc16_one(crc, s); /* build CRC */
- crc = ccitt_crc16_one(crc, l); /* build CRC */
+ crc = ccitt_crc16_one(crc, t); /* build CRC */
+ crc = ccitt_crc16_one(crc, h); /* build CRC */
+ crc = ccitt_crc16_one(crc, s); /* build CRC */
+ crc = ccitt_crc16_one(crc, l); /* build CRC */
l = (l == 0) ? 128 : l << 8;
}
else if (d == 0xfb)// data address mark ?
{
- crc = 0xffff; // reset CRC
+ crc = 0xffff; // reset CRC
}
else if (d == 0x81)// sector DATA ?
{
- pdst--; /* go back one byte */
+ pdst--; /* go back one byte */
if (seek(w, t, h, s) == 0)
{
if (mame_fread(w->image_file, pdst, l) != l)
@@ -836,24 +836,24 @@ static void read_track(device_t *device)
else
{
*pdst++ = 0xff; /* fill track */
- cnt--; /* until end */
+ cnt--; /* until end */
}
}
#endif
/* Determine the track size. We cannot allow different sizes in this
- design (see above, write_track). */
+ design (see above, write_track). */
w->data_count = 0;
floppy = flopimg_get_image(w->drive);
if (floppy != NULL)
w->data_count = floppy_get_track_size(floppy, w->hd, w->track);
- if (w->data_count==0)
- {
+ if (w->data_count==0)
+ {
if (wd17xx_is_sd_only(device))
w->data_count = TRKSIZE_SD;
else
w->data_count = wd17xx_dden(device) ? TRKSIZE_SD : TRKSIZE_DD;
- }
+ }
floppy_drive_read_track_data_info_buffer( w->drive, w->hd, (char *)w->buffer, &(w->data_count) );
@@ -975,7 +975,7 @@ static int wd17xx_locate_sector(device_t *device)
}
}
- /* index set? */
+ /* index set? */
if (floppy_drive_get_flag_state(w->drive, FLOPPY_DRIVE_INDEX))
{
/* update revolution count */
@@ -1072,9 +1072,9 @@ static void wd17xx_write_sector(device_t *device)
{
wd1770_state *w = get_safe_token(device);
/* at this point, the disc is write enabled, and data
- * has been transfered into our buffer - now write it to
- * the disc image or to the real disc
- */
+ * has been transfered into our buffer - now write it to
+ * the disc image or to the real disc
+ */
/* side compare? */
wd17xx_side_compare(device, w->write_cmd);
@@ -1119,7 +1119,7 @@ static void wd17xx_verify_seek(device_t *device)
}
}
- /* index set? */
+ /* index set? */
if (floppy_drive_get_flag_state(w->drive, FLOPPY_DRIVE_INDEX))
{
/* update revolution count */
@@ -1535,10 +1535,10 @@ WRITE8_DEVICE_HANDLER( wd17xx_command_w )
if ((data & ~FDC_MASK_TYPE_II) == FDC_READ_SEC)
{
if (VERBOSE)
- {
+ {
logerror("%s: wd17xx_command_w $%02X READ_SEC (", device->machine().describe_context(), data);
- logerror("cmd=%02X, trk=%02X, sec=%02X, dat=%02X)\n",w->command,w->track,w->sector,w->data);
- }
+ logerror("cmd=%02X, trk=%02X, sec=%02X, dat=%02X)\n",w->command,w->track,w->sector,w->data);
+ }
w->read_cmd = data;
w->command = data & ~FDC_MASK_TYPE_II;
w->command_type = TYPE_II;
@@ -1554,10 +1554,10 @@ WRITE8_DEVICE_HANDLER( wd17xx_command_w )
if ((data & ~FDC_MASK_TYPE_II) == FDC_WRITE_SEC)
{
if (VERBOSE)
- {
+ {
logerror("%s: wd17xx_command_w $%02X WRITE_SEC (", device->machine().describe_context(), data);
- logerror("cmd=%02X, trk=%02X, sec=%02X, dat=%02X)\n",w->command,w->track,w->sector,w->data);
- }
+ logerror("cmd=%02X, trk=%02X, sec=%02X, dat=%02X)\n",w->command,w->track,w->sector,w->data);
+ }
w->write_cmd = data;
w->command = data & ~FDC_MASK_TYPE_II;
@@ -1712,7 +1712,7 @@ WRITE8_DEVICE_HANDLER( wd17xx_command_w )
}
/* simulate seek time busy signal */
- w->busy_count = 0; //w->busy_count * ((data & FDC_STEP_RATE) + 1);
+ w->busy_count = 0; //w->busy_count * ((data & FDC_STEP_RATE) + 1);
#if 0
wd17xx_set_intrq(device);
#endif
@@ -1726,9 +1726,9 @@ WRITE8_DEVICE_HANDLER( wd17xx_command_w )
logerror("%s: wd17xx_command_w $%02X STEP dir %+d\n", device->machine().describe_context(), data, w->direction);
w->command_type = TYPE_I;
- /* if it is a real floppy, issue a step command */
+ /* if it is a real floppy, issue a step command */
/* simulate seek time busy signal */
- w->busy_count = 0; //((data & FDC_STEP_RATE) + 1);
+ w->busy_count = 0; //((data & FDC_STEP_RATE) + 1);
floppy_drive_seek(w->drive, w->direction);
@@ -1751,7 +1751,7 @@ WRITE8_DEVICE_HANDLER( wd17xx_command_w )
w->command_type = TYPE_I;
w->direction = +1;
/* simulate seek time busy signal */
- w->busy_count = 0; //((data & FDC_STEP_RATE) + 1);
+ w->busy_count = 0; //((data & FDC_STEP_RATE) + 1);
floppy_drive_seek(w->drive, w->direction);
@@ -1772,7 +1772,7 @@ WRITE8_DEVICE_HANDLER( wd17xx_command_w )
w->command_type = TYPE_I;
w->direction = -1;
/* simulate seek time busy signal */
- w->busy_count = 0; //((data & FDC_STEP_RATE) + 1);
+ w->busy_count = 0; //((data & FDC_STEP_RATE) + 1);
/* for now only allows a single drive to be selected */
floppy_drive_seek(w->drive, w->direction);
@@ -1845,14 +1845,14 @@ WRITE8_DEVICE_HANDLER( wd17xx_data_w )
w->buffer[w->data_offset++] = data;
- if (--w->data_count < 1)
- {
- if (w->command == FDC_WRITE_TRK)
- write_track(device);
- else
- wd17xx_write_sector(device);
+ if (--w->data_count < 1)
+ {
+ if (w->command == FDC_WRITE_TRK)
+ write_track(device);
+ else
+ wd17xx_write_sector(device);
- w->data_offset = 0;
+ w->data_offset = 0;
/* Check we should handle the next sector for a multi record write */
if ( w->command_type == TYPE_II && w->command == FDC_WRITE_SEC && ( w->write_cmd & FDC_MULTI_REC ) )
@@ -1875,109 +1875,109 @@ WRITE8_DEVICE_HANDLER( wd17xx_data_w )
logerror("wd17xx_data_w(): multi data write completed\n");
}
// wd17xx_complete_command(device, DELAY_DATADONE);
- }
- else
- {
- if (w->command == FDC_WRITE_TRK)
- {
- /* Process special data values according to WD17xx specification.
- Note that as CRC values take up two bytes which are written on
- every 0xf7 byte, this will cause the actual image to
- grow larger than what was written from the system. So we need
- to take the value of data_offset when writing the track.
- */
- if (wd17xx_dden(device))
- {
- switch (data)
- {
- case 0xf5:
- case 0xf6:
- /* not allowed in FM. */
- /* Take back the last write. */
- w->data_offset--;
- break;
- case 0xf7:
- /* Take back the last write. */
- w->data_offset--;
- /* write two crc bytes */
- w->buffer[w->data_offset++] = (w->crc>>8)&0xff;
- w->buffer[w->data_offset++] = (w->crc&0xff);
- w->crc_active = FALSE;
- break;
- case 0xf8:
- case 0xf9:
- case 0xfa:
- case 0xfb:
- case 0xfe:
- /* Preset crc */
- w->crc = 0xffff;
+ }
+ else
+ {
+ if (w->command == FDC_WRITE_TRK)
+ {
+ /* Process special data values according to WD17xx specification.
+ Note that as CRC values take up two bytes which are written on
+ every 0xf7 byte, this will cause the actual image to
+ grow larger than what was written from the system. So we need
+ to take the value of data_offset when writing the track.
+ */
+ if (wd17xx_dden(device))
+ {
+ switch (data)
+ {
+ case 0xf5:
+ case 0xf6:
+ /* not allowed in FM. */
+ /* Take back the last write. */
+ w->data_offset--;
+ break;
+ case 0xf7:
+ /* Take back the last write. */
+ w->data_offset--;
+ /* write two crc bytes */
+ w->buffer[w->data_offset++] = (w->crc>>8)&0xff;
+ w->buffer[w->data_offset++] = (w->crc&0xff);
+ w->crc_active = FALSE;
+ break;
+ case 0xf8:
+ case 0xf9:
+ case 0xfa:
+ case 0xfb:
+ case 0xfe:
+ /* Preset crc */
+ w->crc = 0xffff;
/* AM is included in the CRC */
w->crc = ccitt_crc16_one(w->crc, data);
- w->crc_active = TRUE;
- break;
- case 0xfc:
- /* Write index mark. No effect here as we do not store clock patterns.
- Maybe later. */
- break;
- case 0xfd:
- /* Just write, don't use for CRC. */
- break;
- default:
- /* Byte already written. */
- if (w->crc_active)
- w->crc = ccitt_crc16_one(w->crc, data);
- }
- }
- else /* MFM */
- {
- switch (data)
- {
- case 0xf5:
- /* Take back the last write. */
- w->data_offset--;
- /* Write a1 */
- w->buffer[w->data_offset++] = 0xa1;
- /* Preset CRC */
- w->crc = 0xffff;
- w->crc_active = TRUE;
- break;
- case 0xf6:
- /* Take back the last write. */
- w->data_offset--;
- /* Write c2 */
- w->buffer[w->data_offset++] = 0xc2;
- break;
- case 0xf7:
- /* Take back the last write. */
- w->data_offset--;
- /* write two crc bytes */
- w->buffer[w->data_offset++] = (w->crc>>8)&0xff;
- w->buffer[w->data_offset++] = (w->crc&0xff);
- w->crc_active = FALSE;
- break;
- case 0xf8:
- case 0xf9:
- case 0xfa:
- case 0xfb:
- case 0xfc:
- case 0xfd:
- /* Just write, don't use for CRC. */
- break;
- case 0xfe:
+ w->crc_active = TRUE;
+ break;
+ case 0xfc:
+ /* Write index mark. No effect here as we do not store clock patterns.
+ Maybe later. */
+ break;
+ case 0xfd:
+ /* Just write, don't use for CRC. */
+ break;
+ default:
+ /* Byte already written. */
+ if (w->crc_active)
+ w->crc = ccitt_crc16_one(w->crc, data);
+ }
+ }
+ else /* MFM */
+ {
+ switch (data)
+ {
+ case 0xf5:
+ /* Take back the last write. */
+ w->data_offset--;
+ /* Write a1 */
+ w->buffer[w->data_offset++] = 0xa1;
+ /* Preset CRC */
+ w->crc = 0xffff;
+ w->crc_active = TRUE;
+ break;
+ case 0xf6:
+ /* Take back the last write. */
+ w->data_offset--;
+ /* Write c2 */
+ w->buffer[w->data_offset++] = 0xc2;
+ break;
+ case 0xf7:
+ /* Take back the last write. */
+ w->data_offset--;
+ /* write two crc bytes */
+ w->buffer[w->data_offset++] = (w->crc>>8)&0xff;
+ w->buffer[w->data_offset++] = (w->crc&0xff);
+ w->crc_active = FALSE;
+ break;
+ case 0xf8:
+ case 0xf9:
+ case 0xfa:
+ case 0xfb:
+ case 0xfc:
+ case 0xfd:
+ /* Just write, don't use for CRC. */
+ break;
+ case 0xfe:
/* AM is included in the CRC */
if (w->crc_active)
w->crc = ccitt_crc16_one(w->crc, data);
- break;
- default:
- /* Byte already written. */
- if (w->crc_active)
- w->crc = ccitt_crc16_one(w->crc, data);
- }
- }
- }
- /* yes... setup a timed data request */
- wd17xx_timed_data_request(device);
- }
+ break;
+ default:
+ /* Byte already written. */
+ if (w->crc_active)
+ w->crc = ccitt_crc16_one(w->crc, data);
+ }
+ }
+ }
+ /* yes... setup a timed data request */
+ wd17xx_timed_data_request(device);
+ }
}
else
{
@@ -1994,9 +1994,9 @@ READ8_DEVICE_HANDLER( wd17xx_r )
switch (offset & 0x03)
{
case 0: data = wd17xx_status_r(device, device->machine().driver_data()->generic_space(), 0); break;
- case 1: data = wd17xx_track_r(device, device->machine().driver_data()->generic_space(), 0); break;
- case 2: data = wd17xx_sector_r(device, device->machine().driver_data()->generic_space(), 0); break;
- case 3: data = wd17xx_data_r(device, device->machine().driver_data()->generic_space(), 0); break;
+ case 1: data = wd17xx_track_r(device, device->machine().driver_data()->generic_space(), 0); break;
+ case 2: data = wd17xx_sector_r(device, device->machine().driver_data()->generic_space(), 0); break;
+ case 3: data = wd17xx_data_r(device, device->machine().driver_data()->generic_space(), 0); break;
}
return data;
@@ -2007,7 +2007,7 @@ WRITE8_DEVICE_HANDLER( wd17xx_w )
switch (offset & 0x03)
{
case 0: wd17xx_command_w(device, device->machine().driver_data()->generic_space(), 0, data); break;
- case 1: wd17xx_track_w(device, device->machine().driver_data()->generic_space(), 0, data); break;
+ case 1: wd17xx_track_w(device, device->machine().driver_data()->generic_space(), 0, data); break;
case 2: wd17xx_sector_w(device, device->machine().driver_data()->generic_space(), 0, data); break;
case 3: wd17xx_data_w(device, device->machine().driver_data()->generic_space(), 0, data); break;
}
@@ -2331,5 +2331,3 @@ mb8877_device::mb8877_device(const machine_config &mconfig, const char *tag, dev
: wd1770_device(mconfig, MB8877, "MB8877", tag, owner, clock)
{
}
-
-
diff --git a/src/emu/machine/wd17xx.h b/src/emu/machine/wd17xx.h
index eb66952d68c..28cd57ad5d4 100644
--- a/src/emu/machine/wd17xx.h
+++ b/src/emu/machine/wd17xx.h
@@ -249,8 +249,8 @@ void wd17xx_reset(device_t *device);
/* the following are not strictly part of the wd179x hardware/emulation
but will be put here for now until the flopdrv code has been finalised more */
-void wd17xx_set_drive(device_t *device, UINT8); /* set drive wd179x is accessing */
-void wd17xx_set_side(device_t *device, UINT8); /* set side wd179x is accessing */
+void wd17xx_set_drive(device_t *device, UINT8); /* set drive wd179x is accessing */
+void wd17xx_set_side(device_t *device, UINT8); /* set side wd179x is accessing */
void wd17xx_set_pause_time(device_t *device, int usec); /* default is 40 usec if not set */
void wd17xx_index_pulse_callback(device_t *controller, device_t *img, int state);
diff --git a/src/emu/machine/wd33c93.c b/src/emu/machine/wd33c93.c
index 8cfeb308b05..a524f1efae3 100644
--- a/src/emu/machine/wd33c93.c
+++ b/src/emu/machine/wd33c93.c
@@ -18,121 +18,121 @@
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
/* WD commands */
-#define WD_CMD_RESET 0x00
-#define WD_CMD_ABORT 0x01
-#define WD_CMD_ASSERT_ATN 0x02
-#define WD_CMD_NEGATE_ACK 0x03
-#define WD_CMD_DISCONNECT 0x04
-#define WD_CMD_RESELECT 0x05
-#define WD_CMD_SEL_ATN 0x06
-#define WD_CMD_SEL 0x07
-#define WD_CMD_SEL_ATN_XFER 0x08
-#define WD_CMD_SEL_XFER 0x09
-#define WD_CMD_RESEL_RECEIVE 0x0a
-#define WD_CMD_RESEL_SEND 0x0b
-#define WD_CMD_WAIT_SEL_RECEIVE 0x0c
-#define WD_CMD_SSCC 0x0d
-#define WD_CMD_SND_DISC 0x0e
-#define WD_CMD_SET_IDI 0x0f
-#define WD_CMD_RCV_CMD 0x10
-#define WD_CMD_RCV_DATA 0x11
-#define WD_CMD_RCV_MSG_OUT 0x12
-#define WD_CMD_RCV 0x13
-#define WD_CMD_SND_STATUS 0x14
-#define WD_CMD_SND_DATA 0x15
-#define WD_CMD_SND_MSG_IN 0x16
-#define WD_CMD_SND 0x17
-#define WD_CMD_TRANS_ADDR 0x18
-#define WD_CMD_XFER_PAD 0x19
-#define WD_CMD_TRANS_INFO 0x20
-#define WD_CMD_TRANSFER_PAD 0x21
-#define WD_CMD_SBT_MODE 0x80
+#define WD_CMD_RESET 0x00
+#define WD_CMD_ABORT 0x01
+#define WD_CMD_ASSERT_ATN 0x02
+#define WD_CMD_NEGATE_ACK 0x03
+#define WD_CMD_DISCONNECT 0x04
+#define WD_CMD_RESELECT 0x05
+#define WD_CMD_SEL_ATN 0x06
+#define WD_CMD_SEL 0x07
+#define WD_CMD_SEL_ATN_XFER 0x08
+#define WD_CMD_SEL_XFER 0x09
+#define WD_CMD_RESEL_RECEIVE 0x0a
+#define WD_CMD_RESEL_SEND 0x0b
+#define WD_CMD_WAIT_SEL_RECEIVE 0x0c
+#define WD_CMD_SSCC 0x0d
+#define WD_CMD_SND_DISC 0x0e
+#define WD_CMD_SET_IDI 0x0f
+#define WD_CMD_RCV_CMD 0x10
+#define WD_CMD_RCV_DATA 0x11
+#define WD_CMD_RCV_MSG_OUT 0x12
+#define WD_CMD_RCV 0x13
+#define WD_CMD_SND_STATUS 0x14
+#define WD_CMD_SND_DATA 0x15
+#define WD_CMD_SND_MSG_IN 0x16
+#define WD_CMD_SND 0x17
+#define WD_CMD_TRANS_ADDR 0x18
+#define WD_CMD_XFER_PAD 0x19
+#define WD_CMD_TRANS_INFO 0x20
+#define WD_CMD_TRANSFER_PAD 0x21
+#define WD_CMD_SBT_MODE 0x80
/* ASR register */
-#define ASR_INT 0x80
-#define ASR_LCI 0x40
-#define ASR_BSY 0x20
-#define ASR_CIP 0x10
-#define ASR_PE 0x02
-#define ASR_DBR 0x01
+#define ASR_INT 0x80
+#define ASR_LCI 0x40
+#define ASR_BSY 0x20
+#define ASR_CIP 0x10
+#define ASR_PE 0x02
+#define ASR_DBR 0x01
/* SCSI Bus Phases */
-#define PHS_DATA_OUT 0x00
-#define PHS_DATA_IN 0x01
-#define PHS_COMMAND 0x02
-#define PHS_STATUS 0x03
-#define PHS_MESS_OUT 0x06
-#define PHS_MESS_IN 0x07
+#define PHS_DATA_OUT 0x00
+#define PHS_DATA_IN 0x01
+#define PHS_COMMAND 0x02
+#define PHS_STATUS 0x03
+#define PHS_MESS_OUT 0x06
+#define PHS_MESS_IN 0x07
/* Command Status Register definitions */
- /* reset state interrupts */
-#define CSR_RESET 0x00
-#define CSR_RESET_AF 0x01
-
- /* successful completion interrupts */
-#define CSR_RESELECT 0x10
-#define CSR_SELECT 0x11
-#define CSR_SEL_XFER_DONE 0x16
-#define CSR_XFER_DONE 0x18
-
- /* paused or aborted interrupts */
-#define CSR_MSGIN 0x20
-#define CSR_SDP 0x21
-#define CSR_SEL_ABORT 0x22
-#define CSR_RESEL_ABORT 0x25
-#define CSR_RESEL_ABORT_AM 0x27
-#define CSR_ABORT 0x28
-
- /* terminated interrupts */
-#define CSR_INVALID 0x40
-#define CSR_UNEXP_DISC 0x41
-#define CSR_TIMEOUT 0x42
-#define CSR_PARITY 0x43
-#define CSR_PARITY_ATN 0x44
-#define CSR_BAD_STATUS 0x45
-#define CSR_UNEXP 0x48
-
- /* service required interrupts */
-#define CSR_RESEL 0x80
-#define CSR_RESEL_AM 0x81
-#define CSR_DISC 0x85
-#define CSR_SRV_REQ 0x88
-
- /* Own ID/CDB Size register */
-#define OWNID_EAF 0x08
-#define OWNID_EHP 0x10
-#define OWNID_RAF 0x20
-#define OWNID_FS_8 0x00
-#define OWNID_FS_12 0x40
-#define OWNID_FS_16 0x80
-
- /* Control register */
-#define CTRL_HSP 0x01
-#define CTRL_HA 0x02
-#define CTRL_IDI 0x04
-#define CTRL_EDI 0x08
-#define CTRL_HHP 0x10
-#define CTRL_POLLED 0x00
-#define CTRL_BURST 0x20
-#define CTRL_BUS 0x40
-#define CTRL_DMA 0x80
-
- /* Synchronous Transfer Register */
-#define STR_FSS 0x80
-
- /* Destination ID register */
-#define DSTID_DPD 0x40
-#define DATA_OUT_DIR 0
-#define DATA_IN_DIR 1
-#define DSTID_SCC 0x80
-
- /* Source ID register */
-#define SRCID_MASK 0x07
-#define SRCID_SIV 0x08
-#define SRCID_DSP 0x20
-#define SRCID_ES 0x40
-#define SRCID_ER 0x80
+ /* reset state interrupts */
+#define CSR_RESET 0x00
+#define CSR_RESET_AF 0x01
+
+ /* successful completion interrupts */
+#define CSR_RESELECT 0x10
+#define CSR_SELECT 0x11
+#define CSR_SEL_XFER_DONE 0x16
+#define CSR_XFER_DONE 0x18
+
+ /* paused or aborted interrupts */
+#define CSR_MSGIN 0x20
+#define CSR_SDP 0x21
+#define CSR_SEL_ABORT 0x22
+#define CSR_RESEL_ABORT 0x25
+#define CSR_RESEL_ABORT_AM 0x27
+#define CSR_ABORT 0x28
+
+ /* terminated interrupts */
+#define CSR_INVALID 0x40
+#define CSR_UNEXP_DISC 0x41
+#define CSR_TIMEOUT 0x42
+#define CSR_PARITY 0x43
+#define CSR_PARITY_ATN 0x44
+#define CSR_BAD_STATUS 0x45
+#define CSR_UNEXP 0x48
+
+ /* service required interrupts */
+#define CSR_RESEL 0x80
+#define CSR_RESEL_AM 0x81
+#define CSR_DISC 0x85
+#define CSR_SRV_REQ 0x88
+
+ /* Own ID/CDB Size register */
+#define OWNID_EAF 0x08
+#define OWNID_EHP 0x10
+#define OWNID_RAF 0x20
+#define OWNID_FS_8 0x00
+#define OWNID_FS_12 0x40
+#define OWNID_FS_16 0x80
+
+ /* Control register */
+#define CTRL_HSP 0x01
+#define CTRL_HA 0x02
+#define CTRL_IDI 0x04
+#define CTRL_EDI 0x08
+#define CTRL_HHP 0x10
+#define CTRL_POLLED 0x00
+#define CTRL_BURST 0x20
+#define CTRL_BUS 0x40
+#define CTRL_DMA 0x80
+
+ /* Synchronous Transfer Register */
+#define STR_FSS 0x80
+
+ /* Destination ID register */
+#define DSTID_DPD 0x40
+#define DATA_OUT_DIR 0
+#define DATA_IN_DIR 1
+#define DSTID_SCC 0x80
+
+ /* Source ID register */
+#define SRCID_MASK 0x07
+#define SRCID_SIV 0x08
+#define SRCID_DSP 0x20
+#define SRCID_ES 0x40
+#define SRCID_ER 0x80
/* convernience functions */
UINT8 wd33c93_device::getunit( void )
@@ -740,7 +740,7 @@ READ8_MEMBER(wd33c93_device::read)
}
wd33c93_device::wd33c93_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, WD33C93, "33C93 SCSI", tag, owner, clock)
+ : device_t(mconfig, WD33C93, "33C93 SCSI", tag, owner, clock)
{
}
diff --git a/src/emu/machine/wd33c93.h b/src/emu/machine/wd33c93.h
index 55a9cdf49b9..981a444d9fe 100644
--- a/src/emu/machine/wd33c93.h
+++ b/src/emu/machine/wd33c93.h
@@ -17,45 +17,45 @@ struct WD33C93interface
enum
{
- WD_OWN_ID = 0x00,
- WD_CONTROL = 0x01,
- WD_TIMEOUT_PERIOD = 0x02,
- WD_CDB_1 = 0x03,
- WD_CDB_2 = 0x04,
- WD_CDB_3 = 0x05,
- WD_CDB_4 = 0x06,
- WD_CDB_5 = 0x07,
- WD_CDB_6 = 0x08,
- WD_CDB_7 = 0x09,
- WD_CDB_8 = 0x0a,
- WD_CDB_9 = 0x0b,
- WD_CDB_10 = 0x0c,
- WD_CDB_11 = 0x0d,
- WD_CDB_12 = 0x0e,
- WD_TARGET_LUN = 0x0f,
- WD_COMMAND_PHASE = 0x10,
- WD_SYNCHRONOUS_TRANSFER = 0x11,
- WD_TRANSFER_COUNT_MSB = 0x12,
- WD_TRANSFER_COUNT = 0x13,
- WD_TRANSFER_COUNT_LSB = 0x14,
- WD_DESTINATION_ID = 0x15,
- WD_SOURCE_ID = 0x16,
- WD_SCSI_STATUS = 0x17,
- WD_COMMAND = 0x18,
- WD_DATA = 0x19,
- WD_QUEUE_TAG = 0x1a,
- WD_AUXILIARY_STATUS = 0x1f
+ WD_OWN_ID = 0x00,
+ WD_CONTROL = 0x01,
+ WD_TIMEOUT_PERIOD = 0x02,
+ WD_CDB_1 = 0x03,
+ WD_CDB_2 = 0x04,
+ WD_CDB_3 = 0x05,
+ WD_CDB_4 = 0x06,
+ WD_CDB_5 = 0x07,
+ WD_CDB_6 = 0x08,
+ WD_CDB_7 = 0x09,
+ WD_CDB_8 = 0x0a,
+ WD_CDB_9 = 0x0b,
+ WD_CDB_10 = 0x0c,
+ WD_CDB_11 = 0x0d,
+ WD_CDB_12 = 0x0e,
+ WD_TARGET_LUN = 0x0f,
+ WD_COMMAND_PHASE = 0x10,
+ WD_SYNCHRONOUS_TRANSFER = 0x11,
+ WD_TRANSFER_COUNT_MSB = 0x12,
+ WD_TRANSFER_COUNT = 0x13,
+ WD_TRANSFER_COUNT_LSB = 0x14,
+ WD_DESTINATION_ID = 0x15,
+ WD_SOURCE_ID = 0x16,
+ WD_SCSI_STATUS = 0x17,
+ WD_COMMAND = 0x18,
+ WD_DATA = 0x19,
+ WD_QUEUE_TAG = 0x1a,
+ WD_AUXILIARY_STATUS = 0x1f
};
-#define TEMP_INPUT_LEN 262144
-#define FIFO_SIZE 12
+#define TEMP_INPUT_LEN 262144
+#define FIFO_SIZE 12
#define MCFG_WD33C93_ADD( _tag, _config ) \
MCFG_DEVICE_ADD( _tag, WD33C93, 0 ) \
MCFG_DEVICE_CONFIG(_config)
class wd33c93_device : public device_t,
- public WD33C93interface
+ public WD33C93interface
{
public:
// construction/destruction
@@ -93,20 +93,20 @@ private:
void xferinfo_cmd();
void dispatch_command();
- scsihle_device *devices[8]; // SCSI IDs 0-7
-
- UINT8 sasr;
- UINT8 regs[WD_AUXILIARY_STATUS+1];
- UINT8 fifo[FIFO_SIZE];
- int fifo_pos;
- UINT8 temp_input[TEMP_INPUT_LEN];
- int temp_input_pos;
- UINT8 busphase;
- UINT8 identify;
- int read_pending;
- emu_timer *cmd_timer;
- emu_timer *service_req_timer;
- emu_timer *deassert_cip_timer;
+ scsihle_device *devices[8]; // SCSI IDs 0-7
+
+ UINT8 sasr;
+ UINT8 regs[WD_AUXILIARY_STATUS+1];
+ UINT8 fifo[FIFO_SIZE];
+ int fifo_pos;
+ UINT8 temp_input[TEMP_INPUT_LEN];
+ int temp_input_pos;
+ UINT8 busphase;
+ UINT8 identify;
+ int read_pending;
+ emu_timer *cmd_timer;
+ emu_timer *service_req_timer;
+ emu_timer *deassert_cip_timer;
};
// device type definition
diff --git a/src/emu/machine/wd_fdc.c b/src/emu/machine/wd_fdc.c
index 917ac6bbfb2..26a2d29e658 100644
--- a/src/emu/machine/wd_fdc.c
+++ b/src/emu/machine/wd_fdc.c
@@ -356,8 +356,8 @@ bool wd_fdc_t::sector_matches() const
{
if(0)
logerror("%s: matching %02x %02x %02x %02x - %02x %02x\n", tag(),
- cur_live.idbuf[0], cur_live.idbuf[1], cur_live.idbuf[2], cur_live.idbuf[3],
- track, sector);
+ cur_live.idbuf[0], cur_live.idbuf[1], cur_live.idbuf[2], cur_live.idbuf[3],
+ track, sector);
if(cur_live.idbuf[0] != track || cur_live.idbuf[2] != sector)
return false;
@@ -1508,7 +1508,7 @@ void wd_fdc_t::live_run(attotime limit)
}
if(cur_live.bit_counter >= 11*16 && (cur_live.shift_reg == 0xf56a || cur_live.shift_reg == 0xf56b ||
- cur_live.shift_reg == 0xf56e || cur_live.shift_reg == 0xf56f)) {
+ cur_live.shift_reg == 0xf56e || cur_live.shift_reg == 0xf56f)) {
cur_live.crc =
cur_live.shift_reg == 0xf56a ? 0x8fe7 :
cur_live.shift_reg == 0xf56b ? 0x9fc6 :
diff --git a/src/emu/machine/x2212.c b/src/emu/machine/x2212.c
index 8218382e297..9629d593a3e 100644
--- a/src/emu/machine/x2212.c
+++ b/src/emu/machine/x2212.c
@@ -37,13 +37,13 @@ const device_type X2212 = &device_creator<x2212_device>;
x2212_device::x2212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, X2212, "X2212", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_nvram_interface(mconfig, *this),
- m_auto_save(false),
- m_sram_space_config("SRAM", ENDIANNESS_BIG, 8, 8, 0, *ADDRESS_MAP_NAME(x2212_sram_map)),
- m_e2prom_space_config("E2PROM", ENDIANNESS_BIG, 8, 8, 0, *ADDRESS_MAP_NAME(x2212_e2prom_map)),
- m_store(false),
- m_array_recall(false)
+ device_memory_interface(mconfig, *this),
+ device_nvram_interface(mconfig, *this),
+ m_auto_save(false),
+ m_sram_space_config("SRAM", ENDIANNESS_BIG, 8, 8, 0, *ADDRESS_MAP_NAME(x2212_sram_map)),
+ m_e2prom_space_config("E2PROM", ENDIANNESS_BIG, 8, 8, 0, *ADDRESS_MAP_NAME(x2212_e2prom_map)),
+ m_store(false),
+ m_array_recall(false)
{
}
diff --git a/src/emu/machine/x2212.h b/src/emu/machine/x2212.h
index bebc5590baf..0db04924f8b 100644
--- a/src/emu/machine/x2212.h
+++ b/src/emu/machine/x2212.h
@@ -35,7 +35,7 @@
// ======================> x2212_device
-class x2212_device : public device_t,
+class x2212_device : public device_t,
public device_memory_interface,
public device_nvram_interface
{
@@ -72,18 +72,18 @@ protected:
static const int SIZE_DATA = 0x100;
// configuration state
- bool m_auto_save;
+ bool m_auto_save;
// device-specific configuration
- address_space_config m_sram_space_config;
- address_space_config m_e2prom_space_config;
+ address_space_config m_sram_space_config;
+ address_space_config m_e2prom_space_config;
// internal state
- address_space * m_sram;
- address_space * m_e2prom;
+ address_space * m_sram;
+ address_space * m_e2prom;
- bool m_store;
- bool m_array_recall;
+ bool m_store;
+ bool m_array_recall;
};
diff --git a/src/emu/machine/x76f041.c b/src/emu/machine/x76f041.c
index a3ee45df84d..7fc2bd8b23e 100644
--- a/src/emu/machine/x76f041.c
+++ b/src/emu/machine/x76f041.c
@@ -74,11 +74,11 @@ void x76f041_device::nvram_default()
{
// Ensure the size is correct though
if(m_region->bytes() != SIZE_RESPONSE_TO_RESET+SIZE_WRITE_PASSWORD+
- SIZE_READ_PASSWORD+SIZE_CONFIGURATION_PASSWORD+SIZE_CONFIGURATION_REGISTERS+SIZE_DATA)
+ SIZE_READ_PASSWORD+SIZE_CONFIGURATION_PASSWORD+SIZE_CONFIGURATION_REGISTERS+SIZE_DATA)
logerror("X76F041: Wrong region length for initialization data, expected 0x%x, got 0x%x\n",
- SIZE_RESPONSE_TO_RESET+SIZE_WRITE_PASSWORD+
- SIZE_READ_PASSWORD+SIZE_CONFIGURATION_PASSWORD+SIZE_CONFIGURATION_REGISTERS+SIZE_DATA,
- m_region->bytes());
+ SIZE_RESPONSE_TO_RESET+SIZE_WRITE_PASSWORD+
+ SIZE_READ_PASSWORD+SIZE_CONFIGURATION_PASSWORD+SIZE_CONFIGURATION_REGISTERS+SIZE_DATA,
+ m_region->bytes());
else {
UINT8 *rb = m_region->base();
int offset = 0;
@@ -206,14 +206,14 @@ void x76f041_device::load_address()
bcr >>= 4;
if(((command & 0xe0) == COMMAND_READ && (bcr & BCR_Z) && (bcr & BCR_T)) ||
- ((command & 0xe0) == COMMAND_WRITE && (bcr & BCR_Z))) {
+ ((command & 0xe0) == COMMAND_WRITE && (bcr & BCR_Z))) {
/* todo: find out when this is really checked. */
verboselog(1, "command not allowed\n");
state = STATE_STOP;
sdar = false;
} else if(((command & 0xe0) == COMMAND_WRITE && !(bcr & BCR_X)) ||
- ((command & 0xe0) == COMMAND_READ && !(bcr & BCR_Y))) {
+ ((command & 0xe0) == COMMAND_READ && !(bcr & BCR_Y))) {
verboselog(1, "password not required\n");
password_ok();
diff --git a/src/emu/machine/x76f100.c b/src/emu/machine/x76f100.c
index c6f4d3a01a5..245e96237fc 100644
--- a/src/emu/machine/x76f100.c
+++ b/src/emu/machine/x76f100.c
@@ -69,9 +69,9 @@ void x76f100_device::nvram_default()
// Ensure the size is correct though
if(m_region->bytes() != SIZE_RESPONSE_TO_RESET+SIZE_WRITE_PASSWORD+SIZE_READ_PASSWORD+SIZE_DATA)
logerror("x76f100 %s: Wrong region length for initialization data, expected 0x%x, got 0x%x\n",
- tag(),
- SIZE_RESPONSE_TO_RESET+SIZE_WRITE_PASSWORD+SIZE_READ_PASSWORD+SIZE_DATA,
- m_region->bytes());
+ tag(),
+ SIZE_RESPONSE_TO_RESET+SIZE_WRITE_PASSWORD+SIZE_READ_PASSWORD+SIZE_DATA,
+ m_region->bytes());
else {
UINT8 *rb = m_region->base();
int offset = 0;
diff --git a/src/emu/machine/z80ctc.c b/src/emu/machine/z80ctc.c
index a17f90ee964..be5be3e8f63 100644
--- a/src/emu/machine/z80ctc.c
+++ b/src/emu/machine/z80ctc.c
@@ -20,7 +20,7 @@
// DEBUGGING
//**************************************************************************
-#define VERBOSE 0
+#define VERBOSE 0
#define VPRINTF(x) do { if (VERBOSE) logerror x; } while (0)
@@ -31,40 +31,40 @@
//**************************************************************************
// these are the bits of the incoming commands to the CTC
-const int INTERRUPT = 0x80;
-const int INTERRUPT_ON = 0x80;
-const int INTERRUPT_OFF = 0x00;
+const int INTERRUPT = 0x80;
+const int INTERRUPT_ON = 0x80;
+const int INTERRUPT_OFF = 0x00;
-const int MODE = 0x40;
-const int MODE_TIMER = 0x00;
-const int MODE_COUNTER = 0x40;
+const int MODE = 0x40;
+const int MODE_TIMER = 0x00;
+const int MODE_COUNTER = 0x40;
-const int PRESCALER = 0x20;
-const int PRESCALER_256 = 0x20;
-const int PRESCALER_16 = 0x00;
+const int PRESCALER = 0x20;
+const int PRESCALER_256 = 0x20;
+const int PRESCALER_16 = 0x00;
-const int EDGE = 0x10;
-const int EDGE_FALLING = 0x00;
-const int EDGE_RISING = 0x10;
+const int EDGE = 0x10;
+const int EDGE_FALLING = 0x00;
+const int EDGE_RISING = 0x10;
-const int TRIGGER = 0x08;
-const int TRIGGER_AUTO = 0x00;
-const int TRIGGER_CLOCK = 0x08;
+const int TRIGGER = 0x08;
+const int TRIGGER_AUTO = 0x00;
+const int TRIGGER_CLOCK = 0x08;
-const int CONSTANT = 0x04;
-const int CONSTANT_LOAD = 0x04;
-const int CONSTANT_NONE = 0x00;
+const int CONSTANT = 0x04;
+const int CONSTANT_LOAD = 0x04;
+const int CONSTANT_NONE = 0x00;
-const int RESET = 0x02;
-const int RESET_CONTINUE = 0x00;
-const int RESET_ACTIVE = 0x02;
+const int RESET = 0x02;
+const int RESET_CONTINUE = 0x00;
+const int RESET_ACTIVE = 0x02;
-const int CONTROL = 0x01;
-const int CONTROL_VECTOR = 0x00;
-const int CONTROL_WORD = 0x01;
+const int CONTROL = 0x01;
+const int CONTROL_VECTOR = 0x00;
+const int CONTROL_WORD = 0x01;
// these extra bits help us keep things accurate
-const int WAITING_FOR_TRIG = 0x100;
+const int WAITING_FOR_TRIG = 0x100;
@@ -81,7 +81,7 @@ const device_type Z80CTC = &device_creator<z80ctc_device>;
z80ctc_device::z80ctc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Z80CTC, "Zilog Z80 CTC", tag, owner, clock),
- device_z80daisy_interface(mconfig, *this)
+ device_z80daisy_interface(mconfig, *this)
{
}
@@ -161,7 +161,7 @@ void z80ctc_device::device_start()
m_channel[3].start(this, 3, nullcb);
// register for save states
- save_item(NAME(m_vector));
+ save_item(NAME(m_vector));
}
@@ -301,11 +301,11 @@ void z80ctc_device::interrupt_check()
z80ctc_device::ctc_channel::ctc_channel()
: m_mode(0),
- m_tconst(0),
- m_down(0),
- m_extclk(0),
- m_timer(NULL),
- m_int_state(0)
+ m_tconst(0),
+ m_down(0),
+ m_extclk(0),
+ m_timer(NULL),
+ m_int_state(0)
{
memset(&m_zc, 0, sizeof(m_zc));
}
@@ -324,11 +324,11 @@ void z80ctc_device::ctc_channel::start(z80ctc_device *device, int index, const d
m_timer = m_device->machine().scheduler().timer_alloc(FUNC(static_timer_callback), this);
// register for save states
- m_device->save_item(NAME(m_mode), m_index);
- m_device->save_item(NAME(m_tconst), m_index);
- m_device->save_item(NAME(m_down), m_index);
- m_device->save_item(NAME(m_extclk), m_index);
- m_device->save_item(NAME(m_int_state), m_index);
+ m_device->save_item(NAME(m_mode), m_index);
+ m_device->save_item(NAME(m_tconst), m_index);
+ m_device->save_item(NAME(m_down), m_index);
+ m_device->save_item(NAME(m_extclk), m_index);
+ m_device->save_item(NAME(m_int_state), m_index);
}
@@ -433,7 +433,7 @@ void z80ctc_device::ctc_channel::write(UINT8 data)
}
// if we're writing the interrupt vector, handle it specially
-#if 0 /* Tatsuyuki Satoh changes */
+#if 0 /* Tatsuyuki Satoh changes */
// The 'Z80family handbook' wrote,
// interrupt vector is able to set for even channel (0 or 2)
else if ((data & CONTROL) == CONTROL_VECTOR && (m_index & 1) == 0)
diff --git a/src/emu/machine/z80ctc.h b/src/emu/machine/z80ctc.h
index 066a4266462..0f9ff988c9e 100644
--- a/src/emu/machine/z80ctc.h
+++ b/src/emu/machine/z80ctc.h
@@ -53,17 +53,17 @@
struct z80ctc_interface
{
- devcb_write_line m_intr_cb; // callback when change interrupt status
- devcb_write_line m_zc0_cb; // ZC/TO0 callback
- devcb_write_line m_zc1_cb; // ZC/TO1 callback
- devcb_write_line m_zc2_cb; // ZC/TO2 callback
+ devcb_write_line m_intr_cb; // callback when change interrupt status
+ devcb_write_line m_zc0_cb; // ZC/TO0 callback
+ devcb_write_line m_zc1_cb; // ZC/TO1 callback
+ devcb_write_line m_zc2_cb; // ZC/TO2 callback
};
// ======================> z80ctc_device
-class z80ctc_device : public device_t,
+class z80ctc_device : public device_t,
public device_z80daisy_interface,
public z80ctc_interface
{
@@ -118,27 +118,27 @@ private:
void trigger(UINT8 data);
void timer_callback();
- z80ctc_device * m_device; // pointer back to our device
- int m_index; // our channel index
- devcb_resolved_write_line m_zc; // zero crossing callbacks
- UINT16 m_mode; // current mode
- UINT16 m_tconst; // time constant
- UINT16 m_down; // down counter (clock mode only)
- UINT8 m_extclk; // current signal from the external clock
- emu_timer * m_timer; // array of active timers
- UINT8 m_int_state; // interrupt status (for daisy chain)
+ z80ctc_device * m_device; // pointer back to our device
+ int m_index; // our channel index
+ devcb_resolved_write_line m_zc; // zero crossing callbacks
+ UINT16 m_mode; // current mode
+ UINT16 m_tconst; // time constant
+ UINT16 m_down; // down counter (clock mode only)
+ UINT8 m_extclk; // current signal from the external clock
+ emu_timer * m_timer; // array of active timers
+ UINT8 m_int_state; // interrupt status (for daisy chain)
private:
static TIMER_CALLBACK( static_timer_callback ) { reinterpret_cast<z80ctc_device::ctc_channel *>(ptr)->timer_callback(); }
};
// internal state
- devcb_resolved_write_line m_intr; // interrupt callback
+ devcb_resolved_write_line m_intr; // interrupt callback
- UINT8 m_vector; // interrupt vector
- attotime m_period16; // 16/system clock
- attotime m_period256; // 256/system clock
- ctc_channel m_channel[4]; // data for each channel
+ UINT8 m_vector; // interrupt vector
+ attotime m_period16; // 16/system clock
+ attotime m_period256; // 256/system clock
+ ctc_channel m_channel[4]; // data for each channel
};
diff --git a/src/emu/machine/z80dart.c b/src/emu/machine/z80dart.c
index 074e136f183..2ceae5031b0 100644
--- a/src/emu/machine/z80dart.c
+++ b/src/emu/machine/z80dart.c
@@ -70,91 +70,91 @@ enum
INT_SPECIAL
};
-const int RR0_RX_CHAR_AVAILABLE = 0x01;
-const int RR0_INTERRUPT_PENDING = 0x02;
-const int RR0_TX_BUFFER_EMPTY = 0x04;
-const int RR0_DCD = 0x08;
-const int RR0_RI = 0x10;
-const int RR0_SYNC_HUNT = 0x10; // not supported
-const int RR0_CTS = 0x20;
-const int RR0_TX_UNDERRUN = 0x40; // not supported
-const int RR0_BREAK_ABORT = 0x80; // not supported
-
-const int RR1_ALL_SENT = 0x01;
-const int RR1_RESIDUE_CODE_MASK = 0x0e; // not supported
-const int RR1_PARITY_ERROR = 0x10;
-const int RR1_RX_OVERRUN_ERROR = 0x20;
-const int RR1_CRC_FRAMING_ERROR = 0x40;
-const int RR1_END_OF_FRAME = 0x80; // not supported
-
-const int WR0_REGISTER_MASK = 0x07;
-const int WR0_COMMAND_MASK = 0x38;
-const int WR0_NULL = 0x00;
-const int WR0_SEND_ABORT = 0x08; // not supported
-const int WR0_RESET_EXT_STATUS = 0x10;
-const int WR0_CHANNEL_RESET = 0x18;
-const int WR0_ENABLE_INT_NEXT_RX = 0x20;
-const int WR0_RESET_TX_INT = 0x28; // not supported
-const int WR0_ERROR_RESET = 0x30;
-const int WR0_RETURN_FROM_INT = 0x38; // not supported
-const int WR0_CRC_RESET_CODE_MASK = 0xc0; // not supported
-const int WR0_CRC_RESET_NULL = 0x00; // not supported
-const int WR0_CRC_RESET_RX = 0x40; // not supported
-const int WR0_CRC_RESET_TX = 0x80; // not supported
-const int WR0_CRC_RESET_TX_UNDERRUN = 0xc0; // not supported
-
-const int WR1_EXT_INT_ENABLE = 0x01;
-const int WR1_TX_INT_ENABLE = 0x02;
-const int WR1_STATUS_VECTOR = 0x04;
-const int WR1_RX_INT_MODE_MASK = 0x18;
-const int WR1_RX_INT_DISABLE = 0x00;
-const int WR1_RX_INT_FIRST = 0x08;
-const int WR1_RX_INT_ALL_PARITY = 0x10; // not supported
-const int WR1_RX_INT_ALL = 0x18;
-const int WR1_WRDY_ON_RX_TX = 0x20; // not supported
-const int WR1_WRDY_FUNCTION = 0x40; // not supported
-const int WR1_WRDY_ENABLE = 0x80; // not supported
-
-const int WR3_RX_ENABLE = 0x01;
+const int RR0_RX_CHAR_AVAILABLE = 0x01;
+const int RR0_INTERRUPT_PENDING = 0x02;
+const int RR0_TX_BUFFER_EMPTY = 0x04;
+const int RR0_DCD = 0x08;
+const int RR0_RI = 0x10;
+const int RR0_SYNC_HUNT = 0x10; // not supported
+const int RR0_CTS = 0x20;
+const int RR0_TX_UNDERRUN = 0x40; // not supported
+const int RR0_BREAK_ABORT = 0x80; // not supported
+
+const int RR1_ALL_SENT = 0x01;
+const int RR1_RESIDUE_CODE_MASK = 0x0e; // not supported
+const int RR1_PARITY_ERROR = 0x10;
+const int RR1_RX_OVERRUN_ERROR = 0x20;
+const int RR1_CRC_FRAMING_ERROR = 0x40;
+const int RR1_END_OF_FRAME = 0x80; // not supported
+
+const int WR0_REGISTER_MASK = 0x07;
+const int WR0_COMMAND_MASK = 0x38;
+const int WR0_NULL = 0x00;
+const int WR0_SEND_ABORT = 0x08; // not supported
+const int WR0_RESET_EXT_STATUS = 0x10;
+const int WR0_CHANNEL_RESET = 0x18;
+const int WR0_ENABLE_INT_NEXT_RX = 0x20;
+const int WR0_RESET_TX_INT = 0x28; // not supported
+const int WR0_ERROR_RESET = 0x30;
+const int WR0_RETURN_FROM_INT = 0x38; // not supported
+const int WR0_CRC_RESET_CODE_MASK = 0xc0; // not supported
+const int WR0_CRC_RESET_NULL = 0x00; // not supported
+const int WR0_CRC_RESET_RX = 0x40; // not supported
+const int WR0_CRC_RESET_TX = 0x80; // not supported
+const int WR0_CRC_RESET_TX_UNDERRUN = 0xc0; // not supported
+
+const int WR1_EXT_INT_ENABLE = 0x01;
+const int WR1_TX_INT_ENABLE = 0x02;
+const int WR1_STATUS_VECTOR = 0x04;
+const int WR1_RX_INT_MODE_MASK = 0x18;
+const int WR1_RX_INT_DISABLE = 0x00;
+const int WR1_RX_INT_FIRST = 0x08;
+const int WR1_RX_INT_ALL_PARITY = 0x10; // not supported
+const int WR1_RX_INT_ALL = 0x18;
+const int WR1_WRDY_ON_RX_TX = 0x20; // not supported
+const int WR1_WRDY_FUNCTION = 0x40; // not supported
+const int WR1_WRDY_ENABLE = 0x80; // not supported
+
+const int WR3_RX_ENABLE = 0x01;
const int WR3_SYNC_CHAR_LOAD_INHIBIT= 0x02; // not supported
-const int WR3_ADDRESS_SEARCH_MODE = 0x04; // not supported
-const int WR3_RX_CRC_ENABLE = 0x08; // not supported
-const int WR3_ENTER_HUNT_PHASE = 0x10; // not supported
-const int WR3_AUTO_ENABLES = 0x20;
-const int WR3_RX_WORD_LENGTH_MASK = 0xc0;
-const int WR3_RX_WORD_LENGTH_5 = 0x00;
-const int WR3_RX_WORD_LENGTH_7 = 0x40;
-const int WR3_RX_WORD_LENGTH_6 = 0x80;
-const int WR3_RX_WORD_LENGTH_8 = 0xc0;
-
-const int WR4_PARITY_ENABLE = 0x01; // not supported
-const int WR4_PARITY_EVEN = 0x02; // not supported
-const int WR4_STOP_BITS_MASK = 0x0c;
-const int WR4_STOP_BITS_1 = 0x04;
-const int WR4_STOP_BITS_1_5 = 0x08; // not supported
-const int WR4_STOP_BITS_2 = 0x0c;
-const int WR4_SYNC_MODE_MASK = 0x30; // not supported
-const int WR4_SYNC_MODE_8_BIT = 0x00; // not supported
-const int WR4_SYNC_MODE_16_BIT = 0x10; // not supported
-const int WR4_SYNC_MODE_SDLC = 0x20; // not supported
-const int WR4_SYNC_MODE_EXT = 0x30; // not supported
-const int WR4_CLOCK_RATE_MASK = 0xc0;
-const int WR4_CLOCK_RATE_X1 = 0x00;
-const int WR4_CLOCK_RATE_X16 = 0x40;
-const int WR4_CLOCK_RATE_X32 = 0x80;
-const int WR4_CLOCK_RATE_X64 = 0xc0;
-
-const int WR5_TX_CRC_ENABLE = 0x01; // not supported
-const int WR5_RTS = 0x02;
-const int WR5_CRC16 = 0x04; // not supported
-const int WR5_TX_ENABLE = 0x08;
-const int WR5_SEND_BREAK = 0x10;
-const int WR5_TX_WORD_LENGTH_MASK = 0x60;
-const int WR5_TX_WORD_LENGTH_5 = 0x00;
-const int WR5_TX_WORD_LENGTH_6 = 0x40;
-const int WR5_TX_WORD_LENGTH_7 = 0x20;
-const int WR5_TX_WORD_LENGTH_8 = 0x60;
-const int WR5_DTR = 0x80;
+const int WR3_ADDRESS_SEARCH_MODE = 0x04; // not supported
+const int WR3_RX_CRC_ENABLE = 0x08; // not supported
+const int WR3_ENTER_HUNT_PHASE = 0x10; // not supported
+const int WR3_AUTO_ENABLES = 0x20;
+const int WR3_RX_WORD_LENGTH_MASK = 0xc0;
+const int WR3_RX_WORD_LENGTH_5 = 0x00;
+const int WR3_RX_WORD_LENGTH_7 = 0x40;
+const int WR3_RX_WORD_LENGTH_6 = 0x80;
+const int WR3_RX_WORD_LENGTH_8 = 0xc0;
+
+const int WR4_PARITY_ENABLE = 0x01; // not supported
+const int WR4_PARITY_EVEN = 0x02; // not supported
+const int WR4_STOP_BITS_MASK = 0x0c;
+const int WR4_STOP_BITS_1 = 0x04;
+const int WR4_STOP_BITS_1_5 = 0x08; // not supported
+const int WR4_STOP_BITS_2 = 0x0c;
+const int WR4_SYNC_MODE_MASK = 0x30; // not supported
+const int WR4_SYNC_MODE_8_BIT = 0x00; // not supported
+const int WR4_SYNC_MODE_16_BIT = 0x10; // not supported
+const int WR4_SYNC_MODE_SDLC = 0x20; // not supported
+const int WR4_SYNC_MODE_EXT = 0x30; // not supported
+const int WR4_CLOCK_RATE_MASK = 0xc0;
+const int WR4_CLOCK_RATE_X1 = 0x00;
+const int WR4_CLOCK_RATE_X16 = 0x40;
+const int WR4_CLOCK_RATE_X32 = 0x80;
+const int WR4_CLOCK_RATE_X64 = 0xc0;
+
+const int WR5_TX_CRC_ENABLE = 0x01; // not supported
+const int WR5_RTS = 0x02;
+const int WR5_CRC16 = 0x04; // not supported
+const int WR5_TX_ENABLE = 0x08;
+const int WR5_SEND_BREAK = 0x10;
+const int WR5_TX_WORD_LENGTH_MASK = 0x60;
+const int WR5_TX_WORD_LENGTH_5 = 0x00;
+const int WR5_TX_WORD_LENGTH_6 = 0x40;
+const int WR5_TX_WORD_LENGTH_7 = 0x20;
+const int WR5_TX_WORD_LENGTH_8 = 0x60;
+const int WR5_DTR = 0x80;
@@ -194,7 +194,7 @@ const device_type Z80SIO4 = &device_creator<z80dart_device>;
z80dart_device::z80dart_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Z80DART, "Zilog Z80 DART", tag, owner, clock),
- device_z80daisy_interface(mconfig, *this)
+ device_z80daisy_interface(mconfig, *this)
{
for (int i = 0; i < 8; i++)
m_int_state[i] = 0;
@@ -443,27 +443,27 @@ int z80dart_device::m1_r()
z80dart_device::dart_channel::dart_channel()
: m_rx_shift(0),
- m_rx_error(0),
- m_rx_fifo(-1),
- m_rx_clock(0),
- m_rx_state(0),
- m_rx_bits(0),
- m_rx_first(0),
- m_rx_parity(0),
- m_rx_break(0),
- m_rx_rr0_latch(0),
- m_ri(0),
- m_cts(0),
- m_dcd(0),
- m_tx_data(0),
- m_tx_shift(0),
- m_tx_clock(0),
- m_tx_state(0),
- m_tx_bits(0),
- m_tx_parity(0),
- m_dtr(0),
- m_rts(0),
- m_sync(0)
+ m_rx_error(0),
+ m_rx_fifo(-1),
+ m_rx_clock(0),
+ m_rx_state(0),
+ m_rx_bits(0),
+ m_rx_first(0),
+ m_rx_parity(0),
+ m_rx_break(0),
+ m_rx_rr0_latch(0),
+ m_ri(0),
+ m_cts(0),
+ m_dcd(0),
+ m_tx_data(0),
+ m_tx_shift(0),
+ m_tx_clock(0),
+ m_tx_state(0),
+ m_tx_bits(0),
+ m_tx_parity(0),
+ m_dtr(0),
+ m_rts(0),
+ m_sync(0)
{
memset(&m_in_rxd_func, 0, sizeof(m_in_rxd_func));
memset(&m_out_txd_func, 0, sizeof(m_out_txd_func));
@@ -557,10 +557,10 @@ int z80dart_device::dart_channel::get_clock_mode()
switch (m_wr[4] & WR4_CLOCK_RATE_MASK)
{
- case WR4_CLOCK_RATE_X1: clocks = 1; break;
- case WR4_CLOCK_RATE_X16: clocks = 16; break;
- case WR4_CLOCK_RATE_X32: clocks = 32; break;
- case WR4_CLOCK_RATE_X64: clocks = 64; break;
+ case WR4_CLOCK_RATE_X1: clocks = 1; break;
+ case WR4_CLOCK_RATE_X16: clocks = 16; break;
+ case WR4_CLOCK_RATE_X32: clocks = 32; break;
+ case WR4_CLOCK_RATE_X64: clocks = 64; break;
}
return clocks;
@@ -577,9 +577,9 @@ float z80dart_device::dart_channel::get_stop_bits()
switch (m_wr[4] & WR4_STOP_BITS_MASK)
{
- case WR4_STOP_BITS_1: bits = 1; break;
- case WR4_STOP_BITS_1_5: bits = 1.5; break;
- case WR4_STOP_BITS_2: bits = 2; break;
+ case WR4_STOP_BITS_1: bits = 1; break;
+ case WR4_STOP_BITS_1_5: bits = 1.5; break;
+ case WR4_STOP_BITS_2: bits = 2; break;
}
return bits;
@@ -596,10 +596,10 @@ int z80dart_device::dart_channel::get_rx_word_length()
switch (m_wr[3] & WR3_RX_WORD_LENGTH_MASK)
{
- case WR3_RX_WORD_LENGTH_5: bits = 5; break;
- case WR3_RX_WORD_LENGTH_6: bits = 6; break;
- case WR3_RX_WORD_LENGTH_7: bits = 7; break;
- case WR3_RX_WORD_LENGTH_8: bits = 8; break;
+ case WR3_RX_WORD_LENGTH_5: bits = 5; break;
+ case WR3_RX_WORD_LENGTH_6: bits = 6; break;
+ case WR3_RX_WORD_LENGTH_7: bits = 7; break;
+ case WR3_RX_WORD_LENGTH_8: bits = 8; break;
}
return bits;
@@ -616,10 +616,10 @@ int z80dart_device::dart_channel::get_tx_word_length()
switch (m_wr[5] & WR5_TX_WORD_LENGTH_MASK)
{
- case WR5_TX_WORD_LENGTH_5: bits = 5; break;
- case WR5_TX_WORD_LENGTH_6: bits = 6; break;
- case WR5_TX_WORD_LENGTH_7: bits = 7; break;
- case WR5_TX_WORD_LENGTH_8: bits = 8; break;
+ case WR5_TX_WORD_LENGTH_5: bits = 5; break;
+ case WR5_TX_WORD_LENGTH_6: bits = 6; break;
+ case WR5_TX_WORD_LENGTH_7: bits = 7; break;
+ case WR5_TX_WORD_LENGTH_8: bits = 8; break;
}
return bits;
diff --git a/src/emu/machine/z80dart.h b/src/emu/machine/z80dart.h
index b1e8382834a..0291f543d59 100644
--- a/src/emu/machine/z80dart.h
+++ b/src/emu/machine/z80dart.h
@@ -148,33 +148,33 @@
struct z80dart_interface
{
- int m_rx_clock_a; // channel A receive clock
- int m_tx_clock_a; // channel A transmit clock
- int m_rx_clock_b; // channel B receive clock
- int m_tx_clock_b; // channel B transmit clock
-
- devcb_read_line m_in_rxda_cb;
- devcb_write_line m_out_txda_cb;
- devcb_write_line m_out_dtra_cb;
- devcb_write_line m_out_rtsa_cb;
- devcb_write_line m_out_wrdya_cb;
- devcb_write_line m_out_synca_cb;
-
- devcb_read_line m_in_rxdb_cb;
- devcb_write_line m_out_txdb_cb;
- devcb_write_line m_out_dtrb_cb;
- devcb_write_line m_out_rtsb_cb;
- devcb_write_line m_out_wrdyb_cb;
- devcb_write_line m_out_syncb_cb;
-
- devcb_write_line m_out_int_cb;
+ int m_rx_clock_a; // channel A receive clock
+ int m_tx_clock_a; // channel A transmit clock
+ int m_rx_clock_b; // channel B receive clock
+ int m_tx_clock_b; // channel B transmit clock
+
+ devcb_read_line m_in_rxda_cb;
+ devcb_write_line m_out_txda_cb;
+ devcb_write_line m_out_dtra_cb;
+ devcb_write_line m_out_rtsa_cb;
+ devcb_write_line m_out_wrdya_cb;
+ devcb_write_line m_out_synca_cb;
+
+ devcb_read_line m_in_rxdb_cb;
+ devcb_write_line m_out_txdb_cb;
+ devcb_write_line m_out_dtrb_cb;
+ devcb_write_line m_out_rtsb_cb;
+ devcb_write_line m_out_wrdyb_cb;
+ devcb_write_line m_out_syncb_cb;
+
+ devcb_write_line m_out_int_cb;
};
// ======================> z80dart_device
-class z80dart_device : public device_t,
+class z80dart_device : public device_t,
public device_z80daisy_interface,
public z80dart_interface
{
@@ -265,64 +265,64 @@ private:
static TIMER_CALLBACK( static_txc_tick ) { reinterpret_cast<dart_channel *>(ptr)->tx_w(1); }
z80dart_device *m_device;
- int m_index;
+ int m_index;
- devcb_resolved_read_line m_in_rxd_func;
- devcb_resolved_write_line m_out_txd_func;
- devcb_resolved_write_line m_out_dtr_func;
- devcb_resolved_write_line m_out_rts_func;
- devcb_resolved_write_line m_out_wrdy_func;
- devcb_resolved_write_line m_out_sync_func;
+ devcb_resolved_read_line m_in_rxd_func;
+ devcb_resolved_write_line m_out_txd_func;
+ devcb_resolved_write_line m_out_dtr_func;
+ devcb_resolved_write_line m_out_rts_func;
+ devcb_resolved_write_line m_out_wrdy_func;
+ devcb_resolved_write_line m_out_sync_func;
// register state
- UINT8 m_rr[3]; // read register
- UINT8 m_wr[6]; // write register
+ UINT8 m_rr[3]; // read register
+ UINT8 m_wr[6]; // write register
// receiver state
- UINT8 m_rx_data_fifo[3]; // receive data FIFO
- UINT8 m_rx_error_fifo[3]; // receive error FIFO
- UINT8 m_rx_shift; // 8-bit receive shift register
- UINT8 m_rx_error; // current receive error
- int m_rx_fifo; // receive FIFO pointer
-
- int m_rx_clock; // receive clock pulse count
- int m_rx_state; // receive state
- int m_rx_bits; // bits received
- int m_rx_first; // first character received
- int m_rx_parity; // received data parity
- int m_rx_break; // receive break condition
- UINT8 m_rx_rr0_latch; // read register 0 latched
-
- int m_ri; // ring indicator latch
- int m_cts; // clear to send latch
- int m_dcd; // data carrier detect latch
+ UINT8 m_rx_data_fifo[3]; // receive data FIFO
+ UINT8 m_rx_error_fifo[3]; // receive error FIFO
+ UINT8 m_rx_shift; // 8-bit receive shift register
+ UINT8 m_rx_error; // current receive error
+ int m_rx_fifo; // receive FIFO pointer
+
+ int m_rx_clock; // receive clock pulse count
+ int m_rx_state; // receive state
+ int m_rx_bits; // bits received
+ int m_rx_first; // first character received
+ int m_rx_parity; // received data parity
+ int m_rx_break; // receive break condition
+ UINT8 m_rx_rr0_latch; // read register 0 latched
+
+ int m_ri; // ring indicator latch
+ int m_cts; // clear to send latch
+ int m_dcd; // data carrier detect latch
// transmitter state
- UINT8 m_tx_data; // transmit data register
- UINT8 m_tx_shift; // transmit shift register
+ UINT8 m_tx_data; // transmit data register
+ UINT8 m_tx_shift; // transmit shift register
- int m_tx_clock; // transmit clock pulse count
- int m_tx_state; // transmit state
- int m_tx_bits; // bits transmitted
- int m_tx_parity; // transmitted data parity
+ int m_tx_clock; // transmit clock pulse count
+ int m_tx_state; // transmit state
+ int m_tx_bits; // bits transmitted
+ int m_tx_parity; // transmitted data parity
- int m_dtr; // data terminal ready
- int m_rts; // request to send
+ int m_dtr; // data terminal ready
+ int m_rts; // request to send
// synchronous state
- UINT16 m_sync; // sync character
+ UINT16 m_sync; // sync character
};
// internal state
- devcb_resolved_write_line m_out_int_func;
- dart_channel m_channel[2]; // channels
- int m_int_state[8]; // interrupt state
+ devcb_resolved_write_line m_out_int_func;
+ dart_channel m_channel[2]; // channels
+ int m_int_state[8]; // interrupt state
// timers
- emu_timer * m_rxca_timer;
- emu_timer * m_txca_timer;
- emu_timer * m_rxcb_timer;
- emu_timer * m_txcb_timer;
+ emu_timer * m_rxca_timer;
+ emu_timer * m_txca_timer;
+ emu_timer * m_rxcb_timer;
+ emu_timer * m_txcb_timer;
};
diff --git a/src/emu/machine/z80dma.c b/src/emu/machine/z80dma.c
index ed15a5caff2..428c0544d1f 100644
--- a/src/emu/machine/z80dma.c
+++ b/src/emu/machine/z80dma.c
@@ -38,26 +38,26 @@ enum
INT_MATCH_END_OF_BLOCK
};
-const int COMMAND_RESET = 0xc3;
-const int COMMAND_RESET_PORT_A_TIMING = 0xc7;
-const int COMMAND_RESET_PORT_B_TIMING = 0xcb;
-const int COMMAND_LOAD = 0xcf;
-const int COMMAND_CONTINUE = 0xd3;
-const int COMMAND_DISABLE_INTERRUPTS = 0xaf;
-const int COMMAND_ENABLE_INTERRUPTS = 0xab;
-const int COMMAND_RESET_AND_DISABLE_INTERRUPTS = 0xa3;
-const int COMMAND_ENABLE_AFTER_RETI = 0xb7;
-const int COMMAND_READ_STATUS_BYTE = 0xbf;
-const int COMMAND_REINITIALIZE_STATUS_BYTE = 0x8b;
-const int COMMAND_INITIATE_READ_SEQUENCE = 0xa7;
-const int COMMAND_FORCE_READY = 0xb3;
-const int COMMAND_ENABLE_DMA = 0x87;
-const int COMMAND_DISABLE_DMA = 0x83;
-const int COMMAND_READ_MASK_FOLLOWS = 0xbb;
-
-const int TM_TRANSFER = 0x01;
-const int TM_SEARCH = 0x02;
-const int TM_SEARCH_TRANSFER = 0x03;
+const int COMMAND_RESET = 0xc3;
+const int COMMAND_RESET_PORT_A_TIMING = 0xc7;
+const int COMMAND_RESET_PORT_B_TIMING = 0xcb;
+const int COMMAND_LOAD = 0xcf;
+const int COMMAND_CONTINUE = 0xd3;
+const int COMMAND_DISABLE_INTERRUPTS = 0xaf;
+const int COMMAND_ENABLE_INTERRUPTS = 0xab;
+const int COMMAND_RESET_AND_DISABLE_INTERRUPTS = 0xa3;
+const int COMMAND_ENABLE_AFTER_RETI = 0xb7;
+const int COMMAND_READ_STATUS_BYTE = 0xbf;
+const int COMMAND_REINITIALIZE_STATUS_BYTE = 0x8b;
+const int COMMAND_INITIATE_READ_SEQUENCE = 0xa7;
+const int COMMAND_FORCE_READY = 0xb3;
+const int COMMAND_ENABLE_DMA = 0x87;
+const int COMMAND_DISABLE_DMA = 0x83;
+const int COMMAND_READ_MASK_FOLLOWS = 0xbb;
+
+const int TM_TRANSFER = 0x01;
+const int TM_SEARCH = 0x02;
+const int TM_SEARCH_TRANSFER = 0x03;
@@ -68,67 +68,67 @@ const int TM_SEARCH_TRANSFER = 0x03;
#define LOG 0
#define DMA_LOG 0
-#define REGNUM(_m, _s) (((_m)<<3) + (_s))
-#define GET_REGNUM(_r) (&(_r) - &(WR0))
-#define REG(_m, _s) m_regs[REGNUM(_m,_s)]
-#define WR0 REG(0, 0)
-#define WR1 REG(1, 0)
-#define WR2 REG(2, 0)
-#define WR3 REG(3, 0)
-#define WR4 REG(4, 0)
-#define WR5 REG(5, 0)
-#define WR6 REG(6, 0)
+#define REGNUM(_m, _s) (((_m)<<3) + (_s))
+#define GET_REGNUM(_r) (&(_r) - &(WR0))
+#define REG(_m, _s) m_regs[REGNUM(_m,_s)]
+#define WR0 REG(0, 0)
+#define WR1 REG(1, 0)
+#define WR2 REG(2, 0)
+#define WR3 REG(3, 0)
+#define WR4 REG(4, 0)
+#define WR5 REG(5, 0)
+#define WR6 REG(6, 0)
-#define PORTA_ADDRESS_L REG(0,1)
-#define PORTA_ADDRESS_H REG(0,2)
+#define PORTA_ADDRESS_L REG(0,1)
+#define PORTA_ADDRESS_H REG(0,2)
-#define BLOCKLEN_L REG(0,3)
-#define BLOCKLEN_H REG(0,4)
+#define BLOCKLEN_L REG(0,3)
+#define BLOCKLEN_H REG(0,4)
-#define PORTA_TIMING REG(1,1)
-#define PORTB_TIMING REG(2,1)
+#define PORTA_TIMING REG(1,1)
+#define PORTB_TIMING REG(2,1)
-#define MASK_BYTE REG(3,1)
-#define MATCH_BYTE REG(3,2)
+#define MASK_BYTE REG(3,1)
+#define MATCH_BYTE REG(3,2)
-#define PORTB_ADDRESS_L REG(4,1)
-#define PORTB_ADDRESS_H REG(4,2)
-#define INTERRUPT_CTRL REG(4,3)
-#define INTERRUPT_VECTOR REG(4,4)
-#define PULSE_CTRL REG(4,5)
+#define PORTB_ADDRESS_L REG(4,1)
+#define PORTB_ADDRESS_H REG(4,2)
+#define INTERRUPT_CTRL REG(4,3)
+#define INTERRUPT_VECTOR REG(4,4)
+#define PULSE_CTRL REG(4,5)
-#define READ_MASK REG(6,1)
+#define READ_MASK REG(6,1)
-#define PORTA_ADDRESS ((PORTA_ADDRESS_H<<8) | PORTA_ADDRESS_L)
-#define PORTB_ADDRESS ((PORTB_ADDRESS_H<<8) | PORTB_ADDRESS_L)
-#define BLOCKLEN ((BLOCKLEN_H<<8) | BLOCKLEN_L)
+#define PORTA_ADDRESS ((PORTA_ADDRESS_H<<8) | PORTA_ADDRESS_L)
+#define PORTB_ADDRESS ((PORTB_ADDRESS_H<<8) | PORTB_ADDRESS_L)
+#define BLOCKLEN ((BLOCKLEN_H<<8) | BLOCKLEN_L)
-#define PORTA_INC (WR1 & 0x10)
-#define PORTB_INC (WR2 & 0x10)
-#define PORTA_FIXED (((WR1 >> 4) & 0x02) == 0x02)
-#define PORTB_FIXED (((WR2 >> 4) & 0x02) == 0x02)
-#define PORTA_MEMORY (((WR1 >> 3) & 0x01) == 0x00)
-#define PORTB_MEMORY (((WR2 >> 3) & 0x01) == 0x00)
+#define PORTA_INC (WR1 & 0x10)
+#define PORTB_INC (WR2 & 0x10)
+#define PORTA_FIXED (((WR1 >> 4) & 0x02) == 0x02)
+#define PORTB_FIXED (((WR2 >> 4) & 0x02) == 0x02)
+#define PORTA_MEMORY (((WR1 >> 3) & 0x01) == 0x00)
+#define PORTB_MEMORY (((WR2 >> 3) & 0x01) == 0x00)
-#define PORTA_CYCLE_LEN (4-(PORTA_TIMING & 0x03))
-#define PORTB_CYCLE_LEN (4-(PORTB_TIMING & 0x03))
+#define PORTA_CYCLE_LEN (4-(PORTA_TIMING & 0x03))
+#define PORTB_CYCLE_LEN (4-(PORTB_TIMING & 0x03))
-#define PORTA_IS_SOURCE ((WR0 >> 2) & 0x01)
-#define PORTB_IS_SOURCE (!PORTA_IS_SOURCE)
-#define TRANSFER_MODE (WR0 & 0x03)
+#define PORTA_IS_SOURCE ((WR0 >> 2) & 0x01)
+#define PORTB_IS_SOURCE (!PORTA_IS_SOURCE)
+#define TRANSFER_MODE (WR0 & 0x03)
-#define MATCH_F_SET (m_status &= ~0x10)
-#define MATCH_F_CLEAR (m_status |= 0x10)
-#define EOB_F_SET (m_status &= ~0x20)
-#define EOB_F_CLEAR (m_status |= 0x20)
+#define MATCH_F_SET (m_status &= ~0x10)
+#define MATCH_F_CLEAR (m_status |= 0x10)
+#define EOB_F_SET (m_status &= ~0x20)
+#define EOB_F_CLEAR (m_status |= 0x20)
-#define READY_ACTIVE_HIGH ((WR5>>3) & 0x01)
+#define READY_ACTIVE_HIGH ((WR5>>3) & 0x01)
-#define INTERRUPT_ENABLE (WR3 & 0x20)
-#define INT_ON_MATCH (INTERRUPT_CTRL & 0x01)
-#define INT_ON_END_OF_BLOCK (INTERRUPT_CTRL & 0x02)
-#define INT_ON_READY (INTERRUPT_CTRL & 0x40)
-#define STATUS_AFFECTS_VECTOR (INTERRUPT_CTRL & 0x20)
+#define INTERRUPT_ENABLE (WR3 & 0x20)
+#define INT_ON_MATCH (INTERRUPT_CTRL & 0x01)
+#define INT_ON_END_OF_BLOCK (INTERRUPT_CTRL & 0x02)
+#define INT_ON_READY (INTERRUPT_CTRL & 0x40)
+#define STATUS_AFFECTS_VECTOR (INTERRUPT_CTRL & 0x20)
@@ -145,7 +145,7 @@ const device_type Z80DMA = &device_creator<z80dma_device>;
z80dma_device::z80dma_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Z80DMA, "Z8410", tag, owner, clock),
- device_z80daisy_interface(mconfig, *this)
+ device_z80daisy_interface(mconfig, *this)
{
}
@@ -280,11 +280,11 @@ int z80dma_device::z80daisy_irq_ack()
{
if (m_ip)
{
- if (LOG) logerror("Z80DMA '%s' Interrupt Acknowledge\n", tag());
+ if (LOG) logerror("Z80DMA '%s' Interrupt Acknowledge\n", tag());
// clear interrupt pending flag
m_ip = 0;
- interrupt_check();
+ interrupt_check();
// set interrupt under service flag
m_ius = 1;
@@ -310,11 +310,11 @@ void z80dma_device::z80daisy_irq_reti()
{
if (m_ius)
{
- if (LOG) logerror("Z80DMA '%s' Return from Interrupt\n", tag());
+ if (LOG) logerror("Z80DMA '%s' Return from Interrupt\n", tag());
// clear interrupt under service flag
m_ius = 0;
- interrupt_check();
+ interrupt_check();
return;
}
@@ -534,7 +534,7 @@ void z80dma_device::timerproc()
if (done)
{
m_dma_enabled = 0; //FIXME: Correct?
- m_status = 0x09;
+ m_status = 0x09;
m_status |= !is_ready() << 1; // ready line status
@@ -544,9 +544,9 @@ void z80dma_device::timerproc()
if (LOG) logerror("Z80DMA '%s' End of Block\n", tag());
if (INT_ON_END_OF_BLOCK)
- {
+ {
trigger_interrupt(INT_END_OF_BLOCK);
- }
+ }
}
}
@@ -688,9 +688,9 @@ void z80dma_device::write(UINT8 data)
break;
case COMMAND_READ_STATUS_BYTE:
if (LOG) logerror("Z80DMA '%s' CMD Read status Byte\n", tag());
- READ_MASK = 1;
- m_read_regs_follow[m_read_num_follow++] = m_status;
- break;
+ READ_MASK = 1;
+ m_read_regs_follow[m_read_num_follow++] = m_status;
+ break;
case COMMAND_RESET_AND_DISABLE_INTERRUPTS:
WR3 &= ~0x20;
m_ip = 0;
@@ -845,9 +845,9 @@ void z80dma_device::rdy_write_callback(int state)
update_status();
if (is_ready() && INT_ON_READY)
- {
+ {
trigger_interrupt(INT_RDY);
- }
+ }
}
diff --git a/src/emu/machine/z80dma.h b/src/emu/machine/z80dma.h
index 13c42833101..9843421f8b9 100644
--- a/src/emu/machine/z80dma.h
+++ b/src/emu/machine/z80dma.h
@@ -58,24 +58,24 @@
struct z80dma_interface
{
- devcb_write_line m_out_busreq_cb;
- devcb_write_line m_out_int_cb;
- devcb_write_line m_out_bao_cb;
+ devcb_write_line m_out_busreq_cb;
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_bao_cb;
// memory accessors
- devcb_read8 m_in_mreq_cb;
- devcb_write8 m_out_mreq_cb;
+ devcb_read8 m_in_mreq_cb;
+ devcb_write8 m_out_mreq_cb;
// I/O accessors
- devcb_read8 m_in_iorq_cb;
- devcb_write8 m_out_iorq_cb;
+ devcb_read8 m_in_iorq_cb;
+ devcb_write8 m_out_iorq_cb;
};
// ======================> z80dma_device
-class z80dma_device : public device_t,
+class z80dma_device : public device_t,
public device_z80daisy_interface,
public z80dma_interface
{
@@ -119,25 +119,25 @@ private:
void rdy_write_callback(int state);
// internal state
- devcb_resolved_write_line m_out_busreq_func;
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_write_line m_out_bao_func;
- devcb_resolved_read8 m_in_mreq_func;
- devcb_resolved_write8 m_out_mreq_func;
- devcb_resolved_read8 m_in_iorq_func;
- devcb_resolved_write8 m_out_iorq_func;
+ devcb_resolved_write_line m_out_busreq_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_bao_func;
+ devcb_resolved_read8 m_in_mreq_func;
+ devcb_resolved_write8 m_out_mreq_func;
+ devcb_resolved_read8 m_in_iorq_func;
+ devcb_resolved_write8 m_out_iorq_func;
emu_timer *m_timer;
- UINT16 m_regs[(6<<3)+1+1];
- UINT8 m_num_follow;
- UINT8 m_cur_follow;
- UINT8 m_regs_follow[4];
- UINT8 m_read_num_follow;
- UINT8 m_read_cur_follow;
- UINT8 m_read_regs_follow[7];
- UINT8 m_status;
- UINT8 m_dma_enabled;
+ UINT16 m_regs[(6<<3)+1+1];
+ UINT8 m_num_follow;
+ UINT8 m_cur_follow;
+ UINT8 m_regs_follow[4];
+ UINT8 m_read_num_follow;
+ UINT8 m_read_cur_follow;
+ UINT8 m_read_regs_follow[7];
+ UINT8 m_status;
+ UINT8 m_dma_enabled;
UINT16 m_addressA;
UINT16 m_addressB;
@@ -152,9 +152,9 @@ private:
UINT8 m_latch;
// interrupts
- int m_ip; // interrupt pending
- int m_ius; // interrupt under service
- UINT8 m_vector; // interrupt vector
+ int m_ip; // interrupt pending
+ int m_ius; // interrupt under service
+ UINT8 m_vector; // interrupt vector
};
diff --git a/src/emu/machine/z80pio.c b/src/emu/machine/z80pio.c
index 1f68d2f4e38..a0041c816d9 100644
--- a/src/emu/machine/z80pio.c
+++ b/src/emu/machine/z80pio.c
@@ -33,14 +33,14 @@ enum
MASK
};
-const int ICW_ENABLE_INT = 0x80;
-const int ICW_AND_OR = 0x40;
-const int ICW_AND = 0x40;
-const int ICW_OR = 0x00;
-const int ICW_HIGH_LOW = 0x20;
-const int ICW_HIGH = 0x20;
-const int ICW_LOW = 0x00;
-const int ICW_MASK_FOLLOWS = 0x10;
+const int ICW_ENABLE_INT = 0x80;
+const int ICW_AND_OR = 0x40;
+const int ICW_AND = 0x40;
+const int ICW_OR = 0x00;
+const int ICW_HIGH_LOW = 0x20;
+const int ICW_HIGH = 0x20;
+const int ICW_LOW = 0x00;
+const int ICW_MASK_FOLLOWS = 0x10;
@@ -57,7 +57,7 @@ const device_type Z80PIO = &device_creator<z80pio_device>;
z80pio_device::z80pio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Z80PIO, "Z8420", tag, owner, clock),
- device_z80daisy_interface(mconfig, *this)
+ device_z80daisy_interface(mconfig, *this)
{
}
@@ -298,21 +298,21 @@ void z80pio_device::check_interrupts()
z80pio_device::pio_port::pio_port()
: m_device(NULL),
- m_index(0),
- m_mode(0),
- m_next_control_word(0),
- m_input(0),
- m_output(0),
- m_ior(0),
- m_rdy(false),
- m_stb(false),
- m_ie(false),
- m_ip(false),
- m_ius(false),
- m_icw(0),
- m_vector(0),
- m_mask(0),
- m_match(false)
+ m_index(0),
+ m_mode(0),
+ m_next_control_word(0),
+ m_input(0),
+ m_output(0),
+ m_ior(0),
+ m_rdy(false),
+ m_stb(false),
+ m_ie(false),
+ m_ip(false),
+ m_ius(false),
+ m_icw(0),
+ m_vector(0),
+ m_mask(0),
+ m_match(false)
{
memset(&m_in_p_func, 0, sizeof(m_in_p_func));
memset(&m_out_p_func, 0, sizeof(m_out_p_func));
diff --git a/src/emu/machine/z80pio.h b/src/emu/machine/z80pio.h
index 5f0388a50f2..64a8bc28499 100644
--- a/src/emu/machine/z80pio.h
+++ b/src/emu/machine/z80pio.h
@@ -58,22 +58,22 @@
struct z80pio_interface
{
- devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_int_cb;
- devcb_read8 m_in_pa_cb;
- devcb_write8 m_out_pa_cb;
- devcb_write_line m_out_ardy_cb;
+ devcb_read8 m_in_pa_cb;
+ devcb_write8 m_out_pa_cb;
+ devcb_write_line m_out_ardy_cb;
- devcb_read8 m_in_pb_cb;
- devcb_write8 m_out_pb_cb;
- devcb_write_line m_out_brdy_cb;
+ devcb_read8 m_in_pb_cb;
+ devcb_write8 m_out_pb_cb;
+ devcb_write_line m_out_brdy_cb;
};
// ======================> z80pio_device
-class z80pio_device : public device_t,
+class z80pio_device : public device_t,
public device_z80daisy_interface,
public z80pio_interface
{
@@ -170,34 +170,34 @@ private:
private:
void check_interrupts() { m_device->check_interrupts(); }
- z80pio_device * m_device;
- int m_index;
+ z80pio_device * m_device;
+ int m_index;
- devcb_resolved_read8 m_in_p_func;
- devcb_resolved_write8 m_out_p_func;
- devcb_resolved_write_line m_out_rdy_func;
+ devcb_resolved_read8 m_in_p_func;
+ devcb_resolved_write8 m_out_p_func;
+ devcb_resolved_write_line m_out_rdy_func;
- int m_mode; // mode register
- int m_next_control_word; // next control word
- UINT8 m_input; // input latch
- UINT8 m_output; // output latch
- UINT8 m_ior; // input/output register
- bool m_rdy; // ready
- bool m_stb; // strobe
+ int m_mode; // mode register
+ int m_next_control_word; // next control word
+ UINT8 m_input; // input latch
+ UINT8 m_output; // output latch
+ UINT8 m_ior; // input/output register
+ bool m_rdy; // ready
+ bool m_stb; // strobe
// interrupts
- bool m_ie; // interrupt enabled
- bool m_ip; // interrupt pending
- bool m_ius; // interrupt under service
- UINT8 m_icw; // interrupt control word
- UINT8 m_vector; // interrupt vector
- UINT8 m_mask; // interrupt mask
- bool m_match; // logic equation match
+ bool m_ie; // interrupt enabled
+ bool m_ip; // interrupt pending
+ bool m_ius; // interrupt under service
+ UINT8 m_icw; // interrupt control word
+ UINT8 m_vector; // interrupt vector
+ UINT8 m_mask; // interrupt mask
+ bool m_match; // logic equation match
};
// internal state
- pio_port m_port[2];
- devcb_resolved_write_line m_out_int_func;
+ pio_port m_port[2];
+ devcb_resolved_write_line m_out_int_func;
};
diff --git a/src/emu/machine/z80sio.c b/src/emu/machine/z80sio.c
index 616b0a61aae..f254963e16d 100644
--- a/src/emu/machine/z80sio.c
+++ b/src/emu/machine/z80sio.c
@@ -21,7 +21,7 @@ const device_type Z80SIO = &device_creator<z80sio_device>;
// DEBUGGING
//**************************************************************************
-#define VERBOSE 0
+#define VERBOSE 0
#define VPRINTF(x) do { if (VERBOSE) logerror x; } while (0)
@@ -32,120 +32,120 @@ const device_type Z80SIO = &device_creator<z80sio_device>;
//**************************************************************************
// interrupt states
-const int INT_TRANSMIT = 0x00; // not confirmed
-const int INT_STATUS = 0x01;
-const int INT_RECEIVE = 0x02;
-const int INT_ERROR = 0x03;
-
-const int INT_CHB_TRANSMIT = 0 + INT_TRANSMIT;
-const int INT_CHB_STATUS = 0 + INT_STATUS;
-const int INT_CHB_RECEIVE = 0 + INT_RECEIVE;
-const int INT_CHB_ERROR = 0 + INT_ERROR;
-const int INT_CHA_TRANSMIT = 4 + INT_TRANSMIT;
-const int INT_CHA_STATUS = 4 + INT_STATUS;
-const int INT_CHA_RECEIVE = 4 + INT_RECEIVE;
-const int INT_CHA_ERROR = 4 + INT_ERROR;
+const int INT_TRANSMIT = 0x00; // not confirmed
+const int INT_STATUS = 0x01;
+const int INT_RECEIVE = 0x02;
+const int INT_ERROR = 0x03;
+
+const int INT_CHB_TRANSMIT = 0 + INT_TRANSMIT;
+const int INT_CHB_STATUS = 0 + INT_STATUS;
+const int INT_CHB_RECEIVE = 0 + INT_RECEIVE;
+const int INT_CHB_ERROR = 0 + INT_ERROR;
+const int INT_CHA_TRANSMIT = 4 + INT_TRANSMIT;
+const int INT_CHA_STATUS = 4 + INT_STATUS;
+const int INT_CHA_RECEIVE = 4 + INT_RECEIVE;
+const int INT_CHA_ERROR = 4 + INT_ERROR;
// SIO write register 0
-const int SIO_WR0_RESET_MASK = 0xc0; // D7-D6: Reset control
-const int SIO_WR0_RESET_NULL = 0x00; // 00 = NULL code
-const int SIO_WR0_RESET_RX_CRC = 0x40; // 01 = Reset Rx CRC checker
-const int SIO_WR0_RESET_TX_CRC = 0x80; // 10 = Reset Tx CRC generator
-const int SIO_WR0_RESET_TX_LATCH = 0xc0; // 11 = Reset Tx Underrun/EOM latch
-const int SIO_WR0_COMMAND_MASK = 0x38; // D5-D3: Command
-const int SIO_WR0_COMMAND_NULL = 0x00; // 000 = NULL code
-const int SIO_WR0_COMMAND_SET_ABORT = 0x08; // 001 = Set abort (SDLC)
-const int SIO_WR0_COMMAND_RES_STATUS_INT = 0x10; // 010 = reset ext/status interrupts
-const int SIO_WR0_COMMAND_CH_RESET = 0x18; // 011 = Channel reset
-const int SIO_WR0_COMMAND_ENA_RX_INT = 0x20; // 100 = Enable int on next Rx character
-const int SIO_WR0_COMMAND_RES_TX_INT = 0x28; // 101 = Reset Tx int pending
-const int SIO_WR0_COMMAND_RES_ERROR = 0x30; // 110 = Error reset
-const int SIO_WR0_COMMAND_RETI = 0x38; // 111 = Return from int (CH-A only)
-const int SIO_WR0_REGISTER_MASK = 0x07; // D2-D0: Register select (0-7)
+const int SIO_WR0_RESET_MASK = 0xc0; // D7-D6: Reset control
+const int SIO_WR0_RESET_NULL = 0x00; // 00 = NULL code
+const int SIO_WR0_RESET_RX_CRC = 0x40; // 01 = Reset Rx CRC checker
+const int SIO_WR0_RESET_TX_CRC = 0x80; // 10 = Reset Tx CRC generator
+const int SIO_WR0_RESET_TX_LATCH = 0xc0; // 11 = Reset Tx Underrun/EOM latch
+const int SIO_WR0_COMMAND_MASK = 0x38; // D5-D3: Command
+const int SIO_WR0_COMMAND_NULL = 0x00; // 000 = NULL code
+const int SIO_WR0_COMMAND_SET_ABORT = 0x08; // 001 = Set abort (SDLC)
+const int SIO_WR0_COMMAND_RES_STATUS_INT = 0x10; // 010 = reset ext/status interrupts
+const int SIO_WR0_COMMAND_CH_RESET = 0x18; // 011 = Channel reset
+const int SIO_WR0_COMMAND_ENA_RX_INT = 0x20; // 100 = Enable int on next Rx character
+const int SIO_WR0_COMMAND_RES_TX_INT = 0x28; // 101 = Reset Tx int pending
+const int SIO_WR0_COMMAND_RES_ERROR = 0x30; // 110 = Error reset
+const int SIO_WR0_COMMAND_RETI = 0x38; // 111 = Return from int (CH-A only)
+const int SIO_WR0_REGISTER_MASK = 0x07; // D2-D0: Register select (0-7)
// SIO write register 1
-const int SIO_WR1_READY_WAIT_ENA = 0x80; // D7 = READY/WAIT enable
-const int SIO_WR1_READY_WAIT_FUNCTION = 0x40; // D6 = READY/WAIT function
-const int SIO_WR1_READY_WAIT_ON_RT = 0x20; // D5 = READY/WAIT on R/T
-const int SIO_WR1_RXINT_MASK = 0x18; // D4-D3 = Rx int control
-const int SIO_WR1_RXINT_DISABLE = 0x00; // 00 = Rx int disable
-const int SIO_WR1_RXINT_FIRST = 0x08; // 01 = Rx int on first character
-const int SIO_WR1_RXINT_ALL_PARITY = 0x10; // 10 = int on all Rx characters (parity affects vector)
-const int SIO_WR1_RXINT_ALL_NOPARITY = 0x18; // 11 = int on all Rx characters (parity ignored)
-const int SIO_WR1_STATUS_AFFECTS_VECTOR = 0x04; // D2 = Status affects vector (CH-B only)
-const int SIO_WR1_TXINT_ENABLE = 0x02; // D1 = Tx int enable
-const int SIO_WR1_STATUSINT_ENABLE = 0x01; // D0 = Ext int enable
+const int SIO_WR1_READY_WAIT_ENA = 0x80; // D7 = READY/WAIT enable
+const int SIO_WR1_READY_WAIT_FUNCTION = 0x40; // D6 = READY/WAIT function
+const int SIO_WR1_READY_WAIT_ON_RT = 0x20; // D5 = READY/WAIT on R/T
+const int SIO_WR1_RXINT_MASK = 0x18; // D4-D3 = Rx int control
+const int SIO_WR1_RXINT_DISABLE = 0x00; // 00 = Rx int disable
+const int SIO_WR1_RXINT_FIRST = 0x08; // 01 = Rx int on first character
+const int SIO_WR1_RXINT_ALL_PARITY = 0x10; // 10 = int on all Rx characters (parity affects vector)
+const int SIO_WR1_RXINT_ALL_NOPARITY = 0x18; // 11 = int on all Rx characters (parity ignored)
+const int SIO_WR1_STATUS_AFFECTS_VECTOR = 0x04; // D2 = Status affects vector (CH-B only)
+const int SIO_WR1_TXINT_ENABLE = 0x02; // D1 = Tx int enable
+const int SIO_WR1_STATUSINT_ENABLE = 0x01; // D0 = Ext int enable
// SIO write register 2 (CH-B only)
-const int SIO_WR2_INT_VECTOR_MASK = 0xff; // D7-D0 = interrupt vector
+const int SIO_WR2_INT_VECTOR_MASK = 0xff; // D7-D0 = interrupt vector
// SIO write register 3
-const int SIO_WR3_RX_DATABITS_MASK = 0xc0; // D7-D6 = Rx Data bits
-const int SIO_WR3_RX_DATABITS_5 = 0x00; // 00 = Rx 5 bits/character
-const int SIO_WR3_RX_DATABITS_7 = 0x40; // 01 = Rx 7 bits/character
-const int SIO_WR3_RX_DATABITS_6 = 0x80; // 10 = Rx 6 bits/character
-const int SIO_WR3_RX_DATABITS_8 = 0xc0; // 11 = Rx 8 bits/character
-const int SIO_WR3_AUTO_ENABLES = 0x20; // D5 = Auto enables
-const int SIO_WR3_ENTER_HUNT_PHASE = 0x10; // D4 = Enter hunt phase
-const int SIO_WR3_RX_CRC_ENABLE = 0x08; // D3 = Rx CRC enable
-const int SIO_WR3_ADDR_SEARCH_MODE = 0x04; // D2 = Address search mode (SDLC)
-const int SIO_WR3_SYNC_LOAD_INHIBIT = 0x02; // D1 = Sync character load inhibit
-const int SIO_WR3_RX_ENABLE = 0x01; // D0 = Rx enable
+const int SIO_WR3_RX_DATABITS_MASK = 0xc0; // D7-D6 = Rx Data bits
+const int SIO_WR3_RX_DATABITS_5 = 0x00; // 00 = Rx 5 bits/character
+const int SIO_WR3_RX_DATABITS_7 = 0x40; // 01 = Rx 7 bits/character
+const int SIO_WR3_RX_DATABITS_6 = 0x80; // 10 = Rx 6 bits/character
+const int SIO_WR3_RX_DATABITS_8 = 0xc0; // 11 = Rx 8 bits/character
+const int SIO_WR3_AUTO_ENABLES = 0x20; // D5 = Auto enables
+const int SIO_WR3_ENTER_HUNT_PHASE = 0x10; // D4 = Enter hunt phase
+const int SIO_WR3_RX_CRC_ENABLE = 0x08; // D3 = Rx CRC enable
+const int SIO_WR3_ADDR_SEARCH_MODE = 0x04; // D2 = Address search mode (SDLC)
+const int SIO_WR3_SYNC_LOAD_INHIBIT = 0x02; // D1 = Sync character load inhibit
+const int SIO_WR3_RX_ENABLE = 0x01; // D0 = Rx enable
// SIO write register 4
-const int SIO_WR4_CLOCK_MODE_MASK = 0xc0; // D7-D6 = Clock mode
-const int SIO_WR4_CLOCK_MODE_x1 = 0x00; // 00 = x1 clock mode
-const int SIO_WR4_CLOCK_MODE_x16 = 0x40; // 01 = x16 clock mode
-const int SIO_WR4_CLOCK_MODE_x32 = 0x80; // 10 = x32 clock mode
-const int SIO_WR4_CLOCK_MODE_x64 = 0xc0; // 11 = x64 clock mode
-const int SIO_WR4_SYNC_MODE_MASK = 0x30; // D5-D4 = Sync mode
-const int SIO_WR4_SYNC_MODE_8BIT = 0x00; // 00 = 8 bit sync character
-const int SIO_WR4_SYNC_MODE_16BIT = 0x10; // 01 = 16 bit sync character
-const int SIO_WR4_SYNC_MODE_SDLC = 0x20; // 10 = SDLC mode (01111110 flag)
-const int SIO_WR4_SYNC_MODE_EXTERNAL = 0x30; // 11 = External sync mode
-const int SIO_WR4_STOPBITS_MASK = 0x0c; // D3-D2 = Stop bits
-const int SIO_WR4_STOPBITS_SYNC = 0x00; // 00 = Sync modes enable
-const int SIO_WR4_STOPBITS_1 = 0x04; // 01 = 1 stop bit/character
-const int SIO_WR4_STOPBITS_15 = 0x08; // 10 = 1.5 stop bits/character
-const int SIO_WR4_STOPBITS_2 = 0x0c; // 11 = 2 stop bits/character
-const int SIO_WR4_PARITY_EVEN = 0x02; // D1 = Parity even/odd
-const int SIO_WR4_PARITY_ENABLE = 0x01; // D0 = Parity enable
+const int SIO_WR4_CLOCK_MODE_MASK = 0xc0; // D7-D6 = Clock mode
+const int SIO_WR4_CLOCK_MODE_x1 = 0x00; // 00 = x1 clock mode
+const int SIO_WR4_CLOCK_MODE_x16 = 0x40; // 01 = x16 clock mode
+const int SIO_WR4_CLOCK_MODE_x32 = 0x80; // 10 = x32 clock mode
+const int SIO_WR4_CLOCK_MODE_x64 = 0xc0; // 11 = x64 clock mode
+const int SIO_WR4_SYNC_MODE_MASK = 0x30; // D5-D4 = Sync mode
+const int SIO_WR4_SYNC_MODE_8BIT = 0x00; // 00 = 8 bit sync character
+const int SIO_WR4_SYNC_MODE_16BIT = 0x10; // 01 = 16 bit sync character
+const int SIO_WR4_SYNC_MODE_SDLC = 0x20; // 10 = SDLC mode (01111110 flag)
+const int SIO_WR4_SYNC_MODE_EXTERNAL = 0x30; // 11 = External sync mode
+const int SIO_WR4_STOPBITS_MASK = 0x0c; // D3-D2 = Stop bits
+const int SIO_WR4_STOPBITS_SYNC = 0x00; // 00 = Sync modes enable
+const int SIO_WR4_STOPBITS_1 = 0x04; // 01 = 1 stop bit/character
+const int SIO_WR4_STOPBITS_15 = 0x08; // 10 = 1.5 stop bits/character
+const int SIO_WR4_STOPBITS_2 = 0x0c; // 11 = 2 stop bits/character
+const int SIO_WR4_PARITY_EVEN = 0x02; // D1 = Parity even/odd
+const int SIO_WR4_PARITY_ENABLE = 0x01; // D0 = Parity enable
// SIO write register 5
-const int SIO_WR5_DTR = 0x80; // D7 = DTR
-const int SIO_WR5_TX_DATABITS_MASK = 0x60; // D6-D5 = Tx Data bits
-const int SIO_WR5_TX_DATABITS_5 = 0x00; // 00 = Tx 5 bits/character
-const int SIO_WR5_TX_DATABITS_7 = 0x20; // 01 = Tx 7 bits/character
-const int SIO_WR5_TX_DATABITS_6 = 0x40; // 10 = Tx 6 bits/character
-const int SIO_WR5_TX_DATABITS_8 = 0x60; // 11 = Tx 8 bits/character
-const int SIO_WR5_SEND_BREAK = 0x10; // D4 = Send break
-const int SIO_WR5_TX_ENABLE = 0x08; // D3 = Tx Enable
-const int SIO_WR5_CRC16_SDLC = 0x04; // D2 = CRC-16/SDLC
-const int SIO_WR5_RTS = 0x02; // D1 = RTS
-const int SIO_WR5_TX_CRC_ENABLE = 0x01; // D0 = Tx CRC enable
+const int SIO_WR5_DTR = 0x80; // D7 = DTR
+const int SIO_WR5_TX_DATABITS_MASK = 0x60; // D6-D5 = Tx Data bits
+const int SIO_WR5_TX_DATABITS_5 = 0x00; // 00 = Tx 5 bits/character
+const int SIO_WR5_TX_DATABITS_7 = 0x20; // 01 = Tx 7 bits/character
+const int SIO_WR5_TX_DATABITS_6 = 0x40; // 10 = Tx 6 bits/character
+const int SIO_WR5_TX_DATABITS_8 = 0x60; // 11 = Tx 8 bits/character
+const int SIO_WR5_SEND_BREAK = 0x10; // D4 = Send break
+const int SIO_WR5_TX_ENABLE = 0x08; // D3 = Tx Enable
+const int SIO_WR5_CRC16_SDLC = 0x04; // D2 = CRC-16/SDLC
+const int SIO_WR5_RTS = 0x02; // D1 = RTS
+const int SIO_WR5_TX_CRC_ENABLE = 0x01; // D0 = Tx CRC enable
// SIO write register 6
-const int SIO_WR6_SYNC_7_0_MASK = 0xff; // D7-D0 = Sync bits 7-0
+const int SIO_WR6_SYNC_7_0_MASK = 0xff; // D7-D0 = Sync bits 7-0
// SIO write register 7
-const int SIO_WR7_SYNC_15_8_MASK = 0xff; // D7-D0 = Sync bits 15-8
+const int SIO_WR7_SYNC_15_8_MASK = 0xff; // D7-D0 = Sync bits 15-8
// SIO read register 0
-const int SIO_RR0_BREAK_ABORT = 0x80; // D7 = Break/abort
-const int SIO_RR0_TX_UNDERRUN = 0x40; // D6 = Tx underrun/EOM
-const int SIO_RR0_CTS = 0x20; // D5 = CTS
-const int SIO_RR0_SYNC_HUNT = 0x10; // D4 = Sync/hunt
-const int SIO_RR0_DCD = 0x08; // D3 = DCD
-const int SIO_RR0_TX_BUFFER_EMPTY = 0x04; // D2 = Tx buffer empty
-const int SIO_RR0_INT_PENDING = 0x02; // D1 = int pending (CH-A only)
-const int SIO_RR0_RX_CHAR_AVAILABLE = 0x01; // D0 = Rx character available
+const int SIO_RR0_BREAK_ABORT = 0x80; // D7 = Break/abort
+const int SIO_RR0_TX_UNDERRUN = 0x40; // D6 = Tx underrun/EOM
+const int SIO_RR0_CTS = 0x20; // D5 = CTS
+const int SIO_RR0_SYNC_HUNT = 0x10; // D4 = Sync/hunt
+const int SIO_RR0_DCD = 0x08; // D3 = DCD
+const int SIO_RR0_TX_BUFFER_EMPTY = 0x04; // D2 = Tx buffer empty
+const int SIO_RR0_INT_PENDING = 0x02; // D1 = int pending (CH-A only)
+const int SIO_RR0_RX_CHAR_AVAILABLE = 0x01; // D0 = Rx character available
// SIO read register 1
-const int SIO_RR1_END_OF_FRAME = 0x80; // D7 = End of frame (SDLC)
-const int SIO_RR1_CRC_FRAMING_ERROR = 0x40; // D6 = CRC/Framing error
-const int SIO_RR1_RX_OVERRUN_ERROR = 0x20; // D5 = Rx overrun error
-const int SIO_RR1_PARITY_ERROR = 0x10; // D4 = Parity error
-const int SIO_RR1_IFIELD_BITS_MASK = 0x0e; // D3-D1 = I field bits
+const int SIO_RR1_END_OF_FRAME = 0x80; // D7 = End of frame (SDLC)
+const int SIO_RR1_CRC_FRAMING_ERROR = 0x40; // D6 = CRC/Framing error
+const int SIO_RR1_RX_OVERRUN_ERROR = 0x20; // D5 = Rx overrun error
+const int SIO_RR1_PARITY_ERROR = 0x10; // D4 = Parity error
+const int SIO_RR1_IFIELD_BITS_MASK = 0x0e; // D3-D1 = I field bits
// 100 = 0 in prev, 3 in 2nd prev
// 010 = 0 in prev, 4 in 2nd prev
// 110 = 0 in prev, 5 in 2nd prev
@@ -154,10 +154,10 @@ const int SIO_RR1_IFIELD_BITS_MASK = 0x0e; // D3-D1 = I field bits
// 011 = 0 in prev, 8 in 2nd prev
// 111 = 1 in prev, 8 in 2nd prev
// 000 = 2 in prev, 8 in 2nd prev
-const int SIO_RR1_ALL_SENT = 0x01; // D0 = All sent
+const int SIO_RR1_ALL_SENT = 0x01; // D0 = All sent
// SIO read register 2 (CH-B only)
-const int SIO_RR2_VECTOR_MASK = 0xff; // D7-D0 = Interrupt vector
+const int SIO_RR2_VECTOR_MASK = 0xff; // D7-D0 = Interrupt vector
const UINT8 z80sio_device::k_int_priority[] =
@@ -299,7 +299,7 @@ inline attotime z80sio_device::sio_channel::compute_time_per_character()
z80sio_device::z80sio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Z80SIO, "Zilog Z80 SIO", tag, owner, clock),
- device_z80daisy_interface(mconfig, *this)
+ device_z80daisy_interface(mconfig, *this)
{
for (int i = 0; i < 8; i++)
m_int_state[i] = 0;
@@ -455,13 +455,13 @@ void z80sio_device::z80daisy_irq_reti()
z80sio_device::sio_channel::sio_channel()
: m_device(NULL),
- m_index(0),
- m_inbuf(-1),
- m_outbuf(-1),
- m_int_on_next_rx(false),
- m_receive_timer(NULL),
- m_receive_inptr(0),
- m_receive_outptr(0)
+ m_index(0),
+ m_inbuf(-1),
+ m_outbuf(-1),
+ m_int_on_next_rx(false),
+ m_receive_timer(NULL),
+ m_receive_inptr(0),
+ m_receive_outptr(0)
{
memset(m_regs, 0, sizeof(m_regs));
memset(m_status, 0, sizeof(m_status));
diff --git a/src/emu/machine/z80sio.h b/src/emu/machine/z80sio.h
index bc2f0485997..e8ceee4a044 100644
--- a/src/emu/machine/z80sio.h
+++ b/src/emu/machine/z80sio.h
@@ -44,7 +44,7 @@ struct z80sio_interface
// ======================> z80sio_device
-class z80sio_device : public device_t,
+class z80sio_device : public device_t,
public device_z80daisy_interface,
public z80sio_interface
{
@@ -121,24 +121,24 @@ private:
void serial_callback();
public:
- UINT8 m_regs[8]; // 8 writeable registers
+ UINT8 m_regs[8]; // 8 writeable registers
private:
- z80sio_device *m_device; // pointer back to our device
- int m_index; // our channel index
- UINT8 m_status[4]; // 3 readable registers
- int m_inbuf; // input buffer
- int m_outbuf; // output buffer
- bool m_int_on_next_rx; // interrupt on next rx?
- emu_timer * m_receive_timer; // timer to clock data in
- UINT8 m_receive_buffer[16]; // buffer for incoming data
- UINT8 m_receive_inptr; // index of data coming in
- UINT8 m_receive_outptr; // index of data going out
+ z80sio_device *m_device; // pointer back to our device
+ int m_index; // our channel index
+ UINT8 m_status[4]; // 3 readable registers
+ int m_inbuf; // input buffer
+ int m_outbuf; // output buffer
+ bool m_int_on_next_rx; // interrupt on next rx?
+ emu_timer * m_receive_timer; // timer to clock data in
+ UINT8 m_receive_buffer[16]; // buffer for incoming data
+ UINT8 m_receive_inptr; // index of data coming in
+ UINT8 m_receive_outptr; // index of data going out
};
// internal state
- sio_channel m_channel[2]; // 2 channels
- UINT8 m_int_state[8]; // interrupt states
+ sio_channel m_channel[2]; // 2 channels
+ UINT8 m_int_state[8]; // interrupt states
// callbacks
devcb_resolved_write_line m_irq;
diff --git a/src/emu/machine/z80sti.c b/src/emu/machine/z80sti.c
index 33647b1748a..90b10358912 100644
--- a/src/emu/machine/z80sti.c
+++ b/src/emu/machine/z80sti.c
@@ -107,17 +107,17 @@ enum
};
// timer C/D control register
-const int Z80STI_TCDC_TARS = 0x80;
-const int Z80STI_TCDC_TBRS = 0x08;
+const int Z80STI_TCDC_TARS = 0x80;
+const int Z80STI_TCDC_TBRS = 0x08;
// interrupt vector register
-const int Z80STI_PVR_ISE = 0x08;
-const int Z80STI_PVR_VR4 = 0x10;
+const int Z80STI_PVR_ISE = 0x08;
+const int Z80STI_PVR_VR4 = 0x10;
// general purpose I/O interrupt levels
static const int INT_LEVEL_GPIP[] =
{
- Z80STI_IR_P0, Z80STI_IR_P1, Z80STI_IR_P2, Z80STI_IR_P3, Z80STI_IR_P4, Z80STI_IR_P5, Z80STI_IR_P6, Z80STI_IR_P7
+ Z80STI_IR_P0, Z80STI_IR_P1, Z80STI_IR_P2, Z80STI_IR_P3, Z80STI_IR_P4, Z80STI_IR_P5, Z80STI_IR_P6, Z80STI_IR_P7
};
// timer interrupt levels
@@ -148,13 +148,13 @@ static const int PRESCALER[] = { 0, 4, 10, 16, 50, 64, 100, 200 };
z80sti_device::z80sti_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Z80STI, "Mostek MK3801", tag, owner, clock),
- device_z80daisy_interface(mconfig, *this),
- m_gpip(0),
- m_aer(0),
- m_ier(0),
- m_ipr(0),
- m_isr(0),
- m_imr(0)
+ device_z80daisy_interface(mconfig, *this),
+ m_gpip(0),
+ m_aer(0),
+ m_ier(0),
+ m_ipr(0),
+ m_isr(0),
+ m_imr(0)
{
for (int i = 0; i < 16; i++)
{
@@ -436,32 +436,32 @@ UINT8 z80sti_device::read(offs_t offset)
case Z80STI_REGISTER_IR:
switch (m_pvr & 0x07)
{
- case Z80STI_REGISTER_IR_SCR: return m_scr;
- case Z80STI_REGISTER_IR_TDDR: return m_tmc[TIMER_D];
- case Z80STI_REGISTER_IR_TCDR: return m_tmc[TIMER_C];
- case Z80STI_REGISTER_IR_AER: return m_aer;
- case Z80STI_REGISTER_IR_IERB: return m_ier & 0xff;
- case Z80STI_REGISTER_IR_IERA: return m_ier >> 8;
- case Z80STI_REGISTER_IR_DDR: return m_ddr;
- case Z80STI_REGISTER_IR_TCDC: return m_tcdc;
+ case Z80STI_REGISTER_IR_SCR: return m_scr;
+ case Z80STI_REGISTER_IR_TDDR: return m_tmc[TIMER_D];
+ case Z80STI_REGISTER_IR_TCDR: return m_tmc[TIMER_C];
+ case Z80STI_REGISTER_IR_AER: return m_aer;
+ case Z80STI_REGISTER_IR_IERB: return m_ier & 0xff;
+ case Z80STI_REGISTER_IR_IERA: return m_ier >> 8;
+ case Z80STI_REGISTER_IR_DDR: return m_ddr;
+ case Z80STI_REGISTER_IR_TCDC: return m_tcdc;
}
break;
- case Z80STI_REGISTER_GPIP: m_gpip = (m_in_gpio_func(0) & ~m_ddr) | (m_gpip & m_ddr); return m_gpip;
- case Z80STI_REGISTER_IPRB: return m_ipr & 0xff;
- case Z80STI_REGISTER_IPRA: return m_ipr >> 8;
- case Z80STI_REGISTER_ISRB: return m_isr & 0xff;
- case Z80STI_REGISTER_ISRA: return m_isr >> 8;
- case Z80STI_REGISTER_IMRB: return m_imr & 0xff;
- case Z80STI_REGISTER_IMRA: return m_imr >> 8;
- case Z80STI_REGISTER_PVR: return m_pvr;
- case Z80STI_REGISTER_TABC: return m_tabc;
- case Z80STI_REGISTER_TBDR: return m_tmc[TIMER_B];
- case Z80STI_REGISTER_TADR: return m_tmc[TIMER_A];
- case Z80STI_REGISTER_UCR: return m_ucr;
- case Z80STI_REGISTER_RSR: return m_rsr;
- case Z80STI_REGISTER_TSR: return m_tsr;
- case Z80STI_REGISTER_UDR: return m_udr;
+ case Z80STI_REGISTER_GPIP: m_gpip = (m_in_gpio_func(0) & ~m_ddr) | (m_gpip & m_ddr); return m_gpip;
+ case Z80STI_REGISTER_IPRB: return m_ipr & 0xff;
+ case Z80STI_REGISTER_IPRA: return m_ipr >> 8;
+ case Z80STI_REGISTER_ISRB: return m_isr & 0xff;
+ case Z80STI_REGISTER_ISRA: return m_isr >> 8;
+ case Z80STI_REGISTER_IMRB: return m_imr & 0xff;
+ case Z80STI_REGISTER_IMRA: return m_imr >> 8;
+ case Z80STI_REGISTER_PVR: return m_pvr;
+ case Z80STI_REGISTER_TABC: return m_tabc;
+ case Z80STI_REGISTER_TBDR: return m_tmc[TIMER_B];
+ case Z80STI_REGISTER_TADR: return m_tmc[TIMER_A];
+ case Z80STI_REGISTER_UCR: return m_ucr;
+ case Z80STI_REGISTER_RSR: return m_rsr;
+ case Z80STI_REGISTER_TSR: return m_tsr;
+ case Z80STI_REGISTER_UDR: return m_udr;
}
return 0;
@@ -654,21 +654,21 @@ void z80sti_device::write(offs_t offset, UINT8 data)
m_tdr[TIMER_A] = data;
break;
#if 0
- case Z80STI_REGISTER_UCR:
- m_ucr = data;
- break;
+ case Z80STI_REGISTER_UCR:
+ m_ucr = data;
+ break;
- case Z80STI_REGISTER_RSR:
- m_rsr = data;
- break;
+ case Z80STI_REGISTER_RSR:
+ m_rsr = data;
+ break;
- case Z80STI_REGISTER_TSR:
- m_tsr = data;
- break;
+ case Z80STI_REGISTER_TSR:
+ m_tsr = data;
+ break;
- case Z80STI_REGISTER_UDR:
- m_udr = data;
- break;
+ case Z80STI_REGISTER_UDR:
+ m_udr = data;
+ break;
#endif
default:
LOG(("Z80STI '%s' Unsupported Register %x\n", tag(), offset & 0x0f));
diff --git a/src/emu/machine/z80sti.h b/src/emu/machine/z80sti.h
index 8d8f369f976..c71c3ab2dbb 100644
--- a/src/emu/machine/z80sti.h
+++ b/src/emu/machine/z80sti.h
@@ -41,7 +41,7 @@
//**************************************************************************
#define MCFG_Z80STI_ADD(_tag, _clock, _config) \
- MCFG_DEVICE_ADD((_tag), Z80STI, _clock) \
+ MCFG_DEVICE_ADD((_tag), Z80STI, _clock) \
MCFG_DEVICE_CONFIG(_config)
#define Z80STI_INTERFACE(name) const z80sti_interface (name) =
@@ -57,42 +57,42 @@
struct z80sti_interface
{
- int m_rx_clock; // serial receive clock
- int m_tx_clock; // serial transmit clock
+ int m_rx_clock; // serial receive clock
+ int m_tx_clock; // serial transmit clock
// this gets called on each change of the _INT pin (pin 17)
- devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_int_cb;
// this is called on each read of the GPIO pins
- devcb_read8 m_in_gpio_cb;
+ devcb_read8 m_in_gpio_cb;
// this is called on each write of the GPIO pins
- devcb_write8 m_out_gpio_cb;
+ devcb_write8 m_out_gpio_cb;
// this gets called for each read of the SI pin (pin 38)
- devcb_read_line m_in_si_cb;
+ devcb_read_line m_in_si_cb;
// this gets called for each change of the SO pin (pin 37)
- devcb_write_line m_out_so_cb;
+ devcb_write_line m_out_so_cb;
// this gets called for each change of the TAO pin (pin 1)
- devcb_write_line m_out_tao_cb;
+ devcb_write_line m_out_tao_cb;
// this gets called for each change of the TBO pin (pin 2)
- devcb_write_line m_out_tbo_cb;
+ devcb_write_line m_out_tbo_cb;
// this gets called for each change of the TCO pin (pin 3)
- devcb_write_line m_out_tco_cb;
+ devcb_write_line m_out_tco_cb;
// this gets called for each change of the TDO pin (pin 4)
- devcb_write_line m_out_tdo_cb;
+ devcb_write_line m_out_tdo_cb;
};
// ======================> z80sti_device
-class z80sti_device : public device_t,
+class z80sti_device : public device_t,
public device_z80daisy_interface,
public z80sti_interface
{
@@ -132,44 +132,44 @@ private:
static TIMER_CALLBACK( static_timer_count ) { reinterpret_cast<z80sti_device *>(ptr)->timer_count(param); }
// device callbacks
- devcb_resolved_read8 m_in_gpio_func;
- devcb_resolved_write8 m_out_gpio_func;
- devcb_resolved_read_line m_in_si_func;
- devcb_resolved_write_line m_out_so_func;
- devcb_resolved_write_line m_out_timer_func[4];
- devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_read8 m_in_gpio_func;
+ devcb_resolved_write8 m_out_gpio_func;
+ devcb_resolved_read_line m_in_si_func;
+ devcb_resolved_write_line m_out_so_func;
+ devcb_resolved_write_line m_out_timer_func[4];
+ devcb_resolved_write_line m_out_int_func;
// I/O state
- UINT8 m_gpip; // general purpose I/O register
- UINT8 m_aer; // active edge register
- UINT8 m_ddr; // data direction register
+ UINT8 m_gpip; // general purpose I/O register
+ UINT8 m_aer; // active edge register
+ UINT8 m_ddr; // data direction register
// interrupt state
- UINT16 m_ier; // interrupt enable register
- UINT16 m_ipr; // interrupt pending register
- UINT16 m_isr; // interrupt in-service register
- UINT16 m_imr; // interrupt mask register
- UINT8 m_pvr; // interrupt vector register
- int m_int_state[16]; // interrupt state
+ UINT16 m_ier; // interrupt enable register
+ UINT16 m_ipr; // interrupt pending register
+ UINT16 m_isr; // interrupt in-service register
+ UINT16 m_imr; // interrupt mask register
+ UINT8 m_pvr; // interrupt vector register
+ int m_int_state[16]; // interrupt state
// timer state
- UINT8 m_tabc; // timer A/B control register
- UINT8 m_tcdc; // timer C/D control register
- UINT8 m_tdr[4]; // timer data registers
- UINT8 m_tmc[4]; // timer main counters
- int m_to[4]; // timer out latch
+ UINT8 m_tabc; // timer A/B control register
+ UINT8 m_tcdc; // timer C/D control register
+ UINT8 m_tdr[4]; // timer data registers
+ UINT8 m_tmc[4]; // timer main counters
+ int m_to[4]; // timer out latch
// serial state
- UINT8 m_scr; // synchronous character register
- UINT8 m_ucr; // USART control register
- UINT8 m_tsr; // transmitter status register
- UINT8 m_rsr; // receiver status register
- UINT8 m_udr; // USART data register
+ UINT8 m_scr; // synchronous character register
+ UINT8 m_ucr; // USART control register
+ UINT8 m_tsr; // transmitter status register
+ UINT8 m_rsr; // receiver status register
+ UINT8 m_udr; // USART data register
// timers
- emu_timer *m_timer[4]; // counter timers
- emu_timer *m_rx_timer; // serial receive timer
- emu_timer *m_tx_timer; // serial transmit timer
+ emu_timer *m_timer[4]; // counter timers
+ emu_timer *m_rx_timer; // serial receive timer
+ emu_timer *m_tx_timer; // serial transmit timer
};
diff --git a/src/emu/machine/z8536.c b/src/emu/machine/z8536.c
index 81fa02b8166..d58070164e3 100644
--- a/src/emu/machine/z8536.c
+++ b/src/emu/machine/z8536.c
@@ -205,72 +205,72 @@ static const char *CTMS_DCS[] = { "Pulse", "One-shot", "Square Wave", "Do not us
// master interrupt control register
-#define MICR_RESET 0x01 // reset
-#define MICR_RJA 0x02 // right justified address
-#define MICR_CT_VIS 0x04 // counter/timer vector includes status
-#define MICR_PB_VIS 0x08 // port B vector includes status
-#define MICR_PA_VIS 0x10 // port A vector includes status
-#define MICR_NV 0x20 // no vector
-#define MICR_DLC 0x40 // disable lower chain
-#define MICR_MIE 0x80 // master interrupt enable
+#define MICR_RESET 0x01 // reset
+#define MICR_RJA 0x02 // right justified address
+#define MICR_CT_VIS 0x04 // counter/timer vector includes status
+#define MICR_PB_VIS 0x08 // port B vector includes status
+#define MICR_PA_VIS 0x10 // port A vector includes status
+#define MICR_NV 0x20 // no vector
+#define MICR_DLC 0x40 // disable lower chain
+#define MICR_MIE 0x80 // master interrupt enable
// master configuration control register
-#define MCCR_LC_MASK 0x03 // counter/timer link controls
-#define MCCR_PAE 0x04 // port A enable
-#define MCCR_PLC 0x08 // port link control
-#define MCCR_PCE_CT3E 0x10 // port C and counter/timer 3 enable
-#define MCCR_CT2E 0x20 // counter/timer 2 enable
-#define MCCR_CT1E 0x40 // counter/timer 1 enable
-#define MCCR_PBE 0x80 // port B enable
+#define MCCR_LC_MASK 0x03 // counter/timer link controls
+#define MCCR_PAE 0x04 // port A enable
+#define MCCR_PLC 0x08 // port link control
+#define MCCR_PCE_CT3E 0x10 // port C and counter/timer 3 enable
+#define MCCR_CT2E 0x20 // counter/timer 2 enable
+#define MCCR_CT1E 0x40 // counter/timer 1 enable
+#define MCCR_PBE 0x80 // port B enable
// port mode specification registers
-#define PMS_LPM 0x01 // latch on pattern match
-#define PMS_DTE 0x01 // deskew timer enable
-#define PMS_PMS_MASK 0x06 // pattern mode specification
-#define PMS_IMO 0x08 // interrupt on match only
-#define PMS_SB 0x10 // single buffer
-#define PMS_ITB 0x20 // interrupt on two bytes
-#define PMS_PTS_MASK 0xc0 // port type select
+#define PMS_LPM 0x01 // latch on pattern match
+#define PMS_DTE 0x01 // deskew timer enable
+#define PMS_PMS_MASK 0x06 // pattern mode specification
+#define PMS_IMO 0x08 // interrupt on match only
+#define PMS_SB 0x10 // single buffer
+#define PMS_ITB 0x20 // interrupt on two bytes
+#define PMS_PTS_MASK 0xc0 // port type select
// port handshake specification registers
-#define PHS_DTS_MASK 0x07 // deskew time specification
-#define PHS_RWS_MASK 0x38 // request/wait specification
-#define PHS_HTS_MASK 0xc0 // handshake type specification
+#define PHS_DTS_MASK 0x07 // deskew time specification
+#define PHS_RWS_MASK 0x38 // request/wait specification
+#define PHS_HTS_MASK 0xc0 // handshake type specification
// port command and status registers
-#define PCS_IOE 0x01 // interrupt on error
-#define PCS_PMF 0x02 // pattern match flag (read only)
-#define PCS_IRF 0x04 // input register full (read only)
-#define PCS_ORE 0x08 // output register empty (read only)
-#define PCS_ERR 0x10 // interrupt error (read only)
-#define PCS_IP 0x20 // interrupt pending
-#define PCS_IE 0x40 // interrupt enable
-#define PCS_IUS 0x80 // interrupt under service
+#define PCS_IOE 0x01 // interrupt on error
+#define PCS_PMF 0x02 // pattern match flag (read only)
+#define PCS_IRF 0x04 // input register full (read only)
+#define PCS_ORE 0x08 // output register empty (read only)
+#define PCS_ERR 0x10 // interrupt error (read only)
+#define PCS_IP 0x20 // interrupt pending
+#define PCS_IE 0x40 // interrupt enable
+#define PCS_IUS 0x80 // interrupt under service
// counter/timer mode specification registers
-#define CTMS_DCS_MASK 0x03 // output duty cycle
-#define CTMS_REB 0x04 // retrigger enable bit
-#define CTMS_EDE 0x08 // external gate enable
-#define CTMS_ETE 0x10 // external trigger enable
-#define CTMS_ECE 0x20 // external count enable
-#define CTMS_EOE 0x40 // external output enable
-#define CTMS_CSC 0x80 // continuous/single cycle
+#define CTMS_DCS_MASK 0x03 // output duty cycle
+#define CTMS_REB 0x04 // retrigger enable bit
+#define CTMS_EDE 0x08 // external gate enable
+#define CTMS_ETE 0x10 // external trigger enable
+#define CTMS_ECE 0x20 // external count enable
+#define CTMS_EOE 0x40 // external output enable
+#define CTMS_CSC 0x80 // continuous/single cycle
// counter/timer command and status registers
-#define CTCS_CIP 0x01 // count in progress (read only)
-#define CTCS_TCB 0x02 // trigger command bit (write only - read returns 0)
-#define CTCS_GCB 0x04 // gate command bit
-#define CTCS_RCC 0x08 // read counter control (read/set only - cleared by reading CCR LSB)
-#define CTCS_ERR 0x10 // interrupt error (read only)
-#define CTCS_IP 0x20 // interrupt pending
-#define CTCS_IE 0x40 // interrupt enable
-#define CTCS_IUS 0x80 // interrupt under service
+#define CTCS_CIP 0x01 // count in progress (read only)
+#define CTCS_TCB 0x02 // trigger command bit (write only - read returns 0)
+#define CTCS_GCB 0x04 // gate command bit
+#define CTCS_RCC 0x08 // read counter control (read/set only - cleared by reading CCR LSB)
+#define CTCS_ERR 0x10 // interrupt error (read only)
+#define CTCS_IP 0x20 // interrupt pending
+#define CTCS_IE 0x40 // interrupt enable
+#define CTCS_IUS 0x80 // interrupt under service
@@ -307,7 +307,7 @@ inline void z8536_device::get_interrupt_vector()
if (((m_register[PORT_A_MODE_SPECIFICATION] & PMS_PMS_MASK) >> 1) == PMS_OR_PEV)
{
- if (m_match[PORT_A] & 0x80) vector |= 7 << 1;
+ if (m_match[PORT_A] & 0x80) vector |= 7 << 1;
else if (m_match[PORT_A] & 0x40) vector |= 6 << 1;
else if (m_match[PORT_A] & 0x20) vector |= 5 << 1;
else if (m_match[PORT_A] & 0x10) vector |= 4 << 1;
@@ -341,7 +341,7 @@ inline void z8536_device::get_interrupt_vector()
if (((m_register[PORT_B_MODE_SPECIFICATION] & PMS_PMS_MASK) >> 1) == PMS_OR_PEV)
{
- if (m_match[PORT_B] & 0x80) vector |= 7 << 1;
+ if (m_match[PORT_B] & 0x80) vector |= 7 << 1;
else if (m_match[PORT_B] & 0x40) vector |= 6 << 1;
else if (m_match[PORT_B] & 0x20) vector |= 5 << 1;
else if (m_match[PORT_B] & 0x10) vector |= 4 << 1;
@@ -591,13 +591,13 @@ inline void z8536_device::write_register(offs_t offset, UINT8 data)
switch (data >> 5)
{
- case IC_CLEAR_IP_IUS: m_register[offset] &= ~(PCS_IP | PCS_IUS); if (LOG) logerror("%s Z8536 '%s' Port %c Clear IP/IUS\n", machine().describe_context(), tag(), port); break;
- case IC_SET_IUS: m_register[offset] |= PCS_IUS; if (LOG) logerror("%s Z8536 '%s' Port %c Set IUS\n", machine().describe_context(), tag(), port); break;
- case IC_CLEAR_IUS: m_register[offset] &= ~PCS_IUS; if (LOG) logerror("%s Z8536 '%s' Port %c Clear IUS\n", machine().describe_context(), tag(), port); break;
- case IC_SET_IP: m_register[offset] |= PCS_IP; if (LOG) logerror("%s Z8536 '%s' Port %c Set IP\n", machine().describe_context(), tag(), port); break;
- case IC_CLEAR_IP: m_register[offset] &= ~PCS_IP; if (LOG) logerror("%s Z8536 '%s' Port %c Clear IP\n", machine().describe_context(), tag(), port); break;
- case IC_SET_IE: m_register[offset] |= PCS_IE; if (LOG) logerror("%s Z8536 '%s' Port %c Set IE\n", machine().describe_context(), tag(), port); break;
- case IC_CLEAR_IE: m_register[offset] &= ~PCS_IE; if (LOG) logerror("%s Z8536 '%s' Port %c Clear IE\n", machine().describe_context(), tag(), port); break;
+ case IC_CLEAR_IP_IUS: m_register[offset] &= ~(PCS_IP | PCS_IUS); if (LOG) logerror("%s Z8536 '%s' Port %c Clear IP/IUS\n", machine().describe_context(), tag(), port); break;
+ case IC_SET_IUS: m_register[offset] |= PCS_IUS; if (LOG) logerror("%s Z8536 '%s' Port %c Set IUS\n", machine().describe_context(), tag(), port); break;
+ case IC_CLEAR_IUS: m_register[offset] &= ~PCS_IUS; if (LOG) logerror("%s Z8536 '%s' Port %c Clear IUS\n", machine().describe_context(), tag(), port); break;
+ case IC_SET_IP: m_register[offset] |= PCS_IP; if (LOG) logerror("%s Z8536 '%s' Port %c Set IP\n", machine().describe_context(), tag(), port); break;
+ case IC_CLEAR_IP: m_register[offset] &= ~PCS_IP; if (LOG) logerror("%s Z8536 '%s' Port %c Clear IP\n", machine().describe_context(), tag(), port); break;
+ case IC_SET_IE: m_register[offset] |= PCS_IE; if (LOG) logerror("%s Z8536 '%s' Port %c Set IE\n", machine().describe_context(), tag(), port); break;
+ case IC_CLEAR_IE: m_register[offset] &= ~PCS_IE; if (LOG) logerror("%s Z8536 '%s' Port %c Clear IE\n", machine().describe_context(), tag(), port); break;
}
m_register[offset] = (m_register[offset] & ~PCS_IOE) | (data & PCS_IOE);
@@ -622,13 +622,13 @@ inline void z8536_device::write_register(offs_t offset, UINT8 data)
switch (data >> 5)
{
- case IC_CLEAR_IP_IUS: m_register[offset] &= ~(CTCS_IP | CTCS_IUS);if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IP/IUS\n", machine().describe_context(), tag(), counter + 1); break;
- case IC_SET_IUS: m_register[offset] |= CTCS_IUS; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Set IUS\n", machine().describe_context(), tag(), counter + 1); break;
- case IC_CLEAR_IUS: m_register[offset] &= ~CTCS_IUS; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IUS\n", machine().describe_context(), tag(), counter + 1); break;
- case IC_SET_IP: m_register[offset] |= CTCS_IP; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Set IP\n", machine().describe_context(), tag(), counter + 1); break;
- case IC_CLEAR_IP: m_register[offset] &= ~CTCS_IP; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IP\n", machine().describe_context(), tag(), counter + 1); break;
- case IC_SET_IE: m_register[offset] |= CTCS_IE; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Set IE\n", machine().describe_context(), tag(), counter + 1); break;
- case IC_CLEAR_IE: m_register[offset] &= ~CTCS_IE; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IE\n", machine().describe_context(), tag(), counter + 1); break;
+ case IC_CLEAR_IP_IUS: m_register[offset] &= ~(CTCS_IP | CTCS_IUS);if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IP/IUS\n", machine().describe_context(), tag(), counter + 1); break;
+ case IC_SET_IUS: m_register[offset] |= CTCS_IUS; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Set IUS\n", machine().describe_context(), tag(), counter + 1); break;
+ case IC_CLEAR_IUS: m_register[offset] &= ~CTCS_IUS; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IUS\n", machine().describe_context(), tag(), counter + 1); break;
+ case IC_SET_IP: m_register[offset] |= CTCS_IP; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Set IP\n", machine().describe_context(), tag(), counter + 1); break;
+ case IC_CLEAR_IP: m_register[offset] &= ~CTCS_IP; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IP\n", machine().describe_context(), tag(), counter + 1); break;
+ case IC_SET_IE: m_register[offset] |= CTCS_IE; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Set IE\n", machine().describe_context(), tag(), counter + 1); break;
+ case IC_CLEAR_IE: m_register[offset] &= ~CTCS_IE; if (LOG) logerror("%s Z8536 '%s' Counter/Timer %u Clear IE\n", machine().describe_context(), tag(), counter + 1); break;
}
// gate command bit
@@ -1016,9 +1016,9 @@ inline void z8536_device::external_port_w(int port, int bit, int state)
//-------------------------------------------------
z8536_device::z8536_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, Z8536, "Zilog Z8536", tag, owner, clock),
- device_z80daisy_interface(mconfig, *this),
- m_int(CLEAR_LINE)
+ : device_t(mconfig, Z8536, "Zilog Z8536", tag, owner, clock),
+ device_z80daisy_interface(mconfig, *this),
+ m_int(CLEAR_LINE)
{
}
@@ -1109,17 +1109,17 @@ void z8536_device::device_reset()
void z8536_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- if (counter_enabled(TIMER_1) && !counter_external_count(TIMER_1))
+ if (counter_enabled(TIMER_1) && !counter_external_count(TIMER_1))
{
count(TIMER_1);
}
- if (counter_enabled(TIMER_2) && !counter_external_count(TIMER_2))
+ if (counter_enabled(TIMER_2) && !counter_external_count(TIMER_2))
{
count(TIMER_2);
}
- if (counter_enabled(TIMER_3) && !counter_external_count(TIMER_3))
+ if (counter_enabled(TIMER_3) && !counter_external_count(TIMER_3))
{
count(TIMER_3);
}
diff --git a/src/emu/machine/z8536.h b/src/emu/machine/z8536.h
index 4724f1fc882..97a3df953ac 100644
--- a/src/emu/machine/z8536.h
+++ b/src/emu/machine/z8536.h
@@ -68,31 +68,31 @@
struct z8536_interface
{
- devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_int_cb;
- devcb_read8 m_in_pa_cb;
- devcb_write8 m_out_pa_cb;
+ devcb_read8 m_in_pa_cb;
+ devcb_write8 m_out_pa_cb;
- devcb_read8 m_in_pb_cb;
- devcb_write8 m_out_pb_cb;
+ devcb_read8 m_in_pb_cb;
+ devcb_write8 m_out_pb_cb;
- devcb_read8 m_in_pc_cb;
- devcb_write8 m_out_pc_cb;
+ devcb_read8 m_in_pc_cb;
+ devcb_write8 m_out_pc_cb;
};
// ======================> z8536_device
class z8536_device : public device_t,
- public device_z80daisy_interface,
- public z8536_interface
+ public device_z80daisy_interface,
+ public z8536_interface
{
public:
- // construction/destruction
- z8536_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ z8536_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
int intack_r();
@@ -120,10 +120,10 @@ public:
DECLARE_WRITE_LINE_MEMBER( pc3_w );
protected:
- // device-level overrides
- virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_config_complete();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_z80daisy_interface overrides
@@ -160,16 +160,16 @@ private:
inline void match_pattern(int port);
inline void external_port_w(int port, int bit, int state);
- devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_int_func;
- devcb_resolved_read8 m_in_pa_func;
- devcb_resolved_write8 m_out_pa_func;
+ devcb_resolved_read8 m_in_pa_func;
+ devcb_resolved_write8 m_out_pa_func;
- devcb_resolved_read8 m_in_pb_func;
- devcb_resolved_write8 m_out_pb_func;
+ devcb_resolved_read8 m_in_pb_func;
+ devcb_resolved_write8 m_out_pb_func;
- devcb_resolved_read8 m_in_pc_func;
- devcb_resolved_write8 m_out_pc_func;
+ devcb_resolved_read8 m_in_pc_func;
+ devcb_resolved_write8 m_out_pc_func;
// interrupt state
int m_int;
diff --git a/src/emu/mame.c b/src/emu/mame.c
index e4a1cc09864..bf6961a3b26 100644
--- a/src/emu/mame.c
+++ b/src/emu/mame.c
@@ -103,16 +103,16 @@ static running_machine *global_machine;
/* output channels */
static output_delegate output_cb[OUTPUT_CHANNEL_COUNT] =
{
- output_delegate(FUNC(mame_file_output_callback), stderr), // OUTPUT_CHANNEL_ERROR
- output_delegate(FUNC(mame_file_output_callback), stderr), // OUTPUT_CHANNEL_WARNING
- output_delegate(FUNC(mame_file_output_callback), stdout), // OUTPUT_CHANNEL_INFO
+ output_delegate(FUNC(mame_file_output_callback), stderr), // OUTPUT_CHANNEL_ERROR
+ output_delegate(FUNC(mame_file_output_callback), stderr), // OUTPUT_CHANNEL_WARNING
+ output_delegate(FUNC(mame_file_output_callback), stdout), // OUTPUT_CHANNEL_INFO
#ifdef MAME_DEBUG
- output_delegate(FUNC(mame_file_output_callback), stdout), // OUTPUT_CHANNEL_DEBUG
+ output_delegate(FUNC(mame_file_output_callback), stdout), // OUTPUT_CHANNEL_DEBUG
#else
- output_delegate(FUNC(mame_null_output_callback), stdout), // OUTPUT_CHANNEL_DEBUG
+ output_delegate(FUNC(mame_null_output_callback), stdout), // OUTPUT_CHANNEL_DEBUG
#endif
- output_delegate(FUNC(mame_file_output_callback), stdout), // OUTPUT_CHANNEL_VERBOSE
- output_delegate(FUNC(mame_file_output_callback), stdout) // OUTPUT_CHANNEL_LOG
+ output_delegate(FUNC(mame_file_output_callback), stdout), // OUTPUT_CHANNEL_VERBOSE
+ output_delegate(FUNC(mame_file_output_callback), stdout) // OUTPUT_CHANNEL_LOG
};
@@ -409,4 +409,3 @@ void CLIB_DECL vlogerror(const char *format, va_list arg)
if (global_machine != NULL)
global_machine->vlogerror(format, arg);
}
-
diff --git a/src/emu/mame.h b/src/emu/mame.h
index 2be41e6c1db..72bccaf9aef 100644
--- a/src/emu/mame.h
+++ b/src/emu/mame.h
@@ -29,16 +29,16 @@
// return values from run_game
enum
{
- MAMERR_NONE = 0, /* no error */
- MAMERR_FAILED_VALIDITY = 1, /* failed validity checks */
- MAMERR_MISSING_FILES = 2, /* missing files */
- MAMERR_FATALERROR = 3, /* some other fatal error */
- MAMERR_DEVICE = 4, /* device initialization error (MESS-specific) */
- MAMERR_NO_SUCH_GAME = 5, /* game was specified but doesn't exist */
- MAMERR_INVALID_CONFIG = 6, /* some sort of error in configuration */
- MAMERR_IDENT_NONROMS = 7, /* identified all non-ROM files */
- MAMERR_IDENT_PARTIAL = 8, /* identified some files but not all */
- MAMERR_IDENT_NONE = 9 /* identified no files */
+ MAMERR_NONE = 0, /* no error */
+ MAMERR_FAILED_VALIDITY = 1, /* failed validity checks */
+ MAMERR_MISSING_FILES = 2, /* missing files */
+ MAMERR_FATALERROR = 3, /* some other fatal error */
+ MAMERR_DEVICE = 4, /* device initialization error (MESS-specific) */
+ MAMERR_NO_SUCH_GAME = 5, /* game was specified but doesn't exist */
+ MAMERR_INVALID_CONFIG = 6, /* some sort of error in configuration */
+ MAMERR_IDENT_NONROMS = 7, /* identified all non-ROM files */
+ MAMERR_IDENT_PARTIAL = 8, /* identified some files but not all */
+ MAMERR_IDENT_NONE = 9 /* identified no files */
};
@@ -132,4 +132,4 @@ void CLIB_DECL logerror(const char *format,...) ATTR_PRINTF(1,2);
void CLIB_DECL vlogerror(const char *format, va_list arg);
-#endif /* __MAME_H__ */
+#endif /* __MAME_H__ */
diff --git a/src/emu/mconfig.c b/src/emu/mconfig.c
index c04e663b6da..06733836c96 100644
--- a/src/emu/mconfig.c
+++ b/src/emu/mconfig.c
@@ -52,17 +52,17 @@
machine_config::machine_config(const game_driver &gamedrv, emu_options &options)
: m_minimum_quantum(attotime::zero),
- m_watchdog_vblank_count(0),
- m_watchdog_time(attotime::zero),
- m_nvram_handler(NULL),
- m_memcard_handler(NULL),
- m_video_attributes(0),
- m_gfxdecodeinfo(NULL),
- m_total_colors(0),
- m_default_layout(NULL),
- m_gamedrv(gamedrv),
- m_options(options),
- m_root_device(NULL)
+ m_watchdog_vblank_count(0),
+ m_watchdog_time(attotime::zero),
+ m_nvram_handler(NULL),
+ m_memcard_handler(NULL),
+ m_video_attributes(0),
+ m_gfxdecodeinfo(NULL),
+ m_total_colors(0),
+ m_default_layout(NULL),
+ m_gamedrv(gamedrv),
+ m_options(options),
+ m_root_device(NULL)
{
// construct the config
(*gamedrv.machine_config)(*this, NULL);
@@ -70,7 +70,7 @@ machine_config::machine_config(const game_driver &gamedrv, emu_options &options)
bool is_selected_driver = strcmp(gamedrv.name,options.system_name())==0;
// intialize slot devices - make sure that any required devices have been allocated
slot_interface_iterator slotiter(root_device());
- for (device_slot_interface *slot = slotiter.first(); slot != NULL; slot = slotiter.next())
+ for (device_slot_interface *slot = slotiter.first(); slot != NULL; slot = slotiter.next())
{
const slot_interface *intf = slot->get_slot_interfaces();
if (intf != NULL)
@@ -171,7 +171,7 @@ device_t *machine_config::device_add(device_t *owner, const char *tag, device_ty
break;
if (!curdevice)
throw emu_fatalerror("Could not find %s when looking up path for device %s\n",
- part.cstr(), orig_tag);
+ part.cstr(), orig_tag);
owner = curdevice;
tag = next+1;
}
diff --git a/src/emu/mconfig.h b/src/emu/mconfig.h
index 9ee694be573..9c3e1f9e264 100644
--- a/src/emu/mconfig.h
+++ b/src/emu/mconfig.h
@@ -52,46 +52,46 @@
//**************************************************************************
// by convention, tags should all lowercase and between 1-15 characters
-#define MIN_TAG_LENGTH 1
-#define MAX_TAG_LENGTH 15
+#define MIN_TAG_LENGTH 1
+#define MAX_TAG_LENGTH 15
// ----- flags for video_attributes -----
// should VIDEO_UPDATE by called at the start of VBLANK or at the end?
-#define VIDEO_UPDATE_BEFORE_VBLANK 0x0000
-#define VIDEO_UPDATE_AFTER_VBLANK 0x0004
+#define VIDEO_UPDATE_BEFORE_VBLANK 0x0000
+#define VIDEO_UPDATE_AFTER_VBLANK 0x0004
// indicates VIDEO_UPDATE will add container bits its
-#define VIDEO_SELF_RENDER 0x0008
+#define VIDEO_SELF_RENDER 0x0008
// automatically extend the palette creating a darker copy for shadows
-#define VIDEO_HAS_SHADOWS 0x0010
+#define VIDEO_HAS_SHADOWS 0x0010
// automatically extend the palette creating a brighter copy for highlights
-#define VIDEO_HAS_HIGHLIGHTS 0x0020
+#define VIDEO_HAS_HIGHLIGHTS 0x0020
// force VIDEO_UPDATE to be called even for skipped frames
-#define VIDEO_ALWAYS_UPDATE 0x0080
+#define VIDEO_ALWAYS_UPDATE 0x0080
// calls VIDEO_UPDATE for every visible scanline, even for skipped frames
-#define VIDEO_UPDATE_SCANLINE 0x0100
+#define VIDEO_UPDATE_SCANLINE 0x0100
-#define NVRAM_HANDLER_NAME(name) nvram_handler_##name
-#define NVRAM_HANDLER(name) void NVRAM_HANDLER_NAME(name)(running_machine &machine, emu_file *file, int read_or_write)
-#define NVRAM_HANDLER_CALL(name) NVRAM_HANDLER_NAME(name)(machine, file, read_or_write)
+#define NVRAM_HANDLER_NAME(name) nvram_handler_##name
+#define NVRAM_HANDLER(name) void NVRAM_HANDLER_NAME(name)(running_machine &machine, emu_file *file, int read_or_write)
+#define NVRAM_HANDLER_CALL(name) NVRAM_HANDLER_NAME(name)(machine, file, read_or_write)
-#define MEMCARD_HANDLER_NAME(name) memcard_handler_##name
-#define MEMCARD_HANDLER(name) void MEMCARD_HANDLER_NAME(name)(running_machine &machine, emu_file &file, int action)
-#define MEMCARD_HANDLER_CALL(name) MEMCARD_HANDLER_NAME(name)(machine, file, action)
+#define MEMCARD_HANDLER_NAME(name) memcard_handler_##name
+#define MEMCARD_HANDLER(name) void MEMCARD_HANDLER_NAME(name)(running_machine &machine, emu_file &file, int action)
+#define MEMCARD_HANDLER_CALL(name) MEMCARD_HANDLER_NAME(name)(machine, file, action)
// NULL versions
-#define nvram_handler_0 NULL
-#define memcard_handler_0 NULL
+#define nvram_handler_0 NULL
+#define memcard_handler_0 NULL
@@ -135,20 +135,20 @@ public:
template<class _DeviceClass> inline _DeviceClass *device(const char *tag) const { return downcast<_DeviceClass *>(device(tag)); }
// public state
- attotime m_minimum_quantum; // minimum scheduling quantum
- astring m_perfect_cpu_quantum; // tag of CPU to use for "perfect" scheduling
- INT32 m_watchdog_vblank_count; // number of VBLANKs until the watchdog kills us
- attotime m_watchdog_time; // length of time until the watchdog kills us
+ attotime m_minimum_quantum; // minimum scheduling quantum
+ astring m_perfect_cpu_quantum; // tag of CPU to use for "perfect" scheduling
+ INT32 m_watchdog_vblank_count; // number of VBLANKs until the watchdog kills us
+ attotime m_watchdog_time; // length of time until the watchdog kills us
// legacy callbacks
- nvram_handler_func m_nvram_handler; // NVRAM save/load callback
- memcard_handler_func m_memcard_handler; // memory card save/load callback
+ nvram_handler_func m_nvram_handler; // NVRAM save/load callback
+ memcard_handler_func m_memcard_handler; // memory card save/load callback
// other parameters
- UINT32 m_video_attributes; // flags describing the video system
- const gfx_decode_entry *m_gfxdecodeinfo; // pointer to array of graphics decoding information
- UINT32 m_total_colors; // total number of colors in the palette
- const char * m_default_layout; // default layout for this machine
+ UINT32 m_video_attributes; // flags describing the video system
+ const gfx_decode_entry *m_gfxdecodeinfo; // pointer to array of graphics decoding information
+ UINT32 m_total_colors; // total number of colors in the palette
+ const char * m_default_layout; // default layout for this machine
// helpers during configuration; not for general use
device_t *device_add(device_t *owner, const char *tag, device_type type, UINT32 clock);
@@ -158,9 +158,9 @@ public:
private:
// internal state
- const game_driver & m_gamedrv;
- emu_options & m_options;
- device_t * m_root_device;
+ const game_driver & m_gamedrv;
+ emu_options & m_options;
+ device_t * m_root_device;
};
@@ -276,8 +276,8 @@ ATTR_COLD device_t *MACHINE_CONFIG_NAME(_name)(machine_config &config, device_t
#define MCFG_DEVICE_REMOVE(_tag) \
device = config.device_remove(owner, _tag); \
-#define MCFG_DEVICE_MODIFY(_tag) \
+#define MCFG_DEVICE_MODIFY(_tag) \
device = config.device_find(owner, _tag); \
-#endif /* __MCONFIG_H__ */
+#endif /* __MCONFIG_H__ */
diff --git a/src/emu/memory.c b/src/emu/memory.c
index f2885367ec2..3d3e29c315a 100644
--- a/src/emu/memory.c
+++ b/src/emu/memory.c
@@ -191,11 +191,11 @@
// DEBUGGING
//**************************************************************************
-#define MEM_DUMP (0)
-#define VERBOSE (0)
-#define TEST_HANDLER (0)
+#define MEM_DUMP (0)
+#define VERBOSE (0)
+#define TEST_HANDLER (0)
-#define VPRINTF(x) do { if (VERBOSE) printf x; } while (0)
+#define VPRINTF(x) do { if (VERBOSE) printf x; } while (0)
@@ -207,18 +207,18 @@
const int BANK_ENTRY_UNSPECIFIED = -1;
// other address map constants
-const int MEMORY_BLOCK_CHUNK = 65536; // minimum chunk size of allocated memory blocks
+const int MEMORY_BLOCK_CHUNK = 65536; // minimum chunk size of allocated memory blocks
// static data access handler constants
enum
{
- STATIC_INVALID = 0, // invalid - should never be used
- STATIC_BANK1 = 1, // first memory bank
- STATIC_BANKMAX = 124, // last memory bank
- STATIC_NOP, // NOP - reads = unmapped value; writes = no-op
- STATIC_UNMAP, // unmapped - same as NOP except we log errors
- STATIC_WATCHPOINT, // watchpoint - used internally
- STATIC_COUNT // total number of static handlers
+ STATIC_INVALID = 0, // invalid - should never be used
+ STATIC_BANK1 = 1, // first memory bank
+ STATIC_BANKMAX = 124, // last memory bank
+ STATIC_NOP, // NOP - reads = unmapped value; writes = no-op
+ STATIC_UNMAP, // unmapped - same as NOP except we log errors
+ STATIC_WATCHPOINT, // watchpoint - used internally
+ STATIC_COUNT // total number of static handlers
};
@@ -303,11 +303,11 @@ protected:
// Subunit description information
struct subunit_info
{
- UINT32 m_mask; // mask (ff, ffff or ffffffff)
- UINT32 m_offset; // offset to add to the address
- UINT32 m_multiplier; // multiplier to the pre-split address
- UINT8 m_size; // size (8, 16 or 32)
- UINT8 m_shift; // shift of the subunit
+ UINT32 m_mask; // mask (ff, ffff or ffffffff)
+ UINT32 m_offset; // offset to add to the address
+ UINT32 m_multiplier; // multiplier to the pre-split address
+ UINT8 m_size; // size (8, 16 or 32)
+ UINT8 m_shift; // shift of the subunit
};
// internal helpers
@@ -315,16 +315,16 @@ protected:
virtual void remove_subunit(int entry) = 0;
// internal state
- bool m_populated; // populated?
- UINT8 m_datawidth;
- endianness_t m_endianness;
- offs_t m_bytestart; // byte-adjusted start address for handler
- offs_t m_byteend; // byte-adjusted end address for handler
- offs_t m_bytemask; // byte-adjusted mask against the final address
- UINT8 ** m_rambaseptr; // pointer to the bank base
- UINT8 m_subunits; // for width stubs, the number of subunits
- subunit_info m_subunit_infos[8]; // for width stubs, the associated subunit info
- UINT64 m_invsubmask; // inverted mask of the populated subunits
+ bool m_populated; // populated?
+ UINT8 m_datawidth;
+ endianness_t m_endianness;
+ offs_t m_bytestart; // byte-adjusted start address for handler
+ offs_t m_byteend; // byte-adjusted end address for handler
+ offs_t m_bytemask; // byte-adjusted mask against the final address
+ UINT8 ** m_rambaseptr; // pointer to the bank base
+ UINT8 m_subunits; // for width stubs, the number of subunits
+ subunit_info m_subunit_infos[8]; // for width stubs, the associated subunit info
+ UINT64 m_invsubmask; // inverted mask of the populated subunits
};
@@ -339,26 +339,26 @@ public:
{
union
{
- address_space * space;
- device_t * device;
+ address_space * space;
+ device_t * device;
} object;
union
{
- read8_space_func space8;
- read16_space_func space16;
- read32_space_func space32;
- read64_space_func space64;
+ read8_space_func space8;
+ read16_space_func space16;
+ read32_space_func space32;
+ read64_space_func space64;
} handler;
};
struct access_handler
{
// Constructors mean you can't union them
- read8_delegate r8;
- read16_delegate r16;
- read32_delegate r32;
- read64_delegate r64;
+ read8_delegate r8;
+ read16_delegate r16;
+ read32_delegate r32;
+ read64_delegate r64;
};
// construction/destruction
@@ -415,9 +415,9 @@ private:
virtual void remove_subunit(int entry);
// internal state
- access_handler m_read;
- access_handler m_subread[8];
- ioport_port * m_ioport;
+ access_handler m_read;
+ access_handler m_subread[8];
+ ioport_port * m_ioport;
bool m_sub_is_legacy[8];
legacy_info m_legacy_info;
@@ -436,26 +436,26 @@ public:
{
union
{
- address_space * space;
- device_t * device;
+ address_space * space;
+ device_t * device;
} object;
union
{
- write8_space_func space8;
- write16_space_func space16;
- write32_space_func space32;
- write64_space_func space64;
+ write8_space_func space8;
+ write16_space_func space16;
+ write32_space_func space32;
+ write64_space_func space64;
} handler;
};
struct access_handler
{
// Constructors mean you can't union them
- write8_delegate w8;
- write16_delegate w16;
- write32_delegate w32;
- write64_delegate w64;
+ write8_delegate w8;
+ write16_delegate w16;
+ write32_delegate w32;
+ write64_delegate w64;
};
// construction/destruction
@@ -512,9 +512,9 @@ private:
virtual void remove_subunit(int entry);
// internal state
- access_handler m_write;
- access_handler m_subwrite[8];
- ioport_port * m_ioport;
+ access_handler m_write;
+ access_handler m_subwrite[8];
+ ioport_port * m_ioport;
bool m_sub_is_legacy[8];
legacy_info m_legacy_info;
@@ -562,12 +562,12 @@ private:
class address_table
{
// address map lookup table definitions
- static const int LEVEL1_BITS = 18; // number of address bits in the level 1 table
- static const int LEVEL2_BITS = 32 - LEVEL1_BITS; // number of address bits in the level 2 table
- static const int SUBTABLE_COUNT = 64; // number of slots reserved for subtables
- static const int SUBTABLE_BASE = 256 - SUBTABLE_COUNT; // first index of a subtable
- static const int ENTRY_COUNT = SUBTABLE_BASE; // number of legitimate (non-subtable) entries
- static const int SUBTABLE_ALLOC = 8; // number of subtables to allocate at a time
+ static const int LEVEL1_BITS = 18; // number of address bits in the level 1 table
+ static const int LEVEL2_BITS = 32 - LEVEL1_BITS; // number of address bits in the level 2 table
+ static const int SUBTABLE_COUNT = 64; // number of slots reserved for subtables
+ static const int SUBTABLE_BASE = 256 - SUBTABLE_COUNT; // first index of a subtable
+ static const int ENTRY_COUNT = SUBTABLE_BASE; // number of legitimate (non-subtable) entries
+ static const int SUBTABLE_ALLOC = 8; // number of subtables to allocate at a time
inline int level2_bits() const { return m_large ? LEVEL2_BITS : 0; }
@@ -633,10 +633,10 @@ protected:
UINT8 *subtable_ptr(UINT8 entry) { return &m_table[level2_index(entry, 0)]; }
// internal state
- UINT8 * m_table; // pointer to base of table
- UINT8 * m_live_lookup; // current lookup
- address_space & m_space; // pointer back to the space
- bool m_large; // large memory model?
+ UINT8 * m_table; // pointer to base of table
+ UINT8 * m_live_lookup; // current lookup
+ address_space & m_space; // pointer back to the space
+ bool m_large; // large memory model?
// subtable_data is an internal class with information about each subtable
class subtable_data
@@ -644,18 +644,18 @@ protected:
public:
subtable_data()
: m_checksum_valid(false),
- m_checksum(0),
- m_usecount(0) { }
+ m_checksum(0),
+ m_usecount(0) { }
- bool m_checksum_valid; // is the checksum valid
- UINT32 m_checksum; // checksum over all the bytes
- UINT32 m_usecount; // number of times this has been used
+ bool m_checksum_valid; // is the checksum valid
+ UINT32 m_checksum; // checksum over all the bytes
+ UINT32 m_usecount; // number of times this has been used
};
- subtable_data * m_subtable; // info about each subtable
- UINT8 m_subtable_alloc; // number of subtables allocated
+ subtable_data * m_subtable; // info about each subtable
+ UINT8 m_subtable_alloc; // number of subtables allocated
// static global read-only watchpoint table
- static UINT8 s_watchpoint_table[1 << LEVEL1_BITS];
+ static UINT8 s_watchpoint_table[1 << LEVEL1_BITS];
private:
int handler_refcount[SUBTABLE_BASE-STATIC_COUNT];
@@ -754,7 +754,7 @@ private:
}
// internal state
- handler_entry_read * m_handlers[256]; // array of user-installed handlers
+ handler_entry_read * m_handlers[256]; // array of user-installed handlers
};
@@ -820,7 +820,7 @@ private:
}
// internal state
- handler_entry_write * m_handlers[256]; // array of user-installed handlers
+ handler_entry_write * m_handlers[256]; // array of user-installed handlers
};
@@ -845,8 +845,8 @@ public:
// construction/destruction
address_space_specific(memory_manager &manager, device_memory_interface &memory, address_spacenum spacenum)
: address_space(manager, memory, spacenum, _Large),
- m_read(*this, _Large),
- m_write(*this, _Large)
+ m_read(*this, _Large),
+ m_write(*this, _Large)
{
#if (TEST_HANDLER)
// test code to verify the read/write handlers are touching the correct bits
@@ -864,13 +864,13 @@ public:
{
// determine expected values
UINT64 expected64 = ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 7 : 0)) * 0x11) << 56) |
- ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 6 : 1)) * 0x11) << 48) |
- ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 5 : 2)) * 0x11) << 40) |
- ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 4 : 3)) * 0x11) << 32) |
- ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 3 : 4)) * 0x11) << 24) |
- ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 2 : 5)) * 0x11) << 16) |
- ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 1 : 6)) * 0x11) << 8) |
- ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 0 : 7)) * 0x11) << 0);
+ ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 6 : 1)) * 0x11) << 48) |
+ ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 5 : 2)) * 0x11) << 40) |
+ ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 4 : 3)) * 0x11) << 32) |
+ ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 3 : 4)) * 0x11) << 24) |
+ ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 2 : 5)) * 0x11) << 16) |
+ ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 1 : 6)) * 0x11) << 8) |
+ ((UINT64)((address + ((_Endian == ENDIANNESS_LITTLE) ? 0 : 7)) * 0x11) << 0);
UINT32 expected32 = (_Endian == ENDIANNESS_LITTLE) ? expected64 : (expected64 >> 32);
UINT16 expected16 = (_Endian == ENDIANNESS_LITTLE) ? expected32 : (expected32 >> 16);
UINT8 expected8 = (_Endian == ENDIANNESS_LITTLE) ? expected16 : (expected16 >> 8);
@@ -1430,8 +1430,8 @@ public:
static void write_qword_static(this_type &space, offs_t address, UINT64 data) { if (NATIVE_BITS == 64) space.write_native(address & ~NATIVE_MASK, data); else space.write_direct<UINT64, true>(address, data, U64(0xffffffffffffffff)); }
static void write_qword_masked_static(this_type &space, offs_t address, UINT64 data, UINT64 mask) { space.write_direct<UINT64, true>(address, data, mask); }
- address_table_read m_read; // memory read lookup table
- address_table_write m_write; // memory write lookup table
+ address_table_read m_read; // memory read lookup table
+ address_table_write m_write; // memory write lookup table
};
typedef address_space_specific<UINT8, ENDIANNESS_LITTLE, false> address_space_8le_small;
@@ -1482,8 +1482,8 @@ static void generate_memdump(running_machine &machine);
memory_manager::memory_manager(running_machine &machine)
: m_machine(machine),
- m_initialized(false),
- m_banknext(STATIC_BANK1)
+ m_initialized(false),
+ m_banknext(STATIC_BANK1)
{
memset(m_bank_ptr, 0, sizeof(m_bank_ptr));
memset(m_bankd_ptr, 0, sizeof(m_bankd_ptr));
@@ -1549,15 +1549,15 @@ void memory_manager::dump(FILE *file)
for (address_space *space = m_spacelist.first(); space != NULL; space = space->next())
{
fprintf(file, "\n\n"
- "====================================================\n"
- "Device '%s' %s address space read handler dump\n"
- "====================================================\n", space->device().tag(), space->name());
+ "====================================================\n"
+ "Device '%s' %s address space read handler dump\n"
+ "====================================================\n", space->device().tag(), space->name());
space->dump_map(file, ROW_READ);
fprintf(file, "\n\n"
- "====================================================\n"
- "Device '%s' %s address space write handler dump\n"
- "====================================================\n", space->device().tag(), space->name());
+ "====================================================\n"
+ "Device '%s' %s address space write handler dump\n"
+ "====================================================\n", space->device().tag(), space->name());
space->dump_map(file, ROW_WRITE);
}
}
@@ -1570,9 +1570,9 @@ void memory_manager::dump(FILE *file)
memory_region *memory_manager::region_alloc(const char *name, UINT32 length, UINT8 width, endianness_t endian)
{
mame_printf_verbose("Region '%s' created\n", name);
- // make sure we don't have a region of the same name; also find the end of the list
- memory_region *info = m_regionlist.find(name);
- if (info != NULL)
+ // make sure we don't have a region of the same name; also find the end of the list
+ memory_region *info = m_regionlist.find(name);
+ if (info != NULL)
fatalerror("region_alloc called with duplicate region name \"%s\"\n", name);
// allocate the region
@@ -1632,23 +1632,23 @@ void memory_manager::bank_reattach()
address_space::address_space(memory_manager &manager, device_memory_interface &memory, address_spacenum spacenum, bool large)
: m_next(NULL),
- m_config(*memory.space_config(spacenum)),
- m_device(memory.device()),
- m_map(NULL),
- m_addrmask(0xffffffffUL >> (32 - m_config.m_addrbus_width)),
- m_bytemask(address_to_byte_end(m_addrmask)),
- m_logaddrmask(0xffffffffUL >> (32 - m_config.m_logaddr_width)),
- m_logbytemask(address_to_byte_end(m_logaddrmask)),
- m_unmap(0),
- m_spacenum(spacenum),
- m_debugger_access(false),
- m_log_unmap(true),
- m_direct(*auto_alloc(memory.device().machine(), direct_read_data(*this))),
- m_name(memory.space_config(spacenum)->name()),
- m_addrchars((m_config.m_addrbus_width + 3) / 4),
- m_logaddrchars((m_config.m_logaddr_width + 3) / 4),
- m_manager(manager),
- m_machine(memory.device().machine())
+ m_config(*memory.space_config(spacenum)),
+ m_device(memory.device()),
+ m_map(NULL),
+ m_addrmask(0xffffffffUL >> (32 - m_config.m_addrbus_width)),
+ m_bytemask(address_to_byte_end(m_addrmask)),
+ m_logaddrmask(0xffffffffUL >> (32 - m_config.m_logaddr_width)),
+ m_logbytemask(address_to_byte_end(m_logaddrmask)),
+ m_unmap(0),
+ m_spacenum(spacenum),
+ m_debugger_access(false),
+ m_log_unmap(true),
+ m_direct(*auto_alloc(memory.device().machine(), direct_read_data(*this))),
+ m_name(memory.space_config(spacenum)->name()),
+ m_addrchars((m_config.m_addrbus_width + 3) / 4),
+ m_logaddrchars((m_config.m_logaddr_width + 3) / 4),
+ m_manager(manager),
+ m_machine(memory.device().machine())
{
// notify the device
memory.set_address_space(spacenum, *this);
@@ -1933,18 +1933,18 @@ void address_space::populate_map_entry(const address_map_entry &entry, read_or_w
if (readorwrite == ROW_READ)
switch (data.m_bits)
{
- case 8: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read8_delegate(entry.m_rproto8, *entry.m_read.m_devbase), data.m_mask); break;
- case 16: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read16_delegate(entry.m_rproto16, *entry.m_read.m_devbase), data.m_mask); break;
- case 32: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read32_delegate(entry.m_rproto32, *entry.m_read.m_devbase), data.m_mask); break;
- case 64: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read64_delegate(entry.m_rproto64, *entry.m_read.m_devbase), data.m_mask); break;
+ case 8: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read8_delegate(entry.m_rproto8, *entry.m_read.m_devbase), data.m_mask); break;
+ case 16: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read16_delegate(entry.m_rproto16, *entry.m_read.m_devbase), data.m_mask); break;
+ case 32: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read32_delegate(entry.m_rproto32, *entry.m_read.m_devbase), data.m_mask); break;
+ case 64: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read64_delegate(entry.m_rproto64, *entry.m_read.m_devbase), data.m_mask); break;
}
else
switch (data.m_bits)
{
- case 8: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write8_delegate(entry.m_wproto8, *entry.m_write.m_devbase), data.m_mask); break;
- case 16: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write16_delegate(entry.m_wproto16, *entry.m_write.m_devbase), data.m_mask); break;
- case 32: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write32_delegate(entry.m_wproto32, *entry.m_write.m_devbase), data.m_mask); break;
- case 64: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write64_delegate(entry.m_wproto64, *entry.m_write.m_devbase), data.m_mask); break;
+ case 8: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write8_delegate(entry.m_wproto8, *entry.m_write.m_devbase), data.m_mask); break;
+ case 16: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write16_delegate(entry.m_wproto16, *entry.m_write.m_devbase), data.m_mask); break;
+ case 32: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write32_delegate(entry.m_wproto32, *entry.m_write.m_devbase), data.m_mask); break;
+ case 64: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write64_delegate(entry.m_wproto64, *entry.m_write.m_devbase), data.m_mask); break;
}
break;
@@ -1952,18 +1952,18 @@ void address_space::populate_map_entry(const address_map_entry &entry, read_or_w
if (readorwrite == ROW_READ)
switch (data.m_bits)
{
- case 8: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace8, data.m_name, data.m_mask); break;
- case 16: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace16, data.m_name, data.m_mask); break;
- case 32: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace32, data.m_name, data.m_mask); break;
- case 64: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace64, data.m_name, data.m_mask); break;
+ case 8: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace8, data.m_name, data.m_mask); break;
+ case 16: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace16, data.m_name, data.m_mask); break;
+ case 32: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace32, data.m_name, data.m_mask); break;
+ case 64: install_legacy_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rspace64, data.m_name, data.m_mask); break;
}
else
switch (data.m_bits)
{
- case 8: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace8, data.m_name, data.m_mask); break;
- case 16: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace16, data.m_name, data.m_mask); break;
- case 32: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace32, data.m_name, data.m_mask); break;
- case 64: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace64, data.m_name, data.m_mask); break;
+ case 8: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace8, data.m_name, data.m_mask); break;
+ case 16: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace16, data.m_name, data.m_mask); break;
+ case 32: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace32, data.m_name, data.m_mask); break;
+ case 64: install_legacy_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wspace64, data.m_name, data.m_mask); break;
}
break;
@@ -2228,10 +2228,10 @@ void address_space::dump_map(FILE *file, read_or_write readorwrite)
void address_space::unmap_generic(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, read_or_write readorwrite, bool quiet)
{
VPRINTF(("address_space::unmap(%s-%s mask=%s mirror=%s, %s, %s)\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- (readorwrite == ROW_READ) ? "read" : (readorwrite == ROW_WRITE) ? "write" : (readorwrite == ROW_READWRITE) ? "read/write" : "??",
- quiet ? "quiet" : "normal"));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ (readorwrite == ROW_READ) ? "read" : (readorwrite == ROW_WRITE) ? "write" : (readorwrite == ROW_READWRITE) ? "read/write" : "??",
+ quiet ? "quiet" : "normal"));
// read space
if (readorwrite == ROW_READ || readorwrite == ROW_READWRITE)
@@ -2265,9 +2265,9 @@ void address_space::install_device_delegate(offs_t addrstart, offs_t addrend, de
void address_space::install_readwrite_port(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, const char *rtag, const char *wtag)
{
VPRINTF(("address_space::install_readwrite_port(%s-%s mask=%s mirror=%s, read=\"%s\" / write=\"%s\")\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- (rtag != NULL) ? rtag : "(none)", (wtag != NULL) ? wtag : "(none)"));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ (rtag != NULL) ? rtag : "(none)", (wtag != NULL) ? wtag : "(none)"));
// read handler
if (rtag != NULL)
@@ -2307,9 +2307,9 @@ void address_space::install_readwrite_port(offs_t addrstart, offs_t addrend, off
void address_space::install_bank_generic(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, const char *rtag, const char *wtag)
{
VPRINTF(("address_space::install_readwrite_bank(%s-%s mask=%s mirror=%s, read=\"%s\" / write=\"%s\")\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- (rtag != NULL) ? rtag : "(none)", (wtag != NULL) ? wtag : "(none)"));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ (rtag != NULL) ? rtag : "(none)", (wtag != NULL) ? wtag : "(none)"));
// map the read bank
if (rtag != NULL)
@@ -2342,10 +2342,10 @@ void address_space::install_bank_generic(offs_t addrstart, offs_t addrend, offs_
void *address_space::install_ram_generic(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, read_or_write readorwrite, void *baseptr)
{
VPRINTF(("address_space::install_ram_generic(%s-%s mask=%s mirror=%s, %s, %p)\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- (readorwrite == ROW_READ) ? "read" : (readorwrite == ROW_WRITE) ? "write" : (readorwrite == ROW_READWRITE) ? "read/write" : "??",
- baseptr));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ (readorwrite == ROW_READ) ? "read" : (readorwrite == ROW_WRITE) ? "write" : (readorwrite == ROW_READWRITE) ? "read/write" : "??",
+ baseptr));
// map for read
if (readorwrite == ROW_READ || readorwrite == ROW_READWRITE)
@@ -2417,9 +2417,9 @@ void *address_space::install_ram_generic(offs_t addrstart, offs_t addrend, offs_
UINT8 *address_space::install_read_handler(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, read8_delegate handler, UINT64 unitmask)
{
VPRINTF(("address_space::install_read_handler(%s-%s mask=%s mirror=%s, %s, %s)\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- handler.name(), core_i64_hex_format(unitmask, data_width() / 4)));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ handler.name(), core_i64_hex_format(unitmask, data_width() / 4)));
read().handler_map_range(addrstart, addrend, addrmask, addrmirror, unitmask).set_delegate(handler);
generate_memdump(machine());
@@ -2429,9 +2429,9 @@ UINT8 *address_space::install_read_handler(offs_t addrstart, offs_t addrend, off
UINT8 *address_space::install_write_handler(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, write8_delegate handler, UINT64 unitmask)
{
VPRINTF(("address_space::install_write_handler(%s-%s mask=%s mirror=%s, %s, %s)\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- handler.name(), core_i64_hex_format(unitmask, data_width() / 4)));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ handler.name(), core_i64_hex_format(unitmask, data_width() / 4)));
write().handler_map_range(addrstart, addrend, addrmask, addrmirror, unitmask).set_delegate(handler);
generate_memdump(machine());
@@ -2454,9 +2454,9 @@ UINT8 *address_space::install_readwrite_handler(offs_t addrstart, offs_t addrend
UINT8 *address_space::install_legacy_read_handler(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, read8_space_func rhandler, const char *rname, UINT64 unitmask)
{
VPRINTF(("address_space::install_legacy_read_handler(%s-%s mask=%s mirror=%s, %s, %s) [read8]\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- rname, core_i64_hex_format(unitmask, data_width() / 4)));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ rname, core_i64_hex_format(unitmask, data_width() / 4)));
read().handler_map_range(addrstart, addrend, addrmask, addrmirror, unitmask).set_legacy_func(*this, rhandler, rname);
generate_memdump(machine());
@@ -2466,9 +2466,9 @@ UINT8 *address_space::install_legacy_read_handler(offs_t addrstart, offs_t addre
UINT8 *address_space::install_legacy_write_handler(offs_t addrstart, offs_t addrend, offs_t addrmask, offs_t addrmirror, write8_space_func whandler, const char *wname, UINT64 unitmask)
{
VPRINTF(("address_space::install_legacy_write_handler(%s-%s mask=%s mirror=%s, %s, %s) [write8]\n",
- core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
- core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
- wname, core_i64_hex_format(unitmask, data_width() / 4)));
+ core_i64_hex_format(addrstart, m_addrchars), core_i64_hex_format(addrend, m_addrchars),
+ core_i64_hex_format(addrmask, m_addrchars), core_i64_hex_format(addrmirror, m_addrchars),
+ wname, core_i64_hex_format(unitmask, data_width() / 4)));
write().handler_map_range(addrstart, addrend, addrmask, addrmirror, unitmask).set_legacy_func(*this, whandler, wname);
generate_memdump(machine());
@@ -2788,11 +2788,11 @@ memory_bank &address_space::bank_find_or_allocate(const char *tag, offs_t addrst
address_table::address_table(address_space &space, bool large)
: m_table(auto_alloc_array(space.machine(), UINT8, 1 << LEVEL1_BITS)),
- m_live_lookup(m_table),
- m_space(space),
- m_large(large),
- m_subtable(auto_alloc_array(space.machine(), subtable_data, SUBTABLE_COUNT)),
- m_subtable_alloc(0)
+ m_live_lookup(m_table),
+ m_space(space),
+ m_large(large),
+ m_subtable(auto_alloc_array(space.machine(), subtable_data, SUBTABLE_COUNT)),
+ m_subtable_alloc(0)
{
// make our static table all watchpoints
if (s_watchpoint_table[0] != STATIC_WATCHPOINT)
@@ -3578,38 +3578,38 @@ const char *address_table::handler_name(UINT8 entry) const
{
static const char *const strings[] =
{
- "invalid", "bank 1", "bank 2", "bank 3",
- "bank 4", "bank 5", "bank 6", "bank 7",
- "bank 8", "bank 9", "bank 10", "bank 11",
- "bank 12", "bank 13", "bank 14", "bank 15",
- "bank 16", "bank 17", "bank 18", "bank 19",
- "bank 20", "bank 21", "bank 22", "bank 23",
- "bank 24", "bank 25", "bank 26", "bank 27",
- "bank 28", "bank 29", "bank 30", "bank 31",
- "bank 32", "bank 33", "bank 34", "bank 35",
- "bank 36", "bank 37", "bank 38", "bank 39",
- "bank 40", "bank 41", "bank 42", "bank 43",
- "bank 44", "bank 45", "bank 46", "bank 47",
- "bank 48", "bank 49", "bank 50", "bank 51",
- "bank 52", "bank 53", "bank 54", "bank 55",
- "bank 56", "bank 57", "bank 58", "bank 59",
- "bank 60", "bank 61", "bank 62", "bank 63",
- "bank 64", "bank 65", "bank 66", "bank 67",
- "bank 68", "bank 69", "bank 70", "bank 71",
- "bank 72", "bank 73", "bank 74", "bank 75",
- "bank 76", "bank 77", "bank 78", "bank 79",
- "bank 80", "bank 81", "bank 82", "bank 83",
- "bank 84", "bank 85", "bank 86", "bank 87",
- "bank 88", "bank 89", "bank 90", "bank 91",
- "bank 92", "bank 93", "bank 94", "bank 95",
- "bank 96", "bank 97", "bank 98", "bank 99",
- "bank 100", "bank 101", "bank 102", "bank 103",
- "bank 104", "bank 105", "bank 106", "bank 107",
- "bank 108", "bank 109", "bank 110", "bank 111",
- "bank 112", "bank 113", "bank 114", "bank 115",
- "bank 116", "bank 117", "bank 118", "bank 119",
- "bank 120", "bank 121", "bank 122", "ram",
- "rom", "nop", "unmapped", "watchpoint"
+ "invalid", "bank 1", "bank 2", "bank 3",
+ "bank 4", "bank 5", "bank 6", "bank 7",
+ "bank 8", "bank 9", "bank 10", "bank 11",
+ "bank 12", "bank 13", "bank 14", "bank 15",
+ "bank 16", "bank 17", "bank 18", "bank 19",
+ "bank 20", "bank 21", "bank 22", "bank 23",
+ "bank 24", "bank 25", "bank 26", "bank 27",
+ "bank 28", "bank 29", "bank 30", "bank 31",
+ "bank 32", "bank 33", "bank 34", "bank 35",
+ "bank 36", "bank 37", "bank 38", "bank 39",
+ "bank 40", "bank 41", "bank 42", "bank 43",
+ "bank 44", "bank 45", "bank 46", "bank 47",
+ "bank 48", "bank 49", "bank 50", "bank 51",
+ "bank 52", "bank 53", "bank 54", "bank 55",
+ "bank 56", "bank 57", "bank 58", "bank 59",
+ "bank 60", "bank 61", "bank 62", "bank 63",
+ "bank 64", "bank 65", "bank 66", "bank 67",
+ "bank 68", "bank 69", "bank 70", "bank 71",
+ "bank 72", "bank 73", "bank 74", "bank 75",
+ "bank 76", "bank 77", "bank 78", "bank 79",
+ "bank 80", "bank 81", "bank 82", "bank 83",
+ "bank 84", "bank 85", "bank 86", "bank 87",
+ "bank 88", "bank 89", "bank 90", "bank 91",
+ "bank 92", "bank 93", "bank 94", "bank 95",
+ "bank 96", "bank 97", "bank 98", "bank 99",
+ "bank 100", "bank 101", "bank 102", "bank 103",
+ "bank 104", "bank 105", "bank 106", "bank 107",
+ "bank 108", "bank 109", "bank 110", "bank 111",
+ "bank 112", "bank 113", "bank 114", "bank 115",
+ "bank 116", "bank 117", "bank 118", "bank 119",
+ "bank 120", "bank 121", "bank 122", "ram",
+ "rom", "nop", "unmapped", "watchpoint"
};
// banks have names
@@ -3795,12 +3795,12 @@ handler_entry &address_table_write::handler(UINT32 index) const
direct_read_data::direct_read_data(address_space &space)
: m_space(space),
- m_raw(NULL),
- m_decrypted(NULL),
- m_bytemask(space.bytemask()),
- m_bytestart(1),
- m_byteend(0),
- m_entry(STATIC_UNMAP)
+ m_raw(NULL),
+ m_decrypted(NULL),
+ m_bytemask(space.bytemask()),
+ m_bytestart(1),
+ m_byteend(0),
+ m_entry(STATIC_UNMAP)
{
}
@@ -3963,12 +3963,12 @@ void direct_read_data::explicit_configure(offs_t bytestart, offs_t byteend, offs
memory_block::memory_block(address_space &space, offs_t bytestart, offs_t byteend, void *memory)
: m_next(NULL),
- m_machine(space.machine()),
- m_space(space),
- m_bytestart(bytestart),
- m_byteend(byteend),
- m_data(reinterpret_cast<UINT8 *>(memory)),
- m_allocated(NULL)
+ m_machine(space.machine()),
+ m_space(space),
+ m_bytestart(bytestart),
+ m_byteend(byteend),
+ m_data(reinterpret_cast<UINT8 *>(memory)),
+ m_allocated(NULL)
{
VPRINTF(("block_allocate('%s',%s,%08X,%08X,%p)\n", space.device().tag(), space.name(), bytestart, byteend, memory));
@@ -4027,16 +4027,16 @@ memory_block::~memory_block()
memory_bank::memory_bank(address_space &space, int index, offs_t bytestart, offs_t byteend, const char *tag)
: m_next(NULL),
- m_machine(space.machine()),
- m_baseptr(space.manager().bank_pointer_addr(index, false)),
- m_basedptr(space.manager().bank_pointer_addr(index, true)),
- m_index(index),
- m_anonymous(tag == NULL),
- m_bytestart(bytestart),
- m_byteend(byteend),
- m_curentry(BANK_ENTRY_UNSPECIFIED),
- m_entry(NULL),
- m_entry_count(0)
+ m_machine(space.machine()),
+ m_baseptr(space.manager().bank_pointer_addr(index, false)),
+ m_basedptr(space.manager().bank_pointer_addr(index, true)),
+ m_index(index),
+ m_anonymous(tag == NULL),
+ m_bytestart(bytestart),
+ m_byteend(byteend),
+ m_curentry(BANK_ENTRY_UNSPECIFIED),
+ m_entry(NULL),
+ m_entry_count(0)
{
// generate an internal tag if we don't have one
if (tag == NULL)
@@ -4268,11 +4268,11 @@ void memory_bank::configure_decrypted_entries(int startentry, int numentries, vo
memory_region::memory_region(running_machine &machine, const char *name, UINT32 length, UINT8 width, endianness_t endian)
: m_machine(machine),
- m_next(NULL),
- m_name(name),
- m_buffer(length),
- m_width(width),
- m_endianness(endian)
+ m_next(NULL),
+ m_name(name),
+ m_buffer(length),
+ m_width(width),
+ m_endianness(endian)
{
assert(width == 1 || width == 2 || width == 4 || width == 8);
}
@@ -4289,13 +4289,13 @@ memory_region::memory_region(running_machine &machine, const char *name, UINT32
handler_entry::handler_entry(UINT8 width, endianness_t endianness, UINT8 **rambaseptr)
: m_populated(false),
- m_datawidth(width),
- m_endianness(endianness),
- m_bytestart(0),
- m_byteend(0),
- m_bytemask(~0),
- m_rambaseptr(rambaseptr),
- m_subunits(0)
+ m_datawidth(width),
+ m_endianness(endianness),
+ m_bytestart(0),
+ m_byteend(0),
+ m_bytemask(~0),
+ m_rambaseptr(rambaseptr),
+ m_subunits(0)
{
}
@@ -4473,11 +4473,11 @@ void handler_entry::description(char *buffer) const
if (i)
*buffer++ = ' ';
buffer += sprintf (buffer, "%d:%d:%x:%d:%s",
- m_subunit_infos[i].m_size,
- m_subunit_infos[i].m_shift,
- m_subunit_infos[i].m_offset,
- m_subunit_infos[i].m_multiplier,
- subunit_name(i));
+ m_subunit_infos[i].m_size,
+ m_subunit_infos[i].m_shift,
+ m_subunit_infos[i].m_offset,
+ m_subunit_infos[i].m_multiplier,
+ subunit_name(i));
}
}
else
@@ -4514,10 +4514,10 @@ const char *handler_entry_read::name() const
{
switch (m_datawidth)
{
- case 8: return m_read.r8.name();
- case 16: return m_read.r16.name();
- case 32: return m_read.r32.name();
- case 64: return m_read.r64.name();
+ case 8: return m_read.r8.name();
+ case 16: return m_read.r16.name();
+ case 32: return m_read.r32.name();
+ case 64: return m_read.r64.name();
}
return NULL;
}
@@ -4531,10 +4531,10 @@ const char *handler_entry_read::subunit_name(int entry) const
{
switch (m_subunit_infos[entry].m_size)
{
- case 8: return m_subread[entry].r8.name();
- case 16: return m_subread[entry].r16.name();
- case 32: return m_subread[entry].r32.name();
- case 64: return m_subread[entry].r64.name();
+ case 8: return m_subread[entry].r8.name();
+ case 16: return m_subread[entry].r16.name();
+ case 32: return m_subread[entry].r32.name();
+ case 64: return m_subread[entry].r64.name();
}
return NULL;
}
@@ -4950,10 +4950,10 @@ const char *handler_entry_write::name() const
{
switch (m_datawidth)
{
- case 8: return m_write.w8.name();
- case 16: return m_write.w16.name();
- case 32: return m_write.w32.name();
- case 64: return m_write.w64.name();
+ case 8: return m_write.w8.name();
+ case 16: return m_write.w16.name();
+ case 32: return m_write.w32.name();
+ case 64: return m_write.w64.name();
}
return NULL;
}
@@ -4968,10 +4968,10 @@ const char *handler_entry_write::subunit_name(int entry) const
{
switch (m_subunit_infos[entry].m_size)
{
- case 8: return m_subwrite[entry].w8.name();
- case 16: return m_subwrite[entry].w16.name();
- case 32: return m_subwrite[entry].w32.name();
- case 64: return m_subwrite[entry].w64.name();
+ case 8: return m_subwrite[entry].w8.name();
+ case 16: return m_subwrite[entry].w16.name();
+ case 32: return m_subwrite[entry].w32.name();
+ case 64: return m_subwrite[entry].w64.name();
}
return NULL;
}
diff --git a/src/emu/memory.h b/src/emu/memory.h
index 3c22185d2bf..7e7d3f2f653 100644
--- a/src/emu/memory.h
+++ b/src/emu/memory.h
@@ -55,16 +55,16 @@
// address spaces
enum address_spacenum
{
- AS_0, // first address space
- AS_1, // second address space
- AS_2, // third address space
- AS_3, // fourth address space
- ADDRESS_SPACES, // maximum number of address spaces
+ AS_0, // first address space
+ AS_1, // second address space
+ AS_2, // third address space
+ AS_3, // fourth address space
+ ADDRESS_SPACES, // maximum number of address spaces
// alternate address space names for common use
- AS_PROGRAM = AS_0, // program address space
- AS_DATA = AS_1, // data address space
- AS_IO = AS_2 // I/O address space
+ AS_PROGRAM = AS_0, // program address space
+ AS_DATA = AS_1, // data address space
+ AS_IO = AS_2 // I/O address space
};
DECLARE_ENUM_OPERATORS(address_spacenum);
@@ -102,7 +102,7 @@ class address_table_write;
// offsets and addresses are 32-bit (for now...)
-typedef UINT32 offs_t;
+typedef UINT32 offs_t;
// address map constructors are functions that build up an address_map
typedef void (*address_map_constructor)(address_map &map, device_t &devconfig);
@@ -112,44 +112,44 @@ typedef delegate<void (address_map &, device_t &)> address_map_delegate;
// legacy space read/write handlers
-typedef UINT8 (*read8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
-typedef void (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask);
-typedef UINT16 (*read16_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
-typedef void (*write16_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
-typedef UINT32 (*read32_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
-typedef void (*write32_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
-typedef UINT64 (*read64_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
-typedef void (*write64_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
+typedef UINT8 (*read8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
+typedef void (*write8_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask);
+typedef UINT16 (*read16_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
+typedef void (*write16_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
+typedef UINT32 (*read32_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
+typedef void (*write32_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
+typedef UINT64 (*read64_space_func) (ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
+typedef void (*write64_space_func)(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
// legacy device read/write handlers
-typedef UINT8 (*read8_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
-typedef void (*write8_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask);
-typedef UINT16 (*read16_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
-typedef void (*write16_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
-typedef UINT32 (*read32_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
-typedef void (*write32_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
-typedef UINT64 (*read64_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
-typedef void (*write64_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
+typedef UINT8 (*read8_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
+typedef void (*write8_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask);
+typedef UINT16 (*read16_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
+typedef void (*write16_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
+typedef UINT32 (*read32_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
+typedef void (*write32_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
+typedef UINT64 (*read64_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
+typedef void (*write64_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
// struct with function pointers for accessors; use is generally discouraged unless necessary
struct data_accessors
{
- UINT8 (*read_byte)(address_space &space, offs_t byteaddress);
- UINT16 (*read_word)(address_space &space, offs_t byteaddress);
- UINT16 (*read_word_masked)(address_space &space, offs_t byteaddress, UINT16 mask);
- UINT32 (*read_dword)(address_space &space, offs_t byteaddress);
- UINT32 (*read_dword_masked)(address_space &space, offs_t byteaddress, UINT32 mask);
- UINT64 (*read_qword)(address_space &space, offs_t byteaddress);
- UINT64 (*read_qword_masked)(address_space &space, offs_t byteaddress, UINT64 mask);
-
- void (*write_byte)(address_space &space, offs_t byteaddress, UINT8 data);
- void (*write_word)(address_space &space, offs_t byteaddress, UINT16 data);
- void (*write_word_masked)(address_space &space, offs_t byteaddress, UINT16 data, UINT16 mask);
- void (*write_dword)(address_space &space, offs_t byteaddress, UINT32 data);
- void (*write_dword_masked)(address_space &space, offs_t byteaddress, UINT32 data, UINT32 mask);
- void (*write_qword)(address_space &space, offs_t byteaddress, UINT64 data);
- void (*write_qword_masked)(address_space &space, offs_t byteaddress, UINT64 data, UINT64 mask);
+ UINT8 (*read_byte)(address_space &space, offs_t byteaddress);
+ UINT16 (*read_word)(address_space &space, offs_t byteaddress);
+ UINT16 (*read_word_masked)(address_space &space, offs_t byteaddress, UINT16 mask);
+ UINT32 (*read_dword)(address_space &space, offs_t byteaddress);
+ UINT32 (*read_dword_masked)(address_space &space, offs_t byteaddress, UINT32 mask);
+ UINT64 (*read_qword)(address_space &space, offs_t byteaddress);
+ UINT64 (*read_qword_masked)(address_space &space, offs_t byteaddress, UINT64 mask);
+
+ void (*write_byte)(address_space &space, offs_t byteaddress, UINT8 data);
+ void (*write_word)(address_space &space, offs_t byteaddress, UINT16 data);
+ void (*write_word_masked)(address_space &space, offs_t byteaddress, UINT16 data, UINT16 mask);
+ void (*write_dword)(address_space &space, offs_t byteaddress, UINT32 data);
+ void (*write_dword_masked)(address_space &space, offs_t byteaddress, UINT32 data, UINT32 mask);
+ void (*write_qword)(address_space &space, offs_t byteaddress, UINT64 data);
+ void (*write_qword_masked)(address_space &space, offs_t byteaddress, UINT64 data, UINT64 mask);
};
@@ -192,16 +192,16 @@ public:
// construction
direct_range()
: m_next(NULL),
- m_bytestart(0),
- m_byteend(~0) { }
+ m_bytestart(0),
+ m_byteend(~0) { }
// getters
direct_range *next() const { return m_next; }
// internal state
- direct_range * m_next; // pointer to the next range in the list
- offs_t m_bytestart; // starting byte offset of the range
- offs_t m_byteend; // ending byte offset of the range
+ direct_range * m_next; // pointer to the next range in the list
+ offs_t m_bytestart; // starting byte offset of the range
+ offs_t m_byteend; // ending byte offset of the range
};
// construction/destruction
@@ -245,16 +245,16 @@ private:
void remove_intersecting_ranges(offs_t bytestart, offs_t byteend);
// internal state
- address_space & m_space;
- UINT8 * m_raw; // direct access data pointer (raw)
- UINT8 * m_decrypted; // direct access data pointer (decrypted)
- offs_t m_bytemask; // byte address mask
- offs_t m_bytestart; // minimum valid byte address
- offs_t m_byteend; // maximum valid byte address
- UINT8 m_entry; // live entry
- simple_list<direct_range> m_rangelist[256]; // list of ranges for each entry
- simple_list<direct_range> m_freerangelist; // list of recycled range entries
- direct_update_delegate m_directupdate; // fast direct-access update callback
+ address_space & m_space;
+ UINT8 * m_raw; // direct access data pointer (raw)
+ UINT8 * m_decrypted; // direct access data pointer (decrypted)
+ offs_t m_bytemask; // byte address mask
+ offs_t m_bytestart; // minimum valid byte address
+ offs_t m_byteend; // maximum valid byte address
+ UINT8 m_entry; // live entry
+ simple_list<direct_range> m_rangelist[256]; // list of ranges for each entry
+ simple_list<direct_range> m_freerangelist; // list of recycled range entries
+ direct_update_delegate m_directupdate; // fast direct-access update callback
};
@@ -282,13 +282,13 @@ public:
inline offs_t byte2addr_end(offs_t address) const { return (m_addrbus_shift > 0) ? ((address << m_addrbus_shift) | ((1 << m_addrbus_shift) - 1)) : (address >> -m_addrbus_shift); }
// state
- const char * m_name;
- endianness_t m_endianness;
- UINT8 m_databus_width;
- UINT8 m_addrbus_width;
- INT8 m_addrbus_shift;
- UINT8 m_logaddr_width;
- UINT8 m_page_shift;
+ const char * m_name;
+ endianness_t m_endianness;
+ UINT8 m_databus_width;
+ UINT8 m_addrbus_width;
+ INT8 m_addrbus_shift;
+ UINT8 m_logaddr_width;
+ UINT8 m_page_shift;
address_map_constructor m_internal_map;
address_map_constructor m_default_map;
};
@@ -551,26 +551,26 @@ private:
protected:
// private state
- address_space * m_next; // next address space in the global list
- const address_space_config &m_config; // configuration of this space
- device_t & m_device; // reference to the owning device
- address_map * m_map; // original memory map
- offs_t m_addrmask; // physical address mask
- offs_t m_bytemask; // byte-converted physical address mask
- offs_t m_logaddrmask; // logical address mask
- offs_t m_logbytemask; // byte-converted logical address mask
- UINT64 m_unmap; // unmapped value
- address_spacenum m_spacenum; // address space index
- bool m_debugger_access; // treat accesses as coming from the debugger
- bool m_log_unmap; // log unmapped accesses in this space?
- direct_read_data & m_direct; // fast direct-access read info
- const char * m_name; // friendly name of the address space
- UINT8 m_addrchars; // number of characters to use for physical addresses
- UINT8 m_logaddrchars; // number of characters to use for logical addresses
+ address_space * m_next; // next address space in the global list
+ const address_space_config &m_config; // configuration of this space
+ device_t & m_device; // reference to the owning device
+ address_map * m_map; // original memory map
+ offs_t m_addrmask; // physical address mask
+ offs_t m_bytemask; // byte-converted physical address mask
+ offs_t m_logaddrmask; // logical address mask
+ offs_t m_logbytemask; // byte-converted logical address mask
+ UINT64 m_unmap; // unmapped value
+ address_spacenum m_spacenum; // address space index
+ bool m_debugger_access; // treat accesses as coming from the debugger
+ bool m_log_unmap; // log unmapped accesses in this space?
+ direct_read_data & m_direct; // fast direct-access read info
+ const char * m_name; // friendly name of the address space
+ UINT8 m_addrchars; // number of characters to use for physical addresses
+ UINT8 m_logaddrchars; // number of characters to use for logical addresses
private:
- memory_manager & m_manager; // reference to the owning manager
- running_machine & m_machine; // reference to the owning machine
+ memory_manager & m_manager; // reference to the owning manager
+ running_machine & m_machine; // reference to the owning machine
};
@@ -604,12 +604,12 @@ public:
private:
// internal state
- memory_block * m_next; // next memory block in the list
- running_machine & m_machine; // need the machine to free our memory
- address_space & m_space; // which address space are we associated with?
- offs_t m_bytestart, m_byteend; // byte-normalized start/end for verifying a match
- UINT8 * m_data; // pointer to the data for this block
- UINT8 * m_allocated; // pointer to the actually allocated block
+ memory_block * m_next; // next memory block in the list
+ running_machine & m_machine; // need the machine to free our memory
+ address_space & m_space; // which address space are we associated with?
+ offs_t m_bytestart, m_byteend; // byte-normalized start/end for verifying a match
+ UINT8 * m_data; // pointer to the data for this block
+ UINT8 * m_allocated; // pointer to the actually allocated block
};
@@ -631,8 +631,8 @@ class memory_bank
// construction/destruction
bank_reference(address_space &space, read_or_write readorwrite)
: m_next(NULL),
- m_space(space),
- m_readorwrite(readorwrite) { }
+ m_space(space),
+ m_readorwrite(readorwrite) { }
// getters
bank_reference *next() const { return m_next; }
@@ -646,16 +646,16 @@ class memory_bank
private:
// internal state
- bank_reference * m_next; // link to the next reference
- address_space & m_space; // address space that references us
- read_or_write m_readorwrite; // used for read or write?
+ bank_reference * m_next; // link to the next reference
+ address_space & m_space; // address space that references us
+ read_or_write m_readorwrite; // used for read or write?
};
// a bank_entry contains a raw and decrypted pointer
struct bank_entry
{
- UINT8 * m_raw;
- UINT8 * m_decrypted;
+ UINT8 * m_raw;
+ UINT8 * m_decrypted;
};
public:
@@ -702,20 +702,20 @@ private:
void expand_entries(int entrynum);
// internal state
- memory_bank * m_next; // next bank in sequence
- running_machine & m_machine; // need the machine to free our memory
- UINT8 ** m_baseptr; // pointer to our base pointer in the global array
- UINT8 ** m_basedptr; // same for the decrypted base pointer
- UINT8 m_index; // array index for this handler
- bool m_anonymous; // are we anonymous or explicit?
- offs_t m_bytestart; // byte-adjusted start offset
- offs_t m_byteend; // byte-adjusted end offset
- int m_curentry; // current entry
- bank_entry * m_entry; // array of entries (dynamically allocated)
- int m_entry_count; // number of allocated entries
- astring m_name; // friendly name for this bank
- astring m_tag; // tag for this bank
- simple_list<bank_reference> m_reflist; // linked list of address spaces referencing this bank
+ memory_bank * m_next; // next bank in sequence
+ running_machine & m_machine; // need the machine to free our memory
+ UINT8 ** m_baseptr; // pointer to our base pointer in the global array
+ UINT8 ** m_basedptr; // same for the decrypted base pointer
+ UINT8 m_index; // array index for this handler
+ bool m_anonymous; // are we anonymous or explicit?
+ offs_t m_bytestart; // byte-adjusted start offset
+ offs_t m_byteend; // byte-adjusted end offset
+ int m_curentry; // current entry
+ bank_entry * m_entry; // array of entries (dynamically allocated)
+ int m_entry_count; // number of allocated entries
+ astring m_name; // friendly name for this bank
+ astring m_tag; // tag for this bank
+ simple_list<bank_reference> m_reflist; // linked list of address spaces referencing this bank
};
@@ -730,9 +730,9 @@ public:
// construction/destruction
memory_share(UINT8 width, size_t bytes, void *ptr = NULL)
: m_next(NULL),
- m_ptr(ptr),
- m_bytes(bytes),
- m_width(width) { }
+ m_ptr(ptr),
+ m_bytes(bytes),
+ m_width(width) { }
// getters
memory_share *next() const { return m_next; }
@@ -745,10 +745,10 @@ public:
private:
// internal state
- memory_share * m_next; // next share in the list
- void * m_ptr; // pointer to the memory backing the region
- size_t m_bytes; // size of the shared region in bytes
- UINT8 m_width; // width of the shared region
+ memory_share * m_next; // next share in the list
+ void * m_ptr; // pointer to the memory backing the region
+ size_t m_bytes; // size of the shared region in bytes
+ UINT8 m_width; // width of the shared region
};
@@ -798,12 +798,12 @@ public:
private:
// internal data
- running_machine & m_machine;
- memory_region * m_next;
- astring m_name;
- dynamic_buffer m_buffer;
- UINT8 m_width;
- endianness_t m_endianness;
+ running_machine & m_machine;
+ memory_region * m_next;
+ astring m_name;
+ dynamic_buffer m_buffer;
+ UINT8 m_width;
+ endianness_t m_endianness;
};
@@ -847,21 +847,21 @@ private:
void bank_reattach();
// internal state
- running_machine & m_machine; // reference to the machine
- bool m_initialized; // have we completed initialization?
+ running_machine & m_machine; // reference to the machine
+ bool m_initialized; // have we completed initialization?
- UINT8 * m_bank_ptr[256]; // array of bank pointers
- UINT8 * m_bankd_ptr[256]; // array of decrypted bank pointers
+ UINT8 * m_bank_ptr[256]; // array of bank pointers
+ UINT8 * m_bankd_ptr[256]; // array of decrypted bank pointers
- simple_list<address_space> m_spacelist; // list of address spaces
- simple_list<memory_block> m_blocklist; // head of the list of memory blocks
+ simple_list<address_space> m_spacelist; // list of address spaces
+ simple_list<memory_block> m_blocklist; // head of the list of memory blocks
- tagged_list<memory_bank> m_banklist; // data gathered for each bank
- UINT8 m_banknext; // next bank to allocate
+ tagged_list<memory_bank> m_banklist; // data gathered for each bank
+ UINT8 m_banknext; // next bank to allocate
- tagged_list<memory_share> m_sharelist; // map for share lookups
+ tagged_list<memory_share> m_sharelist; // map for share lookups
- tagged_list<memory_region> m_regionlist; // list of memory regions
+ tagged_list<memory_region> m_regionlist; // list of memory regions
};
@@ -871,117 +871,117 @@ private:
//**************************************************************************
// opcode base adjustment handler function macro
-#define DIRECT_UPDATE_MEMBER(name) offs_t name(ATTR_UNUSED direct_read_data &direct, ATTR_UNUSED offs_t address)
-#define DIRECT_UPDATE_HANDLER(name) offs_t name(ATTR_UNUSED running_machine &machine, ATTR_UNUSED direct_read_data &direct, ATTR_UNUSED offs_t address)
-#define DECLARE_DIRECT_UPDATE_MEMBER(name) offs_t name(ATTR_UNUSED direct_read_data &direct, ATTR_UNUSED offs_t address)
+#define DIRECT_UPDATE_MEMBER(name) offs_t name(ATTR_UNUSED direct_read_data &direct, ATTR_UNUSED offs_t address)
+#define DIRECT_UPDATE_HANDLER(name) offs_t name(ATTR_UNUSED running_machine &machine, ATTR_UNUSED direct_read_data &direct, ATTR_UNUSED offs_t address)
+#define DECLARE_DIRECT_UPDATE_MEMBER(name) offs_t name(ATTR_UNUSED direct_read_data &direct, ATTR_UNUSED offs_t address)
// space read/write handler function macros
-#define READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
-#define WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
-#define READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
-#define WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
-#define READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
-#define WRITE32_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
-#define READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
-#define WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
-
-#define DECLARE_READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
-#define DECLARE_WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
-#define DECLARE_READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
-#define DECLARE_WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
-#define DECLARE_READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
-#define DECLARE_WRITE32_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
-#define DECLARE_READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
-#define DECLARE_WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
+#define READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
+#define WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
+#define READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
+#define WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
+#define READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
+#define WRITE32_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
+#define READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
+#define WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
+
+#define DECLARE_READ8_HANDLER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
+#define DECLARE_WRITE8_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
+#define DECLARE_READ16_HANDLER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
+#define DECLARE_WRITE16_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
+#define DECLARE_READ32_HANDLER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
+#define DECLARE_WRITE32_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
+#define DECLARE_READ64_HANDLER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
+#define DECLARE_WRITE64_HANDLER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
// device read/write handler function macros
-#define READ8_DEVICE_HANDLER(name) UINT8 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
-#define WRITE8_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
-#define READ16_DEVICE_HANDLER(name) UINT16 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
-#define WRITE16_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
-#define READ32_DEVICE_HANDLER(name) UINT32 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
-#define WRITE32_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
-#define READ64_DEVICE_HANDLER(name) UINT64 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
-#define WRITE64_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
-
-#define DECLARE_READ8_DEVICE_HANDLER(name) UINT8 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
-#define DECLARE_WRITE8_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
-#define DECLARE_READ16_DEVICE_HANDLER(name) UINT16 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
-#define DECLARE_WRITE16_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
-#define DECLARE_READ32_DEVICE_HANDLER(name) UINT32 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
-#define DECLARE_WRITE32_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
-#define DECLARE_READ64_DEVICE_HANDLER(name) UINT64 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
-#define DECLARE_WRITE64_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
+#define READ8_DEVICE_HANDLER(name) UINT8 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
+#define WRITE8_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
+#define READ16_DEVICE_HANDLER(name) UINT16 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
+#define WRITE16_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
+#define READ32_DEVICE_HANDLER(name) UINT32 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
+#define WRITE32_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
+#define READ64_DEVICE_HANDLER(name) UINT64 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
+#define WRITE64_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
+
+#define DECLARE_READ8_DEVICE_HANDLER(name) UINT8 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
+#define DECLARE_WRITE8_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
+#define DECLARE_READ16_DEVICE_HANDLER(name) UINT16 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
+#define DECLARE_WRITE16_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
+#define DECLARE_READ32_DEVICE_HANDLER(name) UINT32 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
+#define DECLARE_WRITE32_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
+#define DECLARE_READ64_DEVICE_HANDLER(name) UINT64 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
+#define DECLARE_WRITE64_DEVICE_HANDLER(name) void name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
// space read/write handler function macros
-#define READ8_MEMBER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
-#define WRITE8_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
-#define READ16_MEMBER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
-#define WRITE16_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
-#define READ32_MEMBER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
-#define WRITE32_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
-#define READ64_MEMBER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
-#define WRITE64_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
-
-#define DECLARE_READ8_MEMBER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
-#define DECLARE_WRITE8_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
-#define DECLARE_READ16_MEMBER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
-#define DECLARE_WRITE16_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
-#define DECLARE_READ32_MEMBER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
-#define DECLARE_WRITE32_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
-#define DECLARE_READ64_MEMBER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
-#define DECLARE_WRITE64_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
+#define READ8_MEMBER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
+#define WRITE8_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
+#define READ16_MEMBER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
+#define WRITE16_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
+#define READ32_MEMBER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
+#define WRITE32_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
+#define READ64_MEMBER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
+#define WRITE64_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
+
+#define DECLARE_READ8_MEMBER(name) UINT8 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
+#define DECLARE_WRITE8_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
+#define DECLARE_READ16_MEMBER(name) UINT16 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
+#define DECLARE_WRITE16_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
+#define DECLARE_READ32_MEMBER(name) UINT32 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
+#define DECLARE_WRITE32_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
+#define DECLARE_READ64_MEMBER(name) UINT64 name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
+#define DECLARE_WRITE64_MEMBER(name) void name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
// helper macro for merging data with the memory mask
-#define COMBINE_DATA(varptr) (*(varptr) = (*(varptr) & ~mem_mask) | (data & mem_mask))
+#define COMBINE_DATA(varptr) (*(varptr) = (*(varptr) & ~mem_mask) | (data & mem_mask))
-#define ACCESSING_BITS_0_7 ((mem_mask & 0x000000ff) != 0)
-#define ACCESSING_BITS_8_15 ((mem_mask & 0x0000ff00) != 0)
-#define ACCESSING_BITS_16_23 ((mem_mask & 0x00ff0000) != 0)
-#define ACCESSING_BITS_24_31 ((mem_mask & 0xff000000) != 0)
-#define ACCESSING_BITS_32_39 ((mem_mask & U64(0x000000ff00000000)) != 0)
-#define ACCESSING_BITS_40_47 ((mem_mask & U64(0x0000ff0000000000)) != 0)
-#define ACCESSING_BITS_48_55 ((mem_mask & U64(0x00ff000000000000)) != 0)
-#define ACCESSING_BITS_56_63 ((mem_mask & U64(0xff00000000000000)) != 0)
+#define ACCESSING_BITS_0_7 ((mem_mask & 0x000000ff) != 0)
+#define ACCESSING_BITS_8_15 ((mem_mask & 0x0000ff00) != 0)
+#define ACCESSING_BITS_16_23 ((mem_mask & 0x00ff0000) != 0)
+#define ACCESSING_BITS_24_31 ((mem_mask & 0xff000000) != 0)
+#define ACCESSING_BITS_32_39 ((mem_mask & U64(0x000000ff00000000)) != 0)
+#define ACCESSING_BITS_40_47 ((mem_mask & U64(0x0000ff0000000000)) != 0)
+#define ACCESSING_BITS_48_55 ((mem_mask & U64(0x00ff000000000000)) != 0)
+#define ACCESSING_BITS_56_63 ((mem_mask & U64(0xff00000000000000)) != 0)
-#define ACCESSING_BITS_0_15 ((mem_mask & 0x0000ffff) != 0)
-#define ACCESSING_BITS_16_31 ((mem_mask & 0xffff0000) != 0)
-#define ACCESSING_BITS_32_47 ((mem_mask & U64(0x0000ffff00000000)) != 0)
-#define ACCESSING_BITS_48_63 ((mem_mask & U64(0xffff000000000000)) != 0)
+#define ACCESSING_BITS_0_15 ((mem_mask & 0x0000ffff) != 0)
+#define ACCESSING_BITS_16_31 ((mem_mask & 0xffff0000) != 0)
+#define ACCESSING_BITS_32_47 ((mem_mask & U64(0x0000ffff00000000)) != 0)
+#define ACCESSING_BITS_48_63 ((mem_mask & U64(0xffff000000000000)) != 0)
-#define ACCESSING_BITS_0_31 ((mem_mask & 0xffffffff) != 0)
-#define ACCESSING_BITS_32_63 ((mem_mask & U64(0xffffffff00000000)) != 0)
+#define ACCESSING_BITS_0_31 ((mem_mask & 0xffffffff) != 0)
+#define ACCESSING_BITS_32_63 ((mem_mask & U64(0xffffffff00000000)) != 0)
// macros for accessing bytes and words within larger chunks
// read/write a byte to a 16-bit space
-#define BYTE_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0))
-#define BYTE_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,1))
+#define BYTE_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(1,0))
+#define BYTE_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,1))
// read/write a byte to a 32-bit space
-#define BYTE4_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(3,0))
-#define BYTE4_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,3))
+#define BYTE4_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(3,0))
+#define BYTE4_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,3))
// read/write a word to a 32-bit space
-#define WORD_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(2,0))
-#define WORD_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,2))
+#define WORD_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(2,0))
+#define WORD_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,2))
// read/write a byte to a 64-bit space
-#define BYTE8_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(7,0))
-#define BYTE8_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,7))
+#define BYTE8_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(7,0))
+#define BYTE8_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,7))
// read/write a word to a 64-bit space
-#define WORD2_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(6,0))
-#define WORD2_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,6))
+#define WORD2_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(6,0))
+#define WORD2_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,6))
// read/write a dword to a 64-bit space
-#define DWORD_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(4,0))
-#define DWORD_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,4))
+#define DWORD_XOR_BE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(4,0))
+#define DWORD_XOR_LE(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(0,4))
@@ -1089,4 +1089,4 @@ inline UINT64 direct_read_data::read_decrypted_qword(offs_t byteaddress, offs_t
return m_space.read_qword(byteaddress);
}
-#endif /* __MEMORY_H__ */
+#endif /* __MEMORY_H__ */
diff --git a/src/emu/output.c b/src/emu/output.c
index eb9f250b1a5..363cd1180d1 100644
--- a/src/emu/output.c
+++ b/src/emu/output.c
@@ -18,7 +18,7 @@
CONSTANTS
***************************************************************************/
-#define HASH_SIZE 53
+#define HASH_SIZE 53
@@ -28,20 +28,20 @@
struct output_notify
{
- output_notify * next; /* link to next item */
- output_notifier_func notifier; /* callback to call */
- void * param; /* parameter to pass the callback */
+ output_notify * next; /* link to next item */
+ output_notifier_func notifier; /* callback to call */
+ void * param; /* parameter to pass the callback */
};
struct output_item
{
- output_item * next; /* next item in list */
- const char * name; /* string name of the item */
- UINT32 hash; /* hash for this item name */
- UINT32 id; /* unique ID for this item */
- INT32 value; /* current value */
- output_notify * notifylist; /* list of notifier callbacks */
+ output_item * next; /* next item in list */
+ const char * name; /* string name of the item */
+ UINT32 hash; /* hash for this item name */
+ UINT32 id; /* unique ID for this item */
+ INT32 value; /* current value */
+ output_notify * notifylist; /* list of notifier callbacks */
};
diff --git a/src/emu/output.h b/src/emu/output.h
index 46b74ea5a92..4e4bda44463 100644
--- a/src/emu/output.h
+++ b/src/emu/output.h
@@ -96,4 +96,4 @@ INLINE INT32 output_get_digit_value(int index)
}
-#endif /* __OUTPUT_H__ */
+#endif /* __OUTPUT_H__ */
diff --git a/src/emu/profiler.c b/src/emu/profiler.c
index f1b18d7560b..1cee063412f 100644
--- a/src/emu/profiler.c
+++ b/src/emu/profiler.c
@@ -61,7 +61,7 @@
struct profile_string
{
- int type;
+ int type;
const char *string;
};
@@ -79,7 +79,7 @@ profiler_state g_profiler;
// CONSTANTS
//**************************************************************************
-#define TEXT_UPDATE_TIME 0.5
+#define TEXT_UPDATE_TIME 0.5
diff --git a/src/emu/profiler.h b/src/emu/profiler.h
index 0340e4f1faf..2430062032b 100644
--- a/src/emu/profiler.h
+++ b/src/emu/profiler.h
@@ -80,10 +80,10 @@ enum profile_type
PROFILER_BLIT,
PROFILER_SOUND,
PROFILER_TIMER_CALLBACK,
- PROFILER_INPUT, // input.c and inptport.c
- PROFILER_MOVIE_REC, // movie recording
- PROFILER_LOGERROR, // logerror
- PROFILER_EXTRA, // everything else
+ PROFILER_INPUT, // input.c and inptport.c
+ PROFILER_MOVIE_REC, // movie recording
+ PROFILER_LOGERROR, // logerror
+ PROFILER_EXTRA, // everything else
// the USER types are available to driver writers to profile
// custom sections of the code
@@ -187,16 +187,16 @@ private:
// an entry in the FILO
struct filo_entry
{
- int type; // type of entry
- osd_ticks_t start; // start time
+ int type; // type of entry
+ osd_ticks_t start; // start time
};
// internal state
- filo_entry * m_filoptr; // current FILO index
- astring m_text; // profiler text
- attotime m_text_time; // profiler text last update
- filo_entry m_filo[32]; // array of FILO entries
- osd_ticks_t m_data[PROFILER_TOTAL + 1]; // array of data
+ filo_entry * m_filoptr; // current FILO index
+ astring m_text; // profiler text
+ attotime m_text_time; // profiler text last update
+ filo_entry m_filo[32]; // array of FILO entries
+ osd_ticks_t m_data[PROFILER_TOTAL + 1]; // array of data
};
@@ -238,4 +238,4 @@ typedef dummy_profiler_state profiler_state;
extern profiler_state g_profiler;
-#endif /* __PROFILER_H__ */
+#endif /* __PROFILER_H__ */
diff --git a/src/emu/render.c b/src/emu/render.c
index 08e80616f76..52b0d6d9765 100644
--- a/src/emu/render.c
+++ b/src/emu/render.c
@@ -82,7 +82,7 @@
// CONSTANTS
//**************************************************************************
-#define INTERNAL_FLAG_CHAR 0x00000001
+#define INTERNAL_FLAG_CHAR 0x00000001
enum
{
@@ -118,11 +118,11 @@ enum
// an object_transform is used to track transformations when building an object list
struct object_transform
{
- float xoffs, yoffs; // offset transforms
- float xscale, yscale; // scale transforms
- render_color color; // color transform
- int orientation; // orientation transform
- bool no_center; // center the container?
+ float xoffs, yoffs; // offset transforms
+ float xscale, yscale; // scale transforms
+ render_color color; // color transform
+ int orientation; // orientation transform
+ bool no_center; // center the container?
};
@@ -134,14 +134,14 @@ struct object_transform
// precomputed UV coordinates for various orientations
static const render_quad_texuv oriented_texcoords[8] =
{
- { { 0,0 }, { 1,0 }, { 0,1 }, { 1,1 } }, // 0
- { { 1,0 }, { 0,0 }, { 1,1 }, { 0,1 } }, // ORIENTATION_FLIP_X
- { { 0,1 }, { 1,1 }, { 0,0 }, { 1,0 } }, // ORIENTATION_FLIP_Y
- { { 1,1 }, { 0,1 }, { 1,0 }, { 0,0 } }, // ORIENTATION_FLIP_X | ORIENTATION_FLIP_Y
- { { 0,0 }, { 0,1 }, { 1,0 }, { 1,1 } }, // ORIENTATION_SWAP_XY
- { { 0,1 }, { 0,0 }, { 1,1 }, { 1,0 } }, // ORIENTATION_SWAP_XY | ORIENTATION_FLIP_X
- { { 1,0 }, { 1,1 }, { 0,0 }, { 0,1 } }, // ORIENTATION_SWAP_XY | ORIENTATION_FLIP_Y
- { { 1,1 }, { 1,0 }, { 0,1 }, { 0,0 } } // ORIENTATION_SWAP_XY | ORIENTATION_FLIP_X | ORIENTATION_FLIP_Y
+ { { 0,0 }, { 1,0 }, { 0,1 }, { 1,1 } }, // 0
+ { { 1,0 }, { 0,0 }, { 1,1 }, { 0,1 } }, // ORIENTATION_FLIP_X
+ { { 0,1 }, { 1,1 }, { 0,0 }, { 1,0 } }, // ORIENTATION_FLIP_Y
+ { { 1,1 }, { 0,1 }, { 1,0 }, { 0,0 } }, // ORIENTATION_FLIP_X | ORIENTATION_FLIP_Y
+ { { 0,0 }, { 0,1 }, { 1,0 }, { 1,1 } }, // ORIENTATION_SWAP_XY
+ { { 0,1 }, { 0,0 }, { 1,1 }, { 1,0 } }, // ORIENTATION_SWAP_XY | ORIENTATION_FLIP_X
+ { { 1,0 }, { 1,1 }, { 0,0 }, { 0,1 } }, // ORIENTATION_SWAP_XY | ORIENTATION_FLIP_Y
+ { { 1,1 }, { 1,0 }, { 0,1 }, { 0,0 } } // ORIENTATION_SWAP_XY | ORIENTATION_FLIP_X | ORIENTATION_FLIP_Y
};
// layer orders
@@ -206,11 +206,11 @@ inline void normalize_bounds(render_bounds &bounds)
inline item_layer get_layer_and_blendmode(const layout_view &view, int index, int &blendmode)
{
// if we have multiple backdrop pieces and no overlays, render:
- // backdrop (add) + screens (add) + bezels (alpha) + cpanels (alpha) + marquees (alpha)
- // else render:
- // screens (add) + overlays (RGB multiply) + backdrop (add) + bezels (alpha) + cpanels (alpha) + marquees (alpha)
+ // backdrop (add) + screens (add) + bezels (alpha) + cpanels (alpha) + marquees (alpha)
+ // else render:
+ // screens (add) + overlays (RGB multiply) + backdrop (add) + bezels (alpha) + cpanels (alpha) + marquees (alpha)
- const int *layer_order = layer_order_standard;
+ const int *layer_order = layer_order_standard;
if (view.first_item(ITEM_LAYER_BACKDROP) != NULL && view.first_item(ITEM_LAYER_BACKDROP)->next() != NULL && view.first_item(ITEM_LAYER_OVERLAY) == NULL)
layer_order = layer_order_alternate;
@@ -359,14 +359,14 @@ void render_primitive_list::append_or_return(render_primitive &prim, bool clippe
render_texture::render_texture()
: m_manager(NULL),
- m_next(NULL),
- m_bitmap(NULL),
- m_format(TEXFORMAT_ARGB32),
- m_bcglookup(NULL),
- m_bcglookup_entries(0),
- m_scaler(NULL),
- m_param(NULL),
- m_curseq(0)
+ m_next(NULL),
+ m_bitmap(NULL),
+ m_format(TEXFORMAT_ARGB32),
+ m_bcglookup(NULL),
+ m_bcglookup_entries(0),
+ m_scaler(NULL),
+ m_param(NULL),
+ m_curseq(0)
{
m_sbounds.set(0, -1, 0, -1);
memset(m_scaled, 0, sizeof(m_scaled));
@@ -636,13 +636,13 @@ const rgb_t *render_texture::get_adjusted_palette(render_container &container)
render_container::render_container(render_manager &manager, screen_device *screen)
: m_next(NULL),
- m_manager(manager),
- m_itemlist(manager.machine().respool()),
- m_item_allocator(manager.machine().respool()),
- m_screen(screen),
- m_overlaybitmap(NULL),
- m_overlaytexture(NULL),
- m_palclient(NULL)
+ m_manager(manager),
+ m_itemlist(manager.machine().respool()),
+ m_item_allocator(manager.machine().respool()),
+ m_screen(screen),
+ m_overlaybitmap(NULL),
+ m_overlaytexture(NULL),
+ m_palclient(NULL)
{
// all palette entries are opaque by default
for (int color = 0; color < ARRAY_LENGTH(m_bcglookup); color++)
@@ -892,9 +892,9 @@ void render_container::recompute_lookups()
{
pen_t newval = adjusted_palette[i];
m_bcglookup[i] = (newval & 0xff000000) |
- m_bcglookup256[0x200 + RGB_RED(newval)] |
- m_bcglookup256[0x100 + RGB_GREEN(newval)] |
- m_bcglookup256[0x000 + RGB_BLUE(newval)];
+ m_bcglookup256[0x200 + RGB_RED(newval)] |
+ m_bcglookup256[0x100 + RGB_GREEN(newval)] |
+ m_bcglookup256[0x000 + RGB_BLUE(newval)];
}
}
}
@@ -934,9 +934,9 @@ void render_container::update_palette()
UINT32 finalentry = entry32 * 32 + entry;
rgb_t newval = adjusted_palette[finalentry];
m_bcglookup[finalentry] = (newval & 0xff000000) |
- m_bcglookup256[0x200 + RGB_RED(newval)] |
- m_bcglookup256[0x100 + RGB_GREEN(newval)] |
- m_bcglookup256[0x000 + RGB_BLUE(newval)];
+ m_bcglookup256[0x200 + RGB_RED(newval)] |
+ m_bcglookup256[0x100 + RGB_GREEN(newval)] |
+ m_bcglookup256[0x000 + RGB_BLUE(newval)];
}
}
}
@@ -949,13 +949,13 @@ void render_container::update_palette()
render_container::user_settings::user_settings()
: m_orientation(0),
- m_brightness(1.0f),
- m_contrast(1.0f),
- m_gamma(1.0f),
- m_xscale(1.0f),
- m_yscale(1.0f),
- m_xoffset(0.0f),
- m_yoffset(0.0f)
+ m_brightness(1.0f),
+ m_contrast(1.0f),
+ m_gamma(1.0f),
+ m_xscale(1.0f),
+ m_yscale(1.0f),
+ m_xoffset(0.0f),
+ m_yoffset(0.0f)
{
}
@@ -971,21 +971,21 @@ render_container::user_settings::user_settings()
render_target::render_target(render_manager &manager, const char *layoutfile, UINT32 flags)
: m_next(NULL),
- m_manager(manager),
- m_curview(NULL),
- m_filelist(*auto_alloc(manager.machine(), simple_list<layout_file>(manager.machine().respool()))),
- m_flags(flags),
- m_listindex(0),
- m_width(640),
- m_height(480),
- m_pixel_aspect(0.0f),
- m_max_refresh(0),
- m_orientation(0),
- m_base_view(NULL),
- m_base_orientation(ROT0),
- m_maxtexwidth(65536),
- m_maxtexheight(65536),
- m_debug_containers(manager.machine().respool())
+ m_manager(manager),
+ m_curview(NULL),
+ m_filelist(*auto_alloc(manager.machine(), simple_list<layout_file>(manager.machine().respool()))),
+ m_flags(flags),
+ m_listindex(0),
+ m_width(640),
+ m_height(480),
+ m_pixel_aspect(0.0f),
+ m_max_refresh(0),
+ m_orientation(0),
+ m_base_view(NULL),
+ m_base_orientation(ROT0),
+ m_maxtexwidth(65536),
+ m_maxtexheight(65536),
+ m_debug_containers(manager.machine().respool())
{
// determine the base layer configuration based on options
m_base_layerconfig.set_backdrops_enabled(manager.machine().options().use_backdrops());
@@ -1346,7 +1346,7 @@ render_primitive_list &render_target::get_primitives()
root_xform.yscale = (float)visheight;
root_xform.color.r = root_xform.color.g = root_xform.color.b = root_xform.color.a = 1.0f;
root_xform.orientation = m_orientation;
- root_xform.no_center = false;
+ root_xform.no_center = false;
// iterate over layers back-to-front, but only if we're running
if (m_manager.machine().phase() >= MACHINE_PHASE_RESET)
@@ -1375,7 +1375,7 @@ render_primitive_list &render_target::get_primitives()
item_xform.color.b = curitem->color().b * root_xform.color.b;
item_xform.color.a = curitem->color().a * root_xform.color.a;
item_xform.orientation = orientation_add(curitem->orientation(), root_xform.orientation);
- item_xform.no_center = false;
+ item_xform.no_center = false;
// if there is no associated element, it must be a screen element
if (curitem->screen() != NULL)
@@ -1435,7 +1435,7 @@ render_primitive_list &render_target::get_primitives()
ui_xform.yscale = (float) m_height;
ui_xform.color.r = ui_xform.color.g = ui_xform.color.b = ui_xform.color.a = 1.0f;
ui_xform.orientation = m_orientation;
- ui_xform.no_center = false;
+ ui_xform.no_center = false;
// add UI elements
add_container_primitives(list, ui_xform, m_manager.ui_container(), BLENDMODE_ALPHA);
@@ -2438,12 +2438,12 @@ done:
render_manager::render_manager(running_machine &machine)
: m_machine(machine),
- m_targetlist(machine.respool()),
- m_ui_target(NULL),
- m_live_textures(0),
- m_texture_allocator(machine.respool()),
- m_ui_container(auto_alloc(machine, render_container(*this))),
- m_screen_container_list(machine.respool())
+ m_targetlist(machine.respool()),
+ m_ui_target(NULL),
+ m_live_textures(0),
+ m_texture_allocator(machine.respool()),
+ m_ui_container(auto_alloc(machine, render_container(*this))),
+ m_screen_container_list(machine.respool())
{
// register callbacks
config_register(machine, "video", config_saveload_delegate(FUNC(render_manager::config_load), this), config_saveload_delegate(FUNC(render_manager::config_save), this));
diff --git a/src/emu/render.h b/src/emu/render.h
index d71a1f8ffba..e67f6fcfdca 100644
--- a/src/emu/render.h
+++ b/src/emu/render.h
@@ -88,28 +88,28 @@
// texture formats
enum texture_format
{
- TEXFORMAT_UNDEFINED = 0, // require a format to be specified
- TEXFORMAT_PALETTE16, // 16bpp palettized, alpha ignored
- TEXFORMAT_PALETTEA16, // 16bpp palettized, alpha respected
- TEXFORMAT_RGB32, // 32bpp 8-8-8 RGB
- TEXFORMAT_ARGB32, // 32bpp 8-8-8-8 ARGB
- TEXFORMAT_YUY16 // 16bpp 8-8 Y/Cb, Y/Cr in sequence
+ TEXFORMAT_UNDEFINED = 0, // require a format to be specified
+ TEXFORMAT_PALETTE16, // 16bpp palettized, alpha ignored
+ TEXFORMAT_PALETTEA16, // 16bpp palettized, alpha respected
+ TEXFORMAT_RGB32, // 32bpp 8-8-8 RGB
+ TEXFORMAT_ARGB32, // 32bpp 8-8-8-8 ARGB
+ TEXFORMAT_YUY16 // 16bpp 8-8 Y/Cb, Y/Cr in sequence
};
// blending modes
enum
{
- BLENDMODE_NONE = 0, // no blending
- BLENDMODE_ALPHA, // standard alpha blend
- BLENDMODE_RGB_MULTIPLY, // apply source alpha to source pix, then multiply RGB values
- BLENDMODE_ADD // apply source alpha to source pix, then add to destination
+ BLENDMODE_NONE = 0, // no blending
+ BLENDMODE_ALPHA, // standard alpha blend
+ BLENDMODE_RGB_MULTIPLY, // apply source alpha to source pix, then multiply RGB values
+ BLENDMODE_ADD // apply source alpha to source pix, then add to destination
};
// render creation flags
-const UINT8 RENDER_CREATE_NO_ART = 0x01; // ignore any views that have art in them
-const UINT8 RENDER_CREATE_SINGLE_FILE = 0x02; // only load views from the file specified
-const UINT8 RENDER_CREATE_HIDDEN = 0x04; // don't make this target visible
+const UINT8 RENDER_CREATE_NO_ART = 0x01; // ignore any views that have art in them
+const UINT8 RENDER_CREATE_SINGLE_FILE = 0x02; // only load views from the file specified
+const UINT8 RENDER_CREATE_HIDDEN = 0x04; // don't make this target visible
// flags for primitives
@@ -149,32 +149,32 @@ const UINT32 PRIMFLAG_TYPE_QUAD = 1 << PRIMFLAG_TYPE_SHIFT;
// MACROS
//**************************************************************************
-#define PRIMFLAG_TEXORIENT(x) ((x) << PRIMFLAG_TEXORIENT_SHIFT)
-#define PRIMFLAG_GET_TEXORIENT(x) (((x) & PRIMFLAG_TEXORIENT_MASK) >> PRIMFLAG_TEXORIENT_SHIFT)
+#define PRIMFLAG_TEXORIENT(x) ((x) << PRIMFLAG_TEXORIENT_SHIFT)
+#define PRIMFLAG_GET_TEXORIENT(x) (((x) & PRIMFLAG_TEXORIENT_MASK) >> PRIMFLAG_TEXORIENT_SHIFT)
-#define PRIMFLAG_TEXFORMAT(x) ((x) << PRIMFLAG_TEXFORMAT_SHIFT)
-#define PRIMFLAG_GET_TEXFORMAT(x) (((x) & PRIMFLAG_TEXFORMAT_MASK) >> PRIMFLAG_TEXFORMAT_SHIFT)
+#define PRIMFLAG_TEXFORMAT(x) ((x) << PRIMFLAG_TEXFORMAT_SHIFT)
+#define PRIMFLAG_GET_TEXFORMAT(x) (((x) & PRIMFLAG_TEXFORMAT_MASK) >> PRIMFLAG_TEXFORMAT_SHIFT)
-#define PRIMFLAG_BLENDMODE(x) ((x) << PRIMFLAG_BLENDMODE_SHIFT)
-#define PRIMFLAG_GET_BLENDMODE(x) (((x) & PRIMFLAG_BLENDMODE_MASK) >> PRIMFLAG_BLENDMODE_SHIFT)
+#define PRIMFLAG_BLENDMODE(x) ((x) << PRIMFLAG_BLENDMODE_SHIFT)
+#define PRIMFLAG_GET_BLENDMODE(x) (((x) & PRIMFLAG_BLENDMODE_MASK) >> PRIMFLAG_BLENDMODE_SHIFT)
-#define PRIMFLAG_ANTIALIAS(x) ((x) << PRIMFLAG_ANTIALIAS_SHIFT)
-#define PRIMFLAG_GET_ANTIALIAS(x) (((x) & PRIMFLAG_ANTIALIAS_MASK) >> PRIMFLAG_ANTIALIAS_SHIFT)
+#define PRIMFLAG_ANTIALIAS(x) ((x) << PRIMFLAG_ANTIALIAS_SHIFT)
+#define PRIMFLAG_GET_ANTIALIAS(x) (((x) & PRIMFLAG_ANTIALIAS_MASK) >> PRIMFLAG_ANTIALIAS_SHIFT)
-#define PRIMFLAG_SCREENTEX(x) ((x) << PRIMFLAG_SCREENTEX_SHIFT)
-#define PRIMFLAG_GET_SCREENTEX(x) (((x) & PRIMFLAG_SCREENTEX_MASK) >> PRIMFLAG_SCREENTEX_SHIFT)
+#define PRIMFLAG_SCREENTEX(x) ((x) << PRIMFLAG_SCREENTEX_SHIFT)
+#define PRIMFLAG_GET_SCREENTEX(x) (((x) & PRIMFLAG_SCREENTEX_MASK) >> PRIMFLAG_SCREENTEX_SHIFT)
-#define PRIMFLAG_TEXWRAP(x) ((x) << PRIMFLAG_TEXWRAP_SHIFT)
-#define PRIMFLAG_GET_TEXWRAP(x) (((x) & PRIMFLAG_TEXWRAP_MASK) >> PRIMFLAG_TEXWRAP_SHIFT)
+#define PRIMFLAG_TEXWRAP(x) ((x) << PRIMFLAG_TEXWRAP_SHIFT)
+#define PRIMFLAG_GET_TEXWRAP(x) (((x) & PRIMFLAG_TEXWRAP_MASK) >> PRIMFLAG_TEXWRAP_SHIFT)
-#define PRIMFLAG_TEXSHADE(x) ((x) << PRIMFLAG_TEXSHADE_SHIFT)
-#define PRIMFLAG_GET_TEXSHADE(x) (((x) & PRIMFLAG_TEXSHADE_MASK) >> PRIMFLAG_TEXSHADE_SHIFT)
+#define PRIMFLAG_TEXSHADE(x) ((x) << PRIMFLAG_TEXSHADE_SHIFT)
+#define PRIMFLAG_GET_TEXSHADE(x) (((x) & PRIMFLAG_TEXSHADE_MASK) >> PRIMFLAG_TEXSHADE_SHIFT)
-#define PRIMFLAG_VECTOR(x) ((x) << PRIMFLAG_VECTOR_SHIFT)
-#define PRIMFLAG_GET_VECTOR(x) (((x) & PRIMFLAG_VECTOR_MASK) >> PRIMFLAG_VECTOR_SHIFT)
+#define PRIMFLAG_VECTOR(x) ((x) << PRIMFLAG_VECTOR_SHIFT)
+#define PRIMFLAG_GET_VECTOR(x) (((x) & PRIMFLAG_VECTOR_MASK) >> PRIMFLAG_VECTOR_SHIFT)
-#define PRIMFLAG_VECTORBUF(x) ((x) << PRIMFLAG_VECTORBUF_SHIFT)
-#define PRIMFLAG_GET_VECTORBUF(x) (((x) & PRIMFLAG_VECTORBUF_MASK) >> PRIMFLAG_VECTORBUF_SHIFT)
+#define PRIMFLAG_VECTORBUF(x) ((x) << PRIMFLAG_VECTORBUF_SHIFT)
+#define PRIMFLAG_GET_VECTORBUF(x) (((x) & PRIMFLAG_VECTORBUF_MASK) >> PRIMFLAG_VECTORBUF_SHIFT)
//**************************************************************************
@@ -201,10 +201,10 @@ typedef void (*texture_scaler_func)(bitmap_argb32 &dest, bitmap_argb32 &source,
// render_bounds - floating point bounding rectangle
struct render_bounds
{
- float x0; // leftmost X coordinate
- float y0; // topmost Y coordinate
- float x1; // rightmost X coordinate
- float y1; // bottommost Y coordinate
+ float x0; // leftmost X coordinate
+ float y0; // topmost Y coordinate
+ float x1; // rightmost X coordinate
+ float y1; // bottommost Y coordinate
float width() const { return x1 - x0; }
float height() const { return y1 - y0; }
@@ -214,41 +214,41 @@ struct render_bounds
// render_color - floating point set of ARGB values
struct render_color
{
- float a; // alpha component (0.0 = transparent, 1.0 = opaque)
- float r; // red component (0.0 = none, 1.0 = max)
- float g; // green component (0.0 = none, 1.0 = max)
- float b; // blue component (0.0 = none, 1.0 = max)
+ float a; // alpha component (0.0 = transparent, 1.0 = opaque)
+ float r; // red component (0.0 = none, 1.0 = max)
+ float g; // green component (0.0 = none, 1.0 = max)
+ float b; // blue component (0.0 = none, 1.0 = max)
};
// render_texuv - floating point set of UV texture coordinates
struct render_texuv
{
- float u; // U coodinate (0.0-1.0)
- float v; // V coordinate (0.0-1.0)
+ float u; // U coodinate (0.0-1.0)
+ float v; // V coordinate (0.0-1.0)
};
// render_quad_texuv - floating point set of UV texture coordinates
struct render_quad_texuv
{
- render_texuv tl; // top-left UV coordinate
- render_texuv tr; // top-right UV coordinate
- render_texuv bl; // bottom-left UV coordinate
- render_texuv br; // bottom-right UV coordinate
+ render_texuv tl; // top-left UV coordinate
+ render_texuv tr; // top-right UV coordinate
+ render_texuv bl; // bottom-left UV coordinate
+ render_texuv br; // bottom-right UV coordinate
};
// render_texinfo - texture information
struct render_texinfo
{
- void * base; // base of the data
- UINT32 rowpixels; // pixels per row
- UINT32 width; // width of the image
- UINT32 height; // height of the image
- const rgb_t * palette; // palette for PALETTE16 textures, LUTs for RGB15/RGB32
- UINT32 seqid; // sequence ID
- UINT64 osddata; // aux data to pass to osd
+ void * base; // base of the data
+ UINT32 rowpixels; // pixels per row
+ UINT32 width; // width of the image
+ UINT32 height; // height of the image
+ const rgb_t * palette; // palette for PALETTE16 textures, LUTs for RGB15/RGB32
+ UINT32 seqid; // sequence ID
+ UINT64 osddata; // aux data to pass to osd
};
@@ -267,11 +267,11 @@ class render_screen_list
// construction/destruction
item(screen_device &screen)
: m_next(NULL),
- m_screen(screen) { }
+ m_screen(screen) { }
// state
- item * m_next; // next screen in list
- screen_device & m_screen; // reference to screen device
+ item * m_next; // next screen in list
+ screen_device & m_screen; // reference to screen device
};
public:
@@ -305,13 +305,13 @@ private:
// render_layer_config - describes the state of layers
class render_layer_config
{
- static const UINT8 ENABLE_BACKDROP = 0x01; // enable backdrop layers
- static const UINT8 ENABLE_OVERLAY = 0x02; // enable overlay layers
- static const UINT8 ENABLE_BEZEL = 0x04; // enable bezel layers
- static const UINT8 ENABLE_CPANEL = 0x08; // enable cpanel layers
- static const UINT8 ENABLE_MARQUEE = 0x10; // enable marquee layers
- static const UINT8 ZOOM_TO_SCREEN = 0x20; // zoom to screen area by default
- static const UINT8 ENABLE_SCREEN_OVERLAY = 0x40; // enable screen overlays
+ static const UINT8 ENABLE_BACKDROP = 0x01; // enable backdrop layers
+ static const UINT8 ENABLE_OVERLAY = 0x02; // enable overlay layers
+ static const UINT8 ENABLE_BEZEL = 0x04; // enable bezel layers
+ static const UINT8 ENABLE_CPANEL = 0x08; // enable cpanel layers
+ static const UINT8 ENABLE_MARQUEE = 0x10; // enable marquee layers
+ static const UINT8 ZOOM_TO_SCREEN = 0x20; // zoom to screen area by default
+ static const UINT8 ENABLE_SCREEN_OVERLAY = 0x40; // enable screen overlays
static const UINT8 DEFAULT = ENABLE_BACKDROP | ENABLE_OVERLAY | ENABLE_BEZEL | ENABLE_CPANEL | ENABLE_MARQUEE | ENABLE_SCREEN_OVERLAY;
public:
@@ -338,7 +338,7 @@ public:
render_layer_config &set_zoom_to_screen(bool zoom) { if (zoom) m_state |= ZOOM_TO_SCREEN; else m_state &= ~ZOOM_TO_SCREEN; return *this; }
private:
- UINT8 m_state;
+ UINT8 m_state;
};
@@ -353,9 +353,9 @@ public:
// render primitive types
enum primitive_type
{
- INVALID = 0, // invalid type
- LINE, // a single line
- QUAD // a rectilinear quad
+ INVALID = 0, // invalid type
+ LINE, // a single line
+ QUAD // a rectilinear quad
};
// getters
@@ -365,17 +365,17 @@ public:
void reset();
// public state
- primitive_type type; // type of primitive
- render_bounds bounds; // bounds or positions
- render_color color; // RGBA values
- UINT32 flags; // flags
- float width; // width (for line primitives)
- render_texinfo texture; // texture info (for quad primitives)
- render_quad_texuv texcoords; // texture coordinates (for quad primitives)
+ primitive_type type; // type of primitive
+ render_bounds bounds; // bounds or positions
+ render_color color; // RGBA values
+ UINT32 flags; // flags
+ float width; // width (for line primitives)
+ render_texinfo texture; // texture info (for quad primitives)
+ render_quad_texuv texcoords; // texture coordinates (for quad primitives)
private:
// internal state
- render_primitive * m_next; // pointer to next element
+ render_primitive * m_next; // pointer to next element
};
@@ -414,18 +414,18 @@ private:
{
public:
reference *next() const { return m_next; }
- reference * m_next; // link to the next reference
- void * m_refptr; // reference pointer
+ reference * m_next; // link to the next reference
+ void * m_refptr; // reference pointer
};
// internal state
- simple_list<render_primitive> m_primlist; // list of primitives
- simple_list<reference> m_reflist; // list of references
+ simple_list<render_primitive> m_primlist; // list of primitives
+ simple_list<reference> m_reflist; // list of references
fixed_allocator<render_primitive> m_primitive_allocator;// allocator for primitives
- fixed_allocator<reference> m_reference_allocator; // allocator for references
+ fixed_allocator<reference> m_reference_allocator; // allocator for references
- osd_lock * m_lock; // lock to protect list accesses
+ osd_lock * m_lock; // lock to protect list accesses
};
@@ -473,25 +473,25 @@ private:
// a scaled_texture contains a single scaled entry for a texture
struct scaled_texture
{
- bitmap_argb32 * bitmap; // final bitmap
- UINT32 seqid; // sequence number
+ bitmap_argb32 * bitmap; // final bitmap
+ UINT32 seqid; // sequence number
};
// internal state
- render_manager * m_manager; // reference to our manager
- render_texture * m_next; // next texture (for free list)
- bitmap_t * m_bitmap; // pointer to the original bitmap
- rectangle m_sbounds; // source bounds within the bitmap
- texture_format m_format; // format of the texture data
- rgb_t * m_bcglookup; // dynamically allocated B/C/G lookup table
- UINT32 m_bcglookup_entries; // number of B/C/G lookup entries allocated
- UINT64 m_osddata; // aux data to pass to osd
+ render_manager * m_manager; // reference to our manager
+ render_texture * m_next; // next texture (for free list)
+ bitmap_t * m_bitmap; // pointer to the original bitmap
+ rectangle m_sbounds; // source bounds within the bitmap
+ texture_format m_format; // format of the texture data
+ rgb_t * m_bcglookup; // dynamically allocated B/C/G lookup table
+ UINT32 m_bcglookup_entries; // number of B/C/G lookup entries allocated
+ UINT64 m_osddata; // aux data to pass to osd
// scaling state (ARGB32 only)
- texture_scaler_func m_scaler; // scaling callback
- void * m_param; // scaling callback parameter
- UINT32 m_curseq; // current sequence number
- scaled_texture m_scaled[MAX_TEXTURE_SCALES];// array of scaled variants of this texture
+ texture_scaler_func m_scaler; // scaling callback
+ void * m_param; // scaling callback parameter
+ UINT32 m_curseq; // current sequence number
+ scaled_texture m_scaled[MAX_TEXTURE_SCALES];// array of scaled variants of this texture
};
@@ -517,14 +517,14 @@ public:
user_settings();
// public state
- int m_orientation; // orientation
- float m_brightness; // brightness
- float m_contrast; // contrast
- float m_gamma; // gamma
- float m_xscale; // horizontal scale factor
- float m_yscale; // vertical scale factor
- float m_xoffset; // horizontal offset
- float m_yoffset; // vertical offset
+ int m_orientation; // orientation
+ float m_brightness; // brightness
+ float m_contrast; // contrast
+ float m_gamma; // gamma
+ float m_xscale; // horizontal scale factor
+ float m_yscale; // vertical scale factor
+ float m_xoffset; // horizontal offset
+ float m_yoffset; // vertical offset
};
// getters
@@ -580,14 +580,14 @@ private:
private:
// internal state
- item * m_next; // pointer to the next element in the list
- UINT8 m_type; // type of element
- render_bounds m_bounds; // bounds of the element
- render_color m_color; // RGBA factors
- UINT32 m_flags; // option flags
- UINT32 m_internal; // internal flags
- float m_width; // width of the line (lines only)
- render_texture * m_texture; // pointer to the source texture (quads only)
+ item * m_next; // pointer to the next element in the list
+ UINT8 m_type; // type of element
+ render_bounds m_bounds; // bounds of the element
+ render_color m_color; // RGBA factors
+ UINT32 m_flags; // option flags
+ UINT32 m_internal; // internal flags
+ float m_width; // width of the line (lines only)
+ render_texture * m_texture; // pointer to the source texture (quads only)
};
// generic screen overlay scaler
@@ -600,17 +600,17 @@ private:
void update_palette();
// internal state
- render_container * m_next; // the next container in the list
- render_manager & m_manager; // reference back to the owning manager
- simple_list<item> m_itemlist; // head of the item list
- fixed_allocator<item> m_item_allocator; // free container items
- screen_device * m_screen; // the screen device
- user_settings m_user; // user settings
- bitmap_argb32 * m_overlaybitmap; // overlay bitmap
- render_texture * m_overlaytexture; // overlay texture
- palette_client * m_palclient; // client to the system palette
- rgb_t m_bcglookup256[0x400]; // lookup table for brightness/contrast/gamma
- rgb_t m_bcglookup[0x10000]; // full palette lookup with bcg adjustements
+ render_container * m_next; // the next container in the list
+ render_manager & m_manager; // reference back to the owning manager
+ simple_list<item> m_itemlist; // head of the item list
+ fixed_allocator<item> m_item_allocator; // free container items
+ screen_device * m_screen; // the screen device
+ user_settings m_user; // user settings
+ bitmap_argb32 * m_overlaybitmap; // overlay bitmap
+ render_texture * m_overlaytexture; // overlay texture
+ palette_client * m_palclient; // client to the system palette
+ rgb_t m_bcglookup256[0x400]; // lookup table for brightness/contrast/gamma
+ rgb_t m_bcglookup[0x10000]; // full palette lookup with bcg adjustements
};
@@ -721,28 +721,28 @@ private:
static const int MAX_CLEAR_EXTENTS = 1000;
// internal state
- render_target * m_next; // link to next target
- render_manager & m_manager; // reference to our owning manager
- layout_view * m_curview; // current view
- simple_list<layout_file> &m_filelist; // list of layout files
- UINT32 m_flags; // creation flags
- render_primitive_list m_primlist[NUM_PRIMLISTS]; // list of primitives
- int m_listindex; // index of next primlist to use
- INT32 m_width; // width in pixels
- INT32 m_height; // height in pixels
- render_bounds m_bounds; // bounds of the target
- float m_pixel_aspect; // aspect ratio of individual pixels
- float m_max_refresh; // maximum refresh rate, 0 or if none
- int m_orientation; // orientation
- render_layer_config m_layerconfig; // layer configuration
- layout_view * m_base_view; // the view at the time of first frame
- int m_base_orientation; // the orientation at the time of first frame
- render_layer_config m_base_layerconfig; // the layer configuration at the time of first frame
- int m_maxtexwidth; // maximum width of a texture
- int m_maxtexheight; // maximum height of a texture
- simple_list<render_container> m_debug_containers; // list of debug containers
- INT32 m_clear_extent_count; // number of clear extents
- INT32 m_clear_extents[MAX_CLEAR_EXTENTS]; // array of clear extents
+ render_target * m_next; // link to next target
+ render_manager & m_manager; // reference to our owning manager
+ layout_view * m_curview; // current view
+ simple_list<layout_file> &m_filelist; // list of layout files
+ UINT32 m_flags; // creation flags
+ render_primitive_list m_primlist[NUM_PRIMLISTS]; // list of primitives
+ int m_listindex; // index of next primlist to use
+ INT32 m_width; // width in pixels
+ INT32 m_height; // height in pixels
+ render_bounds m_bounds; // bounds of the target
+ float m_pixel_aspect; // aspect ratio of individual pixels
+ float m_max_refresh; // maximum refresh rate, 0 or if none
+ int m_orientation; // orientation
+ render_layer_config m_layerconfig; // layer configuration
+ layout_view * m_base_view; // the view at the time of first frame
+ int m_base_orientation; // the orientation at the time of first frame
+ render_layer_config m_base_layerconfig; // the layer configuration at the time of first frame
+ int m_maxtexwidth; // maximum width of a texture
+ int m_maxtexheight; // maximum height of a texture
+ simple_list<render_container> m_debug_containers; // list of debug containers
+ INT32 m_clear_extent_count; // number of clear extents
+ INT32 m_clear_extents[MAX_CLEAR_EXTENTS]; // array of clear extents
static const render_screen_list s_empty_screen_list;
};
@@ -802,20 +802,20 @@ private:
void config_save(int config_type, xml_data_node *parentnode);
// internal state
- running_machine & m_machine; // reference back to the machine
+ running_machine & m_machine; // reference back to the machine
// array of live targets
- simple_list<render_target> m_targetlist; // list of targets
- render_target * m_ui_target; // current UI target
+ simple_list<render_target> m_targetlist; // list of targets
+ render_target * m_ui_target; // current UI target
// texture lists
- UINT32 m_live_textures; // number of live textures
- fixed_allocator<render_texture> m_texture_allocator;// texture allocator
+ UINT32 m_live_textures; // number of live textures
+ fixed_allocator<render_texture> m_texture_allocator;// texture allocator
// containers for the UI and for screens
- render_container * m_ui_container; // UI container
- simple_list<render_container> m_screen_container_list; // list of containers for the screen
+ render_container * m_ui_container; // UI container
+ simple_list<render_container> m_screen_container_list; // list of containers for the screen
};
-#endif // __RENDER_H__
+#endif // __RENDER_H__
diff --git a/src/emu/rendersw.c b/src/emu/rendersw.c
index 1cd63727c7c..95655356f45 100644
--- a/src/emu/rendersw.c
+++ b/src/emu/rendersw.c
@@ -51,10 +51,10 @@ private:
// internal structs
struct quad_setup_data
{
- INT32 dudx, dvdx, dudy, dvdy;
- INT32 startu, startv;
- INT32 startx, starty;
- INT32 endx, endy;
+ INT32 dudx, dvdx, dudy, dvdy;
+ INT32 startu, startv;
+ INT32 startx, starty;
+ INT32 endx, endy;
};
// internal helpers
@@ -105,42 +105,42 @@ private:
{
// original equations:
//
- // C = Y - 16
- // D = Cb - 128
- // E = Cr - 128
+ // C = Y - 16
+ // D = Cb - 128
+ // E = Cr - 128
//
- // R = clip(( 298 * C + 409 * E + 128) >> 8)
- // G = clip(( 298 * C - 100 * D - 208 * E + 128) >> 8)
- // B = clip(( 298 * C + 516 * D + 128) >> 8)
+ // R = clip(( 298 * C + 409 * E + 128) >> 8)
+ // G = clip(( 298 * C - 100 * D - 208 * E + 128) >> 8)
+ // B = clip(( 298 * C + 516 * D + 128) >> 8)
//
- // R = clip(( 298 * (Y - 16) + 409 * (Cr - 128) + 128) >> 8)
- // G = clip(( 298 * (Y - 16) - 100 * (Cb - 128) - 208 * (Cr - 128) + 128) >> 8)
- // B = clip(( 298 * (Y - 16) + 516 * (Cb - 128) + 128) >> 8)
+ // R = clip(( 298 * (Y - 16) + 409 * (Cr - 128) + 128) >> 8)
+ // G = clip(( 298 * (Y - 16) - 100 * (Cb - 128) - 208 * (Cr - 128) + 128) >> 8)
+ // B = clip(( 298 * (Y - 16) + 516 * (Cb - 128) + 128) >> 8)
//
- // R = clip(( 298 * Y - 298 * 16 + 409 * Cr - 409 * 128 + 128) >> 8)
- // G = clip(( 298 * Y - 298 * 16 - 100 * Cb + 100 * 128 - 208 * Cr + 208 * 128 + 128) >> 8)
- // B = clip(( 298 * Y - 298 * 16 + 516 * Cb - 516 * 128 + 128) >> 8)
+ // R = clip(( 298 * Y - 298 * 16 + 409 * Cr - 409 * 128 + 128) >> 8)
+ // G = clip(( 298 * Y - 298 * 16 - 100 * Cb + 100 * 128 - 208 * Cr + 208 * 128 + 128) >> 8)
+ // B = clip(( 298 * Y - 298 * 16 + 516 * Cb - 516 * 128 + 128) >> 8)
//
- // R = clip(( 298 * Y - 298 * 16 + 409 * Cr - 409 * 128 + 128) >> 8)
- // G = clip(( 298 * Y - 298 * 16 - 100 * Cb + 100 * 128 - 208 * Cr + 208 * 128 + 128) >> 8)
- // B = clip(( 298 * Y - 298 * 16 + 516 * Cb - 516 * 128 + 128) >> 8)
+ // R = clip(( 298 * Y - 298 * 16 + 409 * Cr - 409 * 128 + 128) >> 8)
+ // G = clip(( 298 * Y - 298 * 16 - 100 * Cb + 100 * 128 - 208 * Cr + 208 * 128 + 128) >> 8)
+ // B = clip(( 298 * Y - 298 * 16 + 516 * Cb - 516 * 128 + 128) >> 8)
//
- // Now combine constants:
+ // Now combine constants:
//
- // R = clip(( 298 * Y + 409 * Cr - 56992) >> 8)
- // G = clip(( 298 * Y - 100 * Cb - 208 * Cr + 34784) >> 8)
- // B = clip(( 298 * Y + 516 * Cb - 70688) >> 8)
+ // R = clip(( 298 * Y + 409 * Cr - 56992) >> 8)
+ // G = clip(( 298 * Y - 100 * Cb - 208 * Cr + 34784) >> 8)
+ // B = clip(( 298 * Y + 516 * Cb - 70688) >> 8)
//
- // Define common = 298 * y - 56992. This will save one addition
+ // Define common = 298 * y - 56992. This will save one addition
//
- // R = clip(( common + 409 * Cr - 0) >> 8)
- // G = clip(( common - 100 * Cb - 208 * Cr + 91776) >> 8)
- // B = clip(( common + 516 * Cb - 13696) >> 8)
+ // R = clip(( common + 409 * Cr - 0) >> 8)
+ // G = clip(( common - 100 * Cb - 208 * Cr + 91776) >> 8)
+ // B = clip(( common + 516 * Cb - 13696) >> 8)
//
- UINT8 y = ycc;
- UINT8 cb = ycc >> 8;
- UINT8 cr = ycc >> 16;
+ UINT8 y = ycc;
+ UINT8 cb = ycc >> 8;
+ UINT8 cr = ycc >> 16;
UINT32 common = 298 * y - 56992;
UINT32 r = (common + 409 * cr);
@@ -565,7 +565,7 @@ private:
// only support alpha and "none" blendmodes
assert(PRIMFLAG_GET_BLENDMODE(prim.flags) == BLENDMODE_NONE ||
- PRIMFLAG_GET_BLENDMODE(prim.flags) == BLENDMODE_ALPHA);
+ PRIMFLAG_GET_BLENDMODE(prim.flags) == BLENDMODE_ALPHA);
// fast case: no alpha
if (PRIMFLAG_GET_BLENDMODE(prim.flags) == BLENDMODE_NONE || is_opaque(prim.color.a))
diff --git a/src/emu/rendfont.c b/src/emu/rendfont.c
index aa6c4f07937..d91d1d5b67f 100644
--- a/src/emu/rendfont.c
+++ b/src/emu/rendfont.c
@@ -108,13 +108,13 @@ inline render_font::glyph &render_font::get_char(unicode_char chnum)
render_font::render_font(render_manager &manager, const char *filename)
: m_manager(manager),
- m_format(FF_UNKNOWN),
- m_height(0),
- m_yoffs(0),
- m_scale(1.0f),
- m_rawdata(NULL),
- m_rawsize(0),
- m_osdfont(NULL)
+ m_format(FF_UNKNOWN),
+ m_height(0),
+ m_yoffs(0),
+ m_scale(1.0f),
+ m_rawdata(NULL),
+ m_rawsize(0),
+ m_osdfont(NULL)
{
memset(m_glyphs, 0, sizeof(m_glyphs));
diff --git a/src/emu/rendfont.h b/src/emu/rendfont.h
index 6c55a2b72ed..62d562d52ff 100644
--- a/src/emu/rendfont.h
+++ b/src/emu/rendfont.h
@@ -79,12 +79,12 @@ private:
class glyph
{
public:
- INT32 width; // width from this character to the next
- INT32 xoffs, yoffs; // X and Y offset from baseline to top,left of bitmap
- INT32 bmwidth, bmheight; // width and height of bitmap
- const char * rawdata; // pointer to the raw data for this one
- bitmap_argb32 bitmap; // pointer to the bitmap containing the raw data
- render_texture * texture; // pointer to a texture for rendering and sizing
+ INT32 width; // width from this character to the next
+ INT32 xoffs, yoffs; // X and Y offset from baseline to top,left of bitmap
+ INT32 bmwidth, bmheight; // width and height of bitmap
+ const char * rawdata; // pointer to the raw data for this one
+ bitmap_argb32 bitmap; // pointer to the bitmap containing the raw data
+ render_texture * texture; // pointer to a texture for rendering and sizing
};
// internal format
@@ -105,21 +105,21 @@ private:
bool save_cached(const char *filename, UINT32 hash);
// internal state
- render_manager & m_manager;
- format m_format; // format of font data
- int m_height; // height of the font, from ascent to descent
- int m_yoffs; // y offset from baseline to descent
- float m_scale; // 1 / height precomputed
- glyph * m_glyphs[256]; // array of glyph subtables
- const char * m_rawdata; // pointer to the raw data for the font
- UINT64 m_rawsize; // size of the raw font data
- osd_font m_osdfont; // handle to the OSD font
+ render_manager & m_manager;
+ format m_format; // format of font data
+ int m_height; // height of the font, from ascent to descent
+ int m_yoffs; // y offset from baseline to descent
+ float m_scale; // 1 / height precomputed
+ glyph * m_glyphs[256]; // array of glyph subtables
+ const char * m_rawdata; // pointer to the raw data for the font
+ UINT64 m_rawsize; // size of the raw font data
+ osd_font m_osdfont; // handle to the OSD font
// constants
- static const int CACHED_CHAR_SIZE = 12;
- static const int CACHED_HEADER_SIZE = 16;
- static const int CACHED_BDF_HASH_SIZE = 1024;
+ static const int CACHED_CHAR_SIZE = 12;
+ static const int CACHED_HEADER_SIZE = 16;
+ static const int CACHED_BDF_HASH_SIZE = 1024;
};
-#endif /* __RENDFONT_H__ */
+#endif /* __RENDFONT_H__ */
diff --git a/src/emu/rendlay.c b/src/emu/rendlay.c
index 49e8372e1b1..206408fcd6d 100644
--- a/src/emu/rendlay.c
+++ b/src/emu/rendlay.c
@@ -404,11 +404,11 @@ static void parse_orientation(running_machine &machine, xml_data_node *orientnod
int rotate = xml_get_attribute_int_with_subst(machine, *orientnode, "rotate", 0);
switch (rotate)
{
- case 0: orientation = ROT0; break;
- case 90: orientation = ROT90; break;
- case 180: orientation = ROT180; break;
- case 270: orientation = ROT270; break;
- default: throw emu_fatalerror("Invalid rotation in XML orientation node: %d", rotate);
+ case 0: orientation = ROT0; break;
+ case 90: orientation = ROT90; break;
+ case 180: orientation = ROT180; break;
+ case 270: orientation = ROT270; break;
+ default: throw emu_fatalerror("Invalid rotation in XML orientation node: %d", rotate);
}
if (strcmp("yes", xml_get_attribute_string_with_subst(machine, *orientnode, "swapxy", "no")) == 0)
orientation ^= ORIENTATION_SWAP_XY;
@@ -430,11 +430,11 @@ static void parse_orientation(running_machine &machine, xml_data_node *orientnod
layout_element::layout_element(running_machine &machine, xml_data_node &elemnode, const char *dirname)
: m_next(NULL),
- m_machine(machine),
- m_complist(machine.respool()),
- m_defstate(0),
- m_maxstate(0),
- m_elemtex(NULL)
+ m_machine(machine),
+ m_complist(machine.respool()),
+ m_defstate(0),
+ m_maxstate(0),
+ m_elemtex(NULL)
{
// extract the name
const char *name = xml_get_attribute_string_with_subst(machine, elemnode, "name", NULL);
@@ -571,8 +571,8 @@ void layout_element::element_scale(bitmap_argb32 &dest, bitmap_argb32 &source, c
layout_element::texture::texture()
: m_element(NULL),
- m_texture(NULL),
- m_state(0)
+ m_texture(NULL),
+ m_state(0)
{
}
@@ -599,8 +599,8 @@ layout_element::texture::~texture()
layout_element::component::component(running_machine &machine, xml_data_node &compnode, const char *dirname)
: m_next(NULL),
- m_type(CTYPE_INVALID),
- m_state(0)
+ m_type(CTYPE_INVALID),
+ m_state(0)
{
for (int i=0;i<MAX_BITMAPS;i++)
{
@@ -1949,15 +1949,15 @@ void layout_element::component::apply_skew(bitmap_argb32 &dest, int skewwidth)
layout_view::layout_view(running_machine &machine, xml_data_node &viewnode, simple_list<layout_element> &elemlist)
: m_next(NULL),
- m_aspect(1.0f),
- m_scraspect(1.0f),
- m_screens(machine.respool()),
- m_backdrop_list(machine.respool()),
- m_screen_list(machine.respool()),
- m_overlay_list(machine.respool()),
- m_bezel_list(machine.respool()),
- m_cpanel_list(machine.respool()),
- m_marquee_list(machine.respool())
+ m_aspect(1.0f),
+ m_scraspect(1.0f),
+ m_screens(machine.respool()),
+ m_backdrop_list(machine.respool()),
+ m_screen_list(machine.respool()),
+ m_overlay_list(machine.respool()),
+ m_bezel_list(machine.respool()),
+ m_cpanel_list(machine.respool()),
+ m_marquee_list(machine.respool())
{
// allocate a copy of the name
m_name = xml_get_attribute_string_with_subst(machine, viewnode, "name", "");
@@ -2015,13 +2015,13 @@ layout_view::item *layout_view::first_item(item_layer layer) const
{
switch (layer)
{
- case ITEM_LAYER_BACKDROP: return m_backdrop_list.first();
- case ITEM_LAYER_SCREEN: return m_screen_list.first();
- case ITEM_LAYER_OVERLAY: return m_overlay_list.first();
- case ITEM_LAYER_BEZEL: return m_bezel_list.first();
- case ITEM_LAYER_CPANEL: return m_cpanel_list.first();
- case ITEM_LAYER_MARQUEE: return m_marquee_list.first();
- default: return NULL;
+ case ITEM_LAYER_BACKDROP: return m_backdrop_list.first();
+ case ITEM_LAYER_SCREEN: return m_screen_list.first();
+ case ITEM_LAYER_OVERLAY: return m_overlay_list.first();
+ case ITEM_LAYER_BEZEL: return m_bezel_list.first();
+ case ITEM_LAYER_CPANEL: return m_cpanel_list.first();
+ case ITEM_LAYER_MARQUEE: return m_marquee_list.first();
+ default: return NULL;
}
}
@@ -2046,12 +2046,12 @@ void layout_view::recompute(render_layer_config layerconfig)
// determine if this layer should be visible
switch (layer)
{
- case ITEM_LAYER_BACKDROP: m_layenabled[layer] = layerconfig.backdrops_enabled(); break;
- case ITEM_LAYER_OVERLAY: m_layenabled[layer] = layerconfig.overlays_enabled(); break;
- case ITEM_LAYER_BEZEL: m_layenabled[layer] = layerconfig.bezels_enabled(); break;
- case ITEM_LAYER_CPANEL: m_layenabled[layer] = layerconfig.cpanels_enabled(); break;
- case ITEM_LAYER_MARQUEE: m_layenabled[layer] = layerconfig.marquees_enabled(); break;
- default: m_layenabled[layer] = true; break;
+ case ITEM_LAYER_BACKDROP: m_layenabled[layer] = layerconfig.backdrops_enabled(); break;
+ case ITEM_LAYER_OVERLAY: m_layenabled[layer] = layerconfig.overlays_enabled(); break;
+ case ITEM_LAYER_BEZEL: m_layenabled[layer] = layerconfig.bezels_enabled(); break;
+ case ITEM_LAYER_CPANEL: m_layenabled[layer] = layerconfig.cpanels_enabled(); break;
+ case ITEM_LAYER_MARQUEE: m_layenabled[layer] = layerconfig.marquees_enabled(); break;
+ default: m_layenabled[layer] = true; break;
}
// only do it if requested
@@ -2136,10 +2136,10 @@ void layout_view::recompute(render_layer_config layerconfig)
layout_view::item::item(running_machine &machine, xml_data_node &itemnode, simple_list<layout_element> &elemlist)
: m_next(NULL),
- m_element(NULL),
- m_input_mask(0),
- m_screen(NULL),
- m_orientation(ROT0)
+ m_element(NULL),
+ m_input_mask(0),
+ m_screen(NULL),
+ m_orientation(ROT0)
{
// allocate a copy of the output name
m_output_name = xml_get_attribute_string_with_subst(machine, itemnode, "name", "");
@@ -2238,8 +2238,8 @@ int layout_view::item::state() const
layout_file::layout_file(running_machine &machine, xml_data_node &rootnode, const char *dirname)
: m_next(NULL),
- m_elemlist(machine.respool()),
- m_viewlist(machine.respool())
+ m_elemlist(machine.respool()),
+ m_viewlist(machine.respool())
{
// find the layout node
xml_data_node *mamelayoutnode = xml_get_sibling(rootnode.child, "mamelayout");
diff --git a/src/emu/rendlay.h b/src/emu/rendlay.h
index db33b3dea2c..21633a51dc6 100644
--- a/src/emu/rendlay.h
+++ b/src/emu/rendlay.h
@@ -155,28 +155,28 @@ private:
#define MAX_BITMAPS 32
// internal state
- component * m_next; // link to next component
- component_type m_type; // type of component
- int m_state; // state where this component is visible (-1 means all states)
- render_bounds m_bounds; // bounds of the element
- render_color m_color; // color of the element
- astring m_string; // string for text components
- int m_digits; // number of digits for simple counters
- int m_textalign; // text alignment to box
- bitmap_argb32 m_bitmap[MAX_BITMAPS]; // source bitmap for images
- astring m_dirname; // directory name of image file (for lazy loading)
- emu_file * m_file[MAX_BITMAPS]; // file object for reading image/alpha files
- astring m_imagefile[MAX_BITMAPS]; // name of the image file (for lazy loading)
- astring m_alphafile[MAX_BITMAPS]; // name of the alpha file (for lazy loading)
- bool m_hasalpha[MAX_BITMAPS]; // is there any alpha component present?
+ component * m_next; // link to next component
+ component_type m_type; // type of component
+ int m_state; // state where this component is visible (-1 means all states)
+ render_bounds m_bounds; // bounds of the element
+ render_color m_color; // color of the element
+ astring m_string; // string for text components
+ int m_digits; // number of digits for simple counters
+ int m_textalign; // text alignment to box
+ bitmap_argb32 m_bitmap[MAX_BITMAPS]; // source bitmap for images
+ astring m_dirname; // directory name of image file (for lazy loading)
+ emu_file * m_file[MAX_BITMAPS]; // file object for reading image/alpha files
+ astring m_imagefile[MAX_BITMAPS]; // name of the image file (for lazy loading)
+ astring m_alphafile[MAX_BITMAPS]; // name of the alpha file (for lazy loading)
+ bool m_hasalpha[MAX_BITMAPS]; // is there any alpha component present?
// stuff for fruit machine reels
// basically made up of multiple text strings / gfx
- int m_numstops;
- astring m_stopnames[MAX_BITMAPS];
- int m_stateoffset;
- int m_reelreversed;
- int m_numsymbolsvisible;
+ int m_numstops;
+ astring m_stopnames[MAX_BITMAPS];
+ int m_stateoffset;
+ int m_reelreversed;
+ int m_numsymbolsvisible;
};
@@ -187,22 +187,22 @@ private:
texture();
~texture();
- layout_element * m_element; // pointer back to the element
- render_texture * m_texture; // texture for this state
- int m_state; // associated state number
+ layout_element * m_element; // pointer back to the element
+ render_texture * m_texture; // texture for this state
+ int m_state; // associated state number
};
// internal helpers
static void element_scale(bitmap_argb32 &dest, bitmap_argb32 &source, const rectangle &sbounds, void *param);
// internal state
- layout_element * m_next; // link to next element
- running_machine & m_machine; // reference to the owning machine
- astring m_name; // name of this element
- simple_list<component> m_complist; // list of components
- int m_defstate; // default state of this element
- int m_maxstate; // maximum state value for all components
- texture * m_elemtex; // array of element textures used for managing the scaled bitmaps
+ layout_element * m_next; // link to next element
+ running_machine & m_machine; // reference to the owning machine
+ astring m_name; // name of this element
+ simple_list<component> m_complist; // list of components
+ int m_defstate; // default state of this element
+ int m_maxstate; // maximum state value for all components
+ texture * m_elemtex; // array of element textures used for managing the scaled bitmaps
};
@@ -241,16 +241,16 @@ public:
private:
// internal state
- item * m_next; // link to next item
- layout_element * m_element; // pointer to the associated element (non-screens only)
- astring m_output_name; // name of this item
- astring m_input_tag; // input tag of this item
- ioport_value m_input_mask; // input mask of this item
- screen_device * m_screen; // pointer to screen
- int m_orientation; // orientation of this item
- render_bounds m_bounds; // bounds of the item
- render_bounds m_rawbounds; // raw (original) bounds of the item
- render_color m_color; // color of the item
+ item * m_next; // link to next item
+ layout_element * m_element; // pointer to the associated element (non-screens only)
+ astring m_output_name; // name of this item
+ astring m_input_tag; // input tag of this item
+ ioport_value m_input_mask; // input mask of this item
+ screen_device * m_screen; // pointer to screen
+ int m_orientation; // orientation of this item
+ render_bounds m_bounds; // bounds of the item
+ render_bounds m_rawbounds; // raw (original) bounds of the item
+ render_color m_color; // color of the item
};
// construction/destruction
@@ -273,21 +273,21 @@ public:
private:
// internal state
- layout_view * m_next; // pointer to next layout in the list
- astring m_name; // name of the layout
- float m_aspect; // X/Y of the layout
- float m_scraspect; // X/Y of the screen areas
- render_screen_list m_screens; // list of active screens
- render_bounds m_bounds; // computed bounds of the view
- render_bounds m_scrbounds; // computed bounds of the screens within the view
- render_bounds m_expbounds; // explicit bounds of the view
- bool m_layenabled[ITEM_LAYER_MAX]; // is this layer enabled?
- simple_list<item> m_backdrop_list; // list of backdrop items
- simple_list<item> m_screen_list; // list of screen items
- simple_list<item> m_overlay_list; // list of overlay items
- simple_list<item> m_bezel_list; // list of bezel items
- simple_list<item> m_cpanel_list; // list of marquee items
- simple_list<item> m_marquee_list; // list of marquee items
+ layout_view * m_next; // pointer to next layout in the list
+ astring m_name; // name of the layout
+ float m_aspect; // X/Y of the layout
+ float m_scraspect; // X/Y of the screen areas
+ render_screen_list m_screens; // list of active screens
+ render_bounds m_bounds; // computed bounds of the view
+ render_bounds m_scrbounds; // computed bounds of the screens within the view
+ render_bounds m_expbounds; // explicit bounds of the view
+ bool m_layenabled[ITEM_LAYER_MAX]; // is this layer enabled?
+ simple_list<item> m_backdrop_list; // list of backdrop items
+ simple_list<item> m_screen_list; // list of screen items
+ simple_list<item> m_overlay_list; // list of overlay items
+ simple_list<item> m_bezel_list; // list of bezel items
+ simple_list<item> m_cpanel_list; // list of marquee items
+ simple_list<item> m_marquee_list; // list of marquee items
};
@@ -310,9 +310,9 @@ public:
private:
// internal state
- layout_file * m_next; // pointer to the next file in the list
- simple_list<layout_element> m_elemlist; // list of shared layout elements
- simple_list<layout_view> m_viewlist; // list of views
+ layout_file * m_next; // pointer to the next file in the list
+ simple_list<layout_element> m_elemlist; // list of shared layout elements
+ simple_list<layout_view> m_viewlist; // list of views
};
@@ -322,25 +322,25 @@ private:
//**************************************************************************
// no screens layouts
-extern const char layout_noscreens[]; // for screenless systems
+extern const char layout_noscreens[]; // for screenless systems
// single screen layouts
-extern const char layout_horizont[]; // horizontal 4:3 screens
-extern const char layout_vertical[]; // vertical 4:3 screens
+extern const char layout_horizont[]; // horizontal 4:3 screens
+extern const char layout_vertical[]; // vertical 4:3 screens
// dual screen layouts
-extern const char layout_dualhsxs[]; // dual 4:3 screens side-by-side
-extern const char layout_dualhovu[]; // dual 4:3 screens above and below
-extern const char layout_dualhuov[]; // dual 4:3 screens below and above
+extern const char layout_dualhsxs[]; // dual 4:3 screens side-by-side
+extern const char layout_dualhovu[]; // dual 4:3 screens above and below
+extern const char layout_dualhuov[]; // dual 4:3 screens below and above
// triple screen layouts
-extern const char layout_triphsxs[]; // triple 4:3 screens side-by-side
+extern const char layout_triphsxs[]; // triple 4:3 screens side-by-side
// quad screen layouts
-extern const char layout_quadhsxs[]; // quad 4:3 screens side-by-side
+extern const char layout_quadhsxs[]; // quad 4:3 screens side-by-side
// LCD screen layouts
-extern const char layout_lcd[]; // generic 1:1 lcd screen layout
-extern const char layout_lcd_rot[]; // same, for use with ROT90 or ROT270
+extern const char layout_lcd[]; // generic 1:1 lcd screen layout
+extern const char layout_lcd_rot[]; // same, for use with ROT90 or ROT270
-#endif // __RENDLAY_H__
+#endif // __RENDLAY_H__
diff --git a/src/emu/rendutil.c b/src/emu/rendutil.c
index b92207bb2bf..86e3f7abc06 100644
--- a/src/emu/rendutil.c
+++ b/src/emu/rendutil.c
@@ -454,49 +454,49 @@ void render_line_to_quad(const render_bounds *bounds, float width, render_bounds
float unitx, unity;
/*
- High-level logic -- due to math optimizations, this info is lost below.
+ High-level logic -- due to math optimizations, this info is lost below.
- Imagine a thick line of width (w), drawn from (p0) to (p1), with a unit
- vector (u) indicating the direction from (p0) to (p1).
+ Imagine a thick line of width (w), drawn from (p0) to (p1), with a unit
+ vector (u) indicating the direction from (p0) to (p1).
- B C
- +---------------- ... ------------------+
- | ^ |
- | | |
- | | |
- * (p0) ------------> (w)| * (p1)
- | (u) | |
- | | |
- | v |
- +---------------- ... ------------------+
- A D
+ B C
+ +---------------- ... ------------------+
+ | ^ |
+ | | |
+ | | |
+ * (p0) ------------> (w)| * (p1)
+ | (u) | |
+ | | |
+ | v |
+ +---------------- ... ------------------+
+ A D
- To convert this into a quad, we need to compute the four points A, B, C
- and D.
+ To convert this into a quad, we need to compute the four points A, B, C
+ and D.
- Starting with point A. We first multiply the unit vector by 0.5w and then
- rotate the result 90 degrees. Thus, we have:
+ Starting with point A. We first multiply the unit vector by 0.5w and then
+ rotate the result 90 degrees. Thus, we have:
- A.x = p0.x + 0.5 * w * u.x * cos(90) - 0.5 * w * u.y * sin(90)
- A.y = p0.y + 0.5 * w * u.x * sin(90) + 0.5 * w * u.y * cos(90)
+ A.x = p0.x + 0.5 * w * u.x * cos(90) - 0.5 * w * u.y * sin(90)
+ A.y = p0.y + 0.5 * w * u.x * sin(90) + 0.5 * w * u.y * cos(90)
- Conveniently, sin(90) = 1, and cos(90) = 0, so this simplifies to:
+ Conveniently, sin(90) = 1, and cos(90) = 0, so this simplifies to:
- A.x = p0.x - 0.5 * w * u.y
- A.y = p0.y + 0.5 * w * u.x
+ A.x = p0.x - 0.5 * w * u.y
+ A.y = p0.y + 0.5 * w * u.x
- Working clockwise around the polygon, the same fallout happens all around as
- we rotate the unit vector by -90 (B), -90 (C), and 90 (D) degrees:
+ Working clockwise around the polygon, the same fallout happens all around as
+ we rotate the unit vector by -90 (B), -90 (C), and 90 (D) degrees:
- B.x = p0.x + 0.5 * w * u.y
- B.y = p0.y - 0.5 * w * u.x
+ B.x = p0.x + 0.5 * w * u.y
+ B.y = p0.y - 0.5 * w * u.x
- C.x = p1.x - 0.5 * w * u.y
- C.y = p1.y + 0.5 * w * u.x
+ C.x = p1.x - 0.5 * w * u.y
+ C.y = p1.y + 0.5 * w * u.x
- D.x = p1.x + 0.5 * w * u.y
- D.y = p1.y - 0.5 * w * u.x
- */
+ D.x = p1.x + 0.5 * w * u.y
+ D.y = p1.y - 0.5 * w * u.x
+ */
/* we only care about the half-width */
width *= 0.5f;
diff --git a/src/emu/rendutil.h b/src/emu/rendutil.h
index d9b22ab5f3b..5912dd9ab13 100644
--- a/src/emu/rendutil.h
+++ b/src/emu/rendutil.h
@@ -124,8 +124,8 @@ INLINE void set_render_color(render_color *color, float a, float r, float g, flo
INLINE int orientation_swap_flips(int orientation)
{
return (orientation & ORIENTATION_SWAP_XY) |
- ((orientation & ORIENTATION_FLIP_X) ? ORIENTATION_FLIP_Y : 0) |
- ((orientation & ORIENTATION_FLIP_Y) ? ORIENTATION_FLIP_X : 0);
+ ((orientation & ORIENTATION_FLIP_X) ? ORIENTATION_FLIP_Y : 0) |
+ ((orientation & ORIENTATION_FLIP_Y) ? ORIENTATION_FLIP_X : 0);
}
@@ -200,4 +200,4 @@ INLINE UINT8 apply_brightness_contrast_gamma(UINT8 src, float brightness, float
}
-#endif /* __RENDUTIL_H__ */
+#endif /* __RENDUTIL_H__ */
diff --git a/src/emu/romload.c b/src/emu/romload.c
index e685e7eb222..4502db1a64a 100644
--- a/src/emu/romload.c
+++ b/src/emu/romload.c
@@ -26,7 +26,7 @@
CONSTANTS
***************************************************************************/
-#define TEMPBUFFER_MAX_SIZE (1024 * 1024 * 1024)
+#define TEMPBUFFER_MAX_SIZE (1024 * 1024 * 1024)
@@ -41,7 +41,7 @@ class open_chd
public:
open_chd(const char *region)
: m_next(NULL),
- m_region(region) { }
+ m_region(region) { }
open_chd *next() const { return m_next; }
const char *region() const { return m_region; }
@@ -50,10 +50,10 @@ public:
chd_file &diff_chd() { return m_diffchd; }
private:
- open_chd * m_next; /* pointer to next in the list */
- astring m_region; /* disk region we came from */
- chd_file m_origchd; /* handle to the original CHD */
- chd_file m_diffchd; /* handle to the diff CHD */
+ open_chd * m_next; /* pointer to next in the list */
+ astring m_region; /* disk region we came from */
+ chd_file m_origchd; /* handle to the original CHD */
+ chd_file m_diffchd; /* handle to the diff CHD */
};
@@ -61,24 +61,24 @@ struct romload_private
{
running_machine &machine() const { assert(m_machine != NULL); return *m_machine; }
- running_machine *m_machine; /* machine object where needed */
+ running_machine *m_machine; /* machine object where needed */
- int warnings; /* warning count during processing */
- int knownbad; /* BAD_DUMP/NO_DUMP count during processing */
- int errors; /* error count during processing */
+ int warnings; /* warning count during processing */
+ int knownbad; /* BAD_DUMP/NO_DUMP count during processing */
+ int errors; /* error count during processing */
- int romsloaded; /* current ROMs loaded count */
- int romstotal; /* total number of ROMs to read */
- UINT32 romsloadedsize; /* total size of ROMs loaded so far */
- UINT32 romstotalsize; /* total size of ROMs to read */
+ int romsloaded; /* current ROMs loaded count */
+ int romstotal; /* total number of ROMs to read */
+ UINT32 romsloadedsize; /* total size of ROMs loaded so far */
+ UINT32 romstotalsize; /* total size of ROMs to read */
- emu_file * file; /* current file */
- simple_list<open_chd> chd_list; /* disks */
+ emu_file * file; /* current file */
+ simple_list<open_chd> chd_list; /* disks */
- memory_region * region; /* info about current region */
+ memory_region * region; /* info about current region */
- astring errorstring; /* error string */
- astring softwarningstring; /* software warning string */
+ astring errorstring; /* error string */
+ astring softwarningstring; /* software warning string */
};
@@ -569,7 +569,7 @@ static int open_rom_file(romload_private *romdata, const char *regiontag, const
bool has_crc = hash_collection(ROM_GETHASHDATA(romp)).crc(crc);
/* attempt reading up the chain through the parents. It automatically also
- attempts any kind of load by checksum supported by the archives. */
+ attempts any kind of load by checksum supported by the archives. */
romdata->file = NULL;
for (int drv = driver_list::find(romdata->machine().system()); romdata->file == NULL && drv != -1; drv = driver_list::clone(drv)) {
if(tried_file_names.len() != 0)
@@ -957,7 +957,7 @@ static void process_rom_entries(romload_private *romdata, const char *regiontag,
}
else
{
- romp++; /* something else; skip */
+ romp++; /* something else; skip */
}
}
}
@@ -1050,7 +1050,7 @@ int open_disk_image(emu_options &options, const game_driver *gamedrv, const rom_
// only for CHD we also try to load from list/
if ((filerr != FILERR_NONE) && (tag1.cstr() != NULL))
{
- tag1.del(tag1.len() - 1, 1); // remove the PATH_SEPARATOR
+ tag1.del(tag1.len() - 1, 1); // remove the PATH_SEPARATOR
filerr = common_process_file(options, tag1.cstr(), ".chd", romp, image_file);
}
}
@@ -1544,4 +1544,3 @@ int rom_load_knownbad(running_machine &machine)
{
return machine.romload_data->knownbad;
}
-
diff --git a/src/emu/romload.h b/src/emu/romload.h
index cba28ca6139..1ea0b815185 100644
--- a/src/emu/romload.h
+++ b/src/emu/romload.h
@@ -25,93 +25,93 @@
***************************************************************************/
/* ----- type constants ----- */
-#define ROMENTRY_TYPEMASK 0x0000000f /* type of entry */
+#define ROMENTRY_TYPEMASK 0x0000000f /* type of entry */
enum
{
- ROMENTRYTYPE_ROM = 0, /* this entry is an actual ROM definition */
- ROMENTRYTYPE_REGION, /* this entry marks the start of a region */
- ROMENTRYTYPE_END, /* this entry marks the end of a region */
- ROMENTRYTYPE_RELOAD, /* this entry reloads the previous ROM */
- ROMENTRYTYPE_CONTINUE, /* this entry continues loading the previous ROM */
- ROMENTRYTYPE_FILL, /* this entry fills an area with a constant value */
- ROMENTRYTYPE_COPY, /* this entry copies data from another region/offset */
- ROMENTRYTYPE_CARTRIDGE, /* this entry specifies a cartridge (MESS) */
- ROMENTRYTYPE_IGNORE, /* this entry continues loading the previous ROM but throws the data away */
- ROMENTRYTYPE_SYSTEM_BIOS, /* this entry specifies a bios */
- ROMENTRYTYPE_DEFAULT_BIOS, /* this entry specifies a default bios */
+ ROMENTRYTYPE_ROM = 0, /* this entry is an actual ROM definition */
+ ROMENTRYTYPE_REGION, /* this entry marks the start of a region */
+ ROMENTRYTYPE_END, /* this entry marks the end of a region */
+ ROMENTRYTYPE_RELOAD, /* this entry reloads the previous ROM */
+ ROMENTRYTYPE_CONTINUE, /* this entry continues loading the previous ROM */
+ ROMENTRYTYPE_FILL, /* this entry fills an area with a constant value */
+ ROMENTRYTYPE_COPY, /* this entry copies data from another region/offset */
+ ROMENTRYTYPE_CARTRIDGE, /* this entry specifies a cartridge (MESS) */
+ ROMENTRYTYPE_IGNORE, /* this entry continues loading the previous ROM but throws the data away */
+ ROMENTRYTYPE_SYSTEM_BIOS, /* this entry specifies a bios */
+ ROMENTRYTYPE_DEFAULT_BIOS, /* this entry specifies a default bios */
ROMENTRYTYPE_COUNT
};
/* ----- per-region constants ----- */
-#define ROMREGION_WIDTHMASK 0x00000300 /* native width of region, as power of 2 */
-#define ROMREGION_8BIT 0x00000000 /* (non-CPU regions only) */
-#define ROMREGION_16BIT 0x00000100
-#define ROMREGION_32BIT 0x00000200
-#define ROMREGION_64BIT 0x00000300
+#define ROMREGION_WIDTHMASK 0x00000300 /* native width of region, as power of 2 */
+#define ROMREGION_8BIT 0x00000000 /* (non-CPU regions only) */
+#define ROMREGION_16BIT 0x00000100
+#define ROMREGION_32BIT 0x00000200
+#define ROMREGION_64BIT 0x00000300
-#define ROMREGION_ENDIANMASK 0x00000400 /* endianness of the region */
-#define ROMREGION_LE 0x00000000 /* (non-CPU regions only) */
-#define ROMREGION_BE 0x00000400
+#define ROMREGION_ENDIANMASK 0x00000400 /* endianness of the region */
+#define ROMREGION_LE 0x00000000 /* (non-CPU regions only) */
+#define ROMREGION_BE 0x00000400
-#define ROMREGION_INVERTMASK 0x00000800 /* invert the bits of the region */
-#define ROMREGION_NOINVERT 0x00000000
-#define ROMREGION_INVERT 0x00000800
+#define ROMREGION_INVERTMASK 0x00000800 /* invert the bits of the region */
+#define ROMREGION_NOINVERT 0x00000000
+#define ROMREGION_INVERT 0x00000800
-#define ROMREGION_ERASEMASK 0x00002000 /* erase the region before loading */
-#define ROMREGION_NOERASE 0x00000000
-#define ROMREGION_ERASE 0x00002000
+#define ROMREGION_ERASEMASK 0x00002000 /* erase the region before loading */
+#define ROMREGION_NOERASE 0x00000000
+#define ROMREGION_ERASE 0x00002000
-#define ROMREGION_DATATYPEMASK 0x00004000 /* type of region (ROM versus disk) */
-#define ROMREGION_DATATYPEROM 0x00000000
-#define ROMREGION_DATATYPEDISK 0x00004000
+#define ROMREGION_DATATYPEMASK 0x00004000 /* type of region (ROM versus disk) */
+#define ROMREGION_DATATYPEROM 0x00000000
+#define ROMREGION_DATATYPEDISK 0x00004000
-#define ROMREGION_ERASEVALMASK 0x00ff0000 /* value to erase the region to */
-#define ROMREGION_ERASEVAL(x) ((((x) & 0xff) << 16) | ROMREGION_ERASE)
-#define ROMREGION_ERASE00 ROMREGION_ERASEVAL(0)
-#define ROMREGION_ERASEFF ROMREGION_ERASEVAL(0xff)
+#define ROMREGION_ERASEVALMASK 0x00ff0000 /* value to erase the region to */
+#define ROMREGION_ERASEVAL(x) ((((x) & 0xff) << 16) | ROMREGION_ERASE)
+#define ROMREGION_ERASE00 ROMREGION_ERASEVAL(0)
+#define ROMREGION_ERASEFF ROMREGION_ERASEVAL(0xff)
/* ----- per-ROM constants ----- */
-#define DISK_READONLYMASK 0x00000010 /* is the disk read-only? */
-#define DISK_READWRITE 0x00000000
-#define DISK_READONLY 0x00000010
+#define DISK_READONLYMASK 0x00000010 /* is the disk read-only? */
+#define DISK_READWRITE 0x00000000
+#define DISK_READONLY 0x00000010
-#define ROM_OPTIONALMASK 0x00000020 /* optional - won't hurt if it's not there */
-#define ROM_REQUIRED 0x00000000
-#define ROM_OPTIONAL 0x00000020
+#define ROM_OPTIONALMASK 0x00000020 /* optional - won't hurt if it's not there */
+#define ROM_REQUIRED 0x00000000
+#define ROM_OPTIONAL 0x00000020
-#define ROM_REVERSEMASK 0x00000040 /* reverse the byte order within a group */
-#define ROM_NOREVERSE 0x00000000
-#define ROM_REVERSE 0x00000040
+#define ROM_REVERSEMASK 0x00000040 /* reverse the byte order within a group */
+#define ROM_NOREVERSE 0x00000000
+#define ROM_REVERSE 0x00000040
-#define ROM_INHERITFLAGSMASK 0x00000080 /* inherit all flags from previous definition */
-#define ROM_INHERITFLAGS 0x00000080
+#define ROM_INHERITFLAGSMASK 0x00000080 /* inherit all flags from previous definition */
+#define ROM_INHERITFLAGS 0x00000080
-#define ROM_GROUPMASK 0x00000f00 /* load data in groups of this size + 1 */
-#define ROM_GROUPSIZE(n) ((((n) - 1) & 15) << 8)
-#define ROM_GROUPBYTE ROM_GROUPSIZE(1)
-#define ROM_GROUPWORD ROM_GROUPSIZE(2)
-#define ROM_GROUPDWORD ROM_GROUPSIZE(4)
+#define ROM_GROUPMASK 0x00000f00 /* load data in groups of this size + 1 */
+#define ROM_GROUPSIZE(n) ((((n) - 1) & 15) << 8)
+#define ROM_GROUPBYTE ROM_GROUPSIZE(1)
+#define ROM_GROUPWORD ROM_GROUPSIZE(2)
+#define ROM_GROUPDWORD ROM_GROUPSIZE(4)
-#define ROM_SKIPMASK 0x0000f000 /* skip this many bytes after each group */
-#define ROM_SKIP(n) (((n) & 15) << 12)
-#define ROM_NOSKIP ROM_SKIP(0)
+#define ROM_SKIPMASK 0x0000f000 /* skip this many bytes after each group */
+#define ROM_SKIP(n) (((n) & 15) << 12)
+#define ROM_NOSKIP ROM_SKIP(0)
-#define ROM_BITWIDTHMASK 0x000f0000 /* width of data in bits */
-#define ROM_BITWIDTH(n) (((n) & 15) << 16)
-#define ROM_NIBBLE ROM_BITWIDTH(4)
-#define ROM_FULLBYTE ROM_BITWIDTH(8)
+#define ROM_BITWIDTHMASK 0x000f0000 /* width of data in bits */
+#define ROM_BITWIDTH(n) (((n) & 15) << 16)
+#define ROM_NIBBLE ROM_BITWIDTH(4)
+#define ROM_FULLBYTE ROM_BITWIDTH(8)
-#define ROM_BITSHIFTMASK 0x00f00000 /* left-shift count for the bits */
-#define ROM_BITSHIFT(n) (((n) & 15) << 20)
-#define ROM_NOSHIFT ROM_BITSHIFT(0)
-#define ROM_SHIFT_NIBBLE_LO ROM_BITSHIFT(0)
-#define ROM_SHIFT_NIBBLE_HI ROM_BITSHIFT(4)
+#define ROM_BITSHIFTMASK 0x00f00000 /* left-shift count for the bits */
+#define ROM_BITSHIFT(n) (((n) & 15) << 20)
+#define ROM_NOSHIFT ROM_BITSHIFT(0)
+#define ROM_SHIFT_NIBBLE_LO ROM_BITSHIFT(0)
+#define ROM_SHIFT_NIBBLE_HI ROM_BITSHIFT(4)
-#define ROM_BIOSFLAGSMASK 0xff000000 /* only loaded if value matches global bios value */
-#define ROM_BIOS(n) (((n) & 255) << 24)
+#define ROM_BIOSFLAGSMASK 0xff000000 /* only loaded if value matches global bios value */
+#define ROM_BIOS(n) (((n) & 255) << 24)
-#define ROM_INHERITEDFLAGS (ROM_GROUPMASK | ROM_SKIPMASK | ROM_REVERSEMASK | ROM_BITWIDTHMASK | ROM_BITSHIFTMASK | ROM_BIOSFLAGSMASK)
+#define ROM_INHERITEDFLAGS (ROM_GROUPMASK | ROM_SKIPMASK | ROM_REVERSEMASK | ROM_BITWIDTHMASK | ROM_BITSHIFTMASK | ROM_BIOSFLAGSMASK)
@@ -126,11 +126,11 @@ class chd_file;
struct rom_entry
{
- const char * _name; /* name of the file to load */
- const char * _hashdata; /* hashing informations (checksums) */
- UINT32 _offset; /* offset to load it to */
- UINT32 _length; /* length of the file */
- UINT32 _flags; /* flags */
+ const char * _name; /* name of the file to load */
+ const char * _hashdata; /* hashing informations (checksums) */
+ UINT32 _offset; /* offset to load it to */
+ UINT32 _length; /* length of the file */
+ UINT32 _flags; /* flags */
};
@@ -140,115 +140,115 @@ struct rom_entry
***************************************************************************/
/* ----- per-entry macros ----- */
-#define ROMENTRY_GETTYPE(r) ((r)->_flags & ROMENTRY_TYPEMASK)
-#define ROMENTRY_ISSPECIAL(r) (ROMENTRY_GETTYPE(r) != ROMENTRYTYPE_ROM)
-#define ROMENTRY_ISFILE(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_ROM)
-#define ROMENTRY_ISREGION(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_REGION)
-#define ROMENTRY_ISEND(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_END)
-#define ROMENTRY_ISRELOAD(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_RELOAD)
-#define ROMENTRY_ISCONTINUE(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_CONTINUE)
-#define ROMENTRY_ISFILL(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_FILL)
-#define ROMENTRY_ISCOPY(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_COPY)
-#define ROMENTRY_ISIGNORE(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_IGNORE)
-#define ROMENTRY_ISSYSTEM_BIOS(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_SYSTEM_BIOS)
-#define ROMENTRY_ISDEFAULT_BIOS(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_DEFAULT_BIOS)
-#define ROMENTRY_ISREGIONEND(r) (ROMENTRY_ISREGION(r) || ROMENTRY_ISEND(r))
+#define ROMENTRY_GETTYPE(r) ((r)->_flags & ROMENTRY_TYPEMASK)
+#define ROMENTRY_ISSPECIAL(r) (ROMENTRY_GETTYPE(r) != ROMENTRYTYPE_ROM)
+#define ROMENTRY_ISFILE(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_ROM)
+#define ROMENTRY_ISREGION(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_REGION)
+#define ROMENTRY_ISEND(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_END)
+#define ROMENTRY_ISRELOAD(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_RELOAD)
+#define ROMENTRY_ISCONTINUE(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_CONTINUE)
+#define ROMENTRY_ISFILL(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_FILL)
+#define ROMENTRY_ISCOPY(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_COPY)
+#define ROMENTRY_ISIGNORE(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_IGNORE)
+#define ROMENTRY_ISSYSTEM_BIOS(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_SYSTEM_BIOS)
+#define ROMENTRY_ISDEFAULT_BIOS(r) (ROMENTRY_GETTYPE(r) == ROMENTRYTYPE_DEFAULT_BIOS)
+#define ROMENTRY_ISREGIONEND(r) (ROMENTRY_ISREGION(r) || ROMENTRY_ISEND(r))
/* ----- per-region macros ----- */
-#define ROMREGION_GETTAG(r) ((r)->_name)
-#define ROMREGION_GETLENGTH(r) ((r)->_length)
-#define ROMREGION_GETFLAGS(r) ((r)->_flags)
-#define ROMREGION_GETWIDTH(r) (8 << ((ROMREGION_GETFLAGS(r) & ROMREGION_WIDTHMASK) >> 8))
-#define ROMREGION_ISLITTLEENDIAN(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ENDIANMASK) == ROMREGION_LE)
-#define ROMREGION_ISBIGENDIAN(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ENDIANMASK) == ROMREGION_BE)
-#define ROMREGION_ISINVERTED(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_INVERTMASK) == ROMREGION_INVERT)
-#define ROMREGION_ISERASE(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ERASEMASK) == ROMREGION_ERASE)
-#define ROMREGION_GETERASEVAL(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ERASEVALMASK) >> 16)
-#define ROMREGION_GETDATATYPE(r) (ROMREGION_GETFLAGS(r) & ROMREGION_DATATYPEMASK)
-#define ROMREGION_ISROMDATA(r) (ROMREGION_GETDATATYPE(r) == ROMREGION_DATATYPEROM)
-#define ROMREGION_ISDISKDATA(r) (ROMREGION_GETDATATYPE(r) == ROMREGION_DATATYPEDISK)
+#define ROMREGION_GETTAG(r) ((r)->_name)
+#define ROMREGION_GETLENGTH(r) ((r)->_length)
+#define ROMREGION_GETFLAGS(r) ((r)->_flags)
+#define ROMREGION_GETWIDTH(r) (8 << ((ROMREGION_GETFLAGS(r) & ROMREGION_WIDTHMASK) >> 8))
+#define ROMREGION_ISLITTLEENDIAN(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ENDIANMASK) == ROMREGION_LE)
+#define ROMREGION_ISBIGENDIAN(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ENDIANMASK) == ROMREGION_BE)
+#define ROMREGION_ISINVERTED(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_INVERTMASK) == ROMREGION_INVERT)
+#define ROMREGION_ISERASE(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ERASEMASK) == ROMREGION_ERASE)
+#define ROMREGION_GETERASEVAL(r) ((ROMREGION_GETFLAGS(r) & ROMREGION_ERASEVALMASK) >> 16)
+#define ROMREGION_GETDATATYPE(r) (ROMREGION_GETFLAGS(r) & ROMREGION_DATATYPEMASK)
+#define ROMREGION_ISROMDATA(r) (ROMREGION_GETDATATYPE(r) == ROMREGION_DATATYPEROM)
+#define ROMREGION_ISDISKDATA(r) (ROMREGION_GETDATATYPE(r) == ROMREGION_DATATYPEDISK)
/* ----- per-ROM macros ----- */
-#define ROM_GETNAME(r) ((r)->_name)
-#define ROM_SAFEGETNAME(r) (ROMENTRY_ISFILL(r) ? "fill" : ROMENTRY_ISCOPY(r) ? "copy" : ROM_GETNAME(r))
-#define ROM_GETOFFSET(r) ((r)->_offset)
-#define ROM_GETLENGTH(r) ((r)->_length)
-#define ROM_GETFLAGS(r) ((r)->_flags)
+#define ROM_GETNAME(r) ((r)->_name)
+#define ROM_SAFEGETNAME(r) (ROMENTRY_ISFILL(r) ? "fill" : ROMENTRY_ISCOPY(r) ? "copy" : ROM_GETNAME(r))
+#define ROM_GETOFFSET(r) ((r)->_offset)
+#define ROM_GETLENGTH(r) ((r)->_length)
+#define ROM_GETFLAGS(r) ((r)->_flags)
#define ROM_GETHASHDATA(r) ((r)->_hashdata)
-#define ROM_ISOPTIONAL(r) ((ROM_GETFLAGS(r) & ROM_OPTIONALMASK) == ROM_OPTIONAL)
-#define ROM_GETGROUPSIZE(r) (((ROM_GETFLAGS(r) & ROM_GROUPMASK) >> 8) + 1)
-#define ROM_GETSKIPCOUNT(r) ((ROM_GETFLAGS(r) & ROM_SKIPMASK) >> 12)
-#define ROM_ISREVERSED(r) ((ROM_GETFLAGS(r) & ROM_REVERSEMASK) == ROM_REVERSE)
-#define ROM_GETBITWIDTH(r) (((ROM_GETFLAGS(r) & ROM_BITWIDTHMASK) >> 16) + 8 * ((ROM_GETFLAGS(r) & ROM_BITWIDTHMASK) == 0))
-#define ROM_GETBITSHIFT(r) ((ROM_GETFLAGS(r) & ROM_BITSHIFTMASK) >> 20)
-#define ROM_INHERITSFLAGS(r) ((ROM_GETFLAGS(r) & ROM_INHERITFLAGSMASK) == ROM_INHERITFLAGS)
-#define ROM_GETBIOSFLAGS(r) ((ROM_GETFLAGS(r) & ROM_BIOSFLAGSMASK) >> 24)
+#define ROM_ISOPTIONAL(r) ((ROM_GETFLAGS(r) & ROM_OPTIONALMASK) == ROM_OPTIONAL)
+#define ROM_GETGROUPSIZE(r) (((ROM_GETFLAGS(r) & ROM_GROUPMASK) >> 8) + 1)
+#define ROM_GETSKIPCOUNT(r) ((ROM_GETFLAGS(r) & ROM_SKIPMASK) >> 12)
+#define ROM_ISREVERSED(r) ((ROM_GETFLAGS(r) & ROM_REVERSEMASK) == ROM_REVERSE)
+#define ROM_GETBITWIDTH(r) (((ROM_GETFLAGS(r) & ROM_BITWIDTHMASK) >> 16) + 8 * ((ROM_GETFLAGS(r) & ROM_BITWIDTHMASK) == 0))
+#define ROM_GETBITSHIFT(r) ((ROM_GETFLAGS(r) & ROM_BITSHIFTMASK) >> 20)
+#define ROM_INHERITSFLAGS(r) ((ROM_GETFLAGS(r) & ROM_INHERITFLAGSMASK) == ROM_INHERITFLAGS)
+#define ROM_GETBIOSFLAGS(r) ((ROM_GETFLAGS(r) & ROM_BIOSFLAGSMASK) >> 24)
/* ----- per-disk macros ----- */
-#define DISK_GETINDEX(r) ((r)->_offset)
-#define DISK_ISREADONLY(r) ((ROM_GETFLAGS(r) & DISK_READONLYMASK) == DISK_READONLY)
-#define DISK_ISOPTIONAL(r) ((ROM_GETFLAGS(r) & ROM_OPTIONALMASK) == ROM_OPTIONAL)
+#define DISK_GETINDEX(r) ((r)->_offset)
+#define DISK_ISREADONLY(r) ((ROM_GETFLAGS(r) & DISK_READONLYMASK) == DISK_READONLY)
+#define DISK_ISOPTIONAL(r) ((ROM_GETFLAGS(r) & ROM_OPTIONALMASK) == ROM_OPTIONAL)
/* ----- start/stop macros ----- */
-#define ROM_NAME(name) rom_##name
-#define ROM_START(name) static const rom_entry ROM_NAME(name)[] = {
-#define ROM_END { NULL, NULL, 0, 0, ROMENTRYTYPE_END } };
+#define ROM_NAME(name) rom_##name
+#define ROM_START(name) static const rom_entry ROM_NAME(name)[] = {
+#define ROM_END { NULL, NULL, 0, 0, ROMENTRYTYPE_END } };
/* ----- ROM region macros ----- */
-#define ROM_REGION(length,tag,flags) { tag, NULL, 0, length, ROMENTRYTYPE_REGION | (flags) },
-#define ROM_REGION16_LE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_16BIT | ROMREGION_LE)
-#define ROM_REGION16_BE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_16BIT | ROMREGION_BE)
-#define ROM_REGION32_LE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_32BIT | ROMREGION_LE)
-#define ROM_REGION32_BE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_32BIT | ROMREGION_BE)
-#define ROM_REGION64_LE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_64BIT | ROMREGION_LE)
-#define ROM_REGION64_BE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_64BIT | ROMREGION_BE)
+#define ROM_REGION(length,tag,flags) { tag, NULL, 0, length, ROMENTRYTYPE_REGION | (flags) },
+#define ROM_REGION16_LE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_16BIT | ROMREGION_LE)
+#define ROM_REGION16_BE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_16BIT | ROMREGION_BE)
+#define ROM_REGION32_LE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_32BIT | ROMREGION_LE)
+#define ROM_REGION32_BE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_32BIT | ROMREGION_BE)
+#define ROM_REGION64_LE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_64BIT | ROMREGION_LE)
+#define ROM_REGION64_BE(length,tag,flags) ROM_REGION(length, tag, (flags) | ROMREGION_64BIT | ROMREGION_BE)
/* ----- core ROM loading macros ----- */
-#define ROMX_LOAD(name,offset,length,hash,flags) { name, hash, offset, length, ROMENTRYTYPE_ROM | (flags) },
-#define ROM_LOAD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, 0)
-#define ROM_LOAD_OPTIONAL(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_OPTIONAL)
+#define ROMX_LOAD(name,offset,length,hash,flags) { name, hash, offset, length, ROMENTRYTYPE_ROM | (flags) },
+#define ROM_LOAD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, 0)
+#define ROM_LOAD_OPTIONAL(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_OPTIONAL)
/* ----- specialized loading macros ----- */
-#define ROM_LOAD_NIB_HIGH(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_NIBBLE | ROM_SHIFT_NIBBLE_HI)
-#define ROM_LOAD_NIB_LOW(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_NIBBLE | ROM_SHIFT_NIBBLE_LO)
-#define ROM_LOAD16_BYTE(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_SKIP(1))
-#define ROM_LOAD16_WORD(name,offset,length,hash) ROM_LOAD(name, offset, length, hash)
+#define ROM_LOAD_NIB_HIGH(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_NIBBLE | ROM_SHIFT_NIBBLE_HI)
+#define ROM_LOAD_NIB_LOW(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_NIBBLE | ROM_SHIFT_NIBBLE_LO)
+#define ROM_LOAD16_BYTE(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_SKIP(1))
+#define ROM_LOAD16_WORD(name,offset,length,hash) ROM_LOAD(name, offset, length, hash)
#define ROM_LOAD16_WORD_SWAP(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_REVERSE)
-#define ROM_LOAD32_BYTE(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_SKIP(3))
-#define ROM_LOAD32_WORD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_SKIP(2))
+#define ROM_LOAD32_BYTE(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_SKIP(3))
+#define ROM_LOAD32_WORD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_SKIP(2))
#define ROM_LOAD32_WORD_SWAP(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_REVERSE | ROM_SKIP(2))
-#define ROM_LOAD32_DWORD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPDWORD)
-#define ROM_LOAD64_WORD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_SKIP(6))
+#define ROM_LOAD32_DWORD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPDWORD)
+#define ROM_LOAD64_WORD(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_SKIP(6))
#define ROM_LOAD64_WORD_SWAP(name,offset,length,hash) ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_REVERSE | ROM_SKIP(6))
/* ----- ROM_RELOAD related macros ----- */
-#define ROM_RELOAD(offset,length) { NULL, NULL, offset, length, ROMENTRYTYPE_RELOAD | ROM_INHERITFLAGS },
-#define ROM_RELOAD_PLAIN(offset,length) { NULL, NULL, offset, length, ROMENTRYTYPE_RELOAD },
+#define ROM_RELOAD(offset,length) { NULL, NULL, offset, length, ROMENTRYTYPE_RELOAD | ROM_INHERITFLAGS },
+#define ROM_RELOAD_PLAIN(offset,length) { NULL, NULL, offset, length, ROMENTRYTYPE_RELOAD },
/* ----- additional ROM-related macros ----- */
-#define ROM_CONTINUE(offset,length) { NULL, NULL, offset, length, ROMENTRYTYPE_CONTINUE | ROM_INHERITFLAGS },
-#define ROM_IGNORE(length) { NULL, NULL, 0, length, ROMENTRYTYPE_IGNORE | ROM_INHERITFLAGS },
-#define ROM_FILL(offset,length,value) { NULL, (const char *)value, offset, length, ROMENTRYTYPE_FILL },
-#define ROM_COPY(srctag,srcoffs,offset,length) { srctag, (const char *)srcoffs, offset, length, ROMENTRYTYPE_COPY },
+#define ROM_CONTINUE(offset,length) { NULL, NULL, offset, length, ROMENTRYTYPE_CONTINUE | ROM_INHERITFLAGS },
+#define ROM_IGNORE(length) { NULL, NULL, 0, length, ROMENTRYTYPE_IGNORE | ROM_INHERITFLAGS },
+#define ROM_FILL(offset,length,value) { NULL, (const char *)value, offset, length, ROMENTRYTYPE_FILL },
+#define ROM_COPY(srctag,srcoffs,offset,length) { srctag, (const char *)srcoffs, offset, length, ROMENTRYTYPE_COPY },
/* ----- system BIOS macros ----- */
-#define ROM_SYSTEM_BIOS(value,name,description) { name, description, 0, 0, ROMENTRYTYPE_SYSTEM_BIOS | ROM_BIOS(value+1) },
-#define ROM_DEFAULT_BIOS(name) { name, NULL, 0, 0, ROMENTRYTYPE_DEFAULT_BIOS },
+#define ROM_SYSTEM_BIOS(value,name,description) { name, description, 0, 0, ROMENTRYTYPE_SYSTEM_BIOS | ROM_BIOS(value+1) },
+#define ROM_DEFAULT_BIOS(name) { name, NULL, 0, 0, ROMENTRYTYPE_DEFAULT_BIOS },
/* ----- disk loading macros ----- */
-#define DISK_REGION(tag) ROM_REGION(1, tag, ROMREGION_DATATYPEDISK)
-#define DISK_IMAGE(name,idx,hash) ROMX_LOAD(name, idx, 0, hash, DISK_READWRITE)
-#define DISK_IMAGE_READONLY(name,idx,hash) ROMX_LOAD(name, idx, 0, hash, DISK_READONLY)
-#define DISK_IMAGE_READONLY_OPTIONAL(name,idx,hash) ROMX_LOAD(name, idx, 0, hash, DISK_READONLY | ROM_OPTIONAL)
+#define DISK_REGION(tag) ROM_REGION(1, tag, ROMREGION_DATATYPEDISK)
+#define DISK_IMAGE(name,idx,hash) ROMX_LOAD(name, idx, 0, hash, DISK_READWRITE)
+#define DISK_IMAGE_READONLY(name,idx,hash) ROMX_LOAD(name, idx, 0, hash, DISK_READONLY)
+#define DISK_IMAGE_READONLY_OPTIONAL(name,idx,hash) ROMX_LOAD(name, idx, 0, hash, DISK_READONLY | ROM_OPTIONAL)
@@ -310,4 +310,4 @@ int set_disk_handle(running_machine &machine, const char *region, const char *fu
void load_software_part_region(device_t *device, char *swlist, char *swname, rom_entry *start_region);
-#endif /* __ROMLOAD_H__ */
+#endif /* __ROMLOAD_H__ */
diff --git a/src/emu/save.c b/src/emu/save.c
index c437f44bd81..0b1072b536e 100644
--- a/src/emu/save.c
+++ b/src/emu/save.c
@@ -70,8 +70,8 @@
// CONSTANTS
//**************************************************************************
-const int SAVE_VERSION = 2;
-const int HEADER_SIZE = 32;
+const int SAVE_VERSION = 2;
+const int HEADER_SIZE = 32;
// Available flags
enum
@@ -90,11 +90,11 @@ enum
save_manager::save_manager(running_machine &machine)
: m_machine(machine),
- m_reg_allowed(true),
- m_illegal_regs(0),
- m_entry_list(machine.respool()),
- m_presave_list(machine.respool()),
- m_postload_list(machine.respool())
+ m_reg_allowed(true),
+ m_illegal_regs(0),
+ m_entry_list(machine.respool()),
+ m_presave_list(machine.respool()),
+ m_postload_list(machine.respool())
{
}
@@ -422,7 +422,7 @@ save_error save_manager::validate_header(const UINT8 *header, const char *gamena
save_manager::state_callback::state_callback(save_prepost_delegate callback)
: m_next(NULL),
- m_func(callback)
+ m_func(callback)
{
}
@@ -433,11 +433,11 @@ save_manager::state_callback::state_callback(save_prepost_delegate callback)
save_manager::state_entry::state_entry(void *data, const char *name, UINT8 size, UINT32 count)
: m_next(NULL),
- m_data(data),
- m_name(name),
- m_typesize(size),
- m_typecount(count),
- m_offset(0)
+ m_data(data),
+ m_name(name),
+ m_typesize(size),
+ m_typecount(count),
+ m_offset(0)
{
}
diff --git a/src/emu/save.h b/src/emu/save.h
index 17131178ae4..408a700c90b 100644
--- a/src/emu/save.h
+++ b/src/emu/save.h
@@ -205,8 +205,8 @@ private:
state_callback *next() const { return m_next; }
// state
- state_callback * m_next; // pointer to next entry
- save_prepost_delegate m_func; // delegate
+ state_callback * m_next; // pointer to next entry
+ save_prepost_delegate m_func; // delegate
};
class state_entry
@@ -222,22 +222,22 @@ private:
void flip_data();
// state
- state_entry * m_next; // pointer to next entry
- void * m_data; // pointer to the memory to save/restore
- astring m_name; // full name
- UINT8 m_typesize; // size of the raw data type
- UINT32 m_typecount; // number of items
- UINT32 m_offset; // offset within the final structure
+ state_entry * m_next; // pointer to next entry
+ void * m_data; // pointer to the memory to save/restore
+ astring m_name; // full name
+ UINT8 m_typesize; // size of the raw data type
+ UINT32 m_typecount; // number of items
+ UINT32 m_offset; // offset within the final structure
};
// internal state
- running_machine & m_machine; // reference to our machine
- bool m_reg_allowed; // are registrations allowed?
- int m_illegal_regs; // number of illegal registrations
+ running_machine & m_machine; // reference to our machine
+ bool m_reg_allowed; // are registrations allowed?
+ int m_illegal_regs; // number of illegal registrations
- simple_list<state_entry> m_entry_list; // list of reigstered entries
- simple_list<state_callback> m_presave_list; // list of pre-save functions
- simple_list<state_callback> m_postload_list; // list of post-load functions
+ simple_list<state_entry> m_entry_list; // list of reigstered entries
+ simple_list<state_callback> m_presave_list; // list of pre-save functions
+ simple_list<state_callback> m_postload_list; // list of post-load functions
};
@@ -337,4 +337,4 @@ inline void save_manager::save_item(const char *module, const char *tag, int ind
}
-#endif /* __SAVE_H__ */
+#endif /* __SAVE_H__ */
diff --git a/src/emu/schedule.c b/src/emu/schedule.c
index ae1659314e1..2e98b64e109 100644
--- a/src/emu/schedule.c
+++ b/src/emu/schedule.c
@@ -47,7 +47,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
@@ -58,8 +58,8 @@
// internal trigger IDs
enum
{
- TRIGGER_INT = -2000,
- TRIGGER_YIELDTIME = -3000,
+ TRIGGER_INT = -2000,
+ TRIGGER_YIELDTIME = -3000,
TRIGGER_SUSPENDTIME = -4000
};
@@ -75,17 +75,17 @@ enum
emu_timer::emu_timer()
: m_machine(NULL),
- m_next(NULL),
- m_prev(NULL),
- m_param(0),
- m_ptr(NULL),
- m_enabled(false),
- m_temporary(false),
- m_period(attotime::zero),
- m_start(attotime::zero),
- m_expire(attotime::never),
- m_device(NULL),
- m_id(0)
+ m_next(NULL),
+ m_prev(NULL),
+ m_param(0),
+ m_ptr(NULL),
+ m_enabled(false),
+ m_temporary(false),
+ m_period(attotime::zero),
+ m_start(attotime::zero),
+ m_expire(attotime::never),
+ m_device(NULL),
+ m_id(0)
{
}
@@ -996,5 +996,3 @@ void device_scheduler::dump_timers() const
timer->dump();
logerror("=============================================\n");
}
-
-
diff --git a/src/emu/schedule.h b/src/emu/schedule.h
index f2a0155017d..8c727f60227 100644
--- a/src/emu/schedule.h
+++ b/src/emu/schedule.h
@@ -53,17 +53,17 @@
// macro for the RC time constant on a 74LS123 with C > 1000pF
// R is in ohms, C is in farads
-#define TIME_OF_74LS123(r,c) (0.45 * (double)(r) * (double)(c))
+#define TIME_OF_74LS123(r,c) (0.45 * (double)(r) * (double)(c))
// macros for the RC time constant on a 555 timer IC
// R is in ohms, C is in farads
-#define PERIOD_OF_555_MONOSTABLE_NSEC(r,c) ((attoseconds_t)(1100000000 * (double)(r) * (double)(c)))
-#define PERIOD_OF_555_ASTABLE_NSEC(r1,r2,c) ((attoseconds_t)( 693000000 * ((double)(r1) + 2.0 * (double)(r2)) * (double)(c)))
-#define PERIOD_OF_555_MONOSTABLE(r,c) attotime::from_nsec(PERIOD_OF_555_MONOSTABLE_NSEC(r,c))
-#define PERIOD_OF_555_ASTABLE(r1,r2,c) attotime::from_nsec(PERIOD_OF_555_ASTABLE_NSEC(r1,r2,c))
+#define PERIOD_OF_555_MONOSTABLE_NSEC(r,c) ((attoseconds_t)(1100000000 * (double)(r) * (double)(c)))
+#define PERIOD_OF_555_ASTABLE_NSEC(r1,r2,c) ((attoseconds_t)( 693000000 * ((double)(r1) + 2.0 * (double)(r2)) * (double)(c)))
+#define PERIOD_OF_555_MONOSTABLE(r,c) attotime::from_nsec(PERIOD_OF_555_MONOSTABLE_NSEC(r,c))
+#define PERIOD_OF_555_ASTABLE(r1,r2,c) attotime::from_nsec(PERIOD_OF_555_ASTABLE_NSEC(r1,r2,c))
-#define TIMER_CALLBACK(name) void name(running_machine &machine, void *ptr, int param)
-#define TIMER_CALLBACK_MEMBER(name) void name(void *ptr, INT32 param)
+#define TIMER_CALLBACK(name) void name(running_machine &machine, void *ptr, int param)
+#define TIMER_CALLBACK_MEMBER(name) void name(void *ptr, INT32 param)
//**************************************************************************
// TYPE DEFINITIONS
@@ -124,19 +124,19 @@ private:
void dump() const;
// internal state
- running_machine * m_machine; // reference to the owning machine
- emu_timer * m_next; // next timer in order in the list
- emu_timer * m_prev; // previous timer in order in the list
- timer_expired_delegate m_callback; // callback function
- INT32 m_param; // integer parameter
- void * m_ptr; // pointer parameter
- bool m_enabled; // is the timer enabled?
- bool m_temporary; // is the timer temporary?
- attotime m_period; // the repeat frequency of the timer
- attotime m_start; // time when the timer was started
- attotime m_expire; // time when the timer will expire
- device_t * m_device; // for device timers, a pointer to the device
- device_timer_id m_id; // for device timers, the ID of the timer
+ running_machine * m_machine; // reference to the owning machine
+ emu_timer * m_next; // next timer in order in the list
+ emu_timer * m_prev; // previous timer in order in the list
+ timer_expired_delegate m_callback; // callback function
+ INT32 m_param; // integer parameter
+ void * m_ptr; // pointer parameter
+ bool m_enabled; // is the timer enabled?
+ bool m_temporary; // is the timer temporary?
+ attotime m_period; // the repeat frequency of the timer
+ attotime m_start; // time when the timer was started
+ attotime m_expire; // time when the timer will expire
+ device_t * m_device; // for device timers, a pointer to the device
+ device_timer_id m_id; // for device timers, the ID of the timer
};
@@ -204,19 +204,19 @@ private:
void execute_timers();
// internal state
- running_machine & m_machine; // reference to our machine
- device_execute_interface * m_executing_device; // pointer to currently executing device
- device_execute_interface * m_execute_list; // list of devices to be executed
- attotime m_basetime; // global basetime; everything moves forward from here
+ running_machine & m_machine; // reference to our machine
+ device_execute_interface * m_executing_device; // pointer to currently executing device
+ device_execute_interface * m_execute_list; // list of devices to be executed
+ attotime m_basetime; // global basetime; everything moves forward from here
// list of active timers
- emu_timer * m_timer_list; // head of the active list
- fixed_allocator<emu_timer> m_timer_allocator; // allocator for timers
+ emu_timer * m_timer_list; // head of the active list
+ fixed_allocator<emu_timer> m_timer_allocator; // allocator for timers
// other internal states
- emu_timer * m_callback_timer; // pointer to the current callback timer
- bool m_callback_timer_modified; // true if the current callback timer was modified
- attotime m_callback_timer_expire_time; // the original expiration time
+ emu_timer * m_callback_timer; // pointer to the current callback timer
+ bool m_callback_timer_modified; // true if the current callback timer was modified
+ attotime m_callback_timer_expire_time; // the original expiration time
// scheduling quanta
class quantum_slot
@@ -226,15 +226,15 @@ private:
public:
quantum_slot *next() const { return m_next; }
- quantum_slot * m_next;
- attoseconds_t m_actual; // actual duration of the quantum
- attoseconds_t m_requested; // duration of the requested quantum
- attotime m_expire; // absolute expiration time of this quantum
+ quantum_slot * m_next;
+ attoseconds_t m_actual; // actual duration of the quantum
+ attoseconds_t m_requested; // duration of the requested quantum
+ attotime m_expire; // absolute expiration time of this quantum
};
- simple_list<quantum_slot> m_quantum_list; // list of active quanta
- fixed_allocator<quantum_slot> m_quantum_allocator; // allocator for quanta
- attoseconds_t m_quantum_minimum; // duration of minimum quantum
+ simple_list<quantum_slot> m_quantum_list; // list of active quanta
+ fixed_allocator<quantum_slot> m_quantum_allocator; // allocator for quanta
+ attoseconds_t m_quantum_minimum; // duration of minimum quantum
};
-#endif // __SCHEDULE_H__ */
+#endif // __SCHEDULE_H__ */
diff --git a/src/emu/screen.c b/src/emu/screen.c
index e4912490425..c51bbf555e4 100644
--- a/src/emu/screen.c
+++ b/src/emu/screen.c
@@ -48,8 +48,8 @@
// DEBUGGING
//**************************************************************************
-#define VERBOSE (0)
-#define LOG_PARTIAL_UPDATES(x) do { if (VERBOSE) logerror x; } while (0)
+#define VERBOSE (0)
+#define LOG_PARTIAL_UPDATES(x) do { if (VERBOSE) logerror x; } while (0)
@@ -74,34 +74,34 @@ UINT32 screen_device::m_id_counter = 0;
screen_device::screen_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SCREEN, "Video Screen", tag, owner, clock),
- m_type(SCREEN_TYPE_RASTER),
- m_oldstyle_vblank_supplied(false),
- m_refresh(0),
- m_vblank(0),
- m_xoffset(0.0f),
- m_yoffset(0.0f),
- m_xscale(1.0f),
- m_yscale(1.0f),
- m_container(NULL),
- m_width(100),
- m_height(100),
- m_visarea(0, 99, 0, 99),
- m_curbitmap(0),
- m_curtexture(0),
- m_changed(true),
- m_last_partial_scan(0),
- m_frame_period(DEFAULT_FRAME_PERIOD.as_attoseconds()),
- m_scantime(1),
- m_pixeltime(1),
- m_vblank_period(0),
- m_vblank_start_time(attotime::zero),
- m_vblank_end_time(attotime::zero),
- m_vblank_begin_timer(NULL),
- m_vblank_end_timer(NULL),
- m_scanline0_timer(NULL),
- m_scanline_timer(NULL),
- m_frame_number(0),
- m_partial_updates_this_frame(0)
+ m_type(SCREEN_TYPE_RASTER),
+ m_oldstyle_vblank_supplied(false),
+ m_refresh(0),
+ m_vblank(0),
+ m_xoffset(0.0f),
+ m_yoffset(0.0f),
+ m_xscale(1.0f),
+ m_yscale(1.0f),
+ m_container(NULL),
+ m_width(100),
+ m_height(100),
+ m_visarea(0, 99, 0, 99),
+ m_curbitmap(0),
+ m_curtexture(0),
+ m_changed(true),
+ m_last_partial_scan(0),
+ m_frame_period(DEFAULT_FRAME_PERIOD.as_attoseconds()),
+ m_scantime(1),
+ m_pixeltime(1),
+ m_vblank_period(0),
+ m_vblank_start_time(attotime::zero),
+ m_vblank_end_time(attotime::zero),
+ m_vblank_begin_timer(NULL),
+ m_vblank_end_timer(NULL),
+ m_scanline0_timer(NULL),
+ m_scanline_timer(NULL),
+ m_frame_number(0),
+ m_partial_updates_this_frame(0)
{
m_unique_id = m_id_counter;
m_id_counter++;
@@ -454,7 +454,7 @@ void screen_device::configure(int width, int height, const rectangle &visarea, a
m_pixeltime = frame_period / (height * width);
// if there has been no VBLANK time specified in the MACHINE_DRIVER, compute it now
- // from the visible area, otherwise just used the supplied value
+ // from the visible area, otherwise just used the supplied value
if (m_vblank == 0 && !m_oldstyle_vblank_supplied)
m_vblank_period = m_scantime * (height - visarea.height());
else
@@ -599,8 +599,8 @@ bool screen_device::update_partial(int scanline)
switch (curbitmap.format())
{
default:
- case BITMAP_FORMAT_IND16: flags = m_screen_update_ind16(*this, curbitmap.as_ind16(), clip); break;
- case BITMAP_FORMAT_RGB32: flags = m_screen_update_rgb32(*this, curbitmap.as_rgb32(), clip); break;
+ case BITMAP_FORMAT_IND16: flags = m_screen_update_ind16(*this, curbitmap.as_ind16(), clip); break;
+ case BITMAP_FORMAT_RGB32: flags = m_screen_update_rgb32(*this, curbitmap.as_rgb32(), clip); break;
}
m_partial_updates_this_frame++;
@@ -628,13 +628,13 @@ void screen_device::update_now()
int current_hpos = hpos();
// since we can currently update only at the scanline
- // level, we are trying to do the right thing by
- // updating including the current scanline, only if the
- // beam is past the halfway point horizontally.
- // If the beam is in the first half of the scanline,
- // we only update up to the previous scanline.
- // This minimizes the number of pixels that might be drawn
- // incorrectly until we support a pixel level granularity
+ // level, we are trying to do the right thing by
+ // updating including the current scanline, only if the
+ // beam is past the halfway point horizontally.
+ // If the beam is in the first half of the scanline,
+ // we only update up to the previous scanline.
+ // This minimizes the number of pixels that might be drawn
+ // incorrectly until we support a pixel level granularity
if (current_hpos < (m_width / 2) && current_vpos > 0)
current_vpos = current_vpos - 1;
diff --git a/src/emu/screen.h b/src/emu/screen.h
index 24c15e1f60d..2f07fc1b24f 100644
--- a/src/emu/screen.h
+++ b/src/emu/screen.h
@@ -62,7 +62,7 @@ enum screen_type_enum
// screen_update callback flags
-const UINT32 UPDATE_HAS_NOT_CHANGED = 0x0001; // the video has not changed
+const UINT32 UPDATE_HAS_NOT_CHANGED = 0x0001; // the video has not changed
@@ -88,18 +88,18 @@ public:
// construction/destruction
screen_bitmap()
: m_format(BITMAP_FORMAT_RGB32),
- m_texformat(TEXFORMAT_RGB32),
- m_live(&m_rgb32) { }
+ m_texformat(TEXFORMAT_RGB32),
+ m_live(&m_rgb32) { }
screen_bitmap(bitmap_ind16 &orig)
: m_format(BITMAP_FORMAT_IND16),
- m_texformat(TEXFORMAT_PALETTE16),
- m_live(&m_ind16),
- m_ind16(orig, orig.cliprect()) { }
+ m_texformat(TEXFORMAT_PALETTE16),
+ m_live(&m_ind16),
+ m_ind16(orig, orig.cliprect()) { }
screen_bitmap(bitmap_rgb32 &orig)
: m_format(BITMAP_FORMAT_RGB32),
- m_texformat(TEXFORMAT_RGB32),
- m_live(&m_rgb32),
- m_rgb32(orig, orig.cliprect()) { }
+ m_texformat(TEXFORMAT_RGB32),
+ m_live(&m_rgb32),
+ m_rgb32(orig, orig.cliprect()) { }
// resizing
void resize(int width, int height) { live().resize(width, height); }
@@ -129,9 +129,9 @@ public:
m_texformat = texformat;
switch (format)
{
- case BITMAP_FORMAT_IND16: m_live = &m_ind16; break;
- case BITMAP_FORMAT_RGB32: m_live = &m_rgb32; break;
- default: m_live = NULL; break;
+ case BITMAP_FORMAT_IND16: m_live = &m_ind16; break;
+ case BITMAP_FORMAT_RGB32: m_live = &m_rgb32; break;
+ default: m_live = NULL; break;
}
m_ind16.reset();
m_rgb32.reset();
@@ -139,11 +139,11 @@ public:
private:
// internal state
- bitmap_format m_format;
- texture_format m_texformat;
- bitmap_t * m_live;
- bitmap_ind16 m_ind16;
- bitmap_rgb32 m_rgb32;
+ bitmap_format m_format;
+ texture_format m_texformat;
+ bitmap_t * m_live;
+ bitmap_ind16 m_ind16;
+ bitmap_rgb32 m_rgb32;
};
@@ -263,49 +263,49 @@ private:
void load_effect_overlay(const char *filename);
// inline configuration data
- screen_type_enum m_type; // type of screen
- bool m_oldstyle_vblank_supplied; // MCFG_SCREEN_VBLANK_TIME macro used
- attoseconds_t m_refresh; // default refresh period
- attoseconds_t m_vblank; // duration of a VBLANK
- float m_xoffset, m_yoffset; // default X/Y offsets
- float m_xscale, m_yscale; // default X/Y scale factor
+ screen_type_enum m_type; // type of screen
+ bool m_oldstyle_vblank_supplied; // MCFG_SCREEN_VBLANK_TIME macro used
+ attoseconds_t m_refresh; // default refresh period
+ attoseconds_t m_vblank; // duration of a VBLANK
+ float m_xoffset, m_yoffset; // default X/Y offsets
+ float m_xscale, m_yscale; // default X/Y scale factor
screen_update_ind16_delegate m_screen_update_ind16; // screen update callback (16-bit palette)
screen_update_rgb32_delegate m_screen_update_rgb32; // screen update callback (32-bit RGB)
- screen_vblank_delegate m_screen_vblank; // screen vblank callback
+ screen_vblank_delegate m_screen_vblank; // screen vblank callback
// internal state
- render_container * m_container; // pointer to our container
+ render_container * m_container; // pointer to our container
// dimensions
- int m_width; // current width (HTOTAL)
- int m_height; // current height (VTOTAL)
- rectangle m_visarea; // current visible area (HBLANK end/start, VBLANK end/start)
+ int m_width; // current width (HTOTAL)
+ int m_height; // current height (VTOTAL)
+ rectangle m_visarea; // current visible area (HBLANK end/start, VBLANK end/start)
// textures and bitmaps
- texture_format m_texformat; // texture format
- render_texture * m_texture[2]; // 2x textures for the screen bitmap
- screen_bitmap m_bitmap[2]; // 2x bitmaps for rendering
- bitmap_ind64 m_burnin; // burn-in bitmap
- UINT8 m_curbitmap; // current bitmap index
- UINT8 m_curtexture; // current texture index
- bool m_changed; // has this bitmap changed?
- INT32 m_last_partial_scan; // scanline of last partial update
- bitmap_argb32 m_screen_overlay_bitmap; // screen overlay bitmap
- UINT32 m_unique_id; // unique id for this screen_device
+ texture_format m_texformat; // texture format
+ render_texture * m_texture[2]; // 2x textures for the screen bitmap
+ screen_bitmap m_bitmap[2]; // 2x bitmaps for rendering
+ bitmap_ind64 m_burnin; // burn-in bitmap
+ UINT8 m_curbitmap; // current bitmap index
+ UINT8 m_curtexture; // current texture index
+ bool m_changed; // has this bitmap changed?
+ INT32 m_last_partial_scan; // scanline of last partial update
+ bitmap_argb32 m_screen_overlay_bitmap; // screen overlay bitmap
+ UINT32 m_unique_id; // unique id for this screen_device
// screen timing
- attoseconds_t m_frame_period; // attoseconds per frame
- attoseconds_t m_scantime; // attoseconds per scanline
- attoseconds_t m_pixeltime; // attoseconds per pixel
- attoseconds_t m_vblank_period; // attoseconds per VBLANK period
- attotime m_vblank_start_time; // time of last VBLANK start
- attotime m_vblank_end_time; // time of last VBLANK end
- emu_timer * m_vblank_begin_timer; // timer to signal VBLANK start
- emu_timer * m_vblank_end_timer; // timer to signal VBLANK end
- emu_timer * m_scanline0_timer; // scanline 0 timer
- emu_timer * m_scanline_timer; // scanline timer
- UINT64 m_frame_number; // the current frame number
- UINT32 m_partial_updates_this_frame;// partial update counter this frame
+ attoseconds_t m_frame_period; // attoseconds per frame
+ attoseconds_t m_scantime; // attoseconds per scanline
+ attoseconds_t m_pixeltime; // attoseconds per pixel
+ attoseconds_t m_vblank_period; // attoseconds per VBLANK period
+ attotime m_vblank_start_time; // time of last VBLANK start
+ attotime m_vblank_end_time; // time of last VBLANK end
+ emu_timer * m_vblank_begin_timer; // timer to signal VBLANK start
+ emu_timer * m_vblank_end_timer; // timer to signal VBLANK end
+ emu_timer * m_scanline0_timer; // scanline 0 timer
+ emu_timer * m_scanline_timer; // scanline timer
+ UINT64 m_frame_number; // the current frame number
+ UINT32 m_partial_updates_this_frame;// partial update counter this frame
// VBLANK callbacks
class callback_item
@@ -313,13 +313,13 @@ private:
public:
callback_item(vblank_state_delegate callback)
: m_next(NULL),
- m_callback(callback) { }
+ m_callback(callback) { }
callback_item *next() const { return m_next; }
- callback_item * m_next;
- vblank_state_delegate m_callback;
+ callback_item * m_next;
+ vblank_state_delegate m_callback;
};
- simple_list<callback_item> m_callback_list; // list of VBLANK callbacks
+ simple_list<callback_item> m_callback_list; // list of VBLANK callbacks
// auto-sizing bitmaps
class auto_bitmap_item
@@ -327,17 +327,17 @@ private:
public:
auto_bitmap_item(bitmap_t &bitmap)
: m_next(NULL),
- m_bitmap(bitmap) { }
+ m_bitmap(bitmap) { }
auto_bitmap_item *next() const { return m_next; }
- auto_bitmap_item * m_next;
- bitmap_t & m_bitmap;
+ auto_bitmap_item * m_next;
+ bitmap_t & m_bitmap;
};
simple_list<auto_bitmap_item> m_auto_bitmap_list; // list of registered bitmaps
// static data
- static UINT32 m_id_counter; // incremented for each constructed screen_device,
- // used as a unique identifier during runtime
+ static UINT32 m_id_counter; // incremented for each constructed screen_device,
+ // used as a unique identifier during runtime
};
// device type definition
@@ -352,15 +352,15 @@ typedef device_type_iterator<&device_creator<screen_device>, screen_device> scre
// SCREEN DEVICE CONFIGURATION MACROS
//**************************************************************************
-#define SCREEN_UPDATE_NAME(name) screen_update_##name
-#define SCREEN_UPDATE_IND16(name) UINT32 SCREEN_UPDATE_NAME(name)(device_t *, screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
-#define SCREEN_UPDATE_RGB32(name) UINT32 SCREEN_UPDATE_NAME(name)(device_t *, screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
-#define SCREEN_UPDATE16_CALL(name) SCREEN_UPDATE_NAME(name)(NULL, screen, bitmap, cliprect)
-#define SCREEN_UPDATE32_CALL(name) SCREEN_UPDATE_NAME(name)(NULL, screen, bitmap, cliprect)
+#define SCREEN_UPDATE_NAME(name) screen_update_##name
+#define SCREEN_UPDATE_IND16(name) UINT32 SCREEN_UPDATE_NAME(name)(device_t *, screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+#define SCREEN_UPDATE_RGB32(name) UINT32 SCREEN_UPDATE_NAME(name)(device_t *, screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
+#define SCREEN_UPDATE16_CALL(name) SCREEN_UPDATE_NAME(name)(NULL, screen, bitmap, cliprect)
+#define SCREEN_UPDATE32_CALL(name) SCREEN_UPDATE_NAME(name)(NULL, screen, bitmap, cliprect)
-#define SCREEN_VBLANK_NAME(name) screen_vblank_##name
-#define SCREEN_VBLANK(name) void SCREEN_VBLANK_NAME(name)(device_t *, screen_device &screen, bool vblank_on)
-#define SCREEN_VBLANK_CALL(name) SCREEN_VBLANK_NAME(name)(NULL, screen, vblank_on)
+#define SCREEN_VBLANK_NAME(name) screen_vblank_##name
+#define SCREEN_VBLANK(name) void SCREEN_VBLANK_NAME(name)(device_t *, screen_device &screen, bool vblank_on)
+#define SCREEN_VBLANK_CALL(name) SCREEN_VBLANK_NAME(name)(NULL, screen, vblank_on)
#define MCFG_SCREEN_ADD(_tag, _type) \
MCFG_DEVICE_ADD(_tag, SCREEN, 0) \
@@ -387,7 +387,7 @@ typedef device_type_iterator<&device_creator<screen_device>, screen_device> scre
#define MCFG_SCREEN_VISIBLE_AREA(_minx, _maxx, _miny, _maxy) \
screen_device::static_set_visarea(*device, _minx, _maxx, _miny, _maxy); \
-#define MCFG_SCREEN_DEFAULT_POSITION(_xscale, _xoffs, _yscale, _yoffs) \
+#define MCFG_SCREEN_DEFAULT_POSITION(_xscale, _xoffs, _yscale, _yoffs) \
screen_device::static_set_default_position(*device, _xscale, _xoffs, _yscale, _yoffs); \
#define MCFG_SCREEN_UPDATE_STATIC(_func) \
@@ -447,4 +447,4 @@ inline screen_update_rgb32_delegate screen_update_delegate_smart(UINT32 (_Functi
}
-#endif /* __SCREEN_H__ */
+#endif /* __SCREEN_H__ */
diff --git a/src/emu/softlist.c b/src/emu/softlist.c
index 50a73ff726d..e258ca4ff52 100644
--- a/src/emu/softlist.c
+++ b/src/emu/softlist.c
@@ -33,9 +33,9 @@ const device_type SOFTWARE_LIST = &device_creator<software_list_device>;
software_list_device::software_list_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SOFTWARE_LIST, "Software lists", tag, owner, clock),
- m_list_name(NULL),
- m_list_type(SOFTWARE_LIST_ORIGINAL_SYSTEM),
- m_filter(NULL)
+ m_list_name(NULL),
+ m_list_type(SOFTWARE_LIST_ORIGINAL_SYSTEM),
+ m_filter(NULL)
{
}
@@ -181,7 +181,7 @@ INLINE void unknown_attribute_value(software_list *swlist,
when they are not used anymore.
-------------------------------------------------*/
-#define global_strdup(s) strcpy(global_alloc_array(char, strlen(s) + 1), s)
+#define global_strdup(s) strcpy(global_alloc_array(char, strlen(s) + 1), s)
void software_name_split(const char *swlist_swname, char **swlist_name, char **swname, char **swpart )
{
@@ -1436,8 +1436,8 @@ const software_info *software_list_find(const software_list *swlist, const char
software_info *software_list_find(software_list *swlist, const char *look_for, software_info *prev)
{
return const_cast<software_info *>(software_list_find(const_cast<const software_list *>(swlist),
- look_for,
- const_cast<const software_info *>(prev)));
+ look_for,
+ const_cast<const software_info *>(prev)));
}
/*-------------------------------------------------
@@ -1500,7 +1500,7 @@ const software_part *software_find_part(const software_info *sw, const char *par
{
const software_part *part = sw ? sw->partdata : NULL;
- /* If neither partname nor interface supplied, then we just return the first entry */
+ /* If neither partname nor interface supplied, then we just return the first entry */
if ( partname || interface )
{
while( part && part->name )
@@ -1581,7 +1581,7 @@ void software_display_matches(const machine_config &config,emu_options &options,
if (deviter.first())
{
mame_printf_error("\n\"%s\" approximately matches the following\n"
- "supported software items (best match first):\n\n", name);
+ "supported software items (best match first):\n\n", name);
}
for (software_list_device *swlist = deviter.first(); swlist != NULL; swlist = deviter.next())
@@ -1926,7 +1926,7 @@ const char *software_part_get_feature(const software_part *part, const char *fea
software_get_default_slot
-------------------------------------------------*/
- const char *software_get_default_slot(const machine_config &config, emu_options &options, const device_image_interface *image, const char* default_card_slot)
+ const char *software_get_default_slot(const machine_config &config, emu_options &options, const device_image_interface *image, const char* default_card_slot)
{
const char* retVal = NULL;
const char* path = options.value(image->instance_name());
@@ -2079,7 +2079,7 @@ void software_list_device::device_validity_check(validity_checker &valid) const
/* make sure the driver name is 8 chars or less */
if ((is_clone && strlen(swinfo->shortname) > NAME_LEN_CLONE) || ((!is_clone) && strlen(swinfo->shortname) > NAME_LEN_PARENT))
mame_printf_error("%s: %s %s driver name must be %d characters or less\n", list->file->filename(), swinfo->shortname,
- is_clone ? "clone" : "parent", is_clone ? NAME_LEN_CLONE : NAME_LEN_PARENT);
+ is_clone ? "clone" : "parent", is_clone ? NAME_LEN_CLONE : NAME_LEN_PARENT);
/* make sure the year is only digits, '?' or '+' */
for (s = swinfo->year; *s; s++)
@@ -2132,18 +2132,18 @@ void software_list_device::device_validity_check(validity_checker &valid) const
bool softlist_contain_interface(const char *interface, const char *part_interface)
{
- bool result = FALSE;
+ bool result = FALSE;
astring interfaces(interface);
char *intf = strtok((char*)interfaces.cstr(),",");
while (intf != NULL)
{
if (!strcmp(intf, part_interface))
- {
- result = TRUE;
- break;
- }
+ {
+ result = TRUE;
+ break;
+ }
intf = strtok (NULL, ",");
}
- return result;
+ return result;
}
diff --git a/src/emu/softlist.h b/src/emu/softlist.h
index 82192aa82c4..14ec53c2581 100644
--- a/src/emu/softlist.h
+++ b/src/emu/softlist.h
@@ -15,9 +15,9 @@
-#define SOFTWARE_SUPPORTED_YES 0
-#define SOFTWARE_SUPPORTED_PARTIAL 1
-#define SOFTWARE_SUPPORTED_NO 2
+#define SOFTWARE_SUPPORTED_YES 0
+#define SOFTWARE_SUPPORTED_PARTIAL 1
+#define SOFTWARE_SUPPORTED_NO 2
enum softlist_type
{
@@ -75,12 +75,12 @@ protected:
virtual void device_validity_check(validity_checker &valid) const ATTR_COLD;
// configuration state
- const char * m_list_name;
- softlist_type m_list_type;
- const char * m_filter;
+ const char * m_list_name;
+ softlist_type m_list_type;
+ const char * m_filter;
// static state
- static tagmap_t<UINT8> s_checked_lists;
+ static tagmap_t<UINT8> s_checked_lists;
};
@@ -101,9 +101,9 @@ typedef device_type_iterator<&device_creator<software_list_device>, software_lis
/* Replace this with list<string>? */
struct feature_list
{
- feature_list *next;
- char *name;
- char *value;
+ feature_list *next;
+ char *name;
+ char *value;
};
struct software_part
@@ -121,16 +121,16 @@ struct software_info
const char *shortname;
const char *longname;
const char *parentname;
- const char *year; // Copyright year on title screen, actual release dates can be tracked in external resources
+ const char *year; // Copyright year on title screen, actual release dates can be tracked in external resources
const char *publisher;
- feature_list *other_info; // Here we store info like developer, serial #, etc. which belong to the software entry as a whole
- feature_list *shared_info; // Here we store info like TV standard compatibility, or add-on requirements, etc. which get inherited
+ feature_list *other_info; // Here we store info like developer, serial #, etc. which belong to the software entry as a whole
+ feature_list *shared_info; // Here we store info like TV standard compatibility, or add-on requirements, etc. which get inherited
// by each part of this software entry (after loading these are stored in partdata->featurelist)
UINT32 supported;
int part_entries;
int current_part_entry;
software_part *partdata;
- struct software_info *next; // Used internally
+ struct software_info *next; // Used internally
};
@@ -146,8 +146,8 @@ enum softlist_parse_position
struct parse_state
{
- XML_Parser parser;
- int done;
+ XML_Parser parser;
+ int done;
void (*error_proc)(const char *message);
void *param;
@@ -159,13 +159,13 @@ struct parse_state
struct software_list
{
- emu_file *file;
- object_pool *pool;
- parse_state state;
+ emu_file *file;
+ object_pool *pool;
+ parse_state state;
const char *description;
- struct software_info *software_info_list;
- struct software_info *current_software_info;
- software_info *softinfo;
+ struct software_info *software_info_list;
+ struct software_info *current_software_info;
+ software_info *softinfo;
const char *look_for;
int rom_entries;
int current_rom_entry;
diff --git a/src/emu/sound.c b/src/emu/sound.c
index e7b8e90bd5d..0475d1a9c31 100644
--- a/src/emu/sound.c
+++ b/src/emu/sound.c
@@ -49,9 +49,9 @@
// DEBUGGING
//**************************************************************************
-#define VERBOSE (0)
+#define VERBOSE (0)
-#define VPRINTF(x) do { if (VERBOSE) mame_printf_debug x; } while (0)
+#define VPRINTF(x) do { if (VERBOSE) mame_printf_debug x; } while (0)
@@ -79,22 +79,22 @@ const attotime sound_manager::STREAMS_UPDATE_ATTOTIME = attotime::from_hz(STREAM
sound_stream::sound_stream(device_t &device, int inputs, int outputs, int sample_rate, void *param, stream_update_func callback)
: m_device(device),
- m_next(NULL),
- m_sample_rate(sample_rate),
- m_new_sample_rate(0),
- m_attoseconds_per_sample(0),
- m_max_samples_per_update(0),
- m_input(inputs),
- m_input_array(inputs),
- m_resample_bufalloc(0),
- m_output(outputs),
- m_output_array(outputs),
- m_output_bufalloc(0),
- m_output_sampindex(0),
- m_output_update_sampindex(0),
- m_output_base_sampindex(0),
- m_callback(callback),
- m_param(param)
+ m_next(NULL),
+ m_sample_rate(sample_rate),
+ m_new_sample_rate(0),
+ m_attoseconds_per_sample(0),
+ m_max_samples_per_update(0),
+ m_input(inputs),
+ m_input_array(inputs),
+ m_resample_bufalloc(0),
+ m_output(outputs),
+ m_output_array(outputs),
+ m_output_bufalloc(0),
+ m_output_sampindex(0),
+ m_output_update_sampindex(0),
+ m_output_base_sampindex(0),
+ m_callback(callback),
+ m_param(param)
{
// get the device's sound interface
device_sound_interface *sound;
@@ -124,7 +124,7 @@ sound_stream::sound_stream(device_t &device, int inputs, int outputs, int sample
}
// force an update to the sample rates; this will cause everything to be recomputed
- // and will generate the initial resample buffers for our inputs
+ // and will generate the initial resample buffers for our inputs
recompute_sample_rate_data();
// set up the initial output buffer positions now that we have data
@@ -493,7 +493,7 @@ void sound_stream::recompute_sample_rate_data()
if (input.m_source != NULL)
{
// okay, we have a new sample rate; recompute the latency to be the maximum
- // sample period between us and our input
+ // sample period between us and our input
attoseconds_t new_attosecs_per_sample = ATTOSECONDS_PER_SECOND / input.m_source->m_stream->m_sample_rate;
attoseconds_t latency = MAX(new_attosecs_per_sample, m_attoseconds_per_sample);
@@ -507,7 +507,7 @@ void sound_stream::recompute_sample_rate_data()
latency = 0;
// we generally don't want to tweak the latency, so we just keep the greatest
- // one we've computed thus far
+ // one we've computed thus far
input.m_latency_attoseconds = MAX(input.m_latency_attoseconds, latency);
assert(input.m_latency_attoseconds < update_attoseconds);
}
@@ -761,9 +761,9 @@ stream_sample_t *sound_stream::generate_resampled_data(stream_input &input, UINT
sound_stream::stream_input::stream_input()
: m_source(NULL),
- m_latency_attoseconds(0),
- m_gain(0x100),
- m_user_gain(0x100)
+ m_latency_attoseconds(0),
+ m_gain(0x100),
+ m_user_gain(0x100)
{
}
@@ -779,7 +779,7 @@ sound_stream::stream_input::stream_input()
sound_stream::stream_output::stream_output()
: m_dependents(0),
- m_gain(0x100)
+ m_gain(0x100)
{
}
@@ -795,17 +795,17 @@ sound_stream::stream_output::stream_output()
sound_manager::sound_manager(running_machine &machine)
: m_machine(machine),
- m_update_timer(NULL),
- m_finalmix_leftover(0),
- m_finalmix(machine.sample_rate()),
- m_leftmix(machine.sample_rate()),
- m_rightmix(machine.sample_rate()),
- m_muted(0),
- m_attenuation(0),
- m_nosound_mode(!machine.options().sound()),
- m_wavfile(NULL),
- m_update_attoseconds(STREAMS_UPDATE_ATTOTIME.attoseconds),
- m_last_update(attotime::zero)
+ m_update_timer(NULL),
+ m_finalmix_leftover(0),
+ m_finalmix(machine.sample_rate()),
+ m_leftmix(machine.sample_rate()),
+ m_rightmix(machine.sample_rate()),
+ m_muted(0),
+ m_attenuation(0),
+ m_nosound_mode(!machine.options().sound()),
+ m_wavfile(NULL),
+ m_update_attoseconds(STREAMS_UPDATE_ATTOTIME.attoseconds),
+ m_last_update(attotime::zero)
{
// get filename for WAV file or AVI file if specified
const char *wavfile = machine.options().wav_write();
diff --git a/src/emu/sound.h b/src/emu/sound.h
index 05385c14285..eb9edca55cc 100644
--- a/src/emu/sound.h
+++ b/src/emu/sound.h
@@ -66,9 +66,9 @@ struct wav_file;
// structure describing an indexed mixer
struct mixer_input
{
- device_mixer_interface *mixer; // owning device interface
- sound_stream * stream; // stream within the device
- int inputnum; // input on the stream
+ device_mixer_interface *mixer; // owning device interface
+ sound_stream * stream; // stream within the device
+ int inputnum; // input on the stream
};
@@ -90,10 +90,10 @@ class sound_stream
stream_output &operator=(const stream_output &rhs) { assert(false); return *this; }
// internal state
- sound_stream * m_stream; // owning stream
- dynamic_array<stream_sample_t> m_buffer; // output buffer
- int m_dependents; // number of dependents
- INT16 m_gain; // gain to apply to the output
+ sound_stream * m_stream; // owning stream
+ dynamic_array<stream_sample_t> m_buffer; // output buffer
+ int m_dependents; // number of dependents
+ INT16 m_gain; // gain to apply to the output
};
// stream input class
@@ -105,18 +105,18 @@ class sound_stream
stream_input &operator=(const stream_input &rhs) { assert(false); return *this; }
// internal state
- stream_output * m_source; // pointer to the sound_output for this source
- dynamic_array<stream_sample_t> m_resample; // buffer for resampling to the stream's sample rate
- attoseconds_t m_latency_attoseconds; // latency between this stream and the input stream
- INT16 m_gain; // gain to apply to this input
- INT16 m_user_gain; // user-controlled gain to apply to this input
+ stream_output * m_source; // pointer to the sound_output for this source
+ dynamic_array<stream_sample_t> m_resample; // buffer for resampling to the stream's sample rate
+ attoseconds_t m_latency_attoseconds; // latency between this stream and the input stream
+ INT16 m_gain; // gain to apply to this input
+ INT16 m_user_gain; // user-controlled gain to apply to this input
};
// constants
- static const int OUTPUT_BUFFER_UPDATES = 5;
- static const UINT32 FRAC_BITS = 22;
- static const UINT32 FRAC_ONE = 1 << FRAC_BITS;
- static const UINT32 FRAC_MASK = FRAC_ONE - 1;
+ static const int OUTPUT_BUFFER_UPDATES = 5;
+ static const UINT32 FRAC_BITS = 22;
+ static const UINT32 FRAC_ONE = 1 << FRAC_BITS;
+ static const UINT32 FRAC_MASK = FRAC_ONE - 1;
// construction/destruction
sound_stream(device_t &device, int inputs, int outputs, int sample_rate, void *param = NULL, stream_update_func callback = &sound_stream::device_stream_update_stub);
@@ -163,37 +163,37 @@ private:
stream_sample_t *generate_resampled_data(stream_input &input, UINT32 numsamples);
// linking information
- device_t & m_device; // owning device
- sound_stream * m_next; // next stream in the chain
+ device_t & m_device; // owning device
+ sound_stream * m_next; // next stream in the chain
// general information
- UINT32 m_sample_rate; // sample rate of this stream
- UINT32 m_new_sample_rate; // newly-set sample rate for the stream
+ UINT32 m_sample_rate; // sample rate of this stream
+ UINT32 m_new_sample_rate; // newly-set sample rate for the stream
// timing information
- attoseconds_t m_attoseconds_per_sample;// number of attoseconds per sample
- INT32 m_max_samples_per_update;// maximum samples per update
+ attoseconds_t m_attoseconds_per_sample;// number of attoseconds per sample
+ INT32 m_max_samples_per_update;// maximum samples per update
// input information
- dynamic_array<stream_input> m_input; // list of streams we directly depend upon
- dynamic_array<stream_sample_t *> m_input_array; // array of inputs for passing to the callback
+ dynamic_array<stream_input> m_input; // list of streams we directly depend upon
+ dynamic_array<stream_sample_t *> m_input_array; // array of inputs for passing to the callback
// resample buffer information
- UINT32 m_resample_bufalloc; // allocated size of each resample buffer
+ UINT32 m_resample_bufalloc; // allocated size of each resample buffer
// output information
- dynamic_array<stream_output> m_output; // list of streams which directly depend upon us
+ dynamic_array<stream_output> m_output; // list of streams which directly depend upon us
dynamic_array<stream_sample_t *> m_output_array; // array of outputs for passing to the callback
// output buffer information
- UINT32 m_output_bufalloc; // allocated size of each output buffer
- INT32 m_output_sampindex; // current position within each output buffer
- INT32 m_output_update_sampindex;// position at time of last global update
- INT32 m_output_base_sampindex;// sample at base of buffer, relative to the current emulated second
+ UINT32 m_output_bufalloc; // allocated size of each output buffer
+ INT32 m_output_sampindex; // current position within each output buffer
+ INT32 m_output_update_sampindex;// position at time of last global update
+ INT32 m_output_base_sampindex;// sample at base of buffer, relative to the current emulated second
// callback information
- stream_update_func m_callback; // callback function
- void * m_param; // callback function parameter
+ stream_update_func m_callback; // callback function
+ void * m_param; // callback function parameter
};
@@ -251,25 +251,25 @@ private:
void update(void *ptr = NULL, INT32 param = 0);
// internal state
- running_machine & m_machine; // reference to our machine
- emu_timer * m_update_timer; // timer to drive periodic updates
+ running_machine & m_machine; // reference to our machine
+ emu_timer * m_update_timer; // timer to drive periodic updates
- UINT32 m_finalmix_leftover;
+ UINT32 m_finalmix_leftover;
dynamic_array<INT16> m_finalmix;
dynamic_array<INT32> m_leftmix;
dynamic_array<INT32> m_rightmix;
- UINT8 m_muted;
- int m_attenuation;
- int m_nosound_mode;
+ UINT8 m_muted;
+ int m_attenuation;
+ int m_nosound_mode;
- wav_file * m_wavfile;
+ wav_file * m_wavfile;
// streams data
- simple_list<sound_stream> m_stream_list; // list of streams
- attoseconds_t m_update_attoseconds; // attoseconds between global updates
- attotime m_last_update; // last update time
+ simple_list<sound_stream> m_stream_list; // list of streams
+ attoseconds_t m_update_attoseconds; // attoseconds between global updates
+ attotime m_last_update; // last update time
};
-#endif /* __SOUND_H__ */
+#endif /* __SOUND_H__ */
diff --git a/src/emu/sound/2151intf.c b/src/emu/sound/2151intf.c
index 4a08ef25f52..79b8d1077c5 100644
--- a/src/emu/sound/2151intf.c
+++ b/src/emu/sound/2151intf.c
@@ -22,9 +22,9 @@ const device_type YM2151 = &device_creator<ym2151_device>;
ym2151_device::ym2151_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM2151, "YM2151", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_irqhandler(*this),
- m_portwritehandler(*this)
+ device_sound_interface(mconfig, *this),
+ m_irqhandler(*this),
+ m_portwritehandler(*this)
{
}
@@ -41,7 +41,7 @@ READ8_MEMBER( ym2151_device::read )
return ym2151_read_status(m_chip);
}
else
- return 0xff; /* confirmed on a real YM2151 */
+ return 0xff; /* confirmed on a real YM2151 */
}
diff --git a/src/emu/sound/2151intf.h b/src/emu/sound/2151intf.h
index 7c7f20570fe..b8c42eb01e9 100644
--- a/src/emu/sound/2151intf.h
+++ b/src/emu/sound/2151intf.h
@@ -34,7 +34,7 @@
// ======================> ym2151_device
-class ym2151_device : public device_t,
+class ym2151_device : public device_t,
public device_sound_interface
{
public:
@@ -68,12 +68,12 @@ private:
static void port_write_frontend(device_t *device, offs_t offset, UINT8 data);
// internal state
- sound_stream * m_stream;
- emu_timer * m_timer[2];
- void * m_chip;
- UINT8 m_lastreg;
- devcb2_write_line m_irqhandler;
- devcb2_write8 m_portwritehandler;
+ sound_stream * m_stream;
+ emu_timer * m_timer[2];
+ void * m_chip;
+ UINT8 m_lastreg;
+ devcb2_write_line m_irqhandler;
+ devcb2_write8 m_portwritehandler;
};
diff --git a/src/emu/sound/2203intf.c b/src/emu/sound/2203intf.c
index b939142ae13..14209420407 100644
--- a/src/emu/sound/2203intf.c
+++ b/src/emu/sound/2203intf.c
@@ -5,10 +5,10 @@
struct ym2203_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
- void * psg;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
+ void * psg;
const ym2203_interface *intf;
devcb_resolved_write_line irqhandler;
device_t *device;
@@ -88,11 +88,11 @@ static void timer_handler(void *param,int c,int count,int clock)
{
ym2203_state *info = (ym2203_state *)param;
if( count == 0 )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[c]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
attotime period = attotime::from_hz(clock) * count;
if (!info->timer[c]->enable(true))
info->timer[c]->adjust(period);
@@ -184,7 +184,7 @@ const device_type YM2203 = &device_creator<ym2203_device>;
ym2203_device::ym2203_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM2203, "YM2203", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym2203_state);
}
@@ -235,5 +235,3 @@ void ym2203_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/2203intf.h b/src/emu/sound/2203intf.h
index 12140727db2..63116cc05a0 100644
--- a/src/emu/sound/2203intf.h
+++ b/src/emu/sound/2203intf.h
@@ -24,7 +24,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ym2203_control_port_w );
DECLARE_WRITE8_DEVICE_HANDLER( ym2203_write_port_w );
class ym2203_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ym2203_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/2413intf.c b/src/emu/sound/2413intf.c
index 67706464e8c..b08338d4d75 100644
--- a/src/emu/sound/2413intf.c
+++ b/src/emu/sound/2413intf.c
@@ -12,8 +12,8 @@
/* for stream system */
struct ym2413_state
{
- sound_stream * stream;
- void * chip;
+ sound_stream * stream;
+ void * chip;
};
@@ -28,14 +28,14 @@ INLINE ym2413_state *get_safe_token(device_t *device)
#ifdef UNUSED_FUNCTION
void YM2413DAC_update(int chip,stream_sample_t **inputs, stream_sample_t **_buffer,int length)
{
- INT16 *buffer = _buffer[0];
- static int out = 0;
-
- if ( ym2413[chip].reg[0x0F] & 0x01 )
- {
- out = ((ym2413[chip].reg[0x10] & 0xF0) << 7);
- }
- while (length--) *(buffer++) = out;
+ INT16 *buffer = _buffer[0];
+ static int out = 0;
+
+ if ( ym2413[chip].reg[0x0F] & 0x01 )
+ {
+ out = ((ym2413[chip].reg[0x10] & 0xF0) << 7);
+ }
+ while (length--) *(buffer++) = out;
}
#endif
@@ -118,7 +118,7 @@ const device_type YM2413 = &device_creator<ym2413_device>;
ym2413_device::ym2413_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM2413, "YM2413", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym2413_state);
}
@@ -169,5 +169,3 @@ void ym2413_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/2413intf.h b/src/emu/sound/2413intf.h
index a05e0ee48c9..6d97ace75e4 100644
--- a/src/emu/sound/2413intf.h
+++ b/src/emu/sound/2413intf.h
@@ -11,7 +11,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ym2413_register_port_w );
DECLARE_WRITE8_DEVICE_HANDLER( ym2413_data_port_w );
class ym2413_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ym2413_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/2608intf.c b/src/emu/sound/2608intf.c
index 300344badf0..a3fa6599f23 100644
--- a/src/emu/sound/2608intf.c
+++ b/src/emu/sound/2608intf.c
@@ -18,10 +18,10 @@
struct ym2608_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
- void * psg;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
+ void * psg;
const ym2608_interface *intf;
device_t *device;
};
@@ -93,11 +93,11 @@ static void timer_handler(void *param,int c,int count,int clock)
{
ym2608_state *info = (ym2608_state *)param;
if( count == 0 )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[c]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
attotime period = attotime::from_hz(clock) * count;
if (!info->timer[c]->enable(true))
info->timer[c]->adjust(period);
@@ -161,8 +161,8 @@ static DEVICE_START( ym2608 )
/* initialize YM2608 */
info->chip = ym2608_init(info,device,device->clock(),rate,
- pcmbufa,pcmsizea,
- timer_handler,IRQHandler,&psgintf);
+ pcmbufa,pcmsizea,
+ timer_handler,IRQHandler,&psgintf);
assert_always(info->chip != NULL, "Error creating YM2608 chip");
device->machine().save().register_postload(save_prepost_delegate(FUNC(ym2608_intf_postload), info));
@@ -207,7 +207,7 @@ const device_type YM2608 = &device_creator<ym2608_device>;
ym2608_device::ym2608_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM2608, "YM2608", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym2608_state);
}
@@ -258,5 +258,3 @@ void ym2608_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/2608intf.h b/src/emu/sound/2608intf.h
index 91571ce2a8e..5d74947756a 100644
--- a/src/emu/sound/2608intf.h
+++ b/src/emu/sound/2608intf.h
@@ -13,7 +13,7 @@ void ym2608_update_request(void *param);
struct ym2608_interface
{
const ay8910_interface ay8910_intf;
- void ( *handler )( device_t *device, int irq ); /* IRQ handler for the YM2608 */
+ void ( *handler )( device_t *device, int irq ); /* IRQ handler for the YM2608 */
};
DECLARE_READ8_DEVICE_HANDLER( ym2608_r );
@@ -29,7 +29,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ym2608_data_port_a_w );
DECLARE_WRITE8_DEVICE_HANDLER( ym2608_data_port_b_w );
class ym2608_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ym2608_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/2610intf.c b/src/emu/sound/2610intf.c
index f5d520dd220..cb79c022fd6 100644
--- a/src/emu/sound/2610intf.c
+++ b/src/emu/sound/2610intf.c
@@ -18,10 +18,10 @@
struct ym2610_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
- void * psg;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
+ void * psg;
const ym2610_interface *intf;
device_t *device;
};
@@ -92,11 +92,11 @@ static void timer_handler(void *param,int c,int count,int clock)
{
ym2610_state *info = (ym2610_state *)param;
if( count == 0 )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[c]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
attotime period = attotime::from_hz(clock) * count;
if (!info->timer[c]->enable(true))
@@ -173,8 +173,8 @@ static DEVICE_START( ym2610 )
/**** initialize YM2610 ****/
info->chip = ym2610_init(info,device,device->clock(),rate,
- pcmbufa,pcmsizea,pcmbufb,pcmsizeb,
- timer_handler,IRQHandler,&psgintf);
+ pcmbufa,pcmsizea,pcmbufb,pcmsizeb,
+ timer_handler,IRQHandler,&psgintf);
assert_always(info->chip != NULL, "Error creating YM2610 chip");
device->machine().save().register_postload(save_prepost_delegate(FUNC(ym2610_intf_postload), info));
@@ -220,13 +220,13 @@ const device_type YM2610 = &device_creator<ym2610_device>;
ym2610_device::ym2610_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM2610, "YM2610", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym2610_state);
}
ym2610_device::ym2610_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym2610_state);
}
@@ -295,5 +295,3 @@ void ym2610b_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/2610intf.h b/src/emu/sound/2610intf.h
index 0a584a26fbc..64ce8f15ea7 100644
--- a/src/emu/sound/2610intf.h
+++ b/src/emu/sound/2610intf.h
@@ -11,7 +11,7 @@ void ym2610_update_request(void *param);
struct ym2610_interface
{
- void ( *handler )( device_t *device, int irq ); /* IRQ handler for the YM2610 */
+ void ( *handler )( device_t *device, int irq ); /* IRQ handler for the YM2610 */
};
DECLARE_READ8_DEVICE_HANDLER( ym2610_r );
@@ -28,7 +28,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ym2610_data_port_b_w );
class ym2610_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ym2610_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/2612intf.c b/src/emu/sound/2612intf.c
index aac1b52af9a..5a77b51177c 100644
--- a/src/emu/sound/2612intf.c
+++ b/src/emu/sound/2612intf.c
@@ -18,9 +18,9 @@
struct ym2612_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
const ym2612_interface *intf;
device_t *device;
};
@@ -60,11 +60,11 @@ static void timer_handler(void *param,int c,int count,int clock)
{
ym2612_state *info = (ym2612_state *)param;
if( count == 0 )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[c]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
attotime period = attotime::from_hz(clock) * count;
if (!info->timer[c]->enable(1))
info->timer[c]->adjust(period);
@@ -160,13 +160,13 @@ const device_type YM2612 = &device_creator<ym2612_device>;
ym2612_device::ym2612_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM2612, "YM2612", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym2612_state);
}
ym2612_device::ym2612_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym2612_state);
}
@@ -235,5 +235,3 @@ void ym3438_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/2612intf.h b/src/emu/sound/2612intf.h
index b74e4af0a3f..9c03c46930a 100644
--- a/src/emu/sound/2612intf.h
+++ b/src/emu/sound/2612intf.h
@@ -27,7 +27,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ym2612_data_port_b_w );
class ym2612_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ym2612_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -60,18 +60,18 @@ struct ym3438_interface
};
-#define ym3438_r ym2612_r
-#define ym3438_w ym2612_w
+#define ym3438_r ym2612_r
+#define ym3438_w ym2612_w
-#define ym3438_status_port_a_r ym2612_status_port_a_r
-#define ym3438_status_port_b_r ym2612_status_port_b_r
-#define ym3438_data_port_a_r ym2612_data_port_a_r
-#define ym3438_data_port_b_r ym2612_data_port_b_r
+#define ym3438_status_port_a_r ym2612_status_port_a_r
+#define ym3438_status_port_b_r ym2612_status_port_b_r
+#define ym3438_data_port_a_r ym2612_data_port_a_r
+#define ym3438_data_port_b_r ym2612_data_port_b_r
-#define ym3438_control_port_a_w ym2612_control_port_a_w
-#define ym3438_control_port_b_w ym2612_control_port_b_w
-#define ym3438_data_port_a_w ym2612_data_port_a_w
-#define ym3438_data_port_b_w ym2612_data_port_b_w
+#define ym3438_control_port_a_w ym2612_control_port_a_w
+#define ym3438_control_port_b_w ym2612_control_port_b_w
+#define ym3438_data_port_a_w ym2612_data_port_a_w
+#define ym3438_data_port_b_w ym2612_data_port_b_w
class ym3438_device : public ym2612_device
diff --git a/src/emu/sound/262intf.c b/src/emu/sound/262intf.c
index 17eb1c1b86e..5bbe96c2a4a 100644
--- a/src/emu/sound/262intf.c
+++ b/src/emu/sound/262intf.c
@@ -12,9 +12,9 @@
struct ymf262_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
const ymf262_interface *intf;
device_t *device;
};
@@ -52,11 +52,11 @@ static void timer_handler_262(void *param,int timer, attotime period)
{
ymf262_state *info = (ymf262_state *)param;
if( period == attotime::zero )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[timer]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
info->timer[timer]->adjust(period);
}
}
@@ -134,7 +134,7 @@ const device_type YMF262 = &device_creator<ymf262_device>;
ymf262_device::ymf262_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YMF262, "YMF262", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ymf262_state);
}
@@ -185,5 +185,3 @@ void ymf262_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/262intf.h b/src/emu/sound/262intf.h
index 16eed55142f..134f26ec93a 100644
--- a/src/emu/sound/262intf.h
+++ b/src/emu/sound/262intf.h
@@ -23,7 +23,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ymf262_data_b_w );
class ymf262_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ymf262_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/3526intf.c b/src/emu/sound/3526intf.c
index d3c064b009e..78fe7e66e75 100644
--- a/src/emu/sound/3526intf.c
+++ b/src/emu/sound/3526intf.c
@@ -24,9 +24,9 @@
struct ym3526_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
const ym3526_interface *intf;
device_t *device;
@@ -64,11 +64,11 @@ static void TimerHandler(void *param,int c,attotime period)
{
ym3526_state *info = (ym3526_state *)param;
if( period == attotime::zero )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[c]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
info->timer[c]->adjust(period);
}
}
@@ -148,7 +148,7 @@ const device_type YM3526 = &device_creator<ym3526_device>;
ym3526_device::ym3526_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM3526, "YM3526", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym3526_state);
}
@@ -199,5 +199,3 @@ void ym3526_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/3526intf.h b/src/emu/sound/3526intf.h
index b828000d4eb..142b9edff17 100644
--- a/src/emu/sound/3526intf.h
+++ b/src/emu/sound/3526intf.h
@@ -19,7 +19,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ym3526_control_port_w );
DECLARE_WRITE8_DEVICE_HANDLER( ym3526_write_port_w );
class ym3526_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ym3526_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/3812intf.c b/src/emu/sound/3812intf.c
index 0a7de119ca2..7bcf0949ca7 100644
--- a/src/emu/sound/3812intf.c
+++ b/src/emu/sound/3812intf.c
@@ -24,9 +24,9 @@
struct ym3812_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
const ym3812_interface *intf;
device_t *device;
};
@@ -62,11 +62,11 @@ static void TimerHandler(void *param,int c,attotime period)
{
ym3812_state *info = (ym3812_state *)param;
if( period == attotime::zero )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[c]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
info->timer[c]->adjust(period);
}
}
@@ -144,7 +144,7 @@ const device_type YM3812 = &device_creator<ym3812_device>;
ym3812_device::ym3812_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YM3812, "YM3812", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ym3812_state);
}
@@ -195,5 +195,3 @@ void ym3812_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/3812intf.h b/src/emu/sound/3812intf.h
index b7bc9f3b51f..1357d41795a 100644
--- a/src/emu/sound/3812intf.h
+++ b/src/emu/sound/3812intf.h
@@ -19,7 +19,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( ym3812_control_port_w );
DECLARE_WRITE8_DEVICE_HANDLER( ym3812_write_port_w );
class ym3812_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ym3812_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/8950intf.c b/src/emu/sound/8950intf.c
index 8a2e7de0b86..56c18dbdd9c 100644
--- a/src/emu/sound/8950intf.c
+++ b/src/emu/sound/8950intf.c
@@ -24,9 +24,9 @@
struct y8950_state
{
- sound_stream * stream;
- emu_timer * timer[2];
- void * chip;
+ sound_stream * stream;
+ emu_timer * timer[2];
+ void * chip;
const y8950_interface *intf;
y8950_device *device;
};
@@ -59,11 +59,11 @@ static void TimerHandler(void *param,int c,attotime period)
{
y8950_state *info = (y8950_state *)param;
if( period == attotime::zero )
- { /* Reset FM Timer */
+ { /* Reset FM Timer */
info->timer[c]->enable(false);
}
else
- { /* Start FM Timer */
+ { /* Start FM Timer */
info->timer[c]->adjust(period);
}
}
@@ -177,7 +177,7 @@ const device_type Y8950 = &device_creator<y8950_device>;
y8950_device::y8950_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, Y8950, "Y8950", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(y8950_state);
}
@@ -248,5 +248,3 @@ void y8950_device::sound_stream_update(sound_stream &stream, stream_sample_t **i
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/8950intf.h b/src/emu/sound/8950intf.h
index b6dae0df8b9..52677f28ab8 100644
--- a/src/emu/sound/8950intf.h
+++ b/src/emu/sound/8950intf.h
@@ -23,8 +23,8 @@ DECLARE_WRITE8_DEVICE_HANDLER( y8950_control_port_w );
DECLARE_WRITE8_DEVICE_HANDLER( y8950_write_port_w );
class y8950_device : public device_t,
- public device_sound_interface,
- public y8950_interface
+ public device_sound_interface,
+ public y8950_interface
{
public:
y8950_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/aica.c b/src/emu/sound/aica.c
index 78b9bd8e77d..3ef493af208 100644
--- a/src/emu/sound/aica.c
+++ b/src/emu/sound/aica.c
@@ -14,10 +14,10 @@
#define ICLIP16(x) (x<-32768)?-32768:((x>32767)?32767:x)
-#define SHIFT 12
-#define FIX(v) ((UINT32) ((float) (1<<SHIFT)*(v)))
+#define SHIFT 12
+#define FIX(v) ((UINT32) ((float) (1<<SHIFT)*(v)))
-#define EG_SHIFT 16
+#define EG_SHIFT 16
// include the LFO handling code
#include "aicalfo.c"
@@ -28,47 +28,47 @@
*/
//SLOT PARAMETERS
-#define KEYONEX(slot) ((slot->udata.data[0x0]>>0x0)&0x8000)
-#define KEYONB(slot) ((slot->udata.data[0x0]>>0x0)&0x4000)
-#define SSCTL(slot) ((slot->udata.data[0x0]>>0xA)&0x0001)
-#define LPCTL(slot) ((slot->udata.data[0x0]>>0x9)&0x0001)
-#define PCMS(slot) ((slot->udata.data[0x0]>>0x7)&0x0003)
+#define KEYONEX(slot) ((slot->udata.data[0x0]>>0x0)&0x8000)
+#define KEYONB(slot) ((slot->udata.data[0x0]>>0x0)&0x4000)
+#define SSCTL(slot) ((slot->udata.data[0x0]>>0xA)&0x0001)
+#define LPCTL(slot) ((slot->udata.data[0x0]>>0x9)&0x0001)
+#define PCMS(slot) ((slot->udata.data[0x0]>>0x7)&0x0003)
-#define SA(slot) (((slot->udata.data[0x0]&0x7F)<<16)|(slot->udata.data[0x4/2]))
+#define SA(slot) (((slot->udata.data[0x0]&0x7F)<<16)|(slot->udata.data[0x4/2]))
-#define LSA(slot) (slot->udata.data[0x8/2])
+#define LSA(slot) (slot->udata.data[0x8/2])
-#define LEA(slot) (slot->udata.data[0xc/2])
+#define LEA(slot) (slot->udata.data[0xc/2])
-#define D2R(slot) ((slot->udata.data[0x10/2]>>0xB)&0x001F)
-#define D1R(slot) ((slot->udata.data[0x10/2]>>0x6)&0x001F)
-#define AR(slot) ((slot->udata.data[0x10/2]>>0x0)&0x001F)
+#define D2R(slot) ((slot->udata.data[0x10/2]>>0xB)&0x001F)
+#define D1R(slot) ((slot->udata.data[0x10/2]>>0x6)&0x001F)
+#define AR(slot) ((slot->udata.data[0x10/2]>>0x0)&0x001F)
-#define LPSLNK(slot) ((slot->udata.data[0x14/2]>>0x0)&0x4000)
-#define KRS(slot) ((slot->udata.data[0x14/2]>>0xA)&0x000F)
-#define DL(slot) ((slot->udata.data[0x14/2]>>0x5)&0x001F)
-#define RR(slot) ((slot->udata.data[0x14/2]>>0x0)&0x001F)
+#define LPSLNK(slot) ((slot->udata.data[0x14/2]>>0x0)&0x4000)
+#define KRS(slot) ((slot->udata.data[0x14/2]>>0xA)&0x000F)
+#define DL(slot) ((slot->udata.data[0x14/2]>>0x5)&0x001F)
+#define RR(slot) ((slot->udata.data[0x14/2]>>0x0)&0x001F)
-#define TL(slot) ((slot->udata.data[0x28/2]>>0x8)&0x00FF)
+#define TL(slot) ((slot->udata.data[0x28/2]>>0x8)&0x00FF)
-#define OCT(slot) ((slot->udata.data[0x18/2]>>0xB)&0x000F)
-#define FNS(slot) ((slot->udata.data[0x18/2]>>0x0)&0x03FF)
+#define OCT(slot) ((slot->udata.data[0x18/2]>>0xB)&0x000F)
+#define FNS(slot) ((slot->udata.data[0x18/2]>>0x0)&0x03FF)
-#define LFORE(slot) ((slot->udata.data[0x1c/2]>>0x0)&0x8000)
-#define LFOF(slot) ((slot->udata.data[0x1c/2]>>0xA)&0x001F)
-#define PLFOWS(slot) ((slot->udata.data[0x1c/2]>>0x8)&0x0003)
-#define PLFOS(slot) ((slot->udata.data[0x1c/2]>>0x5)&0x0007)
-#define ALFOWS(slot) ((slot->udata.data[0x1c/2]>>0x3)&0x0003)
-#define ALFOS(slot) ((slot->udata.data[0x1c/2]>>0x0)&0x0007)
+#define LFORE(slot) ((slot->udata.data[0x1c/2]>>0x0)&0x8000)
+#define LFOF(slot) ((slot->udata.data[0x1c/2]>>0xA)&0x001F)
+#define PLFOWS(slot) ((slot->udata.data[0x1c/2]>>0x8)&0x0003)
+#define PLFOS(slot) ((slot->udata.data[0x1c/2]>>0x5)&0x0007)
+#define ALFOWS(slot) ((slot->udata.data[0x1c/2]>>0x3)&0x0003)
+#define ALFOS(slot) ((slot->udata.data[0x1c/2]>>0x0)&0x0007)
-#define ISEL(slot) ((slot->udata.data[0x20/2]>>0x0)&0x000F)
-#define IMXL(slot) ((slot->udata.data[0x20/2]>>0x4)&0x000F)
+#define ISEL(slot) ((slot->udata.data[0x20/2]>>0x0)&0x000F)
+#define IMXL(slot) ((slot->udata.data[0x20/2]>>0x4)&0x000F)
-#define DISDL(slot) ((slot->udata.data[0x24/2]>>0x8)&0x000F)
-#define DIPAN(slot) ((slot->udata.data[0x24/2]>>0x0)&0x001F)
+#define DISDL(slot) ((slot->udata.data[0x24/2]>>0x8)&0x000F)
+#define DIPAN(slot) ((slot->udata.data[0x24/2]>>0x0)&0x001F)
-#define EFSDL(slot) ((AICA->EFSPAN[slot*4]>>8)&0x000f)
-#define EFPAN(slot) ((AICA->EFSPAN[slot*4]>>0)&0x001f)
+#define EFSDL(slot) ((AICA->EFSPAN[slot*4]>>8)&0x000f)
+#define EFPAN(slot) ((AICA->EFSPAN[slot*4]>>0)&0x001f)
//Envelope times in ms
static const double ARTimes[64]={100000/*infinity*/,100000/*infinity*/,8100.0,6900.0,6000.0,4800.0,4000.0,3400.0,3000.0,2400.0,2000.0,1700.0,1500.0,
@@ -84,16 +84,16 @@ static INT32 EG_TABLE[0x400];
enum STATE {ATTACK,DECAY1,DECAY2,RELEASE};
struct EG_t
{
- int volume; //
+ int volume; //
STATE state;
int step;
//step vals
- int AR; //Attack
- int D1R; //Decay1
- int D2R; //Decay2
- int RR; //Release
+ int AR; //Attack
+ int D1R; //Decay1
+ int D2R; //Decay2
+ int RR; //Release
- int DL; //Decay level
+ int DL; //Decay level
UINT8 LPLINK;
};
@@ -101,19 +101,19 @@ struct SLOT
{
union
{
- UINT16 data[0x40]; //only 0x1a bytes used
+ UINT16 data[0x40]; //only 0x1a bytes used
UINT8 datab[0x80];
} udata;
- UINT8 active; //this slot is currently playing
- UINT8 *base; //samples base address
+ UINT8 active; //this slot is currently playing
+ UINT8 *base; //samples base address
UINT32 prv_addr; // previous play address (for ADPCM)
- UINT32 cur_addr; //current play address (24.8)
- UINT32 nxt_addr; //next play address
- UINT32 step; //pitch step (24.8)
- UINT8 Backwards; //the wave is playing backwards
- EG_t EG; //Envelope
- LFO_t PLFO; //Phase LFO
- LFO_t ALFO; //Amplitude LFO
+ UINT32 cur_addr; //current play address (24.8)
+ UINT32 nxt_addr; //next play address
+ UINT32 step; //pitch step (24.8)
+ UINT8 Backwards; //the wave is playing backwards
+ EG_t EG; //Envelope
+ LFO_t PLFO; //Phase LFO
+ LFO_t ALFO; //Amplitude LFO
int slot;
int cur_sample; //current ADPCM sample
int cur_quant; //current ADPCM step
@@ -124,36 +124,36 @@ struct SLOT
};
-#define MEM4B(aica) ((aica->udata.data[0]>>0x0)&0x0200)
-#define DAC18B(aica) ((aica->udata.data[0]>>0x0)&0x0100)
-#define MVOL(aica) ((aica->udata.data[0]>>0x0)&0x000F)
-#define RBL(aica) ((aica->udata.data[2]>>0xD)&0x0003)
-#define RBP(aica) ((aica->udata.data[2]>>0x0)&0x0fff)
-#define MOFULL(aica) ((aica->udata.data[4]>>0x0)&0x1000)
-#define MOEMPTY(aica) ((aica->udata.data[4]>>0x0)&0x0800)
-#define MIOVF(aica) ((aica->udata.data[4]>>0x0)&0x0400)
-#define MIFULL(aica) ((aica->udata.data[4]>>0x0)&0x0200)
-#define MIEMPTY(aica) ((aica->udata.data[4]>>0x0)&0x0100)
-
-#define AFSEL(aica) ((aica->udata.data[0xc/2]>>0x0)&0x4000)
-#define MSLC(aica) ((aica->udata.data[0xc/2]>>0x8)&0x3F)
-
-#define SCILV0(aica) ((aica->udata.data[0xa8/2]>>0x0)&0xff)
-#define SCILV1(aica) ((aica->udata.data[0xac/2]>>0x0)&0xff)
-#define SCILV2(aica) ((aica->udata.data[0xb0/2]>>0x0)&0xff)
-
-#define MCIEB(aica) ((aica->udata.data[0xb4/2]>>0x0)&0xff)
-#define MCIPD(aica) ((aica->udata.data[0xb8/2]>>0x0)&0xff)
-#define MCIRE(aica) ((aica->udata.data[0xbc/2]>>0x0)&0xff)
-
-#define SCIEX0 0
-#define SCIEX1 1
-#define SCIEX2 2
-#define SCIMID 3
-#define SCIDMA 4
-#define SCIIRQ 5
-#define SCITMA 6
-#define SCITMB 7
+#define MEM4B(aica) ((aica->udata.data[0]>>0x0)&0x0200)
+#define DAC18B(aica) ((aica->udata.data[0]>>0x0)&0x0100)
+#define MVOL(aica) ((aica->udata.data[0]>>0x0)&0x000F)
+#define RBL(aica) ((aica->udata.data[2]>>0xD)&0x0003)
+#define RBP(aica) ((aica->udata.data[2]>>0x0)&0x0fff)
+#define MOFULL(aica) ((aica->udata.data[4]>>0x0)&0x1000)
+#define MOEMPTY(aica) ((aica->udata.data[4]>>0x0)&0x0800)
+#define MIOVF(aica) ((aica->udata.data[4]>>0x0)&0x0400)
+#define MIFULL(aica) ((aica->udata.data[4]>>0x0)&0x0200)
+#define MIEMPTY(aica) ((aica->udata.data[4]>>0x0)&0x0100)
+
+#define AFSEL(aica) ((aica->udata.data[0xc/2]>>0x0)&0x4000)
+#define MSLC(aica) ((aica->udata.data[0xc/2]>>0x8)&0x3F)
+
+#define SCILV0(aica) ((aica->udata.data[0xa8/2]>>0x0)&0xff)
+#define SCILV1(aica) ((aica->udata.data[0xac/2]>>0x0)&0xff)
+#define SCILV2(aica) ((aica->udata.data[0xb0/2]>>0x0)&0xff)
+
+#define MCIEB(aica) ((aica->udata.data[0xb4/2]>>0x0)&0xff)
+#define MCIPD(aica) ((aica->udata.data[0xb8/2]>>0x0)&0xff)
+#define MCIRE(aica) ((aica->udata.data[0xbc/2]>>0x0)&0xff)
+
+#define SCIEX0 0
+#define SCIEX1 1
+#define SCIEX2 2
+#define SCIMID 3
+#define SCIDMA 4
+#define SCIIRQ 5
+#define SCITMA 6
+#define SCITMB 7
struct aica_state
{
@@ -210,7 +210,7 @@ static stream_sample_t *bufferr;
static int length;
-static signed short *RBUFDST; //this points to where the sample will be stored in the RingBuf
+static signed short *RBUFDST; //this points to where the sample will be stored in the RingBuf
INLINE aica_state *get_safe_token(device_t *device)
{
@@ -319,7 +319,7 @@ static TIMER_CALLBACK( timerC_cb )
static int Get_AR(aica_state *AICA,int base,int R)
{
int Rate=base+(R<<1);
- if(Rate>63) Rate=63;
+ if(Rate>63) Rate=63;
if(Rate<0) Rate=0;
return AICA->ARTABLE[Rate];
}
@@ -327,7 +327,7 @@ static int Get_AR(aica_state *AICA,int base,int R)
static int Get_DR(aica_state *AICA,int base,int R)
{
int Rate=base+(R<<1);
- if(Rate>63) Rate=63;
+ if(Rate>63) Rate=63;
if(Rate<0) Rate=0;
return AICA->DRTABLE[Rate];
}
@@ -335,7 +335,7 @@ static int Get_DR(aica_state *AICA,int base,int R)
static int Get_RR(aica_state *AICA,int base,int R)
{
int Rate=base+(R<<1);
- if(Rate>63) Rate=63;
+ if(Rate>63) Rate=63;
if(Rate<0) Rate=0;
return AICA->DRTABLE[Rate];
}
@@ -427,8 +427,8 @@ static void Compute_LFO(SLOT *slot)
AICALFO_ComputeStep(&(slot->ALFO),LFOF(slot),ALFOWS(slot),ALFOS(slot),1);
}
-#define ADPCMSHIFT 8
-#define ADFIX(f) (int) ((float) f*(float) (1<<ADPCMSHIFT))
+#define ADPCMSHIFT 8
+#define ADFIX(f) (int) ((float) f*(float) (1<<ADPCMSHIFT))
static const int TableQuant[8]={ADFIX(0.8984375),ADFIX(0.8984375),ADFIX(0.8984375),ADFIX(0.8984375),ADFIX(1.19921875),ADFIX(1.59765625),ADFIX(2.0),ADFIX(2.3984375)};
static const int quant_mul[16]= { 1, 3, 5, 7, 9, 11, 13, 15, -1, -3, -5, -7, -9, -11, -13, -15};
@@ -442,7 +442,7 @@ static void InitADPCM(int *PrevSignal, int *PrevQuant)
INLINE signed short DecodeADPCM(int *PrevSignal, unsigned char Delta, int *PrevQuant)
{
int x = *PrevQuant * quant_mul [Delta & 15];
- x = *PrevSignal + ((int)(x + ((UINT32)x >> 29)) >> 3);
+ x = *PrevSignal + ((int)(x + ((UINT32)x >> 29)) >> 3);
*PrevSignal=ICLIP16(x);
*PrevQuant=(*PrevQuant*TableQuant[Delta&7])>>ADPCMSHIFT;
*PrevQuant=(*PrevQuant<0x7f)?0x7f:((*PrevQuant>0x6000)?0x6000:*PrevQuant);
@@ -456,7 +456,7 @@ static void AICA_StartSlot(aica_state *AICA, SLOT *slot)
slot->active=1;
slot->Backwards=0;
slot->cur_addr=0; slot->nxt_addr=1<<SHIFT; slot->prv_addr=-1;
- start_offset = SA(slot); // AICA can play 16-bit samples from any boundry
+ start_offset = SA(slot); // AICA can play 16-bit samples from any boundry
slot->base=&AICA->AICARAM[start_offset];
slot->step=AICA_Step(slot);
Compute_EG(AICA,slot);
@@ -582,12 +582,12 @@ static void AICA_Init(device_t *device, aica_state *AICA, const aica_interface *
AICA->RPANTABLE[i]=FIX((4.0*RPAN*TL*fSDL));
}
- AICA->ARTABLE[0]=AICA->DRTABLE[0]=0; //Infinite time
- AICA->ARTABLE[1]=AICA->DRTABLE[1]=0; //Infinite time
+ AICA->ARTABLE[0]=AICA->DRTABLE[0]=0; //Infinite time
+ AICA->ARTABLE[1]=AICA->DRTABLE[1]=0; //Infinite time
for(i=2;i<64;++i)
{
double t,step,scale;
- t=ARTimes[i]; //In ms
+ t=ARTimes[i]; //In ms
if(t!=0.0)
{
step=(1023*1000.0)/((float) 44100.0f*t);
@@ -597,7 +597,7 @@ static void AICA_Init(device_t *device, aica_state *AICA, const aica_interface *
else
AICA->ARTABLE[i]=1024<<EG_SHIFT;
- t=DRTimes[i]; //In ms
+ t=DRTimes[i]; //In ms
step=(1023*1000.0)/((float) 44100.0f*t);
scale=(double) (1<<EG_SHIFT);
AICA->DRTABLE[i]=(int) (step*scale);
@@ -768,7 +768,7 @@ static void AICA_UpdateReg(aica_state *AICA, address_space &space, int reg)
}
}
break;
- case 0xa4: //SCIRE
+ case 0xa4: //SCIRE
case 0xa5:
if(AICA->Master)
@@ -833,7 +833,7 @@ static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
unsigned short v=AICA->udata.data[0x8/2];
v&=0xff00;
v|=AICA->MidiStack[AICA->MidiR];
- AICA->IntARMCB(AICA->device, 0); // cancel the IRQ
+ AICA->IntARMCB(AICA->device, 0); // cancel the IRQ
if(AICA->MidiR!=AICA->MidiW)
{
++AICA->MidiR;
@@ -843,7 +843,7 @@ static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
}
break;
- case 0x10: // LP check
+ case 0x10: // LP check
case 0x11:
{
int slotnum = MSLC(AICA);
@@ -872,18 +872,18 @@ static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
}
break;
- case 0x14: // CA (slot address)
+ case 0x14: // CA (slot address)
case 0x15:
{
int slotnum = MSLC(AICA);
SLOT *slot=AICA->Slots+slotnum;
unsigned int CA = 0;
- if (PCMS(slot) == 0) // 16-bit samples
+ if (PCMS(slot) == 0) // 16-bit samples
{
CA = (slot->cur_addr>>(SHIFT-1))&AICA->RAM_MASK16;
}
- else // 8-bit PCM and 4-bit ADPCM
+ else // 8-bit PCM and 4-bit ADPCM
{
CA = (slot->cur_addr>>SHIFT)&AICA->RAM_MASK;
}
@@ -938,7 +938,7 @@ static void AICA_w16(aica_state *AICA,address_space &space,unsigned int addr,uns
else
{
//DSP
- if(addr<0x3200) //COEF
+ if(addr<0x3200) //COEF
*((unsigned short *) (AICA->DSP.COEF+(addr-0x3000)/2))=val;
else if(addr<0x3400)
*((unsigned short *) (AICA->DSP.MADRS+(addr-0x3200)/2))=val;
@@ -975,7 +975,7 @@ static unsigned short AICA_r16(aica_state *AICA, address_space &space, unsigned
{
AICA_UpdateRegR(AICA, space, addr&0xff);
v= *((unsigned short *) (AICA->udata.datab+((addr&0xff))));
- if((addr&0xfffe)==0x2810) AICA->udata.data[0x10/2] &= 0x7FFF; // reset LP on read
+ if((addr&0xfffe)==0x2810) AICA->udata.data[0x10/2] &= 0x7FFF; // reset LP on read
}
else if (addr == 0x2d00)
{
@@ -1043,7 +1043,7 @@ INLINE INT32 AICA_UpdateSlot(aica_state *AICA, SLOT *slot)
UINT32 *addr[2] = {&addr1, &addr2}; // used for linear interpolation
UINT32 *slot_addr[2] = {&(slot->cur_addr), &(slot->nxt_addr)}; //
- if(SSCTL(slot)!=0) //no FM or noise yet
+ if(SSCTL(slot)!=0) //no FM or noise yet
return 0;
if(PLFOS(slot)!=0)
@@ -1068,7 +1068,7 @@ INLINE INT32 AICA_UpdateSlot(aica_state *AICA, SLOT *slot)
addr2=slot->nxt_addr>>SHIFT;
}
- if(PCMS(slot) == 1) // 8-bit signed
+ if(PCMS(slot) == 1) // 8-bit signed
{
INT8 *p1=(signed char *) (AICA->AICARAM+(((SA(slot)+addr1))&AICA->RAM_MASK));
INT8 *p2=(signed char *) (AICA->AICARAM+(((SA(slot)+addr2))&AICA->RAM_MASK));
@@ -1077,7 +1077,7 @@ INLINE INT32 AICA_UpdateSlot(aica_state *AICA, SLOT *slot)
s=(int) (p1[0]<<8)*((1<<SHIFT)-fpart)+(int) (p2[0]<<8)*fpart;
sample=(s>>SHIFT);
}
- else if (PCMS(slot) == 0) //16 bit signed
+ else if (PCMS(slot) == 0) //16 bit signed
{
UINT8 *p1=(UINT8 *) (AICA->AICARAM+((SA(slot)+addr1)&AICA->RAM_MASK));
UINT8 *p2=(UINT8 *) (AICA->AICARAM+((SA(slot)+addr2)&AICA->RAM_MASK));
@@ -1086,7 +1086,7 @@ INLINE INT32 AICA_UpdateSlot(aica_state *AICA, SLOT *slot)
s=(int) ((INT16)(p1[0] | (p1[1]<<8)))*((1<<SHIFT)-fpart)+(int) ((INT16)(p2[0] | (p2[1]<<8)))*fpart;
sample=(s>>SHIFT);
}
- else // 4-bit ADPCM
+ else // 4-bit ADPCM
{
UINT8 *base= slot->adbase;
INT32 s;
@@ -1148,7 +1148,7 @@ INLINE INT32 AICA_UpdateSlot(aica_state *AICA, SLOT *slot)
INT32 rem_addr;
switch(LPCTL(slot))
{
- case 0: //no loop
+ case 0: //no loop
if(*addr[addr_select]>=LSA(slot) && *addr[addr_select]>=LEA(slot))
{
AICA_StopSlot(slot,0);
@@ -1357,7 +1357,7 @@ const device_type AICA = &device_creator<aica_device>;
aica_device::aica_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, AICA, "AICA", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(aica_state);
}
@@ -1399,5 +1399,3 @@ void aica_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/aica.h b/src/emu/sound/aica.h
index 87a4b30dfea..858dd106866 100644
--- a/src/emu/sound/aica.h
+++ b/src/emu/sound/aica.h
@@ -11,8 +11,8 @@
struct aica_interface
{
int master;
- int roffset; /* offset in the region */
- void (*irq_callback)(device_t *device, int state); /* irq callback */
+ int roffset; /* offset in the region */
+ void (*irq_callback)(device_t *device, int state); /* irq callback */
};
void aica_set_ram_base(device_t *device, void *base, int size);
@@ -26,7 +26,7 @@ DECLARE_WRITE16_DEVICE_HANDLER( aica_midi_in );
DECLARE_READ16_DEVICE_HANDLER( aica_midi_out_r );
class aica_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
aica_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/aicadsp.c b/src/emu/sound/aicadsp.c
index b0ceff8a0b9..42a05825478 100644
--- a/src/emu/sound/aicadsp.c
+++ b/src/emu/sound/aicadsp.c
@@ -62,17 +62,17 @@ void aica_dsp_init(AICADSP *DSP)
void aica_dsp_step(AICADSP *DSP)
{
- INT32 ACC=0; //26 bit
- INT32 SHIFTED=0; //24 bit
- INT32 X=0; //24 bit
- INT32 Y=0; //13 bit
- INT32 B=0; //26 bit
- INT32 INPUTS=0; //24 bit
+ INT32 ACC=0; //26 bit
+ INT32 SHIFTED=0; //24 bit
+ INT32 X=0; //24 bit
+ INT32 Y=0; //13 bit
+ INT32 B=0; //26 bit
+ INT32 INPUTS=0; //24 bit
INT32 MEMVAL=0;
- INT32 FRC_REG=0; //13 bit
- INT32 Y_REG=0; //24 bit
+ INT32 FRC_REG=0; //13 bit
+ INT32 Y_REG=0; //24 bit
UINT32 ADDR=0;
- UINT32 ADRS_REG=0; //13 bit
+ UINT32 ADRS_REG=0; //13 bit
int step;
if(DSP->Stopped)
@@ -115,10 +115,10 @@ void aica_dsp_step(AICADSP *DSP)
UINT32 ZERO=(IPtr[4]>>1)&0x01;
UINT32 BSEL=(IPtr[4]>>0)&0x01;
- UINT32 NOFL=(IPtr[6]>>15)&1; //????
+ UINT32 NOFL=(IPtr[6]>>15)&1; //????
UINT32 COEF=step;
- UINT32 MASA=(IPtr[6]>>9)&0x1f; //???
+ UINT32 MASA=(IPtr[6]>>9)&0x1f; //???
UINT32 ADREB=(IPtr[6]>>8)&0x1;
UINT32 NXADR=(IPtr[6]>>7)&0x1;
@@ -135,7 +135,7 @@ void aica_dsp_step(AICADSP *DSP)
if(f)
{
-#define DUMP(v) fprintf(f," " #v ": %04X",v);
+#define DUMP(v) fprintf(f," " #v ": %04X",v);
fprintf(f,"%d: ",step);
DUMP(ACC);
@@ -157,7 +157,7 @@ void aica_dsp_step(AICADSP *DSP)
if(IRA<=0x1f)
INPUTS=DSP->MEMS[IRA];
else if(IRA<=0x2F)
- INPUTS=DSP->MIXS[IRA-0x20]<<4; //MIXS is 20 bit
+ INPUTS=DSP->MIXS[IRA-0x20]<<4; //MIXS is 20 bit
else if(IRA<=0x31)
INPUTS=0;
@@ -168,7 +168,7 @@ void aica_dsp_step(AICADSP *DSP)
if(IWT)
{
- DSP->MEMS[IWA]=MEMVAL; //MEMVAL was selected in previous MRD
+ DSP->MEMS[IWA]=MEMVAL; //MEMVAL was selected in previous MRD
if(IRA==IWA)
INPUTS=MEMVAL;
}
@@ -209,7 +209,7 @@ void aica_dsp_step(AICADSP *DSP)
if(YSEL==0)
Y=FRC_REG;
else if(YSEL==1)
- Y=DSP->COEF[COEF<<1]>>3; //COEF is 16 bits
+ Y=DSP->COEF[COEF<<1]>>3; //COEF is 16 bits
else if(YSEL==2)
Y=(Y_REG>>11)&0x1FFF;
else if(YSEL==3)
@@ -292,7 +292,7 @@ void aica_dsp_step(AICADSP *DSP)
//ADDR+=DSP->RBP<<13;
//MEMVAL=DSP->AICARAM[ADDR>>1];
ADDR+=DSP->RBP<<10;
- if(MRD && (step&1)) //memory only allowed on odd? DoA inserts NOPs on even
+ if(MRD && (step&1)) //memory only allowed on odd? DoA inserts NOPs on even
{
if(NOFL)
MEMVAL=DSP->AICARAM[ADDR]<<8;
diff --git a/src/emu/sound/aicadsp.h b/src/emu/sound/aicadsp.h
index d766edf0221..e027bcc6117 100644
--- a/src/emu/sound/aicadsp.h
+++ b/src/emu/sound/aicadsp.h
@@ -9,24 +9,24 @@ struct AICADSP
//Config
UINT16 *AICARAM;
UINT32 AICARAM_LENGTH;
- UINT32 RBP; //Ring buf pointer
- UINT32 RBL; //Delay ram (Ring buffer) size in words
+ UINT32 RBP; //Ring buf pointer
+ UINT32 RBL; //Delay ram (Ring buffer) size in words
//context
- INT16 COEF[128*2]; //16 bit signed
- UINT16 MADRS[64*2]; //offsets (in words), 16 bit
- UINT16 MPRO[128*4*2*2]; //128 steps 64 bit
- INT32 TEMP[128]; //TEMP regs,24 bit signed
- INT32 MEMS[32]; //MEMS regs,24 bit signed
+ INT16 COEF[128*2]; //16 bit signed
+ UINT16 MADRS[64*2]; //offsets (in words), 16 bit
+ UINT16 MPRO[128*4*2*2]; //128 steps 64 bit
+ INT32 TEMP[128]; //TEMP regs,24 bit signed
+ INT32 MEMS[32]; //MEMS regs,24 bit signed
UINT32 DEC;
//input
- INT32 MIXS[16]; //MIXS, 24 bit signed
- INT16 EXTS[2]; //External inputs (CDDA) 16 bit signed
+ INT32 MIXS[16]; //MIXS, 24 bit signed
+ INT16 EXTS[2]; //External inputs (CDDA) 16 bit signed
//output
- INT16 EFREG[16]; //EFREG, 16 bit signed
+ INT16 EFREG[16]; //EFREG, 16 bit signed
int Stopped;
int LastStep;
diff --git a/src/emu/sound/aicalfo.c b/src/emu/sound/aicalfo.c
index b61f25eb346..d955b815894 100644
--- a/src/emu/sound/aicalfo.c
+++ b/src/emu/sound/aicalfo.c
@@ -7,20 +7,20 @@
By ElSemi, kingshriek, Deunan Knute, and R. Belmont
*/
-#define LFO_SHIFT 8
+#define LFO_SHIFT 8
struct LFO_t
{
- unsigned short phase;
- UINT32 phase_step;
- int *table;
- int *scale;
+ unsigned short phase;
+ UINT32 phase_step;
+ int *table;
+ int *scale;
};
-#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
+#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
//Convert DB to multiply amplitude
-#define DB(v) LFIX(pow(10.0,v/20.0))
+#define DB(v) LFIX(pow(10.0,v/20.0))
//Convert cents to step increment
#define CENTS(v) LFIX(pow(2.0,v/1200.0))
@@ -28,7 +28,7 @@ struct LFO_t
static int PLFO_TRI[256],PLFO_SQR[256],PLFO_SAW[256],PLFO_NOI[256];
static int ALFO_TRI[256],ALFO_SQR[256],ALFO_SAW[256],ALFO_NOI[256];
static const float LFOFreq[32]={0.17f,0.19f,0.23f,0.27f,0.34f,0.39f,0.45f,0.55f,0.68f,0.78f,0.92f,1.10f,1.39f,1.60f,1.87f,2.27f,
- 2.87f,3.31f,3.92f,4.79f,6.15f,7.18f,8.60f,10.8f,14.4f,17.2f,21.5f,28.7f,43.1f,57.4f,86.1f,172.3f};
+ 2.87f,3.31f,3.92f,4.79f,6.15f,7.18f,8.60f,10.8f,14.4f,17.2f,21.5f,28.7f,43.1f,57.4f,86.1f,172.3f};
static const float ASCALE[8]={0.0f,0.4f,0.8f,1.5f,3.0f,6.0f,12.0f,24.0f};
static const float PSCALE[8]={0.0f,7.0f,13.5f,27.0f,55.0f,112.0f,230.0f,494.0f};
static int PSCALES[8][256];
@@ -36,9 +36,9 @@ static int ASCALES[8][256];
static void AICALFO_Init(running_machine &machine)
{
- int i,s;
- for(i=0;i<256;++i)
- {
+ int i,s;
+ for(i=0;i<256;++i)
+ {
int a,p;
// float TL;
//Saw
@@ -86,7 +86,7 @@ static void AICALFO_Init(running_machine &machine)
p=128-a;
ALFO_NOI[i]=a;
PLFO_NOI[i]=p;
- }
+ }
for(s=0;s<8;++s)
{
@@ -107,11 +107,11 @@ INLINE signed int AICAPLFO_Step(LFO_t *LFO)
{
int p;
- LFO->phase+=LFO->phase_step;
+ LFO->phase+=LFO->phase_step;
#if LFO_SHIFT!=8
- LFO->phase&=(1<<(LFO_SHIFT+8))-1;
+ LFO->phase&=(1<<(LFO_SHIFT+8))-1;
#endif
- p=LFO->table[LFO->phase>>LFO_SHIFT];
+ p=LFO->table[LFO->phase>>LFO_SHIFT];
p=LFO->scale[p+128];
return p<<(SHIFT-LFO_SHIFT);
}
@@ -119,21 +119,21 @@ INLINE signed int AICAPLFO_Step(LFO_t *LFO)
INLINE signed int AICAALFO_Step(LFO_t *LFO)
{
int p;
- LFO->phase+=LFO->phase_step;
+ LFO->phase+=LFO->phase_step;
#if LFO_SHIFT!=8
- LFO->phase&=(1<<(LFO_SHIFT+8))-1;
+ LFO->phase&=(1<<(LFO_SHIFT+8))-1;
#endif
- p=LFO->table[LFO->phase>>LFO_SHIFT];
+ p=LFO->table[LFO->phase>>LFO_SHIFT];
p=LFO->scale[p];
return p<<(SHIFT-LFO_SHIFT);
}
static void AICALFO_ComputeStep(LFO_t *LFO,UINT32 LFOF,UINT32 LFOWS,UINT32 LFOS,int ALFO)
{
- float step=(float) LFOFreq[LFOF]*256.0/(float)44100.0;
- LFO->phase_step=(unsigned int) ((float) (1<<LFO_SHIFT)*step);
- if(ALFO)
- {
+ float step=(float) LFOFreq[LFOF]*256.0/(float)44100.0;
+ LFO->phase_step=(unsigned int) ((float) (1<<LFO_SHIFT)*step);
+ if(ALFO)
+ {
switch(LFOWS)
{
case 0: LFO->table=ALFO_SAW; break;
@@ -148,11 +148,11 @@ static void AICALFO_ComputeStep(LFO_t *LFO,UINT32 LFOF,UINT32 LFOWS,UINT32 LFOS,
{
switch(LFOWS)
{
- case 0: LFO->table=PLFO_SAW; break;
- case 1: LFO->table=PLFO_SQR; break;
+ case 0: LFO->table=PLFO_SAW; break;
+ case 1: LFO->table=PLFO_SQR; break;
case 2: LFO->table=PLFO_TRI; break;
- case 3: LFO->table=PLFO_NOI; break;
- default: printf("Unknown PLFO %d\n", LFOWS);
+ case 3: LFO->table=PLFO_NOI; break;
+ default: printf("Unknown PLFO %d\n", LFOWS);
}
LFO->scale=PSCALES[LFOS];
}
diff --git a/src/emu/sound/asc.c b/src/emu/sound/asc.c
index 20a21e5edcd..418a3ce5a3b 100644
--- a/src/emu/sound/asc.c
+++ b/src/emu/sound/asc.c
@@ -45,9 +45,9 @@ const device_type ASC = &device_creator<asc_device>;
asc_device::asc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ASC, "ASC", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_chip_type(0),
- m_irq_cb(NULL)
+ device_sound_interface(mconfig, *this),
+ m_chip_type(0),
+ m_irq_cb(NULL)
{
}
@@ -146,14 +146,14 @@ void asc_device::sound_stream_update(sound_stream &stream, stream_sample_t **inp
switch (m_regs[R_MODE-0x800] & 3)
{
- case 0: // chip off
+ case 0: // chip off
for (i = 0; i < samples; i++)
{
outL[i] = outR[i] = 0;
}
break;
- case 1: // FIFO mode
+ case 1: // FIFO mode
for (i = 0; i < samples; i++)
{
INT8 smpll, smplr;
@@ -181,8 +181,8 @@ void asc_device::sound_stream_update(sound_stream &stream, stream_sample_t **inp
case ASC_TYPE_SONORA:
if (m_fifo_cap_a < 0x200)
{
- m_regs[R_FIFOSTAT-0x800] |= 0x4; // fifo less than half full
- m_regs[R_FIFOSTAT-0x800] |= 0x8; // just pass the damn test
+ m_regs[R_FIFOSTAT-0x800] |= 0x4; // fifo less than half full
+ m_regs[R_FIFOSTAT-0x800] |= 0x8; // just pass the damn test
if (m_irq_cb)
{
m_irq_cb(this, 1);
@@ -193,15 +193,15 @@ void asc_device::sound_stream_update(sound_stream &stream, stream_sample_t **inp
default:
if (m_fifo_cap_a == 0x1ff)
{
- m_regs[R_FIFOSTAT-0x800] |= 1; // fifo A half-empty
+ m_regs[R_FIFOSTAT-0x800] |= 1; // fifo A half-empty
if (m_irq_cb)
{
m_irq_cb(this, 1);
}
}
- else if (m_fifo_cap_a == 0x1) // fifo A fully empty
+ else if (m_fifo_cap_a == 0x1) // fifo A fully empty
{
- m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A empty
+ m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A empty
if (m_irq_cb)
{
m_irq_cb(this, 1);
@@ -210,15 +210,15 @@ void asc_device::sound_stream_update(sound_stream &stream, stream_sample_t **inp
if (m_fifo_cap_b == 0x1ff)
{
- m_regs[R_FIFOSTAT-0x800] |= 4; // fifo B half-empty
+ m_regs[R_FIFOSTAT-0x800] |= 4; // fifo B half-empty
if (m_irq_cb)
{
m_irq_cb(this, 1);
}
}
- else if (m_fifo_cap_b == 0x1) // fifo B fully empty
+ else if (m_fifo_cap_b == 0x1) // fifo B fully empty
{
- m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B empty
+ m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B empty
if (m_irq_cb)
{
m_irq_cb(this, 1);
@@ -307,7 +307,7 @@ READ8_MEMBER( asc_device::read )
case ASC_TYPE_SONORA:
return 0xbc;
- default: // return the actual register value
+ default: // return the actual register value
break;
}
break;
@@ -420,7 +420,7 @@ WRITE8_MEMBER( asc_device::write )
if (m_fifo_cap_a == 0x3ff)
{
- m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A full
+ m_regs[R_FIFOSTAT-0x800] |= 2; // fifo A full
}
m_fifo_a_wrptr &= 0x3ff;
@@ -439,7 +439,7 @@ WRITE8_MEMBER( asc_device::write )
if (m_fifo_cap_b == 0x3ff)
{
- m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B full
+ m_regs[R_FIFOSTAT-0x800] |= 8; // fifo B full
}
m_fifo_b_wrptr &= 0x3ff;
@@ -457,7 +457,7 @@ WRITE8_MEMBER( asc_device::write )
switch (offset)
{
case R_MODE:
- data &= 3; // only bits 0 and 1 can be written
+ data &= 3; // only bits 0 and 1 can be written
if (data != m_regs[R_MODE-0x800])
{
diff --git a/src/emu/sound/asc.h b/src/emu/sound/asc.h
index 147edc0e93d..cc6c8288921 100644
--- a/src/emu/sound/asc.h
+++ b/src/emu/sound/asc.h
@@ -22,14 +22,14 @@
// chip behavior types
enum
{
- ASC_TYPE_ASC = 0, // original discrete Apple Sound Chip
- ASC_TYPE_EASC = 1, // discrete Enhanced Apple Sound Chip
- ASC_TYPE_V8 = 2, // Subset of ASC included in the V8 ASIC (LC/LCII)
- ASC_TYPE_EAGLE = 3, // Subset of ASC included in the Eagle ASIC (Classic II)
- ASC_TYPE_SPICE = 4, // Subset of ASC included in the Spice ASIC (Color Classic)
- ASC_TYPE_SONORA = 5, // Subset of ASC included in the Sonora ASIC (LCIII)
- ASC_TYPE_VASP = 6, // Subset of ASC included in the VASP ASIC (IIvx/IIvi)
- ASC_TYPE_ARDBEG = 7 // Subset of ASC included in the Ardbeg ASIC (LC520)
+ ASC_TYPE_ASC = 0, // original discrete Apple Sound Chip
+ ASC_TYPE_EASC = 1, // discrete Enhanced Apple Sound Chip
+ ASC_TYPE_V8 = 2, // Subset of ASC included in the V8 ASIC (LC/LCII)
+ ASC_TYPE_EAGLE = 3, // Subset of ASC included in the Eagle ASIC (Classic II)
+ ASC_TYPE_SPICE = 4, // Subset of ASC included in the Spice ASIC (Color Classic)
+ ASC_TYPE_SONORA = 5, // Subset of ASC included in the Sonora ASIC (LCIII)
+ ASC_TYPE_VASP = 6, // Subset of ASC included in the VASP ASIC (IIvx/IIvi)
+ ASC_TYPE_ARDBEG = 7 // Subset of ASC included in the Ardbeg ASIC (LC520)
};
@@ -105,21 +105,21 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
// inline data
- UINT8 m_chip_type;
+ UINT8 m_chip_type;
void (*m_irq_cb)(device_t *device, int state);
- UINT8 m_fifo_a[0x400];
- UINT8 m_fifo_b[0x400];
+ UINT8 m_fifo_a[0x400];
+ UINT8 m_fifo_b[0x400];
- UINT8 m_regs[0x800];
+ UINT8 m_regs[0x800];
- UINT32 m_phase[4], m_incr[4];
+ UINT32 m_phase[4], m_incr[4];
- int m_fifo_a_rdptr, m_fifo_b_rdptr;
- int m_fifo_a_wrptr, m_fifo_b_wrptr;
- int m_fifo_cap_a, m_fifo_cap_b;
+ int m_fifo_a_rdptr, m_fifo_b_rdptr;
+ int m_fifo_a_wrptr, m_fifo_b_wrptr;
+ int m_fifo_cap_a, m_fifo_cap_b;
- emu_timer *m_timer;
+ emu_timer *m_timer;
};
@@ -128,4 +128,3 @@ extern const device_type ASC;
#endif /* __ASC_H__ */
-
diff --git a/src/emu/sound/astrocde.c b/src/emu/sound/astrocde.c
index 4977ff84c3e..f0f66f9c3fc 100644
--- a/src/emu/sound/astrocde.c
+++ b/src/emu/sound/astrocde.c
@@ -45,26 +45,26 @@
struct astrocade_state
{
- sound_stream *stream; /* sound stream */
+ sound_stream *stream; /* sound stream */
- UINT8 reg[8]; /* 8 control registers */
+ UINT8 reg[8]; /* 8 control registers */
- UINT8 master_count; /* current master oscillator count */
- UINT16 vibrato_clock; /* current vibrato clock */
+ UINT8 master_count; /* current master oscillator count */
+ UINT16 vibrato_clock; /* current vibrato clock */
- UINT8 noise_clock; /* current noise generator clock */
- UINT16 noise_state; /* current noise LFSR state */
+ UINT8 noise_clock; /* current noise generator clock */
+ UINT16 noise_state; /* current noise LFSR state */
- UINT8 a_count; /* current tone generator A count */
- UINT8 a_state; /* current tone generator A state */
+ UINT8 a_count; /* current tone generator A count */
+ UINT8 a_state; /* current tone generator A state */
- UINT8 b_count; /* current tone generator B count */
- UINT8 b_state; /* current tone generator B state */
+ UINT8 b_count; /* current tone generator B count */
+ UINT8 b_state; /* current tone generator B state */
- UINT8 c_count; /* current tone generator C count */
- UINT8 c_state; /* current tone generator C state */
+ UINT8 c_count; /* current tone generator C count */
+ UINT8 c_state; /* current tone generator C state */
- UINT8 bitswap[256]; /* bitswap table */
+ UINT8 bitswap[256]; /* bitswap table */
};
@@ -305,7 +305,7 @@ const device_type ASTROCADE = &device_creator<astrocade_device>;
astrocade_device::astrocade_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ASTROCADE, "Astrocade", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(astrocade_state);
}
@@ -347,5 +347,3 @@ void astrocade_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/astrocde.h b/src/emu/sound/astrocde.h
index 8a954830761..92e9685174d 100644
--- a/src/emu/sound/astrocde.h
+++ b/src/emu/sound/astrocde.h
@@ -8,7 +8,7 @@
DECLARE_WRITE8_DEVICE_HANDLER( astrocade_sound_w );
class astrocade_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
astrocade_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/awacs.c b/src/emu/sound/awacs.c
index 6664082bd6c..a7b8dd4faea 100644
--- a/src/emu/sound/awacs.c
+++ b/src/emu/sound/awacs.c
@@ -24,7 +24,7 @@ const device_type AWACS = &device_creator<awacs_device>;
awacs_device::awacs_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, AWACS, "AWACS", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -57,12 +57,12 @@ void awacs_device::device_reset()
memset(m_regs, 0, sizeof(m_regs));
- m_play_ptr = 0;
- m_buffer_size = 0;
- m_playback_enable = false;
- m_dma_space = NULL;
- m_dma_offset_0 = m_dma_offset_1 = 0;
- m_buffer_num = 0;
+ m_play_ptr = 0;
+ m_buffer_size = 0;
+ m_playback_enable = false;
+ m_dma_space = NULL;
+ m_dma_offset_0 = m_dma_offset_1 = 0;
+ m_buffer_num = 0;
}
//-------------------------------------------------
@@ -82,38 +82,38 @@ void awacs_device::device_timer(emu_timer &timer, device_timer_id tid, int param
void awacs_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
stream_sample_t *outL, *outR;
- int offset = (m_buffer_num == 0) ? m_dma_offset_0 : m_dma_offset_1;
+ int offset = (m_buffer_num == 0) ? m_dma_offset_0 : m_dma_offset_1;
outL = outputs[0];
outR = outputs[1];
- if (m_playback_enable)
- {
- for (int i = 0; i < samples; i++)
- {
- outL[i] = (INT16)m_dma_space->read_word(offset + m_play_ptr);
- outR[i] = (INT16)m_dma_space->read_word(offset + m_play_ptr + 2);
- m_play_ptr += 4;
- }
-
- // out of buffer?
- if (m_play_ptr >= m_buffer_size)
- {
- UINT8 bufflag[2] = { 0x40, 0x80 };
-
- m_regs[0x18] |= bufflag[m_buffer_num];
- m_buffer_num ^= 1;
- m_play_ptr = 0;
- }
- }
- else
- {
- for (int i = 0; i < samples; i++)
- {
- outL[i] = 0;
- outR[i] = 0;
- }
- }
+ if (m_playback_enable)
+ {
+ for (int i = 0; i < samples; i++)
+ {
+ outL[i] = (INT16)m_dma_space->read_word(offset + m_play_ptr);
+ outR[i] = (INT16)m_dma_space->read_word(offset + m_play_ptr + 2);
+ m_play_ptr += 4;
+ }
+
+ // out of buffer?
+ if (m_play_ptr >= m_buffer_size)
+ {
+ UINT8 bufflag[2] = { 0x40, 0x80 };
+
+ m_regs[0x18] |= bufflag[m_buffer_num];
+ m_buffer_num ^= 1;
+ m_play_ptr = 0;
+ }
+ }
+ else
+ {
+ for (int i = 0; i < samples; i++)
+ {
+ outL[i] = 0;
+ outR[i] = 0;
+ }
+ }
}
//-------------------------------------------------
@@ -122,7 +122,7 @@ void awacs_device::sound_stream_update(sound_stream &stream, stream_sample_t **i
READ8_MEMBER( awacs_device::read )
{
- return m_regs[offset];
+ return m_regs[offset];
}
//-------------------------------------------------
@@ -131,20 +131,20 @@ READ8_MEMBER( awacs_device::read )
WRITE8_MEMBER( awacs_device::write )
{
- switch (offset)
- {
- case 0x8:
- case 0x9:
- m_regs[offset] = data;
- m_buffer_size = (m_regs[8]<<6) | (m_regs[9]>>2);
+ switch (offset)
+ {
+ case 0x8:
+ case 0x9:
+ m_regs[offset] = data;
+ m_buffer_size = (m_regs[8]<<6) | (m_regs[9]>>2);
// printf("buffer size = %x samples, %x bytes\n", m_buffer_size, m_buffer_size*4);
- m_buffer_size *= 4; // samples * 16 bits * stereo
- break;
+ m_buffer_size *= 4; // samples * 16 bits * stereo
+ break;
- case 0x10:
+ case 0x10:
{
- static const int rates[4] = { 22100, 29400, 44100, 22100 };
- m_stream->set_sample_rate(rates[(data>>1)&3]);
+ static const int rates[4] = { 22100, 29400, 44100, 22100 };
+ m_stream->set_sample_rate(rates[(data>>1)&3]);
// printf("rate %d, enable: %d\n", rates[(data>>1)&3], data & 1);
m_playback_enable = (data & 1) ? true : false;
@@ -154,22 +154,21 @@ WRITE8_MEMBER( awacs_device::write )
m_buffer_num = 0;
}
}
- break;
+ break;
- case 0x18:
- m_regs[offset] &= 0xf0;
- m_regs[offset] |= (data & 0x0f);
- m_regs[offset] &= ~(data & 0xf0);
- return;
- }
+ case 0x18:
+ m_regs[offset] &= 0xf0;
+ m_regs[offset] |= (data & 0x0f);
+ m_regs[offset] &= ~(data & 0xf0);
+ return;
+ }
- m_regs[offset] = data;
+ m_regs[offset] = data;
}
void awacs_device::set_dma_base(address_space &space, int offset0, int offset1)
{
- m_dma_space = &space;
- m_dma_offset_0 = offset0;
- m_dma_offset_1 = offset1;
+ m_dma_space = &space;
+ m_dma_offset_0 = offset0;
+ m_dma_offset_1 = offset1;
}
-
diff --git a/src/emu/sound/awacs.h b/src/emu/sound/awacs.h
index ff4bfe6d8f9..0c1ad063225 100644
--- a/src/emu/sound/awacs.h
+++ b/src/emu/sound/awacs.h
@@ -43,7 +43,7 @@ public:
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
- void set_dma_base(address_space &space, int offset0, int offset1);
+ void set_dma_base(address_space &space, int offset0, int offset1);
sound_stream *m_stream;
@@ -58,13 +58,13 @@ protected:
// inline data
UINT8 m_regs[0x100];
- int m_play_ptr, m_buffer_size, m_buffer_num;
- bool m_playback_enable;
+ int m_play_ptr, m_buffer_size, m_buffer_num;
+ bool m_playback_enable;
- address_space *m_dma_space;
- int m_dma_offset_0, m_dma_offset_1;
+ address_space *m_dma_space;
+ int m_dma_offset_0, m_dma_offset_1;
- emu_timer *m_timer;
+ emu_timer *m_timer;
};
@@ -73,4 +73,3 @@ extern const device_type AWACS;
#endif /* __AWACS_H__ */
-
diff --git a/src/emu/sound/ay8910.c b/src/emu/sound/ay8910.c
index e0ecde275b1..21aac1755a1 100644
--- a/src/emu/sound/ay8910.c
+++ b/src/emu/sound/ay8910.c
@@ -113,37 +113,37 @@ has twice the steps, happening twice as fast.
*
*************************************/
-#define ENABLE_REGISTER_TEST (0) /* Enable preprogrammed registers */
+#define ENABLE_REGISTER_TEST (0) /* Enable preprogrammed registers */
#define MAX_OUTPUT 0x7fff
#define NUM_CHANNELS 3
/* register id's */
-#define AY_AFINE (0)
-#define AY_ACOARSE (1)
-#define AY_BFINE (2)
-#define AY_BCOARSE (3)
-#define AY_CFINE (4)
-#define AY_CCOARSE (5)
-#define AY_NOISEPER (6)
-#define AY_ENABLE (7)
-#define AY_AVOL (8)
-#define AY_BVOL (9)
-#define AY_CVOL (10)
-#define AY_EFINE (11)
-#define AY_ECOARSE (12)
-#define AY_ESHAPE (13)
-
-#define AY_PORTA (14)
-#define AY_PORTB (15)
-
-#define NOISE_ENABLEQ(_psg, _chan) (((_psg)->regs[AY_ENABLE] >> (3 + _chan)) & 1)
-#define TONE_ENABLEQ(_psg, _chan) (((_psg)->regs[AY_ENABLE] >> (_chan)) & 1)
-#define TONE_PERIOD(_psg, _chan) ( (_psg)->regs[(_chan) << 1] | (((_psg)->regs[((_chan) << 1) | 1] & 0x0f) << 8) )
-#define NOISE_PERIOD(_psg) ( (_psg)->regs[AY_NOISEPER] & 0x1f)
-#define TONE_VOLUME(_psg, _chan) ( (_psg)->regs[AY_AVOL + (_chan)] & 0x0f)
-#define TONE_ENVELOPE(_psg, _chan) (((_psg)->regs[AY_AVOL + (_chan)] >> 4) & (((_psg)->device->type() == AY8914) ? 3 : 1))
-#define ENVELOPE_PERIOD(_psg) (((_psg)->regs[AY_EFINE] | ((_psg)->regs[AY_ECOARSE]<<8)))
+#define AY_AFINE (0)
+#define AY_ACOARSE (1)
+#define AY_BFINE (2)
+#define AY_BCOARSE (3)
+#define AY_CFINE (4)
+#define AY_CCOARSE (5)
+#define AY_NOISEPER (6)
+#define AY_ENABLE (7)
+#define AY_AVOL (8)
+#define AY_BVOL (9)
+#define AY_CVOL (10)
+#define AY_EFINE (11)
+#define AY_ECOARSE (12)
+#define AY_ESHAPE (13)
+
+#define AY_PORTA (14)
+#define AY_PORTB (15)
+
+#define NOISE_ENABLEQ(_psg, _chan) (((_psg)->regs[AY_ENABLE] >> (3 + _chan)) & 1)
+#define TONE_ENABLEQ(_psg, _chan) (((_psg)->regs[AY_ENABLE] >> (_chan)) & 1)
+#define TONE_PERIOD(_psg, _chan) ( (_psg)->regs[(_chan) << 1] | (((_psg)->regs[((_chan) << 1) | 1] & 0x0f) << 8) )
+#define NOISE_PERIOD(_psg) ( (_psg)->regs[AY_NOISEPER] & 0x1f)
+#define TONE_VOLUME(_psg, _chan) ( (_psg)->regs[AY_AVOL + (_chan)] & 0x0f)
+#define TONE_ENVELOPE(_psg, _chan) (((_psg)->regs[AY_AVOL + (_chan)] >> 4) & (((_psg)->device->type() == AY8914) ? 3 : 1))
+#define ENVELOPE_PERIOD(_psg) (((_psg)->regs[AY_EFINE] | ((_psg)->regs[AY_ECOARSE]<<8)))
/*************************************
*
@@ -198,14 +198,14 @@ INLINE ay8910_context *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == AY8910 ||
- device->type() == AY8912 ||
- device->type() == AY8913 ||
- device->type() == AY8914 ||
- device->type() == AY8930 ||
- device->type() == YM2149 ||
- device->type() == YM3439 ||
- device->type() == YMZ284 ||
- device->type() == YMZ294);
+ device->type() == AY8912 ||
+ device->type() == AY8913 ||
+ device->type() == AY8914 ||
+ device->type() == AY8930 ||
+ device->type() == YM2149 ||
+ device->type() == YM3439 ||
+ device->type() == YMZ284 ||
+ device->type() == YMZ294);
return (ay8910_context *)downcast<ay8910_device *>(device)->token();
}
@@ -221,7 +221,7 @@ static const ay_ym_param ym2149_param =
630, 801,
16,
{ 73770, 37586, 27458, 21451, 15864, 12371, 8922, 6796,
- 4763, 3521, 2403, 1737, 1123, 762, 438, 251 },
+ 4763, 3521, 2403, 1737, 1123, 762, 438, 251 },
};
static const ay_ym_param ym2149_param_env =
@@ -229,9 +229,9 @@ static const ay_ym_param ym2149_param_env =
630, 801,
32,
{ 103350, 73770, 52657, 37586, 32125, 27458, 24269, 21451,
- 18447, 15864, 14009, 12371, 10506, 8922, 7787, 6796,
- 5689, 4763, 4095, 3521, 2909, 2403, 2043, 1737,
- 1397, 1123, 925, 762, 578, 438, 332, 251 },
+ 18447, 15864, 14009, 12371, 10506, 8922, 7787, 6796,
+ 5689, 4763, 4095, 3521, 2909, 2403, 2043, 1737,
+ 1397, 1123, 925, 762, 578, 438, 332, 251 },
};
#if 0
@@ -241,7 +241,7 @@ static const ay_ym_param ay8910_param =
664, 913,
16,
{ 85785, 34227, 26986, 20398, 14886, 10588, 7810, 4856,
- 4120, 2512, 1737, 1335, 1005, 747, 586, 451 },
+ 4120, 2512, 1737, 1335, 1005, 747, 586, 451 },
};
/*
@@ -254,7 +254,7 @@ static const ay_ym_param ay8910_param =
930, 454,
16,
{ 85066, 34179, 27027, 20603, 15046, 10724, 7922, 4935,
- 4189, 2557, 1772, 1363, 1028, 766, 602, 464 },
+ 4189, 2557, 1772, 1363, 1028, 766, 602, 464 },
};
/*
@@ -267,7 +267,7 @@ static const ay_ym_param ay8910_param =
1371, 313,
16,
{ 93399, 33289, 25808, 19285, 13940, 9846, 7237, 4493,
- 3814, 2337, 1629, 1263, 962, 727, 580, 458 },
+ 3814, 2337, 1629, 1263, 962, 727, 580, 458 },
};
/*
@@ -278,7 +278,7 @@ static const ay_ym_param ay8910_param =
5806, 300,
16,
{ 118996, 42698, 33105, 24770, 17925, 12678, 9331, 5807,
- 4936, 3038, 2129, 1658, 1271, 969, 781, 623 }
+ 4936, 3038, 2129, 1658, 1271, 969, 781, 623 }
};
#endif
@@ -326,7 +326,7 @@ static const ay_ym_param ay8910_param =
800000, 8000000,
16,
{ 15950, 15350, 15090, 14760, 14275, 13620, 12890, 11370,
- 10600, 8590, 7190, 5985, 4820, 3945, 3017, 2345 }
+ 10600, 8590, 7190, 5985, 4820, 3945, 3017, 2345 }
};
/*************************************
@@ -488,14 +488,14 @@ static void ay8910_write_reg(ay8910_context *psg, int r, int v)
break;
case AY_ENABLE:
if ((psg->last_enable == -1) ||
- ((psg->last_enable & 0x40) != (psg->regs[AY_ENABLE] & 0x40)))
+ ((psg->last_enable & 0x40) != (psg->regs[AY_ENABLE] & 0x40)))
{
/* write out 0xff if port set to input */
psg->portAwrite(0, (psg->regs[AY_ENABLE] & 0x40) ? psg->regs[AY_PORTA] : 0xff);
}
if ((psg->last_enable == -1) ||
- ((psg->last_enable & 0x80) != (psg->regs[AY_ENABLE] & 0x80)))
+ ((psg->last_enable & 0x80) != (psg->regs[AY_ENABLE] & 0x80)))
{
/* write out 0xff if port set to input */
psg->portBwrite(0, (psg->regs[AY_ENABLE] & 0x80) ? psg->regs[AY_PORTB] : 0xff);
@@ -600,7 +600,7 @@ static STREAM_UPDATE( ay8910_update )
if (psg->count_noise >= NOISE_PERIOD(psg))
{
/* Is noise output going to change? */
- if ((psg->rng + 1) & 2) /* (bit0^bit1)? */
+ if ((psg->rng + 1) & 2) /* (bit0^bit1)? */
{
psg->output_noise ^= 1;
}
@@ -683,8 +683,8 @@ static STREAM_UPDATE( ay8910_update )
*(buf[0]++) = mix_3D(psg);
#if 0
*(buf[0]) = ( vol_enabled[0] * psg->vol_table[psg->Vol[0]]
- + vol_enabled[1] * psg->vol_table[psg->Vol[1]]
- + vol_enabled[2] * psg->vol_table[psg->Vol[2]]) / psg->step;
+ + vol_enabled[1] * psg->vol_table[psg->Vol[1]]
+ + vol_enabled[2] * psg->vol_table[psg->Vol[2]]) / psg->step;
#endif
}
samples--;
@@ -693,8 +693,8 @@ static STREAM_UPDATE( ay8910_update )
static void build_mixer_table(ay8910_context *psg)
{
- int normalize = 0;
- int chan;
+ int normalize = 0;
+ int chan;
if ((psg->intf->flags & AY8910_LEGACY_OUTPUT) != 0)
{
@@ -708,9 +708,9 @@ static void build_mixer_table(ay8910_context *psg)
build_single_table(psg->intf->res_load[chan], psg->par_env, normalize, psg->env_table[chan], 0);
}
/*
- * The previous implementation added all three channels up instead of averaging them.
- * The factor of 3 will force the same levels if normalizing is used.
- */
+ * The previous implementation added all three channels up instead of averaging them.
+ * The factor of 3 will force the same levels if normalizing is used.
+ */
build_3D_table(psg->intf->res_load[0], psg->par, psg->par_env, normalize, 3, psg->zero_is_off, psg->vol3d_table);
}
@@ -773,7 +773,7 @@ void *ay8910_start_ym(void *infoptr, device_type chip_type, device_t *device, in
info->step = 2;
info->par = &ay8910_param;
info->par_env = &ay8910_param;
- info->zero_is_off = 0; /* FIXME: Remove after verification that off=vol(0) */
+ info->zero_is_off = 0; /* FIXME: Remove after verification that off=vol(0) */
info->env_step_mask = 0x0F;
}
else
@@ -821,7 +821,7 @@ void ay8910_reset_ym(void *chip)
psg->count_noise = 0;
psg->count_env = 0;
psg->output_noise = 0x01;
- psg->last_enable = -1; /* force a write */
+ psg->last_enable = -1; /* force a write */
for (i = 0;i < AY_PORTA;i++)
ay8910_write_reg(psg,i,0);
psg->ready = 1;
@@ -864,7 +864,7 @@ void ay8910_write_ym(void *chip, int addr, int data)
ay8910_context *psg = (ay8910_context *)chip;
if (addr & 1)
- { /* Data port */
+ { /* Data port */
int r = psg->register_latch;
if (r > 15) return;
@@ -877,7 +877,7 @@ void ay8910_write_ym(void *chip, int addr, int data)
ay8910_write_reg(psg,r,data);
}
else
- { /* Register port */
+ { /* Register port */
psg->register_latch = data & 0x0f;
}
}
@@ -899,9 +899,9 @@ int ay8910_read_ym(void *chip)
if ((psg->regs[AY_ENABLE] & 0x40) != 0)
logerror("warning: read from 8910 '%s' Port A set as output\n",psg->device->tag());
/*
- even if the port is set as output, we still need to return the external
- data. Some games, like kidniki, need this to work.
- */
+ even if the port is set as output, we still need to return the external
+ data. Some games, like kidniki, need this to work.
+ */
if (!psg->portAread.isnull())
psg->regs[AY_PORTA] = psg->portAread(0);
else
@@ -918,11 +918,11 @@ int ay8910_read_ym(void *chip)
}
/* Depending on chip type, unused bits in registers may or may not be accessible.
- Untested chips are assumed to regard them as 'ram'
- Tested and confirmed on hardware:
- - AY-3-8910: inaccessible bits (see masks below) read back as 0
- - YM2149: no anomaly
- */
+ Untested chips are assumed to regard them as 'ram'
+ Tested and confirmed on hardware:
+ - AY-3-8910: inaccessible bits (see masks below) read back as 0
+ - YM2149: no anomaly
+ */
if (chip_type == AY8910) {
const UINT8 mask[0x10]={
0xff,0x0f,0xff,0x0f,0xff,0x0f,0x1f,0xff,0x1f,0x1f,0x1f,0xff,0xff,0x0f,0xff,0xff
@@ -1040,13 +1040,13 @@ const device_type AY8910 = &device_creator<ay8910_device>;
ay8910_device::ay8910_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, AY8910, "AY-3-8910A", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ay8910_context);
}
ay8910_device::ay8910_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ay8910_context);
}
@@ -1254,5 +1254,3 @@ void ymz294_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/ay8910.h b/src/emu/sound/ay8910.h
index f2e82ca8991..060bef85780 100644
--- a/src/emu/sound/ay8910.h
+++ b/src/emu/sound/ay8910.h
@@ -22,29 +22,29 @@ YMZ294: 0 I/O port
/* Internal resistance at Volume level 7. */
-#define AY8910_INTERNAL_RESISTANCE (356)
-#define YM2149_INTERNAL_RESISTANCE (353)
+#define AY8910_INTERNAL_RESISTANCE (356)
+#define YM2149_INTERNAL_RESISTANCE (353)
/*
* Default values for resistor loads.
* The macro should be used in AY8910interface if
* the real values are unknown.
*/
-#define AY8910_DEFAULT_LOADS {1000, 1000, 1000}
+#define AY8910_DEFAULT_LOADS {1000, 1000, 1000}
/*
* The following is used by all drivers not reviewed yet.
* This will like the old behaviour, output between
* 0 and 7FFF
*/
-#define AY8910_LEGACY_OUTPUT (0x01)
+#define AY8910_LEGACY_OUTPUT (0x01)
/*
* Specifing the next define will simulate the special
* cross channel mixing if outputs are tied together.
* The driver will only provide one stream in this case.
*/
-#define AY8910_SINGLE_OUTPUT (0x02)
+#define AY8910_SINGLE_OUTPUT (0x02)
/*
* The following define is the default behaviour.
@@ -52,7 +52,7 @@ YMZ294: 0 I/O port
* Use this to specify that a discrete mixing stage
* follows.
*/
-#define AY8910_DISCRETE_OUTPUT (0x04)
+#define AY8910_DISCRETE_OUTPUT (0x04)
/*
* The following define causes the driver to output
@@ -62,7 +62,7 @@ YMZ294: 0 I/O port
* AY-3-8910 together). Do not use it now.
*/
/* TODO: implement mixing module */
-#define AY8910_RAW_OUTPUT (0x08)
+#define AY8910_RAW_OUTPUT (0x08)
/*
* This define specifies the initial state of YM2149
@@ -70,8 +70,8 @@ YMZ294: 0 I/O port
* compatible with AY8910.
*/
/* TODO: make it controllable while it's running (used by any hw???) */
-#define YM2149_PIN26_HIGH (0x00) /* or N/C */
-#define YM2149_PIN26_LOW (0x10)
+#define YM2149_PIN26_HIGH (0x00) /* or N/C */
+#define YM2149_PIN26_LOW (0x10)
#define AY8910_INTERFACE(name) \
@@ -79,12 +79,12 @@ YMZ294: 0 I/O port
struct ay8910_interface
{
- int flags; /* Flags */
- int res_load[3]; /* Load on channel in ohms */
- devcb_read8 portAread;
- devcb_read8 portBread;
- devcb_write8 portAwrite;
- devcb_write8 portBwrite;
+ int flags; /* Flags */
+ int res_load[3]; /* Load on channel in ohms */
+ devcb_read8 portAread;
+ devcb_read8 portBread;
+ devcb_write8 portAwrite;
+ devcb_write8 portBwrite;
};
@@ -119,7 +119,7 @@ void ay8910_write_ym(void *chip, int addr, int data);
int ay8910_read_ym(void *chip);
class ay8910_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ay8910_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/beep.c b/src/emu/sound/beep.c
index 6eed349fc18..262276bd19f 100644
--- a/src/emu/sound/beep.c
+++ b/src/emu/sound/beep.c
@@ -15,15 +15,15 @@
#include "sound/beep.h"
-#define BEEP_RATE 48000
+#define BEEP_RATE 48000
struct beep_state
{
- sound_stream *stream; /* stream number */
- int enable; /* enable beep */
- int frequency; /* set frequency - this can be changed using the appropiate function */
- int incr; /* initial wave state */
- INT16 signal; /* current signal */
+ sound_stream *stream; /* stream number */
+ int enable; /* enable beep */
+ int frequency; /* set frequency - this can be changed using the appropiate function */
+ int incr; /* initial wave state */
+ INT16 signal; /* current signal */
};
@@ -49,7 +49,7 @@ static STREAM_UPDATE( beep_sound_update )
INT16 signal = bs->signal;
int clock = 0, rate = BEEP_RATE / 2;
- /* get progress through wave */
+ /* get progress through wave */
int incr = bs->incr;
if (bs->frequency > 0)
@@ -166,7 +166,7 @@ const device_type BEEP = &device_creator<beep_device>;
beep_device::beep_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, BEEP, "Beep", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(beep_state);
}
@@ -199,5 +199,3 @@ void beep_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/beep.h b/src/emu/sound/beep.h
index 920ce25f367..e8ad25513aa 100644
--- a/src/emu/sound/beep.h
+++ b/src/emu/sound/beep.h
@@ -5,14 +5,14 @@
#include "devlegcy.h"
-#define BEEPER_TAG "beeper"
+#define BEEPER_TAG "beeper"
void beep_set_state(device_t *device, int on);
void beep_set_frequency(device_t *device, int frequency);
void beep_set_volume(device_t *device, int volume);
class beep_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
beep_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/bsmt2000.c b/src/emu/sound/bsmt2000.c
index d6a0b48350f..ea8c1538265 100644
--- a/src/emu/sound/bsmt2000.c
+++ b/src/emu/sound/bsmt2000.c
@@ -107,20 +107,20 @@ ROM_END
bsmt2000_device::bsmt2000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, BSMT2000, "BSMT2000", "bsmt2000", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- m_space_config("samples", ENDIANNESS_LITTLE, 8, 32, 0, NULL),
- m_ready_callback(NULL),
- m_stream(NULL),
- m_direct(NULL),
- m_cpu(NULL),
- m_register_select(0),
- m_write_data(0),
- m_rom_address(0),
- m_rom_bank(0),
- m_left_data(0),
- m_right_data(0),
- m_write_pending(false)
+ device_sound_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ m_space_config("samples", ENDIANNESS_LITTLE, 8, 32, 0, NULL),
+ m_ready_callback(NULL),
+ m_stream(NULL),
+ m_direct(NULL),
+ m_cpu(NULL),
+ m_register_select(0),
+ m_write_data(0),
+ m_rom_address(0),
+ m_rom_bank(0),
+ m_left_data(0),
+ m_right_data(0),
+ m_write_pending(false)
{
m_shortname = "bsmt2000";
m_address_map[0] = *ADDRESS_MAP_NAME(bsmt2000);
diff --git a/src/emu/sound/bsmt2000.h b/src/emu/sound/bsmt2000.h
index c0abcaf8607..1ae84979422 100644
--- a/src/emu/sound/bsmt2000.h
+++ b/src/emu/sound/bsmt2000.h
@@ -121,19 +121,19 @@ private:
// configuration state
const address_space_config m_space_config;
- ready_callback m_ready_callback;
+ ready_callback m_ready_callback;
// internal state
- sound_stream * m_stream;
- direct_read_data * m_direct;
- tms32015_device * m_cpu;
- UINT16 m_register_select;
- UINT16 m_write_data;
- UINT16 m_rom_address;
- UINT16 m_rom_bank;
- INT16 m_left_data;
- INT16 m_right_data;
- bool m_write_pending;
+ sound_stream * m_stream;
+ direct_read_data * m_direct;
+ tms32015_device * m_cpu;
+ UINT16 m_register_select;
+ UINT16 m_write_data;
+ UINT16 m_rom_address;
+ UINT16 m_rom_bank;
+ INT16 m_left_data;
+ INT16 m_right_data;
+ bool m_write_pending;
};
diff --git a/src/emu/sound/c140.c b/src/emu/sound/c140.c
index d2853f19324..90391f65dbe 100644
--- a/src/emu/sound/c140.c
+++ b/src/emu/sound/c140.c
@@ -67,23 +67,23 @@ struct voice_registers
struct VOICE
{
- long ptoffset;
- long pos;
- long key;
+ long ptoffset;
+ long pos;
+ long key;
//--work
- long lastdt;
- long prevdt;
- long dltdt;
+ long lastdt;
+ long prevdt;
+ long dltdt;
//--reg
- long rvol;
- long lvol;
- long frequency;
- long bank;
- long mode;
-
- long sample_start;
- long sample_end;
- long sample_loop;
+ long rvol;
+ long lvol;
+ long frequency;
+ long bank;
+ long mode;
+
+ long sample_start;
+ long sample_end;
+ long sample_loop;
};
struct c140_state
@@ -99,7 +99,7 @@ struct c140_state
void *pRom;
UINT8 REG[0x200];
- INT16 pcmtbl[8]; //2000.06.26 CAB
+ INT16 pcmtbl[8]; //2000.06.26 CAB
VOICE voi[MAX_VOICE];
};
@@ -239,28 +239,28 @@ void c140_set_base(device_t *device, void *base)
INLINE int limit(INT32 in)
{
- if(in>0x7fff) return 0x7fff;
- else if(in<-0x8000) return -0x8000;
+ if(in>0x7fff) return 0x7fff;
+ else if(in<-0x8000) return -0x8000;
return in;
}
static STREAM_UPDATE( update_stereo )
{
c140_state *info = (c140_state *)param;
- int i,j;
+ int i,j;
- INT32 rvol,lvol;
- INT32 dt;
- INT32 sdt;
- INT32 st,ed,sz;
+ INT32 rvol,lvol;
+ INT32 dt;
+ INT32 sdt;
+ INT32 st,ed,sz;
- INT8 *pSampleData;
- INT32 frequency,delta,offset,pos;
- INT32 cnt, voicecnt;
- INT32 lastdt,prevdt,dltdt;
- float pbase=(float)info->baserate*2.0 / (float)info->sample_rate;
+ INT8 *pSampleData;
+ INT32 frequency,delta,offset,pos;
+ INT32 cnt, voicecnt;
+ INT32 lastdt,prevdt,dltdt;
+ float pbase=(float)info->baserate*2.0 / (float)info->sample_rate;
- INT16 *lmix, *rmix;
+ INT16 *lmix, *rmix;
if(samples>info->sample_rate) samples=info->sample_rate;
@@ -341,10 +341,10 @@ static STREAM_UPDATE( update_stereo )
/* Read the chosen sample byte */
dt=pSampleData[pos];
- /* decompress to 13bit range */ //2000.06.26 CAB
- sdt=dt>>3; //signed
- if(sdt<0) sdt = (sdt<<(dt&7)) - info->pcmtbl[dt&7];
- else sdt = (sdt<<(dt&7)) + info->pcmtbl[dt&7];
+ /* decompress to 13bit range */ //2000.06.26 CAB
+ sdt=dt>>3; //signed
+ if(sdt<0) sdt = (sdt<<(dt&7)) - info->pcmtbl[dt&7];
+ else sdt = (sdt<<(dt&7)) + info->pcmtbl[dt&7];
prevdt=lastdt;
lastdt=sdt;
@@ -452,13 +452,13 @@ static DEVICE_START( c140 )
info->pRom=*device->region();
- /* make decompress pcm table */ //2000.06.26 CAB
+ /* make decompress pcm table */ //2000.06.26 CAB
{
int i;
INT32 segbase=0;
for(i=0;i<8;i++)
{
- info->pcmtbl[i]=segbase; //segment base value
+ info->pcmtbl[i]=segbase; //segment base value
segbase += 16<<i;
}
}
@@ -478,7 +478,7 @@ const device_type C140 = &device_creator<c140_device>;
c140_device::c140_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, C140, "C140", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(c140_state);
}
@@ -511,5 +511,3 @@ void c140_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/c140.h b/src/emu/sound/c140.h
index 681d676d33c..c7f270fa645 100644
--- a/src/emu/sound/c140.h
+++ b/src/emu/sound/c140.h
@@ -20,11 +20,11 @@ enum
};
struct c140_interface {
- int banking_type;
+ int banking_type;
};
class c140_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
c140_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/c352.c b/src/emu/sound/c352.c
index 28090a0dcaa..25b24484a30 100644
--- a/src/emu/sound/c352.c
+++ b/src/emu/sound/c352.c
@@ -37,9 +37,9 @@ ADDRESS_MAP_END
c352_device::c352_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, C352, "C352", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- m_space_config("samples", ENDIANNESS_LITTLE, 8, 24, 0, NULL, *ADDRESS_MAP_NAME(c352))
+ device_sound_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ m_space_config("samples", ENDIANNESS_LITTLE, 8, 24, 0, NULL, *ADDRESS_MAP_NAME(c352))
{
}
@@ -88,8 +88,8 @@ void c352_device::mix_one_channel(unsigned long ch, long sample_count)
frequency = m_c352_ch[ch].pitch;
delta=frequency;
- pos = m_c352_ch[ch].current_addr; // sample pointer
- offset = m_c352_ch[ch].pos; // 16.16 fixed-point offset into the sample
+ pos = m_c352_ch[ch].current_addr; // sample pointer
+ offset = m_c352_ch[ch].pos; // 16.16 fixed-point offset into the sample
flag = m_c352_ch[ch].flag;
bank = m_c352_ch[ch].bank << 16;
@@ -100,7 +100,7 @@ void c352_device::mix_one_channel(unsigned long ch, long sample_count)
{
offset += delta;
cnt = (offset>>16)&0x7fff;
- if (cnt) // if there is a whole sample part, chop it off now that it's been applied
+ if (cnt) // if there is a whole sample part, chop it off now that it's been applied
{
offset &= 0xffff;
}
@@ -156,7 +156,7 @@ void c352_device::mix_one_channel(unsigned long ch, long sample_count)
}
else
{
- sample = m_mulaw_table[0x7f]; // Nearest sound(s) is here.
+ sample = m_mulaw_table[0x7f]; // Nearest sound(s) is here.
}
noisebuf = 0;
noisecnt = ( flag & C352_FLG_FILTER ) ? 0 : 1;
@@ -305,7 +305,7 @@ void c352_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
for(i = 0 ; i < samples ; i++)
{
- m_channel_l[i] = m_channel_r[i] = m_channel_l2[i] = m_channel_r2[i] = 0;
+ m_channel_l[i] = m_channel_r[i] = m_channel_l2[i] = m_channel_r2[i] = 0;
}
for (j = 0 ; j < 32 ; j++)
@@ -324,8 +324,8 @@ void c352_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
unsigned short c352_device::read_reg16(unsigned long address)
{
- unsigned long chan;
- unsigned short val;
+ unsigned long chan;
+ unsigned short val;
m_stream->update();
@@ -350,7 +350,7 @@ unsigned short c352_device::read_reg16(unsigned long address)
void c352_device::write_reg16(unsigned long address, unsigned short val)
{
- unsigned long chan;
+ unsigned long chan;
int i;
m_stream->update();
@@ -361,7 +361,7 @@ void c352_device::write_reg16(unsigned long address, unsigned short val)
{
switch(address)
{
- case 0x404: // execute key-ons/offs
+ case 0x404: // execute key-ons/offs
for ( i = 0 ; i <= 31 ; i++ )
{
if ( m_c352_ch[i].flag & C352_FLG_KEYON )
@@ -470,14 +470,14 @@ void c352_device::device_start()
// generate mulaw table for mulaw format samples
for (i = 0; i < 256; i++)
{
- double y = (double) (i & 0x7f);
- double x = (exp (y / y_max * log (1.0 + u)) - 1.0) * x_max / u;
-
- if (i & 0x80)
- {
- x = -x;
- }
- m_mulaw_table[i] = (short)x;
+ double y = (double) (i & 0x7f);
+ double x = (exp (y / y_max * log (1.0 + u)) - 1.0) * x_max / u;
+
+ if (i & 0x80)
+ {
+ x = -x;
+ }
+ m_mulaw_table[i] = (short)x;
}
// register save state info
diff --git a/src/emu/sound/c352.h b/src/emu/sound/c352.h
index bc15db47241..42192339c80 100644
--- a/src/emu/sound/c352.h
+++ b/src/emu/sound/c352.h
@@ -17,8 +17,8 @@
// ======================> asc_device
class c352_device : public device_t,
- public device_sound_interface,
- public device_memory_interface
+ public device_sound_interface,
+ public device_memory_interface
{
public:
// construction/destruction
@@ -34,7 +34,7 @@ protected:
virtual void device_start();
virtual void device_reset();
- // device_sound_interface overrides
+ // device_sound_interface overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
// device_memory_interface overrides
@@ -43,47 +43,47 @@ protected:
const address_space_config m_space_config;
private:
- enum {
- C352_FLG_BUSY = 0x8000, // channel is busy
- C352_FLG_KEYON = 0x4000, // Keyon
- C352_FLG_KEYOFF = 0x2000, // Keyoff
- C352_FLG_LOOPTRG = 0x1000, // Loop Trigger
- C352_FLG_LOOPHIST = 0x0800, // Loop History
- C352_FLG_FM = 0x0400, // Frequency Modulation
- C352_FLG_PHASERL = 0x0200, // Rear Left invert phase 180 degrees
- C352_FLG_PHASEFL = 0x0100, // Front Left invert phase 180 degrees
- C352_FLG_PHASEFR = 0x0080, // invert phase 180 degrees (e.g. flip sign of sample)
- C352_FLG_LDIR = 0x0040, // loop direction
- C352_FLG_LINK = 0x0020, // "long-format" sample (can't loop, not sure what else it means)
- C352_FLG_NOISE = 0x0010, // play noise instead of sample
- C352_FLG_MULAW = 0x0008, // sample is mulaw instead of linear 8-bit PCM
- C352_FLG_FILTER = 0x0004, // don't apply filter
- C352_FLG_REVLOOP = 0x0003, // loop backwards
- C352_FLG_LOOP = 0x0002, // loop forward
- C352_FLG_REVERSE = 0x0001, // play sample backwards
- };
-
- struct c352_ch_t
- {
- UINT8 vol_l;
- UINT8 vol_r;
- UINT8 vol_l2;
- UINT8 vol_r2;
- UINT8 bank;
- INT16 noise;
- INT16 noisebuf;
- UINT16 noisecnt;
- UINT16 pitch;
- UINT16 start_addr;
- UINT16 end_addr;
- UINT16 repeat_addr;
- UINT32 flag;
-
- UINT16 start;
- UINT16 repeat;
- UINT32 current_addr;
- UINT32 pos;
- };
+ enum {
+ C352_FLG_BUSY = 0x8000, // channel is busy
+ C352_FLG_KEYON = 0x4000, // Keyon
+ C352_FLG_KEYOFF = 0x2000, // Keyoff
+ C352_FLG_LOOPTRG = 0x1000, // Loop Trigger
+ C352_FLG_LOOPHIST = 0x0800, // Loop History
+ C352_FLG_FM = 0x0400, // Frequency Modulation
+ C352_FLG_PHASERL = 0x0200, // Rear Left invert phase 180 degrees
+ C352_FLG_PHASEFL = 0x0100, // Front Left invert phase 180 degrees
+ C352_FLG_PHASEFR = 0x0080, // invert phase 180 degrees (e.g. flip sign of sample)
+ C352_FLG_LDIR = 0x0040, // loop direction
+ C352_FLG_LINK = 0x0020, // "long-format" sample (can't loop, not sure what else it means)
+ C352_FLG_NOISE = 0x0010, // play noise instead of sample
+ C352_FLG_MULAW = 0x0008, // sample is mulaw instead of linear 8-bit PCM
+ C352_FLG_FILTER = 0x0004, // don't apply filter
+ C352_FLG_REVLOOP = 0x0003, // loop backwards
+ C352_FLG_LOOP = 0x0002, // loop forward
+ C352_FLG_REVERSE = 0x0001, // play sample backwards
+ };
+
+ struct c352_ch_t
+ {
+ UINT8 vol_l;
+ UINT8 vol_r;
+ UINT8 vol_l2;
+ UINT8 vol_r2;
+ UINT8 bank;
+ INT16 noise;
+ INT16 noisebuf;
+ UINT16 noisecnt;
+ UINT16 pitch;
+ UINT16 start_addr;
+ UINT16 end_addr;
+ UINT16 repeat_addr;
+ UINT32 flag;
+
+ UINT16 start;
+ UINT16 repeat;
+ UINT32 current_addr;
+ UINT32 pos;
+ };
c352_ch_t m_c352_ch[32];
int m_sample_rate_base;
@@ -97,11 +97,11 @@ private:
unsigned int m_mseq_reg;
direct_read_data *m_direct;
- // private functions
- int get_mseq_bit(void);
- void mix_one_channel(unsigned long ch, long sample_count);
- unsigned short read_reg16(unsigned long address);
- void write_reg16(unsigned long address, unsigned short val);
+ // private functions
+ int get_mseq_bit(void);
+ void mix_one_channel(unsigned long ch, long sample_count);
+ unsigned short read_reg16(unsigned long address);
+ void write_reg16(unsigned long address, unsigned short val);
};
@@ -109,4 +109,3 @@ private:
extern const device_type C352;
#endif /* __C352_H__ */
-
diff --git a/src/emu/sound/c6280.c b/src/emu/sound/c6280.c
index afc65da6516..b85cd54915b 100644
--- a/src/emu/sound/c6280.c
+++ b/src/emu/sound/c6280.c
@@ -62,92 +62,92 @@
void c6280_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
- static const int scale_tab[] = {
- 0x00, 0x03, 0x05, 0x07, 0x09, 0x0B, 0x0D, 0x0F,
- 0x10, 0x13, 0x15, 0x17, 0x19, 0x1B, 0x1D, 0x1F
- };
-
- int lmal = (m_balance >> 4) & 0x0F;
- int rmal = (m_balance >> 0) & 0x0F;
-
- lmal = scale_tab[lmal];
- rmal = scale_tab[rmal];
-
- /* Clear buffer */
- for (int i = 0; i < samples; i++)
- {
- outputs[0][i] = 0;
- outputs[1][i] = 0;
- }
-
- for (int ch = 0; ch < 6; ch++)
- {
- /* Only look at enabled channels */
- if(m_channel[ch].m_control & 0x80)
- {
- int lal = (m_channel[ch].m_balance >> 4) & 0x0F;
- int ral = (m_channel[ch].m_balance >> 0) & 0x0F;
- int al = m_channel[ch].m_control & 0x1F;
-
- lal = scale_tab[lal];
- ral = scale_tab[ral];
-
- /* Calculate volume just as the patent says */
- int vll = (0x1F - lal) + (0x1F - al) + (0x1F - lmal);
- if(vll > 0x1F) vll = 0x1F;
-
- int vlr = (0x1F - ral) + (0x1F - al) + (0x1F - rmal);
- if(vlr > 0x1F) vlr = 0x1F;
-
- vll = m_volume_table[vll];
- vlr = m_volume_table[vlr];
-
- /* Check channel mode */
- if((ch >= 4) && (m_channel[ch].m_noise_control & 0x80))
- {
- /* Noise mode */
- UINT32 step = m_noise_freq_tab[(m_channel[ch].m_noise_control & 0x1F) ^ 0x1F];
- for (int i = 0; i < samples; i += 1)
- {
- static int data = 0;
- m_channel[ch].m_noise_counter += step;
- if(m_channel[ch].m_noise_counter >= 0x800)
- {
- data = (machine().rand() & 1) ? 0x1F : 0;
- }
- m_channel[ch].m_noise_counter &= 0x7FF;
- outputs[0][i] += (INT16)(vll * (data - 16));
- outputs[1][i] += (INT16)(vlr * (data - 16));
- }
- }
- else
- if(m_channel[ch].m_control & 0x40)
- {
- /* DDA mode */
- for (int i = 0; i < samples; i++)
- {
- outputs[0][i] += (INT16)(vll * (m_channel[ch].m_dda - 16));
- outputs[1][i] += (INT16)(vlr * (m_channel[ch].m_dda - 16));
- }
- }
- else
- {
- /* Waveform mode */
- UINT32 step = m_wave_freq_tab[m_channel[ch].m_frequency];
- for (int i = 0; i < samples; i += 1)
- {
- int offset;
- INT16 data;
- offset = (m_channel[ch].m_counter >> 12) & 0x1F;
- m_channel[ch].m_counter += step;
- m_channel[ch].m_counter &= 0x1FFFF;
- data = m_channel[ch].m_waveform[offset];
- outputs[0][i] += (INT16)(vll * (data - 16));
- outputs[1][i] += (INT16)(vlr * (data - 16));
- }
- }
- }
- }
+ static const int scale_tab[] = {
+ 0x00, 0x03, 0x05, 0x07, 0x09, 0x0B, 0x0D, 0x0F,
+ 0x10, 0x13, 0x15, 0x17, 0x19, 0x1B, 0x1D, 0x1F
+ };
+
+ int lmal = (m_balance >> 4) & 0x0F;
+ int rmal = (m_balance >> 0) & 0x0F;
+
+ lmal = scale_tab[lmal];
+ rmal = scale_tab[rmal];
+
+ /* Clear buffer */
+ for (int i = 0; i < samples; i++)
+ {
+ outputs[0][i] = 0;
+ outputs[1][i] = 0;
+ }
+
+ for (int ch = 0; ch < 6; ch++)
+ {
+ /* Only look at enabled channels */
+ if(m_channel[ch].m_control & 0x80)
+ {
+ int lal = (m_channel[ch].m_balance >> 4) & 0x0F;
+ int ral = (m_channel[ch].m_balance >> 0) & 0x0F;
+ int al = m_channel[ch].m_control & 0x1F;
+
+ lal = scale_tab[lal];
+ ral = scale_tab[ral];
+
+ /* Calculate volume just as the patent says */
+ int vll = (0x1F - lal) + (0x1F - al) + (0x1F - lmal);
+ if(vll > 0x1F) vll = 0x1F;
+
+ int vlr = (0x1F - ral) + (0x1F - al) + (0x1F - rmal);
+ if(vlr > 0x1F) vlr = 0x1F;
+
+ vll = m_volume_table[vll];
+ vlr = m_volume_table[vlr];
+
+ /* Check channel mode */
+ if((ch >= 4) && (m_channel[ch].m_noise_control & 0x80))
+ {
+ /* Noise mode */
+ UINT32 step = m_noise_freq_tab[(m_channel[ch].m_noise_control & 0x1F) ^ 0x1F];
+ for (int i = 0; i < samples; i += 1)
+ {
+ static int data = 0;
+ m_channel[ch].m_noise_counter += step;
+ if(m_channel[ch].m_noise_counter >= 0x800)
+ {
+ data = (machine().rand() & 1) ? 0x1F : 0;
+ }
+ m_channel[ch].m_noise_counter &= 0x7FF;
+ outputs[0][i] += (INT16)(vll * (data - 16));
+ outputs[1][i] += (INT16)(vlr * (data - 16));
+ }
+ }
+ else
+ if(m_channel[ch].m_control & 0x40)
+ {
+ /* DDA mode */
+ for (int i = 0; i < samples; i++)
+ {
+ outputs[0][i] += (INT16)(vll * (m_channel[ch].m_dda - 16));
+ outputs[1][i] += (INT16)(vlr * (m_channel[ch].m_dda - 16));
+ }
+ }
+ else
+ {
+ /* Waveform mode */
+ UINT32 step = m_wave_freq_tab[m_channel[ch].m_frequency];
+ for (int i = 0; i < samples; i += 1)
+ {
+ int offset;
+ INT16 data;
+ offset = (m_channel[ch].m_counter >> 12) & 0x1F;
+ m_channel[ch].m_counter += step;
+ m_channel[ch].m_counter &= 0x1FFFF;
+ data = m_channel[ch].m_waveform[offset];
+ outputs[0][i] += (INT16)(vll * (data - 16));
+ outputs[1][i] += (INT16)(vlr * (data - 16));
+ }
+ }
+ }
+ }
}
@@ -164,91 +164,91 @@ WRITE8_MEMBER( c6280_device::c6280_w )
{
m_cpudevice->io_set_buffer(data);
- channel *chan = &m_channel[m_select];
+ channel *chan = &m_channel[m_select];
- /* Update stream */
- m_stream->update();
+ /* Update stream */
+ m_stream->update();
- switch(offset & 0x0F)
- {
- case 0x00: /* Channel select */
- m_select = data & 0x07;
- break;
+ switch(offset & 0x0F)
+ {
+ case 0x00: /* Channel select */
+ m_select = data & 0x07;
+ break;
- case 0x01: /* Global balance */
- m_balance = data;
- break;
+ case 0x01: /* Global balance */
+ m_balance = data;
+ break;
- case 0x02: /* Channel frequency (LSB) */
- chan->m_frequency = (chan->m_frequency & 0x0F00) | data;
- chan->m_frequency &= 0x0FFF;
- break;
+ case 0x02: /* Channel frequency (LSB) */
+ chan->m_frequency = (chan->m_frequency & 0x0F00) | data;
+ chan->m_frequency &= 0x0FFF;
+ break;
- case 0x03: /* Channel frequency (MSB) */
- chan->m_frequency = (chan->m_frequency & 0x00FF) | (data << 8);
- chan->m_frequency &= 0x0FFF;
- break;
+ case 0x03: /* Channel frequency (MSB) */
+ chan->m_frequency = (chan->m_frequency & 0x00FF) | (data << 8);
+ chan->m_frequency &= 0x0FFF;
+ break;
- case 0x04: /* Channel control (key-on, DDA mode, volume) */
+ case 0x04: /* Channel control (key-on, DDA mode, volume) */
- /* 1-to-0 transition of DDA bit resets waveform index */
- if((chan->m_control & 0x40) && ((data & 0x40) == 0))
- {
- chan->m_index = 0;
- }
- chan->m_control = data;
- break;
+ /* 1-to-0 transition of DDA bit resets waveform index */
+ if((chan->m_control & 0x40) && ((data & 0x40) == 0))
+ {
+ chan->m_index = 0;
+ }
+ chan->m_control = data;
+ break;
- case 0x05: /* Channel balance */
- chan->m_balance = data;
- break;
+ case 0x05: /* Channel balance */
+ chan->m_balance = data;
+ break;
- case 0x06: /* Channel waveform data */
+ case 0x06: /* Channel waveform data */
- switch(chan->m_control & 0xC0)
- {
- case 0x00:
- chan->m_waveform[chan->m_index & 0x1F] = data & 0x1F;
- chan->m_index = (chan->m_index + 1) & 0x1F;
- break;
+ switch(chan->m_control & 0xC0)
+ {
+ case 0x00:
+ chan->m_waveform[chan->m_index & 0x1F] = data & 0x1F;
+ chan->m_index = (chan->m_index + 1) & 0x1F;
+ break;
- case 0x40:
- break;
+ case 0x40:
+ break;
- case 0x80:
- chan->m_waveform[chan->m_index & 0x1F] = data & 0x1F;
- chan->m_index = (chan->m_index + 1) & 0x1F;
- break;
+ case 0x80:
+ chan->m_waveform[chan->m_index & 0x1F] = data & 0x1F;
+ chan->m_index = (chan->m_index + 1) & 0x1F;
+ break;
- case 0xC0:
- chan->m_dda = data & 0x1F;
- break;
- }
+ case 0xC0:
+ chan->m_dda = data & 0x1F;
+ break;
+ }
- break;
+ break;
- case 0x07: /* Noise control (enable, frequency) */
- chan->m_noise_control = data;
- break;
+ case 0x07: /* Noise control (enable, frequency) */
+ chan->m_noise_control = data;
+ break;
- case 0x08: /* LFO frequency */
- m_lfo_frequency = data;
- break;
+ case 0x08: /* LFO frequency */
+ m_lfo_frequency = data;
+ break;
- case 0x09: /* LFO control (enable, mode) */
- m_lfo_control = data;
- break;
+ case 0x09: /* LFO control (enable, mode) */
+ m_lfo_control = data;
+ break;
- default:
- break;
- }
+ default:
+ break;
+ }
}
const device_type C6280 = &device_creator<c6280_device>;
c6280_device::c6280_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, C6280, "HuC6280", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -268,50 +268,50 @@ void c6280_device::device_config_complete()
void c6280_device::device_start()
{
- int rate = clock() / 16;
+ int rate = clock() / 16;
- /* Create stereo stream */
- m_stream = machine().sound().stream_alloc(*this, 0, 2, rate, this);
+ /* Create stereo stream */
+ m_stream = machine().sound().stream_alloc(*this, 0, 2, rate, this);
const c6280_interface *intf = (const c6280_interface *)static_config();
- /* Loudest volume level for table */
- double level = 65535.0 / 6.0 / 32.0;
+ /* Loudest volume level for table */
+ double level = 65535.0 / 6.0 / 32.0;
- /* Clear context */
- m_select = 0;
- m_balance = 0;
- m_lfo_frequency = 0;
- m_lfo_control = 0;
- memset(m_channel, 0, sizeof(channel) * 8);
+ /* Clear context */
+ m_select = 0;
+ m_balance = 0;
+ m_lfo_frequency = 0;
+ m_lfo_control = 0;
+ memset(m_channel, 0, sizeof(channel) * 8);
- m_cpudevice = machine().device<h6280_device>(intf->cpu);
- if (m_cpudevice == NULL)
- {
- fatalerror("c6280_init: no CPU found with tag of '%s'\n", tag());
+ m_cpudevice = machine().device<h6280_device>(intf->cpu);
+ if (m_cpudevice == NULL)
+ {
+ fatalerror("c6280_init: no CPU found with tag of '%s'\n", tag());
}
- /* Make waveform frequency table */
- for (int i = 0; i < 4096; i += 1)
- {
- double step = ((clock() / rate) * 4096) / (i + 1);
- m_wave_freq_tab[(1 + i) & 0xFFF] = (UINT32)step;
- }
-
- /* Make noise frequency table */
- for (int i = 0; i < 32; i += 1)
- {
- double step = ((clock() / rate) * 32) / (i+1);
- m_noise_freq_tab[i] = (UINT32)step;
- }
-
- /* Make volume table */
- /* PSG has 48dB volume range spread over 32 steps */
- double step = 48.0 / 32.0;
- for (int i = 0; i < 31; i++)
- {
- m_volume_table[i] = (UINT16)level;
- level /= pow(10.0, step / 20.0);
- }
- m_volume_table[31] = 0;
+ /* Make waveform frequency table */
+ for (int i = 0; i < 4096; i += 1)
+ {
+ double step = ((clock() / rate) * 4096) / (i + 1);
+ m_wave_freq_tab[(1 + i) & 0xFFF] = (UINT32)step;
+ }
+
+ /* Make noise frequency table */
+ for (int i = 0; i < 32; i += 1)
+ {
+ double step = ((clock() / rate) * 32) / (i+1);
+ m_noise_freq_tab[i] = (UINT32)step;
+ }
+
+ /* Make volume table */
+ /* PSG has 48dB volume range spread over 32 steps */
+ double step = 48.0 / 32.0;
+ for (int i = 0; i < 31; i++)
+ {
+ m_volume_table[i] = (UINT16)level;
+ level /= pow(10.0, step / 20.0);
+ }
+ m_volume_table[31] = 0;
}
diff --git a/src/emu/sound/c6280.h b/src/emu/sound/c6280.h
index c1d9690432c..bc985e9ee33 100644
--- a/src/emu/sound/c6280.h
+++ b/src/emu/sound/c6280.h
@@ -7,11 +7,11 @@
struct c6280_interface
{
- const char * cpu;
+ const char * cpu;
};
class c6280_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
c6280_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -44,14 +44,14 @@ private:
// internal state
sound_stream *m_stream;
h6280_device *m_cpudevice;
- UINT8 m_select;
- UINT8 m_balance;
- UINT8 m_lfo_frequency;
- UINT8 m_lfo_control;
- channel m_channel[8];
- INT16 m_volume_table[32];
- UINT32 m_noise_freq_tab[32];
- UINT32 m_wave_freq_tab[4096];
+ UINT8 m_select;
+ UINT8 m_balance;
+ UINT8 m_lfo_frequency;
+ UINT8 m_lfo_control;
+ channel m_channel[8];
+ INT16 m_volume_table[32];
+ UINT32 m_noise_freq_tab[32];
+ UINT32 m_wave_freq_tab[4096];
};
extern const device_type C6280;
diff --git a/src/emu/sound/cdda.c b/src/emu/sound/cdda.c
index 9e3cb3c06d6..ffdff6597fc 100644
--- a/src/emu/sound/cdda.c
+++ b/src/emu/sound/cdda.c
@@ -9,16 +9,16 @@
struct cdda_info
{
- sound_stream * stream;
- cdrom_file * disc;
+ sound_stream * stream;
+ cdrom_file * disc;
- INT8 audio_playing, audio_pause, audio_ended_normally;
- UINT32 audio_lba, audio_length;
+ INT8 audio_playing, audio_pause, audio_ended_normally;
+ UINT32 audio_lba, audio_length;
- UINT8 * audio_cache;
- UINT32 audio_samples;
- UINT32 audio_bptr;
- INT16 audio_volume[2];
+ UINT8 * audio_cache;
+ UINT32 audio_samples;
+ UINT32 audio_bptr;
+ INT16 audio_volume[2];
};
INLINE cdda_info *get_safe_token(device_t *device)
@@ -216,7 +216,7 @@ static void get_audio_data(cdda_info *info, stream_sample_t *bufL, stream_sample
INT16 *audio_cache = (INT16 *) info->audio_cache;
/* if no file, audio not playing, audio paused, or out of disc data,
- just zero fill */
+ just zero fill */
if (!info->disc || !info->audio_playing || info->audio_pause || (!info->audio_length && !info->audio_samples))
{
if( info->disc && info->audio_playing && !info->audio_pause && !info->audio_length )
@@ -332,7 +332,7 @@ const device_type CDDA = &device_creator<cdda_device>;
cdda_device::cdda_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, CDDA, "CD/DA", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(cdda_info);
}
@@ -365,5 +365,3 @@ void cdda_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/cdda.h b/src/emu/sound/cdda.h
index c2f22a1d47d..3c8d3e0a669 100644
--- a/src/emu/sound/cdda.h
+++ b/src/emu/sound/cdda.h
@@ -21,7 +21,7 @@ int cdda_audio_paused(device_t *device);
int cdda_audio_ended(device_t *device);
class cdda_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
cdda_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/cdp1863.c b/src/emu/sound/cdp1863.c
index a89b7cb6c1f..1b1812ae34e 100644
--- a/src/emu/sound/cdp1863.c
+++ b/src/emu/sound/cdp1863.c
@@ -26,7 +26,7 @@
#define LOG 0
-#define CDP1863_DEFAULT_LATCH 0x35
+#define CDP1863_DEFAULT_LATCH 0x35
@@ -48,11 +48,11 @@ const device_type CDP1863 = &device_creator<cdp1863_device>;
//-------------------------------------------------
cdp1863_device::cdp1863_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CDP1863, "CDP1863", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_stream(NULL),
- m_clock1(clock),
- m_clock2(0)
+ : device_t(mconfig, CDP1863, "CDP1863", tag, owner, clock),
+ device_sound_interface(mconfig, *this),
+ m_stream(NULL),
+ m_clock1(clock),
+ m_clock2(0)
{
}
diff --git a/src/emu/sound/cdp1863.h b/src/emu/sound/cdp1863.h
index 89cafea2bf2..6756491d4dc 100644
--- a/src/emu/sound/cdp1863.h
+++ b/src/emu/sound/cdp1863.h
@@ -43,12 +43,12 @@
// ======================> cdp1863_device
-class cdp1863_device : public device_t,
+class cdp1863_device : public device_t,
public device_sound_interface
{
public:
- // construction/destruction
- cdp1863_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cdp1863_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// inline configuration helpers
static void static_set_config(device_t &device, int clock2);
@@ -62,8 +62,8 @@ public:
void set_clk2(int clock);
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
// internal callbacks
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
@@ -71,14 +71,14 @@ protected:
private:
sound_stream *m_stream;
- int m_clock1; // clock 1
- int m_clock2; // clock 2
+ int m_clock1; // clock 1
+ int m_clock2; // clock 2
// sound state
- int m_oe; // output enable
- int m_latch; // sound latch
- INT16 m_signal; // current signal
- int m_incr; // initial wave state
+ int m_oe; // output enable
+ int m_latch; // sound latch
+ INT16 m_signal; // current signal
+ int m_incr; // initial wave state
};
diff --git a/src/emu/sound/cdp1864.c b/src/emu/sound/cdp1864.c
index ffb3a69d673..38dc6f7a084 100644
--- a/src/emu/sound/cdp1864.c
+++ b/src/emu/sound/cdp1864.c
@@ -32,11 +32,11 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define CDP1864_DEFAULT_LATCH 0x35
+#define CDP1864_DEFAULT_LATCH 0x35
-#define CDP1864_CYCLES_DMA_START 2*8
-#define CDP1864_CYCLES_DMA_ACTIVE 8*8
-#define CDP1864_CYCLES_DMA_WAIT 6*8
+#define CDP1864_CYCLES_DMA_START 2*8
+#define CDP1864_CYCLES_DMA_ACTIVE 8*8
+#define CDP1864_CYCLES_DMA_WAIT 6*8
static const int CDP1864_BACKGROUND_COLOR_SEQUENCE[] = { 2, 0, 1, 4 };
@@ -99,13 +99,13 @@ inline void cdp1864_device::initialize_palette()
cdp1864_device::cdp1864_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, CDP1864, "CDP1864", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_disp(0),
- m_dmaout(0),
- m_bgcolor(0),
- m_con(0),
- m_aoe(0),
- m_latch(CDP1864_DEFAULT_LATCH)
+ device_sound_interface(mconfig, *this),
+ m_disp(0),
+ m_dmaout(0),
+ m_bgcolor(0),
+ m_con(0),
+ m_aoe(0),
+ m_latch(CDP1864_DEFAULT_LATCH)
{
}
diff --git a/src/emu/sound/cdp1864.h b/src/emu/sound/cdp1864.h
index 5e083d0f221..25d820ea8df 100644
--- a/src/emu/sound/cdp1864.h
+++ b/src/emu/sound/cdp1864.h
@@ -46,33 +46,33 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define CDP1864_CLOCK XTAL_1_75MHz
+#define CDP1864_CLOCK XTAL_1_75MHz
-#define CDP1864_VISIBLE_COLUMNS 64
-#define CDP1864_VISIBLE_LINES 192
+#define CDP1864_VISIBLE_COLUMNS 64
+#define CDP1864_VISIBLE_LINES 192
-#define CDP1864_HBLANK_END 1 * 8
-#define CDP1864_HBLANK_START 13 * 8
-#define CDP1864_HSYNC_START 0 * 8
-#define CDP1864_HSYNC_END 1 * 8
-#define CDP1864_SCREEN_START 4 * 8
-#define CDP1864_SCREEN_END 12 * 8
-#define CDP1864_SCREEN_WIDTH 14 * 8
+#define CDP1864_HBLANK_END 1 * 8
+#define CDP1864_HBLANK_START 13 * 8
+#define CDP1864_HSYNC_START 0 * 8
+#define CDP1864_HSYNC_END 1 * 8
+#define CDP1864_SCREEN_START 4 * 8
+#define CDP1864_SCREEN_END 12 * 8
+#define CDP1864_SCREEN_WIDTH 14 * 8
-#define CDP1864_TOTAL_SCANLINES 312
+#define CDP1864_TOTAL_SCANLINES 312
-#define CDP1864_SCANLINE_VBLANK_START CDP1864_TOTAL_SCANLINES - 4
-#define CDP1864_SCANLINE_VBLANK_END 20
-#define CDP1864_SCANLINE_VSYNC_START 0
-#define CDP1864_SCANLINE_VSYNC_END 4
-#define CDP1864_SCANLINE_DISPLAY_START 60 // ???
-#define CDP1864_SCANLINE_DISPLAY_END CDP1864_SCANLINE_DISPLAY_START + CDP1864_VISIBLE_LINES
-#define CDP1864_SCANLINE_INT_START CDP1864_SCANLINE_DISPLAY_START - 2
-#define CDP1864_SCANLINE_INT_END CDP1864_SCANLINE_DISPLAY_START
-#define CDP1864_SCANLINE_EFX_TOP_START CDP1864_SCANLINE_DISPLAY_START - 4
-#define CDP1864_SCANLINE_EFX_TOP_END CDP1864_SCANLINE_DISPLAY_START
-#define CDP1864_SCANLINE_EFX_BOTTOM_START CDP1864_SCANLINE_DISPLAY_END - 4
-#define CDP1864_SCANLINE_EFX_BOTTOM_END CDP1864_SCANLINE_DISPLAY_END
+#define CDP1864_SCANLINE_VBLANK_START CDP1864_TOTAL_SCANLINES - 4
+#define CDP1864_SCANLINE_VBLANK_END 20
+#define CDP1864_SCANLINE_VSYNC_START 0
+#define CDP1864_SCANLINE_VSYNC_END 4
+#define CDP1864_SCANLINE_DISPLAY_START 60 // ???
+#define CDP1864_SCANLINE_DISPLAY_END CDP1864_SCANLINE_DISPLAY_START + CDP1864_VISIBLE_LINES
+#define CDP1864_SCANLINE_INT_START CDP1864_SCANLINE_DISPLAY_START - 2
+#define CDP1864_SCANLINE_INT_END CDP1864_SCANLINE_DISPLAY_START
+#define CDP1864_SCANLINE_EFX_TOP_START CDP1864_SCANLINE_DISPLAY_START - 4
+#define CDP1864_SCANLINE_EFX_TOP_END CDP1864_SCANLINE_DISPLAY_START
+#define CDP1864_SCANLINE_EFX_BOTTOM_START CDP1864_SCANLINE_DISPLAY_END - 4
+#define CDP1864_SCANLINE_EFX_BOTTOM_END CDP1864_SCANLINE_DISPLAY_END
@@ -114,34 +114,34 @@ struct cdp1864_interface
const char *m_cpu_tag;
const char *m_screen_tag;
- devcb_read_line m_in_inlace_cb;
+ devcb_read_line m_in_inlace_cb;
- devcb_read_line m_in_rdata_cb;
- devcb_read_line m_in_bdata_cb;
- devcb_read_line m_in_gdata_cb;
+ devcb_read_line m_in_rdata_cb;
+ devcb_read_line m_in_bdata_cb;
+ devcb_read_line m_in_gdata_cb;
- devcb_write_line m_out_int_cb;
- devcb_write_line m_out_dmao_cb;
- devcb_write_line m_out_efx_cb;
- devcb_write_line m_out_hsync_cb;
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_dmao_cb;
+ devcb_write_line m_out_efx_cb;
+ devcb_write_line m_out_hsync_cb;
- double m_res_r; // red output resistor value
- double m_res_g; // green output resistor value
- double m_res_b; // blue output resistor value
- double m_res_bkg; // background output resistor value
+ double m_res_r; // red output resistor value
+ double m_res_g; // green output resistor value
+ double m_res_b; // blue output resistor value
+ double m_res_bkg; // background output resistor value
};
// ======================> cdp1864_device
-class cdp1864_device : public device_t,
+class cdp1864_device : public device_t,
public device_sound_interface,
- public cdp1864_interface
+ public cdp1864_interface
{
public:
- // construction/destruction
- cdp1864_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cdp1864_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER( dispon_r );
DECLARE_READ8_MEMBER( dispoff_r );
@@ -158,10 +158,10 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// internal callbacks
@@ -175,32 +175,32 @@ private:
static const device_timer_id TIMER_DMA = 2;
static const device_timer_id TIMER_HSYNC = 3;
- devcb_resolved_read_line m_in_inlace_func;
- devcb_resolved_read_line m_in_rdata_func;
- devcb_resolved_read_line m_in_bdata_func;
- devcb_resolved_read_line m_in_gdata_func;
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_write_line m_out_dmao_func;
- devcb_resolved_write_line m_out_efx_func;
- devcb_resolved_write_line m_out_hsync_func;
+ devcb_resolved_read_line m_in_inlace_func;
+ devcb_resolved_read_line m_in_rdata_func;
+ devcb_resolved_read_line m_in_bdata_func;
+ devcb_resolved_read_line m_in_gdata_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_dmao_func;
+ devcb_resolved_write_line m_out_efx_func;
+ devcb_resolved_write_line m_out_hsync_func;
cpu_device *m_cpu;
- screen_device *m_screen; // screen
- bitmap_rgb32 m_bitmap; // bitmap
- sound_stream *m_stream; // sound output
+ screen_device *m_screen; // screen
+ bitmap_rgb32 m_bitmap; // bitmap
+ sound_stream *m_stream; // sound output
// video state
rgb_t m_palette[16];
- int m_disp; // display on
- int m_dmaout; // DMA request active
- int m_bgcolor; // background color
- int m_con; // color on
+ int m_disp; // display on
+ int m_dmaout; // DMA request active
+ int m_bgcolor; // background color
+ int m_con; // color on
// sound state
- int m_aoe; // audio on
- int m_latch; // sound latch
- INT16 m_signal; // current signal
- int m_incr; // initial wave state
+ int m_aoe; // audio on
+ int m_latch; // sound latch
+ INT16 m_signal; // current signal
+ int m_incr; // initial wave state
// timers
emu_timer *m_int_timer;
diff --git a/src/emu/sound/cdp1869.c b/src/emu/sound/cdp1869.c
index c1915687f45..89ebe143ffd 100644
--- a/src/emu/sound/cdp1869.c
+++ b/src/emu/sound/cdp1869.c
@@ -28,15 +28,15 @@
#define LOG 0
-#define CDP1869_WEIGHT_RED 30 // % of max luminance
-#define CDP1869_WEIGHT_GREEN 59
-#define CDP1869_WEIGHT_BLUE 11
+#define CDP1869_WEIGHT_RED 30 // % of max luminance
+#define CDP1869_WEIGHT_GREEN 59
+#define CDP1869_WEIGHT_BLUE 11
-#define CDP1869_COLUMNS_HALF 20
-#define CDP1869_COLUMNS_FULL 40
-#define CDP1869_ROWS_HALF 12
-#define CDP1869_ROWS_FULL_PAL 25
-#define CDP1869_ROWS_FULL_NTSC 24
+#define CDP1869_COLUMNS_HALF 20
+#define CDP1869_COLUMNS_FULL 40
+#define CDP1869_ROWS_HALF 12
+#define CDP1869_ROWS_FULL_PAL 25
+#define CDP1869_ROWS_FULL_NTSC 24
enum
{
@@ -324,10 +324,10 @@ inline int cdp1869_device::get_pen(int ccb0, int ccb1, int pcb)
cdp1869_device::cdp1869_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, CDP1869, "RCA CDP1869", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- m_stream(NULL),
- m_space_config("pageram", ENDIANNESS_LITTLE, 8, 11, 0, NULL, *ADDRESS_MAP_NAME(cdp1869))
+ device_sound_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ m_stream(NULL),
+ m_space_config("pageram", ENDIANNESS_LITTLE, 8, 11, 0, NULL, *ADDRESS_MAP_NAME(cdp1869))
{
}
@@ -622,17 +622,17 @@ void cdp1869_device::draw_char(bitmap_rgb32 &bitmap, const rectangle &rect, int
WRITE8_MEMBER( cdp1869_device::out3_w )
{
/*
- bit description
-
- 0 bkg green
- 1 bkg blue
- 2 bkg red
- 3 cfc
- 4 disp off
- 5 colb0
- 6 colb1
- 7 fres horz
- */
+ bit description
+
+ 0 bkg green
+ 1 bkg blue
+ 2 bkg red
+ 3 cfc
+ 4 disp off
+ 5 colb0
+ 6 colb1
+ 7 fres horz
+ */
m_bkg = data & 0x07;
m_cfc = BIT(data, 3);
@@ -649,25 +649,25 @@ WRITE8_MEMBER( cdp1869_device::out3_w )
WRITE8_MEMBER( cdp1869_device::out4_w )
{
/*
- bit description
-
- 0 tone amp 2^0
- 1 tone amp 2^1
- 2 tone amp 2^2
- 3 tone amp 2^3
- 4 tone freq sel0
- 5 tone freq sel1
- 6 tone freq sel2
- 7 tone off
- 8 tone / 2^0
- 9 tone / 2^1
- 10 tone / 2^2
- 11 tone / 2^3
- 12 tone / 2^4
- 13 tone / 2^5
- 14 tone / 2^6
- 15 always 0
- */
+ bit description
+
+ 0 tone amp 2^0
+ 1 tone amp 2^1
+ 2 tone amp 2^2
+ 3 tone amp 2^3
+ 4 tone freq sel0
+ 5 tone freq sel1
+ 6 tone freq sel2
+ 7 tone off
+ 8 tone / 2^0
+ 9 tone / 2^1
+ 10 tone / 2^2
+ 11 tone / 2^3
+ 12 tone / 2^4
+ 13 tone / 2^5
+ 14 tone / 2^6
+ 15 always 0
+ */
m_toneamp = offset & 0x0f;
m_tonefreq = (offset & 0x70) >> 4;
@@ -685,25 +685,25 @@ WRITE8_MEMBER( cdp1869_device::out4_w )
WRITE8_MEMBER( cdp1869_device::out5_w )
{
/*
- bit description
-
- 0 cmem access mode
- 1 x
- 2 x
- 3 9-line
- 4 x
- 5 16 line hi-res
- 6 double page
- 7 fres vert
- 8 wn amp 2^0
- 9 wn amp 2^1
- 10 wn amp 2^2
- 11 wn amp 2^3
- 12 wn freq sel0
- 13 wn freq sel1
- 14 wn freq sel2
- 15 wn off
- */
+ bit description
+
+ 0 cmem access mode
+ 1 x
+ 2 x
+ 3 9-line
+ 4 x
+ 5 16 line hi-res
+ 6 double page
+ 7 fres vert
+ 8 wn amp 2^0
+ 9 wn amp 2^1
+ 10 wn amp 2^2
+ 11 wn amp 2^3
+ 12 wn freq sel0
+ 13 wn freq sel1
+ 14 wn freq sel2
+ 15 wn off
+ */
m_cmem = BIT(offset, 0);
m_line9 = BIT(offset, 3);
@@ -734,25 +734,25 @@ WRITE8_MEMBER( cdp1869_device::out5_w )
WRITE8_MEMBER( cdp1869_device::out6_w )
{
/*
- bit description
-
- 0 pma0 reg
- 1 pma1 reg
- 2 pma2 reg
- 3 pma3 reg
- 4 pma4 reg
- 5 pma5 reg
- 6 pma6 reg
- 7 pma7 reg
- 8 pma8 reg
- 9 pma9 reg
- 10 pma10 reg
- 11 x
- 12 x
- 13 x
- 14 x
- 15 x
- */
+ bit description
+
+ 0 pma0 reg
+ 1 pma1 reg
+ 2 pma2 reg
+ 3 pma3 reg
+ 4 pma4 reg
+ 5 pma5 reg
+ 6 pma6 reg
+ 7 pma7 reg
+ 8 pma8 reg
+ 9 pma9 reg
+ 10 pma10 reg
+ 11 x
+ 12 x
+ 13 x
+ 14 x
+ 15 x
+ */
m_pma = offset & 0x7ff;
}
@@ -765,25 +765,25 @@ WRITE8_MEMBER( cdp1869_device::out6_w )
WRITE8_MEMBER( cdp1869_device::out7_w )
{
/*
- bit description
-
- 0 x
- 1 x
- 2 hma2 reg
- 3 hma3 reg
- 4 hma4 reg
- 5 hma5 reg
- 6 hma6 reg
- 7 hma7 reg
- 8 hma8 reg
- 9 hma9 reg
- 10 hma10 reg
- 11 x
- 12 x
- 13 x
- 14 x
- 15 x
- */
+ bit description
+
+ 0 x
+ 1 x
+ 2 hma2 reg
+ 3 hma3 reg
+ 4 hma4 reg
+ 5 hma5 reg
+ 6 hma6 reg
+ 7 hma7 reg
+ 8 hma8 reg
+ 9 hma9 reg
+ 10 hma10 reg
+ 11 x
+ 12 x
+ 13 x
+ 14 x
+ 15 x
+ */
m_hma = offset & 0x7fc;
}
diff --git a/src/emu/sound/cdp1869.h b/src/emu/sound/cdp1869.h
index ed696be2376..843eee30b31 100644
--- a/src/emu/sound/cdp1869.h
+++ b/src/emu/sound/cdp1869.h
@@ -87,49 +87,49 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define CDP1869_DOT_CLK_PAL (float)XTAL_5_626MHz
-#define CDP1869_DOT_CLK_NTSC (float)XTAL_5_67MHz
-#define CDP1869_COLOR_CLK_PAL (float)XTAL_8_867236MHz
-#define CDP1869_COLOR_CLK_NTSC (float)XTAL_7_15909MHz
-
-#define CDP1869_CPU_CLK_PAL (CDP1869_DOT_CLK_PAL / 2)
-#define CDP1869_CPU_CLK_NTSC (CDP1869_DOT_CLK_NTSC / 2)
-
-#define CDP1869_CHAR_WIDTH 6
-
-#define CDP1869_HSYNC_START (56 * CDP1869_CHAR_WIDTH)
-#define CDP1869_HSYNC_END (60 * CDP1869_CHAR_WIDTH)
-#define CDP1869_HBLANK_START (54 * CDP1869_CHAR_WIDTH)
-#define CDP1869_HBLANK_END ( 5 * CDP1869_CHAR_WIDTH)
-#define CDP1869_SCREEN_START_PAL ( 9 * CDP1869_CHAR_WIDTH)
-#define CDP1869_SCREEN_START_NTSC (10 * CDP1869_CHAR_WIDTH)
-#define CDP1869_SCREEN_START (10 * CDP1869_CHAR_WIDTH)
-#define CDP1869_SCREEN_END (50 * CDP1869_CHAR_WIDTH)
-#define CDP1869_SCREEN_WIDTH (60 * CDP1869_CHAR_WIDTH)
-
-#define CDP1869_TOTAL_SCANLINES_PAL 312
-#define CDP1869_SCANLINE_VBLANK_START_PAL 304
-#define CDP1869_SCANLINE_VBLANK_END_PAL 10
-#define CDP1869_SCANLINE_VSYNC_START_PAL 308
-#define CDP1869_SCANLINE_VSYNC_END_PAL 312
-#define CDP1869_SCANLINE_DISPLAY_START_PAL 44
-#define CDP1869_SCANLINE_DISPLAY_END_PAL 260
-#define CDP1869_SCANLINE_PREDISPLAY_START_PAL 43
-#define CDP1869_SCANLINE_PREDISPLAY_END_PAL 260
-#define CDP1869_VISIBLE_SCANLINES_PAL (CDP1869_SCANLINE_DISPLAY_END_PAL - CDP1869_SCANLINE_DISPLAY_START_PAL)
-
-#define CDP1869_TOTAL_SCANLINES_NTSC 262
-#define CDP1869_SCANLINE_VBLANK_START_NTSC 252
-#define CDP1869_SCANLINE_VBLANK_END_NTSC 10
-#define CDP1869_SCANLINE_VSYNC_START_NTSC 258
-#define CDP1869_SCANLINE_VSYNC_END_NTSC 262
-#define CDP1869_SCANLINE_DISPLAY_START_NTSC 36
-#define CDP1869_SCANLINE_DISPLAY_END_NTSC 228
-#define CDP1869_SCANLINE_PREDISPLAY_START_NTSC 35
-#define CDP1869_SCANLINE_PREDISPLAY_END_NTSC 228
-#define CDP1869_VISIBLE_SCANLINES_NTSC (CDP1869_SCANLINE_DISPLAY_END_NTSC - CDP1869_SCANLINE_DISPLAY_START_NTSC)
-
-#define CDP1869_PALETTE_LENGTH 8+64
+#define CDP1869_DOT_CLK_PAL (float)XTAL_5_626MHz
+#define CDP1869_DOT_CLK_NTSC (float)XTAL_5_67MHz
+#define CDP1869_COLOR_CLK_PAL (float)XTAL_8_867236MHz
+#define CDP1869_COLOR_CLK_NTSC (float)XTAL_7_15909MHz
+
+#define CDP1869_CPU_CLK_PAL (CDP1869_DOT_CLK_PAL / 2)
+#define CDP1869_CPU_CLK_NTSC (CDP1869_DOT_CLK_NTSC / 2)
+
+#define CDP1869_CHAR_WIDTH 6
+
+#define CDP1869_HSYNC_START (56 * CDP1869_CHAR_WIDTH)
+#define CDP1869_HSYNC_END (60 * CDP1869_CHAR_WIDTH)
+#define CDP1869_HBLANK_START (54 * CDP1869_CHAR_WIDTH)
+#define CDP1869_HBLANK_END ( 5 * CDP1869_CHAR_WIDTH)
+#define CDP1869_SCREEN_START_PAL ( 9 * CDP1869_CHAR_WIDTH)
+#define CDP1869_SCREEN_START_NTSC (10 * CDP1869_CHAR_WIDTH)
+#define CDP1869_SCREEN_START (10 * CDP1869_CHAR_WIDTH)
+#define CDP1869_SCREEN_END (50 * CDP1869_CHAR_WIDTH)
+#define CDP1869_SCREEN_WIDTH (60 * CDP1869_CHAR_WIDTH)
+
+#define CDP1869_TOTAL_SCANLINES_PAL 312
+#define CDP1869_SCANLINE_VBLANK_START_PAL 304
+#define CDP1869_SCANLINE_VBLANK_END_PAL 10
+#define CDP1869_SCANLINE_VSYNC_START_PAL 308
+#define CDP1869_SCANLINE_VSYNC_END_PAL 312
+#define CDP1869_SCANLINE_DISPLAY_START_PAL 44
+#define CDP1869_SCANLINE_DISPLAY_END_PAL 260
+#define CDP1869_SCANLINE_PREDISPLAY_START_PAL 43
+#define CDP1869_SCANLINE_PREDISPLAY_END_PAL 260
+#define CDP1869_VISIBLE_SCANLINES_PAL (CDP1869_SCANLINE_DISPLAY_END_PAL - CDP1869_SCANLINE_DISPLAY_START_PAL)
+
+#define CDP1869_TOTAL_SCANLINES_NTSC 262
+#define CDP1869_SCANLINE_VBLANK_START_NTSC 252
+#define CDP1869_SCANLINE_VBLANK_END_NTSC 10
+#define CDP1869_SCANLINE_VSYNC_START_NTSC 258
+#define CDP1869_SCANLINE_VSYNC_END_NTSC 262
+#define CDP1869_SCANLINE_DISPLAY_START_NTSC 36
+#define CDP1869_SCANLINE_DISPLAY_END_NTSC 228
+#define CDP1869_SCANLINE_PREDISPLAY_START_NTSC 35
+#define CDP1869_SCANLINE_PREDISPLAY_END_NTSC 228
+#define CDP1869_VISIBLE_SCANLINES_NTSC (CDP1869_SCANLINE_DISPLAY_END_NTSC - CDP1869_SCANLINE_DISPLAY_START_NTSC)
+
+#define CDP1869_PALETTE_LENGTH 8+64
@@ -180,51 +180,51 @@ typedef int (*cdp1869_pcb_read_func)(device_t *device, UINT16 pma, UINT8 cma, UI
struct cdp1869_interface
{
- const char *screen_tag; // screen we are acting on
+ const char *screen_tag; // screen we are acting on
// pixel clock of the chip is the device clock
- int color_clock; // the chroma clock of the chip
+ int color_clock; // the chroma clock of the chip
// screen format
- devcb_read_line in_pal_ntsc_cb;
+ devcb_read_line in_pal_ntsc_cb;
// page memory color bit read function
- cdp1869_pcb_read_func in_pcb_cb;
+ cdp1869_pcb_read_func in_pcb_cb;
// character memory read function
- cdp1869_char_ram_read_func in_char_ram_cb;
+ cdp1869_char_ram_read_func in_char_ram_cb;
// character memory write function
- cdp1869_char_ram_write_func out_char_ram_cb;
+ cdp1869_char_ram_write_func out_char_ram_cb;
// if specified, this gets called for every change of the predisplay pin (CDP1870/76 pin 1)
- devcb_write_line out_prd_cb;
+ devcb_write_line out_prd_cb;
};
// ======================> cdp1869_device
-class cdp1869_device : public device_t,
+class cdp1869_device : public device_t,
public device_sound_interface,
public device_memory_interface,
- public cdp1869_interface
+ public cdp1869_interface
{
public:
- // construction/destruction
- cdp1869_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cdp1869_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE8_MEMBER( out3_w );
- DECLARE_WRITE8_MEMBER( out4_w );
- DECLARE_WRITE8_MEMBER( out5_w );
- DECLARE_WRITE8_MEMBER( out6_w );
- DECLARE_WRITE8_MEMBER( out7_w );
+ DECLARE_WRITE8_MEMBER( out4_w );
+ DECLARE_WRITE8_MEMBER( out5_w );
+ DECLARE_WRITE8_MEMBER( out6_w );
+ DECLARE_WRITE8_MEMBER( out7_w );
DECLARE_READ8_MEMBER( char_ram_r );
- DECLARE_WRITE8_MEMBER( char_ram_w );
+ DECLARE_WRITE8_MEMBER( char_ram_w );
DECLARE_READ8_MEMBER( page_ram_r );
- DECLARE_WRITE8_MEMBER( page_ram_w );
+ DECLARE_WRITE8_MEMBER( page_ram_w );
DECLARE_READ_LINE_MEMBER( predisplay_r );
DECLARE_READ_LINE_MEMBER( pal_ntsc_r );
@@ -232,9 +232,9 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
virtual void device_post_load();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@@ -262,11 +262,11 @@ protected:
void draw_char(bitmap_rgb32 &bitmap, const rectangle &rect, int x, int y, UINT16 pma);
private:
- devcb_resolved_read_line m_in_pal_ntsc_func;
- devcb_resolved_write_line m_out_prd_func;
- cdp1869_pcb_read_func m_in_pcb_func;
- cdp1869_char_ram_read_func m_in_char_ram_func;
- cdp1869_char_ram_write_func m_out_char_ram_func;
+ devcb_resolved_read_line m_in_pal_ntsc_func;
+ devcb_resolved_write_line m_out_prd_func;
+ cdp1869_pcb_read_func m_in_pcb_func;
+ cdp1869_char_ram_read_func m_in_char_ram_func;
+ cdp1869_char_ram_write_func m_out_char_ram_func;
screen_device *m_screen;
address_space *m_page_ram;
@@ -275,32 +275,32 @@ private:
// video state
rgb_t m_palette[8+64];
- int m_prd; // predisplay
- int m_dispoff; // display off
- int m_fresvert; // full resolution vertical
- int m_freshorz; // full resolution horizontal
- int m_cmem; // character memory access mode
- int m_dblpage; // double page mode
- int m_line16; // 16-line hi-res mode
- int m_line9; // 9 line mode
- int m_cfc; // color format control
- UINT8 m_col; // character color control
- UINT8 m_bkg; // background color
- UINT16 m_pma; // page memory address
- UINT16 m_hma; // home memory address
+ int m_prd; // predisplay
+ int m_dispoff; // display off
+ int m_fresvert; // full resolution vertical
+ int m_freshorz; // full resolution horizontal
+ int m_cmem; // character memory access mode
+ int m_dblpage; // double page mode
+ int m_line16; // 16-line hi-res mode
+ int m_line9; // 9 line mode
+ int m_cfc; // color format control
+ UINT8 m_col; // character color control
+ UINT8 m_bkg; // background color
+ UINT16 m_pma; // page memory address
+ UINT16 m_hma; // home memory address
// sound state
- INT16 m_signal; // current signal
- int m_incr; // initial wave state
- int m_toneoff; // tone off
- int m_wnoff; // white noise off
- UINT8 m_tonediv; // tone divisor
- UINT8 m_tonefreq; // tone range select
- UINT8 m_toneamp; // tone output amplitude
- UINT8 m_wnfreq; // white noise range select
- UINT8 m_wnamp; // white noise output amplitude
-
- const address_space_config m_space_config;
+ INT16 m_signal; // current signal
+ int m_incr; // initial wave state
+ int m_toneoff; // tone off
+ int m_wnoff; // white noise off
+ UINT8 m_tonediv; // tone divisor
+ UINT8 m_tonefreq; // tone range select
+ UINT8 m_toneamp; // tone output amplitude
+ UINT8 m_wnfreq; // white noise range select
+ UINT8 m_wnamp; // white noise output amplitude
+
+ const address_space_config m_space_config;
};
diff --git a/src/emu/sound/cem3394.c b/src/emu/sound/cem3394.c
index 880400f2da6..98604503ca6 100644
--- a/src/emu/sound/cem3394.c
+++ b/src/emu/sound/cem3394.c
@@ -17,10 +17,10 @@
/* waveform generation parameters */
-#define ENABLE_PULSE 1
-#define ENABLE_TRIANGLE 1
-#define ENABLE_SAWTOOTH 1
-#define ENABLE_EXTERNAL 1
+#define ENABLE_PULSE 1
+#define ENABLE_TRIANGLE 1
+#define ENABLE_SAWTOOTH 1
+#define ENABLE_EXTERNAL 1
/* pulse shaping parameters */
@@ -30,9 +30,9 @@
/* snake pit - bonus counter at the end of level */
/* snacks'n jaxson - laugh at end of level is too soft if minimum width is too small */
-#define LIMIT_WIDTH 1
-#define MINIMUM_WIDTH 0.25
-#define MAXIMUM_WIDTH 0.75
+#define LIMIT_WIDTH 1
+#define MINIMUM_WIDTH 0.25
+#define MAXIMUM_WIDTH 0.75
/********************************************************************************
@@ -90,42 +90,42 @@
/* various waveforms */
-#define WAVE_TRIANGLE 1
-#define WAVE_SAWTOOTH 2
-#define WAVE_PULSE 4
+#define WAVE_TRIANGLE 1
+#define WAVE_SAWTOOTH 2
+#define WAVE_PULSE 4
/* keep lots of fractional bits */
-#define FRACTION_BITS 28
-#define FRACTION_ONE (1 << FRACTION_BITS)
-#define FRACTION_ONE_D ((double)(1 << FRACTION_BITS))
-#define FRACTION_MASK (FRACTION_ONE - 1)
-#define FRACTION_MULT(a,b) (((a) >> (FRACTION_BITS / 2)) * ((b) >> (FRACTION_BITS - FRACTION_BITS / 2)))
+#define FRACTION_BITS 28
+#define FRACTION_ONE (1 << FRACTION_BITS)
+#define FRACTION_ONE_D ((double)(1 << FRACTION_BITS))
+#define FRACTION_MASK (FRACTION_ONE - 1)
+#define FRACTION_MULT(a,b) (((a) >> (FRACTION_BITS / 2)) * ((b) >> (FRACTION_BITS - FRACTION_BITS / 2)))
/* this structure defines the parameters for a channel */
struct cem3394_state
{
- sound_stream * stream; /* our stream */
+ sound_stream * stream; /* our stream */
void (*external)(device_t *, int, short *);/* callback to generate external samples */
- double vco_zero_freq; /* frequency of VCO at 0.0V */
- double filter_zero_freq; /* frequency of filter at 0.0V */
+ double vco_zero_freq; /* frequency of VCO at 0.0V */
+ double filter_zero_freq; /* frequency of filter at 0.0V */
- double values[8]; /* raw values of registers */
- UINT8 wave_select; /* flags which waveforms are enabled */
+ double values[8]; /* raw values of registers */
+ UINT8 wave_select; /* flags which waveforms are enabled */
- UINT32 volume; /* linear overall volume (0-256) */
- UINT32 mixer_internal; /* linear internal volume (0-256) */
- UINT32 mixer_external; /* linear external volume (0-256) */
+ UINT32 volume; /* linear overall volume (0-256) */
+ UINT32 mixer_internal; /* linear internal volume (0-256) */
+ UINT32 mixer_external; /* linear external volume (0-256) */
- UINT32 position; /* current VCO frequency position (0.FRACTION_BITS) */
- UINT32 step; /* per-sample VCO step (0.FRACTION_BITS) */
+ UINT32 position; /* current VCO frequency position (0.FRACTION_BITS) */
+ UINT32 step; /* per-sample VCO step (0.FRACTION_BITS) */
- UINT32 filter_position; /* current filter frequency position (0.FRACTION_BITS) */
- UINT32 filter_step; /* per-sample filter step (0.FRACTION_BITS) */
- UINT32 modulation_depth; /* fraction of total by which we modulate (0.FRACTION_BITS) */
- INT16 last_ext; /* last external sample we read */
+ UINT32 filter_position; /* current filter frequency position (0.FRACTION_BITS) */
+ UINT32 filter_step; /* per-sample filter step (0.FRACTION_BITS) */
+ UINT32 modulation_depth; /* fraction of total by which we modulate (0.FRACTION_BITS) */
+ INT16 last_ext; /* last external sample we read */
- UINT32 pulse_width; /* fractional pulse width (0.FRACTION_BITS) */
+ UINT32 pulse_width; /* fractional pulse width (0.FRACTION_BITS) */
double inv_sample_rate;
int sample_rate;
@@ -187,7 +187,7 @@ static STREAM_UPDATE( cem3394_update )
depth >>= 13;
/* "apply" the filter: note this is pretty cheesy; it basically just downsamples the
- external sample to filter_freq by allowing only 2 transitions for every cycle */
+ external sample to filter_freq by allowing only 2 transitions for every cycle */
for (i = 0, ext = chip->external_buffer, position = chip->position; i < samples; i++, ext++)
{
UINT32 newposition;
@@ -560,7 +560,7 @@ const device_type CEM3394 = &device_creator<cem3394_device>;
cem3394_device::cem3394_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, CEM3394, "CEM3394", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(cem3394_state);
}
@@ -593,5 +593,3 @@ void cem3394_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/cem3394.h b/src/emu/sound/cem3394.h
index 985dcb743cb..a750a7b042a 100644
--- a/src/emu/sound/cem3394.h
+++ b/src/emu/sound/cem3394.h
@@ -6,14 +6,14 @@
#include "devlegcy.h"
-#define CEM3394_SAMPLE_RATE (44100*4)
+#define CEM3394_SAMPLE_RATE (44100*4)
/* interface */
struct cem3394_interface
{
- double vco_zero_freq; /* frequency at 0V for VCO */
- double filter_zero_freq; /* frequency at 0V for filter */
+ double vco_zero_freq; /* frequency at 0V for VCO */
+ double filter_zero_freq; /* frequency at 0V for filter */
void (*external)(device_t *, int, short *);/* external input source */
};
@@ -45,7 +45,7 @@ void cem3394_set_voltage(device_t *device, int input, double voltage);
double cem3394_get_parameter(device_t *device, int input);
class cem3394_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
cem3394_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/dac.c b/src/emu/sound/dac.c
index 887676ac9c4..c0e62ac5185 100644
--- a/src/emu/sound/dac.c
+++ b/src/emu/sound/dac.c
@@ -55,9 +55,9 @@ const device_type DAC = &device_creator<dac_device>;
dac_device::dac_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, DAC, "DAC", "dac", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_stream(NULL),
- m_output(0)
+ device_sound_interface(mconfig, *this),
+ m_stream(NULL),
+ m_output(0)
{
}
diff --git a/src/emu/sound/dac.h b/src/emu/sound/dac.h
index 15bfb4b4ec0..fdafa4eaa9f 100644
--- a/src/emu/sound/dac.h
+++ b/src/emu/sound/dac.h
@@ -58,7 +58,7 @@
// ======================> dac_device
class dac_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
// default to 4x oversampling
static const UINT32 DEFAULT_SAMPLE_RATE = 48000 * 4;
@@ -70,10 +70,10 @@ public:
// public interface
INT16 output() const { return m_output; }
void write(INT16 data) { m_stream->update(); m_output = data; }
- void write_unsigned8(UINT8 data) { write(data * 32767 / 255); } // 0..255, mapped to 0..32767
- void write_signed8(UINT8 data) { write((data - 0x80) * 32767 / 128); } // 0..255, mapped to -32767..32767
- void write_unsigned16(UINT16 data) { write(data / 2); } // 0..65535, mapped to 0..32767
- void write_signed16(UINT16 data) { write(data - 0x8000); } // 0..65535, mapped to -32768..32767
+ void write_unsigned8(UINT8 data) { write(data * 32767 / 255); } // 0..255, mapped to 0..32767
+ void write_signed8(UINT8 data) { write((data - 0x80) * 32767 / 128); } // 0..255, mapped to -32767..32767
+ void write_unsigned16(UINT16 data) { write(data / 2); } // 0..65535, mapped to 0..32767
+ void write_signed16(UINT16 data) { write(data - 0x8000); } // 0..65535, mapped to -32768..32767
// wrappers
DECLARE_WRITE8_MEMBER( write_unsigned8 );
@@ -88,8 +88,8 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
// internal state
- sound_stream * m_stream;
- INT16 m_output;
+ sound_stream * m_stream;
+ INT16 m_output;
};
diff --git a/src/emu/sound/digitalk.c b/src/emu/sound/digitalk.c
index eddca381229..13b8ad24d7f 100644
--- a/src/emu/sound/digitalk.c
+++ b/src/emu/sound/digitalk.c
@@ -694,7 +694,7 @@ const device_type DIGITALKER = &device_creator<digitalker_device>;
digitalker_device::digitalker_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, DIGITALKER, "Digitalker", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(digitalker);
}
@@ -727,5 +727,3 @@ void digitalker_device::sound_stream_update(sound_stream &stream, stream_sample_
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/digitalk.h b/src/emu/sound/digitalk.h
index add7f3428fe..b8373355cb0 100644
--- a/src/emu/sound/digitalk.h
+++ b/src/emu/sound/digitalk.h
@@ -10,7 +10,7 @@ int digitalker_0_intr_r(device_t *device);
DECLARE_WRITE8_DEVICE_HANDLER(digitalker_data_w);
class digitalker_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
digitalker_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/disc_cls.h b/src/emu/sound/disc_cls.h
index bbdad7b3391..58b643e579f 100644
--- a/src/emu/sound/disc_cls.h
+++ b/src/emu/sound/disc_cls.h
@@ -21,66 +21,66 @@
#define DISCRETE_CLASS_NAME(_name) discrete_ ## _name ## _node
-#define DISCRETE_CLASS_INPUT(_name, _num) inline double _name (void) { return *(m_input[_num]); }
+#define DISCRETE_CLASS_INPUT(_name, _num) inline double _name (void) { return *(m_input[_num]); }
-#define DISCRETE_CLASS_CONSTRUCTOR(_name, _base) \
- public: \
- DISCRETE_CLASS_NAME(_name)() \
- : DISCRETE_CLASS_NAME(_base)() { }
+#define DISCRETE_CLASS_CONSTRUCTOR(_name, _base) \
+ public: \
+ DISCRETE_CLASS_NAME(_name)() \
+ : DISCRETE_CLASS_NAME(_base)() { }
-#define DISCRETE_CLASS_DESTRUCTOR(_name) \
- public: \
+#define DISCRETE_CLASS_DESTRUCTOR(_name) \
+ public: \
virtual ~ DISCRETE_CLASS_NAME(_name)(void) { }
-#define DISCRETE_CLASS_STEP_RESET(_name, _maxout, _priv) \
-class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
-{ \
- DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
- DISCRETE_CLASS_DESTRUCTOR(_name) \
-public: \
- void step(void); \
- void reset(void); \
- int max_output(void) { return _maxout; } \
-private: \
- _priv \
+#define DISCRETE_CLASS_STEP_RESET(_name, _maxout, _priv) \
+class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
+{ \
+ DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
+ DISCRETE_CLASS_DESTRUCTOR(_name) \
+public: \
+ void step(void); \
+ void reset(void); \
+ int max_output(void) { return _maxout; } \
+private: \
+ _priv \
}
-#define DISCRETE_CLASS_STEP(_name, _maxout, _priv) \
-class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
-{ \
- DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
- DISCRETE_CLASS_DESTRUCTOR(_name) \
-public: \
- void step(void); \
- void reset(void) { this->step(); } \
- int max_output(void) { return _maxout; } \
-private: \
- _priv \
+#define DISCRETE_CLASS_STEP(_name, _maxout, _priv) \
+class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
+{ \
+ DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
+ DISCRETE_CLASS_DESTRUCTOR(_name) \
+public: \
+ void step(void); \
+ void reset(void) { this->step(); } \
+ int max_output(void) { return _maxout; } \
+private: \
+ _priv \
}
-#define DISCRETE_CLASS_RESET(_name, _maxout) \
-class DISCRETE_CLASS_NAME(_name): public discrete_base_node \
-{ \
- DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
- DISCRETE_CLASS_DESTRUCTOR(_name) \
-public: \
- void reset(void); \
- int max_output(void) { return _maxout; } \
+#define DISCRETE_CLASS_RESET(_name, _maxout) \
+class DISCRETE_CLASS_NAME(_name): public discrete_base_node \
+{ \
+ DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
+ DISCRETE_CLASS_DESTRUCTOR(_name) \
+public: \
+ void reset(void); \
+ int max_output(void) { return _maxout; } \
}
-#define DISCRETE_CLASS(_name, _maxout, _priv) \
-class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
-{ \
- DISCRETE_CLASS_DESTRUCTOR(_name) \
- DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
-public: \
- void step(void); \
- void reset(void); \
- void start(void); \
- void stop(void); \
- int max_output(void) { return _maxout; } \
-private: \
- _priv \
+#define DISCRETE_CLASS(_name, _maxout, _priv) \
+class DISCRETE_CLASS_NAME(_name): public discrete_base_node, public discrete_step_interface \
+{ \
+ DISCRETE_CLASS_DESTRUCTOR(_name) \
+ DISCRETE_CLASS_CONSTRUCTOR(_name, base) \
+public: \
+ void step(void); \
+ void reset(void); \
+ void start(void); \
+ void stop(void); \
+ int max_output(void) { return _maxout; } \
+private: \
+ _priv \
}
class DISCRETE_CLASS_NAME(special): public discrete_base_node
@@ -105,7 +105,7 @@ public:
*
*************************************/
-class DISCRETE_CLASS_NAME(dso_output): public discrete_base_node,
+class DISCRETE_CLASS_NAME(dso_output): public discrete_base_node,
public discrete_sound_output_interface,
public discrete_step_interface
{
@@ -121,7 +121,7 @@ public:
int max_output(void) { return 0; }
void set_output_ptr(stream_sample_t *ptr) { m_ptr = ptr; }
private:
- stream_sample_t *m_ptr;
+ stream_sample_t *m_ptr;
};
DISCRETE_CLASS(dso_csvlog, 0,
@@ -150,11 +150,11 @@ public:
void reset(void);
private:
ioport_port *m_port;
- INT32 m_lastpval;
- INT32 m_pmin;
- double m_pscale;
- double m_min;
- double m_scale;
+ INT32 m_lastpval;
+ INT32 m_pmin;
+ double m_pscale;
+ double m_min;
+ double m_scale;
};
DISCRETE_CLASS_RESET(dss_constant, 1);
@@ -167,9 +167,9 @@ public:
void reset(void);
void input_write(int sub_node, UINT8 data );
private:
- double m_gain; /* node gain */
- double m_offset; /* node offset */
- UINT8 m_data; /* data written */
+ double m_gain; /* node gain */
+ double m_offset; /* node offset */
+ UINT8 m_data; /* data written */
};
class DISCRETE_CLASS_NAME(dss_input_logic): public discrete_base_node, public discrete_input_interface
@@ -180,9 +180,9 @@ public:
void reset(void);
void input_write(int sub_node, UINT8 data );
private:
- double m_gain; /* node gain */
- double m_offset; /* node offset */
- UINT8 m_data; /* data written */
+ double m_gain; /* node gain */
+ double m_offset; /* node offset */
+ UINT8 m_data; /* data written */
};
class DISCRETE_CLASS_NAME(dss_input_not): public discrete_base_node, public discrete_input_interface
@@ -193,9 +193,9 @@ public:
void reset(void);
void input_write(int sub_node, UINT8 data );
private:
- double m_gain; /* node gain */
- double m_offset; /* node offset */
- UINT8 m_data; /* data written */
+ double m_gain; /* node gain */
+ double m_offset; /* node offset */
+ UINT8 m_data; /* data written */
};
class DISCRETE_CLASS_NAME(dss_input_pulse): public discrete_base_node, public discrete_input_interface, public discrete_step_interface
@@ -207,9 +207,9 @@ public:
void reset(void);
void input_write(int sub_node, UINT8 data );
private:
- double m_gain; /* node gain */
- double m_offset; /* node offset */
- UINT8 m_data; /* data written */
+ double m_gain; /* node gain */
+ double m_offset; /* node offset */
+ UINT8 m_data; /* data written */
};
class DISCRETE_CLASS_NAME(dss_input_stream): public discrete_base_node, public discrete_input_interface, public discrete_step_interface
@@ -227,18 +227,18 @@ public:
void stream_start(void);
//protected:
- UINT32 m_stream_in_number;
- stream_sample_t *m_ptr; /* current in ptr for stream */
+ UINT32 m_stream_in_number;
+ stream_sample_t *m_ptr; /* current in ptr for stream */
private:
static STREAM_UPDATE( static_stream_generate );
void stream_generate(stream_sample_t **inputs, stream_sample_t **outputs, int samples);
- double m_gain; /* node gain */
- double m_offset; /* node offset */
- UINT8 m_data; /* data written */
- UINT8 m_is_buffered;
+ double m_gain; /* node gain */
+ double m_offset; /* node offset */
+ UINT8 m_data; /* data written */
+ UINT8 m_is_buffered;
/* the buffer stream */
- sound_stream *m_buffer_stream;
+ sound_stream *m_buffer_stream;
};
class DISCRETE_CLASS_NAME(dss_input_buffer): public DISCRETE_CLASS_NAME(dss_input_stream)
diff --git a/src/emu/sound/disc_dev.c b/src/emu/sound/disc_dev.c
index a2bdb054889..4276e3cfd64 100644
--- a/src/emu/sound/disc_dev.c
+++ b/src/emu/sound/disc_dev.c
@@ -24,7 +24,7 @@
*
************************************************************************/
-#define DEFAULT_555_BLEED_R RES_M(10)
+#define DEFAULT_555_BLEED_R RES_M(10)
/************************************************************************
*
@@ -40,39 +40,39 @@
*
* Jan 2004, D Renaud.
************************************************************************/
-#define DSD_555_ASTBL__RESET (! DISCRETE_INPUT(0))
-#define DSD_555_ASTBL__R1 DISCRETE_INPUT(1)
-#define DSD_555_ASTBL__R2 DISCRETE_INPUT(2)
-#define DSD_555_ASTBL__C DISCRETE_INPUT(3)
-#define DSD_555_ASTBL__CTRLV DISCRETE_INPUT(4)
+#define DSD_555_ASTBL__RESET (! DISCRETE_INPUT(0))
+#define DSD_555_ASTBL__R1 DISCRETE_INPUT(1)
+#define DSD_555_ASTBL__R2 DISCRETE_INPUT(2)
+#define DSD_555_ASTBL__C DISCRETE_INPUT(3)
+#define DSD_555_ASTBL__CTRLV DISCRETE_INPUT(4)
/* bit mask of the above RC inputs */
-#define DSD_555_ASTBL_RC_MASK 0x0e
+#define DSD_555_ASTBL_RC_MASK 0x0e
/* charge/discharge constants */
-#define DSD_555_ASTBL_T_RC_BLEED (DEFAULT_555_BLEED_R * DSD_555_ASTBL__C)
+#define DSD_555_ASTBL_T_RC_BLEED (DEFAULT_555_BLEED_R * DSD_555_ASTBL__C)
/* Use quick charge if specified. */
-#define DSD_555_ASTBL_T_RC_CHARGE ((DSD_555_ASTBL__R1 + ((info->options & DISC_555_ASTABLE_HAS_FAST_CHARGE_DIODE) ? 0 : DSD_555_ASTBL__R2)) * DSD_555_ASTBL__C)
-#define DSD_555_ASTBL_T_RC_DISCHARGE (DSD_555_ASTBL__R2 * DSD_555_ASTBL__C)
+#define DSD_555_ASTBL_T_RC_CHARGE ((DSD_555_ASTBL__R1 + ((info->options & DISC_555_ASTABLE_HAS_FAST_CHARGE_DIODE) ? 0 : DSD_555_ASTBL__R2)) * DSD_555_ASTBL__C)
+#define DSD_555_ASTBL_T_RC_DISCHARGE (DSD_555_ASTBL__R2 * DSD_555_ASTBL__C)
DISCRETE_STEP(dsd_555_astbl)
{
DISCRETE_DECLARE_INFO(discrete_555_desc)
- int count_f = 0;
- int count_r = 0;
- double dt; /* change in time */
- double x_time = 0; /* time since change happened */
- double v_cap = m_cap_voltage; /* Current voltage on capacitor, before dt */
- double v_cap_next = 0; /* Voltage on capacitor, after dt */
- double v_charge, exponent = 0;
- UINT8 flip_flop = m_flip_flop;
- UINT8 update_exponent = 0;
- double v_out = 0.0;
+ int count_f = 0;
+ int count_r = 0;
+ double dt; /* change in time */
+ double x_time = 0; /* time since change happened */
+ double v_cap = m_cap_voltage; /* Current voltage on capacitor, before dt */
+ double v_cap_next = 0; /* Voltage on capacitor, after dt */
+ double v_charge, exponent = 0;
+ UINT8 flip_flop = m_flip_flop;
+ UINT8 update_exponent = 0;
+ double v_out = 0.0;
/* put commonly used stuff in local variables for speed */
- double threshold = m_threshold;
- double trigger = m_trigger;
+ double threshold = m_threshold;
+ double trigger = m_trigger;
if(DSD_555_ASTBL__RESET)
{
@@ -87,7 +87,7 @@ DISCRETE_STEP(dsd_555_astbl)
if (m_use_ctrlv)
{
/* If CV is less then .25V, the circuit will oscillate way out of range.
- * So we will just ignore it when it happens. */
+ * So we will just ignore it when it happens. */
if (DSD_555_ASTBL__CTRLV < .25) return;
/* If it is a node then calculate thresholds based on Control Voltage */
threshold = DSD_555_ASTBL__CTRLV;
@@ -117,28 +117,28 @@ DISCRETE_STEP(dsd_555_astbl)
/* Calculate future capacitor voltage.
- * ref@ http://www.physics.rutgers.edu/ugrad/205/capacitance.html
- * The formulas from the ref pages have been modified to reflect that we are stepping the change.
- * dt = time of sample (1/sample frequency)
- * VC = Voltage across capacitor
- * VC' = Future voltage across capacitor
- * Vc = Voltage change
- * Vr = is the voltage across the resistor. For charging it is Vcc - VC. Discharging it is VC - 0.
- * R = R1+R2 (for charging) R = R2 for discharging.
- * Vc = Vr*(1-exp(-dt/(R*C)))
- * VC' = VC + Vc (for charging) VC' = VC - Vc for discharging.
- *
- * We will also need to calculate the amount of time we overshoot the thresholds
- * dt = amount of time we overshot
- * Vc = voltage change overshoot
- * dt = R*C(log(1/(1-(Vc/Vr))))
- */
+ * ref@ http://www.physics.rutgers.edu/ugrad/205/capacitance.html
+ * The formulas from the ref pages have been modified to reflect that we are stepping the change.
+ * dt = time of sample (1/sample frequency)
+ * VC = Voltage across capacitor
+ * VC' = Future voltage across capacitor
+ * Vc = Voltage change
+ * Vr = is the voltage across the resistor. For charging it is Vcc - VC. Discharging it is VC - 0.
+ * R = R1+R2 (for charging) R = R2 for discharging.
+ * Vc = Vr*(1-exp(-dt/(R*C)))
+ * VC' = VC + Vc (for charging) VC' = VC - Vc for discharging.
+ *
+ * We will also need to calculate the amount of time we overshoot the thresholds
+ * dt = amount of time we overshot
+ * Vc = voltage change overshoot
+ * dt = R*C(log(1/(1-(Vc/Vr))))
+ */
dt = this->sample_time();
/* Sometimes a switching network is used to setup the capacitance.
- * These may select no capacitor, causing oscillation to stop.
- */
+ * These may select no capacitor, causing oscillation to stop.
+ */
if (DSD_555_ASTBL__C == 0)
{
flip_flop = 1;
@@ -353,20 +353,20 @@ DISCRETE_RESET(dsd_555_astbl)
*
* Oct 2004, D Renaud.
************************************************************************/
-#define DSD_555_MSTBL__RESET (! DISCRETE_INPUT(0))
-#define DSD_555_MSTBL__TRIGGER DISCRETE_INPUT(1)
-#define DSD_555_MSTBL__R DISCRETE_INPUT(2)
-#define DSD_555_MSTBL__C DISCRETE_INPUT(3)
+#define DSD_555_MSTBL__RESET (! DISCRETE_INPUT(0))
+#define DSD_555_MSTBL__TRIGGER DISCRETE_INPUT(1)
+#define DSD_555_MSTBL__R DISCRETE_INPUT(2)
+#define DSD_555_MSTBL__C DISCRETE_INPUT(3)
/* bit mask of the above RC inputs */
-#define DSD_555_MSTBL_RC_MASK 0x0c
+#define DSD_555_MSTBL_RC_MASK 0x0c
DISCRETE_STEP(dsd_555_mstbl)
{
DISCRETE_DECLARE_INFO(discrete_555_desc)
- double v_cap; /* Current voltage on capacitor, before dt */
- double x_time = 0; /* time since change happened */
+ double v_cap; /* Current voltage on capacitor, before dt */
+ double x_time = 0; /* time since change happened */
double dt, exponent;
double out = 0;
int trigger = 0;
@@ -426,13 +426,13 @@ DISCRETE_STEP(dsd_555_mstbl)
if (flip_flop)
{
/* Sometimes a switching network is used to setup the capacitance.
- * These may select 'no' capacitor, causing oscillation to stop.
- */
+ * These may select 'no' capacitor, causing oscillation to stop.
+ */
if (UNEXPECTED(DSD_555_MSTBL__C == 0))
{
/* The trigger voltage goes high because the cap circuit is open.
- * and the cap discharges */
- v_cap = info->v_pos; /* needed for cap output type */
+ * and the cap discharges */
+ v_cap = info->v_pos; /* needed for cap output type */
m_cap_voltage = 0;
if (!trigger)
@@ -454,7 +454,7 @@ DISCRETE_STEP(dsd_555_mstbl)
/* Has it charged past upper limit? */
/* If trigger is still enabled, then we keep charging,
- * regardless of threshold. */
+ * regardless of threshold. */
if (UNEXPECTED((v_cap >= m_threshold) && !trigger))
{
dt = DSD_555_MSTBL__R * DSD_555_MSTBL__C * log(1.0 / (1.0 - ((v_cap - m_threshold) / v_diff)));
@@ -557,47 +557,47 @@ DISCRETE_RESET(dsd_555_mstbl)
*
* Mar 2004, D Renaud.
************************************************************************/
-#define DSD_555_CC__RESET (! DISCRETE_INPUT(0))
-#define DSD_555_CC__VIN DISCRETE_INPUT(1)
-#define DSD_555_CC__R DISCRETE_INPUT(2)
-#define DSD_555_CC__C DISCRETE_INPUT(3)
-#define DSD_555_CC__RBIAS DISCRETE_INPUT(4)
-#define DSD_555_CC__RGND DISCRETE_INPUT(5)
-#define DSD_555_CC__RDIS DISCRETE_INPUT(6)
+#define DSD_555_CC__RESET (! DISCRETE_INPUT(0))
+#define DSD_555_CC__VIN DISCRETE_INPUT(1)
+#define DSD_555_CC__R DISCRETE_INPUT(2)
+#define DSD_555_CC__C DISCRETE_INPUT(3)
+#define DSD_555_CC__RBIAS DISCRETE_INPUT(4)
+#define DSD_555_CC__RGND DISCRETE_INPUT(5)
+#define DSD_555_CC__RDIS DISCRETE_INPUT(6)
/* bit mask of the above RC inputs not including DSD_555_CC__R */
-#define DSD_555_CC_RC_MASK 0x78
+#define DSD_555_CC_RC_MASK 0x78
/* charge/discharge constants */
-#define DSD_555_CC_T_RC_BLEED (DEFAULT_555_BLEED_R * DSD_555_CC__C)
-#define DSD_555_CC_T_RC_DISCHARGE_01 (DSD_555_CC__RDIS * DSD_555_CC__C)
-#define DSD_555_CC_T_RC_DISCHARGE_NO_I (DSD_555_CC__RGND * DSD_555_CC__C)
-#define DSD_555_CC_T_RC_CHARGE (r_charge * DSD_555_CC__C)
-#define DSD_555_CC_T_RC_DISCHARGE (r_discharge * DSD_555_CC__C)
+#define DSD_555_CC_T_RC_BLEED (DEFAULT_555_BLEED_R * DSD_555_CC__C)
+#define DSD_555_CC_T_RC_DISCHARGE_01 (DSD_555_CC__RDIS * DSD_555_CC__C)
+#define DSD_555_CC_T_RC_DISCHARGE_NO_I (DSD_555_CC__RGND * DSD_555_CC__C)
+#define DSD_555_CC_T_RC_CHARGE (r_charge * DSD_555_CC__C)
+#define DSD_555_CC_T_RC_DISCHARGE (r_discharge * DSD_555_CC__C)
DISCRETE_STEP(dsd_555_cc)
{
DISCRETE_DECLARE_INFO(discrete_555_cc_desc)
- int count_f = 0;
- int count_r = 0;
- double i; /* Charging current created by vIn */
- double r_charge = 0; /* Equivalent charging resistor */
- double r_discharge = 0; /* Equivalent discharging resistor */
- double vi = 0; /* Equivalent voltage from current source */
- double v_bias = 0; /* Equivalent voltage from bias voltage */
- double v = 0; /* Equivalent voltage total from current source and bias circuit if used */
- double dt; /* change in time */
- double x_time = 0; /* time since change happened */
- double t_rc ; /* RC time constant */
- double v_cap; /* Current voltage on capacitor, before dt */
- double v_cap_next = 0; /* Voltage on capacitor, after dt */
- double v_vcharge_limit; /* vIn and the junction voltage limit the max charging voltage from i */
- double r_temp; /* play thing */
- double exponent;
- UINT8 update_exponent, update_t_rc;
- UINT8 flip_flop = m_flip_flop;
+ int count_f = 0;
+ int count_r = 0;
+ double i; /* Charging current created by vIn */
+ double r_charge = 0; /* Equivalent charging resistor */
+ double r_discharge = 0; /* Equivalent discharging resistor */
+ double vi = 0; /* Equivalent voltage from current source */
+ double v_bias = 0; /* Equivalent voltage from bias voltage */
+ double v = 0; /* Equivalent voltage total from current source and bias circuit if used */
+ double dt; /* change in time */
+ double x_time = 0; /* time since change happened */
+ double t_rc ; /* RC time constant */
+ double v_cap; /* Current voltage on capacitor, before dt */
+ double v_cap_next = 0; /* Voltage on capacitor, after dt */
+ double v_vcharge_limit; /* vIn and the junction voltage limit the max charging voltage from i */
+ double r_temp; /* play thing */
+ double exponent;
+ UINT8 update_exponent, update_t_rc;
+ UINT8 flip_flop = m_flip_flop;
double v_out = 0;
@@ -611,9 +611,9 @@ DISCRETE_STEP(dsd_555_cc)
return;
}
- dt = this->sample_time(); /* Change in time */
- v_cap = m_cap_voltage; /* Set to voltage before change */
- v_vcharge_limit = DSD_555_CC__VIN + info->v_cc_junction; /* the max v_cap can be and still be charged by i */
+ dt = this->sample_time(); /* Change in time */
+ v_cap = m_cap_voltage; /* Set to voltage before change */
+ v_vcharge_limit = DSD_555_CC__VIN + info->v_cc_junction; /* the max v_cap can be and still be charged by i */
/* Calculate charging current */
i = (m_v_cc_source - v_vcharge_limit) / DSD_555_CC__R;
if ( i < 0) i = 0;
@@ -624,7 +624,7 @@ DISCRETE_STEP(dsd_555_cc)
}
else
{
- switch (m_type) /* see dsd_555_cc_reset for descriptions */
+ switch (m_type) /* see dsd_555_cc_reset for descriptions */
{
case 1:
r_discharge = DSD_555_CC__RDIS;
@@ -656,7 +656,7 @@ DISCRETE_STEP(dsd_555_cc)
r_temp = DSD_555_CC__RBIAS + DSD_555_CC__RDIS;
r_charge = RES_2_PARALLEL(r_temp, DSD_555_CC__RGND);
r_temp += DSD_555_CC__RGND;
- r_temp = DSD_555_CC__RGND / r_temp; /* now has voltage divider ratio, not resistance */
+ r_temp = DSD_555_CC__RGND / r_temp; /* now has voltage divider ratio, not resistance */
vi = i * DSD_555_CC__RBIAS * r_temp;
v_bias = info->v_pos * r_temp;
r_discharge = RES_2_PARALLEL(DSD_555_CC__RGND, DSD_555_CC__RDIS);
@@ -677,8 +677,8 @@ DISCRETE_STEP(dsd_555_cc)
if (i == 0)
{
/* No charging current, so we have to discharge the cap
- * due to cap and circuit losses.
- */
+ * due to cap and circuit losses.
+ */
if (update_exponent)
{
t_rc = DSD_555_CC_T_RC_BLEED;
@@ -695,10 +695,10 @@ DISCRETE_STEP(dsd_555_cc)
/* iC=C*dv/dt works out to dv=iC*dt/C */
v_cap_next = v_cap + (i * dt / DSD_555_CC__C);
/* Yes, if the cap voltage has reached the max voltage it can,
- * and the 555 threshold has not been reached, then oscillation stops.
- * This is the way the actual electronics works.
- * This is why you never play with the pots after being factory adjusted
- * to work in the proper range. */
+ * and the 555 threshold has not been reached, then oscillation stops.
+ * This is the way the actual electronics works.
+ * This is why you never play with the pots after being factory adjusted
+ * to work in the proper range. */
if (v_cap_next > v_vcharge_limit) v_cap_next = v_vcharge_limit;
dt = 0;
@@ -732,7 +732,7 @@ DISCRETE_STEP(dsd_555_cc)
/* Asteroids - Special Case */
/* Charging in discharge mode */
/* If the cap voltage is past the current source charging limit
- * then only the bias voltage will charge the cap. */
+ * then only the bias voltage will charge the cap. */
v = (v_cap < v_vcharge_limit) ? vi : v_vcharge_limit;
v_cap_next = v_cap + ((v - v_cap) * exponent);
}
@@ -753,7 +753,7 @@ DISCRETE_STEP(dsd_555_cc)
update_exponent = 1;
}
}
- else /* Immediate discharge. No change in dt. */
+ else /* Immediate discharge. No change in dt. */
{
x_time = dt;
v_cap_next = m_trigger;
@@ -769,8 +769,8 @@ DISCRETE_STEP(dsd_555_cc)
if ((i == 0) && (DSD_555_CC__RBIAS == 0))
{
/* No charging current, so we have to discharge the cap
- * due to rGnd.
- */
+ * due to rGnd.
+ */
if (update_t_rc)
t_rc = DSD_555_CC_T_RC_DISCHARGE_NO_I;
else
@@ -787,7 +787,7 @@ DISCRETE_STEP(dsd_555_cc)
{
/* Charging */
/* If the cap voltage is past the current source charging limit
- * then only the bias voltage will charge the cap. */
+ * then only the bias voltage will charge the cap. */
v = v_bias;
if (v_cap < v_vcharge_limit) v += vi;
else if (m_type <= 3) v = v_vcharge_limit;
@@ -844,7 +844,7 @@ DISCRETE_STEP(dsd_555_cc)
update_exponent = 1;
}
}
- else /* Immediate discharge. No change in dt. */
+ else /* Immediate discharge. No change in dt. */
{
x_time = dt;
v_cap_next = m_trigger;
@@ -903,7 +903,7 @@ DISCRETE_RESET(dsd_555_cc)
{
DISCRETE_DECLARE_INFO(discrete_555_cc_desc)
- double r_temp, r_discharge = 0, r_charge = 0;
+ double r_temp, r_discharge = 0, r_charge = 0;
m_flip_flop = 1;
m_cap_voltage = 0;
@@ -923,10 +923,10 @@ DISCRETE_RESET(dsd_555_cc)
m_ac_shift = m_output_is_ac ? -m_v_out_high / 2.0 : 0;
/* There are 8 different types of basic oscillators
- * depending on the resistors used. We will determine
- * the type of circuit at reset, because the ciruit type
- * is constant. See Below.
- */
+ * depending on the resistors used. We will determine
+ * the type of circuit at reset, because the ciruit type
+ * is constant. See Below.
+ */
m_type = (DSD_555_CC__RDIS > 0) | ((DSD_555_CC__RGND > 0) << 1) | ((DSD_555_CC__RBIAS > 0) << 2);
/* optimization if none of the values are nodes */
@@ -935,7 +935,7 @@ DISCRETE_RESET(dsd_555_cc)
m_has_rc_nodes = 1;
else
{
- switch (m_type) /* see dsd_555_cc_reset for descriptions */
+ switch (m_type) /* see dsd_555_cc_reset for descriptions */
{
case 1:
r_discharge = DSD_555_CC__RDIS;
@@ -978,137 +978,137 @@ DISCRETE_RESET(dsd_555_cc)
this->step();
/*
- * TYPES:
- * Note: These are equivalent circuits shown without the 555 circuitry.
- * See the schematic in src\sound\discrete.h for full hookup info.
- *
- * DISCRETE_555_CC_TO_DISCHARGE_PIN
- * When the CC source is connected to the discharge pin, it allows the
- * circuit to charge when the 555 is in charge mode. But when in discharge
- * mode, the CC source is grounded, disabling it's effect.
- *
- * [0]
- * No resistors. Straight constant current charge of capacitor.
- * When there is not any charge current, the cap will bleed off.
- * Once the lower threshold(trigger) is reached, the output will
- * go high but the cap will continue to discharge due to losses.
- * .------+---> cap_voltage CHARGING:
- * | | dv (change in voltage) compared to dt (change in time in seconds).
- * .---. --- dv = i * dt / C; where i is current in amps and C is capacitance in farads.
- * | i | --- C cap_voltage = cap_voltage + dv
- * '---' |
- * | | DISCHARGING:
- * gnd gnd instantaneous
- *
- * [1]
- * Same as type 1 but with rDischarge. rDischarge has no effect on the charge rate because
- * of the constant current source i.
- * When there is not any charge current, the cap will bleed off.
- * Once the lower threshold(trigger) is reached, the output will
- * go high but the cap will continue to discharge due to losses.
- * .----ZZZ-----+---> cap_voltage CHARGING:
- * | rDischarge | dv (change in voltage) compared to dt (change in time in seconds).
- * .---. --- dv = i * dt / C; where i is current in amps and C is capacitance in farads.
- * | i | --- C cap_voltage = cap_voltage + dv
- * '---' |
- * | | DISCHARGING:
- * gnd gnd through rDischarge
- *
- * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
- * !!!!! IMPORTANT NOTE ABOUT TYPES 3 - 7 !!!!!
- * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
- *
- * From here on in all the circuits have either an rBias or rGnd resistor.
- * This converts the constant current into a voltage source.
- * So all the remaining circuit types will be converted to this circuit.
- * When discharging, rBias is out of the equation because the 555 is grounding the circuit
- * after that point.
- *
- * .------------. Rc Rc is the equivilent circuit resistance.
- * | v |----ZZZZ---+---> cap_voltage v is the equivilent circuit voltage.
- * | | |
- * '------------' --- Then the standard RC charging formula applies.
- * | --- C
- * | | NOTE: All the following types are converted to Rc and v values.
- * gnd gnd
- *
- * [2]
- * When there is not any charge current, the cap will bleed off.
- * Once the lower threshold(trigger) is reached, the output will
- * go high but the cap will continue to discharge due to rGnd.
- * .-------+------+------> cap_voltage CHARGING:
- * | | | v = vi = i * rGnd
- * .---. --- Z Rc = rGnd
- * | i | --- C Z rGnd
- * '---' | | DISCHARGING:
- * | | | instantaneous
- * gnd gnd gnd
- *
- * [3]
- * When there is not any charge current, the cap will bleed off.
- * Once the lower threshold(trigger) is reached, the output will
- * go high but the cap will continue to discharge due to rGnd.
- * .----ZZZ-----+------+------> cap_voltage CHARGING:
- * | rDischarge | | v = vi = i * rGnd
- * .---. --- Z Rc = rGnd
- * | i | --- C Z rGnd
- * '---' | | DISCHARGING:
- * | | | through rDischarge || rGnd ( || means in parallel)
- * gnd gnd gnd
- *
- * [4]
- * .---ZZZ---+------------+-------------> cap_voltage CHARGING:
- * | rBias | | Rc = rBias
- * .-------. .---. --- vi = i * rBias
- * | vBias | | i | --- C v = vBias + vi
- * '-------' '---' |
- * | | | DISCHARGING:
- * gnd gnd gnd instantaneous
- *
- * [5]
- * .---ZZZ---+----ZZZ-----+-------------> cap_voltage CHARGING:
- * | rBias | rDischarge | Rc = rBias + rDischarge
- * .-------. .---. --- vi = i * rBias
- * | vBias | | i | --- C v = vBias + vi
- * '-------' '---' |
- * | | | DISCHARGING:
- * gnd gnd gnd through rDischarge
- *
- * [6]
- * .---ZZZ---+------------+------+------> cap_voltage CHARGING:
- * | rBias | | | Rc = rBias || rGnd
- * .-------. .---. --- Z vi = i * Rc
- * | vBias | | i | --- C Z rGnd v = vBias * (rGnd / (rBias + rGnd)) + vi
- * '-------' '---' | |
- * | | | | DISCHARGING:
- * gnd gnd gnd gnd instantaneous
- *
- * [7]
- * .---ZZZ---+----ZZZ-----+------+------> cap_voltage CHARGING:
- * | rBias | rDischarge | | Rc = (rBias + rDischarge) || rGnd
- * .-------. .---. --- Z vi = i * rBias * (rGnd / (rBias + rDischarge + rGnd))
- * | vBias | | i | --- C Z rGnd v = vBias * (rGnd / (rBias + rDischarge + rGnd)) + vi
- * '-------' '---' | |
- * | | | | DISCHARGING:
- * gnd gnd gnd gnd through rDischarge || rGnd
- */
-
- /*
- * DISCRETE_555_CC_TO_CAP
- *
- * When the CC source is connected to the capacitor, it allows the
- * current to charge the cap while it is in discharge mode, slowing the
- * discharge. So in charge mode it charges linearly from the constant
- * current cource. But when in discharge mode it behaves like circuit
- * type 2 above.
- * .-------+------+------> cap_voltage CHARGING:
- * | | | dv = i * dt / C
- * .---. --- Z cap_voltage = cap_voltage + dv
- * | i | --- C Z rDischarge
- * '---' | | DISCHARGING:
- * | | | v = vi = i * rGnd
- * gnd gnd discharge Rc = rDischarge
- */
+ * TYPES:
+ * Note: These are equivalent circuits shown without the 555 circuitry.
+ * See the schematic in src\sound\discrete.h for full hookup info.
+ *
+ * DISCRETE_555_CC_TO_DISCHARGE_PIN
+ * When the CC source is connected to the discharge pin, it allows the
+ * circuit to charge when the 555 is in charge mode. But when in discharge
+ * mode, the CC source is grounded, disabling it's effect.
+ *
+ * [0]
+ * No resistors. Straight constant current charge of capacitor.
+ * When there is not any charge current, the cap will bleed off.
+ * Once the lower threshold(trigger) is reached, the output will
+ * go high but the cap will continue to discharge due to losses.
+ * .------+---> cap_voltage CHARGING:
+ * | | dv (change in voltage) compared to dt (change in time in seconds).
+ * .---. --- dv = i * dt / C; where i is current in amps and C is capacitance in farads.
+ * | i | --- C cap_voltage = cap_voltage + dv
+ * '---' |
+ * | | DISCHARGING:
+ * gnd gnd instantaneous
+ *
+ * [1]
+ * Same as type 1 but with rDischarge. rDischarge has no effect on the charge rate because
+ * of the constant current source i.
+ * When there is not any charge current, the cap will bleed off.
+ * Once the lower threshold(trigger) is reached, the output will
+ * go high but the cap will continue to discharge due to losses.
+ * .----ZZZ-----+---> cap_voltage CHARGING:
+ * | rDischarge | dv (change in voltage) compared to dt (change in time in seconds).
+ * .---. --- dv = i * dt / C; where i is current in amps and C is capacitance in farads.
+ * | i | --- C cap_voltage = cap_voltage + dv
+ * '---' |
+ * | | DISCHARGING:
+ * gnd gnd through rDischarge
+ *
+ * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+ * !!!!! IMPORTANT NOTE ABOUT TYPES 3 - 7 !!!!!
+ * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+ *
+ * From here on in all the circuits have either an rBias or rGnd resistor.
+ * This converts the constant current into a voltage source.
+ * So all the remaining circuit types will be converted to this circuit.
+ * When discharging, rBias is out of the equation because the 555 is grounding the circuit
+ * after that point.
+ *
+ * .------------. Rc Rc is the equivilent circuit resistance.
+ * | v |----ZZZZ---+---> cap_voltage v is the equivilent circuit voltage.
+ * | | |
+ * '------------' --- Then the standard RC charging formula applies.
+ * | --- C
+ * | | NOTE: All the following types are converted to Rc and v values.
+ * gnd gnd
+ *
+ * [2]
+ * When there is not any charge current, the cap will bleed off.
+ * Once the lower threshold(trigger) is reached, the output will
+ * go high but the cap will continue to discharge due to rGnd.
+ * .-------+------+------> cap_voltage CHARGING:
+ * | | | v = vi = i * rGnd
+ * .---. --- Z Rc = rGnd
+ * | i | --- C Z rGnd
+ * '---' | | DISCHARGING:
+ * | | | instantaneous
+ * gnd gnd gnd
+ *
+ * [3]
+ * When there is not any charge current, the cap will bleed off.
+ * Once the lower threshold(trigger) is reached, the output will
+ * go high but the cap will continue to discharge due to rGnd.
+ * .----ZZZ-----+------+------> cap_voltage CHARGING:
+ * | rDischarge | | v = vi = i * rGnd
+ * .---. --- Z Rc = rGnd
+ * | i | --- C Z rGnd
+ * '---' | | DISCHARGING:
+ * | | | through rDischarge || rGnd ( || means in parallel)
+ * gnd gnd gnd
+ *
+ * [4]
+ * .---ZZZ---+------------+-------------> cap_voltage CHARGING:
+ * | rBias | | Rc = rBias
+ * .-------. .---. --- vi = i * rBias
+ * | vBias | | i | --- C v = vBias + vi
+ * '-------' '---' |
+ * | | | DISCHARGING:
+ * gnd gnd gnd instantaneous
+ *
+ * [5]
+ * .---ZZZ---+----ZZZ-----+-------------> cap_voltage CHARGING:
+ * | rBias | rDischarge | Rc = rBias + rDischarge
+ * .-------. .---. --- vi = i * rBias
+ * | vBias | | i | --- C v = vBias + vi
+ * '-------' '---' |
+ * | | | DISCHARGING:
+ * gnd gnd gnd through rDischarge
+ *
+ * [6]
+ * .---ZZZ---+------------+------+------> cap_voltage CHARGING:
+ * | rBias | | | Rc = rBias || rGnd
+ * .-------. .---. --- Z vi = i * Rc
+ * | vBias | | i | --- C Z rGnd v = vBias * (rGnd / (rBias + rGnd)) + vi
+ * '-------' '---' | |
+ * | | | | DISCHARGING:
+ * gnd gnd gnd gnd instantaneous
+ *
+ * [7]
+ * .---ZZZ---+----ZZZ-----+------+------> cap_voltage CHARGING:
+ * | rBias | rDischarge | | Rc = (rBias + rDischarge) || rGnd
+ * .-------. .---. --- Z vi = i * rBias * (rGnd / (rBias + rDischarge + rGnd))
+ * | vBias | | i | --- C Z rGnd v = vBias * (rGnd / (rBias + rDischarge + rGnd)) + vi
+ * '-------' '---' | |
+ * | | | | DISCHARGING:
+ * gnd gnd gnd gnd through rDischarge || rGnd
+ */
+
+ /*
+ * DISCRETE_555_CC_TO_CAP
+ *
+ * When the CC source is connected to the capacitor, it allows the
+ * current to charge the cap while it is in discharge mode, slowing the
+ * discharge. So in charge mode it charges linearly from the constant
+ * current cource. But when in discharge mode it behaves like circuit
+ * type 2 above.
+ * .-------+------+------> cap_voltage CHARGING:
+ * | | | dv = i * dt / C
+ * .---. --- Z cap_voltage = cap_voltage + dv
+ * | i | --- C Z rDischarge
+ * '---' | | DISCHARGING:
+ * | | | v = vi = i * rGnd
+ * gnd gnd discharge Rc = rDischarge
+ */
}
@@ -1124,31 +1124,31 @@ DISCRETE_RESET(dsd_555_cc)
*
* Apr 2006, D Renaud.
************************************************************************/
-#define DSD_555_VCO1__RESET DISCRETE_INPUT(0) /* reset active low */
-#define DSD_555_VCO1__VIN1 DISCRETE_INPUT(1)
-#define DSD_555_VCO1__VIN2 DISCRETE_INPUT(2)
+#define DSD_555_VCO1__RESET DISCRETE_INPUT(0) /* reset active low */
+#define DSD_555_VCO1__VIN1 DISCRETE_INPUT(1)
+#define DSD_555_VCO1__VIN2 DISCRETE_INPUT(2)
DISCRETE_STEP(dsd_555_vco1)
{
DISCRETE_DECLARE_INFO(discrete_555_vco1_desc)
- int count_f = 0;
- int count_r = 0;
- double dt; /* change in time */
- double x_time = 0; /* time since change happened */
- double v_cap; /* Current voltage on capacitor, before dt */
- double v_cap_next = 0; /* Voltage on capacitor, after dt */
+ int count_f = 0;
+ int count_r = 0;
+ double dt; /* change in time */
+ double x_time = 0; /* time since change happened */
+ double v_cap; /* Current voltage on capacitor, before dt */
+ double v_cap_next = 0; /* Voltage on capacitor, after dt */
- double v_out = 0;
+ double v_out = 0;
- dt = this->sample_time(); /* Change in time */
+ dt = this->sample_time(); /* Change in time */
v_cap = m_cap_voltage;
/* Check: if the Control Voltage node is connected. */
- if (m_ctrlv_is_node && DSD_555_VCO1__RESET) /* reset active low */
+ if (m_ctrlv_is_node && DSD_555_VCO1__RESET) /* reset active low */
{
/* If CV is less then .25V, the circuit will oscillate way out of range.
- * So we will just ignore it when it happens. */
+ * So we will just ignore it when it happens. */
if (DSD_555_VCO1__VIN2 < .25) return;
/* If it is a node then calculate thresholds based on Control Voltage */
m_threshold = DSD_555_VCO1__VIN2;
@@ -1175,7 +1175,7 @@ DISCRETE_STEP(dsd_555_vco1)
if (m_flip_flop)
{
/* if we are in reset then toggle f/f and discharge */
- if (!DSD_555_VCO1__RESET) /* reset active low */
+ if (!DSD_555_VCO1__RESET) /* reset active low */
{
m_flip_flop = 0;
count_f++;
@@ -1206,7 +1206,7 @@ DISCRETE_STEP(dsd_555_vco1)
v_cap_next = v_cap - (m_i_discharge * dt / info->c);
/* if we are in reset, then the cap can discharge to 0 */
- if (!DSD_555_VCO1__RESET) /* reset active low */
+ if (!DSD_555_VCO1__RESET) /* reset active low */
{
if (v_cap_next < 0) v_cap_next = 0;
dt = 0;
@@ -1214,7 +1214,7 @@ DISCRETE_STEP(dsd_555_vco1)
else
{
/* if we are out of reset and the cap voltage is less then
- * the lower threshold, toggle f/f and start charging */
+ * the lower threshold, toggle f/f and start charging */
if (v_cap <= m_trigger)
{
if (m_flip_flop == 0)
@@ -1295,19 +1295,19 @@ DISCRETE_RESET(dsd_555_vco1)
/* Setup op-amp parameters */
/* The voltage at op-amp +in is always a fixed ratio of the modulation voltage. */
- v_ratio_r3 = info->r3 / (info->r2 + info->r3); /* +in voltage */
+ v_ratio_r3 = info->r3 / (info->r2 + info->r3); /* +in voltage */
/* The voltage at op-amp -in is 1 of 2 fixed ratios of the modulation voltage,
- * based on the 555 Flip-Flop state. */
+ * based on the 555 Flip-Flop state. */
/* If the FF is 0, then only R1 is connected allowing the full modulation volatge to pass. */
/* v_ratio_r4_0 = 1 */
/* If the FF is 1, then R1 & R4 make a voltage divider similar to R2 & R3 */
- v_ratio_r4_1 = info->r4 / (info->r1 + info->r4); /* -in voltage */
+ v_ratio_r4_1 = info->r4 / (info->r1 + info->r4); /* -in voltage */
/* the input resistance to the op amp depends on the FF state */
/* r_in_0 = info->r1 when FF = 0 */
- r_in_1 = 1.0 / (1.0 / info->r1 + 1.0 / info->r4); /* input resistance when r4 switched in */
+ r_in_1 = 1.0 / (1.0 / info->r1 + 1.0 / info->r4); /* input resistance when r4 switched in */
/* Now that we know the voltages entering the op amp and the resistance for the
- * FF states, we can predetermine the ratios for the charge/discharge currents. */
+ * FF states, we can predetermine the ratios for the charge/discharge currents. */
m_i_discharge = (1 - v_ratio_r3) / info->r1;
m_i_charge = (v_ratio_r3 - v_ratio_r4_1) / r_in_1;
@@ -1322,9 +1322,9 @@ DISCRETE_RESET(dsd_555_vco1)
m_v_out_high = (info->v_out_high == DEFAULT_555_HIGH) ? info->v_pos - 1.2 : info->v_out_high;
/* Calculate 555 thresholds.
- * If the Control Voltage is a node, then the thresholds will be calculated each step.
- * If the Control Voltage is a fixed voltage, then the thresholds will be calculated
- * from that. Otherwise we will use thresholds based on v_pos. */
+ * If the Control Voltage is a node, then the thresholds will be calculated each step.
+ * If the Control Voltage is a fixed voltage, then the thresholds will be calculated
+ * from that. Otherwise we will use thresholds based on v_pos. */
if (!m_ctrlv_is_node && (DSD_555_VCO1__VIN2 != -1))
{
/* Setup based on supplied Control Voltage static value */
@@ -1394,45 +1394,45 @@ DISCRETE_RESET(dsd_555_vco1)
* in frequency.
*
************************************************************************/
-#define DSD_566__VMOD DISCRETE_INPUT(0)
-#define DSD_566__R DISCRETE_INPUT(1)
-#define DSD_566__C DISCRETE_INPUT(2)
-#define DSD_566__VPOS DISCRETE_INPUT(3)
-#define DSD_566__VNEG DISCRETE_INPUT(4)
-#define DSD_566__VCHARGE DISCRETE_INPUT(5)
-#define DSD_566__OPTIONS DISCRETE_INPUT(6)
+#define DSD_566__VMOD DISCRETE_INPUT(0)
+#define DSD_566__R DISCRETE_INPUT(1)
+#define DSD_566__C DISCRETE_INPUT(2)
+#define DSD_566__VPOS DISCRETE_INPUT(3)
+#define DSD_566__VNEG DISCRETE_INPUT(4)
+#define DSD_566__VCHARGE DISCRETE_INPUT(5)
+#define DSD_566__OPTIONS DISCRETE_INPUT(6)
static const struct
{
- double c_high[6];
- double c_low[6];
- double sqr_low[6];
- double osc_stable[6];
- double osc_stop[6];
+ double c_high[6];
+ double c_low[6];
+ double sqr_low[6];
+ double osc_stable[6];
+ double osc_stop[6];
} ne566 =
{
/* 10 10.5 11 11.5 12 13 14 15 B+ */
- {3.364, /*3.784,*/ 4.259, /*4.552,*/ 4.888, 5.384, 5.896, 6.416}, /* c_high */
- {1.940, /*2.100,*/ 2.276, /*2.404,*/ 2.580, 2.880, 3.180, 3.488}, /* c_low */
- {4.352, /*4.144,*/ 4.080, /*4.260,*/ 4.500, 4.960, 5.456, 5.940}, /* sqr_low */
- {4.885, /*5.316,*/ 5.772, /*6.075,*/ 6.335, 6.912, 7.492, 7.945}, /* osc_stable */
- {4.495, /*4.895,*/ 5.343, /*5.703,*/ 5.997, 6.507, 7.016, 7.518} /* osc_stop */
+ {3.364, /*3.784,*/ 4.259, /*4.552,*/ 4.888, 5.384, 5.896, 6.416}, /* c_high */
+ {1.940, /*2.100,*/ 2.276, /*2.404,*/ 2.580, 2.880, 3.180, 3.488}, /* c_low */
+ {4.352, /*4.144,*/ 4.080, /*4.260,*/ 4.500, 4.960, 5.456, 5.940}, /* sqr_low */
+ {4.885, /*5.316,*/ 5.772, /*6.075,*/ 6.335, 6.912, 7.492, 7.945}, /* osc_stable */
+ {4.495, /*4.895,*/ 5.343, /*5.703,*/ 5.997, 6.507, 7.016, 7.518} /* osc_stop */
};
DISCRETE_STEP(dsd_566)
{
- double i = 0; /* Charging current created by vIn */
- double i_rise; /* non-linear rise charge current */
- double dt; /* change in time */
- double x_time = 0;
- double v_cap; /* Current voltage on capacitor, before dt */
- int count_f = 0, count_r = 0;
+ double i = 0; /* Charging current created by vIn */
+ double i_rise; /* non-linear rise charge current */
+ double dt; /* change in time */
+ double x_time = 0;
+ double v_cap; /* Current voltage on capacitor, before dt */
+ int count_f = 0, count_r = 0;
- double v_out = 0.0;
+ double v_out = 0.0;
- dt = this->sample_time(); /* Change in time */
- v_cap = m_cap_voltage; /* Set to voltage before change */
+ dt = this->sample_time(); /* Change in time */
+ v_cap = m_cap_voltage; /* Set to voltage before change */
/* Calculate charging current if it is in range */
if (EXPECTED(DSD_566__VMOD > m_v_osc_stop))
@@ -1482,10 +1482,10 @@ DISCRETE_STEP(dsd_566)
v_cap += i_rise * dt / DSD_566__C;
dt = 0;
/* Yes, if the cap voltage has reached the max voltage it can,
- * and the 566 threshold has not been reached, then oscillation stops.
- * This is the way the actual electronics works.
- * This is why you never play with the pots after being factory adjusted
- * to work in the proper range. */
+ * and the 566 threshold has not been reached, then oscillation stops.
+ * This is the way the actual electronics works.
+ * This is why you never play with the pots after being factory adjusted
+ * to work in the proper range. */
if (UNEXPECTED(v_cap > DSD_566__VMOD)) v_cap = DSD_566__VMOD;
/* has it charged past upper limit? */
@@ -1545,8 +1545,8 @@ DISCRETE_STEP(dsd_566)
DISCRETE_RESET(dsd_566)
{
- int v_int;
- double v_float;
+ int v_int;
+ double v_float;
m_out_type = (int)DSD_566__OPTIONS & DISC_566_OUT_MASK;
m_fake_ac = (int)DSD_566__OPTIONS & DISC_566_OUT_AC;
@@ -1571,8 +1571,8 @@ DISCRETE_RESET(dsd_566)
m_v_sqr_high = DSD_566__VPOS - 1;
m_v_sqr_low = ne566.sqr_low[v_int] + DSD_566__VNEG;
m_v_sqr_diff = m_v_sqr_high - m_v_sqr_low;
- m_v_osc_stable = ne566.osc_stable[v_int] + DSD_566__VNEG;
- m_v_osc_stop = ne566.osc_stop[v_int] + DSD_566__VNEG;
+ m_v_osc_stable = ne566.osc_stable[v_int] + DSD_566__VNEG;
+ m_v_osc_stop = ne566.osc_stop[v_int] + DSD_566__VNEG;
m_ac_shift = 0;
if (m_fake_ac)
@@ -1595,18 +1595,18 @@ DISCRETE_RESET(dsd_566)
* Dec 2007, Couriersud based on data sheet
* Oct 2009, complete re-write based on IC testing
************************************************************************/
-#define DSD_LS624__ENABLE DISCRETE_INPUT(0)
-#define DSD_LS624__VMOD DISCRETE_INPUT(1)
-#define DSD_LS624__VRNG DISCRETE_INPUT(2)
-#define DSD_LS624__C DISCRETE_INPUT(3)
-#define DSD_LS624__R_FREQ_IN DISCRETE_INPUT(4)
-#define DSD_LS624__C_FREQ_IN DISCRETE_INPUT(5)
-#define DSD_LS624__R_RNG_IN DISCRETE_INPUT(6)
-#define DSD_LS624__OUTTYPE DISCRETE_INPUT(7)
-
-#define LS624_R_EXT 600.0 /* as specified in data sheet */
-#define LS624_OUT_HIGH 4.5 /* measured */
-#define LS624_IN_R RES_K(90) /* measured & 70K + 20k per data sheet */
+#define DSD_LS624__ENABLE DISCRETE_INPUT(0)
+#define DSD_LS624__VMOD DISCRETE_INPUT(1)
+#define DSD_LS624__VRNG DISCRETE_INPUT(2)
+#define DSD_LS624__C DISCRETE_INPUT(3)
+#define DSD_LS624__R_FREQ_IN DISCRETE_INPUT(4)
+#define DSD_LS624__C_FREQ_IN DISCRETE_INPUT(5)
+#define DSD_LS624__R_RNG_IN DISCRETE_INPUT(6)
+#define DSD_LS624__OUTTYPE DISCRETE_INPUT(7)
+
+#define LS624_R_EXT 600.0 /* as specified in data sheet */
+#define LS624_OUT_HIGH 4.5 /* measured */
+#define LS624_IN_R RES_K(90) /* measured & 70K + 20k per data sheet */
/*
* The 74LS624 series are constant current based VCOs. The Freq Control voltage
@@ -1644,14 +1644,14 @@ DISCRETE_RESET(dsd_566)
DISCRETE_STEP(dsd_ls624)
{
- double x_time = 0;
- double freq, t1;
- double v_freq_2, v_freq_3, v_freq_4;
- double t_used = m_t_used;
- double dt = this->sample_time();;
- double v_freq = DSD_LS624__VMOD;
- double v_rng = DSD_LS624__VRNG;
- int count_f = 0, count_r = 0;
+ double x_time = 0;
+ double freq, t1;
+ double v_freq_2, v_freq_3, v_freq_4;
+ double t_used = m_t_used;
+ double dt = this->sample_time();;
+ double v_freq = DSD_LS624__VMOD;
+ double v_rng = DSD_LS624__VRNG;
+ int count_f = 0, count_r = 0;
/* coefficients */
const double k1 = 1.9904769024796283E+03;
diff --git a/src/emu/sound/disc_dev.h b/src/emu/sound/disc_dev.h
index 1915a47233b..e6722b97fd0 100644
--- a/src/emu/sound/disc_dev.h
+++ b/src/emu/sound/disc_dev.h
@@ -22,106 +22,106 @@
#include "discrete.h"
DISCRETE_CLASS_STEP_RESET(dsd_555_astbl, 1,
- int m_use_ctrlv;
- int m_output_type;
- int m_output_is_ac;
- double m_ac_shift; /* DC shift needed to make waveform ac */
- int m_flip_flop; /* 555 flip/flop output state */
- double m_cap_voltage; /* voltage on cap */
- double m_threshold;
- double m_trigger;
- double m_v_out_high; /* Logic 1 voltage level */
- double m_v_charge;
- const double * m_v_charge_node; /* point to output of node */
- int m_has_rc_nodes;
- double m_exp_bleed;
- double m_exp_charge;
- double m_exp_discharge;
- double m_t_rc_bleed;
- double m_t_rc_charge;
- double m_t_rc_discharge;
- double m_last_r1;
- double m_last_r2;
- double m_last_c;
+ int m_use_ctrlv;
+ int m_output_type;
+ int m_output_is_ac;
+ double m_ac_shift; /* DC shift needed to make waveform ac */
+ int m_flip_flop; /* 555 flip/flop output state */
+ double m_cap_voltage; /* voltage on cap */
+ double m_threshold;
+ double m_trigger;
+ double m_v_out_high; /* Logic 1 voltage level */
+ double m_v_charge;
+ const double * m_v_charge_node; /* point to output of node */
+ int m_has_rc_nodes;
+ double m_exp_bleed;
+ double m_exp_charge;
+ double m_exp_discharge;
+ double m_t_rc_bleed;
+ double m_t_rc_charge;
+ double m_t_rc_discharge;
+ double m_last_r1;
+ double m_last_r2;
+ double m_last_c;
);
DISCRETE_CLASS_STEP_RESET(dsd_555_mstbl, 1,
- int m_trig_is_logic;
- int m_trig_discharges_cap;
- int m_output_type;
- double m_ac_shift; /* DC shift needed to make waveform ac */
- int m_flip_flop; /* 555 flip/flop output state */
- int m_has_rc_nodes;
- double m_exp_charge;
- double m_cap_voltage; /* voltage on cap */
- double m_threshold;
- double m_trigger;
- double m_v_out_high; /* Logic 1 voltage level */
- double m_v_charge;
+ int m_trig_is_logic;
+ int m_trig_discharges_cap;
+ int m_output_type;
+ double m_ac_shift; /* DC shift needed to make waveform ac */
+ int m_flip_flop; /* 555 flip/flop output state */
+ int m_has_rc_nodes;
+ double m_exp_charge;
+ double m_cap_voltage; /* voltage on cap */
+ double m_threshold;
+ double m_trigger;
+ double m_v_out_high; /* Logic 1 voltage level */
+ double m_v_charge;
);
DISCRETE_CLASS_STEP_RESET(dsd_555_cc, 1,
- unsigned int m_type; /* type of 555cc circuit */
- int m_output_type;
- int m_output_is_ac;
- double m_ac_shift; /* DC shift needed to make waveform ac */
- int m_flip_flop; /* 555 flip/flop output state */
- double m_cap_voltage; /* voltage on cap */
- double m_threshold;
- double m_trigger;
- double m_v_out_high; /* Logic 1 voltage level */
- double m_v_cc_source;
- int m_has_rc_nodes;
- double m_exp_bleed;
- double m_exp_charge;
- double m_exp_discharge;
- double m_exp_discharge_01;
- double m_exp_discharge_no_i;
- double m_t_rc_charge;
- double m_t_rc_discharge;
- double m_t_rc_discharge_01;
- double m_t_rc_discharge_no_i;
+ unsigned int m_type; /* type of 555cc circuit */
+ int m_output_type;
+ int m_output_is_ac;
+ double m_ac_shift; /* DC shift needed to make waveform ac */
+ int m_flip_flop; /* 555 flip/flop output state */
+ double m_cap_voltage; /* voltage on cap */
+ double m_threshold;
+ double m_trigger;
+ double m_v_out_high; /* Logic 1 voltage level */
+ double m_v_cc_source;
+ int m_has_rc_nodes;
+ double m_exp_bleed;
+ double m_exp_charge;
+ double m_exp_discharge;
+ double m_exp_discharge_01;
+ double m_exp_discharge_no_i;
+ double m_t_rc_charge;
+ double m_t_rc_discharge;
+ double m_t_rc_discharge_01;
+ double m_t_rc_discharge_no_i;
);
DISCRETE_CLASS_STEP_RESET(dsd_555_vco1, 1,
- int m_ctrlv_is_node;
- int m_output_type;
- int m_output_is_ac;
- double m_ac_shift; /* DC shift needed to make waveform ac */
- int m_flip_flop; /* flip/flop output state */
- double m_v_out_high; /* 555 high voltage */
- double m_threshold; /* falling threshold */
- double m_trigger; /* rising threshold */
- double m_i_charge; /* charge current */
- double m_i_discharge; /* discharge current */
- double m_cap_voltage; /* current capacitor voltage */
+ int m_ctrlv_is_node;
+ int m_output_type;
+ int m_output_is_ac;
+ double m_ac_shift; /* DC shift needed to make waveform ac */
+ int m_flip_flop; /* flip/flop output state */
+ double m_v_out_high; /* 555 high voltage */
+ double m_threshold; /* falling threshold */
+ double m_trigger; /* rising threshold */
+ double m_i_charge; /* charge current */
+ double m_i_discharge; /* discharge current */
+ double m_cap_voltage; /* current capacitor voltage */
);
DISCRETE_CLASS_STEP_RESET(dsd_566, 1,
- unsigned int m_state[2]; /* keeps track of excess flip_flop changes during the current step */
- int m_flip_flop; /* 566 flip/flop output state */
- double m_cap_voltage; /* voltage on cap */
- double m_v_sqr_low; /* voltage for a squarewave at low */
- double m_v_sqr_high; /* voltage for a squarewave at high */
- double m_v_sqr_diff;
- double m_threshold_low; /* falling threshold */
- double m_threshold_high; /* rising threshold */
- double m_ac_shift; /* used to fake AC */
- double m_v_osc_stable;
- double m_v_osc_stop;
- int m_fake_ac;
- int m_out_type;
+ unsigned int m_state[2]; /* keeps track of excess flip_flop changes during the current step */
+ int m_flip_flop; /* 566 flip/flop output state */
+ double m_cap_voltage; /* voltage on cap */
+ double m_v_sqr_low; /* voltage for a squarewave at low */
+ double m_v_sqr_high; /* voltage for a squarewave at high */
+ double m_v_sqr_diff;
+ double m_threshold_low; /* falling threshold */
+ double m_threshold_high; /* rising threshold */
+ double m_ac_shift; /* used to fake AC */
+ double m_v_osc_stable;
+ double m_v_osc_stop;
+ int m_fake_ac;
+ int m_out_type;
);
DISCRETE_CLASS_STEP_RESET(dsd_ls624, 1,
- double m_exponent;
- double m_t_used;
- double m_v_cap_freq_in;
- double m_v_freq_scale;
- double m_v_rng_scale;
- int m_flip_flop;
- int m_has_freq_in_cap;
- int m_out_type;
+ double m_exponent;
+ double m_t_used;
+ double m_v_cap_freq_in;
+ double m_v_freq_scale;
+ double m_v_rng_scale;
+ int m_flip_flop;
+ int m_has_freq_in_cap;
+ int m_out_type;
);
#endif /* __DISC_WAV_H__ */
diff --git a/src/emu/sound/disc_flt.c b/src/emu/sound/disc_flt.c
index 8c708257274..4edda799999 100644
--- a/src/emu/sound/disc_flt.c
+++ b/src/emu/sound/disc_flt.c
@@ -39,10 +39,10 @@
* input[4] - Voltage reference. Usually 0V.
*
************************************************************************/
-#define DST_CRFILTER__IN DISCRETE_INPUT(0)
-#define DST_CRFILTER__R DISCRETE_INPUT(1)
-#define DST_CRFILTER__C DISCRETE_INPUT(2)
-#define DST_CRFILTER__VREF DISCRETE_INPUT(3)
+#define DST_CRFILTER__IN DISCRETE_INPUT(0)
+#define DST_CRFILTER__R DISCRETE_INPUT(1)
+#define DST_CRFILTER__C DISCRETE_INPUT(2)
+#define DST_CRFILTER__VREF DISCRETE_INPUT(3)
DISCRETE_STEP(dst_crfilter)
{
@@ -82,13 +82,13 @@ DISCRETE_RESET(dst_crfilter)
* input[3] - Filter type (initialization only)
*
************************************************************************/
-#define DST_FILTER1__ENABLE DISCRETE_INPUT(0)
-#define DST_FILTER1__IN DISCRETE_INPUT(1)
-#define DST_FILTER1__FREQ DISCRETE_INPUT(2)
-#define DST_FILTER1__TYPE DISCRETE_INPUT(3)
+#define DST_FILTER1__ENABLE DISCRETE_INPUT(0)
+#define DST_FILTER1__IN DISCRETE_INPUT(1)
+#define DST_FILTER1__FREQ DISCRETE_INPUT(2)
+#define DST_FILTER1__TYPE DISCRETE_INPUT(3)
static void calculate_filter1_coefficients(discrete_base_node *node, double fc, double type,
- struct discrete_filter_coeff &coeff)
+ struct discrete_filter_coeff &coeff)
{
double den, w, two_over_T;
@@ -150,19 +150,19 @@ DISCRETE_RESET(dst_filter1)
* input[4] - Filter type (initialization only)
*
************************************************************************/
-#define DST_FILTER2__ENABLE DISCRETE_INPUT(0)
-#define DST_FILTER2__IN DISCRETE_INPUT(1)
-#define DST_FILTER2__FREQ DISCRETE_INPUT(2)
-#define DST_FILTER2__DAMP DISCRETE_INPUT(3)
-#define DST_FILTER2__TYPE DISCRETE_INPUT(4)
+#define DST_FILTER2__ENABLE DISCRETE_INPUT(0)
+#define DST_FILTER2__IN DISCRETE_INPUT(1)
+#define DST_FILTER2__FREQ DISCRETE_INPUT(2)
+#define DST_FILTER2__DAMP DISCRETE_INPUT(3)
+#define DST_FILTER2__TYPE DISCRETE_INPUT(4)
static void calculate_filter2_coefficients(discrete_base_node *node,
- double fc, double d, double type,
- struct discrete_filter_coeff &coeff)
+ double fc, double d, double type,
+ struct discrete_filter_coeff &coeff)
{
- double w; /* cutoff freq, in radians/sec */
+ double w; /* cutoff freq, in radians/sec */
double w_squared;
- double den; /* temp variable */
+ double den; /* temp variable */
double two_over_T = 2 * node->sample_rate();
double two_over_T_squared = two_over_T * two_over_T;
@@ -222,7 +222,7 @@ DISCRETE_STEP(dst_filter2)
DISCRETE_RESET(dst_filter2)
{
calculate_filter2_coefficients(this, DST_FILTER2__FREQ, DST_FILTER2__DAMP, DST_FILTER2__TYPE,
- m_fc);
+ m_fc);
set_output(0, 0);
}
@@ -240,10 +240,10 @@ DISCRETE_RESET(dst_filter2)
*
* Mar 2004, D Renaud.
************************************************************************/
-#define DST_OP_AMP_FILT__ENABLE DISCRETE_INPUT(0)
-#define DST_OP_AMP_FILT__INP1 DISCRETE_INPUT(1)
-#define DST_OP_AMP_FILT__INP2 DISCRETE_INPUT(2)
-#define DST_OP_AMP_FILT__TYPE DISCRETE_INPUT(3)
+#define DST_OP_AMP_FILT__ENABLE DISCRETE_INPUT(0)
+#define DST_OP_AMP_FILT__INP1 DISCRETE_INPUT(1)
+#define DST_OP_AMP_FILT__INP2 DISCRETE_INPUT(2)
+#define DST_OP_AMP_FILT__TYPE DISCRETE_INPUT(3)
DISCRETE_STEP(dst_op_amp_filt)
{
@@ -334,8 +334,8 @@ DISCRETE_STEP(dst_op_amp_filt)
}
/* Clip the output to the voltage rails.
- * This way we get the original distortion in all it's glory.
- */
+ * This way we get the original distortion in all it's glory.
+ */
if (v_out > m_vP) v_out = m_vP;
if (v_out < m_vN) v_out = m_vN;
m_fc.y1 = v_out - m_vRef;
@@ -376,7 +376,7 @@ DISCRETE_RESET(dst_op_amp_filt)
m_vN = info->vN;
/* Work out the input resistance. It is all input and bias resistors in parallel. */
- m_rTotal = 1.0 / info->r1; /* There has to be an R1. Otherwise the table is wrong. */
+ m_rTotal = 1.0 / info->r1; /* There has to be an R1. Otherwise the table is wrong. */
if (info->r2 != 0) m_rTotal += 1.0 / info->r2;
if (info->r3 != 0) m_rTotal += 1.0 / info->r3;
m_rTotal = 1.0 / m_rTotal;
@@ -450,12 +450,12 @@ DISCRETE_RESET(dst_op_amp_filt)
* DST_RC_CIRCUIT_1 - RC charge/discharge circuit
*
************************************************************************/
-#define DST_RC_CIRCUIT_1__IN0 DISCRETE_INPUT(0)
-#define DST_RC_CIRCUIT_1__IN1 DISCRETE_INPUT(1)
-#define DST_RC_CIRCUIT_1__R DISCRETE_INPUT(2)
-#define DST_RC_CIRCUIT_1__C DISCRETE_INPUT(3)
+#define DST_RC_CIRCUIT_1__IN0 DISCRETE_INPUT(0)
+#define DST_RC_CIRCUIT_1__IN1 DISCRETE_INPUT(1)
+#define DST_RC_CIRCUIT_1__R DISCRETE_INPUT(2)
+#define DST_RC_CIRCUIT_1__C DISCRETE_INPUT(3)
-#define CD4066_R_ON 270
+#define CD4066_R_ON 270
DISCRETE_STEP( dst_rc_circuit_1 )
{
@@ -516,10 +516,10 @@ DISCRETE_RESET( dst_rc_circuit_1 )
* input[3] - Capacitor Value (initialization only)
*
************************************************************************/
-#define DST_RCDISC__ENABLE DISCRETE_INPUT(0)
-#define DST_RCDISC__IN DISCRETE_INPUT(1)
-#define DST_RCDISC__R DISCRETE_INPUT(2)
-#define DST_RCDISC__C DISCRETE_INPUT(3)
+#define DST_RCDISC__ENABLE DISCRETE_INPUT(0)
+#define DST_RCDISC__IN DISCRETE_INPUT(1)
+#define DST_RCDISC__R DISCRETE_INPUT(2)
+#define DST_RCDISC__C DISCRETE_INPUT(3)
DISCRETE_STEP(dst_rcdisc)
{
@@ -569,12 +569,12 @@ DISCRETE_RESET(dst_rcdisc)
* input[5] - Capacitor Value (initialization only)
*
************************************************************************/
-#define DST_RCDISC2__ENABLE DISCRETE_INPUT(0)
-#define DST_RCDISC2__IN0 DISCRETE_INPUT(1)
-#define DST_RCDISC2__R0 DISCRETE_INPUT(2)
-#define DST_RCDISC2__IN1 DISCRETE_INPUT(3)
-#define DST_RCDISC2__R1 DISCRETE_INPUT(4)
-#define DST_RCDISC2__C DISCRETE_INPUT(5)
+#define DST_RCDISC2__ENABLE DISCRETE_INPUT(0)
+#define DST_RCDISC2__IN0 DISCRETE_INPUT(1)
+#define DST_RCDISC2__R0 DISCRETE_INPUT(2)
+#define DST_RCDISC2__IN1 DISCRETE_INPUT(3)
+#define DST_RCDISC2__R1 DISCRETE_INPUT(4)
+#define DST_RCDISC2__C DISCRETE_INPUT(5)
DISCRETE_STEP(dst_rcdisc2)
{
@@ -612,12 +612,12 @@ DISCRETE_RESET(dst_rcdisc2)
* input[6] - Diode Junction voltage (initialization only)
*
************************************************************************/
-#define DST_RCDISC3__ENABLE DISCRETE_INPUT(0)
-#define DST_RCDISC3__IN DISCRETE_INPUT(1)
-#define DST_RCDISC3__R1 DISCRETE_INPUT(2)
-#define DST_RCDISC3__R2 DISCRETE_INPUT(3)
-#define DST_RCDISC3__C DISCRETE_INPUT(4)
-#define DST_RCDISC3__DJV DISCRETE_INPUT(5)
+#define DST_RCDISC3__ENABLE DISCRETE_INPUT(0)
+#define DST_RCDISC3__IN DISCRETE_INPUT(1)
+#define DST_RCDISC3__R1 DISCRETE_INPUT(2)
+#define DST_RCDISC3__R2 DISCRETE_INPUT(3)
+#define DST_RCDISC3__C DISCRETE_INPUT(4)
+#define DST_RCDISC3__DJV DISCRETE_INPUT(5)
DISCRETE_STEP(dst_rcdisc3)
{
@@ -692,14 +692,14 @@ DISCRETE_RESET(dst_rcdisc3)
* input[4] - circuit type (initialization only)
*
************************************************************************/
-#define DST_RCDISC4__ENABLE DISCRETE_INPUT(0)
-#define DST_RCDISC4__IN DISCRETE_INPUT(1)
-#define DST_RCDISC4__R1 DISCRETE_INPUT(2)
-#define DST_RCDISC4__R2 DISCRETE_INPUT(3)
-#define DST_RCDISC4__R3 DISCRETE_INPUT(4)
-#define DST_RCDISC4__C1 DISCRETE_INPUT(5)
-#define DST_RCDISC4__VP DISCRETE_INPUT(6)
-#define DST_RCDISC4__TYPE DISCRETE_INPUT(7)
+#define DST_RCDISC4__ENABLE DISCRETE_INPUT(0)
+#define DST_RCDISC4__IN DISCRETE_INPUT(1)
+#define DST_RCDISC4__R1 DISCRETE_INPUT(2)
+#define DST_RCDISC4__R2 DISCRETE_INPUT(3)
+#define DST_RCDISC4__R3 DISCRETE_INPUT(4)
+#define DST_RCDISC4__C1 DISCRETE_INPUT(5)
+#define DST_RCDISC4__VP DISCRETE_INPUT(6)
+#define DST_RCDISC4__TYPE DISCRETE_INPUT(7)
DISCRETE_STEP(dst_rcdisc4)
{
@@ -729,7 +729,7 @@ DISCRETE_STEP(dst_rcdisc4)
DISCRETE_RESET( dst_rcdisc4)
{
- double v, i, r, rT;
+ double v, i, r, rT;
m_type = 0;
/* some error checking. */
@@ -759,9 +759,9 @@ DISCRETE_RESET( dst_rcdisc4)
{
case 1:
/* We will simulate this as a voltage divider with 2 states depending
- * on the input. But we have to take the diodes into account.
- */
- v = DST_RCDISC4__VP - .5; /* diode drop */
+ * on the input. But we have to take the diodes into account.
+ */
+ v = DST_RCDISC4__VP - .5; /* diode drop */
/* When the input is 1, both R1 & R3 are basically in parallel. */
r = RES_2_PARALLEL(DST_RCDISC4__R1, DST_RCDISC4__R3);
@@ -781,9 +781,9 @@ DISCRETE_RESET( dst_rcdisc4)
case 3:
/* We will simulate this as a voltage divider with 2 states depending
- * on the input. The 1k pullup is in parallel with the internal TTL
- * resistance, so we will just use .5k in series with R1.
- */
+ * on the input. The 1k pullup is in parallel with the internal TTL
+ * resistance, so we will just use .5k in series with R1.
+ */
r = 500.0 + DST_RCDISC4__R1;
m_v[1] = RES_VOLTAGE_DIVIDER(r, DST_RCDISC4__R2) * (5.0 - 0.5);
rT = RES_2_PARALLEL(r, DST_RCDISC4__R2);
@@ -806,10 +806,10 @@ DISCRETE_RESET( dst_rcdisc4)
* input[3] - Capacitor Value (initialization only)
*
************************************************************************/
-#define DST_RCDISC5__ENABLE DISCRETE_INPUT(0)
-#define DST_RCDISC5__IN DISCRETE_INPUT(1)
-#define DST_RCDISC5__R DISCRETE_INPUT(2)
-#define DST_RCDISC5__C DISCRETE_INPUT(3)
+#define DST_RCDISC5__ENABLE DISCRETE_INPUT(0)
+#define DST_RCDISC5__IN DISCRETE_INPUT(1)
+#define DST_RCDISC5__R DISCRETE_INPUT(2)
+#define DST_RCDISC5__C DISCRETE_INPUT(3)
DISCRETE_STEP( dst_rcdisc5)
{
@@ -817,7 +817,7 @@ DISCRETE_STEP( dst_rcdisc5)
/* Exponential based in difference between input/output */
- u = DST_RCDISC5__IN - 0.7; /* Diode drop */
+ u = DST_RCDISC5__IN - 0.7; /* Diode drop */
if( u < 0)
u = 0;
@@ -866,19 +866,19 @@ DISCRETE_RESET( dst_rcdisc5)
* input[8] - Voltage Value (initialization only)
*
************************************************************************/
-#define DST_RCDISC_MOD__IN1 DISCRETE_INPUT(0)
-#define DST_RCDISC_MOD__IN2 DISCRETE_INPUT(1)
-#define DST_RCDISC_MOD__R1 DISCRETE_INPUT(2)
-#define DST_RCDISC_MOD__R2 DISCRETE_INPUT(3)
-#define DST_RCDISC_MOD__R3 DISCRETE_INPUT(4)
-#define DST_RCDISC_MOD__R4 DISCRETE_INPUT(5)
-#define DST_RCDISC_MOD__C DISCRETE_INPUT(6)
-#define DST_RCDISC_MOD__VP DISCRETE_INPUT(7)
+#define DST_RCDISC_MOD__IN1 DISCRETE_INPUT(0)
+#define DST_RCDISC_MOD__IN2 DISCRETE_INPUT(1)
+#define DST_RCDISC_MOD__R1 DISCRETE_INPUT(2)
+#define DST_RCDISC_MOD__R2 DISCRETE_INPUT(3)
+#define DST_RCDISC_MOD__R3 DISCRETE_INPUT(4)
+#define DST_RCDISC_MOD__R4 DISCRETE_INPUT(5)
+#define DST_RCDISC_MOD__C DISCRETE_INPUT(6)
+#define DST_RCDISC_MOD__VP DISCRETE_INPUT(7)
DISCRETE_STEP(dst_rcdisc_mod)
{
- double diff, v_cap, u, vD;
- int mod_state, mod1_state, mod2_state;
+ double diff, v_cap, u, vD;
+ int mod_state, mod1_state, mod2_state;
/* Exponential based in difference between input/output */
v_cap = m_v_cap;
@@ -910,7 +910,7 @@ DISCRETE_STEP(dst_rcdisc_mod)
DISCRETE_RESET(dst_rcdisc_mod)
{
- double rc[2], rc2[2];
+ double rc[2], rc2[2];
/* pre-calculate fixed values */
/* DST_RCDISC_MOD__IN1 <= 0.5 */
@@ -955,10 +955,10 @@ DISCRETE_RESET(dst_rcdisc_mod)
* input[4] - Voltage reference. Usually 0V.
*
************************************************************************/
-#define DST_RCFILTER__VIN DISCRETE_INPUT(0)
-#define DST_RCFILTER__R DISCRETE_INPUT(1)
-#define DST_RCFILTER__C DISCRETE_INPUT(2)
-#define DST_RCFILTER__VREF DISCRETE_INPUT(3)
+#define DST_RCFILTER__VIN DISCRETE_INPUT(0)
+#define DST_RCFILTER__R DISCRETE_INPUT(1)
+#define DST_RCFILTER__C DISCRETE_INPUT(2)
+#define DST_RCFILTER__VREF DISCRETE_INPUT(3)
DISCRETE_STEP(dst_rcfilter)
{
@@ -1012,11 +1012,11 @@ DISCRETE_RESET(dst_rcfilter)
* input[4] - Voltage reference. Usually 0V.
*
************************************************************************/
-#define DST_RCFILTER_SW__ENABLE DISCRETE_INPUT(0)
-#define DST_RCFILTER_SW__VIN DISCRETE_INPUT(1)
-#define DST_RCFILTER_SW__SWITCH DISCRETE_INPUT(2)
-#define DST_RCFILTER_SW__R DISCRETE_INPUT(3)
-#define DST_RCFILTER_SW__C(x) DISCRETE_INPUT(4+x)
+#define DST_RCFILTER_SW__ENABLE DISCRETE_INPUT(0)
+#define DST_RCFILTER_SW__VIN DISCRETE_INPUT(1)
+#define DST_RCFILTER_SW__SWITCH DISCRETE_INPUT(2)
+#define DST_RCFILTER_SW__R DISCRETE_INPUT(3)
+#define DST_RCFILTER_SW__C(x) DISCRETE_INPUT(4+x)
/* 74HC4066 : 15
* 74VHC4066 : 15
@@ -1119,13 +1119,13 @@ DISCRETE_RESET(dst_rcfilter_sw)
* input[5] - Capacitor Value (initialization only)
*
************************************************************************/
-#define DST_RCINTEGRATE__IN1 DISCRETE_INPUT(0)
-#define DST_RCINTEGRATE__R1 DISCRETE_INPUT(1)
-#define DST_RCINTEGRATE__R2 DISCRETE_INPUT(2)
-#define DST_RCINTEGRATE__R3 DISCRETE_INPUT(3)
-#define DST_RCINTEGRATE__C DISCRETE_INPUT(4)
-#define DST_RCINTEGRATE__VP DISCRETE_INPUT(5)
-#define DST_RCINTEGRATE__TYPE DISCRETE_INPUT(6)
+#define DST_RCINTEGRATE__IN1 DISCRETE_INPUT(0)
+#define DST_RCINTEGRATE__R1 DISCRETE_INPUT(1)
+#define DST_RCINTEGRATE__R2 DISCRETE_INPUT(2)
+#define DST_RCINTEGRATE__R3 DISCRETE_INPUT(3)
+#define DST_RCINTEGRATE__C DISCRETE_INPUT(4)
+#define DST_RCINTEGRATE__VP DISCRETE_INPUT(5)
+#define DST_RCINTEGRATE__TYPE DISCRETE_INPUT(6)
/* Ebers-Moll large signal model
* Couriersud:
@@ -1138,9 +1138,9 @@ DISCRETE_RESET(dst_rcfilter_sw)
*/
/* reverse saturation current */
-#define IES 7e-15
-#define ALPHAT 0.99
-#define KT 0.026
+#define IES 7e-15
+#define ALPHAT 0.99
+#define KT 0.026
#define EM_IC(x) (ALPHAT * IES * exp( (x) / KT - 1.0 ))
DISCRETE_STEP( dst_rcintegrate)
@@ -1188,9 +1188,9 @@ DISCRETE_STEP( dst_rcintegrate)
m_vCE = MIN(vP - 0.1, vP - RG * iQc);
/* Avoid oscillations
- * The method tends to largely overshoot - no wonder without
- * iterative solution approximation
- */
+ * The method tends to largely overshoot - no wonder without
+ * iterative solution approximation
+ */
m_vCE = MAX(m_vCE, 0.1 );
m_vCE = 0.1 * m_vCE + 0.9 * (vP - vE - iQ * DST_RCINTEGRATE__R3);
@@ -1249,9 +1249,9 @@ DISCRETE_RESET(dst_rcintegrate)
*
* 2008, couriersud
************************************************************************/
-#define DST_SALLEN_KEY__ENABLE DISCRETE_INPUT(0)
-#define DST_SALLEN_KEY__INP0 DISCRETE_INPUT(1)
-#define DST_SALLEN_KEY__TYPE DISCRETE_INPUT(2)
+#define DST_SALLEN_KEY__ENABLE DISCRETE_INPUT(0)
+#define DST_SALLEN_KEY__INP0 DISCRETE_INPUT(1)
+#define DST_SALLEN_KEY__TYPE DISCRETE_INPUT(2)
DISCRETE_STEP(dst_sallen_key)
{
@@ -1282,9 +1282,9 @@ DISCRETE_RESET(dst_sallen_key)
switch ((int) DST_SALLEN_KEY__TYPE)
{
case DISC_SALLEN_KEY_LOW_PASS:
- freq = 1.0 / ( 2.0 * M_PI * sqrt(info->c1 * info->c2 * info->r1 * info->r2));
- q = sqrt(info->c1 * info->c2 * info->r1 * info->r2) / (info->c2 * (info->r1 + info->r2));
- break;
+ freq = 1.0 / ( 2.0 * M_PI * sqrt(info->c1 * info->c2 * info->r1 * info->r2));
+ q = sqrt(info->c1 * info->c2 * info->r1 * info->r2) / (info->c2 * (info->r1 + info->r2));
+ break;
default:
fatalerror("Unknown sallen key filter type\n");
}
@@ -1307,10 +1307,10 @@ DISCRETE_RESET(dst_sallen_key)
* input[3] - Capacitor Value (initialization only)
*
************************************************************************/
-#define DST_RCFILTERN__ENABLE DISCRETE_INPUT(0)
-#define DST_RCFILTERN__IN DISCRETE_INPUT(1)
-#define DST_RCFILTERN__R DISCRETE_INPUT(2)
-#define DST_RCFILTERN__C DISCRETE_INPUT(3)
+#define DST_RCFILTERN__ENABLE DISCRETE_INPUT(0)
+#define DST_RCFILTERN__IN DISCRETE_INPUT(1)
+#define DST_RCFILTERN__R DISCRETE_INPUT(2)
+#define DST_RCFILTERN__C DISCRETE_INPUT(3)
#if 0
DISCRETE_RESET(dst_rcfilterN)
@@ -1341,10 +1341,10 @@ DISCRETE_RESET(dst_rcfilterN)
* input[3] - Capacitor Value (initialization only)
*
************************************************************************/
-#define DST_RCDISCN__ENABLE DISCRETE_INPUT(0)
-#define DST_RCDISCN__IN DISCRETE_INPUT(1)
-#define DST_RCDISCN__R DISCRETE_INPUT(2)
-#define DST_RCDISCN__C DISCRETE_INPUT(3)
+#define DST_RCDISCN__ENABLE DISCRETE_INPUT(0)
+#define DST_RCDISCN__IN DISCRETE_INPUT(1)
+#define DST_RCDISCN__R DISCRETE_INPUT(2)
+#define DST_RCDISCN__C DISCRETE_INPUT(3)
DISCRETE_RESET(dst_rcdiscN)
{
@@ -1398,12 +1398,12 @@ DISCRETE_STEP(dst_rcdiscN)
* input[5] - Capacitor Value (initialization only)
*
************************************************************************/
-#define DST_RCDISC2N__ENABLE DISCRETE_INPUT(0)
-#define DST_RCDISC2N__IN0 DISCRETE_INPUT(1)
-#define DST_RCDISC2N__R0 DISCRETE_INPUT(2)
-#define DST_RCDISC2N__IN1 DISCRETE_INPUT(3)
-#define DST_RCDISC2N__R1 DISCRETE_INPUT(4)
-#define DST_RCDISC2N__C DISCRETE_INPUT(5)
+#define DST_RCDISC2N__ENABLE DISCRETE_INPUT(0)
+#define DST_RCDISC2N__IN0 DISCRETE_INPUT(1)
+#define DST_RCDISC2N__R0 DISCRETE_INPUT(2)
+#define DST_RCDISC2N__IN1 DISCRETE_INPUT(3)
+#define DST_RCDISC2N__R1 DISCRETE_INPUT(4)
+#define DST_RCDISC2N__C DISCRETE_INPUT(5)
DISCRETE_STEP(dst_rcdisc2N)
diff --git a/src/emu/sound/disc_flt.h b/src/emu/sound/disc_flt.h
index 3a62857a8b7..a3a69a0fe7f 100644
--- a/src/emu/sound/disc_flt.h
+++ b/src/emu/sound/disc_flt.h
@@ -23,10 +23,10 @@
struct discrete_filter_coeff
{
- double x1, x2; /* x[k-1], x[k-2], previous 2 input values */
- double y1, y2; /* y[k-1], y[k-2], previous 2 output values */
- double a1, a2; /* digital filter coefficients, denominator */
- double b0, b1, b2; /* digital filter coefficients, numerator */
+ double x1, x2; /* x[k-1], x[k-2], previous 2 input values */
+ double y1, y2; /* y[k-1], y[k-2], previous 2 output values */
+ double a1, a2; /* digital filter coefficients, denominator */
+ double b0, b1, b2; /* digital filter coefficients, numerator */
};
@@ -44,134 +44,134 @@ DISCRETE_CLASS_STEP_RESET(dst_sallen_key, 1,
);
DISCRETE_CLASS_STEP_RESET(dst_crfilter, 1,
- double m_vCap;
- double m_rc;
- double m_exponent;
- UINT8 m_has_rc_nodes;
- UINT8 m_is_fast;
+ double m_vCap;
+ double m_rc;
+ double m_exponent;
+ UINT8 m_has_rc_nodes;
+ UINT8 m_is_fast;
);
DISCRETE_CLASS_STEP_RESET(dst_op_amp_filt, 1,
- int m_type; /* What kind of filter */
- int m_is_norton; /* 1 = Norton op-amps */
- double m_vRef;
- double m_vP;
- double m_vN;
- double m_rTotal; /* All input resistance in parallel. */
- double m_iFixed; /* Current supplied by r3 & r4 if used. */
- double m_exponentC1;
- double m_exponentC2;
- double m_exponentC3;
- double m_rRatio; /* divide ratio of resistance network */
- double m_vC1; /* Charge on C1 */
- double m_vC1b; /* Charge on C1, part of C1 charge if needed */
- double m_vC2; /* Charge on C2 */
- double m_vC3; /* Charge on C2 */
- double m_gain; /* Gain of the filter */
+ int m_type; /* What kind of filter */
+ int m_is_norton; /* 1 = Norton op-amps */
+ double m_vRef;
+ double m_vP;
+ double m_vN;
+ double m_rTotal; /* All input resistance in parallel. */
+ double m_iFixed; /* Current supplied by r3 & r4 if used. */
+ double m_exponentC1;
+ double m_exponentC2;
+ double m_exponentC3;
+ double m_rRatio; /* divide ratio of resistance network */
+ double m_vC1; /* Charge on C1 */
+ double m_vC1b; /* Charge on C1, part of C1 charge if needed */
+ double m_vC2; /* Charge on C2 */
+ double m_vC3; /* Charge on C2 */
+ double m_gain; /* Gain of the filter */
struct discrete_filter_coeff m_fc;
);
DISCRETE_CLASS_STEP_RESET(dst_rc_circuit_1, 1,
- double m_v_cap;
- double m_v_charge_1_2;
- double m_v_drop;
- double m_exp_1;
- double m_exp_1_2;
- double m_exp_2;
+ double m_v_cap;
+ double m_v_charge_1_2;
+ double m_v_drop;
+ double m_exp_1;
+ double m_exp_1_2;
+ double m_exp_2;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc, 1,
- int m_state;
- double m_t; /* time */
- double m_exponent0;
+ int m_state;
+ double m_t; /* time */
+ double m_exponent0;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc2, 1,
- int m_state;
- double m_v_out;
- double m_t; /* time */
- double m_exponent0;
- double m_exponent1;
+ int m_state;
+ double m_v_out;
+ double m_t; /* time */
+ double m_exponent0;
+ double m_exponent1;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc3, 1,
- int m_state;
- double m_v_out;
- double m_t; /* time */
- double m_exponent0;
- double m_exponent1;
- double m_v_diode; /* rcdisc3 */
+ int m_state;
+ double m_v_out;
+ double m_t; /* time */
+ double m_exponent0;
+ double m_exponent1;
+ double m_v_diode; /* rcdisc3 */
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc4, 1,
- int m_type;
- double m_max_out;
- double m_vC1;
- double m_v[2];
- double m_exp[2];
+ int m_type;
+ double m_max_out;
+ double m_vC1;
+ double m_v[2];
+ double m_exp[2];
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc5, 1,
- int m_state;
- double m_t; /* time */
- double m_exponent0;
- double m_v_cap; /* rcdisc5 */
+ int m_state;
+ double m_t; /* time */
+ double m_exponent0;
+ double m_v_cap; /* rcdisc5 */
);
DISCRETE_CLASS_STEP_RESET(dst_rcintegrate, 1,
- int m_type;
- double m_gain_r1_r2;
- double m_f; /* r2,r3 gain */
- double m_vCap;
- double m_vCE;
- double m_exponent0;
- double m_exponent1;
- double m_exp_exponent0;
- double m_exp_exponent1;
- double m_c_exp0;
- double m_c_exp1;
- double m_EM_IC_0_7;
+ int m_type;
+ double m_gain_r1_r2;
+ double m_f; /* r2,r3 gain */
+ double m_vCap;
+ double m_vCE;
+ double m_exponent0;
+ double m_exponent1;
+ double m_exp_exponent0;
+ double m_exp_exponent1;
+ double m_c_exp0;
+ double m_c_exp1;
+ double m_EM_IC_0_7;
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc_mod, 1,
- double m_v_cap;
- double m_exp_low[2];
- double m_exp_high[4];
- double m_gain[2];
- double m_vd_gain[4];
+ double m_v_cap;
+ double m_exp_low[2];
+ double m_exp_high[4];
+ double m_gain[2];
+ double m_vd_gain[4];
);
DISCRETE_CLASS_STEP_RESET(dst_rcfilter, 1,
- double m_v_out;
- double m_vCap;
- double m_rc;
- double m_exponent;
- UINT8 m_has_rc_nodes;
- UINT8 m_is_fast;
+ double m_v_out;
+ double m_vCap;
+ double m_rc;
+ double m_exponent;
+ UINT8 m_has_rc_nodes;
+ UINT8 m_is_fast;
);
DISCRETE_CLASS_STEP_RESET(dst_rcfilter_sw, 1,
- double m_vCap[4];
- double m_exp[4];
- double m_exp0; /* fast case bit 0 */
- double m_exp1; /* fast case bit 1 */
- double m_factor; /* fast case */
- double m_f1[16];
- double m_f2[16];
+ double m_vCap[4];
+ double m_exp[4];
+ double m_exp0; /* fast case bit 0 */
+ double m_exp1; /* fast case bit 1 */
+ double m_factor; /* fast case */
+ double m_f1[16];
+ double m_f2[16];
);
DISCRETE_CLASS_STEP_RESET(dst_rcdiscN, 1,
- double m_x1; /* x[k-1], previous input value */
- double m_y1; /* y[k-1], previous output value */
- double m_a1; /* digital filter coefficients, denominator */
- double m_b[2]; /* digital filter coefficients, numerator */
+ double m_x1; /* x[k-1], previous input value */
+ double m_y1; /* y[k-1], previous output value */
+ double m_a1; /* digital filter coefficients, denominator */
+ double m_b[2]; /* digital filter coefficients, numerator */
);
DISCRETE_CLASS_STEP_RESET(dst_rcdisc2N, 1,
struct discrete_filter_coeff m_fc0;
struct discrete_filter_coeff m_fc1;
- double m_x1;
- double m_y1;
+ double m_x1;
+ double m_y1;
);
diff --git a/src/emu/sound/disc_inp.c b/src/emu/sound/disc_inp.c
index 7f7cba46ed5..cfcbd5ef50f 100644
--- a/src/emu/sound/disc_inp.c
+++ b/src/emu/sound/disc_inp.c
@@ -16,14 +16,14 @@
************************************************************************/
-#define DSS_INPUT__GAIN DISCRETE_INPUT(0)
-#define DSS_INPUT__OFFSET DISCRETE_INPUT(1)
-#define DSS_INPUT__INIT DISCRETE_INPUT(2)
+#define DSS_INPUT__GAIN DISCRETE_INPUT(0)
+#define DSS_INPUT__OFFSET DISCRETE_INPUT(1)
+#define DSS_INPUT__INIT DISCRETE_INPUT(2)
READ8_DEVICE_HANDLER(discrete_sound_r)
{
discrete_device *disc_device = downcast<discrete_device *>(device);
- return disc_device->read( disc_device->machine().firstcpu->space(), offset, 0xff);
+ return disc_device->read( disc_device->machine().firstcpu->space(), offset, 0xff);
}
@@ -46,12 +46,12 @@ WRITE8_DEVICE_HANDLER(discrete_sound_w)
* input[6] -
*
************************************************************************/
-#define DSS_ADJUSTMENT__MIN DISCRETE_INPUT(0)
-#define DSS_ADJUSTMENT__MAX DISCRETE_INPUT(1)
-#define DSS_ADJUSTMENT__LOG DISCRETE_INPUT(2)
-#define DSS_ADJUSTMENT__PORT DISCRETE_INPUT(3)
-#define DSS_ADJUSTMENT__PMIN DISCRETE_INPUT(4)
-#define DSS_ADJUSTMENT__PMAX DISCRETE_INPUT(5)
+#define DSS_ADJUSTMENT__MIN DISCRETE_INPUT(0)
+#define DSS_ADJUSTMENT__MAX DISCRETE_INPUT(1)
+#define DSS_ADJUSTMENT__LOG DISCRETE_INPUT(2)
+#define DSS_ADJUSTMENT__PORT DISCRETE_INPUT(3)
+#define DSS_ADJUSTMENT__PMIN DISCRETE_INPUT(4)
+#define DSS_ADJUSTMENT__PMAX DISCRETE_INPUT(5)
DISCRETE_STEP(dss_adjustment)
{
@@ -112,7 +112,7 @@ DISCRETE_RESET(dss_adjustment)
* input[0] - Constant value
*
************************************************************************/
-#define DSS_CONSTANT__INIT DISCRETE_INPUT(0)
+#define DSS_CONSTANT__INIT DISCRETE_INPUT(0)
DISCRETE_RESET(dss_constant)
{
@@ -250,9 +250,9 @@ void DISCRETE_CLASS_FUNC(dss_input_pulse, input_write)(int sub_node, UINT8 data
* input[2] - Offset value
*
************************************************************************/
-#define DSS_INPUT_STREAM__STREAM DISCRETE_INPUT(0)
-#define DSS_INPUT_STREAM__GAIN DISCRETE_INPUT(1)
-#define DSS_INPUT_STREAM__OFFSET DISCRETE_INPUT(2)
+#define DSS_INPUT_STREAM__STREAM DISCRETE_INPUT(0)
+#define DSS_INPUT_STREAM__GAIN DISCRETE_INPUT(1)
+#define DSS_INPUT_STREAM__OFFSET DISCRETE_INPUT(2)
STREAM_UPDATE( discrete_dss_input_stream_node::static_stream_generate )
{
@@ -265,7 +265,7 @@ void discrete_dss_input_stream_node::stream_generate(stream_sample_t **inputs, s
int samplenum = samples;
while (samplenum-- > 0)
- *(ptr++) = m_data;
+ *(ptr++) = m_data;
}
DISCRETE_STEP(dss_input_stream)
{
diff --git a/src/emu/sound/disc_mth.c b/src/emu/sound/disc_mth.c
index 1cb23b633ca..c3f52ca27f3 100644
--- a/src/emu/sound/disc_mth.c
+++ b/src/emu/sound/disc_mth.c
@@ -62,11 +62,11 @@
* input[4] - Channel3 input value
*
************************************************************************/
-#define DST_ADDER__ENABLE DISCRETE_INPUT(0)
-#define DST_ADDER__IN0 DISCRETE_INPUT(1)
-#define DST_ADDER__IN1 DISCRETE_INPUT(2)
-#define DST_ADDER__IN2 DISCRETE_INPUT(3)
-#define DST_ADDER__IN3 DISCRETE_INPUT(4)
+#define DST_ADDER__ENABLE DISCRETE_INPUT(0)
+#define DST_ADDER__IN0 DISCRETE_INPUT(1)
+#define DST_ADDER__IN1 DISCRETE_INPUT(2)
+#define DST_ADDER__IN2 DISCRETE_INPUT(3)
+#define DST_ADDER__IN3 DISCRETE_INPUT(4)
DISCRETE_STEP(dst_adder)
{
@@ -91,7 +91,7 @@ DISCRETE_STEP(dst_adder)
*
* Mar 2004, D Renaud.
************************************************************************/
-#define DST_COMP_ADDER__SELECT DISCRETE_INPUT(0)
+#define DST_COMP_ADDER__SELECT DISCRETE_INPUT(0)
DISCRETE_STEP(dst_comp_adder)
{
@@ -148,9 +148,9 @@ DISCRETE_RESET(dst_comp_adder)
* input[2] - Maximum value
*
************************************************************************/
-#define DST_CLAMP__IN DISCRETE_INPUT(0)
-#define DST_CLAMP__MIN DISCRETE_INPUT(1)
-#define DST_CLAMP__MAX DISCRETE_INPUT(2)
+#define DST_CLAMP__IN DISCRETE_INPUT(0)
+#define DST_CLAMP__MIN DISCRETE_INPUT(1)
+#define DST_CLAMP__MAX DISCRETE_INPUT(2)
DISCRETE_STEP(dst_clamp)
{
@@ -175,15 +175,15 @@ DISCRETE_STEP(dst_clamp)
* Mar 2004, D Renaud.
* Nov 2010, D Renaud. - optimized for speed
************************************************************************/
-#define DST_DAC_R1__DATA DISCRETE_INPUT(0)
-#define DST_DAC_R1__VON DISCRETE_INPUT(1)
+#define DST_DAC_R1__DATA DISCRETE_INPUT(0)
+#define DST_DAC_R1__VON DISCRETE_INPUT(1)
DISCRETE_STEP(dst_dac_r1)
{
- int data = (int)DST_DAC_R1__DATA;
- double v = m_v_step[data];
- double x_time = DST_DAC_R1__DATA - data;
- double last_v = m_last_v;
+ int data = (int)DST_DAC_R1__DATA;
+ double v = m_v_step[data];
+ double x_time = DST_DAC_R1__DATA - data;
+ double last_v = m_last_v;
m_last_v = v;
@@ -212,7 +212,7 @@ DISCRETE_RESET(dst_dac_r1)
{
DISCRETE_DECLARE_INFO(discrete_dac_r1_ladder)
- int bit;
+ int bit;
int ladderLength = info->ladderLength;
int total_steps = 1 << ladderLength;
double r_total = 0;
@@ -228,10 +228,10 @@ DISCRETE_RESET(dst_dac_r1)
i_bias = 0;
/*
- * We will do a small amount of error checking.
- * But if you are an idiot and pass a bad ladder table
- * then you deserve a crash.
- */
+ * We will do a small amount of error checking.
+ * But if you are an idiot and pass a bad ladder table
+ * then you deserve a crash.
+ */
if (ladderLength < 2 && info->rBias == 0 && info->rGnd == 0)
{
/* You need at least 2 resistors for a ladder */
@@ -243,10 +243,10 @@ DISCRETE_RESET(dst_dac_r1)
}
/*
- * Calculate the total of all resistors in parallel.
- * This is the combined resistance of the voltage sources.
- * This is used for the charging curve.
- */
+ * Calculate the total of all resistors in parallel.
+ * This is the combined resistance of the voltage sources.
+ * This is used for the charging curve.
+ */
for(bit = 0; bit < ladderLength; bit++)
{
if (info->r[bit] > 0)
@@ -302,13 +302,13 @@ DISCRETE_RESET(dst_dac_r1)
*
* Dec 2004, D Renaud.
************************************************************************/
-#define DST_DIODE_MIX_INP_OFFSET 0
-#define DST_DIODE_MIX__INP(addr) DISCRETE_INPUT(DST_DIODE_MIX_INP_OFFSET + addr)
+#define DST_DIODE_MIX_INP_OFFSET 0
+#define DST_DIODE_MIX__INP(addr) DISCRETE_INPUT(DST_DIODE_MIX_INP_OFFSET + addr)
DISCRETE_STEP(dst_diode_mix)
{
- double val, max = 0;
- int addr;
+ double val, max = 0;
+ int addr;
for (addr = 0; addr < m_size; addr++)
{
@@ -323,7 +323,7 @@ DISCRETE_RESET(dst_diode_mix)
{
DISCRETE_DECLARE_INFO(double)
- int addr;
+ int addr;
m_size = this->active_inputs() - DST_DIODE_MIX_INP_OFFSET;
assert(m_size <= 8);
@@ -354,9 +354,9 @@ DISCRETE_RESET(dst_diode_mix)
* input[2] - Divisor
*
************************************************************************/
-#define DST_DIVIDE__ENABLE DISCRETE_INPUT(0)
-#define DST_DIVIDE__IN DISCRETE_INPUT(1)
-#define DST_DIVIDE__DIV DISCRETE_INPUT(2)
+#define DST_DIVIDE__ENABLE DISCRETE_INPUT(0)
+#define DST_DIVIDE__IN DISCRETE_INPUT(1)
+#define DST_DIVIDE__DIV DISCRETE_INPUT(2)
DISCRETE_STEP(dst_divide)
{
@@ -364,12 +364,12 @@ DISCRETE_STEP(dst_divide)
{
if(DST_DIVIDE__DIV == 0)
{
- set_output(0, DBL_MAX); /* Max out but don't break */
+ set_output(0, DBL_MAX); /* Max out but don't break */
m_device->discrete_log("dst_divider_step() - Divide by Zero attempted in NODE_%02d.\n",this->index());
}
else
{
- set_output(0, DST_DIVIDE__IN / DST_DIVIDE__DIV);
+ set_output(0, DST_DIVIDE__IN / DST_DIVIDE__DIV);
}
}
else
@@ -388,9 +388,9 @@ DISCRETE_STEP(dst_divide)
* input[2] - Final addition offset
*
************************************************************************/
-#define DST_GAIN__IN DISCRETE_INPUT(0)
-#define DST_GAIN__GAIN DISCRETE_INPUT(1)
-#define DST_GAIN__OFFSET DISCRETE_INPUT(2)
+#define DST_GAIN__IN DISCRETE_INPUT(0)
+#define DST_GAIN__GAIN DISCRETE_INPUT(1)
+#define DST_GAIN__OFFSET DISCRETE_INPUT(2)
DISCRETE_STEP(dst_gain)
{
@@ -409,8 +409,8 @@ DISCRETE_STEP(dst_gain)
*
* Mar 2004, D Renaud.
************************************************************************/
-#define DST_INTEGRATE__TRG0 DISCRETE_INPUT(0)
-#define DST_INTEGRATE__TRG1 DISCRETE_INPUT(1)
+#define DST_INTEGRATE__TRG0 DISCRETE_INPUT(0)
+#define DST_INTEGRATE__TRG1 DISCRETE_INPUT(1)
static int dst_trigger_function(int trig0, int trig1, int trig2, int function)
{
@@ -450,9 +450,9 @@ DISCRETE_STEP(dst_integrate)
{
DISCRETE_DECLARE_INFO(discrete_integrate_info)
- int trig0, trig1;
- double i_neg = 0; /* current into - input */
- double i_pos = 0; /* current into + input */
+ int trig0, trig1;
+ double i_neg = 0; /* current into - input */
+ double i_pos = 0; /* current into + input */
switch (info->type)
{
@@ -460,8 +460,8 @@ DISCRETE_STEP(dst_integrate)
if (DST_INTEGRATE__TRG0 != 0)
{
/* This forces the cap to completely charge,
- * and the output to go to it's max value.
- */
+ * and the output to go to it's max value.
+ */
m_v_out = m_v_max_out;
set_output(0, m_v_out);
return;
@@ -497,7 +497,7 @@ DISCRETE_RESET(dst_integrate)
{
DISCRETE_DECLARE_INFO(discrete_integrate_info)
- double i, v;
+ double i, v;
if (info->type & DISC_OP_AMP_IS_NORTON)
{
@@ -509,8 +509,8 @@ DISCRETE_RESET(dst_integrate)
{
m_v_max_out = info->vP - OP_AMP_VP_RAIL_OFFSET;
- v = info->v1 * info->r3 / (info->r2 + info->r3); /* vRef */
- v = info->v1 - v; /* actual charging voltage */
+ v = info->v1 * info->r3 / (info->r2 + info->r3); /* vRef */
+ v = info->v1 - v; /* actual charging voltage */
i = v / info->r1;
m_change = i / this->sample_rate() / info->c;
}
@@ -527,7 +527,7 @@ DISCRETE_RESET(dst_integrate)
* input[1] - input[0] value
*
************************************************************************/
-#define DST_LOGIC_INV__IN DISCRETE_INPUT(0)
+#define DST_LOGIC_INV__IN DISCRETE_INPUT(0)
DISCRETE_STEP(dst_logic_inv)
{
@@ -539,10 +539,10 @@ DISCRETE_STEP(dst_logic_inv)
* DST_BITS_DECODE - Decode Bits from input node
*
************************************************************************/
-#define DST_BITS_DECODE__IN DISCRETE_INPUT(0)
-#define DST_BITS_DECODE__FROM DISCRETE_INPUT(1)
-#define DST_BITS_DECODE__TO DISCRETE_INPUT(2)
-#define DST_BITS_DECODE__VOUT DISCRETE_INPUT(3)
+#define DST_BITS_DECODE__IN DISCRETE_INPUT(0)
+#define DST_BITS_DECODE__FROM DISCRETE_INPUT(1)
+#define DST_BITS_DECODE__TO DISCRETE_INPUT(2)
+#define DST_BITS_DECODE__VOUT DISCRETE_INPUT(3)
DISCRETE_STEP(dst_bits_decode)
{
@@ -626,10 +626,10 @@ DISCRETE_RESET(dst_bits_decode)
* input[3] - input[3] value
*
************************************************************************/
-#define DST_LOGIC_AND__IN0 DISCRETE_INPUT(0)
-#define DST_LOGIC_AND__IN1 DISCRETE_INPUT(1)
-#define DST_LOGIC_AND__IN2 DISCRETE_INPUT(2)
-#define DST_LOGIC_AND__IN3 DISCRETE_INPUT(3)
+#define DST_LOGIC_AND__IN0 DISCRETE_INPUT(0)
+#define DST_LOGIC_AND__IN1 DISCRETE_INPUT(1)
+#define DST_LOGIC_AND__IN2 DISCRETE_INPUT(2)
+#define DST_LOGIC_AND__IN3 DISCRETE_INPUT(3)
DISCRETE_STEP(dst_logic_and)
{
@@ -646,10 +646,10 @@ DISCRETE_STEP(dst_logic_and)
* input[3] - input[3] value
*
************************************************************************/
-#define DST_LOGIC_NAND__IN0 DISCRETE_INPUT(0)
-#define DST_LOGIC_NAND__IN1 DISCRETE_INPUT(1)
-#define DST_LOGIC_NAND__IN2 DISCRETE_INPUT(2)
-#define DST_LOGIC_NAND__IN3 DISCRETE_INPUT(3)
+#define DST_LOGIC_NAND__IN0 DISCRETE_INPUT(0)
+#define DST_LOGIC_NAND__IN1 DISCRETE_INPUT(1)
+#define DST_LOGIC_NAND__IN2 DISCRETE_INPUT(2)
+#define DST_LOGIC_NAND__IN3 DISCRETE_INPUT(3)
DISCRETE_STEP(dst_logic_nand)
{
@@ -666,10 +666,10 @@ DISCRETE_STEP(dst_logic_nand)
* input[3] - input[3] value
*
************************************************************************/
-#define DST_LOGIC_OR__IN0 DISCRETE_INPUT(0)
-#define DST_LOGIC_OR__IN1 DISCRETE_INPUT(1)
-#define DST_LOGIC_OR__IN2 DISCRETE_INPUT(2)
-#define DST_LOGIC_OR__IN3 DISCRETE_INPUT(3)
+#define DST_LOGIC_OR__IN0 DISCRETE_INPUT(0)
+#define DST_LOGIC_OR__IN1 DISCRETE_INPUT(1)
+#define DST_LOGIC_OR__IN2 DISCRETE_INPUT(2)
+#define DST_LOGIC_OR__IN3 DISCRETE_INPUT(3)
DISCRETE_STEP(dst_logic_or)
{
@@ -686,10 +686,10 @@ DISCRETE_STEP(dst_logic_or)
* input[3] - input[3] value
*
************************************************************************/
-#define DST_LOGIC_NOR__IN0 DISCRETE_INPUT(0)
-#define DST_LOGIC_NOR__IN1 DISCRETE_INPUT(1)
-#define DST_LOGIC_NOR__IN2 DISCRETE_INPUT(2)
-#define DST_LOGIC_NOR__IN3 DISCRETE_INPUT(3)
+#define DST_LOGIC_NOR__IN0 DISCRETE_INPUT(0)
+#define DST_LOGIC_NOR__IN1 DISCRETE_INPUT(1)
+#define DST_LOGIC_NOR__IN2 DISCRETE_INPUT(2)
+#define DST_LOGIC_NOR__IN3 DISCRETE_INPUT(3)
DISCRETE_STEP(dst_logic_nor)
{
@@ -704,8 +704,8 @@ DISCRETE_STEP(dst_logic_nor)
* input[1] - input[1] value
*
************************************************************************/
-#define DST_LOGIC_XOR__IN0 DISCRETE_INPUT(0)
-#define DST_LOGIC_XOR__IN1 DISCRETE_INPUT(1)
+#define DST_LOGIC_XOR__IN0 DISCRETE_INPUT(0)
+#define DST_LOGIC_XOR__IN1 DISCRETE_INPUT(1)
DISCRETE_STEP(dst_logic_xor)
{
@@ -720,8 +720,8 @@ DISCRETE_STEP(dst_logic_xor)
* input[1] - input[1] value
*
************************************************************************/
-#define DST_LOGIC_XNOR__IN0 DISCRETE_INPUT(0)
-#define DST_LOGIC_XNOR__IN1 DISCRETE_INPUT(1)
+#define DST_LOGIC_XNOR__IN0 DISCRETE_INPUT(0)
+#define DST_LOGIC_XNOR__IN1 DISCRETE_INPUT(1)
DISCRETE_STEP(dst_logic_nxor)
{
@@ -739,10 +739,10 @@ DISCRETE_STEP(dst_logic_nxor)
* input[3] - data
*
************************************************************************/
-#define DST_LOGIC_DFF__RESET !DISCRETE_INPUT(0)
-#define DST_LOGIC_DFF__SET !DISCRETE_INPUT(1)
-#define DST_LOGIC_DFF__CLOCK DISCRETE_INPUT(2)
-#define DST_LOGIC_DFF__DATA DISCRETE_INPUT(3)
+#define DST_LOGIC_DFF__RESET !DISCRETE_INPUT(0)
+#define DST_LOGIC_DFF__SET !DISCRETE_INPUT(1)
+#define DST_LOGIC_DFF__CLOCK DISCRETE_INPUT(2)
+#define DST_LOGIC_DFF__DATA DISCRETE_INPUT(3)
DISCRETE_STEP(dst_logic_dff)
{
@@ -752,7 +752,7 @@ DISCRETE_STEP(dst_logic_dff)
set_output(0, 0);
else if (DST_LOGIC_DFF__SET)
set_output(0, 1);
- else if (!m_last_clk && clk) /* low to high */
+ else if (!m_last_clk && clk) /* low to high */
set_output(0, DST_LOGIC_DFF__DATA);
m_last_clk = clk;
}
@@ -775,11 +775,11 @@ DISCRETE_RESET(dst_logic_dff)
* input[4] - K
*
************************************************************************/
-#define DST_LOGIC_JKFF__RESET !DISCRETE_INPUT(0)
-#define DST_LOGIC_JKFF__SET !DISCRETE_INPUT(1)
-#define DST_LOGIC_JKFF__CLOCK DISCRETE_INPUT(2)
-#define DST_LOGIC_JKFF__J DISCRETE_INPUT(3)
-#define DST_LOGIC_JKFF__K DISCRETE_INPUT(4)
+#define DST_LOGIC_JKFF__RESET !DISCRETE_INPUT(0)
+#define DST_LOGIC_JKFF__SET !DISCRETE_INPUT(1)
+#define DST_LOGIC_JKFF__CLOCK DISCRETE_INPUT(2)
+#define DST_LOGIC_JKFF__J DISCRETE_INPUT(3)
+#define DST_LOGIC_JKFF__K DISCRETE_INPUT(4)
DISCRETE_STEP(dst_logic_jkff)
{
@@ -791,7 +791,7 @@ DISCRETE_STEP(dst_logic_jkff)
m_v_out = 0;
else if (DST_LOGIC_JKFF__SET)
m_v_out = 1;
- else if (m_last_clk && !clk) /* high to low */
+ else if (m_last_clk && !clk) /* high to low */
{
if (!j)
{
@@ -826,17 +826,17 @@ DISCRETE_RESET(dst_logic_jkff)
* DST_LOGIC_SHIFT - Shift Register implementation
*
************************************************************************/
-#define DST_LOGIC_SHIFT__IN DISCRETE_INPUT(0)
-#define DST_LOGIC_SHIFT__RESET DISCRETE_INPUT(1)
-#define DST_LOGIC_SHIFT__CLK DISCRETE_INPUT(2)
-#define DST_LOGIC_SHIFT__SIZE DISCRETE_INPUT(3)
-#define DST_LOGIC_SHIFT__OPTIONS DISCRETE_INPUT(4)
+#define DST_LOGIC_SHIFT__IN DISCRETE_INPUT(0)
+#define DST_LOGIC_SHIFT__RESET DISCRETE_INPUT(1)
+#define DST_LOGIC_SHIFT__CLK DISCRETE_INPUT(2)
+#define DST_LOGIC_SHIFT__SIZE DISCRETE_INPUT(3)
+#define DST_LOGIC_SHIFT__OPTIONS DISCRETE_INPUT(4)
DISCRETE_STEP(dst_logic_shift)
{
- double cycles;
- double ds_clock;
- int clock = 0, inc = 0;
+ double cycles;
+ double ds_clock;
+ int clock = 0, inc = 0;
int input_bit = (DST_LOGIC_SHIFT__IN != 0) ? 1 : 0;
ds_clock = DST_LOGIC_SHIFT__CLK;
@@ -930,14 +930,14 @@ DISCRETE_RESET(dst_logic_shift)
*
* Feb 2007, D Renaud.
************************************************************************/
-#define DST_LOOKUP_TABLE__IN DISCRETE_INPUT(0)
-#define DST_LOOKUP_TABLE__SIZE DISCRETE_INPUT(1)
+#define DST_LOOKUP_TABLE__IN DISCRETE_INPUT(0)
+#define DST_LOOKUP_TABLE__SIZE DISCRETE_INPUT(1)
DISCRETE_STEP(dst_lookup_table)
{
DISCRETE_DECLARE_INFO(double)
- int addr = DST_LOOKUP_TABLE__IN;
+ int addr = DST_LOOKUP_TABLE__IN;
if (addr < 0 || addr >= DST_LOOKUP_TABLE__SIZE)
set_output(0, 0);
@@ -996,25 +996,25 @@ DISCRETE_STEP(dst_lookup_table)
* The voltage is then modified by an inverting amp formula.
* v = vRef + (rF/rI) * (vRef - (i * r))
*/
-#define DST_MIXER__ENABLE DISCRETE_INPUT(0)
-#define DST_MIXER__IN(bit) DISCRETE_INPUT(bit + 1)
+#define DST_MIXER__ENABLE DISCRETE_INPUT(0)
+#define DST_MIXER__IN(bit) DISCRETE_INPUT(bit + 1)
DISCRETE_STEP(dst_mixer)
{
DISCRETE_DECLARE_INFO(discrete_mixer_desc)
- double v, vTemp, r_total, rTemp, rTemp2 = 0;
- double i = 0; /* total current of inputs */
- int bit, connected;
+ double v, vTemp, r_total, rTemp, rTemp2 = 0;
+ double i = 0; /* total current of inputs */
+ int bit, connected;
/* put commonly used stuff in local variables for speed */
- int r_node_bit_flag = m_r_node_bit_flag;
- int c_bit_flag = m_c_bit_flag;
- int bit_mask = 1;
- int has_rF = (info->rF != 0);
- int type = m_type;
- double v_ref = info->vRef;
- double rI = info->rI;
+ int r_node_bit_flag = m_r_node_bit_flag;
+ int c_bit_flag = m_c_bit_flag;
+ int bit_mask = 1;
+ int has_rF = (info->rF != 0);
+ int type = m_type;
+ double v_ref = info->vRef;
+ double rI = info->rI;
if (EXPECTED(DST_MIXER__ENABLE))
{
@@ -1123,7 +1123,7 @@ DISCRETE_STEP(dst_mixer)
r_total = 1.0 / r_total;
/* If resistor network or has rI then Millman is used.
- * If op-amp then summing formula is used. */
+ * If op-amp then summing formula is used. */
v = i * ((type == DISC_MIXER_IS_OP_AMP) ? info->rF : r_total);
if (UNEXPECTED(type == DISC_MIXER_IS_OP_AMP_WITH_RI))
@@ -1160,8 +1160,8 @@ DISCRETE_RESET(dst_mixer)
{
DISCRETE_DECLARE_INFO(discrete_mixer_desc)
- int bit;
- double rTemp = 0;
+ int bit;
+ double rTemp = 0;
/* link to r_node outputs */
m_r_node_bit_flag = 0;
@@ -1181,20 +1181,20 @@ DISCRETE_RESET(dst_mixer)
m_size = this->active_inputs() - 1;
/*
- * THERE IS NO ERROR CHECKING!!!!!!!!!
- * If you pass a bad ladder table
- * then you deserve a crash.
- */
+ * THERE IS NO ERROR CHECKING!!!!!!!!!
+ * If you pass a bad ladder table
+ * then you deserve a crash.
+ */
m_type = info->type;
if ((info->type == DISC_MIXER_IS_OP_AMP) && (info->rI != 0))
m_type = DISC_MIXER_IS_OP_AMP_WITH_RI;
/*
- * Calculate the total of all resistors in parallel.
- * This is the combined resistance of the voltage sources.
- * Also calculate the exponents while we are here.
- */
+ * Calculate the total of all resistors in parallel.
+ * This is the combined resistance of the voltage sources.
+ * Also calculate the exponents while we are here.
+ */
m_r_total = 0;
for(bit = 0; bit < m_size; bit++)
{
@@ -1270,14 +1270,14 @@ DISCRETE_RESET(dst_mixer)
*
* Dec 2004, D Renaud.
************************************************************************/
-#define DST_MULTIPLEX__ADDR DISCRETE_INPUT(0)
-#define DST_MULTIPLEX__INP(addr) DISCRETE_INPUT(1 + addr)
+#define DST_MULTIPLEX__ADDR DISCRETE_INPUT(0)
+#define DST_MULTIPLEX__INP(addr) DISCRETE_INPUT(1 + addr)
DISCRETE_STEP(dst_multiplex)
{
int addr;
- addr = DST_MULTIPLEX__ADDR; /* FP to INT */
+ addr = DST_MULTIPLEX__ADDR; /* FP to INT */
if ((addr >= 0) && (addr < m_size))
{
set_output(0, DST_MULTIPLEX__INP(addr));
@@ -1309,11 +1309,11 @@ DISCRETE_RESET(dst_multiplex)
*
* Complete re-write Jan 2004, D Renaud.
************************************************************************/
-#define DST_ONESHOT__RESET DISCRETE_INPUT(0)
-#define DST_ONESHOT__TRIG DISCRETE_INPUT(1)
-#define DST_ONESHOT__AMP DISCRETE_INPUT(2)
-#define DST_ONESHOT__WIDTH DISCRETE_INPUT(3)
-#define DST_ONESHOT__TYPE (int)DISCRETE_INPUT(4)
+#define DST_ONESHOT__RESET DISCRETE_INPUT(0)
+#define DST_ONESHOT__TRIG DISCRETE_INPUT(1)
+#define DST_ONESHOT__AMP DISCRETE_INPUT(2)
+#define DST_ONESHOT__WIDTH DISCRETE_INPUT(3)
+#define DST_ONESHOT__TYPE (int)DISCRETE_INPUT(4)
DISCRETE_STEP(dst_oneshot)
{
@@ -1397,12 +1397,12 @@ DISCRETE_RESET(dst_oneshot)
* input[5] - Clamp value when disabled
*
************************************************************************/
-#define DST_RAMP__ENABLE DISCRETE_INPUT(0)
-#define DST_RAMP__DIR DISCRETE_INPUT(1)
-#define DST_RAMP__GRAD DISCRETE_INPUT(2)
-#define DST_RAMP__START DISCRETE_INPUT(3)
-#define DST_RAMP__END DISCRETE_INPUT(4)
-#define DST_RAMP__CLAMP DISCRETE_INPUT(5)
+#define DST_RAMP__ENABLE DISCRETE_INPUT(0)
+#define DST_RAMP__DIR DISCRETE_INPUT(1)
+#define DST_RAMP__GRAD DISCRETE_INPUT(2)
+#define DST_RAMP__START DISCRETE_INPUT(3)
+#define DST_RAMP__END DISCRETE_INPUT(4)
+#define DST_RAMP__CLAMP DISCRETE_INPUT(5)
DISCRETE_STEP(dst_ramp)
{
@@ -1449,9 +1449,9 @@ DISCRETE_RESET(dst_ramp)
* input[2] - clock type
*
************************************************************************/
-#define DST_SAMPHOLD__IN0 DISCRETE_INPUT(0)
-#define DST_SAMPHOLD__CLOCK DISCRETE_INPUT(1)
-#define DST_SAMPHOLD__TYPE DISCRETE_INPUT(2)
+#define DST_SAMPHOLD__IN0 DISCRETE_INPUT(0)
+#define DST_SAMPHOLD__CLOCK DISCRETE_INPUT(1)
+#define DST_SAMPHOLD__TYPE DISCRETE_INPUT(2)
DISCRETE_STEP(dst_samphold)
{
@@ -1501,10 +1501,10 @@ DISCRETE_RESET(dst_samphold)
* input[3] - input[1]
*
************************************************************************/
-#define DST_SWITCH__ENABLE DISCRETE_INPUT(0)
-#define DST_SWITCH__SWITCH DISCRETE_INPUT(1)
-#define DST_SWITCH__IN0 DISCRETE_INPUT(2)
-#define DST_SWITCH__IN1 DISCRETE_INPUT(3)
+#define DST_SWITCH__ENABLE DISCRETE_INPUT(0)
+#define DST_SWITCH__SWITCH DISCRETE_INPUT(1)
+#define DST_SWITCH__IN0 DISCRETE_INPUT(2)
+#define DST_SWITCH__IN1 DISCRETE_INPUT(3)
DISCRETE_STEP(dst_switch)
{
@@ -1527,9 +1527,9 @@ DISCRETE_STEP(dst_switch)
* input[3] - Threshold for enable
*
************************************************************************/
-#define DST_ASWITCH__CTRL DISCRETE_INPUT(0)
-#define DST_ASWITCH__IN DISCRETE_INPUT(1)
-#define DST_ASWITCH__THRESHOLD DISCRETE_INPUT(2)
+#define DST_ASWITCH__CTRL DISCRETE_INPUT(0)
+#define DST_ASWITCH__IN DISCRETE_INPUT(1)
+#define DST_ASWITCH__THRESHOLD DISCRETE_INPUT(2)
DISCRETE_STEP(dst_aswitch)
@@ -1548,7 +1548,7 @@ DISCRETE_STEP(dst_aswitch)
* input[4] - Channel4 input value
*
************************************************************************/
-#define MAX_TRANS_STACK 16
+#define MAX_TRANS_STACK 16
struct double_stack {
public:
@@ -1573,7 +1573,7 @@ private:
DISCRETE_STEP(dst_transform)
{
- double_stack stack;
+ double_stack stack;
double top;
enum token *fPTR = &precomp[0];
@@ -1584,26 +1584,26 @@ DISCRETE_STEP(dst_transform)
{
switch (*fPTR++)
{
- case TOK_MULT: top = stack.pop() * top; break;
- case TOK_DIV: top = stack.pop() / top; break;
- case TOK_ADD: top = stack.pop() + top; break;
- case TOK_MINUS: top = stack.pop() - top; break;
- case TOK_0: stack.push(top); top = I_IN0(); break;
- case TOK_1: stack.push(top); top = I_IN1(); break;
- case TOK_2: stack.push(top); top = I_IN2(); break;
- case TOK_3: stack.push(top); top = I_IN3(); break;
- case TOK_4: stack.push(top); top = I_IN4(); break;
- case TOK_DUP: stack.push(top); break;
- case TOK_ABS: top = fabs(top); break; /* absolute value */
- case TOK_NEG: top = -top; break; /* * -1 */
- case TOK_NOT: top = !top; break; /* Logical NOT of Last Value */
- case TOK_EQUAL: top = (int)stack.pop() == (int)top; break; /* Logical = */
- case TOK_GREATER: top = (stack.pop() > top); break; /* Logical > */
- case TOK_LESS: top = (stack.pop() < top); break; /* Logical < */
- case TOK_AND: top = (int)stack.pop() & (int)top; break; /* Bitwise AND */
- case TOK_OR: top = (int)stack.pop() | (int)top; break; /* Bitwise OR */
- case TOK_XOR: top = (int)stack.pop() ^ (int)top; break; /* Bitwise XOR */
- case TOK_END: break; /* please compiler */
+ case TOK_MULT: top = stack.pop() * top; break;
+ case TOK_DIV: top = stack.pop() / top; break;
+ case TOK_ADD: top = stack.pop() + top; break;
+ case TOK_MINUS: top = stack.pop() - top; break;
+ case TOK_0: stack.push(top); top = I_IN0(); break;
+ case TOK_1: stack.push(top); top = I_IN1(); break;
+ case TOK_2: stack.push(top); top = I_IN2(); break;
+ case TOK_3: stack.push(top); top = I_IN3(); break;
+ case TOK_4: stack.push(top); top = I_IN4(); break;
+ case TOK_DUP: stack.push(top); break;
+ case TOK_ABS: top = fabs(top); break; /* absolute value */
+ case TOK_NEG: top = -top; break; /* * -1 */
+ case TOK_NOT: top = !top; break; /* Logical NOT of Last Value */
+ case TOK_EQUAL: top = (int)stack.pop() == (int)top; break; /* Logical = */
+ case TOK_GREATER: top = (stack.pop() > top); break; /* Logical > */
+ case TOK_LESS: top = (stack.pop() < top); break; /* Logical < */
+ case TOK_AND: top = (int)stack.pop() & (int)top; break; /* Bitwise AND */
+ case TOK_OR: top = (int)stack.pop() | (int)top; break; /* Bitwise OR */
+ case TOK_XOR: top = (int)stack.pop() ^ (int)top; break; /* Bitwise XOR */
+ case TOK_END: break; /* please compiler */
}
}
set_output(0, top);
@@ -1618,25 +1618,25 @@ DISCRETE_RESET(dst_transform)
{
switch (*fPTR++)
{
- case '*': *p = TOK_MULT; break;
- case '/': *p = TOK_DIV; break;
- case '+': *p = TOK_ADD; break;
- case '-': *p = TOK_MINUS; break;
- case '0': *p = TOK_0; break;
- case '1': *p = TOK_1; break;
- case '2': *p = TOK_2; break;
- case '3': *p = TOK_3; break;
- case '4': *p = TOK_4; break;
- case 'P': *p = TOK_DUP; break;
- case 'a': *p = TOK_ABS; break; /* absolute value */
- case 'i': *p = TOK_NEG; break; /* * -1 */
- case '!': *p = TOK_NOT; break; /* Logical NOT of Last Value */
- case '=': *p = TOK_EQUAL; break; /* Logical = */
- case '>': *p = TOK_GREATER; break; /* Logical > */
- case '<': *p = TOK_LESS; break; /* Logical < */
- case '&': *p = TOK_AND; break; /* Bitwise AND */
- case '|': *p = TOK_OR; break; /* Bitwise OR */
- case '^': *p = TOK_XOR; break; /* Bitwise XOR */
+ case '*': *p = TOK_MULT; break;
+ case '/': *p = TOK_DIV; break;
+ case '+': *p = TOK_ADD; break;
+ case '-': *p = TOK_MINUS; break;
+ case '0': *p = TOK_0; break;
+ case '1': *p = TOK_1; break;
+ case '2': *p = TOK_2; break;
+ case '3': *p = TOK_3; break;
+ case '4': *p = TOK_4; break;
+ case 'P': *p = TOK_DUP; break;
+ case 'a': *p = TOK_ABS; break; /* absolute value */
+ case 'i': *p = TOK_NEG; break; /* * -1 */
+ case '!': *p = TOK_NOT; break; /* Logical NOT of Last Value */
+ case '=': *p = TOK_EQUAL; break; /* Logical = */
+ case '>': *p = TOK_GREATER; break; /* Logical > */
+ case '<': *p = TOK_LESS; break; /* Logical < */
+ case '&': *p = TOK_AND; break; /* Bitwise AND */
+ case '|': *p = TOK_OR; break; /* Bitwise OR */
+ case '^': *p = TOK_XOR; break; /* Bitwise XOR */
default:
m_device->discrete_log("dst_transform_step - Invalid function type/variable passed: %s",(const char *)this->custom_data());
/* that is enough to fatalerror */
@@ -1660,9 +1660,9 @@ DISCRETE_RESET(dst_transform)
*
* Mar 2007, D Renaud.
************************************************************************/
-#define DST_OP_AMP__ENABLE DISCRETE_INPUT(0)
-#define DST_OP_AMP__INP0 DISCRETE_INPUT(1)
-#define DST_OP_AMP__INP1 DISCRETE_INPUT(2)
+#define DST_OP_AMP__ENABLE DISCRETE_INPUT(0)
+#define DST_OP_AMP__INP0 DISCRETE_INPUT(1)
+#define DST_OP_AMP__INP1 DISCRETE_INPUT(2)
DISCRETE_STEP(dst_op_amp)
{
@@ -1774,7 +1774,7 @@ DISCRETE_RESET(dst_op_amp)
*
* Mar 2007, D Renaud.
************************************************************************/
-#define DST_OP_AMP_1SHT__TRIGGER DISCRETE_INPUT(0)
+#define DST_OP_AMP_1SHT__TRIGGER DISCRETE_INPUT(0)
DISCRETE_STEP(dst_op_amp_1sht)
{
@@ -1845,24 +1845,24 @@ DISCRETE_RESET(dst_op_amp_1sht)
*
* Mar 2004, D Renaud.
************************************************************************/
-#define DST_TVCA_OP_AMP__TRG0 DISCRETE_INPUT(0)
-#define DST_TVCA_OP_AMP__TRG1 DISCRETE_INPUT(1)
-#define DST_TVCA_OP_AMP__TRG2 DISCRETE_INPUT(2)
-#define DST_TVCA_OP_AMP__INP0 DISCRETE_INPUT(3)
-#define DST_TVCA_OP_AMP__INP1 DISCRETE_INPUT(4)
+#define DST_TVCA_OP_AMP__TRG0 DISCRETE_INPUT(0)
+#define DST_TVCA_OP_AMP__TRG1 DISCRETE_INPUT(1)
+#define DST_TVCA_OP_AMP__TRG2 DISCRETE_INPUT(2)
+#define DST_TVCA_OP_AMP__INP0 DISCRETE_INPUT(3)
+#define DST_TVCA_OP_AMP__INP1 DISCRETE_INPUT(4)
DISCRETE_STEP(dst_tvca_op_amp)
{
DISCRETE_DECLARE_INFO(discrete_op_amp_tvca_info)
- int trig0, trig1, trig2, f3;
- double i2 = 0; /* current through r2 */
- double i3 = 0; /* current through r3 */
- double i_neg = 0; /* current into - input */
- double i_pos = 0; /* current into + input */
- double i_out = 0; /* current at output */
+ int trig0, trig1, trig2, f3;
+ double i2 = 0; /* current through r2 */
+ double i3 = 0; /* current through r3 */
+ double i_neg = 0; /* current into - input */
+ double i_pos = 0; /* current into + input */
+ double i_out = 0; /* current at output */
- double v_out;
+ double v_out;
trig0 = (int)DST_TVCA_OP_AMP__TRG0;
trig1 = (int)DST_TVCA_OP_AMP__TRG1;
@@ -1896,9 +1896,9 @@ DISCRETE_STEP(dst_tvca_op_amp)
else
{
/* F2 is at ground. The diode blocks this so F2 and r5 are out of circuit.
- * So now the discharge rate is dependent upon F3.
- * If F3 is at ground then we discharge to 0V through r6.
- * If F3 is out of circuit then we discharge to OP_AMP_NORTON_VBE through r6+r7. */
+ * So now the discharge rate is dependent upon F3.
+ * If F3 is at ground then we discharge to 0V through r6.
+ * If F3 is out of circuit then we discharge to OP_AMP_NORTON_VBE through r6+r7. */
m_v_cap1 += ((f3 ? OP_AMP_NORTON_VBE : 0.0) - m_v_cap1) * m_exponent_d[f3];
}
@@ -1962,7 +1962,7 @@ DISCRETE_RESET(dst_tvca_op_amp)
m_v_out_max = info->vP - OP_AMP_NORTON_VBE;
/* This is probably overkill because R5 is usually much lower then r6 or r7,
- * but it is better to play it safe. */
+ * but it is better to play it safe. */
m_v_trig[0] = (info->v1 - 0.6) * RES_VOLTAGE_DIVIDER(info->r5, info->r6);
m_v_trig[1] = (info->v1 - 0.6 - OP_AMP_NORTON_VBE) * RES_VOLTAGE_DIVIDER(info->r5, m_r67) + OP_AMP_NORTON_VBE;
m_i_fixed = m_v_out_max / info->r1;
@@ -2027,15 +2027,15 @@ enum
* If they are both 0, then the output will be X_TIME logic.
*
************************************************************************/
-#define DST_XTIME_BUFFER__IN DISCRETE_INPUT(0)
-#define DST_XTIME_BUFFER_OUT_LOW DISCRETE_INPUT(1)
-#define DST_XTIME_BUFFER_OUT_HIGH DISCRETE_INPUT(2)
-#define DST_XTIME_BUFFER_INVERT DISCRETE_INPUT(3)
+#define DST_XTIME_BUFFER__IN DISCRETE_INPUT(0)
+#define DST_XTIME_BUFFER_OUT_LOW DISCRETE_INPUT(1)
+#define DST_XTIME_BUFFER_OUT_HIGH DISCRETE_INPUT(2)
+#define DST_XTIME_BUFFER_INVERT DISCRETE_INPUT(3)
DISCRETE_STEP(dst_xtime_buffer)
{
- int in0 = (int)DST_XTIME_BUFFER__IN;
- int out = in0;
+ int in0 = (int)DST_XTIME_BUFFER__IN;
+ int out = in0;
int out_is_energy = 1;
double x_time = DST_XTIME_BUFFER__IN - in0;
@@ -2073,17 +2073,17 @@ DISCRETE_STEP(dst_xtime_buffer)
* If they are both 0, then the output will be X_TIME logic.
*
************************************************************************/
-#define DST_XTIME_AND__IN0 DISCRETE_INPUT(0)
-#define DST_XTIME_AND__IN1 DISCRETE_INPUT(1)
-#define DST_XTIME_AND_OUT_LOW DISCRETE_INPUT(2)
-#define DST_XTIME_AND_OUT_HIGH DISCRETE_INPUT(3)
-#define DST_XTIME_AND_INVERT DISCRETE_INPUT(4)
+#define DST_XTIME_AND__IN0 DISCRETE_INPUT(0)
+#define DST_XTIME_AND__IN1 DISCRETE_INPUT(1)
+#define DST_XTIME_AND_OUT_LOW DISCRETE_INPUT(2)
+#define DST_XTIME_AND_OUT_HIGH DISCRETE_INPUT(3)
+#define DST_XTIME_AND_INVERT DISCRETE_INPUT(4)
DISCRETE_STEP(dst_xtime_and)
{
- int in0 = (int)DST_XTIME_AND__IN0;
- int in1 = (int)DST_XTIME_AND__IN1;
- int out = 0;
+ int in0 = (int)DST_XTIME_AND__IN0;
+ int in1 = (int)DST_XTIME_AND__IN1;
+ int out = 0;
int out_is_energy = 1;
double x_time = 0;
@@ -2117,52 +2117,52 @@ DISCRETE_STEP(dst_xtime_and)
case XTIME__IN0_0__IN1_1__IN0_X__IN1_NOX:
/*
- * in0 1 ------
- * 0 -------
- * ...^....^...
- *
- * in1 1 -------------
- * 0
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------
+ * 0 -------
+ * ...^....^...
+ *
+ * in1 1 -------------
+ * 0
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
x_time = x_time0;
break;
case XTIME__IN0_1__IN1_0__IN0_NOX__IN1_X:
/*
- * in0 1 -------------
- * 0
- * ...^....^...
- *
- * in1 1 ------
- * 0 -------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 -------------
+ * 0
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 -------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
x_time = x_time1;
break;
case XTIME__IN0_0__IN1_0__IN0_X__IN1_X:
/*
- * in0 1 ----- -------
- * 0 -------- ------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ------ --------
- * ...^....^... ...^....^...
- *
- * out 1 ----- -----
- * 0 ------- -------
- * ...^....^... ...^....^...
- */
+ * in0 1 ----- -------
+ * 0 -------- ------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ------ --------
+ * ...^....^... ...^....^...
+ *
+ * out 1 ----- -----
+ * 0 ------- -------
+ * ...^....^... ...^....^...
+ */
// use x_time of input that went to 0 first/longer
if (x_time0 >= x_time1)
x_time = x_time0;
@@ -2172,18 +2172,18 @@ DISCRETE_STEP(dst_xtime_and)
case XTIME__IN0_0__IN1_1__IN0_X__IN1_X:
/*
- * in0 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * out 1 --
- * 0 ----- ----- ------------
- * ...^....^... ...^....^...
- */
+ * in0 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * out 1 --
+ * 0 ----- ----- ------------
+ * ...^....^... ...^....^...
+ */
// may have went high for a bit in this cycle
//if (x_time0 < x_time1)
// x_time = time1 - x_time0;
@@ -2191,18 +2191,18 @@ DISCRETE_STEP(dst_xtime_and)
case XTIME__IN0_1__IN1_0__IN0_X__IN1_X:
/*
- * in0 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * out 1 --
- * 0 ----- ----- ------------
- * ...^....^... ...^....^...
- */
+ * in0 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * out 1 --
+ * 0 ----- ----- ------------
+ * ...^....^... ...^....^...
+ */
// may have went high for a bit in this cycle
//if (x_time0 > x_time1)
// x_time = x_time0 - x_time1;
@@ -2210,54 +2210,54 @@ DISCRETE_STEP(dst_xtime_and)
case XTIME__IN0_1__IN1_1__IN0_NOX__IN1_X:
/*
- * in0 1 ------------
- * 0
- * ...^....^...
- *
- * in1 1 ------
- * 0 ------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------------
+ * 0
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
out = 1;
x_time = x_time1;
break;
case XTIME__IN0_1__IN1_1__IN0_X__IN1_NOX:
/*
- * in1 0 ------
- * 0 ------
- * ...^....^...
- *
- * in1 1 ------------
- * 0
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in1 0 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * in1 1 ------------
+ * 0
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
out = 1;
x_time = x_time0;
break;
case XTIME__IN0_1__IN1_1__IN0_X__IN1_X:
/*
- * in0 1 ------ --------
- * 0 ------ ----
- * ...^....^... ...^....^...
- *
- * in1 1 -------- ------
- * 0 ---- ------
- * ...^....^... ...^....^...
- *
- * out 1 ------ ------
- * 0 ------ ------
- * ...^....^... ...^....^...
- */
+ * in0 1 ------ --------
+ * 0 ------ ----
+ * ...^....^... ...^....^...
+ *
+ * in1 1 -------- ------
+ * 0 ---- ------
+ * ...^....^... ...^....^...
+ *
+ * out 1 ------ ------
+ * 0 ------ ------
+ * ...^....^... ...^....^...
+ */
out = 1;
if (x_time0 < x_time1)
x_time = x_time0;
@@ -2293,17 +2293,17 @@ DISCRETE_STEP(dst_xtime_and)
* If they are both 0, then the output will be X_TIME logic.
*
************************************************************************/
-#define DST_XTIME_OR__IN0 DISCRETE_INPUT(0)
-#define DST_XTIME_OR__IN1 DISCRETE_INPUT(1)
-#define DST_XTIME_OR_OUT_LOW DISCRETE_INPUT(2)
-#define DST_XTIME_OR_OUT_HIGH DISCRETE_INPUT(3)
-#define DST_XTIME_OR_INVERT DISCRETE_INPUT(4)
+#define DST_XTIME_OR__IN0 DISCRETE_INPUT(0)
+#define DST_XTIME_OR__IN1 DISCRETE_INPUT(1)
+#define DST_XTIME_OR_OUT_LOW DISCRETE_INPUT(2)
+#define DST_XTIME_OR_OUT_HIGH DISCRETE_INPUT(3)
+#define DST_XTIME_OR_INVERT DISCRETE_INPUT(4)
DISCRETE_STEP(dst_xtime_or)
{
- int in0 = (int)DST_XTIME_OR__IN0;
- int in1 = (int)DST_XTIME_OR__IN1;
- int out = 1;
+ int in0 = (int)DST_XTIME_OR__IN0;
+ int in1 = (int)DST_XTIME_OR__IN1;
+ int out = 1;
int out_is_energy = 1;
double x_time = 0;
@@ -2337,54 +2337,54 @@ DISCRETE_STEP(dst_xtime_or)
case XTIME__IN0_0__IN1_0__IN0_NOX__IN1_X:
/*
- * in0 1
- * 0 -------------
- * ...^....^...
- *
- * in1 1 ------
- * 0 -------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1
+ * 0 -------------
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 -------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
out = 0;
x_time = x_time1;
break;
case XTIME__IN0_0__IN1_0__IN0_X__IN1_NOX:
/*
- * in0 1 ------
- * 0 -------
- * ...^....^...
- *
- * in1 1
- * 0 -------------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------
+ * 0 -------
+ * ...^....^...
+ *
+ * in1 1
+ * 0 -------------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
out = 0;
x_time = x_time0;
break;
case XTIME__IN0_0__IN1_0__IN0_X__IN1_X:
/*
- * in0 1 ----- -------
- * 0 -------- ------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ------ --------
- * ...^....^... ...^....^...
- *
- * out 1 ------- -------
- * 0 ----- -----
- * ...^....^... ...^....^...
- */
+ * in0 1 ----- -------
+ * 0 -------- ------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ------ --------
+ * ...^....^... ...^....^...
+ *
+ * out 1 ------- -------
+ * 0 ----- -----
+ * ...^....^... ...^....^...
+ */
out = 0;
// use x_time of input that was 1 last/longer
// this means at 0 for less x_time
@@ -2396,94 +2396,94 @@ DISCRETE_STEP(dst_xtime_or)
case XTIME__IN0_0__IN1_1__IN0_NOX__IN1_X:
/*
- * in0 1
- * 0 ------------
- * ...^....^...
- *
- * in1 1 ------
- * 0 ------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1
+ * 0 ------------
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
x_time = x_time1;
break;
case XTIME__IN0_1__IN1_0__IN0_X__IN1_NOX:
/*
- * in0 1 ------
- * 0 ------
- * ...^....^...
- *
- * in1 1
- * 0 ------------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * in1 1
+ * 0 ------------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
x_time = x_time0;
break;
case XTIME__IN0_0__IN1_1__IN0_X__IN1_X:
/*
- * in0 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * out 1 ------------ ----- -----
- * 0 --
- * ...^....^... ...^....^...
- */
+ * in0 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * out 1 ------------ ----- -----
+ * 0 --
+ * ...^....^... ...^....^...
+ */
// if (x_time0 > x_time1)
/* Not sure if it is better to use 1
- * or the total energy which would smear the switch points together.
- * Let's try just using 1 */
+ * or the total energy which would smear the switch points together.
+ * Let's try just using 1 */
//x_time = xtime_0 - xtime_1;
break;
case XTIME__IN0_1__IN1_0__IN0_X__IN1_X:
/*
- * in0 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * out 1 ------------ ----- -----
- * 0 --
- * ...^....^... ...^....^...
- */
+ * in0 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * out 1 ------------ ----- -----
+ * 0 --
+ * ...^....^... ...^....^...
+ */
//if (x_time0 < x_time1)
/* Not sure if it is better to use 1
- * or the total energy which would smear the switch points together.
- * Let's try just using 1 */
+ * or the total energy which would smear the switch points together.
+ * Let's try just using 1 */
//x_time = xtime_1 - xtime_0;
break;
case XTIME__IN0_1__IN1_1__IN0_X__IN1_X:
/*
- * in0 1 ------ --------
- * 0 ------ ----
- * ...^....^... ...^....^...
- *
- * in1 1 -------- ------
- * 0 ---- ------
- * ...^....^... ...^....^...
- *
- * out 1 -------- --------
- * 0 ---- ----
- * ...^....^... ...^....^...
- */
+ * in0 1 ------ --------
+ * 0 ------ ----
+ * ...^....^... ...^....^...
+ *
+ * in1 1 -------- ------
+ * 0 ---- ------
+ * ...^....^... ...^....^...
+ *
+ * out 1 -------- --------
+ * 0 ---- ----
+ * ...^....^... ...^....^...
+ */
if (x_time0 > x_time1)
x_time = x_time0;
else
@@ -2518,17 +2518,17 @@ DISCRETE_STEP(dst_xtime_or)
* If they are both 0, then the output will be X_TIME logic.
*
************************************************************************/
-#define DST_XTIME_XOR__IN0 DISCRETE_INPUT(0)
-#define DST_XTIME_XOR__IN1 DISCRETE_INPUT(1)
-#define DST_XTIME_XOR_OUT_LOW DISCRETE_INPUT(2)
-#define DST_XTIME_XOR_OUT_HIGH DISCRETE_INPUT(3)
-#define DST_XTIME_XOR_INVERT DISCRETE_INPUT(4)
+#define DST_XTIME_XOR__IN0 DISCRETE_INPUT(0)
+#define DST_XTIME_XOR__IN1 DISCRETE_INPUT(1)
+#define DST_XTIME_XOR_OUT_LOW DISCRETE_INPUT(2)
+#define DST_XTIME_XOR_OUT_HIGH DISCRETE_INPUT(3)
+#define DST_XTIME_XOR_INVERT DISCRETE_INPUT(4)
DISCRETE_STEP(dst_xtime_xor)
{
- int in0 = (int)DST_XTIME_XOR__IN0;
- int in1 = (int)DST_XTIME_XOR__IN1;
- int out = 1;
+ int in0 = (int)DST_XTIME_XOR__IN0;
+ int in1 = (int)DST_XTIME_XOR__IN1;
+ int out = 1;
int out_is_energy = 1;
double x_time = 0;
@@ -2558,196 +2558,196 @@ DISCRETE_STEP(dst_xtime_xor)
case XTIME__IN0_1__IN1_0__IN0_X__IN1_NOX:
/*
- * in0 1 ------
- * 0 ------
- * ...^....^...
- *
- * in1 1
- * 0 ------------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * in1 1
+ * 0 ------------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
case XTIME__IN0_0__IN1_1__IN0_X__IN1_NOX:
/*
- * in0 1 ------
- * 0 -------
- * ...^....^...
- *
- * in1 1 -------------
- * 0
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------
+ * 0 -------
+ * ...^....^...
+ *
+ * in1 1 -------------
+ * 0
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
x_time = x_time0;
break;
case XTIME__IN0_0__IN1_1__IN0_NOX__IN1_X:
/*
- * in0 1
- * 0 ------------
- * ...^....^...
- *
- * in1 1 ------
- * 0 ------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1
+ * 0 ------------
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
case XTIME__IN0_1__IN1_0__IN0_NOX__IN1_X:
/*
- * in0 1 -------------
- * 0
- * ...^....^...
- *
- * in1 1 ------
- * 0 -------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 -------------
+ * 0
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 -------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
x_time = x_time1;
break;
case XTIME__IN0_0__IN1_0__IN0_X__IN1_NOX:
/*
- * in0 1 ------
- * 0 ------
- * ...^....^...
- *
- * in1 1
- * 0 ------------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * in1 1
+ * 0 ------------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
case XTIME__IN0_1__IN1_1__IN0_X__IN1_NOX:
/*
- * in1 0 ------
- * 0 ------
- * ...^....^...
- *
- * in1 1 ------------
- * 0
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in1 0 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * in1 1 ------------
+ * 0
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
out = 0;
x_time = x_time0;
break;
case XTIME__IN0_0__IN1_0__IN0_NOX__IN1_X:
/*
- * in0 1
- * 0 ------------
- * ...^....^...
- *
- * in1 1 ------
- * 0 ------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1
+ * 0 ------------
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
case XTIME__IN0_1__IN1_1__IN0_NOX__IN1_X:
/*
- * in0 1 ------------
- * 0
- * ...^....^...
- *
- * in1 1 ------
- * 0 ------
- * ...^....^...
- *
- * out 1 ------
- * 0 ------
- * ...^....^...
- */
+ * in0 1 ------------
+ * 0
+ * ...^....^...
+ *
+ * in1 1 ------
+ * 0 ------
+ * ...^....^...
+ *
+ * out 1 ------
+ * 0 ------
+ * ...^....^...
+ */
out = 0;
x_time = x_time1;
break;
case XTIME__IN0_0__IN1_0__IN0_X__IN1_X:
/*
- * in0 1 ----- -------
- * 0 ------- -----
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * out 1 -- --
- * 0 ----- ----- ----- -----
- * ...^....^... ...^....^...
- */
+ * in0 1 ----- -------
+ * 0 ------- -----
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * out 1 -- --
+ * 0 ----- ----- ----- -----
+ * ...^....^... ...^....^...
+ */
case XTIME__IN0_1__IN1_1__IN0_X__IN1_X:
/*
- * in0 1 ------ --------
- * 0 ------ ----
- * ...^....^... ...^....^...
- *
- * in1 1 -------- ------
- * 0 ---- ------
- * ...^....^... ...^....^...
- *
- * out 1 -- --
- * 0 ---- ------ ---- ------
- * ...^....^... ...^....^...
- */
+ * in0 1 ------ --------
+ * 0 ------ ----
+ * ...^....^... ...^....^...
+ *
+ * in1 1 -------- ------
+ * 0 ---- ------
+ * ...^....^... ...^....^...
+ *
+ * out 1 -- --
+ * 0 ---- ------ ---- ------
+ * ...^....^... ...^....^...
+ */
out = 0;
/* Not sure if it is better to use 0
- * or the total energy which would smear the switch points together.
- * Let's try just using 0 */
+ * or the total energy which would smear the switch points together.
+ * Let's try just using 0 */
// x_time = abs(x_time0 - x_time1);
break;
case XTIME__IN0_0__IN1_1__IN0_X__IN1_X:
/*
- * in0 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * out 1 ----- ----- ----- -----
- * 0 -- --
- * ...^....^... ...^....^...
- */
+ * in0 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * out 1 ----- ----- ----- -----
+ * 0 -- --
+ * ...^....^... ...^....^...
+ */
case XTIME__IN0_1__IN1_0__IN0_X__IN1_X:
/*
- * in0 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * in1 1 ------- -----
- * 0 ----- -------
- * ...^....^... ...^....^...
- *
- * out 1 ----- ----- ----- -----
- * 0 -- --
- * ...^....^... ...^....^...
- */
+ * in0 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * in1 1 ------- -----
+ * 0 ----- -------
+ * ...^....^... ...^....^...
+ *
+ * out 1 ----- ----- ----- -----
+ * 0 -- --
+ * ...^....^... ...^....^...
+ */
/* Not sure if it is better to use 1
- * or the total energy which would smear the switch points together.
- * Let's try just using 1 */
+ * or the total energy which would smear the switch points together.
+ * Let's try just using 1 */
// x_time = 1.0 - abs(x_time0 - x_time1);
break;
}
diff --git a/src/emu/sound/disc_mth.h b/src/emu/sound/disc_mth.h
index 5debe62bfb6..899c113b55a 100644
--- a/src/emu/sound/disc_mth.h
+++ b/src/emu/sound/disc_mth.h
@@ -32,11 +32,11 @@ DISCRETE_CLASS_STEP(dst_gain, 1, /* no context */ );
DISCRETE_CLASS_STEP(dst_logic_inv, 1, /* no context */ );
DISCRETE_CLASS_STEP_RESET(dst_bits_decode, 8,
- int m_count;
- int m_decode_x_time;
- int m_from;
- int m_last_val;
- int m_last_had_x_time;
+ int m_count;
+ int m_decode_x_time;
+ int m_from;
+ int m_last_val;
+ int m_last_had_x_time;
);
DISCRETE_CLASS_STEP(dst_logic_and, 1, /* no context */ );
@@ -52,47 +52,47 @@ DISCRETE_CLASS_STEP(dst_logic_xor, 1, /* no context */ );
DISCRETE_CLASS_STEP(dst_logic_nxor, 1, /* no context */ );
DISCRETE_CLASS_STEP_RESET(dst_logic_dff, 1,
- int m_last_clk;
+ int m_last_clk;
);
DISCRETE_CLASS_STEP_RESET(dst_logic_jkff, 1,
- double m_v_out;
- int m_last_clk;
+ double m_v_out;
+ int m_last_clk;
);
DISCRETE_CLASS_STEP_RESET(dst_logic_shift, 1,
- double m_t_left; /* time unused during last sample in seconds */
- UINT32 m_shift_data;
- UINT32 m_bit_mask;
- UINT8 m_clock_type;
- UINT8 m_reset_on_high;
- UINT8 m_shift_r;
- UINT8 m_last;
+ double m_t_left; /* time unused during last sample in seconds */
+ UINT32 m_shift_data;
+ UINT32 m_bit_mask;
+ UINT8 m_clock_type;
+ UINT8 m_reset_on_high;
+ UINT8 m_shift_r;
+ UINT8 m_last;
);
DISCRETE_CLASS_STEP(dst_lookup_table, 1, /* no context */ );
DISCRETE_CLASS_STEP_RESET(dst_multiplex, 1,
- int m_size;
+ int m_size;
);
DISCRETE_CLASS_STEP_RESET(dst_oneshot, 1,
- double m_countdown;
- int m_state;
- int m_last_trig;
- int m_type;
+ double m_countdown;
+ int m_state;
+ int m_last_trig;
+ int m_type;
);
DISCRETE_CLASS_STEP_RESET(dst_ramp, 1,
- double m_v_out;
- double m_step;
- int m_dir; /* 1 if End is higher then Start */
- int m_last_en; /* Keep track of the last enable value */
+ double m_v_out;
+ double m_step;
+ int m_dir; /* 1 if End is higher then Start */
+ int m_last_en; /* Keep track of the last enable value */
);
DISCRETE_CLASS_STEP_RESET(dst_samphold, 1,
- double m_last_input;
- int m_clocktype;
+ double m_last_input;
+ int m_clocktype;
);
DISCRETE_CLASS_STEP(dst_switch, 1, /* no context */ );
@@ -117,113 +117,113 @@ public:
TOK_3,
TOK_4,
TOK_DUP,
- TOK_ABS, /* absolute value */
- TOK_NEG, /* * -1 */
- TOK_NOT, /* Logical NOT of Last Value */
- TOK_EQUAL, /* Logical = */
- TOK_GREATER, /* Logical > */
- TOK_LESS, /* Logical < */
- TOK_AND, /* Bitwise AND */
- TOK_OR, /* Bitwise OR */
- TOK_XOR /* Bitwise XOR */
+ TOK_ABS, /* absolute value */
+ TOK_NEG, /* * -1 */
+ TOK_NOT, /* Logical NOT of Last Value */
+ TOK_EQUAL, /* Logical = */
+ TOK_GREATER, /* Logical > */
+ TOK_LESS, /* Logical < */
+ TOK_AND, /* Bitwise AND */
+ TOK_OR, /* Bitwise OR */
+ TOK_XOR /* Bitwise XOR */
};
void step(void);
void reset(void);
protected:
private:
- DISCRETE_CLASS_INPUT(I_IN0, 0);
- DISCRETE_CLASS_INPUT(I_IN1, 1);
- DISCRETE_CLASS_INPUT(I_IN2, 2);
- DISCRETE_CLASS_INPUT(I_IN3, 3);
- DISCRETE_CLASS_INPUT(I_IN4, 4);
+ DISCRETE_CLASS_INPUT(I_IN0, 0);
+ DISCRETE_CLASS_INPUT(I_IN1, 1);
+ DISCRETE_CLASS_INPUT(I_IN2, 2);
+ DISCRETE_CLASS_INPUT(I_IN3, 3);
+ DISCRETE_CLASS_INPUT(I_IN4, 4);
enum token precomp[32];
};
/* Component specific */
DISCRETE_CLASS_STEP_RESET(dst_comp_adder, 1,
- double m_total[256];
+ double m_total[256];
);
DISCRETE_CLASS_STEP_RESET(dst_dac_r1, 1,
- double m_v_out;
- double m_exponent;
- double m_last_v;
- double m_v_step[256];
- int m_has_c_filter;
+ double m_v_out;
+ double m_exponent;
+ double m_last_v;
+ double m_v_step[256];
+ int m_has_c_filter;
);
DISCRETE_CLASS_STEP_RESET(dst_diode_mix, 1,
- int m_size;
- double m_v_junction[8];
+ int m_size;
+ double m_v_junction[8];
);
DISCRETE_CLASS_STEP_RESET(dst_integrate, 1,
- double m_v_out;
- double m_change;
- double m_v_max_in; /* v1 - norton VBE */
- double m_v_max_in_d; /* v1 - norton VBE - diode drop */
- double m_v_max_out;
+ double m_v_out;
+ double m_change;
+ double m_v_max_in; /* v1 - norton VBE */
+ double m_v_max_in_d; /* v1 - norton VBE - diode drop */
+ double m_v_max_out;
);
-#define DISC_MIXER_MAX_INPS 8
+#define DISC_MIXER_MAX_INPS 8
DISCRETE_CLASS_STEP_RESET(dst_mixer, 1,
- int m_type;
- int m_size;
- int m_r_node_bit_flag;
- int m_c_bit_flag;
- double m_r_total;
- const double * m_r_node[DISC_MIXER_MAX_INPS]; /* Either pointer to resistance node output OR NULL */
- double m_r_last[DISC_MIXER_MAX_INPS];
- double m_exponent_rc[DISC_MIXER_MAX_INPS]; /* For high pass filtering cause by cIn */
- double m_v_cap[DISC_MIXER_MAX_INPS]; /* cap voltage of each input */
- double m_exponent_c_f; /* Low pass on mixed inputs */
- double m_exponent_c_amp; /* Final high pass caused by out cap and amp input impedance */
- double m_v_cap_f; /* cap voltage of cF */
- double m_v_cap_amp; /* cap voltage of cAmp */
- double m_gain; /* used for DISC_MIXER_IS_OP_AMP_WITH_RI */
+ int m_type;
+ int m_size;
+ int m_r_node_bit_flag;
+ int m_c_bit_flag;
+ double m_r_total;
+ const double * m_r_node[DISC_MIXER_MAX_INPS]; /* Either pointer to resistance node output OR NULL */
+ double m_r_last[DISC_MIXER_MAX_INPS];
+ double m_exponent_rc[DISC_MIXER_MAX_INPS]; /* For high pass filtering cause by cIn */
+ double m_v_cap[DISC_MIXER_MAX_INPS]; /* cap voltage of each input */
+ double m_exponent_c_f; /* Low pass on mixed inputs */
+ double m_exponent_c_amp; /* Final high pass caused by out cap and amp input impedance */
+ double m_v_cap_f; /* cap voltage of cF */
+ double m_v_cap_amp; /* cap voltage of cAmp */
+ double m_gain; /* used for DISC_MIXER_IS_OP_AMP_WITH_RI */
);
DISCRETE_CLASS_STEP_RESET(dst_op_amp, 1,
- UINT8 m_has_cap;
- UINT8 m_has_r1;
- UINT8 m_has_r4;
- double m_v_max;
- double m_i_fixed;
- double m_v_cap;
- double m_exponent;
+ UINT8 m_has_cap;
+ UINT8 m_has_r1;
+ UINT8 m_has_r4;
+ double m_v_max;
+ double m_i_fixed;
+ double m_v_cap;
+ double m_exponent;
);
DISCRETE_CLASS_STEP_RESET(dst_op_amp_1sht, 1,
- double m_v_out;
- double m_i_fixed;
- double m_v_max;
- double m_r34ratio;
- double m_v_cap1;
- double m_v_cap2;
- double m_exponent1c;
- double m_exponent1d;
- double m_exponent2;
+ double m_v_out;
+ double m_i_fixed;
+ double m_v_max;
+ double m_r34ratio;
+ double m_v_cap1;
+ double m_v_cap2;
+ double m_exponent1c;
+ double m_exponent1d;
+ double m_exponent2;
);
DISCRETE_CLASS_STEP_RESET(dst_tvca_op_amp, 1,
- double m_v_out_max; /* Maximum output voltage */
- double m_v_trig[2]; /* Voltage used to charge cap1 based on function F3 */
- double m_v_trig2; /* Voltage used to charge cap2 */
- double m_v_trig3; /* Voltage used to charge cap3 */
- double m_i_fixed; /* Fixed current going into - input */
- double m_exponent_c[2]; /* Charge exponents based on function F3 */
- double m_exponent_d[2]; /* Discharge exponents based on function F3 */
- double m_exponent2[2]; /* Discharge/charge exponents based on function F4 */
- double m_exponent3[2]; /* Discharge/charge exponents based on function F5 */
- double m_exponent4; /* Discharge/charge exponents for c4 */
- double m_v_cap1; /* charge on cap c1 */
- double m_v_cap2; /* charge on cap c2 */
- double m_v_cap3; /* charge on cap c3 */
- double m_v_cap4; /* charge on cap c4 */
- double m_r67; /* = r6 + r7 (for easy use later) */
- UINT8 m_has_c4;
- UINT8 m_has_r4;
+ double m_v_out_max; /* Maximum output voltage */
+ double m_v_trig[2]; /* Voltage used to charge cap1 based on function F3 */
+ double m_v_trig2; /* Voltage used to charge cap2 */
+ double m_v_trig3; /* Voltage used to charge cap3 */
+ double m_i_fixed; /* Fixed current going into - input */
+ double m_exponent_c[2]; /* Charge exponents based on function F3 */
+ double m_exponent_d[2]; /* Discharge exponents based on function F3 */
+ double m_exponent2[2]; /* Discharge/charge exponents based on function F4 */
+ double m_exponent3[2]; /* Discharge/charge exponents based on function F5 */
+ double m_exponent4; /* Discharge/charge exponents for c4 */
+ double m_v_cap1; /* charge on cap c1 */
+ double m_v_cap2; /* charge on cap c2 */
+ double m_v_cap3; /* charge on cap c3 */
+ double m_v_cap4; /* charge on cap c4 */
+ double m_r67; /* = r6 + r7 (for easy use later) */
+ UINT8 m_has_c4;
+ UINT8 m_has_r4;
);
DISCRETE_CLASS_STEP(dst_xtime_buffer, 1, /* no context */ );
diff --git a/src/emu/sound/disc_sys.c b/src/emu/sound/disc_sys.c
index ba00ecebc5e..a43821ad5fd 100644
--- a/src/emu/sound/disc_sys.c
+++ b/src/emu/sound/disc_sys.c
@@ -120,4 +120,3 @@ DISCRETE_RESET( dso_wavlog )
{
this->step();
}
-
diff --git a/src/emu/sound/disc_wav.c b/src/emu/sound/disc_wav.c
index 39bdb3de288..b1d64d06405 100644
--- a/src/emu/sound/disc_wav.c
+++ b/src/emu/sound/disc_wav.c
@@ -42,26 +42,26 @@
*
* Jan 2004, D Renaud.
************************************************************************/
-#define DSS_COUNTER__ENABLE DISCRETE_INPUT(0)
-#define DSS_COUNTER__RESET DISCRETE_INPUT(1)
-#define DSS_COUNTER__CLOCK DISCRETE_INPUT(2)
-#define DSS_COUNTER__MIN DISCRETE_INPUT(3)
-#define DSS_COUNTER__MAX DISCRETE_INPUT(4)
-#define DSS_COUNTER__DIR DISCRETE_INPUT(5)
-#define DSS_COUNTER__INIT DISCRETE_INPUT(6)
-#define DSS_COUNTER__CLOCK_TYPE DISCRETE_INPUT(7)
-#define DSS_7492__CLOCK_TYPE DSS_COUNTER__MIN
+#define DSS_COUNTER__ENABLE DISCRETE_INPUT(0)
+#define DSS_COUNTER__RESET DISCRETE_INPUT(1)
+#define DSS_COUNTER__CLOCK DISCRETE_INPUT(2)
+#define DSS_COUNTER__MIN DISCRETE_INPUT(3)
+#define DSS_COUNTER__MAX DISCRETE_INPUT(4)
+#define DSS_COUNTER__DIR DISCRETE_INPUT(5)
+#define DSS_COUNTER__INIT DISCRETE_INPUT(6)
+#define DSS_COUNTER__CLOCK_TYPE DISCRETE_INPUT(7)
+#define DSS_7492__CLOCK_TYPE DSS_COUNTER__MIN
static const int disc_7492_count[6] = {0x00, 0x01, 0x02, 0x04, 0x05, 0x06};
DISCRETE_STEP(dss_counter)
{
- double cycles;
- double ds_clock;
- int clock = 0, inc = 0;
- UINT32 last_count = m_last_count; /* it is different then output in 7492 */
- double x_time = 0;
- UINT32 count = last_count;
+ double cycles;
+ double ds_clock;
+ int clock = 0, inc = 0;
+ UINT32 last_count = m_last_count; /* it is different then output in 7492 */
+ double x_time = 0;
+ UINT32 count = last_count;
ds_clock = DSS_COUNTER__CLOCK;
if (UNEXPECTED(m_clock_type == DISC_CLK_IS_FREQ))
@@ -89,9 +89,9 @@ DISCRETE_STEP(dss_counter)
}
/*
- * Only count if module is enabled.
- * This has the effect of holding the output at it's current value.
- */
+ * Only count if module is enabled.
+ * This has the effect of holding the output at it's current value.
+ */
if (EXPECTED(DSS_COUNTER__ENABLE))
{
double v_out;
@@ -210,12 +210,12 @@ DISCRETE_RESET(dss_counter)
* also passed dss_lfsr_context structure
*
************************************************************************/
-#define DSS_LFSR_NOISE__ENABLE DISCRETE_INPUT(0)
-#define DSS_LFSR_NOISE__RESET DISCRETE_INPUT(1)
-#define DSS_LFSR_NOISE__CLOCK DISCRETE_INPUT(2)
-#define DSS_LFSR_NOISE__AMP DISCRETE_INPUT(3)
-#define DSS_LFSR_NOISE__FEED DISCRETE_INPUT(4)
-#define DSS_LFSR_NOISE__BIAS DISCRETE_INPUT(5)
+#define DSS_LFSR_NOISE__ENABLE DISCRETE_INPUT(0)
+#define DSS_LFSR_NOISE__RESET DISCRETE_INPUT(1)
+#define DSS_LFSR_NOISE__CLOCK DISCRETE_INPUT(2)
+#define DSS_LFSR_NOISE__AMP DISCRETE_INPUT(3)
+#define DSS_LFSR_NOISE__FEED DISCRETE_INPUT(4)
+#define DSS_LFSR_NOISE__BIAS DISCRETE_INPUT(5)
INLINE int dss_lfsr_function(discrete_device *dev, int myfunc, int in0, int in1, int bitmask)
{
@@ -237,15 +237,15 @@ INLINE int dss_lfsr_function(discrete_device *dev, int myfunc, int in0, int in1,
break;
case DISC_LFSR_XNOR:
retval = in0 ^ in1;
- retval = retval ^ bitmask; /* Invert output */
+ retval = retval ^ bitmask; /* Invert output */
break;
case DISC_LFSR_NOR:
retval = in0 | in1;
- retval = retval ^ bitmask; /* Invert output */
+ retval = retval ^ bitmask; /* Invert output */
break;
case DISC_LFSR_NAND:
retval = in0 & in1;
- retval = retval ^ bitmask; /* Invert output */
+ retval = retval ^ bitmask; /* Invert output */
break;
case DISC_LFSR_IN0:
retval = in0;
@@ -437,10 +437,10 @@ DISCRETE_RESET(dss_lfsr_noise)
* input3 - DC Bias value
*
************************************************************************/
-#define DSS_NOISE__ENABLE DISCRETE_INPUT(0)
-#define DSS_NOISE__FREQ DISCRETE_INPUT(1)
-#define DSS_NOISE__AMP DISCRETE_INPUT(2)
-#define DSS_NOISE__BIAS DISCRETE_INPUT(3)
+#define DSS_NOISE__ENABLE DISCRETE_INPUT(0)
+#define DSS_NOISE__FREQ DISCRETE_INPUT(1)
+#define DSS_NOISE__AMP DISCRETE_INPUT(2)
+#define DSS_NOISE__BIAS DISCRETE_INPUT(3)
DISCRETE_STEP(dss_noise)
{
@@ -500,19 +500,19 @@ DISCRETE_RESET(dss_noise)
*
* Mar 2004, D Renaud.
************************************************************************/
- #define DSS_NOTE__ENABLE DISCRETE_INPUT(0)
- #define DSS_NOTE__CLOCK DISCRETE_INPUT(1)
- #define DSS_NOTE__DATA DISCRETE_INPUT(2)
- #define DSS_NOTE__MAX1 DISCRETE_INPUT(3)
- #define DSS_NOTE__MAX2 DISCRETE_INPUT(4)
- #define DSS_NOTE__CLOCK_TYPE DISCRETE_INPUT(5)
+ #define DSS_NOTE__ENABLE DISCRETE_INPUT(0)
+ #define DSS_NOTE__CLOCK DISCRETE_INPUT(1)
+ #define DSS_NOTE__DATA DISCRETE_INPUT(2)
+ #define DSS_NOTE__MAX1 DISCRETE_INPUT(3)
+ #define DSS_NOTE__MAX2 DISCRETE_INPUT(4)
+ #define DSS_NOTE__CLOCK_TYPE DISCRETE_INPUT(5)
DISCRETE_STEP(dss_note)
{
- double cycles;
- int clock = 0, last_count2, inc = 0;
- double x_time = 0;
- double v_out;
+ double cycles;
+ int clock = 0, last_count2, inc = 0;
+ double x_time = 0;
+ double v_out;
if (m_clock_type == DISC_CLK_IS_FREQ)
{
@@ -625,26 +625,26 @@ DISCRETE_RESET(dss_note)
*
* Mar 2004, D Renaud.
************************************************************************/
-#define DSS_OP_AMP_OSC__ENABLE DISCRETE_INPUT(0)
-#define DSS_OP_AMP_OSC__VMOD1 DISCRETE_INPUT(1)
-#define DSS_OP_AMP_OSC__VMOD2 DISCRETE_INPUT(2)
+#define DSS_OP_AMP_OSC__ENABLE DISCRETE_INPUT(0)
+#define DSS_OP_AMP_OSC__VMOD1 DISCRETE_INPUT(1)
+#define DSS_OP_AMP_OSC__VMOD2 DISCRETE_INPUT(2)
/* The inputs on a norton op-amp are (info->vP - OP_AMP_NORTON_VBE) */
/* which is the same as the output high voltage. We will define them */
/* the same to save a calculation step */
-#define DSS_OP_AMP_OSC_NORTON_VP_IN m_v_out_high
+#define DSS_OP_AMP_OSC_NORTON_VP_IN m_v_out_high
DISCRETE_STEP(dss_op_amp_osc)
{
DISCRETE_DECLARE_INFO(discrete_op_amp_osc_info)
- double i = 0; /* Charging current created by vIn */
- double v = 0; /* all input voltages mixed */
- double dt; /* change in time */
- double v_cap; /* Current voltage on capacitor, before dt */
- double v_cap_next = 0; /* Voltage on capacitor, after dt */
+ double i = 0; /* Charging current created by vIn */
+ double v = 0; /* all input voltages mixed */
+ double dt; /* change in time */
+ double v_cap; /* Current voltage on capacitor, before dt */
+ double v_cap_next = 0; /* Voltage on capacitor, after dt */
double charge[2] = {0};
- double x_time = 0; /* time since change happened */
+ double x_time = 0; /* time since change happened */
double exponent;
UINT8 force_charge = 0;
UINT8 enable = DSS_OP_AMP_OSC__ENABLE;
@@ -655,8 +655,8 @@ DISCRETE_STEP(dss_op_amp_osc)
double v_out = 0;
- dt = this->sample_time(); /* Change in time */
- v_cap = m_v_cap; /* Set to voltage before change */
+ dt = this->sample_time(); /* Change in time */
+ v_cap = m_v_cap; /* Set to voltage before change */
/* work out the charge currents/voltages. */
switch (m_type)
@@ -819,7 +819,7 @@ DISCRETE_STEP(dss_op_amp_osc)
}
}
}
- else /* non-linear charge */
+ else /* non-linear charge */
{
if (update_exponent)
exponent = RC_CHARGE_EXP_DT(m_charge_rc[flip_flop], dt);
@@ -896,7 +896,7 @@ DISCRETE_STEP(dss_op_amp_osc)
m_flip_flop = flip_flop;
}
-#define DIODE_DROP 0.7
+#define DIODE_DROP 0.7
DISCRETE_RESET(dss_op_amp_osc)
{
@@ -905,8 +905,8 @@ DISCRETE_RESET(dss_op_amp_osc)
const double *r_info_ptr;
int loop;
- double i1 = 0; /* inverting input current */
- double i2 = 0; /* non-inverting input current */
+ double i1 = 0; /* inverting input current */
+ double i2 = 0; /* non-inverting input current */
/* link to resistor static or node values */
r_info_ptr = &info->r1;
@@ -943,9 +943,9 @@ DISCRETE_RESET(dss_op_amp_osc)
/* There is no charge on the cap so the schmitt goes high at init. */
m_flip_flop = 1;
/* Setup some commonly used stuff */
- m_temp1 = info->r5 / (info->r2 + info->r5); /* voltage ratio across r5 */
- m_temp2 = info->r6 / (info->r1 + info->r6); /* voltage ratio across r6 */
- m_temp3 = 1.0 / (1.0 / info->r1 + 1.0 / info->r6); /* input resistance when r6 switched in */
+ m_temp1 = info->r5 / (info->r2 + info->r5); /* voltage ratio across r5 */
+ m_temp2 = info->r6 / (info->r1 + info->r6); /* voltage ratio across r6 */
+ m_temp3 = 1.0 / (1.0 / info->r1 + 1.0 / info->r6); /* input resistance when r6 switched in */
break;
case DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON:
@@ -1088,12 +1088,12 @@ DISCRETE_RESET(dss_op_amp_osc)
* input5 - Initial Phase
*
************************************************************************/
-#define DSS_SAWTOOTHWAVE__ENABLE DISCRETE_INPUT(0)
-#define DSS_SAWTOOTHWAVE__FREQ DISCRETE_INPUT(1)
-#define DSS_SAWTOOTHWAVE__AMP DISCRETE_INPUT(2)
-#define DSS_SAWTOOTHWAVE__BIAS DISCRETE_INPUT(3)
-#define DSS_SAWTOOTHWAVE__GRAD DISCRETE_INPUT(4)
-#define DSS_SAWTOOTHWAVE__PHASE DISCRETE_INPUT(5)
+#define DSS_SAWTOOTHWAVE__ENABLE DISCRETE_INPUT(0)
+#define DSS_SAWTOOTHWAVE__FREQ DISCRETE_INPUT(1)
+#define DSS_SAWTOOTHWAVE__AMP DISCRETE_INPUT(2)
+#define DSS_SAWTOOTHWAVE__BIAS DISCRETE_INPUT(3)
+#define DSS_SAWTOOTHWAVE__GRAD DISCRETE_INPUT(4)
+#define DSS_SAWTOOTHWAVE__PHASE DISCRETE_INPUT(5)
DISCRETE_STEP(dss_sawtoothwave)
{
@@ -1151,9 +1151,9 @@ DISCRETE_RESET(dss_sawtoothwave)
*
* Mar 2004, D Renaud.
************************************************************************/
-#define DSS_SCHMITT_OSC__ENABLE (int)DISCRETE_INPUT(0)
-#define DSS_SCHMITT_OSC__VIN DISCRETE_INPUT(1)
-#define DSS_SCHMITT_OSC__AMP DISCRETE_INPUT(2)
+#define DSS_SCHMITT_OSC__ENABLE (int)DISCRETE_INPUT(0)
+#define DSS_SCHMITT_OSC__VIN DISCRETE_INPUT(1)
+#define DSS_SCHMITT_OSC__AMP DISCRETE_INPUT(2)
DISCRETE_STEP(dss_schmitt_osc)
{
@@ -1171,11 +1171,11 @@ DISCRETE_STEP(dss_schmitt_osc)
{
t = 0;
/* The charging voltage to the cap is the sum of the input voltage and the gate
- * output voltage in the ratios determined by their resistors in a divider network.
- * The input voltage is selectable as straight voltage in or logic level that will
- * use vGate as its voltage. Note that ration_in is just the ratio of the total
- * voltage and needs to be multipled by the input voltage. ratio_feedback has
- * already been multiplied by vGate to save time because that voltage never changes. */
+ * output voltage in the ratios determined by their resistors in a divider network.
+ * The input voltage is selectable as straight voltage in or logic level that will
+ * use vGate as its voltage. Note that ration_in is just the ratio of the total
+ * voltage and needs to be multipled by the input voltage. ratio_feedback has
+ * already been multiplied by vGate to save time because that voltage never changes. */
supply = m_input_is_voltage ? m_ration_in * DSS_SCHMITT_OSC__VIN : (DSS_SCHMITT_OSC__VIN ? m_ration_in * info->vGate : 0);
supply += (m_state ? m_ratio_feedback : 0);
new_vCap = v_cap + ((supply - v_cap) * exponent);
@@ -1240,12 +1240,12 @@ DISCRETE_RESET(dss_schmitt_osc)
m_input_is_voltage = (info->options & DISC_SCHMITT_OSC_IN_IS_VOLTAGE) ? 1 : 0;
/* The 2 resistors make a voltage divider, so their ratios add together
- * to make the charging voltage. */
+ * to make the charging voltage. */
m_ration_in = info->rFeedback / (info->rIn + info->rFeedback);
m_ratio_feedback = info->rIn / (info->rIn + info->rFeedback) * info->vGate;
/* The voltage source resistance works out to the 2 resistors in parallel.
- * So use this for the RC charge constant. */
+ * So use this for the RC charge constant. */
rSource = 1.0 / ((1.0 / info->rIn) + (1.0 / info->rFeedback));
m_rc = rSource * info->c;
m_exponent = RC_CHARGE_EXP(m_rc);
@@ -1269,11 +1269,11 @@ DISCRETE_RESET(dss_schmitt_osc)
* input4 - Starting phase
*
************************************************************************/
-#define DSS_SINEWAVE__ENABLE DISCRETE_INPUT(0)
-#define DSS_SINEWAVE__FREQ DISCRETE_INPUT(1)
-#define DSS_SINEWAVE__AMPL DISCRETE_INPUT(2)
-#define DSS_SINEWAVE__BIAS DISCRETE_INPUT(3)
-#define DSS_SINEWAVE__PHASE DISCRETE_INPUT(4)
+#define DSS_SINEWAVE__ENABLE DISCRETE_INPUT(0)
+#define DSS_SINEWAVE__FREQ DISCRETE_INPUT(1)
+#define DSS_SINEWAVE__AMPL DISCRETE_INPUT(2)
+#define DSS_SINEWAVE__BIAS DISCRETE_INPUT(3)
+#define DSS_SINEWAVE__PHASE DISCRETE_INPUT(4)
DISCRETE_STEP(dss_sinewave)
{
@@ -1323,12 +1323,12 @@ DISCRETE_RESET(dss_sinewave)
* input5 - Start Phase
*
************************************************************************/
-#define DSS_SQUAREWAVE__ENABLE DISCRETE_INPUT(0)
-#define DSS_SQUAREWAVE__FREQ DISCRETE_INPUT(1)
-#define DSS_SQUAREWAVE__AMP DISCRETE_INPUT(2)
-#define DSS_SQUAREWAVE__DUTY DISCRETE_INPUT(3)
-#define DSS_SQUAREWAVE__BIAS DISCRETE_INPUT(4)
-#define DSS_SQUAREWAVE__PHASE DISCRETE_INPUT(5)
+#define DSS_SQUAREWAVE__ENABLE DISCRETE_INPUT(0)
+#define DSS_SQUAREWAVE__FREQ DISCRETE_INPUT(1)
+#define DSS_SQUAREWAVE__AMP DISCRETE_INPUT(2)
+#define DSS_SQUAREWAVE__DUTY DISCRETE_INPUT(3)
+#define DSS_SQUAREWAVE__BIAS DISCRETE_INPUT(4)
+#define DSS_SQUAREWAVE__PHASE DISCRETE_INPUT(5)
DISCRETE_STEP(dss_squarewave)
{
@@ -1384,12 +1384,12 @@ DISCRETE_RESET(dss_squarewave)
* input5 - Start Phase
*
************************************************************************/
-#define DSS_SQUAREWFIX__ENABLE DISCRETE_INPUT(0)
-#define DSS_SQUAREWFIX__FREQ DISCRETE_INPUT(1)
-#define DSS_SQUAREWFIX__AMP DISCRETE_INPUT(2)
-#define DSS_SQUAREWFIX__DUTY DISCRETE_INPUT(3)
-#define DSS_SQUAREWFIX__BIAS DISCRETE_INPUT(4)
-#define DSS_SQUAREWFIX__PHASE DISCRETE_INPUT(5)
+#define DSS_SQUAREWFIX__ENABLE DISCRETE_INPUT(0)
+#define DSS_SQUAREWFIX__FREQ DISCRETE_INPUT(1)
+#define DSS_SQUAREWFIX__AMP DISCRETE_INPUT(2)
+#define DSS_SQUAREWFIX__DUTY DISCRETE_INPUT(3)
+#define DSS_SQUAREWFIX__BIAS DISCRETE_INPUT(4)
+#define DSS_SQUAREWFIX__PHASE DISCRETE_INPUT(5)
DISCRETE_STEP(dss_squarewfix)
{
@@ -1406,7 +1406,7 @@ DISCRETE_STEP(dss_squarewfix)
{
/* Add gain and DC Bias component */
- m_t_off = 1.0 / DSS_SQUAREWFIX__FREQ; /* cycle time */
+ m_t_off = 1.0 / DSS_SQUAREWFIX__FREQ; /* cycle time */
m_t_on = m_t_off * (DSS_SQUAREWFIX__DUTY / 100.0);
m_t_off -= m_t_on;
@@ -1424,10 +1424,10 @@ DISCRETE_RESET(dss_squarewfix)
m_flip_flop = 1;
/* Do the intial time shift and convert freq to off/on times */
- m_t_off = 1.0 / DSS_SQUAREWFIX__FREQ; /* cycle time */
- m_t_left = DSS_SQUAREWFIX__PHASE / 360.0; /* convert start phase to % */
- m_t_left = m_t_left - (int)m_t_left; /* keep % between 0 & 1 */
- m_t_left = (m_t_left < 0) ? 1.0 + m_t_left : m_t_left; /* if - then flip to + phase */
+ m_t_off = 1.0 / DSS_SQUAREWFIX__FREQ; /* cycle time */
+ m_t_left = DSS_SQUAREWFIX__PHASE / 360.0; /* convert start phase to % */
+ m_t_left = m_t_left - (int)m_t_left; /* keep % between 0 & 1 */
+ m_t_left = (m_t_left < 0) ? 1.0 + m_t_left : m_t_left; /* if - then flip to + phase */
m_t_left *= m_t_off;
m_t_on = m_t_off * (DSS_SQUAREWFIX__DUTY / 100.0);
m_t_off -= m_t_on;
@@ -1458,12 +1458,12 @@ DISCRETE_RESET(dss_squarewfix)
* input5 - Initial Time Shift
*
************************************************************************/
-#define DSS_SQUAREWAVE2__ENABLE DISCRETE_INPUT(0)
-#define DSS_SQUAREWAVE2__AMP DISCRETE_INPUT(1)
-#define DSS_SQUAREWAVE2__T_OFF DISCRETE_INPUT(2)
-#define DSS_SQUAREWAVE2__T_ON DISCRETE_INPUT(3)
-#define DSS_SQUAREWAVE2__BIAS DISCRETE_INPUT(4)
-#define DSS_SQUAREWAVE2__SHIFT DISCRETE_INPUT(5)
+#define DSS_SQUAREWAVE2__ENABLE DISCRETE_INPUT(0)
+#define DSS_SQUAREWAVE2__AMP DISCRETE_INPUT(1)
+#define DSS_SQUAREWAVE2__T_OFF DISCRETE_INPUT(2)
+#define DSS_SQUAREWAVE2__T_ON DISCRETE_INPUT(3)
+#define DSS_SQUAREWAVE2__BIAS DISCRETE_INPUT(4)
+#define DSS_SQUAREWAVE2__SHIFT DISCRETE_INPUT(5)
DISCRETE_STEP(dss_squarewave2)
{
@@ -1559,7 +1559,7 @@ DISCRETE_STEP(dss_inverter_osc)
DISCRETE_DECLARE_INFO(description)
double diff, vG1, vG2, vG3, vI;
double vMix, rMix;
- int clamped;
+ int clamped;
double v_out;
/* Get new state */
@@ -1617,8 +1617,8 @@ DISCRETE_STEP(dss_inverter_osc)
{
double ratio = mc_rp / (mc_rp + mc_r1);
diff = vG3 * (ratio)
- - (mc_v_cap + vG2)
- + vI * (1.0 - ratio);
+ - (mc_v_cap + vG2)
+ + vI * (1.0 - ratio);
diff = diff - diff * mc_wc;
}
else
@@ -1710,11 +1710,11 @@ DISCRETE_RESET(dss_inverter_osc)
* input4 - Initial Phase
*
************************************************************************/
-#define DSS_TRIANGLEWAVE__ENABLE DISCRETE_INPUT(0)
-#define DSS_TRIANGLEWAVE__FREQ DISCRETE_INPUT(1)
-#define DSS_TRIANGLEWAVE__AMP DISCRETE_INPUT(2)
-#define DSS_TRIANGLEWAVE__BIAS DISCRETE_INPUT(3)
-#define DSS_TRIANGLEWAVE__PHASE DISCRETE_INPUT(4)
+#define DSS_TRIANGLEWAVE__ENABLE DISCRETE_INPUT(0)
+#define DSS_TRIANGLEWAVE__FREQ DISCRETE_INPUT(1)
+#define DSS_TRIANGLEWAVE__AMP DISCRETE_INPUT(2)
+#define DSS_TRIANGLEWAVE__BIAS DISCRETE_INPUT(3)
+#define DSS_TRIANGLEWAVE__PHASE DISCRETE_INPUT(4)
DISCRETE_STEP(dss_trianglewave)
{
@@ -1765,7 +1765,7 @@ DISCRETE_RESET(dss_trianglewave)
* input2 - gain scaling factor
*
************************************************************************/
-#define DSS_ADSR__ENABLE DISCRETE_INPUT(0)
+#define DSS_ADSR__ENABLE DISCRETE_INPUT(0)
DISCRETE_STEP(dss_adsrenv)
{
diff --git a/src/emu/sound/disc_wav.h b/src/emu/sound/disc_wav.h
index f0d37544ba6..d5c7bc57293 100644
--- a/src/emu/sound/disc_wav.h
+++ b/src/emu/sound/disc_wav.h
@@ -22,81 +22,81 @@
#include "discrete.h"
DISCRETE_CLASS_STEP_RESET(dss_counter, 1,
- int m_clock_type;
- int m_out_type;
- int m_is_7492;
- int m_last_clock;
- UINT32 m_last_count;
- UINT32 m_last; /* Last clock state */
- UINT32 m_min;
- UINT32 m_max;
- UINT32 m_diff;
- double m_t_left; /* time unused during last sample in seconds */
+ int m_clock_type;
+ int m_out_type;
+ int m_is_7492;
+ int m_last_clock;
+ UINT32 m_last_count;
+ UINT32 m_last; /* Last clock state */
+ UINT32 m_min;
+ UINT32 m_max;
+ UINT32 m_diff;
+ double m_t_left; /* time unused during last sample in seconds */
);
DISCRETE_CLASS_STEP_RESET(dss_lfsr_noise, 2,
- unsigned int m_lfsr_reg;
- int m_last; /* Last clock state */
- double m_t_clock; /* fixed counter clock in seconds */
- double m_t_left; /* time unused during last sample in seconds */
- double m_sample_step;
- double m_t;
- UINT8 m_reset_on_high;
- UINT8 m_invert_output;
- UINT8 m_out_is_f0;
- UINT8 m_out_lfsr_reg;
+ unsigned int m_lfsr_reg;
+ int m_last; /* Last clock state */
+ double m_t_clock; /* fixed counter clock in seconds */
+ double m_t_left; /* time unused during last sample in seconds */
+ double m_sample_step;
+ double m_t;
+ UINT8 m_reset_on_high;
+ UINT8 m_invert_output;
+ UINT8 m_out_is_f0;
+ UINT8 m_out_lfsr_reg;
);
DISCRETE_CLASS_STEP_RESET(dss_noise, 2,
- double m_phase;
+ double m_phase;
);
DISCRETE_CLASS_STEP_RESET(dss_note, 1,
- int m_clock_type;
- int m_out_type;
- int m_last; /* Last clock state */
- double m_t_clock; /* fixed counter clock in seconds */
- double m_t_left; /* time unused during last sample in seconds */
- int m_max1; /* Max 1 Count stored as int for easy use. */
- int m_max2; /* Max 2 Count stored as int for easy use. */
- int m_count1; /* current count1 */
- int m_count2; /* current count2 */
+ int m_clock_type;
+ int m_out_type;
+ int m_last; /* Last clock state */
+ double m_t_clock; /* fixed counter clock in seconds */
+ double m_t_left; /* time unused during last sample in seconds */
+ int m_max1; /* Max 1 Count stored as int for easy use. */
+ int m_max2; /* Max 2 Count stored as int for easy use. */
+ int m_count1; /* current count1 */
+ int m_count2; /* current count2 */
);
DISCRETE_CLASS_STEP_RESET(dss_sawtoothwave, 1,
- double m_phase;
- int m_type;
+ double m_phase;
+ int m_type;
);
DISCRETE_CLASS_STEP_RESET(dss_sinewave, 1,
- double m_phase;
+ double m_phase;
);
DISCRETE_CLASS_STEP_RESET(dss_squarewave, 1,
- double m_phase;
- double m_trigger;
+ double m_phase;
+ double m_trigger;
);
DISCRETE_CLASS_STEP_RESET(dss_squarewfix, 1,
- int m_flip_flop;
- double m_sample_step;
- double m_t_left;
- double m_t_off;
- double m_t_on;
+ int m_flip_flop;
+ double m_sample_step;
+ double m_t_left;
+ double m_t_off;
+ double m_t_on;
);
DISCRETE_CLASS_STEP_RESET(dss_squarewave2, 1,
- double m_phase;
- double m_trigger;
+ double m_phase;
+ double m_trigger;
);
DISCRETE_CLASS_STEP_RESET(dss_trianglewave, 1,
- double m_phase;
+ double m_phase;
);
/* Component specific modules */
-#define DSS_INV_TAB_SIZE 500
-#define DEFAULT_CD40XX_VALUES(_vB) (_vB),(_vB)*0.02,(_vB)*0.98,(_vB)/5.0*1.5,(_vB)/5.0*3.5, 0.1
+#define DSS_INV_TAB_SIZE 500
+#define DEFAULT_CD40XX_VALUES(_vB) (_vB),(_vB)*0.02,(_vB)*0.98,(_vB)/5.0*1.5,(_vB)/5.0*3.5, 0.1
class DISCRETE_CLASS_NAME(dss_inverter_osc): public discrete_base_node, public discrete_step_interface
{
@@ -105,13 +105,13 @@ class DISCRETE_CLASS_NAME(dss_inverter_osc): public discrete_base_node, public d
public:
struct description
{
- double vB;
- double vOutLow;
- double vOutHigh;
- double vInFall; // voltage that triggers the gate input to go low (0V) on fall
- double vInRise; // voltage that triggers the gate input to go high (vGate) on rise
- double clamp; // voltage is clamped to -clamp ... vb+clamp if clamp>= 0;
- int options; // bitmaped options
+ double vB;
+ double vOutLow;
+ double vOutHigh;
+ double vInFall; // voltage that triggers the gate input to go low (0V) on fall
+ double vInRise; // voltage that triggers the gate input to go high (vGate) on rise
+ double clamp; // voltage is clamped to -clamp ... vb+clamp if clamp>= 0;
+ int options; // bitmaped options
};
enum {
IS_TYPE1 = 0x00,
@@ -128,63 +128,63 @@ protected:
inline double tftab(double x);
inline double tf(double x);
private:
- DISCRETE_CLASS_INPUT(I_ENABLE, 0);
- DISCRETE_CLASS_INPUT(I_MOD, 1);
- DISCRETE_CLASS_INPUT(I_RC, 2);
- DISCRETE_CLASS_INPUT(I_RP, 3);
- DISCRETE_CLASS_INPUT(I_C, 4);
- DISCRETE_CLASS_INPUT(I_R2, 5);
-
- double mc_v_cap;
- double mc_v_g2_old;
- double mc_w;
- double mc_wc;
- double mc_rp;
- double mc_r1;
- double mc_r2;
- double mc_c;
- double mc_tf_a;
- double mc_tf_b;
- double mc_tf_tab[DSS_INV_TAB_SIZE];
+ DISCRETE_CLASS_INPUT(I_ENABLE, 0);
+ DISCRETE_CLASS_INPUT(I_MOD, 1);
+ DISCRETE_CLASS_INPUT(I_RC, 2);
+ DISCRETE_CLASS_INPUT(I_RP, 3);
+ DISCRETE_CLASS_INPUT(I_C, 4);
+ DISCRETE_CLASS_INPUT(I_R2, 5);
+
+ double mc_v_cap;
+ double mc_v_g2_old;
+ double mc_w;
+ double mc_wc;
+ double mc_rp;
+ double mc_r1;
+ double mc_r2;
+ double mc_c;
+ double mc_tf_a;
+ double mc_tf_b;
+ double mc_tf_tab[DSS_INV_TAB_SIZE];
};
DISCRETE_CLASS_STEP_RESET(dss_op_amp_osc, 1,
- const double * m_r[8]; /* pointers to resistor values */
- int m_type;
- UINT8 m_flip_flop; /* flip/flop output state */
- UINT8 m_flip_flop_xor; /* flip_flop ^ flip_flop_xor, 0 = discharge, 1 = charge */
- UINT8 m_output_type;
- UINT8 m_has_enable;
- double m_v_out_high;
- double m_threshold_low; /* falling threshold */
- double m_threshold_high; /* rising threshold */
- double m_v_cap; /* current capacitor voltage */
- double m_r_total; /* all input resistors in parallel */
- double m_i_fixed; /* fixed current at the input */
- double m_i_enable; /* fixed current at the input if enabled */
- double m_temp1; /* Multi purpose */
- double m_temp2; /* Multi purpose */
- double m_temp3; /* Multi purpose */
- double m_is_linear_charge;
- double m_charge_rc[2];
- double m_charge_exp[2];
- double m_charge_v[2];
+ const double * m_r[8]; /* pointers to resistor values */
+ int m_type;
+ UINT8 m_flip_flop; /* flip/flop output state */
+ UINT8 m_flip_flop_xor; /* flip_flop ^ flip_flop_xor, 0 = discharge, 1 = charge */
+ UINT8 m_output_type;
+ UINT8 m_has_enable;
+ double m_v_out_high;
+ double m_threshold_low; /* falling threshold */
+ double m_threshold_high; /* rising threshold */
+ double m_v_cap; /* current capacitor voltage */
+ double m_r_total; /* all input resistors in parallel */
+ double m_i_fixed; /* fixed current at the input */
+ double m_i_enable; /* fixed current at the input if enabled */
+ double m_temp1; /* Multi purpose */
+ double m_temp2; /* Multi purpose */
+ double m_temp3; /* Multi purpose */
+ double m_is_linear_charge;
+ double m_charge_rc[2];
+ double m_charge_exp[2];
+ double m_charge_v[2];
);
DISCRETE_CLASS_STEP_RESET(dss_schmitt_osc, 1,
- double m_ration_in; /* ratio of total charging voltage that comes from the input */
- double m_ratio_feedback; /* ratio of total charging voltage that comes from the feedback */
- double m_v_cap; /* current capacitor voltage */
- double m_rc; /* r*c */
- double m_exponent;
- int m_state; /* state of the output */
- int m_enable_type;
- UINT8 m_input_is_voltage;
+ double m_ration_in; /* ratio of total charging voltage that comes from the input */
+ double m_ratio_feedback; /* ratio of total charging voltage that comes from the feedback */
+ double m_v_cap; /* current capacitor voltage */
+ double m_rc; /* r*c */
+ double m_exponent;
+ int m_state; /* state of the output */
+ int m_enable_type;
+ UINT8 m_input_is_voltage;
);
/* Not yet implemented */
DISCRETE_CLASS_STEP_RESET(dss_adsrenv, 1,
- double m_phase;
+ double m_phase;
);
diff --git a/src/emu/sound/discrete.c b/src/emu/sound/discrete.c
index 34668fb26aa..c729aeb75c3 100644
--- a/src/emu/sound/discrete.c
+++ b/src/emu/sound/discrete.c
@@ -59,7 +59,7 @@ const device_type DISCRETE = &device_creator<discrete_sound_device>;
* Values > 500 have a slightly worse performace (too much cache misses?).
*/
-#define MAX_SAMPLES_PER_TASK_SLICE (960/4)
+#define MAX_SAMPLES_PER_TASK_SLICE (960/4)
/*************************************
*
@@ -67,7 +67,7 @@ const device_type DISCRETE = &device_creator<discrete_sound_device>;
*
*************************************/
-#define DISCRETE_DEBUGLOG (0)
+#define DISCRETE_DEBUGLOG (0)
/*************************************
*
@@ -75,7 +75,7 @@ const device_type DISCRETE = &device_creator<discrete_sound_device>;
*
*************************************/
-#define USE_DISCRETE_TASKS (1)
+#define USE_DISCRETE_TASKS (1)
/*************************************
*
@@ -85,17 +85,17 @@ const device_type DISCRETE = &device_creator<discrete_sound_device>;
struct output_buffer
{
- double *node_buf;
- const double *source;
- volatile double *ptr;
- int node_num;
+ double *node_buf;
+ const double *source;
+ volatile double *ptr;
+ int node_num;
};
struct input_buffer
{
- volatile const double *ptr; /* pointer into linked_outbuf.nodebuf */
- output_buffer * linked_outbuf; /* what output are we connected to ? */
- double buffer; /* input[] will point here */
+ volatile const double *ptr; /* pointer into linked_outbuf.nodebuf */
+ output_buffer * linked_outbuf; /* what output are we connected to ? */
+ double buffer; /* input[] will point here */
};
class discrete_task
@@ -114,12 +114,12 @@ public:
inline void unlock(void) { m_threadid = -1; }
//const linked_list_entry *list;
- node_step_list_t step_list;
+ node_step_list_t step_list;
/* list of source nodes */
- dynamic_array_t<input_buffer> source_list; /* discrete_source_node */
+ dynamic_array_t<input_buffer> source_list; /* discrete_source_node */
- int task_group;
+ int task_group;
protected:
@@ -137,12 +137,12 @@ protected:
void check(discrete_task *dest_task);
void prepare_for_queue(int samples);
- dynamic_array_t<output_buffer> m_buffers;
- discrete_device & m_device;
+ dynamic_array_t<output_buffer> m_buffers;
+ discrete_device & m_device;
private:
- volatile INT32 m_threadid;
- volatile int m_samples;
+ volatile INT32 m_threadid;
+ volatile int m_samples;
};
@@ -153,12 +153,12 @@ private:
*
*************************************/
-#include "disc_sys.c" /* discrete core modules and support functions */
-#include "disc_wav.c" /* Wave sources - SINE/SQUARE/NOISE/etc */
-#include "disc_mth.c" /* Math Devices - ADD/GAIN/etc */
-#include "disc_inp.c" /* Input Devices - INPUT/CONST/etc */
-#include "disc_flt.c" /* Filter Devices - RCF/HPF/LPF */
-#include "disc_dev.c" /* Popular Devices - NE555/etc */
+#include "disc_sys.c" /* discrete core modules and support functions */
+#include "disc_wav.c" /* Wave sources - SINE/SQUARE/NOISE/etc */
+#include "disc_mth.c" /* Math Devices - ADD/GAIN/etc */
+#include "disc_inp.c" /* Input Devices - INPUT/CONST/etc */
+#include "disc_flt.c" /* Filter Devices - RCF/HPF/LPF */
+#include "disc_dev.c" /* Popular Devices - NE555/etc */
/*************************************
*
@@ -280,8 +280,8 @@ void discrete_task::check(discrete_task *dest_task)
int inputnum;
/* Determine, which nodes in the task are referenced by nodes in dest_task
- * and add them to the list of nodes to be buffered for further processing
- */
+ * and add them to the list of nodes to be buffered for further processing
+ */
for_each(discrete_step_interface **, node_entry, &step_list)
{
@@ -417,8 +417,8 @@ void discrete_base_node::resolve_input_nodes(void)
if ((NODE_CHILD_NODE_NUM(inputnode) >= node_ref->max_output()) /*&& (node_ref->module_type() != DST_CUSTOM)*/)
fatalerror("discrete_start - NODE_%02d referenced non existent output %d on node NODE_%02d\n", index(), NODE_CHILD_NODE_NUM(inputnode), NODE_INDEX(inputnode));
- m_input[inputnum] = &(node_ref->m_output[NODE_CHILD_NODE_NUM(inputnode)]); /* Link referenced node out to input */
- m_input_is_node |= 1 << inputnum; /* Bit flag if input is node */
+ m_input[inputnum] = &(node_ref->m_output[NODE_CHILD_NODE_NUM(inputnode)]); /* Link referenced node out to input */
+ m_input_is_node |= 1 << inputnum; /* Bit flag if input is node */
}
else
{
@@ -674,7 +674,7 @@ void discrete_device::init_nodes(const sound_block_list_t &block_list)
{
discrete_task *task = NULL;
/* list tail pointers */
- int has_tasks = 0;
+ int has_tasks = 0;
/* check whether we have tasks ... */
if (USE_DISCRETE_TASKS)
@@ -689,8 +689,8 @@ void discrete_device::init_nodes(const sound_block_list_t &block_list)
if (!has_tasks)
{
/* make sure we have one simple task
- * No need to create a node since there are no dependencies.
- */
+ * No need to create a node since there are no dependencies.
+ */
task = auto_alloc_clear(machine(), discrete_task(*this));
task_list.add(task);
}
@@ -828,22 +828,22 @@ void discrete_device::static_set_intf(device_t &device, const discrete_block *in
discrete_device::discrete_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- m_intf(NULL),
- m_sample_rate(0),
- m_sample_time(0),
- m_neg_sample_time(0),
- m_indexed_node(NULL),
- m_disclogfile(NULL),
- m_queue(NULL),
- m_profiling(0),
- m_total_samples(0),
- m_total_stream_updates(0)
+ m_intf(NULL),
+ m_sample_rate(0),
+ m_sample_time(0),
+ m_neg_sample_time(0),
+ m_indexed_node(NULL),
+ m_disclogfile(NULL),
+ m_queue(NULL),
+ m_profiling(0),
+ m_total_samples(0),
+ m_total_stream_updates(0)
{
}
discrete_sound_device::discrete_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: discrete_device(mconfig, DISCRETE, "DISCRETE", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -948,8 +948,8 @@ void discrete_device::device_stop()
if (DISCRETE_DEBUGLOG)
{
/* close the debug log */
- if (m_disclogfile)
- fclose(m_disclogfile);
+ if (m_disclogfile)
+ fclose(m_disclogfile);
m_disclogfile = NULL;
}
}
@@ -1109,7 +1109,7 @@ READ8_MEMBER( discrete_device::read )
else
fatalerror("discrete_sound_r read from non-existent NODE_%02d\n", offset-NODE_00);
- return data;
+ return data;
}
//-------------------------------------------------
diff --git a/src/emu/sound/discrete.h b/src/emu/sound/discrete.h
index 3961c4fc2ec..efd8cf616a2 100644
--- a/src/emu/sound/discrete.h
+++ b/src/emu/sound/discrete.h
@@ -3475,18 +3475,18 @@
*************************************/
/* calculate charge exponent using discrete sample time */
-#define RC_CHARGE_EXP(rc) (1.0 - exp(-this->sample_time() / (rc)))
+#define RC_CHARGE_EXP(rc) (1.0 - exp(-this->sample_time() / (rc)))
/* calculate charge exponent using given sample time */
-#define RC_CHARGE_EXP_DT(rc, dt) (1.0 - exp(-(dt) / (rc)))
-#define RC_CHARGE_NEG_EXP_DT(rc, dt) (1.0 - exp((dt) / (rc)))
+#define RC_CHARGE_EXP_DT(rc, dt) (1.0 - exp(-(dt) / (rc)))
+#define RC_CHARGE_NEG_EXP_DT(rc, dt) (1.0 - exp((dt) / (rc)))
/* calculate discharge exponent using discrete sample time */
-#define RC_DISCHARGE_EXP(rc) (exp(-this->sample_time() / (rc)))
+#define RC_DISCHARGE_EXP(rc) (exp(-this->sample_time() / (rc)))
/* calculate discharge exponent using given sample time */
-#define RC_DISCHARGE_EXP_DT(rc, dt) (exp(-(dt) / (rc)))
-#define RC_DISCHARGE_NEG_EXP_DT(rc, dt) (exp((dt) / (rc)))
+#define RC_DISCHARGE_EXP_DT(rc, dt) (exp(-(dt) / (rc)))
+#define RC_DISCHARGE_NEG_EXP_DT(rc, dt) (exp((dt) / (rc)))
-#define FREQ_OF_555(_r1, _r2, _c) (1.49 / ((_r1 + 2 * _r2) * _c))
+#define FREQ_OF_555(_r1, _r2, _c) (1.49 / ((_r1 + 2 * _r2) * _c))
/*************************************
*
@@ -3494,16 +3494,16 @@
*
*************************************/
-#define DISCRETE_CLASS_FUNC(_class, _func) DISCRETE_CLASS_NAME(_class) :: _func
+#define DISCRETE_CLASS_FUNC(_class, _func) DISCRETE_CLASS_NAME(_class) :: _func
-#define DISCRETE_STEP(_class) void DISCRETE_CLASS_FUNC(_class, step)(void)
-#define DISCRETE_RESET(_class) void DISCRETE_CLASS_FUNC(_class, reset)(void)
-#define DISCRETE_START(_class) void DISCRETE_CLASS_FUNC(_class, start)(void)
-#define DISCRETE_STOP(_class) void DISCRETE_CLASS_FUNC(_class, stop)(void)
-#define DISCRETE_DECLARE_INFO(_name) const _name *info = (const _name *)this->custom_data();
+#define DISCRETE_STEP(_class) void DISCRETE_CLASS_FUNC(_class, step)(void)
+#define DISCRETE_RESET(_class) void DISCRETE_CLASS_FUNC(_class, reset)(void)
+#define DISCRETE_START(_class) void DISCRETE_CLASS_FUNC(_class, start)(void)
+#define DISCRETE_STOP(_class) void DISCRETE_CLASS_FUNC(_class, stop)(void)
+#define DISCRETE_DECLARE_INFO(_name) const _name *info = (const _name *)this->custom_data();
//#define DISCRETE_INPUT(_num) (*(this->m_input[_num]))
-#define DISCRETE_INPUT(_num) (input(_num))
+#define DISCRETE_INPUT(_num) (input(_num))
/*************************************
*
@@ -3511,11 +3511,11 @@
*
*************************************/
-#define DISCRETE_MAX_NODES 300
-#define DISCRETE_MAX_INPUTS 10
-#define DISCRETE_MAX_OUTPUTS 8
+#define DISCRETE_MAX_NODES 300
+#define DISCRETE_MAX_INPUTS 10
+#define DISCRETE_MAX_OUTPUTS 8
-#define DISCRETE_MAX_TASK_GROUPS 10
+#define DISCRETE_MAX_TASK_GROUPS 10
/*************************************
@@ -3524,79 +3524,79 @@
*
*************************************/
-#define DEFAULT_TTL_V_LOGIC_1 3.4
+#define DEFAULT_TTL_V_LOGIC_1 3.4
-#define DISC_LOGADJ 1.0
-#define DISC_LINADJ 0.0
+#define DISC_LOGADJ 1.0
+#define DISC_LINADJ 0.0
/* DISCRETE_COMP_ADDER types */
-#define DISC_COMP_P_CAPACITOR 0x00
-#define DISC_COMP_P_RESISTOR 0x01
+#define DISC_COMP_P_CAPACITOR 0x00
+#define DISC_COMP_P_RESISTOR 0x01
/* clk types */
-#define DISC_CLK_MASK 0x03
-#define DISC_CLK_ON_F_EDGE 0x00
-#define DISC_CLK_ON_R_EDGE 0x01
-#define DISC_CLK_BY_COUNT 0x02
-#define DISC_CLK_IS_FREQ 0x03
+#define DISC_CLK_MASK 0x03
+#define DISC_CLK_ON_F_EDGE 0x00
+#define DISC_CLK_ON_R_EDGE 0x01
+#define DISC_CLK_BY_COUNT 0x02
+#define DISC_CLK_IS_FREQ 0x03
-#define DISC_COUNT_DOWN 0
-#define DISC_COUNT_UP 1
+#define DISC_COUNT_DOWN 0
+#define DISC_COUNT_UP 1
-#define DISC_COUNTER_IS_7492 0x08
+#define DISC_COUNTER_IS_7492 0x08
-#define DISC_OUT_MASK 0x30
-#define DISC_OUT_DEFAULT 0x00
-#define DISC_OUT_IS_ENERGY 0x10
-#define DISC_OUT_HAS_XTIME 0x20
+#define DISC_OUT_MASK 0x30
+#define DISC_OUT_DEFAULT 0x00
+#define DISC_OUT_IS_ENERGY 0x10
+#define DISC_OUT_HAS_XTIME 0x20
/* Function possibilities for the LFSR feedback nodes */
/* 2 inputs, one output */
-#define DISC_LFSR_XOR 0
-#define DISC_LFSR_OR 1
-#define DISC_LFSR_AND 2
-#define DISC_LFSR_XNOR 3
-#define DISC_LFSR_NOR 4
-#define DISC_LFSR_NAND 5
-#define DISC_LFSR_IN0 6
-#define DISC_LFSR_IN1 7
-#define DISC_LFSR_NOT_IN0 8
-#define DISC_LFSR_NOT_IN1 9
-#define DISC_LFSR_REPLACE 10
-#define DISC_LFSR_XOR_INV_IN0 11
-#define DISC_LFSR_XOR_INV_IN1 12
+#define DISC_LFSR_XOR 0
+#define DISC_LFSR_OR 1
+#define DISC_LFSR_AND 2
+#define DISC_LFSR_XNOR 3
+#define DISC_LFSR_NOR 4
+#define DISC_LFSR_NAND 5
+#define DISC_LFSR_IN0 6
+#define DISC_LFSR_IN1 7
+#define DISC_LFSR_NOT_IN0 8
+#define DISC_LFSR_NOT_IN1 9
+#define DISC_LFSR_REPLACE 10
+#define DISC_LFSR_XOR_INV_IN0 11
+#define DISC_LFSR_XOR_INV_IN1 12
/* LFSR Flag Bits */
-#define DISC_LFSR_FLAG_OUT_INVERT 0x01
-#define DISC_LFSR_FLAG_RESET_TYPE_L 0x00
-#define DISC_LFSR_FLAG_RESET_TYPE_H 0x02
-#define DISC_LFSR_FLAG_OUTPUT_F0 0x04
-#define DISC_LFSR_FLAG_OUTPUT_SR_SN1 0x08
+#define DISC_LFSR_FLAG_OUT_INVERT 0x01
+#define DISC_LFSR_FLAG_RESET_TYPE_L 0x00
+#define DISC_LFSR_FLAG_RESET_TYPE_H 0x02
+#define DISC_LFSR_FLAG_OUTPUT_F0 0x04
+#define DISC_LFSR_FLAG_OUTPUT_SR_SN1 0x08
/* Sample & Hold supported clock types */
-#define DISC_SAMPHOLD_REDGE 0
-#define DISC_SAMPHOLD_FEDGE 1
-#define DISC_SAMPHOLD_HLATCH 2
-#define DISC_SAMPHOLD_LLATCH 3
+#define DISC_SAMPHOLD_REDGE 0
+#define DISC_SAMPHOLD_FEDGE 1
+#define DISC_SAMPHOLD_HLATCH 2
+#define DISC_SAMPHOLD_LLATCH 3
/* Shift options */
-#define DISC_LOGIC_SHIFT__RESET_L 0x00
-#define DISC_LOGIC_SHIFT__RESET_H 0x10
-#define DISC_LOGIC_SHIFT__LEFT 0x00
-#define DISC_LOGIC_SHIFT__RIGHT 0x20
+#define DISC_LOGIC_SHIFT__RESET_L 0x00
+#define DISC_LOGIC_SHIFT__RESET_H 0x10
+#define DISC_LOGIC_SHIFT__LEFT 0x00
+#define DISC_LOGIC_SHIFT__RIGHT 0x20
/* Maximum number of resistors in ladder chain */
-#define DISC_LADDER_MAXRES 8
+#define DISC_LADDER_MAXRES 8
/* Filter types */
-#define DISC_FILTER_LOWPASS 0
-#define DISC_FILTER_HIGHPASS 1
-#define DISC_FILTER_BANDPASS 2
+#define DISC_FILTER_LOWPASS 0
+#define DISC_FILTER_HIGHPASS 1
+#define DISC_FILTER_BANDPASS 2
/* Mixer types */
-#define DISC_MIXER_IS_RESISTOR 0
-#define DISC_MIXER_IS_OP_AMP 1
-#define DISC_MIXER_IS_OP_AMP_WITH_RI 2 /* Used only internally. Use DISC_MIXER_IS_OP_AMP */
+#define DISC_MIXER_IS_RESISTOR 0
+#define DISC_MIXER_IS_OP_AMP 1
+#define DISC_MIXER_IS_OP_AMP_WITH_RI 2 /* Used only internally. Use DISC_MIXER_IS_OP_AMP */
/* Triggered Op Amp Functions */
enum
@@ -3614,129 +3614,129 @@ enum
/* Common Op Amp Flags and values */
-#define DISC_OP_AMP_IS_NORTON 0x100
-#define OP_AMP_NORTON_VBE 0.5 // This is the norton junction voltage. Used only internally.
-#define OP_AMP_VP_RAIL_OFFSET 1.5 // This is how close an op-amp can get to the vP rail. Used only internally.
+#define DISC_OP_AMP_IS_NORTON 0x100
+#define OP_AMP_NORTON_VBE 0.5 // This is the norton junction voltage. Used only internally.
+#define OP_AMP_VP_RAIL_OFFSET 1.5 // This is how close an op-amp can get to the vP rail. Used only internally.
/* Integrate options */
-#define DISC_INTEGRATE_OP_AMP_1 0x00
-#define DISC_INTEGRATE_OP_AMP_2 0x10
+#define DISC_INTEGRATE_OP_AMP_1 0x00
+#define DISC_INTEGRATE_OP_AMP_2 0x10
/* op amp 1 shot types */
-#define DISC_OP_AMP_1SHT_1 0x00
+#define DISC_OP_AMP_1SHT_1 0x00
/* Op Amp Filter Options */
-#define DISC_OP_AMP_FILTER_IS_LOW_PASS_1 0x00
-#define DISC_OP_AMP_FILTER_IS_HIGH_PASS_1 0x10
-#define DISC_OP_AMP_FILTER_IS_BAND_PASS_1 0x20
-#define DISC_OP_AMP_FILTER_IS_BAND_PASS_1M 0x30
-#define DISC_OP_AMP_FILTER_IS_HIGH_PASS_0 0x40
-#define DISC_OP_AMP_FILTER_IS_BAND_PASS_0 0x50
-#define DISC_OP_AMP_FILTER_IS_LOW_PASS_1_A 0x60
+#define DISC_OP_AMP_FILTER_IS_LOW_PASS_1 0x00
+#define DISC_OP_AMP_FILTER_IS_HIGH_PASS_1 0x10
+#define DISC_OP_AMP_FILTER_IS_BAND_PASS_1 0x20
+#define DISC_OP_AMP_FILTER_IS_BAND_PASS_1M 0x30
+#define DISC_OP_AMP_FILTER_IS_HIGH_PASS_0 0x40
+#define DISC_OP_AMP_FILTER_IS_BAND_PASS_0 0x50
+#define DISC_OP_AMP_FILTER_IS_LOW_PASS_1_A 0x60
-#define DISC_OP_AMP_FILTER_TYPE_MASK (0xf0 | DISC_OP_AMP_IS_NORTON) // Used only internally.
+#define DISC_OP_AMP_FILTER_TYPE_MASK (0xf0 | DISC_OP_AMP_IS_NORTON) // Used only internally.
/* Sallen-Key filter Opions */
-#define DISC_SALLEN_KEY_LOW_PASS 0x01
-#define DISC_SALLEN_KEY_HIGH_PASS 0x02
+#define DISC_SALLEN_KEY_LOW_PASS 0x01
+#define DISC_SALLEN_KEY_HIGH_PASS 0x02
/* Op Amp Oscillator Flags */
-#define DISC_OP_AMP_OSCILLATOR_TYPE_MASK (0xf0 | DISC_OP_AMP_IS_NORTON) // Used only internally.
-#define DISC_OP_AMP_OSCILLATOR_1 0x00
-#define DISC_OP_AMP_OSCILLATOR_2 0x10
-#define DISC_OP_AMP_OSCILLATOR_VCO_1 0x20
-#define DISC_OP_AMP_OSCILLATOR_VCO_2 0x30
-#define DISC_OP_AMP_OSCILLATOR_VCO_3 0x40
-
-#define DISC_OP_AMP_OSCILLATOR_OUT_MASK 0x07
-#define DISC_OP_AMP_OSCILLATOR_OUT_CAP 0x00
-#define DISC_OP_AMP_OSCILLATOR_OUT_SQW 0x01
-#define DISC_OP_AMP_OSCILLATOR_OUT_ENERGY 0x02
-#define DISC_OP_AMP_OSCILLATOR_OUT_LOGIC_X 0x03
-#define DISC_OP_AMP_OSCILLATOR_OUT_COUNT_F_X 0x04
-#define DISC_OP_AMP_OSCILLATOR_OUT_COUNT_R_X 0x05
+#define DISC_OP_AMP_OSCILLATOR_TYPE_MASK (0xf0 | DISC_OP_AMP_IS_NORTON) // Used only internally.
+#define DISC_OP_AMP_OSCILLATOR_1 0x00
+#define DISC_OP_AMP_OSCILLATOR_2 0x10
+#define DISC_OP_AMP_OSCILLATOR_VCO_1 0x20
+#define DISC_OP_AMP_OSCILLATOR_VCO_2 0x30
+#define DISC_OP_AMP_OSCILLATOR_VCO_3 0x40
+
+#define DISC_OP_AMP_OSCILLATOR_OUT_MASK 0x07
+#define DISC_OP_AMP_OSCILLATOR_OUT_CAP 0x00
+#define DISC_OP_AMP_OSCILLATOR_OUT_SQW 0x01
+#define DISC_OP_AMP_OSCILLATOR_OUT_ENERGY 0x02
+#define DISC_OP_AMP_OSCILLATOR_OUT_LOGIC_X 0x03
+#define DISC_OP_AMP_OSCILLATOR_OUT_COUNT_F_X 0x04
+#define DISC_OP_AMP_OSCILLATOR_OUT_COUNT_R_X 0x05
/* Schmitt Oscillator Options */
-#define DISC_SCHMITT_OSC_IN_IS_LOGIC 0x00
-#define DISC_SCHMITT_OSC_IN_IS_VOLTAGE 0x01
+#define DISC_SCHMITT_OSC_IN_IS_LOGIC 0x00
+#define DISC_SCHMITT_OSC_IN_IS_VOLTAGE 0x01
-#define DISC_SCHMITT_OSC_ENAB_IS_AND 0x00
-#define DISC_SCHMITT_OSC_ENAB_IS_NAND 0x02
-#define DISC_SCHMITT_OSC_ENAB_IS_OR 0x04
-#define DISC_SCHMITT_OSC_ENAB_IS_NOR 0x06
+#define DISC_SCHMITT_OSC_ENAB_IS_AND 0x00
+#define DISC_SCHMITT_OSC_ENAB_IS_NAND 0x02
+#define DISC_SCHMITT_OSC_ENAB_IS_OR 0x04
+#define DISC_SCHMITT_OSC_ENAB_IS_NOR 0x06
-#define DISC_SCHMITT_OSC_ENAB_MASK 0x06 /* Bits that define output enable type.
+#define DISC_SCHMITT_OSC_ENAB_MASK 0x06 /* Bits that define output enable type.
* Used only internally in module. */
/* 555 Common output flags */
-#define DISC_555_OUT_DC 0x00
-#define DISC_555_OUT_AC 0x10
-
-#define DISC_555_TRIGGER_IS_LOGIC 0x00
-#define DISC_555_TRIGGER_IS_VOLTAGE 0x20
-#define DISC_555_TRIGGER_IS_COUNT 0x40
-#define DSD_555_TRIGGER_TYPE_MASK 0x60
-#define DISC_555_TRIGGER_DISCHARGES_CAP 0x80
-
-#define DISC_555_OUT_SQW 0x00 /* Squarewave */
-#define DISC_555_OUT_CAP 0x01 /* Cap charge waveform */
-#define DISC_555_OUT_COUNT_F 0x02 /* Falling count */
-#define DISC_555_OUT_COUNT_R 0x03 /* Rising count */
-#define DISC_555_OUT_ENERGY 0x04
-#define DISC_555_OUT_LOGIC_X 0x05
-#define DISC_555_OUT_COUNT_F_X 0x06
-#define DISC_555_OUT_COUNT_R_X 0x07
-
-#define DISC_555_OUT_MASK 0x07 /* Bits that define output type.
+#define DISC_555_OUT_DC 0x00
+#define DISC_555_OUT_AC 0x10
+
+#define DISC_555_TRIGGER_IS_LOGIC 0x00
+#define DISC_555_TRIGGER_IS_VOLTAGE 0x20
+#define DISC_555_TRIGGER_IS_COUNT 0x40
+#define DSD_555_TRIGGER_TYPE_MASK 0x60
+#define DISC_555_TRIGGER_DISCHARGES_CAP 0x80
+
+#define DISC_555_OUT_SQW 0x00 /* Squarewave */
+#define DISC_555_OUT_CAP 0x01 /* Cap charge waveform */
+#define DISC_555_OUT_COUNT_F 0x02 /* Falling count */
+#define DISC_555_OUT_COUNT_R 0x03 /* Rising count */
+#define DISC_555_OUT_ENERGY 0x04
+#define DISC_555_OUT_LOGIC_X 0x05
+#define DISC_555_OUT_COUNT_F_X 0x06
+#define DISC_555_OUT_COUNT_R_X 0x07
+
+#define DISC_555_OUT_MASK 0x07 /* Bits that define output type.
* Used only internally in module. */
-#define DISC_555_ASTABLE_HAS_FAST_CHARGE_DIODE 0x80
-#define DISCRETE_555_CC_TO_DISCHARGE_PIN 0x00
-#define DISCRETE_555_CC_TO_CAP 0x80
+#define DISC_555_ASTABLE_HAS_FAST_CHARGE_DIODE 0x80
+#define DISCRETE_555_CC_TO_DISCHARGE_PIN 0x00
+#define DISCRETE_555_CC_TO_CAP 0x80
/* 566 output flags */
-#define DISC_566_OUT_DC 0x00
-#define DISC_566_OUT_AC 0x10
-
-#define DISC_566_OUT_SQUARE 0x00 /* Squarewave */
-#define DISC_566_OUT_ENERGY 0x01 /* anti-alaised Squarewave */
-#define DISC_566_OUT_TRIANGLE 0x02 /* Triangle waveform */
-#define DISC_566_OUT_LOGIC 0x03 /* 0/1 logic output */
-#define DISC_566_OUT_COUNT_F 0x04
-#define DISC_566_OUT_COUNT_R 0x05
-#define DISC_566_OUT_COUNT_F_X 0x06
-#define DISC_566_OUT_COUNT_R_X 0x07
-#define DISC_566_OUT_MASK 0x07 /* Bits that define output type.
+#define DISC_566_OUT_DC 0x00
+#define DISC_566_OUT_AC 0x10
+
+#define DISC_566_OUT_SQUARE 0x00 /* Squarewave */
+#define DISC_566_OUT_ENERGY 0x01 /* anti-alaised Squarewave */
+#define DISC_566_OUT_TRIANGLE 0x02 /* Triangle waveform */
+#define DISC_566_OUT_LOGIC 0x03 /* 0/1 logic output */
+#define DISC_566_OUT_COUNT_F 0x04
+#define DISC_566_OUT_COUNT_R 0x05
+#define DISC_566_OUT_COUNT_F_X 0x06
+#define DISC_566_OUT_COUNT_R_X 0x07
+#define DISC_566_OUT_MASK 0x07 /* Bits that define output type.
* Used only internally in module. */
/* LS624 output flags */
-#define DISC_LS624_OUT_SQUARE 0x01
-#define DISC_LS624_OUT_ENERGY 0x02
-#define DISC_LS624_OUT_LOGIC 0x03
-#define DISC_LS624_OUT_LOGIC_X 0x04
-#define DISC_LS624_OUT_COUNT_F 0x05
-#define DISC_LS624_OUT_COUNT_R 0x06
-#define DISC_LS624_OUT_COUNT_F_X 0x07
-#define DISC_LS624_OUT_COUNT_R_X 0x08
+#define DISC_LS624_OUT_SQUARE 0x01
+#define DISC_LS624_OUT_ENERGY 0x02
+#define DISC_LS624_OUT_LOGIC 0x03
+#define DISC_LS624_OUT_LOGIC_X 0x04
+#define DISC_LS624_OUT_COUNT_F 0x05
+#define DISC_LS624_OUT_COUNT_R 0x06
+#define DISC_LS624_OUT_COUNT_F_X 0x07
+#define DISC_LS624_OUT_COUNT_R_X 0x08
/* Oneshot types */
-#define DISC_ONESHOT_FEDGE 0x00
-#define DISC_ONESHOT_REDGE 0x01
+#define DISC_ONESHOT_FEDGE 0x00
+#define DISC_ONESHOT_REDGE 0x01
-#define DISC_ONESHOT_NORETRIG 0x00
-#define DISC_ONESHOT_RETRIG 0x02
+#define DISC_ONESHOT_NORETRIG 0x00
+#define DISC_ONESHOT_RETRIG 0x02
-#define DISC_OUT_ACTIVE_LOW 0x04
-#define DISC_OUT_ACTIVE_HIGH 0x00
+#define DISC_OUT_ACTIVE_LOW 0x04
+#define DISC_OUT_ACTIVE_HIGH 0x00
-#define DISC_CD4066_THRESHOLD 2.75
+#define DISC_CD4066_THRESHOLD 2.75
/* Integrate */
-#define DISC_RC_INTEGRATE_TYPE1 0x00
-#define DISC_RC_INTEGRATE_TYPE2 0x01
-#define DISC_RC_INTEGRATE_TYPE3 0x02
+#define DISC_RC_INTEGRATE_TYPE1 0x00
+#define DISC_RC_INTEGRATE_TYPE2 0x01
+#define DISC_RC_INTEGRATE_TYPE3 0x02
/*************************************
*
@@ -3784,7 +3784,7 @@ public:
}
dynamic_array_t& operator = (const dynamic_array_t &a) // assignment operator
{
- if (this == &a) return *this;
+ if (this == &a) return *this;
m_allocated = a.count();
if (m_allocated < 16)
m_allocated = 16;
@@ -3792,7 +3792,7 @@ public:
m_arr = global_alloc_array_clear(_ElementType, m_allocated);
for (int i=0; i < m_count; i++)
m_arr[i] = a[i];
- return *this;
+ return *this;
}
inline _ElementType* add(_ElementType object)
@@ -3816,13 +3816,13 @@ public:
m_arr[i-1] = m_arr[i];
m_count--;
}
- inline void clear(void) { m_count = 0; }
+ inline void clear(void) { m_count = 0; }
inline int count(void) const { return m_count; }
inline _ElementType *begin_ptr(void) const { return m_arr; }
inline _ElementType *end_ptr(void) const { return m_arr + (m_count - 1); }
private:
- _ElementType *m_arr;
- int m_count;
+ _ElementType *m_arr;
+ int m_count;
int m_allocated;
};
@@ -3855,192 +3855,192 @@ struct discrete_lfsr_desc
struct discrete_op_amp_osc_info
{
- UINT32 type;
- double r1;
- double r2;
- double r3;
- double r4;
- double r5;
- double r6;
- double r7;
- double r8;
- double c;
- double vP; // Op amp B+
+ UINT32 type;
+ double r1;
+ double r2;
+ double r3;
+ double r4;
+ double r5;
+ double r6;
+ double r7;
+ double r8;
+ double c;
+ double vP; // Op amp B+
};
-#define DEFAULT_7414_VALUES 1.7, 0.9, 3.4
+#define DEFAULT_7414_VALUES 1.7, 0.9, 3.4
-#define DEFAULT_74LS14_VALUES 1.6, 0.8, 3.4
+#define DEFAULT_74LS14_VALUES 1.6, 0.8, 3.4
struct discrete_schmitt_osc_desc
{
- double rIn;
- double rFeedback;
- double c;
- double trshRise; // voltage that triggers the gate input to go high (vGate) on rise
- double trshFall; // voltage that triggers the gate input to go low (0V) on fall
- double vGate; // the output high voltage of the gate that gets fedback through rFeedback
- int options; // bitmaped options
+ double rIn;
+ double rFeedback;
+ double c;
+ double trshRise; // voltage that triggers the gate input to go high (vGate) on rise
+ double trshFall; // voltage that triggers the gate input to go low (0V) on fall
+ double vGate; // the output high voltage of the gate that gets fedback through rFeedback
+ int options; // bitmaped options
};
struct discrete_comp_adder_table
{
- int type;
- double cDefault; // Default componet. 0 if not used.
- int length;
- double c[DISC_LADDER_MAXRES]; // Componet table
+ int type;
+ double cDefault; // Default componet. 0 if not used.
+ int length;
+ double c[DISC_LADDER_MAXRES]; // Componet table
};
struct discrete_dac_r1_ladder
{
- int ladderLength; // 2 to DISC_LADDER_MAXRES. 1 would be useless.
- double r[DISC_LADDER_MAXRES]; // Don't use 0 for valid resistors. That is a short.
- double vBias; // Voltage Bias resistor is tied to (0 = not used)
- double rBias; // Additional resistor tied to vBias (0 = not used)
- double rGnd; // Resistor tied to ground (0 = not used)
- double cFilter; // Filtering cap (0 = not used)
+ int ladderLength; // 2 to DISC_LADDER_MAXRES. 1 would be useless.
+ double r[DISC_LADDER_MAXRES]; // Don't use 0 for valid resistors. That is a short.
+ double vBias; // Voltage Bias resistor is tied to (0 = not used)
+ double rBias; // Additional resistor tied to vBias (0 = not used)
+ double rGnd; // Resistor tied to ground (0 = not used)
+ double cFilter; // Filtering cap (0 = not used)
};
struct discrete_integrate_info
{
- UINT32 type;
- double r1; // r1a + r1b
- double r2; // r2a + r2b
- double r3; // r3a + r3b
- double c;
- double v1;
- double vP;
- double f0;
- double f1;
- double f2;
+ UINT32 type;
+ double r1; // r1a + r1b
+ double r2; // r2a + r2b
+ double r3; // r3a + r3b
+ double c;
+ double v1;
+ double vP;
+ double f0;
+ double f1;
+ double f2;
};
-#define DISC_MAX_MIXER_INPUTS 8
+#define DISC_MAX_MIXER_INPUTS 8
struct discrete_mixer_desc
{
- int type;
- double r[DISC_MAX_MIXER_INPUTS]; /* static input resistance values. These are in series with rNode, if used. */
- int r_node[DISC_MAX_MIXER_INPUTS]; /* variable resistance nodes, if needed. 0 if not used. */
- double c[DISC_MAX_MIXER_INPUTS];
- double rI;
- double rF;
- double cF;
- double cAmp;
- double vRef;
- double gain; /* Scale value to get output close to +/- 32767 */
+ int type;
+ double r[DISC_MAX_MIXER_INPUTS]; /* static input resistance values. These are in series with rNode, if used. */
+ int r_node[DISC_MAX_MIXER_INPUTS]; /* variable resistance nodes, if needed. 0 if not used. */
+ double c[DISC_MAX_MIXER_INPUTS];
+ double rI;
+ double rF;
+ double cF;
+ double cAmp;
+ double vRef;
+ double gain; /* Scale value to get output close to +/- 32767 */
};
struct discrete_op_amp_info
{
- UINT32 type;
- double r1;
- double r2;
- double r3;
- double r4;
- double c;
- double vN; // Op amp B-
- double vP; // Op amp B+
+ UINT32 type;
+ double r1;
+ double r2;
+ double r3;
+ double r4;
+ double c;
+ double vN; // Op amp B-
+ double vP; // Op amp B+
};
struct discrete_op_amp_1sht_info
{
- UINT32 type;
- double r1;
- double r2;
- double r3;
- double r4;
- double r5;
- double c1;
- double c2;
- double vN; // Op amp B-
- double vP; // Op amp B+
+ UINT32 type;
+ double r1;
+ double r2;
+ double r3;
+ double r4;
+ double r5;
+ double c1;
+ double c2;
+ double vN; // Op amp B-
+ double vP; // Op amp B+
};
struct discrete_op_amp_tvca_info
{
- double r1;
- double r2; // r2a + r2b
- double r3; // r3a + r3b
- double r4;
- double r5;
- double r6;
- double r7;
- double r8;
- double r9;
- double r10;
- double r11;
- double c1;
- double c2;
- double c3;
- double c4;
- double v1;
- double v2;
- double v3;
- double vP;
- int f0;
- int f1;
- int f2;
- int f3;
- int f4;
- int f5;
+ double r1;
+ double r2; // r2a + r2b
+ double r3; // r3a + r3b
+ double r4;
+ double r5;
+ double r6;
+ double r7;
+ double r8;
+ double r9;
+ double r10;
+ double r11;
+ double c1;
+ double c2;
+ double c3;
+ double c4;
+ double v1;
+ double v2;
+ double v3;
+ double vP;
+ int f0;
+ int f1;
+ int f2;
+ int f3;
+ int f4;
+ int f5;
};
struct discrete_op_amp_filt_info
{
- double r1;
- double r2;
- double r3;
- double r4;
- double rF;
- double c1;
- double c2;
- double c3;
- double vRef;
- double vP;
- double vN;
+ double r1;
+ double r2;
+ double r3;
+ double r4;
+ double rF;
+ double c1;
+ double c2;
+ double c3;
+ double vRef;
+ double vP;
+ double vN;
};
-#define DEFAULT_555_CHARGE -1
-#define DEFAULT_555_HIGH -1
-#define DEFAULT_555_VALUES DEFAULT_555_CHARGE, DEFAULT_555_HIGH
+#define DEFAULT_555_CHARGE -1
+#define DEFAULT_555_HIGH -1
+#define DEFAULT_555_VALUES DEFAULT_555_CHARGE, DEFAULT_555_HIGH
struct discrete_555_desc
{
- int options; /* bit mapped options */
- double v_pos; /* B+ voltage of 555 */
- double v_charge; /* voltage to charge circuit (Defaults to v_pos) */
- double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
+ int options; /* bit mapped options */
+ double v_pos; /* B+ voltage of 555 */
+ double v_charge; /* voltage to charge circuit (Defaults to v_pos) */
+ double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
};
-#define DEFAULT_555_CC_SOURCE DEFAULT_555_CHARGE
+#define DEFAULT_555_CC_SOURCE DEFAULT_555_CHARGE
struct discrete_555_cc_desc
{
- int options; /* bit mapped options */
- double v_pos; /* B+ voltage of 555 */
- double v_cc_source; /* Voltage of the Constant Current source */
- double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
- double v_cc_junction; /* The voltage drop of the Constant Current source transitor (0 if Op Amp) */
+ int options; /* bit mapped options */
+ double v_pos; /* B+ voltage of 555 */
+ double v_cc_source; /* Voltage of the Constant Current source */
+ double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
+ double v_cc_junction; /* The voltage drop of the Constant Current source transitor (0 if Op Amp) */
};
struct discrete_555_vco1_desc
{
- int options; /* bit mapped options */
+ int options; /* bit mapped options */
double r1, r2, r3, r4, c;
- double v_pos; /* B+ voltage of 555 */
- double v_charge; /* (ignored) */
- double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
+ double v_pos; /* B+ voltage of 555 */
+ double v_charge; /* (ignored) */
+ double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
};
@@ -4105,13 +4105,13 @@ enum {
/* Some Pre-defined nodes for convenience */
-#define NODE(_x) (NODE_00 + (_x) * DISCRETE_MAX_OUTPUTS)
+#define NODE(_x) (NODE_00 + (_x) * DISCRETE_MAX_OUTPUTS)
#define NODE_SUB(_x, _y) ((_x) + (_y))
#if DISCRETE_MAX_OUTPUTS == 8
-#define NODE_CHILD_NODE_NUM(_x) ((int)(_x) & 7)
-#define NODE_DEFAULT_NODE(_x) ((int)(_x) & ~7)
-#define NODE_INDEX(_x) (((int)(_x) - NODE_START)>>3)
+#define NODE_CHILD_NODE_NUM(_x) ((int)(_x) & 7)
+#define NODE_DEFAULT_NODE(_x) ((int)(_x) & ~7)
+#define NODE_INDEX(_x) (((int)(_x) - NODE_START)>>3)
#else
#error "DISCRETE_MAX_OUTPUTS != 8"
#endif
@@ -4121,10 +4121,10 @@ enum {
#define NODE_NC NODE_00
#define NODE_SPECIAL NODE(DISCRETE_MAX_NODES)
-#define NODE_START NODE_00
-#define NODE_END NODE_SPECIAL
+#define NODE_START NODE_00
+#define NODE_END NODE_SPECIAL
-#define IS_VALUE_A_NODE(val) (((val) > NODE_START) && ((val) <= NODE_END))
+#define IS_VALUE_A_NODE(val) (((val) > NODE_START) && ((val) <= NODE_END))
/*************************************
@@ -4141,31 +4141,31 @@ enum {
enum discrete_node_type
{
- DSS_NULL, /* Nothing, nill, zippo, only to be used as terminating node */
- DSS_NOP, /* just do nothing, placeholder for potential DISCRETE_REPLACE in parent block */
+ DSS_NULL, /* Nothing, nill, zippo, only to be used as terminating node */
+ DSS_NOP, /* just do nothing, placeholder for potential DISCRETE_REPLACE in parent block */
/* standard node */
- DSS_NODE, /* a standard node */
+ DSS_NODE, /* a standard node */
/* Custom */
- DST_CUSTOM, /* whatever you want */
+ DST_CUSTOM, /* whatever you want */
/* Debugging */
- DSO_CSVLOG, /* Dump nodes as csv file */
- DSO_WAVLOG, /* Dump nodes as wav file */
+ DSO_CSVLOG, /* Dump nodes as csv file */
+ DSO_WAVLOG, /* Dump nodes as wav file */
/* Parallel execution */
- DSO_TASK_START, /* start of parallel task */
- DSO_TASK_END, /* end of parallel task */
+ DSO_TASK_START, /* start of parallel task */
+ DSO_TASK_END, /* end of parallel task */
/* Output Node -- this must be the last entry in this enum! */
- DSO_OUTPUT, /* The final output node */
+ DSO_OUTPUT, /* The final output node */
/* Import another blocklist */
- DSO_IMPORT, /* import from another discrete block */
- DSO_REPLACE, /* replace next node */
- DSO_DELETE, /* delete nodes */
+ DSO_IMPORT, /* import from another discrete block */
+ DSO_REPLACE, /* replace next node */
+ DSO_DELETE, /* delete nodes */
/* Marks end of this enum -- must be last entry ! */
DSO_LAST
@@ -4204,15 +4204,15 @@ typedef dynamic_array_t<discrete_task *> task_list_t;
struct discrete_block
{
- int node; /* Output node number */
- discrete_node_base_factory *factory;
- int type; /* see defines below */
- int active_inputs; /* Number of active inputs on this node type */
- int input_node[DISCRETE_MAX_INPUTS];/* input/control nodes */
- double initial[DISCRETE_MAX_INPUTS]; /* Initial values */
- const void * custom; /* Custom function specific initialisation data */
- const char * name; /* Node Name */
- const char * mod_name; /* Module / class name */
+ int node; /* Output node number */
+ discrete_node_base_factory *factory;
+ int type; /* see defines below */
+ int active_inputs; /* Number of active inputs on this node type */
+ int input_node[DISCRETE_MAX_INPUTS];/* input/control nodes */
+ double initial[DISCRETE_MAX_INPUTS]; /* Initial values */
+ const void * custom; /* Custom function specific initialisation data */
+ const char * name; /* Node Name */
+ const char * mod_name; /* Module / class name */
};
typedef dynamic_array_t<const discrete_block *> sound_block_list_t;
@@ -4228,8 +4228,8 @@ public:
virtual ~discrete_step_interface() { }
virtual void step(void) = 0;
- osd_ticks_t run_time;
- discrete_base_node * self;
+ osd_ticks_t run_time;
+ discrete_base_node * self;
};
typedef dynamic_array_t<discrete_step_interface *> node_step_list_t;
@@ -4343,12 +4343,12 @@ protected:
/* --------------------------------- */
/* emulation info */
- int m_sample_rate;
- double m_sample_time;
- double m_neg_sample_time;
+ int m_sample_rate;
+ double m_sample_time;
+ double m_neg_sample_time;
/* list of all nodes */
- node_list_t m_node_list; /* node_description * */
+ node_list_t m_node_list; /* node_description * */
private:
void discrete_build_list(const discrete_block *intf, sound_block_list_t &block_list);
@@ -4357,26 +4357,26 @@ private:
void init_nodes(const sound_block_list_t &block_list);
/* internal node tracking */
- discrete_base_node ** m_indexed_node;
+ discrete_base_node ** m_indexed_node;
/* tasks */
- task_list_t task_list; /* discrete_task_context * */
+ task_list_t task_list; /* discrete_task_context * */
/* debugging statistics */
- FILE * m_disclogfile;
+ FILE * m_disclogfile;
/* parallel tasks */
- osd_work_queue * m_queue;
+ osd_work_queue * m_queue;
/* profiling */
- int m_profiling;
- UINT64 m_total_samples;
- UINT64 m_total_stream_updates;
+ int m_profiling;
+ UINT64 m_total_samples;
+ UINT64 m_total_stream_updates;
};
// ======================> discrete_sound_device
-class discrete_sound_device : public discrete_device,
+class discrete_sound_device : public discrete_device,
public device_sound_interface
{
public:
@@ -4400,12 +4400,12 @@ protected:
private:
/* the output stream */
- sound_stream *m_stream;
+ sound_stream *m_stream;
/* the input streams */
- istream_node_list_t m_input_stream_list;
+ istream_node_list_t m_input_stream_list;
/* output node tracking */
- node_output_list_t m_output_list;
+ node_output_list_t m_output_list;
};
// device type definition
@@ -4454,15 +4454,15 @@ public:
inline int input_node(int inputnum) { return m_block->input_node[inputnum]; }
/* Number of active inputs on this node type */
- inline int active_inputs(void) { return m_active_inputs; }
+ inline int active_inputs(void) { return m_active_inputs; }
/* Bit Flags. 1 in bit location means input_is_node */
- inline int input_is_node(void) { return m_input_is_node; }
+ inline int input_is_node(void) { return m_input_is_node; }
- inline double sample_time(void) { return m_device->sample_time(); }
- inline int sample_rate(void) { return m_device->sample_rate(); }
+ inline double sample_time(void) { return m_device->sample_time(); }
+ inline int sample_rate(void) { return m_device->sample_rate(); }
- const char * module_name(void) { return m_block->mod_name; }
- inline int module_type(void) const { return m_block->type; }
+ const char * module_name(void) { return m_block->mod_name; }
+ inline int module_type(void) const { return m_block->type; }
protected:
@@ -4474,28 +4474,28 @@ protected:
void resolve_input_nodes(void);
- double m_output[DISCRETE_MAX_OUTPUTS]; /* The node's last output value */
- const double * m_input[DISCRETE_MAX_INPUTS]; /* Addresses of Input values */
- discrete_device * m_device; /* Points to the parent */
+ double m_output[DISCRETE_MAX_OUTPUTS]; /* The node's last output value */
+ const double * m_input[DISCRETE_MAX_INPUTS]; /* Addresses of Input values */
+ discrete_device * m_device; /* Points to the parent */
private:
- const discrete_block * m_block; /* Points to the node's setup block. */
- int m_active_inputs; /* Number of active inputs on this node type */
+ const discrete_block * m_block; /* Points to the node's setup block. */
+ int m_active_inputs; /* Number of active inputs on this node type */
- const void * m_custom; /* Custom function specific initialisation data */
- int m_input_is_node;
+ const void * m_custom; /* Custom function specific initialisation data */
+ int m_input_is_node;
- discrete_step_interface * m_step_intf;
- discrete_input_interface * m_input_intf;
- discrete_sound_output_interface * m_output_intf;
+ discrete_step_interface * m_step_intf;
+ discrete_input_interface * m_input_intf;
+ discrete_sound_output_interface * m_output_intf;
};
class discrete_node_base_factory
{
public:
- virtual discrete_base_node *Create(discrete_device * pdev, const discrete_block *block) = 0;
- virtual ~discrete_node_base_factory() {}
+ virtual discrete_base_node *Create(discrete_device * pdev, const discrete_block *block) = 0;
+ virtual ~discrete_node_base_factory() {}
};
template <class C>
@@ -4540,7 +4540,7 @@ discrete_base_node * discrete_node_factory<C>::Create(discrete_device * pdev, co
/* Module Name out, enum value, #in, {variable inputs}, {static inputs}, data pointer, "name" */
/* from disc_inp.c */
-#define DISCRETE_ADJUSTMENT(NODE,MIN,MAX,LOGLIN,TAG) DSC_SND_ENTRY( NODE, dss_adjustment , DSS_NODE , 7, DSE( NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( MIN,MAX,LOGLIN,0 ,0 ,100 ), TAG , "DISCRETE_ADJUSTMENT" ),
+#define DISCRETE_ADJUSTMENT(NODE,MIN,MAX,LOGLIN,TAG) DSC_SND_ENTRY( NODE, dss_adjustment , DSS_NODE , 7, DSE( NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( MIN,MAX,LOGLIN,0 ,0 ,100 ), TAG , "DISCRETE_ADJUSTMENT" ),
#define DISCRETE_ADJUSTMENTX(NODE,MIN,MAX,LOGLIN,TAG,PMIN,PMAX) DSC_SND_ENTRY( NODE, dss_adjustment , DSS_NODE , 7, DSE( NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( MIN,MAX,LOGLIN,0 ,PMIN,PMAX ), TAG , "DISCRETE_ADJUSTMENTX" ),
#define DISCRETE_CONSTANT(NODE,CONST) DSC_SND_ENTRY( NODE, dss_constant , DSS_NODE , 1, DSE( NODE_NC ), DSE( CONST ) ,NULL ,"DISCRETE_CONSTANT" ),
#define DISCRETE_INPUT_DATA(NODE) DSC_SND_ENTRY( NODE, dss_input_data , DSS_NODE , 3, DSE( NODE_NC,NODE_NC,NODE_NC ), DSE( 1,0,0 ), NULL, "DISCRETE_INPUT_DATA" ),
@@ -4554,7 +4554,7 @@ discrete_base_node * discrete_node_factory<C>::Create(discrete_device * pdev, co
#define DISCRETE_INPUT_STREAM(NODE, NUM) DSC_SND_ENTRY( NODE, dss_input_stream, DSS_NODE , 3, DSE( NUM,NODE_NC,NODE_NC ), DSE( NUM,1,0 ), NULL, "DISCRETE_INPUT_STREAM" ),
#define DISCRETE_INPUTX_STREAM(NODE, NUM, GAIN,OFFSET) DSC_SND_ENTRY( NODE, dss_input_stream, DSS_NODE , 3, DSE( NUM,NODE_NC,NODE_NC ), DSE( NUM,GAIN,OFFSET ), NULL, "DISCRETE_INPUTX_STREAM" ),
-#define DISCRETE_INPUT_BUFFER(NODE, NUM) DSC_SND_ENTRY( NODE, dss_input_buffer, DSS_NODE , 3, DSE( NUM,NODE_NC,NODE_NC ), DSE( NUM,1,0 ), NULL, "DISCRETE_INPUT_BUFFER" ),
+#define DISCRETE_INPUT_BUFFER(NODE, NUM) DSC_SND_ENTRY( NODE, dss_input_buffer, DSS_NODE , 3, DSE( NUM,NODE_NC,NODE_NC ), DSE( NUM,1,0 ), NULL, "DISCRETE_INPUT_BUFFER" ),
/* from disc_wav.c */
/* generic modules */
@@ -4668,7 +4668,7 @@ discrete_base_node * discrete_node_factory<C>::Create(discrete_device * pdev, co
#define DISCRETE_RCDISC3(NODE,ENAB,INP0,RVAL0,RVAL1,CVAL,DJV) DSC_SND_ENTRY( NODE, dst_rcdisc3 , DSS_NODE , 6, DSE( ENAB,INP0,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( ENAB,INP0,RVAL0,RVAL1,CVAL,DJV ), NULL, "DISCRETE_RCDISC3" ),
#define DISCRETE_RCDISC4(NODE,ENAB,INP0,RVAL0,RVAL1,RVAL2,CVAL,VP,TYPE) DSC_SND_ENTRY( NODE, dst_rcdisc4 , DSS_NODE , 8, DSE( ENAB,INP0,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( ENAB,INP0,RVAL0,RVAL1,RVAL2,CVAL,VP,TYPE ), NULL, "DISCRETE_RCDISC4" ),
#define DISCRETE_RCDISC5(NODE,ENAB,INP0,RVAL,CVAL) DSC_SND_ENTRY( NODE, dst_rcdisc5 , DSS_NODE , 4, DSE( ENAB,INP0,NODE_NC,NODE_NC ), DSE( ENAB,INP0,RVAL,CVAL ), NULL, "DISCRETE_RCDISC5" ),
-#define DISCRETE_RCDISC_MODULATED(NODE,INP0,INP1,RVAL0,RVAL1,RVAL2,RVAL3,CVAL,VP) DSC_SND_ENTRY( NODE, dst_rcdisc_mod, DSS_NODE , 8, DSE( INP0,INP1,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( INP0,INP1,RVAL0,RVAL1,RVAL2,RVAL3,CVAL,VP ), NULL, "DISCRETE_RCDISC_MODULATED" ),
+#define DISCRETE_RCDISC_MODULATED(NODE,INP0,INP1,RVAL0,RVAL1,RVAL2,RVAL3,CVAL,VP) DSC_SND_ENTRY( NODE, dst_rcdisc_mod, DSS_NODE , 8, DSE( INP0,INP1,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( INP0,INP1,RVAL0,RVAL1,RVAL2,RVAL3,CVAL,VP ), NULL, "DISCRETE_RCDISC_MODULATED" ),
#define DISCRETE_RCFILTER(NODE,INP0,RVAL,CVAL) DSC_SND_ENTRY( NODE, dst_rcfilter , DSS_NODE , 3, DSE( INP0,RVAL,CVAL ), DSE( INP0,RVAL,CVAL ), NULL, "DISCRETE_RCFILTER" ),
#define DISCRETE_RCFILTER_VREF(NODE,INP0,RVAL,CVAL,VREF) DSC_SND_ENTRY( NODE, dst_rcfilter , DSS_NODE , 4, DSE( INP0,RVAL,CVAL,VREF ), DSE( INP0,RVAL,CVAL,VREF ), NULL, "DISCRETE_RCFILTER_VREF" ),
#define DISCRETE_RCFILTER_SW(NODE,ENAB,INP0,SW,RVAL,CVAL1,CVAL2,CVAL3,CVAL4) DSC_SND_ENTRY( NODE, dst_rcfilter_sw, DSS_NODE , 8, DSE( ENAB,INP0,SW,NODE_NC,NODE_NC,NODE_NC,NODE_NC,NODE_NC ), DSE( ENAB,INP0,SW,RVAL,CVAL1,CVAL2,CVAL3,CVAL4 ), NULL, "DISCRETE_RCFILTER_SW" ),
@@ -4715,7 +4715,7 @@ discrete_base_node * discrete_node_factory<C>::Create(discrete_device * pdev, co
/* import */
#define DISCRETE_IMPORT(INFO) DSC_SND_ENTRY( NODE_SPECIAL, special , DSO_IMPORT , 0, DSE( 0 ), DSE( 0 ), &(INFO##_discrete_interface), "DISCRETE_IMPORT" ),
#define DISCRETE_DELETE(NODE_FROM, NODE_TO) DSC_SND_ENTRY( NODE_SPECIAL, special , DSO_DELETE , 2, DSE( NODE_FROM, NODE_TO ), DSE( NODE_FROM, NODE_TO ), NULL, "DISCRETE_DELETE" ),
-#define DISCRETE_REPLACE DSC_SND_ENTRY( NODE_SPECIAL, special , DSO_REPLACE , 0, DSE( 0 ), DSE( 0 ), NULL, "DISCRETE_REPLACE" ),
+#define DISCRETE_REPLACE DSC_SND_ENTRY( NODE_SPECIAL, special , DSO_REPLACE , 0, DSE( 0 ), DSE( 0 ), NULL, "DISCRETE_REPLACE" ),
/* parallel tasks */
@@ -4724,7 +4724,7 @@ discrete_base_node * discrete_node_factory<C>::Create(discrete_device * pdev, co
//#define DISCRETE_TASK_SYNC() DSC_SND_ENTRY( NODE_SPECIAL, DSO_TASK_SYNC, 0, DSE( 0 ), DSE( 0 ), NULL, "DISCRETE_TASK_SYNC" ),
/* output */
-#define DISCRETE_OUTPUT(OPNODE,GAIN) DSC_SND_ENTRY( NODE_SPECIAL, dso_output , DSO_OUTPUT ,2, DSE( OPNODE,NODE_NC ), DSE( 0,GAIN ), NULL, "DISCRETE_OUTPUT" ),
+#define DISCRETE_OUTPUT(OPNODE,GAIN) DSC_SND_ENTRY( NODE_SPECIAL, dso_output , DSO_OUTPUT ,2, DSE( OPNODE,NODE_NC ), DSE( 0,GAIN ), NULL, "DISCRETE_OUTPUT" ),
diff --git a/src/emu/sound/dmadac.c b/src/emu/sound/dmadac.c
index cd7ea095d1b..340c926cf72 100644
--- a/src/emu/sound/dmadac.c
+++ b/src/emu/sound/dmadac.c
@@ -16,7 +16,7 @@
*
*************************************/
-#define VERBOSE 0
+#define VERBOSE 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
@@ -27,9 +27,9 @@
*
*************************************/
-#define DEFAULT_SAMPLE_RATE (44100)
+#define DEFAULT_SAMPLE_RATE (44100)
-#define BUFFER_SIZE 32768
+#define BUFFER_SIZE 32768
@@ -42,15 +42,15 @@
struct dmadac_state
{
/* sound stream and buffers */
- sound_stream * channel;
- INT16 * buffer;
- UINT32 bufin;
- UINT32 bufout;
+ sound_stream * channel;
+ INT16 * buffer;
+ UINT32 bufin;
+ UINT32 bufout;
/* per-channel parameters */
- INT16 volume;
- UINT8 enabled;
- double frequency;
+ INT16 volume;
+ UINT8 enabled;
+ double frequency;
};
@@ -237,7 +237,7 @@ const device_type DMADAC = &device_creator<dmadac_sound_device>;
dmadac_sound_device::dmadac_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, DMADAC, "DMA-driven DAC", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(dmadac_state);
}
@@ -270,5 +270,3 @@ void dmadac_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/dmadac.h b/src/emu/sound/dmadac.h
index 3c6d518501f..17a611fc9e9 100644
--- a/src/emu/sound/dmadac.h
+++ b/src/emu/sound/dmadac.h
@@ -13,7 +13,7 @@
#include "devlegcy.h"
class dmadac_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
dmadac_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/es5503.c b/src/emu/sound/es5503.c
index 390806bcd22..ef649df3491 100644
--- a/src/emu/sound/es5503.c
+++ b/src/emu/sound/es5503.c
@@ -63,11 +63,11 @@ ADDRESS_MAP_END
es5503_device::es5503_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ES5503, "Ensoniq ES5503", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- m_space_config("es5503_samples", ENDIANNESS_LITTLE, 8, 17, 0, NULL, *ADDRESS_MAP_NAME(es5503)),
- m_irq_func(NULL),
- m_adc_func(NULL)
+ device_sound_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ m_space_config("es5503_samples", ENDIANNESS_LITTLE, 8, 17, 0, NULL, *ADDRESS_MAP_NAME(es5503)),
+ m_irq_func(NULL),
+ m_adc_func(NULL)
{
}
@@ -130,26 +130,26 @@ void es5503_device::halt_osc(int onum, int type, UINT32 *accumulator, int resshi
}
else // preserve the relative phase of the oscillator when looping
{
- UINT16 wtsize = pOsc->wtsize - 1;
- UINT32 altram = (*accumulator) >> resshift;
-
- if (altram > wtsize)
- {
- altram -= wtsize;
- }
- else
- {
- altram = 0;
- }
-
- *accumulator = altram << resshift;
+ UINT16 wtsize = pOsc->wtsize - 1;
+ UINT32 altram = (*accumulator) >> resshift;
+
+ if (altram > wtsize)
+ {
+ altram -= wtsize;
+ }
+ else
+ {
+ altram = 0;
+ }
+
+ *accumulator = altram << resshift;
}
// if swap mode, start the partner
if (mode == MODE_SWAP)
{
- pPartner->control &= ~1; // clear the halt bit
- pPartner->accumulator = 0; // and make sure it starts from the top (does this also need phase preservation?)
+ pPartner->control &= ~1; // clear the halt bit
+ pPartner->accumulator = 0; // and make sure it starts from the top (does this also need phase preservation?)
}
// IRQ enabled for this voice?
@@ -264,7 +264,7 @@ void es5503_device::device_start()
save_item(NAME(oscillators[osc].irqpend), osc);
}
- output_rate = (clock()/8)/34; // (input clock / 8) / # of oscs. enabled + 2
+ output_rate = (clock()/8)/34; // (input clock / 8) / # of oscs. enabled + 2
m_stream = machine().sound().stream_alloc(*this, 0, output_channels, output_rate, this);
m_timer = timer_alloc(0, NULL);
@@ -293,7 +293,7 @@ void es5503_device::device_reset()
m_channel_strobe = 0;
- output_rate = (clock()/8)/34; // (input clock / 8) / # of oscs. enabled + 2
+ output_rate = (clock()/8)/34; // (input clock / 8) / # of oscs. enabled + 2
}
READ8_MEMBER( es5503_device::read )
@@ -309,25 +309,25 @@ READ8_MEMBER( es5503_device::read )
switch(offset & 0xe0)
{
- case 0: // freq lo
+ case 0: // freq lo
return (oscillators[osc].freq & 0xff);
- case 0x20: // freq hi
+ case 0x20: // freq hi
return (oscillators[osc].freq >> 8);
- case 0x40: // volume
+ case 0x40: // volume
return oscillators[osc].vol;
- case 0x60: // data
+ case 0x60: // data
return oscillators[osc].data;
- case 0x80: // wavetable pointer
+ case 0x80: // wavetable pointer
return (oscillators[osc].wavetblpointer>>8) & 0xff;
- case 0xa0: // oscillator control
+ case 0xa0: // oscillator control
return oscillators[osc].control;
- case 0xc0: // bank select / wavetable size / resolution
+ case 0xc0: // bank select / wavetable size / resolution
retval = 0;
if (oscillators[osc].wavetblpointer & 0x10000)
{
@@ -339,17 +339,17 @@ READ8_MEMBER( es5503_device::read )
return retval;
}
}
- else // global registers
+ else // global registers
{
switch (offset)
{
- case 0xe0: // interrupt status
+ case 0xe0: // interrupt status
retval = rege0;
- if (m_irq_func)
- {
- m_irq_func(this, 0);
- }
+ if (m_irq_func)
+ {
+ m_irq_func(this, 0);
+ }
// scan all oscillators
for (i = 0; i < oscsenabled+1; i++)
@@ -382,10 +382,10 @@ READ8_MEMBER( es5503_device::read )
return retval;
- case 0xe1: // oscillator enable
+ case 0xe1: // oscillator enable
return oscsenabled<<1;
- case 0xe2: // A/D converter
+ case 0xe2: // A/D converter
if (m_adc_func)
{
return m_adc_func(this);
@@ -407,28 +407,28 @@ WRITE8_MEMBER( es5503_device::write )
switch(offset & 0xe0)
{
- case 0: // freq lo
+ case 0: // freq lo
oscillators[osc].freq &= 0xff00;
oscillators[osc].freq |= data;
break;
- case 0x20: // freq hi
+ case 0x20: // freq hi
oscillators[osc].freq &= 0x00ff;
oscillators[osc].freq |= (data<<8);
break;
- case 0x40: // volume
+ case 0x40: // volume
oscillators[osc].vol = data;
break;
- case 0x60: // data - ignore writes
+ case 0x60: // data - ignore writes
break;
- case 0x80: // wavetable pointer
+ case 0x80: // wavetable pointer
oscillators[osc].wavetblpointer = (data<<8);
break;
- case 0xa0: // oscillator control
+ case 0xa0: // oscillator control
// if a fresh key-on, reset the ccumulator
if ((oscillators[osc].control & 1) && (!(data&1)))
{
@@ -438,8 +438,8 @@ WRITE8_MEMBER( es5503_device::write )
oscillators[osc].control = data;
break;
- case 0xc0: // bank select / wavetable size / resolution
- if (data & 0x40) // bank select - not used on the Apple IIgs
+ case 0xc0: // bank select / wavetable size / resolution
+ if (data & 0x40) // bank select - not used on the Apple IIgs
{
oscillators[osc].wavetblpointer |= 0x10000;
}
@@ -454,14 +454,14 @@ WRITE8_MEMBER( es5503_device::write )
break;
}
}
- else // global registers
+ else // global registers
{
switch (offset)
{
- case 0xe0: // interrupt status
+ case 0xe0: // interrupt status
break;
- case 0xe1: // oscillator enable
+ case 0xe1: // oscillator enable
oscsenabled = (data>>1) & 0x1f;
output_rate = (clock()/8)/(2+oscsenabled);
@@ -469,9 +469,8 @@ WRITE8_MEMBER( es5503_device::write )
m_timer->adjust(attotime::from_hz(output_rate), 0, attotime::from_hz(output_rate));
break;
- case 0xe2: // A/D converter
+ case 0xe2: // A/D converter
break;
}
}
}
-
diff --git a/src/emu/sound/es5503.h b/src/emu/sound/es5503.h
index 65f644dfedc..eb20a433505 100644
--- a/src/emu/sound/es5503.h
+++ b/src/emu/sound/es5503.h
@@ -5,7 +5,7 @@
// channels must be a power of two
-#define MCFG_ES5503_ADD(_tag, _clock, _channels, _irqf, _adcf) \
+#define MCFG_ES5503_ADD(_tag, _clock, _channels, _irqf, _adcf) \
MCFG_DEVICE_ADD(_tag, ES5503, _clock) \
MCFG_ES5503_OUTPUT_CHANNELS(_channels) \
MCFG_ES5503_IRQ_FUNC(_irqf) \
@@ -29,21 +29,21 @@
// ======================> es5503_device
class es5503_device : public device_t,
- public device_sound_interface,
- public device_memory_interface
+ public device_sound_interface,
+ public device_memory_interface
{
public:
- // construction/destruction
+ // construction/destruction
es5503_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
static void static_set_channels(device_t &device, int channels);
- static void static_set_irqf(device_t &device, void (*irqf)(device_t *device, int state));
- static void static_set_adcf(device_t &device, UINT8 (*adcf)(device_t *device));
+ static void static_set_irqf(device_t &device, void (*irqf)(device_t *device, int state));
+ static void static_set_adcf(device_t &device, UINT8 (*adcf)(device_t *device));
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE8_MEMBER(write);
- UINT8 get_channel_strobe() { return m_channel_strobe; }
+ UINT8 get_channel_strobe() { return m_channel_strobe; }
sound_stream *m_stream;
@@ -51,9 +51,9 @@ protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
- virtual void device_timer(emu_timer &timer, device_timer_id tid, int param, void *ptr);
+ virtual void device_timer(emu_timer &timer, device_timer_id tid, int param, void *ptr);
- // device_sound_interface overrides
+ // device_sound_interface overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
// device_memory_interface overrides
@@ -67,44 +67,44 @@ protected:
emu_timer *m_sync_timer;
private:
- enum
- {
- MODE_FREE = 0,
- MODE_ONESHOT = 1,
- MODE_SYNCAM = 2,
- MODE_SWAP = 3
- };
-
- struct ES5503Osc
- {
- UINT16 freq;
- UINT16 wtsize;
- UINT8 control;
- UINT8 vol;
- UINT8 data;
- UINT32 wavetblpointer;
- UINT8 wavetblsize;
- UINT8 resolution;
-
- UINT32 accumulator;
- UINT8 irqpend;
- };
+ enum
+ {
+ MODE_FREE = 0,
+ MODE_ONESHOT = 1,
+ MODE_SYNCAM = 2,
+ MODE_SWAP = 3
+ };
+
+ struct ES5503Osc
+ {
+ UINT16 freq;
+ UINT16 wtsize;
+ UINT8 control;
+ UINT8 vol;
+ UINT8 data;
+ UINT32 wavetblpointer;
+ UINT8 wavetblsize;
+ UINT8 resolution;
+
+ UINT32 accumulator;
+ UINT8 irqpend;
+ };
ES5503Osc oscillators[32];
- INT8 oscsenabled; // # of oscillators enabled
- int rege0; // contents of register 0xe0
+ INT8 oscsenabled; // # of oscillators enabled
+ int rege0; // contents of register 0xe0
- UINT8 m_channel_strobe;
+ UINT8 m_channel_strobe;
int output_channels;
- UINT32 output_rate;
+ UINT32 output_rate;
- emu_timer *m_timer;
+ emu_timer *m_timer;
- direct_read_data *m_direct;
+ direct_read_data *m_direct;
- void halt_osc(int onum, int type, UINT32 *accumulator, int resshift);
+ void halt_osc(int onum, int type, UINT32 *accumulator, int resshift);
};
diff --git a/src/emu/sound/es5506.c b/src/emu/sound/es5506.c
index 40875d9530e..bbba4beec09 100644
--- a/src/emu/sound/es5506.c
+++ b/src/emu/sound/es5506.c
@@ -91,40 +91,40 @@ Ensoniq OTIS - ES5505 Ensoniq OTTO -
***********************************************************************************************/
-#define LOG_COMMANDS 0
-#define RAINE_CHECK 0
-#define MAKE_WAVS 0
+#define LOG_COMMANDS 0
+#define RAINE_CHECK 0
+#define MAKE_WAVS 0
#if MAKE_WAVS
#include "wavwrite.h"
#endif
-#define MAX_SAMPLE_CHUNK 10000
-#define ULAW_MAXBITS 8
+#define MAX_SAMPLE_CHUNK 10000
+#define ULAW_MAXBITS 8
-#define CONTROL_BS1 0x8000
-#define CONTROL_BS0 0x4000
-#define CONTROL_CMPD 0x2000
-#define CONTROL_CA2 0x1000
-#define CONTROL_CA1 0x0800
-#define CONTROL_CA0 0x0400
-#define CONTROL_LP4 0x0200
-#define CONTROL_LP3 0x0100
-#define CONTROL_IRQ 0x0080
-#define CONTROL_DIR 0x0040
-#define CONTROL_IRQE 0x0020
-#define CONTROL_BLE 0x0010
-#define CONTROL_LPE 0x0008
-#define CONTROL_LEI 0x0004
-#define CONTROL_STOP1 0x0002
-#define CONTROL_STOP0 0x0001
+#define CONTROL_BS1 0x8000
+#define CONTROL_BS0 0x4000
+#define CONTROL_CMPD 0x2000
+#define CONTROL_CA2 0x1000
+#define CONTROL_CA1 0x0800
+#define CONTROL_CA0 0x0400
+#define CONTROL_LP4 0x0200
+#define CONTROL_LP3 0x0100
+#define CONTROL_IRQ 0x0080
+#define CONTROL_DIR 0x0040
+#define CONTROL_IRQE 0x0020
+#define CONTROL_BLE 0x0010
+#define CONTROL_LPE 0x0008
+#define CONTROL_LEI 0x0004
+#define CONTROL_STOP1 0x0002
+#define CONTROL_STOP0 0x0001
-#define CONTROL_BSMASK (CONTROL_BS1 | CONTROL_BS0)
-#define CONTROL_CAMASK (CONTROL_CA2 | CONTROL_CA1 | CONTROL_CA0)
-#define CONTROL_LPMASK (CONTROL_LP4 | CONTROL_LP3)
-#define CONTROL_LOOPMASK (CONTROL_BLE | CONTROL_LPE)
-#define CONTROL_STOPMASK (CONTROL_STOP1 | CONTROL_STOP0)
+#define CONTROL_BSMASK (CONTROL_BS1 | CONTROL_BS0)
+#define CONTROL_CAMASK (CONTROL_CA2 | CONTROL_CA1 | CONTROL_CA0)
+#define CONTROL_LPMASK (CONTROL_LP4 | CONTROL_LP3)
+#define CONTROL_LOOPMASK (CONTROL_BLE | CONTROL_LPE)
+#define CONTROL_STOPMASK (CONTROL_STOP1 | CONTROL_STOP0)
@@ -138,63 +138,63 @@ Ensoniq OTIS - ES5505 Ensoniq OTTO -
struct es5506_voice
{
/* external state */
- UINT32 control; /* control register */
- UINT32 freqcount; /* frequency count register */
- UINT32 start; /* start register */
- UINT32 lvol; /* left volume register */
- UINT32 end; /* end register */
- UINT32 lvramp; /* left volume ramp register */
- UINT32 accum; /* accumulator register */
- UINT32 rvol; /* right volume register */
- UINT32 rvramp; /* right volume ramp register */
- UINT32 ecount; /* envelope count register */
- UINT32 k2; /* k2 register */
- UINT32 k2ramp; /* k2 ramp register */
- UINT32 k1; /* k1 register */
- UINT32 k1ramp; /* k1 ramp register */
- INT32 o4n1; /* filter storage O4(n-1) */
- INT32 o3n1; /* filter storage O3(n-1) */
- INT32 o3n2; /* filter storage O3(n-2) */
- INT32 o2n1; /* filter storage O2(n-1) */
- INT32 o2n2; /* filter storage O2(n-2) */
- INT32 o1n1; /* filter storage O1(n-1) */
- UINT32 exbank; /* external address bank */
+ UINT32 control; /* control register */
+ UINT32 freqcount; /* frequency count register */
+ UINT32 start; /* start register */
+ UINT32 lvol; /* left volume register */
+ UINT32 end; /* end register */
+ UINT32 lvramp; /* left volume ramp register */
+ UINT32 accum; /* accumulator register */
+ UINT32 rvol; /* right volume register */
+ UINT32 rvramp; /* right volume ramp register */
+ UINT32 ecount; /* envelope count register */
+ UINT32 k2; /* k2 register */
+ UINT32 k2ramp; /* k2 ramp register */
+ UINT32 k1; /* k1 register */
+ UINT32 k1ramp; /* k1 ramp register */
+ INT32 o4n1; /* filter storage O4(n-1) */
+ INT32 o3n1; /* filter storage O3(n-1) */
+ INT32 o3n2; /* filter storage O3(n-2) */
+ INT32 o2n1; /* filter storage O2(n-1) */
+ INT32 o2n2; /* filter storage O2(n-2) */
+ INT32 o1n1; /* filter storage O1(n-1) */
+ UINT32 exbank; /* external address bank */
/* internal state */
- UINT8 index; /* index of this voice */
- UINT8 filtcount; /* filter count */
- UINT32 accum_mask;
+ UINT8 index; /* index of this voice */
+ UINT8 filtcount; /* filter count */
+ UINT32 accum_mask;
};
struct es5506_state
{
- sound_stream *stream; /* which stream are we using */
- int sample_rate; /* current sample rate */
- UINT16 * region_base[4]; /* pointer to the base of the region */
- UINT32 write_latch; /* currently accumulated data for write */
- UINT32 read_latch; /* currently accumulated data for read */
- UINT32 master_clock; /* master clock frequency */
- void (*irq_callback)(device_t *, int); /* IRQ callback */
- UINT16 (*port_read)(device_t *); /* input port read */
-
- UINT8 current_page; /* current register page */
- UINT8 active_voices; /* number of active voices */
- UINT8 mode; /* MODE register */
- UINT8 wst; /* W_ST register */
- UINT8 wend; /* W_END register */
- UINT8 lrend; /* LR_END register */
- UINT8 irqv; /* IRQV register */
-
- es5506_voice voice[32]; /* the 32 voices */
-
- INT32 * scratch;
-
- INT16 * ulaw_lookup;
- UINT16 * volume_lookup;
+ sound_stream *stream; /* which stream are we using */
+ int sample_rate; /* current sample rate */
+ UINT16 * region_base[4]; /* pointer to the base of the region */
+ UINT32 write_latch; /* currently accumulated data for write */
+ UINT32 read_latch; /* currently accumulated data for read */
+ UINT32 master_clock; /* master clock frequency */
+ void (*irq_callback)(device_t *, int); /* IRQ callback */
+ UINT16 (*port_read)(device_t *); /* input port read */
+
+ UINT8 current_page; /* current register page */
+ UINT8 active_voices; /* number of active voices */
+ UINT8 mode; /* MODE register */
+ UINT8 wst; /* W_ST register */
+ UINT8 wend; /* W_END register */
+ UINT8 lrend; /* LR_END register */
+ UINT8 irqv; /* IRQV register */
+
+ es5506_voice voice[32]; /* the 32 voices */
+
+ INT32 * scratch;
+
+ INT16 * ulaw_lookup;
+ UINT16 * volume_lookup;
device_t *device;
#if MAKE_WAVS
- void * wavraw; /* raw waveform */
+ void * wavraw; /* raw waveform */
#endif
};
@@ -235,12 +235,12 @@ static void update_internal_irq_state(es5506_state *chip)
{
/* Host (cpu) has just read the voice interrupt vector (voice IRQ ack).
- Reset the voice vector to show the IRQB line is low (top bit set).
- If we have any stacked interrupts (other voices waiting to be
- processed - with their IRQ bit set) then they will be moved into
- the vector next time the voice is processed. In emulation
- terms they get updated next time generate_samples() is called.
- */
+ Reset the voice vector to show the IRQB line is low (top bit set).
+ If we have any stacked interrupts (other voices waiting to be
+ processed - with their IRQ bit set) then they will be moved into
+ the vector next time the voice is processed. In emulation
+ terms they get updated next time generate_samples() is called.
+ */
chip->irqv=0x80;
@@ -298,9 +298,9 @@ static void compute_tables(es5506_state *chip)
***********************************************************************************************/
-#define interpolate(sample1, sample2, accum) \
- (sample1 * (INT32)(0x800 - (accum & 0x7ff)) + \
- sample2 * (INT32)(accum & 0x7ff)) >> 11;
+#define interpolate(sample1, sample2, accum) \
+ (sample1 * (INT32)(0x800 - (accum & 0x7ff)) + \
+ sample2 * (INT32)(accum & 0x7ff)) >> 11;
@@ -310,65 +310,65 @@ static void compute_tables(es5506_state *chip)
***********************************************************************************************/
-#define apply_filters(voice, sample) \
-do \
-{ \
- /* pole 1 is always low-pass using K1 */ \
- sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o1n1) / 16384) + voice->o1n1; \
- voice->o1n1 = sample; \
+#define apply_filters(voice, sample) \
+do \
+{ \
+ /* pole 1 is always low-pass using K1 */ \
+ sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o1n1) / 16384) + voice->o1n1; \
+ voice->o1n1 = sample; \
\
- /* pole 2 is always low-pass using K1 */ \
- sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o2n1) / 16384) + voice->o2n1; \
- voice->o2n2 = voice->o2n1; \
- voice->o2n1 = sample; \
+ /* pole 2 is always low-pass using K1 */ \
+ sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o2n1) / 16384) + voice->o2n1; \
+ voice->o2n2 = voice->o2n1; \
+ voice->o2n1 = sample; \
\
- /* remaining poles depend on the current filter setting */ \
- switch (voice->control & CONTROL_LPMASK) \
- { \
- case 0: \
- /* pole 3 is high-pass using K2 */ \
+ /* remaining poles depend on the current filter setting */ \
+ switch (voice->control & CONTROL_LPMASK) \
+ { \
+ case 0: \
+ /* pole 3 is high-pass using K2 */ \
sample = sample - voice->o2n2 + ((INT32)(voice->k2 >> 2) * voice->o3n1) / 32768 + voice->o3n1 / 2; \
- voice->o3n2 = voice->o3n1; \
- voice->o3n1 = sample; \
+ voice->o3n2 = voice->o3n1; \
+ voice->o3n1 = sample; \
\
- /* pole 4 is high-pass using K2 */ \
+ /* pole 4 is high-pass using K2 */ \
sample = sample - voice->o3n2 + ((INT32)(voice->k2 >> 2) * voice->o4n1) / 32768 + voice->o4n1 / 2; \
- voice->o4n1 = sample; \
- break; \
+ voice->o4n1 = sample; \
+ break; \
\
- case CONTROL_LP3: \
- /* pole 3 is low-pass using K1 */ \
- sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o3n1) / 16384) + voice->o3n1; \
- voice->o3n2 = voice->o3n1; \
- voice->o3n1 = sample; \
+ case CONTROL_LP3: \
+ /* pole 3 is low-pass using K1 */ \
+ sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o3n1) / 16384) + voice->o3n1; \
+ voice->o3n2 = voice->o3n1; \
+ voice->o3n1 = sample; \
\
- /* pole 4 is high-pass using K2 */ \
+ /* pole 4 is high-pass using K2 */ \
sample = sample - voice->o3n2 + ((INT32)(voice->k2 >> 2) * voice->o4n1) / 32768 + voice->o4n1 / 2; \
- voice->o4n1 = sample; \
- break; \
+ voice->o4n1 = sample; \
+ break; \
\
- case CONTROL_LP4: \
- /* pole 3 is low-pass using K2 */ \
- sample = ((INT32)(voice->k2 >> 2) * (sample - voice->o3n1) / 16384) + voice->o3n1; \
- voice->o3n2 = voice->o3n1; \
- voice->o3n1 = sample; \
+ case CONTROL_LP4: \
+ /* pole 3 is low-pass using K2 */ \
+ sample = ((INT32)(voice->k2 >> 2) * (sample - voice->o3n1) / 16384) + voice->o3n1; \
+ voice->o3n2 = voice->o3n1; \
+ voice->o3n1 = sample; \
\
- /* pole 4 is low-pass using K2 */ \
- sample = ((INT32)(voice->k2 >> 2) * (sample - voice->o4n1) / 16384) + voice->o4n1; \
- voice->o4n1 = sample; \
- break; \
+ /* pole 4 is low-pass using K2 */ \
+ sample = ((INT32)(voice->k2 >> 2) * (sample - voice->o4n1) / 16384) + voice->o4n1; \
+ voice->o4n1 = sample; \
+ break; \
\
- case CONTROL_LP4 | CONTROL_LP3: \
- /* pole 3 is low-pass using K1 */ \
- sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o3n1) / 16384) + voice->o3n1; \
- voice->o3n2 = voice->o3n1; \
- voice->o3n1 = sample; \
+ case CONTROL_LP4 | CONTROL_LP3: \
+ /* pole 3 is low-pass using K1 */ \
+ sample = ((INT32)(voice->k1 >> 2) * (sample - voice->o3n1) / 16384) + voice->o3n1; \
+ voice->o3n2 = voice->o3n1; \
+ voice->o3n1 = sample; \
\
- /* pole 4 is low-pass using K2 */ \
- sample = ((INT32)(voice->k2 >> 2) * (sample - voice->o4n1) / 16384) + voice->o4n1; \
- voice->o4n1 = sample; \
- break; \
- } \
+ /* pole 4 is low-pass using K2 */ \
+ sample = ((INT32)(voice->k2 >> 2) * (sample - voice->o4n1) / 16384) + voice->o4n1; \
+ voice->o4n1 = sample; \
+ break; \
+ } \
} while (0)
@@ -379,48 +379,48 @@ do \
***********************************************************************************************/
-#define update_envelopes(voice, samples) \
-do \
-{ \
- int count = (samples > 1 && samples > voice->ecount) ? voice->ecount : samples; \
+#define update_envelopes(voice, samples) \
+do \
+{ \
+ int count = (samples > 1 && samples > voice->ecount) ? voice->ecount : samples; \
\
- /* decrement the envelope counter */ \
- voice->ecount -= count; \
+ /* decrement the envelope counter */ \
+ voice->ecount -= count; \
\
- /* ramp left volume */ \
- if (voice->lvramp) \
- { \
- voice->lvol += (INT8)voice->lvramp * count; \
- if ((INT32)voice->lvol < 0) voice->lvol = 0; \
- else if (voice->lvol > 0xffff) voice->lvol = 0xffff; \
- } \
+ /* ramp left volume */ \
+ if (voice->lvramp) \
+ { \
+ voice->lvol += (INT8)voice->lvramp * count; \
+ if ((INT32)voice->lvol < 0) voice->lvol = 0; \
+ else if (voice->lvol > 0xffff) voice->lvol = 0xffff; \
+ } \
\
- /* ramp right volume */ \
- if (voice->rvramp) \
- { \
- voice->rvol += (INT8)voice->rvramp * count; \
- if ((INT32)voice->rvol < 0) voice->rvol = 0; \
- else if (voice->rvol > 0xffff) voice->rvol = 0xffff; \
- } \
+ /* ramp right volume */ \
+ if (voice->rvramp) \
+ { \
+ voice->rvol += (INT8)voice->rvramp * count; \
+ if ((INT32)voice->rvol < 0) voice->rvol = 0; \
+ else if (voice->rvol > 0xffff) voice->rvol = 0xffff; \
+ } \
\
- /* ramp k1 filter constant */ \
- if (voice->k1ramp && ((INT32)voice->k1ramp >= 0 || !(voice->filtcount & 7))) \
- { \
- voice->k1 += (INT8)voice->k1ramp * count; \
- if ((INT32)voice->k1 < 0) voice->k1 = 0; \
- else if (voice->k1 > 0xffff) voice->k1 = 0xffff; \
- } \
+ /* ramp k1 filter constant */ \
+ if (voice->k1ramp && ((INT32)voice->k1ramp >= 0 || !(voice->filtcount & 7))) \
+ { \
+ voice->k1 += (INT8)voice->k1ramp * count; \
+ if ((INT32)voice->k1 < 0) voice->k1 = 0; \
+ else if (voice->k1 > 0xffff) voice->k1 = 0xffff; \
+ } \
\
- /* ramp k2 filter constant */ \
- if (voice->k2ramp && ((INT32)voice->k2ramp >= 0 || !(voice->filtcount & 7))) \
- { \
- voice->k2 += (INT8)voice->k2ramp * count; \
- if ((INT32)voice->k2 < 0) voice->k2 = 0; \
- else if (voice->k2 > 0xffff) voice->k2 = 0xffff; \
- } \
+ /* ramp k2 filter constant */ \
+ if (voice->k2ramp && ((INT32)voice->k2ramp >= 0 || !(voice->filtcount & 7))) \
+ { \
+ voice->k2 += (INT8)voice->k2ramp * count; \
+ if ((INT32)voice->k2 < 0) voice->k2 = 0; \
+ else if (voice->k2 > 0xffff) voice->k2 = 0xffff; \
+ } \
\
- /* update the filter constant counter */ \
- voice->filtcount += count; \
+ /* update the filter constant counter */ \
+ voice->filtcount += count; \
\
} while (0)
@@ -433,81 +433,81 @@ do \
***********************************************************************************************/
-#define check_for_end_forward(voice, accum) \
-do \
-{ \
- /* are we past the end? */ \
- if (accum > voice->end && !(voice->control & CONTROL_LEI)) \
- { \
- /* generate interrupt if required */ \
- if (voice->control&CONTROL_IRQE) \
- voice->control |= CONTROL_IRQ; \
+#define check_for_end_forward(voice, accum) \
+do \
+{ \
+ /* are we past the end? */ \
+ if (accum > voice->end && !(voice->control & CONTROL_LEI)) \
+ { \
+ /* generate interrupt if required */ \
+ if (voice->control&CONTROL_IRQE) \
+ voice->control |= CONTROL_IRQ; \
\
- /* handle the different types of looping */ \
- switch (voice->control & CONTROL_LOOPMASK) \
- { \
- /* non-looping */ \
- case 0: \
- voice->control |= CONTROL_STOP0; \
- goto alldone; \
+ /* handle the different types of looping */ \
+ switch (voice->control & CONTROL_LOOPMASK) \
+ { \
+ /* non-looping */ \
+ case 0: \
+ voice->control |= CONTROL_STOP0; \
+ goto alldone; \
\
- /* uni-directional looping */ \
- case CONTROL_LPE: \
- accum = (voice->start + (accum - voice->end)) & voice->accum_mask; \
- break; \
+ /* uni-directional looping */ \
+ case CONTROL_LPE: \
+ accum = (voice->start + (accum - voice->end)) & voice->accum_mask; \
+ break; \
\
- /* trans-wave looping */ \
- case CONTROL_BLE: \
- accum = (voice->start + (accum - voice->end)) & voice->accum_mask; \
+ /* trans-wave looping */ \
+ case CONTROL_BLE: \
+ accum = (voice->start + (accum - voice->end)) & voice->accum_mask; \
voice->control = (voice->control & ~CONTROL_LOOPMASK) | CONTROL_LEI;\
- break; \
+ break; \
\
- /* bi-directional looping */ \
- case CONTROL_LPE | CONTROL_BLE: \
- accum = (voice->end - (accum - voice->end)) & voice->accum_mask; \
- voice->control ^= CONTROL_DIR; \
- goto reverse; \
- } \
- } \
+ /* bi-directional looping */ \
+ case CONTROL_LPE | CONTROL_BLE: \
+ accum = (voice->end - (accum - voice->end)) & voice->accum_mask; \
+ voice->control ^= CONTROL_DIR; \
+ goto reverse; \
+ } \
+ } \
} while (0)
-#define check_for_end_reverse(voice, accum) \
-do \
-{ \
- /* are we past the end? */ \
- if (accum < voice->start && !(voice->control & CONTROL_LEI)) \
- { \
- /* generate interrupt if required */ \
- if (voice->control&CONTROL_IRQE) \
- voice->control |= CONTROL_IRQ; \
+#define check_for_end_reverse(voice, accum) \
+do \
+{ \
+ /* are we past the end? */ \
+ if (accum < voice->start && !(voice->control & CONTROL_LEI)) \
+ { \
+ /* generate interrupt if required */ \
+ if (voice->control&CONTROL_IRQE) \
+ voice->control |= CONTROL_IRQ; \
\
- /* handle the different types of looping */ \
- switch (voice->control & CONTROL_LOOPMASK) \
- { \
- /* non-looping */ \
- case 0: \
- voice->control |= CONTROL_STOP0; \
- goto alldone; \
+ /* handle the different types of looping */ \
+ switch (voice->control & CONTROL_LOOPMASK) \
+ { \
+ /* non-looping */ \
+ case 0: \
+ voice->control |= CONTROL_STOP0; \
+ goto alldone; \
\
- /* uni-directional looping */ \
- case CONTROL_LPE: \
- accum = (voice->end - (voice->start - accum)) & voice->accum_mask; \
- break; \
+ /* uni-directional looping */ \
+ case CONTROL_LPE: \
+ accum = (voice->end - (voice->start - accum)) & voice->accum_mask; \
+ break; \
\
- /* trans-wave looping */ \
- case CONTROL_BLE: \
- accum = (voice->end - (voice->start - accum)) & voice->accum_mask; \
+ /* trans-wave looping */ \
+ case CONTROL_BLE: \
+ accum = (voice->end - (voice->start - accum)) & voice->accum_mask; \
voice->control = (voice->control & ~CONTROL_LOOPMASK) | CONTROL_LEI;\
- break; \
+ break; \
\
- /* bi-directional looping */ \
- case CONTROL_LPE | CONTROL_BLE: \
+ /* bi-directional looping */ \
+ case CONTROL_LPE | CONTROL_BLE: \
accum = (voice->start + (voice->start - accum)) & voice->accum_mask;\
- voice->control ^= CONTROL_DIR; \
- goto reverse; \
- } \
- } \
+ voice->control ^= CONTROL_DIR; \
+ goto reverse; \
+ } \
+ } \
} while (0)
@@ -1039,74 +1039,74 @@ INLINE void es5506_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
{
switch (offset)
{
- case 0x00/8: /* CR */
+ case 0x00/8: /* CR */
voice->control = data & 0xffff;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, control=%04x\n", chip->current_page & 0x1f, voice->control);
break;
- case 0x08/8: /* FC */
+ case 0x08/8: /* FC */
voice->freqcount = data & 0x1ffff;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, freq count=%08x\n", chip->current_page & 0x1f, voice->freqcount);
break;
- case 0x10/8: /* LVOL */
+ case 0x10/8: /* LVOL */
voice->lvol = data & 0xffff;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, left vol=%04x\n", chip->current_page & 0x1f, voice->lvol);
break;
- case 0x18/8: /* LVRAMP */
+ case 0x18/8: /* LVRAMP */
voice->lvramp = (data & 0xff00) >> 8;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, left vol ramp=%04x\n", chip->current_page & 0x1f, voice->lvramp);
break;
- case 0x20/8: /* RVOL */
+ case 0x20/8: /* RVOL */
voice->rvol = data & 0xffff;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, right vol=%04x\n", chip->current_page & 0x1f, voice->rvol);
break;
- case 0x28/8: /* RVRAMP */
+ case 0x28/8: /* RVRAMP */
voice->rvramp = (data & 0xff00) >> 8;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, right vol ramp=%04x\n", chip->current_page & 0x1f, voice->rvramp);
break;
- case 0x30/8: /* ECOUNT */
+ case 0x30/8: /* ECOUNT */
voice->ecount = data & 0x1ff;
voice->filtcount = 0;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, envelope count=%04x\n", chip->current_page & 0x1f, voice->ecount);
break;
- case 0x38/8: /* K2 */
+ case 0x38/8: /* K2 */
voice->k2 = data & 0xffff;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, K2=%04x\n", chip->current_page & 0x1f, voice->k2);
break;
- case 0x40/8: /* K2RAMP */
+ case 0x40/8: /* K2RAMP */
voice->k2ramp = ((data & 0xff00) >> 8) | ((data & 0x0001) << 31);
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, K2 ramp=%04x\n", chip->current_page & 0x1f, voice->k2ramp);
break;
- case 0x48/8: /* K1 */
+ case 0x48/8: /* K1 */
voice->k1 = data & 0xffff;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, K1=%04x\n", chip->current_page & 0x1f, voice->k1);
break;
- case 0x50/8: /* K1RAMP */
+ case 0x50/8: /* K1RAMP */
voice->k1ramp = ((data & 0xff00) >> 8) | ((data & 0x0001) << 31);
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, K1 ramp=%04x\n", chip->current_page & 0x1f, voice->k1ramp);
break;
- case 0x58/8: /* ACTV */
+ case 0x58/8: /* ACTV */
{
chip->active_voices = data & 0x1f;
chip->sample_rate = chip->master_clock / (16 * (chip->active_voices + 1));
@@ -1117,15 +1117,15 @@ INLINE void es5506_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
break;
}
- case 0x60/8: /* MODE */
+ case 0x60/8: /* MODE */
chip->mode = data & 0x1f;
break;
- case 0x68/8: /* PAR - read only */
- case 0x70/8: /* IRQV - read only */
+ case 0x68/8: /* PAR - read only */
+ case 0x70/8: /* IRQV - read only */
break;
- case 0x78/8: /* PAGE */
+ case 0x78/8: /* PAGE */
chip->current_page = data & 0x7f;
break;
}
@@ -1136,83 +1136,83 @@ INLINE void es5506_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
{
switch (offset)
{
- case 0x00/8: /* CR */
+ case 0x00/8: /* CR */
voice->control = data & 0xffff;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, control=%04x\n", chip->current_page & 0x1f, voice->control);
break;
- case 0x08/8: /* START */
+ case 0x08/8: /* START */
voice->start = data & 0xfffff800;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, loop start=%08x\n", chip->current_page & 0x1f, voice->start);
break;
- case 0x10/8: /* END */
+ case 0x10/8: /* END */
voice->end = data & 0xffffff80;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, loop end=%08x\n", chip->current_page & 0x1f, voice->end);
break;
- case 0x18/8: /* ACCUM */
+ case 0x18/8: /* ACCUM */
voice->accum = data;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, accum=%08x\n", chip->current_page & 0x1f, voice->accum);
break;
- case 0x20/8: /* O4(n-1) */
+ case 0x20/8: /* O4(n-1) */
voice->o4n1 = (INT32)(data << 14) >> 14;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, O4(n-1)=%05x\n", chip->current_page & 0x1f, voice->o4n1 & 0x3ffff);
break;
- case 0x28/8: /* O3(n-1) */
+ case 0x28/8: /* O3(n-1) */
voice->o3n1 = (INT32)(data << 14) >> 14;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, O3(n-1)=%05x\n", chip->current_page & 0x1f, voice->o3n1 & 0x3ffff);
break;
- case 0x30/8: /* O3(n-2) */
+ case 0x30/8: /* O3(n-2) */
voice->o3n2 = (INT32)(data << 14) >> 14;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, O3(n-2)=%05x\n", chip->current_page & 0x1f, voice->o3n2 & 0x3ffff);
break;
- case 0x38/8: /* O2(n-1) */
+ case 0x38/8: /* O2(n-1) */
voice->o2n1 = (INT32)(data << 14) >> 14;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, O2(n-1)=%05x\n", chip->current_page & 0x1f, voice->o2n1 & 0x3ffff);
break;
- case 0x40/8: /* O2(n-2) */
+ case 0x40/8: /* O2(n-2) */
voice->o2n2 = (INT32)(data << 14) >> 14;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, O2(n-2)=%05x\n", chip->current_page & 0x1f, voice->o2n2 & 0x3ffff);
break;
- case 0x48/8: /* O1(n-1) */
+ case 0x48/8: /* O1(n-1) */
voice->o1n1 = (INT32)(data << 14) >> 14;
if (LOG_COMMANDS && eslog)
fprintf(eslog, "voice %d, O1(n-1)=%05x\n", chip->current_page & 0x1f, voice->o1n1 & 0x3ffff);
break;
- case 0x50/8: /* W_ST */
+ case 0x50/8: /* W_ST */
chip->wst = data & 0x7f;
break;
- case 0x58/8: /* W_END */
+ case 0x58/8: /* W_END */
chip->wend = data & 0x7f;
break;
- case 0x60/8: /* LR_END */
+ case 0x60/8: /* LR_END */
chip->lrend = data & 0x7f;
break;
- case 0x68/8: /* PAR - read only */
- case 0x70/8: /* IRQV - read only */
+ case 0x68/8: /* PAR - read only */
+ case 0x70/8: /* IRQV - read only */
break;
- case 0x78/8: /* PAGE */
+ case 0x78/8: /* PAGE */
chip->current_page = data & 0x7f;
break;
}
@@ -1222,76 +1222,76 @@ INLINE void es5506_reg_write_test(es5506_state *chip, es5506_voice *voice, offs_
{
switch (offset)
{
- case 0x00/8: /* CHANNEL 0 LEFT */
+ case 0x00/8: /* CHANNEL 0 LEFT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 0 left test write %08x\n", data);
break;
- case 0x08/8: /* CHANNEL 0 RIGHT */
+ case 0x08/8: /* CHANNEL 0 RIGHT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 0 right test write %08x\n", data);
break;
- case 0x10/8: /* CHANNEL 1 LEFT */
+ case 0x10/8: /* CHANNEL 1 LEFT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 1 left test write %08x\n", data);
break;
- case 0x18/8: /* CHANNEL 1 RIGHT */
+ case 0x18/8: /* CHANNEL 1 RIGHT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 1 right test write %08x\n", data);
break;
- case 0x20/8: /* CHANNEL 2 LEFT */
+ case 0x20/8: /* CHANNEL 2 LEFT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 2 left test write %08x\n", data);
break;
- case 0x28/8: /* CHANNEL 2 RIGHT */
+ case 0x28/8: /* CHANNEL 2 RIGHT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 2 right test write %08x\n", data);
break;
- case 0x30/8: /* CHANNEL 3 LEFT */
+ case 0x30/8: /* CHANNEL 3 LEFT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 3 left test write %08x\n", data);
break;
- case 0x38/8: /* CHANNEL 3 RIGHT */
+ case 0x38/8: /* CHANNEL 3 RIGHT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 3 right test write %08x\n", data);
break;
- case 0x40/8: /* CHANNEL 4 LEFT */
+ case 0x40/8: /* CHANNEL 4 LEFT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 4 left test write %08x\n", data);
break;
- case 0x48/8: /* CHANNEL 4 RIGHT */
+ case 0x48/8: /* CHANNEL 4 RIGHT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 4 right test write %08x\n", data);
break;
- case 0x50/8: /* CHANNEL 5 LEFT */
+ case 0x50/8: /* CHANNEL 5 LEFT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 5 left test write %08x\n", data);
break;
- case 0x58/8: /* CHANNEL 6 RIGHT */
+ case 0x58/8: /* CHANNEL 6 RIGHT */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Channel 5 right test write %08x\n", data);
break;
- case 0x60/8: /* EMPTY */
+ case 0x60/8: /* EMPTY */
if (LOG_COMMANDS && eslog)
fprintf(eslog, "Test write EMPTY %08x\n", data);
break;
- case 0x68/8: /* PAR - read only */
- case 0x70/8: /* IRQV - read only */
+ case 0x68/8: /* PAR - read only */
+ case 0x70/8: /* IRQV - read only */
break;
- case 0x78/8: /* PAGE */
+ case 0x78/8: /* PAGE */
chip->current_page = data & 0x7f;
break;
}
@@ -1339,69 +1339,69 @@ INLINE UINT32 es5506_reg_read_low(es5506_state *chip, es5506_voice *voice, offs_
switch (offset)
{
- case 0x00/8: /* CR */
+ case 0x00/8: /* CR */
result = voice->control;
break;
- case 0x08/8: /* FC */
+ case 0x08/8: /* FC */
result = voice->freqcount;
break;
- case 0x10/8: /* LVOL */
+ case 0x10/8: /* LVOL */
result = voice->lvol;
break;
- case 0x18/8: /* LVRAMP */
+ case 0x18/8: /* LVRAMP */
result = voice->lvramp << 8;
break;
- case 0x20/8: /* RVOL */
+ case 0x20/8: /* RVOL */
result = voice->rvol;
break;
- case 0x28/8: /* RVRAMP */
+ case 0x28/8: /* RVRAMP */
result = voice->rvramp << 8;
break;
- case 0x30/8: /* ECOUNT */
+ case 0x30/8: /* ECOUNT */
result = voice->ecount;
break;
- case 0x38/8: /* K2 */
+ case 0x38/8: /* K2 */
result = voice->k2;
break;
- case 0x40/8: /* K2RAMP */
+ case 0x40/8: /* K2RAMP */
result = (voice->k2ramp << 8) | (voice->k2ramp >> 31);
break;
- case 0x48/8: /* K1 */
+ case 0x48/8: /* K1 */
result = voice->k1;
break;
- case 0x50/8: /* K1RAMP */
+ case 0x50/8: /* K1RAMP */
result = (voice->k1ramp << 8) | (voice->k1ramp >> 31);
break;
- case 0x58/8: /* ACTV */
+ case 0x58/8: /* ACTV */
result = chip->active_voices;
break;
- case 0x60/8: /* MODE */
+ case 0x60/8: /* MODE */
result = chip->mode;
break;
- case 0x68/8: /* PAR */
+ case 0x68/8: /* PAR */
if (chip->port_read)
result = (*chip->port_read)(chip->device);
break;
- case 0x70/8: /* IRQV */
+ case 0x70/8: /* IRQV */
result = chip->irqv;
update_internal_irq_state(chip);
break;
- case 0x78/8: /* PAGE */
+ case 0x78/8: /* PAGE */
result = chip->current_page;
break;
}
@@ -1415,69 +1415,69 @@ INLINE UINT32 es5506_reg_read_high(es5506_state *chip, es5506_voice *voice, offs
switch (offset)
{
- case 0x00/8: /* CR */
+ case 0x00/8: /* CR */
result = voice->control;
break;
- case 0x08/8: /* START */
+ case 0x08/8: /* START */
result = voice->start;
break;
- case 0x10/8: /* END */
+ case 0x10/8: /* END */
result = voice->end;
break;
- case 0x18/8: /* ACCUM */
+ case 0x18/8: /* ACCUM */
result = voice->accum;
break;
- case 0x20/8: /* O4(n-1) */
+ case 0x20/8: /* O4(n-1) */
result = voice->o4n1 & 0x3ffff;
break;
- case 0x28/8: /* O3(n-1) */
+ case 0x28/8: /* O3(n-1) */
result = voice->o3n1 & 0x3ffff;
break;
- case 0x30/8: /* O3(n-2) */
+ case 0x30/8: /* O3(n-2) */
result = voice->o3n2 & 0x3ffff;
break;
- case 0x38/8: /* O2(n-1) */
+ case 0x38/8: /* O2(n-1) */
result = voice->o2n1 & 0x3ffff;
break;
- case 0x40/8: /* O2(n-2) */
+ case 0x40/8: /* O2(n-2) */
result = voice->o2n2 & 0x3ffff;
break;
- case 0x48/8: /* O1(n-1) */
+ case 0x48/8: /* O1(n-1) */
result = voice->o1n1 & 0x3ffff;
break;
- case 0x50/8: /* W_ST */
+ case 0x50/8: /* W_ST */
result = chip->wst;
break;
- case 0x58/8: /* W_END */
+ case 0x58/8: /* W_END */
result = chip->wend;
break;
- case 0x60/8: /* LR_END */
+ case 0x60/8: /* LR_END */
result = chip->lrend;
break;
- case 0x68/8: /* PAR */
+ case 0x68/8: /* PAR */
if (chip->port_read)
result = (*chip->port_read)(chip->device);
break;
- case 0x70/8: /* IRQV */
+ case 0x70/8: /* IRQV */
result = chip->irqv;
update_internal_irq_state(chip);
break;
- case 0x78/8: /* PAGE */
+ case 0x78/8: /* PAGE */
result = chip->current_page;
break;
}
@@ -1490,16 +1490,16 @@ INLINE UINT32 es5506_reg_read_test(es5506_state *chip, es5506_voice *voice, offs
switch (offset)
{
- case 0x68/8: /* PAR */
+ case 0x68/8: /* PAR */
if (chip->port_read)
result = (*chip->port_read)(chip->device);
break;
- case 0x70/8: /* IRQV */
+ case 0x70/8: /* IRQV */
result = chip->irqv;
break;
- case 0x78/8: /* PAGE */
+ case 0x78/8: /* PAGE */
result = chip->current_page;
break;
}
@@ -1580,7 +1580,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
switch (offset)
{
- case 0x00: /* CR */
+ case 0x00: /* CR */
if (ACCESSING_BITS_0_7)
{
#if RAINE_CHECK
@@ -1589,20 +1589,20 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
voice->control &= ~(CONTROL_STOPMASK | CONTROL_BS0 | CONTROL_LOOPMASK | CONTROL_IRQE | CONTROL_DIR | CONTROL_IRQ);
#endif
voice->control |= (data & (CONTROL_STOPMASK | CONTROL_LOOPMASK | CONTROL_IRQE | CONTROL_DIR | CONTROL_IRQ)) |
- ((data << 12) & CONTROL_BS0);
+ ((data << 12) & CONTROL_BS0);
}
if (ACCESSING_BITS_8_15)
{
voice->control &= ~(CONTROL_CA0 | CONTROL_CA1 | CONTROL_LPMASK);
voice->control |= ((data >> 2) & CONTROL_LPMASK) |
- ((data << 2) & (CONTROL_CA0 | CONTROL_CA1));
+ ((data << 2) & (CONTROL_CA0 | CONTROL_CA1));
}
if (LOG_COMMANDS && eslog)
fprintf(eslog, "%s:voice %d, control=%04x (raw=%04x & %04x)\n", machine.describe_context(), chip->current_page & 0x1f, voice->control, data, mem_mask ^ 0xffff);
break;
- case 0x01: /* FC */
+ case 0x01: /* FC */
if (ACCESSING_BITS_0_7)
voice->freqcount = (voice->freqcount & ~0x001fe) | ((data & 0x00ff) << 1);
if (ACCESSING_BITS_8_15)
@@ -1611,7 +1611,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, freq count=%08x\n", machine.describe_context(), chip->current_page & 0x1f, voice->freqcount);
break;
- case 0x02: /* STRT (hi) */
+ case 0x02: /* STRT (hi) */
if (ACCESSING_BITS_0_7)
voice->start = (voice->start & ~0x03fc0000) | ((data & 0x00ff) << 18);
if (ACCESSING_BITS_8_15)
@@ -1620,7 +1620,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, loop start=%08x\n", machine.describe_context(), chip->current_page & 0x1f, voice->start);
break;
- case 0x03: /* STRT (lo) */
+ case 0x03: /* STRT (lo) */
if (ACCESSING_BITS_0_7)
voice->start = (voice->start & ~0x00000380) | ((data & 0x00e0) << 2);
if (ACCESSING_BITS_8_15)
@@ -1629,7 +1629,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, loop start=%08x\n", machine.describe_context(), chip->current_page & 0x1f, voice->start);
break;
- case 0x04: /* END (hi) */
+ case 0x04: /* END (hi) */
if (ACCESSING_BITS_0_7)
voice->end = (voice->end & ~0x03fc0000) | ((data & 0x00ff) << 18);
if (ACCESSING_BITS_8_15)
@@ -1641,7 +1641,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, loop end=%08x\n", machine.describe_context(), chip->current_page & 0x1f, voice->end);
break;
- case 0x05: /* END (lo) */
+ case 0x05: /* END (lo) */
if (ACCESSING_BITS_0_7)
voice->end = (voice->end & ~0x00000380) | ((data & 0x00e0) << 2);
if (ACCESSING_BITS_8_15)
@@ -1653,7 +1653,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, loop end=%08x\n", machine.describe_context(), chip->current_page & 0x1f, voice->end);
break;
- case 0x06: /* K2 */
+ case 0x06: /* K2 */
if (ACCESSING_BITS_0_7)
voice->k2 = (voice->k2 & ~0x00f0) | (data & 0x00f0);
if (ACCESSING_BITS_8_15)
@@ -1662,7 +1662,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, K2=%04x\n", machine.describe_context(), chip->current_page & 0x1f, voice->k2);
break;
- case 0x07: /* K1 */
+ case 0x07: /* K1 */
if (ACCESSING_BITS_0_7)
voice->k1 = (voice->k1 & ~0x00f0) | (data & 0x00f0);
if (ACCESSING_BITS_8_15)
@@ -1671,21 +1671,21 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, K1=%04x\n", machine.describe_context(), chip->current_page & 0x1f, voice->k1);
break;
- case 0x08: /* LVOL */
+ case 0x08: /* LVOL */
if (ACCESSING_BITS_8_15)
voice->lvol = (voice->lvol & ~0xff00) | (data & 0xff00);
if (LOG_COMMANDS && eslog)
fprintf(eslog, "%s:voice %d, left vol=%04x\n", machine.describe_context(), chip->current_page & 0x1f, voice->lvol);
break;
- case 0x09: /* RVOL */
+ case 0x09: /* RVOL */
if (ACCESSING_BITS_8_15)
voice->rvol = (voice->rvol & ~0xff00) | (data & 0xff00);
if (LOG_COMMANDS && eslog)
fprintf(eslog, "%s:voice %d, right vol=%04x\n", machine.describe_context(), chip->current_page & 0x1f, voice->rvol);
break;
- case 0x0a: /* ACC (hi) */
+ case 0x0a: /* ACC (hi) */
if (ACCESSING_BITS_0_7)
voice->accum = (voice->accum & ~0x03fc0000) | ((data & 0x00ff) << 18);
if (ACCESSING_BITS_8_15)
@@ -1694,7 +1694,7 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, accum=%08x\n", machine.describe_context(), chip->current_page & 0x1f, voice->accum);
break;
- case 0x0b: /* ACC (lo) */
+ case 0x0b: /* ACC (lo) */
if (ACCESSING_BITS_0_7)
voice->accum = (voice->accum & ~0x000003fc) | ((data & 0x00ff) << 2);
if (ACCESSING_BITS_8_15)
@@ -1703,10 +1703,10 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
fprintf(eslog, "%s:voice %d, accum=%08x\n", machine.describe_context(), chip->current_page & 0x1f, voice->accum);
break;
- case 0x0c: /* unused */
+ case 0x0c: /* unused */
break;
- case 0x0d: /* ACT */
+ case 0x0d: /* ACT */
if (ACCESSING_BITS_0_7)
{
chip->active_voices = data & 0x1f;
@@ -1718,10 +1718,10 @@ INLINE void es5505_reg_write_low(es5506_state *chip, es5506_voice *voice, offs_t
}
break;
- case 0x0e: /* IRQV - read only */
+ case 0x0e: /* IRQV - read only */
break;
- case 0x0f: /* PAGE */
+ case 0x0f: /* PAGE */
if (ACCESSING_BITS_0_7)
chip->current_page = data & 0x7f;
break;
@@ -1735,24 +1735,24 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
switch (offset)
{
- case 0x00: /* CR */
+ case 0x00: /* CR */
if (ACCESSING_BITS_0_7)
{
voice->control &= ~(CONTROL_STOPMASK | CONTROL_BS0 | CONTROL_LOOPMASK | CONTROL_IRQE | CONTROL_DIR | CONTROL_IRQ);
voice->control |= (data & (CONTROL_STOPMASK | CONTROL_LOOPMASK | CONTROL_IRQE | CONTROL_DIR | CONTROL_IRQ)) |
- ((data << 12) & CONTROL_BS0);
+ ((data << 12) & CONTROL_BS0);
}
if (ACCESSING_BITS_8_15)
{
voice->control &= ~(CONTROL_CA0 | CONTROL_CA1 | CONTROL_LPMASK);
voice->control |= ((data >> 2) & CONTROL_LPMASK) |
- ((data << 2) & (CONTROL_CA0 | CONTROL_CA1));
+ ((data << 2) & (CONTROL_CA0 | CONTROL_CA1));
}
if (LOG_COMMANDS && eslog)
fprintf(eslog, "%s:voice %d, control=%04x (raw=%04x & %04x)\n", machine.describe_context(), chip->current_page & 0x1f, voice->control, data, mem_mask);
break;
- case 0x01: /* O4(n-1) */
+ case 0x01: /* O4(n-1) */
if (ACCESSING_BITS_0_7)
voice->o4n1 = (voice->o4n1 & ~0x00ff) | (data & 0x00ff);
if (ACCESSING_BITS_8_15)
@@ -1761,7 +1761,7 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
fprintf(eslog, "%s:voice %d, O4(n-1)=%05x\n", machine.describe_context(), chip->current_page & 0x1f, voice->o4n1 & 0x3ffff);
break;
- case 0x02: /* O3(n-1) */
+ case 0x02: /* O3(n-1) */
if (ACCESSING_BITS_0_7)
voice->o3n1 = (voice->o3n1 & ~0x00ff) | (data & 0x00ff);
if (ACCESSING_BITS_8_15)
@@ -1770,7 +1770,7 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
fprintf(eslog, "%s:voice %d, O3(n-1)=%05x\n", machine.describe_context(), chip->current_page & 0x1f, voice->o3n1 & 0x3ffff);
break;
- case 0x03: /* O3(n-2) */
+ case 0x03: /* O3(n-2) */
if (ACCESSING_BITS_0_7)
voice->o3n2 = (voice->o3n2 & ~0x00ff) | (data & 0x00ff);
if (ACCESSING_BITS_8_15)
@@ -1779,7 +1779,7 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
fprintf(eslog, "%s:voice %d, O3(n-2)=%05x\n", machine.describe_context(), chip->current_page & 0x1f, voice->o3n2 & 0x3ffff);
break;
- case 0x04: /* O2(n-1) */
+ case 0x04: /* O2(n-1) */
if (ACCESSING_BITS_0_7)
voice->o2n1 = (voice->o2n1 & ~0x00ff) | (data & 0x00ff);
if (ACCESSING_BITS_8_15)
@@ -1788,7 +1788,7 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
fprintf(eslog, "%s:voice %d, O2(n-1)=%05x\n", machine.describe_context(), chip->current_page & 0x1f, voice->o2n1 & 0x3ffff);
break;
- case 0x05: /* O2(n-2) */
+ case 0x05: /* O2(n-2) */
if (ACCESSING_BITS_0_7)
voice->o2n2 = (voice->o2n2 & ~0x00ff) | (data & 0x00ff);
if (ACCESSING_BITS_8_15)
@@ -1797,7 +1797,7 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
fprintf(eslog, "%s:voice %d, O2(n-2)=%05x\n", machine.describe_context(), chip->current_page & 0x1f, voice->o2n2 & 0x3ffff);
break;
- case 0x06: /* O1(n-1) */
+ case 0x06: /* O1(n-1) */
if (ACCESSING_BITS_0_7)
voice->o1n1 = (voice->o1n1 & ~0x00ff) | (data & 0x00ff);
if (ACCESSING_BITS_8_15)
@@ -1811,10 +1811,10 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
case 0x09:
case 0x0a:
case 0x0b:
- case 0x0c: /* unused */
+ case 0x0c: /* unused */
break;
- case 0x0d: /* ACT */
+ case 0x0d: /* ACT */
if (ACCESSING_BITS_0_7)
{
chip->active_voices = data & 0x1f;
@@ -1826,10 +1826,10 @@ INLINE void es5505_reg_write_high(es5506_state *chip, es5506_voice *voice, offs_
}
break;
- case 0x0e: /* IRQV - read only */
+ case 0x0e: /* IRQV - read only */
break;
- case 0x0f: /* PAGE */
+ case 0x0f: /* PAGE */
if (ACCESSING_BITS_0_7)
chip->current_page = data & 0x7f;
break;
@@ -1841,24 +1841,24 @@ INLINE void es5505_reg_write_test(es5506_state *chip, es5506_voice *voice, offs_
{
switch (offset)
{
- case 0x00: /* CH0L */
- case 0x01: /* CH0R */
- case 0x02: /* CH1L */
- case 0x03: /* CH1R */
- case 0x04: /* CH2L */
- case 0x05: /* CH2R */
- case 0x06: /* CH3L */
- case 0x07: /* CH3R */
+ case 0x00: /* CH0L */
+ case 0x01: /* CH0R */
+ case 0x02: /* CH1L */
+ case 0x03: /* CH1R */
+ case 0x04: /* CH2L */
+ case 0x05: /* CH2R */
+ case 0x06: /* CH3L */
+ case 0x07: /* CH3R */
break;
- case 0x08: /* SERMODE */
+ case 0x08: /* SERMODE */
chip->mode = data & 0x0007;
break;
- case 0x09: /* PAR */
+ case 0x09: /* PAR */
break;
- case 0x0d: /* ACT */
+ case 0x0d: /* ACT */
if (ACCESSING_BITS_0_7)
{
chip->active_voices = data & 0x1f;
@@ -1870,10 +1870,10 @@ INLINE void es5505_reg_write_test(es5506_state *chip, es5506_voice *voice, offs_
}
break;
- case 0x0e: /* IRQV - read only */
+ case 0x0e: /* IRQV - read only */
break;
- case 0x0f: /* PAGE */
+ case 0x0f: /* PAGE */
if (ACCESSING_BITS_0_7)
chip->current_page = data & 0x7f;
break;
@@ -1914,71 +1914,71 @@ INLINE UINT16 es5505_reg_read_low(es5506_state *chip, es5506_voice *voice, offs_
switch (offset)
{
- case 0x00: /* CR */
+ case 0x00: /* CR */
result = (voice->control & (CONTROL_STOPMASK | CONTROL_LOOPMASK | CONTROL_IRQE | CONTROL_DIR | CONTROL_IRQ)) |
- ((voice->control & CONTROL_BS0) >> 12) |
- ((voice->control & CONTROL_LPMASK) << 2) |
- ((voice->control & (CONTROL_CA0 | CONTROL_CA1)) >> 2) |
- 0xf000;
+ ((voice->control & CONTROL_BS0) >> 12) |
+ ((voice->control & CONTROL_LPMASK) << 2) |
+ ((voice->control & (CONTROL_CA0 | CONTROL_CA1)) >> 2) |
+ 0xf000;
break;
- case 0x01: /* FC */
+ case 0x01: /* FC */
result = voice->freqcount >> 1;
break;
- case 0x02: /* STRT (hi) */
+ case 0x02: /* STRT (hi) */
result = voice->start >> 18;
break;
- case 0x03: /* STRT (lo) */
+ case 0x03: /* STRT (lo) */
result = voice->start >> 2;
break;
- case 0x04: /* END (hi) */
+ case 0x04: /* END (hi) */
result = voice->end >> 18;
break;
- case 0x05: /* END (lo) */
+ case 0x05: /* END (lo) */
result = voice->end >> 2;
break;
- case 0x06: /* K2 */
+ case 0x06: /* K2 */
result = voice->k2;
break;
- case 0x07: /* K1 */
+ case 0x07: /* K1 */
result = voice->k1;
break;
- case 0x08: /* LVOL */
+ case 0x08: /* LVOL */
result = voice->lvol;
break;
- case 0x09: /* RVOL */
+ case 0x09: /* RVOL */
result = voice->rvol;
break;
- case 0x0a: /* ACC (hi) */
+ case 0x0a: /* ACC (hi) */
result = voice->accum >> 18;
break;
- case 0x0b: /* ACC (lo) */
+ case 0x0b: /* ACC (lo) */
result = voice->accum >> 2;
break;
- case 0x0c: /* unused */
+ case 0x0c: /* unused */
break;
- case 0x0d: /* ACT */
+ case 0x0d: /* ACT */
result = chip->active_voices;
break;
- case 0x0e: /* IRQV */
+ case 0x0e: /* IRQV */
result = chip->irqv;
update_internal_irq_state(chip);
break;
- case 0x0f: /* PAGE */
+ case 0x0f: /* PAGE */
result = chip->current_page;
break;
}
@@ -1992,35 +1992,35 @@ INLINE UINT16 es5505_reg_read_high(es5506_state *chip, es5506_voice *voice, offs
switch (offset)
{
- case 0x00: /* CR */
+ case 0x00: /* CR */
result = (voice->control & (CONTROL_STOPMASK | CONTROL_LOOPMASK | CONTROL_IRQE | CONTROL_DIR | CONTROL_IRQ)) |
- ((voice->control & CONTROL_BS0) >> 12) |
- ((voice->control & CONTROL_LPMASK) << 2) |
- ((voice->control & (CONTROL_CA0 | CONTROL_CA1)) >> 2) |
- 0xf000;
+ ((voice->control & CONTROL_BS0) >> 12) |
+ ((voice->control & CONTROL_LPMASK) << 2) |
+ ((voice->control & (CONTROL_CA0 | CONTROL_CA1)) >> 2) |
+ 0xf000;
break;
- case 0x01: /* O4(n-1) */
+ case 0x01: /* O4(n-1) */
result = voice->o4n1;
break;
- case 0x02: /* O3(n-1) */
+ case 0x02: /* O3(n-1) */
result = voice->o3n1;
break;
- case 0x03: /* O3(n-2) */
+ case 0x03: /* O3(n-2) */
result = voice->o3n2;
break;
- case 0x04: /* O2(n-1) */
+ case 0x04: /* O2(n-1) */
result = voice->o2n1;
break;
- case 0x05: /* O2(n-2) */
+ case 0x05: /* O2(n-2) */
result = voice->o2n2;
break;
- case 0x06: /* O1(n-1) */
+ case 0x06: /* O1(n-1) */
/* special case for the Taito F3 games: they set the accumulator on a stopped */
/* voice and assume the filters continue to process the data. They then read */
/* the O1(n-1) in order to extract raw data from the sound ROMs. Since we don't */
@@ -2040,19 +2040,19 @@ INLINE UINT16 es5505_reg_read_high(es5506_state *chip, es5506_voice *voice, offs
case 0x09:
case 0x0a:
case 0x0b:
- case 0x0c: /* unused */
+ case 0x0c: /* unused */
break;
- case 0x0d: /* ACT */
+ case 0x0d: /* ACT */
result = chip->active_voices;
break;
- case 0x0e: /* IRQV */
+ case 0x0e: /* IRQV */
result = chip->irqv;
update_internal_irq_state(chip);
break;
- case 0x0f: /* PAGE */
+ case 0x0f: /* PAGE */
result = chip->current_page;
break;
}
@@ -2066,26 +2066,26 @@ INLINE UINT16 es5505_reg_read_test(es5506_state *chip, es5506_voice *voice, offs
switch (offset)
{
- case 0x00: /* CH0L */
- case 0x01: /* CH0R */
- case 0x02: /* CH1L */
- case 0x03: /* CH1R */
- case 0x04: /* CH2L */
- case 0x05: /* CH2R */
- case 0x06: /* CH3L */
- case 0x07: /* CH3R */
+ case 0x00: /* CH0L */
+ case 0x01: /* CH0R */
+ case 0x02: /* CH1L */
+ case 0x03: /* CH1R */
+ case 0x04: /* CH2L */
+ case 0x05: /* CH2R */
+ case 0x06: /* CH3L */
+ case 0x07: /* CH3R */
break;
- case 0x08: /* SERMODE */
+ case 0x08: /* SERMODE */
result = chip->mode;
break;
- case 0x09: /* PAR */
+ case 0x09: /* PAR */
if (chip->port_read)
result = (*chip->port_read)(chip->device);
break;
- case 0x0f: /* PAGE */
+ case 0x0f: /* PAGE */
result = chip->current_page;
break;
}
@@ -2135,14 +2135,14 @@ const device_type ES5506 = &device_creator<es5506_device>;
es5506_device::es5506_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ES5506, "ES5506", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(es5506_state);
}
es5506_device::es5506_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(es5506_state);
}
diff --git a/src/emu/sound/es5506.h b/src/emu/sound/es5506.h
index 076bfcf24ba..9c57996f12d 100644
--- a/src/emu/sound/es5506.h
+++ b/src/emu/sound/es5506.h
@@ -14,10 +14,10 @@
struct es5505_interface
{
- const char * region0; /* memory region where the sample ROM lives */
- const char * region1; /* memory region where the sample ROM lives */
- void (*irq_callback)(device_t *device, int state); /* irq callback */
- UINT16 (*read_port)(device_t *device); /* input port read */
+ const char * region0; /* memory region where the sample ROM lives */
+ const char * region1; /* memory region where the sample ROM lives */
+ void (*irq_callback)(device_t *device, int state); /* irq callback */
+ UINT16 (*read_port)(device_t *device); /* input port read */
};
DECLARE_READ16_DEVICE_HANDLER( es5505_r );
@@ -25,7 +25,7 @@ DECLARE_WRITE16_DEVICE_HANDLER( es5505_w );
void es5505_voice_bank_w(device_t *device, int voice, int bank);
class es5506_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
es5506_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -54,12 +54,12 @@ extern const device_type ES5506;
struct es5506_interface
{
- const char * region0; /* memory region where the sample ROM lives */
- const char * region1; /* memory region where the sample ROM lives */
- const char * region2; /* memory region where the sample ROM lives */
- const char * region3; /* memory region where the sample ROM lives */
- void (*irq_callback)(device_t *device, int state); /* irq callback */
- UINT16 (*read_port)(device_t *device); /* input port read */
+ const char * region0; /* memory region where the sample ROM lives */
+ const char * region1; /* memory region where the sample ROM lives */
+ const char * region2; /* memory region where the sample ROM lives */
+ const char * region3; /* memory region where the sample ROM lives */
+ void (*irq_callback)(device_t *device, int state); /* irq callback */
+ UINT16 (*read_port)(device_t *device); /* input port read */
};
DECLARE_READ8_DEVICE_HANDLER( es5506_r );
diff --git a/src/emu/sound/es8712.c b/src/emu/sound/es8712.c
index 2464837cfc0..b074b6c32fb 100644
--- a/src/emu/sound/es8712.c
+++ b/src/emu/sound/es8712.c
@@ -15,28 +15,28 @@
#include "emu.h"
#include "es8712.h"
-#define MAX_SAMPLE_CHUNK 10000
+#define MAX_SAMPLE_CHUNK 10000
/* struct describing a playing ADPCM chip */
struct es8712_state
{
- UINT8 playing; /* 1 if we're actively playing */
+ UINT8 playing; /* 1 if we're actively playing */
- UINT32 base_offset; /* pointer to the base memory location */
- UINT32 sample; /* current sample number */
- UINT32 count; /* total samples to play */
+ UINT32 base_offset; /* pointer to the base memory location */
+ UINT32 sample; /* current sample number */
+ UINT32 count; /* total samples to play */
- UINT32 signal; /* current ADPCM signal */
- UINT32 step; /* current ADPCM step */
+ UINT32 signal; /* current ADPCM signal */
+ UINT32 step; /* current ADPCM step */
- UINT32 start; /* starting address for the next loop */
- UINT32 end; /* ending address for the next loop */
- UINT8 repeat; /* Repeat current sample when 1 */
+ UINT32 start; /* starting address for the next loop */
+ UINT32 end; /* ending address for the next loop */
+ UINT8 repeat; /* Repeat current sample when 1 */
INT32 bank_offset;
- UINT8 *region_base; /* pointer to the base of the region */
- sound_stream *stream; /* which stream are we playing on? */
+ UINT8 *region_base; /* pointer to the base of the region */
+ sound_stream *stream; /* which stream are we playing on? */
};
/* step size index shift table */
@@ -84,9 +84,9 @@ static void compute_tables(void)
{
diff_lookup[step*16 + nib] = nbl2bit[nib][0] *
(stepval * nbl2bit[nib][1] +
- stepval/2 * nbl2bit[nib][2] +
- stepval/4 * nbl2bit[nib][3] +
- stepval/8);
+ stepval/2 * nbl2bit[nib][2] +
+ stepval/4 * nbl2bit[nib][3] +
+ stepval/8);
}
}
}
@@ -358,22 +358,22 @@ WRITE8_DEVICE_HANDLER( es8712_w )
es8712_state *chip = get_safe_token(device);
switch (offset)
{
- case 00: chip->start &= 0x000fff00;
+ case 00: chip->start &= 0x000fff00;
chip->start |= ((data & 0xff) << 0); break;
- case 01: chip->start &= 0x000f00ff;
+ case 01: chip->start &= 0x000f00ff;
chip->start |= ((data & 0xff) << 8); break;
- case 02: chip->start &= 0x0000ffff;
+ case 02: chip->start &= 0x0000ffff;
chip->start |= ((data & 0x0f) << 16); break;
- case 03: chip->end &= 0x000fff00;
+ case 03: chip->end &= 0x000fff00;
chip->end |= ((data & 0xff) << 0); break;
- case 04: chip->end &= 0x000f00ff;
+ case 04: chip->end &= 0x000f00ff;
chip->end |= ((data & 0xff) << 8); break;
- case 05: chip->end &= 0x0000ffff;
+ case 05: chip->end &= 0x0000ffff;
chip->end |= ((data & 0x0f) << 16); break;
case 06:
es8712_play(device);
break;
- default: break;
+ default: break;
}
chip->start &= 0xfffff; chip->end &= 0xfffff;
}
@@ -382,7 +382,7 @@ const device_type ES8712 = &device_creator<es8712_device>;
es8712_device::es8712_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ES8712, "ES8712", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(es8712_state);
}
@@ -424,5 +424,3 @@ void es8712_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/es8712.h b/src/emu/sound/es8712.h
index 89e0973c64d..583a2625fd5 100644
--- a/src/emu/sound/es8712.h
+++ b/src/emu/sound/es8712.h
@@ -14,7 +14,7 @@ void es8712_set_frequency(device_t *device, int frequency);
DECLARE_WRITE8_DEVICE_HANDLER( es8712_w );
class es8712_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
es8712_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/filter.c b/src/emu/sound/filter.c
index 43acebde248..efd6796de86 100644
--- a/src/emu/sound/filter.c
+++ b/src/emu/sound/filter.c
@@ -20,7 +20,7 @@ void filter_state_reset(filter* f, filter_state* s) {
filter_state* filter_state_alloc(void) {
int i;
- filter_state* s = global_alloc(filter_state);
+ filter_state* s = global_alloc(filter_state);
s->prev_mac = 0;
for(i=0;i<FILTER_ORDER_MAX;++i)
s->xprev[i] = 0;
@@ -135,9 +135,9 @@ void filter2_setup(device_t *device, int type, double fc, double d, double gain,
filter2_context *filter2)
{
int sample_rate = device->machine().sample_rate();
- double w; /* cutoff freq, in radians/sec */
+ double w; /* cutoff freq, in radians/sec */
double w_squared;
- double den; /* temp variable */
+ double den; /* temp variable */
double two_over_T = 2*sample_rate;
double two_over_T_squared = two_over_T * two_over_T;
@@ -193,7 +193,7 @@ void filter2_reset(filter2_context *filter2)
void filter2_step(filter2_context *filter2)
{
filter2->y0 = -filter2->a1 * filter2->y1 - filter2->a2 * filter2->y2 +
- filter2->b0 * filter2->x0 + filter2->b1 * filter2->x1 + filter2->b2 * filter2->x2;
+ filter2->b0 * filter2->x0 + filter2->b1 * filter2->x1 + filter2->b2 * filter2->x2;
filter2->x2 = filter2->x1;
filter2->x1 = filter2->x0;
filter2->y2 = filter2->y1;
@@ -205,12 +205,12 @@ void filter2_step(filter2_context *filter2)
void filter_opamp_m_bandpass_setup(device_t *device, double r1, double r2, double r3, double c1, double c2,
filter2_context *filter2)
{
- double r_in, fc, d, gain;
+ double r_in, fc, d, gain;
if (r1 == 0)
{
logerror("filter_opamp_m_bandpass_setup() - r1 can not be 0");
- return; /* Filter can not be setup. Undefined results. */
+ return; /* Filter can not be setup. Undefined results. */
}
if (r2 == 0)
diff --git a/src/emu/sound/filter.h b/src/emu/sound/filter.h
index cbfdf6b97fc..1b62676b563 100644
--- a/src/emu/sound/filter.h
+++ b/src/emu/sound/filter.h
@@ -57,18 +57,18 @@ filter_real filter_compute(filter* f, filter_state* s);
/* Filter types */
-#define FILTER_LOWPASS 0
-#define FILTER_HIGHPASS 1
-#define FILTER_BANDPASS 2
+#define FILTER_LOWPASS 0
+#define FILTER_HIGHPASS 1
+#define FILTER_BANDPASS 2
-#define Q_TO_DAMP(q) (1.0/q)
+#define Q_TO_DAMP(q) (1.0/q)
struct filter2_context
{
- double x0, x1, x2; /* x[k], x[k-1], x[k-2], current and previous 2 input values */
- double y0, y1, y2; /* y[k], y[k-1], y[k-2], current and previous 2 output values */
- double a1, a2; /* digital filter coefficients, denominator */
- double b0, b1, b2; /* digital filter coefficients, numerator */
+ double x0, x1, x2; /* x[k], x[k-1], x[k-2], current and previous 2 input values */
+ double y0, y1, y2; /* y[k], y[k-1], y[k-2], current and previous 2 output values */
+ double a1, a2; /* digital filter coefficients, denominator */
+ double b0, b1, b2; /* digital filter coefficients, numerator */
};
diff --git a/src/emu/sound/flt_rc.c b/src/emu/sound/flt_rc.c
index 1b67f1e2a01..f4c059b9811 100644
--- a/src/emu/sound/flt_rc.c
+++ b/src/emu/sound/flt_rc.c
@@ -4,10 +4,10 @@
struct filter_rc_state
{
device_t *device;
- sound_stream * stream;
- int k;
- int memory;
- int type;
+ sound_stream * stream;
+ int k;
+ int memory;
+ int type;
};
INLINE filter_rc_state *get_safe_token(device_t *device)
@@ -114,7 +114,7 @@ const device_type FILTER_RC = &device_creator<filter_rc_device>;
filter_rc_device::filter_rc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, FILTER_RC, "RC Filter", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(filter_rc_state);
}
@@ -147,5 +147,3 @@ void filter_rc_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/flt_rc.h b/src/emu/sound/flt_rc.h
index 9449a0356c3..7e321d3fd61 100644
--- a/src/emu/sound/flt_rc.h
+++ b/src/emu/sound/flt_rc.h
@@ -6,9 +6,9 @@
#include "machine/rescap.h"
#include "devlegcy.h"
-#define FLT_RC_LOWPASS 0
-#define FLT_RC_HIGHPASS 1
-#define FLT_RC_AC 2
+#define FLT_RC_LOWPASS 0
+#define FLT_RC_HIGHPASS 1
+#define FLT_RC_AC 2
/*
* FLT_RC_LOWPASS:
@@ -47,11 +47,11 @@
struct flt_rc_config
{
- int type;
- double R1;
- double R2;
- double R3;
- double C;
+ int type;
+ double R1;
+ double R2;
+ double R3;
+ double C;
};
extern const flt_rc_config flt_rc_ac_default;
@@ -59,7 +59,7 @@ extern const flt_rc_config flt_rc_ac_default;
void filter_rc_set_RC(device_t *device, int type, double R1, double R2, double R3, double C);
class filter_rc_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
filter_rc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/flt_vol.c b/src/emu/sound/flt_vol.c
index 276de57d29c..66a5ee55c30 100644
--- a/src/emu/sound/flt_vol.c
+++ b/src/emu/sound/flt_vol.c
@@ -4,8 +4,8 @@
struct filter_volume_state
{
- sound_stream * stream;
- int gain;
+ sound_stream * stream;
+ int gain;
};
INLINE filter_volume_state *get_safe_token(device_t *device)
@@ -47,7 +47,7 @@ const device_type FILTER_VOLUME = &device_creator<filter_volume_device>;
filter_volume_device::filter_volume_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, FILTER_VOLUME, "Volume Filter", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(filter_volume_state);
}
@@ -80,5 +80,3 @@ void filter_volume_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/flt_vol.h b/src/emu/sound/flt_vol.h
index 9f7ce598b43..9c7047acf64 100644
--- a/src/emu/sound/flt_vol.h
+++ b/src/emu/sound/flt_vol.h
@@ -9,7 +9,7 @@
void flt_volume_set_volume(device_t *device, float volume);
class filter_volume_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
filter_volume_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/fm.c b/src/emu/sound/fm.c
index b3c292c1c22..8e736522315 100644
--- a/src/emu/sound/fm.c
+++ b/src/emu/sound/fm.c
@@ -140,41 +140,41 @@
-#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
-#define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
-#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
-#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
+#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
+#define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
+#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
+#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
-#define FREQ_MASK ((1<<FREQ_SH)-1)
+#define FREQ_MASK ((1<<FREQ_SH)-1)
-#define ENV_BITS 10
-#define ENV_LEN (1<<ENV_BITS)
-#define ENV_STEP (128.0/ENV_LEN)
+#define ENV_BITS 10
+#define ENV_LEN (1<<ENV_BITS)
+#define ENV_STEP (128.0/ENV_LEN)
-#define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
-#define MIN_ATT_INDEX (0) /* 0 */
+#define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
+#define MIN_ATT_INDEX (0) /* 0 */
-#define EG_ATT 4
-#define EG_DEC 3
-#define EG_SUS 2
-#define EG_REL 1
-#define EG_OFF 0
+#define EG_ATT 4
+#define EG_DEC 3
+#define EG_SUS 2
+#define EG_REL 1
+#define EG_OFF 0
-#define SIN_BITS 10
-#define SIN_LEN (1<<SIN_BITS)
-#define SIN_MASK (SIN_LEN-1)
+#define SIN_BITS 10
+#define SIN_LEN (1<<SIN_BITS)
+#define SIN_MASK (SIN_LEN-1)
-#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
+#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
#if (FM_SAMPLE_BITS==16)
- #define FINAL_SH (0)
- #define MAXOUT (+32767)
- #define MINOUT (-32768)
+ #define FINAL_SH (0)
+ #define MAXOUT (+32767)
+ #define MINOUT (-32768)
#else
- #define FINAL_SH (8)
- #define MAXOUT (+127)
- #define MINOUT (-128)
+ #define FINAL_SH (8)
+ #define MAXOUT (+127)
+ #define MINOUT (-128)
#endif
@@ -186,7 +186,7 @@
#define TL_TAB_LEN (13*2*TL_RES_LEN)
static signed int tl_tab[TL_TAB_LEN];
-#define ENV_QUIET (TL_TAB_LEN>>3)
+#define ENV_QUIET (TL_TAB_LEN>>3)
/* sin waveform table in 'decibel' scale */
static unsigned int sin_tab[SIN_LEN];
@@ -199,8 +199,8 @@ static unsigned int sin_tab[SIN_LEN];
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
#define SC(db) (UINT32) ( db * (4.0/ENV_STEP) )
static const UINT32 sl_table[16]={
- SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
- SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
+ SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
+ SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
};
#undef SC
@@ -239,7 +239,7 @@ static const UINT8 eg_inc[19*RATE_STEPS]={
#define O(a) (a*RATE_STEPS)
/*note that there is no O(17) in this table - it's directly in the code */
-static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
+static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
/* 32 infinite time rates */
O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
@@ -287,7 +287,7 @@ O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16)
/*mask 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0, 0 */
#define O(a) (a*1)
-static const UINT8 eg_rate_shift[32+64+32]={ /* Envelope Generator counter shifts (32 + 64 rates + 32 RKS) */
+static const UINT8 eg_rate_shift[32+64+32]={ /* Envelope Generator counter shifts (32 + 64 rates + 32 RKS) */
/* 32 infinite time rates */
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
@@ -499,15 +499,15 @@ static INT32 lfo_pm_table[128*8*32]; /* 128 combinations of 7 bits meaningful (o
#ifdef SAVE_SAMPLE
static FILE *sample[1];
- #if 1 /*save to MONO file */
+ #if 1 /*save to MONO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = lt; \
+ { signed int pom = lt; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
- #else /*save to STEREO file */
+ #else /*save to STEREO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = lt; \
+ { signed int pom = lt; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
pom = rt; \
@@ -521,97 +521,97 @@ static FILE *sample[1];
/* struct describing a single operator (SLOT) */
struct FM_SLOT
{
- INT32 *DT; /* detune :dt_tab[DT] */
- UINT8 KSR; /* key scale rate :3-KSR */
- UINT32 ar; /* attack rate */
- UINT32 d1r; /* decay rate */
- UINT32 d2r; /* sustain rate */
- UINT32 rr; /* release rate */
- UINT8 ksr; /* key scale rate :kcode>>(3-KSR) */
- UINT32 mul; /* multiple :ML_TABLE[ML] */
+ INT32 *DT; /* detune :dt_tab[DT] */
+ UINT8 KSR; /* key scale rate :3-KSR */
+ UINT32 ar; /* attack rate */
+ UINT32 d1r; /* decay rate */
+ UINT32 d2r; /* sustain rate */
+ UINT32 rr; /* release rate */
+ UINT8 ksr; /* key scale rate :kcode>>(3-KSR) */
+ UINT32 mul; /* multiple :ML_TABLE[ML] */
/* Phase Generator */
- UINT32 phase; /* phase counter */
- INT32 Incr; /* phase step */
+ UINT32 phase; /* phase counter */
+ INT32 Incr; /* phase step */
/* Envelope Generator */
- UINT8 state; /* phase type */
- UINT32 tl; /* total level: TL << 3 */
- INT32 volume; /* envelope counter */
- UINT32 sl; /* sustain level:sl_table[SL] */
- UINT32 vol_out; /* current output from EG circuit (without AM from LFO) */
-
- UINT8 eg_sh_ar; /* (attack state) */
- UINT8 eg_sel_ar; /* (attack state) */
- UINT8 eg_sh_d1r; /* (decay state) */
- UINT8 eg_sel_d1r; /* (decay state) */
- UINT8 eg_sh_d2r; /* (sustain state) */
- UINT8 eg_sel_d2r; /* (sustain state) */
- UINT8 eg_sh_rr; /* (release state) */
- UINT8 eg_sel_rr; /* (release state) */
-
- UINT8 ssg; /* SSG-EG waveform */
- UINT8 ssgn; /* SSG-EG negated output */
-
- UINT32 key; /* 0=last key was KEY OFF, 1=KEY ON */
+ UINT8 state; /* phase type */
+ UINT32 tl; /* total level: TL << 3 */
+ INT32 volume; /* envelope counter */
+ UINT32 sl; /* sustain level:sl_table[SL] */
+ UINT32 vol_out; /* current output from EG circuit (without AM from LFO) */
+
+ UINT8 eg_sh_ar; /* (attack state) */
+ UINT8 eg_sel_ar; /* (attack state) */
+ UINT8 eg_sh_d1r; /* (decay state) */
+ UINT8 eg_sel_d1r; /* (decay state) */
+ UINT8 eg_sh_d2r; /* (sustain state) */
+ UINT8 eg_sel_d2r; /* (sustain state) */
+ UINT8 eg_sh_rr; /* (release state) */
+ UINT8 eg_sel_rr; /* (release state) */
+
+ UINT8 ssg; /* SSG-EG waveform */
+ UINT8 ssgn; /* SSG-EG negated output */
+
+ UINT32 key; /* 0=last key was KEY OFF, 1=KEY ON */
/* LFO */
- UINT32 AMmask; /* AM enable flag */
+ UINT32 AMmask; /* AM enable flag */
};
struct FM_CH
{
- FM_SLOT SLOT[4]; /* four SLOTs (operators) */
+ FM_SLOT SLOT[4]; /* four SLOTs (operators) */
- UINT8 ALGO; /* algorithm */
- UINT8 FB; /* feedback shift */
- INT32 op1_out[2]; /* op1 output for feedback */
+ UINT8 ALGO; /* algorithm */
+ UINT8 FB; /* feedback shift */
+ INT32 op1_out[2]; /* op1 output for feedback */
- INT32 *connect1; /* SLOT1 output pointer */
- INT32 *connect3; /* SLOT3 output pointer */
- INT32 *connect2; /* SLOT2 output pointer */
- INT32 *connect4; /* SLOT4 output pointer */
+ INT32 *connect1; /* SLOT1 output pointer */
+ INT32 *connect3; /* SLOT3 output pointer */
+ INT32 *connect2; /* SLOT2 output pointer */
+ INT32 *connect4; /* SLOT4 output pointer */
- INT32 *mem_connect;/* where to put the delayed sample (MEM) */
- INT32 mem_value; /* delayed sample (MEM) value */
+ INT32 *mem_connect;/* where to put the delayed sample (MEM) */
+ INT32 mem_value; /* delayed sample (MEM) value */
- INT32 pms; /* channel PMS */
- UINT8 ams; /* channel AMS */
+ INT32 pms; /* channel PMS */
+ UINT8 ams; /* channel AMS */
- UINT32 fc; /* fnum,blk:adjusted to sample rate */
- UINT8 kcode; /* key code: */
- UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
+ UINT32 fc; /* fnum,blk:adjusted to sample rate */
+ UINT8 kcode; /* key code: */
+ UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
};
struct FM_ST
{
device_t *device;
- void * param; /* this chip parameter */
- int clock; /* master clock (Hz) */
- int rate; /* sampling rate (Hz) */
- double freqbase; /* frequency base */
- int timer_prescaler; /* timer prescaler */
+ void * param; /* this chip parameter */
+ int clock; /* master clock (Hz) */
+ int rate; /* sampling rate (Hz) */
+ double freqbase; /* frequency base */
+ int timer_prescaler; /* timer prescaler */
#if FM_BUSY_FLAG_SUPPORT
- TIME_TYPE busy_expiry_time; /* expiry time of the busy status */
+ TIME_TYPE busy_expiry_time; /* expiry time of the busy status */
#endif
- UINT8 address; /* address register */
- UINT8 irq; /* interrupt level */
- UINT8 irqmask; /* irq mask */
- UINT8 status; /* status flag */
- UINT32 mode; /* mode CSM / 3SLOT */
- UINT8 prescaler_sel; /* prescaler selector */
- UINT8 fn_h; /* freq latch */
- INT32 TA; /* timer a */
- INT32 TAC; /* timer a counter */
- UINT8 TB; /* timer b */
- INT32 TBC; /* timer b counter */
+ UINT8 address; /* address register */
+ UINT8 irq; /* interrupt level */
+ UINT8 irqmask; /* irq mask */
+ UINT8 status; /* status flag */
+ UINT32 mode; /* mode CSM / 3SLOT */
+ UINT8 prescaler_sel; /* prescaler selector */
+ UINT8 fn_h; /* freq latch */
+ INT32 TA; /* timer a */
+ INT32 TAC; /* timer a counter */
+ UINT8 TB; /* timer b */
+ INT32 TBC; /* timer b counter */
/* local time tables */
- INT32 dt_tab[8][32]; /* DeTune table */
+ INT32 dt_tab[8][32]; /* DeTune table */
/* Extention Timer and IRQ handler */
- FM_TIMERHANDLER timer_handler;
- FM_IRQHANDLER IRQ_Handler;
+ FM_TIMERHANDLER timer_handler;
+ FM_IRQHANDLER IRQ_Handler;
const ssg_callbacks *SSG;
};
@@ -624,50 +624,50 @@ struct FM_ST
/* OPN 3slot struct */
struct FM_3SLOT
{
- UINT32 fc[3]; /* fnum3,blk3: calculated */
- UINT8 fn_h; /* freq3 latch */
- UINT8 kcode[3]; /* key code */
- UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
+ UINT32 fc[3]; /* fnum3,blk3: calculated */
+ UINT8 fn_h; /* freq3 latch */
+ UINT8 kcode[3]; /* key code */
+ UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
};
/* OPN/A/B common state */
struct FM_OPN
{
- UINT8 type; /* chip type */
- FM_ST ST; /* general state */
- FM_3SLOT SL3; /* 3 slot mode state */
- FM_CH *P_CH; /* pointer of CH */
- unsigned int pan[6*2]; /* fm channels output masks (0xffffffff = enable) */
+ UINT8 type; /* chip type */
+ FM_ST ST; /* general state */
+ FM_3SLOT SL3; /* 3 slot mode state */
+ FM_CH *P_CH; /* pointer of CH */
+ unsigned int pan[6*2]; /* fm channels output masks (0xffffffff = enable) */
- UINT32 eg_cnt; /* global envelope generator counter */
- UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
- UINT32 eg_timer_add; /* step of eg_timer */
- UINT32 eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
+ UINT32 eg_cnt; /* global envelope generator counter */
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
+ UINT32 eg_timer_add; /* step of eg_timer */
+ UINT32 eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
- but LFO works with one more bit of a precision so we really need 4096 elements */
+ but LFO works with one more bit of a precision so we really need 4096 elements */
- UINT32 fn_table[4096]; /* fnumber->increment counter */
+ UINT32 fn_table[4096]; /* fnumber->increment counter */
UINT32 fn_max; /* maximal phase increment (used for phase overflow) */
/* LFO */
- UINT32 LFO_AM; /* runtime LFO calculations helper */
- INT32 LFO_PM; /* runtime LFO calculations helper */
+ UINT32 LFO_AM; /* runtime LFO calculations helper */
+ INT32 LFO_PM; /* runtime LFO calculations helper */
- UINT32 lfo_cnt;
- UINT32 lfo_inc;
+ UINT32 lfo_cnt;
+ UINT32 lfo_inc;
- UINT32 lfo_freq[8]; /* LFO FREQ table */
+ UINT32 lfo_freq[8]; /* LFO FREQ table */
- INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
- INT32 mem; /* one sample delay memory */
+ INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
+ INT32 mem; /* one sample delay memory */
- INT32 out_fm[8]; /* outputs of working channels */
+ INT32 out_fm[8]; /* outputs of working channels */
#if (BUILD_YM2608||BUILD_YM2610||BUILD_YM2610B)
- INT32 out_adpcm[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 ADPCM */
- INT32 out_delta[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 DELTAT*/
+ INT32 out_adpcm[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 ADPCM */
+ INT32 out_delta[4]; /* channel output NONE,LEFT,RIGHT or CENTER for YM2608/YM2610 DELTAT*/
#endif
};
@@ -757,7 +757,7 @@ INLINE void set_timers( FM_ST *ST, void *n, int v )
}
}
else
- { /* stop timer b */
+ { /* stop timer b */
if( ST->TBC != 0 )
{
ST->TBC = 0;
@@ -775,7 +775,7 @@ INLINE void set_timers( FM_ST *ST, void *n, int v )
}
}
else
- { /* stop timer a */
+ { /* stop timer a */
if( ST->TAC != 0 )
{
ST->TAC = 0;
@@ -809,23 +809,23 @@ INLINE void TimerBOver(FM_ST *ST)
/* ----- internal timer mode , update timer */
/* ---------- calculate timer A ---------- */
- #define INTERNAL_TIMER_A(ST,CSM_CH) \
- { \
- if( ST->TAC && (ST->timer_handler==0) ) \
- if( (ST->TAC -= (int)(ST->freqbase*4096)) <= 0 ) \
- { \
- TimerAOver( ST ); \
- /* CSM mode total level latch and auto key on */ \
- if( ST->mode & 0x80 ) \
- CSMKeyControll( CSM_CH ); \
- } \
+ #define INTERNAL_TIMER_A(ST,CSM_CH) \
+ { \
+ if( ST->TAC && (ST->timer_handler==0) ) \
+ if( (ST->TAC -= (int)(ST->freqbase*4096)) <= 0 ) \
+ { \
+ TimerAOver( ST ); \
+ /* CSM mode total level latch and auto key on */ \
+ if( ST->mode & 0x80 ) \
+ CSMKeyControll( CSM_CH ); \
+ } \
}
/* ---------- calculate timer B ---------- */
- #define INTERNAL_TIMER_B(ST,step) \
- { \
- if( ST->TBC && (ST->timer_handler==0) ) \
- if( (ST->TBC -= (int)(ST->freqbase*4096*step)) <= 0 ) \
- TimerBOver( ST ); \
+ #define INTERNAL_TIMER_B(ST,step) \
+ { \
+ if( ST->TBC && (ST->timer_handler==0) ) \
+ if( (ST->TBC -= (int)(ST->freqbase*4096*step)) <= 0 ) \
+ TimerBOver( ST ); \
}
#else /* FM_INTERNAL_TIMER */
/* external timer mode */
@@ -842,7 +842,7 @@ INLINE UINT8 FM_STATUS_FLAG(FM_ST *ST)
if( COMPARE_TIMES(ST->busy_expiry_time, UNDEFINED_TIME) != 0 )
{
if (COMPARE_TIMES(ST->busy_expiry_time, FM_GET_TIME_NOW(&ST->device->machine())) > 0)
- return ST->status | 0x80; /* with busy */
+ return ST->status | 0x80; /* with busy */
/* expire */
FM_BUSY_CLEAR(ST);
}
@@ -868,7 +868,7 @@ INLINE void FM_KEYON(UINT8 type, FM_CH *CH , int s )
if( !SLOT->key )
{
SLOT->key = 1;
- SLOT->phase = 0; /* restart Phase Generator */
+ SLOT->phase = 0; /* restart Phase Generator */
SLOT->ssgn = (SLOT->ssg & 0x04) >> 1;
SLOT->state = EG_ATT;
}
@@ -936,13 +936,13 @@ static void setup_connection( FM_OPN *OPN, FM_CH *CH, int ch )
*om1 = &OPN->c1;
*oc1 = carrier;
*om2 = &OPN->c2;
- *memc= &OPN->mem; /* store it anywhere where it will not be used */
+ *memc= &OPN->mem; /* store it anywhere where it will not be used */
break;
case 5:
/* +----C1----+ */
/* M1-+-MEM---M2-+-OUT */
/* +----C2----+ */
- *om1 = 0; /* special mark */
+ *om1 = 0; /* special mark */
*oc1 = carrier;
*om2 = carrier;
*memc= &OPN->m2;
@@ -955,7 +955,7 @@ static void setup_connection( FM_OPN *OPN, FM_CH *CH, int ch )
*om1 = &OPN->c1;
*oc1 = carrier;
*om2 = carrier;
- *memc= &OPN->mem; /* store it anywhere where it will not be used */
+ *memc= &OPN->mem; /* store it anywhere where it will not be used */
break;
case 7:
/* M1-+ */
@@ -966,7 +966,7 @@ static void setup_connection( FM_OPN *OPN, FM_CH *CH, int ch )
*om1 = carrier;
*oc1 = carrier;
*om2 = carrier;
- *memc= &OPN->mem; /* store it anywhere where it will not be used */
+ *memc= &OPN->mem; /* store it anywhere where it will not be used */
break;
}
@@ -1071,7 +1071,7 @@ INLINE void advance_lfo(FM_OPN *OPN)
{
UINT8 pos;
- if (OPN->lfo_inc) /* LFO enabled ? */
+ if (OPN->lfo_inc) /* LFO enabled ? */
{
OPN->lfo_cnt += OPN->lfo_inc;
@@ -1081,7 +1081,7 @@ INLINE void advance_lfo(FM_OPN *OPN)
/* update AM when LFO output changes */
/* actually I can't optimize is this way without rewriting chan_calc()
- to use chip->lfo_am instead of global lfo_am */
+ to use chip->lfo_am instead of global lfo_am */
{
/* triangle */
@@ -1124,12 +1124,12 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
switch(SLOT->state)
{
- case EG_ATT: /* attack phase */
+ case EG_ATT: /* attack phase */
if ( !(OPN->eg_cnt & ((1<<SLOT->eg_sh_ar)-1) ) )
{
SLOT->volume += (~SLOT->volume *
- (eg_inc[SLOT->eg_sel_ar + ((OPN->eg_cnt>>SLOT->eg_sh_ar)&7)])
- ) >>4;
+ (eg_inc[SLOT->eg_sel_ar + ((OPN->eg_cnt>>SLOT->eg_sh_ar)&7)])
+ ) >>4;
if (SLOT->volume <= MIN_ATT_INDEX)
{
@@ -1139,9 +1139,9 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
}
break;
- case EG_DEC: /* decay phase */
+ case EG_DEC: /* decay phase */
{
- if (SLOT->ssg&0x08) /* SSG EG type envelope selected */
+ if (SLOT->ssg&0x08) /* SSG EG type envelope selected */
{
if ( !(OPN->eg_cnt & ((1<<SLOT->eg_sh_d1r)-1) ) )
{
@@ -1164,8 +1164,8 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
}
break;
- case EG_SUS: /* sustain phase */
- if (SLOT->ssg&0x08) /* SSG EG type envelope selected */
+ case EG_SUS: /* sustain phase */
+ if (SLOT->ssg&0x08) /* SSG EG type envelope selected */
{
if ( !(OPN->eg_cnt & ((1<<SLOT->eg_sh_d2r)-1) ) )
{
@@ -1176,9 +1176,9 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
{
SLOT->volume = MAX_ATT_INDEX;
- if (SLOT->ssg&0x01) /* bit 0 = hold */
+ if (SLOT->ssg&0x01) /* bit 0 = hold */
{
- if (SLOT->ssgn&1) /* have we swapped once ??? */
+ if (SLOT->ssgn&1) /* have we swapped once ??? */
{
/* yes, so do nothing, just hold current level */
}
@@ -1220,7 +1220,7 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
}
break;
- case EG_REL: /* release phase */
+ case EG_REL: /* release phase */
if ( !(OPN->eg_cnt & ((1<<SLOT->eg_sh_rr)-1) ) )
{
/* SSG-EG affects Release phase also (Nemesis) */
@@ -1239,15 +1239,15 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
out = ((UINT32)SLOT->volume);
- /* negate output (changes come from alternate bit, init comes from attack bit) */
+ /* negate output (changes come from alternate bit, init comes from attack bit) */
if ((SLOT->ssg&0x08) && (SLOT->ssgn&2) && (SLOT->state > EG_REL))
out ^= MAX_ATT_INDEX;
/* we need to store the result here because we are going to change ssgn
- in next instruction */
+ in next instruction */
SLOT->vol_out = out + SLOT->tl;
- /* reverse SLOT inversion flag */
+ /* reverse SLOT inversion flag */
SLOT->ssgn ^= swap_flag;
SLOT++;
@@ -1303,19 +1303,19 @@ INLINE void update_phase_lfo_channel(FM_OPN *OPN, FM_CH *CH)
if (lfo_fn_table_index_offset) /* LFO phase modulation active */
{
- UINT8 blk;
- UINT32 fn;
+ UINT8 blk;
+ UINT32 fn;
int kc, fc, finc;
block_fnum = block_fnum*2 + lfo_fn_table_index_offset;
- blk = (block_fnum&0x7000) >> 12;
- fn = block_fnum & 0xfff;
+ blk = (block_fnum&0x7000) >> 12;
+ fn = block_fnum & 0xfff;
/* keyscale code */
- kc = (blk<<2) | opn_fktable[fn >> 8];
+ kc = (blk<<2) | opn_fktable[fn >> 8];
- /* phase increment counter */
+ /* phase increment counter */
fc = (OPN->fn_table[fn]>>(7-blk));
/* detects frequency overflow (credits to Nemesis) */
@@ -1338,10 +1338,10 @@ INLINE void update_phase_lfo_channel(FM_OPN *OPN, FM_CH *CH)
}
else /* LFO phase modulation = zero */
{
- CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr;
- CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr;
- CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr;
- CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr;
+ CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr;
+ CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr;
+ CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr;
+ CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr;
}
}
@@ -1354,7 +1354,7 @@ INLINE void chan_calc(FM_OPN *OPN, FM_CH *CH, int chnum)
OPN->m2 = OPN->c1 = OPN->c2 = OPN->mem = 0;
- *CH->mem_connect = CH->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
+ *CH->mem_connect = CH->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
eg_out = volume_calc(&CH->SLOT[SLOT1]);
{
@@ -1373,7 +1373,7 @@ INLINE void chan_calc(FM_OPN *OPN, FM_CH *CH, int chnum)
}
CH->op1_out[1] = 0;
- if( eg_out < ENV_QUIET ) /* SLOT 1 */
+ if( eg_out < ENV_QUIET ) /* SLOT 1 */
{
if (!CH->FB)
out=0;
@@ -1383,15 +1383,15 @@ INLINE void chan_calc(FM_OPN *OPN, FM_CH *CH, int chnum)
}
eg_out = volume_calc(&CH->SLOT[SLOT3]);
- if( eg_out < ENV_QUIET ) /* SLOT 3 */
+ if( eg_out < ENV_QUIET ) /* SLOT 3 */
*CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, OPN->m2);
eg_out = volume_calc(&CH->SLOT[SLOT2]);
- if( eg_out < ENV_QUIET ) /* SLOT 2 */
+ if( eg_out < ENV_QUIET ) /* SLOT 2 */
*CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, OPN->c1);
eg_out = volume_calc(&CH->SLOT[SLOT4]);
- if( eg_out < ENV_QUIET ) /* SLOT 4 */
+ if( eg_out < ENV_QUIET ) /* SLOT 4 */
*CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, OPN->c2);
@@ -1404,14 +1404,14 @@ INLINE void chan_calc(FM_OPN *OPN, FM_CH *CH, int chnum)
/* add support for 3 slot mode */
if ((OPN->ST.mode & 0xC0) && (chnum == 2))
{
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT1], CH->pms, OPN->SL3.block_fnum[1]);
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT2], CH->pms, OPN->SL3.block_fnum[2]);
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT3], CH->pms, OPN->SL3.block_fnum[0]);
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT4], CH->pms, CH->block_fnum);
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT1], CH->pms, OPN->SL3.block_fnum[1]);
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT2], CH->pms, OPN->SL3.block_fnum[2]);
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT3], CH->pms, OPN->SL3.block_fnum[0]);
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT4], CH->pms, CH->block_fnum);
}
else update_phase_lfo_channel(OPN, CH);
}
- else /* no LFO phase modulation */
+ else /* no LFO phase modulation */
{
CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr;
CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr;
@@ -1482,7 +1482,7 @@ static void init_timetables( FM_ST *ST , const UINT8 *dttable )
#if 0
logerror("FM.C: samplerate=%8i chip clock=%8i freqbase=%f \n",
- ST->rate, ST->clock, ST->freqbase );
+ ST->rate, ST->clock, ST->freqbase );
#endif
/* DeTune table */
@@ -1506,7 +1506,7 @@ static void reset_channels( FM_ST *ST , FM_CH *CH , int num )
{
int c,s;
- ST->mode = 0; /* normal mode */
+ ST->mode = 0; /* normal mode */
ST->TA = 0;
ST->TAC = 0;
ST->TB = 0;
@@ -1541,14 +1541,14 @@ static int init_tables(void)
/* we never reach (1<<16) here due to the (x+1) */
/* result fits within 16 bits at maximum */
- n = (int)m; /* 16 bits here */
- n >>= 4; /* 12 bits here */
- if (n&1) /* round to nearest */
+ n = (int)m; /* 16 bits here */
+ n >>= 4; /* 12 bits here */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
/* 11 bits here (rounded) */
- n <<= 2; /* 13 bits here (as in real chip) */
+ n <<= 2; /* 13 bits here (as in real chip) */
tl_tab[ x*2 + 0 ] = n;
tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
@@ -1575,14 +1575,14 @@ static int init_tables(void)
/* we never reach zero here due to ((i*2)+1) */
if (m>0.0)
- o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
else
- o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
o = o / (ENV_STEP/4);
n = (int)(2.0*o);
- if (n&1) /* round to nearest */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
@@ -1751,7 +1751,7 @@ static void OPNSetPres(FM_OPN *OPN, int pres, int timer_prescaler, int SSGpres)
init_timetables( &OPN->ST, dt_tab );
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
- but LFO works with one more bit of a precision so we really need 4096 elements */
+ but LFO works with one more bit of a precision so we really need 4096 elements */
/* calculate fnumber -> increment counter table */
for(i = 0; i < 4096; i++)
{
@@ -1760,7 +1760,7 @@ static void OPNSetPres(FM_OPN *OPN, int pres, int timer_prescaler, int SSGpres)
OPN->fn_table[i] = (UINT32)( (double)i * 32 * OPN->ST.freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
#if 0
logerror("FM.C: fn_table[%4i] = %08x (dec=%8i)\n",
- i, OPN->fn_table[i]>>6,OPN->fn_table[i]>>6 );
+ i, OPN->fn_table[i]>>6,OPN->fn_table[i]>>6 );
#endif
}
@@ -1775,7 +1775,7 @@ static void OPNSetPres(FM_OPN *OPN, int pres, int timer_prescaler, int SSGpres)
OPN->lfo_freq[i] = (1.0 / lfo_samples_per_step[i]) * (1<<LFO_SH) * OPN->ST.freqbase;
#if 0
logerror("FM.C: lfo_freq[%i] = %08x (dec=%8i)\n",
- i, OPN->lfo_freq[i],OPN->lfo_freq[i] );
+ i, OPN->lfo_freq[i],OPN->lfo_freq[i] );
#endif
}
}
@@ -1790,9 +1790,9 @@ static void OPNWriteMode(FM_OPN *OPN, int r, int v)
switch(r)
{
- case 0x21: /* Test */
+ case 0x21: /* Test */
break;
- case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/YM2612) */
+ case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/YM2612) */
if( OPN->type & TYPE_LFOPAN )
{
if (v&0x08) /* LFO enabled ? */
@@ -1805,19 +1805,19 @@ static void OPNWriteMode(FM_OPN *OPN, int r, int v)
}
}
break;
- case 0x24: /* timer A High 8*/
+ case 0x24: /* timer A High 8*/
OPN->ST.TA = (OPN->ST.TA & 0x03)|(((int)v)<<2);
break;
- case 0x25: /* timer A Low 2*/
+ case 0x25: /* timer A Low 2*/
OPN->ST.TA = (OPN->ST.TA & 0x3fc)|(v&3);
break;
- case 0x26: /* timer B */
+ case 0x26: /* timer B */
OPN->ST.TB = v;
break;
- case 0x27: /* mode, timer control */
+ case 0x27: /* mode, timer control */
set_timers( &(OPN->ST),OPN->ST.param,v );
break;
- case 0x28: /* key on / off */
+ case 0x28: /* key on / off */
c = v & 0x03;
if( c == 3 ) break;
if( (v&0x04) && (OPN->type & TYPE_6CH) ) c+=3;
@@ -1850,19 +1850,19 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
switch( r & 0xf0 )
{
- case 0x30: /* DET , MUL */
+ case 0x30: /* DET , MUL */
set_det_mul(&OPN->ST,CH,SLOT,v);
break;
- case 0x40: /* TL */
+ case 0x40: /* TL */
set_tl(CH,SLOT,v);
break;
- case 0x50: /* KS, AR */
+ case 0x50: /* KS, AR */
set_ar_ksr(OPN->type,CH,SLOT,v);
break;
- case 0x60: /* bit7 = AM ENABLE, DR */
+ case 0x60: /* bit7 = AM ENABLE, DR */
set_dr(OPN->type, SLOT,v);
if(OPN->type & TYPE_LFOPAN) /* YM2608/2610/2610B/2612 */
@@ -1871,91 +1871,91 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
}
break;
- case 0x70: /* SR */
+ case 0x70: /* SR */
set_sr(OPN->type,SLOT,v);
break;
- case 0x80: /* SL, RR */
+ case 0x80: /* SL, RR */
set_sl_rr(OPN->type,SLOT,v);
break;
- case 0x90: /* SSG-EG */
+ case 0x90: /* SSG-EG */
SLOT->ssg = v&0x0f;
SLOT->ssgn = (v&0x04)>>1; /* bit 1 in ssgn = attack */
/* SSG-EG envelope shapes :
- E AtAlH
- 1 0 0 0 \\\\
+ E AtAlH
+ 1 0 0 0 \\\\
- 1 0 0 1 \___
+ 1 0 0 1 \___
- 1 0 1 0 \/\/
- ___
- 1 0 1 1 \
+ 1 0 1 0 \/\/
+ ___
+ 1 0 1 1 \
- 1 1 0 0 ////
- ___
- 1 1 0 1 /
+ 1 1 0 0 ////
+ ___
+ 1 1 0 1 /
- 1 1 1 0 /\/\
+ 1 1 1 0 /\/\
- 1 1 1 1 /___
+ 1 1 1 1 /___
- E = SSG-EG enable
+ E = SSG-EG enable
- The shapes are generated using Attack, Decay and Sustain phases.
+ The shapes are generated using Attack, Decay and Sustain phases.
- Each single character in the diagrams above represents this whole
- sequence:
+ Each single character in the diagrams above represents this whole
+ sequence:
- - when KEY-ON = 1, normal Attack phase is generated (*without* any
- difference when compared to normal mode),
+ - when KEY-ON = 1, normal Attack phase is generated (*without* any
+ difference when compared to normal mode),
- - later, when envelope level reaches minimum level (max volume),
- the EG switches to Decay phase (which works with bigger steps
- when compared to normal mode - see below),
+ - later, when envelope level reaches minimum level (max volume),
+ the EG switches to Decay phase (which works with bigger steps
+ when compared to normal mode - see below),
- - later when envelope level passes the SL level,
- the EG swithes to Sustain phase (which works with bigger steps
- when compared to normal mode - see below),
+ - later when envelope level passes the SL level,
+ the EG swithes to Sustain phase (which works with bigger steps
+ when compared to normal mode - see below),
- - finally when envelope level reaches maximum level (min volume),
- the EG switches to Attack phase again (depends on actual waveform).
+ - finally when envelope level reaches maximum level (min volume),
+ the EG switches to Attack phase again (depends on actual waveform).
- Important is that when switch to Attack phase occurs, the phase counter
- of that operator will be zeroed-out (as in normal KEY-ON) but not always.
- (I havent found the rule for that - perhaps only when the output level is low)
+ Important is that when switch to Attack phase occurs, the phase counter
+ of that operator will be zeroed-out (as in normal KEY-ON) but not always.
+ (I havent found the rule for that - perhaps only when the output level is low)
- The difference (when compared to normal Envelope Generator mode) is
- that the resolution in Decay and Sustain phases is 4 times lower;
- this results in only 256 steps instead of normal 1024.
- In other words:
- when SSG-EG is disabled, the step inside of the EG is one,
- when SSG-EG is enabled, the step is four (in Decay and Sustain phases).
+ The difference (when compared to normal Envelope Generator mode) is
+ that the resolution in Decay and Sustain phases is 4 times lower;
+ this results in only 256 steps instead of normal 1024.
+ In other words:
+ when SSG-EG is disabled, the step inside of the EG is one,
+ when SSG-EG is enabled, the step is four (in Decay and Sustain phases).
- Times between the level changes are the same in both modes.
+ Times between the level changes are the same in both modes.
- Important:
- Decay 1 Level (so called SL) is compared to actual SSG-EG output, so
- it is the same in both SSG and no-SSG modes, with this exception:
+ Important:
+ Decay 1 Level (so called SL) is compared to actual SSG-EG output, so
+ it is the same in both SSG and no-SSG modes, with this exception:
- when the SSG-EG is enabled and is generating raising levels
- (when the EG output is inverted) the SL will be found at wrong level !!!
- For example, when SL=02:
- 0 -6 = -6dB in non-inverted EG output
- 96-6 = -90dB in inverted EG output
- Which means that EG compares its level to SL as usual, and that the
- output is simply inverted afterall.
+ when the SSG-EG is enabled and is generating raising levels
+ (when the EG output is inverted) the SL will be found at wrong level !!!
+ For example, when SL=02:
+ 0 -6 = -6dB in non-inverted EG output
+ 96-6 = -90dB in inverted EG output
+ Which means that EG compares its level to SL as usual, and that the
+ output is simply inverted afterall.
- The Yamaha's manuals say that AR should be set to 0x1f (max speed).
- That is not necessary, but then EG will be generating Attack phase.
+ The Yamaha's manuals say that AR should be set to 0x1f (max speed).
+ That is not necessary, but then EG will be generating Attack phase.
- */
+ */
break;
@@ -1963,7 +1963,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
case 0xa0:
switch( OPN_SLOT(r) )
{
- case 0: /* 0xa0-0xa2 : FNUM1 */
+ case 0: /* 0xa0-0xa2 : FNUM1 */
{
UINT32 fn = (((UINT32)( (OPN->ST.fn_h)&7))<<8) + v;
UINT8 blk = OPN->ST.fn_h>>3;
@@ -1978,10 +1978,10 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
CH->SLOT[SLOT1].Incr=-1;
}
break;
- case 1: /* 0xa4-0xa6 : FNUM2,BLK */
+ case 1: /* 0xa4-0xa6 : FNUM2,BLK */
OPN->ST.fn_h = v&0x3f;
break;
- case 2: /* 0xa8-0xaa : 3CH FNUM1 */
+ case 2: /* 0xa8-0xaa : 3CH FNUM1 */
if(r < 0x100)
{
UINT32 fn = (((UINT32)(OPN->SL3.fn_h&7))<<8) + v;
@@ -1994,7 +1994,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
(OPN->P_CH)[2].SLOT[SLOT1].Incr=-1;
}
break;
- case 3: /* 0xac-0xae : 3CH FNUM2,BLK */
+ case 3: /* 0xac-0xae : 3CH FNUM2,BLK */
if(r < 0x100)
OPN->SL3.fn_h = v&0x3f;
break;
@@ -2004,7 +2004,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
case 0xb0:
switch( OPN_SLOT(r) )
{
- case 0: /* 0xb0-0xb2 : FB,ALGO */
+ case 0: /* 0xb0-0xb2 : FB,ALGO */
{
int feedback = (v>>3)&7;
CH->ALGO = v&7;
@@ -2012,7 +2012,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
setup_connection( OPN, CH, c );
}
break;
- case 1: /* 0xb4-0xb6 : L , R , AMS , PMS (YM2612/YM2610B/YM2610/YM2608) */
+ case 1: /* 0xb4-0xb6 : L , R , AMS , PMS (YM2612/YM2610B/YM2610/YM2608) */
if( OPN->type & TYPE_LFOPAN)
{
/* b0-2 PMS */
@@ -2060,24 +2060,24 @@ static void OPNPrescaler_w(FM_OPN *OPN , int addr, int pre_divider)
switch(addr)
{
- case 0: /* when reset */
+ case 0: /* when reset */
OPN->ST.prescaler_sel = 2;
break;
- case 1: /* when postload */
+ case 1: /* when postload */
break;
- case 0x2d: /* divider sel : select 1/1 for 1/3line */
+ case 0x2d: /* divider sel : select 1/1 for 1/3line */
OPN->ST.prescaler_sel |= 0x02;
break;
- case 0x2e: /* divider sel , select 1/3line for output */
+ case 0x2e: /* divider sel , select 1/3line for output */
OPN->ST.prescaler_sel |= 0x01;
break;
- case 0x2f: /* divider sel , clear both selector to 1/2,1/2 */
+ case 0x2f: /* divider sel , clear both selector to 1/2,1/2 */
OPN->ST.prescaler_sel = 0;
break;
}
sel = OPN->ST.prescaler_sel & 3;
/* update prescaler */
- OPNSetPres( OPN, opn_pres[sel]*pre_divider,
+ OPNSetPres( OPN, opn_pres[sel]*pre_divider,
opn_pres[sel]*pre_divider,
ssg_pres[sel]*pre_divider );
}
@@ -2091,9 +2091,9 @@ static void OPNPrescaler_w(FM_OPN *OPN , int addr, int pre_divider)
/* here's the virtual YM2203(OPN) */
struct YM2203
{
- UINT8 REGS[256]; /* registers */
- FM_OPN OPN; /* OPN state */
- FM_CH CH[3]; /* channel state */
+ UINT8 REGS[256]; /* registers */
+ FM_OPN OPN; /* OPN state */
+ FM_CH CH[3]; /* channel state */
};
/* Generate samples for one of the YM2203s */
@@ -2103,7 +2103,7 @@ void ym2203_update_one(void *chip, FMSAMPLE *buffer, int length)
FM_OPN *OPN = &F2203->OPN;
int i;
FMSAMPLE *buf = buffer;
- FM_CH *cch[3];
+ FM_CH *cch[3];
cch[0] = &F2203->CH[0];
cch[1] = &F2203->CH[1];
@@ -2259,7 +2259,7 @@ static void YM2203_save_state(YM2203 *F2203, device_t *device)
'rate' is sampling rate
*/
void * ym2203_init(void *param, device_t *device, int clock, int rate,
- FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
+ FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
{
YM2203 *F2203;
@@ -2305,7 +2305,7 @@ int ym2203_write(void *chip,int a,UINT8 v)
FM_OPN *OPN = &F2203->OPN;
if( !(a&1) )
- { /* address port */
+ { /* address port */
OPN->ST.address = (v &= 0xff);
/* Write register to SSG emulator */
@@ -2316,21 +2316,21 @@ int ym2203_write(void *chip,int a,UINT8 v)
OPNPrescaler_w(OPN , v , 1);
}
else
- { /* data port */
+ { /* data port */
int addr = OPN->ST.address;
F2203->REGS[addr] = v;
switch( addr & 0xf0 )
{
- case 0x00: /* 0x00-0x0f : SSG section */
+ case 0x00: /* 0x00-0x0f : SSG section */
/* Write data to SSG emulator */
(*OPN->ST.SSG->write)(OPN->ST.param,a,v);
break;
- case 0x20: /* 0x20-0x2f : Mode section */
+ case 0x20: /* 0x20-0x2f : Mode section */
ym2203_update_req(OPN->ST.param);
/* write register */
OPNWriteMode(OPN,addr,v);
break;
- default: /* 0x30-0xff : OPN section */
+ default: /* 0x30-0xff : OPN section */
ym2203_update_req(OPN->ST.param);
/* write register */
OPNWriteReg(OPN,addr,v);
@@ -2347,11 +2347,11 @@ UINT8 ym2203_read(void *chip,int a)
UINT8 ret = 0;
if( !(a&1) )
- { /* status port */
+ { /* status port */
ret = FM_STATUS_FLAG(&F2203->OPN.ST);
}
else
- { /* data port (only SSG) */
+ { /* data port (only SSG) */
if( addr < 16 ) ret = (*F2203->OPN.ST.SSG->read)(F2203->OPN.ST.param);
}
return ret;
@@ -2362,17 +2362,17 @@ int ym2203_timer_over(void *chip,int c)
YM2203 *F2203 = (YM2203 *)chip;
if( c )
- { /* Timer B */
+ { /* Timer B */
TimerBOver( &(F2203->OPN.ST) );
}
else
- { /* Timer A */
+ { /* Timer A */
ym2203_update_req(F2203->OPN.ST.param);
/* timer update */
TimerAOver( &(F2203->OPN.ST) );
/* CSM mode key,TL control */
if( F2203->OPN.ST.mode & 0x80 )
- { /* CSM mode auto key on */
+ { /* CSM mode auto key on */
CSMKeyControll( F2203->OPN.type, &(F2203->CH[2]) );
}
}
@@ -2387,42 +2387,42 @@ int ym2203_timer_over(void *chip,int c)
/* ADPCM type A channel struct */
struct ADPCM_CH
{
- UINT8 flag; /* port state */
- UINT8 flagMask; /* arrived flag mask */
- UINT8 now_data; /* current ROM data */
- UINT32 now_addr; /* current ROM address */
- UINT32 now_step;
- UINT32 step;
- UINT32 start; /* sample data start address*/
- UINT32 end; /* sample data end address */
- UINT8 IL; /* Instrument Level */
- INT32 adpcm_acc; /* accumulator */
- INT32 adpcm_step; /* step */
- INT32 adpcm_out; /* (speedup) hiro-shi!! */
- INT8 vol_mul; /* volume in "0.75dB" steps */
- UINT8 vol_shift; /* volume in "-6dB" steps */
- INT32 *pan; /* &out_adpcm[OPN_xxxx] */
+ UINT8 flag; /* port state */
+ UINT8 flagMask; /* arrived flag mask */
+ UINT8 now_data; /* current ROM data */
+ UINT32 now_addr; /* current ROM address */
+ UINT32 now_step;
+ UINT32 step;
+ UINT32 start; /* sample data start address*/
+ UINT32 end; /* sample data end address */
+ UINT8 IL; /* Instrument Level */
+ INT32 adpcm_acc; /* accumulator */
+ INT32 adpcm_step; /* step */
+ INT32 adpcm_out; /* (speedup) hiro-shi!! */
+ INT8 vol_mul; /* volume in "0.75dB" steps */
+ UINT8 vol_shift; /* volume in "-6dB" steps */
+ INT32 *pan; /* &out_adpcm[OPN_xxxx] */
};
/* here's the virtual YM2610 */
struct YM2610
{
- UINT8 REGS[512]; /* registers */
- FM_OPN OPN; /* OPN state */
- FM_CH CH[6]; /* channel state */
- UINT8 addr_A1; /* address line A1 */
+ UINT8 REGS[512]; /* registers */
+ FM_OPN OPN; /* OPN state */
+ FM_CH CH[6]; /* channel state */
+ UINT8 addr_A1; /* address line A1 */
/* ADPCM-A unit */
- const UINT8 *pcmbuf; /* pcm rom buffer */
- UINT32 pcm_size; /* size of pcm rom */
- UINT8 adpcmTL; /* adpcmA total level */
- ADPCM_CH adpcm[6]; /* adpcm channels */
- UINT32 adpcmreg[0x30]; /* registers */
- UINT8 adpcm_arrivedEndAddress;
- YM_DELTAT deltaT; /* Delta-T ADPCM unit */
-
- UINT8 flagmask; /* YM2608 only */
- UINT8 irqmask; /* YM2608 only */
+ const UINT8 *pcmbuf; /* pcm rom buffer */
+ UINT32 pcm_size; /* size of pcm rom */
+ UINT8 adpcmTL; /* adpcmA total level */
+ ADPCM_CH adpcm[6]; /* adpcm channels */
+ UINT32 adpcmreg[0x30]; /* registers */
+ UINT8 adpcm_arrivedEndAddress;
+ YM_DELTAT deltaT; /* Delta-T ADPCM unit */
+
+ UINT8 flagmask; /* YM2608 only */
+ UINT8 irqmask; /* YM2608 only */
};
/* here is the virtual YM2608 */
@@ -2438,9 +2438,9 @@ typedef YM2610 YM2608;
/* usual ADPCM table (16 * 1.1^N) */
static const int steps[49] =
{
- 16, 17, 19, 21, 23, 25, 28,
- 31, 34, 37, 41, 45, 50, 55,
- 60, 66, 73, 80, 88, 97, 107,
+ 16, 17, 19, 21, 23, 25, 28,
+ 31, 34, 37, 41, 45, 50, 55,
+ 60, 66, 73, 80, 88, 97, 107,
118, 130, 143, 157, 173, 190, 209,
230, 253, 279, 307, 337, 371, 408,
449, 494, 544, 598, 658, 724, 796,
@@ -2487,7 +2487,7 @@ INLINE void ADPCMA_calc_chan( YM2610 *F2610, ADPCM_CH *ch )
/* YM2610 checks lower 20 bits only, the 4 MSB bits are sample bank */
/* Here we use 1<<21 to compensate for nibble calculations */
- if ( (ch->now_addr & ((1<<21)-1)) == ((ch->end<<1) & ((1<<21)-1)) )
+ if ( (ch->now_addr & ((1<<21)-1)) == ((ch->end<<1) & ((1<<21)-1)) )
{
ch->flag = 0;
F2610->adpcm_arrivedEndAddress |= ch->flagMask;
@@ -2524,7 +2524,7 @@ INLINE void ADPCMA_calc_chan( YM2610 *F2610, ADPCM_CH *ch )
}while(--step);
/* calc pcm * volume data */
- ch->adpcm_out = ((ch->adpcm_acc * ch->vol_mul) >> ch->vol_shift) & ~3; /* multiply, shift and mask out 2 LSB bits */
+ ch->adpcm_out = ((ch->adpcm_acc * ch->vol_mul) >> ch->vol_shift) & ~3; /* multiply, shift and mask out 2 LSB bits */
}
/* output for work of output channels (out_adpcm[OPNxxxx])*/
@@ -2558,18 +2558,18 @@ static void FM_ADPCMAWrite(YM2610 *F2610,int r,int v)
adpcm[c].flag = 1;
if(F2610->pcmbuf==NULL)
- { /* Check ROM Mapped */
+ { /* Check ROM Mapped */
logerror("YM2608-YM2610: ADPCM-A rom not mapped\n");
adpcm[c].flag = 0;
}
else
{
if(adpcm[c].end >= F2610->pcm_size)
- { /* Check End in Range */
+ { /* Check End in Range */
logerror("YM2610: ADPCM-A end out of range: $%08x\n",adpcm[c].end);
/*adpcm[c].end = F2610->pcm_size-1;*/ /* JB: DO NOT uncomment this, otherwise you will break the comparison in the ADPCM_CALC_CHA() */
}
- if(adpcm[c].start >= F2610->pcm_size) /* Check Start in Range */
+ if(adpcm[c].start >= F2610->pcm_size) /* Check Start in Range */
{
logerror("YM2608-YM2610: ADPCM-A start out of range: $%08x\n",adpcm[c].start);
adpcm[c].flag = 0;
@@ -2586,25 +2586,25 @@ static void FM_ADPCMAWrite(YM2610 *F2610,int r,int v)
adpcm[c].flag = 0;
}
break;
- case 0x01: /* B0-5 = TL */
+ case 0x01: /* B0-5 = TL */
F2610->adpcmTL = (v & 0x3f) ^ 0x3f;
for( c = 0; c < 6; c++ )
{
int volume = F2610->adpcmTL + adpcm[c].IL;
- if ( volume >= 63 ) /* This is correct, 63 = quiet */
+ if ( volume >= 63 ) /* This is correct, 63 = quiet */
{
adpcm[c].vol_mul = 0;
adpcm[c].vol_shift = 0;
}
else
{
- adpcm[c].vol_mul = 15 - (volume & 7); /* so called 0.75 dB */
- adpcm[c].vol_shift = 1 + (volume >> 3); /* Yamaha engineers used the approximation: each -6 dB is close to divide by two (shift right) */
+ adpcm[c].vol_mul = 15 - (volume & 7); /* so called 0.75 dB */
+ adpcm[c].vol_shift = 1 + (volume >> 3); /* Yamaha engineers used the approximation: each -6 dB is close to divide by two (shift right) */
}
/* calc pcm * volume data */
- adpcm[c].adpcm_out = ((adpcm[c].adpcm_acc * adpcm[c].vol_mul) >> adpcm[c].vol_shift) & ~3; /* multiply, shift and mask out low 2 bits */
+ adpcm[c].adpcm_out = ((adpcm[c].adpcm_acc * adpcm[c].vol_mul) >> adpcm[c].vol_shift) & ~3; /* multiply, shift and mask out low 2 bits */
}
break;
default:
@@ -2612,7 +2612,7 @@ static void FM_ADPCMAWrite(YM2610 *F2610,int r,int v)
if( c >= 0x06 ) return;
switch( r&0x38 )
{
- case 0x08: /* B7=L,B6=R, B4-0=IL */
+ case 0x08: /* B7=L,B6=R, B4-0=IL */
{
int volume;
@@ -2620,21 +2620,21 @@ static void FM_ADPCMAWrite(YM2610 *F2610,int r,int v)
volume = F2610->adpcmTL + adpcm[c].IL;
- if ( volume >= 63 ) /* This is correct, 63 = quiet */
+ if ( volume >= 63 ) /* This is correct, 63 = quiet */
{
adpcm[c].vol_mul = 0;
adpcm[c].vol_shift = 0;
}
else
{
- adpcm[c].vol_mul = 15 - (volume & 7); /* so called 0.75 dB */
- adpcm[c].vol_shift = 1 + (volume >> 3); /* Yamaha engineers used the approximation: each -6 dB is close to divide by two (shift right) */
+ adpcm[c].vol_mul = 15 - (volume & 7); /* so called 0.75 dB */
+ adpcm[c].vol_shift = 1 + (volume >> 3); /* Yamaha engineers used the approximation: each -6 dB is close to divide by two (shift right) */
}
adpcm[c].pan = &F2610->OPN.out_adpcm[(v>>6)&0x03];
/* calc pcm * volume data */
- adpcm[c].adpcm_out = ((adpcm[c].adpcm_acc * adpcm[c].vol_mul) >> adpcm[c].vol_shift) & ~3; /* multiply, shift and mask out low 2 bits */
+ adpcm[c].adpcm_out = ((adpcm[c].adpcm_acc * adpcm[c].vol_mul) >> adpcm[c].vol_shift) & ~3; /* multiply, shift and mask out low 2 bits */
}
break;
case 0x10:
@@ -3239,11 +3239,11 @@ static const unsigned char YM2608_ADPCM_ROM[0x2000] = {
INLINE void YM2608IRQFlagWrite(FM_OPN *OPN, YM2608 *F2608, int v)
{
if( v & 0x80 )
- { /* Reset IRQ flag */
+ { /* Reset IRQ flag */
FM_STATUS_RESET(&OPN->ST, 0xf7); /* don't touch BUFRDY flag otherwise we'd have to call ymdeltat module to set the flag back */
}
else
- { /* Set status flag mask */
+ { /* Set status flag mask */
F2608->flagmask = (~(v&0x1f));
FM_IRQMASK_SET(&OPN->ST, (F2608->irqmask & F2608->flagmask) );
}
@@ -3256,9 +3256,9 @@ INLINE void YM2608IRQMaskWrite(FM_OPN *OPN, YM2608 *F2608, int v)
/* extend 3ch. enable/disable */
if(v&0x80)
- OPN->type |= TYPE_6CH; /* OPNA mode - 6 FM channels */
+ OPN->type |= TYPE_6CH; /* OPNA mode - 6 FM channels */
else
- OPN->type &= ~TYPE_6CH; /* OPN mode - 3 FM channels */
+ OPN->type &= ~TYPE_6CH; /* OPN mode - 3 FM channels */
/* IRQ MASK store and set */
F2608->irqmask = v&0x1f;
@@ -3273,7 +3273,7 @@ void ym2608_update_one(void *chip, FMSAMPLE **buffer, int length)
YM_DELTAT *DELTAT = &F2608->deltaT;
int i,j;
FMSAMPLE *bufL,*bufR;
- FM_CH *cch[6];
+ FM_CH *cch[6];
INT32 *out_fm = OPN->out_fm;
/* set bufer */
@@ -3367,7 +3367,7 @@ void ym2608_update_one(void *chip, FMSAMPLE **buffer, int length)
rt = OPN->out_adpcm[OUTD_RIGHT] + OPN->out_adpcm[OUTD_CENTER];
lt += (OPN->out_delta[OUTD_LEFT] + OPN->out_delta[OUTD_CENTER])>>9;
rt += (OPN->out_delta[OUTD_RIGHT] + OPN->out_delta[OUTD_CENTER])>>9;
- lt += ((out_fm[0]>>1) & OPN->pan[0]); /* shift right verified on real YM2608 */
+ lt += ((out_fm[0]>>1) & OPN->pan[0]); /* shift right verified on real YM2608 */
rt += ((out_fm[0]>>1) & OPN->pan[1]);
lt += ((out_fm[1]>>1) & OPN->pan[2]);
rt += ((out_fm[1]>>1) & OPN->pan[3]);
@@ -3481,8 +3481,8 @@ static void YM2608_deltat_status_reset(void *chip, UINT8 changebits)
}
/* YM2608(OPNA) */
void * ym2608_init(void *param, device_t *device, int clock, int rate,
- void *pcmrom,int pcmsize,
- FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
+ void *pcmrom,int pcmsize,
+ FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
{
YM2608 *F2608;
@@ -3511,15 +3511,15 @@ void * ym2608_init(void *param, device_t *device, int clock, int rate,
F2608->deltaT.memory = (UINT8 *)pcmrom;
F2608->deltaT.memory_size = pcmsize;
- /*F2608->deltaT.write_time = 20.0 / clock;*/ /* a single byte write takes 20 cycles of main clock */
- /*F2608->deltaT.read_time = 18.0 / clock;*/ /* a single byte read takes 18 cycles of main clock */
+ /*F2608->deltaT.write_time = 20.0 / clock;*/ /* a single byte write takes 20 cycles of main clock */
+ /*F2608->deltaT.read_time = 18.0 / clock;*/ /* a single byte read takes 18 cycles of main clock */
F2608->deltaT.status_set_handler = YM2608_deltat_status_set;
F2608->deltaT.status_reset_handler = YM2608_deltat_status_reset;
F2608->deltaT.status_change_which_chip = F2608;
- F2608->deltaT.status_change_EOS_bit = 0x04; /* status flag: set bit2 on End Of Sample */
- F2608->deltaT.status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY */
- F2608->deltaT.status_change_ZERO_bit = 0x10; /* status flag: set bit4 if silence continues for more than 290 miliseconds while recording the ADPCM */
+ F2608->deltaT.status_change_EOS_bit = 0x04; /* status flag: set bit2 on End Of Sample */
+ F2608->deltaT.status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY */
+ F2608->deltaT.status_change_ZERO_bit = 0x10; /* status flag: set bit4 if silence continues for more than 290 miliseconds while recording the ADPCM */
/* ADPCM Rhythm */
F2608->pcmbuf = YM2608_ADPCM_ROM;
@@ -3560,13 +3560,13 @@ void ym2608_reset_chip(void *chip)
FM_BUSY_CLEAR(&OPN->ST);
/* register 0x29 - default value after reset is:
- enable only 3 FM channels and enable all the status flags */
- YM2608IRQMaskWrite(OPN, F2608, 0x1f ); /* default value for D4-D0 is 1 */
+ enable only 3 FM channels and enable all the status flags */
+ YM2608IRQMaskWrite(OPN, F2608, 0x1f ); /* default value for D4-D0 is 1 */
/* register 0x10, A1=1 - default value is 1 for D4, D3, D2, 0 for the rest */
- YM2608IRQFlagWrite(OPN, F2608, 0x1c ); /* default: enable timer A and B, disable EOS, BRDY and ZERO */
+ YM2608IRQFlagWrite(OPN, F2608, 0x1c ); /* default: enable timer A and B, disable EOS, BRDY and ZERO */
- OPNWriteMode(OPN,0x27,0x30); /* mode 0 , timer reset */
+ OPNWriteMode(OPN,0x27,0x30); /* mode 0 , timer reset */
OPN->eg_timer = 0;
OPN->eg_cnt = 0;
@@ -3590,9 +3590,9 @@ void ym2608_reset_chip(void *chip)
/* ADPCM - percussion sounds */
for( i = 0; i < 6; i++ )
{
- if (i<=3) /* channels 0,1,2,3 */
+ if (i<=3) /* channels 0,1,2,3 */
F2608->adpcm[i].step = (UINT32)((float)(1<<ADPCM_SHIFT)*((float)F2608->OPN.ST.freqbase)/3.0);
- else /* channels 4 and 5 work with slower clock */
+ else /* channels 4 and 5 work with slower clock */
F2608->adpcm[i].step = (UINT32)((float)(1<<ADPCM_SHIFT)*((float)F2608->OPN.ST.freqbase)/6.0);
F2608->adpcm[i].start = YM2608_ADPCM_ROM_addr[i*2];
@@ -3616,7 +3616,7 @@ void ym2608_reset_chip(void *chip)
/* DELTA-T unit */
DELTAT->freqbase = OPN->ST.freqbase;
DELTAT->output_pointer = OPN->out_delta;
- DELTAT->portshift = 5; /* always 5bits shift */ /* ASG */
+ DELTAT->portshift = 5; /* always 5bits shift */ /* ASG */
DELTAT->output_range = 1<<23;
YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_NORMAL);
}
@@ -3631,12 +3631,12 @@ int ym2608_write(void *chip, int a,UINT8 v)
FM_OPN *OPN = &F2608->OPN;
int addr;
- v &= 0xff; /*adjust to 8 bit bus */
+ v &= 0xff; /*adjust to 8 bit bus */
switch(a&3)
{
- case 0: /* address port 0 */
+ case 0: /* address port 0 */
OPN->ST.address = v;
F2608->addr_A1 = 0;
@@ -3650,26 +3650,26 @@ int ym2608_write(void *chip, int a,UINT8 v)
}
break;
- case 1: /* data port 0 */
+ case 1: /* data port 0 */
if (F2608->addr_A1 != 0)
- break; /* verified on real YM2608 */
+ break; /* verified on real YM2608 */
addr = OPN->ST.address;
F2608->REGS[addr] = v;
switch(addr & 0xf0)
{
- case 0x00: /* SSG section */
+ case 0x00: /* SSG section */
/* Write data to SSG emulator */
(*OPN->ST.SSG->write)(OPN->ST.param,a,v);
break;
- case 0x10: /* 0x10-0x1f : Rhythm section */
+ case 0x10: /* 0x10-0x1f : Rhythm section */
ym2608_update_req(OPN->ST.param);
FM_ADPCMAWrite(F2608,addr-0x10,v);
break;
- case 0x20: /* Mode Register */
+ case 0x20: /* Mode Register */
switch(addr)
{
- case 0x29: /* SCH,xx,xxx,EN_ZERO,EN_BRDY,EN_EOS,EN_TB,EN_TA */
+ case 0x29: /* SCH,xx,xxx,EN_ZERO,EN_BRDY,EN_EOS,EN_TB,EN_TA */
YM2608IRQMaskWrite(OPN, F2608, v);
break;
default:
@@ -3677,30 +3677,30 @@ int ym2608_write(void *chip, int a,UINT8 v)
OPNWriteMode(OPN,addr,v);
}
break;
- default: /* OPN section */
+ default: /* OPN section */
ym2608_update_req(OPN->ST.param);
OPNWriteReg(OPN,addr,v);
}
break;
- case 2: /* address port 1 */
+ case 2: /* address port 1 */
OPN->ST.address = v;
F2608->addr_A1 = 1;
break;
- case 3: /* data port 1 */
+ case 3: /* data port 1 */
if (F2608->addr_A1 != 1)
- break; /* verified on real YM2608 */
+ break; /* verified on real YM2608 */
addr = OPN->ST.address;
F2608->REGS[addr | 0x100] = v;
ym2608_update_req(OPN->ST.param);
switch( addr & 0xf0 )
{
- case 0x00: /* DELTAT PORT */
+ case 0x00: /* DELTAT PORT */
switch( addr )
{
- case 0x0e: /* DAC data */
+ case 0x0e: /* DAC data */
logerror("YM2608: write to DAC data (unimplemented) value=%02x\n",v);
break;
default:
@@ -3708,7 +3708,7 @@ int ym2608_write(void *chip, int a,UINT8 v)
YM_DELTAT_ADPCM_Write(&F2608->deltaT,addr,v);
}
break;
- case 0x10: /* IRQ Flag control */
+ case 0x10: /* IRQ Flag control */
if( addr == 0x10 )
{
YM2608IRQFlagWrite(OPN, F2608, v);
@@ -3729,17 +3729,17 @@ UINT8 ym2608_read(void *chip,int a)
switch( a&3 )
{
- case 0: /* status 0 : YM2203 compatible */
+ case 0: /* status 0 : YM2203 compatible */
/* BUSY:x:x:x:x:x:FLAGB:FLAGA */
ret = FM_STATUS_FLAG(&F2608->OPN.ST) & 0x83;
break;
- case 1: /* status 0, ID */
+ case 1: /* status 0, ID */
if( addr < 16 ) ret = (*F2608->OPN.ST.SSG->read)(F2608->OPN.ST.param);
else if(addr == 0xff) ret = 0x01; /* ID code */
break;
- case 2: /* status 1 : status 0 + ADPCM status */
+ case 2: /* status 1 : status 0 + ADPCM status */
/* BUSY : x : PCMBUSY : ZERO : BRDY : EOS : FLAGB : FLAGA */
ret = (FM_STATUS_FLAG(&F2608->OPN.ST) & (F2608->flagmask|0x80)) | ((F2608->deltaT.PCM_BSY & 1)<<5) ;
break;
@@ -3766,35 +3766,35 @@ int ym2608_timer_over(void *chip,int c)
{
YM2608 *F2608 = (YM2608 *)chip;
- switch(c)
+ switch(c)
{
#if 0
case 2:
- { /* BUFRDY flag */
+ { /* BUFRDY flag */
YM_DELTAT_BRDY_callback( &F2608->deltaT );
}
break;
#endif
case 1:
- { /* Timer B */
+ { /* Timer B */
TimerBOver( &(F2608->OPN.ST) );
}
break;
case 0:
- { /* Timer A */
+ { /* Timer A */
ym2608_update_req(F2608->OPN.ST.param);
/* timer update */
TimerAOver( &(F2608->OPN.ST) );
/* CSM mode key,TL controll */
if( F2608->OPN.ST.mode & 0x80 )
- { /* CSM mode total level latch and auto key on */
+ { /* CSM mode total level latch and auto key on */
CSMKeyControll( F2608->OPN.type, &(F2608->CH[2]) );
}
}
break;
default:
break;
- }
+ }
return F2608->OPN.ST.irq;
}
@@ -3814,7 +3814,7 @@ void ym2610_update_one(void *chip, FMSAMPLE **buffer, int length)
YM_DELTAT *DELTAT = &F2610->deltaT;
int i,j;
FMSAMPLE *bufL,*bufR;
- FM_CH *cch[4];
+ FM_CH *cch[4];
INT32 *out_fm = OPN->out_fm;
/* buffer setup */
@@ -3883,10 +3883,10 @@ void ym2610_update_one(void *chip, FMSAMPLE **buffer, int length)
}
/* calculate FM */
- chan_calc(OPN, cch[0], 1 ); /*remapped to 1*/
- chan_calc(OPN, cch[1], 2 ); /*remapped to 2*/
- chan_calc(OPN, cch[2], 4 ); /*remapped to 4*/
- chan_calc(OPN, cch[3], 5 ); /*remapped to 5*/
+ chan_calc(OPN, cch[0], 1 ); /*remapped to 1*/
+ chan_calc(OPN, cch[1], 2 ); /*remapped to 2*/
+ chan_calc(OPN, cch[2], 4 ); /*remapped to 4*/
+ chan_calc(OPN, cch[3], 5 ); /*remapped to 5*/
/* deltaT ADPCM */
if( DELTAT->portstate&0x80 )
@@ -3909,7 +3909,7 @@ void ym2610_update_one(void *chip, FMSAMPLE **buffer, int length)
rt += (OPN->out_delta[OUTD_RIGHT] + OPN->out_delta[OUTD_CENTER])>>9;
- lt += ((out_fm[1]>>1) & OPN->pan[2]); /* the shift right was verified on real chip */
+ lt += ((out_fm[1]>>1) & OPN->pan[2]); /* the shift right was verified on real chip */
rt += ((out_fm[1]>>1) & OPN->pan[3]);
lt += ((out_fm[2]>>1) & OPN->pan[4]);
rt += ((out_fm[2]>>1) & OPN->pan[5]);
@@ -3951,7 +3951,7 @@ void ym2610b_update_one(void *chip, FMSAMPLE **buffer, int length)
YM_DELTAT *DELTAT = &F2610->deltaT;
int i,j;
FMSAMPLE *bufL,*bufR;
- FM_CH *cch[6];
+ FM_CH *cch[6];
INT32 *out_fm = OPN->out_fm;
/* buffer setup */
@@ -4045,7 +4045,7 @@ void ym2610b_update_one(void *chip, FMSAMPLE **buffer, int length)
lt += (OPN->out_delta[OUTD_LEFT] + OPN->out_delta[OUTD_CENTER])>>9;
rt += (OPN->out_delta[OUTD_RIGHT] + OPN->out_delta[OUTD_CENTER])>>9;
- lt += ((out_fm[0]>>1) & OPN->pan[0]); /* the shift right is verified on YM2610 */
+ lt += ((out_fm[0]>>1) & OPN->pan[0]); /* the shift right is verified on YM2610 */
rt += ((out_fm[0]>>1) & OPN->pan[1]);
lt += ((out_fm[1]>>1) & OPN->pan[2]);
rt += ((out_fm[1]>>1) & OPN->pan[3]);
@@ -4163,8 +4163,8 @@ static void YM2610_deltat_status_reset(void *chip, UINT8 changebits)
}
void *ym2610_init(void *param, device_t *device, int clock, int rate,
- void *pcmroma,int pcmsizea,void *pcmromb,int pcmsizeb,
- FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
+ void *pcmroma,int pcmsizea,void *pcmromb,int pcmsizeb,
+ FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg)
{
YM2610 *F2610;
@@ -4199,7 +4199,7 @@ void *ym2610_init(void *param, device_t *device, int clock, int rate,
F2610->deltaT.status_set_handler = YM2610_deltat_status_set;
F2610->deltaT.status_reset_handler = YM2610_deltat_status_reset;
F2610->deltaT.status_change_which_chip = F2610;
- F2610->deltaT.status_change_EOS_bit = 0x80; /* status flag: set bit7 on End Of Sample */
+ F2610->deltaT.status_change_EOS_bit = 0x80; /* status flag: set bit7 on End Of Sample */
Init_ADPCMATable();
#ifdef __SAVE_H__
@@ -4293,7 +4293,7 @@ void ym2610_reset_chip(void *chip)
/* DELTA-T unit */
DELTAT->freqbase = OPN->ST.freqbase;
DELTAT->output_pointer = OPN->out_delta;
- DELTAT->portshift = 8; /* allways 8bits shift */
+ DELTAT->portshift = 8; /* allways 8bits shift */
DELTAT->output_range = 1<<23;
YM_DELTAT_ADPCM_Reset(DELTAT,OUTD_CENTER,YM_DELTAT_EMULATION_MODE_YM2610);
}
@@ -4309,11 +4309,11 @@ int ym2610_write(void *chip, int a, UINT8 v)
int addr;
int ch;
- v &= 0xff; /* adjust to 8 bit bus */
+ v &= 0xff; /* adjust to 8 bit bus */
switch( a&3 )
{
- case 0: /* address port 0 */
+ case 0: /* address port 0 */
OPN->ST.address = v;
F2610->addr_A1 = 0;
@@ -4321,15 +4321,15 @@ int ym2610_write(void *chip, int a, UINT8 v)
if( v < 16 ) (*OPN->ST.SSG->write)(OPN->ST.param,0,v);
break;
- case 1: /* data port 0 */
+ case 1: /* data port 0 */
if (F2610->addr_A1 != 0)
- break; /* verified on real YM2608 */
+ break; /* verified on real YM2608 */
addr = OPN->ST.address;
F2610->REGS[addr] = v;
switch(addr & 0xf0)
{
- case 0x00: /* SSG section */
+ case 0x00: /* SSG section */
/* Write data to SSG emulator */
(*OPN->ST.SSG->write)(OPN->ST.param,a,v);
break;
@@ -4338,16 +4338,16 @@ int ym2610_write(void *chip, int a, UINT8 v)
switch(addr)
{
- case 0x10: /* control 1 */
- case 0x11: /* control 2 */
- case 0x12: /* start address L */
- case 0x13: /* start address H */
- case 0x14: /* stop address L */
- case 0x15: /* stop address H */
-
- case 0x19: /* delta-n L */
- case 0x1a: /* delta-n H */
- case 0x1b: /* volume */
+ case 0x10: /* control 1 */
+ case 0x11: /* control 2 */
+ case 0x12: /* start address L */
+ case 0x13: /* start address H */
+ case 0x14: /* stop address L */
+ case 0x15: /* stop address H */
+
+ case 0x19: /* delta-n L */
+ case 0x1a: /* delta-n H */
+ case 0x1b: /* volume */
{
YM_DELTAT_ADPCM_Write(&F2610->deltaT,addr-0x10,v);
}
@@ -4360,7 +4360,7 @@ int ym2610_write(void *chip, int a, UINT8 v)
for(ch=0;ch<6;ch++)
F2610->adpcm[ch].flagMask = statusmask&(1<<ch);
- F2610->deltaT.status_change_EOS_bit = statusmask & 0x80; /* status flag: set bit7 on End Of Sample */
+ F2610->deltaT.status_change_EOS_bit = statusmask & 0x80; /* status flag: set bit7 on End Of Sample */
/* clear arrived flag */
F2610->adpcm_arrivedEndAddress &= statusmask;
@@ -4373,25 +4373,25 @@ int ym2610_write(void *chip, int a, UINT8 v)
}
break;
- case 0x20: /* Mode Register */
+ case 0x20: /* Mode Register */
ym2610_update_req(OPN->ST.param);
OPNWriteMode(OPN,addr,v);
break;
- default: /* OPN section */
+ default: /* OPN section */
ym2610_update_req(OPN->ST.param);
/* write register */
OPNWriteReg(OPN,addr,v);
}
break;
- case 2: /* address port 1 */
+ case 2: /* address port 1 */
OPN->ST.address = v;
F2610->addr_A1 = 1;
break;
- case 3: /* data port 1 */
+ case 3: /* data port 1 */
if (F2610->addr_A1 != 1)
- break; /* verified on real YM2608 */
+ break; /* verified on real YM2608 */
ym2610_update_req(OPN->ST.param);
addr = OPN->ST.address;
@@ -4413,14 +4413,14 @@ UINT8 ym2610_read(void *chip,int a)
switch( a&3)
{
- case 0: /* status 0 : YM2203 compatible */
+ case 0: /* status 0 : YM2203 compatible */
ret = FM_STATUS_FLAG(&F2610->OPN.ST) & 0x83;
break;
- case 1: /* data 0 */
+ case 1: /* data 0 */
if( addr < 16 ) ret = (*F2610->OPN.ST.SSG->read)(F2610->OPN.ST.param);
if( addr == 0xff ) ret = 0x01;
break;
- case 2: /* status 1 : ADPCM status */
+ case 2: /* status 1 : ADPCM status */
/* ADPCM STATUS (arrived End Address) */
/* B,--,A5,A4,A3,A2,A1,A0 */
/* B = ADPCM-B(DELTA-T) arrived end address */
@@ -4439,17 +4439,17 @@ int ym2610_timer_over(void *chip,int c)
YM2610 *F2610 = (YM2610 *)chip;
if( c )
- { /* Timer B */
+ { /* Timer B */
TimerBOver( &(F2610->OPN.ST) );
}
else
- { /* Timer A */
+ { /* Timer A */
ym2610_update_req(F2610->OPN.ST.param);
/* timer update */
TimerAOver( &(F2610->OPN.ST) );
/* CSM mode key,TL controll */
if( F2610->OPN.ST.mode & 0x80 )
- { /* CSM mode total level latch and auto key on */
+ { /* CSM mode total level latch and auto key on */
CSMKeyControll( F2610->OPN.type, &(F2610->CH[2]) );
}
}
diff --git a/src/emu/sound/fm.h b/src/emu/sound/fm.h
index 3076e3800d2..c887ab3aa85 100644
--- a/src/emu/sound/fm.h
+++ b/src/emu/sound/fm.h
@@ -9,12 +9,12 @@
#define __FM_H__
/* --- select emulation chips --- */
-#define BUILD_YM2203 (1) /* build YM2203(OPN) emulator */
-#define BUILD_YM2608 (1) /* build YM2608(OPNA) emulator */
-#define BUILD_YM2610 (1) /* build YM2610(OPNB) emulator */
-#define BUILD_YM2610B (1) /* build YM2610B(OPNB?)emulator */
-#define BUILD_YM2612 (1) /* build YM2612(OPN2) emulator */
-#define BUILD_YM3438 (1) /* build YM3438(OPN) emulator */
+#define BUILD_YM2203 (1) /* build YM2203(OPN) emulator */
+#define BUILD_YM2608 (1) /* build YM2608(OPNA) emulator */
+#define BUILD_YM2610 (1) /* build YM2610(OPNB) emulator */
+#define BUILD_YM2610B (1) /* build YM2610B(OPNB?)emulator */
+#define BUILD_YM2612 (1) /* build YM2612(OPN2) emulator */
+#define BUILD_YM3438 (1) /* build YM3438(OPN) emulator */
/* select bit size of output : 8 or 16 */
#define FM_SAMPLE_BITS 16
@@ -39,48 +39,48 @@ struct ssg_callbacks
/* --- external callback funstions for realtime update --- */
#if FM_BUSY_FLAG_SUPPORT
-#define TIME_TYPE attotime
-#define UNDEFINED_TIME attotime::zero
-#define FM_GET_TIME_NOW(machine) (machine)->time()
-#define ADD_TIMES(t1, t2) ((t1) + (t2))
-#define COMPARE_TIMES(t1, t2) (((t1) == (t2)) ? 0 : ((t1) < (t2)) ? -1 : 1)
-#define MULTIPLY_TIME_BY_INT(t,i) ((t) * (i))
+#define TIME_TYPE attotime
+#define UNDEFINED_TIME attotime::zero
+#define FM_GET_TIME_NOW(machine) (machine)->time()
+#define ADD_TIMES(t1, t2) ((t1) + (t2))
+#define COMPARE_TIMES(t1, t2) (((t1) == (t2)) ? 0 : ((t1) < (t2)) ? -1 : 1)
+#define MULTIPLY_TIME_BY_INT(t,i) ((t) * (i))
#endif
#if BUILD_YM2203
- /* in 2203intf.c */
- void ym2203_update_request(void *param);
- #define ym2203_update_req(chip) ym2203_update_request(chip)
+ /* in 2203intf.c */
+ void ym2203_update_request(void *param);
+ #define ym2203_update_req(chip) ym2203_update_request(chip)
#endif /* BUILD_YM2203 */
#if BUILD_YM2608
- /* in 2608intf.c */
- void ym2608_update_request(void *param);
- #define ym2608_update_req(chip) ym2608_update_request(chip);
+ /* in 2608intf.c */
+ void ym2608_update_request(void *param);
+ #define ym2608_update_req(chip) ym2608_update_request(chip);
#endif /* BUILD_YM2608 */
#if (BUILD_YM2610||BUILD_YM2610B)
- /* in 2610intf.c */
- void ym2610_update_request(void *param);
- #define ym2610_update_req(chip) ym2610_update_request(chip);
+ /* in 2610intf.c */
+ void ym2610_update_request(void *param);
+ #define ym2610_update_req(chip) ym2610_update_request(chip);
#endif /* (BUILD_YM2610||BUILD_YM2610B) */
#if (BUILD_YM2612||BUILD_YM3438)
- /* in 2612intf.c */
- void ym2612_update_request(void *param);
- #define ym2612_update_req(chip) ym2612_update_request(chip);
+ /* in 2612intf.c */
+ void ym2612_update_request(void *param);
+ #define ym2612_update_req(chip) ym2612_update_request(chip);
#endif /* (BUILD_YM2612||BUILD_YM3438) */
/* compiler dependence */
#if 0
#ifndef OSD_CPU_H
#define OSD_CPU_H
-typedef unsigned char UINT8; /* unsigned 8bit */
-typedef unsigned short UINT16; /* unsigned 16bit */
-typedef unsigned int UINT32; /* unsigned 32bit */
-typedef signed char INT8; /* signed 8bit */
-typedef signed short INT16; /* signed 16bit */
-typedef signed int INT32; /* signed 32bit */
+typedef unsigned char UINT8; /* unsigned 8bit */
+typedef unsigned short UINT16; /* unsigned 16bit */
+typedef unsigned int UINT32; /* unsigned 32bit */
+typedef signed char INT8; /* signed 8bit */
+typedef signed short INT16; /* signed 16bit */
+typedef signed int INT32; /* signed 32bit */
#endif /* OSD_CPU_H */
#endif
@@ -122,7 +122,7 @@ typedef void (*FM_IRQHANDLER)(void *param,int irq);
** return 0 = success
*/
void * ym2203_init(void *param, device_t *device, int baseclock, int rate,
- FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
+ FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
/*
** shutdown the YM2203 emulators
@@ -165,8 +165,8 @@ void ym2203_postload(void *chip);
#if BUILD_YM2608
/* -------------------- YM2608(OPNA) Interface -------------------- */
void * ym2608_init(void *param, device_t *device, int baseclock, int rate,
- void *pcmroma,int pcmsizea,
- FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
+ void *pcmroma,int pcmsizea,
+ FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
void ym2608_shutdown(void *chip);
void ym2608_reset_chip(void *chip);
void ym2608_update_one(void *chip, FMSAMPLE **buffer, int length);
@@ -180,8 +180,8 @@ void ym2608_postload(void *chip);
#if (BUILD_YM2610||BUILD_YM2610B)
/* -------------------- YM2610(OPNB) Interface -------------------- */
void * ym2610_init(void *param, device_t *device, int baseclock, int rate,
- void *pcmroma,int pcmasize,void *pcmromb,int pcmbsize,
- FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
+ void *pcmroma,int pcmasize,void *pcmromb,int pcmbsize,
+ FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler, const ssg_callbacks *ssg);
void ym2610_shutdown(void *chip);
void ym2610_reset_chip(void *chip);
void ym2610_update_one(void *chip, FMSAMPLE **buffer, int length);
@@ -198,7 +198,7 @@ void ym2610_postload(void *chip);
#if (BUILD_YM2612||BUILD_YM3438)
void * ym2612_init(void *param, device_t *device, int baseclock, int rate,
- FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
+ FM_TIMERHANDLER TimerHandler,FM_IRQHANDLER IRQHandler);
void ym2612_shutdown(void *chip);
void ym2612_reset_chip(void *chip);
void ym2612_update_one(void *chip, FMSAMPLE **buffer, int length);
diff --git a/src/emu/sound/fm2612.c b/src/emu/sound/fm2612.c
index 7d1227b8110..3b2877a7c58 100644
--- a/src/emu/sound/fm2612.c
+++ b/src/emu/sound/fm2612.c
@@ -152,36 +152,36 @@
/* globals */
-#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
-#define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
-#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
-#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
+#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
+#define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
+#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
+#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
-#define FREQ_MASK ((1<<FREQ_SH)-1)
+#define FREQ_MASK ((1<<FREQ_SH)-1)
#define MAXOUT (+32767)
#define MINOUT (-32768)
/* envelope generator */
-#define ENV_BITS 10
-#define ENV_LEN (1<<ENV_BITS)
-#define ENV_STEP (128.0/ENV_LEN)
+#define ENV_BITS 10
+#define ENV_LEN (1<<ENV_BITS)
+#define ENV_STEP (128.0/ENV_LEN)
-#define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
-#define MIN_ATT_INDEX (0) /* 0 */
+#define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
+#define MIN_ATT_INDEX (0) /* 0 */
-#define EG_ATT 4
-#define EG_DEC 3
-#define EG_SUS 2
-#define EG_REL 1
-#define EG_OFF 0
+#define EG_ATT 4
+#define EG_DEC 3
+#define EG_SUS 2
+#define EG_REL 1
+#define EG_OFF 0
/* operator unit */
-#define SIN_BITS 10
-#define SIN_LEN (1<<SIN_BITS)
-#define SIN_MASK (SIN_LEN-1)
+#define SIN_BITS 10
+#define SIN_LEN (1<<SIN_BITS)
+#define SIN_MASK (SIN_LEN-1)
-#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
+#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
/* TL_TAB_LEN is calculated as:
* 13 - sinus amplitude bits (Y axis)
@@ -191,7 +191,7 @@
#define TL_TAB_LEN (13*2*TL_RES_LEN)
static signed int tl_tab[TL_TAB_LEN];
-#define ENV_QUIET (TL_TAB_LEN>>3)
+#define ENV_QUIET (TL_TAB_LEN>>3)
/* sin waveform table in 'decibel' scale */
static unsigned int sin_tab[SIN_LEN];
@@ -205,8 +205,8 @@ static unsigned int sin_tab[SIN_LEN];
/* attenuation value (10 bits) = (SL << 2) << 3 */
#define SC(db) (UINT32) ( db * (4.0/ENV_STEP) )
static const UINT32 sl_table[16]={
- SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
- SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
+ SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
+ SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
};
#undef SC
@@ -511,15 +511,15 @@ static INT32 lfo_pm_table[128*8*32]; /* 128 combinations of 7 bits meaningful (o
#ifdef SAVE_SAMPLE
static FILE *sample[1];
- #if 1 /*save to MONO file */
+ #if 1 /*save to MONO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = lt; \
+ { signed int pom = lt; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
- #else /*save to STEREO file */
+ #else /*save to STEREO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = lt; \
+ { signed int pom = lt; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
pom = rt; \
@@ -533,97 +533,97 @@ static FILE *sample[1];
/* struct describing a single operator (SLOT) */
struct FM_SLOT
{
- INT32 *DT; /* detune :dt_tab[DT] */
- UINT8 KSR; /* key scale rate :3-KSR */
- UINT32 ar; /* attack rate */
- UINT32 d1r; /* decay rate */
- UINT32 d2r; /* sustain rate */
- UINT32 rr; /* release rate */
- UINT8 ksr; /* key scale rate :kcode>>(3-KSR) */
- UINT32 mul; /* multiple :ML_TABLE[ML] */
+ INT32 *DT; /* detune :dt_tab[DT] */
+ UINT8 KSR; /* key scale rate :3-KSR */
+ UINT32 ar; /* attack rate */
+ UINT32 d1r; /* decay rate */
+ UINT32 d2r; /* sustain rate */
+ UINT32 rr; /* release rate */
+ UINT8 ksr; /* key scale rate :kcode>>(3-KSR) */
+ UINT32 mul; /* multiple :ML_TABLE[ML] */
/* Phase Generator */
- UINT32 phase; /* phase counter */
- INT32 Incr; /* phase step */
+ UINT32 phase; /* phase counter */
+ INT32 Incr; /* phase step */
/* Envelope Generator */
- UINT8 state; /* phase type */
- UINT32 tl; /* total level: TL << 3 */
- INT32 volume; /* envelope counter */
- UINT32 sl; /* sustain level:sl_table[SL] */
- UINT32 vol_out; /* current output from EG circuit (without AM from LFO) */
-
- UINT8 eg_sh_ar; /* (attack state) */
- UINT8 eg_sel_ar; /* (attack state) */
- UINT8 eg_sh_d1r; /* (decay state) */
- UINT8 eg_sel_d1r; /* (decay state) */
- UINT8 eg_sh_d2r; /* (sustain state) */
- UINT8 eg_sel_d2r; /* (sustain state) */
- UINT8 eg_sh_rr; /* (release state) */
- UINT8 eg_sel_rr; /* (release state) */
-
- UINT8 ssg; /* SSG-EG waveform */
- UINT8 ssgn; /* SSG-EG negated output */
-
- UINT8 key; /* 0=last key was KEY OFF, 1=KEY ON */
+ UINT8 state; /* phase type */
+ UINT32 tl; /* total level: TL << 3 */
+ INT32 volume; /* envelope counter */
+ UINT32 sl; /* sustain level:sl_table[SL] */
+ UINT32 vol_out; /* current output from EG circuit (without AM from LFO) */
+
+ UINT8 eg_sh_ar; /* (attack state) */
+ UINT8 eg_sel_ar; /* (attack state) */
+ UINT8 eg_sh_d1r; /* (decay state) */
+ UINT8 eg_sel_d1r; /* (decay state) */
+ UINT8 eg_sh_d2r; /* (sustain state) */
+ UINT8 eg_sel_d2r; /* (sustain state) */
+ UINT8 eg_sh_rr; /* (release state) */
+ UINT8 eg_sel_rr; /* (release state) */
+
+ UINT8 ssg; /* SSG-EG waveform */
+ UINT8 ssgn; /* SSG-EG negated output */
+
+ UINT8 key; /* 0=last key was KEY OFF, 1=KEY ON */
/* LFO */
- UINT32 AMmask; /* AM enable flag */
+ UINT32 AMmask; /* AM enable flag */
};
struct FM_CH
{
- FM_SLOT SLOT[4]; /* four SLOTs (operators) */
+ FM_SLOT SLOT[4]; /* four SLOTs (operators) */
- UINT8 ALGO; /* algorithm */
- UINT8 FB; /* feedback shift */
- INT32 op1_out[2]; /* op1 output for feedback */
+ UINT8 ALGO; /* algorithm */
+ UINT8 FB; /* feedback shift */
+ INT32 op1_out[2]; /* op1 output for feedback */
- INT32 *connect1; /* SLOT1 output pointer */
- INT32 *connect3; /* SLOT3 output pointer */
- INT32 *connect2; /* SLOT2 output pointer */
- INT32 *connect4; /* SLOT4 output pointer */
+ INT32 *connect1; /* SLOT1 output pointer */
+ INT32 *connect3; /* SLOT3 output pointer */
+ INT32 *connect2; /* SLOT2 output pointer */
+ INT32 *connect4; /* SLOT4 output pointer */
- INT32 *mem_connect;/* where to put the delayed sample (MEM) */
- INT32 mem_value; /* delayed sample (MEM) value */
+ INT32 *mem_connect;/* where to put the delayed sample (MEM) */
+ INT32 mem_value; /* delayed sample (MEM) value */
- INT32 pms; /* channel PMS */
- UINT8 ams; /* channel AMS */
+ INT32 pms; /* channel PMS */
+ UINT8 ams; /* channel AMS */
- UINT32 fc; /* fnum,blk:adjusted to sample rate */
- UINT8 kcode; /* key code: */
- UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
+ UINT32 fc; /* fnum,blk:adjusted to sample rate */
+ UINT8 kcode; /* key code: */
+ UINT32 block_fnum; /* current blk/fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
};
struct FM_ST
{
device_t *device;
- void * param; /* this chip parameter */
- double freqbase; /* frequency base */
- int timer_prescaler; /* timer prescaler */
- UINT8 irq; /* interrupt level */
- UINT8 irqmask; /* irq mask */
+ void * param; /* this chip parameter */
+ double freqbase; /* frequency base */
+ int timer_prescaler; /* timer prescaler */
+ UINT8 irq; /* interrupt level */
+ UINT8 irqmask; /* irq mask */
#if FM_BUSY_FLAG_SUPPORT
- TIME_TYPE busy_expiry_time; /* expiry time of the busy status */
+ TIME_TYPE busy_expiry_time; /* expiry time of the busy status */
#endif
- UINT32 clock; /* master clock (Hz) */
- UINT32 rate; /* sampling rate (Hz) */
- UINT16 address; /* address register */
- UINT8 status; /* status flag */
- UINT32 mode; /* mode CSM / 3SLOT */
- UINT8 fn_h; /* freq latch */
- UINT8 prescaler_sel; /* prescaler selector */
- INT32 TA; /* timer a */
- INT32 TAC; /* timer a counter */
- UINT8 TB; /* timer b */
- INT32 TBC; /* timer b counter */
+ UINT32 clock; /* master clock (Hz) */
+ UINT32 rate; /* sampling rate (Hz) */
+ UINT16 address; /* address register */
+ UINT8 status; /* status flag */
+ UINT32 mode; /* mode CSM / 3SLOT */
+ UINT8 fn_h; /* freq latch */
+ UINT8 prescaler_sel; /* prescaler selector */
+ INT32 TA; /* timer a */
+ INT32 TAC; /* timer a counter */
+ UINT8 TB; /* timer b */
+ INT32 TBC; /* timer b counter */
/* local time tables */
- INT32 dt_tab[8][32]; /* DeTune table */
+ INT32 dt_tab[8][32]; /* DeTune table */
/* Extention Timer and IRQ handler */
- FM_TIMERHANDLER timer_handler;
- FM_IRQHANDLER IRQ_Handler;
+ FM_TIMERHANDLER timer_handler;
+ FM_IRQHANDLER IRQ_Handler;
const ssg_callbacks *SSG;
};
@@ -636,30 +636,30 @@ struct FM_ST
/* OPN 3slot struct */
struct FM_3SLOT
{
- UINT32 fc[3]; /* fnum3,blk3: calculated */
- UINT8 fn_h; /* freq3 latch */
- UINT8 kcode[3]; /* key code */
- UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
+ UINT32 fc[3]; /* fnum3,blk3: calculated */
+ UINT8 fn_h; /* freq3 latch */
+ UINT8 kcode[3]; /* key code */
+ UINT32 block_fnum[3]; /* current fnum value for this slot (can be different betweeen slots of one channel in 3slot mode) */
UINT8 key_csm; /* CSM mode Key-ON flag */
};
/* OPN/A/B common state */
struct FM_OPN
{
- UINT8 type; /* chip type */
- FM_ST ST; /* general state */
- FM_3SLOT SL3; /* 3 slot mode state */
- FM_CH *P_CH; /* pointer of CH */
- unsigned int pan[6*2]; /* fm channels output masks (0xffffffff = enable) */
+ UINT8 type; /* chip type */
+ FM_ST ST; /* general state */
+ FM_3SLOT SL3; /* 3 slot mode state */
+ FM_CH *P_CH; /* pointer of CH */
+ unsigned int pan[6*2]; /* fm channels output masks (0xffffffff = enable) */
- UINT32 eg_cnt; /* global envelope generator counter */
- UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/144/3 */
- UINT32 eg_timer_add; /* step of eg_timer */
- UINT32 eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
+ UINT32 eg_cnt; /* global envelope generator counter */
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/144/3 */
+ UINT32 eg_timer_add; /* step of eg_timer */
+ UINT32 eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
- but LFO works with one more bit of a precision so we really need 4096 elements */
+ but LFO works with one more bit of a precision so we really need 4096 elements */
UINT32 fn_table[4096]; /* fnumber->increment counter */
UINT32 fn_max; /* maximal phase increment (used for phase overflow) */
@@ -671,23 +671,23 @@ struct FM_OPN
UINT32 LFO_AM; /* current LFO AM step */
UINT32 LFO_PM; /* current LFO PM step */
- INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
- INT32 mem; /* one sample delay memory */
- INT32 out_fm[8]; /* outputs of working channels */
+ INT32 m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
+ INT32 mem; /* one sample delay memory */
+ INT32 out_fm[8]; /* outputs of working channels */
};
/* here's the virtual YM2612 */
struct YM2612
{
- UINT8 REGS[512]; /* registers */
- FM_OPN OPN; /* OPN state */
- FM_CH CH[6]; /* channel state */
- UINT8 addr_A1; /* address line A1 */
+ UINT8 REGS[512]; /* registers */
+ FM_OPN OPN; /* OPN state */
+ FM_CH CH[6]; /* channel state */
+ UINT8 addr_A1; /* address line A1 */
/* dac output (YM2612) */
- int dacen;
- INT32 dacout;
+ int dacen;
+ INT32 dacout;
};
/* log output level */
@@ -792,7 +792,7 @@ INLINE void FM_KEYOFF(FM_OPN *OPN, FM_CH *CH , int s )
{
/* convert EG attenuation level */
if (SLOT->ssgn ^ (SLOT->ssg&0x04))
- SLOT->volume = (0x200 - SLOT->volume);
+ SLOT->volume = (0x200 - SLOT->volume);
/* force EG attenuation level */
if (SLOT->volume >= 0x200)
@@ -920,7 +920,7 @@ INLINE void set_timers( FM_OPN *OPN, FM_ST *ST, void *n, int v )
}
}
else
- { /* stop timer b */
+ { /* stop timer b */
if( ST->TBC != 0 )
{
ST->TBC = 0;
@@ -938,7 +938,7 @@ INLINE void set_timers( FM_OPN *OPN, FM_ST *ST, void *n, int v )
}
}
else
- { /* stop timer a */
+ { /* stop timer a */
if( ST->TAC != 0 )
{
ST->TAC = 0;
@@ -972,23 +972,23 @@ INLINE void TimerBOver(FM_ST *ST)
/* ----- internal timer mode , update timer */
/* ---------- calculate timer A ---------- */
- #define INTERNAL_TIMER_A(ST,CSM_CH) \
- { \
- if( ST->TAC && (ST->timer_handler==0) ) \
- if( (ST->TAC -= (int)(ST->freqbase*4096)) <= 0 ) \
- { \
- TimerAOver( ST ); \
- /* CSM mode total level latch and auto key on */ \
- if( ST->mode & 0x80 ) \
- CSMKeyControll( CSM_CH ); \
- } \
+ #define INTERNAL_TIMER_A(ST,CSM_CH) \
+ { \
+ if( ST->TAC && (ST->timer_handler==0) ) \
+ if( (ST->TAC -= (int)(ST->freqbase*4096)) <= 0 ) \
+ { \
+ TimerAOver( ST ); \
+ /* CSM mode total level latch and auto key on */ \
+ if( ST->mode & 0x80 ) \
+ CSMKeyControll( CSM_CH ); \
+ } \
}
/* ---------- calculate timer B ---------- */
- #define INTERNAL_TIMER_B(ST,step) \
- { \
- if( ST->TBC && (ST->timer_handler==0) ) \
- if( (ST->TBC -= (int)(ST->freqbase*4096*step)) <= 0 ) \
- TimerBOver( ST ); \
+ #define INTERNAL_TIMER_B(ST,step) \
+ { \
+ if( ST->TBC && (ST->timer_handler==0) ) \
+ if( (ST->TBC -= (int)(ST->freqbase*4096*step)) <= 0 ) \
+ TimerBOver( ST ); \
}
#else /* FM_INTERNAL_TIMER */
/* external timer mode */
@@ -1005,7 +1005,7 @@ INLINE UINT8 FM_STATUS_FLAG(FM_ST *ST)
if( COMPARE_TIMES(ST->busy_expiry_time, UNDEFINED_TIME) != 0 )
{
if (COMPARE_TIMES(ST->busy_expiry_time, FM_GET_TIME_NOW(&ST->device->machine())) > 0)
- return ST->status | 0x80; /* with busy */
+ return ST->status | 0x80; /* with busy */
/* expire */
FM_BUSY_CLEAR(ST);
}
@@ -1074,13 +1074,13 @@ static void setup_connection( FM_OPN *OPN, FM_CH *CH, int ch )
*om1 = &OPN->c1;
*oc1 = carrier;
*om2 = &OPN->c2;
- *memc= &OPN->mem; /* store it anywhere where it will not be used */
+ *memc= &OPN->mem; /* store it anywhere where it will not be used */
break;
case 5:
/* +----C1----+ */
/* M1-+-MEM---M2-+-OUT */
/* +----C2----+ */
- *om1 = 0; /* special mark */
+ *om1 = 0; /* special mark */
*oc1 = carrier;
*om2 = carrier;
*memc= &OPN->m2;
@@ -1093,7 +1093,7 @@ static void setup_connection( FM_OPN *OPN, FM_CH *CH, int ch )
*om1 = &OPN->c1;
*oc1 = carrier;
*om2 = carrier;
- *memc= &OPN->mem; /* store it anywhere where it will not be used */
+ *memc= &OPN->mem; /* store it anywhere where it will not be used */
break;
case 7:
/* M1-+ */
@@ -1104,7 +1104,7 @@ static void setup_connection( FM_OPN *OPN, FM_CH *CH, int ch )
*om1 = carrier;
*oc1 = carrier;
*om2 = carrier;
- *memc= &OPN->mem; /* store it anywhere where it will not be used */
+ *memc= &OPN->mem; /* store it anywhere where it will not be used */
break;
}
@@ -1156,7 +1156,7 @@ INLINE void set_ar_ksr(UINT8 type, FM_CH *CH,FM_SLOT *SLOT,int v)
else
{
SLOT->eg_sh_ar = 0;
- SLOT->eg_sel_ar = 18*RATE_STEPS; /* verified by Nemesis on real hardware */
+ SLOT->eg_sel_ar = 18*RATE_STEPS; /* verified by Nemesis on real hardware */
}
}
@@ -1209,8 +1209,8 @@ INLINE void advance_lfo(FM_OPN *OPN)
/* There are 128 LFO steps */
OPN->lfo_cnt = ( OPN->lfo_cnt + 1 ) & 127;
- /* triangle (inverted) */
- /* AM: from 126 to 0 step -2, 0 to 126 step +2 */
+ /* triangle (inverted) */
+ /* AM: from 126 to 0 step -2, 0 to 126 step +2 */
if (OPN->lfo_cnt<64)
OPN->LFO_AM = (OPN->lfo_cnt ^ 63) << 1;
else
@@ -1235,32 +1235,32 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
case EG_ATT: /* attack phase */
if (!(OPN->eg_cnt & ((1<<SLOT->eg_sh_ar)-1)))
{
- /* update attenuation level */
- SLOT->volume += (~SLOT->volume * (eg_inc[SLOT->eg_sel_ar + ((OPN->eg_cnt>>SLOT->eg_sh_ar)&7)]))>>4;
-
- /* check phase transition*/
- if (SLOT->volume <= MIN_ATT_INDEX)
- {
- SLOT->volume = MIN_ATT_INDEX;
- SLOT->state = (SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC; /* special case where SL=0 */
- }
-
- /* recalculate EG output */
- if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04))) /* SSG-EG Output Inversion */
+ /* update attenuation level */
+ SLOT->volume += (~SLOT->volume * (eg_inc[SLOT->eg_sel_ar + ((OPN->eg_cnt>>SLOT->eg_sh_ar)&7)]))>>4;
+
+ /* check phase transition*/
+ if (SLOT->volume <= MIN_ATT_INDEX)
+ {
+ SLOT->volume = MIN_ATT_INDEX;
+ SLOT->state = (SLOT->sl == MIN_ATT_INDEX) ? EG_SUS : EG_DEC; /* special case where SL=0 */
+ }
+
+ /* recalculate EG output */
+ if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04))) /* SSG-EG Output Inversion */
SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl;
- else
- SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
+ else
+ SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
}
break;
case EG_DEC: /* decay phase */
if (!(OPN->eg_cnt & ((1<<SLOT->eg_sh_d1r)-1)))
{
- /* SSG EG type */
- if (SLOT->ssg&0x08)
- {
- /* update attenuation level */
- if (SLOT->volume < 0x200)
+ /* SSG EG type */
+ if (SLOT->ssg&0x08)
+ {
+ /* update attenuation level */
+ if (SLOT->volume < 0x200)
{
SLOT->volume += 4 * eg_inc[SLOT->eg_sel_d1r + ((OPN->eg_cnt>>SLOT->eg_sh_d1r)&7)];
@@ -1271,28 +1271,28 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
}
- }
- else
- {
+ }
+ else
+ {
/* update attenuation level */
SLOT->volume += eg_inc[SLOT->eg_sel_d1r + ((OPN->eg_cnt>>SLOT->eg_sh_d1r)&7)];
/* recalculate EG output */
SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
- }
+ }
- /* check phase transition*/
- if (SLOT->volume >= (INT32)(SLOT->sl))
- SLOT->state = EG_SUS;
+ /* check phase transition*/
+ if (SLOT->volume >= (INT32)(SLOT->sl))
+ SLOT->state = EG_SUS;
}
break;
case EG_SUS: /* sustain phase */
if (!(OPN->eg_cnt & ((1<<SLOT->eg_sh_d2r)-1)))
{
- /* SSG EG type */
- if (SLOT->ssg&0x08)
- {
+ /* SSG EG type */
+ if (SLOT->ssg&0x08)
+ {
/* update attenuation level */
if (SLOT->volume < 0x200)
{
@@ -1304,54 +1304,54 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
else
SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
}
- }
- else
- {
- /* update attenuation level */
- SLOT->volume += eg_inc[SLOT->eg_sel_d2r + ((OPN->eg_cnt>>SLOT->eg_sh_d2r)&7)];
-
- /* check phase transition*/
- if ( SLOT->volume >= MAX_ATT_INDEX )
- SLOT->volume = MAX_ATT_INDEX;
- /* do not change SLOT->state (verified on real chip) */
-
- /* recalculate EG output */
- SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
- }
+ }
+ else
+ {
+ /* update attenuation level */
+ SLOT->volume += eg_inc[SLOT->eg_sel_d2r + ((OPN->eg_cnt>>SLOT->eg_sh_d2r)&7)];
+
+ /* check phase transition*/
+ if ( SLOT->volume >= MAX_ATT_INDEX )
+ SLOT->volume = MAX_ATT_INDEX;
+ /* do not change SLOT->state (verified on real chip) */
+
+ /* recalculate EG output */
+ SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
+ }
}
break;
case EG_REL: /* release phase */
if (!(OPN->eg_cnt & ((1<<SLOT->eg_sh_rr)-1)))
{
- /* SSG EG type */
- if (SLOT->ssg&0x08)
- {
- /* update attenuation level */
- if (SLOT->volume < 0x200)
- SLOT->volume += 4 * eg_inc[SLOT->eg_sel_rr + ((OPN->eg_cnt>>SLOT->eg_sh_rr)&7)];
+ /* SSG EG type */
+ if (SLOT->ssg&0x08)
+ {
+ /* update attenuation level */
+ if (SLOT->volume < 0x200)
+ SLOT->volume += 4 * eg_inc[SLOT->eg_sel_rr + ((OPN->eg_cnt>>SLOT->eg_sh_rr)&7)];
/* check phase transition */
if (SLOT->volume >= 0x200)
{
SLOT->volume = MAX_ATT_INDEX;
SLOT->state = EG_OFF;
}
- }
- else
- {
- /* update attenuation level */
- SLOT->volume += eg_inc[SLOT->eg_sel_rr + ((OPN->eg_cnt>>SLOT->eg_sh_rr)&7)];
-
- /* check phase transition*/
- if (SLOT->volume >= MAX_ATT_INDEX)
- {
- SLOT->volume = MAX_ATT_INDEX;
- SLOT->state = EG_OFF;
- }
- }
-
- /* recalculate EG output */
- SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
+ }
+ else
+ {
+ /* update attenuation level */
+ SLOT->volume += eg_inc[SLOT->eg_sel_rr + ((OPN->eg_cnt>>SLOT->eg_sh_rr)&7)];
+
+ /* check phase transition*/
+ if (SLOT->volume >= MAX_ATT_INDEX)
+ {
+ SLOT->volume = MAX_ATT_INDEX;
+ SLOT->state = EG_OFF;
+ }
+ }
+
+ /* recalculate EG output */
+ SLOT->vol_out = (UINT32)SLOT->volume + SLOT->tl;
}
break;
@@ -1359,12 +1359,12 @@ static void advance_eg_channel(FM_OPN *OPN, FM_SLOT *SLOT)
out = ((UINT32)SLOT->volume);
- /* negate output (changes come from alternate bit, init comes from attack bit) */
+ /* negate output (changes come from alternate bit, init comes from attack bit) */
if ((SLOT->ssg&0x08) && (SLOT->ssgn&2) && (SLOT->state > EG_REL))
out ^= MAX_ATT_INDEX;
/* we need to store the result here because we are going to change ssgn
- in next instruction */
+ in next instruction */
SLOT->vol_out = out + SLOT->tl;
SLOT++;
@@ -1390,8 +1390,8 @@ static void update_ssg_eg_channel(FM_SLOT *SLOT)
if (SLOT->ssg & 0x01) /* bit 0 = hold SSG-EG */
{
/* set inversion flag */
- if (SLOT->ssg & 0x02)
- SLOT->ssgn = 4;
+ if (SLOT->ssg & 0x02)
+ SLOT->ssgn = 4;
/* force attenuation level during decay phases */
if ((SLOT->state != EG_ATT) && !(SLOT->ssgn ^ (SLOT->ssg & 0x04)))
@@ -1400,10 +1400,10 @@ static void update_ssg_eg_channel(FM_SLOT *SLOT)
else /* loop SSG-EG */
{
/* toggle output inversion flag or reset Phase Generator */
- if (SLOT->ssg & 0x02)
- SLOT->ssgn ^= 4;
- else
- SLOT->phase = 0;
+ if (SLOT->ssg & 0x02)
+ SLOT->ssgn ^= 4;
+ else
+ SLOT->phase = 0;
/* same as Key ON */
if (SLOT->state != EG_ATT)
@@ -1504,10 +1504,10 @@ INLINE void update_phase_lfo_channel(FM_OPN *OPN, FM_CH *CH)
}
else /* LFO phase modulation = zero */
{
- CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr;
- CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr;
- CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr;
- CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr;
+ CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr;
+ CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr;
+ CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr;
+ CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr;
}
}
@@ -1569,97 +1569,97 @@ static void refresh_fc_eg_chan(FM_OPN *OPN, FM_CH *CH )
INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm)
{
- UINT32 p;
+ UINT32 p;
- p = (env<<3) + sin_tab[ ( ((signed int)((phase & ~FREQ_MASK) + (pm<<15))) >> FREQ_SH ) & SIN_MASK ];
+ p = (env<<3) + sin_tab[ ( ((signed int)((phase & ~FREQ_MASK) + (pm<<15))) >> FREQ_SH ) & SIN_MASK ];
- if (p >= TL_TAB_LEN)
- return 0;
- return tl_tab[p];
+ if (p >= TL_TAB_LEN)
+ return 0;
+ return tl_tab[p];
}
INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm)
{
- UINT32 p;
+ UINT32 p;
- p = (env<<3) + sin_tab[ ( ((signed int)((phase & ~FREQ_MASK) + pm )) >> FREQ_SH ) & SIN_MASK ];
+ p = (env<<3) + sin_tab[ ( ((signed int)((phase & ~FREQ_MASK) + pm )) >> FREQ_SH ) & SIN_MASK ];
- if (p >= TL_TAB_LEN)
- return 0;
- return tl_tab[p];
+ if (p >= TL_TAB_LEN)
+ return 0;
+ return tl_tab[p];
}
INLINE void chan_calc(YM2612 *F2612, FM_OPN *OPN, FM_CH *CH)
{
- UINT32 AM = OPN->LFO_AM >> CH->ams;
- unsigned int eg_out = volume_calc(&CH->SLOT[SLOT1]);
-
- OPN->m2 = OPN->c1 = OPN->c2 = OPN->mem = 0;
-
- *CH->mem_connect = CH->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
-
- {
- INT32 out = CH->op1_out[0] + CH->op1_out[1];
- CH->op1_out[0] = CH->op1_out[1];
-
- if( !CH->connect1 )
- {
- /* algorithm 5 */
- OPN->mem = OPN->c1 = OPN->c2 = CH->op1_out[0];
- }
- else
- {
- /* other algorithms */
- *CH->connect1 += CH->op1_out[0];
- }
-
-
- CH->op1_out[1] = 0;
- if( eg_out < ENV_QUIET ) /* SLOT 1 */
- {
- if (!CH->FB)
- out=0;
-
- CH->op1_out[1] = op_calc1(CH->SLOT[SLOT1].phase, eg_out, (out<<CH->FB) );
- }
- }
-
- eg_out = volume_calc(&CH->SLOT[SLOT3]);
- if( eg_out < ENV_QUIET ) /* SLOT 3 */
- *CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, OPN->m2);
-
- eg_out = volume_calc(&CH->SLOT[SLOT2]);
- if( eg_out < ENV_QUIET ) /* SLOT 2 */
- *CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, OPN->c1);
-
- eg_out = volume_calc(&CH->SLOT[SLOT4]);
- if( eg_out < ENV_QUIET ) /* SLOT 4 */
- *CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, OPN->c2);
-
-
- /* store current MEM */
- CH->mem_value = OPN->mem;
-
- /* update phase counters AFTER output calculations */
- if(CH->pms)
- {
- /* add support for 3 slot mode */
- if ((OPN->ST.mode & 0xC0) && (CH == &F2612->CH[2]))
- {
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT1], CH->pms, OPN->SL3.block_fnum[1]);
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT2], CH->pms, OPN->SL3.block_fnum[2]);
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT3], CH->pms, OPN->SL3.block_fnum[0]);
- update_phase_lfo_slot(OPN, &CH->SLOT[SLOT4], CH->pms, CH->block_fnum);
- }
- else update_phase_lfo_channel(OPN, CH);
- }
- else /* no LFO phase modulation */
- {
- CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr;
- CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr;
- CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr;
- CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr;
- }
+ UINT32 AM = OPN->LFO_AM >> CH->ams;
+ unsigned int eg_out = volume_calc(&CH->SLOT[SLOT1]);
+
+ OPN->m2 = OPN->c1 = OPN->c2 = OPN->mem = 0;
+
+ *CH->mem_connect = CH->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
+
+ {
+ INT32 out = CH->op1_out[0] + CH->op1_out[1];
+ CH->op1_out[0] = CH->op1_out[1];
+
+ if( !CH->connect1 )
+ {
+ /* algorithm 5 */
+ OPN->mem = OPN->c1 = OPN->c2 = CH->op1_out[0];
+ }
+ else
+ {
+ /* other algorithms */
+ *CH->connect1 += CH->op1_out[0];
+ }
+
+
+ CH->op1_out[1] = 0;
+ if( eg_out < ENV_QUIET ) /* SLOT 1 */
+ {
+ if (!CH->FB)
+ out=0;
+
+ CH->op1_out[1] = op_calc1(CH->SLOT[SLOT1].phase, eg_out, (out<<CH->FB) );
+ }
+ }
+
+ eg_out = volume_calc(&CH->SLOT[SLOT3]);
+ if( eg_out < ENV_QUIET ) /* SLOT 3 */
+ *CH->connect3 += op_calc(CH->SLOT[SLOT3].phase, eg_out, OPN->m2);
+
+ eg_out = volume_calc(&CH->SLOT[SLOT2]);
+ if( eg_out < ENV_QUIET ) /* SLOT 2 */
+ *CH->connect2 += op_calc(CH->SLOT[SLOT2].phase, eg_out, OPN->c1);
+
+ eg_out = volume_calc(&CH->SLOT[SLOT4]);
+ if( eg_out < ENV_QUIET ) /* SLOT 4 */
+ *CH->connect4 += op_calc(CH->SLOT[SLOT4].phase, eg_out, OPN->c2);
+
+
+ /* store current MEM */
+ CH->mem_value = OPN->mem;
+
+ /* update phase counters AFTER output calculations */
+ if(CH->pms)
+ {
+ /* add support for 3 slot mode */
+ if ((OPN->ST.mode & 0xC0) && (CH == &F2612->CH[2]))
+ {
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT1], CH->pms, OPN->SL3.block_fnum[1]);
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT2], CH->pms, OPN->SL3.block_fnum[2]);
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT3], CH->pms, OPN->SL3.block_fnum[0]);
+ update_phase_lfo_slot(OPN, &CH->SLOT[SLOT4], CH->pms, CH->block_fnum);
+ }
+ else update_phase_lfo_channel(OPN, CH);
+ }
+ else /* no LFO phase modulation */
+ {
+ CH->SLOT[SLOT1].phase += CH->SLOT[SLOT1].Incr;
+ CH->SLOT[SLOT2].phase += CH->SLOT[SLOT2].Incr;
+ CH->SLOT[SLOT3].phase += CH->SLOT[SLOT3].Incr;
+ CH->SLOT[SLOT4].phase += CH->SLOT[SLOT4].Incr;
+ }
}
static void FMCloseTable( void )
@@ -1732,36 +1732,36 @@ static void OPNWriteMode(FM_OPN *OPN, int r, int v)
switch(r)
{
- case 0x21: /* Test */
+ case 0x21: /* Test */
break;
- case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/YM2612) */
+ case 0x22: /* LFO FREQ (YM2608/YM2610/YM2610B/YM2612) */
if (v&8) /* LFO enabled ? */
{
OPN->lfo_timer_overflow = lfo_samples_per_step[v&7] << LFO_SH;
}
else
{
- /* hold LFO waveform in reset state */
+ /* hold LFO waveform in reset state */
OPN->lfo_timer_overflow = 0;
- OPN->lfo_timer = 0;
- OPN->lfo_cnt = 0;
- OPN->LFO_PM = 0;
- OPN->LFO_AM = 126;
+ OPN->lfo_timer = 0;
+ OPN->lfo_cnt = 0;
+ OPN->LFO_PM = 0;
+ OPN->LFO_AM = 126;
}
break;
- case 0x24: /* timer A High 8*/
+ case 0x24: /* timer A High 8*/
OPN->ST.TA = (OPN->ST.TA & 0x03)|(((int)v)<<2);
break;
- case 0x25: /* timer A Low 2*/
+ case 0x25: /* timer A Low 2*/
OPN->ST.TA = (OPN->ST.TA & 0x3fc)|(v&3);
break;
- case 0x26: /* timer B */
+ case 0x26: /* timer B */
OPN->ST.TB = v;
break;
- case 0x27: /* mode, timer control */
+ case 0x27: /* mode, timer control */
set_timers( OPN, &(OPN->ST),OPN->ST.param,v );
break;
- case 0x28: /* key on / off */
+ case 0x28: /* key on / off */
c = v & 0x03;
if( c == 3 ) break;
if( (v&0x04) && (OPN->type & TYPE_6CH) ) c+=3;
@@ -1793,19 +1793,19 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
SLOT = &(CH->SLOT[OPN_SLOT(r)]);
switch( r & 0xf0 ) {
- case 0x30: /* DET , MUL */
+ case 0x30: /* DET , MUL */
set_det_mul(&OPN->ST,CH,SLOT,v);
break;
- case 0x40: /* TL */
+ case 0x40: /* TL */
set_tl(CH,SLOT,v);
break;
- case 0x50: /* KS, AR */
+ case 0x50: /* KS, AR */
set_ar_ksr(OPN->type,CH,SLOT,v);
break;
- case 0x60: /* bit7 = AM ENABLE, DR */
+ case 0x60: /* bit7 = AM ENABLE, DR */
set_dr(OPN->type, SLOT,v);
if(OPN->type & TYPE_LFOPAN) /* YM2608/2610/2610B/2612 */
@@ -1814,18 +1814,18 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
}
break;
- case 0x70: /* SR */
+ case 0x70: /* SR */
set_sr(OPN->type,SLOT,v);
break;
- case 0x80: /* SL, RR */
+ case 0x80: /* SL, RR */
set_sl_rr(OPN->type,SLOT,v);
break;
- case 0x90: /* SSG-EG */
+ case 0x90: /* SSG-EG */
SLOT->ssg = v&0x0f;
- /* recalculate EG output */
+ /* recalculate EG output */
if ((SLOT->ssg&0x08) && (SLOT->ssgn ^ (SLOT->ssg&0x04)) && (SLOT->state > EG_REL))
SLOT->vol_out = ((UINT32)(0x200 - SLOT->volume) & MAX_ATT_INDEX) + SLOT->tl;
else
@@ -1833,77 +1833,77 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
/* SSG-EG envelope shapes :
- E AtAlH
- 1 0 0 0 \\\\
+ E AtAlH
+ 1 0 0 0 \\\\
- 1 0 0 1 \___
+ 1 0 0 1 \___
- 1 0 1 0 \/\/
- ___
- 1 0 1 1 \
+ 1 0 1 0 \/\/
+ ___
+ 1 0 1 1 \
- 1 1 0 0 ////
- ___
- 1 1 0 1 /
+ 1 1 0 0 ////
+ ___
+ 1 1 0 1 /
- 1 1 1 0 /\/\
+ 1 1 1 0 /\/\
- 1 1 1 1 /___
+ 1 1 1 1 /___
- E = SSG-EG enable
+ E = SSG-EG enable
- The shapes are generated using Attack, Decay and Sustain phases.
+ The shapes are generated using Attack, Decay and Sustain phases.
- Each single character in the diagrams above represents this whole
- sequence:
+ Each single character in the diagrams above represents this whole
+ sequence:
- - when KEY-ON = 1, normal Attack phase is generated (*without* any
- difference when compared to normal mode),
+ - when KEY-ON = 1, normal Attack phase is generated (*without* any
+ difference when compared to normal mode),
- - later, when envelope level reaches minimum level (max volume),
- the EG switches to Decay phase (which works with bigger steps
- when compared to normal mode - see below),
+ - later, when envelope level reaches minimum level (max volume),
+ the EG switches to Decay phase (which works with bigger steps
+ when compared to normal mode - see below),
- - later when envelope level passes the SL level,
- the EG swithes to Sustain phase (which works with bigger steps
- when compared to normal mode - see below),
+ - later when envelope level passes the SL level,
+ the EG swithes to Sustain phase (which works with bigger steps
+ when compared to normal mode - see below),
- - finally when envelope level reaches maximum level (min volume),
- the EG switches to Attack phase again (depends on actual waveform).
+ - finally when envelope level reaches maximum level (min volume),
+ the EG switches to Attack phase again (depends on actual waveform).
- Important is that when switch to Attack phase occurs, the phase counter
- of that operator will be zeroed-out (as in normal KEY-ON) but not always.
- (I havent found the rule for that - perhaps only when the output level is low)
+ Important is that when switch to Attack phase occurs, the phase counter
+ of that operator will be zeroed-out (as in normal KEY-ON) but not always.
+ (I havent found the rule for that - perhaps only when the output level is low)
- The difference (when compared to normal Envelope Generator mode) is
- that the resolution in Decay and Sustain phases is 4 times lower;
- this results in only 256 steps instead of normal 1024.
- In other words:
- when SSG-EG is disabled, the step inside of the EG is one,
- when SSG-EG is enabled, the step is four (in Decay and Sustain phases).
+ The difference (when compared to normal Envelope Generator mode) is
+ that the resolution in Decay and Sustain phases is 4 times lower;
+ this results in only 256 steps instead of normal 1024.
+ In other words:
+ when SSG-EG is disabled, the step inside of the EG is one,
+ when SSG-EG is enabled, the step is four (in Decay and Sustain phases).
- Times between the level changes are the same in both modes.
+ Times between the level changes are the same in both modes.
- Important:
- Decay 1 Level (so called SL) is compared to actual SSG-EG output, so
- it is the same in both SSG and no-SSG modes, with this exception:
+ Important:
+ Decay 1 Level (so called SL) is compared to actual SSG-EG output, so
+ it is the same in both SSG and no-SSG modes, with this exception:
- when the SSG-EG is enabled and is generating raising levels
- (when the EG output is inverted) the SL will be found at wrong level !!!
- For example, when SL=02:
- 0 -6 = -6dB in non-inverted EG output
- 96-6 = -90dB in inverted EG output
- Which means that EG compares its level to SL as usual, and that the
- output is simply inverted afterall.
+ when the SSG-EG is enabled and is generating raising levels
+ (when the EG output is inverted) the SL will be found at wrong level !!!
+ For example, when SL=02:
+ 0 -6 = -6dB in non-inverted EG output
+ 96-6 = -90dB in inverted EG output
+ Which means that EG compares its level to SL as usual, and that the
+ output is simply inverted afterall.
- The Yamaha's manuals say that AR should be set to 0x1f (max speed).
- That is not necessary, but then EG will be generating Attack phase.
+ The Yamaha's manuals say that AR should be set to 0x1f (max speed).
+ That is not necessary, but then EG will be generating Attack phase.
- */
+ */
break;
@@ -1911,7 +1911,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
case 0xa0:
switch( OPN_SLOT(r) )
{
- case 0: /* 0xa0-0xa2 : FNUM1 */
+ case 0: /* 0xa0-0xa2 : FNUM1 */
{
UINT32 fn = (((UINT32)( (OPN->ST.fn_h)&7))<<8) + v;
UINT8 blk = OPN->ST.fn_h>>3;
@@ -1926,10 +1926,10 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
CH->SLOT[SLOT1].Incr=-1;
}
break;
- case 1: /* 0xa4-0xa6 : FNUM2,BLK */
+ case 1: /* 0xa4-0xa6 : FNUM2,BLK */
OPN->ST.fn_h = v&0x3f;
break;
- case 2: /* 0xa8-0xaa : 3CH FNUM1 */
+ case 2: /* 0xa8-0xaa : 3CH FNUM1 */
if(r < 0x100)
{
UINT32 fn = (((UINT32)(OPN->SL3.fn_h&7))<<8) + v;
@@ -1942,7 +1942,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
(OPN->P_CH)[2].SLOT[SLOT1].Incr=-1;
}
break;
- case 3: /* 0xac-0xae : 3CH FNUM2,BLK */
+ case 3: /* 0xac-0xae : 3CH FNUM2,BLK */
if(r < 0x100)
OPN->SL3.fn_h = v&0x3f;
break;
@@ -1952,7 +1952,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
case 0xb0:
switch( OPN_SLOT(r) )
{
- case 0: /* 0xb0-0xb2 : FB,ALGO */
+ case 0: /* 0xb0-0xb2 : FB,ALGO */
{
int feedback = (v>>3)&7;
CH->ALGO = v&7;
@@ -1960,7 +1960,7 @@ static void OPNWriteReg(FM_OPN *OPN, int r, int v)
setup_connection( OPN, CH, c );
}
break;
- case 1: /* 0xb4-0xb6 : L , R , AMS , PMS (YM2612/YM2610B/YM2610/YM2608) */
+ case 1: /* 0xb4-0xb6 : L , R , AMS , PMS (YM2612/YM2610B/YM2610/YM2608) */
if( OPN->type & TYPE_LFOPAN)
{
/* b0-2 PMS */
@@ -1998,7 +1998,7 @@ static void init_timetables(FM_OPN *OPN, double freqbase)
}
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
- but LFO works with one more bit of a precision so we really need 4096 elements */
+ but LFO works with one more bit of a precision so we really need 4096 elements */
/* calculate fnumber -> increment counter table */
for(i = 0; i < 4096; i++)
{
@@ -2072,14 +2072,14 @@ static void init_tables(void)
/* we never reach (1<<16) here due to the (x+1) */
/* result fits within 16 bits at maximum */
- n = (int)m; /* 16 bits here */
- n >>= 4; /* 12 bits here */
- if (n&1) /* round to nearest */
+ n = (int)m; /* 16 bits here */
+ n >>= 4; /* 12 bits here */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
/* 11 bits here (rounded) */
- n <<= 2; /* 13 bits here (as in real chip) */
+ n <<= 2; /* 13 bits here (as in real chip) */
/* 14 bits (with sign bit) */
@@ -2106,14 +2106,14 @@ static void init_tables(void)
/* we never reach zero here due to ((i*2)+1) */
if (m>0.0)
- o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
else
- o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
o = o / (ENV_STEP/4);
n = (int)(2.0*o);
- if (n&1) /* round to nearest */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
@@ -2175,7 +2175,7 @@ void ym2612_update_one(void *chip, FMSAMPLE **buffer, int length)
INT32 *out_fm = OPN->out_fm;
int i;
FMSAMPLE *bufL,*bufR;
- FM_CH *cch[6];
+ FM_CH *cch[6];
int lt,rt;
/* set bufer */
@@ -2322,7 +2322,7 @@ void ym2612_postload(void *chip)
int r;
/* DAC data & port */
- F2612->dacout = ((int)F2612->REGS[0x2a] - 0x80) << 6; /* level unknown */
+ F2612->dacout = ((int)F2612->REGS[0x2a] - 0x80) << 6; /* level unknown */
F2612->dacen = F2612->REGS[0x2d] & 0x80;
/* OPN registers */
/* DT / MULTI , TL , KS / AR , AMON / DR , SR , SL / RR , SSG-EG */
@@ -2360,7 +2360,7 @@ static void YM2612_save_state(YM2612 *F2612, device_t *device)
/* initialize YM2612 emulator(s) */
void * ym2612_init(void *param, device_t *device, int clock, int rate,
- FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler)
+ FM_TIMERHANDLER timer_handler,FM_IRQHANDLER IRQHandler)
{
YM2612 *F2612;
@@ -2452,55 +2452,55 @@ int ym2612_write(void *chip, int a, UINT8 v)
YM2612 *F2612 = (YM2612 *)chip;
int addr;
- v &= 0xff; /* adjust to 8 bit bus */
+ v &= 0xff; /* adjust to 8 bit bus */
switch( a&3)
{
- case 0: /* address port 0 */
+ case 0: /* address port 0 */
F2612->OPN.ST.address = v;
F2612->addr_A1 = 0;
break;
- case 1: /* data port 0 */
+ case 1: /* data port 0 */
if (F2612->addr_A1 != 0)
- break; /* verified on real YM2608 */
+ break; /* verified on real YM2608 */
addr = F2612->OPN.ST.address;
F2612->REGS[addr] = v;
switch( addr & 0xf0 )
{
- case 0x20: /* 0x20-0x2f Mode */
+ case 0x20: /* 0x20-0x2f Mode */
switch( addr )
{
- case 0x2a: /* DAC data (YM2612) */
+ case 0x2a: /* DAC data (YM2612) */
ym2612_update_req(F2612->OPN.ST.param);
- F2612->dacout = ((int)v - 0x80) << 6; /* level unknown */
+ F2612->dacout = ((int)v - 0x80) << 6; /* level unknown */
break;
- case 0x2b: /* DAC Sel (YM2612) */
+ case 0x2b: /* DAC Sel (YM2612) */
/* b7 = dac enable */
F2612->dacen = v & 0x80;
break;
- default: /* OPN section */
+ default: /* OPN section */
ym2612_update_req(F2612->OPN.ST.param);
/* write register */
OPNWriteMode(&(F2612->OPN),addr,v);
}
break;
- default: /* 0x30-0xff OPN section */
+ default: /* 0x30-0xff OPN section */
ym2612_update_req(F2612->OPN.ST.param);
/* write register */
OPNWriteReg(&(F2612->OPN),addr,v);
}
break;
- case 2: /* address port 1 */
+ case 2: /* address port 1 */
F2612->OPN.ST.address = v;
F2612->addr_A1 = 1;
break;
- case 3: /* data port 1 */
+ case 3: /* data port 1 */
if (F2612->addr_A1 != 1)
- break; /* verified on real YM2608 */
+ break; /* verified on real YM2608 */
addr = F2612->OPN.ST.address;
F2612->REGS[addr | 0x100] = v;
@@ -2517,7 +2517,7 @@ UINT8 ym2612_read(void *chip,int a)
switch( a&3)
{
- case 0: /* status 0 */
+ case 0: /* status 0 */
return FM_STATUS_FLAG(&F2612->OPN.ST);
case 1:
case 2:
@@ -2533,17 +2533,17 @@ int ym2612_timer_over(void *chip,int c)
YM2612 *F2612 = (YM2612 *)chip;
if( c )
- { /* Timer B */
+ { /* Timer B */
TimerBOver( &(F2612->OPN.ST) );
}
else
- { /* Timer A */
+ { /* Timer A */
ym2612_update_req(F2612->OPN.ST.param);
/* timer update */
TimerAOver( &(F2612->OPN.ST) );
/* CSM mode key,TL controll */
if ((F2612->OPN.ST.mode & 0xc0) == 0x80)
- { /* CSM mode total level latch and auto key on */
+ { /* CSM mode total level latch and auto key on */
CSMKeyControll( &F2612->OPN, &(F2612->CH[2]) );
}
}
diff --git a/src/emu/sound/fmopl.c b/src/emu/sound/fmopl.c
index 6caf88875e0..119d110ec73 100644
--- a/src/emu/sound/fmopl.c
+++ b/src/emu/sound/fmopl.c
@@ -75,37 +75,37 @@ Revision History:
/* output final shift */
#if (OPL_SAMPLE_BITS==16)
- #define FINAL_SH (0)
- #define MAXOUT (+32767)
- #define MINOUT (-32768)
+ #define FINAL_SH (0)
+ #define MAXOUT (+32767)
+ #define MINOUT (-32768)
#else
- #define FINAL_SH (8)
- #define MAXOUT (+127)
- #define MINOUT (-128)
+ #define FINAL_SH (8)
+ #define MAXOUT (+127)
+ #define MINOUT (-128)
#endif
-#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
-#define EG_SH 16 /* 16.16 fixed point (EG timing) */
-#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
-#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
+#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
+#define EG_SH 16 /* 16.16 fixed point (EG timing) */
+#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
+#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
-#define FREQ_MASK ((1<<FREQ_SH)-1)
+#define FREQ_MASK ((1<<FREQ_SH)-1)
/* envelope output entries */
-#define ENV_BITS 10
-#define ENV_LEN (1<<ENV_BITS)
-#define ENV_STEP (128.0/ENV_LEN)
+#define ENV_BITS 10
+#define ENV_LEN (1<<ENV_BITS)
+#define ENV_STEP (128.0/ENV_LEN)
-#define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/
-#define MIN_ATT_INDEX (0)
+#define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/
+#define MIN_ATT_INDEX (0)
/* sinwave entries */
-#define SIN_BITS 10
-#define SIN_LEN (1<<SIN_BITS)
-#define SIN_MASK (SIN_LEN-1)
+#define SIN_BITS 10
+#define SIN_LEN (1<<SIN_BITS)
+#define SIN_MASK (SIN_LEN-1)
-#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
+#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
@@ -115,11 +115,11 @@ Revision History:
/* Envelope Generator phases */
-#define EG_ATT 4
-#define EG_DEC 3
-#define EG_SUS 2
-#define EG_REL 1
-#define EG_OFF 0
+#define EG_ATT 4
+#define EG_DEC 3
+#define EG_SUS 2
+#define EG_REL 1
+#define EG_OFF 0
/* save output as raw 16-bit sample */
@@ -163,15 +163,15 @@ INLINE signed int acc_calc(signed int value)
static FILE *sample[1];
- #if 1 /*save to MONO file */
+ #if 1 /*save to MONO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = acc_calc(lt); \
+ { signed int pom = acc_calc(lt); \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
- #else /*save to STEREO file */
+ #else /*save to STEREO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = lt; \
+ { signed int pom = lt; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
pom = rt; \
@@ -200,89 +200,89 @@ static FILE * cymfile = NULL;
struct OPL_SLOT
{
- UINT32 ar; /* attack rate: AR<<2 */
- UINT32 dr; /* decay rate: DR<<2 */
- UINT32 rr; /* release rate:RR<<2 */
- UINT8 KSR; /* key scale rate */
- UINT8 ksl; /* keyscale level */
- UINT8 ksr; /* key scale rate: kcode>>KSR */
- UINT8 mul; /* multiple: mul_tab[ML] */
+ UINT32 ar; /* attack rate: AR<<2 */
+ UINT32 dr; /* decay rate: DR<<2 */
+ UINT32 rr; /* release rate:RR<<2 */
+ UINT8 KSR; /* key scale rate */
+ UINT8 ksl; /* keyscale level */
+ UINT8 ksr; /* key scale rate: kcode>>KSR */
+ UINT8 mul; /* multiple: mul_tab[ML] */
/* Phase Generator */
- UINT32 Cnt; /* frequency counter */
- UINT32 Incr; /* frequency counter step */
- UINT8 FB; /* feedback shift value */
- INT32 *connect1; /* slot1 output pointer */
- INT32 op1_out[2]; /* slot1 output for feedback */
- UINT8 CON; /* connection (algorithm) type */
+ UINT32 Cnt; /* frequency counter */
+ UINT32 Incr; /* frequency counter step */
+ UINT8 FB; /* feedback shift value */
+ INT32 *connect1; /* slot1 output pointer */
+ INT32 op1_out[2]; /* slot1 output for feedback */
+ UINT8 CON; /* connection (algorithm) type */
/* Envelope Generator */
- UINT8 eg_type; /* percussive/non-percussive mode */
- UINT8 state; /* phase type */
- UINT32 TL; /* total level: TL << 2 */
- INT32 TLL; /* adjusted now TL */
- INT32 volume; /* envelope counter */
- UINT32 sl; /* sustain level: sl_tab[SL] */
- UINT8 eg_sh_ar; /* (attack state) */
- UINT8 eg_sel_ar; /* (attack state) */
- UINT8 eg_sh_dr; /* (decay state) */
- UINT8 eg_sel_dr; /* (decay state) */
- UINT8 eg_sh_rr; /* (release state) */
- UINT8 eg_sel_rr; /* (release state) */
- UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
+ UINT8 eg_type; /* percussive/non-percussive mode */
+ UINT8 state; /* phase type */
+ UINT32 TL; /* total level: TL << 2 */
+ INT32 TLL; /* adjusted now TL */
+ INT32 volume; /* envelope counter */
+ UINT32 sl; /* sustain level: sl_tab[SL] */
+ UINT8 eg_sh_ar; /* (attack state) */
+ UINT8 eg_sel_ar; /* (attack state) */
+ UINT8 eg_sh_dr; /* (decay state) */
+ UINT8 eg_sel_dr; /* (decay state) */
+ UINT8 eg_sh_rr; /* (release state) */
+ UINT8 eg_sel_rr; /* (release state) */
+ UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
/* LFO */
- UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
- UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
+ UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
+ UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
/* waveform select */
- UINT16 wavetable;
+ UINT16 wavetable;
};
struct OPL_CH
{
OPL_SLOT SLOT[2];
/* phase generator state */
- UINT32 block_fnum; /* block+fnum */
- UINT32 fc; /* Freq. Increment base */
- UINT32 ksl_base; /* KeyScaleLevel Base step */
- UINT8 kcode; /* key code (for key scaling) */
+ UINT32 block_fnum; /* block+fnum */
+ UINT32 fc; /* Freq. Increment base */
+ UINT32 ksl_base; /* KeyScaleLevel Base step */
+ UINT8 kcode; /* key code (for key scaling) */
};
/* OPL state */
struct FM_OPL
{
/* FM channel slots */
- OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/
+ OPL_CH P_CH[9]; /* OPL/OPL2 chips have 9 channels*/
- UINT32 eg_cnt; /* global envelope generator counter */
- UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
- UINT32 eg_timer_add; /* step of eg_timer */
- UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
+ UINT32 eg_cnt; /* global envelope generator counter */
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
+ UINT32 eg_timer_add; /* step of eg_timer */
+ UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
- UINT8 rhythm; /* Rhythm mode */
+ UINT8 rhythm; /* Rhythm mode */
- UINT32 fn_tab[1024]; /* fnumber->increment counter */
+ UINT32 fn_tab[1024]; /* fnumber->increment counter */
/* LFO */
- UINT32 LFO_AM;
- INT32 LFO_PM;
+ UINT32 LFO_AM;
+ INT32 LFO_PM;
- UINT8 lfo_am_depth;
- UINT8 lfo_pm_depth_range;
- UINT32 lfo_am_cnt;
- UINT32 lfo_am_inc;
- UINT32 lfo_pm_cnt;
- UINT32 lfo_pm_inc;
+ UINT8 lfo_am_depth;
+ UINT8 lfo_pm_depth_range;
+ UINT32 lfo_am_cnt;
+ UINT32 lfo_am_inc;
+ UINT32 lfo_pm_cnt;
+ UINT32 lfo_pm_inc;
- UINT32 noise_rng; /* 23 bit noise shift register */
- UINT32 noise_p; /* current noise 'phase' */
- UINT32 noise_f; /* current noise period */
+ UINT32 noise_rng; /* 23 bit noise shift register */
+ UINT32 noise_p; /* current noise 'phase' */
+ UINT32 noise_f; /* current noise period */
- UINT8 wavesel; /* waveform select enable flag */
+ UINT8 wavesel; /* waveform select enable flag */
- UINT32 T[2]; /* timer counters */
- UINT8 st[2]; /* timer enable */
+ UINT32 T[2]; /* timer counters */
+ UINT8 st[2]; /* timer enable */
#if BUILD_Y8950
/* Delta-T ADPCM unit (Y8950) */
@@ -290,40 +290,40 @@ struct FM_OPL
YM_DELTAT *deltat;
/* Keyboard and I/O ports interface */
- UINT8 portDirection;
- UINT8 portLatch;
+ UINT8 portDirection;
+ UINT8 portLatch;
OPL_PORTHANDLER_R porthandler_r;
OPL_PORTHANDLER_W porthandler_w;
- void * port_param;
+ void * port_param;
OPL_PORTHANDLER_R keyboardhandler_r;
OPL_PORTHANDLER_W keyboardhandler_w;
- void * keyboard_param;
+ void * keyboard_param;
#endif
/* external event callback handlers */
- OPL_TIMERHANDLER timer_handler; /* TIMER handler */
- void *TimerParam; /* TIMER parameter */
- OPL_IRQHANDLER IRQHandler; /* IRQ handler */
- void *IRQParam; /* IRQ parameter */
+ OPL_TIMERHANDLER timer_handler; /* TIMER handler */
+ void *TimerParam; /* TIMER parameter */
+ OPL_IRQHANDLER IRQHandler; /* IRQ handler */
+ void *IRQParam; /* IRQ parameter */
OPL_UPDATEHANDLER UpdateHandler;/* stream update handler */
- void *UpdateParam; /* stream update parameter */
-
- UINT8 type; /* chip type */
- UINT8 address; /* address register */
- UINT8 status; /* status flag */
- UINT8 statusmask; /* status mask */
- UINT8 mode; /* Reg.08 : CSM,notesel,etc. */
-
- UINT32 clock; /* master clock (Hz) */
- UINT32 rate; /* sampling rate (Hz) */
- double freqbase; /* frequency base */
- attotime TimerBase; /* Timer base time (==sampling time)*/
+ void *UpdateParam; /* stream update parameter */
+
+ UINT8 type; /* chip type */
+ UINT8 address; /* address register */
+ UINT8 status; /* status flag */
+ UINT8 statusmask; /* status mask */
+ UINT8 mode; /* Reg.08 : CSM,notesel,etc. */
+
+ UINT32 clock; /* master clock (Hz) */
+ UINT32 rate; /* sampling rate (Hz) */
+ double freqbase; /* frequency base */
+ attotime TimerBase; /* Timer base time (==sampling time)*/
device_t *device;
- signed int phase_modulation; /* phase modulation input (SLOT 2) */
+ signed int phase_modulation; /* phase modulation input (SLOT 2) */
signed int output[1];
#if BUILD_Y8950
- INT32 output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
+ INT32 output_deltat[4]; /* for Y8950 DELTA-T, chip is mono, that 4 here is just for safety */
#endif
};
@@ -332,8 +332,8 @@ struct FM_OPL
/* mapping of register number (offset) to slot number used by the emulator */
static const int slot_array[32]=
{
- 0, 2, 4, 1, 3, 5,-1,-1,
- 6, 8,10, 7, 9,11,-1,-1,
+ 0, 2, 4, 1, 3, 5,-1,-1,
+ 6, 8,10, 7, 9,11,-1,-1,
12,14,16,13,15,17,-1,-1,
-1,-1,-1,-1,-1,-1,-1,-1
};
@@ -345,42 +345,42 @@ static const int slot_array[32]=
static const UINT32 ksl_tab[8*16]=
{
/* OCT 0 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
/* OCT 1 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
- 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
+ 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
/* OCT 2 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
- 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
- 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
+ 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
+ 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
/* OCT 3 */
- 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
- 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
- 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
- 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
+ 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
+ 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
+ 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
/* OCT 4 */
- 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
- 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
- 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
+ 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
+ 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
+ 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
10.875/DV,11.250/DV,11.625/DV,12.000/DV,
/* OCT 5 */
- 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
- 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
+ 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
+ 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
12.000/DV,12.750/DV,13.125/DV,13.500/DV,
13.875/DV,14.250/DV,14.625/DV,15.000/DV,
/* OCT 6 */
- 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
+ 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
12.000/DV,13.125/DV,13.875/DV,14.625/DV,
15.000/DV,15.750/DV,16.125/DV,16.500/DV,
16.875/DV,17.250/DV,17.625/DV,18.000/DV,
/* OCT 7 */
- 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
+ 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
15.000/DV,16.125/DV,16.875/DV,17.625/DV,
18.000/DV,18.750/DV,19.125/DV,19.500/DV,
19.875/DV,20.250/DV,20.625/DV,21.000/DV
@@ -391,8 +391,8 @@ static const UINT32 ksl_tab[8*16]=
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
#define SC(db) (UINT32) ( db * (2.0/ENV_STEP) )
static const UINT32 sl_tab[16]={
- SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
- SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
+ SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
+ SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
};
#undef SC
@@ -426,7 +426,7 @@ static const unsigned char eg_inc[15*RATE_STEPS]={
#define O(a) (a*RATE_STEPS)
/*note that there is no O(13) in this table - it's directly in the code */
-static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
+static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
@@ -467,7 +467,7 @@ O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
/*mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0 */
#define O(a) (a*1)
-static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
+static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
@@ -508,8 +508,8 @@ O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
#define ML 2
static const UINT8 mul_tab[16]= {
/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
- 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
- 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
+ 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
+ 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
};
#undef ML
@@ -521,7 +521,7 @@ static const UINT8 mul_tab[16]= {
#define TL_TAB_LEN (12*2*TL_RES_LEN)
static signed int tl_tab[TL_TAB_LEN];
-#define ENV_QUIET (TL_TAB_LEN>>4)
+#define ENV_QUIET (TL_TAB_LEN>>4)
/* sin waveform table in 'decibel' scale */
/* four waveforms on OPL2 type chips */
@@ -602,36 +602,36 @@ static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
static const INT8 lfo_pm_table[8*8*2] = {
/* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */
-0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
-0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
+0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
+0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */
-0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
-1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
+0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
+1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */
-1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
-2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
+1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
+2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */
-1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
-3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
+1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
+3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */
-2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
-4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
+2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
+4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */
-2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
-5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
+2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
+5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */
-3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
-6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
+3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
+6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */
-3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
-7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/
+3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
+7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/
};
@@ -665,7 +665,7 @@ INLINE void OPL_STATUS_SET(FM_OPL *OPL,int flag)
if(!(OPL->status & 0x80))
{
if(OPL->status & OPL->statusmask)
- { /* IRQ on */
+ { /* IRQ on */
OPL->status |= 0x80;
/* callback user interrupt handler (IRQ is OFF to ON) */
if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1);
@@ -706,7 +706,7 @@ INLINE void advance_lfo(FM_OPL *OPL)
/* LFO */
OPL->lfo_am_cnt += OPL->lfo_am_inc;
- if (OPL->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
+ if (OPL->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
OPL->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH);
tmp = lfo_am_table[ OPL->lfo_am_cnt >> LFO_SH ];
@@ -743,12 +743,12 @@ INLINE void advance(FM_OPL *OPL)
/* Envelope Generator */
switch(op->state)
{
- case EG_ATT: /* attack phase */
+ case EG_ATT: /* attack phase */
if ( !(OPL->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
{
op->volume += (~op->volume *
- (eg_inc[op->eg_sel_ar + ((OPL->eg_cnt>>op->eg_sh_ar)&7)])
- ) >>3;
+ (eg_inc[op->eg_sel_ar + ((OPL->eg_cnt>>op->eg_sh_ar)&7)])
+ ) >>3;
if (op->volume <= MIN_ATT_INDEX)
{
@@ -759,7 +759,7 @@ INLINE void advance(FM_OPL *OPL)
}
break;
- case EG_DEC: /* decay phase */
+ case EG_DEC: /* decay phase */
if ( !(OPL->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
{
op->volume += eg_inc[op->eg_sel_dr + ((OPL->eg_cnt>>op->eg_sh_dr)&7)];
@@ -770,17 +770,17 @@ INLINE void advance(FM_OPL *OPL)
}
break;
- case EG_SUS: /* sustain phase */
+ case EG_SUS: /* sustain phase */
/* this is important behaviour:
- one can change percusive/non-percussive modes on the fly and
- the chip will remain in sustain phase - verified on real YM3812 */
+ one can change percusive/non-percussive modes on the fly and
+ the chip will remain in sustain phase - verified on real YM3812 */
- if(op->eg_type) /* non-percussive mode */
+ if(op->eg_type) /* non-percussive mode */
{
/* do nothing */
}
- else /* percussive mode */
+ else /* percussive mode */
{
/* during sustain phase chip adds Release Rate (in percussive mode) */
if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
@@ -794,7 +794,7 @@ INLINE void advance(FM_OPL *OPL)
}
break;
- case EG_REL: /* release phase */
+ case EG_REL: /* release phase */
if ( !(OPL->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
{
op->volume += eg_inc[op->eg_sel_rr + ((OPL->eg_cnt>>op->eg_sh_rr)&7)];
@@ -829,52 +829,52 @@ INLINE void advance(FM_OPL *OPL)
signed int lfo_fn_table_index_offset = lfo_pm_table[OPL->LFO_PM + 16*fnum_lfo ];
- if (lfo_fn_table_index_offset) /* LFO phase modulation active */
+ if (lfo_fn_table_index_offset) /* LFO phase modulation active */
{
block_fnum += lfo_fn_table_index_offset;
block = (block_fnum&0x1c00) >> 10;
op->Cnt += (OPL->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
}
- else /* LFO phase modulation = zero */
+ else /* LFO phase modulation = zero */
{
op->Cnt += op->Incr;
}
}
- else /* LFO phase modulation disabled for this operator */
+ else /* LFO phase modulation disabled for this operator */
{
op->Cnt += op->Incr;
}
}
/* The Noise Generator of the YM3812 is 23-bit shift register.
- * Period is equal to 2^23-2 samples.
- * Register works at sampling frequency of the chip, so output
- * can change on every sample.
- *
- * Output of the register and input to the bit 22 is:
- * bit0 XOR bit14 XOR bit15 XOR bit22
- *
- * Simply use bit 22 as the noise output.
- */
+ * Period is equal to 2^23-2 samples.
+ * Register works at sampling frequency of the chip, so output
+ * can change on every sample.
+ *
+ * Output of the register and input to the bit 22 is:
+ * bit0 XOR bit14 XOR bit15 XOR bit22
+ *
+ * Simply use bit 22 as the noise output.
+ */
OPL->noise_p += OPL->noise_f;
- i = OPL->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
+ i = OPL->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
OPL->noise_p &= FREQ_MASK;
while (i)
{
/*
- UINT32 j;
- j = ( (OPL->noise_rng) ^ (OPL->noise_rng>>14) ^ (OPL->noise_rng>>15) ^ (OPL->noise_rng>>22) ) & 1;
- OPL->noise_rng = (j<<22) | (OPL->noise_rng>>1);
- */
+ UINT32 j;
+ j = ( (OPL->noise_rng) ^ (OPL->noise_rng>>14) ^ (OPL->noise_rng>>15) ^ (OPL->noise_rng>>22) ) & 1;
+ OPL->noise_rng = (j<<22) | (OPL->noise_rng>>1);
+ */
/*
- Instead of doing all the logic operations above, we
- use a trick here (and use bit 0 as the noise output).
- The difference is only that the noise bit changes one
- step ahead. This doesn't matter since we don't know
- what is real state of the noise_rng after the reset.
- */
+ Instead of doing all the logic operations above, we
+ use a trick here (and use bit 0 as the noise output).
+ The difference is only that the noise bit changes one
+ step ahead. This doesn't matter since we don't know
+ what is real state of the noise_rng after the reset.
+ */
if (OPL->noise_rng & 1) OPL->noise_rng ^= 0x800302;
OPL->noise_rng >>= 1;
@@ -984,11 +984,11 @@ INLINE void OPL_CALC_RH( FM_OPL *OPL, OPL_CH *CH, unsigned int noise )
/* Bass Drum (verified on real YM3812):
- - depends on the channel 6 'connect' register:
- when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
- when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
- - output sample always is multiplied by 2
- */
+ - depends on the channel 6 'connect' register:
+ when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
+ when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
+ - output sample always is multiplied by 2
+ */
OPL->phase_modulation = 0;
/* SLOT 1 */
@@ -1031,8 +1031,8 @@ INLINE void OPL_CALC_RH( FM_OPL *OPL, OPL_CH *CH, unsigned int noise )
/* The following formulas can be well optimized.
- I leave them in direct form for now (in case I've missed something).
- */
+ I leave them in direct form for now (in case I've missed something).
+ */
/* High Hat (verified on real YM3812) */
env = volume_calc(SLOT7_1);
@@ -1040,9 +1040,9 @@ INLINE void OPL_CALC_RH( FM_OPL *OPL, OPL_CH *CH, unsigned int noise )
{
/* high hat phase generation:
- phase = d0 or 234 (based on frequency only)
- phase = 34 or 2d0 (based on noise)
- */
+ phase = d0 or 234 (based on frequency only)
+ phase = 34 or 2d0 (based on noise)
+ */
/* base frequency derived from operator 1 in channel 7 */
unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
@@ -1157,14 +1157,14 @@ static int init_tables(void)
/* we never reach (1<<16) here due to the (x+1) */
/* result fits within 16 bits at maximum */
- n = (int)m; /* 16 bits here */
- n >>= 4; /* 12 bits here */
- if (n&1) /* round to nearest */
+ n = (int)m; /* 16 bits here */
+ n >>= 4; /* 12 bits here */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
/* 11 bits here (rounded) */
- n <<= 1; /* 12 bits here (as in real chip) */
+ n <<= 1; /* 12 bits here (as in real chip) */
tl_tab[ x*2 + 0 ] = n;
tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
@@ -1191,14 +1191,14 @@ static int init_tables(void)
/* we never reach zero here due to ((i*2)+1) */
if (m>0.0)
- o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
else
- o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
o = o / (ENV_STEP/4);
n = (int)(2.0*o);
- if (n&1) /* round to nearest */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
@@ -1235,8 +1235,8 @@ static int init_tables(void)
sin_tab[3*SIN_LEN+i] = sin_tab[i & (SIN_MASK>>2)];
/*logerror("FMOPL.C: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] );
- logerror("FMOPL.C: sin2[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[2*SIN_LEN+i], tl_tab[sin_tab[2*SIN_LEN+i]] );
- logerror("FMOPL.C: sin3[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[3*SIN_LEN+i], tl_tab[sin_tab[3*SIN_LEN+i]] );*/
+ logerror("FMOPL.C: sin2[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[2*SIN_LEN+i], tl_tab[sin_tab[2*SIN_LEN+i]] );
+ logerror("FMOPL.C: sin3[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[3*SIN_LEN+i], tl_tab[sin_tab[3*SIN_LEN+i]] );*/
}
/*logerror("FMOPL.C: ENV_QUIET= %08x (dec*8=%i)\n", ENV_QUIET, ENV_QUIET*8 );*/
@@ -1280,7 +1280,7 @@ static void OPL_initalize(FM_OPL *OPL)
OPL->fn_tab[i] = (UINT32)( (double)i * 64 * OPL->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
#if 0
logerror("FMOPL.C: fn_tab[%4i] = %08x (dec=%8i)\n",
- i, OPL->fn_tab[i]>>6, OPL->fn_tab[i]>>6 );
+ i, OPL->fn_tab[i]>>6, OPL->fn_tab[i]>>6 );
#endif
}
@@ -1465,29 +1465,29 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
switch(r&0xe0)
{
- case 0x00: /* 00-1f:control */
+ case 0x00: /* 00-1f:control */
switch(r&0x1f)
{
- case 0x01: /* waveform select enable */
+ case 0x01: /* waveform select enable */
if(OPL->type&OPL_TYPE_WAVESEL)
{
OPL->wavesel = v&0x20;
/* do not change the waveform previously selected */
}
break;
- case 0x02: /* Timer 1 */
+ case 0x02: /* Timer 1 */
OPL->T[0] = (256-v)*4;
break;
- case 0x03: /* Timer 2 */
+ case 0x03: /* Timer 2 */
OPL->T[1] = (256-v)*16;
break;
- case 0x04: /* IRQ clear / mask and Timer enable */
+ case 0x04: /* IRQ clear / mask and Timer enable */
if(v&0x80)
- { /* IRQ flag clear */
+ { /* IRQ flag clear */
OPL_STATUS_RESET(OPL,0x7f-0x08); /* don't reset BFRDY flag or we will have to call deltat module to set the flag */
}
else
- { /* set IRQ mask ,timer enable*/
+ { /* set IRQ mask ,timer enable*/
UINT8 st1 = v&1;
UINT8 st2 = (v>>1)&1;
@@ -1512,7 +1512,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
}
break;
#if BUILD_Y8950
- case 0x06: /* Key Board OUT */
+ case 0x06: /* Key Board OUT */
if(OPL->type&OPL_TYPE_KEYBOARD)
{
if(OPL->keyboardhandler_w)
@@ -1521,12 +1521,12 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
logerror("Y8950: write unmapped KEYBOARD port\n");
}
break;
- case 0x07: /* DELTA-T control 1 : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
+ case 0x07: /* DELTA-T control 1 : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
if(OPL->type&OPL_TYPE_ADPCM)
YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
break;
#endif
- case 0x08: /* MODE,DELTA-T control 2 : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
+ case 0x08: /* MODE,DELTA-T control 2 : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
OPL->mode = v;
#if BUILD_Y8950
if(OPL->type&OPL_TYPE_ADPCM)
@@ -1535,31 +1535,31 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
break;
#if BUILD_Y8950
- case 0x09: /* START ADD */
+ case 0x09: /* START ADD */
case 0x0a:
- case 0x0b: /* STOP ADD */
+ case 0x0b: /* STOP ADD */
case 0x0c:
- case 0x0d: /* PRESCALE */
+ case 0x0d: /* PRESCALE */
case 0x0e:
- case 0x0f: /* ADPCM data write */
- case 0x10: /* DELTA-N */
- case 0x11: /* DELTA-N */
- case 0x12: /* ADPCM volume */
+ case 0x0f: /* ADPCM data write */
+ case 0x10: /* DELTA-N */
+ case 0x11: /* DELTA-N */
+ case 0x12: /* ADPCM volume */
if(OPL->type&OPL_TYPE_ADPCM)
YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
break;
- case 0x15: /* DAC data high 8 bits (F7,F6...F2) */
- case 0x16: /* DAC data low 2 bits (F1, F0 in bits 7,6) */
- case 0x17: /* DAC data shift (S2,S1,S0 in bits 2,1,0) */
+ case 0x15: /* DAC data high 8 bits (F7,F6...F2) */
+ case 0x16: /* DAC data low 2 bits (F1, F0 in bits 7,6) */
+ case 0x17: /* DAC data shift (S2,S1,S0 in bits 2,1,0) */
logerror("FMOPL.C: DAC data register written, but not implemented reg=%02x val=%02x\n",r,v);
break;
- case 0x18: /* I/O CTRL (Direction) */
+ case 0x18: /* I/O CTRL (Direction) */
if(OPL->type&OPL_TYPE_IO)
OPL->portDirection = v&0x0f;
break;
- case 0x19: /* I/O DATA */
+ case 0x19: /* I/O DATA */
if(OPL->type&OPL_TYPE_IO)
{
OPL->portLatch = v;
@@ -1573,7 +1573,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
break;
}
break;
- case 0x20: /* am ON, vib ON, ksr, eg_type, mul */
+ case 0x20: /* am ON, vib ON, ksr, eg_type, mul */
slot = slot_array[r&0x1f];
if(slot < 0) return;
set_mul(OPL,slot,v);
@@ -1594,7 +1594,7 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
set_sl_rr(OPL,slot,v);
break;
case 0xa0:
- if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */
+ if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */
{
OPL->lfo_am_depth = v & 0x80;
OPL->lfo_pm_depth_range = (v&0x40) ? 8 : 0;
@@ -1647,11 +1647,11 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
if( (r&0x0f) > 8) return;
CH = &OPL->P_CH[r&0x0f];
if(!(r&0x10))
- { /* a0-a8 */
+ { /* a0-a8 */
block_fnum = (CH->block_fnum&0x1f00) | v;
}
else
- { /* b0-b8 */
+ { /* b0-b8 */
block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
if(v&0x20)
@@ -1678,13 +1678,13 @@ static void OPLWriteReg(FM_OPL *OPL, int r, int v)
/* BLK 2,1,0 bits -> bits 3,2,1 of kcode */
CH->kcode = (CH->block_fnum&0x1c00)>>9;
- /* the info below is actually opposite to what is stated in the Manuals (verifed on real YM3812) */
+ /* the info below is actually opposite to what is stated in the Manuals (verifed on real YM3812) */
/* if notesel == 0 -> lsb of kcode is bit 10 (MSB) of fnum */
/* if notesel == 1 -> lsb of kcode is bit 9 (MSB-1) of fnum */
if (OPL->mode&0x40)
- CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */
+ CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */
else
- CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */
+ CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */
/* refresh Total Level in both SLOTs of this channel */
CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl);
@@ -1774,8 +1774,8 @@ static void OPLResetChip(FM_OPL *OPL)
OPL->eg_timer = 0;
OPL->eg_cnt = 0;
- OPL->noise_rng = 1; /* noise shift register */
- OPL->mode = 0; /* normal mode */
+ OPL->noise_rng = 1; /* noise shift register */
+ OPL->mode = 0; /* normal mode */
OPL_STATUS_RESET(OPL,0x7f);
/* reset with register write */
@@ -2032,11 +2032,11 @@ static void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,void
static int OPLWrite(FM_OPL *OPL,int a,int v)
{
if( !(a&1) )
- { /* address port */
+ { /* address port */
OPL->address = v & 0xff;
}
else
- { /* data port */
+ { /* data port */
if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
OPLWriteReg(OPL,OPL->address,v);
}
@@ -2051,7 +2051,7 @@ static unsigned char OPLRead(FM_OPL *OPL,int a)
#if BUILD_Y8950
- if(OPL->type&OPL_TYPE_ADPCM) /* Y8950 */
+ if(OPL->type&OPL_TYPE_ADPCM) /* Y8950 */
{
return (OPL->status & (OPL->statusmask|0x80)) | (OPL->deltat->PCM_BSY&1);
}
@@ -2125,15 +2125,15 @@ INLINE void CSMKeyControll(OPL_CH *CH)
static int OPLTimerOver(FM_OPL *OPL,int c)
{
if( c )
- { /* Timer B */
+ { /* Timer B */
OPL_STATUS_SET(OPL,0x20);
}
else
- { /* Timer A */
+ { /* Timer A */
OPL_STATUS_SET(OPL,0x40);
/* CSM mode key,TL controll */
if( OPL->mode & 0x80 )
- { /* CSM mode total level latch and auto key on */
+ { /* CSM mode total level latch and auto key on */
int ch;
if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
for(ch=0; ch<9; ch++)
@@ -2220,9 +2220,9 @@ void ym3812_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *
*/
void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
- FM_OPL *OPL = (FM_OPL *)chip;
- UINT8 rhythm = OPL->rhythm&0x20;
- OPLSAMPLE *buf = buffer;
+ FM_OPL *OPL = (FM_OPL *)chip;
+ UINT8 rhythm = OPL->rhythm&0x20;
+ OPLSAMPLE *buf = buffer;
int i;
for( i=0; i < length ; i++ )
@@ -2247,7 +2247,7 @@ void ym3812_update_one(void *chip, OPLSAMPLE *buffer, int length)
OPL_CALC_CH(OPL, &OPL->P_CH[7]);
OPL_CALC_CH(OPL, &OPL->P_CH[8]);
}
- else /* Rhythm part */
+ else /* Rhythm part */
{
OPL_CALC_RH(OPL, &OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
}
@@ -2347,9 +2347,9 @@ void ym3526_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *
*/
void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
- FM_OPL *OPL = (FM_OPL *)chip;
- UINT8 rhythm = OPL->rhythm&0x20;
- OPLSAMPLE *buf = buffer;
+ FM_OPL *OPL = (FM_OPL *)chip;
+ UINT8 rhythm = OPL->rhythm&0x20;
+ OPLSAMPLE *buf = buffer;
int i;
for( i=0; i < length ; i++ )
@@ -2374,7 +2374,7 @@ void ym3526_update_one(void *chip, OPLSAMPLE *buffer, int length)
OPL_CALC_CH(OPL, &OPL->P_CH[7]);
OPL_CALC_CH(OPL, &OPL->P_CH[8]);
}
- else /* Rhythm part */
+ else /* Rhythm part */
{
OPL_CALC_RH(OPL, &OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
}
@@ -2427,11 +2427,11 @@ void *y8950_init(device_t *device, UINT32 clock, UINT32 rate)
Y8950->deltat->status_set_handler = Y8950_deltat_status_set;
Y8950->deltat->status_reset_handler = Y8950_deltat_status_reset;
Y8950->deltat->status_change_which_chip = Y8950;
- Y8950->deltat->status_change_EOS_bit = 0x10; /* status flag: set bit4 on End Of Sample */
- Y8950->deltat->status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY (End Of: ADPCM analysis/synthesis, memory reading/writing) */
+ Y8950->deltat->status_change_EOS_bit = 0x10; /* status flag: set bit4 on End Of Sample */
+ Y8950->deltat->status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY (End Of: ADPCM analysis/synthesis, memory reading/writing) */
- /*Y8950->deltat->write_time = 10.0 / clock;*/ /* a single byte write takes 10 cycles of main clock */
- /*Y8950->deltat->read_time = 8.0 / clock;*/ /* a single byte read takes 8 cycles of main clock */
+ /*Y8950->deltat->write_time = 10.0 / clock;*/ /* a single byte write takes 10 cycles of main clock */
+ /*Y8950->deltat->read_time = 8.0 / clock;*/ /* a single byte read takes 8 cycles of main clock */
/* reset */
OPL_save_state(Y8950, device);
y8950_reset_chip(Y8950);
@@ -2487,7 +2487,7 @@ void y8950_set_update_handler(void *chip,OPL_UPDATEHANDLER UpdateHandler,void *p
void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_size )
{
- FM_OPL *OPL = (FM_OPL *)chip;
+ FM_OPL *OPL = (FM_OPL *)chip;
OPL->deltat->memory = (UINT8 *)(deltat_mem_ptr);
OPL->deltat->memory_size = deltat_mem_size;
}
@@ -2502,10 +2502,10 @@ void y8950_set_delta_t_memory(void *chip, void * deltat_mem_ptr, int deltat_mem_
void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length)
{
int i;
- FM_OPL *OPL = (FM_OPL *)chip;
- UINT8 rhythm = OPL->rhythm&0x20;
- YM_DELTAT *DELTAT = OPL->deltat;
- OPLSAMPLE *buf = buffer;
+ FM_OPL *OPL = (FM_OPL *)chip;
+ UINT8 rhythm = OPL->rhythm&0x20;
+ YM_DELTAT *DELTAT = OPL->deltat;
+ OPLSAMPLE *buf = buffer;
for( i=0; i < length ; i++ )
{
@@ -2534,7 +2534,7 @@ void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length)
OPL_CALC_CH(OPL, &OPL->P_CH[7]);
OPL_CALC_CH(OPL, &OPL->P_CH[8]);
}
- else /* Rhythm part */
+ else /* Rhythm part */
{
OPL_CALC_RH(OPL, &OPL->P_CH[0], (OPL->noise_rng>>0)&1 );
}
@@ -2563,7 +2563,7 @@ void y8950_update_one(void *chip, OPLSAMPLE *buffer, int length)
void y8950_set_port_handler(void *chip,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,void * param)
{
- FM_OPL *OPL = (FM_OPL *)chip;
+ FM_OPL *OPL = (FM_OPL *)chip;
OPL->porthandler_w = PortHandler_w;
OPL->porthandler_r = PortHandler_r;
OPL->port_param = param;
@@ -2571,11 +2571,10 @@ void y8950_set_port_handler(void *chip,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTH
void y8950_set_keyboard_handler(void *chip,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,void * param)
{
- FM_OPL *OPL = (FM_OPL *)chip;
+ FM_OPL *OPL = (FM_OPL *)chip;
OPL->keyboardhandler_w = KeyboardHandler_w;
OPL->keyboardhandler_r = KeyboardHandler_r;
OPL->keyboard_param = param;
}
#endif
-
diff --git a/src/emu/sound/fmopl.h b/src/emu/sound/fmopl.h
index de0cfa82ea9..f0543742e3e 100644
--- a/src/emu/sound/fmopl.h
+++ b/src/emu/sound/fmopl.h
@@ -14,12 +14,12 @@
/* compiler dependence */
#ifndef __OSDCOMM_H__
#define __OSDCOMM_H__
-typedef unsigned char UINT8; /* unsigned 8bit */
-typedef unsigned short UINT16; /* unsigned 16bit */
-typedef unsigned int UINT32; /* unsigned 32bit */
-typedef signed char INT8; /* signed 8bit */
-typedef signed short INT16; /* signed 16bit */
-typedef signed int INT32; /* signed 32bit */
+typedef unsigned char UINT8; /* unsigned 8bit */
+typedef unsigned short UINT16; /* unsigned 16bit */
+typedef unsigned int UINT32; /* unsigned 32bit */
+typedef signed char INT8; /* signed 8bit */
+typedef signed short INT16; /* signed 16bit */
+typedef signed int INT32; /* signed 32bit */
#endif /* __OSDCOMM_H__ */
typedef stream_sample_t OPLSAMPLE;
diff --git a/src/emu/sound/gaelco.c b/src/emu/sound/gaelco.c
index e0cda5f2bb8..3d2932dcc1f 100644
--- a/src/emu/sound/gaelco.c
+++ b/src/emu/sound/gaelco.c
@@ -49,24 +49,24 @@ static wav_file* wavraw; // Raw waveform
/*============================================================================
- Gaelco GAE1 sound device
+ Gaelco GAE1 sound device
============================================================================*/
const device_type GAELCO_GAE1 = &device_creator<gaelco_gae1_device>;
gaelco_gae1_device::gaelco_gae1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, GAELCO_GAE1, "Gaelco GAE1", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_stream(NULL),
- m_snd_data(NULL)
+ device_sound_interface(mconfig, *this),
+ m_stream(NULL),
+ m_snd_data(NULL)
{
}
gaelco_gae1_device::gaelco_gae1_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_stream(NULL),
- m_snd_data(NULL)
+ device_sound_interface(mconfig, *this),
+ m_stream(NULL),
+ m_snd_data(NULL)
{
}
@@ -81,7 +81,7 @@ void gaelco_gae1_device::sound_stream_update(sound_stream &stream, stream_sample
{
int j, ch;
- /* fill all data needed */
+ /* fill all data needed */
for(j = 0; j < samples; j++){
int output_l = 0, output_r = 0;
@@ -137,9 +137,9 @@ void gaelco_gae1_device::sound_stream_update(sound_stream &stream, stream_sample
/* check if the current sample has finished playing */
if (m_sndregs[base_offset + 3] == 0){
- if (channel->loop == 0){ /* if no looping, we're done */
+ if (channel->loop == 0){ /* if no looping, we're done */
channel->active = 0;
- } else { /* if we're looping, swap chunks */
+ } else { /* if we're looping, swap chunks */
channel->chunkNum = (channel->chunkNum + 1) & 0x01;
/* if the length of the next chunk is 0, we're done */
@@ -231,7 +231,7 @@ WRITE16_MEMBER( gaelco_gae1_device::gaelcosnd_w )
}
/*============================================================================
- CG-1V/GAE1 Init / Close
+ CG-1V/GAE1 Init / Close
============================================================================*/
void gaelco_gae1_device::device_start()
@@ -271,7 +271,7 @@ void gaelco_gae1_device::device_stop()
/*============================================================================
- Gaelco CG-1V sound device
+ Gaelco CG-1V sound device
============================================================================*/
const device_type GAELCO_CG1V = &device_creator<gaelco_cg1v_device>;
diff --git a/src/emu/sound/gaelco.h b/src/emu/sound/gaelco.h
index 76ae621273b..e454ec85c51 100644
--- a/src/emu/sound/gaelco.h
+++ b/src/emu/sound/gaelco.h
@@ -3,8 +3,8 @@
#ifndef __GALELCO_H__
#define __GALELCO_H__
-#define GAELCO_NUM_CHANNELS 0x07
-#define GAELCO_VOLUME_LEVELS 0x10
+#define GAELCO_NUM_CHANNELS 0x07
+#define GAELCO_VOLUME_LEVELS 0x10
//**************************************************************************
@@ -32,9 +32,9 @@
struct gaelco_sound_channel
{
- int active; // is it playing?
- int loop; // = 0 no looping, = 1 looping
- int chunkNum; // current chunk if looping
+ int active; // is it playing?
+ int loop; // = 0 no looping, = 1 looping
+ int chunkNum; // current chunk if looping
};
@@ -42,15 +42,15 @@ struct gaelco_sound_channel
struct gaelcosnd_interface
{
- const char *gfxregion; /* shared gfx region name */
- int banks[4]; /* start of each ROM bank */
+ const char *gfxregion; /* shared gfx region name */
+ int banks[4]; /* start of each ROM bank */
};
// ======================> gaelco_gae1_device
class gaelco_gae1_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
gaelco_gae1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -70,10 +70,10 @@ public:
DECLARE_READ16_MEMBER( gaelcosnd_r );
private:
- sound_stream *m_stream; /* our stream */
- UINT8 *m_snd_data; /* PCM data */
- int m_banks[4]; /* start of each ROM bank */
- gaelco_sound_channel m_channel[GAELCO_NUM_CHANNELS]; /* 7 stereo channels */
+ sound_stream *m_stream; /* our stream */
+ UINT8 *m_snd_data; /* PCM data */
+ int m_banks[4]; /* start of each ROM bank */
+ gaelco_sound_channel m_channel[GAELCO_NUM_CHANNELS]; /* 7 stereo channels */
UINT16 m_sndregs[0x38];
diff --git a/src/emu/sound/hc55516.c b/src/emu/sound/hc55516.c
index d8cb1061c01..25ea7e17abb 100644
--- a/src/emu/sound/hc55516.c
+++ b/src/emu/sound/hc55516.c
@@ -11,35 +11,35 @@
/* 4x oversampling */
-#define SAMPLE_RATE (48000 * 4)
+#define SAMPLE_RATE (48000 * 4)
-#define INTEGRATOR_LEAK_TC 0.001
-#define FILTER_DECAY_TC 0.004
-#define FILTER_CHARGE_TC 0.004
-#define FILTER_MIN 0.0416
-#define FILTER_MAX 1.0954
-#define SAMPLE_GAIN 10000.0
+#define INTEGRATOR_LEAK_TC 0.001
+#define FILTER_DECAY_TC 0.004
+#define FILTER_CHARGE_TC 0.004
+#define FILTER_MIN 0.0416
+#define FILTER_MAX 1.0954
+#define SAMPLE_GAIN 10000.0
struct hc55516_state
{
sound_stream *channel;
- int clock; /* 0 = software driven, non-0 = oscillator */
- int active_clock_hi;
+ int clock; /* 0 = software driven, non-0 = oscillator */
+ int active_clock_hi;
UINT8 shiftreg_mask;
- UINT8 last_clock_state;
- UINT8 digit;
- UINT8 new_digit;
- UINT8 shiftreg;
+ UINT8 last_clock_state;
+ UINT8 digit;
+ UINT8 new_digit;
+ UINT8 shiftreg;
- INT16 curr_sample;
- INT16 next_sample;
+ INT16 curr_sample;
+ INT16 next_sample;
- UINT32 update_count;
+ UINT32 update_count;
- double filter;
- double integrator;
+ double filter;
+ double integrator;
};
@@ -54,8 +54,8 @@ INLINE hc55516_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == HC55516 ||
- device->type() == MC3417 ||
- device->type() == MC3418);
+ device->type() == MC3417 ||
+ device->type() == MC3418);
return (hc55516_state *)downcast<hc55516_device *>(device)->token();
}
@@ -297,13 +297,13 @@ const device_type HC55516 = &device_creator<hc55516_device>;
hc55516_device::hc55516_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, HC55516, "HC-55516", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(hc55516_state);
}
hc55516_device::hc55516_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(hc55516_state);
}
@@ -399,5 +399,3 @@ void mc3418_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/hc55516.h b/src/emu/sound/hc55516.h
index 6674a43b47f..f9da379e2f0 100644
--- a/src/emu/sound/hc55516.h
+++ b/src/emu/sound/hc55516.h
@@ -16,7 +16,7 @@ void hc55516_clock_w(device_t *device, int state);
int hc55516_clock_state_r(device_t *device);
class hc55516_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
hc55516_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/i5000.c b/src/emu/sound/i5000.c
index be0f34db405..e031cb28fea 100644
--- a/src/emu/sound/i5000.c
+++ b/src/emu/sound/i5000.c
@@ -23,7 +23,7 @@ const device_type I5000_SND = &device_creator<i5000snd_device>;
i5000snd_device::i5000snd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, I5000_SND, "I5000", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -53,18 +53,18 @@ void i5000snd_device::device_start()
save_item(NAME(m_channels[ch].m_adpcm.m_signal), ch);
save_item(NAME(m_channels[ch].m_adpcm.m_step), ch);
- save_item(NAME(m_channels[ch].address), ch);
- save_item(NAME(m_channels[ch].freq_timer), ch);
- save_item(NAME(m_channels[ch].freq_base), ch);
- save_item(NAME(m_channels[ch].freq_min), ch);
- save_item(NAME(m_channels[ch].sample), ch);
- save_item(NAME(m_channels[ch].shift_pos), ch);
- save_item(NAME(m_channels[ch].shift_amount), ch);
- save_item(NAME(m_channels[ch].shift_mask), ch);
- save_item(NAME(m_channels[ch].vol_r), ch);
- save_item(NAME(m_channels[ch].vol_l), ch);
- save_item(NAME(m_channels[ch].output_r), ch);
- save_item(NAME(m_channels[ch].output_l), ch);
+ save_item(NAME(m_channels[ch].address), ch);
+ save_item(NAME(m_channels[ch].freq_timer), ch);
+ save_item(NAME(m_channels[ch].freq_base), ch);
+ save_item(NAME(m_channels[ch].freq_min), ch);
+ save_item(NAME(m_channels[ch].sample), ch);
+ save_item(NAME(m_channels[ch].shift_pos), ch);
+ save_item(NAME(m_channels[ch].shift_amount), ch);
+ save_item(NAME(m_channels[ch].shift_mask), ch);
+ save_item(NAME(m_channels[ch].vol_r), ch);
+ save_item(NAME(m_channels[ch].vol_l), ch);
+ save_item(NAME(m_channels[ch].output_r), ch);
+ save_item(NAME(m_channels[ch].output_l), ch);
}
save_item(NAME(m_regs));
@@ -300,4 +300,3 @@ WRITE16_MEMBER( i5000snd_device::write )
write_reg16(offset, data);
}
-
diff --git a/src/emu/sound/i5000.h b/src/emu/sound/i5000.h
index 52103025bc6..2c343fcbd60 100644
--- a/src/emu/sound/i5000.h
+++ b/src/emu/sound/i5000.h
@@ -28,7 +28,7 @@
//**************************************************************************
class i5000snd_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
// construction/destruction
@@ -47,37 +47,37 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
- struct channel_t
- {
- bool is_playing;
- oki_adpcm_state m_adpcm;
-
- UINT32 address;
- int freq_timer;
- int freq_base;
- int freq_min;
- UINT16 sample;
- UINT8 shift_pos;
- UINT8 shift_amount;
- UINT8 shift_mask;
- int vol_r;
- int vol_l;
- int output_r;
- int output_l;
-
- };
-
- channel_t m_channels[16];
+ struct channel_t
+ {
+ bool is_playing;
+ oki_adpcm_state m_adpcm;
+
+ UINT32 address;
+ int freq_timer;
+ int freq_base;
+ int freq_min;
+ UINT16 sample;
+ UINT8 shift_pos;
+ UINT8 shift_amount;
+ UINT8 shift_mask;
+ int vol_r;
+ int vol_l;
+ int output_r;
+ int output_l;
+
+ };
+
+ channel_t m_channels[16];
UINT16 m_regs[0x80];
- UINT16 *m_rom_base;
- UINT32 m_rom_mask;
+ UINT16 *m_rom_base;
+ UINT32 m_rom_mask;
- int m_lut_volume[0x100];
+ int m_lut_volume[0x100];
- bool read_sample(int ch);
- void write_reg16(UINT8 reg, UINT16 data);
+ bool read_sample(int ch);
+ void write_reg16(UINT8 reg, UINT16 data);
};
@@ -85,4 +85,3 @@ private:
extern const device_type I5000_SND;
#endif /* __I5000_H__ */
-
diff --git a/src/emu/sound/ics2115.c b/src/emu/sound/ics2115.c
index 0ef07217ad5..5dea9e6a2b5 100644
--- a/src/emu/sound/ics2115.c
+++ b/src/emu/sound/ics2115.c
@@ -23,42 +23,42 @@ void ics2115_device::static_set_irqf(device_t &device, void (*irqf)(device_t *de
ics2115_device::ics2115_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ICS2115, "ICS2115", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_irq_cb(NULL)
+ device_sound_interface(mconfig, *this),
+ m_irq_cb(NULL)
{
}
void ics2115_device::device_start()
{
- m_rom = *region();
- m_timer[0].timer = machine().scheduler().timer_alloc(FUNC(timer_cb_0), this);
- m_timer[1].timer = machine().scheduler().timer_alloc(FUNC(timer_cb_1), this);
- m_stream = machine().sound().stream_alloc(*this, 0, 2, 33075);
-
- //Exact formula as per patent 5809466
- //This seems to give the ok fit but it is not good enough.
- /*double maxvol = ((1 << volume_bits) - 1) * pow(2., (double)1/0x100);
- for (int i = 0; i < 0x1000; i++) {
- m_volume[i] = floor(maxvol * pow(2.,(double)i/256 - 16) + 0.5);
- }*/
-
- //austere's table, derived from patent 5809466:
- //See section V starting from page 195
- //Subsection F (column 124, page 198) onwards
- for (int i = 0; i<4096; i++) {
- m_volume[i] = ((0x100 | (i & 0xff)) << (volume_bits-9)) >> (15 - (i>>8));
- }
-
- //u-Law table as per MIL-STD-188-113
- UINT16 lut[8];
- UINT16 lut_initial = 33 << 2; //shift up 2-bits for 16-bit range.
- for(int i = 0; i < 8; i++)
- lut[i] = (lut_initial << i) - lut_initial;
+ m_rom = *region();
+ m_timer[0].timer = machine().scheduler().timer_alloc(FUNC(timer_cb_0), this);
+ m_timer[1].timer = machine().scheduler().timer_alloc(FUNC(timer_cb_1), this);
+ m_stream = machine().sound().stream_alloc(*this, 0, 2, 33075);
+
+ //Exact formula as per patent 5809466
+ //This seems to give the ok fit but it is not good enough.
+ /*double maxvol = ((1 << volume_bits) - 1) * pow(2., (double)1/0x100);
+ for (int i = 0; i < 0x1000; i++) {
+ m_volume[i] = floor(maxvol * pow(2.,(double)i/256 - 16) + 0.5);
+ }*/
+
+ //austere's table, derived from patent 5809466:
+ //See section V starting from page 195
+ //Subsection F (column 124, page 198) onwards
+ for (int i = 0; i<4096; i++) {
+ m_volume[i] = ((0x100 | (i & 0xff)) << (volume_bits-9)) >> (15 - (i>>8));
+ }
+
+ //u-Law table as per MIL-STD-188-113
+ UINT16 lut[8];
+ UINT16 lut_initial = 33 << 2; //shift up 2-bits for 16-bit range.
+ for(int i = 0; i < 8; i++)
+ lut[i] = (lut_initial << i) - lut_initial;
for(int i = 0; i < 256; i++) {
- UINT8 exponent = (~i >> 4) & 0x07;
- UINT8 mantissa = ~i & 0x0f;
- INT16 value = lut[exponent] + (mantissa << (exponent + 3));
- m_ulaw[i] = (i & 0x80) ? -value : value;
+ UINT8 exponent = (~i >> 4) & 0x07;
+ UINT8 mantissa = ~i & 0x0f;
+ INT16 value = lut[exponent] + (mantissa << (exponent + 3));
+ m_ulaw[i] = (i & 0x80) ? -value : value;
}
save_item(NAME(m_timer[0].period));
@@ -107,7 +107,7 @@ void ics2115_device::device_reset()
m_active_osc = 31;
m_osc_select = 0;
m_reg_select = 0;
- m_vmode = 0;
+ m_vmode = 0;
memset(m_voice, 0, sizeof(m_voice));
m_timer[0].timer->adjust(attotime::never);
m_timer[1].timer->adjust(attotime::never);
@@ -136,7 +136,7 @@ void ics2115_device::device_reset()
int ics2115_voice::update_volume_envelope()
{
int ret = 0;
- if(vol_ctrl.done || vol_ctrl.stop)
+ if(vol_ctrl.done || vol_ctrl.stop)
return ret;
if(vol_ctrl.invert) {
@@ -151,7 +151,7 @@ int ics2115_voice::update_volume_envelope()
return ret;
if(vol_ctrl.irq) {
- vol_ctrl.irq_pending = true;
+ vol_ctrl.irq_pending = true;
ret = 1;
}
@@ -205,27 +205,27 @@ int ics2115_voice::update_oscillator()
osc.acc += osc.fc << 2;
osc.left = osc.end - osc.acc;
}
- // > instead of >= to stop crackling?
+ // > instead of >= to stop crackling?
if(osc.left > 0)
return ret;
if(osc_conf.irq) {
osc_conf.irq_pending = true;
- ret = 1;
+ ret = 1;
}
if(osc_conf.loop) {
if(osc_conf.loop_bidir)
osc_conf.invert = !osc_conf.invert;
- //else
- // printf("click!\n");
+ //else
+ // printf("click!\n");
if(osc_conf.invert) {
osc.acc = osc.end + osc.left;
- osc.left = osc.acc - osc.start;
- }
+ osc.left = osc.acc - osc.start;
+ }
else {
osc.acc = osc.start - osc.left;
- osc.left = osc.end - osc.acc;
- }
+ osc.left = osc.end - osc.acc;
+ }
} else {
state.on = false;
osc_conf.stop = true;
@@ -240,106 +240,106 @@ int ics2115_voice::update_oscillator()
//TODO: proper interpolation for uLaw (fill_output doesn't use this) and 8-bit samples (looping)
stream_sample_t ics2115_device::get_sample(ics2115_voice& voice)
{
- UINT32 curaddr = ((voice.osc.saddr << 20) & 0xffffff) | (voice.osc.acc >> 12);
- UINT32 nextaddr;
-
- if (voice.state.on && voice.osc_conf.loop && !voice.osc_conf.loop_bidir &&
- (voice.osc.left < (voice.osc.fc <<2))) {
- //printf("C?[%x:%x]", voice.osc.left, voice.osc.acc);
- nextaddr = ((voice.osc.saddr << 20) & 0xffffff) | (voice.osc.start >> 12);
- }
- else
- nextaddr = curaddr + 2;
-
-
- INT16 sample1, sample2;
- if (voice.osc_conf.eightbit) {
- sample1 = ((INT8)m_rom[curaddr]) << 8;
- sample2 = ((INT8)m_rom[curaddr + 1]) << 8;
- }
- else {
- sample1 = m_rom[curaddr + 0] | (((INT8)m_rom[curaddr + 1]) << 8);
- sample2 = m_rom[nextaddr+ 0] | (((INT8)m_rom[nextaddr+ 1]) << 8);
- //sample2 = m_rom[curaddr + 2] | (((INT8)m_rom[curaddr + 3]) << 8);
- }
-
- //no need for interpolation since it's around 1 note a cycle?
- //if(voice.osc.fc >> 10)
- // return sample1;
-
- //linear interpolation as in US patent 6,246,774 B1, column 2 row 59
- //LEN=1, BLEN=0, DIR=0, start+end interpolation
- INT32 sample, diff;
- UINT16 fract;
- diff = sample2 - sample1;
- fract = (voice.osc.acc >> 3) & 0x1ff;
-
- sample = (((INT32)sample1 << 9) + diff * fract) >> 9;
- //sample = sample1;
- return sample;
+ UINT32 curaddr = ((voice.osc.saddr << 20) & 0xffffff) | (voice.osc.acc >> 12);
+ UINT32 nextaddr;
+
+ if (voice.state.on && voice.osc_conf.loop && !voice.osc_conf.loop_bidir &&
+ (voice.osc.left < (voice.osc.fc <<2))) {
+ //printf("C?[%x:%x]", voice.osc.left, voice.osc.acc);
+ nextaddr = ((voice.osc.saddr << 20) & 0xffffff) | (voice.osc.start >> 12);
+ }
+ else
+ nextaddr = curaddr + 2;
+
+
+ INT16 sample1, sample2;
+ if (voice.osc_conf.eightbit) {
+ sample1 = ((INT8)m_rom[curaddr]) << 8;
+ sample2 = ((INT8)m_rom[curaddr + 1]) << 8;
+ }
+ else {
+ sample1 = m_rom[curaddr + 0] | (((INT8)m_rom[curaddr + 1]) << 8);
+ sample2 = m_rom[nextaddr+ 0] | (((INT8)m_rom[nextaddr+ 1]) << 8);
+ //sample2 = m_rom[curaddr + 2] | (((INT8)m_rom[curaddr + 3]) << 8);
+ }
+
+ //no need for interpolation since it's around 1 note a cycle?
+ //if(voice.osc.fc >> 10)
+ // return sample1;
+
+ //linear interpolation as in US patent 6,246,774 B1, column 2 row 59
+ //LEN=1, BLEN=0, DIR=0, start+end interpolation
+ INT32 sample, diff;
+ UINT16 fract;
+ diff = sample2 - sample1;
+ fract = (voice.osc.acc >> 3) & 0x1ff;
+
+ sample = (((INT32)sample1 << 9) + diff * fract) >> 9;
+ //sample = sample1;
+ return sample;
}
bool ics2115_voice::playing()
{
- return state.on && !((vol_ctrl.done || vol_ctrl.stop) && osc_conf.stop);
+ return state.on && !((vol_ctrl.done || vol_ctrl.stop) && osc_conf.stop);
}
void ics2115_voice::update_ramp() {
- //slow attack
- if (state.on && !osc_conf.stop) {
- if (state.ramp < 0x40)
- state.ramp += 0x1;
- else
- state.ramp = 0x40;
- }
- //slow release
- else {
- if (state.ramp)
- state.ramp -= 0x1;
- }
+ //slow attack
+ if (state.on && !osc_conf.stop) {
+ if (state.ramp < 0x40)
+ state.ramp += 0x1;
+ else
+ state.ramp = 0x40;
+ }
+ //slow release
+ else {
+ if (state.ramp)
+ state.ramp -= 0x1;
+ }
}
int ics2115_device::fill_output(ics2115_voice& voice, stream_sample_t *outputs[2], int samples)
{
- bool irq_invalid = false;
- UINT16 fine = 1 << (3*(voice.vol.incr >> 6));
- voice.vol.add = (voice.vol.incr & 0x3F)<< (10 - fine);
-
- for (int i = 0; i < samples; i++) {
- UINT32 volacc = (voice.vol.acc >> 10) & 0xffff;
- UINT32 volume = (m_volume[volacc >> 4] * voice.state.ramp) >> 6;
- UINT16 vleft = volume; //* (255 - voice.vol.pan) / 0x80];
- UINT16 vright = volume; //* (voice.vol.pan + 1) / 0x80];
-
- //From GUS doc:
- //In general, it is necessary to remember that all voices are being summed in to the
- //final output, even if they are not running. This means that whatever data value
- //that the voice is pointing at is contributing to the summation.
- //(austere note: this will of course fix some of the glitches due to multiple transition)
- stream_sample_t sample;
- if(voice.osc_conf.ulaw) {
- UINT32 curaddr = ((voice.osc.saddr << 20) & 0xffffff) | (voice.osc.acc >> 12);
- sample = m_ulaw[m_rom[curaddr]];
- }
- else
- sample = get_sample(voice);
+ bool irq_invalid = false;
+ UINT16 fine = 1 << (3*(voice.vol.incr >> 6));
+ voice.vol.add = (voice.vol.incr & 0x3F)<< (10 - fine);
- //15-bit volume + (5-bit worth of 32 channel sum) + 16-bit samples = 4-bit extra
- if (!m_vmode || voice.playing()) {
- //if (voice.playing()) {
- outputs[0][i] += (sample * vleft) >> (5 + volume_bits - 16);
- outputs[1][i] += (sample * vright) >> (5 + volume_bits - 16);
- }
-
- voice.update_ramp();
- if (voice.playing()) {
- if (voice.update_oscillator())
- irq_invalid = true;
- if (voice.update_volume_envelope())
- irq_invalid = true;
- }
- }
- return irq_invalid;
+ for (int i = 0; i < samples; i++) {
+ UINT32 volacc = (voice.vol.acc >> 10) & 0xffff;
+ UINT32 volume = (m_volume[volacc >> 4] * voice.state.ramp) >> 6;
+ UINT16 vleft = volume; //* (255 - voice.vol.pan) / 0x80];
+ UINT16 vright = volume; //* (voice.vol.pan + 1) / 0x80];
+
+ //From GUS doc:
+ //In general, it is necessary to remember that all voices are being summed in to the
+ //final output, even if they are not running. This means that whatever data value
+ //that the voice is pointing at is contributing to the summation.
+ //(austere note: this will of course fix some of the glitches due to multiple transition)
+ stream_sample_t sample;
+ if(voice.osc_conf.ulaw) {
+ UINT32 curaddr = ((voice.osc.saddr << 20) & 0xffffff) | (voice.osc.acc >> 12);
+ sample = m_ulaw[m_rom[curaddr]];
+ }
+ else
+ sample = get_sample(voice);
+
+ //15-bit volume + (5-bit worth of 32 channel sum) + 16-bit samples = 4-bit extra
+ if (!m_vmode || voice.playing()) {
+ //if (voice.playing()) {
+ outputs[0][i] += (sample * vleft) >> (5 + volume_bits - 16);
+ outputs[1][i] += (sample * vright) >> (5 + volume_bits - 16);
+ }
+
+ voice.update_ramp();
+ if (voice.playing()) {
+ if (voice.update_oscillator())
+ irq_invalid = true;
+ if (voice.update_volume_envelope())
+ irq_invalid = true;
+ }
+ }
+ return irq_invalid;
}
void ics2115_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
@@ -352,8 +352,8 @@ void ics2115_device::sound_stream_update(sound_stream &stream, stream_sample_t *
ics2115_voice& voice = m_voice[osc];
#ifdef ICS2115_ISOLATE
- if(osc != ICS2115_ISOLATE)
- continue;
+ if(osc != ICS2115_ISOLATE)
+ continue;
#endif
/*
#ifdef ICS2115_DEBUG
@@ -370,36 +370,36 @@ void ics2115_device::sound_stream_update(sound_stream &stream, stream_sample_t *
irq_invalid = true;
#ifdef ICS2115_DEBUG
- if(voice.playing()) {
- printf("%d", osc);
- if (voice.osc_conf.invert)
- printf("+");
- else if ((voice.osc.fc >> 1) > 0x1ff)
- printf("*");
- printf(" ");
-
- /*int min = 0x7fffffff, max = 0x80000000;
- double average = 0;
- for (int i = 0; i < samples; i++) {
- if (outputs[0][i] > max) max = outputs[0][i];
- if (outputs[0][i] < min) min = outputs[0][i];
- average += fabs(outputs[0][i]);
- }
- average /= samples;
- average /= 1 << 16;
- printf("<Mi:%d Mx:%d Av:%g>", min >> 16, max >> 16, average);*/
- }
+ if(voice.playing()) {
+ printf("%d", osc);
+ if (voice.osc_conf.invert)
+ printf("+");
+ else if ((voice.osc.fc >> 1) > 0x1ff)
+ printf("*");
+ printf(" ");
+
+ /*int min = 0x7fffffff, max = 0x80000000;
+ double average = 0;
+ for (int i = 0; i < samples; i++) {
+ if (outputs[0][i] > max) max = outputs[0][i];
+ if (outputs[0][i] < min) min = outputs[0][i];
+ average += fabs(outputs[0][i]);
+ }
+ average /= samples;
+ average /= 1 << 16;
+ printf("<Mi:%d Mx:%d Av:%g>", min >> 16, max >> 16, average);*/
+ }
#endif
}
#ifdef ICS2115_DEBUG
- printf("|");
+ printf("|");
#endif
//rescale
for (int i = 0; i < samples; i++) {
- outputs[0][i] >>= 16;
- outputs[1][i] >>= 16;
+ outputs[0][i] >>= 16;
+ outputs[1][i] >>= 16;
}
if(irq_invalid)
@@ -412,20 +412,20 @@ UINT16 ics2115_device::reg_read() {
UINT16 ret;
ics2115_voice& voice = m_voice[m_osc_select];
- switch(m_reg_select) {
+ switch(m_reg_select) {
case 0x00: // [osc] Oscillator Configuration
ret = voice.osc_conf.value;
ret <<= 8;
break;
case 0x01: // [osc] Wavesample frequency
- // freq = fc*33075/1024 in 32 voices mode, fc*44100/1024 in 24 voices mode
+ // freq = fc*33075/1024 in 32 voices mode, fc*44100/1024 in 24 voices mode
//ret = v->Osc.FC;
ret = voice.osc.fc;
break;
case 0x02: // [osc] Wavesample loop start high
- //TODO: are these returns valid? might be 0x00ff for this one...
+ //TODO: are these returns valid? might be 0x00ff for this one...
ret = (voice.osc.start >> 16) & 0xffff;
break;
@@ -473,23 +473,23 @@ UINT16 ics2115_device::reg_read() {
/* DDP3 code (trap15's reversal) */
/* 0xA13's work:
- res = read() & 0xC3;
- if(!(res & 2)) res |= 1;
- e = d = res;
- */
+ res = read() & 0xC3;
+ if(!(res & 2)) res |= 1;
+ e = d = res;
+ */
/* 0xA4F's work:
- while(!(read() & 1))
- */
+ while(!(read() & 1))
+ */
case 0x0D: // [osc] Volume Envelope Control
//ret = v->Vol.Ctl | ((v->state & FLAG_STATE_VOLIRQ) ? 0x81 : 1);
// may expect |8 on voice irq with &40 == 0
// may expect |8 on reg 0 on voice irq with &80 == 0
// ret = 0xFF;
- if (!m_vmode)
- ret = voice.vol_ctrl.irq ? 0x81 : 0x01;
- else
- ret = 0x01;
- //ret = voice.vol_ctrl.value | 0x1;
+ if (!m_vmode)
+ ret = voice.vol_ctrl.irq ? 0x81 : 0x01;
+ else
+ ret = 0x01;
+ //ret = voice.vol_ctrl.value | 0x1;
ret <<= 8;
break;
@@ -500,20 +500,20 @@ UINT16 ics2115_device::reg_read() {
case 0x0F:{// [osc] Interrupt source/oscillator
ret = 0xff;
for (int i = 0; i <= m_active_osc; i++) {
- ics2115_voice& v = m_voice[i];
- if (v.osc_conf.irq_pending || v.vol_ctrl.irq_pending) {
+ ics2115_voice& v = m_voice[i];
+ if (v.osc_conf.irq_pending || v.vol_ctrl.irq_pending) {
ret = i | 0xe0;
ret &= v.vol_ctrl.irq_pending ? (~0x40) : 0xff;
ret &= v.osc_conf.irq_pending ? (~0x80) : 0xff;
recalc_irq();
if (v.osc_conf.irq_pending) {
- v.osc_conf.irq_pending = 0;
- ret &= ~0x80;
- }
- if (v.vol_ctrl.irq_pending) {
- v.vol_ctrl.irq_pending = 0;
- ret &= ~0x40;
- }
+ v.osc_conf.irq_pending = 0;
+ ret &= ~0x80;
+ }
+ if (v.vol_ctrl.irq_pending) {
+ v.vol_ctrl.irq_pending = 0;
+ ret &= ~0x40;
+ }
break;
}
}
@@ -530,7 +530,7 @@ UINT16 ics2115_device::reg_read() {
case 0x40: // Timer 0 clear irq
case 0x41: // Timer 1 clear irq
- //TODO: examine this suspect code
+ //TODO: examine this suspect code
ret = m_timer[m_reg_select & 0x1].preset;
m_irq_pending &= ~(1 << (m_reg_select & 0x1));
recalc_irq();
@@ -554,24 +554,24 @@ UINT16 ics2115_device::reg_read() {
default:
#ifdef ICS2115_DEBUG
- printf("ICS2115: Unhandled read %x\n", m_reg_select);
+ printf("ICS2115: Unhandled read %x\n", m_reg_select);
#endif
- ret = 0;
+ ret = 0;
break;
}
return ret;
}
void ics2115_device::reg_write(UINT8 data, bool msb) {
- ics2115_voice& voice = m_voice[m_osc_select];
+ ics2115_voice& voice = m_voice[m_osc_select];
- switch(m_reg_select) {
+ switch(m_reg_select) {
case 0x00: // [osc] Oscillator Configuration
if(msb) {
- voice.osc_conf.value &= 0x80;
+ voice.osc_conf.value &= 0x80;
voice.osc_conf.value |= data & 0x7f;
- }
- break;
+ }
+ break;
case 0x01: // [osc] Wavesample frequency
// freq = fc*33075/1024 in 32 voices mode, fc*44100/1024 in 24 voices mode
@@ -592,7 +592,7 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
case 0x03: // [osc] Wavesample loop start low
if(msb)
voice.osc.start = (voice.osc.start & 0xffff00ff) | (data << 8);
- // This is unused?
+ // This is unused?
//else
//voice.osc.start = (voice.osc.start & 0xffffff00) | (data & 0);
break;
@@ -607,7 +607,7 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
case 0x05: // [osc] Wavesample loop end low
if(msb)
voice.osc.end = (voice.osc.end & 0xffff00ff) | (data << 8);
- // lsb is unused?
+ // lsb is unused?
break;
case 0x06: // [osc] Volume Increment
@@ -616,13 +616,13 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
break;
case 0x07: // [osc] Volume Start
- if (!msb)
- voice.vol.start = data << (10+8);
+ if (!msb)
+ voice.vol.start = data << (10+8);
break;
case 0x08: // [osc] Volume End
- if (!msb)
- voice.vol.end = data << (10+8);
+ if (!msb)
+ voice.vol.end = data << (10+8);
break;
case 0x09: // [osc] Volume accumulator
@@ -630,15 +630,15 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
voice.vol.regacc = (voice.vol.regacc & 0x00ff) | (data << 8);
else
voice.vol.regacc = (voice.vol.regacc & 0xff00) | data;
- voice.vol.acc = voice.vol.regacc << 10;
+ voice.vol.acc = voice.vol.regacc << 10;
break;
case 0x0A: // [osc] Wavesample address high
#ifdef ICS2115_DEBUG
#ifdef ICS2115_ISOLATE
- if(m_osc_select == ICS2115_ISOLATE)
+ if(m_osc_select == ICS2115_ISOLATE)
#endif
- printf("<%d:oa:H[%d]=%x>", m_osc_select, msb, data);
+ printf("<%d:oa:H[%d]=%x>", m_osc_select, msb, data);
#endif
if(msb)
voice.osc.acc = (voice.osc.acc & 0x00ffffff) | (data << 24);
@@ -649,9 +649,9 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
case 0x0B: // [osc] Wavesample address low
#ifdef ICS2115_DEBUG
#ifdef ICS2115_ISOLATE
- if(m_osc_select == ICS2115_ISOLATE)
+ if(m_osc_select == ICS2115_ISOLATE)
#endif
- printf("<%d:oa:L[%d]=%x>", m_osc_select, msb, data);
+ printf("<%d:oa:L[%d]=%x>", m_osc_select, msb, data);
#endif
if(msb)
voice.osc.acc = (voice.osc.acc & 0xffff00ff) | (data << 8);
@@ -666,47 +666,47 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
case 0x0D: // [osc] Volume Envelope Control
if(msb) {
- voice.vol_ctrl.value &= 0x80;
+ voice.vol_ctrl.value &= 0x80;
voice.vol_ctrl.value |= data & 0x7F;
- }
+ }
break;
case 0x0E: // Active Voices
- //Does this value get added to 1? Not sure. Could trace for writes of 32.
- if(msb) {
+ //Does this value get added to 1? Not sure. Could trace for writes of 32.
+ if(msb) {
m_active_osc = data & 0x1F; // & 0x1F ? (Guessing)
- }
- break;
- //2X8 ?
+ }
+ break;
+ //2X8 ?
case 0x10: // [osc] Oscillator Control
- //Could this be 2X9?
- //[7 R | 6 M2 | 5 M1 | 4-2 Reserve | 1 - Timer 2 Strt | 0 - Timer 1 Strt]
-
- if (msb) {
- voice.osc.ctl = data;
- if (!data)
- keyon();
- //guessing here
- else if(data == 0xf) {
+ //Could this be 2X9?
+ //[7 R | 6 M2 | 5 M1 | 4-2 Reserve | 1 - Timer 2 Strt | 0 - Timer 1 Strt]
+
+ if (msb) {
+ voice.osc.ctl = data;
+ if (!data)
+ keyon();
+ //guessing here
+ else if(data == 0xf) {
#ifdef ICS2115_DEBUG
#ifdef ICS2115_ISOLATE
- if (m_osc_select == ICS2115_ISOLATE)
+ if (m_osc_select == ICS2115_ISOLATE)
#endif
- if (!voice.osc_conf.stop || !voice.vol_ctrl.stop)
- printf("[%02d STOP]\n", m_osc_select);
+ if (!voice.osc_conf.stop || !voice.vol_ctrl.stop)
+ printf("[%02d STOP]\n", m_osc_select);
#endif
- if (!m_vmode) {
- voice.osc_conf.stop = true;
- voice.vol_ctrl.stop = true;
- //try to key it off as well!
- voice.state.on = false;
- }
- }
+ if (!m_vmode) {
+ voice.osc_conf.stop = true;
+ voice.vol_ctrl.stop = true;
+ //try to key it off as well!
+ voice.state.on = false;
+ }
+ }
#ifdef ICS2115_DEBUG
- else
- printf("ICS2115: Unhandled* data write %d onto 0x10.\n", data);
+ else
+ printf("ICS2115: Unhandled* data write %d onto 0x10.\n", data);
#endif
- }
+ }
break;
case 0x11: // [osc] Wavesample static address 27-20
@@ -714,11 +714,11 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
//v->Osc.SAddr = data;
voice.osc.saddr = data;
break;
- case 0x12:
- //Could be per voice! -- investigate.
- if (msb)
- m_vmode = data;
- break;
+ case 0x12:
+ //Could be per voice! -- investigate.
+ if (msb)
+ m_vmode = data;
+ break;
case 0x40: // Timer 1 Preset
case 0x41: // Timer 2 Preset
if(!msb) {
@@ -736,7 +736,7 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
break;
case 0x4A: // IRQ Enable
- if(!msb) {
+ if(!msb) {
m_irq_enabled = data;
recalc_irq();
}
@@ -747,111 +747,111 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
m_osc_select = data % (1+m_active_osc);
}
break;
- default:
+ default:
#ifdef ICS2115_DEBUG
- printf("ICS2115: Unhandled write %x onto %x(%d) [voice = %d]\n", data, m_reg_select, msb, m_osc_select);
+ printf("ICS2115: Unhandled write %x onto %x(%d) [voice = %d]\n", data, m_reg_select, msb, m_osc_select);
#endif
- break;
- }
+ break;
+ }
}
//UINT8 ics2115_device::read (offs_t offset)
READ8_DEVICE_HANDLER(ics2115_device::read)
{
- ics2115_device *chip = downcast<ics2115_device *>(device);
- UINT8 ret = 0;
-
- switch(offset) {
- case 0:
- //TODO: check this suspect code
- if (chip->m_irq_on) {
- ret |= 0x80;
- if (chip->m_irq_enabled && (chip->m_irq_pending & 3))
- ret |= 1;
- for (int i = 0; i <= chip->m_active_osc; i++) {
- if (//chip->m_voice[i].vol_ctrl.irq_pending ||
- chip->m_voice[i].osc_conf.irq_pending) {
- ret |= 2;
- break;
- }
- }
- }
-
- break;
- case 1:
- ret = chip->m_reg_select;
- break;
- case 2:
- ret = (UINT8)(chip->reg_read());
- break;
- case 3:
- ret = chip->reg_read() >> 8;
- break;
- default:
+ ics2115_device *chip = downcast<ics2115_device *>(device);
+ UINT8 ret = 0;
+
+ switch(offset) {
+ case 0:
+ //TODO: check this suspect code
+ if (chip->m_irq_on) {
+ ret |= 0x80;
+ if (chip->m_irq_enabled && (chip->m_irq_pending & 3))
+ ret |= 1;
+ for (int i = 0; i <= chip->m_active_osc; i++) {
+ if (//chip->m_voice[i].vol_ctrl.irq_pending ||
+ chip->m_voice[i].osc_conf.irq_pending) {
+ ret |= 2;
+ break;
+ }
+ }
+ }
+
+ break;
+ case 1:
+ ret = chip->m_reg_select;
+ break;
+ case 2:
+ ret = (UINT8)(chip->reg_read());
+ break;
+ case 3:
+ ret = chip->reg_read() >> 8;
+ break;
+ default:
#ifdef ICS2115_DEBUG
- printf("ICS2115: Unhandled memory read at %x\n", offset);
+ printf("ICS2115: Unhandled memory read at %x\n", offset);
#endif
- break;
- }
- return ret;
+ break;
+ }
+ return ret;
}
//UINT8 ics2115_device::write(offs_t offset, UINT8 data)
WRITE8_DEVICE_HANDLER(ics2115_device::write)
{
- ics2115_device *chip = downcast<ics2115_device *>(device);
- switch(offset) {
- case 1:
- chip->m_reg_select = data;
- break;
- case 2:
- chip->reg_write(data,0);
- break;
- case 3:
- chip->reg_write(data,1);
- break;
- default:
+ ics2115_device *chip = downcast<ics2115_device *>(device);
+ switch(offset) {
+ case 1:
+ chip->m_reg_select = data;
+ break;
+ case 2:
+ chip->reg_write(data,0);
+ break;
+ case 3:
+ chip->reg_write(data,1);
+ break;
+ default:
#ifdef ICS2115_DEBUG
- printf("ICS2115: Unhandled memory write %02x to %x\n", data, offset);
+ printf("ICS2115: Unhandled memory write %02x to %x\n", data, offset);
#endif
- break;
- }
+ break;
+ }
}
void ics2115_device::keyon()
{
#ifdef ICS2115_ISOLATE
- if (m_osc_select != ICS2115_ISOLATE)
- return;
+ if (m_osc_select != ICS2115_ISOLATE)
+ return;
#endif
- //set initial condition (may need to invert?) -- does NOT work since these are set to zero even
- m_voice[m_osc_select].state.on = true;
- //no ramp up...
- m_voice[m_osc_select].state.ramp = 0x40;
+ //set initial condition (may need to invert?) -- does NOT work since these are set to zero even
+ m_voice[m_osc_select].state.on = true;
+ //no ramp up...
+ m_voice[m_osc_select].state.ramp = 0x40;
#ifdef ICS2115_DEBUG
- printf("[%02d vs:%04x ve:%04x va:%04x vi:%02x vc:%02x os:%06x oe:%06x oa:%06x of:%04x SA:%02x oc:%02x][%04x]\n", m_osc_select,
- m_voice[m_osc_select].vol.start >> 10,
- m_voice[m_osc_select].vol.end >> 10,
- m_voice[m_osc_select].vol.acc >> 10,
- m_voice[m_osc_select].vol.incr,
- m_voice[m_osc_select].vol_ctrl.value,
- m_voice[m_osc_select].osc.start >> 12,
- m_voice[m_osc_select].osc.end >> 12,
- m_voice[m_osc_select].osc.acc >> 12,
- m_voice[m_osc_select].osc.fc,
- m_voice[m_osc_select].osc.saddr,
- m_voice[m_osc_select].osc_conf.value,
- m_volume[(m_voice[m_osc_select].vol.acc >> 14)]
- );
+ printf("[%02d vs:%04x ve:%04x va:%04x vi:%02x vc:%02x os:%06x oe:%06x oa:%06x of:%04x SA:%02x oc:%02x][%04x]\n", m_osc_select,
+ m_voice[m_osc_select].vol.start >> 10,
+ m_voice[m_osc_select].vol.end >> 10,
+ m_voice[m_osc_select].vol.acc >> 10,
+ m_voice[m_osc_select].vol.incr,
+ m_voice[m_osc_select].vol_ctrl.value,
+ m_voice[m_osc_select].osc.start >> 12,
+ m_voice[m_osc_select].osc.end >> 12,
+ m_voice[m_osc_select].osc.acc >> 12,
+ m_voice[m_osc_select].osc.fc,
+ m_voice[m_osc_select].osc.saddr,
+ m_voice[m_osc_select].osc_conf.value,
+ m_volume[(m_voice[m_osc_select].vol.acc >> 14)]
+ );
#endif
- //testing memory corruption issue with mame stream
- //printf("m_volume[0x%x]=0x%x\n", mastervolume, m_volume[mastervolume]);
+ //testing memory corruption issue with mame stream
+ //printf("m_volume[0x%x]=0x%x\n", mastervolume, m_volume[mastervolume]);
}
void ics2115_device::recalc_irq()
{
- //Suspect
+ //Suspect
bool irq = (m_irq_pending & m_irq_enabled);
for(int i = 0; (!irq) && (i < 32); i++)
irq |= m_voice[i].vol_ctrl.irq_pending && m_voice[i].osc_conf.irq_pending;
@@ -864,7 +864,7 @@ TIMER_CALLBACK( ics2115_device::timer_cb_0 )
{
ics2115_device *chip = (ics2115_device *)ptr;
chip->m_irq_pending |= 1 << 0;
- chip->recalc_irq();
+ chip->recalc_irq();
}
TIMER_CALLBACK( ics2115_device::timer_cb_1 )
@@ -877,11 +877,11 @@ TIMER_CALLBACK( ics2115_device::timer_cb_1 )
void ics2115_device::recalc_timer(int timer)
{
//Old regression-based formula (minus constant)
- //UINT64 period = m_timer[timer].preset * (m_timer[timer].scale << 16) / 60;
+ //UINT64 period = m_timer[timer].preset * (m_timer[timer].scale << 16) / 60;
- //New formula based on O.Galibert's reverse engineering of ICS2115 card firmware
- UINT64 period = ((m_timer[timer].scale & 0x1f) + 1) * (m_timer[timer].preset + 1);
- period = (period << (4 + (m_timer[timer].scale >> 5)))*78125/2646;
+ //New formula based on O.Galibert's reverse engineering of ICS2115 card firmware
+ UINT64 period = ((m_timer[timer].scale & 0x1f) + 1) * (m_timer[timer].preset + 1);
+ period = (period << (4 + (m_timer[timer].scale >> 5)))*78125/2646;
if(m_timer[timer].period != period) {
m_timer[timer].period = period;
diff --git a/src/emu/sound/ics2115.h b/src/emu/sound/ics2115.h
index a1c177708cb..e53947cbfb2 100644
--- a/src/emu/sound/ics2115.h
+++ b/src/emu/sound/ics2115.h
@@ -42,49 +42,49 @@ struct ics2115_voice {
} vol;
union {
- struct {
- UINT8 ulaw : 1;
- UINT8 stop : 1; //stops wave + vol envelope
- UINT8 eightbit : 1;
- UINT8 loop : 1;
- UINT8 loop_bidir : 1;
- UINT8 irq : 1;
- UINT8 invert : 1;
- UINT8 irq_pending: 1;
- //IRQ on variable?
- };
- UINT8 value;
- } osc_conf;
-
- union {
- struct {
- UINT8 done : 1; //indicates ramp has stopped
- UINT8 stop : 1; //stops the ramp
- UINT8 rollover : 1; //rollover (TODO)
- UINT8 loop : 1;
- UINT8 loop_bidir : 1;
- UINT8 irq : 1; //enable IRQ generation
- UINT8 invert : 1; //invert direction
- UINT8 irq_pending: 1; //(read only) IRQ pending
- //noenvelope == (done | disable)
- };
- UINT8 value;
- } vol_ctrl;
-
- //Possibly redundant state. => improvements of wavetable logic
- //may lead to its elimination.
- union {
- struct {
- UINT8 on : 1;
- UINT8 ramp : 7; // 100 0000 = 0x40 maximum
- };
- UINT8 value;
- } state;
-
- bool playing();
- int update_volume_envelope();
- int update_oscillator();
- void update_ramp();
+ struct {
+ UINT8 ulaw : 1;
+ UINT8 stop : 1; //stops wave + vol envelope
+ UINT8 eightbit : 1;
+ UINT8 loop : 1;
+ UINT8 loop_bidir : 1;
+ UINT8 irq : 1;
+ UINT8 invert : 1;
+ UINT8 irq_pending: 1;
+ //IRQ on variable?
+ };
+ UINT8 value;
+ } osc_conf;
+
+ union {
+ struct {
+ UINT8 done : 1; //indicates ramp has stopped
+ UINT8 stop : 1; //stops the ramp
+ UINT8 rollover : 1; //rollover (TODO)
+ UINT8 loop : 1;
+ UINT8 loop_bidir : 1;
+ UINT8 irq : 1; //enable IRQ generation
+ UINT8 invert : 1; //invert direction
+ UINT8 irq_pending: 1; //(read only) IRQ pending
+ //noenvelope == (done | disable)
+ };
+ UINT8 value;
+ } vol_ctrl;
+
+ //Possibly redundant state. => improvements of wavetable logic
+ //may lead to its elimination.
+ union {
+ struct {
+ UINT8 on : 1;
+ UINT8 ramp : 7; // 100 0000 = 0x40 maximum
+ };
+ UINT8 value;
+ } state;
+
+ bool playing();
+ int update_volume_envelope();
+ int update_oscillator();
+ void update_ramp();
};
// ======================> ics2115_device
@@ -99,10 +99,10 @@ public:
static void static_set_irqf(device_t &device, void (*irqf)(device_t *device, int state));
static DECLARE_READ8_DEVICE_HANDLER(read);
- static DECLARE_WRITE8_DEVICE_HANDLER(write);
+ static DECLARE_WRITE8_DEVICE_HANDLER(write);
//UINT8 read(offs_t offset);
//void write(offs_t offset, UINT8 data);
- static TIMER_CALLBACK(timer_cb_0);
+ static TIMER_CALLBACK(timer_cb_0);
static TIMER_CALLBACK(timer_cb_1);
sound_stream *m_stream;
@@ -124,13 +124,13 @@ protected:
UINT8 *m_rom;
INT16 m_ulaw[256];
UINT16 m_volume[4096];
- static const int volume_bits = 15;
+ static const int volume_bits = 15;
ics2115_voice m_voice[32];
struct {
UINT8 scale, preset;
emu_timer *timer;
- UINT64 period; /* in nsec */
+ UINT64 period; /* in nsec */
} m_timer[2];
UINT8 m_active_osc;
@@ -139,15 +139,15 @@ protected:
UINT8 m_irq_enabled, m_irq_pending;
bool m_irq_on;
- //Unknown variable, seems to be effected by 0x12. Further investigation
- //Required.
- UINT8 m_vmode;
+ //Unknown variable, seems to be effected by 0x12. Further investigation
+ //Required.
+ UINT8 m_vmode;
//internal register helper functions
UINT16 reg_read();
void reg_write(UINT8 data, bool msb);
void recalc_timer(int timer);
- void keyon();
+ void keyon();
void recalc_irq();
//stream helper functions
diff --git a/src/emu/sound/iremga20.c b/src/emu/sound/iremga20.c
index aeddb877248..2203aa0a6d4 100644
--- a/src/emu/sound/iremga20.c
+++ b/src/emu/sound/iremga20.c
@@ -197,7 +197,7 @@ READ8_DEVICE_HANDLER( irem_ga20_r )
switch (offset & 0x7)
{
- case 7: // voice status. bit 0 is 1 if active. (routine around 0xccc in rtypeleo)
+ case 7: // voice status. bit 0 is 1 if active. (routine around 0xccc in rtypeleo)
return chip->channel[channel].play ? 1 : 0;
default:
@@ -267,7 +267,7 @@ const device_type IREMGA20 = &device_creator<iremga20_device>;
iremga20_device::iremga20_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, IREMGA20, "Irem GA20", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ga20_state);
}
@@ -309,5 +309,3 @@ void iremga20_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/iremga20.h b/src/emu/sound/iremga20.h
index 407a358d9f5..bd90e7082e3 100644
--- a/src/emu/sound/iremga20.h
+++ b/src/emu/sound/iremga20.h
@@ -14,7 +14,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( irem_ga20_w );
DECLARE_READ8_DEVICE_HANDLER( irem_ga20_r );
class iremga20_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
iremga20_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/k005289.c b/src/emu/sound/k005289.c
index 8f9fc6b6768..243064ec4c5 100644
--- a/src/emu/sound/k005289.c
+++ b/src/emu/sound/k005289.c
@@ -28,7 +28,7 @@
#include "emu.h"
#include "k005289.h"
-#define FREQBASEBITS 16
+#define FREQBASEBITS 16
/* this structure defines the parameters for a channel */
struct k005289_sound_channel
@@ -192,7 +192,7 @@ static void k005289_recompute(k005289_state *info)
{
k005289_sound_channel *voice = info->channel_list;
- info->stream->update(); /* update the streams */
+ info->stream->update(); /* update the streams */
voice[0].frequency = info->k005289_A_frequency;
voice[1].frequency = info->k005289_B_frequency;
@@ -248,7 +248,7 @@ const device_type K005289 = &device_creator<k005289_device>;
k005289_device::k005289_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, K005289, "K005289", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(k005289_state);
}
@@ -281,5 +281,3 @@ void k005289_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/k005289.h b/src/emu/sound/k005289.h
index a0b390d2a44..a593006813f 100644
--- a/src/emu/sound/k005289.h
+++ b/src/emu/sound/k005289.h
@@ -13,7 +13,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( k005289_keylatch_A_w );
DECLARE_WRITE8_DEVICE_HANDLER( k005289_keylatch_B_w );
class k005289_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
k005289_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/k007232.c b/src/emu/sound/k007232.c
index 7c520aed508..31d400ec2e3 100644
--- a/src/emu/sound/k007232.c
+++ b/src/emu/sound/k007232.c
@@ -27,27 +27,27 @@ added external port callback, and functions to set the volume of the channels
#include "k007232.h"
-#define KDAC_A_PCM_MAX (2) /* Channels per chip */
+#define KDAC_A_PCM_MAX (2) /* Channels per chip */
struct KDAC_A_PCM
{
- UINT8 vol[KDAC_A_PCM_MAX][2]; /* volume for the left and right channel */
- UINT32 addr[KDAC_A_PCM_MAX];
- UINT32 start[KDAC_A_PCM_MAX];
- UINT32 step[KDAC_A_PCM_MAX];
- UINT32 bank[KDAC_A_PCM_MAX];
- int play[KDAC_A_PCM_MAX];
+ UINT8 vol[KDAC_A_PCM_MAX][2]; /* volume for the left and right channel */
+ UINT32 addr[KDAC_A_PCM_MAX];
+ UINT32 start[KDAC_A_PCM_MAX];
+ UINT32 step[KDAC_A_PCM_MAX];
+ UINT32 bank[KDAC_A_PCM_MAX];
+ int play[KDAC_A_PCM_MAX];
- UINT8 wreg[0x10]; /* write data */
- UINT8 * pcmbuf[2]; /* Channel A & B pointers */
+ UINT8 wreg[0x10]; /* write data */
+ UINT8 * pcmbuf[2]; /* Channel A & B pointers */
- UINT32 clock; /* chip clock */
- UINT32 pcmlimit;
+ UINT32 clock; /* chip clock */
+ UINT32 pcmlimit;
- sound_stream * stream;
+ sound_stream * stream;
const k007232_interface *intf;
- UINT32 fncode[0x200];
+ UINT32 fncode[0x200];
};
@@ -64,154 +64,154 @@ INLINE KDAC_A_PCM *get_safe_token(device_t *device)
#if 0
static const int kdac_note[] = {
- 261.63/8, 277.18/8,
- 293.67/8, 311.13/8,
- 329.63/8,
- 349.23/8, 369.99/8,
- 392.00/8, 415.31/8,
- 440.00/8, 466.16/8,
- 493.88/8,
-
- 523.25/8,
+ 261.63/8, 277.18/8,
+ 293.67/8, 311.13/8,
+ 329.63/8,
+ 349.23/8, 369.99/8,
+ 392.00/8, 415.31/8,
+ 440.00/8, 466.16/8,
+ 493.88/8,
+
+ 523.25/8,
};
static const float kdaca_fn[][2] = {
- /* B */
- { 0x03f, 493.88/8 }, /* ?? */
- { 0x11f, 493.88/4 }, /* ?? */
- { 0x18f, 493.88/2 }, /* ?? */
- { 0x1c7, 493.88 },
- { 0x1e3, 493.88*2 },
- { 0x1f1, 493.88*4 }, /* ?? */
- { 0x1f8, 493.88*8 }, /* ?? */
- /* A+ */
- { 0x020, 466.16/8 }, /* ?? */
- { 0x110, 466.16/4 }, /* ?? */
- { 0x188, 466.16/2 },
- { 0x1c4, 466.16 },
- { 0x1e2, 466.16*2 },
- { 0x1f1, 466.16*4 }, /* ?? */
- { 0x1f8, 466.16*8 }, /* ?? */
- /* A */
- { 0x000, 440.00/8 }, /* ?? */
- { 0x100, 440.00/4 }, /* ?? */
- { 0x180, 440.00/2 },
- { 0x1c0, 440.00 },
- { 0x1e0, 440.00*2 },
- { 0x1f0, 440.00*4 }, /* ?? */
- { 0x1f8, 440.00*8 }, /* ?? */
- { 0x1fc, 440.00*16}, /* ?? */
- { 0x1fe, 440.00*32}, /* ?? */
- { 0x1ff, 440.00*64}, /* ?? */
- /* G+ */
- { 0x0f2, 415.31/4 },
- { 0x179, 415.31/2 },
- { 0x1bc, 415.31 },
- { 0x1de, 415.31*2 },
- { 0x1ef, 415.31*4 }, /* ?? */
- { 0x1f7, 415.31*8 }, /* ?? */
- /* G */
- { 0x0e2, 392.00/4 },
- { 0x171, 392.00/2 },
- { 0x1b8, 392.00 },
- { 0x1dc, 392.00*2 },
- { 0x1ee, 392.00*4 }, /* ?? */
- { 0x1f7, 392.00*8 }, /* ?? */
- /* F+ */
- { 0x0d0, 369.99/4 }, /* ?? */
- { 0x168, 369.99/2 },
- { 0x1b4, 369.99 },
- { 0x1da, 369.99*2 },
- { 0x1ed, 369.99*4 }, /* ?? */
- { 0x1f6, 369.99*8 }, /* ?? */
- /* F */
- { 0x0bf, 349.23/4 }, /* ?? */
- { 0x15f, 349.23/2 },
- { 0x1af, 349.23 },
- { 0x1d7, 349.23*2 },
- { 0x1eb, 349.23*4 }, /* ?? */
- { 0x1f5, 349.23*8 }, /* ?? */
- /* E */
- { 0x0ac, 329.63/4 },
- { 0x155, 329.63/2 }, /* ?? */
- { 0x1ab, 329.63 },
- { 0x1d5, 329.63*2 },
- { 0x1ea, 329.63*4 }, /* ?? */
- { 0x1f4, 329.63*8 }, /* ?? */
- /* D+ */
- { 0x098, 311.13/4 }, /* ?? */
- { 0x14c, 311.13/2 },
- { 0x1a6, 311.13 },
- { 0x1d3, 311.13*2 },
- { 0x1e9, 311.13*4 }, /* ?? */
- { 0x1f4, 311.13*8 }, /* ?? */
- /* D */
- { 0x080, 293.67/4 }, /* ?? */
- { 0x140, 293.67/2 }, /* ?? */
- { 0x1a0, 293.67 },
- { 0x1d0, 293.67*2 },
- { 0x1e8, 293.67*4 }, /* ?? */
- { 0x1f4, 293.67*8 }, /* ?? */
- { 0x1fa, 293.67*16}, /* ?? */
- { 0x1fd, 293.67*32}, /* ?? */
- /* C+ */
- { 0x06d, 277.18/4 }, /* ?? */
- { 0x135, 277.18/2 }, /* ?? */
- { 0x19b, 277.18 },
- { 0x1cd, 277.18*2 },
- { 0x1e6, 277.18*4 }, /* ?? */
- { 0x1f2, 277.18*8 }, /* ?? */
- /* C */
- { 0x054, 261.63/4 },
- { 0x12a, 261.63/2 },
- { 0x195, 261.63 },
- { 0x1ca, 261.63*2 },
- { 0x1e5, 261.63*4 },
- { 0x1f2, 261.63*8 }, /* ?? */
-
- { -1, -1 },
+ /* B */
+ { 0x03f, 493.88/8 }, /* ?? */
+ { 0x11f, 493.88/4 }, /* ?? */
+ { 0x18f, 493.88/2 }, /* ?? */
+ { 0x1c7, 493.88 },
+ { 0x1e3, 493.88*2 },
+ { 0x1f1, 493.88*4 }, /* ?? */
+ { 0x1f8, 493.88*8 }, /* ?? */
+ /* A+ */
+ { 0x020, 466.16/8 }, /* ?? */
+ { 0x110, 466.16/4 }, /* ?? */
+ { 0x188, 466.16/2 },
+ { 0x1c4, 466.16 },
+ { 0x1e2, 466.16*2 },
+ { 0x1f1, 466.16*4 }, /* ?? */
+ { 0x1f8, 466.16*8 }, /* ?? */
+ /* A */
+ { 0x000, 440.00/8 }, /* ?? */
+ { 0x100, 440.00/4 }, /* ?? */
+ { 0x180, 440.00/2 },
+ { 0x1c0, 440.00 },
+ { 0x1e0, 440.00*2 },
+ { 0x1f0, 440.00*4 }, /* ?? */
+ { 0x1f8, 440.00*8 }, /* ?? */
+ { 0x1fc, 440.00*16}, /* ?? */
+ { 0x1fe, 440.00*32}, /* ?? */
+ { 0x1ff, 440.00*64}, /* ?? */
+ /* G+ */
+ { 0x0f2, 415.31/4 },
+ { 0x179, 415.31/2 },
+ { 0x1bc, 415.31 },
+ { 0x1de, 415.31*2 },
+ { 0x1ef, 415.31*4 }, /* ?? */
+ { 0x1f7, 415.31*8 }, /* ?? */
+ /* G */
+ { 0x0e2, 392.00/4 },
+ { 0x171, 392.00/2 },
+ { 0x1b8, 392.00 },
+ { 0x1dc, 392.00*2 },
+ { 0x1ee, 392.00*4 }, /* ?? */
+ { 0x1f7, 392.00*8 }, /* ?? */
+ /* F+ */
+ { 0x0d0, 369.99/4 }, /* ?? */
+ { 0x168, 369.99/2 },
+ { 0x1b4, 369.99 },
+ { 0x1da, 369.99*2 },
+ { 0x1ed, 369.99*4 }, /* ?? */
+ { 0x1f6, 369.99*8 }, /* ?? */
+ /* F */
+ { 0x0bf, 349.23/4 }, /* ?? */
+ { 0x15f, 349.23/2 },
+ { 0x1af, 349.23 },
+ { 0x1d7, 349.23*2 },
+ { 0x1eb, 349.23*4 }, /* ?? */
+ { 0x1f5, 349.23*8 }, /* ?? */
+ /* E */
+ { 0x0ac, 329.63/4 },
+ { 0x155, 329.63/2 }, /* ?? */
+ { 0x1ab, 329.63 },
+ { 0x1d5, 329.63*2 },
+ { 0x1ea, 329.63*4 }, /* ?? */
+ { 0x1f4, 329.63*8 }, /* ?? */
+ /* D+ */
+ { 0x098, 311.13/4 }, /* ?? */
+ { 0x14c, 311.13/2 },
+ { 0x1a6, 311.13 },
+ { 0x1d3, 311.13*2 },
+ { 0x1e9, 311.13*4 }, /* ?? */
+ { 0x1f4, 311.13*8 }, /* ?? */
+ /* D */
+ { 0x080, 293.67/4 }, /* ?? */
+ { 0x140, 293.67/2 }, /* ?? */
+ { 0x1a0, 293.67 },
+ { 0x1d0, 293.67*2 },
+ { 0x1e8, 293.67*4 }, /* ?? */
+ { 0x1f4, 293.67*8 }, /* ?? */
+ { 0x1fa, 293.67*16}, /* ?? */
+ { 0x1fd, 293.67*32}, /* ?? */
+ /* C+ */
+ { 0x06d, 277.18/4 }, /* ?? */
+ { 0x135, 277.18/2 }, /* ?? */
+ { 0x19b, 277.18 },
+ { 0x1cd, 277.18*2 },
+ { 0x1e6, 277.18*4 }, /* ?? */
+ { 0x1f2, 277.18*8 }, /* ?? */
+ /* C */
+ { 0x054, 261.63/4 },
+ { 0x12a, 261.63/2 },
+ { 0x195, 261.63 },
+ { 0x1ca, 261.63*2 },
+ { 0x1e5, 261.63*4 },
+ { 0x1f2, 261.63*8 }, /* ?? */
+
+ { -1, -1 },
};
#endif
/*************************************************************/
static void KDAC_A_make_fncode( KDAC_A_PCM *info ){
- int i;
+ int i;
#if 0
- int i, j, k;
- float fn;
- for( i = 0; i < 0x200; i++ ) fncode[i] = 0;
-
- i = 0;
- while( (int)kdaca_fn[i][0] != -1 ){
- fncode[(int)kdaca_fn[i][0]] = kdaca_fn[i][1];
- i++;
- }
-
- i = j = 0;
- while( i < 0x200 ){
- if( fncode[i] != 0 ){
- if( i != j ){
+ int i, j, k;
+ float fn;
+ for( i = 0; i < 0x200; i++ ) fncode[i] = 0;
+
+ i = 0;
+ while( (int)kdaca_fn[i][0] != -1 ){
+ fncode[(int)kdaca_fn[i][0]] = kdaca_fn[i][1];
+ i++;
+ }
+
+ i = j = 0;
+ while( i < 0x200 ){
+ if( fncode[i] != 0 ){
+ if( i != j ){
fn = (fncode[i] - fncode[j]) / (i - j);
for( k = 1; k < (i-j); k++ )
- fncode[k+j] = fncode[j] + fn*k;
+ fncode[k+j] = fncode[j] + fn*k;
j = i;
- }
- }
- i++;
- }
+ }
+ }
+ i++;
+ }
#if 0
- for( i = 0; i < 0x200; i++ )
- logerror("fncode[%04x] = %.2f\n", i, fncode[i] );
+ for( i = 0; i < 0x200; i++ )
+ logerror("fncode[%04x] = %.2f\n", i, fncode[i] );
#endif
#else
- for( i = 0; i < 0x200; i++ ){
- //fncode[i] = (0x200 * 55) / (0x200 - i);
- info->fncode[i] = (32 << BASE_SHIFT) / (0x200 - i);
+ for( i = 0; i < 0x200; i++ ){
+ //fncode[i] = (0x200 * 55) / (0x200 - i);
+ info->fncode[i] = (32 << BASE_SHIFT) / (0x200 - i);
// info->fncode[i] = ((0x200 * 55.2 / 880) / (0x200 - i));
- // = 512 * 55.2 / 220 / (512 - i) = 128 / (512 - i)
- // logerror("2 : fncode[%04x] = %.2f\n", i, fncode[i] );
- }
+ // = 512 * 55.2 / 220 / (512 - i) = 128 / (512 - i)
+ // logerror("2 : fncode[%04x] = %.2f\n", i, fncode[i] );
+ }
#endif
}
@@ -223,75 +223,75 @@ static void KDAC_A_make_fncode( KDAC_A_PCM *info ){
static STREAM_UPDATE( KDAC_A_update )
{
- KDAC_A_PCM *info = (KDAC_A_PCM *)param;
- int i;
+ KDAC_A_PCM *info = (KDAC_A_PCM *)param;
+ int i;
- memset(outputs[0],0,samples * sizeof(*outputs[0]));
- memset(outputs[1],0,samples * sizeof(*outputs[1]));
+ memset(outputs[0],0,samples * sizeof(*outputs[0]));
+ memset(outputs[1],0,samples * sizeof(*outputs[1]));
- for( i = 0; i < KDAC_A_PCM_MAX; i++ )
- {
- if (info->play[i])
+ for( i = 0; i < KDAC_A_PCM_MAX; i++ )
+ {
+ if (info->play[i])
{
- int volA,volB,j,out;
- unsigned int addr, old_addr;
- //int cen;
-
- /**** PCM setup ****/
- addr = info->start[i] + ((info->addr[i]>>BASE_SHIFT)&0x000fffff);
- volA = info->vol[i][0] * 2;
- volB = info->vol[i][1] * 2;
+ int volA,volB,j,out;
+ unsigned int addr, old_addr;
+ //int cen;
+
+ /**** PCM setup ****/
+ addr = info->start[i] + ((info->addr[i]>>BASE_SHIFT)&0x000fffff);
+ volA = info->vol[i][0] * 2;
+ volB = info->vol[i][1] * 2;
#if 0
- cen = (volA + volB) / 2;
- volA = (volA + cen) < 0x1fe ? (volA + cen) : 0x1fe;
- volB = (volB + cen) < 0x1fe ? (volB + cen) : 0x1fe;
+ cen = (volA + volB) / 2;
+ volA = (volA + cen) < 0x1fe ? (volA + cen) : 0x1fe;
+ volB = (volB + cen) < 0x1fe ? (volB + cen) : 0x1fe;
#endif
- for( j = 0; j < samples; j++ )
- {
- old_addr = addr;
- addr = info->start[i] + ((info->addr[i]>>BASE_SHIFT)&0x000fffff);
- while (old_addr <= addr)
+ for( j = 0; j < samples; j++ )
{
- if( (info->pcmbuf[i][old_addr] & 0x80) || old_addr >= info->pcmlimit )
- {
- /* end of sample */
+ old_addr = addr;
+ addr = info->start[i] + ((info->addr[i]>>BASE_SHIFT)&0x000fffff);
+ while (old_addr <= addr)
+ {
+ if( (info->pcmbuf[i][old_addr] & 0x80) || old_addr >= info->pcmlimit )
+ {
+ /* end of sample */
- if( info->wreg[0x0d]&(1<<i) )
+ if( info->wreg[0x0d]&(1<<i) )
{
- /* loop to the beginning */
- info->start[i] =
- ((((unsigned int)info->wreg[i*0x06 + 0x04]<<16)&0x00010000) |
- (((unsigned int)info->wreg[i*0x06 + 0x03]<< 8)&0x0000ff00) |
- (((unsigned int)info->wreg[i*0x06 + 0x02] )&0x000000ff) |
- info->bank[i]);
- addr = info->start[i];
- info->addr[i] = 0;
- old_addr = addr; /* skip loop */
+ /* loop to the beginning */
+ info->start[i] =
+ ((((unsigned int)info->wreg[i*0x06 + 0x04]<<16)&0x00010000) |
+ (((unsigned int)info->wreg[i*0x06 + 0x03]<< 8)&0x0000ff00) |
+ (((unsigned int)info->wreg[i*0x06 + 0x02] )&0x000000ff) |
+ info->bank[i]);
+ addr = info->start[i];
+ info->addr[i] = 0;
+ old_addr = addr; /* skip loop */
}
- else
+ else
{
- /* stop sample */
- info->play[i] = 0;
+ /* stop sample */
+ info->play[i] = 0;
+ }
+ break;
}
- break;
- }
- old_addr++;
+ old_addr++;
}
- if (info->play[i] == 0)
+ if (info->play[i] == 0)
break;
- info->addr[i] += info->step[i];
+ info->addr[i] += info->step[i];
- out = (info->pcmbuf[i][addr] & 0x7f) - 0x40;
+ out = (info->pcmbuf[i][addr] & 0x7f) - 0x40;
- outputs[0][j] += out * volA;
- outputs[1][j] += out * volB;
- }
+ outputs[0][j] += out * volA;
+ outputs[1][j] += out * volB;
+ }
+ }
}
- }
}
@@ -321,10 +321,10 @@ static DEVICE_START( k007232 )
info->play[i] = 0;
info->bank[i] = 0;
}
- info->vol[0][0] = 255; /* channel A output to output A */
+ info->vol[0][0] = 255; /* channel A output to output A */
info->vol[0][1] = 0;
info->vol[1][0] = 0;
- info->vol[1][1] = 255; /* channel B output to output B */
+ info->vol[1][1] = 255; /* channel B output to output B */
for( i = 0; i < 0x10; i++ ) info->wreg[i] = 0;
@@ -338,64 +338,64 @@ static DEVICE_START( k007232 )
/************************************************/
WRITE8_DEVICE_HANDLER( k007232_w )
{
- KDAC_A_PCM *info = get_safe_token(device);
- int r = offset;
- int v = data;
-
- info->stream->update();
-
- info->wreg[r] = v; /* stock write data */
-
- if (r == 0x0c){
- /* external port, usually volume control */
- if (info->intf->portwritehandler) (*info->intf->portwritehandler)(device,v);
- return;
- }
- else if( r == 0x0d ){
- /* loopflag. */
- return;
- }
- else{
- int reg_port;
-
- reg_port = 0;
- if (r >= 0x06){
- reg_port = 1;
- r -= 0x06;
- }
-
- switch (r){
- case 0x00:
- case 0x01:
+ KDAC_A_PCM *info = get_safe_token(device);
+ int r = offset;
+ int v = data;
+
+ info->stream->update();
+
+ info->wreg[r] = v; /* stock write data */
+
+ if (r == 0x0c){
+ /* external port, usually volume control */
+ if (info->intf->portwritehandler) (*info->intf->portwritehandler)(device,v);
+ return;
+ }
+ else if( r == 0x0d ){
+ /* loopflag. */
+ return;
+ }
+ else{
+ int reg_port;
+
+ reg_port = 0;
+ if (r >= 0x06){
+ reg_port = 1;
+ r -= 0x06;
+ }
+
+ switch (r){
+ case 0x00:
+ case 0x01:
{
/**** address step ****/
- int idx = (((((unsigned int)info->wreg[reg_port*0x06 + 0x01])<<8)&0x0100) | (((unsigned int)info->wreg[reg_port*0x06 + 0x00])&0x00ff));
+ int idx = (((((unsigned int)info->wreg[reg_port*0x06 + 0x01])<<8)&0x0100) | (((unsigned int)info->wreg[reg_port*0x06 + 0x00])&0x00ff));
#if 0
- if( !reg_port && r == 1 )
+ if( !reg_port && r == 1 )
logerror("%04x\n" ,idx );
#endif
- info->step[reg_port] = info->fncode[idx];
- break;
+ info->step[reg_port] = info->fncode[idx];
+ break;
}
- case 0x02:
- case 0x03:
- case 0x04:
- break;
- case 0x05:
+ case 0x02:
+ case 0x03:
+ case 0x04:
+ break;
+ case 0x05:
/**** start address ****/
- info->start[reg_port] =
+ info->start[reg_port] =
((((unsigned int)info->wreg[reg_port*0x06 + 0x04]<<16)&0x00010000) |
- (((unsigned int)info->wreg[reg_port*0x06 + 0x03]<< 8)&0x0000ff00) |
- (((unsigned int)info->wreg[reg_port*0x06 + 0x02] )&0x000000ff) |
- info->bank[reg_port]);
- if (info->start[reg_port] < info->pcmlimit ){
+ (((unsigned int)info->wreg[reg_port*0x06 + 0x03]<< 8)&0x0000ff00) |
+ (((unsigned int)info->wreg[reg_port*0x06 + 0x02] )&0x000000ff) |
+ info->bank[reg_port]);
+ if (info->start[reg_port] < info->pcmlimit ){
info->play[reg_port] = 1;
info->addr[reg_port] = 0;
- }
- break;
- }
- }
+ }
+ break;
+ }
+ }
}
/************************************************/
@@ -403,42 +403,42 @@ WRITE8_DEVICE_HANDLER( k007232_w )
/************************************************/
READ8_DEVICE_HANDLER( k007232_r )
{
- KDAC_A_PCM *info = get_safe_token(device);
- int r = offset;
- int ch = 0;
-
- if( r == 0x0005 || r == 0x000b ){
- ch = r/0x0006;
- r = ch * 0x0006;
-
- info->start[ch] =
- ((((unsigned int)info->wreg[r + 0x04]<<16)&0x00010000) |
- (((unsigned int)info->wreg[r + 0x03]<< 8)&0x0000ff00) |
- (((unsigned int)info->wreg[r + 0x02] )&0x000000ff) |
- info->bank[ch]);
-
- if (info->start[ch] < info->pcmlimit ){
- info->play[ch] = 1;
- info->addr[ch] = 0;
- }
- }
- return 0;
+ KDAC_A_PCM *info = get_safe_token(device);
+ int r = offset;
+ int ch = 0;
+
+ if( r == 0x0005 || r == 0x000b ){
+ ch = r/0x0006;
+ r = ch * 0x0006;
+
+ info->start[ch] =
+ ((((unsigned int)info->wreg[r + 0x04]<<16)&0x00010000) |
+ (((unsigned int)info->wreg[r + 0x03]<< 8)&0x0000ff00) |
+ (((unsigned int)info->wreg[r + 0x02] )&0x000000ff) |
+ info->bank[ch]);
+
+ if (info->start[ch] < info->pcmlimit ){
+ info->play[ch] = 1;
+ info->addr[ch] = 0;
+ }
+ }
+ return 0;
}
/*****************************************************************************/
void k007232_set_volume(device_t *device,int channel,int volumeA,int volumeB)
{
- KDAC_A_PCM *info = get_safe_token(device);
- info->vol[channel][0] = volumeA;
- info->vol[channel][1] = volumeB;
+ KDAC_A_PCM *info = get_safe_token(device);
+ info->vol[channel][0] = volumeA;
+ info->vol[channel][1] = volumeB;
}
void k007232_set_bank( device_t *device, int chABank, int chBBank )
{
- KDAC_A_PCM *info = get_safe_token(device);
- info->bank[0] = chABank<<17;
- info->bank[1] = chBBank<<17;
+ KDAC_A_PCM *info = get_safe_token(device);
+ info->bank[0] = chABank<<17;
+ info->bank[1] = chBBank<<17;
}
/*****************************************************************************/
@@ -447,7 +447,7 @@ const device_type K007232 = &device_creator<k007232_device>;
k007232_device::k007232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, K007232, "K007232", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(KDAC_A_PCM);
}
@@ -480,5 +480,3 @@ void k007232_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/k007232.h b/src/emu/sound/k007232.h
index 24284c2cf76..d0ce80e5aa9 100644
--- a/src/emu/sound/k007232.h
+++ b/src/emu/sound/k007232.h
@@ -30,7 +30,7 @@ void k007232_set_bank( device_t *device, int chABank, int chBBank );
void k007232_set_volume(device_t *device,int channel,int volumeA,int volumeB);
class k007232_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
k007232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/k051649.c b/src/emu/sound/k051649.c
index ed9e2b9b059..e3503a1eb52 100644
--- a/src/emu/sound/k051649.c
+++ b/src/emu/sound/k051649.c
@@ -25,8 +25,8 @@
#include "emu.h"
#include "k051649.h"
-#define FREQ_BITS 16
-#define DEF_GAIN 8
+#define FREQ_BITS 16
+#define DEF_GAIN 8
/* this structure defines the parameters for a channel */
@@ -175,8 +175,8 @@ WRITE8_DEVICE_HANDLER( k051649_waveform_w )
info->stream->update();
- if (offset >= 0x60)
- {
+ if (offset >= 0x60)
+ {
/* channel 5 shares waveram with channel 4 */
info->channel_list[3].waveram[offset&0x1f]=data;
info->channel_list[4].waveram[offset&0x1f]=data;
@@ -284,7 +284,7 @@ const device_type K051649 = &device_creator<k051649_device>;
k051649_device::k051649_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, K051649, "K051649", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(k051649_state);
}
@@ -326,5 +326,3 @@ void k051649_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/k051649.h b/src/emu/sound/k051649.h
index 65aebff0ce7..889dc84f809 100644
--- a/src/emu/sound/k051649.h
+++ b/src/emu/sound/k051649.h
@@ -17,7 +17,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( k052539_waveform_w );
DECLARE_READ8_DEVICE_HANDLER ( k052539_waveform_r );
class k051649_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
k051649_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/k053260.c b/src/emu/sound/k053260.c
index 3707102c227..096388eba57 100644
--- a/src/emu/sound/k053260.c
+++ b/src/emu/sound/k053260.c
@@ -11,34 +11,34 @@
#define LOG 0
-#define BASE_SHIFT 16
+#define BASE_SHIFT 16
struct k053260_channel
{
- UINT32 rate;
- UINT32 size;
- UINT32 start;
- UINT32 bank;
- UINT32 volume;
- int play;
- UINT32 pan;
- UINT32 pos;
- int loop;
- int ppcm; /* packed PCM ( 4 bit signed ) */
- int ppcm_data;
+ UINT32 rate;
+ UINT32 size;
+ UINT32 start;
+ UINT32 bank;
+ UINT32 volume;
+ int play;
+ UINT32 pan;
+ UINT32 pos;
+ int loop;
+ int ppcm; /* packed PCM ( 4 bit signed ) */
+ int ppcm_data;
};
struct k053260_state
{
- sound_stream * channel;
- int mode;
- int regs[0x30];
- UINT8 *rom;
- int rom_size;
- UINT32 *delta_table;
- k053260_channel channels[4];
- const k053260_interface *intf;
- device_t *device;
+ sound_stream * channel;
+ int mode;
+ int regs[0x30];
+ UINT8 *rom;
+ int rom_size;
+ UINT32 *delta_table;
+ k053260_channel channels[4];
+ const k053260_interface *intf;
+ device_t *device;
};
INLINE k053260_state *get_safe_token(device_t *device)
@@ -51,9 +51,9 @@ INLINE k053260_state *get_safe_token(device_t *device)
static void InitDeltaTable( k053260_state *ic, int rate, int clock )
{
- int i;
- double base = ( double )rate;
- double max = (double)(clock); /* Hz */
+ int i;
+ double base = ( double )rate;
+ double max = (double)(clock); /* Hz */
UINT32 val;
for( i = 0; i < 0x1000; i++ ) {
@@ -294,7 +294,7 @@ WRITE8_DEVICE_HANDLER( k053260_w )
return;
}
- ic->channel->update();
+ ic->channel->update();
/* before we update the regs, we need to check for a latched reg */
if ( r == 0x28 ) {
@@ -439,7 +439,7 @@ const device_type K053260 = &device_creator<k053260_device>;
k053260_device::k053260_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, K053260, "K053260", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(k053260_state);
}
@@ -481,5 +481,3 @@ void k053260_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/k053260.h b/src/emu/sound/k053260.h
index b51dd367750..5478d31023a 100644
--- a/src/emu/sound/k053260.h
+++ b/src/emu/sound/k053260.h
@@ -13,7 +13,7 @@
struct k053260_interface {
const char *rgnoverride;
- timer_expired_func irq; /* called on SH1 complete cycle ( clock / 32 ) */
+ timer_expired_func irq; /* called on SH1 complete cycle ( clock / 32 ) */
};
@@ -21,7 +21,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( k053260_w );
DECLARE_READ8_DEVICE_HANDLER( k053260_r );
class k053260_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
k053260_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/k054539.c b/src/emu/sound/k054539.c
index fbe32e56999..de2c304cd86 100644
--- a/src/emu/sound/k054539.c
+++ b/src/emu/sound/k054539.c
@@ -28,7 +28,7 @@ const device_type K054539 = &device_creator<k054539_device>;
k054539_device::k054539_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, K054539, "K054539", "k054539", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -349,11 +349,11 @@ WRITE8_MEMBER(k054539_device::write)
int voice, reg;
/* The K054539 has behavior like many other wavetable chips including
- the Ensoniq 550x and Gravis GF-1: if a voice is active, writing
- to it's current position is silently ignored.
+ the Ensoniq 550x and Gravis GF-1: if a voice is active, writing
+ to it's current position is silently ignored.
- Dadandaan depends on this or the vocals go wrong.
- */
+ Dadandaan depends on this or the vocals go wrong.
+ */
if (offset < 8*0x20)
{
voice = offset / 0x20;
@@ -444,8 +444,8 @@ WRITE8_MEMBER(k054539_device::write)
if((offset & 0xff00) == 0) {
chanoff = offset & 0x1f;
if(chanoff < 4 || chanoff == 5 ||
- (chanoff >=8 && chanoff <= 0xa) ||
- (chanoff >= 0xc && chanoff <= 0xe))
+ (chanoff >=8 && chanoff <= 0xa) ||
+ (chanoff >= 0xc && chanoff <= 0xe))
break;
}
if(1 || ((offset >= 0x200) && (offset <= 0x210)))
@@ -494,15 +494,15 @@ void k054539_device::device_start()
flags = RESET_FLAGS;
/*
- I've tried various equations on volume control but none worked consistently.
- The upper four channels in most MW/GX games simply need a significant boost
- to sound right. For example, the bass and smash sound volumes in Violent Storm
- have roughly the same values and the voices in Tokimeki Puzzledama are given
- values smaller than those of the hihats. Needless to say the two K054539 chips
- in Mystic Warriors are completely out of balance. Rather than forcing a
- "one size fits all" function to the voltab the current invert exponential
- appraoch seems most appropriate.
- */
+ I've tried various equations on volume control but none worked consistently.
+ The upper four channels in most MW/GX games simply need a significant boost
+ to sound right. For example, the bass and smash sound volumes in Violent Storm
+ have roughly the same values and the voices in Tokimeki Puzzledama are given
+ values smaller than those of the hihats. Needless to say the two K054539 chips
+ in Mystic Warriors are completely out of balance. Rather than forcing a
+ "one size fits all" function to the voltab the current invert exponential
+ appraoch seems most appropriate.
+ */
// Factor the 1/4 for the number of channels in the volume (1/8 is too harsh, 1/2 gives clipping)
// vol=0 -> no attenuation, vol=0x40 -> -36dB
for(int i=0; i<256; i++)
diff --git a/src/emu/sound/k054539.h b/src/emu/sound/k054539.h
index f49ab6d0098..e79dd6cdc9b 100644
--- a/src/emu/sound/k054539.h
+++ b/src/emu/sound/k054539.h
@@ -16,7 +16,7 @@
struct k054539_interface
{
const char *rgnoverride;
- void (*apan)(device_t *, double, double); /* Callback for analog output mixing levels (0..1 for each channel) */
+ void (*apan)(device_t *, double, double); /* Callback for analog output mixing levels (0..1 for each channel) */
void (*irq)(device_t *);
};
@@ -32,8 +32,8 @@ void k054539_init_flags(device_t *device, int flags);
void k054539_set_gain(device_t *device, int channel, double gain);
class k054539_device : public device_t,
- public device_sound_interface,
- public k054539_interface
+ public device_sound_interface,
+ public k054539_interface
{
public:
enum {
@@ -55,16 +55,16 @@ public:
void init_flags(int flags);
/*
- Note that the eight PCM channels of a K054539 do not have separate
- volume controls. Considering the global attenuation equation may not
- be entirely accurate, k054539_set_gain() provides means to control
- channel gain. It can be called anywhere but preferrably from
- DRIVER_INIT().
-
- Parameters:
- channel : 0 - 7
- gain : 0.0=silent, 1.0=no gain, 2.0=twice as loud, etc.
- */
+ Note that the eight PCM channels of a K054539 do not have separate
+ volume controls. Considering the global attenuation equation may not
+ be entirely accurate, k054539_set_gain() provides means to control
+ channel gain. It can be called anywhere but preferrably from
+ DRIVER_INIT().
+
+ Parameters:
+ channel : 0 - 7
+ gain : 0.0=silent, 1.0=no gain, 2.0=twice as loud, etc.
+ */
void set_gain(int channel, double gain);
protected:
diff --git a/src/emu/sound/k056800.c b/src/emu/sound/k056800.c
index df037f37e74..3c6b40005fe 100644
--- a/src/emu/sound/k056800.c
+++ b/src/emu/sound/k056800.c
@@ -141,7 +141,7 @@ static DEVICE_START( k056800 )
{
k056800_state *k056800 = k056800_get_safe_token(device);
const k056800_interface *intf = k056800_get_interface(device);
- attotime timer_period = attotime::from_hz(44100) * 128; // roughly 2.9us
+ attotime timer_period = attotime::from_hz(44100) * 128; // roughly 2.9us
k056800->irq_cb = intf->irq_cb;
@@ -198,5 +198,3 @@ void k056800_device::device_reset()
{
DEVICE_RESET_NAME( k056800 )(this);
}
-
-
diff --git a/src/emu/sound/k056800.h b/src/emu/sound/k056800.h
index ca4a6a42b9b..fe08dce7bab 100644
--- a/src/emu/sound/k056800.h
+++ b/src/emu/sound/k056800.h
@@ -64,5 +64,3 @@ DECLARE_WRITE16_DEVICE_HANDLER( k056800_sound_w );
#endif /* __K056800_H__ */
-
-
diff --git a/src/emu/sound/lmc1992.c b/src/emu/sound/lmc1992.c
index 2aa84de70ab..b04a05404c7 100644
--- a/src/emu/sound/lmc1992.c
+++ b/src/emu/sound/lmc1992.c
@@ -32,7 +32,7 @@
#define LOG 0
-#define MICROWIRE_DEVICE_ADDRESS 2
+#define MICROWIRE_DEVICE_ADDRESS 2
enum
@@ -141,7 +141,7 @@ inline void lmc1992_device::execute_command(int addr, int data)
lmc1992_device::lmc1992_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, LMC1992, "LMC1992", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
diff --git a/src/emu/sound/lmc1992.h b/src/emu/sound/lmc1992.h
index 0cc9965ad37..9f6d29a1c9b 100644
--- a/src/emu/sound/lmc1992.h
+++ b/src/emu/sound/lmc1992.h
@@ -67,12 +67,12 @@ enum
// ======================> lmc1992_device
-class lmc1992_device : public device_t,
+class lmc1992_device : public device_t,
public device_sound_interface
{
public:
- // construction/destruction
- lmc1992_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ lmc1992_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// inline configuration helpers
static void static_set_config(device_t &device, int clock2);
@@ -82,8 +82,8 @@ public:
DECLARE_WRITE_LINE_MEMBER( enable_w );
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
// internal callbacks
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
@@ -93,19 +93,19 @@ private:
sound_stream *m_stream[4];
- int m_enable; // enable latch
- int m_data; // data latch
- int m_clk; // clock latch
- UINT16 m_si; // serial in shift register
-
- int m_input; // input select
- int m_bass; // bass
- int m_treble; // treble
- int m_volume; // volume
- int m_fader_rf; // right front fader
- int m_fader_lf; // left front fader
- int m_fader_rr; // right rear fader
- int m_fader_lr; // left rear fader
+ int m_enable; // enable latch
+ int m_data; // data latch
+ int m_clk; // clock latch
+ UINT16 m_si; // serial in shift register
+
+ int m_input; // input select
+ int m_bass; // bass
+ int m_treble; // treble
+ int m_volume; // volume
+ int m_fader_rf; // right front fader
+ int m_fader_lf; // left front fader
+ int m_fader_rr; // right rear fader
+ int m_fader_lr; // left rear fader
};
diff --git a/src/emu/sound/mas3507d.c b/src/emu/sound/mas3507d.c
index 84a47309fdc..3b5ad58f191 100644
--- a/src/emu/sound/mas3507d.c
+++ b/src/emu/sound/mas3507d.c
@@ -10,7 +10,7 @@ const device_type MAS3507D = &device_creator<mas3507d_device>;
mas3507d_device::mas3507d_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MAS3507D, "MAS3507D", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -258,4 +258,3 @@ void mas3507d_device::run_program(UINT32 adr)
void mas3507d_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
}
-
diff --git a/src/emu/sound/mos6560.c b/src/emu/sound/mos6560.c
index 92a2fefd25f..f17201ef499 100644
--- a/src/emu/sound/mos6560.c
+++ b/src/emu/sound/mos6560.c
@@ -78,14 +78,14 @@
/* 2008-05 FP: lightpen code needs to read input port from vc20.c */
-#define LIGHTPEN_BUTTON ((!m_lightpen_button_cb.isnull()) ? m_lightpen_button_cb(0) : 0)
-#define LIGHTPEN_X_VALUE ((!m_lightpen_x_cb.isnull()) ? m_lightpen_x_cb(0) : 0)
-#define LIGHTPEN_Y_VALUE ((!m_lightpen_y_cb.isnull()) ? m_lightpen_y_cb(0) : 0)
+#define LIGHTPEN_BUTTON ((!m_lightpen_button_cb.isnull()) ? m_lightpen_button_cb(0) : 0)
+#define LIGHTPEN_X_VALUE ((!m_lightpen_x_cb.isnull()) ? m_lightpen_x_cb(0) : 0)
+#define LIGHTPEN_Y_VALUE ((!m_lightpen_y_cb.isnull()) ? m_lightpen_y_cb(0) : 0)
/* lightpen delivers values from internal counters
* they do not start with the visual area or frame area */
#define MOS6560_X_BEGIN 38
-#define MOS6560_Y_BEGIN -6 /* first 6 lines after retrace not for lightpen! */
+#define MOS6560_Y_BEGIN -6 /* first 6 lines after retrace not for lightpen! */
#define MOS6561_X_BEGIN 38
#define MOS6561_Y_BEGIN -6
#define MOS656X_X_BEGIN ((m_variant == TYPE_6561) ? MOS6561_X_BEGIN : MOS6560_X_BEGIN)
@@ -413,12 +413,12 @@ READ8_MEMBER( mos6560_device::read )
case 3:
val = ((m_rasterline & 1) << 7) | (m_reg[offset] & 0x7f);
break;
- case 4: /*rasterline */
+ case 4: /*rasterline */
drawlines(m_lastline, m_rasterline);
val = (m_rasterline / 2) & 0xff;
break;
- case 6: /*lightpen horizontal */
- case 7: /*lightpen vertical */
+ case 6: /*lightpen horizontal */
+ case 7: /*lightpen vertical */
#ifdef UNUSED_FUNCTION
if (LIGHTPEN_BUTTON && ((machine().time().as_double() - m_lightpenreadtime) * MOS656X_VRETRACERATE >= 1))
{
@@ -434,8 +434,8 @@ READ8_MEMBER( mos6560_device::read )
#endif
val = m_reg[offset];
break;
- case 8: /* poti 1 */
- case 9: /* poti 2 */
+ case 8: /* poti 1 */
+ case 9: /* poti 2 */
val = (!m_paddle_cb->isnull()) ? m_paddle_cb[offset - 8](0) : m_reg[offset];
break;
default:
@@ -584,7 +584,7 @@ void mos6560_device::soundport_w( int offset, int data )
if (NOISE_ON)
{
m_noisesamples = (int) ((double) NOISE_FREQUENCY_MAX * machine().sample_rate()
- * NOISE_BUFFER_SIZE_SEC / NOISE_FREQUENCY);
+ * NOISE_BUFFER_SIZE_SEC / NOISE_FREQUENCY);
DBG_LOG (1, "mos6560", ("noise %.2x %d sample:%d\n",
data, NOISE_FREQUENCY, m_noisesamples));
if ((double) m_noisepos / m_noisesamples >= 1.0)
@@ -686,20 +686,20 @@ ADDRESS_MAP_END
mos6560_device::mos6560_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_sound_interface(mconfig, *this),
- m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(mos6560_videoram_map)),
- m_colorram_space_config("colorram", ENDIANNESS_LITTLE, 8, 10, 0, NULL, *ADDRESS_MAP_NAME(mos6560_colorram_map))
+ device_memory_interface(mconfig, *this),
+ device_sound_interface(mconfig, *this),
+ m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(mos6560_videoram_map)),
+ m_colorram_space_config("colorram", ENDIANNESS_LITTLE, 8, 10, 0, NULL, *ADDRESS_MAP_NAME(mos6560_colorram_map))
{
}
mos6560_device::mos6560_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MOS6560, "MOS6560", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- device_sound_interface(mconfig, *this),
- m_variant(TYPE_6560),
- m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(mos6560_videoram_map)),
- m_colorram_space_config("colorram", ENDIANNESS_LITTLE, 8, 10, 0, NULL, *ADDRESS_MAP_NAME(mos6560_colorram_map))
+ device_memory_interface(mconfig, *this),
+ device_sound_interface(mconfig, *this),
+ m_variant(TYPE_6560),
+ m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(mos6560_videoram_map)),
+ m_colorram_space_config("colorram", ENDIANNESS_LITTLE, 8, 10, 0, NULL, *ADDRESS_MAP_NAME(mos6560_colorram_map))
{
}
@@ -726,7 +726,7 @@ void mos6560_device::device_config_complete()
else
{
// TODO
- }
+ }
}
diff --git a/src/emu/sound/mos6560.h b/src/emu/sound/mos6560.h
index 87dcfc08725..057805e53cb 100644
--- a/src/emu/sound/mos6560.h
+++ b/src/emu/sound/mos6560.h
@@ -93,32 +93,32 @@
#define MOS6561_VRETRACERATE 50
#define MOS656X_HRETRACERATE 15625
-#define MOS6560_MAME_XPOS 4 /* xleft not displayed */
-#define MOS6560_MAME_YPOS 10 /* y up not displayed */
+#define MOS6560_MAME_XPOS 4 /* xleft not displayed */
+#define MOS6560_MAME_YPOS 10 /* y up not displayed */
#define MOS6561_MAME_XPOS 20
#define MOS6561_MAME_YPOS 10
-#define MOS6560_MAME_XSIZE 200
-#define MOS6560_MAME_YSIZE 248
-#define MOS6561_MAME_XSIZE 224
-#define MOS6561_MAME_YSIZE 296
+#define MOS6560_MAME_XSIZE 200
+#define MOS6560_MAME_YSIZE 248
+#define MOS6561_MAME_XSIZE 224
+#define MOS6561_MAME_YSIZE 296
/* real values */
#define MOS6560_LINES 261
#define MOS6561_LINES 312
-#define MOS6560_XSIZE (4+201) /* 4 left not visible */
-#define MOS6560_YSIZE (10+251) /* 10 not visible */
+#define MOS6560_XSIZE (4+201) /* 4 left not visible */
+#define MOS6560_YSIZE (10+251) /* 10 not visible */
/* cycles 65 */
-#define MOS6561_XSIZE (20+229) /* 20 left not visible */
-#define MOS6561_YSIZE (10+302) /* 10 not visible */
+#define MOS6561_XSIZE (20+229) /* 20 left not visible */
+#define MOS6561_YSIZE (10+302) /* 10 not visible */
/* cycles 71 */
/* the following values depend on the VIC clock,
* but to achieve TV-frequency the clock must have a fix frequency */
-#define MOS6560_CLOCK (14318181/14)
-#define MOS6561_CLOCK (4433618/4)
+#define MOS6560_CLOCK (14318181/14)
+#define MOS6561_CLOCK (4433618/4)
@@ -130,19 +130,19 @@
struct mos6560_interface
{
- const char *m_screen_tag;
+ const char *m_screen_tag;
- devcb_read8 m_potx_cb;
- devcb_read8 m_poty_cb;
+ devcb_read8 m_potx_cb;
+ devcb_read8 m_poty_cb;
};
// ======================> mos6560_device
class mos6560_device : public device_t,
- public device_memory_interface,
- public device_sound_interface,
- public mos6560_interface
+ public device_memory_interface,
+ public device_sound_interface,
+ public mos6560_interface
{
public:
mos6560_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
@@ -163,9 +163,9 @@ public:
protected:
enum
{
- TYPE_6560, // NTSC-M
- TYPE_6561, // PAL-B
- TYPE_ATTACK_UFO // NTSC-M, less features
+ TYPE_6560, // NTSC-M
+ TYPE_6561, // PAL-B
+ TYPE_ATTACK_UFO // NTSC-M, less features
};
// device-level overrides
@@ -187,8 +187,8 @@ protected:
int m_variant;
- const address_space_config m_videoram_space_config;
- const address_space_config m_colorram_space_config;
+ const address_space_config m_videoram_space_config;
+ const address_space_config m_colorram_space_config;
screen_device *m_screen;
@@ -217,14 +217,14 @@ protected:
UINT8 m_last_data;
/* paddles */
- devcb_resolved_read8 m_paddle_cb[2];
+ devcb_resolved_read8 m_paddle_cb[2];
/* sound part */
int m_tone1pos, m_tone2pos, m_tone3pos,
m_tonesize, m_tone1samples, m_tone2samples, m_tone3samples,
- m_noisesize, /* number of samples */
+ m_noisesize, /* number of samples */
m_noisepos, /* pos of tone */
- m_noisesamples; /* count of samples to give out per tone */
+ m_noisesamples; /* count of samples to give out per tone */
sound_stream *m_channel;
INT16 *m_tone;
@@ -237,8 +237,8 @@ protected:
class mos6561_device : public mos6560_device
{
public:
- // construction/destruction
- mos6561_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mos6561_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
@@ -247,8 +247,8 @@ public:
class mos656x_attack_ufo_device : public mos6560_device
{
public:
- // construction/destruction
- mos656x_attack_ufo_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mos656x_attack_ufo_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
diff --git a/src/emu/sound/mpeg_audio.c b/src/emu/sound/mpeg_audio.c
index 94f11c72842..4bb61d35844 100644
--- a/src/emu/sound/mpeg_audio.c
+++ b/src/emu/sound/mpeg_audio.c
@@ -1,6 +1,6 @@
/***************************************************************************
- MPEG audio support. Only layer2 and variants for now.
+ MPEG audio support. Only layer2 and variants for now.
***************************************************************************/
@@ -21,7 +21,7 @@ mpeg_audio::mpeg_audio(const void *_base, unsigned int _accepted, bool lsb_first
bool mpeg_audio::decode_buffer(int &pos, int limit, short *output,
- int &output_samples, int &sample_rate, int &channels)
+ int &output_samples, int &sample_rate, int &channels)
{
if(limit - pos < 16)
return false;
@@ -35,7 +35,7 @@ bool mpeg_audio::decode_buffer(int &pos, int limit, short *output,
current_limit = limit;
unsigned short sync = do_gb(base, current_pos, 12);
- retry_sync:
+ retry_sync:
while(sync != 0xfff && current_pos < limit)
sync = ((sync << 1) | do_gb(base, current_pos, 1)) & 0xfff;
diff --git a/src/emu/sound/mpeg_audio.h b/src/emu/sound/mpeg_audio.h
index 0ea2fb367e6..8bdf28c1397 100644
--- a/src/emu/sound/mpeg_audio.h
+++ b/src/emu/sound/mpeg_audio.h
@@ -1,6 +1,6 @@
/***************************************************************************
- MPEG audio support. Only layer2 and variants for now.
+ MPEG audio support. Only layer2 and variants for now.
***************************************************************************/
@@ -46,8 +46,8 @@ public:
// 1152 in the amm case, <1152 indicating end of stream).
bool decode_buffer(int &pos, int limit, short *output,
- int &output_samples, int &sample_rate, int &channels);
-
+ int &output_samples, int &sample_rate, int &channels);
+
// Change the base pointer
void set_base(const void *base);
diff --git a/src/emu/sound/msm5205.c b/src/emu/sound/msm5205.c
index 0271d9b4e16..85aa61ff04e 100644
--- a/src/emu/sound/msm5205.c
+++ b/src/emu/sound/msm5205.c
@@ -114,9 +114,9 @@ static void ComputeTables (msm5205_state *voice)
{
voice->diff_lookup[step*16 + nib] = nbl2bit[nib][0] *
(stepval * nbl2bit[nib][1] +
- stepval/2 * nbl2bit[nib][2] +
- stepval/4 * nbl2bit[nib][3] +
- stepval/8);
+ stepval/2 * nbl2bit[nib][2] +
+ stepval/4 * nbl2bit[nib][3] +
+ stepval/8);
}
}
}
@@ -344,13 +344,13 @@ const device_type MSM5205 = &device_creator<msm5205_device>;
msm5205_device::msm5205_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MSM5205, "MSM5205", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(msm5205_state);
}
msm5205_device::msm5205_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(msm5205_state);
}
@@ -410,5 +410,3 @@ void msm6585_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/msm5205.h b/src/emu/sound/msm5205.h
index 86df242eea5..94c90d8faa0 100644
--- a/src/emu/sound/msm5205.h
+++ b/src/emu/sound/msm5205.h
@@ -46,7 +46,7 @@ void msm5205_set_volume(device_t *device,int volume);
void msm5205_change_clock_w(device_t *device, INT32 clock);
class msm5205_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
msm5205_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/msm5232.c b/src/emu/sound/msm5232.c
index 4bc06d28404..d6e67b21f46 100644
--- a/src/emu/sound/msm5232.c
+++ b/src/emu/sound/msm5232.c
@@ -12,27 +12,27 @@
struct VOICE {
UINT8 mode;
- int TG_count_period;
- int TG_count;
+ int TG_count_period;
+ int TG_count;
- UINT8 TG_cnt; /* 7 bits binary counter (frequency output) */
- UINT8 TG_out16; /* bit number (of TG_cnt) for 16' output */
- UINT8 TG_out8; /* bit number (of TG_cnt) for 8' output */
- UINT8 TG_out4; /* bit number (of TG_cnt) for 4' output */
- UINT8 TG_out2; /* bit number (of TG_cnt) for 2' output */
+ UINT8 TG_cnt; /* 7 bits binary counter (frequency output) */
+ UINT8 TG_out16; /* bit number (of TG_cnt) for 16' output */
+ UINT8 TG_out8; /* bit number (of TG_cnt) for 8' output */
+ UINT8 TG_out4; /* bit number (of TG_cnt) for 4' output */
+ UINT8 TG_out2; /* bit number (of TG_cnt) for 2' output */
- int egvol;
- int eg_sect;
- int counter;
- int eg;
+ int egvol;
+ int eg_sect;
+ int counter;
+ int eg;
- UINT8 eg_arm; /* attack/release mode */
+ UINT8 eg_arm; /* attack/release mode */
- double ar_rate;
- double dr_rate;
- double rr_rate;
+ double ar_rate;
+ double dr_rate;
+ double rr_rate;
- int pitch; /* current pitch data */
+ int pitch; /* current pitch data */
int GF;
};
@@ -41,33 +41,33 @@ struct VOICE {
struct msm5232_state {
sound_stream *stream;
- VOICE voi[8];
+ VOICE voi[8];
- UINT32 EN_out16[2]; /* enable 16' output masks for both groups (0-disabled ; ~0 -enabled) */
- UINT32 EN_out8[2]; /* enable 8' output masks */
- UINT32 EN_out4[2]; /* enable 4' output masks */
- UINT32 EN_out2[2]; /* enable 2' output masks */
+ UINT32 EN_out16[2]; /* enable 16' output masks for both groups (0-disabled ; ~0 -enabled) */
+ UINT32 EN_out8[2]; /* enable 8' output masks */
+ UINT32 EN_out4[2]; /* enable 4' output masks */
+ UINT32 EN_out2[2]; /* enable 2' output masks */
int noise_cnt;
int noise_step;
int noise_rng;
- int noise_clocks; /* number of the noise_rng (output) level changes */
+ int noise_clocks; /* number of the noise_rng (output) level changes */
unsigned int UpdateStep;
/* rate tables */
- double ar_tbl[8];
- double dr_tbl[16];
+ double ar_tbl[8];
+ double dr_tbl[16];
- UINT8 control1;
- UINT8 control2;
+ UINT8 control1;
+ UINT8 control2;
- int gate; /* current state of the GATE output */
+ int gate; /* current state of the GATE output */
- int clock; /* chip clock in Hz */
- int rate; /* sample rate in Hz */
+ int clock; /* chip clock in Hz */
+ int rate; /* sample rate in Hz */
- double external_capacity[8]; /* in Farads, eg 0.39e-6 = 0.36 uF (microFarads) */
+ double external_capacity[8]; /* in Farads, eg 0.39e-6 = 0.36 uF (microFarads) */
device_t *device;
devcb_resolved_write_line gate_handler;/* callback called when the GATE output pin changes state */
@@ -88,13 +88,13 @@ INLINE msm5232_state *get_safe_token(device_t *device)
/* ROM table to convert from pitch data into data for programmable counter and binary counter */
/* Chip has 88x12bits ROM (addressing (in hex) from 0x00 to 0x57) */
-#define ROM(counter,bindiv) (counter|(bindiv<<9))
+#define ROM(counter,bindiv) (counter|(bindiv<<9))
static const UINT16 MSM5232_ROM[88]={
/* higher values are Programmable Counter data (9 bits) */
/* lesser values are Binary Counter shift data (3 bits) */
-/* 0 */ ROM (506, 7),
+/* 0 */ ROM (506, 7),
/* 1 */ ROM (478, 7),/* 2 */ ROM (451, 7),/* 3 */ ROM (426, 7),/* 4 */ ROM (402, 7),
/* 5 */ ROM (379, 7),/* 6 */ ROM (358, 7),/* 7 */ ROM (338, 7),/* 8 */ ROM (319, 7),
@@ -131,7 +131,7 @@ static const UINT16 MSM5232_ROM[88]={
#undef ROM
-#define STEP_SH (16) /* step calculations accuracy */
+#define STEP_SH (16) /* step calculations accuracy */
/* save output as raw 16-bit sample */
@@ -154,8 +154,8 @@ static FILE *sample[9];
*/
-#define R51 1400 /* charge resistance */
-#define R52 28750 /* discharge resistance */
+#define R51 1400 /* charge resistance */
+#define R52 28750 /* discharge resistance */
#if 0
/*
@@ -183,7 +183,7 @@ static void msm5232_init_tables( msm5232_state *chip )
i = ((double)(1<<STEP_SH) * (double)chip->rate) / (double)chip->clock;
chip->UpdateStep = i;
/* logerror("clock=%i Hz rate=%i Hz, UpdateStep=%i\n",
- chip->clock, chip->rate, chip->UpdateStep); */
+ chip->clock, chip->rate, chip->UpdateStep); */
scale = ((double)chip->clock) / (double)chip->rate;
chip->noise_step = ((1<<STEP_SH)/128.0) * scale; /* step of the rng reg in 16.16 format */
@@ -198,7 +198,7 @@ static void msm5232_init_tables( msm5232_state *chip )
for (i=0; i<8; i++)
{
double clockscale = (double)chip->clock / 2119040.0;
- double time = (ATBL[i] / 1000.0) / clockscale; /* attack time in seconds */
+ double time = (ATBL[i] / 1000.0) / clockscale; /* attack time in seconds */
chip->ar_tbl[i] = 0.50 * ( (1.0/time) / (double)chip->rate );
/* logerror("ATBL[%i] = %20.16f time = %f s\n",i, chip->ar_tbl[i], time); */
}
@@ -206,7 +206,7 @@ static void msm5232_init_tables( msm5232_state *chip )
for (i=0; i<16; i++)
{
double clockscale = (double)chip->clock / 2119040.0;
- double time = (DTBL[i] / 1000.0) / clockscale; /* decay time in seconds */
+ double time = (DTBL[i] / 1000.0) / clockscale; /* decay time in seconds */
chip->dr_tbl[i] = 0.50 * ( (1.0/time) / (double)chip->rate );
/* logerror("DTBL[%i] = %20.16f time = %f s\n",i, chip->dr_tbl[i], time); */
}
@@ -248,11 +248,11 @@ static void msm5232_init_voice(msm5232_state *chip, int i)
{
chip->voi[i].ar_rate= chip->ar_tbl[0] * chip->external_capacity[i];
chip->voi[i].dr_rate= chip->dr_tbl[0] * chip->external_capacity[i];
- chip->voi[i].rr_rate= chip->dr_tbl[0] * chip->external_capacity[i]; /* this is constant value */
+ chip->voi[i].rr_rate= chip->dr_tbl[0] * chip->external_capacity[i]; /* this is constant value */
chip->voi[i].eg_sect= -1;
- chip->voi[i].eg = 0.0;
- chip->voi[i].eg_arm = 0;
- chip->voi[i].pitch = -1.0;
+ chip->voi[i].eg = 0.0;
+ chip->voi[i].eg_arm = 0;
+ chip->voi[i].pitch = -1.0;
}
@@ -278,21 +278,21 @@ static DEVICE_RESET( msm5232 )
msm5232_w(device,device->machine().driver_data()->generic_space(),i,0x80);
msm5232_w(device,device->machine().driver_data()->generic_space(),i,0x00);
}
- chip->noise_cnt = 0;
- chip->noise_rng = 1;
- chip->noise_clocks = 0;
-
- chip->control1 = 0;
- chip->EN_out16[0] = 0;
- chip->EN_out8[0] = 0;
- chip->EN_out4[0] = 0;
- chip->EN_out2[0] = 0;
-
- chip->control2 = 0;
- chip->EN_out16[1] = 0;
- chip->EN_out8[1] = 0;
- chip->EN_out4[1] = 0;
- chip->EN_out2[1] = 0;
+ chip->noise_cnt = 0;
+ chip->noise_rng = 1;
+ chip->noise_clocks = 0;
+
+ chip->control1 = 0;
+ chip->EN_out16[0] = 0;
+ chip->EN_out8[0] = 0;
+ chip->EN_out4[0] = 0;
+ chip->EN_out2[0] = 0;
+
+ chip->control2 = 0;
+ chip->EN_out16[1] = 0;
+ chip->EN_out8[1] = 0;
+ chip->EN_out4[1] = 0;
+ chip->EN_out2[1] = 0;
msm5232_gate_update(chip);
}
@@ -302,7 +302,7 @@ static void msm5232_init(msm5232_state *chip, const msm5232_interface *intf, int
int j;
chip->clock = clock;
- chip->rate = rate ? rate : 44100; /* avoid division by 0 */
+ chip->rate = rate ? rate : 44100; /* avoid division by 0 */
for (j=0; j<8; j++)
{
@@ -359,8 +359,8 @@ WRITE8_DEVICE_HANDLER( msm5232_w )
if(data >= 0xd8)
{
/*if ((data&0x7f) != 0x5f) logerror("MSM5232: WRONG PITCH CODE = %2x\n",data&0x7f);*/
- chip->voi[ch].mode = 1; /* noise mode */
- chip->voi[ch].eg_sect = 0; /* Key On */
+ chip->voi[ch].mode = 1; /* noise mode */
+ chip->voi[ch].eg_sect = 0; /* Key On */
}
else
{
@@ -375,7 +375,7 @@ WRITE8_DEVICE_HANDLER( msm5232_w )
chip->voi[ch].TG_count_period = (pg & 0x1ff) * chip->UpdateStep / 2;
- n = (pg>>9) & 7; /* n = bit number for 16' output */
+ n = (pg>>9) & 7; /* n = bit number for 16' output */
chip->voi[ch].TG_out16 = 1<<n;
/* for 8' it is bit n-1 (bit 0 if n-1<0) */
/* for 4' it is bit n-2 (bit 0 if n-2<0) */
@@ -389,16 +389,16 @@ WRITE8_DEVICE_HANDLER( msm5232_w )
n = (n>0)? n-1: 0;
chip->voi[ch].TG_out2 = 1<<n;
}
- chip->voi[ch].mode = 0; /* tone mode */
- chip->voi[ch].eg_sect = 0; /* Key On */
+ chip->voi[ch].mode = 0; /* tone mode */
+ chip->voi[ch].eg_sect = 0; /* Key On */
}
}
else
{
- if ( !chip->voi[ch].eg_arm ) /* arm = 0 */
- chip->voi[ch].eg_sect = 2; /* Key Off -> go to release */
- else /* arm = 1 */
- chip->voi[ch].eg_sect = 1; /* Key Off -> go to decay */
+ if ( !chip->voi[ch].eg_arm ) /* arm = 0 */
+ chip->voi[ch].eg_sect = 2; /* Key Off -> go to release */
+ else /* arm = 1 */
+ chip->voi[ch].eg_sect = 1; /* Key Off -> go to decay */
}
}
else
@@ -406,33 +406,33 @@ WRITE8_DEVICE_HANDLER( msm5232_w )
int i;
switch(offset)
{
- case 0x08: /* group1 attack */
+ case 0x08: /* group1 attack */
for (i=0; i<4; i++)
chip->voi[i].ar_rate = chip->ar_tbl[data&0x7] * chip->external_capacity[i];
break;
- case 0x09: /* group2 attack */
+ case 0x09: /* group2 attack */
for (i=0; i<4; i++)
chip->voi[i+4].ar_rate = chip->ar_tbl[data&0x7] * chip->external_capacity[i+4];
break;
- case 0x0a: /* group1 decay */
+ case 0x0a: /* group1 decay */
for (i=0; i<4; i++)
chip->voi[i].dr_rate = chip->dr_tbl[data&0xf] * chip->external_capacity[i];
break;
- case 0x0b: /* group2 decay */
+ case 0x0b: /* group2 decay */
for (i=0; i<4; i++)
chip->voi[i+4].dr_rate = chip->dr_tbl[data&0xf] * chip->external_capacity[i+4];
break;
- case 0x0c: /* group1 control */
+ case 0x0c: /* group1 control */
/*if (chip->control1 != data)
- logerror("msm5232: control1 ctrl=%x OE=%x\n", data&0xf0, data&0x0f);*/
+ logerror("msm5232: control1 ctrl=%x OE=%x\n", data&0xf0, data&0x0f);*/
/*if (data & 0x10)
- popmessage("msm5232: control1 ctrl=%2x\n", data);*/
+ popmessage("msm5232: control1 ctrl=%2x\n", data);*/
chip->control1 = data;
@@ -446,13 +446,13 @@ WRITE8_DEVICE_HANDLER( msm5232_w )
break;
- case 0x0d: /* group2 control */
+ case 0x0d: /* group2 control */
/*if (chip->control2 != data)
- logerror("msm5232: control2 ctrl=%x OE=%x\n", data&0xf0, data&0x0f);*/
+ logerror("msm5232: control2 ctrl=%x OE=%x\n", data&0xf0, data&0x0f);*/
/*if (data & 0x10)
- popmessage("msm5232: control2 ctrl=%2x\n", data);*/
+ popmessage("msm5232: control2 ctrl=%2x\n", data);*/
chip->control2 = data;
msm5232_gate_update(chip);
@@ -472,8 +472,8 @@ WRITE8_DEVICE_HANDLER( msm5232_w )
-#define VMIN 0
-#define VMAX 32768
+#define VMIN 0
+#define VMAX 32768
INLINE void EG_voices_advance(msm5232_state *chip)
@@ -487,7 +487,7 @@ INLINE void EG_voices_advance(msm5232_state *chip)
{
switch(voi->eg_sect)
{
- case 0: /* attack */
+ case 0: /* attack */
/* capacitor charge */
if (voi->eg < VMAX)
@@ -592,17 +592,17 @@ INLINE void TG_group_advance(msm5232_state *chip, int groupidx)
out2 = out4 = out8 = out16 = 0;
- if (voi->mode==0) /* generate square tone */
+ if (voi->mode==0) /* generate square tone */
{
int left = 1<<STEP_SH;
do
{
int nextevent = left;
- if (voi->TG_cnt&voi->TG_out16) out16+=voi->TG_count;
- if (voi->TG_cnt&voi->TG_out8) out8 +=voi->TG_count;
- if (voi->TG_cnt&voi->TG_out4) out4 +=voi->TG_count;
- if (voi->TG_cnt&voi->TG_out2) out2 +=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out16) out16+=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out8) out8 +=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out4) out4 +=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out2) out2 +=voi->TG_count;
voi->TG_count -= nextevent;
@@ -610,36 +610,36 @@ INLINE void TG_group_advance(msm5232_state *chip, int groupidx)
{
voi->TG_count += voi->TG_count_period;
voi->TG_cnt++;
- if (voi->TG_cnt&voi->TG_out16) out16+=voi->TG_count_period;
- if (voi->TG_cnt&voi->TG_out8 ) out8 +=voi->TG_count_period;
- if (voi->TG_cnt&voi->TG_out4 ) out4 +=voi->TG_count_period;
- if (voi->TG_cnt&voi->TG_out2 ) out2 +=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out16) out16+=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out8 ) out8 +=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out4 ) out4 +=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out2 ) out2 +=voi->TG_count_period;
if (voi->TG_count > 0)
break;
voi->TG_count += voi->TG_count_period;
voi->TG_cnt++;
- if (voi->TG_cnt&voi->TG_out16) out16+=voi->TG_count_period;
- if (voi->TG_cnt&voi->TG_out8 ) out8 +=voi->TG_count_period;
- if (voi->TG_cnt&voi->TG_out4 ) out4 +=voi->TG_count_period;
- if (voi->TG_cnt&voi->TG_out2 ) out2 +=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out16) out16+=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out8 ) out8 +=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out4 ) out4 +=voi->TG_count_period;
+ if (voi->TG_cnt&voi->TG_out2 ) out2 +=voi->TG_count_period;
}
- if (voi->TG_cnt&voi->TG_out16) out16-=voi->TG_count;
- if (voi->TG_cnt&voi->TG_out8 ) out8 -=voi->TG_count;
- if (voi->TG_cnt&voi->TG_out4 ) out4 -=voi->TG_count;
- if (voi->TG_cnt&voi->TG_out2 ) out2 -=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out16) out16-=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out8 ) out8 -=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out4 ) out4 -=voi->TG_count;
+ if (voi->TG_cnt&voi->TG_out2 ) out2 -=voi->TG_count;
left -=nextevent;
}while (left>0);
}
- else /* generate noise */
+ else /* generate noise */
{
- if (chip->noise_clocks&8) out16+=(1<<STEP_SH);
- if (chip->noise_clocks&4) out8 +=(1<<STEP_SH);
- if (chip->noise_clocks&2) out4 +=(1<<STEP_SH);
- if (chip->noise_clocks&1) out2 +=(1<<STEP_SH);
+ if (chip->noise_clocks&8) out16+=(1<<STEP_SH);
+ if (chip->noise_clocks&4) out8 +=(1<<STEP_SH);
+ if (chip->noise_clocks&2) out4 +=(1<<STEP_SH);
+ if (chip->noise_clocks&1) out2 +=(1<<STEP_SH);
}
/* calculate signed output */
@@ -668,39 +668,39 @@ INLINE void TG_group_advance(msm5232_state *chip, int groupidx)
/* macro saves feet data to mono file */
#ifdef SAVE_SEPARATE_CHANNELS
- #define SAVE_SINGLE_CHANNEL(j,val) \
- { signed int pom= val; \
+ #define SAVE_SINGLE_CHANNEL(j,val) \
+ { signed int pom= val; \
if (pom > 32767) pom = 32767; else if (pom < -32768) pom = -32768; \
fputc((unsigned short)pom&0xff,sample[j]); \
fputc(((unsigned short)pom>>8)&0xff,sample[j]); }
#else
- #define SAVE_SINGLE_CHANNEL(j,val)
+ #define SAVE_SINGLE_CHANNEL(j,val)
#endif
/* first macro saves all 8 feet outputs to mixed (mono) file */
/* second macro saves one group into left and the other in right channel */
-#if 1 /*MONO*/
+#if 1 /*MONO*/
#ifdef SAVE_SAMPLE
- #define SAVE_ALL_CHANNELS \
- { signed int pom = buf1[i] + buf2[i]; \
+ #define SAVE_ALL_CHANNELS \
+ { signed int pom = buf1[i] + buf2[i]; \
fputc((unsigned short)pom&0xff,sample[8]); \
fputc(((unsigned short)pom>>8)&0xff,sample[8]); \
- }
+ }
#else
- #define SAVE_ALL_CHANNELS
+ #define SAVE_ALL_CHANNELS
#endif
-#else /*STEREO*/
+#else /*STEREO*/
#ifdef SAVE_SAMPLE
- #define SAVE_ALL_CHANNELS \
- { signed int pom = buf1[i]; \
+ #define SAVE_ALL_CHANNELS \
+ { signed int pom = buf1[i]; \
fputc((unsigned short)pom&0xff,sample[8]); \
fputc(((unsigned short)pom>>8)&0xff,sample[8]); \
pom = buf2[i]; \
fputc((unsigned short)pom&0xff,sample[8]); \
fputc(((unsigned short)pom>>8)&0xff,sample[8]); \
- }
+ }
#else
- #define SAVE_ALL_CHANNELS
+ #define SAVE_ALL_CHANNELS
#endif
#endif
@@ -726,7 +726,7 @@ static STREAM_UPDATE( MSM5232_update_one )
/* calculate all voices' envelopes */
EG_voices_advance(chip);
- TG_group_advance(chip,0); /* calculate tones group 1 */
+ TG_group_advance(chip,0); /* calculate tones group 1 */
buf1[i] = o2;
buf2[i] = o4;
buf3[i] = o8;
@@ -737,7 +737,7 @@ static STREAM_UPDATE( MSM5232_update_one )
SAVE_SINGLE_CHANNEL(2,o8)
SAVE_SINGLE_CHANNEL(3,o16)
- TG_group_advance(chip,1); /* calculate tones group 2 */
+ TG_group_advance(chip,1); /* calculate tones group 2 */
buf5[i] = o2;
buf6[i] = o4;
buf7[i] = o8;
@@ -759,13 +759,13 @@ static STREAM_UPDATE( MSM5232_update_one )
chip->noise_cnt &= ((1<<STEP_SH)-1);
while (cnt > 0)
{
- int tmp = chip->noise_rng & (1<<16); /* store current level */
+ int tmp = chip->noise_rng & (1<<16); /* store current level */
if (chip->noise_rng&1)
chip->noise_rng ^= 0x24000;
chip->noise_rng>>=1;
- if ( (chip->noise_rng & (1<<16)) != tmp ) /* level change detect */
+ if ( (chip->noise_rng & (1<<16)) != tmp ) /* level change detect */
chip->noise_clocks++;
cnt--;
@@ -854,7 +854,7 @@ const device_type MSM5232 = &device_creator<msm5232_device>;
msm5232_device::msm5232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MSM5232, "MSM5232", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(msm5232_state);
}
@@ -905,5 +905,3 @@ void msm5232_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/msm5232.h b/src/emu/sound/msm5232.h
index 11f8b218639..ff9dbb2bf9d 100644
--- a/src/emu/sound/msm5232.h
+++ b/src/emu/sound/msm5232.h
@@ -7,7 +7,7 @@
struct msm5232_interface
{
- double capacity[8]; /* in Farads, capacitors connected to pins: 24,25,26,27 and 37,38,39,40 */
+ double capacity[8]; /* in Farads, capacitors connected to pins: 24,25,26,27 and 37,38,39,40 */
devcb_write_line gate_handler_cb; /* callback called when the GATE output pin changes state */
};
@@ -16,7 +16,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( msm5232_w );
void msm5232_set_clock(device_t *device, int clock);
class msm5232_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
msm5232_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/multipcm.c b/src/emu/sound/multipcm.c
index a8d1dd01c76..1980bd7832b 100644
--- a/src/emu/sound/multipcm.c
+++ b/src/emu/sound/multipcm.c
@@ -35,7 +35,7 @@
#include "multipcm.h"
//????
-#define MULTIPCM_CLOCKDIV (180.0)
+#define MULTIPCM_CLOCKDIV (180.0)
struct Sample_t
{
@@ -52,15 +52,15 @@ enum STATE {ATTACK,DECAY1,DECAY2,RELEASE};
ALLOW_SAVE_TYPE(STATE); // allow save_item on a non-fundamental type
struct EG_t
{
- int volume; //
+ int volume; //
STATE state;
int step;
//step vals
- int AR; //Attack
- int D1R; //Decay1
- int D2R; //Decay2
- int RR; //Release
- int DL; //Decay level
+ int AR; //Attack
+ int D1R; //Decay1
+ int D2R; //Decay2
+ int RR; //Release
+ int DL; //Decay level
};
struct LFO_t
@@ -86,14 +86,14 @@ struct SLOT
int TLStep;
signed int Prev;
EG_t EG;
- LFO_t PLFO; //Phase lfo
- LFO_t ALFO; //AM lfo
+ LFO_t PLFO; //Phase lfo
+ LFO_t ALFO; //AM lfo
};
struct MultiPCM
{
sound_stream * stream;
- Sample_t Samples[0x200]; //Max 512 samples
+ Sample_t Samples[0x200]; //Max 512 samples
SLOT Slots[28];
unsigned int CurSlot;
unsigned int Address;
@@ -101,14 +101,14 @@ struct MultiPCM
float Rate;
INT8 *ROM;
//I include these in the chip because they depend on the chip clock
- unsigned int ARStep[0x40],DRStep[0x40]; //Envelope step table
- unsigned int FNS_Table[0x400]; //Frequency step table
+ unsigned int ARStep[0x40],DRStep[0x40]; //Envelope step table
+ unsigned int FNS_Table[0x400]; //Frequency step table
};
static signed int LPANTABLE[0x800],RPANTABLE[0x800];
-#define FIX(v) ((UINT32) ((float) (1<<SHIFT)*(v)))
+#define FIX(v) ((UINT32) ((float) (1<<SHIFT)*(v)))
static const int val2chan[] =
{
@@ -119,10 +119,10 @@ static const int val2chan[] =
};
-#define SHIFT 12
+#define SHIFT 12
-#define MULTIPCM_RATE 44100.0
+#define MULTIPCM_RATE 44100.0
INLINE MultiPCM *get_safe_token(device_t *device)
@@ -143,11 +143,11 @@ static const double BaseTimes[64]={0,0,0,0,6222.95,4978.37,4148.66,3556.01,3111.
777.87,622.31,518.59,444.54,388.93,311.16,259.32,222.27,194.47,155.60,129.66,111.16,97.23,77.82,64.85,55.60,
48.62,38.91,32.43,27.80,24.31,19.46,16.24,13.92,12.15,9.75,8.12,6.98,6.08,4.90,4.08,3.49,
3.04,2.49,2.13,1.90,1.72,1.41,1.18,1.04,0.91,0.73,0.59,0.50,0.45,0.45,0.45,0.45};
-#define AR2DR 14.32833
+#define AR2DR 14.32833
static signed int lin2expvol[0x400];
static int TLSteps[2];
-#define EG_SHIFT 16
+#define EG_SHIFT 16
static int EG_Update(SLOT *slot)
{
@@ -223,13 +223,13 @@ static void EG_Calc(MultiPCM *ptChip,SLOT *slot)
LFO SECTION
*****************************/
-#define LFO_SHIFT 8
+#define LFO_SHIFT 8
-#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
+#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
//Convert DB to multiply amplitude
-#define DB(v) LFIX(pow(10.0,v/20.0))
+#define DB(v) LFIX(pow(10.0,v/20.0))
//Convert cents to step increment
#define CENTS(v) LFIX(pow(2.0,v/1200.0))
@@ -237,9 +237,9 @@ static void EG_Calc(MultiPCM *ptChip,SLOT *slot)
static int PLFO_TRI[256];
static int ALFO_TRI[256];
-static const float LFOFreq[8]={0.168f,2.019f,3.196f,4.206f,5.215f,5.888f,6.224f,7.066f}; //Hz;
-static const float PSCALE[8]={0.0f,3.378f,5.065f,6.750f,10.114f,20.170f,40.180f,79.307f}; //cents
-static const float ASCALE[8]={0.0f,0.4f,0.8f,1.5f,3.0f,6.0f,12.0f,24.0f}; //DB
+static const float LFOFreq[8]={0.168f,2.019f,3.196f,4.206f,5.215f,5.888f,6.224f,7.066f}; //Hz;
+static const float PSCALE[8]={0.0f,3.378f,5.065f,6.750f,10.114f,20.170f,40.180f,79.307f}; //cents
+static const float ASCALE[8]={0.0f,0.4f,0.8f,1.5f,3.0f,6.0f,12.0f,24.0f}; //DB
static int PSCALES[8][256];
static int ASCALES[8][256];
@@ -248,8 +248,8 @@ static void LFO_Init(void)
int i,s;
for(i=0;i<256;++i)
{
- int a; //amplitude
- int p; //phase
+ int a; //amplitude
+ int p; //phase
//Tri
if(i<128)
@@ -325,10 +325,10 @@ static void WriteSlot(MultiPCM *ptChip,SLOT *slot,int reg,unsigned char data)
switch(reg)
{
- case 0: //PANPOT
+ case 0: //PANPOT
slot->Pan=(data>>4)&0xf;
break;
- case 1: //Sample
+ case 1: //Sample
//according to YMF278 sample write causes some base params written to the regs (envelope+lfos)
//the game should never change the sample while playing.
{
@@ -337,7 +337,7 @@ static void WriteSlot(MultiPCM *ptChip,SLOT *slot,int reg,unsigned char data)
WriteSlot(ptChip,slot,7,Sample->AM);
}
break;
- case 2: //Pitch
+ case 2: //Pitch
case 3:
{
unsigned int oct=((slot->Regs[3]>>4)-1)&0xf;
@@ -350,9 +350,9 @@ static void WriteSlot(MultiPCM *ptChip,SLOT *slot,int reg,unsigned char data)
slot->step=pitch/ptChip->Rate;
}
break;
- case 4: //KeyOn/Off (and more?)
+ case 4: //KeyOn/Off (and more?)
{
- if(data&0x80) //KeyOn
+ if(data&0x80) //KeyOn
{
slot->Sample=ptChip->Samples+slot->Regs[1];
slot->Playing=1;
@@ -386,21 +386,21 @@ static void WriteSlot(MultiPCM *ptChip,SLOT *slot,int reg,unsigned char data)
}
}
break;
- case 5: //TL+Interpolation
+ case 5: //TL+Interpolation
{
slot->DstTL=(data>>1)&0x7f;
- if(!(data&1)) //Interpolate TL
+ if(!(data&1)) //Interpolate TL
{
if((slot->TL>>SHIFT)>slot->DstTL)
- slot->TLStep=TLSteps[0]; //decrease
+ slot->TLStep=TLSteps[0]; //decrease
else
- slot->TLStep=TLSteps[1]; //increase
+ slot->TLStep=TLSteps[1]; //increase
}
else
slot->TL=slot->DstTL<<SHIFT;
}
break;
- case 6: //LFO freq+PLFO
+ case 6: //LFO freq+PLFO
{
if(data)
{
@@ -409,7 +409,7 @@ static void WriteSlot(MultiPCM *ptChip,SLOT *slot,int reg,unsigned char data)
}
}
break;
- case 7: //ALFO
+ case 7: //ALFO
{
if(data)
{
@@ -451,7 +451,7 @@ static STREAM_UPDATE( MultiPCM_update )
signed int fpart=slot->offset&((1<<SHIFT)-1);
sample=(csample*fpart+slot->Prev*((1<<SHIFT)-fpart))>>SHIFT;
- if(slot->Regs[6]&7) //Vibrato enabled
+ if(slot->Regs[6]&7) //Vibrato enabled
{
step=step*PLFO_Step(&(slot->PLFO));
step>>=SHIFT;
@@ -470,7 +470,7 @@ static STREAM_UPDATE( MultiPCM_update )
if((slot->TL>>SHIFT)!=slot->DstTL)
slot->TL+=slot->TLStep;
- if(slot->Regs[7]&7) //Tremolo enabled
+ if(slot->Regs[7]&7) //Tremolo enabled
{
sample=sample*ALFO_Step(&(slot->ALFO));
sample>>=SHIFT;
@@ -649,7 +649,7 @@ WRITE8_DEVICE_HANDLER( multipcm_w )
MultiPCM *ptChip = get_safe_token(device);
switch(offset)
{
- case 0: //Data write
+ case 0: //Data write
WriteSlot(ptChip,ptChip->Slots+ptChip->CurSlot,ptChip->Address,data);
break;
case 1:
@@ -676,7 +676,7 @@ const device_type MULTIPCM = &device_creator<multipcm_device>;
multipcm_device::multipcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MULTIPCM, "Sega/Yamaha 315-5560", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(MultiPCM);
}
@@ -709,5 +709,3 @@ void multipcm_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/multipcm.h b/src/emu/sound/multipcm.h
index a91f23d9273..a3e0d3c232e 100644
--- a/src/emu/sound/multipcm.h
+++ b/src/emu/sound/multipcm.h
@@ -11,7 +11,7 @@ DECLARE_READ8_DEVICE_HANDLER( multipcm_r );
void multipcm_set_bank(device_t *device, UINT32 leftoffs, UINT32 rightoffs);
class multipcm_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
multipcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/n63701x.c b/src/emu/sound/n63701x.c
index da44b0b0bd2..276c5907282 100644
--- a/src/emu/sound/n63701x.c
+++ b/src/emu/sound/n63701x.c
@@ -31,8 +31,8 @@ struct voice
struct namco_63701x
{
voice voices[2];
- sound_stream * stream; /* channel assigned by the mixer */
- UINT8 *rom; /* pointer to sample ROM */
+ sound_stream * stream; /* channel assigned by the mixer */
+ UINT8 *rom; /* pointer to sample ROM */
};
@@ -81,12 +81,12 @@ static STREAM_UPDATE( namco_63701x_update )
{
int data = base[(pos++) & 0xffff];
- if (data == 0xff) /* end of sample */
+ if (data == 0xff) /* end of sample */
{
v->playing = 0;
break;
}
- else if (data == 0x00) /* silence compression */
+ else if (data == 0x00) /* silence compression */
{
data = base[(pos++) & 0xffff];
v->silence_counter = data;
@@ -128,11 +128,11 @@ WRITE8_DEVICE_HANDLER( namco_63701x_w )
else
{
/*
- should we stop the playing sample if voice_select[ch] == 0 ?
- originally we were, but this makes us lose a sample in genpeitd,
- after the continue counter reaches 0. Either we shouldn't stop
- the sample, or genpeitd is returning to the title screen too soon.
- */
+ should we stop the playing sample if voice_select[ch] == 0 ?
+ originally we were, but this makes us lose a sample in genpeitd,
+ after the continue counter reaches 0. Either we shouldn't stop
+ the sample, or genpeitd is returning to the title screen too soon.
+ */
if (chip->voices[ch].select & 0x1f)
{
int rom_offs;
@@ -157,7 +157,7 @@ const device_type NAMCO_63701X = &device_creator<namco_63701x_device>;
namco_63701x_device::namco_63701x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NAMCO_63701X, "Namco 63701X", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(namco_63701x);
}
@@ -190,5 +190,3 @@ void namco_63701x_device::sound_stream_update(sound_stream &stream, stream_sampl
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/n63701x.h b/src/emu/sound/n63701x.h
index 8cc487f36b5..87bda1672f4 100644
--- a/src/emu/sound/n63701x.h
+++ b/src/emu/sound/n63701x.h
@@ -8,7 +8,7 @@
DECLARE_WRITE8_DEVICE_HANDLER( namco_63701x_w );
class namco_63701x_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
namco_63701x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/namco.c b/src/emu/sound/namco.c
index 5656b0649e7..001fc34d95a 100644
--- a/src/emu/sound/namco.c
+++ b/src/emu/sound/namco.c
@@ -21,18 +21,18 @@
#define MAX_VOLUME 16
/* quality parameter: internal sample rate is 192 KHz, output is 48 KHz */
-#define INTERNAL_RATE 192000
+#define INTERNAL_RATE 192000
/* 16 bits: sample bits of the stream buffer */
/* 4 bits: volume */
/* 4 bits: prom sample bits */
-#define MIXLEVEL (1 << (16 - 4 - 4))
+#define MIXLEVEL (1 << (16 - 4 - 4))
/* stream output level */
-#define OUTPUT_LEVEL(n) ((n) * MIXLEVEL / chip->num_voices)
+#define OUTPUT_LEVEL(n) ((n) * MIXLEVEL / chip->num_voices)
/* a position of waveform sample */
-#define WAVEFORM_POSITION(n) (((n) >> chip->f_fracbits) & 0x1f)
+#define WAVEFORM_POSITION(n) (((n) >> chip->f_fracbits) & 0x1f)
/* this structure defines the parameters for a channel */
@@ -77,8 +77,8 @@ INLINE namco_sound *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == NAMCO ||
- device->type() == NAMCO_15XX ||
- device->type() == NAMCO_CUS30);
+ device->type() == NAMCO_15XX ||
+ device->type() == NAMCO_CUS30);
return (namco_sound *)downcast<namco_device *>(device)->token();
}
@@ -124,12 +124,12 @@ static void build_decoded_waveform(running_machine &machine, namco_sound *chip,
if (rgnbase == NULL && chip->num_voices != 3)
{
chip->wave_size = 1;
- size = 32 * 16; /* 32 samples, 16 waveforms */
+ size = 32 * 16; /* 32 samples, 16 waveforms */
}
else
{
chip->wave_size = 0;
- size = 32 * 8; /* 32 samples, 8 waveforms */
+ size = 32 * 8; /* 32 samples, 8 waveforms */
}
p = auto_alloc_array(machine, INT16, size * MAX_VOLUME);
@@ -212,7 +212,7 @@ static STREAM_UPDATE( namco_update_mono )
continue;
}
- hold = hold_time;
+ hold = hold_time;
c += delta;
cnt = (c >> 12);
@@ -304,7 +304,7 @@ static STREAM_UPDATE( namco_update_stereo )
continue;
}
- hold = hold_time;
+ hold = hold_time;
c += delta;
cnt = (c >> 12);
@@ -502,7 +502,7 @@ WRITE8_DEVICE_HANDLER( pacman_sound_w )
voice->frequency += (chip->soundregs[ch * 5 + 0x11] << 4);
voice->frequency += (chip->soundregs[ch * 5 + 0x12] << 8);
voice->frequency += (chip->soundregs[ch * 5 + 0x13] << 12);
- voice->frequency += (chip->soundregs[ch * 5 + 0x14] << 16); /* always 0 */
+ voice->frequency += (chip->soundregs[ch * 5 + 0x14] << 16); /* always 0 */
break;
case 0x15:
@@ -673,7 +673,7 @@ static WRITE8_DEVICE_HANDLER( namco_15xx_w )
/* the frequency has 20 bits */
voice->frequency = chip->soundregs[ch * 8 + 0x04];
voice->frequency += chip->soundregs[ch * 8 + 0x05] << 8;
- voice->frequency += (chip->soundregs[ch * 8 + 0x06] & 15) << 16; /* high bits are from here */
+ voice->frequency += (chip->soundregs[ch * 8 + 0x06] & 15) << 16; /* high bits are from here */
break;
}
}
@@ -749,7 +749,7 @@ static WRITE8_DEVICE_HANDLER( namcos1_sound_w )
case 0x02:
case 0x03:
/* the frequency has 20 bits */
- voice->frequency = (chip->soundregs[ch * 8 + 0x01] & 15) << 16; /* high bits are from here */
+ voice->frequency = (chip->soundregs[ch * 8 + 0x01] & 15) << 16; /* high bits are from here */
voice->frequency += chip->soundregs[ch * 8 + 0x02] << 8;
voice->frequency += chip->soundregs[ch * 8 + 0x03];
break;
@@ -817,14 +817,14 @@ const device_type NAMCO = &device_creator<namco_device>;
namco_device::namco_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NAMCO, "Namco", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(namco_sound);
}
namco_device::namco_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(namco_sound);
}
diff --git a/src/emu/sound/namco.h b/src/emu/sound/namco.h
index 77cb524200f..065611b294f 100644
--- a/src/emu/sound/namco.h
+++ b/src/emu/sound/namco.h
@@ -7,8 +7,8 @@
struct namco_interface
{
- int voices; /* number of voices */
- int stereo; /* set to 1 to indicate stereo (e.g., System 1) */
+ int voices; /* number of voices */
+ int stereo; /* set to 1 to indicate stereo (e.g., System 1) */
};
DECLARE_WRITE8_DEVICE_HANDLER( pacman_sound_enable_w );
@@ -20,14 +20,14 @@ DECLARE_WRITE8_DEVICE_HANDLER( polepos_sound_w );
void mappy_sound_enable(device_t *device, int enable);
-DECLARE_WRITE8_DEVICE_HANDLER( namcos1_cus30_w ); /* wavedata + sound registers + RAM */
+DECLARE_WRITE8_DEVICE_HANDLER( namcos1_cus30_w ); /* wavedata + sound registers + RAM */
DECLARE_READ8_DEVICE_HANDLER( namcos1_cus30_r );
DECLARE_READ8_DEVICE_HANDLER( namco_snd_sharedram_r );
DECLARE_WRITE8_DEVICE_HANDLER( namco_snd_sharedram_w );
class namco_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
namco_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -69,4 +69,3 @@ extern const device_type NAMCO_CUS30;
#endif /* __NAMCO_H__ */
-
diff --git a/src/emu/sound/nes_apu.c b/src/emu/sound/nes_apu.c
index 33f15ca2a53..a13c5557766 100644
--- a/src/emu/sound/nes_apu.c
+++ b/src/emu/sound/nes_apu.c
@@ -57,7 +57,7 @@
/* GLOBAL VARIABLES */
struct nesapu_state
{
- apu_t APU; /* Actual APUs */
+ apu_t APU; /* Actual APUs */
float apu_incsize; /* Adjustment increment */
uint32 samps_per_sync; /* Number of samples per vsync */
uint32 buffer_size; /* Actual buffer size in bytes */
@@ -136,10 +136,10 @@ static int8 apu_square(nesapu_state *info, square_t *chan)
int8 output;
/* reg0: 0-3=volume, 4=envelope, 5=hold, 6-7=duty cycle
- ** reg1: 0-2=sweep shifts, 3=sweep inc/dec, 4-6=sweep length, 7=sweep on
- ** reg2: 8 bits of freq
- ** reg3: 0-2=high freq, 7-4=vbl length counter
- */
+ ** reg1: 0-2=sweep shifts, 3=sweep inc/dec, 4-6=sweep length, 7=sweep on
+ ** reg2: 8 bits of freq
+ ** reg3: 0-2=high freq, 7-4=vbl length counter
+ */
if (FALSE == chan->enabled)
return 0;
@@ -181,7 +181,7 @@ static int8 apu_square(nesapu_state *info, square_t *chan)
}
if ((0 == (chan->regs[1] & 8) && (chan->freq >> 16) > freq_limit[chan->regs[1] & 7])
- || (chan->freq >> 16) < 4)
+ || (chan->freq >> 16) < 4)
return 0;
chan->phaseacc -= (float) info->apu_incsize; /* # of cycles per sample */
@@ -209,9 +209,9 @@ static int8 apu_triangle(nesapu_state *info, triangle_t *chan)
int freq;
int8 output;
/* reg0: 7=holdnote, 6-0=linear length counter
- ** reg2: low 8 bits of frequency
- ** reg3: 7-3=length counter, 2-0=high 3 bits of frequency
- */
+ ** reg2: low 8 bits of frequency
+ ** reg3: 7-3=length counter, 2-0=high 3 bits of frequency
+ */
if (FALSE == chan->enabled)
return 0;
@@ -269,9 +269,9 @@ static int8 apu_noise(nesapu_state *info, noise_t *chan)
uint8 output;
/* reg0: 0-3=volume, 4=envelope, 5=hold
- ** reg2: 7=small(93 byte) sample,3-0=freq lookup
- ** reg3: 7-4=vbl length counter
- */
+ ** reg2: 7=small(93 byte) sample,3-0=freq lookup
+ ** reg3: 7-4=vbl length counter
+ */
if (FALSE == chan->enabled)
return 0;
@@ -346,10 +346,10 @@ static int8 apu_dpcm(nesapu_state *info, dpcm_t *chan)
int freq, bit_pos;
/* reg0: 7=irq gen, 6=looping, 3-0=pointer to clock table
- ** reg1: output dc level, 7 bits unsigned
- ** reg2: 8 bits of 64-byte aligned address offset : $C000 + (value * 64)
- ** reg3: length, (value * 16) + 1
- */
+ ** reg1: output dc level, 7 bits unsigned
+ ** reg2: 8 bits of 64-byte aligned address offset : $C000 + (value * 64)
+ ** reg3: length, (value * 16) + 1
+ */
if (chan->enabled)
{
@@ -467,19 +467,19 @@ INLINE void apu_regwrite(nesapu_state *info,int address, uint8 value)
info->APU.tri.regs[3] = value;
/* this is somewhat of a hack. there is some latency on the Real
- ** Thing between when trireg0 is written to and when the linear
- ** length counter actually begins its countdown. we want to prevent
- ** the case where the program writes to the freq regs first, then
- ** to reg 0, and the counter accidentally starts running because of
- ** the sound queue's timestamp processing.
- **
- ** set to a few NES sample -- should be sufficient
- **
- ** 3 * (1789772.727 / 44100) = ~122 cycles, just around one scanline
- **
- ** should be plenty of time for the 6502 code to do a couple of table
- ** dereferences and load up the other triregs
- */
+ ** Thing between when trireg0 is written to and when the linear
+ ** length counter actually begins its countdown. we want to prevent
+ ** the case where the program writes to the freq regs first, then
+ ** to reg 0, and the counter accidentally starts running because of
+ ** the sound queue's timestamp processing.
+ **
+ ** set to a few NES sample -- should be sufficient
+ **
+ ** 3 * (1789772.727 / 44100) = ~122 cycles, just around one scanline
+ **
+ ** should be plenty of time for the 6502 code to do a couple of table
+ ** dereferences and load up the other triregs
+ */
/* used to be 3, but now we run the clock faster, so base it on samples/sync */
info->APU.tri.write_latency = (info->samps_per_sync + 239) / 240;
@@ -677,8 +677,8 @@ WRITE8_DEVICE_HANDLER( nes_psg_w ) {apu_write(get_safe_token(device),offset,data
/* UPDATE APU SYSTEM */
static STREAM_UPDATE( nes_psg_update_sound )
{
- nesapu_state *info = (nesapu_state *)param;
- apu_update(info, outputs[0], samples);
+ nesapu_state *info = (nesapu_state *)param;
+ apu_update(info, outputs[0], samples);
}
@@ -770,7 +770,7 @@ const device_type NES = &device_creator<nesapu_device>;
nesapu_device::nesapu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NES, "N2A03", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(nesapu_state);
}
@@ -803,5 +803,3 @@ void nesapu_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/nes_apu.h b/src/emu/sound/nes_apu.h
index 8399232b73a..a44424fa553 100644
--- a/src/emu/sound/nes_apu.h
+++ b/src/emu/sound/nes_apu.h
@@ -46,7 +46,7 @@ DECLARE_READ8_DEVICE_HANDLER( nes_psg_r );
DECLARE_WRITE8_DEVICE_HANDLER( nes_psg_w );
class nesapu_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
nesapu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/nes_defs.h b/src/emu/sound/nes_defs.h
index d68151033a0..6bbf2022837 100644
--- a/src/emu/sound/nes_defs.h
+++ b/src/emu/sound/nes_defs.h
@@ -176,33 +176,33 @@ struct apu_t
/* vblank length table used for squares, triangle, noise */
static const uint8 vbl_length[32] =
{
- 5, 127, 10, 1, 19, 2, 40, 3, 80, 4, 30, 5, 7, 6, 13, 7,
- 6, 8, 12, 9, 24, 10, 48, 11, 96, 12, 36, 13, 8, 14, 16, 15
+ 5, 127, 10, 1, 19, 2, 40, 3, 80, 4, 30, 5, 7, 6, 13, 7,
+ 6, 8, 12, 9, 24, 10, 48, 11, 96, 12, 36, 13, 8, 14, 16, 15
};
/* frequency limit of square channels */
static const int freq_limit[8] =
{
- 0x3FF, 0x555, 0x666, 0x71C, 0x787, 0x7C1, 0x7E0, 0x7F0,
+ 0x3FF, 0x555, 0x666, 0x71C, 0x787, 0x7C1, 0x7E0, 0x7F0,
};
/* table of noise frequencies */
static const int noise_freq[16] =
{
- 4, 8, 16, 32, 64, 96, 128, 160, 202, 254, 380, 508, 762, 1016, 2034, 2046
+ 4, 8, 16, 32, 64, 96, 128, 160, 202, 254, 380, 508, 762, 1016, 2034, 2046
};
/* dpcm transfer freqs */
static const int dpcm_clocks[16] =
{
- 428, 380, 340, 320, 286, 254, 226, 214, 190, 160, 142, 128, 106, 85, 72, 54
+ 428, 380, 340, 320, 286, 254, 226, 214, 190, 160, 142, 128, 106, 85, 72, 54
};
/* ratios of pos/neg pulse for square waves */
/* 2/16 = 12.5%, 4/16 = 25%, 8/16 = 50%, 12/16 = 75% */
static const int duty_lut[4] =
{
- 2, 4, 8, 12
+ 2, 4, 8, 12
};
#endif /* __NES_DEFS_H__ */
diff --git a/src/emu/sound/nile.c b/src/emu/sound/nile.c
index a155619e005..05760bc9c58 100644
--- a/src/emu/sound/nile.c
+++ b/src/emu/sound/nile.c
@@ -52,10 +52,10 @@ const device_type NILE = &device_creator<nile_device>;
nile_device::nile_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, NILE, "NiLe", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_stream(NULL),
- m_sound_ram(NULL),
- m_ctrl(0)
+ device_sound_interface(mconfig, *this),
+ m_stream(NULL),
+ m_sound_ram(NULL),
+ m_ctrl(0)
{
}
diff --git a/src/emu/sound/okiadpcm.c b/src/emu/sound/okiadpcm.c
index 75f81ccb33e..5ad05a5bb32 100644
--- a/src/emu/sound/okiadpcm.c
+++ b/src/emu/sound/okiadpcm.c
@@ -91,9 +91,9 @@ void oki_adpcm_state::compute_tables()
{
s_diff_lookup[step*16 + nib] = nbl2bit[nib][0] *
(stepval * nbl2bit[nib][1] +
- stepval/2 * nbl2bit[nib][2] +
- stepval/4 * nbl2bit[nib][3] +
- stepval/8);
+ stepval/2 * nbl2bit[nib][2] +
+ stepval/4 * nbl2bit[nib][3] +
+ stepval/8);
}
}
}
@@ -170,21 +170,21 @@ void oki_adpcm2_state::compute_tables()
};
// loop over all possible steps
- float floatstep = 64;
+ float floatstep = 64;
for (int step = 0; step <= 48; step++)
{
// compute the step value
- int stepval = floor(floatstep * 1.08f);
- floatstep = floatstep * 1.08f;
+ int stepval = floor(floatstep * 1.08f);
+ floatstep = floatstep * 1.08f;
// loop over all nibbles and compute the difference
for (int nib = 0; nib < 16; nib++)
{
s_diff_lookup[step*16 + nib] = nbl2bit[nib][0] *
(stepval * nbl2bit[nib][1] +
- stepval/2 * nbl2bit[nib][2] +
- stepval/4 * nbl2bit[nib][3] +
- stepval/8);
+ stepval/2 * nbl2bit[nib][2] +
+ stepval/4 * nbl2bit[nib][3] +
+ stepval/8);
}
}
}
diff --git a/src/emu/sound/okiadpcm.h b/src/emu/sound/okiadpcm.h
index 22ed3cfe094..2d002e79085 100644
--- a/src/emu/sound/okiadpcm.h
+++ b/src/emu/sound/okiadpcm.h
@@ -23,8 +23,8 @@ public:
void reset();
INT16 clock(UINT8 nibble);
- INT32 m_signal;
- INT32 m_step;
+ INT32 m_signal;
+ INT32 m_step;
private:
static const INT8 s_index_shift[8];
@@ -47,8 +47,8 @@ public:
void reset();
INT16 clock(UINT8 nibble);
- INT32 m_signal;
- INT32 m_step;
+ INT32 m_signal;
+ INT32 m_step;
private:
static const INT8 s_index_shift[8];
diff --git a/src/emu/sound/okim6258.c b/src/emu/sound/okim6258.c
index 2ba9862ba11..622ede0cacc 100644
--- a/src/emu/sound/okim6258.c
+++ b/src/emu/sound/okim6258.c
@@ -12,12 +12,12 @@
#include "emu.h"
#include "okim6258.h"
-#define COMMAND_STOP (1 << 0)
-#define COMMAND_PLAY (1 << 1)
-#define COMMAND_RECORD (1 << 2)
+#define COMMAND_STOP (1 << 0)
+#define COMMAND_PLAY (1 << 1)
+#define COMMAND_RECORD (1 << 2)
-#define STATUS_PLAYING (1 << 1)
-#define STATUS_RECORDING (1 << 2)
+#define STATUS_PLAYING (1 << 1)
+#define STATUS_RECORDING (1 << 2)
static const int dividers[4] = { 1024, 768, 512, 512 };
@@ -25,12 +25,12 @@ struct okim6258_state
{
UINT8 status;
- UINT32 master_clock; /* master clock frequency */
- UINT32 divider; /* master clock divider */
- UINT8 adpcm_type; /* 3/4 bit ADPCM select */
- UINT8 data_in; /* ADPCM data-in register */
- UINT8 nibble_shift; /* nibble select */
- sound_stream *stream; /* which stream are we playing on? */
+ UINT32 master_clock; /* master clock frequency */
+ UINT32 divider; /* master clock divider */
+ UINT8 adpcm_type; /* 3/4 bit ADPCM select */
+ UINT8 data_in; /* ADPCM data-in register */
+ UINT8 nibble_shift; /* nibble select */
+ sound_stream *stream; /* which stream are we playing on? */
UINT8 output_bits;
@@ -84,9 +84,9 @@ static void compute_tables(void)
{
diff_lookup[step*16 + nib] = nbl2bit[nib][0] *
(stepval * nbl2bit[nib][1] +
- stepval/2 * nbl2bit[nib][2] +
- stepval/4 * nbl2bit[nib][3] +
- stepval/8);
+ stepval/2 * nbl2bit[nib][2] +
+ stepval/4 * nbl2bit[nib][3] +
+ stepval/8);
}
}
@@ -356,7 +356,7 @@ const device_type OKIM6258 = &device_creator<okim6258_device>;
okim6258_device::okim6258_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, OKIM6258, "OKI6258", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(okim6258_state);
}
@@ -398,5 +398,3 @@ void okim6258_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/okim6258.h b/src/emu/sound/okim6258.h
index b9bbcc0f36f..65e49f250fd 100644
--- a/src/emu/sound/okim6258.h
+++ b/src/emu/sound/okim6258.h
@@ -15,15 +15,15 @@ struct okim6258_interface
};
-#define FOSC_DIV_BY_1024 0
-#define FOSC_DIV_BY_768 1
-#define FOSC_DIV_BY_512 2
+#define FOSC_DIV_BY_1024 0
+#define FOSC_DIV_BY_768 1
+#define FOSC_DIV_BY_512 2
-#define TYPE_3BITS 0
-#define TYPE_4BITS 1
+#define TYPE_3BITS 0
+#define TYPE_4BITS 1
-#define OUTPUT_10BITS 0
-#define OUTPUT_12BITS 1
+#define OUTPUT_10BITS 0
+#define OUTPUT_12BITS 1
void okim6258_set_divider(device_t *device, int val);
void okim6258_set_clock(device_t *device, int val);
@@ -34,7 +34,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( okim6258_data_w );
DECLARE_WRITE8_DEVICE_HANDLER( okim6258_ctrl_w );
class okim6258_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
okim6258_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/okim6295.c b/src/emu/sound/okim6295.c
index 21444b9ac2e..8eca23f1317 100644
--- a/src/emu/sound/okim6295.c
+++ b/src/emu/sound/okim6295.c
@@ -51,15 +51,15 @@ const device_type OKIM6295 = &device_creator<okim6295_device>;
// results in silent playback.
const UINT8 okim6295_device::s_volume_table[16] =
{
- 0x20, // 0 dB
- 0x16, // -3.2 dB
- 0x10, // -6.0 dB
- 0x0b, // -9.2 dB
- 0x08, // -12.0 dB
- 0x06, // -14.5 dB
- 0x04, // -18.0 dB
- 0x03, // -20.5 dB
- 0x02, // -24.0 dB
+ 0x20, // 0 dB
+ 0x16, // -3.2 dB
+ 0x10, // -6.0 dB
+ 0x0b, // -9.2 dB
+ 0x08, // -12.0 dB
+ 0x06, // -14.5 dB
+ 0x04, // -18.0 dB
+ 0x03, // -20.5 dB
+ 0x02, // -24.0 dB
0x00,
0x00,
0x00,
@@ -86,15 +86,15 @@ ADDRESS_MAP_END
okim6295_device::okim6295_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, OKIM6295, "OKI6295", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- m_space_config("samples", ENDIANNESS_LITTLE, 8, 18, 0, NULL, *ADDRESS_MAP_NAME(okim6295)),
- m_command(-1),
- m_bank_installed(false),
- m_bank_offs(0),
- m_stream(NULL),
- m_pin7_state(0),
- m_direct(NULL)
+ device_sound_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ m_space_config("samples", ENDIANNESS_LITTLE, 8, 18, 0, NULL, *ADDRESS_MAP_NAME(okim6295)),
+ m_command(-1),
+ m_bank_installed(false),
+ m_bank_offs(0),
+ m_stream(NULL),
+ m_pin7_state(0),
+ m_direct(NULL)
{
}
@@ -211,10 +211,10 @@ void okim6295_device::sound_stream_update(sound_stream &stream, stream_sample_t
void okim6295_device::set_bank_base(offs_t base, bool bDontUpdateStream)
{
// flush out anything pending (but not on e.g. a state load)
- if (!bDontUpdateStream)
- {
- m_stream->update();
- }
+ if (!bDontUpdateStream)
+ {
+ m_stream->update();
+ }
// if we are setting a non-zero base, and we have no bank, allocate one
if (!m_bank_installed && base != 0)
@@ -251,7 +251,7 @@ void okim6295_device::set_pin7(int pin7)
UINT8 okim6295_device::read_status()
{
- UINT8 result = 0xf0; // naname expects bits 4-7 to be 1
+ UINT8 result = 0xf0; // naname expects bits 4-7 to be 1
// set the bit to 1 if something is playing on a given channel
m_stream->update();
@@ -380,10 +380,10 @@ WRITE8_MEMBER( okim6295_device::write )
okim6295_device::okim_voice::okim_voice()
: m_playing(false),
- m_base_offset(0),
- m_sample(0),
- m_count(0),
- m_volume(0)
+ m_base_offset(0),
+ m_sample(0),
+ m_count(0),
+ m_volume(0)
{
}
@@ -417,4 +417,3 @@ void okim6295_device::okim_voice::generate_adpcm(direct_read_data &direct, strea
}
}
}
-
diff --git a/src/emu/sound/okim6295.h b/src/emu/sound/okim6295.h
index 5c11b7c6129..cd366663a1f 100644
--- a/src/emu/sound/okim6295.h
+++ b/src/emu/sound/okim6295.h
@@ -92,12 +92,12 @@ protected:
okim_voice();
void generate_adpcm(direct_read_data &direct, stream_sample_t *buffer, int samples);
- oki_adpcm_state m_adpcm; // current ADPCM state
- bool m_playing;
- offs_t m_base_offset; // pointer to the base memory location
- UINT32 m_sample; // current sample number
- UINT32 m_count; // total samples to play
- INT8 m_volume; // output volume
+ oki_adpcm_state m_adpcm; // current ADPCM state
+ bool m_playing;
+ offs_t m_base_offset; // pointer to the base memory location
+ UINT32 m_sample; // current sample number
+ UINT32 m_count; // total samples to play
+ INT8 m_volume; // output volume
};
// configuration state
@@ -106,13 +106,13 @@ protected:
// internal state
static const int OKIM6295_VOICES = 4;
- okim_voice m_voice[OKIM6295_VOICES];
- INT32 m_command;
- bool m_bank_installed;
- offs_t m_bank_offs;
- sound_stream * m_stream;
- UINT8 m_pin7_state;
- direct_read_data * m_direct;
+ okim_voice m_voice[OKIM6295_VOICES];
+ INT32 m_command;
+ bool m_bank_installed;
+ offs_t m_bank_offs;
+ sound_stream * m_stream;
+ UINT8 m_pin7_state;
+ direct_read_data * m_direct;
static const UINT8 s_volume_table[16];
};
diff --git a/src/emu/sound/okim6376.c b/src/emu/sound/okim6376.c
index 3c8c3b24da0..b6caf3db419 100644
--- a/src/emu/sound/okim6376.c
+++ b/src/emu/sound/okim6376.c
@@ -14,7 +14,7 @@
#include "emu.h"
#include "okim6376.h"
-#define MAX_SAMPLE_CHUNK 10000
+#define MAX_SAMPLE_CHUNK 10000
//#define MAX_WORDS 111
#define OKIVERBOSE 0
@@ -23,36 +23,36 @@
/* struct describing a single playing ADPCM voice */
struct ADPCMVoice
{
- UINT8 playing; /* 1 if we are actively playing */
+ UINT8 playing; /* 1 if we are actively playing */
- UINT32 base_offset; /* pointer to the base memory location */
- UINT32 sample; /* current sample number */
- UINT32 count; /* total samples to play */
+ UINT32 base_offset; /* pointer to the base memory location */
+ UINT32 sample; /* current sample number */
+ UINT32 count; /* total samples to play */
- UINT32 volume; /* output volume */
+ UINT32 volume; /* output volume */
INT32 signal;
INT32 step;
};
struct okim6376_state
{
- #define OKIM6376_VOICES 2
+ #define OKIM6376_VOICES 2
struct ADPCMVoice voice[OKIM6376_VOICES];
INT32 command[OKIM6376_VOICES];
- INT32 latch; /* Command data is held before transferring to either channel */
+ INT32 latch; /* Command data is held before transferring to either channel */
UINT8 stage[OKIM6376_VOICES];/* If a sample is playing, flag that we have a command staged */
- UINT8 *region_base; /* pointer to the base of the region */
- sound_stream *stream; /* which stream are we playing on? */
- UINT32 master_clock; /* master clock frequency */
- UINT8 divisor; /* can be 8,10,16, and is read out of ROM data */
+ UINT8 *region_base; /* pointer to the base of the region */
+ sound_stream *stream; /* which stream are we playing on? */
+ UINT32 master_clock; /* master clock frequency */
+ UINT8 divisor; /* can be 8,10,16, and is read out of ROM data */
UINT8 channel;
- UINT8 nar; /* Next Address Ready */
+ UINT8 nar; /* Next Address Ready */
UINT8 nartimer;
UINT8 busy;
- UINT8 ch2; /* 2CH pin - enables Channel 2 operation */
- UINT8 st; /* STart */
- UINT8 st_pulses; /* Keep track of attenuation */
- UINT8 ch2_update; /* Pulse shape */
+ UINT8 ch2; /* 2CH pin - enables Channel 2 operation */
+ UINT8 st; /* STart */
+ UINT8 st_pulses; /* Keep track of attenuation */
+ UINT8 ch2_update; /* Pulse shape */
UINT8 st_update;
};
@@ -67,9 +67,9 @@ static int diff_lookup[49*16];
channel*/
static const int volume_table[3] =
{
- 0x20, // 0 dB
- 0x10, // -6.0 dB
- 0x08, // -12.0 dB
+ 0x20, // 0 dB
+ 0x10, // -6.0 dB
+ 0x08, // -12.0 dB
};
/* divisor lookup table. When an individual word is selected, it can be assigned one of three different 'rates'.
@@ -125,9 +125,9 @@ static void compute_tables(void)
{
diff_lookup[step*16 + nib] = nbl2bit[nib][0] *
(stepval * nbl2bit[nib][1] +
- stepval/2 * nbl2bit[nib][2] +
- stepval/4 * nbl2bit[nib][3] +
- stepval/8);
+ stepval/2 * nbl2bit[nib][2] +
+ stepval/4 * nbl2bit[nib][3] +
+ stepval/8);
}
}
@@ -622,7 +622,7 @@ const device_type OKIM6376 = &device_creator<okim6376_device>;
okim6376_device::okim6376_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, OKIM6376, "OKI6376", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(okim6376_state);
}
@@ -664,5 +664,3 @@ void okim6376_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/okim6376.h b/src/emu/sound/okim6376.h
index ece5e6c785b..a6e2811ec0b 100644
--- a/src/emu/sound/okim6376.h
+++ b/src/emu/sound/okim6376.h
@@ -11,7 +11,7 @@ DECLARE_READ8_DEVICE_HANDLER( okim6376_r );
DECLARE_WRITE8_DEVICE_HANDLER( okim6376_w );
class okim6376_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
okim6376_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/okim9810.c b/src/emu/sound/okim9810.c
index 928ee2687db..184841da32b 100644
--- a/src/emu/sound/okim9810.c
+++ b/src/emu/sound/okim9810.c
@@ -21,48 +21,48 @@ const device_type OKIM9810 = &device_creator<okim9810_device>;
// Given the dB values, that seems to map to a 7-bit volume control.
const UINT8 okim9810_device::okim_voice::s_volume_table[16] =
{
- 0x80, // 0 dB
- 0x65, // -2 dB
- 0x50, // -4 dB
- 0x40, // -6 dB
- 0x32, // -8.0 dB
- 0x28, // -10.5 dB
- 0x20, // -12.0 dB
- 0x19, // -14.5 dB
- 0x14, // -16.0 dB
- 0x10, // -18.0 dB
- 0x0c, // -20.0 dB
- 0x0a, // -22.0 dB
- 0x08, // -24.0 dB
- 0x06, // -26.0 dB
- 0x05, // -28.0 dB
- 0x04, // -30.0 dB
+ 0x80, // 0 dB
+ 0x65, // -2 dB
+ 0x50, // -4 dB
+ 0x40, // -6 dB
+ 0x32, // -8.0 dB
+ 0x28, // -10.5 dB
+ 0x20, // -12.0 dB
+ 0x19, // -14.5 dB
+ 0x14, // -16.0 dB
+ 0x10, // -18.0 dB
+ 0x0c, // -20.0 dB
+ 0x0a, // -22.0 dB
+ 0x08, // -24.0 dB
+ 0x06, // -26.0 dB
+ 0x05, // -28.0 dB
+ 0x04, // -30.0 dB
};
// sampling frequency lookup table.
const UINT32 okim9810_device::s_sampling_freq_table[16] =
{
- 4000,
- 8000,
- 16000,
- 32000,
- 0,
- 6400,
- 12800,
- 25600,
- 0,
- 5300,
- 10600,
- 21200,
- 0,
- 0,
- 0,
- 0
+ 4000,
+ 8000,
+ 16000,
+ 32000,
+ 0,
+ 6400,
+ 12800,
+ 25600,
+ 0,
+ 5300,
+ 10600,
+ 21200,
+ 0,
+ 0,
+ 0,
+ 0
};
// default address map
static ADDRESS_MAP_START( okim9810, AS_0, 8, okim9810_device )
- AM_RANGE(0x000000, 0xffffff) AM_ROM
+ AM_RANGE(0x000000, 0xffffff) AM_ROM
ADDRESS_MAP_END
@@ -77,14 +77,14 @@ ADDRESS_MAP_END
okim9810_device::okim9810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, OKIM9810, "OKI9810", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- m_space_config("samples", ENDIANNESS_BIG, 8, 24, 0, NULL, *ADDRESS_MAP_NAME(okim9810)),
- m_stream(NULL),
- m_TMP_register(0x00),
- m_global_volume(0x00),
- m_filter_type(OKIM9810_SECONDARY_FILTER),
- m_output_level(OKIM9810_OUTPUT_TO_DIRECT_DAC)
+ device_sound_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ m_space_config("samples", ENDIANNESS_BIG, 8, 24, 0, NULL, *ADDRESS_MAP_NAME(okim9810)),
+ m_stream(NULL),
+ m_TMP_register(0x00),
+ m_global_volume(0x00),
+ m_filter_type(OKIM9810_SECONDARY_FILTER),
+ m_output_level(OKIM9810_OUTPUT_TO_DIRECT_DAC)
{
}
@@ -102,9 +102,9 @@ void okim9810_device::device_start()
//int divisor = m_pin7 ? 132 : 165;
m_stream = machine().sound().stream_alloc(*this, 0, 2, clock());
- // save state stuff
- // m_TMP_register
- // m_voice
+ // save state stuff
+ // m_TMP_register
+ // m_voice
}
@@ -173,13 +173,13 @@ void okim9810_device::sound_stream_update(sound_stream &stream, stream_sample_t
UINT8 okim9810_device::read_status()
{
- UINT8 result = 0x00;
- UINT8 channelMask = 0x01;
- for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
- {
- if (!m_voice[i].m_playing)
- result |= channelMask;
- }
+ UINT8 result = 0x00;
+ UINT8 channelMask = 0x01;
+ for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
+ {
+ if (!m_voice[i].m_playing)
+ result |= channelMask;
+ }
return result;
}
@@ -201,171 +201,171 @@ READ8_MEMBER( okim9810_device::read )
// The command is written when the CMD pin is low
void okim9810_device::write_command(UINT8 data)
{
- const UINT8 cmd = (data & 0xf8) >> 3;
- const UINT8 channel = (data & 0x07);
-
- switch(cmd)
- {
- case 0x00: // START
- {
- mame_printf_debug("START channel mask %02x\n", m_TMP_register);
- UINT8 channelMask = 0x01;
- for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
- {
- if (channelMask & m_TMP_register)
- {
- m_voice[i].m_playing = true;
- mame_printf_debug("\t\tPlaying channel %d: encoder type %d @ %dhz (volume = %d %d). From %08x for %d samples (looping=%d).\n",
- i,
- m_voice[i].m_playbackAlgo,
- m_voice[i].m_samplingFreq,
- m_voice[i].volume_scale(m_global_volume, m_voice[i].m_channel_volume, m_voice[i].m_pan_volume_left),
- m_voice[i].volume_scale(m_global_volume, m_voice[i].m_channel_volume, m_voice[i].m_pan_volume_right),
- m_voice[i].m_base_offset,
- m_voice[i].m_count,
- m_voice[i].m_looping);
- }
- }
- break;
- }
- case 0x01: // STOP
- {
- mame_printf_debug("STOP channel mask %02x\n", m_TMP_register);
- UINT8 channelMask = 0x01;
- for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
- {
- if (channelMask & m_TMP_register)
- {
- m_voice[i].m_playing = false;
- mame_printf_debug("\tChannel %d stopping.\n", i);
- }
- }
- break;
- }
- case 0x02: // LOOP
- {
- mame_printf_debug("LOOP channel mask %02x\n", m_TMP_register);
- UINT8 channelMask = 0x01;
- for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
- {
- if (channelMask & m_TMP_register)
- {
- m_voice[i].m_looping = true;
- mame_printf_debug("\tChannel %d looping.\n", i);
- }
- else
- {
- m_voice[i].m_looping = false;
- mame_printf_debug("\tChannel %d done looping.\n", i);
- }
- }
- break;
- }
- case 0x03: // OPT (options)
- {
- mame_printf_debug("OPT complex data %02x\n", m_TMP_register);
- m_global_volume = (m_TMP_register & 0x18) >> 3;
- m_filter_type = (m_TMP_register & 0x06) >> 1;
- m_output_level = (m_TMP_register & 0x01);
- mame_printf_debug("\tOPT setting main volume scale to Vdd/%d\n", m_global_volume+1);
- mame_printf_debug("\tOPT setting output filter type to %d\n", m_filter_type);
- mame_printf_debug("\tOPT setting output amp level to %d\n", m_output_level);
- break;
- }
- case 0x04: // MUON (silence)
- {
- mame_printf_warning("MUON channel %d length %02x\n", channel, m_TMP_register);
- mame_printf_warning("MSM9810: UNIMPLEMENTED COMMAND!\n");
- break;
- }
-
- case 0x05: // FADR (phrase address)
- {
- const offs_t base = m_TMP_register * 8;
-
- offs_t startAddr;
- UINT8 startFlags = m_direct->read_raw_byte(base + 0);
- startAddr = m_direct->read_raw_byte(base + 1) << 16;
- startAddr |= m_direct->read_raw_byte(base + 2) << 8;
- startAddr |= m_direct->read_raw_byte(base + 3) << 0;
-
- offs_t endAddr;
- UINT8 endFlags = m_direct->read_raw_byte(base + 4);
- endAddr = m_direct->read_raw_byte(base + 5) << 16;
- endAddr |= m_direct->read_raw_byte(base + 6) << 8;
- endAddr |= m_direct->read_raw_byte(base + 7) << 0;
-
- // Sub-table
- if (startFlags & 0x80)
- {
- offs_t subTable = startAddr;
- // TODO: New startFlags &= 0x80. Are there further subtables?
- startFlags = m_direct->read_raw_byte(subTable + 0);
- startAddr = m_direct->read_raw_byte(subTable + 1) << 16;
- startAddr |= m_direct->read_raw_byte(subTable + 2) << 8;
- startAddr |= m_direct->read_raw_byte(subTable + 3) << 0;
-
- // TODO: What does byte (subTable + 4) refer to?
- endAddr = m_direct->read_raw_byte(subTable + 5) << 16;
- endAddr |= m_direct->read_raw_byte(subTable + 6) << 8;
- endAddr |= m_direct->read_raw_byte(subTable + 7) << 0;
- }
-
- m_voice[channel].m_sample = 0;
- m_voice[channel].m_interpSampleNum = 0;
- m_voice[channel].m_startFlags = startFlags;
- m_voice[channel].m_base_offset = startAddr;
- m_voice[channel].m_endFlags = endFlags;
- m_voice[channel].m_count = (endAddr-startAddr) + 1; // Is there yet another extra byte at the end?
-
- m_voice[channel].m_playbackAlgo = (startFlags & 0x30) >> 4;
- m_voice[channel].m_samplingFreq = s_sampling_freq_table[startFlags & 0x0f];
- if (m_voice[channel].m_playbackAlgo == OKIM9810_ADPCM_PLAYBACK ||
- m_voice[channel].m_playbackAlgo == OKIM9810_ADPCM2_PLAYBACK)
- m_voice[channel].m_count *= 2;
- else
- mame_printf_warning("MSM9810: UNIMPLEMENTED PLAYBACK METHOD %d\n", m_voice[channel].m_playbackAlgo);
-
- mame_printf_debug("FADR channel %d phrase offset %02x => ", channel, m_TMP_register);
- mame_printf_debug("startFlags(%02x) startAddr(%06x) endFlags(%02x) endAddr(%06x) bytes(%d)\n", startFlags, startAddr, endFlags, endAddr, endAddr-startAddr);
- break;
- }
-
- case 0x06: // DADR (direct address playback)
- {
- mame_printf_warning("DADR channel %d complex data %02x\n", channel, m_TMP_register);
- mame_printf_warning("MSM9810: UNIMPLEMENTED COMMAND!\n");
- break;
- }
- case 0x07: // CVOL (channel volume)
- {
- mame_printf_debug("CVOL channel %d data %02x\n", channel, m_TMP_register);
- mame_printf_debug("\tChannel %d -> volume index %d.\n", channel, m_TMP_register & 0x0f);
-
- m_voice[channel].m_channel_volume = m_TMP_register & 0x0f;
- break;
- }
- case 0x08: // PAN
- {
- const UINT8 leftVolIndex = (m_TMP_register & 0xf0) >> 4;
- const UINT8 rightVolIndex = m_TMP_register & 0x0f;
- mame_printf_debug("PAN channel %d left index: %02x right index: %02x (%02x)\n", channel, leftVolIndex, rightVolIndex, m_TMP_register);
- mame_printf_debug("\tChannel %d left -> %d right -> %d\n", channel, leftVolIndex, rightVolIndex);
- m_voice[channel].m_pan_volume_left = leftVolIndex;
- m_voice[channel].m_pan_volume_right = rightVolIndex;
- break;
- }
- default:
- {
- mame_printf_warning("MSM9810: UNKNOWN COMMAND!\n");
- break;
- }
- }
+ const UINT8 cmd = (data & 0xf8) >> 3;
+ const UINT8 channel = (data & 0x07);
+
+ switch(cmd)
+ {
+ case 0x00: // START
+ {
+ mame_printf_debug("START channel mask %02x\n", m_TMP_register);
+ UINT8 channelMask = 0x01;
+ for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
+ {
+ if (channelMask & m_TMP_register)
+ {
+ m_voice[i].m_playing = true;
+ mame_printf_debug("\t\tPlaying channel %d: encoder type %d @ %dhz (volume = %d %d). From %08x for %d samples (looping=%d).\n",
+ i,
+ m_voice[i].m_playbackAlgo,
+ m_voice[i].m_samplingFreq,
+ m_voice[i].volume_scale(m_global_volume, m_voice[i].m_channel_volume, m_voice[i].m_pan_volume_left),
+ m_voice[i].volume_scale(m_global_volume, m_voice[i].m_channel_volume, m_voice[i].m_pan_volume_right),
+ m_voice[i].m_base_offset,
+ m_voice[i].m_count,
+ m_voice[i].m_looping);
+ }
+ }
+ break;
+ }
+ case 0x01: // STOP
+ {
+ mame_printf_debug("STOP channel mask %02x\n", m_TMP_register);
+ UINT8 channelMask = 0x01;
+ for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
+ {
+ if (channelMask & m_TMP_register)
+ {
+ m_voice[i].m_playing = false;
+ mame_printf_debug("\tChannel %d stopping.\n", i);
+ }
+ }
+ break;
+ }
+ case 0x02: // LOOP
+ {
+ mame_printf_debug("LOOP channel mask %02x\n", m_TMP_register);
+ UINT8 channelMask = 0x01;
+ for (int i = 0; i < OKIM9810_VOICES; i++, channelMask <<= 1)
+ {
+ if (channelMask & m_TMP_register)
+ {
+ m_voice[i].m_looping = true;
+ mame_printf_debug("\tChannel %d looping.\n", i);
+ }
+ else
+ {
+ m_voice[i].m_looping = false;
+ mame_printf_debug("\tChannel %d done looping.\n", i);
+ }
+ }
+ break;
+ }
+ case 0x03: // OPT (options)
+ {
+ mame_printf_debug("OPT complex data %02x\n", m_TMP_register);
+ m_global_volume = (m_TMP_register & 0x18) >> 3;
+ m_filter_type = (m_TMP_register & 0x06) >> 1;
+ m_output_level = (m_TMP_register & 0x01);
+ mame_printf_debug("\tOPT setting main volume scale to Vdd/%d\n", m_global_volume+1);
+ mame_printf_debug("\tOPT setting output filter type to %d\n", m_filter_type);
+ mame_printf_debug("\tOPT setting output amp level to %d\n", m_output_level);
+ break;
+ }
+ case 0x04: // MUON (silence)
+ {
+ mame_printf_warning("MUON channel %d length %02x\n", channel, m_TMP_register);
+ mame_printf_warning("MSM9810: UNIMPLEMENTED COMMAND!\n");
+ break;
+ }
+
+ case 0x05: // FADR (phrase address)
+ {
+ const offs_t base = m_TMP_register * 8;
+
+ offs_t startAddr;
+ UINT8 startFlags = m_direct->read_raw_byte(base + 0);
+ startAddr = m_direct->read_raw_byte(base + 1) << 16;
+ startAddr |= m_direct->read_raw_byte(base + 2) << 8;
+ startAddr |= m_direct->read_raw_byte(base + 3) << 0;
+
+ offs_t endAddr;
+ UINT8 endFlags = m_direct->read_raw_byte(base + 4);
+ endAddr = m_direct->read_raw_byte(base + 5) << 16;
+ endAddr |= m_direct->read_raw_byte(base + 6) << 8;
+ endAddr |= m_direct->read_raw_byte(base + 7) << 0;
+
+ // Sub-table
+ if (startFlags & 0x80)
+ {
+ offs_t subTable = startAddr;
+ // TODO: New startFlags &= 0x80. Are there further subtables?
+ startFlags = m_direct->read_raw_byte(subTable + 0);
+ startAddr = m_direct->read_raw_byte(subTable + 1) << 16;
+ startAddr |= m_direct->read_raw_byte(subTable + 2) << 8;
+ startAddr |= m_direct->read_raw_byte(subTable + 3) << 0;
+
+ // TODO: What does byte (subTable + 4) refer to?
+ endAddr = m_direct->read_raw_byte(subTable + 5) << 16;
+ endAddr |= m_direct->read_raw_byte(subTable + 6) << 8;
+ endAddr |= m_direct->read_raw_byte(subTable + 7) << 0;
+ }
+
+ m_voice[channel].m_sample = 0;
+ m_voice[channel].m_interpSampleNum = 0;
+ m_voice[channel].m_startFlags = startFlags;
+ m_voice[channel].m_base_offset = startAddr;
+ m_voice[channel].m_endFlags = endFlags;
+ m_voice[channel].m_count = (endAddr-startAddr) + 1; // Is there yet another extra byte at the end?
+
+ m_voice[channel].m_playbackAlgo = (startFlags & 0x30) >> 4;
+ m_voice[channel].m_samplingFreq = s_sampling_freq_table[startFlags & 0x0f];
+ if (m_voice[channel].m_playbackAlgo == OKIM9810_ADPCM_PLAYBACK ||
+ m_voice[channel].m_playbackAlgo == OKIM9810_ADPCM2_PLAYBACK)
+ m_voice[channel].m_count *= 2;
+ else
+ mame_printf_warning("MSM9810: UNIMPLEMENTED PLAYBACK METHOD %d\n", m_voice[channel].m_playbackAlgo);
+
+ mame_printf_debug("FADR channel %d phrase offset %02x => ", channel, m_TMP_register);
+ mame_printf_debug("startFlags(%02x) startAddr(%06x) endFlags(%02x) endAddr(%06x) bytes(%d)\n", startFlags, startAddr, endFlags, endAddr, endAddr-startAddr);
+ break;
+ }
+
+ case 0x06: // DADR (direct address playback)
+ {
+ mame_printf_warning("DADR channel %d complex data %02x\n", channel, m_TMP_register);
+ mame_printf_warning("MSM9810: UNIMPLEMENTED COMMAND!\n");
+ break;
+ }
+ case 0x07: // CVOL (channel volume)
+ {
+ mame_printf_debug("CVOL channel %d data %02x\n", channel, m_TMP_register);
+ mame_printf_debug("\tChannel %d -> volume index %d.\n", channel, m_TMP_register & 0x0f);
+
+ m_voice[channel].m_channel_volume = m_TMP_register & 0x0f;
+ break;
+ }
+ case 0x08: // PAN
+ {
+ const UINT8 leftVolIndex = (m_TMP_register & 0xf0) >> 4;
+ const UINT8 rightVolIndex = m_TMP_register & 0x0f;
+ mame_printf_debug("PAN channel %d left index: %02x right index: %02x (%02x)\n", channel, leftVolIndex, rightVolIndex, m_TMP_register);
+ mame_printf_debug("\tChannel %d left -> %d right -> %d\n", channel, leftVolIndex, rightVolIndex);
+ m_voice[channel].m_pan_volume_left = leftVolIndex;
+ m_voice[channel].m_pan_volume_right = rightVolIndex;
+ break;
+ }
+ default:
+ {
+ mame_printf_warning("MSM9810: UNKNOWN COMMAND!\n");
+ break;
+ }
+ }
}
WRITE8_MEMBER( okim9810_device::write )
{
- write_command(data);
+ write_command(data);
}
@@ -376,7 +376,7 @@ WRITE8_MEMBER( okim9810_device::write )
// TMP is written when the CMD pin is high
void okim9810_device::write_TMP_register(UINT8 data)
{
- m_TMP_register = data;
+ m_TMP_register = data;
}
WRITE8_MEMBER( okim9810_device::write_TMP_register )
@@ -395,20 +395,20 @@ WRITE8_MEMBER( okim9810_device::write_TMP_register )
okim9810_device::okim_voice::okim_voice()
: m_playbackAlgo(OKIM9810_ADPCM2_PLAYBACK),
- m_looping(false),
- m_startFlags(0),
- m_endFlags(0),
- m_base_offset(0),
- m_count(0),
- m_samplingFreq(s_sampling_freq_table[2]),
- m_playing(false),
- m_sample(0),
- m_channel_volume(0x00),
- m_pan_volume_left(0x00),
- m_pan_volume_right(0x00),
- m_startSample(0),
- m_endSample(0),
- m_interpSampleNum(0)
+ m_looping(false),
+ m_startFlags(0),
+ m_endFlags(0),
+ m_base_offset(0),
+ m_count(0),
+ m_samplingFreq(s_sampling_freq_table[2]),
+ m_playing(false),
+ m_sample(0),
+ m_channel_volume(0x00),
+ m_pan_volume_left(0x00),
+ m_pan_volume_right(0x00),
+ m_startSample(0),
+ m_endSample(0),
+ m_interpSampleNum(0)
{
}
@@ -418,11 +418,11 @@ okim9810_device::okim_voice::okim_voice()
//-------------------------------------------------
void okim9810_device::okim_voice::generate_audio(direct_read_data &direct,
- stream_sample_t **buffers,
- int samples,
- const UINT8 global_volume,
- const UINT32 clock,
- const UINT8 filter_type)
+ stream_sample_t **buffers,
+ int samples,
+ const UINT8 global_volume,
+ const UINT32 clock,
+ const UINT8 filter_type)
{
// skip if not active
if (!m_playing)
@@ -430,105 +430,105 @@ void okim9810_device::okim_voice::generate_audio(direct_read_data &direct,
// separate out left and right channels
stream_sample_t *outL = buffers[0];
- stream_sample_t *outR = buffers[1];
+ stream_sample_t *outR = buffers[1];
- // get left and right volumes
+ // get left and right volumes
UINT8 volume_scale_left = volume_scale(global_volume, m_channel_volume, m_pan_volume_left);
UINT8 volume_scale_right = volume_scale(global_volume, m_channel_volume, m_pan_volume_right);
- // total samples per byte
- UINT32 totalInterpSamples = clock / m_samplingFreq;
+ // total samples per byte
+ UINT32 totalInterpSamples = clock / m_samplingFreq;
// loop while we still have samples to generate
while (samples-- != 0)
{
- // If interpSampleNum == 0, we are at the beginning of a new interp chunk, gather data
- if (m_interpSampleNum == 0)
- {
- // If m_sample == 0, we have begun to play a new voice. Get both the first nibble & the second.
- if (m_sample == 0)
- {
- // fetch the first sample nibble
- int nibble0 = direct.read_raw_byte(m_base_offset + m_sample / 2) >> (((m_sample & 1) << 2) ^ 4);
- switch (m_playbackAlgo)
- {
- case OKIM9810_ADPCM_PLAYBACK:
- {
- m_adpcm.reset();
- m_startSample = (INT32)m_adpcm.clock(nibble0);
- break;
- }
- case OKIM9810_ADPCM2_PLAYBACK:
- {
- m_adpcm2.reset();
- m_startSample = (INT32)m_adpcm2.clock(nibble0);
- break;
- }
- default:
- break;
- }
- }
- else
- {
- // Otherwise just move the second nibble back to the first spot.
- m_startSample = m_endSample;
- }
-
- // And fetch the second sample nibble
- int nibble1 = direct.read_raw_byte(m_base_offset + (m_sample+1) / 2) >> ((((m_sample+1) & 1) << 2) ^ 4);
- switch (m_playbackAlgo)
- {
- case OKIM9810_ADPCM_PLAYBACK:
- {
- m_endSample = (INT32)m_adpcm.clock(nibble1);
- break;
- }
- case OKIM9810_ADPCM2_PLAYBACK:
- {
- m_endSample = (INT32)m_adpcm2.clock(nibble1);
- break;
- }
- default:
- break;
- }
- }
-
- // TODO: Interpolate using proper numeric types.
- float progress = (float)m_interpSampleNum / (float)totalInterpSamples;
- INT32 interpValue = (INT32)((float)m_startSample + (((float)m_endSample-(float)m_startSample) * progress));
-
- // if filtering is unwanted
- if (filter_type != OKIM9810_SECONDARY_FILTER && filter_type != OKIM9810_PRIMARY_FILTER)
- interpValue = m_startSample;
+ // If interpSampleNum == 0, we are at the beginning of a new interp chunk, gather data
+ if (m_interpSampleNum == 0)
+ {
+ // If m_sample == 0, we have begun to play a new voice. Get both the first nibble & the second.
+ if (m_sample == 0)
+ {
+ // fetch the first sample nibble
+ int nibble0 = direct.read_raw_byte(m_base_offset + m_sample / 2) >> (((m_sample & 1) << 2) ^ 4);
+ switch (m_playbackAlgo)
+ {
+ case OKIM9810_ADPCM_PLAYBACK:
+ {
+ m_adpcm.reset();
+ m_startSample = (INT32)m_adpcm.clock(nibble0);
+ break;
+ }
+ case OKIM9810_ADPCM2_PLAYBACK:
+ {
+ m_adpcm2.reset();
+ m_startSample = (INT32)m_adpcm2.clock(nibble0);
+ break;
+ }
+ default:
+ break;
+ }
+ }
+ else
+ {
+ // Otherwise just move the second nibble back to the first spot.
+ m_startSample = m_endSample;
+ }
+
+ // And fetch the second sample nibble
+ int nibble1 = direct.read_raw_byte(m_base_offset + (m_sample+1) / 2) >> ((((m_sample+1) & 1) << 2) ^ 4);
+ switch (m_playbackAlgo)
+ {
+ case OKIM9810_ADPCM_PLAYBACK:
+ {
+ m_endSample = (INT32)m_adpcm.clock(nibble1);
+ break;
+ }
+ case OKIM9810_ADPCM2_PLAYBACK:
+ {
+ m_endSample = (INT32)m_adpcm2.clock(nibble1);
+ break;
+ }
+ default:
+ break;
+ }
+ }
+
+ // TODO: Interpolate using proper numeric types.
+ float progress = (float)m_interpSampleNum / (float)totalInterpSamples;
+ INT32 interpValue = (INT32)((float)m_startSample + (((float)m_endSample-(float)m_startSample) * progress));
+
+ // if filtering is unwanted
+ if (filter_type != OKIM9810_SECONDARY_FILTER && filter_type != OKIM9810_PRIMARY_FILTER)
+ interpValue = m_startSample;
// output to the stereo buffers, scaling by the volume
// signal in range -2048..2047, volume in range 2..128 => signal * volume / 8 in range -32768..32767
- INT32 interpValueL = (interpValue * (INT32)volume_scale_left) / 8;
- *outL++ += interpValueL;
+ INT32 interpValueL = (interpValue * (INT32)volume_scale_left) / 8;
+ *outL++ += interpValueL;
- INT32 interpValueR = (interpValue * (INT32)volume_scale_right) / 8;
- *outR++ += interpValueR;
+ INT32 interpValueR = (interpValue * (INT32)volume_scale_right) / 8;
+ *outR++ += interpValueR;
// if the interpsample has reached its end, move on to the next sample
- m_interpSampleNum++;
- if (m_interpSampleNum >= totalInterpSamples)
- {
- m_interpSampleNum = 0;
- m_sample++;
- }
-
- // the end of the stream has been reached
+ m_interpSampleNum++;
+ if (m_interpSampleNum >= totalInterpSamples)
+ {
+ m_interpSampleNum = 0;
+ m_sample++;
+ }
+
+ // the end of the stream has been reached
if (m_sample >= m_count)
{
- if (!m_looping)
- {
- m_playing = false;
- break;
- }
- else
- {
- m_sample = 0;
- }
+ if (!m_looping)
+ {
+ m_playing = false;
+ break;
+ }
+ else
+ {
+ m_sample = 0;
+ }
}
}
}
@@ -541,16 +541,16 @@ void okim9810_device::okim_voice::generate_audio(direct_read_data &direct,
//-------------------------------------------------
UINT8 okim9810_device::okim_voice::volume_scale(const UINT8 global_volume_index,
- const UINT8 channel_volume_index,
- const UINT8 pan_volume_index) const
+ const UINT8 channel_volume_index,
+ const UINT8 pan_volume_index) const
{
- const UINT8& V = channel_volume_index;
- const UINT8& L = pan_volume_index;
- const UINT8& O = global_volume_index;
- UINT32 index = (V+L) + (O*3);
+ const UINT8& V = channel_volume_index;
+ const UINT8& L = pan_volume_index;
+ const UINT8& O = global_volume_index;
+ UINT32 index = (V+L) + (O*3);
- if (index > 15)
- index = 15;
+ if (index > 15)
+ index = 15;
- return s_volume_table[index];
+ return s_volume_table[index];
}
diff --git a/src/emu/sound/okim9810.h b/src/emu/sound/okim9810.h
index 459c4edc046..75316b7cf96 100644
--- a/src/emu/sound/okim9810.h
+++ b/src/emu/sound/okim9810.h
@@ -27,15 +27,15 @@ enum
OKIM9810_ADPCM_PLAYBACK = 0,
OKIM9810_ADPCM2_PLAYBACK = 1,
OKIM9810_STRAIGHT8_PLAYBACK = 2,
- OKIM9810_NONLINEAR8_PLAYBACK = 3
+ OKIM9810_NONLINEAR8_PLAYBACK = 3
};
enum
{
OKIM9810_SECONDARY_FILTER = 0,
OKIM9810_PRIMARY_FILTER = 1,
- OKIM9810_NO_FILTER = 2,
- OKIM9810_NO_FILTER2 = 3
+ OKIM9810_NO_FILTER = 2,
+ OKIM9810_NO_FILTER2 = 3
};
enum
@@ -93,43 +93,43 @@ protected:
// device_sound_interface overrides
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
- // a single voice
+ // a single voice
class okim_voice
{
public:
okim_voice();
void generate_audio(direct_read_data &direct,
- stream_sample_t **buffers,
- int samples,
- const UINT8 global_volume,
- const UINT32 clock,
- const UINT8 filter_type);
+ stream_sample_t **buffers,
+ int samples,
+ const UINT8 global_volume,
+ const UINT32 clock,
+ const UINT8 filter_type);
- // computes volume scale from 3 volume numbers
+ // computes volume scale from 3 volume numbers
UINT8 volume_scale(const UINT8 global_volume,
- const UINT8 channel_volume,
- const UINT8 pan_volume) const;
-
- oki_adpcm_state m_adpcm; // current ADPCM state
- oki_adpcm2_state m_adpcm2; // current ADPCM2 state
- UINT8 m_playbackAlgo; // current playback method
- bool m_looping;
- UINT8 m_startFlags;
- UINT8 m_endFlags;
- offs_t m_base_offset; // pointer to the base memory location
- UINT32 m_count; // total samples to play
- UINT32 m_samplingFreq; // voice sampling frequency
-
- bool m_playing; // playback state
- UINT32 m_sample; // current sample number
-
- UINT8 m_channel_volume; // volume index set with the CVOL command
- UINT8 m_pan_volume_left; // volume index set with the PAN command
- UINT8 m_pan_volume_right; // volume index set with the PAN command
-
- INT32 m_startSample; // interpolation state - sample to interpolate from
- INT32 m_endSample; // interpolation state - sample to interpolate to
- UINT32 m_interpSampleNum; // interpolation state - fraction between start & end
+ const UINT8 channel_volume,
+ const UINT8 pan_volume) const;
+
+ oki_adpcm_state m_adpcm; // current ADPCM state
+ oki_adpcm2_state m_adpcm2; // current ADPCM2 state
+ UINT8 m_playbackAlgo; // current playback method
+ bool m_looping;
+ UINT8 m_startFlags;
+ UINT8 m_endFlags;
+ offs_t m_base_offset; // pointer to the base memory location
+ UINT32 m_count; // total samples to play
+ UINT32 m_samplingFreq; // voice sampling frequency
+
+ bool m_playing; // playback state
+ UINT32 m_sample; // current sample number
+
+ UINT8 m_channel_volume; // volume index set with the CVOL command
+ UINT8 m_pan_volume_left; // volume index set with the PAN command
+ UINT8 m_pan_volume_right; // volume index set with the PAN command
+
+ INT32 m_startSample; // interpolation state - sample to interpolate from
+ INT32 m_endSample; // interpolation state - sample to interpolate to
+ UINT32 m_interpSampleNum; // interpolation state - fraction between start & end
static const UINT8 s_volume_table[16];
};
@@ -141,16 +141,16 @@ protected:
sound_stream* m_stream;
direct_read_data* m_direct;
- UINT8 m_TMP_register;
+ UINT8 m_TMP_register;
- UINT8 m_global_volume; // volume index set with the OPT command
- UINT8 m_filter_type; // interpolation filter type set with the OPT command
- UINT8 m_output_level; // flag stating if a voltage follower is connected
+ UINT8 m_global_volume; // volume index set with the OPT command
+ UINT8 m_filter_type; // interpolation filter type set with the OPT command
+ UINT8 m_output_level; // flag stating if a voltage follower is connected
static const int OKIM9810_VOICES = 8;
okim_voice m_voice[OKIM9810_VOICES];
- static const UINT32 s_sampling_freq_table[16];
+ static const UINT32 s_sampling_freq_table[16];
};
diff --git a/src/emu/sound/pokey.c b/src/emu/sound/pokey.c
index 252eaece506..2612472a41e 100644
--- a/src/emu/sound/pokey.c
+++ b/src/emu/sound/pokey.c
@@ -77,11 +77,11 @@
#define POKEY_DEFAULT_GAIN (32767/11/4)
-#define VERBOSE 0
-#define VERBOSE_SOUND 0
-#define VERBOSE_TIMER 0
-#define VERBOSE_POLY 0
-#define VERBOSE_RAND 0
+#define VERBOSE 0
+#define VERBOSE_SOUND 0
+#define VERBOSE_TIMER 0
+#define VERBOSE_POLY 0
+#define VERBOSE_RAND 0
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
@@ -93,67 +93,67 @@
#define LOG_RAND(x) do { if (VERBOSE_RAND) logerror x; } while (0)
-#define CHAN1 0
-#define CHAN2 1
-#define CHAN3 2
-#define CHAN4 3
+#define CHAN1 0
+#define CHAN2 1
+#define CHAN3 2
+#define CHAN4 3
-#define TIMER1 0
-#define TIMER2 1
-#define TIMER4 2
+#define TIMER1 0
+#define TIMER2 1
+#define TIMER4 2
/* values to add to the divisors for the different modes */
-#define DIVADD_LOCLK 1
-#define DIVADD_HICLK 4
+#define DIVADD_LOCLK 1
+#define DIVADD_HICLK 4
#define DIVADD_HICLK_JOINED 7
/* AUDCx */
-#define NOTPOLY5 0x80 /* selects POLY5 or direct CLOCK */
-#define POLY4 0x40 /* selects POLY4 or POLY17 */
-#define PURE 0x20 /* selects POLY4/17 or PURE tone */
-#define VOLUME_ONLY 0x10 /* selects VOLUME OUTPUT ONLY */
-#define VOLUME_MASK 0x0f /* volume mask */
+#define NOTPOLY5 0x80 /* selects POLY5 or direct CLOCK */
+#define POLY4 0x40 /* selects POLY4 or POLY17 */
+#define PURE 0x20 /* selects POLY4/17 or PURE tone */
+#define VOLUME_ONLY 0x10 /* selects VOLUME OUTPUT ONLY */
+#define VOLUME_MASK 0x0f /* volume mask */
/* AUDCTL */
-#define POLY9 0x80 /* selects POLY9 or POLY17 */
-#define CH1_HICLK 0x40 /* selects 1.78979 MHz for Ch 1 */
-#define CH3_HICLK 0x20 /* selects 1.78979 MHz for Ch 3 */
-#define CH12_JOINED 0x10 /* clocks channel 1 w/channel 2 */
-#define CH34_JOINED 0x08 /* clocks channel 3 w/channel 4 */
-#define CH1_FILTER 0x04 /* selects channel 1 high pass filter */
-#define CH2_FILTER 0x02 /* selects channel 2 high pass filter */
-#define CLK_15KHZ 0x01 /* selects 15.6999 kHz or 63.9211 kHz */
+#define POLY9 0x80 /* selects POLY9 or POLY17 */
+#define CH1_HICLK 0x40 /* selects 1.78979 MHz for Ch 1 */
+#define CH3_HICLK 0x20 /* selects 1.78979 MHz for Ch 3 */
+#define CH12_JOINED 0x10 /* clocks channel 1 w/channel 2 */
+#define CH34_JOINED 0x08 /* clocks channel 3 w/channel 4 */
+#define CH1_FILTER 0x04 /* selects channel 1 high pass filter */
+#define CH2_FILTER 0x02 /* selects channel 2 high pass filter */
+#define CLK_15KHZ 0x01 /* selects 15.6999 kHz or 63.9211 kHz */
/* IRQEN (D20E) */
-#define IRQ_BREAK 0x80 /* BREAK key pressed interrupt */
-#define IRQ_KEYBD 0x40 /* keyboard data ready interrupt */
-#define IRQ_SERIN 0x20 /* serial input data ready interrupt */
-#define IRQ_SEROR 0x10 /* serial output register ready interrupt */
-#define IRQ_SEROC 0x08 /* serial output complete interrupt */
-#define IRQ_TIMR4 0x04 /* timer channel #4 interrupt */
-#define IRQ_TIMR2 0x02 /* timer channel #2 interrupt */
-#define IRQ_TIMR1 0x01 /* timer channel #1 interrupt */
+#define IRQ_BREAK 0x80 /* BREAK key pressed interrupt */
+#define IRQ_KEYBD 0x40 /* keyboard data ready interrupt */
+#define IRQ_SERIN 0x20 /* serial input data ready interrupt */
+#define IRQ_SEROR 0x10 /* serial output register ready interrupt */
+#define IRQ_SEROC 0x08 /* serial output complete interrupt */
+#define IRQ_TIMR4 0x04 /* timer channel #4 interrupt */
+#define IRQ_TIMR2 0x02 /* timer channel #2 interrupt */
+#define IRQ_TIMR1 0x01 /* timer channel #1 interrupt */
/* SKSTAT (R/D20F) */
-#define SK_FRAME 0x80 /* serial framing error */
-#define SK_KBERR 0x40 /* keyboard overrun error - pokey documentation states *some bit as IRQST */
-#define SK_OVERRUN 0x20 /* serial overrun error - pokey documentation states *some bit as IRQST */
-#define SK_SERIN 0x10 /* serial input high */
-#define SK_SHIFT 0x08 /* shift key pressed */
-#define SK_KEYBD 0x04 /* keyboard key pressed */
-#define SK_SEROUT 0x02 /* serial output active */
+#define SK_FRAME 0x80 /* serial framing error */
+#define SK_KBERR 0x40 /* keyboard overrun error - pokey documentation states *some bit as IRQST */
+#define SK_OVERRUN 0x20 /* serial overrun error - pokey documentation states *some bit as IRQST */
+#define SK_SERIN 0x10 /* serial input high */
+#define SK_SHIFT 0x08 /* shift key pressed */
+#define SK_KEYBD 0x04 /* keyboard key pressed */
+#define SK_SEROUT 0x02 /* serial output active */
/* SKCTL (W/D20F) */
-#define SK_BREAK 0x80 /* serial out break signal */
-#define SK_BPS 0x70 /* bits per second */
-#define SK_FM 0x08 /* FM mode */
-#define SK_PADDLE 0x04 /* fast paddle a/d conversion */
-#define SK_RESET 0x03 /* reset serial/keyboard interface */
-#define SK_KEYSCAN 0x02 /* key scanning enabled ? */
-#define SK_DEBOUNCE 0x01 /* Debouncing ?*/
+#define SK_BREAK 0x80 /* serial out break signal */
+#define SK_BPS 0x70 /* bits per second */
+#define SK_FM 0x08 /* FM mode */
+#define SK_PADDLE 0x04 /* fast paddle a/d conversion */
+#define SK_RESET 0x03 /* reset serial/keyboard interface */
+#define SK_KEYSCAN 0x02 /* key scanning enabled ? */
+#define SK_DEBOUNCE 0x01 /* Debouncing ?*/
-#define DIV_64 28 /* divisor for 1.78979 MHz clock to 63.9211 kHz */
-#define DIV_15 114 /* divisor for 1.78979 MHz clock to 15.6999 kHz */
+#define DIV_64 28 /* divisor for 1.78979 MHz clock to 63.9211 kHz */
+#define DIV_15 114 /* divisor for 1.78979 MHz clock to 15.6999 kHz */
#define P4(chip) chip->poly4[chip->p4]
#define P5(chip) chip->poly5[chip->p5]
@@ -182,15 +182,15 @@ const device_type POKEY = &device_creator<pokey_device>;
pokey_device::pokey_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, POKEY, "POKEY", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_execute_interface(mconfig, *this),
- device_state_interface(mconfig, *this),
- pokey_interface(),
- m_kbd_r(NULL),
- m_irq_f(NULL),
- m_output_type(LEGACY_LINEAR),
- m_icount(0),
- m_stream(NULL)
+ device_sound_interface(mconfig, *this),
+ device_execute_interface(mconfig, *this),
+ device_state_interface(mconfig, *this),
+ pokey_interface(),
+ m_kbd_r(NULL),
+ m_irq_f(NULL),
+ m_output_type(LEGACY_LINEAR),
+ m_icount(0),
+ m_stream(NULL)
{
}
@@ -242,12 +242,12 @@ void pokey_device::device_start()
m_channel[CHAN4].m_INTMask = IRQ_TIMR4;
/* calculate the A/D times
- * In normal, slow mode (SKCTL bit SK_PADDLE is clear) the conversion
- * takes N scanlines, where N is the paddle value. A single scanline
- * takes approximately 64us to finish (1.78979MHz clock).
- * In quick mode (SK_PADDLE set) the conversion is done very fast
- * (takes two scanlines) but the result is not as accurate.
- */
+ * In normal, slow mode (SKCTL bit SK_PADDLE is clear) the conversion
+ * takes N scanlines, where N is the paddle value. A single scanline
+ * takes approximately 64us to finish (1.78979MHz clock).
+ * In quick mode (SK_PADDLE set) the conversion is done very fast
+ * (takes two scanlines) but the result is not as accurate.
+ */
/* initialize the poly counters */
poly_init_4_5(m_poly4, 4, 1, 0);
@@ -259,11 +259,11 @@ void pokey_device::device_start()
vol_init();
/* The pokey does not have a reset line. These should be initialized
- * with random values.
- */
+ * with random values.
+ */
- m_KBCODE = 0x09; /* Atari 800 'no key' */
- m_SKCTL = SK_RESET; /* let the RNG run after reset */
+ m_KBCODE = 0x09; /* Atari 800 'no key' */
+ m_SKCTL = SK_RESET; /* let the RNG run after reset */
m_SKSTAT = 0;
m_IRQST = 0;
m_IRQEN = 0;
@@ -296,7 +296,7 @@ void pokey_device::device_start()
m_stream = stream_alloc(0, 1, clock());
- timer_alloc(SYNC_WRITE); /* timer for sync operation */
+ timer_alloc(SYNC_WRITE); /* timer for sync operation */
timer_alloc(SYNC_NOOP);
timer_alloc(SYNC_POT);
timer_alloc(SYNC_SET_IRQST);
@@ -398,25 +398,25 @@ void pokey_device::device_timer(emu_timer &timer, device_timer_id id, int param,
{
case 3:
/* serout_ready_cb */
- if( m_IRQEN & IRQ_SEROR )
+ if( m_IRQEN & IRQ_SEROR )
{
m_IRQST |= IRQ_SEROR;
if( m_irq_f )
(m_irq_f)(this, IRQ_SEROR);
}
- break;
+ break;
case 4:
/* serout_complete */
- if( m_IRQEN & IRQ_SEROC )
+ if( m_IRQEN & IRQ_SEROC )
{
m_IRQST |= IRQ_SEROC;
if( m_irq_f )
(m_irq_f)(this, IRQ_SEROC);
}
- break;
+ break;
case 5:
/* serin_ready */
- if( m_IRQEN & IRQ_SERIN )
+ if( m_IRQEN & IRQ_SERIN )
{
/* set the enabled timer irq status bits */
m_IRQST |= IRQ_SERIN;
@@ -424,7 +424,7 @@ void pokey_device::device_timer(emu_timer &timer, device_timer_id id, int param,
if( m_irq_f )
(m_irq_f)(this, IRQ_SERIN);
}
- break;
+ break;
case SYNC_WRITE:
{
offs_t offset = (param >> 8) & 0xff;
@@ -600,48 +600,48 @@ UINT32 pokey_device::step_one_clock(void)
int clock_triggered[3] = {0,0,0};
int base_clock = (m_AUDCTL & CLK_15KHZ) ? CLK_114 : CLK_28;
- if( (m_SKCTL & SK_RESET) )
- {
- /* Clocks only count if we are not in a reset */
- for (clk = 0; clk < 3; clk++)
- {
- m_clock_cnt[clk]++;
- if (m_clock_cnt[clk] >= clock_divisors[clk])
- {
- m_clock_cnt[clk] = 0;
- clock_triggered[clk] = 1;
- }
- }
-
- m_p4 = (m_p4 + 1) % 0x0000f;
- m_p5 = (m_p5 + 1) % 0x0001f;
- m_p9 = (m_p9 + 1) % 0x001ff;
- m_p17 = (m_p17 + 1 ) % 0x1ffff;
-
- clk = (m_AUDCTL & CH1_HICLK) ? CLK_1 : base_clock;
- if (clock_triggered[clk])
- m_channel[CHAN1].inc_chan();
-
- clk = (m_AUDCTL & CH3_HICLK) ? CLK_1 : base_clock;
- if (clock_triggered[clk])
- m_channel[CHAN3].inc_chan();
-
- if (clock_triggered[base_clock])
- {
- if (!(m_AUDCTL & CH12_JOINED))
- m_channel[CHAN2].inc_chan();
- if (!(m_AUDCTL & CH34_JOINED))
- m_channel[CHAN4].inc_chan();
- }
-
- /* Potentiometer handling */
- if ((clock_triggered[CLK_114] || (m_SKCTL & SK_PADDLE)) && (m_pot_counter < 228))
- step_pot();
+ if( (m_SKCTL & SK_RESET) )
+ {
+ /* Clocks only count if we are not in a reset */
+ for (clk = 0; clk < 3; clk++)
+ {
+ m_clock_cnt[clk]++;
+ if (m_clock_cnt[clk] >= clock_divisors[clk])
+ {
+ m_clock_cnt[clk] = 0;
+ clock_triggered[clk] = 1;
+ }
+ }
+
+ m_p4 = (m_p4 + 1) % 0x0000f;
+ m_p5 = (m_p5 + 1) % 0x0001f;
+ m_p9 = (m_p9 + 1) % 0x001ff;
+ m_p17 = (m_p17 + 1 ) % 0x1ffff;
+
+ clk = (m_AUDCTL & CH1_HICLK) ? CLK_1 : base_clock;
+ if (clock_triggered[clk])
+ m_channel[CHAN1].inc_chan();
+
+ clk = (m_AUDCTL & CH3_HICLK) ? CLK_1 : base_clock;
+ if (clock_triggered[clk])
+ m_channel[CHAN3].inc_chan();
+
+ if (clock_triggered[base_clock])
+ {
+ if (!(m_AUDCTL & CH12_JOINED))
+ m_channel[CHAN2].inc_chan();
+ if (!(m_AUDCTL & CH34_JOINED))
+ m_channel[CHAN4].inc_chan();
+ }
+
+ /* Potentiometer handling */
+ if ((clock_triggered[CLK_114] || (m_SKCTL & SK_PADDLE)) && (m_pot_counter < 228))
+ step_pot();
/* Keyboard */
- if (clock_triggered[CLK_114] && (m_SKCTL & SK_KEYSCAN))
- step_keyboard();
- }
+ if (clock_triggered[CLK_114] && (m_SKCTL & SK_KEYSCAN))
+ step_keyboard();
+ }
/* do CHAN2 before CHAN1 because CHAN1 may set borrow! */
if (m_channel[CHAN2].check_borrow())
@@ -653,7 +653,7 @@ UINT32 pokey_device::step_one_clock(void)
process_channel(CHAN2);
/* check if some of the requested timer interrupts are enabled */
- if ((m_IRQST & IRQ_TIMR2) && m_irq_f )
+ if ((m_IRQST & IRQ_TIMR2) && m_irq_f )
(*m_irq_f)(this, IRQ_TIMR2);
}
@@ -666,7 +666,7 @@ UINT32 pokey_device::step_one_clock(void)
m_channel[CHAN1].reset_channel();
process_channel(CHAN1);
/* check if some of the requested timer interrupts are enabled */
- if ((m_IRQST & IRQ_TIMR1) && m_irq_f )
+ if ((m_IRQST & IRQ_TIMR1) && m_irq_f )
(*m_irq_f)(this, IRQ_TIMR1);
}
@@ -683,7 +683,7 @@ UINT32 pokey_device::step_one_clock(void)
m_channel[CHAN2].sample();
else
m_channel[CHAN2].m_filter_sample = 1;
- if ((m_IRQST & IRQ_TIMR4) && m_irq_f )
+ if ((m_IRQST & IRQ_TIMR4) && m_irq_f )
(*m_irq_f)(this, IRQ_TIMR4);
}
@@ -728,8 +728,8 @@ void pokey_device::sound_stream_update(sound_stream &stream, stream_sample_t **i
out = (out > 0x7fff) ? 0x7fff : out;
while( samples > 0 )
{
- *buffer++ = out;
- samples--;
+ *buffer++ = out;
+ samples--;
}
}
else if (m_output_type == RC_LOWPASS)
@@ -741,51 +741,51 @@ void pokey_device::sound_stream_update(sound_stream &stream, stream_sample_t **i
while( samples > 0 )
{
- /* store sum of output signals into the buffer */
- m_out_filter += (V0 - m_out_filter) * mult;
- *buffer++ = m_out_filter;
- samples--;
+ /* store sum of output signals into the buffer */
+ m_out_filter += (V0 - m_out_filter) * mult;
+ *buffer++ = m_out_filter;
+ samples--;
}
}
else if (m_output_type == OPAMP_C_TO_GROUND)
{
double rTot = m_voltab[m_output];
- /* In this configuration there is a capacitor in parallel to the pokey output to ground.
- * With a LM324 in LTSpice this causes the opamp circuit to oscillate at around 100 kHz.
- * We are ignoring the capacitor here, since this oscillation would not be audible.
- */
+ /* In this configuration there is a capacitor in parallel to the pokey output to ground.
+ * With a LM324 in LTSpice this causes the opamp circuit to oscillate at around 100 kHz.
+ * We are ignoring the capacitor here, since this oscillation would not be audible.
+ */
- /* This post-pokey stage usually has a high-pass filter behind it
- * It is approximated by eliminating m_v_ref ( -1.0 term)
- */
+ /* This post-pokey stage usually has a high-pass filter behind it
+ * It is approximated by eliminating m_v_ref ( -1.0 term)
+ */
double V0 = ((rTot+m_r_pullup) / rTot - 1.0) * m_v_ref / 5.0 * 32767.0;
while( samples > 0 )
{
- /* store sum of output signals into the buffer */
- *buffer++ = V0;
- samples--;
+ /* store sum of output signals into the buffer */
+ *buffer++ = V0;
+ samples--;
}
}
else if (m_output_type == OPAMP_LOW_PASS)
{
double rTot = m_voltab[m_output];
- /* This post-pokey stage usually has a low-pass filter behind it
- * It is approximated by not adding in VRef below.
- */
+ /* This post-pokey stage usually has a low-pass filter behind it
+ * It is approximated by not adding in VRef below.
+ */
double V0 = (m_r_pullup / rTot) * m_v_ref / 5.0 * 32767.0;
double mult = (m_cap == 0.0) ? 1.0 : 1.0 - exp(-1.0 / (m_cap * m_r_pullup) * m_clock_period.as_double());
while( samples > 0 )
{
- /* store sum of output signals into the buffer */
- m_out_filter += (V0 - m_out_filter) * mult;
- *buffer++ = m_out_filter /* + m_v_ref */; // see above
- samples--;
+ /* store sum of output signals into the buffer */
+ m_out_filter += (V0 - m_out_filter) * mult;
+ *buffer++ = m_out_filter /* + m_v_ref */; // see above
+ samples--;
}
}
else if (m_output_type == DISCRETE_VAR_R)
@@ -793,8 +793,8 @@ void pokey_device::sound_stream_update(sound_stream &stream, stream_sample_t **i
INT32 out = m_voltab[m_output];
while( samples > 0 )
{
- *buffer++ = out;
- samples--;
+ *buffer++ = out;
+ samples--;
}
}
}
@@ -832,11 +832,11 @@ UINT8 pokey_device::read(offs_t offset)
}
break;
- case ALLPOT_C:
+ case ALLPOT_C:
/****************************************************************
- * If the 2 least significant bits of SKCTL are 0, the ALLPOTs
- * are disabled (SKRESET). Thanks to MikeJ for pointing this out.
- ****************************************************************/
+ * If the 2 least significant bits of SKCTL are 0, the ALLPOTs
+ * are disabled (SKRESET). Thanks to MikeJ for pointing this out.
+ ****************************************************************/
if( (m_SKCTL & SK_RESET) == 0)
{
data = 0;
@@ -896,9 +896,9 @@ UINT8 pokey_device::read(offs_t offset)
default:
LOG(("POKEY '%s' register $%02x\n", tag(), offset));
data = 0x00;
- break;
- }
- return data;
+ break;
+ }
+ return data;
}
@@ -919,65 +919,65 @@ WRITE8_MEMBER( pokey_device::write )
void pokey_device::write_internal(offs_t offset, UINT8 data)
{
- /* determine which address was changed */
+ /* determine which address was changed */
switch (offset & 15)
- {
- case AUDF1_C:
+ {
+ case AUDF1_C:
LOG_SOUND(("POKEY '%s' AUDF1 $%02x\n", tag(), data));
m_channel[CHAN1].m_AUDF = data;
- break;
+ break;
- case AUDC1_C:
+ case AUDC1_C:
LOG_SOUND(("POKEY '%s' AUDC1 $%02x (%s)\n", tag(), data, audc2str(data)));
m_channel[CHAN1].m_AUDC = data;
- break;
+ break;
- case AUDF2_C:
+ case AUDF2_C:
LOG_SOUND(("POKEY '%s' AUDF2 $%02x\n", tag(), data));
m_channel[CHAN2].m_AUDF = data;
- break;
+ break;
- case AUDC2_C:
+ case AUDC2_C:
LOG_SOUND(("POKEY '%s' AUDC2 $%02x (%s)\n", tag(), data, audc2str(data)));
m_channel[CHAN2].m_AUDC = data;
- break;
+ break;
- case AUDF3_C:
+ case AUDF3_C:
LOG_SOUND(("POKEY '%s' AUDF3 $%02x\n", tag(), data));
m_channel[CHAN3].m_AUDF = data;
- break;
+ break;
- case AUDC3_C:
+ case AUDC3_C:
LOG_SOUND(("POKEY '%s' AUDC3 $%02x (%s)\n", tag(), data, audc2str(data)));
m_channel[CHAN3].m_AUDC = data;
- break;
+ break;
- case AUDF4_C:
+ case AUDF4_C:
LOG_SOUND(("POKEY '%s' AUDF4 $%02x\n", tag(), data));
m_channel[CHAN4].m_AUDF = data;
- break;
+ break;
- case AUDC4_C:
+ case AUDC4_C:
LOG_SOUND(("POKEY '%s' AUDC4 $%02x (%s)\n", tag(), data, audc2str(data)));
m_channel[CHAN4].m_AUDC = data;
- break;
+ break;
- case AUDCTL_C:
+ case AUDCTL_C:
if( data == m_AUDCTL )
- return;
+ return;
LOG_SOUND(("POKEY '%s' AUDCTL $%02x (%s)\n", tag(), data, audctl2str(data)));
m_AUDCTL = data;
break;
- case STIMER_C:
+ case STIMER_C:
LOG_TIMER(("POKEY '%s' STIMER $%02x\n", tag(), data));
/* From the pokey documentation:
- * reset all counters to zero (side effect)
- * Actually this takes 4 cycles to actually happen.
- * FIXME: Use timer for delayed reset !
- */
+ * reset all counters to zero (side effect)
+ * Actually this takes 4 cycles to actually happen.
+ * FIXME: Use timer for delayed reset !
+ */
for (int i = 0; i < POKEY_CHANNELS; i++)
{
m_channel[i].reset_channel();
@@ -985,81 +985,81 @@ void pokey_device::write_internal(offs_t offset, UINT8 data)
m_channel[i].m_filter_sample = (i<2 ? 1 : 0);
}
- break;
+ break;
- case SKREST_C:
- /* reset SKSTAT */
+ case SKREST_C:
+ /* reset SKSTAT */
LOG(("POKEY '%s' SKREST $%02x\n", tag(), data));
m_SKSTAT &= ~(SK_FRAME|SK_OVERRUN|SK_KBERR);
- break;
+ break;
- case POTGO_C:
+ case POTGO_C:
LOG(("POKEY '%s' POTGO $%02x\n", tag(), data));
pokey_potgo();
- break;
+ break;
- case SEROUT_C:
+ case SEROUT_C:
LOG(("POKEY '%s' SEROUT $%02x\n", tag(), data));
m_serout_w(offset, data);
m_SKSTAT |= SK_SEROUT;
- /*
- * These are arbitrary values, tested with some custom boot
- * loaders from Ballblazer and Escape from Fractalus
- * The real times are unknown
- */
- timer_set(attotime::from_usec(200), 3);
- /* 10 bits (assumption 1 start, 8 data and 1 stop bit) take how long? */
- timer_set(attotime::from_usec(2000), 4);// FUNC(pokey_serout_complete), 0, p);
- break;
-
- case IRQEN_C:
+ /*
+ * These are arbitrary values, tested with some custom boot
+ * loaders from Ballblazer and Escape from Fractalus
+ * The real times are unknown
+ */
+ timer_set(attotime::from_usec(200), 3);
+ /* 10 bits (assumption 1 start, 8 data and 1 stop bit) take how long? */
+ timer_set(attotime::from_usec(2000), 4);// FUNC(pokey_serout_complete), 0, p);
+ break;
+
+ case IRQEN_C:
LOG(("POKEY '%s' IRQEN $%02x\n", tag(), data));
- /* acknowledge one or more IRQST bits ? */
+ /* acknowledge one or more IRQST bits ? */
if( m_IRQST & ~data )
- {
- /* reset IRQST bits that are masked now */
+ {
+ /* reset IRQST bits that are masked now */
m_IRQST &= data;
- }
+ }
/* store irq enable */
m_IRQEN = data;
- break;
+ break;
- case SKCTL_C:
+ case SKCTL_C:
if( data == m_SKCTL )
- return;
+ return;
LOG(("POKEY '%s' SKCTL $%02x\n", tag(), data));
m_SKCTL = data;
- if( !(data & SK_RESET) )
- {
- write_internal(IRQEN_C, 0);
- write_internal(SKREST_C, 0);
- /****************************************************************
- * If the 2 least significant bits of SKCTL are 0, the random
- * number generator is disabled (SKRESET). Thanks to Eric Smith
- * for pointing out this critical bit of info!
- * Couriersud: Actually, the 17bit poly is reset and kept in a
- * reset state.
- ****************************************************************/
- m_p9 = 0;
- m_p17 = 0;
- m_p4 = 0;
- m_p5 = 0;
- m_clock_cnt[0] = 0;
- m_clock_cnt[1] = 0;
- m_clock_cnt[2] = 0;
- /* FIXME: Serial port reset ! */
- }
- break;
- }
+ if( !(data & SK_RESET) )
+ {
+ write_internal(IRQEN_C, 0);
+ write_internal(SKREST_C, 0);
+ /****************************************************************
+ * If the 2 least significant bits of SKCTL are 0, the random
+ * number generator is disabled (SKRESET). Thanks to Eric Smith
+ * for pointing out this critical bit of info!
+ * Couriersud: Actually, the 17bit poly is reset and kept in a
+ * reset state.
+ ****************************************************************/
+ m_p9 = 0;
+ m_p17 = 0;
+ m_p4 = 0;
+ m_p5 = 0;
+ m_clock_cnt[0] = 0;
+ m_clock_cnt[1] = 0;
+ m_clock_cnt[2] = 0;
+ /* FIXME: Serial port reset ! */
+ }
+ break;
+ }
/************************************************************
- * As defined in the manual, the exact counter values are
- * different depending on the frequency and resolution:
- * 64 kHz or 15 kHz - AUDF + 1
- * 1.79 MHz, 8-bit - AUDF + 4
- * 1.79 MHz, 16-bit - AUDF[CHAN1]+256*AUDF[CHAN2] + 7
- ************************************************************/
+ * As defined in the manual, the exact counter values are
+ * different depending on the frequency and resolution:
+ * 64 kHz or 15 kHz - AUDF + 1
+ * 1.79 MHz, 8-bit - AUDF + 4
+ * 1.79 MHz, 16-bit - AUDF[CHAN1]+256*AUDF[CHAN2] + 7
+ ************************************************************/
}
@@ -1090,14 +1090,14 @@ inline void pokey_device::process_channel(int ch)
void pokey_device::pokey_potgo(void)
{
- int pot;
+ int pot;
LOG(("POKEY #%p pokey_potgo\n", this));
- m_ALLPOT = 0x00;
- m_pot_counter = 0;
+ m_ALLPOT = 0x00;
+ m_pot_counter = 0;
- for( pot = 0; pot < 8; pot++ )
+ for( pot = 0; pot < 8; pot++ )
{
m_POTx[pot] = 228;
if( !m_pot_r[pot].isnull() )
@@ -1112,8 +1112,8 @@ void pokey_device::pokey_potgo(void)
if (r == 0)
{
/* immediately set the ready - bit of m_ALLPOT
- * In this case, most likely no capacitor is connected
- */
+ * In this case, most likely no capacitor is connected
+ */
m_ALLPOT |= (1<<pot);
}
@@ -1128,8 +1128,8 @@ void pokey_device::vol_init()
double resistors[4] = {90000, 26500, 8050, 3400};
double pull_up = 10000;
/* just a guess, there has to be a resistance since the doc specifies that
- * Vout is at least 4.2V if all channels turned off.
- */
+ * Vout is at least 4.2V if all channels turned off.
+ */
double r_off = 8e6;
double r_chan[16];
double rTot;
@@ -1169,56 +1169,56 @@ void pokey_device::vol_init()
void pokey_device::poly_init_4_5(UINT32 *poly, int size, int xorbit, int invert)
{
int mask = (1 << size) - 1;
- int i;
- UINT32 lfsr = 0;
+ int i;
+ UINT32 lfsr = 0;
LOG_POLY(("poly %d\n", size));
- for( i = 0; i < mask; i++ )
+ for( i = 0; i < mask; i++ )
{
- /* calculate next bit */
- int in = !((lfsr >> 0) & 1) ^ ((lfsr >> xorbit) & 1);
- lfsr = lfsr >> 1;
- lfsr = (in << (size-1)) | lfsr;
+ /* calculate next bit */
+ int in = !((lfsr >> 0) & 1) ^ ((lfsr >> xorbit) & 1);
+ lfsr = lfsr >> 1;
+ lfsr = (in << (size-1)) | lfsr;
*poly = lfsr ^ invert;
- LOG_POLY(("%05x: %02x\n", i, *poly));
- poly++;
+ LOG_POLY(("%05x: %02x\n", i, *poly));
+ poly++;
}
}
void pokey_device::poly_init_9_17(UINT32 *poly, int size)
{
- int mask = (1 << size) - 1;
- int i;
- UINT32 lfsr =mask;
+ int mask = (1 << size) - 1;
+ int i;
+ UINT32 lfsr =mask;
LOG_RAND(("rand %d\n", size));
if (size == 17)
{
- for( i = 0; i < mask; i++ )
+ for( i = 0; i < mask; i++ )
{
- /* calculate next bit @ 7 */
- int in8 = ((lfsr >> 8) & 1) ^ ((lfsr >> 13) & 1);
- int in = (lfsr & 1);
- lfsr = lfsr >> 1;
- lfsr = (lfsr & 0xff7f) | (in8 << 7);
- lfsr = (in << 16) | lfsr;
+ /* calculate next bit @ 7 */
+ int in8 = ((lfsr >> 8) & 1) ^ ((lfsr >> 13) & 1);
+ int in = (lfsr & 1);
+ lfsr = lfsr >> 1;
+ lfsr = (lfsr & 0xff7f) | (in8 << 7);
+ lfsr = (in << 16) | lfsr;
*poly = lfsr;
- LOG_RAND(("%05x: %02x\n", i, *poly));
- poly++;
+ LOG_RAND(("%05x: %02x\n", i, *poly));
+ poly++;
}
}
else
{
- for( i = 0; i < mask; i++ )
+ for( i = 0; i < mask; i++ )
{
- /* calculate next bit */
- int in = ((lfsr >> 0) & 1) ^ ((lfsr >> 5) & 1);
- lfsr = lfsr >> 1;
- lfsr = (in << 8) | lfsr;
+ /* calculate next bit */
+ int in = ((lfsr >> 0) & 1) ^ ((lfsr >> 5) & 1);
+ lfsr = lfsr >> 1;
+ lfsr = (in << 8) | lfsr;
*poly = lfsr;
- LOG_RAND(("%05x: %02x\n", i, *poly));
- poly++;
+ LOG_RAND(("%05x: %02x\n", i, *poly));
+ poly++;
}
}
@@ -1246,7 +1246,7 @@ char *pokey_device::audc2str(int val)
strcpy(buff,"poly4+poly5");
else
strcpy(buff,"poly9/17+poly5");
- }
+ }
return buff;
}
@@ -1271,11 +1271,11 @@ char *pokey_device::audctl2str(int val)
strcat(buff,"+ch2filter");
if( val & CLK_15KHZ )
strcat(buff,"+clk15");
- return buff;
+ return buff;
}
pokey_device::pokey_channel::pokey_channel()
- : m_AUDF(0),
+ : m_AUDF(0),
m_AUDC(0),
m_borrow_cnt(0),
m_counter(0),
diff --git a/src/emu/sound/pokey.h b/src/emu/sound/pokey.h
index 9e11aab2a36..0e30a8f1c90 100644
--- a/src/emu/sound/pokey.h
+++ b/src/emu/sound/pokey.h
@@ -124,10 +124,10 @@ struct pokey_interface
// ======================> pokey_device
class pokey_device : public device_t,
- public device_sound_interface,
- public device_execute_interface,
- public device_state_interface,
- public pokey_interface
+ public device_sound_interface,
+ public device_execute_interface,
+ public device_state_interface,
+ public pokey_interface
{
public:
@@ -179,10 +179,10 @@ public:
enum /* sync-operations */
{
- SYNC_NOOP = 11,
- SYNC_SET_IRQST = 12,
- SYNC_POT = 13,
- SYNC_WRITE = 14
+ SYNC_NOOP = 11,
+ SYNC_SET_IRQST = 12,
+ SYNC_POT = 13,
+ SYNC_WRITE = 14
};
enum output_type
@@ -233,52 +233,52 @@ protected:
//virtual UINT32 execute_min_cycles() const { return 114; }
// other internal states
- int m_icount;
+ int m_icount;
private:
- class pokey_channel
- {
- public:
- pokey_channel();
- pokey_device *m_parent;
- UINT8 m_INTMask;
- UINT8 m_AUDF; /* AUDFx (D200, D202, D204, D206) */
- UINT8 m_AUDC; /* AUDCx (D201, D203, D205, D207) */
- INT32 m_borrow_cnt; /* borrow counter */
- INT32 m_counter; /* channel counter */
- UINT8 m_output; /* channel output signal (1 active, 0 inactive) */
- UINT8 m_filter_sample; /* high-pass filter sample */
- UINT8 m_div2; /* division by 2 */
-
- inline void sample(void) { m_filter_sample = m_output; }
- inline void reset_channel(void) { m_counter = m_AUDF ^ 0xff; }
-
- inline void inc_chan()
- {
- m_counter = (m_counter + 1) & 0xff;
- if (m_counter == 0 && m_borrow_cnt == 0)
- {
- m_borrow_cnt = 3;
- if (m_parent->m_IRQEN & m_INTMask)
- {
- /* Exposed state has changed: This should only be updated after a resync ... */
- m_parent->synchronize(SYNC_SET_IRQST, m_INTMask);
- }
- }
- }
-
- inline int check_borrow()
- {
- if (m_borrow_cnt > 0)
- {
- m_borrow_cnt--;
- return (m_borrow_cnt == 0);
- }
- return 0;
- }
- };
+ class pokey_channel
+ {
+ public:
+ pokey_channel();
+ pokey_device *m_parent;
+ UINT8 m_INTMask;
+ UINT8 m_AUDF; /* AUDFx (D200, D202, D204, D206) */
+ UINT8 m_AUDC; /* AUDCx (D201, D203, D205, D207) */
+ INT32 m_borrow_cnt; /* borrow counter */
+ INT32 m_counter; /* channel counter */
+ UINT8 m_output; /* channel output signal (1 active, 0 inactive) */
+ UINT8 m_filter_sample; /* high-pass filter sample */
+ UINT8 m_div2; /* division by 2 */
+
+ inline void sample(void) { m_filter_sample = m_output; }
+ inline void reset_channel(void) { m_counter = m_AUDF ^ 0xff; }
+
+ inline void inc_chan()
+ {
+ m_counter = (m_counter + 1) & 0xff;
+ if (m_counter == 0 && m_borrow_cnt == 0)
+ {
+ m_borrow_cnt = 3;
+ if (m_parent->m_IRQEN & m_INTMask)
+ {
+ /* Exposed state has changed: This should only be updated after a resync ... */
+ m_parent->synchronize(SYNC_SET_IRQST, m_INTMask);
+ }
+ }
+ }
+
+ inline int check_borrow()
+ {
+ if (m_borrow_cnt > 0)
+ {
+ m_borrow_cnt--;
+ return (m_borrow_cnt == 0);
+ }
+ return 0;
+ }
+ };
static const int POKEY_CHANNELS = 4;
@@ -302,10 +302,10 @@ private:
pokey_channel m_channel[POKEY_CHANNELS];
- UINT32 m_output; /* raw output */
- double m_out_filter; /* filtered output */
+ UINT32 m_output; /* raw output */
+ double m_out_filter; /* filtered output */
- INT32 m_clock_cnt[3]; /* clock counters */
+ INT32 m_clock_cnt[3]; /* clock counters */
UINT32 m_p4; /* poly4 index */
UINT32 m_p5; /* poly5 index */
UINT32 m_p9; /* poly9 index */
@@ -316,16 +316,16 @@ private:
devcb_resolved_read8 m_serin_r;
devcb_resolved_write8 m_serout_w;
- UINT8 m_POTx[8]; /* POTx (R/D200-D207) */
- UINT8 m_AUDCTL; /* AUDCTL (W/D208) */
- UINT8 m_ALLPOT; /* ALLPOT (R/D208) */
- UINT8 m_KBCODE; /* KBCODE (R/D209) */
- UINT8 m_SERIN; /* SERIN (R/D20D) */
- UINT8 m_SEROUT; /* SEROUT (W/D20D) */
- UINT8 m_IRQST; /* IRQST (R/D20E) */
- UINT8 m_IRQEN; /* IRQEN (W/D20E) */
- UINT8 m_SKSTAT; /* SKSTAT (R/D20F) */
- UINT8 m_SKCTL; /* SKCTL (W/D20F) */
+ UINT8 m_POTx[8]; /* POTx (R/D200-D207) */
+ UINT8 m_AUDCTL; /* AUDCTL (W/D208) */
+ UINT8 m_ALLPOT; /* ALLPOT (R/D208) */
+ UINT8 m_KBCODE; /* KBCODE (R/D209) */
+ UINT8 m_SERIN; /* SERIN (R/D20D) */
+ UINT8 m_SEROUT; /* SEROUT (W/D20D) */
+ UINT8 m_IRQST; /* IRQST (R/D20E) */
+ UINT8 m_IRQEN; /* IRQEN (W/D20E) */
+ UINT8 m_SKSTAT; /* SKSTAT (R/D20F) */
+ UINT8 m_SKCTL; /* SKCTL (W/D20F) */
UINT8 m_pot_counter;
UINT8 m_kbd_cnt;
@@ -345,4 +345,4 @@ private:
// device type definition
extern const device_type POKEY;
-#endif /* __POKEY_H__ */
+#endif /* __POKEY_H__ */
diff --git a/src/emu/sound/qs1000.c b/src/emu/sound/qs1000.c
index c2e90028129..218bedc430c 100644
--- a/src/emu/sound/qs1000.c
+++ b/src/emu/sound/qs1000.c
@@ -127,7 +127,7 @@
#include "qs1000.h"
-#define LOGGING_ENABLED 0
+#define LOGGING_ENABLED 0
// device type definition
@@ -184,12 +184,12 @@ ADDRESS_MAP_END
//-------------------------------------------------
qs1000_device::qs1000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, QS1000, "QS1000", "qs1000", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- device_memory_interface(mconfig, *this),
- m_space_config("samples", ENDIANNESS_LITTLE, 8, 24, 0, NULL),
- m_stream(NULL),
- m_direct(NULL),
- m_cpu(*this, "cpu")
+ device_sound_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
+ m_space_config("samples", ENDIANNESS_LITTLE, 8, 24, 0, NULL),
+ m_stream(NULL),
+ m_direct(NULL),
+ m_cpu(*this, "cpu")
{
m_shortname = "qs1000";
m_address_map[0] = *ADDRESS_MAP_NAME(qs1000);
diff --git a/src/emu/sound/qs1000.h b/src/emu/sound/qs1000.h
index 13d1b439bfd..06e41af2305 100644
--- a/src/emu/sound/qs1000.h
+++ b/src/emu/sound/qs1000.h
@@ -31,30 +31,30 @@
// TYPE DEFINITIONS
//**************************************************************************
-#define QS1000_CHANNELS 32
-#define QS1000_ADDRESS_MASK 0xffffff
+#define QS1000_CHANNELS 32
+#define QS1000_ADDRESS_MASK 0xffffff
class qs1000_device;
struct qs1000_interface
{
- bool m_external_rom;
+ bool m_external_rom;
- devcb_read8 m_in_p1_cb;
- devcb_read8 m_in_p2_cb;
- devcb_read8 m_in_p3_cb;
+ devcb_read8 m_in_p1_cb;
+ devcb_read8 m_in_p2_cb;
+ devcb_read8 m_in_p3_cb;
- devcb_write8 m_out_p1_cb;
- devcb_write8 m_out_p2_cb;
- devcb_write8 m_out_p3_cb;
+ devcb_write8 m_out_p1_cb;
+ devcb_write8 m_out_p2_cb;
+ devcb_write8 m_out_p3_cb;
- devcb_write8 m_serial_w;
+ devcb_write8 m_serial_w;
};
// ======================> qs1000_device
-class qs1000_device : public device_t,
+class qs1000_device : public device_t,
public device_sound_interface,
public device_memory_interface,
public qs1000_interface
@@ -109,41 +109,41 @@ public:
void set_voice_regs(int ch);
// Callbacks
- devcb_resolved_read8 m_p1_r_func;
- devcb_resolved_read8 m_p2_r_func;
- devcb_resolved_read8 m_p3_r_func;
- devcb_resolved_write8 m_p1_w_func;
- devcb_resolved_write8 m_p2_w_func;
- devcb_resolved_write8 m_p3_w_func;
+ devcb_resolved_read8 m_p1_r_func;
+ devcb_resolved_read8 m_p2_r_func;
+ devcb_resolved_read8 m_p3_r_func;
+ devcb_resolved_write8 m_p1_w_func;
+ devcb_resolved_write8 m_p2_w_func;
+ devcb_resolved_write8 m_p3_w_func;
// Internal state
- const address_space_config m_space_config;
- sound_stream * m_stream;
- direct_read_data * m_direct;
- required_device<i8052_device> m_cpu;
+ const address_space_config m_space_config;
+ sound_stream * m_stream;
+ direct_read_data * m_direct;
+ required_device<i8052_device> m_cpu;
// Wavetable engine
- UINT8 m_serial_data_in;
- UINT8 m_wave_regs[18];
+ UINT8 m_serial_data_in;
+ UINT8 m_wave_regs[18];
struct qs1000_channel
{
- UINT32 m_acc;
- INT32 m_adpcm_signal;
- UINT32 m_start;
- UINT32 m_addr;
- UINT32 m_adpcm_addr;
- UINT32 m_loop_start;
- UINT32 m_loop_end;
- UINT16 m_freq;
- UINT16 m_flags;
-
- UINT8 m_regs[16]; // FIXME
-
- oki_adpcm_state m_adpcm;
+ UINT32 m_acc;
+ INT32 m_adpcm_signal;
+ UINT32 m_start;
+ UINT32 m_addr;
+ UINT32 m_adpcm_addr;
+ UINT32 m_loop_start;
+ UINT32 m_loop_end;
+ UINT16 m_freq;
+ UINT16 m_flags;
+
+ UINT8 m_regs[16]; // FIXME
+
+ oki_adpcm_state m_adpcm;
};
- qs1000_channel m_channels[QS1000_CHANNELS];
+ qs1000_channel m_channels[QS1000_CHANNELS];
};
diff --git a/src/emu/sound/qsound.c b/src/emu/sound/qsound.c
index 3d395879235..ad224cade2c 100644
--- a/src/emu/sound/qsound.c
+++ b/src/emu/sound/qsound.c
@@ -54,14 +54,14 @@ const device_type QSOUND = &device_creator<qsound_device>;
qsound_device::qsound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, QSOUND, "Q-Sound", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_data(0),
- m_stream(NULL),
- m_sample_rom_length(0),
- m_sample_rom(NULL),
- m_frq_ratio(0.0f),
- m_fpRawDataL(NULL),
- m_fpRawDataR(NULL)
+ device_sound_interface(mconfig, *this),
+ m_data(0),
+ m_stream(NULL),
+ m_sample_rom_length(0),
+ m_sample_rom(NULL),
+ m_frq_ratio(0.0f),
+ m_fpRawDataL(NULL),
+ m_fpRawDataR(NULL)
{
}
@@ -264,7 +264,7 @@ void qsound_device::qsound_set_command(int data, int value)
switch (reg)
{
case 0: /* Bank */
- ch=(ch+1)&0x0f; /* strange ... */
+ ch=(ch+1)&0x0f; /* strange ... */
m_channel[ch].bank=(value&0x7f)<<16;
#ifdef MAME_DEBUG
if (!(value & 0x8000))
@@ -320,17 +320,17 @@ void qsound_device::qsound_set_command(int data, int value)
break;
case 8:
{
- int pandata=(value-0x10)&0x3f;
- if (pandata > 32)
- {
+ int pandata=(value-0x10)&0x3f;
+ if (pandata > 32)
+ {
pandata=32;
- }
- m_channel[ch].rvol=m_pan_table[pandata];
- m_channel[ch].lvol=m_pan_table[32-pandata];
- m_channel[ch].pan = value;
+ }
+ m_channel[ch].rvol=m_pan_table[pandata];
+ m_channel[ch].lvol=m_pan_table[32-pandata];
+ m_channel[ch].pan = value;
}
break;
- case 9:
+ case 9:
m_channel[ch].reg9=value;
/*
#ifdef MAME_DEBUG
diff --git a/src/emu/sound/qsound.h b/src/emu/sound/qsound.h
index 5a6f78b28ca..bfd7abfe344 100644
--- a/src/emu/sound/qsound.h
+++ b/src/emu/sound/qsound.h
@@ -11,7 +11,7 @@
#define QSOUND_CLOCK 4000000 /* default 4MHz clock */
-#define QSOUND_CLOCKDIV 166 /* Clock divider */
+#define QSOUND_CLOCKDIV 166 /* Clock divider */
#define QSOUND_CHANNELS 16
typedef INT8 QSOUND_SRC_SAMPLE; /* 8 bit source ROM samples */
typedef stream_sample_t QSOUND_SAMPLE;
@@ -35,20 +35,20 @@ typedef stream_sample_t QSOUND_SAMPLE;
struct QSOUND_CHANNEL
{
- INT32 bank; // bank (x16)
- INT32 address; // start address
- INT32 pitch; // pitch
- INT32 reg3; // unknown (always 0x8000)
- INT32 loop; // loop address
- INT32 end; // end address
- INT32 vol; // master volume
- INT32 pan; // Pan value
- INT32 reg9; // unknown
+ INT32 bank; // bank (x16)
+ INT32 address; // start address
+ INT32 pitch; // pitch
+ INT32 reg3; // unknown (always 0x8000)
+ INT32 loop; // loop address
+ INT32 end; // end address
+ INT32 vol; // master volume
+ INT32 pan; // Pan value
+ INT32 reg9; // unknown
/* Work variables */
- INT32 key; // Key on / key off
- INT32 lvol; // left volume
- INT32 rvol; // right volume
+ INT32 key; // Key on / key off
+ INT32 lvol; // left volume
+ INT32 rvol; // right volume
INT32 lastdt; // last sample value
INT32 offset; // current offset counter
};
@@ -57,7 +57,7 @@ struct QSOUND_CHANNEL
// ======================> qsound_device
class qsound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
qsound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -79,14 +79,14 @@ private:
void qsound_set_command(int data, int value);
private:
- int m_data; // register latch data
- sound_stream *m_stream; // Audio stream
+ int m_data; // register latch data
+ sound_stream *m_stream; // Audio stream
QSOUND_CHANNEL m_channel[QSOUND_CHANNELS];
UINT32 m_sample_rom_length;
- QSOUND_SRC_SAMPLE *m_sample_rom; // Q sound sample ROM
+ QSOUND_SRC_SAMPLE *m_sample_rom; // Q sound sample ROM
- int m_pan_table[33]; // Pan volume table
- float m_frq_ratio; // Frequency ratio
+ int m_pan_table[33]; // Pan volume table
+ float m_frq_ratio; // Frequency ratio
FILE *m_fpRawDataL;
FILE *m_fpRawDataR;
diff --git a/src/emu/sound/rf5c400.c b/src/emu/sound/rf5c400.c
index 4543ea03b01..5188c56aedf 100644
--- a/src/emu/sound/rf5c400.c
+++ b/src/emu/sound/rf5c400.c
@@ -20,21 +20,21 @@
struct rf5c400_channel
{
- UINT16 startH;
- UINT16 startL;
- UINT16 freq;
- UINT16 endL;
- UINT16 endHloopH;
- UINT16 loopL;
- UINT16 pan;
- UINT16 effect;
- UINT16 volume;
-
- UINT16 attack;
- UINT16 decay;
- UINT16 release;
-
- UINT16 cutoff;
+ UINT16 startH;
+ UINT16 startL;
+ UINT16 freq;
+ UINT16 endL;
+ UINT16 endHloopH;
+ UINT16 loopL;
+ UINT16 pan;
+ UINT16 effect;
+ UINT16 volume;
+
+ UINT16 attack;
+ UINT16 decay;
+ UINT16 release;
+
+ UINT16 cutoff;
UINT64 pos;
UINT64 step;
@@ -64,27 +64,27 @@ static int volume_table[256];
static double pan_table[0x64];
/* envelope parameter (experimental) */
-#define ENV_AR_SPEED 0.1
-#define ENV_MIN_AR 0x02
-#define ENV_MAX_AR 0x80
-#define ENV_DR_SPEED 2.0
-#define ENV_MIN_DR 0x20
-#define ENV_MAX_DR 0x73
-#define ENV_RR_SPEED 0.7
-#define ENV_MIN_RR 0x20
-#define ENV_MAX_RR 0x54
+#define ENV_AR_SPEED 0.1
+#define ENV_MIN_AR 0x02
+#define ENV_MAX_AR 0x80
+#define ENV_DR_SPEED 2.0
+#define ENV_MIN_DR 0x20
+#define ENV_MAX_DR 0x73
+#define ENV_RR_SPEED 0.7
+#define ENV_MIN_RR 0x20
+#define ENV_MAX_RR 0x54
/* PCM type */
enum {
- TYPE_MASK = 0x00C0,
- TYPE_16 = 0x0000,
- TYPE_8LOW = 0x0040,
- TYPE_8HIGH = 0x0080,
+ TYPE_MASK = 0x00C0,
+ TYPE_16 = 0x0000,
+ TYPE_8LOW = 0x0040,
+ TYPE_8HIGH = 0x0080,
};
/* envelope phase */
enum {
- PHASE_NONE = 0,
+ PHASE_NONE = 0,
PHASE_ATTACK,
PHASE_DECAY,
PHASE_RELEASE,
@@ -389,7 +389,7 @@ WRITE16_DEVICE_HANDLER( rf5c400_w )
break;
}
- case 0x01: // channel control
+ case 0x01: // channel control
{
int ch = data & 0x1f;
switch ( data & 0x60 )
@@ -428,21 +428,21 @@ WRITE16_DEVICE_HANDLER( rf5c400_w )
break;
}
- case 0x08: // relative to env attack (channel no)
- case 0x09: // relative to env attack (0x0c00/ 0x1c00)
+ case 0x08: // relative to env attack (channel no)
+ case 0x09: // relative to env attack (0x0c00/ 0x1c00)
- case 0x21: // reverb(character).w
- case 0x32: // reverb(pre-lpf).w
- case 0x2B: // reverb(level).w
- case 0x20: // ???.b : reverb(time).b
+ case 0x21: // reverb(character).w
+ case 0x32: // reverb(pre-lpf).w
+ case 0x2B: // reverb(level).w
+ case 0x20: // ???.b : reverb(time).b
- case 0x2C: // chorus(level).w
- case 0x30: // chorus(rate).w
- case 0x22: // chorus(macro).w
- case 0x23: // chorus(depth).w
- case 0x24: // chorus(macro).w
- case 0x2F: // chorus(depth).w
- case 0x27: // chorus(send level to reverb).w
+ case 0x2C: // chorus(level).w
+ case 0x30: // chorus(rate).w
+ case 0x22: // chorus(macro).w
+ case 0x23: // chorus(depth).w
+ case 0x24: // chorus(macro).w
+ case 0x2F: // chorus(depth).w
+ case 0x27: // chorus(send level to reverb).w
default:
{
@@ -462,54 +462,54 @@ WRITE16_DEVICE_HANDLER( rf5c400_w )
switch (reg)
{
- case 0x00: // sample start address, bits 23 - 16
+ case 0x00: // sample start address, bits 23 - 16
{
channel->startH = data;
break;
}
- case 0x01: // sample start address, bits 15 - 0
+ case 0x01: // sample start address, bits 15 - 0
{
channel->startL = data;
break;
}
- case 0x02: // sample playing frequency
+ case 0x02: // sample playing frequency
{
channel->step = ((data & 0x1fff) << (data >> 13)) * 4;
channel->freq = data;
break;
}
- case 0x03: // sample end address, bits 15 - 0
+ case 0x03: // sample end address, bits 15 - 0
{
channel->endL = data;
break;
}
- case 0x04: // sample end address, bits 23 - 16 , sample loop 23 - 16
+ case 0x04: // sample end address, bits 23 - 16 , sample loop 23 - 16
{
channel->endHloopH = data;
break;
}
- case 0x05: // sample loop offset, bits 15 - 0
+ case 0x05: // sample loop offset, bits 15 - 0
{
channel->loopL = data;
break;
}
- case 0x06: // channel volume
+ case 0x06: // channel volume
{
channel->pan = data;
break;
}
- case 0x07: // effect depth
+ case 0x07: // effect depth
{
// 0xCCRR: CC = chorus send depth, RR = reverb send depth
channel->effect = data;
break;
}
- case 0x08: // volume, flag
+ case 0x08: // volume, flag
{
channel->volume = data;
break;
}
- case 0x09: // env attack
+ case 0x09: // env attack
{
// 0x0100: max speed (in case of attack <= 0x40)
// 0xXX40: XX = attack-0x3f (encoded) (in case of attack > 0x40)
@@ -517,35 +517,35 @@ WRITE16_DEVICE_HANDLER( rf5c400_w )
channel->attack = data;
break;
}
- case 0x0A: // relative to env attack ?
+ case 0x0A: // relative to env attack ?
{
// always 0x0100
break;
}
- case 0x0B: // relative to env decay ?
+ case 0x0B: // relative to env decay ?
{
// always 0x0100
break;
}
- case 0x0C: // env decay
+ case 0x0C: // env decay
{
// 0xXX70: XX = decay (encoded) (in case of decay > 0x71)
// 0xXX80: XX = decay (encoded) (in case of decay <= 0x71)
channel->decay = data;
break;
}
- case 0x0D: // relative to env release ?
+ case 0x0D: // relative to env release ?
{
// always 0x0100
break;
}
- case 0x0E: // env release
+ case 0x0E: // env release
{
// 0xXX70: XX = release-0x1f (encoded) (0x01 if release <= 0x20)
channel->release = data;
break;
}
- case 0x10: // resonance, cutoff freq.
+ case 0x10: // resonance, cutoff freq.
{
// bit 15-12: resonance
// bit 11-0 : cutoff frequency
@@ -560,7 +560,7 @@ const device_type RF5C400 = &device_creator<rf5c400_device>;
rf5c400_device::rf5c400_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, RF5C400, "RF5C400", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(rf5c400_state);
}
@@ -593,5 +593,3 @@ void rf5c400_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/rf5c400.h b/src/emu/sound/rf5c400.h
index 16bd3455d86..1c60ee267a2 100644
--- a/src/emu/sound/rf5c400.h
+++ b/src/emu/sound/rf5c400.h
@@ -11,7 +11,7 @@ DECLARE_READ16_DEVICE_HANDLER( rf5c400_r );
DECLARE_WRITE16_DEVICE_HANDLER( rf5c400_w );
class rf5c400_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
rf5c400_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/rf5c68.c b/src/emu/sound/rf5c68.c
index f01591e7ad7..76570cfcdba 100644
--- a/src/emu/sound/rf5c68.c
+++ b/src/emu/sound/rf5c68.c
@@ -11,25 +11,25 @@
struct pcm_channel
{
- UINT8 enable;
- UINT8 env;
- UINT8 pan;
- UINT8 start;
- UINT32 addr;
- UINT16 step;
- UINT16 loopst;
+ UINT8 enable;
+ UINT8 env;
+ UINT8 pan;
+ UINT8 start;
+ UINT32 addr;
+ UINT16 step;
+ UINT16 loopst;
};
struct rf5c68_state
{
- sound_stream * stream;
- pcm_channel chan[NUM_CHANNELS];
- UINT8 cbank;
- UINT8 wbank;
- UINT8 enable;
- UINT8 data[0x10000];
- void (*sample_callback)(device_t* device,int channel);
+ sound_stream * stream;
+ pcm_channel chan[NUM_CHANNELS];
+ UINT8 cbank;
+ UINT8 wbank;
+ UINT8 enable;
+ UINT8 data[0x10000];
+ void (*sample_callback)(device_t* device,int channel);
device_t* device;
};
@@ -185,37 +185,37 @@ WRITE8_DEVICE_HANDLER( rf5c68_w )
/* switch off the address */
switch (offset)
{
- case 0x00: /* envelope */
+ case 0x00: /* envelope */
chan->env = data;
break;
- case 0x01: /* pan */
+ case 0x01: /* pan */
chan->pan = data;
break;
- case 0x02: /* FDL */
+ case 0x02: /* FDL */
chan->step = (chan->step & 0xff00) | (data & 0x00ff);
break;
- case 0x03: /* FDH */
+ case 0x03: /* FDH */
chan->step = (chan->step & 0x00ff) | ((data << 8) & 0xff00);
break;
- case 0x04: /* LSL */
+ case 0x04: /* LSL */
chan->loopst = (chan->loopst & 0xff00) | (data & 0x00ff);
break;
- case 0x05: /* LSH */
+ case 0x05: /* LSH */
chan->loopst = (chan->loopst & 0x00ff) | ((data << 8) & 0xff00);
break;
- case 0x06: /* ST */
+ case 0x06: /* ST */
chan->start = data;
if (!chan->enable)
chan->addr = chan->start << (8 + 11);
break;
- case 0x07: /* control reg */
+ case 0x07: /* control reg */
chip->enable = (data >> 7) & 1;
if (data & 0x40)
chip->cbank = data & 7;
@@ -223,7 +223,7 @@ WRITE8_DEVICE_HANDLER( rf5c68_w )
chip->wbank = data & 15;
break;
- case 0x08: /* channel on/off reg */
+ case 0x08: /* channel on/off reg */
for (i = 0; i < 8; i++)
{
chip->chan[i].enable = (~data >> i) & 1;
@@ -260,7 +260,7 @@ const device_type RF5C68 = &device_creator<rf5c68_device>;
rf5c68_device::rf5c68_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, RF5C68, "RF5C68", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(rf5c68_state);
}
@@ -293,5 +293,3 @@ void rf5c68_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/rf5c68.h b/src/emu/sound/rf5c68.h
index 1b8c4996882..bbfd43f7f91 100644
--- a/src/emu/sound/rf5c68.h
+++ b/src/emu/sound/rf5c68.h
@@ -22,7 +22,7 @@ struct rf5c68_interface
};
class rf5c68_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
rf5c68_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/s14001a.c b/src/emu/sound/s14001a.c
index 31f7bb3e1b9..9164b7ddbb4 100644
--- a/src/emu/sound/s14001a.c
+++ b/src/emu/sound/s14001a.c
@@ -296,7 +296,7 @@ static const INT8 DeltaTable[4][4] =
static INT16 audiofilter(S14001AChip *chip) /* rewrite me to better match the real filter! */
{
UINT8 temp1;
- INT16 temp2 = 0;
+ INT16 temp2 = 0;
/* mean averaging filter! 1/n exponential *would* be somewhat better, but I'm lazy... */
for (temp1 = 0; temp1 < 8; temp1++) { temp2 += chip->filtervals[temp1]; }
temp2 >>= 3;
@@ -408,8 +408,8 @@ static void s14001a_clock(S14001AChip *chip) /* called once per clock */
UINT8 CurDelta; // Current delta
/* on even clocks, audio output is floating, /romen is low so rom data bus is driven
- * on odd clocks, audio output is driven, /romen is high, state machine 2 is clocked
- */
+ * on odd clocks, audio output is driven, /romen is high, state machine 2 is clocked
+ */
chip->oddeven = !(chip->oddeven); // invert the clock
if (chip->oddeven == 0) // even clock
{
@@ -537,8 +537,8 @@ static void s14001a_clock(S14001AChip *chip) /* called once per clock */
chip->laststate = chip->machineState;
chip->machineState = chip->nextstate;
- /* the dac is 4 bits wide. if a delta step forced it outside of 4 bits, mask it back over here */
- chip->DACOutput &= 0xF;
+ /* the dac is 4 bits wide. if a delta step forced it outside of 4 bits, mask it back over here */
+ chip->DACOutput &= 0xF;
}
}
@@ -633,7 +633,7 @@ const device_type S14001A = &device_creator<s14001a_device>;
s14001a_device::s14001a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, S14001A, "S14001A", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(S14001AChip);
}
@@ -666,5 +666,3 @@ void s14001a_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/s14001a.h b/src/emu/sound/s14001a.h
index 70fcb5c2d11..bcb1670c5d3 100644
--- a/src/emu/sound/s14001a.h
+++ b/src/emu/sound/s14001a.h
@@ -5,14 +5,14 @@
#include "devlegcy.h"
-int s14001a_bsy_r(device_t *device); /* read BUSY pin */
-void s14001a_reg_w(device_t *device, int data); /* write to input latch */
-void s14001a_rst_w(device_t *device, int data); /* write to RESET pin */
+int s14001a_bsy_r(device_t *device); /* read BUSY pin */
+void s14001a_reg_w(device_t *device, int data); /* write to input latch */
+void s14001a_rst_w(device_t *device, int data); /* write to RESET pin */
void s14001a_set_clock(device_t *device, int clock); /* set VSU-1000 clock */
void s14001a_set_volume(device_t *device, int volume); /* set VSU-1000 volume control */
class s14001a_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
s14001a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -36,4 +36,3 @@ extern const device_type S14001A;
#endif /* __S14001A_H__ */
-
diff --git a/src/emu/sound/s2636.c b/src/emu/sound/s2636.c
index 81ab168fad8..3a8f882e401 100644
--- a/src/emu/sound/s2636.c
+++ b/src/emu/sound/s2636.c
@@ -10,10 +10,10 @@
struct s2636_sound
{
- sound_stream *channel;
- UINT8 reg[1];
- int size, pos;
- unsigned level;
+ sound_stream *channel;
+ UINT8 reg[1];
+ int size, pos;
+ unsigned level;
};
@@ -78,14 +78,14 @@ static DEVICE_START(s2636_sound)
{
s2636_sound *token = get_token(device);
memset(token, 0, sizeof(*token));
- token->channel = device->machine().sound().stream_alloc(*device, 0, 1, device->machine().sample_rate(), 0, s2636_update);
+ token->channel = device->machine().sound().stream_alloc(*device, 0, 1, device->machine().sample_rate(), 0, s2636_update);
}
const device_type S2636_SOUND = &device_creator<s2636_sound_device>;
s2636_sound_device::s2636_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, S2636_SOUND, "S2636", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(s2636_sound);
}
@@ -118,5 +118,3 @@ void s2636_sound_device::sound_stream_update(sound_stream &stream, stream_sample
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/s2636.h b/src/emu/sound/s2636.h
index 3889e3c6cb6..30b3292e740 100644
--- a/src/emu/sound/s2636.h
+++ b/src/emu/sound/s2636.h
@@ -10,7 +10,7 @@
class s2636_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
s2636_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/saa1099.c b/src/emu/sound/saa1099.c
index 52771ee267b..9297a537739 100644
--- a/src/emu/sound/saa1099.c
+++ b/src/emu/sound/saa1099.c
@@ -67,18 +67,18 @@
#include "saa1099.h"
-#define LEFT 0x00
-#define RIGHT 0x01
+#define LEFT 0x00
+#define RIGHT 0x01
/* this structure defines a channel */
struct saa1099_channel
{
- int frequency; /* frequency (0x00..0xff) */
- int freq_enable; /* frequency enable */
- int noise_enable; /* noise enable */
- int octave; /* octave (0x00..0x07) */
- int amplitude[2]; /* amplitude (0x00..0x0f) */
- int envelope[2]; /* envelope (0x00..0x0f or 0x10 == off) */
+ int frequency; /* frequency (0x00..0xff) */
+ int freq_enable; /* frequency enable */
+ int noise_enable; /* noise enable */
+ int octave; /* octave (0x00..0x07) */
+ int amplitude[2]; /* amplitude (0x00..0x0f) */
+ int envelope[2]; /* envelope (0x00..0x0f or 0x10 == off) */
/* vars to simulate the square wave */
double counter;
@@ -92,77 +92,77 @@ struct saa1099_noise
/* vars to simulate the noise generator output */
double counter;
double freq;
- int level; /* noise polynomal shifter */
+ int level; /* noise polynomal shifter */
};
/* this structure defines a SAA1099 chip */
struct saa1099_state
{
device_t *device;
- sound_stream * stream; /* our stream */
- int noise_params[2]; /* noise generators parameters */
- int env_enable[2]; /* envelope generators enable */
- int env_reverse_right[2]; /* envelope reversed for right channel */
- int env_mode[2]; /* envelope generators mode */
- int env_bits[2]; /* non zero = 3 bits resolution */
- int env_clock[2]; /* envelope clock mode (non-zero external) */
+ sound_stream * stream; /* our stream */
+ int noise_params[2]; /* noise generators parameters */
+ int env_enable[2]; /* envelope generators enable */
+ int env_reverse_right[2]; /* envelope reversed for right channel */
+ int env_mode[2]; /* envelope generators mode */
+ int env_bits[2]; /* non zero = 3 bits resolution */
+ int env_clock[2]; /* envelope clock mode (non-zero external) */
int env_step[2]; /* current envelope step */
- int all_ch_enable; /* all channels enable */
- int sync_state; /* sync all channels */
- int selected_reg; /* selected register */
+ int all_ch_enable; /* all channels enable */
+ int sync_state; /* sync all channels */
+ int selected_reg; /* selected register */
struct saa1099_channel channels[6]; /* channels */
- struct saa1099_noise noise[2]; /* noise generators */
+ struct saa1099_noise noise[2]; /* noise generators */
double sample_rate;
};
static const int amplitude_lookup[16] = {
- 0*32767/16, 1*32767/16, 2*32767/16, 3*32767/16,
- 4*32767/16, 5*32767/16, 6*32767/16, 7*32767/16,
- 8*32767/16, 9*32767/16, 10*32767/16, 11*32767/16,
+ 0*32767/16, 1*32767/16, 2*32767/16, 3*32767/16,
+ 4*32767/16, 5*32767/16, 6*32767/16, 7*32767/16,
+ 8*32767/16, 9*32767/16, 10*32767/16, 11*32767/16,
12*32767/16, 13*32767/16, 14*32767/16, 15*32767/16
};
static const UINT8 envelope[8][64] = {
/* zero amplitude */
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* maximum amplitude */
- {15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
- 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
- 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
- 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15, },
+ {15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
+ 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
+ 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,
+ 15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15, },
/* single decay */
{15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* repetitive decay */
{15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
- 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
- 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
- 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 },
+ 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
+ 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
+ 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 },
/* single triangular */
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
- 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* repetitive triangular */
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
- 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
- 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 },
+ 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
+ 15,14,13,12,11,10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 },
/* single attack */
- { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
/* repetitive attack */
- { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 }
+ { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 }
};
@@ -179,16 +179,16 @@ static void saa1099_envelope(saa1099_state *saa, int ch)
if (saa->env_enable[ch])
{
int step, mode, mask;
- mode = saa->env_mode[ch];
+ mode = saa->env_mode[ch];
/* step from 0..63 and then loop in steps 32..63 */
step = saa->env_step[ch] =
((saa->env_step[ch] + 1) & 0x3f) | (saa->env_step[ch] & 0x20);
mask = 15;
- if (saa->env_bits[ch])
- mask &= ~1; /* 3 bit resolution, mask LSB */
+ if (saa->env_bits[ch])
+ mask &= ~1; /* 3 bit resolution, mask LSB */
- saa->channels[ch*3+0].envelope[ LEFT] =
+ saa->channels[ch*3+0].envelope[ LEFT] =
saa->channels[ch*3+1].envelope[ LEFT] =
saa->channels[ch*3+2].envelope[ LEFT] = envelope[mode][step] & mask;
if (saa->env_reverse_right[ch] & 0x01)
@@ -202,7 +202,7 @@ static void saa1099_envelope(saa1099_state *saa, int ch)
saa->channels[ch*3+0].envelope[RIGHT] =
saa->channels[ch*3+1].envelope[RIGHT] =
saa->channels[ch*3+2].envelope[RIGHT] = envelope[mode][step] & mask;
- }
+ }
}
else
{
@@ -213,14 +213,14 @@ static void saa1099_envelope(saa1099_state *saa, int ch)
saa->channels[ch*3+0].envelope[RIGHT] =
saa->channels[ch*3+1].envelope[RIGHT] =
saa->channels[ch*3+2].envelope[RIGHT] = 16;
- }
+ }
}
static STREAM_UPDATE( saa1099_update )
{
saa1099_state *saa = (saa1099_state *)param;
- int j, ch;
+ int j, ch;
/* if the channels are disabled we're done */
if (!saa->all_ch_enable)
@@ -228,11 +228,11 @@ static STREAM_UPDATE( saa1099_update )
/* init output data */
memset(outputs[LEFT],0,samples*sizeof(*outputs[LEFT]));
memset(outputs[RIGHT],0,samples*sizeof(*outputs[RIGHT]));
- return;
+ return;
}
- for (ch = 0; ch < 2; ch++)
- {
+ for (ch = 0; ch < 2; ch++)
+ {
switch (saa->noise_params[ch])
{
case 0: saa->noise[ch].freq = 31250.0 * 2; break;
@@ -242,7 +242,7 @@ static STREAM_UPDATE( saa1099_update )
}
}
- /* fill all data needed */
+ /* fill all data needed */
for( j = 0; j < samples; j++ )
{
int output_l = 0, output_r = 0;
@@ -250,12 +250,12 @@ static STREAM_UPDATE( saa1099_update )
/* for each channel */
for (ch = 0; ch < 6; ch++)
{
- if (saa->channels[ch].freq == 0.0)
- saa->channels[ch].freq = (double)((2 * 15625) << saa->channels[ch].octave) /
- (511.0 - (double)saa->channels[ch].frequency);
+ if (saa->channels[ch].freq == 0.0)
+ saa->channels[ch].freq = (double)((2 * 15625) << saa->channels[ch].octave) /
+ (511.0 - (double)saa->channels[ch].frequency);
- /* check the actual position in the square wave */
- saa->channels[ch].counter -= saa->channels[ch].freq;
+ /* check the actual position in the square wave */
+ saa->channels[ch].counter -= saa->channels[ch].freq;
while (saa->channels[ch].counter < 0)
{
/* calculate new frequency now after the half wave is updated */
@@ -309,7 +309,7 @@ static STREAM_UPDATE( saa1099_update )
saa->noise[ch].level <<= 1;
}
}
- /* write sound data to the buffer */
+ /* write sound data to the buffer */
outputs[LEFT][j] = output_l / 6;
outputs[RIGHT][j] = output_r / 6;
}
@@ -336,18 +336,18 @@ WRITE8_DEVICE_HANDLER( saa1099_control_w )
if ((data & 0xff) > 0x1c)
{
/* Error! */
- logerror("%s: (SAA1099 '%s') Unknown register selected\n",device->machine().describe_context(), device->tag());
+ logerror("%s: (SAA1099 '%s') Unknown register selected\n",device->machine().describe_context(), device->tag());
}
saa->selected_reg = data & 0x1f;
if (saa->selected_reg == 0x18 || saa->selected_reg == 0x19)
{
/* clock the envelope channels */
- if (saa->env_clock[0])
+ if (saa->env_clock[0])
saa1099_envelope(saa,0);
if (saa->env_clock[1])
saa1099_envelope(saa,1);
- }
+ }
}
@@ -363,18 +363,18 @@ WRITE8_DEVICE_HANDLER( saa1099_data_w )
switch (reg)
{
/* channel i amplitude */
- case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
ch = reg & 7;
saa->channels[ch].amplitude[LEFT] = amplitude_lookup[data & 0x0f];
saa->channels[ch].amplitude[RIGHT] = amplitude_lookup[(data >> 4) & 0x0f];
break;
/* channel i frequency */
- case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d:
+ case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d:
ch = reg & 7;
saa->channels[ch].frequency = data & 0xff;
break;
/* channel i octave */
- case 0x10: case 0x11: case 0x12:
+ case 0x10: case 0x11: case 0x12:
ch = (reg - 0x10) << 1;
saa->channels[ch + 0].octave = data & 0x07;
saa->channels[ch + 1].octave = (data >> 4) & 0x07;
@@ -403,7 +403,7 @@ WRITE8_DEVICE_HANDLER( saa1099_data_w )
saa->noise_params[1] = (data >> 4) & 0x03;
break;
/* envelope generators parameters */
- case 0x18: case 0x19:
+ case 0x18: case 0x19:
ch = reg - 0x18;
saa->env_reverse_right[ch] = data & 0x01;
saa->env_mode[ch] = (data >> 1) & 0x07;
@@ -425,12 +425,12 @@ WRITE8_DEVICE_HANDLER( saa1099_data_w )
logerror("%s: (SAA1099 '%s') -reg 0x1c- Chip reset\n",device->machine().describe_context(), device->tag());
for (i = 0; i < 6; i++)
{
- saa->channels[i].level = 0;
+ saa->channels[i].level = 0;
saa->channels[i].counter = 0.0;
}
}
break;
- default: /* Error! */
+ default: /* Error! */
logerror("%s: (SAA1099 '%s') Unknown operation (reg:%02x, data:%02x)\n",device->machine().describe_context(), device->tag(), reg, data);
}
}
@@ -439,7 +439,7 @@ const device_type SAA1099 = &device_creator<saa1099_device>;
saa1099_device::saa1099_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SAA1099, "SAA1099", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(saa1099_state);
}
@@ -472,5 +472,3 @@ void saa1099_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/saa1099.h b/src/emu/sound/saa1099.h
index ccbb1c75f3f..7e2f6ed6a1d 100644
--- a/src/emu/sound/saa1099.h
+++ b/src/emu/sound/saa1099.h
@@ -13,7 +13,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( saa1099_control_w );
DECLARE_WRITE8_DEVICE_HANDLER( saa1099_data_w );
class saa1099_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
saa1099_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/samples.c b/src/emu/sound/samples.c
index ed57e4327fe..f933b3c6d44 100644
--- a/src/emu/sound/samples.c
+++ b/src/emu/sound/samples.c
@@ -76,13 +76,13 @@ const device_type SAMPLES = &device_creator<samples_device>;
samples_device::samples_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SAMPLES, "Samples", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
samples_device::samples_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -114,11 +114,11 @@ void samples_device::start(UINT8 channel, UINT32 samplenum, bool loop)
if (m_sample.count() == 0)
return;
- assert(samplenum < m_sample.count());
- assert(channel < m_channels);
+ assert(samplenum < m_sample.count());
+ assert(channel < m_channels);
// force an update before we start
- channel_t &chan = m_channel[channel];
+ channel_t &chan = m_channel[channel];
chan.stream->update();
// update the parameters
@@ -141,10 +141,10 @@ void samples_device::start(UINT8 channel, UINT32 samplenum, bool loop)
void samples_device::start_raw(UINT8 channel, const INT16 *sampledata, UINT32 samples, UINT32 frequency, bool loop)
{
- assert(channel < m_channels);
+ assert(channel < m_channels);
// force an update before we start
- channel_t &chan = m_channel[channel];
+ channel_t &chan = m_channel[channel];
chan.stream->update();
// update the parameters
@@ -166,10 +166,10 @@ void samples_device::start_raw(UINT8 channel, const INT16 *sampledata, UINT32 sa
void samples_device::set_frequency(UINT8 channel, UINT32 freq)
{
- assert(channel < m_channels);
+ assert(channel < m_channels);
// force an update before we start
- channel_t &chan = m_channel[channel];
+ channel_t &chan = m_channel[channel];
chan.stream->update();
chan.step = (INT64(freq) << FRAC_BITS) / machine().sample_rate();
}
@@ -182,10 +182,10 @@ void samples_device::set_frequency(UINT8 channel, UINT32 freq)
void samples_device::set_volume(UINT8 channel, float volume)
{
- assert(channel < m_channels);
+ assert(channel < m_channels);
// force an update before we start
- channel_t &chan = m_channel[channel];
+ channel_t &chan = m_channel[channel];
chan.stream->set_output_gain(0, volume);
}
@@ -196,10 +196,10 @@ void samples_device::set_volume(UINT8 channel, float volume)
void samples_device::pause(UINT8 channel, bool pause)
{
- assert(channel < m_channels);
+ assert(channel < m_channels);
// force an update before we start
- channel_t &chan = m_channel[channel];
+ channel_t &chan = m_channel[channel];
chan.paused = pause;
}
@@ -210,12 +210,12 @@ void samples_device::pause(UINT8 channel, bool pause)
void samples_device::stop(UINT8 channel)
{
- assert(channel < m_channels);
+ assert(channel < m_channels);
// force an update before we start
- channel_t &chan = m_channel[channel];
- chan.source = NULL;
- chan.source_num = -1;
+ channel_t &chan = m_channel[channel];
+ chan.source = NULL;
+ chan.source_num = -1;
}
@@ -238,10 +238,10 @@ void samples_device::stop_all()
UINT32 samples_device::base_frequency(UINT8 channel) const
{
- assert(channel < m_channels);
+ assert(channel < m_channels);
// force an update before we start
- const channel_t &chan = m_channel[channel];
+ const channel_t &chan = m_channel[channel];
chan.stream->update();
return chan.basefreq;
}
@@ -254,10 +254,10 @@ UINT32 samples_device::base_frequency(UINT8 channel) const
bool samples_device::playing(UINT8 channel) const
{
- assert(channel < m_channels);
+ assert(channel < m_channels);
// force an update before we start
- const channel_t &chan = m_channel[channel];
+ const channel_t &chan = m_channel[channel];
chan.stream->update();
return (chan.source != NULL);
}
@@ -283,7 +283,7 @@ void samples_device::device_start()
{
// initialize channel
channel_t &chan = m_channel[channel];
- chan.stream = stream_alloc(0, 1, machine().sample_rate());
+ chan.stream = stream_alloc(0, 1, machine().sample_rate());
chan.source = NULL;
chan.source_num = -1;
chan.step = 0;
@@ -291,13 +291,13 @@ void samples_device::device_start()
chan.paused = 0;
// register with the save state system
- save_item(NAME(chan.source_length), channel);
- save_item(NAME(chan.source_num), channel);
- save_item(NAME(chan.pos), channel);
- save_item(NAME(chan.frac), channel);
- save_item(NAME(chan.step), channel);
- save_item(NAME(chan.loop), channel);
- save_item(NAME(chan.paused), channel);
+ save_item(NAME(chan.source_length), channel);
+ save_item(NAME(chan.source_num), channel);
+ save_item(NAME(chan.pos), channel);
+ save_item(NAME(chan.frac), channel);
+ save_item(NAME(chan.step), channel);
+ save_item(NAME(chan.loop), channel);
+ save_item(NAME(chan.paused), channel);
}
// initialize any custom handlers
diff --git a/src/emu/sound/samples.h b/src/emu/sound/samples.h
index 5824299963f..94055d46316 100644
--- a/src/emu/sound/samples.h
+++ b/src/emu/sound/samples.h
@@ -71,15 +71,15 @@ class samples_device;
struct samples_interface
{
- UINT8 m_channels; // number of discrete audio channels needed
- const char *const *m_names; // array of sample names
- void (*m_start)(samples_device &device); // optional callback
+ UINT8 m_channels; // number of discrete audio channels needed
+ const char *const *m_names; // array of sample names
+ void (*m_start)(samples_device &device); // optional callback
};
// ======================> samples_device
-class samples_device : public device_t,
+class samples_device : public device_t,
public device_sound_interface,
public samples_interface
{
@@ -111,8 +111,8 @@ public:
// shouldn't need a copy, but in case it happens, catch it here
sample_t &operator=(const sample_t &rhs) { assert(false); return *this; }
- UINT32 frequency; // frequency of the sample
- dynamic_array<INT16> data; // 16-bit signed data
+ UINT32 frequency; // frequency of the sample
+ dynamic_array<INT16> data; // 16-bit signed data
};
static bool read_sample(emu_file &file, sample_t &sample);
@@ -132,16 +132,16 @@ private:
// internal classes
struct channel_t
{
- sound_stream * stream;
- const INT16 * source;
- INT32 source_length;
- INT32 source_num;
- UINT32 pos;
- UINT32 frac;
- UINT32 step;
- UINT32 basefreq;
- bool loop;
- bool paused;
+ sound_stream * stream;
+ const INT16 * source;
+ INT32 source_length;
+ INT32 source_num;
+ UINT32 pos;
+ UINT32 frac;
+ UINT32 step;
+ UINT32 basefreq;
+ bool loop;
+ bool paused;
};
// internal helpers
@@ -150,8 +150,8 @@ private:
void load_samples();
// internal state
- dynamic_array<channel_t> m_channel;
- dynamic_array<sample_t> m_sample;
+ dynamic_array<channel_t> m_channel;
+ dynamic_array<sample_t> m_sample;
// internal constants
static const UINT8 FRAC_BITS = 24;
@@ -171,7 +171,7 @@ public:
// construction/destruction
samples_iterator(samples_interface &intf)
: m_intf(intf),
- m_current(-1) { }
+ m_current(-1) { }
// getters
const char *altbasename() const { return (m_intf.m_names != NULL && m_intf.m_names[0] != NULL && m_intf.m_names[0][0] == '*') ? &m_intf.m_names[0][1] : NULL; }
@@ -207,8 +207,8 @@ public:
private:
// internal state
- samples_interface & m_intf;
- int m_current;
+ samples_interface & m_intf;
+ int m_current;
};
diff --git a/src/emu/sound/scsp.c b/src/emu/sound/scsp.c
index 84daeb0658d..2b0fe12819e 100644
--- a/src/emu/sound/scsp.c
+++ b/src/emu/sound/scsp.c
@@ -34,13 +34,13 @@
#define ICLIP16(x) (x<-32768)?-32768:((x>32767)?32767:x)
-#define SHIFT 12
-#define FIX(v) ((UINT32) ((float) (1<<SHIFT)*(v)))
+#define SHIFT 12
+#define FIX(v) ((UINT32) ((float) (1<<SHIFT)*(v)))
-#define EG_SHIFT 16
+#define EG_SHIFT 16
#define FM_DELAY 0 // delay in number of slots processed before samples are written to the FM ring buffer
- // driver code indicates should be 4, but sounds distorted then
+ // driver code indicates should be 4, but sounds distorted then
// include the LFO handling code
#include "scsplfo.c"
@@ -51,54 +51,54 @@
*/
//SLOT PARAMETERS
-#define KEYONEX(slot) ((slot->udata.data[0x0]>>0x0)&0x1000)
-#define KEYONB(slot) ((slot->udata.data[0x0]>>0x0)&0x0800)
-#define SBCTL(slot) ((slot->udata.data[0x0]>>0x9)&0x0003)
-#define SSCTL(slot) ((slot->udata.data[0x0]>>0x7)&0x0003)
-#define LPCTL(slot) ((slot->udata.data[0x0]>>0x5)&0x0003)
-#define PCM8B(slot) ((slot->udata.data[0x0]>>0x0)&0x0010)
+#define KEYONEX(slot) ((slot->udata.data[0x0]>>0x0)&0x1000)
+#define KEYONB(slot) ((slot->udata.data[0x0]>>0x0)&0x0800)
+#define SBCTL(slot) ((slot->udata.data[0x0]>>0x9)&0x0003)
+#define SSCTL(slot) ((slot->udata.data[0x0]>>0x7)&0x0003)
+#define LPCTL(slot) ((slot->udata.data[0x0]>>0x5)&0x0003)
+#define PCM8B(slot) ((slot->udata.data[0x0]>>0x0)&0x0010)
-#define SA(slot) (((slot->udata.data[0x0]&0xF)<<16)|(slot->udata.data[0x1]))
+#define SA(slot) (((slot->udata.data[0x0]&0xF)<<16)|(slot->udata.data[0x1]))
-#define LSA(slot) (slot->udata.data[0x2])
+#define LSA(slot) (slot->udata.data[0x2])
-#define LEA(slot) (slot->udata.data[0x3])
+#define LEA(slot) (slot->udata.data[0x3])
-#define D2R(slot) ((slot->udata.data[0x4]>>0xB)&0x001F)
-#define D1R(slot) ((slot->udata.data[0x4]>>0x6)&0x001F)
-#define EGHOLD(slot) ((slot->udata.data[0x4]>>0x0)&0x0020)
-#define AR(slot) ((slot->udata.data[0x4]>>0x0)&0x001F)
+#define D2R(slot) ((slot->udata.data[0x4]>>0xB)&0x001F)
+#define D1R(slot) ((slot->udata.data[0x4]>>0x6)&0x001F)
+#define EGHOLD(slot) ((slot->udata.data[0x4]>>0x0)&0x0020)
+#define AR(slot) ((slot->udata.data[0x4]>>0x0)&0x001F)
-#define LPSLNK(slot) ((slot->udata.data[0x5]>>0x0)&0x4000)
-#define KRS(slot) ((slot->udata.data[0x5]>>0xA)&0x000F)
-#define DL(slot) ((slot->udata.data[0x5]>>0x5)&0x001F)
-#define RR(slot) ((slot->udata.data[0x5]>>0x0)&0x001F)
+#define LPSLNK(slot) ((slot->udata.data[0x5]>>0x0)&0x4000)
+#define KRS(slot) ((slot->udata.data[0x5]>>0xA)&0x000F)
+#define DL(slot) ((slot->udata.data[0x5]>>0x5)&0x001F)
+#define RR(slot) ((slot->udata.data[0x5]>>0x0)&0x001F)
-#define STWINH(slot) ((slot->udata.data[0x6]>>0x0)&0x0200)
-#define SDIR(slot) ((slot->udata.data[0x6]>>0x0)&0x0100)
-#define TL(slot) ((slot->udata.data[0x6]>>0x0)&0x00FF)
+#define STWINH(slot) ((slot->udata.data[0x6]>>0x0)&0x0200)
+#define SDIR(slot) ((slot->udata.data[0x6]>>0x0)&0x0100)
+#define TL(slot) ((slot->udata.data[0x6]>>0x0)&0x00FF)
-#define MDL(slot) ((slot->udata.data[0x7]>>0xC)&0x000F)
-#define MDXSL(slot) ((slot->udata.data[0x7]>>0x6)&0x003F)
-#define MDYSL(slot) ((slot->udata.data[0x7]>>0x0)&0x003F)
+#define MDL(slot) ((slot->udata.data[0x7]>>0xC)&0x000F)
+#define MDXSL(slot) ((slot->udata.data[0x7]>>0x6)&0x003F)
+#define MDYSL(slot) ((slot->udata.data[0x7]>>0x0)&0x003F)
-#define OCT(slot) ((slot->udata.data[0x8]>>0xB)&0x000F)
-#define FNS(slot) ((slot->udata.data[0x8]>>0x0)&0x03FF)
+#define OCT(slot) ((slot->udata.data[0x8]>>0xB)&0x000F)
+#define FNS(slot) ((slot->udata.data[0x8]>>0x0)&0x03FF)
-#define LFORE(slot) ((slot->udata.data[0x9]>>0x0)&0x8000)
-#define LFOF(slot) ((slot->udata.data[0x9]>>0xA)&0x001F)
-#define PLFOWS(slot) ((slot->udata.data[0x9]>>0x8)&0x0003)
-#define PLFOS(slot) ((slot->udata.data[0x9]>>0x5)&0x0007)
-#define ALFOWS(slot) ((slot->udata.data[0x9]>>0x3)&0x0003)
-#define ALFOS(slot) ((slot->udata.data[0x9]>>0x0)&0x0007)
+#define LFORE(slot) ((slot->udata.data[0x9]>>0x0)&0x8000)
+#define LFOF(slot) ((slot->udata.data[0x9]>>0xA)&0x001F)
+#define PLFOWS(slot) ((slot->udata.data[0x9]>>0x8)&0x0003)
+#define PLFOS(slot) ((slot->udata.data[0x9]>>0x5)&0x0007)
+#define ALFOWS(slot) ((slot->udata.data[0x9]>>0x3)&0x0003)
+#define ALFOS(slot) ((slot->udata.data[0x9]>>0x0)&0x0007)
-#define ISEL(slot) ((slot->udata.data[0xA]>>0x3)&0x000F)
-#define IMXL(slot) ((slot->udata.data[0xA]>>0x0)&0x0007)
+#define ISEL(slot) ((slot->udata.data[0xA]>>0x3)&0x000F)
+#define IMXL(slot) ((slot->udata.data[0xA]>>0x0)&0x0007)
-#define DISDL(slot) ((slot->udata.data[0xB]>>0xD)&0x0007)
-#define DIPAN(slot) ((slot->udata.data[0xB]>>0x8)&0x001F)
-#define EFSDL(slot) ((slot->udata.data[0xB]>>0x5)&0x0007)
-#define EFPAN(slot) ((slot->udata.data[0xB]>>0x0)&0x001F)
+#define DISDL(slot) ((slot->udata.data[0xB]>>0xD)&0x0007)
+#define DIPAN(slot) ((slot->udata.data[0xB]>>0x8)&0x001F)
+#define EFSDL(slot) ((slot->udata.data[0xB]>>0x5)&0x0007)
+#define EFPAN(slot) ((slot->udata.data[0xB]>>0x0)&0x001F)
//Envelope times in ms
static const double ARTimes[64]={100000/*infinity*/,100000/*infinity*/,8100.0,6900.0,6000.0,4800.0,4000.0,3400.0,3000.0,2400.0,2000.0,1700.0,1500.0,
@@ -114,16 +114,16 @@ static INT32 EG_TABLE[0x400];
enum STATE {ATTACK,DECAY1,DECAY2,RELEASE};
struct EG_t
{
- int volume; //
+ int volume; //
STATE state;
int step;
//step vals
- int AR; //Attack
- int D1R; //Decay1
- int D2R; //Decay2
- int RR; //Release
+ int AR; //Attack
+ int D1R; //Decay1
+ int D2R; //Decay2
+ int RR; //Release
- int DL; //Decay level
+ int DL; //Decay level
UINT8 EGHOLD;
UINT8 LPLINK;
};
@@ -132,46 +132,46 @@ struct SLOT
{
union
{
- UINT16 data[0x10]; //only 0x1a bytes used
+ UINT16 data[0x10]; //only 0x1a bytes used
UINT8 datab[0x20];
} udata;
- UINT8 Backwards; //the wave is playing backwards
- UINT8 active; //this slot is currently playing
- UINT8 *base; //samples base address
- UINT32 cur_addr; //current play address (24.8)
- UINT32 nxt_addr; //next play address
- UINT32 step; //pitch step (24.8)
- EG_t EG; //Envelope
- LFO_t PLFO; //Phase LFO
- LFO_t ALFO; //Amplitude LFO
+ UINT8 Backwards; //the wave is playing backwards
+ UINT8 active; //this slot is currently playing
+ UINT8 *base; //samples base address
+ UINT32 cur_addr; //current play address (24.8)
+ UINT32 nxt_addr; //next play address
+ UINT32 step; //pitch step (24.8)
+ EG_t EG; //Envelope
+ LFO_t PLFO; //Phase LFO
+ LFO_t ALFO; //Amplitude LFO
int slot;
- signed short Prev; //Previous sample (for interpolation)
+ signed short Prev; //Previous sample (for interpolation)
};
-#define MEM4B(scsp) ((scsp->udata.data[0]>>0x0)&0x0200)
-#define DAC18B(scsp) ((scsp->udata.data[0]>>0x0)&0x0100)
-#define MVOL(scsp) ((scsp->udata.data[0]>>0x0)&0x000F)
-#define RBL(scsp) ((scsp->udata.data[1]>>0x7)&0x0003)
-#define RBP(scsp) ((scsp->udata.data[1]>>0x0)&0x003F)
-#define MOFULL(scsp) ((scsp->udata.data[2]>>0x0)&0x1000)
-#define MOEMPTY(scsp) ((scsp->udata.data[2]>>0x0)&0x0800)
-#define MIOVF(scsp) ((scsp->udata.data[2]>>0x0)&0x0400)
-#define MIFULL(scsp) ((scsp->udata.data[2]>>0x0)&0x0200)
-#define MIEMPTY(scsp) ((scsp->udata.data[2]>>0x0)&0x0100)
-
-#define SCILV0(scsp) ((scsp->udata.data[0x24/2]>>0x0)&0xff)
-#define SCILV1(scsp) ((scsp->udata.data[0x26/2]>>0x0)&0xff)
-#define SCILV2(scsp) ((scsp->udata.data[0x28/2]>>0x0)&0xff)
-
-#define SCIEX0 0
-#define SCIEX1 1
-#define SCIEX2 2
-#define SCIMID 3
-#define SCIDMA 4
-#define SCIIRQ 5
-#define SCITMA 6
-#define SCITMB 7
+#define MEM4B(scsp) ((scsp->udata.data[0]>>0x0)&0x0200)
+#define DAC18B(scsp) ((scsp->udata.data[0]>>0x0)&0x0100)
+#define MVOL(scsp) ((scsp->udata.data[0]>>0x0)&0x000F)
+#define RBL(scsp) ((scsp->udata.data[1]>>0x7)&0x0003)
+#define RBP(scsp) ((scsp->udata.data[1]>>0x0)&0x003F)
+#define MOFULL(scsp) ((scsp->udata.data[2]>>0x0)&0x1000)
+#define MOEMPTY(scsp) ((scsp->udata.data[2]>>0x0)&0x0800)
+#define MIOVF(scsp) ((scsp->udata.data[2]>>0x0)&0x0400)
+#define MIFULL(scsp) ((scsp->udata.data[2]>>0x0)&0x0200)
+#define MIEMPTY(scsp) ((scsp->udata.data[2]>>0x0)&0x0100)
+
+#define SCILV0(scsp) ((scsp->udata.data[0x24/2]>>0x0)&0xff)
+#define SCILV1(scsp) ((scsp->udata.data[0x26/2]>>0x0)&0xff)
+#define SCILV2(scsp) ((scsp->udata.data[0x28/2]>>0x0)&0xff)
+
+#define SCIEX0 0
+#define SCIEX1 1
+#define SCIEX2 2
+#define SCIMID 3
+#define SCIDMA 4
+#define SCIIRQ 5
+#define SCITMA 6
+#define SCITMB 7
#define USEDSP
@@ -230,10 +230,10 @@ struct scsp_state
device_t *device;
};
-static void dma_scsp(address_space &space, scsp_state *scsp); /*state DMA transfer function*/
-#define scsp_dgate scsp->scsp_dmactrl & 0x4000
-#define scsp_ddir scsp->scsp_dmactrl & 0x2000
-#define scsp_dexe scsp->scsp_dmactrl & 0x1000
+static void dma_scsp(address_space &space, scsp_state *scsp); /*state DMA transfer function*/
+#define scsp_dgate scsp->scsp_dmactrl & 0x4000
+#define scsp_ddir scsp->scsp_dmactrl & 0x2000
+#define scsp_dexe scsp->scsp_dmactrl & 0x1000
/* TODO */
//#define dma_transfer_end ((scsp_regs[0x24/2] & 0x10)>>4)|(((scsp_regs[0x26/2] & 0x10)>>4)<<1)|(((scsp_regs[0x28/2] & 0x10)>>4)<<2)
@@ -245,7 +245,7 @@ static stream_sample_t *bufferr;
static int length;
-static signed short *RBUFDST; //this points to where the sample will be stored in the RingBuf
+static signed short *RBUFDST; //this points to where the sample will be stored in the RingBuf
INLINE scsp_state *get_safe_token(device_t *device)
@@ -368,7 +368,7 @@ static TIMER_CALLBACK( timerC_cb )
static int Get_AR(scsp_state *scsp,int base,int R)
{
int Rate=base+(R<<1);
- if(Rate>63) Rate=63;
+ if(Rate>63) Rate=63;
if(Rate<0) Rate=0;
return scsp->ARTABLE[Rate];
}
@@ -376,7 +376,7 @@ static int Get_AR(scsp_state *scsp,int base,int R)
static int Get_DR(scsp_state *scsp,int base,int R)
{
int Rate=base+(R<<1);
- if(Rate>63) Rate=63;
+ if(Rate>63) Rate=63;
if(Rate<0) Rate=0;
return scsp->DRTABLE[Rate];
}
@@ -384,7 +384,7 @@ static int Get_DR(scsp_state *scsp,int base,int R)
static int Get_RR(scsp_state *scsp,int base,int R)
{
int Rate=base+(R<<1);
- if(Rate>63) Rate=63;
+ if(Rate>63) Rate=63;
if(Rate<0) Rate=0;
return scsp->DRTABLE[Rate];
}
@@ -614,12 +614,12 @@ static void SCSP_Init(device_t *device, scsp_state *scsp, const scsp_interface *
scsp->RPANTABLE[i]=FIX((4.0*RPAN*TL*fSDL));
}
- scsp->ARTABLE[0]=scsp->DRTABLE[0]=0; //Infinite time
- scsp->ARTABLE[1]=scsp->DRTABLE[1]=0; //Infinite time
+ scsp->ARTABLE[0]=scsp->DRTABLE[0]=0; //Infinite time
+ scsp->ARTABLE[1]=scsp->DRTABLE[1]=0; //Infinite time
for(i=2;i<64;++i)
{
double t,step,scale;
- t=ARTimes[i]; //In ms
+ t=ARTimes[i]; //In ms
if(t!=0.0)
{
step=(1023*1000.0)/((float) 44100.0f*t);
@@ -629,7 +629,7 @@ static void SCSP_Init(device_t *device, scsp_state *scsp, const scsp_interface *
else
scsp->ARTABLE[i]=1024<<EG_SHIFT;
- t=DRTimes[i]; //In ms
+ t=DRTimes[i]; //In ms
step=(1023*1000.0)/((float) 44100.0f*t);
scale=(double) (1<<EG_SHIFT);
scsp->DRTABLE[i]=(int) (step*scale);
@@ -789,7 +789,7 @@ static void SCSP_UpdateReg(scsp_state *scsp, address_space &space, int reg)
}
}
break;
- case 0x22: //SCIRE
+ case 0x22: //SCIRE
case 0x23:
if(scsp->Master)
@@ -844,8 +844,8 @@ static void SCSP_UpdateRegR(scsp_state *scsp, address_space &space, int reg)
unsigned short v=scsp->udata.data[0x5/2];
v&=0xff00;
v|=scsp->MidiStack[scsp->MidiR];
- scsp->Int68kCB(scsp->device, -scsp->IrqMidi); // cancel the IRQ
- logerror("Read %x from SCSP MIDI\n", v);
+ scsp->Int68kCB(scsp->device, -scsp->IrqMidi); // cancel the IRQ
+ logerror("Read %x from SCSP MIDI\n", v);
if(scsp->MidiR!=scsp->MidiW)
{
++scsp->MidiR;
@@ -905,7 +905,7 @@ static void SCSP_w16(scsp_state *scsp,address_space &space,unsigned int addr,uns
else
{
//DSP
- if(addr<0x780) //COEF
+ if(addr<0x780) //COEF
*((unsigned short *) (scsp->DSP.COEF+(addr-0x700)/2))=val;
else if(addr<0x800)
*((unsigned short *) (scsp->DSP.MADRS+(addr-0x780)/2))=val;
@@ -916,7 +916,7 @@ static void SCSP_w16(scsp_state *scsp,address_space &space,unsigned int addr,uns
if(addr==0xBF0)
{
SCSPDSP_Start(&scsp->DSP);
- }
+ }
}
}
}
@@ -958,7 +958,7 @@ INLINE INT32 SCSP_UpdateSlot(scsp_state *scsp, SLOT *slot)
UINT32 *addr[2] = {&addr1, &addr2}; // used for linear interpolation
UINT32 *slot_addr[2] = {&(slot->cur_addr), &(slot->nxt_addr)}; //
- if(SSCTL(slot)!=0) //no FM or noise yet
+ if(SSCTL(slot)!=0) //no FM or noise yet
return 0;
if(PLFOS(slot)!=0)
@@ -989,7 +989,7 @@ INLINE INT32 SCSP_UpdateSlot(scsp_state *scsp, SLOT *slot)
addr1+=smp; addr2+=smp;
}
- if(PCM8B(slot)) //8 bit signed
+ if(PCM8B(slot)) //8 bit signed
{
INT8 *p1=(signed char *) (scsp->SCSPRAM+BYTE_XOR_BE(((SA(slot)+addr1))&0x7FFFF));
INT8 *p2=(signed char *) (scsp->SCSPRAM+BYTE_XOR_BE(((SA(slot)+addr2))&0x7FFFF));
@@ -999,7 +999,7 @@ INLINE INT32 SCSP_UpdateSlot(scsp_state *scsp, SLOT *slot)
s=(int) (p1[0]<<8)*((1<<SHIFT)-fpart)+(int) (p2[0]<<8)*fpart;
sample=(s>>SHIFT);
}
- else //16 bit signed (endianness?)
+ else //16 bit signed (endianness?)
{
INT16 *p1=(signed short *) (scsp->SCSPRAM+((SA(slot)+addr1)&0x7FFFE));
INT16 *p2=(signed short *) (scsp->SCSPRAM+((SA(slot)+addr2)&0x7FFFE));
@@ -1034,7 +1034,7 @@ INLINE INT32 SCSP_UpdateSlot(scsp_state *scsp, SLOT *slot)
INT32 rem_addr;
switch(LPCTL(slot))
{
- case 0: //no loop
+ case 0: //no loop
if(*addr[addr_select]>=LSA(slot) && *addr[addr_select]>=LEA(slot))
{
//slot->active=0;
@@ -1048,7 +1048,7 @@ INLINE INT32 SCSP_UpdateSlot(scsp_state *scsp, SLOT *slot)
*slot_addr[addr_select]=(LSA(slot)<<SHIFT) + rem_addr;
}
break;
- case 2: //reverse loop
+ case 2: //reverse loop
if((*addr[addr_select]>=LSA(slot)) && !(slot->Backwards))
{
rem_addr = *slot_addr[addr_select] - (LSA(slot)<<SHIFT);
@@ -1193,11 +1193,11 @@ static void dma_scsp(address_space &space, scsp_state *scsp)
scsp->scsp_dtlg = (scsp->dma_regs[2] & 0x0ffe);
logerror("SCSP: DMA transfer START\n"
- "DMEA: %04x DRGA: %04x DTLG: %04x\n"
- "DGATE: %d DDIR: %d\n",scsp->scsp_dmea,scsp->scsp_drga,scsp->scsp_dtlg,scsp_dgate ? 1 : 0,scsp_ddir ? 1 : 0);
+ "DMEA: %04x DRGA: %04x DTLG: %04x\n"
+ "DGATE: %d DDIR: %d\n",scsp->scsp_dmea,scsp->scsp_drga,scsp->scsp_dtlg,scsp_dgate ? 1 : 0,scsp_ddir ? 1 : 0);
/* Copy the dma values in a temp storage for resuming later */
- /* (DMA *can't* overwrite his parameters). */
+ /* (DMA *can't* overwrite his parameters). */
if(!(scsp_ddir))
{
for(i=0;i<3;i++)
@@ -1323,7 +1323,7 @@ WRITE16_DEVICE_HANDLER( scsp_w )
if(ACCESSING_BITS_8_15 && offset*2 == 0x416)
dma_scsp(space, scsp);
break;
- case 0x42a: //check main cpu IRQ
+ case 0x42a: //check main cpu IRQ
scsp->main_irq(1);
break;
case 0x42c:
@@ -1359,7 +1359,7 @@ const device_type SCSP = &device_creator<scsp_device>;
scsp_device::scsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SCSP, "SCSP", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(scsp_state);
}
@@ -1392,5 +1392,3 @@ void scsp_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/scsp.h b/src/emu/sound/scsp.h
index 0369fbcc631..1b4d8bab3d1 100644
--- a/src/emu/sound/scsp.h
+++ b/src/emu/sound/scsp.h
@@ -11,8 +11,8 @@
struct scsp_interface
{
- int roffset; /* offset in the region */
- void (*irq_callback)(device_t *device, int state); /* irq callback */
+ int roffset; /* offset in the region */
+ void (*irq_callback)(device_t *device, int state); /* irq callback */
devcb_write_line main_irq;
};
@@ -29,7 +29,7 @@ DECLARE_READ16_DEVICE_HANDLER( scsp_midi_out_r );
extern UINT32* stv_scu;
class scsp_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
scsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/scspdsp.c b/src/emu/sound/scspdsp.c
index 2ddc62fdecb..4072f646f0c 100644
--- a/src/emu/sound/scspdsp.c
+++ b/src/emu/sound/scspdsp.c
@@ -62,17 +62,17 @@ void SCSPDSP_Init(SCSPDSP *DSP)
void SCSPDSP_Step(SCSPDSP *DSP)
{
- INT32 ACC=0; //26 bit
- INT32 SHIFTED=0; //24 bit
- INT32 X=0; //24 bit
- INT32 Y=0; //13 bit
- INT32 B=0; //26 bit
- INT32 INPUTS=0; //24 bit
+ INT32 ACC=0; //26 bit
+ INT32 SHIFTED=0; //24 bit
+ INT32 X=0; //24 bit
+ INT32 Y=0; //13 bit
+ INT32 B=0; //26 bit
+ INT32 INPUTS=0; //24 bit
INT32 MEMVAL=0;
- INT32 FRC_REG=0; //13 bit
- INT32 Y_REG=0; //24 bit
+ INT32 FRC_REG=0; //13 bit
+ INT32 Y_REG=0; //24 bit
UINT32 ADDR=0;
- UINT32 ADRS_REG=0; //13 bit
+ UINT32 ADRS_REG=0; //13 bit
int step;
if(DSP->Stopped)
@@ -115,10 +115,10 @@ void SCSPDSP_Step(SCSPDSP *DSP)
UINT32 ZERO=(IPtr[2]>>1)&0x01;
UINT32 BSEL=(IPtr[2]>>0)&0x01;
- UINT32 NOFL=(IPtr[3]>>15)&1; //????
+ UINT32 NOFL=(IPtr[3]>>15)&1; //????
UINT32 COEF=(IPtr[3]>>9)&0x3f;
- UINT32 MASA=(IPtr[3]>>2)&0x1f; //???
+ UINT32 MASA=(IPtr[3]>>2)&0x1f; //???
UINT32 ADREB=(IPtr[3]>>1)&0x1;
UINT32 NXADR=(IPtr[3]>>0)&0x1;
@@ -135,7 +135,7 @@ void SCSPDSP_Step(SCSPDSP *DSP)
if(f)
{
-#define DUMP(v) fprintf(f," " #v ": %04X",v);
+#define DUMP(v) fprintf(f," " #v ": %04X",v);
fprintf(f,"%d: ",step);
DUMP(ACC);
@@ -158,7 +158,7 @@ void SCSPDSP_Step(SCSPDSP *DSP)
if(IRA<=0x1f)
INPUTS=DSP->MEMS[IRA];
else if(IRA<=0x2F)
- INPUTS=DSP->MIXS[IRA-0x20]<<4; //MIXS is 20 bit
+ INPUTS=DSP->MIXS[IRA-0x20]<<4; //MIXS is 20 bit
else if(IRA<=0x31)
INPUTS=0;
else
@@ -171,7 +171,7 @@ void SCSPDSP_Step(SCSPDSP *DSP)
if(IWT)
{
- DSP->MEMS[IWA]=MEMVAL; //MEMVAL was selected in previous MRD
+ DSP->MEMS[IWA]=MEMVAL; //MEMVAL was selected in previous MRD
if(IRA==IWA)
INPUTS=MEMVAL;
}
@@ -212,7 +212,7 @@ void SCSPDSP_Step(SCSPDSP *DSP)
if(YSEL==0)
Y=FRC_REG;
else if(YSEL==1)
- Y=DSP->COEF[COEF]>>3; //COEF is 16 bits
+ Y=DSP->COEF[COEF]>>3; //COEF is 16 bits
else if(YSEL==2)
Y=(Y_REG>>11)&0x1FFF;
else if(YSEL==3)
@@ -296,7 +296,7 @@ void SCSPDSP_Step(SCSPDSP *DSP)
//MEMVAL=DSP->SCSPRAM[ADDR>>1];
ADDR+=DSP->RBP<<12;
if (ADDR > 0x7ffff) ADDR = 0;
- if(MRD && (step&1)) //memory only allowed on odd? DoA inserts NOPs on even
+ if(MRD && (step&1)) //memory only allowed on odd? DoA inserts NOPs on even
{
if(NOFL)
MEMVAL=DSP->SCSPRAM[ADDR]<<8;
@@ -306,7 +306,7 @@ void SCSPDSP_Step(SCSPDSP *DSP)
if(MWT && (step&1))
{
if(NOFL)
- DSP->SCSPRAM[ADDR]=SHIFTED>>8;
+ DSP->SCSPRAM[ADDR]=SHIFTED>>8;
else
DSP->SCSPRAM[ADDR]=PACK(SHIFTED);
}
diff --git a/src/emu/sound/scspdsp.h b/src/emu/sound/scspdsp.h
index 59205a19407..2260b2cceac 100644
--- a/src/emu/sound/scspdsp.h
+++ b/src/emu/sound/scspdsp.h
@@ -9,24 +9,24 @@ struct SCSPDSP
//Config
UINT16 *SCSPRAM;
UINT32 SCSPRAM_LENGTH;
- UINT32 RBP; //Ring buf pointer
- UINT32 RBL; //Delay ram (Ring buffer) size in words
+ UINT32 RBP; //Ring buf pointer
+ UINT32 RBL; //Delay ram (Ring buffer) size in words
//context
- INT16 COEF[64]; //16 bit signed
- UINT16 MADRS[32]; //offsets (in words), 16 bit
- UINT16 MPRO[128*4]; //128 steps 64 bit
- INT32 TEMP[128]; //TEMP regs,24 bit signed
- INT32 MEMS[32]; //MEMS regs,24 bit signed
+ INT16 COEF[64]; //16 bit signed
+ UINT16 MADRS[32]; //offsets (in words), 16 bit
+ UINT16 MPRO[128*4]; //128 steps 64 bit
+ INT32 TEMP[128]; //TEMP regs,24 bit signed
+ INT32 MEMS[32]; //MEMS regs,24 bit signed
UINT32 DEC;
//input
- INT32 MIXS[16]; //MIXS, 24 bit signed
- INT16 EXTS[2]; //External inputs (CDDA) 16 bit signed
+ INT32 MIXS[16]; //MIXS, 24 bit signed
+ INT16 EXTS[2]; //External inputs (CDDA) 16 bit signed
//output
- INT16 EFREG[16]; //EFREG, 16 bit signed
+ INT16 EFREG[16]; //EFREG, 16 bit signed
int Stopped;
int LastStep;
diff --git a/src/emu/sound/scsplfo.c b/src/emu/sound/scsplfo.c
index 3b493a87800..20216ce7d62 100644
--- a/src/emu/sound/scsplfo.c
+++ b/src/emu/sound/scsplfo.c
@@ -8,20 +8,20 @@
MAME/M1 conversion and cleanup by R. Belmont
*/
-#define LFO_SHIFT 8
+#define LFO_SHIFT 8
struct LFO_t
{
- unsigned short phase;
- UINT32 phase_step;
- int *table;
- int *scale;
+ unsigned short phase;
+ UINT32 phase_step;
+ int *table;
+ int *scale;
};
-#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
+#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
//Convert DB to multiply amplitude
-#define DB(v) LFIX(pow(10.0,v/20.0))
+#define DB(v) LFIX(pow(10.0,v/20.0))
//Convert cents to step increment
#define CENTS(v) LFIX(pow(2.0,v/1200.0))
@@ -40,9 +40,9 @@ static int ASCALES[8][256];
static void LFO_Init(running_machine &machine)
{
- int i,s;
- for(i=0;i<256;++i)
- {
+ int i,s;
+ for(i=0;i<256;++i)
+ {
int a,p;
// float TL;
//Saw
@@ -90,7 +90,7 @@ static void LFO_Init(running_machine &machine)
p=128-a;
ALFO_NOI[i]=a;
PLFO_NOI[i]=p;
- }
+ }
for(s=0;s<8;++s)
{
@@ -110,11 +110,11 @@ static void LFO_Init(running_machine &machine)
INLINE signed int PLFO_Step(LFO_t *LFO)
{
int p;
- LFO->phase+=LFO->phase_step;
+ LFO->phase+=LFO->phase_step;
#if LFO_SHIFT!=8
- LFO->phase&=(1<<(LFO_SHIFT+8))-1;
+ LFO->phase&=(1<<(LFO_SHIFT+8))-1;
#endif
- p=LFO->table[LFO->phase>>LFO_SHIFT];
+ p=LFO->table[LFO->phase>>LFO_SHIFT];
p=LFO->scale[p+128];
return p<<(SHIFT-LFO_SHIFT);
}
@@ -122,21 +122,21 @@ INLINE signed int PLFO_Step(LFO_t *LFO)
INLINE signed int ALFO_Step(LFO_t *LFO)
{
int p;
- LFO->phase+=LFO->phase_step;
+ LFO->phase+=LFO->phase_step;
#if LFO_SHIFT!=8
- LFO->phase&=(1<<(LFO_SHIFT+8))-1;
+ LFO->phase&=(1<<(LFO_SHIFT+8))-1;
#endif
- p=LFO->table[LFO->phase>>LFO_SHIFT];
+ p=LFO->table[LFO->phase>>LFO_SHIFT];
p=LFO->scale[p];
return p<<(SHIFT-LFO_SHIFT);
}
static void LFO_ComputeStep(LFO_t *LFO,UINT32 LFOF,UINT32 LFOWS,UINT32 LFOS,int ALFO)
{
- float step=(float) LFOFreq[LFOF]*256.0/(float)44100;
- LFO->phase_step=(unsigned int) ((float) (1<<LFO_SHIFT)*step);
- if(ALFO)
- {
+ float step=(float) LFOFreq[LFOF]*256.0/(float)44100;
+ LFO->phase_step=(unsigned int) ((float) (1<<LFO_SHIFT)*step);
+ if(ALFO)
+ {
switch(LFOWS)
{
case 0: LFO->table=ALFO_SAW; break;
@@ -150,10 +150,10 @@ static void LFO_ComputeStep(LFO_t *LFO,UINT32 LFOF,UINT32 LFOWS,UINT32 LFOS,int
{
switch(LFOWS)
{
- case 0: LFO->table=PLFO_SAW; break;
- case 1: LFO->table=PLFO_SQR; break;
+ case 0: LFO->table=PLFO_SAW; break;
+ case 1: LFO->table=PLFO_SQR; break;
case 2: LFO->table=PLFO_TRI; break;
- case 3: LFO->table=PLFO_NOI; break;
+ case 3: LFO->table=PLFO_NOI; break;
}
LFO->scale=PSCALES[LFOS];
}
diff --git a/src/emu/sound/segapcm.c b/src/emu/sound/segapcm.c
index 163d43d9a3e..ec8dffc0e10 100644
--- a/src/emu/sound/segapcm.c
+++ b/src/emu/sound/segapcm.c
@@ -16,13 +16,13 @@ const device_type SEGAPCM = &device_creator<segapcm_device>;
segapcm_device::segapcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEGAPCM, "Sega PCM", "segapcm", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_ram(NULL),
- m_rom(NULL),
- m_bankshift(0),
- m_bankmask(0),
- m_rgnmask(0),
- m_stream(NULL)
+ device_sound_interface(mconfig, *this),
+ m_ram(NULL),
+ m_rom(NULL),
+ m_bankshift(0),
+ m_bankmask(0),
+ m_rgnmask(0),
+ m_stream(NULL)
{
}
@@ -153,5 +153,3 @@ READ8_MEMBER( segapcm_device::sega_pcm_r )
m_stream->update();
return m_ram[offset & 0x07ff];
}
-
-
diff --git a/src/emu/sound/segapcm.h b/src/emu/sound/segapcm.h
index fdb991e2108..485f254b2d9 100644
--- a/src/emu/sound/segapcm.h
+++ b/src/emu/sound/segapcm.h
@@ -36,7 +36,7 @@ struct sega_pcm_interface
};
class segapcm_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
segapcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/sid.c b/src/emu/sound/sid.c
index 63d7ae06e42..79aee707156 100644
--- a/src/emu/sound/sid.c
+++ b/src/emu/sound/sid.c
@@ -109,11 +109,11 @@ void sidEmuFillBuffer(SID6581_t *This, stream_sample_t *buffer, UINT32 bufferLen
/* hack for digi sounds
does n't seam to come from a tone operator
ghostbusters and goldrunner everything except volume zeroed */
- +(This->masterVolume<<2)
+ +(This->masterVolume<<2)
// +(*sampleEmuRout)()
)];
syncEm(This);
- }
+ }
}
/* --------------------------------------------------------------------- Init */
@@ -325,39 +325,38 @@ void sid6581_port_w (SID6581_t *This, int offset, int data)
int sid6581_port_r (running_machine &machine, SID6581_t *This, int offset)
{
- int data;
+ int data;
/* SIDPLAY reads last written at a sid address value */
- offset &= 0x1f;
- switch (offset)
- {
- case 0x1d:
- case 0x1e:
- case 0x1f:
+ offset &= 0x1f;
+ switch (offset)
+ {
+ case 0x1d:
+ case 0x1e:
+ case 0x1f:
data=0xff;
break;
- case 0x19: /* paddle 1 */
+ case 0x19: /* paddle 1 */
if (!This->in_potx_func.isnull())
data = This->in_potx_func(offset);
else
- data=0;
+ data=0;
break;
- case 0x1a: /* paddle 2 */
+ case 0x1a: /* paddle 2 */
if (!This->in_poty_func.isnull())
data = This->in_poty_func(offset);
else
- data=0;
+ data=0;
break;
- case 0x1b:
+ case 0x1b:
This->mixer_channel->update();
data = This->optr3.output;
break;
- case 0x1c:
+ case 0x1c:
This->mixer_channel->update();
data = This->optr3.enveVol;
break;
- default:
+ default:
data=This->reg[offset];
- }
- return data;
+ }
+ return data;
}
-
diff --git a/src/emu/sound/sid.h b/src/emu/sound/sid.h
index 82a28d3309e..8b3d04545b0 100644
--- a/src/emu/sound/sid.h
+++ b/src/emu/sound/sid.h
@@ -14,17 +14,17 @@
/* private area */
struct SID6581_t
{
- device_t *device;
- sound_stream *mixer_channel; // mame stream/ mixer channel
+ device_t *device;
+ sound_stream *mixer_channel; // mame stream/ mixer channel
devcb_resolved_read8 in_potx_func;
devcb_resolved_read8 in_poty_func;
- SIDTYPE type;
- UINT32 clock;
+ SIDTYPE type;
+ UINT32 clock;
- UINT16 PCMfreq; // samplerate of the current systems soundcard/DAC
- UINT32 PCMsid, PCMsidNoise;
+ UINT16 PCMfreq; // samplerate of the current systems soundcard/DAC
+ UINT32 PCMsid, PCMsidNoise;
#if 0
/* following depends on type */
@@ -53,7 +53,7 @@ struct SID6581_t
} filter;
sidOperator optr1, optr2, optr3;
- int optr3_outputmask;
+ int optr3_outputmask;
};
void sid6581_init (SID6581_t *This);
diff --git a/src/emu/sound/sid6581.c b/src/emu/sound/sid6581.c
index 0120b2b6e36..b04398344d0 100644
--- a/src/emu/sound/sid6581.c
+++ b/src/emu/sound/sid6581.c
@@ -88,13 +88,13 @@ const device_type SID6581 = &device_creator<sid6581_device>;
sid6581_device::sid6581_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SID6581, "SID6581", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(SID6581_t);
}
sid6581_device::sid6581_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(SID6581_t);
}
@@ -163,5 +163,3 @@ void sid8580_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/sid6581.h b/src/emu/sound/sid6581.h
index 8c56311b462..3166e295d17 100644
--- a/src/emu/sound/sid6581.h
+++ b/src/emu/sound/sid6581.h
@@ -32,7 +32,7 @@ struct sid6581_interface
struct SID6581_t;
class sid6581_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
sid6581_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/side6581.h b/src/emu/sound/side6581.h
index 56080587ad4..184bd899ac7 100644
--- a/src/emu/sound/side6581.h
+++ b/src/emu/sound/side6581.h
@@ -15,111 +15,111 @@
static const UINT8 releaseTab[] =
{
- 255, 255, 254, 254, 253, 253, 252, 252, 251, 251, 250, 250, 249, 249, 248,
- 248, 247, 247, 246, 246, 245, 245, 244, 244, 243, 243, 242, 242, 241, 241,
- 240, 240, 239, 239, 238, 238, 237, 237, 236, 236, 235, 235, 234, 234, 233,
- 233, 232, 232, 231, 231, 230, 230, 229, 229, 228, 228, 227, 227, 226, 226,
- 225, 225, 224, 224, 223, 223, 222, 222, 221, 221, 220, 220, 219, 219, 218,
- 218, 217, 217, 216, 216, 215, 215, 214, 214, 213, 213, 212, 212, 211, 211,
- 210, 210, 209, 209, 208, 208, 207, 207, 206, 206, 205, 205, 204, 204, 203,
- 203, 202, 202, 201, 201, 200, 200, 199, 199, 198, 198, 197, 197, 196, 196,
- 195, 195, 194, 194, 193, 193, 192, 192, 191, 191, 190, 190, 189, 189, 188,
- 188, 187, 187, 186, 186, 185, 185, 184, 184, 183, 183, 182, 182, 181, 181,
- 180, 180, 179, 179, 178, 178, 177, 177, 176, 176, 175, 175, 174, 174, 173,
- 173, 172, 172, 171, 171, 170, 170, 169, 169, 168, 168, 167, 167, 166, 166,
- 165, 165, 164, 164, 163, 163, 162, 162, 161, 161, 160, 160, 159, 159, 158,
- 158, 157, 157, 156, 156, 155, 155, 154, 154, 153, 153, 152, 152, 151, 151,
- 150, 150, 149, 149, 148, 148, 147, 147, 146, 146, 145, 145, 144, 144, 143,
- 143, 142, 142, 141, 141, 140, 140, 139, 139, 138, 138, 137, 137, 136, 136,
- 135, 135, 134, 134, 133, 133, 132, 132, 131, 131, 130, 130, 129, 129, 128,
- 128, 127, 127, 126, 126, 125, 125, 124, 124, 123, 123, 122, 122, 121, 121,
- 120, 120, 119, 119, 118, 118, 117, 117, 116, 116, 115, 115, 114, 114, 113,
- 113, 112, 112, 111, 111, 110, 110, 109, 109, 108, 108, 107, 107, 106, 106,
- 105, 105, 104, 104, 103, 103, 102, 102, 101, 101, 100, 100, 99, 99, 98,
- 98, 97, 97, 96, 96, 95, 95, 94, 94, 94, 94, 93, 93, 93, 93,
- 92, 92, 92, 92, 91, 91, 91, 91, 90, 90, 90, 90, 89, 89, 89,
- 89, 88, 88, 88, 88, 87, 87, 87, 87, 86, 86, 86, 86, 85, 85,
- 85, 85, 84, 84, 84, 84, 83, 83, 83, 83, 82, 82, 82, 82, 81,
- 81, 81, 81, 80, 80, 80, 80, 79, 79, 79, 79, 78, 78, 78, 78,
- 77, 77, 77, 77, 76, 76, 76, 76, 75, 75, 75, 75, 74, 74, 74,
- 74, 73, 73, 73, 73, 72, 72, 72, 72, 71, 71, 71, 71, 70, 70,
- 70, 70, 69, 69, 69, 69, 68, 68, 68, 68, 67, 67, 67, 67, 66,
- 66, 66, 66, 65, 65, 65, 65, 64, 64, 64, 64, 63, 63, 63, 63,
- 62, 62, 62, 62, 61, 61, 61, 61, 60, 60, 60, 60, 59, 59, 59,
- 59, 58, 58, 58, 58, 57, 57, 57, 57, 56, 56, 56, 56, 55, 55,
- 55, 55, 55, 55, 55, 55, 54, 54, 54, 54, 54, 54, 54, 54, 53,
- 53, 53, 53, 53, 53, 53, 53, 52, 52, 52, 52, 52, 52, 52, 52,
- 51, 51, 51, 51, 51, 51, 51, 51, 50, 50, 50, 50, 50, 50, 50,
- 50, 49, 49, 49, 49, 49, 49, 49, 49, 48, 48, 48, 48, 48, 48,
- 48, 48, 47, 47, 47, 47, 47, 47, 47, 47, 46, 46, 46, 46, 46,
- 46, 46, 46, 45, 45, 45, 45, 45, 45, 45, 45, 44, 44, 44, 44,
- 44, 44, 44, 44, 43, 43, 43, 43, 43, 43, 43, 43, 42, 42, 42,
- 42, 42, 42, 42, 42, 41, 41, 41, 41, 41, 41, 41, 41, 40, 40,
- 40, 40, 40, 40, 40, 40, 39, 39, 39, 39, 39, 39, 39, 39, 38,
- 38, 38, 38, 38, 38, 38, 38, 37, 37, 37, 37, 37, 37, 37, 37,
- 36, 36, 36, 36, 36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 35,
- 35, 34, 34, 34, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 33,
- 33, 33, 32, 32, 32, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31,
- 31, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 29, 29, 29, 29,
- 29, 29, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 27, 27, 27,
- 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 26, 26,
- 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 25,
- 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
- 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
- 24, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23,
- 23, 23, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22,
- 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21,
- 21, 21, 21, 21, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
- 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19,
- 19, 19, 19, 19, 19, 19, 18, 18, 18, 18, 18, 18, 18, 18, 18,
- 18, 18, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 17,
- 17, 17, 17, 17, 17, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16,
- 16, 16, 16, 16, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15,
- 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
- 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14,
- 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
- 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 13, 13,
- 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
- 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
- 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
- 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
- 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
- 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
- 11, 11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
- 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
- 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9,
- 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
- 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
- 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
- 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5,
- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
- 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0
+ 255, 255, 254, 254, 253, 253, 252, 252, 251, 251, 250, 250, 249, 249, 248,
+ 248, 247, 247, 246, 246, 245, 245, 244, 244, 243, 243, 242, 242, 241, 241,
+ 240, 240, 239, 239, 238, 238, 237, 237, 236, 236, 235, 235, 234, 234, 233,
+ 233, 232, 232, 231, 231, 230, 230, 229, 229, 228, 228, 227, 227, 226, 226,
+ 225, 225, 224, 224, 223, 223, 222, 222, 221, 221, 220, 220, 219, 219, 218,
+ 218, 217, 217, 216, 216, 215, 215, 214, 214, 213, 213, 212, 212, 211, 211,
+ 210, 210, 209, 209, 208, 208, 207, 207, 206, 206, 205, 205, 204, 204, 203,
+ 203, 202, 202, 201, 201, 200, 200, 199, 199, 198, 198, 197, 197, 196, 196,
+ 195, 195, 194, 194, 193, 193, 192, 192, 191, 191, 190, 190, 189, 189, 188,
+ 188, 187, 187, 186, 186, 185, 185, 184, 184, 183, 183, 182, 182, 181, 181,
+ 180, 180, 179, 179, 178, 178, 177, 177, 176, 176, 175, 175, 174, 174, 173,
+ 173, 172, 172, 171, 171, 170, 170, 169, 169, 168, 168, 167, 167, 166, 166,
+ 165, 165, 164, 164, 163, 163, 162, 162, 161, 161, 160, 160, 159, 159, 158,
+ 158, 157, 157, 156, 156, 155, 155, 154, 154, 153, 153, 152, 152, 151, 151,
+ 150, 150, 149, 149, 148, 148, 147, 147, 146, 146, 145, 145, 144, 144, 143,
+ 143, 142, 142, 141, 141, 140, 140, 139, 139, 138, 138, 137, 137, 136, 136,
+ 135, 135, 134, 134, 133, 133, 132, 132, 131, 131, 130, 130, 129, 129, 128,
+ 128, 127, 127, 126, 126, 125, 125, 124, 124, 123, 123, 122, 122, 121, 121,
+ 120, 120, 119, 119, 118, 118, 117, 117, 116, 116, 115, 115, 114, 114, 113,
+ 113, 112, 112, 111, 111, 110, 110, 109, 109, 108, 108, 107, 107, 106, 106,
+ 105, 105, 104, 104, 103, 103, 102, 102, 101, 101, 100, 100, 99, 99, 98,
+ 98, 97, 97, 96, 96, 95, 95, 94, 94, 94, 94, 93, 93, 93, 93,
+ 92, 92, 92, 92, 91, 91, 91, 91, 90, 90, 90, 90, 89, 89, 89,
+ 89, 88, 88, 88, 88, 87, 87, 87, 87, 86, 86, 86, 86, 85, 85,
+ 85, 85, 84, 84, 84, 84, 83, 83, 83, 83, 82, 82, 82, 82, 81,
+ 81, 81, 81, 80, 80, 80, 80, 79, 79, 79, 79, 78, 78, 78, 78,
+ 77, 77, 77, 77, 76, 76, 76, 76, 75, 75, 75, 75, 74, 74, 74,
+ 74, 73, 73, 73, 73, 72, 72, 72, 72, 71, 71, 71, 71, 70, 70,
+ 70, 70, 69, 69, 69, 69, 68, 68, 68, 68, 67, 67, 67, 67, 66,
+ 66, 66, 66, 65, 65, 65, 65, 64, 64, 64, 64, 63, 63, 63, 63,
+ 62, 62, 62, 62, 61, 61, 61, 61, 60, 60, 60, 60, 59, 59, 59,
+ 59, 58, 58, 58, 58, 57, 57, 57, 57, 56, 56, 56, 56, 55, 55,
+ 55, 55, 55, 55, 55, 55, 54, 54, 54, 54, 54, 54, 54, 54, 53,
+ 53, 53, 53, 53, 53, 53, 53, 52, 52, 52, 52, 52, 52, 52, 52,
+ 51, 51, 51, 51, 51, 51, 51, 51, 50, 50, 50, 50, 50, 50, 50,
+ 50, 49, 49, 49, 49, 49, 49, 49, 49, 48, 48, 48, 48, 48, 48,
+ 48, 48, 47, 47, 47, 47, 47, 47, 47, 47, 46, 46, 46, 46, 46,
+ 46, 46, 46, 45, 45, 45, 45, 45, 45, 45, 45, 44, 44, 44, 44,
+ 44, 44, 44, 44, 43, 43, 43, 43, 43, 43, 43, 43, 42, 42, 42,
+ 42, 42, 42, 42, 42, 41, 41, 41, 41, 41, 41, 41, 41, 40, 40,
+ 40, 40, 40, 40, 40, 40, 39, 39, 39, 39, 39, 39, 39, 39, 38,
+ 38, 38, 38, 38, 38, 38, 38, 37, 37, 37, 37, 37, 37, 37, 37,
+ 36, 36, 36, 36, 36, 36, 36, 36, 35, 35, 35, 35, 35, 35, 35,
+ 35, 34, 34, 34, 34, 34, 34, 34, 34, 33, 33, 33, 33, 33, 33,
+ 33, 33, 32, 32, 32, 32, 32, 32, 32, 32, 31, 31, 31, 31, 31,
+ 31, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 29, 29, 29, 29,
+ 29, 29, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 27, 27, 27,
+ 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 26, 26,
+ 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 26, 25,
+ 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25,
+ 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 24,
+ 24, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23,
+ 23, 23, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22, 22,
+ 22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21, 21,
+ 21, 21, 21, 21, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
+ 20, 20, 20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 19, 19, 19,
+ 19, 19, 19, 19, 19, 19, 18, 18, 18, 18, 18, 18, 18, 18, 18,
+ 18, 18, 18, 18, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 17,
+ 17, 17, 17, 17, 17, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16,
+ 16, 16, 16, 16, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15,
+ 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15,
+ 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14,
+ 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14,
+ 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 13, 13,
+ 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
+ 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13,
+ 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
+ 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
+ 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
+ 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
+ 11, 11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
+ 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
+ 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9,
+ 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
+ 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
+ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
+ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5,
+ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
+ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0
};
diff --git a/src/emu/sound/sidenvel.c b/src/emu/sound/sidenvel.c
index 5d49df6f20d..fdf22d98946 100644
--- a/src/emu/sound/sidenvel.c
+++ b/src/emu/sound/sidenvel.c
@@ -39,51 +39,51 @@
const UINT8 masterVolumeLevels[16] =
{
- 0, 17, 34, 51, 68, 85, 102, 119,
- 136, 153, 170, 187, 204, 221, 238, 255
+ 0, 17, 34, 51, 68, 85, 102, 119,
+ 136, 153, 170, 187, 204, 221, 238, 255
};
static UINT16 masterAmplModTable[16*256];
static const float attackTimes[16] =
{
- /* milliseconds */
+ /* milliseconds */
#if defined(SID_REFTIMES)
- 2.0f, 8.0f, 16.0f, 24.0f, 38.0f, 56.0f, 68.0f, 80.0f,
- 100.0f, 250.0f, 500.0f, 800.0f, 1000.0f, 3000.0f, 5000.0f, 8000.0f
+ 2.0f, 8.0f, 16.0f, 24.0f, 38.0f, 56.0f, 68.0f, 80.0f,
+ 100.0f, 250.0f, 500.0f, 800.0f, 1000.0f, 3000.0f, 5000.0f, 8000.0f
#else
- 2.2528606f, 8.0099577f, 15.7696042f, 23.7795619f, 37.2963655f, 55.0684591f,
- 66.8330845f, 78.3473987f,
- 98.1219818f, 244.554021f, 489.108042f, 782.472742f, 977.715461f, 2933.64701f,
- 4889.07793f, 7822.72493f
+ 2.2528606f, 8.0099577f, 15.7696042f, 23.7795619f, 37.2963655f, 55.0684591f,
+ 66.8330845f, 78.3473987f,
+ 98.1219818f, 244.554021f, 489.108042f, 782.472742f, 977.715461f, 2933.64701f,
+ 4889.07793f, 7822.72493f
#endif
};
static const float decayReleaseTimes[16] =
{
- /* milliseconds */
+ /* milliseconds */
#if defined(SID_REFTIMES)
- 8.0f, 24.0f, 48.0f, 72.0f, 114.0f, 168.0f, 204.0f, 240.0f,
- 300.0f, 750.0f, 1500.0f, 2400.0f, 3000.0f, 9000.0f, 15000.0f, 24000.0f
+ 8.0f, 24.0f, 48.0f, 72.0f, 114.0f, 168.0f, 204.0f, 240.0f,
+ 300.0f, 750.0f, 1500.0f, 2400.0f, 3000.0f, 9000.0f, 15000.0f, 24000.0f
#else
- 8.91777693f, 24.594051f, 48.4185907f, 73.0116639f, 114.512475f, 169.078356f,
- 205.199432f, 240.551975f,
- 301.266125f, 750.858245f, 1501.71551f, 2402.43682f, 3001.89298f, 9007.21405f,
- 15010.998f, 24018.2111f
+ 8.91777693f, 24.594051f, 48.4185907f, 73.0116639f, 114.512475f, 169.078356f,
+ 205.199432f, 240.551975f,
+ 301.266125f, 750.858245f, 1501.71551f, 2402.43682f, 3001.89298f, 9007.21405f,
+ 15010.998f, 24018.2111f
#endif
};
#ifdef SID_FPUENVE
- static float attackRates[16];
- static float decayReleaseRates[16];
+ static float attackRates[16];
+ static float decayReleaseRates[16];
#elif defined(DIRECT_FIXPOINT)
- static UINT32 attackRates[16];
- static UINT32 decayReleaseRates[16];
+ static UINT32 attackRates[16];
+ static UINT32 decayReleaseRates[16];
#else
- static UINT32 attackRates[16];
- static UINT32 attackRatesP[16];
- static UINT32 decayReleaseRates[16];
- static UINT32 decayReleaseRatesP[16];
+ static UINT32 attackRates[16];
+ static UINT32 attackRatesP[16];
+ static UINT32 decayReleaseRates[16];
+ static UINT32 decayReleaseRatesP[16];
#endif
static const UINT32 attackTabLen = 255;
@@ -223,11 +223,11 @@ const ptr2sidUwordFunc enveModeTable[] =
&enveEmuStartShortAttack,
&enveEmuMute, &enveEmuMute, &enveEmuMute,
&enveEmuMute, &enveEmuMute, &enveEmuMute, &enveEmuMute,
- /* 32 */
+ /* 32 */
&enveEmuStartAttack, &enveEmuStartRelease,
&enveEmuAlterAttack, &enveEmuAlterDecay, &enveEmuAlterSustain, &enveEmuAlterRelease,
&enveEmuAlterSustainDecay, &enveEmuMute,
- /* 48 */
+ /* 48 */
&enveEmuStartShortAttack,
&enveEmuMute, &enveEmuMute, &enveEmuMute,
&enveEmuMute, &enveEmuMute, &enveEmuMute, &enveEmuMute
@@ -548,7 +548,7 @@ INLINE UINT16 enveEmuShortAttack(sidOperator* pVoice)
#else
pVoice->enveVol = pVoice->enveStep;
#endif
- pVoice->enveShortAttackCount--;
+ pVoice->enveShortAttackCount--;
/* cout << hex << pVoice->enveShortAttackCount << " / " << pVoice->enveVol << endl; */
enveEmuEnveAdvance(pVoice);
return masterAmplModTable[ pVoice->sid->masterVolumeAmplIndex + pVoice->enveVol ];
diff --git a/src/emu/sound/sidvoice.c b/src/emu/sound/sidvoice.c
index 59da4ed3ba6..bc73fb33b65 100644
--- a/src/emu/sound/sidvoice.c
+++ b/src/emu/sound/sidvoice.c
@@ -13,12 +13,12 @@ static const UINT8* waveform50;
static const UINT8* waveform60;
static const UINT8* waveform70;
#if defined(LARGE_NOISE_TABLE)
- static UINT8 noiseTableMSB[1<<8];
- static UINT8 noiseTableLSB[1L<<16];
+ static UINT8 noiseTableMSB[1<<8];
+ static UINT8 noiseTableLSB[1L<<16];
#else
- static UINT8 noiseTableMSB[1<<8];
- static UINT8 noiseTableMID[1<<8];
- static UINT8 noiseTableLSB[1<<8];
+ static UINT8 noiseTableMSB[1<<8];
+ static UINT8 noiseTableMID[1<<8];
+ static UINT8 noiseTableLSB[1<<8];
#endif
static INT8* ampMod1x8;
@@ -75,15 +75,15 @@ INLINE void noiseAdvance(sidOperator* pVoice)
#endif
#if defined(DIRECT_FIXPOINT) && defined(LARGE_NOISE_TABLE)
pVoice->noiseOutput = (noiseTableLSB[pVoice->noiseReg.w[LO]]
- |noiseTableMSB[pVoice->noiseReg.w[HI]&0xff]);
+ |noiseTableMSB[pVoice->noiseReg.w[HI]&0xff]);
#elif defined(DIRECT_FIXPOINT)
pVoice->noiseOutput = (noiseTableLSB[pVoice->noiseReg.b[LOLO]]
- |noiseTableMID[pVoice->noiseReg.b[LOHI]]
- |noiseTableMSB[pVoice->noiseReg.b[HILO]]);
+ |noiseTableMID[pVoice->noiseReg.b[LOHI]]
+ |noiseTableMSB[pVoice->noiseReg.b[HILO]]);
#else
pVoice->noiseOutput = (noiseTableLSB[pVoice->noiseReg&0xff]
- |noiseTableMID[pVoice->noiseReg>>8&0xff]
- |noiseTableMSB[pVoice->noiseReg>>16&0xff]);
+ |noiseTableMID[pVoice->noiseReg>>8&0xff]
+ |noiseTableMSB[pVoice->noiseReg>>16&0xff]);
#endif
}
}
@@ -116,35 +116,35 @@ INLINE void noiseAdvanceHp(sidOperator* pVoice)
}
#if defined(DIRECT_FIXPOINT) && defined(LARGE_NOISE_TABLE)
pVoice->noiseOutput = (noiseTableLSB[pVoice->noiseReg.w[LO]]
- |noiseTableMSB[pVoice->noiseReg.w[HI]&0xff]);
+ |noiseTableMSB[pVoice->noiseReg.w[HI]&0xff]);
#elif defined(DIRECT_FIXPOINT)
pVoice->noiseOutput = (noiseTableLSB[pVoice->noiseReg.b[LOLO]]
- |noiseTableMID[pVoice->noiseReg.b[LOHI]]
- |noiseTableMSB[pVoice->noiseReg.b[HILO]]);
+ |noiseTableMID[pVoice->noiseReg.b[LOHI]]
+ |noiseTableMSB[pVoice->noiseReg.b[HILO]]);
#else
pVoice->noiseOutput = (noiseTableLSB[pVoice->noiseReg&0xff]
- |noiseTableMID[pVoice->noiseReg>>8&0xff]
- |noiseTableMSB[pVoice->noiseReg>>16&0xff]);
+ |noiseTableMID[pVoice->noiseReg>>8&0xff]
+ |noiseTableMSB[pVoice->noiseReg>>16&0xff]);
#endif
}
#if defined(DIRECT_FIXPOINT)
- #define triangle triangleTable[pVoice->waveStep.w[HI]]
- #define sawtooth sawtoothTable[pVoice->waveStep.w[HI]]
- #define square squareTable[pVoice->waveStep.w[HI] + pVoice->pulseIndex]
- #define triSaw waveform30[pVoice->waveStep.w[HI]]
- #define triSquare waveform50[pVoice->waveStep.w[HI] + pVoice->SIDpulseWidth]
- #define sawSquare waveform60[pVoice->waveStep.w[HI] + pVoice->SIDpulseWidth]
- #define triSawSquare waveform70[pVoice->waveStep.w[HI] + pVoice->SIDpulseWidth]
+ #define triangle triangleTable[pVoice->waveStep.w[HI]]
+ #define sawtooth sawtoothTable[pVoice->waveStep.w[HI]]
+ #define square squareTable[pVoice->waveStep.w[HI] + pVoice->pulseIndex]
+ #define triSaw waveform30[pVoice->waveStep.w[HI]]
+ #define triSquare waveform50[pVoice->waveStep.w[HI] + pVoice->SIDpulseWidth]
+ #define sawSquare waveform60[pVoice->waveStep.w[HI] + pVoice->SIDpulseWidth]
+ #define triSawSquare waveform70[pVoice->waveStep.w[HI] + pVoice->SIDpulseWidth]
#else
- #define triangle triangleTable[pVoice->waveStep]
- #define sawtooth sawtoothTable[pVoice->waveStep]
- #define square squareTable[pVoice->waveStep + pVoice->pulseIndex]
- #define triSaw waveform30[pVoice->waveStep]
- #define triSquare waveform50[pVoice->waveStep + pVoice->SIDpulseWidth]
- #define sawSquare waveform60[pVoice->waveStep + pVoice->SIDpulseWidth]
- #define triSawSquare waveform70[pVoice->waveStep + pVoice->SIDpulseWidth]
+ #define triangle triangleTable[pVoice->waveStep]
+ #define sawtooth sawtoothTable[pVoice->waveStep]
+ #define square squareTable[pVoice->waveStep + pVoice->pulseIndex]
+ #define triSaw waveform30[pVoice->waveStep]
+ #define triSquare waveform50[pVoice->waveStep + pVoice->SIDpulseWidth]
+ #define sawSquare waveform60[pVoice->waveStep + pVoice->SIDpulseWidth]
+ #define triSawSquare waveform70[pVoice->waveStep + pVoice->SIDpulseWidth]
#endif
@@ -162,50 +162,50 @@ static void sidModeReal00(sidOperator* pVoice) {
#endif
static void sidMode10(sidOperator* pVoice) {
- pVoice->output = triangle;
- waveAdvance(pVoice);
+ pVoice->output = triangle;
+ waveAdvance(pVoice);
}
static void sidMode20(sidOperator* pVoice) {
- pVoice->output = sawtooth;
- waveAdvance(pVoice);
+ pVoice->output = sawtooth;
+ waveAdvance(pVoice);
}
static void sidMode30(sidOperator* pVoice) {
- pVoice->output = triSaw;
- waveAdvance(pVoice);
+ pVoice->output = triSaw;
+ waveAdvance(pVoice);
}
static void sidMode40(sidOperator* pVoice) {
- pVoice->output = square;
- waveAdvance(pVoice);
+ pVoice->output = square;
+ waveAdvance(pVoice);
}
static void sidMode50(sidOperator* pVoice) {
- pVoice->output = triSquare;
- waveAdvance(pVoice);
+ pVoice->output = triSquare;
+ waveAdvance(pVoice);
}
static void sidMode60(sidOperator* pVoice) {
- pVoice->output = sawSquare;
- waveAdvance(pVoice);
+ pVoice->output = sawSquare;
+ waveAdvance(pVoice);
}
static void sidMode70(sidOperator* pVoice) {
- pVoice->output = triSawSquare;
- waveAdvance(pVoice);
+ pVoice->output = triSawSquare;
+ waveAdvance(pVoice);
}
static void sidMode80(sidOperator* pVoice) {
- pVoice->output = pVoice->noiseOutput;
- waveAdvance(pVoice);
- noiseAdvance(pVoice);
+ pVoice->output = pVoice->noiseOutput;
+ waveAdvance(pVoice);
+ noiseAdvance(pVoice);
}
static void sidMode80hp(sidOperator* pVoice) {
- pVoice->output = pVoice->noiseOutput;
- waveAdvance(pVoice);
- noiseAdvanceHp(pVoice);
+ pVoice->output = pVoice->noiseOutput;
+ waveAdvance(pVoice);
+ noiseAdvanceHp(pVoice);
}
static void sidModeLock(sidOperator* pVoice)
@@ -222,50 +222,50 @@ static void sidModeLock(sidOperator* pVoice)
static void sidMode14(sidOperator* pVoice)
{
#if defined(DIRECT_FIXPOINT)
- if ( pVoice->modulator->waveStep.w[HI] < 2048 )
+ if ( pVoice->modulator->waveStep.w[HI] < 2048 )
#else
- if ( pVoice->modulator->waveStep < 2048 )
+ if ( pVoice->modulator->waveStep < 2048 )
#endif
pVoice->output = triangle;
- else
+ else
pVoice->output = 0xFF ^ triangle;
- waveAdvance(pVoice);
+ waveAdvance(pVoice);
}
static void sidMode34(sidOperator* pVoice) {
#if defined(DIRECT_FIXPOINT)
- if ( pVoice->modulator->waveStep.w[HI] < 2048 )
+ if ( pVoice->modulator->waveStep.w[HI] < 2048 )
#else
- if ( pVoice->modulator->waveStep < 2048 )
+ if ( pVoice->modulator->waveStep < 2048 )
#endif
pVoice->output = triSaw;
- else
+ else
pVoice->output = 0xFF ^ triSaw;
- waveAdvance(pVoice);
+ waveAdvance(pVoice);
}
static void sidMode54(sidOperator* pVoice) {
#if defined(DIRECT_FIXPOINT)
- if ( pVoice->modulator->waveStep.w[HI] < 2048 )
+ if ( pVoice->modulator->waveStep.w[HI] < 2048 )
#else
- if ( pVoice->modulator->waveStep < 2048 )
+ if ( pVoice->modulator->waveStep < 2048 )
#endif
pVoice->output = triSquare;
- else
- pVoice->output = 0xFF ^ triSquare;
- waveAdvance(pVoice);
+ else
+ pVoice->output = 0xFF ^ triSquare;
+ waveAdvance(pVoice);
}
static void sidMode74(sidOperator* pVoice) {
#if defined(DIRECT_FIXPOINT)
- if ( pVoice->modulator->waveStep.w[HI] < 2048 )
+ if ( pVoice->modulator->waveStep.w[HI] < 2048 )
#else
- if ( pVoice->modulator->waveStep < 2048 )
+ if ( pVoice->modulator->waveStep < 2048 )
#endif
pVoice->output = triSawSquare;
- else
- pVoice->output = 0xFF ^ triSawSquare;
- waveAdvance(pVoice);
+ else
+ pVoice->output = 0xFF ^ triSawSquare;
+ waveAdvance(pVoice);
}
/* */
@@ -490,19 +490,19 @@ void sidEmuSet(sidOperator* pVoice)
#endif
- oldWave = pVoice->SIDctrl;
- enveTemp = pVoice->ADSRctrl;
- pVoice->SIDctrl = (newWave = pVoice->reg[4]|(pVoice->reg[5]<<8));
+ oldWave = pVoice->SIDctrl;
+ enveTemp = pVoice->ADSRctrl;
+ pVoice->SIDctrl = (newWave = pVoice->reg[4]|(pVoice->reg[5]<<8));
- if (( newWave & 1 ) ==0 )
- {
+ if (( newWave & 1 ) ==0 )
+ {
if (( oldWave & 1 ) !=0 )
- enveTemp = ENVE_STARTRELEASE;
+ enveTemp = ENVE_STARTRELEASE;
/* else if ( pVoice->gateOnCtrl ) */
/* { */
/* enveTemp = ENVE_STARTSHORTATTACK; */
/* } */
- }
+ }
else if ( /*pVoice->gateOffCtrl || */((oldWave&1)==0) )
{
enveTemp = ENVE_STARTATTACK;
@@ -550,15 +550,15 @@ void sidEmuSet(sidOperator* pVoice)
/* MOS-8580, MOS-6581 (no 70) */
static ptr2sidVoidFunc sidModeNormalTable[16] =
{
- sidMode00, sidMode10, sidMode20, sidMode30, sidMode40, sidMode50, sidMode60, sidMode70,
- sidMode80, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock
+ sidMode00, sidMode10, sidMode20, sidMode30, sidMode40, sidMode50, sidMode60, sidMode70,
+ sidMode80, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock
};
/* MOS-8580, MOS-6581 (no 74) */
static ptr2sidVoidFunc sidModeRingTable[16] =
{
- sidMode00, sidMode14, sidMode00, sidMode34, sidMode00, sidMode54, sidMode00, sidMode74,
- sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock
+ sidMode00, sidMode14, sidMode00, sidMode34, sidMode00, sidMode54, sidMode00, sidMode74,
+ sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock, sidModeLock
};
void sidClearOperator( sidOperator* pVoice )
@@ -614,98 +614,98 @@ void sidClearOperator( sidOperator* pVoice )
void sidEmuSet2(sidOperator* pVoice)
{
- pVoice->outProc = &sidWaveCalcNormal;
- pVoice->sync = FALSE;
+ pVoice->outProc = &sidWaveCalcNormal;
+ pVoice->sync = FALSE;
- if ( (pVoice->SIDfreq < 16) || ((pVoice->SIDctrl & 8) != 0) )
+ if ( (pVoice->SIDfreq < 16) || ((pVoice->SIDctrl & 8) != 0) )
// if ( /*(pVoice->SIDfreq < 16) || */((pVoice->SIDctrl & 8) != 0) )
- {
+ {
pVoice->outProc = waveCalcMute;
if (pVoice->SIDfreq == 0)
{
#if defined(DIRECT_FIXPOINT)
- pVoice->cycleLen.l = (pVoice->cycleAddLen.l = 0);
- pVoice->waveStep.l = 0;
+ pVoice->cycleLen.l = (pVoice->cycleAddLen.l = 0);
+ pVoice->waveStep.l = 0;
#else
- pVoice->cycleLen = (pVoice->cycleLenPnt = 0);
- pVoice->cycleAddLenPnt = 0;
- pVoice->waveStep = 0;
- pVoice->waveStepPnt = 0;
+ pVoice->cycleLen = (pVoice->cycleLenPnt = 0);
+ pVoice->cycleAddLenPnt = 0;
+ pVoice->waveStep = 0;
+ pVoice->waveStepPnt = 0;
#endif
- pVoice->curSIDfreq = (pVoice->curNoiseFreq = 0);
- pVoice->noiseStepAdd = 0;
- pVoice->cycleLenCount = 0;
+ pVoice->curSIDfreq = (pVoice->curNoiseFreq = 0);
+ pVoice->noiseStepAdd = 0;
+ pVoice->cycleLenCount = 0;
}
if ((pVoice->SIDctrl & 8) != 0)
{
- if (pVoice->noiseIsLocked)
- {
+ if (pVoice->noiseIsLocked)
+ {
pVoice->noiseIsLocked = FALSE;
#if defined(DIRECT_FIXPOINT)
pVoice->noiseReg.l = noiseSeed;
#else
pVoice->noiseReg = noiseSeed;
#endif
- }
+ }
+ }
}
- }
- else
- {
+ else
+ {
if ( pVoice->curSIDfreq != pVoice->SIDfreq )
{
- pVoice->curSIDfreq = pVoice->SIDfreq;
- /* We keep the value cycleLen between 1 <= x <= 65535. */
- /* This makes a range-check in waveCalcCycleLen() unrequired. */
+ pVoice->curSIDfreq = pVoice->SIDfreq;
+ /* We keep the value cycleLen between 1 <= x <= 65535. */
+ /* This makes a range-check in waveCalcCycleLen() unrequired. */
#if defined(DIRECT_FIXPOINT)
- pVoice->cycleLen.l = ((pVoice->sid->PCMsid << 12) / pVoice->SIDfreq) << 4;
- if (pVoice->cycleLenCount > 0)
- {
+ pVoice->cycleLen.l = ((pVoice->sid->PCMsid << 12) / pVoice->SIDfreq) << 4;
+ if (pVoice->cycleLenCount > 0)
+ {
waveCalcCycleLen(pVoice);
pVoice->outProc = &waveCalcRangeCheck;
- }
+ }
#else
- pVoice->cycleLen = pVoice->sid->PCMsid / pVoice->SIDfreq;
- pVoice->cycleLenPnt = (( pVoice->sid->PCMsid % pVoice->SIDfreq ) * 65536UL ) / pVoice->SIDfreq;
- if (pVoice->cycleLenCount > 0)
- {
+ pVoice->cycleLen = pVoice->sid->PCMsid / pVoice->SIDfreq;
+ pVoice->cycleLenPnt = (( pVoice->sid->PCMsid % pVoice->SIDfreq ) * 65536UL ) / pVoice->SIDfreq;
+ if (pVoice->cycleLenCount > 0)
+ {
waveCalcCycleLen(pVoice);
pVoice->outProc = &waveCalcRangeCheck;
- }
+ }
#endif
}
if ((( pVoice->SIDctrl & 0x80 ) == 0x80 ) && ( pVoice->curNoiseFreq != pVoice->SIDfreq ))
{
- pVoice->curNoiseFreq = pVoice->SIDfreq;
- pVoice->noiseStepAdd = (pVoice->sid->PCMsidNoise * pVoice->SIDfreq) >> 8;
- if (pVoice->noiseStepAdd >= (1L<<21))
+ pVoice->curNoiseFreq = pVoice->SIDfreq;
+ pVoice->noiseStepAdd = (pVoice->sid->PCMsidNoise * pVoice->SIDfreq) >> 8;
+ if (pVoice->noiseStepAdd >= (1L<<21))
sidModeNormalTable[8] = sidMode80hp;
- else
+ else
sidModeNormalTable[8] = sidMode80;
}
if (( pVoice->SIDctrl & 2 ) != 0 )
{
- if ( ( pVoice->modulator->SIDfreq == 0 ) || (( pVoice->modulator->SIDctrl & 8 ) != 0 ) )
- {
+ if ( ( pVoice->modulator->SIDfreq == 0 ) || (( pVoice->modulator->SIDctrl & 8 ) != 0 ) )
+ {
;
- }
- else if ( (( pVoice->carrier->SIDctrl & 2 ) != 0 ) &&
- ( pVoice->modulator->SIDfreq >= ( pVoice->SIDfreq << 1 )) )
- {
+ }
+ else if ( (( pVoice->carrier->SIDctrl & 2 ) != 0 ) &&
+ ( pVoice->modulator->SIDfreq >= ( pVoice->SIDfreq << 1 )) )
+ {
;
- }
- else
- {
+ }
+ else
+ {
pVoice->sync = TRUE;
- }
+ }
}
if ((( pVoice->SIDctrl & 0x14 ) == 0x14 ) && ( pVoice->modulator->SIDfreq != 0 ))
- pVoice->waveProc = sidModeRingTable[pVoice->SIDctrl >> 4];
+ pVoice->waveProc = sidModeRingTable[pVoice->SIDctrl >> 4];
else
- pVoice->waveProc = sidModeNormalTable[pVoice->SIDctrl >> 4];
- }
+ pVoice->waveProc = sidModeNormalTable[pVoice->SIDctrl >> 4];
+ }
}
void sidInitWaveformTables(SIDTYPE type)
@@ -728,23 +728,23 @@ void sidInitWaveformTables(SIDTYPE type)
k = 0;
for ( i = 0; i < 4096; i++ )
- squareTable[k++] = 255; //0; my estimation; especial for digi sound
+ squareTable[k++] = 255; //0; my estimation; especial for digi sound
for ( i = 0; i < 4096; i++ )
- squareTable[k++] = 0; //255;
+ squareTable[k++] = 0; //255;
if ( type==MOS8580 )
{
- waveform30 = waveform30_8580;
- waveform50 = waveform50_8580;
- waveform60 = waveform60_8580;
- waveform70 = waveform70_8580;
+ waveform30 = waveform30_8580;
+ waveform50 = waveform50_8580;
+ waveform60 = waveform60_8580;
+ waveform70 = waveform70_8580;
}
else
{
- waveform30 = waveform30_6581;
- waveform50 = waveform50_6581;
- waveform60 = waveform60_6581;
- waveform70 = waveform70_6581; /* really audible? */
+ waveform30 = waveform30_6581;
+ waveform50 = waveform50_6581;
+ waveform60 = waveform60_6581;
+ waveform70 = waveform70_6581; /* really audible? */
}
if ( type==MOS8580 )
@@ -769,17 +769,17 @@ void sidInitWaveformTables(SIDTYPE type)
{
noiseTableLSB[ni] = (UINT8)
(((ni >> (13-4)) & 0x10) |
- ((ni >> (11-3)) & 0x08) |
- ((ni >> (7-2)) & 0x04) |
- ((ni >> (4-1)) & 0x02) |
- ((ni >> (2-0)) & 0x01));
+ ((ni >> (11-3)) & 0x08) |
+ ((ni >> (7-2)) & 0x04) |
+ ((ni >> (4-1)) & 0x02) |
+ ((ni >> (2-0)) & 0x01));
}
for (ni = 0; ni < sizeof(noiseTableMSB); ni++)
{
noiseTableMSB[ni] = (UINT8)
(((ni << (7-(22-16))) & 0x80) |
- ((ni << (6-(20-16))) & 0x40) |
- ((ni << (5-(16-16))) & 0x20));
+ ((ni << (6-(20-16))) & 0x40) |
+ ((ni << (5-(16-16))) & 0x20));
}
#else
UINT32 ni;
@@ -787,23 +787,22 @@ void sidInitWaveformTables(SIDTYPE type)
{
noiseTableLSB[ni] = (UINT8)
(((ni >> (7-2)) & 0x04) |
- ((ni >> (4-1)) & 0x02) |
- ((ni >> (2-0)) & 0x01));
+ ((ni >> (4-1)) & 0x02) |
+ ((ni >> (2-0)) & 0x01));
}
for (ni = 0; ni < sizeof(noiseTableMID); ni++)
{
noiseTableMID[ni] = (UINT8)
(((ni >> (13-8-4)) & 0x10) |
- ((ni << (3-(11-8))) & 0x08));
+ ((ni << (3-(11-8))) & 0x08));
}
for (ni = 0; ni < sizeof(noiseTableMSB); ni++)
{
noiseTableMSB[ni] = (UINT8)
(((ni << (7-(22-16))) & 0x80) |
- ((ni << (6-(20-16))) & 0x40) |
- ((ni << (5-(16-16))) & 0x20));
+ ((ni << (6-(20-16))) & 0x40) |
+ ((ni << (5-(16-16))) & 0x20));
}
#endif
}
}
-
diff --git a/src/emu/sound/sidvoice.h b/src/emu/sound/sidvoice.h
index 92fb9b35e44..dcf865a5efe 100644
--- a/src/emu/sound/sidvoice.h
+++ b/src/emu/sound/sidvoice.h
@@ -40,7 +40,7 @@ struct sidOperator
UINT16 curSIDfreq;
UINT16 curNoiseFreq;
- UINT8 output;//, outputMask;
+ UINT8 output;//, outputMask;
char filtVoiceMask;
int filtEnabled;
diff --git a/src/emu/sound/sidw6581.h b/src/emu/sound/sidw6581.h
index 2f79f1260d3..7ee07305200 100644
--- a/src/emu/sound/sidw6581.h
+++ b/src/emu/sound/sidw6581.h
@@ -10,1042 +10,1042 @@
static const UINT8 waveform30_6581[4096] =
{
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x3, 0x3,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x7, 0x7, 0x7, 0x7,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x3, 0x3,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x1,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
- 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
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+ 0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,0x38,
+ 0x3c,0x3c,0x3c,0x3c,0x3c,0x3c,0x3c,0x3c,0x3e,0x3e,0x3f,0x3f,0x7f,0x7f,0x7f,0x7f
};
static const UINT8 waveform50_6581[4096+4096] =
{
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static const UINT8 waveform60_6581[4096+4096] =
{
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static const UINT8 waveform70_6581[4096+4096] =
{
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+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,0x20,
+ 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,0x30, 0x0, 0x0, 0x0,0x78,0x78,0x7e,0x7f,0x7f
};
#endif // WAVE6581_h
diff --git a/src/emu/sound/sn76477.c b/src/emu/sound/sn76477.c
index 31b545b0179..72ebfeec243 100644
--- a/src/emu/sound/sn76477.c
+++ b/src/emu/sound/sn76477.c
@@ -39,16 +39,16 @@
*
*****************************************************************************/
-#define VERBOSE 1
+#define VERBOSE 1
/* if 1, create a .wav file of the sound produced */
-#define LOG_WAV 0
+#define LOG_WAV 0
/* if 1 and LOG_WAV is 1, only logs to .wav file in chip is enabled */
-#define LOG_WAV_ENABLED_ONLY 0
+#define LOG_WAV_ENABLED_ONLY 0
/* determines what value will be logged in the left channel of the .wav file */
-#define LOG_WAV_VALUE_L 0 /* 0 = OUT voltage */
+#define LOG_WAV_VALUE_L 0 /* 0 = OUT voltage */
/* 1 = enable line */
/* 2 = one-shot cap voltage */
/* 3 = a/d cap voltage */
@@ -58,20 +58,20 @@
/* determines what value will be logged in the right channel of the .wav file
same values as for the left channel above */
-#define LOG_WAV_VALUE_R 3
+#define LOG_WAV_VALUE_R 3
-#define LOG_WAV_GAIN_FACTOR 1000
+#define LOG_WAV_GAIN_FACTOR 1000
-#define LOG_WAV_FILE_NAME "sn76477_%s.wav"
+#define LOG_WAV_FILE_NAME "sn76477_%s.wav"
#define LOG(n,x) do { if (VERBOSE >= (n)) logerror x; } while (0)
-#define CHECK_CHIP_NUM assert(sn != NULL)
-#define CHECK_CHIP_NUM_AND_BOOLEAN CHECK_CHIP_NUM; assert((state & 0x01) == state)
-#define CHECK_CHIP_NUM_AND_POSITIVE CHECK_CHIP_NUM; assert(data >= 0.0)
-#define CHECK_CHIP_NUM_AND_VOLTAGE CHECK_CHIP_NUM; assert((data >= 0.0) && (data <= 5.0))
-#define CHECK_CHIP_NUM_AND_CAP_VOLTAGE CHECK_CHIP_NUM; assert(((data >= 0.0) && (data <= 5.0)) || (data == SN76477_EXTERNAL_VOLTAGE_DISCONNECT))
+#define CHECK_CHIP_NUM assert(sn != NULL)
+#define CHECK_CHIP_NUM_AND_BOOLEAN CHECK_CHIP_NUM; assert((state & 0x01) == state)
+#define CHECK_CHIP_NUM_AND_POSITIVE CHECK_CHIP_NUM; assert(data >= 0.0)
+#define CHECK_CHIP_NUM_AND_VOLTAGE CHECK_CHIP_NUM; assert((data >= 0.0) && (data <= 5.0))
+#define CHECK_CHIP_NUM_AND_CAP_VOLTAGE CHECK_CHIP_NUM; assert(((data >= 0.0) && (data <= 5.0)) || (data == SN76477_EXTERNAL_VOLTAGE_DISCONNECT))
@@ -89,36 +89,36 @@
*
*****************************************************************************/
-#define TEST_MODE 0
+#define TEST_MODE 0
#if TEST_MODE
static const sn76477_interface empty_interface =
{
- 0, /* 4 noise_clock_res */
- 0, /* 5 filter_res */
- 0, /* 6 filter_cap */
- 0, /* 7 decay_res */
- 0, /* 8 attack_decay_cap */
- 0, /* 10 attack_res */
- 0, /* 11 amplitude_res */
- 0, /* 12 feedback_res */
- 0, /* 16 vco_voltage */
- 0, /* 17 vco_cap */
- 0, /* 18 vco_res */
- 0, /* 19 pitch_voltage */
- 0, /* 20 slf_res */
- 0, /* 21 slf_cap */
- 0, /* 23 oneshot_cap */
- 0, /* 24 oneshot_res */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 0, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 0 /* 9 enable */
+ 0, /* 4 noise_clock_res */
+ 0, /* 5 filter_res */
+ 0, /* 6 filter_cap */
+ 0, /* 7 decay_res */
+ 0, /* 8 attack_decay_cap */
+ 0, /* 10 attack_res */
+ 0, /* 11 amplitude_res */
+ 0, /* 12 feedback_res */
+ 0, /* 16 vco_voltage */
+ 0, /* 17 vco_cap */
+ 0, /* 18 vco_res */
+ 0, /* 19 pitch_voltage */
+ 0, /* 20 slf_res */
+ 0, /* 21 slf_cap */
+ 0, /* 23 oneshot_cap */
+ 0, /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 0, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 0 /* 9 enable */
};
#define test_interface empty_empty_interface
@@ -133,56 +133,56 @@ static const sn76477_interface empty_interface =
*
*****************************************************************************/
-#define ONE_SHOT_CAP_VOLTAGE_MIN (0) /* the voltage at which the one-shot starts from (measured) */
-#define ONE_SHOT_CAP_VOLTAGE_MAX (2.5) /* the voltage at which the one-shot finishes (measured) */
-#define ONE_SHOT_CAP_VOLTAGE_RANGE (ONE_SHOT_CAP_VOLTAGE_MAX - ONE_SHOT_CAP_VOLTAGE_MIN)
+#define ONE_SHOT_CAP_VOLTAGE_MIN (0) /* the voltage at which the one-shot starts from (measured) */
+#define ONE_SHOT_CAP_VOLTAGE_MAX (2.5) /* the voltage at which the one-shot finishes (measured) */
+#define ONE_SHOT_CAP_VOLTAGE_RANGE (ONE_SHOT_CAP_VOLTAGE_MAX - ONE_SHOT_CAP_VOLTAGE_MIN)
-#define SLF_CAP_VOLTAGE_MIN (0.33) /* the voltage at the bottom peak of the SLF triangle wave (measured) */
-#define SLF_CAP_VOLTAGE_MAX (2.37) /* the voltage at the top peak of the SLF triangle wave (measured) */
-#define SLF_CAP_VOLTAGE_RANGE (SLF_CAP_VOLTAGE_MAX - SLF_CAP_VOLTAGE_MIN)
+#define SLF_CAP_VOLTAGE_MIN (0.33) /* the voltage at the bottom peak of the SLF triangle wave (measured) */
+#define SLF_CAP_VOLTAGE_MAX (2.37) /* the voltage at the top peak of the SLF triangle wave (measured) */
+#define SLF_CAP_VOLTAGE_RANGE (SLF_CAP_VOLTAGE_MAX - SLF_CAP_VOLTAGE_MIN)
-#define VCO_MAX_EXT_VOLTAGE (2.35) /* the external voltage at which the VCO saturates and produces no output,
+#define VCO_MAX_EXT_VOLTAGE (2.35) /* the external voltage at which the VCO saturates and produces no output,
also used as the voltage threshold for the SLF */
-#define VCO_TO_SLF_VOLTAGE_DIFF (0.35)
-#define VCO_CAP_VOLTAGE_MIN (SLF_CAP_VOLTAGE_MIN) /* the voltage at the bottom peak of the VCO triangle wave */
-#define VCO_CAP_VOLTAGE_MAX (SLF_CAP_VOLTAGE_MAX + VCO_TO_SLF_VOLTAGE_DIFF) /* the voltage at the bottom peak of the VCO triangle wave */
-#define VCO_CAP_VOLTAGE_RANGE (VCO_CAP_VOLTAGE_MAX - VCO_CAP_VOLTAGE_MIN)
-#define VCO_DUTY_CYCLE_50 (5.0) /* the high voltage that produces a 50% duty cycle */
-#define VCO_MIN_DUTY_CYCLE (18) /* the smallest possible duty cycle, in % */
-
-#define NOISE_MIN_CLOCK_RES RES_K(10) /* the maximum resistor value that still produces a noise (measured) */
-#define NOISE_MAX_CLOCK_RES RES_M(3.3) /* the minimum resistor value that still produces a noise (measured) */
-#define NOISE_CAP_VOLTAGE_MIN (0) /* the minimum voltage that the noise filter cap can hold (measured) */
-#define NOISE_CAP_VOLTAGE_MAX (5.0) /* the maximum voltage that the noise filter cap can hold (measured) */
-#define NOISE_CAP_VOLTAGE_RANGE (NOISE_CAP_VOLTAGE_MAX - NOISE_CAP_VOLTAGE_MIN)
-#define NOISE_CAP_HIGH_THRESHOLD (3.35) /* the voltage at which the filtered noise bit goes to 0 (measured) */
-#define NOISE_CAP_LOW_THRESHOLD (0.74) /* the voltage at which the filtered noise bit goes to 1 (measured) */
-
-#define AD_CAP_VOLTAGE_MIN (0) /* the minimum voltage the attack/decay cap can hold (measured) */
-#define AD_CAP_VOLTAGE_MAX (4.44) /* the minimum voltage the attack/decay cap can hold (measured) */
-#define AD_CAP_VOLTAGE_RANGE (AD_CAP_VOLTAGE_MAX - AD_CAP_VOLTAGE_MIN)
-
-#define OUT_CENTER_LEVEL_VOLTAGE (2.57) /* the voltage that gets outputted when the volumne is 0 (measured) */
-#define OUT_HIGH_CLIP_THRESHOLD (3.51) /* the maximum voltage that can be put out (measured) */
-#define OUT_LOW_CLIP_THRESHOLD (0.715) /* the minimum voltage that can be put out (measured) */
+#define VCO_TO_SLF_VOLTAGE_DIFF (0.35)
+#define VCO_CAP_VOLTAGE_MIN (SLF_CAP_VOLTAGE_MIN) /* the voltage at the bottom peak of the VCO triangle wave */
+#define VCO_CAP_VOLTAGE_MAX (SLF_CAP_VOLTAGE_MAX + VCO_TO_SLF_VOLTAGE_DIFF) /* the voltage at the bottom peak of the VCO triangle wave */
+#define VCO_CAP_VOLTAGE_RANGE (VCO_CAP_VOLTAGE_MAX - VCO_CAP_VOLTAGE_MIN)
+#define VCO_DUTY_CYCLE_50 (5.0) /* the high voltage that produces a 50% duty cycle */
+#define VCO_MIN_DUTY_CYCLE (18) /* the smallest possible duty cycle, in % */
+
+#define NOISE_MIN_CLOCK_RES RES_K(10) /* the maximum resistor value that still produces a noise (measured) */
+#define NOISE_MAX_CLOCK_RES RES_M(3.3) /* the minimum resistor value that still produces a noise (measured) */
+#define NOISE_CAP_VOLTAGE_MIN (0) /* the minimum voltage that the noise filter cap can hold (measured) */
+#define NOISE_CAP_VOLTAGE_MAX (5.0) /* the maximum voltage that the noise filter cap can hold (measured) */
+#define NOISE_CAP_VOLTAGE_RANGE (NOISE_CAP_VOLTAGE_MAX - NOISE_CAP_VOLTAGE_MIN)
+#define NOISE_CAP_HIGH_THRESHOLD (3.35) /* the voltage at which the filtered noise bit goes to 0 (measured) */
+#define NOISE_CAP_LOW_THRESHOLD (0.74) /* the voltage at which the filtered noise bit goes to 1 (measured) */
+
+#define AD_CAP_VOLTAGE_MIN (0) /* the minimum voltage the attack/decay cap can hold (measured) */
+#define AD_CAP_VOLTAGE_MAX (4.44) /* the minimum voltage the attack/decay cap can hold (measured) */
+#define AD_CAP_VOLTAGE_RANGE (AD_CAP_VOLTAGE_MAX - AD_CAP_VOLTAGE_MIN)
+
+#define OUT_CENTER_LEVEL_VOLTAGE (2.57) /* the voltage that gets outputted when the volumne is 0 (measured) */
+#define OUT_HIGH_CLIP_THRESHOLD (3.51) /* the maximum voltage that can be put out (measured) */
+#define OUT_LOW_CLIP_THRESHOLD (0.715) /* the minimum voltage that can be put out (measured) */
/* gain factors for OUT voltage in 0.1V increments (measured) */
static const double out_pos_gain[] =
{
- 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.01, /* 0.0 - 0.9V */
+ 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.01, /* 0.0 - 0.9V */
0.03, 0.11, 0.15, 0.19, 0.21, 0.23, 0.26, 0.29, 0.31, 0.33, /* 1.0 - 1.9V */
0.36, 0.38, 0.41, 0.43, 0.46, 0.49, 0.52, 0.54, 0.57, 0.60, /* 2.0 - 2.9V */
0.62, 0.65, 0.68, 0.70, 0.73, 0.76, 0.80, 0.82, 0.84, 0.87, /* 3.0 - 3.9V */
- 0.90, 0.93, 0.96, 0.98, 1.00 /* 4.0 - 4.4V */
+ 0.90, 0.93, 0.96, 0.98, 1.00 /* 4.0 - 4.4V */
};
static const double out_neg_gain[] =
{
- 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, -0.01, /* 0.0 - 0.9V */
+ 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, 0.00, -0.01, /* 0.0 - 0.9V */
-0.02, -0.09, -0.13, -0.15, -0.17, -0.19, -0.22, -0.24, -0.26, -0.28, /* 1.0 - 1.9V */
-0.30, -0.32, -0.34, -0.37, -0.39, -0.41, -0.44, -0.46, -0.48, -0.51, /* 2.0 - 2.9V */
-0.53, -0.56, -0.58, -0.60, -0.62, -0.65, -0.67, -0.69, -0.72, -0.74, /* 3.0 - 3.9V */
- -0.76, -0.78, -0.81, -0.84, -0.85 /* 4.0 - 4.4V */
+ -0.76, -0.78, -0.81, -0.84, -0.85 /* 4.0 - 4.4V */
};
@@ -231,31 +231,31 @@ struct sn76477_state
double pitch_voltage;
/* chip's internal state */
- double one_shot_cap_voltage; /* voltage on the one-shot cap */
- UINT32 one_shot_running_ff; /* 1 = one-shot running, 0 = stopped */
+ double one_shot_cap_voltage; /* voltage on the one-shot cap */
+ UINT32 one_shot_running_ff; /* 1 = one-shot running, 0 = stopped */
- double slf_cap_voltage; /* voltage on the SLF cap */
- UINT32 slf_out_ff; /* output of the SLF */
+ double slf_cap_voltage; /* voltage on the SLF cap */
+ UINT32 slf_out_ff; /* output of the SLF */
- double vco_cap_voltage; /* voltage on the VCO cap */
- UINT32 vco_out_ff; /* output of the VCO */
- UINT32 vco_alt_pos_edge_ff; /* keeps track of the # of positive edges for VCO Alt envelope */
+ double vco_cap_voltage; /* voltage on the VCO cap */
+ UINT32 vco_out_ff; /* output of the VCO */
+ UINT32 vco_alt_pos_edge_ff; /* keeps track of the # of positive edges for VCO Alt envelope */
- double noise_filter_cap_voltage; /* voltage on the noise filter cap */
- UINT32 real_noise_bit_ff; /* the current noise bit before filtering */
- UINT32 filtered_noise_bit_ff; /* the noise bit after filtering */
- UINT32 noise_gen_count; /* noise freq emulation */
+ double noise_filter_cap_voltage; /* voltage on the noise filter cap */
+ UINT32 real_noise_bit_ff; /* the current noise bit before filtering */
+ UINT32 filtered_noise_bit_ff; /* the noise bit after filtering */
+ UINT32 noise_gen_count; /* noise freq emulation */
- double attack_decay_cap_voltage; /* voltage on the attack/decay cap */
+ double attack_decay_cap_voltage; /* voltage on the attack/decay cap */
- UINT32 rng; /* current value of the random number generator */
+ UINT32 rng; /* current value of the random number generator */
/* others */
- sound_stream *channel; /* returned by stream_create() */
- int sample_rate; /* from machine.sample_rate() */
+ sound_stream *channel; /* returned by stream_create() */
+ int sample_rate; /* from machine.sample_rate() */
device_t *device;
- wav_file *file; /* handle of the wave file to produce */
+ wav_file *file; /* handle of the wave file to produce */
};
@@ -301,16 +301,16 @@ static double compute_one_shot_cap_charging_rate(sn76477_state *sn) /* in V/sec
{
/* this formula was derived using the data points below
- Res (kohms) Cap (uF) Time (millisec)
- 47 0.33 11.84
- 47 1.0 36.2
- 47 1.5 52.1
- 47 2.0 76.4
- 100 0.33 24.4
- 100 1.0 75.2
- 100 1.5 108.5
- 100 2.0 158.4
- */
+ Res (kohms) Cap (uF) Time (millisec)
+ 47 0.33 11.84
+ 47 1.0 36.2
+ 47 1.5 52.1
+ 47 2.0 76.4
+ 100 0.33 24.4
+ 100 1.0 75.2
+ 100 1.5 108.5
+ 100 2.0 158.4
+ */
double ret = 0;
@@ -321,13 +321,13 @@ static double compute_one_shot_cap_charging_rate(sn76477_state *sn) /* in V/sec
else if (sn->one_shot_cap > 0)
{
/* if no resistor, there is no current to charge the cap,
- effectively making the one-shot time effectively infinite */
+ effectively making the one-shot time effectively infinite */
ret = +1e-30;
}
else if (sn->one_shot_res > 0)
{
/* if no cap, the voltage changes extremely fast,
- effectively making the one-shot time 0 */
+ effectively making the one-shot time 0 */
ret = +1e+30;
}
@@ -339,12 +339,12 @@ static double compute_one_shot_cap_discharging_rate(sn76477_state *sn) /* in V/s
{
/* this formula was derived using the data points below
- Cap (uF) Time (microsec)
- 0.33 300
- 1.0 850
- 1.5 1300
- 2.0 1900
- */
+ Cap (uF) Time (microsec)
+ 0.33 300
+ 1.0 850
+ 1.5 1300
+ 2.0 1900
+ */
double ret = 0;
@@ -355,7 +355,7 @@ static double compute_one_shot_cap_discharging_rate(sn76477_state *sn) /* in V/s
else if (sn->one_shot_res > 0)
{
/* if no cap, the voltage changes extremely fast,
- effectively making the one-shot time 0 */
+ effectively making the one-shot time 0 */
ret = +1e+30;
}
@@ -367,14 +367,14 @@ static double compute_slf_cap_charging_rate(sn76477_state *sn) /* in V/sec */
{
/* this formula was derived using the data points below
- Res (kohms) Cap (uF) Time (millisec)
- 47 0.47 14.3
- 120 0.47 35.6
- 200 0.47 59.2
- 47 1.00 28.6
- 120 1.00 71.6
- 200 1.00 119.0
- */
+ Res (kohms) Cap (uF) Time (millisec)
+ 47 0.47 14.3
+ 120 0.47 35.6
+ 200 0.47 59.2
+ 47 1.00 28.6
+ 120 1.00 71.6
+ 200 1.00 119.0
+ */
double ret = 0;
if ((sn->slf_res > 0) && (sn->slf_cap > 0))
@@ -390,14 +390,14 @@ static double compute_slf_cap_discharging_rate(sn76477_state *sn) /* in V/sec */
{
/* this formula was derived using the data points below
- Res (kohms) Cap (uF) Time (millisec)
- 47 0.47 13.32
- 120 0.47 32.92
- 200 0.47 54.4
- 47 1.00 26.68
- 120 1.00 66.2
- 200 1.00 109.6
- */
+ Res (kohms) Cap (uF) Time (millisec)
+ 47 0.47 13.32
+ 120 0.47 32.92
+ 200 0.47 54.4
+ 47 1.00 26.68
+ 120 1.00 66.2
+ 200 1.00 109.6
+ */
double ret = 0;
if ((sn->slf_res > 0) && (sn->slf_cap > 0))
@@ -424,7 +424,7 @@ static double compute_vco_cap_charging_discharging_rate(sn76477_state *sn) /* in
static double compute_vco_duty_cycle(sn76477_state *sn) /* no measure, just a number */
{
- double ret = 0.5; /* 50% */
+ double ret = 0.5; /* 50% */
if ((sn->vco_voltage > 0) && (sn->pitch_voltage != VCO_DUTY_CYCLE_50))
{
@@ -441,36 +441,36 @@ static UINT32 compute_noise_gen_freq(sn76477_state *sn) /* in Hz */
{
/* this formula was derived using the data points below
- Res (ohms) Freq (Hz)
- 10k 97493
- 12k 83333
- 15k 68493
- 22k 49164
- 27k 41166
- 33k 34449
- 36k 31969
- 47k 25126
- 56k 21322
- 68k 17721.5
- 82k 15089.2
- 100k 12712.0
- 150k 8746.4
- 220k 6122.4
- 270k 5101.5
- 330k 4217.2
- 390k 3614.5
- 470k 3081.7
- 680k 2132.7
- 820k 1801.8
- 1M 1459.9
- 2.2M 705.13
- 3.3M 487.59
- */
+ Res (ohms) Freq (Hz)
+ 10k 97493
+ 12k 83333
+ 15k 68493
+ 22k 49164
+ 27k 41166
+ 33k 34449
+ 36k 31969
+ 47k 25126
+ 56k 21322
+ 68k 17721.5
+ 82k 15089.2
+ 100k 12712.0
+ 150k 8746.4
+ 220k 6122.4
+ 270k 5101.5
+ 330k 4217.2
+ 390k 3614.5
+ 470k 3081.7
+ 680k 2132.7
+ 820k 1801.8
+ 1M 1459.9
+ 2.2M 705.13
+ 3.3M 487.59
+ */
UINT32 ret = 0;
if ((sn->noise_clock_res >= NOISE_MIN_CLOCK_RES) &&
- (sn->noise_clock_res <= NOISE_MAX_CLOCK_RES))
+ (sn->noise_clock_res <= NOISE_MAX_CLOCK_RES))
{
ret = 339100000 * pow(sn->noise_clock_res, -0.8849);
}
@@ -483,16 +483,16 @@ static double compute_noise_filter_cap_charging_rate(sn76477_state *sn) /* in V/
{
/* this formula was derived using the data points below
- R*C Time (sec)
- .000068 .0000184
- .0001496 .0000378
- .0002244 .0000548
- .0003196 .000077
- .0015 .000248
- .0033 .000540
- .00495 .000792
- .00705 .001096
- */
+ R*C Time (sec)
+ .000068 .0000184
+ .0001496 .0000378
+ .0002244 .0000548
+ .0003196 .000077
+ .0015 .000248
+ .0033 .000540
+ .00495 .000792
+ .00705 .001096
+ */
double ret = 0;
@@ -503,13 +503,13 @@ static double compute_noise_filter_cap_charging_rate(sn76477_state *sn) /* in V/
else if (sn->noise_filter_cap > 0)
{
/* if no resistor, there is no current to charge the cap,
- effectively making the filter's output constants */
+ effectively making the filter's output constants */
ret = +1e-30;
}
else if (sn->noise_filter_res > 0)
{
/* if no cap, the voltage changes extremely fast,
- effectively disabling the filter */
+ effectively disabling the filter */
ret = +1e+30;
}
@@ -521,16 +521,16 @@ static double compute_noise_filter_cap_discharging_rate(sn76477_state *sn) /* in
{
/* this formula was derived using the data points below
- R*C Time (sec)
- .000068 .000016
- .0001496 .0000322
- .0002244 .0000472
- .0003196 .0000654
- .0015 .000219
- .0033 .000468
- .00495 .000676
- .00705 .000948
- */
+ R*C Time (sec)
+ .000068 .000016
+ .0001496 .0000322
+ .0002244 .0000472
+ .0003196 .0000654
+ .0015 .000219
+ .0033 .000468
+ .00495 .000676
+ .00705 .000948
+ */
double ret = 0;
@@ -541,13 +541,13 @@ static double compute_noise_filter_cap_discharging_rate(sn76477_state *sn) /* in
else if (sn->noise_filter_cap > 0)
{
/* if no resistor, there is no current to charge the cap,
- effectively making the filter's output constants */
+ effectively making the filter's output constants */
ret = +1e-30;
}
else if (sn->noise_filter_res > 0)
{
/* if no cap, the voltage changes extremely fast,
- effectively disabling the filter */
+ effectively disabling the filter */
ret = +1e+30;
}
@@ -566,13 +566,13 @@ static double compute_attack_decay_cap_charging_rate(sn76477_state *sn) /* in V
else if (sn->attack_decay_cap > 0)
{
/* if no resistor, there is no current to charge the cap,
- effectively making the attack time infinite */
+ effectively making the attack time infinite */
ret = +1e-30;
}
else if (sn->attack_res > 0)
{
/* if no cap, the voltage changes extremely fast,
- effectively making the attack time 0 */
+ effectively making the attack time 0 */
ret = +1e+30;
}
@@ -591,13 +591,13 @@ static double compute_attack_decay_cap_discharging_rate(sn76477_state *sn) /* i
else if (sn->attack_decay_cap > 0)
{
/* if no resistor, there is no current to charge the cap,
- effectively making the decay time infinite */
+ effectively making the decay time infinite */
ret = +1e-30;
}
else if (sn->attack_res > 0)
{
/* if no cap, the voltage changes extremely fast,
- effectively making the decay time 0 */
+ effectively making the decay time 0 */
ret = +1e+30;
}
@@ -609,17 +609,17 @@ static double compute_center_to_peak_voltage_out(sn76477_state *sn)
{
/* this formula was derived using the data points below
- Ra (kohms) Rf (kohms) Voltage
- 150 47 1.28
- 200 47 0.96
- 47 22 1.8
- 100 22 0.87
- 150 22 0.6
- 200 22 0.45
- 47 10 0.81
- 100 10 0.4
- 150 10 0.27
- */
+ Ra (kohms) Rf (kohms) Voltage
+ 150 47 1.28
+ 200 47 0.96
+ 47 22 1.8
+ 100 22 0.87
+ 150 22 0.6
+ 200 22 0.45
+ 47 10 0.81
+ 100 10 0.4
+ 150 10 0.27
+ */
double ret = 0;
@@ -950,7 +950,7 @@ INLINE UINT32 generate_next_real_noise_bit(sn76477_state *sn)
{
UINT32 out = ((sn->rng >> 28) & 1) ^ ((sn->rng >> 0) & 1);
- /* if bits 0-4 and 28 are all zero then force the output to 1 */
+ /* if bits 0-4 and 28 are all zero then force the output to 1 */
if ((sn->rng & 0x1000001f) == 0)
{
out = 1;
@@ -973,7 +973,7 @@ static void _SN76477_enable_w(sn76477_state *sn, UINT32 data)
{
sn->enable = data;
- /* if falling edge */
+ /* if falling edge */
if (!sn->enable)
{
/* start the attack phase */
@@ -1589,7 +1589,7 @@ WRITE_LINE_DEVICE_HANDLER( sn76477_noise_clock_w )
sn->noise_clock = state;
/* on the rising edge shift generate next value,
- if external control is enabled */
+ if external control is enabled */
if (sn->noise_clock && sn->noise_clock_ext)
{
sn->channel->update();
@@ -1987,7 +1987,7 @@ static STREAM_UPDATE( SN76477_update )
#if TEST_MODE
- static int recursing = 0; /* we need to prevent recursion since enable_w calls device->machine().input().code_pressed_once(KEYCODE_SPACE->update */
+ static int recursing = 0; /* we need to prevent recursion since enable_w calls device->machine().input().code_pressed_once(KEYCODE_SPACE->update */
if () && !recursing)
{
@@ -2154,20 +2154,20 @@ static STREAM_UPDATE( SN76477_update )
/* based on the envelope mode figure out the attack/decay phase we are in */
switch (sn->envelope_mode)
{
- case 0: /* VCO */
+ case 0: /* VCO */
attack_decay_cap_charging = sn->vco_out_ff;
break;
- case 1: /* one-shot */
+ case 1: /* one-shot */
attack_decay_cap_charging = sn->one_shot_running_ff;
break;
case 2:
- default: /* mixer only */
- attack_decay_cap_charging = 1; /* never a decay phase */
+ default: /* mixer only */
+ attack_decay_cap_charging = 1; /* never a decay phase */
break;
- case 3: /* VCO with alternating polarity */
+ case 3: /* VCO with alternating polarity */
attack_decay_cap_charging = sn->vco_out_ff && sn->vco_alt_pos_edge_ff;
break;
}
@@ -2212,35 +2212,35 @@ static STREAM_UPDATE( SN76477_update )
/* enabled */
switch (sn->mixer_mode)
{
- case 0: /* VCO */
+ case 0: /* VCO */
out = sn->vco_out_ff;
break;
- case 1: /* SLF */
+ case 1: /* SLF */
out = sn->slf_out_ff;
break;
- case 2: /* noise */
+ case 2: /* noise */
out = sn->filtered_noise_bit_ff;
break;
- case 3: /* VCO and noise */
+ case 3: /* VCO and noise */
out = sn->vco_out_ff & sn->filtered_noise_bit_ff;
break;
- case 4: /* SLF and noise */
+ case 4: /* SLF and noise */
out = sn->slf_out_ff & sn->filtered_noise_bit_ff;
break;
- case 5: /* VCO, SLF and noise */
+ case 5: /* VCO, SLF and noise */
out = sn->vco_out_ff & sn->slf_out_ff & sn->filtered_noise_bit_ff;
break;
- case 6: /* VCO and SLF */
+ case 6: /* VCO and SLF */
out = sn->vco_out_ff & sn->slf_out_ff;
break;
- case 7: /* inhibit */
+ case 7: /* inhibit */
default:
out = 0;
break;
@@ -2266,14 +2266,14 @@ static STREAM_UPDATE( SN76477_update )
/* convert it to a signed 16-bit sample,
- -32767 = OUT_LOW_CLIP_THRESHOLD
- 0 = OUT_CENTER_LEVEL_VOLTAGE
- 32767 = 2 * OUT_CENTER_LEVEL_VOLTAGE + OUT_LOW_CLIP_THRESHOLD
-
- / Vout - Vmin \
- sample = | ----------- - 1 | * 32767
- \ Vcen - Vmin /
- */
+ -32767 = OUT_LOW_CLIP_THRESHOLD
+ 0 = OUT_CENTER_LEVEL_VOLTAGE
+ 32767 = 2 * OUT_CENTER_LEVEL_VOLTAGE + OUT_LOW_CLIP_THRESHOLD
+
+ / Vout - Vmin \
+ sample = | ----------- - 1 | * 32767
+ \ Vcen - Vmin /
+ */
*buffer++ = (((voltage_out - OUT_LOW_CLIP_THRESHOLD) / (OUT_CENTER_LEVEL_VOLTAGE - OUT_LOW_CLIP_THRESHOLD)) - 1) * 32767;
if (LOG_WAV && LOG_WAV_ENABLED_ONLY && !sn->enable)
@@ -2470,7 +2470,7 @@ const device_type SN76477 = &device_creator<sn76477_device>;
sn76477_device::sn76477_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SN76477, "SN76477", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(sn76477_state);
}
@@ -2512,5 +2512,3 @@ void sn76477_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/sn76477.h b/src/emu/sound/sn76477.h
index f4afa46bd92..c00c2d6ba4a 100644
--- a/src/emu/sound/sn76477.h
+++ b/src/emu/sound/sn76477.h
@@ -85,13 +85,13 @@ struct sn76477_interface
*****************************************************************************/
/* these functions take 0 or 1 as a logic input */
-WRITE_LINE_DEVICE_HANDLER( sn76477_enable_w ); /* active LO, 0 = enabled, 1 = disabled */
+WRITE_LINE_DEVICE_HANDLER( sn76477_enable_w ); /* active LO, 0 = enabled, 1 = disabled */
WRITE_LINE_DEVICE_HANDLER( sn76477_mixer_a_w );
WRITE_LINE_DEVICE_HANDLER( sn76477_mixer_b_w );
WRITE_LINE_DEVICE_HANDLER( sn76477_mixer_c_w );
WRITE_LINE_DEVICE_HANDLER( sn76477_envelope_1_w );
WRITE_LINE_DEVICE_HANDLER( sn76477_envelope_2_w );
-WRITE_LINE_DEVICE_HANDLER( sn76477_vco_w ); /* 0 = external, 1 = controlled by SLF */
+WRITE_LINE_DEVICE_HANDLER( sn76477_vco_w ); /* 0 = external, 1 = controlled by SLF */
WRITE_LINE_DEVICE_HANDLER( sn76477_noise_clock_w ); /* noise clock write, if noise_clock_res = 0 */
/* these functions take a resistor value in Ohms */
@@ -106,7 +106,7 @@ void sn76477_amplitude_res_w(device_t *device, double data);
void sn76477_feedback_res_w(device_t *device, double data);
/* these functions take a capacitor value in Farads or the voltage on it in Volts */
-#define SN76477_EXTERNAL_VOLTAGE_DISCONNECT (-1.0) /* indicates that the voltage is internally computed,
+#define SN76477_EXTERNAL_VOLTAGE_DISCONNECT (-1.0) /* indicates that the voltage is internally computed,
can be used in all the functions that take a
voltage on a capacitor */
void sn76477_one_shot_cap_w(device_t *device, double data);
@@ -125,7 +125,7 @@ void sn76477_vco_voltage_w(device_t *device, double data);
void sn76477_pitch_voltage_w(device_t *device, double data);
class sn76477_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
sn76477_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/sn76496.c b/src/emu/sound/sn76496.c
index 3d1fe5af251..6ae1cbb37d7 100644
--- a/src/emu/sound/sn76496.c
+++ b/src/emu/sound/sn76496.c
@@ -128,14 +128,14 @@ sn76496_base_device::sn76496_base_device(const machine_config &mconfig, device_t
device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_feedback_mask(feedbackmask),
- m_whitenoise_tap1(noisetap1),
- m_whitenoise_tap2(noisetap2),
- m_negate(negate),
- m_stereo(stereo),
- m_clock_divider(clockdivider),
- m_freq0_is_max(freq0)
+ device_sound_interface(mconfig, *this),
+ m_feedback_mask(feedbackmask),
+ m_whitenoise_tap1(noisetap1),
+ m_whitenoise_tap2(noisetap2),
+ m_negate(negate),
+ m_stereo(stereo),
+ m_clock_divider(clockdivider),
+ m_freq0_is_max(freq0)
{
}
@@ -157,7 +157,7 @@ void sn76496_base_device::device_start()
for (i = 0; i < 8; i+=2)
{
m_register[i] = 0;
- m_register[i + 1] = 0x0f; // volume = 0
+ m_register[i + 1] = 0x0f; // volume = 0
}
for (i = 0; i < 4; i++)
@@ -170,8 +170,8 @@ void sn76496_base_device::device_start()
m_RNG = m_feedback_mask;
m_output[3] = m_RNG & 1;
- m_cycles_to_ready = 1; // assume ready is not active immediately on init. is this correct?
- m_stereo_mask = 0xFF; // all channels enabled
+ m_cycles_to_ready = 1; // assume ready is not active immediately on init. is this correct?
+ m_stereo_mask = 0xFF; // all channels enabled
m_current_clock = m_clock_divider-1;
// set gain
@@ -182,7 +182,7 @@ void sn76496_base_device::device_start()
// increase max output basing on gain (0.2 dB per step)
out = MAX_OUTPUT / 4; // four channels, each gets 1/4 of the total range
while (gain-- > 0)
- out *= 1.023292992; // = (10 ^ (0.2/20))
+ out *= 1.023292992; // = (10 ^ (0.2/20))
// build volume table (2dB per step)
for (i = 0; i < 15; i++)
@@ -191,7 +191,7 @@ void sn76496_base_device::device_start()
if (out > MAX_OUTPUT / 4) m_vol_table[i] = MAX_OUTPUT / 4;
else m_vol_table[i] = out;
- out /= 1.258925412; /* = 10 ^ (2/20) = 2dB */
+ out /= 1.258925412; /* = 10 ^ (2/20) = 2dB */
}
m_vol_table[15] = 0;
@@ -246,9 +246,9 @@ void sn76496_base_device::write(UINT8 data)
c = r >> 1;
switch (r)
{
- case 0: // tone 0: frequency
- case 2: // tone 1: frequency
- case 4: // tone 2: frequency
+ case 0: // tone 0: frequency
+ case 2: // tone 1: frequency
+ case 4: // tone 2: frequency
if ((data & 0x80) == 0) m_register[r] = (m_register[r] & 0x0f) | ((data & 0x3f) << 4);
if ((m_register[r] != 0) || (!m_freq0_is_max)) m_period[c] = m_register[r];
else m_period[c] = 0x400;
@@ -256,17 +256,17 @@ void sn76496_base_device::write(UINT8 data)
if (r == 4)
{
// update noise shift frequency
- if ((m_register[6] & 0x03) == 0x03) m_period[3] = m_period[2]<<1;
+ if ((m_register[6] & 0x03) == 0x03) m_period[3] = m_period[2]<<1;
}
break;
- case 1: // tone 0: volume
- case 3: // tone 1: volume
- case 5: // tone 2: volume
- case 7: // noise: volume
+ case 1: // tone 0: volume
+ case 3: // tone 1: volume
+ case 5: // tone 2: volume
+ case 7: // noise: volume
m_volume[c] = m_vol_table[data & 0x0f];
if ((data & 0x80) == 0) m_register[r] = (m_register[r] & 0x3f0) | (data & 0x0f);
break;
- case 6: // noise: frequency, mode
+ case 6: // noise: frequency, mode
{
if ((data & 0x80) == 0) logerror("sn76496_base_device: write to reg 6 with bit 7 clear; data was %03x, new write is %02x! report this to LN!\n", m_register[6], data);
if ((data & 0x80) == 0) m_register[r] = (m_register[r] & 0x3f0) | (data & 0x0f);
@@ -419,4 +419,3 @@ const device_type SN94624 = &device_creator<sn94624_device>;
const device_type NCR7496 = &device_creator<ncr7496_device>;
const device_type GAMEGEAR = &device_creator<gamegear_device>;
const device_type SEGAPSG = &device_creator<segapsg_device>;
-
diff --git a/src/emu/sound/sn76496.h b/src/emu/sound/sn76496.h
index a832791d16a..f6d03596edc 100644
--- a/src/emu/sound/sn76496.h
+++ b/src/emu/sound/sn76496.h
@@ -17,7 +17,7 @@ extern const device_type SEGAPSG;
struct sn76496_config
{
- devcb_write_line ready;
+ devcb_write_line ready;
};
class sn76496_base_device : public device_t, public device_sound_interface
@@ -32,39 +32,39 @@ public:
DECLARE_WRITE8_MEMBER( write );
protected:
- void device_start();
- void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
+ void device_start();
+ void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
- inline bool in_noise_mode();
- void register_for_save_states();
- void countdown_cycles();
-
- bool m_ready_state;
-
- devcb_resolved_write_line m_ready;
-
- sound_stream* m_sound;
-
- const INT32 m_feedback_mask; // mask for feedback
- const INT32 m_whitenoise_tap1; // mask for white noise tap 1 (higher one, usually bit 14)
- const INT32 m_whitenoise_tap2; // mask for white noise tap 2 (lower one, usually bit 13)
- const bool m_negate; // output negate flag
- const bool m_stereo; // whether we're dealing with stereo or not
- const INT32 m_clock_divider; // clock divider
- const bool m_freq0_is_max; // flag for if frequency zero acts as if it is one more than max (0x3ff+1) or if it acts like 0
-
- INT32 m_vol_table[16]; // volume table (for 4-bit to db conversion)
- INT32 m_register[8]; // registers
- INT32 m_last_register; // last register written
- INT32 m_volume[4]; // db volume of voice 0-2 and noise
- UINT32 m_RNG; // noise generator LFSR
- INT32 m_current_clock;
- INT32 m_stereo_mask; // the stereo output mask
- INT32 m_period[4]; // Length of 1/2 of waveform
- INT32 m_count[4]; // Position within the waveform
- INT32 m_output[4]; // 1-bit output of each channel, pre-volume
- INT32 m_cycles_to_ready; // number of cycles until the READY line goes active
+ inline bool in_noise_mode();
+ void register_for_save_states();
+ void countdown_cycles();
+
+ bool m_ready_state;
+
+ devcb_resolved_write_line m_ready;
+
+ sound_stream* m_sound;
+
+ const INT32 m_feedback_mask; // mask for feedback
+ const INT32 m_whitenoise_tap1; // mask for white noise tap 1 (higher one, usually bit 14)
+ const INT32 m_whitenoise_tap2; // mask for white noise tap 2 (lower one, usually bit 13)
+ const bool m_negate; // output negate flag
+ const bool m_stereo; // whether we're dealing with stereo or not
+ const INT32 m_clock_divider; // clock divider
+ const bool m_freq0_is_max; // flag for if frequency zero acts as if it is one more than max (0x3ff+1) or if it acts like 0
+
+ INT32 m_vol_table[16]; // volume table (for 4-bit to db conversion)
+ INT32 m_register[8]; // registers
+ INT32 m_last_register; // last register written
+ INT32 m_volume[4]; // db volume of voice 0-2 and noise
+ UINT32 m_RNG; // noise generator LFSR
+ INT32 m_current_clock;
+ INT32 m_stereo_mask; // the stereo output mask
+ INT32 m_period[4]; // Length of 1/2 of waveform
+ INT32 m_count[4]; // Position within the waveform
+ INT32 m_output[4]; // 1-bit output of each channel, pre-volume
+ INT32 m_cycles_to_ready; // number of cycles until the READY line goes active
};
// SN76496: Whitenoise verified, phase verified, periodic verified (by Michael Zapf)
diff --git a/src/emu/sound/snkwave.c b/src/emu/sound/snkwave.c
index 903d33a49cd..77de3381bcc 100644
--- a/src/emu/sound/snkwave.c
+++ b/src/emu/sound/snkwave.c
@@ -21,13 +21,13 @@ const device_type SNKWAVE = &device_creator<snkwave_device>;
snkwave_device::snkwave_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SNKWAVE, "SNK Wave", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_stream(NULL),
- m_external_clock(0),
- m_sample_rate(0),
- m_frequency(0),
- m_counter(0),
- m_waveform_position(0)
+ device_sound_interface(mconfig, *this),
+ m_stream(NULL),
+ m_external_clock(0),
+ m_sample_rate(0),
+ m_frequency(0),
+ m_counter(0),
+ m_waveform_position(0)
{
}
@@ -150,5 +150,3 @@ void snkwave_device::update_waveform(unsigned int offset, UINT8 data)
m_waveform[SNKWAVE_WAVEFORM_LENGTH-2 - offset * 2] = ~m_waveform[offset * 2 + 1];
m_waveform[SNKWAVE_WAVEFORM_LENGTH-1 - offset * 2] = ~m_waveform[offset * 2];
}
-
-
diff --git a/src/emu/sound/snkwave.h b/src/emu/sound/snkwave.h
index 633f16b2a63..19fcbd82fe0 100644
--- a/src/emu/sound/snkwave.h
+++ b/src/emu/sound/snkwave.h
@@ -25,7 +25,7 @@
// ======================> snkwave_device
class snkwave_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
snkwave_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/sound.mak b/src/emu/sound/sound.mak
index 2bed0bf3505..50fb7872c3d 100644
--- a/src/emu/sound/sound.mak
+++ b/src/emu/sound/sound.mak
@@ -62,7 +62,7 @@ ifneq ($(filter DISCRETE,$(SOUNDS)),)
SOUNDOBJS += $(SOUNDOBJ)/discrete.o
endif
-$(SOUNDOBJ)/discrete.o: $(SOUNDSRC)/discrete.c \
+$(SOUNDOBJ)/discrete.o: $(SOUNDSRC)/discrete.c \
$(SOUNDSRC)/discrete.h \
$(SOUNDSRC)/disc_dev.c \
$(SOUNDSRC)/disc_sys.c \
@@ -483,8 +483,8 @@ ifneq ($(filter AICA,$(SOUNDS)),)
SOUNDOBJS += $(SOUNDOBJ)/aica.o $(SOUNDOBJ)/aicadsp.o
endif
-$(SOUNDOBJ)/scsp.o: $(SOUNDSRC)/scsplfo.c
-$(SOUNDOBJ)/aica.o: $(SOUNDSRC)/aicalfo.c
+$(SOUNDOBJ)/scsp.o: $(SOUNDSRC)/scsplfo.c
+$(SOUNDOBJ)/aica.o: $(SOUNDSRC)/aicalfo.c
@@ -630,8 +630,8 @@ ifneq ($(filter TMS5220,$(SOUNDS)),)
SOUNDOBJS += $(SOUNDOBJ)/tms5220.o
endif
-$(SOUNDOBJ)/tms5110.o: $(SOUNDSRC)/tms5110r.c
-$(SOUNDOBJ)/tms5220.o: $(SOUNDSRC)/tms5220r.c
+$(SOUNDOBJ)/tms5110.o: $(SOUNDSRC)/tms5110r.c
+$(SOUNDOBJ)/tms5220.o: $(SOUNDSRC)/tms5220r.c
diff --git a/src/emu/sound/sp0250.c b/src/emu/sound/sp0250.c
index 6eda5e6b7d3..9f9e250ab0a 100644
--- a/src/emu/sound/sp0250.c
+++ b/src/emu/sound/sp0250.c
@@ -73,7 +73,7 @@ static INT16 sp0250_gc(UINT8 v)
// Internal ROM to the chip, cf. manual
static const UINT16 coefs[128] =
{
- 0, 9, 17, 25, 33, 41, 49, 57, 65, 73, 81, 89, 97, 105, 113, 121,
+ 0, 9, 17, 25, 33, 41, 49, 57, 65, 73, 81, 89, 97, 105, 113, 121,
129, 137, 145, 153, 161, 169, 177, 185, 193, 201, 203, 217, 225, 233, 241, 249,
257, 265, 273, 281, 289, 297, 301, 305, 309, 313, 317, 321, 325, 329, 333, 337,
341, 345, 349, 353, 357, 361, 365, 369, 373, 377, 381, 385, 389, 393, 397, 401,
@@ -241,7 +241,7 @@ const device_type SP0250 = &device_creator<sp0250_device>;
sp0250_device::sp0250_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SP0250, "SP0250", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(sp0250_state);
}
@@ -274,5 +274,3 @@ void sp0250_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/sp0250.h b/src/emu/sound/sp0250.h
index 019ab27a296..7b17eafa595 100644
--- a/src/emu/sound/sp0250.h
+++ b/src/emu/sound/sp0250.h
@@ -13,7 +13,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( sp0250_w );
UINT8 sp0250_drq_r(device_t *device);
class sp0250_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
sp0250_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/sp0256.c b/src/emu/sound/sp0256.c
index 83cfe5be02f..624df29b344 100644
--- a/src/emu/sound/sp0256.c
+++ b/src/emu/sound/sp0256.c
@@ -47,63 +47,63 @@
#define VERBOSE 0
#define DEBUG_FIFO 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define LOG_FIFO(x) do { if (DEBUG_FIFO) logerror x; } while (0)
+#define LOG_FIFO(x) do { if (DEBUG_FIFO) logerror x; } while (0)
#define SET_SBY(line_state) { \
if( sp->sby_line != line_state ) \
{ \
sp->sby_line = line_state; \
- sp->sby(sp->sby_line); \
+ sp->sby(sp->sby_line); \
} \
}
struct lpc12_t
{
- int rpt, cnt; /* Repeat counter, Period down-counter. */
- UINT32 per, rng; /* Period, Amplitude, Random Number Generator */
- int amp;
- INT16 f_coef[6]; /* F0 through F5. */
- INT16 b_coef[6]; /* B0 through B5. */
- INT16 z_data[6][2]; /* Time-delay data for the filter stages. */
- UINT8 r[16]; /* The encoded register set. */
- int interp;
+ int rpt, cnt; /* Repeat counter, Period down-counter. */
+ UINT32 per, rng; /* Period, Amplitude, Random Number Generator */
+ int amp;
+ INT16 f_coef[6]; /* F0 through F5. */
+ INT16 b_coef[6]; /* B0 through B5. */
+ INT16 z_data[6][2]; /* Time-delay data for the filter stages. */
+ UINT8 r[16]; /* The encoded register set. */
+ int interp;
};
struct sp0256_state
{
device_t *device;
- sound_stream *stream; /* MAME core sound stream */
- devcb_resolved_write_line drq; /* Data request callback */
- devcb_resolved_write_line sby; /* Standby callback */
+ sound_stream *stream; /* MAME core sound stream */
+ devcb_resolved_write_line drq; /* Data request callback */
+ devcb_resolved_write_line sby; /* Standby callback */
int sby_line; /* Standby line state */
- INT16 *cur_buf; /* Current sound buffer. */
- int cur_len; /* Fullness of current sound buffer. */
-
- int silent; /* Flag: SP0256 is silent. */
-
- INT16 *scratch; /* Scratch buffer for audio. */
- UINT32 sc_head; /* Head pointer into scratch circular buf */
- UINT32 sc_tail; /* Tail pointer into scratch circular buf */
-
- struct lpc12_t filt; /* 12-pole filter */
- int lrq; /* Load ReQuest. == 0 if we can accept a load */
- int ald; /* Address LoaD. < 0 if no command pending. */
- int pc; /* Microcontroller's PC value. */
- int stack; /* Microcontroller's PC stack. */
- int fifo_sel; /* True when executing from FIFO. */
- int halted; /* True when CPU is halted. */
- UINT32 mode; /* Mode register. */
- UINT32 page; /* Page set by SETPAGE */
-
- UINT32 fifo_head; /* FIFO head pointer (where new data goes). */
- UINT32 fifo_tail; /* FIFO tail pointer (where data comes from). */
- UINT32 fifo_bitp; /* FIFO bit-pointer (for partial decles). */
- UINT16 fifo[64]; /* The 64-decle FIFO. */
-
- UINT8 *rom; /* 64K ROM. */
+ INT16 *cur_buf; /* Current sound buffer. */
+ int cur_len; /* Fullness of current sound buffer. */
+
+ int silent; /* Flag: SP0256 is silent. */
+
+ INT16 *scratch; /* Scratch buffer for audio. */
+ UINT32 sc_head; /* Head pointer into scratch circular buf */
+ UINT32 sc_tail; /* Tail pointer into scratch circular buf */
+
+ struct lpc12_t filt; /* 12-pole filter */
+ int lrq; /* Load ReQuest. == 0 if we can accept a load */
+ int ald; /* Address LoaD. < 0 if no command pending. */
+ int pc; /* Microcontroller's PC value. */
+ int stack; /* Microcontroller's PC stack. */
+ int fifo_sel; /* True when executing from FIFO. */
+ int halted; /* True when CPU is halted. */
+ UINT32 mode; /* Mode register. */
+ UINT32 page; /* Page set by SETPAGE */
+
+ UINT32 fifo_head; /* FIFO head pointer (where new data goes). */
+ UINT32 fifo_tail; /* FIFO tail pointer (where data comes from). */
+ UINT32 fifo_bitp; /* FIFO bit-pointer (for partial decles). */
+ UINT16 fifo[64]; /* The 64-decle FIFO. */
+
+ UINT8 *rom; /* 64K ROM. */
};
/* ======================================================================== */
@@ -112,22 +112,22 @@ struct sp0256_state
/* ======================================================================== */
static const INT16 qtbl[128] =
{
- 0, 9, 17, 25, 33, 41, 49, 57,
- 65, 73, 81, 89, 97, 105, 113, 121,
- 129, 137, 145, 153, 161, 169, 177, 185,
- 193, 201, 209, 217, 225, 233, 241, 249,
- 257, 265, 273, 281, 289, 297, 301, 305,
- 309, 313, 317, 321, 325, 329, 333, 337,
- 341, 345, 349, 353, 357, 361, 365, 369,
- 373, 377, 381, 385, 389, 393, 397, 401,
- 405, 409, 413, 417, 421, 425, 427, 429,
- 431, 433, 435, 437, 439, 441, 443, 445,
- 447, 449, 451, 453, 455, 457, 459, 461,
- 463, 465, 467, 469, 471, 473, 475, 477,
- 479, 481, 482, 483, 484, 485, 486, 487,
- 488, 489, 490, 491, 492, 493, 494, 495,
- 496, 497, 498, 499, 500, 501, 502, 503,
- 504, 505, 506, 507, 508, 509, 510, 511
+ 0, 9, 17, 25, 33, 41, 49, 57,
+ 65, 73, 81, 89, 97, 105, 113, 121,
+ 129, 137, 145, 153, 161, 169, 177, 185,
+ 193, 201, 209, 217, 225, 233, 241, 249,
+ 257, 265, 273, 281, 289, 297, 301, 305,
+ 309, 313, 317, 321, 325, 329, 333, 337,
+ 341, 345, 349, 353, 357, 361, 365, 369,
+ 373, 377, 381, 385, 389, 393, 397, 401,
+ 405, 409, 413, 417, 421, 425, 427, 429,
+ 431, 433, 435, 437, 439, 441, 443, 445,
+ 447, 449, 451, 453, 455, 457, 459, 461,
+ 463, 465, 467, 469, 471, 473, 475, 477,
+ 479, 481, 482, 483, 484, 485, 486, 487,
+ 488, 489, 490, 491, 492, 493, 494, 495,
+ 496, 497, 498, 499, 500, 501, 502, 503,
+ 504, 505, 506, 507, 508, 509, 510, 511
};
INLINE sp0256_state *get_safe_token(device_t *device)
@@ -144,13 +144,13 @@ INLINE sp0256_state *get_safe_token(device_t *device)
static INT16 limit(INT16 s)
{
#ifdef HIGH_QUALITY /* Higher quality than the original, but who cares? */
- if (s > 8191) return 8191;
- if (s < -8192) return -8192;
+ if (s > 8191) return 8191;
+ if (s < -8192) return -8192;
#else
- if (s > 127) return 127;
- if (s < -128) return -128;
+ if (s > 127) return 127;
+ if (s < -128) return -128;
#endif
- return s;
+ return s;
}
/* ======================================================================== */
@@ -158,127 +158,127 @@ static INT16 limit(INT16 s)
/* ======================================================================== */
static int lpc12_update(struct lpc12_t *f, int num_samp, INT16 *out, UINT32 *optr)
{
- int i, j;
- INT16 samp;
- int do_int;
- int oidx = *optr;
-
- /* -------------------------------------------------------------------- */
- /* Iterate up to the desired number of samples. We actually may */
- /* break out early if our repeat count expires. */
- /* -------------------------------------------------------------------- */
- for (i = 0; i < num_samp; i++)
- {
- /* ---------------------------------------------------------------- */
- /* Generate a series of periodic impulses, or random noise. */
- /* ---------------------------------------------------------------- */
- do_int = 0;
- samp = 0;
- if (f->per)
- {
- if (f->cnt <= 0)
- {
- f->cnt += f->per;
- samp = f->amp;
- f->rpt--;
- do_int = f->interp;
-
- for (j = 0; j < 6; j++)
- f->z_data[j][1] = f->z_data[j][0] = 0;
-
- } else
- {
- samp = 0;
- f->cnt--;
- }
-
- } else
- {
- int bit;
-
- if (--f->cnt <= 0)
- {
- do_int = f->interp;
- f->cnt = PER_NOISE;
- f->rpt--;
- for (j = 0; j < 6; j++)
- f->z_data[j][0] = f->z_data[j][1] = 0;
- }
-
- bit = f->rng & 1;
- f->rng = (f->rng >> 1) ^ (bit ? 0x4001 : 0);
-
- if (bit) { samp = f->amp; }
- else { samp = -f->amp; }
- }
-
- /* ---------------------------------------------------------------- */
- /* If we need to, process the interpolation registers. */
- /* ---------------------------------------------------------------- */
- if (do_int)
- {
- f->r[0] += f->r[14];
- f->r[1] += f->r[15];
-
- f->amp = (f->r[0] & 0x1F) << (((f->r[0] & 0xE0) >> 5) + 0);
- f->per = f->r[1];
-
- do_int = 0;
- }
-
- /* ---------------------------------------------------------------- */
- /* Stop if we expire our repeat counter and return the actual */
- /* number of samples we did. */
- /* ---------------------------------------------------------------- */
- if (f->rpt <= 0) break;
-
- /* ---------------------------------------------------------------- */
- /* Each 2nd order stage looks like one of these. The App. Manual */
- /* gives the first form, the patent gives the second form. */
- /* They're equivalent except for time delay. I implement the */
- /* first form. (Note: 1/Z == 1 unit of time delay.) */
- /* */
- /* ---->(+)-------->(+)----------+-------> */
- /* ^ ^ | */
- /* | | | */
- /* | | | */
- /* [B] [2*F] | */
- /* ^ ^ | */
- /* | | | */
- /* | | | */
- /* +---[1/Z]<--+---[1/Z]<--+ */
- /* */
- /* */
- /* +---[2*F]<---+ */
- /* | | */
- /* | | */
- /* v | */
- /* ---->(+)-->[1/Z]-->+-->[1/Z]---+------> */
- /* ^ | */
- /* | | */
- /* | | */
- /* +-----------[B]<---------+ */
- /* */
- /* ---------------------------------------------------------------- */
- for (j = 0; j < 6; j++)
- {
- samp += (((int)f->b_coef[j] * (int)f->z_data[j][1]) >> 9);
- samp += (((int)f->f_coef[j] * (int)f->z_data[j][0]) >> 8);
-
- f->z_data[j][1] = f->z_data[j][0];
- f->z_data[j][0] = samp;
- }
+ int i, j;
+ INT16 samp;
+ int do_int;
+ int oidx = *optr;
+
+ /* -------------------------------------------------------------------- */
+ /* Iterate up to the desired number of samples. We actually may */
+ /* break out early if our repeat count expires. */
+ /* -------------------------------------------------------------------- */
+ for (i = 0; i < num_samp; i++)
+ {
+ /* ---------------------------------------------------------------- */
+ /* Generate a series of periodic impulses, or random noise. */
+ /* ---------------------------------------------------------------- */
+ do_int = 0;
+ samp = 0;
+ if (f->per)
+ {
+ if (f->cnt <= 0)
+ {
+ f->cnt += f->per;
+ samp = f->amp;
+ f->rpt--;
+ do_int = f->interp;
+
+ for (j = 0; j < 6; j++)
+ f->z_data[j][1] = f->z_data[j][0] = 0;
+
+ } else
+ {
+ samp = 0;
+ f->cnt--;
+ }
+
+ } else
+ {
+ int bit;
+
+ if (--f->cnt <= 0)
+ {
+ do_int = f->interp;
+ f->cnt = PER_NOISE;
+ f->rpt--;
+ for (j = 0; j < 6; j++)
+ f->z_data[j][0] = f->z_data[j][1] = 0;
+ }
+
+ bit = f->rng & 1;
+ f->rng = (f->rng >> 1) ^ (bit ? 0x4001 : 0);
+
+ if (bit) { samp = f->amp; }
+ else { samp = -f->amp; }
+ }
+
+ /* ---------------------------------------------------------------- */
+ /* If we need to, process the interpolation registers. */
+ /* ---------------------------------------------------------------- */
+ if (do_int)
+ {
+ f->r[0] += f->r[14];
+ f->r[1] += f->r[15];
+
+ f->amp = (f->r[0] & 0x1F) << (((f->r[0] & 0xE0) >> 5) + 0);
+ f->per = f->r[1];
+
+ do_int = 0;
+ }
+
+ /* ---------------------------------------------------------------- */
+ /* Stop if we expire our repeat counter and return the actual */
+ /* number of samples we did. */
+ /* ---------------------------------------------------------------- */
+ if (f->rpt <= 0) break;
+
+ /* ---------------------------------------------------------------- */
+ /* Each 2nd order stage looks like one of these. The App. Manual */
+ /* gives the first form, the patent gives the second form. */
+ /* They're equivalent except for time delay. I implement the */
+ /* first form. (Note: 1/Z == 1 unit of time delay.) */
+ /* */
+ /* ---->(+)-------->(+)----------+-------> */
+ /* ^ ^ | */
+ /* | | | */
+ /* | | | */
+ /* [B] [2*F] | */
+ /* ^ ^ | */
+ /* | | | */
+ /* | | | */
+ /* +---[1/Z]<--+---[1/Z]<--+ */
+ /* */
+ /* */
+ /* +---[2*F]<---+ */
+ /* | | */
+ /* | | */
+ /* v | */
+ /* ---->(+)-->[1/Z]-->+-->[1/Z]---+------> */
+ /* ^ | */
+ /* | | */
+ /* | | */
+ /* +-----------[B]<---------+ */
+ /* */
+ /* ---------------------------------------------------------------- */
+ for (j = 0; j < 6; j++)
+ {
+ samp += (((int)f->b_coef[j] * (int)f->z_data[j][1]) >> 9);
+ samp += (((int)f->f_coef[j] * (int)f->z_data[j][0]) >> 8);
+
+ f->z_data[j][1] = f->z_data[j][0];
+ f->z_data[j][0] = samp;
+ }
#ifdef HIGH_QUALITY /* Higher quality than the original, but who cares? */
- out[oidx++ & SCBUF_MASK] = limit(samp) << 2;
+ out[oidx++ & SCBUF_MASK] = limit(samp) << 2;
#else
- out[oidx++ & SCBUF_MASK] = (limit(samp >> 4) << 8);
+ out[oidx++ & SCBUF_MASK] = (limit(samp >> 4) << 8);
#endif
- }
+ }
- *optr = oidx;
+ *optr = oidx;
- return i;
+ return i;
}
static const int stage_map[6] = { 0, 1, 2, 3, 4, 5 };
@@ -288,34 +288,34 @@ static const int stage_map[6] = { 0, 1, 2, 3, 4, 5 };
/* ======================================================================== */
static void lpc12_regdec(struct lpc12_t *f)
{
- int i;
-
- /* -------------------------------------------------------------------- */
- /* Decode the Amplitude and Period registers. Force the 'cnt' to 0 */
- /* to get an initial impulse. We compensate elsewhere by setting */
- /* the repeat count to "repeat + 1". */
- /* -------------------------------------------------------------------- */
- f->amp = (f->r[0] & 0x1F) << (((f->r[0] & 0xE0) >> 5) + 0);
- f->cnt = 0;
- f->per = f->r[1];
-
- /* -------------------------------------------------------------------- */
- /* Decode the filter coefficients from the quant table. */
- /* -------------------------------------------------------------------- */
- for (i = 0; i < 6; i++)
- {
- #define IQ(x) (((x) & 0x80) ? qtbl[0x7F & -(x)] : -qtbl[(x)])
-
- f->b_coef[stage_map[i]] = IQ(f->r[2 + 2*i]);
- f->f_coef[stage_map[i]] = IQ(f->r[3 + 2*i]);
- }
-
- /* -------------------------------------------------------------------- */
- /* Set the Interp flag based on whether we have interpolation parms */
- /* -------------------------------------------------------------------- */
- f->interp = f->r[14] || f->r[15];
-
- return;
+ int i;
+
+ /* -------------------------------------------------------------------- */
+ /* Decode the Amplitude and Period registers. Force the 'cnt' to 0 */
+ /* to get an initial impulse. We compensate elsewhere by setting */
+ /* the repeat count to "repeat + 1". */
+ /* -------------------------------------------------------------------- */
+ f->amp = (f->r[0] & 0x1F) << (((f->r[0] & 0xE0) >> 5) + 0);
+ f->cnt = 0;
+ f->per = f->r[1];
+
+ /* -------------------------------------------------------------------- */
+ /* Decode the filter coefficients from the quant table. */
+ /* -------------------------------------------------------------------- */
+ for (i = 0; i < 6; i++)
+ {
+ #define IQ(x) (((x) & 0x80) ? qtbl[0x7F & -(x)] : -qtbl[(x)])
+
+ f->b_coef[stage_map[i]] = IQ(f->r[2 + 2*i]);
+ f->f_coef[stage_map[i]] = IQ(f->r[3 + 2*i]);
+ }
+
+ /* -------------------------------------------------------------------- */
+ /* Set the Interp flag based on whether we have interpolation parms */
+ /* -------------------------------------------------------------------- */
+ f->interp = f->r[14] || f->r[15];
+
+ return;
}
/* ======================================================================== */
@@ -331,15 +331,15 @@ static void lpc12_regdec(struct lpc12_t *f)
/* ======================================================================== */
#define CR(l,s,p,d,f,c5,ca) \
- ( \
- (((l) & 15) << 0) | \
- (((s) & 15) << 4) | \
- (((p) & 15) << 8) | \
- (((d) & 1) << 12) | \
- (((f) & 1) << 13) | \
- (((c5) & 1) << 14) | \
- (((ca) & 1) << 15) \
- )
+ ( \
+ (((l) & 15) << 0) | \
+ (((s) & 15) << 4) | \
+ (((p) & 15) << 8) | \
+ (((d) & 1) << 12) | \
+ (((f) & 1) << 13) | \
+ (((c5) & 1) << 14) | \
+ (((ca) & 1) << 15) \
+ )
#define CR_DELTA CR(0,0,0,1,0,0,0)
#define CR_FIELD CR(0,0,0,0,1,0,0)
@@ -353,296 +353,296 @@ enum { AM = 0, PR, B0, F0, B1, F1, B2, F2, B3, F3, B4, F4, B5, F5, IA, IP };
static const UINT16 sp0256_datafmt[] =
{
- /* -------------------------------------------------------------------- */
- /* OPCODE 1111: PAUSE */
- /* -------------------------------------------------------------------- */
- /* 0 */ CR( 0, 0, 0, 0, 0, 0, 1), /* Clear all */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 0001: LOADALL */
- /* -------------------------------------------------------------------- */
- /* All modes */
- /* 1 */ CR( 8, 0, AM, 0, 0, 0, 1), /* Amplitude */
- /* 2 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 3 */ CR( 8, 0, B0, 0, 0, 0, 0), /* B0 */
- /* 4 */ CR( 8, 0, F0, 0, 0, 0, 0), /* F0 */
- /* 5 */ CR( 8, 0, B1, 0, 0, 0, 0), /* B1 */
- /* 6 */ CR( 8, 0, F1, 0, 0, 0, 0), /* F1 */
- /* 7 */ CR( 8, 0, B2, 0, 0, 0, 0), /* B2 */
- /* 8 */ CR( 8, 0, F2, 0, 0, 0, 0), /* F2 */
- /* 9 */ CR( 8, 0, B3, 0, 0, 0, 0), /* B3 */
- /* 10 */ CR( 8, 0, F3, 0, 0, 0, 0), /* F3 */
- /* 11 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
- /* 12 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
- /* 13 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
- /* 14 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
- /* Mode 01 and 11 only */
- /* 15 */ CR( 8, 0, IA, 0, 0, 0, 0), /* Amp Interp */
- /* 16 */ CR( 8, 0, IP, 0, 0, 0, 0), /* Pit Interp */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 0100: LOAD_4 */
- /* -------------------------------------------------------------------- */
- /* Mode 00 and 01 */
- /* 17 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
- /* 18 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 19 */ CR( 4, 3, B3, 0, 0, 0, 0), /* B3 (S=0) */
- /* 20 */ CR( 6, 2, F3, 0, 0, 0, 0), /* F3 */
- /* 21 */ CR( 7, 1, B4, 0, 0, 0, 0), /* B4 */
- /* 22 */ CR( 6, 2, F4, 0, 0, 0, 0), /* F4 */
- /* Mode 01 only */
- /* 23 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
- /* 24 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
-
- /* Mode 10 and 11 */
- /* 25 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
- /* 26 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 27 */ CR( 6, 1, B3, 0, 0, 0, 0), /* B3 (S=0) */
- /* 28 */ CR( 7, 1, F3, 0, 0, 0, 0), /* F3 */
- /* 29 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
- /* 30 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
- /* Mode 11 only */
- /* 31 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
- /* 32 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 0110: SETMSB_6 */
- /* -------------------------------------------------------------------- */
- /* Mode 00 only */
- /* 33 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
- /* Mode 00 and 01 */
- /* 34 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
- /* 35 */ CR( 6, 2, F3, 0, 1, 0, 0), /* F3 (5 MSBs) */
- /* 36 */ CR( 6, 2, F4, 0, 1, 0, 0), /* F4 (5 MSBs) */
- /* Mode 01 only */
- /* 37 */ CR( 8, 0, F5, 0, 1, 0, 0), /* F5 (5 MSBs) */
-
- /* Mode 10 only */
- /* 38 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
- /* Mode 10 and 11 */
- /* 39 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
- /* 40 */ CR( 7, 1, F3, 0, 1, 0, 0), /* F3 (6 MSBs) */
- /* 41 */ CR( 8, 0, F4, 0, 1, 0, 0), /* F4 (6 MSBs) */
- /* Mode 11 only */
- /* 42 */ CR( 8, 0, F5, 0, 1, 0, 0), /* F5 (6 MSBs) */
-
- /* 43 */ 0, /* unused */
- /* 44 */ 0, /* unused */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 1001: DELTA_9 */
- /* -------------------------------------------------------------------- */
- /* Mode 00 and 01 */
- /* 45 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
- /* 46 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
- /* 47 */ CR( 3, 4, B0, 1, 0, 0, 0), /* B0 4 MSBs */
- /* 48 */ CR( 3, 3, F0, 1, 0, 0, 0), /* F0 5 MSBs */
- /* 49 */ CR( 3, 4, B1, 1, 0, 0, 0), /* B1 4 MSBs */
- /* 50 */ CR( 3, 3, F1, 1, 0, 0, 0), /* F1 5 MSBs */
- /* 51 */ CR( 3, 4, B2, 1, 0, 0, 0), /* B2 4 MSBs */
- /* 52 */ CR( 3, 3, F2, 1, 0, 0, 0), /* F2 5 MSBs */
- /* 53 */ CR( 3, 3, B3, 1, 0, 0, 0), /* B3 5 MSBs */
- /* 54 */ CR( 4, 2, F3, 1, 0, 0, 0), /* F3 6 MSBs */
- /* 55 */ CR( 4, 1, B4, 1, 0, 0, 0), /* B4 7 MSBs */
- /* 56 */ CR( 4, 2, F4, 1, 0, 0, 0), /* F4 6 MSBs */
- /* Mode 01 only */
- /* 57 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
- /* 58 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
-
- /* Mode 10 and 11 */
- /* 59 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
- /* 60 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
- /* 61 */ CR( 4, 1, B0, 1, 0, 0, 0), /* B0 7 MSBs */
- /* 62 */ CR( 4, 2, F0, 1, 0, 0, 0), /* F0 6 MSBs */
- /* 63 */ CR( 4, 1, B1, 1, 0, 0, 0), /* B1 7 MSBs */
- /* 64 */ CR( 4, 2, F1, 1, 0, 0, 0), /* F1 6 MSBs */
- /* 65 */ CR( 4, 1, B2, 1, 0, 0, 0), /* B2 7 MSBs */
- /* 66 */ CR( 4, 2, F2, 1, 0, 0, 0), /* F2 6 MSBs */
- /* 67 */ CR( 4, 1, B3, 1, 0, 0, 0), /* B3 7 MSBs */
- /* 68 */ CR( 5, 1, F3, 1, 0, 0, 0), /* F3 7 MSBs */
- /* 69 */ CR( 5, 0, B4, 1, 0, 0, 0), /* B4 8 MSBs */
- /* 70 */ CR( 5, 0, F4, 1, 0, 0, 0), /* F4 8 MSBs */
- /* Mode 11 only */
- /* 71 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
- /* 72 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 1010: SETMSB_A */
- /* -------------------------------------------------------------------- */
- /* Mode 00 only */
- /* 73 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
- /* Mode 00 and 01 */
- /* 74 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
- /* 75 */ CR( 5, 3, F0, 0, 1, 0, 0), /* F0 (5 MSBs) */
- /* 76 */ CR( 5, 3, F1, 0, 1, 0, 0), /* F1 (5 MSBs) */
- /* 77 */ CR( 5, 3, F2, 0, 1, 0, 0), /* F2 (5 MSBs) */
-
- /* Mode 10 only */
- /* 78 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
- /* Mode 10 and 11 */
- /* 79 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
- /* 80 */ CR( 6, 2, F0, 0, 1, 0, 0), /* F0 (6 MSBs) */
- /* 81 */ CR( 6, 2, F1, 0, 1, 0, 0), /* F1 (6 MSBs) */
- /* 82 */ CR( 6, 2, F2, 0, 1, 0, 0), /* F2 (6 MSBs) */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 0010: LOAD_2 Mode 00 and 10 */
- /* Opcode 1100: LOAD_C Mode 00 and 10 */
- /* -------------------------------------------------------------------- */
- /* LOAD_2, LOAD_C Mode 00 */
- /* 83 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
- /* 84 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 85 */ CR( 3, 4, B0, 0, 0, 0, 0), /* B0 (S=0) */
- /* 86 */ CR( 5, 3, F0, 0, 0, 0, 0), /* F0 */
- /* 87 */ CR( 3, 4, B1, 0, 0, 0, 0), /* B1 (S=0) */
- /* 88 */ CR( 5, 3, F1, 0, 0, 0, 0), /* F1 */
- /* 89 */ CR( 3, 4, B2, 0, 0, 0, 0), /* B2 (S=0) */
- /* 90 */ CR( 5, 3, F2, 0, 0, 0, 0), /* F2 */
- /* 91 */ CR( 4, 3, B3, 0, 0, 0, 0), /* B3 (S=0) */
- /* 92 */ CR( 6, 2, F3, 0, 0, 0, 0), /* F3 */
- /* 93 */ CR( 7, 1, B4, 0, 0, 0, 0), /* B4 */
- /* 94 */ CR( 6, 2, F4, 0, 0, 0, 0), /* F4 */
- /* LOAD_2 only */
- /* 95 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
- /* 96 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
-
- /* LOAD_2, LOAD_C Mode 10 */
- /* 97 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
- /* 98 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 99 */ CR( 6, 1, B0, 0, 0, 0, 0), /* B0 (S=0) */
- /* 100 */ CR( 6, 2, F0, 0, 0, 0, 0), /* F0 */
- /* 101 */ CR( 6, 1, B1, 0, 0, 0, 0), /* B1 (S=0) */
- /* 102 */ CR( 6, 2, F1, 0, 0, 0, 0), /* F1 */
- /* 103 */ CR( 6, 1, B2, 0, 0, 0, 0), /* B2 (S=0) */
- /* 104 */ CR( 6, 2, F2, 0, 0, 0, 0), /* F2 */
- /* 105 */ CR( 6, 1, B3, 0, 0, 0, 0), /* B3 (S=0) */
- /* 106 */ CR( 7, 1, F3, 0, 0, 0, 0), /* F3 */
- /* 107 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
- /* 108 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
- /* LOAD_2 only */
- /* 109 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
- /* 110 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
-
- /* -------------------------------------------------------------------- */
- /* OPCODE 1101: DELTA_D */
- /* -------------------------------------------------------------------- */
- /* Mode 00 and 01 */
- /* 111 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
- /* 112 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
- /* 113 */ CR( 3, 3, B3, 1, 0, 0, 0), /* B3 5 MSBs */
- /* 114 */ CR( 4, 2, F3, 1, 0, 0, 0), /* F3 6 MSBs */
- /* 115 */ CR( 4, 1, B4, 1, 0, 0, 0), /* B4 7 MSBs */
- /* 116 */ CR( 4, 2, F4, 1, 0, 0, 0), /* F4 6 MSBs */
- /* Mode 01 only */
- /* 117 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
- /* 118 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
-
- /* Mode 10 and 11 */
- /* 119 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
- /* 120 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
- /* 121 */ CR( 4, 1, B3, 1, 0, 0, 0), /* B3 7 MSBs */
- /* 122 */ CR( 5, 1, F3, 1, 0, 0, 0), /* F3 7 MSBs */
- /* 123 */ CR( 5, 0, B4, 1, 0, 0, 0), /* B4 8 MSBs */
- /* 124 */ CR( 5, 0, F4, 1, 0, 0, 0), /* F4 8 MSBs */
- /* Mode 11 only */
- /* 125 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
- /* 126 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
-
- /* -------------------------------------------------------------------- */
- /* OPCODE 1110: LOAD_E */
- /* -------------------------------------------------------------------- */
- /* 127 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
- /* 128 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 0010: LOAD_2 Mode 01 and 11 */
- /* Opcode 1100: LOAD_C Mode 01 and 11 */
- /* -------------------------------------------------------------------- */
- /* LOAD_2, LOAD_C Mode 01 */
- /* 129 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
- /* 130 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 131 */ CR( 3, 4, B0, 0, 0, 0, 0), /* B0 (S=0) */
- /* 132 */ CR( 5, 3, F0, 0, 0, 0, 0), /* F0 */
- /* 133 */ CR( 3, 4, B1, 0, 0, 0, 0), /* B1 (S=0) */
- /* 134 */ CR( 5, 3, F1, 0, 0, 0, 0), /* F1 */
- /* 135 */ CR( 3, 4, B2, 0, 0, 0, 0), /* B2 (S=0) */
- /* 136 */ CR( 5, 3, F2, 0, 0, 0, 0), /* F2 */
- /* 137 */ CR( 4, 3, B3, 0, 0, 0, 0), /* B3 (S=0) */
- /* 138 */ CR( 6, 2, F3, 0, 0, 0, 0), /* F3 */
- /* 139 */ CR( 7, 1, B4, 0, 0, 0, 0), /* B4 */
- /* 140 */ CR( 6, 2, F4, 0, 0, 0, 0), /* F4 */
- /* 141 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
- /* 142 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
- /* LOAD_2 only */
- /* 143 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
- /* 144 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
-
- /* LOAD_2, LOAD_C Mode 11 */
- /* 145 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
- /* 146 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 147 */ CR( 6, 1, B0, 0, 0, 0, 0), /* B0 (S=0) */
- /* 148 */ CR( 6, 2, F0, 0, 0, 0, 0), /* F0 */
- /* 149 */ CR( 6, 1, B1, 0, 0, 0, 0), /* B1 (S=0) */
- /* 150 */ CR( 6, 2, F1, 0, 0, 0, 0), /* F1 */
- /* 151 */ CR( 6, 1, B2, 0, 0, 0, 0), /* B2 (S=0) */
- /* 152 */ CR( 6, 2, F2, 0, 0, 0, 0), /* F2 */
- /* 153 */ CR( 6, 1, B3, 0, 0, 0, 0), /* B3 (S=0) */
- /* 154 */ CR( 7, 1, F3, 0, 0, 0, 0), /* F3 */
- /* 155 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
- /* 156 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
- /* 157 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
- /* 158 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
- /* LOAD_2 only */
- /* 159 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
- /* 160 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
-
- /* -------------------------------------------------------------------- */
- /* Opcode 0011: SETMSB_3 */
- /* Opcode 0101: SETMSB_5 */
- /* -------------------------------------------------------------------- */
- /* Mode 00 only */
- /* 161 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
- /* Mode 00 and 01 */
- /* 162 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
- /* 163 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 164 */ CR( 5, 3, F0, 0, 1, 0, 0), /* F0 (5 MSBs) */
- /* 165 */ CR( 5, 3, F1, 0, 1, 0, 0), /* F1 (5 MSBs) */
- /* 166 */ CR( 5, 3, F2, 0, 1, 0, 0), /* F2 (5 MSBs) */
- /* SETMSB_3 only */
- /* 167 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
- /* 168 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
-
- /* Mode 10 only */
- /* 169 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
- /* Mode 10 and 11 */
- /* 170 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
- /* 171 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
- /* 172 */ CR( 6, 2, F0, 0, 1, 0, 0), /* F0 (6 MSBs) */
- /* 173 */ CR( 6, 2, F1, 0, 1, 0, 0), /* F1 (6 MSBs) */
- /* 174 */ CR( 6, 2, F2, 0, 1, 0, 0), /* F2 (6 MSBs) */
- /* SETMSB_3 only */
- /* 175 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
- /* 176 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
+ /* -------------------------------------------------------------------- */
+ /* OPCODE 1111: PAUSE */
+ /* -------------------------------------------------------------------- */
+ /* 0 */ CR( 0, 0, 0, 0, 0, 0, 1), /* Clear all */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 0001: LOADALL */
+ /* -------------------------------------------------------------------- */
+ /* All modes */
+ /* 1 */ CR( 8, 0, AM, 0, 0, 0, 1), /* Amplitude */
+ /* 2 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 3 */ CR( 8, 0, B0, 0, 0, 0, 0), /* B0 */
+ /* 4 */ CR( 8, 0, F0, 0, 0, 0, 0), /* F0 */
+ /* 5 */ CR( 8, 0, B1, 0, 0, 0, 0), /* B1 */
+ /* 6 */ CR( 8, 0, F1, 0, 0, 0, 0), /* F1 */
+ /* 7 */ CR( 8, 0, B2, 0, 0, 0, 0), /* B2 */
+ /* 8 */ CR( 8, 0, F2, 0, 0, 0, 0), /* F2 */
+ /* 9 */ CR( 8, 0, B3, 0, 0, 0, 0), /* B3 */
+ /* 10 */ CR( 8, 0, F3, 0, 0, 0, 0), /* F3 */
+ /* 11 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
+ /* 12 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
+ /* 13 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
+ /* 14 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
+ /* Mode 01 and 11 only */
+ /* 15 */ CR( 8, 0, IA, 0, 0, 0, 0), /* Amp Interp */
+ /* 16 */ CR( 8, 0, IP, 0, 0, 0, 0), /* Pit Interp */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 0100: LOAD_4 */
+ /* -------------------------------------------------------------------- */
+ /* Mode 00 and 01 */
+ /* 17 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
+ /* 18 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 19 */ CR( 4, 3, B3, 0, 0, 0, 0), /* B3 (S=0) */
+ /* 20 */ CR( 6, 2, F3, 0, 0, 0, 0), /* F3 */
+ /* 21 */ CR( 7, 1, B4, 0, 0, 0, 0), /* B4 */
+ /* 22 */ CR( 6, 2, F4, 0, 0, 0, 0), /* F4 */
+ /* Mode 01 only */
+ /* 23 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
+ /* 24 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
+
+ /* Mode 10 and 11 */
+ /* 25 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
+ /* 26 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 27 */ CR( 6, 1, B3, 0, 0, 0, 0), /* B3 (S=0) */
+ /* 28 */ CR( 7, 1, F3, 0, 0, 0, 0), /* F3 */
+ /* 29 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
+ /* 30 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
+ /* Mode 11 only */
+ /* 31 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
+ /* 32 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 0110: SETMSB_6 */
+ /* -------------------------------------------------------------------- */
+ /* Mode 00 only */
+ /* 33 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
+ /* Mode 00 and 01 */
+ /* 34 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
+ /* 35 */ CR( 6, 2, F3, 0, 1, 0, 0), /* F3 (5 MSBs) */
+ /* 36 */ CR( 6, 2, F4, 0, 1, 0, 0), /* F4 (5 MSBs) */
+ /* Mode 01 only */
+ /* 37 */ CR( 8, 0, F5, 0, 1, 0, 0), /* F5 (5 MSBs) */
+
+ /* Mode 10 only */
+ /* 38 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
+ /* Mode 10 and 11 */
+ /* 39 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
+ /* 40 */ CR( 7, 1, F3, 0, 1, 0, 0), /* F3 (6 MSBs) */
+ /* 41 */ CR( 8, 0, F4, 0, 1, 0, 0), /* F4 (6 MSBs) */
+ /* Mode 11 only */
+ /* 42 */ CR( 8, 0, F5, 0, 1, 0, 0), /* F5 (6 MSBs) */
+
+ /* 43 */ 0, /* unused */
+ /* 44 */ 0, /* unused */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 1001: DELTA_9 */
+ /* -------------------------------------------------------------------- */
+ /* Mode 00 and 01 */
+ /* 45 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
+ /* 46 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
+ /* 47 */ CR( 3, 4, B0, 1, 0, 0, 0), /* B0 4 MSBs */
+ /* 48 */ CR( 3, 3, F0, 1, 0, 0, 0), /* F0 5 MSBs */
+ /* 49 */ CR( 3, 4, B1, 1, 0, 0, 0), /* B1 4 MSBs */
+ /* 50 */ CR( 3, 3, F1, 1, 0, 0, 0), /* F1 5 MSBs */
+ /* 51 */ CR( 3, 4, B2, 1, 0, 0, 0), /* B2 4 MSBs */
+ /* 52 */ CR( 3, 3, F2, 1, 0, 0, 0), /* F2 5 MSBs */
+ /* 53 */ CR( 3, 3, B3, 1, 0, 0, 0), /* B3 5 MSBs */
+ /* 54 */ CR( 4, 2, F3, 1, 0, 0, 0), /* F3 6 MSBs */
+ /* 55 */ CR( 4, 1, B4, 1, 0, 0, 0), /* B4 7 MSBs */
+ /* 56 */ CR( 4, 2, F4, 1, 0, 0, 0), /* F4 6 MSBs */
+ /* Mode 01 only */
+ /* 57 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
+ /* 58 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
+
+ /* Mode 10 and 11 */
+ /* 59 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
+ /* 60 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
+ /* 61 */ CR( 4, 1, B0, 1, 0, 0, 0), /* B0 7 MSBs */
+ /* 62 */ CR( 4, 2, F0, 1, 0, 0, 0), /* F0 6 MSBs */
+ /* 63 */ CR( 4, 1, B1, 1, 0, 0, 0), /* B1 7 MSBs */
+ /* 64 */ CR( 4, 2, F1, 1, 0, 0, 0), /* F1 6 MSBs */
+ /* 65 */ CR( 4, 1, B2, 1, 0, 0, 0), /* B2 7 MSBs */
+ /* 66 */ CR( 4, 2, F2, 1, 0, 0, 0), /* F2 6 MSBs */
+ /* 67 */ CR( 4, 1, B3, 1, 0, 0, 0), /* B3 7 MSBs */
+ /* 68 */ CR( 5, 1, F3, 1, 0, 0, 0), /* F3 7 MSBs */
+ /* 69 */ CR( 5, 0, B4, 1, 0, 0, 0), /* B4 8 MSBs */
+ /* 70 */ CR( 5, 0, F4, 1, 0, 0, 0), /* F4 8 MSBs */
+ /* Mode 11 only */
+ /* 71 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
+ /* 72 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 1010: SETMSB_A */
+ /* -------------------------------------------------------------------- */
+ /* Mode 00 only */
+ /* 73 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
+ /* Mode 00 and 01 */
+ /* 74 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
+ /* 75 */ CR( 5, 3, F0, 0, 1, 0, 0), /* F0 (5 MSBs) */
+ /* 76 */ CR( 5, 3, F1, 0, 1, 0, 0), /* F1 (5 MSBs) */
+ /* 77 */ CR( 5, 3, F2, 0, 1, 0, 0), /* F2 (5 MSBs) */
+
+ /* Mode 10 only */
+ /* 78 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
+ /* Mode 10 and 11 */
+ /* 79 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
+ /* 80 */ CR( 6, 2, F0, 0, 1, 0, 0), /* F0 (6 MSBs) */
+ /* 81 */ CR( 6, 2, F1, 0, 1, 0, 0), /* F1 (6 MSBs) */
+ /* 82 */ CR( 6, 2, F2, 0, 1, 0, 0), /* F2 (6 MSBs) */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 0010: LOAD_2 Mode 00 and 10 */
+ /* Opcode 1100: LOAD_C Mode 00 and 10 */
+ /* -------------------------------------------------------------------- */
+ /* LOAD_2, LOAD_C Mode 00 */
+ /* 83 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
+ /* 84 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 85 */ CR( 3, 4, B0, 0, 0, 0, 0), /* B0 (S=0) */
+ /* 86 */ CR( 5, 3, F0, 0, 0, 0, 0), /* F0 */
+ /* 87 */ CR( 3, 4, B1, 0, 0, 0, 0), /* B1 (S=0) */
+ /* 88 */ CR( 5, 3, F1, 0, 0, 0, 0), /* F1 */
+ /* 89 */ CR( 3, 4, B2, 0, 0, 0, 0), /* B2 (S=0) */
+ /* 90 */ CR( 5, 3, F2, 0, 0, 0, 0), /* F2 */
+ /* 91 */ CR( 4, 3, B3, 0, 0, 0, 0), /* B3 (S=0) */
+ /* 92 */ CR( 6, 2, F3, 0, 0, 0, 0), /* F3 */
+ /* 93 */ CR( 7, 1, B4, 0, 0, 0, 0), /* B4 */
+ /* 94 */ CR( 6, 2, F4, 0, 0, 0, 0), /* F4 */
+ /* LOAD_2 only */
+ /* 95 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
+ /* 96 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
+
+ /* LOAD_2, LOAD_C Mode 10 */
+ /* 97 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
+ /* 98 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 99 */ CR( 6, 1, B0, 0, 0, 0, 0), /* B0 (S=0) */
+ /* 100 */ CR( 6, 2, F0, 0, 0, 0, 0), /* F0 */
+ /* 101 */ CR( 6, 1, B1, 0, 0, 0, 0), /* B1 (S=0) */
+ /* 102 */ CR( 6, 2, F1, 0, 0, 0, 0), /* F1 */
+ /* 103 */ CR( 6, 1, B2, 0, 0, 0, 0), /* B2 (S=0) */
+ /* 104 */ CR( 6, 2, F2, 0, 0, 0, 0), /* F2 */
+ /* 105 */ CR( 6, 1, B3, 0, 0, 0, 0), /* B3 (S=0) */
+ /* 106 */ CR( 7, 1, F3, 0, 0, 0, 0), /* F3 */
+ /* 107 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
+ /* 108 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
+ /* LOAD_2 only */
+ /* 109 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
+ /* 110 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
+
+ /* -------------------------------------------------------------------- */
+ /* OPCODE 1101: DELTA_D */
+ /* -------------------------------------------------------------------- */
+ /* Mode 00 and 01 */
+ /* 111 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
+ /* 112 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
+ /* 113 */ CR( 3, 3, B3, 1, 0, 0, 0), /* B3 5 MSBs */
+ /* 114 */ CR( 4, 2, F3, 1, 0, 0, 0), /* F3 6 MSBs */
+ /* 115 */ CR( 4, 1, B4, 1, 0, 0, 0), /* B4 7 MSBs */
+ /* 116 */ CR( 4, 2, F4, 1, 0, 0, 0), /* F4 6 MSBs */
+ /* Mode 01 only */
+ /* 117 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
+ /* 118 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
+
+ /* Mode 10 and 11 */
+ /* 119 */ CR( 4, 2, AM, 1, 0, 0, 0), /* Amplitude */
+ /* 120 */ CR( 5, 0, PR, 1, 0, 0, 0), /* Period */
+ /* 121 */ CR( 4, 1, B3, 1, 0, 0, 0), /* B3 7 MSBs */
+ /* 122 */ CR( 5, 1, F3, 1, 0, 0, 0), /* F3 7 MSBs */
+ /* 123 */ CR( 5, 0, B4, 1, 0, 0, 0), /* B4 8 MSBs */
+ /* 124 */ CR( 5, 0, F4, 1, 0, 0, 0), /* F4 8 MSBs */
+ /* Mode 11 only */
+ /* 125 */ CR( 5, 0, B5, 1, 0, 0, 0), /* B5 8 MSBs */
+ /* 126 */ CR( 5, 0, F5, 1, 0, 0, 0), /* F5 8 MSBs */
+
+ /* -------------------------------------------------------------------- */
+ /* OPCODE 1110: LOAD_E */
+ /* -------------------------------------------------------------------- */
+ /* 127 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
+ /* 128 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 0010: LOAD_2 Mode 01 and 11 */
+ /* Opcode 1100: LOAD_C Mode 01 and 11 */
+ /* -------------------------------------------------------------------- */
+ /* LOAD_2, LOAD_C Mode 01 */
+ /* 129 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
+ /* 130 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 131 */ CR( 3, 4, B0, 0, 0, 0, 0), /* B0 (S=0) */
+ /* 132 */ CR( 5, 3, F0, 0, 0, 0, 0), /* F0 */
+ /* 133 */ CR( 3, 4, B1, 0, 0, 0, 0), /* B1 (S=0) */
+ /* 134 */ CR( 5, 3, F1, 0, 0, 0, 0), /* F1 */
+ /* 135 */ CR( 3, 4, B2, 0, 0, 0, 0), /* B2 (S=0) */
+ /* 136 */ CR( 5, 3, F2, 0, 0, 0, 0), /* F2 */
+ /* 137 */ CR( 4, 3, B3, 0, 0, 0, 0), /* B3 (S=0) */
+ /* 138 */ CR( 6, 2, F3, 0, 0, 0, 0), /* F3 */
+ /* 139 */ CR( 7, 1, B4, 0, 0, 0, 0), /* B4 */
+ /* 140 */ CR( 6, 2, F4, 0, 0, 0, 0), /* F4 */
+ /* 141 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
+ /* 142 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
+ /* LOAD_2 only */
+ /* 143 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
+ /* 144 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
+
+ /* LOAD_2, LOAD_C Mode 11 */
+ /* 145 */ CR( 6, 2, AM, 0, 0, 0, 1), /* Amplitude */
+ /* 146 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 147 */ CR( 6, 1, B0, 0, 0, 0, 0), /* B0 (S=0) */
+ /* 148 */ CR( 6, 2, F0, 0, 0, 0, 0), /* F0 */
+ /* 149 */ CR( 6, 1, B1, 0, 0, 0, 0), /* B1 (S=0) */
+ /* 150 */ CR( 6, 2, F1, 0, 0, 0, 0), /* F1 */
+ /* 151 */ CR( 6, 1, B2, 0, 0, 0, 0), /* B2 (S=0) */
+ /* 152 */ CR( 6, 2, F2, 0, 0, 0, 0), /* F2 */
+ /* 153 */ CR( 6, 1, B3, 0, 0, 0, 0), /* B3 (S=0) */
+ /* 154 */ CR( 7, 1, F3, 0, 0, 0, 0), /* F3 */
+ /* 155 */ CR( 8, 0, B4, 0, 0, 0, 0), /* B4 */
+ /* 156 */ CR( 8, 0, F4, 0, 0, 0, 0), /* F4 */
+ /* 157 */ CR( 8, 0, B5, 0, 0, 0, 0), /* B5 */
+ /* 158 */ CR( 8, 0, F5, 0, 0, 0, 0), /* F5 */
+ /* LOAD_2 only */
+ /* 159 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
+ /* 160 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
+
+ /* -------------------------------------------------------------------- */
+ /* Opcode 0011: SETMSB_3 */
+ /* Opcode 0101: SETMSB_5 */
+ /* -------------------------------------------------------------------- */
+ /* Mode 00 only */
+ /* 161 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
+ /* Mode 00 and 01 */
+ /* 162 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
+ /* 163 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 164 */ CR( 5, 3, F0, 0, 1, 0, 0), /* F0 (5 MSBs) */
+ /* 165 */ CR( 5, 3, F1, 0, 1, 0, 0), /* F1 (5 MSBs) */
+ /* 166 */ CR( 5, 3, F2, 0, 1, 0, 0), /* F2 (5 MSBs) */
+ /* SETMSB_3 only */
+ /* 167 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
+ /* 168 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
+
+ /* Mode 10 only */
+ /* 169 */ CR( 0, 0, 0, 0, 0, 1, 0), /* Clear 5 */
+ /* Mode 10 and 11 */
+ /* 170 */ CR( 6, 2, AM, 0, 0, 0, 0), /* Amplitude */
+ /* 171 */ CR( 8, 0, PR, 0, 0, 0, 0), /* Period */
+ /* 172 */ CR( 6, 2, F0, 0, 1, 0, 0), /* F0 (6 MSBs) */
+ /* 173 */ CR( 6, 2, F1, 0, 1, 0, 0), /* F1 (6 MSBs) */
+ /* 174 */ CR( 6, 2, F2, 0, 1, 0, 0), /* F2 (6 MSBs) */
+ /* SETMSB_3 only */
+ /* 175 */ CR( 5, 0, IA, 0, 0, 0, 0), /* Ampl. Intr. */
+ /* 176 */ CR( 5, 0, IP, 0, 0, 0, 0), /* Per. Intr. */
};
static const INT16 sp0256_df_idx[16 * 8] =
{
- /* OPCODE 0000 */ -1, -1, -1, -1, -1, -1, -1, -1,
- /* OPCODE 1000 */ -1, -1, -1, -1, -1, -1, -1, -1,
- /* OPCODE 0100 */ 17, 22, 17, 24, 25, 30, 25, 32,
- /* OPCODE 1100 */ 83, 94, 129,142, 97, 108, 145,158,
- /* OPCODE 0010 */ 83, 96, 129,144, 97, 110, 145,160,
- /* OPCODE 1010 */ 73, 77, 74, 77, 78, 82, 79, 82,
- /* OPCODE 0110 */ 33, 36, 34, 37, 38, 41, 39, 42,
- /* OPCODE 1110 */ 127,128, 127,128, 127,128, 127,128,
- /* OPCODE 0001 */ 1, 14, 1, 16, 1, 14, 1, 16,
- /* OPCODE 1001 */ 45, 56, 45, 58, 59, 70, 59, 72,
- /* OPCODE 0101 */ 161,166, 162,166, 169,174, 170,174,
- /* OPCODE 1101 */ 111,116, 111,118, 119,124, 119,126,
- /* OPCODE 0011 */ 161,168, 162,168, 169,176, 170,176,
- /* OPCODE 1011 */ -1, -1, -1, -1, -1, -1, -1, -1,
- /* OPCODE 0111 */ -1, -1, -1, -1, -1, -1, -1, -1,
- /* OPCODE 1111 */ 0, 0, 0, 0, 0, 0, 0, 0
+ /* OPCODE 0000 */ -1, -1, -1, -1, -1, -1, -1, -1,
+ /* OPCODE 1000 */ -1, -1, -1, -1, -1, -1, -1, -1,
+ /* OPCODE 0100 */ 17, 22, 17, 24, 25, 30, 25, 32,
+ /* OPCODE 1100 */ 83, 94, 129,142, 97, 108, 145,158,
+ /* OPCODE 0010 */ 83, 96, 129,144, 97, 110, 145,160,
+ /* OPCODE 1010 */ 73, 77, 74, 77, 78, 82, 79, 82,
+ /* OPCODE 0110 */ 33, 36, 34, 37, 38, 41, 39, 42,
+ /* OPCODE 1110 */ 127,128, 127,128, 127,128, 127,128,
+ /* OPCODE 0001 */ 1, 14, 1, 16, 1, 14, 1, 16,
+ /* OPCODE 1001 */ 45, 56, 45, 58, 59, 70, 59, 72,
+ /* OPCODE 0101 */ 161,166, 162,166, 169,174, 170,174,
+ /* OPCODE 1101 */ 111,116, 111,118, 119,124, 119,126,
+ /* OPCODE 0011 */ 161,168, 162,168, 169,176, 170,176,
+ /* OPCODE 1011 */ -1, -1, -1, -1, -1, -1, -1, -1,
+ /* OPCODE 0111 */ -1, -1, -1, -1, -1, -1, -1, -1,
+ /* OPCODE 1111 */ 0, 0, 0, 0, 0, 0, 0, 0
};
/* ======================================================================== */
@@ -650,13 +650,13 @@ static const INT16 sp0256_df_idx[16 * 8] =
/* ======================================================================== */
static UINT32 bitrev32(UINT32 val)
{
- val = ((val & 0xFFFF0000) >> 16) | ((val & 0x0000FFFF) << 16);
- val = ((val & 0xFF00FF00) >> 8) | ((val & 0x00FF00FF) << 8);
- val = ((val & 0xF0F0F0F0) >> 4) | ((val & 0x0F0F0F0F) << 4);
- val = ((val & 0xCCCCCCCC) >> 2) | ((val & 0x33333333) << 2);
- val = ((val & 0xAAAAAAAA) >> 1) | ((val & 0x55555555) << 1);
+ val = ((val & 0xFFFF0000) >> 16) | ((val & 0x0000FFFF) << 16);
+ val = ((val & 0xFF00FF00) >> 8) | ((val & 0x00FF00FF) << 8);
+ val = ((val & 0xF0F0F0F0) >> 4) | ((val & 0x0F0F0F0F) << 4);
+ val = ((val & 0xCCCCCCCC) >> 2) | ((val & 0x33333333) << 2);
+ val = ((val & 0xAAAAAAAA) >> 1) | ((val & 0x55555555) << 1);
- return val;
+ return val;
}
/* ======================================================================== */
@@ -664,11 +664,11 @@ static UINT32 bitrev32(UINT32 val)
/* ======================================================================== */
static UINT8 bitrev8(UINT8 val)
{
- val = ((val & 0xF0) >> 4) | ((val & 0x0F) << 4);
- val = ((val & 0xCC) >> 2) | ((val & 0x33) << 2);
- val = ((val & 0xAA) >> 1) | ((val & 0x55) << 1);
+ val = ((val & 0xF0) >> 4) | ((val & 0x0F) << 4);
+ val = ((val & 0xCC) >> 2) | ((val & 0x33) << 2);
+ val = ((val & 0xAA) >> 1) | ((val & 0x55) << 1);
- return val;
+ return val;
}
/* ======================================================================== */
@@ -687,57 +687,57 @@ void sp0256_bitrevbuff(UINT8 *buffer, unsigned int start, unsigned int length)
/* ======================================================================== */
static UINT32 sp0256_getb(sp0256_state *sp, int len)
{
- UINT32 data = 0;
- UINT32 d0, d1;
-
- /* -------------------------------------------------------------------- */
- /* Fetch data from the FIFO or from the MASK */
- /* -------------------------------------------------------------------- */
- if (sp->fifo_sel)
- {
- d0 = sp->fifo[(sp->fifo_tail ) & 63];
- d1 = sp->fifo[(sp->fifo_tail + 1) & 63];
-
- data = ((d1 << 10) | d0) >> sp->fifo_bitp;
-
- LOG_FIFO( ("sp0256: RD_FIFO %.3X %d.%d %d\n", data & ((1 << len) - 1),
- sp->fifo_tail, sp->fifo_bitp, sp->fifo_head));
-
- /* ---------------------------------------------------------------- */
- /* Note the PC doesn't advance when we execute from FIFO. */
- /* Just the FIFO's bit-pointer advances. (That's not REALLY */
- /* what happens, but that's roughly how it behaves.) */
- /* ---------------------------------------------------------------- */
- sp->fifo_bitp += len;
- if (sp->fifo_bitp >= 10)
- {
- sp->fifo_tail++;
- sp->fifo_bitp -= 10;
- }
- } else
- {
- /* ---------------------------------------------------------------- */
- /* Figure out which ROMs are being fetched into, and grab two */
- /* adjacent bytes. The byte we're interested in is extracted */
- /* from the appropriate bit-boundary between them. */
- /* ---------------------------------------------------------------- */
- int idx0 = (sp->pc ) >> 3, d0;
- int idx1 = (sp->pc + 8) >> 3, d1;
+ UINT32 data = 0;
+ UINT32 d0, d1;
+
+ /* -------------------------------------------------------------------- */
+ /* Fetch data from the FIFO or from the MASK */
+ /* -------------------------------------------------------------------- */
+ if (sp->fifo_sel)
+ {
+ d0 = sp->fifo[(sp->fifo_tail ) & 63];
+ d1 = sp->fifo[(sp->fifo_tail + 1) & 63];
+
+ data = ((d1 << 10) | d0) >> sp->fifo_bitp;
+
+ LOG_FIFO( ("sp0256: RD_FIFO %.3X %d.%d %d\n", data & ((1 << len) - 1),
+ sp->fifo_tail, sp->fifo_bitp, sp->fifo_head));
+
+ /* ---------------------------------------------------------------- */
+ /* Note the PC doesn't advance when we execute from FIFO. */
+ /* Just the FIFO's bit-pointer advances. (That's not REALLY */
+ /* what happens, but that's roughly how it behaves.) */
+ /* ---------------------------------------------------------------- */
+ sp->fifo_bitp += len;
+ if (sp->fifo_bitp >= 10)
+ {
+ sp->fifo_tail++;
+ sp->fifo_bitp -= 10;
+ }
+ } else
+ {
+ /* ---------------------------------------------------------------- */
+ /* Figure out which ROMs are being fetched into, and grab two */
+ /* adjacent bytes. The byte we're interested in is extracted */
+ /* from the appropriate bit-boundary between them. */
+ /* ---------------------------------------------------------------- */
+ int idx0 = (sp->pc ) >> 3, d0;
+ int idx1 = (sp->pc + 8) >> 3, d1;
d0 = sp->rom[idx0 & 0xffff];
d1 = sp->rom[idx1 & 0xffff];
- data = ((d1 << 8) | d0) >> (sp->pc & 7);
+ data = ((d1 << 8) | d0) >> (sp->pc & 7);
- sp->pc += len;
- }
+ sp->pc += len;
+ }
- /* -------------------------------------------------------------------- */
- /* Mask data to the requested length. */
- /* -------------------------------------------------------------------- */
- data &= ((1 << len) - 1);
+ /* -------------------------------------------------------------------- */
+ /* Mask data to the requested length. */
+ /* -------------------------------------------------------------------- */
+ data &= ((1 << len) - 1);
- return data;
+ return data;
}
/* ======================================================================== */
@@ -747,354 +747,354 @@ static UINT32 sp0256_getb(sp0256_state *sp, int len)
/* ======================================================================== */
static void sp0256_micro(sp0256_state *sp)
{
- UINT8 immed4;
- UINT8 opcode;
- UINT16 cr;
- int ctrl_xfer = 0;
- int repeat = 0;
- int i, idx0, idx1;
-
- /* -------------------------------------------------------------------- */
- /* Only execute instructions while the filter is not busy. */
- /* -------------------------------------------------------------------- */
- while (sp->filt.rpt <= 0)
- {
- /* ---------------------------------------------------------------- */
- /* If the CPU is halted, see if we have a new command pending */
- /* in the Address LoaD buffer. */
- /* ---------------------------------------------------------------- */
- if (sp->halted && !sp->lrq)
- {
- sp->pc = sp->ald | (0x1000 << 3);
- sp->fifo_sel = 0;
- sp->halted = 0;
- sp->lrq = 0x8000;
- sp->ald = 0;
- for (i = 0; i < 16; i++)
- sp->filt.r[i] = 0;
- sp->drq(1);
- }
-
- /* ---------------------------------------------------------------- */
- /* If we're still halted, do nothing. */
- /* ---------------------------------------------------------------- */
- if (sp->halted)
- {
- sp->filt.rpt = 1;
- sp->lrq = 0x8000;
- sp->ald = 0;
- for (i = 0; i < 16; i++)
- sp->filt.r[i] = 0;
-
- SET_SBY(1)
-
- return;
- }
-
- /* ---------------------------------------------------------------- */
- /* Fetch the first 8 bits of the opcode, which are always in the */
- /* same approximate format -- immed4 followed by opcode. */
- /* ---------------------------------------------------------------- */
- immed4 = sp0256_getb(sp, 4);
- opcode = sp0256_getb(sp, 4);
- repeat = 0;
- ctrl_xfer = 0;
-
- LOG(("$%.4X.%.1X: OPCODE %d%d%d%d.%d%d\n",
- (sp->pc >> 3) - 1, sp->pc & 7,
- !!(opcode & 1), !!(opcode & 2),
- !!(opcode & 4), !!(opcode & 8),
- !!(sp->mode&4), !!(sp->mode&2)));
-
- /* ---------------------------------------------------------------- */
- /* Handle the special cases for specific opcodes. */
- /* ---------------------------------------------------------------- */
- switch (opcode)
- {
- /* ------------------------------------------------------------ */
- /* OPCODE 0000: RTS / SETPAGE */
- /* ------------------------------------------------------------ */
- case 0x0:
- {
- /* -------------------------------------------------------- */
- /* If immed4 != 0, then this is a SETPAGE instruction. */
- /* -------------------------------------------------------- */
- if (immed4) /* SETPAGE */
- {
- sp->page = bitrev32(immed4) >> 13;
- } else
- /* -------------------------------------------------------- */
- /* Otherwise, this is an RTS / HLT. */
- /* -------------------------------------------------------- */
- {
- UINT32 btrg;
-
- /* ---------------------------------------------------- */
- /* Figure out our branch target. */
- /* ---------------------------------------------------- */
- btrg = sp->stack;
-
- sp->stack = 0;
-
- /* ---------------------------------------------------- */
- /* If the branch target is zero, this is a HLT. */
- /* Otherwise, it's an RTS, so set the PC. */
- /* ---------------------------------------------------- */
- if (!btrg)
- {
- sp->halted = 1;
- sp->pc = 0;
- ctrl_xfer = 1;
- } else
- {
- sp->pc = btrg;
- ctrl_xfer = 1;
- }
- }
-
- break;
- }
-
- /* ------------------------------------------------------------ */
- /* OPCODE 0111: JMP Jump to 12-bit/16-bit Abs Addr */
- /* OPCODE 1011: JSR Jump to Subroutine */
- /* ------------------------------------------------------------ */
- case 0xE:
- case 0xD:
- {
- int btrg;
-
- /* -------------------------------------------------------- */
- /* Figure out our branch target. */
- /* -------------------------------------------------------- */
- btrg = sp->page |
- (bitrev32(immed4) >> 17) |
- (bitrev32(sp0256_getb(sp, 8)) >> 21);
- ctrl_xfer = 1;
-
- /* -------------------------------------------------------- */
- /* If this is a JSR, push our return address on the */
- /* stack. Make sure it's byte aligned. */
- /* -------------------------------------------------------- */
- if (opcode == 0xD)
- sp->stack = (sp->pc + 7) & ~7;
-
- /* -------------------------------------------------------- */
- /* Jump to the new location! */
- /* -------------------------------------------------------- */
- sp->pc = btrg;
- break;
- }
-
- /* ------------------------------------------------------------ */
- /* OPCODE 1000: SETMODE Set the Mode and Repeat MSBs */
- /* ------------------------------------------------------------ */
- case 0x1:
- {
- sp->mode = ((immed4 & 8) >> 2) | (immed4 & 4) |
- ((immed4 & 3) << 4);
- break;
- }
-
- /* ------------------------------------------------------------ */
- /* OPCODE 0001: LOADALL Load All Parameters */
- /* OPCODE 0010: LOAD_2 Load Per, Ampl, Coefs, Interp. */
- /* OPCODE 0011: SETMSB_3 Load Pitch, Ampl, MSBs, & Intrp */
- /* OPCODE 0100: LOAD_4 Load Pitch, Ampl, Coeffs */
- /* OPCODE 0101: SETMSB_5 Load Pitch, Ampl, and Coeff MSBs */
- /* OPCODE 0110: SETMSB_6 Load Ampl, and Coeff MSBs. */
- /* OPCODE 1001: DELTA_9 Delta update Ampl, Pitch, Coeffs */
- /* OPCODE 1010: SETMSB_A Load Ampl and MSBs of 3 Coeffs */
- /* OPCODE 1100: LOAD_C Load Pitch, Ampl, Coeffs */
- /* OPCODE 1101: DELTA_D Delta update Ampl, Pitch, Coeffs */
- /* OPCODE 1110: LOAD_E Load Pitch, Amplitude */
- /* OPCODE 1111: PAUSE Silent pause */
- /* ------------------------------------------------------------ */
- default:
- {
- repeat = immed4 | (sp->mode & 0x30);
- break;
- }
- }
- if (opcode != 1) sp->mode &= 0xF;
-
- /* ---------------------------------------------------------------- */
- /* If this was a control transfer, handle setting "fifo_sel" */
- /* and all that ugliness. */
- /* ---------------------------------------------------------------- */
- if (ctrl_xfer)
- {
- LOG(("jumping to $%.4X.%.1X: ", sp->pc >> 3, sp->pc & 7));
-
- /* ------------------------------------------------------------ */
- /* Set our "FIFO Selected" flag based on whether we're going */
- /* to the FIFO's address. */
- /* ------------------------------------------------------------ */
- sp->fifo_sel = sp->pc == FIFO_ADDR;
-
- LOG(("%s ", sp->fifo_sel ? "FIFO" : "ROM"));
-
- /* ------------------------------------------------------------ */
- /* Control transfers to the FIFO cause it to discard the */
- /* partial decle that's at the front of the FIFO. */
- /* ------------------------------------------------------------ */
- if (sp->fifo_sel && sp->fifo_bitp)
- {
- LOG(("bitp = %d -> Flush", sp->fifo_bitp));
-
- /* Discard partially-read decle. */
- if (sp->fifo_tail < sp->fifo_head) sp->fifo_tail++;
- sp->fifo_bitp = 0;
- }
-
- LOG(("\n"));
-
- continue;
- }
-
- /* ---------------------------------------------------------------- */
- /* Otherwise, if we have a repeat count, then go grab the data */
- /* block and feed it to the filter. */
- /* ---------------------------------------------------------------- */
- if (!repeat) continue;
-
- sp->filt.rpt = repeat + 1;
- LOG(("repeat = %d\n", repeat));
-
- i = (opcode << 3) | (sp->mode & 6);
- idx0 = sp0256_df_idx[i++];
- idx1 = sp0256_df_idx[i ];
-
- assert(idx0 >= 0 && idx1 >= 0 && idx1 >= idx0);
-
- /* ---------------------------------------------------------------- */
- /* Step through control words in the description for data block. */
- /* ---------------------------------------------------------------- */
- for (i = idx0; i <= idx1; i++)
- {
- int len, shf, delta, field, prm, clra, clr5;
- INT8 value;
-
- /* ------------------------------------------------------------ */
- /* Get the control word and pull out some important fields. */
- /* ------------------------------------------------------------ */
- cr = sp0256_datafmt[i];
-
- len = CR_LEN(cr);
- shf = CR_SHF(cr);
- prm = CR_PRM(cr);
- clra = cr & CR_CLRA;
- clr5 = cr & CR_CLR5;
- delta = cr & CR_DELTA;
- field = cr & CR_FIELD;
- value = 0;
-
- LOG(("$%.4X.%.1X: len=%2d shf=%2d prm=%2d d=%d f=%d ",
- sp->pc >> 3, sp->pc & 7, len, shf, prm, !!delta, !!field));
- /* ------------------------------------------------------------ */
- /* Clear any registers that were requested to be cleared. */
- /* ------------------------------------------------------------ */
- if (clra)
- {
- int j;
-
- for (j = 0; j < 16; j++)
- sp->filt.r[j] = 0;
-
- sp->silent = 1;
- }
-
- if (clr5)
- sp->filt.r[B5] = sp->filt.r[F5] = 0;
-
- /* ------------------------------------------------------------ */
- /* If this entry has a bitfield with it, grab the bitfield. */
- /* ------------------------------------------------------------ */
- if (len)
- {
- value = sp0256_getb(sp, len);
- }
- else
- {
- LOG((" (no update)\n"));
- continue;
- }
-
- /* ------------------------------------------------------------ */
- /* Sign extend if this is a delta update. */
- /* ------------------------------------------------------------ */
- if (delta) /* Sign extend */
- {
- if (value & (1 << (len - 1))) value |= -1 << len;
- }
-
- /* ------------------------------------------------------------ */
- /* Shift the value to the appropriate precision. */
- /* ------------------------------------------------------------ */
- if (shf)
- value <<= shf;
-
- LOG(("v=%.2X (%c%.2X) ", value & 0xFF,
- value & 0x80 ? '-' : '+',
- 0xFF & (value & 0x80 ? -value : value)));
-
- sp->silent = 0;
-
- /* ------------------------------------------------------------ */
- /* If this is a field-replace, insert the field. */
- /* ------------------------------------------------------------ */
- if (field)
- {
- LOG(("--field-> r[%2d] = %.2X -> ", prm, sp->filt.r[prm]));
-
- sp->filt.r[prm] &= ~(~0 << shf); /* Clear the old bits. */
- sp->filt.r[prm] |= value; /* Merge in the new bits. */
-
- LOG(("%.2X\n", sp->filt.r[prm]));
-
- continue;
- }
-
- /* ------------------------------------------------------------ */
- /* If this is a delta update, add to the appropriate field. */
- /* ------------------------------------------------------------ */
- if (delta)
- {
- LOG(("--delta-> r[%2d] = %.2X -> ", prm, sp->filt.r[prm]));
-
- sp->filt.r[prm] += value;
-
- LOG(("%.2X\n", sp->filt.r[prm]));
-
- continue;
- }
-
- /* ------------------------------------------------------------ */
- /* Otherwise, just write the new value. */
- /* ------------------------------------------------------------ */
- sp->filt.r[prm] = value;
- LOG(("--value-> r[%2d] = %.2X\n", prm, sp->filt.r[prm]));
- }
-
- /* ---------------------------------------------------------------- */
- /* Special case: Set PAUSE's equivalent period. */
- /* ---------------------------------------------------------------- */
- if (opcode == 0xF)
- {
- sp->silent = 1;
- sp->filt.r[1] = PER_PAUSE;
- }
-
- /* ---------------------------------------------------------------- */
- /* Now that we've updated the registers, go decode them. */
- /* ---------------------------------------------------------------- */
- lpc12_regdec(&sp->filt);
-
- /* ---------------------------------------------------------------- */
- /* Break out since we now have a repeat count. */
- /* ---------------------------------------------------------------- */
- break;
- }
+ UINT8 immed4;
+ UINT8 opcode;
+ UINT16 cr;
+ int ctrl_xfer = 0;
+ int repeat = 0;
+ int i, idx0, idx1;
+
+ /* -------------------------------------------------------------------- */
+ /* Only execute instructions while the filter is not busy. */
+ /* -------------------------------------------------------------------- */
+ while (sp->filt.rpt <= 0)
+ {
+ /* ---------------------------------------------------------------- */
+ /* If the CPU is halted, see if we have a new command pending */
+ /* in the Address LoaD buffer. */
+ /* ---------------------------------------------------------------- */
+ if (sp->halted && !sp->lrq)
+ {
+ sp->pc = sp->ald | (0x1000 << 3);
+ sp->fifo_sel = 0;
+ sp->halted = 0;
+ sp->lrq = 0x8000;
+ sp->ald = 0;
+ for (i = 0; i < 16; i++)
+ sp->filt.r[i] = 0;
+ sp->drq(1);
+ }
+
+ /* ---------------------------------------------------------------- */
+ /* If we're still halted, do nothing. */
+ /* ---------------------------------------------------------------- */
+ if (sp->halted)
+ {
+ sp->filt.rpt = 1;
+ sp->lrq = 0x8000;
+ sp->ald = 0;
+ for (i = 0; i < 16; i++)
+ sp->filt.r[i] = 0;
+
+ SET_SBY(1)
+
+ return;
+ }
+
+ /* ---------------------------------------------------------------- */
+ /* Fetch the first 8 bits of the opcode, which are always in the */
+ /* same approximate format -- immed4 followed by opcode. */
+ /* ---------------------------------------------------------------- */
+ immed4 = sp0256_getb(sp, 4);
+ opcode = sp0256_getb(sp, 4);
+ repeat = 0;
+ ctrl_xfer = 0;
+
+ LOG(("$%.4X.%.1X: OPCODE %d%d%d%d.%d%d\n",
+ (sp->pc >> 3) - 1, sp->pc & 7,
+ !!(opcode & 1), !!(opcode & 2),
+ !!(opcode & 4), !!(opcode & 8),
+ !!(sp->mode&4), !!(sp->mode&2)));
+
+ /* ---------------------------------------------------------------- */
+ /* Handle the special cases for specific opcodes. */
+ /* ---------------------------------------------------------------- */
+ switch (opcode)
+ {
+ /* ------------------------------------------------------------ */
+ /* OPCODE 0000: RTS / SETPAGE */
+ /* ------------------------------------------------------------ */
+ case 0x0:
+ {
+ /* -------------------------------------------------------- */
+ /* If immed4 != 0, then this is a SETPAGE instruction. */
+ /* -------------------------------------------------------- */
+ if (immed4) /* SETPAGE */
+ {
+ sp->page = bitrev32(immed4) >> 13;
+ } else
+ /* -------------------------------------------------------- */
+ /* Otherwise, this is an RTS / HLT. */
+ /* -------------------------------------------------------- */
+ {
+ UINT32 btrg;
+
+ /* ---------------------------------------------------- */
+ /* Figure out our branch target. */
+ /* ---------------------------------------------------- */
+ btrg = sp->stack;
+
+ sp->stack = 0;
+
+ /* ---------------------------------------------------- */
+ /* If the branch target is zero, this is a HLT. */
+ /* Otherwise, it's an RTS, so set the PC. */
+ /* ---------------------------------------------------- */
+ if (!btrg)
+ {
+ sp->halted = 1;
+ sp->pc = 0;
+ ctrl_xfer = 1;
+ } else
+ {
+ sp->pc = btrg;
+ ctrl_xfer = 1;
+ }
+ }
+
+ break;
+ }
+
+ /* ------------------------------------------------------------ */
+ /* OPCODE 0111: JMP Jump to 12-bit/16-bit Abs Addr */
+ /* OPCODE 1011: JSR Jump to Subroutine */
+ /* ------------------------------------------------------------ */
+ case 0xE:
+ case 0xD:
+ {
+ int btrg;
+
+ /* -------------------------------------------------------- */
+ /* Figure out our branch target. */
+ /* -------------------------------------------------------- */
+ btrg = sp->page |
+ (bitrev32(immed4) >> 17) |
+ (bitrev32(sp0256_getb(sp, 8)) >> 21);
+ ctrl_xfer = 1;
+
+ /* -------------------------------------------------------- */
+ /* If this is a JSR, push our return address on the */
+ /* stack. Make sure it's byte aligned. */
+ /* -------------------------------------------------------- */
+ if (opcode == 0xD)
+ sp->stack = (sp->pc + 7) & ~7;
+
+ /* -------------------------------------------------------- */
+ /* Jump to the new location! */
+ /* -------------------------------------------------------- */
+ sp->pc = btrg;
+ break;
+ }
+
+ /* ------------------------------------------------------------ */
+ /* OPCODE 1000: SETMODE Set the Mode and Repeat MSBs */
+ /* ------------------------------------------------------------ */
+ case 0x1:
+ {
+ sp->mode = ((immed4 & 8) >> 2) | (immed4 & 4) |
+ ((immed4 & 3) << 4);
+ break;
+ }
+
+ /* ------------------------------------------------------------ */
+ /* OPCODE 0001: LOADALL Load All Parameters */
+ /* OPCODE 0010: LOAD_2 Load Per, Ampl, Coefs, Interp. */
+ /* OPCODE 0011: SETMSB_3 Load Pitch, Ampl, MSBs, & Intrp */
+ /* OPCODE 0100: LOAD_4 Load Pitch, Ampl, Coeffs */
+ /* OPCODE 0101: SETMSB_5 Load Pitch, Ampl, and Coeff MSBs */
+ /* OPCODE 0110: SETMSB_6 Load Ampl, and Coeff MSBs. */
+ /* OPCODE 1001: DELTA_9 Delta update Ampl, Pitch, Coeffs */
+ /* OPCODE 1010: SETMSB_A Load Ampl and MSBs of 3 Coeffs */
+ /* OPCODE 1100: LOAD_C Load Pitch, Ampl, Coeffs */
+ /* OPCODE 1101: DELTA_D Delta update Ampl, Pitch, Coeffs */
+ /* OPCODE 1110: LOAD_E Load Pitch, Amplitude */
+ /* OPCODE 1111: PAUSE Silent pause */
+ /* ------------------------------------------------------------ */
+ default:
+ {
+ repeat = immed4 | (sp->mode & 0x30);
+ break;
+ }
+ }
+ if (opcode != 1) sp->mode &= 0xF;
+
+ /* ---------------------------------------------------------------- */
+ /* If this was a control transfer, handle setting "fifo_sel" */
+ /* and all that ugliness. */
+ /* ---------------------------------------------------------------- */
+ if (ctrl_xfer)
+ {
+ LOG(("jumping to $%.4X.%.1X: ", sp->pc >> 3, sp->pc & 7));
+
+ /* ------------------------------------------------------------ */
+ /* Set our "FIFO Selected" flag based on whether we're going */
+ /* to the FIFO's address. */
+ /* ------------------------------------------------------------ */
+ sp->fifo_sel = sp->pc == FIFO_ADDR;
+
+ LOG(("%s ", sp->fifo_sel ? "FIFO" : "ROM"));
+
+ /* ------------------------------------------------------------ */
+ /* Control transfers to the FIFO cause it to discard the */
+ /* partial decle that's at the front of the FIFO. */
+ /* ------------------------------------------------------------ */
+ if (sp->fifo_sel && sp->fifo_bitp)
+ {
+ LOG(("bitp = %d -> Flush", sp->fifo_bitp));
+
+ /* Discard partially-read decle. */
+ if (sp->fifo_tail < sp->fifo_head) sp->fifo_tail++;
+ sp->fifo_bitp = 0;
+ }
+
+ LOG(("\n"));
+
+ continue;
+ }
+
+ /* ---------------------------------------------------------------- */
+ /* Otherwise, if we have a repeat count, then go grab the data */
+ /* block and feed it to the filter. */
+ /* ---------------------------------------------------------------- */
+ if (!repeat) continue;
+
+ sp->filt.rpt = repeat + 1;
+ LOG(("repeat = %d\n", repeat));
+
+ i = (opcode << 3) | (sp->mode & 6);
+ idx0 = sp0256_df_idx[i++];
+ idx1 = sp0256_df_idx[i ];
+
+ assert(idx0 >= 0 && idx1 >= 0 && idx1 >= idx0);
+
+ /* ---------------------------------------------------------------- */
+ /* Step through control words in the description for data block. */
+ /* ---------------------------------------------------------------- */
+ for (i = idx0; i <= idx1; i++)
+ {
+ int len, shf, delta, field, prm, clra, clr5;
+ INT8 value;
+
+ /* ------------------------------------------------------------ */
+ /* Get the control word and pull out some important fields. */
+ /* ------------------------------------------------------------ */
+ cr = sp0256_datafmt[i];
+
+ len = CR_LEN(cr);
+ shf = CR_SHF(cr);
+ prm = CR_PRM(cr);
+ clra = cr & CR_CLRA;
+ clr5 = cr & CR_CLR5;
+ delta = cr & CR_DELTA;
+ field = cr & CR_FIELD;
+ value = 0;
+
+ LOG(("$%.4X.%.1X: len=%2d shf=%2d prm=%2d d=%d f=%d ",
+ sp->pc >> 3, sp->pc & 7, len, shf, prm, !!delta, !!field));
+ /* ------------------------------------------------------------ */
+ /* Clear any registers that were requested to be cleared. */
+ /* ------------------------------------------------------------ */
+ if (clra)
+ {
+ int j;
+
+ for (j = 0; j < 16; j++)
+ sp->filt.r[j] = 0;
+
+ sp->silent = 1;
+ }
+
+ if (clr5)
+ sp->filt.r[B5] = sp->filt.r[F5] = 0;
+
+ /* ------------------------------------------------------------ */
+ /* If this entry has a bitfield with it, grab the bitfield. */
+ /* ------------------------------------------------------------ */
+ if (len)
+ {
+ value = sp0256_getb(sp, len);
+ }
+ else
+ {
+ LOG((" (no update)\n"));
+ continue;
+ }
+
+ /* ------------------------------------------------------------ */
+ /* Sign extend if this is a delta update. */
+ /* ------------------------------------------------------------ */
+ if (delta) /* Sign extend */
+ {
+ if (value & (1 << (len - 1))) value |= -1 << len;
+ }
+
+ /* ------------------------------------------------------------ */
+ /* Shift the value to the appropriate precision. */
+ /* ------------------------------------------------------------ */
+ if (shf)
+ value <<= shf;
+
+ LOG(("v=%.2X (%c%.2X) ", value & 0xFF,
+ value & 0x80 ? '-' : '+',
+ 0xFF & (value & 0x80 ? -value : value)));
+
+ sp->silent = 0;
+
+ /* ------------------------------------------------------------ */
+ /* If this is a field-replace, insert the field. */
+ /* ------------------------------------------------------------ */
+ if (field)
+ {
+ LOG(("--field-> r[%2d] = %.2X -> ", prm, sp->filt.r[prm]));
+
+ sp->filt.r[prm] &= ~(~0 << shf); /* Clear the old bits. */
+ sp->filt.r[prm] |= value; /* Merge in the new bits. */
+
+ LOG(("%.2X\n", sp->filt.r[prm]));
+
+ continue;
+ }
+
+ /* ------------------------------------------------------------ */
+ /* If this is a delta update, add to the appropriate field. */
+ /* ------------------------------------------------------------ */
+ if (delta)
+ {
+ LOG(("--delta-> r[%2d] = %.2X -> ", prm, sp->filt.r[prm]));
+
+ sp->filt.r[prm] += value;
+
+ LOG(("%.2X\n", sp->filt.r[prm]));
+
+ continue;
+ }
+
+ /* ------------------------------------------------------------ */
+ /* Otherwise, just write the new value. */
+ /* ------------------------------------------------------------ */
+ sp->filt.r[prm] = value;
+ LOG(("--value-> r[%2d] = %.2X\n", prm, sp->filt.r[prm]));
+ }
+
+ /* ---------------------------------------------------------------- */
+ /* Special case: Set PAUSE's equivalent period. */
+ /* ---------------------------------------------------------------- */
+ if (opcode == 0xF)
+ {
+ sp->silent = 1;
+ sp->filt.r[1] = PER_PAUSE;
+ }
+
+ /* ---------------------------------------------------------------- */
+ /* Now that we've updated the registers, go decode them. */
+ /* ---------------------------------------------------------------- */
+ lpc12_regdec(&sp->filt);
+
+ /* ---------------------------------------------------------------- */
+ /* Break out since we now have a repeat count. */
+ /* ---------------------------------------------------------------- */
+ break;
+ }
}
static STREAM_UPDATE( sp0256_update )
@@ -1165,7 +1165,7 @@ static STREAM_UPDATE( sp0256_update )
else
{
did_samp += lpc12_update(&sp->filt, do_samp,
- sp->scratch, &sp->sc_head);
+ sp->scratch, &sp->sc_head);
}
sp->sc_head &= SCBUF_MASK;
@@ -1187,29 +1187,29 @@ static DEVICE_START( sp0256 )
sp->stream = device->machine().sound().stream_alloc(*device, 0, 1, device->clock() / CLOCK_DIVIDER, sp, sp0256_update);
- /* -------------------------------------------------------------------- */
- /* Configure our internal variables. */
- /* -------------------------------------------------------------------- */
- sp->filt.rng = 1;
-
- /* -------------------------------------------------------------------- */
- /* Allocate a scratch buffer for generating ~10kHz samples. */
- /* -------------------------------------------------------------------- */
- sp->scratch = auto_alloc_array(device->machine(), INT16, SCBUF_SIZE);
- sp->sc_head = sp->sc_tail = 0;
-
- /* -------------------------------------------------------------------- */
- /* Set up the microsequencer's initial state. */
- /* -------------------------------------------------------------------- */
- sp->halted = 1;
- sp->filt.rpt = -1;
- sp->lrq = 0x8000;
- sp->page = 0x1000 << 3;
- sp->silent = 1;
-
- /* -------------------------------------------------------------------- */
- /* Setup the ROM. */
- /* -------------------------------------------------------------------- */
+ /* -------------------------------------------------------------------- */
+ /* Configure our internal variables. */
+ /* -------------------------------------------------------------------- */
+ sp->filt.rng = 1;
+
+ /* -------------------------------------------------------------------- */
+ /* Allocate a scratch buffer for generating ~10kHz samples. */
+ /* -------------------------------------------------------------------- */
+ sp->scratch = auto_alloc_array(device->machine(), INT16, SCBUF_SIZE);
+ sp->sc_head = sp->sc_tail = 0;
+
+ /* -------------------------------------------------------------------- */
+ /* Set up the microsequencer's initial state. */
+ /* -------------------------------------------------------------------- */
+ sp->halted = 1;
+ sp->filt.rpt = -1;
+ sp->lrq = 0x8000;
+ sp->page = 0x1000 << 3;
+ sp->silent = 1;
+
+ /* -------------------------------------------------------------------- */
+ /* Setup the ROM. */
+ /* -------------------------------------------------------------------- */
sp->rom = *device->region();
// the rom is not supposed to be reversed first; according to Joe Zbiciak.
// see http://forums.bannister.org/ubbthreads.php?ubb=showflat&Number=72385#Post72385
@@ -1273,9 +1273,9 @@ WRITE8_DEVICE_HANDLER( sp0256_ALD_w )
READ_LINE_DEVICE_HANDLER( sp0256_lrq_r )
{
- sp0256_state *sp = get_safe_token(device);
+ sp0256_state *sp = get_safe_token(device);
- return sp->lrq == 0x8000;
+ return sp->lrq == 0x8000;
}
READ_LINE_DEVICE_HANDLER( sp0256_sby_r )
@@ -1289,26 +1289,26 @@ READ16_DEVICE_HANDLER( spb640_r )
{
sp0256_state *sp = get_safe_token(device);
- /* -------------------------------------------------------------------- */
- /* Offset 0 returns the SP0256 LRQ status on bit 15. */
- /* -------------------------------------------------------------------- */
- if (offset == 0)
- {
- return sp->lrq;
- }
-
- /* -------------------------------------------------------------------- */
- /* Offset 1 returns the SPB640 FIFO full status on bit 15. */
- /* -------------------------------------------------------------------- */
- if (offset == 1)
- {
- return (sp->fifo_head - sp->fifo_tail) >= 64 ? 0x8000 : 0;
- }
-
- /* -------------------------------------------------------------------- */
- /* Just return 255 for all other addresses in our range. */
- /* -------------------------------------------------------------------- */
- return 0x00FF;
+ /* -------------------------------------------------------------------- */
+ /* Offset 0 returns the SP0256 LRQ status on bit 15. */
+ /* -------------------------------------------------------------------- */
+ if (offset == 0)
+ {
+ return sp->lrq;
+ }
+
+ /* -------------------------------------------------------------------- */
+ /* Offset 1 returns the SPB640 FIFO full status on bit 15. */
+ /* -------------------------------------------------------------------- */
+ if (offset == 1)
+ {
+ return (sp->fifo_head - sp->fifo_tail) >= 64 ? 0x8000 : 0;
+ }
+
+ /* -------------------------------------------------------------------- */
+ /* Just return 255 for all other addresses in our range. */
+ /* -------------------------------------------------------------------- */
+ return 0x00FF;
}
WRITE16_DEVICE_HANDLER( spb640_w )
@@ -1358,17 +1358,17 @@ WRITE16_DEVICE_HANDLER( spb640_w )
void sp0256_set_clock(device_t *device, int clock)
{
- sp0256_state *sp = get_safe_token(device);
+ sp0256_state *sp = get_safe_token(device);
- device->set_unscaled_clock(clock);
- sp->stream->set_sample_rate(clock / CLOCK_DIVIDER);
+ device->set_unscaled_clock(clock);
+ sp->stream->set_sample_rate(clock / CLOCK_DIVIDER);
}
const device_type SP0256 = &device_creator<sp0256_device>;
sp0256_device::sp0256_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SP0256, "SP0256", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(sp0256_state);
}
@@ -1410,5 +1410,3 @@ void sp0256_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/sp0256.h b/src/emu/sound/sp0256.h
index d236c638da7..4ed3315a671 100644
--- a/src/emu/sound/sp0256.h
+++ b/src/emu/sound/sp0256.h
@@ -71,7 +71,7 @@ DECLARE_READ16_DEVICE_HANDLER( spb640_r );
DECLARE_WRITE16_DEVICE_HANDLER( spb640_w );
class sp0256_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
sp0256_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/speaker.c b/src/emu/sound/speaker.c
index 3f12872eab6..f3aec92c4ab 100644
--- a/src/emu/sound/speaker.c
+++ b/src/emu/sound/speaker.c
@@ -92,20 +92,20 @@ struct speaker_state
int level;
/* The volume of a composed sample grows incrementally each time the speaker is over-sampled.
- * That is in effect a basic average filter.
- * Another filter can and will be applied to the array of composed samples.
- */
- double composed_volume[FILTER_LENGTH]; /* integrator(s) */
- int composed_sample_index; /* array index for composed_volume */
- attoseconds_t channel_sample_period; /* in as */
- double channel_sample_period_secfrac; /* in fraction of second */
+ * That is in effect a basic average filter.
+ * Another filter can and will be applied to the array of composed samples.
+ */
+ double composed_volume[FILTER_LENGTH]; /* integrator(s) */
+ int composed_sample_index; /* array index for composed_volume */
+ attoseconds_t channel_sample_period; /* in as */
+ double channel_sample_period_secfrac; /* in fraction of second */
attotime channel_last_sample_time;
attotime channel_next_sample_time;
attoseconds_t interm_sample_period;
double interm_sample_period_secfrac;
attotime next_interm_sample_time;
- int interm_sample_index; /* counts interm. samples between stream samples */
- attotime last_update_time; /* internal timestamp */
+ int interm_sample_index; /* counts interm. samples between stream samples */
+ attotime last_update_time; /* internal timestamp */
};
@@ -168,30 +168,30 @@ static DEVICE_START( speaker )
sp->next_interm_sample_time = sp->channel_last_sample_time + attotime(0, sp->interm_sample_period);
sp->interm_sample_index = 0;
/* Note: To avoid time drift due to floating point inaccuracies,
- * it is good if the speaker time synchronizes itself with the stream timing regularly.
- */
+ * it is good if the speaker time synchronizes itself with the stream timing regularly.
+ */
/* Compute filter kernel; */
/* (Done for each device though the data is shared...
- * No problem really, but should be done as part of system init if I knew how)
- */
+ * No problem really, but should be done as part of system init if I knew how)
+ */
#if 1
/* This is an approximated sinc (a perfect sinc makes an ideal low-pass filter).
- * FILTER_STEP determines the cutoff frequency,
- * which should be below the Nyquist freq, i.e. half the sample rate.
- * Smaller step => kernel extends in time domain => lower cutoff freq
- * In this case, with sinc, filter step PI corresponds to the Nyq. freq.
- * Since we do not get a perfect filter => must lower the cutoff freq some more.
- * For example, step PI/(2*RATE_MULTIPLIER) corresponds to cutoff freq = sample rate / 4;
- * With -samplerate 48000, cutoff freq is ca 12kHz while the Nyq. freq is 24kHz.
- * With -samplerate 96000, cutoff freq is ca 24kHz while the Nyq. freq is 48kHz.
- * For a steeper, more efficient filter, increase FILTER_LENGTH at the expense of CPU usage.
- */
+ * FILTER_STEP determines the cutoff frequency,
+ * which should be below the Nyquist freq, i.e. half the sample rate.
+ * Smaller step => kernel extends in time domain => lower cutoff freq
+ * In this case, with sinc, filter step PI corresponds to the Nyq. freq.
+ * Since we do not get a perfect filter => must lower the cutoff freq some more.
+ * For example, step PI/(2*RATE_MULTIPLIER) corresponds to cutoff freq = sample rate / 4;
+ * With -samplerate 48000, cutoff freq is ca 12kHz while the Nyq. freq is 24kHz.
+ * With -samplerate 96000, cutoff freq is ca 24kHz while the Nyq. freq is 48kHz.
+ * For a steeper, more efficient filter, increase FILTER_LENGTH at the expense of CPU usage.
+ */
#define FILTER_STEP (M_PI / 2 / RATE_MULTIPLIER)
/* Distribute symmetrically on x axis; center has x=0 if length is odd */
- for (i = 0, x = (0.5 - FILTER_LENGTH / 2.) * FILTER_STEP;
- i < FILTER_LENGTH;
- i++, x += FILTER_STEP)
+ for (i = 0, x = (0.5 - FILTER_LENGTH / 2.) * FILTER_STEP;
+ i < FILTER_LENGTH;
+ i++, x += FILTER_STEP)
{
if (x == 0)
ampl[i] = 1;
@@ -200,9 +200,9 @@ static DEVICE_START( speaker )
}
#else
/* Trivial average filter with poor frequency cutoff properties;
- * First zero (frequency where amplification=0) = sample rate / filter length
- * Cutoff frequency approx <= first zero / 2
- */
+ * First zero (frequency where amplification=0) = sample rate / filter length
+ * Cutoff frequency approx <= first zero / 2
+ */
for (i = 0, i < FILTER_LENGTH; i++)
ampl[i] = 1;
#endif
@@ -228,9 +228,9 @@ static STREAM_UPDATE( speaker_sound_update )
sampled_time *= samples;
/* Note: since the stream is in the process of being updated,
- * stream->sample_time() will return the time before the update! (MAME 0.130)
- * Avoid using it here in order to avoid a subtle dependence on the stream implementation.
- */
+ * stream->sample_time() will return the time before the update! (MAME 0.130)
+ * Avoid using it here in order to avoid a subtle dependence on the stream implementation.
+ */
}
if (samples-- > 0)
@@ -286,16 +286,16 @@ void speaker_level_w(device_t *device, int new_level)
return;
}
/* Reaching here means such time has passed since last stream update
- * that we can add at least one complete sample to the stream.
- * The details have to be handled by speaker_sound_update()
- */
+ * that we can add at least one complete sample to the stream.
+ * The details have to be handled by speaker_sound_update()
+ */
/* Force streams.c to update sound until this point in time now */
sp->channel->update();
/* This is redundant because time update has to be done within speaker_sound_update() anyway,
- * however this ensures synchronization between the speaker and stream timing:
- */
+ * however this ensures synchronization between the speaker and stream timing:
+ */
sp->channel_last_sample_time = sp->channel->sample_time();
sp->channel_next_sample_time = sp->channel_last_sample_time + attotime(0, sp->channel_sample_period);
sp->next_interm_sample_time = sp->channel_last_sample_time + attotime(0, sp->interm_sample_period);
@@ -325,9 +325,9 @@ static void update_interm_samples(speaker_state *sp, attotime time, int volume)
init_next_interm_sample(sp);
}
/* Depending on status above:
- * a) Add latest fraction to unfinished composed sample
- * b) The overshooting fraction of time will start a new composed sample
- */
+ * a) Add latest fraction to unfinished composed sample
+ * b) The overshooting fraction of time will start a new composed sample
+ */
fraction = make_fraction(time, sp->last_update_time, sp->interm_sample_period_secfrac);
sp->composed_volume[sp->composed_sample_index] += volume * fraction;
sp->last_update_time = time;
@@ -367,8 +367,8 @@ static void finalize_interm_sample(speaker_state *sp, int volume)
/* Fill the composed sample up if it was incomplete */
fraction = make_fraction(sp->next_interm_sample_time,
- sp->last_update_time,
- sp->interm_sample_period_secfrac);
+ sp->last_update_time,
+ sp->interm_sample_period_secfrac);
sp->composed_volume[sp->composed_sample_index] += volume * fraction;
/* Update time state */
sp->last_update_time = sp->next_interm_sample_time;
@@ -421,7 +421,7 @@ const device_type SPEAKER_SOUND = &device_creator<speaker_sound_device>;
speaker_sound_device::speaker_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SPEAKER_SOUND, "Speaker", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(speaker_state);
}
@@ -454,5 +454,3 @@ void speaker_sound_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/speaker.h b/src/emu/sound/speaker.h
index d73c7211e72..791ebc1fc17 100644
--- a/src/emu/sound/speaker.h
+++ b/src/emu/sound/speaker.h
@@ -13,18 +13,18 @@
#include "devlegcy.h"
-#define SPEAKER_TAG "speaker"
+#define SPEAKER_TAG "speaker"
struct speaker_interface
{
- int num_level; /* optional: number of levels (if not two) */
- const INT16 *levels; /* optional: pointer to level lookup table */
+ int num_level; /* optional: number of levels (if not two) */
+ const INT16 *levels; /* optional: pointer to level lookup table */
};
void speaker_level_w (device_t *device, int new_level);
class speaker_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
speaker_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/spu.c b/src/emu/sound/spu.c
index b7248a5f03d..dca55ab6750 100644
--- a/src/emu/sound/spu.c
+++ b/src/emu/sound/spu.c
@@ -164,14 +164,14 @@ static const int filter_coef[5][2]=
//
#ifdef debug_spu_registers
- #define _voice_registers(_voice) \
- "voice"#_voice".voll", \
- "voice"#_voice".volr", \
- "voice"#_voice".pitch", \
- "voice"#_voice".addr", \
- "voice"#_voice".adsl", \
- "voice"#_voice".srrr", \
- "voice"#_voice".curvol", \
+ #define _voice_registers(_voice) \
+ "voice"#_voice".voll", \
+ "voice"#_voice".volr", \
+ "voice"#_voice".pitch", \
+ "voice"#_voice".addr", \
+ "voice"#_voice".adsl", \
+ "voice"#_voice".srrr", \
+ "voice"#_voice".curvol", \
"voice"#_voice".repaddr"
#define _voice_mask_register(_name) \
@@ -284,22 +284,22 @@ struct spu_device::sample_cache
{
public:
unsigned int start,
- end,
- invalid_start,
- invalid_end,
- loopaddr,
- last_update_end;
+ end,
+ invalid_start,
+ invalid_end,
+ loopaddr,
+ last_update_end;
signed short *data,*loop,*dend;
adpcm_decoder decoder, update_decoder;
mutable int ref_count;
bool valid,
- is_loop;
+ is_loop;
sample_loop_cache *loop_cache;
static unsigned int cache_size;
sample_cache()
- : invalid_start(0xffffffff),
+ : invalid_start(0xffffffff),
invalid_end(0),
last_update_end(0xffffffff),
data(NULL),
@@ -345,13 +345,13 @@ struct spu_device::sample_loop_cache
{
public:
unsigned int loopend,
- loopstart,
- len;
+ loopstart,
+ len;
signed short data[num_loop_cache_samples];
sample_loop_cache *next;
sample_loop_cache()
- : next(NULL)
+ : next(NULL)
{
sample_cache::cache_size+=num_loop_cache_samples<<1;
}
@@ -429,7 +429,7 @@ struct spu_device::voiceinfo
cache_pointer play,loop;
sample_loop_cache *loop_cache;
unsigned int dptr,
- lcptr;
+ lcptr;
int env_state;
float env_ar,
@@ -447,13 +447,13 @@ struct spu_device::voiceinfo
//<<
unsigned int pitch,
- samplestoend,
- samplestoirq,
- envsamples;
+ samplestoend,
+ samplestoirq,
+ envsamples;
bool hitirq,
- inloopcache,
- forceloop,
- _pad;
+ inloopcache,
+ forceloop,
+ _pad;
INT64 keyontime;
};
@@ -467,25 +467,25 @@ class stream_buffer
{
public:
unsigned int sector,
- offset;
+ offset;
stream_marker *next,
*prev;
};
unsigned char *buffer;
unsigned int head,
- tail,
- in,
- sector_size,
- num_sectors,
- buffer_size;
+ tail,
+ in,
+ sector_size,
+ num_sectors,
+ buffer_size;
stream_marker *marker_head,
*marker_tail;
public:
stream_buffer(const unsigned int _sector_size,
const unsigned int _num_sectors)
- : head(0),
+ : head(0),
tail(0),
in(0),
sector_size(_sector_size),
@@ -866,7 +866,7 @@ bool spu_device::cache_pointer::update(spu_device *spu)
// old cache block
unsigned int off=ptr-cache->data,
- addr=cache->start;
+ addr=cache->start;
// Release cache block and get updated one
@@ -935,14 +935,14 @@ signed short *adpcm_decoder::decode_packet(adpcm_packet *ap, signed short *dp)
static int shift_register15(int &shift)
{
- int bit0, bit1, bit14;
+ int bit0, bit1, bit14;
- bit0 = shift & 1;
- bit1 = (shift & 2) >> 1;
- bit14 = (bit0 ^ bit1) ^ 1;
- shift >>= 1;
- shift |= (bit14 << 14);
- return bit0;
+ bit0 = shift & 1;
+ bit1 = (shift & 2) >> 1;
+ bit14 = (bit0 ^ bit1) ^ 1;
+ shift >>= 1;
+ shift |= (bit14 << 14);
+ return bit0;
}
//
@@ -1482,7 +1482,7 @@ unsigned int spu_device::get_irq_distance(const voiceinfo *vi)
// IRQ address is inside this voices loop cache, return distance
return (vi->play.cache->dend-vi->play.ptr)+
- (irq_ptr-vi->loop.ptr);
+ (irq_ptr-vi->loop.ptr);
}
}
@@ -1508,7 +1508,7 @@ void spu_device::update_voice_events(voiceinfo *vi)
assert(vi->lcptr<vi->loop_cache->len);
vi->samplestoend=min(vi->samplestoend,
- (unsigned int)((((INT64)(vi->loop_cache->len-vi->lcptr)<<12)-vi->dptr)+(vi->pitch-1))/vi->pitch);
+ (unsigned int)((((INT64)(vi->loop_cache->len-vi->lcptr)<<12)-vi->dptr)+(vi->pitch-1))/vi->pitch);
}
// Calculate time until next IRQ in output samples
@@ -1700,10 +1700,10 @@ bool spu_device::process_voice(const unsigned int v,
{
bool ret=true;
unsigned int voice_mask=1<<v,
- num=sz,
- off=0;
+ num=sz,
+ off=0;
bool noise=((spureg.noise&voice_mask)!=0),
- fm=((spureg.fm&voice_mask)!=0);
+ fm=((spureg.fm&voice_mask)!=0);
voiceinfo *vi=&voice[v];
// Early exit if we don't have a sample cache block
@@ -1721,8 +1721,8 @@ bool spu_device::process_voice(const unsigned int v,
// Play up to end of sample, envelope event, or IRQ, whichever comes first
unsigned int ntoplay=fm?1:num,
- nextevent=min(vi->samplestoend,
- min(vi->samplestoirq,vi->envsamples));
+ nextevent=min(vi->samplestoend,
+ min(vi->samplestoirq,vi->envsamples));
ntoplay=min(ntoplay,nextevent);
if (ntoplay)
@@ -1743,7 +1743,7 @@ bool spu_device::process_voice(const unsigned int v,
}
signed short *dp=(signed short *)ptr,
- *outxp=(signed short *)outxptr;
+ *outxp=(signed short *)outxptr;
dp+=off<<1;
if (outxp) outxp+=off<<1;
@@ -1762,8 +1762,8 @@ bool spu_device::process_voice(const unsigned int v,
bool hitend=fm?(vi->play.ptr>=vi->play.cache->dend)
:(vi->samplestoend==0),
- hitirq=(vi->samplestoirq==0),
- hitenv=(vi->envsamples==0);
+ hitirq=(vi->samplestoirq==0),
+ hitenv=(vi->envsamples==0);
// Update loop cache pointer if we are playing a loop cache
@@ -1898,10 +1898,10 @@ bool spu_device::process_voice(const unsigned int v,
//
void spu_device::generate_voice(const unsigned int v,
- void *ptr,
- void *noiseptr,
- void *outxptr,
- const unsigned int sz)
+ void *ptr,
+ void *noiseptr,
+ void *outxptr,
+ const unsigned int sz)
{
voiceinfo *vi=&voice[v];
signed short *fp,*sp;
@@ -1927,9 +1927,9 @@ void spu_device::generate_voice(const unsigned int v,
// Calculate fixed point envelope levels/deltas premultiplied by channel volume
- int vol_l=outxptr?0x3fff:vi->vol[0],
+ int vol_l=outxptr?0x3fff:vi->vol[0],
vol_r=outxptr?0x3fff:vi->vol[1],
- env_l=(int)(vi->env_level*2.0f*vol_l),
+ env_l=(int)(vi->env_level*2.0f*vol_l),
env_r=(int)(vi->env_level*2.0f*vol_r),
envdelta_l=(int)(vi->env_delta*2.0f*vol_l),
envdelta_r=(int)(vi->env_delta*2.0f*vol_r);
@@ -2262,7 +2262,7 @@ bool spu_device::update_envelope(const int v)
case 4: // release
voice[v].env_level=mindb(1.0f,maxdb(0.0f,voice[v].env_level));
voice[v].env_delta=voice[v].env_rr;
- if (voice[v].env_rr == -0.0f) // 0.0 release means infinite time
+ if (voice[v].env_rr == -0.0f) // 0.0 release means infinite time
{
voice[v].envsamples=spu_infinity;
}
@@ -2406,9 +2406,9 @@ void spu_device::generate_xa(void *ptr, const unsigned int sz)
int n=sz>>2;
signed short *sp=(signed short *)xa_buffer->get_tail_ptr(),
- *dp=(signed short *)ptr;
+ *dp=(signed short *)ptr;
unsigned int noff=(1<<xa_channels),
- oldtail=xa_buffer->get_tail_offset();
+ oldtail=xa_buffer->get_tail_offset();
assert((xa_channels==1) || (xa_channels==2));
@@ -2433,7 +2433,7 @@ void spu_device::generate_xa(void *ptr, const unsigned int sz)
if (1) //settings.sound_interpolate)
{
signed short *nsp=(signed short *)xa_buffer->get_tail_ptr(noff);
- int vdl=nsp[0]-vl,
+ int vdl=nsp[0]-vl,
vdr=nsp[xa_channels-1]-vr;
vl+=(vdl*(int)xa_cnt)>>12;
@@ -2499,7 +2499,7 @@ void spu_device::generate_cdda(void *ptr, const unsigned int sz)
if (cdda_buffer->get_bytes_in())
{
unsigned int cdda_spf=(44100*4)/60.0,
- freq=(unsigned int)((cdda_freq*60.0)/60.0);
+ freq=(unsigned int)((cdda_freq*60.0)/60.0);
if ((! cdda_playing) && (cdda_buffer->get_bytes_in()<(cdda_spf<<3)))
return;
@@ -2508,7 +2508,7 @@ void spu_device::generate_cdda(void *ptr, const unsigned int sz)
int n=sz>>2;
signed short *sp=(signed short *)cdda_buffer->get_tail_ptr(),
- *dp=(signed short *)ptr;
+ *dp=(signed short *)ptr;
unsigned int oldtail=cdda_buffer->get_tail_offset();
int voll=spureg.cdvol_l,
@@ -2614,11 +2614,11 @@ void spu_device::generate(void *ptr, const unsigned int sz)
memcpy(dp,output_buf[0]+output_head,n);
rev->process((signed short *)dp,
- (signed short *)(output_buf[1]+output_head),
- spu_reverb_cfg,
- (signed short)spureg.rvol_l,
- (signed short)spureg.rvol_r,
- n);
+ (signed short *)(output_buf[1]+output_head),
+ spu_reverb_cfg,
+ (signed short)spureg.rvol_l,
+ (signed short)spureg.rvol_r,
+ n);
output_size-=n;
output_head+=n;
@@ -2744,9 +2744,9 @@ void spu_device::process_until(const unsigned int tsample)
{
unsigned int tleft=process_samples;
bool isfmin=((i<23) && (spureg.fm&(1<<(i+1)))),
- isfm=(spureg.fm&(1<<i))!=0,
- isnoise=(spureg.noise&(1<<i))!=0,
- isreverb=(spureg.reverb&(1<<i))!=0;
+ isfm=(spureg.fm&(1<<i))!=0,
+ isnoise=(spureg.noise&(1<<i))!=0,
+ isreverb=(spureg.reverb&(1<<i))!=0;
// This channel is an FM input for the next channel - clear the
// FM input buffer
@@ -2762,7 +2762,7 @@ void spu_device::process_until(const unsigned int tsample)
process_samples,
isreverb?reverbptr:outptr,
isnoise?noiseptr
- :(isfm?fmptr:NULL),
+ :(isfm?fmptr:NULL),
isfmin?fmptr:NULL,
&tleft))
{
@@ -2805,7 +2805,7 @@ void spu_device::sound_stream_update(sound_stream &stream, stream_sample_t **inp
outL = outputs[0];
outR = outputs[1];
- generate(temp, samples*4); // second parameter is bytes, * 2 (size of INT16) * 2 (stereo)
+ generate(temp, samples*4); // second parameter is bytes, * 2 (size of INT16) * 2 (stereo)
src = &temp[0];
for (int i = 0; i < samples; i++)
@@ -2848,7 +2848,7 @@ void spu_device::start_dma(UINT8 *mainram, bool to_spu, UINT32 size)
//
void spu_device::decode_xa_mono(const unsigned char *xa,
- unsigned char *ptr)
+ unsigned char *ptr)
{
signed short *dp=(signed short *)ptr;
@@ -2903,7 +2903,7 @@ void spu_device::decode_xa_mono(const unsigned char *xa,
//
void spu_device::decode_xa_stereo(const unsigned char *xa,
- unsigned char *ptr)
+ unsigned char *ptr)
{
signed short *dp=(signed short *)ptr;
@@ -2984,11 +2984,11 @@ bool spu_device::play_xa(const unsigned int sector, const unsigned char *xa)
float freq;
int channels;
- switch (hdr[3]&0x3f) // ignore emphasis and reserved bits
+ switch (hdr[3]&0x3f) // ignore emphasis and reserved bits
{
case 0:
channels=1;
- freq=37800.0f; //18900.0f;
+ freq=37800.0f; //18900.0f;
break;
case 1:
@@ -2998,12 +2998,12 @@ bool spu_device::play_xa(const unsigned int sector, const unsigned char *xa)
case 4:
channels=1;
- freq=18900.0f; ///2.0f;
+ freq=18900.0f; ///2.0f;
break;
case 5:
channels=2;
- freq=18900.0f; //37800.0f/2.0f;
+ freq=18900.0f; //37800.0f/2.0f;
break;
default:
diff --git a/src/emu/sound/spu.h b/src/emu/sound/spu.h
index f5bb127308e..900eb1144db 100644
--- a/src/emu/sound/spu.h
+++ b/src/emu/sound/spu.h
@@ -57,18 +57,18 @@ protected:
stream_buffer *xa_buffer, *cdda_buffer;
unsigned int xa_cnt,cdda_cnt,
- xa_freq,cdda_freq,
- xa_channels,
- xa_spf,
- xa_out_ptr,
- cur_frame_sample,
- cur_generate_sample,
- dirty_flags;
+ xa_freq,cdda_freq,
+ xa_channels,
+ xa_spf,
+ xa_out_ptr,
+ cur_frame_sample,
+ cur_generate_sample,
+ dirty_flags;
signed short xa_last[4];
bool status_enabled,
- xa_playing,
- cdda_playing;
+ xa_playing,
+ cdda_playing;
int xa_voll,xa_volr,
changed_xa_vol;
voiceinfo *voice;
@@ -80,9 +80,9 @@ protected:
unsigned char *output_buf[4];
unsigned int output_head,
- output_tail,
- output_size,
- cur_qsz;
+ output_tail,
+ output_size,
+ cur_qsz;
unsigned int noise_t;
signed short noise_cur;
@@ -92,14 +92,14 @@ protected:
struct voicereg
{
- unsigned short vol_l, // 0
- vol_r, // 2
- pitch, // 4
- addr, // 6
- adsl, // 8
- srrr, // a
- curvol, // c
- repaddr; // e
+ unsigned short vol_l, // 0
+ vol_r, // 2
+ pitch, // 4
+ addr, // 6
+ adsl, // 8
+ srrr, // a
+ curvol, // c
+ repaddr; // e
};
union
@@ -109,22 +109,22 @@ protected:
{
voicereg voice[24];
unsigned short mvol_l,mvol_r,
- rvol_l,rvol_r;
+ rvol_l,rvol_r;
unsigned int keyon,
- keyoff,
- fm,
- noise,
- reverb,
- chon;
+ keyoff,
+ fm,
+ noise,
+ reverb,
+ chon;
unsigned short _unknown,
- reverb_addr,
- irq_addr,
- trans_addr,
- data,
- ctrl;
+ reverb_addr,
+ irq_addr,
+ trans_addr,
+ data,
+ ctrl;
unsigned int status;
signed short cdvol_l,cdvol_r,
- exvol_l,exvol_r;
+ exvol_l,exvol_r;
} spureg;
};
@@ -153,11 +153,11 @@ protected:
const unsigned int sz);
void generate_noise(void *ptr, const unsigned int num);
bool process_voice(const unsigned int v,
- const unsigned int sz,
- void *ptr,
- void *fmnoise_ptr,
- void *outxptr,
- unsigned int *tleft);
+ const unsigned int sz,
+ void *ptr,
+ void *fmnoise_ptr,
+ void *outxptr,
+ unsigned int *tleft);
void process();
void process_until(const unsigned int tsample);
void update_voice_loop(const unsigned int v);
@@ -177,8 +177,8 @@ protected:
bool translate_sample_addr(const unsigned int addr, cache_pointer *cp);
sample_cache *get_sample_cache(const unsigned int addr);
void flush_cache(sample_cache *sc,
- const unsigned int istart,
- const unsigned int iend);
+ const unsigned int istart,
+ const unsigned int iend);
void invalidate_cache(const unsigned int st, const unsigned int en);
void set_xa_format(const float freq, const int channels);
@@ -191,13 +191,13 @@ protected:
void flush_output_buffer();
sample_loop_cache *get_loop_cache(sample_cache *cache,
- const unsigned int lpen,
+ const unsigned int lpen,
sample_cache *lpcache,
- const unsigned int lpst);
+ const unsigned int lpst);
#if 0
void write_cache_pointer(outfile *fout,
- cache_pointer *cp,
- sample_loop_cache *lc=NULL);
+ cache_pointer *cp,
+ sample_loop_cache *lc=NULL);
void read_cache_pointer(infile *fin,
cache_pointer *cp,
sample_loop_cache **lc=NULL);
diff --git a/src/emu/sound/spu_tables.c b/src/emu/sound/spu_tables.c
index 5e1ed9a8ee1..e541d20365b 100644
--- a/src/emu/sound/spu_tables.c
+++ b/src/emu/sound/spu_tables.c
@@ -459,7 +459,7 @@ spu_device::reverb_preset spu_device::reverb_presets[]=
-0.3112f,
0.7832f,
- { { 20.7f, 31.3f,40.1711f,51.6803f },
+ { { 20.7f, 31.3f,40.1711f,51.6803f },
{ 21.7025f,30.2f,42.6655f,48.6691f } },
0.8f,
@@ -566,7 +566,7 @@ spu_device::reverb_preset spu_device::reverb_presets[]=
{
{ 36.7138f, 134.6171f, 24.4758f, 194.0596f },
- { 54.1932f, 90.9070f, 29.7174f, 200.0000f },
+ { 54.1932f, 90.9070f, 29.7174f, 200.0000f },
},
0.9301f,
@@ -610,7 +610,7 @@ spu_device::reverb_preset spu_device::reverb_presets[]=
{
{ 36.7138f, 134.6171f, 24.4758f, 194.0596f },
- { 54.1932f, 90.9070f, 29.7174f, 200.0000f },
+ { 54.1932f, 90.9070f, 29.7174f, 200.0000f },
},
0.7301f,
diff --git a/src/emu/sound/spureverb.c b/src/emu/sound/spureverb.c
index e4d4a9f79c2..c5107c010fb 100644
--- a/src/emu/sound/spureverb.c
+++ b/src/emu/sound/spureverb.c
@@ -92,13 +92,13 @@ void reverb::bandpass(signed short *sp,
}
void reverb::comb_allpass1(signed short *sp,
- signed short *dp,
- const comb_param &comb_delay,
- const int comb_gain,
- const int allpass_delay,
- const int allpass_gain,
- const int *rvol,
- const unsigned int sz)
+ signed short *dp,
+ const comb_param &comb_delay,
+ const int comb_gain,
+ const int allpass_delay,
+ const int allpass_gain,
+ const int *rvol,
+ const unsigned int sz)
{
for (unsigned int i=0; i<(sz>>2); i++, sp+=2, dp+=2)
{
@@ -142,16 +142,16 @@ void reverb::comb_allpass1(signed short *sp,
//
void reverb::comb_allpass4(signed short *sp,
- signed short *dp,
- const comb_param &comb_delay,
- const int comb_gain,
- const int allpass_delay,
- const int allpass_gain,
- const int *rvol,
- const unsigned int sz)
+ signed short *dp,
+ const comb_param &comb_delay,
+ const int comb_gain,
+ const int allpass_delay,
+ const int allpass_gain,
+ const int *rvol,
+ const unsigned int sz)
{
#ifdef use_intrinsics
- __m64 cg=_mm_set1_pi16(comb_gain),
+ __m64 cg=_mm_set1_pi16(comb_gain),
ag=_mm_set1_pi16(allpass_gain),
rv[2];
rv[0]=_mm_set1_pi16(rvol[0]);
@@ -237,7 +237,7 @@ void reverb::comb_allpass(signed short *sp,
{
unsigned int sz=_sz;
comb_param comb_delay;
- int comb_gain=(int)(rp->comb_gain*32767),
+ int comb_gain=(int)(rp->comb_gain*32767),
allpass_delay=(int)(((rp->allpass_delay/1000.0f)*sound_hz))&~3,
allpass_gain=(int)(rp->allpass_gain*32767),
rvol[2]={ (signed short)wetvol_l,
@@ -306,14 +306,14 @@ void reverb::comb_allpass(signed short *sp,
//
void reverb::process(signed short *output,
- signed short *reverb_input,
- const reverb_params *rp,
- const int wetvol_l,
- const int wetvol_r,
- const unsigned int sz)
+ signed short *reverb_input,
+ const reverb_params *rp,
+ const int wetvol_l,
+ const int wetvol_r,
+ const unsigned int sz)
{
signed short *sp=(signed short *)reverb_input,
- *dp=(signed short *)output;
+ *dp=(signed short *)output;
if (rp->band_gain>0.0f)
{
diff --git a/src/emu/sound/spureverb.h b/src/emu/sound/spureverb.h
index 8e94a318a24..3bd814c07c4 100644
--- a/src/emu/sound/spureverb.h
+++ b/src/emu/sound/spureverb.h
@@ -16,10 +16,10 @@
class reverb
{
signed short *y[2][4],
- *x[2],
- *ax[2],
- *ay[2],
- bx1[2][2],by1[2];
+ *x[2],
+ *ax[2],
+ *ay[2],
+ bx1[2][2],by1[2];
int yp,
max_delay,
sound_hz;
@@ -34,21 +34,21 @@
const int wetvol_r,
const unsigned int _sz);
void comb_allpass4(signed short *sp,
- signed short *dp,
- const comb_param &comb_delay,
- const int comb_gain,
- const int allpass_delay,
- const int allpass_gain,
- const int *rvol,
- const unsigned int sz);
+ signed short *dp,
+ const comb_param &comb_delay,
+ const int comb_gain,
+ const int allpass_delay,
+ const int allpass_gain,
+ const int *rvol,
+ const unsigned int sz);
void comb_allpass1(signed short *sp,
- signed short *dp,
- const comb_param &comb_delay,
- const int comb_gain,
- const int allpass_delay,
- const int allpass_gain,
- const int *rvol,
- const unsigned int sz);
+ signed short *dp,
+ const comb_param &comb_delay,
+ const int comb_gain,
+ const int allpass_delay,
+ const int allpass_gain,
+ const int *rvol,
+ const unsigned int sz);
void bandpass(signed short *sp,
const reverb_params *rp,
const unsigned int sz);
@@ -58,11 +58,11 @@
~reverb();
void process(signed short *output,
- signed short *reverb_input,
- const reverb_params *rp,
- const int wetvol_l,
- const int wetvol_r,
- const unsigned int sz);
+ signed short *reverb_input,
+ const reverb_params *rp,
+ const int wetvol_l,
+ const int wetvol_r,
+ const unsigned int sz);
void reset();
};
diff --git a/src/emu/sound/st0016.c b/src/emu/sound/st0016.c
index 97dd9c47b81..986654aa7e0 100644
--- a/src/emu/sound/st0016.c
+++ b/src/emu/sound/st0016.c
@@ -110,7 +110,7 @@ static STREAM_UPDATE( st0016_update )
// not looped yet, check sample end
if ((info->vpos[v] + sptr) >= eptr)
{
- if (slot[0x16] & 0x01) // loop?
+ if (slot[0x16] & 0x01) // loop?
{
info->vpos[v] = (lsptr - sptr);
info->lponce[v] = 1;
@@ -148,7 +148,7 @@ const device_type ST0016 = &device_creator<st0016_device>;
st0016_device::st0016_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ST0016, "ST0016", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(st0016_device_state);
}
@@ -181,5 +181,3 @@ void st0016_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/st0016.h b/src/emu/sound/st0016.h
index 6bd1ad9fdd9..f3ec01b1829 100644
--- a/src/emu/sound/st0016.h
+++ b/src/emu/sound/st0016.h
@@ -14,7 +14,7 @@ DECLARE_READ8_DEVICE_HANDLER( st0016_snd_r );
DECLARE_WRITE8_DEVICE_HANDLER( st0016_snd_w );
class st0016_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
st0016_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/t6w28.c b/src/emu/sound/t6w28.c
index 9f5d52cdc21..b0ace77119f 100644
--- a/src/emu/sound/t6w28.c
+++ b/src/emu/sound/t6w28.c
@@ -54,16 +54,16 @@ WRITE8_MEMBER( t6w28_device::write )
m_register[offset * 8 + r] = (m_register[offset * 8 + r] & 0x3f0) | (data & 0x0f);
}
else
- {
+ {
r = m_last_register[offset];
}
c = r/2;
switch (r)
{
- case 0: /* tone 0 : frequency */
- case 2: /* tone 1 : frequency */
- case 4: /* tone 2 : frequency */
- if ((data & 0x80) == 0) m_register[offset * 8 + r] = (m_register[offset * 8 + r] & 0x0f) | ((data & 0x3f) << 4);
+ case 0: /* tone 0 : frequency */
+ case 2: /* tone 1 : frequency */
+ case 4: /* tone 2 : frequency */
+ if ((data & 0x80) == 0) m_register[offset * 8 + r] = (m_register[offset * 8 + r] & 0x0f) | ((data & 0x3f) << 4);
m_period[offset * 4 + c] = STEP * m_register[offset * 8 + r];
if (m_period[offset * 4 + c] == 0) m_period[offset * 4 + c] = STEP;
if (r == 4)
@@ -73,21 +73,21 @@ WRITE8_MEMBER( t6w28_device::write )
m_period[offset * 4 + 3] = 2 * m_period[offset * 4 + 2];
}
break;
- case 1: /* tone 0 : volume */
- case 3: /* tone 1 : volume */
- case 5: /* tone 2 : volume */
- case 7: /* noise : volume */
+ case 1: /* tone 0 : volume */
+ case 3: /* tone 1 : volume */
+ case 5: /* tone 2 : volume */
+ case 7: /* noise : volume */
m_volume[offset * 4 + c] = m_vol_table[data & 0x0f];
if ((data & 0x80) == 0) m_register[offset * 8 + r] = (m_register[offset * 8 + r] & 0x3f0) | (data & 0x0f);
break;
- case 6: /* noise : frequency, mode */
+ case 6: /* noise : frequency, mode */
{
- if ((data & 0x80) == 0) m_register[offset * 8 + r] = (m_register[offset * 8 + r] & 0x3f0) | (data & 0x0f);
+ if ((data & 0x80) == 0) m_register[offset * 8 + r] = (m_register[offset * 8 + r] & 0x3f0) | (data & 0x0f);
n = m_register[offset * 8 + 6];
m_noise_mode[offset] = (n & 4) ? 1 : 0;
/* N/512,N/1024,N/2048,Tone #3 output */
m_period[offset * 4 + 3] = ((n&3) == 3) ? 2 * m_period[offset * 4 + 2] : (STEP << (5+(n&3)));
- /* Reset noise shifter */
+ /* Reset noise shifter */
m_rng[offset] = m_feedback_mask; /* this is correct according to the smspower document */
//m_rng = 0xF35; /* this is not, but sounds better in do run run */
m_output[offset * 4 + 3] = m_rng[offset] & 1;
@@ -199,29 +199,29 @@ void t6w28_device::sound_stream_update(sound_stream &stream, stream_sample_t **i
m_count[3] -= nextevent;
if (m_count[3] <= 0)
{
- if (m_noise_mode[0] == 1) /* White Noise Mode */
- {
- if (((m_rng[0] & m_whitenoise_taps) != m_whitenoise_taps) && ((m_rng[0] & m_whitenoise_taps) != 0)) /* crappy xor! */
+ if (m_noise_mode[0] == 1) /* White Noise Mode */
+ {
+ if (((m_rng[0] & m_whitenoise_taps) != m_whitenoise_taps) && ((m_rng[0] & m_whitenoise_taps) != 0)) /* crappy xor! */
{
- m_rng[0] >>= 1;
- m_rng[0] |= m_feedback_mask;
+ m_rng[0] >>= 1;
+ m_rng[0] |= m_feedback_mask;
}
else
{
- m_rng[0] >>= 1;
+ m_rng[0] >>= 1;
}
m_output[3] = m_whitenoise_invert ? !(m_rng[0] & 1) : m_rng[0] & 1;
}
else /* Periodic noise mode */
{
- if (m_rng[0] & 1)
+ if (m_rng[0] & 1)
{
- m_rng[0] >>= 1;
- m_rng[0] |= m_feedback_mask;
+ m_rng[0] >>= 1;
+ m_rng[0] |= m_feedback_mask;
}
else
{
- m_rng[0] >>= 1;
+ m_rng[0] >>= 1;
}
m_output[3] = m_rng[0] & 1;
}
@@ -269,7 +269,7 @@ void t6w28_device::set_gain(int gain)
/* increase max output basing on gain (0.2 dB per step) */
out = MAX_OUTPUT / 3;
while (gain-- > 0)
- out *= 1.023292992; /* = (10 ^ (0.2/20)) */
+ out *= 1.023292992; /* = (10 ^ (0.2/20)) */
/* build volume table (2dB per step) */
for (i = 0;i < 15;i++)
@@ -278,7 +278,7 @@ void t6w28_device::set_gain(int gain)
if (out > MAX_OUTPUT / 3) m_vol_table[i] = MAX_OUTPUT / 3;
else m_vol_table[i] = out;
- out /= 1.258925412; /* = 10 ^ (2/20) = 2dB */
+ out /= 1.258925412; /* = 10 ^ (2/20) = 2dB */
}
m_vol_table[15] = 0;
}
@@ -303,7 +303,7 @@ void t6w28_device::device_start()
for (i = 0;i < 8;i+=2)
{
m_register[i] = 0;
- m_register[i + 1] = 0x0f; /* volume = 0 */
+ m_register[i + 1] = 0x0f; /* volume = 0 */
}
for (i = 0;i < 8;i++)
@@ -349,7 +349,6 @@ const device_type T6W28 = &device_creator<t6w28_device>;
t6w28_device::t6w28_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, T6W28, "T6W28", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
-
diff --git a/src/emu/sound/t6w28.h b/src/emu/sound/t6w28.h
index 10d99148bf3..5a312f8b32c 100644
--- a/src/emu/sound/t6w28.h
+++ b/src/emu/sound/t6w28.h
@@ -4,7 +4,7 @@
#define __T6W28_H__
class t6w28_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
t6w28_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -24,12 +24,12 @@ protected:
private:
sound_stream *m_channel;
int m_sample_rate;
- int m_vol_table[16]; /* volume table */
- INT32 m_register[16]; /* registers */
- INT32 m_last_register[2]; /* last register written */
- INT32 m_volume[8]; /* volume of voice 0-2 and noise */
- UINT32 m_rng[2]; /* noise generator */
- INT32 m_noise_mode[2]; /* active noise mode */
+ int m_vol_table[16]; /* volume table */
+ INT32 m_register[16]; /* registers */
+ INT32 m_last_register[2]; /* last register written */
+ INT32 m_volume[8]; /* volume of voice 0-2 and noise */
+ UINT32 m_rng[2]; /* noise generator */
+ INT32 m_noise_mode[2]; /* active noise mode */
INT32 m_feedback_mask; /* mask for feedback */
INT32 m_whitenoise_taps; /* mask for white noise taps */
INT32 m_whitenoise_invert; /* white noise invert flag */
diff --git a/src/emu/sound/tc8830f.c b/src/emu/sound/tc8830f.c
index cf855c8ee04..8a39f30fdfd 100644
--- a/src/emu/sound/tc8830f.c
+++ b/src/emu/sound/tc8830f.c
@@ -24,7 +24,7 @@ const device_type TC8830F = &device_creator<tc8830f_device>;
tc8830f_device::tc8830f_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TC8830F, "TC8830F", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
diff --git a/src/emu/sound/tc8830f.h b/src/emu/sound/tc8830f.h
index 193dfda038b..94ba511e8e3 100644
--- a/src/emu/sound/tc8830f.h
+++ b/src/emu/sound/tc8830f.h
@@ -26,7 +26,7 @@
//**************************************************************************
class tc8830f_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
// construction/destruction
@@ -46,17 +46,17 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
- bool m_playing;
- UINT32 m_address;
- UINT32 m_stop_address;
- UINT8 m_bitcount;
- UINT8 m_bitrate;
- UINT8 m_command;
- int m_cmd_rw;
- UINT8 m_phrase;
-
- UINT8 *m_mem_base;
- UINT32 m_mem_mask;
+ bool m_playing;
+ UINT32 m_address;
+ UINT32 m_stop_address;
+ UINT8 m_bitcount;
+ UINT8 m_bitrate;
+ UINT8 m_command;
+ int m_cmd_rw;
+ UINT8 m_phrase;
+
+ UINT8 *m_mem_base;
+ UINT32 m_mem_mask;
};
diff --git a/src/emu/sound/tiaintf.c b/src/emu/sound/tiaintf.c
index ffe1ed56943..a95d173c643 100644
--- a/src/emu/sound/tiaintf.c
+++ b/src/emu/sound/tiaintf.c
@@ -50,7 +50,7 @@ const device_type TIA = &device_creator<tia_device>;
tia_device::tia_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TIA, "TIA", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tia_state);
}
@@ -92,5 +92,3 @@ void tia_device::sound_stream_update(sound_stream &stream, stream_sample_t **inp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/tiaintf.h b/src/emu/sound/tiaintf.h
index 97595b6b683..567ec6fa778 100644
--- a/src/emu/sound/tiaintf.h
+++ b/src/emu/sound/tiaintf.h
@@ -8,7 +8,7 @@
DECLARE_WRITE8_DEVICE_HANDLER( tia_sound_w );
class tia_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
tia_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/tiasound.c b/src/emu/sound/tiasound.c
index 47e1e6c72bf..5e01a371a2b 100644
--- a/src/emu/sound/tiasound.c
+++ b/src/emu/sound/tiasound.c
@@ -95,7 +95,7 @@ struct tia
INT16 Outvol[2]; /* last output volume for each channel */
- int tia_gain; /* initialized in tia_sound_init() */
+ int tia_gain; /* initialized in tia_sound_init() */
/* Initialze the bit patterns for the polynomials. */
@@ -117,7 +117,7 @@ struct tia
UINT8 Div_n_cnt[2]; /* Divide by n counter. one for each channel */
UINT8 Div_n_max[2]; /* Divide by n maximum, one for each channel */
- UINT8 Div_3_cnt[2]; /* Div 3 counter, used for POLY5_DIV3 mode */
+ UINT8 Div_3_cnt[2]; /* Div 3 counter, used for POLY5_DIV3 mode */
/* In my routines, I treat the sample output as another divide by N counter. */
@@ -127,7 +127,7 @@ struct tia
UINT16 Samp_n_max; /* Sample max, multiplied by 256 */
UINT16 Samp_n_cnt; /* Sample cnt. */
- int oversampling; /* Added oversampling for sample_rate > clock_rate */
+ int oversampling; /* Added oversampling for sample_rate > clock_rate */
};
@@ -137,7 +137,7 @@ struct tia
/* implemented by using counters. */
static const UINT8 Div31[POLY5_SIZE] =
- {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
+ {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/*****************************************************************************/
@@ -160,85 +160,85 @@ static const UINT8 Div31[POLY5_SIZE] =
void tia_write(void *_chip, offs_t offset, UINT8 data)
{
struct tia *chip = (struct tia *)_chip;
- UINT16 new_val = 0;
- UINT8 chan;
-
- /* determine which address was changed */
- switch (offset)
- {
- case AUDC0:
- chip->AUDC[0] = data & 0x0f;
- chan = 0;
- break;
-
- case AUDC1:
- chip->AUDC[1] = data & 0x0f;
- chan = 1;
- break;
-
- case AUDF0:
- chip->AUDF[0] = data & 0x1f;
- chan = 0;
- break;
-
- case AUDF1:
- chip->AUDF[1] = data & 0x1f;
- chan = 1;
- break;
-
- case AUDV0:
+ UINT16 new_val = 0;
+ UINT8 chan;
+
+ /* determine which address was changed */
+ switch (offset)
+ {
+ case AUDC0:
+ chip->AUDC[0] = data & 0x0f;
+ chan = 0;
+ break;
+
+ case AUDC1:
+ chip->AUDC[1] = data & 0x0f;
+ chan = 1;
+ break;
+
+ case AUDF0:
+ chip->AUDF[0] = data & 0x1f;
+ chan = 0;
+ break;
+
+ case AUDF1:
+ chip->AUDF[1] = data & 0x1f;
+ chan = 1;
+ break;
+
+ case AUDV0:
chip->AUDV[0] = ((data & 0x0f) << AUDV_SHIFT);
- chan = 0;
- break;
+ chan = 0;
+ break;
- case AUDV1:
+ case AUDV1:
chip->AUDV[1] = ((data & 0x0f) << AUDV_SHIFT);
- chan = 1;
- break;
-
- default:
- chan = 255;
- break;
- }
-
- /* if the output value changed */
- if (chan != 255)
- {
- /* an AUDC value of 0 is a special case */
- if (chip->AUDC[chan] == SET_TO_1 || chip->AUDC[chan] == POLY5_POLY5)
- {
- /* indicate the clock is zero so no processing will occur */
- new_val = 0;
-
- /* and set the output to the selected volume */
- chip->Outvol[chan] = chip->AUDV[chan];
- }
- else
- {
- /* otherwise calculate the 'divide by N' value */
- new_val = chip->AUDF[chan] + 1;
-
- /* if bits 2 & 3 are set, then multiply the 'div by n' count by 3 */
- if ((chip->AUDC[chan] & DIV3_MASK) == DIV3_MASK && chip->AUDC[chan] != POLY5_DIV3)
- {
- new_val *= 3;
- }
- }
-
- /* only reset those channels that have changed */
- if (new_val != chip->Div_n_max[chan])
- {
- /* reset the divide by n counters */
- chip->Div_n_max[chan] = new_val;
-
- /* if the channel is now volume only or was volume only */
- if ((chip->Div_n_cnt[chan] == 0) || (new_val == 0))
- {
- /* reset the counter (otherwise let it complete the previous) */
- chip->Div_n_cnt[chan] = new_val;
- }
- }
- }
+ chan = 1;
+ break;
+
+ default:
+ chan = 255;
+ break;
+ }
+
+ /* if the output value changed */
+ if (chan != 255)
+ {
+ /* an AUDC value of 0 is a special case */
+ if (chip->AUDC[chan] == SET_TO_1 || chip->AUDC[chan] == POLY5_POLY5)
+ {
+ /* indicate the clock is zero so no processing will occur */
+ new_val = 0;
+
+ /* and set the output to the selected volume */
+ chip->Outvol[chan] = chip->AUDV[chan];
+ }
+ else
+ {
+ /* otherwise calculate the 'divide by N' value */
+ new_val = chip->AUDF[chan] + 1;
+
+ /* if bits 2 & 3 are set, then multiply the 'div by n' count by 3 */
+ if ((chip->AUDC[chan] & DIV3_MASK) == DIV3_MASK && chip->AUDC[chan] != POLY5_DIV3)
+ {
+ new_val *= 3;
+ }
+ }
+
+ /* only reset those channels that have changed */
+ if (new_val != chip->Div_n_max[chan])
+ {
+ /* reset the divide by n counters */
+ chip->Div_n_max[chan] = new_val;
+
+ /* if the channel is now volume only or was volume only */
+ if ((chip->Div_n_cnt[chan] == 0) || (new_val == 0))
+ {
+ /* reset the counter (otherwise let it complete the previous) */
+ chip->Div_n_cnt[chan] = new_val;
+ }
+ }
+ }
}
@@ -261,52 +261,52 @@ void tia_write(void *_chip, offs_t offset, UINT8 data)
void tia_process(void *_chip, stream_sample_t *buffer, int length)
{
struct tia *chip = (struct tia *)_chip;
- UINT8 audc0, audc1;
- UINT8 div_n_cnt0, div_n_cnt1;
- UINT8 p5_0, p5_1;
- INT16 audv0, audv1, outvol_0, outvol_1;
-
- audc0 = chip->AUDC[0];
- audc1 = chip->AUDC[1];
- audv0 = chip->AUDV[0];
- audv1 = chip->AUDV[1];
-
- /* make temporary local copy */
- p5_0 = chip->P5[0];
- p5_1 = chip->P5[1];
- outvol_0 = chip->Outvol[0];
- outvol_1 = chip->Outvol[1];
- div_n_cnt0 = chip->Div_n_cnt[0];
- div_n_cnt1 = chip->Div_n_cnt[1];
-
- /* loop until the buffer is filled */
- while (length > 0)
- {
- /* Process channel 0 */
- if (div_n_cnt0 > 1)
- {
- div_n_cnt0--;
- }
- else if (div_n_cnt0 == 1)
- {
- int prev_bit5 = chip->Bit5[p5_0];
-
- div_n_cnt0 = chip->Div_n_max[0];
-
- /* the chip->P5 counter has multiple uses, so we inc it here */
- p5_0++;
- if (p5_0 == POLY5_SIZE)
- p5_0 = 0;
-
- /* check clock modifier for clock tick */
- if ((audc0 & 0x02) == 0 ||
- ((audc0 & 0x01) == 0 && Div31[p5_0]) ||
- ((audc0 & 0x01) == 1 && chip->Bit5[p5_0]) ||
+ UINT8 audc0, audc1;
+ UINT8 div_n_cnt0, div_n_cnt1;
+ UINT8 p5_0, p5_1;
+ INT16 audv0, audv1, outvol_0, outvol_1;
+
+ audc0 = chip->AUDC[0];
+ audc1 = chip->AUDC[1];
+ audv0 = chip->AUDV[0];
+ audv1 = chip->AUDV[1];
+
+ /* make temporary local copy */
+ p5_0 = chip->P5[0];
+ p5_1 = chip->P5[1];
+ outvol_0 = chip->Outvol[0];
+ outvol_1 = chip->Outvol[1];
+ div_n_cnt0 = chip->Div_n_cnt[0];
+ div_n_cnt1 = chip->Div_n_cnt[1];
+
+ /* loop until the buffer is filled */
+ while (length > 0)
+ {
+ /* Process channel 0 */
+ if (div_n_cnt0 > 1)
+ {
+ div_n_cnt0--;
+ }
+ else if (div_n_cnt0 == 1)
+ {
+ int prev_bit5 = chip->Bit5[p5_0];
+
+ div_n_cnt0 = chip->Div_n_max[0];
+
+ /* the chip->P5 counter has multiple uses, so we inc it here */
+ p5_0++;
+ if (p5_0 == POLY5_SIZE)
+ p5_0 = 0;
+
+ /* check clock modifier for clock tick */
+ if ((audc0 & 0x02) == 0 ||
+ ((audc0 & 0x01) == 0 && Div31[p5_0]) ||
+ ((audc0 & 0x01) == 1 && chip->Bit5[p5_0]) ||
((audc0 & 0x0f) == POLY5_DIV3 && chip->Bit5[p5_0] != prev_bit5))
{
- if (audc0 & 0x04) /* pure modified clock selected */
- {
- if ((audc0 & 0x0f) == POLY5_DIV3) /* POLY5 -> DIV3 mode */
+ if (audc0 & 0x04) /* pure modified clock selected */
+ {
+ if ((audc0 & 0x0f) == POLY5_DIV3) /* POLY5 -> DIV3 mode */
{
if ( chip->Bit5[p5_0] != prev_bit5 )
{
@@ -321,26 +321,26 @@ void tia_process(void *_chip, stream_sample_t *buffer, int length)
}
}
}
- else if (outvol_0) /* if the output was set */
- outvol_0 = 0; /* turn it off */
- else
- outvol_0 = audv0; /* else turn it on */
- }
- else if (audc0 & 0x08) /* check for p5/p9 */
- {
- if (audc0 == POLY9) /* check for poly9 */
- {
- /* inc the poly9 counter */
- chip->P9[0]++;
- if (chip->P9[0] == POLY9_SIZE)
- chip->P9[0] = 0;
-
- if (chip->Bit9[chip->P9[0]])
- outvol_0 = audv0;
- else
- outvol_0 = 0;
- }
- else if ( audc0 & 0x02 )
+ else if (outvol_0) /* if the output was set */
+ outvol_0 = 0; /* turn it off */
+ else
+ outvol_0 = audv0; /* else turn it on */
+ }
+ else if (audc0 & 0x08) /* check for p5/p9 */
+ {
+ if (audc0 == POLY9) /* check for poly9 */
+ {
+ /* inc the poly9 counter */
+ chip->P9[0]++;
+ if (chip->P9[0] == POLY9_SIZE)
+ chip->P9[0] = 0;
+
+ if (chip->Bit9[chip->P9[0]])
+ outvol_0 = audv0;
+ else
+ outvol_0 = 0;
+ }
+ else if ( audc0 & 0x02 )
{
if (outvol_0 || audc0 & 0x01 )
outvol_0 = 0;
@@ -348,55 +348,55 @@ void tia_process(void *_chip, stream_sample_t *buffer, int length)
outvol_0 = audv0;
}
else
- /* must be poly5 */
- {
- if (chip->Bit5[p5_0])
- outvol_0 = audv0;
- else
- outvol_0 = 0;
- }
- }
- else
- /* poly4 is the only remaining option */
- {
- /* inc the poly4 counter */
- chip->P4[0]++;
- if (chip->P4[0] == POLY4_SIZE)
- chip->P4[0] = 0;
-
- if (chip->Bit4[chip->P4[0]])
- outvol_0 = audv0;
- else
- outvol_0 = 0;
- }
- }
- }
-
-
- /* Process channel 1 */
- if (div_n_cnt1 > 1)
- {
- div_n_cnt1--;
- }
- else if (div_n_cnt1 == 1)
- {
+ /* must be poly5 */
+ {
+ if (chip->Bit5[p5_0])
+ outvol_0 = audv0;
+ else
+ outvol_0 = 0;
+ }
+ }
+ else
+ /* poly4 is the only remaining option */
+ {
+ /* inc the poly4 counter */
+ chip->P4[0]++;
+ if (chip->P4[0] == POLY4_SIZE)
+ chip->P4[0] = 0;
+
+ if (chip->Bit4[chip->P4[0]])
+ outvol_0 = audv0;
+ else
+ outvol_0 = 0;
+ }
+ }
+ }
+
+
+ /* Process channel 1 */
+ if (div_n_cnt1 > 1)
+ {
+ div_n_cnt1--;
+ }
+ else if (div_n_cnt1 == 1)
+ {
int prev_bit5 = chip->Bit5[p5_1];
- div_n_cnt1 = chip->Div_n_max[1];
+ div_n_cnt1 = chip->Div_n_max[1];
- /* the chip->P5 counter has multiple uses, so we inc it here */
- p5_1++;
- if (p5_1 == POLY5_SIZE)
- p5_1 = 0;
+ /* the chip->P5 counter has multiple uses, so we inc it here */
+ p5_1++;
+ if (p5_1 == POLY5_SIZE)
+ p5_1 = 0;
- /* check clock modifier for clock tick */
- if ((audc1 & 0x02) == 0 ||
- ((audc1 & 0x01) == 0 && Div31[p5_1]) ||
- ((audc1 & 0x01) == 1 && chip->Bit5[p5_1]) ||
+ /* check clock modifier for clock tick */
+ if ((audc1 & 0x02) == 0 ||
+ ((audc1 & 0x01) == 0 && Div31[p5_1]) ||
+ ((audc1 & 0x01) == 1 && chip->Bit5[p5_1]) ||
((audc1 & 0x0f) == POLY5_DIV3 && chip->Bit5[p5_1] != prev_bit5))
- {
- if (audc1 & 0x04) /* pure modified clock selected */
- {
+ {
+ if (audc1 & 0x04) /* pure modified clock selected */
+ {
if ((audc1 & 0x0f) == POLY5_DIV3) /* POLY5 -> DIV3 mode */
{
if ( chip->Bit5[p5_1] != prev_bit5 )
@@ -412,25 +412,25 @@ void tia_process(void *_chip, stream_sample_t *buffer, int length)
}
}
}
- else if (outvol_1) /* if the output was set */
- outvol_1 = 0; /* turn it off */
- else
- outvol_1 = audv1; /* else turn it on */
- }
- else if (audc1 & 0x08) /* check for p5/p9 */
- {
- if (audc1 == POLY9) /* check for poly9 */
- {
- /* inc the poly9 counter */
- chip->P9[1]++;
- if (chip->P9[1] == POLY9_SIZE)
- chip->P9[1] = 0;
-
- if (chip->Bit9[chip->P9[1]])
- outvol_1 = audv1;
- else
- outvol_1 = 0;
- }
+ else if (outvol_1) /* if the output was set */
+ outvol_1 = 0; /* turn it off */
+ else
+ outvol_1 = audv1; /* else turn it on */
+ }
+ else if (audc1 & 0x08) /* check for p5/p9 */
+ {
+ if (audc1 == POLY9) /* check for poly9 */
+ {
+ /* inc the poly9 counter */
+ chip->P9[1]++;
+ if (chip->P9[1] == POLY9_SIZE)
+ chip->P9[1] = 0;
+
+ if (chip->Bit9[chip->P9[1]])
+ outvol_1 = audv1;
+ else
+ outvol_1 = 0;
+ }
else if ( audc1 & 0x02 )
{
if (outvol_1 || audc1 & 0x01 )
@@ -438,35 +438,35 @@ void tia_process(void *_chip, stream_sample_t *buffer, int length)
else
outvol_1 = audv1;
}
- else
- /* must be poly5 */
- {
- if (chip->Bit5[p5_1])
- outvol_1 = audv1;
- else
- outvol_1 = 0;
- }
- }
- else
- /* poly4 is the only remaining option */
- {
- /* inc the poly4 counter */
- chip->P4[1]++;
- if (chip->P4[1] == POLY4_SIZE)
- chip->P4[1] = 0;
-
- if (chip->Bit4[chip->P4[1]])
- outvol_1 = audv1;
- else
- outvol_1 = 0;
- }
- }
- }
+ else
+ /* must be poly5 */
+ {
+ if (chip->Bit5[p5_1])
+ outvol_1 = audv1;
+ else
+ outvol_1 = 0;
+ }
+ }
+ else
+ /* poly4 is the only remaining option */
+ {
+ /* inc the poly4 counter */
+ chip->P4[1]++;
+ if (chip->P4[1] == POLY4_SIZE)
+ chip->P4[1] = 0;
+
+ if (chip->Bit4[chip->P4[1]])
+ outvol_1 = audv1;
+ else
+ outvol_1 = 0;
+ }
+ }
+ }
if (!chip->oversampling)
{
/* decrement the sample counter - value is 256 since the lower
- * byte contains the fractional part */
+ * byte contains the fractional part */
chip->Samp_n_cnt -= 256;
/* if the count down has reached zero */
@@ -487,7 +487,7 @@ void tia_process(void *_chip, stream_sample_t *buffer, int length)
do
{
/* decrement the sample counter - value is 256 since the lower
- * byte contains the fractional part */
+ * byte contains the fractional part */
chip->Samp_n_cnt -= 256;
/* calculate the latest output value and place in buffer */
*buffer++ = outvol_0 + outvol_1;
@@ -499,31 +499,31 @@ void tia_process(void *_chip, stream_sample_t *buffer, int length)
if (chip->Samp_n_cnt < 256)
chip->Samp_n_cnt += chip->Samp_n_max;
}
- }
+ }
- /* save for next round */
- chip->P5[0] = p5_0;
- chip->P5[1] = p5_1;
- chip->Outvol[0] = outvol_0;
- chip->Outvol[1] = outvol_1;
- chip->Div_n_cnt[0] = div_n_cnt0;
- chip->Div_n_cnt[1] = div_n_cnt1;
+ /* save for next round */
+ chip->P5[0] = p5_0;
+ chip->P5[1] = p5_1;
+ chip->Outvol[0] = outvol_0;
+ chip->Outvol[1] = outvol_1;
+ chip->Div_n_cnt[0] = div_n_cnt0;
+ chip->Div_n_cnt[1] = div_n_cnt1;
}
static void poly_init(UINT8 *poly, int size, int f0, int f1)
{
- int mask = (1 << size) - 1;
- int i, x = mask;
+ int mask = (1 << size) - 1;
+ int i, x = mask;
- for (i = 0; i < mask; i++)
- {
+ for (i = 0; i < mask; i++)
+ {
int bit0 = ( ( size - f0 ) ? ( x >> ( size - f0 ) ) : x ) & 0x01;
- int bit1 = ( ( size - f1 ) ? ( x >> ( size - f1 ) ) : x ) & 0x01;
- poly[i] = x & 1;
- /* calculate next bit */
+ int bit1 = ( ( size - f1 ) ? ( x >> ( size - f1 ) ) : x ) & 0x01;
+ poly[i] = x & 1;
+ /* calculate next bit */
x = ( x >> 1 ) | ( ( bit0 ^ bit1 ) << ( size - 1) );
- }
+ }
}
/*****************************************************************************/
@@ -549,40 +549,40 @@ void *tia_sound_init(int clock, int sample_rate, int gain)
chip = global_alloc_clear(struct tia);
/* set the gain factor (normally use TIA_DEFAULT_GAIN) */
- chip->tia_gain = gain;
+ chip->tia_gain = gain;
/* fill the polynomials */
- poly_init(chip->Bit4, 4, 4, 3);
- poly_init(chip->Bit5, 5, 5, 3);
- poly_init(chip->Bit9, 9, 9, 5);
+ poly_init(chip->Bit4, 4, 4, 3);
+ poly_init(chip->Bit5, 5, 5, 3);
+ poly_init(chip->Bit9, 9, 9, 5);
- /* calculate the sample 'divide by N' value based on the playback freq. */
- chip->Samp_n_max = ((UINT16)(UINT32)clock << 8) / sample_rate;
- chip->Samp_n_cnt = chip->Samp_n_max; /* initialize all bits of the sample counter */
+ /* calculate the sample 'divide by N' value based on the playback freq. */
+ chip->Samp_n_max = ((UINT16)(UINT32)clock << 8) / sample_rate;
+ chip->Samp_n_cnt = chip->Samp_n_max; /* initialize all bits of the sample counter */
if (chip->Samp_n_max < 256) /* we need to use oversampling for sample_rate > clock_rate */
{
- chip->Samp_n_max = ((UINT16)(UINT32)sample_rate << 8) / clock;
+ chip->Samp_n_max = ((UINT16)(UINT32)sample_rate << 8) / clock;
chip->Samp_n_cnt = chip->Samp_n_max;
chip->oversampling = 1;
}
- /* initialize the local globals */
- for (chan = CHAN1; chan <= CHAN2; chan++)
- {
- chip->Outvol[chan] = 0;
- chip->Div_n_cnt[chan] = 0;
- chip->Div_n_max[chan] = 0;
+ /* initialize the local globals */
+ for (chan = CHAN1; chan <= CHAN2; chan++)
+ {
+ chip->Outvol[chan] = 0;
+ chip->Div_n_cnt[chan] = 0;
+ chip->Div_n_max[chan] = 0;
chip->Div_3_cnt[chan] = 3;
- chip->AUDC[chan] = 0;
- chip->AUDF[chan] = 0;
- chip->AUDV[chan] = 0;
- chip->P4[chan] = 0;
- chip->P5[chan] = 0;
- chip->P9[chan] = 0;
- }
-
- return chip;
+ chip->AUDC[chan] = 0;
+ chip->AUDF[chan] = 0;
+ chip->AUDV[chan] = 0;
+ chip->P4[chan] = 0;
+ chip->P5[chan] = 0;
+ chip->P9[chan] = 0;
+ }
+
+ return chip;
}
diff --git a/src/emu/sound/tiasound.h b/src/emu/sound/tiasound.h
index 69796c45bc6..9733d8dc1d7 100644
--- a/src/emu/sound/tiasound.h
+++ b/src/emu/sound/tiasound.h
@@ -42,5 +42,4 @@ void tia_sound_free(void *chip);
void tia_process (void *chip, stream_sample_t *buffer, int length);
void tia_write(void *chip, offs_t offset, UINT8 data);
-#endif /* __TIASOUND_H__ */
-
+#endif /* __TIASOUND_H__ */
diff --git a/src/emu/sound/tms3615.c b/src/emu/sound/tms3615.c
index 07152772a7f..80b54d13a61 100644
--- a/src/emu/sound/tms3615.c
+++ b/src/emu/sound/tms3615.c
@@ -1,22 +1,22 @@
#include "emu.h"
#include "tms3615.h"
-#define VMIN 0x0000
-#define VMAX 0x7fff
+#define VMIN 0x0000
+#define VMAX 0x7fff
#define TONES 13
static const int divisor[TONES] = { 478, 451, 426, 402, 379, 358, 338, 319, 301, 284, 268, 253, 239 };
struct tms_state {
- sound_stream *channel; /* returned by stream_create() */
- int samplerate; /* output sample rate */
- int basefreq; /* chip's base frequency */
- int counter8[TONES]; /* tone frequency counter for 8' */
- int counter16[TONES]; /* tone frequency counter for 16'*/
- int output8; /* output signal bits for 8' */
- int output16; /* output signal bits for 16' */
- int enable; /* mask which tones to play */
+ sound_stream *channel; /* returned by stream_create() */
+ int samplerate; /* output sample rate */
+ int basefreq; /* chip's base frequency */
+ int counter8[TONES]; /* tone frequency counter for 8' */
+ int counter16[TONES]; /* tone frequency counter for 16'*/
+ int output8; /* output signal bits for 8' */
+ int output16; /* output signal bits for 16' */
+ int enable; /* mask which tones to play */
};
INLINE tms_state *get_safe_token(device_t *device)
@@ -71,8 +71,8 @@ static STREAM_UPDATE( tms3615_sound_update )
}
}
- *buffer8++ = sum8 / TONES;
- *buffer16++ = sum16 / TONES;
+ *buffer8++ = sum8 / TONES;
+ *buffer16++ = sum16 / TONES;
}
tms->enable = 0;
@@ -97,7 +97,7 @@ const device_type TMS3615 = &device_creator<tms3615_device>;
tms3615_device::tms3615_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TMS3615, "TMS3615", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tms_state);
}
@@ -130,5 +130,3 @@ void tms3615_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/tms3615.h b/src/emu/sound/tms3615.h
index c7645e00017..c69acb1440a 100644
--- a/src/emu/sound/tms3615.h
+++ b/src/emu/sound/tms3615.h
@@ -7,11 +7,11 @@
extern void tms3615_enable_w(device_t *device, int enable);
-#define TMS3615_FOOTAGE_8 0
-#define TMS3615_FOOTAGE_16 1
+#define TMS3615_FOOTAGE_8 0
+#define TMS3615_FOOTAGE_16 1
class tms3615_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
tms3615_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/tms36xx.c b/src/emu/sound/tms36xx.c
index ad9e0c62569..e31c53d1ec2 100644
--- a/src/emu/sound/tms36xx.c
+++ b/src/emu/sound/tms36xx.c
@@ -5,55 +5,55 @@
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define VMIN 0x0000
-#define VMAX 0x7fff
+#define VMIN 0x0000
+#define VMAX 0x7fff
/* the frequencies are later adjusted by "* clock / FSCALE" */
-#define FSCALE 1024
+#define FSCALE 1024
struct tms_state {
- char *subtype; /* subtype name MM6221AA, TMS3615 or TMS3617 */
- sound_stream * channel; /* returned by stream_create() */
+ char *subtype; /* subtype name MM6221AA, TMS3615 or TMS3617 */
+ sound_stream * channel; /* returned by stream_create() */
- int samplerate; /* output sample rate */
+ int samplerate; /* output sample rate */
- int basefreq; /* chip's base frequency */
- int octave; /* octave select of the TMS3615 */
+ int basefreq; /* chip's base frequency */
+ int octave; /* octave select of the TMS3615 */
- int speed; /* speed of the tune */
- int tune_counter; /* tune counter */
- int note_counter; /* note counter */
+ int speed; /* speed of the tune */
+ int tune_counter; /* tune counter */
+ int note_counter; /* note counter */
- int voices; /* active voices */
- int shift; /* shift toggles between 0 and 6 to allow decaying voices */
- int vol[12]; /* (decaying) volume of harmonics notes */
+ int voices; /* active voices */
+ int shift; /* shift toggles between 0 and 6 to allow decaying voices */
+ int vol[12]; /* (decaying) volume of harmonics notes */
int vol_counter[12];/* volume adjustment counter */
- int decay[12]; /* volume adjustment rate - dervied from decay */
+ int decay[12]; /* volume adjustment rate - dervied from decay */
- int counter[12]; /* tone frequency counter */
- int frequency[12]; /* tone frequency */
- int output; /* output signal bits */
- int enable; /* mask which harmoics */
+ int counter[12]; /* tone frequency counter */
+ int frequency[12]; /* tone frequency */
+ int output; /* output signal bits */
+ int enable; /* mask which harmoics */
- int tune_num; /* tune currently playing */
- int tune_ofs; /* note currently playing */
- int tune_max; /* end of tune */
+ int tune_num; /* tune currently playing */
+ int tune_ofs; /* note currently playing */
+ int tune_max; /* end of tune */
const tms36xx_interface *intf;
};
-#define C(n) (int)((FSCALE<<(n-1))*1.18921) /* 2^(3/12) */
-#define Cx(n) (int)((FSCALE<<(n-1))*1.25992) /* 2^(4/12) */
-#define D(n) (int)((FSCALE<<(n-1))*1.33484) /* 2^(5/12) */
-#define Dx(n) (int)((FSCALE<<(n-1))*1.41421) /* 2^(6/12) */
-#define E(n) (int)((FSCALE<<(n-1))*1.49831) /* 2^(7/12) */
-#define F(n) (int)((FSCALE<<(n-1))*1.58740) /* 2^(8/12) */
-#define Fx(n) (int)((FSCALE<<(n-1))*1.68179) /* 2^(9/12) */
-#define G(n) (int)((FSCALE<<(n-1))*1.78180) /* 2^(10/12) */
-#define Gx(n) (int)((FSCALE<<(n-1))*1.88775) /* 2^(11/12) */
-#define A(n) (int)((FSCALE<<n)) /* A */
-#define Ax(n) (int)((FSCALE<<n)*1.05946) /* 2^(1/12) */
-#define B(n) (int)((FSCALE<<n)*1.12246) /* 2^(2/12) */
+#define C(n) (int)((FSCALE<<(n-1))*1.18921) /* 2^(3/12) */
+#define Cx(n) (int)((FSCALE<<(n-1))*1.25992) /* 2^(4/12) */
+#define D(n) (int)((FSCALE<<(n-1))*1.33484) /* 2^(5/12) */
+#define Dx(n) (int)((FSCALE<<(n-1))*1.41421) /* 2^(6/12) */
+#define E(n) (int)((FSCALE<<(n-1))*1.49831) /* 2^(7/12) */
+#define F(n) (int)((FSCALE<<(n-1))*1.58740) /* 2^(8/12) */
+#define Fx(n) (int)((FSCALE<<(n-1))*1.68179) /* 2^(9/12) */
+#define G(n) (int)((FSCALE<<(n-1))*1.78180) /* 2^(10/12) */
+#define Gx(n) (int)((FSCALE<<(n-1))*1.88775) /* 2^(11/12) */
+#define A(n) (int)((FSCALE<<n)) /* A */
+#define Ax(n) (int)((FSCALE<<n)*1.05946) /* 2^(1/12) */
+#define B(n) (int)((FSCALE<<n)*1.12246) /* 2^(2/12) */
/*
* Alarm sound?
@@ -62,38 +62,38 @@ struct tms_state {
* 'alarming' in here.
*/
static const int tune1[96*6] = {
- C(3), 0, 0, C(2), 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, C(4), 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, C(2), 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, C(4), 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
- C(3), 0, 0, 0, 0, 0,
- G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, C(2), 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, C(4), 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, C(2), 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, C(4), 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
+ C(3), 0, 0, 0, 0, 0,
+ G(3), 0, 0, 0, 0, 0,
};
/*
@@ -101,57 +101,57 @@ static const int tune1[96*6] = {
* (Excuse my non-existent musical skill, Mr. B ;-)
*/
static const int tune2[96*6] = {
- D(3), D(4), D(5), 0, 0, 0,
- Cx(3), Cx(4), Cx(5), 0, 0, 0,
- D(3), D(4), D(5), 0, 0, 0,
- Cx(3), Cx(4), Cx(5), 0, 0, 0,
- D(3), D(4), D(5), 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- C(3), C(4), C(5), 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- G(2), G(3), G(4), 0, 0, 0,
- D(1), D(2), D(3), 0, 0, 0,
- G(1), G(2), G(3), 0, 0, 0,
- Ax(1), Ax(2), Ax(3), 0, 0, 0,
-
- D(2), D(3), D(4), 0, 0, 0,
- G(2), G(3), G(4), 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- D(1), D(2), D(3), 0, 0, 0,
- A(1), A(2), A(3), 0, 0, 0,
- D(2), D(3), D(4), 0, 0, 0,
- Fx(2), Fx(3), Fx(4), 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- D(1), D(2), D(3), 0, 0, 0,
- G(1), G(2), G(3), 0, 0, 0,
- Ax(1), Ax(2), Ax(3), 0, 0, 0,
-
- D(3), D(4), D(5), 0, 0, 0,
- Cx(3), Cx(4), Cx(5), 0, 0, 0,
- D(3), D(4), D(5), 0, 0, 0,
- Cx(3), Cx(4), Cx(5), 0, 0, 0,
- D(3), D(4), D(5), 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- C(3), C(4), C(5), 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- G(2), G(3), G(4), 0, 0, 0,
- D(1), D(2), D(3), 0, 0, 0,
- G(1), G(2), G(3), 0, 0, 0,
- Ax(1), Ax(2), Ax(3), 0, 0, 0,
-
- D(2), D(3), D(4), 0, 0, 0,
- G(2), G(3), G(4), 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- D(1), D(2), D(3), 0, 0, 0,
- A(1), A(2), A(3), 0, 0, 0,
- D(2), D(3), D(4), 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, G(2), G(3), G(4),
- D(1), D(2), D(3), 0, 0, 0,
- G(1), G(2), G(3), 0, 0, 0,
- 0, 0, 0, 0, 0, 0
+ D(3), D(4), D(5), 0, 0, 0,
+ Cx(3), Cx(4), Cx(5), 0, 0, 0,
+ D(3), D(4), D(5), 0, 0, 0,
+ Cx(3), Cx(4), Cx(5), 0, 0, 0,
+ D(3), D(4), D(5), 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ C(3), C(4), C(5), 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ G(2), G(3), G(4), 0, 0, 0,
+ D(1), D(2), D(3), 0, 0, 0,
+ G(1), G(2), G(3), 0, 0, 0,
+ Ax(1), Ax(2), Ax(3), 0, 0, 0,
+
+ D(2), D(3), D(4), 0, 0, 0,
+ G(2), G(3), G(4), 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ D(1), D(2), D(3), 0, 0, 0,
+ A(1), A(2), A(3), 0, 0, 0,
+ D(2), D(3), D(4), 0, 0, 0,
+ Fx(2), Fx(3), Fx(4), 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ D(1), D(2), D(3), 0, 0, 0,
+ G(1), G(2), G(3), 0, 0, 0,
+ Ax(1), Ax(2), Ax(3), 0, 0, 0,
+
+ D(3), D(4), D(5), 0, 0, 0,
+ Cx(3), Cx(4), Cx(5), 0, 0, 0,
+ D(3), D(4), D(5), 0, 0, 0,
+ Cx(3), Cx(4), Cx(5), 0, 0, 0,
+ D(3), D(4), D(5), 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ C(3), C(4), C(5), 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ G(2), G(3), G(4), 0, 0, 0,
+ D(1), D(2), D(3), 0, 0, 0,
+ G(1), G(2), G(3), 0, 0, 0,
+ Ax(1), Ax(2), Ax(3), 0, 0, 0,
+
+ D(2), D(3), D(4), 0, 0, 0,
+ G(2), G(3), G(4), 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ D(1), D(2), D(3), 0, 0, 0,
+ A(1), A(2), A(3), 0, 0, 0,
+ D(2), D(3), D(4), 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, G(2), G(3), G(4),
+ D(1), D(2), D(3), 0, 0, 0,
+ G(1), G(2), G(3), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0
};
/*
@@ -165,177 +165,177 @@ static const int tune2[96*6] = {
* This song is a classical piece called "ESTUDIO" from M.A.Robira.
*/
static const int tune3[96*6] = {
- A(2), A(3), A(4), D(1), D(2), D(3),
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- A(2), A(3), A(4), A(1), A(2), A(3),
- 0, 0, 0, 0, 0, 0,
- G(2), G(3), G(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- F(2), F(3), F(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- F(2), F(3), F(4), F(1), F(2), F(3),
- 0, 0, 0, 0, 0, 0,
- E(2), E(3), E(4), F(1), F(2), F(3),
- 0, 0, 0, 0, 0, 0,
- D(2), D(3), D(4), F(1), F(2), F(3),
- 0, 0, 0, 0, 0, 0,
-
- D(2), D(3), D(4), A(1), A(2), A(3),
- 0, 0, 0, 0, 0, 0,
- F(2), F(3), F(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- D(3), D(4), D(5), D(1), D(2), D(3),
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, D(1), D(2), D(3),
- 0, 0, 0, F(1), F(2), F(3),
- 0, 0, 0, A(1), A(2), A(3),
- 0, 0, 0, D(2), D(2), D(2),
-
- D(3), D(4), D(5), D(1), D(2), D(3),
- 0, 0, 0, 0, 0, 0,
- C(3), C(4), C(5), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- Ax(2), Ax(3), Ax(4), Ax(1), Ax(2), Ax(3),
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- G(2), G(3), G(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- G(2), G(3), G(4), G(1), G(2), G(3),
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- A(2), A(3), A(4), A(1), A(2), A(3),
- 0, 0, 0, 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- Cx(3), Cx(4), Cx(5), A(1), A(2), A(3),
- 0, 0, 0, 0, 0, 0,
- Ax(2), Ax(3), Ax(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- A(2), A(3), A(4), F(1), F(2), F(3),
- 0, 0, 0, 0, 0, 0,
- G(2), G(3), G(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- F(2), F(3), F(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- F(2), F(3), F(4), D(1), D(2), D(3),
- 0, 0, 0, 0, 0, 0,
- E(2), E(3), E(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- D(2), D(3), D(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- E(2), E(3), E(4), E(1), E(2), E(3),
- 0, 0, 0, 0, 0, 0,
- E(2), E(3), E(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- E(2), E(3), E(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
-
- E(2), E(3), E(4), Ax(1), Ax(2), Ax(3),
- 0, 0, 0, 0, 0, 0,
- F(2), F(3), F(4), 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- E(2), E(3), E(4), F(1), F(2), F(3),
- 0, 0, 0, 0, 0, 0,
-
- D(2), D(3), D(4), D(1), D(2), D(3),
- 0, 0, 0, 0, 0, 0,
- F(2), F(3), F(4), A(1), A(2), A(3),
- 0, 0, 0, 0, 0, 0,
- A(2), A(3), A(4), F(1), F(2), F(3),
- 0, 0, 0, 0, 0, 0,
-
- D(3), D(4), D(5), D(1), D(2), D(3),
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0
+ A(2), A(3), A(4), D(1), D(2), D(3),
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ A(2), A(3), A(4), A(1), A(2), A(3),
+ 0, 0, 0, 0, 0, 0,
+ G(2), G(3), G(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ F(2), F(3), F(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ F(2), F(3), F(4), F(1), F(2), F(3),
+ 0, 0, 0, 0, 0, 0,
+ E(2), E(3), E(4), F(1), F(2), F(3),
+ 0, 0, 0, 0, 0, 0,
+ D(2), D(3), D(4), F(1), F(2), F(3),
+ 0, 0, 0, 0, 0, 0,
+
+ D(2), D(3), D(4), A(1), A(2), A(3),
+ 0, 0, 0, 0, 0, 0,
+ F(2), F(3), F(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ D(3), D(4), D(5), D(1), D(2), D(3),
+ 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, D(1), D(2), D(3),
+ 0, 0, 0, F(1), F(2), F(3),
+ 0, 0, 0, A(1), A(2), A(3),
+ 0, 0, 0, D(2), D(2), D(2),
+
+ D(3), D(4), D(5), D(1), D(2), D(3),
+ 0, 0, 0, 0, 0, 0,
+ C(3), C(4), C(5), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ Ax(2), Ax(3), Ax(4), Ax(1), Ax(2), Ax(3),
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ G(2), G(3), G(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ G(2), G(3), G(4), G(1), G(2), G(3),
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ A(2), A(3), A(4), A(1), A(2), A(3),
+ 0, 0, 0, 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ Cx(3), Cx(4), Cx(5), A(1), A(2), A(3),
+ 0, 0, 0, 0, 0, 0,
+ Ax(2), Ax(3), Ax(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ A(2), A(3), A(4), F(1), F(2), F(3),
+ 0, 0, 0, 0, 0, 0,
+ G(2), G(3), G(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ F(2), F(3), F(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ F(2), F(3), F(4), D(1), D(2), D(3),
+ 0, 0, 0, 0, 0, 0,
+ E(2), E(3), E(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ D(2), D(3), D(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ E(2), E(3), E(4), E(1), E(2), E(3),
+ 0, 0, 0, 0, 0, 0,
+ E(2), E(3), E(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ E(2), E(3), E(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+
+ E(2), E(3), E(4), Ax(1), Ax(2), Ax(3),
+ 0, 0, 0, 0, 0, 0,
+ F(2), F(3), F(4), 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ E(2), E(3), E(4), F(1), F(2), F(3),
+ 0, 0, 0, 0, 0, 0,
+
+ D(2), D(3), D(4), D(1), D(2), D(3),
+ 0, 0, 0, 0, 0, 0,
+ F(2), F(3), F(4), A(1), A(2), A(3),
+ 0, 0, 0, 0, 0, 0,
+ A(2), A(3), A(4), F(1), F(2), F(3),
+ 0, 0, 0, 0, 0, 0,
+
+ D(3), D(4), D(5), D(1), D(2), D(3),
+ 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0
};
/* This is used to play single notes for the TMS3615/TMS3617 */
static const int tune4[13*6] = {
/* 16' 8' 5 1/3' 4' 2 2/3' 2' */
- B(0), B(1), Dx(2), B(2), Dx(3), B(3),
- C(1), C(2), E(2), C(3), E(3), C(4),
- Cx(1), Cx(2), F(2), Cx(3), F(3), Cx(4),
- D(1), D(2), Fx(2), D(3), Fx(3), D(4),
- Dx(1), Dx(2), G(2), Dx(3), G(3), Dx(4),
- E(1), E(2), Gx(2), E(3), Gx(3), E(4),
- F(1), F(2), A(2), F(3), A(3), F(4),
- Fx(1), Fx(2), Ax(2), Fx(3), Ax(3), Fx(4),
- G(1), G(2), B(2), G(3), B(3), G(4),
- Gx(1), Gx(2), C(3), Gx(3), C(4), Gx(4),
- A(1), A(2), Cx(3), A(3), Cx(4), A(4),
- Ax(1), Ax(2), D(3), Ax(3), D(4), Ax(4),
- B(1), B(2), Dx(3), B(3), Dx(4), B(4)
+ B(0), B(1), Dx(2), B(2), Dx(3), B(3),
+ C(1), C(2), E(2), C(3), E(3), C(4),
+ Cx(1), Cx(2), F(2), Cx(3), F(3), Cx(4),
+ D(1), D(2), Fx(2), D(3), Fx(3), D(4),
+ Dx(1), Dx(2), G(2), Dx(3), G(3), Dx(4),
+ E(1), E(2), Gx(2), E(3), Gx(3), E(4),
+ F(1), F(2), A(2), F(3), A(3), F(4),
+ Fx(1), Fx(2), Ax(2), Fx(3), Ax(3), Fx(4),
+ G(1), G(2), B(2), G(3), B(3), G(4),
+ Gx(1), Gx(2), C(3), Gx(3), C(4), Gx(4),
+ A(1), A(2), Cx(3), A(3), Cx(4), A(4),
+ Ax(1), Ax(2), D(3), Ax(3), D(4), Ax(4),
+ B(1), B(2), Dx(3), B(3), Dx(4), B(4)
};
static const int *const tunes[] = {NULL,tune1,tune2,tune3,tune4};
-#define DECAY(voice) \
- if( tms->vol[voice] > VMIN ) \
- { \
- /* decay of first voice */ \
- tms->vol_counter[voice] -= tms->decay[voice]; \
- while( tms->vol_counter[voice] <= 0 ) \
- { \
- tms->vol_counter[voice] += samplerate; \
- if( tms->vol[voice]-- <= VMIN ) \
- { \
- tms->frequency[voice] = 0; \
- tms->vol[voice] = VMIN; \
- break; \
- } \
- } \
+#define DECAY(voice) \
+ if( tms->vol[voice] > VMIN ) \
+ { \
+ /* decay of first voice */ \
+ tms->vol_counter[voice] -= tms->decay[voice]; \
+ while( tms->vol_counter[voice] <= 0 ) \
+ { \
+ tms->vol_counter[voice] += samplerate; \
+ if( tms->vol[voice]-- <= VMIN ) \
+ { \
+ tms->frequency[voice] = 0; \
+ tms->vol[voice] = VMIN; \
+ break; \
+ } \
+ } \
}
-#define RESTART(voice) \
- if( tunes[tms->tune_num][tms->tune_ofs*6+voice] ) \
- { \
- tms->frequency[tms->shift+voice] = \
- tunes[tms->tune_num][tms->tune_ofs*6+voice] * \
- (tms->basefreq << tms->octave) / FSCALE; \
- tms->vol[tms->shift+voice] = VMAX; \
+#define RESTART(voice) \
+ if( tunes[tms->tune_num][tms->tune_ofs*6+voice] ) \
+ { \
+ tms->frequency[tms->shift+voice] = \
+ tunes[tms->tune_num][tms->tune_ofs*6+voice] * \
+ (tms->basefreq << tms->octave) / FSCALE; \
+ tms->vol[tms->shift+voice] = VMAX; \
}
#define TONE(voice) \
- if( (tms->enable & (1<<voice)) && tms->frequency[voice] ) \
- { \
- /* first note */ \
- tms->counter[voice] -= tms->frequency[voice]; \
- while( tms->counter[voice] <= 0 ) \
- { \
- tms->counter[voice] += samplerate; \
- tms->output ^= 1 << voice; \
- } \
- if (tms->output & tms->enable & (1 << voice)) \
- sum += tms->vol[voice]; \
+ if( (tms->enable & (1<<voice)) && tms->frequency[voice] ) \
+ { \
+ /* first note */ \
+ tms->counter[voice] -= tms->frequency[voice]; \
+ while( tms->counter[voice] <= 0 ) \
+ { \
+ tms->counter[voice] += samplerate; \
+ tms->output ^= 1 << voice; \
+ } \
+ if (tms->output & tms->enable & (1 << voice)) \
+ sum += tms->vol[voice]; \
}
@@ -353,7 +353,7 @@ static STREAM_UPDATE( tms36xx_sound_update )
int samplerate = tms->samplerate;
stream_sample_t *buffer = outputs[0];
- /* no tune played? */
+ /* no tune played? */
if( !tunes[tms->tune_num] || tms->voices == 0 )
{
while (--samples >= 0)
@@ -382,7 +382,7 @@ static STREAM_UPDATE( tms36xx_sound_update )
if (tms->tune_ofs < tms->tune_max)
{
/* shift to the other 'bank' of voices */
- tms->shift ^= 6;
+ tms->shift ^= 6;
/* restart one 'bank' of voices */
RESTART(0) RESTART(1) RESTART(2)
RESTART(3) RESTART(4) RESTART(5)
@@ -395,14 +395,14 @@ static STREAM_UPDATE( tms36xx_sound_update )
TONE( 0) TONE( 1) TONE( 2) TONE( 3) TONE( 4) TONE( 5)
TONE( 6) TONE( 7) TONE( 8) TONE( 9) TONE(10) TONE(11)
- *buffer++ = sum / tms->voices;
+ *buffer++ = sum / tms->voices;
}
}
static void tms36xx_reset_counters(tms_state *tms)
{
- tms->tune_counter = 0;
- tms->note_counter = 0;
+ tms->tune_counter = 0;
+ tms->note_counter = 0;
memset(tms->vol_counter, 0, sizeof(tms->vol_counter));
memset(tms->counter, 0, sizeof(tms->counter));
}
@@ -411,19 +411,19 @@ void mm6221aa_tune_w(device_t *device, int tune)
{
tms_state *tms = get_safe_token(device);
- /* which tune? */
- tune &= 3;
- if( tune == tms->tune_num )
- return;
+ /* which tune? */
+ tune &= 3;
+ if( tune == tms->tune_num )
+ return;
LOG(("%s tune:%X\n", tms->subtype, tune));
- /* update the stream before changing the tune */
- tms->channel->update();
+ /* update the stream before changing the tune */
+ tms->channel->update();
- tms->tune_num = tune;
- tms->tune_ofs = 0;
- tms->tune_max = 96; /* fixed for now */
+ tms->tune_num = tune;
+ tms->tune_ofs = 0;
+ tms->tune_max = 96; /* fixed for now */
}
void tms36xx_note_w(device_t *device, int octave, int note)
@@ -434,17 +434,17 @@ void tms36xx_note_w(device_t *device, int octave, int note)
note &= 15;
if (note > 12)
- return;
+ return;
LOG(("%s octave:%X note:%X\n", tms->subtype, octave, note));
/* update the stream before changing the tune */
- tms->channel->update();
+ tms->channel->update();
/* play a single note from 'tune 4', a list of the 13 tones */
tms36xx_reset_counters(tms);
tms->octave = octave;
- tms->tune_num = 4;
+ tms->tune_num = 4;
tms->tune_ofs = note;
tms->tune_max = note + 1;
}
@@ -454,19 +454,19 @@ static void tms3617_enable(tms_state *tms, int enable)
int i, bits = 0;
/* duplicate the 6 voice enable bits */
- enable = (enable & 0x3f) | ((enable & 0x3f) << 6);
+ enable = (enable & 0x3f) | ((enable & 0x3f) << 6);
if (enable == tms->enable)
return;
- /* update the stream before changing the tune */
- tms->channel->update();
+ /* update the stream before changing the tune */
+ tms->channel->update();
LOG(("%s enable voices", tms->subtype));
- for (i = 0; i < 6; i++)
+ for (i = 0; i < 6; i++)
{
if (enable & (1 << i))
{
- bits += 2; /* each voice has two instances */
+ bits += 2; /* each voice has two instances */
switch (i)
{
@@ -477,11 +477,11 @@ static void tms3617_enable(tms_state *tms, int enable)
case 4: LOG((" 2 2/3'")); break;
case 5: LOG((" 2'")); break;
}
- }
- }
+ }
+ }
/* set the enable mask and number of active voices */
tms->enable = enable;
- tms->voices = bits;
+ tms->voices = bits;
LOG(("%s\n", bits ? "" : " none"));
}
@@ -499,11 +499,11 @@ static DEVICE_START( tms36xx )
tms->intf = (const tms36xx_interface *)device->static_config();
- tms->channel = device->machine().sound().stream_alloc(*device, 0, 1, device->clock() * 64, tms, tms36xx_sound_update);
+ tms->channel = device->machine().sound().stream_alloc(*device, 0, 1, device->clock() * 64, tms, tms36xx_sound_update);
tms->samplerate = device->clock() * 64;
tms->basefreq = device->clock();
enable = 0;
- for (j = 0; j < 6; j++)
+ for (j = 0; j < 6; j++)
{
if( tms->intf->decay[j] > 0 )
{
@@ -514,12 +514,12 @@ static DEVICE_START( tms36xx )
tms->speed = (tms->intf->speed > 0) ? VMAX / tms->intf->speed : VMAX;
tms3617_enable(tms,enable);
- LOG(("TMS36xx samplerate %d\n", tms->samplerate));
+ LOG(("TMS36xx samplerate %d\n", tms->samplerate));
LOG(("TMS36xx basefreq %d\n", tms->basefreq));
LOG(("TMS36xx decay %d,%d,%d,%d,%d,%d\n",
tms->decay[0], tms->decay[1], tms->decay[2],
tms->decay[3], tms->decay[4], tms->decay[5]));
- LOG(("TMS36xx speed %d\n", tms->speed));
+ LOG(("TMS36xx speed %d\n", tms->speed));
}
@@ -527,7 +527,7 @@ const device_type TMS36XX = &device_creator<tms36xx_device>;
tms36xx_device::tms36xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TMS36XX, "TMS36XX", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tms_state);
}
@@ -560,5 +560,3 @@ void tms36xx_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/tms36xx.h b/src/emu/sound/tms36xx.h
index bc618217e77..b5a05559de2 100644
--- a/src/emu/sound/tms36xx.h
+++ b/src/emu/sound/tms36xx.h
@@ -7,15 +7,15 @@
/* subtypes */
#define MM6221AA 21 /* Phoenix (fixed melodies) */
-#define TMS3615 15 /* Naughty Boy, Pleiads (13 notes, one output) */
-#define TMS3617 17 /* Monster Bash (13 notes, six outputs) */
+#define TMS3615 15 /* Naughty Boy, Pleiads (13 notes, one output) */
+#define TMS3617 17 /* Monster Bash (13 notes, six outputs) */
/* The interface structure */
struct tms36xx_interface
{
int subtype;
- double decay[6]; /* decay times for the six harmonic notes */
- double speed; /* tune speed (meaningful for the TMS3615 only) */
+ double decay[6]; /* decay times for the six harmonic notes */
+ double speed; /* tune speed (meaningful for the TMS3615 only) */
};
/* MM6221AA interface functions */
@@ -28,7 +28,7 @@ extern void tms36xx_note_w(device_t *device, int octave, int note);
extern void tms3617_enable_w(device_t *device, int enable);
class tms36xx_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
tms36xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/tms5110.c b/src/emu/sound/tms5110.c
index f25d1125618..01be92167ff 100644
--- a/src/emu/sound/tms5110.c
+++ b/src/emu/sound/tms5110.c
@@ -63,31 +63,31 @@
#include "emu.h"
#include "tms5110.h"
-#define MAX_SAMPLE_CHUNK 512
-#define FIFO_SIZE 64 // TODO: technically the tms51xx chips don't have a fifo at all
+#define MAX_SAMPLE_CHUNK 512
+#define FIFO_SIZE 64 // TODO: technically the tms51xx chips don't have a fifo at all
/* Variants */
-#define TMS5110_IS_5110A (1)
-#define TMS5110_IS_5100 (2)
-#define TMS5110_IS_5110 (3)
+#define TMS5110_IS_5110A (1)
+#define TMS5110_IS_5100 (2)
+#define TMS5110_IS_5110 (3)
-#define TMS5110_IS_CD2801 TMS5110_IS_5100
-#define TMS5110_IS_TMC0281 TMS5110_IS_5100
+#define TMS5110_IS_CD2801 TMS5110_IS_5100
+#define TMS5110_IS_TMC0281 TMS5110_IS_5100
-#define TMS5110_IS_CD2802 TMS5110_IS_5110
-#define TMS5110_IS_M58817 TMS5110_IS_5110
+#define TMS5110_IS_CD2802 TMS5110_IS_5110
+#define TMS5110_IS_M58817 TMS5110_IS_5110
/* States for CTL */
-#define CTL_STATE_INPUT (0)
-#define CTL_STATE_OUTPUT (1)
-#define CTL_STATE_NEXT_OUTPUT (2)
+#define CTL_STATE_INPUT (0)
+#define CTL_STATE_OUTPUT (1)
+#define CTL_STATE_NEXT_OUTPUT (2)
struct tms5110_state
{
/* coefficient tables */
- int variant; /* Variant of the 5110 - see tms5110.h */
+ int variant; /* Variant of the 5110 - see tms5110.h */
/* coefficient tables */
const struct tms5100_coeffs *coeff;
@@ -116,11 +116,11 @@ struct tms5110_state
void (*set_load_address)(device_t *, int);
/* callbacks */
- devcb_resolved_write_line m0_func; /* the M0 line */
- devcb_resolved_write_line m1_func; /* the M1 line */
- devcb_resolved_write8 addr_func; /* Write to ADD1,2,4,8 - 4 address bits */
- devcb_resolved_read_line data_func; /* Read one bit from ADD8/Data - voice data */
- devcb_resolved_write_line romclk_func; /* rom clock - Only used to drive the data lines */
+ devcb_resolved_write_line m0_func; /* the M0 line */
+ devcb_resolved_write_line m1_func; /* the M1 line */
+ devcb_resolved_write8 addr_func; /* Write to ADD1,2,4,8 - 4 address bits */
+ devcb_resolved_read_line data_func; /* Read one bit from ADD8/Data - voice data */
+ devcb_resolved_write_line romclk_func; /* rom clock - Only used to drive the data lines */
device_t *device;
@@ -150,7 +150,7 @@ struct tms5110_state
INT32 x[11];
- INT32 RNG; /* the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13 */
+ INT32 RNG; /* the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13 */
const tms5110_interface *intf;
const UINT8 *table;
@@ -178,8 +178,8 @@ struct tmsprom_state
const UINT8 *rom;
const UINT8 *prom;
- devcb_resolved_write_line pdc_func; /* tms pdc func */
- devcb_resolved_write8 ctl_func; /* tms ctl func */
+ devcb_resolved_write_line pdc_func; /* tms pdc func */
+ devcb_resolved_write8 ctl_func; /* tms ctl func */
device_t *device;
emu_timer *romclk_timer;
@@ -196,12 +196,12 @@ INLINE tms5110_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TMS5110 ||
- device->type() == TMS5100 ||
- device->type() == TMS5110A ||
- device->type() == CD2801 ||
- device->type() == TMC0281 ||
- device->type() == CD2802 ||
- device->type() == M58817);
+ device->type() == TMS5100 ||
+ device->type() == TMS5110A ||
+ device->type() == CD2801 ||
+ device->type() == TMC0281 ||
+ device->type() == CD2802 ||
+ device->type() == M58817);
return (tms5110_state *)downcast<tms5110_device *>(device)->token();
}
@@ -221,7 +221,7 @@ static STREAM_UPDATE( tms5110_update );
static TIMER_CALLBACK( romclk_hack_timer_cb );
-#define DEBUG_5110 0
+#define DEBUG_5110 0
void tms5110_set_variant(tms5110_state *tms, int variant)
{
@@ -430,12 +430,12 @@ void tms5110_process(tms5110_state *tms, INT16 *buffer, unsigned int size)
/* a "dummy read" is mentioned in the tms5200 datasheet */
/* The Bagman speech roms data are organized in such a way that
- ** the bit at address 0 is NOT a speech data. The bit at address 1
- ** is the speech data. It seems that the tms5110 performs a dummy read
- ** just before it executes a SPEAK command.
- ** This has been moved to command logic ...
- ** perform_dummy_read(tms);
- */
+ ** the bit at address 0 is NOT a speech data. The bit at address 1
+ ** is the speech data. It seems that the tms5110 performs a dummy read
+ ** just before it executes a SPEAK command.
+ ** This has been moved to command logic ...
+ ** perform_dummy_read(tms);
+ */
/* clear out the new frame parameters (it will become old frame just before the first call to parse_frame() ) */
tms->new_energy = 0;
@@ -498,9 +498,9 @@ void tms5110_process(tms5110_state *tms, INT16 *buffer, unsigned int size)
else if ((tms->old_energy == 0) && (tms->new_energy != 0)) /* was the old frame a zero-energy frame? */
{
/* if so, and if the new frame is non-zero energy frame then the new parameters
- should become our current and target parameters immediately,
- i.e. we should NOT interpolate them slowly in.
- */
+ should become our current and target parameters immediately,
+ i.e. we should NOT interpolate them slowly in.
+ */
/*logerror("processing non-zero energy frame after zero-energy frame\n");*/
tms->target_energy = tms->new_energy;
@@ -508,22 +508,22 @@ void tms5110_process(tms5110_state *tms, INT16 *buffer, unsigned int size)
for (i = 0; i < tms->coeff->num_k; i++)
tms->target_k[i] = tms->current_k[i] = tms->new_k[i];
}
- else if ((tms->old_pitch == 0) && (tms->new_pitch != 0)) /* is this a change from unvoiced to voiced frame ? */
+ else if ((tms->old_pitch == 0) && (tms->new_pitch != 0)) /* is this a change from unvoiced to voiced frame ? */
{
/* if so, then the new parameters should become our current and target parameters immediately,
- i.e. we should NOT interpolate them slowly in.
- */
+ i.e. we should NOT interpolate them slowly in.
+ */
/*if (DEBUG_5110) logerror("processing frame: UNVOICED->VOICED frame change\n");*/
tms->target_energy = tms->new_energy;
tms->target_pitch = tms->current_pitch = tms->new_pitch;
for (i = 0; i < tms->coeff->num_k; i++)
tms->target_k[i] = tms->current_k[i] = tms->new_k[i];
}
- else if ((tms->old_pitch != 0) && (tms->new_pitch == 0)) /* is this a change from voiced to unvoiced frame ? */
+ else if ((tms->old_pitch != 0) && (tms->new_pitch == 0)) /* is this a change from voiced to unvoiced frame ? */
{
/* if so, then the new parameters should become our current and target parameters immediately,
- i.e. we should NOT interpolate them slowly in.
- */
+ i.e. we should NOT interpolate them slowly in.
+ */
/*if (DEBUG_5110) logerror("processing frame: VOICED->UNVOICED frame change\n");*/
tms->target_energy = tms->new_energy;
tms->target_pitch = tms->current_pitch = tms->new_pitch;
@@ -632,16 +632,16 @@ void tms5110_process(tms5110_state *tms, INT16 *buffer, unsigned int size)
}
else
{
- /* generate voiced samples here */
- /* US patent 4331836 Figure 14B shows, and logic would hold, that a pitch based chirp
- * function has a chirp/peak and then a long chain of zeroes.
- * The last entry of the chirp rom is at address 0b110011 (50d), the 51st sample,
- * and if the address reaches that point the ADDRESS incrementer is
- * disabled, forcing all samples beyond 50d to be == 50d
- * (address 50d holds zeroes)
- */
+ /* generate voiced samples here */
+ /* US patent 4331836 Figure 14B shows, and logic would hold, that a pitch based chirp
+ * function has a chirp/peak and then a long chain of zeroes.
+ * The last entry of the chirp rom is at address 0b110011 (50d), the 51st sample,
+ * and if the address reaches that point the ADDRESS incrementer is
+ * disabled, forcing all samples beyond 50d to be == 50d
+ * (address 50d holds zeroes)
+ */
- /*if (tms->coeff->subtype & (SUBTYPE_TMS5100 | SUBTYPE_M58817))*/
+ /*if (tms->coeff->subtype & (SUBTYPE_TMS5100 | SUBTYPE_M58817))*/
if (tms->pitch_count > 50)
current_val = tms->coeff->chirptable[50];
@@ -653,9 +653,9 @@ void tms5110_process(tms5110_state *tms, INT16 *buffer, unsigned int size)
for (i=0; i<20; i++)
{
bitout = ((tms->RNG>>12)&1) ^
- ((tms->RNG>>10)&1) ^
- ((tms->RNG>> 9)&1) ^
- ((tms->RNG>> 0)&1);
+ ((tms->RNG>>10)&1) ^
+ ((tms->RNG>> 9)&1) ^
+ ((tms->RNG>> 0)&1);
tms->RNG >>= 1;
tms->RNG |= (bitout<<12);
}
@@ -956,21 +956,21 @@ static void parse_frame(tms5110_state *tms)
#if 0
/*This is an example word TEN taken from the TMS5110A datasheet*/
static const unsigned int example_word_TEN[619]={
-/* 1*/1,0,0,0, 0, 0,0,0,0,0, 1,1,0,0,0, 0,0,0,1,0, 0,1,1,1, 0,1,0,1,
-/* 2*/1,0,0,0, 0, 0,0,0,0,0, 1,0,0,1,0, 0,0,1,1,0, 0,0,1,1, 0,1,0,1,
-/* 3*/1,1,0,0, 0, 1,0,0,0,0, 1,0,1,0,0, 0,1,0,1,0, 0,1,0,0, 1,0,1,0, 1,0,0,0, 1,0,0,1, 0,1,0,1, 0,0,1, 0,1,0, 0,1,1,
-/* 4*/1,1,1,0, 0, 0,1,1,1,1, 1,0,1,0,1, 0,1,1,1,0, 0,1,0,1, 0,1,1,1, 0,1,1,1, 1,0,1,1, 1,0,1,0, 0,1,1, 0,1,0, 0,1,1,
-/* 5*/1,1,1,0, 0, 1,0,0,0,0, 1,0,1,0,0, 0,1,1,1,0, 0,1,0,1, 1,0,1,0, 1,0,0,0, 1,1,0,0, 1,0,1,1, 1,0,0, 0,1,0, 0,1,1,
-/* 6*/1,1,1,0, 0, 1,0,0,0,1, 1,0,1,0,1, 0,1,1,0,1, 0,1,1,0, 0,1,1,1, 0,1,1,1, 1,0,1,0, 1,0,1,0, 1,1,0, 0,0,1, 1,0,0,
-/* 7*/1,1,1,0, 0, 1,0,0,1,0, 1,0,1,1,1, 0,1,1,1,0, 0,1,1,1, 0,1,1,1, 0,1,0,1, 0,1,1,0, 1,0,0,1, 1,1,0, 0,1,0, 0,1,1,
-/* 8*/1,1,1,0, 1, 1,0,1,0,1,
-/* 9*/1,1,1,0, 0, 1,1,0,0,1, 1,0,1,1,1, 0,1,0,1,1, 1,0,1,1, 0,1,1,1, 0,1,0,0, 1,0,0,0, 1,0,0,0, 1,1,0, 0,1,1, 0,1,1,
-/*10*/1,1,0,1, 0, 1,1,0,1,0, 1,0,1,0,1, 0,1,1,0,1, 1,0,1,1, 0,1,0,1, 0,1,0,0, 1,0,0,0, 1,0,1,0, 1,1,0, 0,1,0, 1,0,0,
-/*11*/1,0,1,1, 0, 1,1,0,1,1, 1,0,0,1,1, 1,0,0,1,0, 0,1,1,0, 0,0,1,1, 0,1,0,1, 1,0,0,1, 1,0,1,0, 1,0,0, 0,1,1, 0,1,1,
-/*12*/1,0,0,0, 0, 1,1,1,0,0, 1,0,0,1,1, 0,0,1,1,0, 0,1,0,0, 0,1,1,0, 1,1,0,0, 0,1,0,1, 1,0,0,0, 1,0,0, 0,1,0, 1,0,1,
-/*13*/0,1,1,1, 1, 1,1,1,0,1,
-/*14*/0,1,1,1, 0, 1,1,1,1,0, 1,0,0,1,1, 0,0,1,1,1, 0,1,0,1, 0,1,0,1, 1,1,0,0, 0,1,1,1, 1,0,0,0, 1,0,0, 0,1,0, 1,0,1,
-/*15*/0,1,1,0, 0, 1,1,1,1,0, 1,0,1,0,1, 0,0,1,1,0, 0,1,0,0, 0,0,1,1, 1,1,0,0, 1,0,0,1, 0,1,1,1, 1,0,1, 0,1,0, 1,0,1,
+/* 1*/1,0,0,0, 0, 0,0,0,0,0, 1,1,0,0,0, 0,0,0,1,0, 0,1,1,1, 0,1,0,1,
+/* 2*/1,0,0,0, 0, 0,0,0,0,0, 1,0,0,1,0, 0,0,1,1,0, 0,0,1,1, 0,1,0,1,
+/* 3*/1,1,0,0, 0, 1,0,0,0,0, 1,0,1,0,0, 0,1,0,1,0, 0,1,0,0, 1,0,1,0, 1,0,0,0, 1,0,0,1, 0,1,0,1, 0,0,1, 0,1,0, 0,1,1,
+/* 4*/1,1,1,0, 0, 0,1,1,1,1, 1,0,1,0,1, 0,1,1,1,0, 0,1,0,1, 0,1,1,1, 0,1,1,1, 1,0,1,1, 1,0,1,0, 0,1,1, 0,1,0, 0,1,1,
+/* 5*/1,1,1,0, 0, 1,0,0,0,0, 1,0,1,0,0, 0,1,1,1,0, 0,1,0,1, 1,0,1,0, 1,0,0,0, 1,1,0,0, 1,0,1,1, 1,0,0, 0,1,0, 0,1,1,
+/* 6*/1,1,1,0, 0, 1,0,0,0,1, 1,0,1,0,1, 0,1,1,0,1, 0,1,1,0, 0,1,1,1, 0,1,1,1, 1,0,1,0, 1,0,1,0, 1,1,0, 0,0,1, 1,0,0,
+/* 7*/1,1,1,0, 0, 1,0,0,1,0, 1,0,1,1,1, 0,1,1,1,0, 0,1,1,1, 0,1,1,1, 0,1,0,1, 0,1,1,0, 1,0,0,1, 1,1,0, 0,1,0, 0,1,1,
+/* 8*/1,1,1,0, 1, 1,0,1,0,1,
+/* 9*/1,1,1,0, 0, 1,1,0,0,1, 1,0,1,1,1, 0,1,0,1,1, 1,0,1,1, 0,1,1,1, 0,1,0,0, 1,0,0,0, 1,0,0,0, 1,1,0, 0,1,1, 0,1,1,
+/*10*/1,1,0,1, 0, 1,1,0,1,0, 1,0,1,0,1, 0,1,1,0,1, 1,0,1,1, 0,1,0,1, 0,1,0,0, 1,0,0,0, 1,0,1,0, 1,1,0, 0,1,0, 1,0,0,
+/*11*/1,0,1,1, 0, 1,1,0,1,1, 1,0,0,1,1, 1,0,0,1,0, 0,1,1,0, 0,0,1,1, 0,1,0,1, 1,0,0,1, 1,0,1,0, 1,0,0, 0,1,1, 0,1,1,
+/*12*/1,0,0,0, 0, 1,1,1,0,0, 1,0,0,1,1, 0,0,1,1,0, 0,1,0,0, 0,1,1,0, 1,1,0,0, 0,1,0,1, 1,0,0,0, 1,0,0, 0,1,0, 1,0,1,
+/*13*/0,1,1,1, 1, 1,1,1,0,1,
+/*14*/0,1,1,1, 0, 1,1,1,1,0, 1,0,0,1,1, 0,0,1,1,1, 0,1,0,1, 0,1,0,1, 1,1,0,0, 0,1,1,1, 1,0,0,0, 1,0,0, 0,1,0, 1,0,1,
+/*15*/0,1,1,0, 0, 1,1,1,1,0, 1,0,1,0,1, 0,0,1,1,0, 0,1,0,0, 0,0,1,1, 1,1,0,0, 1,0,0,1, 0,1,1,1, 1,0,1, 0,1,0, 1,0,1,
/*16*/1,1,1,1
};
#endif
@@ -1036,13 +1036,13 @@ static DEVICE_START( tms5110 )
#if 0
assert_always(tms->intf->M0_callback != NULL, "Missing _mandatory_ 'M0_callback' function pointer in the TMS5110 interface\n This function is used by TMS5110 to call for a single bits\n needed to generate the speech\n Aborting startup...\n");
#endif
- tms->M0_callback = tms->intf->M0_callback;
- tms->set_load_address = tms->intf->load_address;
+ tms->M0_callback = tms->intf->M0_callback;
+ tms->set_load_address = tms->intf->load_address;
}
else
{
- tms->M0_callback = speech_rom_read_bit;
- tms->set_load_address = speech_rom_set_addr;
+ tms->M0_callback = speech_rom_read_bit;
+ tms->set_load_address = speech_rom_set_addr;
}
tms->state = CTL_STATE_INPUT; /* most probably not defined */
@@ -1129,8 +1129,8 @@ static DEVICE_RESET( tms5110 )
else
{
/* no dummy read! This makes bagman and ad2083 speech fail
- * with the new cycle and transition exact interfaces
- */
+ * with the new cycle and transition exact interfaces
+ */
tms->schedule_dummy_read = FALSE;
}
tms->addr_bit = 0;
@@ -1149,8 +1149,8 @@ WRITE8_DEVICE_HANDLER( tms5110_ctl_w )
{
tms5110_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
+ /* bring up to date first */
+ tms->stream->update();
tms->CTL_pins = data & 0xf;
}
@@ -1165,9 +1165,9 @@ WRITE_LINE_DEVICE_HANDLER( tms5110_pdc_w )
{
tms5110_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
- tms5110_PDC_set(tms, state);
+ /* bring up to date first */
+ tms->stream->update();
+ tms5110_PDC_set(tms, state);
}
@@ -1191,27 +1191,27 @@ READ8_DEVICE_HANDLER( tms5110_ctl_r )
{
tms5110_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
- if (tms->state == CTL_STATE_OUTPUT)
- {
+ /* bring up to date first */
+ tms->stream->update();
+ if (tms->state == CTL_STATE_OUTPUT)
+ {
//if (DEBUG_5110) logerror("Status read (status=%2d)\n", tms->talk_status);
- return (tms->talk_status << 0); /*CTL1 = still talking ? */
- }
- else
- {
+ return (tms->talk_status << 0); /*CTL1 = still talking ? */
+ }
+ else
+ {
//if (DEBUG_5110) logerror("Status read (not in output mode)\n");
- return (0);
- }
+ return (0);
+ }
}
READ8_DEVICE_HANDLER( m58817_status_r )
{
tms5110_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
- return (tms->talk_status << 0); /*CTL1 = still talking ? */
+ /* bring up to date first */
+ tms->stream->update();
+ return (tms->talk_status << 0); /*CTL1 = still talking ? */
}
/******************************************************************************
@@ -1230,16 +1230,16 @@ READ8_DEVICE_HANDLER( tms5110_romclk_hack_r )
{
tms5110_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
+ /* bring up to date first */
+ tms->stream->update();
- /* create and start timer if necessary */
- if (!tms->romclk_hack_timer_started)
- {
- tms->romclk_hack_timer_started = TRUE;
+ /* create and start timer if necessary */
+ if (!tms->romclk_hack_timer_started)
+ {
+ tms->romclk_hack_timer_started = TRUE;
tms->romclk_hack_timer->adjust(attotime::from_hz(device->clock() / 40), 0, attotime::from_hz(device->clock() / 40));
}
- return tms->romclk_hack_state;
+ return tms->romclk_hack_state;
}
@@ -1254,9 +1254,9 @@ int tms5110_ready_r(device_t *device)
{
tms5110_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
- return (tms->fifo_count < FIFO_SIZE-1);
+ /* bring up to date first */
+ tms->stream->update();
+ return (tms->fifo_count < FIFO_SIZE-1);
}
@@ -1374,13 +1374,13 @@ static TIMER_CALLBACK( tmsprom_step )
tmsprom_state *tms = get_safe_token_prom(device);
/* only 16 bytes needed ... The original dump is bad. This
- * is what is needed to get speech to work. The prom data has
- * been updated and marked as BAD_DUMP. The information below
- * is given for reference once another dump should surface.
- *
- * static const int prom[16] = {0x00, 0x00, 0x02, 0x00, 0x00, 0x02, 0x00, 0x00,
- * 0x02, 0x00, 0x40, 0x00, 0x04, 0x06, 0x04, 0x84 };
- */
+ * is what is needed to get speech to work. The prom data has
+ * been updated and marked as BAD_DUMP. The information below
+ * is given for reference once another dump should surface.
+ *
+ * static const int prom[16] = {0x00, 0x00, 0x02, 0x00, 0x00, 0x02, 0x00, 0x00,
+ * 0x02, 0x00, 0x40, 0x00, 0x04, 0x06, 0x04, 0x84 };
+ */
UINT16 ctrl;
update_prom_cnt(tms);
@@ -1477,14 +1477,14 @@ WRITE_LINE_DEVICE_HANDLER( tmsprom_enable_w )
update_prom_cnt(tms);
/* the following is needed for ad2084.
- * It is difficult to derive the actual connections from
- * pcb pictures but the reset pin of the LS393 driving
- * the prom address line is connected somewhere.
- *
- * This does not affect bagman. It just simulates that a
- * write to ads3 is always happening when the four lower
- * counter bits are 0!
- */
+ * It is difficult to derive the actual connections from
+ * pcb pictures but the reset pin of the LS393 driving
+ * the prom address line is connected somewhere.
+ *
+ * This does not affect bagman. It just simulates that a
+ * write to ads3 is always happening when the four lower
+ * counter bits are 0!
+ */
if (state)
tms->prom_cnt &= 0x10;
}
@@ -1499,13 +1499,13 @@ const device_type TMS5110 = &device_creator<tms5110_device>;
tms5110_device::tms5110_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TMS5110, "TMS5110", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tms5110_state);
}
tms5110_device::tms5110_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tms5110_state);
}
@@ -1738,5 +1738,3 @@ void tmsprom_device::device_start()
{
DEVICE_START_NAME( tmsprom )(this);
}
-
-
diff --git a/src/emu/sound/tms5110.h b/src/emu/sound/tms5110.h
index 4bd3db7c34b..0540432d8c1 100644
--- a/src/emu/sound/tms5110.h
+++ b/src/emu/sound/tms5110.h
@@ -6,8 +6,8 @@
#include "devlegcy.h"
/* TMS5110 commands */
- /* CTL8 CTL4 CTL2 CTL1 | PDC's */
- /* (MSB) (LSB) | required */
+ /* CTL8 CTL4 CTL2 CTL1 | PDC's */
+ /* (MSB) (LSB) | required */
#define TMS5110_CMD_RESET (0) /* 0 0 0 x | 1 */
#define TMS5110_CMD_LOAD_ADDRESS (2) /* 0 0 1 x | 2 */
#define TMS5110_CMD_OUTPUT (4) /* 0 1 0 x | 3 */
@@ -24,18 +24,18 @@
struct tms5110_interface
{
/* legacy interface */
- int (*M0_callback)(device_t *device); /* function to be called when chip requests another bit */
- void (*load_address)(device_t *device, int addr); /* speech ROM load address callback */
+ int (*M0_callback)(device_t *device); /* function to be called when chip requests another bit */
+ void (*load_address)(device_t *device, int addr); /* speech ROM load address callback */
/* new rom controller interface */
- devcb_write_line m0_func; /* the M0 line */
- devcb_write_line m1_func; /* the M1 line */
- devcb_write8 addr_func; /* Write to ADD1,2,4,8 - 4 address bits */
- devcb_read_line data_func; /* Read one bit from ADD8/Data - voice data */
+ devcb_write_line m0_func; /* the M0 line */
+ devcb_write_line m1_func; /* the M1 line */
+ devcb_write8 addr_func; /* Write to ADD1,2,4,8 - 4 address bits */
+ devcb_read_line data_func; /* Read one bit from ADD8/Data - voice data */
/* on a real chip rom_clk is running all the time
- * Here, we only use it to properly emulate the protocol.
- * Do not rely on it to be a timed signal.
- */
- devcb_write_line romclk_func; /* rom clock - Only used to drive the data lines */
+ * Here, we only use it to properly emulate the protocol.
+ * Do not rely on it to be a timed signal.
+ */
+ devcb_write_line romclk_func; /* rom clock - Only used to drive the data lines */
};
DECLARE_WRITE8_DEVICE_HANDLER( tms5110_ctl_w );
@@ -56,7 +56,7 @@ int tms5110_ready_r(device_t *device);
void tms5110_set_frequency(device_t *device, int frequency);
class tms5110_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
tms5110_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -170,18 +170,18 @@ extern const device_type M58817;
struct tmsprom_interface
{
- const char *prom_region; /* prom memory region - sound region is automatically assigned */
- UINT32 rom_size; /* individual rom_size */
- UINT8 pdc_bit; /* bit # of pdc line */
+ const char *prom_region; /* prom memory region - sound region is automatically assigned */
+ UINT32 rom_size; /* individual rom_size */
+ UINT8 pdc_bit; /* bit # of pdc line */
/* virtual bit 8: constant 0, virtual bit 9:constant 1 */
- UINT8 ctl1_bit; /* bit # of ctl1 line */
- UINT8 ctl2_bit; /* bit # of ctl2 line */
- UINT8 ctl4_bit; /* bit # of ctl4 line */
- UINT8 ctl8_bit; /* bit # of ctl8 line */
- UINT8 reset_bit; /* bit # of rom reset */
- UINT8 stop_bit; /* bit # of stop */
- devcb_write_line pdc_func; /* tms pdc func */
- devcb_write8 ctl_func; /* tms ctl func */
+ UINT8 ctl1_bit; /* bit # of ctl1 line */
+ UINT8 ctl2_bit; /* bit # of ctl2 line */
+ UINT8 ctl4_bit; /* bit # of ctl4 line */
+ UINT8 ctl8_bit; /* bit # of ctl8 line */
+ UINT8 reset_bit; /* bit # of rom reset */
+ UINT8 stop_bit; /* bit # of stop */
+ devcb_write_line pdc_func; /* tms pdc func */
+ devcb_write8 ctl_func; /* tms ctl func */
};
WRITE_LINE_DEVICE_HANDLER( tmsprom_m0_w );
diff --git a/src/emu/sound/tms5110r.c b/src/emu/sound/tms5110r.c
index 8cc920c168d..9e9f6d00f87 100644
--- a/src/emu/sound/tms5110r.c
+++ b/src/emu/sound/tms5110r.c
@@ -32,41 +32,41 @@
* { 0, 3, 3, 3, 2, 2, 1, 1 }
*/
- /* quick note on derivative analysis:
- Judging by all the TI chips I (Lord Nightmare) have done this test on, the first derivative between successive values of the LPC tables should follow a roughly triangular or sine shaped curve, the second derivative should start at a value, increase slightly, then decrease smoothly and become negative right around where the LPC curve passes 0, finally increase slightly right near the end. If it doesn't do this, there is probably a wrong value in there somewhere. The pitch and energy tables follow similar patterns but aren't the same since they never cross 0. The chirp table doesn't follow this pattern at all.
- */
+ /* quick note on derivative analysis:
+ Judging by all the TI chips I (Lord Nightmare) have done this test on, the first derivative between successive values of the LPC tables should follow a roughly triangular or sine shaped curve, the second derivative should start at a value, increase slightly, then decrease smoothly and become negative right around where the LPC curve passes 0, finally increase slightly right near the end. If it doesn't do this, there is probably a wrong value in there somewhere. The pitch and energy tables follow similar patterns but aren't the same since they never cross 0. The chirp table doesn't follow this pattern at all.
+ */
/* chip type defines */
-#define SUBTYPE_TMS5100 1
-#define SUBTYPE_M58817 2
-#define SUBTYPE_TMS5110 4
-#define SUBTYPE_TMS5200 8
-#define SUBTYPE_TMS5220 16
-#define SUBTYPE_TMS5220C 32
-#define SUBTYPE_PAT4335277 64
-#define SUBTYPE_VLM5030 128
+#define SUBTYPE_TMS5100 1
+#define SUBTYPE_M58817 2
+#define SUBTYPE_TMS5110 4
+#define SUBTYPE_TMS5200 8
+#define SUBTYPE_TMS5220 16
+#define SUBTYPE_TMS5220C 32
+#define SUBTYPE_PAT4335277 64
+#define SUBTYPE_VLM5030 128
/* coefficient defines */
-#define MAX_K 10
-#define MAX_SCALE_BITS 6
-#define MAX_SCALE (1<<MAX_SCALE_BITS)
-#define COEFF_ENERGY_SENTINEL (511)
-#define MAX_CHIRP_SIZE 52
+#define MAX_K 10
+#define MAX_SCALE_BITS 6
+#define MAX_SCALE (1<<MAX_SCALE_BITS)
+#define COEFF_ENERGY_SENTINEL (511)
+#define MAX_CHIRP_SIZE 52
struct tms5100_coeffs
{
- int subtype;
- int num_k;
- int energy_bits;
- int pitch_bits;
- int kbits[MAX_K];
- unsigned short energytable[MAX_SCALE];
- unsigned short pitchtable[MAX_SCALE];
- int ktable[MAX_K][MAX_SCALE];
- INT16 chirptable[MAX_CHIRP_SIZE];
- INT8 interp_coeff[8];
+ int subtype;
+ int num_k;
+ int energy_bits;
+ int pitch_bits;
+ int kbits[MAX_K];
+ unsigned short energytable[MAX_SCALE];
+ unsigned short pitchtable[MAX_SCALE];
+ int ktable[MAX_K][MAX_SCALE];
+ INT16 chirptable[MAX_CHIRP_SIZE];
+ INT8 interp_coeff[8];
};
- /* The following TMS5100/TMC0280/CD2801 coefficients come from US Patent 4,209,836 and several others, and have been verified using derivative analysis to show which values were bad (due to poor quality images or badly typed copies of the tables in the patents, depending on which patent you look at) which were then corrected by figuring out what the tiny remaining marks on the photocopied version of the coefficient sheet COULD have been which would make the derivatives play nice.
+ /* The following TMS5100/TMC0280/CD2801 coefficients come from US Patent 4,209,836 and several others, and have been verified using derivative analysis to show which values were bad (due to poor quality images or badly typed copies of the tables in the patents, depending on which patent you look at) which were then corrected by figuring out what the tiny remaining marks on the photocopied version of the coefficient sheet COULD have been which would make the derivatives play nice.
***These values have not yet been verified against a real TMS5100 or TMC0280 or CD2801 (from speak & spell, etc)***
*/
static const struct tms5100_coeffs pat4209836_coeff =
@@ -81,35 +81,35 @@ static const struct tms5100_coeffs pat4209836_coeff =
{ 0, 0, 1, 1, 2, 3, 5, 7, 10, 15, 21, 30, 43, 61, 86, 511 }, /* last value is actually 0 in ROM, but 511 is stop sentinel */
/* P note: value #20 may be 95; value #29 may be 140 */
{ 0, 41, 43, 45, 47, 49, 51, 53,
- 55, 58, 60, 63, 66, 70, 73, 76,
- 79, 83, 87, 90, 94, 99, 103, 107,
- 112, 118, 123, 129, 134, 141, 147, 153 },
+ 55, 58, 60, 63, 66, 70, 73, 76,
+ 79, 83, 87, 90, 94, 99, 103, 107,
+ 112, 118, 123, 129, 134, 141, 147, 153 },
{
/* K1 */
{ -501, -497, -493, -488, -480, -471, -460, -446,
- -427, -405, -378, -344, -305, -259, -206, -148,
- -86, -21, 45, 110, 171, 227, 277, 320,
- 357, 388, 413, 434, 451, 464, 474, 482 },
+ -427, -405, -378, -344, -305, -259, -206, -148,
+ -86, -21, 45, 110, 171, 227, 277, 320,
+ 357, 388, 413, 434, 451, 464, 474, 482 },
/* K2 */
{ -349, -328, -305, -280, -252, -223, -192, -158,
- -124, -88, -51, -14, 23, 60, 97, 133,
- 167, 199, 230, 259, 286, 310, 333, 354,
- 372, 389, 404, 417, 429, 439, 449, 490 },
+ -124, -88, -51, -14, 23, 60, 97, 133,
+ 167, 199, 230, 259, 286, 310, 333, 354,
+ 372, 389, 404, 417, 429, 439, 449, 490 },
/* K3 */
{ -397, -365, -327, -282, -229, -170, -104, -36,
- 35, 104, 169, 228, 281, 326, 364, 396 },
+ 35, 104, 169, 228, 281, 326, 364, 396 },
/* K4 */
{ -373, -334, -293, -245, -191, -131, -67, -1,
- 64, 128, 188, 243, 291, 332, 367, 397 },
+ 64, 128, 188, 243, 291, 332, 367, 397 },
/* K5 */
{ -319, -286, -250, -211, -168, -122, -74, -25,
- 24, 73, 121, 167, 210, 249, 285, 319 },
+ 24, 73, 121, 167, 210, 249, 285, 319 },
/* K6 */
{ -290, -252, -209, -163, -114, -62, -9, 44,
- 97, 147, 194, 239, 278, 313, 344, 371 },
+ 97, 147, 194, 239, 278, 313, 344, 371 },
/* K7 */
{ -291, -256, -216, -174, -128, -80, -31, 19,
- 69, 117, 163, 206, 246, 283, 316, 345 },
+ 69, 117, 163, 206, 246, 283, 316, 345 },
/* K8 */
{ -219, -133, -38, 59, 152, 235, 305, 361 },
/* K9 */
@@ -119,12 +119,12 @@ static const struct tms5100_coeffs pat4209836_coeff =
},
/* Chirp table */
{ 0, 42, -44, 50, -78, 18, 37, 20,
- 2, -31, -59, 2, 95, 90, 5, 15,
- 38, -4, -91,-91, -42,-35,-36, -4,
- 37, 43, 34, 33, 15, -1, -8,-18,
- -19,-17, -9,-10, -6, 0, 3, 2,
- 1, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 2, -31, -59, 2, 95, 90, 5, 15,
+ 38, -4, -91,-91, -42,-35,-36, -4,
+ 37, 43, 34, 33, 15, -1, -8,-18,
+ -19,-17, -9,-10, -6, 0, 3, 2,
+ 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 3, 3, 3, 2, 2, 1, 1, 0 }
};
@@ -142,38 +142,38 @@ static const struct tms5100_coeffs pat4403965_coeff =
{ 5, 5, 4, 4, 4, 4, 4, 3, 3, 3 },
/* E */
{ 0, 1, 2, 3, 4, 6, 8, 11,
- 16, 23, 33, 47, 63, 85, 114, 511 },
+ 16, 23, 33, 47, 63, 85, 114, 511 },
/* P */
{ 0, 41, 43, 45, 47, 49, 51, 53,
- 55, 58, 60, 63, 66, 70, 73, 76,
- 79, 83, 87, 90, 94, 99, 103, 107,
+ 55, 58, 60, 63, 66, 70, 73, 76,
+ 79, 83, 87, 90, 94, 99, 103, 107,
112, 118, 123, 129, 134, 140, 147, 153 },
{
/* K1 */
{ -501, -498, -495, -490, -485, -478, -469, -459,
- -446, -431, -412, -389, -362, -331, -295, -253,
- -207, -156, -102, -45, 13, 70, 126, 179,
- 228, 272, 311, 345, 374, 399, 420, 437 },
+ -446, -431, -412, -389, -362, -331, -295, -253,
+ -207, -156, -102, -45, 13, 70, 126, 179,
+ 228, 272, 311, 345, 374, 399, 420, 437 },
/* K2 */
{ -376, -357, -335, -312, -286, -258, -227, -195,
- -161, -124, -87, -49, -10, 29, 68, 106,
- 143, 178, 212, 243, 272, 299, 324, 346,
- 366, 384, 400, 414, 427, 438, 448, 506 },
+ -161, -124, -87, -49, -10, 29, 68, 106,
+ 143, 178, 212, 243, 272, 299, 324, 346,
+ 366, 384, 400, 414, 427, 438, 448, 506 },
/* K3 */
{ -407, -381, -349, -311, -268, -218, -162, -102,
- -39, 25, 89, 149, 206, 257, 302, 341 },
+ -39, 25, 89, 149, 206, 257, 302, 341 },
/* K4 */
{ -290, -252, -209, -163, -114, -62, -9, 44,
- 97, 147, 194, 238, 278, 313, 344, 371 },
+ 97, 147, 194, 238, 278, 313, 344, 371 },
/* K5 */
{ -318, -283, -245, -202, -156, -107, -56, -3,
- 49, 101, 150, 196, 239, 278, 313, 344 },
+ 49, 101, 150, 196, 239, 278, 313, 344 },
/* K6 */
{ -193, -152, -109, -65, -20, 26, 71, 115,
- 158, 198, 235, 270, 301, 330, 355, 377 },
+ 158, 198, 235, 270, 301, 330, 355, 377 },
/* K7 */
{ -254, -218, -180, -140, -97, -53, -8, 36,
- 81, 124, 165, 204, 240, 274, 304, 332 },
+ 81, 124, 165, 204, 240, 274, 304, 332 },
/* K8 */
{ -205, -112, -10, 92, 187, 269, 336, 387 },
/* K9 */
@@ -183,12 +183,12 @@ static const struct tms5100_coeffs pat4403965_coeff =
},
/* Chirp table */
{ 0, 43, -44, 51,-77, 18, 37, 20,
- 2,-30, -58, 3, 96, 91, 5, 15,
- 38, -4, -90,-91,-42,-35,-35, -3,
- 37, 43, 35, 34, 15, -1, -8,-17,
- -19,-17, -9, -9, -6, 1, 4, 3,
- 1, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 2,-30, -58, 3, 96, 91, 5, 15,
+ 38, -4, -90,-91,-42,-35,-35, -3,
+ 37, 43, 35, 34, 15, -1, -8,-17,
+ -19,-17, -9, -9, -6, 1, 4, 3,
+ 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 3, 3, 3, 2, 2, 1, 1, 0 }
};
@@ -205,38 +205,38 @@ static const struct tms5100_coeffs tms5110a_coeff =
{ 5, 5, 4, 4, 4, 4, 4, 3, 3, 3 },
/* E */
{ 0, 1, 2, 3, 4, 6, 8, 11,
- 16, 23, 33, 47, 63, 85, 114, 511 },
+ 16, 23, 33, 47, 63, 85, 114, 511 },
/* P */
{ 0, 15, 16, 17, 19, 21, 22, 25,
- 26, 29, 32, 36, 40, 42, 46, 50,
- 55, 60, 64, 68, 72, 76, 80, 84,
- 86, 93, 101, 110, 120, 132, 144, 159 },
+ 26, 29, 32, 36, 40, 42, 46, 50,
+ 55, 60, 64, 68, 72, 76, 80, 84,
+ 86, 93, 101, 110, 120, 132, 144, 159 },
{
/* K1 */
{ -501, -498, -497, -495, -493, -491, -488, -482,
- -478, -474, -469, -464, -459, -452, -445, -437,
- -412, -380, -339, -288, -227, -158, -81, -1,
- 80, 157, 226, 287, 337, 379, 411, 436 },
+ -478, -474, -469, -464, -459, -452, -445, -437,
+ -412, -380, -339, -288, -227, -158, -81, -1,
+ 80, 157, 226, 287, 337, 379, 411, 436 },
/* K2 */
{ -328, -303, -274, -244, -211, -175, -138, -99,
- -59, -18, 24, 64, 105, 143, 180, 215,
- 248, 278, 306, 331, 354, 374, 392, 408,
- 422, 435, 445, 455, 463, 470, 476, 506 },
+ -59, -18, 24, 64, 105, 143, 180, 215,
+ 248, 278, 306, 331, 354, 374, 392, 408,
+ 422, 435, 445, 455, 463, 470, 476, 506 },
/* K3 */
{ -441, -387, -333, -279, -225, -171, -117, -63,
- -9, 45, 98, 152, 206, 260, 314, 368 },
+ -9, 45, 98, 152, 206, 260, 314, 368 },
/* K4 */
{ -328, -273, -217, -161, -106, -50, 5, 61,
- 116, 172, 228, 283, 339, 394, 450, 506 },
+ 116, 172, 228, 283, 339, 394, 450, 506 },
/* K5 */
{ -328, -282, -235, -189, -142, -96, -50, -3,
- 43, 90, 136, 182, 229, 275, 322, 368 },
+ 43, 90, 136, 182, 229, 275, 322, 368 },
/* K6 */
{ -256, -212, -168, -123, -79, -35, 10, 54,
- 98, 143, 187, 232, 276, 320, 365, 409 },
+ 98, 143, 187, 232, 276, 320, 365, 409 },
/* K7 */
{ -308, -260, -212, -164, -117, -69, -21, 27,
- 75, 122, 170, 218, 266, 314, 361, 409 },
+ 75, 122, 170, 218, 266, 314, 361, 409 },
/* K8 */
{ -256, -161, -66, 29, 124, 219, 314, 409 },
/* K9 */
@@ -246,12 +246,12 @@ static const struct tms5100_coeffs tms5110a_coeff =
},
/* Chirp table */
{ 0, 42, -44, 50, -78, 18, 37, 20,
- 2, -31, -59, 2, 95, 90, 5, 15,
- 38, -4, -91,-91, -42,-35,-36, -4,
- 37, 43, 34, 33, 15, -1, -8,-18,
- -19,-17, -9,-10, -6, 0, 3, 2,
- 1, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 2, -31, -59, 2, 95, 90, 5, 15,
+ 38, -4, -91,-91, -42,-35,-36, -4,
+ 37, 43, 34, 33, 15, -1, -8,-18,
+ -19,-17, -9,-10, -6, 0, 3, 2,
+ 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 3, 3, 3, 2, 2, 1, 1, 0 }
};
@@ -259,7 +259,7 @@ static const struct tms5100_coeffs tms5110a_coeff =
/* The following coefficients come from US Patent 4,335,277 and 4,581,757. However, the K10 row of coefficients are entirely missing from both of those patents.
The K values don't match the values read from an actual TMS5200 chip, but might match the CD2501 or some other undiscovered chip?
*/
- // k* is followed by d if done transcription, c if checked for derivative aberrations
+ // k* is followed by d if done transcription, c if checked for derivative aberrations
static const struct tms5100_coeffs pat4335277_coeff =
{
/* subtype */
@@ -270,42 +270,42 @@ static const struct tms5100_coeffs pat4335277_coeff =
{ 5, 5, 4, 4, 4, 4, 4, 3, 3, 3 },
/* Ed */
{ 0, 1, 2, 3, 4, 6, 8, 11,
- 16, 23, 33, 47, 63, 85, 114, 511 }, /* last value is actually 0 in ROM, but 511 is stop sentinel */
+ 16, 23, 33, 47, 63, 85, 114, 511 }, /* last value is actually 0 in ROM, but 511 is stop sentinel */
/* Pd */
{ 0, 14, 15, 16, 17, 18, 19, 20,
- 21, 22, 23, 24, 25, 26, 27, 28,
- 29, 30, 31, 32, 34, 36, 38, 40,
- 41, 43, 45, 48, 49, 51, 54, 55,
- 57, 60, 62, 64, 68, 72, 74, 76,
- 81, 85, 87, 90, 96, 99, 103, 107,
+ 21, 22, 23, 24, 25, 26, 27, 28,
+ 29, 30, 31, 32, 34, 36, 38, 40,
+ 41, 43, 45, 48, 49, 51, 54, 55,
+ 57, 60, 62, 64, 68, 72, 74, 76,
+ 81, 85, 87, 90, 96, 99, 103, 107,
112, 117, 122, 127, 133, 139, 145, 151,
157, 164, 171, 178, 186, 194, 202, 211 },
{
/* K1dc */
{ -507, -505, -503, -501, -497, -493, -488, -481,
- -473, -463, -450, -434, -414, -390, -362, -328,
- -288, -242, -191, -135, -75, -13, 49, 110,
- 168, 221, 269, 311, 348, 379, 404, 426 },
+ -473, -463, -450, -434, -414, -390, -362, -328,
+ -288, -242, -191, -135, -75, -13, 49, 110,
+ 168, 221, 269, 311, 348, 379, 404, 426 },
/* K2dc */
{ -294, -266, -235, -202, -167, -130, -92, -52,
- -12, 28, 68, 108, 145, 182, 216, 248,
- 278, 305, 330, 352, 372, 390, 406, 420,
- 432, 443, 453, 461, 468, 474, 479, 486 },
+ -12, 28, 68, 108, 145, 182, 216, 248,
+ 278, 305, 330, 352, 372, 390, 406, 420,
+ 432, 443, 453, 461, 468, 474, 479, 486 },
/* K3dc */
{ -449, -432, -411, -385, -354, -317, -273, -223,
- -167, -107, -43, 22, 87, 148, 206, 258 },
+ -167, -107, -43, 22, 87, 148, 206, 258 },
/* K4dc (first 4-5 values are probably wrong but close) */
{ -321, -270, -220, -157, -97, -40, 25, 89,
- 150, 207, 259, 304, 343, 376, 403, 425 },
+ 150, 207, 259, 304, 343, 376, 403, 425 },
/* K5dc */
{ -373, -347, -318, -284, -247, -206, -162, -115,
- -65, -15, 36, 86, 135, 181, 224, 263 },
+ -65, -15, 36, 86, 135, 181, 224, 263 },
/* K6dc */
{ -213, -176, -137, -96, -54, -11, 33, 75,
- 117, 157, 195, 231, 264, 294, 322, 347 },
+ 117, 157, 195, 231, 264, 294, 322, 347 },
/* K7dc */
{ -294, -264, -232, -198, -161, -122, -82, -41,
- 1, 43, 84, 125, 163, 200, 234, 266 },
+ 1, 43, 84, 125, 163, 200, 234, 266 },
/* K8dc */
{ -195, -117, -32, 54, 137, 213, 279, 335 },
/* K9dc */
@@ -315,12 +315,12 @@ static const struct tms5100_coeffs pat4335277_coeff =
},
/* Chirp table */
{ 0, 42, -44, 50, -78, 18, 37, 20,
- 2, -31, -59, 2, 95, 90, 5, 15,
- 38, -4, -91,-91, -42,-35,-36, -4,
- 37, 43, 34, 33, 15, -1, -8,-18,
- -19,-17, -9,-10, -6, 0, 3, 2,
- 1, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 2, -31, -59, 2, 95, 90, 5, 15,
+ 38, -4, -91,-91, -42,-35,-36, -4,
+ 37, 43, 34, 33, 15, -1, -8,-18,
+ -19,-17, -9,-10, -6, 0, 3, 2,
+ 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 3, 3, 3, 2, 2, 1, 1, 0 }
};
@@ -338,42 +338,42 @@ static const struct tms5100_coeffs tms5200_coeff =
{ 5, 5, 4, 4, 4, 4, 4, 3, 3, 3 },
/* E */
{ 0, 1, 2, 3, 4, 6, 8, 11,
- 16, 23, 33, 47, 63, 85, 114, 0 },
+ 16, 23, 33, 47, 63, 85, 114, 0 },
/* P */
{ 0, 14, 15, 16, 17, 18, 19, 20,
- 21, 22, 23, 24, 25, 26, 27, 28,
- 29, 30, 31, 32, 34, 36, 38, 40,
- 41, 43, 45, 48, 49, 51, 54, 55,
- 57, 60, 62, 64, 68, 72, 74, 76,
- 81, 85, 87, 90, 96, 99, 103, 107,
+ 21, 22, 23, 24, 25, 26, 27, 28,
+ 29, 30, 31, 32, 34, 36, 38, 40,
+ 41, 43, 45, 48, 49, 51, 54, 55,
+ 57, 60, 62, 64, 68, 72, 74, 76,
+ 81, 85, 87, 90, 96, 99, 103, 107,
112, 117, 122, 127, 133, 139, 145, 151,
157, 164, 171, 178, 186, 194, 202, 211 },
{
/* K1 */
{ -501, -498, -495, -490, -485, -478, -469, -459,
- -446, -431, -412, -389, -362, -331, -295, -253,
- -207, -156, -102, -45, 13, 70, 126, 179,
- 228, 272, 311, 345, 374, 399, 420, 437 },
+ -446, -431, -412, -389, -362, -331, -295, -253,
+ -207, -156, -102, -45, 13, 70, 126, 179,
+ 228, 272, 311, 345, 374, 399, 420, 437 },
/* K2 */
{ -376, -357, -335, -312, -286, -258, -227, -195,
- -161, -124, -87, -49, -10, 29, 68, 106,
- 143, 178, 212, 243, 272, 299, 324, 346,
- 366, 384, 400, 414, 427, 438, 448, 506 },
+ -161, -124, -87, -49, -10, 29, 68, 106,
+ 143, 178, 212, 243, 272, 299, 324, 346,
+ 366, 384, 400, 414, 427, 438, 448, 506 },
/* K3 */
{ -407, -381, -349, -311, -268, -218, -162, -102,
- -39, 25, 89, 149, 206, 257, 302, 341 },
+ -39, 25, 89, 149, 206, 257, 302, 341 },
/* K4 */
{ -290, -252, -209, -163, -114, -62, -9, 44,
- 97, 147, 194, 238, 278, 313, 344, 371 },
+ 97, 147, 194, 238, 278, 313, 344, 371 },
/* K5 */
{ -318, -283, -245, -202, -156, -107, -56, -3,
- 49, 101, 150, 196, 239, 278, 313, 344 },
+ 49, 101, 150, 196, 239, 278, 313, 344 },
/* K6 */
{ -193, -152, -109, -65, -20, 26, 71, 115,
- 158, 198, 235, 270, 301, 330, 355, 377 },
+ 158, 198, 235, 270, 301, 330, 355, 377 },
/* K7 */
{ -254, -218, -180, -140, -97, -53, -8, 36,
- 81, 124, 165, 204, 240, 274, 304, 332 },
+ 81, 124, 165, 204, 240, 274, 304, 332 },
/* K8 */
{ -205, -112, -10, 92, 187, 269, 336, 387 },
/* K9 */
@@ -383,20 +383,20 @@ static const struct tms5100_coeffs tms5200_coeff =
},
/* Chirp table */
/*
- { 0, 42, -44, 50, -78, 18, 37, 20,
- 2, -31, -59, 2, 95, 90, 5, 15,
- 38, -4, -91,-91, -42,-35,-36, -4,
- 37, 43, 34, 33, 15, -1, -8,-18,
- -19,-17, -9,-10, -6, 0, 3, 2,
- 1, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },*/
+ { 0, 42, -44, 50, -78, 18, 37, 20,
+ 2, -31, -59, 2, 95, 90, 5, 15,
+ 38, -4, -91,-91, -42,-35,-36, -4,
+ 37, 43, 34, 33, 15, -1, -8,-18,
+ -19,-17, -9,-10, -6, 0, 3, 2,
+ 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },*/
{ 0,127,127, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 0, 3, 3, 3, 2, 2, 1, 1 }
};
@@ -415,42 +415,42 @@ static const struct tms5100_coeffs tms5220_coeff =
{ 5, 5, 4, 4, 4, 4, 4, 3, 3, 3 },
/* E */
{ 0, 1, 2, 3, 4, 6, 8, 11,
- 16, 23, 33, 47, 63, 85, 114, 0 },
+ 16, 23, 33, 47, 63, 85, 114, 0 },
/* P */
{ 0, 15, 16, 17, 18, 19, 20, 21,
- 22, 23, 24, 25, 26, 27, 28, 29,
- 30, 31, 32, 33, 34, 35, 36, 37,
- 38, 39, 40, 41, 42, 44, 46, 48,
- 50, 52, 53, 56, 58, 60, 62, 65,
- 68, 70, 72, 76, 78, 80, 84, 86,
- 91, 94, 98, 101, 105, 109, 114, 118,
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 36, 37,
+ 38, 39, 40, 41, 42, 44, 46, 48,
+ 50, 52, 53, 56, 58, 60, 62, 65,
+ 68, 70, 72, 76, 78, 80, 84, 86,
+ 91, 94, 98, 101, 105, 109, 114, 118,
122, 127, 132, 137, 142, 148, 153, 159 },
{
/* K1 */
{ -501, -498, -497, -495, -493, -491, -488, -482,
- -478, -474, -469, -464, -459, -452, -445, -437,
- -412, -380, -339, -288, -227, -158, -81, -1,
- 80, 157, 226, 287, 337, 379, 411, 436 },
+ -478, -474, -469, -464, -459, -452, -445, -437,
+ -412, -380, -339, -288, -227, -158, -81, -1,
+ 80, 157, 226, 287, 337, 379, 411, 436 },
/* K2 */
{ -328, -303, -274, -244, -211, -175, -138, -99,
- -59, -18, 24, 64, 105, 143, 180, 215,
- 248, 278, 306, 331, 354, 374, 392, 408,
- 422, 435, 445, 455, 463, 470, 476, 506 },
+ -59, -18, 24, 64, 105, 143, 180, 215,
+ 248, 278, 306, 331, 354, 374, 392, 408,
+ 422, 435, 445, 455, 463, 470, 476, 506 },
/* K3 */
{ -441, -387, -333, -279, -225, -171, -117, -63,
- -9, 45, 98, 152, 206, 260, 314, 368 },
+ -9, 45, 98, 152, 206, 260, 314, 368 },
/* K4 */
{ -328, -273, -217, -161, -106, -50, 5, 61,
- 116, 172, 228, 283, 339, 394, 450, 506 },
+ 116, 172, 228, 283, 339, 394, 450, 506 },
/* K5 */
{ -328, -282, -235, -189, -142, -96, -50, -3,
- 43, 90, 136, 182, 229, 275, 322, 368 },
+ 43, 90, 136, 182, 229, 275, 322, 368 },
/* K6 */
{ -256, -212, -168, -123, -79, -35, 10, 54,
- 98, 143, 187, 232, 276, 320, 365, 409 },
+ 98, 143, 187, 232, 276, 320, 365, 409 },
/* K7 */
{ -308, -260, -212, -164, -117, -69, -21, 27,
- 75, 122, 170, 218, 266, 314, 361, 409 },
+ 75, 122, 170, 218, 266, 314, 361, 409 },
/* K8 */
{ -256, -161, -66, 29, 124, 219, 314, 409 },
/* K9 */
@@ -460,20 +460,20 @@ static const struct tms5100_coeffs tms5220_coeff =
},
/* Chirp table */
/*
- { 0, 42, -44, 50, -78, 18, 37, 20,
- 2, -31, -59, 2, 95, 90, 5, 15,
- 38, -4, -91,-91, -42,-35,-36, -4,
- 37, 43, 34, 33, 15, -1, -8,-18,
- -19,-17, -9,-10, -6, 0, 3, 2,
- 1, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },*/
+ { 0, 42, -44, 50, -78, 18, 37, 20,
+ 2, -31, -59, 2, 95, 90, 5, 15,
+ 38, -4, -91,-91, -42,-35,-36, -4,
+ 37, 43, 34, 33, 15, -1, -8,-18,
+ -19,-17, -9,-10, -6, 0, 3, 2,
+ 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },*/
{ 0,127,127, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 0, 3, 3, 3, 2, 2, 1, 1 }
};
@@ -494,44 +494,44 @@ static const struct tms5100_coeffs tms5220c_coeff =
{ 5, 5, 4, 4, 4, 4, 4, 3, 3, 3 },
/* E */
{ 0, 1, 2, 3, 4, 6, 8, 11,
- 16, 23, 33, 47, 63, 85, 114, 0 },
+ 16, 23, 33, 47, 63, 85, 114, 0 },
//{ 0x0d, 0x16, 0x20, 0x2d, 0x40, 0x5b, 0x81, 0xb6,
// 0x101, 0x16c, 0x202, 0x2d6, 0x402, 0x5a9, 0x7ff, 0 }, /* values from 5220_10.bin code for the tms50c10 */
/* P */
{ 0, 15, 16, 17, 18, 19, 20, 21,
- 22, 23, 24, 25, 26, 27, 28, 29,
- 30, 31, 32, 33, 34, 35, 36, 37,
- 38, 39, 40, 41, 42, 44, 46, 48,
- 50, 52, 53, 56, 58, 60, 62, 65,
- 68, 70, 72, 76, 78, 80, 84, 86,
- 91, 94, 98, 101, 105, 109, 114, 118,
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 36, 37,
+ 38, 39, 40, 41, 42, 44, 46, 48,
+ 50, 52, 53, 56, 58, 60, 62, 65,
+ 68, 70, 72, 76, 78, 80, 84, 86,
+ 91, 94, 98, 101, 105, 109, 114, 118,
122, 127, 132, 137, 142, 148, 153, 159 },
{
/* K1 */
{ -32062/64,-31872/64,-31806/64,-31679/64,-31551/64,-31423/64,-31230/64,-30846/64,
- -30591/64,-30335/64,-30014/64,-29693/64,-29375/64,-28926/64,-28477/64,-27966/64,
- -26351/64,-24266/64,-21632/64,-18387/64,-14514/64,-10061/64, -5155/64, -1/64,
- 5152/64, 10058/64, 14511/64, 18385/64, 21630/64, 24265/64, 26349/64, 27966/64 },
+ -30591/64,-30335/64,-30014/64,-29693/64,-29375/64,-28926/64,-28477/64,-27966/64,
+ -26351/64,-24266/64,-21632/64,-18387/64,-14514/64,-10061/64, -5155/64, -1/64,
+ 5152/64, 10058/64, 14511/64, 18385/64, 21630/64, 24265/64, 26349/64, 27966/64 },
/* K2 */
{ -20970/64,-19332/64,-17530/64,-15566/64,-13447/64,-11183/64, -8791/64, -6294/64,
- -3719/64, -1096/64, 1540/64, 4158/64, 6722/64, 9203/64, 11574/64, 13815/64,
- 15909/64, 17846/64, 19620/64, 21231/64, 22683/64, 23982/64, 25136/64, 26157/64,
- 27054/64, 27840/64, 28525/64, 29121/64, 29638/64, 30084/64, 30469/64, 32383/64 },
+ -3719/64, -1096/64, 1540/64, 4158/64, 6722/64, 9203/64, 11574/64, 13815/64,
+ 15909/64, 17846/64, 19620/64, 21231/64, 22683/64, 23982/64, 25136/64, 26157/64,
+ 27054/64, 27840/64, 28525/64, 29121/64, 29638/64, 30084/64, 30469/64, 32383/64 },
/* K3 */
{ -28179/64,-24728/64,-21276/64,-17825/64,-14373/64,-10922/64, -7470/64, -4019/64,
- -567/64, 2883/64, 6334/64, 9786/64, 13237/64, 16689/64, 20140/64, 23592/64 },
+ -567/64, 2883/64, 6334/64, 9786/64, 13237/64, 16689/64, 20140/64, 23592/64 },
/* K4 */
{ -20970/64,-17414/64,-13856/64,-10299/64, -6743/64, -3185/64, 370/64, 3927/64,
- 7484/64, 11041/64, 14598/64, 18155/64, 21712/64, 25269/64, 28826/64, 32383/64 },
+ 7484/64, 11041/64, 14598/64, 18155/64, 21712/64, 25269/64, 28826/64, 32383/64 },
/* K5 */
{ -20970/64,-17999/64,-15029/64,-12058/64, -9087/64, -6116/64, -3145/64, -174/64,
- 2796/64, 5766/64, 8737/64, 11708/64, 14679/64, 17650/64, 20621/64, 23592/64 },
+ 2796/64, 5766/64, 8737/64, 11708/64, 14679/64, 17650/64, 20621/64, 23592/64 },
/* K6 */
{ -16383/64,-13543/64,-10703/64, -7864/64, -5024/64, -2184/64, 655/64, 3495/64,
- 6334/64, 9174/64, 12014/64, 14854/64, 17694/64, 20534/64, 23373/64, 26213/64 },
+ 6334/64, 9174/64, 12014/64, 14854/64, 17694/64, 20534/64, 23373/64, 26213/64 },
/* K7 */
{ -19660/64,-16602/64,-13543/64,-10485/64, -7427/64, -4368/64, -1310/64, 1747/64,
- 4805/64, 7864/64, 10922/64, 13980/64, 17038/64, 20096/64, 23155/64, 26213/64 },
+ 4805/64, 7864/64, 10922/64, 13980/64, 17038/64, 20096/64, 23155/64, 26213/64 },
/* K8 */
{ -16383/64,-10298/64, -4212/64, 1872/64, 7957/64, 14042/64, 20128/64, 26213/64 },
/* K9 */
@@ -541,20 +541,20 @@ static const struct tms5100_coeffs tms5220c_coeff =
},
/* Chirp table */
/*
- { 0, 42, -44, 50, -78, 18, 37, 20,
- 2, -31, -59, 2, 95, 90, 5, 15,
- 38, -4, -91,-91, -42,-35,-36, -4,
- 37, 43, 34, 33, 15, -1, -8,-18,
- -19,-17, -9,-10, -6, 0, 3, 2,
- 1, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },*/
+ { 0, 42, -44, 50, -78, 18, 37, 20,
+ 2, -31, -59, 2, 95, 90, 5, 15,
+ 38, -4, -91,-91, -42,-35,-36, -4,
+ 37, 43, 34, 33, 15, -1, -8,-18,
+ -19,-17, -9,-10, -6, 0, 3, 2,
+ 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },*/
{ 0,127,127, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 0, 3, 3, 3, 2, 2, 1, 1 }
};
@@ -583,41 +583,41 @@ static const struct tms5100_coeffs vlm5030_coeff =
{ 6, 5, 4, 4, 3, 3, 3, 3, 3, 3 },
/* E */
{ 0, 1, 2, 3, 5, 6, 7, 9,
- 11, 13, 15, 17, 19, 22, 24, 27,
- 31, 34, 38, 42, 47, 51, 57, 62,
- 68, 75, 82, 89, 98,107,116,127},
+ 11, 13, 15, 17, 19, 22, 24, 27,
+ 31, 34, 38, 42, 47, 51, 57, 62,
+ 68, 75, 82, 89, 98,107,116,127},
/* P */
{ 0, 21, 22, 23, 24, 25, 26, 27,
- 28, 29, 31, 33, 35, 37, 39, 41,
- 43, 45, 49, 53, 57, 61, 65, 69,
- 73, 77, 85, 93, 101, 109, 117, 125 },
+ 28, 29, 31, 33, 35, 37, 39, 41,
+ 43, 45, 49, 53, 57, 61, 65, 69,
+ 73, 77, 85, 93, 101, 109, 117, 125 },
{
/* K1 */
/* (NOTE: the order of each table is correct, despite that the index MSb
- looks backwards) */
+ looks backwards) */
{ 390, 403, 414, 425, 434, 443, 450, 457,
- 463, 469, 474, 478, 482, 485, 488, 491,
- 494, 496, 498, 499, 501, 502, 503, 504,
- 505, 506, 507, 507, 508, 508, 509, 509,
- -390,-376,-360,-344,-325,-305,-284,-261,
- -237,-211,-183,-155,-125, -95, -64, -32,
- 0, 32, 64, 95, 125, 155, 183, 211,
- 237, 261, 284, 305, 325, 344, 360, 376 },
+ 463, 469, 474, 478, 482, 485, 488, 491,
+ 494, 496, 498, 499, 501, 502, 503, 504,
+ 505, 506, 507, 507, 508, 508, 509, 509,
+ -390,-376,-360,-344,-325,-305,-284,-261,
+ -237,-211,-183,-155,-125, -95, -64, -32,
+ 0, 32, 64, 95, 125, 155, 183, 211,
+ 237, 261, 284, 305, 325, 344, 360, 376 },
/* K2 */
{ 0, 50, 100, 149, 196, 241, 284, 325,
- 362, 396, 426, 452, 473, 490, 502, 510,
- 0,-510,-502,-490,-473,-452,-426,-396, /* entry 16(0x10) has some special function, purpose unknown */
- -362,-325,-284,-241,-196,-149,-100, -50 },
+ 362, 396, 426, 452, 473, 490, 502, 510,
+ 0,-510,-502,-490,-473,-452,-426,-396, /* entry 16(0x10) has some special function, purpose unknown */
+ -362,-325,-284,-241,-196,-149,-100, -50 },
/* K3 */
/*{ 0, 100, 196, 284, 362, 426, 473, 502,
- -510,-490,-452,-396,-325,-241,-149, -50 },*/
+ -510,-490,-452,-396,-325,-241,-149, -50 },*/
{ 0, 64, 128, 192, 256, 320, 384, 448,
- -512,-448,-384,-320,-256,-192,-128, -64 },
+ -512,-448,-384,-320,-256,-192,-128, -64 },
/* K4 */
/*{ 0, 100, 196, 284, 362, 426, 473, 502,
- -510,-490,-452,-396,-325,-241,-149, -50 },*/
+ -510,-490,-452,-396,-325,-241,-149, -50 },*/
{ 0, 64, 128, 192, 256, 320, 384, 448,
- -512,-448,-384,-320,-256,-192,-128, -64 },
+ -512,-448,-384,-320,-256,-192,-128, -64 },
/* K5 */
{ 0, 128, 256, 384,-512,-384,-256,-128 },
/* K6 */
@@ -634,13 +634,12 @@ static const struct tms5100_coeffs vlm5030_coeff =
},
/* Chirp table */
{ 0,127,127, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0 },
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0 },
/* interpolation coefficients */
{ 3, 3, 3, 2, 2, 1, 1, 0 }
};
-
diff --git a/src/emu/sound/tms5220.c b/src/emu/sound/tms5220.c
index 351d50bda7b..4ac83ecf33a 100644
--- a/src/emu/sound/tms5220.c
+++ b/src/emu/sound/tms5220.c
@@ -317,29 +317,29 @@ device), PES Speech adapter (serial port connection)
#undef DEBUG_RS_WS
// above debugs the tms5220_data_r and data_w access methods which actually respect rs and ws
-#define MAX_SAMPLE_CHUNK 512
+#define MAX_SAMPLE_CHUNK 512
/* Variants */
-#define TMS5220_IS_5220C (4)
-#define TMS5220_IS_5200 (5)
-#define TMS5220_IS_5220 (6)
+#define TMS5220_IS_5220C (4)
+#define TMS5220_IS_5200 (5)
+#define TMS5220_IS_5220 (6)
-#define TMS5220_IS_TMC0285 TMS5220_IS_5200
+#define TMS5220_IS_TMC0285 TMS5220_IS_5200
static const UINT8 reload_table[4] = { 0, 2, 4, 6 }; //sample count reload for 5220c only; 5200 and 5220 always reload with 0; keep in mind this is loaded on IP=0 PC=12 subcycle=1 so it immediately will increment after one sample, effectively being 1,3,5,7 as in the comments above.
struct tms5220_state
{
/* coefficient tables */
- int variant; /* Variant of the 5xxx - see tms5110r.h */
+ int variant; /* Variant of the 5xxx - see tms5110r.h */
/* coefficient tables */
const struct tms5100_coeffs *coeff;
/* callbacks */
- devcb_resolved_write_line irq_func;
- devcb_resolved_write_line readyq_func;
+ devcb_resolved_write_line irq_func;
+ devcb_resolved_write_line readyq_func;
/* these contain data that describes the 128-bit data FIFO */
UINT8 fifo[FIFO_SIZE];
@@ -350,13 +350,13 @@ struct tms5220_state
/* these contain global status bits */
- UINT8 speaking_now; /* True only if actual speech is being generated right now. Is set when a speak vsm command happens OR when speak external happens and buffer low becomes nontrue; Is cleared when speech halts after the last stop frame or the last frame after talk status is otherwise cleared.*/
- UINT8 speak_external; /* If 1, DDIS is 1, i.e. Speak External command in progress, writes go to FIFO. */
- UINT8 talk_status; /* If 1, TS status bit is 1, i.e. speak or speak external is in progress and we have not encountered a stop frame yet; talk_status differs from speaking_now in that speaking_now is set as soon as a speak or speak external command is started; talk_status does NOT go active until after 8 bytes are written to the fifo on a speak external command, otherwise the two are the same. TS is cleared by 3 things: 1. when a STOP command has just been processed as a new frame in the speech stream; 2. if the fifo runs out in speak external mode; 3. on power-up/during a reset command; When it gets cleared, speak_external is also cleared, an interrupt is generated, and speaking_now will be cleared when the next frame starts. */
- UINT8 buffer_low; /* If 1, FIFO has less than 8 bytes in it */
- UINT8 buffer_empty; /* If 1, FIFO is empty */
- UINT8 irq_pin; /* state of the IRQ pin (output) */
- UINT8 ready_pin; /* state of the READY pin (output) */
+ UINT8 speaking_now; /* True only if actual speech is being generated right now. Is set when a speak vsm command happens OR when speak external happens and buffer low becomes nontrue; Is cleared when speech halts after the last stop frame or the last frame after talk status is otherwise cleared.*/
+ UINT8 speak_external; /* If 1, DDIS is 1, i.e. Speak External command in progress, writes go to FIFO. */
+ UINT8 talk_status; /* If 1, TS status bit is 1, i.e. speak or speak external is in progress and we have not encountered a stop frame yet; talk_status differs from speaking_now in that speaking_now is set as soon as a speak or speak external command is started; talk_status does NOT go active until after 8 bytes are written to the fifo on a speak external command, otherwise the two are the same. TS is cleared by 3 things: 1. when a STOP command has just been processed as a new frame in the speech stream; 2. if the fifo runs out in speak external mode; 3. on power-up/during a reset command; When it gets cleared, speak_external is also cleared, an interrupt is generated, and speaking_now will be cleared when the next frame starts. */
+ UINT8 buffer_low; /* If 1, FIFO has less than 8 bytes in it */
+ UINT8 buffer_empty; /* If 1, FIFO is empty */
+ UINT8 irq_pin; /* state of the IRQ pin (output) */
+ UINT8 ready_pin; /* state of the READY pin (output) */
/* these contain data describing the current and previous voice frames */
#define OLD_FRAME_SILENCE_FLAG tms->OLDE // 1 if E=0, 0 otherwise.
@@ -395,31 +395,31 @@ struct tms5220_state
INT32 target_k[10];
#endif
- UINT16 previous_energy; /* needed for lattice filter to match patent */
+ UINT16 previous_energy; /* needed for lattice filter to match patent */
- UINT8 subcycle; /* contains the current subcycle for a given PC: 0 is A' (only used on SPKSLOW mode on 51xx), 1 is A, 2 is B */
- UINT8 subc_reload; /* contains 1 for normal speech, 0 when SPKSLOW is active */
- UINT8 PC; /* current parameter counter (what param is being interpolated), ranges from 0 to 12 */
+ UINT8 subcycle; /* contains the current subcycle for a given PC: 0 is A' (only used on SPKSLOW mode on 51xx), 1 is A, 2 is B */
+ UINT8 subc_reload; /* contains 1 for normal speech, 0 when SPKSLOW is active */
+ UINT8 PC; /* current parameter counter (what param is being interpolated), ranges from 0 to 12 */
/* TODO/NOTE: the current interpolation period, counts 1,2,3,4,5,6,7,0 for divide by 8,8,8,4,4,4,2,1 */
- UINT8 interp_period; /* the current interpolation period */
- UINT8 inhibit; /* If 1, interpolation is inhibited until the DIV1 period */
- UINT8 tms5220c_rate; /* only relevant for tms5220C's multi frame rate feature; is the actual 4 bit value written on a 0x2* or 0x0* command */
- UINT16 pitch_count; /* pitch counter; provides chirp rom address */
+ UINT8 interp_period; /* the current interpolation period */
+ UINT8 inhibit; /* If 1, interpolation is inhibited until the DIV1 period */
+ UINT8 tms5220c_rate; /* only relevant for tms5220C's multi frame rate feature; is the actual 4 bit value written on a 0x2* or 0x0* command */
+ UINT16 pitch_count; /* pitch counter; provides chirp rom address */
INT32 u[11];
INT32 x[10];
- UINT16 RNG; /* the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13 */
+ UINT16 RNG; /* the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13 */
INT16 excitation_data;
/* R Nabet : These have been added to emulate speech Roms */
- UINT8 schedule_dummy_read; /* set after each load address, so that next read operation is preceded by a dummy read */
- UINT8 data_register; /* data register, used by read command */
- UINT8 RDB_flag; /* whether we should read data register or status register */
+ UINT8 schedule_dummy_read; /* set after each load address, so that next read operation is preceded by a dummy read */
+ UINT8 data_register; /* data register, used by read command */
+ UINT8 RDB_flag; /* whether we should read data register or status register */
/* io_ready: page 3 of the datasheet specifies that READY will be asserted until
- * data is available or processed by the system.
- */
+ * data is available or processed by the system.
+ */
UINT8 io_ready;
/* flag for "true" timing involving rs/ws */
@@ -431,12 +431,12 @@ struct tms5220_state
UINT8 write_latch;
/* The TMS52xx has two different ways of providing output data: the
- analog speaker pin (which was usually used) and the Digital I/O pin.
- The internal DAC used to feed the analog pin is only 8 bits, and has the
- funny clipping/clamping logic, while the digital pin gives full 12? bit
- resolution of the output data.
- TODO: add a way to set/reset this other than the FORCE_DIGITAL define
- */
+ analog speaker pin (which was usually used) and the Digital I/O pin.
+ The internal DAC used to feed the analog pin is only 8 bits, and has the
+ funny clipping/clamping logic, while the digital pin gives full 12? bit
+ resolution of the output data.
+ TODO: add a way to set/reset this other than the FORCE_DIGITAL define
+ */
UINT8 digital_select;
device_t *device;
@@ -454,9 +454,9 @@ INLINE tms5220_state *get_safe_token(device_t *device)
{
assert(device != NULL);
assert(device->type() == TMS5220 ||
- device->type() == TMS5220C ||
- device->type() == TMC0285 ||
- device->type() == TMS5200);
+ device->type() == TMS5220C ||
+ device->type() == TMC0285 ||
+ device->type() == TMS5200);
return (tms5220_state *)downcast<tms5220_device *>(device)->token();
}
@@ -680,8 +680,8 @@ static void update_status_and_ints(tms5220_state *tms)
update_ready_state(tms);
/* BL is set if neither byte 9 nor 8 of the fifo are in use; this
- translates to having fifo_count (which ranges from 0 bytes in use to 16
- bytes used) being less than or equal to 8. Victory/Victorba depends on this. */
+ translates to having fifo_count (which ranges from 0 bytes in use to 16
+ bytes used) being less than or equal to 8. Victory/Victorba depends on this. */
if (tms->fifo_count <= 8)
{
// generate an interrupt if necessary; if /BL was inactive and is now active, set int.
@@ -693,7 +693,7 @@ static void update_status_and_ints(tms5220_state *tms)
tms->buffer_low = 0;
/* BE is set if neither byte 15 nor 14 of the fifo are in use; this
- translates to having fifo_count equal to exactly 0 */
+ translates to having fifo_count equal to exactly 0 */
if (tms->fifo_count == 0)
{
// generate an interrupt if necessary; if /BE was inactive and is now active, set int.
@@ -705,8 +705,8 @@ static void update_status_and_ints(tms5220_state *tms)
tms->buffer_empty = 0;
/* TS is talk status and is set elsewhere in the fifo parser and in
- the SPEAK command handler; however, if /BE is true during speak external
- mode, it is immediately unset here. */
+ the SPEAK command handler; however, if /BE is true during speak external
+ mode, it is immediately unset here. */
if ((tms->speak_external == 1) && (tms->buffer_empty == 1))
{
// generate an interrupt: /TS was active, and is now inactive.
@@ -717,7 +717,7 @@ static void update_status_and_ints(tms5220_state *tms)
}
}
/* Note that TS being unset will also generate an interrupt when a STOP
- frame is encountered; this is handled in the sample generator code and not here */
+ frame is encountered; this is handled in the sample generator code and not here */
}
/**********************************************************************************************
@@ -766,12 +766,12 @@ static int extract_bits(tms5220_state *tms, int count)
static int tms5220_status_read(tms5220_state *tms)
{
if (tms->RDB_flag)
- { /* if last command was read, return data register */
+ { /* if last command was read, return data register */
tms->RDB_flag = FALSE;
return(tms->data_register);
}
else
- { /* read status */
+ { /* read status */
/* clear the interrupt pin on status read */
set_interrupt_state(tms, 0);
@@ -829,12 +829,12 @@ static int tms5220_cycles_to_ready(tms5220_state *tms)
val = (tms->fifo[tms->fifo_head] >> tms->fifo_bits_taken) & 0xf;
if (val == 0)
/* 0 -> silence frame: we will only read 4 bits, and we will
- * therefore need to read another frame before the FIFO is not
- * full any more */
+ * therefore need to read another frame before the FIFO is not
+ * full any more */
answer += tms->subc_reload?200:304;
/* 15 -> stop frame, we will only read 4 bits, but the FIFO will
- * we cleared; otherwise, we need to parse the repeat flag (1 bit)
- * and the pitch (6 bits), so everything will be OK. */
+ * we cleared; otherwise, we need to parse the repeat flag (1 bit)
+ * and the pitch (6 bits), so everything will be OK. */
}
}
@@ -875,7 +875,7 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
goto empty;
/* if speak external is set, but talk status is not (yet) set,
- wait for buffer low to clear */
+ wait for buffer low to clear */
if (!tms->talk_status && tms->speak_external && tms->buffer_low)
goto empty;
@@ -883,9 +883,9 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
while ((size > 0) && tms->speaking_now)
{
/* if it is the appropriate time to update the old energy/pitch idxes,
- * i.e. when IP=7, PC=12, T=17, subcycle=2, do so. Since IP=7 PC=12 T=17
- * is JUST BEFORE the transition to IP=0 PC=0 T=0 sybcycle=(0 or 1),
- * which happens 4 T-cycles later), we change on the latter.*/
+ * i.e. when IP=7, PC=12, T=17, subcycle=2, do so. Since IP=7 PC=12 T=17
+ * is JUST BEFORE the transition to IP=0 PC=0 T=0 sybcycle=(0 or 1),
+ * which happens 4 T-cycles later), we change on the latter.*/
if ((tms->interp_period == 0) && (tms->PC == 0) && (tms->subcycle < 2))
{
tms->OLDE = (tms->new_frame_energy_idx == 0);
@@ -893,9 +893,9 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
}
/* if we're ready for a new frame to be applied, i.e. when IP=0, PC=12, Sub=1
- * (In reality, the frame was really loaded incrementally during the entire IP=0
- * PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens)
- */
+ * (In reality, the frame was really loaded incrementally during the entire IP=0
+ * PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens)
+ */
if ((tms->interp_period == 0) && (tms->PC == 12) && (tms->subcycle == 1))
{
// HACK for regression testing, be sure to comment out before release!
@@ -939,11 +939,11 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
}
/* in all cases where interpolation would be inhibited, set the inhibit flag; otherwise clear it.
- Interpolation inhibit cases:
- * Old frame was voiced, new is unvoiced
- * Old frame was silence/zero energy, new has nonzero energy
- * Old frame was unvoiced, new is voiced
- */
+ Interpolation inhibit cases:
+ * Old frame was voiced, new is unvoiced
+ * Old frame was silence/zero energy, new has nonzero energy
+ * Old frame was unvoiced, new is voiced
+ */
if ( ((OLD_FRAME_UNVOICED_FLAG == 0) && (NEW_FRAME_UNVOICED_FLAG == 1))
|| ((OLD_FRAME_UNVOICED_FLAG == 1) && (NEW_FRAME_UNVOICED_FLAG == 0))
|| ((OLD_FRAME_SILENCE_FLAG == 1) && (NEW_FRAME_SILENCE_FLAG == 0)) )
@@ -1056,12 +1056,12 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
{
// generate voiced samples here
/* US patent 4331836 Figure 14B shows, and logic would hold, that a pitch based chirp
- * function has a chirp/peak and then a long chain of zeroes.
- * The last entry of the chirp rom is at address 0b110011 (51d), the 52nd sample,
- * and if the address reaches that point the ADDRESS incrementer is
- * disabled, forcing all samples beyond 51d to be == 51d
- * (address 51d holds zeroes, which may or may not be inverted to -1)
- */
+ * function has a chirp/peak and then a long chain of zeroes.
+ * The last entry of the chirp rom is at address 0b110011 (51d), the 52nd sample,
+ * and if the address reaches that point the ADDRESS incrementer is
+ * disabled, forcing all samples beyond 51d to be == 51d
+ * (address 51d holds zeroes, which may or may not be inverted to -1)
+ */
if (tms->pitch_count >= 51)
tms->excitation_data = tms->coeff->chirptable[51];
else /*tms->pitch_count < 51*/
@@ -1124,14 +1124,14 @@ static void tms5220_process(tms5220_state *tms, INT16 *buffer, unsigned int size
tms->PC++;
}
/* Circuit 412 in the patent ensures that when INHIBIT is true,
- * during the period from IP=7 PC=12 T12, to IP=0 PC=12 T12, the pitch
- * count is forced to 0; since the initial stop happens right before
- * the switch to IP=0 PC=0 and this code is located after the switch would
- * happen, we check for ip=0 inhibit=1, which covers that whole range.
- * The purpose of Circuit 412 is to prevent a spurious click caused by
- * the voiced source being fed to the filter before all the values have
- * been updated during ip=0 when interpolation was inhibited.
- */
+ * during the period from IP=7 PC=12 T12, to IP=0 PC=12 T12, the pitch
+ * count is forced to 0; since the initial stop happens right before
+ * the switch to IP=0 PC=0 and this code is located after the switch would
+ * happen, we check for ip=0 inhibit=1, which covers that whole range.
+ * The purpose of Circuit 412 is to prevent a spurious click caused by
+ * the voiced source being fed to the filter before all the values have
+ * been updated during ip=0 when interpolation was inhibited.
+ */
tms->pitch_count++;
if (tms->pitch_count >= tms->current_pitch) tms->pitch_count = 0;
if ((tms->interp_period == 0)&&(tms->inhibit==1)) tms->pitch_count = 0;
@@ -1157,7 +1157,7 @@ empty:
tms->subcycle = tms->subc_reload;
tms->PC++;
}
- buffer[buf_count] = -1; /* should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4) */
+ buffer[buf_count] = -1; /* should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4) */
buf_count++;
size--;
}
@@ -1172,13 +1172,13 @@ empty:
static INT16 clip_analog(INT16 cliptemp)
{
/* clipping, just like the patent shows:
- * the top 10 bits of this result are visible on the digital output IO pin.
- * next, if the top 3 bits of the 14 bit result are all the same, the lowest of those 3 bits plus the next 7 bits are the signed analog output, otherwise the low bits are all forced to match the inverse of the topmost bit, i.e.:
- * 1x xxxx xxxx xxxx -> 0b10000000
- * 11 1bcd efgh xxxx -> 0b1bcdefgh
- * 00 0bcd efgh xxxx -> 0b0bcdefgh
- * 0x xxxx xxxx xxxx -> 0b01111111
- */
+ * the top 10 bits of this result are visible on the digital output IO pin.
+ * next, if the top 3 bits of the 14 bit result are all the same, the lowest of those 3 bits plus the next 7 bits are the signed analog output, otherwise the low bits are all forced to match the inverse of the topmost bit, i.e.:
+ * 1x xxxx xxxx xxxx -> 0b10000000
+ * 11 1bcd efgh xxxx -> 0b1bcdefgh
+ * 00 0bcd efgh xxxx -> 0b0bcdefgh
+ * 0x xxxx xxxx xxxx -> 0b01111111
+ */
#ifdef DEBUG_CLIP
if ((cliptemp > 2047) || (cliptemp < -2048)) fprintf(stderr,"clipping cliptemp to range; was %d\n", cliptemp);
#endif
@@ -1239,11 +1239,11 @@ static INT32 lattice_filter(tms5220_state *tms)
// Lattice filter here
// Aug/05/07: redone as unrolled loop, for clarity - LN
/* Originally Copied verbatim from table I in US patent 4,209,804, now updated to be in same order as the actual chip does it, not that it matters.
- notation equivalencies from table:
- Yn(i) == tms->u[n-1]
- Kn = tms->current_k[n-1]
- bn = tms->x[n-1]
- */
+ notation equivalencies from table:
+ Yn(i) == tms->u[n-1]
+ Kn = tms->current_k[n-1]
+ bn = tms->x[n-1]
+ */
tms->u[10] = matrix_multiply(tms->previous_energy, (tms->excitation_data<<6)); //Y(11)
tms->u[9] = tms->u[10] - matrix_multiply(tms->current_k[9], tms->x[9]);
tms->u[8] = tms->u[9] - matrix_multiply(tms->current_k[8], tms->x[8]);
@@ -1304,7 +1304,7 @@ static void process_command(tms5220_state *tms, unsigned char cmd)
(*tms->intf->read)(tms->device, 1);
}
if (tms->intf->read)
- tms->data_register = (*tms->intf->read)(tms->device, 8); /* read one byte from speech ROM... */
+ tms->data_register = (*tms->intf->read)(tms->device, 8); /* read one byte from speech ROM... */
tms->RDB_flag = TRUE;
}
break;
@@ -1332,7 +1332,7 @@ static void process_command(tms5220_state *tms, unsigned char cmd)
if (tms->talk_status == 0) /* TALKST must be clear for LA */
{
/* tms5220 data sheet says that if we load only one 4-bit nibble, it won't work.
- This code does not care about this. */
+ This code does not care about this. */
if (tms->intf->load_address)
(*tms->intf->load_address)(tms->device, cmd & 0x0f);
tms->schedule_dummy_read = TRUE;
@@ -1403,7 +1403,7 @@ static void parse_frame(tms5220_state *tms)
// We actually don't care how many bits are left in the fifo here; the frame subpart will be processed normally, and any bits extracted 'past the end' of the fifo will be read as zeroes; the fifo being emptied will set the /BE latch which will halt speech exactly as if a stop frame had been encountered (instead of whatever partial frame was read); the same exact circuitry is used for both on the real chip, see us patent 4335277 sheet 16, gates 232a (decode stop frame) and 232b (decode /BE plus DDIS (decode disable) which is active during speak external).
/* if the chip is a tms5220C, and the rate mode is set to that each frame (0x04 bit set)
- has a 2 bit rate preceding it, grab two bits here and store them as the rate; */
+ has a 2 bit rate preceding it, grab two bits here and store them as the rate; */
if ((tms->variant == SUBTYPE_TMS5220C) && (tms->tms5220c_rate & 0x04))
{
indx = extract_bits(tms, 2);
@@ -1524,9 +1524,9 @@ static void update_ready_state(tms5220_state *tms)
#ifdef DEBUG_PIN_READS
logerror("ready pin set to state %d\n", state);
#endif
- if (!tms->readyq_func.isnull() && state != tms->ready_pin)
- tms->readyq_func(!state);
- tms->ready_pin = state;
+ if (!tms->readyq_func.isnull() && state != tms->ready_pin)
+ tms->readyq_func(!state);
+ tms->ready_pin = state;
}
@@ -1558,16 +1558,16 @@ static DEVICE_START( tms5220 )
tms->stream = device->machine().sound().stream_alloc(*device, 0, 1, device->clock() / 80, tms, tms5220_update);
/*if (tms->table == NULL)
- {
- assert_always(tms->intf->M0_callback != NULL, "Missing _mandatory_ 'M0_callback' function pointer in the TMS5110 interface\n This function is used by TMS5220 to call for a new single bit\n needed to generate the speech when in VSM mode\n Aborting startup...\n");
- tms->M0_callback = tms->intf->M0_callback;
- tms->set_load_address = tms->intf->load_address;
- }
- else
- {
- tms->M0_callback = speech_rom_read_bit;
- tms->set_load_address = speech_rom_set_addr;
- }*/
+ {
+ assert_always(tms->intf->M0_callback != NULL, "Missing _mandatory_ 'M0_callback' function pointer in the TMS5110 interface\n This function is used by TMS5220 to call for a new single bit\n needed to generate the speech when in VSM mode\n Aborting startup...\n");
+ tms->M0_callback = tms->intf->M0_callback;
+ tms->set_load_address = tms->intf->load_address;
+ }
+ else
+ {
+ tms->M0_callback = speech_rom_read_bit;
+ tms->set_load_address = speech_rom_set_addr;
+ }*/
/* not during reset which is called frm within a write! */
tms->io_ready = 1;
@@ -1660,19 +1660,19 @@ static TIMER_CALLBACK( io_ready_cb )
{
case 0x02:
/* Write */
- /* bring up to date first */
+ /* bring up to date first */
#ifdef DEBUG_IO_READY
logerror("Serviced write: %02x\n", tms->write_latch);
//fprintf(stderr, "Processed write data: %02X\n", tms->write_latch);
#endif
- tms->stream->update();
- tms5220_data_write(tms, tms->write_latch);
- break;
+ tms->stream->update();
+ tms5220_data_write(tms, tms->write_latch);
+ break;
case 0x01:
/* Read */
- /* bring up to date first */
- tms->stream->update();
- tms->read_latch = tms5220_status_read(tms);
+ /* bring up to date first */
+ tms->stream->update();
+ tms->read_latch = tms5220_status_read(tms);
break;
case 0x03:
/* High Impedance */
@@ -1786,15 +1786,15 @@ WRITE_LINE_DEVICE_HANDLER( tms5220_wsq_w )
tms->io_ready = 0;
update_ready_state(tms);
/* Now comes the complicated part: long does /READY stay inactive, when /WS is pulled low? This depends ENTIRELY on the command written, or whether the chip is in speak external mode or not...
- Speak external mode: ~16 cycles
- Command Mode:
- SPK: ? cycles
- SPKEXT: ? cycles
- RDBY: between 60 and 140 cycles
- RB: ? cycles (80?)
- RST: between 60 and 140 cycles
- SET RATE (5220C only): ? cycles (probably ~16)
- */
+ Speak external mode: ~16 cycles
+ Command Mode:
+ SPK: ? cycles
+ SPKEXT: ? cycles
+ RDBY: between 60 and 140 cycles
+ RB: ? cycles (80?)
+ RST: between 60 and 140 cycles
+ SET RATE (5220C only): ? cycles (probably ~16)
+ */
// TODO: actually HANDLE the timing differences! currently just assuming always 16 cycles
tms->device->machine().scheduler().timer_set(attotime::from_hz(device->clock()/16), FUNC(io_ready_cb), 1, tms); // this should take around 10-16 (closer to ~15) cycles to complete for fifo writes, TODO: but actually depends on what command is written if in command mode
}
@@ -1816,8 +1816,8 @@ WRITE8_DEVICE_HANDLER( tms5220_data_w )
if (!tms->true_timing)
{
/* bring up to date first */
- tms->stream->update();
- tms5220_data_write(tms, data);
+ tms->stream->update();
+ tms5220_data_write(tms, data);
}
else
{
@@ -1843,9 +1843,9 @@ READ8_DEVICE_HANDLER( tms5220_status_r )
tms5220_state *tms = get_safe_token(device);
if (!tms->true_timing)
{
- /* bring up to date first */
- tms->stream->update();
- return tms5220_status_read(tms);
+ /* bring up to date first */
+ tms->stream->update();
+ return tms5220_status_read(tms);
}
else
{
@@ -1871,9 +1871,9 @@ READ8_DEVICE_HANDLER( tms5220_status_r )
READ_LINE_DEVICE_HANDLER( tms5220_readyq_r )
{
tms5220_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
- return !tms5220_ready_read(tms);
+ /* bring up to date first */
+ tms->stream->update();
+ return !tms5220_ready_read(tms);
}
@@ -1906,9 +1906,9 @@ double tms5220_time_to_ready(device_t *device)
READ_LINE_DEVICE_HANDLER( tms5220_intq_r )
{
tms5220_state *tms = get_safe_token(device);
- /* bring up to date first */
- tms->stream->update();
- return !tms5220_int_read(tms);
+ /* bring up to date first */
+ tms->stream->update();
+ return !tms5220_int_read(tms);
}
@@ -1987,13 +1987,13 @@ const device_type TMS5220 = &device_creator<tms5220_device>;
tms5220_device::tms5220_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TMS5220, "TMS5220", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tms5220_state);
}
tms5220_device::tms5220_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tms5220_state);
}
@@ -2101,9 +2101,9 @@ void tms5200_device::sound_stream_update(sound_stream &stream, stream_sample_t *
tms52xx_device::tms52xx_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, const struct tms5100_coeffs* coeffs, const int var, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_variant(var),
- m_coeff(coeffs)
+ device_sound_interface(mconfig, *this),
+ m_variant(var),
+ m_coeff(coeffs)
{
}
@@ -2144,16 +2144,16 @@ void tms52xx_device::device_start()
m_stream = machine().sound().stream_alloc(*this, 0, 1, clock() / 80, this);
/*if (m_table == NULL)
- {
- assert_always(m_conf->M0_callback != NULL, "Missing _mandatory_ 'M0_callback' function pointer in the TMS5110 interface\n This function is used by TMS5220 to call for a new single bit\n needed to generate the speech when in VSM mode\n Aborting startup...\n");
- m_M0_callback = conf->M0_callback;
- m_set_load_address = conf->load_address;
- }
- else
- {
- m_M0_callback = speech_rom_read_bit;
- m_set_load_address = speech_rom_set_addr;
- }*/
+ {
+ assert_always(m_conf->M0_callback != NULL, "Missing _mandatory_ 'M0_callback' function pointer in the TMS5110 interface\n This function is used by TMS5220 to call for a new single bit\n needed to generate the speech when in VSM mode\n Aborting startup...\n");
+ m_M0_callback = conf->M0_callback;
+ m_set_load_address = conf->load_address;
+ }
+ else
+ {
+ m_M0_callback = speech_rom_read_bit;
+ m_set_load_address = speech_rom_set_addr;
+ }*/
/* not during reset which is called frm within a write! */
m_io_ready = true;
@@ -2167,7 +2167,7 @@ void tms52xx_device::device_start()
void tms52xx_device::device_reset()
{
- m_digital_select = FORCE_DIGITAL; // assume analog output
+ m_digital_select = FORCE_DIGITAL; // assume analog output
// initialize the FIFO
// should we do a memset here to clear the fifo contents?
m_fifo_head = 0;
@@ -2177,14 +2177,14 @@ void tms52xx_device::device_reset()
// initialize the chip state
/* Note that we do not actually clear IRQ on start-up: IRQ is even raised
- * if m_buffer_empty or m_buffer_low are 0 */
+ * if m_buffer_empty or m_buffer_low are 0 */
m_speaking_now = false;
m_speak_external = false;
m_talk_status = false;
- m_irq_pin = 0; // CLEAR_LINE
- m_ready_pin = 0; // CLEAR_LINE
+ m_irq_pin = 0; // CLEAR_LINE
+ m_ready_pin = 0; // CLEAR_LINE
- set_interrupt_state(0); // CLEAR_LINE
+ set_interrupt_state(0); // CLEAR_LINE
update_ready_state();
m_buffer_empty = true;
m_buffer_low = true;
@@ -2238,8 +2238,8 @@ void tms52xx_device::set_interrupt_state(int state)
#ifdef DEBUG_PIN_READS
logerror("tms52xx: irq pin set to state %d\n", state);
#endif
- if (state != m_irq_pin) m_irq_func(!state);
- m_irq_pin = state;
+ if (state != m_irq_pin) m_irq_func(!state);
+ m_irq_pin = state;
}
/******************************************************************************
@@ -2314,10 +2314,10 @@ void tms52xx_device::process(INT16 *buffer, unsigned int size)
while ((size > 0) && m_speaking_now)
{
/* if it is the appropriate time to update the old energy/pitch idxes,
- * i.e. when IP=7, PC=12, T=17, subcycle=2, do so. Since IP=7 PC=12 T=17
- * is JUST BEFORE the transition to IP=0 PC=0 T=0 sybcycle=(0 or 1),
- * which happens 4 T-cycles later), we change on the latter.
- */
+ * i.e. when IP=7, PC=12, T=17, subcycle=2, do so. Since IP=7 PC=12 T=17
+ * is JUST BEFORE the transition to IP=0 PC=0 T=0 sybcycle=(0 or 1),
+ * which happens 4 T-cycles later), we change on the latter.
+ */
if ((m_interp_period == 0) && (m_PC == 0) && (m_subcycle < 2))
{
m_OLDE = (m_new_frame_energy_idx == 0);
@@ -2325,9 +2325,9 @@ void tms52xx_device::process(INT16 *buffer, unsigned int size)
}
/* if we're ready for a new frame to be applied, i.e. when IP=0, PC=12, Sub=1
- * (In reality, the frame was really loaded incrementally during the
- * entire IP=0 PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens)
- */
+ * (In reality, the frame was really loaded incrementally during the
+ * entire IP=0 PC=x time period, but it doesn't affect anything until IP=0 PC=12 happens)
+ */
if ((m_interp_period == 0) && (m_PC == 12) && (m_subcycle == 1))
{
// HACK for regression testing, be sure to comment out before release!
@@ -2401,7 +2401,7 @@ void tms52xx_device::process(INT16 *buffer, unsigned int size)
fprintf(stderr,"Interpolation Inhibited\n");
fprintf(stderr,"*** current Energy, Pitch and Ks = %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n",
m_current_energy, m_current_pitch,
- m_current_k[0], m_current_k[1], m_current_k[2], m_current_k[3],
+ m_current_k[0], m_current_k[1], m_current_k[2], m_current_k[3],
m_current_k[4], m_current_k[5], m_current_k[6], m_current_k[7],
m_current_k[8], m_current_k[9]);
fprintf(stderr,"*** target Energy(idx), Pitch, and Ks = %04d(%x),%04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d, %04d\n",
@@ -2424,7 +2424,7 @@ void tms52xx_device::process(INT16 *buffer, unsigned int size)
{
bool inhibit_state = (m_inhibit && (m_interp_period != 0)); // disable inhibit when reaching the last interp period, but don't overwrite the tms->inhibit value
#ifdef PERFECT_INTERPOLATION_HACK
- int samples_per_frame = (m_subc_reload!=0)? 175:266; // either (13 A cycles + 12 B cycles) * 7 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 7 interps for SPKSLOW
+ int samples_per_frame = (m_subc_reload!=0)? 175:266; // either (13 A cycles + 12 B cycles) * 7 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 7 interps for SPKSLOW
//int samples_per_frame = (m_subc_reload!=0)?200:304; // either (13 A cycles + 12 B cycles) * 8 interps for normal SPEAK/SPKEXT, or (13*2 A cycles + 12 B cycles) * 8 interps for SPKSLOW
int current_sample = (m_subcycle - m_subc_reload)+(m_PC*(3-m_subc_reload))+((m_subc_reload?25:38)*((m_interp_period-1)&7));
@@ -2573,14 +2573,14 @@ void tms52xx_device::process(INT16 *buffer, unsigned int size)
m_PC++;
}
/* Circuit 412 in the patent ensures that when INHIBIT is true,
- * during the period from IP=7 PC=12 T12, to IP=0 PC=12 T12, the pitch
- * count is forced to 0; since the initial stop happens right before
- * the switch to IP=0 PC=0 and this code is located after the switch would
- * happen, we check for ip=0 inhibit=1, which covers that whole range.
- * The purpose of Circuit 412 is to prevent a spurious click caused by
- * the voiced source being fed to the filter before all the values have
- * been updated during ip=0 when interpolation was inhibited.
- */
+ * during the period from IP=7 PC=12 T12, to IP=0 PC=12 T12, the pitch
+ * count is forced to 0; since the initial stop happens right before
+ * the switch to IP=0 PC=0 and this code is located after the switch would
+ * happen, we check for ip=0 inhibit=1, which covers that whole range.
+ * The purpose of Circuit 412 is to prevent a spurious click caused by
+ * the voiced source being fed to the filter before all the values have
+ * been updated during ip=0 when interpolation was inhibited.
+ */
m_pitch_count++;
if (m_pitch_count >= m_current_pitch) m_pitch_count = 0;
if ((m_interp_period == 0) && m_inhibit) m_pitch_count = 0;
@@ -2606,7 +2606,7 @@ empty:
m_subcycle = m_subc_reload;
m_PC++;
}
- buffer[buf_count] = -1; // should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4)
+ buffer[buf_count] = -1; // should be just -1; actual chip outputs -1 every idle sample; (cf note in data sheet, p 10, table 4)
buf_count++;
size--;
}
@@ -2622,13 +2622,13 @@ INT32 tms52xx_device::lattice_filter()
{
/* Lattice filter here */
/* Aug/05/07: redone as unrolled loop, for clarity - LN
- * Originally Copied verbatim from table I in US patent 4,209,804, now updated
- * to be in same order as the actual chip does it, not that it matters.
- * notation equivalencies from table:
- * Yn(i) == m_u[n-1]
- * Kn = m_current_k[n-1]
- * bn = m_x[n-1]
- */
+ * Originally Copied verbatim from table I in US patent 4,209,804, now updated
+ * to be in same order as the actual chip does it, not that it matters.
+ * notation equivalencies from table:
+ * Yn(i) == m_u[n-1]
+ * Kn = m_current_k[n-1]
+ * bn = m_x[n-1]
+ */
m_u[10] = matrix_multiply(m_previous_energy, (m_excitation_data<<6)); //Y(11)
m_u[9] = m_u[10] - matrix_multiply(m_current_k[9], m_x[9]);
@@ -2694,9 +2694,9 @@ void tms52xx_device::data_write(int data)
logerror("tms52xx: data_write triggered talk status to go active!\n");
#endif
/* ...then we now have enough bytes to start talking; clear out
- * the new frame parameters (it will become old frame just before the first call to parse_frame())
- * TODO: the 3 lines below (and others) are needed for victory
- * to not fail its selftest due to a sample ending too late, may require additional investigation */
+ * the new frame parameters (it will become old frame just before the first call to parse_frame())
+ * TODO: the 3 lines below (and others) are needed for victory
+ * to not fail its selftest due to a sample ending too late, may require additional investigation */
m_subcycle = m_subc_reload;
m_PC = 0;
m_interp_period = reload_table[m_tms5220c_rate & 0x3]; // is this correct? should this be always 7 instead, so that the new frame is loaded quickly?
@@ -2747,7 +2747,7 @@ void tms52xx_device::process_command(unsigned char cmd)
m_schedule_dummy_read = false;
(void)m_read_mem(1);
}
- m_data_register = m_read_mem(8); // read one byte from speech ROM...
+ m_data_register = m_read_mem(8); // read one byte from speech ROM...
m_RDB_flag = true;
}
break;
@@ -2781,7 +2781,7 @@ void tms52xx_device::process_command(unsigned char cmd)
}
break;
- case 0x50: // speak
+ case 0x50: // speak
if (m_schedule_dummy_read)
{
m_schedule_dummy_read = false;
@@ -2842,16 +2842,16 @@ void tms52xx_device::parse_frame()
int indx, i, rep_flag;
/* We actually don't care how many bits are left in the fifo here; the
- * frame subpart will be processed normally, and any bits extracted 'past
- * the end' of the fifo will be read as zeroes; the fifo being emptied will
- * set the /BE latch which will halt speech exactly as if a stop frame had
- * been encountered (instead of whatever partial frame was read); the same
- * exact circuitry is used for both on the real chip, see us patent 4335277
- * sheet 16, gates 232a (decode stop frame) and 232b (decode /BE plus DDIS
- * (decode disable) which is active during speak external). */
+ * frame subpart will be processed normally, and any bits extracted 'past
+ * the end' of the fifo will be read as zeroes; the fifo being emptied will
+ * set the /BE latch which will halt speech exactly as if a stop frame had
+ * been encountered (instead of whatever partial frame was read); the same
+ * exact circuitry is used for both on the real chip, see us patent 4335277
+ * sheet 16, gates 232a (decode stop frame) and 232b (decode /BE plus DDIS
+ * (decode disable) which is active during speak external). */
/* if the chip is a tms5220C, and the rate mode is set to that each frame (0x04 bit set)
- * has a 2 bit rate preceding it, grab two bits here and store them as the rate; */
+ * has a 2 bit rate preceding it, grab two bits here and store them as the rate; */
if ((m_variant == SUBTYPE_TMS5220C) && (m_tms5220c_rate & 0x04))
{
indx = extract_bits(2);
@@ -2895,7 +2895,7 @@ void tms52xx_device::parse_frame()
update_status_and_ints();
if (!m_talk_status) goto ranout;
/* if this is a repeat frame, just do nothing, it will reuse the
- * old coefficients */
+ * old coefficients */
if (rep_flag) return;
// extract first 4 K coefficients
@@ -2972,8 +2972,8 @@ void tms52xx_device::update_status_and_ints()
update_ready_state();
/* BL is set if neither byte 9 nor 8 of the fifo are in use; this
- * translates to having fifo_count (which ranges from 0 bytes in use to 16
- * bytes used) being less than or equal to 8. Victory/Victorba depends on this. */
+ * translates to having fifo_count (which ranges from 0 bytes in use to 16
+ * bytes used) being less than or equal to 8. Victory/Victorba depends on this. */
if (m_fifo_count <= 8)
{
// generate an interrupt if necessary; if /BL was inactive and is now active, set int.
@@ -2984,7 +2984,7 @@ void tms52xx_device::update_status_and_ints()
m_buffer_low = false;
/* BE is set if neither byte 15 nor 14 of the fifo are in use; this
- * translates to having fifo_count equal to exactly 0 */
+ * translates to having fifo_count equal to exactly 0 */
if (m_fifo_count == 0)
{
// generate an interrupt if necessary; if /BE was inactive and is now active, set int.
@@ -2995,8 +2995,8 @@ void tms52xx_device::update_status_and_ints()
m_buffer_empty = false;
/* TS is talk status and is set elsewhere in the fifo parser and in
- * the SPEAK command handler; however, if /BE is true during speak external
- * mode, it is immediately unset here. */
+ * the SPEAK command handler; however, if /BE is true during speak external
+ * mode, it is immediately unset here. */
if (m_speak_external && m_buffer_empty)
{
// generate an interrupt: /TS was active, and is now inactive.
@@ -3007,7 +3007,7 @@ void tms52xx_device::update_status_and_ints()
}
}
/* Note that TS being unset will also generate an interrupt when a STOP
- * frame is encountered; this is handled in the sample generator code and not here */
+ * frame is encountered; this is handled in the sample generator code and not here */
}
/******************************************************************************
@@ -3050,12 +3050,12 @@ int tms52xx_device::extract_bits(int count)
int tms52xx_device::status_read()
{
if (m_RDB_flag)
- { // if last command was read, return data register
+ { // if last command was read, return data register
m_RDB_flag = false;
return m_data_register;
}
else
- { // read status
+ { // read status
// clear the interrupt pin on status read
set_interrupt_state(0);
#ifdef DEBUG_PIN_READS
@@ -3151,7 +3151,7 @@ void tms52xx_device::device_timer(emu_timer &timer, device_timer_id id, int para
#endif
m_stream->update();
data_write(m_write_latch);
- break;
+ break;
case 0x01:
// Read
// bring up to date first
@@ -3214,12 +3214,12 @@ WRITE_LINE_MEMBER( tms52xx_device::rsq_w )
logerror("tms52xx: Scheduling ready cycle for /RS...\n");
#endif
/* upon /RS being activated, /READY goes inactive after 100 nsec from
- * data sheet, through 3 asynchronous gates on patent. This is effectively
- * within one clock, so we immediately set io_ready to 0 and activate the callback. */
+ * data sheet, through 3 asynchronous gates on patent. This is effectively
+ * within one clock, so we immediately set io_ready to 0 and activate the callback. */
m_io_ready = 0;
update_ready_state();
/* How long does /READY stay inactive, when /RS is pulled low?
- * I believe its almost always ~16 clocks (25 usec at 800khz as shown on the datasheet) */
+ * I believe its almost always ~16 clocks (25 usec at 800khz as shown on the datasheet) */
m_ready_timer->adjust(attotime::from_hz(clock()/16));
}
}
@@ -3270,22 +3270,22 @@ WRITE_LINE_MEMBER( tms52xx_device::wsq_w )
logerror("tms52xx: Scheduling ready cycle for /WS...\n");
#endif
/* upon /WS being activated, /READY goes inactive after 100 nsec
- * from data sheet, through 3 asynchronous gates on patent.
- * This is effectively within one clock, so we immediately set
- * io_ready to 0 and activate the callback. */
+ * from data sheet, through 3 asynchronous gates on patent.
+ * This is effectively within one clock, so we immediately set
+ * io_ready to 0 and activate the callback. */
m_io_ready = 0;
update_ready_state();
/* Now comes the complicated part: long does /READY stay inactive
- * when /WS is pulled low? This depends ENTIRELY on the command written,
- * or whether the chip is in speak external mode or not...
- * Speak external mode: ~16 cycles
- * Command Mode:
- * SPK: ? cycles
- * SPKEXT: ? cycles
- * RDBY: between 60 and 140 cycles
- * RB: ? cycles (80?)
- * RST: between 60 and 140 cycles
- * SET RATE (5220C only): ? cycles (probably ~16) */
+ * when /WS is pulled low? This depends ENTIRELY on the command written,
+ * or whether the chip is in speak external mode or not...
+ * Speak external mode: ~16 cycles
+ * Command Mode:
+ * SPK: ? cycles
+ * SPKEXT: ? cycles
+ * RDBY: between 60 and 140 cycles
+ * RB: ? cycles (80?)
+ * RST: between 60 and 140 cycles
+ * SET RATE (5220C only): ? cycles (probably ~16) */
// TODO: actually HANDLE the timing differences! currently just assuming always 16 cycles
m_ready_timer->adjust(attotime::from_hz(clock()/16));
@@ -3446,4 +3446,3 @@ const device_type TMS5220N = &device_creator<tms5220n_device>;
const device_type TMS5220CN = &device_creator<tms5220cn_device>;
const device_type TMC0285N = &device_creator<tmc0285n_device>;
const device_type TMS5200N = &device_creator<tms5200n_device>;
-
diff --git a/src/emu/sound/tms5220.h b/src/emu/sound/tms5220.h
index 0a2e5adcf64..d8b27b898d1 100644
--- a/src/emu/sound/tms5220.h
+++ b/src/emu/sound/tms5220.h
@@ -13,12 +13,12 @@
struct tms5220_interface
{
- devcb_write_line irq_func; /* IRQ callback function, active low, i.e. state=0 */
- devcb_write_line readyq_func; /* Ready callback function, active low, i.e. state=0 */
+ devcb_write_line irq_func; /* IRQ callback function, active low, i.e. state=0 */
+ devcb_write_line readyq_func; /* Ready callback function, active low, i.e. state=0 */
- int (*read)(device_t *device, int count); /* speech ROM read callback */
- void (*load_address)(device_t *device, int data); /* speech ROM load address callback */
- void (*read_and_branch)(device_t *device); /* speech ROM read and branch callback */
+ int (*read)(device_t *device, int count); /* speech ROM read callback */
+ void (*load_address)(device_t *device, int data); /* speech ROM load address callback */
+ void (*read_and_branch)(device_t *device); /* speech ROM read and branch callback */
};
/* Control lines - once written to will switch interface into
@@ -42,7 +42,7 @@ double tms5220_time_to_ready(device_t *device);
void tms5220_set_frequency(device_t *device, int frequency);
class tms5220_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
tms5220_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -123,12 +123,12 @@ extern const device_type TMS5200N;
struct tms52xx_config
{
- devcb_write_line irq_func; // IRQ callback function, active low, i.e. state=0 (TODO: change to ASSERT/CLEAR)
- devcb_write_line readyq_func; // Ready callback function, active low, i.e. state=0
+ devcb_write_line irq_func; // IRQ callback function, active low, i.e. state=0 (TODO: change to ASSERT/CLEAR)
+ devcb_write_line readyq_func; // Ready callback function, active low, i.e. state=0
- devcb_read8 read_mem; // speech ROM read callback
- devcb_write8 load_address; // speech ROM load address callback
- devcb_write8 read_and_branch; // speech ROM read and branch callback
+ devcb_read8 read_mem; // speech ROM read callback
+ devcb_write8 load_address; // speech ROM load address callback
+ devcb_write8 read_and_branch; // speech ROM read and branch callback
};
@@ -174,103 +174,103 @@ private:
inline int int_read();
// coefficient tables
- const int m_variant; // Variant of the 5xxx - see tms5110r.h
+ const int m_variant; // Variant of the 5xxx - see tms5110r.h
// coefficient tables
const struct tms5100_coeffs *m_coeff;
// callbacks
- devcb_resolved_write_line m_irq_func;
- devcb_resolved_write_line m_readyq_func;
- devcb_resolved_read8 m_read_mem;
- devcb_resolved_write8 m_load_address;
- devcb_resolved_write8 m_read_and_branch;
+ devcb_resolved_write_line m_irq_func;
+ devcb_resolved_write_line m_readyq_func;
+ devcb_resolved_read8 m_read_mem;
+ devcb_resolved_write8 m_load_address;
+ devcb_resolved_write8 m_read_and_branch;
// these contain data that describes the 128-bit data FIFO
- UINT8 m_fifo[FIFO_SIZE];
- UINT8 m_fifo_head;
- UINT8 m_fifo_tail;
- int m_fifo_count;
- int m_fifo_bits_taken;
+ UINT8 m_fifo[FIFO_SIZE];
+ UINT8 m_fifo_head;
+ UINT8 m_fifo_tail;
+ int m_fifo_count;
+ int m_fifo_bits_taken;
// these contain global status bits
- bool m_speaking_now; // True only if actual speech is being generated right now. Is set when a speak vsm command happens OR when speak external happens and buffer low becomes nontrue; Is cleared when speech halts after the last stop frame or the last frame after talk status is otherwise cleared.
- bool m_speak_external; // If 1, DDIS is 1, i.e. Speak External command in progress, writes go to FIFO.
- bool m_talk_status; // If 1, TS status bit is 1, i.e. speak or speak external is in progress and we have not encountered a stop frame yet; talk_status differs from speaking_now in that speaking_now is set as soon as a speak or speak external command is started; talk_status does NOT go active until after 8 bytes are written to the fifo on a speak external command, otherwise the two are the same. TS is cleared by 3 things: 1. when a STOP command has just been processed as a new frame in the speech stream; 2. if the fifo runs out in speak external mode; 3. on power-up/during a reset command; When it gets cleared, speak_external is also cleared, an interrupt is generated, and speaking_now will be cleared when the next frame starts.
- bool m_buffer_low; // If 1, FIFO has less than 8 bytes in it
- bool m_buffer_empty; // If 1, FIFO is empty
- int m_irq_pin; // state of the IRQ pin (output)
- int m_ready_pin; // state of the READY pin (output)
+ bool m_speaking_now; // True only if actual speech is being generated right now. Is set when a speak vsm command happens OR when speak external happens and buffer low becomes nontrue; Is cleared when speech halts after the last stop frame or the last frame after talk status is otherwise cleared.
+ bool m_speak_external; // If 1, DDIS is 1, i.e. Speak External command in progress, writes go to FIFO.
+ bool m_talk_status; // If 1, TS status bit is 1, i.e. speak or speak external is in progress and we have not encountered a stop frame yet; talk_status differs from speaking_now in that speaking_now is set as soon as a speak or speak external command is started; talk_status does NOT go active until after 8 bytes are written to the fifo on a speak external command, otherwise the two are the same. TS is cleared by 3 things: 1. when a STOP command has just been processed as a new frame in the speech stream; 2. if the fifo runs out in speak external mode; 3. on power-up/during a reset command; When it gets cleared, speak_external is also cleared, an interrupt is generated, and speaking_now will be cleared when the next frame starts.
+ bool m_buffer_low; // If 1, FIFO has less than 8 bytes in it
+ bool m_buffer_empty; // If 1, FIFO is empty
+ int m_irq_pin; // state of the IRQ pin (output)
+ int m_ready_pin; // state of the READY pin (output)
// these contain data describing the current and previous voice frames
#define M_OLD_FRAME_SILENCE_FLAG m_OLDE // 1 if E=0, 0 otherwise.
#define M_OLD_FRAME_UNVOICED_FLAG m_OLDP // 1 if P=0 (unvoiced), 0 if voiced
- bool m_OLDE;
- bool m_OLDP;
+ bool m_OLDE;
+ bool m_OLDP;
-#define M_NEW_FRAME_STOP_FLAG (m_new_frame_energy_idx == 0xF) // 1 if this is a stop (Energy = 0xF) frame
-#define M_NEW_FRAME_SILENCE_FLAG (m_new_frame_energy_idx == 0) // ditto as above
-#define M_NEW_FRAME_UNVOICED_FLAG (m_new_frame_pitch_idx == 0) // ditto as above
- int m_new_frame_energy_idx;
- int m_new_frame_pitch_idx;
- int m_new_frame_k_idx[10];
+#define M_NEW_FRAME_STOP_FLAG (m_new_frame_energy_idx == 0xF) // 1 if this is a stop (Energy = 0xF) frame
+#define M_NEW_FRAME_SILENCE_FLAG (m_new_frame_energy_idx == 0) // ditto as above
+#define M_NEW_FRAME_UNVOICED_FLAG (m_new_frame_pitch_idx == 0) // ditto as above
+ int m_new_frame_energy_idx;
+ int m_new_frame_pitch_idx;
+ int m_new_frame_k_idx[10];
// these are all used to contain the current state of the sound generation
#ifndef PERFECT_INTERPOLATION_HACK
- INT16 m_current_energy;
- INT16 m_current_pitch;
- INT16 m_current_k[10];
+ INT16 m_current_energy;
+ INT16 m_current_pitch;
+ INT16 m_current_k[10];
- INT16 m_target_energy;
- INT16 m_target_pitch;
- INT16 m_target_k[10];
+ INT16 m_target_energy;
+ INT16 m_target_pitch;
+ INT16 m_target_k[10];
#else
- int m_old_frame_energy_idx;
- int m_old_frame_pitch_idx;
- int m_old_frame_k_idx[10];
+ int m_old_frame_energy_idx;
+ int m_old_frame_pitch_idx;
+ int m_old_frame_k_idx[10];
- INT32 m_current_energy;
- INT32 m_current_pitch;
- INT32 m_current_k[10];
+ INT32 m_current_energy;
+ INT32 m_current_pitch;
+ INT32 m_current_k[10];
- INT32 m_target_energy;
- INT32 m_target_pitch;
- INT32 m_target_k[10];
+ INT32 m_target_energy;
+ INT32 m_target_pitch;
+ INT32 m_target_k[10];
#endif
- UINT16 m_previous_energy; // needed for lattice filter to match patent
- int m_subcycle; // contains the current subcycle for a given PC: 0 is A' (only used on SPKSLOW mode on 51xx), 1 is A, 2 is B
- int m_subc_reload; // contains 1 for normal speech, 0 when SPKSLOW is active
- int m_PC; // current parameter counter (what param is being interpolated), ranges from 0 to 12
+ UINT16 m_previous_energy; // needed for lattice filter to match patent
+ int m_subcycle; // contains the current subcycle for a given PC: 0 is A' (only used on SPKSLOW mode on 51xx), 1 is A, 2 is B
+ int m_subc_reload; // contains 1 for normal speech, 0 when SPKSLOW is active
+ int m_PC; // current parameter counter (what param is being interpolated), ranges from 0 to 12
// TODO/NOTE: the current interpolation period, counts 1,2,3,4,5,6,7,0 for divide by 8,8,8,4,4,4,2,1
- int m_interp_period; // the current interpolation period
- bool m_inhibit; // If 1, interpolation is inhibited until the DIV1 period
- UINT8 m_tms5220c_rate; // only relevant for tms5220C's multi frame rate feature; is the actual 4 bit value written on a 0x2* or 0x0* command
- UINT16 m_pitch_count; // pitch counter; provides chirp rom address
+ int m_interp_period; // the current interpolation period
+ bool m_inhibit; // If 1, interpolation is inhibited until the DIV1 period
+ UINT8 m_tms5220c_rate; // only relevant for tms5220C's multi frame rate feature; is the actual 4 bit value written on a 0x2* or 0x0* command
+ UINT16 m_pitch_count; // pitch counter; provides chirp rom address
- INT32 m_u[11];
- INT32 m_x[10];
+ INT32 m_u[11];
+ INT32 m_x[10];
- UINT16 m_RNG; // the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13
- INT16 m_excitation_data;
+ UINT16 m_RNG; // the random noise generator configuration is: 1 + x + x^3 + x^4 + x^13
+ INT16 m_excitation_data;
// R Nabet : These have been added to emulate speech Roms
- bool m_schedule_dummy_read; // set after each load address, so that next read operation is preceded by a dummy read
- UINT8 m_data_register; // data register, used by read command
- bool m_RDB_flag; // whether we should read data register or status register
+ bool m_schedule_dummy_read; // set after each load address, so that next read operation is preceded by a dummy read
+ UINT8 m_data_register; // data register, used by read command
+ bool m_RDB_flag; // whether we should read data register or status register
// io_ready: page 3 of the datasheet specifies that READY will be asserted until
// data is available or processed by the system.
- int m_io_ready;
+ int m_io_ready;
// flag for "true" timing involving rs/ws
- bool m_true_timing;
+ bool m_true_timing;
// rsws - state, rs bit 1, ws bit 0
- int m_rs_ws;
- UINT8 m_read_latch;
- UINT8 m_write_latch;
+ int m_rs_ws;
+ UINT8 m_read_latch;
+ UINT8 m_write_latch;
// The TMS52xx has two different ways of providing output data: the
// analog speaker pin (which was usually used) and the Digital I/O pin.
@@ -278,11 +278,11 @@ private:
// funny clipping/clamping logic, while the digital pin gives full 12? bit
// resolution of the output data.
// TODO: add a way to set/reset this other than the FORCE_DIGITAL define
- bool m_digital_select;
+ bool m_digital_select;
- sound_stream *m_stream;
+ sound_stream *m_stream;
- emu_timer *m_ready_timer;
+ emu_timer *m_ready_timer;
};
class tms5220n_device : public tms52xx_device
diff --git a/src/emu/sound/tms5220r.c b/src/emu/sound/tms5220r.c
index 667151ce48e..ba56a3fe352 100644
--- a/src/emu/sound/tms5220r.c
+++ b/src/emu/sound/tms5220r.c
@@ -104,4 +104,3 @@ static const char chirptable[51]={
static const char interp_coeff[8] = {
3, 3, 3, 2, 2, 1, 1, 0
};
-
diff --git a/src/emu/sound/upd7759.c b/src/emu/sound/upd7759.c
index 329278a278f..0db1b6c658a 100644
--- a/src/emu/sound/upd7759.c
+++ b/src/emu/sound/upd7759.c
@@ -125,8 +125,8 @@
#include "upd7759.h"
-#define DEBUG_STATES (0)
-#define DEBUG_METHOD mame_printf_debug
+#define DEBUG_STATES (0)
+#define DEBUG_METHOD mame_printf_debug
@@ -137,9 +137,9 @@
*************************************************************/
/* step value fractional bits */
-#define FRAC_BITS 20
-#define FRAC_ONE (1 << FRAC_BITS)
-#define FRAC_MASK (FRAC_ONE - 1)
+#define FRAC_BITS 20
+#define FRAC_ONE (1 << FRAC_BITS)
+#define FRAC_MASK (FRAC_ONE - 1)
/* chip states */
enum
@@ -170,49 +170,49 @@ enum
struct upd7759_state
{
device_t *device;
- sound_stream *channel; /* stream channel for playback */
+ sound_stream *channel; /* stream channel for playback */
/* chip configuration */
- UINT8 sample_offset_shift; /* header sample address shift (access data > 0xffff) */
+ UINT8 sample_offset_shift; /* header sample address shift (access data > 0xffff) */
/* internal clock to output sample rate mapping */
- UINT32 pos; /* current output sample position */
- UINT32 step; /* step value per output sample */
- attotime clock_period; /* clock period */
- emu_timer *timer; /* timer */
+ UINT32 pos; /* current output sample position */
+ UINT32 step; /* step value per output sample */
+ attotime clock_period; /* clock period */
+ emu_timer *timer; /* timer */
/* I/O lines */
- UINT8 fifo_in; /* last data written to the sound chip */
- UINT8 reset; /* current state of the RESET line */
- UINT8 start; /* current state of the START line */
- UINT8 drq; /* current state of the DRQ line */
- void (*drqcallback)(device_t *device, int param); /* drq callback */
+ UINT8 fifo_in; /* last data written to the sound chip */
+ UINT8 reset; /* current state of the RESET line */
+ UINT8 start; /* current state of the START line */
+ UINT8 drq; /* current state of the DRQ line */
+ void (*drqcallback)(device_t *device, int param); /* drq callback */
/* internal state machine */
- INT8 state; /* current overall chip state */
- INT32 clocks_left; /* number of clocks left in this state */
- UINT16 nibbles_left; /* number of ADPCM nibbles left to process */
- UINT8 repeat_count; /* number of repeats remaining in current repeat block */
- INT8 post_drq_state; /* state we will be in after the DRQ line is dropped */
- INT32 post_drq_clocks; /* clocks that will be left after the DRQ line is dropped */
- UINT8 req_sample; /* requested sample number */
- UINT8 last_sample; /* last sample number available */
- UINT8 block_header; /* header byte */
- UINT8 sample_rate; /* number of UPD clocks per ADPCM nibble */
- UINT8 first_valid_header; /* did we get our first valid header yet? */
- UINT32 offset; /* current ROM offset */
- UINT32 repeat_offset; /* current ROM repeat offset */
+ INT8 state; /* current overall chip state */
+ INT32 clocks_left; /* number of clocks left in this state */
+ UINT16 nibbles_left; /* number of ADPCM nibbles left to process */
+ UINT8 repeat_count; /* number of repeats remaining in current repeat block */
+ INT8 post_drq_state; /* state we will be in after the DRQ line is dropped */
+ INT32 post_drq_clocks; /* clocks that will be left after the DRQ line is dropped */
+ UINT8 req_sample; /* requested sample number */
+ UINT8 last_sample; /* last sample number available */
+ UINT8 block_header; /* header byte */
+ UINT8 sample_rate; /* number of UPD clocks per ADPCM nibble */
+ UINT8 first_valid_header; /* did we get our first valid header yet? */
+ UINT32 offset; /* current ROM offset */
+ UINT32 repeat_offset; /* current ROM repeat offset */
/* ADPCM processing */
- INT8 adpcm_state; /* ADPCM state index */
- UINT8 adpcm_data; /* current byte of ADPCM data */
- INT16 sample; /* current sample value */
+ INT8 adpcm_state; /* ADPCM state index */
+ UINT8 adpcm_data; /* current byte of ADPCM data */
+ INT16 sample; /* current sample value */
/* ROM access */
- UINT8 * rom; /* pointer to ROM data or NULL for slave mode */
- UINT8 * rombase; /* pointer to ROM data or NULL for slave mode */
- UINT32 romoffset; /* ROM offset to make save/restore easier */
- UINT32 rommask; /* maximum address offset */
+ UINT8 * rom; /* pointer to ROM data or NULL for slave mode */
+ UINT8 * rombase; /* pointer to ROM data or NULL for slave mode */
+ UINT32 romoffset; /* ROM offset to make save/restore easier */
+ UINT32 rommask; /* maximum address offset */
};
@@ -305,13 +305,13 @@ static void advance_state(upd7759_state *chip)
if (DEBUG_STATES) DEBUG_METHOD("uPD7759: req_sample = %02X\n", chip->req_sample);
/* 35+ cycles after we get here, the /DRQ goes low
- * (first byte (number of samples in ROM) should be sent in response)
- *
- * (35 is the minimum number of cycles I found during heavy tests.
- * Depending on the state the chip was in just before the /MD was set to 0 (reset, standby
- * or just-finished-playing-previous-sample) this number can range from 35 up to ~24000).
- * It also varies slightly from test to test, but not much - a few cycles at most.) */
- chip->clocks_left = 70; /* 35 - breaks cotton */
+ * (first byte (number of samples in ROM) should be sent in response)
+ *
+ * (35 is the minimum number of cycles I found during heavy tests.
+ * Depending on the state the chip was in just before the /MD was set to 0 (reset, standby
+ * or just-finished-playing-previous-sample) this number can range from 35 up to ~24000).
+ * It also varies slightly from test to test, but not much - a few cycles at most.) */
+ chip->clocks_left = 70; /* 35 - breaks cotton */
chip->state = STATE_FIRST_REQ;
break;
@@ -334,7 +334,7 @@ static void advance_state(upd7759_state *chip)
chip->drq = 1;
/* 28 cycles later, we will latch this value and request another byte */
- chip->clocks_left = 28; /* 28 - breaks cotton */
+ chip->clocks_left = 28; /* 28 - breaks cotton */
chip->state = (chip->req_sample > chip->last_sample) ? STATE_IDLE : STATE_DUMMY1;
break;
@@ -403,30 +403,30 @@ static void advance_state(upd7759_state *chip)
/* our next step depends on the top two bits */
switch (chip->block_header & 0xc0)
{
- case 0x00: /* silence */
+ case 0x00: /* silence */
chip->clocks_left = 1024 * ((chip->block_header & 0x3f) + 1);
chip->state = (chip->block_header == 0 && chip->first_valid_header) ? STATE_IDLE : STATE_BLOCK_HEADER;
chip->sample = 0;
chip->adpcm_state = 0;
break;
- case 0x40: /* 256 nibbles */
+ case 0x40: /* 256 nibbles */
chip->sample_rate = (chip->block_header & 0x3f) + 1;
chip->nibbles_left = 256;
- chip->clocks_left = 36; /* just a guess */
+ chip->clocks_left = 36; /* just a guess */
chip->state = STATE_NIBBLE_MSN;
break;
- case 0x80: /* n nibbles */
+ case 0x80: /* n nibbles */
chip->sample_rate = (chip->block_header & 0x3f) + 1;
- chip->clocks_left = 36; /* just a guess */
+ chip->clocks_left = 36; /* just a guess */
chip->state = STATE_NIBBLE_COUNT;
break;
- case 0xc0: /* repeat loop */
+ case 0xc0: /* repeat loop */
chip->repeat_count = (chip->block_header & 7) + 1;
chip->repeat_offset = chip->offset;
- chip->clocks_left = 36; /* just a guess */
+ chip->clocks_left = 36; /* just a guess */
chip->state = STATE_BLOCK_HEADER;
break;
}
@@ -444,7 +444,7 @@ static void advance_state(upd7759_state *chip)
chip->drq = 1;
/* 36?? cycles later, we will latch this value and request another byte */
- chip->clocks_left = 36; /* just a guess */
+ chip->clocks_left = 36; /* just a guess */
chip->state = STATE_NIBBLE_MSN;
break;
@@ -789,13 +789,13 @@ const device_type UPD7759 = &device_creator<upd7759_device>;
upd7759_device::upd7759_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, UPD7759, "uPD7759", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(upd7759_state);
}
upd7759_device::upd7759_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(upd7759_state);
}
diff --git a/src/emu/sound/upd7759.h b/src/emu/sound/upd7759.h
index db4d1c913a1..dd292e1a596 100644
--- a/src/emu/sound/upd7759.h
+++ b/src/emu/sound/upd7759.h
@@ -13,11 +13,11 @@
software.
*/
-#define UPD7759_STANDARD_CLOCK XTAL_640kHz
+#define UPD7759_STANDARD_CLOCK XTAL_640kHz
struct upd7759_interface
{
- void (*drqcallback)(device_t *device, int param); /* drq callback (per chip, slave mode only) */
+ void (*drqcallback)(device_t *device, int param); /* drq callback (per chip, slave mode only) */
};
void upd7759_set_bank_base(device_t *device, offs_t base);
@@ -28,7 +28,7 @@ int upd7759_busy_r(device_t *device);
DECLARE_WRITE8_DEVICE_HANDLER( upd7759_port_w );
class upd7759_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
upd7759_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/vlm5030.c b/src/emu/sound/vlm5030.c
index 024ea6acf06..455c6f8d022 100644
--- a/src/emu/sound/vlm5030.c
+++ b/src/emu/sound/vlm5030.c
@@ -197,14 +197,14 @@ SPC SPB SPA
*/
static const int vlm5030_speed_table[8] =
{
- IP_SIZE_NORMAL,
- IP_SIZE_FAST,
- IP_SIZE_FASTER,
- IP_SIZE_FASTER,
- IP_SIZE_NORMAL,
- IP_SIZE_SLOWER,
- IP_SIZE_SLOW,
- IP_SIZE_SLOW
+ IP_SIZE_NORMAL,
+ IP_SIZE_FAST,
+ IP_SIZE_FASTER,
+ IP_SIZE_FASTER,
+ IP_SIZE_NORMAL,
+ IP_SIZE_SLOWER,
+ IP_SIZE_SLOW,
+ IP_SIZE_SLOW
};
static const char VLM_NAME[] = "VLM5030";
@@ -222,7 +222,7 @@ static int get_bits(vlm5030_state *chip, int sbit,int bits)
int data;
data = chip->rom[offset&chip->address_mask] +
- (((int)chip->rom[(offset+1)&chip->address_mask])*256);
+ (((int)chip->rom[(offset+1)&chip->address_mask])*256);
data >>= (sbit&7);
data &= (0xff>>(8-bits));
@@ -244,19 +244,19 @@ static int parse_frame (vlm5030_state *chip)
/* command byte check */
cmd = chip->rom[chip->address&chip->address_mask];
if( cmd & 0x01 )
- { /* extend frame */
+ { /* extend frame */
chip->new_energy = chip->new_pitch = 0;
for(i=0;i<=9;i++)
chip->new_k[i] = 0;
chip->address++;
if( cmd & 0x02 )
- { /* end of speech */
+ { /* end of speech */
/* logerror("VLM5030 %04X end \n",chip->address ); */
return 0;
}
else
- { /* silent frame */
+ { /* silent frame */
int nums = ( (cmd>>2)+1 )*2;
/* logerror("VLM5030 %04X silent %d frame\n",chip->address,nums ); */
return nums * FR_SIZE;
@@ -319,7 +319,7 @@ static STREAM_UPDATE( vlm5030_update_callback )
/* change to new frame */
chip->interp_count = parse_frame(chip); /* with change phase */
if ( chip->interp_count == 0 )
- { /* end mark found */
+ { /* end mark found */
chip->interp_count = FR_SIZE;
chip->sample_count = chip->frame_size; /* end -> stop time */
chip->phase = PH_STOP;
@@ -367,7 +367,7 @@ static STREAM_UPDATE( vlm5030_update_callback )
current_val = 0x00;
}
else if (chip->old_pitch <= 1)
- { /* generate unvoiced samples here */
+ { /* generate unvoiced samples here */
current_val = (chip->device->machine().rand()&1) ? chip->current_energy : -chip->current_energy;
}
else
@@ -459,16 +459,16 @@ static void vlm5030_setup_parameter(vlm5030_state *chip, UINT8 param)
chip->interp_step = 4; /* 9600bps : no interporator */
else if(param&1) /* bit1 = 0 & bit0 = 1 , 4800bps */
chip->interp_step = 2; /* 4800bps : 2 interporator */
- else /* bit1 = bit0 = 0 : 2400bps */
+ else /* bit1 = bit0 = 0 : 2400bps */
chip->interp_step = 1; /* 2400bps : 4 interporator */
/* bit 3,4,5 : speed (frame size) */
chip->frame_size = vlm5030_speed_table[(param>>3) &7];
/* bit 6,7 : low / high pitch */
- if(param&0x80) /* bit7=1 , high pitch */
+ if(param&0x80) /* bit7=1 , high pitch */
chip->pitch_offset = -8;
- else if(param&0x40) /* bit6=1 , low pitch */
+ else if(param&0x40) /* bit6=1 , low pitch */
chip->pitch_offset = 8;
else
chip->pitch_offset = 0;
@@ -548,7 +548,7 @@ void vlm5030_rst (device_t *device, int pin )
if( chip->pin_RST )
{
if( !pin )
- { /* H -> L : latch parameters */
+ { /* H -> L : latch parameters */
chip->pin_RST = 0;
vlm5030_setup_parameter(chip, chip->latch_data);
}
@@ -556,7 +556,7 @@ void vlm5030_rst (device_t *device, int pin )
else
{
if( pin )
- { /* L -> H : reset chip */
+ { /* L -> H : reset chip */
chip->pin_RST = 1;
if( chip->pin_BSY )
{
@@ -585,11 +585,11 @@ void vlm5030_st(device_t *device, int pin )
{
/* pin level is change */
if( !pin )
- { /* H -> L */
+ { /* H -> L */
chip->pin_ST = 0;
if( chip->pin_VCU )
- { /* direct access mode & address High */
+ { /* direct access mode & address High */
chip->vcu_addr_h = ((int)chip->latch_data<<8) + 0x01;
}
else
@@ -597,15 +597,15 @@ void vlm5030_st(device_t *device, int pin )
/* start speech */
/* check access mode */
if( chip->vcu_addr_h )
- { /* direct access mode */
+ { /* direct access mode */
chip->address = (chip->vcu_addr_h&0xff00) + chip->latch_data;
chip->vcu_addr_h = 0;
}
else
- { /* indirect accedd mode */
+ { /* indirect accedd mode */
table = (chip->latch_data&0xfe) + (((int)chip->latch_data&1)<<8);
chip->address = (((int)chip->rom[table&chip->address_mask])<<8)
- | chip->rom[(table+1)&chip->address_mask];
+ | chip->rom[(table+1)&chip->address_mask];
#if 0
/* show unsupported parameter message */
if( chip->interp_step != 1)
@@ -623,7 +623,7 @@ if( chip->interp_step != 1)
}
}
else
- { /* L -> H */
+ { /* L -> H */
chip->pin_ST = 1;
/* setup speech , BSY on after 30ms? */
chip->phase = PH_SETUP;
@@ -691,7 +691,7 @@ const device_type VLM5030 = &device_creator<vlm5030_device>;
vlm5030_device::vlm5030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, VLM5030, "VLM5030", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(vlm5030_state);
}
@@ -733,5 +733,3 @@ void vlm5030_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/vlm5030.h b/src/emu/sound/vlm5030.h
index 2a63d25648c..688210efa24 100644
--- a/src/emu/sound/vlm5030.h
+++ b/src/emu/sound/vlm5030.h
@@ -25,7 +25,7 @@ void vlm5030_vcu(device_t *device, int pin );
void vlm5030_st(device_t *device, int pin );
class vlm5030_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
vlm5030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/votrax.c b/src/emu/sound/votrax.c
index cc92bc59e07..df9c76b4942 100644
--- a/src/emu/sound/votrax.c
+++ b/src/emu/sound/votrax.c
@@ -45,12 +45,12 @@
// DEBUGGING
//**************************************************************************
-#define TEMP_HACKS (1)
+#define TEMP_HACKS (1)
-#define LOG_TIMING (0)
-#define LOG_LOWPARAM (0)
-#define LOG_GLOTTAL (0)
-#define LOG_TRANSITION (0)
+#define LOG_TIMING (0)
+#define LOG_LOWPARAM (0)
+#define LOG_GLOTTAL (0)
+#define LOG_TRANSITION (0)
@@ -60,8 +60,8 @@
// note that according to the patent timing circuit, p1/p2 and phi1/phi2
// run 4x faster than all references in the patent text
-const UINT32 P_CLOCK_BIT = 5; // 5 according to timing diagram
-const UINT32 PHI_CLOCK_BIT = 3; // 3 according to timing diagram
+const UINT32 P_CLOCK_BIT = 5; // 5 according to timing diagram
+const UINT32 PHI_CLOCK_BIT = 3; // 3 according to timing diagram
@@ -81,14 +81,14 @@ ROM_END
// textual phoneme names for debugging
const char *const votrax_sc01_device::s_phoneme_table[64] =
{
- "EH3", "EH2", "EH1", "PA0", "DT", "A1", "A2", "ZH",
- "AH2", "I3", "I2", "I1", "M", "N", "B", "V",
- "CH", "SH", "Z", "AW1", "NG", "AH1", "OO1", "OO",
- "L", "K", "J", "H", "G", "F", "D", "S",
- "A", "AY", "Y1", "UH3", "AH", "P", "O", "I",
- "U", "Y", "T", "R", "E", "W", "AE", "AE1",
- "AW2", "UH2", "UH1", "UH", "O2", "O1", "IU", "U1",
- "THV", "TH", "ER", "EH", "E1", "AW", "PA1", "STOP"
+ "EH3", "EH2", "EH1", "PA0", "DT", "A1", "A2", "ZH",
+ "AH2", "I3", "I2", "I1", "M", "N", "B", "V",
+ "CH", "SH", "Z", "AW1", "NG", "AH1", "OO1", "OO",
+ "L", "K", "J", "H", "G", "F", "D", "S",
+ "A", "AY", "Y1", "UH3", "AH", "P", "O", "I",
+ "U", "Y", "T", "R", "E", "W", "AE", "AE1",
+ "AW2", "UH2", "UH1", "UH", "O2", "O1", "IU", "U1",
+ "THV", "TH", "ER", "EH", "E1", "AW", "PA1", "STOP"
};
// this waveform is derived from measuring fig. 10 in the patent
@@ -125,9 +125,9 @@ const double votrax_sc01_device::s_glottal_wave[16] =
votrax_sc01_device::votrax_sc01_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, VOTRAX_SC01, "Votrax SC-01", "votrax", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_stream(NULL),
- m_phoneme_timer(NULL)
+ device_sound_interface(mconfig, *this),
+ m_stream(NULL),
+ m_phoneme_timer(NULL)
{
}
@@ -671,7 +671,7 @@ if (LOG_TIMING | LOG_LOWPARAM | LOG_GLOTTAL | LOG_TRANSITION)
// update the state of the subphoneme clock line
UINT8 old_clock_88 = m_clock_88;
- m_clock_88 = !m_latch_42; //!(m_latch_42 | m_phi1); -- figure 7 seems to be wrong here
+ m_clock_88 = !m_latch_42; //!(m_latch_42 | m_phi1); -- figure 7 seems to be wrong here
UINT8 clock_88_rising = (old_clock_88 ^ m_clock_88) & m_clock_88;
// the A/R line holds the counter in reset except during phoneme processing,
@@ -867,9 +867,9 @@ mame_printf_debug("[PH=%02X]\n", m_latch_80);
// and then the latch to the right
if (a2_rising)
m_latch_46 = (BIT(m_counter_46, 1) << 0) |
- (BIT(m_latch_46, 0) << 1) |
- (m_0625_clock << 2) |
- (BIT(m_latch_46, 2) << 3);
+ (BIT(m_latch_46, 0) << 1) |
+ (m_0625_clock << 2) |
+ (BIT(m_latch_46, 2) << 3);
#if TEMP_HACKS
m_latch_46 = 0xf;
@@ -881,7 +881,7 @@ mame_printf_debug("[PH=%02X]\n", m_latch_80);
{
// write if not FF and low 2 bits of latch
// FF is the S/R flip-flop at 142 ANDed with !(/FA & /VA)
- case 0: case 1: case 2: case 3: case 4:
+ case 0: case 1: case 2: case 3: case 4:
if (!(m_srff_142 & !((m_fa == 0) & (m_va == 0))) && (m_latch_46 & 0x3) == 0x3)
ram_write = 1;
break;
@@ -992,7 +992,7 @@ mame_printf_debug("[PH=%02X]\n", m_latch_80);
UINT32 old_shift = m_shift_252;
m_shift_252 <<= 1;
m_shift_252 |= ((BIT(old_shift, 17) ^ BIT(old_shift, 9)) ^ (BIT(old_shift, 3) ^ BIT(old_shift, 4))) ^
- ((m_counter_250 & 0xc) == 0);
+ ((m_counter_250 & 0xc) == 0);
}
// rising edge clocks the counter
diff --git a/src/emu/sound/votrax.h b/src/emu/sound/votrax.h
index f3cb53eb210..8e4b3db69c3 100644
--- a/src/emu/sound/votrax.h
+++ b/src/emu/sound/votrax.h
@@ -63,13 +63,13 @@
struct votrax_sc01_interface
{
- devcb_write_line m_request_cb; // callback for request
+ devcb_write_line m_request_cb; // callback for request
};
// ======================> votrax_sc01_device
-class votrax_sc01_device : public device_t,
+class votrax_sc01_device : public device_t,
public device_sound_interface,
public votrax_sc01_interface
{
@@ -105,87 +105,87 @@ private:
static double apply_filter(const double *x, const double *y, const double *a, const double *b);
// internal state
- sound_stream * m_stream; // output stream
- emu_timer * m_phoneme_timer; // phoneme timer
- const UINT8 * m_rom; // pointer to our ROM
+ sound_stream * m_stream; // output stream
+ emu_timer * m_phoneme_timer; // phoneme timer
+ const UINT8 * m_rom; // pointer to our ROM
// inputs
- UINT8 m_inflection; // 2-bit inflection value
- UINT8 m_phoneme; // 6-bit phoneme value
+ UINT8 m_inflection; // 2-bit inflection value
+ UINT8 m_phoneme; // 6-bit phoneme value
// outputs
- devcb_resolved_write_line m_request_func; // request callback
- UINT8 m_request_state; // request as seen to the outside world
- UINT8 m_internal_request; // request managed by stream timing
+ devcb_resolved_write_line m_request_func; // request callback
+ UINT8 m_request_state; // request as seen to the outside world
+ UINT8 m_internal_request; // request managed by stream timing
// timing circuit
- UINT32 m_master_clock_freq; // frequency of the master clock
- UINT8 m_master_clock; // master clock
- UINT16 m_counter_34; // ripple counter @ 34
- UINT8 m_latch_70; // 4-bit latch @ 70
- UINT8 m_latch_72; // 4-bit latch @ 72
- UINT8 m_beta1; // beta1 clock state
- UINT8 m_p2; // P2 clock state
- UINT8 m_p1; // P1 clock state
- UINT8 m_phi2; // phi2 clock state
- UINT8 m_phi1; // phi1 clock state
- UINT8 m_phi2_20; // alternate phi2 clock state (20kHz)
- UINT8 m_phi1_20; // alternate phi1 clock state (20kHz)
- UINT32 m_subphoneme_period; // period of the subphoneme timer
- UINT32 m_subphoneme_count; // number of ticks executed already
- UINT8 m_clock_88; // subphoneme clock output @ 88
- UINT8 m_latch_42; // D flip-flop @ 42
- UINT8 m_counter_84; // 4-bit phoneme counter @ 84
- UINT8 m_latch_92; // 2-bit latch @ 92
+ UINT32 m_master_clock_freq; // frequency of the master clock
+ UINT8 m_master_clock; // master clock
+ UINT16 m_counter_34; // ripple counter @ 34
+ UINT8 m_latch_70; // 4-bit latch @ 70
+ UINT8 m_latch_72; // 4-bit latch @ 72
+ UINT8 m_beta1; // beta1 clock state
+ UINT8 m_p2; // P2 clock state
+ UINT8 m_p1; // P1 clock state
+ UINT8 m_phi2; // phi2 clock state
+ UINT8 m_phi1; // phi1 clock state
+ UINT8 m_phi2_20; // alternate phi2 clock state (20kHz)
+ UINT8 m_phi1_20; // alternate phi1 clock state (20kHz)
+ UINT32 m_subphoneme_period; // period of the subphoneme timer
+ UINT32 m_subphoneme_count; // number of ticks executed already
+ UINT8 m_clock_88; // subphoneme clock output @ 88
+ UINT8 m_latch_42; // D flip-flop @ 42
+ UINT8 m_counter_84; // 4-bit phoneme counter @ 84
+ UINT8 m_latch_92; // 2-bit latch @ 92
// low parameter clocking
- UINT8 m_srff_132; // S/R flip-flop @ 132
- UINT8 m_srff_114; // S/R flip-flop @ 114
- UINT8 m_srff_112; // S/R flip-flop @ 112
- UINT8 m_srff_142; // S/R flip-flop @ 142
- UINT8 m_latch_80; // phoneme timing latch @ 80
+ UINT8 m_srff_132; // S/R flip-flop @ 132
+ UINT8 m_srff_114; // S/R flip-flop @ 114
+ UINT8 m_srff_112; // S/R flip-flop @ 112
+ UINT8 m_srff_142; // S/R flip-flop @ 142
+ UINT8 m_latch_80; // phoneme timing latch @ 80
// glottal circuit
- UINT8 m_counter_220; // 4-bit counter @ 220
- UINT8 m_counter_222; // 4-bit counter @ 222
- UINT8 m_counter_224; // 4-bit counter @ 224
- UINT8 m_counter_234; // 4-bit counter @ 234
- UINT8 m_counter_236; // 4-bit counter @ 236
- UINT8 m_fgate; // FGATE signal
- UINT8 m_glottal_sync; // Glottal Sync signal
+ UINT8 m_counter_220; // 4-bit counter @ 220
+ UINT8 m_counter_222; // 4-bit counter @ 222
+ UINT8 m_counter_224; // 4-bit counter @ 224
+ UINT8 m_counter_234; // 4-bit counter @ 234
+ UINT8 m_counter_236; // 4-bit counter @ 236
+ UINT8 m_fgate; // FGATE signal
+ UINT8 m_glottal_sync; // Glottal Sync signal
// transition circuit
- UINT8 m_0625_clock; // state of 0.625kHz clock
- UINT8 m_counter_46; // 4-bit counter in block @ 46
- UINT8 m_latch_46; // 4-bit latch in block @ 46
- UINT8 m_ram[8]; // RAM to hold parameters
- UINT8 m_latch_168; // 4-bit latch @ 168
- UINT8 m_latch_170; // 4-bit latch @ 170
- UINT8 m_f1; // latched 4-bit F1 value
- UINT8 m_f2; // latched 5-bit F2 value
- UINT8 m_fc; // latched 4-bit FC value
- UINT8 m_f3; // latched 4-bit F3 value
- UINT8 m_f2q; // latched 4-bit F2Q value
- UINT8 m_va; // latched 4-bit VA value
- UINT8 m_fa; // latched 4-bit FA value
+ UINT8 m_0625_clock; // state of 0.625kHz clock
+ UINT8 m_counter_46; // 4-bit counter in block @ 46
+ UINT8 m_latch_46; // 4-bit latch in block @ 46
+ UINT8 m_ram[8]; // RAM to hold parameters
+ UINT8 m_latch_168; // 4-bit latch @ 168
+ UINT8 m_latch_170; // 4-bit latch @ 170
+ UINT8 m_f1; // latched 4-bit F1 value
+ UINT8 m_f2; // latched 5-bit F2 value
+ UINT8 m_fc; // latched 4-bit FC value
+ UINT8 m_f3; // latched 4-bit F3 value
+ UINT8 m_f2q; // latched 4-bit F2Q value
+ UINT8 m_va; // latched 4-bit VA value
+ UINT8 m_fa; // latched 4-bit FA value
// noise generator circuit
- UINT8 m_noise_clock; // clock input to noise generator
- UINT32 m_shift_252; // shift register @ 252
- UINT8 m_counter_250; // 4-bit counter @ 250
+ UINT8 m_noise_clock; // clock input to noise generator
+ UINT32 m_shift_252; // shift register @ 252
+ UINT8 m_counter_250; // 4-bit counter @ 250
// stages outputs history
- double m_ni_hist[4];
- double m_no_hist[4];
- double m_va_hist[4];
- double m_s1_hist[4];
- double m_s2g_hist[4];
- double m_s2ni_hist[4];
- double m_s2n_hist[4];
- double m_s2_hist[4];
- double m_s3_hist[4];
- double m_s4i_hist[4];
- double m_s4_hist[4];
+ double m_ni_hist[4];
+ double m_no_hist[4];
+ double m_va_hist[4];
+ double m_s1_hist[4];
+ double m_s2g_hist[4];
+ double m_s2ni_hist[4];
+ double m_s2n_hist[4];
+ double m_s2_hist[4];
+ double m_s3_hist[4];
+ double m_s4i_hist[4];
+ double m_s4_hist[4];
// static tables
static const char *const s_phoneme_table[64];
diff --git a/src/emu/sound/vrender0.c b/src/emu/sound/vrender0.c
index 3c5a77c3c87..29da5ac63b3 100644
--- a/src/emu/sound/vrender0.c
+++ b/src/emu/sound/vrender0.c
@@ -51,12 +51,12 @@ static const unsigned short ULawTo16[]=
};
-#define STATUS m_SOUNDREGS[0x404/4]
-#define CURSADDR(chan) (m_SOUNDREGS[(0x20/4)*chan+0x00])
-#define DSADDR(chan) ((m_SOUNDREGS[(0x20/4)*chan+0x08/4]>>0)&0xffff)
-#define LOOPBEGIN(chan) (m_SOUNDREGS[(0x20/4)*chan+0x0c/4]&0x3fffff)
-#define LOOPEND(chan) (m_SOUNDREGS[(0x20/4)*chan+0x10/4]&0x3fffff)
-#define ENVVOL(chan) (m_SOUNDREGS[(0x20/4)*chan+0x04/4]&0xffffff)
+#define STATUS m_SOUNDREGS[0x404/4]
+#define CURSADDR(chan) (m_SOUNDREGS[(0x20/4)*chan+0x00])
+#define DSADDR(chan) ((m_SOUNDREGS[(0x20/4)*chan+0x08/4]>>0)&0xffff)
+#define LOOPBEGIN(chan) (m_SOUNDREGS[(0x20/4)*chan+0x0c/4]&0x3fffff)
+#define LOOPEND(chan) (m_SOUNDREGS[(0x20/4)*chan+0x10/4]&0x3fffff)
+#define ENVVOL(chan) (m_SOUNDREGS[(0x20/4)*chan+0x04/4]&0xffffff)
/*
#define GETSOUNDREG16(Chan,Offs) space.read_word(m_Intf.reg_base+0x20*Chan+Offs)
@@ -83,10 +83,10 @@ const device_type VRENDER0 = &device_creator<vrender0_device>;
vrender0_device::vrender0_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, VRENDER0, "VRender0", tag, owner, clock),
- device_sound_interface(mconfig, *this),
- m_TexBase(NULL),
- m_FBBase(NULL),
- m_stream(NULL)
+ device_sound_interface(mconfig, *this),
+ m_TexBase(NULL),
+ m_FBBase(NULL),
+ m_stream(NULL)
{
}
@@ -198,7 +198,7 @@ void vrender0_device::VR0_RenderAudio(int nsamples, stream_sample_t *l, stream_s
if(!(st&(1<<i)) || !(CT2&0x80))
continue;
- if(Mode&0x10) //u-law
+ if(Mode&0x10) //u-law
{
UINT16 s=SAMPLES[a];
if((cur&0x200))
@@ -207,14 +207,14 @@ void vrender0_device::VR0_RenderAudio(int nsamples, stream_sample_t *l, stream_s
}
else
{
- if(Mode&0x20) //8bit
+ if(Mode&0x20) //8bit
{
UINT16 s=SAMPLES[a];
if((cur&0x200))
s>>=8;
sample=(signed short) (((signed char) (s&0xff))<<8);
}
- else //16bit
+ else //16bit
{
sample=SAMPLES[a];
}
@@ -223,7 +223,7 @@ void vrender0_device::VR0_RenderAudio(int nsamples, stream_sample_t *l, stream_s
CURSADDR(i)+=DSADD;
if(a>=LOOPEND(i))
{
- if(Mode&1) //Loop
+ if(Mode&1) //Loop
CURSADDR(i)=0;//LOOPBEGIN(i)<<10;
else
{
diff --git a/src/emu/sound/wave.c b/src/emu/sound/wave.c
index 38fca82df48..f8a029aea40 100644
--- a/src/emu/sound/wave.c
+++ b/src/emu/sound/wave.c
@@ -17,7 +17,7 @@
#include "imagedev/cassette.h"
#include "wave.h"
-#define ALWAYS_PLAY_SOUND 0
+#define ALWAYS_PLAY_SOUND 0
static STREAM_UPDATE( wave_sound_update )
{
@@ -86,7 +86,7 @@ const device_type WAVE = &device_creator<wave_device>;
wave_device::wave_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, WAVE, "Cassette", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -118,5 +118,3 @@ void wave_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/wave.h b/src/emu/sound/wave.h
index 0701b0b6c96..5efa8ef16f0 100644
--- a/src/emu/sound/wave.h
+++ b/src/emu/sound/wave.h
@@ -10,7 +10,7 @@
*****************************************************************************/
class wave_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
wave_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -28,8 +28,8 @@ private:
extern const device_type WAVE;
-#define WAVE_TAG "wave"
-#define WAVE2_TAG "wave2"
+#define WAVE_TAG "wave"
+#define WAVE2_TAG "wave2"
#define MCFG_SOUND_WAVE_ADD(_tag, _cass_tag) \
diff --git a/src/emu/sound/x1_010.c b/src/emu/sound/x1_010.c
index 8f118a86803..29d6b27d26f 100644
--- a/src/emu/sound/x1_010.c
+++ b/src/emu/sound/x1_010.c
@@ -62,33 +62,33 @@ Registers:
#define SETA_NUM_CHANNELS 16
-#define FREQ_BASE_BITS 8 // Frequency fixed decimal shift bits
-#define ENV_BASE_BITS 16 // wave form envelope fixed decimal shift bits
-#define VOL_BASE (2*32*256/30) // Volume base
+#define FREQ_BASE_BITS 8 // Frequency fixed decimal shift bits
+#define ENV_BASE_BITS 16 // wave form envelope fixed decimal shift bits
+#define VOL_BASE (2*32*256/30) // Volume base
/* this structure defines the parameters for a channel */
struct X1_010_CHANNEL {
- unsigned char status;
- unsigned char volume; // volume / wave form no.
- unsigned char frequency; // frequency / pitch lo
- unsigned char pitch_hi; // reserved / pitch hi
- unsigned char start; // start address / envelope time
- unsigned char end; // end address / envelope no.
- unsigned char reserve[2];
+ unsigned char status;
+ unsigned char volume; // volume / wave form no.
+ unsigned char frequency; // frequency / pitch lo
+ unsigned char pitch_hi; // reserved / pitch hi
+ unsigned char start; // start address / envelope time
+ unsigned char end; // end address / envelope no.
+ unsigned char reserve[2];
};
struct x1_010_state
{
/* Variables only used here */
- int rate; // Output sampling rate (Hz)
- sound_stream * stream; // Stream handle
- int address; // address eor data
- const UINT8 *region; // region name
- int sound_enable; // sound output enable/disable
- UINT8 reg[0x2000]; // X1-010 Register & wave form area
- UINT8 HI_WORD_BUF[0x2000]; // X1-010 16bit access ram check avoidance work
- UINT32 smp_offset[SETA_NUM_CHANNELS];
- UINT32 env_offset[SETA_NUM_CHANNELS];
+ int rate; // Output sampling rate (Hz)
+ sound_stream * stream; // Stream handle
+ int address; // address eor data
+ const UINT8 *region; // region name
+ int sound_enable; // sound output enable/disable
+ UINT8 reg[0x2000]; // X1-010 Register & wave form area
+ UINT8 HI_WORD_BUF[0x2000]; // X1-010 16bit access ram check avoidance work
+ UINT32 smp_offset[SETA_NUM_CHANNELS];
+ UINT32 env_offset[SETA_NUM_CHANNELS];
UINT32 base_clock;
};
@@ -110,11 +110,11 @@ INLINE x1_010_state *get_safe_token(device_t *device)
static STREAM_UPDATE( seta_update )
{
x1_010_state *info = (x1_010_state *)param;
- X1_010_CHANNEL *reg;
- int ch, i, volL, volR, freq;
- register INT8 *start, *end, data;
- register UINT8 *env;
- register UINT32 smp_offs, smp_step, env_offs, env_step, delta;
+ X1_010_CHANNEL *reg;
+ int ch, i, volL, volR, freq;
+ register INT8 *start, *end, data;
+ register UINT8 *env;
+ register UINT32 smp_offs, smp_step, env_offs, env_step, delta;
const UINT8 *snd1 = info->region;
// mixer buffer zero clear
@@ -125,10 +125,10 @@ static STREAM_UPDATE( seta_update )
for( ch = 0; ch < SETA_NUM_CHANNELS; ch++ ) {
reg = (X1_010_CHANNEL *)&(info->reg[ch*sizeof(X1_010_CHANNEL)]);
- if( (reg->status&1) != 0 ) { // Key On
+ if( (reg->status&1) != 0 ) { // Key On
stream_sample_t *bufL = outputs[0];
stream_sample_t *bufR = outputs[1];
- if( (reg->status&2) == 0 ) { // PCM sampling
+ if( (reg->status&2) == 0 ) { // PCM sampling
start = (INT8 *)(reg->start *0x1000+snd1);
end = (INT8 *)((0x100-reg->end)*0x1000+snd1);
volL = ((reg->volume>>4)&0xf)*VOL_BASE;
@@ -147,7 +147,7 @@ static STREAM_UPDATE( seta_update )
delta = smp_offs>>FREQ_BASE_BITS;
// sample ended?
if( start+delta >= end ) {
- reg->status &= 0xfe; // Key off
+ reg->status &= 0xfe; // Key off
break;
}
data = *(start+delta);
@@ -156,7 +156,7 @@ static STREAM_UPDATE( seta_update )
smp_offs += smp_step;
}
info->smp_offset[ch] = smp_offs;
- } else { // Wave form
+ } else { // Wave form
start = (INT8 *)&(info->reg[reg->volume*128+0x1000]);
smp_offs = info->smp_offset[ch];
freq = (reg->pitch_hi<<8)+reg->frequency;
@@ -175,7 +175,7 @@ static STREAM_UPDATE( seta_update )
delta = env_offs>>ENV_BASE_BITS;
// Envelope one shot mode
if( (reg->status&4) != 0 && delta >= 0x80 ) {
- reg->status &= 0xfe; // Key off
+ reg->status &= 0xfe; // Key off
break;
}
vol = *(env+(delta&0x7f));
@@ -202,10 +202,10 @@ static DEVICE_START( x1_010 )
const x1_010_interface *intf = (const x1_010_interface *)device->static_config();
x1_010_state *info = get_safe_token(device);
- info->region = *device->region();
- info->base_clock = device->clock();
- info->rate = device->clock() / 1024;
- info->address = intf->adr;
+ info->region = *device->region();
+ info->base_clock = device->clock();
+ info->rate = device->clock() / 1024;
+ info->address = intf->adr;
for( i = 0; i < SETA_NUM_CHANNELS; i++ ) {
info->smp_offset[i] = 0;
@@ -246,11 +246,11 @@ WRITE8_DEVICE_HANDLER( seta_sound_w )
int channel, reg;
offset ^= info->address;
- channel = offset/sizeof(X1_010_CHANNEL);
- reg = offset%sizeof(X1_010_CHANNEL);
+ channel = offset/sizeof(X1_010_CHANNEL);
+ reg = offset%sizeof(X1_010_CHANNEL);
if( channel < SETA_NUM_CHANNELS && reg == 0
- && (info->reg[offset]&1) == 0 && (data&1) != 0 ) {
+ && (info->reg[offset]&1) == 0 && (data&1) != 0 ) {
info->smp_offset[channel] = 0;
info->env_offset[channel] = 0;
}
@@ -266,7 +266,7 @@ WRITE8_DEVICE_HANDLER( seta_sound_w )
READ16_DEVICE_HANDLER( seta_sound_word_r )
{
x1_010_state *info = get_safe_token(device);
- UINT16 ret;
+ UINT16 ret;
ret = info->HI_WORD_BUF[offset]<<8;
ret += (seta_sound_r( device, space, offset )&0xff);
@@ -287,7 +287,7 @@ const device_type X1_010 = &device_creator<x1_010_device>;
x1_010_device::x1_010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, X1_010, "X1-010", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(x1_010_state);
}
@@ -320,5 +320,3 @@ void x1_010_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/x1_010.h b/src/emu/sound/x1_010.h
index 9405d1ea0d6..0ebd53c318c 100644
--- a/src/emu/sound/x1_010.h
+++ b/src/emu/sound/x1_010.h
@@ -8,7 +8,7 @@
struct x1_010_interface
{
- int adr; /* address */
+ int adr; /* address */
};
@@ -21,7 +21,7 @@ DECLARE_WRITE16_DEVICE_HANDLER( seta_sound_word_w );
void seta_sound_enable_w(device_t *device, int data);
class x1_010_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
x1_010_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/ym2151.c b/src/emu/sound/ym2151.c
index d69801a84de..de5c21e4ba3 100644
--- a/src/emu/sound/ym2151.c
+++ b/src/emu/sound/ym2151.c
@@ -25,53 +25,53 @@ static FILE * cymfile = NULL;
/* struct describing a single operator */
struct YM2151Operator
{
- UINT32 phase; /* accumulated operator phase */
- UINT32 freq; /* operator frequency count */
- INT32 dt1; /* current DT1 (detune 1 phase inc/decrement) value */
- UINT32 mul; /* frequency count multiply */
- UINT32 dt1_i; /* DT1 index * 32 */
- UINT32 dt2; /* current DT2 (detune 2) value */
+ UINT32 phase; /* accumulated operator phase */
+ UINT32 freq; /* operator frequency count */
+ INT32 dt1; /* current DT1 (detune 1 phase inc/decrement) value */
+ UINT32 mul; /* frequency count multiply */
+ UINT32 dt1_i; /* DT1 index * 32 */
+ UINT32 dt2; /* current DT2 (detune 2) value */
- signed int *connect; /* operator output 'direction' */
+ signed int *connect; /* operator output 'direction' */
/* only M1 (operator 0) is filled with this data: */
- signed int *mem_connect; /* where to put the delayed sample (MEM) */
- INT32 mem_value; /* delayed sample (MEM) value */
+ signed int *mem_connect; /* where to put the delayed sample (MEM) */
+ INT32 mem_value; /* delayed sample (MEM) value */
/* channel specific data; note: each operator number 0 contains channel specific data */
- UINT32 fb_shift; /* feedback shift value for operators 0 in each channel */
- INT32 fb_out_curr; /* operator feedback value (used only by operators 0) */
- INT32 fb_out_prev; /* previous feedback value (used only by operators 0) */
- UINT32 kc; /* channel KC (copied to all operators) */
- UINT32 kc_i; /* just for speedup */
- UINT32 pms; /* channel PMS */
- UINT32 ams; /* channel AMS */
+ UINT32 fb_shift; /* feedback shift value for operators 0 in each channel */
+ INT32 fb_out_curr; /* operator feedback value (used only by operators 0) */
+ INT32 fb_out_prev; /* previous feedback value (used only by operators 0) */
+ UINT32 kc; /* channel KC (copied to all operators) */
+ UINT32 kc_i; /* just for speedup */
+ UINT32 pms; /* channel PMS */
+ UINT32 ams; /* channel AMS */
/* end of channel specific data */
- UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
- UINT32 state; /* Envelope state: 4-attack(AR) 3-decay(D1R) 2-sustain(D2R) 1-release(RR) 0-off */
- UINT8 eg_sh_ar; /* (attack state) */
- UINT8 eg_sel_ar; /* (attack state) */
- UINT32 tl; /* Total attenuation Level */
- INT32 volume; /* current envelope attenuation level */
- UINT8 eg_sh_d1r; /* (decay state) */
- UINT8 eg_sel_d1r; /* (decay state) */
- UINT32 d1l; /* envelope switches to sustain state after reaching this level */
- UINT8 eg_sh_d2r; /* (sustain state) */
- UINT8 eg_sel_d2r; /* (sustain state) */
- UINT8 eg_sh_rr; /* (release state) */
- UINT8 eg_sel_rr; /* (release state) */
-
- UINT32 key; /* 0=last key was KEY OFF, 1=last key was KEY ON */
-
- UINT32 ks; /* key scale */
- UINT32 ar; /* attack rate */
- UINT32 d1r; /* decay rate */
- UINT32 d2r; /* sustain rate */
- UINT32 rr; /* release rate */
-
- UINT32 reserved0; /**/
- UINT32 reserved1; /**/
+ UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
+ UINT32 state; /* Envelope state: 4-attack(AR) 3-decay(D1R) 2-sustain(D2R) 1-release(RR) 0-off */
+ UINT8 eg_sh_ar; /* (attack state) */
+ UINT8 eg_sel_ar; /* (attack state) */
+ UINT32 tl; /* Total attenuation Level */
+ INT32 volume; /* current envelope attenuation level */
+ UINT8 eg_sh_d1r; /* (decay state) */
+ UINT8 eg_sel_d1r; /* (decay state) */
+ UINT32 d1l; /* envelope switches to sustain state after reaching this level */
+ UINT8 eg_sh_d2r; /* (sustain state) */
+ UINT8 eg_sel_d2r; /* (sustain state) */
+ UINT8 eg_sh_rr; /* (release state) */
+ UINT8 eg_sel_rr; /* (release state) */
+
+ UINT32 key; /* 0=last key was KEY OFF, 1=last key was KEY ON */
+
+ UINT32 ks; /* key scale */
+ UINT32 ar; /* attack rate */
+ UINT32 d1r; /* decay rate */
+ UINT32 d2r; /* sustain rate */
+ UINT32 rr; /* release rate */
+
+ UINT32 reserved0; /**/
+ UINT32 reserved1; /**/
};
@@ -80,132 +80,132 @@ struct YM2151
{
signed int chanout[8];
signed int m2,c1,c2; /* Phase Modulation input for operators 2,3,4 */
- signed int mem; /* one sample delay memory */
+ signed int mem; /* one sample delay memory */
- YM2151Operator oper[32]; /* the 32 operators */
+ YM2151Operator oper[32]; /* the 32 operators */
- UINT32 pan[16]; /* channels output masks (0xffffffff = enable) */
+ UINT32 pan[16]; /* channels output masks (0xffffffff = enable) */
- UINT32 eg_cnt; /* global envelope generator counter */
- UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
- UINT32 eg_timer_add; /* step of eg_timer */
- UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 3 samples (on real chip) */
+ UINT32 eg_cnt; /* global envelope generator counter */
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
+ UINT32 eg_timer_add; /* step of eg_timer */
+ UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 3 samples (on real chip) */
- UINT32 lfo_phase; /* accumulated LFO phase (0 to 255) */
- UINT32 lfo_timer; /* LFO timer */
- UINT32 lfo_timer_add; /* step of lfo_timer */
- UINT32 lfo_overflow; /* LFO generates new output when lfo_timer reaches this value */
- UINT32 lfo_counter; /* LFO phase increment counter */
- UINT32 lfo_counter_add; /* step of lfo_counter */
- UINT8 lfo_wsel; /* LFO waveform (0-saw, 1-square, 2-triangle, 3-random noise) */
- UINT8 amd; /* LFO Amplitude Modulation Depth */
- INT8 pmd; /* LFO Phase Modulation Depth */
- UINT32 lfa; /* LFO current AM output */
- INT32 lfp; /* LFO current PM output */
+ UINT32 lfo_phase; /* accumulated LFO phase (0 to 255) */
+ UINT32 lfo_timer; /* LFO timer */
+ UINT32 lfo_timer_add; /* step of lfo_timer */
+ UINT32 lfo_overflow; /* LFO generates new output when lfo_timer reaches this value */
+ UINT32 lfo_counter; /* LFO phase increment counter */
+ UINT32 lfo_counter_add; /* step of lfo_counter */
+ UINT8 lfo_wsel; /* LFO waveform (0-saw, 1-square, 2-triangle, 3-random noise) */
+ UINT8 amd; /* LFO Amplitude Modulation Depth */
+ INT8 pmd; /* LFO Phase Modulation Depth */
+ UINT32 lfa; /* LFO current AM output */
+ INT32 lfp; /* LFO current PM output */
- UINT8 test; /* TEST register */
- UINT8 ct; /* output control pins (bit1-CT2, bit0-CT1) */
+ UINT8 test; /* TEST register */
+ UINT8 ct; /* output control pins (bit1-CT2, bit0-CT1) */
- UINT32 noise; /* noise enable/period register (bit 7 - noise enable, bits 4-0 - noise period */
- UINT32 noise_rng; /* 17 bit noise shift register */
- UINT32 noise_p; /* current noise 'phase'*/
- UINT32 noise_f; /* current noise period */
+ UINT32 noise; /* noise enable/period register (bit 7 - noise enable, bits 4-0 - noise period */
+ UINT32 noise_rng; /* 17 bit noise shift register */
+ UINT32 noise_p; /* current noise 'phase'*/
+ UINT32 noise_f; /* current noise period */
- UINT32 csm_req; /* CSM KEY ON / KEY OFF sequence request */
+ UINT32 csm_req; /* CSM KEY ON / KEY OFF sequence request */
- UINT32 irq_enable; /* IRQ enable for timer B (bit 3) and timer A (bit 2); bit 7 - CSM mode (keyon to all slots, everytime timer A overflows) */
- UINT32 status; /* chip status (BUSY, IRQ Flags) */
- UINT8 connect[8]; /* channels connections */
+ UINT32 irq_enable; /* IRQ enable for timer B (bit 3) and timer A (bit 2); bit 7 - CSM mode (keyon to all slots, everytime timer A overflows) */
+ UINT32 status; /* chip status (BUSY, IRQ Flags) */
+ UINT8 connect[8]; /* channels connections */
#ifdef USE_MAME_TIMERS
/* ASG 980324 -- added for tracking timers */
- emu_timer *timer_A;
- emu_timer *timer_B;
- attotime timer_A_time[1024]; /* timer A times for MAME */
- attotime timer_B_time[256]; /* timer B times for MAME */
- int irqlinestate;
+ emu_timer *timer_A;
+ emu_timer *timer_B;
+ attotime timer_A_time[1024]; /* timer A times for MAME */
+ attotime timer_B_time[256]; /* timer B times for MAME */
+ int irqlinestate;
#else
- UINT8 tim_A; /* timer A enable (0-disabled) */
- UINT8 tim_B; /* timer B enable (0-disabled) */
- INT32 tim_A_val; /* current value of timer A */
- INT32 tim_B_val; /* current value of timer B */
- UINT32 tim_A_tab[1024]; /* timer A deltas */
- UINT32 tim_B_tab[256]; /* timer B deltas */
+ UINT8 tim_A; /* timer A enable (0-disabled) */
+ UINT8 tim_B; /* timer B enable (0-disabled) */
+ INT32 tim_A_val; /* current value of timer A */
+ INT32 tim_B_val; /* current value of timer B */
+ UINT32 tim_A_tab[1024]; /* timer A deltas */
+ UINT32 tim_B_tab[256]; /* timer B deltas */
#endif
- UINT32 timer_A_index; /* timer A index */
- UINT32 timer_B_index; /* timer B index */
- UINT32 timer_A_index_old; /* timer A previous index */
- UINT32 timer_B_index_old; /* timer B previous index */
+ UINT32 timer_A_index; /* timer A index */
+ UINT32 timer_B_index; /* timer B index */
+ UINT32 timer_A_index_old; /* timer A previous index */
+ UINT32 timer_B_index_old; /* timer B previous index */
/* Frequency-deltas to get the closest frequency possible.
- * There are 11 octaves because of DT2 (max 950 cents over base frequency)
- * and LFO phase modulation (max 800 cents below AND over base frequency)
- * Summary: octave explanation
- * 0 note code - LFO PM
- * 1 note code
- * 2 note code
- * 3 note code
- * 4 note code
- * 5 note code
- * 6 note code
- * 7 note code
- * 8 note code
- * 9 note code + DT2 + LFO PM
- * 10 note code + DT2 + LFO PM
- */
- UINT32 freq[11*768]; /* 11 octaves, 768 'cents' per octave */
+ * There are 11 octaves because of DT2 (max 950 cents over base frequency)
+ * and LFO phase modulation (max 800 cents below AND over base frequency)
+ * Summary: octave explanation
+ * 0 note code - LFO PM
+ * 1 note code
+ * 2 note code
+ * 3 note code
+ * 4 note code
+ * 5 note code
+ * 6 note code
+ * 7 note code
+ * 8 note code
+ * 9 note code + DT2 + LFO PM
+ * 10 note code + DT2 + LFO PM
+ */
+ UINT32 freq[11*768]; /* 11 octaves, 768 'cents' per octave */
/* Frequency deltas for DT1. These deltas alter operator frequency
- * after it has been taken from frequency-deltas table.
- */
- INT32 dt1_freq[8*32]; /* 8 DT1 levels, 32 KC values */
+ * after it has been taken from frequency-deltas table.
+ */
+ INT32 dt1_freq[8*32]; /* 8 DT1 levels, 32 KC values */
- UINT32 noise_tab[32]; /* 17bit Noise Generator periods */
+ UINT32 noise_tab[32]; /* 17bit Noise Generator periods */
- void (*irqhandler)(device_t *device, int irq); /* IRQ function handler */
- void (*porthandler)(device_t *, offs_t, UINT8); /* port write function handler */
+ void (*irqhandler)(device_t *device, int irq); /* IRQ function handler */
+ void (*porthandler)(device_t *, offs_t, UINT8); /* port write function handler */
device_t *device;
- unsigned int clock; /* chip clock in Hz (passed from 2151intf.c) */
- unsigned int sampfreq; /* sampling frequency in Hz (passed from 2151intf.c) */
+ unsigned int clock; /* chip clock in Hz (passed from 2151intf.c) */
+ unsigned int sampfreq; /* sampling frequency in Hz (passed from 2151intf.c) */
};
-#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
-#define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
-#define LFO_SH 10 /* 22.10 fixed point (LFO calculations) */
-#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
+#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
+#define EG_SH 16 /* 16.16 fixed point (envelope generator timing) */
+#define LFO_SH 10 /* 22.10 fixed point (LFO calculations) */
+#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
-#define FREQ_MASK ((1<<FREQ_SH)-1)
+#define FREQ_MASK ((1<<FREQ_SH)-1)
-#define ENV_BITS 10
-#define ENV_LEN (1<<ENV_BITS)
-#define ENV_STEP (128.0/ENV_LEN)
+#define ENV_BITS 10
+#define ENV_LEN (1<<ENV_BITS)
+#define ENV_STEP (128.0/ENV_LEN)
-#define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
-#define MIN_ATT_INDEX (0) /* 0 */
+#define MAX_ATT_INDEX (ENV_LEN-1) /* 1023 */
+#define MIN_ATT_INDEX (0) /* 0 */
-#define EG_ATT 4
-#define EG_DEC 3
-#define EG_SUS 2
-#define EG_REL 1
-#define EG_OFF 0
+#define EG_ATT 4
+#define EG_DEC 3
+#define EG_SUS 2
+#define EG_REL 1
+#define EG_OFF 0
-#define SIN_BITS 10
-#define SIN_LEN (1<<SIN_BITS)
-#define SIN_MASK (SIN_LEN-1)
+#define SIN_BITS 10
+#define SIN_LEN (1<<SIN_BITS)
+#define SIN_MASK (SIN_LEN-1)
-#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
+#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
#if (SAMPLE_BITS==16)
- #define FINAL_SH (0)
- #define MAXOUT (+32767)
- #define MINOUT (-32768)
+ #define FINAL_SH (0)
+ #define MAXOUT (+32767)
+ #define MINOUT (-32768)
#else
- #define FINAL_SH (8)
- #define MAXOUT (+127)
- #define MINOUT (-128)
+ #define FINAL_SH (8)
+ #define MAXOUT (+127)
+ #define MINOUT (-128)
#endif
@@ -217,7 +217,7 @@ struct YM2151
#define TL_TAB_LEN (13*2*TL_RES_LEN)
static signed int tl_tab[TL_TAB_LEN];
-#define ENV_QUIET (TL_TAB_LEN>>3)
+#define ENV_QUIET (TL_TAB_LEN>>3)
/* sin waveform table in 'decibel' scale */
static unsigned int sin_tab[SIN_LEN];
@@ -261,7 +261,7 @@ static const UINT8 eg_inc[19*RATE_STEPS]={
#define O(a) (a*RATE_STEPS)
/*note that there is no O(17) in this table - it's directly in the code */
-static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
+static const UINT8 eg_rate_select[32+64+32]={ /* Envelope Generator rates (32 + 64 rates + 32 RKS) */
/* 32 dummy (infinite time) rates */
O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
O(18),O(18),O(18),O(18),O(18),O(18),O(18),O(18),
@@ -308,7 +308,7 @@ O(16),O(16),O(16),O(16),O(16),O(16),O(16),O(16)
/*mask 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0, 0 */
#define O(a) (a*1)
-static const UINT8 eg_rate_shift[32+64+32]={ /* Envelope Generator counter shifts (32 + 64 rates + 32 RKS) */
+static const UINT8 eg_rate_shift[32+64+32]={ /* Envelope Generator counter shifts (32 + 64 rates + 32 RKS) */
/* 32 infinite time rates */
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
@@ -370,20 +370,20 @@ static const UINT32 dt2_tab[4] = { 0, 384, 500, 608 };
static const UINT8 dt1_tab[4*32] = { /* 4*32 DT1 values */
/* DT1=0 */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/* DT1=1 */
- 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
- 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 8, 8, 8,
+ 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
+ 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7, 8, 8, 8, 8,
/* DT1=2 */
- 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5,
- 5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,
+ 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5,
+ 5, 6, 6, 7, 8, 8, 9,10,11,12,13,14,16,16,16,16,
/* DT1=3 */
- 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
- 8, 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22
+ 2, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 6, 6, 7,
+ 8, 8, 9,10,11,12,13,14,16,17,19,20,22,22,22,22
};
static const UINT16 phaseinc_rom[768]={
@@ -504,14 +504,14 @@ static void init_tables(void)
/* we never reach (1<<16) here due to the (x+1) */
/* result fits within 16 bits at maximum */
- n = (int)m; /* 16 bits here */
- n >>= 4; /* 12 bits here */
- if (n&1) /* round to closest */
+ n = (int)m; /* 16 bits here */
+ n >>= 4; /* 12 bits here */
+ if (n&1) /* round to closest */
n = (n>>1)+1;
else
n = n>>1;
/* 11 bits here (rounded) */
- n <<= 2; /* 13 bits here (as in real chip) */
+ n <<= 2; /* 13 bits here (as in real chip) */
tl_tab[ x*2 + 0 ] = n;
tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
@@ -539,14 +539,14 @@ static void init_tables(void)
/* we never reach zero here due to ((i*2)+1) */
if (m>0.0)
- o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
else
- o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
o = o / (ENV_STEP/4);
n = (int)(2.0*o);
- if (n&1) /* round to closest */
+ if (n&1) /* round to closest */
n = (n>>1)+1;
else
n = n>>1;
@@ -609,8 +609,8 @@ static void init_chip_tables(YM2151 *chip)
phaseinc = (Hz*SIN_LEN) / (double)chip->sampfreq;
#endif
- phaseinc = phaseinc_rom[i]; /* real chip phase increment */
- phaseinc *= scaler; /* adjust */
+ phaseinc = phaseinc_rom[i]; /* real chip phase increment */
+ phaseinc *= scaler; /* adjust */
/* octave 2 - reference octave */
@@ -677,7 +677,7 @@ static void init_chip_tables(YM2151 *chip)
pom = (double)chip->dt1_freq[x] / mult;
pom = pom * (double)chip->sampfreq / (double)SIN_LEN;
logerror("DT1(%03i)[%02i %02i][%08x]= real %19.15f Hz emul %19.15f Hz\n",
- x, j, i, chip->dt1_freq[x], Hz, pom);
+ x, j, i, chip->dt1_freq[x], Hz, pom);
}
#endif
}
@@ -712,62 +712,62 @@ static void init_chip_tables(YM2151 *chip)
scaler = ( (double)chip->clock / 64.0 ) / ( (double)chip->sampfreq );
for (i=0; i<32; i++)
{
- j = (i!=31 ? i : 30); /* rate 30 and 31 are the same */
+ j = (i!=31 ? i : 30); /* rate 30 and 31 are the same */
j = 32-j;
- j = (65536.0 / (double)(j*32.0)); /* number of samples per one shift of the shift register */
- /*chip->noise_tab[i] = j * 64;*/ /* number of chip clock cycles per one shift */
+ j = (65536.0 / (double)(j*32.0)); /* number of samples per one shift of the shift register */
+ /*chip->noise_tab[i] = j * 64;*/ /* number of chip clock cycles per one shift */
chip->noise_tab[i] = j * 64 * scaler;
/*logerror("noise_tab[%02x]=%08x\n", i, chip->noise_tab[i]);*/
}
}
-#define KEY_ON(op, key_set){ \
- if (!(op)->key) \
- { \
- (op)->phase = 0; /* clear phase */ \
- (op)->state = EG_ATT; /* KEY ON = attack */ \
- (op)->volume += (~(op)->volume * \
- (eg_inc[(op)->eg_sel_ar + ((PSG->eg_cnt>>(op)->eg_sh_ar)&7)]) \
- ) >>4; \
- if ((op)->volume <= MIN_ATT_INDEX) \
- { \
- (op)->volume = MIN_ATT_INDEX; \
- (op)->state = EG_DEC; \
- } \
- } \
- (op)->key |= key_set; \
+#define KEY_ON(op, key_set){ \
+ if (!(op)->key) \
+ { \
+ (op)->phase = 0; /* clear phase */ \
+ (op)->state = EG_ATT; /* KEY ON = attack */ \
+ (op)->volume += (~(op)->volume * \
+ (eg_inc[(op)->eg_sel_ar + ((PSG->eg_cnt>>(op)->eg_sh_ar)&7)]) \
+ ) >>4; \
+ if ((op)->volume <= MIN_ATT_INDEX) \
+ { \
+ (op)->volume = MIN_ATT_INDEX; \
+ (op)->state = EG_DEC; \
+ } \
+ } \
+ (op)->key |= key_set; \
}
-#define KEY_OFF(op, key_clr){ \
- if ((op)->key) \
- { \
- (op)->key &= key_clr; \
- if (!(op)->key) \
- { \
- if ((op)->state>EG_REL) \
+#define KEY_OFF(op, key_clr){ \
+ if ((op)->key) \
+ { \
+ (op)->key &= key_clr; \
+ if (!(op)->key) \
+ { \
+ if ((op)->state>EG_REL) \
(op)->state = EG_REL;/* KEY OFF = release */\
- } \
- } \
+ } \
+ } \
}
INLINE void envelope_KONKOFF(YM2151 *PSG, YM2151Operator * op, int v)
{
- if (v&0x08) /* M1 */
+ if (v&0x08) /* M1 */
KEY_ON (op+0, 1)
else
KEY_OFF(op+0,~1)
- if (v&0x20) /* M2 */
+ if (v&0x20) /* M2 */
KEY_ON (op+1, 1)
else
KEY_OFF(op+1,~1)
- if (v&0x10) /* C1 */
+ if (v&0x10) /* C1 */
KEY_ON (op+2, 1)
else
KEY_OFF(op+2,~1)
- if (v&0x40) /* C2 */
+ if (v&0x40) /* C2 */
KEY_ON (op+3, 1)
else
KEY_OFF(op+3,~1)
@@ -827,7 +827,7 @@ static TIMER_CALLBACK( timer_callback_a )
machine.scheduler().timer_set(attotime::zero, FUNC(irqAon_callback), 0, chip);
}
if (chip->irq_enable & 0x80)
- chip->csm_req = 2; /* request KEY ON / KEY OFF sequence */
+ chip->csm_req = 2; /* request KEY ON / KEY OFF sequence */
}
static TIMER_CALLBACK( timer_callback_b )
{
@@ -844,7 +844,7 @@ static TIMER_CALLBACK( timer_callback_b )
static TIMER_CALLBACK( timer_callback_chip_busy )
{
YM2151 *chip = (YM2151 *)ptr;
- chip->status &= 0x7f; /* reset busy flag */
+ chip->status &= 0x7f; /* reset busy flag */
}
#endif
#endif
@@ -907,14 +907,14 @@ INLINE void set_connect(YM2151 *PSG, YM2151Operator *om1, int cha, int v)
om1->connect = &PSG->c1;
oc1->connect = &PSG->chanout[cha];
om2->connect = &PSG->c2;
- om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
+ om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
break;
case 5:
/* +----C1----+ */
/* M1-+-MEM---M2-+-OUT */
/* +----C2----+ */
- om1->connect = 0; /* special mark */
+ om1->connect = 0; /* special mark */
oc1->connect = &PSG->chanout[cha];
om2->connect = &PSG->chanout[cha];
om1->mem_connect = &PSG->m2;
@@ -928,7 +928,7 @@ INLINE void set_connect(YM2151 *PSG, YM2151Operator *om1, int cha, int v)
om1->connect = &PSG->c1;
oc1->connect = &PSG->chanout[cha];
om2->connect = &PSG->chanout[cha];
- om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
+ om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
break;
case 7:
@@ -940,7 +940,7 @@ INLINE void set_connect(YM2151 *PSG, YM2151Operator *om1, int cha, int v)
om1->connect = &PSG->chanout[cha];
oc1->connect = &PSG->chanout[cha];
om2->connect = &PSG->chanout[cha];
- om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
+ om1->mem_connect = &PSG->mem; /* store it anywhere where it will not be used */
break;
}
}
@@ -1050,7 +1050,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
/* There is no info on what YM2151 really does when busy flag is set */
if ( chip->status & 0x80 ) return;
timer_set ( attotime::from_hz(chip->clock) * 64, chip, 0, timer_callback_chip_busy);
- chip->status |= 0x80; /* set busy flag for 64 chip clock cycles */
+ chip->status |= 0x80; /* set busy flag for 64 chip clock cycles */
#endif
if (LOG_CYM_FILE && (cymfile) && (r!=0) )
@@ -1064,7 +1064,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
{
case 0x00:
switch(r){
- case 0x01: /* LFO reset(bit 1), Test Register (other bits) */
+ case 0x01: /* LFO reset(bit 1), Test Register (other bits) */
chip->test = v;
if (v&2) chip->lfo_phase = 0;
break;
@@ -1073,28 +1073,28 @@ void ym2151_write_reg(void *_chip, int r, int v)
envelope_KONKOFF(chip, &chip->oper[ (v&7)*4 ], v );
break;
- case 0x0f: /* noise mode enable, noise period */
+ case 0x0f: /* noise mode enable, noise period */
chip->noise = v;
chip->noise_f = chip->noise_tab[ v & 0x1f ];
break;
- case 0x10: /* timer A hi */
+ case 0x10: /* timer A hi */
chip->timer_A_index = (chip->timer_A_index & 0x003) | (v<<2);
break;
- case 0x11: /* timer A low */
+ case 0x11: /* timer A low */
chip->timer_A_index = (chip->timer_A_index & 0x3fc) | (v & 3);
break;
- case 0x12: /* timer B */
+ case 0x12: /* timer B */
chip->timer_B_index = v;
break;
- case 0x14: /* CSM, irq flag reset, irq enable, timer start/stop */
+ case 0x14: /* CSM, irq flag reset, irq enable, timer start/stop */
- chip->irq_enable = v; /* bit 3-timer B, bit 2-timer A, bit 7 - CSM */
+ chip->irq_enable = v; /* bit 3-timer B, bit 2-timer A, bit 7 - CSM */
- if (v&0x10) /* reset timer A irq flag */
+ if (v&0x10) /* reset timer A irq flag */
{
#ifdef USE_MAME_TIMERS
chip->status &= ~1;
@@ -1106,7 +1106,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
#endif
}
- if (v&0x20) /* reset timer B irq flag */
+ if (v&0x20) /* reset timer B irq flag */
{
#ifdef USE_MAME_TIMERS
chip->status &= ~2;
@@ -1119,7 +1119,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
}
if (v&0x02)
- { /* load and start timer B */
+ { /* load and start timer B */
#ifdef USE_MAME_TIMERS
/* ASG 980324: added a real timer */
/* start timer _only_ if it wasn't already started (it will reload time value next round) */
@@ -1137,7 +1137,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
#endif
}
else
- { /* stop timer B */
+ { /* stop timer B */
#ifdef USE_MAME_TIMERS
/* ASG 980324: added a real timer */
chip->timer_B->enable(false);
@@ -1147,7 +1147,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
}
if (v&0x01)
- { /* load and start timer A */
+ { /* load and start timer A */
#ifdef USE_MAME_TIMERS
/* ASG 980324: added a real timer */
/* start timer _only_ if it wasn't already started (it will reload time value next round) */
@@ -1165,7 +1165,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
#endif
}
else
- { /* stop timer A */
+ { /* stop timer A */
#ifdef USE_MAME_TIMERS
/* ASG 980324: added a real timer */
chip->timer_A->enable(false);
@@ -1175,21 +1175,21 @@ void ym2151_write_reg(void *_chip, int r, int v)
}
break;
- case 0x18: /* LFO frequency */
+ case 0x18: /* LFO frequency */
{
chip->lfo_overflow = ( 1 << ((15-(v>>4))+3) ) * (1<<LFO_SH);
chip->lfo_counter_add = 0x10 + (v & 0x0f);
}
break;
- case 0x19: /* PMD (bit 7==1) or AMD (bit 7==0) */
+ case 0x19: /* PMD (bit 7==1) or AMD (bit 7==0) */
if (v&0x80)
chip->pmd = v & 0x7f;
else
chip->amd = v & 0x7f;
break;
- case 0x1b: /* CT2, CT1, LFO waveform */
+ case 0x1b: /* CT2, CT1, LFO waveform */
chip->ct = v >> 6;
chip->lfo_wsel = v & 3;
if (chip->porthandler) (*chip->porthandler)(chip->device, 0 , chip->ct );
@@ -1205,7 +1205,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
op = &chip->oper[ (r&7) * 4 ];
switch(r & 0x18)
{
- case 0x00: /* RL enable, Feedback, Connection */
+ case 0x00: /* RL enable, Feedback, Connection */
op->fb_shift = ((v>>3)&7) ? ((v>>3)&7)+6:0;
chip->pan[ (r&7)*2 ] = (v & 0x40) ? ~0 : 0;
chip->pan[ (r&7)*2 +1 ] = (v & 0x80) ? ~0 : 0;
@@ -1213,7 +1213,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
set_connect(chip, op, r&7, v&7);
break;
- case 0x08: /* Key Code */
+ case 0x08: /* Key Code */
v &= 0x7f;
if (v != op->kc)
{
@@ -1250,7 +1250,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
}
break;
- case 0x10: /* Key Fraction */
+ case 0x10: /* Key Fraction */
v >>= 2;
if (v != (op->kc_i & 63))
{
@@ -1271,14 +1271,14 @@ void ym2151_write_reg(void *_chip, int r, int v)
}
break;
- case 0x18: /* PMS, AMS */
+ case 0x18: /* PMS, AMS */
op->pms = (v>>4) & 7;
op->ams = (v & 3);
break;
}
break;
- case 0x40: /* DT1, MUL */
+ case 0x40: /* DT1, MUL */
{
UINT32 olddt1_i = op->dt1_i;
UINT32 oldmul = op->mul;
@@ -1294,11 +1294,11 @@ void ym2151_write_reg(void *_chip, int r, int v)
}
break;
- case 0x60: /* TL */
+ case 0x60: /* TL */
op->tl = (v&0x7f)<<(ENV_BITS-7); /* 7bit TL */
break;
- case 0x80: /* KS, AR */
+ case 0x80: /* KS, AR */
{
UINT32 oldks = op->ks;
UINT32 oldar = op->ar;
@@ -1332,14 +1332,14 @@ void ym2151_write_reg(void *_chip, int r, int v)
}
break;
- case 0xa0: /* LFO AM enable, D1R */
+ case 0xa0: /* LFO AM enable, D1R */
op->AMmask = (v&0x80) ? ~0 : 0;
op->d1r = (v&0x1f) ? 32 + ((v&0x1f)<<1) : 0;
op->eg_sh_d1r = eg_rate_shift [op->d1r + (op->kc>>op->ks) ];
op->eg_sel_d1r= eg_rate_select[op->d1r + (op->kc>>op->ks) ];
break;
- case 0xc0: /* DT2, D2R */
+ case 0xc0: /* DT2, D2R */
{
UINT32 olddt2 = op->dt2;
op->dt2 = dt2_tab[ v>>6 ];
@@ -1351,7 +1351,7 @@ void ym2151_write_reg(void *_chip, int r, int v)
op->eg_sel_d2r= eg_rate_select[op->d2r + (op->kc>>op->ks) ];
break;
- case 0xe0: /* D1L, RR */
+ case 0xe0: /* D1L, RR */
op->d1l = d1l_tab[ v>>4 ];
op->rr = 34 + ((v&0x0f)<<2);
op->eg_sh_rr = eg_rate_shift [op->rr + (op->kc>>op->ks) ];
@@ -1519,9 +1519,9 @@ void * ym2151_init(device_t *device, int clock, int rate)
PSG->device = device;
PSG->clock = clock;
/*rate = clock/64;*/
- PSG->sampfreq = rate ? rate : 44100; /* avoid division by 0 in init_chip_tables() */
- PSG->irqhandler = NULL; /* interrupt handler */
- PSG->porthandler = NULL; /* port write handler */
+ PSG->sampfreq = rate ? rate : 44100; /* avoid division by 0 in init_chip_tables() */
+ PSG->irqhandler = NULL; /* interrupt handler */
+ PSG->porthandler = NULL; /* port write handler */
init_chip_tables( PSG );
PSG->lfo_timer_add = (1<<LFO_SH) * (clock/64.0) / PSG->sampfreq;
@@ -1596,7 +1596,7 @@ void ym2151_reset_chip(void *_chip)
{
memset(&chip->oper[i],'\0',sizeof(YM2151Operator));
chip->oper[i].volume = MAX_ATT_INDEX;
- chip->oper[i].kc_i = 768; /* min kc_i value */
+ chip->oper[i].kc_i = 768; /* min kc_i value */
}
chip->eg_timer = 0;
@@ -1634,12 +1634,12 @@ void ym2151_reset_chip(void *_chip)
chip->noise_p = 0;
chip->noise_f = chip->noise_tab[0];
- chip->csm_req = 0;
+ chip->csm_req = 0;
chip->status = 0;
- ym2151_write_reg(chip, 0x1b, 0); /* only because of CT1, CT2 output pins */
- ym2151_write_reg(chip, 0x18, 0); /* set LFO frequency */
- for (i=0x20; i<0x100; i++) /* set the operators */
+ ym2151_write_reg(chip, 0x1b, 0); /* only because of CT1, CT2 output pins */
+ ym2151_write_reg(chip, 0x18, 0); /* set LFO frequency */
+ for (i=0x20; i<0x100; i++) /* set the operators */
{
ym2151_write_reg(chip, i, 0);
}
@@ -1691,9 +1691,9 @@ INLINE void chan_calc(YM2151 *PSG, unsigned int chan)
UINT32 AM = 0;
PSG->m2 = PSG->c1 = PSG->c2 = PSG->mem = 0;
- op = &PSG->oper[chan*4]; /* M1 */
+ op = &PSG->oper[chan*4]; /* M1 */
- *op->mem_connect = op->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
+ *op->mem_connect = op->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
if (op->ams)
AM = PSG->lfa << (op->ams-1);
@@ -1718,15 +1718,15 @@ INLINE void chan_calc(YM2151 *PSG, unsigned int chan)
}
}
- env = volume_calc(op+1); /* M2 */
+ env = volume_calc(op+1); /* M2 */
if (env < ENV_QUIET)
*(op+1)->connect += op_calc(op+1, env, PSG->m2);
- env = volume_calc(op+2); /* C1 */
+ env = volume_calc(op+2); /* C1 */
if (env < ENV_QUIET)
*(op+2)->connect += op_calc(op+2, env, PSG->c1);
- env = volume_calc(op+3); /* C2 */
+ env = volume_calc(op+3); /* C2 */
if (env < ENV_QUIET)
PSG->chanout[chan] += op_calc(op+3, env, PSG->c2);
@@ -1741,9 +1741,9 @@ INLINE void chan7_calc(YM2151 *PSG)
UINT32 AM = 0;
PSG->m2 = PSG->c1 = PSG->c2 = PSG->mem = 0;
- op = &PSG->oper[7*4]; /* M1 */
+ op = &PSG->oper[7*4]; /* M1 */
- *op->mem_connect = op->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
+ *op->mem_connect = op->mem_value; /* restore delayed sample (MEM) value to m2 or c2 */
if (op->ams)
AM = PSG->lfa << (op->ams-1);
@@ -1768,22 +1768,22 @@ INLINE void chan7_calc(YM2151 *PSG)
}
}
- env = volume_calc(op+1); /* M2 */
+ env = volume_calc(op+1); /* M2 */
if (env < ENV_QUIET)
*(op+1)->connect += op_calc(op+1, env, PSG->m2);
- env = volume_calc(op+2); /* C1 */
+ env = volume_calc(op+2); /* C1 */
if (env < ENV_QUIET)
*(op+2)->connect += op_calc(op+2, env, PSG->c1);
- env = volume_calc(op+3); /* C2 */
+ env = volume_calc(op+3); /* C2 */
if (PSG->noise & 0x80)
{
UINT32 noiseout;
noiseout = 0;
if (env < 0x3ff)
- noiseout = (env ^ 0x3ff) * 2; /* range of the YM2151 noise output is -2044 to 2040 */
+ noiseout = (env ^ 0x3ff) * 2; /* range of the YM2151 noise output is -2044 to 2040 */
PSG->chanout[7] += ((PSG->noise_rng&0x10000) ? noiseout: -noiseout); /* bit 16 -> output */
}
else
@@ -2020,18 +2020,18 @@ INLINE void advance_eg(YM2151 *PSG)
PSG->eg_cnt++;
/* envelope generator */
- op = &PSG->oper[0]; /* CH 0 M1 */
+ op = &PSG->oper[0]; /* CH 0 M1 */
i = 32;
do
{
switch(op->state)
{
- case EG_ATT: /* attack phase */
+ case EG_ATT: /* attack phase */
if ( !(PSG->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
{
op->volume += (~op->volume *
- (eg_inc[op->eg_sel_ar + ((PSG->eg_cnt>>op->eg_sh_ar)&7)])
- ) >>4;
+ (eg_inc[op->eg_sel_ar + ((PSG->eg_cnt>>op->eg_sh_ar)&7)])
+ ) >>4;
if (op->volume <= MIN_ATT_INDEX)
{
@@ -2042,7 +2042,7 @@ INLINE void advance_eg(YM2151 *PSG)
}
break;
- case EG_DEC: /* decay phase */
+ case EG_DEC: /* decay phase */
if ( !(PSG->eg_cnt & ((1<<op->eg_sh_d1r)-1) ) )
{
op->volume += eg_inc[op->eg_sel_d1r + ((PSG->eg_cnt>>op->eg_sh_d1r)&7)];
@@ -2053,7 +2053,7 @@ INLINE void advance_eg(YM2151 *PSG)
}
break;
- case EG_SUS: /* sustain phase */
+ case EG_SUS: /* sustain phase */
if ( !(PSG->eg_cnt & ((1<<op->eg_sh_d2r)-1) ) )
{
op->volume += eg_inc[op->eg_sel_d2r + ((PSG->eg_cnt>>op->eg_sh_d2r)&7)];
@@ -2067,7 +2067,7 @@ INLINE void advance_eg(YM2151 *PSG)
}
break;
- case EG_REL: /* release phase */
+ case EG_REL: /* release phase */
if ( !(PSG->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
{
op->volume += eg_inc[op->eg_sel_rr + ((PSG->eg_cnt>>op->eg_sh_rr)&7)];
@@ -2148,20 +2148,20 @@ INLINE void advance(YM2151 *PSG)
else
a = (i*2) - 256;
- if (i<64) /* i = 0..63 */
- p = i*2; /* 0 to 126 step +2 */
- else if (i<128) /* i = 64..127 */
- p = 255 - i*2; /* 127 to 1 step -2 */
- else if (i<192) /* i = 128..191 */
- p = 256 - i*2; /* 0 to -126 step -2*/
- else /* i = 192..255 */
- p = i*2 - 511; /*-127 to -1 step +2*/
+ if (i<64) /* i = 0..63 */
+ p = i*2; /* 0 to 126 step +2 */
+ else if (i<128) /* i = 64..127 */
+ p = 255 - i*2; /* 127 to 1 step -2 */
+ else if (i<192) /* i = 128..191 */
+ p = 256 - i*2; /* 0 to -126 step -2*/
+ else /* i = 192..255 */
+ p = i*2 - 511; /*-127 to -1 step +2*/
break;
case 3:
- default: /*keep the compiler happy*/
+ default: /*keep the compiler happy*/
/* random */
/* the real algorithm is unknown !!!
- We just use a snapshot of data from real chip */
+ We just use a snapshot of data from real chip */
/* AM: range 0 to 255 */
/* PM: range -128 to 127 */
@@ -2175,12 +2175,12 @@ INLINE void advance(YM2151 *PSG)
/* The Noise Generator of the YM2151 is 17-bit shift register.
- * Input to the bit16 is negated (bit0 XOR bit3) (EXNOR).
- * Output of the register is negated (bit0 XOR bit3).
- * Simply use bit16 as the noise output.
- */
+ * Input to the bit16 is negated (bit0 XOR bit3) (EXNOR).
+ * Output of the register is negated (bit0 XOR bit3).
+ * Simply use bit16 as the noise output.
+ */
PSG->noise_p += PSG->noise_f;
- i = (PSG->noise_p>>16); /* number of events (shifts of the shift register) */
+ i = (PSG->noise_p>>16); /* number of events (shifts of the shift register) */
PSG->noise_p &= 0xffff;
while (i)
{
@@ -2192,13 +2192,13 @@ INLINE void advance(YM2151 *PSG)
/* phase generator */
- op = &PSG->oper[0]; /* CH 0 M1 */
+ op = &PSG->oper[0]; /* CH 0 M1 */
i = 8;
do
{
- if (op->pms) /* only when phase modulation from LFO is enabled for this channel */
+ if (op->pms) /* only when phase modulation from LFO is enabled for this channel */
{
- INT32 mod_ind = PSG->lfp; /* -128..+127 (8bits signed) */
+ INT32 mod_ind = PSG->lfp; /* -128..+127 (8bits signed) */
if (op->pms < 6)
mod_ind >>= (6 - op->pms);
else
@@ -2206,13 +2206,13 @@ INLINE void advance(YM2151 *PSG)
if (mod_ind)
{
- UINT32 kc_channel = op->kc_i + mod_ind;
+ UINT32 kc_channel = op->kc_i + mod_ind;
(op+0)->phase += ( (PSG->freq[ kc_channel + (op+0)->dt2 ] + (op+0)->dt1) * (op+0)->mul ) >> 1;
(op+1)->phase += ( (PSG->freq[ kc_channel + (op+1)->dt2 ] + (op+1)->dt1) * (op+1)->mul ) >> 1;
(op+2)->phase += ( (PSG->freq[ kc_channel + (op+2)->dt2 ] + (op+2)->dt1) * (op+2)->mul ) >> 1;
(op+3)->phase += ( (PSG->freq[ kc_channel + (op+3)->dt2 ] + (op+3)->dt1) * (op+3)->mul ) >> 1;
}
- else /* phase modulation from LFO is equal to zero */
+ else /* phase modulation from LFO is equal to zero */
{
(op+0)->phase += (op+0)->freq;
(op+1)->phase += (op+1)->freq;
@@ -2220,7 +2220,7 @@ INLINE void advance(YM2151 *PSG)
(op+3)->phase += (op+3)->freq;
}
}
- else /* phase modulation from LFO is disabled */
+ else /* phase modulation from LFO is disabled */
{
(op+0)->phase += (op+0)->freq;
(op+1)->phase += (op+1)->freq;
@@ -2234,19 +2234,19 @@ INLINE void advance(YM2151 *PSG)
/* CSM is calculated *after* the phase generator calculations (verified on real chip)
- * CSM keyon line seems to be ORed with the KO line inside of the chip.
- * The result is that it only works when KO (register 0x08) is off, ie. 0
- *
- * Interesting effect is that when timer A is set to 1023, the KEY ON happens
- * on every sample, so there is no KEY OFF at all - the result is that
- * the sound played is the same as after normal KEY ON.
- */
-
- if (PSG->csm_req) /* CSM KEYON/KEYOFF seqeunce request */
+ * CSM keyon line seems to be ORed with the KO line inside of the chip.
+ * The result is that it only works when KO (register 0x08) is off, ie. 0
+ *
+ * Interesting effect is that when timer A is set to 1023, the KEY ON happens
+ * on every sample, so there is no KEY OFF at all - the result is that
+ * the sound played is the same as after normal KEY ON.
+ */
+
+ if (PSG->csm_req) /* CSM KEYON/KEYOFF seqeunce request */
{
- if (PSG->csm_req==2) /* KEY ON */
+ if (PSG->csm_req==2) /* KEY ON */
{
- op = &PSG->oper[0]; /* CH 0 M1 */
+ op = &PSG->oper[0]; /* CH 0 M1 */
i = 32;
do
{
@@ -2256,9 +2256,9 @@ INLINE void advance(YM2151 *PSG)
}while (i);
PSG->csm_req = 1;
}
- else /* KEY OFF */
+ else /* KEY OFF */
{
- op = &PSG->oper[0]; /* CH 0 M1 */
+ op = &PSG->oper[0]; /* CH 0 M1 */
i = 32;
do
{
@@ -2309,21 +2309,21 @@ INLINE signed int acc_calc(signed int value)
/* first macro saves left and right channels to mono file */
/* second macro saves left and right channels to stereo file */
-#if 0 /*MONO*/
+#if 0 /*MONO*/
#ifdef SAVE_SEPARATE_CHANNELS
- #define SAVE_SINGLE_CHANNEL(j) \
- { signed int pom= -(chanout[j] & PSG->pan[j*2]); \
+ #define SAVE_SINGLE_CHANNEL(j) \
+ { signed int pom= -(chanout[j] & PSG->pan[j*2]); \
if (pom > 32767) pom = 32767; else if (pom < -32768) pom = -32768; \
fputc((unsigned short)pom&0xff,sample[j]); \
fputc(((unsigned short)pom>>8)&0xff,sample[j]); \
- }
+ }
#else
- #define SAVE_SINGLE_CHANNEL(j)
+ #define SAVE_SINGLE_CHANNEL(j)
#endif
-#else /*STEREO*/
+#else /*STEREO*/
#ifdef SAVE_SEPARATE_CHANNELS
- #define SAVE_SINGLE_CHANNEL(j) \
- { signed int pom = -(chanout[j] & PSG->pan[j*2]); \
+ #define SAVE_SINGLE_CHANNEL(j) \
+ { signed int pom = -(chanout[j] & PSG->pan[j*2]); \
if (pom > 32767) pom = 32767; else if (pom < -32768) pom = -32768; \
fputc((unsigned short)pom&0xff,sample[j]); \
fputc(((unsigned short)pom>>8)&0xff,sample[j]); \
@@ -2331,38 +2331,38 @@ INLINE signed int acc_calc(signed int value)
if (pom > 32767) pom = 32767; else if (pom < -32768) pom = -32768; \
fputc((unsigned short)pom&0xff,sample[j]); \
fputc(((unsigned short)pom>>8)&0xff,sample[j]); \
- }
+ }
#else
- #define SAVE_SINGLE_CHANNEL(j)
+ #define SAVE_SINGLE_CHANNEL(j)
#endif
#endif
/* first macro saves left and right channels to mono file */
/* second macro saves left and right channels to stereo file */
-#if 1 /*MONO*/
+#if 1 /*MONO*/
#ifdef SAVE_SAMPLE
- #define SAVE_ALL_CHANNELS \
- { signed int pom = outl; \
+ #define SAVE_ALL_CHANNELS \
+ { signed int pom = outl; \
/*pom = acc_calc(pom);*/ \
/*fprintf(sample[8]," %i\n",pom);*/ \
fputc((unsigned short)pom&0xff,sample[8]); \
fputc(((unsigned short)pom>>8)&0xff,sample[8]); \
- }
+ }
#else
- #define SAVE_ALL_CHANNELS
+ #define SAVE_ALL_CHANNELS
#endif
-#else /*STEREO*/
+#else /*STEREO*/
#ifdef SAVE_SAMPLE
- #define SAVE_ALL_CHANNELS \
- { signed int pom = outl; \
+ #define SAVE_ALL_CHANNELS \
+ { signed int pom = outl; \
fputc((unsigned short)pom&0xff,sample[8]); \
fputc(((unsigned short)pom>>8)&0xff,sample[8]); \
pom = outr; \
fputc((unsigned short)pom&0xff,sample[8]); \
fputc(((unsigned short)pom>>8)&0xff,sample[8]); \
- }
+ }
#else
- #define SAVE_ALL_CHANNELS
+ #define SAVE_ALL_CHANNELS
#endif
#endif
@@ -2478,7 +2478,7 @@ void ym2151_update_one(void *chip, SAMP **buffers, int length)
if ((!oldstate) && (PSG->irqhandler)) (*PSG->irqhandler)(chip->device, 1);
}
if (PSG->irq_enable & 0x80)
- PSG->csm_req = 2; /* request KEY ON / KEY OFF sequence */
+ PSG->csm_req = 2; /* request KEY ON / KEY OFF sequence */
}
}
#endif
@@ -2497,4 +2497,3 @@ void ym2151_set_port_write_handler(void *chip, void (*handler)(device_t *, offs_
YM2151 *PSG = (YM2151 *)chip;
PSG->porthandler = handler;
}
-
diff --git a/src/emu/sound/ym2413.c b/src/emu/sound/ym2413.c
index ec71681fd3d..ba0cb8acff1 100644
--- a/src/emu/sound/ym2413.c
+++ b/src/emu/sound/ym2413.c
@@ -44,36 +44,36 @@ to do:
/* output final shift */
#if (SAMPLE_BITS==16)
- #define FINAL_SH (0)
- #define MAXOUT (+32767)
- #define MINOUT (-32768)
+ #define FINAL_SH (0)
+ #define MAXOUT (+32767)
+ #define MINOUT (-32768)
#else
- #define FINAL_SH (8)
- #define MAXOUT (+127)
- #define MINOUT (-128)
+ #define FINAL_SH (8)
+ #define MAXOUT (+127)
+ #define MINOUT (-128)
#endif
-#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
-#define EG_SH 16 /* 16.16 fixed point (EG timing) */
-#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
+#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
+#define EG_SH 16 /* 16.16 fixed point (EG timing) */
+#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
-#define FREQ_MASK ((1<<FREQ_SH)-1)
+#define FREQ_MASK ((1<<FREQ_SH)-1)
/* envelope output entries */
-#define ENV_BITS 10
-#define ENV_LEN (1<<ENV_BITS)
-#define ENV_STEP (128.0/ENV_LEN)
+#define ENV_BITS 10
+#define ENV_LEN (1<<ENV_BITS)
+#define ENV_STEP (128.0/ENV_LEN)
-#define MAX_ATT_INDEX ((1<<(ENV_BITS-2))-1) /*255*/
-#define MIN_ATT_INDEX (0)
+#define MAX_ATT_INDEX ((1<<(ENV_BITS-2))-1) /*255*/
+#define MIN_ATT_INDEX (0)
/* sinwave entries */
-#define SIN_BITS 10
-#define SIN_LEN (1<<SIN_BITS)
-#define SIN_MASK (SIN_LEN-1)
+#define SIN_BITS 10
+#define SIN_LEN (1<<SIN_BITS)
+#define SIN_MASK (SIN_LEN-1)
-#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
+#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
@@ -83,12 +83,12 @@ to do:
/* Envelope Generator phases */
-#define EG_DMP 5
-#define EG_ATT 4
-#define EG_DEC 3
-#define EG_SUS 2
-#define EG_REL 1
-#define EG_OFF 0
+#define EG_DMP 5
+#define EG_ATT 4
+#define EG_DEC 3
+#define EG_SUS 2
+#define EG_REL 1
+#define EG_OFF 0
/* save output as raw 16-bit sample */
@@ -132,15 +132,15 @@ INLINE signed int acc_calc(signed int value)
static FILE *sample[1];
- #if 0 /*save to MONO file */
+ #if 0 /*save to MONO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = acc_calc(mo); \
+ { signed int pom = acc_calc(mo); \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
- #else /*save to STEREO file */
+ #else /*save to STEREO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = mo; \
+ { signed int pom = mo; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
pom = ro; \
@@ -148,7 +148,7 @@ static FILE *sample[1];
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
#define SAVE_SEPARATE_CHANNEL(j) \
- { signed int pom = outchan; \
+ { signed int pom = outchan; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
pom = chip->instvol_r[j]>>4; \
@@ -166,44 +166,44 @@ static FILE * cymfile = NULL;
struct OPLL_SLOT
{
- UINT32 ar; /* attack rate: AR<<2 */
- UINT32 dr; /* decay rate: DR<<2 */
- UINT32 rr; /* release rate:RR<<2 */
- UINT8 KSR; /* key scale rate */
- UINT8 ksl; /* keyscale level */
- UINT8 ksr; /* key scale rate: kcode>>KSR */
- UINT8 mul; /* multiple: mul_tab[ML] */
+ UINT32 ar; /* attack rate: AR<<2 */
+ UINT32 dr; /* decay rate: DR<<2 */
+ UINT32 rr; /* release rate:RR<<2 */
+ UINT8 KSR; /* key scale rate */
+ UINT8 ksl; /* keyscale level */
+ UINT8 ksr; /* key scale rate: kcode>>KSR */
+ UINT8 mul; /* multiple: mul_tab[ML] */
/* Phase Generator */
- UINT32 phase; /* frequency counter */
- UINT32 freq; /* frequency counter step */
- UINT8 fb_shift; /* feedback shift value */
- INT32 op1_out[2]; /* slot1 output for feedback */
+ UINT32 phase; /* frequency counter */
+ UINT32 freq; /* frequency counter step */
+ UINT8 fb_shift; /* feedback shift value */
+ INT32 op1_out[2]; /* slot1 output for feedback */
/* Envelope Generator */
- UINT8 eg_type; /* percussive/nonpercussive mode*/
- UINT8 state; /* phase type */
- UINT32 TL; /* total level: TL << 2 */
- INT32 TLL; /* adjusted now TL */
- INT32 volume; /* envelope counter */
- UINT32 sl; /* sustain level: sl_tab[SL] */
-
- UINT8 eg_sh_dp; /* (dump state) */
- UINT8 eg_sel_dp; /* (dump state) */
- UINT8 eg_sh_ar; /* (attack state) */
- UINT8 eg_sel_ar; /* (attack state) */
- UINT8 eg_sh_dr; /* (decay state) */
- UINT8 eg_sel_dr; /* (decay state) */
- UINT8 eg_sh_rr; /* (release state for non-perc.)*/
- UINT8 eg_sel_rr; /* (release state for non-perc.)*/
- UINT8 eg_sh_rs; /* (release state for perc.mode)*/
- UINT8 eg_sel_rs; /* (release state for perc.mode)*/
-
- UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
+ UINT8 eg_type; /* percussive/nonpercussive mode*/
+ UINT8 state; /* phase type */
+ UINT32 TL; /* total level: TL << 2 */
+ INT32 TLL; /* adjusted now TL */
+ INT32 volume; /* envelope counter */
+ UINT32 sl; /* sustain level: sl_tab[SL] */
+
+ UINT8 eg_sh_dp; /* (dump state) */
+ UINT8 eg_sel_dp; /* (dump state) */
+ UINT8 eg_sh_ar; /* (attack state) */
+ UINT8 eg_sel_ar; /* (attack state) */
+ UINT8 eg_sh_dr; /* (decay state) */
+ UINT8 eg_sel_dr; /* (decay state) */
+ UINT8 eg_sh_rr; /* (release state for non-perc.)*/
+ UINT8 eg_sel_rr; /* (release state for non-perc.)*/
+ UINT8 eg_sh_rs; /* (release state for perc.mode)*/
+ UINT8 eg_sel_rs; /* (release state for perc.mode)*/
+
+ UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
/* LFO */
- UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
- UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
+ UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
+ UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
/* waveform select */
unsigned int wavetable;
@@ -213,37 +213,37 @@ struct OPLL_CH
{
OPLL_SLOT SLOT[2];
/* phase generator state */
- UINT32 block_fnum; /* block+fnum */
- UINT32 fc; /* Freq. freqement base */
- UINT32 ksl_base; /* KeyScaleLevel Base step */
- UINT8 kcode; /* key code (for key scaling) */
- UINT8 sus; /* sus on/off (release speed in percussive mode)*/
+ UINT32 block_fnum; /* block+fnum */
+ UINT32 fc; /* Freq. freqement base */
+ UINT32 ksl_base; /* KeyScaleLevel Base step */
+ UINT8 kcode; /* key code (for key scaling) */
+ UINT8 sus; /* sus on/off (release speed in percussive mode)*/
};
/* chip state */
struct YM2413
{
- OPLL_CH P_CH[9]; /* OPLL chips have 9 channels*/
- UINT8 instvol_r[9]; /* instrument/volume (or volume/volume in percussive mode)*/
+ OPLL_CH P_CH[9]; /* OPLL chips have 9 channels*/
+ UINT8 instvol_r[9]; /* instrument/volume (or volume/volume in percussive mode)*/
- UINT32 eg_cnt; /* global envelope generator counter */
- UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
- UINT32 eg_timer_add; /* step of eg_timer */
- UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
+ UINT32 eg_cnt; /* global envelope generator counter */
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
+ UINT32 eg_timer_add; /* step of eg_timer */
+ UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
- UINT8 rhythm; /* Rhythm mode */
+ UINT8 rhythm; /* Rhythm mode */
/* LFO */
- UINT32 LFO_AM;
- INT32 LFO_PM;
- UINT32 lfo_am_cnt;
- UINT32 lfo_am_inc;
- UINT32 lfo_pm_cnt;
- UINT32 lfo_pm_inc;
+ UINT32 LFO_AM;
+ INT32 LFO_PM;
+ UINT32 lfo_am_cnt;
+ UINT32 lfo_am_inc;
+ UINT32 lfo_pm_cnt;
+ UINT32 lfo_pm_inc;
- UINT32 noise_rng; /* 23 bit noise shift register */
- UINT32 noise_p; /* current noise 'phase' */
- UINT32 noise_f; /* current noise period */
+ UINT32 noise_rng; /* 23 bit noise shift register */
+ UINT32 noise_p; /* current noise 'phase' */
+ UINT32 noise_f; /* current noise period */
/* instrument settings */
@@ -257,16 +257,16 @@ struct YM2413
/* external event callback handlers */
OPLL_UPDATEHANDLER UpdateHandler; /* stream update handler */
- void * UpdateParam; /* stream update parameter */
+ void * UpdateParam; /* stream update parameter */
- UINT32 fn_tab[1024]; /* fnumber->increment counter */
+ UINT32 fn_tab[1024]; /* fnumber->increment counter */
- UINT8 address; /* address register */
- UINT8 status; /* status flag */
+ UINT8 address; /* address register */
+ UINT8 status; /* status flag */
- int clock; /* master clock (Hz) */
- int rate; /* sampling rate (Hz) */
- double freqbase; /* frequency base */
+ int clock; /* master clock (Hz) */
+ int rate; /* sampling rate (Hz) */
+ double freqbase; /* frequency base */
device_t *device;
signed int output[2];
@@ -281,42 +281,42 @@ struct YM2413
static const UINT32 ksl_tab[8*16]=
{
/* OCT 0 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
/* OCT 1 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
- 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
+ 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
/* OCT 2 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
- 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
- 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
+ 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
+ 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
/* OCT 3 */
- 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
- 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
- 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
- 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
+ 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
+ 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
+ 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
/* OCT 4 */
- 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
- 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
- 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
+ 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
+ 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
+ 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
10.875/DV,11.250/DV,11.625/DV,12.000/DV,
/* OCT 5 */
- 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
- 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
+ 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
+ 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
12.000/DV,12.750/DV,13.125/DV,13.500/DV,
13.875/DV,14.250/DV,14.625/DV,15.000/DV,
/* OCT 6 */
- 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
+ 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
12.000/DV,13.125/DV,13.875/DV,14.625/DV,
15.000/DV,15.750/DV,16.125/DV,16.500/DV,
16.875/DV,17.250/DV,17.625/DV,18.000/DV,
/* OCT 7 */
- 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
+ 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
15.000/DV,16.125/DV,16.875/DV,17.625/DV,
18.000/DV,18.750/DV,19.125/DV,19.500/DV,
19.875/DV,20.250/DV,20.625/DV,21.000/DV
@@ -327,8 +327,8 @@ static const UINT32 ksl_tab[8*16]=
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,45 (dB)*/
#define SC(db) (UINT32) ( db * (1.0/ENV_STEP) )
static const UINT32 sl_tab[16]={
- SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
- SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(15)
+ SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
+ SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(15)
};
#undef SC
@@ -362,7 +362,7 @@ static const unsigned char eg_inc[15*RATE_STEPS]={
#define O(a) (a*RATE_STEPS)
/*note that there is no O(13) in this table - it's directly in the code */
-static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
+static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
@@ -403,7 +403,7 @@ O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
/*mask 8191, 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0 */
#define O(a) (a*1)
-static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
+static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
@@ -444,8 +444,8 @@ O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
#define ML 2
static const UINT8 mul_tab[16]= {
/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
- 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
- 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
+ 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
+ 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
};
#undef ML
@@ -457,7 +457,7 @@ static const UINT8 mul_tab[16]= {
#define TL_TAB_LEN (11*2*TL_RES_LEN)
static signed int tl_tab[TL_TAB_LEN];
-#define ENV_QUIET (TL_TAB_LEN>>5)
+#define ENV_QUIET (TL_TAB_LEN>>5)
/* sin waveform table in 'decibel' scale */
/* two waveforms on OPLL type chips */
@@ -577,41 +577,41 @@ static const INT8 lfo_pm_table[8*8] = {
static const unsigned char table[19][8] = {
/* MULT MULT modTL DcDmFb AR/DR AR/DR SL/RR SL/RR */
/* 0 1 2 3 4 5 6 7 */
- {0x49, 0x4c, 0x4c, 0x12, 0x00, 0x00, 0x00, 0x00 }, //0
+ {0x49, 0x4c, 0x4c, 0x12, 0x00, 0x00, 0x00, 0x00 }, //0
- {0x61, 0x61, 0x1e, 0x17, 0xf0, 0x78, 0x00, 0x17 }, //1
- {0x13, 0x41, 0x1e, 0x0d, 0xd7, 0xf7, 0x13, 0x13 }, //2
- {0x13, 0x01, 0x99, 0x04, 0xf2, 0xf4, 0x11, 0x23 }, //3
- {0x21, 0x61, 0x1b, 0x07, 0xaf, 0x64, 0x40, 0x27 }, //4
+ {0x61, 0x61, 0x1e, 0x17, 0xf0, 0x78, 0x00, 0x17 }, //1
+ {0x13, 0x41, 0x1e, 0x0d, 0xd7, 0xf7, 0x13, 0x13 }, //2
+ {0x13, 0x01, 0x99, 0x04, 0xf2, 0xf4, 0x11, 0x23 }, //3
+ {0x21, 0x61, 0x1b, 0x07, 0xaf, 0x64, 0x40, 0x27 }, //4
//{0x22, 0x21, 0x1e, 0x09, 0xf0, 0x76, 0x08, 0x28 }, //5
- {0x22, 0x21, 0x1e, 0x06, 0xf0, 0x75, 0x08, 0x18 }, //5
+ {0x22, 0x21, 0x1e, 0x06, 0xf0, 0x75, 0x08, 0x18 }, //5
//{0x31, 0x22, 0x16, 0x09, 0x90, 0x7f, 0x00, 0x08 }, //6
- {0x31, 0x22, 0x16, 0x05, 0x90, 0x71, 0x00, 0x13 }, //6
+ {0x31, 0x22, 0x16, 0x05, 0x90, 0x71, 0x00, 0x13 }, //6
- {0x21, 0x61, 0x1d, 0x07, 0x82, 0x80, 0x10, 0x17 }, //7
- {0x23, 0x21, 0x2d, 0x16, 0xc0, 0x70, 0x07, 0x07 }, //8
- {0x61, 0x61, 0x1b, 0x06, 0x64, 0x65, 0x10, 0x17 }, //9
+ {0x21, 0x61, 0x1d, 0x07, 0x82, 0x80, 0x10, 0x17 }, //7
+ {0x23, 0x21, 0x2d, 0x16, 0xc0, 0x70, 0x07, 0x07 }, //8
+ {0x61, 0x61, 0x1b, 0x06, 0x64, 0x65, 0x10, 0x17 }, //9
//{0x61, 0x61, 0x0c, 0x08, 0x85, 0xa0, 0x79, 0x07 }, //A
- {0x61, 0x61, 0x0c, 0x18, 0x85, 0xf0, 0x70, 0x07 }, //A
+ {0x61, 0x61, 0x0c, 0x18, 0x85, 0xf0, 0x70, 0x07 }, //A
- {0x23, 0x01, 0x07, 0x11, 0xf0, 0xa4, 0x00, 0x22 }, //B
- {0x97, 0xc1, 0x24, 0x07, 0xff, 0xf8, 0x22, 0x12 }, //C
+ {0x23, 0x01, 0x07, 0x11, 0xf0, 0xa4, 0x00, 0x22 }, //B
+ {0x97, 0xc1, 0x24, 0x07, 0xff, 0xf8, 0x22, 0x12 }, //C
//{0x61, 0x10, 0x0c, 0x08, 0xf2, 0xc4, 0x40, 0xc8 }, //D
- {0x61, 0x10, 0x0c, 0x05, 0xf2, 0xf4, 0x40, 0x44 }, //D
+ {0x61, 0x10, 0x0c, 0x05, 0xf2, 0xf4, 0x40, 0x44 }, //D
- {0x01, 0x01, 0x55, 0x03, 0xf3, 0x92, 0xf3, 0xf3 }, //E
- {0x61, 0x41, 0x89, 0x03, 0xf1, 0xf4, 0xf0, 0x13 }, //F
+ {0x01, 0x01, 0x55, 0x03, 0xf3, 0x92, 0xf3, 0xf3 }, //E
+ {0x61, 0x41, 0x89, 0x03, 0xf1, 0xf4, 0xf0, 0x13 }, //F
/* drum instruments definitions */
/* MULTI MULTI modTL xxx AR/DR AR/DR SL/RR SL/RR */
/* 0 1 2 3 4 5 6 7 */
- {0x01, 0x01, 0x16, 0x00, 0xfd, 0xf8, 0x2f, 0x6d },/* BD(multi verified, modTL verified, mod env - verified(close), carr. env verifed) */
- {0x01, 0x01, 0x00, 0x00, 0xd8, 0xd8, 0xf9, 0xf8 },/* HH(multi verified), SD(multi not used) */
- {0x05, 0x01, 0x00, 0x00, 0xf8, 0xba, 0x49, 0x55 },/* TOM(multi,env verified), TOP CYM(multi verified, env verified) */
+ {0x01, 0x01, 0x16, 0x00, 0xfd, 0xf8, 0x2f, 0x6d },/* BD(multi verified, modTL verified, mod env - verified(close), carr. env verifed) */
+ {0x01, 0x01, 0x00, 0x00, 0xd8, 0xd8, 0xf9, 0xf8 },/* HH(multi verified), SD(multi not used) */
+ {0x05, 0x01, 0x00, 0x00, 0xf8, 0xba, 0x49, 0x55 },/* TOM(multi,env verified), TOP CYM(multi verified, env verified) */
};
/* lock level of common table */
@@ -640,7 +640,7 @@ INLINE void advance_lfo(YM2413 *chip)
{
/* LFO */
chip->lfo_am_cnt += chip->lfo_am_inc;
- if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
+ if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
chip->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH);
chip->LFO_AM = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ] >> 1;
@@ -674,11 +674,11 @@ INLINE void advance(YM2413 *chip)
switch(op->state)
{
- case EG_DMP: /* dump phase */
+ case EG_DMP: /* dump phase */
/*dump phase is performed by both operators in each channel*/
/*when CARRIER envelope gets down to zero level,
- ** phases in BOTH opearators are reset (at the same time ?)
- */
+ ** phases in BOTH opearators are reset (at the same time ?)
+ */
if ( !(chip->eg_cnt & ((1<<op->eg_sh_dp)-1) ) )
{
op->volume += eg_inc[op->eg_sel_dp + ((chip->eg_cnt>>op->eg_sh_dp)&7)];
@@ -693,12 +693,12 @@ INLINE void advance(YM2413 *chip)
}
break;
- case EG_ATT: /* attack phase */
+ case EG_ATT: /* attack phase */
if ( !(chip->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
{
op->volume += (~op->volume *
- (eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)])
- ) >>2;
+ (eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)])
+ ) >>2;
if (op->volume <= MIN_ATT_INDEX)
{
@@ -708,7 +708,7 @@ INLINE void advance(YM2413 *chip)
}
break;
- case EG_DEC: /* decay phase */
+ case EG_DEC: /* decay phase */
if ( !(chip->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
{
op->volume += eg_inc[op->eg_sel_dr + ((chip->eg_cnt>>op->eg_sh_dr)&7)];
@@ -718,16 +718,16 @@ INLINE void advance(YM2413 *chip)
}
break;
- case EG_SUS: /* sustain phase */
+ case EG_SUS: /* sustain phase */
/* this is important behaviour:
- one can change percusive/non-percussive modes on the fly and
- the chip will remain in sustain phase - verified on real YM3812 */
+ one can change percusive/non-percussive modes on the fly and
+ the chip will remain in sustain phase - verified on real YM3812 */
- if(op->eg_type) /* non-percussive mode (sustained tone) */
+ if(op->eg_type) /* non-percussive mode (sustained tone) */
{
/* do nothing */
}
- else /* percussive mode */
+ else /* percussive mode */
{
/* during sustain phase chip adds Release Rate (in percussive mode) */
if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
@@ -741,27 +741,27 @@ INLINE void advance(YM2413 *chip)
}
break;
- case EG_REL: /* release phase */
+ case EG_REL: /* release phase */
/* exclude modulators in melody channels from performing anything in this mode*/
/* allowed are only carriers in melody mode and rhythm slots in rhythm mode */
/*This table shows which operators and on what conditions are allowed to perform EG_REL:
- (a) - always perform EG_REL
- (n) - never perform EG_REL
- (r) - perform EG_REL in Rhythm mode ONLY
- 0: 0 (n), 1 (a)
- 1: 2 (n), 3 (a)
- 2: 4 (n), 5 (a)
- 3: 6 (n), 7 (a)
- 4: 8 (n), 9 (a)
- 5: 10(n), 11(a)
- 6: 12(r), 13(a)
- 7: 14(r), 15(a)
- 8: 16(r), 17(a)
- */
+ (a) - always perform EG_REL
+ (n) - never perform EG_REL
+ (r) - perform EG_REL in Rhythm mode ONLY
+ 0: 0 (n), 1 (a)
+ 1: 2 (n), 3 (a)
+ 2: 4 (n), 5 (a)
+ 3: 6 (n), 7 (a)
+ 4: 8 (n), 9 (a)
+ 5: 10(n), 11(a)
+ 6: 12(r), 13(a)
+ 7: 14(r), 15(a)
+ 8: 16(r), 17(a)
+ */
if ( (i&1) || ((chip->rhythm&0x20) && (i>=12)) )/* exclude modulators */
{
- if(op->eg_type) /* non-percussive mode (sustained tone) */
+ if(op->eg_type) /* non-percussive mode (sustained tone) */
/*this is correct: use RR when SUS = OFF*/
/*and use RS when SUS = ON*/
{
@@ -790,7 +790,7 @@ INLINE void advance(YM2413 *chip)
}
}
}
- else /* percussive mode */
+ else /* percussive mode */
{
if ( !(chip->eg_cnt & ((1<<op->eg_sh_rs)-1) ) )
{
@@ -825,52 +825,52 @@ INLINE void advance(YM2413 *chip)
unsigned int block_fnum = CH->block_fnum * 2;
signed int lfo_fn_table_index_offset = lfo_pm_table[chip->LFO_PM + fnum_lfo ];
- if (lfo_fn_table_index_offset) /* LFO phase modulation active */
+ if (lfo_fn_table_index_offset) /* LFO phase modulation active */
{
block_fnum += lfo_fn_table_index_offset;
block = (block_fnum&0x1c00) >> 10;
op->phase += (chip->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
}
- else /* LFO phase modulation = zero */
+ else /* LFO phase modulation = zero */
{
op->phase += op->freq;
}
}
- else /* LFO phase modulation disabled for this operator */
+ else /* LFO phase modulation disabled for this operator */
{
op->phase += op->freq;
}
}
/* The Noise Generator of the YM3812 is 23-bit shift register.
- * Period is equal to 2^23-2 samples.
- * Register works at sampling frequency of the chip, so output
- * can change on every sample.
- *
- * Output of the register and input to the bit 22 is:
- * bit0 XOR bit14 XOR bit15 XOR bit22
- *
- * Simply use bit 22 as the noise output.
- */
+ * Period is equal to 2^23-2 samples.
+ * Register works at sampling frequency of the chip, so output
+ * can change on every sample.
+ *
+ * Output of the register and input to the bit 22 is:
+ * bit0 XOR bit14 XOR bit15 XOR bit22
+ *
+ * Simply use bit 22 as the noise output.
+ */
chip->noise_p += chip->noise_f;
- i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
+ i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
chip->noise_p &= FREQ_MASK;
while (i)
{
/*
- UINT32 j;
- j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
- chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
- */
+ UINT32 j;
+ j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
+ chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
+ */
/*
- Instead of doing all the logic operations above, we
- use a trick here (and use bit 0 as the noise output).
- The difference is only that the noise bit changes one
- step ahead. This doesn't matter since we don't know
- what is real state of the noise_rng after the reset.
- */
+ Instead of doing all the logic operations above, we
+ use a trick here (and use bit 0 as the noise output).
+ The difference is only that the noise bit changes one
+ step ahead. This doesn't matter since we don't know
+ what is real state of the noise_rng after the reset.
+ */
if (chip->noise_rng & 1) chip->noise_rng ^= 0x800302;
chip->noise_rng >>= 1;
@@ -918,7 +918,7 @@ INLINE void chan_calc( YM2413 *chip, OPLL_CH *CH )
OPLL_SLOT *SLOT;
unsigned int env;
signed int out;
- signed int phase_modulation; /* phase modulation input (SLOT 2) */
+ signed int phase_modulation; /* phase modulation input (SLOT 2) */
/* SLOT 1 */
@@ -995,15 +995,15 @@ INLINE void rhythm_calc( YM2413 *chip, OPLL_CH *CH, unsigned int noise )
OPLL_SLOT *SLOT;
signed int out;
unsigned int env;
- signed int phase_modulation; /* phase modulation input (SLOT 2) */
+ signed int phase_modulation; /* phase modulation input (SLOT 2) */
/* Bass Drum (verified on real YM3812):
- - depends on the channel 6 'connect' register:
- when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
- when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
- - output sample always is multiplied by 2
- */
+ - depends on the channel 6 'connect' register:
+ when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
+ when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
+ - output sample always is multiplied by 2
+ */
/* SLOT 1 */
@@ -1044,8 +1044,8 @@ INLINE void rhythm_calc( YM2413 *chip, OPLL_CH *CH, unsigned int noise )
/* The following formulas can be well optimized.
- I leave them in direct form for now (in case I've missed something).
- */
+ I leave them in direct form for now (in case I've missed something).
+ */
/* High Hat (verified on real YM3812) */
env = volume_calc(SLOT7_1);
@@ -1053,9 +1053,9 @@ INLINE void rhythm_calc( YM2413 *chip, OPLL_CH *CH, unsigned int noise )
{
/* high hat phase generation:
- phase = d0 or 234 (based on frequency only)
- phase = 34 or 2d0 (based on noise)
- */
+ phase = d0 or 234 (based on frequency only)
+ phase = 34 or 2d0 (based on noise)
+ */
/* base frequency derived from operator 1 in channel 7 */
unsigned char bit7 = ((SLOT7_1->phase>>FREQ_SH)>>7)&1;
@@ -1171,9 +1171,9 @@ static int init_tables(void)
/* we never reach (1<<16) here due to the (x+1) */
/* result fits within 16 bits at maximum */
- n = (int)m; /* 16 bits here */
- n >>= 4; /* 12 bits here */
- if (n&1) /* round to nearest */
+ n = (int)m; /* 16 bits here */
+ n >>= 4; /* 12 bits here */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
@@ -1204,14 +1204,14 @@ static int init_tables(void)
/* we never reach zero here due to ((i*2)+1) */
if (m>0.0)
- o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
else
- o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
o = o / (ENV_STEP/4);
n = (int)(2.0*o);
- if (n&1) /* round to nearest */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
@@ -1350,7 +1350,7 @@ static void OPLL_initalize(YM2413 *chip, device_t *device)
chip->fn_tab[i] = (UINT32)( (double)i * 64 * chip->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
#if 0
logerror("ym2413.c: fn_tab[%4i] = %08x (dec=%8i)\n",
- i, chip->fn_tab[i]>>6, chip->fn_tab[i]>>6 );
+ i, chip->fn_tab[i]>>6, chip->fn_tab[i]>>6 );
#endif
}
@@ -1550,14 +1550,14 @@ INLINE void set_sl_rr(YM2413 *chip,int slot,int v)
static void load_instrument(YM2413 *chip, UINT32 chan, UINT32 slot, UINT8* inst )
{
- set_mul (chip, slot, inst[0]);
- set_mul (chip, slot+1, inst[1]);
- set_ksl_tl (chip, chan, inst[2]);
- set_ksl_wave_fb (chip, chan, inst[3]);
- set_ar_dr (chip, slot, inst[4]);
- set_ar_dr (chip, slot+1, inst[5]);
- set_sl_rr (chip, slot, inst[6]);
- set_sl_rr (chip, slot+1, inst[7]);
+ set_mul (chip, slot, inst[0]);
+ set_mul (chip, slot+1, inst[1]);
+ set_ksl_tl (chip, chan, inst[2]);
+ set_ksl_wave_fb (chip, chan, inst[3]);
+ set_ar_dr (chip, slot, inst[4]);
+ set_ar_dr (chip, slot+1, inst[5]);
+ set_sl_rr (chip, slot, inst[6]);
+ set_sl_rr (chip, slot+1, inst[7]);
}
static void update_instrument_zero(YM2413 *chip, UINT8 r )
{
@@ -1576,74 +1576,74 @@ static void update_instrument_zero(YM2413 *chip, UINT8 r )
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_mul (chip, chan*2, inst[0]);
+ set_mul (chip, chan*2, inst[0]);
}
}
- break;
+ break;
case 1:
for (chan=0; chan<chan_max; chan++)
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_mul (chip, chan*2+1,inst[1]);
+ set_mul (chip, chan*2+1,inst[1]);
}
}
- break;
+ break;
case 2:
for (chan=0; chan<chan_max; chan++)
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_ksl_tl (chip, chan, inst[2]);
+ set_ksl_tl (chip, chan, inst[2]);
}
}
- break;
+ break;
case 3:
for (chan=0; chan<chan_max; chan++)
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_ksl_wave_fb (chip, chan, inst[3]);
+ set_ksl_wave_fb (chip, chan, inst[3]);
}
}
- break;
+ break;
case 4:
for (chan=0; chan<chan_max; chan++)
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_ar_dr (chip, chan*2, inst[4]);
+ set_ar_dr (chip, chan*2, inst[4]);
}
}
- break;
+ break;
case 5:
for (chan=0; chan<chan_max; chan++)
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_ar_dr (chip, chan*2+1,inst[5]);
+ set_ar_dr (chip, chan*2+1,inst[5]);
}
}
- break;
+ break;
case 6:
for (chan=0; chan<chan_max; chan++)
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_sl_rr (chip, chan*2, inst[6]);
+ set_sl_rr (chip, chan*2, inst[6]);
}
}
- break;
+ break;
case 7:
for (chan=0; chan<chan_max; chan++)
{
if ((chip->instvol_r[chan]&0xf0)==0)
{
- set_sl_rr (chip, chan*2+1,inst[7]);
+ set_sl_rr (chip, chan*2+1,inst[7]);
}
}
- break;
- }
+ break;
+ }
}
/* write a value v to register r on chip chip */
@@ -1669,23 +1669,23 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
switch(r&0xf0)
{
- case 0x00: /* 00-0f:control */
+ case 0x00: /* 00-0f:control */
{
switch(r&0x0f)
{
- case 0x00: /* AM/VIB/EGTYP/KSR/MULTI (modulator) */
- case 0x01: /* AM/VIB/EGTYP/KSR/MULTI (carrier) */
- case 0x02: /* Key Scale Level, Total Level (modulator) */
- case 0x03: /* Key Scale Level, carrier waveform, modulator waveform, Feedback */
- case 0x04: /* Attack, Decay (modulator) */
- case 0x05: /* Attack, Decay (carrier) */
- case 0x06: /* Sustain, Release (modulator) */
- case 0x07: /* Sustain, Release (carrier) */
+ case 0x00: /* AM/VIB/EGTYP/KSR/MULTI (modulator) */
+ case 0x01: /* AM/VIB/EGTYP/KSR/MULTI (carrier) */
+ case 0x02: /* Key Scale Level, Total Level (modulator) */
+ case 0x03: /* Key Scale Level, carrier waveform, modulator waveform, Feedback */
+ case 0x04: /* Attack, Decay (modulator) */
+ case 0x05: /* Attack, Decay (carrier) */
+ case 0x06: /* Sustain, Release (modulator) */
+ case 0x07: /* Sustain, Release (carrier) */
chip->inst_tab[0][r & 0x07] = v;
update_instrument_zero(chip,r&7);
break;
- case 0x0e: /* x, x, r,bd,sd,tom,tc,hh */
+ case 0x0e: /* x, x, r,bd,sd,tom,tc,hh */
{
if(v&0x20)
{
@@ -1803,16 +1803,16 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
chan = r&0x0f;
if (chan >= 9)
- chan -= 9; /* verified on real YM2413 */
+ chan -= 9; /* verified on real YM2413 */
CH = &chip->P_CH[chan];
if(r&0x10)
- { /* 10-18: FNUM 0-7 */
+ { /* 10-18: FNUM 0-7 */
block_fnum = (CH->block_fnum&0x0f00) | v;
}
else
- { /* 20-28: suson, keyon, block, FNUM 8 */
+ { /* 20-28: suson, keyon, block, FNUM 8 */
block_fnum = ((v&0x0f)<<8) | (CH->block_fnum&0xff);
if(v&0x10)
@@ -1859,17 +1859,17 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
}
break;
- case 0x30: /* inst 4 MSBs, VOL 4 LSBs */
+ case 0x30: /* inst 4 MSBs, VOL 4 LSBs */
{
UINT8 old_instvol;
chan = r&0x0f;
if (chan >= 9)
- chan -= 9; /* verified on real YM2413 */
+ chan -= 9; /* verified on real YM2413 */
old_instvol = chip->instvol_r[chan];
- chip->instvol_r[chan] = v; /* store for later use */
+ chip->instvol_r[chan] = v; /* store for later use */
CH = &chip->P_CH[chan];
SLOT = &CH->SLOT[SLOT2]; /* carrier */
@@ -1901,8 +1901,8 @@ static void OPLLWriteReg(YM2413 *chip, int r, int v)
#if 0
logerror("YM2413: chan#%02i inst=%02i: (r=%2x, v=%2x)\n",chan,v>>4,r,v);
- logerror(" 0:%2x 1:%2x\n",inst[0],inst[1]); logerror(" 2:%2x 3:%2x\n",inst[2],inst[3]);
- logerror(" 4:%2x 5:%2x\n",inst[4],inst[5]); logerror(" 6:%2x 7:%2x\n",inst[6],inst[7]);
+ logerror(" 0:%2x 1:%2x\n",inst[0],inst[1]); logerror(" 2:%2x 3:%2x\n",inst[2],inst[3]);
+ logerror(" 4:%2x 5:%2x\n",inst[4],inst[5]); logerror(" 6:%2x 7:%2x\n",inst[6],inst[7]);
#endif
}
}
@@ -1970,7 +1970,7 @@ static void OPLLResetChip(YM2413 *chip)
chip->eg_timer = 0;
chip->eg_cnt = 0;
- chip->noise_rng = 1; /* noise shift register */
+ chip->noise_rng = 1; /* noise shift register */
/* setup instruments table */
@@ -2044,11 +2044,11 @@ static void OPLLSetUpdateHandler(YM2413 *chip,OPLL_UPDATEHANDLER UpdateHandler,v
static void OPLLWrite(YM2413 *chip,int a,int v)
{
if( !(a&1) )
- { /* address port */
+ { /* address port */
chip->address = v & 0xff;
}
else
- { /* data port */
+ { /* data port */
if(chip->UpdateHandler) chip->UpdateHandler(chip->UpdateParam,0);
OPLLWriteReg(chip,chip->address,v);
}
@@ -2116,10 +2116,10 @@ void ym2413_set_update_handler(void *chip,OPLL_UPDATEHANDLER UpdateHandler,void
*/
void ym2413_update_one(void *_chip, SAMP **buffers, int length)
{
- YM2413 *chip = (YM2413 *)_chip;
- UINT8 rhythm = chip->rhythm&0x20;
- SAMP *bufMO = buffers[0];
- SAMP *bufRO = buffers[1];
+ YM2413 *chip = (YM2413 *)_chip;
+ UINT8 rhythm = chip->rhythm&0x20;
+ SAMP *bufMO = buffers[0];
+ SAMP *bufRO = buffers[1];
int i;
@@ -2147,7 +2147,7 @@ void ym2413_update_one(void *_chip, SAMP **buffers, int length)
chan_calc(chip, &chip->P_CH[7]);
chan_calc(chip, &chip->P_CH[8]);
}
- else /* Rhythm part */
+ else /* Rhythm part */
{
rhythm_calc(chip, &chip->P_CH[0], (chip->noise_rng>>0)&1 );
}
diff --git a/src/emu/sound/ym2413.h b/src/emu/sound/ym2413.h
index 2482d35109e..eb1b1a058f4 100644
--- a/src/emu/sound/ym2413.h
+++ b/src/emu/sound/ym2413.h
@@ -9,12 +9,12 @@
/* compiler dependence */
#ifndef __OSDCOMM_H__
#define __OSDCOMM_H__
-typedef unsigned char UINT8; /* unsigned 8bit */
-typedef unsigned short UINT16; /* unsigned 16bit */
-typedef unsigned int UINT32; /* unsigned 32bit */
-typedef signed char INT8; /* signed 8bit */
-typedef signed short INT16; /* signed 16bit */
-typedef signed int INT32; /* signed 32bit */
+typedef unsigned char UINT8; /* unsigned 8bit */
+typedef unsigned short UINT16; /* unsigned 16bit */
+typedef unsigned int UINT32; /* unsigned 32bit */
+typedef signed char INT8; /* signed 8bit */
+typedef signed short INT16; /* signed 16bit */
+typedef signed int INT32; /* signed 32bit */
#endif
typedef stream_sample_t SAMP;
diff --git a/src/emu/sound/ymdeltat.c b/src/emu/sound/ymdeltat.c
index ad715e5b563..f5ed6f3ce00 100644
--- a/src/emu/sound/ymdeltat.c
+++ b/src/emu/sound/ymdeltat.c
@@ -77,14 +77,14 @@
/* Forecast to next Forecast (rate = *8) */
/* 1/8 , 3/8 , 5/8 , 7/8 , 9/8 , 11/8 , 13/8 , 15/8 */
static const INT32 ym_deltat_decode_tableB1[16] = {
- 1, 3, 5, 7, 9, 11, 13, 15,
- -1, -3, -5, -7, -9, -11, -13, -15,
+ 1, 3, 5, 7, 9, 11, 13, 15,
+ -1, -3, -5, -7, -9, -11, -13, -15,
};
/* delta to next delta (rate= *64) */
/* 0.9 , 0.9 , 0.9 , 0.9 , 1.2 , 1.6 , 2.0 , 2.4 */
static const INT32 ym_deltat_decode_tableB2[16] = {
- 57, 57, 57, 57, 77, 102, 128, 153,
- 57, 57, 57, 57, 77, 102, 128, 153
+ 57, 57, 57, 57, 77, 102, 128, 153,
+ 57, 57, 57, 57, 77, 102, 128, 153
};
#if 0
@@ -129,9 +129,9 @@ UINT8 YM_DELTAT_ADPCM_Read(YM_DELTAT *DELTAT)
(DELTAT->status_reset_handler)(DELTAT->status_change_which_chip, DELTAT->status_change_BRDY_bit);
/* setup a timer that will callback us in 10 master clock cycles for Y8950
- * in the callback set the BRDY flag to 1 , which means we have another data ready.
- * For now, we don't really do this; we simply reset and set the flag in zero time, so that the IRQ will work.
- */
+ * in the callback set the BRDY flag to 1 , which means we have another data ready.
+ * For now, we don't really do this; we simply reset and set the flag in zero time, so that the IRQ will work.
+ */
/* set BRDY bit in status register */
if(DELTAT->status_set_handler)
if(DELTAT->status_change_BRDY_bit)
@@ -198,7 +198,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
/* handle emulation mode */
if(DELTAT->emulation_mode == YM_DELTAT_EMULATION_MODE_YM2610)
{
- v |= 0x20; /* YM2610 always uses external memory and doesn't even have memory flag bit. */
+ v |= 0x20; /* YM2610 always uses external memory and doesn't even have memory flag bit. */
}
DELTAT->portstate = v & (0x80|0x40|0x20|0x10|0x01); /* start, rec, memory mode, repeat flag copy, reset(bit0) */
@@ -221,7 +221,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
if( DELTAT->portstate&0x20 ) /* do we access external memory? */
{
DELTAT->now_addr = DELTAT->start << 1;
- DELTAT->memread = 2; /* two dummy reads needed before accesing external memory via register $08*/
+ DELTAT->memread = 2; /* two dummy reads needed before accesing external memory via register $08*/
/* if yes, then let's check if ADPCM memory is mapped and big enough */
if(DELTAT->memory == 0)
@@ -232,12 +232,12 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
}
else
{
- if( DELTAT->end >= DELTAT->memory_size ) /* Check End in Range */
+ if( DELTAT->end >= DELTAT->memory_size ) /* Check End in Range */
{
logerror("YM Delta-T ADPCM end out of range: $%08x\n", DELTAT->end);
DELTAT->end = DELTAT->memory_size - 1;
}
- if( DELTAT->start >= DELTAT->memory_size ) /* Check Start in Range */
+ if( DELTAT->start >= DELTAT->memory_size ) /* Check Start in Range */
{
logerror("YM Delta-T ADPCM start out of range: $%08x\n", DELTAT->start);
DELTAT->portstate = 0x00;
@@ -245,7 +245,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
}
}
}
- else /* we access CPU memory (ADPCM data register $08) so we only reset now_addr here */
+ else /* we access CPU memory (ADPCM data register $08) so we only reset now_addr here */
{
DELTAT->now_addr = 0;
}
@@ -263,11 +263,11 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
(DELTAT->status_set_handler)(DELTAT->status_change_which_chip, DELTAT->status_change_BRDY_bit);
}
break;
- case 0x01: /* L,R,-,-,SAMPLE,DA/AD,RAMTYPE,ROM */
+ case 0x01: /* L,R,-,-,SAMPLE,DA/AD,RAMTYPE,ROM */
/* handle emulation mode */
if(DELTAT->emulation_mode == YM_DELTAT_EMULATION_MODE_YM2610)
{
- v |= 0x01; /* YM2610 always uses ROM as an external memory and doesn't tave ROM/RAM memory flag bit. */
+ v |= 0x01; /* YM2610 always uses ROM as an external memory and doesn't tave ROM/RAM memory flag bit. */
}
DELTAT->pan = &DELTAT->output_pointer[(v>>6)&0x03];
@@ -279,11 +279,11 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
DELTAT->DRAMportshift = dram_rightshift[v&3];
/* final shift value depends on chip type and memory type selected:
- 8 for YM2610 (ROM only),
- 5 for ROM for Y8950 and YM2608,
- 5 for x8bit DRAMs for Y8950 and YM2608,
- 2 for x1bit DRAMs for Y8950 and YM2608.
- */
+ 8 for YM2610 (ROM only),
+ 5 for ROM for Y8950 and YM2608,
+ 5 for x8bit DRAMs for Y8950 and YM2608,
+ 2 for x1bit DRAMs for Y8950 and YM2608.
+ */
/* refresh addresses */
DELTAT->start = (DELTAT->reg[0x3]*0x0100 | DELTAT->reg[0x2]) << (DELTAT->portshift - DELTAT->DRAMportshift);
@@ -294,21 +294,21 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
}
DELTAT->control2 = v;
break;
- case 0x02: /* Start Address L */
- case 0x03: /* Start Address H */
+ case 0x02: /* Start Address L */
+ case 0x03: /* Start Address H */
DELTAT->start = (DELTAT->reg[0x3]*0x0100 | DELTAT->reg[0x2]) << (DELTAT->portshift - DELTAT->DRAMportshift);
/*logerror("DELTAT start: 02=%2x 03=%2x addr=%8x\n",DELTAT->reg[0x2], DELTAT->reg[0x3],DELTAT->start );*/
break;
- case 0x04: /* Stop Address L */
- case 0x05: /* Stop Address H */
+ case 0x04: /* Stop Address L */
+ case 0x05: /* Stop Address H */
DELTAT->end = (DELTAT->reg[0x5]*0x0100 | DELTAT->reg[0x4]) << (DELTAT->portshift - DELTAT->DRAMportshift);
DELTAT->end += (1 << (DELTAT->portshift-DELTAT->DRAMportshift) ) - 1;
/*logerror("DELTAT end : 04=%2x 05=%2x addr=%8x\n",DELTAT->reg[0x4], DELTAT->reg[0x5],DELTAT->end );*/
break;
- case 0x06: /* Prescale L (ADPCM and Record frq) */
- case 0x07: /* Prescale H */
+ case 0x06: /* Prescale L (ADPCM and Record frq) */
+ case 0x07: /* Prescale H */
break;
- case 0x08: /* ADPCM data */
+ case 0x08: /* ADPCM data */
/*
some examples:
@@ -345,9 +345,9 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
(DELTAT->status_reset_handler)(DELTAT->status_change_which_chip, DELTAT->status_change_BRDY_bit);
/* setup a timer that will callback us in 10 master clock cycles for Y8950
- * in the callback set the BRDY flag to 1 , which means we have written the data.
- * For now, we don't really do this; we simply reset and set the flag in zero time, so that the IRQ will work.
- */
+ * in the callback set the BRDY flag to 1 , which means we have written the data.
+ * For now, we don't really do this; we simply reset and set the flag in zero time, so that the IRQ will work.
+ */
/* set BRDY bit in status register */
if(DELTAT->status_set_handler)
if(DELTAT->status_change_BRDY_bit)
@@ -377,14 +377,14 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
return;
}
- break;
- case 0x09: /* DELTA-N L (ADPCM Playback Prescaler) */
- case 0x0a: /* DELTA-N H */
+ break;
+ case 0x09: /* DELTA-N L (ADPCM Playback Prescaler) */
+ case 0x0a: /* DELTA-N H */
DELTAT->delta = (DELTAT->reg[0xa]*0x0100 | DELTAT->reg[0x9]);
DELTAT->step = (UINT32)( (double)(DELTAT->delta /* *(1<<(YM_DELTAT_SHIFT-16)) */ ) * (DELTAT->freqbase) );
/*logerror("DELTAT deltan:09=%2x 0a=%2x\n",DELTAT->reg[0x9], DELTAT->reg[0xa]);*/
break;
- case 0x0b: /* Output level control (volume, linear) */
+ case 0x0b: /* Output level control (volume, linear) */
{
INT32 oldvol = DELTAT->volume;
DELTAT->volume = (v&0xff) * (DELTAT->output_range/256) / YM_DELTAT_DECODE_RANGE;
@@ -401,8 +401,8 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
}
}
break;
- case 0x0c: /* Limit Address L */
- case 0x0d: /* Limit Address H */
+ case 0x0c: /* Limit Address L */
+ case 0x0d: /* Limit Address H */
DELTAT->limit = (DELTAT->reg[0xd]*0x0100 | DELTAT->reg[0xc]) << (DELTAT->portshift - DELTAT->DRAMportshift);
/*logerror("DELTAT limit: 0c=%2x 0d=%2x addr=%8x\n",DELTAT->reg[0xc], DELTAT->reg[0xd],DELTAT->limit );*/
break;
@@ -425,11 +425,11 @@ void YM_DELTAT_ADPCM_Reset(YM_DELTAT *DELTAT,int pan,int emulation_mode)
DELTAT->adpcml = 0;
DELTAT->emulation_mode = (UINT8)emulation_mode;
DELTAT->portstate = (emulation_mode == YM_DELTAT_EMULATION_MODE_YM2610) ? 0x20 : 0;
- DELTAT->control2 = (emulation_mode == YM_DELTAT_EMULATION_MODE_YM2610) ? 0x01 : 0; /* default setting depends on the emulation mode. MSX demo called "facdemo_4" doesn't setup control2 register at all and still works */
+ DELTAT->control2 = (emulation_mode == YM_DELTAT_EMULATION_MODE_YM2610) ? 0x01 : 0; /* default setting depends on the emulation mode. MSX demo called "facdemo_4" doesn't setup control2 register at all and still works */
DELTAT->DRAMportshift = dram_rightshift[DELTAT->control2 & 3];
/* The flag mask register disables the BRDY after the reset, however
- ** as soon as the mask is enabled the flag needs to be set. */
+ ** as soon as the mask is enabled the flag needs to be set. */
/* set BRDY bit in status register */
if(DELTAT->status_set_handler)
@@ -467,10 +467,10 @@ void YM_DELTAT_savestate(device_t *device,YM_DELTAT *DELTAT)
}
-#define YM_DELTAT_Limit(val,max,min) \
-{ \
- if ( val > max ) val = max; \
- else if ( val < min ) val = min; \
+#define YM_DELTAT_Limit(val,max,min) \
+{ \
+ if ( val > max ) val = max; \
+ else if ( val < min ) val = min; \
}
INLINE void YM_DELTAT_synthesis_from_external_memory(YM_DELTAT *DELTAT)
@@ -488,7 +488,7 @@ INLINE void YM_DELTAT_synthesis_from_external_memory(YM_DELTAT *DELTAT)
if ( DELTAT->now_addr == (DELTAT->limit<<1) )
DELTAT->now_addr = 0;
- if ( DELTAT->now_addr == (DELTAT->end<<1) ) { /* 12-06-2001 JB: corrected comparison. Was > instead of == */
+ if ( DELTAT->now_addr == (DELTAT->end<<1) ) { /* 12-06-2001 JB: corrected comparison. Was > instead of == */
if( DELTAT->portstate&0x10 ){
/* repeat start */
DELTAT->now_addr = DELTAT->start<<1;
@@ -574,7 +574,7 @@ INLINE void YM_DELTAT_synthesis_from_CPU_memory(YM_DELTAT *DELTAT)
DELTAT->now_data = DELTAT->CPU_data;
/* after we used CPU_data, we set BRDY bit in status register,
- * which means we are ready to accept another byte of data */
+ * which means we are ready to accept another byte of data */
if(DELTAT->status_set_handler)
if(DELTAT->status_change_BRDY_bit)
(DELTAT->status_set_handler)(DELTAT->status_change_which_chip, DELTAT->status_change_BRDY_bit);
@@ -639,7 +639,7 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
if ( (DELTAT->portstate & 0xe0)==0x80 )
{
/* ADPCM synthesis from CPU-managed memory (from reg $08) */
- YM_DELTAT_synthesis_from_CPU_memory(DELTAT); /* change output based on data in ADPCM data reg ($08) */
+ YM_DELTAT_synthesis_from_CPU_memory(DELTAT); /* change output based on data in ADPCM data reg ($08) */
return;
}
@@ -649,4 +649,3 @@ value: START, REC, MEMDAT, REPEAT, SPOFF, x,x,RESET meaning:
return;
}
-
diff --git a/src/emu/sound/ymdeltat.h b/src/emu/sound/ymdeltat.h
index 51a1c2a3eaf..7118a1ae199 100644
--- a/src/emu/sound/ymdeltat.h
+++ b/src/emu/sound/ymdeltat.h
@@ -5,8 +5,8 @@
#define YM_DELTAT_SHIFT (16)
-#define YM_DELTAT_EMULATION_MODE_NORMAL 0
-#define YM_DELTAT_EMULATION_MODE_YM2610 1
+#define YM_DELTAT_EMULATION_MODE_NORMAL 0
+#define YM_DELTAT_EMULATION_MODE_YM2610 1
typedef void (*STATUS_CHANGE_HANDLER)(void *chip, UINT8 status_bits);
@@ -14,61 +14,61 @@ typedef void (*STATUS_CHANGE_HANDLER)(void *chip, UINT8 status_bits);
/* DELTA-T (adpcm type B) struct */
struct YM_DELTAT { /* AT: rearranged and tigntened structure */
- UINT8 *memory;
- INT32 *output_pointer;/* pointer of output pointers */
- INT32 *pan; /* pan : &output_pointer[pan] */
- double freqbase;
+ UINT8 *memory;
+ INT32 *output_pointer;/* pointer of output pointers */
+ INT32 *pan; /* pan : &output_pointer[pan] */
+ double freqbase;
#if 0
- double write_time; /* Y8950: 10 cycles of main clock; YM2608: 20 cycles of main clock */
- double read_time; /* Y8950: 8 cycles of main clock; YM2608: 18 cycles of main clock */
+ double write_time; /* Y8950: 10 cycles of main clock; YM2608: 20 cycles of main clock */
+ double read_time; /* Y8950: 8 cycles of main clock; YM2608: 18 cycles of main clock */
#endif
- UINT32 memory_size;
- int output_range;
- UINT32 now_addr; /* current address */
- UINT32 now_step; /* currect step */
- UINT32 step; /* step */
- UINT32 start; /* start address */
- UINT32 limit; /* limit address */
- UINT32 end; /* end address */
- UINT32 delta; /* delta scale */
- INT32 volume; /* current volume */
- INT32 acc; /* shift Measurement value*/
- INT32 adpcmd; /* next Forecast */
- INT32 adpcml; /* current value */
- INT32 prev_acc; /* leveling value */
- UINT8 now_data; /* current rom data */
- UINT8 CPU_data; /* current data from reg 08 */
- UINT8 portstate; /* port status */
- UINT8 control2; /* control reg: SAMPLE, DA/AD, RAM TYPE (x8bit / x1bit), ROM/RAM */
- UINT8 portshift; /* address bits shift-left:
+ UINT32 memory_size;
+ int output_range;
+ UINT32 now_addr; /* current address */
+ UINT32 now_step; /* currect step */
+ UINT32 step; /* step */
+ UINT32 start; /* start address */
+ UINT32 limit; /* limit address */
+ UINT32 end; /* end address */
+ UINT32 delta; /* delta scale */
+ INT32 volume; /* current volume */
+ INT32 acc; /* shift Measurement value*/
+ INT32 adpcmd; /* next Forecast */
+ INT32 adpcml; /* current value */
+ INT32 prev_acc; /* leveling value */
+ UINT8 now_data; /* current rom data */
+ UINT8 CPU_data; /* current data from reg 08 */
+ UINT8 portstate; /* port status */
+ UINT8 control2; /* control reg: SAMPLE, DA/AD, RAM TYPE (x8bit / x1bit), ROM/RAM */
+ UINT8 portshift; /* address bits shift-left:
** 8 for YM2610,
** 5 for Y8950 and YM2608 */
- UINT8 DRAMportshift; /* address bits shift-right:
+ UINT8 DRAMportshift; /* address bits shift-right:
** 0 for ROM and x8bit DRAMs,
** 3 for x1 DRAMs */
- UINT8 memread; /* needed for reading/writing external memory */
+ UINT8 memread; /* needed for reading/writing external memory */
/* handlers and parameters for the status flags support */
- STATUS_CHANGE_HANDLER status_set_handler;
- STATUS_CHANGE_HANDLER status_reset_handler;
+ STATUS_CHANGE_HANDLER status_set_handler;
+ STATUS_CHANGE_HANDLER status_reset_handler;
/* note that different chips have these flags on different
- ** bits of the status register
- */
- void * status_change_which_chip; /* this chip id */
- UINT8 status_change_EOS_bit; /* 1 on End Of Sample (record/playback/cycle time of AD/DA converting has passed)*/
- UINT8 status_change_BRDY_bit; /* 1 after recording 2 datas (2x4bits) or after reading/writing 1 data */
- UINT8 status_change_ZERO_bit; /* 1 if silence lasts for more than 290 miliseconds on ADPCM recording */
+ ** bits of the status register
+ */
+ void * status_change_which_chip; /* this chip id */
+ UINT8 status_change_EOS_bit; /* 1 on End Of Sample (record/playback/cycle time of AD/DA converting has passed)*/
+ UINT8 status_change_BRDY_bit; /* 1 after recording 2 datas (2x4bits) or after reading/writing 1 data */
+ UINT8 status_change_ZERO_bit; /* 1 if silence lasts for more than 290 miliseconds on ADPCM recording */
/* neither Y8950 nor YM2608 can generate IRQ when PCMBSY bit changes, so instead of above,
- ** the statusflag gets ORed with PCM_BSY (below) (on each read of statusflag of Y8950 and YM2608)
- */
- UINT8 PCM_BSY; /* 1 when ADPCM is playing; Y8950/YM2608 only */
+ ** the statusflag gets ORed with PCM_BSY (below) (on each read of statusflag of Y8950 and YM2608)
+ */
+ UINT8 PCM_BSY; /* 1 when ADPCM is playing; Y8950/YM2608 only */
- UINT8 reg[16]; /* adpcm registers */
- UINT8 emulation_mode; /* which chip we're emulating */
+ UINT8 reg[16]; /* adpcm registers */
+ UINT8 emulation_mode; /* which chip we're emulating */
};
/*void YM_DELTAT_BRDY_callback(YM_DELTAT *DELTAT);*/
diff --git a/src/emu/sound/ymf262.c b/src/emu/sound/ymf262.c
index 1b5e4f3762e..9b2ba48f555 100644
--- a/src/emu/sound/ymf262.c
+++ b/src/emu/sound/ymf262.c
@@ -60,37 +60,37 @@ differences between OPL2 and OPL3 shown in datasheets:
/* output final shift */
#if (OPL3_SAMPLE_BITS==16)
- #define FINAL_SH (0)
- #define MAXOUT (+32767)
- #define MINOUT (-32768)
+ #define FINAL_SH (0)
+ #define MAXOUT (+32767)
+ #define MINOUT (-32768)
#else
- #define FINAL_SH (8)
- #define MAXOUT (+127)
- #define MINOUT (-128)
+ #define FINAL_SH (8)
+ #define MAXOUT (+127)
+ #define MINOUT (-128)
#endif
-#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
-#define EG_SH 16 /* 16.16 fixed point (EG timing) */
-#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
-#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
+#define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
+#define EG_SH 16 /* 16.16 fixed point (EG timing) */
+#define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
+#define TIMER_SH 16 /* 16.16 fixed point (timers calculations) */
-#define FREQ_MASK ((1<<FREQ_SH)-1)
+#define FREQ_MASK ((1<<FREQ_SH)-1)
/* envelope output entries */
-#define ENV_BITS 10
-#define ENV_LEN (1<<ENV_BITS)
-#define ENV_STEP (128.0/ENV_LEN)
+#define ENV_BITS 10
+#define ENV_LEN (1<<ENV_BITS)
+#define ENV_STEP (128.0/ENV_LEN)
-#define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/
-#define MIN_ATT_INDEX (0)
+#define MAX_ATT_INDEX ((1<<(ENV_BITS-1))-1) /*511*/
+#define MIN_ATT_INDEX (0)
/* sinwave entries */
-#define SIN_BITS 10
-#define SIN_LEN (1<<SIN_BITS)
-#define SIN_MASK (SIN_LEN-1)
+#define SIN_BITS 10
+#define SIN_LEN (1<<SIN_BITS)
+#define SIN_MASK (SIN_LEN-1)
-#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
+#define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
@@ -100,11 +100,11 @@ differences between OPL2 and OPL3 shown in datasheets:
/* Envelope Generator phases */
-#define EG_ATT 4
-#define EG_DEC 3
-#define EG_SUS 2
-#define EG_REL 1
-#define EG_OFF 0
+#define EG_ATT 4
+#define EG_DEC 3
+#define EG_SUS 2
+#define EG_REL 1
+#define EG_OFF 0
/* save output as raw 16-bit sample */
@@ -113,15 +113,15 @@ differences between OPL2 and OPL3 shown in datasheets:
#ifdef SAVE_SAMPLE
static FILE *sample[1];
- #if 1 /*save to MONO file */
+ #if 1 /*save to MONO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = a; \
+ { signed int pom = a; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
}
- #else /*save to STEREO file */
+ #else /*save to STEREO file */
#define SAVE_ALL_CHANNELS \
- { signed int pom = a; \
+ { signed int pom = a; \
fputc((unsigned short)pom&0xff,sample[0]); \
fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
pom = b; \
@@ -138,53 +138,53 @@ static FILE * cymfile = NULL;
-#define OPL3_TYPE_YMF262 (0) /* 36 operators, 8 waveforms */
+#define OPL3_TYPE_YMF262 (0) /* 36 operators, 8 waveforms */
struct OPL3_SLOT
{
- UINT32 ar; /* attack rate: AR<<2 */
- UINT32 dr; /* decay rate: DR<<2 */
- UINT32 rr; /* release rate:RR<<2 */
- UINT8 KSR; /* key scale rate */
- UINT8 ksl; /* keyscale level */
- UINT8 ksr; /* key scale rate: kcode>>KSR */
- UINT8 mul; /* multiple: mul_tab[ML] */
+ UINT32 ar; /* attack rate: AR<<2 */
+ UINT32 dr; /* decay rate: DR<<2 */
+ UINT32 rr; /* release rate:RR<<2 */
+ UINT8 KSR; /* key scale rate */
+ UINT8 ksl; /* keyscale level */
+ UINT8 ksr; /* key scale rate: kcode>>KSR */
+ UINT8 mul; /* multiple: mul_tab[ML] */
/* Phase Generator */
- UINT32 Cnt; /* frequency counter */
- UINT32 Incr; /* frequency counter step */
- UINT8 FB; /* feedback shift value */
- INT32 *connect; /* slot output pointer */
- INT32 op1_out[2]; /* slot1 output for feedback */
- UINT8 CON; /* connection (algorithm) type */
+ UINT32 Cnt; /* frequency counter */
+ UINT32 Incr; /* frequency counter step */
+ UINT8 FB; /* feedback shift value */
+ INT32 *connect; /* slot output pointer */
+ INT32 op1_out[2]; /* slot1 output for feedback */
+ UINT8 CON; /* connection (algorithm) type */
/* Envelope Generator */
- UINT8 eg_type; /* percussive/non-percussive mode */
- UINT8 state; /* phase type */
- UINT32 TL; /* total level: TL << 2 */
- INT32 TLL; /* adjusted now TL */
- INT32 volume; /* envelope counter */
- UINT32 sl; /* sustain level: sl_tab[SL] */
-
- UINT32 eg_m_ar; /* (attack state) */
- UINT8 eg_sh_ar; /* (attack state) */
- UINT8 eg_sel_ar; /* (attack state) */
- UINT32 eg_m_dr; /* (decay state) */
- UINT8 eg_sh_dr; /* (decay state) */
- UINT8 eg_sel_dr; /* (decay state) */
- UINT32 eg_m_rr; /* (release state) */
- UINT8 eg_sh_rr; /* (release state) */
- UINT8 eg_sel_rr; /* (release state) */
-
- UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
+ UINT8 eg_type; /* percussive/non-percussive mode */
+ UINT8 state; /* phase type */
+ UINT32 TL; /* total level: TL << 2 */
+ INT32 TLL; /* adjusted now TL */
+ INT32 volume; /* envelope counter */
+ UINT32 sl; /* sustain level: sl_tab[SL] */
+
+ UINT32 eg_m_ar; /* (attack state) */
+ UINT8 eg_sh_ar; /* (attack state) */
+ UINT8 eg_sel_ar; /* (attack state) */
+ UINT32 eg_m_dr; /* (decay state) */
+ UINT8 eg_sh_dr; /* (decay state) */
+ UINT8 eg_sel_dr; /* (decay state) */
+ UINT32 eg_m_rr; /* (release state) */
+ UINT8 eg_sh_rr; /* (release state) */
+ UINT8 eg_sel_rr; /* (release state) */
+
+ UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
/* LFO */
- UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
- UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
+ UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
+ UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
/* waveform select */
- UINT8 waveform_number;
+ UINT8 waveform_number;
unsigned int wavetable;
//unsigned char reserved[128-84];//speedup: pump up the struct size to power of 2
@@ -196,22 +196,22 @@ struct OPL3_CH
{
OPL3_SLOT SLOT[2];
- UINT32 block_fnum; /* block+fnum */
- UINT32 fc; /* Freq. Increment base */
- UINT32 ksl_base; /* KeyScaleLevel Base step */
- UINT8 kcode; /* key code (for key scaling) */
+ UINT32 block_fnum; /* block+fnum */
+ UINT32 fc; /* Freq. Increment base */
+ UINT32 ksl_base; /* KeyScaleLevel Base step */
+ UINT8 kcode; /* key code (for key scaling) */
/*
- there are 12 2-operator channels which can be combined in pairs
- to form six 4-operator channel, they are:
- 0 and 3,
- 1 and 4,
- 2 and 5,
- 9 and 12,
- 10 and 13,
- 11 and 14
- */
- UINT8 extended; /* set to 1 if this channel forms up a 4op channel with another channel(only used by first of pair of channels, ie 0,1,2 and 9,10,11) */
+ there are 12 2-operator channels which can be combined in pairs
+ to form six 4-operator channel, they are:
+ 0 and 3,
+ 1 and 4,
+ 2 and 5,
+ 9 and 12,
+ 10 and 13,
+ 11 and 14
+ */
+ UINT8 extended; /* set to 1 if this channel forms up a 4op channel with another channel(only used by first of pair of channels, ie 0,1,2 and 9,10,11) */
unsigned char reserved[512-272];//speedup:pump up the struct size to power of 2
@@ -220,63 +220,63 @@ unsigned char reserved[512-272];//speedup:pump up the struct size to power of 2
/* OPL3 state */
struct OPL3
{
- OPL3_CH P_CH[18]; /* OPL3 chips have 18 channels */
+ OPL3_CH P_CH[18]; /* OPL3 chips have 18 channels */
- UINT32 pan[18*4]; /* channels output masks (0xffffffff = enable); 4 masks per one channel */
- UINT32 pan_ctrl_value[18]; /* output control values 1 per one channel (1 value contains 4 masks) */
+ UINT32 pan[18*4]; /* channels output masks (0xffffffff = enable); 4 masks per one channel */
+ UINT32 pan_ctrl_value[18]; /* output control values 1 per one channel (1 value contains 4 masks) */
signed int chanout[18];
- signed int phase_modulation; /* phase modulation input (SLOT 2) */
- signed int phase_modulation2; /* phase modulation input (SLOT 3 in 4 operator channels) */
+ signed int phase_modulation; /* phase modulation input (SLOT 2) */
+ signed int phase_modulation2; /* phase modulation input (SLOT 3 in 4 operator channels) */
- UINT32 eg_cnt; /* global envelope generator counter */
- UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/288 (288=8*36) */
- UINT32 eg_timer_add; /* step of eg_timer */
- UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
+ UINT32 eg_cnt; /* global envelope generator counter */
+ UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/288 (288=8*36) */
+ UINT32 eg_timer_add; /* step of eg_timer */
+ UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
- UINT32 fn_tab[1024]; /* fnumber->increment counter */
+ UINT32 fn_tab[1024]; /* fnumber->increment counter */
/* LFO */
- UINT32 LFO_AM;
- INT32 LFO_PM;
+ UINT32 LFO_AM;
+ INT32 LFO_PM;
- UINT8 lfo_am_depth;
- UINT8 lfo_pm_depth_range;
- UINT32 lfo_am_cnt;
- UINT32 lfo_am_inc;
- UINT32 lfo_pm_cnt;
- UINT32 lfo_pm_inc;
+ UINT8 lfo_am_depth;
+ UINT8 lfo_pm_depth_range;
+ UINT32 lfo_am_cnt;
+ UINT32 lfo_am_inc;
+ UINT32 lfo_pm_cnt;
+ UINT32 lfo_pm_inc;
- UINT32 noise_rng; /* 23 bit noise shift register */
- UINT32 noise_p; /* current noise 'phase' */
- UINT32 noise_f; /* current noise period */
+ UINT32 noise_rng; /* 23 bit noise shift register */
+ UINT32 noise_p; /* current noise 'phase' */
+ UINT32 noise_f; /* current noise period */
- UINT8 OPL3_mode; /* OPL3 extension enable flag */
+ UINT8 OPL3_mode; /* OPL3 extension enable flag */
- UINT8 rhythm; /* Rhythm mode */
+ UINT8 rhythm; /* Rhythm mode */
- int T[2]; /* timer counters */
- UINT8 st[2]; /* timer enable */
+ int T[2]; /* timer counters */
+ UINT8 st[2]; /* timer enable */
- UINT32 address; /* address register */
- UINT8 status; /* status flag */
- UINT8 statusmask; /* status mask */
+ UINT32 address; /* address register */
+ UINT8 status; /* status flag */
+ UINT8 statusmask; /* status mask */
- UINT8 nts; /* NTS (note select) */
+ UINT8 nts; /* NTS (note select) */
/* external event callback handlers */
OPL3_TIMERHANDLER timer_handler;/* TIMER handler */
- void *TimerParam; /* TIMER parameter */
- OPL3_IRQHANDLER IRQHandler; /* IRQ handler */
- void *IRQParam; /* IRQ parameter */
+ void *TimerParam; /* TIMER parameter */
+ OPL3_IRQHANDLER IRQHandler; /* IRQ handler */
+ void *IRQParam; /* IRQ parameter */
OPL3_UPDATEHANDLER UpdateHandler;/* stream update handler */
- void *UpdateParam; /* stream update parameter */
+ void *UpdateParam; /* stream update parameter */
- UINT8 type; /* chip type */
- int clock; /* master clock (Hz) */
- int rate; /* sampling rate (Hz) */
- double freqbase; /* frequency base */
- attotime TimerBase; /* Timer base time (==sampling time)*/
+ UINT8 type; /* chip type */
+ int clock; /* master clock (Hz) */
+ int rate; /* sampling rate (Hz) */
+ double freqbase; /* frequency base */
+ attotime TimerBase; /* Timer base time (==sampling time)*/
device_t *device;
};
@@ -285,8 +285,8 @@ struct OPL3
/* mapping of register number (offset) to slot number used by the emulator */
static const int slot_array[32]=
{
- 0, 2, 4, 1, 3, 5,-1,-1,
- 6, 8,10, 7, 9,11,-1,-1,
+ 0, 2, 4, 1, 3, 5,-1,-1,
+ 6, 8,10, 7, 9,11,-1,-1,
12,14,16,13,15,17,-1,-1,
-1,-1,-1,-1,-1,-1,-1,-1
};
@@ -298,42 +298,42 @@ static const int slot_array[32]=
static const UINT32 ksl_tab[8*16]=
{
/* OCT 0 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
/* OCT 1 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
- 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
+ 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
/* OCT 2 */
- 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
- 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
- 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
- 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
+ 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
+ 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
/* OCT 3 */
- 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
- 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
- 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
- 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
+ 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
+ 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
+ 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
/* OCT 4 */
- 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
- 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
- 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
+ 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
+ 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
+ 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
10.875/DV,11.250/DV,11.625/DV,12.000/DV,
/* OCT 5 */
- 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
- 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
+ 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
+ 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
12.000/DV,12.750/DV,13.125/DV,13.500/DV,
13.875/DV,14.250/DV,14.625/DV,15.000/DV,
/* OCT 6 */
- 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
+ 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
12.000/DV,13.125/DV,13.875/DV,14.625/DV,
15.000/DV,15.750/DV,16.125/DV,16.500/DV,
16.875/DV,17.250/DV,17.625/DV,18.000/DV,
/* OCT 7 */
- 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
+ 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
15.000/DV,16.125/DV,16.875/DV,17.625/DV,
18.000/DV,18.750/DV,19.125/DV,19.500/DV,
19.875/DV,20.250/DV,20.625/DV,21.000/DV
@@ -344,8 +344,8 @@ static const UINT32 ksl_tab[8*16]=
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
#define SC(db) (UINT32) ( db * (2.0/ENV_STEP) )
static const UINT32 sl_tab[16]={
- SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
- SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
+ SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
+ SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
};
#undef SC
@@ -379,7 +379,7 @@ static const unsigned char eg_inc[15*RATE_STEPS]={
#define O(a) (a*RATE_STEPS)
/* note that there is no O(13) in this table - it's directly in the code */
-static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
+static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
@@ -420,7 +420,7 @@ O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
/*mask 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0, 0 */
#define O(a) (a*1)
-static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
+static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
/* 16 infinite time rates */
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
@@ -461,8 +461,8 @@ O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
#define ML 2
static const UINT8 mul_tab[16]= {
/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
- 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
- 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
+ 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
+ 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
};
#undef ML
@@ -478,7 +478,7 @@ static const UINT8 mul_tab[16]= {
#define TL_TAB_LEN (13*2*TL_RES_LEN)
static signed int tl_tab[TL_TAB_LEN];
-#define ENV_QUIET (TL_TAB_LEN>>4)
+#define ENV_QUIET (TL_TAB_LEN>>4)
/* sin waveform table in 'decibel' scale */
/* there are eight waveforms on OPL3 chips */
@@ -559,36 +559,36 @@ static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
static const INT8 lfo_pm_table[8*8*2] = {
/* FNUM2/FNUM = 00 0xxxxxxx (0x0000) */
-0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
-0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
+0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
+0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 00 1xxxxxxx (0x0080) */
-0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
-1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
+0, 0, 0, 0, 0, 0, 0, 0, /*LFO PM depth = 0*/
+1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 01 0xxxxxxx (0x0100) */
-1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
-2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
+1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
+2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 01 1xxxxxxx (0x0180) */
-1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
-3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
+1, 0, 0, 0,-1, 0, 0, 0, /*LFO PM depth = 0*/
+3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 10 0xxxxxxx (0x0200) */
-2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
-4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
+2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
+4, 2, 0,-2,-4,-2, 0, 2, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 10 1xxxxxxx (0x0280) */
-2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
-5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
+2, 1, 0,-1,-2,-1, 0, 1, /*LFO PM depth = 0*/
+5, 2, 0,-2,-5,-2, 0, 2, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 11 0xxxxxxx (0x0300) */
-3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
-6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
+3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
+6, 3, 0,-3,-6,-3, 0, 3, /*LFO PM depth = 1*/
/* FNUM2/FNUM = 11 1xxxxxxx (0x0380) */
-3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
-7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/
+3, 1, 0,-1,-3,-1, 0, 1, /*LFO PM depth = 0*/
+7, 3, 0,-3,-7,-3, 0, 3 /*LFO PM depth = 1*/
};
@@ -623,7 +623,7 @@ INLINE void OPL3_STATUS_SET(OPL3 *chip,int flag)
if(!(chip->status & 0x80))
{
if(chip->status & 0x7f)
- { /* IRQ on */
+ { /* IRQ on */
chip->status |= 0x80;
/* callback user interrupt handler (IRQ is OFF to ON) */
if(chip->IRQHandler) (chip->IRQHandler)(chip->IRQParam,1);
@@ -664,7 +664,7 @@ INLINE void advance_lfo(OPL3 *chip)
/* LFO */
chip->lfo_am_cnt += chip->lfo_am_inc;
- if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
+ if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
chip->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH);
tmp = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ];
@@ -701,13 +701,13 @@ INLINE void advance(OPL3 *chip)
/* Envelope Generator */
switch(op->state)
{
- case EG_ATT: /* attack phase */
+ case EG_ATT: /* attack phase */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
if ( !(chip->eg_cnt & op->eg_m_ar) )
{
op->volume += (~op->volume *
- (eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)])
- ) >>3;
+ (eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)])
+ ) >>3;
if (op->volume <= MIN_ATT_INDEX)
{
@@ -718,7 +718,7 @@ INLINE void advance(OPL3 *chip)
}
break;
- case EG_DEC: /* decay phase */
+ case EG_DEC: /* decay phase */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
if ( !(chip->eg_cnt & op->eg_m_dr) )
{
@@ -730,17 +730,17 @@ INLINE void advance(OPL3 *chip)
}
break;
- case EG_SUS: /* sustain phase */
+ case EG_SUS: /* sustain phase */
/* this is important behaviour:
- one can change percusive/non-percussive modes on the fly and
- the chip will remain in sustain phase - verified on real YM3812 */
+ one can change percusive/non-percussive modes on the fly and
+ the chip will remain in sustain phase - verified on real YM3812 */
- if(op->eg_type) /* non-percussive mode */
+ if(op->eg_type) /* non-percussive mode */
{
/* do nothing */
}
- else /* percussive mode */
+ else /* percussive mode */
{
/* during sustain phase chip adds Release Rate (in percussive mode) */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
@@ -755,7 +755,7 @@ INLINE void advance(OPL3 *chip)
}
break;
- case EG_REL: /* release phase */
+ case EG_REL: /* release phase */
// if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
if ( !(chip->eg_cnt & op->eg_m_rr) )
{
@@ -792,52 +792,52 @@ INLINE void advance(OPL3 *chip)
signed int lfo_fn_table_index_offset = lfo_pm_table[chip->LFO_PM + 16*fnum_lfo ];
- if (lfo_fn_table_index_offset) /* LFO phase modulation active */
+ if (lfo_fn_table_index_offset) /* LFO phase modulation active */
{
block_fnum += lfo_fn_table_index_offset;
block = (block_fnum&0x1c00) >> 10;
op->Cnt += (chip->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
}
- else /* LFO phase modulation = zero */
+ else /* LFO phase modulation = zero */
{
op->Cnt += op->Incr;
}
}
- else /* LFO phase modulation disabled for this operator */
+ else /* LFO phase modulation disabled for this operator */
{
op->Cnt += op->Incr;
}
}
/* The Noise Generator of the YM3812 is 23-bit shift register.
- * Period is equal to 2^23-2 samples.
- * Register works at sampling frequency of the chip, so output
- * can change on every sample.
- *
- * Output of the register and input to the bit 22 is:
- * bit0 XOR bit14 XOR bit15 XOR bit22
- *
- * Simply use bit 22 as the noise output.
- */
+ * Period is equal to 2^23-2 samples.
+ * Register works at sampling frequency of the chip, so output
+ * can change on every sample.
+ *
+ * Output of the register and input to the bit 22 is:
+ * bit0 XOR bit14 XOR bit15 XOR bit22
+ *
+ * Simply use bit 22 as the noise output.
+ */
chip->noise_p += chip->noise_f;
- i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
+ i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
chip->noise_p &= FREQ_MASK;
while (i)
{
/*
- UINT32 j;
- j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
- chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
- */
+ UINT32 j;
+ j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
+ chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
+ */
/*
- Instead of doing all the logic operations above, we
- use a trick here (and use bit 0 as the noise output).
- The difference is only that the noise bit changes one
- step ahead. This doesn't matter since we don't know
- what is real state of the noise_rng after the reset.
- */
+ Instead of doing all the logic operations above, we
+ use a trick here (and use bit 0 as the noise output).
+ The difference is only that the noise bit changes one
+ step ahead. This doesn't matter since we don't know
+ what is real state of the noise_rng after the reset.
+ */
if (chip->noise_rng & 1) chip->noise_rng ^= 0x800302;
chip->noise_rng >>= 1;
@@ -976,11 +976,11 @@ INLINE void chan_calc_rhythm( OPL3 *chip, OPL3_CH *CH, unsigned int noise )
/* Bass Drum (verified on real YM3812):
- - depends on the channel 6 'connect' register:
- when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
- when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
- - output sample always is multiplied by 2
- */
+ - depends on the channel 6 'connect' register:
+ when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
+ when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
+ - output sample always is multiplied by 2
+ */
chip->phase_modulation = 0;
@@ -1024,8 +1024,8 @@ INLINE void chan_calc_rhythm( OPL3 *chip, OPL3_CH *CH, unsigned int noise )
/* The following formulas can be well optimized.
- I leave them in direct form for now (in case I've missed something).
- */
+ I leave them in direct form for now (in case I've missed something).
+ */
/* High Hat (verified on real YM3812) */
env = volume_calc(SLOT7_1);
@@ -1033,9 +1033,9 @@ INLINE void chan_calc_rhythm( OPL3 *chip, OPL3_CH *CH, unsigned int noise )
{
/* high hat phase generation:
- phase = d0 or 234 (based on frequency only)
- phase = 34 or 2d0 (based on noise)
- */
+ phase = d0 or 234 (based on frequency only)
+ phase = 34 or 2d0 (based on noise)
+ */
/* base frequency derived from operator 1 in channel 7 */
unsigned char bit7 = ((SLOT7_1->Cnt>>FREQ_SH)>>7)&1;
@@ -1151,14 +1151,14 @@ static int init_tables(void)
/* we never reach (1<<16) here due to the (x+1) */
/* result fits within 16 bits at maximum */
- n = (int)m; /* 16 bits here */
- n >>= 4; /* 12 bits here */
- if (n&1) /* round to nearest */
+ n = (int)m; /* 16 bits here */
+ n >>= 4; /* 12 bits here */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
/* 11 bits here (rounded) */
- n <<= 1; /* 12 bits here (as in real chip) */
+ n <<= 1; /* 12 bits here (as in real chip) */
tl_tab[ x*2 + 0 ] = n;
tl_tab[ x*2 + 1 ] = ~tl_tab[ x*2 + 0 ]; /* this *is* different from OPL2 (verified on real YMF262) */
@@ -1188,14 +1188,14 @@ static int init_tables(void)
/* we never reach zero here due to ((i*2)+1) */
if (m>0.0)
- o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
else
- o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
+ o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
o = o / (ENV_STEP/4);
n = (int)(2.0*o);
- if (n&1) /* round to nearest */
+ if (n&1) /* round to nearest */
n = (n>>1)+1;
else
n = n>>1;
@@ -1258,9 +1258,9 @@ static int init_tables(void)
/* output maximum in half the cycle and output minimum on the other half of cycle */
if (i & (1<<(SIN_BITS-1)) )
- sin_tab[6*SIN_LEN+i] = 1; /* negative */
+ sin_tab[6*SIN_LEN+i] = 1; /* negative */
else
- sin_tab[6*SIN_LEN+i] = 0; /* positive */
+ sin_tab[6*SIN_LEN+i] = 0; /* positive */
/* waveform 7: */
/* |\____ |\____ */
@@ -1268,12 +1268,12 @@ static int init_tables(void)
/* output sawtooth waveform */
if (i & (1<<(SIN_BITS-1)) )
- x = ((SIN_LEN-1)-i)*16 + 1; /* negative: from 8177 to 1 */
+ x = ((SIN_LEN-1)-i)*16 + 1; /* negative: from 8177 to 1 */
else
- x = i*16; /*positive: from 0 to 8176 */
+ x = i*16; /*positive: from 0 to 8176 */
if (x > TL_TAB_LEN)
- x = TL_TAB_LEN; /* clip to the allowed range */
+ x = TL_TAB_LEN; /* clip to the allowed range */
sin_tab[7*SIN_LEN+i] = x;
@@ -1326,7 +1326,7 @@ static void OPL3_initalize(OPL3 *chip)
chip->fn_tab[i] = (UINT32)( (double)i * 64 * chip->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
#if 0
logerror("YMF262.C: fn_tab[%4i] = %08x (dec=%8i)\n",
- i, chip->fn_tab[i]>>6, chip->fn_tab[i]>>6 );
+ i, chip->fn_tab[i]>>6, chip->fn_tab[i]>>6 );
#endif
}
@@ -1607,11 +1607,11 @@ static void update_channels(OPL3 *chip, OPL3_CH *CH)
{
/* update channel passed as a parameter and a channel at CH+=3; */
if (CH->extended)
- { /* we've just switched to combined 4 operator mode */
+ { /* we've just switched to combined 4 operator mode */
}
else
- { /* we've just switched to normal 2 operator mode */
+ { /* we've just switched to normal 2 operator mode */
}
@@ -1641,41 +1641,41 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
{
switch(r)
{
- case 0x101: /* test register */
+ case 0x101: /* test register */
return;
- case 0x104: /* 6 channels enable */
+ case 0x104: /* 6 channels enable */
{
UINT8 prev;
- CH = &chip->P_CH[0]; /* channel 0 */
+ CH = &chip->P_CH[0]; /* channel 0 */
prev = CH->extended;
CH->extended = (v>>0) & 1;
if(prev != CH->extended)
update_channels(chip, CH);
- CH++; /* channel 1 */
+ CH++; /* channel 1 */
prev = CH->extended;
CH->extended = (v>>1) & 1;
if(prev != CH->extended)
update_channels(chip, CH);
- CH++; /* channel 2 */
+ CH++; /* channel 2 */
prev = CH->extended;
CH->extended = (v>>2) & 1;
if(prev != CH->extended)
update_channels(chip, CH);
- CH = &chip->P_CH[9]; /* channel 9 */
+ CH = &chip->P_CH[9]; /* channel 9 */
prev = CH->extended;
CH->extended = (v>>3) & 1;
if(prev != CH->extended)
update_channels(chip, CH);
- CH++; /* channel 10 */
+ CH++; /* channel 10 */
prev = CH->extended;
CH->extended = (v>>4) & 1;
if(prev != CH->extended)
update_channels(chip, CH);
- CH++; /* channel 11 */
+ CH++; /* channel 11 */
prev = CH->extended;
CH->extended = (v>>5) & 1;
if(prev != CH->extended)
@@ -1684,17 +1684,17 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
}
return;
- case 0x105: /* OPL3 extensions enable register */
+ case 0x105: /* OPL3 extensions enable register */
- chip->OPL3_mode = v&0x01; /* OPL3 mode when bit0=1 otherwise it is OPL2 mode */
+ chip->OPL3_mode = v&0x01; /* OPL3 mode when bit0=1 otherwise it is OPL2 mode */
/* following behaviour was tested on real YMF262,
- switching OPL3/OPL2 modes on the fly:
- - does not change the waveform previously selected (unless when ....)
- - does not update CH.A, CH.B, CH.C and CH.D output selectors (registers c0-c8) (unless when ....)
- - does not disable channels 9-17 on OPL3->OPL2 switch
- - does not switch 4 operator channels back to 2 operator channels
- */
+ switching OPL3/OPL2 modes on the fly:
+ - does not change the waveform previously selected (unless when ....)
+ - does not update CH.A, CH.B, CH.C and CH.D output selectors (registers c0-c8) (unless when ....)
+ - does not disable channels 9-17 on OPL3->OPL2 switch
+ - does not switch 4 operator channels back to 2 operator channels
+ */
return;
@@ -1704,7 +1704,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
}
- ch_offset = 9; /* register page #2 starts from channel 9 (counting from 0) */
+ ch_offset = 9; /* register page #2 starts from channel 9 (counting from 0) */
}
/* adjust bus to 8 bits */
@@ -1714,24 +1714,24 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
switch(r&0xe0)
{
- case 0x00: /* 00-1f:control */
+ case 0x00: /* 00-1f:control */
switch(r&0x1f)
{
- case 0x01: /* test register */
+ case 0x01: /* test register */
break;
- case 0x02: /* Timer 1 */
+ case 0x02: /* Timer 1 */
chip->T[0] = (256-v)*4;
break;
- case 0x03: /* Timer 2 */
+ case 0x03: /* Timer 2 */
chip->T[1] = (256-v)*16;
break;
- case 0x04: /* IRQ clear / mask and Timer enable */
+ case 0x04: /* IRQ clear / mask and Timer enable */
if(v&0x80)
- { /* IRQ flags clear */
+ { /* IRQ flags clear */
OPL3_STATUS_RESET(chip,0x60);
}
else
- { /* set IRQ mask ,timer enable */
+ { /* set IRQ mask ,timer enable */
UINT8 st1 = v & 1;
UINT8 st2 = (v>>1) & 1;
@@ -1755,7 +1755,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
}
}
break;
- case 0x08: /* x,NTS,x,x, x,x,x,x */
+ case 0x08: /* x,NTS,x,x, x,x,x,x */
chip->nts = v;
break;
@@ -1764,7 +1764,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
}
break;
- case 0x20: /* am ON, vib ON, ksr, eg_type, mul */
+ case 0x20: /* am ON, vib ON, ksr, eg_type, mul */
slot = slot_array[r&0x1f];
if(slot < 0) return;
set_mul(chip, slot + ch_offset*2, v);
@@ -1785,9 +1785,9 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
set_sl_rr(chip, slot + ch_offset*2, v);
break;
case 0xa0:
- if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */
+ if (r == 0xbd) /* am depth, vibrato depth, r,bd,sd,tom,tc,hh */
{
- if (ch_offset != 0) /* 0xbd register is present in set #1 only */
+ if (ch_offset != 0) /* 0xbd register is present in set #1 only */
return;
chip->lfo_am_depth = v & 0x80;
@@ -1843,11 +1843,11 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
CH = &chip->P_CH[(r&0x0f) + ch_offset];
if(!(r&0x10))
- { /* a0-a8 */
+ { /* a0-a8 */
block_fnum = (CH->block_fnum&0x1f00) | v;
}
else
- { /* b0-b8 */
+ { /* b0-b8 */
block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
if (chip->OPL3_mode & 1)
@@ -1968,9 +1968,9 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
/* if notesel == 0 -> lsb of kcode is bit 10 (MSB) of fnum */
/* if notesel == 1 -> lsb of kcode is bit 9 (MSB-1) of fnum */
if (chip->nts&0x40)
- CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */
+ CH->kcode |= (CH->block_fnum&0x100)>>8; /* notesel == 1 */
else
- CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */
+ CH->kcode |= (CH->block_fnum&0x200)>>9; /* notesel == 0 */
if (chip->OPL3_mode & 1)
{
@@ -2073,23 +2073,23 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
int base = ((r&0xf) + ch_offset) * 4;
/* OPL3 mode */
- chip->pan[ base ] = (v & 0x10) ? ~0 : 0; /* ch.A */
- chip->pan[ base +1 ] = (v & 0x20) ? ~0 : 0; /* ch.B */
- chip->pan[ base +2 ] = (v & 0x40) ? ~0 : 0; /* ch.C */
- chip->pan[ base +3 ] = (v & 0x80) ? ~0 : 0; /* ch.D */
+ chip->pan[ base ] = (v & 0x10) ? ~0 : 0; /* ch.A */
+ chip->pan[ base +1 ] = (v & 0x20) ? ~0 : 0; /* ch.B */
+ chip->pan[ base +2 ] = (v & 0x40) ? ~0 : 0; /* ch.C */
+ chip->pan[ base +3 ] = (v & 0x80) ? ~0 : 0; /* ch.D */
}
else
{
int base = ((r&0xf) + ch_offset) * 4;
/* OPL2 mode - always enabled */
- chip->pan[ base ] = ~0; /* ch.A */
- chip->pan[ base +1 ] = ~0; /* ch.B */
- chip->pan[ base +2 ] = ~0; /* ch.C */
- chip->pan[ base +3 ] = ~0; /* ch.D */
+ chip->pan[ base ] = ~0; /* ch.A */
+ chip->pan[ base +1 ] = ~0; /* ch.B */
+ chip->pan[ base +2 ] = ~0; /* ch.C */
+ chip->pan[ base +3 ] = ~0; /* ch.D */
}
- chip->pan_ctrl_value[ (r&0xf) + ch_offset ] = v; /* store control value for OPL3/OPL2 mode switching on the fly */
+ chip->pan_ctrl_value[ (r&0xf) + ch_offset ] = v; /* store control value for OPL3/OPL2 mode switching on the fly */
CH->SLOT[SLOT1].FB = (v>>1)&7 ? ((v>>1)&7) + 7 : 0;
CH->SLOT[SLOT1].CON = v&1;
@@ -2117,7 +2117,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
case 1:
/* 1 -> 2 -\
- 3 -> 4 -+- out */
+ 3 -> 4 -+- out */
CH->SLOT[SLOT1].connect = &chip->phase_modulation;
CH->SLOT[SLOT2].connect = &chanout[ chan_no ];
@@ -2126,7 +2126,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
case 2:
/* 1 -----------\
- 2 -> 3 -> 4 -+- out */
+ 2 -> 3 -> 4 -+- out */
CH->SLOT[SLOT1].connect = &chanout[ chan_no ];
CH->SLOT[SLOT2].connect = &chip->phase_modulation2;
@@ -2135,8 +2135,8 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
case 3:
/* 1 ------\
- 2 -> 3 -+- out
- 4 ------/ */
+ 2 -> 3 -+- out
+ 4 ------/ */
CH->SLOT[SLOT1].connect = &chanout[ chan_no ];
CH->SLOT[SLOT2].connect = &chip->phase_modulation2;
(CH+3)->SLOT[SLOT1].connect = &chanout[ chan_no + 3 ];
@@ -2169,7 +2169,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
case 1:
/* 1 -> 2 -\
- 3 -> 4 -+- out */
+ 3 -> 4 -+- out */
(CH-3)->SLOT[SLOT1].connect = &chip->phase_modulation;
(CH-3)->SLOT[SLOT2].connect = &chanout[ chan_no - 3 ];
@@ -2178,7 +2178,7 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
case 2:
/* 1 -----------\
- 2 -> 3 -> 4 -+- out */
+ 2 -> 3 -> 4 -+- out */
(CH-3)->SLOT[SLOT1].connect = &chanout[ chan_no - 3 ];
(CH-3)->SLOT[SLOT2].connect = &chip->phase_modulation2;
@@ -2187,8 +2187,8 @@ static void OPL3WriteReg(OPL3 *chip, int r, int v)
break;
case 3:
/* 1 ------\
- 2 -> 3 -+- out
- 4 ------/ */
+ 2 -> 3 -+- out
+ 4 ------/ */
(CH-3)->SLOT[SLOT1].connect = &chanout[ chan_no - 3 ];
(CH-3)->SLOT[SLOT2].connect = &chip->phase_modulation2;
CH->SLOT[SLOT1].connect = &chanout[ chan_no ];
@@ -2296,8 +2296,8 @@ static void OPL3ResetChip(OPL3 *chip)
chip->eg_timer = 0;
chip->eg_cnt = 0;
- chip->noise_rng = 1; /* noise shift register */
- chip->nts = 0; /* note split */
+ chip->noise_rng = 1; /* noise shift register */
+ chip->nts = 0; /* note split */
OPL3_STATUS_RESET(chip,0x60);
/* reset with register write */
@@ -2390,27 +2390,27 @@ static int OPL3Write(OPL3 *chip, int a, int v)
switch(a&3)
{
- case 0: /* address port 0 (register set #1) */
+ case 0: /* address port 0 (register set #1) */
chip->address = v;
break;
- case 1: /* data port - ignore A1 */
- case 3: /* data port - ignore A1 */
+ case 1: /* data port - ignore A1 */
+ case 3: /* data port - ignore A1 */
if(chip->UpdateHandler) chip->UpdateHandler(chip->UpdateParam,0);
OPL3WriteReg(chip,chip->address,v);
break;
- case 2: /* address port 1 (register set #2) */
+ case 2: /* address port 1 (register set #2) */
/* verified on real YMF262:
- in OPL3 mode:
- address line A1 is stored during *address* write and ignored during *data* write.
-
- in OPL2 mode:
- register set#2 writes go to register set#1 (ignoring A1)
- verified on registers from set#2: 0x01, 0x04, 0x20-0xef
- The only exception is register 0x05.
- */
+ in OPL3 mode:
+ address line A1 is stored during *address* write and ignored during *data* write.
+
+ in OPL2 mode:
+ register set#2 writes go to register set#1 (ignoring A1)
+ verified on registers from set#2: 0x01, 0x04, 0x20-0xef
+ The only exception is register 0x05.
+ */
if( chip->OPL3_mode & 1 )
{
/* OPL3 mode */
@@ -2422,7 +2422,7 @@ static int OPL3Write(OPL3 *chip, int a, int v)
if( v==5 )
chip->address = v | 0x100;
else
- chip->address = v; /* verified range: 0x01, 0x04, 0x20-0xef(set #2 becomes set #1 in opl2 mode) */
+ chip->address = v; /* verified range: 0x01, 0x04, 0x20-0xef(set #2 becomes set #1 in opl2 mode) */
}
break;
}
@@ -2438,7 +2438,7 @@ static unsigned char OPL3Read(OPL3 *chip,int a)
return chip->status;
}
- return 0x00; /* verified on real YMF262 */
+ return 0x00; /* verified on real YMF262 */
}
@@ -2446,11 +2446,11 @@ static unsigned char OPL3Read(OPL3 *chip,int a)
static int OPL3TimerOver(OPL3 *chip,int c)
{
if( c )
- { /* Timer B */
+ { /* Timer B */
OPL3_STATUS_SET(chip,0x20);
}
else
- { /* Timer A */
+ { /* Timer A */
OPL3_STATUS_SET(chip,0x40);
}
/* reload timer */
@@ -2522,14 +2522,14 @@ void ymf262_set_update_handler(void *chip,OPL3_UPDATEHANDLER UpdateHandler,void
void ymf262_update_one(void *_chip, OPL3SAMPLE **buffers, int length)
{
int i;
- OPL3 *chip = (OPL3 *)_chip;
+ OPL3 *chip = (OPL3 *)_chip;
signed int *chanout = chip->chanout;
- UINT8 rhythm = chip->rhythm&0x20;
+ UINT8 rhythm = chip->rhythm&0x20;
- OPL3SAMPLE *ch_a = buffers[0];
- OPL3SAMPLE *ch_b = buffers[1];
- OPL3SAMPLE *ch_c = buffers[2];
- OPL3SAMPLE *ch_d = buffers[3];
+ OPL3SAMPLE *ch_a = buffers[0];
+ OPL3SAMPLE *ch_b = buffers[1];
+ OPL3SAMPLE *ch_c = buffers[2];
+ OPL3SAMPLE *ch_d = buffers[3];
for( i=0; i < length ; i++ )
{
@@ -2543,25 +2543,25 @@ void ymf262_update_one(void *_chip, OPL3SAMPLE **buffers, int length)
#if 1
/* register set #1 */
- chan_calc(chip, &chip->P_CH[0]); /* extended 4op ch#0 part 1 or 2op ch#0 */
+ chan_calc(chip, &chip->P_CH[0]); /* extended 4op ch#0 part 1 or 2op ch#0 */
if (chip->P_CH[0].extended)
- chan_calc_ext(chip, &chip->P_CH[3]); /* extended 4op ch#0 part 2 */
+ chan_calc_ext(chip, &chip->P_CH[3]); /* extended 4op ch#0 part 2 */
else
- chan_calc(chip, &chip->P_CH[3]); /* standard 2op ch#3 */
+ chan_calc(chip, &chip->P_CH[3]); /* standard 2op ch#3 */
- chan_calc(chip, &chip->P_CH[1]); /* extended 4op ch#1 part 1 or 2op ch#1 */
+ chan_calc(chip, &chip->P_CH[1]); /* extended 4op ch#1 part 1 or 2op ch#1 */
if (chip->P_CH[1].extended)
- chan_calc_ext(chip, &chip->P_CH[4]); /* extended 4op ch#1 part 2 */
+ chan_calc_ext(chip, &chip->P_CH[4]); /* extended 4op ch#1 part 2 */
else
- chan_calc(chip, &chip->P_CH[4]); /* standard 2op ch#4 */
+ chan_calc(chip, &chip->P_CH[4]); /* standard 2op ch#4 */
- chan_calc(chip, &chip->P_CH[2]); /* extended 4op ch#2 part 1 or 2op ch#2 */
+ chan_calc(chip, &chip->P_CH[2]); /* extended 4op ch#2 part 1 or 2op ch#2 */
if (chip->P_CH[2].extended)
- chan_calc_ext(chip, &chip->P_CH[5]); /* extended 4op ch#2 part 2 */
+ chan_calc_ext(chip, &chip->P_CH[5]); /* extended 4op ch#2 part 2 */
else
- chan_calc(chip, &chip->P_CH[5]); /* standard 2op ch#5 */
+ chan_calc(chip, &chip->P_CH[5]); /* standard 2op ch#5 */
if(!rhythm)
@@ -2570,7 +2570,7 @@ void ymf262_update_one(void *_chip, OPL3SAMPLE **buffers, int length)
chan_calc(chip, &chip->P_CH[7]);
chan_calc(chip, &chip->P_CH[8]);
}
- else /* Rhythm part */
+ else /* Rhythm part */
{
chan_calc_rhythm(chip, &chip->P_CH[0], (chip->noise_rng>>0)&1 );
}
@@ -2597,7 +2597,7 @@ void ymf262_update_one(void *_chip, OPL3SAMPLE **buffers, int length)
chan_calc(chip, &chip->P_CH[14]);
- /* channels 15,16,17 are fixed 2-operator channels only */
+ /* channels 15,16,17 are fixed 2-operator channels only */
chan_calc(chip, &chip->P_CH[15]);
chan_calc(chip, &chip->P_CH[16]);
chan_calc(chip, &chip->P_CH[17]);
@@ -2712,4 +2712,3 @@ void ymf262_update_one(void *_chip, OPL3SAMPLE **buffers, int length)
}
}
-
diff --git a/src/emu/sound/ymf262.h b/src/emu/sound/ymf262.h
index e00f9799e44..8880d07e08c 100644
--- a/src/emu/sound/ymf262.h
+++ b/src/emu/sound/ymf262.h
@@ -9,12 +9,12 @@
/* compiler dependence */
#ifndef __OSDCOMM_H__
#define __OSDCOMM_H__
-typedef unsigned char UINT8; /* unsigned 8bit */
-typedef unsigned short UINT16; /* unsigned 16bit */
-typedef unsigned int UINT32; /* unsigned 32bit */
-typedef signed char INT8; /* signed 8bit */
-typedef signed short INT16; /* signed 16bit */
-typedef signed int INT32; /* signed 32bit */
+typedef unsigned char UINT8; /* unsigned 8bit */
+typedef unsigned short UINT16; /* unsigned 16bit */
+typedef unsigned int UINT32; /* unsigned 32bit */
+typedef signed char INT8; /* signed 8bit */
+typedef signed short INT16; /* signed 16bit */
+typedef signed int INT32; /* signed 32bit */
#endif
typedef stream_sample_t OPL3SAMPLE;
diff --git a/src/emu/sound/ymf271.c b/src/emu/sound/ymf271.c
index 309fbfa122e..38a30a33c3f 100644
--- a/src/emu/sound/ymf271.c
+++ b/src/emu/sound/ymf271.c
@@ -15,21 +15,21 @@
#include "emu.h"
#include "ymf271.h"
-#define VERBOSE (1)
+#define VERBOSE (1)
-#define MAXOUT (+32767)
-#define MINOUT (-32768)
+#define MAXOUT (+32767)
+#define MINOUT (-32768)
-#define SIN_BITS 10
-#define SIN_LEN (1<<SIN_BITS)
-#define SIN_MASK (SIN_LEN-1)
+#define SIN_BITS 10
+#define SIN_LEN (1<<SIN_BITS)
+#define SIN_MASK (SIN_LEN-1)
-#define LFO_LENGTH 256
-#define LFO_SHIFT 8
-#define PLFO_MAX (+1.0)
-#define PLFO_MIN (-1.0)
-#define ALFO_MAX (+65536)
-#define ALFO_MIN (0)
+#define LFO_LENGTH 256
+#define LFO_SHIFT 8
+#define PLFO_MAX (+1.0)
+#define PLFO_MIN (-1.0)
+#define ALFO_MAX (+65536)
+#define ALFO_MIN (0)
//#define log2(n) (log((float) n)/log((float) 2))
@@ -69,7 +69,7 @@ struct YMF271Slot
// envelope generator
INT32 volume;
INT32 env_state;
- INT32 env_attack_step; // volume increase step in attack state
+ INT32 env_attack_step; // volume increase step in attack state
INT32 env_decay1_step;
INT32 env_decay2_step;
INT32 env_release_step;
@@ -122,37 +122,37 @@ static INT16 *wavetable[8];
static double plfo_table[4][8][LFO_LENGTH];
static int alfo_table[4][LFO_LENGTH];
-#define ENV_ATTACK 0
-#define ENV_DECAY1 1
-#define ENV_DECAY2 2
-#define ENV_RELEASE 3
+#define ENV_ATTACK 0
+#define ENV_DECAY1 1
+#define ENV_DECAY2 2
+#define ENV_RELEASE 3
-#define ENV_VOLUME_SHIFT 16
+#define ENV_VOLUME_SHIFT 16
-#define INF 100000000.0
+#define INF 100000000.0
static const double ARTime[] =
{
- INF, INF, INF, INF, 6188.12, 4980.68, 4144.76, 3541.04,
- 3094.06, 2490.34, 2072.38, 1770.52, 1547.03, 1245.17, 1036.19, 885.26,
- 773.51, 622.59, 518.10, 441.63, 386.76, 311.29, 259.05, 221.32,
- 193.38, 155.65, 129.52, 110.66, 96.69, 77.82, 64.76, 55.33,
- 48.34, 38.91, 32.38, 27.66, 24.17, 19.46, 16.19, 13.83,
- 12.09, 9.73, 8.10, 6.92, 6.04, 4.86, 4.05, 3.46,
- 3.02, 2.47, 2.14, 1.88, 1.70, 1.38, 1.16, 1.02,
- 0.88, 0.70, 0.57, 0.48, 0.43, 0.43, 0.43, 0.07
+ INF, INF, INF, INF, 6188.12, 4980.68, 4144.76, 3541.04,
+ 3094.06, 2490.34, 2072.38, 1770.52, 1547.03, 1245.17, 1036.19, 885.26,
+ 773.51, 622.59, 518.10, 441.63, 386.76, 311.29, 259.05, 221.32,
+ 193.38, 155.65, 129.52, 110.66, 96.69, 77.82, 64.76, 55.33,
+ 48.34, 38.91, 32.38, 27.66, 24.17, 19.46, 16.19, 13.83,
+ 12.09, 9.73, 8.10, 6.92, 6.04, 4.86, 4.05, 3.46,
+ 3.02, 2.47, 2.14, 1.88, 1.70, 1.38, 1.16, 1.02,
+ 0.88, 0.70, 0.57, 0.48, 0.43, 0.43, 0.43, 0.07
};
static const double DCTime[] =
{
- INF, INF, INF, INF, 93599.64, 74837.91, 62392.02, 53475.56,
- 46799.82, 37418.96, 31196.01, 26737.78, 23399.91, 18709.48, 15598.00, 13368.89,
- 11699.95, 9354.74, 7799.00, 6684.44, 5849.98, 4677.37, 3899.50, 3342.22,
- 2924.99, 2338.68, 1949.75, 1671.11, 1462.49, 1169.34, 974.88, 835.56,
- 731.25, 584.67, 487.44, 417.78, 365.62, 292.34, 243.72, 208.89,
- 182.81, 146.17, 121.86, 104.44, 91.41, 73.08, 60.93, 52.22,
- 45.69, 36.55, 33.85, 26.09, 22.83, 18.28, 15.22, 13.03,
- 11.41, 9.12, 7.60, 6.51, 5.69, 5.69, 5.69, 5.69
+ INF, INF, INF, INF, 93599.64, 74837.91, 62392.02, 53475.56,
+ 46799.82, 37418.96, 31196.01, 26737.78, 23399.91, 18709.48, 15598.00, 13368.89,
+ 11699.95, 9354.74, 7799.00, 6684.44, 5849.98, 4677.37, 3899.50, 3342.22,
+ 2924.99, 2338.68, 1949.75, 1671.11, 1462.49, 1169.34, 974.88, 835.56,
+ 731.25, 584.67, 487.44, 417.78, 365.62, 292.34, 243.72, 208.89,
+ 182.81, 146.17, 121.86, 104.44, 91.41, 73.08, 60.93, 52.22,
+ 45.69, 36.55, 33.85, 26.09, 22.83, 18.28, 15.22, 13.03,
+ 11.41, 9.12, 7.60, 6.51, 5.69, 5.69, 5.69, 5.69
};
/* Notes about the LFO Frequency Table below:
@@ -187,38 +187,38 @@ lfo_freq = 44100 / lfo_period }
static const double LFO_frequency_table[256] =
{
- 0.00066, 0.00068, 0.00070, 0.00073, 0.00075, 0.00078, 0.00081, 0.00084,
- 0.00088, 0.00091, 0.00096, 0.00100, 0.00105, 0.00111, 0.00117, 0.00124,
- 0.00131, 0.00136, 0.00140, 0.00145, 0.00150, 0.00156, 0.00162, 0.00168,
- 0.00175, 0.00183, 0.00191, 0.00200, 0.00210, 0.00221, 0.00234, 0.00247,
- 0.00263, 0.00271, 0.00280, 0.00290, 0.00300, 0.00312, 0.00324, 0.00336,
- 0.00350, 0.00366, 0.00382, 0.00401, 0.00421, 0.00443, 0.00467, 0.00495,
- 0.00526, 0.00543, 0.00561, 0.00580, 0.00601, 0.00623, 0.00647, 0.00673,
- 0.00701, 0.00731, 0.00765, 0.00801, 0.00841, 0.00885, 0.00935, 0.00990,
- 0.01051, 0.01085, 0.01122, 0.01160, 0.01202, 0.01246, 0.01294, 0.01346,
- 0.01402, 0.01463, 0.01529, 0.01602, 0.01682, 0.01771, 0.01869, 0.01979,
- 0.02103, 0.02171, 0.02243, 0.02320, 0.02403, 0.02492, 0.02588, 0.02692,
- 0.02804, 0.02926, 0.03059, 0.03204, 0.03365, 0.03542, 0.03738, 0.03958,
- 0.04206, 0.04341, 0.04486, 0.04641, 0.04807, 0.04985, 0.05176, 0.05383,
- 0.05608, 0.05851, 0.06117, 0.06409, 0.06729, 0.07083, 0.07477, 0.07917,
- 0.08411, 0.08683, 0.08972, 0.09282, 0.09613, 0.09969, 0.10353, 0.10767,
- 0.11215, 0.11703, 0.12235, 0.12817, 0.13458, 0.14167, 0.14954, 0.15833,
- 0.16823, 0.17365, 0.17944, 0.18563, 0.19226, 0.19938, 0.20705, 0.21533,
- 0.22430, 0.23406, 0.24470, 0.25635, 0.26917, 0.28333, 0.29907, 0.31666,
- 0.33646, 0.34731, 0.35889, 0.37126, 0.38452, 0.39876, 0.41410, 0.43066,
- 0.44861, 0.46811, 0.48939, 0.51270, 0.53833, 0.56666, 0.59814, 0.63333,
- 0.67291, 0.69462, 0.71777, 0.74252, 0.76904, 0.79753, 0.82820, 0.86133,
- 0.89722, 0.93623, 0.97878, 1.02539, 1.07666, 1.13333, 1.19629, 1.26666,
- 1.34583, 1.38924, 1.43555, 1.48505, 1.53809, 1.59509, 1.65640, 1.72266,
- 1.79443, 1.87245, 1.95756, 2.05078, 2.15332, 2.26665, 2.39258, 2.53332,
- 2.69165, 2.77848, 2.87109, 2.97010, 3.07617, 3.19010, 3.31280, 3.44531,
- 3.58887, 3.74490, 3.91513, 4.10156, 4.30664, 4.53331, 4.78516, 5.06664,
- 5.38330, 5.55696, 5.74219, 5.94019, 6.15234, 6.38021, 6.62560, 6.89062,
- 7.17773, 7.48981, 7.83026, 8.20312, 8.61328, 9.06661, 9.57031, 10.13327,
- 10.76660, 11.11391, 11.48438, 11.88039, 12.30469, 12.76042, 13.25120, 13.78125,
- 14.35547, 14.97962, 15.66051, 16.40625, 17.22656, 18.13322, 19.14062, 20.26654,
- 21.53320, 22.96875, 24.60938, 26.50240, 28.71094, 31.32102, 34.45312, 38.28125,
- 43.06641, 49.21875, 57.42188, 68.90625, 86.13281, 114.84375, 172.26562, 344.53125
+ 0.00066, 0.00068, 0.00070, 0.00073, 0.00075, 0.00078, 0.00081, 0.00084,
+ 0.00088, 0.00091, 0.00096, 0.00100, 0.00105, 0.00111, 0.00117, 0.00124,
+ 0.00131, 0.00136, 0.00140, 0.00145, 0.00150, 0.00156, 0.00162, 0.00168,
+ 0.00175, 0.00183, 0.00191, 0.00200, 0.00210, 0.00221, 0.00234, 0.00247,
+ 0.00263, 0.00271, 0.00280, 0.00290, 0.00300, 0.00312, 0.00324, 0.00336,
+ 0.00350, 0.00366, 0.00382, 0.00401, 0.00421, 0.00443, 0.00467, 0.00495,
+ 0.00526, 0.00543, 0.00561, 0.00580, 0.00601, 0.00623, 0.00647, 0.00673,
+ 0.00701, 0.00731, 0.00765, 0.00801, 0.00841, 0.00885, 0.00935, 0.00990,
+ 0.01051, 0.01085, 0.01122, 0.01160, 0.01202, 0.01246, 0.01294, 0.01346,
+ 0.01402, 0.01463, 0.01529, 0.01602, 0.01682, 0.01771, 0.01869, 0.01979,
+ 0.02103, 0.02171, 0.02243, 0.02320, 0.02403, 0.02492, 0.02588, 0.02692,
+ 0.02804, 0.02926, 0.03059, 0.03204, 0.03365, 0.03542, 0.03738, 0.03958,
+ 0.04206, 0.04341, 0.04486, 0.04641, 0.04807, 0.04985, 0.05176, 0.05383,
+ 0.05608, 0.05851, 0.06117, 0.06409, 0.06729, 0.07083, 0.07477, 0.07917,
+ 0.08411, 0.08683, 0.08972, 0.09282, 0.09613, 0.09969, 0.10353, 0.10767,
+ 0.11215, 0.11703, 0.12235, 0.12817, 0.13458, 0.14167, 0.14954, 0.15833,
+ 0.16823, 0.17365, 0.17944, 0.18563, 0.19226, 0.19938, 0.20705, 0.21533,
+ 0.22430, 0.23406, 0.24470, 0.25635, 0.26917, 0.28333, 0.29907, 0.31666,
+ 0.33646, 0.34731, 0.35889, 0.37126, 0.38452, 0.39876, 0.41410, 0.43066,
+ 0.44861, 0.46811, 0.48939, 0.51270, 0.53833, 0.56666, 0.59814, 0.63333,
+ 0.67291, 0.69462, 0.71777, 0.74252, 0.76904, 0.79753, 0.82820, 0.86133,
+ 0.89722, 0.93623, 0.97878, 1.02539, 1.07666, 1.13333, 1.19629, 1.26666,
+ 1.34583, 1.38924, 1.43555, 1.48505, 1.53809, 1.59509, 1.65640, 1.72266,
+ 1.79443, 1.87245, 1.95756, 2.05078, 2.15332, 2.26665, 2.39258, 2.53332,
+ 2.69165, 2.77848, 2.87109, 2.97010, 3.07617, 3.19010, 3.31280, 3.44531,
+ 3.58887, 3.74490, 3.91513, 4.10156, 4.30664, 4.53331, 4.78516, 5.06664,
+ 5.38330, 5.55696, 5.74219, 5.94019, 6.15234, 6.38021, 6.62560, 6.89062,
+ 7.17773, 7.48981, 7.83026, 8.20312, 8.61328, 9.06661, 9.57031, 10.13327,
+ 10.76660, 11.11391, 11.48438, 11.88039, 12.30469, 12.76042, 13.25120, 13.78125,
+ 14.35547, 14.97962, 15.66051, 16.40625, 17.22656, 18.13322, 19.14062, 20.26654,
+ 21.53320, 22.96875, 24.60938, 26.50240, 28.71094, 31.32102, 34.45312, 38.28125,
+ 43.06641, 49.21875, 57.42188, 68.90625, 86.13281, 114.84375, 172.26562, 344.53125
};
static const int RKS_Table[32][8] =
@@ -351,7 +351,7 @@ INLINE void calculate_step(YMF271Slot *slot)
{
double st;
- if (slot->waveform == 7) // external waveform (PCM)
+ if (slot->waveform == 7) // external waveform (PCM)
{
st = (double)(2 * (slot->fns | 2048)) * pow_table[slot->block] * fs_frequency[slot->fs];
st = st * multiple_table[slot->multiple];
@@ -359,11 +359,11 @@ INLINE void calculate_step(YMF271Slot *slot)
// LFO phase modulation
st *= slot->lfo_phasemod;
- st /= (double)(524288/65536); // pre-multiply with 65536
+ st /= (double)(524288/65536); // pre-multiply with 65536
slot->step = (UINT64)st;
}
- else // internal waveform (FM)
+ else // internal waveform (FM)
{
st = (double)(2 * slot->fns) * pow_table[slot->block];
st = st * multiple_table[slot->multiple] * (double)(SIN_LEN);
@@ -371,7 +371,7 @@ INLINE void calculate_step(YMF271Slot *slot)
// LFO phase modulation
st *= slot->lfo_phasemod;
- st /= (double)(536870912/65536); // pre-multiply with 65536
+ st /= (double)(536870912/65536); // pre-multiply with 65536
slot->step = (UINT64)st;
}
@@ -451,7 +451,7 @@ static void init_envelope(YMF271Slot *slot)
rate = GET_KEYSCALED_RATE(slot->ar * 2, keycode, slot->keyscale);
time = ARTime[rate];
- attack_length = (UINT32)((time * 44100.0) / 1000.0); // attack end time in samples
+ attack_length = (UINT32)((time * 44100.0) / 1000.0); // attack end time in samples
slot->env_attack_step = (int)(((double)(160-0) / (double)(attack_length)) * 65536.0);
// init decay1 state
@@ -475,7 +475,7 @@ static void init_envelope(YMF271Slot *slot)
release_length = (UINT32)((time * 44100.0) / 1000.0);
slot->env_release_step = (int)(((double)(255-0) / (double)(release_length)) * 65536.0);
- slot->volume = (255-160) << ENV_VOLUME_SHIFT; // -60db
+ slot->volume = (255-160) << ENV_VOLUME_SHIFT; // -60db
slot->env_state = ENV_ATTACK;
}
@@ -506,10 +506,10 @@ INLINE int calculate_slot_volume(YMF271Slot *slot)
switch (slot->ams)
{
- case 0: lfo_volume = 65536; break; // 0dB
- case 1: lfo_volume = 65536 - (((UINT64)slot->lfo_amplitude * 33124) >> 16); break; // 5.90625dB
- case 2: lfo_volume = 65536 - (((UINT64)slot->lfo_amplitude * 16742) >> 16); break; // 11.8125dB
- case 3: lfo_volume = 65536 - (((UINT64)slot->lfo_amplitude * 4277) >> 16); break; // 23.625dB
+ case 0: lfo_volume = 65536; break; // 0dB
+ case 1: lfo_volume = 65536 - (((UINT64)slot->lfo_amplitude * 33124) >> 16); break; // 5.90625dB
+ case 2: lfo_volume = 65536 - (((UINT64)slot->lfo_amplitude * 16742) >> 16); break; // 11.8125dB
+ case 3: lfo_volume = 65536 - (((UINT64)slot->lfo_amplitude * 4277) >> 16); break; // 23.625dB
}
env_volume = ((UINT64)env_volume_table[255 - (slot->volume >> ENV_VOLUME_SHIFT)] * (UINT64)lfo_volume) >> 16;
@@ -727,7 +727,7 @@ static STREAM_UPDATE( ymf271_update )
switch (slot_group->sync)
{
- case 0: // 4 operator FM
+ case 0: // 4 operator FM
{
int slot1 = j + (0*12);
int slot2 = j + (1*12);
@@ -913,7 +913,7 @@ static STREAM_UPDATE( ymf271_update )
break;
}
- case 1: // 2x 2 operator FM
+ case 1: // 2x 2 operator FM
{
for (op = 0; op < 2; op++)
{
@@ -967,7 +967,7 @@ static STREAM_UPDATE( ymf271_update )
break;
}
- case 2: // 3 operator FM + PCM
+ case 2: // 3 operator FM + PCM
{
int slot1 = j + (0*12);
int slot2 = j + (1*12);
@@ -1062,7 +1062,7 @@ static STREAM_UPDATE( ymf271_update )
break;
}
- case 3: // PCM
+ case 3: // PCM
{
update_pcm(chip, j + (0*12), mixp, samples);
update_pcm(chip, j + (1*12), mixp, samples);
@@ -1254,19 +1254,19 @@ static void ymf271_write_fm(YMF271Chip *chip, int grp, int adr, int data)
sync_mode = 0;
switch (chip->groups[slot_group].sync)
{
- case 0: // 4 slot mode
+ case 0: // 4 slot mode
{
if (grp == 0)
sync_mode = 1;
break;
}
- case 1: // 2x 2 slot mode
+ case 1: // 2x 2 slot mode
{
if (grp == 0 || grp == 1)
sync_mode = 1;
break;
}
- case 2: // 3 slot + 1 slot mode
+ case 2: // 3 slot + 1 slot mode
{
if (grp == 0)
sync_mode = 1;
@@ -1277,11 +1277,11 @@ static void ymf271_write_fm(YMF271Chip *chip, int grp, int adr, int data)
break;
}
- if (sync_mode && sync_reg) // key-on slot & synced register
+ if (sync_mode && sync_reg) // key-on slot & synced register
{
switch (chip->groups[slot_group].sync)
{
- case 0: // 4 slot mode
+ case 0: // 4 slot mode
{
write_register(chip, (12 * 0) + slot_group, reg, data);
write_register(chip, (12 * 1) + slot_group, reg, data);
@@ -1289,21 +1289,21 @@ static void ymf271_write_fm(YMF271Chip *chip, int grp, int adr, int data)
write_register(chip, (12 * 3) + slot_group, reg, data);
break;
}
- case 1: // 2x 2 slot mode
+ case 1: // 2x 2 slot mode
{
- if (grp == 0) // Slot 1 - Slot 3
+ if (grp == 0) // Slot 1 - Slot 3
{
write_register(chip, (12 * 0) + slot_group, reg, data);
write_register(chip, (12 * 2) + slot_group, reg, data);
}
- else // Slot 2 - Slot 4
+ else // Slot 2 - Slot 4
{
write_register(chip, (12 * 1) + slot_group, reg, data);
write_register(chip, (12 * 3) + slot_group, reg, data);
}
break;
}
- case 2: // 3 slot + 1 slot mode
+ case 2: // 3 slot + 1 slot mode
{
// 1 slot is handled normally
write_register(chip, (12 * 0) + slot_group, reg, data);
@@ -1315,7 +1315,7 @@ static void ymf271_write_fm(YMF271Chip *chip, int grp, int adr, int data)
break;
}
}
- else // write register normally
+ else // write register normally
{
write_register(chip, (12 * grp) + slot_group, reg, data);
}
@@ -1461,11 +1461,11 @@ static void ymf271_write_timer(YMF271Chip *chip, int data)
case 0x13:
if (data & 1)
- { // timer A load
+ { // timer A load
chip->timerAVal = chip->timerA;
}
if (data & 2)
- { // timer B load
+ { // timer B load
chip->timerBVal = chip->timerB;
}
if (data & 4)
@@ -1479,7 +1479,7 @@ static void ymf271_write_timer(YMF271Chip *chip, int data)
chip->enable |= 8;
}
if (data & 0x10)
- { // timer A reset
+ { // timer A reset
chip->irqstate &= ~1;
chip->status &= ~1;
chip->timerAVal |= 0x300;
@@ -1491,7 +1491,7 @@ static void ymf271_write_timer(YMF271Chip *chip, int data)
chip->timA->adjust(period, 0, period);
}
if (data & 0x20)
- { // timer B reset
+ { // timer B reset
chip->irqstate &= ~2;
chip->status &= ~2;
@@ -1814,7 +1814,7 @@ const device_type YMF271 = &device_creator<ymf271_device>;
ymf271_device::ymf271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YMF271, "YMF271", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(YMF271Chip);
}
@@ -1856,5 +1856,3 @@ void ymf271_device::sound_stream_update(sound_stream &stream, stream_sample_t **
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/ymf271.h b/src/emu/sound/ymf271.h
index 640b2030b17..81d49c56b77 100644
--- a/src/emu/sound/ymf271.h
+++ b/src/emu/sound/ymf271.h
@@ -8,16 +8,16 @@
struct ymf271_interface
{
- devcb_read8 ext_read; /* external memory read */
- devcb_write8 ext_write; /* external memory write */
- void (*irq_callback)(device_t *device, int state); /* irq callback */
+ devcb_read8 ext_read; /* external memory read */
+ devcb_write8 ext_write; /* external memory write */
+ void (*irq_callback)(device_t *device, int state); /* irq callback */
};
DECLARE_READ8_DEVICE_HANDLER( ymf271_r );
DECLARE_WRITE8_DEVICE_HANDLER( ymf271_w );
class ymf271_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ymf271_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/ymf278b.c b/src/emu/sound/ymf278b.c
index f23992bdf1a..2563e4d8f5f 100644
--- a/src/emu/sound/ymf278b.c
+++ b/src/emu/sound/ymf278b.c
@@ -75,32 +75,32 @@ struct YMF278BChip;
struct YMF278BSlot
{
- INT16 wave; /* wavetable number */
- INT16 F_NUMBER; /* frequency */
- INT8 octave; /* octave */
- INT8 preverb; /* pseudo-reverb */
- INT8 DAMP; /* damping */
- INT8 CH; /* output channel */
- INT8 LD; /* level direct */
- INT8 TL; /* total level */
- INT8 pan; /* panpot */
- INT8 LFO; /* LFO */
- INT8 VIB; /* vibrato */
- INT8 AM; /* tremolo */
-
- INT8 AR; /* attack rate */
- INT8 D1R; /* decay 1 rate */
- INT8 DL; /* decay level */
- INT8 D2R; /* decay 2 rate */
- INT8 RC; /* rate correction */
- INT8 RR; /* release rate */
-
- UINT32 step; /* fixed-point frequency step */
- UINT64 stepptr; /* fixed-point pointer into the sample */
-
- INT8 active; /* channel is playing */
- INT8 KEY_ON; /* slot keyed on */
- INT8 bits; /* width of the samples */
+ INT16 wave; /* wavetable number */
+ INT16 F_NUMBER; /* frequency */
+ INT8 octave; /* octave */
+ INT8 preverb; /* pseudo-reverb */
+ INT8 DAMP; /* damping */
+ INT8 CH; /* output channel */
+ INT8 LD; /* level direct */
+ INT8 TL; /* total level */
+ INT8 pan; /* panpot */
+ INT8 LFO; /* LFO */
+ INT8 VIB; /* vibrato */
+ INT8 AM; /* tremolo */
+
+ INT8 AR; /* attack rate */
+ INT8 D1R; /* decay 1 rate */
+ INT8 DL; /* decay level */
+ INT8 D2R; /* decay 2 rate */
+ INT8 RC; /* rate correction */
+ INT8 RR; /* release rate */
+
+ UINT32 step; /* fixed-point frequency step */
+ UINT64 stepptr; /* fixed-point pointer into the sample */
+
+ INT8 active; /* channel is playing */
+ INT8 KEY_ON; /* slot keyed on */
+ INT8 bits; /* width of the samples */
UINT32 startaddr;
UINT32 loopaddr;
UINT32 endaddr;
@@ -111,8 +111,8 @@ struct YMF278BSlot
UINT32 env_vol_lim;
INT8 env_preverb;
- int num; /* slot number (for debug only) */
- YMF278BChip *chip; /* pointer back to parent chip */
+ int num; /* slot number (for debug only) */
+ YMF278BChip *chip; /* pointer back to parent chip */
};
struct YMF278BChip
@@ -146,10 +146,10 @@ struct YMF278BChip
int clock;
// precomputed tables
- UINT32 lut_ar[64]; // attack rate
- UINT32 lut_dr[64]; // decay rate
- INT32 volume[256*4]; // precalculated attenuation values with some margin for envelope and pan levels
- int pan_left[16],pan_right[16]; // pan volume offsets
+ UINT32 lut_ar[64]; // attack rate
+ UINT32 lut_dr[64]; // decay rate
+ INT32 volume[256*4]; // precalculated attenuation values with some margin for envelope and pan levels
+ int pan_left[16],pan_right[16]; // pan volume offsets
INT32 mix_level[8];
sound_stream * stream;
@@ -696,7 +696,7 @@ static void ymf278b_C_w(YMF278BChip *chip, UINT8 reg, UINT8 data, int init)
// LFO and vibrato level, not hooked up yet
slot->LFO = (data>>3)&0x7;
slot->VIB = data&0x7;
- break;
+ break;
case 6:
slot->AR = data>>4;
@@ -929,8 +929,8 @@ static DEVICE_RESET( ymf278b )
chip->timer_a->reset();
chip->timer_b->reset();
- chip->timer_busy->reset(); chip->status_busy = 0;
- chip->timer_ld->reset(); chip->status_ld = 0;
+ chip->timer_busy->reset(); chip->status_busy = 0;
+ chip->timer_ld->reset(); chip->status_ld = 0;
chip->irq_line = CLEAR_LINE;
}
@@ -1091,7 +1091,7 @@ const device_type YMF278B = &device_creator<ymf278b_device>;
ymf278b_device::ymf278b_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YMF278B, "YMF278B", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(YMF278BChip);
}
@@ -1133,5 +1133,3 @@ void ymf278b_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/ymf278b.h b/src/emu/sound/ymf278b.h
index 493386b0e77..564248151bc 100644
--- a/src/emu/sound/ymf278b.h
+++ b/src/emu/sound/ymf278b.h
@@ -5,19 +5,19 @@
#include "devlegcy.h"
-#define YMF278B_STD_CLOCK (33868800) /* standard clock for OPL4 */
+#define YMF278B_STD_CLOCK (33868800) /* standard clock for OPL4 */
struct ymf278b_interface
{
- void (*irq_callback)(device_t *device, int state); /* irq callback */
+ void (*irq_callback)(device_t *device, int state); /* irq callback */
};
DECLARE_READ8_DEVICE_HANDLER( ymf278b_r );
DECLARE_WRITE8_DEVICE_HANDLER( ymf278b_w );
class ymf278b_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ymf278b_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/ymz280b.c b/src/emu/sound/ymz280b.c
index ffa6bbe56bf..33c98ef9f21 100644
--- a/src/emu/sound/ymz280b.c
+++ b/src/emu/sound/ymz280b.c
@@ -25,15 +25,15 @@
#include "ymz280b.h"
-#define MAX_SAMPLE_CHUNK 10000
-#define MAKE_WAVS 0
+#define MAX_SAMPLE_CHUNK 10000
+#define MAKE_WAVS 0
-#define FRAC_BITS 14
-#define FRAC_ONE (1 << FRAC_BITS)
-#define FRAC_MASK (FRAC_ONE - 1)
+#define FRAC_BITS 14
+#define FRAC_ONE (1 << FRAC_BITS)
+#define FRAC_MASK (FRAC_ONE - 1)
-#define INTERNAL_BUFFER_SIZE (1 << 15)
-#define INTERNAL_SAMPLE_RATE (chip->master_clock * 2.0)
+#define INTERNAL_BUFFER_SIZE (1 << 15)
+#define INTERNAL_SAMPLE_RATE (chip->master_clock * 2.0)
#if MAKE_WAVS
#include "wavwrite.h"
@@ -43,60 +43,60 @@
/* struct describing a single playing ADPCM voice */
struct YMZ280BVoice
{
- UINT8 playing; /* 1 if we are actively playing */
-
- UINT8 keyon; /* 1 if the key is on */
- UINT8 looping; /* 1 if looping is enabled */
- UINT8 mode; /* current playback mode */
- UINT16 fnum; /* frequency */
- UINT8 level; /* output level */
- UINT8 pan; /* panning */
-
- UINT32 start; /* start address, in nibbles */
- UINT32 stop; /* stop address, in nibbles */
- UINT32 loop_start; /* loop start address, in nibbles */
- UINT32 loop_end; /* loop end address, in nibbles */
- UINT32 position; /* current position, in nibbles */
-
- INT32 signal; /* current ADPCM signal */
- INT32 step; /* current ADPCM step */
-
- INT32 loop_signal; /* signal at loop start */
- INT32 loop_step; /* step at loop start */
- UINT32 loop_count; /* number of loops so far */
-
- INT32 output_left; /* output volume (left) */
- INT32 output_right; /* output volume (right) */
- INT32 output_step; /* step value for frequency conversion */
- INT32 output_pos; /* current fractional position */
- INT16 last_sample; /* last sample output */
- INT16 curr_sample; /* current sample target */
- UINT8 irq_schedule; /* 1 if the IRQ state is updated by timer */
+ UINT8 playing; /* 1 if we are actively playing */
+
+ UINT8 keyon; /* 1 if the key is on */
+ UINT8 looping; /* 1 if looping is enabled */
+ UINT8 mode; /* current playback mode */
+ UINT16 fnum; /* frequency */
+ UINT8 level; /* output level */
+ UINT8 pan; /* panning */
+
+ UINT32 start; /* start address, in nibbles */
+ UINT32 stop; /* stop address, in nibbles */
+ UINT32 loop_start; /* loop start address, in nibbles */
+ UINT32 loop_end; /* loop end address, in nibbles */
+ UINT32 position; /* current position, in nibbles */
+
+ INT32 signal; /* current ADPCM signal */
+ INT32 step; /* current ADPCM step */
+
+ INT32 loop_signal; /* signal at loop start */
+ INT32 loop_step; /* step at loop start */
+ UINT32 loop_count; /* number of loops so far */
+
+ INT32 output_left; /* output volume (left) */
+ INT32 output_right; /* output volume (right) */
+ INT32 output_step; /* step value for frequency conversion */
+ INT32 output_pos; /* current fractional position */
+ INT16 last_sample; /* last sample output */
+ INT16 curr_sample; /* current sample target */
+ UINT8 irq_schedule; /* 1 if the IRQ state is updated by timer */
};
struct ymz280b_state
{
- sound_stream * stream; /* which stream are we using */
- UINT8 *region_base; /* pointer to the base of the region */
+ sound_stream * stream; /* which stream are we using */
+ UINT8 *region_base; /* pointer to the base of the region */
UINT32 region_size;
- UINT8 current_register; /* currently accessible register */
- UINT8 status_register; /* current status register */
- UINT8 irq_state; /* current IRQ state */
- UINT8 irq_mask; /* current IRQ mask */
- UINT8 irq_enable; /* current IRQ enable */
- UINT8 keyon_enable; /* key on enable */
- UINT8 ext_mem_enable; /* external memory enable */
- double master_clock; /* master clock frequency */
- void (*irq_callback)(device_t *, int); /* IRQ callback */
- struct YMZ280BVoice voice[8]; /* the 8 voices */
+ UINT8 current_register; /* currently accessible register */
+ UINT8 status_register; /* current status register */
+ UINT8 irq_state; /* current IRQ state */
+ UINT8 irq_mask; /* current IRQ mask */
+ UINT8 irq_enable; /* current IRQ enable */
+ UINT8 keyon_enable; /* key on enable */
+ UINT8 ext_mem_enable; /* external memory enable */
+ double master_clock; /* master clock frequency */
+ void (*irq_callback)(device_t *, int); /* IRQ callback */
+ struct YMZ280BVoice voice[8]; /* the 8 voices */
UINT32 rom_addr_hi;
UINT32 rom_addr_mid;
- UINT32 rom_readback_addr; /* where the CPU can read the ROM */
- devcb_resolved_read8 ext_ram_read; /* external RAM read handler */
- devcb_resolved_write8 ext_ram_write; /* external RAM write handler */
+ UINT32 rom_readback_addr; /* where the CPU can read the ROM */
+ devcb_resolved_read8 ext_ram_read; /* external RAM read handler */
+ devcb_resolved_write8 ext_ram_write; /* external RAM write handler */
#if MAKE_WAVS
- void * wavresample; /* resampled waveform */
+ void * wavresample; /* resampled waveform */
#endif
INT16 *scratch;
@@ -608,10 +608,10 @@ static STREAM_UPDATE( ymz280b_update )
/* generate them into our buffer */
switch (voice->playing << 7 | voice->mode)
{
- case 0x81: samples_left = generate_adpcm(chip, voice, chip->scratch, new_samples); break;
- case 0x82: samples_left = generate_pcm8(chip, voice, chip->scratch, new_samples); break;
- case 0x83: samples_left = generate_pcm16(chip, voice, chip->scratch, new_samples); break;
- default: samples_left = 0; memset(chip->scratch, 0, new_samples * sizeof(chip->scratch[0])); break;
+ case 0x81: samples_left = generate_adpcm(chip, voice, chip->scratch, new_samples); break;
+ case 0x82: samples_left = generate_pcm8(chip, voice, chip->scratch, new_samples); break;
+ case 0x83: samples_left = generate_pcm16(chip, voice, chip->scratch, new_samples); break;
+ default: samples_left = 0; memset(chip->scratch, 0, new_samples * sizeof(chip->scratch[0])); break;
}
/* if there are leftovers, ramp back to 0 */
@@ -806,12 +806,12 @@ static void write_to_register(ymz280b_state *chip, int data)
switch (chip->current_register & 0xe3)
{
- case 0x00: /* pitch low 8 bits */
+ case 0x00: /* pitch low 8 bits */
voice->fnum = (voice->fnum & 0x100) | (data & 0xff);
update_step(chip, voice);
break;
- case 0x01: /* pitch upper 1 bit, loop, key on, mode */
+ case 0x01: /* pitch upper 1 bit, loop, key on, mode */
voice->fnum = (voice->fnum & 0xff) | ((data & 0x01) << 8);
voice->looping = (data & 0x10) >> 4;
if ((data & 0x60) == 0) data &= 0x7f; /* ignore mode setting and set to same state as KON=0 */
@@ -838,61 +838,61 @@ static void write_to_register(ymz280b_state *chip, int data)
update_step(chip, voice);
break;
- case 0x02: /* total level */
+ case 0x02: /* total level */
voice->level = data;
update_volumes(voice);
break;
- case 0x03: /* pan */
+ case 0x03: /* pan */
voice->pan = data & 0x0f;
update_volumes(voice);
break;
- case 0x20: /* start address high */
+ case 0x20: /* start address high */
voice->start = (voice->start & (0x00ffff << 1)) | (data << 17);
break;
- case 0x21: /* loop start address high */
+ case 0x21: /* loop start address high */
voice->loop_start = (voice->loop_start & (0x00ffff << 1)) | (data << 17);
break;
- case 0x22: /* loop end address high */
+ case 0x22: /* loop end address high */
voice->loop_end = (voice->loop_end & (0x00ffff << 1)) | (data << 17);
break;
- case 0x23: /* stop address high */
+ case 0x23: /* stop address high */
voice->stop = (voice->stop & (0x00ffff << 1)) | (data << 17);
break;
- case 0x40: /* start address middle */
+ case 0x40: /* start address middle */
voice->start = (voice->start & (0xff00ff << 1)) | (data << 9);
break;
- case 0x41: /* loop start address middle */
+ case 0x41: /* loop start address middle */
voice->loop_start = (voice->loop_start & (0xff00ff << 1)) | (data << 9);
break;
- case 0x42: /* loop end address middle */
+ case 0x42: /* loop end address middle */
voice->loop_end = (voice->loop_end & (0xff00ff << 1)) | (data << 9);
break;
- case 0x43: /* stop address middle */
+ case 0x43: /* stop address middle */
voice->stop = (voice->stop & (0xff00ff << 1)) | (data << 9);
break;
- case 0x60: /* start address low */
+ case 0x60: /* start address low */
voice->start = (voice->start & (0xffff00 << 1)) | (data << 1);
break;
- case 0x61: /* loop start address low */
+ case 0x61: /* loop start address low */
voice->loop_start = (voice->loop_start & (0xffff00 << 1)) | (data << 1);
break;
- case 0x62: /* loop end address low */
+ case 0x62: /* loop end address low */
voice->loop_end = (voice->loop_end & (0xffff00 << 1)) | (data << 1);
break;
- case 0x63: /* stop address low */
+ case 0x63: /* stop address low */
voice->stop = (voice->stop & (0xffff00 << 1)) | (data << 1);
break;
@@ -914,19 +914,19 @@ static void write_to_register(ymz280b_state *chip, int data)
logerror("YMZ280B: DSP register write %02X = %02X\n", chip->current_register, data);
break;
- case 0x84: /* ROM readback / RAM write (high) */
+ case 0x84: /* ROM readback / RAM write (high) */
chip->rom_addr_hi = data << 16;
break;
- case 0x85: /* ROM readback / RAM write (middle) */
+ case 0x85: /* ROM readback / RAM write (middle) */
chip->rom_addr_mid = data << 8;
break;
- case 0x86: /* ROM readback / RAM write (low) -> update latch */
+ case 0x86: /* ROM readback / RAM write (low) -> update latch */
chip->rom_readback_addr = chip->rom_addr_hi | chip->rom_addr_mid | data;
break;
- case 0x87: /* RAM write */
+ case 0x87: /* RAM write */
if (chip->ext_mem_enable)
{
if (!chip->ext_ram_write.isnull())
@@ -937,12 +937,12 @@ static void write_to_register(ymz280b_state *chip, int data)
}
break;
- case 0xfe: /* IRQ mask */
+ case 0xfe: /* IRQ mask */
chip->irq_mask = data;
update_irq_state(chip);
break;
- case 0xff: /* IRQ enable, test, etc */
+ case 0xff: /* IRQ enable, test, etc */
chip->ext_mem_enable = (data & 0x40) >> 6;
chip->irq_enable = (data & 0x10) >> 4;
update_irq_state(chip);
@@ -1046,7 +1046,7 @@ const device_type YMZ280B = &device_creator<ymz280b_device>;
ymz280b_device::ymz280b_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YMZ280B, "YMZ280B", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(ymz280b_state);
}
@@ -1088,5 +1088,3 @@ void ymz280b_device::sound_stream_update(sound_stream &stream, stream_sample_t *
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/ymz280b.h b/src/emu/sound/ymz280b.h
index a1328600501..13ce2beb4d3 100644
--- a/src/emu/sound/ymz280b.h
+++ b/src/emu/sound/ymz280b.h
@@ -15,16 +15,16 @@
struct ymz280b_interface
{
- void (*irq_callback)(device_t *device, int state); /* irq callback */
- devcb_read8 ext_read; /* external RAM read */
- devcb_write8 ext_write; /* external RAM write */
+ void (*irq_callback)(device_t *device, int state); /* irq callback */
+ devcb_read8 ext_read; /* external RAM read */
+ devcb_write8 ext_write; /* external RAM write */
};
DECLARE_READ8_DEVICE_HANDLER ( ymz280b_r );
DECLARE_WRITE8_DEVICE_HANDLER( ymz280b_w );
class ymz280b_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
ymz280b_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/emu/sound/ymz770.c b/src/emu/sound/ymz770.c
index 8e02497536a..135b8d6b780 100644
--- a/src/emu/sound/ymz770.c
+++ b/src/emu/sound/ymz770.c
@@ -20,7 +20,7 @@ const device_type YMZ770 = &device_creator<ymz770_device>;
ymz770_device::ymz770_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, YMZ770, "Yamaha YMZ770", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
diff --git a/src/emu/sound/ymz770.h b/src/emu/sound/ymz770.h
index cfacdcea874..4ffc213671c 100644
--- a/src/emu/sound/ymz770.h
+++ b/src/emu/sound/ymz770.h
@@ -34,29 +34,29 @@ class mpeg_audio;
class ymz770_device : public device_t, public device_sound_interface
{
- struct ymz_channel
- {
- UINT8 phrase;
- UINT8 pan;
- UINT8 volume;
- UINT8 control;
+ struct ymz_channel
+ {
+ UINT8 phrase;
+ UINT8 pan;
+ UINT8 volume;
+ UINT8 control;
- bool is_playing, last_block;
+ bool is_playing, last_block;
- mpeg_audio *decoder;
+ mpeg_audio *decoder;
- INT16 output_data[1152];
- int output_remaining;
- int output_ptr;
+ INT16 output_data[1152];
+ int output_remaining;
+ int output_ptr;
int pptr;
- UINT8 sequence;
- UINT8 seqcontrol;
- UINT8 seqdelay;
- UINT8 *seqdata;
- bool is_seq_playing;
+ UINT8 sequence;
+ UINT8 seqcontrol;
+ UINT8 seqdelay;
+ UINT8 *seqdata;
+ bool is_seq_playing;
- };
+ };
public:
@@ -76,14 +76,14 @@ protected:
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
- void internal_reg_write(int offset, UINT8 data);
+ void internal_reg_write(int offset, UINT8 data);
- // data
- UINT8 cur_reg;
- UINT8 *rom_base;
+ // data
+ UINT8 cur_reg;
+ UINT8 *rom_base;
int rom_size;
- ymz_channel channels[8];
+ ymz_channel channels[8];
};
@@ -91,4 +91,3 @@ protected:
extern const device_type YMZ770;
#endif /* __ymz770_H__ */
-
diff --git a/src/emu/sound/zsg2.c b/src/emu/sound/zsg2.c
index 11e3dde704f..64bf98fe279 100644
--- a/src/emu/sound/zsg2.c
+++ b/src/emu/sound/zsg2.c
@@ -82,30 +82,30 @@ static STREAM_UPDATE( update_stereo )
static void chan_w(zsg2_state *info, int chan, int reg, UINT16 data)
{
- info->zc[chan].v[reg] = data;
- // log_event("ZOOMCHAN", "chan %02x reg %x = %04x", chan, reg, data);
+ info->zc[chan].v[reg] = data;
+ // log_event("ZOOMCHAN", "chan %02x reg %x = %04x", chan, reg, data);
}
static UINT16 chan_r(zsg2_state *info, int chan, int reg)
{
- // log_event("ZOOMCHAN", "chan %02x read reg %x: %04x", chan, reg, zc[chan].v[reg]);
- return info->zc[chan].v[reg];
+ // log_event("ZOOMCHAN", "chan %02x read reg %x: %04x", chan, reg, zc[chan].v[reg]);
+ return info->zc[chan].v[reg];
}
static void check_channel(zsg2_state *info, int chan)
{
- // log_event("ZOOM", "chan %02x e=%04x f=%04x", chan, zc[chan].v[14], zc[chan].v[15]);
+ // log_event("ZOOM", "chan %02x e=%04x f=%04x", chan, zc[chan].v[14], zc[chan].v[15]);
}
static void keyon(zsg2_state *info, int chan)
{
#if 0
- log_event("ZOOM", "keyon %02x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x",
- chan,
- info->zc[chan].v[0x0], info->zc[chan].v[0x1], info->zc[chan].v[0x2], info->zc[chan].v[0x3],
- info->zc[chan].v[0x4], info->zc[chan].v[0x5], info->zc[chan].v[0x6], info->zc[chan].v[0x7],
- info->zc[chan].v[0x8], info->zc[chan].v[0x9], info->zc[chan].v[0xa], info->zc[chan].v[0xb],
- info->zc[chan].v[0xc], info->zc[chan].v[0xd], info->zc[chan].v[0xe], info->zc[chan].v[0xf]);
+ log_event("ZOOM", "keyon %02x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x %04x",
+ chan,
+ info->zc[chan].v[0x0], info->zc[chan].v[0x1], info->zc[chan].v[0x2], info->zc[chan].v[0x3],
+ info->zc[chan].v[0x4], info->zc[chan].v[0x5], info->zc[chan].v[0x6], info->zc[chan].v[0x7],
+ info->zc[chan].v[0x8], info->zc[chan].v[0x9], info->zc[chan].v[0xa], info->zc[chan].v[0xb],
+ info->zc[chan].v[0xc], info->zc[chan].v[0xd], info->zc[chan].v[0xe], info->zc[chan].v[0xf]);
#endif
}
@@ -176,7 +176,7 @@ WRITE16_DEVICE_HANDLER( zsg2_w )
zsg2_state *info = get_safe_token(device);
int adr = offset * 2;
- assert(mem_mask == 0xffff); // we only support full 16-bit accesses
+ assert(mem_mask == 0xffff); // we only support full 16-bit accesses
info->stream->update();
@@ -198,7 +198,7 @@ READ16_DEVICE_HANDLER( zsg2_r )
zsg2_state *info = get_safe_token(device);
int adr = offset * 2;
- assert(mem_mask == 0xffff); // we only support full 16-bit accesses
+ assert(mem_mask == 0xffff); // we only support full 16-bit accesses
if (adr < 0x600)
{
@@ -233,7 +233,7 @@ const device_type ZSG2 = &device_creator<zsg2_device>;
zsg2_device::zsg2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, ZSG2, "ZSG-2", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(zsg2_state);
}
@@ -266,5 +266,3 @@ void zsg2_device::sound_stream_update(sound_stream &stream, stream_sample_t **in
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/emu/sound/zsg2.h b/src/emu/sound/zsg2.h
index 1d3bf4b58da..78ccf05b280 100644
--- a/src/emu/sound/zsg2.h
+++ b/src/emu/sound/zsg2.h
@@ -16,7 +16,7 @@ struct zsg2_interface
};
class zsg2_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
zsg2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -39,4 +39,4 @@ private:
extern const device_type ZSG2;
-#endif /* __ZSG2_H__ */
+#endif /* __ZSG2_H__ */
diff --git a/src/emu/speaker.c b/src/emu/speaker.c
index 9214309d803..565a4f36360 100644
--- a/src/emu/speaker.c
+++ b/src/emu/speaker.c
@@ -49,9 +49,9 @@
// DEBUGGING
//**************************************************************************
-#define VERBOSE (0)
+#define VERBOSE (0)
-#define VPRINTF(x) do { if (VERBOSE) mame_printf_debug x; } while (0)
+#define VPRINTF(x) do { if (VERBOSE) mame_printf_debug x; } while (0)
@@ -74,15 +74,15 @@ const device_type SPEAKER = &device_creator<speaker_device>;
speaker_device::speaker_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SPEAKER, "Speaker", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_x(0.0),
- m_y(0.0),
- m_z(0.0)
+ device_mixer_interface(mconfig, *this),
+ m_x(0.0),
+ m_y(0.0),
+ m_z(0.0)
#ifdef MAME_DEBUG
,
- m_max_sample(0),
- m_clipped_samples(0),
- m_total_samples(0)
+ m_max_sample(0),
+ m_clipped_samples(0),
+ m_total_samples(0)
#endif
{
}
diff --git a/src/emu/speaker.h b/src/emu/speaker.h
index cf0b2f04130..27df82e23e5 100644
--- a/src/emu/speaker.h
+++ b/src/emu/speaker.h
@@ -81,7 +81,7 @@ extern const device_type SPEAKER;
// ======================> speaker_device
class speaker_device : public device_t,
- public device_mixer_interface
+ public device_mixer_interface
{
friend resource_pool_object<speaker_device>::~resource_pool_object();
@@ -101,15 +101,15 @@ protected:
virtual void device_start() ATTR_COLD;
// inline configuration state
- double m_x;
- double m_y;
- double m_z;
+ double m_x;
+ double m_y;
+ double m_z;
// internal state
#ifdef MAME_DEBUG
- INT32 m_max_sample; // largest sample value we've seen
- INT32 m_clipped_samples; // total number of clipped samples
- INT32 m_total_samples; // total number of samples
+ INT32 m_max_sample; // largest sample value we've seen
+ INT32 m_clipped_samples; // total number of clipped samples
+ INT32 m_total_samples; // total number of samples
#endif
};
@@ -118,4 +118,4 @@ protected:
typedef device_type_iterator<&device_creator<speaker_device>, speaker_device> speaker_device_iterator;
-#endif /* __SOUND_H__ */
+#endif /* __SOUND_H__ */
diff --git a/src/emu/sprite.c b/src/emu/sprite.c
index ed9ee12634b..424bed2625d 100644
--- a/src/emu/sprite.c
+++ b/src/emu/sprite.c
@@ -45,17 +45,17 @@
sparse_dirty_bitmap::sparse_dirty_bitmap(int granularity)
: m_width(0),
- m_height(0),
- m_granularity(granularity),
- m_rect_list_bounds(0, -1, 0, -1)
+ m_height(0),
+ m_granularity(granularity),
+ m_rect_list_bounds(0, -1, 0, -1)
{
}
sparse_dirty_bitmap::sparse_dirty_bitmap(int width, int height, int granularity)
: m_width(0),
- m_height(0),
- m_granularity(granularity),
- m_rect_list_bounds(0, -1, 0, -1)
+ m_height(0),
+ m_granularity(granularity),
+ m_rect_list_bounds(0, -1, 0, -1)
{
// resize to the specified width/height
resize(width, height);
diff --git a/src/emu/sprite.h b/src/emu/sprite.h
index 4fef306cd42..43d7f1755c4 100644
--- a/src/emu/sprite.h
+++ b/src/emu/sprite.h
@@ -58,7 +58,7 @@ public:
private:
// internal state
- sparse_dirty_rect * m_next;
+ sparse_dirty_rect * m_next;
};
@@ -93,12 +93,12 @@ private:
void invalidate_rect_list() { m_rect_list_bounds.set(0, -1, 0, -1); }
// internal state
- int m_width;
- int m_height;
- int m_granularity;
- bitmap_ind8 m_bitmap;
- rectangle m_rect_list_bounds;
- fixed_allocator<sparse_dirty_rect> m_rect_allocator;
+ int m_width;
+ int m_height;
+ int m_granularity;
+ bitmap_ind8 m_bitmap;
+ rectangle m_rect_list_bounds;
+ fixed_allocator<sparse_dirty_rect> m_rect_allocator;
simple_list<sparse_dirty_rect> m_rect_list;
};
@@ -115,11 +115,11 @@ protected:
// construction/destruction - only for subclasses
sprite_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, int dirty_granularity = 3)
: device_t(mconfig, type, name, tag, owner, 0),
- m_xorigin(0),
- m_yorigin(0),
- m_spriteram(NULL),
- m_spriteram_bytes(0),
- m_dirty(dirty_granularity)
+ m_xorigin(0),
+ m_yorigin(0),
+ m_spriteram(NULL),
+ m_spriteram_bytes(0),
+ m_dirty(dirty_granularity)
{
force_clear();
}
@@ -219,17 +219,17 @@ protected:
private:
// configuration
- INT32 m_xorigin; // X origin for drawing
- INT32 m_yorigin; // Y origin for drawing
+ INT32 m_xorigin; // X origin for drawing
+ INT32 m_yorigin; // Y origin for drawing
// memory pointers and buffers
- _SpriteRAMType * m_spriteram; // pointer to spriteram pointer
- INT32 m_spriteram_bytes; // size of sprite RAM in bytes
- dynamic_array<_SpriteRAMType> m_buffer; // buffered spriteram for those that use it
+ _SpriteRAMType * m_spriteram; // pointer to spriteram pointer
+ INT32 m_spriteram_bytes; // size of sprite RAM in bytes
+ dynamic_array<_SpriteRAMType> m_buffer; // buffered spriteram for those that use it
// bitmaps
- _BitmapType m_bitmap; // live bitmap
- sparse_dirty_bitmap m_dirty; // dirty bitmap
+ _BitmapType m_bitmap; // live bitmap
+ sparse_dirty_bitmap m_dirty; // dirty bitmap
};
typedef sprite_device<UINT8, bitmap_ind16> sprite8_device_ind16;
@@ -241,4 +241,4 @@ typedef sprite_device<UINT16, bitmap_ind32> sprite16_device_ind32;
typedef sprite_device<UINT32, bitmap_ind32> sprite32_device_ind32;
-#endif // __SPRITE_H__
+#endif // __SPRITE_H__
diff --git a/src/emu/tilemap.c b/src/emu/tilemap.c
index 990ad5338c1..61b3a27725f 100644
--- a/src/emu/tilemap.c
+++ b/src/emu/tilemap.c
@@ -365,38 +365,38 @@ inline void tilemap_t::scanline_draw_masked_rgb32_alpha(UINT32 *dest, const UINT
tilemap_t::tilemap_t(tilemap_manager &manager, tilemap_get_info_delegate tile_get_info, tilemap_mapper_delegate mapper, int tilewidth, int tileheight, int cols, int rows)
: m_next(NULL),
- m_rows(rows),
- m_cols(cols),
- m_tilewidth(tilewidth),
- m_tileheight(tileheight),
- m_width(cols * tilewidth),
- m_height(rows * tileheight),
- m_mapper(mapper),
- m_memory_to_logical(NULL),
- m_max_logical_index(0),
- m_logical_to_memory(NULL),
- m_max_memory_index(0),
- m_tile_get_info(tile_get_info),
- m_user_data(NULL),
- m_enable(true),
- m_attributes(0),
- m_all_tiles_dirty(true),
- m_all_tiles_clean(false),
- m_palette_offset(0),
- m_pen_data_offset(0),
- m_gfx_used(0),
- m_scrollrows(1),
- m_scrollcols(1),
- m_rowscroll(auto_alloc_array_clear(manager.machine(), INT32, m_height)),
- m_colscroll(auto_alloc_array_clear(manager.machine(), INT32, m_width)),
- m_dx(0),
- m_dx_flipped(0),
- m_dy(0),
- m_dy_flipped(0),
- m_pixmap(m_width, m_height),
- m_flagsmap(m_width, m_height),
- m_tileflags(NULL),
- m_manager(manager)
+ m_rows(rows),
+ m_cols(cols),
+ m_tilewidth(tilewidth),
+ m_tileheight(tileheight),
+ m_width(cols * tilewidth),
+ m_height(rows * tileheight),
+ m_mapper(mapper),
+ m_memory_to_logical(NULL),
+ m_max_logical_index(0),
+ m_logical_to_memory(NULL),
+ m_max_memory_index(0),
+ m_tile_get_info(tile_get_info),
+ m_user_data(NULL),
+ m_enable(true),
+ m_attributes(0),
+ m_all_tiles_dirty(true),
+ m_all_tiles_clean(false),
+ m_palette_offset(0),
+ m_pen_data_offset(0),
+ m_gfx_used(0),
+ m_scrollrows(1),
+ m_scrollcols(1),
+ m_rowscroll(auto_alloc_array_clear(manager.machine(), INT32, m_height)),
+ m_colscroll(auto_alloc_array_clear(manager.machine(), INT32, m_width)),
+ m_dx(0),
+ m_dx_flipped(0),
+ m_dy(0),
+ m_dy_flipped(0),
+ m_pixmap(m_width, m_height),
+ m_flagsmap(m_width, m_height),
+ m_tileflags(NULL),
+ m_manager(manager)
{
// reset internal arrays
memset(m_gfx_dirtyseq, 0, sizeof(m_gfx_dirtyseq));
@@ -513,7 +513,7 @@ void tilemap_t::set_transparent_pen(pen_t pen)
map_pens_to_layer(0, 0, 0, TILEMAP_PIXEL_LAYER0);
// set the single pen to transparent
- map_pen_to_layer(0, pen, TILEMAP_PIXEL_TRANSPARENT);
+ map_pen_to_layer(0, pen, TILEMAP_PIXEL_TRANSPARENT);
}
@@ -1001,7 +1001,7 @@ g_profiler.start(PROFILER_TILEMAP_DRAW);
for (int curcol = 0; curcol < m_scrollcols; curcol = nextcol)
{
// scan forward until we find a non-matching column
- int scrolly = effective_colscroll(curcol, height);
+ int scrolly = effective_colscroll(curcol, height);
for (nextcol = curcol + 1; nextcol < m_scrollcols; nextcol++)
if (effective_colscroll(nextcol, height) != scrolly)
break;
@@ -1261,14 +1261,14 @@ void tilemap_t::draw_instance(_BitmapClass &dest, const blit_parameters &blit, i
// and zoom
//-------------------------------------------------
-#define ROZ_PLOT_PIXEL(INPUT_VAL) \
-do { \
- if (sizeof(*dest) == 2) \
- *dest = (INPUT_VAL) + (priority >> 16); \
- else if (sizeof(*dest) == 4 && alpha >= 0xff) \
- *dest = clut[INPUT_VAL]; \
- else if (sizeof(*dest) == 4) \
- *dest = alpha_blend_r32(*dest, clut[INPUT_VAL], alpha); \
+#define ROZ_PLOT_PIXEL(INPUT_VAL) \
+do { \
+ if (sizeof(*dest) == 2) \
+ *dest = (INPUT_VAL) + (priority >> 16); \
+ else if (sizeof(*dest) == 4 && alpha >= 0xff) \
+ *dest = clut[INPUT_VAL]; \
+ else if (sizeof(*dest) == 4) \
+ *dest = alpha_blend_r32(*dest, clut[INPUT_VAL], alpha); \
} while (0)
template<class _BitmapClass>
@@ -1471,7 +1471,7 @@ void tilemap_t::draw_debug(bitmap_rgb32 &dest, UINT32 scrollx, UINT32 scrolly)
tilemap_manager::tilemap_manager(running_machine &machine)
: m_machine(machine),
- m_instance(0)
+ m_instance(0)
{
if (machine.primary_screen == NULL || machine.primary_screen->width() == 0)
return;
diff --git a/src/emu/tilemap.h b/src/emu/tilemap.h
index 6b809595482..2c25e2229ec 100644
--- a/src/emu/tilemap.h
+++ b/src/emu/tilemap.h
@@ -332,35 +332,35 @@
//**************************************************************************
// maximum number of groups
-#define TILEMAP_NUM_GROUPS 256
+#define TILEMAP_NUM_GROUPS 256
// these flags control tilemap_draw() behavior
-const UINT32 TILEMAP_DRAW_CATEGORY_MASK = 0x0f; // specify the category to draw
-const UINT32 TILEMAP_DRAW_LAYER0 = 0x10; // draw layer 0
-const UINT32 TILEMAP_DRAW_LAYER1 = 0x20; // draw layer 1
-const UINT32 TILEMAP_DRAW_LAYER2 = 0x40; // draw layer 2
-const UINT32 TILEMAP_DRAW_OPAQUE = 0x80; // draw everything, even transparent stuff
-const UINT32 TILEMAP_DRAW_ALPHA_FLAG = 0x100; // draw with alpha blending (in the upper 8 bits)
-const UINT32 TILEMAP_DRAW_ALL_CATEGORIES = 0x200; // draw all categories
+const UINT32 TILEMAP_DRAW_CATEGORY_MASK = 0x0f; // specify the category to draw
+const UINT32 TILEMAP_DRAW_LAYER0 = 0x10; // draw layer 0
+const UINT32 TILEMAP_DRAW_LAYER1 = 0x20; // draw layer 1
+const UINT32 TILEMAP_DRAW_LAYER2 = 0x40; // draw layer 2
+const UINT32 TILEMAP_DRAW_OPAQUE = 0x80; // draw everything, even transparent stuff
+const UINT32 TILEMAP_DRAW_ALPHA_FLAG = 0x100; // draw with alpha blending (in the upper 8 bits)
+const UINT32 TILEMAP_DRAW_ALL_CATEGORIES = 0x200; // draw all categories
// per-pixel flags in the transparency_bitmap
-const UINT8 TILEMAP_PIXEL_CATEGORY_MASK = 0x0f; // category is stored in the low 4 bits
-const UINT8 TILEMAP_PIXEL_TRANSPARENT = 0x00; // transparent if in none of the layers below
-const UINT8 TILEMAP_PIXEL_LAYER0 = 0x10; // pixel is opaque in layer 0
-const UINT8 TILEMAP_PIXEL_LAYER1 = 0x20; // pixel is opaque in layer 1
-const UINT8 TILEMAP_PIXEL_LAYER2 = 0x40; // pixel is opaque in layer 2
+const UINT8 TILEMAP_PIXEL_CATEGORY_MASK = 0x0f; // category is stored in the low 4 bits
+const UINT8 TILEMAP_PIXEL_TRANSPARENT = 0x00; // transparent if in none of the layers below
+const UINT8 TILEMAP_PIXEL_LAYER0 = 0x10; // pixel is opaque in layer 0
+const UINT8 TILEMAP_PIXEL_LAYER1 = 0x20; // pixel is opaque in layer 1
+const UINT8 TILEMAP_PIXEL_LAYER2 = 0x40; // pixel is opaque in layer 2
// per-tile flags, set by get_tile_info callback
-const UINT8 TILE_FLIPX = 0x01; // draw this tile horizontally flipped
-const UINT8 TILE_FLIPY = 0x02; // draw this tile vertically flipped
+const UINT8 TILE_FLIPX = 0x01; // draw this tile horizontally flipped
+const UINT8 TILE_FLIPY = 0x02; // draw this tile vertically flipped
const UINT8 TILE_FORCE_LAYER0 = TILEMAP_PIXEL_LAYER0; // force all pixels to be layer 0 (no transparency)
const UINT8 TILE_FORCE_LAYER1 = TILEMAP_PIXEL_LAYER1; // force all pixels to be layer 1 (no transparency)
const UINT8 TILE_FORCE_LAYER2 = TILEMAP_PIXEL_LAYER2; // force all pixels to be layer 2 (no transparency)
// tilemap global flags, used by tilemap_set_flip()
-const UINT32 TILEMAP_FLIPX = TILE_FLIPX; // draw the tilemap horizontally flipped
-const UINT32 TILEMAP_FLIPY = TILE_FLIPY; // draw the tilemap vertically flipped
+const UINT32 TILEMAP_FLIPX = TILE_FLIPX; // draw the tilemap horizontally flipped
+const UINT32 TILEMAP_FLIPY = TILE_FLIPY; // draw the tilemap vertically flipped
// set this value for a scroll row/column to fully disable it
const UINT32 TILE_LINE_DISABLED = 0x80000000;
@@ -397,14 +397,14 @@ typedef UINT32 tilemap_memory_index;
// tile_data is filled in by the get_tile_info callback
struct tile_data
{
- const UINT8 * pen_data; // required
- const UINT8 * mask_data; // required
- pen_t palette_base; // defaults to 0
- UINT8 category; // defaults to 0; range from 0..15
- UINT8 group; // defaults to 0; range from 0..TILEMAP_NUM_GROUPS
- UINT8 flags; // defaults to 0; one or more of TILE_* flags above
- UINT8 pen_mask; // defaults to 0xff; mask to apply to pen_data while rendering the tile
- UINT8 gfxnum; // defaults to 0xff; specify index of machine.gfx for auto-invalidation on dirty
+ const UINT8 * pen_data; // required
+ const UINT8 * mask_data; // required
+ pen_t palette_base; // defaults to 0
+ UINT8 category; // defaults to 0; range from 0..15
+ UINT8 group; // defaults to 0; range from 0..TILEMAP_NUM_GROUPS
+ UINT8 flags; // defaults to 0; one or more of TILE_* flags above
+ UINT8 pen_mask; // defaults to 0xff; mask to apply to pen_data while rendering the tile
+ UINT8 gfxnum; // defaults to 0xff; specify index of machine.gfx for auto-invalidation on dirty
void set(running_machine &machine, int _gfxnum, int rawcode, int rawcolor, int _flags)
{
@@ -443,7 +443,7 @@ class tilemap_t
friend class tilemap_manager;
friend class simple_list<tilemap_t>;
- friend resource_pool_object<tilemap_t>::~resource_pool_object();
+ friend resource_pool_object<tilemap_t>::~resource_pool_object();
// logical index
typedef UINT32 logical_index;
@@ -533,11 +533,11 @@ private:
// blitting parameters for rendering
struct blit_parameters
{
- rectangle cliprect;
- UINT32 tilemap_priority_code;
- UINT8 mask;
- UINT8 value;
- UINT8 alpha;
+ rectangle cliprect;
+ UINT32 tilemap_priority_code;
+ UINT8 mask;
+ UINT8 value;
+ UINT8 alpha;
};
// inline helpers
@@ -573,56 +573,56 @@ private:
template<class _BitmapClass> void draw_roz_core(_BitmapClass &destbitmap, const blit_parameters &blit, UINT32 startx, UINT32 starty, int incxx, int incxy, int incyx, int incyy, bool wraparound);
// basic tilemap metrics
- tilemap_t * m_next; // pointer to next tilemap
- UINT32 m_rows; // number of tile rows
- UINT32 m_cols; // number of tile columns
- UINT32 m_tilewidth; // width of a single tile in pixels
- UINT32 m_tileheight; // height of a single tile in pixels
- UINT32 m_width; // width of the full tilemap in pixels
- UINT32 m_height; // height of the full tilemap in pixels
+ tilemap_t * m_next; // pointer to next tilemap
+ UINT32 m_rows; // number of tile rows
+ UINT32 m_cols; // number of tile columns
+ UINT32 m_tilewidth; // width of a single tile in pixels
+ UINT32 m_tileheight; // height of a single tile in pixels
+ UINT32 m_width; // width of the full tilemap in pixels
+ UINT32 m_height; // height of the full tilemap in pixels
// logical <-> memory mappings
- tilemap_mapper_delegate m_mapper; // callback to map a row/column to a memory index
- logical_index * m_memory_to_logical; // map from memory index to logical index
- logical_index m_max_logical_index; // maximum valid logical index
- tilemap_memory_index * m_logical_to_memory; // map from logical index to memory index
- tilemap_memory_index m_max_memory_index; // maximum valid memory index
+ tilemap_mapper_delegate m_mapper; // callback to map a row/column to a memory index
+ logical_index * m_memory_to_logical; // map from memory index to logical index
+ logical_index m_max_logical_index; // maximum valid logical index
+ tilemap_memory_index * m_logical_to_memory; // map from logical index to memory index
+ tilemap_memory_index m_max_memory_index; // maximum valid memory index
// callback to interpret video RAM for the tilemap
- tilemap_get_info_delegate m_tile_get_info; // callback to get information about a tile
- tile_data m_tileinfo; // structure to hold the data for a tile
- void * m_user_data; // user data value passed to the callback
+ tilemap_get_info_delegate m_tile_get_info; // callback to get information about a tile
+ tile_data m_tileinfo; // structure to hold the data for a tile
+ void * m_user_data; // user data value passed to the callback
// global tilemap states
- bool m_enable; // true if we are enabled
- UINT8 m_attributes; // global attributes (flipx/y)
- bool m_all_tiles_dirty; // true if all tiles are dirty
- bool m_all_tiles_clean; // true if all tiles are clean
- UINT32 m_palette_offset; // palette offset
- UINT32 m_pen_data_offset; // pen data offset
- UINT32 m_gfx_used; // bitmask of gfx items used
- UINT32 m_gfx_dirtyseq[MAX_GFX_ELEMENTS]; // dirtyseq values from last check
+ bool m_enable; // true if we are enabled
+ UINT8 m_attributes; // global attributes (flipx/y)
+ bool m_all_tiles_dirty; // true if all tiles are dirty
+ bool m_all_tiles_clean; // true if all tiles are clean
+ UINT32 m_palette_offset; // palette offset
+ UINT32 m_pen_data_offset; // pen data offset
+ UINT32 m_gfx_used; // bitmask of gfx items used
+ UINT32 m_gfx_dirtyseq[MAX_GFX_ELEMENTS]; // dirtyseq values from last check
// scroll information
- UINT32 m_scrollrows; // number of independently scrolled rows
- UINT32 m_scrollcols; // number of independently scrolled columns
- INT32 * m_rowscroll; // array of rowscroll values
- INT32 * m_colscroll; // array of colscroll values
- INT32 m_dx; // global horizontal scroll offset
- INT32 m_dx_flipped; // global horizontal scroll offset when flipped
- INT32 m_dy; // global vertical scroll offset
- INT32 m_dy_flipped; // global vertical scroll offset when flipped
+ UINT32 m_scrollrows; // number of independently scrolled rows
+ UINT32 m_scrollcols; // number of independently scrolled columns
+ INT32 * m_rowscroll; // array of rowscroll values
+ INT32 * m_colscroll; // array of colscroll values
+ INT32 m_dx; // global horizontal scroll offset
+ INT32 m_dx_flipped; // global horizontal scroll offset when flipped
+ INT32 m_dy; // global vertical scroll offset
+ INT32 m_dy_flipped; // global vertical scroll offset when flipped
// pixel data
- bitmap_ind16 m_pixmap; // cached pixel data
+ bitmap_ind16 m_pixmap; // cached pixel data
// transparency mapping
- bitmap_ind8 m_flagsmap; // per-pixel flags
- UINT8 * m_tileflags; // per-tile flags
- UINT8 m_pen_to_flags[MAX_PEN_TO_FLAGS * TILEMAP_NUM_GROUPS]; // mapping of pens to flags
+ bitmap_ind8 m_flagsmap; // per-pixel flags
+ UINT8 * m_tileflags; // per-tile flags
+ UINT8 m_pen_to_flags[MAX_PEN_TO_FLAGS * TILEMAP_NUM_GROUPS]; // mapping of pens to flags
private:
- tilemap_manager & m_manager; // reference to the owning manager
+ tilemap_manager & m_manager; // reference to the owning manager
};
@@ -657,9 +657,9 @@ private:
int alloc_instance() { return ++m_instance; }
// internal state
- running_machine & m_machine;
- simple_list<tilemap_t> m_tilemap_list;
- int m_instance;
+ running_machine & m_machine;
+ simple_list<tilemap_t> m_tilemap_list;
+ int m_instance;
};
@@ -669,16 +669,16 @@ private:
//**************************************************************************
// macros to help form flags for tilemap_draw
-#define TILEMAP_DRAW_CATEGORY(x) (x) // specify category to draw
-#define TILEMAP_DRAW_ALPHA(x) (TILEMAP_DRAW_ALPHA_FLAG | (rgb_clamp(x) << 24))
+#define TILEMAP_DRAW_CATEGORY(x) (x) // specify category to draw
+#define TILEMAP_DRAW_ALPHA(x) (TILEMAP_DRAW_ALPHA_FLAG | (rgb_clamp(x) << 24))
// function definition for a get info callback
-#define TILE_GET_INFO(_name) void _name(running_machine &machine, tile_data &tileinfo, tilemap_memory_index tile_index, void *param)
-#define TILE_GET_INFO_MEMBER(_name) void _name(tile_data &tileinfo, tilemap_memory_index tile_index, void *param)
+#define TILE_GET_INFO(_name) void _name(running_machine &machine, tile_data &tileinfo, tilemap_memory_index tile_index, void *param)
+#define TILE_GET_INFO_MEMBER(_name) void _name(tile_data &tileinfo, tilemap_memory_index tile_index, void *param)
// function definition for a logical-to-memory mapper
-#define TILEMAP_MAPPER(_name) tilemap_memory_index _name(running_machine &machine, UINT32 col, UINT32 row, UINT32 num_cols, UINT32 num_rows)
-#define TILEMAP_MAPPER_MEMBER(_name) tilemap_memory_index _name(UINT32 col, UINT32 row, UINT32 num_cols, UINT32 num_rows)
+#define TILEMAP_MAPPER(_name) tilemap_memory_index _name(running_machine &machine, UINT32 col, UINT32 row, UINT32 num_cols, UINT32 num_rows)
+#define TILEMAP_MAPPER_MEMBER(_name) tilemap_memory_index _name(UINT32 col, UINT32 row, UINT32 num_cols, UINT32 num_rows)
// useful macro inside of a TILE_GET_INFO callback to set tile information
#define SET_TILE_INFO(GFX,CODE,COLOR,FLAGS) tileinfo.set(machine, GFX, CODE, COLOR, FLAGS)
@@ -687,8 +687,8 @@ private:
// Macros for setting tile attributes in the TILE_GET_INFO callback:
// TILE_FLIP_YX assumes that flipy is in bit 1 and flipx is in bit 0
// TILE_FLIP_XY assumes that flipy is in bit 0 and flipx is in bit 1
-#define TILE_FLIPYX(YX) ((YX) & 3)
-#define TILE_FLIPXY(XY) ((((XY) & 2) >> 1) | (((XY) & 1) << 1))
+#define TILE_FLIPYX(YX) ((YX) & 3)
+#define TILE_FLIPXY(XY) ((((XY) & 2) >> 1) | (((XY) & 1) << 1))
@@ -717,4 +717,4 @@ inline running_machine &tilemap_t::machine() const
}
-#endif // __TILEMAP_H__
+#endif // __TILEMAP_H__
diff --git a/src/emu/timer.c b/src/emu/timer.c
index 5fdf6f06e7a..f74915d9fc5 100644
--- a/src/emu/timer.c
+++ b/src/emu/timer.c
@@ -46,7 +46,7 @@
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
@@ -63,18 +63,18 @@ const device_type TIMER = &device_creator<timer_device>;
timer_device::timer_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TIMER, "Timer", tag, owner, clock),
- m_type(TIMER_TYPE_GENERIC),
- m_callback(timer_device_expired_delegate()),
- m_ptr(NULL),
- m_start_delay(attotime::zero),
- m_period(attotime::zero),
- m_param(0),
- m_screen_tag(NULL),
- m_screen(NULL),
- m_first_vpos(0),
- m_increment(0),
- m_timer(NULL),
- m_first_time(true)
+ m_type(TIMER_TYPE_GENERIC),
+ m_callback(timer_device_expired_delegate()),
+ m_ptr(NULL),
+ m_start_delay(attotime::zero),
+ m_period(attotime::zero),
+ m_param(0),
+ m_screen_tag(NULL),
+ m_screen(NULL),
+ m_first_vpos(0),
+ m_increment(0),
+ m_timer(NULL),
+ m_first_time(true)
{
}
@@ -305,7 +305,7 @@ void timer_device::device_timer(emu_timer &timer, device_timer_id id, int param,
(m_callback)(*this, m_ptr, vpos);
// advance by the increment only if we will still be within the screen bounds
- if (m_increment != 0 && (vpos + m_increment) < m_screen->height())
+ if (m_increment != 0 && (vpos + m_increment) < m_screen->height())
next_vpos = vpos + m_increment;
}
m_first_time = false;
diff --git a/src/emu/timer.h b/src/emu/timer.h
index 8e7c5458c4f..5dc23d4c5de 100644
--- a/src/emu/timer.h
+++ b/src/emu/timer.h
@@ -53,8 +53,8 @@
//**************************************************************************
// macros for a timer callback functions
-#define TIMER_DEVICE_CALLBACK(name) void name(device_t *, timer_device &timer, void *ptr, INT32 param)
-#define TIMER_DEVICE_CALLBACK_MEMBER(name) void name(timer_device &timer, void *ptr, INT32 param)
+#define TIMER_DEVICE_CALLBACK(name) void name(device_t *, timer_device &timer, void *ptr, INT32 param)
+#define TIMER_DEVICE_CALLBACK_MEMBER(name) void name(timer_device &timer, void *ptr, INT32 param)
//**************************************************************************
// TIMER DEVICE CONFIGURATION MACROS
@@ -172,24 +172,24 @@ private:
};
// configuration data
- timer_type m_type; // type of timer
- timer_device_expired_delegate m_callback; // the timer's callback function
- void * m_ptr; // the pointer parameter passed to the timer callback
+ timer_type m_type; // type of timer
+ timer_device_expired_delegate m_callback; // the timer's callback function
+ void * m_ptr; // the pointer parameter passed to the timer callback
// periodic timers only
- attotime m_start_delay; // delay before the timer fires for the first time
- attotime m_period; // period of repeated timer firings
- INT32 m_param; // the integer parameter passed to the timer callback
+ attotime m_start_delay; // delay before the timer fires for the first time
+ attotime m_period; // period of repeated timer firings
+ INT32 m_param; // the integer parameter passed to the timer callback
// scanline timers only
- const char * m_screen_tag; // the tag of the screen this timer tracks
- screen_device * m_screen; // pointer to the screen device
- UINT32 m_first_vpos; // the first vertical scanline position the timer fires on
- UINT32 m_increment; // the number of scanlines between firings
+ const char * m_screen_tag; // the tag of the screen this timer tracks
+ screen_device * m_screen; // pointer to the screen device
+ UINT32 m_first_vpos; // the first vertical scanline position the timer fires on
+ UINT32 m_increment; // the number of scanlines between firings
// internal state
- emu_timer * m_timer; // the backing timer
- bool m_first_time; // indicates that the system is starting (scanline timers only)
+ emu_timer * m_timer; // the backing timer
+ bool m_first_time; // indicates that the system is starting (scanline timers only)
};
@@ -201,4 +201,4 @@ private:
extern const device_type TIMER;
-#endif /* __TIMER_H__ */
+#endif /* __TIMER_H__ */
diff --git a/src/emu/ui.c b/src/emu/ui.c
index 22e99e50e5e..edc6f206ec0 100644
--- a/src/emu/ui.c
+++ b/src/emu/ui.c
@@ -197,19 +197,19 @@ INLINE int is_breakable_char(unicode_char ch)
return TRUE;
/* In the following character sets, any character is breakable:
- Hiragana (3040-309F)
- Katakana (30A0-30FF)
- Bopomofo (3100-312F)
- Hangul Compatibility Jamo (3130-318F)
- Kanbun (3190-319F)
- Bopomofo Extended (31A0-31BF)
- CJK Strokes (31C0-31EF)
- Katakana Phonetic Extensions (31F0-31FF)
- Enclosed CJK Letters and Months (3200-32FF)
- CJK Compatibility (3300-33FF)
- CJK Unified Ideographs Extension A (3400-4DBF)
- Yijing Hexagram Symbols (4DC0-4DFF)
- CJK Unified Ideographs (4E00-9FFF) */
+ Hiragana (3040-309F)
+ Katakana (30A0-30FF)
+ Bopomofo (3100-312F)
+ Hangul Compatibility Jamo (3130-318F)
+ Kanbun (3190-319F)
+ Bopomofo Extended (31A0-31BF)
+ CJK Strokes (31C0-31EF)
+ Katakana Phonetic Extensions (31F0-31FF)
+ Enclosed CJK Letters and Months (3200-32FF)
+ CJK Compatibility (3300-33FF)
+ CJK Unified Ideographs Extension A (3400-4DBF)
+ Yijing Hexagram Symbols (4DC0-4DFF)
+ CJK Unified Ideographs (4E00-9FFF) */
if (ch >= 0x3040 && ch <= 0x9fff)
return TRUE;
@@ -318,7 +318,7 @@ int ui_display_startup_screens(running_machine &machine, int first_time, int sho
int state;
/* disable everything if we are using -str for 300 or fewer seconds, or if we're the empty driver,
- or if we are debugging */
+ or if we are debugging */
if (!first_time || (str > 0 && str < 60*5) || &machine.system() == &GAME_NAME(___empty) || (machine.debug_flags & DEBUG_FLAG_ENABLED) != 0)
show_gameinfo = show_warnings = show_disclaimer = FALSE;
@@ -643,7 +643,7 @@ void ui_draw_text_full(render_container *container, const char *origs, float x,
s += scharcount;
/* if we hit any non-space breakable character, remember the location and width
- *with* the breakable character */
+ *with* the breakable character */
if (schar != ' ' && is_breakable_char(schar) && curwidth <= wrapwidth)
{
lastbreak = s;
@@ -816,9 +816,9 @@ void ui_draw_text_box(render_container *container, const char *text, int justify
/* add a box around that */
ui_draw_outlined_box(container, target_x - UI_BOX_LR_BORDER,
- target_y - UI_BOX_TB_BORDER,
- target_x + target_width + UI_BOX_LR_BORDER,
- target_y + target_height + UI_BOX_TB_BORDER, backcolor);
+ target_y - UI_BOX_TB_BORDER,
+ target_x + target_width + UI_BOX_LR_BORDER,
+ target_y + target_height + UI_BOX_TB_BORDER, backcolor);
ui_draw_text_full(container, text, target_x, target_y, target_width + 0.00001f,
justify, WRAP_WORD, DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
}
@@ -960,7 +960,7 @@ static astring &disclaimer_string(running_machine &machine, astring &string)
static astring &warnings_string(running_machine &machine, astring &string)
{
-#define WARNING_FLAGS ( GAME_NOT_WORKING | \
+#define WARNING_FLAGS ( GAME_NOT_WORKING | \
GAME_UNEMULATED_PROTECTION | \
GAME_MECHANICAL | \
GAME_WRONG_COLORS | \
@@ -1036,13 +1036,13 @@ static astring &warnings_string(running_machine &machine, astring &string)
string.cat("\nTHIS ");
string.cat(emulator_info::get_capgamenoun());
string.cat(" DOESN'T WORK. The emulation for this game is not yet complete. "
- "There is nothing you can do to fix this problem except wait for the developers to improve the emulation.\n");
+ "There is nothing you can do to fix this problem except wait for the developers to improve the emulation.\n");
}
if (machine.system().flags & GAME_MECHANICAL) {
string.cat("\nCertain elements of this ");
string.cat(emulator_info::get_gamenoun());
string.cat(" cannot be emulated as it requires actual physical interaction or consists of mechanical devices. "
- "It is not possible to fully play this ");
+ "It is not possible to fully play this ");
string.cat(emulator_info::get_gamenoun());
string.cat(".\n");
}
@@ -2311,4 +2311,3 @@ void ui_set_use_natural_keyboard(running_machine &machine, int use_natural_keybo
machine.options().set_value(OPTION_NATURAL_KEYBOARD, use_natural_keyboard, OPTION_PRIORITY_CMDLINE, error);
assert(!error);
}
-
diff --git a/src/emu/ui.h b/src/emu/ui.h
index 17abc9fd0fd..dbca4a91c52 100644
--- a/src/emu/ui.h
+++ b/src/emu/ui.h
@@ -22,42 +22,42 @@
***************************************************************************/
/* preferred font height; use ui_get_line_height() to get actual height */
-#define UI_TARGET_FONT_ROWS (25)
-#define UI_TARGET_FONT_HEIGHT (1.0f / (float)UI_TARGET_FONT_ROWS)
-#define UI_MAX_FONT_HEIGHT (1.0f / 15.0f)
+#define UI_TARGET_FONT_ROWS (25)
+#define UI_TARGET_FONT_HEIGHT (1.0f / (float)UI_TARGET_FONT_ROWS)
+#define UI_MAX_FONT_HEIGHT (1.0f / 15.0f)
/* width of lines drawn in the UI */
-#define UI_LINE_WIDTH (1.0f / 500.0f)
+#define UI_LINE_WIDTH (1.0f / 500.0f)
/* border between outlines and inner text on left/right and top/bottom sides */
-#define UI_BOX_LR_BORDER (UI_TARGET_FONT_HEIGHT * 0.25f)
-#define UI_BOX_TB_BORDER (UI_TARGET_FONT_HEIGHT * 0.25f)
+#define UI_BOX_LR_BORDER (UI_TARGET_FONT_HEIGHT * 0.25f)
+#define UI_BOX_TB_BORDER (UI_TARGET_FONT_HEIGHT * 0.25f)
/* handy colors */
-#define ARGB_WHITE MAKE_ARGB(0xff,0xff,0xff,0xff)
-#define ARGB_BLACK MAKE_ARGB(0xff,0x00,0x00,0x00)
-#define UI_BORDER_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
-#define UI_BACKGROUND_COLOR MAKE_ARGB(0xef,0x10,0x10,0x30)
-#define UI_GFXVIEWER_BG_COLOR MAKE_ARGB(0xef,0x10,0x10,0x30)
-#define UI_GREEN_COLOR MAKE_ARGB(0xef,0x10,0x60,0x10)
-#define UI_YELLOW_COLOR MAKE_ARGB(0xef,0x60,0x60,0x10)
-#define UI_RED_COLOR MAKE_ARGB(0xf0,0x60,0x10,0x10)
-#define UI_UNAVAILABLE_COLOR MAKE_ARGB(0xff,0x40,0x40,0x40)
-#define UI_TEXT_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
-#define UI_TEXT_BG_COLOR MAKE_ARGB(0xef,0x00,0x00,0x00)
-#define UI_SUBITEM_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
-#define UI_CLONE_COLOR MAKE_ARGB(0xff,0x80,0x80,0x80)
-#define UI_SELECTED_COLOR MAKE_ARGB(0xff,0xff,0xff,0x00)
-#define UI_SELECTED_BG_COLOR MAKE_ARGB(0xef,0x80,0x80,0x00)
-#define UI_MOUSEOVER_COLOR MAKE_ARGB(0xff,0xff,0xff,0x80)
-#define UI_MOUSEOVER_BG_COLOR MAKE_ARGB(0x70,0x40,0x40,0x00)
-#define UI_MOUSEDOWN_COLOR MAKE_ARGB(0xff,0xff,0xff,0x80)
-#define UI_MOUSEDOWN_BG_COLOR MAKE_ARGB(0xb0,0x60,0x60,0x00)
-#define UI_DIPSW_COLOR MAKE_ARGB(0xff,0xff,0xff,0x00)
-#define UI_SLIDER_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
+#define ARGB_WHITE MAKE_ARGB(0xff,0xff,0xff,0xff)
+#define ARGB_BLACK MAKE_ARGB(0xff,0x00,0x00,0x00)
+#define UI_BORDER_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
+#define UI_BACKGROUND_COLOR MAKE_ARGB(0xef,0x10,0x10,0x30)
+#define UI_GFXVIEWER_BG_COLOR MAKE_ARGB(0xef,0x10,0x10,0x30)
+#define UI_GREEN_COLOR MAKE_ARGB(0xef,0x10,0x60,0x10)
+#define UI_YELLOW_COLOR MAKE_ARGB(0xef,0x60,0x60,0x10)
+#define UI_RED_COLOR MAKE_ARGB(0xf0,0x60,0x10,0x10)
+#define UI_UNAVAILABLE_COLOR MAKE_ARGB(0xff,0x40,0x40,0x40)
+#define UI_TEXT_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
+#define UI_TEXT_BG_COLOR MAKE_ARGB(0xef,0x00,0x00,0x00)
+#define UI_SUBITEM_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
+#define UI_CLONE_COLOR MAKE_ARGB(0xff,0x80,0x80,0x80)
+#define UI_SELECTED_COLOR MAKE_ARGB(0xff,0xff,0xff,0x00)
+#define UI_SELECTED_BG_COLOR MAKE_ARGB(0xef,0x80,0x80,0x00)
+#define UI_MOUSEOVER_COLOR MAKE_ARGB(0xff,0xff,0xff,0x80)
+#define UI_MOUSEOVER_BG_COLOR MAKE_ARGB(0x70,0x40,0x40,0x00)
+#define UI_MOUSEDOWN_COLOR MAKE_ARGB(0xff,0xff,0xff,0x80)
+#define UI_MOUSEDOWN_BG_COLOR MAKE_ARGB(0xb0,0x60,0x60,0x00)
+#define UI_DIPSW_COLOR MAKE_ARGB(0xff,0xff,0xff,0x00)
+#define UI_SLIDER_COLOR MAKE_ARGB(0xff,0xff,0xff,0xff)
/* cancel return value for a UI handler */
-#define UI_HANDLER_CANCEL ((UINT32)~0)
+#define UI_HANDLER_CANCEL ((UINT32)~0)
/* justification options for ui_draw_text_full */
enum
@@ -83,7 +83,7 @@ enum
DRAW_OPAQUE
};
-#define SLIDER_NOCHANGE 0x12345678
+#define SLIDER_NOCHANGE 0x12345678
@@ -95,14 +95,14 @@ typedef INT32 (*slider_update)(running_machine &machine, void *arg, astring *str
struct slider_state
{
- slider_state * next; /* pointer to next slider */
- slider_update update; /* callback */
- void * arg; /* argument */
- INT32 minval; /* minimum value */
- INT32 defval; /* default value */
- INT32 maxval; /* maximum value */
- INT32 incval; /* increment value */
- char description[1]; /* textual description */
+ slider_state * next; /* pointer to next slider */
+ slider_update update; /* callback */
+ void * arg; /* argument */
+ INT32 minval; /* minimum value */
+ INT32 defval; /* default value */
+ INT32 maxval; /* maximum value */
+ INT32 incval; /* increment value */
+ char description[1]; /* textual description */
};
@@ -189,4 +189,4 @@ int ui_get_use_natural_keyboard(running_machine &machine);
/* specifies whether the natural keyboard is active */
void ui_set_use_natural_keyboard(running_machine &machine, int use_natural_keyboard);
-#endif /* __USRINTRF_H__ */
+#endif /* __USRINTRF_H__ */
diff --git a/src/emu/uigfx.c b/src/emu/uigfx.c
index c0239444992..baecd305700 100644
--- a/src/emu/uigfx.c
+++ b/src/emu/uigfx.c
@@ -25,39 +25,39 @@
struct ui_gfx_state
{
- UINT8 mode; /* which mode are we in? */
+ UINT8 mode; /* which mode are we in? */
/* intermediate bitmaps */
- UINT8 bitmap_dirty; /* is the bitmap dirty? */
- bitmap_rgb32 * bitmap; /* bitmap for drawing gfx and tilemaps */
- render_texture *texture; /* texture for rendering the above bitmap */
+ UINT8 bitmap_dirty; /* is the bitmap dirty? */
+ bitmap_rgb32 * bitmap; /* bitmap for drawing gfx and tilemaps */
+ render_texture *texture; /* texture for rendering the above bitmap */
/* palette-specific data */
struct
{
- int which; /* which subset (palette or colortable)? */
- int offset; /* current offset of top,left item */
- int count; /* number of items per row */
+ int which; /* which subset (palette or colortable)? */
+ int offset; /* current offset of top,left item */
+ int count; /* number of items per row */
} palette;
/* graphics-viewer-specific data */
struct
{
- int set; /* which set is visible */
- int offset[MAX_GFX_ELEMENTS]; /* current offset of top,left item */
- int color[MAX_GFX_ELEMENTS]; /* current color selected */
- int count[MAX_GFX_ELEMENTS]; /* number of items per row */
- UINT8 rotate[MAX_GFX_ELEMENTS]; /* current rotation (orientation) value */
+ int set; /* which set is visible */
+ int offset[MAX_GFX_ELEMENTS]; /* current offset of top,left item */
+ int color[MAX_GFX_ELEMENTS]; /* current color selected */
+ int count[MAX_GFX_ELEMENTS]; /* number of items per row */
+ UINT8 rotate[MAX_GFX_ELEMENTS]; /* current rotation (orientation) value */
} gfxset;
/* tilemap-viewer-specific data */
struct
{
- int which; /* which tilemap are we viewing? */
- int xoffs; /* current X offset */
- int yoffs; /* current Y offset */
- int zoom; /* zoom factor */
- UINT8 rotate; /* current rotation (orientation) value */
+ int which; /* which tilemap are we viewing? */
+ int xoffs; /* current X offset */
+ int yoffs; /* current Y offset */
+ int zoom; /* zoom factor */
+ UINT8 rotate; /* current rotation (orientation) value */
} tilemap;
};
diff --git a/src/emu/uigfx.h b/src/emu/uigfx.h
index c514916d127..660488bfa5a 100644
--- a/src/emu/uigfx.h
+++ b/src/emu/uigfx.h
@@ -27,4 +27,4 @@ void ui_gfx_init(running_machine &machine);
UINT32 ui_gfx_ui_handler(running_machine &machine, render_container *container, UINT32 state);
-#endif /* __UIGFX_H__ */
+#endif /* __UIGFX_H__ */
diff --git a/src/emu/uiimage.c b/src/emu/uiimage.c
index 590fc747034..87e12bd5a90 100644
--- a/src/emu/uiimage.c
+++ b/src/emu/uiimage.c
@@ -34,17 +34,17 @@
/* conditional compilation to enable chosing of image formats - this is not
* yet fully implemented */
-#define ENABLE_FORMATS 0
+#define ENABLE_FORMATS 0
/* time (in seconds) to display errors */
-#define ERROR_MESSAGE_TIME 5
+#define ERROR_MESSAGE_TIME 5
/* itemrefs for key menu items */
-#define ITEMREF_NEW_IMAGE_NAME ((void *) 0x0001)
-#define ITEMREF_CREATE ((void *) 0x0002)
-#define ITEMREF_FORMAT ((void *) 0x0003)
-#define ITEMREF_NO ((void *) 0x0004)
-#define ITEMREF_YES ((void *) 0x0005)
+#define ITEMREF_NEW_IMAGE_NAME ((void *) 0x0001)
+#define ITEMREF_CREATE ((void *) 0x0002)
+#define ITEMREF_FORMAT ((void *) 0x0003)
+#define ITEMREF_NO ((void *) 0x0004)
+#define ITEMREF_YES ((void *) 0x0005)
/***************************************************************************
MENU HELPERS
@@ -113,7 +113,7 @@ static void extra_text_draw_box(render_container *container, float origx1, float
/* draw the text within it */
ui_draw_text_full(container,text, x1, y1, text_width, JUSTIFY_LEFT, WRAP_WORD,
- DRAW_NORMAL, ARGB_WHITE, ARGB_BLACK, NULL, NULL);
+ DRAW_NORMAL, ARGB_WHITE, ARGB_BLACK, NULL, NULL);
}
@@ -201,14 +201,14 @@ static int is_valid_filename_char(unicode_char unichar)
/* this should really be in the OSD layer */
static const char valid_filename_char[] =
{
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 00-0f */
- 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 10-1f */
- 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, /* !"#$%&'()*+,-./ */
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, /* 0123456789:;<=>? */
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* @ABCDEFGHIJKLMNO */
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, /* PQRSTUVWXYZ[\]^_ */
- 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* `abcdefghijklmno */
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, /* pqrstuvwxyz{|}~ */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 00-0f */
+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 10-1f */
+ 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 0, /* !"#$%&'()*+,-./ */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, /* 0123456789:;<=>? */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* @ABCDEFGHIJKLMNO */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, /* PQRSTUVWXYZ[\]^_ */
+ 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* `abcdefghijklmno */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, /* pqrstuvwxyz{|}~ */
};
return (unichar < ARRAY_LENGTH(valid_filename_char)) && valid_filename_char[unichar];
}
@@ -750,7 +750,7 @@ void ui_menu_file_manager::custom_render(void *selectedref, float top, float bot
/* access the path */
path = selected_device ? selected_device->filename() : NULL;
extra_text_render(container, top, bottom,
- origx1, origy1, origx2, origy2, NULL, path);
+ origx1, origy1, origx2, origy2, NULL, path);
}
@@ -878,7 +878,7 @@ void ui_menu_image_info::handle()
-------------------------------------------------*/
ui_menu_select_format::ui_menu_select_format(running_machine &machine, render_container *container,
- floppy_image_format_t **_formats, int _ext_match, int _total_usable, int *_result)
+ floppy_image_format_t **_formats, int _ext_match, int _total_usable, int *_result)
: ui_menu(machine, container)
{
formats = _formats;
@@ -920,7 +920,7 @@ void ui_menu_select_format::handle()
-------------------------------------------------*/
ui_menu_select_rw::ui_menu_select_rw(running_machine &machine, render_container *container,
- bool _can_in_place, int *_result)
+ bool _can_in_place, int *_result)
: ui_menu(machine, container)
{
can_in_place = _can_in_place;
@@ -955,19 +955,19 @@ void ui_menu_select_rw::handle()
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
-#define TAPECMD_NULL ((void *) 0x0000)
-#define TAPECMD_STOP ((void *) 0x0001)
-#define TAPECMD_PLAY ((void *) 0x0002)
-#define TAPECMD_RECORD ((void *) 0x0003)
-#define TAPECMD_REWIND ((void *) 0x0004)
-#define TAPECMD_FAST_FORWARD ((void *) 0x0005)
-#define TAPECMD_SLIDER ((void *) 0x0006)
-#define TAPECMD_SELECT ((void *) 0x0007)
+#define TAPECMD_NULL ((void *) 0x0000)
+#define TAPECMD_STOP ((void *) 0x0001)
+#define TAPECMD_PLAY ((void *) 0x0002)
+#define TAPECMD_RECORD ((void *) 0x0003)
+#define TAPECMD_REWIND ((void *) 0x0004)
+#define TAPECMD_FAST_FORWARD ((void *) 0x0005)
+#define TAPECMD_SLIDER ((void *) 0x0006)
+#define TAPECMD_SELECT ((void *) 0x0007)
-#define BITBANGERCMD_SELECT ((void *) 0x0000)
-#define BITBANGERCMD_MODE ((void *) 0x0001)
-#define BITBANGERCMD_BAUD ((void *) 0x0002)
-#define BITBANGERCMD_TUNE ((void *) 0x0003)
+#define BITBANGERCMD_SELECT ((void *) 0x0000)
+#define BITBANGERCMD_MODE ((void *) 0x0001)
+#define BITBANGERCMD_BAUD ((void *) 0x0002)
+#define BITBANGERCMD_TUNE ((void *) 0x0003)
/***************************************************************************
@@ -1084,8 +1084,8 @@ void ui_menu_mess_tape_control::populate()
state = cassette->get_state();
item_append(
(state & CASSETTE_MASK_UISTATE) == CASSETTE_STOPPED
- ? "stopped"
- : ((state & CASSETTE_MASK_UISTATE) == CASSETTE_PLAY
+ ? "stopped"
+ : ((state & CASSETTE_MASK_UISTATE) == CASSETTE_PLAY
? ((state & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_ENABLED ? "playing" : "(playing)")
: ((state & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_ENABLED ? "recording" : "(recording)")
),
@@ -1139,22 +1139,22 @@ void ui_menu_mess_bitbanger_control::populate()
bitbanger_device *bitbanger = downcast<bitbanger_device *>(&device->device());
if (bitbanger->inc_mode(TRUE))
- mode_flags |= MENU_FLAG_RIGHT_ARROW;
+ mode_flags |= MENU_FLAG_RIGHT_ARROW;
if (bitbanger->dec_mode(TRUE))
- mode_flags |= MENU_FLAG_LEFT_ARROW;
+ mode_flags |= MENU_FLAG_LEFT_ARROW;
if (bitbanger->inc_baud(TRUE))
- baud_flags |= MENU_FLAG_RIGHT_ARROW;
+ baud_flags |= MENU_FLAG_RIGHT_ARROW;
if (bitbanger->dec_baud(TRUE))
- baud_flags |= MENU_FLAG_LEFT_ARROW;
+ baud_flags |= MENU_FLAG_LEFT_ARROW;
if (bitbanger->inc_tune(TRUE))
- tune_flags |= MENU_FLAG_RIGHT_ARROW;
+ tune_flags |= MENU_FLAG_RIGHT_ARROW;
if (bitbanger->dec_tune(TRUE))
- tune_flags |= MENU_FLAG_LEFT_ARROW;
+ tune_flags |= MENU_FLAG_LEFT_ARROW;
/* name of bitbanger file */
item_append(device->device().name(), device->filename(), flags, BITBANGERCMD_SELECT);
@@ -1293,15 +1293,15 @@ void ui_menu_mess_bitbanger_control::handle()
}
else if (event->itemref==BITBANGERCMD_MODE)
{
- bitbanger->dec_mode(FALSE);
+ bitbanger->dec_mode(FALSE);
}
else if (event->itemref==BITBANGERCMD_BAUD)
{
- bitbanger->dec_baud(FALSE);
+ bitbanger->dec_baud(FALSE);
}
else if (event->itemref==BITBANGERCMD_TUNE)
{
- bitbanger->dec_tune(FALSE);
+ bitbanger->dec_tune(FALSE);
}
break;
@@ -1317,18 +1317,17 @@ void ui_menu_mess_bitbanger_control::handle()
}
else if (event->itemref==BITBANGERCMD_MODE)
{
- bitbanger->inc_mode(FALSE);
+ bitbanger->inc_mode(FALSE);
}
else if (event->itemref==BITBANGERCMD_BAUD)
{
- bitbanger->inc_baud(FALSE);
+ bitbanger->inc_baud(FALSE);
}
else if (event->itemref==BITBANGERCMD_TUNE)
{
- bitbanger->inc_tune(FALSE);
+ bitbanger->inc_tune(FALSE);
}
break;
}
}
}
-
diff --git a/src/emu/uiimage.h b/src/emu/uiimage.h
index 345b22829a4..ffa300a6102 100644
--- a/src/emu/uiimage.h
+++ b/src/emu/uiimage.h
@@ -132,7 +132,7 @@ private:
class ui_menu_select_format : public ui_menu {
public:
ui_menu_select_format(running_machine &machine, render_container *container,
- class floppy_image_format_t **formats, int ext_match, int total_usable, int *result);
+ class floppy_image_format_t **formats, int ext_match, int total_usable, int *result);
virtual ~ui_menu_select_format();
virtual void populate();
virtual void handle();
@@ -147,7 +147,7 @@ class ui_menu_select_rw : public ui_menu {
public:
enum { READONLY, READWRITE, WRITE_OTHER, WRITE_DIFF };
ui_menu_select_rw(running_machine &machine, render_container *container,
- bool can_in_place, int *result);
+ bool can_in_place, int *result);
virtual ~ui_menu_select_rw();
virtual void populate();
virtual void handle();
@@ -157,4 +157,4 @@ private:
int *result;
};
-#endif /* __UIIMAGE_H__ */
+#endif /* __UIIMAGE_H__ */
diff --git a/src/emu/uiinput.c b/src/emu/uiinput.c
index b29ae39714a..da6eb1efc24 100644
--- a/src/emu/uiinput.c
+++ b/src/emu/uiinput.c
@@ -18,13 +18,13 @@
CONSTANTS
***************************************************************************/
-#define EVENT_QUEUE_SIZE 128
+#define EVENT_QUEUE_SIZE 128
enum
{
- SEQ_PRESSED_FALSE = 0, /* not pressed */
- SEQ_PRESSED_TRUE, /* pressed */
- SEQ_PRESSED_RESET /* reset -- converted to FALSE once detected as not pressed */
+ SEQ_PRESSED_FALSE = 0, /* not pressed */
+ SEQ_PRESSED_TRUE, /* pressed */
+ SEQ_PRESSED_RESET /* reset -- converted to FALSE once detected as not pressed */
};
@@ -37,19 +37,19 @@ enum
struct ui_input_private
{
/* pressed states; retrieved with ui_input_pressed() */
- osd_ticks_t next_repeat[IPT_COUNT];
- UINT8 seqpressed[IPT_COUNT];
+ osd_ticks_t next_repeat[IPT_COUNT];
+ UINT8 seqpressed[IPT_COUNT];
/* mouse position/info */
- render_target * current_mouse_target;
- INT32 current_mouse_x;
- INT32 current_mouse_y;
- int current_mouse_down;
+ render_target * current_mouse_target;
+ INT32 current_mouse_x;
+ INT32 current_mouse_y;
+ int current_mouse_down;
/* popped states; ring buffer of ui_events */
- ui_event events[EVENT_QUEUE_SIZE];
- int events_start;
- int events_end;
+ ui_event events[EVENT_QUEUE_SIZE];
+ int events_start;
+ int events_end;
};
diff --git a/src/emu/uiinput.h b/src/emu/uiinput.h
index 7d4573bd1e6..a54f297de70 100644
--- a/src/emu/uiinput.h
+++ b/src/emu/uiinput.h
@@ -35,12 +35,12 @@ enum ui_event_type
struct ui_event
{
- ui_event_type event_type;
- render_target * target;
- INT32 mouse_x;
- INT32 mouse_y;
- input_item_id key;
- unicode_char ch;
+ ui_event_type event_type;
+ render_target * target;
+ INT32 mouse_x;
+ INT32 mouse_y;
+ input_item_id key;
+ unicode_char ch;
};
@@ -184,4 +184,4 @@ INLINE void ui_input_push_char_event(running_machine &machine, render_target *ta
}
-#endif /* __UIINPUT_H__ */
+#endif /* __UIINPUT_H__ */
diff --git a/src/emu/uimain.c b/src/emu/uimain.c
index 4c87978c404..f42a5f9e026 100644
--- a/src/emu/uimain.c
+++ b/src/emu/uimain.c
@@ -30,13 +30,13 @@
CONSTANTS
***************************************************************************/
-#define MAX_PHYSICAL_DIPS 10
-#define MAX_INPUT_PORTS 32
-#define MAX_BITS_PER_PORT 32
+#define MAX_PHYSICAL_DIPS 10
+#define MAX_INPUT_PORTS 32
+#define MAX_BITS_PER_PORT 32
/* DIP switch rendering parameters */
-#define DIP_SWITCH_HEIGHT 0.05f
-#define DIP_SWITCH_SPACING 0.01
+#define DIP_SWITCH_HEIGHT 0.05f
+#define DIP_SWITCH_SPACING 0.01
#define SINGLE_TOGGLE_SWITCH_FIELD_WIDTH 0.025f
#define SINGLE_TOGGLE_SWITCH_WIDTH 0.020f
/* make the switch 80% of the width space and 1/2 of the switch height */
@@ -1242,7 +1242,7 @@ void ui_menu_settings_dip_switches::custom_render_one(float x1, float y1, float
x1 += (x2 - x1 - numtoggles * switch_field_width) / 2;
/* draw the dip switch name */
- ui_draw_text_full( container,
+ ui_draw_text_full( container,
dip->name,
0,
y1 + (DIP_SWITCH_HEIGHT - UI_TARGET_FONT_HEIGHT) / 2,
@@ -1276,14 +1276,14 @@ void ui_menu_settings_dip_switches::custom_render_one(float x1, float y1, float
{
float innery1 = (dip->state & (1 << toggle)) ? y1_on : y1_off;
container->add_rect(innerx1, innery1, innerx1 + switch_width, innery1 + SINGLE_TOGGLE_SWITCH_HEIGHT,
- (selectedmask & (1 << toggle)) ? UI_DIPSW_COLOR : UI_TEXT_COLOR,
- PRIMFLAG_BLENDMODE(BLENDMODE_ALPHA));
+ (selectedmask & (1 << toggle)) ? UI_DIPSW_COLOR : UI_TEXT_COLOR,
+ PRIMFLAG_BLENDMODE(BLENDMODE_ALPHA));
}
else
{
container->add_rect(innerx1, y1_off, innerx1 + switch_width, y1_on + SINGLE_TOGGLE_SWITCH_HEIGHT,
- UI_UNAVAILABLE_COLOR,
- PRIMFLAG_BLENDMODE(BLENDMODE_ALPHA));
+ UI_UNAVAILABLE_COLOR,
+ PRIMFLAG_BLENDMODE(BLENDMODE_ALPHA));
}
/* advance to the next switch */
@@ -1340,10 +1340,10 @@ void ui_menu_analog::handle()
data->field->get_user_settings(settings);
switch (data->type)
{
- case ANALOG_ITEM_KEYSPEED: settings.delta = newval; break;
- case ANALOG_ITEM_CENTERSPEED: settings.centerdelta = newval; break;
- case ANALOG_ITEM_REVERSE: settings.reverse = newval; break;
- case ANALOG_ITEM_SENSITIVITY: settings.sensitivity = newval; break;
+ case ANALOG_ITEM_KEYSPEED: settings.delta = newval; break;
+ case ANALOG_ITEM_CENTERSPEED: settings.centerdelta = newval; break;
+ case ANALOG_ITEM_REVERSE: settings.reverse = newval; break;
+ case ANALOG_ITEM_SENSITIVITY: settings.sensitivity = newval; break;
}
data->field->set_user_settings(settings);
@@ -2190,10 +2190,10 @@ void ui_menu_video_options::populate()
/* add a rotate item */
switch (target->orientation())
{
- case ROT0: subtext = "None"; break;
- case ROT90: subtext = "CW 90" UTF8_DEGREES; break;
- case ROT180: subtext = "180" UTF8_DEGREES; break;
- case ROT270: subtext = "CCW 90" UTF8_DEGREES; break;
+ case ROT0: subtext = "None"; break;
+ case ROT90: subtext = "CW 90" UTF8_DEGREES; break;
+ case ROT180: subtext = "180" UTF8_DEGREES; break;
+ case ROT270: subtext = "CCW 90" UTF8_DEGREES; break;
}
item_append("Rotate", subtext, MENU_FLAG_LEFT_ARROW | MENU_FLAG_RIGHT_ARROW, (void *)VIDEO_ITEM_ROTATE);
@@ -2599,9 +2599,9 @@ void ui_menu_select_game::handle()
/* if we're in an error state, overlay an error message */
if (error)
ui_draw_text_box(container,
- "The selected game is missing one or more required ROM or CHD images. "
- "Please select a different game.\n\nPress any key to continue.",
- JUSTIFY_CENTER, 0.5f, 0.5f, UI_RED_COLOR);
+ "The selected game is missing one or more required ROM or CHD images. "
+ "Please select a different game.\n\nPress any key to continue.",
+ JUSTIFY_CENTER, 0.5f, 0.5f, UI_RED_COLOR);
}
@@ -2741,7 +2741,7 @@ void ui_menu_select_game::custom_render(void *selectedref, float top, float bott
/* get the size of the text */
ui_draw_text_full(container, tempbuf[0], 0.0f, 0.0f, 1.0f, JUSTIFY_CENTER, WRAP_TRUNCATE,
- DRAW_NONE, ARGB_WHITE, ARGB_BLACK, &width, NULL);
+ DRAW_NONE, ARGB_WHITE, ARGB_BLACK, &width, NULL);
width += 2 * UI_BOX_LR_BORDER;
maxwidth = MAX(width, origx2 - origx1);
@@ -2762,7 +2762,7 @@ void ui_menu_select_game::custom_render(void *selectedref, float top, float bott
/* draw the text within it */
ui_draw_text_full(container, tempbuf[0], x1, y1, x2 - x1, JUSTIFY_CENTER, WRAP_TRUNCATE,
- DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
+ DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
/* determine the text to render below */
driver = ((FPTR)selectedref > 1) ? (const game_driver *)selectedref : NULL;
@@ -2832,7 +2832,7 @@ void ui_menu_select_game::custom_render(void *selectedref, float top, float bott
for (line = 0; line < 4; line++)
{
ui_draw_text_full(container, tempbuf[line], 0.0f, 0.0f, 1.0f, JUSTIFY_CENTER, WRAP_TRUNCATE,
- DRAW_NONE, ARGB_WHITE, ARGB_BLACK, &width, NULL);
+ DRAW_NONE, ARGB_WHITE, ARGB_BLACK, &width, NULL);
width += 2 * UI_BOX_LR_BORDER;
maxwidth = MAX(maxwidth, width);
}
@@ -2863,10 +2863,7 @@ void ui_menu_select_game::custom_render(void *selectedref, float top, float bott
for (line = 0; line < 4; line++)
{
ui_draw_text_full(container, tempbuf[line], x1, y1, x2 - x1, JUSTIFY_CENTER, WRAP_TRUNCATE,
- DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
+ DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
y1 += ui_get_line_height(machine());
}
}
-
-
-
diff --git a/src/emu/uimain.h b/src/emu/uimain.h
index 5c6f4c6933e..b40da22cd08 100644
--- a/src/emu/uimain.h
+++ b/src/emu/uimain.h
@@ -108,14 +108,14 @@ protected:
/* internal input menu item data */
struct input_item_data {
- input_item_data * next; /* pointer to next item in the list */
- const void * ref; /* reference to type description for global inputs or field for game inputs */
- input_seq_type seqtype; /* sequence type */
- input_seq seq; /* copy of the live sequence */
- const input_seq * defseq; /* pointer to the default sequence */
- const char * name; /* pointer to the base name of the item */
- UINT16 sortorder; /* sorting information */
- UINT8 type; /* type of port */
+ input_item_data * next; /* pointer to next item in the list */
+ const void * ref; /* reference to type description for global inputs or field for game inputs */
+ input_seq_type seqtype; /* sequence type */
+ input_seq seq; /* copy of the live sequence */
+ const input_seq * defseq; /* pointer to the default sequence */
+ const char * name; /* pointer to the base name of the item */
+ UINT16 sortorder; /* sorting information */
+ UINT8 type; /* type of port */
};
void populate_and_sort(struct input_item_data *itemlist);
@@ -123,14 +123,14 @@ protected:
void toggle_none_default(input_seq &selected_seq, input_seq &original_seq, const input_seq &selected_defseq);
protected:
- const void * pollingref;
- input_seq_type pollingseq;
- input_item_data * pollingitem;
+ const void * pollingref;
+ input_seq_type pollingseq;
+ input_item_data * pollingitem;
private:
- UINT16 last_sortorder;
- bool record_next;
- input_seq starting_seq;
+ UINT16 last_sortorder;
+ bool record_next;
+ input_seq starting_seq;
static int compare_items(const void *i1, const void *i2);
};
@@ -166,13 +166,13 @@ public:
protected:
/* DIP switch descriptor */
struct dip_descriptor {
- dip_descriptor * next;
- const char * name;
- UINT32 mask;
- UINT32 state;
+ dip_descriptor * next;
+ const char * name;
+ UINT32 mask;
+ UINT32 state;
};
- dip_descriptor * diplist;
+ dip_descriptor * diplist;
int dipcount;
int type;
};
@@ -212,10 +212,10 @@ private:
/* internal analog menu item data */
struct analog_item_data {
ioport_field *field;
- int type;
- int min, max;
- int cur;
- int defvalue;
+ int type;
+ int min, max;
+ int cur;
+ int defvalue;
};
};
@@ -325,13 +325,13 @@ private:
/* internal crosshair menu item data */
struct crosshair_item_data {
- UINT8 type;
- UINT8 player;
- UINT8 min, max;
- UINT8 cur;
- UINT8 defvalue;
- char last_name[CROSSHAIR_PIC_NAME_LENGTH + 1];
- char next_name[CROSSHAIR_PIC_NAME_LENGTH + 1];
+ UINT8 type;
+ UINT8 player;
+ UINT8 min, max;
+ UINT8 cur;
+ UINT8 defvalue;
+ char last_name[CROSSHAIR_PIC_NAME_LENGTH + 1];
+ char next_name[CROSSHAIR_PIC_NAME_LENGTH + 1];
};
};
@@ -353,11 +353,11 @@ public:
private:
enum { VISIBLE_GAMES_IN_LIST = 15 };
- UINT8 error;
- UINT8 rerandomize;
- char search[40];
- int matchlist[VISIBLE_GAMES_IN_LIST];
- const game_driver **driverlist;
+ UINT8 error;
+ UINT8 rerandomize;
+ char search[40];
+ int matchlist[VISIBLE_GAMES_IN_LIST];
+ const game_driver **driverlist;
driver_enumerator *drivlist;
@@ -376,4 +376,4 @@ private:
/* force game select menu */
void ui_menu_force_game_select(running_machine &machine, render_container *container);
-#endif /* __UIMAIN_H__ */
+#endif /* __UIMAIN_H__ */
diff --git a/src/emu/uimenu.c b/src/emu/uimenu.c
index a70a4303cbb..3265976c7b4 100644
--- a/src/emu/uimenu.c
+++ b/src/emu/uimenu.c
@@ -24,8 +24,8 @@
CONSTANTS
***************************************************************************/
-#define UI_MENU_POOL_SIZE 65536
-#define UI_MENU_ALLOC_ITEMS 256
+#define UI_MENU_POOL_SIZE 65536
+#define UI_MENU_ALLOC_ITEMS 256
/***************************************************************************
GLOBAL VARIABLES
@@ -546,7 +546,7 @@ void ui_menu::draw(bool customonly)
if (linenum == 0 && top_line != 0)
{
container->add_quad(
- 0.5f * (x1 + x2) - 0.5f * ud_arrow_width,
+ 0.5f * (x1 + x2) - 0.5f * ud_arrow_width,
line_y + 0.25f * line_height,
0.5f * (x1 + x2) + 0.5f * ud_arrow_width,
line_y + 0.75f * line_height,
@@ -655,9 +655,9 @@ void ui_menu::draw(bool customonly)
/* add a box around that */
ui_draw_outlined_box(container, target_x - UI_BOX_LR_BORDER,
- target_y - UI_BOX_TB_BORDER,
- target_x + target_width + UI_BOX_LR_BORDER,
- target_y + target_height + UI_BOX_TB_BORDER, subitem_invert ? UI_SELECTED_BG_COLOR : UI_BACKGROUND_COLOR);
+ target_y - UI_BOX_TB_BORDER,
+ target_x + target_width + UI_BOX_LR_BORDER,
+ target_y + target_height + UI_BOX_TB_BORDER, subitem_invert ? UI_SELECTED_BG_COLOR : UI_BACKGROUND_COLOR);
ui_draw_text_full(container, pitem.subtext, target_x, target_y, target_width,
JUSTIFY_RIGHT, WRAP_WORD, DRAW_NORMAL, UI_SELECTED_COLOR, UI_SELECTED_BG_COLOR, NULL, NULL);
}
@@ -716,9 +716,9 @@ void ui_menu::draw_text_box()
/* add a box around that */
ui_draw_outlined_box(container, target_x - UI_BOX_LR_BORDER - gutter_width,
- target_y - UI_BOX_TB_BORDER,
- target_x + target_width + gutter_width + UI_BOX_LR_BORDER,
- target_y + target_height + UI_BOX_TB_BORDER, (item[0].flags & MENU_FLAG_REDTEXT) ? UI_RED_COLOR : UI_BACKGROUND_COLOR);
+ target_y - UI_BOX_TB_BORDER,
+ target_x + target_width + gutter_width + UI_BOX_LR_BORDER,
+ target_y + target_height + UI_BOX_TB_BORDER, (item[0].flags & MENU_FLAG_REDTEXT) ? UI_RED_COLOR : UI_BACKGROUND_COLOR);
ui_draw_text_full(container, text, target_x, target_y, target_width,
JUSTIFY_LEFT, WRAP_WORD, DRAW_NORMAL, UI_TEXT_COLOR, UI_TEXT_BG_COLOR, NULL, NULL);
diff --git a/src/emu/uimenu.h b/src/emu/uimenu.h
index 188ee055281..76654c17d41 100644
--- a/src/emu/uimenu.h
+++ b/src/emu/uimenu.h
@@ -22,20 +22,20 @@
***************************************************************************/
/* flags for menu items */
-#define MENU_FLAG_LEFT_ARROW (1 << 0)
-#define MENU_FLAG_RIGHT_ARROW (1 << 1)
-#define MENU_FLAG_INVERT (1 << 2)
-#define MENU_FLAG_MULTILINE (1 << 3)
-#define MENU_FLAG_REDTEXT (1 << 4)
-#define MENU_FLAG_DISABLE (1 << 5)
+#define MENU_FLAG_LEFT_ARROW (1 << 0)
+#define MENU_FLAG_RIGHT_ARROW (1 << 1)
+#define MENU_FLAG_INVERT (1 << 2)
+#define MENU_FLAG_MULTILINE (1 << 3)
+#define MENU_FLAG_REDTEXT (1 << 4)
+#define MENU_FLAG_DISABLE (1 << 5)
/* special menu item for separators */
-#define MENU_SEPARATOR_ITEM "---"
+#define MENU_SEPARATOR_ITEM "---"
/* flags to pass to ui_menu_process */
-#define UI_MENU_PROCESS_NOKEYS 1
-#define UI_MENU_PROCESS_LR_REPEAT 2
-#define UI_MENU_PROCESS_CUSTOM_ONLY 4
+#define UI_MENU_PROCESS_NOKEYS 1
+#define UI_MENU_PROCESS_LR_REPEAT 2
+#define UI_MENU_PROCESS_CUSTOM_ONLY 4
/* options for ui_menu_reset */
enum ui_menu_reset_options
@@ -54,26 +54,26 @@ enum ui_menu_reset_options
/* menu-related events */
struct ui_menu_event
{
- void * itemref; /* reference for the selected item */
- int iptkey; /* one of the IPT_* values from inptport.h */
- unicode_char unichar; /* unicode character if iptkey == IPT_SPECIAL */
+ void * itemref; /* reference for the selected item */
+ int iptkey; /* one of the IPT_* values from inptport.h */
+ unicode_char unichar; /* unicode character if iptkey == IPT_SPECIAL */
};
struct ui_menu_pool
{
- ui_menu_pool * next; /* chain to next one */
- UINT8 * top; /* top of the pool */
- UINT8 * end; /* end of the pool */
+ ui_menu_pool * next; /* chain to next one */
+ UINT8 * top; /* top of the pool */
+ UINT8 * end; /* end of the pool */
};
class ui_menu_item
{
public:
- const char * text;
- const char * subtext;
- UINT32 flags;
- void * ref;
+ const char * text;
+ const char * subtext;
+ UINT32 flags;
+ void * ref;
inline bool is_selectable() const;
};
@@ -86,20 +86,20 @@ public:
running_machine &machine() const { return m_machine; }
- render_container * container; /* render_container we render to */
- ui_menu_event menu_event; /* the UI menu_event that occurred */
- ui_menu * parent; /* pointer to parent menu */
- int resetpos; /* reset position */
- void * resetref; /* reset reference */
- int selected; /* which item is selected */
- int hover; /* which item is being hovered over */
- int visitems; /* number of visible items */
- int numitems; /* number of items in the menu */
- int allocitems; /* allocated size of array */
- ui_menu_item * item; /* pointer to array of items */
- float customtop; /* amount of extra height to add at the top */
- float custombottom; /* amount of extra height to add at the bottom */
- ui_menu_pool * pool; /* list of memory pools */
+ render_container * container; /* render_container we render to */
+ ui_menu_event menu_event; /* the UI menu_event that occurred */
+ ui_menu * parent; /* pointer to parent menu */
+ int resetpos; /* reset position */
+ void * resetref; /* reset reference */
+ int selected; /* which item is selected */
+ int hover; /* which item is being hovered over */
+ int visitems; /* number of visible items */
+ int numitems; /* number of items in the menu */
+ int allocitems; /* allocated size of array */
+ ui_menu_item * item; /* pointer to array of items */
+ float customtop; /* amount of extra height to add at the top */
+ float custombottom; /* amount of extra height to add at the bottom */
+ ui_menu_pool * pool; /* list of memory pools */
/* free all items in the menu, and all memory allocated from the memory pool */
void reset(ui_menu_reset_options options);
@@ -170,7 +170,7 @@ private:
bool special_main_menu;
- running_machine & m_machine; /* machine we are attached to */
+ running_machine & m_machine; /* machine we are attached to */
void draw(bool customonly);
void draw_text_box();
@@ -183,4 +183,4 @@ private:
static void render_triangle(bitmap_argb32 &dest, bitmap_argb32 &source, const rectangle &sbounds, void *param);
};
-#endif /* __UIMENU_H__ */
+#endif /* __UIMENU_H__ */
diff --git a/src/emu/uiswlist.c b/src/emu/uiswlist.c
index ecb41b480f2..0dabeb53e41 100644
--- a/src/emu/uiswlist.c
+++ b/src/emu/uiswlist.c
@@ -19,7 +19,7 @@
***************************************************************************/
/* time (in seconds) to display errors */
-#define ERROR_MESSAGE_TIME 5
+#define ERROR_MESSAGE_TIME 5
/***************************************************************************
diff --git a/src/emu/uiswlist.h b/src/emu/uiswlist.h
index f914f0faedf..58b25d6615a 100644
--- a/src/emu/uiswlist.h
+++ b/src/emu/uiswlist.h
@@ -48,7 +48,7 @@ private:
const char *long_name;
};
- const software_list_device *swlist; /* currently selected list */
+ const software_list_device *swlist; /* currently selected list */
const char *interface;
astring &result;
entry_info *entrylist;
@@ -71,4 +71,4 @@ private:
const software_list_device **result;
};
-#endif /* __UISWLIST_H__ */
+#endif /* __UISWLIST_H__ */
diff --git a/src/emu/validity.c b/src/emu/validity.c
index 10830753572..59c965bf15a 100644
--- a/src/emu/validity.c
+++ b/src/emu/validity.c
@@ -154,12 +154,12 @@ void validity_checker::validate_tag(const char *tag)
validity_checker::validity_checker(emu_options &options)
: m_drivlist(options),
- m_errors(0),
- m_warnings(0),
- m_current_driver(NULL),
- m_current_config(NULL),
- m_current_device(NULL),
- m_current_ioport(NULL)
+ m_errors(0),
+ m_warnings(0),
+ m_current_driver(NULL),
+ m_current_config(NULL),
+ m_current_device(NULL),
+ m_current_ioport(NULL)
{
// pre-populate the defstr map with all the default strings
for (int strnum = 1; strnum < INPUT_STRING_COUNT; strnum++)
@@ -934,7 +934,7 @@ void validity_checker::validate_dip_settings(ioport_field &field)
// check for proper coin ordering
else if (strindex >= __input_string_coinage_start && strindex <= __input_string_coinage_end && next_strindex >= __input_string_coinage_start && next_strindex <= __input_string_coinage_end &&
- strindex >= next_strindex && setting->condition() == setting->next()->condition())
+ strindex >= next_strindex && setting->condition() == setting->next()->condition())
{
mame_printf_error("%s option has unsorted coinage %s > %s\n", field.name(), setting->name(), setting->next()->name());
coin_error = true;
diff --git a/src/emu/validity.h b/src/emu/validity.h
index 06f817f781e..01ace6cc0b3 100644
--- a/src/emu/validity.h
+++ b/src/emu/validity.h
@@ -106,30 +106,30 @@ private:
void output_via_delegate(output_delegate &delegate, const char *format, ...);
// internal driver list
- driver_enumerator m_drivlist;
+ driver_enumerator m_drivlist;
// error tracking
- int m_errors;
- int m_warnings;
- astring m_error_text;
- astring m_warning_text;
+ int m_errors;
+ int m_warnings;
+ astring m_error_text;
+ astring m_warning_text;
// maps for finding duplicates
- game_driver_map m_names_map;
- game_driver_map m_descriptions_map;
- game_driver_map m_roms_map;
- int_map m_defstr_map;
+ game_driver_map m_names_map;
+ game_driver_map m_descriptions_map;
+ game_driver_map m_roms_map;
+ int_map m_defstr_map;
// current state
- const game_driver * m_current_driver;
- const machine_config * m_current_config;
- const device_t * m_current_device;
- const char * m_current_ioport;
- int_map m_region_map;
+ const game_driver * m_current_driver;
+ const machine_config * m_current_config;
+ const device_t * m_current_device;
+ const char * m_current_ioport;
+ int_map m_region_map;
// callbacks
- output_delegate m_saved_error_output;
- output_delegate m_saved_warning_output;
+ output_delegate m_saved_error_output;
+ output_delegate m_saved_warning_output;
};
#endif
diff --git a/src/emu/video.c b/src/emu/video.c
index 4744ba8128f..758e243daa2 100644
--- a/src/emu/video.c
+++ b/src/emu/video.c
@@ -56,7 +56,7 @@
// DEBUGGING
//**************************************************************************
-#define LOG_THROTTLE (0)
+#define LOG_THROTTLE (0)
@@ -101,39 +101,39 @@ static void video_notifier_callback(const char *outname, INT32 value, void *para
video_manager::video_manager(running_machine &machine)
: m_machine(machine),
- m_screenless_frame_timer(NULL),
- m_output_changed(false),
- m_throttle_last_ticks(0),
- m_throttle_realtime(attotime::zero),
- m_throttle_emutime(attotime::zero),
- m_throttle_history(0),
- m_speed_last_realtime(0),
- m_speed_last_emutime(attotime::zero),
- m_speed_percent(1.0),
- m_overall_real_seconds(0),
- m_overall_real_ticks(0),
- m_overall_emutime(attotime::zero),
- m_overall_valid_counter(0),
- m_throttle(machine.options().throttle()),
- m_fastforward(false),
- m_seconds_to_run(machine.options().seconds_to_run()),
- m_auto_frameskip(machine.options().auto_frameskip()),
- m_speed(original_speed_setting()),
- m_empty_skip_count(0),
- m_frameskip_level(machine.options().frameskip()),
- m_frameskip_counter(0),
- m_frameskip_adjust(0),
- m_skipping_this_frame(false),
- m_average_oversleep(0),
- m_snap_target(NULL),
- m_snap_native(true),
- m_snap_width(0),
- m_snap_height(0),
- m_mngfile(NULL),
- m_avifile(NULL),
- m_movie_frame_period(attotime::zero),
- m_movie_next_frame_time(attotime::zero),
- m_movie_frame(0)
+ m_screenless_frame_timer(NULL),
+ m_output_changed(false),
+ m_throttle_last_ticks(0),
+ m_throttle_realtime(attotime::zero),
+ m_throttle_emutime(attotime::zero),
+ m_throttle_history(0),
+ m_speed_last_realtime(0),
+ m_speed_last_emutime(attotime::zero),
+ m_speed_percent(1.0),
+ m_overall_real_seconds(0),
+ m_overall_real_ticks(0),
+ m_overall_emutime(attotime::zero),
+ m_overall_valid_counter(0),
+ m_throttle(machine.options().throttle()),
+ m_fastforward(false),
+ m_seconds_to_run(machine.options().seconds_to_run()),
+ m_auto_frameskip(machine.options().auto_frameskip()),
+ m_speed(original_speed_setting()),
+ m_empty_skip_count(0),
+ m_frameskip_level(machine.options().frameskip()),
+ m_frameskip_counter(0),
+ m_frameskip_adjust(0),
+ m_skipping_this_frame(false),
+ m_average_oversleep(0),
+ m_snap_target(NULL),
+ m_snap_native(true),
+ m_snap_width(0),
+ m_snap_height(0),
+ m_mngfile(NULL),
+ m_avifile(NULL),
+ m_movie_frame_period(attotime::zero),
+ m_movie_next_frame_time(attotime::zero),
+ m_movie_frame(0)
{
// request a callback upon exiting
machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(video_manager::exit), this));
@@ -229,8 +229,8 @@ void video_manager::frame_update(bool debug)
bool anything_changed = finish_screen_updates();
// if none of the screens changed and we haven't skipped too many frames in a row,
- // mark this frame as skipped to prevent throttling; this helps for games that
- // don't update their screen at the monitor refresh rate
+ // mark this frame as skipped to prevent throttling; this helps for games that
+ // don't update their screen at the monitor refresh rate
if (!anything_changed && !m_auto_frameskip && m_frameskip_level == 0 && m_empty_skip_count++ < 3)
skipped_it = true;
else
@@ -750,10 +750,10 @@ void video_manager::update_throttle(attotime emutime)
attoseconds_t attoseconds_per_tick = ATTOSECONDS_PER_SECOND / ticks_per_second;
// if we're paused, emutime will not advance; instead, we subtract a fixed
- // amount of time (1/60th of a second) from the emulated time that was passed in,
- // and explicitly reset our tracked real and emulated timers to that value ...
- // this means we pretend that the last update was exactly 1/60th of a second
- // ago, and was in sync in both real and emulated time
+ // amount of time (1/60th of a second) from the emulated time that was passed in,
+ // and explicitly reset our tracked real and emulated timers to that value ...
+ // this means we pretend that the last update was exactly 1/60th of a second
+ // ago, and was in sync in both real and emulated time
if (machine().paused())
{
m_throttle_emutime = emutime - attotime(0, ATTOSECONDS_PER_SECOND / PAUSED_REFRESH_RATE);
@@ -761,9 +761,9 @@ void video_manager::update_throttle(attotime emutime)
}
// attempt to detect anomalies in the emulated time by subtracting the previously
- // reported value from our current value; this should be a small value somewhere
- // between 0 and 1/10th of a second ... anything outside of this range is obviously
- // wrong and requires a resync
+ // reported value from our current value; this should be a small value somewhere
+ // between 0 and 1/10th of a second ... anything outside of this range is obviously
+ // wrong and requires a resync
attoseconds_t emu_delta_attoseconds = (emutime - m_throttle_emutime).as_attoseconds();
if (emu_delta_attoseconds < 0 || emu_delta_attoseconds > ATTOSECONDS_PER_SECOND / 10)
{
@@ -773,13 +773,13 @@ void video_manager::update_throttle(attotime emutime)
}
// now determine the current real time in OSD-specified ticks; we have to be careful
- // here because counters can wrap, so we only use the difference between the last
- // read value and the current value in our computations
+ // here because counters can wrap, so we only use the difference between the last
+ // read value and the current value in our computations
osd_ticks_t diff_ticks = osd_ticks() - m_throttle_last_ticks;
m_throttle_last_ticks += diff_ticks;
// if it has been more than a full second of real time since the last call to this
- // function, we just need to resynchronize
+ // function, we just need to resynchronize
if (diff_ticks >= ticks_per_second)
{
if (LOG_THROTTLE)
@@ -795,16 +795,16 @@ void video_manager::update_throttle(attotime emutime)
m_throttle_realtime += attotime(0, real_delta_attoseconds);
// keep a history of whether or not emulated time beat real time over the last few
- // updates; this can be used for future heuristics
+ // updates; this can be used for future heuristics
m_throttle_history = (m_throttle_history << 1) | (emu_delta_attoseconds > real_delta_attoseconds);
// determine how far ahead real time is versus emulated time; note that we use the
- // accumulated times for this instead of the deltas for the current update because
- // we want to track time over a longer duration than a single update
+ // accumulated times for this instead of the deltas for the current update because
+ // we want to track time over a longer duration than a single update
attoseconds_t real_is_ahead_attoseconds = (m_throttle_emutime - m_throttle_realtime).as_attoseconds();
// if we're more than 1/10th of a second out, or if we are behind at all and emulation
- // is taking longer than the real frame, we just need to resync
+ // is taking longer than the real frame, we just need to resync
if (real_is_ahead_attoseconds < -ATTOSECONDS_PER_SECOND / 10 ||
(real_is_ahead_attoseconds < 0 && popcount[m_throttle_history & 0xff] < 6))
{
@@ -841,12 +841,12 @@ void video_manager::update_throttle(attotime emutime)
osd_ticks_t video_manager::throttle_until_ticks(osd_ticks_t target_ticks)
{
// we're allowed to sleep via the OSD code only if we're configured to do so
- // and we're not frameskipping due to autoframeskip, or if we're paused
+ // and we're not frameskipping due to autoframeskip, or if we're paused
bool allowed_to_sleep = false;
- if (machine().options().sleep() && (!effective_autoframeskip() || effective_frameskip() == 0))
- allowed_to_sleep = true;
- if (machine().paused())
- allowed_to_sleep = true;
+ if (machine().options().sleep() && (!effective_autoframeskip() || effective_frameskip() == 0))
+ allowed_to_sleep = true;
+ if (machine().paused())
+ allowed_to_sleep = true;
// loop until we reach our target
g_profiler.start(PROFILER_IDLE);
@@ -967,7 +967,7 @@ void video_manager::update_refresh_speed()
// compute a target speed as an integral percentage
// note that we lop 0.25Hz off of the minrefresh when doing the computation to allow for
- // the fact that most refresh rates are not accurate to 10 digits...
+ // the fact that most refresh rates are not accurate to 10 digits...
UINT32 target_speed = floor((minrefresh - 0.25f) * 1000.0 / ATTOSECONDS_TO_HZ(min_frame_period));
UINT32 original_speed = original_speed_setting();
target_speed = MIN(target_speed, original_speed);
@@ -1209,7 +1209,7 @@ file_error video_manager::open_next(emu_file &file, const char *extension)
// create the final file
file.set_openflags(origflags);
- return file.open(fname);
+ return file.open(fname);
}
diff --git a/src/emu/video.h b/src/emu/video.h
index 15337e1eb07..19041821d88 100644
--- a/src/emu/video.h
+++ b/src/emu/video.h
@@ -55,7 +55,7 @@
const int FRAMESKIP_LEVELS = 12;
const int MAX_FRAMESKIP = FRAMESKIP_LEVELS - 2;
-#define LCD_FRAMES_PER_SECOND 30
+#define LCD_FRAMES_PER_SECOND 30
//**************************************************************************
// TYPE DEFINITIONS
@@ -143,59 +143,59 @@ private:
void record_frame();
// internal state
- running_machine & m_machine; // reference to our machine
+ running_machine & m_machine; // reference to our machine
// screenless systems
- emu_timer * m_screenless_frame_timer; // timer to signal VBLANK start
- bool m_output_changed; // did an output element change?
+ emu_timer * m_screenless_frame_timer; // timer to signal VBLANK start
+ bool m_output_changed; // did an output element change?
// throttling calculations
- osd_ticks_t m_throttle_last_ticks; // osd_ticks the last call to throttle
- attotime m_throttle_realtime; // real time the last call to throttle
- attotime m_throttle_emutime; // emulated time the last call to throttle
- UINT32 m_throttle_history; // history of frames where we were fast enough
+ osd_ticks_t m_throttle_last_ticks; // osd_ticks the last call to throttle
+ attotime m_throttle_realtime; // real time the last call to throttle
+ attotime m_throttle_emutime; // emulated time the last call to throttle
+ UINT32 m_throttle_history; // history of frames where we were fast enough
// dynamic speed computation
- osd_ticks_t m_speed_last_realtime; // real time at the last speed calculation
- attotime m_speed_last_emutime; // emulated time at the last speed calculation
- double m_speed_percent; // most recent speed percentage
+ osd_ticks_t m_speed_last_realtime; // real time at the last speed calculation
+ attotime m_speed_last_emutime; // emulated time at the last speed calculation
+ double m_speed_percent; // most recent speed percentage
// overall speed computation
- UINT32 m_overall_real_seconds; // accumulated real seconds at normal speed
- osd_ticks_t m_overall_real_ticks; // accumulated real ticks at normal speed
- attotime m_overall_emutime; // accumulated emulated time at normal speed
- UINT32 m_overall_valid_counter; // number of consecutive valid time periods
+ UINT32 m_overall_real_seconds; // accumulated real seconds at normal speed
+ osd_ticks_t m_overall_real_ticks; // accumulated real ticks at normal speed
+ attotime m_overall_emutime; // accumulated emulated time at normal speed
+ UINT32 m_overall_valid_counter; // number of consecutive valid time periods
// configuration
- bool m_throttle; // flag: TRUE if we're currently throttled
- bool m_fastforward; // flag: TRUE if we're currently fast-forwarding
- UINT32 m_seconds_to_run; // number of seconds to run before quitting
- bool m_auto_frameskip; // flag: TRUE if we're automatically frameskipping
- UINT32 m_speed; // overall speed (*1000)
+ bool m_throttle; // flag: TRUE if we're currently throttled
+ bool m_fastforward; // flag: TRUE if we're currently fast-forwarding
+ UINT32 m_seconds_to_run; // number of seconds to run before quitting
+ bool m_auto_frameskip; // flag: TRUE if we're automatically frameskipping
+ UINT32 m_speed; // overall speed (*1000)
// frameskipping
- UINT8 m_empty_skip_count; // number of empty frames we have skipped
- UINT8 m_frameskip_level; // current frameskip level
- UINT8 m_frameskip_counter; // counter that counts through the frameskip steps
- INT8 m_frameskip_adjust;
- bool m_skipping_this_frame; // flag: TRUE if we are skipping the current frame
- osd_ticks_t m_average_oversleep; // average number of ticks the OSD oversleeps
+ UINT8 m_empty_skip_count; // number of empty frames we have skipped
+ UINT8 m_frameskip_level; // current frameskip level
+ UINT8 m_frameskip_counter; // counter that counts through the frameskip steps
+ INT8 m_frameskip_adjust;
+ bool m_skipping_this_frame; // flag: TRUE if we are skipping the current frame
+ osd_ticks_t m_average_oversleep; // average number of ticks the OSD oversleeps
// snapshot stuff
- render_target * m_snap_target; // screen shapshot target
- bitmap_rgb32 m_snap_bitmap; // screen snapshot bitmap
- bool m_snap_native; // are we using native per-screen layouts?
- INT32 m_snap_width; // width of snapshots (0 == auto)
- INT32 m_snap_height; // height of snapshots (0 == auto)
+ render_target * m_snap_target; // screen shapshot target
+ bitmap_rgb32 m_snap_bitmap; // screen snapshot bitmap
+ bool m_snap_native; // are we using native per-screen layouts?
+ INT32 m_snap_width; // width of snapshots (0 == auto)
+ INT32 m_snap_height; // height of snapshots (0 == auto)
// movie recording
- emu_file * m_mngfile; // handle to the open movie file
- avi_file * m_avifile; // handle to the open movie file
- attotime m_movie_frame_period; // period of a single movie frame
- attotime m_movie_next_frame_time; // time of next frame
- UINT32 m_movie_frame; // current movie frame number
+ emu_file * m_mngfile; // handle to the open movie file
+ avi_file * m_avifile; // handle to the open movie file
+ attotime m_movie_frame_period; // period of a single movie frame
+ attotime m_movie_next_frame_time; // time of next frame
+ UINT32 m_movie_frame; // current movie frame number
- static const UINT8 s_skiptable[FRAMESKIP_LEVELS][FRAMESKIP_LEVELS];
+ static const UINT8 s_skiptable[FRAMESKIP_LEVELS][FRAMESKIP_LEVELS];
static const attoseconds_t ATTOSECONDS_PER_SPEED_UPDATE = ATTOSECONDS_PER_SECOND / 4;
static const int PAUSED_REFRESH_RATE = 30;
@@ -209,4 +209,4 @@ private:
bool video_assert_out_of_range_pixels(running_machine &machine, bitmap_ind16 &bitmap);
-#endif /* __VIDEO_H__ */
+#endif /* __VIDEO_H__ */
diff --git a/src/emu/video/315_5124.c b/src/emu/video/315_5124.c
index 784c10c418f..b22cf8b3bbd 100644
--- a/src/emu/video/315_5124.c
+++ b/src/emu/video/315_5124.c
@@ -49,10 +49,10 @@ PAL frame timing
#include "video/315_5124.h"
-#define STATUS_VINT 0x80 /* Pending vertical interrupt flag */
-#define STATUS_SPROVR 0x40 /* Sprite overflow flag */
-#define STATUS_SPRCOL 0x20 /* Object collision flag */
-#define STATUS_HINT 0x02 /* Pending horizontal interrupt flag */
+#define STATUS_VINT 0x80 /* Pending vertical interrupt flag */
+#define STATUS_SPROVR 0x40 /* Sprite overflow flag */
+#define STATUS_SPRCOL 0x20 /* Object collision flag */
+#define STATUS_HINT 0x02 /* Pending horizontal interrupt flag */
#define VINT_HPOS 23
#define HINT_HPOS 23
@@ -62,8 +62,8 @@ PAL frame timing
#define SPRCOL_BASEHPOS 42
#define DISPLAY_CB_HPOS 5 /* fix X-Scroll latchtime (Flubba's VDPTest) */
-#define DRAW_TIME_GG 86 /* 1 + 2 + 14 +8 + 96/2 */
-#define DRAW_TIME_SMS 0
+#define DRAW_TIME_GG 86 /* 1 + 2 + 14 +8 + 96/2 */
+#define DRAW_TIME_SMS 0
#define PRIORITY_BIT 0x1000
#define BACKDROP_COLOR ((m_vdp_mode == 4 ? 0x10 : 0x00) + (m_reg[0x07] & 0x0f))
@@ -344,8 +344,8 @@ void sega315_5124_device::process_line_timer()
rectangle rec;
int vpos = m_screen->vpos();
int vpos_limit = m_frame_timing[VERTICAL_BLANKING] + m_frame_timing[TOP_BLANKING]
- + m_frame_timing[TOP_BORDER] + m_frame_timing[ACTIVE_DISPLAY_V]
- + m_frame_timing[BOTTOM_BORDER] + m_frame_timing[BOTTOM_BLANKING];
+ + m_frame_timing[TOP_BORDER] + m_frame_timing[ACTIVE_DISPLAY_V]
+ + m_frame_timing[BOTTOM_BORDER] + m_frame_timing[BOTTOM_BLANKING];
rec.min_y = rec.max_y = vpos;
@@ -581,15 +581,15 @@ WRITE8_MEMBER( sega315_5124_device::register_write )
m_addr = (data << 8) | (m_addr & 0xff);
switch (m_addrmode)
{
- case 0: /* VRAM reading mode */
+ case 0: /* VRAM reading mode */
m_buffer = this->space().read_byte(m_addr & 0x3fff);
m_addr += 1;
break;
- case 1: /* VRAM writing mode */
+ case 1: /* VRAM writing mode */
break;
- case 2: /* VDP register write */
+ case 2: /* VDP register write */
reg_num = data & 0x0f;
m_reg[reg_num] = m_addr & 0xff;
//logerror("%s: %s: setting register %x to %02x\n", machine().describe_context(), tag(), reg_num, m_addr & 0xf );
@@ -606,7 +606,7 @@ WRITE8_MEMBER( sega315_5124_device::register_write )
m_addrmode = 0;
break;
- case 3: /* CRAM writing mode */
+ case 3: /* CRAM writing mode */
break;
}
}
@@ -677,7 +677,7 @@ void sega315_5124_device::draw_scanline_mode4( int *line_buffer, int *priority_s
/* else x_scroll = m_reg[0x08] */
x_scroll = (((m_reg[0x00] & 0x40) && (line < 16)) ? 0 : 0x0100 - m_reg[0x08]);
- x_scroll_start_column = (x_scroll >> 3); /* x starting column tile */
+ x_scroll_start_column = (x_scroll >> 3); /* x starting column tile */
/* Draw background layer */
for (tile_column = 0; tile_column < 33; tile_column++)
@@ -855,7 +855,7 @@ void sega315_5124_device::draw_sprites_mode4( int *line_buffer, int *priority_se
if (m_reg[0x00] & 0x08)
{
- sprite_x -= 0x08; /* sprite shift */
+ sprite_x -= 0x08; /* sprite shift */
}
if (m_reg[0x06] & 0x04)
@@ -888,7 +888,7 @@ void sega315_5124_device::draw_sprites_mode4( int *line_buffer, int *priority_se
UINT8 pen_bit_3 = (bit_plane_3 >> (7 - pixel_x)) & 0x01;
UINT8 pen_selected = (pen_bit_3 << 3 | pen_bit_2 << 2 | pen_bit_1 << 1 | pen_bit_0) | 0x10;
- if (pen_selected == 0x10) /* Transparent palette so skip draw */
+ if (pen_selected == 0x10) /* Transparent palette so skip draw */
{
continue;
}
@@ -1458,17 +1458,17 @@ void sega315_5378_device::draw_scanline( int pixel_offset_x, int pixel_plot_y, i
}
/* Do vertical scaling for a screen with 192 or 224 lines
- Lines 0-2 and 221-223 have no effect on the output on the GG screen.
- We will calculate the gamegear lines as follows:
- GG_0 = 1/6 * SMS_3 + 1/3 * SMS_4 + 1/3 * SMS_5 + 1/6 * SMS_6
- GG_1 = 1/6 * SMS_4 + 1/3 * SMS_5 + 1/3 * SMS_6 + 1/6 * SMS_7
- GG_2 = 1/6 * SMS_6 + 1/3 * SMS_7 + 1/3 * SMS_8 + 1/6 * SMS_9
- GG_3 = 1/6 * SMS_7 + 1/3 * SMS_8 + 1/3 * SMS_9 + 1/6 * SMS_10
- GG_4 = 1/6 * SMS_9 + 1/3 * SMS_10 + 1/3 * SMS_11 + 1/6 * SMS_12
- .....
- GG_142 = 1/6 * SMS_216 + 1/3 * SMS_217 + 1/3 * SMS_218 + 1/6 * SMS_219
- GG_143 = 1/6 * SMS_217 + 1/3 * SMS_218 + 1/3 * SMS_219 + 1/6 * SMS_220
- */
+ Lines 0-2 and 221-223 have no effect on the output on the GG screen.
+ We will calculate the gamegear lines as follows:
+ GG_0 = 1/6 * SMS_3 + 1/3 * SMS_4 + 1/3 * SMS_5 + 1/6 * SMS_6
+ GG_1 = 1/6 * SMS_4 + 1/3 * SMS_5 + 1/3 * SMS_6 + 1/6 * SMS_7
+ GG_2 = 1/6 * SMS_6 + 1/3 * SMS_7 + 1/3 * SMS_8 + 1/6 * SMS_9
+ GG_3 = 1/6 * SMS_7 + 1/3 * SMS_8 + 1/3 * SMS_9 + 1/6 * SMS_10
+ GG_4 = 1/6 * SMS_9 + 1/3 * SMS_10 + 1/3 * SMS_11 + 1/6 * SMS_12
+ .....
+ GG_142 = 1/6 * SMS_216 + 1/3 * SMS_217 + 1/3 * SMS_218 + 1/6 * SMS_219
+ GG_143 = 1/6 * SMS_217 + 1/3 * SMS_218 + 1/3 * SMS_219 + 1/6 * SMS_220
+ */
{
int gg_line;
int my_line = pixel_plot_y + line - (SEGA315_5124_TBORDER_START + SEGA315_5124_NTSC_224_TBORDER_HEIGHT);
@@ -1500,10 +1500,10 @@ void sega315_5378_device::draw_scanline( int pixel_offset_x, int pixel_plot_y, i
for (x = 0 + 48; x < 160 + 48; x++)
{
- rgb_t c1 = machine().pens[line1[x]];
- rgb_t c2 = machine().pens[line2[x]];
- rgb_t c3 = machine().pens[line3[x]];
- rgb_t c4 = machine().pens[line4[x]];
+ rgb_t c1 = machine().pens[line1[x]];
+ rgb_t c2 = machine().pens[line2[x]];
+ rgb_t c3 = machine().pens[line3[x]];
+ rgb_t c4 = machine().pens[line4[x]];
m_tmpbitmap.pix32(pixel_plot_y, pixel_offset_x + x) =
MAKE_RGB((RGB_RED(c1) / 6 + RGB_RED(c2) / 3 + RGB_RED(c3) / 3 + RGB_RED(c4) / 6 ),
(RGB_GREEN(c1) / 6 + RGB_GREEN(c2) / 3 + RGB_GREEN(c3) / 3 + RGB_GREEN(c4) / 6 ),
@@ -1695,5 +1695,3 @@ void sega315_5378_device::device_reset()
sega315_5124_device::device_reset();
m_draw_time = DRAW_TIME_GG;
}
-
-
diff --git a/src/emu/video/315_5124.h b/src/emu/video/315_5124.h
index 43c2bf1e9e9..f18b1b1d1ff 100644
--- a/src/emu/video/315_5124.h
+++ b/src/emu/video/315_5124.h
@@ -35,15 +35,15 @@
//#define SEGA315_5124_PAL_240_BBORDER_HEIGHT (0x18) /* 24 lines */
-#define SEGA315_5124_PALETTE_SIZE (64+16)
-#define SEGA315_5378_PALETTE_SIZE 4096
+#define SEGA315_5124_PALETTE_SIZE (64+16)
+#define SEGA315_5378_PALETTE_SIZE 4096
PALETTE_INIT( sega315_5124 );
PALETTE_INIT( sega315_5378 );
-#define SEGA315_5378_CRAM_SIZE 0x40 /* 32 colors x 2 bytes per color = 64 bytes */
-#define SEGA315_5124_CRAM_SIZE 0x20 /* 32 colors x 1 bytes per color = 32 bytes */
+#define SEGA315_5378_CRAM_SIZE 0x40 /* 32 colors x 2 bytes per color = 64 bytes */
+#define SEGA315_5124_CRAM_SIZE 0x20 /* 32 colors x 1 bytes per color = 32 bytes */
#define VRAM_SIZE 0x4000
@@ -61,14 +61,14 @@ struct sega315_5124_interface
};
-extern const device_type SEGA315_5124; /* aka SMS1 vdp */
-extern const device_type SEGA315_5246; /* aka SMS2 vdp */
-extern const device_type SEGA315_5378; /* aka Gamegear vdp */
+extern const device_type SEGA315_5124; /* aka SMS1 vdp */
+extern const device_type SEGA315_5246; /* aka SMS2 vdp */
+extern const device_type SEGA315_5378; /* aka Gamegear vdp */
class sega315_5124_device : public device_t,
- public sega315_5124_interface,
- public device_memory_interface
+ public sega315_5124_interface,
+ public device_memory_interface
{
public:
// construction/destruction
@@ -143,11 +143,11 @@ protected:
int m_sprite_zoom;
/* line_buffer will be used to hold 5 lines of line data. Line #0 is the regular blitting area.
- Lines #1-#4 will be used as a kind of cache to be used for vertical scaling in the gamegear
- sms compatibility mode. */
+ Lines #1-#4 will be used as a kind of cache to be used for vertical scaling in the gamegear
+ sms compatibility mode. */
int *m_line_buffer;
int m_current_palette[32];
- devcb_resolved_write_line m_cb_int;
+ devcb_resolved_write_line m_cb_int;
devcb_resolved_write_line m_cb_pause;
emu_timer *m_display_timer;
emu_timer *m_set_status_vint_timer;
diff --git a/src/emu/video/bufsprite.c b/src/emu/video/bufsprite.c
index fcd28ebc167..67801874686 100644
--- a/src/emu/video/bufsprite.c
+++ b/src/emu/video/bufsprite.c
@@ -66,6 +66,3 @@ WRITE32_HANDLER( buffer_spriteram32_2_w ) { }
/* perform the actual buffering */
void buffer_spriteram(running_machine &machine, UINT8 *ptr, int length) { }
void buffer_spriteram_2(running_machine &machine, UINT8 *ptr, int length) { }
-
-
-
diff --git a/src/emu/video/bufsprite.h b/src/emu/video/bufsprite.h
index c841cf5bf79..7d5b21cb32c 100644
--- a/src/emu/video/bufsprite.h
+++ b/src/emu/video/bufsprite.h
@@ -88,7 +88,7 @@ public:
// construction
buffered_spriteram_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, "Buffered Sprite RAM", tag, owner, clock),
- m_spriteram(*owner, tag) { }
+ m_spriteram(*owner, tag) { }
// getters
_Type *live() const { return m_spriteram; }
@@ -124,8 +124,8 @@ protected:
private:
// internal state
- required_shared_ptr<_Type> m_spriteram;
- dynamic_array<_Type> m_buffered;
+ required_shared_ptr<_Type> m_spriteram;
+ dynamic_array<_Type> m_buffered;
};
@@ -173,4 +173,4 @@ public:
};
-#endif /* __BUFSPRITE_H__ */
+#endif /* __BUFSPRITE_H__ */
diff --git a/src/emu/video/cdp1861.c b/src/emu/video/cdp1861.c
index 8509b8d1ed0..05b7dbc3ef8 100644
--- a/src/emu/video/cdp1861.c
+++ b/src/emu/video/cdp1861.c
@@ -16,9 +16,9 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define CDP1861_CYCLES_DMA_START 2*8
-#define CDP1861_CYCLES_DMA_ACTIVE 8*8
-#define CDP1861_CYCLES_DMA_WAIT 6*8
+#define CDP1861_CYCLES_DMA_START 2*8
+#define CDP1861_CYCLES_DMA_ACTIVE 8*8
+#define CDP1861_CYCLES_DMA_WAIT 6*8
@@ -34,7 +34,7 @@ const device_type CDP1861 = &device_creator<cdp1861_device>;
//-------------------------------------------------
cdp1861_device::cdp1861_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CDP1861, "CDP1861", tag, owner, clock)
+ : device_t(mconfig, CDP1861, "CDP1861", tag, owner, clock)
{
}
diff --git a/src/emu/video/cdp1861.h b/src/emu/video/cdp1861.h
index dfc9c341597..2379cb561c3 100644
--- a/src/emu/video/cdp1861.h
+++ b/src/emu/video/cdp1861.h
@@ -35,29 +35,29 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define CDP1861_VISIBLE_COLUMNS 64
-#define CDP1861_VISIBLE_LINES 128
+#define CDP1861_VISIBLE_COLUMNS 64
+#define CDP1861_VISIBLE_LINES 128
-#define CDP1861_HBLANK_START 14 * 8
-#define CDP1861_HBLANK_END 12
-#define CDP1861_HSYNC_START 0
-#define CDP1861_HSYNC_END 12
-#define CDP1861_SCREEN_WIDTH 14 * 8
+#define CDP1861_HBLANK_START 14 * 8
+#define CDP1861_HBLANK_END 12
+#define CDP1861_HSYNC_START 0
+#define CDP1861_HSYNC_END 12
+#define CDP1861_SCREEN_WIDTH 14 * 8
-#define CDP1861_TOTAL_SCANLINES 262
+#define CDP1861_TOTAL_SCANLINES 262
-#define CDP1861_SCANLINE_DISPLAY_START 80
-#define CDP1861_SCANLINE_DISPLAY_END 208
-#define CDP1861_SCANLINE_VBLANK_START 262
-#define CDP1861_SCANLINE_VBLANK_END 16
-#define CDP1861_SCANLINE_VSYNC_START 16
-#define CDP1861_SCANLINE_VSYNC_END 0
-#define CDP1861_SCANLINE_INT_START CDP1861_SCANLINE_DISPLAY_START - 2
-#define CDP1861_SCANLINE_INT_END CDP1861_SCANLINE_DISPLAY_START
-#define CDP1861_SCANLINE_EFX_TOP_START CDP1861_SCANLINE_DISPLAY_START - 4
-#define CDP1861_SCANLINE_EFX_TOP_END CDP1861_SCANLINE_DISPLAY_START
-#define CDP1861_SCANLINE_EFX_BOTTOM_START CDP1861_SCANLINE_DISPLAY_END - 4
-#define CDP1861_SCANLINE_EFX_BOTTOM_END CDP1861_SCANLINE_DISPLAY_END
+#define CDP1861_SCANLINE_DISPLAY_START 80
+#define CDP1861_SCANLINE_DISPLAY_END 208
+#define CDP1861_SCANLINE_VBLANK_START 262
+#define CDP1861_SCANLINE_VBLANK_END 16
+#define CDP1861_SCANLINE_VSYNC_START 16
+#define CDP1861_SCANLINE_VSYNC_END 0
+#define CDP1861_SCANLINE_INT_START CDP1861_SCANLINE_DISPLAY_START - 2
+#define CDP1861_SCANLINE_INT_END CDP1861_SCANLINE_DISPLAY_START
+#define CDP1861_SCANLINE_EFX_TOP_START CDP1861_SCANLINE_DISPLAY_START - 4
+#define CDP1861_SCANLINE_EFX_TOP_END CDP1861_SCANLINE_DISPLAY_START
+#define CDP1861_SCANLINE_EFX_BOTTOM_START CDP1861_SCANLINE_DISPLAY_END - 4
+#define CDP1861_SCANLINE_EFX_BOTTOM_END CDP1861_SCANLINE_DISPLAY_END
@@ -93,33 +93,33 @@ struct cdp1861_interface
const char *m_cpu_tag;
const char *m_screen_tag;
- devcb_write_line m_out_int_cb;
- devcb_write_line m_out_dmao_cb;
- devcb_write_line m_out_efx_cb;
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_dmao_cb;
+ devcb_write_line m_out_efx_cb;
};
// ======================> cdp1861_device
-class cdp1861_device : public device_t,
- public cdp1861_interface
+class cdp1861_device : public device_t,
+ public cdp1861_interface
{
public:
- // construction/destruction
- cdp1861_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cdp1861_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_WRITE8_MEMBER( dma_w );
+ DECLARE_WRITE8_MEMBER( dma_w );
DECLARE_WRITE_LINE_MEMBER( disp_on_w );
DECLARE_WRITE_LINE_MEMBER( disp_off_w );
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@@ -127,22 +127,22 @@ private:
static const device_timer_id TIMER_EFX = 1;
static const device_timer_id TIMER_DMA = 2;
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_write_line m_out_dmao_func;
- devcb_resolved_write_line m_out_efx_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_dmao_func;
+ devcb_resolved_write_line m_out_efx_func;
- screen_device *m_screen; // screen
- bitmap_rgb32 m_bitmap; // bitmap
+ screen_device *m_screen; // screen
+ bitmap_rgb32 m_bitmap; // bitmap
- int m_disp; // display enabled
- int m_dispon; // display on latch
- int m_dispoff; // display off latch
- int m_dmaout; // DMA request active
+ int m_disp; // display enabled
+ int m_dispon; // display on latch
+ int m_dispoff; // display off latch
+ int m_dmaout; // DMA request active
// timers
- emu_timer *m_int_timer; // interrupt timer
- emu_timer *m_efx_timer; // EFx timer
- emu_timer *m_dma_timer; // DMA timer
+ emu_timer *m_int_timer; // interrupt timer
+ emu_timer *m_efx_timer; // EFx timer
+ emu_timer *m_dma_timer; // DMA timer
cpu_device *m_cpu;
};
diff --git a/src/emu/video/cdp1862.c b/src/emu/video/cdp1862.c
index a749f3f175f..60589f9f4d7 100644
--- a/src/emu/video/cdp1862.c
+++ b/src/emu/video/cdp1862.c
@@ -80,7 +80,7 @@ inline void cdp1862_device::initialize_palette()
//-------------------------------------------------
cdp1862_device::cdp1862_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, CDP1862, "CDP1862", tag, owner, clock)
+ : device_t(mconfig, CDP1862, "CDP1862", tag, owner, clock)
{
}
diff --git a/src/emu/video/cdp1862.h b/src/emu/video/cdp1862.h
index d918a86782e..5b23aae53bb 100644
--- a/src/emu/video/cdp1862.h
+++ b/src/emu/video/cdp1862.h
@@ -35,7 +35,7 @@
// MACROS / CONSTANTS
//**************************************************************************
-#define CPD1862_CLOCK XTAL_7_15909MHz
+#define CPD1862_CLOCK XTAL_7_15909MHz
@@ -63,57 +63,57 @@ struct cdp1862_interface
{
const char *m_screen_tag;
- devcb_read_line m_in_rd_cb;
- devcb_read_line m_in_bd_cb;
- devcb_read_line m_in_gd_cb;
+ devcb_read_line m_in_rd_cb;
+ devcb_read_line m_in_bd_cb;
+ devcb_read_line m_in_gd_cb;
- double m_lum_r; // red luminance resistor value
- double m_lum_b; // blue luminance resistor value
- double m_lum_g; // green luminance resistor value
- double m_lum_bkg; // background luminance resistor value
+ double m_lum_r; // red luminance resistor value
+ double m_lum_b; // blue luminance resistor value
+ double m_lum_g; // green luminance resistor value
+ double m_lum_bkg; // background luminance resistor value
- double m_chr_r; // red chrominance resistor value
- double m_chr_b; // blue chrominance resistor value
- double m_chr_g; // green chrominance resistor value
- double m_chr_bkg; // background chrominance resistor value
+ double m_chr_r; // red chrominance resistor value
+ double m_chr_b; // blue chrominance resistor value
+ double m_chr_g; // green chrominance resistor value
+ double m_chr_bkg; // background chrominance resistor value
};
// ======================> cdp1862_device
-class cdp1862_device : public device_t,
- public cdp1862_interface
+class cdp1862_device : public device_t,
+ public cdp1862_interface
{
public:
- // construction/destruction
- cdp1862_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cdp1862_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_WRITE8_MEMBER( dma_w );
+ DECLARE_WRITE8_MEMBER( dma_w );
DECLARE_WRITE_LINE_MEMBER( bkg_w );
DECLARE_WRITE_LINE_MEMBER( con_w );
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
private:
inline void initialize_palette();
- devcb_resolved_read_line m_in_rd_func;
- devcb_resolved_read_line m_in_bd_func;
- devcb_resolved_read_line m_in_gd_func;
+ devcb_resolved_read_line m_in_rd_func;
+ devcb_resolved_read_line m_in_bd_func;
+ devcb_resolved_read_line m_in_gd_func;
- screen_device *m_screen; // screen
- bitmap_rgb32 m_bitmap; // bitmap
+ screen_device *m_screen; // screen
+ bitmap_rgb32 m_bitmap; // bitmap
rgb_t m_palette[16];
- int m_bgcolor; // background color
- int m_con; // color on
+ int m_bgcolor; // background color
+ int m_con; // color on
};
diff --git a/src/emu/video/crt9007.c b/src/emu/video/crt9007.c
index 02195c56f38..f3e1bc98609 100644
--- a/src/emu/video/crt9007.c
+++ b/src/emu/video/crt9007.c
@@ -179,10 +179,10 @@ enum
// operation modes
enum
{
- OPERATION_MODE_REPETITIVE_MEMORY_ADDRESSING = 0, // not implemented
+ OPERATION_MODE_REPETITIVE_MEMORY_ADDRESSING = 0, // not implemented
OPERATION_MODE_DOUBLE_ROW_BUFFER = 1,
- OPERATION_MODE_SINGLE_ROW_BUFFER = 4, // not implemented
- OPERATION_MODE_ATTRIBUTE_ASSEMBLE = 7 // not implemented
+ OPERATION_MODE_SINGLE_ROW_BUFFER = 4, // not implemented
+ OPERATION_MODE_ATTRIBUTE_ASSEMBLE = 7 // not implemented
};
@@ -190,23 +190,23 @@ enum
enum
{
ADDRESS_MODE_SEQUENTIAL_ADDRESSING = 0,
- ADDRESS_MODE_SEQUENTIAL_ROLL_ADDRESSING, // not implemented
- ADDRESS_MODE_CONTIGUOUS_ROW_TABLE, // not implemented
- ADDRESS_MODE_LINKED_LIST_ROW_TABLE // not implemented
+ ADDRESS_MODE_SEQUENTIAL_ROLL_ADDRESSING, // not implemented
+ ADDRESS_MODE_CONTIGUOUS_ROW_TABLE, // not implemented
+ ADDRESS_MODE_LINKED_LIST_ROW_TABLE // not implemented
};
// interrupt enable register bits
-const int IE_VERTICAL_RETRACE = 0x40;
-const int IE_LIGHT_PEN = 0x20;
-const int IE_FRAME_TIMER = 0x01;
+const int IE_VERTICAL_RETRACE = 0x40;
+const int IE_LIGHT_PEN = 0x20;
+const int IE_FRAME_TIMER = 0x01;
// status register bits
-const int STATUS_INTERRUPT_PENDING = 0x80;
-const int STATUS_VERTICAL_RETRACE = 0x40;
-const int STATUS_LIGHT_PEN_UPDATE = 0x20;
-const int STATUS_ODD_EVEN = 0x04;
-const int STATUS_FRAME_TIMER_OCCURRED = 0x01;
+const int STATUS_INTERRUPT_PENDING = 0x80;
+const int STATUS_VERTICAL_RETRACE = 0x40;
+const int STATUS_LIGHT_PEN_UPDATE = 0x20;
+const int STATUS_ODD_EVEN = 0x04;
+const int STATUS_FRAME_TIMER_OCCURRED = 0x01;
@@ -447,8 +447,8 @@ inline void crt9007_device::recompute_parameters()
crt9007_device::crt9007_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, CRT9007, "SMC CRT9007", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(crt9007))
+ device_memory_interface(mconfig, *this),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(crt9007))
{
for (int i = 0; i < 0x3d; i++)
m_reg[i] = 0;
diff --git a/src/emu/video/crt9007.h b/src/emu/video/crt9007.h
index 7bd30549fab..8bb61136e4b 100644
--- a/src/emu/video/crt9007.h
+++ b/src/emu/video/crt9007.h
@@ -70,19 +70,19 @@
struct crt9007_interface
{
- const char *m_screen_tag; /* screen we are acting on */
- int hpixels_per_column; /* number of pixels per video memory address */
+ const char *m_screen_tag; /* screen we are acting on */
+ int hpixels_per_column; /* number of pixels per video memory address */
- devcb_write_line m_out_int_cb;
- devcb_write_line m_out_dmar_cb;
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_dmar_cb;
- devcb_write_line m_out_vs_cb;
- devcb_write_line m_out_hs_cb;
+ devcb_write_line m_out_vs_cb;
+ devcb_write_line m_out_hs_cb;
devcb_write_line m_out_vlt_cb;
- devcb_write_line m_out_curs_cb;
- devcb_write_line m_out_drb_cb;
- devcb_write_line m_out_cblank_cb;
+ devcb_write_line m_out_curs_cb;
+ devcb_write_line m_out_drb_cb;
+ devcb_write_line m_out_cblank_cb;
devcb_write_line m_out_slg_cb;
devcb_write_line m_out_sld_cb;
@@ -92,16 +92,16 @@ struct crt9007_interface
// ======================> crt9007_device
-class crt9007_device : public device_t,
+class crt9007_device : public device_t,
public device_memory_interface,
- public crt9007_interface
+ public crt9007_interface
{
public:
- // construction/destruction
- crt9007_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ crt9007_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( ack_w );
DECLARE_WRITE_LINE_MEMBER( lpstb_w );
DECLARE_READ_LINE_MEMBER( vlt_r );
@@ -110,10 +110,10 @@ public:
void set_hpixels_per_column(int hpixels_per_column);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_clock_changed();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@@ -141,16 +141,16 @@ private:
inline void recompute_parameters();
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_write_line m_out_dmar_func;
- devcb_resolved_write_line m_out_hs_func;
- devcb_resolved_write_line m_out_vs_func;
- devcb_resolved_write_line m_out_vlt_func;
- devcb_resolved_write_line m_out_curs_func;
- devcb_resolved_write_line m_out_drb_func;
- devcb_resolved_write_line m_out_cblank_func;
- devcb_resolved_write_line m_out_slg_func;
- devcb_resolved_write_line m_out_sld_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_dmar_func;
+ devcb_resolved_write_line m_out_hs_func;
+ devcb_resolved_write_line m_out_vs_func;
+ devcb_resolved_write_line m_out_vlt_func;
+ devcb_resolved_write_line m_out_curs_func;
+ devcb_resolved_write_line m_out_drb_func;
+ devcb_resolved_write_line m_out_cblank_func;
+ devcb_resolved_write_line m_out_slg_func;
+ devcb_resolved_write_line m_out_sld_func;
screen_device *m_screen;
@@ -195,8 +195,8 @@ private:
emu_timer *m_drb_timer;
emu_timer *m_dma_timer;
- // address space configurations
- const address_space_config m_space_config;
+ // address space configurations
+ const address_space_config m_space_config;
};
diff --git a/src/emu/video/crt9021.h b/src/emu/video/crt9021.h
index 14ca455b46c..f3cc54e61ec 100644
--- a/src/emu/video/crt9021.h
+++ b/src/emu/video/crt9021.h
@@ -63,24 +63,24 @@
struct crt9021_interface
{
- const char *screen_tag; /* screen we are acting on */
+ const char *screen_tag; /* screen we are acting on */
- devcb_read8 in_data_cb;
- devcb_read8 in_attr_cb;
+ devcb_read8 in_data_cb;
+ devcb_read8 in_attr_cb;
- devcb_read_line in_atten_cb;
+ devcb_read_line in_atten_cb;
};
// ======================> crt9021_device
-class crt9021_device : public device_t,
- public crt9021_interface
+class crt9021_device : public device_t,
+ public crt9021_interface
{
public:
- // construction/destruction
- crt9021_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ crt9021_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_WRITE_LINE_MEMBER( slg_w );
DECLARE_WRITE_LINE_MEMBER( sld_w );
@@ -91,16 +91,16 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
virtual void device_clock_changed();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
- devcb_resolved_read8 m_in_data_func;
- devcb_resolved_read8 m_in_attr_func;
- devcb_resolved_read_line m_in_atten_func;
+ devcb_resolved_read8 m_in_data_func;
+ devcb_resolved_read8 m_in_attr_func;
+ devcb_resolved_read_line m_in_atten_func;
screen_device *m_screen;
diff --git a/src/emu/video/crt9212.h b/src/emu/video/crt9212.h
index f9b0e3a535e..f3f0b347b4a 100644
--- a/src/emu/video/crt9212.h
+++ b/src/emu/video/crt9212.h
@@ -37,7 +37,7 @@
// MACROS / CONSTANTS
//**************************************************************************
-const int CRT9212_RAM_SIZE = 135;
+const int CRT9212_RAM_SIZE = 135;
@@ -64,42 +64,42 @@ const int CRT9212_RAM_SIZE = 135;
struct crt9212_interface
{
- devcb_write_line m_out_rof_cb;
- devcb_write_line m_out_wof_cb;
- devcb_read_line m_in_ren_cb;
- devcb_read_line m_in_wen_cb;
- devcb_read_line m_in_wen2_cb;
+ devcb_write_line m_out_rof_cb;
+ devcb_write_line m_out_wof_cb;
+ devcb_read_line m_in_ren_cb;
+ devcb_read_line m_in_wen_cb;
+ devcb_read_line m_in_wen2_cb;
};
// ======================> crt9212_device
-class crt9212_device : public device_t,
+class crt9212_device : public device_t,
public crt9212_interface
{
public:
- // construction/destruction
- crt9212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ crt9212_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( clrcnt_w );
DECLARE_WRITE_LINE_MEMBER( tog_w );
DECLARE_WRITE_LINE_MEMBER( rclk_w );
DECLARE_WRITE_LINE_MEMBER( wclk_w );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
private:
- devcb_resolved_write_line m_out_rof_func;
- devcb_resolved_write_line m_out_wof_func;
- devcb_resolved_read_line m_in_ren_func;
- devcb_resolved_read_line m_in_wen_func;
- devcb_resolved_read_line m_in_wen2_func;
+ devcb_resolved_write_line m_out_rof_func;
+ devcb_resolved_write_line m_out_wof_func;
+ devcb_resolved_read_line m_in_ren_func;
+ devcb_resolved_read_line m_in_wen_func;
+ devcb_resolved_read_line m_in_wen2_func;
UINT8 m_ram[CRT9212_RAM_SIZE][2];
diff --git a/src/emu/video/dm9368.c b/src/emu/video/dm9368.c
index 918172358ea..2cd2e694748 100644
--- a/src/emu/video/dm9368.c
+++ b/src/emu/video/dm9368.c
@@ -70,9 +70,9 @@ inline void dm9368_device::set_rbo(int state)
//-------------------------------------------------
dm9368_device::dm9368_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, DM9368, "DM9368", tag, owner, clock),
- m_rbi(1),
- m_rbo(1)
+ : device_t(mconfig, DM9368, "DM9368", tag, owner, clock),
+ m_rbi(1),
+ m_rbo(1)
{
}
diff --git a/src/emu/video/dm9368.h b/src/emu/video/dm9368.h
index aa5278198cd..7e5e9f4ac75 100644
--- a/src/emu/video/dm9368.h
+++ b/src/emu/video/dm9368.h
@@ -50,38 +50,38 @@
struct dm9368_interface
{
- int m_digit;
+ int m_digit;
- devcb_read_line m_in_rbi_cb;
- devcb_write_line m_out_rbo_cb;
+ devcb_read_line m_in_rbi_cb;
+ devcb_write_line m_out_rbo_cb;
};
// ======================> dm9368_device
-class dm9368_device : public device_t,
- public dm9368_interface
+class dm9368_device : public device_t,
+ public dm9368_interface
{
public:
- // construction/destruction
- dm9368_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ dm9368_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- void a_w(UINT8 data);
+ void a_w(UINT8 data);
DECLARE_WRITE_LINE_MEMBER( rbi_w );
DECLARE_READ_LINE_MEMBER( rbo_r );
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
private:
inline int get_rbi();
inline void set_rbo(int state);
- devcb_resolved_read_line m_in_rbi_func;
- devcb_resolved_write_line m_out_rbo_func;
+ devcb_resolved_read_line m_in_rbi_func;
+ devcb_resolved_write_line m_out_rbo_func;
int m_rbi;
int m_rbo;
diff --git a/src/emu/video/generic.h b/src/emu/video/generic.h
index 746c9985eed..42b17a8636d 100644
--- a/src/emu/video/generic.h
+++ b/src/emu/video/generic.h
@@ -52,4 +52,4 @@ extern const rgb_t RGB_MONOCHROME_GREEN[];
extern const rgb_t RGB_MONOCHROME_GREEN_HIGHLIGHT[];
extern const rgb_t RGB_MONOCHROME_YELLOW[];
-#endif /* __VIDEO_GENERIC_H__ */
+#endif /* __VIDEO_GENERIC_H__ */
diff --git a/src/emu/video/h63484.c b/src/emu/video/h63484.c
index 4182c2fd988..7089ec53b34 100644
--- a/src/emu/video/h63484.c
+++ b/src/emu/video/h63484.c
@@ -26,8 +26,8 @@ ADDRESS_MAP_END
//-------------------------------------------------
h63484_device::h63484_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, H63484, "H63484", tag, owner, clock),
- device_memory_interface(mconfig, *this),
+ : device_t(mconfig, H63484, "H63484", tag, owner, clock),
+ device_memory_interface(mconfig, *this),
m_ar(0),
m_sr(0),
m_fifo_ptr(-1),
@@ -41,7 +41,7 @@ h63484_device::h63484_device(const machine_config &mconfig, const char *tag, dev
m_cl0(0),
m_cl1(0),
m_dcr(0),
- m_space_config("videoram", ENDIANNESS_LITTLE, 8, 20, 0, NULL, *ADDRESS_MAP_NAME(h63484_vram))
+ m_space_config("videoram", ENDIANNESS_LITTLE, 8, 20, 0, NULL, *ADDRESS_MAP_NAME(h63484_vram))
{
m_shortname = "h63484";
}
@@ -286,44 +286,44 @@ enum
COMMAND_RGCPY
};
-#define H63484_COMMAND_ORG 0x0400 // p: 2
-#define H63484_COMMAND_WPR 0x0800 // & ~0x1f p: 1
-#define H63484_COMMAND_RPR 0x0c00 // & ~0x1f p: 0
-#define H63484_COMMAND_WPTN 0x1800 // & ~0xf p: 1 + n
-#define H63484_COMMAND_RPTN 0x1c00 // & ~0xf p: 1
-#define H63484_COMMAND_DRD 0x2400 // p: 2
-#define H63484_COMMAND_DWT 0x2800 // p: 2
-#define H63484_COMMAND_DMOD 0x2c00 // & ~3 p: 2
-#define H63484_COMMAND_RD 0x4400 // p: 0
-#define H63484_COMMAND_WT 0x4800 // p: 1
-#define H63484_COMMAND_MOD 0x4c00 // & ~3 p: 1
-#define H63484_COMMAND_CLR 0x5800 // p: 3
-#define H63484_COMMAND_SCLR 0x5c00 // & ~3 p: 3
-#define H63484_COMMAND_CPY 0x6000 // & ~0x0f03 p: 4
-#define H63484_COMMAND_SCPY 0x7000 // & ~0x0f03 p: 4
-#define H63484_COMMAND_AMOVE 0x8000 // p: 2
-#define H63484_COMMAND_RMOVE 0x8400 // p: 2
-#define H63484_COMMAND_ALINE 0x8800 // & ~0x00ff p: 2
-#define H63484_COMMAND_RLINE 0x8c00 // & ~0x00ff p: 2
-#define H63484_COMMAND_ARCT 0x9000 // & ~0x00ff p: 2
-#define H63484_COMMAND_RRCT 0x9400 // & ~0x00ff p: 2
-#define H63484_COMMAND_APLL 0x9800 // & ~0x00ff p: 1 + n
-#define H63484_COMMAND_RPLL 0x9c00 // & ~0x00ff p: 1 + n
-#define H63484_COMMAND_APLG 0xa000 // & ~0x00ff p: 1 + n
-#define H63484_COMMAND_RPLG 0xa400 // & ~0x00ff p: 1 + n
-#define H63484_COMMAND_CRCL 0xa800 // & ~0x01ff p: 1
-#define H63484_COMMAND_ELPS 0xac00 // & ~0x01ff p: 3
-#define H63484_COMMAND_AARC 0xb000 // & ~0x01ff p: 4
-#define H63484_COMMAND_RARC 0xb400 // & ~0x01ff p: 4
-#define H63484_COMMAND_AEARC 0xb800 // & ~0x01ff p: 6
-#define H63484_COMMAND_REARC 0xbc00 // & ~0x01ff p: 6
-#define H63484_COMMAND_AFRCT 0xc000 // & ~0x00ff p: 2
-#define H63484_COMMAND_RFRCT 0xc400 // & ~0x00ff p: 2
-#define H63484_COMMAND_PAINT 0xc800 // & ~0x01ff p: 0
-#define H63484_COMMAND_DOT 0xcc00 // & ~0x00ff p: 0
-#define H63484_COMMAND_PTN 0xd000 // & ~0x0fff p: 1
-#define H63484_COMMAND_AGCPY 0xe000 // & ~0x0fff p: 4
-#define H63484_COMMAND_RGCPY 0xf000 // & ~0x0fff p: 4
+#define H63484_COMMAND_ORG 0x0400 // p: 2
+#define H63484_COMMAND_WPR 0x0800 // & ~0x1f p: 1
+#define H63484_COMMAND_RPR 0x0c00 // & ~0x1f p: 0
+#define H63484_COMMAND_WPTN 0x1800 // & ~0xf p: 1 + n
+#define H63484_COMMAND_RPTN 0x1c00 // & ~0xf p: 1
+#define H63484_COMMAND_DRD 0x2400 // p: 2
+#define H63484_COMMAND_DWT 0x2800 // p: 2
+#define H63484_COMMAND_DMOD 0x2c00 // & ~3 p: 2
+#define H63484_COMMAND_RD 0x4400 // p: 0
+#define H63484_COMMAND_WT 0x4800 // p: 1
+#define H63484_COMMAND_MOD 0x4c00 // & ~3 p: 1
+#define H63484_COMMAND_CLR 0x5800 // p: 3
+#define H63484_COMMAND_SCLR 0x5c00 // & ~3 p: 3
+#define H63484_COMMAND_CPY 0x6000 // & ~0x0f03 p: 4
+#define H63484_COMMAND_SCPY 0x7000 // & ~0x0f03 p: 4
+#define H63484_COMMAND_AMOVE 0x8000 // p: 2
+#define H63484_COMMAND_RMOVE 0x8400 // p: 2
+#define H63484_COMMAND_ALINE 0x8800 // & ~0x00ff p: 2
+#define H63484_COMMAND_RLINE 0x8c00 // & ~0x00ff p: 2
+#define H63484_COMMAND_ARCT 0x9000 // & ~0x00ff p: 2
+#define H63484_COMMAND_RRCT 0x9400 // & ~0x00ff p: 2
+#define H63484_COMMAND_APLL 0x9800 // & ~0x00ff p: 1 + n
+#define H63484_COMMAND_RPLL 0x9c00 // & ~0x00ff p: 1 + n
+#define H63484_COMMAND_APLG 0xa000 // & ~0x00ff p: 1 + n
+#define H63484_COMMAND_RPLG 0xa400 // & ~0x00ff p: 1 + n
+#define H63484_COMMAND_CRCL 0xa800 // & ~0x01ff p: 1
+#define H63484_COMMAND_ELPS 0xac00 // & ~0x01ff p: 3
+#define H63484_COMMAND_AARC 0xb000 // & ~0x01ff p: 4
+#define H63484_COMMAND_RARC 0xb400 // & ~0x01ff p: 4
+#define H63484_COMMAND_AEARC 0xb800 // & ~0x01ff p: 6
+#define H63484_COMMAND_REARC 0xbc00 // & ~0x01ff p: 6
+#define H63484_COMMAND_AFRCT 0xc000 // & ~0x00ff p: 2
+#define H63484_COMMAND_RFRCT 0xc400 // & ~0x00ff p: 2
+#define H63484_COMMAND_PAINT 0xc800 // & ~0x01ff p: 0
+#define H63484_COMMAND_DOT 0xcc00 // & ~0x00ff p: 0
+#define H63484_COMMAND_PTN 0xd000 // & ~0x0fff p: 1
+#define H63484_COMMAND_AGCPY 0xe000 // & ~0x0fff p: 4
+#define H63484_COMMAND_RGCPY 0xf000 // & ~0x0fff p: 4
/*-------------------------------------------------
@@ -547,72 +547,72 @@ int h63484_device::translate_command(UINT16 data)
/* annoying switch-case sequence, but it's the only way to get invalid commands ... */
switch (data)
{
- case H63484_COMMAND_ORG: return COMMAND_ORG;
- case H63484_COMMAND_DRD: return COMMAND_DRD;
- case H63484_COMMAND_DWT: return COMMAND_DWT;
- case H63484_COMMAND_RD: return COMMAND_RD;
- case H63484_COMMAND_WT: return COMMAND_WT;
- case H63484_COMMAND_CLR: return COMMAND_CLR;
- case H63484_COMMAND_AMOVE: return COMMAND_AMOVE;
- case H63484_COMMAND_RMOVE: return COMMAND_RMOVE;
+ case H63484_COMMAND_ORG: return COMMAND_ORG;
+ case H63484_COMMAND_DRD: return COMMAND_DRD;
+ case H63484_COMMAND_DWT: return COMMAND_DWT;
+ case H63484_COMMAND_RD: return COMMAND_RD;
+ case H63484_COMMAND_WT: return COMMAND_WT;
+ case H63484_COMMAND_CLR: return COMMAND_CLR;
+ case H63484_COMMAND_AMOVE: return COMMAND_AMOVE;
+ case H63484_COMMAND_RMOVE: return COMMAND_RMOVE;
}
switch(data & ~0x3)
{
- case H63484_COMMAND_DMOD: return COMMAND_DMOD;
- case H63484_COMMAND_MOD: return COMMAND_MOD;
- case H63484_COMMAND_SCLR: return COMMAND_SCLR;
+ case H63484_COMMAND_DMOD: return COMMAND_DMOD;
+ case H63484_COMMAND_MOD: return COMMAND_MOD;
+ case H63484_COMMAND_SCLR: return COMMAND_SCLR;
}
switch(data & ~0xf)
{
- case H63484_COMMAND_WPTN: return COMMAND_WPTN;
- case H63484_COMMAND_RPTN: return COMMAND_RPTN;
+ case H63484_COMMAND_WPTN: return COMMAND_WPTN;
+ case H63484_COMMAND_RPTN: return COMMAND_RPTN;
}
switch(data & ~0x1f)
{
- case H63484_COMMAND_WPR: return COMMAND_WPR;
- case H63484_COMMAND_RPR: return COMMAND_RPR;
+ case H63484_COMMAND_WPR: return COMMAND_WPR;
+ case H63484_COMMAND_RPR: return COMMAND_RPR;
}
switch(data & ~0x0f03)
{
- case H63484_COMMAND_CPY: return COMMAND_CPY;
- case H63484_COMMAND_SCPY: return COMMAND_SCPY;
+ case H63484_COMMAND_CPY: return COMMAND_CPY;
+ case H63484_COMMAND_SCPY: return COMMAND_SCPY;
}
switch(data & ~0x00ff)
{
- case H63484_COMMAND_ALINE: return COMMAND_ALINE;
- case H63484_COMMAND_RLINE: return COMMAND_RLINE;
- case H63484_COMMAND_ARCT: return COMMAND_ARCT;
- case H63484_COMMAND_RRCT: return COMMAND_RRCT;
- case H63484_COMMAND_APLL: return COMMAND_APLL;
- case H63484_COMMAND_RPLL: return COMMAND_RPLL;
- case H63484_COMMAND_APLG: return COMMAND_APLG;
- case H63484_COMMAND_RPLG: return COMMAND_RPLG;
- case H63484_COMMAND_AFRCT: return COMMAND_AFRCT;
- case H63484_COMMAND_RFRCT: return COMMAND_RFRCT;
- case H63484_COMMAND_DOT: return COMMAND_DOT;
+ case H63484_COMMAND_ALINE: return COMMAND_ALINE;
+ case H63484_COMMAND_RLINE: return COMMAND_RLINE;
+ case H63484_COMMAND_ARCT: return COMMAND_ARCT;
+ case H63484_COMMAND_RRCT: return COMMAND_RRCT;
+ case H63484_COMMAND_APLL: return COMMAND_APLL;
+ case H63484_COMMAND_RPLL: return COMMAND_RPLL;
+ case H63484_COMMAND_APLG: return COMMAND_APLG;
+ case H63484_COMMAND_RPLG: return COMMAND_RPLG;
+ case H63484_COMMAND_AFRCT: return COMMAND_AFRCT;
+ case H63484_COMMAND_RFRCT: return COMMAND_RFRCT;
+ case H63484_COMMAND_DOT: return COMMAND_DOT;
}
switch(data & ~0x01ff)
{
- case H63484_COMMAND_CRCL: return COMMAND_CRCL;
- case H63484_COMMAND_ELPS: return COMMAND_ELPS;
- case H63484_COMMAND_AARC: return COMMAND_AARC;
- case H63484_COMMAND_RARC: return COMMAND_RARC;
- case H63484_COMMAND_AEARC: return COMMAND_AEARC;
- case H63484_COMMAND_REARC: return COMMAND_REARC;
- case H63484_COMMAND_PAINT: return COMMAND_PAINT;
+ case H63484_COMMAND_CRCL: return COMMAND_CRCL;
+ case H63484_COMMAND_ELPS: return COMMAND_ELPS;
+ case H63484_COMMAND_AARC: return COMMAND_AARC;
+ case H63484_COMMAND_RARC: return COMMAND_RARC;
+ case H63484_COMMAND_AEARC: return COMMAND_AEARC;
+ case H63484_COMMAND_REARC: return COMMAND_REARC;
+ case H63484_COMMAND_PAINT: return COMMAND_PAINT;
}
switch(data & ~0x0fff)
{
- case H63484_COMMAND_PTN: return COMMAND_PTN;
- case H63484_COMMAND_AGCPY: return COMMAND_AGCPY;
- case H63484_COMMAND_RGCPY: return COMMAND_RGCPY;
+ case H63484_COMMAND_PTN: return COMMAND_PTN;
+ case H63484_COMMAND_AGCPY: return COMMAND_AGCPY;
+ case H63484_COMMAND_RGCPY: return COMMAND_RGCPY;
}
return COMMAND_INVALID;
@@ -754,11 +754,11 @@ void h63484_device::command_rct_exec()
printf("%d %d\n",dX,dY);
/*
- 3<-2
- | ^
- v |
- 0->1
- */
+ 3<-2
+ | ^
+ v |
+ 0->1
+ */
/* 0 -> 1 */
for(i=0;i<dX;i+=inc_x)
@@ -1013,12 +1013,12 @@ void h63484_device::video_registers_w(int offset)
exec_abort_sequence();
/*
- x--- ---- ---- ---- ABorT
- -x-- ---- ---- ---- PauSE
- ...
- ---- -xxx ---- ---- Graphic Bit Mode (bpp)
- ---- ---- xxxx xxxx irq mask, directly correlated to sr
- */
+ x--- ---- ---- ---- ABorT
+ -x-- ---- ---- ---- PauSE
+ ...
+ ---- -xxx ---- ---- Graphic Bit Mode (bpp)
+ ---- ---- xxxx xxxx irq mask, directly correlated to sr
+ */
m_ccr = vreg_data;
break;
diff --git a/src/emu/video/h63484.h b/src/emu/video/h63484.h
index 564c3a9afbf..58286b51781 100644
--- a/src/emu/video/h63484.h
+++ b/src/emu/video/h63484.h
@@ -33,37 +33,37 @@ typedef void (*h63484_display_pixels_func)(device_t *device, bitmap_ind16 &bitma
struct h63484_interface
{
- const char *m_screen_tag; /* screen we are acting on */
- h63484_display_pixels_func m_display_cb;
+ const char *m_screen_tag; /* screen we are acting on */
+ h63484_display_pixels_func m_display_cb;
};
// ======================> upd7220_device
-class h63484_device : public device_t,
+class h63484_device : public device_t,
public device_memory_interface,
- public h63484_interface
+ public h63484_interface
{
public:
- // construction/destruction
- h63484_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ h63484_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_WRITE16_MEMBER( address_w );
- DECLARE_WRITE16_MEMBER( data_w );
+ DECLARE_WRITE16_MEMBER( address_w );
+ DECLARE_WRITE16_MEMBER( data_w );
- DECLARE_READ16_MEMBER( status_r );
- DECLARE_READ16_MEMBER( data_r );
+ DECLARE_READ16_MEMBER( status_r );
+ DECLARE_READ16_MEMBER( data_r );
- DECLARE_READ8_MEMBER( vram_r );
- DECLARE_WRITE8_MEMBER( vram_w );
+ DECLARE_READ8_MEMBER( vram_r );
+ DECLARE_WRITE8_MEMBER( vram_w );
UINT32 update_screen(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
virtual const rom_entry *device_rom_region() const;
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
//virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
virtual void device_config_complete();
@@ -99,16 +99,16 @@ private:
UINT8 m_vreg[0x100];
UINT8 m_sr;
- UINT8 m_fifo[16]; /* FIFO W data queue */
- int m_fifo_ptr; /* FIFO W pointer */
+ UINT8 m_fifo[16]; /* FIFO W data queue */
+ int m_fifo_ptr; /* FIFO W pointer */
- UINT8 m_fifo_r[16]; /* FIFO R data queue */
- int m_fifo_r_ptr; /* FIFO R pointer */
+ UINT8 m_fifo_r[16]; /* FIFO R data queue */
+ int m_fifo_r_ptr; /* FIFO R pointer */
UINT16 m_cr;
- UINT16 m_pr[0x10]; /* parameter byte register */
- int m_param_ptr; /* parameter pointer */
+ UINT16 m_pr[0x10]; /* parameter byte register */
+ int m_param_ptr; /* parameter pointer */
UINT32 m_rwp[4];
UINT8 m_rwp_dn;
@@ -140,12 +140,10 @@ private:
UINT16 m_vc, m_vws, m_vww, m_vds;
UINT8 m_vsw;
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
};
// device type definition
extern const device_type H63484;
#endif /* __H63484_H__ */
-
-
diff --git a/src/emu/video/hd44102.c b/src/emu/video/hd44102.c
index b56b94be0b9..88e5c59c023 100644
--- a/src/emu/video/hd44102.c
+++ b/src/emu/video/hd44102.c
@@ -19,19 +19,19 @@
#define LOG 0
-#define CONTROL_DISPLAY_OFF 0x38
-#define CONTROL_DISPLAY_ON 0x39
-#define CONTROL_COUNT_DOWN_MODE 0x3a
-#define CONTROL_COUNT_UP_MODE 0x3b
-#define CONTROL_Y_ADDRESS_MASK 0x3f
-#define CONTROL_X_ADDRESS_MASK 0xc0
-#define CONTROL_DISPLAY_START_PAGE 0x3e
+#define CONTROL_DISPLAY_OFF 0x38
+#define CONTROL_DISPLAY_ON 0x39
+#define CONTROL_COUNT_DOWN_MODE 0x3a
+#define CONTROL_COUNT_UP_MODE 0x3b
+#define CONTROL_Y_ADDRESS_MASK 0x3f
+#define CONTROL_X_ADDRESS_MASK 0xc0
+#define CONTROL_DISPLAY_START_PAGE 0x3e
-#define STATUS_BUSY 0x80 /* not supported */
-#define STATUS_COUNT_UP 0x40
-#define STATUS_DISPLAY_OFF 0x20
-#define STATUS_RESET 0x10 /* not supported */
+#define STATUS_BUSY 0x80 /* not supported */
+#define STATUS_COUNT_UP 0x40
+#define STATUS_DISPLAY_OFF 0x20
+#define STATUS_RESET 0x10 /* not supported */
// device type definition
@@ -69,11 +69,11 @@ inline void hd44102_device::count_up_or_down()
//-------------------------------------------------
hd44102_device::hd44102_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, HD44102, "HD44102", tag, owner, clock),
- m_cs2(0),
- m_page(0),
- m_x(0),
- m_y(0)
+ : device_t(mconfig, HD44102, "HD44102", tag, owner, clock),
+ m_cs2(0),
+ m_page(0),
+ m_x(0),
+ m_y(0)
{
}
diff --git a/src/emu/video/hd44102.h b/src/emu/video/hd44102.h
index 204c719ec9a..d95c2e668c7 100644
--- a/src/emu/video/hd44102.h
+++ b/src/emu/video/hd44102.h
@@ -32,47 +32,47 @@
// ======================> hd44102_device
-class hd44102_device : public device_t
+class hd44102_device : public device_t
{
public:
- // construction/destruction
- hd44102_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ hd44102_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// inline configuration helpers
static void static_set_config(device_t &device, const char *screen_tag, int sx, int sy);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( cs2_w );
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
private:
- DECLARE_READ8_MEMBER( status_r );
- DECLARE_WRITE8_MEMBER( control_w );
+ DECLARE_READ8_MEMBER( status_r );
+ DECLARE_WRITE8_MEMBER( control_w );
- DECLARE_READ8_MEMBER( data_r );
- DECLARE_WRITE8_MEMBER( data_w );
+ DECLARE_READ8_MEMBER( data_r );
+ DECLARE_WRITE8_MEMBER( data_w );
inline void count_up_or_down();
- screen_device *m_screen; // screen
+ screen_device *m_screen; // screen
- UINT8 m_ram[4][50]; // display memory
+ UINT8 m_ram[4][50]; // display memory
- UINT8 m_status; // status register
- UINT8 m_output; // output register
+ UINT8 m_status; // status register
+ UINT8 m_output; // output register
- int m_cs2; // chip select
- int m_page; // display start page
- int m_x; // X address
- int m_y; // Y address
+ int m_cs2; // chip select
+ int m_page; // display start page
+ int m_x; // X address
+ int m_y; // Y address
const char *m_screen_tag;
int m_sx;
diff --git a/src/emu/video/hd61830.c b/src/emu/video/hd61830.c
index 59a82818607..8e3beea0be1 100644
--- a/src/emu/video/hd61830.c
+++ b/src/emu/video/hd61830.c
@@ -40,12 +40,12 @@ static const int CYCLES[] =
4, 4, 4, 4, 4, -1, -1, -1, 4, 4, 4, 4, 6, 6, 36, 36
};
-const int MODE_EXTERNAL_CG = 0x01;
-const int MODE_GRAPHIC = 0x02;
-const int MODE_CURSOR = 0x04;
-const int MODE_BLINK = 0x08;
-const int MODE_MASTER = 0x10;
-const int MODE_DISPLAY_ON = 0x20;
+const int MODE_EXTERNAL_CG = 0x01;
+const int MODE_GRAPHIC = 0x02;
+const int MODE_CURSOR = 0x04;
+const int MODE_BLINK = 0x08;
+const int MODE_MASTER = 0x10;
+const int MODE_DISPLAY_ON = 0x20;
@@ -106,11 +106,11 @@ inline void hd61830_device::writebyte(offs_t address, UINT8 data)
//-------------------------------------------------
hd61830_device::hd61830_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, HD61830, "Hitachi HD61830", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_bf(false),
- m_blink(0),
- m_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(hd61830))
+ : device_t(mconfig, HD61830, "Hitachi HD61830", tag, owner, clock),
+ device_memory_interface(mconfig, *this),
+ m_bf(false),
+ m_blink(0),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(hd61830))
{
m_shortname = "hd61830";
}
@@ -157,7 +157,7 @@ void hd61830_device::device_start()
m_busy_timer = timer_alloc();
// resolve callbacks
- m_in_rd_func.resolve(m_in_rd_cb, *this);
+ m_in_rd_func.resolve(m_in_rd_cb, *this);
m_screen = machine().device<screen_device>(screen_tag);
diff --git a/src/emu/video/hd61830.h b/src/emu/video/hd61830.h
index 7b173eb6b81..7595de1d759 100644
--- a/src/emu/video/hd61830.h
+++ b/src/emu/video/hd61830.h
@@ -47,35 +47,35 @@ struct hd61830_interface
{
const char *screen_tag;
- devcb_read8 m_in_rd_cb;
+ devcb_read8 m_in_rd_cb;
};
// ======================> hd61830_device
-class hd61830_device : public device_t,
+class hd61830_device : public device_t,
public device_memory_interface,
- public hd61830_interface
+ public hd61830_interface
{
public:
- // construction/destruction
- hd61830_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ hd61830_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( status_r );
- DECLARE_WRITE8_MEMBER( control_w );
+ DECLARE_READ8_MEMBER( status_r );
+ DECLARE_WRITE8_MEMBER( control_w );
- DECLARE_READ8_MEMBER( data_r );
- DECLARE_WRITE8_MEMBER( data_w );
+ DECLARE_READ8_MEMBER( data_r );
+ DECLARE_WRITE8_MEMBER( data_w );
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual const rom_entry *device_rom_region() const;
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device_memory_interface overrides
@@ -92,32 +92,32 @@ private:
void draw_char(bitmap_ind16 &bitmap, const rectangle &cliprect, UINT16 ma, int x, int y, UINT8 md);
void update_text(bitmap_ind16 &bitmap, const rectangle &cliprect);
- devcb_resolved_read8 m_in_rd_func;
+ devcb_resolved_read8 m_in_rd_func;
screen_device *m_screen;
emu_timer *m_busy_timer;
address_space *m_data;
- bool m_bf; // busy flag
+ bool m_bf; // busy flag
- UINT8 m_ir; // instruction register
- UINT8 m_mcr; // mode control register
- UINT8 m_dor; // data output register
+ UINT8 m_ir; // instruction register
+ UINT8 m_mcr; // mode control register
+ UINT8 m_dor; // data output register
- UINT16 m_dsa; // display start address
- UINT16 m_cac; // cursor address counter
+ UINT16 m_dsa; // display start address
+ UINT16 m_cac; // cursor address counter
- int m_vp; // vertical character pitch
- int m_hp; // horizontal character pitch
- int m_hn; // horizontal number of characters
- int m_nx; // number of time divisions
- int m_cp; // cursor position
+ int m_vp; // vertical character pitch
+ int m_hp; // horizontal character pitch
+ int m_hn; // horizontal number of characters
+ int m_nx; // number of time divisions
+ int m_cp; // cursor position
- int m_blink; // blink counter
- int m_cursor; // cursor visible
+ int m_blink; // blink counter
+ int m_cursor; // cursor visible
- // address space configurations
- const address_space_config m_space_config;
+ // address space configurations
+ const address_space_config m_space_config;
};
diff --git a/src/emu/video/hd63484.c b/src/emu/video/hd63484.c
index 1c6705186d9..acc90695839 100644
--- a/src/emu/video/hd63484.c
+++ b/src/emu/video/hd63484.c
@@ -75,42 +75,42 @@ static int get_pixel(device_t *device, int x, int y);
static const int instruction_length[64] =
{
- 0, 3, 2, 1, /* 0x */
- 0, 0,-1, 2, /* 1x */
- 0, 3, 3, 3, /* 2x */
- 0, 0, 0, 0, /* 3x */
- 0, 1, 2, 2, /* 4x */
- 0, 0, 4, 4, /* 5x */
- 5, 5, 5, 5, /* 6x */
- 5, 5, 5, 5, /* 7x */
- 3, 3, 3, 3, /* 8x */
- 3, 3,-2,-2, /* 9x */
- -2,-2, 2, 4, /* Ax */
- 5, 5, 7, 7, /* Bx */
- 3, 3, 1, 1, /* Cx */
- 2, 2, 2, 2, /* Dx */
- 5, 5, 5, 5, /* Ex */
- 5, 5, 5, 5 /* Fx */
+ 0, 3, 2, 1, /* 0x */
+ 0, 0,-1, 2, /* 1x */
+ 0, 3, 3, 3, /* 2x */
+ 0, 0, 0, 0, /* 3x */
+ 0, 1, 2, 2, /* 4x */
+ 0, 0, 4, 4, /* 5x */
+ 5, 5, 5, 5, /* 6x */
+ 5, 5, 5, 5, /* 7x */
+ 3, 3, 3, 3, /* 8x */
+ 3, 3,-2,-2, /* 9x */
+ -2,-2, 2, 4, /* Ax */
+ 5, 5, 7, 7, /* Bx */
+ 3, 3, 1, 1, /* Cx */
+ 2, 2, 2, 2, /* Dx */
+ 5, 5, 5, 5, /* Ex */
+ 5, 5, 5, 5 /* Fx */
};
static const char *const instruction_name[64] =
{
- "undef","ORG ","WPR ","RPR ", /* 0x */
- "undef","undef","WPTN ","RPTN ", /* 1x */
- "undef","DRD ","DWT ","DMOD ", /* 2x */
- "undef","undef","undef","undef", /* 3x */
- "undef","RD ","WT ","MOD ", /* 4x */
- "undef","undef","CLR ","SCLR ", /* 5x */
- "CPY ","CPY ","CPY ","CPY ", /* 6x */
- "SCPY ","SCPY ","SCPY ","SCPY ", /* 7x */
- "AMOVE","RMOVE","ALINE","RLINE", /* 8x */
- "ARCT ","RRCT ","APLL ","RPLL ", /* 9x */
- "APLG ","RPLG ","CRCL ","ELPS ", /* Ax */
- "AARC ","RARC ","AEARC","REARC", /* Bx */
- "AFRCT","RFRCT","PAINT","DOT ", /* Cx */
- "PTN ","PTN ","PTN ","PTN ", /* Dx */
- "AGCPY","AGCPY","AGCPY","AGCPY", /* Ex */
- "RGCPY","RGCPY","RGCPY","RGCPY" /* Fx */
+ "undef","ORG ","WPR ","RPR ", /* 0x */
+ "undef","undef","WPTN ","RPTN ", /* 1x */
+ "undef","DRD ","DWT ","DMOD ", /* 2x */
+ "undef","undef","undef","undef", /* 3x */
+ "undef","RD ","WT ","MOD ", /* 4x */
+ "undef","undef","CLR ","SCLR ", /* 5x */
+ "CPY ","CPY ","CPY ","CPY ", /* 6x */
+ "SCPY ","SCPY ","SCPY ","SCPY ", /* 7x */
+ "AMOVE","RMOVE","ALINE","RLINE", /* 8x */
+ "ARCT ","RRCT ","APLL ","RPLL ", /* 9x */
+ "APLG ","RPLG ","CRCL ","ELPS ", /* Ax */
+ "AARC ","RARC ","AEARC","REARC", /* Bx */
+ "AFRCT","RFRCT","PAINT","DOT ", /* Cx */
+ "PTN ","PTN ","PTN ","PTN ", /* Dx */
+ "AGCPY","AGCPY","AGCPY","AGCPY", /* Ex */
+ "RGCPY","RGCPY","RGCPY","RGCPY" /* Fx */
};
static void doclr16( device_t *device, int opcode, UINT16 fill, int *dst, INT16 _ax, INT16 _ay )
@@ -1047,7 +1047,7 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
hd63484->org = ((hd63484->fifo[1] & 0x00ff) << 12) | ((hd63484->fifo[2] & 0xfff0) >> 4);
hd63484->org_dpd = hd63484->fifo[2] & 0x000f;
}
- else if ((hd63484->fifo[0] & 0xffe0) == 0x0800) /* WPR */
+ else if ((hd63484->fifo[0] & 0xffe0) == 0x0800) /* WPR */
{
if (hd63484->fifo[0] == 0x0800)
hd63484->cl0 = hd63484->fifo[1];
@@ -1098,7 +1098,7 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
else
logerror("unsupported register\n");
}
- else if ((hd63484->fifo[0] & 0xffe0) == 0x0c00) /* RPR */
+ else if ((hd63484->fifo[0] & 0xffe0) == 0x0c00) /* RPR */
{
if (hd63484->fifo[0] == 0x0c00)
hd63484->fifo[1] = hd63484->cl0;
@@ -1157,7 +1157,7 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
else
logerror("unsupported register\n");
}
- else if ((hd63484->fifo[0] & 0xfff0) == 0x1800) /* WPTN */
+ else if ((hd63484->fifo[0] & 0xfff0) == 0x1800) /* WPTN */
{
int i;
int start = hd63484->fifo[0] & 0x000f;
@@ -1165,87 +1165,87 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
for (i = 0; i < n; i++)
hd63484->pattern[start + i] = hd63484->fifo[2 + i];
}
- else if (hd63484->fifo[0] == 0x4400) /* RD */
+ else if (hd63484->fifo[0] == 0x4400) /* RD */
{
hd63484->readfifo = hd63484->ram[hd63484->rwp];
hd63484->rwp = (hd63484->rwp + 1) & (HD63484_RAM_SIZE - 1);
}
- else if (hd63484->fifo[0] == 0x4800) /* WT */
+ else if (hd63484->fifo[0] == 0x4800) /* WT */
{
hd63484->ram[hd63484->rwp] = hd63484->fifo[1];
hd63484->rwp = (hd63484->rwp + 1) & (HD63484_RAM_SIZE - 1);
}
- else if (hd63484->fifo[0] == 0x5800) /* CLR */
+ else if (hd63484->fifo[0] == 0x5800) /* CLR */
{
doclr16(device, hd63484->fifo[0], hd63484->fifo[1], &hd63484->rwp, hd63484->fifo[2], hd63484->fifo[3]);
- {
+ {
int fifo2 = (int)hd63484->fifo[2], fifo3 = (int)hd63484->fifo[3];
if (fifo2 < 0) fifo2 *= -1;
if (fifo3 < 0) fifo3 *= -1;
hd63484->rwp += ((fifo2 + 1) * (fifo3 + 1));
- }
+ }
}
- else if ((hd63484->fifo[0] & 0xfffc) == 0x5c00) /* SCLR */
+ else if ((hd63484->fifo[0] & 0xfffc) == 0x5c00) /* SCLR */
{
doclr16(device, hd63484->fifo[0], hd63484->fifo[1], &hd63484->rwp, hd63484->fifo[2], hd63484->fifo[3]);
- {
- int fifo2 = (int)hd63484->fifo[2], fifo3 = (int)hd63484->fifo[3];
- if (fifo2 < 0) fifo2 *= -1;
- if (fifo3 < 0) fifo3 *= -1;
- hd63484->rwp += ((fifo2 + 1) * (fifo3 + 1));
- }
+ {
+ int fifo2 = (int)hd63484->fifo[2], fifo3 = (int)hd63484->fifo[3];
+ if (fifo2 < 0) fifo2 *= -1;
+ if (fifo3 < 0) fifo3 *= -1;
+ hd63484->rwp += ((fifo2 + 1) * (fifo3 + 1));
+ }
}
- else if ((hd63484->fifo[0] & 0xf0ff) == 0x6000) /* CPY */
+ else if ((hd63484->fifo[0] & 0xf0ff) == 0x6000) /* CPY */
{
docpy16(device, hd63484->fifo[0], ((hd63484->fifo[1] & 0x00ff) << 12) | ((hd63484->fifo[2] & 0xfff0) >> 4), &hd63484->rwp, hd63484->fifo[3], hd63484->fifo[4]);
- {
- int fifo2 = (int)hd63484->fifo[2], fifo3 = (int)hd63484->fifo[3];
- if (fifo2 < 0) fifo2 *= -1;
- if (fifo3 < 0) fifo3 *= -1;
- hd63484->rwp += ((fifo2 + 1) * (fifo3 + 1));
- }
+ {
+ int fifo2 = (int)hd63484->fifo[2], fifo3 = (int)hd63484->fifo[3];
+ if (fifo2 < 0) fifo2 *= -1;
+ if (fifo3 < 0) fifo3 *= -1;
+ hd63484->rwp += ((fifo2 + 1) * (fifo3 + 1));
+ }
}
- else if ((hd63484->fifo[0] & 0xf0fc) == 0x7000) /* SCPY */
+ else if ((hd63484->fifo[0] & 0xf0fc) == 0x7000) /* SCPY */
{
docpy16(device, hd63484->fifo[0], ((hd63484->fifo[1] & 0x00ff) << 12) | ((hd63484->fifo[2] & 0xfff0) >> 4), &hd63484->rwp, hd63484->fifo[3], hd63484->fifo[4]);
- {
- int fifo2 = (int)hd63484->fifo[2], fifo3 = (int)hd63484->fifo[3];
- if (fifo2 < 0) fifo2 *= -1;
- if (fifo3 < 0) fifo3 *= -1;
- hd63484->rwp += ((fifo2 + 1) * (fifo3 + 1));
- }
+ {
+ int fifo2 = (int)hd63484->fifo[2], fifo3 = (int)hd63484->fifo[3];
+ if (fifo2 < 0) fifo2 *= -1;
+ if (fifo3 < 0) fifo3 *= -1;
+ hd63484->rwp += ((fifo2 + 1) * (fifo3 + 1));
+ }
}
- else if (hd63484->fifo[0] == 0x8000) /* AMOVE */
+ else if (hd63484->fifo[0] == 0x8000) /* AMOVE */
{
hd63484->cpx = hd63484->fifo[1];
hd63484->cpy = hd63484->fifo[2];
}
- else if (hd63484->fifo[0] == 0x8400) /* RMOVE */
+ else if (hd63484->fifo[0] == 0x8400) /* RMOVE */
{
hd63484->cpx += (INT16)hd63484->fifo[1];
hd63484->cpy += (INT16)hd63484->fifo[2];
}
- else if ((hd63484->fifo[0] & 0xff00) == 0x8800) /* ALINE */
+ else if ((hd63484->fifo[0] & 0xff00) == 0x8800) /* ALINE */
{
line(device, hd63484->cpx, hd63484->cpy, hd63484->fifo[1], hd63484->fifo[2], hd63484->fifo[0] & 0xff);
hd63484->cpx = (INT16)hd63484->fifo[1];
hd63484->cpy = (INT16)hd63484->fifo[2];
}
- else if ((hd63484->fifo[0] & 0xff00) == 0x8c00) /* RLINE */
+ else if ((hd63484->fifo[0] & 0xff00) == 0x8c00) /* RLINE */
{
line(device, hd63484->cpx, hd63484->cpy, hd63484->cpx + (INT16)hd63484->fifo[1], hd63484->cpy + (INT16)hd63484->fifo[2], hd63484->fifo[0] & 0xff);
hd63484->cpx += (INT16)hd63484->fifo[1];
hd63484->cpy += (INT16)hd63484->fifo[2];
}
- else if ((hd63484->fifo[0] & 0xfff8) == 0x9000) /* ARCT */
+ else if ((hd63484->fifo[0] & 0xfff8) == 0x9000) /* ARCT */
{
line(device, hd63484->cpx, hd63484->cpy, (INT16)hd63484->fifo[1], hd63484->cpy, hd63484->fifo[0] & 0xff);
line(device, (INT16)hd63484->fifo[1], hd63484->cpy, (INT16)hd63484->fifo[1], (INT16)hd63484->fifo[2], hd63484->fifo[0] & 0xff);
@@ -1254,7 +1254,7 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
hd63484->cpx = (INT16)hd63484->fifo[1];
hd63484->cpy = (INT16)hd63484->fifo[2];
}
- else if ((hd63484->fifo[0] & 0xfff8) == 0x9400) /* RRCT added*/
+ else if ((hd63484->fifo[0] & 0xfff8) == 0x9400) /* RRCT added*/
{
line(device, hd63484->cpx, hd63484->cpy, hd63484->cpx + (INT16)hd63484->fifo[1], hd63484->cpy, hd63484->fifo[0] & 0xff);
line(device, hd63484->cpx + (INT16)hd63484->fifo[1], hd63484->cpy, hd63484->cpx + (INT16)hd63484->fifo[1], hd63484->cpy + (INT16)hd63484->fifo[2], hd63484->fifo[0] & 0xff);
@@ -1264,7 +1264,7 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
hd63484->cpx += (INT16)hd63484->fifo[1];
hd63484->cpy += (INT16)hd63484->fifo[2];
}
- else if ((hd63484->fifo[0] & 0xfff8) == 0xa400) /* RPLG added*/
+ else if ((hd63484->fifo[0] & 0xfff8) == 0xa400) /* RPLG added*/
{
int nseg, sx, sy, ex, ey;
sx = hd63484->cpx;
@@ -1279,11 +1279,11 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
}
line(device, sx, sy, hd63484->cpx, hd63484->cpy, hd63484->fifo[0] & 7);
}
- else if ((hd63484->fifo[0] & 0xfe00) == 0xa800) /* CRCL added*/
+ else if ((hd63484->fifo[0] & 0xfe00) == 0xa800) /* CRCL added*/
{
circle(device, hd63484->cpx, hd63484->cpy, hd63484->fifo[1] & 0x1fff, hd63484->fifo[0] & 7); // only 13 bit are used for the radius
}
- else if ((hd63484->fifo[0] & 0xfff8) == 0xc000) /* AFRCT */
+ else if ((hd63484->fifo[0] & 0xfff8) == 0xc000) /* AFRCT */
{
INT16 pcx, pcy;
INT16 ax, ay, xx, yy;
@@ -1332,7 +1332,7 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
}
}
}
- else if ((hd63484->fifo[0] & 0xfff8) == 0xc400) /* RFRCT added TODO*/
+ else if ((hd63484->fifo[0] & 0xfff8) == 0xc400) /* RFRCT added TODO*/
{
line(device, hd63484->cpx, hd63484->cpy, hd63484->cpx + (INT16)hd63484->fifo[1], hd63484->cpy, hd63484->fifo[0] & 0xff);
line(device, hd63484->cpx + hd63484->fifo[1], hd63484->cpy, hd63484->cpx + hd63484->fifo[1], hd63484->cpy + hd63484->fifo[2], hd63484->fifo[0] & 0xff);
@@ -1342,15 +1342,15 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
hd63484->cpx = hd63484->cpx + (INT16)hd63484->fifo[1];
hd63484->cpy = hd63484->cpy + (INT16)hd63484->fifo[2];
}
- else if (hd63484->fifo[0] == 0xc800) /* PAINT */
+ else if (hd63484->fifo[0] == 0xc800) /* PAINT */
{
paint(device, hd63484->cpx, hd63484->cpy, hd63484->cl0);
}
- else if ((hd63484->fifo[0] & 0xfff8) == 0xcc00) /* DOT */
+ else if ((hd63484->fifo[0] & 0xfff8) == 0xcc00) /* DOT */
{
dot(device, hd63484->cpx, hd63484->cpy, hd63484->fifo[0] & 0xff, hd63484->cl0);
}
- else if ((hd63484->fifo[0] & 0xf000) == 0xd000) /* PTN (to do) */
+ else if ((hd63484->fifo[0] & 0xf000) == 0xd000) /* PTN (to do) */
{
ptn(device, hd63484->fifo[0], hd63484->psx, hd63484->psy, hd63484->pex - hd63484->psx, hd63484->pey - hd63484->psy);
@@ -1399,7 +1399,7 @@ static void hd63484_command_w(device_t *device, UINT16 cmd)
// missing
}
}
- else if ((hd63484->fifo[0] & 0xf018) == 0xe000) /* agcpy */
+ else if ((hd63484->fifo[0] & 0xf018) == 0xe000) /* agcpy */
{
agcpy(device, hd63484->fifo[0], (INT16)hd63484->fifo[1], (INT16)hd63484->fifo[2], hd63484->cpx, hd63484->cpy, hd63484->fifo[3], hd63484->fifo[4]);
@@ -1470,7 +1470,7 @@ READ16_DEVICE_HANDLER( hd63484_status_r )
// if (space.device().safe_pc() != 0xfced6 && space.device().safe_pc() != 0xfe1d6)
// logerror("%05x: HD63484 status read\n",space.device().safe_pc());
- return 0xff22 | (device->machine().rand() & 0x0004); /* write FIFO ready + command end + (read FIFO ready or read FIFO not ready) */
+ return 0xff22 | (device->machine().rand() & 0x0004); /* write FIFO ready + command end + (read FIFO ready or read FIFO not ready) */
}
WRITE16_DEVICE_HANDLER( hd63484_address_w )
@@ -1492,13 +1492,13 @@ WRITE16_DEVICE_HANDLER( hd63484_data_w )
hd63484->reg[2/2] = (hd63484->reg[2/2] & 0xf8ff) | 0x0200; // hack to set proper color depth in skattva
if (hd63484->regno & 0x80)
- hd63484->regno += 2; /* autoincrement */
+ hd63484->regno += 2; /* autoincrement */
#if LOG_COMMANDS
// logerror("PC %05x: HD63484 register %02x write %04x\n", space.device().safe_pc(), hd63484->regno, hd63484->reg[hd63484->regno/2]);
#endif
- if (hd63484->regno == 0) /* FIFO */
+ if (hd63484->regno == 0) /* FIFO */
hd63484_command_w(device, hd63484->reg[0]);
}
@@ -1611,5 +1611,3 @@ void hd63484_device::device_reset()
{
DEVICE_RESET_NAME( hd63484 )(this);
}
-
-
diff --git a/src/emu/video/hd63484.h b/src/emu/video/hd63484.h
index aa4cd95ddf6..b430321210c 100644
--- a/src/emu/video/hd63484.h
+++ b/src/emu/video/hd63484.h
@@ -66,5 +66,3 @@ DECLARE_WRITE16_DEVICE_HANDLER( hd63484_ram_w );
DECLARE_WRITE16_DEVICE_HANDLER( hd63484_regs_w );
#endif /* __HD63484_H__ */
-
-
diff --git a/src/emu/video/huc6202.c b/src/emu/video/huc6202.c
index c2b394fb50c..9b7dde457aa 100644
--- a/src/emu/video/huc6202.c
+++ b/src/emu/video/huc6202.c
@@ -75,7 +75,7 @@ READ16_MEMBER( huc6202_device::next_pixel )
}
else
{
- UINT8 prio_index = m_prio_map[ m_map_index ];
+ UINT8 prio_index = m_prio_map[ m_map_index ];
if ( m_prio[ prio_index ].dev0_enabled && data_0 != huc6270_device::HUC6270_SPRITE )
{
@@ -83,11 +83,11 @@ READ16_MEMBER( huc6202_device::next_pixel )
{
switch ( m_prio[ prio_index ].prio_type )
{
- case 0: /* Back - BG1 SP1 BG0 SP0 - Front */
+ case 0: /* Back - BG1 SP1 BG0 SP0 - Front */
data = ( data_0 & 0x0F ) ? data_0 : data_1;
break;
- case 1: /* Back - BG1 BG0 SP1 SP0 - Front */
+ case 1: /* Back - BG1 BG0 SP1 SP0 - Front */
if ( data_0 > huc6270_device::HUC6270_SPRITE )
{
/* Device 0 sprite */
@@ -105,7 +105,7 @@ READ16_MEMBER( huc6202_device::next_pixel )
}
break;
- case 2: /* Back - BG0 + SP1 => BG0 - Front
+ case 2: /* Back - BG0 + SP1 => BG0 - Front
BG0 + BG1 => BG0
BG1 + SP0 => BG1
SP0 + SP1 => SP0
@@ -138,7 +138,7 @@ READ16_MEMBER( huc6202_device::next_pixel )
}
break;
- case 3: /* ?? */
+ case 3: /* ?? */
break;
}
}
@@ -191,7 +191,7 @@ READ8_MEMBER( huc6202_device::read )
switch ( offset & 7 )
{
- case 0x00: /* Priority register #0 */
+ case 0x00: /* Priority register #0 */
data = ( m_prio[0].prio_type << 2 ) |
( m_prio[0].dev0_enabled ? 0x01 : 0 ) |
( m_prio[0].dev1_enabled ? 0x02 : 0 ) |
@@ -200,7 +200,7 @@ READ8_MEMBER( huc6202_device::read )
( m_prio[1].dev1_enabled ? 0x20 : 0 );
break;
- case 0x01: /* Priority register #1 */
+ case 0x01: /* Priority register #1 */
data = ( m_prio[2].prio_type << 2 ) |
( m_prio[2].dev0_enabled ? 0x01 : 0 ) |
( m_prio[2].dev1_enabled ? 0x02 : 0 ) |
@@ -209,19 +209,19 @@ READ8_MEMBER( huc6202_device::read )
( m_prio[3].dev1_enabled ? 0x20 : 0 );
break;
- case 0x02: /* Window 1 LSB */
+ case 0x02: /* Window 1 LSB */
data = m_window1 & 0xFF;
break;
- case 0x03: /* Window 1 MSB */
+ case 0x03: /* Window 1 MSB */
data = ( m_window1 >> 8 ) & 0xFF;
break;
- case 0x04: /* Window 2 LSB */
+ case 0x04: /* Window 2 LSB */
data = m_window2 & 0xFF;
break;
- case 0x05: /* Window 2 MSB */
+ case 0x05: /* Window 2 MSB */
data = ( m_window2 >> 8 ) & 0xFF;
break;
}
@@ -234,7 +234,7 @@ WRITE8_MEMBER( huc6202_device::write )
{
switch ( offset & 7 )
{
- case 0x00: /* Priority register #0 */
+ case 0x00: /* Priority register #0 */
m_prio[0].dev0_enabled = data & 0x01;
m_prio[0].dev1_enabled = data & 0x02;
m_prio[0].prio_type = ( data >> 2 ) & 0x03;
@@ -243,7 +243,7 @@ WRITE8_MEMBER( huc6202_device::write )
m_prio[1].prio_type = ( data >> 6 ) & 0x03;
break;
- case 0x01: /* Priority register #1 */
+ case 0x01: /* Priority register #1 */
m_prio[2].dev0_enabled = data & 0x01;
m_prio[2].dev1_enabled = data & 0x02;
m_prio[2].prio_type = ( data >> 2 ) & 0x03;
@@ -252,27 +252,27 @@ WRITE8_MEMBER( huc6202_device::write )
m_prio[3].prio_type = ( data >> 6 ) & 0x03;
break;
- case 0x02: /* Window 1 LSB */
+ case 0x02: /* Window 1 LSB */
m_window1 = ( m_window1 & 0xFF00 ) | data;
m_map_dirty = 1;
break;
- case 0x03: /* Window 1 MSB */
+ case 0x03: /* Window 1 MSB */
m_window1 = ( ( m_window1 & 0x00FF ) | ( data << 8 ) ) & 0x3FF;
m_map_dirty = 1;
break;
- case 0x04: /* Window 2 LSB */
+ case 0x04: /* Window 2 LSB */
m_window2 = ( m_window2 & 0xFF00 ) | data;
m_map_dirty = 1;
break;
- case 0x05: /* Window 2 MSB */
+ case 0x05: /* Window 2 MSB */
m_window2 = ( ( m_window2 & 0x00FF ) | ( data << 8 ) ) & 0x3FF;
m_map_dirty = 1;
break;
- case 0x06: /* I/O select */
+ case 0x06: /* I/O select */
m_io_device = data & 0x01;
break;
}
@@ -377,4 +377,3 @@ void huc6202_device::device_reset()
m_window2 = 0;
m_io_device = 0;
}
-
diff --git a/src/emu/video/huc6202.h b/src/emu/video/huc6202.h
index 127426454ad..343786d2fbb 100644
--- a/src/emu/video/huc6202.h
+++ b/src/emu/video/huc6202.h
@@ -10,37 +10,37 @@
#include "emu.h"
-#define MCFG_HUC6202_ADD( _tag, _intrf ) \
- MCFG_DEVICE_ADD( _tag, HUC6202, 0 ) \
+#define MCFG_HUC6202_ADD( _tag, _intrf ) \
+ MCFG_DEVICE_ADD( _tag, HUC6202, 0 ) \
MCFG_DEVICE_CONFIG( _intrf )
struct huc6202_interface
{
/* First gfx input device */
- devcb_read16 device_0_next_pixel;
+ devcb_read16 device_0_next_pixel;
/* TODO: Choose proper types */
/* Callback function to get time until next event */
- devcb_read16 get_time_til_next_event_0;
+ devcb_read16 get_time_til_next_event_0;
- devcb_write_line vsync_0_changed;
- devcb_write_line hsync_0_changed;
- devcb_read8 read_0;
- devcb_write8 write_0;
+ devcb_write_line vsync_0_changed;
+ devcb_write_line hsync_0_changed;
+ devcb_read8 read_0;
+ devcb_write8 write_0;
/* Second gfx input device */
- devcb_read16 device_1_next_pixel;
+ devcb_read16 device_1_next_pixel;
/* TODO: Choose proper types */
/* Callback function to get time until next event */
- devcb_read16 get_time_til_next_event_1;
+ devcb_read16 get_time_til_next_event_1;
- devcb_write_line vsync_1_changed;
- devcb_write_line hsync_1_changed;
- devcb_read8 read_1;
- devcb_write8 write_1;
+ devcb_write_line vsync_1_changed;
+ devcb_write_line hsync_1_changed;
+ devcb_read8 read_1;
+ devcb_write8 write_1;
};
@@ -67,30 +67,30 @@ protected:
private:
/* callbacks */
- devcb_resolved_read16 m_next_pixel_0;
- devcb_resolved_read16 m_get_time_til_next_event_0;
- devcb_resolved_write_line m_hsync_changed_0;
- devcb_resolved_write_line m_vsync_changed_0;
- devcb_resolved_read8 m_read_0;
- devcb_resolved_write8 m_write_0;
- devcb_resolved_read16 m_next_pixel_1;
- devcb_resolved_read16 m_get_time_til_next_event_1;
- devcb_resolved_write_line m_hsync_changed_1;
- devcb_resolved_write_line m_vsync_changed_1;
- devcb_resolved_read8 m_read_1;
- devcb_resolved_write8 m_write_1;
+ devcb_resolved_read16 m_next_pixel_0;
+ devcb_resolved_read16 m_get_time_til_next_event_0;
+ devcb_resolved_write_line m_hsync_changed_0;
+ devcb_resolved_write_line m_vsync_changed_0;
+ devcb_resolved_read8 m_read_0;
+ devcb_resolved_write8 m_write_0;
+ devcb_resolved_read16 m_next_pixel_1;
+ devcb_resolved_read16 m_get_time_til_next_event_1;
+ devcb_resolved_write_line m_hsync_changed_1;
+ devcb_resolved_write_line m_vsync_changed_1;
+ devcb_resolved_read8 m_read_1;
+ devcb_resolved_write8 m_write_1;
struct {
- UINT8 prio_type;
- UINT8 dev0_enabled;
- UINT8 dev1_enabled;
+ UINT8 prio_type;
+ UINT8 dev0_enabled;
+ UINT8 dev1_enabled;
} m_prio[4];
- UINT16 m_window1;
- UINT16 m_window2;
- int m_io_device;
- int m_map_index;
- int m_map_dirty;
- UINT8 m_prio_map[512];
+ UINT16 m_window1;
+ UINT16 m_window2;
+ int m_io_device;
+ int m_map_index;
+ int m_map_dirty;
+ UINT8 m_prio_map[512];
};
@@ -99,4 +99,3 @@ extern const device_type HUC6202;
#endif
-
diff --git a/src/emu/video/huc6260.c b/src/emu/video/huc6260.c
index a543c28ce35..7b25272029a 100644
--- a/src/emu/video/huc6260.c
+++ b/src/emu/video/huc6260.c
@@ -18,10 +18,10 @@
#include "profiler.h"
#include "huc6260.h"
-#define LOG 0
+#define LOG 0
-#define HUC6260_HSYNC_LENGTH 237
-#define HUC6260_HSYNC_START ( HUC6260_WPF - HUC6260_HSYNC_LENGTH )
+#define HUC6260_HSYNC_LENGTH 237
+#define HUC6260_HSYNC_START ( HUC6260_WPF - HUC6260_HSYNC_LENGTH )
PALETTE_INIT( huc6260 )
@@ -96,7 +96,7 @@ void huc6260_device::device_timer(emu_timer &timer, device_timer_id id, int para
switch( h )
{
- case HUC6260_HSYNC_START: /* Start of HSync */
+ case HUC6260_HSYNC_START: /* Start of HSync */
m_hsync_changed( 0 );
// if ( v == 0 )
// {
@@ -117,14 +117,14 @@ void huc6260_device::device_timer(emu_timer &timer, device_timer_id id, int para
// }
break;
- case 0: /* End of HSync */
+ case 0: /* End of HSync */
m_hsync_changed( 1 );
m_pixel_clock = 0;
v = ( v + 1 ) % m_height;
bitmap_line = &m_bmp->pix16(v);
break;
- case HUC6260_HSYNC_START + 30: /* End/Start of VSync */
+ case HUC6260_HSYNC_START + 30: /* End/Start of VSync */
if ( v>= m_height - 4 )
{
m_vsync_changed( ( v >= m_height - 4 && v < m_height - 1 ) ? 0 : 1 );
@@ -201,11 +201,11 @@ READ8_MEMBER( huc6260_device::read )
switch ( offset & 7 )
{
- case 0x04: /* Color table data LSB */
+ case 0x04: /* Color table data LSB */
data = m_palette[ m_address ] & 0xFF;
break;
- case 0x05: /* Color table data MSB */
+ case 0x05: /* Color table data MSB */
data = 0xFE | ( m_palette[ m_address ] >> 8 );
/* Increment internal address */
@@ -221,25 +221,25 @@ WRITE8_MEMBER( huc6260_device::write )
{
switch ( offset & 7 )
{
- case 0x00: /* Control register */
+ case 0x00: /* Control register */
m_greyscales = data & 0x80;
m_blur = data & 0x04;
m_pixels_per_clock = ( data & 0x02 ) ? 2 : ( ( data & 0x01 ) ? 3 : 4 );
break;
- case 0x02: /* Color table address LSB */
+ case 0x02: /* Color table address LSB */
m_address = ( ( m_address & 0xFF00 ) | data ) & 0x1FF;
break;
- case 0x03: /* Color table address MSB */
+ case 0x03: /* Color table address MSB */
m_address = ( ( m_address & 0x00FF ) | ( data << 8 ) ) & 0x1FF;
break;
- case 0x04: /* Color table data LSB */
+ case 0x04: /* Color table data LSB */
m_palette[ m_address ] = ( ( m_palette[ m_address ] & 0xFF00 ) | data ) & 0x1FF;
break;
- case 0x05: /* Color table data MSB */
+ case 0x05: /* Color table data MSB */
m_palette[ m_address ] = ( ( m_palette[ m_address ] & 0x00FF ) | ( data << 8 ) ) & 0x1FF;
/* Increment internal address */
@@ -296,4 +296,3 @@ void huc6260_device::device_reset()
m_last_h = m_screen->hpos();
m_timer->adjust( m_screen->time_until_pos( ( m_screen->vpos() + 1 ) % 263, 0 ) );
}
-
diff --git a/src/emu/video/huc6260.h b/src/emu/video/huc6260.h
index df79dbd0d75..3046fa0b454 100644
--- a/src/emu/video/huc6260.h
+++ b/src/emu/video/huc6260.h
@@ -11,18 +11,18 @@
#include "emu.h"
-#define HUC6260_PALETTE_SIZE 1024
+#define HUC6260_PALETTE_SIZE 1024
/* Screen timing stuff */
-#define HUC6260_WPF 1365 /* width of a line in frame including blanking areas */
-#define HUC6260_LPF 263 /* max number of lines in a single frame */
+#define HUC6260_WPF 1365 /* width of a line in frame including blanking areas */
+#define HUC6260_LPF 263 /* max number of lines in a single frame */
PALETTE_INIT( huc6260 );
-#define MCFG_HUC6260_ADD( _tag, clock, _intrf ) \
- MCFG_DEVICE_ADD( _tag, HUC6260, clock ) \
+#define MCFG_HUC6260_ADD( _tag, clock, _intrf ) \
+ MCFG_DEVICE_ADD( _tag, HUC6260, clock ) \
MCFG_DEVICE_CONFIG( _intrf )
@@ -32,21 +32,21 @@ struct huc6260_interface
const char *screen_tag;
/* Callback function to retrieve pixel data */
- devcb_read16 get_next_pixel_data;
+ devcb_read16 get_next_pixel_data;
/* TODO: Choose proper types */
/* Callback function to get time until next event */
- devcb_read16 get_time_til_next_event;
+ devcb_read16 get_time_til_next_event;
/* Callback function which gets called when vsync changes */
- devcb_write_line vsync_changed;
+ devcb_write_line vsync_changed;
/* Callback function which gets called when hsync changes */
- devcb_write_line hsync_changed;
+ devcb_write_line hsync_changed;
};
-class huc6260_device : public device_t,
+class huc6260_device : public device_t,
public huc6260_interface
{
public:
@@ -66,26 +66,26 @@ protected:
private:
screen_device *m_screen;
- int m_last_h;
- int m_last_v;
- int m_height;
+ int m_last_h;
+ int m_last_v;
+ int m_height;
/* callbacks */
- devcb_resolved_read16 m_get_next_pixel_data;
- devcb_resolved_read16 m_get_time_til_next_event;
- devcb_resolved_write_line m_hsync_changed;
- devcb_resolved_write_line m_vsync_changed;
-
- UINT16 m_palette[512];
- UINT16 m_address;
- UINT8 m_greyscales; /* Should the HuC6260 output grey or color graphics */
- UINT8 m_blur; /* Should the edges of graphics be blurred/Select screen height 0=262, 1=263 */
- UINT8 m_pixels_per_clock; /* Number of pixels to output per colour clock */
- UINT16 m_pixel_data;
- UINT8 m_pixel_clock;
-
- emu_timer *m_timer;
- bitmap_ind16 *m_bmp;
+ devcb_resolved_read16 m_get_next_pixel_data;
+ devcb_resolved_read16 m_get_time_til_next_event;
+ devcb_resolved_write_line m_hsync_changed;
+ devcb_resolved_write_line m_vsync_changed;
+
+ UINT16 m_palette[512];
+ UINT16 m_address;
+ UINT8 m_greyscales; /* Should the HuC6260 output grey or color graphics */
+ UINT8 m_blur; /* Should the edges of graphics be blurred/Select screen height 0=262, 1=263 */
+ UINT8 m_pixels_per_clock; /* Number of pixels to output per colour clock */
+ UINT16 m_pixel_data;
+ UINT8 m_pixel_clock;
+
+ emu_timer *m_timer;
+ bitmap_ind16 *m_bmp;
};
diff --git a/src/emu/video/huc6261.c b/src/emu/video/huc6261.c
index b9d3b0b61be..6c2f9985b69 100644
--- a/src/emu/video/huc6261.c
+++ b/src/emu/video/huc6261.c
@@ -15,10 +15,10 @@
#include "profiler.h"
#include "huc6261.h"
-#define LOG 0
+#define LOG 0
-#define HUC6261_HSYNC_LENGTH 237
-#define HUC6261_HSYNC_START ( HUC6261_WPF - HUC6261_HSYNC_LENGTH )
+#define HUC6261_HSYNC_LENGTH 237
+#define HUC6261_HSYNC_START ( HUC6261_WPF - HUC6261_HSYNC_LENGTH )
const device_type HUC6261 = &device_creator<huc6261_device>;
@@ -106,7 +106,7 @@ void huc6261_device::device_timer(emu_timer &timer, device_timer_id id, int para
switch( h )
{
- case HUC6261_HSYNC_START: /* Start of HSync */
+ case HUC6261_HSYNC_START: /* Start of HSync */
m_huc6270_a->hsync_changed( 0 );
m_huc6270_b->hsync_changed( 0 );
// if ( v == 0 )
@@ -128,7 +128,7 @@ void huc6261_device::device_timer(emu_timer &timer, device_timer_id id, int para
// }
break;
- case 0: /* End of HSync */
+ case 0: /* End of HSync */
m_huc6270_a->hsync_changed( 1 );
m_huc6270_b->hsync_changed( 1 );
m_pixel_clock = 0;
@@ -136,7 +136,7 @@ void huc6261_device::device_timer(emu_timer &timer, device_timer_id id, int para
bitmap_line = &m_bmp->pix32(v);
break;
- case HUC6261_HSYNC_START + 30: /* End/Start of VSync */
+ case HUC6261_HSYNC_START + 30: /* End/Start of VSync */
if ( v>= m_height - 4 )
{
int vsync = ( v >= m_height - 4 && v < m_height - 1 ) ? 0 : 1;
@@ -444,4 +444,3 @@ void huc6261_device::device_reset()
m_last_h = m_screen->hpos();
m_timer->adjust( m_screen->time_until_pos( ( m_screen->vpos() + 1 ) % 263, 0 ) );
}
-
diff --git a/src/emu/video/huc6261.h b/src/emu/video/huc6261.h
index cc6594cc323..55a2fbd0469 100644
--- a/src/emu/video/huc6261.h
+++ b/src/emu/video/huc6261.h
@@ -13,12 +13,12 @@
/* Screen timing stuff */
-#define HUC6261_WPF 1365 /* width of a line in frame including blanking areas */
-#define HUC6261_LPF 263 /* max number of lines in a single frame */
+#define HUC6261_WPF 1365 /* width of a line in frame including blanking areas */
+#define HUC6261_LPF 263 /* max number of lines in a single frame */
-#define MCFG_HUC6261_ADD( _tag, clock, _intrf ) \
- MCFG_DEVICE_ADD( _tag, HUC6261, clock ) \
+#define MCFG_HUC6261_ADD( _tag, clock, _intrf ) \
+ MCFG_DEVICE_ADD( _tag, HUC6261, clock ) \
MCFG_DEVICE_CONFIG( _intrf )
@@ -33,7 +33,7 @@ struct huc6261_interface
};
-class huc6261_device : public device_t,
+class huc6261_device : public device_t,
public huc6261_interface
{
public:
@@ -57,24 +57,24 @@ private:
screen_device *m_screen;
huc6270_device *m_huc6270_a;
huc6270_device *m_huc6270_b;
- int m_last_h;
- int m_last_v;
- int m_height;
-
- UINT16 m_palette[512];
- UINT16 m_address;
- UINT16 m_palette_latch;
- UINT16 m_register;
- UINT16 m_control;
- UINT8 m_priority[7];
-
- UINT8 m_pixels_per_clock; /* Number of pixels to output per colour clock */
- UINT16 m_pixel_data;
- UINT8 m_pixel_clock;
-
- emu_timer *m_timer;
- bitmap_rgb32 *m_bmp;
- INT32 m_uv_lookup[65536][3];
+ int m_last_h;
+ int m_last_v;
+ int m_height;
+
+ UINT16 m_palette[512];
+ UINT16 m_address;
+ UINT16 m_palette_latch;
+ UINT16 m_register;
+ UINT16 m_control;
+ UINT8 m_priority[7];
+
+ UINT8 m_pixels_per_clock; /* Number of pixels to output per colour clock */
+ UINT16 m_pixel_data;
+ UINT8 m_pixel_clock;
+
+ emu_timer *m_timer;
+ bitmap_rgb32 *m_bmp;
+ INT32 m_uv_lookup[65536][3];
};
diff --git a/src/emu/video/huc6270.c b/src/emu/video/huc6270.c
index 76b9f3e5bdd..148f28b66d5 100644
--- a/src/emu/video/huc6270.c
+++ b/src/emu/video/huc6270.c
@@ -53,7 +53,7 @@ TODO
#include "profiler.h"
#include "huc6270.h"
-#define LOG 0
+#define LOG 0
enum {
MAWR = 0x00,
@@ -78,13 +78,13 @@ enum {
/* Bits in the VDC status register */
-#define HUC6270_BSY 0x40 /* Set when the VDC accesses VRAM */
-#define HUC6270_VD 0x20 /* Set when in the vertical blanking period */
-#define HUC6270_DV 0x10 /* Set when a VRAM > VRAM DMA transfer is done */
-#define HUC6270_DS 0x08 /* Set when a VRAM > SATB DMA transfer is done */
-#define HUC6270_RR 0x04 /* Set when the current scanline equals the RCR register */
-#define HUC6270_OR 0x02 /* Set when there are more than 16 sprites on a line */
-#define HUC6270_CR 0x01 /* Set when sprite #0 overlaps with another sprite */
+#define HUC6270_BSY 0x40 /* Set when the VDC accesses VRAM */
+#define HUC6270_VD 0x20 /* Set when in the vertical blanking period */
+#define HUC6270_DV 0x10 /* Set when a VRAM > VRAM DMA transfer is done */
+#define HUC6270_DS 0x08 /* Set when a VRAM > SATB DMA transfer is done */
+#define HUC6270_RR 0x04 /* Set when the current scanline equals the RCR register */
+#define HUC6270_OR 0x02 /* Set when there are more than 16 sprites on a line */
+#define HUC6270_CR 0x01 /* Set when sprite #0 overlaps with another sprite */
const device_type HUC6270 = &device_creator<huc6270_device>;
@@ -308,8 +308,8 @@ inline void huc6270_device::handle_vblank()
}
/* Should we initiate a VRAM->SATB DMA transfer.
- The timing for this is incorrect.
- */
+ The timing for this is incorrect.
+ */
if ( m_dvssr_written || ( m_dcr & 0x10 ) )
{
int i;
@@ -512,8 +512,8 @@ WRITE_LINE_MEMBER( huc6270_device::vsync_changed )
handle_vblank();
/* Should we perform VRAM-VRAM dma.
- The timing for this is incorrect.
- */
+ The timing for this is incorrect.
+ */
if ( m_dma_enabled )
{
int desr_inc = ( m_dcr & 0x0008 ) ? -1 : +1;
@@ -593,7 +593,7 @@ READ8_MEMBER( huc6270_device::read )
switch ( offset & 3 )
{
- case 0x00: /* status */
+ case 0x00: /* status */
data = m_status;
m_status &= ~( HUC6270_VD | HUC6270_DV | HUC6270_RR | HUC6270_CR | HUC6270_OR | HUC6270_DS );
m_irq_changed( CLEAR_LINE );
@@ -622,31 +622,31 @@ WRITE8_MEMBER( huc6270_device::write )
switch ( offset & 3 )
{
- case 0x00: /* VDC register select */
+ case 0x00: /* VDC register select */
m_register_index = data & 0x1F;
break;
- case 0x02: /* VDC data LSB */
+ case 0x02: /* VDC data LSB */
switch ( m_register_index )
{
- case MAWR: /* memory address write register LSB */
+ case MAWR: /* memory address write register LSB */
m_mawr = ( m_mawr & 0xFF00 ) | data;
break;
- case MARR: /* memory address read register LSB */
+ case MARR: /* memory address read register LSB */
m_marr = ( m_marr & 0xFF00 ) | data;
m_vrr = m_vram[ m_marr & m_vram_mask ];
break;
- case VxR: /* vram write data LSB */
+ case VxR: /* vram write data LSB */
m_vwr = ( m_vwr & 0xFF00 ) | data;
break;
- case CR: /* control register LSB */
+ case CR: /* control register LSB */
m_cr = ( m_cr & 0xFF00 ) | data;
break;
- case RCR: /* raster compare register LSB */
+ case RCR: /* raster compare register LSB */
m_rcr = ( m_rcr & 0x0300 ) | data;
//printf("%s: RCR set to %03x\n", machine().describe_context(), m_rcr);
// if ( m_raster_count == m_rcr && m_cr & 0x04 )
@@ -657,87 +657,87 @@ WRITE8_MEMBER( huc6270_device::write )
//if (LOG) printf("%04x: RCR (%03x) written at %d,%d\n", activecpu_get_pc(), huc6270->m_rcr, video_screen_get_vpos(device->machine->primary_screen), video_screen_get_hpos(device->machine->primary_screen) );
break;
- case BXR: /* background x-scroll register LSB */
+ case BXR: /* background x-scroll register LSB */
m_bxr = ( m_bxr & 0x0300 ) | data;
//if (LOG) printf("*********************** BXR written %d at %d,%d\n", m_bxr, video_screen_get_vpos(device->machine->primary_screen), video_screen_get_hpos(device->machine->primary_screen) );
break;
- case BYR: /* background y-scroll register LSB */
+ case BYR: /* background y-scroll register LSB */
m_byr = ( m_byr & 0x0100 ) | data;
m_byr_latched = m_byr;
//if (LOG) printf("******************** BYR written %d at %d,%d\n", huc6270->m_byr, video_screen_get_vpos(device->machine->primary_screen), video_screen_get_hpos(device->machine->primary_screen) );
break;
- case MWR: /* memory width register LSB */
+ case MWR: /* memory width register LSB */
m_mwr = ( m_mwr & 0xFF00 ) | data;
break;
- case HSR: /* horizontal sync register LSB */
+ case HSR: /* horizontal sync register LSB */
m_hsr = ( m_hsr & 0xFF00 ) | data;
break;
- case HDR: /* horizontal display register LSB */
+ case HDR: /* horizontal display register LSB */
m_hdr = ( m_hdr & 0xFF00 ) | data;
break;
- case VPR: /* vertical sync register LSB */
+ case VPR: /* vertical sync register LSB */
m_vpr = ( m_vpr & 0xFF00 ) | data;
break;
- case VDW: /* vertical display register LSB */
+ case VDW: /* vertical display register LSB */
m_vdw = ( m_vdw & 0xFF00 ) | data;
break;
- case VCR: /* vertical display end position register LSB */
+ case VCR: /* vertical display end position register LSB */
m_vcr = ( m_vcr & 0xFF00 ) | data;
break;
- case DCR: /* DMA control register LSB */
+ case DCR: /* DMA control register LSB */
m_dcr = ( m_dcr & 0xFF00 ) | data;
break;
- case SOUR: /* DMA source address register LSB */
+ case SOUR: /* DMA source address register LSB */
m_sour = ( m_sour & 0xFF00 ) | data;
break;
- case DESR: /* DMA destination address register LSB */
+ case DESR: /* DMA destination address register LSB */
m_desr = ( m_desr & 0xFF00 ) | data;
break;
- case LENR: /* DMA length register LSB */
+ case LENR: /* DMA length register LSB */
m_lenr = ( m_lenr & 0xFF00 ) | data;
break;
- case DVSSR: /* Sprite attribute table LSB */
+ case DVSSR: /* Sprite attribute table LSB */
m_dvssr = ( m_dvssr & 0xFF00 ) | data;
m_dvssr_written = 1;
break;
}
break;
- case 0x03: /* VDC data MSB */
+ case 0x03: /* VDC data MSB */
switch ( m_register_index )
{
- case MAWR: /* memory address write register MSB */
+ case MAWR: /* memory address write register MSB */
m_mawr = ( m_mawr & 0x00FF ) | ( data << 8 );
break;
- case MARR: /* memory address read register MSB */
+ case MARR: /* memory address read register MSB */
m_marr = ( m_marr & 0x00FF ) | ( data << 8 );
m_vrr = m_vram[ m_marr & m_vram_mask ];
break;
- case VxR: /* vram write data MSB */
+ case VxR: /* vram write data MSB */
m_vwr = ( m_vwr & 0x00FF ) | ( data << 8 );
m_vram[ m_mawr & m_vram_mask ] = m_vwr;
m_mawr += vram_increments[ ( m_cr >> 11 ) & 3 ];
break;
- case CR: /* control register MSB */
+ case CR: /* control register MSB */
m_cr = ( m_cr & 0x00FF ) | ( data << 8 );
break;
- case RCR: /* raster compare register MSB */
+ case RCR: /* raster compare register MSB */
m_rcr = ( m_rcr & 0x00FF ) | ( ( data & 0x03 ) << 8 );
//printf("%s: RCR set to %03x\n", machine().describe_context(), m_rcr);
// if ( m_raster_count == m_rcr && m_cr & 0x04 )
@@ -747,58 +747,58 @@ WRITE8_MEMBER( huc6270_device::write )
// }
break;
- case BXR: /* background x-scroll register MSB */
+ case BXR: /* background x-scroll register MSB */
m_bxr = ( m_bxr & 0x00FF ) | ( ( data & 0x03 ) << 8 );
break;
- case BYR: /* background y-scroll register MSB */
+ case BYR: /* background y-scroll register MSB */
m_byr = ( m_byr & 0x00FF ) | ( ( data & 0x01 ) << 8 );
m_byr_latched = m_byr;
break;
- case MWR: /* memory width register MSB */
+ case MWR: /* memory width register MSB */
m_mwr = ( m_mwr & 0x00FF ) | ( data << 8 );
break;
- case HSR: /* horizontal sync register MSB */
+ case HSR: /* horizontal sync register MSB */
m_hsr = ( m_hsr & 0x00FF ) | ( data << 8 );
break;
- case HDR: /* horizontal display register MSB */
+ case HDR: /* horizontal display register MSB */
m_hdr = ( m_hdr & 0x00FF ) | ( data << 8 );
break;
- case VPR: /* vertical sync register MSB */
+ case VPR: /* vertical sync register MSB */
m_vpr = ( m_vpr & 0x00FF ) | ( data << 8 );
break;
- case VDW: /* vertical display register MSB */
+ case VDW: /* vertical display register MSB */
m_vdw = ( m_vdw & 0x00FF ) | ( data << 8 );
break;
- case VCR: /* vertical display end position register MSB */
+ case VCR: /* vertical display end position register MSB */
m_vcr = ( m_vcr & 0x00FF ) | ( data << 8 );
break;
- case DCR: /* DMA control register MSB */
+ case DCR: /* DMA control register MSB */
m_dcr = ( m_dcr & 0x00FF ) | ( data << 8 );
break;
- case SOUR: /* DMA source address register MSB */
+ case SOUR: /* DMA source address register MSB */
m_sour = ( m_sour & 0x00FF ) | ( data << 8 );
break;
- case DESR: /* DMA destination address register MSB */
+ case DESR: /* DMA destination address register MSB */
m_desr = ( m_desr & 0x00FF ) | ( data << 8 );
break;
- case LENR: /* DMA length register MSB */
+ case LENR: /* DMA length register MSB */
m_lenr = ( m_lenr & 0x00FF ) | ( data << 8 );
m_dma_enabled = 1;
//logerror("DMA is not supported yet.\n");
break;
- case DVSSR: /* Sprite attribute table MSB */
+ case DVSSR: /* Sprite attribute table MSB */
m_dvssr = ( m_dvssr & 0x00FF ) | ( data << 8 );
m_dvssr_written = 1;
break;
@@ -832,9 +832,9 @@ void huc6270_device::device_reset()
m_bxr = 0;
m_byr = 0;
m_mwr = 0;
- m_hsr = 0x0202; /* Take some defaults for horizontal timing */
+ m_hsr = 0x0202; /* Take some defaults for horizontal timing */
m_hdr = 0x041f;
- m_vpr = 0x0f02; /* Take some defaults for vertical timing */
+ m_vpr = 0x0f02; /* Take some defaults for vertical timing */
m_vdw = 0x00ef;
m_vcr = 0x0004;
m_dcr = 0;
@@ -847,4 +847,3 @@ void huc6270_device::device_reset()
m_satb_countdown = 0;
m_raster_count = 0x4000;
}
-
diff --git a/src/emu/video/huc6270.h b/src/emu/video/huc6270.h
index 359a53e8184..cae500063c7 100644
--- a/src/emu/video/huc6270.h
+++ b/src/emu/video/huc6270.h
@@ -25,21 +25,21 @@ enum huc6270_h_state {
};
-#define MCFG_HUC6270_ADD( _tag, _intrf ) \
- MCFG_DEVICE_ADD( _tag, HUC6270, 0 ) \
+#define MCFG_HUC6270_ADD( _tag, _intrf ) \
+ MCFG_DEVICE_ADD( _tag, HUC6270, 0 ) \
MCFG_DEVICE_CONFIG( _intrf )
struct huc6270_interface
{
/* Size of Video ram (mandatory) */
- UINT32 vram_size;
+ UINT32 vram_size;
/* Callback for when the irq line may have changed (mandatory) */
- devcb_write_line irq_changed;
+ devcb_write_line irq_changed;
};
-class huc6270_device : public device_t,
+class huc6270_device : public device_t,
public huc6270_interface
{
public:
@@ -75,38 +75,38 @@ protected:
private:
/* Callbacks */
- devcb_resolved_write_line m_irq_changed;
+ devcb_resolved_write_line m_irq_changed;
- UINT8 m_register_index;
+ UINT8 m_register_index;
/* HuC6270 registers */
- UINT16 m_mawr;
- UINT16 m_marr;
- UINT16 m_vrr;
- UINT16 m_vwr;
- UINT16 m_cr;
- UINT16 m_rcr;
- UINT16 m_bxr;
- UINT16 m_byr;
- UINT16 m_mwr;
- UINT16 m_hsr;
- UINT16 m_hdr;
- UINT16 m_vpr;
- UINT16 m_vdw;
- UINT16 m_vcr;
- UINT16 m_dcr;
- UINT16 m_sour;
- UINT16 m_desr;
- UINT16 m_lenr;
- UINT16 m_dvssr;
- UINT8 m_status;
+ UINT16 m_mawr;
+ UINT16 m_marr;
+ UINT16 m_vrr;
+ UINT16 m_vwr;
+ UINT16 m_cr;
+ UINT16 m_rcr;
+ UINT16 m_bxr;
+ UINT16 m_byr;
+ UINT16 m_mwr;
+ UINT16 m_hsr;
+ UINT16 m_hdr;
+ UINT16 m_vpr;
+ UINT16 m_vdw;
+ UINT16 m_vcr;
+ UINT16 m_dcr;
+ UINT16 m_sour;
+ UINT16 m_desr;
+ UINT16 m_lenr;
+ UINT16 m_dvssr;
+ UINT8 m_status;
/* To keep track of external hsync and vsync signals */
int m_hsync;
int m_vsync;
/* internal variables */
- huc6270_v_state m_vert_state;
+ huc6270_v_state m_vert_state;
huc6270_h_state m_horz_state;
int m_vd_triggered;
int m_vert_to_go;
@@ -124,14 +124,14 @@ private:
UINT16 m_bat_column;
UINT8 m_bat_tile_row[8];
/* Internal sprite attribute table. SATB DMA is used to transfer data
- from VRAM to this internal table.
- */
+ from VRAM to this internal table.
+ */
UINT16 m_sat[4*64];
int m_sprites_this_line;
int m_sprite_row_index;
- UINT16 m_sprite_row[1024];
- UINT16 *m_vram;
- UINT16 m_vram_mask;
+ UINT16 m_sprite_row[1024];
+ UINT16 *m_vram;
+ UINT16 m_vram_mask;
const static UINT8 vram_increments[4];
};
@@ -141,4 +141,3 @@ extern const device_type HUC6270;
#endif
-
diff --git a/src/emu/video/huc6272.c b/src/emu/video/huc6272.c
index ec4faee84eb..1a417fb3134 100644
--- a/src/emu/video/huc6272.c
+++ b/src/emu/video/huc6272.c
@@ -65,8 +65,8 @@ inline void huc6272_device::write_dword(offs_t address, UINT32 data)
huc6272_device::huc6272_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, huc6272, "huc6272", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("videoram", ENDIANNESS_LITTLE, 32, 32, 0, NULL, *ADDRESS_MAP_NAME(huc6272_vram))
+ device_memory_interface(mconfig, *this),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 32, 32, 0, NULL, *ADDRESS_MAP_NAME(huc6272_vram))
{
}
@@ -112,21 +112,21 @@ READ32_MEMBER( huc6272_device::read )
if((offset & 1) == 0)
{
/*
- xxxx xxxx ---- ---- ---- ---- ---- ---- Sub Channel Buffer
- ---- ---- x--- ---- ---- ---- ---- ---- SCSI RST flag
- ---- ---- -x-- ---- ---- ---- ---- ---- SCSI BUSY flag
- ---- ---- --x- ---- ---- ---- ---- ---- SCSI REQ flag
- ---- ---- ---x ---- ---- ---- ---- ---- SCSI MSG flag
- ---- ---- ---- x--- ---- ---- ---- ---- SCSI CD flag
- ---- ---- ---- -x-- ---- ---- ---- ---- SCSI IO flag
- ---- ---- ---- --x- ---- ---- ---- ---- SCSI SEL flag
- ---- ---- ---- ---- -x-- ---- ---- ---- SCSI IRQ pending
- ---- ---- ---- ---- --x- ---- ---- ---- DMA IRQ pending
- ---- ---- ---- ---- ---x ---- ---- ---- CD Sub Channel IRQ pending
- ---- ---- ---- ---- ---- x--- ---- ---- Raster IRQ pending
- ---- ---- ---- ---- ---- -x-- ---- ---- ADPCM IRQ pending
- ---- ---- ---- ---- ---- ---- -xxx xxxx register read-back
- */
+ xxxx xxxx ---- ---- ---- ---- ---- ---- Sub Channel Buffer
+ ---- ---- x--- ---- ---- ---- ---- ---- SCSI RST flag
+ ---- ---- -x-- ---- ---- ---- ---- ---- SCSI BUSY flag
+ ---- ---- --x- ---- ---- ---- ---- ---- SCSI REQ flag
+ ---- ---- ---x ---- ---- ---- ---- ---- SCSI MSG flag
+ ---- ---- ---- x--- ---- ---- ---- ---- SCSI CD flag
+ ---- ---- ---- -x-- ---- ---- ---- ---- SCSI IO flag
+ ---- ---- ---- --x- ---- ---- ---- ---- SCSI SEL flag
+ ---- ---- ---- ---- -x-- ---- ---- ---- SCSI IRQ pending
+ ---- ---- ---- ---- --x- ---- ---- ---- DMA IRQ pending
+ ---- ---- ---- ---- ---x ---- ---- ---- CD Sub Channel IRQ pending
+ ---- ---- ---- ---- ---- x--- ---- ---- Raster IRQ pending
+ ---- ---- ---- ---- ---- -x-- ---- ---- ADPCM IRQ pending
+ ---- ---- ---- ---- ---- ---- -xxx xxxx register read-back
+ */
res = m_register & 0x7f;
res |= (0) << 16;
}
@@ -135,8 +135,8 @@ READ32_MEMBER( huc6272_device::read )
switch(m_register)
{
/*
- x--- ---- ---- ---- ----
- */
+ x--- ---- ---- ---- ----
+ */
case 0x0c: // KRAM load address
res = (m_kram_addr_r & 0x3ffff) | ((m_kram_inc_r & 0x1ff) << 18) | ((m_kram_page_r & 1) << 31);
break;
@@ -179,8 +179,8 @@ WRITE32_MEMBER( huc6272_device::write )
//printf("%08x DMA STATUS\n",data);
break;
/*
- ---- ---- ---- ---- ----
- */
+ ---- ---- ---- ---- ----
+ */
case 0x0c: // KRAM load address
m_kram_addr_r = (data & 0x0003ffff);
m_kram_inc_r = (data & 0x07fc0000) >> 18;
@@ -199,11 +199,11 @@ WRITE32_MEMBER( huc6272_device::write )
break;
/*
- ---x ---- ---- ---- ADPCM page setting
- ---- ---x ---- ---- RAINBOW page setting
- ---- ---- ---x ---- BG page setting
- ---- ---- ---- ---x SCSI page setting
- */
+ ---x ---- ---- ---- ADPCM page setting
+ ---- ---x ---- ---- RAINBOW page setting
+ ---- ---- ---x ---- BG page setting
+ ---- ---- ---- ---x SCSI page setting
+ */
case 0x0f:
m_page_setting = data;
break;
diff --git a/src/emu/video/huc6272.h b/src/emu/video/huc6272.h
index 114f97b8ce7..b62a588b4ff 100644
--- a/src/emu/video/huc6272.h
+++ b/src/emu/video/huc6272.h
@@ -25,7 +25,7 @@ Template for skeleton device
// ======================> huc6272_device
-class huc6272_device : public device_t,
+class huc6272_device : public device_t,
public device_memory_interface
{
public:
@@ -60,7 +60,7 @@ private:
UINT16 data[16];
}m_micro_prg;
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
};
diff --git a/src/emu/video/i8275.c b/src/emu/video/i8275.c
index 5df3167ab75..a1b0b19af23 100644
--- a/src/emu/video/i8275.c
+++ b/src/emu/video/i8275.c
@@ -12,49 +12,49 @@
#include "emu.h"
#include "i8275.h"
-#define I8275_COMMAND_RESET 0
-#define I8275_COMMAND_START_DISPLAY 1
-#define I8275_COMMAND_STOP_DISPLAY 2
-#define I8275_COMMAND_READ_LIGHT_PEN 3
-#define I8275_COMMAND_LOAD_CURSOR 4
-#define I8275_COMMAND_ENABLE_INTERRUPT 5
-#define I8275_COMMAND_DISABLE_INTERRUPT 6
-#define I8275_COMMAND_PRESET_COUNTERS 7
+#define I8275_COMMAND_RESET 0
+#define I8275_COMMAND_START_DISPLAY 1
+#define I8275_COMMAND_STOP_DISPLAY 2
+#define I8275_COMMAND_READ_LIGHT_PEN 3
+#define I8275_COMMAND_LOAD_CURSOR 4
+#define I8275_COMMAND_ENABLE_INTERRUPT 5
+#define I8275_COMMAND_DISABLE_INTERRUPT 6
+#define I8275_COMMAND_PRESET_COUNTERS 7
-#define I8275_PARAM_RESET 4
-#define I8275_PARAM_READ_LIGHT_PEN 2
-#define I8275_PARAM_LOAD_CURSOR 2
+#define I8275_PARAM_RESET 4
+#define I8275_PARAM_READ_LIGHT_PEN 2
+#define I8275_PARAM_LOAD_CURSOR 2
-#define I8275_PARAM_NONE 0
-#define I8275_PARAM_READ 1
-#define I8275_PARAM_WRITE 2
+#define I8275_PARAM_NONE 0
+#define I8275_PARAM_READ 1
+#define I8275_PARAM_WRITE 2
-#define I8275_STATUS_FIFO_OVERRUN 0x01
-#define I8275_STATUS_DMA_UNDERRUN 0x02
-#define I8275_STATUS_VIDEO_ENABLE 0x04
-#define I8275_STATUS_IMPROPER_COMMAND 0x08
-#define I8275_STATUS_LIGHT_PEN 0x10
-#define I8275_STATUS_INTERRUPT_REQUEST 0x20
-#define I8275_STATUS_INTERRUPT_ENABLE 0x40
+#define I8275_STATUS_FIFO_OVERRUN 0x01
+#define I8275_STATUS_DMA_UNDERRUN 0x02
+#define I8275_STATUS_VIDEO_ENABLE 0x04
+#define I8275_STATUS_IMPROPER_COMMAND 0x08
+#define I8275_STATUS_LIGHT_PEN 0x10
+#define I8275_STATUS_INTERRUPT_REQUEST 0x20
+#define I8275_STATUS_INTERRUPT_ENABLE 0x40
-#define I8275_ROW_TYPE_NORMAL 0
-#define I8275_ROW_TYPE_SPACED 1
+#define I8275_ROW_TYPE_NORMAL 0
+#define I8275_ROW_TYPE_SPACED 1
-#define I8275_LINE_COUNTER_MODE_0 0
-#define I8275_LINE_COUNTER_MODE_1 1
+#define I8275_LINE_COUNTER_MODE_0 0
+#define I8275_LINE_COUNTER_MODE_1 1
-#define I8275_FIELD_ATTRIBUTE_TRANSPARENT 0
-#define I8275_FIELD_ATTRIBUTE_NONTRANSPARENT 1
+#define I8275_FIELD_ATTRIBUTE_TRANSPARENT 0
+#define I8275_FIELD_ATTRIBUTE_NONTRANSPARENT 1
-#define I8275_CURSOR_BLINK_REVERSED 0
-#define I8275_CURSOR_BLINK_UNDERLINE 1
-#define I8275_CURSOR_NONBLINK_REVERSED 2
-#define I8275_CURSOR_NONBLINK_UNDERLINE 3
+#define I8275_CURSOR_BLINK_REVERSED 0
+#define I8275_CURSOR_BLINK_UNDERLINE 1
+#define I8275_CURSOR_NONBLINK_REVERSED 2
+#define I8275_CURSOR_NONBLINK_UNDERLINE 3
-#define VERBOSE 1
+#define VERBOSE 1
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
struct i8275_t
@@ -179,7 +179,7 @@ WRITE8_MEMBER( i8275_device::write )
m_num_of_params = I8275_PARAM_NONE;
m_param_type = I8275_PARAM_NONE;
switch(m_current_command) {
- case I8275_COMMAND_RESET :
+ case I8275_COMMAND_RESET :
m_num_of_params = I8275_PARAM_RESET;
m_param_type = I8275_PARAM_WRITE;
/* set status register */
@@ -202,11 +202,11 @@ WRITE8_MEMBER( i8275_device::write )
m_num_of_params = I8275_PARAM_READ_LIGHT_PEN;
m_param_type = I8275_PARAM_READ;
break;
- case I8275_COMMAND_LOAD_CURSOR :
+ case I8275_COMMAND_LOAD_CURSOR :
m_num_of_params = I8275_PARAM_LOAD_CURSOR;
m_param_type = I8275_PARAM_WRITE;
break;
- case I8275_COMMAND_ENABLE_INTERRUPT :
+ case I8275_COMMAND_ENABLE_INTERRUPT :
/* set status register */
m_status_reg |= I8275_STATUS_INTERRUPT_ENABLE;
break;
@@ -214,7 +214,7 @@ WRITE8_MEMBER( i8275_device::write )
/* set status register */
m_status_reg &= ~I8275_STATUS_INTERRUPT_ENABLE;
break;
- case I8275_COMMAND_PRESET_COUNTERS :
+ case I8275_COMMAND_PRESET_COUNTERS :
break;
}
}
@@ -254,7 +254,7 @@ void i8275_device::draw_char_line()
lc = (m_line_counter_mode==1) ? (line - 1) % m_lines_per_row : line;
fifo_read = 0;
for(xpos=0;xpos<=m_chars_per_row;xpos++) {
- UINT8 chr = (m_buffer_used==0) ? m_row_buffer_2[xpos] : m_row_buffer_1[xpos];
+ UINT8 chr = (m_buffer_used==0) ? m_row_buffer_2[xpos] : m_row_buffer_1[xpos];
if (m_undeline_line_num & 0x08) {
vsp = (line==0 || line==m_lines_per_row) ? 1 : 0;
}
@@ -296,7 +296,7 @@ void i8275_device::draw_char_line()
lten = 0;
}
- m_display_pixels_func(this, m_bitmap,
+ m_display_pixels_func(this, m_bitmap,
xpos * m_width, // x position on screen of starting point
m_ypos, // y position on screen
lc, // current line of char
@@ -401,7 +401,7 @@ UINT32 i8275_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
}
copybitmap(bitmap, m_bitmap, 0, 0, 0, 0, cliprect);
-
+
return 0;
}
diff --git a/src/emu/video/i8275.h b/src/emu/video/i8275.h
index 846e63b67a0..0730fb1d316 100644
--- a/src/emu/video/i8275.h
+++ b/src/emu/video/i8275.h
@@ -39,16 +39,16 @@ class i8275_device;
// ======================> i8275_display_pixels_func
typedef void (*i8275_display_pixels_func)(i8275_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt);
-#define I8275_DISPLAY_PIXELS(name) void name(i8275_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt)
+#define I8275_DISPLAY_PIXELS(name) void name(i8275_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt)
// ======================> i8275_interface
struct i8275_interface
{
- const char *m_screen_tag; /* screen we are acting on */
- int m_width; /* char width in pixels */
- int m_char_delay; /* delay of display char */
+ const char *m_screen_tag; /* screen we are acting on */
+ int m_width; /* char width in pixels */
+ int m_char_delay; /* delay of display char */
devcb_write_line m_out_drq_cb;
devcb_write_line m_out_irq_cb;
@@ -61,7 +61,7 @@ struct i8275_interface
class i8275_device : public device_t,
- public i8275_interface
+ public i8275_interface
{
public:
i8275_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -85,24 +85,24 @@ protected:
void set_parameter_cursor(offs_t offset, UINT8 data);
void draw_char_line();
- devcb_resolved_write_line m_out_drq_func;
- devcb_resolved_write_line m_out_irq_func;
- devcb_resolved_write_line m_out_hrtc_func;
- devcb_resolved_write_line m_out_vrtc_func;
+ devcb_resolved_write_line m_out_drq_func;
+ devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_write_line m_out_hrtc_func;
+ devcb_resolved_write_line m_out_vrtc_func;
screen_device *m_screen;
bitmap_rgb32 m_bitmap;
- UINT8 m_status_reg; /* value of status reggister */
- UINT8 m_num_of_params; /* expected number of parameters */
- UINT8 m_current_command; /* command currently executing */
- UINT8 m_param_type; /* parameter type */
+ UINT8 m_status_reg; /* value of status reggister */
+ UINT8 m_num_of_params; /* expected number of parameters */
+ UINT8 m_current_command; /* command currently executing */
+ UINT8 m_param_type; /* parameter type */
- UINT8 m_cursor_col; /* current cursor column */
- UINT8 m_cursor_row; /* current cursor row */
+ UINT8 m_cursor_col; /* current cursor column */
+ UINT8 m_cursor_row; /* current cursor row */
- UINT8 m_light_pen_col; /* current light pen column */
- UINT8 m_light_pen_row; /* current light pen row */
+ UINT8 m_light_pen_col; /* current light pen column */
+ UINT8 m_light_pen_row; /* current light pen row */
/* reset command parameter values*/
/* parameter 0 */
diff --git a/src/emu/video/i8275x.c b/src/emu/video/i8275x.c
index cd52f01acf1..5e6263d9296 100644
--- a/src/emu/video/i8275x.c
+++ b/src/emu/video/i8275x.c
@@ -9,9 +9,9 @@
/*
- TODO:
+ TODO:
- - double spaced rows
+ - double spaced rows
*/
@@ -26,37 +26,37 @@
const int DMA_BURST_SPACING[] = { 0, 7, 15, 23, 31, 39, 47, 55 };
#define DOUBLE_SPACED_ROWS \
- BIT(m_param[REG_SCN1], 7)
+ BIT(m_param[REG_SCN1], 7)
#define CHARACTERS_PER_ROW \
- ((m_param[REG_SCN1] & 0x7f) + 1)
+ ((m_param[REG_SCN1] & 0x7f) + 1)
#define VRTC_ROW_COUNT \
- ((m_param[REG_SCN2] >> 5) + 1)
+ ((m_param[REG_SCN2] >> 5) + 1)
#define CHARACTER_ROWS_PER_FRAME \
- ((m_param[REG_SCN2] & 0x3f) + 1)
+ ((m_param[REG_SCN2] & 0x3f) + 1)
#define UNDERLINE \
- (m_param[REG_SCN3] >> 4)
+ (m_param[REG_SCN3] >> 4)
#define SCANLINES_PER_ROW \
- ((m_param[REG_SCN3] & 0x0f) + 1)
+ ((m_param[REG_SCN3] & 0x0f) + 1)
#define OFFSET_LINE_COUNTER \
- BIT(m_param[REG_SCN4], 7)
+ BIT(m_param[REG_SCN4], 7)
#define VISIBLE_FIELD_ATTRIBUTE \
- BIT(m_param[REG_SCN4], 6)
+ BIT(m_param[REG_SCN4], 6)
#define CURSOR_FORMAT \
- ((m_param[REG_SCN4] >> 4) & 0x03)
+ ((m_param[REG_SCN4] >> 4) & 0x03)
#define HRTC_COUNT \
- (((m_param[REG_SCN4] & 0x0f) + 1) * 2)
+ (((m_param[REG_SCN4] & 0x0f) + 1) * 2)
#define DMA_BURST_COUNT \
- (1 << (m_param[REG_DMA] & 0x03))
+ (1 << (m_param[REG_DMA] & 0x03))
#define DMA_BURST_SPACE \
DMA_BURST_SPACING[(m_param[REG_DMA] >> 2) & 0x07]
@@ -80,23 +80,23 @@ const device_type I8275x = &device_creator<i8275x_device>;
//-------------------------------------------------
i8275x_device::i8275x_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, I8275x, "I8275", tag, owner, clock),
- m_status(0),
- m_param_idx(0),
- m_param_end(0),
- m_buffer_idx(0),
- m_fifo_next(false),
- m_buffer_dma(0),
- m_lpen(0),
- m_hlgt(0),
- m_vsp(0),
- m_gpa(0),
- m_rvv(0),
- m_lten(0),
- m_scanline(0),
- m_du(false),
- m_cursor_blink(0),
- m_char_blink(0)
+ : device_t(mconfig, I8275x, "I8275", tag, owner, clock),
+ m_status(0),
+ m_param_idx(0),
+ m_param_end(0),
+ m_buffer_idx(0),
+ m_fifo_next(false),
+ m_buffer_dma(0),
+ m_lpen(0),
+ m_hlgt(0),
+ m_vsp(0),
+ m_gpa(0),
+ m_rvv(0),
+ m_lten(0),
+ m_scanline(0),
+ m_du(false),
+ m_cursor_blink(0),
+ m_char_blink(0)
{
}
@@ -253,10 +253,10 @@ void i8275x_device::device_timer(emu_timer &timer, device_timer_id id, int param
m_lten = 0;
m_du = false;
-
+
m_cursor_blink++;
m_cursor_blink &= 0x1f;
-
+
m_char_blink++;
m_char_blink &= 0x3f;
}
@@ -267,7 +267,7 @@ void i8275x_device::device_timer(emu_timer &timer, device_timer_id id, int param
m_buffer_dma = !m_buffer_dma;
m_buffer_idx = 0;
m_fifo_idx = 0;
-
+
if (!m_du && ((m_scanline < m_vrtc_scanline - SCANLINES_PER_ROW) || (m_scanline == m_vrtc_drq_scanline)))
{
// start DMA burst
@@ -299,9 +299,9 @@ void i8275x_device::device_timer(emu_timer &timer, device_timer_id id, int param
if (!VISIBLE_FIELD_ATTRIBUTE)
{
int fifo_idx = 0;
-
+
data = m_fifo[!m_buffer_dma][fifo_idx];
-
+
fifo_idx++;
fifo_idx &= 0xf;
}
@@ -345,7 +345,7 @@ void i8275x_device::device_timer(emu_timer &timer, device_timer_id id, int param
lc = (lc - 1) & 0x0f;
}
- m_display_pixels_func(this, m_bitmap,
+ m_display_pixels_func(this, m_bitmap,
sx * m_hpixels_per_column, // x position on screen of starting point
m_scanline, // y position on screen
lc, // current line of char
@@ -395,7 +395,7 @@ READ8_MEMBER( i8275x_device::read )
if (m_param_idx > m_param_end)
{
m_status |= ST_IC;
- }
+ }
}
return data;
@@ -417,10 +417,10 @@ WRITE8_MEMBER( i8275x_device::write )
case CMD_RESET:
logerror("I8275 '%s' Reset\n", tag());
- m_status &= ~ST_IE;
+ m_status &= ~ST_IE;
logerror("I8275 '%s' IRQ 0\n", tag());
m_out_irq_func(CLEAR_LINE);
-
+
m_param_idx = REG_SCN1;
m_param_end = REG_SCN4;
break;
@@ -474,7 +474,7 @@ WRITE8_MEMBER( i8275x_device::write )
if (m_param_idx == REG_SCN4)
{
- recompute_parameters();
+ recompute_parameters();
}
m_param_idx++;
@@ -505,7 +505,7 @@ WRITE8_MEMBER( i8275x_device::dack_w )
else
{
m_buffer[m_buffer_dma][m_buffer_idx++] = data;
-
+
if (!VISIBLE_FIELD_ATTRIBUTE && ((data & 0xc0) == 0x80))
{
m_fifo_next = true;
diff --git a/src/emu/video/i8275x.h b/src/emu/video/i8275x.h
index b6e1927ce4c..172cc62b4c8 100644
--- a/src/emu/video/i8275x.h
+++ b/src/emu/video/i8275x.h
@@ -63,7 +63,7 @@ class i8275x_device;
// ======================> i8275_display_pixels_func
typedef void (*i8275_display_pixels_func)(i8275x_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt);
-#define I8275_DISPLAY_PIXELS(name) void name(i8275x_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt)
+#define I8275_DISPLAY_PIXELS(name) void name(i8275x_device *device, bitmap_rgb32 &bitmap, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt)
// ======================> i8275_interface
@@ -87,8 +87,8 @@ struct i8275_interface
// ======================> i8275x_device
-class i8275x_device : public device_t,
- public i8275_interface
+class i8275x_device : public device_t,
+ public i8275_interface
{
public:
// construction/destruction
@@ -104,10 +104,10 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
void recompute_parameters();
@@ -172,10 +172,10 @@ protected:
FAC_U = 0x20
};
- devcb_resolved_write_line m_out_drq_func;
- devcb_resolved_write_line m_out_irq_func;
- devcb_resolved_write_line m_out_hrtc_func;
- devcb_resolved_write_line m_out_vrtc_func;
+ devcb_resolved_write_line m_out_drq_func;
+ devcb_resolved_write_line m_out_irq_func;
+ devcb_resolved_write_line m_out_hrtc_func;
+ devcb_resolved_write_line m_out_vrtc_func;
screen_device *m_screen;
bitmap_rgb32 m_bitmap;
diff --git a/src/emu/video/k053250.c b/src/emu/video/k053250.c
index b5f86814ace..fe7eefb9f3b 100644
--- a/src/emu/video/k053250.c
+++ b/src/emu/video/k053250.c
@@ -59,12 +59,12 @@ void k053250_t::device_reset()
// utility function to render a clipped scanline vertically or horizontally
inline void k053250_t::pdraw_scanline32(bitmap_rgb32 &bitmap, const pen_t *palette, UINT8 *source,
- const rectangle &cliprect, int linepos, int scroll, int zoom,
- UINT32 clipmask, UINT32 wrapmask, UINT32 orientation, bitmap_ind8 &priority, UINT8 pri)
+ const rectangle &cliprect, int linepos, int scroll, int zoom,
+ UINT32 clipmask, UINT32 wrapmask, UINT32 orientation, bitmap_ind8 &priority, UINT8 pri)
{
// a sixteen-bit fixed point resolution should be adequate to our application
-#define FIXPOINT_PRECISION 16
-#define FIXPOINT_PRECISION_HALF (1<<(FIXPOINT_PRECISION-1))
+#define FIXPOINT_PRECISION 16
+#define FIXPOINT_PRECISION_HALF (1<<(FIXPOINT_PRECISION-1))
int end_pixel, flip, dst_min, dst_max, dst_start, dst_length;
@@ -144,7 +144,7 @@ inline void k053250_t::pdraw_scanline32(bitmap_rgb32 &bitmap, const pen_t *palet
{
// draw wrapped scanline at virtual bitmap boundary when source clipping is off
dst_start = dst_min;
- dst_length = dst_max - dst_min + 1; // target scanline spans the entire visible area
+ dst_length = dst_max - dst_min + 1; // target scanline spans the entire visible area
src_fdx = zoom << (FIXPOINT_PRECISION-6);
// pre-advance source for the clipped region
@@ -230,10 +230,10 @@ void k053250_t::draw( bitmap_rgb32 &bitmap, const rectangle &cliprect, int color
int color, offset, zoom, scroll, passes, i;
bool wrap500 = false;
- UINT16 *line_ram = buffer[page]; // pointer to physical line RAM
- int map_scrollx = short(regs[0] << 8 | regs[1]) - offx; // signed horizontal scroll value
- int map_scrolly = short(regs[2] << 8 | regs[3]) - offy; // signed vertical scroll value
- UINT8 ctrl = regs[4]; // register four is the main control register
+ UINT16 *line_ram = buffer[page]; // pointer to physical line RAM
+ int map_scrollx = short(regs[0] << 8 | regs[1]) - offx; // signed horizontal scroll value
+ int map_scrolly = short(regs[2] << 8 | regs[3]) - offy; // signed vertical scroll value
+ UINT8 ctrl = regs[4]; // register four is the main control register
// copy visible boundary values to more accessible locations
int dst_minx = cliprect.min_x;
@@ -241,9 +241,9 @@ void k053250_t::draw( bitmap_rgb32 &bitmap, const rectangle &cliprect, int color
int dst_miny = cliprect.min_y;
int dst_maxy = cliprect.max_y;
- int orientation = 0; // orientation defaults to no swapping and no flipping
- int dst_height = 512; // virtual bitmap height defaults to five hundred and twelve pixels
- int linedata_adv = 4; // line info packets are four words(eight bytes) apart
+ int orientation = 0; // orientation defaults to no swapping and no flipping
+ int dst_height = 512; // virtual bitmap height defaults to five hundred and twelve pixels
+ int linedata_adv = 4; // line info packets are four words(eight bytes) apart
// switch X and Y parameters when the first bit of the control register is cleared
if (!(ctrl & 0x01)) orientation |= ORIENTATION_SWAP_XY;
@@ -292,49 +292,49 @@ void k053250_t::draw( bitmap_rgb32 &bitmap, const rectangle &cliprect, int color
// disable source clipping when the third bit of the control register is set
if (ctrl & 0x04) src_clipmask = 0;
- if (!(orientation & ORIENTATION_SWAP_XY)) // normal orientaion with no X Y switching
+ if (!(orientation & ORIENTATION_SWAP_XY)) // normal orientaion with no X Y switching
{
- line_start = dst_miny; // the first scanline starts at the minimum Y clip location
- line_end = dst_maxy; // the last scanline ends at the maximum Y clip location
- scroll_corr = map_scrollx; // concentrate global X scroll
- linedata_offs = map_scrolly; // determine where to get info for the first line
+ line_start = dst_miny; // the first scanline starts at the minimum Y clip location
+ line_end = dst_maxy; // the last scanline ends at the maximum Y clip location
+ scroll_corr = map_scrollx; // concentrate global X scroll
+ linedata_offs = map_scrolly; // determine where to get info for the first line
if (orientation & ORIENTATION_FLIP_X)
{
- scroll_corr = -scroll_corr; // X scroll adjustment should be negated in X flipped scenarioes
+ scroll_corr = -scroll_corr; // X scroll adjustment should be negated in X flipped scenarioes
}
if (orientation & ORIENTATION_FLIP_Y)
{
- linedata_adv = -linedata_adv; // traverse line RAM backward in Y flipped scenarioes
- linedata_offs += bitmap.height() - 1; // and get info for the first line from the bottom
+ linedata_adv = -linedata_adv; // traverse line RAM backward in Y flipped scenarioes
+ linedata_offs += bitmap.height() - 1; // and get info for the first line from the bottom
}
- dst_wrapmask = ~0; // scanlines don't seem to wrap horizontally in normal orientation
- passes = 1; // draw scanline in a single pass
+ dst_wrapmask = ~0; // scanlines don't seem to wrap horizontally in normal orientation
+ passes = 1; // draw scanline in a single pass
}
else // orientaion with X and Y parameters switched
{
- line_start = dst_minx; // the first scanline starts at the minimum X clip location
- line_end = dst_maxx; // the last scanline ends at the maximum X clip location
- scroll_corr = map_scrolly; // concentrate global Y scroll
- linedata_offs = map_scrollx; // determine where to get info for the first line
+ line_start = dst_minx; // the first scanline starts at the minimum X clip location
+ line_end = dst_maxx; // the last scanline ends at the maximum X clip location
+ scroll_corr = map_scrolly; // concentrate global Y scroll
+ linedata_offs = map_scrollx; // determine where to get info for the first line
if (orientation & ORIENTATION_FLIP_Y)
{
- scroll_corr = 0x100 - scroll_corr; // apply common vertical correction
+ scroll_corr = 0x100 - scroll_corr; // apply common vertical correction
// Y correction (ref: 1st and 5th boss)
- scroll_corr -= 2; // apply unique vertical correction
+ scroll_corr -= 2; // apply unique vertical correction
// X correction (ref: 1st boss, seems to undo non-rotated global X offset)
- linedata_offs -= 5; // apply unique horizontal correction
+ linedata_offs -= 5; // apply unique horizontal correction
}
if (orientation & ORIENTATION_FLIP_X)
{
- linedata_adv = -linedata_adv; // traverse line RAM backward in X flipped scenarioes
- linedata_offs += bitmap.width() - 1; // and get info for the first line from the bottom
+ linedata_adv = -linedata_adv; // traverse line RAM backward in X flipped scenarioes
+ linedata_offs += bitmap.width() - 1; // and get info for the first line from the bottom
}
if (src_clipmask)
@@ -351,9 +351,9 @@ void k053250_t::draw( bitmap_rgb32 &bitmap, const rectangle &cliprect, int color
}
}
- linedata_offs *= 4; // each line info packet has four words(eight bytes)
- linedata_offs &= 0x7ff; // and it should wrap at the four-kilobyte boundary
- linedata_offs += line_start * linedata_adv; // pre-advance line info offset for the clipped region
+ linedata_offs *= 4; // each line info packet has four words(eight bytes)
+ linedata_offs &= 0x7ff; // and it should wrap at the four-kilobyte boundary
+ linedata_offs += line_start * linedata_adv; // pre-advance line info offset for the clipped region
// load physical palette base
pal_base = machine().pens + (colorbase << 4) % machine().total_colors();
@@ -361,13 +361,13 @@ void k053250_t::draw( bitmap_rgb32 &bitmap, const rectangle &cliprect, int color
// walk the target bitmap within the visible area vertically or horizontally, one line at a time
for (line_pos=line_start; line_pos <= line_end; linedata_offs += linedata_adv, line_pos++)
{
- linedata_offs &= 0x7ff; // line info data wraps at the four-kilobyte boundary
+ linedata_offs &= 0x7ff; // line info data wraps at the four-kilobyte boundary
- color = line_ram[linedata_offs]; // get scanline color code
- if (color == 0xffff) continue; // reject scanline if color code equals minus one
+ color = line_ram[linedata_offs]; // get scanline color code
+ if (color == 0xffff) continue; // reject scanline if color code equals minus one
- offset = line_ram[linedata_offs + 1]; // get first pixel offset in ROM
- if (!(color & 0xff) && !offset) continue; // reject scanline if both color and pixel offset are zero
+ offset = line_ram[linedata_offs + 1]; // get first pixel offset in ROM
+ if (!(color & 0xff) && !offset) continue; // reject scanline if both color and pixel offset are zero
// calculate physical palette location
// there can be thirty-two color codes and each code represents sixteen pens
@@ -383,13 +383,13 @@ void k053250_t::draw( bitmap_rgb32 &bitmap, const rectangle &cliprect, int color
// scanline therefore it is not necessary to adjust render start position
zoom = line_ram[linedata_offs + 2];
- scroll = (short)line_ram[linedata_offs + 3]; // get signed local scroll value for the current scanline
+ scroll = (short)line_ram[linedata_offs + 3]; // get signed local scroll value for the current scanline
// scavenged from old code; improves Xexex' first level sky
if (wrap500 && scroll >= 0x500) scroll -= 0x800;
- scroll += scroll_corr; // apply final scroll correction
- scroll &= dst_wrapmask; // wraparound scroll value if necessary
+ scroll += scroll_corr; // apply final scroll correction
+ scroll &= dst_wrapmask; // wraparound scroll value if necessary
// draw scanlines wrapped at virtual bitmap boundary in two passes
// this should not impose too much overhead due to clipping performed by the render code
@@ -397,22 +397,22 @@ void k053250_t::draw( bitmap_rgb32 &bitmap, const rectangle &cliprect, int color
do
{
/*
- Parameter descriptions:
-
- bitmap : pointer to a MAME bitmap as the render target
- pal_ptr : pointer to the palette's physical location relative to the scanline
- pix_ptr : pointer to the physical start location of source pixels in ROM
- cliprect : pointer to a rectangle structue which describes the visible area of the target bitmap
- line_pos : scanline render position relative to the target bitmap
- should be a Y offset to the target bitmap in normal orientaion,
- or an X offset to the target bitmap if X,Y are swapped
- scroll : source scroll value of the scanline
- zoom : source zoom factor of the scanline
- src_clipmask : source offset clip mask; source pixels with offsets beyond the scope of this mask will not be drawn
- src_wrapmask : source offset wrap mask; wraps source offset around, no effect when src_clipmask is set
- orientation : flags indicating whether scanlines should be drawn horizontally, vertically, forward or backward
- priority : value to be written to the priority bitmap, no effect when equals zero
- */
+ Parameter descriptions:
+
+ bitmap : pointer to a MAME bitmap as the render target
+ pal_ptr : pointer to the palette's physical location relative to the scanline
+ pix_ptr : pointer to the physical start location of source pixels in ROM
+ cliprect : pointer to a rectangle structue which describes the visible area of the target bitmap
+ line_pos : scanline render position relative to the target bitmap
+ should be a Y offset to the target bitmap in normal orientaion,
+ or an X offset to the target bitmap if X,Y are swapped
+ scroll : source scroll value of the scanline
+ zoom : source zoom factor of the scanline
+ src_clipmask : source offset clip mask; source pixels with offsets beyond the scope of this mask will not be drawn
+ src_wrapmask : source offset wrap mask; wraps source offset around, no effect when src_clipmask is set
+ orientation : flags indicating whether scanlines should be drawn horizontally, vertically, forward or backward
+ priority : value to be written to the priority bitmap, no effect when equals zero
+ */
pdraw_scanline32(bitmap, pal_ptr, pix_ptr, cliprect,
line_pos, scroll, zoom, src_clipmask, src_wrapmask, orientation, machine().priority_bitmap, (UINT8)priority);
@@ -466,4 +466,3 @@ READ16_MEMBER(k053250_t::rom_r)
{
return m_region->base()[0x80000 * regs[6] + 0x800 * regs[7] + offset/2];
}
-
diff --git a/src/emu/video/k053250.h b/src/emu/video/k053250.h
index cea197f2d4d..c87850e74f4 100644
--- a/src/emu/video/k053250.h
+++ b/src/emu/video/k053250.h
@@ -7,7 +7,7 @@
#include "emu.h"
-#define MCFG_K053250_ADD(_tag, screen_tag, offx, offy) \
+#define MCFG_K053250_ADD(_tag, screen_tag, offx, offy) \
MCFG_DEVICE_ADD(_tag, K053250, 0) \
k053250_t::static_set_screen_tag(*device, screen_tag); \
k053250_t::static_set_offsets(*device, offx, offy);
@@ -47,11 +47,10 @@ private:
void unpack_nibbles();
void dma(int limiter);
static void pdraw_scanline32(bitmap_rgb32 &bitmap, const pen_t *palette, UINT8 *source,
- const rectangle &cliprect, int linepos, int scroll, int zoom,
- UINT32 clipmask, UINT32 wrapmask, UINT32 orientation, bitmap_ind8 &priority, UINT8 pri);
+ const rectangle &cliprect, int linepos, int scroll, int zoom,
+ UINT32 clipmask, UINT32 wrapmask, UINT32 orientation, bitmap_ind8 &priority, UINT8 pri);
};
extern const device_type K053250;
#endif
-
diff --git a/src/emu/video/m50458.c b/src/emu/video/m50458.c
index 001f19b9bac..56e9feb9f62 100644
--- a/src/emu/video/m50458.c
+++ b/src/emu/video/m50458.c
@@ -173,8 +173,8 @@ inline void m50458_device::write_word(offs_t address, UINT16 data)
m50458_device::m50458_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, M50458, "m50458", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("videoram", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(m50458_vram))
+ device_memory_interface(mconfig, *this),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(m50458_vram))
{
m_shortname = "m50458";
}
@@ -362,7 +362,7 @@ UINT32 m50458_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
int y_base = y;
if(y != 0 && m_scrr > 1) { y_base+=(m_scrr - 1); }
- if(y_base > 11) { y_base -= 11; }
+ if(y_base > 11) { y_base -= 11; }
if(m_scrr && y == 11) { y_base = 0; } /* Guess: repeat line 0 if scrolling is active */
tile = read_word(x+y_base*24);
diff --git a/src/emu/video/m50458.h b/src/emu/video/m50458.h
index ceef5480fb3..58b9c897fa6 100644
--- a/src/emu/video/m50458.h
+++ b/src/emu/video/m50458.h
@@ -43,7 +43,7 @@ struct m50458_interface
// ======================> m50458_device
-class m50458_device : public device_t,
+class m50458_device : public device_t,
public device_memory_interface,
public m50458_interface
{
@@ -78,8 +78,8 @@ protected:
screen_device *m_screen;
int m_latch;
- int m_reset_line;
- int m_clock_line;
+ int m_reset_line;
+ int m_clock_line;
UINT16 m_current_cmd;
int m_cmd_stream_pos;
UINT16 m_osd_addr;
@@ -99,7 +99,7 @@ private:
inline UINT16 read_word(offs_t address);
inline void write_word(offs_t address, UINT16 data);
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
};
diff --git a/src/emu/video/mb90082.c b/src/emu/video/mb90082.c
index 8983c44d848..7c6deff6c43 100644
--- a/src/emu/video/mb90082.c
+++ b/src/emu/video/mb90082.c
@@ -85,8 +85,8 @@ inline void mb90082_device::write_word(offs_t address, UINT16 data)
mb90082_device::mb90082_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MB90082, "mb90082", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("videoram", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(mb90082_vram))
+ device_memory_interface(mconfig, *this),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(mb90082_vram))
{
m_shortname = "mb90082";
diff --git a/src/emu/video/mb90082.h b/src/emu/video/mb90082.h
index 0b03a5310da..bb263c95475 100644
--- a/src/emu/video/mb90082.h
+++ b/src/emu/video/mb90082.h
@@ -32,7 +32,7 @@ enum
// ======================> mb90082_device
-class mb90082_device : public device_t,
+class mb90082_device : public device_t,
public device_memory_interface
{
public:
@@ -66,7 +66,7 @@ private:
inline UINT16 read_word(offs_t address);
inline void write_word(offs_t address, UINT16 data);
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
};
diff --git a/src/emu/video/mc6845.c b/src/emu/video/mc6845.c
index a5ec4406381..343ac7b852f 100644
--- a/src/emu/video/mc6845.c
+++ b/src/emu/video/mc6845.c
@@ -39,7 +39,7 @@
#include "mc6845.h"
-#define LOG (0)
+#define LOG (0)
const device_type MC6845 = &device_creator<mc6845_device>;
@@ -57,31 +57,31 @@ const device_type MOS8568 = &device_creator<mos8568_device>;
/* mode macros */
-#define MODE_TRANSPARENT ((m_mode_control & 0x08) != 0)
-#define MODE_TRANSPARENT_PHI2 ((m_mode_control & 0x88) == 0x88)
+#define MODE_TRANSPARENT ((m_mode_control & 0x08) != 0)
+#define MODE_TRANSPARENT_PHI2 ((m_mode_control & 0x88) == 0x88)
/* FIXME: not supported yet */
-#define MODE_TRANSPARENT_BLANK ((m_mode_control & 0x88) == 0x08)
-#define MODE_UPDATE_STROBE ((m_mode_control & 0x40) != 0)
-#define MODE_CURSOR_SKEW ((m_mode_control & 0x20) != 0)
-#define MODE_DISPLAY_ENABLE_SKEW ((m_mode_control & 0x10) != 0)
-#define MODE_ROW_COLUMN_ADDRESSING ((m_mode_control & 0x04) != 0)
-
-#define VSS_CBRATE BIT(m_vert_scroll, 5)
-#define VSS_RVS BIT(m_vert_scroll, 6)
-#define VSS_COPY BIT(m_vert_scroll, 7)
-
-#define HSS_DBL BIT(m_horiz_scroll, 4)
-#define HSS_SEMI BIT(m_horiz_scroll, 5)
-#define HSS_ATTR BIT(m_horiz_scroll, 6)
-#define HSS_TEXT BIT(m_horiz_scroll, 7)
-
-#define ATTR_COLOR (attr & 0x0f)
-#define ATTR_BACKGROUND (attr & 0x0f)
-#define ATTR_FOREGROUND (attr >> 4)
-#define ATTR_BLINK BIT(attr, 4)
-#define ATTR_UNDERLINE BIT(attr, 5)
-#define ATTR_REVERSE BIT(attr, 6)
-#define ATTR_ALTERNATE_CHARSET BIT(attr, 7)
+#define MODE_TRANSPARENT_BLANK ((m_mode_control & 0x88) == 0x08)
+#define MODE_UPDATE_STROBE ((m_mode_control & 0x40) != 0)
+#define MODE_CURSOR_SKEW ((m_mode_control & 0x20) != 0)
+#define MODE_DISPLAY_ENABLE_SKEW ((m_mode_control & 0x10) != 0)
+#define MODE_ROW_COLUMN_ADDRESSING ((m_mode_control & 0x04) != 0)
+
+#define VSS_CBRATE BIT(m_vert_scroll, 5)
+#define VSS_RVS BIT(m_vert_scroll, 6)
+#define VSS_COPY BIT(m_vert_scroll, 7)
+
+#define HSS_DBL BIT(m_horiz_scroll, 4)
+#define HSS_SEMI BIT(m_horiz_scroll, 5)
+#define HSS_ATTR BIT(m_horiz_scroll, 6)
+#define HSS_TEXT BIT(m_horiz_scroll, 7)
+
+#define ATTR_COLOR (attr & 0x0f)
+#define ATTR_BACKGROUND (attr & 0x0f)
+#define ATTR_FOREGROUND (attr >> 4)
+#define ATTR_BLINK BIT(attr, 4)
+#define ATTR_UNDERLINE BIT(attr, 5)
+#define ATTR_REVERSE BIT(attr, 6)
+#define ATTR_ALTERNATE_CHARSET BIT(attr, 7)
void mc6845_device::device_config_complete()
@@ -146,15 +146,15 @@ READ8_MEMBER( mc6845_device::status_r )
/* VBLANK bit */
if (m_supports_status_reg_d5 && !m_line_enable_ff)
- ret = ret | 0x20;
+ ret = ret | 0x20;
/* light pen latched */
if (m_supports_status_reg_d6 && m_light_pen_latched)
- ret = ret | 0x40;
+ ret = ret | 0x40;
/* UPDATE ready */
if (m_supports_status_reg_d7 && m_update_ready_bit)
- ret = ret | 0x80;
+ ret = ret | 0x80;
return ret;
}
@@ -285,15 +285,15 @@ READ8_MEMBER( mos8563_device::status_r )
/* VBLANK bit */
if (!m_line_enable_ff)
- ret = ret | 0x20;
+ ret = ret | 0x20;
/* light pen latched */
if (m_light_pen_latched)
- ret = ret | 0x40;
+ ret = ret | 0x40;
/* UPDATE ready */
if (m_update_ready_bit)
- ret = ret | 0x80;
+ ret = ret | 0x80;
return ret;
}
@@ -305,18 +305,18 @@ READ8_MEMBER( mos8563_device::register_r )
switch (m_register_address_latch)
{
- case 0x00: ret = m_horiz_char_total; break;
- case 0x01: ret = m_horiz_disp; break;
- case 0x02: ret = m_horiz_sync_pos; break;
- case 0x03: ret = m_sync_width; break;
- case 0x04: ret = m_vert_char_total; break;
- case 0x05: ret = m_vert_total_adj | 0xc0; break;
- case 0x06: ret = m_vert_disp; break;
- case 0x07: ret = m_vert_sync_pos; break;
- case 0x08: ret = m_mode_control | 0xfc; break;
- case 0x09: ret = m_max_ras_addr | 0xe0; break;
- case 0x0a: ret = m_cursor_start_ras | 0x80; break;
- case 0x0b: ret = m_cursor_end_ras | 0xe0; break;
+ case 0x00: ret = m_horiz_char_total; break;
+ case 0x01: ret = m_horiz_disp; break;
+ case 0x02: ret = m_horiz_sync_pos; break;
+ case 0x03: ret = m_sync_width; break;
+ case 0x04: ret = m_vert_char_total; break;
+ case 0x05: ret = m_vert_total_adj | 0xc0; break;
+ case 0x06: ret = m_vert_disp; break;
+ case 0x07: ret = m_vert_sync_pos; break;
+ case 0x08: ret = m_mode_control | 0xfc; break;
+ case 0x09: ret = m_max_ras_addr | 0xe0; break;
+ case 0x0a: ret = m_cursor_start_ras | 0x80; break;
+ case 0x0b: ret = m_cursor_end_ras | 0xe0; break;
case 0x0c: ret = (m_disp_start_addr >> 8) & 0xff; break;
case 0x0d: ret = (m_disp_start_addr >> 0) & 0xff; break;
case 0x0e: ret = (m_cursor_addr >> 8) & 0xff; break;
@@ -327,22 +327,22 @@ READ8_MEMBER( mos8563_device::register_r )
case 0x13: ret = (m_update_addr >> 0) & 0xff; break;
case 0x14: ret = (m_attribute_addr >> 8) & 0xff; break;
case 0x15: ret = (m_attribute_addr >> 0) & 0xff; break;
- case 0x16: ret = m_horiz_char; break;
- case 0x17: ret = m_vert_char_disp | 0xe0; break;
- case 0x18: ret = m_vert_scroll; break;
- case 0x19: ret = m_horiz_scroll; break;
- case 0x1a: ret = m_color; break;
- case 0x1b: ret = m_row_addr_incr; break;
- case 0x1c: ret = m_char_base_addr | 0x1f; break;
- case 0x1d: ret = m_underline_ras | 0xe0; break;
- case 0x1e: ret = m_word_count; break;
- case 0x1f: ret = read_videoram(m_update_addr++); break;
+ case 0x16: ret = m_horiz_char; break;
+ case 0x17: ret = m_vert_char_disp | 0xe0; break;
+ case 0x18: ret = m_vert_scroll; break;
+ case 0x19: ret = m_horiz_scroll; break;
+ case 0x1a: ret = m_color; break;
+ case 0x1b: ret = m_row_addr_incr; break;
+ case 0x1c: ret = m_char_base_addr | 0x1f; break;
+ case 0x1d: ret = m_underline_ras | 0xe0; break;
+ case 0x1e: ret = m_word_count; break;
+ case 0x1f: ret = read_videoram(m_update_addr++); break;
case 0x20: ret = (m_block_addr >> 8) & 0xff; break;
case 0x21: ret = (m_block_addr >> 0) & 0xff; break;
case 0x22: ret = (m_de_begin >> 8) & 0xff; break;
case 0x23: ret = (m_de_begin >> 0) & 0xff; break;
- case 0x24: ret = m_dram_refresh | 0xf0; break;
- case 0x25: ret = m_sync_polarity | 0x3f; break;
+ case 0x24: ret = m_dram_refresh | 0xf0; break;
+ case 0x25: ret = m_sync_polarity | 0x3f; break;
}
return ret;
@@ -373,13 +373,13 @@ WRITE8_MEMBER( mos8563_device::register_w )
case 0x0f: m_cursor_addr = ((data & 0xff) << 0) | (m_cursor_addr & 0xff00); break;
case 0x10: /* read-only */ break;
case 0x11: /* read-only */ break;
- case 0x12: m_update_addr = ((data & 0xff) << 8) | (m_update_addr & 0x00ff); break;
- case 0x13: m_update_addr = ((data & 0xff) << 0) | (m_update_addr & 0xff00); break;
+ case 0x12: m_update_addr = ((data & 0xff) << 8) | (m_update_addr & 0x00ff); break;
+ case 0x13: m_update_addr = ((data & 0xff) << 0) | (m_update_addr & 0xff00); break;
case 0x14: m_attribute_addr = ((data & 0xff) << 8) | (m_attribute_addr & 0x00ff); break;
case 0x15: m_attribute_addr = ((data & 0xff) << 0) | (m_attribute_addr & 0xff00); break;
- case 0x16: m_horiz_char = data & 0xff; break;
- case 0x17: m_vert_char_disp = data & 0x1f; break;
- case 0x18: m_vert_scroll = data & 0xff; break;
+ case 0x16: m_horiz_char = data & 0xff; break;
+ case 0x17: m_vert_char_disp = data & 0x1f; break;
+ case 0x18: m_vert_scroll = data & 0xff; break;
case 0x19:
{
int dbl = HSS_DBL;
@@ -388,10 +388,10 @@ WRITE8_MEMBER( mos8563_device::register_w )
if (!dbl && HSS_DBL) set_clock(m_clock >> 1);
break;
}
- case 0x1a: m_color = data & 0xff; break;
- case 0x1b: m_row_addr_incr = data & 0xff; break;
- case 0x1c: m_char_base_addr = data & 0xe0; break;
- case 0x1d: m_underline_ras = data & 0x1f; break;
+ case 0x1a: m_color = data & 0xff; break;
+ case 0x1b: m_row_addr_incr = data & 0xff; break;
+ case 0x1c: m_char_base_addr = data & 0xe0; break;
+ case 0x1d: m_underline_ras = data & 0x1f; break;
case 0x1e:
m_word_count = data & 0xff;
m_update_ready_bit = 0;
@@ -401,12 +401,12 @@ WRITE8_MEMBER( mos8563_device::register_w )
m_data = data & 0xff;
write_videoram(m_update_addr++, m_data);
break;
- case 0x20: m_block_addr = ((data & 0xff) << 8) | (m_block_addr & 0x00ff); break;
- case 0x21: m_block_addr = ((data & 0xff) << 0) | (m_block_addr & 0xff00); break;
- case 0x22: m_de_begin = ((data & 0xff) << 8) | (m_de_begin & 0x00ff); break;
- case 0x23: m_de_begin = ((data & 0xff) << 0) | (m_de_begin & 0xff00); break;
- case 0x24: m_dram_refresh = data & 0x0f; break;
- case 0x25: m_sync_polarity = data & 0xc0; break;
+ case 0x20: m_block_addr = ((data & 0xff) << 8) | (m_block_addr & 0x00ff); break;
+ case 0x21: m_block_addr = ((data & 0xff) << 0) | (m_block_addr & 0xff00); break;
+ case 0x22: m_de_begin = ((data & 0xff) << 8) | (m_de_begin & 0x00ff); break;
+ case 0x23: m_de_begin = ((data & 0xff) << 0) | (m_de_begin & 0xff00); break;
+ case 0x24: m_dram_refresh = data & 0x0f; break;
+ case 0x25: m_sync_polarity = data & 0xc0; break;
}
recompute_parameters(false);
@@ -479,7 +479,7 @@ void mc6845_device::recompute_parameters(bool postload)
vsync_off_pos = vsync_on_pos + vert_sync_pix_width;
/* the Commodore PET computers program a horizontal synch pulse that extends
- past the scanline width. I assume that the real device will clamp it */
+ past the scanline width. I assume that the real device will clamp it */
if (hsync_off_pos > horiz_pix_total)
hsync_off_pos = horiz_pix_total;
@@ -491,7 +491,7 @@ void mc6845_device::recompute_parameters(bool postload)
/* update only if screen parameters changed, unless we are coming here after loading the saved state */
if (postload ||
- (horiz_pix_total != m_horiz_pix_total) || (vert_pix_total != m_vert_pix_total) ||
+ (horiz_pix_total != m_horiz_pix_total) || (vert_pix_total != m_vert_pix_total) ||
(max_visible_x != m_max_visible_x) || (max_visible_y != m_max_visible_y) ||
(hsync_on_pos != m_hsync_on_pos) || (vsync_on_pos != m_vsync_on_pos) ||
(hsync_off_pos != m_hsync_off_pos) || (vsync_off_pos != m_vsync_off_pos))
@@ -509,7 +509,7 @@ void mc6845_device::recompute_parameters(bool postload)
visarea.set(0, max_visible_x, 0, max_visible_y);
if (LOG) logerror("M6845 config screen: HTOTAL: 0x%x VTOTAL: 0x%x MAX_X: 0x%x MAX_Y: 0x%x HSYNC: 0x%x-0x%x VSYNC: 0x%x-0x%x Freq: %ffps\n",
- horiz_pix_total, vert_pix_total, max_visible_x, max_visible_y, hsync_on_pos, hsync_off_pos - 1, vsync_on_pos, vsync_off_pos - 1, 1 / ATTOSECONDS_TO_DOUBLE(refresh));
+ horiz_pix_total, vert_pix_total, max_visible_x, max_visible_y, hsync_on_pos, hsync_off_pos - 1, vsync_on_pos, vsync_off_pos - 1, 1 / ATTOSECONDS_TO_DOUBLE(refresh));
if ( m_screen != NULL )
m_screen->configure(horiz_pix_total, vert_pix_total, visarea, refresh);
@@ -1401,16 +1401,16 @@ ams40041_device::ams40041_device(const machine_config &mconfig, const char *tag,
mos8563_device::mos8563_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: mc6845_device(mconfig, type, name, tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(mos8563_videoram_map))
+ device_memory_interface(mconfig, *this),
+ m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(mos8563_videoram_map))
{
}
mos8563_device::mos8563_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: mc6845_device(mconfig, MOS8563, "MOS8563", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(mos8563_videoram_map))
+ device_memory_interface(mconfig, *this),
+ m_videoram_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(mos8563_videoram_map))
{
}
@@ -1561,7 +1561,7 @@ void mos8563_device::update_row(bitmap_rgb32 &bitmap, const rectangle &cliprect,
MC6845_UPDATE_ROW( mos8563_device::vdc_update_row )
{
- mos8563_device *mos8563 = static_cast<mos8563_device *>(device);
+ mos8563_device *mos8563 = static_cast<mos8563_device *>(device);
- mos8563->update_row(bitmap, cliprect, ma, ra, y, x_count, cursor_x, param);
+ mos8563->update_row(bitmap, cliprect, ma, ra, y, x_count, cursor_x, param);
}
diff --git a/src/emu/video/mc6845.h b/src/emu/video/mc6845.h
index b99628d61fc..5116dc545fa 100644
--- a/src/emu/video/mc6845.h
+++ b/src/emu/video/mc6845.h
@@ -45,68 +45,68 @@ class mc6845_device;
/* callback definitions */
typedef void * (*mc6845_begin_update_func)(mc6845_device *device, bitmap_rgb32 &bitmap, const rectangle &cliprect);
-#define MC6845_BEGIN_UPDATE(name) void *name(mc6845_device *device, bitmap_rgb32 &bitmap, const rectangle &cliprect)
+#define MC6845_BEGIN_UPDATE(name) void *name(mc6845_device *device, bitmap_rgb32 &bitmap, const rectangle &cliprect)
typedef void (*mc6845_update_row_func)(mc6845_device *device, bitmap_rgb32 &bitmap,
- const rectangle &cliprect, UINT16 ma, UINT8 ra,
- UINT16 y, UINT8 x_count, INT8 cursor_x, void *param);
+ const rectangle &cliprect, UINT16 ma, UINT8 ra,
+ UINT16 y, UINT8 x_count, INT8 cursor_x, void *param);
-#define MC6845_UPDATE_ROW(name) void name(mc6845_device *device, bitmap_rgb32 &bitmap, \
- const rectangle &cliprect, UINT16 ma, UINT8 ra, \
- UINT16 y, UINT8 x_count, INT8 cursor_x, void *param)
+#define MC6845_UPDATE_ROW(name) void name(mc6845_device *device, bitmap_rgb32 &bitmap, \
+ const rectangle &cliprect, UINT16 ma, UINT8 ra, \
+ UINT16 y, UINT8 x_count, INT8 cursor_x, void *param)
typedef void (*mc6845_end_update_func)(mc6845_device *device, bitmap_rgb32 &bitmap, const rectangle &cliprect, void *param);
-#define MC6845_END_UPDATE(name) void name(mc6845_device *device, bitmap_rgb32 &bitmap, const rectangle &cliprect, void *param)
+#define MC6845_END_UPDATE(name) void name(mc6845_device *device, bitmap_rgb32 &bitmap, const rectangle &cliprect, void *param)
typedef void (*mc6845_on_update_addr_changed_func)(mc6845_device *device, int address, int strobe);
-#define MC6845_ON_UPDATE_ADDR_CHANGED(name) void name(mc6845_device *device, int address, int strobe)
+#define MC6845_ON_UPDATE_ADDR_CHANGED(name) void name(mc6845_device *device, int address, int strobe)
/* interface */
struct mc6845_interface
{
- const char *m_screen_tag; /* screen we are acting on */
- int m_hpixels_per_column; /* number of pixels per video memory address */
+ const char *m_screen_tag; /* screen we are acting on */
+ int m_hpixels_per_column; /* number of pixels per video memory address */
/* if specified, this gets called before any pixel update,
- optionally return a pointer that will be passed to the
- update and tear down callbacks */
- mc6845_begin_update_func m_begin_update;
+ optionally return a pointer that will be passed to the
+ update and tear down callbacks */
+ mc6845_begin_update_func m_begin_update;
/* this gets called for every row, the driver must output
- x_count * hpixels_per_column pixels.
- cursor_x indicates the character position where the cursor is, or -1
- if there is no cursor on this row */
- mc6845_update_row_func m_update_row;
+ x_count * hpixels_per_column pixels.
+ cursor_x indicates the character position where the cursor is, or -1
+ if there is no cursor on this row */
+ mc6845_update_row_func m_update_row;
/* if specified, this gets called after all row updating is complete */
- mc6845_end_update_func m_end_update;
+ mc6845_end_update_func m_end_update;
/* if specified, this gets called for every change of the disply enable pin (pin 18) */
- devcb_write_line m_out_de_func;
+ devcb_write_line m_out_de_func;
/* if specified, this gets called for every change of the cursor pin (pin 19) */
- devcb_write_line m_out_cur_func;
+ devcb_write_line m_out_cur_func;
/* if specified, this gets called for every change of the HSYNC pin (pin 39) */
- devcb_write_line m_out_hsync_func;
+ devcb_write_line m_out_hsync_func;
/* if specified, this gets called for every change of the VSYNC pin (pin 40) */
- devcb_write_line m_out_vsync_func;
+ devcb_write_line m_out_vsync_func;
/* Called whenenever the update address changes
- * For vblank/hblank timing strobe indicates the physical update.
- * vblank/hblank timing not supported yet! */
+ * For vblank/hblank timing strobe indicates the physical update.
+ * vblank/hblank timing not supported yet! */
- mc6845_on_update_addr_changed_func m_on_update_addr_changed;
+ mc6845_on_update_addr_changed_func m_on_update_addr_changed;
};
-class mc6845_device : public device_t,
+class mc6845_device : public device_t,
public mc6845_interface
{
friend class mc6845_1_device;
@@ -120,8 +120,8 @@ class mc6845_device : public device_t,
friend class ams40041_device;
public:
- // construction/destruction
- mc6845_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ mc6845_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
mc6845_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
/* select one of the registers for reading or writing */
@@ -164,14 +164,14 @@ public:
void set_hpixels_per_column(int hpixels_per_column);
/* updates the screen -- this will call begin_update(),
- followed by update_row() reapeatedly and after all row
- updating is complete, end_update() */
+ followed by update_row() reapeatedly and after all row
+ updating is complete, end_update() */
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
virtual void device_reset();
virtual void device_post_load();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@@ -183,56 +183,56 @@ protected:
bool m_supports_status_reg_d7;
bool m_supports_transparent;
- devcb_resolved_write_line m_res_out_de_func;
- devcb_resolved_write_line m_res_out_cur_func;
- devcb_resolved_write_line m_res_out_hsync_func;
- devcb_resolved_write_line m_res_out_vsync_func;
+ devcb_resolved_write_line m_res_out_de_func;
+ devcb_resolved_write_line m_res_out_cur_func;
+ devcb_resolved_write_line m_res_out_hsync_func;
+ devcb_resolved_write_line m_res_out_vsync_func;
int m_device_type;
screen_device *m_screen;
/* register file */
- UINT8 m_horiz_char_total; /* 0x00 */
- UINT8 m_horiz_disp; /* 0x01 */
- UINT8 m_horiz_sync_pos; /* 0x02 */
- UINT8 m_sync_width; /* 0x03 */
- UINT8 m_vert_char_total; /* 0x04 */
- UINT8 m_vert_total_adj; /* 0x05 */
- UINT8 m_vert_disp; /* 0x06 */
- UINT8 m_vert_sync_pos; /* 0x07 */
- UINT8 m_mode_control; /* 0x08 */
- UINT8 m_max_ras_addr; /* 0x09 */
- UINT8 m_cursor_start_ras; /* 0x0a */
- UINT8 m_cursor_end_ras; /* 0x0b */
- UINT16 m_disp_start_addr; /* 0x0c/0x0d */
- UINT16 m_cursor_addr; /* 0x0e/0x0f */
- UINT16 m_light_pen_addr; /* 0x10/0x11 */
- UINT16 m_update_addr; /* 0x12/0x13 */
+ UINT8 m_horiz_char_total; /* 0x00 */
+ UINT8 m_horiz_disp; /* 0x01 */
+ UINT8 m_horiz_sync_pos; /* 0x02 */
+ UINT8 m_sync_width; /* 0x03 */
+ UINT8 m_vert_char_total; /* 0x04 */
+ UINT8 m_vert_total_adj; /* 0x05 */
+ UINT8 m_vert_disp; /* 0x06 */
+ UINT8 m_vert_sync_pos; /* 0x07 */
+ UINT8 m_mode_control; /* 0x08 */
+ UINT8 m_max_ras_addr; /* 0x09 */
+ UINT8 m_cursor_start_ras; /* 0x0a */
+ UINT8 m_cursor_end_ras; /* 0x0b */
+ UINT16 m_disp_start_addr; /* 0x0c/0x0d */
+ UINT16 m_cursor_addr; /* 0x0e/0x0f */
+ UINT16 m_light_pen_addr; /* 0x10/0x11 */
+ UINT16 m_update_addr; /* 0x12/0x13 */
/* other internal state */
- UINT8 m_register_address_latch;
- bool m_cursor_state;
- UINT8 m_cursor_blink_count;
- bool m_update_ready_bit;
+ UINT8 m_register_address_latch;
+ bool m_cursor_state;
+ UINT8 m_cursor_blink_count;
+ bool m_update_ready_bit;
/* output signals */
- int m_cur;
- int m_hsync;
- int m_vsync;
- int m_de;
+ int m_cur;
+ int m_hsync;
+ int m_vsync;
+ int m_de;
/* internal counters */
- UINT8 m_character_counter; /* Not used yet */
- UINT8 m_hsync_width_counter; /* Not used yet */
- UINT8 m_line_counter;
- UINT8 m_raster_counter;
- UINT8 m_adjust_counter;
- UINT8 m_vsync_width_counter;
-
- bool m_line_enable_ff; /* Internal flip flop which is set when the line_counter is reset and reset when vert_disp is reached */
- UINT8 m_vsync_ff;
- UINT8 m_adjust_active;
- UINT16 m_line_address;
- INT16 m_cursor_x;
+ UINT8 m_character_counter; /* Not used yet */
+ UINT8 m_hsync_width_counter; /* Not used yet */
+ UINT8 m_line_counter;
+ UINT8 m_raster_counter;
+ UINT8 m_adjust_counter;
+ UINT8 m_vsync_width_counter;
+
+ bool m_line_enable_ff; /* Internal flip flop which is set when the line_counter is reset and reset when vert_disp is reached */
+ UINT8 m_vsync_ff;
+ UINT8 m_adjust_active;
+ UINT16 m_line_address;
+ INT16 m_cursor_x;
/* timers */
static const device_timer_id TIMER_LINE = 0;
@@ -257,19 +257,19 @@ protected:
/* computed values - do NOT state save these! */
/* These computed are used to define the screen parameters for a driver */
- UINT16 m_horiz_pix_total;
- UINT16 m_vert_pix_total;
- UINT16 m_max_visible_x;
- UINT16 m_max_visible_y;
- UINT16 m_hsync_on_pos;
- UINT16 m_hsync_off_pos;
- UINT16 m_vsync_on_pos;
- UINT16 m_vsync_off_pos;
- bool m_has_valid_parameters;
-
- UINT16 m_current_disp_addr; /* the display address currently drawn (used only in mc6845_update) */
-
- bool m_light_pen_latched;
+ UINT16 m_horiz_pix_total;
+ UINT16 m_vert_pix_total;
+ UINT16 m_max_visible_x;
+ UINT16 m_max_visible_y;
+ UINT16 m_hsync_on_pos;
+ UINT16 m_hsync_off_pos;
+ UINT16 m_vsync_on_pos;
+ UINT16 m_vsync_off_pos;
+ bool m_has_valid_parameters;
+
+ UINT16 m_current_disp_addr; /* the display address currently drawn (used only in mc6845_update) */
+
+ bool m_light_pen_latched;
attotime m_upd_time;
void update_upd_adr_timer();
@@ -377,7 +377,7 @@ protected:
};
class mos8563_device : public mc6845_device,
- public device_memory_interface
+ public device_memory_interface
{
public:
mos8563_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
@@ -402,30 +402,30 @@ protected:
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
- const address_space_config m_videoram_space_config;
+ const address_space_config m_videoram_space_config;
UINT8 m_char_buffer[80];
UINT8 m_attr_buffer[80];
- bool m_char_blink_state;
- UINT8 m_char_blink_count;
+ bool m_char_blink_state;
+ UINT8 m_char_blink_count;
/* register file */
- UINT16 m_attribute_addr; /* 0x14/0x15 */
- UINT8 m_horiz_char; /* 0x16 */
- UINT8 m_vert_char_disp; /* 0x17 */
- UINT8 m_vert_scroll; /* 0x18 */
- UINT8 m_horiz_scroll; /* 0x19 */
- UINT8 m_color; /* 0x1a */
- UINT8 m_row_addr_incr; /* 0x1b */
- UINT8 m_char_base_addr; /* 0x1c */
- UINT8 m_underline_ras; /* 0x1d */
- UINT8 m_word_count; /* 0x1e */
- UINT8 m_data; /* 0x1f */
- UINT16 m_block_addr; /* 0x20/0x21 */
- UINT16 m_de_begin; /* 0x22/0x23 */
- UINT8 m_dram_refresh; /* 0x24 */
- UINT8 m_sync_polarity; /* 0x25 */
+ UINT16 m_attribute_addr; /* 0x14/0x15 */
+ UINT8 m_horiz_char; /* 0x16 */
+ UINT8 m_vert_char_disp; /* 0x17 */
+ UINT8 m_vert_scroll; /* 0x18 */
+ UINT8 m_horiz_scroll; /* 0x19 */
+ UINT8 m_color; /* 0x1a */
+ UINT8 m_row_addr_incr; /* 0x1b */
+ UINT8 m_char_base_addr; /* 0x1c */
+ UINT8 m_underline_ras; /* 0x1d */
+ UINT8 m_word_count; /* 0x1e */
+ UINT8 m_data; /* 0x1f */
+ UINT16 m_block_addr; /* 0x20/0x21 */
+ UINT16 m_de_begin; /* 0x22/0x23 */
+ UINT8 m_dram_refresh; /* 0x24 */
+ UINT8 m_sync_polarity; /* 0x25 */
int m_revision;
diff --git a/src/emu/video/msm6255.c b/src/emu/video/msm6255.c
index ee0503763dd..d12a63e9f67 100644
--- a/src/emu/video/msm6255.c
+++ b/src/emu/video/msm6255.c
@@ -34,32 +34,32 @@ enum
};
-#define MOR_GRAPHICS 0x01
-#define MOR_4_BIT_PARALLEL 0x02
-#define MOR_2_BIT_PARALLEL 0x04
-#define MOR_DISPLAY_ON 0x08
-#define MOR_CURSOR_BLINK 0x10
-#define MOR_CURSOR_ON 0x20
-#define MOR_BLINK_TIME_16 0x40
+#define MOR_GRAPHICS 0x01
+#define MOR_4_BIT_PARALLEL 0x02
+#define MOR_2_BIT_PARALLEL 0x04
+#define MOR_DISPLAY_ON 0x08
+#define MOR_CURSOR_BLINK 0x10
+#define MOR_CURSOR_ON 0x20
+#define MOR_BLINK_TIME_16 0x40
-#define PR_HP_4 0x03
-#define PR_HP_5 0x04
-#define PR_HP_6 0x05
-#define PR_HP_7 0x06
-#define PR_HP_8 0x07
-#define PR_HP_MASK 0x07
-#define PR_VP_MASK 0xf0
+#define PR_HP_4 0x03
+#define PR_HP_5 0x04
+#define PR_HP_6 0x05
+#define PR_HP_7 0x06
+#define PR_HP_8 0x07
+#define PR_HP_MASK 0x07
+#define PR_VP_MASK 0xf0
-#define HNR_HN_MASK 0x7f
+#define HNR_HN_MASK 0x7f
-#define DVR_DN_MASK 0x7f
+#define DVR_DN_MASK 0x7f
-#define CPR_CPD_MASK 0x0f
-#define CPR_CPU_MASK 0xf0
+#define CPR_CPD_MASK 0x0f
+#define CPR_CPU_MASK 0xf0
@@ -113,10 +113,10 @@ inline UINT8 msm6255_device::read_byte(UINT16 ma, UINT8 ra)
//-------------------------------------------------
msm6255_device::msm6255_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, MSM6255, "MSM6255", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_space_config("videoram", ENDIANNESS_LITTLE, 8, 20, 0, NULL, *ADDRESS_MAP_NAME(msm6255)),
- m_cursor(0)
+ : device_t(mconfig, MSM6255, "MSM6255", tag, owner, clock),
+ device_memory_interface(mconfig, *this),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 8, 20, 0, NULL, *ADDRESS_MAP_NAME(msm6255)),
+ m_cursor(0)
{
}
diff --git a/src/emu/video/msm6255.h b/src/emu/video/msm6255.h
index 90bdd462b67..fca707db7ea 100644
--- a/src/emu/video/msm6255.h
+++ b/src/emu/video/msm6255.h
@@ -33,23 +33,23 @@
// ======================> msm6255_device
-class msm6255_device : public device_t,
+class msm6255_device : public device_t,
public device_memory_interface
{
public:
- // construction/destruction
- msm6255_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ msm6255_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// inline configuration helpers
static void static_set_config(device_t &device, int char_clock, const char *screen_tag);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
UINT32 screen_update(screen_device &device, bitmap_ind16 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete() { m_shortname = "msm6255"; }
virtual void device_start();
virtual void device_reset();
@@ -70,19 +70,19 @@ private:
screen_device *m_screen;
int m_char_clock;
- UINT8 m_ir; // instruction register
- UINT8 m_mor; // mode control register
- UINT8 m_pr; // character pitch register
- UINT8 m_hnr; // horizontal character number register
- UINT8 m_dvr; // duty number register
- UINT8 m_cpr; // cursor form register
- UINT8 m_slr; // start address (lower) register
- UINT8 m_sur; // start address (upper) register
- UINT8 m_clr; // cursor address (lower) register
- UINT8 m_cur; // cursor address (upper) register
-
- int m_cursor; // is cursor displayed
- int m_frame; // frame counter
+ UINT8 m_ir; // instruction register
+ UINT8 m_mor; // mode control register
+ UINT8 m_pr; // character pitch register
+ UINT8 m_hnr; // horizontal character number register
+ UINT8 m_dvr; // duty number register
+ UINT8 m_cpr; // cursor form register
+ UINT8 m_slr; // start address (lower) register
+ UINT8 m_sur; // start address (upper) register
+ UINT8 m_clr; // cursor address (lower) register
+ UINT8 m_cur; // cursor address (upper) register
+
+ int m_cursor; // is cursor displayed
+ int m_frame; // frame counter
};
diff --git a/src/emu/video/pc_cga.c b/src/emu/video/pc_cga.c
index 5f85ac68114..f73d0896b65 100644
--- a/src/emu/video/pc_cga.c
+++ b/src/emu/video/pc_cga.c
@@ -80,7 +80,7 @@
#include "video/mc6845.h"
#include "video/cgapal.h"
-#define VERBOSE_CGA 0 /* CGA (Color Graphics Adapter) */
+#define VERBOSE_CGA 0 /* CGA (Color Graphics Adapter) */
#define CGA_LOG(N,M,A) \
do { \
@@ -182,15 +182,15 @@ static VIDEO_START( cga_mc1502 );
static const mc6845_interface mc6845_cga_intf =
{
- CGA_SCREEN_NAME, /* screen number */
- 8, /* numbers of pixels per video memory address */
- NULL, /* begin_update */
- cga_update_row, /* update_row */
- NULL, /* end_update */
- DEVCB_NULL, /* on_de_changed */
- DEVCB_NULL, /* on_cur_changed */
- DEVCB_LINE(cga_hsync_changed), /* on_hsync_changed */
- DEVCB_LINE(cga_vsync_changed), /* on_vsync_changed */
+ CGA_SCREEN_NAME, /* screen number */
+ 8, /* numbers of pixels per video memory address */
+ NULL, /* begin_update */
+ cga_update_row, /* update_row */
+ NULL, /* end_update */
+ DEVCB_NULL, /* on_de_changed */
+ DEVCB_NULL, /* on_cur_changed */
+ DEVCB_LINE(cga_hsync_changed), /* on_hsync_changed */
+ DEVCB_LINE(cga_vsync_changed), /* on_vsync_changed */
NULL
};
@@ -253,21 +253,21 @@ MACHINE_CONFIG_END
static struct
{
- UINT8 mode_control; /* wo 0x3d8 */
- UINT8 color_select; /* wo 0x3d9 */
- UINT8 status; /* ro 0x3da */
- UINT8 plantronics; /* wo 0x3dd, ATI chipset only */
+ UINT8 mode_control; /* wo 0x3d8 */
+ UINT8 color_select; /* wo 0x3d9 */
+ UINT8 status; /* ro 0x3da */
+ UINT8 plantronics; /* wo 0x3dd, ATI chipset only */
UINT8 frame;
- UINT8 *chr_gen;
+ UINT8 *chr_gen;
ioport_port *config_input_port;
- mc6845_update_row_func update_row;
- UINT8 palette_lut_2bpp[4];
- UINT8 vsync;
- UINT8 hsync;
+ mc6845_update_row_func update_row;
+ UINT8 palette_lut_2bpp[4];
+ UINT8 vsync;
+ UINT8 hsync;
UINT8 p3df;
size_t videoram_size;
@@ -775,10 +775,10 @@ static const UINT8 yc_lut2[4] = { 0, 182, 71, 255 };
static const UINT8 yc_lut[16][8] =
{
- { 0, 0, 0, 0, 0, 0, 0, 0 }, /* black */
- { 0, 0, 0, 0, 1, 1, 1, 1 }, /* blue */
- { 0, 1, 1, 1, 1, 0, 0, 0 }, /* green */
- { 0, 0, 1, 1, 1, 1, 0, 0 }, /* cyan */
+ { 0, 0, 0, 0, 0, 0, 0, 0 }, /* black */
+ { 0, 0, 0, 0, 1, 1, 1, 1 }, /* blue */
+ { 0, 1, 1, 1, 1, 0, 0, 0 }, /* green */
+ { 0, 0, 1, 1, 1, 1, 0, 0 }, /* cyan */
{ 1, 1, 0, 0, 0, 0, 1, 1 }, /* red */
{ 1, 0, 0, 0, 0, 1, 1, 1 }, /* magenta */
{ 1, 1, 1, 1, 0, 0, 0, 0 }, /* yellow */
@@ -879,7 +879,7 @@ static MC6845_UPDATE_ROW( cga_gfx_1bpp_update_row )
UINT8 *videoram = cga.videoram;
UINT32 *p = &bitmap.pix32(y);
const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
- UINT8 fg = cga.color_select & 0x0F;
+ UINT8 fg = cga.color_select & 0x0F;
int i;
running_machine &machine = device->machine();
@@ -1120,7 +1120,7 @@ static void pc_cga_plantronics_w(running_machine &machine, int data)
if (CGA_CHIPSET != CGA_CHIPSET_ATI) return;
- data &= 0x70; /* Only bits 6-4 are used */
+ data &= 0x70; /* Only bits 6-4 are used */
if (cga.plantronics == data) return;
cga.plantronics = data;
}
@@ -1170,7 +1170,7 @@ static READ8_HANDLER( pc_cga8_r )
case 0x0f:
data = cga.p3df;
break;
- }
+ }
return data;
}
@@ -1445,10 +1445,10 @@ static const UINT8 mc6845_writeonce_register[31] =
static struct
{
- UINT8 write;
- UINT8 read;
- UINT8 mc6845_address;
- UINT8 mc6845_locked_register[31];
+ UINT8 write;
+ UINT8 read;
+ UINT8 mc6845_address;
+ UINT8 mc6845_locked_register[31];
} pc1512;
@@ -1457,7 +1457,7 @@ static MC6845_UPDATE_ROW( pc1512_gfx_4bpp_update_row )
UINT8 *videoram = cga.videoram;
UINT32 *p = &bitmap.pix32(y);
const rgb_t *palette = palette_entry_list_raw(bitmap.palette());
- UINT16 offset_base = ra << 13;
+ UINT16 offset_base = ra << 13;
int j;
running_machine &machine = device->machine();
@@ -1672,5 +1672,3 @@ static SCREEN_UPDATE_RGB32( mc6845_pc1512 )
return 0;
}
-
-
diff --git a/src/emu/video/pc_cga.h b/src/emu/video/pc_cga.h
index a465d42ff7a..416e34998a2 100644
--- a/src/emu/video/pc_cga.h
+++ b/src/emu/video/pc_cga.h
@@ -1,10 +1,10 @@
#include "emu.h"
-#define CGA_PALETTE_SETS 83 /* one for colour, one for mono,
+#define CGA_PALETTE_SETS 83 /* one for colour, one for mono,
* 81 for colour composite */
-#define CGA_SCREEN_NAME "screen"
-#define CGA_MC6845_NAME "mc6845_cga"
+#define CGA_SCREEN_NAME "screen"
+#define CGA_MC6845_NAME "mc6845_cga"
MACHINE_CONFIG_EXTERN( pcvideo_cga );
MACHINE_CONFIG_EXTERN( pcvideo_cga32k );
@@ -25,4 +25,3 @@ DECLARE_WRITE16_HANDLER( pc1512_16le_w );
DECLARE_WRITE16_HANDLER( pc1512_videoram16le_w );
MACHINE_CONFIG_EXTERN( pcvideo_poisk2 );
-
diff --git a/src/emu/video/pc_vga.c b/src/emu/video/pc_vga.c
index 4f65702a454..53c6d0b2976 100644
--- a/src/emu/video/pc_vga.c
+++ b/src/emu/video/pc_vga.c
@@ -29,7 +29,7 @@
- Virtual Pool: ET4k unrecognized;
- California Chase (calchase): various gfx bugs, CPU related?
- Jazz Jackrabbit: status bar is very jerky, but main screen scrolling is fine?
- - Catacombs: weird resolution (untested)
+ - Catacombs: weird resolution (untested)
ROM declarations:
@@ -103,10 +103,10 @@ enum
***************************************************************************/
-#define LOG_ACCESSES 0
-#define LOG_REGISTERS 0
+#define LOG_ACCESSES 0
+#define LOG_REGISTERS 0
-#define LOG_8514 1
+#define LOG_8514 1
/***************************************************************************
@@ -125,62 +125,62 @@ const device_type IBM8514A = &device_creator<ibm8514a_device>;
const device_type MACH8 = &device_creator<mach8_device>;
vga_device::vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, type, name, tag, owner, clock)
+ : device_t(mconfig, type, name, tag, owner, clock)
{
}
vga_device::vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, VGA, "VGA", tag, owner, clock)
+ : device_t(mconfig, VGA, "VGA", tag, owner, clock)
{
}
svga_device::svga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
- : vga_device(mconfig, type, name, tag, owner, clock)
+ : vga_device(mconfig, type, name, tag, owner, clock)
{
}
tseng_vga_device::tseng_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : svga_device(mconfig, TSENG_VGA, "TSENG_VGA", tag, owner, clock)
+ : svga_device(mconfig, TSENG_VGA, "TSENG_VGA", tag, owner, clock)
{
}
trident_vga_device::trident_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : svga_device(mconfig, TRIDENT_VGA, "TRIDENT_VGA", tag, owner, clock)
+ : svga_device(mconfig, TRIDENT_VGA, "TRIDENT_VGA", tag, owner, clock)
{
}
s3_vga_device::s3_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : ati_vga_device(mconfig, S3_VGA, "S3_VGA", tag, owner, clock)
+ : ati_vga_device(mconfig, S3_VGA, "S3_VGA", tag, owner, clock)
{
}
gamtor_vga_device::gamtor_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : svga_device(mconfig, GAMTOR_VGA, "GAMTOR_VGA", tag, owner, clock)
+ : svga_device(mconfig, GAMTOR_VGA, "GAMTOR_VGA", tag, owner, clock)
{
}
ati_vga_device::ati_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : svga_device(mconfig, ATI_VGA, "ATI_VGA", tag, owner, clock)
+ : svga_device(mconfig, ATI_VGA, "ATI_VGA", tag, owner, clock)
{
}
ati_vga_device::ati_vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
- : svga_device(mconfig, type, name, tag, owner, clock)
+ : svga_device(mconfig, type, name, tag, owner, clock)
{
}
cirrus_vga_device::cirrus_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : svga_device(mconfig, CIRRUS_VGA, "CIRRUS_VGA", tag, owner, clock)
+ : svga_device(mconfig, CIRRUS_VGA, "CIRRUS_VGA", tag, owner, clock)
{
}
ibm8514a_device::ibm8514a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, IBM8514A, "IBM8514A", tag, owner, clock)
+ : device_t(mconfig, IBM8514A, "IBM8514A", tag, owner, clock)
{
}
ibm8514a_device::ibm8514a_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, type, name, tag, owner, clock)
+ : device_t(mconfig, type, name, tag, owner, clock)
{
}
@@ -220,7 +220,7 @@ void vga_device::device_start()
vga.svga_intf.seq_regcount = 0x05;
vga.svga_intf.crtc_regcount = 0x19;
- vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
+ vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
m_vblank_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vga_device::vblank_timer_cb),this));
}
@@ -249,7 +249,7 @@ void cirrus_vga_device::device_start()
vga.svga_intf.seq_regcount = 0x08;
vga.svga_intf.crtc_regcount = 0x19;
- vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
+ vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
m_vblank_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vga_device::vblank_timer_cb),this));
}
@@ -317,7 +317,7 @@ void vga_device::vga_vh_text(bitmap_rgb32 &bitmap, const rectangle &cliprect)
vga.cursor.visible = 0;
for (addr = vga.crtc.start_addr, line = -vga.crtc.preset_row_scan; line < TEXT_LINES;
- line += height, addr += TEXT_LINE_LENGTH)
+ line += height, addr += TEXT_LINE_LENGTH)
{
for (pos = addr, column=0; column<TEXT_COLUMNS; column++, pos++)
{
@@ -364,8 +364,8 @@ void vga_device::vga_vh_text(bitmap_rgb32 &bitmap, const rectangle &cliprect)
if (vga.cursor.visible&&(pos==vga.crtc.cursor_addr))
{
for (h=vga.crtc.cursor_scan_start;
- (h<=vga.crtc.cursor_scan_end)&&(h<height)&&(line+h<TEXT_LINES);
- h++)
+ (h<=vga.crtc.cursor_scan_end)&&(h<height)&&(line+h<TEXT_LINES);
+ h++)
{
if(!machine().primary_screen->visible_area().contains(column*width, line+h))
continue;
@@ -384,11 +384,11 @@ void vga_device::vga_vh_ega(bitmap_rgb32 &bitmap, const rectangle &cliprect)
pen_t pen;
int pel_shift = (vga.attribute.pel_shift & 7);
-// popmessage("%08x %02x",EGA_START_ADDRESS,pel_shift);
+// popmessage("%08x %02x",EGA_START_ADDRESS,pel_shift);
/**/
for (addr=EGA_START_ADDRESS, pos=0, line=0; line<LINES;
- line += height, addr += EGA_LINE_LENGTH)
+ line += height, addr += EGA_LINE_LENGTH)
{
for(yi=0;yi<height;yi++)
{
@@ -435,7 +435,7 @@ void vga_device::vga_vh_vga(bitmap_rgb32 &bitmap, const rectangle &cliprect)
/* line compare is screen sensitive */
mask_comp = 0x3ff; //| (LINES & 0x300);
-// popmessage("%02x %02x",vga.attribute.pel_shift,vga.sequencer.data[4] & 0x08);
+// popmessage("%02x %02x",vga.attribute.pel_shift,vga.sequencer.data[4] & 0x08);
curr_addr = 0;
if(!(vga.sequencer.data[4] & 0x08))
@@ -812,8 +812,8 @@ UINT8 vga_device::pc_vga_choosevideomode()
{
/* TODO: color shifters? */
palette_set_color_rgb(machine(), i, (vga.dac.color[i & vga.dac.mask].red & 0x3f) << 2,
- (vga.dac.color[i & vga.dac.mask].green & 0x3f) << 2,
- (vga.dac.color[i & vga.dac.mask].blue & 0x3f) << 2);
+ (vga.dac.color[i & vga.dac.mask].green & 0x3f) << 2,
+ (vga.dac.color[i & vga.dac.mask].blue & 0x3f) << 2);
}
vga.dac.dirty = 0;
}
@@ -823,7 +823,7 @@ UINT8 vga_device::pc_vga_choosevideomode()
for (i=0; i<16;i++)
{
vga.pens[i] = machine().pens[(vga.attribute.data[i]&0x0f)
- |((vga.attribute.data[0x14]&0xf)<<4)];
+ |((vga.attribute.data[0x14]&0xf)<<4)];
}
}
else
@@ -831,7 +831,7 @@ UINT8 vga_device::pc_vga_choosevideomode()
for (i=0; i<16;i++)
{
vga.pens[i]=machine().pens[(vga.attribute.data[i]&0x3f)
- |((vga.attribute.data[0x14]&0xc)<<4)];
+ |((vga.attribute.data[0x14]&0xc)<<4)];
}
}
@@ -873,8 +873,8 @@ UINT8 svga_device::pc_vga_choosevideomode()
{
/* TODO: color shifters? */
palette_set_color_rgb(machine(), i, (vga.dac.color[i & vga.dac.mask].red & 0x3f) << 2,
- (vga.dac.color[i & vga.dac.mask].green & 0x3f) << 2,
- (vga.dac.color[i & vga.dac.mask].blue & 0x3f) << 2);
+ (vga.dac.color[i & vga.dac.mask].green & 0x3f) << 2,
+ (vga.dac.color[i & vga.dac.mask].blue & 0x3f) << 2);
}
vga.dac.dirty = 0;
}
@@ -884,7 +884,7 @@ UINT8 svga_device::pc_vga_choosevideomode()
for (i=0; i<16;i++)
{
vga.pens[i] = machine().pens[(vga.attribute.data[i]&0x0f)
- |((vga.attribute.data[0x14]&0xf)<<4)];
+ |((vga.attribute.data[0x14]&0xf)<<4)];
}
}
else
@@ -892,7 +892,7 @@ UINT8 svga_device::pc_vga_choosevideomode()
for (i=0; i<16;i++)
{
vga.pens[i]=machine().pens[(vga.attribute.data[i]&0x3f)
- |((vga.attribute.data[0x14]&0xc)<<4)];
+ |((vga.attribute.data[0x14]&0xc)<<4)];
}
}
@@ -1036,7 +1036,7 @@ UINT32 s3_vga_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap,
}
//popmessage("%08x %08x",(s3.cursor_bg[0])|(s3.cursor_bg[1]<<8)|(s3.cursor_bg[2]<<16)|(s3.cursor_bg[3]<<24)
- // ,(s3.cursor_fg[0])|(s3.cursor_fg[1]<<8)|(s3.cursor_fg[2]<<16)|(s3.cursor_fg[3]<<24));
+ // ,(s3.cursor_fg[0])|(s3.cursor_fg[1]<<8)|(s3.cursor_fg[2]<<16)|(s3.cursor_fg[3]<<24));
// for(x=0;x<64;x++)
// printf("%08x: %02x %02x %02x %02x\n",src+x*4,vga.memory[src+x*4],vga.memory[src+x*4+1],vga.memory[src+x*4+2],vga.memory[src+x*4+3]);
for(y=0;y<64;y++)
@@ -1454,7 +1454,7 @@ void vga_device::seq_reg_write(UINT8 index, UINT8 data)
break;
case 0x03:
/* --2- 84-- character select A
- ---2 --84 character select B */
+ ---2 --84 character select B */
vga.sequencer.char_sel.A = (((data & 0xc) >> 2)<<1) | ((data & 0x20) >> 5);
vga.sequencer.char_sel.B = (((data & 0x3) >> 0)<<1) | ((data & 0x10) >> 4);
if(data)
@@ -2077,13 +2077,13 @@ WRITE8_MEMBER(vga_device::mem_linear_w)
static struct eeprom_interface ati_eeprom_interface =
{
- 6, /* address bits */
- 16, /* data bits */
- "*110", /* read command */
- "*101", /* write command */
- "*111", /* erase command */
- "*10000xxxx", // lock 1 00 00xxxx
- "*10011xxxx" // unlock 1 00 11xxxx
+ 6, /* address bits */
+ 16, /* data bits */
+ "*110", /* read command */
+ "*101", /* write command */
+ "*111", /* erase command */
+ "*10000xxxx", // lock 1 00 00xxxx
+ "*10011xxxx" // unlock 1 00 11xxxx
};
MACHINE_CONFIG_FRAGMENT( pcvideo_vga )
@@ -3405,7 +3405,7 @@ void ibm8514a_device::ibm8514_write(UINT32 offset, UINT32 src)
if((ibm8514.current_cmd & 0x1000) && (data_size != 8))
{
xfer = ((ibm8514.pixel_xfer & 0x000000ff) << 8) | ((ibm8514.pixel_xfer & 0x0000ff00) >> 8)
- | ((ibm8514.pixel_xfer & 0x00ff0000) << 8) | ((ibm8514.pixel_xfer & 0xff000000) >> 8);
+ | ((ibm8514.pixel_xfer & 0x00ff0000) << 8) | ((ibm8514.pixel_xfer & 0xff000000) >> 8);
}
else
xfer = ibm8514.pixel_xfer;
@@ -5416,16 +5416,16 @@ void cirrus_vga_device::cirrus_define_video_mode()
{
switch(vga.sequencer.data[0x07] & 0x0E)
{
- case 0x00: svga.rgb8_en = 1; break;
- case 0x02: svga.rgb16_en = 1; break; //double VCLK
- case 0x04: svga.rgb24_en = 1; break;
- case 0x06: svga.rgb16_en = 1; break;
- case 0x08: svga.rgb32_en = 1; break;
+ case 0x00: svga.rgb8_en = 1; break;
+ case 0x02: svga.rgb16_en = 1; break; //double VCLK
+ case 0x04: svga.rgb24_en = 1; break;
+ case 0x06: svga.rgb16_en = 1; break;
+ case 0x08: svga.rgb32_en = 1; break;
}
}
}
- UINT8 cirrus_vga_device::cirrus_seq_reg_read(UINT8 index)
+ UINT8 cirrus_vga_device::cirrus_seq_reg_read(UINT8 index)
{
UINT8 res;
diff --git a/src/emu/video/pc_vga.h b/src/emu/video/pc_vga.h
index e1e7f5d008e..8ca48c6c218 100644
--- a/src/emu/video/pc_vga.h
+++ b/src/emu/video/pc_vga.h
@@ -21,8 +21,8 @@ class vga_device : public device_t
friend class ibm8514a_device;
public:
- // construction/destruction
- vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
@@ -40,9 +40,9 @@ public:
virtual WRITE8_MEMBER(mem_linear_w);
virtual TIMER_CALLBACK_MEMBER(vblank_timer_cb);
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
void vga_vh_text(bitmap_rgb32 &bitmap, const rectangle &cliprect);
void vga_vh_ega(bitmap_rgb32 &bitmap, const rectangle &cliprect);
@@ -101,44 +101,44 @@ protected:
UINT8 data[0x100];
UINT16 horz_total;
UINT16 horz_disp_end;
- /**/ UINT8 horz_blank_start;
- /**/ UINT8 horz_blank_end;
- /**/ UINT8 horz_retrace_start;
- /**/ UINT8 horz_retrace_skew;
- /**/ UINT8 horz_retrace_end;
- /**/ UINT8 disp_enable_skew;
- /**/ UINT8 evra;
+ /**/ UINT8 horz_blank_start;
+ /**/ UINT8 horz_blank_end;
+ /**/ UINT8 horz_retrace_start;
+ /**/ UINT8 horz_retrace_skew;
+ /**/ UINT8 horz_retrace_end;
+ /**/ UINT8 disp_enable_skew;
+ /**/ UINT8 evra;
UINT16 vert_total;
UINT16 vert_disp_end;
- /**/ UINT16 vert_retrace_start;
- /**/ UINT8 vert_retrace_end;
- /**/ UINT16 vert_blank_start;
+ /**/ UINT16 vert_retrace_start;
+ /**/ UINT8 vert_retrace_end;
+ /**/ UINT16 vert_blank_start;
UINT16 line_compare;
- /**/ UINT32 cursor_addr;
- /**/ UINT8 byte_panning;
- /**/ UINT8 preset_row_scan;
+ /**/ UINT32 cursor_addr;
+ /**/ UINT8 byte_panning;
+ /**/ UINT8 preset_row_scan;
UINT8 scan_doubling;
- /**/ UINT8 maximum_scan_line;
- /**/ UINT8 cursor_enable;
- /**/ UINT8 cursor_scan_start;
- /**/ UINT8 cursor_skew;
- /**/ UINT8 cursor_scan_end;
+ /**/ UINT8 maximum_scan_line;
+ /**/ UINT8 cursor_enable;
+ /**/ UINT8 cursor_scan_start;
+ /**/ UINT8 cursor_skew;
+ /**/ UINT8 cursor_scan_end;
UINT32 start_addr;
UINT32 start_addr_latch;
- /**/ UINT8 protect_enable;
- /**/ UINT8 bandwidth;
- /**/ UINT8 offset;
- /**/ UINT8 word_mode;
- /**/ UINT8 dw;
- /**/ UINT8 div4;
- /**/ UINT8 underline_loc;
- /**/ UINT8 vert_blank_end;
+ /**/ UINT8 protect_enable;
+ /**/ UINT8 bandwidth;
+ /**/ UINT8 offset;
+ /**/ UINT8 word_mode;
+ /**/ UINT8 dw;
+ /**/ UINT8 div4;
+ /**/ UINT8 underline_loc;
+ /**/ UINT8 vert_blank_end;
UINT8 sync_en;
- /**/ UINT8 aw;
- /**/ UINT8 div2;
- /**/ UINT8 sldiv;
- /**/ UINT8 map14;
- /**/ UINT8 map13;
+ /**/ UINT8 aw;
+ /**/ UINT8 div2;
+ /**/ UINT8 sldiv;
+ /**/ UINT8 map14;
+ /**/ UINT8 map13;
} crtc;
struct
@@ -199,7 +199,7 @@ extern const device_type VGA;
class svga_device : public vga_device
{
public:
- // construction/destruction
+ // construction/destruction
svga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
@@ -410,8 +410,8 @@ extern const device_type MACH8;
class tseng_vga_device : public svga_device
{
public:
- // construction/destruction
- tseng_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ tseng_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual READ8_MEMBER(port_03b0_r);
virtual WRITE8_MEMBER(port_03b0_w);
@@ -453,8 +453,8 @@ extern const device_type TSENG_VGA;
class trident_vga_device : public svga_device
{
public:
- // construction/destruction
- trident_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ trident_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual READ8_MEMBER(port_03c0_r);
virtual WRITE8_MEMBER(port_03c0_w);
@@ -481,9 +481,9 @@ extern const device_type TRIDENT_VGA;
class ati_vga_device : public svga_device
{
public:
- // construction/destruction
- ati_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- ati_vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ati_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ ati_vga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
virtual READ8_MEMBER(mem_r);
virtual WRITE8_MEMBER(mem_w);
@@ -497,7 +497,7 @@ public:
mach8_device* get_8514() { return m_8514; }
protected:
- virtual void device_start();
+ virtual void device_start();
private:
void ati_define_video_mode();
struct
@@ -517,8 +517,8 @@ extern const device_type ATI_VGA;
class s3_vga_device : public ati_vga_device
{
public:
- // construction/destruction
- s3_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ s3_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual READ8_MEMBER(port_03b0_r);
virtual WRITE8_MEMBER(port_03b0_w);
@@ -535,8 +535,8 @@ public:
ibm8514a_device* get_8514() { return m_8514; }
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
struct
{
UINT8 memory_config;
@@ -582,8 +582,8 @@ extern const device_type S3_VGA;
class gamtor_vga_device : public svga_device
{
public:
- // construction/destruction
- gamtor_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ gamtor_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual READ8_MEMBER(port_03b0_r);
@@ -608,14 +608,14 @@ extern const device_type GAMTOR_VGA;
class cirrus_vga_device : public svga_device
{
public:
- // construction/destruction
- cirrus_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ cirrus_vga_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual READ8_MEMBER(port_03c0_r);
virtual WRITE8_MEMBER(port_03c0_w);
protected:
// device-level overrides
- virtual void device_start();
+ virtual void device_start();
private:
void cirrus_define_video_mode();
UINT8 cirrus_seq_reg_read(UINT8 index);
@@ -666,4 +666,3 @@ extern const device_type CIRRUS_VGA;
#endif /* PC_VGA_H */
-
diff --git a/src/emu/video/poly.c b/src/emu/video/poly.c
index 6813295182c..9f3936947f4 100644
--- a/src/emu/video/poly.c
+++ b/src/emu/video/poly.c
@@ -15,13 +15,13 @@
***************************************************************************/
/* keep statistics */
-#define KEEP_STATISTICS 0
+#define KEEP_STATISTICS 0
/* turn this on to log the reasons for any long waits */
-#define LOG_WAITS 0
+#define LOG_WAITS 0
/* number of profiling ticks before we consider a wait "long" */
-#define LOG_WAIT_THRESHOLD 1000
+#define LOG_WAIT_THRESHOLD 1000
@@ -29,10 +29,10 @@
CONSTANTS
***************************************************************************/
-#define SCANLINES_PER_BUCKET 8
-#define CACHE_LINE_SIZE 64 /* this is a general guess */
-#define TOTAL_BUCKETS (512 / SCANLINES_PER_BUCKET)
-#define UNITS_PER_POLY (100 / SCANLINES_PER_BUCKET)
+#define SCANLINES_PER_BUCKET 8
+#define CACHE_LINE_SIZE 64 /* this is a general guess */
+#define TOTAL_BUCKETS (512 / SCANLINES_PER_BUCKET)
+#define UNITS_PER_POLY (100 / SCANLINES_PER_BUCKET)
@@ -47,50 +47,50 @@ struct polygon_info;
/* tri_extent describes start/end points for a scanline */
struct tri_extent
{
- INT16 startx; /* starting X coordinate (inclusive) */
- INT16 stopx; /* ending X coordinate (exclusive) */
+ INT16 startx; /* starting X coordinate (inclusive) */
+ INT16 stopx; /* ending X coordinate (exclusive) */
};
/* single set of polygon per-parameter data */
struct poly_param
{
- float start; /* parameter value at starting X,Y */
- float dpdx; /* dp/dx relative to starting X */
- float dpdy; /* dp/dy relative to starting Y */
+ float start; /* parameter value at starting X,Y */
+ float dpdx; /* dp/dx relative to starting X */
+ float dpdy; /* dp/dy relative to starting Y */
};
/* poly edge is used internally for quad rendering */
struct poly_edge
{
- poly_edge * next; /* next edge in sequence */
- int index; /* index of this edge */
- const poly_vertex * v1; /* pointer to first vertex */
- const poly_vertex * v2; /* pointer to second vertex */
- float dxdy; /* dx/dy along the edge */
- float dpdy[MAX_VERTEX_PARAMS];/* per-parameter dp/dy values */
+ poly_edge * next; /* next edge in sequence */
+ int index; /* index of this edge */
+ const poly_vertex * v1; /* pointer to first vertex */
+ const poly_vertex * v2; /* pointer to second vertex */
+ float dxdy; /* dx/dy along the edge */
+ float dpdy[MAX_VERTEX_PARAMS];/* per-parameter dp/dy values */
};
/* poly section is used internally for quad rendering */
struct poly_section
{
- const poly_edge * ledge; /* pointer to left edge */
- const poly_edge * redge; /* pointer to right edge */
- float ybottom; /* bottom of this section */
+ const poly_edge * ledge; /* pointer to left edge */
+ const poly_edge * redge; /* pointer to right edge */
+ float ybottom; /* bottom of this section */
};
/* work_unit_shared is a common set of data shared between tris and quads */
struct work_unit_shared
{
- polygon_info * polygon; /* pointer to polygon */
- volatile UINT32 count_next; /* number of scanlines and index of next item to process */
- INT16 scanline; /* starting scanline and count */
- UINT16 previtem; /* index of previous item in the same bucket */
+ polygon_info * polygon; /* pointer to polygon */
+ volatile UINT32 count_next; /* number of scanlines and index of next item to process */
+ INT16 scanline; /* starting scanline and count */
+ UINT16 previtem; /* index of previous item in the same bucket */
#ifndef PTR64
- UINT32 dummy; /* pad to 16 bytes */
+ UINT32 dummy; /* pad to 16 bytes */
#endif
};
@@ -98,40 +98,40 @@ struct work_unit_shared
/* tri_work_unit is a triangle-specific work-unit */
struct tri_work_unit
{
- work_unit_shared shared; /* shared data */
- tri_extent extent[SCANLINES_PER_BUCKET]; /* array of scanline extents */
+ work_unit_shared shared; /* shared data */
+ tri_extent extent[SCANLINES_PER_BUCKET]; /* array of scanline extents */
};
/* quad_work_unit is a quad-specific work-unit */
struct quad_work_unit
{
- work_unit_shared shared; /* shared data */
- poly_extent extent[SCANLINES_PER_BUCKET]; /* array of scanline extents */
+ work_unit_shared shared; /* shared data */
+ poly_extent extent[SCANLINES_PER_BUCKET]; /* array of scanline extents */
};
/* work_unit is a union of the two types */
union work_unit
{
- work_unit_shared shared; /* shared data */
- tri_work_unit tri; /* triangle work unit */
- quad_work_unit quad; /* quad work unit */
+ work_unit_shared shared; /* shared data */
+ tri_work_unit tri; /* triangle work unit */
+ quad_work_unit quad; /* quad work unit */
};
/* polygon_info describes a single polygon, which includes the poly_params */
struct polygon_info
{
- poly_manager * poly; /* pointer back to the poly manager */
- void * dest; /* pointer to the destination we are rendering to */
- void * extra; /* extra data pointer */
- UINT8 numparams; /* number of parameters for this polygon */
- UINT8 numverts; /* number of vertices in this polygon */
- poly_draw_scanline_func callback; /* callback to handle a scanline's worth of work */
- INT32 xorigin; /* X origin for all parameters */
- INT32 yorigin; /* Y origin for all parameters */
- poly_param param[MAX_VERTEX_PARAMS];/* array of parameter data */
+ poly_manager * poly; /* pointer back to the poly manager */
+ void * dest; /* pointer to the destination we are rendering to */
+ void * extra; /* extra data pointer */
+ UINT8 numparams; /* number of parameters for this polygon */
+ UINT8 numverts; /* number of vertices in this polygon */
+ poly_draw_scanline_func callback; /* callback to handle a scanline's worth of work */
+ INT32 xorigin; /* X origin for all parameters */
+ INT32 yorigin; /* Y origin for all parameters */
+ poly_param param[MAX_VERTEX_PARAMS];/* array of parameter data */
};
@@ -139,50 +139,50 @@ struct polygon_info
struct poly_manager
{
/* queue management */
- osd_work_queue * queue; /* work queue */
+ osd_work_queue * queue; /* work queue */
/* triangle work units */
- work_unit ** unit; /* array of work unit pointers */
- UINT32 unit_next; /* index of next unit to allocate */
- UINT32 unit_count; /* number of work units available */
- size_t unit_size; /* size of each work unit, in bytes */
+ work_unit ** unit; /* array of work unit pointers */
+ UINT32 unit_next; /* index of next unit to allocate */
+ UINT32 unit_count; /* number of work units available */
+ size_t unit_size; /* size of each work unit, in bytes */
/* quad work units */
- UINT32 quadunit_next; /* index of next unit to allocate */
- UINT32 quadunit_count; /* number of work units available */
- size_t quadunit_size; /* size of each work unit, in bytes */
+ UINT32 quadunit_next; /* index of next unit to allocate */
+ UINT32 quadunit_count; /* number of work units available */
+ size_t quadunit_size; /* size of each work unit, in bytes */
/* poly data */
- polygon_info ** polygon; /* array of polygon pointers */
- UINT32 polygon_next; /* index of next polygon to allocate */
- UINT32 polygon_count; /* number of polygon items available */
- size_t polygon_size; /* size of each polygon, in bytes */
+ polygon_info ** polygon; /* array of polygon pointers */
+ UINT32 polygon_next; /* index of next polygon to allocate */
+ UINT32 polygon_count; /* number of polygon items available */
+ size_t polygon_size; /* size of each polygon, in bytes */
/* extra data */
- void ** extra; /* array of extra data pointers */
- UINT32 extra_next; /* index of next extra data to allocate */
- UINT32 extra_count; /* number of extra data items available */
- size_t extra_size; /* size of each extra data, in bytes */
+ void ** extra; /* array of extra data pointers */
+ UINT32 extra_next; /* index of next extra data to allocate */
+ UINT32 extra_count; /* number of extra data items available */
+ size_t extra_size; /* size of each extra data, in bytes */
/* misc data */
- UINT8 flags; /* flags */
+ UINT8 flags; /* flags */
/* buckets */
- UINT16 unit_bucket[TOTAL_BUCKETS]; /* buckets for tracking unit usage */
+ UINT16 unit_bucket[TOTAL_BUCKETS]; /* buckets for tracking unit usage */
/* statistics */
- UINT32 triangles; /* number of triangles queued */
- UINT32 quads; /* number of quads queued */
- UINT64 pixels; /* number of pixels rendered */
+ UINT32 triangles; /* number of triangles queued */
+ UINT32 quads; /* number of quads queued */
+ UINT64 pixels; /* number of pixels rendered */
#if KEEP_STATISTICS
- UINT32 unit_waits; /* number of times we waited for a unit */
- UINT32 unit_max; /* maximum units used */
- UINT32 polygon_waits; /* number of times we waited for a polygon */
- UINT32 polygon_max; /* maximum polygons used */
- UINT32 extra_waits; /* number of times we waited for an extra data */
- UINT32 extra_max; /* maximum extra data used */
- UINT32 conflicts[WORK_MAX_THREADS]; /* number of conflicts found, per thread */
- UINT32 resolved[WORK_MAX_THREADS]; /* number of conflicts resolved, per thread */
+ UINT32 unit_waits; /* number of times we waited for a unit */
+ UINT32 unit_max; /* maximum units used */
+ UINT32 polygon_waits; /* number of times we waited for a polygon */
+ UINT32 polygon_max; /* maximum polygons used */
+ UINT32 extra_waits; /* number of times we waited for an extra data */
+ UINT32 extra_max; /* maximum extra data used */
+ UINT32 conflicts[WORK_MAX_THREADS]; /* number of conflicts found, per thread */
+ UINT32 resolved[WORK_MAX_THREADS]; /* number of conflicts resolved, per thread */
#endif
};
diff --git a/src/emu/video/poly.h b/src/emu/video/poly.h
index b9038970331..bd314822133 100644
--- a/src/emu/video/poly.h
+++ b/src/emu/video/poly.h
@@ -40,13 +40,13 @@
CONSTANTS
***************************************************************************/
-#define MAX_VERTEX_PARAMS 6
-#define MAX_POLYGON_VERTS 32
+#define MAX_VERTEX_PARAMS 6
+#define MAX_POLYGON_VERTS 32
-#define POLYFLAG_INCLUDE_BOTTOM_EDGE 0x01
-#define POLYFLAG_INCLUDE_RIGHT_EDGE 0x02
-#define POLYFLAG_NO_WORK_QUEUE 0x04
-#define POLYFLAG_ALLOW_QUADS 0x08
+#define POLYFLAG_INCLUDE_BOTTOM_EDGE 0x01
+#define POLYFLAG_INCLUDE_RIGHT_EDGE 0x02
+#define POLYFLAG_NO_WORK_QUEUE 0x04
+#define POLYFLAG_ALLOW_QUADS 0x08
@@ -61,26 +61,26 @@ struct poly_manager;
/* input vertex data */
struct poly_vertex
{
- float x; /* X coordinate */
- float y; /* Y coordinate */
- float p[MAX_VERTEX_PARAMS]; /* interpolated parameter values */
+ float x; /* X coordinate */
+ float y; /* Y coordinate */
+ float p[MAX_VERTEX_PARAMS]; /* interpolated parameter values */
};
/* poly_param_extent describes information for a single parameter in an extent */
struct poly_param_extent
{
- float start; /* parameter value at starting X,Y */
- float dpdx; /* dp/dx relative to starting X */
+ float start; /* parameter value at starting X,Y */
+ float dpdx; /* dp/dx relative to starting X */
};
/* poly_extent describes start/end points for a scanline, along with per-scanline parameters */
struct poly_extent
{
- INT16 startx; /* starting X coordinate (inclusive) */
- INT16 stopx; /* ending X coordinate (exclusive) */
- poly_param_extent param[MAX_VERTEX_PARAMS]; /* starting and dx values for each parameter */
+ INT16 startx; /* starting X coordinate (inclusive) */
+ INT16 stopx; /* ending X coordinate (exclusive) */
+ poly_param_extent param[MAX_VERTEX_PARAMS]; /* starting and dx values for each parameter */
};
@@ -150,4 +150,4 @@ UINT32 poly_render_polygon(poly_manager *poly, void *dest, const rectangle &clip
int poly_zclip_if_less(int numverts, const poly_vertex *v, poly_vertex *outv, int paramcount, float clipval);
-#endif /* __POLY_H__ */
+#endif /* __POLY_H__ */
diff --git a/src/emu/video/polynew.h b/src/emu/video/polynew.h
index 926f1efed58..ab09a67b67d 100644
--- a/src/emu/video/polynew.h
+++ b/src/emu/video/polynew.h
@@ -41,13 +41,13 @@
//**************************************************************************
// keep statistics
-#define KEEP_STATISTICS 0
+#define KEEP_STATISTICS 0
// turn this on to log the reasons for any long waits
-#define LOG_WAITS 0
+#define LOG_WAITS 0
// number of profiling ticks before we consider a wait "long"
-#define LOG_WAIT_THRESHOLD 1000
+#define LOG_WAIT_THRESHOLD 1000
@@ -55,14 +55,14 @@
CONSTANTS
***************************************************************************/
-#define POLYFLAG_INCLUDE_BOTTOM_EDGE 0x01
-#define POLYFLAG_INCLUDE_RIGHT_EDGE 0x02
-#define POLYFLAG_NO_WORK_QUEUE 0x04
+#define POLYFLAG_INCLUDE_BOTTOM_EDGE 0x01
+#define POLYFLAG_INCLUDE_RIGHT_EDGE 0x02
+#define POLYFLAG_NO_WORK_QUEUE 0x04
-#define SCANLINES_PER_BUCKET 8
-#define CACHE_LINE_SIZE 64 // this is a general guess
-#define TOTAL_BUCKETS (512 / SCANLINES_PER_BUCKET)
-#define UNITS_PER_POLY (100 / SCANLINES_PER_BUCKET)
+#define SCANLINES_PER_BUCKET 8
+#define CACHE_LINE_SIZE 64 // this is a general guess
+#define TOTAL_BUCKETS (512 / SCANLINES_PER_BUCKET)
+#define UNITS_PER_POLY (100 / SCANLINES_PER_BUCKET)
@@ -99,20 +99,20 @@ public:
vertex_t() { }
vertex_t(_BaseType _x, _BaseType _y) { x = _x; y = _y; }
- _BaseType x, y; // X, Y coordinates
- _BaseType p[_MaxParams]; // interpolated parameters
+ _BaseType x, y; // X, Y coordinates
+ _BaseType p[_MaxParams]; // interpolated parameters
};
// a single extent describes a span and a list of parameter extents
struct extent_t
{
- INT16 startx, stopx; // starting (inclusive)/ending (exclusive) endpoints
+ INT16 startx, stopx; // starting (inclusive)/ending (exclusive) endpoints
struct
{
- _BaseType start; // parameter value at start
- _BaseType dpdx; // dp/dx relative to start
+ _BaseType start; // parameter value at start
+ _BaseType dpdx; // dp/dx relative to start
} param[_MaxParams];
- void *userdata; // custom per-span data
+ void *userdata; // custom per-span data
};
// delegate type for scanline callbacks
@@ -152,22 +152,22 @@ private:
// polygon_info describes a single polygon, which includes the poly_params
struct polygon_info
{
- poly_manager * m_owner; // pointer back to the poly manager
- _ObjectData * m_object; // object data pointer
- render_delegate m_callback; // callback to handle a scanline's worth of work
+ poly_manager * m_owner; // pointer back to the poly manager
+ _ObjectData * m_object; // object data pointer
+ render_delegate m_callback; // callback to handle a scanline's worth of work
};
// internal unit of work
struct work_unit
{
- volatile UINT32 count_next; // number of scanlines and index of next item to process
- polygon_info * polygon; // pointer to polygon
- INT16 scanline; // starting scanline
- UINT16 previtem; // index of previous item in the same bucket
+ volatile UINT32 count_next; // number of scanlines and index of next item to process
+ polygon_info * polygon; // pointer to polygon
+ INT16 scanline; // starting scanline
+ UINT16 previtem; // index of previous item in the same bucket
#ifndef PTR64
- UINT32 dummy; // pad to 16 bytes
+ UINT32 dummy; // pad to 16 bytes
#endif
- extent_t extent[SCANLINES_PER_BUCKET]; // array of scanline extents
+ extent_t extent[SCANLINES_PER_BUCKET]; // array of scanline extents
};
// class for managing an array of items
@@ -181,10 +181,10 @@ private:
// construction
poly_array(running_machine &machine, poly_manager &manager)
: m_manager(manager),
- m_base(auto_alloc_array_clear(machine, UINT8, k_itemsize * _Count)),
- m_next(0),
- m_max(0),
- m_waits(0) { }
+ m_base(auto_alloc_array_clear(machine, UINT8, k_itemsize * _Count)),
+ m_next(0),
+ m_max(0),
+ m_waits(0) { }
// destruction
~poly_array() { auto_free(m_manager.machine(), m_base); }
@@ -208,11 +208,11 @@ private:
private:
// internal state
- poly_manager & m_manager;
- UINT8 * m_base;
- int m_next;
- int m_max;
- int m_waits;
+ poly_manager & m_manager;
+ UINT8 * m_base;
+ int m_next;
+ int m_max;
+ int m_waits;
};
// internal array types
@@ -246,28 +246,28 @@ private:
void presave() { wait("pre-save"); }
// queue management
- running_machine & m_machine;
- osd_work_queue * m_queue; // work queue
+ running_machine & m_machine;
+ osd_work_queue * m_queue; // work queue
// arrays
- polygon_array m_polygon; // array of polygons
- objectdata_array m_object; // array of object data
- unit_array m_unit; // array of work units
+ polygon_array m_polygon; // array of polygons
+ objectdata_array m_object; // array of object data
+ unit_array m_unit; // array of work units
// misc data
- UINT8 m_flags; // flags
+ UINT8 m_flags; // flags
// buckets
- UINT16 m_unit_bucket[TOTAL_BUCKETS]; // buckets for tracking unit usage
+ UINT16 m_unit_bucket[TOTAL_BUCKETS]; // buckets for tracking unit usage
// statistics
- UINT32 m_tiles; // number of tiles queued
- UINT32 m_triangles; // number of triangles queued
- UINT32 m_quads; // number of quads queued
- UINT64 m_pixels; // number of pixels rendered
+ UINT32 m_tiles; // number of tiles queued
+ UINT32 m_triangles; // number of triangles queued
+ UINT32 m_quads; // number of quads queued
+ UINT64 m_pixels; // number of pixels rendered
#if KEEP_STATISTICS
- UINT32 m_conflicts[WORK_MAX_THREADS]; // number of conflicts found, per thread
- UINT32 m_resolved[WORK_MAX_THREADS]; // number of conflicts resolved, per thread
+ UINT32 m_conflicts[WORK_MAX_THREADS]; // number of conflicts found, per thread
+ UINT32 m_resolved[WORK_MAX_THREADS]; // number of conflicts resolved, per thread
#endif
};
@@ -279,14 +279,14 @@ private:
template<typename _BaseType, class _ObjectData, int _MaxParams, int _MaxPolys>
poly_manager<_BaseType, _ObjectData, _MaxParams, _MaxPolys>::poly_manager(running_machine &machine, UINT8 flags)
: m_machine(machine),
- m_queue(NULL),
- m_polygon(machine, *this),
- m_object(machine, *this),
- m_unit(machine, *this),
- m_flags(flags),
- m_triangles(0),
- m_quads(0),
- m_pixels(0)
+ m_queue(NULL),
+ m_polygon(machine, *this),
+ m_object(machine, *this),
+ m_unit(machine, *this),
+ m_flags(flags),
+ m_triangles(0),
+ m_quads(0),
+ m_pixels(0)
{
#if KEEP_STATISTICS
memset(m_conflicts, 0, sizeof(m_conflicts));
@@ -690,12 +690,12 @@ UINT32 poly_manager<_BaseType, _ObjectData, _MaxParams, _MaxPolys>::render_trian
}
}
}
- else // GCC 4.7.0 incorrectly claims these are uninitialized; humor it by initializing in the (hopefully rare) zero parameter case
- {
- param_start[0] = _BaseType(0.0);
- param_dpdx[0] = _BaseType(0.0);
- param_dpdy[0] = _BaseType(0.0);
- }
+ else // GCC 4.7.0 incorrectly claims these are uninitialized; humor it by initializing in the (hopefully rare) zero parameter case
+ {
+ param_start[0] = _BaseType(0.0);
+ param_dpdx[0] = _BaseType(0.0);
+ param_dpdy[0] = _BaseType(0.0);
+ }
// compute the X extents for each scanline
INT32 pixels = 0;
@@ -941,12 +941,12 @@ UINT32 poly_manager<_BaseType, _ObjectData, _MaxParams, _MaxPolys>::render_polyg
// walk forward to build up the forward edge list
struct poly_edge
{
- poly_edge * next; // next edge in sequence
- int index; // index of this edge
- const vertex_t * v1; // pointer to first vertex
- const vertex_t * v2; // pointer to second vertex
- _BaseType dxdy; // dx/dy along the edge
- _BaseType dpdy[_MaxParams]; // per-parameter dp/dy values
+ poly_edge * next; // next edge in sequence
+ int index; // index of this edge
+ const vertex_t * v1; // pointer to first vertex
+ const vertex_t * v2; // pointer to second vertex
+ _BaseType dxdy; // dx/dy along the edge
+ _BaseType dpdy[_MaxParams]; // per-parameter dp/dy values
};
poly_edge fedgelist[_NumVerts - 1];
poly_edge *edgeptr = &fedgelist[0];
@@ -1135,4 +1135,4 @@ int poly_manager<_BaseType, _ObjectData, _MaxParams, _MaxPolys>::zclip_if_less(i
return nextout - outv;
}
-#endif // __POLYNEW_H__
+#endif // __POLYNEW_H__
diff --git a/src/emu/video/psx.c b/src/emu/video/psx.c
index ebc4cb0993c..2cf14f30a99 100644
--- a/src/emu/video/psx.c
+++ b/src/emu/video/psx.c
@@ -44,32 +44,32 @@ void psxgpu_device::device_reset( void )
}
cxd8514q_device::cxd8514q_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : psxgpu_device(mconfig, CXD8514Q, "CXD8514Q", tag, owner, clock)
+ : psxgpu_device(mconfig, CXD8514Q, "CXD8514Q", tag, owner, clock)
{
}
cxd8538q_device::cxd8538q_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : psxgpu_device(mconfig, CXD8538Q, "CXD8538Q", tag, owner, clock)
+ : psxgpu_device(mconfig, CXD8538Q, "CXD8538Q", tag, owner, clock)
{
}
cxd8561q_device::cxd8561q_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : psxgpu_device(mconfig, CXD8561Q, "CXD8561Q", tag, owner, clock)
+ : psxgpu_device(mconfig, CXD8561Q, "CXD8561Q", tag, owner, clock)
{
}
cxd8561bq_device::cxd8561bq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : psxgpu_device(mconfig, CXD8561BQ, "CXD8561BQ", tag, owner, clock)
+ : psxgpu_device(mconfig, CXD8561BQ, "CXD8561BQ", tag, owner, clock)
{
}
cxd8561cq_device::cxd8561cq_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : psxgpu_device(mconfig, CXD8561CQ, "CXD8561CQ", tag, owner, clock)
+ : psxgpu_device(mconfig, CXD8561CQ, "CXD8561CQ", tag, owner, clock)
{
}
cxd8654q_device::cxd8654q_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : psxgpu_device(mconfig, CXD8654Q, "CXD8654Q", tag, owner, clock)
+ : psxgpu_device(mconfig, CXD8654Q, "CXD8654Q", tag, owner, clock)
{
}
@@ -834,7 +834,7 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
p_n_redtrans = p_n_redaddtrans; \
p_n_greentrans = p_n_greenaddtrans; \
p_n_bluetrans = p_n_blueaddtrans; \
- \
+ \
switch( n_cmd & 0x02 ) \
{ \
case 0x02: \
@@ -921,7 +921,7 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
n_distance = ( n_drawarea_x2 - n_x ) + 1; \
} \
p_vram = p_p_vram[ n_y ] + n_x; \
- \
+ \
switch( n_cmd & 0x02 ) \
{ \
case 0x00: \
@@ -1053,7 +1053,7 @@ void psxgpu_device::decode_tpage( UINT32 tpage )
n_distance = ( n_drawarea_x2 - n_x ) + 1; \
} \
p_vram = p_p_vram[ n_y ] + n_x; \
- \
+ \
if( n_ti != 0 ) \
{ \
/* interleaved texture */ \
diff --git a/src/emu/video/ramdac.c b/src/emu/video/ramdac.c
index 1d40fe76a7c..4930f0e1878 100644
--- a/src/emu/video/ramdac.c
+++ b/src/emu/video/ramdac.c
@@ -39,7 +39,7 @@ const device_type RAMDAC = &device_creator<ramdac_device>;
ramdac_device::ramdac_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, RAMDAC, "ramdac", tag, owner, clock),
- device_memory_interface(mconfig, *this),
+ device_memory_interface(mconfig, *this),
m_space_config("videoram", ENDIANNESS_LITTLE, 8, 10, 0, NULL, *ADDRESS_MAP_NAME(ramdac_palram))
{
@@ -209,4 +209,3 @@ WRITE8_MEMBER( ramdac_device::ramdac_rgb888_w )
palette_set_color_rgb(machine(),offset&0xff,m_palram[pal_offs|0x000],m_palram[pal_offs|0x100],m_palram[pal_offs|0x200]);
}
-
diff --git a/src/emu/video/ramdac.h b/src/emu/video/ramdac.h
index 97d28462ce8..1be4dec2eb3 100644
--- a/src/emu/video/ramdac.h
+++ b/src/emu/video/ramdac.h
@@ -37,7 +37,7 @@ struct ramdac_interface
// ======================> ramdac_device
-class ramdac_device : public device_t,
+class ramdac_device : public device_t,
public device_memory_interface,
public ramdac_interface
{
@@ -75,7 +75,7 @@ private:
UINT8 m_int_index[2];
UINT8 *m_palram;
- const address_space_config m_space_config;
+ const address_space_config m_space_config;
};
diff --git a/src/emu/video/resnet.c b/src/emu/video/resnet.c
index dc4866cdf0a..20f873ab28e 100644
--- a/src/emu/video/resnet.c
+++ b/src/emu/video/resnet.c
@@ -62,12 +62,12 @@ double compute_resistor_weights(
int networks_no;
- int rescount[MAX_NETS]; /* number of resistors in each of the nets */
- double r[MAX_NETS][MAX_RES_PER_NET]; /* resistances */
- double w[MAX_NETS][MAX_RES_PER_NET]; /* calulated weights */
- double ws[MAX_NETS][MAX_RES_PER_NET]; /* calulated, scaled weights */
- int r_pd[MAX_NETS]; /* pulldown resistances */
- int r_pu[MAX_NETS]; /* pullup resistances */
+ int rescount[MAX_NETS]; /* number of resistors in each of the nets */
+ double r[MAX_NETS][MAX_RES_PER_NET]; /* resistances */
+ double w[MAX_NETS][MAX_RES_PER_NET]; /* calulated weights */
+ double ws[MAX_NETS][MAX_RES_PER_NET]; /* calulated, scaled weights */
+ int r_pd[MAX_NETS]; /* pulldown resistances */
+ int r_pu[MAX_NETS]; /* pullup resistances */
double max_out[MAX_NETS];
double * out[MAX_NETS];
@@ -87,26 +87,26 @@ double compute_resistor_weights(
switch(n){
case 0:
- count = count_1;
- resistances = resistances_1;
- weights = weights_1;
- pd = pulldown_1;
- pu = pullup_1;
+ count = count_1;
+ resistances = resistances_1;
+ weights = weights_1;
+ pd = pulldown_1;
+ pu = pullup_1;
break;
case 1:
- count = count_2;
- resistances = resistances_2;
- weights = weights_2;
- pd = pulldown_2;
- pu = pullup_2;
+ count = count_2;
+ resistances = resistances_2;
+ weights = weights_2;
+ pd = pulldown_2;
+ pu = pullup_2;
break;
case 2:
default:
- count = count_3;
- resistances = resistances_3;
- weights = weights_3;
- pd = pulldown_3;
- pu = pullup_3;
+ count = count_3;
+ resistances = resistances_3;
+ weights = weights_3;
+ pd = pulldown_3;
+ pu = pullup_3;
break;
}
@@ -144,7 +144,7 @@ double compute_resistor_weights(
for( j = 0; j < rescount[i]; j++ )
{
- if( j==n ) /* only one resistance in the network connected to Vcc */
+ if( j==n ) /* only one resistance in the network connected to Vcc */
{
if (r[i][j] != 0.0)
R1 += 1.0/r[i][j];
@@ -175,7 +175,7 @@ double compute_resistor_weights(
/* of n resistors */
for( n = 0; n < rescount[i]; n++ )
- sum += w[i][n]; /* maximum output, ie when each resistance is connected to Vcc */
+ sum += w[i][n]; /* maximum output, ie when each resistance is connected to Vcc */
max_out[i] = sum;
if (max < sum)
@@ -186,10 +186,10 @@ double compute_resistor_weights(
}
- if (scaler < 0.0) /* use autoscale ? */
+ if (scaler < 0.0) /* use autoscale ? */
/* calculate the output scaler according to the network with the greatest output */
scale = ((double)maxval) / max_out[j];
- else /* use scaler provided on entry */
+ else /* use scaler provided on entry */
scale = scaler;
/* calculate scaled output and fill the output table(s)*/
@@ -197,8 +197,8 @@ double compute_resistor_weights(
{
for (n = 0; n < rescount[i]; n++)
{
- ws[i][n] = w[i][n]*scale; /* scale the result */
- (out[i])[n] = ws[i][n]; /* fill the output table */
+ ws[i][n] = w[i][n]*scale; /* scale the result */
+ (out[i])[n] = ws[i][n]; /* fill the output table */
}
}
@@ -242,12 +242,12 @@ double compute_resistor_net_outputs(
int networks_no;
- int rescount[MAX_NETS]; /* number of resistors in each of the nets */
- double r[MAX_NETS][MAX_RES_PER_NET]; /* resistances */
- double *o; /* calulated outputs */
- double *os; /* calulated, scaled outputss */
- int r_pd[MAX_NETS]; /* pulldown resistances */
- int r_pu[MAX_NETS]; /* pullup resistances */
+ int rescount[MAX_NETS]; /* number of resistors in each of the nets */
+ double r[MAX_NETS][MAX_RES_PER_NET]; /* resistances */
+ double *o; /* calulated outputs */
+ double *os; /* calulated, scaled outputss */
+ int r_pd[MAX_NETS]; /* pulldown resistances */
+ int r_pu[MAX_NETS]; /* pullup resistances */
double max_out[MAX_NETS];
double min_out[MAX_NETS];
@@ -272,26 +272,26 @@ double compute_resistor_net_outputs(
switch(n){
case 0:
- count = count_1;
- resistances = resistances_1;
- weights = outputs_1;
- pd = pulldown_1;
- pu = pullup_1;
+ count = count_1;
+ resistances = resistances_1;
+ weights = outputs_1;
+ pd = pulldown_1;
+ pu = pullup_1;
break;
case 1:
- count = count_2;
- resistances = resistances_2;
- weights = outputs_2;
- pd = pulldown_2;
- pu = pullup_2;
+ count = count_2;
+ resistances = resistances_2;
+ weights = outputs_2;
+ pd = pulldown_2;
+ pu = pullup_2;
break;
case 2:
default:
- count = count_3;
- resistances = resistances_3;
- weights = outputs_3;
- pd = pulldown_3;
- pu = pullup_3;
+ count = count_3;
+ resistances = resistances_3;
+ weights = outputs_3;
+ pd = pulldown_3;
+ pu = pullup_3;
break;
}
@@ -363,15 +363,15 @@ double compute_resistor_net_outputs(
max_tmp = o[i*(1<<MAX_RES_PER_NET)+n];
}
- max_out[i] = max_tmp; /* maximum output */
- min_out[i] = min_tmp; /* minimum output */
+ max_out[i] = max_tmp; /* maximum output */
+ min_out[i] = min_tmp; /* minimum output */
- val = min_out[i]; /* minimum output of this network */
+ val = min_out[i]; /* minimum output of this network */
if (min > val)
{
min = val;
}
- val = max_out[i]; /* maximum output of this network */
+ val = max_out[i]; /* maximum output of this network */
if (max < val)
{
max = val;
@@ -379,10 +379,10 @@ double compute_resistor_net_outputs(
}
- if (scaler < 0.0) /* use autoscale ? */
+ if (scaler < 0.0) /* use autoscale ? */
/* calculate the output scaler according to the network with the smallest output */
scale = ((double)maxval) / (max-min);
- else /* use scaler provided on entry */
+ else /* use scaler provided on entry */
scale = scaler;
/* calculate scaled output and fill the output table(s) */
@@ -390,8 +390,8 @@ double compute_resistor_net_outputs(
{
for (n = 0; n < (1<<rescount[i]); n++)
{
- os[i*(1<<MAX_RES_PER_NET)+n] = (o[i*(1<<MAX_RES_PER_NET)+n] - min) * scale; /* scale the result */
- (out[i])[n] = os[i*(1<<MAX_RES_PER_NET)+n]; /* fill the output table */
+ os[i*(1<<MAX_RES_PER_NET)+n] = (o[i*(1<<MAX_RES_PER_NET)+n] - min) * scale; /* scale the result */
+ (out[i])[n] = os[i*(1<<MAX_RES_PER_NET)+n]; /* fill the output table */
}
}
@@ -442,7 +442,7 @@ if (VERBOSE)
* in such circuits VOL is likely to be around 50mV.
*/
-#define TTL_VOL (0.05)
+#define TTL_VOL (0.05)
/* Likely, datasheets give a typical value of 3.4V to 3.6V
@@ -450,7 +450,7 @@ if (VERBOSE)
* of 4V for typical currents involved in resistor networks.
*/
-#define TTL_VOH (4.0)
+#define TTL_VOH (4.0)
int compute_res_net(int inputs, int channel, const res_net_info *di)
{
@@ -539,8 +539,8 @@ int compute_res_net(int inputs, int channel, const res_net_info *di)
vOL = TTL_VOL;
vOH = TTL_VOH;
/* rough estimation from 82s129 (7052) datasheet and from various sources
- * 1.4k / 30
- */
+ * 1.4k / 30
+ */
ttlHRes = 50;
OpenCol = 0;
break;
@@ -641,9 +641,9 @@ int compute_res_net(int inputs, int channel, const res_net_info *di)
rTotal += 1.0 / rGnd;
/* if the resulting voltage after application of all low inputs is
- * greater than vOH, treat high inputs as open collector/high impedance
- * There will be now current into/from the TTL gate
- */
+ * greater than vOH, treat high inputs as open collector/high impedance
+ * There will be now current into/from the TTL gate
+ */
if ( (di->options & RES_NET_VIN_MASK)==RES_NET_VIN_TTL_OUT)
{
diff --git a/src/emu/video/resnet.h b/src/emu/video/resnet.h
index 6e5ba24c9d1..95d08bb8a50 100644
--- a/src/emu/video/resnet.h
+++ b/src/emu/video/resnet.h
@@ -38,71 +38,71 @@
/* Amplifier stage per channel but may be specified globally as default */
-#define RES_NET_AMP_USE_GLOBAL 0x0000
-#define RES_NET_AMP_NONE 0x0001 //Out0
-#define RES_NET_AMP_DARLINGTON 0x0002 //Out1
-#define RES_NET_AMP_EMITTER 0x0003 //Out2
-#define RES_NET_AMP_CUSTOM 0x0004 //Out3
-#define RES_NET_AMP_MASK 0x0007
+#define RES_NET_AMP_USE_GLOBAL 0x0000
+#define RES_NET_AMP_NONE 0x0001 //Out0
+#define RES_NET_AMP_DARLINGTON 0x0002 //Out1
+#define RES_NET_AMP_EMITTER 0x0003 //Out2
+#define RES_NET_AMP_CUSTOM 0x0004 //Out3
+#define RES_NET_AMP_MASK 0x0007
/* VCC prebuilds - Global */
-#define RES_NET_VCC_5V 0x0000
-#define RES_NET_VCC_CUSTOM 0x0008
-#define RES_NET_VCC_MASK 0x0008
+#define RES_NET_VCC_5V 0x0000
+#define RES_NET_VCC_CUSTOM 0x0008
+#define RES_NET_VCC_MASK 0x0008
/* VBias prebuils - per channel but may be specified globally as default */
-#define RES_NET_VBIAS_USE_GLOBAL 0x0000
-#define RES_NET_VBIAS_5V 0x0010
-#define RES_NET_VBIAS_TTL 0x0020
-#define RES_NET_VBIAS_CUSTOM 0x0030
-#define RES_NET_VBIAS_MASK 0x0030
+#define RES_NET_VBIAS_USE_GLOBAL 0x0000
+#define RES_NET_VBIAS_5V 0x0010
+#define RES_NET_VBIAS_TTL 0x0020
+#define RES_NET_VBIAS_CUSTOM 0x0030
+#define RES_NET_VBIAS_MASK 0x0030
/* Input Voltage levels - Global */
-#define RES_NET_VIN_OPEN_COL 0x0000
-#define RES_NET_VIN_VCC 0x0100
-#define RES_NET_VIN_TTL_OUT 0x0200
-#define RES_NET_VIN_CUSTOM 0x0300
-#define RES_NET_VIN_MASK 0x0300
+#define RES_NET_VIN_OPEN_COL 0x0000
+#define RES_NET_VIN_VCC 0x0100
+#define RES_NET_VIN_TTL_OUT 0x0200
+#define RES_NET_VIN_CUSTOM 0x0300
+#define RES_NET_VIN_MASK 0x0300
/* Monitor options */
// Just invert the signal
-#define RES_NET_MONITOR_INVERT 0x1000
+#define RES_NET_MONITOR_INVERT 0x1000
// SANYO_EZV20 / Nintendo with inverter circuit
-#define RES_NET_MONITOR_SANYO_EZV20 0x2000
+#define RES_NET_MONITOR_SANYO_EZV20 0x2000
// Electrohome G07 Series
// 5.6k input impedance
-#define RES_NET_MONITOR_ELECTROHOME_G07 0x3000
+#define RES_NET_MONITOR_ELECTROHOME_G07 0x3000
-#define RES_NET_MONITOR_MASK 0x3000
+#define RES_NET_MONITOR_MASK 0x3000
/* General defines */
-#define RES_NET_CHAN_RED 0x00
-#define RES_NET_CHAN_GREEN 0x01
-#define RES_NET_CHAN_BLUE 0x02
+#define RES_NET_CHAN_RED 0x00
+#define RES_NET_CHAN_GREEN 0x01
+#define RES_NET_CHAN_BLUE 0x02
/* Some aliases */
-#define RES_NET_VIN_MB7051 RES_NET_VIN_TTL_OUT
-#define RES_NET_VIN_MB7052 RES_NET_VIN_TTL_OUT
-#define RES_NET_VIN_MB7053 RES_NET_VIN_TTL_OUT
-#define RES_NET_VIN_28S42 RES_NET_VIN_TTL_OUT
+#define RES_NET_VIN_MB7051 RES_NET_VIN_TTL_OUT
+#define RES_NET_VIN_MB7052 RES_NET_VIN_TTL_OUT
+#define RES_NET_VIN_MB7053 RES_NET_VIN_TTL_OUT
+#define RES_NET_VIN_28S42 RES_NET_VIN_TTL_OUT
/* Structures */
struct res_net_channel_info {
// per channel options
- UINT32 options;
+ UINT32 options;
// Pullup resistor value in Ohms
- double rBias;
+ double rBias;
// Pulldown resistor value in Ohms
- double rGnd;
+ double rGnd;
// Number of inputs connected to resistors
- int num;
+ int num;
// Resistor values
// - Least significant bit first
double R[8];
@@ -110,45 +110,45 @@ struct res_net_channel_info {
// - Applicable if output is routed through a complimentary
// - darlington circuit
// - typical value ~ 0.9V
- double minout;
+ double minout;
// Cutoff output voltage
// - Applicable if output is routed through 1:1 transistor amplifier
// - Typical value ~ 0.7V
- double cut;
+ double cut;
// Voltage at the pullup resistor
// - Typical voltage ~5V
- double vBias;
+ double vBias;
};
struct res_net_info {
// global options
- UINT32 options;
+ UINT32 options;
// The three color channels
res_net_channel_info rgb[3];
// Supply Voltage
// - Typical value 5V
- double vcc;
+ double vcc;
// High Level output voltage
// - TTL : 3.40V
// - CMOS: 4.95V (@5v vcc)
- double vOL;
+ double vOL;
// Low Level output voltage
// - TTL : 0.35V
// - CMOS: 0.05V (@5v vcc)
- double vOH;
+ double vOH;
// Open Collector flag
- UINT8 OpenCol;
+ UINT8 OpenCol;
};
-#define RES_NET_MAX_COMP 3
+#define RES_NET_MAX_COMP 3
struct res_net_decode_info {
- int numcomp;
- int start;
- int end;
- UINT16 offset[3 * RES_NET_MAX_COMP];
- INT16 shift[3 * RES_NET_MAX_COMP];
- UINT16 mask[3 * RES_NET_MAX_COMP];
+ int numcomp;
+ int start;
+ int end;
+ UINT16 offset[3 * RES_NET_MAX_COMP];
+ INT16 shift[3 * RES_NET_MAX_COMP];
+ UINT16 mask[3 * RES_NET_MAX_COMP];
};
/* return a single value for one channel */
@@ -168,13 +168,13 @@ double compute_resistor_weights(
int count_2, const int * resistances_2, double * weights_2, int pulldown_2, int pullup_2,
int count_3, const int * resistances_3, double * weights_3, int pulldown_3, int pullup_3 );
-#define combine_8_weights(tab,w0,w1,w2,w3,w4,w5,w6,w7) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4) + (tab)[5]*(w5) + (tab)[6]*(w6) + (tab)[7]*(w7)) + 0.5))
-#define combine_7_weights(tab,w0,w1,w2,w3,w4,w5,w6) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4) + (tab)[5]*(w5) + (tab)[6]*(w6)) + 0.5))
-#define combine_6_weights(tab,w0,w1,w2,w3,w4,w5) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4) + (tab)[5]*(w5)) + 0.5))
-#define combine_5_weights(tab,w0,w1,w2,w3,w4) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4)) + 0.5))
-#define combine_4_weights(tab,w0,w1,w2,w3) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3)) + 0.5))
-#define combine_3_weights(tab,w0,w1,w2) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2)) + 0.5))
-#define combine_2_weights(tab,w0,w1) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1)) + 0.5))
+#define combine_8_weights(tab,w0,w1,w2,w3,w4,w5,w6,w7) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4) + (tab)[5]*(w5) + (tab)[6]*(w6) + (tab)[7]*(w7)) + 0.5))
+#define combine_7_weights(tab,w0,w1,w2,w3,w4,w5,w6) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4) + (tab)[5]*(w5) + (tab)[6]*(w6)) + 0.5))
+#define combine_6_weights(tab,w0,w1,w2,w3,w4,w5) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4) + (tab)[5]*(w5)) + 0.5))
+#define combine_5_weights(tab,w0,w1,w2,w3,w4) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3) + (tab)[4]*(w4)) + 0.5))
+#define combine_4_weights(tab,w0,w1,w2,w3) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2) + (tab)[3]*(w3)) + 0.5))
+#define combine_3_weights(tab,w0,w1,w2) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1) + (tab)[2]*(w2)) + 0.5))
+#define combine_2_weights(tab,w0,w1) ((int)(((tab)[0]*(w0) + (tab)[1]*(w1)) + 0.5))
diff --git a/src/emu/video/rgbsse.h b/src/emu/video/rgbsse.h
index 338b1bbd350..d2558fb8a2f 100644
--- a/src/emu/video/rgbsse.h
+++ b/src/emu/video/rgbsse.h
@@ -245,10 +245,10 @@ INLINE void rgbaint_shr(rgbaint *color, UINT8 shift)
extern const struct _rgbsse_statics
{
- __m128 dummy_for_alignment;
- INT16 zero[8];
- INT16 maxbyte[8];
- INT16 scale_table[256][8];
+ __m128 dummy_for_alignment;
+ INT16 zero[8];
+ INT16 maxbyte[8];
+ INT16 scale_table[256][8];
} rgbsse_statics;
diff --git a/src/emu/video/rgbvmx.h b/src/emu/video/rgbvmx.h
index adbe10aba60..9fdc82caefb 100644
--- a/src/emu/video/rgbvmx.h
+++ b/src/emu/video/rgbvmx.h
@@ -213,8 +213,8 @@ INLINE void rgbaint_subr(rgbaint *color1, const rgbaint *color2)
extern const struct _rgbvmx_statics
{
- rgbaint maxbyte;
- rgbaint scale_table[256];
+ rgbaint maxbyte;
+ rgbaint scale_table[256];
} rgbvmx_statics;
@@ -318,11 +318,11 @@ INLINE void rgbaint_scale_channel_and_clamp(rgbaint *color, const rgbint *colors
INLINE rgb_t rgb_bilinear_filter(rgb_t rgb00, rgb_t rgb01, rgb_t rgb10, rgb_t rgb11, UINT8 u, UINT8 v)
{
- rgb_t result;
- rgbint color00 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb00), vec_splat_s32(0), vec_lvsl(0, &rgb00));
- rgbint color01 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb01), vec_splat_s32(0), vec_lvsl(0, &rgb01));
- rgbint color10 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb10), vec_splat_s32(0), vec_lvsl(0, &rgb10));
- rgbint color11 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb11), vec_splat_s32(0), vec_lvsl(0, &rgb11));
+ rgb_t result;
+ rgbint color00 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb00), vec_splat_s32(0), vec_lvsl(0, &rgb00));
+ rgbint color01 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb01), vec_splat_s32(0), vec_lvsl(0, &rgb01));
+ rgbint color10 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb10), vec_splat_s32(0), vec_lvsl(0, &rgb10));
+ rgbint color11 = (rgbint)vec_perm((vector signed int)vec_lde(0, &rgb11), vec_splat_s32(0), vec_lvsl(0, &rgb11));
/* interleave color01 and color00 at the byte level */
color01 = (rgbint)vec_mergeh((vector signed char)color01, (vector signed char)color00);
@@ -350,11 +350,11 @@ INLINE rgb_t rgb_bilinear_filter(rgb_t rgb00, rgb_t rgb01, rgb_t rgb10, rgb_t rg
INLINE rgb_t rgba_bilinear_filter(rgb_t rgb00, rgb_t rgb01, rgb_t rgb10, rgb_t rgb11, UINT8 u, UINT8 v)
{
- rgb_t result;
- rgbaint color00 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb00), vec_splat_s32(0), vec_lvsl(0, &rgb00));
- rgbaint color01 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb01), vec_splat_s32(0), vec_lvsl(0, &rgb01));
- rgbaint color10 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb10), vec_splat_s32(0), vec_lvsl(0, &rgb10));
- rgbaint color11 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb11), vec_splat_s32(0), vec_lvsl(0, &rgb11));
+ rgb_t result;
+ rgbaint color00 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb00), vec_splat_s32(0), vec_lvsl(0, &rgb00));
+ rgbaint color01 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb01), vec_splat_s32(0), vec_lvsl(0, &rgb01));
+ rgbaint color10 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb10), vec_splat_s32(0), vec_lvsl(0, &rgb10));
+ rgbaint color11 = (rgbaint)vec_perm((vector signed int)vec_lde(0, &rgb11), vec_splat_s32(0), vec_lvsl(0, &rgb11));
/* interleave color01 and color00 at the byte level */
color01 = (rgbaint)vec_mergeh((vector signed char)color01, (vector signed char)color00);
diff --git a/src/emu/video/s2636.c b/src/emu/video/s2636.c
index a9fe538974c..d6ff2915547 100644
--- a/src/emu/video/s2636.c
+++ b/src/emu/video/s2636.c
@@ -85,8 +85,8 @@
*
*************************************/
-#define SPRITE_WIDTH (8)
-#define SPRITE_HEIGHT (10)
+#define SPRITE_WIDTH (8)
+#define SPRITE_HEIGHT (10)
static const int sprite_offsets[4] = { 0x00, 0x10, 0x20, 0x40 };
@@ -390,5 +390,3 @@ void s2636_device::device_start()
{
DEVICE_START_NAME( s2636 )(this);
}
-
-
diff --git a/src/emu/video/saa5050.c b/src/emu/video/saa5050.c
index b5265b04649..a68bfd95fce 100644
--- a/src/emu/video/saa5050.c
+++ b/src/emu/video/saa5050.c
@@ -58,8 +58,8 @@ const rom_entry *saa5050_device::device_rom_region() const
{
switch (m_variant)
{
- default: return ROM_NAME( saa5050 );
- case TYPE_5052: return ROM_NAME( saa5052 );
+ default: return ROM_NAME( saa5050 );
+ case TYPE_5052: return ROM_NAME( saa5052 );
}
}
@@ -129,21 +129,21 @@ static const rgb_t PALETTE[] =
//-------------------------------------------------
saa5050_device::saa5050_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant)
- : device_t(mconfig, type, name, tag, owner, clock),
- m_frame_count(0),
- m_variant(variant)
+ : device_t(mconfig, type, name, tag, owner, clock),
+ m_frame_count(0),
+ m_variant(variant)
{
}
saa5050_device::saa5050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, SAA5050, "SAA5050", tag, owner, clock),
- m_frame_count(0),
- m_variant(TYPE_5050)
+ : device_t(mconfig, SAA5050, "SAA5050", tag, owner, clock),
+ m_frame_count(0),
+ m_variant(TYPE_5050)
{
}
saa5052_device::saa5052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : saa5050_device(mconfig, SAA5052, "SAA5052", tag, owner, clock, TYPE_5052)
+ : saa5050_device(mconfig, SAA5052, "SAA5052", tag, owner, clock, TYPE_5052)
{
}
@@ -169,8 +169,8 @@ void saa5050_device::device_config_complete()
switch (m_variant)
{
- default: m_shortname = "saa5050"; break;
- case TYPE_5052: m_shortname = "saa5052"; break;
+ default: m_shortname = "saa5050"; break;
+ case TYPE_5052: m_shortname = "saa5052"; break;
}
}
diff --git a/src/emu/video/saa5050.h b/src/emu/video/saa5050.h
index 92cafbc26ec..fb94be0afae 100644
--- a/src/emu/video/saa5050.h
+++ b/src/emu/video/saa5050.h
@@ -69,13 +69,13 @@ struct saa5050_interface
// ======================> saa5050_device
-class saa5050_device : public device_t,
- public saa5050_interface
+class saa5050_device : public device_t,
+ public saa5050_interface
{
public:
- // construction/destruction
- saa5050_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant);
- saa5050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ saa5050_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT32 variant);
+ saa5050_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual const rom_entry *device_rom_region() const;
@@ -99,15 +99,15 @@ protected:
TYPE_5052
};
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
+ virtual void device_start();
private:
void process_control_character(UINT8 data);
void get_character_data(UINT8 data);
- devcb_resolved_read8 m_in_d_func;
+ devcb_resolved_read8 m_in_d_func;
const UINT8 *m_char_rom;
UINT8 m_code;
@@ -138,8 +138,8 @@ private:
class saa5052_device : public saa5050_device
{
public:
- // construction/destruction
- saa5052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ saa5052_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
diff --git a/src/emu/video/sed1330.c b/src/emu/video/sed1330.c
index a107d66fe56..0319f1577b0 100644
--- a/src/emu/video/sed1330.c
+++ b/src/emu/video/sed1330.c
@@ -19,41 +19,41 @@
#define LOG 0
-#define INSTRUCTION_SYSTEM_SET 0x40
-#define INSTRUCTION_SLEEP_IN 0x53 // unimplemented
-#define INSTRUCTION_DISP_ON 0x59
-#define INSTRUCTION_DISP_OFF 0x58
-#define INSTRUCTION_SCROLL 0x44
-#define INSTRUCTION_CSRFORM 0x5d
-#define INSTRUCTION_CGRAM_ADR 0x5c
-#define INSTRUCTION_CSRDIR_RIGHT 0x4c
-#define INSTRUCTION_CSRDIR_LEFT 0x4d
-#define INSTRUCTION_CSRDIR_UP 0x4e
-#define INSTRUCTION_CSRDIR_DOWN 0x4f
-#define INSTRUCTION_HDOT_SCR 0x5a
-#define INSTRUCTION_OVLAY 0x5b
-#define INSTRUCTION_CSRW 0x46
-#define INSTRUCTION_CSRR 0x47 // unimplemented
-#define INSTRUCTION_MWRITE 0x42
-#define INSTRUCTION_MREAD 0x43 // unimplemented
+#define INSTRUCTION_SYSTEM_SET 0x40
+#define INSTRUCTION_SLEEP_IN 0x53 // unimplemented
+#define INSTRUCTION_DISP_ON 0x59
+#define INSTRUCTION_DISP_OFF 0x58
+#define INSTRUCTION_SCROLL 0x44
+#define INSTRUCTION_CSRFORM 0x5d
+#define INSTRUCTION_CGRAM_ADR 0x5c
+#define INSTRUCTION_CSRDIR_RIGHT 0x4c
+#define INSTRUCTION_CSRDIR_LEFT 0x4d
+#define INSTRUCTION_CSRDIR_UP 0x4e
+#define INSTRUCTION_CSRDIR_DOWN 0x4f
+#define INSTRUCTION_HDOT_SCR 0x5a
+#define INSTRUCTION_OVLAY 0x5b
+#define INSTRUCTION_CSRW 0x46
+#define INSTRUCTION_CSRR 0x47 // unimplemented
+#define INSTRUCTION_MWRITE 0x42
+#define INSTRUCTION_MREAD 0x43 // unimplemented
-#define CSRDIR_RIGHT 0x00
-#define CSRDIR_LEFT 0x01
-#define CSRDIR_UP 0x02
-#define CSRDIR_DOWN 0x03
+#define CSRDIR_RIGHT 0x00
+#define CSRDIR_LEFT 0x01
+#define CSRDIR_UP 0x02
+#define CSRDIR_DOWN 0x03
-#define MX_OR 0x00
-#define MX_XOR 0x01 // unimplemented
-#define MX_AND 0x02 // unimplemented
-#define MX_PRIORITY_OR 0x03 // unimplemented
+#define MX_OR 0x00
+#define MX_XOR 0x01 // unimplemented
+#define MX_AND 0x02 // unimplemented
+#define MX_PRIORITY_OR 0x03 // unimplemented
-#define FC_OFF 0x00
-#define FC_SOLID 0x01 // unimplemented
-#define FC_FLASH_32 0x02 // unimplemented
-#define FC_FLASH_64 0x03 // unimplemented
+#define FC_OFF 0x00
+#define FC_SOLID 0x01 // unimplemented
+#define FC_FLASH_32 0x02 // unimplemented
+#define FC_FLASH_64 0x03 // unimplemented
@@ -141,9 +141,9 @@ inline void sed1330_device::increment_csr()
sed1330_device::sed1330_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SED1330, "SED1330", tag, owner, clock),
- device_memory_interface(mconfig, *this),
- m_bf(0),
- m_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(sed1330))
+ device_memory_interface(mconfig, *this),
+ m_bf(0),
+ m_space_config("videoram", ENDIANNESS_LITTLE, 8, 16, 0, NULL, *ADDRESS_MAP_NAME(sed1330))
{
}
@@ -275,10 +275,10 @@ WRITE8_MEMBER( sed1330_device::command_w )
{
switch (m_cd)
{
- case CSRDIR_RIGHT: logerror("SED1330 '%s' Cursor Direction: Right\n", tag()); break;
- case CSRDIR_LEFT: logerror("SED1330 '%s' Cursor Direction: Left\n", tag()); break;
- case CSRDIR_UP: logerror("SED1330 '%s' Cursor Direction: Up\n", tag()); break;
- case CSRDIR_DOWN: logerror("SED1330 '%s' Cursor Direction: Down\n", tag()); break;
+ case CSRDIR_RIGHT: logerror("SED1330 '%s' Cursor Direction: Right\n", tag()); break;
+ case CSRDIR_LEFT: logerror("SED1330 '%s' Cursor Direction: Left\n", tag()); break;
+ case CSRDIR_UP: logerror("SED1330 '%s' Cursor Direction: Up\n", tag()); break;
+ case CSRDIR_DOWN: logerror("SED1330 '%s' Cursor Direction: Down\n", tag()); break;
}
}
break;
@@ -386,34 +386,34 @@ WRITE8_MEMBER( sed1330_device::data_w )
switch (m_fc)
{
- case FC_OFF: logerror("SED1330 '%s' Cursor: disabled\n", tag()); break;
- case FC_SOLID: logerror("SED1330 '%s' Cursor: solid\n", tag()); break;
- case FC_FLASH_32: logerror("SED1330 '%s' Cursor: fFR/32\n", tag()); break;
- case FC_FLASH_64: logerror("SED1330 '%s' Cursor: fFR/64\n", tag()); break;
+ case FC_OFF: logerror("SED1330 '%s' Cursor: disabled\n", tag()); break;
+ case FC_SOLID: logerror("SED1330 '%s' Cursor: solid\n", tag()); break;
+ case FC_FLASH_32: logerror("SED1330 '%s' Cursor: fFR/32\n", tag()); break;
+ case FC_FLASH_64: logerror("SED1330 '%s' Cursor: fFR/64\n", tag()); break;
}
switch (m_fp & 0x03)
{
- case FC_OFF: logerror("SED1330 '%s' Display Page 1: disabled\n", tag()); break;
- case FC_SOLID: logerror("SED1330 '%s' Display Page 1: enabled\n", tag()); break;
- case FC_FLASH_32: logerror("SED1330 '%s' Display Page 1: flash fFR/32\n", tag()); break;
- case FC_FLASH_64: logerror("SED1330 '%s' Display Page 1: flash fFR/64\n", tag()); break;
+ case FC_OFF: logerror("SED1330 '%s' Display Page 1: disabled\n", tag()); break;
+ case FC_SOLID: logerror("SED1330 '%s' Display Page 1: enabled\n", tag()); break;
+ case FC_FLASH_32: logerror("SED1330 '%s' Display Page 1: flash fFR/32\n", tag()); break;
+ case FC_FLASH_64: logerror("SED1330 '%s' Display Page 1: flash fFR/64\n", tag()); break;
}
switch ((m_fp >> 2) & 0x03)
{
- case FC_OFF: logerror("SED1330 '%s' Display Page 2/4: disabled\n", tag()); break;
- case FC_SOLID: logerror("SED1330 '%s' Display Page 2/4: enabled\n", tag()); break;
- case FC_FLASH_32: logerror("SED1330 '%s' Display Page 2/4: flash fFR/32\n", tag()); break;
- case FC_FLASH_64: logerror("SED1330 '%s' Display Page 2/4: flash fFR/64\n", tag()); break;
+ case FC_OFF: logerror("SED1330 '%s' Display Page 2/4: disabled\n", tag()); break;
+ case FC_SOLID: logerror("SED1330 '%s' Display Page 2/4: enabled\n", tag()); break;
+ case FC_FLASH_32: logerror("SED1330 '%s' Display Page 2/4: flash fFR/32\n", tag()); break;
+ case FC_FLASH_64: logerror("SED1330 '%s' Display Page 2/4: flash fFR/64\n", tag()); break;
}
switch ((m_fp >> 4) & 0x03)
{
- case FC_OFF: logerror("SED1330 '%s' Display Page 3: disabled\n", tag()); break;
- case FC_SOLID: logerror("SED1330 '%s' Display Page 3: enabled\n", tag()); break;
- case FC_FLASH_32: logerror("SED1330 '%s' Display Page 3: flash fFR/32\n", tag()); break;
- case FC_FLASH_64: logerror("SED1330 '%s' Display Page 3: flash fFR/64\n", tag()); break;
+ case FC_OFF: logerror("SED1330 '%s' Display Page 3: disabled\n", tag()); break;
+ case FC_SOLID: logerror("SED1330 '%s' Display Page 3: enabled\n", tag()); break;
+ case FC_FLASH_32: logerror("SED1330 '%s' Display Page 3: flash fFR/32\n", tag()); break;
+ case FC_FLASH_64: logerror("SED1330 '%s' Display Page 3: flash fFR/64\n", tag()); break;
}
}
break;
@@ -526,10 +526,10 @@ WRITE8_MEMBER( sed1330_device::data_w )
{
switch (m_mx)
{
- case MX_OR: logerror("SED1330 '%s' Display Composition Method: OR\n", tag()); break;
- case MX_XOR: logerror("SED1330 '%s' Display Composition Method: Exclusive-OR\n", tag()); break;
- case MX_AND: logerror("SED1330 '%s' Display Composition Method: AND\n", tag()); break;
- case MX_PRIORITY_OR: logerror("SED1330 '%s' Display Composition Method: Priority-OR\n", tag()); break;
+ case MX_OR: logerror("SED1330 '%s' Display Composition Method: OR\n", tag()); break;
+ case MX_XOR: logerror("SED1330 '%s' Display Composition Method: Exclusive-OR\n", tag()); break;
+ case MX_AND: logerror("SED1330 '%s' Display Composition Method: AND\n", tag()); break;
+ case MX_PRIORITY_OR: logerror("SED1330 '%s' Display Composition Method: Priority-OR\n", tag()); break;
}
logerror("SED1330 '%s' Display Page 1 Mode: %s\n", tag(), BIT(data, 2) ? "Graphics" : "Text");
diff --git a/src/emu/video/sed1330.h b/src/emu/video/sed1330.h
index 96804043e59..cb2eeef31f2 100644
--- a/src/emu/video/sed1330.h
+++ b/src/emu/video/sed1330.h
@@ -33,32 +33,32 @@
// ======================> sed1330_device
-class sed1330_device : public device_t,
+class sed1330_device : public device_t,
public device_memory_interface
{
public:
- // construction/destruction
- sed1330_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ sed1330_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// inline configuration helpers
static void static_set_config(device_t &device, const char *screen_tag);
- // optional information overrides
+ // optional information overrides
virtual const rom_entry *device_rom_region() const;
- DECLARE_READ8_MEMBER( status_r );
- DECLARE_WRITE8_MEMBER( command_w );
+ DECLARE_READ8_MEMBER( status_r );
+ DECLARE_WRITE8_MEMBER( command_w );
- DECLARE_READ8_MEMBER( data_r );
- DECLARE_WRITE8_MEMBER( data_w );
+ DECLARE_READ8_MEMBER( data_r );
+ DECLARE_WRITE8_MEMBER( data_w );
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete() { m_shortname = "sed1330"; }
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
@@ -73,55 +73,55 @@ protected:
void update_text(bitmap_ind16 &bitmap, const rectangle &cliprect);
private:
- int m_bf; // busy flag
-
- UINT8 m_ir; // instruction register
- UINT8 m_dor; // data output register
- int m_pbc; // parameter byte counter
-
- int m_d; // display enabled
- int m_sleep; // sleep mode
-
- UINT16 m_sag; // character generator RAM start address
- int m_m0; // character generator ROM (0=internal, 1=external)
- int m_m1; // character generator RAM D6 correction (0=no, 1=yes)
- int m_m2; // height of character bitmaps (0=8, 1=16 pixels)
- int m_ws; // LCD drive method (0=single, 1=dual panel)
- int m_iv; // screen origin compensation for inverse display (0=yes, 1=no)
- int m_wf; // AC frame drive waveform period (0=16-line, 1=2-frame)
-
- int m_fx; // character width in pixels
- int m_fy; // character height in pixels
- int m_cr; // visible line width in characters
- int m_tcr; // total line width in characters (including horizontal blanking)
- int m_lf; // frame height in lines
- UINT16 m_ap; // virtual screen line width in characters
-
- UINT16 m_sad1; // display page 1 start address
- UINT16 m_sad2; // display page 2 start address
- UINT16 m_sad3; // display page 3 start address
- UINT16 m_sad4; // display page 4 start address
- int m_sl1; // display block 1 height in lines
- int m_sl2; // display block 2 height in lines
- int m_hdotscr; // horizontal dot scroll in pixels
- int m_fp; // display page flash control
-
- UINT16 m_csr; // cursor address register
- int m_cd; // cursor increment direction
- int m_crx; // cursor width
- int m_cry; // cursor height or location
- int m_cm; // cursor shape (0=underscore, 1=block)
- int m_fc; // cursor flash control
-
- int m_mx; // screen layer composition method
- int m_dm; // display mode for pages 1, 3
- int m_ov; // graphics mode layer composition
+ int m_bf; // busy flag
+
+ UINT8 m_ir; // instruction register
+ UINT8 m_dor; // data output register
+ int m_pbc; // parameter byte counter
+
+ int m_d; // display enabled
+ int m_sleep; // sleep mode
+
+ UINT16 m_sag; // character generator RAM start address
+ int m_m0; // character generator ROM (0=internal, 1=external)
+ int m_m1; // character generator RAM D6 correction (0=no, 1=yes)
+ int m_m2; // height of character bitmaps (0=8, 1=16 pixels)
+ int m_ws; // LCD drive method (0=single, 1=dual panel)
+ int m_iv; // screen origin compensation for inverse display (0=yes, 1=no)
+ int m_wf; // AC frame drive waveform period (0=16-line, 1=2-frame)
+
+ int m_fx; // character width in pixels
+ int m_fy; // character height in pixels
+ int m_cr; // visible line width in characters
+ int m_tcr; // total line width in characters (including horizontal blanking)
+ int m_lf; // frame height in lines
+ UINT16 m_ap; // virtual screen line width in characters
+
+ UINT16 m_sad1; // display page 1 start address
+ UINT16 m_sad2; // display page 2 start address
+ UINT16 m_sad3; // display page 3 start address
+ UINT16 m_sad4; // display page 4 start address
+ int m_sl1; // display block 1 height in lines
+ int m_sl2; // display block 2 height in lines
+ int m_hdotscr; // horizontal dot scroll in pixels
+ int m_fp; // display page flash control
+
+ UINT16 m_csr; // cursor address register
+ int m_cd; // cursor increment direction
+ int m_crx; // cursor width
+ int m_cry; // cursor height or location
+ int m_cm; // cursor shape (0=underscore, 1=block)
+ int m_fc; // cursor flash control
+
+ int m_mx; // screen layer composition method
+ int m_dm; // display mode for pages 1, 3
+ int m_ov; // graphics mode layer composition
// devices
screen_device *m_screen;
- // address space configurations
- const address_space_config m_space_config;
+ // address space configurations
+ const address_space_config m_space_config;
const char *m_screen_tag;
};
diff --git a/src/emu/video/tlc34076.c b/src/emu/video/tlc34076.c
index 34bb369d8e0..7ac4937b26f 100644
--- a/src/emu/video/tlc34076.c
+++ b/src/emu/video/tlc34076.c
@@ -10,17 +10,17 @@
#include "emu.h"
#include "tlc34076.h"
-#define PALETTE_WRITE_ADDR 0x00
-#define PALETTE_DATA 0x01
-#define PIXEL_READ_MASK 0x02
-#define PALETTE_READ_ADDR 0x03
-#define GENERAL_CONTROL 0x08
-#define INPUT_CLOCK_SEL 0x09
-#define OUTPUT_CLOCK_SEL 0x0a
-#define MUX_CONTROL 0x0b
-#define PALETTE_PAGE 0x0c
-#define TEST_REGISTER 0x0e
-#define RESET_STATE 0x0f
+#define PALETTE_WRITE_ADDR 0x00
+#define PALETTE_DATA 0x01
+#define PIXEL_READ_MASK 0x02
+#define PALETTE_READ_ADDR 0x03
+#define GENERAL_CONTROL 0x08
+#define INPUT_CLOCK_SEL 0x09
+#define OUTPUT_CLOCK_SEL 0x0a
+#define MUX_CONTROL 0x0b
+#define PALETTE_PAGE 0x0c
+#define TEST_REGISTER 0x0e
+#define RESET_STATE 0x0f
struct tlc34076_state
{
@@ -108,14 +108,14 @@ static DEVICE_RESET( tlc34076 )
tlc34076_state *state = get_safe_token(device);
/* reset the registers */
- state->regs[PIXEL_READ_MASK] = 0xff;
- state->regs[GENERAL_CONTROL] = 0x03;
- state->regs[INPUT_CLOCK_SEL] = 0x00;
- state->regs[OUTPUT_CLOCK_SEL] = 0x3f;
- state->regs[MUX_CONTROL] = 0x2d;
- state->regs[PALETTE_PAGE] = 0x00;
- state->regs[TEST_REGISTER] = 0x00;
- state->regs[RESET_STATE] = 0x00;
+ state->regs[PIXEL_READ_MASK] = 0xff;
+ state->regs[GENERAL_CONTROL] = 0x03;
+ state->regs[INPUT_CLOCK_SEL] = 0x00;
+ state->regs[OUTPUT_CLOCK_SEL] = 0x3f;
+ state->regs[MUX_CONTROL] = 0x2d;
+ state->regs[PALETTE_PAGE] = 0x00;
+ state->regs[TEST_REGISTER] = 0x00;
+ state->regs[RESET_STATE] = 0x00;
}
@@ -199,55 +199,55 @@ WRITE8_DEVICE_HANDLER( tlc34076_w )
case GENERAL_CONTROL:
/*
- 7 6 5 4 3 2 1 0
- X X X X X X X 0 HSYNCOUT is active-low
- X X X X X X X 1 HSYNCOUT is active-high (default)
- X X X X X X 0 X VSYNCOUT is active-low
- X X X X X X 1 X VSYNCOUT is active-high (default)
- X X X X X 0 X X Disable split shift register transfer (default)
- X X X X 0 1 X X Enable split shift register transfer
- X X X X 0 X X X Disable special nibble mode (default)
- X X X X 1 0 X X Enable special nibble mode
- X X X 0 X X X X 0-IRE pedestal (default)
- X X X 1 X X X X 7.5-IRE pedestal
- X X 0 X X X X X Disable sync (default)
- X X 1 X X X X X Enable sync
- X 0 X X X X X X Little-endian mode (default)
- X 1 X X X X X X Big-endian mode
- 0 X X X X X X X MUXOUT is low (default)
- 1 X X X X X X X MUXOUT is high
- */
+ 7 6 5 4 3 2 1 0
+ X X X X X X X 0 HSYNCOUT is active-low
+ X X X X X X X 1 HSYNCOUT is active-high (default)
+ X X X X X X 0 X VSYNCOUT is active-low
+ X X X X X X 1 X VSYNCOUT is active-high (default)
+ X X X X X 0 X X Disable split shift register transfer (default)
+ X X X X 0 1 X X Enable split shift register transfer
+ X X X X 0 X X X Disable special nibble mode (default)
+ X X X X 1 0 X X Enable special nibble mode
+ X X X 0 X X X X 0-IRE pedestal (default)
+ X X X 1 X X X X 7.5-IRE pedestal
+ X X 0 X X X X X Disable sync (default)
+ X X 1 X X X X X Enable sync
+ X 0 X X X X X X Little-endian mode (default)
+ X 1 X X X X X X Big-endian mode
+ 0 X X X X X X X MUXOUT is low (default)
+ 1 X X X X X X X MUXOUT is high
+ */
break;
case INPUT_CLOCK_SEL:
/*
- 3 2 1 0
- 0 0 0 0 Select CLK0 as clock source?
- 0 0 0 1 Select CLK1 as clock source
- 0 0 1 0 Select CLK2 as clock source
- 0 0 1 1 Select CLK3 as TTL clock source
- 0 1 0 0 Select CLK3 as TTL clock source
- 1 0 0 0 Select CLK3 and CLK3 as ECL clock sources
- */
+ 3 2 1 0
+ 0 0 0 0 Select CLK0 as clock source?
+ 0 0 0 1 Select CLK1 as clock source
+ 0 0 1 0 Select CLK2 as clock source
+ 0 0 1 1 Select CLK3 as TTL clock source
+ 0 1 0 0 Select CLK3 as TTL clock source
+ 1 0 0 0 Select CLK3 and CLK3 as ECL clock sources
+ */
break;
case OUTPUT_CLOCK_SEL:
/*
- 0 0 0 X X X VCLK frequency = DOTCLK frequency
- 0 0 1 X X X VCLK frequency = DOTCLK frequency/2
- 0 1 0 X X X VCLK frequency = DOTCLK frequency/4
- 0 1 1 X X X VCLK frequency = DOTCLK frequency/8
- 1 0 0 X X X VCLK frequency = DOTCLK frequency/16
- 1 0 1 X X X VCLK frequency = DOTCLK frequency/32
- 1 1 X X X X VCLK output held at logic high level (default condition)
- X X X 0 0 0 SCLK frequency = DOTCLK frequency
- X X X 0 0 1 SCLK frequency = DOTCLK frequency/2
- X X X 0 1 0 SCLK frequency = DOTCLK frequency/4
- X X X 0 1 1 SCLK frequency = DOTCLK frequency/8
- X X X 1 0 0 SCLK frequency = DOTCLK frequency/16
- X X X 1 0 1 SCLK frequency = DOTCLK frequency/32
- X X X 1 1 X SCLK output held at logic level low (default condition)
- */
+ 0 0 0 X X X VCLK frequency = DOTCLK frequency
+ 0 0 1 X X X VCLK frequency = DOTCLK frequency/2
+ 0 1 0 X X X VCLK frequency = DOTCLK frequency/4
+ 0 1 1 X X X VCLK frequency = DOTCLK frequency/8
+ 1 0 0 X X X VCLK frequency = DOTCLK frequency/16
+ 1 0 1 X X X VCLK frequency = DOTCLK frequency/32
+ 1 1 X X X X VCLK output held at logic high level (default condition)
+ X X X 0 0 0 SCLK frequency = DOTCLK frequency
+ X X X 0 0 1 SCLK frequency = DOTCLK frequency/2
+ X X X 0 1 0 SCLK frequency = DOTCLK frequency/4
+ X X X 0 1 1 SCLK frequency = DOTCLK frequency/8
+ X X X 1 0 0 SCLK frequency = DOTCLK frequency/16
+ X X X 1 0 1 SCLK frequency = DOTCLK frequency/32
+ X X X 1 1 X SCLK output held at logic level low (default condition)
+ */
break;
case RESET_STATE:
@@ -315,5 +315,3 @@ void tlc34076_device::device_reset()
{
DEVICE_RESET_NAME( tlc34076 )(this);
}
-
-
diff --git a/src/emu/video/tlc34076.h b/src/emu/video/tlc34076.h
index c32f02d50a4..b811a550981 100644
--- a/src/emu/video/tlc34076.h
+++ b/src/emu/video/tlc34076.h
@@ -7,8 +7,8 @@
***************************************************************************/
-#define TLC34076_6_BIT 0
-#define TLC34076_8_BIT 1
+#define TLC34076_6_BIT 0
+#define TLC34076_8_BIT 1
const pen_t *tlc34076_get_pens(device_t *device);
diff --git a/src/emu/video/tms34061.c b/src/emu/video/tms34061.c
index 8baf62b3e8a..6ed7d5ddd11 100644
--- a/src/emu/video/tms34061.c
+++ b/src/emu/video/tms34061.c
@@ -14,7 +14,7 @@
#include "tms34061.h"
-#define VERBOSE (0)
+#define VERBOSE (0)
/*************************************
@@ -25,15 +25,15 @@
struct tms34061_data
{
- UINT16 regs[TMS34061_REGCOUNT];
- UINT16 xmask;
- UINT8 yshift;
- UINT32 vrammask;
- UINT8 * vram;
- UINT8 * latchram;
- UINT8 latchdata;
- UINT8 * shiftreg;
- emu_timer * timer;
+ UINT16 regs[TMS34061_REGCOUNT];
+ UINT16 xmask;
+ UINT8 yshift;
+ UINT32 vrammask;
+ UINT8 * vram;
+ UINT8 * latchram;
+ UINT8 latchdata;
+ UINT8 * shiftreg;
+ emu_timer * timer;
struct tms34061_interface intf;
screen_device *screen;
};
@@ -50,11 +50,11 @@ static struct tms34061_data tms34061;
static const char *const regnames[] =
{
- "HORENDSYNC", "HORENDBLNK", "HORSTARTBLNK", "HORTOTAL",
- "VERENDSYNC", "VERENDBLNK", "VERSTARTBLNK", "VERTOTAL",
- "DISPUPDATE", "DISPSTART", "VERINT", "CONTROL1",
- "CONTROL2", "STATUS", "XYOFFSET", "XYADDRESS",
- "DISPADDRESS", "VERCOUNTER"
+ "HORENDSYNC", "HORENDBLNK", "HORSTARTBLNK", "HORTOTAL",
+ "VERENDSYNC", "VERENDBLNK", "VERSTARTBLNK", "VERTOTAL",
+ "DISPUPDATE", "DISPSTART", "VERINT", "CONTROL1",
+ "CONTROL2", "STATUS", "XYOFFSET", "XYADDRESS",
+ "DISPADDRESS", "VERCOUNTER"
};
@@ -203,15 +203,15 @@ static void register_w(address_space &space, offs_t offset, UINT8 data)
case TMS34061_XYOFFSET:
switch (tms34061.regs[TMS34061_XYOFFSET] & 0x00ff)
{
- case 0x01: tms34061.yshift = 2; break;
- case 0x02: tms34061.yshift = 3; break;
- case 0x04: tms34061.yshift = 4; break;
- case 0x08: tms34061.yshift = 5; break;
- case 0x10: tms34061.yshift = 6; break;
- case 0x20: tms34061.yshift = 7; break;
- case 0x40: tms34061.yshift = 8; break;
- case 0x80: tms34061.yshift = 9; break;
- default: logerror("Invalid value for XYOFFSET = %04x\n", tms34061.regs[TMS34061_XYOFFSET]); break;
+ case 0x01: tms34061.yshift = 2; break;
+ case 0x02: tms34061.yshift = 3; break;
+ case 0x04: tms34061.yshift = 4; break;
+ case 0x08: tms34061.yshift = 5; break;
+ case 0x10: tms34061.yshift = 6; break;
+ case 0x20: tms34061.yshift = 7; break;
+ case 0x40: tms34061.yshift = 8; break;
+ case 0x80: tms34061.yshift = 9; break;
+ default: logerror("Invalid value for XYOFFSET = %04x\n", tms34061.regs[TMS34061_XYOFFSET]); break;
}
tms34061.xmask = (1 << tms34061.yshift) - 1;
break;
@@ -279,78 +279,78 @@ INLINE void adjust_xyaddress(int offset)
/* note that carries are allowed if the Y coordinate isn't being modified */
switch (offset & 0x1e)
{
- case 0x00: /* no change */
+ case 0x00: /* no change */
break;
- case 0x02: /* X + 1 */
+ case 0x02: /* X + 1 */
tms34061.regs[TMS34061_XYADDRESS]++;
break;
- case 0x04: /* X - 1 */
+ case 0x04: /* X - 1 */
tms34061.regs[TMS34061_XYADDRESS]--;
break;
- case 0x06: /* X = 0 */
+ case 0x06: /* X = 0 */
tms34061.regs[TMS34061_XYADDRESS] &= ~tms34061.xmask;
break;
- case 0x08: /* Y + 1 */
+ case 0x08: /* Y + 1 */
tms34061.regs[TMS34061_XYADDRESS] += 1 << tms34061.yshift;
break;
- case 0x0a: /* X + 1, Y + 1 */
+ case 0x0a: /* X + 1, Y + 1 */
tms34061.regs[TMS34061_XYADDRESS] = (tms34061.regs[TMS34061_XYADDRESS] & ~tms34061.xmask) |
((tms34061.regs[TMS34061_XYADDRESS] + 1) & tms34061.xmask);
tms34061.regs[TMS34061_XYADDRESS] += 1 << tms34061.yshift;
break;
- case 0x0c: /* X - 1, Y + 1 */
+ case 0x0c: /* X - 1, Y + 1 */
tms34061.regs[TMS34061_XYADDRESS] = (tms34061.regs[TMS34061_XYADDRESS] & ~tms34061.xmask) |
((tms34061.regs[TMS34061_XYADDRESS] - 1) & tms34061.xmask);
tms34061.regs[TMS34061_XYADDRESS] += 1 << tms34061.yshift;
break;
- case 0x0e: /* X = 0, Y + 1 */
+ case 0x0e: /* X = 0, Y + 1 */
tms34061.regs[TMS34061_XYADDRESS] &= ~tms34061.xmask;
tms34061.regs[TMS34061_XYADDRESS] += 1 << tms34061.yshift;
break;
- case 0x10: /* Y - 1 */
+ case 0x10: /* Y - 1 */
tms34061.regs[TMS34061_XYADDRESS] -= 1 << tms34061.yshift;
break;
- case 0x12: /* X + 1, Y - 1 */
+ case 0x12: /* X + 1, Y - 1 */
tms34061.regs[TMS34061_XYADDRESS] = (tms34061.regs[TMS34061_XYADDRESS] & ~tms34061.xmask) |
((tms34061.regs[TMS34061_XYADDRESS] + 1) & tms34061.xmask);
tms34061.regs[TMS34061_XYADDRESS] -= 1 << tms34061.yshift;
break;
- case 0x14: /* X - 1, Y - 1 */
+ case 0x14: /* X - 1, Y - 1 */
tms34061.regs[TMS34061_XYADDRESS] = (tms34061.regs[TMS34061_XYADDRESS] & ~tms34061.xmask) |
((tms34061.regs[TMS34061_XYADDRESS] - 1) & tms34061.xmask);
tms34061.regs[TMS34061_XYADDRESS] -= 1 << tms34061.yshift;
break;
- case 0x16: /* X = 0, Y - 1 */
+ case 0x16: /* X = 0, Y - 1 */
tms34061.regs[TMS34061_XYADDRESS] &= ~tms34061.xmask;
tms34061.regs[TMS34061_XYADDRESS] -= 1 << tms34061.yshift;
break;
- case 0x18: /* Y = 0 */
+ case 0x18: /* Y = 0 */
tms34061.regs[TMS34061_XYADDRESS] &= tms34061.xmask;
break;
- case 0x1a: /* X + 1, Y = 0 */
+ case 0x1a: /* X + 1, Y = 0 */
tms34061.regs[TMS34061_XYADDRESS]++;
tms34061.regs[TMS34061_XYADDRESS] &= tms34061.xmask;
break;
- case 0x1c: /* X - 1, Y = 0 */
+ case 0x1c: /* X - 1, Y = 0 */
tms34061.regs[TMS34061_XYADDRESS]--;
tms34061.regs[TMS34061_XYADDRESS] &= tms34061.xmask;
break;
- case 0x1e: /* X = 0, Y = 0 */
+ case 0x1e: /* X = 0, Y = 0 */
tms34061.regs[TMS34061_XYADDRESS] = 0;
break;
}
diff --git a/src/emu/video/tms34061.h b/src/emu/video/tms34061.h
index aa751b82ef2..82b3989f50b 100644
--- a/src/emu/video/tms34061.h
+++ b/src/emu/video/tms34061.h
@@ -40,21 +40,21 @@ enum
/* interface structure */
struct tms34061_interface
{
- const char *screen_tag; /* the screen we are acting on */
- UINT8 rowshift; /* VRAM address is (row << rowshift) | col */
- UINT32 vramsize; /* size of video RAM */
- void (*interrupt)(running_machine &machine, int state); /* interrupt gen callback */
+ const char *screen_tag; /* the screen we are acting on */
+ UINT8 rowshift; /* VRAM address is (row << rowshift) | col */
+ UINT32 vramsize; /* size of video RAM */
+ void (*interrupt)(running_machine &machine, int state); /* interrupt gen callback */
};
/* display state structure */
struct tms34061_display
{
- UINT8 blanked; /* true if blanked */
- UINT8 *vram; /* base of VRAM */
- UINT8 *latchram; /* base of latch RAM */
- UINT16 *regs; /* pointer to array of registers */
- offs_t dispstart; /* display start */
+ UINT8 blanked; /* true if blanked */
+ UINT8 *vram; /* base of VRAM */
+ UINT8 *latchram; /* base of latch RAM */
+ UINT16 *regs; /* pointer to array of registers */
+ offs_t dispstart; /* display start */
};
diff --git a/src/emu/video/tms9927.c b/src/emu/video/tms9927.c
index 96abe95c6ec..d7643629f67 100644
--- a/src/emu/video/tms9927.c
+++ b/src/emu/video/tms9927.c
@@ -15,19 +15,19 @@ static const UINT8 chars_per_row_value[8] = { 20, 32, 40, 64, 72, 80, 96, 132 };
static const UINT8 skew_bits_value[4] = { 0, 1, 2, 2 };
-#define HCOUNT(t) ((t)->reg[0] + 1)
-#define INTERLACED(t) (((t)->reg[1] >> 7) & 0x01)
-#define HSYNC_WIDTH(t) (((t)->reg[1] >> 4) & 0x0f)
-#define HSYNC_DELAY(t) (((t)->reg[1] >> 0) & 0x07)
-#define SCANS_PER_DATA_ROW(t) ((((t)->reg[2] >> 3) & 0x0f) + 1)
-#define CHARS_PER_DATA_ROW(t) (chars_per_row_value[((t)->reg[2] >> 0) & 0x07])
-#define SKEW_BITS(t) (skew_bits_value[((t)->reg[3] >> 6) & 0x03])
-#define DATA_ROWS_PER_FRAME(t) ((((t)->reg[3] >> 0) & 0x3f) + 1)
-#define SCAN_LINES_PER_FRAME(t) (((t)->reg[4] * 2) + 256)
-#define VERTICAL_DATA_START(t) ((t)->reg[5])
-#define LAST_DISP_DATA_ROW(t) ((t)->reg[6] & 0x3f)
-#define CURSOR_CHAR_ADDRESS(t) ((t)->reg[7])
-#define CURSOR_ROW_ADDRESS(t) ((t)->reg[8] & 0x3f)
+#define HCOUNT(t) ((t)->reg[0] + 1)
+#define INTERLACED(t) (((t)->reg[1] >> 7) & 0x01)
+#define HSYNC_WIDTH(t) (((t)->reg[1] >> 4) & 0x0f)
+#define HSYNC_DELAY(t) (((t)->reg[1] >> 0) & 0x07)
+#define SCANS_PER_DATA_ROW(t) ((((t)->reg[2] >> 3) & 0x0f) + 1)
+#define CHARS_PER_DATA_ROW(t) (chars_per_row_value[((t)->reg[2] >> 0) & 0x07])
+#define SKEW_BITS(t) (skew_bits_value[((t)->reg[3] >> 6) & 0x03])
+#define DATA_ROWS_PER_FRAME(t) ((((t)->reg[3] >> 0) & 0x3f) + 1)
+#define SCAN_LINES_PER_FRAME(t) (((t)->reg[4] * 2) + 256)
+#define VERTICAL_DATA_START(t) ((t)->reg[5])
+#define LAST_DISP_DATA_ROW(t) ((t)->reg[6] & 0x3f)
+#define CURSOR_CHAR_ADDRESS(t) ((t)->reg[7])
+#define CURSOR_ROW_ADDRESS(t) ((t)->reg[8] & 0x3f)
struct tms9927_state
@@ -38,16 +38,16 @@ struct tms9927_state
const UINT8 *selfload;
/* live state */
- UINT32 clock;
- UINT8 reg[9];
- UINT8 start_datarow;
- UINT8 reset;
- UINT8 hpixels_per_column;
+ UINT32 clock;
+ UINT8 reg[9];
+ UINT8 start_datarow;
+ UINT8 reset;
+ UINT8 hpixels_per_column;
/* derived state; no need to save */
- UINT8 valid_config;
- UINT16 total_hpix, total_vpix;
- UINT16 visible_hpix, visible_vpix;
+ UINT8 valid_config;
+ UINT16 total_hpix, total_vpix;
+ UINT16 visible_hpix, visible_vpix;
};
@@ -79,8 +79,8 @@ static void generic_access(device_t *device, address_space &space, offs_t offset
switch (offset)
{
- case 0x07: /* Processor Self Load */
- case 0x0f: /* Non-processor self-load */
+ case 0x07: /* Processor Self Load */
+ case 0x0f: /* Non-processor self-load */
if (tms->selfload != NULL)
{
int cur;
@@ -94,11 +94,11 @@ static void generic_access(device_t *device, address_space &space, offs_t offset
popmessage("tms9927: self-load initiated with no PROM!");
/* processor self-load waits with reset enabled;
- non-processor just goes ahead */
+ non-processor just goes ahead */
tms->reset = (offset == 0x07);
break;
- case 0x0a: /* Reset */
+ case 0x0a: /* Reset */
if (!tms->reset)
{
tms->screen->update_now();
@@ -106,13 +106,13 @@ static void generic_access(device_t *device, address_space &space, offs_t offset
}
break;
- case 0x0b: /* Up scroll */
+ case 0x0b: /* Up scroll */
mame_printf_debug("Up scroll\n");
tms->screen->update_now();
tms->start_datarow = (tms->start_datarow + 1) % DATA_ROWS_PER_FRAME(tms);
break;
- case 0x0e: /* Start timing chain */
+ case 0x0e: /* Start timing chain */
if (tms->reset)
{
tms->screen->update_now();
@@ -130,19 +130,19 @@ WRITE8_DEVICE_HANDLER( tms9927_w )
switch (offset)
{
- case 0x00: /* HORIZONTAL CHARACTER COUNT */
- case 0x01: /* INTERLACED / HSYNC WIDTH / HSYNC DELAY */
- case 0x02: /* SCANS PER DATA ROW / CHARACTERS PER DATA ROW */
- case 0x03: /* SKEW BITS / DATA ROWS PER FRAME */
- case 0x04: /* SCAN LINES / FRAME */
- case 0x05: /* VERTICAL DATA START */
- case 0x06: /* LAST DISPLAYED DATA ROW */
+ case 0x00: /* HORIZONTAL CHARACTER COUNT */
+ case 0x01: /* INTERLACED / HSYNC WIDTH / HSYNC DELAY */
+ case 0x02: /* SCANS PER DATA ROW / CHARACTERS PER DATA ROW */
+ case 0x03: /* SKEW BITS / DATA ROWS PER FRAME */
+ case 0x04: /* SCAN LINES / FRAME */
+ case 0x05: /* VERTICAL DATA START */
+ case 0x06: /* LAST DISPLAYED DATA ROW */
tms->reg[offset] = data;
recompute_parameters(tms, FALSE);
break;
- case 0x0c: /* LOAD CURSOR CHARACTER ADDRESS */
- case 0x0d: /* LOAD CURSOR ROW ADDRESS */
+ case 0x0c: /* LOAD CURSOR CHARACTER ADDRESS */
+ case 0x0d: /* LOAD CURSOR ROW ADDRESS */
mame_printf_debug("Cursor address changed\n");
tms->reg[offset - 0x0c + 7] = data;
recompute_parameters(tms, FALSE);
@@ -161,8 +161,8 @@ READ8_DEVICE_HANDLER( tms9927_r )
switch (offset)
{
- case 0x08: /* READ CURSOR CHARACTER ADDRESS */
- case 0x09: /* READ CURSOR ROW ADDRESS */
+ case 0x08: /* READ CURSOR CHARACTER ADDRESS */
+ case 0x09: /* READ CURSOR ROW ADDRESS */
return tms->reg[offset - 0x08 + 7];
default:
@@ -379,5 +379,3 @@ crt5057_device::crt5057_device(const machine_config &mconfig, const char *tag, d
: tms9927_device(mconfig, CRT5057, "CRT5057", tag, owner, clock)
{
}
-
-
diff --git a/src/emu/video/tms9927.h b/src/emu/video/tms9927.h
index 5f56d457f88..b1a5b847a32 100644
--- a/src/emu/video/tms9927.h
+++ b/src/emu/video/tms9927.h
@@ -75,9 +75,9 @@ extern const device_type CRT5057;
/* interface */
struct tms9927_interface
{
- const char *screen_tag; /* screen we are acting on */
- int hpixels_per_column; /* number of pixels per video memory address */
- const char *selfload_region; /* name of the region with self-load data */
+ const char *screen_tag; /* screen we are acting on */
+ int hpixels_per_column; /* number of pixels per video memory address */
+ const char *selfload_region; /* name of the region with self-load data */
};
extern const tms9927_interface tms9927_null_interface;
diff --git a/src/emu/video/tms9928a.c b/src/emu/video/tms9928a.c
index d72bb1b7844..9c9f00df5f5 100644
--- a/src/emu/video/tms9928a.c
+++ b/src/emu/video/tms9928a.c
@@ -92,8 +92,8 @@ static const rgb_t tms9928a_palette[TMS9928A_PALETTE_SIZE] =
tms9928a_device::tms9928a_device( const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, bool is_50hz, bool is_reva, bool is_99 )
: device_t( mconfig, type, name, tag, owner, clock ),
- device_memory_interface(mconfig, *this),
- m_space_config("vram",ENDIANNESS_BIG, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(memmap))
+ device_memory_interface(mconfig, *this),
+ m_space_config("vram",ENDIANNESS_BIG, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(memmap))
{
m_50hz = is_50hz;
m_reva = is_reva;
@@ -104,8 +104,8 @@ tms9928a_device::tms9928a_device( const machine_config &mconfig, device_type typ
tms9928a_device::tms9928a_device( const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock )
: device_t( mconfig, TMS9928A, "TMS9928A", tag, owner, clock ),
- device_memory_interface(mconfig, *this),
- m_space_config("vram",ENDIANNESS_BIG, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(memmap))
+ device_memory_interface(mconfig, *this),
+ m_space_config("vram",ENDIANNESS_BIG, 8, 14, 0, NULL, *ADDRESS_MAP_NAME(memmap))
{
m_50hz = false;
m_reva = true;
@@ -172,7 +172,7 @@ void tms9928a_device::update_backdrop()
void tms9928a_device::update_table_masks()
{
m_colourmask = ( (m_Regs[3] & 0x7f) << 3 ) | 7;
-
+
// on 91xx family, the colour table mask doesn't affect the pattern table mask
m_patternmask = ( (m_Regs[4] & 3) << 8 ) | ( m_99 ? (m_colourmask & 0xff) : 0xff );
}
@@ -318,7 +318,7 @@ void tms9928a_device::device_timer(emu_timer &timer, device_timer_id id, int par
switch( m_mode )
{
- case 0: /* MODE 0 */
+ case 0: /* MODE 0 */
// if (vpos==100 ) popmessage("TMS9928A MODE 0");
{
UINT16 addr = m_nametbl + ( ( y & 0xF8 ) << 2 );
@@ -337,7 +337,7 @@ void tms9928a_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
break;
- case 1: /* MODE 1 */
+ case 1: /* MODE 1 */
//if (vpos==100 ) popmessage("TMS9928A MODE 1");
{
UINT16 addr = m_nametbl + ( ( y >> 3 ) * 40 );
@@ -363,7 +363,7 @@ void tms9928a_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
break;
- case 2: /* MODE 2 */
+ case 2: /* MODE 2 */
//if (vpos==100 ) popmessage("TMS9928A MODE 2");
{
UINT16 addr = m_nametbl + ( ( y >> 3 ) * 32 );
@@ -382,7 +382,7 @@ void tms9928a_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
break;
- case 3: /* MODE 1+2 */
+ case 3: /* MODE 1+2 */
//if (vpos==100) popmessage("TMS9928A MODE1+2");
{
UINT16 addr = m_nametbl + ( ( y >> 3 ) * 40 );
@@ -408,7 +408,7 @@ void tms9928a_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
break;
- case 4: /* MODE 3 */
+ case 4: /* MODE 3 */
//if (vpos==100 ) popmessage("TMS9928A MODE 3");
{
UINT16 addr = m_nametbl + ( ( y >> 3 ) * 32 );
@@ -426,7 +426,7 @@ void tms9928a_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
break;
- case 5: case 7: /* MODE bogus */
+ case 5: case 7: /* MODE bogus */
//if (vpos==100 ) popmessage("TMS9928A MODE bogus");
{
rgb_t fg = m_palette[(m_Regs[7] >> 4) ? (m_Regs[7] >> 4) : BackColour];
@@ -448,7 +448,7 @@ void tms9928a_device::device_timer(emu_timer &timer, device_timer_id id, int par
}
break;
- case 6: /* MODE 2+3 */
+ case 6: /* MODE 2+3 */
//if (vpos==100 ) popmessage("TMS9928A MODE 2+3");
{
UINT16 addr = m_nametbl + ( ( y >> 3 ) * 32 );
@@ -609,8 +609,8 @@ void tms9928a_device::device_config_complete()
void tms9928a_device::device_start()
{
- astring tempstring;
- m_screen = downcast<screen_device *>(machine().device(siblingtag(tempstring,m_screen_tag)));
+ astring tempstring;
+ m_screen = downcast<screen_device *>(machine().device(siblingtag(tempstring,m_screen_tag)));
assert( m_screen != NULL );
m_top_border = m_50hz ? TMS9928A_VERT_DISPLAY_START_PAL : TMS9928A_VERT_DISPLAY_START_NTSC;
@@ -627,10 +627,10 @@ void tms9928a_device::device_start()
m_line_timer = timer_alloc(TIMER_LINE);
/* copy default palette into working palette */
- for (int i = 0; i < TMS9928A_PALETTE_SIZE; i++)
- {
+ for (int i = 0; i < TMS9928A_PALETTE_SIZE; i++)
+ {
m_palette[i] = tms9928a_palette[i];
- }
+ }
save_item(NAME(m_Regs[0]));
save_item(NAME(m_Regs[1]));
@@ -681,4 +681,3 @@ void tms9928a_device::device_reset()
m_line_timer->adjust( m_screen->time_until_pos( 0, TMS9928A_HORZ_DISPLAY_START ) );
}
-
diff --git a/src/emu/video/tms9928a.h b/src/emu/video/tms9928a.h
index 8a8808754cc..f6b781af5c5 100644
--- a/src/emu/video/tms9928a.h
+++ b/src/emu/video/tms9928a.h
@@ -27,17 +27,17 @@
#include "emu.h"
-#define TMS9928A_PALETTE_SIZE 16
+#define TMS9928A_PALETTE_SIZE 16
/* Some defines used in defining the screens */
-#define TMS9928A_TOTAL_HORZ 342
-#define TMS9928A_TOTAL_VERT_NTSC 262
-#define TMS9928A_TOTAL_VERT_PAL 313
+#define TMS9928A_TOTAL_HORZ 342
+#define TMS9928A_TOTAL_VERT_NTSC 262
+#define TMS9928A_TOTAL_VERT_PAL 313
-#define TMS9928A_HORZ_DISPLAY_START (2 + 14 + 8 + 13)
-#define TMS9928A_VERT_DISPLAY_START_PAL (13 + 51)
-#define TMS9928A_VERT_DISPLAY_START_NTSC (13 + 27)
+#define TMS9928A_HORZ_DISPLAY_START (2 + 14 + 8 + 13)
+#define TMS9928A_VERT_DISPLAY_START_PAL (13 + 51)
+#define TMS9928A_VERT_DISPLAY_START_NTSC (13 + 27)
#define TMS9928A_INTERFACE(name) \
@@ -52,13 +52,13 @@
#define MCFG_TMS9928A_SCREEN_ADD_NTSC(_screen_tag) \
MCFG_SCREEN_ADD( _screen_tag, RASTER ) \
MCFG_SCREEN_RAW_PARAMS( XTAL_10_738635MHz / 2, TMS9928A_TOTAL_HORZ, TMS9928A_HORZ_DISPLAY_START-12, TMS9928A_HORZ_DISPLAY_START + 256 + 12, \
- TMS9928A_TOTAL_VERT_NTSC, TMS9928A_VERT_DISPLAY_START_NTSC - 12, TMS9928A_VERT_DISPLAY_START_NTSC + 192 + 12 )
+ TMS9928A_TOTAL_VERT_NTSC, TMS9928A_VERT_DISPLAY_START_NTSC - 12, TMS9928A_VERT_DISPLAY_START_NTSC + 192 + 12 )
#define MCFG_TMS9928A_SCREEN_ADD_PAL(_screen_tag) \
MCFG_SCREEN_ADD(_screen_tag, RASTER ) \
- MCFG_SCREEN_RAW_PARAMS( XTAL_10_738635MHz / 2, TMS9928A_TOTAL_HORZ, TMS9928A_HORZ_DISPLAY_START-12, TMS9928A_HORZ_DISPLAY_START + 256 + 12, \
- TMS9928A_TOTAL_VERT_PAL, TMS9928A_VERT_DISPLAY_START_PAL - 12, TMS9928A_VERT_DISPLAY_START_PAL + 192 + 12 )
+ MCFG_SCREEN_RAW_PARAMS( XTAL_10_738635MHz / 2, TMS9928A_TOTAL_HORZ, TMS9928A_HORZ_DISPLAY_START-12, TMS9928A_HORZ_DISPLAY_START + 256 + 12, \
+ TMS9928A_TOTAL_VERT_PAL, TMS9928A_VERT_DISPLAY_START_PAL - 12, TMS9928A_VERT_DISPLAY_START_PAL + 192 + 12 )
extern const device_type TMS9918;
@@ -73,14 +73,14 @@ extern const device_type TMS9129;
struct tms9928a_interface
{
- const char *m_screen_tag;
- int m_vram_size; /* 4K, 8K, or 16K. This should be replaced by fetching data from an address space? */
- devcb_write_line m_out_int_line; /* Callback is called whenever the state of the INT output changes */
- const char *m_regionname; // Alternatively, get the name of the region (if vram size is 0)
+ const char *m_screen_tag;
+ int m_vram_size; /* 4K, 8K, or 16K. This should be replaced by fetching data from an address space? */
+ devcb_write_line m_out_int_line; /* Callback is called whenever the state of the INT output changes */
+ const char *m_regionname; // Alternatively, get the name of the region (if vram size is 0)
};
-class tms9928a_device : public device_t,
+class tms9928a_device : public device_t,
public device_memory_interface,
public tms9928a_interface
{
@@ -119,40 +119,40 @@ private:
static const device_timer_id TIMER_LINE = 0;
- screen_device *m_screen;
+ screen_device *m_screen;
/* TMS9928A internal settings */
- UINT8 m_ReadAhead;
- UINT8 m_Regs[8];
- UINT8 m_StatusReg;
- UINT8 m_FifthSprite;
- UINT8 m_latch;
- UINT8 m_INT;
- UINT16 m_Addr;
- UINT16 m_colour;
- UINT16 m_pattern;
- UINT16 m_nametbl;
- UINT16 m_spriteattribute;
- UINT16 m_spritepattern;
- int m_colourmask;
- int m_patternmask;
- devcb_resolved_write_line m_irq_changed;
- bool m_50hz;
- bool m_reva;
- bool m_99;
- rgb_t m_palette[16];
+ UINT8 m_ReadAhead;
+ UINT8 m_Regs[8];
+ UINT8 m_StatusReg;
+ UINT8 m_FifthSprite;
+ UINT8 m_latch;
+ UINT8 m_INT;
+ UINT16 m_Addr;
+ UINT16 m_colour;
+ UINT16 m_pattern;
+ UINT16 m_nametbl;
+ UINT16 m_spriteattribute;
+ UINT16 m_spritepattern;
+ int m_colourmask;
+ int m_patternmask;
+ devcb_resolved_write_line m_irq_changed;
+ bool m_50hz;
+ bool m_reva;
+ bool m_99;
+ rgb_t m_palette[16];
/* memory */
- const address_space_config m_space_config;
- address_space* m_vram_space;
+ const address_space_config m_space_config;
+ address_space* m_vram_space;
bitmap_rgb32 m_tmpbmp;
- emu_timer *m_line_timer;
- UINT8 m_mode;
+ emu_timer *m_line_timer;
+ UINT8 m_mode;
/* emulation settings */
- int m_top_border;
- int m_vertical_size;
+ int m_top_border;
+ int m_vertical_size;
};
@@ -164,7 +164,7 @@ public:
};
-class tms9918a_device : public tms9928a_device
+class tms9918a_device : public tms9928a_device
{
public:
tms9918a_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
diff --git a/src/emu/video/upd3301.c b/src/emu/video/upd3301.c
index d3c31c89135..464bc5ef6d3 100644
--- a/src/emu/video/upd3301.c
+++ b/src/emu/video/upd3301.c
@@ -35,21 +35,21 @@ const device_type UPD3301 = &device_creator<upd3301_device>;
#define LOG 0
-#define COMMAND_MASK 0xe0
-#define COMMAND_RESET 0x00
-#define COMMAND_START_DISPLAY 0x20
-#define COMMAND_SET_INTERRUPT_MASK 0x40
-#define COMMAND_READ_LIGHT_PEN 0x60 // not supported
-#define COMMAND_LOAD_CURSOR_POSITION 0x80
-#define COMMAND_RESET_INTERRUPT 0xa0
-#define COMMAND_RESET_COUNTERS 0xc0 // not supported
+#define COMMAND_MASK 0xe0
+#define COMMAND_RESET 0x00
+#define COMMAND_START_DISPLAY 0x20
+#define COMMAND_SET_INTERRUPT_MASK 0x40
+#define COMMAND_READ_LIGHT_PEN 0x60 // not supported
+#define COMMAND_LOAD_CURSOR_POSITION 0x80
+#define COMMAND_RESET_INTERRUPT 0xa0
+#define COMMAND_RESET_COUNTERS 0xc0 // not supported
-#define STATUS_VE 0x10
-#define STATUS_U 0x08 // not supported
-#define STATUS_N 0x04 // not supported
-#define STATUS_E 0x02
-#define STATUS_LP 0x01 // not supported
+#define STATUS_VE 0x10
+#define STATUS_U 0x08 // not supported
+#define STATUS_N 0x04 // not supported
+#define STATUS_E 0x02
+#define STATUS_LP 0x01 // not supported
enum
@@ -193,17 +193,17 @@ inline void upd3301_device::recompute_parameters()
//-------------------------------------------------
upd3301_device::upd3301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : device_t(mconfig, UPD3301, "UPD3301", tag, owner, clock),
- m_status(0),
- m_param_count(0),
- m_data_fifo_pos(0),
- m_attr_fifo_pos(0),
- m_input_fifo(0),
- m_h(80),
- m_l(20),
- m_r(10),
- m_v(6),
- m_z(32)
+ : device_t(mconfig, UPD3301, "UPD3301", tag, owner, clock),
+ m_status(0),
+ m_param_count(0),
+ m_data_fifo_pos(0),
+ m_attr_fifo_pos(0),
+ m_input_fifo(0),
+ m_h(80),
+ m_l(20),
+ m_r(10),
+ m_v(6),
+ m_z(32)
{
}
diff --git a/src/emu/video/upd3301.h b/src/emu/video/upd3301.h
index e259a634be2..5f6f46caf26 100644
--- a/src/emu/video/upd3301.h
+++ b/src/emu/video/upd3301.h
@@ -74,31 +74,31 @@ typedef void (*upd3301_display_pixels_func)(device_t *device, bitmap_rgb32 &bitm
struct upd3301_interface
{
- const char *m_screen_tag; // screen we are acting on
- int m_width; // char width in pixels
+ const char *m_screen_tag; // screen we are acting on
+ int m_width; // char width in pixels
- upd3301_display_pixels_func m_display_cb;
+ upd3301_display_pixels_func m_display_cb;
- devcb_write_line m_out_int_cb;
- devcb_write_line m_out_drq_cb;
- devcb_write_line m_out_hrtc_cb;
- devcb_write_line m_out_vrtc_cb;
+ devcb_write_line m_out_int_cb;
+ devcb_write_line m_out_drq_cb;
+ devcb_write_line m_out_hrtc_cb;
+ devcb_write_line m_out_vrtc_cb;
};
// ======================> upd3301_device
-class upd3301_device : public device_t,
+class upd3301_device : public device_t,
public upd3301_interface
{
public:
- // construction/destruction
- upd3301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ upd3301_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
- DECLARE_WRITE8_MEMBER( dack_w );
+ DECLARE_READ8_MEMBER( read );
+ DECLARE_WRITE8_MEMBER( write );
+ DECLARE_WRITE8_MEMBER( dack_w );
DECLARE_WRITE_LINE_MEMBER( lpen_w );
DECLARE_READ_LINE_MEMBER( hrtc_r );
DECLARE_READ_LINE_MEMBER( vrtc_r );
@@ -106,10 +106,10 @@ public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
- // device-level overrides
+ // device-level overrides
virtual void device_config_complete();
- virtual void device_start();
- virtual void device_reset();
+ virtual void device_start();
+ virtual void device_reset();
virtual void device_clock_changed();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
@@ -128,60 +128,60 @@ private:
void draw_scanline();
- devcb_resolved_write_line m_out_int_func;
- devcb_resolved_write_line m_out_drq_func;
- devcb_resolved_write_line m_out_hrtc_func;
- devcb_resolved_write_line m_out_vrtc_func;
+ devcb_resolved_write_line m_out_int_func;
+ devcb_resolved_write_line m_out_drq_func;
+ devcb_resolved_write_line m_out_hrtc_func;
+ devcb_resolved_write_line m_out_vrtc_func;
screen_device *m_screen;
// screen drawing
- bitmap_rgb32 *m_bitmap; // bitmap
- int m_y; // current scanline
- int m_hrtc; // horizontal retrace
- int m_vrtc; // vertical retrace
+ bitmap_rgb32 *m_bitmap; // bitmap
+ int m_y; // current scanline
+ int m_hrtc; // horizontal retrace
+ int m_vrtc; // vertical retrace
// live state
- int m_mode; // command mode
- UINT8 m_status; // status register
- int m_param_count; // parameter count
+ int m_mode; // command mode
+ UINT8 m_status; // status register
+ int m_param_count; // parameter count
// FIFOs
- UINT8 m_data_fifo[80][2]; // row data FIFO
- UINT8 m_attr_fifo[40][2]; // attribute FIFO
- int m_data_fifo_pos; // row data FIFO position
- int m_attr_fifo_pos; // attribute FIFO position
- int m_input_fifo; // which FIFO is in input mode
+ UINT8 m_data_fifo[80][2]; // row data FIFO
+ UINT8 m_attr_fifo[40][2]; // attribute FIFO
+ int m_data_fifo_pos; // row data FIFO position
+ int m_attr_fifo_pos; // attribute FIFO position
+ int m_input_fifo; // which FIFO is in input mode
// interrupts
- int m_mn; // disable special character interrupt
- int m_me; // disable end of screen interrupt
- int m_dma_mode; // DMA mode
+ int m_mn; // disable special character interrupt
+ int m_me; // disable end of screen interrupt
+ int m_dma_mode; // DMA mode
// screen geometry
- int m_h; // characters per line
- int m_b; // cursor blink time
- int m_l; // lines per screen
- int m_s; // display every other line
- int m_c; // cursor mode
- int m_r; // lines per character
- int m_v; // vertical blanking height
- int m_z; // horizontal blanking width
+ int m_h; // characters per line
+ int m_b; // cursor blink time
+ int m_l; // lines per screen
+ int m_s; // display every other line
+ int m_c; // cursor mode
+ int m_r; // lines per character
+ int m_v; // vertical blanking height
+ int m_z; // horizontal blanking width
// attributes
- int m_at1; //
- int m_at0; //
- int m_sc; //
- int m_attr; // attributes per row
- int m_attr_blink; // attribute blink
- int m_attr_frame; // attribute blink frame counter
+ int m_at1; //
+ int m_at0; //
+ int m_sc; //
+ int m_attr; // attributes per row
+ int m_attr_blink; // attribute blink
+ int m_attr_frame; // attribute blink frame counter
// cursor
- int m_cm; // cursor visible
- int m_cx; // cursor column
- int m_cy; // cursor row
- int m_cursor_blink; // cursor blink
- int m_cursor_frame; // cursor blink frame counter
+ int m_cm; // cursor visible
+ int m_cx; // cursor column
+ int m_cy; // cursor row
+ int m_cursor_blink; // cursor blink
+ int m_cursor_frame; // cursor blink frame counter
// timers
emu_timer *m_hrtc_timer;
diff --git a/src/emu/video/v9938.c b/src/emu/video/v9938.c
index 9c19462dbf0..1e1511e48ac 100644
--- a/src/emu/video/v9938.c
+++ b/src/emu/video/v9938.c
@@ -18,7 +18,7 @@ todo:
#include "v9938.h"
#define VERBOSE 0
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
enum
{
@@ -62,7 +62,7 @@ const device_type V9938 = &device_creator<v9938_device>;
const device_type V9958 = &device_creator<v9958_device>;
v99x8_device::v99x8_device(const machine_config &mconfig, device_type type, const char *name, const char *shortname, const char *tag, device_t *owner, UINT32 clock)
-: device_t(mconfig, type, name, shortname, tag, owner, clock),
+: device_t(mconfig, type, name, shortname, tag, owner, clock),
device_memory_interface(mconfig, *this),
m_space_config("vram", ENDIANNESS_BIG, 8, 18),
m_model(0),
@@ -201,7 +201,7 @@ void v99x8_device::update_mouse_state(int mx_delta, int my_delta, int button_sta
m_button_state = (button_state << 6) & 0xc0;
if ((m_cont_reg[8] & 0xc0) == 0x80)
- { // vdp will process mouse deltas only if it is in mouse mode
+ { // vdp will process mouse deltas only if it is in mouse mode
m_mx_delta += mx_delta;
m_my_delta += my_delta;
}
@@ -245,7 +245,7 @@ b0 is set if b2 and b1 are set (remember, color bus is 3 bits)
PALETTE_INIT( v9938 )
{
- int i;
+ int i;
// create the full 512 colour palette
for (i=0;i<512;i++)
@@ -353,8 +353,8 @@ READ8_MEMBER( v99x8_device::read )
{
switch (offset & 3)
{
- case 0: return vram_r();
- case 1: return status_r();
+ case 0: return vram_r();
+ case 1: return status_r();
}
return 0xff;
}
@@ -363,10 +363,10 @@ WRITE8_MEMBER( v99x8_device::write )
{
switch (offset & 3)
{
- case 0: vram_w(data); break;
- case 1: command_w(data); break;
- case 2: palette_w(data); break;
- case 3: register_w(data); break;
+ case 0: vram_w(data); break;
+ case 1: command_w(data); break;
+ case 2: palette_w(data); break;
+ case 3: register_w(data); break;
}
}
@@ -384,7 +384,7 @@ UINT8 v99x8_device::vram_r()
if (m_cont_reg[45] & 0x40) // Expansion memory
{
if ( (m_mode == V9938_MODE_GRAPHIC6) || (m_mode == V9938_MODE_GRAPHIC7) )
- address >>= 1; // correct?
+ address >>= 1; // correct?
// Expansion memory only offers 64 K
if (m_vram_size > 0x20000 && ((address & 0x10000)==0))
m_read_ahead = m_vram_space->read_byte(address + EXPMEM_OFFSET);
@@ -432,20 +432,20 @@ UINT8 v99x8_device::status_r()
case 2:
/*update_command ();*/
/*
- WTF is this? Whatever this was intended to do, it is nonsensical.
- Might as well pick a random number....
- This was an attempt to emulate H-Blank flag ;)
- n = cycles_currently_ran ();
- if ( (n < 28) || (n > 199) ) vdp.statReg[2] |= 0x20;
- else vdp.statReg[2] &= ~0x20;
- */
+ WTF is this? Whatever this was intended to do, it is nonsensical.
+ Might as well pick a random number....
+ This was an attempt to emulate H-Blank flag ;)
+ n = cycles_currently_ran ();
+ if ( (n < 28) || (n > 199) ) vdp.statReg[2] |= 0x20;
+ else vdp.statReg[2] &= ~0x20;
+ */
if (machine().rand() & 1) m_stat_reg[2] |= 0x20;
else m_stat_reg[2] &= ~0x20;
ret = m_stat_reg[2];
break;
case 3:
if ((m_cont_reg[8] & 0xc0) == 0x80)
- { // mouse mode: return x mouse delta
+ { // mouse mode: return x mouse delta
ret = m_mx_delta;
m_mx_delta = 0;
}
@@ -454,7 +454,7 @@ UINT8 v99x8_device::status_r()
break;
case 5:
if ((m_cont_reg[8] & 0xc0) == 0x80)
- { // mouse mode: return y mouse delta
+ { // mouse mode: return y mouse delta
ret = m_my_delta;
m_my_delta = 0;
}
@@ -514,7 +514,7 @@ void v99x8_device::vram_w(UINT8 data)
if (m_cont_reg[45] & 0x40)
{
if ( (m_mode == V9938_MODE_GRAPHIC6) || (m_mode == V9938_MODE_GRAPHIC7) )
- address >>= 1; // correct?
+ address >>= 1; // correct?
if (m_vram_size > 0x20000 && ((address & 0x10000)==0))
m_vram_space->write_byte(EXPMEM_OFFSET + address, data);
}
@@ -801,10 +801,10 @@ void v99x8_device::check_int()
}
/*
- ** Somehow the IRQ request is going down without cpu_irq_line () being
- ** called; because of this Mr. Ghost, Xevious and SD Snatcher don't
- ** run. As a patch it's called every scanline
- */
+ ** Somehow the IRQ request is going down without cpu_irq_line () being
+ ** called; because of this Mr. Ghost, Xevious and SD Snatcher don't
+ ** run. As a patch it's called every scanline
+ */
m_int_callback (*this, n);
}
@@ -922,10 +922,10 @@ inline bool v99x8_device::v9938_second_field()
template<typename _PixelType, int _Width>
void v99x8_device::default_border(const pen_t *pens, _PixelType *ln)
{
- _PixelType pen;
- int i;
+ _PixelType pen;
+ int i;
- pen = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
+ pen = pens[m_pal_ind16[(m_cont_reg[7]&0x0f)]];
i = _Width;
while (i--) *ln++ = pen;
@@ -1625,7 +1625,7 @@ void v99x8_device::graphic7_draw_sprite(const pen_t *pens, _PixelType *ln, UINT8
void v99x8_device::sprite_mode1 (int line, UINT8 *col)
{
- int attrtbl_addr, patterntbl_addr, pattern_addr;
+ int attrtbl_addr, patterntbl_addr, pattern_addr;
int x, y, p, height, c, p2, i, n, pattern;
memset(col, 0, 256);
@@ -2280,11 +2280,11 @@ while ((cnt-=delta) > 0) {
#define post__x_y(MX) \
if (!--ANX || ((ADX+=TX)&MX)) { \
if (!(--NY&1023) || (DY+=TY)==-1) \
- break; \
- else { \
- ADX=DX; \
- ANX=NX; \
- } \
+ break; \
+ else { \
+ ADX=DX; \
+ ANX=NX; \
+ } \
} \
post_loop
@@ -2292,9 +2292,9 @@ post_loop
#define post__xyy(MX) \
if ((ADX+=TX)&MX) { \
if (!(--NY&1023) || (SY+=TY)==-1 || (DY+=TY)==-1) \
- break; \
- else \
- ADX=DX; \
+ break; \
+ else \
+ ADX=DX; \
} \
post_loop
@@ -2302,12 +2302,12 @@ post_loop
#define post_xxyy(MX) \
if (!--ANX || ((ASX+=TX)&MX) || ((ADX+=TX)&MX)) { \
if (!(--NY&1023) || (SY+=TY)==-1 || (DY+=TY)==-1) \
- break; \
- else { \
- ASX=SX; \
- ADX=DX; \
- ANX=NX; \
- } \
+ break; \
+ else { \
+ ASX=SX; \
+ ADX=DX; \
+ ANX=NX; \
+ } \
} \
post_loop
@@ -2490,11 +2490,11 @@ inline void v99x8_device::VDPpset8(int MXD, int DX, int DY, UINT8 CL, UINT8 OP)
inline void v99x8_device::VDPpset(UINT8 SM, int MXD, int DX, int DY, UINT8 CL, UINT8 OP)
{
switch (SM) {
- case 0: VDPpset5(MXD, DX, DY, CL, OP); break;
- case 1: VDPpset6(MXD, DX, DY, CL, OP); break;
- case 2: VDPpset7(MXD, DX, DY, CL, OP); break;
- case 3: VDPpset8(MXD, DX, DY, CL, OP); break;
- }
+ case 0: VDPpset5(MXD, DX, DY, CL, OP); break;
+ case 1: VDPpset6(MXD, DX, DY, CL, OP); break;
+ case 2: VDPpset7(MXD, DX, DY, CL, OP); break;
+ case 3: VDPpset8(MXD, DX, DY, CL, OP); break;
+ }
}
/** get_vdp_timing_value() **************************************/
@@ -2839,34 +2839,34 @@ void v99x8_device::hmmv_engine()
cnt = m_vdp_ops_count;
switch (m_mode) {
- default:
- case V9938_MODE_GRAPHIC4: pre_loop m_vram_space->write_byte(VDP_VRMP5(MXD, ADX, DY), CL); post__x_y(256)
- break;
- case V9938_MODE_GRAPHIC5: pre_loop m_vram_space->write_byte(VDP_VRMP6(MXD, ADX, DY), CL); post__x_y(512)
- break;
- case V9938_MODE_GRAPHIC6: pre_loop m_vram_space->write_byte(VDP_VRMP7(MXD, ADX, DY), CL); post__x_y(512)
- break;
- case V9938_MODE_GRAPHIC7: pre_loop m_vram_space->write_byte(VDP_VRMP8(MXD, ADX, DY), CL); post__x_y(256)
- break;
- }
-
- if ((m_vdp_ops_count=cnt)>0) {
- // Command execution done
- m_stat_reg[2]&=0xFE;
- m_vdp_engine=0;
- if (!NY)
- DY+=TY;
- m_cont_reg[42]=NY & 0xFF;
- m_cont_reg[43]=(NY>>8) & 0x03;
- m_cont_reg[38]=DY & 0xFF;
- m_cont_reg[39]=(DY>>8) & 0x03;
- }
- else {
- m_mmc.DY=DY;
- m_mmc.NY=NY;
- m_mmc.ANX=ANX;
- m_mmc.ADX=ADX;
- }
+ default:
+ case V9938_MODE_GRAPHIC4: pre_loop m_vram_space->write_byte(VDP_VRMP5(MXD, ADX, DY), CL); post__x_y(256)
+ break;
+ case V9938_MODE_GRAPHIC5: pre_loop m_vram_space->write_byte(VDP_VRMP6(MXD, ADX, DY), CL); post__x_y(512)
+ break;
+ case V9938_MODE_GRAPHIC6: pre_loop m_vram_space->write_byte(VDP_VRMP7(MXD, ADX, DY), CL); post__x_y(512)
+ break;
+ case V9938_MODE_GRAPHIC7: pre_loop m_vram_space->write_byte(VDP_VRMP8(MXD, ADX, DY), CL); post__x_y(256)
+ break;
+ }
+
+ if ((m_vdp_ops_count=cnt)>0) {
+ // Command execution done
+ m_stat_reg[2]&=0xFE;
+ m_vdp_engine=0;
+ if (!NY)
+ DY+=TY;
+ m_cont_reg[42]=NY & 0xFF;
+ m_cont_reg[43]=(NY>>8) & 0x03;
+ m_cont_reg[38]=DY & 0xFF;
+ m_cont_reg[39]=(DY>>8) & 0x03;
+ }
+ else {
+ m_mmc.DY=DY;
+ m_mmc.NY=NY;
+ m_mmc.ANX=ANX;
+ m_mmc.ADX=ADX;
+ }
}
/** hmmm_engine() *********************************************/
@@ -3090,7 +3090,7 @@ UINT8 v99x8_device::command_unit_w(UINT8 Op)
if (m_mode<5)
return(0);
- SM = m_mode-5; // Screen mode index 0..3
+ SM = m_mode-5; // Screen mode index 0..3
m_mmc.CM = Op>>4;
if ((m_mmc.CM & 0x0C) != 0x0C && m_mmc.CM != 0)
@@ -3222,4 +3222,3 @@ void v99x8_device::update_command()
if(m_vdp_engine) (this->*m_vdp_engine)();
}
}
-
diff --git a/src/emu/video/v9938.h b/src/emu/video/v9938.h
index e992e84b6be..14731a2b17a 100644
--- a/src/emu/video/v9938.h
+++ b/src/emu/video/v9938.h
@@ -34,13 +34,13 @@
// init functions
-#define MODEL_V9938 (0)
-#define MODEL_V9958 (1)
+#define MODEL_V9938 (0)
+#define MODEL_V9958 (1)
// resolutions
-#define RENDER_HIGH (0)
-#define RENDER_LOW (1)
-#define RENDER_AUTO (2)
+#define RENDER_HIGH (0)
+#define RENDER_LOW (1)
+#define RENDER_AUTO (2)
//**************************************************************************
@@ -69,7 +69,7 @@ class v99x8_device : public device_t, public device_memory_interface
friend PALETTE_INIT( v9958 );
protected:
- // construction/destruction
+ // construction/destruction
v99x8_device(const machine_config &mconfig, device_type type, const char *name, const char *shortname, const char *tag, device_t *owner, UINT32 clock);
public:
@@ -99,8 +99,8 @@ public:
void reset_line(int state) { if (state==ASSERT_LINE) device_reset(); }
protected:
- const address_space_config m_space_config;
- address_space* m_vram_space;
+ const address_space_config m_space_config;
+ address_space* m_vram_space;
int m_model;
@@ -188,7 +188,7 @@ private:
// general
int m_offset_x, m_offset_y, m_visible_y, m_mode;
// palette
- int m_pal_write_first, m_cmd_write_first;
+ int m_pal_write_first, m_cmd_write_first;
UINT8 m_pal_write, m_cmd_write;
UINT8 m_pal_reg[32], m_stat_reg[10], m_cont_reg[48], m_read_ahead;
@@ -196,13 +196,13 @@ private:
UINT16 m_address_latch;
int m_vram_size;
- // interrupt
- UINT8 m_int_state;
- v99x8_interrupt_delegate m_int_callback;
- const char *m_int_callback_device_name;
+ // interrupt
+ UINT8 m_int_state;
+ v99x8_interrupt_delegate m_int_callback;
+ const char *m_int_callback_device_name;
int m_scanline;
- // blinking
- int m_blink, m_blink_count;
+ // blinking
+ int m_blink, m_blink_count;
// size
int m_size, m_size_old, m_size_auto, m_size_now;
// mouse
@@ -253,13 +253,13 @@ private:
class v9938_device : public v99x8_device
{
public:
- v9938_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v9938_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class v9958_device : public v99x8_device
{
public:
- v9958_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ v9958_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
PALETTE_INIT( v9938 );
diff --git a/src/emu/video/vector.c b/src/emu/video/vector.c
index 252b8ee9840..5a6652b2523 100644
--- a/src/emu/video/vector.c
+++ b/src/emu/video/vector.c
@@ -37,10 +37,10 @@
-#define VECTOR_WIDTH_DENOM 512
+#define VECTOR_WIDTH_DENOM 512
-#define MAX_POINTS 10000
+#define MAX_POINTS 10000
#define VECTOR_TEAM \
"-* Vector Heads *-\n" \
@@ -57,19 +57,19 @@
#if 0
-#define TEXTURE_LENGTH_BUCKETS 32
-#define TEXTURE_INTENSITY_BUCKETS 4
-#define TEXTURE_WIDTH 16
+#define TEXTURE_LENGTH_BUCKETS 32
+#define TEXTURE_INTENSITY_BUCKETS 4
+#define TEXTURE_WIDTH 16
-#define MAX_INTENSITY 2
-#define VECTOR_BLEED (0.25f)
-#define VECTOR_INT_SCALE (255.0f * 1.5f)
+#define MAX_INTENSITY 2
+#define VECTOR_BLEED (0.25f)
+#define VECTOR_INT_SCALE (255.0f * 1.5f)
struct vector_texture
{
- render_texture * texture;
- bitmap_argb32 * bitmap;
+ render_texture * texture;
+ bitmap_argb32 * bitmap;
};
static vector_texture *vectortex[TEXTURE_INTENSITY_BUCKETS][TEXTURE_LENGTH_BUCKETS];
diff --git a/src/emu/video/vector.h b/src/emu/video/vector.h
index d91727edc4d..da00a4c67ab 100644
--- a/src/emu/video/vector.h
+++ b/src/emu/video/vector.h
@@ -24,4 +24,3 @@ void vector_set_beam(float _beam);
float vector_get_beam(void);
#endif
-
diff --git a/src/emu/video/vooddefs.h b/src/emu/video/vooddefs.h
index d5522db4488..5f5c8e8bdd1 100644
--- a/src/emu/video/vooddefs.h
+++ b/src/emu/video/vooddefs.h
@@ -53,62 +53,62 @@ enum
};
/* maximum number of TMUs */
-#define MAX_TMU 2
+#define MAX_TMU 2
/* accumulate operations less than this number of clocks */
-#define ACCUMULATE_THRESHOLD 0
+#define ACCUMULATE_THRESHOLD 0
/* number of clocks to set up a triangle (just a guess) */
-#define TRIANGLE_SETUP_CLOCKS 100
+#define TRIANGLE_SETUP_CLOCKS 100
/* maximum number of rasterizers */
-#define MAX_RASTERIZERS 1024
+#define MAX_RASTERIZERS 1024
/* size of the rasterizer hash table */
-#define RASTER_HASH_SIZE 97
+#define RASTER_HASH_SIZE 97
/* flags for LFB writes */
-#define LFB_RGB_PRESENT 1
-#define LFB_ALPHA_PRESENT 2
-#define LFB_DEPTH_PRESENT 4
-#define LFB_DEPTH_PRESENT_MSW 8
+#define LFB_RGB_PRESENT 1
+#define LFB_ALPHA_PRESENT 2
+#define LFB_DEPTH_PRESENT 4
+#define LFB_DEPTH_PRESENT_MSW 8
/* flags for the register access array */
-#define REGISTER_READ 0x01 /* reads are allowed */
-#define REGISTER_WRITE 0x02 /* writes are allowed */
-#define REGISTER_PIPELINED 0x04 /* writes are pipelined */
-#define REGISTER_FIFO 0x08 /* writes go to FIFO */
-#define REGISTER_WRITETHRU 0x10 /* writes are valid even for CMDFIFO */
+#define REGISTER_READ 0x01 /* reads are allowed */
+#define REGISTER_WRITE 0x02 /* writes are allowed */
+#define REGISTER_PIPELINED 0x04 /* writes are pipelined */
+#define REGISTER_FIFO 0x08 /* writes go to FIFO */
+#define REGISTER_WRITETHRU 0x10 /* writes are valid even for CMDFIFO */
/* shorter combinations to make the table smaller */
-#define REG_R (REGISTER_READ)
-#define REG_W (REGISTER_WRITE)
-#define REG_WT (REGISTER_WRITE | REGISTER_WRITETHRU)
-#define REG_RW (REGISTER_READ | REGISTER_WRITE)
-#define REG_RWT (REGISTER_READ | REGISTER_WRITE | REGISTER_WRITETHRU)
-#define REG_RP (REGISTER_READ | REGISTER_PIPELINED)
-#define REG_WP (REGISTER_WRITE | REGISTER_PIPELINED)
-#define REG_RWP (REGISTER_READ | REGISTER_WRITE | REGISTER_PIPELINED)
-#define REG_RWPT (REGISTER_READ | REGISTER_WRITE | REGISTER_PIPELINED | REGISTER_WRITETHRU)
-#define REG_RF (REGISTER_READ | REGISTER_FIFO)
-#define REG_WF (REGISTER_WRITE | REGISTER_FIFO)
-#define REG_RWF (REGISTER_READ | REGISTER_WRITE | REGISTER_FIFO)
-#define REG_RPF (REGISTER_READ | REGISTER_PIPELINED | REGISTER_FIFO)
-#define REG_WPF (REGISTER_WRITE | REGISTER_PIPELINED | REGISTER_FIFO)
-#define REG_RWPF (REGISTER_READ | REGISTER_WRITE | REGISTER_PIPELINED | REGISTER_FIFO)
+#define REG_R (REGISTER_READ)
+#define REG_W (REGISTER_WRITE)
+#define REG_WT (REGISTER_WRITE | REGISTER_WRITETHRU)
+#define REG_RW (REGISTER_READ | REGISTER_WRITE)
+#define REG_RWT (REGISTER_READ | REGISTER_WRITE | REGISTER_WRITETHRU)
+#define REG_RP (REGISTER_READ | REGISTER_PIPELINED)
+#define REG_WP (REGISTER_WRITE | REGISTER_PIPELINED)
+#define REG_RWP (REGISTER_READ | REGISTER_WRITE | REGISTER_PIPELINED)
+#define REG_RWPT (REGISTER_READ | REGISTER_WRITE | REGISTER_PIPELINED | REGISTER_WRITETHRU)
+#define REG_RF (REGISTER_READ | REGISTER_FIFO)
+#define REG_WF (REGISTER_WRITE | REGISTER_FIFO)
+#define REG_RWF (REGISTER_READ | REGISTER_WRITE | REGISTER_FIFO)
+#define REG_RPF (REGISTER_READ | REGISTER_PIPELINED | REGISTER_FIFO)
+#define REG_WPF (REGISTER_WRITE | REGISTER_PIPELINED | REGISTER_FIFO)
+#define REG_RWPF (REGISTER_READ | REGISTER_WRITE | REGISTER_PIPELINED | REGISTER_FIFO)
/* lookup bits is the log2 of the size of the reciprocal/log table */
-#define RECIPLOG_LOOKUP_BITS 9
+#define RECIPLOG_LOOKUP_BITS 9
/* input precision is how many fraction bits the input value has; this is a 64-bit number */
-#define RECIPLOG_INPUT_PREC 32
+#define RECIPLOG_INPUT_PREC 32
/* lookup precision is how many fraction bits each table entry contains */
-#define RECIPLOG_LOOKUP_PREC 22
+#define RECIPLOG_LOOKUP_PREC 22
/* output precision is how many fraction bits the result should have */
-#define RECIP_OUTPUT_PREC 15
-#define LOG_OUTPUT_PREC 8
+#define RECIP_OUTPUT_PREC 15
+#define LOG_OUTPUT_PREC 8
@@ -126,227 +126,227 @@ enum
*/
/* 0x000 */
-#define status (0x000/4) /* R P */
-#define intrCtrl (0x004/4) /* RW P -- Voodoo2/Banshee only */
-#define vertexAx (0x008/4) /* W PF */
-#define vertexAy (0x00c/4) /* W PF */
-#define vertexBx (0x010/4) /* W PF */
-#define vertexBy (0x014/4) /* W PF */
-#define vertexCx (0x018/4) /* W PF */
-#define vertexCy (0x01c/4) /* W PF */
-#define startR (0x020/4) /* W PF */
-#define startG (0x024/4) /* W PF */
-#define startB (0x028/4) /* W PF */
-#define startZ (0x02c/4) /* W PF */
-#define startA (0x030/4) /* W PF */
-#define startS (0x034/4) /* W PF */
-#define startT (0x038/4) /* W PF */
-#define startW (0x03c/4) /* W PF */
+#define status (0x000/4) /* R P */
+#define intrCtrl (0x004/4) /* RW P -- Voodoo2/Banshee only */
+#define vertexAx (0x008/4) /* W PF */
+#define vertexAy (0x00c/4) /* W PF */
+#define vertexBx (0x010/4) /* W PF */
+#define vertexBy (0x014/4) /* W PF */
+#define vertexCx (0x018/4) /* W PF */
+#define vertexCy (0x01c/4) /* W PF */
+#define startR (0x020/4) /* W PF */
+#define startG (0x024/4) /* W PF */
+#define startB (0x028/4) /* W PF */
+#define startZ (0x02c/4) /* W PF */
+#define startA (0x030/4) /* W PF */
+#define startS (0x034/4) /* W PF */
+#define startT (0x038/4) /* W PF */
+#define startW (0x03c/4) /* W PF */
/* 0x040 */
-#define dRdX (0x040/4) /* W PF */
-#define dGdX (0x044/4) /* W PF */
-#define dBdX (0x048/4) /* W PF */
-#define dZdX (0x04c/4) /* W PF */
-#define dAdX (0x050/4) /* W PF */
-#define dSdX (0x054/4) /* W PF */
-#define dTdX (0x058/4) /* W PF */
-#define dWdX (0x05c/4) /* W PF */
-#define dRdY (0x060/4) /* W PF */
-#define dGdY (0x064/4) /* W PF */
-#define dBdY (0x068/4) /* W PF */
-#define dZdY (0x06c/4) /* W PF */
-#define dAdY (0x070/4) /* W PF */
-#define dSdY (0x074/4) /* W PF */
-#define dTdY (0x078/4) /* W PF */
-#define dWdY (0x07c/4) /* W PF */
+#define dRdX (0x040/4) /* W PF */
+#define dGdX (0x044/4) /* W PF */
+#define dBdX (0x048/4) /* W PF */
+#define dZdX (0x04c/4) /* W PF */
+#define dAdX (0x050/4) /* W PF */
+#define dSdX (0x054/4) /* W PF */
+#define dTdX (0x058/4) /* W PF */
+#define dWdX (0x05c/4) /* W PF */
+#define dRdY (0x060/4) /* W PF */
+#define dGdY (0x064/4) /* W PF */
+#define dBdY (0x068/4) /* W PF */
+#define dZdY (0x06c/4) /* W PF */
+#define dAdY (0x070/4) /* W PF */
+#define dSdY (0x074/4) /* W PF */
+#define dTdY (0x078/4) /* W PF */
+#define dWdY (0x07c/4) /* W PF */
/* 0x080 */
-#define triangleCMD (0x080/4) /* W PF */
-#define fvertexAx (0x088/4) /* W PF */
-#define fvertexAy (0x08c/4) /* W PF */
-#define fvertexBx (0x090/4) /* W PF */
-#define fvertexBy (0x094/4) /* W PF */
-#define fvertexCx (0x098/4) /* W PF */
-#define fvertexCy (0x09c/4) /* W PF */
-#define fstartR (0x0a0/4) /* W PF */
-#define fstartG (0x0a4/4) /* W PF */
-#define fstartB (0x0a8/4) /* W PF */
-#define fstartZ (0x0ac/4) /* W PF */
-#define fstartA (0x0b0/4) /* W PF */
-#define fstartS (0x0b4/4) /* W PF */
-#define fstartT (0x0b8/4) /* W PF */
-#define fstartW (0x0bc/4) /* W PF */
+#define triangleCMD (0x080/4) /* W PF */
+#define fvertexAx (0x088/4) /* W PF */
+#define fvertexAy (0x08c/4) /* W PF */
+#define fvertexBx (0x090/4) /* W PF */
+#define fvertexBy (0x094/4) /* W PF */
+#define fvertexCx (0x098/4) /* W PF */
+#define fvertexCy (0x09c/4) /* W PF */
+#define fstartR (0x0a0/4) /* W PF */
+#define fstartG (0x0a4/4) /* W PF */
+#define fstartB (0x0a8/4) /* W PF */
+#define fstartZ (0x0ac/4) /* W PF */
+#define fstartA (0x0b0/4) /* W PF */
+#define fstartS (0x0b4/4) /* W PF */
+#define fstartT (0x0b8/4) /* W PF */
+#define fstartW (0x0bc/4) /* W PF */
/* 0x0c0 */
-#define fdRdX (0x0c0/4) /* W PF */
-#define fdGdX (0x0c4/4) /* W PF */
-#define fdBdX (0x0c8/4) /* W PF */
-#define fdZdX (0x0cc/4) /* W PF */
-#define fdAdX (0x0d0/4) /* W PF */
-#define fdSdX (0x0d4/4) /* W PF */
-#define fdTdX (0x0d8/4) /* W PF */
-#define fdWdX (0x0dc/4) /* W PF */
-#define fdRdY (0x0e0/4) /* W PF */
-#define fdGdY (0x0e4/4) /* W PF */
-#define fdBdY (0x0e8/4) /* W PF */
-#define fdZdY (0x0ec/4) /* W PF */
-#define fdAdY (0x0f0/4) /* W PF */
-#define fdSdY (0x0f4/4) /* W PF */
-#define fdTdY (0x0f8/4) /* W PF */
-#define fdWdY (0x0fc/4) /* W PF */
+#define fdRdX (0x0c0/4) /* W PF */
+#define fdGdX (0x0c4/4) /* W PF */
+#define fdBdX (0x0c8/4) /* W PF */
+#define fdZdX (0x0cc/4) /* W PF */
+#define fdAdX (0x0d0/4) /* W PF */
+#define fdSdX (0x0d4/4) /* W PF */
+#define fdTdX (0x0d8/4) /* W PF */
+#define fdWdX (0x0dc/4) /* W PF */
+#define fdRdY (0x0e0/4) /* W PF */
+#define fdGdY (0x0e4/4) /* W PF */
+#define fdBdY (0x0e8/4) /* W PF */
+#define fdZdY (0x0ec/4) /* W PF */
+#define fdAdY (0x0f0/4) /* W PF */
+#define fdSdY (0x0f4/4) /* W PF */
+#define fdTdY (0x0f8/4) /* W PF */
+#define fdWdY (0x0fc/4) /* W PF */
/* 0x100 */
-#define ftriangleCMD (0x100/4) /* W PF */
-#define fbzColorPath (0x104/4) /* RW PF */
-#define fogMode (0x108/4) /* RW PF */
-#define alphaMode (0x10c/4) /* RW PF */
-#define fbzMode (0x110/4) /* RW F */
-#define lfbMode (0x114/4) /* RW F */
-#define clipLeftRight (0x118/4) /* RW F */
-#define clipLowYHighY (0x11c/4) /* RW F */
-#define nopCMD (0x120/4) /* W F */
-#define fastfillCMD (0x124/4) /* W F */
-#define swapbufferCMD (0x128/4) /* W F */
-#define fogColor (0x12c/4) /* W F */
-#define zaColor (0x130/4) /* W F */
-#define chromaKey (0x134/4) /* W F */
-#define chromaRange (0x138/4) /* W F -- Voodoo2/Banshee only */
-#define userIntrCMD (0x13c/4) /* W F -- Voodoo2/Banshee only */
+#define ftriangleCMD (0x100/4) /* W PF */
+#define fbzColorPath (0x104/4) /* RW PF */
+#define fogMode (0x108/4) /* RW PF */
+#define alphaMode (0x10c/4) /* RW PF */
+#define fbzMode (0x110/4) /* RW F */
+#define lfbMode (0x114/4) /* RW F */
+#define clipLeftRight (0x118/4) /* RW F */
+#define clipLowYHighY (0x11c/4) /* RW F */
+#define nopCMD (0x120/4) /* W F */
+#define fastfillCMD (0x124/4) /* W F */
+#define swapbufferCMD (0x128/4) /* W F */
+#define fogColor (0x12c/4) /* W F */
+#define zaColor (0x130/4) /* W F */
+#define chromaKey (0x134/4) /* W F */
+#define chromaRange (0x138/4) /* W F -- Voodoo2/Banshee only */
+#define userIntrCMD (0x13c/4) /* W F -- Voodoo2/Banshee only */
/* 0x140 */
-#define stipple (0x140/4) /* RW F */
-#define color0 (0x144/4) /* RW F */
-#define color1 (0x148/4) /* RW F */
-#define fbiPixelsIn (0x14c/4) /* R */
-#define fbiChromaFail (0x150/4) /* R */
-#define fbiZfuncFail (0x154/4) /* R */
-#define fbiAfuncFail (0x158/4) /* R */
-#define fbiPixelsOut (0x15c/4) /* R */
-#define fogTable (0x160/4) /* W F */
+#define stipple (0x140/4) /* RW F */
+#define color0 (0x144/4) /* RW F */
+#define color1 (0x148/4) /* RW F */
+#define fbiPixelsIn (0x14c/4) /* R */
+#define fbiChromaFail (0x150/4) /* R */
+#define fbiZfuncFail (0x154/4) /* R */
+#define fbiAfuncFail (0x158/4) /* R */
+#define fbiPixelsOut (0x15c/4) /* R */
+#define fogTable (0x160/4) /* W F */
/* 0x1c0 */
-#define cmdFifoBaseAddr (0x1e0/4) /* RW -- Voodoo2 only */
-#define cmdFifoBump (0x1e4/4) /* RW -- Voodoo2 only */
-#define cmdFifoRdPtr (0x1e8/4) /* RW -- Voodoo2 only */
-#define cmdFifoAMin (0x1ec/4) /* RW -- Voodoo2 only */
-#define colBufferAddr (0x1ec/4) /* RW -- Banshee only */
-#define cmdFifoAMax (0x1f0/4) /* RW -- Voodoo2 only */
-#define colBufferStride (0x1f0/4) /* RW -- Banshee only */
-#define cmdFifoDepth (0x1f4/4) /* RW -- Voodoo2 only */
-#define auxBufferAddr (0x1f4/4) /* RW -- Banshee only */
-#define cmdFifoHoles (0x1f8/4) /* RW -- Voodoo2 only */
-#define auxBufferStride (0x1f8/4) /* RW -- Banshee only */
+#define cmdFifoBaseAddr (0x1e0/4) /* RW -- Voodoo2 only */
+#define cmdFifoBump (0x1e4/4) /* RW -- Voodoo2 only */
+#define cmdFifoRdPtr (0x1e8/4) /* RW -- Voodoo2 only */
+#define cmdFifoAMin (0x1ec/4) /* RW -- Voodoo2 only */
+#define colBufferAddr (0x1ec/4) /* RW -- Banshee only */
+#define cmdFifoAMax (0x1f0/4) /* RW -- Voodoo2 only */
+#define colBufferStride (0x1f0/4) /* RW -- Banshee only */
+#define cmdFifoDepth (0x1f4/4) /* RW -- Voodoo2 only */
+#define auxBufferAddr (0x1f4/4) /* RW -- Banshee only */
+#define cmdFifoHoles (0x1f8/4) /* RW -- Voodoo2 only */
+#define auxBufferStride (0x1f8/4) /* RW -- Banshee only */
/* 0x200 */
-#define fbiInit4 (0x200/4) /* RW -- Voodoo/Voodoo2 only */
-#define clipLeftRight1 (0x200/4) /* RW -- Banshee only */
-#define vRetrace (0x204/4) /* R -- Voodoo/Voodoo2 only */
-#define clipTopBottom1 (0x204/4) /* RW -- Banshee only */
-#define backPorch (0x208/4) /* RW -- Voodoo/Voodoo2 only */
-#define videoDimensions (0x20c/4) /* RW -- Voodoo/Voodoo2 only */
-#define fbiInit0 (0x210/4) /* RW -- Voodoo/Voodoo2 only */
-#define fbiInit1 (0x214/4) /* RW -- Voodoo/Voodoo2 only */
-#define fbiInit2 (0x218/4) /* RW -- Voodoo/Voodoo2 only */
-#define fbiInit3 (0x21c/4) /* RW -- Voodoo/Voodoo2 only */
-#define hSync (0x220/4) /* W -- Voodoo/Voodoo2 only */
-#define vSync (0x224/4) /* W -- Voodoo/Voodoo2 only */
-#define clutData (0x228/4) /* W F -- Voodoo/Voodoo2 only */
-#define dacData (0x22c/4) /* W -- Voodoo/Voodoo2 only */
-#define maxRgbDelta (0x230/4) /* W -- Voodoo/Voodoo2 only */
-#define hBorder (0x234/4) /* W -- Voodoo2 only */
-#define vBorder (0x238/4) /* W -- Voodoo2 only */
-#define borderColor (0x23c/4) /* W -- Voodoo2 only */
+#define fbiInit4 (0x200/4) /* RW -- Voodoo/Voodoo2 only */
+#define clipLeftRight1 (0x200/4) /* RW -- Banshee only */
+#define vRetrace (0x204/4) /* R -- Voodoo/Voodoo2 only */
+#define clipTopBottom1 (0x204/4) /* RW -- Banshee only */
+#define backPorch (0x208/4) /* RW -- Voodoo/Voodoo2 only */
+#define videoDimensions (0x20c/4) /* RW -- Voodoo/Voodoo2 only */
+#define fbiInit0 (0x210/4) /* RW -- Voodoo/Voodoo2 only */
+#define fbiInit1 (0x214/4) /* RW -- Voodoo/Voodoo2 only */
+#define fbiInit2 (0x218/4) /* RW -- Voodoo/Voodoo2 only */
+#define fbiInit3 (0x21c/4) /* RW -- Voodoo/Voodoo2 only */
+#define hSync (0x220/4) /* W -- Voodoo/Voodoo2 only */
+#define vSync (0x224/4) /* W -- Voodoo/Voodoo2 only */
+#define clutData (0x228/4) /* W F -- Voodoo/Voodoo2 only */
+#define dacData (0x22c/4) /* W -- Voodoo/Voodoo2 only */
+#define maxRgbDelta (0x230/4) /* W -- Voodoo/Voodoo2 only */
+#define hBorder (0x234/4) /* W -- Voodoo2 only */
+#define vBorder (0x238/4) /* W -- Voodoo2 only */
+#define borderColor (0x23c/4) /* W -- Voodoo2 only */
/* 0x240 */
-#define hvRetrace (0x240/4) /* R -- Voodoo2 only */
-#define fbiInit5 (0x244/4) /* RW -- Voodoo2 only */
-#define fbiInit6 (0x248/4) /* RW -- Voodoo2 only */
-#define fbiInit7 (0x24c/4) /* RW -- Voodoo2 only */
-#define swapPending (0x24c/4) /* W -- Banshee only */
-#define leftOverlayBuf (0x250/4) /* W -- Banshee only */
-#define rightOverlayBuf (0x254/4) /* W -- Banshee only */
-#define fbiSwapHistory (0x258/4) /* R -- Voodoo2/Banshee only */
-#define fbiTrianglesOut (0x25c/4) /* R -- Voodoo2/Banshee only */
-#define sSetupMode (0x260/4) /* W PF -- Voodoo2/Banshee only */
-#define sVx (0x264/4) /* W PF -- Voodoo2/Banshee only */
-#define sVy (0x268/4) /* W PF -- Voodoo2/Banshee only */
-#define sARGB (0x26c/4) /* W PF -- Voodoo2/Banshee only */
-#define sRed (0x270/4) /* W PF -- Voodoo2/Banshee only */
-#define sGreen (0x274/4) /* W PF -- Voodoo2/Banshee only */
-#define sBlue (0x278/4) /* W PF -- Voodoo2/Banshee only */
-#define sAlpha (0x27c/4) /* W PF -- Voodoo2/Banshee only */
+#define hvRetrace (0x240/4) /* R -- Voodoo2 only */
+#define fbiInit5 (0x244/4) /* RW -- Voodoo2 only */
+#define fbiInit6 (0x248/4) /* RW -- Voodoo2 only */
+#define fbiInit7 (0x24c/4) /* RW -- Voodoo2 only */
+#define swapPending (0x24c/4) /* W -- Banshee only */
+#define leftOverlayBuf (0x250/4) /* W -- Banshee only */
+#define rightOverlayBuf (0x254/4) /* W -- Banshee only */
+#define fbiSwapHistory (0x258/4) /* R -- Voodoo2/Banshee only */
+#define fbiTrianglesOut (0x25c/4) /* R -- Voodoo2/Banshee only */
+#define sSetupMode (0x260/4) /* W PF -- Voodoo2/Banshee only */
+#define sVx (0x264/4) /* W PF -- Voodoo2/Banshee only */
+#define sVy (0x268/4) /* W PF -- Voodoo2/Banshee only */
+#define sARGB (0x26c/4) /* W PF -- Voodoo2/Banshee only */
+#define sRed (0x270/4) /* W PF -- Voodoo2/Banshee only */
+#define sGreen (0x274/4) /* W PF -- Voodoo2/Banshee only */
+#define sBlue (0x278/4) /* W PF -- Voodoo2/Banshee only */
+#define sAlpha (0x27c/4) /* W PF -- Voodoo2/Banshee only */
/* 0x280 */
-#define sVz (0x280/4) /* W PF -- Voodoo2/Banshee only */
-#define sWb (0x284/4) /* W PF -- Voodoo2/Banshee only */
-#define sWtmu0 (0x288/4) /* W PF -- Voodoo2/Banshee only */
-#define sS_W0 (0x28c/4) /* W PF -- Voodoo2/Banshee only */
-#define sT_W0 (0x290/4) /* W PF -- Voodoo2/Banshee only */
-#define sWtmu1 (0x294/4) /* W PF -- Voodoo2/Banshee only */
-#define sS_Wtmu1 (0x298/4) /* W PF -- Voodoo2/Banshee only */
-#define sT_Wtmu1 (0x29c/4) /* W PF -- Voodoo2/Banshee only */
-#define sDrawTriCMD (0x2a0/4) /* W PF -- Voodoo2/Banshee only */
-#define sBeginTriCMD (0x2a4/4) /* W PF -- Voodoo2/Banshee only */
+#define sVz (0x280/4) /* W PF -- Voodoo2/Banshee only */
+#define sWb (0x284/4) /* W PF -- Voodoo2/Banshee only */
+#define sWtmu0 (0x288/4) /* W PF -- Voodoo2/Banshee only */
+#define sS_W0 (0x28c/4) /* W PF -- Voodoo2/Banshee only */
+#define sT_W0 (0x290/4) /* W PF -- Voodoo2/Banshee only */
+#define sWtmu1 (0x294/4) /* W PF -- Voodoo2/Banshee only */
+#define sS_Wtmu1 (0x298/4) /* W PF -- Voodoo2/Banshee only */
+#define sT_Wtmu1 (0x29c/4) /* W PF -- Voodoo2/Banshee only */
+#define sDrawTriCMD (0x2a0/4) /* W PF -- Voodoo2/Banshee only */
+#define sBeginTriCMD (0x2a4/4) /* W PF -- Voodoo2/Banshee only */
/* 0x2c0 */
-#define bltSrcBaseAddr (0x2c0/4) /* RW PF -- Voodoo2 only */
-#define bltDstBaseAddr (0x2c4/4) /* RW PF -- Voodoo2 only */
-#define bltXYStrides (0x2c8/4) /* RW PF -- Voodoo2 only */
-#define bltSrcChromaRange (0x2cc/4) /* RW PF -- Voodoo2 only */
-#define bltDstChromaRange (0x2d0/4) /* RW PF -- Voodoo2 only */
-#define bltClipX (0x2d4/4) /* RW PF -- Voodoo2 only */
-#define bltClipY (0x2d8/4) /* RW PF -- Voodoo2 only */
-#define bltSrcXY (0x2e0/4) /* RW PF -- Voodoo2 only */
-#define bltDstXY (0x2e4/4) /* RW PF -- Voodoo2 only */
-#define bltSize (0x2e8/4) /* RW PF -- Voodoo2 only */
-#define bltRop (0x2ec/4) /* RW PF -- Voodoo2 only */
-#define bltColor (0x2f0/4) /* RW PF -- Voodoo2 only */
-#define bltCommand (0x2f8/4) /* RW PF -- Voodoo2 only */
-#define bltData (0x2fc/4) /* W PF -- Voodoo2 only */
+#define bltSrcBaseAddr (0x2c0/4) /* RW PF -- Voodoo2 only */
+#define bltDstBaseAddr (0x2c4/4) /* RW PF -- Voodoo2 only */
+#define bltXYStrides (0x2c8/4) /* RW PF -- Voodoo2 only */
+#define bltSrcChromaRange (0x2cc/4) /* RW PF -- Voodoo2 only */
+#define bltDstChromaRange (0x2d0/4) /* RW PF -- Voodoo2 only */
+#define bltClipX (0x2d4/4) /* RW PF -- Voodoo2 only */
+#define bltClipY (0x2d8/4) /* RW PF -- Voodoo2 only */
+#define bltSrcXY (0x2e0/4) /* RW PF -- Voodoo2 only */
+#define bltDstXY (0x2e4/4) /* RW PF -- Voodoo2 only */
+#define bltSize (0x2e8/4) /* RW PF -- Voodoo2 only */
+#define bltRop (0x2ec/4) /* RW PF -- Voodoo2 only */
+#define bltColor (0x2f0/4) /* RW PF -- Voodoo2 only */
+#define bltCommand (0x2f8/4) /* RW PF -- Voodoo2 only */
+#define bltData (0x2fc/4) /* W PF -- Voodoo2 only */
/* 0x300 */
-#define textureMode (0x300/4) /* W PF */
-#define tLOD (0x304/4) /* W PF */
-#define tDetail (0x308/4) /* W PF */
-#define texBaseAddr (0x30c/4) /* W PF */
-#define texBaseAddr_1 (0x310/4) /* W PF */
-#define texBaseAddr_2 (0x314/4) /* W PF */
-#define texBaseAddr_3_8 (0x318/4) /* W PF */
-#define trexInit0 (0x31c/4) /* W F -- Voodoo/Voodoo2 only */
-#define trexInit1 (0x320/4) /* W F */
-#define nccTable (0x324/4) /* W F */
+#define textureMode (0x300/4) /* W PF */
+#define tLOD (0x304/4) /* W PF */
+#define tDetail (0x308/4) /* W PF */
+#define texBaseAddr (0x30c/4) /* W PF */
+#define texBaseAddr_1 (0x310/4) /* W PF */
+#define texBaseAddr_2 (0x314/4) /* W PF */
+#define texBaseAddr_3_8 (0x318/4) /* W PF */
+#define trexInit0 (0x31c/4) /* W F -- Voodoo/Voodoo2 only */
+#define trexInit1 (0x320/4) /* W F */
+#define nccTable (0x324/4) /* W F */
// 2D registers
-#define banshee2D_clip0Min (0x008/4)
-#define banshee2D_clip0Max (0x00c/4)
-#define banshee2D_dstBaseAddr (0x010/4)
-#define banshee2D_dstFormat (0x014/4)
-#define banshee2D_srcColorkeyMin (0x018/4)
-#define banshee2D_srcColorkeyMax (0x01c/4)
-#define banshee2D_dstColorkeyMin (0x020/4)
-#define banshee2D_dstColorkeyMax (0x024/4)
-#define banshee2D_bresError0 (0x028/4)
-#define banshee2D_bresError1 (0x02c/4)
-#define banshee2D_rop (0x030/4)
-#define banshee2D_srcBaseAddr (0x034/4)
-#define banshee2D_commandExtra (0x038/4)
-#define banshee2D_lineStipple (0x03c/4)
-#define banshee2D_lineStyle (0x040/4)
-#define banshee2D_pattern0Alias (0x044/4)
-#define banshee2D_pattern1Alias (0x048/4)
-#define banshee2D_clip1Min (0x04c/4)
-#define banshee2D_clip1Max (0x050/4)
-#define banshee2D_srcFormat (0x054/4)
-#define banshee2D_srcSize (0x058/4)
-#define banshee2D_srcXY (0x05c/4)
-#define banshee2D_colorBack (0x060/4)
-#define banshee2D_colorFore (0x064/4)
-#define banshee2D_dstSize (0x068/4)
-#define banshee2D_dstXY (0x06c/4)
-#define banshee2D_command (0x070/4)
+#define banshee2D_clip0Min (0x008/4)
+#define banshee2D_clip0Max (0x00c/4)
+#define banshee2D_dstBaseAddr (0x010/4)
+#define banshee2D_dstFormat (0x014/4)
+#define banshee2D_srcColorkeyMin (0x018/4)
+#define banshee2D_srcColorkeyMax (0x01c/4)
+#define banshee2D_dstColorkeyMin (0x020/4)
+#define banshee2D_dstColorkeyMax (0x024/4)
+#define banshee2D_bresError0 (0x028/4)
+#define banshee2D_bresError1 (0x02c/4)
+#define banshee2D_rop (0x030/4)
+#define banshee2D_srcBaseAddr (0x034/4)
+#define banshee2D_commandExtra (0x038/4)
+#define banshee2D_lineStipple (0x03c/4)
+#define banshee2D_lineStyle (0x040/4)
+#define banshee2D_pattern0Alias (0x044/4)
+#define banshee2D_pattern1Alias (0x048/4)
+#define banshee2D_clip1Min (0x04c/4)
+#define banshee2D_clip1Max (0x050/4)
+#define banshee2D_srcFormat (0x054/4)
+#define banshee2D_srcSize (0x058/4)
+#define banshee2D_srcXY (0x05c/4)
+#define banshee2D_colorBack (0x060/4)
+#define banshee2D_colorFore (0x064/4)
+#define banshee2D_dstSize (0x068/4)
+#define banshee2D_dstXY (0x06c/4)
+#define banshee2D_command (0x070/4)
/*************************************
@@ -358,23 +358,23 @@ enum
static const UINT8 register_alias_map[0x40] =
{
- status, 0x004/4, vertexAx, vertexAy,
- vertexBx, vertexBy, vertexCx, vertexCy,
- startR, dRdX, dRdY, startG,
- dGdX, dGdY, startB, dBdX,
- dBdY, startZ, dZdX, dZdY,
- startA, dAdX, dAdY, startS,
- dSdX, dSdY, startT, dTdX,
- dTdY, startW, dWdX, dWdY,
-
- triangleCMD,0x084/4, fvertexAx, fvertexAy,
- fvertexBx, fvertexBy, fvertexCx, fvertexCy,
- fstartR, fdRdX, fdRdY, fstartG,
- fdGdX, fdGdY, fstartB, fdBdX,
- fdBdY, fstartZ, fdZdX, fdZdY,
- fstartA, fdAdX, fdAdY, fstartS,
- fdSdX, fdSdY, fstartT, fdTdX,
- fdTdY, fstartW, fdWdX, fdWdY
+ status, 0x004/4, vertexAx, vertexAy,
+ vertexBx, vertexBy, vertexCx, vertexCy,
+ startR, dRdX, dRdY, startG,
+ dGdX, dGdY, startB, dBdX,
+ dBdY, startZ, dZdX, dZdY,
+ startA, dAdX, dAdY, startS,
+ dSdX, dSdY, startT, dTdX,
+ dTdY, startW, dWdX, dWdY,
+
+ triangleCMD,0x084/4, fvertexAx, fvertexAy,
+ fvertexBx, fvertexBy, fvertexCx, fvertexCy,
+ fstartR, fdRdX, fdRdY, fstartG,
+ fdGdX, fdGdY, fstartB, fdBdX,
+ fdBdY, fstartZ, fdZdX, fdZdY,
+ fstartA, fdAdX, fdAdY, fstartS,
+ fdSdX, fdSdY, fstartT, fdTdX,
+ fdTdY, fstartW, fdWdX, fdWdY
};
@@ -388,88 +388,88 @@ static const UINT8 register_alias_map[0x40] =
static const UINT8 voodoo_register_access[0x100] =
{
/* 0x000 */
- REG_RP, 0, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_RP, 0, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x040 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x080 */
- REG_WPF, 0, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, 0, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x0c0 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x100 */
- REG_WPF, REG_RWPF, REG_RWPF, REG_RWPF,
- REG_RWF, REG_RWF, REG_RWF, REG_RWF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, 0, 0,
+ REG_WPF, REG_RWPF, REG_RWPF, REG_RWPF,
+ REG_RWF, REG_RWF, REG_RWF, REG_RWF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, 0, 0,
/* 0x140 */
- REG_RWF, REG_RWF, REG_RWF, REG_R,
- REG_R, REG_R, REG_R, REG_R,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_RWF, REG_RWF, REG_RWF, REG_R,
+ REG_R, REG_R, REG_R, REG_R,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x180 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x1c0 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* 0x200 */
- REG_RW, REG_R, REG_RW, REG_RW,
- REG_RW, REG_RW, REG_RW, REG_RW,
- REG_W, REG_W, REG_W, REG_W,
- REG_W, 0, 0, 0,
+ REG_RW, REG_R, REG_RW, REG_RW,
+ REG_RW, REG_RW, REG_RW, REG_RW,
+ REG_W, REG_W, REG_W, REG_W,
+ REG_W, 0, 0, 0,
/* 0x240 */
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* 0x280 */
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* 0x2c0 */
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* 0x300 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x340 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x380 */
REG_WF
@@ -479,88 +479,88 @@ static const UINT8 voodoo_register_access[0x100] =
static const UINT8 voodoo2_register_access[0x100] =
{
/* 0x000 */
- REG_RP, REG_RWPT, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_RP, REG_RWPT, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x040 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x080 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x0c0 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x100 */
- REG_WPF, REG_RWPF, REG_RWPF, REG_RWPF,
- REG_RWF, REG_RWF, REG_RWF, REG_RWF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WPF, REG_RWPF, REG_RWPF, REG_RWPF,
+ REG_RWF, REG_RWF, REG_RWF, REG_RWF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x140 */
- REG_RWF, REG_RWF, REG_RWF, REG_R,
- REG_R, REG_R, REG_R, REG_R,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_RWF, REG_RWF, REG_RWF, REG_R,
+ REG_R, REG_R, REG_R, REG_R,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x180 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x1c0 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_RWT, REG_RWT, REG_RWT, REG_RWT,
- REG_RWT, REG_RWT, REG_RWT, REG_RW,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_RWT, REG_RWT, REG_RWT, REG_RWT,
+ REG_RWT, REG_RWT, REG_RWT, REG_RW,
/* 0x200 */
- REG_RWT, REG_R, REG_RWT, REG_RWT,
- REG_RWT, REG_RWT, REG_RWT, REG_RWT,
- REG_WT, REG_WT, REG_WF, REG_WT,
- REG_WT, REG_WT, REG_WT, REG_WT,
+ REG_RWT, REG_R, REG_RWT, REG_RWT,
+ REG_RWT, REG_RWT, REG_RWT, REG_RWT,
+ REG_WT, REG_WT, REG_WF, REG_WT,
+ REG_WT, REG_WT, REG_WT, REG_WT,
/* 0x240 */
- REG_R, REG_RWT, REG_RWT, REG_RWT,
- 0, 0, REG_R, REG_R,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_R, REG_RWT, REG_RWT, REG_RWT,
+ 0, 0, REG_R, REG_R,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x280 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, 0, 0,
- 0, 0, 0, 0,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, 0, 0,
+ 0, 0, 0, 0,
/* 0x2c0 */
- REG_RWPF, REG_RWPF, REG_RWPF, REG_RWPF,
- REG_RWPF, REG_RWPF, REG_RWPF, REG_RWPF,
- REG_RWPF, REG_RWPF, REG_RWPF, REG_RWPF,
- REG_RWPF, REG_RWPF, REG_RWPF, REG_WPF,
+ REG_RWPF, REG_RWPF, REG_RWPF, REG_RWPF,
+ REG_RWPF, REG_RWPF, REG_RWPF, REG_RWPF,
+ REG_RWPF, REG_RWPF, REG_RWPF, REG_RWPF,
+ REG_RWPF, REG_RWPF, REG_RWPF, REG_WPF,
/* 0x300 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x340 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x380 */
REG_WF
@@ -570,88 +570,88 @@ static const UINT8 voodoo2_register_access[0x100] =
static const UINT8 banshee_register_access[0x100] =
{
/* 0x000 */
- REG_RP, REG_RWPT, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_RP, REG_RWPT, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x040 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x080 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x0c0 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x100 */
- REG_WPF, REG_RWPF, REG_RWPF, REG_RWPF,
- REG_RWF, REG_RWF, REG_RWF, REG_RWF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WPF, REG_RWPF, REG_RWPF, REG_RWPF,
+ REG_RWF, REG_RWF, REG_RWF, REG_RWF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x140 */
- REG_RWF, REG_RWF, REG_RWF, REG_R,
- REG_R, REG_R, REG_R, REG_R,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_RWF, REG_RWF, REG_RWF, REG_R,
+ REG_R, REG_R, REG_R, REG_R,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x180 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x1c0 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- 0, 0, 0, REG_RWF,
- REG_RWF, REG_RWF, REG_RWF, 0,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ 0, 0, 0, REG_RWF,
+ REG_RWF, REG_RWF, REG_RWF, 0,
/* 0x200 */
- REG_RWF, REG_RWF, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
+ REG_RWF, REG_RWF, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* 0x240 */
- 0, 0, 0, REG_WT,
- REG_RWF, REG_RWF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_R, REG_R,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ 0, 0, 0, REG_WT,
+ REG_RWF, REG_RWF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_R, REG_R,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
/* 0x280 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, 0, 0,
- 0, 0, 0, 0,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, 0, 0,
+ 0, 0, 0, 0,
/* 0x2c0 */
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
- 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
/* 0x300 */
- REG_WPF, REG_WPF, REG_WPF, REG_WPF,
- REG_WPF, REG_WPF, REG_WPF, 0,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WPF, REG_WPF, REG_WPF, REG_WPF,
+ REG_WPF, REG_WPF, REG_WPF, 0,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x340 */
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
- REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
+ REG_WF, REG_WF, REG_WF, REG_WF,
/* 0x380 */
REG_WF
@@ -668,75 +668,75 @@ static const UINT8 banshee_register_access[0x100] =
static const char *const voodoo_reg_name[] =
{
/* 0x000 */
- "status", "{intrCtrl}", "vertexAx", "vertexAy",
- "vertexBx", "vertexBy", "vertexCx", "vertexCy",
- "startR", "startG", "startB", "startZ",
- "startA", "startS", "startT", "startW",
+ "status", "{intrCtrl}", "vertexAx", "vertexAy",
+ "vertexBx", "vertexBy", "vertexCx", "vertexCy",
+ "startR", "startG", "startB", "startZ",
+ "startA", "startS", "startT", "startW",
/* 0x040 */
- "dRdX", "dGdX", "dBdX", "dZdX",
- "dAdX", "dSdX", "dTdX", "dWdX",
- "dRdY", "dGdY", "dBdY", "dZdY",
- "dAdY", "dSdY", "dTdY", "dWdY",
+ "dRdX", "dGdX", "dBdX", "dZdX",
+ "dAdX", "dSdX", "dTdX", "dWdX",
+ "dRdY", "dGdY", "dBdY", "dZdY",
+ "dAdY", "dSdY", "dTdY", "dWdY",
/* 0x080 */
- "triangleCMD", "reserved084", "fvertexAx", "fvertexAy",
- "fvertexBx", "fvertexBy", "fvertexCx", "fvertexCy",
- "fstartR", "fstartG", "fstartB", "fstartZ",
- "fstartA", "fstartS", "fstartT", "fstartW",
+ "triangleCMD", "reserved084", "fvertexAx", "fvertexAy",
+ "fvertexBx", "fvertexBy", "fvertexCx", "fvertexCy",
+ "fstartR", "fstartG", "fstartB", "fstartZ",
+ "fstartA", "fstartS", "fstartT", "fstartW",
/* 0x0c0 */
- "fdRdX", "fdGdX", "fdBdX", "fdZdX",
- "fdAdX", "fdSdX", "fdTdX", "fdWdX",
- "fdRdY", "fdGdY", "fdBdY", "fdZdY",
- "fdAdY", "fdSdY", "fdTdY", "fdWdY",
+ "fdRdX", "fdGdX", "fdBdX", "fdZdX",
+ "fdAdX", "fdSdX", "fdTdX", "fdWdX",
+ "fdRdY", "fdGdY", "fdBdY", "fdZdY",
+ "fdAdY", "fdSdY", "fdTdY", "fdWdY",
/* 0x100 */
- "ftriangleCMD", "fbzColorPath", "fogMode", "alphaMode",
- "fbzMode", "lfbMode", "clipLeftRight","clipLowYHighY",
- "nopCMD", "fastfillCMD", "swapbufferCMD","fogColor",
- "zaColor", "chromaKey", "{chromaRange}","{userIntrCMD}",
+ "ftriangleCMD", "fbzColorPath", "fogMode", "alphaMode",
+ "fbzMode", "lfbMode", "clipLeftRight","clipLowYHighY",
+ "nopCMD", "fastfillCMD", "swapbufferCMD","fogColor",
+ "zaColor", "chromaKey", "{chromaRange}","{userIntrCMD}",
/* 0x140 */
- "stipple", "color0", "color1", "fbiPixelsIn",
- "fbiChromaFail","fbiZfuncFail", "fbiAfuncFail", "fbiPixelsOut",
- "fogTable160", "fogTable164", "fogTable168", "fogTable16c",
- "fogTable170", "fogTable174", "fogTable178", "fogTable17c",
+ "stipple", "color0", "color1", "fbiPixelsIn",
+ "fbiChromaFail","fbiZfuncFail", "fbiAfuncFail", "fbiPixelsOut",
+ "fogTable160", "fogTable164", "fogTable168", "fogTable16c",
+ "fogTable170", "fogTable174", "fogTable178", "fogTable17c",
/* 0x180 */
- "fogTable180", "fogTable184", "fogTable188", "fogTable18c",
- "fogTable190", "fogTable194", "fogTable198", "fogTable19c",
- "fogTable1a0", "fogTable1a4", "fogTable1a8", "fogTable1ac",
- "fogTable1b0", "fogTable1b4", "fogTable1b8", "fogTable1bc",
+ "fogTable180", "fogTable184", "fogTable188", "fogTable18c",
+ "fogTable190", "fogTable194", "fogTable198", "fogTable19c",
+ "fogTable1a0", "fogTable1a4", "fogTable1a8", "fogTable1ac",
+ "fogTable1b0", "fogTable1b4", "fogTable1b8", "fogTable1bc",
/* 0x1c0 */
- "fogTable1c0", "fogTable1c4", "fogTable1c8", "fogTable1cc",
- "fogTable1d0", "fogTable1d4", "fogTable1d8", "fogTable1dc",
+ "fogTable1c0", "fogTable1c4", "fogTable1c8", "fogTable1cc",
+ "fogTable1d0", "fogTable1d4", "fogTable1d8", "fogTable1dc",
"{cmdFifoBaseAddr}","{cmdFifoBump}","{cmdFifoRdPtr}","{cmdFifoAMin}",
"{cmdFifoAMax}","{cmdFifoDepth}","{cmdFifoHoles}","reserved1fc",
/* 0x200 */
- "fbiInit4", "vRetrace", "backPorch", "videoDimensions",
- "fbiInit0", "fbiInit1", "fbiInit2", "fbiInit3",
- "hSync", "vSync", "clutData", "dacData",
- "maxRgbDelta", "{hBorder}", "{vBorder}", "{borderColor}",
+ "fbiInit4", "vRetrace", "backPorch", "videoDimensions",
+ "fbiInit0", "fbiInit1", "fbiInit2", "fbiInit3",
+ "hSync", "vSync", "clutData", "dacData",
+ "maxRgbDelta", "{hBorder}", "{vBorder}", "{borderColor}",
/* 0x240 */
- "{hvRetrace}", "{fbiInit5}", "{fbiInit6}", "{fbiInit7}",
- "reserved250", "reserved254", "{fbiSwapHistory}","{fbiTrianglesOut}",
- "{sSetupMode}", "{sVx}", "{sVy}", "{sARGB}",
- "{sRed}", "{sGreen}", "{sBlue}", "{sAlpha}",
+ "{hvRetrace}", "{fbiInit5}", "{fbiInit6}", "{fbiInit7}",
+ "reserved250", "reserved254", "{fbiSwapHistory}","{fbiTrianglesOut}",
+ "{sSetupMode}", "{sVx}", "{sVy}", "{sARGB}",
+ "{sRed}", "{sGreen}", "{sBlue}", "{sAlpha}",
/* 0x280 */
- "{sVz}", "{sWb}", "{sWtmu0}", "{sS/Wtmu0}",
- "{sT/Wtmu0}", "{sWtmu1}", "{sS/Wtmu1}", "{sT/Wtmu1}",
- "{sDrawTriCMD}","{sBeginTriCMD}","reserved2a8", "reserved2ac",
- "reserved2b0", "reserved2b4", "reserved2b8", "reserved2bc",
+ "{sVz}", "{sWb}", "{sWtmu0}", "{sS/Wtmu0}",
+ "{sT/Wtmu0}", "{sWtmu1}", "{sS/Wtmu1}", "{sT/Wtmu1}",
+ "{sDrawTriCMD}","{sBeginTriCMD}","reserved2a8", "reserved2ac",
+ "reserved2b0", "reserved2b4", "reserved2b8", "reserved2bc",
/* 0x2c0 */
"{bltSrcBaseAddr}","{bltDstBaseAddr}","{bltXYStrides}","{bltSrcChromaRange}",
"{bltDstChromaRange}","{bltClipX}","{bltClipY}","reserved2dc",
- "{bltSrcXY}", "{bltDstXY}", "{bltSize}", "{bltRop}",
- "{bltColor}", "reserved2f4", "{bltCommand}", "{bltData}",
+ "{bltSrcXY}", "{bltDstXY}", "{bltSize}", "{bltRop}",
+ "{bltColor}", "reserved2f4", "{bltCommand}", "{bltData}",
/* 0x300 */
- "textureMode", "tLOD", "tDetail", "texBaseAddr",
+ "textureMode", "tLOD", "tDetail", "texBaseAddr",
"texBaseAddr_1","texBaseAddr_2","texBaseAddr_3_8","trexInit0",
- "trexInit1", "nccTable0.0", "nccTable0.1", "nccTable0.2",
- "nccTable0.3", "nccTable0.4", "nccTable0.5", "nccTable0.6",
+ "trexInit1", "nccTable0.0", "nccTable0.1", "nccTable0.2",
+ "nccTable0.3", "nccTable0.4", "nccTable0.5", "nccTable0.6",
/* 0x340 */
- "nccTable0.7", "nccTable0.8", "nccTable0.9", "nccTable0.A",
- "nccTable0.B", "nccTable1.0", "nccTable1.1", "nccTable1.2",
- "nccTable1.3", "nccTable1.4", "nccTable1.5", "nccTable1.6",
- "nccTable1.7", "nccTable1.8", "nccTable1.9", "nccTable1.A",
+ "nccTable0.7", "nccTable0.8", "nccTable0.9", "nccTable0.A",
+ "nccTable0.B", "nccTable1.0", "nccTable1.1", "nccTable1.2",
+ "nccTable1.3", "nccTable1.4", "nccTable1.5", "nccTable1.6",
+ "nccTable1.7", "nccTable1.8", "nccTable1.9", "nccTable1.A",
/* 0x380 */
"nccTable1.B"
};
@@ -745,75 +745,75 @@ static const char *const voodoo_reg_name[] =
static const char *const banshee_reg_name[] =
{
/* 0x000 */
- "status", "intrCtrl", "vertexAx", "vertexAy",
- "vertexBx", "vertexBy", "vertexCx", "vertexCy",
- "startR", "startG", "startB", "startZ",
- "startA", "startS", "startT", "startW",
+ "status", "intrCtrl", "vertexAx", "vertexAy",
+ "vertexBx", "vertexBy", "vertexCx", "vertexCy",
+ "startR", "startG", "startB", "startZ",
+ "startA", "startS", "startT", "startW",
/* 0x040 */
- "dRdX", "dGdX", "dBdX", "dZdX",
- "dAdX", "dSdX", "dTdX", "dWdX",
- "dRdY", "dGdY", "dBdY", "dZdY",
- "dAdY", "dSdY", "dTdY", "dWdY",
+ "dRdX", "dGdX", "dBdX", "dZdX",
+ "dAdX", "dSdX", "dTdX", "dWdX",
+ "dRdY", "dGdY", "dBdY", "dZdY",
+ "dAdY", "dSdY", "dTdY", "dWdY",
/* 0x080 */
- "triangleCMD", "reserved084", "fvertexAx", "fvertexAy",
- "fvertexBx", "fvertexBy", "fvertexCx", "fvertexCy",
- "fstartR", "fstartG", "fstartB", "fstartZ",
- "fstartA", "fstartS", "fstartT", "fstartW",
+ "triangleCMD", "reserved084", "fvertexAx", "fvertexAy",
+ "fvertexBx", "fvertexBy", "fvertexCx", "fvertexCy",
+ "fstartR", "fstartG", "fstartB", "fstartZ",
+ "fstartA", "fstartS", "fstartT", "fstartW",
/* 0x0c0 */
- "fdRdX", "fdGdX", "fdBdX", "fdZdX",
- "fdAdX", "fdSdX", "fdTdX", "fdWdX",
- "fdRdY", "fdGdY", "fdBdY", "fdZdY",
- "fdAdY", "fdSdY", "fdTdY", "fdWdY",
+ "fdRdX", "fdGdX", "fdBdX", "fdZdX",
+ "fdAdX", "fdSdX", "fdTdX", "fdWdX",
+ "fdRdY", "fdGdY", "fdBdY", "fdZdY",
+ "fdAdY", "fdSdY", "fdTdY", "fdWdY",
/* 0x100 */
- "ftriangleCMD", "fbzColorPath", "fogMode", "alphaMode",
- "fbzMode", "lfbMode", "clipLeftRight","clipLowYHighY",
- "nopCMD", "fastfillCMD", "swapbufferCMD","fogColor",
- "zaColor", "chromaKey", "chromaRange", "userIntrCMD",
+ "ftriangleCMD", "fbzColorPath", "fogMode", "alphaMode",
+ "fbzMode", "lfbMode", "clipLeftRight","clipLowYHighY",
+ "nopCMD", "fastfillCMD", "swapbufferCMD","fogColor",
+ "zaColor", "chromaKey", "chromaRange", "userIntrCMD",
/* 0x140 */
- "stipple", "color0", "color1", "fbiPixelsIn",
- "fbiChromaFail","fbiZfuncFail", "fbiAfuncFail", "fbiPixelsOut",
- "fogTable160", "fogTable164", "fogTable168", "fogTable16c",
- "fogTable170", "fogTable174", "fogTable178", "fogTable17c",
+ "stipple", "color0", "color1", "fbiPixelsIn",
+ "fbiChromaFail","fbiZfuncFail", "fbiAfuncFail", "fbiPixelsOut",
+ "fogTable160", "fogTable164", "fogTable168", "fogTable16c",
+ "fogTable170", "fogTable174", "fogTable178", "fogTable17c",
/* 0x180 */
- "fogTable180", "fogTable184", "fogTable188", "fogTable18c",
- "fogTable190", "fogTable194", "fogTable198", "fogTable19c",
- "fogTable1a0", "fogTable1a4", "fogTable1a8", "fogTable1ac",
- "fogTable1b0", "fogTable1b4", "fogTable1b8", "fogTable1bc",
+ "fogTable180", "fogTable184", "fogTable188", "fogTable18c",
+ "fogTable190", "fogTable194", "fogTable198", "fogTable19c",
+ "fogTable1a0", "fogTable1a4", "fogTable1a8", "fogTable1ac",
+ "fogTable1b0", "fogTable1b4", "fogTable1b8", "fogTable1bc",
/* 0x1c0 */
- "fogTable1c0", "fogTable1c4", "fogTable1c8", "fogTable1cc",
- "fogTable1d0", "fogTable1d4", "fogTable1d8", "fogTable1dc",
- "reserved1e0", "reserved1e4", "reserved1e8", "colBufferAddr",
+ "fogTable1c0", "fogTable1c4", "fogTable1c8", "fogTable1cc",
+ "fogTable1d0", "fogTable1d4", "fogTable1d8", "fogTable1dc",
+ "reserved1e0", "reserved1e4", "reserved1e8", "colBufferAddr",
"colBufferStride","auxBufferAddr","auxBufferStride","reserved1fc",
/* 0x200 */
"clipLeftRight1","clipTopBottom1","reserved208","reserved20c",
- "reserved210", "reserved214", "reserved218", "reserved21c",
- "reserved220", "reserved224", "reserved228", "reserved22c",
- "reserved230", "reserved234", "reserved238", "reserved23c",
+ "reserved210", "reserved214", "reserved218", "reserved21c",
+ "reserved220", "reserved224", "reserved228", "reserved22c",
+ "reserved230", "reserved234", "reserved238", "reserved23c",
/* 0x240 */
- "reserved240", "reserved244", "reserved248", "swapPending",
+ "reserved240", "reserved244", "reserved248", "swapPending",
"leftOverlayBuf","rightOverlayBuf","fbiSwapHistory","fbiTrianglesOut",
- "sSetupMode", "sVx", "sVy", "sARGB",
- "sRed", "sGreen", "sBlue", "sAlpha",
+ "sSetupMode", "sVx", "sVy", "sARGB",
+ "sRed", "sGreen", "sBlue", "sAlpha",
/* 0x280 */
- "sVz", "sWb", "sWtmu0", "sS/Wtmu0",
- "sT/Wtmu0", "sWtmu1", "sS/Wtmu1", "sT/Wtmu1",
- "sDrawTriCMD", "sBeginTriCMD", "reserved2a8", "reserved2ac",
- "reserved2b0", "reserved2b4", "reserved2b8", "reserved2bc",
+ "sVz", "sWb", "sWtmu0", "sS/Wtmu0",
+ "sT/Wtmu0", "sWtmu1", "sS/Wtmu1", "sT/Wtmu1",
+ "sDrawTriCMD", "sBeginTriCMD", "reserved2a8", "reserved2ac",
+ "reserved2b0", "reserved2b4", "reserved2b8", "reserved2bc",
/* 0x2c0 */
- "reserved2c0", "reserved2c4", "reserved2c8", "reserved2cc",
- "reserved2d0", "reserved2d4", "reserved2d8", "reserved2dc",
- "reserved2e0", "reserved2e4", "reserved2e8", "reserved2ec",
- "reserved2f0", "reserved2f4", "reserved2f8", "reserved2fc",
+ "reserved2c0", "reserved2c4", "reserved2c8", "reserved2cc",
+ "reserved2d0", "reserved2d4", "reserved2d8", "reserved2dc",
+ "reserved2e0", "reserved2e4", "reserved2e8", "reserved2ec",
+ "reserved2f0", "reserved2f4", "reserved2f8", "reserved2fc",
/* 0x300 */
- "textureMode", "tLOD", "tDetail", "texBaseAddr",
+ "textureMode", "tLOD", "tDetail", "texBaseAddr",
"texBaseAddr_1","texBaseAddr_2","texBaseAddr_3_8","reserved31c",
- "trexInit1", "nccTable0.0", "nccTable0.1", "nccTable0.2",
- "nccTable0.3", "nccTable0.4", "nccTable0.5", "nccTable0.6",
+ "trexInit1", "nccTable0.0", "nccTable0.1", "nccTable0.2",
+ "nccTable0.3", "nccTable0.4", "nccTable0.5", "nccTable0.6",
/* 0x340 */
- "nccTable0.7", "nccTable0.8", "nccTable0.9", "nccTable0.A",
- "nccTable0.B", "nccTable1.0", "nccTable1.1", "nccTable1.2",
- "nccTable1.3", "nccTable1.4", "nccTable1.5", "nccTable1.6",
- "nccTable1.7", "nccTable1.8", "nccTable1.9", "nccTable1.A",
+ "nccTable0.7", "nccTable0.8", "nccTable0.9", "nccTable0.A",
+ "nccTable0.B", "nccTable1.0", "nccTable1.1", "nccTable1.2",
+ "nccTable1.3", "nccTable1.4", "nccTable1.5", "nccTable1.6",
+ "nccTable1.7", "nccTable1.8", "nccTable1.9", "nccTable1.A",
/* 0x380 */
"nccTable1.B"
};
@@ -827,74 +827,74 @@ static const char *const banshee_reg_name[] =
*************************************/
/* 0x000 */
-#define io_status (0x000/4) /* */
-#define io_pciInit0 (0x004/4) /* */
-#define io_sipMonitor (0x008/4) /* */
-#define io_lfbMemoryConfig (0x00c/4) /* */
-#define io_miscInit0 (0x010/4) /* */
-#define io_miscInit1 (0x014/4) /* */
-#define io_dramInit0 (0x018/4) /* */
-#define io_dramInit1 (0x01c/4) /* */
-#define io_agpInit (0x020/4) /* */
-#define io_tmuGbeInit (0x024/4) /* */
-#define io_vgaInit0 (0x028/4) /* */
-#define io_vgaInit1 (0x02c/4) /* */
-#define io_dramCommand (0x030/4) /* */
-#define io_dramData (0x034/4) /* */
+#define io_status (0x000/4) /* */
+#define io_pciInit0 (0x004/4) /* */
+#define io_sipMonitor (0x008/4) /* */
+#define io_lfbMemoryConfig (0x00c/4) /* */
+#define io_miscInit0 (0x010/4) /* */
+#define io_miscInit1 (0x014/4) /* */
+#define io_dramInit0 (0x018/4) /* */
+#define io_dramInit1 (0x01c/4) /* */
+#define io_agpInit (0x020/4) /* */
+#define io_tmuGbeInit (0x024/4) /* */
+#define io_vgaInit0 (0x028/4) /* */
+#define io_vgaInit1 (0x02c/4) /* */
+#define io_dramCommand (0x030/4) /* */
+#define io_dramData (0x034/4) /* */
/* 0x040 */
-#define io_pllCtrl0 (0x040/4) /* */
-#define io_pllCtrl1 (0x044/4) /* */
-#define io_pllCtrl2 (0x048/4) /* */
-#define io_dacMode (0x04c/4) /* */
-#define io_dacAddr (0x050/4) /* */
-#define io_dacData (0x054/4) /* */
-#define io_rgbMaxDelta (0x058/4) /* */
-#define io_vidProcCfg (0x05c/4) /* */
-#define io_hwCurPatAddr (0x060/4) /* */
-#define io_hwCurLoc (0x064/4) /* */
-#define io_hwCurC0 (0x068/4) /* */
-#define io_hwCurC1 (0x06c/4) /* */
-#define io_vidInFormat (0x070/4) /* */
-#define io_vidInStatus (0x074/4) /* */
-#define io_vidSerialParallelPort (0x078/4) /* */
-#define io_vidInXDecimDeltas (0x07c/4) /* */
+#define io_pllCtrl0 (0x040/4) /* */
+#define io_pllCtrl1 (0x044/4) /* */
+#define io_pllCtrl2 (0x048/4) /* */
+#define io_dacMode (0x04c/4) /* */
+#define io_dacAddr (0x050/4) /* */
+#define io_dacData (0x054/4) /* */
+#define io_rgbMaxDelta (0x058/4) /* */
+#define io_vidProcCfg (0x05c/4) /* */
+#define io_hwCurPatAddr (0x060/4) /* */
+#define io_hwCurLoc (0x064/4) /* */
+#define io_hwCurC0 (0x068/4) /* */
+#define io_hwCurC1 (0x06c/4) /* */
+#define io_vidInFormat (0x070/4) /* */
+#define io_vidInStatus (0x074/4) /* */
+#define io_vidSerialParallelPort (0x078/4) /* */
+#define io_vidInXDecimDeltas (0x07c/4) /* */
/* 0x080 */
-#define io_vidInDecimInitErrs (0x080/4) /* */
-#define io_vidInYDecimDeltas (0x084/4) /* */
-#define io_vidPixelBufThold (0x088/4) /* */
-#define io_vidChromaMin (0x08c/4) /* */
-#define io_vidChromaMax (0x090/4) /* */
-#define io_vidCurrentLine (0x094/4) /* */
-#define io_vidScreenSize (0x098/4) /* */
-#define io_vidOverlayStartCoords (0x09c/4) /* */
-#define io_vidOverlayEndScreenCoord (0x0a0/4) /* */
-#define io_vidOverlayDudx (0x0a4/4) /* */
-#define io_vidOverlayDudxOffsetSrcWidth (0x0a8/4) /* */
-#define io_vidOverlayDvdy (0x0ac/4) /* */
-#define io_vgab0 (0x0b0/4) /* */
-#define io_vgab4 (0x0b4/4) /* */
-#define io_vgab8 (0x0b8/4) /* */
-#define io_vgabc (0x0bc/4) /* */
+#define io_vidInDecimInitErrs (0x080/4) /* */
+#define io_vidInYDecimDeltas (0x084/4) /* */
+#define io_vidPixelBufThold (0x088/4) /* */
+#define io_vidChromaMin (0x08c/4) /* */
+#define io_vidChromaMax (0x090/4) /* */
+#define io_vidCurrentLine (0x094/4) /* */
+#define io_vidScreenSize (0x098/4) /* */
+#define io_vidOverlayStartCoords (0x09c/4) /* */
+#define io_vidOverlayEndScreenCoord (0x0a0/4) /* */
+#define io_vidOverlayDudx (0x0a4/4) /* */
+#define io_vidOverlayDudxOffsetSrcWidth (0x0a8/4) /* */
+#define io_vidOverlayDvdy (0x0ac/4) /* */
+#define io_vgab0 (0x0b0/4) /* */
+#define io_vgab4 (0x0b4/4) /* */
+#define io_vgab8 (0x0b8/4) /* */
+#define io_vgabc (0x0bc/4) /* */
/* 0x0c0 */
-#define io_vgac0 (0x0c0/4) /* */
-#define io_vgac4 (0x0c4/4) /* */
-#define io_vgac8 (0x0c8/4) /* */
-#define io_vgacc (0x0cc/4) /* */
-#define io_vgad0 (0x0d0/4) /* */
-#define io_vgad4 (0x0d4/4) /* */
-#define io_vgad8 (0x0d8/4) /* */
-#define io_vgadc (0x0dc/4) /* */
-#define io_vidOverlayDvdyOffset (0x0e0/4) /* */
-#define io_vidDesktopStartAddr (0x0e4/4) /* */
-#define io_vidDesktopOverlayStride (0x0e8/4) /* */
-#define io_vidInAddr0 (0x0ec/4) /* */
-#define io_vidInAddr1 (0x0f0/4) /* */
-#define io_vidInAddr2 (0x0f4/4) /* */
-#define io_vidInStride (0x0f8/4) /* */
-#define io_vidCurrOverlayStartAddr (0x0fc/4) /* */
+#define io_vgac0 (0x0c0/4) /* */
+#define io_vgac4 (0x0c4/4) /* */
+#define io_vgac8 (0x0c8/4) /* */
+#define io_vgacc (0x0cc/4) /* */
+#define io_vgad0 (0x0d0/4) /* */
+#define io_vgad4 (0x0d4/4) /* */
+#define io_vgad8 (0x0d8/4) /* */
+#define io_vgadc (0x0dc/4) /* */
+#define io_vidOverlayDvdyOffset (0x0e0/4) /* */
+#define io_vidDesktopStartAddr (0x0e4/4) /* */
+#define io_vidDesktopOverlayStride (0x0e8/4) /* */
+#define io_vidInAddr0 (0x0ec/4) /* */
+#define io_vidInAddr1 (0x0f0/4) /* */
+#define io_vidInAddr2 (0x0f4/4) /* */
+#define io_vidInStride (0x0f8/4) /* */
+#define io_vidCurrOverlayStartAddr (0x0fc/4) /* */
@@ -907,28 +907,28 @@ static const char *const banshee_reg_name[] =
static const char *const banshee_io_reg_name[] =
{
/* 0x000 */
- "status", "pciInit0", "sipMonitor", "lfbMemoryConfig",
- "miscInit0", "miscInit1", "dramInit0", "dramInit1",
- "agpInit", "tmuGbeInit", "vgaInit0", "vgaInit1",
- "dramCommand", "dramData", "reserved38", "reserved3c",
+ "status", "pciInit0", "sipMonitor", "lfbMemoryConfig",
+ "miscInit0", "miscInit1", "dramInit0", "dramInit1",
+ "agpInit", "tmuGbeInit", "vgaInit0", "vgaInit1",
+ "dramCommand", "dramData", "reserved38", "reserved3c",
/* 0x040 */
- "pllCtrl0", "pllCtrl1", "pllCtrl2", "dacMode",
- "dacAddr", "dacData", "rgbMaxDelta", "vidProcCfg",
- "hwCurPatAddr", "hwCurLoc", "hwCurC0", "hwCurC1",
- "vidInFormat", "vidInStatus", "vidSerialParallelPort","vidInXDecimDeltas",
+ "pllCtrl0", "pllCtrl1", "pllCtrl2", "dacMode",
+ "dacAddr", "dacData", "rgbMaxDelta", "vidProcCfg",
+ "hwCurPatAddr", "hwCurLoc", "hwCurC0", "hwCurC1",
+ "vidInFormat", "vidInStatus", "vidSerialParallelPort","vidInXDecimDeltas",
/* 0x080 */
"vidInDecimInitErrs","vidInYDecimDeltas","vidPixelBufThold","vidChromaMin",
- "vidChromaMax", "vidCurrentLine","vidScreenSize","vidOverlayStartCoords",
+ "vidChromaMax", "vidCurrentLine","vidScreenSize","vidOverlayStartCoords",
"vidOverlayEndScreenCoord","vidOverlayDudx","vidOverlayDudxOffsetSrcWidth","vidOverlayDvdy",
- "vga[b0]", "vga[b4]", "vga[b8]", "vga[bc]",
+ "vga[b0]", "vga[b4]", "vga[b8]", "vga[bc]",
/* 0x0c0 */
- "vga[c0]", "vga[c4]", "vga[c8]", "vga[cc]",
- "vga[d0]", "vga[d4]", "vga[d8]", "vga[dc]",
+ "vga[c0]", "vga[c4]", "vga[c8]", "vga[cc]",
+ "vga[d0]", "vga[d4]", "vga[d8]", "vga[dc]",
"vidOverlayDvdyOffset","vidDesktopStartAddr","vidDesktopOverlayStride","vidInAddr0",
- "vidInAddr1", "vidInAddr2", "vidInStride", "vidCurrOverlayStartAddr"
+ "vidInAddr1", "vidInAddr2", "vidInStride", "vidCurrOverlayStartAddr"
};
@@ -940,42 +940,42 @@ static const char *const banshee_io_reg_name[] =
*************************************/
/* 0x000 */
-#define agpReqSize (0x000/4) /* */
-#define agpHostAddressLow (0x004/4) /* */
-#define agpHostAddressHigh (0x008/4) /* */
-#define agpGraphicsAddress (0x00c/4) /* */
-#define agpGraphicsStride (0x010/4) /* */
-#define agpMoveCMD (0x014/4) /* */
-#define cmdBaseAddr0 (0x020/4) /* */
-#define cmdBaseSize0 (0x024/4) /* */
-#define cmdBump0 (0x028/4) /* */
-#define cmdRdPtrL0 (0x02c/4) /* */
-#define cmdRdPtrH0 (0x030/4) /* */
-#define cmdAMin0 (0x034/4) /* */
-#define cmdAMax0 (0x03c/4) /* */
+#define agpReqSize (0x000/4) /* */
+#define agpHostAddressLow (0x004/4) /* */
+#define agpHostAddressHigh (0x008/4) /* */
+#define agpGraphicsAddress (0x00c/4) /* */
+#define agpGraphicsStride (0x010/4) /* */
+#define agpMoveCMD (0x014/4) /* */
+#define cmdBaseAddr0 (0x020/4) /* */
+#define cmdBaseSize0 (0x024/4) /* */
+#define cmdBump0 (0x028/4) /* */
+#define cmdRdPtrL0 (0x02c/4) /* */
+#define cmdRdPtrH0 (0x030/4) /* */
+#define cmdAMin0 (0x034/4) /* */
+#define cmdAMax0 (0x03c/4) /* */
/* 0x040 */
-#define cmdFifoDepth0 (0x044/4) /* */
-#define cmdHoleCnt0 (0x048/4) /* */
-#define cmdBaseAddr1 (0x050/4) /* */
-#define cmdBaseSize1 (0x054/4) /* */
-#define cmdBump1 (0x058/4) /* */
-#define cmdRdPtrL1 (0x05c/4) /* */
-#define cmdRdPtrH1 (0x060/4) /* */
-#define cmdAMin1 (0x064/4) /* */
-#define cmdAMax1 (0x06c/4) /* */
-#define cmdFifoDepth1 (0x074/4) /* */
-#define cmdHoleCnt1 (0x078/4) /* */
+#define cmdFifoDepth0 (0x044/4) /* */
+#define cmdHoleCnt0 (0x048/4) /* */
+#define cmdBaseAddr1 (0x050/4) /* */
+#define cmdBaseSize1 (0x054/4) /* */
+#define cmdBump1 (0x058/4) /* */
+#define cmdRdPtrL1 (0x05c/4) /* */
+#define cmdRdPtrH1 (0x060/4) /* */
+#define cmdAMin1 (0x064/4) /* */
+#define cmdAMax1 (0x06c/4) /* */
+#define cmdFifoDepth1 (0x074/4) /* */
+#define cmdHoleCnt1 (0x078/4) /* */
/* 0x080 */
-#define cmdFifoThresh (0x080/4) /* */
-#define cmdHoleInt (0x084/4) /* */
+#define cmdFifoThresh (0x080/4) /* */
+#define cmdHoleInt (0x084/4) /* */
/* 0x100 */
-#define yuvBaseAddress (0x100/4) /* */
-#define yuvStride (0x104/4) /* */
-#define crc1 (0x120/4) /* */
-#define crc2 (0x130/4) /* */
+#define yuvBaseAddress (0x100/4) /* */
+#define yuvStride (0x104/4) /* */
+#define crc1 (0x120/4) /* */
+#define crc2 (0x130/4) /* */
@@ -988,34 +988,34 @@ static const char *const banshee_io_reg_name[] =
static const char *const banshee_agp_reg_name[] =
{
/* 0x000 */
- "agpReqSize", "agpHostAddressLow","agpHostAddressHigh","agpGraphicsAddress",
- "agpGraphicsStride","agpMoveCMD","reserved18", "reserved1c",
- "cmdBaseAddr0", "cmdBaseSize0", "cmdBump0", "cmdRdPtrL0",
- "cmdRdPtrH0", "cmdAMin0", "reserved38", "cmdAMax0",
+ "agpReqSize", "agpHostAddressLow","agpHostAddressHigh","agpGraphicsAddress",
+ "agpGraphicsStride","agpMoveCMD","reserved18", "reserved1c",
+ "cmdBaseAddr0", "cmdBaseSize0", "cmdBump0", "cmdRdPtrL0",
+ "cmdRdPtrH0", "cmdAMin0", "reserved38", "cmdAMax0",
/* 0x040 */
- "reserved40", "cmdFifoDepth0","cmdHoleCnt0", "reserved4c",
- "cmdBaseAddr1", "cmdBaseSize1", "cmdBump1", "cmdRdPtrL1",
- "cmdRdPtrH1", "cmdAMin1", "reserved68", "cmdAMax1",
- "reserved70", "cmdFifoDepth1","cmdHoleCnt1", "reserved7c",
+ "reserved40", "cmdFifoDepth0","cmdHoleCnt0", "reserved4c",
+ "cmdBaseAddr1", "cmdBaseSize1", "cmdBump1", "cmdRdPtrL1",
+ "cmdRdPtrH1", "cmdAMin1", "reserved68", "cmdAMax1",
+ "reserved70", "cmdFifoDepth1","cmdHoleCnt1", "reserved7c",
/* 0x080 */
- "cmdFifoThresh","cmdHoleInt", "reserved88", "reserved8c",
- "reserved90", "reserved94", "reserved98", "reserved9c",
- "reserveda0", "reserveda4", "reserveda8", "reservedac",
- "reservedb0", "reservedb4", "reservedb8", "reservedbc",
+ "cmdFifoThresh","cmdHoleInt", "reserved88", "reserved8c",
+ "reserved90", "reserved94", "reserved98", "reserved9c",
+ "reserveda0", "reserveda4", "reserveda8", "reservedac",
+ "reservedb0", "reservedb4", "reservedb8", "reservedbc",
/* 0x0c0 */
- "reservedc0", "reservedc4", "reservedc8", "reservedcc",
- "reservedd0", "reservedd4", "reservedd8", "reserveddc",
- "reservede0", "reservede4", "reservede8", "reservedec",
- "reservedf0", "reservedf4", "reservedf8", "reservedfc",
+ "reservedc0", "reservedc4", "reservedc8", "reservedcc",
+ "reservedd0", "reservedd4", "reservedd8", "reserveddc",
+ "reservede0", "reservede4", "reservede8", "reservedec",
+ "reservedf0", "reservedf4", "reservedf8", "reservedfc",
/* 0x100 */
- "yuvBaseAddress","yuvStride", "reserved108", "reserved10c",
- "reserved110", "reserved114", "reserved118", "reserved11c",
- "crc1", "reserved124", "reserved128", "reserved12c",
- "crc2", "reserved134", "reserved138", "reserved13c"
+ "yuvBaseAddress","yuvStride", "reserved108", "reserved10c",
+ "reserved110", "reserved114", "reserved118", "reserved11c",
+ "crc1", "reserved124", "reserved128", "reserved12c",
+ "crc2", "reserved134", "reserved138", "reserved13c"
};
@@ -1028,17 +1028,17 @@ static const char *const banshee_agp_reg_name[] =
static const UINT8 dither_matrix_4x4[16] =
{
- 0, 8, 2, 10,
+ 0, 8, 2, 10,
12, 4, 14, 6,
- 3, 11, 1, 9,
+ 3, 11, 1, 9,
15, 7, 13, 5
};
static const UINT8 dither_matrix_2x2[16] =
{
- 2, 10, 2, 10,
+ 2, 10, 2, 10,
14, 6, 14, 6,
- 2, 10, 2, 10,
+ 2, 10, 2, 10,
14, 6, 14, 6
};
@@ -1050,52 +1050,52 @@ static const UINT8 dither_matrix_2x2[16] =
*
*************************************/
-#define EXTRACT_565_TO_888(val, a, b, c) \
- (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \
- (b) = (((val) >> 3) & 0xfc) | (((val) >> 9) & 0x03); \
- (c) = (((val) << 3) & 0xf8) | (((val) >> 2) & 0x07); \
-
-#define EXTRACT_x555_TO_888(val, a, b, c) \
- (a) = (((val) >> 7) & 0xf8) | (((val) >> 12) & 0x07); \
- (b) = (((val) >> 2) & 0xf8) | (((val) >> 7) & 0x07); \
- (c) = (((val) << 3) & 0xf8) | (((val) >> 2) & 0x07); \
-
-#define EXTRACT_555x_TO_888(val, a, b, c) \
- (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \
- (b) = (((val) >> 3) & 0xf8) | (((val) >> 8) & 0x07); \
- (c) = (((val) << 2) & 0xf8) | (((val) >> 3) & 0x07); \
-
-#define EXTRACT_1555_TO_8888(val, a, b, c, d) \
- (a) = ((INT16)(val) >> 15) & 0xff; \
- EXTRACT_x555_TO_888(val, b, c, d) \
-
-#define EXTRACT_5551_TO_8888(val, a, b, c, d) \
- EXTRACT_555x_TO_888(val, a, b, c) \
- (d) = ((val) & 0x0001) ? 0xff : 0x00; \
-
-#define EXTRACT_x888_TO_888(val, a, b, c) \
- (a) = ((val) >> 16) & 0xff; \
- (b) = ((val) >> 8) & 0xff; \
- (c) = ((val) >> 0) & 0xff; \
-
-#define EXTRACT_888x_TO_888(val, a, b, c) \
- (a) = ((val) >> 24) & 0xff; \
- (b) = ((val) >> 16) & 0xff; \
- (c) = ((val) >> 8) & 0xff; \
-
-#define EXTRACT_8888_TO_8888(val, a, b, c, d) \
- (a) = ((val) >> 24) & 0xff; \
- (b) = ((val) >> 16) & 0xff; \
- (c) = ((val) >> 8) & 0xff; \
- (d) = ((val) >> 0) & 0xff; \
-
-#define EXTRACT_4444_TO_8888(val, a, b, c, d) \
- (a) = (((val) >> 8) & 0xf0) | (((val) >> 12) & 0x0f); \
- (b) = (((val) >> 4) & 0xf0) | (((val) >> 8) & 0x0f); \
- (c) = (((val) >> 0) & 0xf0) | (((val) >> 4) & 0x0f); \
- (d) = (((val) << 4) & 0xf0) | (((val) >> 0) & 0x0f); \
-
-#define EXTRACT_332_TO_888(val, a, b, c) \
+#define EXTRACT_565_TO_888(val, a, b, c) \
+ (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \
+ (b) = (((val) >> 3) & 0xfc) | (((val) >> 9) & 0x03); \
+ (c) = (((val) << 3) & 0xf8) | (((val) >> 2) & 0x07); \
+
+#define EXTRACT_x555_TO_888(val, a, b, c) \
+ (a) = (((val) >> 7) & 0xf8) | (((val) >> 12) & 0x07); \
+ (b) = (((val) >> 2) & 0xf8) | (((val) >> 7) & 0x07); \
+ (c) = (((val) << 3) & 0xf8) | (((val) >> 2) & 0x07); \
+
+#define EXTRACT_555x_TO_888(val, a, b, c) \
+ (a) = (((val) >> 8) & 0xf8) | (((val) >> 13) & 0x07); \
+ (b) = (((val) >> 3) & 0xf8) | (((val) >> 8) & 0x07); \
+ (c) = (((val) << 2) & 0xf8) | (((val) >> 3) & 0x07); \
+
+#define EXTRACT_1555_TO_8888(val, a, b, c, d) \
+ (a) = ((INT16)(val) >> 15) & 0xff; \
+ EXTRACT_x555_TO_888(val, b, c, d) \
+
+#define EXTRACT_5551_TO_8888(val, a, b, c, d) \
+ EXTRACT_555x_TO_888(val, a, b, c) \
+ (d) = ((val) & 0x0001) ? 0xff : 0x00; \
+
+#define EXTRACT_x888_TO_888(val, a, b, c) \
+ (a) = ((val) >> 16) & 0xff; \
+ (b) = ((val) >> 8) & 0xff; \
+ (c) = ((val) >> 0) & 0xff; \
+
+#define EXTRACT_888x_TO_888(val, a, b, c) \
+ (a) = ((val) >> 24) & 0xff; \
+ (b) = ((val) >> 16) & 0xff; \
+ (c) = ((val) >> 8) & 0xff; \
+
+#define EXTRACT_8888_TO_8888(val, a, b, c, d) \
+ (a) = ((val) >> 24) & 0xff; \
+ (b) = ((val) >> 16) & 0xff; \
+ (c) = ((val) >> 8) & 0xff; \
+ (d) = ((val) >> 0) & 0xff; \
+
+#define EXTRACT_4444_TO_8888(val, a, b, c, d) \
+ (a) = (((val) >> 8) & 0xf0) | (((val) >> 12) & 0x0f); \
+ (b) = (((val) >> 4) & 0xf0) | (((val) >> 8) & 0x0f); \
+ (c) = (((val) >> 0) & 0xf0) | (((val) >> 4) & 0x0f); \
+ (d) = (((val) << 4) & 0xf0) | (((val) >> 0) & 0x0f); \
+
+#define EXTRACT_332_TO_888(val, a, b, c) \
(a) = (((val) >> 0) & 0xe0) | (((val) >> 3) & 0x1c) | (((val) >> 6) & 0x03); \
(b) = (((val) << 3) & 0xe0) | (((val) >> 0) & 0x1c) | (((val) >> 3) & 0x03); \
(c) = (((val) << 6) & 0xc0) | (((val) << 4) & 0x30) | (((val) << 2) & 0xc0) | (((val) << 0) & 0x03); \
@@ -1109,10 +1109,10 @@ static const UINT8 dither_matrix_2x2[16] =
*************************************/
/* macro for clamping a value between minimum and maximum values */
-#define CLAMP(val,min,max) do { if ((val) < (min)) { (val) = (min); } else if ((val) > (max)) { (val) = (max); } } while (0)
+#define CLAMP(val,min,max) do { if ((val) < (min)) { (val) = (min); } else if ((val) > (max)) { (val) = (max); } } while (0)
/* macro to compute the base 2 log for LOD calculations */
-#define LOGB2(x) (log((double)(x)) / log(2.0))
+#define LOGB2(x) (log((double)(x)) / log(2.0))
@@ -1122,268 +1122,268 @@ static const UINT8 dither_matrix_2x2[16] =
*
*************************************/
-#define INITEN_ENABLE_HW_INIT(val) (((val) >> 0) & 1)
-#define INITEN_ENABLE_PCI_FIFO(val) (((val) >> 1) & 1)
-#define INITEN_REMAP_INIT_TO_DAC(val) (((val) >> 2) & 1)
-#define INITEN_ENABLE_SNOOP0(val) (((val) >> 4) & 1)
-#define INITEN_SNOOP0_MEMORY_MATCH(val) (((val) >> 5) & 1)
-#define INITEN_SNOOP0_READWRITE_MATCH(val) (((val) >> 6) & 1)
-#define INITEN_ENABLE_SNOOP1(val) (((val) >> 7) & 1)
-#define INITEN_SNOOP1_MEMORY_MATCH(val) (((val) >> 8) & 1)
-#define INITEN_SNOOP1_READWRITE_MATCH(val) (((val) >> 9) & 1)
-#define INITEN_SLI_BUS_OWNER(val) (((val) >> 10) & 1)
-#define INITEN_SLI_ODD_EVEN(val) (((val) >> 11) & 1)
-#define INITEN_SECONDARY_REV_ID(val) (((val) >> 12) & 0xf) /* voodoo 2 only */
-#define INITEN_MFCTR_FAB_ID(val) (((val) >> 16) & 0xf) /* voodoo 2 only */
-#define INITEN_ENABLE_PCI_INTERRUPT(val) (((val) >> 20) & 1) /* voodoo 2 only */
-#define INITEN_PCI_INTERRUPT_TIMEOUT(val) (((val) >> 21) & 1) /* voodoo 2 only */
-#define INITEN_ENABLE_NAND_TREE_TEST(val) (((val) >> 22) & 1) /* voodoo 2 only */
-#define INITEN_ENABLE_SLI_ADDRESS_SNOOP(val) (((val) >> 23) & 1) /* voodoo 2 only */
-#define INITEN_SLI_SNOOP_ADDRESS(val) (((val) >> 24) & 0xff) /* voodoo 2 only */
-
-#define FBZCP_CC_RGBSELECT(val) (((val) >> 0) & 3)
-#define FBZCP_CC_ASELECT(val) (((val) >> 2) & 3)
-#define FBZCP_CC_LOCALSELECT(val) (((val) >> 4) & 1)
-#define FBZCP_CCA_LOCALSELECT(val) (((val) >> 5) & 3)
-#define FBZCP_CC_LOCALSELECT_OVERRIDE(val) (((val) >> 7) & 1)
-#define FBZCP_CC_ZERO_OTHER(val) (((val) >> 8) & 1)
-#define FBZCP_CC_SUB_CLOCAL(val) (((val) >> 9) & 1)
-#define FBZCP_CC_MSELECT(val) (((val) >> 10) & 7)
-#define FBZCP_CC_REVERSE_BLEND(val) (((val) >> 13) & 1)
-#define FBZCP_CC_ADD_ACLOCAL(val) (((val) >> 14) & 3)
-#define FBZCP_CC_INVERT_OUTPUT(val) (((val) >> 16) & 1)
-#define FBZCP_CCA_ZERO_OTHER(val) (((val) >> 17) & 1)
-#define FBZCP_CCA_SUB_CLOCAL(val) (((val) >> 18) & 1)
-#define FBZCP_CCA_MSELECT(val) (((val) >> 19) & 7)
-#define FBZCP_CCA_REVERSE_BLEND(val) (((val) >> 22) & 1)
-#define FBZCP_CCA_ADD_ACLOCAL(val) (((val) >> 23) & 3)
-#define FBZCP_CCA_INVERT_OUTPUT(val) (((val) >> 25) & 1)
-#define FBZCP_CCA_SUBPIXEL_ADJUST(val) (((val) >> 26) & 1)
-#define FBZCP_TEXTURE_ENABLE(val) (((val) >> 27) & 1)
-#define FBZCP_RGBZW_CLAMP(val) (((val) >> 28) & 1) /* voodoo 2 only */
-#define FBZCP_ANTI_ALIAS(val) (((val) >> 29) & 1) /* voodoo 2 only */
-
-#define ALPHAMODE_ALPHATEST(val) (((val) >> 0) & 1)
-#define ALPHAMODE_ALPHAFUNCTION(val) (((val) >> 1) & 7)
-#define ALPHAMODE_ALPHABLEND(val) (((val) >> 4) & 1)
-#define ALPHAMODE_ANTIALIAS(val) (((val) >> 5) & 1)
-#define ALPHAMODE_SRCRGBBLEND(val) (((val) >> 8) & 15)
-#define ALPHAMODE_DSTRGBBLEND(val) (((val) >> 12) & 15)
-#define ALPHAMODE_SRCALPHABLEND(val) (((val) >> 16) & 15)
-#define ALPHAMODE_DSTALPHABLEND(val) (((val) >> 20) & 15)
-#define ALPHAMODE_ALPHAREF(val) (((val) >> 24) & 0xff)
-
-#define FOGMODE_ENABLE_FOG(val) (((val) >> 0) & 1)
-#define FOGMODE_FOG_ADD(val) (((val) >> 1) & 1)
-#define FOGMODE_FOG_MULT(val) (((val) >> 2) & 1)
-#define FOGMODE_FOG_ZALPHA(val) (((val) >> 3) & 3)
-#define FOGMODE_FOG_CONSTANT(val) (((val) >> 5) & 1)
-#define FOGMODE_FOG_DITHER(val) (((val) >> 6) & 1) /* voodoo 2 only */
-#define FOGMODE_FOG_ZONES(val) (((val) >> 7) & 1) /* voodoo 2 only */
-
-#define FBZMODE_ENABLE_CLIPPING(val) (((val) >> 0) & 1)
-#define FBZMODE_ENABLE_CHROMAKEY(val) (((val) >> 1) & 1)
-#define FBZMODE_ENABLE_STIPPLE(val) (((val) >> 2) & 1)
-#define FBZMODE_WBUFFER_SELECT(val) (((val) >> 3) & 1)
-#define FBZMODE_ENABLE_DEPTHBUF(val) (((val) >> 4) & 1)
-#define FBZMODE_DEPTH_FUNCTION(val) (((val) >> 5) & 7)
-#define FBZMODE_ENABLE_DITHERING(val) (((val) >> 8) & 1)
-#define FBZMODE_RGB_BUFFER_MASK(val) (((val) >> 9) & 1)
-#define FBZMODE_AUX_BUFFER_MASK(val) (((val) >> 10) & 1)
-#define FBZMODE_DITHER_TYPE(val) (((val) >> 11) & 1)
-#define FBZMODE_STIPPLE_PATTERN(val) (((val) >> 12) & 1)
-#define FBZMODE_ENABLE_ALPHA_MASK(val) (((val) >> 13) & 1)
-#define FBZMODE_DRAW_BUFFER(val) (((val) >> 14) & 3)
-#define FBZMODE_ENABLE_DEPTH_BIAS(val) (((val) >> 16) & 1)
-#define FBZMODE_Y_ORIGIN(val) (((val) >> 17) & 1)
-#define FBZMODE_ENABLE_ALPHA_PLANES(val) (((val) >> 18) & 1)
-#define FBZMODE_ALPHA_DITHER_SUBTRACT(val) (((val) >> 19) & 1)
-#define FBZMODE_DEPTH_SOURCE_COMPARE(val) (((val) >> 20) & 1)
-#define FBZMODE_DEPTH_FLOAT_SELECT(val) (((val) >> 21) & 1) /* voodoo 2 only */
-
-#define LFBMODE_WRITE_FORMAT(val) (((val) >> 0) & 0xf)
-#define LFBMODE_WRITE_BUFFER_SELECT(val) (((val) >> 4) & 3)
-#define LFBMODE_READ_BUFFER_SELECT(val) (((val) >> 6) & 3)
-#define LFBMODE_ENABLE_PIXEL_PIPELINE(val) (((val) >> 8) & 1)
-#define LFBMODE_RGBA_LANES(val) (((val) >> 9) & 3)
-#define LFBMODE_WORD_SWAP_WRITES(val) (((val) >> 11) & 1)
-#define LFBMODE_BYTE_SWIZZLE_WRITES(val) (((val) >> 12) & 1)
-#define LFBMODE_Y_ORIGIN(val) (((val) >> 13) & 1)
-#define LFBMODE_WRITE_W_SELECT(val) (((val) >> 14) & 1)
-#define LFBMODE_WORD_SWAP_READS(val) (((val) >> 15) & 1)
-#define LFBMODE_BYTE_SWIZZLE_READS(val) (((val) >> 16) & 1)
-
-#define CHROMARANGE_BLUE_EXCLUSIVE(val) (((val) >> 24) & 1)
-#define CHROMARANGE_GREEN_EXCLUSIVE(val) (((val) >> 25) & 1)
-#define CHROMARANGE_RED_EXCLUSIVE(val) (((val) >> 26) & 1)
-#define CHROMARANGE_UNION_MODE(val) (((val) >> 27) & 1)
-#define CHROMARANGE_ENABLE(val) (((val) >> 28) & 1)
-
-#define FBIINIT0_VGA_PASSTHRU(val) (((val) >> 0) & 1)
-#define FBIINIT0_GRAPHICS_RESET(val) (((val) >> 1) & 1)
-#define FBIINIT0_FIFO_RESET(val) (((val) >> 2) & 1)
-#define FBIINIT0_SWIZZLE_REG_WRITES(val) (((val) >> 3) & 1)
-#define FBIINIT0_STALL_PCIE_FOR_HWM(val) (((val) >> 4) & 1)
-#define FBIINIT0_PCI_FIFO_LWM(val) (((val) >> 6) & 0x1f)
-#define FBIINIT0_LFB_TO_MEMORY_FIFO(val) (((val) >> 11) & 1)
+#define INITEN_ENABLE_HW_INIT(val) (((val) >> 0) & 1)
+#define INITEN_ENABLE_PCI_FIFO(val) (((val) >> 1) & 1)
+#define INITEN_REMAP_INIT_TO_DAC(val) (((val) >> 2) & 1)
+#define INITEN_ENABLE_SNOOP0(val) (((val) >> 4) & 1)
+#define INITEN_SNOOP0_MEMORY_MATCH(val) (((val) >> 5) & 1)
+#define INITEN_SNOOP0_READWRITE_MATCH(val) (((val) >> 6) & 1)
+#define INITEN_ENABLE_SNOOP1(val) (((val) >> 7) & 1)
+#define INITEN_SNOOP1_MEMORY_MATCH(val) (((val) >> 8) & 1)
+#define INITEN_SNOOP1_READWRITE_MATCH(val) (((val) >> 9) & 1)
+#define INITEN_SLI_BUS_OWNER(val) (((val) >> 10) & 1)
+#define INITEN_SLI_ODD_EVEN(val) (((val) >> 11) & 1)
+#define INITEN_SECONDARY_REV_ID(val) (((val) >> 12) & 0xf) /* voodoo 2 only */
+#define INITEN_MFCTR_FAB_ID(val) (((val) >> 16) & 0xf) /* voodoo 2 only */
+#define INITEN_ENABLE_PCI_INTERRUPT(val) (((val) >> 20) & 1) /* voodoo 2 only */
+#define INITEN_PCI_INTERRUPT_TIMEOUT(val) (((val) >> 21) & 1) /* voodoo 2 only */
+#define INITEN_ENABLE_NAND_TREE_TEST(val) (((val) >> 22) & 1) /* voodoo 2 only */
+#define INITEN_ENABLE_SLI_ADDRESS_SNOOP(val) (((val) >> 23) & 1) /* voodoo 2 only */
+#define INITEN_SLI_SNOOP_ADDRESS(val) (((val) >> 24) & 0xff) /* voodoo 2 only */
+
+#define FBZCP_CC_RGBSELECT(val) (((val) >> 0) & 3)
+#define FBZCP_CC_ASELECT(val) (((val) >> 2) & 3)
+#define FBZCP_CC_LOCALSELECT(val) (((val) >> 4) & 1)
+#define FBZCP_CCA_LOCALSELECT(val) (((val) >> 5) & 3)
+#define FBZCP_CC_LOCALSELECT_OVERRIDE(val) (((val) >> 7) & 1)
+#define FBZCP_CC_ZERO_OTHER(val) (((val) >> 8) & 1)
+#define FBZCP_CC_SUB_CLOCAL(val) (((val) >> 9) & 1)
+#define FBZCP_CC_MSELECT(val) (((val) >> 10) & 7)
+#define FBZCP_CC_REVERSE_BLEND(val) (((val) >> 13) & 1)
+#define FBZCP_CC_ADD_ACLOCAL(val) (((val) >> 14) & 3)
+#define FBZCP_CC_INVERT_OUTPUT(val) (((val) >> 16) & 1)
+#define FBZCP_CCA_ZERO_OTHER(val) (((val) >> 17) & 1)
+#define FBZCP_CCA_SUB_CLOCAL(val) (((val) >> 18) & 1)
+#define FBZCP_CCA_MSELECT(val) (((val) >> 19) & 7)
+#define FBZCP_CCA_REVERSE_BLEND(val) (((val) >> 22) & 1)
+#define FBZCP_CCA_ADD_ACLOCAL(val) (((val) >> 23) & 3)
+#define FBZCP_CCA_INVERT_OUTPUT(val) (((val) >> 25) & 1)
+#define FBZCP_CCA_SUBPIXEL_ADJUST(val) (((val) >> 26) & 1)
+#define FBZCP_TEXTURE_ENABLE(val) (((val) >> 27) & 1)
+#define FBZCP_RGBZW_CLAMP(val) (((val) >> 28) & 1) /* voodoo 2 only */
+#define FBZCP_ANTI_ALIAS(val) (((val) >> 29) & 1) /* voodoo 2 only */
+
+#define ALPHAMODE_ALPHATEST(val) (((val) >> 0) & 1)
+#define ALPHAMODE_ALPHAFUNCTION(val) (((val) >> 1) & 7)
+#define ALPHAMODE_ALPHABLEND(val) (((val) >> 4) & 1)
+#define ALPHAMODE_ANTIALIAS(val) (((val) >> 5) & 1)
+#define ALPHAMODE_SRCRGBBLEND(val) (((val) >> 8) & 15)
+#define ALPHAMODE_DSTRGBBLEND(val) (((val) >> 12) & 15)
+#define ALPHAMODE_SRCALPHABLEND(val) (((val) >> 16) & 15)
+#define ALPHAMODE_DSTALPHABLEND(val) (((val) >> 20) & 15)
+#define ALPHAMODE_ALPHAREF(val) (((val) >> 24) & 0xff)
+
+#define FOGMODE_ENABLE_FOG(val) (((val) >> 0) & 1)
+#define FOGMODE_FOG_ADD(val) (((val) >> 1) & 1)
+#define FOGMODE_FOG_MULT(val) (((val) >> 2) & 1)
+#define FOGMODE_FOG_ZALPHA(val) (((val) >> 3) & 3)
+#define FOGMODE_FOG_CONSTANT(val) (((val) >> 5) & 1)
+#define FOGMODE_FOG_DITHER(val) (((val) >> 6) & 1) /* voodoo 2 only */
+#define FOGMODE_FOG_ZONES(val) (((val) >> 7) & 1) /* voodoo 2 only */
+
+#define FBZMODE_ENABLE_CLIPPING(val) (((val) >> 0) & 1)
+#define FBZMODE_ENABLE_CHROMAKEY(val) (((val) >> 1) & 1)
+#define FBZMODE_ENABLE_STIPPLE(val) (((val) >> 2) & 1)
+#define FBZMODE_WBUFFER_SELECT(val) (((val) >> 3) & 1)
+#define FBZMODE_ENABLE_DEPTHBUF(val) (((val) >> 4) & 1)
+#define FBZMODE_DEPTH_FUNCTION(val) (((val) >> 5) & 7)
+#define FBZMODE_ENABLE_DITHERING(val) (((val) >> 8) & 1)
+#define FBZMODE_RGB_BUFFER_MASK(val) (((val) >> 9) & 1)
+#define FBZMODE_AUX_BUFFER_MASK(val) (((val) >> 10) & 1)
+#define FBZMODE_DITHER_TYPE(val) (((val) >> 11) & 1)
+#define FBZMODE_STIPPLE_PATTERN(val) (((val) >> 12) & 1)
+#define FBZMODE_ENABLE_ALPHA_MASK(val) (((val) >> 13) & 1)
+#define FBZMODE_DRAW_BUFFER(val) (((val) >> 14) & 3)
+#define FBZMODE_ENABLE_DEPTH_BIAS(val) (((val) >> 16) & 1)
+#define FBZMODE_Y_ORIGIN(val) (((val) >> 17) & 1)
+#define FBZMODE_ENABLE_ALPHA_PLANES(val) (((val) >> 18) & 1)
+#define FBZMODE_ALPHA_DITHER_SUBTRACT(val) (((val) >> 19) & 1)
+#define FBZMODE_DEPTH_SOURCE_COMPARE(val) (((val) >> 20) & 1)
+#define FBZMODE_DEPTH_FLOAT_SELECT(val) (((val) >> 21) & 1) /* voodoo 2 only */
+
+#define LFBMODE_WRITE_FORMAT(val) (((val) >> 0) & 0xf)
+#define LFBMODE_WRITE_BUFFER_SELECT(val) (((val) >> 4) & 3)
+#define LFBMODE_READ_BUFFER_SELECT(val) (((val) >> 6) & 3)
+#define LFBMODE_ENABLE_PIXEL_PIPELINE(val) (((val) >> 8) & 1)
+#define LFBMODE_RGBA_LANES(val) (((val) >> 9) & 3)
+#define LFBMODE_WORD_SWAP_WRITES(val) (((val) >> 11) & 1)
+#define LFBMODE_BYTE_SWIZZLE_WRITES(val) (((val) >> 12) & 1)
+#define LFBMODE_Y_ORIGIN(val) (((val) >> 13) & 1)
+#define LFBMODE_WRITE_W_SELECT(val) (((val) >> 14) & 1)
+#define LFBMODE_WORD_SWAP_READS(val) (((val) >> 15) & 1)
+#define LFBMODE_BYTE_SWIZZLE_READS(val) (((val) >> 16) & 1)
+
+#define CHROMARANGE_BLUE_EXCLUSIVE(val) (((val) >> 24) & 1)
+#define CHROMARANGE_GREEN_EXCLUSIVE(val) (((val) >> 25) & 1)
+#define CHROMARANGE_RED_EXCLUSIVE(val) (((val) >> 26) & 1)
+#define CHROMARANGE_UNION_MODE(val) (((val) >> 27) & 1)
+#define CHROMARANGE_ENABLE(val) (((val) >> 28) & 1)
+
+#define FBIINIT0_VGA_PASSTHRU(val) (((val) >> 0) & 1)
+#define FBIINIT0_GRAPHICS_RESET(val) (((val) >> 1) & 1)
+#define FBIINIT0_FIFO_RESET(val) (((val) >> 2) & 1)
+#define FBIINIT0_SWIZZLE_REG_WRITES(val) (((val) >> 3) & 1)
+#define FBIINIT0_STALL_PCIE_FOR_HWM(val) (((val) >> 4) & 1)
+#define FBIINIT0_PCI_FIFO_LWM(val) (((val) >> 6) & 0x1f)
+#define FBIINIT0_LFB_TO_MEMORY_FIFO(val) (((val) >> 11) & 1)
#define FBIINIT0_TEXMEM_TO_MEMORY_FIFO(val) (((val) >> 12) & 1)
-#define FBIINIT0_ENABLE_MEMORY_FIFO(val) (((val) >> 13) & 1)
-#define FBIINIT0_MEMORY_FIFO_HWM(val) (((val) >> 14) & 0x7ff)
-#define FBIINIT0_MEMORY_FIFO_BURST(val) (((val) >> 25) & 0x3f)
-
-#define FBIINIT1_PCI_DEV_FUNCTION(val) (((val) >> 0) & 1)
-#define FBIINIT1_PCI_WRITE_WAIT_STATES(val) (((val) >> 1) & 1)
-#define FBIINIT1_MULTI_SST1(val) (((val) >> 2) & 1) /* not on voodoo 2 */
-#define FBIINIT1_ENABLE_LFB(val) (((val) >> 3) & 1)
-#define FBIINIT1_X_VIDEO_TILES(val) (((val) >> 4) & 0xf)
-#define FBIINIT1_VIDEO_TIMING_RESET(val) (((val) >> 8) & 1)
-#define FBIINIT1_SOFTWARE_OVERRIDE(val) (((val) >> 9) & 1)
-#define FBIINIT1_SOFTWARE_HSYNC(val) (((val) >> 10) & 1)
-#define FBIINIT1_SOFTWARE_VSYNC(val) (((val) >> 11) & 1)
-#define FBIINIT1_SOFTWARE_BLANK(val) (((val) >> 12) & 1)
-#define FBIINIT1_DRIVE_VIDEO_TIMING(val) (((val) >> 13) & 1)
-#define FBIINIT1_DRIVE_VIDEO_BLANK(val) (((val) >> 14) & 1)
-#define FBIINIT1_DRIVE_VIDEO_SYNC(val) (((val) >> 15) & 1)
-#define FBIINIT1_DRIVE_VIDEO_DCLK(val) (((val) >> 16) & 1)
-#define FBIINIT1_VIDEO_TIMING_VCLK(val) (((val) >> 17) & 1)
-#define FBIINIT1_VIDEO_CLK_2X_DELAY(val) (((val) >> 18) & 3)
-#define FBIINIT1_VIDEO_TIMING_SOURCE(val) (((val) >> 20) & 3)
-#define FBIINIT1_ENABLE_24BPP_OUTPUT(val) (((val) >> 22) & 1)
-#define FBIINIT1_ENABLE_SLI(val) (((val) >> 23) & 1)
-#define FBIINIT1_X_VIDEO_TILES_BIT5(val) (((val) >> 24) & 1) /* voodoo 2 only */
-#define FBIINIT1_ENABLE_EDGE_FILTER(val) (((val) >> 25) & 1)
-#define FBIINIT1_INVERT_VID_CLK_2X(val) (((val) >> 26) & 1)
-#define FBIINIT1_VID_CLK_2X_SEL_DELAY(val) (((val) >> 27) & 3)
-#define FBIINIT1_VID_CLK_DELAY(val) (((val) >> 29) & 3)
+#define FBIINIT0_ENABLE_MEMORY_FIFO(val) (((val) >> 13) & 1)
+#define FBIINIT0_MEMORY_FIFO_HWM(val) (((val) >> 14) & 0x7ff)
+#define FBIINIT0_MEMORY_FIFO_BURST(val) (((val) >> 25) & 0x3f)
+
+#define FBIINIT1_PCI_DEV_FUNCTION(val) (((val) >> 0) & 1)
+#define FBIINIT1_PCI_WRITE_WAIT_STATES(val) (((val) >> 1) & 1)
+#define FBIINIT1_MULTI_SST1(val) (((val) >> 2) & 1) /* not on voodoo 2 */
+#define FBIINIT1_ENABLE_LFB(val) (((val) >> 3) & 1)
+#define FBIINIT1_X_VIDEO_TILES(val) (((val) >> 4) & 0xf)
+#define FBIINIT1_VIDEO_TIMING_RESET(val) (((val) >> 8) & 1)
+#define FBIINIT1_SOFTWARE_OVERRIDE(val) (((val) >> 9) & 1)
+#define FBIINIT1_SOFTWARE_HSYNC(val) (((val) >> 10) & 1)
+#define FBIINIT1_SOFTWARE_VSYNC(val) (((val) >> 11) & 1)
+#define FBIINIT1_SOFTWARE_BLANK(val) (((val) >> 12) & 1)
+#define FBIINIT1_DRIVE_VIDEO_TIMING(val) (((val) >> 13) & 1)
+#define FBIINIT1_DRIVE_VIDEO_BLANK(val) (((val) >> 14) & 1)
+#define FBIINIT1_DRIVE_VIDEO_SYNC(val) (((val) >> 15) & 1)
+#define FBIINIT1_DRIVE_VIDEO_DCLK(val) (((val) >> 16) & 1)
+#define FBIINIT1_VIDEO_TIMING_VCLK(val) (((val) >> 17) & 1)
+#define FBIINIT1_VIDEO_CLK_2X_DELAY(val) (((val) >> 18) & 3)
+#define FBIINIT1_VIDEO_TIMING_SOURCE(val) (((val) >> 20) & 3)
+#define FBIINIT1_ENABLE_24BPP_OUTPUT(val) (((val) >> 22) & 1)
+#define FBIINIT1_ENABLE_SLI(val) (((val) >> 23) & 1)
+#define FBIINIT1_X_VIDEO_TILES_BIT5(val) (((val) >> 24) & 1) /* voodoo 2 only */
+#define FBIINIT1_ENABLE_EDGE_FILTER(val) (((val) >> 25) & 1)
+#define FBIINIT1_INVERT_VID_CLK_2X(val) (((val) >> 26) & 1)
+#define FBIINIT1_VID_CLK_2X_SEL_DELAY(val) (((val) >> 27) & 3)
+#define FBIINIT1_VID_CLK_DELAY(val) (((val) >> 29) & 3)
#define FBIINIT1_DISABLE_FAST_READAHEAD(val) (((val) >> 31) & 1)
-#define FBIINIT2_DISABLE_DITHER_SUB(val) (((val) >> 0) & 1)
-#define FBIINIT2_DRAM_BANKING(val) (((val) >> 1) & 1)
-#define FBIINIT2_ENABLE_TRIPLE_BUF(val) (((val) >> 4) & 1)
-#define FBIINIT2_ENABLE_FAST_RAS_READ(val) (((val) >> 5) & 1)
-#define FBIINIT2_ENABLE_GEN_DRAM_OE(val) (((val) >> 6) & 1)
-#define FBIINIT2_ENABLE_FAST_READWRITE(val) (((val) >> 7) & 1)
+#define FBIINIT2_DISABLE_DITHER_SUB(val) (((val) >> 0) & 1)
+#define FBIINIT2_DRAM_BANKING(val) (((val) >> 1) & 1)
+#define FBIINIT2_ENABLE_TRIPLE_BUF(val) (((val) >> 4) & 1)
+#define FBIINIT2_ENABLE_FAST_RAS_READ(val) (((val) >> 5) & 1)
+#define FBIINIT2_ENABLE_GEN_DRAM_OE(val) (((val) >> 6) & 1)
+#define FBIINIT2_ENABLE_FAST_READWRITE(val) (((val) >> 7) & 1)
#define FBIINIT2_ENABLE_PASSTHRU_DITHER(val) (((val) >> 8) & 1)
-#define FBIINIT2_SWAP_BUFFER_ALGORITHM(val) (((val) >> 9) & 3)
-#define FBIINIT2_VIDEO_BUFFER_OFFSET(val) (((val) >> 11) & 0x1ff)
-#define FBIINIT2_ENABLE_DRAM_BANKING(val) (((val) >> 20) & 1)
-#define FBIINIT2_ENABLE_DRAM_READ_FIFO(val) (((val) >> 21) & 1)
-#define FBIINIT2_ENABLE_DRAM_REFRESH(val) (((val) >> 22) & 1)
-#define FBIINIT2_REFRESH_LOAD_VALUE(val) (((val) >> 23) & 0x1ff)
-
-#define FBIINIT3_TRI_REGISTER_REMAP(val) (((val) >> 0) & 1)
-#define FBIINIT3_VIDEO_FIFO_THRESH(val) (((val) >> 1) & 0x1f)
-#define FBIINIT3_DISABLE_TMUS(val) (((val) >> 6) & 1)
-#define FBIINIT3_FBI_MEMORY_TYPE(val) (((val) >> 8) & 7)
-#define FBIINIT3_VGA_PASS_RESET_VAL(val) (((val) >> 11) & 1)
-#define FBIINIT3_HARDCODE_PCI_BASE(val) (((val) >> 12) & 1)
-#define FBIINIT3_FBI2TREX_DELAY(val) (((val) >> 13) & 0xf)
-#define FBIINIT3_TREX2FBI_DELAY(val) (((val) >> 17) & 0x1f)
-#define FBIINIT3_YORIGIN_SUBTRACT(val) (((val) >> 22) & 0x3ff)
-
-#define FBIINIT4_PCI_READ_WAITS(val) (((val) >> 0) & 1)
-#define FBIINIT4_ENABLE_LFB_READAHEAD(val) (((val) >> 1) & 1)
-#define FBIINIT4_MEMORY_FIFO_LWM(val) (((val) >> 2) & 0x3f)
-#define FBIINIT4_MEMORY_FIFO_START_ROW(val) (((val) >> 8) & 0x3ff)
-#define FBIINIT4_MEMORY_FIFO_STOP_ROW(val) (((val) >> 18) & 0x3ff)
-#define FBIINIT4_VIDEO_CLOCKING_DELAY(val) (((val) >> 29) & 7) /* voodoo 2 only */
-
-#define FBIINIT5_DISABLE_PCI_STOP(val) (((val) >> 0) & 1) /* voodoo 2 only */
-#define FBIINIT5_PCI_SLAVE_SPEED(val) (((val) >> 1) & 1) /* voodoo 2 only */
-#define FBIINIT5_DAC_DATA_OUTPUT_WIDTH(val) (((val) >> 2) & 1) /* voodoo 2 only */
-#define FBIINIT5_DAC_DATA_17_OUTPUT(val) (((val) >> 3) & 1) /* voodoo 2 only */
-#define FBIINIT5_DAC_DATA_18_OUTPUT(val) (((val) >> 4) & 1) /* voodoo 2 only */
-#define FBIINIT5_GENERIC_STRAPPING(val) (((val) >> 5) & 0xf) /* voodoo 2 only */
-#define FBIINIT5_BUFFER_ALLOCATION(val) (((val) >> 9) & 3) /* voodoo 2 only */
-#define FBIINIT5_DRIVE_VID_CLK_SLAVE(val) (((val) >> 11) & 1) /* voodoo 2 only */
-#define FBIINIT5_DRIVE_DAC_DATA_16(val) (((val) >> 12) & 1) /* voodoo 2 only */
-#define FBIINIT5_VCLK_INPUT_SELECT(val) (((val) >> 13) & 1) /* voodoo 2 only */
-#define FBIINIT5_MULTI_CVG_DETECT(val) (((val) >> 14) & 1) /* voodoo 2 only */
-#define FBIINIT5_SYNC_RETRACE_READS(val) (((val) >> 15) & 1) /* voodoo 2 only */
-#define FBIINIT5_ENABLE_RHBORDER_COLOR(val) (((val) >> 16) & 1) /* voodoo 2 only */
-#define FBIINIT5_ENABLE_LHBORDER_COLOR(val) (((val) >> 17) & 1) /* voodoo 2 only */
-#define FBIINIT5_ENABLE_BVBORDER_COLOR(val) (((val) >> 18) & 1) /* voodoo 2 only */
-#define FBIINIT5_ENABLE_TVBORDER_COLOR(val) (((val) >> 19) & 1) /* voodoo 2 only */
-#define FBIINIT5_DOUBLE_HORIZ(val) (((val) >> 20) & 1) /* voodoo 2 only */
-#define FBIINIT5_DOUBLE_VERT(val) (((val) >> 21) & 1) /* voodoo 2 only */
-#define FBIINIT5_ENABLE_16BIT_GAMMA(val) (((val) >> 22) & 1) /* voodoo 2 only */
-#define FBIINIT5_INVERT_DAC_HSYNC(val) (((val) >> 23) & 1) /* voodoo 2 only */
-#define FBIINIT5_INVERT_DAC_VSYNC(val) (((val) >> 24) & 1) /* voodoo 2 only */
-#define FBIINIT5_ENABLE_24BIT_DACDATA(val) (((val) >> 25) & 1) /* voodoo 2 only */
-#define FBIINIT5_ENABLE_INTERLACING(val) (((val) >> 26) & 1) /* voodoo 2 only */
-#define FBIINIT5_DAC_DATA_18_CONTROL(val) (((val) >> 27) & 1) /* voodoo 2 only */
-#define FBIINIT5_RASTERIZER_UNIT_MODE(val) (((val) >> 30) & 3) /* voodoo 2 only */
-
-#define FBIINIT6_WINDOW_ACTIVE_COUNTER(val) (((val) >> 0) & 7) /* voodoo 2 only */
-#define FBIINIT6_WINDOW_DRAG_COUNTER(val) (((val) >> 3) & 0x1f) /* voodoo 2 only */
-#define FBIINIT6_SLI_SYNC_MASTER(val) (((val) >> 8) & 1) /* voodoo 2 only */
-#define FBIINIT6_DAC_DATA_22_OUTPUT(val) (((val) >> 9) & 3) /* voodoo 2 only */
-#define FBIINIT6_DAC_DATA_23_OUTPUT(val) (((val) >> 11) & 3) /* voodoo 2 only */
-#define FBIINIT6_SLI_SYNCIN_OUTPUT(val) (((val) >> 13) & 3) /* voodoo 2 only */
-#define FBIINIT6_SLI_SYNCOUT_OUTPUT(val) (((val) >> 15) & 3) /* voodoo 2 only */
-#define FBIINIT6_DAC_RD_OUTPUT(val) (((val) >> 17) & 3) /* voodoo 2 only */
-#define FBIINIT6_DAC_WR_OUTPUT(val) (((val) >> 19) & 3) /* voodoo 2 only */
-#define FBIINIT6_PCI_FIFO_LWM_RDY(val) (((val) >> 21) & 0x7f) /* voodoo 2 only */
-#define FBIINIT6_VGA_PASS_N_OUTPUT(val) (((val) >> 28) & 3) /* voodoo 2 only */
-#define FBIINIT6_X_VIDEO_TILES_BIT0(val) (((val) >> 30) & 1) /* voodoo 2 only */
-
-#define FBIINIT7_GENERIC_STRAPPING(val) (((val) >> 0) & 0xff) /* voodoo 2 only */
-#define FBIINIT7_CMDFIFO_ENABLE(val) (((val) >> 8) & 1) /* voodoo 2 only */
-#define FBIINIT7_CMDFIFO_MEMORY_STORE(val) (((val) >> 9) & 1) /* voodoo 2 only */
-#define FBIINIT7_DISABLE_CMDFIFO_HOLES(val) (((val) >> 10) & 1) /* voodoo 2 only */
-#define FBIINIT7_CMDFIFO_READ_THRESH(val) (((val) >> 11) & 0x1f) /* voodoo 2 only */
-#define FBIINIT7_SYNC_CMDFIFO_WRITES(val) (((val) >> 16) & 1) /* voodoo 2 only */
-#define FBIINIT7_SYNC_CMDFIFO_READS(val) (((val) >> 17) & 1) /* voodoo 2 only */
-#define FBIINIT7_RESET_PCI_PACKER(val) (((val) >> 18) & 1) /* voodoo 2 only */
-#define FBIINIT7_ENABLE_CHROMA_STUFF(val) (((val) >> 19) & 1) /* voodoo 2 only */
-#define FBIINIT7_CMDFIFO_PCI_TIMEOUT(val) (((val) >> 20) & 0x7f) /* voodoo 2 only */
-#define FBIINIT7_ENABLE_TEXTURE_BURST(val) (((val) >> 27) & 1) /* voodoo 2 only */
-
-#define TEXMODE_ENABLE_PERSPECTIVE(val) (((val) >> 0) & 1)
-#define TEXMODE_MINIFICATION_FILTER(val) (((val) >> 1) & 1)
-#define TEXMODE_MAGNIFICATION_FILTER(val) (((val) >> 2) & 1)
-#define TEXMODE_CLAMP_NEG_W(val) (((val) >> 3) & 1)
-#define TEXMODE_ENABLE_LOD_DITHER(val) (((val) >> 4) & 1)
-#define TEXMODE_NCC_TABLE_SELECT(val) (((val) >> 5) & 1)
-#define TEXMODE_CLAMP_S(val) (((val) >> 6) & 1)
-#define TEXMODE_CLAMP_T(val) (((val) >> 7) & 1)
-#define TEXMODE_FORMAT(val) (((val) >> 8) & 0xf)
-#define TEXMODE_TC_ZERO_OTHER(val) (((val) >> 12) & 1)
-#define TEXMODE_TC_SUB_CLOCAL(val) (((val) >> 13) & 1)
-#define TEXMODE_TC_MSELECT(val) (((val) >> 14) & 7)
-#define TEXMODE_TC_REVERSE_BLEND(val) (((val) >> 17) & 1)
-#define TEXMODE_TC_ADD_ACLOCAL(val) (((val) >> 18) & 3)
-#define TEXMODE_TC_INVERT_OUTPUT(val) (((val) >> 20) & 1)
-#define TEXMODE_TCA_ZERO_OTHER(val) (((val) >> 21) & 1)
-#define TEXMODE_TCA_SUB_CLOCAL(val) (((val) >> 22) & 1)
-#define TEXMODE_TCA_MSELECT(val) (((val) >> 23) & 7)
-#define TEXMODE_TCA_REVERSE_BLEND(val) (((val) >> 26) & 1)
-#define TEXMODE_TCA_ADD_ACLOCAL(val) (((val) >> 27) & 3)
-#define TEXMODE_TCA_INVERT_OUTPUT(val) (((val) >> 29) & 1)
-#define TEXMODE_TRILINEAR(val) (((val) >> 30) & 1)
-#define TEXMODE_SEQ_8_DOWNLD(val) (((val) >> 31) & 1)
-
-#define TEXLOD_LODMIN(val) (((val) >> 0) & 0x3f)
-#define TEXLOD_LODMAX(val) (((val) >> 6) & 0x3f)
-#define TEXLOD_LODBIAS(val) (((val) >> 12) & 0x3f)
-#define TEXLOD_LOD_ODD(val) (((val) >> 18) & 1)
-#define TEXLOD_LOD_TSPLIT(val) (((val) >> 19) & 1)
-#define TEXLOD_LOD_S_IS_WIDER(val) (((val) >> 20) & 1)
-#define TEXLOD_LOD_ASPECT(val) (((val) >> 21) & 3)
-#define TEXLOD_LOD_ZEROFRAC(val) (((val) >> 23) & 1)
-#define TEXLOD_TMULTIBASEADDR(val) (((val) >> 24) & 1)
-#define TEXLOD_TDATA_SWIZZLE(val) (((val) >> 25) & 1)
-#define TEXLOD_TDATA_SWAP(val) (((val) >> 26) & 1)
-#define TEXLOD_TDIRECT_WRITE(val) (((val) >> 27) & 1) /* Voodoo 2 only */
-
-#define TEXDETAIL_DETAIL_MAX(val) (((val) >> 0) & 0xff)
-#define TEXDETAIL_DETAIL_BIAS(val) (((val) >> 8) & 0x3f)
-#define TEXDETAIL_DETAIL_SCALE(val) (((val) >> 14) & 7)
-#define TEXDETAIL_RGB_MIN_FILTER(val) (((val) >> 17) & 1) /* Voodoo 2 only */
-#define TEXDETAIL_RGB_MAG_FILTER(val) (((val) >> 18) & 1) /* Voodoo 2 only */
-#define TEXDETAIL_ALPHA_MIN_FILTER(val) (((val) >> 19) & 1) /* Voodoo 2 only */
-#define TEXDETAIL_ALPHA_MAG_FILTER(val) (((val) >> 20) & 1) /* Voodoo 2 only */
-#define TEXDETAIL_SEPARATE_RGBA_FILTER(val) (((val) >> 21) & 1) /* Voodoo 2 only */
+#define FBIINIT2_SWAP_BUFFER_ALGORITHM(val) (((val) >> 9) & 3)
+#define FBIINIT2_VIDEO_BUFFER_OFFSET(val) (((val) >> 11) & 0x1ff)
+#define FBIINIT2_ENABLE_DRAM_BANKING(val) (((val) >> 20) & 1)
+#define FBIINIT2_ENABLE_DRAM_READ_FIFO(val) (((val) >> 21) & 1)
+#define FBIINIT2_ENABLE_DRAM_REFRESH(val) (((val) >> 22) & 1)
+#define FBIINIT2_REFRESH_LOAD_VALUE(val) (((val) >> 23) & 0x1ff)
+
+#define FBIINIT3_TRI_REGISTER_REMAP(val) (((val) >> 0) & 1)
+#define FBIINIT3_VIDEO_FIFO_THRESH(val) (((val) >> 1) & 0x1f)
+#define FBIINIT3_DISABLE_TMUS(val) (((val) >> 6) & 1)
+#define FBIINIT3_FBI_MEMORY_TYPE(val) (((val) >> 8) & 7)
+#define FBIINIT3_VGA_PASS_RESET_VAL(val) (((val) >> 11) & 1)
+#define FBIINIT3_HARDCODE_PCI_BASE(val) (((val) >> 12) & 1)
+#define FBIINIT3_FBI2TREX_DELAY(val) (((val) >> 13) & 0xf)
+#define FBIINIT3_TREX2FBI_DELAY(val) (((val) >> 17) & 0x1f)
+#define FBIINIT3_YORIGIN_SUBTRACT(val) (((val) >> 22) & 0x3ff)
+
+#define FBIINIT4_PCI_READ_WAITS(val) (((val) >> 0) & 1)
+#define FBIINIT4_ENABLE_LFB_READAHEAD(val) (((val) >> 1) & 1)
+#define FBIINIT4_MEMORY_FIFO_LWM(val) (((val) >> 2) & 0x3f)
+#define FBIINIT4_MEMORY_FIFO_START_ROW(val) (((val) >> 8) & 0x3ff)
+#define FBIINIT4_MEMORY_FIFO_STOP_ROW(val) (((val) >> 18) & 0x3ff)
+#define FBIINIT4_VIDEO_CLOCKING_DELAY(val) (((val) >> 29) & 7) /* voodoo 2 only */
+
+#define FBIINIT5_DISABLE_PCI_STOP(val) (((val) >> 0) & 1) /* voodoo 2 only */
+#define FBIINIT5_PCI_SLAVE_SPEED(val) (((val) >> 1) & 1) /* voodoo 2 only */
+#define FBIINIT5_DAC_DATA_OUTPUT_WIDTH(val) (((val) >> 2) & 1) /* voodoo 2 only */
+#define FBIINIT5_DAC_DATA_17_OUTPUT(val) (((val) >> 3) & 1) /* voodoo 2 only */
+#define FBIINIT5_DAC_DATA_18_OUTPUT(val) (((val) >> 4) & 1) /* voodoo 2 only */
+#define FBIINIT5_GENERIC_STRAPPING(val) (((val) >> 5) & 0xf) /* voodoo 2 only */
+#define FBIINIT5_BUFFER_ALLOCATION(val) (((val) >> 9) & 3) /* voodoo 2 only */
+#define FBIINIT5_DRIVE_VID_CLK_SLAVE(val) (((val) >> 11) & 1) /* voodoo 2 only */
+#define FBIINIT5_DRIVE_DAC_DATA_16(val) (((val) >> 12) & 1) /* voodoo 2 only */
+#define FBIINIT5_VCLK_INPUT_SELECT(val) (((val) >> 13) & 1) /* voodoo 2 only */
+#define FBIINIT5_MULTI_CVG_DETECT(val) (((val) >> 14) & 1) /* voodoo 2 only */
+#define FBIINIT5_SYNC_RETRACE_READS(val) (((val) >> 15) & 1) /* voodoo 2 only */
+#define FBIINIT5_ENABLE_RHBORDER_COLOR(val) (((val) >> 16) & 1) /* voodoo 2 only */
+#define FBIINIT5_ENABLE_LHBORDER_COLOR(val) (((val) >> 17) & 1) /* voodoo 2 only */
+#define FBIINIT5_ENABLE_BVBORDER_COLOR(val) (((val) >> 18) & 1) /* voodoo 2 only */
+#define FBIINIT5_ENABLE_TVBORDER_COLOR(val) (((val) >> 19) & 1) /* voodoo 2 only */
+#define FBIINIT5_DOUBLE_HORIZ(val) (((val) >> 20) & 1) /* voodoo 2 only */
+#define FBIINIT5_DOUBLE_VERT(val) (((val) >> 21) & 1) /* voodoo 2 only */
+#define FBIINIT5_ENABLE_16BIT_GAMMA(val) (((val) >> 22) & 1) /* voodoo 2 only */
+#define FBIINIT5_INVERT_DAC_HSYNC(val) (((val) >> 23) & 1) /* voodoo 2 only */
+#define FBIINIT5_INVERT_DAC_VSYNC(val) (((val) >> 24) & 1) /* voodoo 2 only */
+#define FBIINIT5_ENABLE_24BIT_DACDATA(val) (((val) >> 25) & 1) /* voodoo 2 only */
+#define FBIINIT5_ENABLE_INTERLACING(val) (((val) >> 26) & 1) /* voodoo 2 only */
+#define FBIINIT5_DAC_DATA_18_CONTROL(val) (((val) >> 27) & 1) /* voodoo 2 only */
+#define FBIINIT5_RASTERIZER_UNIT_MODE(val) (((val) >> 30) & 3) /* voodoo 2 only */
+
+#define FBIINIT6_WINDOW_ACTIVE_COUNTER(val) (((val) >> 0) & 7) /* voodoo 2 only */
+#define FBIINIT6_WINDOW_DRAG_COUNTER(val) (((val) >> 3) & 0x1f) /* voodoo 2 only */
+#define FBIINIT6_SLI_SYNC_MASTER(val) (((val) >> 8) & 1) /* voodoo 2 only */
+#define FBIINIT6_DAC_DATA_22_OUTPUT(val) (((val) >> 9) & 3) /* voodoo 2 only */
+#define FBIINIT6_DAC_DATA_23_OUTPUT(val) (((val) >> 11) & 3) /* voodoo 2 only */
+#define FBIINIT6_SLI_SYNCIN_OUTPUT(val) (((val) >> 13) & 3) /* voodoo 2 only */
+#define FBIINIT6_SLI_SYNCOUT_OUTPUT(val) (((val) >> 15) & 3) /* voodoo 2 only */
+#define FBIINIT6_DAC_RD_OUTPUT(val) (((val) >> 17) & 3) /* voodoo 2 only */
+#define FBIINIT6_DAC_WR_OUTPUT(val) (((val) >> 19) & 3) /* voodoo 2 only */
+#define FBIINIT6_PCI_FIFO_LWM_RDY(val) (((val) >> 21) & 0x7f) /* voodoo 2 only */
+#define FBIINIT6_VGA_PASS_N_OUTPUT(val) (((val) >> 28) & 3) /* voodoo 2 only */
+#define FBIINIT6_X_VIDEO_TILES_BIT0(val) (((val) >> 30) & 1) /* voodoo 2 only */
+
+#define FBIINIT7_GENERIC_STRAPPING(val) (((val) >> 0) & 0xff) /* voodoo 2 only */
+#define FBIINIT7_CMDFIFO_ENABLE(val) (((val) >> 8) & 1) /* voodoo 2 only */
+#define FBIINIT7_CMDFIFO_MEMORY_STORE(val) (((val) >> 9) & 1) /* voodoo 2 only */
+#define FBIINIT7_DISABLE_CMDFIFO_HOLES(val) (((val) >> 10) & 1) /* voodoo 2 only */
+#define FBIINIT7_CMDFIFO_READ_THRESH(val) (((val) >> 11) & 0x1f) /* voodoo 2 only */
+#define FBIINIT7_SYNC_CMDFIFO_WRITES(val) (((val) >> 16) & 1) /* voodoo 2 only */
+#define FBIINIT7_SYNC_CMDFIFO_READS(val) (((val) >> 17) & 1) /* voodoo 2 only */
+#define FBIINIT7_RESET_PCI_PACKER(val) (((val) >> 18) & 1) /* voodoo 2 only */
+#define FBIINIT7_ENABLE_CHROMA_STUFF(val) (((val) >> 19) & 1) /* voodoo 2 only */
+#define FBIINIT7_CMDFIFO_PCI_TIMEOUT(val) (((val) >> 20) & 0x7f) /* voodoo 2 only */
+#define FBIINIT7_ENABLE_TEXTURE_BURST(val) (((val) >> 27) & 1) /* voodoo 2 only */
+
+#define TEXMODE_ENABLE_PERSPECTIVE(val) (((val) >> 0) & 1)
+#define TEXMODE_MINIFICATION_FILTER(val) (((val) >> 1) & 1)
+#define TEXMODE_MAGNIFICATION_FILTER(val) (((val) >> 2) & 1)
+#define TEXMODE_CLAMP_NEG_W(val) (((val) >> 3) & 1)
+#define TEXMODE_ENABLE_LOD_DITHER(val) (((val) >> 4) & 1)
+#define TEXMODE_NCC_TABLE_SELECT(val) (((val) >> 5) & 1)
+#define TEXMODE_CLAMP_S(val) (((val) >> 6) & 1)
+#define TEXMODE_CLAMP_T(val) (((val) >> 7) & 1)
+#define TEXMODE_FORMAT(val) (((val) >> 8) & 0xf)
+#define TEXMODE_TC_ZERO_OTHER(val) (((val) >> 12) & 1)
+#define TEXMODE_TC_SUB_CLOCAL(val) (((val) >> 13) & 1)
+#define TEXMODE_TC_MSELECT(val) (((val) >> 14) & 7)
+#define TEXMODE_TC_REVERSE_BLEND(val) (((val) >> 17) & 1)
+#define TEXMODE_TC_ADD_ACLOCAL(val) (((val) >> 18) & 3)
+#define TEXMODE_TC_INVERT_OUTPUT(val) (((val) >> 20) & 1)
+#define TEXMODE_TCA_ZERO_OTHER(val) (((val) >> 21) & 1)
+#define TEXMODE_TCA_SUB_CLOCAL(val) (((val) >> 22) & 1)
+#define TEXMODE_TCA_MSELECT(val) (((val) >> 23) & 7)
+#define TEXMODE_TCA_REVERSE_BLEND(val) (((val) >> 26) & 1)
+#define TEXMODE_TCA_ADD_ACLOCAL(val) (((val) >> 27) & 3)
+#define TEXMODE_TCA_INVERT_OUTPUT(val) (((val) >> 29) & 1)
+#define TEXMODE_TRILINEAR(val) (((val) >> 30) & 1)
+#define TEXMODE_SEQ_8_DOWNLD(val) (((val) >> 31) & 1)
+
+#define TEXLOD_LODMIN(val) (((val) >> 0) & 0x3f)
+#define TEXLOD_LODMAX(val) (((val) >> 6) & 0x3f)
+#define TEXLOD_LODBIAS(val) (((val) >> 12) & 0x3f)
+#define TEXLOD_LOD_ODD(val) (((val) >> 18) & 1)
+#define TEXLOD_LOD_TSPLIT(val) (((val) >> 19) & 1)
+#define TEXLOD_LOD_S_IS_WIDER(val) (((val) >> 20) & 1)
+#define TEXLOD_LOD_ASPECT(val) (((val) >> 21) & 3)
+#define TEXLOD_LOD_ZEROFRAC(val) (((val) >> 23) & 1)
+#define TEXLOD_TMULTIBASEADDR(val) (((val) >> 24) & 1)
+#define TEXLOD_TDATA_SWIZZLE(val) (((val) >> 25) & 1)
+#define TEXLOD_TDATA_SWAP(val) (((val) >> 26) & 1)
+#define TEXLOD_TDIRECT_WRITE(val) (((val) >> 27) & 1) /* Voodoo 2 only */
+
+#define TEXDETAIL_DETAIL_MAX(val) (((val) >> 0) & 0xff)
+#define TEXDETAIL_DETAIL_BIAS(val) (((val) >> 8) & 0x3f)
+#define TEXDETAIL_DETAIL_SCALE(val) (((val) >> 14) & 7)
+#define TEXDETAIL_RGB_MIN_FILTER(val) (((val) >> 17) & 1) /* Voodoo 2 only */
+#define TEXDETAIL_RGB_MAG_FILTER(val) (((val) >> 18) & 1) /* Voodoo 2 only */
+#define TEXDETAIL_ALPHA_MIN_FILTER(val) (((val) >> 19) & 1) /* Voodoo 2 only */
+#define TEXDETAIL_ALPHA_MAG_FILTER(val) (((val) >> 20) & 1) /* Voodoo 2 only */
+#define TEXDETAIL_SEPARATE_RGBA_FILTER(val) (((val) >> 21) & 1) /* Voodoo 2 only */
@@ -1400,19 +1400,19 @@ struct poly_extra_data;
struct rgba
{
#ifdef LSB_FIRST
- UINT8 b, g, r, a;
+ UINT8 b, g, r, a;
#else
- UINT8 a, r, g, b;
+ UINT8 a, r, g, b;
#endif
};
union voodoo_reg
{
- INT32 i;
- UINT32 u;
- float f;
- rgba rgb;
+ INT32 i;
+ UINT32 u;
+ float f;
+ rgba rgb;
};
@@ -1421,350 +1421,350 @@ typedef voodoo_reg rgb_union;
struct voodoo_stats
{
- UINT8 lastkey; /* last key state */
- UINT8 display; /* display stats? */
- INT32 swaps; /* total swaps */
- INT32 stalls; /* total stalls */
- INT32 total_triangles; /* total triangles */
- INT32 total_pixels_in; /* total pixels in */
- INT32 total_pixels_out; /* total pixels out */
- INT32 total_chroma_fail; /* total chroma fail */
- INT32 total_zfunc_fail; /* total z func fail */
- INT32 total_afunc_fail; /* total a func fail */
- INT32 total_clipped; /* total clipped */
- INT32 total_stippled; /* total stippled */
- INT32 lfb_writes; /* LFB writes */
- INT32 lfb_reads; /* LFB reads */
- INT32 reg_writes; /* register writes */
- INT32 reg_reads; /* register reads */
- INT32 tex_writes; /* texture writes */
- INT32 texture_mode[16]; /* 16 different texture modes */
- UINT8 render_override; /* render override */
- char buffer[1024]; /* string */
+ UINT8 lastkey; /* last key state */
+ UINT8 display; /* display stats? */
+ INT32 swaps; /* total swaps */
+ INT32 stalls; /* total stalls */
+ INT32 total_triangles; /* total triangles */
+ INT32 total_pixels_in; /* total pixels in */
+ INT32 total_pixels_out; /* total pixels out */
+ INT32 total_chroma_fail; /* total chroma fail */
+ INT32 total_zfunc_fail; /* total z func fail */
+ INT32 total_afunc_fail; /* total a func fail */
+ INT32 total_clipped; /* total clipped */
+ INT32 total_stippled; /* total stippled */
+ INT32 lfb_writes; /* LFB writes */
+ INT32 lfb_reads; /* LFB reads */
+ INT32 reg_writes; /* register writes */
+ INT32 reg_reads; /* register reads */
+ INT32 tex_writes; /* texture writes */
+ INT32 texture_mode[16]; /* 16 different texture modes */
+ UINT8 render_override; /* render override */
+ char buffer[1024]; /* string */
};
/* note that this structure is an even 64 bytes long */
struct stats_block
{
- INT32 pixels_in; /* pixels in statistic */
- INT32 pixels_out; /* pixels out statistic */
- INT32 chroma_fail; /* chroma test fail statistic */
- INT32 zfunc_fail; /* z function test fail statistic */
- INT32 afunc_fail; /* alpha function test fail statistic */
- INT32 clip_fail; /* clipping fail statistic */
- INT32 stipple_count; /* stipple statistic */
- INT32 filler[64/4 - 7]; /* pad this structure to 64 bytes */
+ INT32 pixels_in; /* pixels in statistic */
+ INT32 pixels_out; /* pixels out statistic */
+ INT32 chroma_fail; /* chroma test fail statistic */
+ INT32 zfunc_fail; /* z function test fail statistic */
+ INT32 afunc_fail; /* alpha function test fail statistic */
+ INT32 clip_fail; /* clipping fail statistic */
+ INT32 stipple_count; /* stipple statistic */
+ INT32 filler[64/4 - 7]; /* pad this structure to 64 bytes */
};
struct fifo_state
{
- UINT32 * base; /* base of the FIFO */
- INT32 size; /* size of the FIFO */
- INT32 in; /* input pointer */
- INT32 out; /* output pointer */
+ UINT32 * base; /* base of the FIFO */
+ INT32 size; /* size of the FIFO */
+ INT32 in; /* input pointer */
+ INT32 out; /* output pointer */
};
struct cmdfifo_info
{
- UINT8 enable; /* enabled? */
- UINT8 count_holes; /* count holes? */
- UINT32 base; /* base address in framebuffer RAM */
- UINT32 end; /* end address in framebuffer RAM */
- UINT32 rdptr; /* current read pointer */
- UINT32 amin; /* minimum address */
- UINT32 amax; /* maximum address */
- UINT32 depth; /* current depth */
- UINT32 holes; /* number of holes */
+ UINT8 enable; /* enabled? */
+ UINT8 count_holes; /* count holes? */
+ UINT32 base; /* base address in framebuffer RAM */
+ UINT32 end; /* end address in framebuffer RAM */
+ UINT32 rdptr; /* current read pointer */
+ UINT32 amin; /* minimum address */
+ UINT32 amax; /* maximum address */
+ UINT32 depth; /* current depth */
+ UINT32 holes; /* number of holes */
};
struct pci_state
{
- fifo_state fifo; /* PCI FIFO */
- UINT32 init_enable; /* initEnable value */
- UINT8 stall_state; /* state of the system if we're stalled */
- voodoo_stall_func stall_callback; /* callback for stalling/unstalling */
- UINT8 op_pending; /* true if an operation is pending */
- attotime op_end_time; /* time when the pending operation ends */
- emu_timer * continue_timer; /* timer to use to continue processing */
- UINT32 fifo_mem[64*2]; /* memory backing the PCI FIFO */
+ fifo_state fifo; /* PCI FIFO */
+ UINT32 init_enable; /* initEnable value */
+ UINT8 stall_state; /* state of the system if we're stalled */
+ voodoo_stall_func stall_callback; /* callback for stalling/unstalling */
+ UINT8 op_pending; /* true if an operation is pending */
+ attotime op_end_time; /* time when the pending operation ends */
+ emu_timer * continue_timer; /* timer to use to continue processing */
+ UINT32 fifo_mem[64*2]; /* memory backing the PCI FIFO */
};
struct ncc_table
{
- UINT8 dirty; /* is the texel lookup dirty? */
- voodoo_reg * reg; /* pointer to our registers */
- INT32 ir[4], ig[4], ib[4]; /* I values for R,G,B */
- INT32 qr[4], qg[4], qb[4]; /* Q values for R,G,B */
- INT32 y[16]; /* Y values */
- rgb_t * palette; /* pointer to associated RGB palette */
- rgb_t * palettea; /* pointer to associated ARGB palette */
- rgb_t texel[256]; /* texel lookup */
+ UINT8 dirty; /* is the texel lookup dirty? */
+ voodoo_reg * reg; /* pointer to our registers */
+ INT32 ir[4], ig[4], ib[4]; /* I values for R,G,B */
+ INT32 qr[4], qg[4], qb[4]; /* Q values for R,G,B */
+ INT32 y[16]; /* Y values */
+ rgb_t * palette; /* pointer to associated RGB palette */
+ rgb_t * palettea; /* pointer to associated ARGB palette */
+ rgb_t texel[256]; /* texel lookup */
};
struct tmu_state
{
- UINT8 * ram; /* pointer to our RAM */
- UINT32 mask; /* mask to apply to pointers */
- voodoo_reg * reg; /* pointer to our register base */
- UINT32 regdirty; /* true if the LOD/mode/base registers have changed */
+ UINT8 * ram; /* pointer to our RAM */
+ UINT32 mask; /* mask to apply to pointers */
+ voodoo_reg * reg; /* pointer to our register base */
+ UINT32 regdirty; /* true if the LOD/mode/base registers have changed */
- UINT32 texaddr_mask; /* mask for texture address */
- UINT8 texaddr_shift; /* shift for texture address */
+ UINT32 texaddr_mask; /* mask for texture address */
+ UINT8 texaddr_shift; /* shift for texture address */
- INT64 starts, startt; /* starting S,T (14.18) */
- INT64 startw; /* starting W (2.30) */
- INT64 dsdx, dtdx; /* delta S,T per X */
- INT64 dwdx; /* delta W per X */
- INT64 dsdy, dtdy; /* delta S,T per Y */
- INT64 dwdy; /* delta W per Y */
+ INT64 starts, startt; /* starting S,T (14.18) */
+ INT64 startw; /* starting W (2.30) */
+ INT64 dsdx, dtdx; /* delta S,T per X */
+ INT64 dwdx; /* delta W per X */
+ INT64 dsdy, dtdy; /* delta S,T per Y */
+ INT64 dwdy; /* delta W per Y */
- INT32 lodmin, lodmax; /* min, max LOD values */
- INT32 lodbias; /* LOD bias */
- UINT32 lodmask; /* mask of available LODs */
- UINT32 lodoffset[9]; /* offset of texture base for each LOD */
- INT32 detailmax; /* detail clamp */
- INT32 detailbias; /* detail bias */
- UINT8 detailscale; /* detail scale */
+ INT32 lodmin, lodmax; /* min, max LOD values */
+ INT32 lodbias; /* LOD bias */
+ UINT32 lodmask; /* mask of available LODs */
+ UINT32 lodoffset[9]; /* offset of texture base for each LOD */
+ INT32 detailmax; /* detail clamp */
+ INT32 detailbias; /* detail bias */
+ UINT8 detailscale; /* detail scale */
- UINT32 wmask; /* mask for the current texture width */
- UINT32 hmask; /* mask for the current texture height */
+ UINT32 wmask; /* mask for the current texture width */
+ UINT32 hmask; /* mask for the current texture height */
- UINT32 bilinear_mask; /* mask for bilinear resolution (0xf0 for V1, 0xff for V2) */
+ UINT32 bilinear_mask; /* mask for bilinear resolution (0xf0 for V1, 0xff for V2) */
- ncc_table ncc[2]; /* two NCC tables */
+ ncc_table ncc[2]; /* two NCC tables */
- rgb_t * lookup; /* currently selected lookup */
- rgb_t * texel[16]; /* texel lookups for each format */
+ rgb_t * lookup; /* currently selected lookup */
+ rgb_t * texel[16]; /* texel lookups for each format */
- rgb_t palette[256]; /* palette lookup table */
- rgb_t palettea[256]; /* palette+alpha lookup table */
+ rgb_t palette[256]; /* palette lookup table */
+ rgb_t palettea[256]; /* palette+alpha lookup table */
};
struct tmu_shared_state
{
- rgb_t rgb332[256]; /* RGB 3-3-2 lookup table */
- rgb_t alpha8[256]; /* alpha 8-bit lookup table */
- rgb_t int8[256]; /* intensity 8-bit lookup table */
- rgb_t ai44[256]; /* alpha, intensity 4-4 lookup table */
-
- rgb_t rgb565[65536]; /* RGB 5-6-5 lookup table */
- rgb_t argb1555[65536]; /* ARGB 1-5-5-5 lookup table */
- rgb_t argb4444[65536]; /* ARGB 4-4-4-4 lookup table */
+ rgb_t rgb332[256]; /* RGB 3-3-2 lookup table */
+ rgb_t alpha8[256]; /* alpha 8-bit lookup table */
+ rgb_t int8[256]; /* intensity 8-bit lookup table */
+ rgb_t ai44[256]; /* alpha, intensity 4-4 lookup table */
+
+ rgb_t rgb565[65536]; /* RGB 5-6-5 lookup table */
+ rgb_t argb1555[65536]; /* ARGB 1-5-5-5 lookup table */
+ rgb_t argb4444[65536]; /* ARGB 4-4-4-4 lookup table */
};
struct setup_vertex
{
- float x, y; /* X, Y coordinates */
- float a, r, g, b; /* A, R, G, B values */
- float z, wb; /* Z and broadcast W values */
- float w0, s0, t0; /* W, S, T for TMU 0 */
- float w1, s1, t1; /* W, S, T for TMU 1 */
+ float x, y; /* X, Y coordinates */
+ float a, r, g, b; /* A, R, G, B values */
+ float z, wb; /* Z and broadcast W values */
+ float w0, s0, t0; /* W, S, T for TMU 0 */
+ float w1, s1, t1; /* W, S, T for TMU 1 */
};
struct fbi_state
{
- UINT8 * ram; /* pointer to frame buffer RAM */
- UINT32 mask; /* mask to apply to pointers */
- UINT32 rgboffs[3]; /* word offset to 3 RGB buffers */
- UINT32 auxoffs; /* word offset to 1 aux buffer */
-
- UINT8 frontbuf; /* front buffer index */
- UINT8 backbuf; /* back buffer index */
- UINT8 swaps_pending; /* number of pending swaps */
- UINT8 video_changed; /* did the frontbuffer video change? */
-
- UINT32 yorigin; /* Y origin subtract value */
- UINT32 lfb_base; /* base of LFB in memory */
- UINT8 lfb_stride; /* stride of LFB accesses in bits */
-
- UINT32 width; /* width of current frame buffer */
- UINT32 height; /* height of current frame buffer */
- UINT32 xoffs; /* horizontal offset (back porch) */
- UINT32 yoffs; /* vertical offset (back porch) */
- UINT32 vsyncscan; /* vertical sync scanline */
- UINT32 rowpixels; /* pixels per row */
- UINT32 tile_width; /* width of video tiles */
- UINT32 tile_height; /* height of video tiles */
- UINT32 x_tiles; /* number of tiles in the X direction */
-
- emu_timer * vblank_timer; /* VBLANK timer */
- UINT8 vblank; /* VBLANK state */
- UINT8 vblank_count; /* number of VBLANKs since last swap */
- UINT8 vblank_swap_pending; /* a swap is pending, waiting for a vblank */
- UINT8 vblank_swap; /* swap when we hit this count */
- UINT8 vblank_dont_swap; /* don't actually swap when we hit this point */
- voodoo_vblank_func vblank_client; /* client callback */
+ UINT8 * ram; /* pointer to frame buffer RAM */
+ UINT32 mask; /* mask to apply to pointers */
+ UINT32 rgboffs[3]; /* word offset to 3 RGB buffers */
+ UINT32 auxoffs; /* word offset to 1 aux buffer */
+
+ UINT8 frontbuf; /* front buffer index */
+ UINT8 backbuf; /* back buffer index */
+ UINT8 swaps_pending; /* number of pending swaps */
+ UINT8 video_changed; /* did the frontbuffer video change? */
+
+ UINT32 yorigin; /* Y origin subtract value */
+ UINT32 lfb_base; /* base of LFB in memory */
+ UINT8 lfb_stride; /* stride of LFB accesses in bits */
+
+ UINT32 width; /* width of current frame buffer */
+ UINT32 height; /* height of current frame buffer */
+ UINT32 xoffs; /* horizontal offset (back porch) */
+ UINT32 yoffs; /* vertical offset (back porch) */
+ UINT32 vsyncscan; /* vertical sync scanline */
+ UINT32 rowpixels; /* pixels per row */
+ UINT32 tile_width; /* width of video tiles */
+ UINT32 tile_height; /* height of video tiles */
+ UINT32 x_tiles; /* number of tiles in the X direction */
+
+ emu_timer * vblank_timer; /* VBLANK timer */
+ UINT8 vblank; /* VBLANK state */
+ UINT8 vblank_count; /* number of VBLANKs since last swap */
+ UINT8 vblank_swap_pending; /* a swap is pending, waiting for a vblank */
+ UINT8 vblank_swap; /* swap when we hit this count */
+ UINT8 vblank_dont_swap; /* don't actually swap when we hit this point */
+ voodoo_vblank_func vblank_client; /* client callback */
/* triangle setup info */
- UINT8 cheating_allowed; /* allow cheating? */
- INT32 sign; /* triangle sign */
- INT16 ax, ay; /* vertex A x,y (12.4) */
- INT16 bx, by; /* vertex B x,y (12.4) */
- INT16 cx, cy; /* vertex C x,y (12.4) */
- INT32 startr, startg, startb, starta; /* starting R,G,B,A (12.12) */
- INT32 startz; /* starting Z (20.12) */
- INT64 startw; /* starting W (16.32) */
- INT32 drdx, dgdx, dbdx, dadx; /* delta R,G,B,A per X */
- INT32 dzdx; /* delta Z per X */
- INT64 dwdx; /* delta W per X */
- INT32 drdy, dgdy, dbdy, dady; /* delta R,G,B,A per Y */
- INT32 dzdy; /* delta Z per Y */
- INT64 dwdy; /* delta W per Y */
-
- stats_block lfb_stats; /* LFB-access statistics */
-
- UINT8 sverts; /* number of vertices ready */
- setup_vertex svert[3]; /* 3 setup vertices */
-
- fifo_state fifo; /* framebuffer memory fifo */
- cmdfifo_info cmdfifo[2]; /* command FIFOs */
-
- UINT8 fogblend[64]; /* 64-entry fog table */
- UINT8 fogdelta[64]; /* 64-entry fog table */
- UINT8 fogdelta_mask; /* mask for for delta (0xff for V1, 0xfc for V2) */
-
- rgb_t pen[65536]; /* mapping from pixels to pens */
- rgb_t clut[512]; /* clut gamma data */
- UINT8 clut_dirty; /* do we need to recompute? */
+ UINT8 cheating_allowed; /* allow cheating? */
+ INT32 sign; /* triangle sign */
+ INT16 ax, ay; /* vertex A x,y (12.4) */
+ INT16 bx, by; /* vertex B x,y (12.4) */
+ INT16 cx, cy; /* vertex C x,y (12.4) */
+ INT32 startr, startg, startb, starta; /* starting R,G,B,A (12.12) */
+ INT32 startz; /* starting Z (20.12) */
+ INT64 startw; /* starting W (16.32) */
+ INT32 drdx, dgdx, dbdx, dadx; /* delta R,G,B,A per X */
+ INT32 dzdx; /* delta Z per X */
+ INT64 dwdx; /* delta W per X */
+ INT32 drdy, dgdy, dbdy, dady; /* delta R,G,B,A per Y */
+ INT32 dzdy; /* delta Z per Y */
+ INT64 dwdy; /* delta W per Y */
+
+ stats_block lfb_stats; /* LFB-access statistics */
+
+ UINT8 sverts; /* number of vertices ready */
+ setup_vertex svert[3]; /* 3 setup vertices */
+
+ fifo_state fifo; /* framebuffer memory fifo */
+ cmdfifo_info cmdfifo[2]; /* command FIFOs */
+
+ UINT8 fogblend[64]; /* 64-entry fog table */
+ UINT8 fogdelta[64]; /* 64-entry fog table */
+ UINT8 fogdelta_mask; /* mask for for delta (0xff for V1, 0xfc for V2) */
+
+ rgb_t pen[65536]; /* mapping from pixels to pens */
+ rgb_t clut[512]; /* clut gamma data */
+ UINT8 clut_dirty; /* do we need to recompute? */
};
struct dac_state
{
- UINT8 reg[8]; /* 8 registers */
- UINT8 read_result; /* pending read result */
+ UINT8 reg[8]; /* 8 registers */
+ UINT8 read_result; /* pending read result */
};
struct raster_info
{
- raster_info * next; /* pointer to next entry with the same hash */
- poly_draw_scanline_func callback; /* callback pointer */
- UINT8 is_generic; /* TRUE if this is one of the generic rasterizers */
- UINT8 display; /* display index */
- UINT32 hits; /* how many hits (pixels) we've used this for */
- UINT32 polys; /* how many polys we've used this for */
- UINT32 eff_color_path; /* effective fbzColorPath value */
- UINT32 eff_alpha_mode; /* effective alphaMode value */
- UINT32 eff_fog_mode; /* effective fogMode value */
- UINT32 eff_fbz_mode; /* effective fbzMode value */
- UINT32 eff_tex_mode_0; /* effective textureMode value for TMU #0 */
- UINT32 eff_tex_mode_1; /* effective textureMode value for TMU #1 */
+ raster_info * next; /* pointer to next entry with the same hash */
+ poly_draw_scanline_func callback; /* callback pointer */
+ UINT8 is_generic; /* TRUE if this is one of the generic rasterizers */
+ UINT8 display; /* display index */
+ UINT32 hits; /* how many hits (pixels) we've used this for */
+ UINT32 polys; /* how many polys we've used this for */
+ UINT32 eff_color_path; /* effective fbzColorPath value */
+ UINT32 eff_alpha_mode; /* effective alphaMode value */
+ UINT32 eff_fog_mode; /* effective fogMode value */
+ UINT32 eff_fbz_mode; /* effective fbzMode value */
+ UINT32 eff_tex_mode_0; /* effective textureMode value for TMU #0 */
+ UINT32 eff_tex_mode_1; /* effective textureMode value for TMU #1 */
};
struct poly_extra_data
{
- voodoo_state * state; /* pointer back to the voodoo state */
- raster_info * info; /* pointer to rasterizer information */
-
- INT16 ax, ay; /* vertex A x,y (12.4) */
- INT32 startr, startg, startb, starta; /* starting R,G,B,A (12.12) */
- INT32 startz; /* starting Z (20.12) */
- INT64 startw; /* starting W (16.32) */
- INT32 drdx, dgdx, dbdx, dadx; /* delta R,G,B,A per X */
- INT32 dzdx; /* delta Z per X */
- INT64 dwdx; /* delta W per X */
- INT32 drdy, dgdy, dbdy, dady; /* delta R,G,B,A per Y */
- INT32 dzdy; /* delta Z per Y */
- INT64 dwdy; /* delta W per Y */
-
- INT64 starts0, startt0; /* starting S,T (14.18) */
- INT64 startw0; /* starting W (2.30) */
- INT64 ds0dx, dt0dx; /* delta S,T per X */
- INT64 dw0dx; /* delta W per X */
- INT64 ds0dy, dt0dy; /* delta S,T per Y */
- INT64 dw0dy; /* delta W per Y */
- INT32 lodbase0; /* used during rasterization */
-
- INT64 starts1, startt1; /* starting S,T (14.18) */
- INT64 startw1; /* starting W (2.30) */
- INT64 ds1dx, dt1dx; /* delta S,T per X */
- INT64 dw1dx; /* delta W per X */
- INT64 ds1dy, dt1dy; /* delta S,T per Y */
- INT64 dw1dy; /* delta W per Y */
- INT32 lodbase1; /* used during rasterization */
-
- UINT16 dither[16]; /* dither matrix, for fastfill */
+ voodoo_state * state; /* pointer back to the voodoo state */
+ raster_info * info; /* pointer to rasterizer information */
+
+ INT16 ax, ay; /* vertex A x,y (12.4) */
+ INT32 startr, startg, startb, starta; /* starting R,G,B,A (12.12) */
+ INT32 startz; /* starting Z (20.12) */
+ INT64 startw; /* starting W (16.32) */
+ INT32 drdx, dgdx, dbdx, dadx; /* delta R,G,B,A per X */
+ INT32 dzdx; /* delta Z per X */
+ INT64 dwdx; /* delta W per X */
+ INT32 drdy, dgdy, dbdy, dady; /* delta R,G,B,A per Y */
+ INT32 dzdy; /* delta Z per Y */
+ INT64 dwdy; /* delta W per Y */
+
+ INT64 starts0, startt0; /* starting S,T (14.18) */
+ INT64 startw0; /* starting W (2.30) */
+ INT64 ds0dx, dt0dx; /* delta S,T per X */
+ INT64 dw0dx; /* delta W per X */
+ INT64 ds0dy, dt0dy; /* delta S,T per Y */
+ INT64 dw0dy; /* delta W per Y */
+ INT32 lodbase0; /* used during rasterization */
+
+ INT64 starts1, startt1; /* starting S,T (14.18) */
+ INT64 startw1; /* starting W (2.30) */
+ INT64 ds1dx, dt1dx; /* delta S,T per X */
+ INT64 dw1dx; /* delta W per X */
+ INT64 ds1dy, dt1dy; /* delta S,T per Y */
+ INT64 dw1dy; /* delta W per Y */
+ INT32 lodbase1; /* used during rasterization */
+
+ UINT16 dither[16]; /* dither matrix, for fastfill */
};
struct banshee_info
{
- UINT32 io[0x40]; /* I/O registers */
- UINT32 agp[0x80]; /* AGP registers */
- UINT8 vga[0x20]; /* VGA registers */
- UINT8 crtc[0x27]; /* VGA CRTC registers */
- UINT8 seq[0x05]; /* VGA sequencer registers */
- UINT8 gc[0x05]; /* VGA graphics controller registers */
- UINT8 att[0x15]; /* VGA attribute registers */
- UINT8 attff; /* VGA attribute flip-flop */
-
- UINT32 blt_regs[0x20]; /* 2D Blitter registers */
- UINT32 blt_dst_base;
- UINT32 blt_dst_x;
- UINT32 blt_dst_y;
- UINT32 blt_dst_width;
- UINT32 blt_dst_height;
- UINT32 blt_dst_stride;
- UINT32 blt_dst_bpp;
- UINT32 blt_cmd;
- UINT32 blt_src_base;
- UINT32 blt_src_x;
- UINT32 blt_src_y;
- UINT32 blt_src_width;
- UINT32 blt_src_height;
- UINT32 blt_src_stride;
- UINT32 blt_src_bpp;
+ UINT32 io[0x40]; /* I/O registers */
+ UINT32 agp[0x80]; /* AGP registers */
+ UINT8 vga[0x20]; /* VGA registers */
+ UINT8 crtc[0x27]; /* VGA CRTC registers */
+ UINT8 seq[0x05]; /* VGA sequencer registers */
+ UINT8 gc[0x05]; /* VGA graphics controller registers */
+ UINT8 att[0x15]; /* VGA attribute registers */
+ UINT8 attff; /* VGA attribute flip-flop */
+
+ UINT32 blt_regs[0x20]; /* 2D Blitter registers */
+ UINT32 blt_dst_base;
+ UINT32 blt_dst_x;
+ UINT32 blt_dst_y;
+ UINT32 blt_dst_width;
+ UINT32 blt_dst_height;
+ UINT32 blt_dst_stride;
+ UINT32 blt_dst_bpp;
+ UINT32 blt_cmd;
+ UINT32 blt_src_base;
+ UINT32 blt_src_x;
+ UINT32 blt_src_y;
+ UINT32 blt_src_width;
+ UINT32 blt_src_height;
+ UINT32 blt_src_stride;
+ UINT32 blt_src_bpp;
};
struct voodoo_state
{
- UINT8 index; /* index of board */
- device_t *device; /* pointer to our containing device */
- screen_device *screen; /* the screen we are acting on */
- device_t *cpu; /* the CPU we interact with */
- UINT8 type; /* type of system */
- UINT8 chipmask; /* mask for which chips are available */
- UINT32 freq; /* operating frequency */
- attoseconds_t attoseconds_per_cycle; /* attoseconds per cycle */
- UINT32 extra_cycles; /* extra cycles not yet accounted for */
- int trigger; /* trigger used for stalling */
-
- voodoo_reg reg[0x400]; /* raw registers */
- const UINT8 * regaccess; /* register access array */
- const char *const * regnames; /* register names array */
- UINT8 alt_regmap; /* enable alternate register map? */
-
- pci_state pci; /* PCI state */
- dac_state dac; /* DAC state */
-
- fbi_state fbi; /* FBI states */
- tmu_state tmu[MAX_TMU]; /* TMU states */
- tmu_shared_state tmushare; /* TMU shared state */
- banshee_info banshee; /* Banshee state */
-
- poly_manager * poly; /* polygon manager */
- stats_block * thread_stats; /* per-thread statistics */
-
- voodoo_stats stats; /* internal statistics */
-
- offs_t last_status_pc; /* PC of last status description (for logging) */
- UINT32 last_status_value; /* value of last status read (for logging) */
-
- int next_rasterizer; /* next rasterizer index */
- raster_info rasterizer[MAX_RASTERIZERS]; /* array of rasterizers */
- raster_info * raster_hash[RASTER_HASH_SIZE]; /* hash table of rasterizers */
+ UINT8 index; /* index of board */
+ device_t *device; /* pointer to our containing device */
+ screen_device *screen; /* the screen we are acting on */
+ device_t *cpu; /* the CPU we interact with */
+ UINT8 type; /* type of system */
+ UINT8 chipmask; /* mask for which chips are available */
+ UINT32 freq; /* operating frequency */
+ attoseconds_t attoseconds_per_cycle; /* attoseconds per cycle */
+ UINT32 extra_cycles; /* extra cycles not yet accounted for */
+ int trigger; /* trigger used for stalling */
+
+ voodoo_reg reg[0x400]; /* raw registers */
+ const UINT8 * regaccess; /* register access array */
+ const char *const * regnames; /* register names array */
+ UINT8 alt_regmap; /* enable alternate register map? */
+
+ pci_state pci; /* PCI state */
+ dac_state dac; /* DAC state */
+
+ fbi_state fbi; /* FBI states */
+ tmu_state tmu[MAX_TMU]; /* TMU states */
+ tmu_shared_state tmushare; /* TMU shared state */
+ banshee_info banshee; /* Banshee state */
+
+ poly_manager * poly; /* polygon manager */
+ stats_block * thread_stats; /* per-thread statistics */
+
+ voodoo_stats stats; /* internal statistics */
+
+ offs_t last_status_pc; /* PC of last status description (for logging) */
+ UINT32 last_status_value; /* value of last status read (for logging) */
+
+ int next_rasterizer; /* next rasterizer index */
+ raster_info rasterizer[MAX_RASTERIZERS]; /* array of rasterizers */
+ raster_info * raster_hash[RASTER_HASH_SIZE]; /* hash table of rasterizers */
};
@@ -2102,77 +2102,77 @@ INLINE UINT32 compute_raster_hash(const raster_info *info)
/* note that these equations and the dither matrixes have
been confirmed to be exact matches to the real hardware */
-#define DITHER_RB(val,dith) ((((val) << 1) - ((val) >> 4) + ((val) >> 7) + (dith)) >> 1)
-#define DITHER_G(val,dith) ((((val) << 2) - ((val) >> 4) + ((val) >> 6) + (dith)) >> 2)
-
-#define DECLARE_DITHER_POINTERS \
- const UINT8 *dither_lookup = NULL; \
- const UINT8 *dither4 = NULL; \
- const UINT8 *dither = NULL \
-
-#define DECLARE_DITHER_POINTERS_NO_DITHER_VAR \
- const UINT8 *dither_lookup = NULL; \
-
-#define COMPUTE_DITHER_POINTERS(FBZMODE, YY) \
-do \
-{ \
- /* compute the dithering pointers */ \
- if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \
- { \
- dither4 = &dither_matrix_4x4[((YY) & 3) * 4]; \
- if (FBZMODE_DITHER_TYPE(FBZMODE) == 0) \
- { \
- dither = dither4; \
- dither_lookup = &dither4_lookup[(YY & 3) << 11]; \
- } \
- else \
- { \
- dither = &dither_matrix_2x2[((YY) & 3) * 4]; \
- dither_lookup = &dither2_lookup[(YY & 3) << 11]; \
- } \
- } \
-} \
+#define DITHER_RB(val,dith) ((((val) << 1) - ((val) >> 4) + ((val) >> 7) + (dith)) >> 1)
+#define DITHER_G(val,dith) ((((val) << 2) - ((val) >> 4) + ((val) >> 6) + (dith)) >> 2)
+
+#define DECLARE_DITHER_POINTERS \
+ const UINT8 *dither_lookup = NULL; \
+ const UINT8 *dither4 = NULL; \
+ const UINT8 *dither = NULL \
+
+#define DECLARE_DITHER_POINTERS_NO_DITHER_VAR \
+ const UINT8 *dither_lookup = NULL; \
+
+#define COMPUTE_DITHER_POINTERS(FBZMODE, YY) \
+do \
+{ \
+ /* compute the dithering pointers */ \
+ if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \
+ { \
+ dither4 = &dither_matrix_4x4[((YY) & 3) * 4]; \
+ if (FBZMODE_DITHER_TYPE(FBZMODE) == 0) \
+ { \
+ dither = dither4; \
+ dither_lookup = &dither4_lookup[(YY & 3) << 11]; \
+ } \
+ else \
+ { \
+ dither = &dither_matrix_2x2[((YY) & 3) * 4]; \
+ dither_lookup = &dither2_lookup[(YY & 3) << 11]; \
+ } \
+ } \
+} \
while (0)
-#define COMPUTE_DITHER_POINTERS_NO_DITHER_VAR(FBZMODE, YY) \
-do \
-{ \
- /* compute the dithering pointers */ \
- if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \
- { \
- if (FBZMODE_DITHER_TYPE(FBZMODE) == 0) \
- { \
- dither_lookup = &dither4_lookup[(YY & 3) << 11]; \
- } \
- else \
- { \
- dither_lookup = &dither2_lookup[(YY & 3) << 11]; \
- } \
- } \
-} \
+#define COMPUTE_DITHER_POINTERS_NO_DITHER_VAR(FBZMODE, YY) \
+do \
+{ \
+ /* compute the dithering pointers */ \
+ if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \
+ { \
+ if (FBZMODE_DITHER_TYPE(FBZMODE) == 0) \
+ { \
+ dither_lookup = &dither4_lookup[(YY & 3) << 11]; \
+ } \
+ else \
+ { \
+ dither_lookup = &dither2_lookup[(YY & 3) << 11]; \
+ } \
+ } \
+} \
while (0)
-#define APPLY_DITHER(FBZMODE, XX, DITHER_LOOKUP, RR, GG, BB) \
-do \
-{ \
- /* apply dithering */ \
- if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \
- { \
- /* look up the dither value from the appropriate matrix */ \
- const UINT8 *dith = &DITHER_LOOKUP[((XX) & 3) << 1]; \
- \
- /* apply dithering to R,G,B */ \
- (RR) = dith[((RR) << 3) + 0]; \
- (GG) = dith[((GG) << 3) + 1]; \
- (BB) = dith[((BB) << 3) + 0]; \
- } \
- else \
- { \
- (RR) >>= 3; \
- (GG) >>= 2; \
- (BB) >>= 3; \
- } \
-} \
+#define APPLY_DITHER(FBZMODE, XX, DITHER_LOOKUP, RR, GG, BB) \
+do \
+{ \
+ /* apply dithering */ \
+ if (FBZMODE_ENABLE_DITHERING(FBZMODE)) \
+ { \
+ /* look up the dither value from the appropriate matrix */ \
+ const UINT8 *dith = &DITHER_LOOKUP[((XX) & 3) << 1]; \
+ \
+ /* apply dithering to R,G,B */ \
+ (RR) = dith[((RR) << 3) + 0]; \
+ (GG) = dith[((GG) << 3) + 1]; \
+ (BB) = dith[((BB) << 3) + 0]; \
+ } \
+ else \
+ { \
+ (RR) >>= 3; \
+ (GG) >>= 2; \
+ (BB) >>= 3; \
+ } \
+} \
while (0)
@@ -2183,95 +2183,95 @@ while (0)
*
*************************************/
-#define CLAMPED_ARGB(ITERR, ITERG, ITERB, ITERA, FBZCP, RESULT) \
-do \
-{ \
- INT32 r = (INT32)(ITERR) >> 12; \
- INT32 g = (INT32)(ITERG) >> 12; \
- INT32 b = (INT32)(ITERB) >> 12; \
- INT32 a = (INT32)(ITERA) >> 12; \
- \
- if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \
- { \
- r &= 0xfff; \
- RESULT.rgb.r = r; \
- if (r == 0xfff) \
- RESULT.rgb.r = 0; \
- else if (r == 0x100) \
- RESULT.rgb.r = 0xff; \
- \
- g &= 0xfff; \
- RESULT.rgb.g = g; \
- if (g == 0xfff) \
- RESULT.rgb.g = 0; \
- else if (g == 0x100) \
- RESULT.rgb.g = 0xff; \
- \
- b &= 0xfff; \
- RESULT.rgb.b = b; \
- if (b == 0xfff) \
- RESULT.rgb.b = 0; \
- else if (b == 0x100) \
- RESULT.rgb.b = 0xff; \
- \
- a &= 0xfff; \
- RESULT.rgb.a = a; \
- if (a == 0xfff) \
- RESULT.rgb.a = 0; \
- else if (a == 0x100) \
- RESULT.rgb.a = 0xff; \
- } \
- else \
- { \
- RESULT.rgb.r = (r < 0) ? 0 : (r > 0xff) ? 0xff : r; \
- RESULT.rgb.g = (g < 0) ? 0 : (g > 0xff) ? 0xff : g; \
- RESULT.rgb.b = (b < 0) ? 0 : (b > 0xff) ? 0xff : b; \
- RESULT.rgb.a = (a < 0) ? 0 : (a > 0xff) ? 0xff : a; \
- } \
-} \
+#define CLAMPED_ARGB(ITERR, ITERG, ITERB, ITERA, FBZCP, RESULT) \
+do \
+{ \
+ INT32 r = (INT32)(ITERR) >> 12; \
+ INT32 g = (INT32)(ITERG) >> 12; \
+ INT32 b = (INT32)(ITERB) >> 12; \
+ INT32 a = (INT32)(ITERA) >> 12; \
+ \
+ if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \
+ { \
+ r &= 0xfff; \
+ RESULT.rgb.r = r; \
+ if (r == 0xfff) \
+ RESULT.rgb.r = 0; \
+ else if (r == 0x100) \
+ RESULT.rgb.r = 0xff; \
+ \
+ g &= 0xfff; \
+ RESULT.rgb.g = g; \
+ if (g == 0xfff) \
+ RESULT.rgb.g = 0; \
+ else if (g == 0x100) \
+ RESULT.rgb.g = 0xff; \
+ \
+ b &= 0xfff; \
+ RESULT.rgb.b = b; \
+ if (b == 0xfff) \
+ RESULT.rgb.b = 0; \
+ else if (b == 0x100) \
+ RESULT.rgb.b = 0xff; \
+ \
+ a &= 0xfff; \
+ RESULT.rgb.a = a; \
+ if (a == 0xfff) \
+ RESULT.rgb.a = 0; \
+ else if (a == 0x100) \
+ RESULT.rgb.a = 0xff; \
+ } \
+ else \
+ { \
+ RESULT.rgb.r = (r < 0) ? 0 : (r > 0xff) ? 0xff : r; \
+ RESULT.rgb.g = (g < 0) ? 0 : (g > 0xff) ? 0xff : g; \
+ RESULT.rgb.b = (b < 0) ? 0 : (b > 0xff) ? 0xff : b; \
+ RESULT.rgb.a = (a < 0) ? 0 : (a > 0xff) ? 0xff : a; \
+ } \
+} \
while (0)
-#define CLAMPED_Z(ITERZ, FBZCP, RESULT) \
-do \
-{ \
- (RESULT) = (INT32)(ITERZ) >> 12; \
- if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \
- { \
- (RESULT) &= 0xfffff; \
- if ((RESULT) == 0xfffff) \
- (RESULT) = 0; \
- else if ((RESULT) == 0x10000) \
- (RESULT) = 0xffff; \
- else \
- (RESULT) &= 0xffff; \
- } \
- else \
- { \
- CLAMP((RESULT), 0, 0xffff); \
- } \
-} \
+#define CLAMPED_Z(ITERZ, FBZCP, RESULT) \
+do \
+{ \
+ (RESULT) = (INT32)(ITERZ) >> 12; \
+ if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \
+ { \
+ (RESULT) &= 0xfffff; \
+ if ((RESULT) == 0xfffff) \
+ (RESULT) = 0; \
+ else if ((RESULT) == 0x10000) \
+ (RESULT) = 0xffff; \
+ else \
+ (RESULT) &= 0xffff; \
+ } \
+ else \
+ { \
+ CLAMP((RESULT), 0, 0xffff); \
+ } \
+} \
while (0)
-#define CLAMPED_W(ITERW, FBZCP, RESULT) \
-do \
-{ \
- (RESULT) = (INT16)((ITERW) >> 32); \
- if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \
- { \
- (RESULT) &= 0xffff; \
- if ((RESULT) == 0xffff) \
- (RESULT) = 0; \
- else if ((RESULT) == 0x100) \
- (RESULT) = 0xff; \
- (RESULT) &= 0xff; \
- } \
- else \
- { \
- CLAMP((RESULT), 0, 0xff); \
- } \
-} \
+#define CLAMPED_W(ITERW, FBZCP, RESULT) \
+do \
+{ \
+ (RESULT) = (INT16)((ITERW) >> 32); \
+ if (FBZCP_RGBZW_CLAMP(FBZCP) == 0) \
+ { \
+ (RESULT) &= 0xffff; \
+ if ((RESULT) == 0xffff) \
+ (RESULT) = 0; \
+ else if ((RESULT) == 0x100) \
+ (RESULT) = 0xff; \
+ (RESULT) &= 0xff; \
+ } \
+ else \
+ { \
+ CLAMP((RESULT), 0, 0xff); \
+ } \
+} \
while (0)
@@ -2282,70 +2282,70 @@ while (0)
*
*************************************/
-#define APPLY_CHROMAKEY(VV, STATS, FBZMODE, COLOR) \
-do \
-{ \
- if (FBZMODE_ENABLE_CHROMAKEY(FBZMODE)) \
- { \
- /* non-range version */ \
- if (!CHROMARANGE_ENABLE((VV)->reg[chromaRange].u)) \
- { \
- if (((COLOR.u ^ (VV)->reg[chromaKey].u) & 0xffffff) == 0) \
- { \
- (STATS)->chroma_fail++; \
- goto skipdrawdepth; \
- } \
- } \
- \
- /* tricky range version */ \
- else \
- { \
- INT32 low, high, test; \
- int results = 0; \
- \
- /* check blue */ \
- low = (VV)->reg[chromaKey].rgb.b; \
- high = (VV)->reg[chromaRange].rgb.b; \
- test = COLOR.rgb.b; \
- results = (test >= low && test <= high); \
- results ^= CHROMARANGE_BLUE_EXCLUSIVE((VV)->reg[chromaRange].u); \
- results <<= 1; \
- \
- /* check green */ \
- low = (VV)->reg[chromaKey].rgb.g; \
- high = (VV)->reg[chromaRange].rgb.g; \
- test = COLOR.rgb.g; \
- results |= (test >= low && test <= high); \
- results ^= CHROMARANGE_GREEN_EXCLUSIVE((VV)->reg[chromaRange].u); \
- results <<= 1; \
- \
- /* check red */ \
- low = (VV)->reg[chromaKey].rgb.r; \
- high = (VV)->reg[chromaRange].rgb.r; \
- test = COLOR.rgb.r; \
- results |= (test >= low && test <= high); \
- results ^= CHROMARANGE_RED_EXCLUSIVE((VV)->reg[chromaRange].u); \
- \
- /* final result */ \
- if (CHROMARANGE_UNION_MODE((VV)->reg[chromaRange].u)) \
- { \
- if (results != 0) \
- { \
- (STATS)->chroma_fail++; \
- goto skipdrawdepth; \
- } \
- } \
- else \
- { \
- if (results == 7) \
- { \
- (STATS)->chroma_fail++; \
- goto skipdrawdepth; \
- } \
- } \
- } \
- } \
-} \
+#define APPLY_CHROMAKEY(VV, STATS, FBZMODE, COLOR) \
+do \
+{ \
+ if (FBZMODE_ENABLE_CHROMAKEY(FBZMODE)) \
+ { \
+ /* non-range version */ \
+ if (!CHROMARANGE_ENABLE((VV)->reg[chromaRange].u)) \
+ { \
+ if (((COLOR.u ^ (VV)->reg[chromaKey].u) & 0xffffff) == 0) \
+ { \
+ (STATS)->chroma_fail++; \
+ goto skipdrawdepth; \
+ } \
+ } \
+ \
+ /* tricky range version */ \
+ else \
+ { \
+ INT32 low, high, test; \
+ int results = 0; \
+ \
+ /* check blue */ \
+ low = (VV)->reg[chromaKey].rgb.b; \
+ high = (VV)->reg[chromaRange].rgb.b; \
+ test = COLOR.rgb.b; \
+ results = (test >= low && test <= high); \
+ results ^= CHROMARANGE_BLUE_EXCLUSIVE((VV)->reg[chromaRange].u); \
+ results <<= 1; \
+ \
+ /* check green */ \
+ low = (VV)->reg[chromaKey].rgb.g; \
+ high = (VV)->reg[chromaRange].rgb.g; \
+ test = COLOR.rgb.g; \
+ results |= (test >= low && test <= high); \
+ results ^= CHROMARANGE_GREEN_EXCLUSIVE((VV)->reg[chromaRange].u); \
+ results <<= 1; \
+ \
+ /* check red */ \
+ low = (VV)->reg[chromaKey].rgb.r; \
+ high = (VV)->reg[chromaRange].rgb.r; \
+ test = COLOR.rgb.r; \
+ results |= (test >= low && test <= high); \
+ results ^= CHROMARANGE_RED_EXCLUSIVE((VV)->reg[chromaRange].u); \
+ \
+ /* final result */ \
+ if (CHROMARANGE_UNION_MODE((VV)->reg[chromaRange].u)) \
+ { \
+ if (results != 0) \
+ { \
+ (STATS)->chroma_fail++; \
+ goto skipdrawdepth; \
+ } \
+ } \
+ else \
+ { \
+ if (results == 7) \
+ { \
+ (STATS)->chroma_fail++; \
+ goto skipdrawdepth; \
+ } \
+ } \
+ } \
+ } \
+} \
while (0)
@@ -2356,18 +2356,18 @@ while (0)
*
*************************************/
-#define APPLY_ALPHAMASK(VV, STATS, FBZMODE, AA) \
-do \
-{ \
- if (FBZMODE_ENABLE_ALPHA_MASK(FBZMODE)) \
- { \
- if (((AA) & 1) == 0) \
- { \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- } \
- } \
-} \
+#define APPLY_ALPHAMASK(VV, STATS, FBZMODE, AA) \
+do \
+{ \
+ if (FBZMODE_ENABLE_ALPHA_MASK(FBZMODE)) \
+ { \
+ if (((AA) & 1) == 0) \
+ { \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ } \
+} \
while (0)
@@ -2378,71 +2378,71 @@ while (0)
*
*************************************/
-#define APPLY_ALPHATEST(VV, STATS, ALPHAMODE, AA) \
-do \
-{ \
- if (ALPHAMODE_ALPHATEST(ALPHAMODE)) \
- { \
- UINT8 alpharef = (VV)->reg[alphaMode].rgb.a; \
- switch (ALPHAMODE_ALPHAFUNCTION(ALPHAMODE)) \
- { \
- case 0: /* alphaOP = never */ \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- \
- case 1: /* alphaOP = less than */ \
- if ((AA) >= alpharef) \
- { \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 2: /* alphaOP = equal */ \
- if ((AA) != alpharef) \
- { \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 3: /* alphaOP = less than or equal */ \
- if ((AA) > alpharef) \
- { \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 4: /* alphaOP = greater than */ \
- if ((AA) <= alpharef) \
- { \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 5: /* alphaOP = not equal */ \
- if ((AA) == alpharef) \
- { \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 6: /* alphaOP = greater than or equal */ \
- if ((AA) < alpharef) \
- { \
- (STATS)->afunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 7: /* alphaOP = always */ \
- break; \
- } \
- } \
-} \
+#define APPLY_ALPHATEST(VV, STATS, ALPHAMODE, AA) \
+do \
+{ \
+ if (ALPHAMODE_ALPHATEST(ALPHAMODE)) \
+ { \
+ UINT8 alpharef = (VV)->reg[alphaMode].rgb.a; \
+ switch (ALPHAMODE_ALPHAFUNCTION(ALPHAMODE)) \
+ { \
+ case 0: /* alphaOP = never */ \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ \
+ case 1: /* alphaOP = less than */ \
+ if ((AA) >= alpharef) \
+ { \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 2: /* alphaOP = equal */ \
+ if ((AA) != alpharef) \
+ { \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 3: /* alphaOP = less than or equal */ \
+ if ((AA) > alpharef) \
+ { \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 4: /* alphaOP = greater than */ \
+ if ((AA) <= alpharef) \
+ { \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 5: /* alphaOP = not equal */ \
+ if ((AA) == alpharef) \
+ { \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 6: /* alphaOP = greater than or equal */ \
+ if ((AA) < alpharef) \
+ { \
+ (STATS)->afunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 7: /* alphaOP = always */ \
+ break; \
+ } \
+ } \
+} \
while (0)
@@ -2453,161 +2453,161 @@ while (0)
*
*************************************/
-#define APPLY_ALPHA_BLEND(FBZMODE, ALPHAMODE, XX, DITHER, RR, GG, BB, AA) \
-do \
-{ \
- if (ALPHAMODE_ALPHABLEND(ALPHAMODE)) \
- { \
- int dpix = dest[XX]; \
- int dr = (dpix >> 8) & 0xf8; \
- int dg = (dpix >> 3) & 0xfc; \
- int db = (dpix << 3) & 0xf8; \
- int da = FBZMODE_ENABLE_ALPHA_PLANES(FBZMODE) ? depth[XX] : 0xff; \
- int sr = (RR); \
- int sg = (GG); \
- int sb = (BB); \
- int sa = (AA); \
- int ta; \
- \
- /* apply dither subtraction */ \
- if (FBZMODE_ALPHA_DITHER_SUBTRACT(FBZMODE)) \
- { \
- /* look up the dither value from the appropriate matrix */ \
- int dith = DITHER[(XX) & 3]; \
- \
- /* subtract the dither value */ \
- dr = ((dr << 1) + 15 - dith) >> 1; \
- dg = ((dg << 2) + 15 - dith) >> 2; \
- db = ((db << 1) + 15 - dith) >> 1; \
- } \
- \
- /* compute source portion */ \
- switch (ALPHAMODE_SRCRGBBLEND(ALPHAMODE)) \
- { \
- default: /* reserved */ \
- case 0: /* AZERO */ \
- (RR) = (GG) = (BB) = 0; \
- break; \
- \
- case 1: /* ASRC_ALPHA */ \
- (RR) = (sr * (sa + 1)) >> 8; \
- (GG) = (sg * (sa + 1)) >> 8; \
- (BB) = (sb * (sa + 1)) >> 8; \
- break; \
- \
- case 2: /* A_COLOR */ \
- (RR) = (sr * (dr + 1)) >> 8; \
- (GG) = (sg * (dg + 1)) >> 8; \
- (BB) = (sb * (db + 1)) >> 8; \
- break; \
- \
- case 3: /* ADST_ALPHA */ \
- (RR) = (sr * (da + 1)) >> 8; \
- (GG) = (sg * (da + 1)) >> 8; \
- (BB) = (sb * (da + 1)) >> 8; \
- break; \
- \
- case 4: /* AONE */ \
- break; \
- \
- case 5: /* AOMSRC_ALPHA */ \
- (RR) = (sr * (0x100 - sa)) >> 8; \
- (GG) = (sg * (0x100 - sa)) >> 8; \
- (BB) = (sb * (0x100 - sa)) >> 8; \
- break; \
- \
- case 6: /* AOM_COLOR */ \
- (RR) = (sr * (0x100 - dr)) >> 8; \
- (GG) = (sg * (0x100 - dg)) >> 8; \
- (BB) = (sb * (0x100 - db)) >> 8; \
- break; \
- \
- case 7: /* AOMDST_ALPHA */ \
- (RR) = (sr * (0x100 - da)) >> 8; \
- (GG) = (sg * (0x100 - da)) >> 8; \
- (BB) = (sb * (0x100 - da)) >> 8; \
- break; \
- \
- case 15: /* ASATURATE */ \
- ta = (sa < (0x100 - da)) ? sa : (0x100 - da); \
- (RR) = (sr * (ta + 1)) >> 8; \
- (GG) = (sg * (ta + 1)) >> 8; \
- (BB) = (sb * (ta + 1)) >> 8; \
- break; \
- } \
- \
- /* add in dest portion */ \
- switch (ALPHAMODE_DSTRGBBLEND(ALPHAMODE)) \
- { \
- default: /* reserved */ \
- case 0: /* AZERO */ \
- break; \
- \
- case 1: /* ASRC_ALPHA */ \
- (RR) += (dr * (sa + 1)) >> 8; \
- (GG) += (dg * (sa + 1)) >> 8; \
- (BB) += (db * (sa + 1)) >> 8; \
- break; \
- \
- case 2: /* A_COLOR */ \
- (RR) += (dr * (sr + 1)) >> 8; \
- (GG) += (dg * (sg + 1)) >> 8; \
- (BB) += (db * (sb + 1)) >> 8; \
- break; \
- \
- case 3: /* ADST_ALPHA */ \
- (RR) += (dr * (da + 1)) >> 8; \
- (GG) += (dg * (da + 1)) >> 8; \
- (BB) += (db * (da + 1)) >> 8; \
- break; \
- \
- case 4: /* AONE */ \
- (RR) += dr; \
- (GG) += dg; \
- (BB) += db; \
- break; \
- \
- case 5: /* AOMSRC_ALPHA */ \
- (RR) += (dr * (0x100 - sa)) >> 8; \
- (GG) += (dg * (0x100 - sa)) >> 8; \
- (BB) += (db * (0x100 - sa)) >> 8; \
- break; \
- \
- case 6: /* AOM_COLOR */ \
- (RR) += (dr * (0x100 - sr)) >> 8; \
- (GG) += (dg * (0x100 - sg)) >> 8; \
- (BB) += (db * (0x100 - sb)) >> 8; \
- break; \
- \
- case 7: /* AOMDST_ALPHA */ \
- (RR) += (dr * (0x100 - da)) >> 8; \
- (GG) += (dg * (0x100 - da)) >> 8; \
- (BB) += (db * (0x100 - da)) >> 8; \
- break; \
- \
- case 15: /* A_COLORBEFOREFOG */ \
- (RR) += (dr * (prefogr + 1)) >> 8; \
- (GG) += (dg * (prefogg + 1)) >> 8; \
- (BB) += (db * (prefogb + 1)) >> 8; \
- break; \
- } \
- \
- /* blend the source alpha */ \
- (AA) = 0; \
- if (ALPHAMODE_SRCALPHABLEND(ALPHAMODE) == 4) \
- (AA) = sa; \
- \
- /* blend the dest alpha */ \
- if (ALPHAMODE_DSTALPHABLEND(ALPHAMODE) == 4) \
- (AA) += da; \
- \
- /* clamp */ \
- CLAMP((RR), 0x00, 0xff); \
- CLAMP((GG), 0x00, 0xff); \
- CLAMP((BB), 0x00, 0xff); \
- CLAMP((AA), 0x00, 0xff); \
- } \
-} \
+#define APPLY_ALPHA_BLEND(FBZMODE, ALPHAMODE, XX, DITHER, RR, GG, BB, AA) \
+do \
+{ \
+ if (ALPHAMODE_ALPHABLEND(ALPHAMODE)) \
+ { \
+ int dpix = dest[XX]; \
+ int dr = (dpix >> 8) & 0xf8; \
+ int dg = (dpix >> 3) & 0xfc; \
+ int db = (dpix << 3) & 0xf8; \
+ int da = FBZMODE_ENABLE_ALPHA_PLANES(FBZMODE) ? depth[XX] : 0xff; \
+ int sr = (RR); \
+ int sg = (GG); \
+ int sb = (BB); \
+ int sa = (AA); \
+ int ta; \
+ \
+ /* apply dither subtraction */ \
+ if (FBZMODE_ALPHA_DITHER_SUBTRACT(FBZMODE)) \
+ { \
+ /* look up the dither value from the appropriate matrix */ \
+ int dith = DITHER[(XX) & 3]; \
+ \
+ /* subtract the dither value */ \
+ dr = ((dr << 1) + 15 - dith) >> 1; \
+ dg = ((dg << 2) + 15 - dith) >> 2; \
+ db = ((db << 1) + 15 - dith) >> 1; \
+ } \
+ \
+ /* compute source portion */ \
+ switch (ALPHAMODE_SRCRGBBLEND(ALPHAMODE)) \
+ { \
+ default: /* reserved */ \
+ case 0: /* AZERO */ \
+ (RR) = (GG) = (BB) = 0; \
+ break; \
+ \
+ case 1: /* ASRC_ALPHA */ \
+ (RR) = (sr * (sa + 1)) >> 8; \
+ (GG) = (sg * (sa + 1)) >> 8; \
+ (BB) = (sb * (sa + 1)) >> 8; \
+ break; \
+ \
+ case 2: /* A_COLOR */ \
+ (RR) = (sr * (dr + 1)) >> 8; \
+ (GG) = (sg * (dg + 1)) >> 8; \
+ (BB) = (sb * (db + 1)) >> 8; \
+ break; \
+ \
+ case 3: /* ADST_ALPHA */ \
+ (RR) = (sr * (da + 1)) >> 8; \
+ (GG) = (sg * (da + 1)) >> 8; \
+ (BB) = (sb * (da + 1)) >> 8; \
+ break; \
+ \
+ case 4: /* AONE */ \
+ break; \
+ \
+ case 5: /* AOMSRC_ALPHA */ \
+ (RR) = (sr * (0x100 - sa)) >> 8; \
+ (GG) = (sg * (0x100 - sa)) >> 8; \
+ (BB) = (sb * (0x100 - sa)) >> 8; \
+ break; \
+ \
+ case 6: /* AOM_COLOR */ \
+ (RR) = (sr * (0x100 - dr)) >> 8; \
+ (GG) = (sg * (0x100 - dg)) >> 8; \
+ (BB) = (sb * (0x100 - db)) >> 8; \
+ break; \
+ \
+ case 7: /* AOMDST_ALPHA */ \
+ (RR) = (sr * (0x100 - da)) >> 8; \
+ (GG) = (sg * (0x100 - da)) >> 8; \
+ (BB) = (sb * (0x100 - da)) >> 8; \
+ break; \
+ \
+ case 15: /* ASATURATE */ \
+ ta = (sa < (0x100 - da)) ? sa : (0x100 - da); \
+ (RR) = (sr * (ta + 1)) >> 8; \
+ (GG) = (sg * (ta + 1)) >> 8; \
+ (BB) = (sb * (ta + 1)) >> 8; \
+ break; \
+ } \
+ \
+ /* add in dest portion */ \
+ switch (ALPHAMODE_DSTRGBBLEND(ALPHAMODE)) \
+ { \
+ default: /* reserved */ \
+ case 0: /* AZERO */ \
+ break; \
+ \
+ case 1: /* ASRC_ALPHA */ \
+ (RR) += (dr * (sa + 1)) >> 8; \
+ (GG) += (dg * (sa + 1)) >> 8; \
+ (BB) += (db * (sa + 1)) >> 8; \
+ break; \
+ \
+ case 2: /* A_COLOR */ \
+ (RR) += (dr * (sr + 1)) >> 8; \
+ (GG) += (dg * (sg + 1)) >> 8; \
+ (BB) += (db * (sb + 1)) >> 8; \
+ break; \
+ \
+ case 3: /* ADST_ALPHA */ \
+ (RR) += (dr * (da + 1)) >> 8; \
+ (GG) += (dg * (da + 1)) >> 8; \
+ (BB) += (db * (da + 1)) >> 8; \
+ break; \
+ \
+ case 4: /* AONE */ \
+ (RR) += dr; \
+ (GG) += dg; \
+ (BB) += db; \
+ break; \
+ \
+ case 5: /* AOMSRC_ALPHA */ \
+ (RR) += (dr * (0x100 - sa)) >> 8; \
+ (GG) += (dg * (0x100 - sa)) >> 8; \
+ (BB) += (db * (0x100 - sa)) >> 8; \
+ break; \
+ \
+ case 6: /* AOM_COLOR */ \
+ (RR) += (dr * (0x100 - sr)) >> 8; \
+ (GG) += (dg * (0x100 - sg)) >> 8; \
+ (BB) += (db * (0x100 - sb)) >> 8; \
+ break; \
+ \
+ case 7: /* AOMDST_ALPHA */ \
+ (RR) += (dr * (0x100 - da)) >> 8; \
+ (GG) += (dg * (0x100 - da)) >> 8; \
+ (BB) += (db * (0x100 - da)) >> 8; \
+ break; \
+ \
+ case 15: /* A_COLORBEFOREFOG */ \
+ (RR) += (dr * (prefogr + 1)) >> 8; \
+ (GG) += (dg * (prefogg + 1)) >> 8; \
+ (BB) += (db * (prefogb + 1)) >> 8; \
+ break; \
+ } \
+ \
+ /* blend the source alpha */ \
+ (AA) = 0; \
+ if (ALPHAMODE_SRCALPHABLEND(ALPHAMODE) == 4) \
+ (AA) = sa; \
+ \
+ /* blend the dest alpha */ \
+ if (ALPHAMODE_DSTALPHABLEND(ALPHAMODE) == 4) \
+ (AA) += da; \
+ \
+ /* clamp */ \
+ CLAMP((RR), 0x00, 0xff); \
+ CLAMP((GG), 0x00, 0xff); \
+ CLAMP((BB), 0x00, 0xff); \
+ CLAMP((AA), 0x00, 0xff); \
+ } \
+} \
while (0)
@@ -2618,115 +2618,115 @@ while (0)
*
*************************************/
-#define APPLY_FOGGING(VV, FOGMODE, FBZCP, XX, DITHER4, RR, GG, BB, ITERZ, ITERW, ITERAXXX) \
-do \
-{ \
- if (FOGMODE_ENABLE_FOG(FOGMODE)) \
- { \
- rgb_union fogcolor = (VV)->reg[fogColor]; \
- INT32 fr, fg, fb; \
- \
- /* constant fog bypasses everything else */ \
- if (FOGMODE_FOG_CONSTANT(FOGMODE)) \
- { \
- fr = fogcolor.rgb.r; \
- fg = fogcolor.rgb.g; \
- fb = fogcolor.rgb.b; \
- } \
- \
- /* non-constant fog comes from several sources */ \
- else \
- { \
- INT32 fogblend = 0; \
- \
- /* if fog_add is zero, we start with the fog color */ \
- if (FOGMODE_FOG_ADD(FOGMODE) == 0) \
- { \
- fr = fogcolor.rgb.r; \
- fg = fogcolor.rgb.g; \
- fb = fogcolor.rgb.b; \
- } \
- else \
- fr = fg = fb = 0; \
- \
- /* if fog_mult is zero, we subtract the incoming color */ \
- if (FOGMODE_FOG_MULT(FOGMODE) == 0) \
- { \
- fr -= (RR); \
- fg -= (GG); \
- fb -= (BB); \
- } \
- \
- /* fog blending mode */ \
- switch (FOGMODE_FOG_ZALPHA(FOGMODE)) \
- { \
- case 0: /* fog table */ \
- { \
- INT32 delta = (VV)->fbi.fogdelta[wfloat >> 10]; \
- INT32 deltaval; \
- \
- /* perform the multiply against lower 8 bits of wfloat */ \
- deltaval = (delta & (VV)->fbi.fogdelta_mask) * \
- ((wfloat >> 2) & 0xff); \
- \
- /* fog zones allow for negating this value */ \
- if (FOGMODE_FOG_ZONES(FOGMODE) && (delta & 2)) \
- deltaval = -deltaval; \
- deltaval >>= 6; \
- \
- /* apply dither */ \
- if (FOGMODE_FOG_DITHER(FOGMODE)) \
- deltaval += DITHER4[(XX) & 3]; \
- deltaval >>= 4; \
- \
- /* add to the blending factor */ \
- fogblend = (VV)->fbi.fogblend[wfloat >> 10] + deltaval; \
- break; \
- } \
- \
- case 1: /* iterated A */ \
- fogblend = ITERAXXX.rgb.a; \
- break; \
- \
- case 2: /* iterated Z */ \
- CLAMPED_Z((ITERZ), FBZCP, fogblend); \
- fogblend >>= 8; \
- break; \
- \
- case 3: /* iterated W - Voodoo 2 only */ \
- CLAMPED_W((ITERW), FBZCP, fogblend); \
- break; \
- } \
- \
- /* perform the blend */ \
- fogblend++; \
- fr = (fr * fogblend) >> 8; \
- fg = (fg * fogblend) >> 8; \
- fb = (fb * fogblend) >> 8; \
- } \
- \
- /* if fog_mult is 0, we add this to the original color */ \
- if (FOGMODE_FOG_MULT(FOGMODE) == 0) \
- { \
- (RR) += fr; \
- (GG) += fg; \
- (BB) += fb; \
- } \
- \
- /* otherwise this just becomes the new color */ \
- else \
- { \
- (RR) = fr; \
- (GG) = fg; \
- (BB) = fb; \
- } \
- \
- /* clamp */ \
- CLAMP((RR), 0x00, 0xff); \
- CLAMP((GG), 0x00, 0xff); \
- CLAMP((BB), 0x00, 0xff); \
- } \
-} \
+#define APPLY_FOGGING(VV, FOGMODE, FBZCP, XX, DITHER4, RR, GG, BB, ITERZ, ITERW, ITERAXXX) \
+do \
+{ \
+ if (FOGMODE_ENABLE_FOG(FOGMODE)) \
+ { \
+ rgb_union fogcolor = (VV)->reg[fogColor]; \
+ INT32 fr, fg, fb; \
+ \
+ /* constant fog bypasses everything else */ \
+ if (FOGMODE_FOG_CONSTANT(FOGMODE)) \
+ { \
+ fr = fogcolor.rgb.r; \
+ fg = fogcolor.rgb.g; \
+ fb = fogcolor.rgb.b; \
+ } \
+ \
+ /* non-constant fog comes from several sources */ \
+ else \
+ { \
+ INT32 fogblend = 0; \
+ \
+ /* if fog_add is zero, we start with the fog color */ \
+ if (FOGMODE_FOG_ADD(FOGMODE) == 0) \
+ { \
+ fr = fogcolor.rgb.r; \
+ fg = fogcolor.rgb.g; \
+ fb = fogcolor.rgb.b; \
+ } \
+ else \
+ fr = fg = fb = 0; \
+ \
+ /* if fog_mult is zero, we subtract the incoming color */ \
+ if (FOGMODE_FOG_MULT(FOGMODE) == 0) \
+ { \
+ fr -= (RR); \
+ fg -= (GG); \
+ fb -= (BB); \
+ } \
+ \
+ /* fog blending mode */ \
+ switch (FOGMODE_FOG_ZALPHA(FOGMODE)) \
+ { \
+ case 0: /* fog table */ \
+ { \
+ INT32 delta = (VV)->fbi.fogdelta[wfloat >> 10]; \
+ INT32 deltaval; \
+ \
+ /* perform the multiply against lower 8 bits of wfloat */ \
+ deltaval = (delta & (VV)->fbi.fogdelta_mask) * \
+ ((wfloat >> 2) & 0xff); \
+ \
+ /* fog zones allow for negating this value */ \
+ if (FOGMODE_FOG_ZONES(FOGMODE) && (delta & 2)) \
+ deltaval = -deltaval; \
+ deltaval >>= 6; \
+ \
+ /* apply dither */ \
+ if (FOGMODE_FOG_DITHER(FOGMODE)) \
+ deltaval += DITHER4[(XX) & 3]; \
+ deltaval >>= 4; \
+ \
+ /* add to the blending factor */ \
+ fogblend = (VV)->fbi.fogblend[wfloat >> 10] + deltaval; \
+ break; \
+ } \
+ \
+ case 1: /* iterated A */ \
+ fogblend = ITERAXXX.rgb.a; \
+ break; \
+ \
+ case 2: /* iterated Z */ \
+ CLAMPED_Z((ITERZ), FBZCP, fogblend); \
+ fogblend >>= 8; \
+ break; \
+ \
+ case 3: /* iterated W - Voodoo 2 only */ \
+ CLAMPED_W((ITERW), FBZCP, fogblend); \
+ break; \
+ } \
+ \
+ /* perform the blend */ \
+ fogblend++; \
+ fr = (fr * fogblend) >> 8; \
+ fg = (fg * fogblend) >> 8; \
+ fb = (fb * fogblend) >> 8; \
+ } \
+ \
+ /* if fog_mult is 0, we add this to the original color */ \
+ if (FOGMODE_FOG_MULT(FOGMODE) == 0) \
+ { \
+ (RR) += fr; \
+ (GG) += fg; \
+ (BB) += fb; \
+ } \
+ \
+ /* otherwise this just becomes the new color */ \
+ else \
+ { \
+ (RR) = fr; \
+ (GG) = fg; \
+ (BB) = fb; \
+ } \
+ \
+ /* clamp */ \
+ CLAMP((RR), 0x00, 0xff); \
+ CLAMP((GG), 0x00, 0xff); \
+ CLAMP((BB), 0x00, 0xff); \
+ } \
+} \
while (0)
@@ -2738,334 +2738,334 @@ while (0)
*************************************/
#define TEXTURE_PIPELINE(TT, XX, DITHER4, TEXMODE, COTHER, LOOKUP, LODBASE, ITERS, ITERT, ITERW, RESULT) \
-do \
-{ \
- INT32 blendr, blendg, blendb, blenda; \
- INT32 tr, tg, tb, ta; \
- INT32 oow, s, t, lod, ilod; \
- INT32 smax, tmax; \
- UINT32 texbase; \
- rgb_union c_local; \
- \
- /* determine the S/T/LOD values for this texture */ \
- if (TEXMODE_ENABLE_PERSPECTIVE(TEXMODE)) \
- { \
- oow = fast_reciplog((ITERW), &lod); \
- s = ((INT64)oow * (ITERS)) >> 29; \
- t = ((INT64)oow * (ITERT)) >> 29; \
- lod += (LODBASE); \
- } \
- else \
- { \
- s = (ITERS) >> 14; \
- t = (ITERT) >> 14; \
- lod = (LODBASE); \
- } \
- \
- /* clamp W */ \
- if (TEXMODE_CLAMP_NEG_W(TEXMODE) && (ITERW) < 0) \
- s = t = 0; \
- \
- /* clamp the LOD */ \
- lod += (TT)->lodbias; \
- if (TEXMODE_ENABLE_LOD_DITHER(TEXMODE)) \
- lod += DITHER4[(XX) & 3] << 4; \
- if (lod < (TT)->lodmin) \
- lod = (TT)->lodmin; \
- if (lod > (TT)->lodmax) \
- lod = (TT)->lodmax; \
- \
- /* now the LOD is in range; if we don't own this LOD, take the next one */ \
- ilod = lod >> 8; \
- if (!(((TT)->lodmask >> ilod) & 1)) \
- ilod++; \
- \
- /* fetch the texture base */ \
- texbase = (TT)->lodoffset[ilod]; \
- \
- /* compute the maximum s and t values at this LOD */ \
- smax = (TT)->wmask >> ilod; \
- tmax = (TT)->hmask >> ilod; \
- \
- /* determine whether we are point-sampled or bilinear */ \
- if ((lod == (TT)->lodmin && !TEXMODE_MAGNIFICATION_FILTER(TEXMODE)) || \
- (lod != (TT)->lodmin && !TEXMODE_MINIFICATION_FILTER(TEXMODE))) \
- { \
- /* point sampled */ \
- \
- UINT32 texel0; \
- \
- /* adjust S/T for the LOD and strip off the fractions */ \
- s >>= ilod + 18; \
- t >>= ilod + 18; \
- \
- /* clamp/wrap S/T if necessary */ \
- if (TEXMODE_CLAMP_S(TEXMODE)) \
- CLAMP(s, 0, smax); \
- if (TEXMODE_CLAMP_T(TEXMODE)) \
- CLAMP(t, 0, tmax); \
- s &= smax; \
- t &= tmax; \
- t *= smax + 1; \
- \
- /* fetch texel data */ \
- if (TEXMODE_FORMAT(TEXMODE) < 8) \
- { \
- texel0 = *(UINT8 *)&(TT)->ram[(texbase + t + s) & (TT)->mask]; \
- c_local.u = (LOOKUP)[texel0]; \
- } \
- else \
- { \
- texel0 = *(UINT16 *)&(TT)->ram[(texbase + 2*(t + s)) & (TT)->mask]; \
- if (TEXMODE_FORMAT(TEXMODE) >= 10 && TEXMODE_FORMAT(TEXMODE) <= 12) \
- c_local.u = (LOOKUP)[texel0]; \
- else \
- c_local.u = ((LOOKUP)[texel0 & 0xff] & 0xffffff) | \
- ((texel0 & 0xff00) << 16); \
- } \
- } \
- else \
- { \
- /* bilinear filtered */ \
- \
- UINT32 texel0, texel1, texel2, texel3; \
- UINT32 sfrac, tfrac; \
- INT32 s1, t1; \
- \
- /* adjust S/T for the LOD and strip off all but the low 8 bits of */ \
- /* the fraction */ \
- s >>= ilod + 10; \
- t >>= ilod + 10; \
- \
- /* also subtract 1/2 texel so that (0.5,0.5) = a full (0,0) texel */ \
- s -= 0x80; \
- t -= 0x80; \
- \
- /* extract the fractions */ \
- sfrac = s & (TT)->bilinear_mask; \
- tfrac = t & (TT)->bilinear_mask; \
- \
- /* now toss the rest */ \
- s >>= 8; \
- t >>= 8; \
- s1 = s + 1; \
- t1 = t + 1; \
- \
- /* clamp/wrap S/T if necessary */ \
- if (TEXMODE_CLAMP_S(TEXMODE)) \
- { \
- CLAMP(s, 0, smax); \
- CLAMP(s1, 0, smax); \
- } \
- if (TEXMODE_CLAMP_T(TEXMODE)) \
- { \
- CLAMP(t, 0, tmax); \
- CLAMP(t1, 0, tmax); \
- } \
- s &= smax; \
- s1 &= smax; \
- t &= tmax; \
- t1 &= tmax; \
- t *= smax + 1; \
- t1 *= smax + 1; \
- \
- /* fetch texel data */ \
- if (TEXMODE_FORMAT(TEXMODE) < 8) \
- { \
- texel0 = *(UINT8 *)&(TT)->ram[(texbase + t + s) & (TT)->mask]; \
- texel1 = *(UINT8 *)&(TT)->ram[(texbase + t + s1) & (TT)->mask]; \
- texel2 = *(UINT8 *)&(TT)->ram[(texbase + t1 + s) & (TT)->mask]; \
- texel3 = *(UINT8 *)&(TT)->ram[(texbase + t1 + s1) & (TT)->mask]; \
- texel0 = (LOOKUP)[texel0]; \
- texel1 = (LOOKUP)[texel1]; \
- texel2 = (LOOKUP)[texel2]; \
- texel3 = (LOOKUP)[texel3]; \
- } \
- else \
- { \
- texel0 = *(UINT16 *)&(TT)->ram[(texbase + 2*(t + s)) & (TT)->mask]; \
+do \
+{ \
+ INT32 blendr, blendg, blendb, blenda; \
+ INT32 tr, tg, tb, ta; \
+ INT32 oow, s, t, lod, ilod; \
+ INT32 smax, tmax; \
+ UINT32 texbase; \
+ rgb_union c_local; \
+ \
+ /* determine the S/T/LOD values for this texture */ \
+ if (TEXMODE_ENABLE_PERSPECTIVE(TEXMODE)) \
+ { \
+ oow = fast_reciplog((ITERW), &lod); \
+ s = ((INT64)oow * (ITERS)) >> 29; \
+ t = ((INT64)oow * (ITERT)) >> 29; \
+ lod += (LODBASE); \
+ } \
+ else \
+ { \
+ s = (ITERS) >> 14; \
+ t = (ITERT) >> 14; \
+ lod = (LODBASE); \
+ } \
+ \
+ /* clamp W */ \
+ if (TEXMODE_CLAMP_NEG_W(TEXMODE) && (ITERW) < 0) \
+ s = t = 0; \
+ \
+ /* clamp the LOD */ \
+ lod += (TT)->lodbias; \
+ if (TEXMODE_ENABLE_LOD_DITHER(TEXMODE)) \
+ lod += DITHER4[(XX) & 3] << 4; \
+ if (lod < (TT)->lodmin) \
+ lod = (TT)->lodmin; \
+ if (lod > (TT)->lodmax) \
+ lod = (TT)->lodmax; \
+ \
+ /* now the LOD is in range; if we don't own this LOD, take the next one */ \
+ ilod = lod >> 8; \
+ if (!(((TT)->lodmask >> ilod) & 1)) \
+ ilod++; \
+ \
+ /* fetch the texture base */ \
+ texbase = (TT)->lodoffset[ilod]; \
+ \
+ /* compute the maximum s and t values at this LOD */ \
+ smax = (TT)->wmask >> ilod; \
+ tmax = (TT)->hmask >> ilod; \
+ \
+ /* determine whether we are point-sampled or bilinear */ \
+ if ((lod == (TT)->lodmin && !TEXMODE_MAGNIFICATION_FILTER(TEXMODE)) || \
+ (lod != (TT)->lodmin && !TEXMODE_MINIFICATION_FILTER(TEXMODE))) \
+ { \
+ /* point sampled */ \
+ \
+ UINT32 texel0; \
+ \
+ /* adjust S/T for the LOD and strip off the fractions */ \
+ s >>= ilod + 18; \
+ t >>= ilod + 18; \
+ \
+ /* clamp/wrap S/T if necessary */ \
+ if (TEXMODE_CLAMP_S(TEXMODE)) \
+ CLAMP(s, 0, smax); \
+ if (TEXMODE_CLAMP_T(TEXMODE)) \
+ CLAMP(t, 0, tmax); \
+ s &= smax; \
+ t &= tmax; \
+ t *= smax + 1; \
+ \
+ /* fetch texel data */ \
+ if (TEXMODE_FORMAT(TEXMODE) < 8) \
+ { \
+ texel0 = *(UINT8 *)&(TT)->ram[(texbase + t + s) & (TT)->mask]; \
+ c_local.u = (LOOKUP)[texel0]; \
+ } \
+ else \
+ { \
+ texel0 = *(UINT16 *)&(TT)->ram[(texbase + 2*(t + s)) & (TT)->mask]; \
+ if (TEXMODE_FORMAT(TEXMODE) >= 10 && TEXMODE_FORMAT(TEXMODE) <= 12) \
+ c_local.u = (LOOKUP)[texel0]; \
+ else \
+ c_local.u = ((LOOKUP)[texel0 & 0xff] & 0xffffff) | \
+ ((texel0 & 0xff00) << 16); \
+ } \
+ } \
+ else \
+ { \
+ /* bilinear filtered */ \
+ \
+ UINT32 texel0, texel1, texel2, texel3; \
+ UINT32 sfrac, tfrac; \
+ INT32 s1, t1; \
+ \
+ /* adjust S/T for the LOD and strip off all but the low 8 bits of */ \
+ /* the fraction */ \
+ s >>= ilod + 10; \
+ t >>= ilod + 10; \
+ \
+ /* also subtract 1/2 texel so that (0.5,0.5) = a full (0,0) texel */ \
+ s -= 0x80; \
+ t -= 0x80; \
+ \
+ /* extract the fractions */ \
+ sfrac = s & (TT)->bilinear_mask; \
+ tfrac = t & (TT)->bilinear_mask; \
+ \
+ /* now toss the rest */ \
+ s >>= 8; \
+ t >>= 8; \
+ s1 = s + 1; \
+ t1 = t + 1; \
+ \
+ /* clamp/wrap S/T if necessary */ \
+ if (TEXMODE_CLAMP_S(TEXMODE)) \
+ { \
+ CLAMP(s, 0, smax); \
+ CLAMP(s1, 0, smax); \
+ } \
+ if (TEXMODE_CLAMP_T(TEXMODE)) \
+ { \
+ CLAMP(t, 0, tmax); \
+ CLAMP(t1, 0, tmax); \
+ } \
+ s &= smax; \
+ s1 &= smax; \
+ t &= tmax; \
+ t1 &= tmax; \
+ t *= smax + 1; \
+ t1 *= smax + 1; \
+ \
+ /* fetch texel data */ \
+ if (TEXMODE_FORMAT(TEXMODE) < 8) \
+ { \
+ texel0 = *(UINT8 *)&(TT)->ram[(texbase + t + s) & (TT)->mask]; \
+ texel1 = *(UINT8 *)&(TT)->ram[(texbase + t + s1) & (TT)->mask]; \
+ texel2 = *(UINT8 *)&(TT)->ram[(texbase + t1 + s) & (TT)->mask]; \
+ texel3 = *(UINT8 *)&(TT)->ram[(texbase + t1 + s1) & (TT)->mask]; \
+ texel0 = (LOOKUP)[texel0]; \
+ texel1 = (LOOKUP)[texel1]; \
+ texel2 = (LOOKUP)[texel2]; \
+ texel3 = (LOOKUP)[texel3]; \
+ } \
+ else \
+ { \
+ texel0 = *(UINT16 *)&(TT)->ram[(texbase + 2*(t + s)) & (TT)->mask]; \
texel1 = *(UINT16 *)&(TT)->ram[(texbase + 2*(t + s1)) & (TT)->mask];\
texel2 = *(UINT16 *)&(TT)->ram[(texbase + 2*(t1 + s)) & (TT)->mask];\
texel3 = *(UINT16 *)&(TT)->ram[(texbase + 2*(t1 + s1)) & (TT)->mask];\
- if (TEXMODE_FORMAT(TEXMODE) >= 10 && TEXMODE_FORMAT(TEXMODE) <= 12) \
- { \
- texel0 = (LOOKUP)[texel0]; \
- texel1 = (LOOKUP)[texel1]; \
- texel2 = (LOOKUP)[texel2]; \
- texel3 = (LOOKUP)[texel3]; \
- } \
- else \
- { \
- texel0 = ((LOOKUP)[texel0 & 0xff] & 0xffffff) | \
- ((texel0 & 0xff00) << 16); \
- texel1 = ((LOOKUP)[texel1 & 0xff] & 0xffffff) | \
- ((texel1 & 0xff00) << 16); \
- texel2 = ((LOOKUP)[texel2 & 0xff] & 0xffffff) | \
- ((texel2 & 0xff00) << 16); \
- texel3 = ((LOOKUP)[texel3 & 0xff] & 0xffffff) | \
- ((texel3 & 0xff00) << 16); \
- } \
- } \
- \
- /* weigh in each texel */ \
+ if (TEXMODE_FORMAT(TEXMODE) >= 10 && TEXMODE_FORMAT(TEXMODE) <= 12) \
+ { \
+ texel0 = (LOOKUP)[texel0]; \
+ texel1 = (LOOKUP)[texel1]; \
+ texel2 = (LOOKUP)[texel2]; \
+ texel3 = (LOOKUP)[texel3]; \
+ } \
+ else \
+ { \
+ texel0 = ((LOOKUP)[texel0 & 0xff] & 0xffffff) | \
+ ((texel0 & 0xff00) << 16); \
+ texel1 = ((LOOKUP)[texel1 & 0xff] & 0xffffff) | \
+ ((texel1 & 0xff00) << 16); \
+ texel2 = ((LOOKUP)[texel2 & 0xff] & 0xffffff) | \
+ ((texel2 & 0xff00) << 16); \
+ texel3 = ((LOOKUP)[texel3 & 0xff] & 0xffffff) | \
+ ((texel3 & 0xff00) << 16); \
+ } \
+ } \
+ \
+ /* weigh in each texel */ \
c_local.u = rgba_bilinear_filter(texel0, texel1, texel2, texel3, sfrac, tfrac);\
- } \
- \
- /* select zero/other for RGB */ \
- if (!TEXMODE_TC_ZERO_OTHER(TEXMODE)) \
- { \
- tr = COTHER.rgb.r; \
- tg = COTHER.rgb.g; \
- tb = COTHER.rgb.b; \
- } \
- else \
- tr = tg = tb = 0; \
- \
- /* select zero/other for alpha */ \
- if (!TEXMODE_TCA_ZERO_OTHER(TEXMODE)) \
- ta = COTHER.rgb.a; \
- else \
- ta = 0; \
- \
- /* potentially subtract c_local */ \
- if (TEXMODE_TC_SUB_CLOCAL(TEXMODE)) \
- { \
- tr -= c_local.rgb.r; \
- tg -= c_local.rgb.g; \
- tb -= c_local.rgb.b; \
- } \
- if (TEXMODE_TCA_SUB_CLOCAL(TEXMODE)) \
- ta -= c_local.rgb.a; \
- \
- /* blend RGB */ \
- switch (TEXMODE_TC_MSELECT(TEXMODE)) \
- { \
- default: /* reserved */ \
- case 0: /* zero */ \
- blendr = blendg = blendb = 0; \
- break; \
- \
- case 1: /* c_local */ \
- blendr = c_local.rgb.r; \
- blendg = c_local.rgb.g; \
- blendb = c_local.rgb.b; \
- break; \
- \
- case 2: /* a_other */ \
- blendr = blendg = blendb = COTHER.rgb.a; \
- break; \
- \
- case 3: /* a_local */ \
- blendr = blendg = blendb = c_local.rgb.a; \
- break; \
- \
- case 4: /* LOD (detail factor) */ \
- if ((TT)->detailbias <= lod) \
- blendr = blendg = blendb = 0; \
- else \
- { \
+ } \
+ \
+ /* select zero/other for RGB */ \
+ if (!TEXMODE_TC_ZERO_OTHER(TEXMODE)) \
+ { \
+ tr = COTHER.rgb.r; \
+ tg = COTHER.rgb.g; \
+ tb = COTHER.rgb.b; \
+ } \
+ else \
+ tr = tg = tb = 0; \
+ \
+ /* select zero/other for alpha */ \
+ if (!TEXMODE_TCA_ZERO_OTHER(TEXMODE)) \
+ ta = COTHER.rgb.a; \
+ else \
+ ta = 0; \
+ \
+ /* potentially subtract c_local */ \
+ if (TEXMODE_TC_SUB_CLOCAL(TEXMODE)) \
+ { \
+ tr -= c_local.rgb.r; \
+ tg -= c_local.rgb.g; \
+ tb -= c_local.rgb.b; \
+ } \
+ if (TEXMODE_TCA_SUB_CLOCAL(TEXMODE)) \
+ ta -= c_local.rgb.a; \
+ \
+ /* blend RGB */ \
+ switch (TEXMODE_TC_MSELECT(TEXMODE)) \
+ { \
+ default: /* reserved */ \
+ case 0: /* zero */ \
+ blendr = blendg = blendb = 0; \
+ break; \
+ \
+ case 1: /* c_local */ \
+ blendr = c_local.rgb.r; \
+ blendg = c_local.rgb.g; \
+ blendb = c_local.rgb.b; \
+ break; \
+ \
+ case 2: /* a_other */ \
+ blendr = blendg = blendb = COTHER.rgb.a; \
+ break; \
+ \
+ case 3: /* a_local */ \
+ blendr = blendg = blendb = c_local.rgb.a; \
+ break; \
+ \
+ case 4: /* LOD (detail factor) */ \
+ if ((TT)->detailbias <= lod) \
+ blendr = blendg = blendb = 0; \
+ else \
+ { \
blendr = ((((TT)->detailbias - lod) << (TT)->detailscale) >> 8);\
- if (blendr > (TT)->detailmax) \
- blendr = (TT)->detailmax; \
- blendg = blendb = blendr; \
- } \
- break; \
- \
- case 5: /* LOD fraction */ \
- blendr = blendg = blendb = lod & 0xff; \
- break; \
- } \
- \
- /* blend alpha */ \
- switch (TEXMODE_TCA_MSELECT(TEXMODE)) \
- { \
- default: /* reserved */ \
- case 0: /* zero */ \
- blenda = 0; \
- break; \
- \
- case 1: /* c_local */ \
- blenda = c_local.rgb.a; \
- break; \
- \
- case 2: /* a_other */ \
- blenda = COTHER.rgb.a; \
- break; \
- \
- case 3: /* a_local */ \
- blenda = c_local.rgb.a; \
- break; \
- \
- case 4: /* LOD (detail factor) */ \
- if ((TT)->detailbias <= lod) \
- blenda = 0; \
- else \
- { \
+ if (blendr > (TT)->detailmax) \
+ blendr = (TT)->detailmax; \
+ blendg = blendb = blendr; \
+ } \
+ break; \
+ \
+ case 5: /* LOD fraction */ \
+ blendr = blendg = blendb = lod & 0xff; \
+ break; \
+ } \
+ \
+ /* blend alpha */ \
+ switch (TEXMODE_TCA_MSELECT(TEXMODE)) \
+ { \
+ default: /* reserved */ \
+ case 0: /* zero */ \
+ blenda = 0; \
+ break; \
+ \
+ case 1: /* c_local */ \
+ blenda = c_local.rgb.a; \
+ break; \
+ \
+ case 2: /* a_other */ \
+ blenda = COTHER.rgb.a; \
+ break; \
+ \
+ case 3: /* a_local */ \
+ blenda = c_local.rgb.a; \
+ break; \
+ \
+ case 4: /* LOD (detail factor) */ \
+ if ((TT)->detailbias <= lod) \
+ blenda = 0; \
+ else \
+ { \
blenda = ((((TT)->detailbias - lod) << (TT)->detailscale) >> 8);\
- if (blenda > (TT)->detailmax) \
- blenda = (TT)->detailmax; \
- } \
- break; \
- \
- case 5: /* LOD fraction */ \
- blenda = lod & 0xff; \
- break; \
- } \
- \
- /* reverse the RGB blend */ \
- if (!TEXMODE_TC_REVERSE_BLEND(TEXMODE)) \
- { \
- blendr ^= 0xff; \
- blendg ^= 0xff; \
- blendb ^= 0xff; \
- } \
- \
- /* reverse the alpha blend */ \
- if (!TEXMODE_TCA_REVERSE_BLEND(TEXMODE)) \
- blenda ^= 0xff; \
- \
- /* do the blend */ \
- tr = (tr * (blendr + 1)) >> 8; \
- tg = (tg * (blendg + 1)) >> 8; \
- tb = (tb * (blendb + 1)) >> 8; \
- ta = (ta * (blenda + 1)) >> 8; \
- \
- /* add clocal or alocal to RGB */ \
- switch (TEXMODE_TC_ADD_ACLOCAL(TEXMODE)) \
- { \
- case 3: /* reserved */ \
- case 0: /* nothing */ \
- break; \
- \
- case 1: /* add c_local */ \
- tr += c_local.rgb.r; \
- tg += c_local.rgb.g; \
- tb += c_local.rgb.b; \
- break; \
- \
- case 2: /* add_alocal */ \
- tr += c_local.rgb.a; \
- tg += c_local.rgb.a; \
- tb += c_local.rgb.a; \
- break; \
- } \
- \
- /* add clocal or alocal to alpha */ \
- if (TEXMODE_TCA_ADD_ACLOCAL(TEXMODE)) \
- ta += c_local.rgb.a; \
- \
- /* clamp */ \
- RESULT.rgb.r = (tr < 0) ? 0 : (tr > 0xff) ? 0xff : tr; \
- RESULT.rgb.g = (tg < 0) ? 0 : (tg > 0xff) ? 0xff : tg; \
- RESULT.rgb.b = (tb < 0) ? 0 : (tb > 0xff) ? 0xff : tb; \
- RESULT.rgb.a = (ta < 0) ? 0 : (ta > 0xff) ? 0xff : ta; \
- \
- /* invert */ \
- if (TEXMODE_TC_INVERT_OUTPUT(TEXMODE)) \
- RESULT.u ^= 0x00ffffff; \
- if (TEXMODE_TCA_INVERT_OUTPUT(TEXMODE)) \
- RESULT.rgb.a ^= 0xff; \
-} \
+ if (blenda > (TT)->detailmax) \
+ blenda = (TT)->detailmax; \
+ } \
+ break; \
+ \
+ case 5: /* LOD fraction */ \
+ blenda = lod & 0xff; \
+ break; \
+ } \
+ \
+ /* reverse the RGB blend */ \
+ if (!TEXMODE_TC_REVERSE_BLEND(TEXMODE)) \
+ { \
+ blendr ^= 0xff; \
+ blendg ^= 0xff; \
+ blendb ^= 0xff; \
+ } \
+ \
+ /* reverse the alpha blend */ \
+ if (!TEXMODE_TCA_REVERSE_BLEND(TEXMODE)) \
+ blenda ^= 0xff; \
+ \
+ /* do the blend */ \
+ tr = (tr * (blendr + 1)) >> 8; \
+ tg = (tg * (blendg + 1)) >> 8; \
+ tb = (tb * (blendb + 1)) >> 8; \
+ ta = (ta * (blenda + 1)) >> 8; \
+ \
+ /* add clocal or alocal to RGB */ \
+ switch (TEXMODE_TC_ADD_ACLOCAL(TEXMODE)) \
+ { \
+ case 3: /* reserved */ \
+ case 0: /* nothing */ \
+ break; \
+ \
+ case 1: /* add c_local */ \
+ tr += c_local.rgb.r; \
+ tg += c_local.rgb.g; \
+ tb += c_local.rgb.b; \
+ break; \
+ \
+ case 2: /* add_alocal */ \
+ tr += c_local.rgb.a; \
+ tg += c_local.rgb.a; \
+ tb += c_local.rgb.a; \
+ break; \
+ } \
+ \
+ /* add clocal or alocal to alpha */ \
+ if (TEXMODE_TCA_ADD_ACLOCAL(TEXMODE)) \
+ ta += c_local.rgb.a; \
+ \
+ /* clamp */ \
+ RESULT.rgb.r = (tr < 0) ? 0 : (tr > 0xff) ? 0xff : tr; \
+ RESULT.rgb.g = (tg < 0) ? 0 : (tg > 0xff) ? 0xff : tg; \
+ RESULT.rgb.b = (tb < 0) ? 0 : (tb > 0xff) ? 0xff : tb; \
+ RESULT.rgb.a = (ta < 0) ? 0 : (ta > 0xff) ? 0xff : ta; \
+ \
+ /* invert */ \
+ if (TEXMODE_TC_INVERT_OUTPUT(TEXMODE)) \
+ RESULT.u ^= 0x00ffffff; \
+ if (TEXMODE_TCA_INVERT_OUTPUT(TEXMODE)) \
+ RESULT.rgb.a ^= 0xff; \
+} \
while (0)
@@ -3076,199 +3076,199 @@ while (0)
*
*************************************/
-#define PIXEL_PIPELINE_BEGIN(VV, STATS, XX, YY, FBZCOLORPATH, FBZMODE, ITERZ, ITERW) \
-do \
-{ \
- INT32 depthval, wfloat; \
- INT32 prefogr, prefogg, prefogb; \
- INT32 r, g, b, a; \
+#define PIXEL_PIPELINE_BEGIN(VV, STATS, XX, YY, FBZCOLORPATH, FBZMODE, ITERZ, ITERW) \
+do \
+{ \
+ INT32 depthval, wfloat; \
+ INT32 prefogr, prefogg, prefogb; \
+ INT32 r, g, b, a; \
\
- (STATS)->pixels_in++; \
+ (STATS)->pixels_in++; \
\
- /* apply clipping */ \
- /* note that for perf reasons, we assume the caller has done clipping */ \
+ /* apply clipping */ \
+ /* note that for perf reasons, we assume the caller has done clipping */ \
\
- /* handle stippling */ \
- if (FBZMODE_ENABLE_STIPPLE(FBZMODE)) \
- { \
- /* rotate mode */ \
- if (FBZMODE_STIPPLE_PATTERN(FBZMODE) == 0) \
- { \
+ /* handle stippling */ \
+ if (FBZMODE_ENABLE_STIPPLE(FBZMODE)) \
+ { \
+ /* rotate mode */ \
+ if (FBZMODE_STIPPLE_PATTERN(FBZMODE) == 0) \
+ { \
(VV)->reg[stipple].u = ((VV)->reg[stipple].u << 1) | ((VV)->reg[stipple].u >> 31);\
- if (((VV)->reg[stipple].u & 0x80000000) == 0) \
- { \
- (VV)->stats.total_stippled++; \
- goto skipdrawdepth; \
- } \
- } \
- \
- /* pattern mode */ \
- else \
- { \
- int stipple_index = (((YY) & 3) << 3) | (~(XX) & 7); \
- if ((((VV)->reg[stipple].u >> stipple_index) & 1) == 0) \
- { \
- (VV)->stats.total_stippled++; \
- goto skipdrawdepth; \
- } \
- } \
- } \
- \
- /* compute "floating point" W value (used for depth and fog) */ \
- if ((ITERW) & U64(0xffff00000000)) \
- wfloat = 0x0000; \
- else \
- { \
- UINT32 temp = (UINT32)(ITERW); \
- if ((temp & 0xffff0000) == 0) \
- wfloat = 0xffff; \
- else \
- { \
- int exp = count_leading_zeros(temp); \
- wfloat = ((exp << 12) | ((~temp >> (19 - exp)) & 0xfff)) + 1; \
- } \
- } \
- \
- /* compute depth value (W or Z) for this pixel */ \
- if (FBZMODE_WBUFFER_SELECT(FBZMODE) == 0) \
- CLAMPED_Z(ITERZ, FBZCOLORPATH, depthval); \
- else if (FBZMODE_DEPTH_FLOAT_SELECT(FBZMODE) == 0) \
- depthval = wfloat; \
- else \
- { \
- if ((ITERZ) & 0xf0000000) \
- depthval = 0x0000; \
- else \
- { \
- UINT32 temp = (ITERZ) << 4; \
- if ((temp & 0xffff0000) == 0) \
- depthval = 0xffff; \
- else \
- { \
- int exp = count_leading_zeros(temp); \
- depthval = ((exp << 12) | ((~temp >> (19 - exp)) & 0xfff)) + 1; \
- } \
- } \
- } \
- \
- /* add the bias */ \
- if (FBZMODE_ENABLE_DEPTH_BIAS(FBZMODE)) \
- { \
- depthval += (INT16)(VV)->reg[zaColor].u; \
- CLAMP(depthval, 0, 0xffff); \
- } \
- \
- /* handle depth buffer testing */ \
- if (FBZMODE_ENABLE_DEPTHBUF(FBZMODE)) \
- { \
- INT32 depthsource; \
- \
- /* the source depth is either the iterated W/Z+bias or a */ \
- /* constant value */ \
- if (FBZMODE_DEPTH_SOURCE_COMPARE(FBZMODE) == 0) \
- depthsource = depthval; \
- else \
- depthsource = (UINT16)(VV)->reg[zaColor].u; \
- \
- /* test against the depth buffer */ \
- switch (FBZMODE_DEPTH_FUNCTION(FBZMODE)) \
- { \
- case 0: /* depthOP = never */ \
- (STATS)->zfunc_fail++; \
- goto skipdrawdepth; \
- \
- case 1: /* depthOP = less than */ \
- if (depthsource >= depth[XX]) \
- { \
- (STATS)->zfunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 2: /* depthOP = equal */ \
- if (depthsource != depth[XX]) \
- { \
- (STATS)->zfunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 3: /* depthOP = less than or equal */ \
- if (depthsource > depth[XX]) \
- { \
- (STATS)->zfunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 4: /* depthOP = greater than */ \
- if (depthsource <= depth[XX]) \
- { \
- (STATS)->zfunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 5: /* depthOP = not equal */ \
- if (depthsource == depth[XX]) \
- { \
- (STATS)->zfunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 6: /* depthOP = greater than or equal */ \
- if (depthsource < depth[XX]) \
- { \
- (STATS)->zfunc_fail++; \
- goto skipdrawdepth; \
- } \
- break; \
- \
- case 7: /* depthOP = always */ \
- break; \
- } \
+ if (((VV)->reg[stipple].u & 0x80000000) == 0) \
+ { \
+ (VV)->stats.total_stippled++; \
+ goto skipdrawdepth; \
+ } \
+ } \
+ \
+ /* pattern mode */ \
+ else \
+ { \
+ int stipple_index = (((YY) & 3) << 3) | (~(XX) & 7); \
+ if ((((VV)->reg[stipple].u >> stipple_index) & 1) == 0) \
+ { \
+ (VV)->stats.total_stippled++; \
+ goto skipdrawdepth; \
+ } \
+ } \
+ } \
+ \
+ /* compute "floating point" W value (used for depth and fog) */ \
+ if ((ITERW) & U64(0xffff00000000)) \
+ wfloat = 0x0000; \
+ else \
+ { \
+ UINT32 temp = (UINT32)(ITERW); \
+ if ((temp & 0xffff0000) == 0) \
+ wfloat = 0xffff; \
+ else \
+ { \
+ int exp = count_leading_zeros(temp); \
+ wfloat = ((exp << 12) | ((~temp >> (19 - exp)) & 0xfff)) + 1; \
+ } \
+ } \
+ \
+ /* compute depth value (W or Z) for this pixel */ \
+ if (FBZMODE_WBUFFER_SELECT(FBZMODE) == 0) \
+ CLAMPED_Z(ITERZ, FBZCOLORPATH, depthval); \
+ else if (FBZMODE_DEPTH_FLOAT_SELECT(FBZMODE) == 0) \
+ depthval = wfloat; \
+ else \
+ { \
+ if ((ITERZ) & 0xf0000000) \
+ depthval = 0x0000; \
+ else \
+ { \
+ UINT32 temp = (ITERZ) << 4; \
+ if ((temp & 0xffff0000) == 0) \
+ depthval = 0xffff; \
+ else \
+ { \
+ int exp = count_leading_zeros(temp); \
+ depthval = ((exp << 12) | ((~temp >> (19 - exp)) & 0xfff)) + 1; \
+ } \
+ } \
+ } \
+ \
+ /* add the bias */ \
+ if (FBZMODE_ENABLE_DEPTH_BIAS(FBZMODE)) \
+ { \
+ depthval += (INT16)(VV)->reg[zaColor].u; \
+ CLAMP(depthval, 0, 0xffff); \
+ } \
+ \
+ /* handle depth buffer testing */ \
+ if (FBZMODE_ENABLE_DEPTHBUF(FBZMODE)) \
+ { \
+ INT32 depthsource; \
+ \
+ /* the source depth is either the iterated W/Z+bias or a */ \
+ /* constant value */ \
+ if (FBZMODE_DEPTH_SOURCE_COMPARE(FBZMODE) == 0) \
+ depthsource = depthval; \
+ else \
+ depthsource = (UINT16)(VV)->reg[zaColor].u; \
+ \
+ /* test against the depth buffer */ \
+ switch (FBZMODE_DEPTH_FUNCTION(FBZMODE)) \
+ { \
+ case 0: /* depthOP = never */ \
+ (STATS)->zfunc_fail++; \
+ goto skipdrawdepth; \
+ \
+ case 1: /* depthOP = less than */ \
+ if (depthsource >= depth[XX]) \
+ { \
+ (STATS)->zfunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 2: /* depthOP = equal */ \
+ if (depthsource != depth[XX]) \
+ { \
+ (STATS)->zfunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 3: /* depthOP = less than or equal */ \
+ if (depthsource > depth[XX]) \
+ { \
+ (STATS)->zfunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 4: /* depthOP = greater than */ \
+ if (depthsource <= depth[XX]) \
+ { \
+ (STATS)->zfunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 5: /* depthOP = not equal */ \
+ if (depthsource == depth[XX]) \
+ { \
+ (STATS)->zfunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 6: /* depthOP = greater than or equal */ \
+ if (depthsource < depth[XX]) \
+ { \
+ (STATS)->zfunc_fail++; \
+ goto skipdrawdepth; \
+ } \
+ break; \
+ \
+ case 7: /* depthOP = always */ \
+ break; \
+ } \
}
#define PIXEL_PIPELINE_END(VV, STATS, DITHER, DITHER4, DITHER_LOOKUP, XX, dest, depth, FBZMODE, FBZCOLORPATH, ALPHAMODE, FOGMODE, ITERZ, ITERW, ITERAXXX) \
\
- /* perform fogging */ \
- prefogr = r; \
- prefogg = g; \
- prefogb = b; \
- APPLY_FOGGING(VV, FOGMODE, FBZCOLORPATH, XX, DITHER4, r, g, b, \
- ITERZ, ITERW, ITERAXXX); \
- \
- /* perform alpha blending */ \
- APPLY_ALPHA_BLEND(FBZMODE, ALPHAMODE, XX, DITHER, r, g, b, a); \
- \
- /* modify the pixel for debugging purposes */ \
- MODIFY_PIXEL(VV); \
- \
- /* write to framebuffer */ \
- if (FBZMODE_RGB_BUFFER_MASK(FBZMODE)) \
- { \
- /* apply dithering */ \
- APPLY_DITHER(FBZMODE, XX, DITHER_LOOKUP, r, g, b); \
- dest[XX] = (r << 11) | (g << 5) | b; \
- } \
- \
- /* write to aux buffer */ \
- if (depth && FBZMODE_AUX_BUFFER_MASK(FBZMODE)) \
- { \
- if (FBZMODE_ENABLE_ALPHA_PLANES(FBZMODE) == 0) \
- depth[XX] = depthval; \
- else \
- depth[XX] = a; \
- } \
- \
- /* track pixel writes to the frame buffer regardless of mask */ \
- (STATS)->pixels_out++; \
- \
-skipdrawdepth: \
- ; \
-} \
+ /* perform fogging */ \
+ prefogr = r; \
+ prefogg = g; \
+ prefogb = b; \
+ APPLY_FOGGING(VV, FOGMODE, FBZCOLORPATH, XX, DITHER4, r, g, b, \
+ ITERZ, ITERW, ITERAXXX); \
+ \
+ /* perform alpha blending */ \
+ APPLY_ALPHA_BLEND(FBZMODE, ALPHAMODE, XX, DITHER, r, g, b, a); \
+ \
+ /* modify the pixel for debugging purposes */ \
+ MODIFY_PIXEL(VV); \
+ \
+ /* write to framebuffer */ \
+ if (FBZMODE_RGB_BUFFER_MASK(FBZMODE)) \
+ { \
+ /* apply dithering */ \
+ APPLY_DITHER(FBZMODE, XX, DITHER_LOOKUP, r, g, b); \
+ dest[XX] = (r << 11) | (g << 5) | b; \
+ } \
+ \
+ /* write to aux buffer */ \
+ if (depth && FBZMODE_AUX_BUFFER_MASK(FBZMODE)) \
+ { \
+ if (FBZMODE_ENABLE_ALPHA_PLANES(FBZMODE) == 0) \
+ depth[XX] = depthval; \
+ else \
+ depth[XX] = a; \
+ } \
+ \
+ /* track pixel writes to the frame buffer regardless of mask */ \
+ (STATS)->pixels_out++; \
+ \
+skipdrawdepth: \
+ ; \
+} \
while (0)
@@ -3317,250 +3317,250 @@ while (0)
INT32 r, g, b, a;
*/
#define COLORPATH_PIPELINE(VV, STATS, FBZCOLORPATH, FBZMODE, ALPHAMODE, TEXELARGB, ITERZ, ITERW, ITERARGB) \
-do \
-{ \
- INT32 blendr, blendg, blendb, blenda; \
- rgb_union c_other; \
- rgb_union c_local; \
- \
- /* compute c_other */ \
- switch (FBZCP_CC_RGBSELECT(FBZCOLORPATH)) \
- { \
- case 0: /* iterated RGB */ \
- c_other.u = ITERARGB.u; \
- break; \
- \
- case 1: /* texture RGB */ \
- c_other.u = TEXELARGB.u; \
- break; \
- \
- case 2: /* color1 RGB */ \
- c_other.u = (VV)->reg[color1].u; \
- break; \
- \
- default: /* reserved */ \
- c_other.u = 0; \
- break; \
- } \
- \
- /* handle chroma key */ \
- APPLY_CHROMAKEY(VV, STATS, FBZMODE, c_other); \
- \
- /* compute a_other */ \
- switch (FBZCP_CC_ASELECT(FBZCOLORPATH)) \
- { \
- case 0: /* iterated alpha */ \
- c_other.rgb.a = ITERARGB.rgb.a; \
- break; \
- \
- case 1: /* texture alpha */ \
- c_other.rgb.a = TEXELARGB.rgb.a; \
- break; \
- \
- case 2: /* color1 alpha */ \
- c_other.rgb.a = (VV)->reg[color1].rgb.a; \
- break; \
- \
- default: /* reserved */ \
- c_other.rgb.a = 0; \
- break; \
- } \
- \
- /* handle alpha mask */ \
- APPLY_ALPHAMASK(VV, STATS, FBZMODE, c_other.rgb.a); \
- \
- /* handle alpha test */ \
- APPLY_ALPHATEST(VV, STATS, ALPHAMODE, c_other.rgb.a); \
- \
- /* compute c_local */ \
- if (FBZCP_CC_LOCALSELECT_OVERRIDE(FBZCOLORPATH) == 0) \
- { \
- if (FBZCP_CC_LOCALSELECT(FBZCOLORPATH) == 0) /* iterated RGB */ \
- c_local.u = ITERARGB.u; \
- else /* color0 RGB */ \
- c_local.u = (VV)->reg[color0].u; \
- } \
- else \
- { \
- if (!(TEXELARGB.rgb.a & 0x80)) /* iterated RGB */ \
- c_local.u = ITERARGB.u; \
- else /* color0 RGB */ \
- c_local.u = (VV)->reg[color0].u; \
- } \
- \
- /* compute a_local */ \
- switch (FBZCP_CCA_LOCALSELECT(FBZCOLORPATH)) \
- { \
- default: \
- case 0: /* iterated alpha */ \
- c_local.rgb.a = ITERARGB.rgb.a; \
- break; \
- \
- case 1: /* color0 alpha */ \
- c_local.rgb.a = (VV)->reg[color0].rgb.a; \
- break; \
- \
- case 2: /* clamped iterated Z[27:20] */ \
- { \
- int temp; \
- CLAMPED_Z(ITERZ, FBZCOLORPATH, temp); \
- c_local.rgb.a = (UINT8)temp; \
- break; \
- } \
- \
- case 3: /* clamped iterated W[39:32] */ \
- { \
- int temp; \
- CLAMPED_W(ITERW, FBZCOLORPATH, temp); /* Voodoo 2 only */ \
- c_local.rgb.a = (UINT8)temp; \
- break; \
- } \
- } \
- \
- /* select zero or c_other */ \
- if (FBZCP_CC_ZERO_OTHER(FBZCOLORPATH) == 0) \
- { \
- r = c_other.rgb.r; \
- g = c_other.rgb.g; \
- b = c_other.rgb.b; \
- } \
- else \
- r = g = b = 0; \
- \
- /* select zero or a_other */ \
- if (FBZCP_CCA_ZERO_OTHER(FBZCOLORPATH) == 0) \
- a = c_other.rgb.a; \
- else \
- a = 0; \
- \
- /* subtract c_local */ \
- if (FBZCP_CC_SUB_CLOCAL(FBZCOLORPATH)) \
- { \
- r -= c_local.rgb.r; \
- g -= c_local.rgb.g; \
- b -= c_local.rgb.b; \
- } \
- \
- /* subtract a_local */ \
- if (FBZCP_CCA_SUB_CLOCAL(FBZCOLORPATH)) \
- a -= c_local.rgb.a; \
- \
- /* blend RGB */ \
- switch (FBZCP_CC_MSELECT(FBZCOLORPATH)) \
- { \
- default: /* reserved */ \
- case 0: /* 0 */ \
- blendr = blendg = blendb = 0; \
- break; \
- \
- case 1: /* c_local */ \
- blendr = c_local.rgb.r; \
- blendg = c_local.rgb.g; \
- blendb = c_local.rgb.b; \
- break; \
- \
- case 2: /* a_other */ \
- blendr = blendg = blendb = c_other.rgb.a; \
- break; \
- \
- case 3: /* a_local */ \
- blendr = blendg = blendb = c_local.rgb.a; \
- break; \
- \
- case 4: /* texture alpha */ \
- blendr = blendg = blendb = TEXELARGB.rgb.a; \
- break; \
- \
- case 5: /* texture RGB (Voodoo 2 only) */ \
- blendr = TEXELARGB.rgb.r; \
- blendg = TEXELARGB.rgb.g; \
- blendb = TEXELARGB.rgb.b; \
- break; \
- } \
- \
- /* blend alpha */ \
- switch (FBZCP_CCA_MSELECT(FBZCOLORPATH)) \
- { \
- default: /* reserved */ \
- case 0: /* 0 */ \
- blenda = 0; \
- break; \
- \
- case 1: /* a_local */ \
- blenda = c_local.rgb.a; \
- break; \
- \
- case 2: /* a_other */ \
- blenda = c_other.rgb.a; \
- break; \
- \
- case 3: /* a_local */ \
- blenda = c_local.rgb.a; \
- break; \
- \
- case 4: /* texture alpha */ \
- blenda = TEXELARGB.rgb.a; \
- break; \
- } \
- \
- /* reverse the RGB blend */ \
- if (!FBZCP_CC_REVERSE_BLEND(FBZCOLORPATH)) \
- { \
- blendr ^= 0xff; \
- blendg ^= 0xff; \
- blendb ^= 0xff; \
- } \
- \
- /* reverse the alpha blend */ \
- if (!FBZCP_CCA_REVERSE_BLEND(FBZCOLORPATH)) \
- blenda ^= 0xff; \
- \
- /* do the blend */ \
- r = (r * (blendr + 1)) >> 8; \
- g = (g * (blendg + 1)) >> 8; \
- b = (b * (blendb + 1)) >> 8; \
- a = (a * (blenda + 1)) >> 8; \
- \
- /* add clocal or alocal to RGB */ \
- switch (FBZCP_CC_ADD_ACLOCAL(FBZCOLORPATH)) \
- { \
- case 3: /* reserved */ \
- case 0: /* nothing */ \
- break; \
- \
- case 1: /* add c_local */ \
- r += c_local.rgb.r; \
- g += c_local.rgb.g; \
- b += c_local.rgb.b; \
- break; \
- \
- case 2: /* add_alocal */ \
- r += c_local.rgb.a; \
- g += c_local.rgb.a; \
- b += c_local.rgb.a; \
- break; \
- } \
- \
- /* add clocal or alocal to alpha */ \
- if (FBZCP_CCA_ADD_ACLOCAL(FBZCOLORPATH)) \
- a += c_local.rgb.a; \
- \
- /* clamp */ \
- CLAMP(r, 0x00, 0xff); \
- CLAMP(g, 0x00, 0xff); \
- CLAMP(b, 0x00, 0xff); \
- CLAMP(a, 0x00, 0xff); \
- \
- /* invert */ \
- if (FBZCP_CC_INVERT_OUTPUT(FBZCOLORPATH)) \
- { \
- r ^= 0xff; \
- g ^= 0xff; \
- b ^= 0xff; \
- } \
- if (FBZCP_CCA_INVERT_OUTPUT(FBZCOLORPATH)) \
- a ^= 0xff; \
-} \
+do \
+{ \
+ INT32 blendr, blendg, blendb, blenda; \
+ rgb_union c_other; \
+ rgb_union c_local; \
+ \
+ /* compute c_other */ \
+ switch (FBZCP_CC_RGBSELECT(FBZCOLORPATH)) \
+ { \
+ case 0: /* iterated RGB */ \
+ c_other.u = ITERARGB.u; \
+ break; \
+ \
+ case 1: /* texture RGB */ \
+ c_other.u = TEXELARGB.u; \
+ break; \
+ \
+ case 2: /* color1 RGB */ \
+ c_other.u = (VV)->reg[color1].u; \
+ break; \
+ \
+ default: /* reserved */ \
+ c_other.u = 0; \
+ break; \
+ } \
+ \
+ /* handle chroma key */ \
+ APPLY_CHROMAKEY(VV, STATS, FBZMODE, c_other); \
+ \
+ /* compute a_other */ \
+ switch (FBZCP_CC_ASELECT(FBZCOLORPATH)) \
+ { \
+ case 0: /* iterated alpha */ \
+ c_other.rgb.a = ITERARGB.rgb.a; \
+ break; \
+ \
+ case 1: /* texture alpha */ \
+ c_other.rgb.a = TEXELARGB.rgb.a; \
+ break; \
+ \
+ case 2: /* color1 alpha */ \
+ c_other.rgb.a = (VV)->reg[color1].rgb.a; \
+ break; \
+ \
+ default: /* reserved */ \
+ c_other.rgb.a = 0; \
+ break; \
+ } \
+ \
+ /* handle alpha mask */ \
+ APPLY_ALPHAMASK(VV, STATS, FBZMODE, c_other.rgb.a); \
+ \
+ /* handle alpha test */ \
+ APPLY_ALPHATEST(VV, STATS, ALPHAMODE, c_other.rgb.a); \
+ \
+ /* compute c_local */ \
+ if (FBZCP_CC_LOCALSELECT_OVERRIDE(FBZCOLORPATH) == 0) \
+ { \
+ if (FBZCP_CC_LOCALSELECT(FBZCOLORPATH) == 0) /* iterated RGB */ \
+ c_local.u = ITERARGB.u; \
+ else /* color0 RGB */ \
+ c_local.u = (VV)->reg[color0].u; \
+ } \
+ else \
+ { \
+ if (!(TEXELARGB.rgb.a & 0x80)) /* iterated RGB */ \
+ c_local.u = ITERARGB.u; \
+ else /* color0 RGB */ \
+ c_local.u = (VV)->reg[color0].u; \
+ } \
+ \
+ /* compute a_local */ \
+ switch (FBZCP_CCA_LOCALSELECT(FBZCOLORPATH)) \
+ { \
+ default: \
+ case 0: /* iterated alpha */ \
+ c_local.rgb.a = ITERARGB.rgb.a; \
+ break; \
+ \
+ case 1: /* color0 alpha */ \
+ c_local.rgb.a = (VV)->reg[color0].rgb.a; \
+ break; \
+ \
+ case 2: /* clamped iterated Z[27:20] */ \
+ { \
+ int temp; \
+ CLAMPED_Z(ITERZ, FBZCOLORPATH, temp); \
+ c_local.rgb.a = (UINT8)temp; \
+ break; \
+ } \
+ \
+ case 3: /* clamped iterated W[39:32] */ \
+ { \
+ int temp; \
+ CLAMPED_W(ITERW, FBZCOLORPATH, temp); /* Voodoo 2 only */ \
+ c_local.rgb.a = (UINT8)temp; \
+ break; \
+ } \
+ } \
+ \
+ /* select zero or c_other */ \
+ if (FBZCP_CC_ZERO_OTHER(FBZCOLORPATH) == 0) \
+ { \
+ r = c_other.rgb.r; \
+ g = c_other.rgb.g; \
+ b = c_other.rgb.b; \
+ } \
+ else \
+ r = g = b = 0; \
+ \
+ /* select zero or a_other */ \
+ if (FBZCP_CCA_ZERO_OTHER(FBZCOLORPATH) == 0) \
+ a = c_other.rgb.a; \
+ else \
+ a = 0; \
+ \
+ /* subtract c_local */ \
+ if (FBZCP_CC_SUB_CLOCAL(FBZCOLORPATH)) \
+ { \
+ r -= c_local.rgb.r; \
+ g -= c_local.rgb.g; \
+ b -= c_local.rgb.b; \
+ } \
+ \
+ /* subtract a_local */ \
+ if (FBZCP_CCA_SUB_CLOCAL(FBZCOLORPATH)) \
+ a -= c_local.rgb.a; \
+ \
+ /* blend RGB */ \
+ switch (FBZCP_CC_MSELECT(FBZCOLORPATH)) \
+ { \
+ default: /* reserved */ \
+ case 0: /* 0 */ \
+ blendr = blendg = blendb = 0; \
+ break; \
+ \
+ case 1: /* c_local */ \
+ blendr = c_local.rgb.r; \
+ blendg = c_local.rgb.g; \
+ blendb = c_local.rgb.b; \
+ break; \
+ \
+ case 2: /* a_other */ \
+ blendr = blendg = blendb = c_other.rgb.a; \
+ break; \
+ \
+ case 3: /* a_local */ \
+ blendr = blendg = blendb = c_local.rgb.a; \
+ break; \
+ \
+ case 4: /* texture alpha */ \
+ blendr = blendg = blendb = TEXELARGB.rgb.a; \
+ break; \
+ \
+ case 5: /* texture RGB (Voodoo 2 only) */ \
+ blendr = TEXELARGB.rgb.r; \
+ blendg = TEXELARGB.rgb.g; \
+ blendb = TEXELARGB.rgb.b; \
+ break; \
+ } \
+ \
+ /* blend alpha */ \
+ switch (FBZCP_CCA_MSELECT(FBZCOLORPATH)) \
+ { \
+ default: /* reserved */ \
+ case 0: /* 0 */ \
+ blenda = 0; \
+ break; \
+ \
+ case 1: /* a_local */ \
+ blenda = c_local.rgb.a; \
+ break; \
+ \
+ case 2: /* a_other */ \
+ blenda = c_other.rgb.a; \
+ break; \
+ \
+ case 3: /* a_local */ \
+ blenda = c_local.rgb.a; \
+ break; \
+ \
+ case 4: /* texture alpha */ \
+ blenda = TEXELARGB.rgb.a; \
+ break; \
+ } \
+ \
+ /* reverse the RGB blend */ \
+ if (!FBZCP_CC_REVERSE_BLEND(FBZCOLORPATH)) \
+ { \
+ blendr ^= 0xff; \
+ blendg ^= 0xff; \
+ blendb ^= 0xff; \
+ } \
+ \
+ /* reverse the alpha blend */ \
+ if (!FBZCP_CCA_REVERSE_BLEND(FBZCOLORPATH)) \
+ blenda ^= 0xff; \
+ \
+ /* do the blend */ \
+ r = (r * (blendr + 1)) >> 8; \
+ g = (g * (blendg + 1)) >> 8; \
+ b = (b * (blendb + 1)) >> 8; \
+ a = (a * (blenda + 1)) >> 8; \
+ \
+ /* add clocal or alocal to RGB */ \
+ switch (FBZCP_CC_ADD_ACLOCAL(FBZCOLORPATH)) \
+ { \
+ case 3: /* reserved */ \
+ case 0: /* nothing */ \
+ break; \
+ \
+ case 1: /* add c_local */ \
+ r += c_local.rgb.r; \
+ g += c_local.rgb.g; \
+ b += c_local.rgb.b; \
+ break; \
+ \
+ case 2: /* add_alocal */ \
+ r += c_local.rgb.a; \
+ g += c_local.rgb.a; \
+ b += c_local.rgb.a; \
+ break; \
+ } \
+ \
+ /* add clocal or alocal to alpha */ \
+ if (FBZCP_CCA_ADD_ACLOCAL(FBZCOLORPATH)) \
+ a += c_local.rgb.a; \
+ \
+ /* clamp */ \
+ CLAMP(r, 0x00, 0xff); \
+ CLAMP(g, 0x00, 0xff); \
+ CLAMP(b, 0x00, 0xff); \
+ CLAMP(a, 0x00, 0xff); \
+ \
+ /* invert */ \
+ if (FBZCP_CC_INVERT_OUTPUT(FBZCOLORPATH)) \
+ { \
+ r ^= 0xff; \
+ g ^= 0xff; \
+ b ^= 0xff; \
+ } \
+ if (FBZCP_CCA_INVERT_OUTPUT(FBZCOLORPATH)) \
+ a ^= 0xff; \
+} \
while (0)
@@ -3574,142 +3574,142 @@ while (0)
#define RASTERIZER(name, TMUS, FBZCOLORPATH, FBZMODE, ALPHAMODE, FOGMODE, TEXMODE0, TEXMODE1) \
\
static void raster_##name(void *destbase, INT32 y, const poly_extent *extent, const void *extradata, int threadid) \
-{ \
- const poly_extra_data *extra = (const poly_extra_data *)extradata; \
- voodoo_state *v = extra->state; \
- stats_block *stats = &v->thread_stats[threadid]; \
- DECLARE_DITHER_POINTERS; \
- INT32 startx = extent->startx; \
- INT32 stopx = extent->stopx; \
- INT32 iterr, iterg, iterb, itera; \
- INT32 iterz; \
- INT64 iterw, iterw0 = 0, iterw1 = 0; \
- INT64 iters0 = 0, iters1 = 0; \
- INT64 itert0 = 0, itert1 = 0; \
- UINT16 *depth; \
- UINT16 *dest; \
- INT32 dx, dy; \
- INT32 scry; \
- INT32 x; \
- \
- /* determine the screen Y */ \
- scry = y; \
- if (FBZMODE_Y_ORIGIN(FBZMODE)) \
- scry = (v->fbi.yorigin - y) & 0x3ff; \
- \
- /* compute dithering */ \
- COMPUTE_DITHER_POINTERS(FBZMODE, y); \
- \
- /* apply clipping */ \
- if (FBZMODE_ENABLE_CLIPPING(FBZMODE)) \
- { \
- INT32 tempclip; \
- \
- /* Y clipping buys us the whole scanline */ \
- if (scry < ((v->reg[clipLowYHighY].u >> 16) & 0x3ff) || \
- scry >= (v->reg[clipLowYHighY].u & 0x3ff)) \
- { \
- stats->pixels_in += stopx - startx; \
- stats->clip_fail += stopx - startx; \
- return; \
- } \
- \
- /* X clipping */ \
- tempclip = (v->reg[clipLeftRight].u >> 16) & 0x3ff; \
- if (startx < tempclip) \
- { \
- stats->pixels_in += tempclip - startx; \
- v->stats.total_clipped += tempclip - startx; \
- startx = tempclip; \
- } \
- tempclip = v->reg[clipLeftRight].u & 0x3ff; \
- if (stopx >= tempclip) \
- { \
- stats->pixels_in += stopx - tempclip; \
- v->stats.total_clipped += stopx - tempclip; \
- stopx = tempclip - 1; \
- } \
- } \
- \
- /* get pointers to the target buffer and depth buffer */ \
- dest = (UINT16 *)destbase + scry * v->fbi.rowpixels; \
+{ \
+ const poly_extra_data *extra = (const poly_extra_data *)extradata; \
+ voodoo_state *v = extra->state; \
+ stats_block *stats = &v->thread_stats[threadid]; \
+ DECLARE_DITHER_POINTERS; \
+ INT32 startx = extent->startx; \
+ INT32 stopx = extent->stopx; \
+ INT32 iterr, iterg, iterb, itera; \
+ INT32 iterz; \
+ INT64 iterw, iterw0 = 0, iterw1 = 0; \
+ INT64 iters0 = 0, iters1 = 0; \
+ INT64 itert0 = 0, itert1 = 0; \
+ UINT16 *depth; \
+ UINT16 *dest; \
+ INT32 dx, dy; \
+ INT32 scry; \
+ INT32 x; \
+ \
+ /* determine the screen Y */ \
+ scry = y; \
+ if (FBZMODE_Y_ORIGIN(FBZMODE)) \
+ scry = (v->fbi.yorigin - y) & 0x3ff; \
+ \
+ /* compute dithering */ \
+ COMPUTE_DITHER_POINTERS(FBZMODE, y); \
+ \
+ /* apply clipping */ \
+ if (FBZMODE_ENABLE_CLIPPING(FBZMODE)) \
+ { \
+ INT32 tempclip; \
+ \
+ /* Y clipping buys us the whole scanline */ \
+ if (scry < ((v->reg[clipLowYHighY].u >> 16) & 0x3ff) || \
+ scry >= (v->reg[clipLowYHighY].u & 0x3ff)) \
+ { \
+ stats->pixels_in += stopx - startx; \
+ stats->clip_fail += stopx - startx; \
+ return; \
+ } \
+ \
+ /* X clipping */ \
+ tempclip = (v->reg[clipLeftRight].u >> 16) & 0x3ff; \
+ if (startx < tempclip) \
+ { \
+ stats->pixels_in += tempclip - startx; \
+ v->stats.total_clipped += tempclip - startx; \
+ startx = tempclip; \
+ } \
+ tempclip = v->reg[clipLeftRight].u & 0x3ff; \
+ if (stopx >= tempclip) \
+ { \
+ stats->pixels_in += stopx - tempclip; \
+ v->stats.total_clipped += stopx - tempclip; \
+ stopx = tempclip - 1; \
+ } \
+ } \
+ \
+ /* get pointers to the target buffer and depth buffer */ \
+ dest = (UINT16 *)destbase + scry * v->fbi.rowpixels; \
depth = (v->fbi.auxoffs != ~0) ? ((UINT16 *)(v->fbi.ram + v->fbi.auxoffs) + scry * v->fbi.rowpixels) : NULL; \
\
- /* compute the starting parameters */ \
- dx = startx - (extra->ax >> 4); \
- dy = y - (extra->ay >> 4); \
- iterr = extra->startr + dy * extra->drdy + dx * extra->drdx; \
- iterg = extra->startg + dy * extra->dgdy + dx * extra->dgdx; \
- iterb = extra->startb + dy * extra->dbdy + dx * extra->dbdx; \
- itera = extra->starta + dy * extra->dady + dx * extra->dadx; \
- iterz = extra->startz + dy * extra->dzdy + dx * extra->dzdx; \
- iterw = extra->startw + dy * extra->dwdy + dx * extra->dwdx; \
- if (TMUS >= 1) \
- { \
- iterw0 = extra->startw0 + dy * extra->dw0dy + dx * extra->dw0dx; \
- iters0 = extra->starts0 + dy * extra->ds0dy + dx * extra->ds0dx; \
- itert0 = extra->startt0 + dy * extra->dt0dy + dx * extra->dt0dx; \
- } \
- if (TMUS >= 2) \
- { \
- iterw1 = extra->startw1 + dy * extra->dw1dy + dx * extra->dw1dx; \
- iters1 = extra->starts1 + dy * extra->ds1dy + dx * extra->ds1dx; \
- itert1 = extra->startt1 + dy * extra->dt1dy + dx * extra->dt1dx; \
- } \
- \
- /* loop in X */ \
- for (x = startx; x < stopx; x++) \
- { \
- rgb_union iterargb = { 0 }; \
- rgb_union texel = { 0 }; \
- \
- /* pixel pipeline part 1 handles depth testing and stippling */ \
- PIXEL_PIPELINE_BEGIN(v, stats, x, y, FBZCOLORPATH, FBZMODE, \
- iterz, iterw); \
- \
- /* run the texture pipeline on TMU1 to produce a value in texel */ \
- /* note that they set LOD min to 8 to "disable" a TMU */ \
- if (TMUS >= 2 && v->tmu[1].lodmin < (8 << 8)) \
- TEXTURE_PIPELINE(&v->tmu[1], x, dither4, TEXMODE1, texel, \
- v->tmu[1].lookup, extra->lodbase1, \
- iters1, itert1, iterw1, texel); \
- \
- /* run the texture pipeline on TMU0 to produce a final */ \
- /* result in texel */ \
- /* note that they set LOD min to 8 to "disable" a TMU */ \
- if (TMUS >= 1 && v->tmu[0].lodmin < (8 << 8)) \
- TEXTURE_PIPELINE(&v->tmu[0], x, dither4, TEXMODE0, texel, \
- v->tmu[0].lookup, extra->lodbase0, \
- iters0, itert0, iterw0, texel); \
- \
- /* colorpath pipeline selects source colors and does blending */ \
- CLAMPED_ARGB(iterr, iterg, iterb, itera, FBZCOLORPATH, iterargb); \
- COLORPATH_PIPELINE(v, stats, FBZCOLORPATH, FBZMODE, ALPHAMODE, texel, \
- iterz, iterw, iterargb); \
- \
- /* pixel pipeline part 2 handles fog, alpha, and final output */ \
+ /* compute the starting parameters */ \
+ dx = startx - (extra->ax >> 4); \
+ dy = y - (extra->ay >> 4); \
+ iterr = extra->startr + dy * extra->drdy + dx * extra->drdx; \
+ iterg = extra->startg + dy * extra->dgdy + dx * extra->dgdx; \
+ iterb = extra->startb + dy * extra->dbdy + dx * extra->dbdx; \
+ itera = extra->starta + dy * extra->dady + dx * extra->dadx; \
+ iterz = extra->startz + dy * extra->dzdy + dx * extra->dzdx; \
+ iterw = extra->startw + dy * extra->dwdy + dx * extra->dwdx; \
+ if (TMUS >= 1) \
+ { \
+ iterw0 = extra->startw0 + dy * extra->dw0dy + dx * extra->dw0dx; \
+ iters0 = extra->starts0 + dy * extra->ds0dy + dx * extra->ds0dx; \
+ itert0 = extra->startt0 + dy * extra->dt0dy + dx * extra->dt0dx; \
+ } \
+ if (TMUS >= 2) \
+ { \
+ iterw1 = extra->startw1 + dy * extra->dw1dy + dx * extra->dw1dx; \
+ iters1 = extra->starts1 + dy * extra->ds1dy + dx * extra->ds1dx; \
+ itert1 = extra->startt1 + dy * extra->dt1dy + dx * extra->dt1dx; \
+ } \
+ \
+ /* loop in X */ \
+ for (x = startx; x < stopx; x++) \
+ { \
+ rgb_union iterargb = { 0 }; \
+ rgb_union texel = { 0 }; \
+ \
+ /* pixel pipeline part 1 handles depth testing and stippling */ \
+ PIXEL_PIPELINE_BEGIN(v, stats, x, y, FBZCOLORPATH, FBZMODE, \
+ iterz, iterw); \
+ \
+ /* run the texture pipeline on TMU1 to produce a value in texel */ \
+ /* note that they set LOD min to 8 to "disable" a TMU */ \
+ if (TMUS >= 2 && v->tmu[1].lodmin < (8 << 8)) \
+ TEXTURE_PIPELINE(&v->tmu[1], x, dither4, TEXMODE1, texel, \
+ v->tmu[1].lookup, extra->lodbase1, \
+ iters1, itert1, iterw1, texel); \
+ \
+ /* run the texture pipeline on TMU0 to produce a final */ \
+ /* result in texel */ \
+ /* note that they set LOD min to 8 to "disable" a TMU */ \
+ if (TMUS >= 1 && v->tmu[0].lodmin < (8 << 8)) \
+ TEXTURE_PIPELINE(&v->tmu[0], x, dither4, TEXMODE0, texel, \
+ v->tmu[0].lookup, extra->lodbase0, \
+ iters0, itert0, iterw0, texel); \
+ \
+ /* colorpath pipeline selects source colors and does blending */ \
+ CLAMPED_ARGB(iterr, iterg, iterb, itera, FBZCOLORPATH, iterargb); \
+ COLORPATH_PIPELINE(v, stats, FBZCOLORPATH, FBZMODE, ALPHAMODE, texel, \
+ iterz, iterw, iterargb); \
+ \
+ /* pixel pipeline part 2 handles fog, alpha, and final output */ \
PIXEL_PIPELINE_END(v, stats, dither, dither4, dither_lookup, x, dest, depth, \
- FBZMODE, FBZCOLORPATH, ALPHAMODE, FOGMODE, \
- iterz, iterw, iterargb); \
- \
- /* update the iterated parameters */ \
- iterr += extra->drdx; \
- iterg += extra->dgdx; \
- iterb += extra->dbdx; \
- itera += extra->dadx; \
- iterz += extra->dzdx; \
- iterw += extra->dwdx; \
- if (TMUS >= 1) \
- { \
- iterw0 += extra->dw0dx; \
- iters0 += extra->ds0dx; \
- itert0 += extra->dt0dx; \
- } \
- if (TMUS >= 2) \
- { \
- iterw1 += extra->dw1dx; \
- iters1 += extra->ds1dx; \
- itert1 += extra->dt1dx; \
- } \
- } \
+ FBZMODE, FBZCOLORPATH, ALPHAMODE, FOGMODE, \
+ iterz, iterw, iterargb); \
+ \
+ /* update the iterated parameters */ \
+ iterr += extra->drdx; \
+ iterg += extra->dgdx; \
+ iterb += extra->dbdx; \
+ itera += extra->dadx; \
+ iterz += extra->dzdx; \
+ iterw += extra->dwdx; \
+ if (TMUS >= 1) \
+ { \
+ iterw0 += extra->dw0dx; \
+ iters0 += extra->ds0dx; \
+ itert0 += extra->dt0dx; \
+ } \
+ if (TMUS >= 2) \
+ { \
+ iterw1 += extra->dw1dx; \
+ iters1 += extra->ds1dx; \
+ itert1 += extra->dt1dx; \
+ } \
+ } \
}
diff --git a/src/emu/video/voodoo.c b/src/emu/video/voodoo.c
index c84da37985b..78807915ce2 100644
--- a/src/emu/video/voodoo.c
+++ b/src/emu/video/voodoo.c
@@ -186,20 +186,20 @@ bits(7:4) and bit(24)), X, and Y:
*
*************************************/
-#define DEBUG_DEPTH (0)
-#define DEBUG_LOD (0)
-
-#define LOG_VBLANK_SWAP (0)
-#define LOG_FIFO (0)
-#define LOG_FIFO_VERBOSE (0)
-#define LOG_REGISTERS (0)
-#define LOG_WAITS (0)
-#define LOG_LFB (0)
-#define LOG_TEXTURE_RAM (0)
-#define LOG_RASTERIZERS (0)
-#define LOG_CMDFIFO (0)
-#define LOG_CMDFIFO_VERBOSE (0)
-#define LOG_BANSHEE_2D (0)
+#define DEBUG_DEPTH (0)
+#define DEBUG_LOD (0)
+
+#define LOG_VBLANK_SWAP (0)
+#define LOG_FIFO (0)
+#define LOG_FIFO_VERBOSE (0)
+#define LOG_REGISTERS (0)
+#define LOG_WAITS (0)
+#define LOG_LFB (0)
+#define LOG_TEXTURE_RAM (0)
+#define LOG_RASTERIZERS (0)
+#define LOG_CMDFIFO (0)
+#define LOG_CMDFIFO_VERBOSE (0)
+#define LOG_BANSHEE_2D (0)
#define MODIFY_PIXEL(VV)
@@ -1002,9 +1002,9 @@ static TIMER_CALLBACK( vblank_off_callback )
// TODO: Vblank IRQ enable is VOODOO3 only?
if (v->type >= TYPE_VOODOO_3)
{
- if (v->reg[intrCtrl].u & 0x8) // call IRQ handler if VSYNC interrupt (falling) is enabled
+ if (v->reg[intrCtrl].u & 0x8) // call IRQ handler if VSYNC interrupt (falling) is enabled
{
- v->reg[intrCtrl].u |= 0x200; // VSYNC int (falling) active
+ v->reg[intrCtrl].u |= 0x200; // VSYNC int (falling) active
if (v->fbi.vblank_client != NULL)
(*v->fbi.vblank_client)(v->device, FALSE);
@@ -1058,9 +1058,9 @@ static TIMER_CALLBACK( vblank_callback )
// TODO: Vblank IRQ enable is VOODOO3 only?
if (v->type >= TYPE_VOODOO_3)
{
- if (v->reg[intrCtrl].u & 0x4) // call IRQ handler if VSYNC interrupt (rising) is enabled
+ if (v->reg[intrCtrl].u & 0x4) // call IRQ handler if VSYNC interrupt (rising) is enabled
{
- v->reg[intrCtrl].u |= 0x100; // VSYNC int (rising) active
+ v->reg[intrCtrl].u |= 0x100; // VSYNC int (rising) active
if (v->fbi.vblank_client != NULL)
(*v->fbi.vblank_client)(v->device, TRUE);
@@ -1144,20 +1144,20 @@ static void recompute_video_memory(voodoo_state *v)
/* remaining buffers are based on the config */
switch (memory_config)
{
- case 3: /* reserved */
+ case 3: /* reserved */
logerror("VOODOO.%d.ERROR:Unexpected memory configuration in recompute_video_memory!\n", v->index);
- case 0: /* 2 color buffers, 1 aux buffer */
+ case 0: /* 2 color buffers, 1 aux buffer */
v->fbi.rgboffs[2] = ~0;
v->fbi.auxoffs = 2 * buffer_pages * 0x1000;
break;
- case 1: /* 3 color buffers, 0 aux buffers */
+ case 1: /* 3 color buffers, 0 aux buffers */
v->fbi.rgboffs[2] = 2 * buffer_pages * 0x1000;
v->fbi.auxoffs = ~0;
break;
- case 2: /* 3 color buffers, 1 aux buffers */
+ case 2: /* 3 color buffers, 1 aux buffers */
v->fbi.rgboffs[2] = 2 * buffer_pages * 0x1000;
v->fbi.auxoffs = 3 * buffer_pages * 0x1000;
break;
@@ -1334,9 +1334,9 @@ static void dacdata_r(dac_state *d, UINT8 regnum)
/* this is just to make startup happy */
switch (d->reg[7])
{
- case 0x01: result = 0x55; break;
- case 0x07: result = 0x71; break;
- case 0x0b: result = 0x79; break;
+ case 0x01: result = 0x55; break;
+ case 0x07: result = 0x71; break;
+ case 0x0b: result = 0x79; break;
}
break;
@@ -1509,118 +1509,118 @@ static int cmdfifo_compute_expected_depth(voodoo_state *v, cmdfifo_info *f)
switch (command & 7)
{
/*
- Packet type 0: 1 or 2 words
-
- Word Bits
- 0 31:29 = reserved
- 0 28:6 = Address [24:2]
- 0 5:3 = Function (0 = NOP, 1 = JSR, 2 = RET, 3 = JMP LOCAL, 4 = JMP AGP)
- 0 2:0 = Packet type (0)
- 1 31:11 = reserved (JMP AGP only)
- 1 10:0 = Address [35:25]
- */
+ Packet type 0: 1 or 2 words
+
+ Word Bits
+ 0 31:29 = reserved
+ 0 28:6 = Address [24:2]
+ 0 5:3 = Function (0 = NOP, 1 = JSR, 2 = RET, 3 = JMP LOCAL, 4 = JMP AGP)
+ 0 2:0 = Packet type (0)
+ 1 31:11 = reserved (JMP AGP only)
+ 1 10:0 = Address [35:25]
+ */
case 0:
if (((command >> 3) & 7) == 4)
return 2;
return 1;
/*
- Packet type 1: 1 + N words
-
- Word Bits
- 0 31:16 = Number of words
- 0 15 = Increment?
- 0 14:3 = Register base
- 0 2:0 = Packet type (1)
- 1 31:0 = Data word
- */
+ Packet type 1: 1 + N words
+
+ Word Bits
+ 0 31:16 = Number of words
+ 0 15 = Increment?
+ 0 14:3 = Register base
+ 0 2:0 = Packet type (1)
+ 1 31:0 = Data word
+ */
case 1:
return 1 + (command >> 16);
/*
- Packet type 2: 1 + N words
+ Packet type 2: 1 + N words
- Word Bits
- 0 31:3 = 2D Register mask
- 0 2:0 = Packet type (2)
- 1 31:0 = Data word
- */
+ Word Bits
+ 0 31:3 = 2D Register mask
+ 0 2:0 = Packet type (2)
+ 1 31:0 = Data word
+ */
case 2:
for (i = 3; i <= 31; i++)
if (command & (1 << i)) count++;
return 1 + count;
/*
- Packet type 3: 1 + N words
-
- Word Bits
- 0 31:29 = Number of dummy entries following the data
- 0 28 = Packed color data?
- 0 25 = Disable ping pong sign correction (0=normal, 1=disable)
- 0 24 = Culling sign (0=positive, 1=negative)
- 0 23 = Enable culling (0=disable, 1=enable)
- 0 22 = Strip mode (0=strip, 1=fan)
- 0 17 = Setup S1 and T1
- 0 16 = Setup W1
- 0 15 = Setup S0 and T0
- 0 14 = Setup W0
- 0 13 = Setup Wb
- 0 12 = Setup Z
- 0 11 = Setup Alpha
- 0 10 = Setup RGB
- 0 9:6 = Number of vertices
- 0 5:3 = Command (0=Independent tris, 1=Start new strip, 2=Continue strip)
- 0 2:0 = Packet type (3)
- 1 31:0 = Data word
- */
+ Packet type 3: 1 + N words
+
+ Word Bits
+ 0 31:29 = Number of dummy entries following the data
+ 0 28 = Packed color data?
+ 0 25 = Disable ping pong sign correction (0=normal, 1=disable)
+ 0 24 = Culling sign (0=positive, 1=negative)
+ 0 23 = Enable culling (0=disable, 1=enable)
+ 0 22 = Strip mode (0=strip, 1=fan)
+ 0 17 = Setup S1 and T1
+ 0 16 = Setup W1
+ 0 15 = Setup S0 and T0
+ 0 14 = Setup W0
+ 0 13 = Setup Wb
+ 0 12 = Setup Z
+ 0 11 = Setup Alpha
+ 0 10 = Setup RGB
+ 0 9:6 = Number of vertices
+ 0 5:3 = Command (0=Independent tris, 1=Start new strip, 2=Continue strip)
+ 0 2:0 = Packet type (3)
+ 1 31:0 = Data word
+ */
case 3:
- count = 2; /* X/Y */
+ count = 2; /* X/Y */
if (command & (1 << 28))
{
- if (command & (3 << 10)) count++; /* ARGB */
+ if (command & (3 << 10)) count++; /* ARGB */
}
else
{
- if (command & (1 << 10)) count += 3; /* RGB */
- if (command & (1 << 11)) count++; /* A */
+ if (command & (1 << 10)) count += 3; /* RGB */
+ if (command & (1 << 11)) count++; /* A */
}
- if (command & (1 << 12)) count++; /* Z */
- if (command & (1 << 13)) count++; /* Wb */
- if (command & (1 << 14)) count++; /* W0 */
- if (command & (1 << 15)) count += 2; /* S0/T0 */
- if (command & (1 << 16)) count++; /* W1 */
- if (command & (1 << 17)) count += 2; /* S1/T1 */
- count *= (command >> 6) & 15; /* numverts */
+ if (command & (1 << 12)) count++; /* Z */
+ if (command & (1 << 13)) count++; /* Wb */
+ if (command & (1 << 14)) count++; /* W0 */
+ if (command & (1 << 15)) count += 2; /* S0/T0 */
+ if (command & (1 << 16)) count++; /* W1 */
+ if (command & (1 << 17)) count += 2; /* S1/T1 */
+ count *= (command >> 6) & 15; /* numverts */
return 1 + count + (command >> 29);
/*
- Packet type 4: 1 + N words
-
- Word Bits
- 0 31:29 = Number of dummy entries following the data
- 0 28:15 = General register mask
- 0 14:3 = Register base
- 0 2:0 = Packet type (4)
- 1 31:0 = Data word
- */
+ Packet type 4: 1 + N words
+
+ Word Bits
+ 0 31:29 = Number of dummy entries following the data
+ 0 28:15 = General register mask
+ 0 14:3 = Register base
+ 0 2:0 = Packet type (4)
+ 1 31:0 = Data word
+ */
case 4:
for (i = 15; i <= 28; i++)
if (command & (1 << i)) count++;
return 1 + count + (command >> 29);
/*
- Packet type 5: 2 + N words
-
- Word Bits
- 0 31:30 = Space (0,1=reserved, 2=LFB, 3=texture)
- 0 29:26 = Byte disable W2
- 0 25:22 = Byte disable WN
- 0 21:3 = Num words
- 0 2:0 = Packet type (5)
- 1 31:30 = Reserved
- 1 29:0 = Base address [24:0]
- 2 31:0 = Data word
- */
+ Packet type 5: 2 + N words
+
+ Word Bits
+ 0 31:30 = Space (0,1=reserved, 2=LFB, 3=texture)
+ 0 29:26 = Byte disable W2
+ 0 25:22 = Byte disable WN
+ 0 21:3 = Num words
+ 0 2:0 = Packet type (5)
+ 1 31:30 = Reserved
+ 1 29:0 = Base address [24:0]
+ 2 31:0 = Data word
+ */
case 5:
return 2 + ((command >> 3) & 0x7ffff);
@@ -1652,16 +1652,16 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
switch (command & 7)
{
/*
- Packet type 0: 1 or 2 words
-
- Word Bits
- 0 31:29 = reserved
- 0 28:6 = Address [24:2]
- 0 5:3 = Function (0 = NOP, 1 = JSR, 2 = RET, 3 = JMP LOCAL, 4 = JMP AGP)
- 0 2:0 = Packet type (0)
- 1 31:11 = reserved (JMP AGP only)
- 1 10:0 = Address [35:25]
- */
+ Packet type 0: 1 or 2 words
+
+ Word Bits
+ 0 31:29 = reserved
+ 0 28:6 = Address [24:2]
+ 0 5:3 = Function (0 = NOP, 1 = JSR, 2 = RET, 3 = JMP LOCAL, 4 = JMP AGP)
+ 0 2:0 = Packet type (0)
+ 1 31:11 = reserved (JMP AGP only)
+ 1 10:0 = Address [35:25]
+ */
case 0:
/* extract parameters */
@@ -1670,27 +1670,27 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
/* switch off of the specific command */
switch ((command >> 3) & 7)
{
- case 0: /* NOP */
+ case 0: /* NOP */
if (LOG_CMDFIFO) logerror(" NOP\n");
break;
- case 1: /* JSR */
+ case 1: /* JSR */
if (LOG_CMDFIFO) logerror(" JSR $%06X\n", target);
mame_printf_debug("JSR in CMDFIFO!\n");
src = &fifobase[target / 4];
break;
- case 2: /* RET */
+ case 2: /* RET */
if (LOG_CMDFIFO) logerror(" RET $%06X\n", target);
fatalerror("RET in CMDFIFO!\n");
break;
- case 3: /* JMP LOCAL FRAME BUFFER */
+ case 3: /* JMP LOCAL FRAME BUFFER */
if (LOG_CMDFIFO) logerror(" JMP LOCAL FRAMEBUF $%06X\n", target);
src = &fifobase[target / 4];
break;
- case 4: /* JMP AGP */
+ case 4: /* JMP AGP */
if (LOG_CMDFIFO) logerror(" JMP AGP $%06X\n", target);
fatalerror("JMP AGP in CMDFIFO!\n");
src = &fifobase[target / 4];
@@ -1704,15 +1704,15 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
break;
/*
- Packet type 1: 1 + N words
-
- Word Bits
- 0 31:16 = Number of words
- 0 15 = Increment?
- 0 14:3 = Register base
- 0 2:0 = Packet type (1)
- 1 31:0 = Data word
- */
+ Packet type 1: 1 + N words
+
+ Word Bits
+ 0 31:16 = Number of words
+ 0 15 = Increment?
+ 0 14:3 = Register base
+ 0 2:0 = Packet type (1)
+ 1 31:0 = Data word
+ */
case 1:
/* extract parameters */
@@ -1743,13 +1743,13 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
break;
/*
- Packet type 2: 1 + N words
+ Packet type 2: 1 + N words
- Word Bits
- 0 31:3 = 2D Register mask
- 0 2:0 = Packet type (2)
- 1 31:0 = Data word
- */
+ Word Bits
+ 0 31:3 = 2D Register mask
+ 0 2:0 = Packet type (2)
+ 1 31:0 = Data word
+ */
case 2:
if (LOG_CMDFIFO) logerror(" PACKET TYPE 2: mask=%X\n", (command >> 3) & 0x1ffffff);
@@ -1760,28 +1760,28 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
break;
/*
- Packet type 3: 1 + N words
-
- Word Bits
- 0 31:29 = Number of dummy entries following the data
- 0 28 = Packed color data?
- 0 25 = Disable ping pong sign correction (0=normal, 1=disable)
- 0 24 = Culling sign (0=positive, 1=negative)
- 0 23 = Enable culling (0=disable, 1=enable)
- 0 22 = Strip mode (0=strip, 1=fan)
- 0 17 = Setup S1 and T1
- 0 16 = Setup W1
- 0 15 = Setup S0 and T0
- 0 14 = Setup W0
- 0 13 = Setup Wb
- 0 12 = Setup Z
- 0 11 = Setup Alpha
- 0 10 = Setup RGB
- 0 9:6 = Number of vertices
- 0 5:3 = Command (0=Independent tris, 1=Start new strip, 2=Continue strip)
- 0 2:0 = Packet type (3)
- 1 31:0 = Data word
- */
+ Packet type 3: 1 + N words
+
+ Word Bits
+ 0 31:29 = Number of dummy entries following the data
+ 0 28 = Packed color data?
+ 0 25 = Disable ping pong sign correction (0=normal, 1=disable)
+ 0 24 = Culling sign (0=positive, 1=negative)
+ 0 23 = Enable culling (0=disable, 1=enable)
+ 0 22 = Strip mode (0=strip, 1=fan)
+ 0 17 = Setup S1 and T1
+ 0 16 = Setup W1
+ 0 15 = Setup S0 and T0
+ 0 14 = Setup W0
+ 0 13 = Setup Wb
+ 0 12 = Setup Z
+ 0 11 = Setup Alpha
+ 0 10 = Setup RGB
+ 0 9:6 = Number of vertices
+ 0 5:3 = Command (0=Independent tris, 1=Start new strip, 2=Continue strip)
+ 0 2:0 = Packet type (3)
+ 1 31:0 = Data word
+ */
case 3:
/* extract parameters */
@@ -1884,15 +1884,15 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
break;
/*
- Packet type 4: 1 + N words
-
- Word Bits
- 0 31:29 = Number of dummy entries following the data
- 0 28:15 = General register mask
- 0 14:3 = Register base
- 0 2:0 = Packet type (4)
- 1 31:0 = Data word
- */
+ Packet type 4: 1 + N words
+
+ Word Bits
+ 0 31:29 = Number of dummy entries following the data
+ 0 28:15 = General register mask
+ 0 14:3 = Register base
+ 0 2:0 = Packet type (4)
+ 1 31:0 = Data word
+ */
case 4:
/* extract parameters */
@@ -1928,18 +1928,18 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
break;
/*
- Packet type 5: 2 + N words
-
- Word Bits
- 0 31:30 = Space (0,1=reserved, 2=LFB, 3=texture)
- 0 29:26 = Byte disable W2
- 0 25:22 = Byte disable WN
- 0 21:3 = Num words
- 0 2:0 = Packet type (5)
- 1 31:30 = Reserved
- 1 29:0 = Base address [24:0]
- 2 31:0 = Data word
- */
+ Packet type 5: 2 + N words
+
+ Word Bits
+ 0 31:30 = Space (0,1=reserved, 2=LFB, 3=texture)
+ 0 29:26 = Byte disable W2
+ 0 25:22 = Byte disable WN
+ 0 21:3 = Num words
+ 0 2:0 = Packet type (5)
+ 1 31:30 = Reserved
+ 1 29:0 = Base address [24:0]
+ 2 31:0 = Data word
+ */
case 5:
/* extract parameters */
@@ -1949,7 +1949,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
/* handle LFB writes */
switch (command >> 30)
{
- case 0: // Linear FB
+ case 0: // Linear FB
{
if (LOG_CMDFIFO) logerror(" PACKET TYPE 5: FB count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
@@ -1967,7 +1967,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
}
break;
}
- case 2: // 3D LFB
+ case 2: // 3D LFB
{
if (LOG_CMDFIFO) logerror(" PACKET TYPE 5: 3D LFB count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
@@ -1978,7 +1978,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
break;
}
- case 1: // Planar YUV
+ case 1: // Planar YUV
{
// TODO
@@ -1992,7 +1992,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
break;
}
- case 3: // Texture Port
+ case 3: // Texture Port
{
if (LOG_CMDFIFO) logerror(" PACKET TYPE 5: textureRAM count=%d dest=%08X bd2=%X bdN=%X\n", count, target, (command >> 26) & 15, (command >> 22) & 15);
@@ -2983,171 +2983,171 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
/* first extract A,R,G,B from the data */
switch (LFBMODE_WRITE_FORMAT(v->reg[lfbMode].u) + 16 * LFBMODE_RGBA_LANES(v->reg[lfbMode].u))
{
- case 16*0 + 0: /* ARGB, 16-bit RGB 5-6-5 */
- case 16*2 + 0: /* RGBA, 16-bit RGB 5-6-5 */
+ case 16*0 + 0: /* ARGB, 16-bit RGB 5-6-5 */
+ case 16*2 + 0: /* RGBA, 16-bit RGB 5-6-5 */
EXTRACT_565_TO_888(data, sr[0], sg[0], sb[0]);
EXTRACT_565_TO_888(data >> 16, sr[1], sg[1], sb[1]);
mask = LFB_RGB_PRESENT | (LFB_RGB_PRESENT << 4);
offset <<= 1;
break;
- case 16*1 + 0: /* ABGR, 16-bit RGB 5-6-5 */
- case 16*3 + 0: /* BGRA, 16-bit RGB 5-6-5 */
+ case 16*1 + 0: /* ABGR, 16-bit RGB 5-6-5 */
+ case 16*3 + 0: /* BGRA, 16-bit RGB 5-6-5 */
EXTRACT_565_TO_888(data, sb[0], sg[0], sr[0]);
EXTRACT_565_TO_888(data >> 16, sb[1], sg[1], sr[1]);
mask = LFB_RGB_PRESENT | (LFB_RGB_PRESENT << 4);
offset <<= 1;
break;
- case 16*0 + 1: /* ARGB, 16-bit RGB x-5-5-5 */
+ case 16*0 + 1: /* ARGB, 16-bit RGB x-5-5-5 */
EXTRACT_x555_TO_888(data, sr[0], sg[0], sb[0]);
EXTRACT_x555_TO_888(data >> 16, sr[1], sg[1], sb[1]);
mask = LFB_RGB_PRESENT | (LFB_RGB_PRESENT << 4);
offset <<= 1;
break;
- case 16*1 + 1: /* ABGR, 16-bit RGB x-5-5-5 */
+ case 16*1 + 1: /* ABGR, 16-bit RGB x-5-5-5 */
EXTRACT_x555_TO_888(data, sb[0], sg[0], sr[0]);
EXTRACT_x555_TO_888(data >> 16, sb[1], sg[1], sr[1]);
mask = LFB_RGB_PRESENT | (LFB_RGB_PRESENT << 4);
offset <<= 1;
break;
- case 16*2 + 1: /* RGBA, 16-bit RGB x-5-5-5 */
+ case 16*2 + 1: /* RGBA, 16-bit RGB x-5-5-5 */
EXTRACT_555x_TO_888(data, sr[0], sg[0], sb[0]);
EXTRACT_555x_TO_888(data >> 16, sr[1], sg[1], sb[1]);
mask = LFB_RGB_PRESENT | (LFB_RGB_PRESENT << 4);
offset <<= 1;
break;
- case 16*3 + 1: /* BGRA, 16-bit RGB x-5-5-5 */
+ case 16*3 + 1: /* BGRA, 16-bit RGB x-5-5-5 */
EXTRACT_555x_TO_888(data, sb[0], sg[0], sr[0]);
EXTRACT_555x_TO_888(data >> 16, sb[1], sg[1], sr[1]);
mask = LFB_RGB_PRESENT | (LFB_RGB_PRESENT << 4);
offset <<= 1;
break;
- case 16*0 + 2: /* ARGB, 16-bit ARGB 1-5-5-5 */
+ case 16*0 + 2: /* ARGB, 16-bit ARGB 1-5-5-5 */
EXTRACT_1555_TO_8888(data, sa[0], sr[0], sg[0], sb[0]);
EXTRACT_1555_TO_8888(data >> 16, sa[1], sr[1], sg[1], sb[1]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | ((LFB_RGB_PRESENT | LFB_ALPHA_PRESENT) << 4);
offset <<= 1;
break;
- case 16*1 + 2: /* ABGR, 16-bit ARGB 1-5-5-5 */
+ case 16*1 + 2: /* ABGR, 16-bit ARGB 1-5-5-5 */
EXTRACT_1555_TO_8888(data, sa[0], sb[0], sg[0], sr[0]);
EXTRACT_1555_TO_8888(data >> 16, sa[1], sb[1], sg[1], sr[1]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | ((LFB_RGB_PRESENT | LFB_ALPHA_PRESENT) << 4);
offset <<= 1;
break;
- case 16*2 + 2: /* RGBA, 16-bit ARGB 1-5-5-5 */
+ case 16*2 + 2: /* RGBA, 16-bit ARGB 1-5-5-5 */
EXTRACT_5551_TO_8888(data, sr[0], sg[0], sb[0], sa[0]);
EXTRACT_5551_TO_8888(data >> 16, sr[1], sg[1], sb[1], sa[1]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | ((LFB_RGB_PRESENT | LFB_ALPHA_PRESENT) << 4);
offset <<= 1;
break;
- case 16*3 + 2: /* BGRA, 16-bit ARGB 1-5-5-5 */
+ case 16*3 + 2: /* BGRA, 16-bit ARGB 1-5-5-5 */
EXTRACT_5551_TO_8888(data, sb[0], sg[0], sr[0], sa[0]);
EXTRACT_5551_TO_8888(data >> 16, sb[1], sg[1], sr[1], sa[1]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | ((LFB_RGB_PRESENT | LFB_ALPHA_PRESENT) << 4);
offset <<= 1;
break;
- case 16*0 + 4: /* ARGB, 32-bit RGB x-8-8-8 */
+ case 16*0 + 4: /* ARGB, 32-bit RGB x-8-8-8 */
EXTRACT_x888_TO_888(data, sr[0], sg[0], sb[0]);
mask = LFB_RGB_PRESENT;
break;
- case 16*1 + 4: /* ABGR, 32-bit RGB x-8-8-8 */
+ case 16*1 + 4: /* ABGR, 32-bit RGB x-8-8-8 */
EXTRACT_x888_TO_888(data, sb[0], sg[0], sr[0]);
mask = LFB_RGB_PRESENT;
break;
- case 16*2 + 4: /* RGBA, 32-bit RGB x-8-8-8 */
+ case 16*2 + 4: /* RGBA, 32-bit RGB x-8-8-8 */
EXTRACT_888x_TO_888(data, sr[0], sg[0], sb[0]);
mask = LFB_RGB_PRESENT;
break;
- case 16*3 + 4: /* BGRA, 32-bit RGB x-8-8-8 */
+ case 16*3 + 4: /* BGRA, 32-bit RGB x-8-8-8 */
EXTRACT_888x_TO_888(data, sb[0], sg[0], sr[0]);
mask = LFB_RGB_PRESENT;
break;
- case 16*0 + 5: /* ARGB, 32-bit ARGB 8-8-8-8 */
+ case 16*0 + 5: /* ARGB, 32-bit ARGB 8-8-8-8 */
EXTRACT_8888_TO_8888(data, sa[0], sr[0], sg[0], sb[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT;
break;
- case 16*1 + 5: /* ABGR, 32-bit ARGB 8-8-8-8 */
+ case 16*1 + 5: /* ABGR, 32-bit ARGB 8-8-8-8 */
EXTRACT_8888_TO_8888(data, sa[0], sb[0], sg[0], sr[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT;
break;
- case 16*2 + 5: /* RGBA, 32-bit ARGB 8-8-8-8 */
+ case 16*2 + 5: /* RGBA, 32-bit ARGB 8-8-8-8 */
EXTRACT_8888_TO_8888(data, sr[0], sg[0], sb[0], sa[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT;
break;
- case 16*3 + 5: /* BGRA, 32-bit ARGB 8-8-8-8 */
+ case 16*3 + 5: /* BGRA, 32-bit ARGB 8-8-8-8 */
EXTRACT_8888_TO_8888(data, sb[0], sg[0], sr[0], sa[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT;
break;
- case 16*0 + 12: /* ARGB, 32-bit depth+RGB 5-6-5 */
- case 16*2 + 12: /* RGBA, 32-bit depth+RGB 5-6-5 */
+ case 16*0 + 12: /* ARGB, 32-bit depth+RGB 5-6-5 */
+ case 16*2 + 12: /* RGBA, 32-bit depth+RGB 5-6-5 */
sw[0] = data >> 16;
EXTRACT_565_TO_888(data, sr[0], sg[0], sb[0]);
mask = LFB_RGB_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*1 + 12: /* ABGR, 32-bit depth+RGB 5-6-5 */
- case 16*3 + 12: /* BGRA, 32-bit depth+RGB 5-6-5 */
+ case 16*1 + 12: /* ABGR, 32-bit depth+RGB 5-6-5 */
+ case 16*3 + 12: /* BGRA, 32-bit depth+RGB 5-6-5 */
sw[0] = data >> 16;
EXTRACT_565_TO_888(data, sb[0], sg[0], sr[0]);
mask = LFB_RGB_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*0 + 13: /* ARGB, 32-bit depth+RGB x-5-5-5 */
+ case 16*0 + 13: /* ARGB, 32-bit depth+RGB x-5-5-5 */
sw[0] = data >> 16;
EXTRACT_x555_TO_888(data, sr[0], sg[0], sb[0]);
mask = LFB_RGB_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*1 + 13: /* ABGR, 32-bit depth+RGB x-5-5-5 */
+ case 16*1 + 13: /* ABGR, 32-bit depth+RGB x-5-5-5 */
sw[0] = data >> 16;
EXTRACT_x555_TO_888(data, sb[0], sg[0], sr[0]);
mask = LFB_RGB_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*2 + 13: /* RGBA, 32-bit depth+RGB x-5-5-5 */
+ case 16*2 + 13: /* RGBA, 32-bit depth+RGB x-5-5-5 */
sw[0] = data >> 16;
EXTRACT_555x_TO_888(data, sr[0], sg[0], sb[0]);
mask = LFB_RGB_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*3 + 13: /* BGRA, 32-bit depth+RGB x-5-5-5 */
+ case 16*3 + 13: /* BGRA, 32-bit depth+RGB x-5-5-5 */
sw[0] = data >> 16;
EXTRACT_555x_TO_888(data, sb[0], sg[0], sr[0]);
mask = LFB_RGB_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*0 + 14: /* ARGB, 32-bit depth+ARGB 1-5-5-5 */
+ case 16*0 + 14: /* ARGB, 32-bit depth+ARGB 1-5-5-5 */
sw[0] = data >> 16;
EXTRACT_1555_TO_8888(data, sa[0], sr[0], sg[0], sb[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*1 + 14: /* ABGR, 32-bit depth+ARGB 1-5-5-5 */
+ case 16*1 + 14: /* ABGR, 32-bit depth+ARGB 1-5-5-5 */
sw[0] = data >> 16;
EXTRACT_1555_TO_8888(data, sa[0], sb[0], sg[0], sr[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*2 + 14: /* RGBA, 32-bit depth+ARGB 1-5-5-5 */
+ case 16*2 + 14: /* RGBA, 32-bit depth+ARGB 1-5-5-5 */
sw[0] = data >> 16;
EXTRACT_5551_TO_8888(data, sr[0], sg[0], sb[0], sa[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*3 + 14: /* BGRA, 32-bit depth+ARGB 1-5-5-5 */
+ case 16*3 + 14: /* BGRA, 32-bit depth+ARGB 1-5-5-5 */
sw[0] = data >> 16;
EXTRACT_5551_TO_8888(data, sb[0], sg[0], sr[0], sa[0]);
mask = LFB_RGB_PRESENT | LFB_ALPHA_PRESENT | LFB_DEPTH_PRESENT_MSW;
break;
- case 16*0 + 15: /* ARGB, 16-bit depth */
- case 16*1 + 15: /* ARGB, 16-bit depth */
- case 16*2 + 15: /* ARGB, 16-bit depth */
- case 16*3 + 15: /* ARGB, 16-bit depth */
+ case 16*0 + 15: /* ARGB, 16-bit depth */
+ case 16*1 + 15: /* ARGB, 16-bit depth */
+ case 16*2 + 15: /* ARGB, 16-bit depth */
+ case 16*3 + 15: /* ARGB, 16-bit depth */
sw[0] = data & 0xffff;
sw[1] = data >> 16;
mask = LFB_DEPTH_PRESENT | (LFB_DEPTH_PRESENT << 4);
offset <<= 1;
break;
- default: /* reserved */
+ default: /* reserved */
return 0;
}
@@ -3165,18 +3165,18 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_WRITE_BUFFER_SELECT(v->reg[lfbMode].u);
switch (destbuf)
{
- case 0: /* front buffer */
+ case 0: /* front buffer */
dest = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
destmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.frontbuf]) / 2;
v->fbi.video_changed = TRUE;
break;
- case 1: /* back buffer */
+ case 1: /* back buffer */
dest = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
destmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.backbuf]) / 2;
break;
- default: /* reserved */
+ default: /* reserved */
return 0;
}
depth = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs);
@@ -3860,8 +3860,8 @@ static UINT32 register_r(voodoo_state *v, offs_t offset)
/* reserved area in the TMU read by the Vegas startup sequence */
case hvRetrace:
- result = 0x200 << 16; /* should be between 0x7b and 0x267 */
- result |= 0x80; /* should be between 0x17 and 0x103 */
+ result = 0x200 << 16; /* should be between 0x7b and 0x267 */
+ result |= 0x80; /* should be between 0x17 and 0x103 */
break;
/* cmdFifo -- Voodoo2 only */
@@ -3950,24 +3950,24 @@ static UINT32 lfb_r(voodoo_state *v, offs_t offset, int forcefront)
destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_READ_BUFFER_SELECT(v->reg[lfbMode].u);
switch (destbuf)
{
- case 0: /* front buffer */
+ case 0: /* front buffer */
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.frontbuf]) / 2;
break;
- case 1: /* back buffer */
+ case 1: /* back buffer */
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.backbuf]) / 2;
break;
- case 2: /* aux buffer */
+ case 2: /* aux buffer */
if (v->fbi.auxoffs == ~0)
return 0xffffffff;
buffer = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs);
bufmax = (v->fbi.mask + 1 - v->fbi.auxoffs) / 2;
break;
- default: /* reserved */
+ default: /* reserved */
return 0xffffffff;
}
@@ -4173,11 +4173,11 @@ static READ8_DEVICE_HANDLER( banshee_vga_r )
/* Input status 0 */
case 0x3c2:
/*
- bit 7 = Interrupt Status. When its value is ?1?, denotes that an interrupt is pending.
- bit 6:5 = Feature Connector. These 2 bits are readable bits from the feature connector.
- bit 4 = Sense. This bit reflects the state of the DAC monitor sense logic.
- bit 3:0 = Reserved. Read back as 0.
- */
+ bit 7 = Interrupt Status. When its value is ?1?, denotes that an interrupt is pending.
+ bit 6:5 = Feature Connector. These 2 bits are readable bits from the feature connector.
+ bit 4 = Sense. This bit reflects the state of the DAC monitor sense logic.
+ bit 3:0 = Reserved. Read back as 0.
+ */
result = 0x00;
if (LOG_REGISTERS)
logerror("%s:banshee_vga_r(%X)\n", device->machine().describe_context(), 0x300+offset);
@@ -4225,14 +4225,14 @@ static READ8_DEVICE_HANDLER( banshee_vga_r )
/* Input status 1 */
case 0x3da:
/*
- bit 7:6 = Reserved. These bits read back 0.
- bit 5:4 = Display Status. These 2 bits reflect 2 of the 8 pixel data outputs from the Attribute
- controller, as determined by the Attribute controller index 0x12 bits 4 and 5.
- bit 3 = Vertical sync Status. A ?1? indicates vertical retrace is in progress.
- bit 2:1 = Reserved. These bits read back 0x2.
- bit 0 = Display Disable. When this bit is 1, either horizontal or vertical display end has occurred,
- otherwise video data is being displayed.
- */
+ bit 7:6 = Reserved. These bits read back 0.
+ bit 5:4 = Display Status. These 2 bits reflect 2 of the 8 pixel data outputs from the Attribute
+ controller, as determined by the Attribute controller index 0x12 bits 4 and 5.
+ bit 3 = Vertical sync Status. A ?1? indicates vertical retrace is in progress.
+ bit 2:1 = Reserved. These bits read back 0x2.
+ bit 0 = Display Disable. When this bit is 1, either horizontal or vertical display end has occurred,
+ otherwise video data is being displayed.
+ */
result = 0x04;
if (LOG_REGISTERS)
logerror("%s:banshee_vga_r(%X)\n", device->machine().describe_context(), 0x300+offset);
@@ -4268,9 +4268,9 @@ READ32_DEVICE_HANDLER( banshee_io_r )
logerror("%s:banshee_dac_r(%X)\n", device->machine().describe_context(), v->banshee.io[io_dacAddr] & 0x1ff);
break;
- case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
- case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
- case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
+ case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
+ case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
+ case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
result = 0;
if (ACCESSING_BITS_0_7)
result |= banshee_vga_r(device, space, offset*4+0, mem_mask >> 0) << 0;
@@ -4303,12 +4303,12 @@ static void blit_2d(voodoo_state *v, UINT32 data)
{
switch (v->banshee.blt_cmd)
{
- case 0: // NOP - wait for idle
+ case 0: // NOP - wait for idle
{
break;
}
- case 1: // Screen-to-screen blit
+ case 1: // Screen-to-screen blit
{
// TODO
#if LOG_BANSHEE_2D
@@ -4317,12 +4317,12 @@ static void blit_2d(voodoo_state *v, UINT32 data)
break;
}
- case 2: // Screen-to-screen stretch blit
+ case 2: // Screen-to-screen stretch blit
{
fatalerror(" blit_2d:screen_to_screen_stretch: src X %d, src Y %d\n", data & 0xfff, (data >> 16) & 0xfff);
}
- case 3: // Host-to-screen blit
+ case 3: // Host-to-screen blit
{
UINT32 addr = v->banshee.blt_dst_base;
@@ -4368,22 +4368,22 @@ static void blit_2d(voodoo_state *v, UINT32 data)
break;
}
- case 5: // Rectangle fill
+ case 5: // Rectangle fill
{
fatalerror("blit_2d:rectangle_fill: src X %d, src Y %d\n", data & 0xfff, (data >> 16) & 0xfff);
}
- case 6: // Line
+ case 6: // Line
{
fatalerror("blit_2d:line: end X %d, end Y %d\n", data & 0xfff, (data >> 16) & 0xfff);
}
- case 7: // Polyline
+ case 7: // Polyline
{
fatalerror("blit_2d:polyline: end X %d, end Y %d\n", data & 0xfff, (data >> 16) & 0xfff);
}
- case 8: // Polygon fill
+ case 8: // Polygon fill
{
fatalerror("blit_2d:polygon_fill\n");
}
@@ -4404,12 +4404,12 @@ static INT32 banshee_2d_w(voodoo_state *v, offs_t offset, UINT32 data)
logerror(" 2D:command: cmd %d, ROP0 %02X\n", data & 0xf, data >> 24);
#endif
- v->banshee.blt_src_x = v->banshee.blt_regs[banshee2D_srcXY] & 0xfff;
- v->banshee.blt_src_y = (v->banshee.blt_regs[banshee2D_srcXY] >> 16) & 0xfff;
- v->banshee.blt_src_base = v->banshee.blt_regs[banshee2D_srcBaseAddr] & 0xffffff;
- v->banshee.blt_src_stride = v->banshee.blt_regs[banshee2D_srcFormat] & 0x3fff;
- v->banshee.blt_src_width = v->banshee.blt_regs[banshee2D_srcSize] & 0xfff;
- v->banshee.blt_src_height = (v->banshee.blt_regs[banshee2D_srcSize] >> 16) & 0xfff;
+ v->banshee.blt_src_x = v->banshee.blt_regs[banshee2D_srcXY] & 0xfff;
+ v->banshee.blt_src_y = (v->banshee.blt_regs[banshee2D_srcXY] >> 16) & 0xfff;
+ v->banshee.blt_src_base = v->banshee.blt_regs[banshee2D_srcBaseAddr] & 0xffffff;
+ v->banshee.blt_src_stride = v->banshee.blt_regs[banshee2D_srcFormat] & 0x3fff;
+ v->banshee.blt_src_width = v->banshee.blt_regs[banshee2D_srcSize] & 0xfff;
+ v->banshee.blt_src_height = (v->banshee.blt_regs[banshee2D_srcSize] >> 16) & 0xfff;
switch ((v->banshee.blt_regs[banshee2D_srcFormat] >> 16) & 0xf)
{
@@ -4422,12 +4422,12 @@ static INT32 banshee_2d_w(voodoo_state *v, offs_t offset, UINT32 data)
default: v->banshee.blt_src_bpp = 1; break;
}
- v->banshee.blt_dst_x = v->banshee.blt_regs[banshee2D_dstXY] & 0xfff;
- v->banshee.blt_dst_y = (v->banshee.blt_regs[banshee2D_dstXY] >> 16) & 0xfff;
- v->banshee.blt_dst_base = v->banshee.blt_regs[banshee2D_dstBaseAddr] & 0xffffff;
- v->banshee.blt_dst_stride = v->banshee.blt_regs[banshee2D_dstFormat] & 0x3fff;
- v->banshee.blt_dst_width = v->banshee.blt_regs[banshee2D_dstSize] & 0xfff;
- v->banshee.blt_dst_height = (v->banshee.blt_regs[banshee2D_dstSize] >> 16) & 0xfff;
+ v->banshee.blt_dst_x = v->banshee.blt_regs[banshee2D_dstXY] & 0xfff;
+ v->banshee.blt_dst_y = (v->banshee.blt_regs[banshee2D_dstXY] >> 16) & 0xfff;
+ v->banshee.blt_dst_base = v->banshee.blt_regs[banshee2D_dstBaseAddr] & 0xffffff;
+ v->banshee.blt_dst_stride = v->banshee.blt_regs[banshee2D_dstFormat] & 0x3fff;
+ v->banshee.blt_dst_width = v->banshee.blt_regs[banshee2D_dstSize] & 0xfff;
+ v->banshee.blt_dst_height = (v->banshee.blt_regs[banshee2D_dstSize] >> 16) & 0xfff;
switch ((v->banshee.blt_regs[banshee2D_dstFormat] >> 16) & 0x7)
{
@@ -4851,9 +4851,9 @@ WRITE32_DEVICE_HANDLER( banshee_io_w )
logerror("%s:banshee_io_w(%s) = %08X & %08X\n", device->machine().describe_context(), banshee_io_reg_name[offset], data, mem_mask);
break;
- case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
- case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
- case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
+ case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
+ case io_vgac0: case io_vgac4: case io_vgac8: case io_vgacc:
+ case io_vgad0: case io_vgad4: case io_vgad8: case io_vgadc:
if (ACCESSING_BITS_0_7)
banshee_vga_w(device, space, offset*4+0, data >> 0, mem_mask >> 0);
if (ACCESSING_BITS_8_15)
@@ -5049,7 +5049,7 @@ static void common_start_voodoo(device_t *device, UINT8 type)
v->banshee.io[io_sipMonitor] = 0x40000000;
v->banshee.io[io_lfbMemoryConfig] = 0x000a2200;
v->banshee.io[io_dramInit0] = 0x00579d29;
- v->banshee.io[io_dramInit0] |= 0x08000000; // Konami Viper expects 16MBit SGRAMs
+ v->banshee.io[io_dramInit0] |= 0x08000000; // Konami Viper expects 16MBit SGRAMs
v->banshee.io[io_dramInit1] = 0x00f02200;
v->banshee.io[io_tmuGbeInit] = 0x00000bfb;
@@ -5135,15 +5135,15 @@ static INT32 fastfill(voodoo_state *v)
int destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? 1 : FBZMODE_DRAW_BUFFER(v->reg[fbzMode].u);
switch (destbuf)
{
- case 0: /* front buffer */
+ case 0: /* front buffer */
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
break;
- case 1: /* back buffer */
+ case 1: /* back buffer */
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
break;
- default: /* reserved */
+ default: /* reserved */
break;
}
@@ -5273,16 +5273,16 @@ static INT32 triangle(voodoo_state *v)
destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? 1 : FBZMODE_DRAW_BUFFER(v->reg[fbzMode].u);
switch (destbuf)
{
- case 0: /* front buffer */
+ case 0: /* front buffer */
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
v->fbi.video_changed = TRUE;
break;
- case 1: /* back buffer */
+ case 1: /* back buffer */
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
break;
- default: /* reserved */
+ default: /* reserved */
return TRIANGLE_SETUP_CLOCKS;
}
@@ -5400,7 +5400,7 @@ static INT32 setup_and_draw_triangle(voodoo_state *v)
/* compute the divisor */
divisor = 1.0f / ((v->fbi.svert[0].x - v->fbi.svert[1].x) * (v->fbi.svert[0].y - v->fbi.svert[2].y) -
- (v->fbi.svert[0].x - v->fbi.svert[2].x) * (v->fbi.svert[0].y - v->fbi.svert[1].y));
+ (v->fbi.svert[0].x - v->fbi.svert[2].x) * (v->fbi.svert[0].y - v->fbi.svert[1].y));
/* backface culling */
if (v->reg[sSetupMode].u & 0x20000)
diff --git a/src/emu/video/voodoo.h b/src/emu/video/voodoo.h
index 5a71f1f4e81..affc0d04b5b 100644
--- a/src/emu/video/voodoo.h
+++ b/src/emu/video/voodoo.h
@@ -57,10 +57,10 @@ enum
TYPE_VOODOO_3
};
-#define STD_VOODOO_1_CLOCK 50000000
-#define STD_VOODOO_2_CLOCK 90000000
-#define STD_VOODOO_BANSHEE_CLOCK 90000000
-#define STD_VOODOO_3_CLOCK 132000000
+#define STD_VOODOO_1_CLOCK 50000000
+#define STD_VOODOO_2_CLOCK 90000000
+#define STD_VOODOO_BANSHEE_CLOCK 90000000
+#define STD_VOODOO_3_CLOCK 132000000
/***************************************************************************
@@ -73,13 +73,13 @@ typedef void (*voodoo_stall_func)(device_t *device, int state);
struct voodoo_config
{
- UINT8 fbmem;
- UINT8 tmumem0;
- UINT8 tmumem1;
- const char * screen;
- const char * cputag;
- voodoo_vblank_func vblank;
- voodoo_stall_func stall;
+ UINT8 fbmem;
+ UINT8 tmumem0;
+ UINT8 tmumem1;
+ const char * screen;
+ const char * cputag;
+ voodoo_vblank_func vblank;
+ voodoo_stall_func stall;
};
diff --git a/src/ldplayer/ldplayer.c b/src/ldplayer/ldplayer.c
index f64d0e5395d..fe0808b7459 100644
--- a/src/ldplayer/ldplayer.c
+++ b/src/ldplayer/ldplayer.c
@@ -20,18 +20,18 @@
#include "pr8210.lh"
-#define APPNAME "MAME"
-#define APPNAME_LOWER "mame"
-#define CONFIGNAME "mame"
-#define APPLONGNAME "M.A.M.E."
-#define FULLLONGNAME "Multiple Arcade Machine Emulator"
-#define CAPGAMENOUN "GAME"
-#define CAPSTARTGAMENOUN "Game"
-#define GAMENOUN "game"
-#define GAMESNOUN "games"
-#define COPYRIGHT "Copyright Nicola Salmoria\nand the MAME team\nhttp://mamedev.org"
-#define COPYRIGHT_INFO "Copyright Nicola Salmoria and the MAME team"
-#define DISCLAIMER "MAME is an emulator: it reproduces, more or less faithfully, the behaviour of\n" \
+#define APPNAME "MAME"
+#define APPNAME_LOWER "mame"
+#define CONFIGNAME "mame"
+#define APPLONGNAME "M.A.M.E."
+#define FULLLONGNAME "Multiple Arcade Machine Emulator"
+#define CAPGAMENOUN "GAME"
+#define CAPSTARTGAMENOUN "Game"
+#define GAMENOUN "game"
+#define GAMESNOUN "games"
+#define COPYRIGHT "Copyright Nicola Salmoria\nand the MAME team\nhttp://mamedev.org"
+#define COPYRIGHT_INFO "Copyright Nicola Salmoria and the MAME team"
+#define DISCLAIMER "MAME is an emulator: it reproduces, more or less faithfully, the behaviour of\n" \
"several arcade machines. But hardware is useless without software, so an image\n" \
"of the ROMs which run on that hardware is required. Such ROMs, like any other\n" \
"commercial software, are copyrighted material and it is therefore illegal to\n" \
@@ -39,10 +39,10 @@
"are not distributed together with MAME. Distribution of MAME together with ROM\n" \
"images is a violation of copyright law and should be promptly reported to the\n" \
"authors so that appropriate legal action can be taken.\n"
-#define USAGE "Usage: %s [%s] [options]"
-#define XML_ROOT "mame"
-#define XML_TOP "game"
-#define STATE_MAGIC_NUM "MAMESAVE"
+#define USAGE "Usage: %s [%s] [options]"
+#define XML_ROOT "mame"
+#define XML_TOP "game"
+#define STATE_MAGIC_NUM "MAMESAVE"
const char * emulator_info::get_appname() { return APPNAME;}
const char * emulator_info::get_appname_lower() { return APPNAME_LOWER;}
@@ -80,8 +80,8 @@ public:
// construction/destruction
ldplayer_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_last_controls(0),
- m_playing(false) { }
+ m_last_controls(0),
+ m_playing(false) { }
// callback hook
static chd_file *get_disc_static(device_t *dummy, laserdisc_device &device) { return device.machine().driver_data<ldplayer_state>()->get_disc(); }
@@ -149,9 +149,9 @@ public:
// construction/destruction
pr8210_state(const machine_config &mconfig, device_type type, const char *tag)
: ldplayer_state(mconfig, type, tag),
- m_laserdisc(*this, "laserdisc"),
- m_command_buffer_in(0),
- m_command_buffer_out(0) { }
+ m_laserdisc(*this, "laserdisc"),
+ m_command_buffer_in(0),
+ m_command_buffer_out(0) { }
protected:
// device overrides
@@ -188,7 +188,7 @@ public:
// construction/destruction
ldv1000_state(const machine_config &mconfig, device_type type, const char *tag)
: ldplayer_state(mconfig, type, tag),
- m_laserdisc(*this, "laserdisc") { }
+ m_laserdisc(*this, "laserdisc") { }
protected:
required_device<pioneer_ldv1000_device> m_laserdisc;
diff --git a/src/ldplayer/ldplayer.lst b/src/ldplayer/ldplayer.lst
index 4b067250129..805421e7f7e 100644
--- a/src/ldplayer/ldplayer.lst
+++ b/src/ldplayer/ldplayer.lst
@@ -38,5 +38,5 @@
******************************************************************************/
-ldv1000 // Pioneer LD-V1000
-pr8210 // Pioneer PR-8210
+ldv1000 // Pioneer LD-V1000
+pr8210 // Pioneer PR-8210
diff --git a/src/ldplayer/ldplayer.mak b/src/ldplayer/ldplayer.mak
index 39486489341..1f0cc843bff 100644
--- a/src/ldplayer/ldplayer.mak
+++ b/src/ldplayer/ldplayer.mak
@@ -55,4 +55,4 @@ DRVLIBS = \
# layout dependencies
#-------------------------------------------------
-$(LDPOBJ)/ldplayer.o: $(LAYOUT)/pr8210.lh \
+$(LDPOBJ)/ldplayer.o: $(LAYOUT)/pr8210.lh \
diff --git a/src/lib/expat/expat.h b/src/lib/expat/expat.h
index fc5aac910dd..8ef82fcd460 100644
--- a/src/lib/expat/expat.h
+++ b/src/lib/expat/expat.h
@@ -43,75 +43,75 @@ typedef unsigned char XML_Bool;
dropped.
*/
enum XML_Status {
- XML_STATUS_ERROR = 0,
+ XML_STATUS_ERROR = 0,
#define XML_STATUS_ERROR XML_STATUS_ERROR
- XML_STATUS_OK = 1,
+ XML_STATUS_OK = 1,
#define XML_STATUS_OK XML_STATUS_OK
- XML_STATUS_SUSPENDED = 2
+ XML_STATUS_SUSPENDED = 2
#define XML_STATUS_SUSPENDED XML_STATUS_SUSPENDED
};
enum XML_Error {
- XML_ERROR_NONE,
- XML_ERROR_NO_MEMORY,
- XML_ERROR_SYNTAX,
- XML_ERROR_NO_ELEMENTS,
- XML_ERROR_INVALID_TOKEN,
- XML_ERROR_UNCLOSED_TOKEN,
- XML_ERROR_PARTIAL_CHAR,
- XML_ERROR_TAG_MISMATCH,
- XML_ERROR_DUPLICATE_ATTRIBUTE,
- XML_ERROR_JUNK_AFTER_DOC_ELEMENT,
- XML_ERROR_PARAM_ENTITY_REF,
- XML_ERROR_UNDEFINED_ENTITY,
- XML_ERROR_RECURSIVE_ENTITY_REF,
- XML_ERROR_ASYNC_ENTITY,
- XML_ERROR_BAD_CHAR_REF,
- XML_ERROR_BINARY_ENTITY_REF,
- XML_ERROR_ATTRIBUTE_EXTERNAL_ENTITY_REF,
- XML_ERROR_MISPLACED_XML_PI,
- XML_ERROR_UNKNOWN_ENCODING,
- XML_ERROR_INCORRECT_ENCODING,
- XML_ERROR_UNCLOSED_CDATA_SECTION,
- XML_ERROR_EXTERNAL_ENTITY_HANDLING,
- XML_ERROR_NOT_STANDALONE,
- XML_ERROR_UNEXPECTED_STATE,
- XML_ERROR_ENTITY_DECLARED_IN_PE,
- XML_ERROR_FEATURE_REQUIRES_XML_DTD,
- XML_ERROR_CANT_CHANGE_FEATURE_ONCE_PARSING,
- /* Added in 1.95.7. */
- XML_ERROR_UNBOUND_PREFIX,
- /* Added in 1.95.8. */
- XML_ERROR_UNDECLARING_PREFIX,
- XML_ERROR_INCOMPLETE_PE,
- XML_ERROR_XML_DECL,
- XML_ERROR_TEXT_DECL,
- XML_ERROR_PUBLICID,
- XML_ERROR_SUSPENDED,
- XML_ERROR_NOT_SUSPENDED,
- XML_ERROR_ABORTED,
- XML_ERROR_FINISHED,
- XML_ERROR_SUSPEND_PE,
- /* Added in 2.0. */
- XML_ERROR_RESERVED_PREFIX_XML,
- XML_ERROR_RESERVED_PREFIX_XMLNS,
- XML_ERROR_RESERVED_NAMESPACE_URI
+ XML_ERROR_NONE,
+ XML_ERROR_NO_MEMORY,
+ XML_ERROR_SYNTAX,
+ XML_ERROR_NO_ELEMENTS,
+ XML_ERROR_INVALID_TOKEN,
+ XML_ERROR_UNCLOSED_TOKEN,
+ XML_ERROR_PARTIAL_CHAR,
+ XML_ERROR_TAG_MISMATCH,
+ XML_ERROR_DUPLICATE_ATTRIBUTE,
+ XML_ERROR_JUNK_AFTER_DOC_ELEMENT,
+ XML_ERROR_PARAM_ENTITY_REF,
+ XML_ERROR_UNDEFINED_ENTITY,
+ XML_ERROR_RECURSIVE_ENTITY_REF,
+ XML_ERROR_ASYNC_ENTITY,
+ XML_ERROR_BAD_CHAR_REF,
+ XML_ERROR_BINARY_ENTITY_REF,
+ XML_ERROR_ATTRIBUTE_EXTERNAL_ENTITY_REF,
+ XML_ERROR_MISPLACED_XML_PI,
+ XML_ERROR_UNKNOWN_ENCODING,
+ XML_ERROR_INCORRECT_ENCODING,
+ XML_ERROR_UNCLOSED_CDATA_SECTION,
+ XML_ERROR_EXTERNAL_ENTITY_HANDLING,
+ XML_ERROR_NOT_STANDALONE,
+ XML_ERROR_UNEXPECTED_STATE,
+ XML_ERROR_ENTITY_DECLARED_IN_PE,
+ XML_ERROR_FEATURE_REQUIRES_XML_DTD,
+ XML_ERROR_CANT_CHANGE_FEATURE_ONCE_PARSING,
+ /* Added in 1.95.7. */
+ XML_ERROR_UNBOUND_PREFIX,
+ /* Added in 1.95.8. */
+ XML_ERROR_UNDECLARING_PREFIX,
+ XML_ERROR_INCOMPLETE_PE,
+ XML_ERROR_XML_DECL,
+ XML_ERROR_TEXT_DECL,
+ XML_ERROR_PUBLICID,
+ XML_ERROR_SUSPENDED,
+ XML_ERROR_NOT_SUSPENDED,
+ XML_ERROR_ABORTED,
+ XML_ERROR_FINISHED,
+ XML_ERROR_SUSPEND_PE,
+ /* Added in 2.0. */
+ XML_ERROR_RESERVED_PREFIX_XML,
+ XML_ERROR_RESERVED_PREFIX_XMLNS,
+ XML_ERROR_RESERVED_NAMESPACE_URI
};
enum XML_Content_Type {
- XML_CTYPE_EMPTY = 1,
- XML_CTYPE_ANY,
- XML_CTYPE_MIXED,
- XML_CTYPE_NAME,
- XML_CTYPE_CHOICE,
- XML_CTYPE_SEQ
+ XML_CTYPE_EMPTY = 1,
+ XML_CTYPE_ANY,
+ XML_CTYPE_MIXED,
+ XML_CTYPE_NAME,
+ XML_CTYPE_CHOICE,
+ XML_CTYPE_SEQ
};
enum XML_Content_Quant {
- XML_CQUANT_NONE,
- XML_CQUANT_OPT,
- XML_CQUANT_REP,
- XML_CQUANT_PLUS
+ XML_CQUANT_NONE,
+ XML_CQUANT_OPT,
+ XML_CQUANT_REP,
+ XML_CQUANT_PLUS
};
/* If type == XML_CTYPE_EMPTY or XML_CTYPE_ANY, then quant will be
@@ -135,11 +135,11 @@ enum XML_Content_Quant {
typedef struct XML_cp XML_Content;
struct XML_cp {
- enum XML_Content_Type type;
- enum XML_Content_Quant quant;
- XML_Char * name;
- unsigned int numchildren;
- XML_Content * children;
+ enum XML_Content_Type type;
+ enum XML_Content_Quant quant;
+ XML_Char * name;
+ unsigned int numchildren;
+ XML_Content * children;
};
@@ -148,12 +148,12 @@ struct XML_cp {
to free model when finished with it.
*/
typedef void (XMLCALL *XML_ElementDeclHandler) (void *userData,
- const XML_Char *name,
- XML_Content *model);
+ const XML_Char *name,
+ XML_Content *model);
XMLPARSEAPI(void)
XML_SetElementDeclHandler(XML_Parser parser,
- XML_ElementDeclHandler eldecl);
+ XML_ElementDeclHandler eldecl);
/* The Attlist declaration handler is called for *each* attribute. So
a single Attlist declaration with multiple attributes declared will
@@ -164,16 +164,16 @@ XML_SetElementDeclHandler(XML_Parser parser,
true and default is non-NULL, then this is a "#FIXED" default.
*/
typedef void (XMLCALL *XML_AttlistDeclHandler) (
- void *userData,
- const XML_Char *elname,
- const XML_Char *attname,
- const XML_Char *att_type,
- const XML_Char *dflt,
- int isrequired);
+ void *userData,
+ const XML_Char *elname,
+ const XML_Char *attname,
+ const XML_Char *att_type,
+ const XML_Char *dflt,
+ int isrequired);
XMLPARSEAPI(void)
XML_SetAttlistDeclHandler(XML_Parser parser,
- XML_AttlistDeclHandler attdecl);
+ XML_AttlistDeclHandler attdecl);
/* The XML declaration handler is called for *both* XML declarations
and text declarations. The way to distinguish is that the version
@@ -184,19 +184,19 @@ XML_SetAttlistDeclHandler(XML_Parser parser,
as no, or that it was given as yes.
*/
typedef void (XMLCALL *XML_XmlDeclHandler) (void *userData,
- const XML_Char *version,
- const XML_Char *encoding,
- int standalone);
+ const XML_Char *version,
+ const XML_Char *encoding,
+ int standalone);
XMLPARSEAPI(void)
XML_SetXmlDeclHandler(XML_Parser parser,
- XML_XmlDeclHandler xmldecl);
+ XML_XmlDeclHandler xmldecl);
typedef struct {
- void *(*malloc_fcn)(size_t size);
- void *(*realloc_fcn)(void *ptr, size_t size);
- void (*free_fcn)(void *ptr);
+ void *(*malloc_fcn)(size_t size);
+ void *(*realloc_fcn)(void *ptr, size_t size);
+ void (*free_fcn)(void *ptr);
} XML_Memory_Handling_Suite;
/* Constructs a new parser; encoding is the encoding specified by the
@@ -231,8 +231,8 @@ XML_ParserCreateNS(const XML_Char *encoding, XML_Char namespaceSeparator);
*/
XMLPARSEAPI(XML_Parser)
XML_ParserCreate_MM(const XML_Char *encoding,
- const XML_Memory_Handling_Suite *memsuite,
- const XML_Char *namespaceSeparator);
+ const XML_Memory_Handling_Suite *memsuite,
+ const XML_Char *namespaceSeparator);
/* Prepare a parser object to be re-used. This is particularly
valuable when memory allocation overhead is disproportionatly high,
@@ -250,27 +250,27 @@ XML_ParserReset(XML_Parser parser, const XML_Char *encoding);
names and values are 0 terminated.
*/
typedef void (XMLCALL *XML_StartElementHandler) (void *userData,
- const XML_Char *name,
- const XML_Char **atts);
+ const XML_Char *name,
+ const XML_Char **atts);
typedef void (XMLCALL *XML_EndElementHandler) (void *userData,
- const XML_Char *name);
+ const XML_Char *name);
/* s is not 0 terminated. */
typedef void (XMLCALL *XML_CharacterDataHandler) (void *userData,
- const XML_Char *s,
- int len);
+ const XML_Char *s,
+ int len);
/* target and data are 0 terminated */
typedef void (XMLCALL *XML_ProcessingInstructionHandler) (
- void *userData,
- const XML_Char *target,
- const XML_Char *data);
+ void *userData,
+ const XML_Char *target,
+ const XML_Char *data);
/* data is 0 terminated */
typedef void (XMLCALL *XML_CommentHandler) (void *userData,
- const XML_Char *data);
+ const XML_Char *data);
typedef void (XMLCALL *XML_StartCdataSectionHandler) (void *userData);
typedef void (XMLCALL *XML_EndCdataSectionHandler) (void *userData);
@@ -289,18 +289,18 @@ typedef void (XMLCALL *XML_EndCdataSectionHandler) (void *userData);
multiple calls.
*/
typedef void (XMLCALL *XML_DefaultHandler) (void *userData,
- const XML_Char *s,
- int len);
+ const XML_Char *s,
+ int len);
/* This is called for the start of the DOCTYPE declaration, before
any DTD or internal subset is parsed.
*/
typedef void (XMLCALL *XML_StartDoctypeDeclHandler) (
- void *userData,
- const XML_Char *doctypeName,
- const XML_Char *sysid,
- const XML_Char *pubid,
- int has_internal_subset);
+ void *userData,
+ const XML_Char *doctypeName,
+ const XML_Char *sysid,
+ const XML_Char *pubid,
+ int has_internal_subset);
/* This is called for the start of the DOCTYPE declaration when the
closing > is encountered, but after processing any external
@@ -327,19 +327,19 @@ typedef void (XMLCALL *XML_EndDoctypeDeclHandler)(void *userData);
that would break binary compatibility.
*/
typedef void (XMLCALL *XML_EntityDeclHandler) (
- void *userData,
- const XML_Char *entityName,
- int is_parameter_entity,
- const XML_Char *value,
- int value_length,
- const XML_Char *base,
- const XML_Char *systemId,
- const XML_Char *publicId,
- const XML_Char *notationName);
+ void *userData,
+ const XML_Char *entityName,
+ int is_parameter_entity,
+ const XML_Char *value,
+ int value_length,
+ const XML_Char *base,
+ const XML_Char *systemId,
+ const XML_Char *publicId,
+ const XML_Char *notationName);
XMLPARSEAPI(void)
XML_SetEntityDeclHandler(XML_Parser parser,
- XML_EntityDeclHandler handler);
+ XML_EntityDeclHandler handler);
/* OBSOLETE -- OBSOLETE -- OBSOLETE
This handler has been superceded by the EntityDeclHandler above.
@@ -351,23 +351,23 @@ XML_SetEntityDeclHandler(XML_Parser parser,
NULL. The other arguments may be.
*/
typedef void (XMLCALL *XML_UnparsedEntityDeclHandler) (
- void *userData,
- const XML_Char *entityName,
- const XML_Char *base,
- const XML_Char *systemId,
- const XML_Char *publicId,
- const XML_Char *notationName);
+ void *userData,
+ const XML_Char *entityName,
+ const XML_Char *base,
+ const XML_Char *systemId,
+ const XML_Char *publicId,
+ const XML_Char *notationName);
/* This is called for a declaration of notation. The base argument is
whatever was set by XML_SetBase. The notationName will never be
NULL. The other arguments can be.
*/
typedef void (XMLCALL *XML_NotationDeclHandler) (
- void *userData,
- const XML_Char *notationName,
- const XML_Char *base,
- const XML_Char *systemId,
- const XML_Char *publicId);
+ void *userData,
+ const XML_Char *notationName,
+ const XML_Char *base,
+ const XML_Char *systemId,
+ const XML_Char *publicId);
/* When namespace processing is enabled, these are called once for
each namespace declaration. The call to the start and end element
@@ -376,13 +376,13 @@ typedef void (XMLCALL *XML_NotationDeclHandler) (
NULL. For an xmlns="" attribute, uri will be NULL.
*/
typedef void (XMLCALL *XML_StartNamespaceDeclHandler) (
- void *userData,
- const XML_Char *prefix,
- const XML_Char *uri);
+ void *userData,
+ const XML_Char *prefix,
+ const XML_Char *uri);
typedef void (XMLCALL *XML_EndNamespaceDeclHandler) (
- void *userData,
- const XML_Char *prefix);
+ void *userData,
+ const XML_Char *prefix);
/* This is called if the document is not standalone, that is, it has an
external subset or a reference to a parameter entity, but does not
@@ -430,11 +430,11 @@ typedef int (XMLCALL *XML_NotStandaloneHandler) (void *userData);
not userData.
*/
typedef int (XMLCALL *XML_ExternalEntityRefHandler) (
- XML_Parser parser,
- const XML_Char *context,
- const XML_Char *base,
- const XML_Char *systemId,
- const XML_Char *publicId);
+ XML_Parser parser,
+ const XML_Char *context,
+ const XML_Char *base,
+ const XML_Char *systemId,
+ const XML_Char *publicId);
/* This is called in two situations:
1) An entity reference is encountered for which no declaration
@@ -447,9 +447,9 @@ typedef int (XMLCALL *XML_ExternalEntityRefHandler) (
declarations or attribute values
*/
typedef void (XMLCALL *XML_SkippedEntityHandler) (
- void *userData,
- const XML_Char *entityName,
- int is_parameter_entity);
+ void *userData,
+ const XML_Char *entityName,
+ int is_parameter_entity);
/* This structure is filled in by the XML_UnknownEncodingHandler to
provide information to the parser about encodings that are unknown
@@ -504,10 +504,10 @@ typedef void (XMLCALL *XML_SkippedEntityHandler) (
sequence of bytes.
*/
typedef struct {
- int map[256];
- void *data;
- int (XMLCALL *convert)(void *data, const char *s);
- void (XMLCALL *release)(void *data);
+ int map[256];
+ void *data;
+ int (XMLCALL *convert)(void *data, const char *s);
+ void (XMLCALL *release)(void *data);
} XML_Encoding;
/* This is called for an encoding that is unknown to the parser.
@@ -526,46 +526,46 @@ typedef struct {
return an XML_UNKNOWN_ENCODING error.
*/
typedef int (XMLCALL *XML_UnknownEncodingHandler) (
- void *encodingHandlerData,
- const XML_Char *name,
- XML_Encoding *info);
+ void *encodingHandlerData,
+ const XML_Char *name,
+ XML_Encoding *info);
XMLPARSEAPI(void)
XML_SetElementHandler(XML_Parser parser,
- XML_StartElementHandler start,
- XML_EndElementHandler end);
+ XML_StartElementHandler start,
+ XML_EndElementHandler end);
XMLPARSEAPI(void)
XML_SetStartElementHandler(XML_Parser parser,
- XML_StartElementHandler handler);
+ XML_StartElementHandler handler);
XMLPARSEAPI(void)
XML_SetEndElementHandler(XML_Parser parser,
- XML_EndElementHandler handler);
+ XML_EndElementHandler handler);
XMLPARSEAPI(void)
XML_SetCharacterDataHandler(XML_Parser parser,
- XML_CharacterDataHandler handler);
+ XML_CharacterDataHandler handler);
XMLPARSEAPI(void)
XML_SetProcessingInstructionHandler(XML_Parser parser,
- XML_ProcessingInstructionHandler handler);
+ XML_ProcessingInstructionHandler handler);
XMLPARSEAPI(void)
XML_SetCommentHandler(XML_Parser parser,
- XML_CommentHandler handler);
+ XML_CommentHandler handler);
XMLPARSEAPI(void)
XML_SetCdataSectionHandler(XML_Parser parser,
- XML_StartCdataSectionHandler start,
- XML_EndCdataSectionHandler end);
+ XML_StartCdataSectionHandler start,
+ XML_EndCdataSectionHandler end);
XMLPARSEAPI(void)
XML_SetStartCdataSectionHandler(XML_Parser parser,
- XML_StartCdataSectionHandler start);
+ XML_StartCdataSectionHandler start);
XMLPARSEAPI(void)
XML_SetEndCdataSectionHandler(XML_Parser parser,
- XML_EndCdataSectionHandler end);
+ XML_EndCdataSectionHandler end);
/* This sets the default handler and also inhibits expansion of
internal entities. These entity references will be passed to the
@@ -573,7 +573,7 @@ XML_SetEndCdataSectionHandler(XML_Parser parser,
*/
XMLPARSEAPI(void)
XML_SetDefaultHandler(XML_Parser parser,
- XML_DefaultHandler handler);
+ XML_DefaultHandler handler);
/* This sets the default handler but does not inhibit expansion of
internal entities. The entity reference will not be passed to the
@@ -581,49 +581,49 @@ XML_SetDefaultHandler(XML_Parser parser,
*/
XMLPARSEAPI(void)
XML_SetDefaultHandlerExpand(XML_Parser parser,
- XML_DefaultHandler handler);
+ XML_DefaultHandler handler);
XMLPARSEAPI(void)
XML_SetDoctypeDeclHandler(XML_Parser parser,
- XML_StartDoctypeDeclHandler start,
- XML_EndDoctypeDeclHandler end);
+ XML_StartDoctypeDeclHandler start,
+ XML_EndDoctypeDeclHandler end);
XMLPARSEAPI(void)
XML_SetStartDoctypeDeclHandler(XML_Parser parser,
- XML_StartDoctypeDeclHandler start);
+ XML_StartDoctypeDeclHandler start);
XMLPARSEAPI(void)
XML_SetEndDoctypeDeclHandler(XML_Parser parser,
- XML_EndDoctypeDeclHandler end);
+ XML_EndDoctypeDeclHandler end);
XMLPARSEAPI(void)
XML_SetUnparsedEntityDeclHandler(XML_Parser parser,
- XML_UnparsedEntityDeclHandler handler);
+ XML_UnparsedEntityDeclHandler handler);
XMLPARSEAPI(void)
XML_SetNotationDeclHandler(XML_Parser parser,
- XML_NotationDeclHandler handler);
+ XML_NotationDeclHandler handler);
XMLPARSEAPI(void)
XML_SetNamespaceDeclHandler(XML_Parser parser,
- XML_StartNamespaceDeclHandler start,
- XML_EndNamespaceDeclHandler end);
+ XML_StartNamespaceDeclHandler start,
+ XML_EndNamespaceDeclHandler end);
XMLPARSEAPI(void)
XML_SetStartNamespaceDeclHandler(XML_Parser parser,
- XML_StartNamespaceDeclHandler start);
+ XML_StartNamespaceDeclHandler start);
XMLPARSEAPI(void)
XML_SetEndNamespaceDeclHandler(XML_Parser parser,
- XML_EndNamespaceDeclHandler end);
+ XML_EndNamespaceDeclHandler end);
XMLPARSEAPI(void)
XML_SetNotStandaloneHandler(XML_Parser parser,
- XML_NotStandaloneHandler handler);
+ XML_NotStandaloneHandler handler);
XMLPARSEAPI(void)
XML_SetExternalEntityRefHandler(XML_Parser parser,
- XML_ExternalEntityRefHandler handler);
+ XML_ExternalEntityRefHandler handler);
/* If a non-NULL value for arg is specified here, then it will be
passed as the first argument to the external entity ref handler
@@ -631,16 +631,16 @@ XML_SetExternalEntityRefHandler(XML_Parser parser,
*/
XMLPARSEAPI(void)
XML_SetExternalEntityRefHandlerArg(XML_Parser parser,
- void *arg);
+ void *arg);
XMLPARSEAPI(void)
XML_SetSkippedEntityHandler(XML_Parser parser,
- XML_SkippedEntityHandler handler);
+ XML_SkippedEntityHandler handler);
XMLPARSEAPI(void)
XML_SetUnknownEncodingHandler(XML_Parser parser,
- XML_UnknownEncodingHandler handler,
- void *encodingHandlerData);
+ XML_UnknownEncodingHandler handler,
+ void *encodingHandlerData);
/* This can be called within a handler for a start element, end
element, processing instruction or character data. It causes the
@@ -749,10 +749,10 @@ XML_GetIdAttributeIndex(XML_Parser parser);
info->valueEnd - info->valueStart = 4 bytes.
*/
typedef struct {
- XML_Index nameStart; /* Offset to beginning of the attribute name. */
- XML_Index nameEnd; /* Offset after the attribute name's last byte. */
- XML_Index valueStart; /* Offset to beginning of the attribute value. */
- XML_Index valueEnd; /* Offset after the attribute value's last byte. */
+ XML_Index nameStart; /* Offset to beginning of the attribute name. */
+ XML_Index nameEnd; /* Offset after the attribute name's last byte. */
+ XML_Index valueStart; /* Offset to beginning of the attribute value. */
+ XML_Index valueEnd; /* Offset after the attribute value's last byte. */
} XML_AttrInfo;
/* Returns an array of XML_AttrInfo structures for the attribute/value pairs
@@ -833,15 +833,15 @@ XMLPARSEAPI(enum XML_Status)
XML_ResumeParser(XML_Parser parser);
enum XML_Parsing {
- XML_INITIALIZED,
- XML_PARSING,
- XML_FINISHED,
- XML_SUSPENDED
+ XML_INITIALIZED,
+ XML_PARSING,
+ XML_FINISHED,
+ XML_SUSPENDED
};
typedef struct {
- enum XML_Parsing parsing;
- XML_Bool finalBuffer;
+ enum XML_Parsing parsing;
+ XML_Bool finalBuffer;
} XML_ParsingStatus;
/* Returns status of parser with respect to being initialized, parsing,
@@ -870,13 +870,13 @@ XML_GetParsingStatus(XML_Parser parser, XML_ParsingStatus *status);
*/
XMLPARSEAPI(XML_Parser)
XML_ExternalEntityParserCreate(XML_Parser parser,
- const XML_Char *context,
- const XML_Char *encoding);
+ const XML_Char *context,
+ const XML_Char *encoding);
enum XML_ParamEntityParsing {
- XML_PARAM_ENTITY_PARSING_NEVER,
- XML_PARAM_ENTITY_PARSING_UNLESS_STANDALONE,
- XML_PARAM_ENTITY_PARSING_ALWAYS
+ XML_PARAM_ENTITY_PARSING_NEVER,
+ XML_PARAM_ENTITY_PARSING_UNLESS_STANDALONE,
+ XML_PARAM_ENTITY_PARSING_ALWAYS
};
/* Controls parsing of parameter entities (including the external DTD
@@ -904,7 +904,7 @@ enum XML_ParamEntityParsing {
*/
XMLPARSEAPI(int)
XML_SetParamEntityParsing(XML_Parser parser,
- enum XML_ParamEntityParsing parsing);
+ enum XML_ParamEntityParsing parsing);
/* Sets the hash salt to use for internal hash calculations.
Helps in preventing DoS attacks based on predicting hash
@@ -913,7 +913,7 @@ XML_SetParamEntityParsing(XML_Parser parser,
*/
XMLPARSEAPI(int)
XML_SetHashSalt(XML_Parser parser,
- unsigned long hash_salt);
+ unsigned long hash_salt);
/* If XML_Parse or XML_ParseBuffer have returned XML_STATUS_ERROR, then
XML_GetErrorCode returns information about the error.
@@ -959,8 +959,8 @@ XML_GetCurrentByteCount(XML_Parser parser);
*/
XMLPARSEAPI(const char *)
XML_GetInputContext(XML_Parser parser,
- int *offset,
- int *size);
+ int *offset,
+ int *size);
/* For backwards compatibility with previous versions. */
#define XML_GetErrorLineNumber XML_GetCurrentLineNumber
@@ -994,9 +994,9 @@ XMLPARSEAPI(const XML_LChar *)
XML_ExpatVersion(void);
typedef struct {
- int major;
- int minor;
- int micro;
+ int major;
+ int minor;
+ int micro;
} XML_Expat_Version;
/* Return an XML_Expat_Version structure containing numeric version
@@ -1007,24 +1007,24 @@ XML_ExpatVersionInfo(void);
/* Added in Expat 1.95.5. */
enum XML_FeatureEnum {
- XML_FEATURE_END = 0,
- XML_FEATURE_UNICODE,
- XML_FEATURE_UNICODE_WCHAR_T,
- XML_FEATURE_DTD,
- XML_FEATURE_CONTEXT_BYTES,
- XML_FEATURE_MIN_SIZE,
- XML_FEATURE_SIZEOF_XML_CHAR,
- XML_FEATURE_SIZEOF_XML_LCHAR,
- XML_FEATURE_NS,
- XML_FEATURE_LARGE_SIZE,
- XML_FEATURE_ATTR_INFO
- /* Additional features must be added to the end of this enum. */
+ XML_FEATURE_END = 0,
+ XML_FEATURE_UNICODE,
+ XML_FEATURE_UNICODE_WCHAR_T,
+ XML_FEATURE_DTD,
+ XML_FEATURE_CONTEXT_BYTES,
+ XML_FEATURE_MIN_SIZE,
+ XML_FEATURE_SIZEOF_XML_CHAR,
+ XML_FEATURE_SIZEOF_XML_LCHAR,
+ XML_FEATURE_NS,
+ XML_FEATURE_LARGE_SIZE,
+ XML_FEATURE_ATTR_INFO
+ /* Additional features must be added to the end of this enum. */
};
typedef struct {
- enum XML_FeatureEnum feature;
- const XML_LChar *name;
- long int value;
+ enum XML_FeatureEnum feature;
+ const XML_LChar *name;
+ long int value;
} XML_Feature;
XMLPARSEAPI(const XML_Feature *)
diff --git a/src/lib/expat/xmlparse.c b/src/lib/expat/xmlparse.c
index ebaa04b77e2..64fcf76a53c 100644
--- a/src/lib/expat/xmlparse.c
+++ b/src/lib/expat/xmlparse.c
@@ -81,15 +81,15 @@ typedef char ICHAR;
typedef const XML_Char *KEY;
typedef struct {
- KEY name;
+ KEY name;
} NAMED;
typedef struct {
- NAMED **v;
- unsigned char power;
- size_t size;
- size_t used;
- const XML_Memory_Handling_Suite *mem;
+ NAMED **v;
+ unsigned char power;
+ size_t size;
+ size_t used;
+ const XML_Memory_Handling_Suite *mem;
} HASH_TABLE;
/* Basic character hash algorithm, taken from Python's string hash:
@@ -98,10 +98,10 @@ typedef struct {
*/
#ifdef XML_UNICODE
#define CHAR_HASH(h, c) \
- (((h) * 0xF4243) ^ (unsigned short)(c))
+ (((h) * 0xF4243) ^ (unsigned short)(c))
#else
#define CHAR_HASH(h, c) \
- (((h) * 0xF4243) ^ (unsigned char)(c))
+ (((h) * 0xF4243) ^ (unsigned char)(c))
#endif
/* For probing (after a collision) we need a step size relative prime
@@ -113,13 +113,13 @@ typedef struct {
it odd, since odd numbers are always relative prime to a power of 2.
*/
#define SECOND_HASH(hash, mask, power) \
- ((((hash) & ~(mask)) >> ((power) - 1)) & ((mask) >> 2))
+ ((((hash) & ~(mask)) >> ((power) - 1)) & ((mask) >> 2))
#define PROBE_STEP(hash, mask, power) \
- ((unsigned char)((SECOND_HASH(hash, mask, power)) | 1))
+ ((unsigned char)((SECOND_HASH(hash, mask, power)) | 1))
typedef struct {
- NAMED **p;
- NAMED **end;
+ NAMED **p;
+ NAMED **end;
} HASH_TABLE_ITER;
#define INIT_TAG_BUF_SIZE 32 /* must be a multiple of sizeof(XML_Char) */
@@ -132,27 +132,27 @@ typedef struct {
#define EXPAND_SPARE 24
typedef struct binding {
- struct prefix *prefix;
- struct binding *nextTagBinding;
- struct binding *prevPrefixBinding;
- const struct attribute_id *attId;
- XML_Char *uri;
- int uriLen;
- int uriAlloc;
+ struct prefix *prefix;
+ struct binding *nextTagBinding;
+ struct binding *prevPrefixBinding;
+ const struct attribute_id *attId;
+ XML_Char *uri;
+ int uriLen;
+ int uriAlloc;
} BINDING;
typedef struct prefix {
- const XML_Char *name;
- BINDING *binding;
+ const XML_Char *name;
+ BINDING *binding;
} PREFIX;
typedef struct {
- const XML_Char *str;
- const XML_Char *localPart;
- const XML_Char *prefix;
- int strLen;
- int uriLen;
- int prefixLen;
+ const XML_Char *str;
+ const XML_Char *localPart;
+ const XML_Char *prefix;
+ int strLen;
+ int uriLen;
+ int prefixLen;
} TAG_NAME;
/* TAG represents an open element.
@@ -169,128 +169,128 @@ typedef struct {
TAG objects in a free list.
*/
typedef struct tag {
- struct tag *parent; /* parent of this element */
- const char *rawName; /* tagName in the original encoding */
- int rawNameLength;
- TAG_NAME name; /* tagName in the API encoding */
- char *buf; /* buffer for name components */
- char *bufEnd; /* end of the buffer */
- BINDING *bindings;
+ struct tag *parent; /* parent of this element */
+ const char *rawName; /* tagName in the original encoding */
+ int rawNameLength;
+ TAG_NAME name; /* tagName in the API encoding */
+ char *buf; /* buffer for name components */
+ char *bufEnd; /* end of the buffer */
+ BINDING *bindings;
} TAG;
typedef struct {
- const XML_Char *name;
- const XML_Char *textPtr;
- int textLen; /* length in XML_Chars */
- int processed; /* # of processed bytes - when suspended */
- const XML_Char *systemId;
- const XML_Char *base;
- const XML_Char *publicId;
- const XML_Char *notation;
- XML_Bool open;
- XML_Bool is_param;
- XML_Bool is_internal; /* true if declared in internal subset outside PE */
+ const XML_Char *name;
+ const XML_Char *textPtr;
+ int textLen; /* length in XML_Chars */
+ int processed; /* # of processed bytes - when suspended */
+ const XML_Char *systemId;
+ const XML_Char *base;
+ const XML_Char *publicId;
+ const XML_Char *notation;
+ XML_Bool open;
+ XML_Bool is_param;
+ XML_Bool is_internal; /* true if declared in internal subset outside PE */
} ENTITY;
typedef struct {
- enum XML_Content_Type type;
- enum XML_Content_Quant quant;
- const XML_Char * name;
- int firstchild;
- int lastchild;
- int childcnt;
- int nextsib;
+ enum XML_Content_Type type;
+ enum XML_Content_Quant quant;
+ const XML_Char * name;
+ int firstchild;
+ int lastchild;
+ int childcnt;
+ int nextsib;
} CONTENT_SCAFFOLD;
#define INIT_SCAFFOLD_ELEMENTS 32
typedef struct block {
- struct block *next;
- int size;
- XML_Char s[1];
+ struct block *next;
+ int size;
+ XML_Char s[1];
} BLOCK;
typedef struct {
- BLOCK *blocks;
- BLOCK *freeBlocks;
- const XML_Char *end;
- XML_Char *ptr;
- XML_Char *start;
- const XML_Memory_Handling_Suite *mem;
+ BLOCK *blocks;
+ BLOCK *freeBlocks;
+ const XML_Char *end;
+ XML_Char *ptr;
+ XML_Char *start;
+ const XML_Memory_Handling_Suite *mem;
} STRING_POOL;
/* The XML_Char before the name is used to determine whether
an attribute has been specified. */
typedef struct attribute_id {
- XML_Char *name;
- PREFIX *prefix;
- XML_Bool maybeTokenized;
- XML_Bool xmlns;
+ XML_Char *name;
+ PREFIX *prefix;
+ XML_Bool maybeTokenized;
+ XML_Bool xmlns;
} ATTRIBUTE_ID;
typedef struct {
- const ATTRIBUTE_ID *id;
- XML_Bool isCdata;
- const XML_Char *value;
+ const ATTRIBUTE_ID *id;
+ XML_Bool isCdata;
+ const XML_Char *value;
} DEFAULT_ATTRIBUTE;
typedef struct {
- unsigned long version;
- unsigned long hash;
- const XML_Char *uriName;
+ unsigned long version;
+ unsigned long hash;
+ const XML_Char *uriName;
} NS_ATT;
typedef struct {
- const XML_Char *name;
- PREFIX *prefix;
- const ATTRIBUTE_ID *idAtt;
- int nDefaultAtts;
- int allocDefaultAtts;
- DEFAULT_ATTRIBUTE *defaultAtts;
+ const XML_Char *name;
+ PREFIX *prefix;
+ const ATTRIBUTE_ID *idAtt;
+ int nDefaultAtts;
+ int allocDefaultAtts;
+ DEFAULT_ATTRIBUTE *defaultAtts;
} ELEMENT_TYPE;
typedef struct {
- HASH_TABLE generalEntities;
- HASH_TABLE elementTypes;
- HASH_TABLE attributeIds;
- HASH_TABLE prefixes;
- STRING_POOL pool;
- STRING_POOL entityValuePool;
- /* false once a parameter entity reference has been skipped */
- XML_Bool keepProcessing;
- /* true once an internal or external PE reference has been encountered;
- this includes the reference to an external subset */
- XML_Bool hasParamEntityRefs;
- XML_Bool standalone;
+ HASH_TABLE generalEntities;
+ HASH_TABLE elementTypes;
+ HASH_TABLE attributeIds;
+ HASH_TABLE prefixes;
+ STRING_POOL pool;
+ STRING_POOL entityValuePool;
+ /* false once a parameter entity reference has been skipped */
+ XML_Bool keepProcessing;
+ /* true once an internal or external PE reference has been encountered;
+ this includes the reference to an external subset */
+ XML_Bool hasParamEntityRefs;
+ XML_Bool standalone;
#ifdef XML_DTD
- /* indicates if external PE has been read */
- XML_Bool paramEntityRead;
- HASH_TABLE paramEntities;
+ /* indicates if external PE has been read */
+ XML_Bool paramEntityRead;
+ HASH_TABLE paramEntities;
#endif /* XML_DTD */
- PREFIX defaultPrefix;
- /* === scaffolding for building content model === */
- XML_Bool in_eldecl;
- CONTENT_SCAFFOLD *scaffold;
- unsigned contentStringLen;
- unsigned scaffSize;
- unsigned scaffCount;
- int scaffLevel;
- int *scaffIndex;
+ PREFIX defaultPrefix;
+ /* === scaffolding for building content model === */
+ XML_Bool in_eldecl;
+ CONTENT_SCAFFOLD *scaffold;
+ unsigned contentStringLen;
+ unsigned scaffSize;
+ unsigned scaffCount;
+ int scaffLevel;
+ int *scaffIndex;
} DTD;
typedef struct open_internal_entity {
- const char *internalEventPtr;
- const char *internalEventEndPtr;
- struct open_internal_entity *next;
- ENTITY *entity;
- int startTagLevel;
- XML_Bool betweenDecl; /* WFC: PE Between Declarations */
+ const char *internalEventPtr;
+ const char *internalEventEndPtr;
+ struct open_internal_entity *next;
+ ENTITY *entity;
+ int startTagLevel;
+ XML_Bool betweenDecl; /* WFC: PE Between Declarations */
} OPEN_INTERNAL_ENTITY;
typedef enum XML_Error PTRCALL Processor(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr);
+ const char *start,
+ const char *end,
+ const char **endPtr);
static Processor prologProcessor;
static Processor prologInitProcessor;
@@ -315,61 +315,61 @@ static enum XML_Error
handleUnknownEncoding(XML_Parser parser, const XML_Char *encodingName);
static enum XML_Error
processXmlDecl(XML_Parser parser, int isGeneralTextEntity,
- const char *s, const char *next);
+ const char *s, const char *next);
static enum XML_Error
initializeEncoding(XML_Parser parser);
static enum XML_Error
doProlog(XML_Parser parser, const ENCODING *enc, const char *s,
- const char *end, int tok, const char *next, const char **nextPtr,
- XML_Bool haveMore);
+ const char *end, int tok, const char *next, const char **nextPtr,
+ XML_Bool haveMore);
static enum XML_Error
processInternalEntity(XML_Parser parser, ENTITY *entity,
- XML_Bool betweenDecl);
+ XML_Bool betweenDecl);
static enum XML_Error
doContent(XML_Parser parser, int startTagLevel, const ENCODING *enc,
- const char *start, const char *end, const char **endPtr,
- XML_Bool haveMore);
+ const char *start, const char *end, const char **endPtr,
+ XML_Bool haveMore);
static enum XML_Error
doCdataSection(XML_Parser parser, const ENCODING *, const char **startPtr,
- const char *end, const char **nextPtr, XML_Bool haveMore);
+ const char *end, const char **nextPtr, XML_Bool haveMore);
#ifdef XML_DTD
static enum XML_Error
doIgnoreSection(XML_Parser parser, const ENCODING *, const char **startPtr,
- const char *end, const char **nextPtr, XML_Bool haveMore);
+ const char *end, const char **nextPtr, XML_Bool haveMore);
#endif /* XML_DTD */
static enum XML_Error
storeAtts(XML_Parser parser, const ENCODING *, const char *s,
- TAG_NAME *tagNamePtr, BINDING **bindingsPtr);
+ TAG_NAME *tagNamePtr, BINDING **bindingsPtr);
static enum XML_Error
addBinding(XML_Parser parser, PREFIX *prefix, const ATTRIBUTE_ID *attId,
- const XML_Char *uri, BINDING **bindingsPtr);
+ const XML_Char *uri, BINDING **bindingsPtr);
static int
defineAttribute(ELEMENT_TYPE *type, ATTRIBUTE_ID *, XML_Bool isCdata,
- XML_Bool isId, const XML_Char *dfltValue, XML_Parser parser);
+ XML_Bool isId, const XML_Char *dfltValue, XML_Parser parser);
static enum XML_Error
storeAttributeValue(XML_Parser parser, const ENCODING *, XML_Bool isCdata,
- const char *, const char *, STRING_POOL *);
+ const char *, const char *, STRING_POOL *);
static enum XML_Error
appendAttributeValue(XML_Parser parser, const ENCODING *, XML_Bool isCdata,
- const char *, const char *, STRING_POOL *);
+ const char *, const char *, STRING_POOL *);
static ATTRIBUTE_ID *
getAttributeId(XML_Parser parser, const ENCODING *enc, const char *start,
- const char *end);
+ const char *end);
static int
setElementTypePrefix(XML_Parser parser, ELEMENT_TYPE *);
static enum XML_Error
storeEntityValue(XML_Parser parser, const ENCODING *enc, const char *start,
- const char *end);
+ const char *end);
static int
reportProcessingInstruction(XML_Parser parser, const ENCODING *enc,
- const char *start, const char *end);
+ const char *start, const char *end);
static int
reportComment(XML_Parser parser, const ENCODING *enc, const char *start,
- const char *end);
+ const char *end);
static void
reportDefault(XML_Parser parser, const ENCODING *enc, const char *start,
- const char *end);
+ const char *end);
static const XML_Char * getContext(XML_Parser parser);
static XML_Bool
@@ -384,10 +384,10 @@ static void
dtdDestroy(DTD *p, XML_Bool isDocEntity, const XML_Memory_Handling_Suite *ms);
static int
dtdCopy(XML_Parser oldParser,
- DTD *newDtd, const DTD *oldDtd, const XML_Memory_Handling_Suite *ms);
+ DTD *newDtd, const DTD *oldDtd, const XML_Memory_Handling_Suite *ms);
static int
copyEntityTable(XML_Parser oldParser,
- HASH_TABLE *, STRING_POOL *, const HASH_TABLE *);
+ HASH_TABLE *, STRING_POOL *, const HASH_TABLE *);
static NAMED *
lookup(XML_Parser parser, HASH_TABLE *table, KEY name, size_t createSize);
static void FASTCALL
@@ -404,10 +404,10 @@ static void FASTCALL poolClear(STRING_POOL *);
static void FASTCALL poolDestroy(STRING_POOL *);
static XML_Char *
poolAppend(STRING_POOL *pool, const ENCODING *enc,
- const char *ptr, const char *end);
+ const char *ptr, const char *end);
static XML_Char *
poolStoreString(STRING_POOL *pool, const ENCODING *enc,
- const char *ptr, const char *end);
+ const char *ptr, const char *end);
static XML_Bool FASTCALL poolGrow(STRING_POOL *pool);
static const XML_Char * FASTCALL
poolCopyString(STRING_POOL *pool, const XML_Char *s);
@@ -420,16 +420,16 @@ static int FASTCALL nextScaffoldPart(XML_Parser parser);
static XML_Content * build_model(XML_Parser parser);
static ELEMENT_TYPE *
getElementType(XML_Parser parser, const ENCODING *enc,
- const char *ptr, const char *end);
+ const char *ptr, const char *end);
static unsigned long generate_hash_secret_salt(void);
static XML_Bool startParsing(XML_Parser parser);
static XML_Parser
parserCreate(const XML_Char *encodingName,
- const XML_Memory_Handling_Suite *memsuite,
- const XML_Char *nameSep,
- DTD *dtd);
+ const XML_Memory_Handling_Suite *memsuite,
+ const XML_Char *nameSep,
+ DTD *dtd);
static void
parserInit(XML_Parser parser, const XML_Char *encodingName);
@@ -442,111 +442,111 @@ parserInit(XML_Parser parser, const XML_Char *encodingName);
#define poolDiscard(pool) ((pool)->ptr = (pool)->start)
#define poolFinish(pool) ((pool)->start = (pool)->ptr)
#define poolAppendChar(pool, c) \
- (((pool)->ptr == (pool)->end && !poolGrow(pool)) \
- ? 0 \
- : ((*((pool)->ptr)++ = c), 1))
+ (((pool)->ptr == (pool)->end && !poolGrow(pool)) \
+ ? 0 \
+ : ((*((pool)->ptr)++ = c), 1))
struct XML_ParserStruct {
- /* The first member must be userData so that the XML_GetUserData
- macro works. */
- void *m_userData;
- void *m_handlerArg;
- char *m_buffer;
- const XML_Memory_Handling_Suite m_mem;
- /* first character to be parsed */
- const char *m_bufferPtr;
- /* past last character to be parsed */
- char *m_bufferEnd;
- /* allocated end of buffer */
- const char *m_bufferLim;
- XML_Index m_parseEndByteIndex;
- const char *m_parseEndPtr;
- XML_Char *m_dataBuf;
- XML_Char *m_dataBufEnd;
- XML_StartElementHandler m_startElementHandler;
- XML_EndElementHandler m_endElementHandler;
- XML_CharacterDataHandler m_characterDataHandler;
- XML_ProcessingInstructionHandler m_processingInstructionHandler;
- XML_CommentHandler m_commentHandler;
- XML_StartCdataSectionHandler m_startCdataSectionHandler;
- XML_EndCdataSectionHandler m_endCdataSectionHandler;
- XML_DefaultHandler m_defaultHandler;
- XML_StartDoctypeDeclHandler m_startDoctypeDeclHandler;
- XML_EndDoctypeDeclHandler m_endDoctypeDeclHandler;
- XML_UnparsedEntityDeclHandler m_unparsedEntityDeclHandler;
- XML_NotationDeclHandler m_notationDeclHandler;
- XML_StartNamespaceDeclHandler m_startNamespaceDeclHandler;
- XML_EndNamespaceDeclHandler m_endNamespaceDeclHandler;
- XML_NotStandaloneHandler m_notStandaloneHandler;
- XML_ExternalEntityRefHandler m_externalEntityRefHandler;
- XML_Parser m_externalEntityRefHandlerArg;
- XML_SkippedEntityHandler m_skippedEntityHandler;
- XML_UnknownEncodingHandler m_unknownEncodingHandler;
- XML_ElementDeclHandler m_elementDeclHandler;
- XML_AttlistDeclHandler m_attlistDeclHandler;
- XML_EntityDeclHandler m_entityDeclHandler;
- XML_XmlDeclHandler m_xmlDeclHandler;
- const ENCODING *m_encoding;
- INIT_ENCODING m_initEncoding;
- const ENCODING *m_internalEncoding;
- const XML_Char *m_protocolEncodingName;
- XML_Bool m_ns;
- XML_Bool m_ns_triplets;
- void *m_unknownEncodingMem;
- void *m_unknownEncodingData;
- void *m_unknownEncodingHandlerData;
- void (XMLCALL *m_unknownEncodingRelease)(void *);
- PROLOG_STATE m_prologState;
- Processor *m_processor;
- enum XML_Error m_errorCode;
- const char *m_eventPtr;
- const char *m_eventEndPtr;
- const char *m_positionPtr;
- OPEN_INTERNAL_ENTITY *m_openInternalEntities;
- OPEN_INTERNAL_ENTITY *m_freeInternalEntities;
- XML_Bool m_defaultExpandInternalEntities;
- int m_tagLevel;
- ENTITY *m_declEntity;
- const XML_Char *m_doctypeName;
- const XML_Char *m_doctypeSysid;
- const XML_Char *m_doctypePubid;
- const XML_Char *m_declAttributeType;
- const XML_Char *m_declNotationName;
- const XML_Char *m_declNotationPublicId;
- ELEMENT_TYPE *m_declElementType;
- ATTRIBUTE_ID *m_declAttributeId;
- XML_Bool m_declAttributeIsCdata;
- XML_Bool m_declAttributeIsId;
- DTD *m_dtd;
- const XML_Char *m_curBase;
- TAG *m_tagStack;
- TAG *m_freeTagList;
- BINDING *m_inheritedBindings;
- BINDING *m_freeBindingList;
- int m_attsSize;
- int m_nSpecifiedAtts;
- int m_idAttIndex;
- ATTRIBUTE *m_atts;
- NS_ATT *m_nsAtts;
- unsigned long m_nsAttsVersion;
- unsigned char m_nsAttsPower;
+ /* The first member must be userData so that the XML_GetUserData
+ macro works. */
+ void *m_userData;
+ void *m_handlerArg;
+ char *m_buffer;
+ const XML_Memory_Handling_Suite m_mem;
+ /* first character to be parsed */
+ const char *m_bufferPtr;
+ /* past last character to be parsed */
+ char *m_bufferEnd;
+ /* allocated end of buffer */
+ const char *m_bufferLim;
+ XML_Index m_parseEndByteIndex;
+ const char *m_parseEndPtr;
+ XML_Char *m_dataBuf;
+ XML_Char *m_dataBufEnd;
+ XML_StartElementHandler m_startElementHandler;
+ XML_EndElementHandler m_endElementHandler;
+ XML_CharacterDataHandler m_characterDataHandler;
+ XML_ProcessingInstructionHandler m_processingInstructionHandler;
+ XML_CommentHandler m_commentHandler;
+ XML_StartCdataSectionHandler m_startCdataSectionHandler;
+ XML_EndCdataSectionHandler m_endCdataSectionHandler;
+ XML_DefaultHandler m_defaultHandler;
+ XML_StartDoctypeDeclHandler m_startDoctypeDeclHandler;
+ XML_EndDoctypeDeclHandler m_endDoctypeDeclHandler;
+ XML_UnparsedEntityDeclHandler m_unparsedEntityDeclHandler;
+ XML_NotationDeclHandler m_notationDeclHandler;
+ XML_StartNamespaceDeclHandler m_startNamespaceDeclHandler;
+ XML_EndNamespaceDeclHandler m_endNamespaceDeclHandler;
+ XML_NotStandaloneHandler m_notStandaloneHandler;
+ XML_ExternalEntityRefHandler m_externalEntityRefHandler;
+ XML_Parser m_externalEntityRefHandlerArg;
+ XML_SkippedEntityHandler m_skippedEntityHandler;
+ XML_UnknownEncodingHandler m_unknownEncodingHandler;
+ XML_ElementDeclHandler m_elementDeclHandler;
+ XML_AttlistDeclHandler m_attlistDeclHandler;
+ XML_EntityDeclHandler m_entityDeclHandler;
+ XML_XmlDeclHandler m_xmlDeclHandler;
+ const ENCODING *m_encoding;
+ INIT_ENCODING m_initEncoding;
+ const ENCODING *m_internalEncoding;
+ const XML_Char *m_protocolEncodingName;
+ XML_Bool m_ns;
+ XML_Bool m_ns_triplets;
+ void *m_unknownEncodingMem;
+ void *m_unknownEncodingData;
+ void *m_unknownEncodingHandlerData;
+ void (XMLCALL *m_unknownEncodingRelease)(void *);
+ PROLOG_STATE m_prologState;
+ Processor *m_processor;
+ enum XML_Error m_errorCode;
+ const char *m_eventPtr;
+ const char *m_eventEndPtr;
+ const char *m_positionPtr;
+ OPEN_INTERNAL_ENTITY *m_openInternalEntities;
+ OPEN_INTERNAL_ENTITY *m_freeInternalEntities;
+ XML_Bool m_defaultExpandInternalEntities;
+ int m_tagLevel;
+ ENTITY *m_declEntity;
+ const XML_Char *m_doctypeName;
+ const XML_Char *m_doctypeSysid;
+ const XML_Char *m_doctypePubid;
+ const XML_Char *m_declAttributeType;
+ const XML_Char *m_declNotationName;
+ const XML_Char *m_declNotationPublicId;
+ ELEMENT_TYPE *m_declElementType;
+ ATTRIBUTE_ID *m_declAttributeId;
+ XML_Bool m_declAttributeIsCdata;
+ XML_Bool m_declAttributeIsId;
+ DTD *m_dtd;
+ const XML_Char *m_curBase;
+ TAG *m_tagStack;
+ TAG *m_freeTagList;
+ BINDING *m_inheritedBindings;
+ BINDING *m_freeBindingList;
+ int m_attsSize;
+ int m_nSpecifiedAtts;
+ int m_idAttIndex;
+ ATTRIBUTE *m_atts;
+ NS_ATT *m_nsAtts;
+ unsigned long m_nsAttsVersion;
+ unsigned char m_nsAttsPower;
#ifdef XML_ATTR_INFO
- XML_AttrInfo *m_attInfo;
+ XML_AttrInfo *m_attInfo;
#endif
- POSITION m_position;
- STRING_POOL m_tempPool;
- STRING_POOL m_temp2Pool;
- char *m_groupConnector;
- unsigned int m_groupSize;
- XML_Char m_namespaceSeparator;
- XML_Parser m_parentParser;
- XML_ParsingStatus m_parsingStatus;
+ POSITION m_position;
+ STRING_POOL m_tempPool;
+ STRING_POOL m_temp2Pool;
+ char *m_groupConnector;
+ unsigned int m_groupSize;
+ XML_Char m_namespaceSeparator;
+ XML_Parser m_parentParser;
+ XML_ParsingStatus m_parsingStatus;
#ifdef XML_DTD
- XML_Bool m_isParamEntity;
- XML_Bool m_useForeignDTD;
- enum XML_ParamEntityParsing m_paramEntityParsing;
+ XML_Bool m_isParamEntity;
+ XML_Bool m_useForeignDTD;
+ enum XML_ParamEntityParsing m_paramEntityParsing;
#endif
- unsigned long m_hash_secret_salt;
+ unsigned long m_hash_secret_salt;
};
#define MALLOC(s) (parser->m_mem.malloc_fcn((s)))
@@ -559,27 +559,27 @@ struct XML_ParserStruct {
#define endElementHandler (parser->m_endElementHandler)
#define characterDataHandler (parser->m_characterDataHandler)
#define processingInstructionHandler \
- (parser->m_processingInstructionHandler)
+ (parser->m_processingInstructionHandler)
#define commentHandler (parser->m_commentHandler)
#define startCdataSectionHandler \
- (parser->m_startCdataSectionHandler)
+ (parser->m_startCdataSectionHandler)
#define endCdataSectionHandler (parser->m_endCdataSectionHandler)
#define defaultHandler (parser->m_defaultHandler)
#define startDoctypeDeclHandler (parser->m_startDoctypeDeclHandler)
#define endDoctypeDeclHandler (parser->m_endDoctypeDeclHandler)
#define unparsedEntityDeclHandler \
- (parser->m_unparsedEntityDeclHandler)
+ (parser->m_unparsedEntityDeclHandler)
#define notationDeclHandler (parser->m_notationDeclHandler)
#define startNamespaceDeclHandler \
- (parser->m_startNamespaceDeclHandler)
+ (parser->m_startNamespaceDeclHandler)
#define endNamespaceDeclHandler (parser->m_endNamespaceDeclHandler)
#define notStandaloneHandler (parser->m_notStandaloneHandler)
#define externalEntityRefHandler \
- (parser->m_externalEntityRefHandler)
+ (parser->m_externalEntityRefHandler)
#define externalEntityRefHandlerArg \
- (parser->m_externalEntityRefHandlerArg)
+ (parser->m_externalEntityRefHandlerArg)
#define internalEntityRefHandler \
- (parser->m_internalEntityRefHandler)
+ (parser->m_internalEntityRefHandler)
#define skippedEntityHandler (parser->m_skippedEntityHandler)
#define unknownEncodingHandler (parser->m_unknownEncodingHandler)
#define elementDeclHandler (parser->m_elementDeclHandler)
@@ -592,7 +592,7 @@ struct XML_ParserStruct {
#define unknownEncodingMem (parser->m_unknownEncodingMem)
#define unknownEncodingData (parser->m_unknownEncodingData)
#define unknownEncodingHandlerData \
- (parser->m_unknownEncodingHandlerData)
+ (parser->m_unknownEncodingHandlerData)
#define unknownEncodingRelease (parser->m_unknownEncodingRelease)
#define protocolEncodingName (parser->m_protocolEncodingName)
#define ns (parser->m_ns)
@@ -607,7 +607,7 @@ struct XML_ParserStruct {
#define openInternalEntities (parser->m_openInternalEntities)
#define freeInternalEntities (parser->m_freeInternalEntities)
#define defaultExpandInternalEntities \
- (parser->m_defaultExpandInternalEntities)
+ (parser->m_defaultExpandInternalEntities)
#define tagLevel (parser->m_tagLevel)
#define buffer (parser->m_buffer)
#define bufferPtr (parser->m_bufferPtr)
@@ -660,1326 +660,1326 @@ struct XML_ParserStruct {
XML_Parser XMLCALL
XML_ParserCreate(const XML_Char *encodingName)
{
- return XML_ParserCreate_MM(encodingName, NULL, NULL);
+ return XML_ParserCreate_MM(encodingName, NULL, NULL);
}
XML_Parser XMLCALL
XML_ParserCreateNS(const XML_Char *encodingName, XML_Char nsSep)
{
- XML_Char tmp[2];
- *tmp = nsSep;
- return XML_ParserCreate_MM(encodingName, NULL, tmp);
+ XML_Char tmp[2];
+ *tmp = nsSep;
+ return XML_ParserCreate_MM(encodingName, NULL, tmp);
}
static const XML_Char implicitContext[] = {
- ASCII_x, ASCII_m, ASCII_l, ASCII_EQUALS, ASCII_h, ASCII_t, ASCII_t, ASCII_p,
- ASCII_COLON, ASCII_SLASH, ASCII_SLASH, ASCII_w, ASCII_w, ASCII_w,
- ASCII_PERIOD, ASCII_w, ASCII_3, ASCII_PERIOD, ASCII_o, ASCII_r, ASCII_g,
- ASCII_SLASH, ASCII_X, ASCII_M, ASCII_L, ASCII_SLASH, ASCII_1, ASCII_9,
- ASCII_9, ASCII_8, ASCII_SLASH, ASCII_n, ASCII_a, ASCII_m, ASCII_e,
- ASCII_s, ASCII_p, ASCII_a, ASCII_c, ASCII_e, '\0'
+ ASCII_x, ASCII_m, ASCII_l, ASCII_EQUALS, ASCII_h, ASCII_t, ASCII_t, ASCII_p,
+ ASCII_COLON, ASCII_SLASH, ASCII_SLASH, ASCII_w, ASCII_w, ASCII_w,
+ ASCII_PERIOD, ASCII_w, ASCII_3, ASCII_PERIOD, ASCII_o, ASCII_r, ASCII_g,
+ ASCII_SLASH, ASCII_X, ASCII_M, ASCII_L, ASCII_SLASH, ASCII_1, ASCII_9,
+ ASCII_9, ASCII_8, ASCII_SLASH, ASCII_n, ASCII_a, ASCII_m, ASCII_e,
+ ASCII_s, ASCII_p, ASCII_a, ASCII_c, ASCII_e, '\0'
};
static unsigned long
generate_hash_secret_salt(void)
{
- unsigned int seed = time(NULL) % UINT_MAX;
- srand(seed);
- return rand();
+ unsigned int seed = time(NULL) % UINT_MAX;
+ srand(seed);
+ return rand();
}
static XML_Bool /* only valid for root parser */
startParsing(XML_Parser parser)
{
- /* hash functions must be initialized before setContext() is called */
- if (hash_secret_salt == 0)
- hash_secret_salt = generate_hash_secret_salt();
- if (ns) {
- /* implicit context only set for root parser, since child
- parsers (i.e. external entity parsers) will inherit it
- */
- return setContext(parser, implicitContext);
- }
- return XML_TRUE;
- }
+ /* hash functions must be initialized before setContext() is called */
+ if (hash_secret_salt == 0)
+ hash_secret_salt = generate_hash_secret_salt();
+ if (ns) {
+ /* implicit context only set for root parser, since child
+ parsers (i.e. external entity parsers) will inherit it
+ */
+ return setContext(parser, implicitContext);
+ }
+ return XML_TRUE;
+ }
XML_Parser XMLCALL
XML_ParserCreate_MM(const XML_Char *encodingName,
- const XML_Memory_Handling_Suite *memsuite,
- const XML_Char *nameSep)
+ const XML_Memory_Handling_Suite *memsuite,
+ const XML_Char *nameSep)
{
- return parserCreate(encodingName, memsuite, nameSep, NULL);
+ return parserCreate(encodingName, memsuite, nameSep, NULL);
}
static XML_Parser
parserCreate(const XML_Char *encodingName,
- const XML_Memory_Handling_Suite *memsuite,
- const XML_Char *nameSep,
- DTD *dtd)
-{
- XML_Parser parser;
-
- if (memsuite) {
- XML_Memory_Handling_Suite *mtemp;
- parser = (XML_Parser)
- memsuite->malloc_fcn(sizeof(struct XML_ParserStruct));
- if (parser != NULL) {
- mtemp = (XML_Memory_Handling_Suite *)&(parser->m_mem);
- mtemp->malloc_fcn = memsuite->malloc_fcn;
- mtemp->realloc_fcn = memsuite->realloc_fcn;
- mtemp->free_fcn = memsuite->free_fcn;
- }
- }
- else {
- XML_Memory_Handling_Suite *mtemp;
- parser = (XML_Parser)malloc(sizeof(struct XML_ParserStruct));
- if (parser != NULL) {
- mtemp = (XML_Memory_Handling_Suite *)&(parser->m_mem);
- mtemp->malloc_fcn = malloc;
- mtemp->realloc_fcn = realloc;
- mtemp->free_fcn = free;
- }
- }
-
- if (!parser)
- return parser;
-
- buffer = NULL;
- bufferLim = NULL;
-
- attsSize = INIT_ATTS_SIZE;
- atts = (ATTRIBUTE *)MALLOC(attsSize * sizeof(ATTRIBUTE));
- if (atts == NULL) {
- FREE(parser);
- return NULL;
- }
+ const XML_Memory_Handling_Suite *memsuite,
+ const XML_Char *nameSep,
+ DTD *dtd)
+{
+ XML_Parser parser;
+
+ if (memsuite) {
+ XML_Memory_Handling_Suite *mtemp;
+ parser = (XML_Parser)
+ memsuite->malloc_fcn(sizeof(struct XML_ParserStruct));
+ if (parser != NULL) {
+ mtemp = (XML_Memory_Handling_Suite *)&(parser->m_mem);
+ mtemp->malloc_fcn = memsuite->malloc_fcn;
+ mtemp->realloc_fcn = memsuite->realloc_fcn;
+ mtemp->free_fcn = memsuite->free_fcn;
+ }
+ }
+ else {
+ XML_Memory_Handling_Suite *mtemp;
+ parser = (XML_Parser)malloc(sizeof(struct XML_ParserStruct));
+ if (parser != NULL) {
+ mtemp = (XML_Memory_Handling_Suite *)&(parser->m_mem);
+ mtemp->malloc_fcn = malloc;
+ mtemp->realloc_fcn = realloc;
+ mtemp->free_fcn = free;
+ }
+ }
+
+ if (!parser)
+ return parser;
+
+ buffer = NULL;
+ bufferLim = NULL;
+
+ attsSize = INIT_ATTS_SIZE;
+ atts = (ATTRIBUTE *)MALLOC(attsSize * sizeof(ATTRIBUTE));
+ if (atts == NULL) {
+ FREE(parser);
+ return NULL;
+ }
#ifdef XML_ATTR_INFO
- attInfo = (XML_AttrInfo*)MALLOC(attsSize * sizeof(XML_AttrInfo));
- if (attInfo == NULL) {
- FREE(atts);
- FREE(parser);
- return NULL;
- }
+ attInfo = (XML_AttrInfo*)MALLOC(attsSize * sizeof(XML_AttrInfo));
+ if (attInfo == NULL) {
+ FREE(atts);
+ FREE(parser);
+ return NULL;
+ }
#endif
- dataBuf = (XML_Char *)MALLOC(INIT_DATA_BUF_SIZE * sizeof(XML_Char));
- if (dataBuf == NULL) {
- FREE(atts);
+ dataBuf = (XML_Char *)MALLOC(INIT_DATA_BUF_SIZE * sizeof(XML_Char));
+ if (dataBuf == NULL) {
+ FREE(atts);
#ifdef XML_ATTR_INFO
- FREE(attInfo);
+ FREE(attInfo);
#endif
- FREE(parser);
- return NULL;
- }
- dataBufEnd = dataBuf + INIT_DATA_BUF_SIZE;
-
- if (dtd)
- _dtd = dtd;
- else {
- _dtd = dtdCreate(&parser->m_mem);
- if (_dtd == NULL) {
- FREE(dataBuf);
- FREE(atts);
+ FREE(parser);
+ return NULL;
+ }
+ dataBufEnd = dataBuf + INIT_DATA_BUF_SIZE;
+
+ if (dtd)
+ _dtd = dtd;
+ else {
+ _dtd = dtdCreate(&parser->m_mem);
+ if (_dtd == NULL) {
+ FREE(dataBuf);
+ FREE(atts);
#ifdef XML_ATTR_INFO
- FREE(attInfo);
+ FREE(attInfo);
#endif
- FREE(parser);
- return NULL;
- }
- }
+ FREE(parser);
+ return NULL;
+ }
+ }
- freeBindingList = NULL;
- freeTagList = NULL;
- freeInternalEntities = NULL;
+ freeBindingList = NULL;
+ freeTagList = NULL;
+ freeInternalEntities = NULL;
- groupSize = 0;
- groupConnector = NULL;
+ groupSize = 0;
+ groupConnector = NULL;
- unknownEncodingHandler = NULL;
- unknownEncodingHandlerData = NULL;
+ unknownEncodingHandler = NULL;
+ unknownEncodingHandlerData = NULL;
- namespaceSeparator = ASCII_EXCL;
- ns = XML_FALSE;
- ns_triplets = XML_FALSE;
+ namespaceSeparator = ASCII_EXCL;
+ ns = XML_FALSE;
+ ns_triplets = XML_FALSE;
- nsAtts = NULL;
- nsAttsVersion = 0;
- nsAttsPower = 0;
+ nsAtts = NULL;
+ nsAttsVersion = 0;
+ nsAttsPower = 0;
- poolInit(&tempPool, &(parser->m_mem));
- poolInit(&temp2Pool, &(parser->m_mem));
- parserInit(parser, encodingName);
+ poolInit(&tempPool, &(parser->m_mem));
+ poolInit(&temp2Pool, &(parser->m_mem));
+ parserInit(parser, encodingName);
- if (encodingName && !protocolEncodingName) {
- XML_ParserFree(parser);
- return NULL;
- }
+ if (encodingName && !protocolEncodingName) {
+ XML_ParserFree(parser);
+ return NULL;
+ }
- if (nameSep) {
- ns = XML_TRUE;
- internalEncoding = XmlGetInternalEncodingNS();
- namespaceSeparator = *nameSep;
- }
- else {
- internalEncoding = XmlGetInternalEncoding();
- }
+ if (nameSep) {
+ ns = XML_TRUE;
+ internalEncoding = XmlGetInternalEncodingNS();
+ namespaceSeparator = *nameSep;
+ }
+ else {
+ internalEncoding = XmlGetInternalEncoding();
+ }
- return parser;
+ return parser;
}
static void
parserInit(XML_Parser parser, const XML_Char *encodingName)
{
- processor = prologInitProcessor;
- XmlPrologStateInit(&prologState);
- protocolEncodingName = (encodingName != NULL
- ? poolCopyString(&tempPool, encodingName)
- : NULL);
- curBase = NULL;
- XmlInitEncoding(&initEncoding, &encoding, 0);
- userData = NULL;
- handlerArg = NULL;
- startElementHandler = NULL;
- endElementHandler = NULL;
- characterDataHandler = NULL;
- processingInstructionHandler = NULL;
- commentHandler = NULL;
- startCdataSectionHandler = NULL;
- endCdataSectionHandler = NULL;
- defaultHandler = NULL;
- startDoctypeDeclHandler = NULL;
- endDoctypeDeclHandler = NULL;
- unparsedEntityDeclHandler = NULL;
- notationDeclHandler = NULL;
- startNamespaceDeclHandler = NULL;
- endNamespaceDeclHandler = NULL;
- notStandaloneHandler = NULL;
- externalEntityRefHandler = NULL;
- externalEntityRefHandlerArg = parser;
- skippedEntityHandler = NULL;
- elementDeclHandler = NULL;
- attlistDeclHandler = NULL;
- entityDeclHandler = NULL;
- xmlDeclHandler = NULL;
- bufferPtr = buffer;
- bufferEnd = buffer;
- parseEndByteIndex = 0;
- parseEndPtr = NULL;
- declElementType = NULL;
- declAttributeId = NULL;
- declEntity = NULL;
- doctypeName = NULL;
- doctypeSysid = NULL;
- doctypePubid = NULL;
- declAttributeType = NULL;
- declNotationName = NULL;
- declNotationPublicId = NULL;
- declAttributeIsCdata = XML_FALSE;
- declAttributeIsId = XML_FALSE;
- memset(&position, 0, sizeof(POSITION));
- errorCode = XML_ERROR_NONE;
- eventPtr = NULL;
- eventEndPtr = NULL;
- positionPtr = NULL;
- openInternalEntities = NULL;
- defaultExpandInternalEntities = XML_TRUE;
- tagLevel = 0;
- tagStack = NULL;
- inheritedBindings = NULL;
- nSpecifiedAtts = 0;
- unknownEncodingMem = NULL;
- unknownEncodingRelease = NULL;
- unknownEncodingData = NULL;
- parentParser = NULL;
- ps_parsing = XML_INITIALIZED;
+ processor = prologInitProcessor;
+ XmlPrologStateInit(&prologState);
+ protocolEncodingName = (encodingName != NULL
+ ? poolCopyString(&tempPool, encodingName)
+ : NULL);
+ curBase = NULL;
+ XmlInitEncoding(&initEncoding, &encoding, 0);
+ userData = NULL;
+ handlerArg = NULL;
+ startElementHandler = NULL;
+ endElementHandler = NULL;
+ characterDataHandler = NULL;
+ processingInstructionHandler = NULL;
+ commentHandler = NULL;
+ startCdataSectionHandler = NULL;
+ endCdataSectionHandler = NULL;
+ defaultHandler = NULL;
+ startDoctypeDeclHandler = NULL;
+ endDoctypeDeclHandler = NULL;
+ unparsedEntityDeclHandler = NULL;
+ notationDeclHandler = NULL;
+ startNamespaceDeclHandler = NULL;
+ endNamespaceDeclHandler = NULL;
+ notStandaloneHandler = NULL;
+ externalEntityRefHandler = NULL;
+ externalEntityRefHandlerArg = parser;
+ skippedEntityHandler = NULL;
+ elementDeclHandler = NULL;
+ attlistDeclHandler = NULL;
+ entityDeclHandler = NULL;
+ xmlDeclHandler = NULL;
+ bufferPtr = buffer;
+ bufferEnd = buffer;
+ parseEndByteIndex = 0;
+ parseEndPtr = NULL;
+ declElementType = NULL;
+ declAttributeId = NULL;
+ declEntity = NULL;
+ doctypeName = NULL;
+ doctypeSysid = NULL;
+ doctypePubid = NULL;
+ declAttributeType = NULL;
+ declNotationName = NULL;
+ declNotationPublicId = NULL;
+ declAttributeIsCdata = XML_FALSE;
+ declAttributeIsId = XML_FALSE;
+ memset(&position, 0, sizeof(POSITION));
+ errorCode = XML_ERROR_NONE;
+ eventPtr = NULL;
+ eventEndPtr = NULL;
+ positionPtr = NULL;
+ openInternalEntities = NULL;
+ defaultExpandInternalEntities = XML_TRUE;
+ tagLevel = 0;
+ tagStack = NULL;
+ inheritedBindings = NULL;
+ nSpecifiedAtts = 0;
+ unknownEncodingMem = NULL;
+ unknownEncodingRelease = NULL;
+ unknownEncodingData = NULL;
+ parentParser = NULL;
+ ps_parsing = XML_INITIALIZED;
#ifdef XML_DTD
- isParamEntity = XML_FALSE;
- useForeignDTD = XML_FALSE;
- paramEntityParsing = XML_PARAM_ENTITY_PARSING_NEVER;
+ isParamEntity = XML_FALSE;
+ useForeignDTD = XML_FALSE;
+ paramEntityParsing = XML_PARAM_ENTITY_PARSING_NEVER;
#endif
- hash_secret_salt = 0;
+ hash_secret_salt = 0;
}
/* moves list of bindings to freeBindingList */
static void FASTCALL
moveToFreeBindingList(XML_Parser parser, BINDING *bindings)
{
- while (bindings) {
- BINDING *b = bindings;
- bindings = bindings->nextTagBinding;
- b->nextTagBinding = freeBindingList;
- freeBindingList = b;
- }
+ while (bindings) {
+ BINDING *b = bindings;
+ bindings = bindings->nextTagBinding;
+ b->nextTagBinding = freeBindingList;
+ freeBindingList = b;
+ }
}
XML_Bool XMLCALL
XML_ParserReset(XML_Parser parser, const XML_Char *encodingName)
{
- TAG *tStk;
- OPEN_INTERNAL_ENTITY *openEntityList;
- if (parentParser)
- return XML_FALSE;
- /* move tagStack to freeTagList */
- tStk = tagStack;
- while (tStk) {
- TAG *tag = tStk;
- tStk = tStk->parent;
- tag->parent = freeTagList;
- moveToFreeBindingList(parser, tag->bindings);
- tag->bindings = NULL;
- freeTagList = tag;
- }
- /* move openInternalEntities to freeInternalEntities */
- openEntityList = openInternalEntities;
- while (openEntityList) {
- OPEN_INTERNAL_ENTITY *openEntity = openEntityList;
- openEntityList = openEntity->next;
- openEntity->next = freeInternalEntities;
- freeInternalEntities = openEntity;
- }
- moveToFreeBindingList(parser, inheritedBindings);
- FREE(unknownEncodingMem);
- if (unknownEncodingRelease)
- unknownEncodingRelease(unknownEncodingData);
- poolClear(&tempPool);
- poolClear(&temp2Pool);
- parserInit(parser, encodingName);
- dtdReset(_dtd, &parser->m_mem);
- return XML_TRUE;
+ TAG *tStk;
+ OPEN_INTERNAL_ENTITY *openEntityList;
+ if (parentParser)
+ return XML_FALSE;
+ /* move tagStack to freeTagList */
+ tStk = tagStack;
+ while (tStk) {
+ TAG *tag = tStk;
+ tStk = tStk->parent;
+ tag->parent = freeTagList;
+ moveToFreeBindingList(parser, tag->bindings);
+ tag->bindings = NULL;
+ freeTagList = tag;
+ }
+ /* move openInternalEntities to freeInternalEntities */
+ openEntityList = openInternalEntities;
+ while (openEntityList) {
+ OPEN_INTERNAL_ENTITY *openEntity = openEntityList;
+ openEntityList = openEntity->next;
+ openEntity->next = freeInternalEntities;
+ freeInternalEntities = openEntity;
+ }
+ moveToFreeBindingList(parser, inheritedBindings);
+ FREE(unknownEncodingMem);
+ if (unknownEncodingRelease)
+ unknownEncodingRelease(unknownEncodingData);
+ poolClear(&tempPool);
+ poolClear(&temp2Pool);
+ parserInit(parser, encodingName);
+ dtdReset(_dtd, &parser->m_mem);
+ return XML_TRUE;
}
enum XML_Status XMLCALL
XML_SetEncoding(XML_Parser parser, const XML_Char *encodingName)
{
- /* Block after XML_Parse()/XML_ParseBuffer() has been called.
- XXX There's no way for the caller to determine which of the
- XXX possible error cases caused the XML_STATUS_ERROR return.
- */
- if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
- return XML_STATUS_ERROR;
- if (encodingName == NULL)
- protocolEncodingName = NULL;
- else {
- protocolEncodingName = poolCopyString(&tempPool, encodingName);
- if (!protocolEncodingName)
- return XML_STATUS_ERROR;
- }
- return XML_STATUS_OK;
+ /* Block after XML_Parse()/XML_ParseBuffer() has been called.
+ XXX There's no way for the caller to determine which of the
+ XXX possible error cases caused the XML_STATUS_ERROR return.
+ */
+ if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
+ return XML_STATUS_ERROR;
+ if (encodingName == NULL)
+ protocolEncodingName = NULL;
+ else {
+ protocolEncodingName = poolCopyString(&tempPool, encodingName);
+ if (!protocolEncodingName)
+ return XML_STATUS_ERROR;
+ }
+ return XML_STATUS_OK;
}
XML_Parser XMLCALL
XML_ExternalEntityParserCreate(XML_Parser oldParser,
- const XML_Char *context,
- const XML_Char *encodingName)
-{
- XML_Parser parser = oldParser;
- DTD *newDtd = NULL;
- DTD *oldDtd = _dtd;
- XML_StartElementHandler oldStartElementHandler = startElementHandler;
- XML_EndElementHandler oldEndElementHandler = endElementHandler;
- XML_CharacterDataHandler oldCharacterDataHandler = characterDataHandler;
- XML_ProcessingInstructionHandler oldProcessingInstructionHandler
- = processingInstructionHandler;
- XML_CommentHandler oldCommentHandler = commentHandler;
- XML_StartCdataSectionHandler oldStartCdataSectionHandler
- = startCdataSectionHandler;
- XML_EndCdataSectionHandler oldEndCdataSectionHandler
- = endCdataSectionHandler;
- XML_DefaultHandler oldDefaultHandler = defaultHandler;
- XML_UnparsedEntityDeclHandler oldUnparsedEntityDeclHandler
- = unparsedEntityDeclHandler;
- XML_NotationDeclHandler oldNotationDeclHandler = notationDeclHandler;
- XML_StartNamespaceDeclHandler oldStartNamespaceDeclHandler
- = startNamespaceDeclHandler;
- XML_EndNamespaceDeclHandler oldEndNamespaceDeclHandler
- = endNamespaceDeclHandler;
- XML_NotStandaloneHandler oldNotStandaloneHandler = notStandaloneHandler;
- XML_ExternalEntityRefHandler oldExternalEntityRefHandler
- = externalEntityRefHandler;
- XML_SkippedEntityHandler oldSkippedEntityHandler = skippedEntityHandler;
- XML_UnknownEncodingHandler oldUnknownEncodingHandler
- = unknownEncodingHandler;
- XML_ElementDeclHandler oldElementDeclHandler = elementDeclHandler;
- XML_AttlistDeclHandler oldAttlistDeclHandler = attlistDeclHandler;
- XML_EntityDeclHandler oldEntityDeclHandler = entityDeclHandler;
- XML_XmlDeclHandler oldXmlDeclHandler = xmlDeclHandler;
- ELEMENT_TYPE * oldDeclElementType = declElementType;
-
- void *oldUserData = userData;
- void *oldHandlerArg = handlerArg;
- XML_Bool oldDefaultExpandInternalEntities = defaultExpandInternalEntities;
- XML_Parser oldExternalEntityRefHandlerArg = externalEntityRefHandlerArg;
+ const XML_Char *context,
+ const XML_Char *encodingName)
+{
+ XML_Parser parser = oldParser;
+ DTD *newDtd = NULL;
+ DTD *oldDtd = _dtd;
+ XML_StartElementHandler oldStartElementHandler = startElementHandler;
+ XML_EndElementHandler oldEndElementHandler = endElementHandler;
+ XML_CharacterDataHandler oldCharacterDataHandler = characterDataHandler;
+ XML_ProcessingInstructionHandler oldProcessingInstructionHandler
+ = processingInstructionHandler;
+ XML_CommentHandler oldCommentHandler = commentHandler;
+ XML_StartCdataSectionHandler oldStartCdataSectionHandler
+ = startCdataSectionHandler;
+ XML_EndCdataSectionHandler oldEndCdataSectionHandler
+ = endCdataSectionHandler;
+ XML_DefaultHandler oldDefaultHandler = defaultHandler;
+ XML_UnparsedEntityDeclHandler oldUnparsedEntityDeclHandler
+ = unparsedEntityDeclHandler;
+ XML_NotationDeclHandler oldNotationDeclHandler = notationDeclHandler;
+ XML_StartNamespaceDeclHandler oldStartNamespaceDeclHandler
+ = startNamespaceDeclHandler;
+ XML_EndNamespaceDeclHandler oldEndNamespaceDeclHandler
+ = endNamespaceDeclHandler;
+ XML_NotStandaloneHandler oldNotStandaloneHandler = notStandaloneHandler;
+ XML_ExternalEntityRefHandler oldExternalEntityRefHandler
+ = externalEntityRefHandler;
+ XML_SkippedEntityHandler oldSkippedEntityHandler = skippedEntityHandler;
+ XML_UnknownEncodingHandler oldUnknownEncodingHandler
+ = unknownEncodingHandler;
+ XML_ElementDeclHandler oldElementDeclHandler = elementDeclHandler;
+ XML_AttlistDeclHandler oldAttlistDeclHandler = attlistDeclHandler;
+ XML_EntityDeclHandler oldEntityDeclHandler = entityDeclHandler;
+ XML_XmlDeclHandler oldXmlDeclHandler = xmlDeclHandler;
+ ELEMENT_TYPE * oldDeclElementType = declElementType;
+
+ void *oldUserData = userData;
+ void *oldHandlerArg = handlerArg;
+ XML_Bool oldDefaultExpandInternalEntities = defaultExpandInternalEntities;
+ XML_Parser oldExternalEntityRefHandlerArg = externalEntityRefHandlerArg;
#ifdef XML_DTD
- enum XML_ParamEntityParsing oldParamEntityParsing = paramEntityParsing;
- int oldInEntityValue = prologState.inEntityValue;
+ enum XML_ParamEntityParsing oldParamEntityParsing = paramEntityParsing;
+ int oldInEntityValue = prologState.inEntityValue;
#endif
- XML_Bool oldns_triplets = ns_triplets;
- /* Note that the new parser shares the same hash secret as the old
- parser, so that dtdCopy and copyEntityTable can lookup values
- from hash tables associated with either parser without us having
- to worry which hash secrets each table has.
- */
- unsigned long oldhash_secret_salt = hash_secret_salt;
+ XML_Bool oldns_triplets = ns_triplets;
+ /* Note that the new parser shares the same hash secret as the old
+ parser, so that dtdCopy and copyEntityTable can lookup values
+ from hash tables associated with either parser without us having
+ to worry which hash secrets each table has.
+ */
+ unsigned long oldhash_secret_salt = hash_secret_salt;
#ifdef XML_DTD
- if (!context)
- newDtd = oldDtd;
+ if (!context)
+ newDtd = oldDtd;
#endif /* XML_DTD */
- /* Note that the magical uses of the pre-processor to make field
- access look more like C++ require that `parser' be overwritten
- here. This makes this function more painful to follow than it
- would be otherwise.
- */
- if (ns) {
- XML_Char tmp[2];
- *tmp = namespaceSeparator;
- parser = parserCreate(encodingName, &parser->m_mem, tmp, newDtd);
- }
- else {
- parser = parserCreate(encodingName, &parser->m_mem, NULL, newDtd);
- }
-
- if (!parser)
- return NULL;
-
- startElementHandler = oldStartElementHandler;
- endElementHandler = oldEndElementHandler;
- characterDataHandler = oldCharacterDataHandler;
- processingInstructionHandler = oldProcessingInstructionHandler;
- commentHandler = oldCommentHandler;
- startCdataSectionHandler = oldStartCdataSectionHandler;
- endCdataSectionHandler = oldEndCdataSectionHandler;
- defaultHandler = oldDefaultHandler;
- unparsedEntityDeclHandler = oldUnparsedEntityDeclHandler;
- notationDeclHandler = oldNotationDeclHandler;
- startNamespaceDeclHandler = oldStartNamespaceDeclHandler;
- endNamespaceDeclHandler = oldEndNamespaceDeclHandler;
- notStandaloneHandler = oldNotStandaloneHandler;
- externalEntityRefHandler = oldExternalEntityRefHandler;
- skippedEntityHandler = oldSkippedEntityHandler;
- unknownEncodingHandler = oldUnknownEncodingHandler;
- elementDeclHandler = oldElementDeclHandler;
- attlistDeclHandler = oldAttlistDeclHandler;
- entityDeclHandler = oldEntityDeclHandler;
- xmlDeclHandler = oldXmlDeclHandler;
- declElementType = oldDeclElementType;
- userData = oldUserData;
- if (oldUserData == oldHandlerArg)
- handlerArg = userData;
- else
- handlerArg = parser;
- if (oldExternalEntityRefHandlerArg != oldParser)
- externalEntityRefHandlerArg = oldExternalEntityRefHandlerArg;
- defaultExpandInternalEntities = oldDefaultExpandInternalEntities;
- ns_triplets = oldns_triplets;
- hash_secret_salt = oldhash_secret_salt;
- parentParser = oldParser;
+ /* Note that the magical uses of the pre-processor to make field
+ access look more like C++ require that `parser' be overwritten
+ here. This makes this function more painful to follow than it
+ would be otherwise.
+ */
+ if (ns) {
+ XML_Char tmp[2];
+ *tmp = namespaceSeparator;
+ parser = parserCreate(encodingName, &parser->m_mem, tmp, newDtd);
+ }
+ else {
+ parser = parserCreate(encodingName, &parser->m_mem, NULL, newDtd);
+ }
+
+ if (!parser)
+ return NULL;
+
+ startElementHandler = oldStartElementHandler;
+ endElementHandler = oldEndElementHandler;
+ characterDataHandler = oldCharacterDataHandler;
+ processingInstructionHandler = oldProcessingInstructionHandler;
+ commentHandler = oldCommentHandler;
+ startCdataSectionHandler = oldStartCdataSectionHandler;
+ endCdataSectionHandler = oldEndCdataSectionHandler;
+ defaultHandler = oldDefaultHandler;
+ unparsedEntityDeclHandler = oldUnparsedEntityDeclHandler;
+ notationDeclHandler = oldNotationDeclHandler;
+ startNamespaceDeclHandler = oldStartNamespaceDeclHandler;
+ endNamespaceDeclHandler = oldEndNamespaceDeclHandler;
+ notStandaloneHandler = oldNotStandaloneHandler;
+ externalEntityRefHandler = oldExternalEntityRefHandler;
+ skippedEntityHandler = oldSkippedEntityHandler;
+ unknownEncodingHandler = oldUnknownEncodingHandler;
+ elementDeclHandler = oldElementDeclHandler;
+ attlistDeclHandler = oldAttlistDeclHandler;
+ entityDeclHandler = oldEntityDeclHandler;
+ xmlDeclHandler = oldXmlDeclHandler;
+ declElementType = oldDeclElementType;
+ userData = oldUserData;
+ if (oldUserData == oldHandlerArg)
+ handlerArg = userData;
+ else
+ handlerArg = parser;
+ if (oldExternalEntityRefHandlerArg != oldParser)
+ externalEntityRefHandlerArg = oldExternalEntityRefHandlerArg;
+ defaultExpandInternalEntities = oldDefaultExpandInternalEntities;
+ ns_triplets = oldns_triplets;
+ hash_secret_salt = oldhash_secret_salt;
+ parentParser = oldParser;
#ifdef XML_DTD
- paramEntityParsing = oldParamEntityParsing;
- prologState.inEntityValue = oldInEntityValue;
- if (context) {
+ paramEntityParsing = oldParamEntityParsing;
+ prologState.inEntityValue = oldInEntityValue;
+ if (context) {
#endif /* XML_DTD */
- if (!dtdCopy(oldParser, _dtd, oldDtd, &parser->m_mem)
- || !setContext(parser, context)) {
- XML_ParserFree(parser);
- return NULL;
- }
- processor = externalEntityInitProcessor;
+ if (!dtdCopy(oldParser, _dtd, oldDtd, &parser->m_mem)
+ || !setContext(parser, context)) {
+ XML_ParserFree(parser);
+ return NULL;
+ }
+ processor = externalEntityInitProcessor;
#ifdef XML_DTD
- }
- else {
- /* The DTD instance referenced by _dtd is shared between the document's
- root parser and external PE parsers, therefore one does not need to
- call setContext. In addition, one also *must* not call setContext,
- because this would overwrite existing prefix->binding pointers in
- _dtd with ones that get destroyed with the external PE parser.
- This would leave those prefixes with dangling pointers.
- */
- isParamEntity = XML_TRUE;
- XmlPrologStateInitExternalEntity(&prologState);
- processor = externalParEntInitProcessor;
- }
+ }
+ else {
+ /* The DTD instance referenced by _dtd is shared between the document's
+ root parser and external PE parsers, therefore one does not need to
+ call setContext. In addition, one also *must* not call setContext,
+ because this would overwrite existing prefix->binding pointers in
+ _dtd with ones that get destroyed with the external PE parser.
+ This would leave those prefixes with dangling pointers.
+ */
+ isParamEntity = XML_TRUE;
+ XmlPrologStateInitExternalEntity(&prologState);
+ processor = externalParEntInitProcessor;
+ }
#endif /* XML_DTD */
- return parser;
+ return parser;
}
static void FASTCALL
destroyBindings(BINDING *bindings, XML_Parser parser)
{
- for (;;) {
- BINDING *b = bindings;
- if (!b)
- break;
- bindings = b->nextTagBinding;
- FREE(b->uri);
- FREE(b);
- }
+ for (;;) {
+ BINDING *b = bindings;
+ if (!b)
+ break;
+ bindings = b->nextTagBinding;
+ FREE(b->uri);
+ FREE(b);
+ }
}
void XMLCALL
XML_ParserFree(XML_Parser parser)
{
- TAG *tagList;
- OPEN_INTERNAL_ENTITY *entityList;
- if (parser == NULL)
- return;
- /* free tagStack and freeTagList */
- tagList = tagStack;
- for (;;) {
- TAG *p;
- if (tagList == NULL) {
- if (freeTagList == NULL)
- break;
- tagList = freeTagList;
- freeTagList = NULL;
- }
- p = tagList;
- tagList = tagList->parent;
- FREE(p->buf);
- destroyBindings(p->bindings, parser);
- FREE(p);
- }
- /* free openInternalEntities and freeInternalEntities */
- entityList = openInternalEntities;
- for (;;) {
- OPEN_INTERNAL_ENTITY *openEntity;
- if (entityList == NULL) {
- if (freeInternalEntities == NULL)
- break;
- entityList = freeInternalEntities;
- freeInternalEntities = NULL;
- }
- openEntity = entityList;
- entityList = entityList->next;
- FREE(openEntity);
- }
-
- destroyBindings(freeBindingList, parser);
- destroyBindings(inheritedBindings, parser);
- poolDestroy(&tempPool);
- poolDestroy(&temp2Pool);
+ TAG *tagList;
+ OPEN_INTERNAL_ENTITY *entityList;
+ if (parser == NULL)
+ return;
+ /* free tagStack and freeTagList */
+ tagList = tagStack;
+ for (;;) {
+ TAG *p;
+ if (tagList == NULL) {
+ if (freeTagList == NULL)
+ break;
+ tagList = freeTagList;
+ freeTagList = NULL;
+ }
+ p = tagList;
+ tagList = tagList->parent;
+ FREE(p->buf);
+ destroyBindings(p->bindings, parser);
+ FREE(p);
+ }
+ /* free openInternalEntities and freeInternalEntities */
+ entityList = openInternalEntities;
+ for (;;) {
+ OPEN_INTERNAL_ENTITY *openEntity;
+ if (entityList == NULL) {
+ if (freeInternalEntities == NULL)
+ break;
+ entityList = freeInternalEntities;
+ freeInternalEntities = NULL;
+ }
+ openEntity = entityList;
+ entityList = entityList->next;
+ FREE(openEntity);
+ }
+
+ destroyBindings(freeBindingList, parser);
+ destroyBindings(inheritedBindings, parser);
+ poolDestroy(&tempPool);
+ poolDestroy(&temp2Pool);
#ifdef XML_DTD
- /* external parameter entity parsers share the DTD structure
- parser->m_dtd with the root parser, so we must not destroy it
- */
- if (!isParamEntity && _dtd)
+ /* external parameter entity parsers share the DTD structure
+ parser->m_dtd with the root parser, so we must not destroy it
+ */
+ if (!isParamEntity && _dtd)
#else
- if (_dtd)
+ if (_dtd)
#endif /* XML_DTD */
- dtdDestroy(_dtd, (XML_Bool)!parentParser, &parser->m_mem);
- FREE((void *)atts);
+ dtdDestroy(_dtd, (XML_Bool)!parentParser, &parser->m_mem);
+ FREE((void *)atts);
#ifdef XML_ATTR_INFO
- FREE((void *)attInfo);
+ FREE((void *)attInfo);
#endif
- FREE(groupConnector);
- FREE(buffer);
- FREE(dataBuf);
- FREE(nsAtts);
- FREE(unknownEncodingMem);
- if (unknownEncodingRelease)
- unknownEncodingRelease(unknownEncodingData);
- FREE(parser);
+ FREE(groupConnector);
+ FREE(buffer);
+ FREE(dataBuf);
+ FREE(nsAtts);
+ FREE(unknownEncodingMem);
+ if (unknownEncodingRelease)
+ unknownEncodingRelease(unknownEncodingData);
+ FREE(parser);
}
void XMLCALL
XML_UseParserAsHandlerArg(XML_Parser parser)
{
- handlerArg = parser;
+ handlerArg = parser;
}
enum XML_Error XMLCALL
XML_UseForeignDTD(XML_Parser parser, XML_Bool useDTD)
{
#ifdef XML_DTD
- /* block after XML_Parse()/XML_ParseBuffer() has been called */
- if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
- return XML_ERROR_CANT_CHANGE_FEATURE_ONCE_PARSING;
- useForeignDTD = useDTD;
- return XML_ERROR_NONE;
+ /* block after XML_Parse()/XML_ParseBuffer() has been called */
+ if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
+ return XML_ERROR_CANT_CHANGE_FEATURE_ONCE_PARSING;
+ useForeignDTD = useDTD;
+ return XML_ERROR_NONE;
#else
- return XML_ERROR_FEATURE_REQUIRES_XML_DTD;
+ return XML_ERROR_FEATURE_REQUIRES_XML_DTD;
#endif
}
void XMLCALL
XML_SetReturnNSTriplet(XML_Parser parser, int do_nst)
{
- /* block after XML_Parse()/XML_ParseBuffer() has been called */
- if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
- return;
- ns_triplets = do_nst ? XML_TRUE : XML_FALSE;
+ /* block after XML_Parse()/XML_ParseBuffer() has been called */
+ if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
+ return;
+ ns_triplets = do_nst ? XML_TRUE : XML_FALSE;
}
void XMLCALL
XML_SetUserData(XML_Parser parser, void *p)
{
- if (handlerArg == userData)
- handlerArg = userData = p;
- else
- userData = p;
+ if (handlerArg == userData)
+ handlerArg = userData = p;
+ else
+ userData = p;
}
enum XML_Status XMLCALL
XML_SetBase(XML_Parser parser, const XML_Char *p)
{
- if (p) {
- p = poolCopyString(&_dtd->pool, p);
- if (!p)
- return XML_STATUS_ERROR;
- curBase = p;
- }
- else
- curBase = NULL;
- return XML_STATUS_OK;
+ if (p) {
+ p = poolCopyString(&_dtd->pool, p);
+ if (!p)
+ return XML_STATUS_ERROR;
+ curBase = p;
+ }
+ else
+ curBase = NULL;
+ return XML_STATUS_OK;
}
const XML_Char * XMLCALL
XML_GetBase(XML_Parser parser)
{
- return curBase;
+ return curBase;
}
int XMLCALL
XML_GetSpecifiedAttributeCount(XML_Parser parser)
{
- return nSpecifiedAtts;
+ return nSpecifiedAtts;
}
int XMLCALL
XML_GetIdAttributeIndex(XML_Parser parser)
{
- return idAttIndex;
+ return idAttIndex;
}
#ifdef XML_ATTR_INFO
const XML_AttrInfo * XMLCALL
XML_GetAttributeInfo(XML_Parser parser)
{
- return attInfo;
+ return attInfo;
}
#endif
void XMLCALL
XML_SetElementHandler(XML_Parser parser,
- XML_StartElementHandler start,
- XML_EndElementHandler end)
+ XML_StartElementHandler start,
+ XML_EndElementHandler end)
{
- startElementHandler = start;
- endElementHandler = end;
+ startElementHandler = start;
+ endElementHandler = end;
}
void XMLCALL
XML_SetStartElementHandler(XML_Parser parser,
- XML_StartElementHandler start) {
- startElementHandler = start;
+ XML_StartElementHandler start) {
+ startElementHandler = start;
}
void XMLCALL
XML_SetEndElementHandler(XML_Parser parser,
- XML_EndElementHandler end) {
- endElementHandler = end;
+ XML_EndElementHandler end) {
+ endElementHandler = end;
}
void XMLCALL
XML_SetCharacterDataHandler(XML_Parser parser,
- XML_CharacterDataHandler handler)
+ XML_CharacterDataHandler handler)
{
- characterDataHandler = handler;
+ characterDataHandler = handler;
}
void XMLCALL
XML_SetProcessingInstructionHandler(XML_Parser parser,
- XML_ProcessingInstructionHandler handler)
+ XML_ProcessingInstructionHandler handler)
{
- processingInstructionHandler = handler;
+ processingInstructionHandler = handler;
}
void XMLCALL
XML_SetCommentHandler(XML_Parser parser,
- XML_CommentHandler handler)
+ XML_CommentHandler handler)
{
- commentHandler = handler;
+ commentHandler = handler;
}
void XMLCALL
XML_SetCdataSectionHandler(XML_Parser parser,
- XML_StartCdataSectionHandler start,
- XML_EndCdataSectionHandler end)
+ XML_StartCdataSectionHandler start,
+ XML_EndCdataSectionHandler end)
{
- startCdataSectionHandler = start;
- endCdataSectionHandler = end;
+ startCdataSectionHandler = start;
+ endCdataSectionHandler = end;
}
void XMLCALL
XML_SetStartCdataSectionHandler(XML_Parser parser,
- XML_StartCdataSectionHandler start) {
- startCdataSectionHandler = start;
+ XML_StartCdataSectionHandler start) {
+ startCdataSectionHandler = start;
}
void XMLCALL
XML_SetEndCdataSectionHandler(XML_Parser parser,
- XML_EndCdataSectionHandler end) {
- endCdataSectionHandler = end;
+ XML_EndCdataSectionHandler end) {
+ endCdataSectionHandler = end;
}
void XMLCALL
XML_SetDefaultHandler(XML_Parser parser,
- XML_DefaultHandler handler)
+ XML_DefaultHandler handler)
{
- defaultHandler = handler;
- defaultExpandInternalEntities = XML_FALSE;
+ defaultHandler = handler;
+ defaultExpandInternalEntities = XML_FALSE;
}
void XMLCALL
XML_SetDefaultHandlerExpand(XML_Parser parser,
- XML_DefaultHandler handler)
+ XML_DefaultHandler handler)
{
- defaultHandler = handler;
- defaultExpandInternalEntities = XML_TRUE;
+ defaultHandler = handler;
+ defaultExpandInternalEntities = XML_TRUE;
}
void XMLCALL
XML_SetDoctypeDeclHandler(XML_Parser parser,
- XML_StartDoctypeDeclHandler start,
- XML_EndDoctypeDeclHandler end)
+ XML_StartDoctypeDeclHandler start,
+ XML_EndDoctypeDeclHandler end)
{
- startDoctypeDeclHandler = start;
- endDoctypeDeclHandler = end;
+ startDoctypeDeclHandler = start;
+ endDoctypeDeclHandler = end;
}
void XMLCALL
XML_SetStartDoctypeDeclHandler(XML_Parser parser,
- XML_StartDoctypeDeclHandler start) {
- startDoctypeDeclHandler = start;
+ XML_StartDoctypeDeclHandler start) {
+ startDoctypeDeclHandler = start;
}
void XMLCALL
XML_SetEndDoctypeDeclHandler(XML_Parser parser,
- XML_EndDoctypeDeclHandler end) {
- endDoctypeDeclHandler = end;
+ XML_EndDoctypeDeclHandler end) {
+ endDoctypeDeclHandler = end;
}
void XMLCALL
XML_SetUnparsedEntityDeclHandler(XML_Parser parser,
- XML_UnparsedEntityDeclHandler handler)
+ XML_UnparsedEntityDeclHandler handler)
{
- unparsedEntityDeclHandler = handler;
+ unparsedEntityDeclHandler = handler;
}
void XMLCALL
XML_SetNotationDeclHandler(XML_Parser parser,
- XML_NotationDeclHandler handler)
+ XML_NotationDeclHandler handler)
{
- notationDeclHandler = handler;
+ notationDeclHandler = handler;
}
void XMLCALL
XML_SetNamespaceDeclHandler(XML_Parser parser,
- XML_StartNamespaceDeclHandler start,
- XML_EndNamespaceDeclHandler end)
+ XML_StartNamespaceDeclHandler start,
+ XML_EndNamespaceDeclHandler end)
{
- startNamespaceDeclHandler = start;
- endNamespaceDeclHandler = end;
+ startNamespaceDeclHandler = start;
+ endNamespaceDeclHandler = end;
}
void XMLCALL
XML_SetStartNamespaceDeclHandler(XML_Parser parser,
- XML_StartNamespaceDeclHandler start) {
- startNamespaceDeclHandler = start;
+ XML_StartNamespaceDeclHandler start) {
+ startNamespaceDeclHandler = start;
}
void XMLCALL
XML_SetEndNamespaceDeclHandler(XML_Parser parser,
- XML_EndNamespaceDeclHandler end) {
- endNamespaceDeclHandler = end;
+ XML_EndNamespaceDeclHandler end) {
+ endNamespaceDeclHandler = end;
}
void XMLCALL
XML_SetNotStandaloneHandler(XML_Parser parser,
- XML_NotStandaloneHandler handler)
+ XML_NotStandaloneHandler handler)
{
- notStandaloneHandler = handler;
+ notStandaloneHandler = handler;
}
void XMLCALL
XML_SetExternalEntityRefHandler(XML_Parser parser,
- XML_ExternalEntityRefHandler handler)
+ XML_ExternalEntityRefHandler handler)
{
- externalEntityRefHandler = handler;
+ externalEntityRefHandler = handler;
}
void XMLCALL
XML_SetExternalEntityRefHandlerArg(XML_Parser parser, void *arg)
{
- if (arg)
- externalEntityRefHandlerArg = (XML_Parser)arg;
- else
- externalEntityRefHandlerArg = parser;
+ if (arg)
+ externalEntityRefHandlerArg = (XML_Parser)arg;
+ else
+ externalEntityRefHandlerArg = parser;
}
void XMLCALL
XML_SetSkippedEntityHandler(XML_Parser parser,
- XML_SkippedEntityHandler handler)
+ XML_SkippedEntityHandler handler)
{
- skippedEntityHandler = handler;
+ skippedEntityHandler = handler;
}
void XMLCALL
XML_SetUnknownEncodingHandler(XML_Parser parser,
- XML_UnknownEncodingHandler handler,
- void *data)
+ XML_UnknownEncodingHandler handler,
+ void *data)
{
- unknownEncodingHandler = handler;
- unknownEncodingHandlerData = data;
+ unknownEncodingHandler = handler;
+ unknownEncodingHandlerData = data;
}
void XMLCALL
XML_SetElementDeclHandler(XML_Parser parser,
- XML_ElementDeclHandler eldecl)
+ XML_ElementDeclHandler eldecl)
{
- elementDeclHandler = eldecl;
+ elementDeclHandler = eldecl;
}
void XMLCALL
XML_SetAttlistDeclHandler(XML_Parser parser,
- XML_AttlistDeclHandler attdecl)
+ XML_AttlistDeclHandler attdecl)
{
- attlistDeclHandler = attdecl;
+ attlistDeclHandler = attdecl;
}
void XMLCALL
XML_SetEntityDeclHandler(XML_Parser parser,
- XML_EntityDeclHandler handler)
+ XML_EntityDeclHandler handler)
{
- entityDeclHandler = handler;
+ entityDeclHandler = handler;
}
void XMLCALL
XML_SetXmlDeclHandler(XML_Parser parser,
- XML_XmlDeclHandler handler) {
- xmlDeclHandler = handler;
+ XML_XmlDeclHandler handler) {
+ xmlDeclHandler = handler;
}
int XMLCALL
XML_SetParamEntityParsing(XML_Parser parser,
- enum XML_ParamEntityParsing peParsing)
+ enum XML_ParamEntityParsing peParsing)
{
- /* block after XML_Parse()/XML_ParseBuffer() has been called */
- if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
- return 0;
+ /* block after XML_Parse()/XML_ParseBuffer() has been called */
+ if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
+ return 0;
#ifdef XML_DTD
- paramEntityParsing = peParsing;
- return 1;
+ paramEntityParsing = peParsing;
+ return 1;
#else
- return peParsing == XML_PARAM_ENTITY_PARSING_NEVER;
+ return peParsing == XML_PARAM_ENTITY_PARSING_NEVER;
#endif
}
int XMLCALL
XML_SetHashSalt(XML_Parser parser,
- unsigned long hash_salt)
+ unsigned long hash_salt)
{
- /* block after XML_Parse()/XML_ParseBuffer() has been called */
- if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
- return 0;
- hash_secret_salt = hash_salt;
- return 1;
+ /* block after XML_Parse()/XML_ParseBuffer() has been called */
+ if (ps_parsing == XML_PARSING || ps_parsing == XML_SUSPENDED)
+ return 0;
+ hash_secret_salt = hash_salt;
+ return 1;
}
enum XML_Status XMLCALL
XML_Parse(XML_Parser parser, const char *s, int len, int isFinal)
{
- switch (ps_parsing) {
- case XML_SUSPENDED:
- errorCode = XML_ERROR_SUSPENDED;
- return XML_STATUS_ERROR;
- case XML_FINISHED:
- errorCode = XML_ERROR_FINISHED;
- return XML_STATUS_ERROR;
- case XML_INITIALIZED:
- if (parentParser == NULL && !startParsing(parser)) {
- errorCode = XML_ERROR_NO_MEMORY;
- return XML_STATUS_ERROR;
- }
- default:
- ps_parsing = XML_PARSING;
- }
-
- if (len == 0) {
- ps_finalBuffer = (XML_Bool)isFinal;
- if (!isFinal)
- return XML_STATUS_OK;
- positionPtr = bufferPtr;
- parseEndPtr = bufferEnd;
-
- /* If data are left over from last buffer, and we now know that these
- data are the final chunk of input, then we have to check them again
- to detect errors based on that fact.
- */
- errorCode = processor(parser, bufferPtr, parseEndPtr, &bufferPtr);
-
- if (errorCode == XML_ERROR_NONE) {
- switch (ps_parsing) {
- case XML_SUSPENDED:
- XmlUpdatePosition(encoding, positionPtr, bufferPtr, &position);
- positionPtr = bufferPtr;
- return XML_STATUS_SUSPENDED;
- case XML_INITIALIZED:
- case XML_PARSING:
- ps_parsing = XML_FINISHED;
- /* fall through */
- default:
- return XML_STATUS_OK;
- }
- }
- eventEndPtr = eventPtr;
- processor = errorProcessor;
- return XML_STATUS_ERROR;
- }
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ errorCode = XML_ERROR_SUSPENDED;
+ return XML_STATUS_ERROR;
+ case XML_FINISHED:
+ errorCode = XML_ERROR_FINISHED;
+ return XML_STATUS_ERROR;
+ case XML_INITIALIZED:
+ if (parentParser == NULL && !startParsing(parser)) {
+ errorCode = XML_ERROR_NO_MEMORY;
+ return XML_STATUS_ERROR;
+ }
+ default:
+ ps_parsing = XML_PARSING;
+ }
+
+ if (len == 0) {
+ ps_finalBuffer = (XML_Bool)isFinal;
+ if (!isFinal)
+ return XML_STATUS_OK;
+ positionPtr = bufferPtr;
+ parseEndPtr = bufferEnd;
+
+ /* If data are left over from last buffer, and we now know that these
+ data are the final chunk of input, then we have to check them again
+ to detect errors based on that fact.
+ */
+ errorCode = processor(parser, bufferPtr, parseEndPtr, &bufferPtr);
+
+ if (errorCode == XML_ERROR_NONE) {
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ XmlUpdatePosition(encoding, positionPtr, bufferPtr, &position);
+ positionPtr = bufferPtr;
+ return XML_STATUS_SUSPENDED;
+ case XML_INITIALIZED:
+ case XML_PARSING:
+ ps_parsing = XML_FINISHED;
+ /* fall through */
+ default:
+ return XML_STATUS_OK;
+ }
+ }
+ eventEndPtr = eventPtr;
+ processor = errorProcessor;
+ return XML_STATUS_ERROR;
+ }
#ifndef XML_CONTEXT_BYTES
- else if (bufferPtr == bufferEnd) {
- const char *end;
- int nLeftOver;
- enum XML_Error result;
- parseEndByteIndex += len;
- positionPtr = s;
- ps_finalBuffer = (XML_Bool)isFinal;
-
- errorCode = processor(parser, s, parseEndPtr = s + len, &end);
-
- if (errorCode != XML_ERROR_NONE) {
- eventEndPtr = eventPtr;
- processor = errorProcessor;
- return XML_STATUS_ERROR;
- }
- else {
- switch (ps_parsing) {
- case XML_SUSPENDED:
- result = XML_STATUS_SUSPENDED;
- break;
- case XML_INITIALIZED:
- case XML_PARSING:
- if (isFinal) {
- ps_parsing = XML_FINISHED;
- return XML_STATUS_OK;
- }
- /* fall through */
- default:
- result = XML_STATUS_OK;
- }
- }
-
- XmlUpdatePosition(encoding, positionPtr, end, &position);
- nLeftOver = s + len - end;
- if (nLeftOver) {
- if (buffer == NULL || nLeftOver > bufferLim - buffer) {
- /* FIXME avoid integer overflow */
- char *temp;
- temp = (buffer == NULL
- ? (char *)MALLOC(len * 2)
- : (char *)REALLOC(buffer, len * 2));
- if (temp == NULL) {
- errorCode = XML_ERROR_NO_MEMORY;
- eventPtr = eventEndPtr = NULL;
- processor = errorProcessor;
- return XML_STATUS_ERROR;
- }
- buffer = temp;
- bufferLim = buffer + len * 2;
- }
- memcpy(buffer, end, nLeftOver);
- }
- bufferPtr = buffer;
- bufferEnd = buffer + nLeftOver;
- positionPtr = bufferPtr;
- parseEndPtr = bufferEnd;
- eventPtr = bufferPtr;
- eventEndPtr = bufferPtr;
- return result;
- }
+ else if (bufferPtr == bufferEnd) {
+ const char *end;
+ int nLeftOver;
+ enum XML_Error result;
+ parseEndByteIndex += len;
+ positionPtr = s;
+ ps_finalBuffer = (XML_Bool)isFinal;
+
+ errorCode = processor(parser, s, parseEndPtr = s + len, &end);
+
+ if (errorCode != XML_ERROR_NONE) {
+ eventEndPtr = eventPtr;
+ processor = errorProcessor;
+ return XML_STATUS_ERROR;
+ }
+ else {
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ result = XML_STATUS_SUSPENDED;
+ break;
+ case XML_INITIALIZED:
+ case XML_PARSING:
+ if (isFinal) {
+ ps_parsing = XML_FINISHED;
+ return XML_STATUS_OK;
+ }
+ /* fall through */
+ default:
+ result = XML_STATUS_OK;
+ }
+ }
+
+ XmlUpdatePosition(encoding, positionPtr, end, &position);
+ nLeftOver = s + len - end;
+ if (nLeftOver) {
+ if (buffer == NULL || nLeftOver > bufferLim - buffer) {
+ /* FIXME avoid integer overflow */
+ char *temp;
+ temp = (buffer == NULL
+ ? (char *)MALLOC(len * 2)
+ : (char *)REALLOC(buffer, len * 2));
+ if (temp == NULL) {
+ errorCode = XML_ERROR_NO_MEMORY;
+ eventPtr = eventEndPtr = NULL;
+ processor = errorProcessor;
+ return XML_STATUS_ERROR;
+ }
+ buffer = temp;
+ bufferLim = buffer + len * 2;
+ }
+ memcpy(buffer, end, nLeftOver);
+ }
+ bufferPtr = buffer;
+ bufferEnd = buffer + nLeftOver;
+ positionPtr = bufferPtr;
+ parseEndPtr = bufferEnd;
+ eventPtr = bufferPtr;
+ eventEndPtr = bufferPtr;
+ return result;
+ }
#endif /* not defined XML_CONTEXT_BYTES */
- else {
- void *buff = XML_GetBuffer(parser, len);
- if (buff == NULL)
- return XML_STATUS_ERROR;
- else {
- memcpy(buff, s, len);
- return XML_ParseBuffer(parser, len, isFinal);
- }
- }
+ else {
+ void *buff = XML_GetBuffer(parser, len);
+ if (buff == NULL)
+ return XML_STATUS_ERROR;
+ else {
+ memcpy(buff, s, len);
+ return XML_ParseBuffer(parser, len, isFinal);
+ }
+ }
}
enum XML_Status XMLCALL
XML_ParseBuffer(XML_Parser parser, int len, int isFinal)
{
- const char *start;
- enum XML_Status result = XML_STATUS_OK;
-
- switch (ps_parsing) {
- case XML_SUSPENDED:
- errorCode = XML_ERROR_SUSPENDED;
- return XML_STATUS_ERROR;
- case XML_FINISHED:
- errorCode = XML_ERROR_FINISHED;
- return XML_STATUS_ERROR;
- case XML_INITIALIZED:
- if (parentParser == NULL && !startParsing(parser)) {
- errorCode = XML_ERROR_NO_MEMORY;
- return XML_STATUS_ERROR;
- }
- default:
- ps_parsing = XML_PARSING;
- }
-
- start = bufferPtr;
- positionPtr = start;
- bufferEnd += len;
- parseEndPtr = bufferEnd;
- parseEndByteIndex += len;
- ps_finalBuffer = (XML_Bool)isFinal;
-
- errorCode = processor(parser, start, parseEndPtr, &bufferPtr);
-
- if (errorCode != XML_ERROR_NONE) {
- eventEndPtr = eventPtr;
- processor = errorProcessor;
- return XML_STATUS_ERROR;
- }
- else {
- switch (ps_parsing) {
- case XML_SUSPENDED:
- result = XML_STATUS_SUSPENDED;
- break;
- case XML_INITIALIZED:
- case XML_PARSING:
- if (isFinal) {
- ps_parsing = XML_FINISHED;
- return result;
- }
- default: ; /* should not happen */
- }
- }
-
- XmlUpdatePosition(encoding, positionPtr, bufferPtr, &position);
- positionPtr = bufferPtr;
- return result;
+ const char *start;
+ enum XML_Status result = XML_STATUS_OK;
+
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ errorCode = XML_ERROR_SUSPENDED;
+ return XML_STATUS_ERROR;
+ case XML_FINISHED:
+ errorCode = XML_ERROR_FINISHED;
+ return XML_STATUS_ERROR;
+ case XML_INITIALIZED:
+ if (parentParser == NULL && !startParsing(parser)) {
+ errorCode = XML_ERROR_NO_MEMORY;
+ return XML_STATUS_ERROR;
+ }
+ default:
+ ps_parsing = XML_PARSING;
+ }
+
+ start = bufferPtr;
+ positionPtr = start;
+ bufferEnd += len;
+ parseEndPtr = bufferEnd;
+ parseEndByteIndex += len;
+ ps_finalBuffer = (XML_Bool)isFinal;
+
+ errorCode = processor(parser, start, parseEndPtr, &bufferPtr);
+
+ if (errorCode != XML_ERROR_NONE) {
+ eventEndPtr = eventPtr;
+ processor = errorProcessor;
+ return XML_STATUS_ERROR;
+ }
+ else {
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ result = XML_STATUS_SUSPENDED;
+ break;
+ case XML_INITIALIZED:
+ case XML_PARSING:
+ if (isFinal) {
+ ps_parsing = XML_FINISHED;
+ return result;
+ }
+ default: ; /* should not happen */
+ }
+ }
+
+ XmlUpdatePosition(encoding, positionPtr, bufferPtr, &position);
+ positionPtr = bufferPtr;
+ return result;
}
void * XMLCALL
XML_GetBuffer(XML_Parser parser, int len)
{
- switch (ps_parsing) {
- case XML_SUSPENDED:
- errorCode = XML_ERROR_SUSPENDED;
- return NULL;
- case XML_FINISHED:
- errorCode = XML_ERROR_FINISHED;
- return NULL;
- default: ;
- }
-
- if (len > bufferLim - bufferEnd) {
- /* FIXME avoid integer overflow */
- int neededSize = len + (int)(bufferEnd - bufferPtr);
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ errorCode = XML_ERROR_SUSPENDED;
+ return NULL;
+ case XML_FINISHED:
+ errorCode = XML_ERROR_FINISHED;
+ return NULL;
+ default: ;
+ }
+
+ if (len > bufferLim - bufferEnd) {
+ /* FIXME avoid integer overflow */
+ int neededSize = len + (int)(bufferEnd - bufferPtr);
#ifdef XML_CONTEXT_BYTES
- int keep = (int)(bufferPtr - buffer);
+ int keep = (int)(bufferPtr - buffer);
- if (keep > XML_CONTEXT_BYTES)
- keep = XML_CONTEXT_BYTES;
- neededSize += keep;
+ if (keep > XML_CONTEXT_BYTES)
+ keep = XML_CONTEXT_BYTES;
+ neededSize += keep;
#endif /* defined XML_CONTEXT_BYTES */
- if (neededSize <= bufferLim - buffer) {
+ if (neededSize <= bufferLim - buffer) {
#ifdef XML_CONTEXT_BYTES
- if (keep < bufferPtr - buffer) {
- int offset = (int)(bufferPtr - buffer) - keep;
- memmove(buffer, &buffer[offset], bufferEnd - bufferPtr + keep);
- bufferEnd -= offset;
- bufferPtr -= offset;
- }
+ if (keep < bufferPtr - buffer) {
+ int offset = (int)(bufferPtr - buffer) - keep;
+ memmove(buffer, &buffer[offset], bufferEnd - bufferPtr + keep);
+ bufferEnd -= offset;
+ bufferPtr -= offset;
+ }
#else
- memmove(buffer, bufferPtr, bufferEnd - bufferPtr);
- bufferEnd = buffer + (bufferEnd - bufferPtr);
- bufferPtr = buffer;
+ memmove(buffer, bufferPtr, bufferEnd - bufferPtr);
+ bufferEnd = buffer + (bufferEnd - bufferPtr);
+ bufferPtr = buffer;
#endif /* not defined XML_CONTEXT_BYTES */
- }
- else {
- char *newBuf;
- int bufferSize = (int)(bufferLim - bufferPtr);
- if (bufferSize == 0)
- bufferSize = INIT_BUFFER_SIZE;
- do {
- bufferSize *= 2;
- } while (bufferSize < neededSize);
- newBuf = (char *)MALLOC(bufferSize);
- if (newBuf == 0) {
- errorCode = XML_ERROR_NO_MEMORY;
- return NULL;
- }
- bufferLim = newBuf + bufferSize;
+ }
+ else {
+ char *newBuf;
+ int bufferSize = (int)(bufferLim - bufferPtr);
+ if (bufferSize == 0)
+ bufferSize = INIT_BUFFER_SIZE;
+ do {
+ bufferSize *= 2;
+ } while (bufferSize < neededSize);
+ newBuf = (char *)MALLOC(bufferSize);
+ if (newBuf == 0) {
+ errorCode = XML_ERROR_NO_MEMORY;
+ return NULL;
+ }
+ bufferLim = newBuf + bufferSize;
#ifdef XML_CONTEXT_BYTES
- if (bufferPtr) {
- int keep = (int)(bufferPtr - buffer);
- if (keep > XML_CONTEXT_BYTES)
- keep = XML_CONTEXT_BYTES;
- memcpy(newBuf, &bufferPtr[-keep], bufferEnd - bufferPtr + keep);
- FREE(buffer);
- buffer = newBuf;
- bufferEnd = buffer + (bufferEnd - bufferPtr) + keep;
- bufferPtr = buffer + keep;
- }
- else {
- bufferEnd = newBuf + (bufferEnd - bufferPtr);
- bufferPtr = buffer = newBuf;
- }
+ if (bufferPtr) {
+ int keep = (int)(bufferPtr - buffer);
+ if (keep > XML_CONTEXT_BYTES)
+ keep = XML_CONTEXT_BYTES;
+ memcpy(newBuf, &bufferPtr[-keep], bufferEnd - bufferPtr + keep);
+ FREE(buffer);
+ buffer = newBuf;
+ bufferEnd = buffer + (bufferEnd - bufferPtr) + keep;
+ bufferPtr = buffer + keep;
+ }
+ else {
+ bufferEnd = newBuf + (bufferEnd - bufferPtr);
+ bufferPtr = buffer = newBuf;
+ }
#else
- if (bufferPtr) {
- memcpy(newBuf, bufferPtr, bufferEnd - bufferPtr);
- FREE(buffer);
- }
- bufferEnd = newBuf + (bufferEnd - bufferPtr);
- bufferPtr = buffer = newBuf;
+ if (bufferPtr) {
+ memcpy(newBuf, bufferPtr, bufferEnd - bufferPtr);
+ FREE(buffer);
+ }
+ bufferEnd = newBuf + (bufferEnd - bufferPtr);
+ bufferPtr = buffer = newBuf;
#endif /* not defined XML_CONTEXT_BYTES */
- }
- eventPtr = eventEndPtr = NULL;
- positionPtr = NULL;
- }
- return bufferEnd;
+ }
+ eventPtr = eventEndPtr = NULL;
+ positionPtr = NULL;
+ }
+ return bufferEnd;
}
enum XML_Status XMLCALL
XML_StopParser(XML_Parser parser, XML_Bool resumable)
{
- switch (ps_parsing) {
- case XML_SUSPENDED:
- if (resumable) {
- errorCode = XML_ERROR_SUSPENDED;
- return XML_STATUS_ERROR;
- }
- ps_parsing = XML_FINISHED;
- break;
- case XML_FINISHED:
- errorCode = XML_ERROR_FINISHED;
- return XML_STATUS_ERROR;
- default:
- if (resumable) {
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ if (resumable) {
+ errorCode = XML_ERROR_SUSPENDED;
+ return XML_STATUS_ERROR;
+ }
+ ps_parsing = XML_FINISHED;
+ break;
+ case XML_FINISHED:
+ errorCode = XML_ERROR_FINISHED;
+ return XML_STATUS_ERROR;
+ default:
+ if (resumable) {
#ifdef XML_DTD
- if (isParamEntity) {
- errorCode = XML_ERROR_SUSPEND_PE;
- return XML_STATUS_ERROR;
- }
+ if (isParamEntity) {
+ errorCode = XML_ERROR_SUSPEND_PE;
+ return XML_STATUS_ERROR;
+ }
#endif
- ps_parsing = XML_SUSPENDED;
- }
- else
- ps_parsing = XML_FINISHED;
- }
- return XML_STATUS_OK;
+ ps_parsing = XML_SUSPENDED;
+ }
+ else
+ ps_parsing = XML_FINISHED;
+ }
+ return XML_STATUS_OK;
}
enum XML_Status XMLCALL
XML_ResumeParser(XML_Parser parser)
{
- enum XML_Status result = XML_STATUS_OK;
-
- if (ps_parsing != XML_SUSPENDED) {
- errorCode = XML_ERROR_NOT_SUSPENDED;
- return XML_STATUS_ERROR;
- }
- ps_parsing = XML_PARSING;
-
- errorCode = processor(parser, bufferPtr, parseEndPtr, &bufferPtr);
-
- if (errorCode != XML_ERROR_NONE) {
- eventEndPtr = eventPtr;
- processor = errorProcessor;
- return XML_STATUS_ERROR;
- }
- else {
- switch (ps_parsing) {
- case XML_SUSPENDED:
- result = XML_STATUS_SUSPENDED;
- break;
- case XML_INITIALIZED:
- case XML_PARSING:
- if (ps_finalBuffer) {
- ps_parsing = XML_FINISHED;
- return result;
- }
- default: ;
- }
- }
-
- XmlUpdatePosition(encoding, positionPtr, bufferPtr, &position);
- positionPtr = bufferPtr;
- return result;
+ enum XML_Status result = XML_STATUS_OK;
+
+ if (ps_parsing != XML_SUSPENDED) {
+ errorCode = XML_ERROR_NOT_SUSPENDED;
+ return XML_STATUS_ERROR;
+ }
+ ps_parsing = XML_PARSING;
+
+ errorCode = processor(parser, bufferPtr, parseEndPtr, &bufferPtr);
+
+ if (errorCode != XML_ERROR_NONE) {
+ eventEndPtr = eventPtr;
+ processor = errorProcessor;
+ return XML_STATUS_ERROR;
+ }
+ else {
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ result = XML_STATUS_SUSPENDED;
+ break;
+ case XML_INITIALIZED:
+ case XML_PARSING:
+ if (ps_finalBuffer) {
+ ps_parsing = XML_FINISHED;
+ return result;
+ }
+ default: ;
+ }
+ }
+
+ XmlUpdatePosition(encoding, positionPtr, bufferPtr, &position);
+ positionPtr = bufferPtr;
+ return result;
}
void XMLCALL
XML_GetParsingStatus(XML_Parser parser, XML_ParsingStatus *status)
{
- assert(status != NULL);
- *status = parser->m_parsingStatus;
+ assert(status != NULL);
+ *status = parser->m_parsingStatus;
}
enum XML_Error XMLCALL
XML_GetErrorCode(XML_Parser parser)
{
- return errorCode;
+ return errorCode;
}
XML_Index XMLCALL
XML_GetCurrentByteIndex(XML_Parser parser)
{
- if (eventPtr)
- return parseEndByteIndex - (parseEndPtr - eventPtr);
- return -1;
+ if (eventPtr)
+ return parseEndByteIndex - (parseEndPtr - eventPtr);
+ return -1;
}
int XMLCALL
XML_GetCurrentByteCount(XML_Parser parser)
{
- if (eventEndPtr && eventPtr)
- return (int)(eventEndPtr - eventPtr);
- return 0;
+ if (eventEndPtr && eventPtr)
+ return (int)(eventEndPtr - eventPtr);
+ return 0;
}
const char * XMLCALL
XML_GetInputContext(XML_Parser parser, int *offset, int *size)
{
#ifdef XML_CONTEXT_BYTES
- if (eventPtr && buffer) {
- *offset = (int)(eventPtr - buffer);
- *size = (int)(bufferEnd - buffer);
- return buffer;
- }
+ if (eventPtr && buffer) {
+ *offset = (int)(eventPtr - buffer);
+ *size = (int)(bufferEnd - buffer);
+ return buffer;
+ }
#endif /* defined XML_CONTEXT_BYTES */
- return (char *) 0;
+ return (char *) 0;
}
XML_Size XMLCALL
XML_GetCurrentLineNumber(XML_Parser parser)
{
- if (eventPtr && eventPtr >= positionPtr) {
- XmlUpdatePosition(encoding, positionPtr, eventPtr, &position);
- positionPtr = eventPtr;
- }
- return position.lineNumber + 1;
+ if (eventPtr && eventPtr >= positionPtr) {
+ XmlUpdatePosition(encoding, positionPtr, eventPtr, &position);
+ positionPtr = eventPtr;
+ }
+ return position.lineNumber + 1;
}
XML_Size XMLCALL
XML_GetCurrentColumnNumber(XML_Parser parser)
{
- if (eventPtr && eventPtr >= positionPtr) {
- XmlUpdatePosition(encoding, positionPtr, eventPtr, &position);
- positionPtr = eventPtr;
- }
- return position.columnNumber;
+ if (eventPtr && eventPtr >= positionPtr) {
+ XmlUpdatePosition(encoding, positionPtr, eventPtr, &position);
+ positionPtr = eventPtr;
+ }
+ return position.columnNumber;
}
void XMLCALL
XML_FreeContentModel(XML_Parser parser, XML_Content *model)
{
- FREE(model);
+ FREE(model);
}
void * XMLCALL
XML_MemMalloc(XML_Parser parser, size_t size)
{
- return MALLOC(size);
+ return MALLOC(size);
}
void * XMLCALL
XML_MemRealloc(XML_Parser parser, void *ptr, size_t size)
{
- return REALLOC(ptr, size);
+ return REALLOC(ptr, size);
}
void XMLCALL
XML_MemFree(XML_Parser parser, void *ptr)
{
- FREE(ptr);
+ FREE(ptr);
}
void XMLCALL
XML_DefaultCurrent(XML_Parser parser)
{
- if (defaultHandler) {
- if (openInternalEntities)
- reportDefault(parser,
- internalEncoding,
- openInternalEntities->internalEventPtr,
- openInternalEntities->internalEventEndPtr);
- else
- reportDefault(parser, encoding, eventPtr, eventEndPtr);
- }
+ if (defaultHandler) {
+ if (openInternalEntities)
+ reportDefault(parser,
+ internalEncoding,
+ openInternalEntities->internalEventPtr,
+ openInternalEntities->internalEventEndPtr);
+ else
+ reportDefault(parser, encoding, eventPtr, eventEndPtr);
+ }
}
const XML_LChar * XMLCALL
XML_ErrorString(enum XML_Error code)
{
- static const XML_LChar* const message[] = {
- 0,
- XML_L("out of memory"),
- XML_L("syntax error"),
- XML_L("no element found"),
- XML_L("not well-formed (invalid token)"),
- XML_L("unclosed token"),
- XML_L("partial character"),
- XML_L("mismatched tag"),
- XML_L("duplicate attribute"),
- XML_L("junk after document element"),
- XML_L("illegal parameter entity reference"),
- XML_L("undefined entity"),
- XML_L("recursive entity reference"),
- XML_L("asynchronous entity"),
- XML_L("reference to invalid character number"),
- XML_L("reference to binary entity"),
- XML_L("reference to external entity in attribute"),
- XML_L("XML or text declaration not at start of entity"),
- XML_L("unknown encoding"),
- XML_L("encoding specified in XML declaration is incorrect"),
- XML_L("unclosed CDATA section"),
- XML_L("error in processing external entity reference"),
- XML_L("document is not standalone"),
- XML_L("unexpected parser state - please send a bug report"),
- XML_L("entity declared in parameter entity"),
- XML_L("requested feature requires XML_DTD support in Expat"),
- XML_L("cannot change setting once parsing has begun"),
- XML_L("unbound prefix"),
- XML_L("must not undeclare prefix"),
- XML_L("incomplete markup in parameter entity"),
- XML_L("XML declaration not well-formed"),
- XML_L("text declaration not well-formed"),
- XML_L("illegal character(s) in public id"),
- XML_L("parser suspended"),
- XML_L("parser not suspended"),
- XML_L("parsing aborted"),
- XML_L("parsing finished"),
- XML_L("cannot suspend in external parameter entity"),
- XML_L("reserved prefix (xml) must not be undeclared or bound to another namespace name"),
- XML_L("reserved prefix (xmlns) must not be declared or undeclared"),
- XML_L("prefix must not be bound to one of the reserved namespace names")
- };
- if (code > 0 && code < sizeof(message)/sizeof(message[0]))
- return message[code];
- return NULL;
+ static const XML_LChar* const message[] = {
+ 0,
+ XML_L("out of memory"),
+ XML_L("syntax error"),
+ XML_L("no element found"),
+ XML_L("not well-formed (invalid token)"),
+ XML_L("unclosed token"),
+ XML_L("partial character"),
+ XML_L("mismatched tag"),
+ XML_L("duplicate attribute"),
+ XML_L("junk after document element"),
+ XML_L("illegal parameter entity reference"),
+ XML_L("undefined entity"),
+ XML_L("recursive entity reference"),
+ XML_L("asynchronous entity"),
+ XML_L("reference to invalid character number"),
+ XML_L("reference to binary entity"),
+ XML_L("reference to external entity in attribute"),
+ XML_L("XML or text declaration not at start of entity"),
+ XML_L("unknown encoding"),
+ XML_L("encoding specified in XML declaration is incorrect"),
+ XML_L("unclosed CDATA section"),
+ XML_L("error in processing external entity reference"),
+ XML_L("document is not standalone"),
+ XML_L("unexpected parser state - please send a bug report"),
+ XML_L("entity declared in parameter entity"),
+ XML_L("requested feature requires XML_DTD support in Expat"),
+ XML_L("cannot change setting once parsing has begun"),
+ XML_L("unbound prefix"),
+ XML_L("must not undeclare prefix"),
+ XML_L("incomplete markup in parameter entity"),
+ XML_L("XML declaration not well-formed"),
+ XML_L("text declaration not well-formed"),
+ XML_L("illegal character(s) in public id"),
+ XML_L("parser suspended"),
+ XML_L("parser not suspended"),
+ XML_L("parsing aborted"),
+ XML_L("parsing finished"),
+ XML_L("cannot suspend in external parameter entity"),
+ XML_L("reserved prefix (xml) must not be undeclared or bound to another namespace name"),
+ XML_L("reserved prefix (xmlns) must not be declared or undeclared"),
+ XML_L("prefix must not be bound to one of the reserved namespace names")
+ };
+ if (code > 0 && code < sizeof(message)/sizeof(message[0]))
+ return message[code];
+ return NULL;
}
const XML_LChar * XMLCALL
XML_ExpatVersion(void) {
- /* V1 is used to string-ize the version number. However, it would
- string-ize the actual version macro *names* unless we get them
- substituted before being passed to V1. CPP is defined to expand
- a macro, then rescan for more expansions. Thus, we use V2 to expand
- the version macros, then CPP will expand the resulting V1() macro
- with the correct numerals. */
- /* ### I'm assuming cpp is portable in this respect... */
+ /* V1 is used to string-ize the version number. However, it would
+ string-ize the actual version macro *names* unless we get them
+ substituted before being passed to V1. CPP is defined to expand
+ a macro, then rescan for more expansions. Thus, we use V2 to expand
+ the version macros, then CPP will expand the resulting V1() macro
+ with the correct numerals. */
+ /* ### I'm assuming cpp is portable in this respect... */
#define V1(a,b,c) XML_L(#a)XML_L(".")XML_L(#b)XML_L(".")XML_L(#c)
#define V2(a,b,c) XML_L("expat_")V1(a,b,c)
- return V2(XML_MAJOR_VERSION, XML_MINOR_VERSION, XML_MICRO_VERSION);
+ return V2(XML_MAJOR_VERSION, XML_MINOR_VERSION, XML_MICRO_VERSION);
#undef V1
#undef V2
@@ -1988,52 +1988,52 @@ XML_ExpatVersion(void) {
XML_Expat_Version XMLCALL
XML_ExpatVersionInfo(void)
{
- XML_Expat_Version version;
+ XML_Expat_Version version;
- version.major = XML_MAJOR_VERSION;
- version.minor = XML_MINOR_VERSION;
- version.micro = XML_MICRO_VERSION;
+ version.major = XML_MAJOR_VERSION;
+ version.minor = XML_MINOR_VERSION;
+ version.micro = XML_MICRO_VERSION;
- return version;
+ return version;
}
const XML_Feature * XMLCALL
XML_GetFeatureList(void)
{
- static const XML_Feature features[] = {
- {XML_FEATURE_SIZEOF_XML_CHAR, XML_L("sizeof(XML_Char)"),
- sizeof(XML_Char)},
- {XML_FEATURE_SIZEOF_XML_LCHAR, XML_L("sizeof(XML_LChar)"),
- sizeof(XML_LChar)},
+ static const XML_Feature features[] = {
+ {XML_FEATURE_SIZEOF_XML_CHAR, XML_L("sizeof(XML_Char)"),
+ sizeof(XML_Char)},
+ {XML_FEATURE_SIZEOF_XML_LCHAR, XML_L("sizeof(XML_LChar)"),
+ sizeof(XML_LChar)},
#ifdef XML_UNICODE
- {XML_FEATURE_UNICODE, XML_L("XML_UNICODE"), 0},
+ {XML_FEATURE_UNICODE, XML_L("XML_UNICODE"), 0},
#endif
#ifdef XML_UNICODE_WCHAR_T
- {XML_FEATURE_UNICODE_WCHAR_T, XML_L("XML_UNICODE_WCHAR_T"), 0},
+ {XML_FEATURE_UNICODE_WCHAR_T, XML_L("XML_UNICODE_WCHAR_T"), 0},
#endif
#ifdef XML_DTD
- {XML_FEATURE_DTD, XML_L("XML_DTD"), 0},
+ {XML_FEATURE_DTD, XML_L("XML_DTD"), 0},
#endif
#ifdef XML_CONTEXT_BYTES
- {XML_FEATURE_CONTEXT_BYTES, XML_L("XML_CONTEXT_BYTES"),
- XML_CONTEXT_BYTES},
+ {XML_FEATURE_CONTEXT_BYTES, XML_L("XML_CONTEXT_BYTES"),
+ XML_CONTEXT_BYTES},
#endif
#ifdef XML_MIN_SIZE
- {XML_FEATURE_MIN_SIZE, XML_L("XML_MIN_SIZE"), 0},
+ {XML_FEATURE_MIN_SIZE, XML_L("XML_MIN_SIZE"), 0},
#endif
#ifdef XML_NS
- {XML_FEATURE_NS, XML_L("XML_NS"), 0},
+ {XML_FEATURE_NS, XML_L("XML_NS"), 0},
#endif
#ifdef XML_LARGE_SIZE
- {XML_FEATURE_LARGE_SIZE, XML_L("XML_LARGE_SIZE"), 0},
+ {XML_FEATURE_LARGE_SIZE, XML_L("XML_LARGE_SIZE"), 0},
#endif
#ifdef XML_ATTR_INFO
- {XML_FEATURE_ATTR_INFO, XML_L("XML_ATTR_INFO"), 0},
+ {XML_FEATURE_ATTR_INFO, XML_L("XML_ATTR_INFO"), 0},
#endif
- {XML_FEATURE_END, NULL, 0}
- };
+ {XML_FEATURE_END, NULL, 0}
+ };
- return features;
+ return features;
}
/* Initially tag->rawName always points into the parse buffer;
@@ -2044,634 +2044,634 @@ XML_GetFeatureList(void)
static XML_Bool
storeRawNames(XML_Parser parser)
{
- TAG *tag = tagStack;
- while (tag) {
- int bufSize;
- int nameLen = sizeof(XML_Char) * (tag->name.strLen + 1);
- char *rawNameBuf = tag->buf + nameLen;
- /* Stop if already stored. Since tagStack is a stack, we can stop
- at the first entry that has already been copied; everything
- below it in the stack is already been accounted for in a
- previous call to this function.
- */
- if (tag->rawName == rawNameBuf)
- break;
- /* For re-use purposes we need to ensure that the
- size of tag->buf is a multiple of sizeof(XML_Char).
- */
- bufSize = nameLen + ROUND_UP(tag->rawNameLength, sizeof(XML_Char));
- if (bufSize > tag->bufEnd - tag->buf) {
- char *temp = (char *)REALLOC(tag->buf, bufSize);
- if (temp == NULL)
- return XML_FALSE;
- /* if tag->name.str points to tag->buf (only when namespace
- processing is off) then we have to update it
- */
- if (tag->name.str == (XML_Char *)tag->buf)
- tag->name.str = (XML_Char *)temp;
- /* if tag->name.localPart is set (when namespace processing is on)
- then update it as well, since it will always point into tag->buf
- */
- if (tag->name.localPart)
- tag->name.localPart = (XML_Char *)temp + (tag->name.localPart -
- (XML_Char *)tag->buf);
- tag->buf = temp;
- tag->bufEnd = temp + bufSize;
- rawNameBuf = temp + nameLen;
- }
- memcpy(rawNameBuf, tag->rawName, tag->rawNameLength);
- tag->rawName = rawNameBuf;
- tag = tag->parent;
- }
- return XML_TRUE;
+ TAG *tag = tagStack;
+ while (tag) {
+ int bufSize;
+ int nameLen = sizeof(XML_Char) * (tag->name.strLen + 1);
+ char *rawNameBuf = tag->buf + nameLen;
+ /* Stop if already stored. Since tagStack is a stack, we can stop
+ at the first entry that has already been copied; everything
+ below it in the stack is already been accounted for in a
+ previous call to this function.
+ */
+ if (tag->rawName == rawNameBuf)
+ break;
+ /* For re-use purposes we need to ensure that the
+ size of tag->buf is a multiple of sizeof(XML_Char).
+ */
+ bufSize = nameLen + ROUND_UP(tag->rawNameLength, sizeof(XML_Char));
+ if (bufSize > tag->bufEnd - tag->buf) {
+ char *temp = (char *)REALLOC(tag->buf, bufSize);
+ if (temp == NULL)
+ return XML_FALSE;
+ /* if tag->name.str points to tag->buf (only when namespace
+ processing is off) then we have to update it
+ */
+ if (tag->name.str == (XML_Char *)tag->buf)
+ tag->name.str = (XML_Char *)temp;
+ /* if tag->name.localPart is set (when namespace processing is on)
+ then update it as well, since it will always point into tag->buf
+ */
+ if (tag->name.localPart)
+ tag->name.localPart = (XML_Char *)temp + (tag->name.localPart -
+ (XML_Char *)tag->buf);
+ tag->buf = temp;
+ tag->bufEnd = temp + bufSize;
+ rawNameBuf = temp + nameLen;
+ }
+ memcpy(rawNameBuf, tag->rawName, tag->rawNameLength);
+ tag->rawName = rawNameBuf;
+ tag = tag->parent;
+ }
+ return XML_TRUE;
}
static enum XML_Error PTRCALL
contentProcessor(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr)
+ const char *start,
+ const char *end,
+ const char **endPtr)
{
- enum XML_Error result = doContent(parser, 0, encoding, start, end,
- endPtr, (XML_Bool)!ps_finalBuffer);
- if (result == XML_ERROR_NONE) {
- if (!storeRawNames(parser))
- return XML_ERROR_NO_MEMORY;
- }
- return result;
+ enum XML_Error result = doContent(parser, 0, encoding, start, end,
+ endPtr, (XML_Bool)!ps_finalBuffer);
+ if (result == XML_ERROR_NONE) {
+ if (!storeRawNames(parser))
+ return XML_ERROR_NO_MEMORY;
+ }
+ return result;
}
static enum XML_Error PTRCALL
externalEntityInitProcessor(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr)
+ const char *start,
+ const char *end,
+ const char **endPtr)
{
- enum XML_Error result = initializeEncoding(parser);
- if (result != XML_ERROR_NONE)
- return result;
- processor = externalEntityInitProcessor2;
- return externalEntityInitProcessor2(parser, start, end, endPtr);
+ enum XML_Error result = initializeEncoding(parser);
+ if (result != XML_ERROR_NONE)
+ return result;
+ processor = externalEntityInitProcessor2;
+ return externalEntityInitProcessor2(parser, start, end, endPtr);
}
static enum XML_Error PTRCALL
externalEntityInitProcessor2(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr)
-{
- const char *next = start; /* XmlContentTok doesn't always set the last arg */
- int tok = XmlContentTok(encoding, start, end, &next);
- switch (tok) {
- case XML_TOK_BOM:
- /* If we are at the end of the buffer, this would cause the next stage,
- i.e. externalEntityInitProcessor3, to pass control directly to
- doContent (by detecting XML_TOK_NONE) without processing any xml text
- declaration - causing the error XML_ERROR_MISPLACED_XML_PI in doContent.
- */
- if (next == end && !ps_finalBuffer) {
- *endPtr = next;
- return XML_ERROR_NONE;
- }
- start = next;
- break;
- case XML_TOK_PARTIAL:
- if (!ps_finalBuffer) {
- *endPtr = start;
- return XML_ERROR_NONE;
- }
- eventPtr = start;
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- if (!ps_finalBuffer) {
- *endPtr = start;
- return XML_ERROR_NONE;
- }
- eventPtr = start;
- return XML_ERROR_PARTIAL_CHAR;
- }
- processor = externalEntityInitProcessor3;
- return externalEntityInitProcessor3(parser, start, end, endPtr);
+ const char *start,
+ const char *end,
+ const char **endPtr)
+{
+ const char *next = start; /* XmlContentTok doesn't always set the last arg */
+ int tok = XmlContentTok(encoding, start, end, &next);
+ switch (tok) {
+ case XML_TOK_BOM:
+ /* If we are at the end of the buffer, this would cause the next stage,
+ i.e. externalEntityInitProcessor3, to pass control directly to
+ doContent (by detecting XML_TOK_NONE) without processing any xml text
+ declaration - causing the error XML_ERROR_MISPLACED_XML_PI in doContent.
+ */
+ if (next == end && !ps_finalBuffer) {
+ *endPtr = next;
+ return XML_ERROR_NONE;
+ }
+ start = next;
+ break;
+ case XML_TOK_PARTIAL:
+ if (!ps_finalBuffer) {
+ *endPtr = start;
+ return XML_ERROR_NONE;
+ }
+ eventPtr = start;
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ if (!ps_finalBuffer) {
+ *endPtr = start;
+ return XML_ERROR_NONE;
+ }
+ eventPtr = start;
+ return XML_ERROR_PARTIAL_CHAR;
+ }
+ processor = externalEntityInitProcessor3;
+ return externalEntityInitProcessor3(parser, start, end, endPtr);
}
static enum XML_Error PTRCALL
externalEntityInitProcessor3(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr)
-{
- int tok;
- const char *next = start; /* XmlContentTok doesn't always set the last arg */
- eventPtr = start;
- tok = XmlContentTok(encoding, start, end, &next);
- eventEndPtr = next;
-
- switch (tok) {
- case XML_TOK_XML_DECL:
- {
- enum XML_Error result;
- result = processXmlDecl(parser, 1, start, next);
- if (result != XML_ERROR_NONE)
- return result;
- switch (ps_parsing) {
- case XML_SUSPENDED:
- *endPtr = next;
- return XML_ERROR_NONE;
- case XML_FINISHED:
- return XML_ERROR_ABORTED;
- default:
- start = next;
- }
- }
- break;
- case XML_TOK_PARTIAL:
- if (!ps_finalBuffer) {
- *endPtr = start;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- if (!ps_finalBuffer) {
- *endPtr = start;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_PARTIAL_CHAR;
- }
- processor = externalEntityContentProcessor;
- tagLevel = 1;
- return externalEntityContentProcessor(parser, start, end, endPtr);
+ const char *start,
+ const char *end,
+ const char **endPtr)
+{
+ int tok;
+ const char *next = start; /* XmlContentTok doesn't always set the last arg */
+ eventPtr = start;
+ tok = XmlContentTok(encoding, start, end, &next);
+ eventEndPtr = next;
+
+ switch (tok) {
+ case XML_TOK_XML_DECL:
+ {
+ enum XML_Error result;
+ result = processXmlDecl(parser, 1, start, next);
+ if (result != XML_ERROR_NONE)
+ return result;
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ *endPtr = next;
+ return XML_ERROR_NONE;
+ case XML_FINISHED:
+ return XML_ERROR_ABORTED;
+ default:
+ start = next;
+ }
+ }
+ break;
+ case XML_TOK_PARTIAL:
+ if (!ps_finalBuffer) {
+ *endPtr = start;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ if (!ps_finalBuffer) {
+ *endPtr = start;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_PARTIAL_CHAR;
+ }
+ processor = externalEntityContentProcessor;
+ tagLevel = 1;
+ return externalEntityContentProcessor(parser, start, end, endPtr);
}
static enum XML_Error PTRCALL
externalEntityContentProcessor(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr)
+ const char *start,
+ const char *end,
+ const char **endPtr)
{
- enum XML_Error result = doContent(parser, 1, encoding, start, end,
- endPtr, (XML_Bool)!ps_finalBuffer);
- if (result == XML_ERROR_NONE) {
- if (!storeRawNames(parser))
- return XML_ERROR_NO_MEMORY;
- }
- return result;
+ enum XML_Error result = doContent(parser, 1, encoding, start, end,
+ endPtr, (XML_Bool)!ps_finalBuffer);
+ if (result == XML_ERROR_NONE) {
+ if (!storeRawNames(parser))
+ return XML_ERROR_NO_MEMORY;
+ }
+ return result;
}
static enum XML_Error
doContent(XML_Parser parser,
- int startTagLevel,
- const ENCODING *enc,
- const char *s,
- const char *end,
- const char **nextPtr,
- XML_Bool haveMore)
-{
- /* save one level of indirection */
- DTD * const dtd = _dtd;
-
- const char **eventPP;
- const char **eventEndPP;
- if (enc == encoding) {
- eventPP = &eventPtr;
- eventEndPP = &eventEndPtr;
- }
- else {
- eventPP = &(openInternalEntities->internalEventPtr);
- eventEndPP = &(openInternalEntities->internalEventEndPtr);
- }
- *eventPP = s;
-
- for (;;) {
- const char *next = s; /* XmlContentTok doesn't always set the last arg */
- int tok = XmlContentTok(enc, s, end, &next);
- *eventEndPP = next;
- switch (tok) {
- case XML_TOK_TRAILING_CR:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- *eventEndPP = end;
- if (characterDataHandler) {
- XML_Char c = 0xA;
- characterDataHandler(handlerArg, &c, 1);
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, end);
- /* We are at the end of the final buffer, should we check for
- XML_SUSPENDED, XML_FINISHED?
- */
- if (startTagLevel == 0)
- return XML_ERROR_NO_ELEMENTS;
- if (tagLevel != startTagLevel)
- return XML_ERROR_ASYNC_ENTITY;
- *nextPtr = end;
- return XML_ERROR_NONE;
- case XML_TOK_NONE:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- if (startTagLevel > 0) {
- if (tagLevel != startTagLevel)
- return XML_ERROR_ASYNC_ENTITY;
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_NO_ELEMENTS;
- case XML_TOK_INVALID:
- *eventPP = next;
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_PARTIAL_CHAR;
- case XML_TOK_ENTITY_REF:
- {
- const XML_Char *name;
- ENTITY *entity;
- XML_Char ch = (XML_Char) XmlPredefinedEntityName(enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (ch) {
- if (characterDataHandler)
- characterDataHandler(handlerArg, &ch, 1);
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- break;
- }
- name = poolStoreString(&dtd->pool, enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!name)
- return XML_ERROR_NO_MEMORY;
- entity = (ENTITY *)lookup(parser, &dtd->generalEntities, name, 0);
- poolDiscard(&dtd->pool);
- /* First, determine if a check for an existing declaration is needed;
- if yes, check that the entity exists, and that it is internal,
- otherwise call the skipped entity or default handler.
- */
- if (!dtd->hasParamEntityRefs || dtd->standalone) {
- if (!entity)
- return XML_ERROR_UNDEFINED_ENTITY;
- else if (!entity->is_internal)
- return XML_ERROR_ENTITY_DECLARED_IN_PE;
- }
- else if (!entity) {
- if (skippedEntityHandler)
- skippedEntityHandler(handlerArg, name, 0);
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- break;
- }
- if (entity->open)
- return XML_ERROR_RECURSIVE_ENTITY_REF;
- if (entity->notation)
- return XML_ERROR_BINARY_ENTITY_REF;
- if (entity->textPtr) {
- enum XML_Error result;
- if (!defaultExpandInternalEntities) {
- if (skippedEntityHandler)
- skippedEntityHandler(handlerArg, entity->name, 0);
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- break;
- }
- result = processInternalEntity(parser, entity, XML_FALSE);
- if (result != XML_ERROR_NONE)
- return result;
- }
- else if (externalEntityRefHandler) {
- const XML_Char *context;
- entity->open = XML_TRUE;
- context = getContext(parser);
- entity->open = XML_FALSE;
- if (!context)
- return XML_ERROR_NO_MEMORY;
- if (!externalEntityRefHandler(externalEntityRefHandlerArg,
- context,
- entity->base,
- entity->systemId,
- entity->publicId))
- return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
- poolDiscard(&tempPool);
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- break;
- }
- case XML_TOK_START_TAG_NO_ATTS:
- /* fall through */
- case XML_TOK_START_TAG_WITH_ATTS:
- {
- TAG *tag;
- enum XML_Error result;
- XML_Char *toPtr;
- if (freeTagList) {
- tag = freeTagList;
- freeTagList = freeTagList->parent;
- }
- else {
- tag = (TAG *)MALLOC(sizeof(TAG));
- if (!tag)
- return XML_ERROR_NO_MEMORY;
- tag->buf = (char *)MALLOC(INIT_TAG_BUF_SIZE);
- if (!tag->buf) {
- FREE(tag);
- return XML_ERROR_NO_MEMORY;
- }
- tag->bufEnd = tag->buf + INIT_TAG_BUF_SIZE;
- }
- tag->bindings = NULL;
- tag->parent = tagStack;
- tagStack = tag;
- tag->name.localPart = NULL;
- tag->name.prefix = NULL;
- tag->rawName = s + enc->minBytesPerChar;
- tag->rawNameLength = XmlNameLength(enc, tag->rawName);
- ++tagLevel;
- {
- const char *rawNameEnd = tag->rawName + tag->rawNameLength;
- const char *fromPtr = tag->rawName;
- toPtr = (XML_Char *)tag->buf;
- for (;;) {
- int bufSize;
- int convLen;
- XmlConvert(enc,
- &fromPtr, rawNameEnd,
- (ICHAR **)&toPtr, (ICHAR *)tag->bufEnd - 1);
- convLen = (int)(toPtr - (XML_Char *)tag->buf);
- if (fromPtr == rawNameEnd) {
- tag->name.strLen = convLen;
- break;
- }
- bufSize = (int)(tag->bufEnd - tag->buf) << 1;
- {
- char *temp = (char *)REALLOC(tag->buf, bufSize);
- if (temp == NULL)
- return XML_ERROR_NO_MEMORY;
- tag->buf = temp;
- tag->bufEnd = temp + bufSize;
- toPtr = (XML_Char *)temp + convLen;
- }
- }
- }
- tag->name.str = (XML_Char *)tag->buf;
- *toPtr = XML_T('\0');
- result = storeAtts(parser, enc, s, &(tag->name), &(tag->bindings));
- if (result)
- return result;
- if (startElementHandler)
- startElementHandler(handlerArg, tag->name.str,
- (const XML_Char **)atts);
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- poolClear(&tempPool);
- break;
- }
- case XML_TOK_EMPTY_ELEMENT_NO_ATTS:
- /* fall through */
- case XML_TOK_EMPTY_ELEMENT_WITH_ATTS:
- {
- const char *rawName = s + enc->minBytesPerChar;
- enum XML_Error result;
- BINDING *bindings = NULL;
- XML_Bool noElmHandlers = XML_TRUE;
- TAG_NAME name;
- name.str = poolStoreString(&tempPool, enc, rawName,
- rawName + XmlNameLength(enc, rawName));
- if (!name.str)
- return XML_ERROR_NO_MEMORY;
- poolFinish(&tempPool);
- result = storeAtts(parser, enc, s, &name, &bindings);
- if (result)
- return result;
- poolFinish(&tempPool);
- if (startElementHandler) {
- startElementHandler(handlerArg, name.str, (const XML_Char **)atts);
- noElmHandlers = XML_FALSE;
- }
- if (endElementHandler) {
- if (startElementHandler)
- *eventPP = *eventEndPP;
- endElementHandler(handlerArg, name.str);
- noElmHandlers = XML_FALSE;
- }
- if (noElmHandlers && defaultHandler)
- reportDefault(parser, enc, s, next);
- poolClear(&tempPool);
- while (bindings) {
- BINDING *b = bindings;
- if (endNamespaceDeclHandler)
- endNamespaceDeclHandler(handlerArg, b->prefix->name);
- bindings = bindings->nextTagBinding;
- b->nextTagBinding = freeBindingList;
- freeBindingList = b;
- b->prefix->binding = b->prevPrefixBinding;
- }
- }
- if (tagLevel == 0)
- return epilogProcessor(parser, next, end, nextPtr);
- break;
- case XML_TOK_END_TAG:
- if (tagLevel == startTagLevel)
- return XML_ERROR_ASYNC_ENTITY;
- else {
- int len;
- const char *rawName;
- TAG *tag = tagStack;
- tagStack = tag->parent;
- tag->parent = freeTagList;
- freeTagList = tag;
- rawName = s + enc->minBytesPerChar*2;
- len = XmlNameLength(enc, rawName);
- if (len != tag->rawNameLength
- || memcmp(tag->rawName, rawName, len) != 0) {
- *eventPP = rawName;
- return XML_ERROR_TAG_MISMATCH;
- }
- --tagLevel;
- if (endElementHandler) {
- const XML_Char *localPart;
- const XML_Char *prefix;
- XML_Char *uri;
- localPart = tag->name.localPart;
- if (ns && localPart) {
- /* localPart and prefix may have been overwritten in
- tag->name.str, since this points to the binding->uri
- buffer which gets re-used; so we have to add them again
- */
- uri = (XML_Char *)tag->name.str + tag->name.uriLen;
- /* don't need to check for space - already done in storeAtts() */
- while (*localPart) *uri++ = *localPart++;
- prefix = (XML_Char *)tag->name.prefix;
- if (ns_triplets && prefix) {
- *uri++ = namespaceSeparator;
- while (*prefix) *uri++ = *prefix++;
- }
- *uri = XML_T('\0');
- }
- endElementHandler(handlerArg, tag->name.str);
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- while (tag->bindings) {
- BINDING *b = tag->bindings;
- if (endNamespaceDeclHandler)
- endNamespaceDeclHandler(handlerArg, b->prefix->name);
- tag->bindings = tag->bindings->nextTagBinding;
- b->nextTagBinding = freeBindingList;
- freeBindingList = b;
- b->prefix->binding = b->prevPrefixBinding;
- }
- if (tagLevel == 0)
- return epilogProcessor(parser, next, end, nextPtr);
- }
- break;
- case XML_TOK_CHAR_REF:
- {
- int n = XmlCharRefNumber(enc, s);
- if (n < 0)
- return XML_ERROR_BAD_CHAR_REF;
- if (characterDataHandler) {
- XML_Char buf[XML_ENCODE_MAX];
- characterDataHandler(handlerArg, buf, XmlEncode(n, (ICHAR *)buf));
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- }
- break;
- case XML_TOK_XML_DECL:
- return XML_ERROR_MISPLACED_XML_PI;
- case XML_TOK_DATA_NEWLINE:
- if (characterDataHandler) {
- XML_Char c = 0xA;
- characterDataHandler(handlerArg, &c, 1);
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- break;
- case XML_TOK_CDATA_SECT_OPEN:
- {
- enum XML_Error result;
- if (startCdataSectionHandler)
- startCdataSectionHandler(handlerArg);
+ int startTagLevel,
+ const ENCODING *enc,
+ const char *s,
+ const char *end,
+ const char **nextPtr,
+ XML_Bool haveMore)
+{
+ /* save one level of indirection */
+ DTD * const dtd = _dtd;
+
+ const char **eventPP;
+ const char **eventEndPP;
+ if (enc == encoding) {
+ eventPP = &eventPtr;
+ eventEndPP = &eventEndPtr;
+ }
+ else {
+ eventPP = &(openInternalEntities->internalEventPtr);
+ eventEndPP = &(openInternalEntities->internalEventEndPtr);
+ }
+ *eventPP = s;
+
+ for (;;) {
+ const char *next = s; /* XmlContentTok doesn't always set the last arg */
+ int tok = XmlContentTok(enc, s, end, &next);
+ *eventEndPP = next;
+ switch (tok) {
+ case XML_TOK_TRAILING_CR:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ *eventEndPP = end;
+ if (characterDataHandler) {
+ XML_Char c = 0xA;
+ characterDataHandler(handlerArg, &c, 1);
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, end);
+ /* We are at the end of the final buffer, should we check for
+ XML_SUSPENDED, XML_FINISHED?
+ */
+ if (startTagLevel == 0)
+ return XML_ERROR_NO_ELEMENTS;
+ if (tagLevel != startTagLevel)
+ return XML_ERROR_ASYNC_ENTITY;
+ *nextPtr = end;
+ return XML_ERROR_NONE;
+ case XML_TOK_NONE:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ if (startTagLevel > 0) {
+ if (tagLevel != startTagLevel)
+ return XML_ERROR_ASYNC_ENTITY;
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_NO_ELEMENTS;
+ case XML_TOK_INVALID:
+ *eventPP = next;
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_PARTIAL_CHAR;
+ case XML_TOK_ENTITY_REF:
+ {
+ const XML_Char *name;
+ ENTITY *entity;
+ XML_Char ch = (XML_Char) XmlPredefinedEntityName(enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (ch) {
+ if (characterDataHandler)
+ characterDataHandler(handlerArg, &ch, 1);
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ break;
+ }
+ name = poolStoreString(&dtd->pool, enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!name)
+ return XML_ERROR_NO_MEMORY;
+ entity = (ENTITY *)lookup(parser, &dtd->generalEntities, name, 0);
+ poolDiscard(&dtd->pool);
+ /* First, determine if a check for an existing declaration is needed;
+ if yes, check that the entity exists, and that it is internal,
+ otherwise call the skipped entity or default handler.
+ */
+ if (!dtd->hasParamEntityRefs || dtd->standalone) {
+ if (!entity)
+ return XML_ERROR_UNDEFINED_ENTITY;
+ else if (!entity->is_internal)
+ return XML_ERROR_ENTITY_DECLARED_IN_PE;
+ }
+ else if (!entity) {
+ if (skippedEntityHandler)
+ skippedEntityHandler(handlerArg, name, 0);
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ break;
+ }
+ if (entity->open)
+ return XML_ERROR_RECURSIVE_ENTITY_REF;
+ if (entity->notation)
+ return XML_ERROR_BINARY_ENTITY_REF;
+ if (entity->textPtr) {
+ enum XML_Error result;
+ if (!defaultExpandInternalEntities) {
+ if (skippedEntityHandler)
+ skippedEntityHandler(handlerArg, entity->name, 0);
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ break;
+ }
+ result = processInternalEntity(parser, entity, XML_FALSE);
+ if (result != XML_ERROR_NONE)
+ return result;
+ }
+ else if (externalEntityRefHandler) {
+ const XML_Char *context;
+ entity->open = XML_TRUE;
+ context = getContext(parser);
+ entity->open = XML_FALSE;
+ if (!context)
+ return XML_ERROR_NO_MEMORY;
+ if (!externalEntityRefHandler(externalEntityRefHandlerArg,
+ context,
+ entity->base,
+ entity->systemId,
+ entity->publicId))
+ return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
+ poolDiscard(&tempPool);
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ break;
+ }
+ case XML_TOK_START_TAG_NO_ATTS:
+ /* fall through */
+ case XML_TOK_START_TAG_WITH_ATTS:
+ {
+ TAG *tag;
+ enum XML_Error result;
+ XML_Char *toPtr;
+ if (freeTagList) {
+ tag = freeTagList;
+ freeTagList = freeTagList->parent;
+ }
+ else {
+ tag = (TAG *)MALLOC(sizeof(TAG));
+ if (!tag)
+ return XML_ERROR_NO_MEMORY;
+ tag->buf = (char *)MALLOC(INIT_TAG_BUF_SIZE);
+ if (!tag->buf) {
+ FREE(tag);
+ return XML_ERROR_NO_MEMORY;
+ }
+ tag->bufEnd = tag->buf + INIT_TAG_BUF_SIZE;
+ }
+ tag->bindings = NULL;
+ tag->parent = tagStack;
+ tagStack = tag;
+ tag->name.localPart = NULL;
+ tag->name.prefix = NULL;
+ tag->rawName = s + enc->minBytesPerChar;
+ tag->rawNameLength = XmlNameLength(enc, tag->rawName);
+ ++tagLevel;
+ {
+ const char *rawNameEnd = tag->rawName + tag->rawNameLength;
+ const char *fromPtr = tag->rawName;
+ toPtr = (XML_Char *)tag->buf;
+ for (;;) {
+ int bufSize;
+ int convLen;
+ XmlConvert(enc,
+ &fromPtr, rawNameEnd,
+ (ICHAR **)&toPtr, (ICHAR *)tag->bufEnd - 1);
+ convLen = (int)(toPtr - (XML_Char *)tag->buf);
+ if (fromPtr == rawNameEnd) {
+ tag->name.strLen = convLen;
+ break;
+ }
+ bufSize = (int)(tag->bufEnd - tag->buf) << 1;
+ {
+ char *temp = (char *)REALLOC(tag->buf, bufSize);
+ if (temp == NULL)
+ return XML_ERROR_NO_MEMORY;
+ tag->buf = temp;
+ tag->bufEnd = temp + bufSize;
+ toPtr = (XML_Char *)temp + convLen;
+ }
+ }
+ }
+ tag->name.str = (XML_Char *)tag->buf;
+ *toPtr = XML_T('\0');
+ result = storeAtts(parser, enc, s, &(tag->name), &(tag->bindings));
+ if (result)
+ return result;
+ if (startElementHandler)
+ startElementHandler(handlerArg, tag->name.str,
+ (const XML_Char **)atts);
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ poolClear(&tempPool);
+ break;
+ }
+ case XML_TOK_EMPTY_ELEMENT_NO_ATTS:
+ /* fall through */
+ case XML_TOK_EMPTY_ELEMENT_WITH_ATTS:
+ {
+ const char *rawName = s + enc->minBytesPerChar;
+ enum XML_Error result;
+ BINDING *bindings = NULL;
+ XML_Bool noElmHandlers = XML_TRUE;
+ TAG_NAME name;
+ name.str = poolStoreString(&tempPool, enc, rawName,
+ rawName + XmlNameLength(enc, rawName));
+ if (!name.str)
+ return XML_ERROR_NO_MEMORY;
+ poolFinish(&tempPool);
+ result = storeAtts(parser, enc, s, &name, &bindings);
+ if (result)
+ return result;
+ poolFinish(&tempPool);
+ if (startElementHandler) {
+ startElementHandler(handlerArg, name.str, (const XML_Char **)atts);
+ noElmHandlers = XML_FALSE;
+ }
+ if (endElementHandler) {
+ if (startElementHandler)
+ *eventPP = *eventEndPP;
+ endElementHandler(handlerArg, name.str);
+ noElmHandlers = XML_FALSE;
+ }
+ if (noElmHandlers && defaultHandler)
+ reportDefault(parser, enc, s, next);
+ poolClear(&tempPool);
+ while (bindings) {
+ BINDING *b = bindings;
+ if (endNamespaceDeclHandler)
+ endNamespaceDeclHandler(handlerArg, b->prefix->name);
+ bindings = bindings->nextTagBinding;
+ b->nextTagBinding = freeBindingList;
+ freeBindingList = b;
+ b->prefix->binding = b->prevPrefixBinding;
+ }
+ }
+ if (tagLevel == 0)
+ return epilogProcessor(parser, next, end, nextPtr);
+ break;
+ case XML_TOK_END_TAG:
+ if (tagLevel == startTagLevel)
+ return XML_ERROR_ASYNC_ENTITY;
+ else {
+ int len;
+ const char *rawName;
+ TAG *tag = tagStack;
+ tagStack = tag->parent;
+ tag->parent = freeTagList;
+ freeTagList = tag;
+ rawName = s + enc->minBytesPerChar*2;
+ len = XmlNameLength(enc, rawName);
+ if (len != tag->rawNameLength
+ || memcmp(tag->rawName, rawName, len) != 0) {
+ *eventPP = rawName;
+ return XML_ERROR_TAG_MISMATCH;
+ }
+ --tagLevel;
+ if (endElementHandler) {
+ const XML_Char *localPart;
+ const XML_Char *prefix;
+ XML_Char *uri;
+ localPart = tag->name.localPart;
+ if (ns && localPart) {
+ /* localPart and prefix may have been overwritten in
+ tag->name.str, since this points to the binding->uri
+ buffer which gets re-used; so we have to add them again
+ */
+ uri = (XML_Char *)tag->name.str + tag->name.uriLen;
+ /* don't need to check for space - already done in storeAtts() */
+ while (*localPart) *uri++ = *localPart++;
+ prefix = (XML_Char *)tag->name.prefix;
+ if (ns_triplets && prefix) {
+ *uri++ = namespaceSeparator;
+ while (*prefix) *uri++ = *prefix++;
+ }
+ *uri = XML_T('\0');
+ }
+ endElementHandler(handlerArg, tag->name.str);
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ while (tag->bindings) {
+ BINDING *b = tag->bindings;
+ if (endNamespaceDeclHandler)
+ endNamespaceDeclHandler(handlerArg, b->prefix->name);
+ tag->bindings = tag->bindings->nextTagBinding;
+ b->nextTagBinding = freeBindingList;
+ freeBindingList = b;
+ b->prefix->binding = b->prevPrefixBinding;
+ }
+ if (tagLevel == 0)
+ return epilogProcessor(parser, next, end, nextPtr);
+ }
+ break;
+ case XML_TOK_CHAR_REF:
+ {
+ int n = XmlCharRefNumber(enc, s);
+ if (n < 0)
+ return XML_ERROR_BAD_CHAR_REF;
+ if (characterDataHandler) {
+ XML_Char buf[XML_ENCODE_MAX];
+ characterDataHandler(handlerArg, buf, XmlEncode(n, (ICHAR *)buf));
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ }
+ break;
+ case XML_TOK_XML_DECL:
+ return XML_ERROR_MISPLACED_XML_PI;
+ case XML_TOK_DATA_NEWLINE:
+ if (characterDataHandler) {
+ XML_Char c = 0xA;
+ characterDataHandler(handlerArg, &c, 1);
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ break;
+ case XML_TOK_CDATA_SECT_OPEN:
+ {
+ enum XML_Error result;
+ if (startCdataSectionHandler)
+ startCdataSectionHandler(handlerArg);
#if 0
- /* Suppose you doing a transformation on a document that involves
- changing only the character data. You set up a defaultHandler
- and a characterDataHandler. The defaultHandler simply copies
- characters through. The characterDataHandler does the
- transformation and writes the characters out escaping them as
- necessary. This case will fail to work if we leave out the
- following two lines (because & and < inside CDATA sections will
- be incorrectly escaped).
-
- However, now we have a start/endCdataSectionHandler, so it seems
- easier to let the user deal with this.
- */
- else if (characterDataHandler)
- characterDataHandler(handlerArg, dataBuf, 0);
+ /* Suppose you doing a transformation on a document that involves
+ changing only the character data. You set up a defaultHandler
+ and a characterDataHandler. The defaultHandler simply copies
+ characters through. The characterDataHandler does the
+ transformation and writes the characters out escaping them as
+ necessary. This case will fail to work if we leave out the
+ following two lines (because & and < inside CDATA sections will
+ be incorrectly escaped).
+
+ However, now we have a start/endCdataSectionHandler, so it seems
+ easier to let the user deal with this.
+ */
+ else if (characterDataHandler)
+ characterDataHandler(handlerArg, dataBuf, 0);
#endif
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- result = doCdataSection(parser, enc, &next, end, nextPtr, haveMore);
- if (result != XML_ERROR_NONE)
- return result;
- else if (!next) {
- processor = cdataSectionProcessor;
- return result;
- }
- }
- break;
- case XML_TOK_TRAILING_RSQB:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- if (characterDataHandler) {
- if (MUST_CONVERT(enc, s)) {
- ICHAR *dataPtr = (ICHAR *)dataBuf;
- XmlConvert(enc, &s, end, &dataPtr, (ICHAR *)dataBufEnd);
- characterDataHandler(handlerArg, dataBuf,
- (int)(dataPtr - (ICHAR *)dataBuf));
- }
- else
- characterDataHandler(handlerArg,
- (XML_Char *)s,
- (int)((XML_Char *)end - (XML_Char *)s));
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, end);
- /* We are at the end of the final buffer, should we check for
- XML_SUSPENDED, XML_FINISHED?
- */
- if (startTagLevel == 0) {
- *eventPP = end;
- return XML_ERROR_NO_ELEMENTS;
- }
- if (tagLevel != startTagLevel) {
- *eventPP = end;
- return XML_ERROR_ASYNC_ENTITY;
- }
- *nextPtr = end;
- return XML_ERROR_NONE;
- case XML_TOK_DATA_CHARS:
- {
- XML_CharacterDataHandler charDataHandler = characterDataHandler;
- if (charDataHandler) {
- if (MUST_CONVERT(enc, s)) {
- for (;;) {
- ICHAR *dataPtr = (ICHAR *)dataBuf;
- XmlConvert(enc, &s, next, &dataPtr, (ICHAR *)dataBufEnd);
- *eventEndPP = s;
- charDataHandler(handlerArg, dataBuf,
- (int)(dataPtr - (ICHAR *)dataBuf));
- if (s == next)
- break;
- *eventPP = s;
- }
- }
- else
- charDataHandler(handlerArg,
- (XML_Char *)s,
- (int)((XML_Char *)next - (XML_Char *)s));
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- }
- break;
- case XML_TOK_PI:
- if (!reportProcessingInstruction(parser, enc, s, next))
- return XML_ERROR_NO_MEMORY;
- break;
- case XML_TOK_COMMENT:
- if (!reportComment(parser, enc, s, next))
- return XML_ERROR_NO_MEMORY;
- break;
- default:
- if (defaultHandler)
- reportDefault(parser, enc, s, next);
- break;
- }
- *eventPP = s = next;
- switch (ps_parsing) {
- case XML_SUSPENDED:
- *nextPtr = next;
- return XML_ERROR_NONE;
- case XML_FINISHED:
- return XML_ERROR_ABORTED;
- default: ;
- }
- }
- /* not reached */
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ result = doCdataSection(parser, enc, &next, end, nextPtr, haveMore);
+ if (result != XML_ERROR_NONE)
+ return result;
+ else if (!next) {
+ processor = cdataSectionProcessor;
+ return result;
+ }
+ }
+ break;
+ case XML_TOK_TRAILING_RSQB:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ if (characterDataHandler) {
+ if (MUST_CONVERT(enc, s)) {
+ ICHAR *dataPtr = (ICHAR *)dataBuf;
+ XmlConvert(enc, &s, end, &dataPtr, (ICHAR *)dataBufEnd);
+ characterDataHandler(handlerArg, dataBuf,
+ (int)(dataPtr - (ICHAR *)dataBuf));
+ }
+ else
+ characterDataHandler(handlerArg,
+ (XML_Char *)s,
+ (int)((XML_Char *)end - (XML_Char *)s));
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, end);
+ /* We are at the end of the final buffer, should we check for
+ XML_SUSPENDED, XML_FINISHED?
+ */
+ if (startTagLevel == 0) {
+ *eventPP = end;
+ return XML_ERROR_NO_ELEMENTS;
+ }
+ if (tagLevel != startTagLevel) {
+ *eventPP = end;
+ return XML_ERROR_ASYNC_ENTITY;
+ }
+ *nextPtr = end;
+ return XML_ERROR_NONE;
+ case XML_TOK_DATA_CHARS:
+ {
+ XML_CharacterDataHandler charDataHandler = characterDataHandler;
+ if (charDataHandler) {
+ if (MUST_CONVERT(enc, s)) {
+ for (;;) {
+ ICHAR *dataPtr = (ICHAR *)dataBuf;
+ XmlConvert(enc, &s, next, &dataPtr, (ICHAR *)dataBufEnd);
+ *eventEndPP = s;
+ charDataHandler(handlerArg, dataBuf,
+ (int)(dataPtr - (ICHAR *)dataBuf));
+ if (s == next)
+ break;
+ *eventPP = s;
+ }
+ }
+ else
+ charDataHandler(handlerArg,
+ (XML_Char *)s,
+ (int)((XML_Char *)next - (XML_Char *)s));
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ }
+ break;
+ case XML_TOK_PI:
+ if (!reportProcessingInstruction(parser, enc, s, next))
+ return XML_ERROR_NO_MEMORY;
+ break;
+ case XML_TOK_COMMENT:
+ if (!reportComment(parser, enc, s, next))
+ return XML_ERROR_NO_MEMORY;
+ break;
+ default:
+ if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ break;
+ }
+ *eventPP = s = next;
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ *nextPtr = next;
+ return XML_ERROR_NONE;
+ case XML_FINISHED:
+ return XML_ERROR_ABORTED;
+ default: ;
+ }
+ }
+ /* not reached */
}
/* Precondition: all arguments must be non-NULL;
@@ -2686,351 +2686,351 @@ doContent(XML_Parser parser,
*/
static enum XML_Error
storeAtts(XML_Parser parser, const ENCODING *enc,
- const char *attStr, TAG_NAME *tagNamePtr,
- BINDING **bindingsPtr)
-{
- DTD * const dtd = _dtd; /* save one level of indirection */
- ELEMENT_TYPE *elementType;
- int nDefaultAtts;
- const XML_Char **appAtts; /* the attribute list for the application */
- int attIndex = 0;
- int prefixLen;
- int i;
- int n;
- XML_Char *uri;
- int nPrefixes = 0;
- BINDING *binding;
- const XML_Char *localPart;
-
- /* lookup the element type name */
- elementType = (ELEMENT_TYPE *)lookup(parser, &dtd->elementTypes, tagNamePtr->str,0);
- if (!elementType) {
- const XML_Char *name = poolCopyString(&dtd->pool, tagNamePtr->str);
- if (!name)
- return XML_ERROR_NO_MEMORY;
- elementType = (ELEMENT_TYPE *)lookup(parser, &dtd->elementTypes, name,
- sizeof(ELEMENT_TYPE));
- if (!elementType)
- return XML_ERROR_NO_MEMORY;
- if (ns && !setElementTypePrefix(parser, elementType))
- return XML_ERROR_NO_MEMORY;
- }
- nDefaultAtts = elementType->nDefaultAtts;
-
- /* get the attributes from the tokenizer */
- n = XmlGetAttributes(enc, attStr, attsSize, atts);
- if (n + nDefaultAtts > attsSize) {
- int oldAttsSize = attsSize;
- ATTRIBUTE *temp;
+ const char *attStr, TAG_NAME *tagNamePtr,
+ BINDING **bindingsPtr)
+{
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ ELEMENT_TYPE *elementType;
+ int nDefaultAtts;
+ const XML_Char **appAtts; /* the attribute list for the application */
+ int attIndex = 0;
+ int prefixLen;
+ int i;
+ int n;
+ XML_Char *uri;
+ int nPrefixes = 0;
+ BINDING *binding;
+ const XML_Char *localPart;
+
+ /* lookup the element type name */
+ elementType = (ELEMENT_TYPE *)lookup(parser, &dtd->elementTypes, tagNamePtr->str,0);
+ if (!elementType) {
+ const XML_Char *name = poolCopyString(&dtd->pool, tagNamePtr->str);
+ if (!name)
+ return XML_ERROR_NO_MEMORY;
+ elementType = (ELEMENT_TYPE *)lookup(parser, &dtd->elementTypes, name,
+ sizeof(ELEMENT_TYPE));
+ if (!elementType)
+ return XML_ERROR_NO_MEMORY;
+ if (ns && !setElementTypePrefix(parser, elementType))
+ return XML_ERROR_NO_MEMORY;
+ }
+ nDefaultAtts = elementType->nDefaultAtts;
+
+ /* get the attributes from the tokenizer */
+ n = XmlGetAttributes(enc, attStr, attsSize, atts);
+ if (n + nDefaultAtts > attsSize) {
+ int oldAttsSize = attsSize;
+ ATTRIBUTE *temp;
#ifdef XML_ATTR_INFO
- XML_AttrInfo *temp2;
+ XML_AttrInfo *temp2;
#endif
- attsSize = n + nDefaultAtts + INIT_ATTS_SIZE;
- temp = (ATTRIBUTE *)REALLOC((void *)atts, attsSize * sizeof(ATTRIBUTE));
- if (temp == NULL)
- return XML_ERROR_NO_MEMORY;
- atts = temp;
+ attsSize = n + nDefaultAtts + INIT_ATTS_SIZE;
+ temp = (ATTRIBUTE *)REALLOC((void *)atts, attsSize * sizeof(ATTRIBUTE));
+ if (temp == NULL)
+ return XML_ERROR_NO_MEMORY;
+ atts = temp;
#ifdef XML_ATTR_INFO
- temp2 = (XML_AttrInfo *)REALLOC((void *)attInfo, attsSize * sizeof(XML_AttrInfo));
- if (temp2 == NULL)
- return XML_ERROR_NO_MEMORY;
- attInfo = temp2;
+ temp2 = (XML_AttrInfo *)REALLOC((void *)attInfo, attsSize * sizeof(XML_AttrInfo));
+ if (temp2 == NULL)
+ return XML_ERROR_NO_MEMORY;
+ attInfo = temp2;
#endif
- if (n > oldAttsSize)
- XmlGetAttributes(enc, attStr, n, atts);
- }
+ if (n > oldAttsSize)
+ XmlGetAttributes(enc, attStr, n, atts);
+ }
- appAtts = (const XML_Char **)atts;
- for (i = 0; i < n; i++) {
- ATTRIBUTE *currAtt = &atts[i];
+ appAtts = (const XML_Char **)atts;
+ for (i = 0; i < n; i++) {
+ ATTRIBUTE *currAtt = &atts[i];
#ifdef XML_ATTR_INFO
- XML_AttrInfo *currAttInfo = &attInfo[i];
+ XML_AttrInfo *currAttInfo = &attInfo[i];
#endif
- /* add the name and value to the attribute list */
- ATTRIBUTE_ID *attId = getAttributeId(parser, enc, currAtt->name,
- currAtt->name
- + XmlNameLength(enc, currAtt->name));
- if (!attId)
- return XML_ERROR_NO_MEMORY;
+ /* add the name and value to the attribute list */
+ ATTRIBUTE_ID *attId = getAttributeId(parser, enc, currAtt->name,
+ currAtt->name
+ + XmlNameLength(enc, currAtt->name));
+ if (!attId)
+ return XML_ERROR_NO_MEMORY;
#ifdef XML_ATTR_INFO
- currAttInfo->nameStart = parseEndByteIndex - (parseEndPtr - currAtt->name);
- currAttInfo->nameEnd = currAttInfo->nameStart +
- XmlNameLength(enc, currAtt->name);
- currAttInfo->valueStart = parseEndByteIndex -
- (parseEndPtr - currAtt->valuePtr);
- currAttInfo->valueEnd = parseEndByteIndex - (parseEndPtr - currAtt->valueEnd);
+ currAttInfo->nameStart = parseEndByteIndex - (parseEndPtr - currAtt->name);
+ currAttInfo->nameEnd = currAttInfo->nameStart +
+ XmlNameLength(enc, currAtt->name);
+ currAttInfo->valueStart = parseEndByteIndex -
+ (parseEndPtr - currAtt->valuePtr);
+ currAttInfo->valueEnd = parseEndByteIndex - (parseEndPtr - currAtt->valueEnd);
#endif
- /* Detect duplicate attributes by their QNames. This does not work when
- namespace processing is turned on and different prefixes for the same
- namespace are used. For this case we have a check further down.
- */
- if ((attId->name)[-1]) {
- if (enc == encoding)
- eventPtr = atts[i].name;
- return XML_ERROR_DUPLICATE_ATTRIBUTE;
- }
- (attId->name)[-1] = 1;
- appAtts[attIndex++] = attId->name;
- if (!atts[i].normalized) {
- enum XML_Error result;
- XML_Bool isCdata = XML_TRUE;
-
- /* figure out whether declared as other than CDATA */
- if (attId->maybeTokenized) {
- int j;
- for (j = 0; j < nDefaultAtts; j++) {
- if (attId == elementType->defaultAtts[j].id) {
- isCdata = elementType->defaultAtts[j].isCdata;
- break;
- }
- }
- }
-
- /* normalize the attribute value */
- result = storeAttributeValue(parser, enc, isCdata,
- atts[i].valuePtr, atts[i].valueEnd,
- &tempPool);
- if (result)
- return result;
- appAtts[attIndex] = poolStart(&tempPool);
- poolFinish(&tempPool);
- }
- else {
- /* the value did not need normalizing */
- appAtts[attIndex] = poolStoreString(&tempPool, enc, atts[i].valuePtr,
- atts[i].valueEnd);
- if (appAtts[attIndex] == 0)
- return XML_ERROR_NO_MEMORY;
- poolFinish(&tempPool);
- }
- /* handle prefixed attribute names */
- if (attId->prefix) {
- if (attId->xmlns) {
- /* deal with namespace declarations here */
- enum XML_Error result = addBinding(parser, attId->prefix, attId,
- appAtts[attIndex], bindingsPtr);
- if (result)
- return result;
- --attIndex;
- }
- else {
- /* deal with other prefixed names later */
- attIndex++;
- nPrefixes++;
- (attId->name)[-1] = 2;
- }
- }
- else
- attIndex++;
- }
-
- /* set-up for XML_GetSpecifiedAttributeCount and XML_GetIdAttributeIndex */
- nSpecifiedAtts = attIndex;
- if (elementType->idAtt && (elementType->idAtt->name)[-1]) {
- for (i = 0; i < attIndex; i += 2)
- if (appAtts[i] == elementType->idAtt->name) {
- idAttIndex = i;
- break;
- }
- }
- else
- idAttIndex = -1;
-
- /* do attribute defaulting */
- for (i = 0; i < nDefaultAtts; i++) {
- const DEFAULT_ATTRIBUTE *da = elementType->defaultAtts + i;
- if (!(da->id->name)[-1] && da->value) {
- if (da->id->prefix) {
- if (da->id->xmlns) {
- enum XML_Error result = addBinding(parser, da->id->prefix, da->id,
- da->value, bindingsPtr);
- if (result)
- return result;
- }
- else {
- (da->id->name)[-1] = 2;
- nPrefixes++;
- appAtts[attIndex++] = da->id->name;
- appAtts[attIndex++] = da->value;
- }
- }
- else {
- (da->id->name)[-1] = 1;
- appAtts[attIndex++] = da->id->name;
- appAtts[attIndex++] = da->value;
- }
- }
- }
- appAtts[attIndex] = 0;
-
- /* expand prefixed attribute names, check for duplicates,
- and clear flags that say whether attributes were specified */
- i = 0;
- if (nPrefixes) {
- int j; /* hash table index */
- unsigned long version = nsAttsVersion;
- int nsAttsSize = (int)1 << nsAttsPower;
- /* size of hash table must be at least 2 * (# of prefixed attributes) */
- if ((nPrefixes << 1) >> nsAttsPower) { /* true for nsAttsPower = 0 */
- NS_ATT *temp;
- /* hash table size must also be a power of 2 and >= 8 */
- while (nPrefixes >> nsAttsPower++);
- if (nsAttsPower < 3)
- nsAttsPower = 3;
- nsAttsSize = (int)1 << nsAttsPower;
- temp = (NS_ATT *)REALLOC(nsAtts, nsAttsSize * sizeof(NS_ATT));
- if (!temp)
- return XML_ERROR_NO_MEMORY;
- nsAtts = temp;
- version = 0; /* force re-initialization of nsAtts hash table */
- }
- /* using a version flag saves us from initializing nsAtts every time */
- if (!version) { /* initialize version flags when version wraps around */
- version = INIT_ATTS_VERSION;
- for (j = nsAttsSize; j != 0; )
- nsAtts[--j].version = version;
- }
- nsAttsVersion = --version;
-
- /* expand prefixed names and check for duplicates */
- for (; i < attIndex; i += 2) {
- const XML_Char *s = appAtts[i];
- if (s[-1] == 2) { /* prefixed */
- ATTRIBUTE_ID *id;
- const BINDING *b;
- unsigned long uriHash = hash_secret_salt;
- ((XML_Char *)s)[-1] = 0; /* clear flag */
- id = (ATTRIBUTE_ID *)lookup(parser, &dtd->attributeIds, s, 0);
- b = id->prefix->binding;
- if (!b)
- return XML_ERROR_UNBOUND_PREFIX;
-
- /* as we expand the name we also calculate its hash value */
- for (j = 0; j < b->uriLen; j++) {
- const XML_Char c = b->uri[j];
- if (!poolAppendChar(&tempPool, c))
- return XML_ERROR_NO_MEMORY;
- uriHash = CHAR_HASH(uriHash, c);
- }
- while (*s++ != XML_T(ASCII_COLON))
- ;
- do { /* copies null terminator */
- const XML_Char c = *s;
- if (!poolAppendChar(&tempPool, *s))
- return XML_ERROR_NO_MEMORY;
- uriHash = CHAR_HASH(uriHash, c);
- } while (*s++);
-
- { /* Check hash table for duplicate of expanded name (uriName).
+ /* Detect duplicate attributes by their QNames. This does not work when
+ namespace processing is turned on and different prefixes for the same
+ namespace are used. For this case we have a check further down.
+ */
+ if ((attId->name)[-1]) {
+ if (enc == encoding)
+ eventPtr = atts[i].name;
+ return XML_ERROR_DUPLICATE_ATTRIBUTE;
+ }
+ (attId->name)[-1] = 1;
+ appAtts[attIndex++] = attId->name;
+ if (!atts[i].normalized) {
+ enum XML_Error result;
+ XML_Bool isCdata = XML_TRUE;
+
+ /* figure out whether declared as other than CDATA */
+ if (attId->maybeTokenized) {
+ int j;
+ for (j = 0; j < nDefaultAtts; j++) {
+ if (attId == elementType->defaultAtts[j].id) {
+ isCdata = elementType->defaultAtts[j].isCdata;
+ break;
+ }
+ }
+ }
+
+ /* normalize the attribute value */
+ result = storeAttributeValue(parser, enc, isCdata,
+ atts[i].valuePtr, atts[i].valueEnd,
+ &tempPool);
+ if (result)
+ return result;
+ appAtts[attIndex] = poolStart(&tempPool);
+ poolFinish(&tempPool);
+ }
+ else {
+ /* the value did not need normalizing */
+ appAtts[attIndex] = poolStoreString(&tempPool, enc, atts[i].valuePtr,
+ atts[i].valueEnd);
+ if (appAtts[attIndex] == 0)
+ return XML_ERROR_NO_MEMORY;
+ poolFinish(&tempPool);
+ }
+ /* handle prefixed attribute names */
+ if (attId->prefix) {
+ if (attId->xmlns) {
+ /* deal with namespace declarations here */
+ enum XML_Error result = addBinding(parser, attId->prefix, attId,
+ appAtts[attIndex], bindingsPtr);
+ if (result)
+ return result;
+ --attIndex;
+ }
+ else {
+ /* deal with other prefixed names later */
+ attIndex++;
+ nPrefixes++;
+ (attId->name)[-1] = 2;
+ }
+ }
+ else
+ attIndex++;
+ }
+
+ /* set-up for XML_GetSpecifiedAttributeCount and XML_GetIdAttributeIndex */
+ nSpecifiedAtts = attIndex;
+ if (elementType->idAtt && (elementType->idAtt->name)[-1]) {
+ for (i = 0; i < attIndex; i += 2)
+ if (appAtts[i] == elementType->idAtt->name) {
+ idAttIndex = i;
+ break;
+ }
+ }
+ else
+ idAttIndex = -1;
+
+ /* do attribute defaulting */
+ for (i = 0; i < nDefaultAtts; i++) {
+ const DEFAULT_ATTRIBUTE *da = elementType->defaultAtts + i;
+ if (!(da->id->name)[-1] && da->value) {
+ if (da->id->prefix) {
+ if (da->id->xmlns) {
+ enum XML_Error result = addBinding(parser, da->id->prefix, da->id,
+ da->value, bindingsPtr);
+ if (result)
+ return result;
+ }
+ else {
+ (da->id->name)[-1] = 2;
+ nPrefixes++;
+ appAtts[attIndex++] = da->id->name;
+ appAtts[attIndex++] = da->value;
+ }
+ }
+ else {
+ (da->id->name)[-1] = 1;
+ appAtts[attIndex++] = da->id->name;
+ appAtts[attIndex++] = da->value;
+ }
+ }
+ }
+ appAtts[attIndex] = 0;
+
+ /* expand prefixed attribute names, check for duplicates,
+ and clear flags that say whether attributes were specified */
+ i = 0;
+ if (nPrefixes) {
+ int j; /* hash table index */
+ unsigned long version = nsAttsVersion;
+ int nsAttsSize = (int)1 << nsAttsPower;
+ /* size of hash table must be at least 2 * (# of prefixed attributes) */
+ if ((nPrefixes << 1) >> nsAttsPower) { /* true for nsAttsPower = 0 */
+ NS_ATT *temp;
+ /* hash table size must also be a power of 2 and >= 8 */
+ while (nPrefixes >> nsAttsPower++);
+ if (nsAttsPower < 3)
+ nsAttsPower = 3;
+ nsAttsSize = (int)1 << nsAttsPower;
+ temp = (NS_ATT *)REALLOC(nsAtts, nsAttsSize * sizeof(NS_ATT));
+ if (!temp)
+ return XML_ERROR_NO_MEMORY;
+ nsAtts = temp;
+ version = 0; /* force re-initialization of nsAtts hash table */
+ }
+ /* using a version flag saves us from initializing nsAtts every time */
+ if (!version) { /* initialize version flags when version wraps around */
+ version = INIT_ATTS_VERSION;
+ for (j = nsAttsSize; j != 0; )
+ nsAtts[--j].version = version;
+ }
+ nsAttsVersion = --version;
+
+ /* expand prefixed names and check for duplicates */
+ for (; i < attIndex; i += 2) {
+ const XML_Char *s = appAtts[i];
+ if (s[-1] == 2) { /* prefixed */
+ ATTRIBUTE_ID *id;
+ const BINDING *b;
+ unsigned long uriHash = hash_secret_salt;
+ ((XML_Char *)s)[-1] = 0; /* clear flag */
+ id = (ATTRIBUTE_ID *)lookup(parser, &dtd->attributeIds, s, 0);
+ b = id->prefix->binding;
+ if (!b)
+ return XML_ERROR_UNBOUND_PREFIX;
+
+ /* as we expand the name we also calculate its hash value */
+ for (j = 0; j < b->uriLen; j++) {
+ const XML_Char c = b->uri[j];
+ if (!poolAppendChar(&tempPool, c))
+ return XML_ERROR_NO_MEMORY;
+ uriHash = CHAR_HASH(uriHash, c);
+ }
+ while (*s++ != XML_T(ASCII_COLON))
+ ;
+ do { /* copies null terminator */
+ const XML_Char c = *s;
+ if (!poolAppendChar(&tempPool, *s))
+ return XML_ERROR_NO_MEMORY;
+ uriHash = CHAR_HASH(uriHash, c);
+ } while (*s++);
+
+ { /* Check hash table for duplicate of expanded name (uriName).
Derived from code in lookup(parser, HASH_TABLE *table, ...).
*/
- unsigned char step = 0;
- unsigned long mask = nsAttsSize - 1;
- j = uriHash & mask; /* index into hash table */
- while (nsAtts[j].version == version) {
- /* for speed we compare stored hash values first */
- if (uriHash == nsAtts[j].hash) {
- const XML_Char *s1 = poolStart(&tempPool);
- const XML_Char *s2 = nsAtts[j].uriName;
- /* s1 is null terminated, but not s2 */
- for (; *s1 == *s2 && *s1 != 0; s1++, s2++);
- if (*s1 == 0)
- return XML_ERROR_DUPLICATE_ATTRIBUTE;
- }
- if (!step)
- step = PROBE_STEP(uriHash, mask, nsAttsPower);
- j < step ? (j += nsAttsSize - step) : (j -= step);
- }
- }
-
- if (ns_triplets) { /* append namespace separator and prefix */
- tempPool.ptr[-1] = namespaceSeparator;
- s = b->prefix->name;
- do {
- if (!poolAppendChar(&tempPool, *s))
- return XML_ERROR_NO_MEMORY;
- } while (*s++);
- }
-
- /* store expanded name in attribute list */
- s = poolStart(&tempPool);
- poolFinish(&tempPool);
- appAtts[i] = s;
-
- /* fill empty slot with new version, uriName and hash value */
- nsAtts[j].version = version;
- nsAtts[j].hash = uriHash;
- nsAtts[j].uriName = s;
-
- if (!--nPrefixes) {
- i += 2;
- break;
- }
- }
- else /* not prefixed */
- ((XML_Char *)s)[-1] = 0; /* clear flag */
- }
- }
- /* clear flags for the remaining attributes */
- for (; i < attIndex; i += 2)
- ((XML_Char *)(appAtts[i]))[-1] = 0;
- for (binding = *bindingsPtr; binding; binding = binding->nextTagBinding)
- binding->attId->name[-1] = 0;
-
- if (!ns)
- return XML_ERROR_NONE;
-
- /* expand the element type name */
- if (elementType->prefix) {
- binding = elementType->prefix->binding;
- if (!binding)
- return XML_ERROR_UNBOUND_PREFIX;
- localPart = tagNamePtr->str;
- while (*localPart++ != XML_T(ASCII_COLON))
- ;
- }
- else if (dtd->defaultPrefix.binding) {
- binding = dtd->defaultPrefix.binding;
- localPart = tagNamePtr->str;
- }
- else
- return XML_ERROR_NONE;
- prefixLen = 0;
- if (ns_triplets && binding->prefix->name) {
- for (; binding->prefix->name[prefixLen++];)
- ; /* prefixLen includes null terminator */
- }
- tagNamePtr->localPart = localPart;
- tagNamePtr->uriLen = binding->uriLen;
- tagNamePtr->prefix = binding->prefix->name;
- tagNamePtr->prefixLen = prefixLen;
- for (i = 0; localPart[i++];)
- ; /* i includes null terminator */
- n = i + binding->uriLen + prefixLen;
- if (n > binding->uriAlloc) {
- TAG *p;
- uri = (XML_Char *)MALLOC((n + EXPAND_SPARE) * sizeof(XML_Char));
- if (!uri)
- return XML_ERROR_NO_MEMORY;
- binding->uriAlloc = n + EXPAND_SPARE;
- memcpy(uri, binding->uri, binding->uriLen * sizeof(XML_Char));
- for (p = tagStack; p; p = p->parent)
- if (p->name.str == binding->uri)
- p->name.str = uri;
- FREE(binding->uri);
- binding->uri = uri;
- }
- /* if namespaceSeparator != '\0' then uri includes it already */
- uri = binding->uri + binding->uriLen;
- memcpy(uri, localPart, i * sizeof(XML_Char));
- /* we always have a namespace separator between localPart and prefix */
- if (prefixLen) {
- uri += i - 1;
- *uri = namespaceSeparator; /* replace null terminator */
- memcpy(uri + 1, binding->prefix->name, prefixLen * sizeof(XML_Char));
- }
- tagNamePtr->str = binding->uri;
- return XML_ERROR_NONE;
+ unsigned char step = 0;
+ unsigned long mask = nsAttsSize - 1;
+ j = uriHash & mask; /* index into hash table */
+ while (nsAtts[j].version == version) {
+ /* for speed we compare stored hash values first */
+ if (uriHash == nsAtts[j].hash) {
+ const XML_Char *s1 = poolStart(&tempPool);
+ const XML_Char *s2 = nsAtts[j].uriName;
+ /* s1 is null terminated, but not s2 */
+ for (; *s1 == *s2 && *s1 != 0; s1++, s2++);
+ if (*s1 == 0)
+ return XML_ERROR_DUPLICATE_ATTRIBUTE;
+ }
+ if (!step)
+ step = PROBE_STEP(uriHash, mask, nsAttsPower);
+ j < step ? (j += nsAttsSize - step) : (j -= step);
+ }
+ }
+
+ if (ns_triplets) { /* append namespace separator and prefix */
+ tempPool.ptr[-1] = namespaceSeparator;
+ s = b->prefix->name;
+ do {
+ if (!poolAppendChar(&tempPool, *s))
+ return XML_ERROR_NO_MEMORY;
+ } while (*s++);
+ }
+
+ /* store expanded name in attribute list */
+ s = poolStart(&tempPool);
+ poolFinish(&tempPool);
+ appAtts[i] = s;
+
+ /* fill empty slot with new version, uriName and hash value */
+ nsAtts[j].version = version;
+ nsAtts[j].hash = uriHash;
+ nsAtts[j].uriName = s;
+
+ if (!--nPrefixes) {
+ i += 2;
+ break;
+ }
+ }
+ else /* not prefixed */
+ ((XML_Char *)s)[-1] = 0; /* clear flag */
+ }
+ }
+ /* clear flags for the remaining attributes */
+ for (; i < attIndex; i += 2)
+ ((XML_Char *)(appAtts[i]))[-1] = 0;
+ for (binding = *bindingsPtr; binding; binding = binding->nextTagBinding)
+ binding->attId->name[-1] = 0;
+
+ if (!ns)
+ return XML_ERROR_NONE;
+
+ /* expand the element type name */
+ if (elementType->prefix) {
+ binding = elementType->prefix->binding;
+ if (!binding)
+ return XML_ERROR_UNBOUND_PREFIX;
+ localPart = tagNamePtr->str;
+ while (*localPart++ != XML_T(ASCII_COLON))
+ ;
+ }
+ else if (dtd->defaultPrefix.binding) {
+ binding = dtd->defaultPrefix.binding;
+ localPart = tagNamePtr->str;
+ }
+ else
+ return XML_ERROR_NONE;
+ prefixLen = 0;
+ if (ns_triplets && binding->prefix->name) {
+ for (; binding->prefix->name[prefixLen++];)
+ ; /* prefixLen includes null terminator */
+ }
+ tagNamePtr->localPart = localPart;
+ tagNamePtr->uriLen = binding->uriLen;
+ tagNamePtr->prefix = binding->prefix->name;
+ tagNamePtr->prefixLen = prefixLen;
+ for (i = 0; localPart[i++];)
+ ; /* i includes null terminator */
+ n = i + binding->uriLen + prefixLen;
+ if (n > binding->uriAlloc) {
+ TAG *p;
+ uri = (XML_Char *)MALLOC((n + EXPAND_SPARE) * sizeof(XML_Char));
+ if (!uri)
+ return XML_ERROR_NO_MEMORY;
+ binding->uriAlloc = n + EXPAND_SPARE;
+ memcpy(uri, binding->uri, binding->uriLen * sizeof(XML_Char));
+ for (p = tagStack; p; p = p->parent)
+ if (p->name.str == binding->uri)
+ p->name.str = uri;
+ FREE(binding->uri);
+ binding->uri = uri;
+ }
+ /* if namespaceSeparator != '\0' then uri includes it already */
+ uri = binding->uri + binding->uriLen;
+ memcpy(uri, localPart, i * sizeof(XML_Char));
+ /* we always have a namespace separator between localPart and prefix */
+ if (prefixLen) {
+ uri += i - 1;
+ *uri = namespaceSeparator; /* replace null terminator */
+ memcpy(uri + 1, binding->prefix->name, prefixLen * sizeof(XML_Char));
+ }
+ tagNamePtr->str = binding->uri;
+ return XML_ERROR_NONE;
}
/* addBinding() overwrites the value of prefix->binding without checking.
@@ -3038,116 +3038,116 @@ storeAtts(XML_Parser parser, const ENCODING *enc,
*/
static enum XML_Error
addBinding(XML_Parser parser, PREFIX *prefix, const ATTRIBUTE_ID *attId,
- const XML_Char *uri, BINDING **bindingsPtr)
-{
- static const XML_Char xmlNamespace[] = {
- ASCII_h, ASCII_t, ASCII_t, ASCII_p, ASCII_COLON, ASCII_SLASH, ASCII_SLASH,
- ASCII_w, ASCII_w, ASCII_w, ASCII_PERIOD, ASCII_w, ASCII_3, ASCII_PERIOD,
- ASCII_o, ASCII_r, ASCII_g, ASCII_SLASH, ASCII_X, ASCII_M, ASCII_L,
- ASCII_SLASH, ASCII_1, ASCII_9, ASCII_9, ASCII_8, ASCII_SLASH,
- ASCII_n, ASCII_a, ASCII_m, ASCII_e, ASCII_s, ASCII_p, ASCII_a, ASCII_c,
- ASCII_e, '\0'
- };
- static const int xmlLen =
- (int)sizeof(xmlNamespace)/sizeof(XML_Char) - 1;
- static const XML_Char xmlnsNamespace[] = {
- ASCII_h, ASCII_t, ASCII_t, ASCII_p, ASCII_COLON, ASCII_SLASH, ASCII_SLASH,
- ASCII_w, ASCII_w, ASCII_w, ASCII_PERIOD, ASCII_w, ASCII_3, ASCII_PERIOD,
- ASCII_o, ASCII_r, ASCII_g, ASCII_SLASH, ASCII_2, ASCII_0, ASCII_0,
- ASCII_0, ASCII_SLASH, ASCII_x, ASCII_m, ASCII_l, ASCII_n, ASCII_s,
- ASCII_SLASH, '\0'
- };
- static const int xmlnsLen =
- (int)sizeof(xmlnsNamespace)/sizeof(XML_Char) - 1;
-
- XML_Bool mustBeXML = XML_FALSE;
- XML_Bool isXML = XML_TRUE;
- XML_Bool isXMLNS = XML_TRUE;
-
- BINDING *b;
- int len;
-
- /* empty URI is only valid for default namespace per XML NS 1.0 (not 1.1) */
- if (*uri == XML_T('\0') && prefix->name)
- return XML_ERROR_UNDECLARING_PREFIX;
-
- if (prefix->name
- && prefix->name[0] == XML_T(ASCII_x)
- && prefix->name[1] == XML_T(ASCII_m)
- && prefix->name[2] == XML_T(ASCII_l)) {
-
- /* Not allowed to bind xmlns */
- if (prefix->name[3] == XML_T(ASCII_n)
- && prefix->name[4] == XML_T(ASCII_s)
- && prefix->name[5] == XML_T('\0'))
- return XML_ERROR_RESERVED_PREFIX_XMLNS;
-
- if (prefix->name[3] == XML_T('\0'))
- mustBeXML = XML_TRUE;
- }
-
- for (len = 0; uri[len]; len++) {
- if (isXML && (len > xmlLen || uri[len] != xmlNamespace[len]))
- isXML = XML_FALSE;
-
- if (!mustBeXML && isXMLNS
- && (len > xmlnsLen || uri[len] != xmlnsNamespace[len]))
- isXMLNS = XML_FALSE;
- }
- isXML = isXML && len == xmlLen;
- isXMLNS = isXMLNS && len == xmlnsLen;
-
- if (mustBeXML != isXML)
- return mustBeXML ? XML_ERROR_RESERVED_PREFIX_XML
- : XML_ERROR_RESERVED_NAMESPACE_URI;
-
- if (isXMLNS)
- return XML_ERROR_RESERVED_NAMESPACE_URI;
-
- if (namespaceSeparator)
- len++;
- if (freeBindingList) {
- b = freeBindingList;
- if (len > b->uriAlloc) {
- XML_Char *temp = (XML_Char *)REALLOC(b->uri,
- sizeof(XML_Char) * (len + EXPAND_SPARE));
- if (temp == NULL)
- return XML_ERROR_NO_MEMORY;
- b->uri = temp;
- b->uriAlloc = len + EXPAND_SPARE;
- }
- freeBindingList = b->nextTagBinding;
- }
- else {
- b = (BINDING *)MALLOC(sizeof(BINDING));
- if (!b)
- return XML_ERROR_NO_MEMORY;
- b->uri = (XML_Char *)MALLOC(sizeof(XML_Char) * (len + EXPAND_SPARE));
- if (!b->uri) {
- FREE(b);
- return XML_ERROR_NO_MEMORY;
- }
- b->uriAlloc = len + EXPAND_SPARE;
- }
- b->uriLen = len;
- memcpy(b->uri, uri, len * sizeof(XML_Char));
- if (namespaceSeparator)
- b->uri[len - 1] = namespaceSeparator;
- b->prefix = prefix;
- b->attId = attId;
- b->prevPrefixBinding = prefix->binding;
- /* NULL binding when default namespace undeclared */
- if (*uri == XML_T('\0') && prefix == &_dtd->defaultPrefix)
- prefix->binding = NULL;
- else
- prefix->binding = b;
- b->nextTagBinding = *bindingsPtr;
- *bindingsPtr = b;
- /* if attId == NULL then we are not starting a namespace scope */
- if (attId && startNamespaceDeclHandler)
- startNamespaceDeclHandler(handlerArg, prefix->name,
- prefix->binding ? uri : 0);
- return XML_ERROR_NONE;
+ const XML_Char *uri, BINDING **bindingsPtr)
+{
+ static const XML_Char xmlNamespace[] = {
+ ASCII_h, ASCII_t, ASCII_t, ASCII_p, ASCII_COLON, ASCII_SLASH, ASCII_SLASH,
+ ASCII_w, ASCII_w, ASCII_w, ASCII_PERIOD, ASCII_w, ASCII_3, ASCII_PERIOD,
+ ASCII_o, ASCII_r, ASCII_g, ASCII_SLASH, ASCII_X, ASCII_M, ASCII_L,
+ ASCII_SLASH, ASCII_1, ASCII_9, ASCII_9, ASCII_8, ASCII_SLASH,
+ ASCII_n, ASCII_a, ASCII_m, ASCII_e, ASCII_s, ASCII_p, ASCII_a, ASCII_c,
+ ASCII_e, '\0'
+ };
+ static const int xmlLen =
+ (int)sizeof(xmlNamespace)/sizeof(XML_Char) - 1;
+ static const XML_Char xmlnsNamespace[] = {
+ ASCII_h, ASCII_t, ASCII_t, ASCII_p, ASCII_COLON, ASCII_SLASH, ASCII_SLASH,
+ ASCII_w, ASCII_w, ASCII_w, ASCII_PERIOD, ASCII_w, ASCII_3, ASCII_PERIOD,
+ ASCII_o, ASCII_r, ASCII_g, ASCII_SLASH, ASCII_2, ASCII_0, ASCII_0,
+ ASCII_0, ASCII_SLASH, ASCII_x, ASCII_m, ASCII_l, ASCII_n, ASCII_s,
+ ASCII_SLASH, '\0'
+ };
+ static const int xmlnsLen =
+ (int)sizeof(xmlnsNamespace)/sizeof(XML_Char) - 1;
+
+ XML_Bool mustBeXML = XML_FALSE;
+ XML_Bool isXML = XML_TRUE;
+ XML_Bool isXMLNS = XML_TRUE;
+
+ BINDING *b;
+ int len;
+
+ /* empty URI is only valid for default namespace per XML NS 1.0 (not 1.1) */
+ if (*uri == XML_T('\0') && prefix->name)
+ return XML_ERROR_UNDECLARING_PREFIX;
+
+ if (prefix->name
+ && prefix->name[0] == XML_T(ASCII_x)
+ && prefix->name[1] == XML_T(ASCII_m)
+ && prefix->name[2] == XML_T(ASCII_l)) {
+
+ /* Not allowed to bind xmlns */
+ if (prefix->name[3] == XML_T(ASCII_n)
+ && prefix->name[4] == XML_T(ASCII_s)
+ && prefix->name[5] == XML_T('\0'))
+ return XML_ERROR_RESERVED_PREFIX_XMLNS;
+
+ if (prefix->name[3] == XML_T('\0'))
+ mustBeXML = XML_TRUE;
+ }
+
+ for (len = 0; uri[len]; len++) {
+ if (isXML && (len > xmlLen || uri[len] != xmlNamespace[len]))
+ isXML = XML_FALSE;
+
+ if (!mustBeXML && isXMLNS
+ && (len > xmlnsLen || uri[len] != xmlnsNamespace[len]))
+ isXMLNS = XML_FALSE;
+ }
+ isXML = isXML && len == xmlLen;
+ isXMLNS = isXMLNS && len == xmlnsLen;
+
+ if (mustBeXML != isXML)
+ return mustBeXML ? XML_ERROR_RESERVED_PREFIX_XML
+ : XML_ERROR_RESERVED_NAMESPACE_URI;
+
+ if (isXMLNS)
+ return XML_ERROR_RESERVED_NAMESPACE_URI;
+
+ if (namespaceSeparator)
+ len++;
+ if (freeBindingList) {
+ b = freeBindingList;
+ if (len > b->uriAlloc) {
+ XML_Char *temp = (XML_Char *)REALLOC(b->uri,
+ sizeof(XML_Char) * (len + EXPAND_SPARE));
+ if (temp == NULL)
+ return XML_ERROR_NO_MEMORY;
+ b->uri = temp;
+ b->uriAlloc = len + EXPAND_SPARE;
+ }
+ freeBindingList = b->nextTagBinding;
+ }
+ else {
+ b = (BINDING *)MALLOC(sizeof(BINDING));
+ if (!b)
+ return XML_ERROR_NO_MEMORY;
+ b->uri = (XML_Char *)MALLOC(sizeof(XML_Char) * (len + EXPAND_SPARE));
+ if (!b->uri) {
+ FREE(b);
+ return XML_ERROR_NO_MEMORY;
+ }
+ b->uriAlloc = len + EXPAND_SPARE;
+ }
+ b->uriLen = len;
+ memcpy(b->uri, uri, len * sizeof(XML_Char));
+ if (namespaceSeparator)
+ b->uri[len - 1] = namespaceSeparator;
+ b->prefix = prefix;
+ b->attId = attId;
+ b->prevPrefixBinding = prefix->binding;
+ /* NULL binding when default namespace undeclared */
+ if (*uri == XML_T('\0') && prefix == &_dtd->defaultPrefix)
+ prefix->binding = NULL;
+ else
+ prefix->binding = b;
+ b->nextTagBinding = *bindingsPtr;
+ *bindingsPtr = b;
+ /* if attId == NULL then we are not starting a namespace scope */
+ if (attId && startNamespaceDeclHandler)
+ startNamespaceDeclHandler(handlerArg, prefix->name,
+ prefix->binding ? uri : 0);
+ return XML_ERROR_NONE;
}
/* The idea here is to avoid using stack for each CDATA section when
@@ -3155,25 +3155,25 @@ addBinding(XML_Parser parser, PREFIX *prefix, const ATTRIBUTE_ID *attId,
*/
static enum XML_Error PTRCALL
cdataSectionProcessor(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr)
-{
- enum XML_Error result = doCdataSection(parser, encoding, &start, end,
- endPtr, (XML_Bool)!ps_finalBuffer);
- if (result != XML_ERROR_NONE)
- return result;
- if (start) {
- if (parentParser) { /* we are parsing an external entity */
- processor = externalEntityContentProcessor;
- return externalEntityContentProcessor(parser, start, end, endPtr);
- }
- else {
- processor = contentProcessor;
- return contentProcessor(parser, start, end, endPtr);
- }
- }
- return result;
+ const char *start,
+ const char *end,
+ const char **endPtr)
+{
+ enum XML_Error result = doCdataSection(parser, encoding, &start, end,
+ endPtr, (XML_Bool)!ps_finalBuffer);
+ if (result != XML_ERROR_NONE)
+ return result;
+ if (start) {
+ if (parentParser) { /* we are parsing an external entity */
+ processor = externalEntityContentProcessor;
+ return externalEntityContentProcessor(parser, start, end, endPtr);
+ }
+ else {
+ processor = contentProcessor;
+ return contentProcessor(parser, start, end, endPtr);
+ }
+ }
+ return result;
}
/* startPtr gets set to non-null if the section is closed, and to null if
@@ -3181,113 +3181,113 @@ cdataSectionProcessor(XML_Parser parser,
*/
static enum XML_Error
doCdataSection(XML_Parser parser,
- const ENCODING *enc,
- const char **startPtr,
- const char *end,
- const char **nextPtr,
- XML_Bool haveMore)
-{
- const char *s = *startPtr;
- const char **eventPP;
- const char **eventEndPP;
- if (enc == encoding) {
- eventPP = &eventPtr;
- *eventPP = s;
- eventEndPP = &eventEndPtr;
- }
- else {
- eventPP = &(openInternalEntities->internalEventPtr);
- eventEndPP = &(openInternalEntities->internalEventEndPtr);
- }
- *eventPP = s;
- *startPtr = NULL;
-
- for (;;) {
- const char *next;
- int tok = XmlCdataSectionTok(enc, s, end, &next);
- *eventEndPP = next;
- switch (tok) {
- case XML_TOK_CDATA_SECT_CLOSE:
- if (endCdataSectionHandler)
- endCdataSectionHandler(handlerArg);
+ const ENCODING *enc,
+ const char **startPtr,
+ const char *end,
+ const char **nextPtr,
+ XML_Bool haveMore)
+{
+ const char *s = *startPtr;
+ const char **eventPP;
+ const char **eventEndPP;
+ if (enc == encoding) {
+ eventPP = &eventPtr;
+ *eventPP = s;
+ eventEndPP = &eventEndPtr;
+ }
+ else {
+ eventPP = &(openInternalEntities->internalEventPtr);
+ eventEndPP = &(openInternalEntities->internalEventEndPtr);
+ }
+ *eventPP = s;
+ *startPtr = NULL;
+
+ for (;;) {
+ const char *next;
+ int tok = XmlCdataSectionTok(enc, s, end, &next);
+ *eventEndPP = next;
+ switch (tok) {
+ case XML_TOK_CDATA_SECT_CLOSE:
+ if (endCdataSectionHandler)
+ endCdataSectionHandler(handlerArg);
#if 0
- /* see comment under XML_TOK_CDATA_SECT_OPEN */
- else if (characterDataHandler)
- characterDataHandler(handlerArg, dataBuf, 0);
+ /* see comment under XML_TOK_CDATA_SECT_OPEN */
+ else if (characterDataHandler)
+ characterDataHandler(handlerArg, dataBuf, 0);
#endif
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- *startPtr = next;
- *nextPtr = next;
- if (ps_parsing == XML_FINISHED)
- return XML_ERROR_ABORTED;
- else
- return XML_ERROR_NONE;
- case XML_TOK_DATA_NEWLINE:
- if (characterDataHandler) {
- XML_Char c = 0xA;
- characterDataHandler(handlerArg, &c, 1);
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- break;
- case XML_TOK_DATA_CHARS:
- {
- XML_CharacterDataHandler charDataHandler = characterDataHandler;
- if (charDataHandler) {
- if (MUST_CONVERT(enc, s)) {
- for (;;) {
- ICHAR *dataPtr = (ICHAR *)dataBuf;
- XmlConvert(enc, &s, next, &dataPtr, (ICHAR *)dataBufEnd);
- *eventEndPP = next;
- charDataHandler(handlerArg, dataBuf,
- (int)(dataPtr - (ICHAR *)dataBuf));
- if (s == next)
- break;
- *eventPP = s;
- }
- }
- else
- charDataHandler(handlerArg,
- (XML_Char *)s,
- (int)((XML_Char *)next - (XML_Char *)s));
- }
- else if (defaultHandler)
- reportDefault(parser, enc, s, next);
- }
- break;
- case XML_TOK_INVALID:
- *eventPP = next;
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_PARTIAL_CHAR;
- case XML_TOK_PARTIAL:
- case XML_TOK_NONE:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_UNCLOSED_CDATA_SECTION;
- default:
- *eventPP = next;
- return XML_ERROR_UNEXPECTED_STATE;
- }
-
- *eventPP = s = next;
- switch (ps_parsing) {
- case XML_SUSPENDED:
- *nextPtr = next;
- return XML_ERROR_NONE;
- case XML_FINISHED:
- return XML_ERROR_ABORTED;
- default: ;
- }
- }
- /* not reached */
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ *startPtr = next;
+ *nextPtr = next;
+ if (ps_parsing == XML_FINISHED)
+ return XML_ERROR_ABORTED;
+ else
+ return XML_ERROR_NONE;
+ case XML_TOK_DATA_NEWLINE:
+ if (characterDataHandler) {
+ XML_Char c = 0xA;
+ characterDataHandler(handlerArg, &c, 1);
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ break;
+ case XML_TOK_DATA_CHARS:
+ {
+ XML_CharacterDataHandler charDataHandler = characterDataHandler;
+ if (charDataHandler) {
+ if (MUST_CONVERT(enc, s)) {
+ for (;;) {
+ ICHAR *dataPtr = (ICHAR *)dataBuf;
+ XmlConvert(enc, &s, next, &dataPtr, (ICHAR *)dataBufEnd);
+ *eventEndPP = next;
+ charDataHandler(handlerArg, dataBuf,
+ (int)(dataPtr - (ICHAR *)dataBuf));
+ if (s == next)
+ break;
+ *eventPP = s;
+ }
+ }
+ else
+ charDataHandler(handlerArg,
+ (XML_Char *)s,
+ (int)((XML_Char *)next - (XML_Char *)s));
+ }
+ else if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ }
+ break;
+ case XML_TOK_INVALID:
+ *eventPP = next;
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_PARTIAL_CHAR;
+ case XML_TOK_PARTIAL:
+ case XML_TOK_NONE:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_UNCLOSED_CDATA_SECTION;
+ default:
+ *eventPP = next;
+ return XML_ERROR_UNEXPECTED_STATE;
+ }
+
+ *eventPP = s = next;
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ *nextPtr = next;
+ return XML_ERROR_NONE;
+ case XML_FINISHED:
+ return XML_ERROR_ABORTED;
+ default: ;
+ }
+ }
+ /* not reached */
}
#ifdef XML_DTD
@@ -3297,19 +3297,19 @@ doCdataSection(XML_Parser parser,
*/
static enum XML_Error PTRCALL
ignoreSectionProcessor(XML_Parser parser,
- const char *start,
- const char *end,
- const char **endPtr)
+ const char *start,
+ const char *end,
+ const char **endPtr)
{
- enum XML_Error result = doIgnoreSection(parser, encoding, &start, end,
- endPtr, (XML_Bool)!ps_finalBuffer);
- if (result != XML_ERROR_NONE)
- return result;
- if (start) {
- processor = prologProcessor;
- return prologProcessor(parser, start, end, endPtr);
- }
- return result;
+ enum XML_Error result = doIgnoreSection(parser, encoding, &start, end,
+ endPtr, (XML_Bool)!ps_finalBuffer);
+ if (result != XML_ERROR_NONE)
+ return result;
+ if (start) {
+ processor = prologProcessor;
+ return prologProcessor(parser, start, end, endPtr);
+ }
+ return result;
}
/* startPtr gets set to non-null is the section is closed, and to null
@@ -3317,61 +3317,61 @@ ignoreSectionProcessor(XML_Parser parser,
*/
static enum XML_Error
doIgnoreSection(XML_Parser parser,
- const ENCODING *enc,
- const char **startPtr,
- const char *end,
- const char **nextPtr,
- XML_Bool haveMore)
-{
- const char *next;
- int tok;
- const char *s = *startPtr;
- const char **eventPP;
- const char **eventEndPP;
- if (enc == encoding) {
- eventPP = &eventPtr;
- *eventPP = s;
- eventEndPP = &eventEndPtr;
- }
- else {
- eventPP = &(openInternalEntities->internalEventPtr);
- eventEndPP = &(openInternalEntities->internalEventEndPtr);
- }
- *eventPP = s;
- *startPtr = NULL;
- tok = XmlIgnoreSectionTok(enc, s, end, &next);
- *eventEndPP = next;
- switch (tok) {
- case XML_TOK_IGNORE_SECT:
- if (defaultHandler)
- reportDefault(parser, enc, s, next);
- *startPtr = next;
- *nextPtr = next;
- if (ps_parsing == XML_FINISHED)
- return XML_ERROR_ABORTED;
- else
- return XML_ERROR_NONE;
- case XML_TOK_INVALID:
- *eventPP = next;
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_PARTIAL_CHAR;
- case XML_TOK_PARTIAL:
- case XML_TOK_NONE:
- if (haveMore) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_SYNTAX; /* XML_ERROR_UNCLOSED_IGNORE_SECTION */
- default:
- *eventPP = next;
- return XML_ERROR_UNEXPECTED_STATE;
- }
- /* not reached */
+ const ENCODING *enc,
+ const char **startPtr,
+ const char *end,
+ const char **nextPtr,
+ XML_Bool haveMore)
+{
+ const char *next;
+ int tok;
+ const char *s = *startPtr;
+ const char **eventPP;
+ const char **eventEndPP;
+ if (enc == encoding) {
+ eventPP = &eventPtr;
+ *eventPP = s;
+ eventEndPP = &eventEndPtr;
+ }
+ else {
+ eventPP = &(openInternalEntities->internalEventPtr);
+ eventEndPP = &(openInternalEntities->internalEventEndPtr);
+ }
+ *eventPP = s;
+ *startPtr = NULL;
+ tok = XmlIgnoreSectionTok(enc, s, end, &next);
+ *eventEndPP = next;
+ switch (tok) {
+ case XML_TOK_IGNORE_SECT:
+ if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ *startPtr = next;
+ *nextPtr = next;
+ if (ps_parsing == XML_FINISHED)
+ return XML_ERROR_ABORTED;
+ else
+ return XML_ERROR_NONE;
+ case XML_TOK_INVALID:
+ *eventPP = next;
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_PARTIAL_CHAR;
+ case XML_TOK_PARTIAL:
+ case XML_TOK_NONE:
+ if (haveMore) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_SYNTAX; /* XML_ERROR_UNCLOSED_IGNORE_SECTION */
+ default:
+ *eventPP = next;
+ return XML_ERROR_UNEXPECTED_STATE;
+ }
+ /* not reached */
}
#endif /* XML_DTD */
@@ -3379,2102 +3379,2102 @@ doIgnoreSection(XML_Parser parser,
static enum XML_Error
initializeEncoding(XML_Parser parser)
{
- const char *s;
+ const char *s;
#ifdef XML_UNICODE
- char encodingBuf[128];
- if (!protocolEncodingName)
- s = NULL;
- else {
- int i;
- for (i = 0; protocolEncodingName[i]; i++) {
- if (i == sizeof(encodingBuf) - 1
- || (protocolEncodingName[i] & ~0x7f) != 0) {
- encodingBuf[0] = '\0';
- break;
- }
- encodingBuf[i] = (char)protocolEncodingName[i];
- }
- encodingBuf[i] = '\0';
- s = encodingBuf;
- }
+ char encodingBuf[128];
+ if (!protocolEncodingName)
+ s = NULL;
+ else {
+ int i;
+ for (i = 0; protocolEncodingName[i]; i++) {
+ if (i == sizeof(encodingBuf) - 1
+ || (protocolEncodingName[i] & ~0x7f) != 0) {
+ encodingBuf[0] = '\0';
+ break;
+ }
+ encodingBuf[i] = (char)protocolEncodingName[i];
+ }
+ encodingBuf[i] = '\0';
+ s = encodingBuf;
+ }
#else
- s = protocolEncodingName;
+ s = protocolEncodingName;
#endif
- if ((ns ? XmlInitEncodingNS : XmlInitEncoding)(&initEncoding, &encoding, s))
- return XML_ERROR_NONE;
- return handleUnknownEncoding(parser, protocolEncodingName);
+ if ((ns ? XmlInitEncodingNS : XmlInitEncoding)(&initEncoding, &encoding, s))
+ return XML_ERROR_NONE;
+ return handleUnknownEncoding(parser, protocolEncodingName);
}
static enum XML_Error
processXmlDecl(XML_Parser parser, int isGeneralTextEntity,
- const char *s, const char *next)
-{
- const char *encodingName = NULL;
- const XML_Char *storedEncName = NULL;
- const ENCODING *newEncoding = NULL;
- const char *version = NULL;
- const char *versionend;
- const XML_Char *storedversion = NULL;
- int standalone = -1;
- if (!(ns
- ? XmlParseXmlDeclNS
- : XmlParseXmlDecl)(isGeneralTextEntity,
- encoding,
- s,
- next,
- &eventPtr,
- &version,
- &versionend,
- &encodingName,
- &newEncoding,
- &standalone)) {
- if (isGeneralTextEntity)
- return XML_ERROR_TEXT_DECL;
- else
- return XML_ERROR_XML_DECL;
- }
- if (!isGeneralTextEntity && standalone == 1) {
- _dtd->standalone = XML_TRUE;
+ const char *s, const char *next)
+{
+ const char *encodingName = NULL;
+ const XML_Char *storedEncName = NULL;
+ const ENCODING *newEncoding = NULL;
+ const char *version = NULL;
+ const char *versionend;
+ const XML_Char *storedversion = NULL;
+ int standalone = -1;
+ if (!(ns
+ ? XmlParseXmlDeclNS
+ : XmlParseXmlDecl)(isGeneralTextEntity,
+ encoding,
+ s,
+ next,
+ &eventPtr,
+ &version,
+ &versionend,
+ &encodingName,
+ &newEncoding,
+ &standalone)) {
+ if (isGeneralTextEntity)
+ return XML_ERROR_TEXT_DECL;
+ else
+ return XML_ERROR_XML_DECL;
+ }
+ if (!isGeneralTextEntity && standalone == 1) {
+ _dtd->standalone = XML_TRUE;
#ifdef XML_DTD
- if (paramEntityParsing == XML_PARAM_ENTITY_PARSING_UNLESS_STANDALONE)
- paramEntityParsing = XML_PARAM_ENTITY_PARSING_NEVER;
+ if (paramEntityParsing == XML_PARAM_ENTITY_PARSING_UNLESS_STANDALONE)
+ paramEntityParsing = XML_PARAM_ENTITY_PARSING_NEVER;
#endif /* XML_DTD */
- }
- if (xmlDeclHandler) {
- if (encodingName != NULL) {
- storedEncName = poolStoreString(&temp2Pool,
- encoding,
- encodingName,
- encodingName
- + XmlNameLength(encoding, encodingName));
- if (!storedEncName)
- return XML_ERROR_NO_MEMORY;
- poolFinish(&temp2Pool);
- }
- if (version) {
- storedversion = poolStoreString(&temp2Pool,
- encoding,
- version,
- versionend - encoding->minBytesPerChar);
- if (!storedversion)
- return XML_ERROR_NO_MEMORY;
- }
- xmlDeclHandler(handlerArg, storedversion, storedEncName, standalone);
- }
- else if (defaultHandler)
- reportDefault(parser, encoding, s, next);
- if (protocolEncodingName == NULL) {
- if (newEncoding) {
- if (newEncoding->minBytesPerChar != encoding->minBytesPerChar) {
- eventPtr = encodingName;
- return XML_ERROR_INCORRECT_ENCODING;
- }
- encoding = newEncoding;
- }
- else if (encodingName) {
- enum XML_Error result;
- if (!storedEncName) {
- storedEncName = poolStoreString(
- &temp2Pool, encoding, encodingName,
- encodingName + XmlNameLength(encoding, encodingName));
- if (!storedEncName)
- return XML_ERROR_NO_MEMORY;
- }
- result = handleUnknownEncoding(parser, storedEncName);
- poolClear(&temp2Pool);
- if (result == XML_ERROR_UNKNOWN_ENCODING)
- eventPtr = encodingName;
- return result;
- }
- }
-
- if (storedEncName || storedversion)
- poolClear(&temp2Pool);
-
- return XML_ERROR_NONE;
+ }
+ if (xmlDeclHandler) {
+ if (encodingName != NULL) {
+ storedEncName = poolStoreString(&temp2Pool,
+ encoding,
+ encodingName,
+ encodingName
+ + XmlNameLength(encoding, encodingName));
+ if (!storedEncName)
+ return XML_ERROR_NO_MEMORY;
+ poolFinish(&temp2Pool);
+ }
+ if (version) {
+ storedversion = poolStoreString(&temp2Pool,
+ encoding,
+ version,
+ versionend - encoding->minBytesPerChar);
+ if (!storedversion)
+ return XML_ERROR_NO_MEMORY;
+ }
+ xmlDeclHandler(handlerArg, storedversion, storedEncName, standalone);
+ }
+ else if (defaultHandler)
+ reportDefault(parser, encoding, s, next);
+ if (protocolEncodingName == NULL) {
+ if (newEncoding) {
+ if (newEncoding->minBytesPerChar != encoding->minBytesPerChar) {
+ eventPtr = encodingName;
+ return XML_ERROR_INCORRECT_ENCODING;
+ }
+ encoding = newEncoding;
+ }
+ else if (encodingName) {
+ enum XML_Error result;
+ if (!storedEncName) {
+ storedEncName = poolStoreString(
+ &temp2Pool, encoding, encodingName,
+ encodingName + XmlNameLength(encoding, encodingName));
+ if (!storedEncName)
+ return XML_ERROR_NO_MEMORY;
+ }
+ result = handleUnknownEncoding(parser, storedEncName);
+ poolClear(&temp2Pool);
+ if (result == XML_ERROR_UNKNOWN_ENCODING)
+ eventPtr = encodingName;
+ return result;
+ }
+ }
+
+ if (storedEncName || storedversion)
+ poolClear(&temp2Pool);
+
+ return XML_ERROR_NONE;
}
static enum XML_Error
handleUnknownEncoding(XML_Parser parser, const XML_Char *encodingName)
{
- if (unknownEncodingHandler) {
- XML_Encoding info;
- int i;
- for (i = 0; i < 256; i++)
- info.map[i] = -1;
- info.convert = NULL;
- info.data = NULL;
- info.release = NULL;
- if (unknownEncodingHandler(unknownEncodingHandlerData, encodingName,
- &info)) {
- ENCODING *enc;
- unknownEncodingMem = MALLOC(XmlSizeOfUnknownEncoding());
- if (!unknownEncodingMem) {
- if (info.release)
- info.release(info.data);
- return XML_ERROR_NO_MEMORY;
- }
- enc = (ns
- ? XmlInitUnknownEncodingNS
- : XmlInitUnknownEncoding)(unknownEncodingMem,
- info.map,
- info.convert,
- info.data);
- if (enc) {
- unknownEncodingData = info.data;
- unknownEncodingRelease = info.release;
- encoding = enc;
- return XML_ERROR_NONE;
- }
- }
- if (info.release != NULL)
- info.release(info.data);
- }
- return XML_ERROR_UNKNOWN_ENCODING;
+ if (unknownEncodingHandler) {
+ XML_Encoding info;
+ int i;
+ for (i = 0; i < 256; i++)
+ info.map[i] = -1;
+ info.convert = NULL;
+ info.data = NULL;
+ info.release = NULL;
+ if (unknownEncodingHandler(unknownEncodingHandlerData, encodingName,
+ &info)) {
+ ENCODING *enc;
+ unknownEncodingMem = MALLOC(XmlSizeOfUnknownEncoding());
+ if (!unknownEncodingMem) {
+ if (info.release)
+ info.release(info.data);
+ return XML_ERROR_NO_MEMORY;
+ }
+ enc = (ns
+ ? XmlInitUnknownEncodingNS
+ : XmlInitUnknownEncoding)(unknownEncodingMem,
+ info.map,
+ info.convert,
+ info.data);
+ if (enc) {
+ unknownEncodingData = info.data;
+ unknownEncodingRelease = info.release;
+ encoding = enc;
+ return XML_ERROR_NONE;
+ }
+ }
+ if (info.release != NULL)
+ info.release(info.data);
+ }
+ return XML_ERROR_UNKNOWN_ENCODING;
}
static enum XML_Error PTRCALL
prologInitProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
+ const char *s,
+ const char *end,
+ const char **nextPtr)
{
- enum XML_Error result = initializeEncoding(parser);
- if (result != XML_ERROR_NONE)
- return result;
- processor = prologProcessor;
- return prologProcessor(parser, s, end, nextPtr);
+ enum XML_Error result = initializeEncoding(parser);
+ if (result != XML_ERROR_NONE)
+ return result;
+ processor = prologProcessor;
+ return prologProcessor(parser, s, end, nextPtr);
}
#ifdef XML_DTD
static enum XML_Error PTRCALL
externalParEntInitProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
+ const char *s,
+ const char *end,
+ const char **nextPtr)
{
- enum XML_Error result = initializeEncoding(parser);
- if (result != XML_ERROR_NONE)
- return result;
+ enum XML_Error result = initializeEncoding(parser);
+ if (result != XML_ERROR_NONE)
+ return result;
- /* we know now that XML_Parse(Buffer) has been called,
- so we consider the external parameter entity read */
- _dtd->paramEntityRead = XML_TRUE;
+ /* we know now that XML_Parse(Buffer) has been called,
+ so we consider the external parameter entity read */
+ _dtd->paramEntityRead = XML_TRUE;
- if (prologState.inEntityValue) {
- processor = entityValueInitProcessor;
- return entityValueInitProcessor(parser, s, end, nextPtr);
- }
- else {
- processor = externalParEntProcessor;
- return externalParEntProcessor(parser, s, end, nextPtr);
- }
+ if (prologState.inEntityValue) {
+ processor = entityValueInitProcessor;
+ return entityValueInitProcessor(parser, s, end, nextPtr);
+ }
+ else {
+ processor = externalParEntProcessor;
+ return externalParEntProcessor(parser, s, end, nextPtr);
+ }
}
static enum XML_Error PTRCALL
entityValueInitProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
-{
- int tok;
- const char *start = s;
- const char *next = start;
- eventPtr = start;
-
- for (;;) {
- tok = XmlPrologTok(encoding, start, end, &next);
- eventEndPtr = next;
- if (tok <= 0) {
- if (!ps_finalBuffer && tok != XML_TOK_INVALID) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- switch (tok) {
- case XML_TOK_INVALID:
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL:
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- return XML_ERROR_PARTIAL_CHAR;
- case XML_TOK_NONE: /* start == end */
- default:
- break;
- }
- /* found end of entity value - can store it now */
- return storeEntityValue(parser, encoding, s, end);
- }
- else if (tok == XML_TOK_XML_DECL) {
- enum XML_Error result;
- result = processXmlDecl(parser, 0, start, next);
- if (result != XML_ERROR_NONE)
- return result;
- switch (ps_parsing) {
- case XML_SUSPENDED:
- *nextPtr = next;
- return XML_ERROR_NONE;
- case XML_FINISHED:
- return XML_ERROR_ABORTED;
- default:
- *nextPtr = next;
- }
- /* stop scanning for text declaration - we found one */
- processor = entityValueProcessor;
- return entityValueProcessor(parser, next, end, nextPtr);
- }
- /* If we are at the end of the buffer, this would cause XmlPrologTok to
- return XML_TOK_NONE on the next call, which would then cause the
- function to exit with *nextPtr set to s - that is what we want for other
- tokens, but not for the BOM - we would rather like to skip it;
- then, when this routine is entered the next time, XmlPrologTok will
- return XML_TOK_INVALID, since the BOM is still in the buffer
- */
- else if (tok == XML_TOK_BOM && next == end && !ps_finalBuffer) {
- *nextPtr = next;
- return XML_ERROR_NONE;
- }
- start = next;
- eventPtr = start;
- }
+ const char *s,
+ const char *end,
+ const char **nextPtr)
+{
+ int tok;
+ const char *start = s;
+ const char *next = start;
+ eventPtr = start;
+
+ for (;;) {
+ tok = XmlPrologTok(encoding, start, end, &next);
+ eventEndPtr = next;
+ if (tok <= 0) {
+ if (!ps_finalBuffer && tok != XML_TOK_INVALID) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ switch (tok) {
+ case XML_TOK_INVALID:
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL:
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ return XML_ERROR_PARTIAL_CHAR;
+ case XML_TOK_NONE: /* start == end */
+ default:
+ break;
+ }
+ /* found end of entity value - can store it now */
+ return storeEntityValue(parser, encoding, s, end);
+ }
+ else if (tok == XML_TOK_XML_DECL) {
+ enum XML_Error result;
+ result = processXmlDecl(parser, 0, start, next);
+ if (result != XML_ERROR_NONE)
+ return result;
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ *nextPtr = next;
+ return XML_ERROR_NONE;
+ case XML_FINISHED:
+ return XML_ERROR_ABORTED;
+ default:
+ *nextPtr = next;
+ }
+ /* stop scanning for text declaration - we found one */
+ processor = entityValueProcessor;
+ return entityValueProcessor(parser, next, end, nextPtr);
+ }
+ /* If we are at the end of the buffer, this would cause XmlPrologTok to
+ return XML_TOK_NONE on the next call, which would then cause the
+ function to exit with *nextPtr set to s - that is what we want for other
+ tokens, but not for the BOM - we would rather like to skip it;
+ then, when this routine is entered the next time, XmlPrologTok will
+ return XML_TOK_INVALID, since the BOM is still in the buffer
+ */
+ else if (tok == XML_TOK_BOM && next == end && !ps_finalBuffer) {
+ *nextPtr = next;
+ return XML_ERROR_NONE;
+ }
+ start = next;
+ eventPtr = start;
+ }
}
static enum XML_Error PTRCALL
externalParEntProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
-{
- const char *next = s;
- int tok;
-
- tok = XmlPrologTok(encoding, s, end, &next);
- if (tok <= 0) {
- if (!ps_finalBuffer && tok != XML_TOK_INVALID) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- switch (tok) {
- case XML_TOK_INVALID:
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL:
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- return XML_ERROR_PARTIAL_CHAR;
- case XML_TOK_NONE: /* start == end */
- default:
- break;
- }
- }
- /* This would cause the next stage, i.e. doProlog to be passed XML_TOK_BOM.
- However, when parsing an external subset, doProlog will not accept a BOM
- as valid, and report a syntax error, so we have to skip the BOM
- */
- else if (tok == XML_TOK_BOM) {
- s = next;
- tok = XmlPrologTok(encoding, s, end, &next);
- }
-
- processor = prologProcessor;
- return doProlog(parser, encoding, s, end, tok, next,
- nextPtr, (XML_Bool)!ps_finalBuffer);
+ const char *s,
+ const char *end,
+ const char **nextPtr)
+{
+ const char *next = s;
+ int tok;
+
+ tok = XmlPrologTok(encoding, s, end, &next);
+ if (tok <= 0) {
+ if (!ps_finalBuffer && tok != XML_TOK_INVALID) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ switch (tok) {
+ case XML_TOK_INVALID:
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL:
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ return XML_ERROR_PARTIAL_CHAR;
+ case XML_TOK_NONE: /* start == end */
+ default:
+ break;
+ }
+ }
+ /* This would cause the next stage, i.e. doProlog to be passed XML_TOK_BOM.
+ However, when parsing an external subset, doProlog will not accept a BOM
+ as valid, and report a syntax error, so we have to skip the BOM
+ */
+ else if (tok == XML_TOK_BOM) {
+ s = next;
+ tok = XmlPrologTok(encoding, s, end, &next);
+ }
+
+ processor = prologProcessor;
+ return doProlog(parser, encoding, s, end, tok, next,
+ nextPtr, (XML_Bool)!ps_finalBuffer);
}
static enum XML_Error PTRCALL
entityValueProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
-{
- const char *start = s;
- const char *next = s;
- const ENCODING *enc = encoding;
- int tok;
-
- for (;;) {
- tok = XmlPrologTok(enc, start, end, &next);
- if (tok <= 0) {
- if (!ps_finalBuffer && tok != XML_TOK_INVALID) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- switch (tok) {
- case XML_TOK_INVALID:
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL:
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- return XML_ERROR_PARTIAL_CHAR;
- case XML_TOK_NONE: /* start == end */
- default:
- break;
- }
- /* found end of entity value - can store it now */
- return storeEntityValue(parser, enc, s, end);
- }
- start = next;
- }
+ const char *s,
+ const char *end,
+ const char **nextPtr)
+{
+ const char *start = s;
+ const char *next = s;
+ const ENCODING *enc = encoding;
+ int tok;
+
+ for (;;) {
+ tok = XmlPrologTok(enc, start, end, &next);
+ if (tok <= 0) {
+ if (!ps_finalBuffer && tok != XML_TOK_INVALID) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ switch (tok) {
+ case XML_TOK_INVALID:
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL:
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ return XML_ERROR_PARTIAL_CHAR;
+ case XML_TOK_NONE: /* start == end */
+ default:
+ break;
+ }
+ /* found end of entity value - can store it now */
+ return storeEntityValue(parser, enc, s, end);
+ }
+ start = next;
+ }
}
#endif /* XML_DTD */
static enum XML_Error PTRCALL
prologProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
+ const char *s,
+ const char *end,
+ const char **nextPtr)
{
- const char *next = s;
- int tok = XmlPrologTok(encoding, s, end, &next);
- return doProlog(parser, encoding, s, end, tok, next,
- nextPtr, (XML_Bool)!ps_finalBuffer);
+ const char *next = s;
+ int tok = XmlPrologTok(encoding, s, end, &next);
+ return doProlog(parser, encoding, s, end, tok, next,
+ nextPtr, (XML_Bool)!ps_finalBuffer);
}
static enum XML_Error
doProlog(XML_Parser parser,
- const ENCODING *enc,
- const char *s,
- const char *end,
- int tok,
- const char *next,
- const char **nextPtr,
- XML_Bool haveMore)
+ const ENCODING *enc,
+ const char *s,
+ const char *end,
+ int tok,
+ const char *next,
+ const char **nextPtr,
+ XML_Bool haveMore)
{
#ifdef XML_DTD
- static const XML_Char externalSubsetName[] = { ASCII_HASH , '\0' };
+ static const XML_Char externalSubsetName[] = { ASCII_HASH , '\0' };
#endif /* XML_DTD */
- static const XML_Char atypeCDATA[] =
- { ASCII_C, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
- static const XML_Char atypeID[] = { ASCII_I, ASCII_D, '\0' };
- static const XML_Char atypeIDREF[] =
- { ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, '\0' };
- static const XML_Char atypeIDREFS[] =
- { ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, ASCII_S, '\0' };
- static const XML_Char atypeENTITY[] =
- { ASCII_E, ASCII_N, ASCII_T, ASCII_I, ASCII_T, ASCII_Y, '\0' };
- static const XML_Char atypeENTITIES[] = { ASCII_E, ASCII_N,
- ASCII_T, ASCII_I, ASCII_T, ASCII_I, ASCII_E, ASCII_S, '\0' };
- static const XML_Char atypeNMTOKEN[] = {
- ASCII_N, ASCII_M, ASCII_T, ASCII_O, ASCII_K, ASCII_E, ASCII_N, '\0' };
- static const XML_Char atypeNMTOKENS[] = { ASCII_N, ASCII_M, ASCII_T,
- ASCII_O, ASCII_K, ASCII_E, ASCII_N, ASCII_S, '\0' };
- static const XML_Char notationPrefix[] = { ASCII_N, ASCII_O, ASCII_T,
- ASCII_A, ASCII_T, ASCII_I, ASCII_O, ASCII_N, ASCII_LPAREN, '\0' };
- static const XML_Char enumValueSep[] = { ASCII_PIPE, '\0' };
- static const XML_Char enumValueStart[] = { ASCII_LPAREN, '\0' };
-
- /* save one level of indirection */
- DTD * const dtd = _dtd;
-
- const char **eventPP;
- const char **eventEndPP;
- enum XML_Content_Quant quant;
-
- if (enc == encoding) {
- eventPP = &eventPtr;
- eventEndPP = &eventEndPtr;
- }
- else {
- eventPP = &(openInternalEntities->internalEventPtr);
- eventEndPP = &(openInternalEntities->internalEventEndPtr);
- }
-
- for (;;) {
- int role;
- XML_Bool handleDefault = XML_TRUE;
- *eventPP = s;
- *eventEndPP = next;
- if (tok <= 0) {
- if (haveMore && tok != XML_TOK_INVALID) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- switch (tok) {
- case XML_TOK_INVALID:
- *eventPP = next;
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL:
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- return XML_ERROR_PARTIAL_CHAR;
- case -XML_TOK_PROLOG_S:
- tok = -tok;
- break;
- case XML_TOK_NONE:
+ static const XML_Char atypeCDATA[] =
+ { ASCII_C, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
+ static const XML_Char atypeID[] = { ASCII_I, ASCII_D, '\0' };
+ static const XML_Char atypeIDREF[] =
+ { ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, '\0' };
+ static const XML_Char atypeIDREFS[] =
+ { ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, ASCII_S, '\0' };
+ static const XML_Char atypeENTITY[] =
+ { ASCII_E, ASCII_N, ASCII_T, ASCII_I, ASCII_T, ASCII_Y, '\0' };
+ static const XML_Char atypeENTITIES[] = { ASCII_E, ASCII_N,
+ ASCII_T, ASCII_I, ASCII_T, ASCII_I, ASCII_E, ASCII_S, '\0' };
+ static const XML_Char atypeNMTOKEN[] = {
+ ASCII_N, ASCII_M, ASCII_T, ASCII_O, ASCII_K, ASCII_E, ASCII_N, '\0' };
+ static const XML_Char atypeNMTOKENS[] = { ASCII_N, ASCII_M, ASCII_T,
+ ASCII_O, ASCII_K, ASCII_E, ASCII_N, ASCII_S, '\0' };
+ static const XML_Char notationPrefix[] = { ASCII_N, ASCII_O, ASCII_T,
+ ASCII_A, ASCII_T, ASCII_I, ASCII_O, ASCII_N, ASCII_LPAREN, '\0' };
+ static const XML_Char enumValueSep[] = { ASCII_PIPE, '\0' };
+ static const XML_Char enumValueStart[] = { ASCII_LPAREN, '\0' };
+
+ /* save one level of indirection */
+ DTD * const dtd = _dtd;
+
+ const char **eventPP;
+ const char **eventEndPP;
+ enum XML_Content_Quant quant;
+
+ if (enc == encoding) {
+ eventPP = &eventPtr;
+ eventEndPP = &eventEndPtr;
+ }
+ else {
+ eventPP = &(openInternalEntities->internalEventPtr);
+ eventEndPP = &(openInternalEntities->internalEventEndPtr);
+ }
+
+ for (;;) {
+ int role;
+ XML_Bool handleDefault = XML_TRUE;
+ *eventPP = s;
+ *eventEndPP = next;
+ if (tok <= 0) {
+ if (haveMore && tok != XML_TOK_INVALID) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ switch (tok) {
+ case XML_TOK_INVALID:
+ *eventPP = next;
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL:
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ return XML_ERROR_PARTIAL_CHAR;
+ case -XML_TOK_PROLOG_S:
+ tok = -tok;
+ break;
+ case XML_TOK_NONE:
#ifdef XML_DTD
- /* for internal PE NOT referenced between declarations */
- if (enc != encoding && !openInternalEntities->betweenDecl) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- /* WFC: PE Between Declarations - must check that PE contains
- complete markup, not only for external PEs, but also for
- internal PEs if the reference occurs between declarations.
- */
- if (isParamEntity || enc != encoding) {
- if (XmlTokenRole(&prologState, XML_TOK_NONE, end, end, enc)
- == XML_ROLE_ERROR)
- return XML_ERROR_INCOMPLETE_PE;
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
+ /* for internal PE NOT referenced between declarations */
+ if (enc != encoding && !openInternalEntities->betweenDecl) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ /* WFC: PE Between Declarations - must check that PE contains
+ complete markup, not only for external PEs, but also for
+ internal PEs if the reference occurs between declarations.
+ */
+ if (isParamEntity || enc != encoding) {
+ if (XmlTokenRole(&prologState, XML_TOK_NONE, end, end, enc)
+ == XML_ROLE_ERROR)
+ return XML_ERROR_INCOMPLETE_PE;
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
#endif /* XML_DTD */
- return XML_ERROR_NO_ELEMENTS;
- default:
- tok = -tok;
- next = end;
- break;
- }
- }
- role = XmlTokenRole(&prologState, tok, s, next, enc);
- switch (role) {
- case XML_ROLE_XML_DECL:
- {
- enum XML_Error result = processXmlDecl(parser, 0, s, next);
- if (result != XML_ERROR_NONE)
- return result;
- enc = encoding;
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_DOCTYPE_NAME:
- if (startDoctypeDeclHandler) {
- doctypeName = poolStoreString(&tempPool, enc, s, next);
- if (!doctypeName)
- return XML_ERROR_NO_MEMORY;
- poolFinish(&tempPool);
- doctypePubid = NULL;
- handleDefault = XML_FALSE;
- }
- doctypeSysid = NULL; /* always initialize to NULL */
- break;
- case XML_ROLE_DOCTYPE_INTERNAL_SUBSET:
- if (startDoctypeDeclHandler) {
- startDoctypeDeclHandler(handlerArg, doctypeName, doctypeSysid,
- doctypePubid, 1);
- doctypeName = NULL;
- poolClear(&tempPool);
- handleDefault = XML_FALSE;
- }
- break;
+ return XML_ERROR_NO_ELEMENTS;
+ default:
+ tok = -tok;
+ next = end;
+ break;
+ }
+ }
+ role = XmlTokenRole(&prologState, tok, s, next, enc);
+ switch (role) {
+ case XML_ROLE_XML_DECL:
+ {
+ enum XML_Error result = processXmlDecl(parser, 0, s, next);
+ if (result != XML_ERROR_NONE)
+ return result;
+ enc = encoding;
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_DOCTYPE_NAME:
+ if (startDoctypeDeclHandler) {
+ doctypeName = poolStoreString(&tempPool, enc, s, next);
+ if (!doctypeName)
+ return XML_ERROR_NO_MEMORY;
+ poolFinish(&tempPool);
+ doctypePubid = NULL;
+ handleDefault = XML_FALSE;
+ }
+ doctypeSysid = NULL; /* always initialize to NULL */
+ break;
+ case XML_ROLE_DOCTYPE_INTERNAL_SUBSET:
+ if (startDoctypeDeclHandler) {
+ startDoctypeDeclHandler(handlerArg, doctypeName, doctypeSysid,
+ doctypePubid, 1);
+ doctypeName = NULL;
+ poolClear(&tempPool);
+ handleDefault = XML_FALSE;
+ }
+ break;
#ifdef XML_DTD
- case XML_ROLE_TEXT_DECL:
- {
- enum XML_Error result = processXmlDecl(parser, 1, s, next);
- if (result != XML_ERROR_NONE)
- return result;
- enc = encoding;
- handleDefault = XML_FALSE;
- }
- break;
+ case XML_ROLE_TEXT_DECL:
+ {
+ enum XML_Error result = processXmlDecl(parser, 1, s, next);
+ if (result != XML_ERROR_NONE)
+ return result;
+ enc = encoding;
+ handleDefault = XML_FALSE;
+ }
+ break;
#endif /* XML_DTD */
- case XML_ROLE_DOCTYPE_PUBLIC_ID:
+ case XML_ROLE_DOCTYPE_PUBLIC_ID:
#ifdef XML_DTD
- useForeignDTD = XML_FALSE;
- declEntity = (ENTITY *)lookup(parser,
- &dtd->paramEntities,
- externalSubsetName,
- sizeof(ENTITY));
- if (!declEntity)
- return XML_ERROR_NO_MEMORY;
+ useForeignDTD = XML_FALSE;
+ declEntity = (ENTITY *)lookup(parser,
+ &dtd->paramEntities,
+ externalSubsetName,
+ sizeof(ENTITY));
+ if (!declEntity)
+ return XML_ERROR_NO_MEMORY;
#endif /* XML_DTD */
- dtd->hasParamEntityRefs = XML_TRUE;
- if (startDoctypeDeclHandler) {
- XML_Char *pubId;
- if (!XmlIsPublicId(enc, s, next, eventPP))
- return XML_ERROR_PUBLICID;
- pubId = poolStoreString(&tempPool, enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!pubId)
- return XML_ERROR_NO_MEMORY;
- normalizePublicId(pubId);
- poolFinish(&tempPool);
- doctypePubid = pubId;
- handleDefault = XML_FALSE;
- goto alreadyChecked;
- }
- /* fall through */
- case XML_ROLE_ENTITY_PUBLIC_ID:
- if (!XmlIsPublicId(enc, s, next, eventPP))
- return XML_ERROR_PUBLICID;
- alreadyChecked:
- if (dtd->keepProcessing && declEntity) {
- XML_Char *tem = poolStoreString(&dtd->pool,
- enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!tem)
- return XML_ERROR_NO_MEMORY;
- normalizePublicId(tem);
- declEntity->publicId = tem;
- poolFinish(&dtd->pool);
- if (entityDeclHandler)
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_DOCTYPE_CLOSE:
- if (doctypeName) {
- startDoctypeDeclHandler(handlerArg, doctypeName,
- doctypeSysid, doctypePubid, 0);
- poolClear(&tempPool);
- handleDefault = XML_FALSE;
- }
- /* doctypeSysid will be non-NULL in the case of a previous
- XML_ROLE_DOCTYPE_SYSTEM_ID, even if startDoctypeDeclHandler
- was not set, indicating an external subset
- */
+ dtd->hasParamEntityRefs = XML_TRUE;
+ if (startDoctypeDeclHandler) {
+ XML_Char *pubId;
+ if (!XmlIsPublicId(enc, s, next, eventPP))
+ return XML_ERROR_PUBLICID;
+ pubId = poolStoreString(&tempPool, enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!pubId)
+ return XML_ERROR_NO_MEMORY;
+ normalizePublicId(pubId);
+ poolFinish(&tempPool);
+ doctypePubid = pubId;
+ handleDefault = XML_FALSE;
+ goto alreadyChecked;
+ }
+ /* fall through */
+ case XML_ROLE_ENTITY_PUBLIC_ID:
+ if (!XmlIsPublicId(enc, s, next, eventPP))
+ return XML_ERROR_PUBLICID;
+ alreadyChecked:
+ if (dtd->keepProcessing && declEntity) {
+ XML_Char *tem = poolStoreString(&dtd->pool,
+ enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!tem)
+ return XML_ERROR_NO_MEMORY;
+ normalizePublicId(tem);
+ declEntity->publicId = tem;
+ poolFinish(&dtd->pool);
+ if (entityDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_DOCTYPE_CLOSE:
+ if (doctypeName) {
+ startDoctypeDeclHandler(handlerArg, doctypeName,
+ doctypeSysid, doctypePubid, 0);
+ poolClear(&tempPool);
+ handleDefault = XML_FALSE;
+ }
+ /* doctypeSysid will be non-NULL in the case of a previous
+ XML_ROLE_DOCTYPE_SYSTEM_ID, even if startDoctypeDeclHandler
+ was not set, indicating an external subset
+ */
#ifdef XML_DTD
- if (doctypeSysid || useForeignDTD) {
- XML_Bool hadParamEntityRefs = dtd->hasParamEntityRefs;
- dtd->hasParamEntityRefs = XML_TRUE;
- if (paramEntityParsing && externalEntityRefHandler) {
- ENTITY *entity = (ENTITY *)lookup(parser,
- &dtd->paramEntities,
- externalSubsetName,
- sizeof(ENTITY));
- if (!entity)
- return XML_ERROR_NO_MEMORY;
- if (useForeignDTD)
- entity->base = curBase;
- dtd->paramEntityRead = XML_FALSE;
- if (!externalEntityRefHandler(externalEntityRefHandlerArg,
- 0,
- entity->base,
- entity->systemId,
- entity->publicId))
- return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
- if (dtd->paramEntityRead) {
- if (!dtd->standalone &&
- notStandaloneHandler &&
- !notStandaloneHandler(handlerArg))
- return XML_ERROR_NOT_STANDALONE;
- }
- /* if we didn't read the foreign DTD then this means that there
- is no external subset and we must reset dtd->hasParamEntityRefs
- */
- else if (!doctypeSysid)
- dtd->hasParamEntityRefs = hadParamEntityRefs;
- /* end of DTD - no need to update dtd->keepProcessing */
- }
- useForeignDTD = XML_FALSE;
- }
+ if (doctypeSysid || useForeignDTD) {
+ XML_Bool hadParamEntityRefs = dtd->hasParamEntityRefs;
+ dtd->hasParamEntityRefs = XML_TRUE;
+ if (paramEntityParsing && externalEntityRefHandler) {
+ ENTITY *entity = (ENTITY *)lookup(parser,
+ &dtd->paramEntities,
+ externalSubsetName,
+ sizeof(ENTITY));
+ if (!entity)
+ return XML_ERROR_NO_MEMORY;
+ if (useForeignDTD)
+ entity->base = curBase;
+ dtd->paramEntityRead = XML_FALSE;
+ if (!externalEntityRefHandler(externalEntityRefHandlerArg,
+ 0,
+ entity->base,
+ entity->systemId,
+ entity->publicId))
+ return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
+ if (dtd->paramEntityRead) {
+ if (!dtd->standalone &&
+ notStandaloneHandler &&
+ !notStandaloneHandler(handlerArg))
+ return XML_ERROR_NOT_STANDALONE;
+ }
+ /* if we didn't read the foreign DTD then this means that there
+ is no external subset and we must reset dtd->hasParamEntityRefs
+ */
+ else if (!doctypeSysid)
+ dtd->hasParamEntityRefs = hadParamEntityRefs;
+ /* end of DTD - no need to update dtd->keepProcessing */
+ }
+ useForeignDTD = XML_FALSE;
+ }
#endif /* XML_DTD */
- if (endDoctypeDeclHandler) {
- endDoctypeDeclHandler(handlerArg);
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_INSTANCE_START:
+ if (endDoctypeDeclHandler) {
+ endDoctypeDeclHandler(handlerArg);
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_INSTANCE_START:
#ifdef XML_DTD
- /* if there is no DOCTYPE declaration then now is the
- last chance to read the foreign DTD
- */
- if (useForeignDTD) {
- XML_Bool hadParamEntityRefs = dtd->hasParamEntityRefs;
- dtd->hasParamEntityRefs = XML_TRUE;
- if (paramEntityParsing && externalEntityRefHandler) {
- ENTITY *entity = (ENTITY *)lookup(parser, &dtd->paramEntities,
- externalSubsetName,
- sizeof(ENTITY));
- if (!entity)
- return XML_ERROR_NO_MEMORY;
- entity->base = curBase;
- dtd->paramEntityRead = XML_FALSE;
- if (!externalEntityRefHandler(externalEntityRefHandlerArg,
- 0,
- entity->base,
- entity->systemId,
- entity->publicId))
- return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
- if (dtd->paramEntityRead) {
- if (!dtd->standalone &&
- notStandaloneHandler &&
- !notStandaloneHandler(handlerArg))
- return XML_ERROR_NOT_STANDALONE;
- }
- /* if we didn't read the foreign DTD then this means that there
- is no external subset and we must reset dtd->hasParamEntityRefs
- */
- else
- dtd->hasParamEntityRefs = hadParamEntityRefs;
- /* end of DTD - no need to update dtd->keepProcessing */
- }
- }
+ /* if there is no DOCTYPE declaration then now is the
+ last chance to read the foreign DTD
+ */
+ if (useForeignDTD) {
+ XML_Bool hadParamEntityRefs = dtd->hasParamEntityRefs;
+ dtd->hasParamEntityRefs = XML_TRUE;
+ if (paramEntityParsing && externalEntityRefHandler) {
+ ENTITY *entity = (ENTITY *)lookup(parser, &dtd->paramEntities,
+ externalSubsetName,
+ sizeof(ENTITY));
+ if (!entity)
+ return XML_ERROR_NO_MEMORY;
+ entity->base = curBase;
+ dtd->paramEntityRead = XML_FALSE;
+ if (!externalEntityRefHandler(externalEntityRefHandlerArg,
+ 0,
+ entity->base,
+ entity->systemId,
+ entity->publicId))
+ return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
+ if (dtd->paramEntityRead) {
+ if (!dtd->standalone &&
+ notStandaloneHandler &&
+ !notStandaloneHandler(handlerArg))
+ return XML_ERROR_NOT_STANDALONE;
+ }
+ /* if we didn't read the foreign DTD then this means that there
+ is no external subset and we must reset dtd->hasParamEntityRefs
+ */
+ else
+ dtd->hasParamEntityRefs = hadParamEntityRefs;
+ /* end of DTD - no need to update dtd->keepProcessing */
+ }
+ }
#endif /* XML_DTD */
- processor = contentProcessor;
- return contentProcessor(parser, s, end, nextPtr);
- case XML_ROLE_ATTLIST_ELEMENT_NAME:
- declElementType = getElementType(parser, enc, s, next);
- if (!declElementType)
- return XML_ERROR_NO_MEMORY;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_NAME:
- declAttributeId = getAttributeId(parser, enc, s, next);
- if (!declAttributeId)
- return XML_ERROR_NO_MEMORY;
- declAttributeIsCdata = XML_FALSE;
- declAttributeType = NULL;
- declAttributeIsId = XML_FALSE;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_CDATA:
- declAttributeIsCdata = XML_TRUE;
- declAttributeType = atypeCDATA;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_ID:
- declAttributeIsId = XML_TRUE;
- declAttributeType = atypeID;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_IDREF:
- declAttributeType = atypeIDREF;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_IDREFS:
- declAttributeType = atypeIDREFS;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_ENTITY:
- declAttributeType = atypeENTITY;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_ENTITIES:
- declAttributeType = atypeENTITIES;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_NMTOKEN:
- declAttributeType = atypeNMTOKEN;
- goto checkAttListDeclHandler;
- case XML_ROLE_ATTRIBUTE_TYPE_NMTOKENS:
- declAttributeType = atypeNMTOKENS;
- checkAttListDeclHandler:
- if (dtd->keepProcessing && attlistDeclHandler)
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_ATTRIBUTE_ENUM_VALUE:
- case XML_ROLE_ATTRIBUTE_NOTATION_VALUE:
- if (dtd->keepProcessing && attlistDeclHandler) {
- const XML_Char *prefix;
- if (declAttributeType) {
- prefix = enumValueSep;
- }
- else {
- prefix = (role == XML_ROLE_ATTRIBUTE_NOTATION_VALUE
- ? notationPrefix
- : enumValueStart);
- }
- if (!poolAppendString(&tempPool, prefix))
- return XML_ERROR_NO_MEMORY;
- if (!poolAppend(&tempPool, enc, s, next))
- return XML_ERROR_NO_MEMORY;
- declAttributeType = tempPool.start;
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_IMPLIED_ATTRIBUTE_VALUE:
- case XML_ROLE_REQUIRED_ATTRIBUTE_VALUE:
- if (dtd->keepProcessing) {
- if (!defineAttribute(declElementType, declAttributeId,
- declAttributeIsCdata, declAttributeIsId,
- 0, parser))
- return XML_ERROR_NO_MEMORY;
- if (attlistDeclHandler && declAttributeType) {
- if (*declAttributeType == XML_T(ASCII_LPAREN)
- || (*declAttributeType == XML_T(ASCII_N)
- && declAttributeType[1] == XML_T(ASCII_O))) {
- /* Enumerated or Notation type */
- if (!poolAppendChar(&tempPool, XML_T(ASCII_RPAREN))
- || !poolAppendChar(&tempPool, XML_T('\0')))
- return XML_ERROR_NO_MEMORY;
- declAttributeType = tempPool.start;
- poolFinish(&tempPool);
- }
- *eventEndPP = s;
- attlistDeclHandler(handlerArg, declElementType->name,
- declAttributeId->name, declAttributeType,
- 0, role == XML_ROLE_REQUIRED_ATTRIBUTE_VALUE);
- poolClear(&tempPool);
- handleDefault = XML_FALSE;
- }
- }
- break;
- case XML_ROLE_DEFAULT_ATTRIBUTE_VALUE:
- case XML_ROLE_FIXED_ATTRIBUTE_VALUE:
- if (dtd->keepProcessing) {
- const XML_Char *attVal;
- enum XML_Error result =
- storeAttributeValue(parser, enc, declAttributeIsCdata,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar,
- &dtd->pool);
- if (result)
- return result;
- attVal = poolStart(&dtd->pool);
- poolFinish(&dtd->pool);
- /* ID attributes aren't allowed to have a default */
- if (!defineAttribute(declElementType, declAttributeId,
- declAttributeIsCdata, XML_FALSE, attVal, parser))
- return XML_ERROR_NO_MEMORY;
- if (attlistDeclHandler && declAttributeType) {
- if (*declAttributeType == XML_T(ASCII_LPAREN)
- || (*declAttributeType == XML_T(ASCII_N)
- && declAttributeType[1] == XML_T(ASCII_O))) {
- /* Enumerated or Notation type */
- if (!poolAppendChar(&tempPool, XML_T(ASCII_RPAREN))
- || !poolAppendChar(&tempPool, XML_T('\0')))
- return XML_ERROR_NO_MEMORY;
- declAttributeType = tempPool.start;
- poolFinish(&tempPool);
- }
- *eventEndPP = s;
- attlistDeclHandler(handlerArg, declElementType->name,
- declAttributeId->name, declAttributeType,
- attVal,
- role == XML_ROLE_FIXED_ATTRIBUTE_VALUE);
- poolClear(&tempPool);
- handleDefault = XML_FALSE;
- }
- }
- break;
- case XML_ROLE_ENTITY_VALUE:
- if (dtd->keepProcessing) {
- enum XML_Error result = storeEntityValue(parser, enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (declEntity) {
- declEntity->textPtr = poolStart(&dtd->entityValuePool);
- declEntity->textLen = (int)(poolLength(&dtd->entityValuePool));
- poolFinish(&dtd->entityValuePool);
- if (entityDeclHandler) {
- *eventEndPP = s;
- entityDeclHandler(handlerArg,
- declEntity->name,
- declEntity->is_param,
- declEntity->textPtr,
- declEntity->textLen,
- curBase, 0, 0, 0);
- handleDefault = XML_FALSE;
- }
- }
- else
- poolDiscard(&dtd->entityValuePool);
- if (result != XML_ERROR_NONE)
- return result;
- }
- break;
- case XML_ROLE_DOCTYPE_SYSTEM_ID:
+ processor = contentProcessor;
+ return contentProcessor(parser, s, end, nextPtr);
+ case XML_ROLE_ATTLIST_ELEMENT_NAME:
+ declElementType = getElementType(parser, enc, s, next);
+ if (!declElementType)
+ return XML_ERROR_NO_MEMORY;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_NAME:
+ declAttributeId = getAttributeId(parser, enc, s, next);
+ if (!declAttributeId)
+ return XML_ERROR_NO_MEMORY;
+ declAttributeIsCdata = XML_FALSE;
+ declAttributeType = NULL;
+ declAttributeIsId = XML_FALSE;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_CDATA:
+ declAttributeIsCdata = XML_TRUE;
+ declAttributeType = atypeCDATA;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_ID:
+ declAttributeIsId = XML_TRUE;
+ declAttributeType = atypeID;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_IDREF:
+ declAttributeType = atypeIDREF;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_IDREFS:
+ declAttributeType = atypeIDREFS;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_ENTITY:
+ declAttributeType = atypeENTITY;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_ENTITIES:
+ declAttributeType = atypeENTITIES;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_NMTOKEN:
+ declAttributeType = atypeNMTOKEN;
+ goto checkAttListDeclHandler;
+ case XML_ROLE_ATTRIBUTE_TYPE_NMTOKENS:
+ declAttributeType = atypeNMTOKENS;
+ checkAttListDeclHandler:
+ if (dtd->keepProcessing && attlistDeclHandler)
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_ATTRIBUTE_ENUM_VALUE:
+ case XML_ROLE_ATTRIBUTE_NOTATION_VALUE:
+ if (dtd->keepProcessing && attlistDeclHandler) {
+ const XML_Char *prefix;
+ if (declAttributeType) {
+ prefix = enumValueSep;
+ }
+ else {
+ prefix = (role == XML_ROLE_ATTRIBUTE_NOTATION_VALUE
+ ? notationPrefix
+ : enumValueStart);
+ }
+ if (!poolAppendString(&tempPool, prefix))
+ return XML_ERROR_NO_MEMORY;
+ if (!poolAppend(&tempPool, enc, s, next))
+ return XML_ERROR_NO_MEMORY;
+ declAttributeType = tempPool.start;
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_IMPLIED_ATTRIBUTE_VALUE:
+ case XML_ROLE_REQUIRED_ATTRIBUTE_VALUE:
+ if (dtd->keepProcessing) {
+ if (!defineAttribute(declElementType, declAttributeId,
+ declAttributeIsCdata, declAttributeIsId,
+ 0, parser))
+ return XML_ERROR_NO_MEMORY;
+ if (attlistDeclHandler && declAttributeType) {
+ if (*declAttributeType == XML_T(ASCII_LPAREN)
+ || (*declAttributeType == XML_T(ASCII_N)
+ && declAttributeType[1] == XML_T(ASCII_O))) {
+ /* Enumerated or Notation type */
+ if (!poolAppendChar(&tempPool, XML_T(ASCII_RPAREN))
+ || !poolAppendChar(&tempPool, XML_T('\0')))
+ return XML_ERROR_NO_MEMORY;
+ declAttributeType = tempPool.start;
+ poolFinish(&tempPool);
+ }
+ *eventEndPP = s;
+ attlistDeclHandler(handlerArg, declElementType->name,
+ declAttributeId->name, declAttributeType,
+ 0, role == XML_ROLE_REQUIRED_ATTRIBUTE_VALUE);
+ poolClear(&tempPool);
+ handleDefault = XML_FALSE;
+ }
+ }
+ break;
+ case XML_ROLE_DEFAULT_ATTRIBUTE_VALUE:
+ case XML_ROLE_FIXED_ATTRIBUTE_VALUE:
+ if (dtd->keepProcessing) {
+ const XML_Char *attVal;
+ enum XML_Error result =
+ storeAttributeValue(parser, enc, declAttributeIsCdata,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar,
+ &dtd->pool);
+ if (result)
+ return result;
+ attVal = poolStart(&dtd->pool);
+ poolFinish(&dtd->pool);
+ /* ID attributes aren't allowed to have a default */
+ if (!defineAttribute(declElementType, declAttributeId,
+ declAttributeIsCdata, XML_FALSE, attVal, parser))
+ return XML_ERROR_NO_MEMORY;
+ if (attlistDeclHandler && declAttributeType) {
+ if (*declAttributeType == XML_T(ASCII_LPAREN)
+ || (*declAttributeType == XML_T(ASCII_N)
+ && declAttributeType[1] == XML_T(ASCII_O))) {
+ /* Enumerated or Notation type */
+ if (!poolAppendChar(&tempPool, XML_T(ASCII_RPAREN))
+ || !poolAppendChar(&tempPool, XML_T('\0')))
+ return XML_ERROR_NO_MEMORY;
+ declAttributeType = tempPool.start;
+ poolFinish(&tempPool);
+ }
+ *eventEndPP = s;
+ attlistDeclHandler(handlerArg, declElementType->name,
+ declAttributeId->name, declAttributeType,
+ attVal,
+ role == XML_ROLE_FIXED_ATTRIBUTE_VALUE);
+ poolClear(&tempPool);
+ handleDefault = XML_FALSE;
+ }
+ }
+ break;
+ case XML_ROLE_ENTITY_VALUE:
+ if (dtd->keepProcessing) {
+ enum XML_Error result = storeEntityValue(parser, enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (declEntity) {
+ declEntity->textPtr = poolStart(&dtd->entityValuePool);
+ declEntity->textLen = (int)(poolLength(&dtd->entityValuePool));
+ poolFinish(&dtd->entityValuePool);
+ if (entityDeclHandler) {
+ *eventEndPP = s;
+ entityDeclHandler(handlerArg,
+ declEntity->name,
+ declEntity->is_param,
+ declEntity->textPtr,
+ declEntity->textLen,
+ curBase, 0, 0, 0);
+ handleDefault = XML_FALSE;
+ }
+ }
+ else
+ poolDiscard(&dtd->entityValuePool);
+ if (result != XML_ERROR_NONE)
+ return result;
+ }
+ break;
+ case XML_ROLE_DOCTYPE_SYSTEM_ID:
#ifdef XML_DTD
- useForeignDTD = XML_FALSE;
+ useForeignDTD = XML_FALSE;
#endif /* XML_DTD */
- dtd->hasParamEntityRefs = XML_TRUE;
- if (startDoctypeDeclHandler) {
- doctypeSysid = poolStoreString(&tempPool, enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (doctypeSysid == NULL)
- return XML_ERROR_NO_MEMORY;
- poolFinish(&tempPool);
- handleDefault = XML_FALSE;
- }
+ dtd->hasParamEntityRefs = XML_TRUE;
+ if (startDoctypeDeclHandler) {
+ doctypeSysid = poolStoreString(&tempPool, enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (doctypeSysid == NULL)
+ return XML_ERROR_NO_MEMORY;
+ poolFinish(&tempPool);
+ handleDefault = XML_FALSE;
+ }
#ifdef XML_DTD
- else
- /* use externalSubsetName to make doctypeSysid non-NULL
- for the case where no startDoctypeDeclHandler is set */
- doctypeSysid = externalSubsetName;
+ else
+ /* use externalSubsetName to make doctypeSysid non-NULL
+ for the case where no startDoctypeDeclHandler is set */
+ doctypeSysid = externalSubsetName;
#endif /* XML_DTD */
- if (!dtd->standalone
+ if (!dtd->standalone
#ifdef XML_DTD
- && !paramEntityParsing
+ && !paramEntityParsing
#endif /* XML_DTD */
- && notStandaloneHandler
- && !notStandaloneHandler(handlerArg))
- return XML_ERROR_NOT_STANDALONE;
+ && notStandaloneHandler
+ && !notStandaloneHandler(handlerArg))
+ return XML_ERROR_NOT_STANDALONE;
#ifndef XML_DTD
- break;
+ break;
#else /* XML_DTD */
- if (!declEntity) {
- declEntity = (ENTITY *)lookup(parser,
- &dtd->paramEntities,
- externalSubsetName,
- sizeof(ENTITY));
- if (!declEntity)
- return XML_ERROR_NO_MEMORY;
- declEntity->publicId = NULL;
- }
- /* fall through */
+ if (!declEntity) {
+ declEntity = (ENTITY *)lookup(parser,
+ &dtd->paramEntities,
+ externalSubsetName,
+ sizeof(ENTITY));
+ if (!declEntity)
+ return XML_ERROR_NO_MEMORY;
+ declEntity->publicId = NULL;
+ }
+ /* fall through */
#endif /* XML_DTD */
- case XML_ROLE_ENTITY_SYSTEM_ID:
- if (dtd->keepProcessing && declEntity) {
- declEntity->systemId = poolStoreString(&dtd->pool, enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!declEntity->systemId)
- return XML_ERROR_NO_MEMORY;
- declEntity->base = curBase;
- poolFinish(&dtd->pool);
- if (entityDeclHandler)
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_ENTITY_COMPLETE:
- if (dtd->keepProcessing && declEntity && entityDeclHandler) {
- *eventEndPP = s;
- entityDeclHandler(handlerArg,
- declEntity->name,
- declEntity->is_param,
- 0,0,
- declEntity->base,
- declEntity->systemId,
- declEntity->publicId,
- 0);
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_ENTITY_NOTATION_NAME:
- if (dtd->keepProcessing && declEntity) {
- declEntity->notation = poolStoreString(&dtd->pool, enc, s, next);
- if (!declEntity->notation)
- return XML_ERROR_NO_MEMORY;
- poolFinish(&dtd->pool);
- if (unparsedEntityDeclHandler) {
- *eventEndPP = s;
- unparsedEntityDeclHandler(handlerArg,
- declEntity->name,
- declEntity->base,
- declEntity->systemId,
- declEntity->publicId,
- declEntity->notation);
- handleDefault = XML_FALSE;
- }
- else if (entityDeclHandler) {
- *eventEndPP = s;
- entityDeclHandler(handlerArg,
- declEntity->name,
- 0,0,0,
- declEntity->base,
- declEntity->systemId,
- declEntity->publicId,
- declEntity->notation);
- handleDefault = XML_FALSE;
- }
- }
- break;
- case XML_ROLE_GENERAL_ENTITY_NAME:
- {
- if (XmlPredefinedEntityName(enc, s, next)) {
- declEntity = NULL;
- break;
- }
- if (dtd->keepProcessing) {
- const XML_Char *name = poolStoreString(&dtd->pool, enc, s, next);
- if (!name)
- return XML_ERROR_NO_MEMORY;
- declEntity = (ENTITY *)lookup(parser, &dtd->generalEntities, name,
- sizeof(ENTITY));
- if (!declEntity)
- return XML_ERROR_NO_MEMORY;
- if (declEntity->name != name) {
- poolDiscard(&dtd->pool);
- declEntity = NULL;
- }
- else {
- poolFinish(&dtd->pool);
- declEntity->publicId = NULL;
- declEntity->is_param = XML_FALSE;
- /* if we have a parent parser or are reading an internal parameter
- entity, then the entity declaration is not considered "internal"
- */
- declEntity->is_internal = !(parentParser || openInternalEntities);
- if (entityDeclHandler)
- handleDefault = XML_FALSE;
- }
- }
- else {
- poolDiscard(&dtd->pool);
- declEntity = NULL;
- }
- }
- break;
- case XML_ROLE_PARAM_ENTITY_NAME:
+ case XML_ROLE_ENTITY_SYSTEM_ID:
+ if (dtd->keepProcessing && declEntity) {
+ declEntity->systemId = poolStoreString(&dtd->pool, enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!declEntity->systemId)
+ return XML_ERROR_NO_MEMORY;
+ declEntity->base = curBase;
+ poolFinish(&dtd->pool);
+ if (entityDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_ENTITY_COMPLETE:
+ if (dtd->keepProcessing && declEntity && entityDeclHandler) {
+ *eventEndPP = s;
+ entityDeclHandler(handlerArg,
+ declEntity->name,
+ declEntity->is_param,
+ 0,0,
+ declEntity->base,
+ declEntity->systemId,
+ declEntity->publicId,
+ 0);
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_ENTITY_NOTATION_NAME:
+ if (dtd->keepProcessing && declEntity) {
+ declEntity->notation = poolStoreString(&dtd->pool, enc, s, next);
+ if (!declEntity->notation)
+ return XML_ERROR_NO_MEMORY;
+ poolFinish(&dtd->pool);
+ if (unparsedEntityDeclHandler) {
+ *eventEndPP = s;
+ unparsedEntityDeclHandler(handlerArg,
+ declEntity->name,
+ declEntity->base,
+ declEntity->systemId,
+ declEntity->publicId,
+ declEntity->notation);
+ handleDefault = XML_FALSE;
+ }
+ else if (entityDeclHandler) {
+ *eventEndPP = s;
+ entityDeclHandler(handlerArg,
+ declEntity->name,
+ 0,0,0,
+ declEntity->base,
+ declEntity->systemId,
+ declEntity->publicId,
+ declEntity->notation);
+ handleDefault = XML_FALSE;
+ }
+ }
+ break;
+ case XML_ROLE_GENERAL_ENTITY_NAME:
+ {
+ if (XmlPredefinedEntityName(enc, s, next)) {
+ declEntity = NULL;
+ break;
+ }
+ if (dtd->keepProcessing) {
+ const XML_Char *name = poolStoreString(&dtd->pool, enc, s, next);
+ if (!name)
+ return XML_ERROR_NO_MEMORY;
+ declEntity = (ENTITY *)lookup(parser, &dtd->generalEntities, name,
+ sizeof(ENTITY));
+ if (!declEntity)
+ return XML_ERROR_NO_MEMORY;
+ if (declEntity->name != name) {
+ poolDiscard(&dtd->pool);
+ declEntity = NULL;
+ }
+ else {
+ poolFinish(&dtd->pool);
+ declEntity->publicId = NULL;
+ declEntity->is_param = XML_FALSE;
+ /* if we have a parent parser or are reading an internal parameter
+ entity, then the entity declaration is not considered "internal"
+ */
+ declEntity->is_internal = !(parentParser || openInternalEntities);
+ if (entityDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ }
+ else {
+ poolDiscard(&dtd->pool);
+ declEntity = NULL;
+ }
+ }
+ break;
+ case XML_ROLE_PARAM_ENTITY_NAME:
#ifdef XML_DTD
- if (dtd->keepProcessing) {
- const XML_Char *name = poolStoreString(&dtd->pool, enc, s, next);
- if (!name)
- return XML_ERROR_NO_MEMORY;
- declEntity = (ENTITY *)lookup(parser, &dtd->paramEntities,
- name, sizeof(ENTITY));
- if (!declEntity)
- return XML_ERROR_NO_MEMORY;
- if (declEntity->name != name) {
- poolDiscard(&dtd->pool);
- declEntity = NULL;
- }
- else {
- poolFinish(&dtd->pool);
- declEntity->publicId = NULL;
- declEntity->is_param = XML_TRUE;
- /* if we have a parent parser or are reading an internal parameter
- entity, then the entity declaration is not considered "internal"
- */
- declEntity->is_internal = !(parentParser || openInternalEntities);
- if (entityDeclHandler)
- handleDefault = XML_FALSE;
- }
- }
- else {
- poolDiscard(&dtd->pool);
- declEntity = NULL;
- }
+ if (dtd->keepProcessing) {
+ const XML_Char *name = poolStoreString(&dtd->pool, enc, s, next);
+ if (!name)
+ return XML_ERROR_NO_MEMORY;
+ declEntity = (ENTITY *)lookup(parser, &dtd->paramEntities,
+ name, sizeof(ENTITY));
+ if (!declEntity)
+ return XML_ERROR_NO_MEMORY;
+ if (declEntity->name != name) {
+ poolDiscard(&dtd->pool);
+ declEntity = NULL;
+ }
+ else {
+ poolFinish(&dtd->pool);
+ declEntity->publicId = NULL;
+ declEntity->is_param = XML_TRUE;
+ /* if we have a parent parser or are reading an internal parameter
+ entity, then the entity declaration is not considered "internal"
+ */
+ declEntity->is_internal = !(parentParser || openInternalEntities);
+ if (entityDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ }
+ else {
+ poolDiscard(&dtd->pool);
+ declEntity = NULL;
+ }
#else /* not XML_DTD */
- declEntity = NULL;
+ declEntity = NULL;
#endif /* XML_DTD */
- break;
- case XML_ROLE_NOTATION_NAME:
- declNotationPublicId = NULL;
- declNotationName = NULL;
- if (notationDeclHandler) {
- declNotationName = poolStoreString(&tempPool, enc, s, next);
- if (!declNotationName)
- return XML_ERROR_NO_MEMORY;
- poolFinish(&tempPool);
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_NOTATION_PUBLIC_ID:
- if (!XmlIsPublicId(enc, s, next, eventPP))
- return XML_ERROR_PUBLICID;
- if (declNotationName) { /* means notationDeclHandler != NULL */
- XML_Char *tem = poolStoreString(&tempPool,
- enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!tem)
- return XML_ERROR_NO_MEMORY;
- normalizePublicId(tem);
- declNotationPublicId = tem;
- poolFinish(&tempPool);
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_NOTATION_SYSTEM_ID:
- if (declNotationName && notationDeclHandler) {
- const XML_Char *systemId
- = poolStoreString(&tempPool, enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!systemId)
- return XML_ERROR_NO_MEMORY;
- *eventEndPP = s;
- notationDeclHandler(handlerArg,
- declNotationName,
- curBase,
- systemId,
- declNotationPublicId);
- handleDefault = XML_FALSE;
- }
- poolClear(&tempPool);
- break;
- case XML_ROLE_NOTATION_NO_SYSTEM_ID:
- if (declNotationPublicId && notationDeclHandler) {
- *eventEndPP = s;
- notationDeclHandler(handlerArg,
- declNotationName,
- curBase,
- 0,
- declNotationPublicId);
- handleDefault = XML_FALSE;
- }
- poolClear(&tempPool);
- break;
- case XML_ROLE_ERROR:
- switch (tok) {
- case XML_TOK_PARAM_ENTITY_REF:
- /* PE references in internal subset are
- not allowed within declarations. */
- return XML_ERROR_PARAM_ENTITY_REF;
- case XML_TOK_XML_DECL:
- return XML_ERROR_MISPLACED_XML_PI;
- default:
- return XML_ERROR_SYNTAX;
- }
+ break;
+ case XML_ROLE_NOTATION_NAME:
+ declNotationPublicId = NULL;
+ declNotationName = NULL;
+ if (notationDeclHandler) {
+ declNotationName = poolStoreString(&tempPool, enc, s, next);
+ if (!declNotationName)
+ return XML_ERROR_NO_MEMORY;
+ poolFinish(&tempPool);
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_NOTATION_PUBLIC_ID:
+ if (!XmlIsPublicId(enc, s, next, eventPP))
+ return XML_ERROR_PUBLICID;
+ if (declNotationName) { /* means notationDeclHandler != NULL */
+ XML_Char *tem = poolStoreString(&tempPool,
+ enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!tem)
+ return XML_ERROR_NO_MEMORY;
+ normalizePublicId(tem);
+ declNotationPublicId = tem;
+ poolFinish(&tempPool);
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_NOTATION_SYSTEM_ID:
+ if (declNotationName && notationDeclHandler) {
+ const XML_Char *systemId
+ = poolStoreString(&tempPool, enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!systemId)
+ return XML_ERROR_NO_MEMORY;
+ *eventEndPP = s;
+ notationDeclHandler(handlerArg,
+ declNotationName,
+ curBase,
+ systemId,
+ declNotationPublicId);
+ handleDefault = XML_FALSE;
+ }
+ poolClear(&tempPool);
+ break;
+ case XML_ROLE_NOTATION_NO_SYSTEM_ID:
+ if (declNotationPublicId && notationDeclHandler) {
+ *eventEndPP = s;
+ notationDeclHandler(handlerArg,
+ declNotationName,
+ curBase,
+ 0,
+ declNotationPublicId);
+ handleDefault = XML_FALSE;
+ }
+ poolClear(&tempPool);
+ break;
+ case XML_ROLE_ERROR:
+ switch (tok) {
+ case XML_TOK_PARAM_ENTITY_REF:
+ /* PE references in internal subset are
+ not allowed within declarations. */
+ return XML_ERROR_PARAM_ENTITY_REF;
+ case XML_TOK_XML_DECL:
+ return XML_ERROR_MISPLACED_XML_PI;
+ default:
+ return XML_ERROR_SYNTAX;
+ }
#ifdef XML_DTD
- case XML_ROLE_IGNORE_SECT:
- {
- enum XML_Error result;
- if (defaultHandler)
- reportDefault(parser, enc, s, next);
- handleDefault = XML_FALSE;
- result = doIgnoreSection(parser, enc, &next, end, nextPtr, haveMore);
- if (result != XML_ERROR_NONE)
- return result;
- else if (!next) {
- processor = ignoreSectionProcessor;
- return result;
- }
- }
- break;
+ case XML_ROLE_IGNORE_SECT:
+ {
+ enum XML_Error result;
+ if (defaultHandler)
+ reportDefault(parser, enc, s, next);
+ handleDefault = XML_FALSE;
+ result = doIgnoreSection(parser, enc, &next, end, nextPtr, haveMore);
+ if (result != XML_ERROR_NONE)
+ return result;
+ else if (!next) {
+ processor = ignoreSectionProcessor;
+ return result;
+ }
+ }
+ break;
#endif /* XML_DTD */
- case XML_ROLE_GROUP_OPEN:
- if (prologState.level >= groupSize) {
- if (groupSize) {
- char *temp = (char *)REALLOC(groupConnector, groupSize *= 2);
- if (temp == NULL)
- return XML_ERROR_NO_MEMORY;
- groupConnector = temp;
- if (dtd->scaffIndex) {
- int *temp = (int *)REALLOC(dtd->scaffIndex,
- groupSize * sizeof(int));
- if (temp == NULL)
- return XML_ERROR_NO_MEMORY;
- dtd->scaffIndex = temp;
- }
- }
- else {
- groupConnector = (char *)MALLOC(groupSize = 32);
- if (!groupConnector)
- return XML_ERROR_NO_MEMORY;
- }
- }
- groupConnector[prologState.level] = 0;
- if (dtd->in_eldecl) {
- int myindex = nextScaffoldPart(parser);
- if (myindex < 0)
- return XML_ERROR_NO_MEMORY;
- dtd->scaffIndex[dtd->scaffLevel] = myindex;
- dtd->scaffLevel++;
- dtd->scaffold[myindex].type = XML_CTYPE_SEQ;
- if (elementDeclHandler)
- handleDefault = XML_FALSE;
- }
- break;
- case XML_ROLE_GROUP_SEQUENCE:
- if (groupConnector[prologState.level] == ASCII_PIPE)
- return XML_ERROR_SYNTAX;
- groupConnector[prologState.level] = ASCII_COMMA;
- if (dtd->in_eldecl && elementDeclHandler)
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_GROUP_CHOICE:
- if (groupConnector[prologState.level] == ASCII_COMMA)
- return XML_ERROR_SYNTAX;
- if (dtd->in_eldecl
- && !groupConnector[prologState.level]
- && (dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel - 1]].type
- != XML_CTYPE_MIXED)
- ) {
- dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel - 1]].type
- = XML_CTYPE_CHOICE;
- if (elementDeclHandler)
- handleDefault = XML_FALSE;
- }
- groupConnector[prologState.level] = ASCII_PIPE;
- break;
- case XML_ROLE_PARAM_ENTITY_REF:
+ case XML_ROLE_GROUP_OPEN:
+ if (prologState.level >= groupSize) {
+ if (groupSize) {
+ char *temp = (char *)REALLOC(groupConnector, groupSize *= 2);
+ if (temp == NULL)
+ return XML_ERROR_NO_MEMORY;
+ groupConnector = temp;
+ if (dtd->scaffIndex) {
+ int *temp = (int *)REALLOC(dtd->scaffIndex,
+ groupSize * sizeof(int));
+ if (temp == NULL)
+ return XML_ERROR_NO_MEMORY;
+ dtd->scaffIndex = temp;
+ }
+ }
+ else {
+ groupConnector = (char *)MALLOC(groupSize = 32);
+ if (!groupConnector)
+ return XML_ERROR_NO_MEMORY;
+ }
+ }
+ groupConnector[prologState.level] = 0;
+ if (dtd->in_eldecl) {
+ int myindex = nextScaffoldPart(parser);
+ if (myindex < 0)
+ return XML_ERROR_NO_MEMORY;
+ dtd->scaffIndex[dtd->scaffLevel] = myindex;
+ dtd->scaffLevel++;
+ dtd->scaffold[myindex].type = XML_CTYPE_SEQ;
+ if (elementDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ break;
+ case XML_ROLE_GROUP_SEQUENCE:
+ if (groupConnector[prologState.level] == ASCII_PIPE)
+ return XML_ERROR_SYNTAX;
+ groupConnector[prologState.level] = ASCII_COMMA;
+ if (dtd->in_eldecl && elementDeclHandler)
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_GROUP_CHOICE:
+ if (groupConnector[prologState.level] == ASCII_COMMA)
+ return XML_ERROR_SYNTAX;
+ if (dtd->in_eldecl
+ && !groupConnector[prologState.level]
+ && (dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel - 1]].type
+ != XML_CTYPE_MIXED)
+ ) {
+ dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel - 1]].type
+ = XML_CTYPE_CHOICE;
+ if (elementDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ groupConnector[prologState.level] = ASCII_PIPE;
+ break;
+ case XML_ROLE_PARAM_ENTITY_REF:
#ifdef XML_DTD
- case XML_ROLE_INNER_PARAM_ENTITY_REF:
- dtd->hasParamEntityRefs = XML_TRUE;
- if (!paramEntityParsing)
- dtd->keepProcessing = dtd->standalone;
- else {
- const XML_Char *name;
- ENTITY *entity;
- name = poolStoreString(&dtd->pool, enc,
- s + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!name)
- return XML_ERROR_NO_MEMORY;
- entity = (ENTITY *)lookup(parser, &dtd->paramEntities, name, 0);
- poolDiscard(&dtd->pool);
- /* first, determine if a check for an existing declaration is needed;
- if yes, check that the entity exists, and that it is internal,
- otherwise call the skipped entity handler
- */
- if (prologState.documentEntity &&
- (dtd->standalone
- ? !openInternalEntities
- : !dtd->hasParamEntityRefs)) {
- if (!entity)
- return XML_ERROR_UNDEFINED_ENTITY;
- else if (!entity->is_internal)
- return XML_ERROR_ENTITY_DECLARED_IN_PE;
- }
- else if (!entity) {
- dtd->keepProcessing = dtd->standalone;
- /* cannot report skipped entities in declarations */
- if ((role == XML_ROLE_PARAM_ENTITY_REF) && skippedEntityHandler) {
- skippedEntityHandler(handlerArg, name, 1);
- handleDefault = XML_FALSE;
- }
- break;
- }
- if (entity->open)
- return XML_ERROR_RECURSIVE_ENTITY_REF;
- if (entity->textPtr) {
- enum XML_Error result;
- XML_Bool betweenDecl =
- (role == XML_ROLE_PARAM_ENTITY_REF ? XML_TRUE : XML_FALSE);
- result = processInternalEntity(parser, entity, betweenDecl);
- if (result != XML_ERROR_NONE)
- return result;
- handleDefault = XML_FALSE;
- break;
- }
- if (externalEntityRefHandler) {
- dtd->paramEntityRead = XML_FALSE;
- entity->open = XML_TRUE;
- if (!externalEntityRefHandler(externalEntityRefHandlerArg,
- 0,
- entity->base,
- entity->systemId,
- entity->publicId)) {
- entity->open = XML_FALSE;
- return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
- }
- entity->open = XML_FALSE;
- handleDefault = XML_FALSE;
- if (!dtd->paramEntityRead) {
- dtd->keepProcessing = dtd->standalone;
- break;
- }
- }
- else {
- dtd->keepProcessing = dtd->standalone;
- break;
- }
- }
+ case XML_ROLE_INNER_PARAM_ENTITY_REF:
+ dtd->hasParamEntityRefs = XML_TRUE;
+ if (!paramEntityParsing)
+ dtd->keepProcessing = dtd->standalone;
+ else {
+ const XML_Char *name;
+ ENTITY *entity;
+ name = poolStoreString(&dtd->pool, enc,
+ s + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!name)
+ return XML_ERROR_NO_MEMORY;
+ entity = (ENTITY *)lookup(parser, &dtd->paramEntities, name, 0);
+ poolDiscard(&dtd->pool);
+ /* first, determine if a check for an existing declaration is needed;
+ if yes, check that the entity exists, and that it is internal,
+ otherwise call the skipped entity handler
+ */
+ if (prologState.documentEntity &&
+ (dtd->standalone
+ ? !openInternalEntities
+ : !dtd->hasParamEntityRefs)) {
+ if (!entity)
+ return XML_ERROR_UNDEFINED_ENTITY;
+ else if (!entity->is_internal)
+ return XML_ERROR_ENTITY_DECLARED_IN_PE;
+ }
+ else if (!entity) {
+ dtd->keepProcessing = dtd->standalone;
+ /* cannot report skipped entities in declarations */
+ if ((role == XML_ROLE_PARAM_ENTITY_REF) && skippedEntityHandler) {
+ skippedEntityHandler(handlerArg, name, 1);
+ handleDefault = XML_FALSE;
+ }
+ break;
+ }
+ if (entity->open)
+ return XML_ERROR_RECURSIVE_ENTITY_REF;
+ if (entity->textPtr) {
+ enum XML_Error result;
+ XML_Bool betweenDecl =
+ (role == XML_ROLE_PARAM_ENTITY_REF ? XML_TRUE : XML_FALSE);
+ result = processInternalEntity(parser, entity, betweenDecl);
+ if (result != XML_ERROR_NONE)
+ return result;
+ handleDefault = XML_FALSE;
+ break;
+ }
+ if (externalEntityRefHandler) {
+ dtd->paramEntityRead = XML_FALSE;
+ entity->open = XML_TRUE;
+ if (!externalEntityRefHandler(externalEntityRefHandlerArg,
+ 0,
+ entity->base,
+ entity->systemId,
+ entity->publicId)) {
+ entity->open = XML_FALSE;
+ return XML_ERROR_EXTERNAL_ENTITY_HANDLING;
+ }
+ entity->open = XML_FALSE;
+ handleDefault = XML_FALSE;
+ if (!dtd->paramEntityRead) {
+ dtd->keepProcessing = dtd->standalone;
+ break;
+ }
+ }
+ else {
+ dtd->keepProcessing = dtd->standalone;
+ break;
+ }
+ }
#endif /* XML_DTD */
- if (!dtd->standalone &&
- notStandaloneHandler &&
- !notStandaloneHandler(handlerArg))
- return XML_ERROR_NOT_STANDALONE;
- break;
-
- /* Element declaration stuff */
-
- case XML_ROLE_ELEMENT_NAME:
- if (elementDeclHandler) {
- declElementType = getElementType(parser, enc, s, next);
- if (!declElementType)
- return XML_ERROR_NO_MEMORY;
- dtd->scaffLevel = 0;
- dtd->scaffCount = 0;
- dtd->in_eldecl = XML_TRUE;
- handleDefault = XML_FALSE;
- }
- break;
-
- case XML_ROLE_CONTENT_ANY:
- case XML_ROLE_CONTENT_EMPTY:
- if (dtd->in_eldecl) {
- if (elementDeclHandler) {
- XML_Content * content = (XML_Content *) MALLOC(sizeof(XML_Content));
- if (!content)
- return XML_ERROR_NO_MEMORY;
- content->quant = XML_CQUANT_NONE;
- content->name = NULL;
- content->numchildren = 0;
- content->children = NULL;
- content->type = ((role == XML_ROLE_CONTENT_ANY) ?
- XML_CTYPE_ANY :
- XML_CTYPE_EMPTY);
- *eventEndPP = s;
- elementDeclHandler(handlerArg, declElementType->name, content);
- handleDefault = XML_FALSE;
- }
- dtd->in_eldecl = XML_FALSE;
- }
- break;
-
- case XML_ROLE_CONTENT_PCDATA:
- if (dtd->in_eldecl) {
- dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel - 1]].type
- = XML_CTYPE_MIXED;
- if (elementDeclHandler)
- handleDefault = XML_FALSE;
- }
- break;
-
- case XML_ROLE_CONTENT_ELEMENT:
- quant = XML_CQUANT_NONE;
- goto elementContent;
- case XML_ROLE_CONTENT_ELEMENT_OPT:
- quant = XML_CQUANT_OPT;
- goto elementContent;
- case XML_ROLE_CONTENT_ELEMENT_REP:
- quant = XML_CQUANT_REP;
- goto elementContent;
- case XML_ROLE_CONTENT_ELEMENT_PLUS:
- quant = XML_CQUANT_PLUS;
- elementContent:
- if (dtd->in_eldecl) {
- ELEMENT_TYPE *el;
- const XML_Char *name;
- int nameLen;
- const char *nxt = (quant == XML_CQUANT_NONE
- ? next
- : next - enc->minBytesPerChar);
- int myindex = nextScaffoldPart(parser);
- if (myindex < 0)
- return XML_ERROR_NO_MEMORY;
- dtd->scaffold[myindex].type = XML_CTYPE_NAME;
- dtd->scaffold[myindex].quant = quant;
- el = getElementType(parser, enc, s, nxt);
- if (!el)
- return XML_ERROR_NO_MEMORY;
- name = el->name;
- dtd->scaffold[myindex].name = name;
- nameLen = 0;
- for (; name[nameLen++]; );
- dtd->contentStringLen += nameLen;
- if (elementDeclHandler)
- handleDefault = XML_FALSE;
- }
- break;
-
- case XML_ROLE_GROUP_CLOSE:
- quant = XML_CQUANT_NONE;
- goto closeGroup;
- case XML_ROLE_GROUP_CLOSE_OPT:
- quant = XML_CQUANT_OPT;
- goto closeGroup;
- case XML_ROLE_GROUP_CLOSE_REP:
- quant = XML_CQUANT_REP;
- goto closeGroup;
- case XML_ROLE_GROUP_CLOSE_PLUS:
- quant = XML_CQUANT_PLUS;
- closeGroup:
- if (dtd->in_eldecl) {
- if (elementDeclHandler)
- handleDefault = XML_FALSE;
- dtd->scaffLevel--;
- dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel]].quant = quant;
- if (dtd->scaffLevel == 0) {
- if (!handleDefault) {
- XML_Content *model = build_model(parser);
- if (!model)
- return XML_ERROR_NO_MEMORY;
- *eventEndPP = s;
- elementDeclHandler(handlerArg, declElementType->name, model);
- }
- dtd->in_eldecl = XML_FALSE;
- dtd->contentStringLen = 0;
- }
- }
- break;
- /* End element declaration stuff */
-
- case XML_ROLE_PI:
- if (!reportProcessingInstruction(parser, enc, s, next))
- return XML_ERROR_NO_MEMORY;
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_COMMENT:
- if (!reportComment(parser, enc, s, next))
- return XML_ERROR_NO_MEMORY;
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_NONE:
- switch (tok) {
- case XML_TOK_BOM:
- handleDefault = XML_FALSE;
- break;
- }
- break;
- case XML_ROLE_DOCTYPE_NONE:
- if (startDoctypeDeclHandler)
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_ENTITY_NONE:
- if (dtd->keepProcessing && entityDeclHandler)
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_NOTATION_NONE:
- if (notationDeclHandler)
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_ATTLIST_NONE:
- if (dtd->keepProcessing && attlistDeclHandler)
- handleDefault = XML_FALSE;
- break;
- case XML_ROLE_ELEMENT_NONE:
- if (elementDeclHandler)
- handleDefault = XML_FALSE;
- break;
- } /* end of big switch */
-
- if (handleDefault && defaultHandler)
- reportDefault(parser, enc, s, next);
-
- switch (ps_parsing) {
- case XML_SUSPENDED:
- *nextPtr = next;
- return XML_ERROR_NONE;
- case XML_FINISHED:
- return XML_ERROR_ABORTED;
- default:
- s = next;
- tok = XmlPrologTok(enc, s, end, &next);
- }
- }
- /* not reached */
+ if (!dtd->standalone &&
+ notStandaloneHandler &&
+ !notStandaloneHandler(handlerArg))
+ return XML_ERROR_NOT_STANDALONE;
+ break;
+
+ /* Element declaration stuff */
+
+ case XML_ROLE_ELEMENT_NAME:
+ if (elementDeclHandler) {
+ declElementType = getElementType(parser, enc, s, next);
+ if (!declElementType)
+ return XML_ERROR_NO_MEMORY;
+ dtd->scaffLevel = 0;
+ dtd->scaffCount = 0;
+ dtd->in_eldecl = XML_TRUE;
+ handleDefault = XML_FALSE;
+ }
+ break;
+
+ case XML_ROLE_CONTENT_ANY:
+ case XML_ROLE_CONTENT_EMPTY:
+ if (dtd->in_eldecl) {
+ if (elementDeclHandler) {
+ XML_Content * content = (XML_Content *) MALLOC(sizeof(XML_Content));
+ if (!content)
+ return XML_ERROR_NO_MEMORY;
+ content->quant = XML_CQUANT_NONE;
+ content->name = NULL;
+ content->numchildren = 0;
+ content->children = NULL;
+ content->type = ((role == XML_ROLE_CONTENT_ANY) ?
+ XML_CTYPE_ANY :
+ XML_CTYPE_EMPTY);
+ *eventEndPP = s;
+ elementDeclHandler(handlerArg, declElementType->name, content);
+ handleDefault = XML_FALSE;
+ }
+ dtd->in_eldecl = XML_FALSE;
+ }
+ break;
+
+ case XML_ROLE_CONTENT_PCDATA:
+ if (dtd->in_eldecl) {
+ dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel - 1]].type
+ = XML_CTYPE_MIXED;
+ if (elementDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ break;
+
+ case XML_ROLE_CONTENT_ELEMENT:
+ quant = XML_CQUANT_NONE;
+ goto elementContent;
+ case XML_ROLE_CONTENT_ELEMENT_OPT:
+ quant = XML_CQUANT_OPT;
+ goto elementContent;
+ case XML_ROLE_CONTENT_ELEMENT_REP:
+ quant = XML_CQUANT_REP;
+ goto elementContent;
+ case XML_ROLE_CONTENT_ELEMENT_PLUS:
+ quant = XML_CQUANT_PLUS;
+ elementContent:
+ if (dtd->in_eldecl) {
+ ELEMENT_TYPE *el;
+ const XML_Char *name;
+ int nameLen;
+ const char *nxt = (quant == XML_CQUANT_NONE
+ ? next
+ : next - enc->minBytesPerChar);
+ int myindex = nextScaffoldPart(parser);
+ if (myindex < 0)
+ return XML_ERROR_NO_MEMORY;
+ dtd->scaffold[myindex].type = XML_CTYPE_NAME;
+ dtd->scaffold[myindex].quant = quant;
+ el = getElementType(parser, enc, s, nxt);
+ if (!el)
+ return XML_ERROR_NO_MEMORY;
+ name = el->name;
+ dtd->scaffold[myindex].name = name;
+ nameLen = 0;
+ for (; name[nameLen++]; );
+ dtd->contentStringLen += nameLen;
+ if (elementDeclHandler)
+ handleDefault = XML_FALSE;
+ }
+ break;
+
+ case XML_ROLE_GROUP_CLOSE:
+ quant = XML_CQUANT_NONE;
+ goto closeGroup;
+ case XML_ROLE_GROUP_CLOSE_OPT:
+ quant = XML_CQUANT_OPT;
+ goto closeGroup;
+ case XML_ROLE_GROUP_CLOSE_REP:
+ quant = XML_CQUANT_REP;
+ goto closeGroup;
+ case XML_ROLE_GROUP_CLOSE_PLUS:
+ quant = XML_CQUANT_PLUS;
+ closeGroup:
+ if (dtd->in_eldecl) {
+ if (elementDeclHandler)
+ handleDefault = XML_FALSE;
+ dtd->scaffLevel--;
+ dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel]].quant = quant;
+ if (dtd->scaffLevel == 0) {
+ if (!handleDefault) {
+ XML_Content *model = build_model(parser);
+ if (!model)
+ return XML_ERROR_NO_MEMORY;
+ *eventEndPP = s;
+ elementDeclHandler(handlerArg, declElementType->name, model);
+ }
+ dtd->in_eldecl = XML_FALSE;
+ dtd->contentStringLen = 0;
+ }
+ }
+ break;
+ /* End element declaration stuff */
+
+ case XML_ROLE_PI:
+ if (!reportProcessingInstruction(parser, enc, s, next))
+ return XML_ERROR_NO_MEMORY;
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_COMMENT:
+ if (!reportComment(parser, enc, s, next))
+ return XML_ERROR_NO_MEMORY;
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_NONE:
+ switch (tok) {
+ case XML_TOK_BOM:
+ handleDefault = XML_FALSE;
+ break;
+ }
+ break;
+ case XML_ROLE_DOCTYPE_NONE:
+ if (startDoctypeDeclHandler)
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_ENTITY_NONE:
+ if (dtd->keepProcessing && entityDeclHandler)
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_NOTATION_NONE:
+ if (notationDeclHandler)
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_ATTLIST_NONE:
+ if (dtd->keepProcessing && attlistDeclHandler)
+ handleDefault = XML_FALSE;
+ break;
+ case XML_ROLE_ELEMENT_NONE:
+ if (elementDeclHandler)
+ handleDefault = XML_FALSE;
+ break;
+ } /* end of big switch */
+
+ if (handleDefault && defaultHandler)
+ reportDefault(parser, enc, s, next);
+
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ *nextPtr = next;
+ return XML_ERROR_NONE;
+ case XML_FINISHED:
+ return XML_ERROR_ABORTED;
+ default:
+ s = next;
+ tok = XmlPrologTok(enc, s, end, &next);
+ }
+ }
+ /* not reached */
}
static enum XML_Error PTRCALL
epilogProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
-{
- processor = epilogProcessor;
- eventPtr = s;
- for (;;) {
- const char *next = NULL;
- int tok = XmlPrologTok(encoding, s, end, &next);
- eventEndPtr = next;
- switch (tok) {
- /* report partial linebreak - it might be the last token */
- case -XML_TOK_PROLOG_S:
- if (defaultHandler) {
- reportDefault(parser, encoding, s, next);
- if (ps_parsing == XML_FINISHED)
- return XML_ERROR_ABORTED;
- }
- *nextPtr = next;
- return XML_ERROR_NONE;
- case XML_TOK_NONE:
- *nextPtr = s;
- return XML_ERROR_NONE;
- case XML_TOK_PROLOG_S:
- if (defaultHandler)
- reportDefault(parser, encoding, s, next);
- break;
- case XML_TOK_PI:
- if (!reportProcessingInstruction(parser, encoding, s, next))
- return XML_ERROR_NO_MEMORY;
- break;
- case XML_TOK_COMMENT:
- if (!reportComment(parser, encoding, s, next))
- return XML_ERROR_NO_MEMORY;
- break;
- case XML_TOK_INVALID:
- eventPtr = next;
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL:
- if (!ps_finalBuffer) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_UNCLOSED_TOKEN;
- case XML_TOK_PARTIAL_CHAR:
- if (!ps_finalBuffer) {
- *nextPtr = s;
- return XML_ERROR_NONE;
- }
- return XML_ERROR_PARTIAL_CHAR;
- default:
- return XML_ERROR_JUNK_AFTER_DOC_ELEMENT;
- }
- eventPtr = s = next;
- switch (ps_parsing) {
- case XML_SUSPENDED:
- *nextPtr = next;
- return XML_ERROR_NONE;
- case XML_FINISHED:
- return XML_ERROR_ABORTED;
- default: ;
- }
- }
+ const char *s,
+ const char *end,
+ const char **nextPtr)
+{
+ processor = epilogProcessor;
+ eventPtr = s;
+ for (;;) {
+ const char *next = NULL;
+ int tok = XmlPrologTok(encoding, s, end, &next);
+ eventEndPtr = next;
+ switch (tok) {
+ /* report partial linebreak - it might be the last token */
+ case -XML_TOK_PROLOG_S:
+ if (defaultHandler) {
+ reportDefault(parser, encoding, s, next);
+ if (ps_parsing == XML_FINISHED)
+ return XML_ERROR_ABORTED;
+ }
+ *nextPtr = next;
+ return XML_ERROR_NONE;
+ case XML_TOK_NONE:
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ case XML_TOK_PROLOG_S:
+ if (defaultHandler)
+ reportDefault(parser, encoding, s, next);
+ break;
+ case XML_TOK_PI:
+ if (!reportProcessingInstruction(parser, encoding, s, next))
+ return XML_ERROR_NO_MEMORY;
+ break;
+ case XML_TOK_COMMENT:
+ if (!reportComment(parser, encoding, s, next))
+ return XML_ERROR_NO_MEMORY;
+ break;
+ case XML_TOK_INVALID:
+ eventPtr = next;
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL:
+ if (!ps_finalBuffer) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_UNCLOSED_TOKEN;
+ case XML_TOK_PARTIAL_CHAR:
+ if (!ps_finalBuffer) {
+ *nextPtr = s;
+ return XML_ERROR_NONE;
+ }
+ return XML_ERROR_PARTIAL_CHAR;
+ default:
+ return XML_ERROR_JUNK_AFTER_DOC_ELEMENT;
+ }
+ eventPtr = s = next;
+ switch (ps_parsing) {
+ case XML_SUSPENDED:
+ *nextPtr = next;
+ return XML_ERROR_NONE;
+ case XML_FINISHED:
+ return XML_ERROR_ABORTED;
+ default: ;
+ }
+ }
}
static enum XML_Error
processInternalEntity(XML_Parser parser, ENTITY *entity,
- XML_Bool betweenDecl)
-{
- const char *textStart, *textEnd;
- const char *next;
- enum XML_Error result;
- OPEN_INTERNAL_ENTITY *openEntity;
-
- if (freeInternalEntities) {
- openEntity = freeInternalEntities;
- freeInternalEntities = openEntity->next;
- }
- else {
- openEntity = (OPEN_INTERNAL_ENTITY *)MALLOC(sizeof(OPEN_INTERNAL_ENTITY));
- if (!openEntity)
- return XML_ERROR_NO_MEMORY;
- }
- entity->open = XML_TRUE;
- entity->processed = 0;
- openEntity->next = openInternalEntities;
- openInternalEntities = openEntity;
- openEntity->entity = entity;
- openEntity->startTagLevel = tagLevel;
- openEntity->betweenDecl = betweenDecl;
- openEntity->internalEventPtr = NULL;
- openEntity->internalEventEndPtr = NULL;
- textStart = (char *)entity->textPtr;
- textEnd = (char *)(entity->textPtr + entity->textLen);
+ XML_Bool betweenDecl)
+{
+ const char *textStart, *textEnd;
+ const char *next;
+ enum XML_Error result;
+ OPEN_INTERNAL_ENTITY *openEntity;
+
+ if (freeInternalEntities) {
+ openEntity = freeInternalEntities;
+ freeInternalEntities = openEntity->next;
+ }
+ else {
+ openEntity = (OPEN_INTERNAL_ENTITY *)MALLOC(sizeof(OPEN_INTERNAL_ENTITY));
+ if (!openEntity)
+ return XML_ERROR_NO_MEMORY;
+ }
+ entity->open = XML_TRUE;
+ entity->processed = 0;
+ openEntity->next = openInternalEntities;
+ openInternalEntities = openEntity;
+ openEntity->entity = entity;
+ openEntity->startTagLevel = tagLevel;
+ openEntity->betweenDecl = betweenDecl;
+ openEntity->internalEventPtr = NULL;
+ openEntity->internalEventEndPtr = NULL;
+ textStart = (char *)entity->textPtr;
+ textEnd = (char *)(entity->textPtr + entity->textLen);
#ifdef XML_DTD
- if (entity->is_param) {
- int tok = XmlPrologTok(internalEncoding, textStart, textEnd, &next);
- result = doProlog(parser, internalEncoding, textStart, textEnd, tok,
- next, &next, XML_FALSE);
- }
- else
+ if (entity->is_param) {
+ int tok = XmlPrologTok(internalEncoding, textStart, textEnd, &next);
+ result = doProlog(parser, internalEncoding, textStart, textEnd, tok,
+ next, &next, XML_FALSE);
+ }
+ else
#endif /* XML_DTD */
- result = doContent(parser, tagLevel, internalEncoding, textStart,
- textEnd, &next, XML_FALSE);
-
- if (result == XML_ERROR_NONE) {
- if (textEnd != next && ps_parsing == XML_SUSPENDED) {
- entity->processed = (int)(next - textStart);
- processor = internalEntityProcessor;
- }
- else {
- entity->open = XML_FALSE;
- openInternalEntities = openEntity->next;
- /* put openEntity back in list of free instances */
- openEntity->next = freeInternalEntities;
- freeInternalEntities = openEntity;
- }
- }
- return result;
+ result = doContent(parser, tagLevel, internalEncoding, textStart,
+ textEnd, &next, XML_FALSE);
+
+ if (result == XML_ERROR_NONE) {
+ if (textEnd != next && ps_parsing == XML_SUSPENDED) {
+ entity->processed = (int)(next - textStart);
+ processor = internalEntityProcessor;
+ }
+ else {
+ entity->open = XML_FALSE;
+ openInternalEntities = openEntity->next;
+ /* put openEntity back in list of free instances */
+ openEntity->next = freeInternalEntities;
+ freeInternalEntities = openEntity;
+ }
+ }
+ return result;
}
static enum XML_Error PTRCALL
internalEntityProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
-{
- ENTITY *entity;
- const char *textStart, *textEnd;
- const char *next;
- enum XML_Error result;
- OPEN_INTERNAL_ENTITY *openEntity = openInternalEntities;
- if (!openEntity)
- return XML_ERROR_UNEXPECTED_STATE;
-
- entity = openEntity->entity;
- textStart = ((char *)entity->textPtr) + entity->processed;
- textEnd = (char *)(entity->textPtr + entity->textLen);
+ const char *s,
+ const char *end,
+ const char **nextPtr)
+{
+ ENTITY *entity;
+ const char *textStart, *textEnd;
+ const char *next;
+ enum XML_Error result;
+ OPEN_INTERNAL_ENTITY *openEntity = openInternalEntities;
+ if (!openEntity)
+ return XML_ERROR_UNEXPECTED_STATE;
+
+ entity = openEntity->entity;
+ textStart = ((char *)entity->textPtr) + entity->processed;
+ textEnd = (char *)(entity->textPtr + entity->textLen);
#ifdef XML_DTD
- if (entity->is_param) {
- int tok = XmlPrologTok(internalEncoding, textStart, textEnd, &next);
- result = doProlog(parser, internalEncoding, textStart, textEnd, tok,
- next, &next, XML_FALSE);
- }
- else
+ if (entity->is_param) {
+ int tok = XmlPrologTok(internalEncoding, textStart, textEnd, &next);
+ result = doProlog(parser, internalEncoding, textStart, textEnd, tok,
+ next, &next, XML_FALSE);
+ }
+ else
#endif /* XML_DTD */
- result = doContent(parser, openEntity->startTagLevel, internalEncoding,
- textStart, textEnd, &next, XML_FALSE);
-
- if (result != XML_ERROR_NONE)
- return result;
- else if (textEnd != next && ps_parsing == XML_SUSPENDED) {
- entity->processed = (int)(next - (char *)entity->textPtr);
- return result;
- }
- else {
- entity->open = XML_FALSE;
- openInternalEntities = openEntity->next;
- /* put openEntity back in list of free instances */
- openEntity->next = freeInternalEntities;
- freeInternalEntities = openEntity;
- }
+ result = doContent(parser, openEntity->startTagLevel, internalEncoding,
+ textStart, textEnd, &next, XML_FALSE);
+
+ if (result != XML_ERROR_NONE)
+ return result;
+ else if (textEnd != next && ps_parsing == XML_SUSPENDED) {
+ entity->processed = (int)(next - (char *)entity->textPtr);
+ return result;
+ }
+ else {
+ entity->open = XML_FALSE;
+ openInternalEntities = openEntity->next;
+ /* put openEntity back in list of free instances */
+ openEntity->next = freeInternalEntities;
+ freeInternalEntities = openEntity;
+ }
#ifdef XML_DTD
- if (entity->is_param) {
- int tok;
- processor = prologProcessor;
- tok = XmlPrologTok(encoding, s, end, &next);
- return doProlog(parser, encoding, s, end, tok, next, nextPtr,
- (XML_Bool)!ps_finalBuffer);
- }
- else
+ if (entity->is_param) {
+ int tok;
+ processor = prologProcessor;
+ tok = XmlPrologTok(encoding, s, end, &next);
+ return doProlog(parser, encoding, s, end, tok, next, nextPtr,
+ (XML_Bool)!ps_finalBuffer);
+ }
+ else
#endif /* XML_DTD */
- {
- processor = contentProcessor;
- /* see externalEntityContentProcessor vs contentProcessor */
- return doContent(parser, parentParser ? 1 : 0, encoding, s, end,
- nextPtr, (XML_Bool)!ps_finalBuffer);
- }
+ {
+ processor = contentProcessor;
+ /* see externalEntityContentProcessor vs contentProcessor */
+ return doContent(parser, parentParser ? 1 : 0, encoding, s, end,
+ nextPtr, (XML_Bool)!ps_finalBuffer);
+ }
}
static enum XML_Error PTRCALL
errorProcessor(XML_Parser parser,
- const char *s,
- const char *end,
- const char **nextPtr)
+ const char *s,
+ const char *end,
+ const char **nextPtr)
{
- return errorCode;
+ return errorCode;
}
static enum XML_Error
storeAttributeValue(XML_Parser parser, const ENCODING *enc, XML_Bool isCdata,
- const char *ptr, const char *end,
- STRING_POOL *pool)
+ const char *ptr, const char *end,
+ STRING_POOL *pool)
{
- enum XML_Error result = appendAttributeValue(parser, enc, isCdata, ptr,
- end, pool);
- if (result)
- return result;
- if (!isCdata && poolLength(pool) && poolLastChar(pool) == 0x20)
- poolChop(pool);
- if (!poolAppendChar(pool, XML_T('\0')))
- return XML_ERROR_NO_MEMORY;
- return XML_ERROR_NONE;
+ enum XML_Error result = appendAttributeValue(parser, enc, isCdata, ptr,
+ end, pool);
+ if (result)
+ return result;
+ if (!isCdata && poolLength(pool) && poolLastChar(pool) == 0x20)
+ poolChop(pool);
+ if (!poolAppendChar(pool, XML_T('\0')))
+ return XML_ERROR_NO_MEMORY;
+ return XML_ERROR_NONE;
}
static enum XML_Error
appendAttributeValue(XML_Parser parser, const ENCODING *enc, XML_Bool isCdata,
- const char *ptr, const char *end,
- STRING_POOL *pool)
-{
- DTD * const dtd = _dtd; /* save one level of indirection */
- for (;;) {
- const char *next;
- int tok = XmlAttributeValueTok(enc, ptr, end, &next);
- switch (tok) {
- case XML_TOK_NONE:
- return XML_ERROR_NONE;
- case XML_TOK_INVALID:
- if (enc == encoding)
- eventPtr = next;
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_PARTIAL:
- if (enc == encoding)
- eventPtr = ptr;
- return XML_ERROR_INVALID_TOKEN;
- case XML_TOK_CHAR_REF:
- {
- XML_Char buf[XML_ENCODE_MAX];
- int i;
- int n = XmlCharRefNumber(enc, ptr);
- if (n < 0) {
- if (enc == encoding)
- eventPtr = ptr;
- return XML_ERROR_BAD_CHAR_REF;
- }
- if (!isCdata
- && n == 0x20 /* space */
- && (poolLength(pool) == 0 || poolLastChar(pool) == 0x20))
- break;
- n = XmlEncode(n, (ICHAR *)buf);
- if (!n) {
- if (enc == encoding)
- eventPtr = ptr;
- return XML_ERROR_BAD_CHAR_REF;
- }
- for (i = 0; i < n; i++) {
- if (!poolAppendChar(pool, buf[i]))
- return XML_ERROR_NO_MEMORY;
- }
- }
- break;
- case XML_TOK_DATA_CHARS:
- if (!poolAppend(pool, enc, ptr, next))
- return XML_ERROR_NO_MEMORY;
- break;
- case XML_TOK_TRAILING_CR:
- next = ptr + enc->minBytesPerChar;
- /* fall through */
- case XML_TOK_ATTRIBUTE_VALUE_S:
- case XML_TOK_DATA_NEWLINE:
- if (!isCdata && (poolLength(pool) == 0 || poolLastChar(pool) == 0x20))
- break;
- if (!poolAppendChar(pool, 0x20))
- return XML_ERROR_NO_MEMORY;
- break;
- case XML_TOK_ENTITY_REF:
- {
- const XML_Char *name;
- ENTITY *entity;
- char checkEntityDecl;
- XML_Char ch = (XML_Char) XmlPredefinedEntityName(enc,
- ptr + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (ch) {
- if (!poolAppendChar(pool, ch))
- return XML_ERROR_NO_MEMORY;
- break;
- }
- name = poolStoreString(&temp2Pool, enc,
- ptr + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!name)
- return XML_ERROR_NO_MEMORY;
- entity = (ENTITY *)lookup(parser, &dtd->generalEntities, name, 0);
- poolDiscard(&temp2Pool);
- /* First, determine if a check for an existing declaration is needed;
- if yes, check that the entity exists, and that it is internal.
- */
- if (pool == &dtd->pool) /* are we called from prolog? */
- checkEntityDecl =
+ const char *ptr, const char *end,
+ STRING_POOL *pool)
+{
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ for (;;) {
+ const char *next;
+ int tok = XmlAttributeValueTok(enc, ptr, end, &next);
+ switch (tok) {
+ case XML_TOK_NONE:
+ return XML_ERROR_NONE;
+ case XML_TOK_INVALID:
+ if (enc == encoding)
+ eventPtr = next;
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_PARTIAL:
+ if (enc == encoding)
+ eventPtr = ptr;
+ return XML_ERROR_INVALID_TOKEN;
+ case XML_TOK_CHAR_REF:
+ {
+ XML_Char buf[XML_ENCODE_MAX];
+ int i;
+ int n = XmlCharRefNumber(enc, ptr);
+ if (n < 0) {
+ if (enc == encoding)
+ eventPtr = ptr;
+ return XML_ERROR_BAD_CHAR_REF;
+ }
+ if (!isCdata
+ && n == 0x20 /* space */
+ && (poolLength(pool) == 0 || poolLastChar(pool) == 0x20))
+ break;
+ n = XmlEncode(n, (ICHAR *)buf);
+ if (!n) {
+ if (enc == encoding)
+ eventPtr = ptr;
+ return XML_ERROR_BAD_CHAR_REF;
+ }
+ for (i = 0; i < n; i++) {
+ if (!poolAppendChar(pool, buf[i]))
+ return XML_ERROR_NO_MEMORY;
+ }
+ }
+ break;
+ case XML_TOK_DATA_CHARS:
+ if (!poolAppend(pool, enc, ptr, next))
+ return XML_ERROR_NO_MEMORY;
+ break;
+ case XML_TOK_TRAILING_CR:
+ next = ptr + enc->minBytesPerChar;
+ /* fall through */
+ case XML_TOK_ATTRIBUTE_VALUE_S:
+ case XML_TOK_DATA_NEWLINE:
+ if (!isCdata && (poolLength(pool) == 0 || poolLastChar(pool) == 0x20))
+ break;
+ if (!poolAppendChar(pool, 0x20))
+ return XML_ERROR_NO_MEMORY;
+ break;
+ case XML_TOK_ENTITY_REF:
+ {
+ const XML_Char *name;
+ ENTITY *entity;
+ char checkEntityDecl;
+ XML_Char ch = (XML_Char) XmlPredefinedEntityName(enc,
+ ptr + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (ch) {
+ if (!poolAppendChar(pool, ch))
+ return XML_ERROR_NO_MEMORY;
+ break;
+ }
+ name = poolStoreString(&temp2Pool, enc,
+ ptr + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!name)
+ return XML_ERROR_NO_MEMORY;
+ entity = (ENTITY *)lookup(parser, &dtd->generalEntities, name, 0);
+ poolDiscard(&temp2Pool);
+ /* First, determine if a check for an existing declaration is needed;
+ if yes, check that the entity exists, and that it is internal.
+ */
+ if (pool == &dtd->pool) /* are we called from prolog? */
+ checkEntityDecl =
#ifdef XML_DTD
- prologState.documentEntity &&
+ prologState.documentEntity &&
#endif /* XML_DTD */
- (dtd->standalone
- ? !openInternalEntities
- : !dtd->hasParamEntityRefs);
- else /* if (pool == &tempPool): we are called from content */
- checkEntityDecl = !dtd->hasParamEntityRefs || dtd->standalone;
- if (checkEntityDecl) {
- if (!entity)
- return XML_ERROR_UNDEFINED_ENTITY;
- else if (!entity->is_internal)
- return XML_ERROR_ENTITY_DECLARED_IN_PE;
- }
- else if (!entity) {
- /* Cannot report skipped entity here - see comments on
- skippedEntityHandler.
- if (skippedEntityHandler)
- skippedEntityHandler(handlerArg, name, 0);
- */
- /* Cannot call the default handler because this would be
- out of sync with the call to the startElementHandler.
- if ((pool == &tempPool) && defaultHandler)
- reportDefault(parser, enc, ptr, next);
- */
- break;
- }
- if (entity->open) {
- if (enc == encoding)
- eventPtr = ptr;
- return XML_ERROR_RECURSIVE_ENTITY_REF;
- }
- if (entity->notation) {
- if (enc == encoding)
- eventPtr = ptr;
- return XML_ERROR_BINARY_ENTITY_REF;
- }
- if (!entity->textPtr) {
- if (enc == encoding)
- eventPtr = ptr;
- return XML_ERROR_ATTRIBUTE_EXTERNAL_ENTITY_REF;
- }
- else {
- enum XML_Error result;
- const XML_Char *textEnd = entity->textPtr + entity->textLen;
- entity->open = XML_TRUE;
- result = appendAttributeValue(parser, internalEncoding, isCdata,
- (char *)entity->textPtr,
- (char *)textEnd, pool);
- entity->open = XML_FALSE;
- if (result)
- return result;
- }
- }
- break;
- default:
- if (enc == encoding)
- eventPtr = ptr;
- return XML_ERROR_UNEXPECTED_STATE;
- }
- ptr = next;
- }
- /* not reached */
+ (dtd->standalone
+ ? !openInternalEntities
+ : !dtd->hasParamEntityRefs);
+ else /* if (pool == &tempPool): we are called from content */
+ checkEntityDecl = !dtd->hasParamEntityRefs || dtd->standalone;
+ if (checkEntityDecl) {
+ if (!entity)
+ return XML_ERROR_UNDEFINED_ENTITY;
+ else if (!entity->is_internal)
+ return XML_ERROR_ENTITY_DECLARED_IN_PE;
+ }
+ else if (!entity) {
+ /* Cannot report skipped entity here - see comments on
+ skippedEntityHandler.
+ if (skippedEntityHandler)
+ skippedEntityHandler(handlerArg, name, 0);
+ */
+ /* Cannot call the default handler because this would be
+ out of sync with the call to the startElementHandler.
+ if ((pool == &tempPool) && defaultHandler)
+ reportDefault(parser, enc, ptr, next);
+ */
+ break;
+ }
+ if (entity->open) {
+ if (enc == encoding)
+ eventPtr = ptr;
+ return XML_ERROR_RECURSIVE_ENTITY_REF;
+ }
+ if (entity->notation) {
+ if (enc == encoding)
+ eventPtr = ptr;
+ return XML_ERROR_BINARY_ENTITY_REF;
+ }
+ if (!entity->textPtr) {
+ if (enc == encoding)
+ eventPtr = ptr;
+ return XML_ERROR_ATTRIBUTE_EXTERNAL_ENTITY_REF;
+ }
+ else {
+ enum XML_Error result;
+ const XML_Char *textEnd = entity->textPtr + entity->textLen;
+ entity->open = XML_TRUE;
+ result = appendAttributeValue(parser, internalEncoding, isCdata,
+ (char *)entity->textPtr,
+ (char *)textEnd, pool);
+ entity->open = XML_FALSE;
+ if (result)
+ return result;
+ }
+ }
+ break;
+ default:
+ if (enc == encoding)
+ eventPtr = ptr;
+ return XML_ERROR_UNEXPECTED_STATE;
+ }
+ ptr = next;
+ }
+ /* not reached */
}
static enum XML_Error
storeEntityValue(XML_Parser parser,
- const ENCODING *enc,
- const char *entityTextPtr,
- const char *entityTextEnd)
+ const ENCODING *enc,
+ const char *entityTextPtr,
+ const char *entityTextEnd)
{
- DTD * const dtd = _dtd; /* save one level of indirection */
- STRING_POOL *pool = &(dtd->entityValuePool);
- enum XML_Error result = XML_ERROR_NONE;
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ STRING_POOL *pool = &(dtd->entityValuePool);
+ enum XML_Error result = XML_ERROR_NONE;
#ifdef XML_DTD
- int oldInEntityValue = prologState.inEntityValue;
- prologState.inEntityValue = 1;
+ int oldInEntityValue = prologState.inEntityValue;
+ prologState.inEntityValue = 1;
#endif /* XML_DTD */
- /* never return Null for the value argument in EntityDeclHandler,
- since this would indicate an external entity; therefore we
- have to make sure that entityValuePool.start is not null */
- if (!pool->blocks) {
- if (!poolGrow(pool))
- return XML_ERROR_NO_MEMORY;
- }
-
- for (;;) {
- const char *next;
- int tok = XmlEntityValueTok(enc, entityTextPtr, entityTextEnd, &next);
- switch (tok) {
- case XML_TOK_PARAM_ENTITY_REF:
+ /* never return Null for the value argument in EntityDeclHandler,
+ since this would indicate an external entity; therefore we
+ have to make sure that entityValuePool.start is not null */
+ if (!pool->blocks) {
+ if (!poolGrow(pool))
+ return XML_ERROR_NO_MEMORY;
+ }
+
+ for (;;) {
+ const char *next;
+ int tok = XmlEntityValueTok(enc, entityTextPtr, entityTextEnd, &next);
+ switch (tok) {
+ case XML_TOK_PARAM_ENTITY_REF:
#ifdef XML_DTD
- if (isParamEntity || enc != encoding) {
- const XML_Char *name;
- ENTITY *entity;
- name = poolStoreString(&tempPool, enc,
- entityTextPtr + enc->minBytesPerChar,
- next - enc->minBytesPerChar);
- if (!name) {
- result = XML_ERROR_NO_MEMORY;
- goto endEntityValue;
- }
- entity = (ENTITY *)lookup(parser, &dtd->paramEntities, name, 0);
- poolDiscard(&tempPool);
- if (!entity) {
- /* not a well-formedness error - see XML 1.0: WFC Entity Declared */
- /* cannot report skipped entity here - see comments on
- skippedEntityHandler
- if (skippedEntityHandler)
- skippedEntityHandler(handlerArg, name, 0);
- */
- dtd->keepProcessing = dtd->standalone;
- goto endEntityValue;
- }
- if (entity->open) {
- if (enc == encoding)
- eventPtr = entityTextPtr;
- result = XML_ERROR_RECURSIVE_ENTITY_REF;
- goto endEntityValue;
- }
- if (entity->systemId) {
- if (externalEntityRefHandler) {
- dtd->paramEntityRead = XML_FALSE;
- entity->open = XML_TRUE;
- if (!externalEntityRefHandler(externalEntityRefHandlerArg,
- 0,
- entity->base,
- entity->systemId,
- entity->publicId)) {
- entity->open = XML_FALSE;
- result = XML_ERROR_EXTERNAL_ENTITY_HANDLING;
- goto endEntityValue;
- }
- entity->open = XML_FALSE;
- if (!dtd->paramEntityRead)
- dtd->keepProcessing = dtd->standalone;
- }
- else
- dtd->keepProcessing = dtd->standalone;
- }
- else {
- entity->open = XML_TRUE;
- result = storeEntityValue(parser,
- internalEncoding,
- (char *)entity->textPtr,
- (char *)(entity->textPtr
- + entity->textLen));
- entity->open = XML_FALSE;
- if (result)
- goto endEntityValue;
- }
- break;
- }
+ if (isParamEntity || enc != encoding) {
+ const XML_Char *name;
+ ENTITY *entity;
+ name = poolStoreString(&tempPool, enc,
+ entityTextPtr + enc->minBytesPerChar,
+ next - enc->minBytesPerChar);
+ if (!name) {
+ result = XML_ERROR_NO_MEMORY;
+ goto endEntityValue;
+ }
+ entity = (ENTITY *)lookup(parser, &dtd->paramEntities, name, 0);
+ poolDiscard(&tempPool);
+ if (!entity) {
+ /* not a well-formedness error - see XML 1.0: WFC Entity Declared */
+ /* cannot report skipped entity here - see comments on
+ skippedEntityHandler
+ if (skippedEntityHandler)
+ skippedEntityHandler(handlerArg, name, 0);
+ */
+ dtd->keepProcessing = dtd->standalone;
+ goto endEntityValue;
+ }
+ if (entity->open) {
+ if (enc == encoding)
+ eventPtr = entityTextPtr;
+ result = XML_ERROR_RECURSIVE_ENTITY_REF;
+ goto endEntityValue;
+ }
+ if (entity->systemId) {
+ if (externalEntityRefHandler) {
+ dtd->paramEntityRead = XML_FALSE;
+ entity->open = XML_TRUE;
+ if (!externalEntityRefHandler(externalEntityRefHandlerArg,
+ 0,
+ entity->base,
+ entity->systemId,
+ entity->publicId)) {
+ entity->open = XML_FALSE;
+ result = XML_ERROR_EXTERNAL_ENTITY_HANDLING;
+ goto endEntityValue;
+ }
+ entity->open = XML_FALSE;
+ if (!dtd->paramEntityRead)
+ dtd->keepProcessing = dtd->standalone;
+ }
+ else
+ dtd->keepProcessing = dtd->standalone;
+ }
+ else {
+ entity->open = XML_TRUE;
+ result = storeEntityValue(parser,
+ internalEncoding,
+ (char *)entity->textPtr,
+ (char *)(entity->textPtr
+ + entity->textLen));
+ entity->open = XML_FALSE;
+ if (result)
+ goto endEntityValue;
+ }
+ break;
+ }
#endif /* XML_DTD */
- /* In the internal subset, PE references are not legal
- within markup declarations, e.g entity values in this case. */
- eventPtr = entityTextPtr;
- result = XML_ERROR_PARAM_ENTITY_REF;
- goto endEntityValue;
- case XML_TOK_NONE:
- result = XML_ERROR_NONE;
- goto endEntityValue;
- case XML_TOK_ENTITY_REF:
- case XML_TOK_DATA_CHARS:
- if (!poolAppend(pool, enc, entityTextPtr, next)) {
- result = XML_ERROR_NO_MEMORY;
- goto endEntityValue;
- }
- break;
- case XML_TOK_TRAILING_CR:
- next = entityTextPtr + enc->minBytesPerChar;
- /* fall through */
- case XML_TOK_DATA_NEWLINE:
- if (pool->end == pool->ptr && !poolGrow(pool)) {
- result = XML_ERROR_NO_MEMORY;
- goto endEntityValue;
- }
- *(pool->ptr)++ = 0xA;
- break;
- case XML_TOK_CHAR_REF:
- {
- XML_Char buf[XML_ENCODE_MAX];
- int i;
- int n = XmlCharRefNumber(enc, entityTextPtr);
- if (n < 0) {
- if (enc == encoding)
- eventPtr = entityTextPtr;
- result = XML_ERROR_BAD_CHAR_REF;
- goto endEntityValue;
- }
- n = XmlEncode(n, (ICHAR *)buf);
- if (!n) {
- if (enc == encoding)
- eventPtr = entityTextPtr;
- result = XML_ERROR_BAD_CHAR_REF;
- goto endEntityValue;
- }
- for (i = 0; i < n; i++) {
- if (pool->end == pool->ptr && !poolGrow(pool)) {
- result = XML_ERROR_NO_MEMORY;
- goto endEntityValue;
- }
- *(pool->ptr)++ = buf[i];
- }
- }
- break;
- case XML_TOK_PARTIAL:
- if (enc == encoding)
- eventPtr = entityTextPtr;
- result = XML_ERROR_INVALID_TOKEN;
- goto endEntityValue;
- case XML_TOK_INVALID:
- if (enc == encoding)
- eventPtr = next;
- result = XML_ERROR_INVALID_TOKEN;
- goto endEntityValue;
- default:
- if (enc == encoding)
- eventPtr = entityTextPtr;
- result = XML_ERROR_UNEXPECTED_STATE;
- goto endEntityValue;
- }
- entityTextPtr = next;
- }
+ /* In the internal subset, PE references are not legal
+ within markup declarations, e.g entity values in this case. */
+ eventPtr = entityTextPtr;
+ result = XML_ERROR_PARAM_ENTITY_REF;
+ goto endEntityValue;
+ case XML_TOK_NONE:
+ result = XML_ERROR_NONE;
+ goto endEntityValue;
+ case XML_TOK_ENTITY_REF:
+ case XML_TOK_DATA_CHARS:
+ if (!poolAppend(pool, enc, entityTextPtr, next)) {
+ result = XML_ERROR_NO_MEMORY;
+ goto endEntityValue;
+ }
+ break;
+ case XML_TOK_TRAILING_CR:
+ next = entityTextPtr + enc->minBytesPerChar;
+ /* fall through */
+ case XML_TOK_DATA_NEWLINE:
+ if (pool->end == pool->ptr && !poolGrow(pool)) {
+ result = XML_ERROR_NO_MEMORY;
+ goto endEntityValue;
+ }
+ *(pool->ptr)++ = 0xA;
+ break;
+ case XML_TOK_CHAR_REF:
+ {
+ XML_Char buf[XML_ENCODE_MAX];
+ int i;
+ int n = XmlCharRefNumber(enc, entityTextPtr);
+ if (n < 0) {
+ if (enc == encoding)
+ eventPtr = entityTextPtr;
+ result = XML_ERROR_BAD_CHAR_REF;
+ goto endEntityValue;
+ }
+ n = XmlEncode(n, (ICHAR *)buf);
+ if (!n) {
+ if (enc == encoding)
+ eventPtr = entityTextPtr;
+ result = XML_ERROR_BAD_CHAR_REF;
+ goto endEntityValue;
+ }
+ for (i = 0; i < n; i++) {
+ if (pool->end == pool->ptr && !poolGrow(pool)) {
+ result = XML_ERROR_NO_MEMORY;
+ goto endEntityValue;
+ }
+ *(pool->ptr)++ = buf[i];
+ }
+ }
+ break;
+ case XML_TOK_PARTIAL:
+ if (enc == encoding)
+ eventPtr = entityTextPtr;
+ result = XML_ERROR_INVALID_TOKEN;
+ goto endEntityValue;
+ case XML_TOK_INVALID:
+ if (enc == encoding)
+ eventPtr = next;
+ result = XML_ERROR_INVALID_TOKEN;
+ goto endEntityValue;
+ default:
+ if (enc == encoding)
+ eventPtr = entityTextPtr;
+ result = XML_ERROR_UNEXPECTED_STATE;
+ goto endEntityValue;
+ }
+ entityTextPtr = next;
+ }
endEntityValue:
#ifdef XML_DTD
- prologState.inEntityValue = oldInEntityValue;
+ prologState.inEntityValue = oldInEntityValue;
#endif /* XML_DTD */
- return result;
+ return result;
}
static void FASTCALL
normalizeLines(XML_Char *s)
{
- XML_Char *p;
- for (;; s++) {
- if (*s == XML_T('\0'))
- return;
- if (*s == 0xD)
- break;
- }
- p = s;
- do {
- if (*s == 0xD) {
- *p++ = 0xA;
- if (*++s == 0xA)
- s++;
- }
- else
- *p++ = *s++;
- } while (*s);
- *p = XML_T('\0');
+ XML_Char *p;
+ for (;; s++) {
+ if (*s == XML_T('\0'))
+ return;
+ if (*s == 0xD)
+ break;
+ }
+ p = s;
+ do {
+ if (*s == 0xD) {
+ *p++ = 0xA;
+ if (*++s == 0xA)
+ s++;
+ }
+ else
+ *p++ = *s++;
+ } while (*s);
+ *p = XML_T('\0');
}
static int
reportProcessingInstruction(XML_Parser parser, const ENCODING *enc,
- const char *start, const char *end)
-{
- const XML_Char *target;
- XML_Char *data;
- const char *tem;
- if (!processingInstructionHandler) {
- if (defaultHandler)
- reportDefault(parser, enc, start, end);
- return 1;
- }
- start += enc->minBytesPerChar * 2;
- tem = start + XmlNameLength(enc, start);
- target = poolStoreString(&tempPool, enc, start, tem);
- if (!target)
- return 0;
- poolFinish(&tempPool);
- data = poolStoreString(&tempPool, enc,
- XmlSkipS(enc, tem),
- end - enc->minBytesPerChar*2);
- if (!data)
- return 0;
- normalizeLines(data);
- processingInstructionHandler(handlerArg, target, data);
- poolClear(&tempPool);
- return 1;
+ const char *start, const char *end)
+{
+ const XML_Char *target;
+ XML_Char *data;
+ const char *tem;
+ if (!processingInstructionHandler) {
+ if (defaultHandler)
+ reportDefault(parser, enc, start, end);
+ return 1;
+ }
+ start += enc->minBytesPerChar * 2;
+ tem = start + XmlNameLength(enc, start);
+ target = poolStoreString(&tempPool, enc, start, tem);
+ if (!target)
+ return 0;
+ poolFinish(&tempPool);
+ data = poolStoreString(&tempPool, enc,
+ XmlSkipS(enc, tem),
+ end - enc->minBytesPerChar*2);
+ if (!data)
+ return 0;
+ normalizeLines(data);
+ processingInstructionHandler(handlerArg, target, data);
+ poolClear(&tempPool);
+ return 1;
}
static int
reportComment(XML_Parser parser, const ENCODING *enc,
- const char *start, const char *end)
-{
- XML_Char *data;
- if (!commentHandler) {
- if (defaultHandler)
- reportDefault(parser, enc, start, end);
- return 1;
- }
- data = poolStoreString(&tempPool,
- enc,
- start + enc->minBytesPerChar * 4,
- end - enc->minBytesPerChar * 3);
- if (!data)
- return 0;
- normalizeLines(data);
- commentHandler(handlerArg, data);
- poolClear(&tempPool);
- return 1;
+ const char *start, const char *end)
+{
+ XML_Char *data;
+ if (!commentHandler) {
+ if (defaultHandler)
+ reportDefault(parser, enc, start, end);
+ return 1;
+ }
+ data = poolStoreString(&tempPool,
+ enc,
+ start + enc->minBytesPerChar * 4,
+ end - enc->minBytesPerChar * 3);
+ if (!data)
+ return 0;
+ normalizeLines(data);
+ commentHandler(handlerArg, data);
+ poolClear(&tempPool);
+ return 1;
}
static void
reportDefault(XML_Parser parser, const ENCODING *enc,
- const char *s, const char *end)
-{
- if (MUST_CONVERT(enc, s)) {
- const char **eventPP;
- const char **eventEndPP;
- if (enc == encoding) {
- eventPP = &eventPtr;
- eventEndPP = &eventEndPtr;
- }
- else {
- eventPP = &(openInternalEntities->internalEventPtr);
- eventEndPP = &(openInternalEntities->internalEventEndPtr);
- }
- do {
- ICHAR *dataPtr = (ICHAR *)dataBuf;
- XmlConvert(enc, &s, end, &dataPtr, (ICHAR *)dataBufEnd);
- *eventEndPP = s;
- defaultHandler(handlerArg, dataBuf, (int)(dataPtr - (ICHAR *)dataBuf));
- *eventPP = s;
- } while (s != end);
- }
- else
- defaultHandler(handlerArg, (XML_Char *)s, (int)((XML_Char *)end - (XML_Char *)s));
+ const char *s, const char *end)
+{
+ if (MUST_CONVERT(enc, s)) {
+ const char **eventPP;
+ const char **eventEndPP;
+ if (enc == encoding) {
+ eventPP = &eventPtr;
+ eventEndPP = &eventEndPtr;
+ }
+ else {
+ eventPP = &(openInternalEntities->internalEventPtr);
+ eventEndPP = &(openInternalEntities->internalEventEndPtr);
+ }
+ do {
+ ICHAR *dataPtr = (ICHAR *)dataBuf;
+ XmlConvert(enc, &s, end, &dataPtr, (ICHAR *)dataBufEnd);
+ *eventEndPP = s;
+ defaultHandler(handlerArg, dataBuf, (int)(dataPtr - (ICHAR *)dataBuf));
+ *eventPP = s;
+ } while (s != end);
+ }
+ else
+ defaultHandler(handlerArg, (XML_Char *)s, (int)((XML_Char *)end - (XML_Char *)s));
}
static int
defineAttribute(ELEMENT_TYPE *type, ATTRIBUTE_ID *attId, XML_Bool isCdata,
- XML_Bool isId, const XML_Char *value, XML_Parser parser)
-{
- DEFAULT_ATTRIBUTE *att;
- if (value || isId) {
- /* The handling of default attributes gets messed up if we have
- a default which duplicates a non-default. */
- int i;
- for (i = 0; i < type->nDefaultAtts; i++)
- if (attId == type->defaultAtts[i].id)
- return 1;
- if (isId && !type->idAtt && !attId->xmlns)
- type->idAtt = attId;
- }
- if (type->nDefaultAtts == type->allocDefaultAtts) {
- if (type->allocDefaultAtts == 0) {
- type->allocDefaultAtts = 8;
- type->defaultAtts = (DEFAULT_ATTRIBUTE *)MALLOC(type->allocDefaultAtts
- * sizeof(DEFAULT_ATTRIBUTE));
- if (!type->defaultAtts)
- return 0;
- }
- else {
- DEFAULT_ATTRIBUTE *temp;
- int count = type->allocDefaultAtts * 2;
- temp = (DEFAULT_ATTRIBUTE *)
- REALLOC(type->defaultAtts, (count * sizeof(DEFAULT_ATTRIBUTE)));
- if (temp == NULL)
- return 0;
- type->allocDefaultAtts = count;
- type->defaultAtts = temp;
- }
- }
- att = type->defaultAtts + type->nDefaultAtts;
- att->id = attId;
- att->value = value;
- att->isCdata = isCdata;
- if (!isCdata)
- attId->maybeTokenized = XML_TRUE;
- type->nDefaultAtts += 1;
- return 1;
+ XML_Bool isId, const XML_Char *value, XML_Parser parser)
+{
+ DEFAULT_ATTRIBUTE *att;
+ if (value || isId) {
+ /* The handling of default attributes gets messed up if we have
+ a default which duplicates a non-default. */
+ int i;
+ for (i = 0; i < type->nDefaultAtts; i++)
+ if (attId == type->defaultAtts[i].id)
+ return 1;
+ if (isId && !type->idAtt && !attId->xmlns)
+ type->idAtt = attId;
+ }
+ if (type->nDefaultAtts == type->allocDefaultAtts) {
+ if (type->allocDefaultAtts == 0) {
+ type->allocDefaultAtts = 8;
+ type->defaultAtts = (DEFAULT_ATTRIBUTE *)MALLOC(type->allocDefaultAtts
+ * sizeof(DEFAULT_ATTRIBUTE));
+ if (!type->defaultAtts)
+ return 0;
+ }
+ else {
+ DEFAULT_ATTRIBUTE *temp;
+ int count = type->allocDefaultAtts * 2;
+ temp = (DEFAULT_ATTRIBUTE *)
+ REALLOC(type->defaultAtts, (count * sizeof(DEFAULT_ATTRIBUTE)));
+ if (temp == NULL)
+ return 0;
+ type->allocDefaultAtts = count;
+ type->defaultAtts = temp;
+ }
+ }
+ att = type->defaultAtts + type->nDefaultAtts;
+ att->id = attId;
+ att->value = value;
+ att->isCdata = isCdata;
+ if (!isCdata)
+ attId->maybeTokenized = XML_TRUE;
+ type->nDefaultAtts += 1;
+ return 1;
}
static int
setElementTypePrefix(XML_Parser parser, ELEMENT_TYPE *elementType)
{
- DTD * const dtd = _dtd; /* save one level of indirection */
- const XML_Char *name;
- for (name = elementType->name; *name; name++) {
- if (*name == XML_T(ASCII_COLON)) {
- PREFIX *prefix;
- const XML_Char *s;
- for (s = elementType->name; s != name; s++) {
- if (!poolAppendChar(&dtd->pool, *s))
- return 0;
- }
- if (!poolAppendChar(&dtd->pool, XML_T('\0')))
- return 0;
- prefix = (PREFIX *)lookup(parser, &dtd->prefixes, poolStart(&dtd->pool),
- sizeof(PREFIX));
- if (!prefix)
- return 0;
- if (prefix->name == poolStart(&dtd->pool))
- poolFinish(&dtd->pool);
- else
- poolDiscard(&dtd->pool);
- elementType->prefix = prefix;
-
- }
- }
- return 1;
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ const XML_Char *name;
+ for (name = elementType->name; *name; name++) {
+ if (*name == XML_T(ASCII_COLON)) {
+ PREFIX *prefix;
+ const XML_Char *s;
+ for (s = elementType->name; s != name; s++) {
+ if (!poolAppendChar(&dtd->pool, *s))
+ return 0;
+ }
+ if (!poolAppendChar(&dtd->pool, XML_T('\0')))
+ return 0;
+ prefix = (PREFIX *)lookup(parser, &dtd->prefixes, poolStart(&dtd->pool),
+ sizeof(PREFIX));
+ if (!prefix)
+ return 0;
+ if (prefix->name == poolStart(&dtd->pool))
+ poolFinish(&dtd->pool);
+ else
+ poolDiscard(&dtd->pool);
+ elementType->prefix = prefix;
+
+ }
+ }
+ return 1;
}
static ATTRIBUTE_ID *
getAttributeId(XML_Parser parser, const ENCODING *enc,
- const char *start, const char *end)
-{
- DTD * const dtd = _dtd; /* save one level of indirection */
- ATTRIBUTE_ID *id;
- const XML_Char *name;
- if (!poolAppendChar(&dtd->pool, XML_T('\0')))
- return NULL;
- name = poolStoreString(&dtd->pool, enc, start, end);
- if (!name)
- return NULL;
- /* skip quotation mark - its storage will be re-used (like in name[-1]) */
- ++name;
- id = (ATTRIBUTE_ID *)lookup(parser, &dtd->attributeIds, name, sizeof(ATTRIBUTE_ID));
- if (!id)
- return NULL;
- if (id->name != name)
- poolDiscard(&dtd->pool);
- else {
- poolFinish(&dtd->pool);
- if (!ns)
- ;
- else if (name[0] == XML_T(ASCII_x)
- && name[1] == XML_T(ASCII_m)
- && name[2] == XML_T(ASCII_l)
- && name[3] == XML_T(ASCII_n)
- && name[4] == XML_T(ASCII_s)
- && (name[5] == XML_T('\0') || name[5] == XML_T(ASCII_COLON))) {
- if (name[5] == XML_T('\0'))
- id->prefix = &dtd->defaultPrefix;
- else
- id->prefix = (PREFIX *)lookup(parser, &dtd->prefixes, name + 6, sizeof(PREFIX));
- id->xmlns = XML_TRUE;
- }
- else {
- int i;
- for (i = 0; name[i]; i++) {
- /* attributes without prefix are *not* in the default namespace */
- if (name[i] == XML_T(ASCII_COLON)) {
- int j;
- for (j = 0; j < i; j++) {
- if (!poolAppendChar(&dtd->pool, name[j]))
- return NULL;
- }
- if (!poolAppendChar(&dtd->pool, XML_T('\0')))
- return NULL;
- id->prefix = (PREFIX *)lookup(parser, &dtd->prefixes, poolStart(&dtd->pool),
- sizeof(PREFIX));
- if (id->prefix->name == poolStart(&dtd->pool))
- poolFinish(&dtd->pool);
- else
- poolDiscard(&dtd->pool);
- break;
- }
- }
- }
- }
- return id;
+ const char *start, const char *end)
+{
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ ATTRIBUTE_ID *id;
+ const XML_Char *name;
+ if (!poolAppendChar(&dtd->pool, XML_T('\0')))
+ return NULL;
+ name = poolStoreString(&dtd->pool, enc, start, end);
+ if (!name)
+ return NULL;
+ /* skip quotation mark - its storage will be re-used (like in name[-1]) */
+ ++name;
+ id = (ATTRIBUTE_ID *)lookup(parser, &dtd->attributeIds, name, sizeof(ATTRIBUTE_ID));
+ if (!id)
+ return NULL;
+ if (id->name != name)
+ poolDiscard(&dtd->pool);
+ else {
+ poolFinish(&dtd->pool);
+ if (!ns)
+ ;
+ else if (name[0] == XML_T(ASCII_x)
+ && name[1] == XML_T(ASCII_m)
+ && name[2] == XML_T(ASCII_l)
+ && name[3] == XML_T(ASCII_n)
+ && name[4] == XML_T(ASCII_s)
+ && (name[5] == XML_T('\0') || name[5] == XML_T(ASCII_COLON))) {
+ if (name[5] == XML_T('\0'))
+ id->prefix = &dtd->defaultPrefix;
+ else
+ id->prefix = (PREFIX *)lookup(parser, &dtd->prefixes, name + 6, sizeof(PREFIX));
+ id->xmlns = XML_TRUE;
+ }
+ else {
+ int i;
+ for (i = 0; name[i]; i++) {
+ /* attributes without prefix are *not* in the default namespace */
+ if (name[i] == XML_T(ASCII_COLON)) {
+ int j;
+ for (j = 0; j < i; j++) {
+ if (!poolAppendChar(&dtd->pool, name[j]))
+ return NULL;
+ }
+ if (!poolAppendChar(&dtd->pool, XML_T('\0')))
+ return NULL;
+ id->prefix = (PREFIX *)lookup(parser, &dtd->prefixes, poolStart(&dtd->pool),
+ sizeof(PREFIX));
+ if (id->prefix->name == poolStart(&dtd->pool))
+ poolFinish(&dtd->pool);
+ else
+ poolDiscard(&dtd->pool);
+ break;
+ }
+ }
+ }
+ }
+ return id;
}
#define CONTEXT_SEP XML_T(ASCII_FF)
@@ -5482,256 +5482,256 @@ getAttributeId(XML_Parser parser, const ENCODING *enc,
static const XML_Char *
getContext(XML_Parser parser)
{
- DTD * const dtd = _dtd; /* save one level of indirection */
- HASH_TABLE_ITER iter;
- XML_Bool needSep = XML_FALSE;
-
- if (dtd->defaultPrefix.binding) {
- int i;
- int len;
- if (!poolAppendChar(&tempPool, XML_T(ASCII_EQUALS)))
- return NULL;
- len = dtd->defaultPrefix.binding->uriLen;
- if (namespaceSeparator)
- len--;
- for (i = 0; i < len; i++)
- if (!poolAppendChar(&tempPool, dtd->defaultPrefix.binding->uri[i]))
- return NULL;
- needSep = XML_TRUE;
- }
-
- hashTableIterInit(&iter, &(dtd->prefixes));
- for (;;) {
- int i;
- int len;
- const XML_Char *s;
- PREFIX *prefix = (PREFIX *)hashTableIterNext(&iter);
- if (!prefix)
- break;
- if (!prefix->binding)
- continue;
- if (needSep && !poolAppendChar(&tempPool, CONTEXT_SEP))
- return NULL;
- for (s = prefix->name; *s; s++)
- if (!poolAppendChar(&tempPool, *s))
- return NULL;
- if (!poolAppendChar(&tempPool, XML_T(ASCII_EQUALS)))
- return NULL;
- len = prefix->binding->uriLen;
- if (namespaceSeparator)
- len--;
- for (i = 0; i < len; i++)
- if (!poolAppendChar(&tempPool, prefix->binding->uri[i]))
- return NULL;
- needSep = XML_TRUE;
- }
-
-
- hashTableIterInit(&iter, &(dtd->generalEntities));
- for (;;) {
- const XML_Char *s;
- ENTITY *e = (ENTITY *)hashTableIterNext(&iter);
- if (!e)
- break;
- if (!e->open)
- continue;
- if (needSep && !poolAppendChar(&tempPool, CONTEXT_SEP))
- return NULL;
- for (s = e->name; *s; s++)
- if (!poolAppendChar(&tempPool, *s))
- return 0;
- needSep = XML_TRUE;
- }
-
- if (!poolAppendChar(&tempPool, XML_T('\0')))
- return NULL;
- return tempPool.start;
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ HASH_TABLE_ITER iter;
+ XML_Bool needSep = XML_FALSE;
+
+ if (dtd->defaultPrefix.binding) {
+ int i;
+ int len;
+ if (!poolAppendChar(&tempPool, XML_T(ASCII_EQUALS)))
+ return NULL;
+ len = dtd->defaultPrefix.binding->uriLen;
+ if (namespaceSeparator)
+ len--;
+ for (i = 0; i < len; i++)
+ if (!poolAppendChar(&tempPool, dtd->defaultPrefix.binding->uri[i]))
+ return NULL;
+ needSep = XML_TRUE;
+ }
+
+ hashTableIterInit(&iter, &(dtd->prefixes));
+ for (;;) {
+ int i;
+ int len;
+ const XML_Char *s;
+ PREFIX *prefix = (PREFIX *)hashTableIterNext(&iter);
+ if (!prefix)
+ break;
+ if (!prefix->binding)
+ continue;
+ if (needSep && !poolAppendChar(&tempPool, CONTEXT_SEP))
+ return NULL;
+ for (s = prefix->name; *s; s++)
+ if (!poolAppendChar(&tempPool, *s))
+ return NULL;
+ if (!poolAppendChar(&tempPool, XML_T(ASCII_EQUALS)))
+ return NULL;
+ len = prefix->binding->uriLen;
+ if (namespaceSeparator)
+ len--;
+ for (i = 0; i < len; i++)
+ if (!poolAppendChar(&tempPool, prefix->binding->uri[i]))
+ return NULL;
+ needSep = XML_TRUE;
+ }
+
+
+ hashTableIterInit(&iter, &(dtd->generalEntities));
+ for (;;) {
+ const XML_Char *s;
+ ENTITY *e = (ENTITY *)hashTableIterNext(&iter);
+ if (!e)
+ break;
+ if (!e->open)
+ continue;
+ if (needSep && !poolAppendChar(&tempPool, CONTEXT_SEP))
+ return NULL;
+ for (s = e->name; *s; s++)
+ if (!poolAppendChar(&tempPool, *s))
+ return 0;
+ needSep = XML_TRUE;
+ }
+
+ if (!poolAppendChar(&tempPool, XML_T('\0')))
+ return NULL;
+ return tempPool.start;
}
static XML_Bool
setContext(XML_Parser parser, const XML_Char *context)
{
- DTD * const dtd = _dtd; /* save one level of indirection */
- const XML_Char *s = context;
-
- while (*context != XML_T('\0')) {
- if (*s == CONTEXT_SEP || *s == XML_T('\0')) {
- ENTITY *e;
- if (!poolAppendChar(&tempPool, XML_T('\0')))
- return XML_FALSE;
- e = (ENTITY *)lookup(parser, &dtd->generalEntities, poolStart(&tempPool), 0);
- if (e)
- e->open = XML_TRUE;
- if (*s != XML_T('\0'))
- s++;
- context = s;
- poolDiscard(&tempPool);
- }
- else if (*s == XML_T(ASCII_EQUALS)) {
- PREFIX *prefix;
- if (poolLength(&tempPool) == 0)
- prefix = &dtd->defaultPrefix;
- else {
- if (!poolAppendChar(&tempPool, XML_T('\0')))
- return XML_FALSE;
- prefix = (PREFIX *)lookup(parser, &dtd->prefixes, poolStart(&tempPool),
- sizeof(PREFIX));
- if (!prefix)
- return XML_FALSE;
- if (prefix->name == poolStart(&tempPool)) {
- prefix->name = poolCopyString(&dtd->pool, prefix->name);
- if (!prefix->name)
- return XML_FALSE;
- }
- poolDiscard(&tempPool);
- }
- for (context = s + 1;
- *context != CONTEXT_SEP && *context != XML_T('\0');
- context++)
- if (!poolAppendChar(&tempPool, *context))
- return XML_FALSE;
- if (!poolAppendChar(&tempPool, XML_T('\0')))
- return XML_FALSE;
- if (addBinding(parser, prefix, NULL, poolStart(&tempPool),
- &inheritedBindings) != XML_ERROR_NONE)
- return XML_FALSE;
- poolDiscard(&tempPool);
- if (*context != XML_T('\0'))
- ++context;
- s = context;
- }
- else {
- if (!poolAppendChar(&tempPool, *s))
- return XML_FALSE;
- s++;
- }
- }
- return XML_TRUE;
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ const XML_Char *s = context;
+
+ while (*context != XML_T('\0')) {
+ if (*s == CONTEXT_SEP || *s == XML_T('\0')) {
+ ENTITY *e;
+ if (!poolAppendChar(&tempPool, XML_T('\0')))
+ return XML_FALSE;
+ e = (ENTITY *)lookup(parser, &dtd->generalEntities, poolStart(&tempPool), 0);
+ if (e)
+ e->open = XML_TRUE;
+ if (*s != XML_T('\0'))
+ s++;
+ context = s;
+ poolDiscard(&tempPool);
+ }
+ else if (*s == XML_T(ASCII_EQUALS)) {
+ PREFIX *prefix;
+ if (poolLength(&tempPool) == 0)
+ prefix = &dtd->defaultPrefix;
+ else {
+ if (!poolAppendChar(&tempPool, XML_T('\0')))
+ return XML_FALSE;
+ prefix = (PREFIX *)lookup(parser, &dtd->prefixes, poolStart(&tempPool),
+ sizeof(PREFIX));
+ if (!prefix)
+ return XML_FALSE;
+ if (prefix->name == poolStart(&tempPool)) {
+ prefix->name = poolCopyString(&dtd->pool, prefix->name);
+ if (!prefix->name)
+ return XML_FALSE;
+ }
+ poolDiscard(&tempPool);
+ }
+ for (context = s + 1;
+ *context != CONTEXT_SEP && *context != XML_T('\0');
+ context++)
+ if (!poolAppendChar(&tempPool, *context))
+ return XML_FALSE;
+ if (!poolAppendChar(&tempPool, XML_T('\0')))
+ return XML_FALSE;
+ if (addBinding(parser, prefix, NULL, poolStart(&tempPool),
+ &inheritedBindings) != XML_ERROR_NONE)
+ return XML_FALSE;
+ poolDiscard(&tempPool);
+ if (*context != XML_T('\0'))
+ ++context;
+ s = context;
+ }
+ else {
+ if (!poolAppendChar(&tempPool, *s))
+ return XML_FALSE;
+ s++;
+ }
+ }
+ return XML_TRUE;
}
static void FASTCALL
normalizePublicId(XML_Char *publicId)
{
- XML_Char *p = publicId;
- XML_Char *s;
- for (s = publicId; *s; s++) {
- switch (*s) {
- case 0x20:
- case 0xD:
- case 0xA:
- if (p != publicId && p[-1] != 0x20)
- *p++ = 0x20;
- break;
- default:
- *p++ = *s;
- }
- }
- if (p != publicId && p[-1] == 0x20)
- --p;
- *p = XML_T('\0');
+ XML_Char *p = publicId;
+ XML_Char *s;
+ for (s = publicId; *s; s++) {
+ switch (*s) {
+ case 0x20:
+ case 0xD:
+ case 0xA:
+ if (p != publicId && p[-1] != 0x20)
+ *p++ = 0x20;
+ break;
+ default:
+ *p++ = *s;
+ }
+ }
+ if (p != publicId && p[-1] == 0x20)
+ --p;
+ *p = XML_T('\0');
}
static DTD *
dtdCreate(const XML_Memory_Handling_Suite *ms)
{
- DTD *p = (DTD *)ms->malloc_fcn(sizeof(DTD));
- if (p == NULL)
- return p;
- poolInit(&(p->pool), ms);
- poolInit(&(p->entityValuePool), ms);
- hashTableInit(&(p->generalEntities), ms);
- hashTableInit(&(p->elementTypes), ms);
- hashTableInit(&(p->attributeIds), ms);
- hashTableInit(&(p->prefixes), ms);
+ DTD *p = (DTD *)ms->malloc_fcn(sizeof(DTD));
+ if (p == NULL)
+ return p;
+ poolInit(&(p->pool), ms);
+ poolInit(&(p->entityValuePool), ms);
+ hashTableInit(&(p->generalEntities), ms);
+ hashTableInit(&(p->elementTypes), ms);
+ hashTableInit(&(p->attributeIds), ms);
+ hashTableInit(&(p->prefixes), ms);
#ifdef XML_DTD
- p->paramEntityRead = XML_FALSE;
- hashTableInit(&(p->paramEntities), ms);
+ p->paramEntityRead = XML_FALSE;
+ hashTableInit(&(p->paramEntities), ms);
#endif /* XML_DTD */
- p->defaultPrefix.name = NULL;
- p->defaultPrefix.binding = NULL;
+ p->defaultPrefix.name = NULL;
+ p->defaultPrefix.binding = NULL;
- p->in_eldecl = XML_FALSE;
- p->scaffIndex = NULL;
- p->scaffold = NULL;
- p->scaffLevel = 0;
- p->scaffSize = 0;
- p->scaffCount = 0;
- p->contentStringLen = 0;
+ p->in_eldecl = XML_FALSE;
+ p->scaffIndex = NULL;
+ p->scaffold = NULL;
+ p->scaffLevel = 0;
+ p->scaffSize = 0;
+ p->scaffCount = 0;
+ p->contentStringLen = 0;
- p->keepProcessing = XML_TRUE;
- p->hasParamEntityRefs = XML_FALSE;
- p->standalone = XML_FALSE;
- return p;
+ p->keepProcessing = XML_TRUE;
+ p->hasParamEntityRefs = XML_FALSE;
+ p->standalone = XML_FALSE;
+ return p;
}
static void
dtdReset(DTD *p, const XML_Memory_Handling_Suite *ms)
{
- HASH_TABLE_ITER iter;
- hashTableIterInit(&iter, &(p->elementTypes));
- for (;;) {
- ELEMENT_TYPE *e = (ELEMENT_TYPE *)hashTableIterNext(&iter);
- if (!e)
- break;
- if (e->allocDefaultAtts != 0)
- ms->free_fcn(e->defaultAtts);
- }
- hashTableClear(&(p->generalEntities));
+ HASH_TABLE_ITER iter;
+ hashTableIterInit(&iter, &(p->elementTypes));
+ for (;;) {
+ ELEMENT_TYPE *e = (ELEMENT_TYPE *)hashTableIterNext(&iter);
+ if (!e)
+ break;
+ if (e->allocDefaultAtts != 0)
+ ms->free_fcn(e->defaultAtts);
+ }
+ hashTableClear(&(p->generalEntities));
#ifdef XML_DTD
- p->paramEntityRead = XML_FALSE;
- hashTableClear(&(p->paramEntities));
+ p->paramEntityRead = XML_FALSE;
+ hashTableClear(&(p->paramEntities));
#endif /* XML_DTD */
- hashTableClear(&(p->elementTypes));
- hashTableClear(&(p->attributeIds));
- hashTableClear(&(p->prefixes));
- poolClear(&(p->pool));
- poolClear(&(p->entityValuePool));
- p->defaultPrefix.name = NULL;
- p->defaultPrefix.binding = NULL;
+ hashTableClear(&(p->elementTypes));
+ hashTableClear(&(p->attributeIds));
+ hashTableClear(&(p->prefixes));
+ poolClear(&(p->pool));
+ poolClear(&(p->entityValuePool));
+ p->defaultPrefix.name = NULL;
+ p->defaultPrefix.binding = NULL;
- p->in_eldecl = XML_FALSE;
+ p->in_eldecl = XML_FALSE;
- ms->free_fcn(p->scaffIndex);
- p->scaffIndex = NULL;
- ms->free_fcn(p->scaffold);
- p->scaffold = NULL;
+ ms->free_fcn(p->scaffIndex);
+ p->scaffIndex = NULL;
+ ms->free_fcn(p->scaffold);
+ p->scaffold = NULL;
- p->scaffLevel = 0;
- p->scaffSize = 0;
- p->scaffCount = 0;
- p->contentStringLen = 0;
+ p->scaffLevel = 0;
+ p->scaffSize = 0;
+ p->scaffCount = 0;
+ p->contentStringLen = 0;
- p->keepProcessing = XML_TRUE;
- p->hasParamEntityRefs = XML_FALSE;
- p->standalone = XML_FALSE;
+ p->keepProcessing = XML_TRUE;
+ p->hasParamEntityRefs = XML_FALSE;
+ p->standalone = XML_FALSE;
}
static void
dtdDestroy(DTD *p, XML_Bool isDocEntity, const XML_Memory_Handling_Suite *ms)
{
- HASH_TABLE_ITER iter;
- hashTableIterInit(&iter, &(p->elementTypes));
- for (;;) {
- ELEMENT_TYPE *e = (ELEMENT_TYPE *)hashTableIterNext(&iter);
- if (!e)
- break;
- if (e->allocDefaultAtts != 0)
- ms->free_fcn(e->defaultAtts);
- }
- hashTableDestroy(&(p->generalEntities));
+ HASH_TABLE_ITER iter;
+ hashTableIterInit(&iter, &(p->elementTypes));
+ for (;;) {
+ ELEMENT_TYPE *e = (ELEMENT_TYPE *)hashTableIterNext(&iter);
+ if (!e)
+ break;
+ if (e->allocDefaultAtts != 0)
+ ms->free_fcn(e->defaultAtts);
+ }
+ hashTableDestroy(&(p->generalEntities));
#ifdef XML_DTD
- hashTableDestroy(&(p->paramEntities));
+ hashTableDestroy(&(p->paramEntities));
#endif /* XML_DTD */
- hashTableDestroy(&(p->elementTypes));
- hashTableDestroy(&(p->attributeIds));
- hashTableDestroy(&(p->prefixes));
- poolDestroy(&(p->pool));
- poolDestroy(&(p->entityValuePool));
- if (isDocEntity) {
- ms->free_fcn(p->scaffIndex);
- ms->free_fcn(p->scaffold);
- }
- ms->free_fcn(p);
+ hashTableDestroy(&(p->elementTypes));
+ hashTableDestroy(&(p->attributeIds));
+ hashTableDestroy(&(p->prefixes));
+ poolDestroy(&(p->pool));
+ poolDestroy(&(p->entityValuePool));
+ if (isDocEntity) {
+ ms->free_fcn(p->scaffIndex);
+ ms->free_fcn(p->scaffold);
+ }
+ ms->free_fcn(p);
}
/* Do a deep copy of the DTD. Return 0 for out of memory, non-zero otherwise.
@@ -5740,200 +5740,200 @@ dtdDestroy(DTD *p, XML_Bool isDocEntity, const XML_Memory_Handling_Suite *ms)
static int
dtdCopy(XML_Parser oldParser, DTD *newDtd, const DTD *oldDtd, const XML_Memory_Handling_Suite *ms)
{
- HASH_TABLE_ITER iter;
-
- /* Copy the prefix table. */
-
- hashTableIterInit(&iter, &(oldDtd->prefixes));
- for (;;) {
- const XML_Char *name;
- const PREFIX *oldP = (PREFIX *)hashTableIterNext(&iter);
- if (!oldP)
- break;
- name = poolCopyString(&(newDtd->pool), oldP->name);
- if (!name)
- return 0;
- if (!lookup(oldParser, &(newDtd->prefixes), name, sizeof(PREFIX)))
- return 0;
- }
-
- hashTableIterInit(&iter, &(oldDtd->attributeIds));
-
- /* Copy the attribute id table. */
-
- for (;;) {
- ATTRIBUTE_ID *newA;
- const XML_Char *name;
- const ATTRIBUTE_ID *oldA = (ATTRIBUTE_ID *)hashTableIterNext(&iter);
-
- if (!oldA)
- break;
- /* Remember to allocate the scratch byte before the name. */
- if (!poolAppendChar(&(newDtd->pool), XML_T('\0')))
- return 0;
- name = poolCopyString(&(newDtd->pool), oldA->name);
- if (!name)
- return 0;
- ++name;
- newA = (ATTRIBUTE_ID *)lookup(oldParser, &(newDtd->attributeIds), name,
- sizeof(ATTRIBUTE_ID));
- if (!newA)
- return 0;
- newA->maybeTokenized = oldA->maybeTokenized;
- if (oldA->prefix) {
- newA->xmlns = oldA->xmlns;
- if (oldA->prefix == &oldDtd->defaultPrefix)
- newA->prefix = &newDtd->defaultPrefix;
- else
- newA->prefix = (PREFIX *)lookup(oldParser, &(newDtd->prefixes),
- oldA->prefix->name, 0);
- }
- }
-
- /* Copy the element type table. */
-
- hashTableIterInit(&iter, &(oldDtd->elementTypes));
-
- for (;;) {
- int i;
- ELEMENT_TYPE *newE;
- const XML_Char *name;
- const ELEMENT_TYPE *oldE = (ELEMENT_TYPE *)hashTableIterNext(&iter);
- if (!oldE)
- break;
- name = poolCopyString(&(newDtd->pool), oldE->name);
- if (!name)
- return 0;
- newE = (ELEMENT_TYPE *)lookup(oldParser, &(newDtd->elementTypes), name,
- sizeof(ELEMENT_TYPE));
- if (!newE)
- return 0;
- if (oldE->nDefaultAtts) {
- newE->defaultAtts = (DEFAULT_ATTRIBUTE *)
- ms->malloc_fcn(oldE->nDefaultAtts * sizeof(DEFAULT_ATTRIBUTE));
- if (!newE->defaultAtts) {
- ms->free_fcn(newE);
- return 0;
- }
- }
- if (oldE->idAtt)
- newE->idAtt = (ATTRIBUTE_ID *)
- lookup(oldParser, &(newDtd->attributeIds), oldE->idAtt->name, 0);
- newE->allocDefaultAtts = newE->nDefaultAtts = oldE->nDefaultAtts;
- if (oldE->prefix)
- newE->prefix = (PREFIX *)lookup(oldParser, &(newDtd->prefixes),
- oldE->prefix->name, 0);
- for (i = 0; i < newE->nDefaultAtts; i++) {
- newE->defaultAtts[i].id = (ATTRIBUTE_ID *)
- lookup(oldParser, &(newDtd->attributeIds), oldE->defaultAtts[i].id->name, 0);
- newE->defaultAtts[i].isCdata = oldE->defaultAtts[i].isCdata;
- if (oldE->defaultAtts[i].value) {
- newE->defaultAtts[i].value
- = poolCopyString(&(newDtd->pool), oldE->defaultAtts[i].value);
- if (!newE->defaultAtts[i].value)
- return 0;
- }
- else
- newE->defaultAtts[i].value = NULL;
- }
- }
-
- /* Copy the entity tables. */
- if (!copyEntityTable(oldParser,
- &(newDtd->generalEntities),
- &(newDtd->pool),
- &(oldDtd->generalEntities)))
- return 0;
+ HASH_TABLE_ITER iter;
+
+ /* Copy the prefix table. */
+
+ hashTableIterInit(&iter, &(oldDtd->prefixes));
+ for (;;) {
+ const XML_Char *name;
+ const PREFIX *oldP = (PREFIX *)hashTableIterNext(&iter);
+ if (!oldP)
+ break;
+ name = poolCopyString(&(newDtd->pool), oldP->name);
+ if (!name)
+ return 0;
+ if (!lookup(oldParser, &(newDtd->prefixes), name, sizeof(PREFIX)))
+ return 0;
+ }
+
+ hashTableIterInit(&iter, &(oldDtd->attributeIds));
+
+ /* Copy the attribute id table. */
+
+ for (;;) {
+ ATTRIBUTE_ID *newA;
+ const XML_Char *name;
+ const ATTRIBUTE_ID *oldA = (ATTRIBUTE_ID *)hashTableIterNext(&iter);
+
+ if (!oldA)
+ break;
+ /* Remember to allocate the scratch byte before the name. */
+ if (!poolAppendChar(&(newDtd->pool), XML_T('\0')))
+ return 0;
+ name = poolCopyString(&(newDtd->pool), oldA->name);
+ if (!name)
+ return 0;
+ ++name;
+ newA = (ATTRIBUTE_ID *)lookup(oldParser, &(newDtd->attributeIds), name,
+ sizeof(ATTRIBUTE_ID));
+ if (!newA)
+ return 0;
+ newA->maybeTokenized = oldA->maybeTokenized;
+ if (oldA->prefix) {
+ newA->xmlns = oldA->xmlns;
+ if (oldA->prefix == &oldDtd->defaultPrefix)
+ newA->prefix = &newDtd->defaultPrefix;
+ else
+ newA->prefix = (PREFIX *)lookup(oldParser, &(newDtd->prefixes),
+ oldA->prefix->name, 0);
+ }
+ }
+
+ /* Copy the element type table. */
+
+ hashTableIterInit(&iter, &(oldDtd->elementTypes));
+
+ for (;;) {
+ int i;
+ ELEMENT_TYPE *newE;
+ const XML_Char *name;
+ const ELEMENT_TYPE *oldE = (ELEMENT_TYPE *)hashTableIterNext(&iter);
+ if (!oldE)
+ break;
+ name = poolCopyString(&(newDtd->pool), oldE->name);
+ if (!name)
+ return 0;
+ newE = (ELEMENT_TYPE *)lookup(oldParser, &(newDtd->elementTypes), name,
+ sizeof(ELEMENT_TYPE));
+ if (!newE)
+ return 0;
+ if (oldE->nDefaultAtts) {
+ newE->defaultAtts = (DEFAULT_ATTRIBUTE *)
+ ms->malloc_fcn(oldE->nDefaultAtts * sizeof(DEFAULT_ATTRIBUTE));
+ if (!newE->defaultAtts) {
+ ms->free_fcn(newE);
+ return 0;
+ }
+ }
+ if (oldE->idAtt)
+ newE->idAtt = (ATTRIBUTE_ID *)
+ lookup(oldParser, &(newDtd->attributeIds), oldE->idAtt->name, 0);
+ newE->allocDefaultAtts = newE->nDefaultAtts = oldE->nDefaultAtts;
+ if (oldE->prefix)
+ newE->prefix = (PREFIX *)lookup(oldParser, &(newDtd->prefixes),
+ oldE->prefix->name, 0);
+ for (i = 0; i < newE->nDefaultAtts; i++) {
+ newE->defaultAtts[i].id = (ATTRIBUTE_ID *)
+ lookup(oldParser, &(newDtd->attributeIds), oldE->defaultAtts[i].id->name, 0);
+ newE->defaultAtts[i].isCdata = oldE->defaultAtts[i].isCdata;
+ if (oldE->defaultAtts[i].value) {
+ newE->defaultAtts[i].value
+ = poolCopyString(&(newDtd->pool), oldE->defaultAtts[i].value);
+ if (!newE->defaultAtts[i].value)
+ return 0;
+ }
+ else
+ newE->defaultAtts[i].value = NULL;
+ }
+ }
+
+ /* Copy the entity tables. */
+ if (!copyEntityTable(oldParser,
+ &(newDtd->generalEntities),
+ &(newDtd->pool),
+ &(oldDtd->generalEntities)))
+ return 0;
#ifdef XML_DTD
- if (!copyEntityTable(oldParser,
- &(newDtd->paramEntities),
- &(newDtd->pool),
- &(oldDtd->paramEntities)))
- return 0;
- newDtd->paramEntityRead = oldDtd->paramEntityRead;
+ if (!copyEntityTable(oldParser,
+ &(newDtd->paramEntities),
+ &(newDtd->pool),
+ &(oldDtd->paramEntities)))
+ return 0;
+ newDtd->paramEntityRead = oldDtd->paramEntityRead;
#endif /* XML_DTD */
- newDtd->keepProcessing = oldDtd->keepProcessing;
- newDtd->hasParamEntityRefs = oldDtd->hasParamEntityRefs;
- newDtd->standalone = oldDtd->standalone;
+ newDtd->keepProcessing = oldDtd->keepProcessing;
+ newDtd->hasParamEntityRefs = oldDtd->hasParamEntityRefs;
+ newDtd->standalone = oldDtd->standalone;
- /* Don't want deep copying for scaffolding */
- newDtd->in_eldecl = oldDtd->in_eldecl;
- newDtd->scaffold = oldDtd->scaffold;
- newDtd->contentStringLen = oldDtd->contentStringLen;
- newDtd->scaffSize = oldDtd->scaffSize;
- newDtd->scaffLevel = oldDtd->scaffLevel;
- newDtd->scaffIndex = oldDtd->scaffIndex;
+ /* Don't want deep copying for scaffolding */
+ newDtd->in_eldecl = oldDtd->in_eldecl;
+ newDtd->scaffold = oldDtd->scaffold;
+ newDtd->contentStringLen = oldDtd->contentStringLen;
+ newDtd->scaffSize = oldDtd->scaffSize;
+ newDtd->scaffLevel = oldDtd->scaffLevel;
+ newDtd->scaffIndex = oldDtd->scaffIndex;
- return 1;
+ return 1;
} /* End dtdCopy */
static int
copyEntityTable(XML_Parser oldParser,
- HASH_TABLE *newTable,
- STRING_POOL *newPool,
- const HASH_TABLE *oldTable)
-{
- HASH_TABLE_ITER iter;
- const XML_Char *cachedOldBase = NULL;
- const XML_Char *cachedNewBase = NULL;
-
- hashTableIterInit(&iter, oldTable);
-
- for (;;) {
- ENTITY *newE;
- const XML_Char *name;
- const ENTITY *oldE = (ENTITY *)hashTableIterNext(&iter);
- if (!oldE)
- break;
- name = poolCopyString(newPool, oldE->name);
- if (!name)
- return 0;
- newE = (ENTITY *)lookup(oldParser, newTable, name, sizeof(ENTITY));
- if (!newE)
- return 0;
- if (oldE->systemId) {
- const XML_Char *tem = poolCopyString(newPool, oldE->systemId);
- if (!tem)
- return 0;
- newE->systemId = tem;
- if (oldE->base) {
- if (oldE->base == cachedOldBase)
- newE->base = cachedNewBase;
- else {
- cachedOldBase = oldE->base;
- tem = poolCopyString(newPool, cachedOldBase);
- if (!tem)
- return 0;
- cachedNewBase = newE->base = tem;
- }
- }
- if (oldE->publicId) {
- tem = poolCopyString(newPool, oldE->publicId);
- if (!tem)
- return 0;
- newE->publicId = tem;
- }
- }
- else {
- const XML_Char *tem = poolCopyStringN(newPool, oldE->textPtr,
- oldE->textLen);
- if (!tem)
- return 0;
- newE->textPtr = tem;
- newE->textLen = oldE->textLen;
- }
- if (oldE->notation) {
- const XML_Char *tem = poolCopyString(newPool, oldE->notation);
- if (!tem)
- return 0;
- newE->notation = tem;
- }
- newE->is_param = oldE->is_param;
- newE->is_internal = oldE->is_internal;
- }
- return 1;
+ HASH_TABLE *newTable,
+ STRING_POOL *newPool,
+ const HASH_TABLE *oldTable)
+{
+ HASH_TABLE_ITER iter;
+ const XML_Char *cachedOldBase = NULL;
+ const XML_Char *cachedNewBase = NULL;
+
+ hashTableIterInit(&iter, oldTable);
+
+ for (;;) {
+ ENTITY *newE;
+ const XML_Char *name;
+ const ENTITY *oldE = (ENTITY *)hashTableIterNext(&iter);
+ if (!oldE)
+ break;
+ name = poolCopyString(newPool, oldE->name);
+ if (!name)
+ return 0;
+ newE = (ENTITY *)lookup(oldParser, newTable, name, sizeof(ENTITY));
+ if (!newE)
+ return 0;
+ if (oldE->systemId) {
+ const XML_Char *tem = poolCopyString(newPool, oldE->systemId);
+ if (!tem)
+ return 0;
+ newE->systemId = tem;
+ if (oldE->base) {
+ if (oldE->base == cachedOldBase)
+ newE->base = cachedNewBase;
+ else {
+ cachedOldBase = oldE->base;
+ tem = poolCopyString(newPool, cachedOldBase);
+ if (!tem)
+ return 0;
+ cachedNewBase = newE->base = tem;
+ }
+ }
+ if (oldE->publicId) {
+ tem = poolCopyString(newPool, oldE->publicId);
+ if (!tem)
+ return 0;
+ newE->publicId = tem;
+ }
+ }
+ else {
+ const XML_Char *tem = poolCopyStringN(newPool, oldE->textPtr,
+ oldE->textLen);
+ if (!tem)
+ return 0;
+ newE->textPtr = tem;
+ newE->textLen = oldE->textLen;
+ }
+ if (oldE->notation) {
+ const XML_Char *tem = poolCopyString(newPool, oldE->notation);
+ if (!tem)
+ return 0;
+ newE->notation = tem;
+ }
+ newE->is_param = oldE->is_param;
+ newE->is_internal = oldE->is_internal;
+ }
+ return 1;
}
#define INIT_POWER 6
@@ -5941,453 +5941,453 @@ copyEntityTable(XML_Parser oldParser,
static XML_Bool FASTCALL
keyeq(KEY s1, KEY s2)
{
- for (; *s1 == *s2; s1++, s2++)
- if (*s1 == 0)
- return XML_TRUE;
- return XML_FALSE;
+ for (; *s1 == *s2; s1++, s2++)
+ if (*s1 == 0)
+ return XML_TRUE;
+ return XML_FALSE;
}
static unsigned long FASTCALL
hash(XML_Parser parser, KEY s)
{
- unsigned long h = hash_secret_salt;
- while (*s)
- h = CHAR_HASH(h, *s++);
- return h;
+ unsigned long h = hash_secret_salt;
+ while (*s)
+ h = CHAR_HASH(h, *s++);
+ return h;
}
static NAMED *
lookup(XML_Parser parser, HASH_TABLE *table, KEY name, size_t createSize)
{
- size_t i;
- if (table->size == 0) {
- size_t tsize;
- if (!createSize)
- return NULL;
- table->power = INIT_POWER;
- /* table->size is a power of 2 */
- table->size = (size_t)1 << INIT_POWER;
- tsize = table->size * sizeof(NAMED *);
- table->v = (NAMED **)table->mem->malloc_fcn(tsize);
- if (!table->v) {
- table->size = 0;
- return NULL;
- }
- memset(table->v, 0, tsize);
- i = hash(parser, name) & ((unsigned long)table->size - 1);
- }
- else {
- unsigned long h = hash(parser, name);
- unsigned long mask = (unsigned long)table->size - 1;
- unsigned char step = 0;
- i = h & mask;
- while (table->v[i]) {
- if (keyeq(name, table->v[i]->name))
- return table->v[i];
- if (!step)
- step = PROBE_STEP(h, mask, table->power);
- i < step ? (i += table->size - step) : (i -= step);
- }
- if (!createSize)
- return NULL;
-
- /* check for overflow (table is half full) */
- if (table->used >> (table->power - 1)) {
- unsigned char newPower = table->power + 1;
- size_t newSize = (size_t)1 << newPower;
- unsigned long newMask = (unsigned long)newSize - 1;
- size_t tsize = newSize * sizeof(NAMED *);
- NAMED **newV = (NAMED **)table->mem->malloc_fcn(tsize);
- if (!newV)
- return NULL;
- memset(newV, 0, tsize);
- for (i = 0; i < table->size; i++)
- if (table->v[i]) {
- unsigned long newHash = hash(parser, table->v[i]->name);
- size_t j = newHash & newMask;
- step = 0;
- while (newV[j]) {
- if (!step)
- step = PROBE_STEP(newHash, newMask, newPower);
- j < step ? (j += newSize - step) : (j -= step);
- }
- newV[j] = table->v[i];
- }
- table->mem->free_fcn(table->v);
- table->v = newV;
- table->power = newPower;
- table->size = newSize;
- i = h & newMask;
- step = 0;
- while (table->v[i]) {
- if (!step)
- step = PROBE_STEP(h, newMask, newPower);
- i < step ? (i += newSize - step) : (i -= step);
- }
- }
- }
- table->v[i] = (NAMED *)table->mem->malloc_fcn(createSize);
- if (!table->v[i])
- return NULL;
- memset(table->v[i], 0, createSize);
- table->v[i]->name = name;
- (table->used)++;
- return table->v[i];
+ size_t i;
+ if (table->size == 0) {
+ size_t tsize;
+ if (!createSize)
+ return NULL;
+ table->power = INIT_POWER;
+ /* table->size is a power of 2 */
+ table->size = (size_t)1 << INIT_POWER;
+ tsize = table->size * sizeof(NAMED *);
+ table->v = (NAMED **)table->mem->malloc_fcn(tsize);
+ if (!table->v) {
+ table->size = 0;
+ return NULL;
+ }
+ memset(table->v, 0, tsize);
+ i = hash(parser, name) & ((unsigned long)table->size - 1);
+ }
+ else {
+ unsigned long h = hash(parser, name);
+ unsigned long mask = (unsigned long)table->size - 1;
+ unsigned char step = 0;
+ i = h & mask;
+ while (table->v[i]) {
+ if (keyeq(name, table->v[i]->name))
+ return table->v[i];
+ if (!step)
+ step = PROBE_STEP(h, mask, table->power);
+ i < step ? (i += table->size - step) : (i -= step);
+ }
+ if (!createSize)
+ return NULL;
+
+ /* check for overflow (table is half full) */
+ if (table->used >> (table->power - 1)) {
+ unsigned char newPower = table->power + 1;
+ size_t newSize = (size_t)1 << newPower;
+ unsigned long newMask = (unsigned long)newSize - 1;
+ size_t tsize = newSize * sizeof(NAMED *);
+ NAMED **newV = (NAMED **)table->mem->malloc_fcn(tsize);
+ if (!newV)
+ return NULL;
+ memset(newV, 0, tsize);
+ for (i = 0; i < table->size; i++)
+ if (table->v[i]) {
+ unsigned long newHash = hash(parser, table->v[i]->name);
+ size_t j = newHash & newMask;
+ step = 0;
+ while (newV[j]) {
+ if (!step)
+ step = PROBE_STEP(newHash, newMask, newPower);
+ j < step ? (j += newSize - step) : (j -= step);
+ }
+ newV[j] = table->v[i];
+ }
+ table->mem->free_fcn(table->v);
+ table->v = newV;
+ table->power = newPower;
+ table->size = newSize;
+ i = h & newMask;
+ step = 0;
+ while (table->v[i]) {
+ if (!step)
+ step = PROBE_STEP(h, newMask, newPower);
+ i < step ? (i += newSize - step) : (i -= step);
+ }
+ }
+ }
+ table->v[i] = (NAMED *)table->mem->malloc_fcn(createSize);
+ if (!table->v[i])
+ return NULL;
+ memset(table->v[i], 0, createSize);
+ table->v[i]->name = name;
+ (table->used)++;
+ return table->v[i];
}
static void FASTCALL
hashTableClear(HASH_TABLE *table)
{
- size_t i;
- for (i = 0; i < table->size; i++) {
- table->mem->free_fcn(table->v[i]);
- table->v[i] = NULL;
- }
- table->used = 0;
+ size_t i;
+ for (i = 0; i < table->size; i++) {
+ table->mem->free_fcn(table->v[i]);
+ table->v[i] = NULL;
+ }
+ table->used = 0;
}
static void FASTCALL
hashTableDestroy(HASH_TABLE *table)
{
- size_t i;
- for (i = 0; i < table->size; i++)
- table->mem->free_fcn(table->v[i]);
- table->mem->free_fcn(table->v);
+ size_t i;
+ for (i = 0; i < table->size; i++)
+ table->mem->free_fcn(table->v[i]);
+ table->mem->free_fcn(table->v);
}
static void FASTCALL
hashTableInit(HASH_TABLE *p, const XML_Memory_Handling_Suite *ms)
{
- p->power = 0;
- p->size = 0;
- p->used = 0;
- p->v = NULL;
- p->mem = ms;
+ p->power = 0;
+ p->size = 0;
+ p->used = 0;
+ p->v = NULL;
+ p->mem = ms;
}
static void FASTCALL
hashTableIterInit(HASH_TABLE_ITER *iter, const HASH_TABLE *table)
{
- iter->p = table->v;
- iter->end = iter->p + table->size;
+ iter->p = table->v;
+ iter->end = iter->p + table->size;
}
static NAMED * FASTCALL
hashTableIterNext(HASH_TABLE_ITER *iter)
{
- while (iter->p != iter->end) {
- NAMED *tem = *(iter->p)++;
- if (tem)
- return tem;
- }
- return NULL;
+ while (iter->p != iter->end) {
+ NAMED *tem = *(iter->p)++;
+ if (tem)
+ return tem;
+ }
+ return NULL;
}
static void FASTCALL
poolInit(STRING_POOL *pool, const XML_Memory_Handling_Suite *ms)
{
- pool->blocks = NULL;
- pool->freeBlocks = NULL;
- pool->start = NULL;
- pool->ptr = NULL;
- pool->end = NULL;
- pool->mem = ms;
+ pool->blocks = NULL;
+ pool->freeBlocks = NULL;
+ pool->start = NULL;
+ pool->ptr = NULL;
+ pool->end = NULL;
+ pool->mem = ms;
}
static void FASTCALL
poolClear(STRING_POOL *pool)
{
- if (!pool->freeBlocks)
- pool->freeBlocks = pool->blocks;
- else {
- BLOCK *p = pool->blocks;
- while (p) {
- BLOCK *tem = p->next;
- p->next = pool->freeBlocks;
- pool->freeBlocks = p;
- p = tem;
- }
- }
- pool->blocks = NULL;
- pool->start = NULL;
- pool->ptr = NULL;
- pool->end = NULL;
+ if (!pool->freeBlocks)
+ pool->freeBlocks = pool->blocks;
+ else {
+ BLOCK *p = pool->blocks;
+ while (p) {
+ BLOCK *tem = p->next;
+ p->next = pool->freeBlocks;
+ pool->freeBlocks = p;
+ p = tem;
+ }
+ }
+ pool->blocks = NULL;
+ pool->start = NULL;
+ pool->ptr = NULL;
+ pool->end = NULL;
}
static void FASTCALL
poolDestroy(STRING_POOL *pool)
{
- BLOCK *p = pool->blocks;
- while (p) {
- BLOCK *tem = p->next;
- pool->mem->free_fcn(p);
- p = tem;
- }
- p = pool->freeBlocks;
- while (p) {
- BLOCK *tem = p->next;
- pool->mem->free_fcn(p);
- p = tem;
- }
+ BLOCK *p = pool->blocks;
+ while (p) {
+ BLOCK *tem = p->next;
+ pool->mem->free_fcn(p);
+ p = tem;
+ }
+ p = pool->freeBlocks;
+ while (p) {
+ BLOCK *tem = p->next;
+ pool->mem->free_fcn(p);
+ p = tem;
+ }
}
static XML_Char *
poolAppend(STRING_POOL *pool, const ENCODING *enc,
- const char *ptr, const char *end)
+ const char *ptr, const char *end)
{
- if (!pool->ptr && !poolGrow(pool))
- return NULL;
- for (;;) {
- XmlConvert(enc, &ptr, end, (ICHAR **)&(pool->ptr), (ICHAR *)pool->end);
- if (ptr == end)
- break;
- if (!poolGrow(pool))
- return NULL;
- }
- return pool->start;
+ if (!pool->ptr && !poolGrow(pool))
+ return NULL;
+ for (;;) {
+ XmlConvert(enc, &ptr, end, (ICHAR **)&(pool->ptr), (ICHAR *)pool->end);
+ if (ptr == end)
+ break;
+ if (!poolGrow(pool))
+ return NULL;
+ }
+ return pool->start;
}
static const XML_Char * FASTCALL
poolCopyString(STRING_POOL *pool, const XML_Char *s)
{
- do {
- if (!poolAppendChar(pool, *s))
- return NULL;
- } while (*s++);
- s = pool->start;
- poolFinish(pool);
- return s;
+ do {
+ if (!poolAppendChar(pool, *s))
+ return NULL;
+ } while (*s++);
+ s = pool->start;
+ poolFinish(pool);
+ return s;
}
static const XML_Char *
poolCopyStringN(STRING_POOL *pool, const XML_Char *s, int n)
{
- if (!pool->ptr && !poolGrow(pool))
- return NULL;
- for (; n > 0; --n, s++) {
- if (!poolAppendChar(pool, *s))
- return NULL;
- }
- s = pool->start;
- poolFinish(pool);
- return s;
+ if (!pool->ptr && !poolGrow(pool))
+ return NULL;
+ for (; n > 0; --n, s++) {
+ if (!poolAppendChar(pool, *s))
+ return NULL;
+ }
+ s = pool->start;
+ poolFinish(pool);
+ return s;
}
static const XML_Char * FASTCALL
poolAppendString(STRING_POOL *pool, const XML_Char *s)
{
- while (*s) {
- if (!poolAppendChar(pool, *s))
- return NULL;
- s++;
- }
- return pool->start;
+ while (*s) {
+ if (!poolAppendChar(pool, *s))
+ return NULL;
+ s++;
+ }
+ return pool->start;
}
static XML_Char *
poolStoreString(STRING_POOL *pool, const ENCODING *enc,
- const char *ptr, const char *end)
+ const char *ptr, const char *end)
{
- if (!poolAppend(pool, enc, ptr, end))
- return NULL;
- if (pool->ptr == pool->end && !poolGrow(pool))
- return NULL;
- *(pool->ptr)++ = 0;
- return pool->start;
+ if (!poolAppend(pool, enc, ptr, end))
+ return NULL;
+ if (pool->ptr == pool->end && !poolGrow(pool))
+ return NULL;
+ *(pool->ptr)++ = 0;
+ return pool->start;
}
static XML_Bool FASTCALL
poolGrow(STRING_POOL *pool)
{
- if (pool->freeBlocks) {
- if (pool->start == 0) {
- pool->blocks = pool->freeBlocks;
- pool->freeBlocks = pool->freeBlocks->next;
- pool->blocks->next = NULL;
- pool->start = pool->blocks->s;
- pool->end = pool->start + pool->blocks->size;
- pool->ptr = pool->start;
- return XML_TRUE;
- }
- if (pool->end - pool->start < pool->freeBlocks->size) {
- BLOCK *tem = pool->freeBlocks->next;
- pool->freeBlocks->next = pool->blocks;
- pool->blocks = pool->freeBlocks;
- pool->freeBlocks = tem;
- memcpy(pool->blocks->s, pool->start,
- (pool->end - pool->start) * sizeof(XML_Char));
- pool->ptr = pool->blocks->s + (pool->ptr - pool->start);
- pool->start = pool->blocks->s;
- pool->end = pool->start + pool->blocks->size;
- return XML_TRUE;
- }
- }
- if (pool->blocks && pool->start == pool->blocks->s) {
- int blockSize = (int)(pool->end - pool->start)*2;
- BLOCK *temp = (BLOCK *)
- pool->mem->realloc_fcn(pool->blocks,
- (offsetof(BLOCK, s)
- + blockSize * sizeof(XML_Char)));
- if (temp == NULL)
- return XML_FALSE;
- pool->blocks = temp;
- pool->blocks->size = blockSize;
- pool->ptr = pool->blocks->s + (pool->ptr - pool->start);
- pool->start = pool->blocks->s;
- pool->end = pool->start + blockSize;
- }
- else {
- BLOCK *tem;
- int blockSize = (int)(pool->end - pool->start);
- if (blockSize < INIT_BLOCK_SIZE)
- blockSize = INIT_BLOCK_SIZE;
- else
- blockSize *= 2;
- tem = (BLOCK *)pool->mem->malloc_fcn(offsetof(BLOCK, s)
- + blockSize * sizeof(XML_Char));
- if (!tem)
- return XML_FALSE;
- tem->size = blockSize;
- tem->next = pool->blocks;
- pool->blocks = tem;
- if (pool->ptr != pool->start)
- memcpy(tem->s, pool->start,
- (pool->ptr - pool->start) * sizeof(XML_Char));
- pool->ptr = tem->s + (pool->ptr - pool->start);
- pool->start = tem->s;
- pool->end = tem->s + blockSize;
- }
- return XML_TRUE;
+ if (pool->freeBlocks) {
+ if (pool->start == 0) {
+ pool->blocks = pool->freeBlocks;
+ pool->freeBlocks = pool->freeBlocks->next;
+ pool->blocks->next = NULL;
+ pool->start = pool->blocks->s;
+ pool->end = pool->start + pool->blocks->size;
+ pool->ptr = pool->start;
+ return XML_TRUE;
+ }
+ if (pool->end - pool->start < pool->freeBlocks->size) {
+ BLOCK *tem = pool->freeBlocks->next;
+ pool->freeBlocks->next = pool->blocks;
+ pool->blocks = pool->freeBlocks;
+ pool->freeBlocks = tem;
+ memcpy(pool->blocks->s, pool->start,
+ (pool->end - pool->start) * sizeof(XML_Char));
+ pool->ptr = pool->blocks->s + (pool->ptr - pool->start);
+ pool->start = pool->blocks->s;
+ pool->end = pool->start + pool->blocks->size;
+ return XML_TRUE;
+ }
+ }
+ if (pool->blocks && pool->start == pool->blocks->s) {
+ int blockSize = (int)(pool->end - pool->start)*2;
+ BLOCK *temp = (BLOCK *)
+ pool->mem->realloc_fcn(pool->blocks,
+ (offsetof(BLOCK, s)
+ + blockSize * sizeof(XML_Char)));
+ if (temp == NULL)
+ return XML_FALSE;
+ pool->blocks = temp;
+ pool->blocks->size = blockSize;
+ pool->ptr = pool->blocks->s + (pool->ptr - pool->start);
+ pool->start = pool->blocks->s;
+ pool->end = pool->start + blockSize;
+ }
+ else {
+ BLOCK *tem;
+ int blockSize = (int)(pool->end - pool->start);
+ if (blockSize < INIT_BLOCK_SIZE)
+ blockSize = INIT_BLOCK_SIZE;
+ else
+ blockSize *= 2;
+ tem = (BLOCK *)pool->mem->malloc_fcn(offsetof(BLOCK, s)
+ + blockSize * sizeof(XML_Char));
+ if (!tem)
+ return XML_FALSE;
+ tem->size = blockSize;
+ tem->next = pool->blocks;
+ pool->blocks = tem;
+ if (pool->ptr != pool->start)
+ memcpy(tem->s, pool->start,
+ (pool->ptr - pool->start) * sizeof(XML_Char));
+ pool->ptr = tem->s + (pool->ptr - pool->start);
+ pool->start = tem->s;
+ pool->end = tem->s + blockSize;
+ }
+ return XML_TRUE;
}
static int FASTCALL
nextScaffoldPart(XML_Parser parser)
{
- DTD * const dtd = _dtd; /* save one level of indirection */
- CONTENT_SCAFFOLD * me;
- int next;
-
- if (!dtd->scaffIndex) {
- dtd->scaffIndex = (int *)MALLOC(groupSize * sizeof(int));
- if (!dtd->scaffIndex)
- return -1;
- dtd->scaffIndex[0] = 0;
- }
-
- if (dtd->scaffCount >= dtd->scaffSize) {
- CONTENT_SCAFFOLD *temp;
- if (dtd->scaffold) {
- temp = (CONTENT_SCAFFOLD *)
- REALLOC(dtd->scaffold, dtd->scaffSize * 2 * sizeof(CONTENT_SCAFFOLD));
- if (temp == NULL)
- return -1;
- dtd->scaffSize *= 2;
- }
- else {
- temp = (CONTENT_SCAFFOLD *)MALLOC(INIT_SCAFFOLD_ELEMENTS
- * sizeof(CONTENT_SCAFFOLD));
- if (temp == NULL)
- return -1;
- dtd->scaffSize = INIT_SCAFFOLD_ELEMENTS;
- }
- dtd->scaffold = temp;
- }
- next = dtd->scaffCount++;
- me = &dtd->scaffold[next];
- if (dtd->scaffLevel) {
- CONTENT_SCAFFOLD *parent = &dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel-1]];
- if (parent->lastchild) {
- dtd->scaffold[parent->lastchild].nextsib = next;
- }
- if (!parent->childcnt)
- parent->firstchild = next;
- parent->lastchild = next;
- parent->childcnt++;
- }
- me->firstchild = me->lastchild = me->childcnt = me->nextsib = 0;
- return next;
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ CONTENT_SCAFFOLD * me;
+ int next;
+
+ if (!dtd->scaffIndex) {
+ dtd->scaffIndex = (int *)MALLOC(groupSize * sizeof(int));
+ if (!dtd->scaffIndex)
+ return -1;
+ dtd->scaffIndex[0] = 0;
+ }
+
+ if (dtd->scaffCount >= dtd->scaffSize) {
+ CONTENT_SCAFFOLD *temp;
+ if (dtd->scaffold) {
+ temp = (CONTENT_SCAFFOLD *)
+ REALLOC(dtd->scaffold, dtd->scaffSize * 2 * sizeof(CONTENT_SCAFFOLD));
+ if (temp == NULL)
+ return -1;
+ dtd->scaffSize *= 2;
+ }
+ else {
+ temp = (CONTENT_SCAFFOLD *)MALLOC(INIT_SCAFFOLD_ELEMENTS
+ * sizeof(CONTENT_SCAFFOLD));
+ if (temp == NULL)
+ return -1;
+ dtd->scaffSize = INIT_SCAFFOLD_ELEMENTS;
+ }
+ dtd->scaffold = temp;
+ }
+ next = dtd->scaffCount++;
+ me = &dtd->scaffold[next];
+ if (dtd->scaffLevel) {
+ CONTENT_SCAFFOLD *parent = &dtd->scaffold[dtd->scaffIndex[dtd->scaffLevel-1]];
+ if (parent->lastchild) {
+ dtd->scaffold[parent->lastchild].nextsib = next;
+ }
+ if (!parent->childcnt)
+ parent->firstchild = next;
+ parent->lastchild = next;
+ parent->childcnt++;
+ }
+ me->firstchild = me->lastchild = me->childcnt = me->nextsib = 0;
+ return next;
}
static void
build_node(XML_Parser parser,
- int src_node,
- XML_Content *dest,
- XML_Content **contpos,
- XML_Char **strpos)
-{
- DTD * const dtd = _dtd; /* save one level of indirection */
- dest->type = dtd->scaffold[src_node].type;
- dest->quant = dtd->scaffold[src_node].quant;
- if (dest->type == XML_CTYPE_NAME) {
- const XML_Char *src;
- dest->name = *strpos;
- src = dtd->scaffold[src_node].name;
- for (;;) {
- *(*strpos)++ = *src;
- if (!*src)
- break;
- src++;
- }
- dest->numchildren = 0;
- dest->children = NULL;
- }
- else {
- unsigned int i;
- int cn;
- dest->numchildren = dtd->scaffold[src_node].childcnt;
- dest->children = *contpos;
- *contpos += dest->numchildren;
- for (i = 0, cn = dtd->scaffold[src_node].firstchild;
- i < dest->numchildren;
- i++, cn = dtd->scaffold[cn].nextsib) {
- build_node(parser, cn, &(dest->children[i]), contpos, strpos);
- }
- dest->name = NULL;
- }
+ int src_node,
+ XML_Content *dest,
+ XML_Content **contpos,
+ XML_Char **strpos)
+{
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ dest->type = dtd->scaffold[src_node].type;
+ dest->quant = dtd->scaffold[src_node].quant;
+ if (dest->type == XML_CTYPE_NAME) {
+ const XML_Char *src;
+ dest->name = *strpos;
+ src = dtd->scaffold[src_node].name;
+ for (;;) {
+ *(*strpos)++ = *src;
+ if (!*src)
+ break;
+ src++;
+ }
+ dest->numchildren = 0;
+ dest->children = NULL;
+ }
+ else {
+ unsigned int i;
+ int cn;
+ dest->numchildren = dtd->scaffold[src_node].childcnt;
+ dest->children = *contpos;
+ *contpos += dest->numchildren;
+ for (i = 0, cn = dtd->scaffold[src_node].firstchild;
+ i < dest->numchildren;
+ i++, cn = dtd->scaffold[cn].nextsib) {
+ build_node(parser, cn, &(dest->children[i]), contpos, strpos);
+ }
+ dest->name = NULL;
+ }
}
static XML_Content *
build_model (XML_Parser parser)
{
- DTD * const dtd = _dtd; /* save one level of indirection */
- XML_Content *ret;
- XML_Content *cpos;
- XML_Char * str;
- int allocsize = (dtd->scaffCount * sizeof(XML_Content)
- + (dtd->contentStringLen * sizeof(XML_Char)));
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ XML_Content *ret;
+ XML_Content *cpos;
+ XML_Char * str;
+ int allocsize = (dtd->scaffCount * sizeof(XML_Content)
+ + (dtd->contentStringLen * sizeof(XML_Char)));
- ret = (XML_Content *)MALLOC(allocsize);
- if (!ret)
- return NULL;
+ ret = (XML_Content *)MALLOC(allocsize);
+ if (!ret)
+ return NULL;
- str = (XML_Char *) (&ret[dtd->scaffCount]);
- cpos = &ret[1];
+ str = (XML_Char *) (&ret[dtd->scaffCount]);
+ cpos = &ret[1];
- build_node(parser, 0, ret, &cpos, &str);
- return ret;
+ build_node(parser, 0, ret, &cpos, &str);
+ return ret;
}
static ELEMENT_TYPE *
getElementType(XML_Parser parser,
- const ENCODING *enc,
- const char *ptr,
- const char *end)
-{
- DTD * const dtd = _dtd; /* save one level of indirection */
- const XML_Char *name = poolStoreString(&dtd->pool, enc, ptr, end);
- ELEMENT_TYPE *ret;
-
- if (!name)
- return NULL;
- ret = (ELEMENT_TYPE *) lookup(parser, &dtd->elementTypes, name, sizeof(ELEMENT_TYPE));
- if (!ret)
- return NULL;
- if (ret->name != name)
- poolDiscard(&dtd->pool);
- else {
- poolFinish(&dtd->pool);
- if (!setElementTypePrefix(parser, ret))
- return NULL;
- }
- return ret;
+ const ENCODING *enc,
+ const char *ptr,
+ const char *end)
+{
+ DTD * const dtd = _dtd; /* save one level of indirection */
+ const XML_Char *name = poolStoreString(&dtd->pool, enc, ptr, end);
+ ELEMENT_TYPE *ret;
+
+ if (!name)
+ return NULL;
+ ret = (ELEMENT_TYPE *) lookup(parser, &dtd->elementTypes, name, sizeof(ELEMENT_TYPE));
+ if (!ret)
+ return NULL;
+ if (ret->name != name)
+ poolDiscard(&dtd->pool);
+ else {
+ poolFinish(&dtd->pool);
+ if (!setElementTypePrefix(parser, ret))
+ return NULL;
+ }
+ return ret;
}
diff --git a/src/lib/expat/xmlrole.c b/src/lib/expat/xmlrole.c
index bf6d30f30a8..d854f94917a 100644
--- a/src/lib/expat/xmlrole.c
+++ b/src/lib/expat/xmlrole.c
@@ -19,59 +19,59 @@
*/
static const char KW_ANY[] = {
- ASCII_A, ASCII_N, ASCII_Y, '\0' };
+ ASCII_A, ASCII_N, ASCII_Y, '\0' };
static const char KW_ATTLIST[] = {
- ASCII_A, ASCII_T, ASCII_T, ASCII_L, ASCII_I, ASCII_S, ASCII_T, '\0' };
+ ASCII_A, ASCII_T, ASCII_T, ASCII_L, ASCII_I, ASCII_S, ASCII_T, '\0' };
static const char KW_CDATA[] = {
- ASCII_C, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
+ ASCII_C, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
static const char KW_DOCTYPE[] = {
- ASCII_D, ASCII_O, ASCII_C, ASCII_T, ASCII_Y, ASCII_P, ASCII_E, '\0' };
+ ASCII_D, ASCII_O, ASCII_C, ASCII_T, ASCII_Y, ASCII_P, ASCII_E, '\0' };
static const char KW_ELEMENT[] = {
- ASCII_E, ASCII_L, ASCII_E, ASCII_M, ASCII_E, ASCII_N, ASCII_T, '\0' };
+ ASCII_E, ASCII_L, ASCII_E, ASCII_M, ASCII_E, ASCII_N, ASCII_T, '\0' };
static const char KW_EMPTY[] = {
- ASCII_E, ASCII_M, ASCII_P, ASCII_T, ASCII_Y, '\0' };
+ ASCII_E, ASCII_M, ASCII_P, ASCII_T, ASCII_Y, '\0' };
static const char KW_ENTITIES[] = {
- ASCII_E, ASCII_N, ASCII_T, ASCII_I, ASCII_T, ASCII_I, ASCII_E, ASCII_S,
- '\0' };
+ ASCII_E, ASCII_N, ASCII_T, ASCII_I, ASCII_T, ASCII_I, ASCII_E, ASCII_S,
+ '\0' };
static const char KW_ENTITY[] = {
- ASCII_E, ASCII_N, ASCII_T, ASCII_I, ASCII_T, ASCII_Y, '\0' };
+ ASCII_E, ASCII_N, ASCII_T, ASCII_I, ASCII_T, ASCII_Y, '\0' };
static const char KW_FIXED[] = {
- ASCII_F, ASCII_I, ASCII_X, ASCII_E, ASCII_D, '\0' };
+ ASCII_F, ASCII_I, ASCII_X, ASCII_E, ASCII_D, '\0' };
static const char KW_ID[] = {
- ASCII_I, ASCII_D, '\0' };
+ ASCII_I, ASCII_D, '\0' };
static const char KW_IDREF[] = {
- ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, '\0' };
+ ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, '\0' };
static const char KW_IDREFS[] = {
- ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, ASCII_S, '\0' };
+ ASCII_I, ASCII_D, ASCII_R, ASCII_E, ASCII_F, ASCII_S, '\0' };
#ifdef XML_DTD
static const char KW_IGNORE[] = {
- ASCII_I, ASCII_G, ASCII_N, ASCII_O, ASCII_R, ASCII_E, '\0' };
+ ASCII_I, ASCII_G, ASCII_N, ASCII_O, ASCII_R, ASCII_E, '\0' };
#endif
static const char KW_IMPLIED[] = {
- ASCII_I, ASCII_M, ASCII_P, ASCII_L, ASCII_I, ASCII_E, ASCII_D, '\0' };
+ ASCII_I, ASCII_M, ASCII_P, ASCII_L, ASCII_I, ASCII_E, ASCII_D, '\0' };
#ifdef XML_DTD
static const char KW_INCLUDE[] = {
- ASCII_I, ASCII_N, ASCII_C, ASCII_L, ASCII_U, ASCII_D, ASCII_E, '\0' };
+ ASCII_I, ASCII_N, ASCII_C, ASCII_L, ASCII_U, ASCII_D, ASCII_E, '\0' };
#endif
static const char KW_NDATA[] = {
- ASCII_N, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
+ ASCII_N, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
static const char KW_NMTOKEN[] = {
- ASCII_N, ASCII_M, ASCII_T, ASCII_O, ASCII_K, ASCII_E, ASCII_N, '\0' };
+ ASCII_N, ASCII_M, ASCII_T, ASCII_O, ASCII_K, ASCII_E, ASCII_N, '\0' };
static const char KW_NMTOKENS[] = {
- ASCII_N, ASCII_M, ASCII_T, ASCII_O, ASCII_K, ASCII_E, ASCII_N, ASCII_S,
- '\0' };
+ ASCII_N, ASCII_M, ASCII_T, ASCII_O, ASCII_K, ASCII_E, ASCII_N, ASCII_S,
+ '\0' };
static const char KW_NOTATION[] =
- { ASCII_N, ASCII_O, ASCII_T, ASCII_A, ASCII_T, ASCII_I, ASCII_O, ASCII_N,
- '\0' };
+ { ASCII_N, ASCII_O, ASCII_T, ASCII_A, ASCII_T, ASCII_I, ASCII_O, ASCII_N,
+ '\0' };
static const char KW_PCDATA[] = {
- ASCII_P, ASCII_C, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
+ ASCII_P, ASCII_C, ASCII_D, ASCII_A, ASCII_T, ASCII_A, '\0' };
static const char KW_PUBLIC[] = {
- ASCII_P, ASCII_U, ASCII_B, ASCII_L, ASCII_I, ASCII_C, '\0' };
+ ASCII_P, ASCII_U, ASCII_B, ASCII_L, ASCII_I, ASCII_C, '\0' };
static const char KW_REQUIRED[] = {
- ASCII_R, ASCII_E, ASCII_Q, ASCII_U, ASCII_I, ASCII_R, ASCII_E, ASCII_D,
- '\0' };
+ ASCII_R, ASCII_E, ASCII_Q, ASCII_U, ASCII_I, ASCII_R, ASCII_E, ASCII_D,
+ '\0' };
static const char KW_SYSTEM[] = {
- ASCII_S, ASCII_Y, ASCII_S, ASCII_T, ASCII_E, ASCII_M, '\0' };
+ ASCII_S, ASCII_Y, ASCII_S, ASCII_T, ASCII_E, ASCII_M, '\0' };
#ifndef MIN_BYTES_PER_CHAR
#define MIN_BYTES_PER_CHAR(enc) ((enc)->minBytesPerChar)
@@ -79,1235 +79,1235 @@ static const char KW_SYSTEM[] = {
#ifdef XML_DTD
#define setTopLevel(state) \
- ((state)->handler = ((state)->documentEntity \
- ? internalSubset \
- : externalSubset1))
+ ((state)->handler = ((state)->documentEntity \
+ ? internalSubset \
+ : externalSubset1))
#else /* not XML_DTD */
#define setTopLevel(state) ((state)->handler = internalSubset)
#endif /* not XML_DTD */
typedef int PTRCALL PROLOG_HANDLER(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc);
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc);
static PROLOG_HANDLER
- prolog0, prolog1, prolog2,
- doctype0, doctype1, doctype2, doctype3, doctype4, doctype5,
- internalSubset,
- entity0, entity1, entity2, entity3, entity4, entity5, entity6,
- entity7, entity8, entity9, entity10,
- notation0, notation1, notation2, notation3, notation4,
- attlist0, attlist1, attlist2, attlist3, attlist4, attlist5, attlist6,
- attlist7, attlist8, attlist9,
- element0, element1, element2, element3, element4, element5, element6,
- element7,
+ prolog0, prolog1, prolog2,
+ doctype0, doctype1, doctype2, doctype3, doctype4, doctype5,
+ internalSubset,
+ entity0, entity1, entity2, entity3, entity4, entity5, entity6,
+ entity7, entity8, entity9, entity10,
+ notation0, notation1, notation2, notation3, notation4,
+ attlist0, attlist1, attlist2, attlist3, attlist4, attlist5, attlist6,
+ attlist7, attlist8, attlist9,
+ element0, element1, element2, element3, element4, element5, element6,
+ element7,
#ifdef XML_DTD
- externalSubset0, externalSubset1,
- condSect0, condSect1, condSect2,
+ externalSubset0, externalSubset1,
+ condSect0, condSect1, condSect2,
#endif /* XML_DTD */
- declClose,
- error;
+ declClose,
+ error;
static int FASTCALL common(PROLOG_STATE *state, int tok);
static int PTRCALL
prolog0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- state->handler = prolog1;
- return XML_ROLE_NONE;
- case XML_TOK_XML_DECL:
- state->handler = prolog1;
- return XML_ROLE_XML_DECL;
- case XML_TOK_PI:
- state->handler = prolog1;
- return XML_ROLE_PI;
- case XML_TOK_COMMENT:
- state->handler = prolog1;
- return XML_ROLE_COMMENT;
- case XML_TOK_BOM:
- return XML_ROLE_NONE;
- case XML_TOK_DECL_OPEN:
- if (!XmlNameMatchesAscii(enc,
- ptr + 2 * MIN_BYTES_PER_CHAR(enc),
- end,
- KW_DOCTYPE))
- break;
- state->handler = doctype0;
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_INSTANCE_START:
- state->handler = error;
- return XML_ROLE_INSTANCE_START;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ state->handler = prolog1;
+ return XML_ROLE_NONE;
+ case XML_TOK_XML_DECL:
+ state->handler = prolog1;
+ return XML_ROLE_XML_DECL;
+ case XML_TOK_PI:
+ state->handler = prolog1;
+ return XML_ROLE_PI;
+ case XML_TOK_COMMENT:
+ state->handler = prolog1;
+ return XML_ROLE_COMMENT;
+ case XML_TOK_BOM:
+ return XML_ROLE_NONE;
+ case XML_TOK_DECL_OPEN:
+ if (!XmlNameMatchesAscii(enc,
+ ptr + 2 * MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_DOCTYPE))
+ break;
+ state->handler = doctype0;
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_INSTANCE_START:
+ state->handler = error;
+ return XML_ROLE_INSTANCE_START;
+ }
+ return common(state, tok);
}
static int PTRCALL
prolog1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NONE;
- case XML_TOK_PI:
- return XML_ROLE_PI;
- case XML_TOK_COMMENT:
- return XML_ROLE_COMMENT;
- case XML_TOK_BOM:
- return XML_ROLE_NONE;
- case XML_TOK_DECL_OPEN:
- if (!XmlNameMatchesAscii(enc,
- ptr + 2 * MIN_BYTES_PER_CHAR(enc),
- end,
- KW_DOCTYPE))
- break;
- state->handler = doctype0;
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_INSTANCE_START:
- state->handler = error;
- return XML_ROLE_INSTANCE_START;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NONE;
+ case XML_TOK_PI:
+ return XML_ROLE_PI;
+ case XML_TOK_COMMENT:
+ return XML_ROLE_COMMENT;
+ case XML_TOK_BOM:
+ return XML_ROLE_NONE;
+ case XML_TOK_DECL_OPEN:
+ if (!XmlNameMatchesAscii(enc,
+ ptr + 2 * MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_DOCTYPE))
+ break;
+ state->handler = doctype0;
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_INSTANCE_START:
+ state->handler = error;
+ return XML_ROLE_INSTANCE_START;
+ }
+ return common(state, tok);
}
static int PTRCALL
prolog2(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NONE;
- case XML_TOK_PI:
- return XML_ROLE_PI;
- case XML_TOK_COMMENT:
- return XML_ROLE_COMMENT;
- case XML_TOK_INSTANCE_START:
- state->handler = error;
- return XML_ROLE_INSTANCE_START;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NONE;
+ case XML_TOK_PI:
+ return XML_ROLE_PI;
+ case XML_TOK_COMMENT:
+ return XML_ROLE_COMMENT;
+ case XML_TOK_INSTANCE_START:
+ state->handler = error;
+ return XML_ROLE_INSTANCE_START;
+ }
+ return common(state, tok);
}
static int PTRCALL
doctype0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = doctype1;
- return XML_ROLE_DOCTYPE_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = doctype1;
+ return XML_ROLE_DOCTYPE_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
doctype1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_OPEN_BRACKET:
- state->handler = internalSubset;
- return XML_ROLE_DOCTYPE_INTERNAL_SUBSET;
- case XML_TOK_DECL_CLOSE:
- state->handler = prolog2;
- return XML_ROLE_DOCTYPE_CLOSE;
- case XML_TOK_NAME:
- if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
- state->handler = doctype3;
- return XML_ROLE_DOCTYPE_NONE;
- }
- if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
- state->handler = doctype2;
- return XML_ROLE_DOCTYPE_NONE;
- }
- break;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_OPEN_BRACKET:
+ state->handler = internalSubset;
+ return XML_ROLE_DOCTYPE_INTERNAL_SUBSET;
+ case XML_TOK_DECL_CLOSE:
+ state->handler = prolog2;
+ return XML_ROLE_DOCTYPE_CLOSE;
+ case XML_TOK_NAME:
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
+ state->handler = doctype3;
+ return XML_ROLE_DOCTYPE_NONE;
+ }
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
+ state->handler = doctype2;
+ return XML_ROLE_DOCTYPE_NONE;
+ }
+ break;
+ }
+ return common(state, tok);
}
static int PTRCALL
doctype2(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_LITERAL:
- state->handler = doctype3;
- return XML_ROLE_DOCTYPE_PUBLIC_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = doctype3;
+ return XML_ROLE_DOCTYPE_PUBLIC_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
doctype3(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_LITERAL:
- state->handler = doctype4;
- return XML_ROLE_DOCTYPE_SYSTEM_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = doctype4;
+ return XML_ROLE_DOCTYPE_SYSTEM_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
doctype4(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_OPEN_BRACKET:
- state->handler = internalSubset;
- return XML_ROLE_DOCTYPE_INTERNAL_SUBSET;
- case XML_TOK_DECL_CLOSE:
- state->handler = prolog2;
- return XML_ROLE_DOCTYPE_CLOSE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_OPEN_BRACKET:
+ state->handler = internalSubset;
+ return XML_ROLE_DOCTYPE_INTERNAL_SUBSET;
+ case XML_TOK_DECL_CLOSE:
+ state->handler = prolog2;
+ return XML_ROLE_DOCTYPE_CLOSE;
+ }
+ return common(state, tok);
}
static int PTRCALL
doctype5(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_DECL_CLOSE:
- state->handler = prolog2;
- return XML_ROLE_DOCTYPE_CLOSE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_DECL_CLOSE:
+ state->handler = prolog2;
+ return XML_ROLE_DOCTYPE_CLOSE;
+ }
+ return common(state, tok);
}
static int PTRCALL
internalSubset(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NONE;
- case XML_TOK_DECL_OPEN:
- if (XmlNameMatchesAscii(enc,
- ptr + 2 * MIN_BYTES_PER_CHAR(enc),
- end,
- KW_ENTITY)) {
- state->handler = entity0;
- return XML_ROLE_ENTITY_NONE;
- }
- if (XmlNameMatchesAscii(enc,
- ptr + 2 * MIN_BYTES_PER_CHAR(enc),
- end,
- KW_ATTLIST)) {
- state->handler = attlist0;
- return XML_ROLE_ATTLIST_NONE;
- }
- if (XmlNameMatchesAscii(enc,
- ptr + 2 * MIN_BYTES_PER_CHAR(enc),
- end,
- KW_ELEMENT)) {
- state->handler = element0;
- return XML_ROLE_ELEMENT_NONE;
- }
- if (XmlNameMatchesAscii(enc,
- ptr + 2 * MIN_BYTES_PER_CHAR(enc),
- end,
- KW_NOTATION)) {
- state->handler = notation0;
- return XML_ROLE_NOTATION_NONE;
- }
- break;
- case XML_TOK_PI:
- return XML_ROLE_PI;
- case XML_TOK_COMMENT:
- return XML_ROLE_COMMENT;
- case XML_TOK_PARAM_ENTITY_REF:
- return XML_ROLE_PARAM_ENTITY_REF;
- case XML_TOK_CLOSE_BRACKET:
- state->handler = doctype5;
- return XML_ROLE_DOCTYPE_NONE;
- case XML_TOK_NONE:
- return XML_ROLE_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NONE;
+ case XML_TOK_DECL_OPEN:
+ if (XmlNameMatchesAscii(enc,
+ ptr + 2 * MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_ENTITY)) {
+ state->handler = entity0;
+ return XML_ROLE_ENTITY_NONE;
+ }
+ if (XmlNameMatchesAscii(enc,
+ ptr + 2 * MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_ATTLIST)) {
+ state->handler = attlist0;
+ return XML_ROLE_ATTLIST_NONE;
+ }
+ if (XmlNameMatchesAscii(enc,
+ ptr + 2 * MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_ELEMENT)) {
+ state->handler = element0;
+ return XML_ROLE_ELEMENT_NONE;
+ }
+ if (XmlNameMatchesAscii(enc,
+ ptr + 2 * MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_NOTATION)) {
+ state->handler = notation0;
+ return XML_ROLE_NOTATION_NONE;
+ }
+ break;
+ case XML_TOK_PI:
+ return XML_ROLE_PI;
+ case XML_TOK_COMMENT:
+ return XML_ROLE_COMMENT;
+ case XML_TOK_PARAM_ENTITY_REF:
+ return XML_ROLE_PARAM_ENTITY_REF;
+ case XML_TOK_CLOSE_BRACKET:
+ state->handler = doctype5;
+ return XML_ROLE_DOCTYPE_NONE;
+ case XML_TOK_NONE:
+ return XML_ROLE_NONE;
+ }
+ return common(state, tok);
}
#ifdef XML_DTD
static int PTRCALL
externalSubset0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- state->handler = externalSubset1;
- if (tok == XML_TOK_XML_DECL)
- return XML_ROLE_TEXT_DECL;
- return externalSubset1(state, tok, ptr, end, enc);
+ state->handler = externalSubset1;
+ if (tok == XML_TOK_XML_DECL)
+ return XML_ROLE_TEXT_DECL;
+ return externalSubset1(state, tok, ptr, end, enc);
}
static int PTRCALL
externalSubset1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_COND_SECT_OPEN:
- state->handler = condSect0;
- return XML_ROLE_NONE;
- case XML_TOK_COND_SECT_CLOSE:
- if (state->includeLevel == 0)
- break;
- state->includeLevel -= 1;
- return XML_ROLE_NONE;
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NONE;
- case XML_TOK_CLOSE_BRACKET:
- break;
- case XML_TOK_NONE:
- if (state->includeLevel)
- break;
- return XML_ROLE_NONE;
- default:
- return internalSubset(state, tok, ptr, end, enc);
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_COND_SECT_OPEN:
+ state->handler = condSect0;
+ return XML_ROLE_NONE;
+ case XML_TOK_COND_SECT_CLOSE:
+ if (state->includeLevel == 0)
+ break;
+ state->includeLevel -= 1;
+ return XML_ROLE_NONE;
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NONE;
+ case XML_TOK_CLOSE_BRACKET:
+ break;
+ case XML_TOK_NONE:
+ if (state->includeLevel)
+ break;
+ return XML_ROLE_NONE;
+ default:
+ return internalSubset(state, tok, ptr, end, enc);
+ }
+ return common(state, tok);
}
#endif /* XML_DTD */
static int PTRCALL
entity0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_PERCENT:
- state->handler = entity1;
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_NAME:
- state->handler = entity2;
- return XML_ROLE_GENERAL_ENTITY_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_PERCENT:
+ state->handler = entity1;
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_NAME:
+ state->handler = entity2;
+ return XML_ROLE_GENERAL_ENTITY_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_NAME:
- state->handler = entity7;
- return XML_ROLE_PARAM_ENTITY_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_NAME:
+ state->handler = entity7;
+ return XML_ROLE_PARAM_ENTITY_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity2(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_NAME:
- if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
- state->handler = entity4;
- return XML_ROLE_ENTITY_NONE;
- }
- if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
- state->handler = entity3;
- return XML_ROLE_ENTITY_NONE;
- }
- break;
- case XML_TOK_LITERAL:
- state->handler = declClose;
- state->role_none = XML_ROLE_ENTITY_NONE;
- return XML_ROLE_ENTITY_VALUE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_NAME:
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
+ state->handler = entity4;
+ return XML_ROLE_ENTITY_NONE;
+ }
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
+ state->handler = entity3;
+ return XML_ROLE_ENTITY_NONE;
+ }
+ break;
+ case XML_TOK_LITERAL:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ENTITY_NONE;
+ return XML_ROLE_ENTITY_VALUE;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity3(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_LITERAL:
- state->handler = entity4;
- return XML_ROLE_ENTITY_PUBLIC_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = entity4;
+ return XML_ROLE_ENTITY_PUBLIC_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity4(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_LITERAL:
- state->handler = entity5;
- return XML_ROLE_ENTITY_SYSTEM_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = entity5;
+ return XML_ROLE_ENTITY_SYSTEM_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity5(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_DECL_CLOSE:
- setTopLevel(state);
- return XML_ROLE_ENTITY_COMPLETE;
- case XML_TOK_NAME:
- if (XmlNameMatchesAscii(enc, ptr, end, KW_NDATA)) {
- state->handler = entity6;
- return XML_ROLE_ENTITY_NONE;
- }
- break;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_DECL_CLOSE:
+ setTopLevel(state);
+ return XML_ROLE_ENTITY_COMPLETE;
+ case XML_TOK_NAME:
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_NDATA)) {
+ state->handler = entity6;
+ return XML_ROLE_ENTITY_NONE;
+ }
+ break;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity6(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_NAME:
- state->handler = declClose;
- state->role_none = XML_ROLE_ENTITY_NONE;
- return XML_ROLE_ENTITY_NOTATION_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_NAME:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ENTITY_NONE;
+ return XML_ROLE_ENTITY_NOTATION_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity7(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_NAME:
- if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
- state->handler = entity9;
- return XML_ROLE_ENTITY_NONE;
- }
- if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
- state->handler = entity8;
- return XML_ROLE_ENTITY_NONE;
- }
- break;
- case XML_TOK_LITERAL:
- state->handler = declClose;
- state->role_none = XML_ROLE_ENTITY_NONE;
- return XML_ROLE_ENTITY_VALUE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_NAME:
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
+ state->handler = entity9;
+ return XML_ROLE_ENTITY_NONE;
+ }
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
+ state->handler = entity8;
+ return XML_ROLE_ENTITY_NONE;
+ }
+ break;
+ case XML_TOK_LITERAL:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ENTITY_NONE;
+ return XML_ROLE_ENTITY_VALUE;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity8(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_LITERAL:
- state->handler = entity9;
- return XML_ROLE_ENTITY_PUBLIC_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = entity9;
+ return XML_ROLE_ENTITY_PUBLIC_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity9(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_LITERAL:
- state->handler = entity10;
- return XML_ROLE_ENTITY_SYSTEM_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = entity10;
+ return XML_ROLE_ENTITY_SYSTEM_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
entity10(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ENTITY_NONE;
- case XML_TOK_DECL_CLOSE:
- setTopLevel(state);
- return XML_ROLE_ENTITY_COMPLETE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ENTITY_NONE;
+ case XML_TOK_DECL_CLOSE:
+ setTopLevel(state);
+ return XML_ROLE_ENTITY_COMPLETE;
+ }
+ return common(state, tok);
}
static int PTRCALL
notation0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NOTATION_NONE;
- case XML_TOK_NAME:
- state->handler = notation1;
- return XML_ROLE_NOTATION_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NOTATION_NONE;
+ case XML_TOK_NAME:
+ state->handler = notation1;
+ return XML_ROLE_NOTATION_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
notation1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NOTATION_NONE;
- case XML_TOK_NAME:
- if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
- state->handler = notation3;
- return XML_ROLE_NOTATION_NONE;
- }
- if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
- state->handler = notation2;
- return XML_ROLE_NOTATION_NONE;
- }
- break;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NOTATION_NONE;
+ case XML_TOK_NAME:
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_SYSTEM)) {
+ state->handler = notation3;
+ return XML_ROLE_NOTATION_NONE;
+ }
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_PUBLIC)) {
+ state->handler = notation2;
+ return XML_ROLE_NOTATION_NONE;
+ }
+ break;
+ }
+ return common(state, tok);
}
static int PTRCALL
notation2(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NOTATION_NONE;
- case XML_TOK_LITERAL:
- state->handler = notation4;
- return XML_ROLE_NOTATION_PUBLIC_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NOTATION_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = notation4;
+ return XML_ROLE_NOTATION_PUBLIC_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
notation3(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NOTATION_NONE;
- case XML_TOK_LITERAL:
- state->handler = declClose;
- state->role_none = XML_ROLE_NOTATION_NONE;
- return XML_ROLE_NOTATION_SYSTEM_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NOTATION_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_NOTATION_NONE;
+ return XML_ROLE_NOTATION_SYSTEM_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
notation4(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NOTATION_NONE;
- case XML_TOK_LITERAL:
- state->handler = declClose;
- state->role_none = XML_ROLE_NOTATION_NONE;
- return XML_ROLE_NOTATION_SYSTEM_ID;
- case XML_TOK_DECL_CLOSE:
- setTopLevel(state);
- return XML_ROLE_NOTATION_NO_SYSTEM_ID;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NOTATION_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_NOTATION_NONE;
+ return XML_ROLE_NOTATION_SYSTEM_ID;
+ case XML_TOK_DECL_CLOSE:
+ setTopLevel(state);
+ return XML_ROLE_NOTATION_NO_SYSTEM_ID;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = attlist1;
- return XML_ROLE_ATTLIST_ELEMENT_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = attlist1;
+ return XML_ROLE_ATTLIST_ELEMENT_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_DECL_CLOSE:
- setTopLevel(state);
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = attlist2;
- return XML_ROLE_ATTRIBUTE_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_DECL_CLOSE:
+ setTopLevel(state);
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = attlist2;
+ return XML_ROLE_ATTRIBUTE_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist2(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_NAME:
- {
- static const char * const types[] = {
- KW_CDATA,
- KW_ID,
- KW_IDREF,
- KW_IDREFS,
- KW_ENTITY,
- KW_ENTITIES,
- KW_NMTOKEN,
- KW_NMTOKENS,
- };
- int i;
- for (i = 0; i < (int)(sizeof(types)/sizeof(types[0])); i++)
- if (XmlNameMatchesAscii(enc, ptr, end, types[i])) {
- state->handler = attlist8;
- return XML_ROLE_ATTRIBUTE_TYPE_CDATA + i;
- }
- }
- if (XmlNameMatchesAscii(enc, ptr, end, KW_NOTATION)) {
- state->handler = attlist5;
- return XML_ROLE_ATTLIST_NONE;
- }
- break;
- case XML_TOK_OPEN_PAREN:
- state->handler = attlist3;
- return XML_ROLE_ATTLIST_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_NAME:
+ {
+ static const char * const types[] = {
+ KW_CDATA,
+ KW_ID,
+ KW_IDREF,
+ KW_IDREFS,
+ KW_ENTITY,
+ KW_ENTITIES,
+ KW_NMTOKEN,
+ KW_NMTOKENS,
+ };
+ int i;
+ for (i = 0; i < (int)(sizeof(types)/sizeof(types[0])); i++)
+ if (XmlNameMatchesAscii(enc, ptr, end, types[i])) {
+ state->handler = attlist8;
+ return XML_ROLE_ATTRIBUTE_TYPE_CDATA + i;
+ }
+ }
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_NOTATION)) {
+ state->handler = attlist5;
+ return XML_ROLE_ATTLIST_NONE;
+ }
+ break;
+ case XML_TOK_OPEN_PAREN:
+ state->handler = attlist3;
+ return XML_ROLE_ATTLIST_NONE;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist3(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_NMTOKEN:
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = attlist4;
- return XML_ROLE_ATTRIBUTE_ENUM_VALUE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_NMTOKEN:
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = attlist4;
+ return XML_ROLE_ATTRIBUTE_ENUM_VALUE;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist4(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_CLOSE_PAREN:
- state->handler = attlist8;
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_OR:
- state->handler = attlist3;
- return XML_ROLE_ATTLIST_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_CLOSE_PAREN:
+ state->handler = attlist8;
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_OR:
+ state->handler = attlist3;
+ return XML_ROLE_ATTLIST_NONE;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist5(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_OPEN_PAREN:
- state->handler = attlist6;
- return XML_ROLE_ATTLIST_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_OPEN_PAREN:
+ state->handler = attlist6;
+ return XML_ROLE_ATTLIST_NONE;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist6(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_NAME:
- state->handler = attlist7;
- return XML_ROLE_ATTRIBUTE_NOTATION_VALUE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_NAME:
+ state->handler = attlist7;
+ return XML_ROLE_ATTRIBUTE_NOTATION_VALUE;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist7(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_CLOSE_PAREN:
- state->handler = attlist8;
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_OR:
- state->handler = attlist6;
- return XML_ROLE_ATTLIST_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_CLOSE_PAREN:
+ state->handler = attlist8;
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_OR:
+ state->handler = attlist6;
+ return XML_ROLE_ATTLIST_NONE;
+ }
+ return common(state, tok);
}
/* default value */
static int PTRCALL
attlist8(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_POUND_NAME:
- if (XmlNameMatchesAscii(enc,
- ptr + MIN_BYTES_PER_CHAR(enc),
- end,
- KW_IMPLIED)) {
- state->handler = attlist1;
- return XML_ROLE_IMPLIED_ATTRIBUTE_VALUE;
- }
- if (XmlNameMatchesAscii(enc,
- ptr + MIN_BYTES_PER_CHAR(enc),
- end,
- KW_REQUIRED)) {
- state->handler = attlist1;
- return XML_ROLE_REQUIRED_ATTRIBUTE_VALUE;
- }
- if (XmlNameMatchesAscii(enc,
- ptr + MIN_BYTES_PER_CHAR(enc),
- end,
- KW_FIXED)) {
- state->handler = attlist9;
- return XML_ROLE_ATTLIST_NONE;
- }
- break;
- case XML_TOK_LITERAL:
- state->handler = attlist1;
- return XML_ROLE_DEFAULT_ATTRIBUTE_VALUE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_POUND_NAME:
+ if (XmlNameMatchesAscii(enc,
+ ptr + MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_IMPLIED)) {
+ state->handler = attlist1;
+ return XML_ROLE_IMPLIED_ATTRIBUTE_VALUE;
+ }
+ if (XmlNameMatchesAscii(enc,
+ ptr + MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_REQUIRED)) {
+ state->handler = attlist1;
+ return XML_ROLE_REQUIRED_ATTRIBUTE_VALUE;
+ }
+ if (XmlNameMatchesAscii(enc,
+ ptr + MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_FIXED)) {
+ state->handler = attlist9;
+ return XML_ROLE_ATTLIST_NONE;
+ }
+ break;
+ case XML_TOK_LITERAL:
+ state->handler = attlist1;
+ return XML_ROLE_DEFAULT_ATTRIBUTE_VALUE;
+ }
+ return common(state, tok);
}
static int PTRCALL
attlist9(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ATTLIST_NONE;
- case XML_TOK_LITERAL:
- state->handler = attlist1;
- return XML_ROLE_FIXED_ATTRIBUTE_VALUE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ATTLIST_NONE;
+ case XML_TOK_LITERAL:
+ state->handler = attlist1;
+ return XML_ROLE_FIXED_ATTRIBUTE_VALUE;
+ }
+ return common(state, tok);
}
static int PTRCALL
element0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = element1;
- return XML_ROLE_ELEMENT_NAME;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = element1;
+ return XML_ROLE_ELEMENT_NAME;
+ }
+ return common(state, tok);
}
static int PTRCALL
element1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_NAME:
- if (XmlNameMatchesAscii(enc, ptr, end, KW_EMPTY)) {
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- return XML_ROLE_CONTENT_EMPTY;
- }
- if (XmlNameMatchesAscii(enc, ptr, end, KW_ANY)) {
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- return XML_ROLE_CONTENT_ANY;
- }
- break;
- case XML_TOK_OPEN_PAREN:
- state->handler = element2;
- state->level = 1;
- return XML_ROLE_GROUP_OPEN;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_NAME:
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_EMPTY)) {
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ return XML_ROLE_CONTENT_EMPTY;
+ }
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_ANY)) {
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ return XML_ROLE_CONTENT_ANY;
+ }
+ break;
+ case XML_TOK_OPEN_PAREN:
+ state->handler = element2;
+ state->level = 1;
+ return XML_ROLE_GROUP_OPEN;
+ }
+ return common(state, tok);
}
static int PTRCALL
element2(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_POUND_NAME:
- if (XmlNameMatchesAscii(enc,
- ptr + MIN_BYTES_PER_CHAR(enc),
- end,
- KW_PCDATA)) {
- state->handler = element3;
- return XML_ROLE_CONTENT_PCDATA;
- }
- break;
- case XML_TOK_OPEN_PAREN:
- state->level = 2;
- state->handler = element6;
- return XML_ROLE_GROUP_OPEN;
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT;
- case XML_TOK_NAME_QUESTION:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT_OPT;
- case XML_TOK_NAME_ASTERISK:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT_REP;
- case XML_TOK_NAME_PLUS:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT_PLUS;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_POUND_NAME:
+ if (XmlNameMatchesAscii(enc,
+ ptr + MIN_BYTES_PER_CHAR(enc),
+ end,
+ KW_PCDATA)) {
+ state->handler = element3;
+ return XML_ROLE_CONTENT_PCDATA;
+ }
+ break;
+ case XML_TOK_OPEN_PAREN:
+ state->level = 2;
+ state->handler = element6;
+ return XML_ROLE_GROUP_OPEN;
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT;
+ case XML_TOK_NAME_QUESTION:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT_OPT;
+ case XML_TOK_NAME_ASTERISK:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT_REP;
+ case XML_TOK_NAME_PLUS:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT_PLUS;
+ }
+ return common(state, tok);
}
static int PTRCALL
element3(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_CLOSE_PAREN:
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- return XML_ROLE_GROUP_CLOSE;
- case XML_TOK_CLOSE_PAREN_ASTERISK:
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- return XML_ROLE_GROUP_CLOSE_REP;
- case XML_TOK_OR:
- state->handler = element4;
- return XML_ROLE_ELEMENT_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_CLOSE_PAREN:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ return XML_ROLE_GROUP_CLOSE;
+ case XML_TOK_CLOSE_PAREN_ASTERISK:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ return XML_ROLE_GROUP_CLOSE_REP;
+ case XML_TOK_OR:
+ state->handler = element4;
+ return XML_ROLE_ELEMENT_NONE;
+ }
+ return common(state, tok);
}
static int PTRCALL
element4(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = element5;
- return XML_ROLE_CONTENT_ELEMENT;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = element5;
+ return XML_ROLE_CONTENT_ELEMENT;
+ }
+ return common(state, tok);
}
static int PTRCALL
element5(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_CLOSE_PAREN_ASTERISK:
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- return XML_ROLE_GROUP_CLOSE_REP;
- case XML_TOK_OR:
- state->handler = element4;
- return XML_ROLE_ELEMENT_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_CLOSE_PAREN_ASTERISK:
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ return XML_ROLE_GROUP_CLOSE_REP;
+ case XML_TOK_OR:
+ state->handler = element4;
+ return XML_ROLE_ELEMENT_NONE;
+ }
+ return common(state, tok);
}
static int PTRCALL
element6(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_OPEN_PAREN:
- state->level += 1;
- return XML_ROLE_GROUP_OPEN;
- case XML_TOK_NAME:
- case XML_TOK_PREFIXED_NAME:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT;
- case XML_TOK_NAME_QUESTION:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT_OPT;
- case XML_TOK_NAME_ASTERISK:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT_REP;
- case XML_TOK_NAME_PLUS:
- state->handler = element7;
- return XML_ROLE_CONTENT_ELEMENT_PLUS;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_OPEN_PAREN:
+ state->level += 1;
+ return XML_ROLE_GROUP_OPEN;
+ case XML_TOK_NAME:
+ case XML_TOK_PREFIXED_NAME:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT;
+ case XML_TOK_NAME_QUESTION:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT_OPT;
+ case XML_TOK_NAME_ASTERISK:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT_REP;
+ case XML_TOK_NAME_PLUS:
+ state->handler = element7;
+ return XML_ROLE_CONTENT_ELEMENT_PLUS;
+ }
+ return common(state, tok);
}
static int PTRCALL
element7(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_ELEMENT_NONE;
- case XML_TOK_CLOSE_PAREN:
- state->level -= 1;
- if (state->level == 0) {
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- }
- return XML_ROLE_GROUP_CLOSE;
- case XML_TOK_CLOSE_PAREN_ASTERISK:
- state->level -= 1;
- if (state->level == 0) {
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- }
- return XML_ROLE_GROUP_CLOSE_REP;
- case XML_TOK_CLOSE_PAREN_QUESTION:
- state->level -= 1;
- if (state->level == 0) {
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- }
- return XML_ROLE_GROUP_CLOSE_OPT;
- case XML_TOK_CLOSE_PAREN_PLUS:
- state->level -= 1;
- if (state->level == 0) {
- state->handler = declClose;
- state->role_none = XML_ROLE_ELEMENT_NONE;
- }
- return XML_ROLE_GROUP_CLOSE_PLUS;
- case XML_TOK_COMMA:
- state->handler = element6;
- return XML_ROLE_GROUP_SEQUENCE;
- case XML_TOK_OR:
- state->handler = element6;
- return XML_ROLE_GROUP_CHOICE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_ELEMENT_NONE;
+ case XML_TOK_CLOSE_PAREN:
+ state->level -= 1;
+ if (state->level == 0) {
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ }
+ return XML_ROLE_GROUP_CLOSE;
+ case XML_TOK_CLOSE_PAREN_ASTERISK:
+ state->level -= 1;
+ if (state->level == 0) {
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ }
+ return XML_ROLE_GROUP_CLOSE_REP;
+ case XML_TOK_CLOSE_PAREN_QUESTION:
+ state->level -= 1;
+ if (state->level == 0) {
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ }
+ return XML_ROLE_GROUP_CLOSE_OPT;
+ case XML_TOK_CLOSE_PAREN_PLUS:
+ state->level -= 1;
+ if (state->level == 0) {
+ state->handler = declClose;
+ state->role_none = XML_ROLE_ELEMENT_NONE;
+ }
+ return XML_ROLE_GROUP_CLOSE_PLUS;
+ case XML_TOK_COMMA:
+ state->handler = element6;
+ return XML_ROLE_GROUP_SEQUENCE;
+ case XML_TOK_OR:
+ state->handler = element6;
+ return XML_ROLE_GROUP_CHOICE;
+ }
+ return common(state, tok);
}
#ifdef XML_DTD
static int PTRCALL
condSect0(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NONE;
- case XML_TOK_NAME:
- if (XmlNameMatchesAscii(enc, ptr, end, KW_INCLUDE)) {
- state->handler = condSect1;
- return XML_ROLE_NONE;
- }
- if (XmlNameMatchesAscii(enc, ptr, end, KW_IGNORE)) {
- state->handler = condSect2;
- return XML_ROLE_NONE;
- }
- break;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NONE;
+ case XML_TOK_NAME:
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_INCLUDE)) {
+ state->handler = condSect1;
+ return XML_ROLE_NONE;
+ }
+ if (XmlNameMatchesAscii(enc, ptr, end, KW_IGNORE)) {
+ state->handler = condSect2;
+ return XML_ROLE_NONE;
+ }
+ break;
+ }
+ return common(state, tok);
}
static int PTRCALL
condSect1(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NONE;
- case XML_TOK_OPEN_BRACKET:
- state->handler = externalSubset1;
- state->includeLevel += 1;
- return XML_ROLE_NONE;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NONE;
+ case XML_TOK_OPEN_BRACKET:
+ state->handler = externalSubset1;
+ state->includeLevel += 1;
+ return XML_ROLE_NONE;
+ }
+ return common(state, tok);
}
static int PTRCALL
condSect2(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return XML_ROLE_NONE;
- case XML_TOK_OPEN_BRACKET:
- state->handler = externalSubset1;
- return XML_ROLE_IGNORE_SECT;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return XML_ROLE_NONE;
+ case XML_TOK_OPEN_BRACKET:
+ state->handler = externalSubset1;
+ return XML_ROLE_IGNORE_SECT;
+ }
+ return common(state, tok);
}
#endif /* XML_DTD */
static int PTRCALL
declClose(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- switch (tok) {
- case XML_TOK_PROLOG_S:
- return state->role_none;
- case XML_TOK_DECL_CLOSE:
- setTopLevel(state);
- return state->role_none;
- }
- return common(state, tok);
+ switch (tok) {
+ case XML_TOK_PROLOG_S:
+ return state->role_none;
+ case XML_TOK_DECL_CLOSE:
+ setTopLevel(state);
+ return state->role_none;
+ }
+ return common(state, tok);
}
static int PTRCALL
error(PROLOG_STATE *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc)
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc)
{
- return XML_ROLE_NONE;
+ return XML_ROLE_NONE;
}
static int FASTCALL
common(PROLOG_STATE *state, int tok)
{
#ifdef XML_DTD
- if (!state->documentEntity && tok == XML_TOK_PARAM_ENTITY_REF)
- return XML_ROLE_INNER_PARAM_ENTITY_REF;
+ if (!state->documentEntity && tok == XML_TOK_PARAM_ENTITY_REF)
+ return XML_ROLE_INNER_PARAM_ENTITY_REF;
#endif
- state->handler = error;
- return XML_ROLE_ERROR;
+ state->handler = error;
+ return XML_ROLE_ERROR;
}
void
XmlPrologStateInit(PROLOG_STATE *state)
{
- state->handler = prolog0;
+ state->handler = prolog0;
#ifdef XML_DTD
- state->documentEntity = 1;
- state->includeLevel = 0;
- state->inEntityValue = 0;
+ state->documentEntity = 1;
+ state->includeLevel = 0;
+ state->inEntityValue = 0;
#endif /* XML_DTD */
}
@@ -1316,9 +1316,9 @@ XmlPrologStateInit(PROLOG_STATE *state)
void
XmlPrologStateInitExternalEntity(PROLOG_STATE *state)
{
- state->handler = externalSubset0;
- state->documentEntity = 0;
- state->includeLevel = 0;
+ state->handler = externalSubset0;
+ state->documentEntity = 0;
+ state->includeLevel = 0;
}
#endif /* XML_DTD */
diff --git a/src/lib/expat/xmlrole.h b/src/lib/expat/xmlrole.h
index 4dd9f06f976..0966364f52e 100644
--- a/src/lib/expat/xmlrole.h
+++ b/src/lib/expat/xmlrole.h
@@ -18,84 +18,84 @@ extern "C" {
#endif
enum {
- XML_ROLE_ERROR = -1,
- XML_ROLE_NONE = 0,
- XML_ROLE_XML_DECL,
- XML_ROLE_INSTANCE_START,
- XML_ROLE_DOCTYPE_NONE,
- XML_ROLE_DOCTYPE_NAME,
- XML_ROLE_DOCTYPE_SYSTEM_ID,
- XML_ROLE_DOCTYPE_PUBLIC_ID,
- XML_ROLE_DOCTYPE_INTERNAL_SUBSET,
- XML_ROLE_DOCTYPE_CLOSE,
- XML_ROLE_GENERAL_ENTITY_NAME,
- XML_ROLE_PARAM_ENTITY_NAME,
- XML_ROLE_ENTITY_NONE,
- XML_ROLE_ENTITY_VALUE,
- XML_ROLE_ENTITY_SYSTEM_ID,
- XML_ROLE_ENTITY_PUBLIC_ID,
- XML_ROLE_ENTITY_COMPLETE,
- XML_ROLE_ENTITY_NOTATION_NAME,
- XML_ROLE_NOTATION_NONE,
- XML_ROLE_NOTATION_NAME,
- XML_ROLE_NOTATION_SYSTEM_ID,
- XML_ROLE_NOTATION_NO_SYSTEM_ID,
- XML_ROLE_NOTATION_PUBLIC_ID,
- XML_ROLE_ATTRIBUTE_NAME,
- XML_ROLE_ATTRIBUTE_TYPE_CDATA,
- XML_ROLE_ATTRIBUTE_TYPE_ID,
- XML_ROLE_ATTRIBUTE_TYPE_IDREF,
- XML_ROLE_ATTRIBUTE_TYPE_IDREFS,
- XML_ROLE_ATTRIBUTE_TYPE_ENTITY,
- XML_ROLE_ATTRIBUTE_TYPE_ENTITIES,
- XML_ROLE_ATTRIBUTE_TYPE_NMTOKEN,
- XML_ROLE_ATTRIBUTE_TYPE_NMTOKENS,
- XML_ROLE_ATTRIBUTE_ENUM_VALUE,
- XML_ROLE_ATTRIBUTE_NOTATION_VALUE,
- XML_ROLE_ATTLIST_NONE,
- XML_ROLE_ATTLIST_ELEMENT_NAME,
- XML_ROLE_IMPLIED_ATTRIBUTE_VALUE,
- XML_ROLE_REQUIRED_ATTRIBUTE_VALUE,
- XML_ROLE_DEFAULT_ATTRIBUTE_VALUE,
- XML_ROLE_FIXED_ATTRIBUTE_VALUE,
- XML_ROLE_ELEMENT_NONE,
- XML_ROLE_ELEMENT_NAME,
- XML_ROLE_CONTENT_ANY,
- XML_ROLE_CONTENT_EMPTY,
- XML_ROLE_CONTENT_PCDATA,
- XML_ROLE_GROUP_OPEN,
- XML_ROLE_GROUP_CLOSE,
- XML_ROLE_GROUP_CLOSE_REP,
- XML_ROLE_GROUP_CLOSE_OPT,
- XML_ROLE_GROUP_CLOSE_PLUS,
- XML_ROLE_GROUP_CHOICE,
- XML_ROLE_GROUP_SEQUENCE,
- XML_ROLE_CONTENT_ELEMENT,
- XML_ROLE_CONTENT_ELEMENT_REP,
- XML_ROLE_CONTENT_ELEMENT_OPT,
- XML_ROLE_CONTENT_ELEMENT_PLUS,
- XML_ROLE_PI,
- XML_ROLE_COMMENT,
+ XML_ROLE_ERROR = -1,
+ XML_ROLE_NONE = 0,
+ XML_ROLE_XML_DECL,
+ XML_ROLE_INSTANCE_START,
+ XML_ROLE_DOCTYPE_NONE,
+ XML_ROLE_DOCTYPE_NAME,
+ XML_ROLE_DOCTYPE_SYSTEM_ID,
+ XML_ROLE_DOCTYPE_PUBLIC_ID,
+ XML_ROLE_DOCTYPE_INTERNAL_SUBSET,
+ XML_ROLE_DOCTYPE_CLOSE,
+ XML_ROLE_GENERAL_ENTITY_NAME,
+ XML_ROLE_PARAM_ENTITY_NAME,
+ XML_ROLE_ENTITY_NONE,
+ XML_ROLE_ENTITY_VALUE,
+ XML_ROLE_ENTITY_SYSTEM_ID,
+ XML_ROLE_ENTITY_PUBLIC_ID,
+ XML_ROLE_ENTITY_COMPLETE,
+ XML_ROLE_ENTITY_NOTATION_NAME,
+ XML_ROLE_NOTATION_NONE,
+ XML_ROLE_NOTATION_NAME,
+ XML_ROLE_NOTATION_SYSTEM_ID,
+ XML_ROLE_NOTATION_NO_SYSTEM_ID,
+ XML_ROLE_NOTATION_PUBLIC_ID,
+ XML_ROLE_ATTRIBUTE_NAME,
+ XML_ROLE_ATTRIBUTE_TYPE_CDATA,
+ XML_ROLE_ATTRIBUTE_TYPE_ID,
+ XML_ROLE_ATTRIBUTE_TYPE_IDREF,
+ XML_ROLE_ATTRIBUTE_TYPE_IDREFS,
+ XML_ROLE_ATTRIBUTE_TYPE_ENTITY,
+ XML_ROLE_ATTRIBUTE_TYPE_ENTITIES,
+ XML_ROLE_ATTRIBUTE_TYPE_NMTOKEN,
+ XML_ROLE_ATTRIBUTE_TYPE_NMTOKENS,
+ XML_ROLE_ATTRIBUTE_ENUM_VALUE,
+ XML_ROLE_ATTRIBUTE_NOTATION_VALUE,
+ XML_ROLE_ATTLIST_NONE,
+ XML_ROLE_ATTLIST_ELEMENT_NAME,
+ XML_ROLE_IMPLIED_ATTRIBUTE_VALUE,
+ XML_ROLE_REQUIRED_ATTRIBUTE_VALUE,
+ XML_ROLE_DEFAULT_ATTRIBUTE_VALUE,
+ XML_ROLE_FIXED_ATTRIBUTE_VALUE,
+ XML_ROLE_ELEMENT_NONE,
+ XML_ROLE_ELEMENT_NAME,
+ XML_ROLE_CONTENT_ANY,
+ XML_ROLE_CONTENT_EMPTY,
+ XML_ROLE_CONTENT_PCDATA,
+ XML_ROLE_GROUP_OPEN,
+ XML_ROLE_GROUP_CLOSE,
+ XML_ROLE_GROUP_CLOSE_REP,
+ XML_ROLE_GROUP_CLOSE_OPT,
+ XML_ROLE_GROUP_CLOSE_PLUS,
+ XML_ROLE_GROUP_CHOICE,
+ XML_ROLE_GROUP_SEQUENCE,
+ XML_ROLE_CONTENT_ELEMENT,
+ XML_ROLE_CONTENT_ELEMENT_REP,
+ XML_ROLE_CONTENT_ELEMENT_OPT,
+ XML_ROLE_CONTENT_ELEMENT_PLUS,
+ XML_ROLE_PI,
+ XML_ROLE_COMMENT,
#ifdef XML_DTD
- XML_ROLE_TEXT_DECL,
- XML_ROLE_IGNORE_SECT,
- XML_ROLE_INNER_PARAM_ENTITY_REF,
+ XML_ROLE_TEXT_DECL,
+ XML_ROLE_IGNORE_SECT,
+ XML_ROLE_INNER_PARAM_ENTITY_REF,
#endif /* XML_DTD */
- XML_ROLE_PARAM_ENTITY_REF
+ XML_ROLE_PARAM_ENTITY_REF
};
typedef struct prolog_state {
- int (PTRCALL *handler) (struct prolog_state *state,
- int tok,
- const char *ptr,
- const char *end,
- const ENCODING *enc);
- unsigned level;
- int role_none;
+ int (PTRCALL *handler) (struct prolog_state *state,
+ int tok,
+ const char *ptr,
+ const char *end,
+ const ENCODING *enc);
+ unsigned level;
+ int role_none;
#ifdef XML_DTD
- unsigned includeLevel;
- int documentEntity;
- int inEntityValue;
+ unsigned includeLevel;
+ int documentEntity;
+ int inEntityValue;
#endif /* XML_DTD */
} PROLOG_STATE;
@@ -105,7 +105,7 @@ void XmlPrologStateInitExternalEntity(PROLOG_STATE *);
#endif /* XML_DTD */
#define XmlTokenRole(state, tok, ptr, end, enc) \
- (((state)->handler)(state, tok, ptr, end, enc))
+ (((state)->handler)(state, tok, ptr, end, enc))
#ifdef __cplusplus
}
diff --git a/src/lib/expat/xmltok.c b/src/lib/expat/xmltok.c
index dcc6fde724c..3c3fb697607 100644
--- a/src/lib/expat/xmltok.c
+++ b/src/lib/expat/xmltok.c
@@ -18,33 +18,33 @@
#endif
#define VTABLE1 \
- { PREFIX(prologTok), PREFIX(contentTok), \
- PREFIX(cdataSectionTok) IGNORE_SECTION_TOK_VTABLE }, \
- { PREFIX(attributeValueTok), PREFIX(entityValueTok) }, \
- PREFIX(sameName), \
- PREFIX(nameMatchesAscii), \
- PREFIX(nameLength), \
- PREFIX(skipS), \
- PREFIX(getAtts), \
- PREFIX(charRefNumber), \
- PREFIX(predefinedEntityName), \
- PREFIX(updatePosition), \
- PREFIX(isPublicId)
+ { PREFIX(prologTok), PREFIX(contentTok), \
+ PREFIX(cdataSectionTok) IGNORE_SECTION_TOK_VTABLE }, \
+ { PREFIX(attributeValueTok), PREFIX(entityValueTok) }, \
+ PREFIX(sameName), \
+ PREFIX(nameMatchesAscii), \
+ PREFIX(nameLength), \
+ PREFIX(skipS), \
+ PREFIX(getAtts), \
+ PREFIX(charRefNumber), \
+ PREFIX(predefinedEntityName), \
+ PREFIX(updatePosition), \
+ PREFIX(isPublicId)
#define VTABLE VTABLE1, PREFIX(toUtf8), PREFIX(toUtf16)
#define UCS2_GET_NAMING(pages, hi, lo) \
- (namingBitmap[(pages[hi] << 3) + ((lo) >> 5)] & (1 << ((lo) & 0x1F)))
+ (namingBitmap[(pages[hi] << 3) + ((lo) >> 5)] & (1 << ((lo) & 0x1F)))
/* A 2 byte UTF-8 representation splits the characters 11 bits between
the bottom 5 and 6 bits of the bytes. We need 8 bits to index into
pages, 3 bits to add to that index and 5 bits to generate the mask.
*/
#define UTF8_GET_NAMING2(pages, byte) \
- (namingBitmap[((pages)[(((byte)[0]) >> 2) & 7] << 3) \
- + ((((byte)[0]) & 3) << 1) \
- + ((((byte)[1]) >> 5) & 1)] \
- & (1 << (((byte)[1]) & 0x1F)))
+ (namingBitmap[((pages)[(((byte)[0]) >> 2) & 7] << 3) \
+ + ((((byte)[0]) & 3) << 1) \
+ + ((((byte)[1]) >> 5) & 1)] \
+ & (1 << (((byte)[1]) & 0x1F)))
/* A 3 byte UTF-8 representation splits the characters 16 bits between
the bottom 4, 6 and 6 bits of the bytes. We need 8 bits to index
@@ -52,19 +52,19 @@
mask.
*/
#define UTF8_GET_NAMING3(pages, byte) \
- (namingBitmap[((pages)[((((byte)[0]) & 0xF) << 4) \
- + ((((byte)[1]) >> 2) & 0xF)] \
- << 3) \
- + ((((byte)[1]) & 3) << 1) \
- + ((((byte)[2]) >> 5) & 1)] \
- & (1 << (((byte)[2]) & 0x1F)))
+ (namingBitmap[((pages)[((((byte)[0]) & 0xF) << 4) \
+ + ((((byte)[1]) >> 2) & 0xF)] \
+ << 3) \
+ + ((((byte)[1]) & 3) << 1) \
+ + ((((byte)[2]) >> 5) & 1)] \
+ & (1 << (((byte)[2]) & 0x1F)))
#define UTF8_GET_NAMING(pages, p, n) \
- ((n) == 2 \
- ? UTF8_GET_NAMING2(pages, (const unsigned char *)(p)) \
- : ((n) == 3 \
- ? UTF8_GET_NAMING3(pages, (const unsigned char *)(p)) \
- : 0))
+ ((n) == 2 \
+ ? UTF8_GET_NAMING2(pages, (const unsigned char *)(p)) \
+ : ((n) == 3 \
+ ? UTF8_GET_NAMING3(pages, (const unsigned char *)(p)) \
+ : 0))
/* Detection of invalid UTF-8 sequences is based on Table 3.1B
of Unicode 3.2: http://www.unicode.org/unicode/reports/tr28/
@@ -77,54 +77,54 @@
*/
#define UTF8_INVALID2(p) \
- ((*p) < 0xC2 || ((p)[1] & 0x80) == 0 || ((p)[1] & 0xC0) == 0xC0)
+ ((*p) < 0xC2 || ((p)[1] & 0x80) == 0 || ((p)[1] & 0xC0) == 0xC0)
#define UTF8_INVALID3(p) \
- (((p)[2] & 0x80) == 0 \
- || \
- ((*p) == 0xEF && (p)[1] == 0xBF \
- ? \
- (p)[2] > 0xBD \
- : \
- ((p)[2] & 0xC0) == 0xC0) \
- || \
- ((*p) == 0xE0 \
- ? \
- (p)[1] < 0xA0 || ((p)[1] & 0xC0) == 0xC0 \
- : \
- ((p)[1] & 0x80) == 0 \
- || \
- ((*p) == 0xED ? (p)[1] > 0x9F : ((p)[1] & 0xC0) == 0xC0)))
+ (((p)[2] & 0x80) == 0 \
+ || \
+ ((*p) == 0xEF && (p)[1] == 0xBF \
+ ? \
+ (p)[2] > 0xBD \
+ : \
+ ((p)[2] & 0xC0) == 0xC0) \
+ || \
+ ((*p) == 0xE0 \
+ ? \
+ (p)[1] < 0xA0 || ((p)[1] & 0xC0) == 0xC0 \
+ : \
+ ((p)[1] & 0x80) == 0 \
+ || \
+ ((*p) == 0xED ? (p)[1] > 0x9F : ((p)[1] & 0xC0) == 0xC0)))
#define UTF8_INVALID4(p) \
- (((p)[3] & 0x80) == 0 || ((p)[3] & 0xC0) == 0xC0 \
- || \
- ((p)[2] & 0x80) == 0 || ((p)[2] & 0xC0) == 0xC0 \
- || \
- ((*p) == 0xF0 \
- ? \
- (p)[1] < 0x90 || ((p)[1] & 0xC0) == 0xC0 \
- : \
- ((p)[1] & 0x80) == 0 \
- || \
- ((*p) == 0xF4 ? (p)[1] > 0x8F : ((p)[1] & 0xC0) == 0xC0)))
+ (((p)[3] & 0x80) == 0 || ((p)[3] & 0xC0) == 0xC0 \
+ || \
+ ((p)[2] & 0x80) == 0 || ((p)[2] & 0xC0) == 0xC0 \
+ || \
+ ((*p) == 0xF0 \
+ ? \
+ (p)[1] < 0x90 || ((p)[1] & 0xC0) == 0xC0 \
+ : \
+ ((p)[1] & 0x80) == 0 \
+ || \
+ ((*p) == 0xF4 ? (p)[1] > 0x8F : ((p)[1] & 0xC0) == 0xC0)))
static int PTRFASTCALL
isNever(const ENCODING *enc, const char *p)
{
- return 0;
+ return 0;
}
static int PTRFASTCALL
utf8_isName2(const ENCODING *enc, const char *p)
{
- return UTF8_GET_NAMING2(namePages, (const unsigned char *)p);
+ return UTF8_GET_NAMING2(namePages, (const unsigned char *)p);
}
static int PTRFASTCALL
utf8_isName3(const ENCODING *enc, const char *p)
{
- return UTF8_GET_NAMING3(namePages, (const unsigned char *)p);
+ return UTF8_GET_NAMING3(namePages, (const unsigned char *)p);
}
#define utf8_isName4 isNever
@@ -132,13 +132,13 @@ utf8_isName3(const ENCODING *enc, const char *p)
static int PTRFASTCALL
utf8_isNmstrt2(const ENCODING *enc, const char *p)
{
- return UTF8_GET_NAMING2(nmstrtPages, (const unsigned char *)p);
+ return UTF8_GET_NAMING2(nmstrtPages, (const unsigned char *)p);
}
static int PTRFASTCALL
utf8_isNmstrt3(const ENCODING *enc, const char *p)
{
- return UTF8_GET_NAMING3(nmstrtPages, (const unsigned char *)p);
+ return UTF8_GET_NAMING3(nmstrtPages, (const unsigned char *)p);
}
#define utf8_isNmstrt4 isNever
@@ -146,40 +146,40 @@ utf8_isNmstrt3(const ENCODING *enc, const char *p)
static int PTRFASTCALL
utf8_isInvalid2(const ENCODING *enc, const char *p)
{
- return UTF8_INVALID2((const unsigned char *)p);
+ return UTF8_INVALID2((const unsigned char *)p);
}
static int PTRFASTCALL
utf8_isInvalid3(const ENCODING *enc, const char *p)
{
- return UTF8_INVALID3((const unsigned char *)p);
+ return UTF8_INVALID3((const unsigned char *)p);
}
static int PTRFASTCALL
utf8_isInvalid4(const ENCODING *enc, const char *p)
{
- return UTF8_INVALID4((const unsigned char *)p);
+ return UTF8_INVALID4((const unsigned char *)p);
}
struct normal_encoding {
- ENCODING enc;
- unsigned char type[256];
+ ENCODING enc;
+ unsigned char type[256];
#ifdef XML_MIN_SIZE
- int (PTRFASTCALL *byteType)(const ENCODING *, const char *);
- int (PTRFASTCALL *isNameMin)(const ENCODING *, const char *);
- int (PTRFASTCALL *isNmstrtMin)(const ENCODING *, const char *);
- int (PTRFASTCALL *byteToAscii)(const ENCODING *, const char *);
- int (PTRCALL *charMatches)(const ENCODING *, const char *, int);
+ int (PTRFASTCALL *byteType)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isNameMin)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isNmstrtMin)(const ENCODING *, const char *);
+ int (PTRFASTCALL *byteToAscii)(const ENCODING *, const char *);
+ int (PTRCALL *charMatches)(const ENCODING *, const char *, int);
#endif /* XML_MIN_SIZE */
- int (PTRFASTCALL *isName2)(const ENCODING *, const char *);
- int (PTRFASTCALL *isName3)(const ENCODING *, const char *);
- int (PTRFASTCALL *isName4)(const ENCODING *, const char *);
- int (PTRFASTCALL *isNmstrt2)(const ENCODING *, const char *);
- int (PTRFASTCALL *isNmstrt3)(const ENCODING *, const char *);
- int (PTRFASTCALL *isNmstrt4)(const ENCODING *, const char *);
- int (PTRFASTCALL *isInvalid2)(const ENCODING *, const char *);
- int (PTRFASTCALL *isInvalid3)(const ENCODING *, const char *);
- int (PTRFASTCALL *isInvalid4)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isName2)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isName3)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isName4)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isNmstrt2)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isNmstrt3)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isNmstrt4)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isInvalid2)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isInvalid3)(const ENCODING *, const char *);
+ int (PTRFASTCALL *isInvalid4)(const ENCODING *, const char *);
};
#define AS_NORMAL_ENCODING(enc) ((const struct normal_encoding *) (enc))
@@ -187,11 +187,11 @@ struct normal_encoding {
#ifdef XML_MIN_SIZE
#define STANDARD_VTABLE(E) \
- E ## byteType, \
- E ## isNameMin, \
- E ## isNmstrtMin, \
- E ## byteToAscii, \
- E ## charMatches,
+ E ## byteType, \
+ E ## isNameMin, \
+ E ## isNmstrtMin, \
+ E ## byteToAscii, \
+ E ## charMatches,
#else
@@ -200,15 +200,15 @@ struct normal_encoding {
#endif
#define NORMAL_VTABLE(E) \
- E ## isName2, \
- E ## isName3, \
- E ## isName4, \
- E ## isNmstrt2, \
- E ## isNmstrt3, \
- E ## isNmstrt4, \
- E ## isInvalid2, \
- E ## isInvalid3, \
- E ## isInvalid4
+ E ## isName2, \
+ E ## isName3, \
+ E ## isName4, \
+ E ## isNmstrt2, \
+ E ## isNmstrt3, \
+ E ## isNmstrt4, \
+ E ## isInvalid2, \
+ E ## isInvalid3, \
+ E ## isInvalid4
static int FASTCALL checkCharRefNumber(int);
@@ -228,44 +228,44 @@ static int FASTCALL checkCharRefNumber(int);
#endif
#define SB_BYTE_TYPE(enc, p) \
- (((struct normal_encoding *)(enc))->type[(unsigned char)*(p)])
+ (((struct normal_encoding *)(enc))->type[(unsigned char)*(p)])
#ifdef XML_MIN_SIZE
static int PTRFASTCALL
sb_byteType(const ENCODING *enc, const char *p)
{
- return SB_BYTE_TYPE(enc, p);
+ return SB_BYTE_TYPE(enc, p);
}
#define BYTE_TYPE(enc, p) \
- (AS_NORMAL_ENCODING(enc)->byteType(enc, p))
+ (AS_NORMAL_ENCODING(enc)->byteType(enc, p))
#else
#define BYTE_TYPE(enc, p) SB_BYTE_TYPE(enc, p)
#endif
#ifdef XML_MIN_SIZE
#define BYTE_TO_ASCII(enc, p) \
- (AS_NORMAL_ENCODING(enc)->byteToAscii(enc, p))
+ (AS_NORMAL_ENCODING(enc)->byteToAscii(enc, p))
static int PTRFASTCALL
sb_byteToAscii(const ENCODING *enc, const char *p)
{
- return *p;
+ return *p;
}
#else
#define BYTE_TO_ASCII(enc, p) (*(p))
#endif
#define IS_NAME_CHAR(enc, p, n) \
- (AS_NORMAL_ENCODING(enc)->isName ## n(enc, p))
+ (AS_NORMAL_ENCODING(enc)->isName ## n(enc, p))
#define IS_NMSTRT_CHAR(enc, p, n) \
- (AS_NORMAL_ENCODING(enc)->isNmstrt ## n(enc, p))
+ (AS_NORMAL_ENCODING(enc)->isNmstrt ## n(enc, p))
#define IS_INVALID_CHAR(enc, p, n) \
- (AS_NORMAL_ENCODING(enc)->isInvalid ## n(enc, p))
+ (AS_NORMAL_ENCODING(enc)->isInvalid ## n(enc, p))
#ifdef XML_MIN_SIZE
#define IS_NAME_CHAR_MINBPC(enc, p) \
- (AS_NORMAL_ENCODING(enc)->isNameMin(enc, p))
+ (AS_NORMAL_ENCODING(enc)->isNameMin(enc, p))
#define IS_NMSTRT_CHAR_MINBPC(enc, p) \
- (AS_NORMAL_ENCODING(enc)->isNmstrtMin(enc, p))
+ (AS_NORMAL_ENCODING(enc)->isNmstrtMin(enc, p))
#else
#define IS_NAME_CHAR_MINBPC(enc, p) (0)
#define IS_NMSTRT_CHAR_MINBPC(enc, p) (0)
@@ -273,11 +273,11 @@ sb_byteToAscii(const ENCODING *enc, const char *p)
#ifdef XML_MIN_SIZE
#define CHAR_MATCHES(enc, p, c) \
- (AS_NORMAL_ENCODING(enc)->charMatches(enc, p, c))
+ (AS_NORMAL_ENCODING(enc)->charMatches(enc, p, c))
static int PTRCALL
sb_charMatches(const ENCODING *enc, const char *p, int c)
{
- return *p == c;
+ return *p == c;
}
#else
/* c is an ASCII character */
@@ -300,308 +300,308 @@ sb_charMatches(const ENCODING *enc, const char *p, int c)
#undef IS_INVALID_CHAR
enum { /* UTF8_cvalN is value of masked first byte of N byte sequence */
- UTF8_cval1 = 0x00,
- UTF8_cval2 = 0xc0,
- UTF8_cval3 = 0xe0,
- UTF8_cval4 = 0xf0
+ UTF8_cval1 = 0x00,
+ UTF8_cval2 = 0xc0,
+ UTF8_cval3 = 0xe0,
+ UTF8_cval4 = 0xf0
};
static void PTRCALL
utf8_toUtf8(const ENCODING *enc,
- const char **fromP, const char *fromLim,
- char **toP, const char *toLim)
+ const char **fromP, const char *fromLim,
+ char **toP, const char *toLim)
{
- char *to;
- const char *from;
- if (fromLim - *fromP > toLim - *toP) {
- /* Avoid copying partial characters. */
- for (fromLim = *fromP + (toLim - *toP); fromLim > *fromP; fromLim--)
- if (((unsigned char)fromLim[-1] & 0xc0) != 0x80)
- break;
- }
- for (to = *toP, from = *fromP; from != fromLim; from++, to++)
- *to = *from;
- *fromP = from;
- *toP = to;
+ char *to;
+ const char *from;
+ if (fromLim - *fromP > toLim - *toP) {
+ /* Avoid copying partial characters. */
+ for (fromLim = *fromP + (toLim - *toP); fromLim > *fromP; fromLim--)
+ if (((unsigned char)fromLim[-1] & 0xc0) != 0x80)
+ break;
+ }
+ for (to = *toP, from = *fromP; from != fromLim; from++, to++)
+ *to = *from;
+ *fromP = from;
+ *toP = to;
}
static void PTRCALL
utf8_toUtf16(const ENCODING *enc,
- const char **fromP, const char *fromLim,
- unsigned short **toP, const unsigned short *toLim)
+ const char **fromP, const char *fromLim,
+ unsigned short **toP, const unsigned short *toLim)
{
- unsigned short *to = *toP;
- const char *from = *fromP;
- while (from != fromLim && to != toLim) {
- switch (((struct normal_encoding *)enc)->type[(unsigned char)*from]) {
- case BT_LEAD2:
- *to++ = (unsigned short)(((from[0] & 0x1f) << 6) | (from[1] & 0x3f));
- from += 2;
- break;
- case BT_LEAD3:
- *to++ = (unsigned short)(((from[0] & 0xf) << 12)
- | ((from[1] & 0x3f) << 6) | (from[2] & 0x3f));
- from += 3;
- break;
- case BT_LEAD4:
- {
- unsigned long n;
- if (to + 1 == toLim)
- goto after;
- n = ((from[0] & 0x7) << 18) | ((from[1] & 0x3f) << 12)
- | ((from[2] & 0x3f) << 6) | (from[3] & 0x3f);
- n -= 0x10000;
- to[0] = (unsigned short)((n >> 10) | 0xD800);
- to[1] = (unsigned short)((n & 0x3FF) | 0xDC00);
- to += 2;
- from += 4;
- }
- break;
- default:
- *to++ = *from++;
- break;
- }
- }
+ unsigned short *to = *toP;
+ const char *from = *fromP;
+ while (from != fromLim && to != toLim) {
+ switch (((struct normal_encoding *)enc)->type[(unsigned char)*from]) {
+ case BT_LEAD2:
+ *to++ = (unsigned short)(((from[0] & 0x1f) << 6) | (from[1] & 0x3f));
+ from += 2;
+ break;
+ case BT_LEAD3:
+ *to++ = (unsigned short)(((from[0] & 0xf) << 12)
+ | ((from[1] & 0x3f) << 6) | (from[2] & 0x3f));
+ from += 3;
+ break;
+ case BT_LEAD4:
+ {
+ unsigned long n;
+ if (to + 1 == toLim)
+ goto after;
+ n = ((from[0] & 0x7) << 18) | ((from[1] & 0x3f) << 12)
+ | ((from[2] & 0x3f) << 6) | (from[3] & 0x3f);
+ n -= 0x10000;
+ to[0] = (unsigned short)((n >> 10) | 0xD800);
+ to[1] = (unsigned short)((n & 0x3FF) | 0xDC00);
+ to += 2;
+ from += 4;
+ }
+ break;
+ default:
+ *to++ = *from++;
+ break;
+ }
+ }
after:
- *fromP = from;
- *toP = to;
+ *fromP = from;
+ *toP = to;
}
#ifdef XML_NS
static const struct normal_encoding utf8_encoding_ns = {
- { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
- {
+ { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
+ {
#include "asciitab.h"
#include "utf8tab.h"
- },
- STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
+ },
+ STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
};
#endif
static const struct normal_encoding utf8_encoding = {
- { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
- {
+ { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
+ {
#define BT_COLON BT_NMSTRT
#include "asciitab.h"
#undef BT_COLON
#include "utf8tab.h"
- },
- STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
+ },
+ STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
};
#ifdef XML_NS
static const struct normal_encoding internal_utf8_encoding_ns = {
- { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
- {
+ { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
+ {
#include "iasciitab.h"
#include "utf8tab.h"
- },
- STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
+ },
+ STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
};
#endif
static const struct normal_encoding internal_utf8_encoding = {
- { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
- {
+ { VTABLE1, utf8_toUtf8, utf8_toUtf16, 1, 1, 0 },
+ {
#define BT_COLON BT_NMSTRT
#include "iasciitab.h"
#undef BT_COLON
#include "utf8tab.h"
- },
- STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
+ },
+ STANDARD_VTABLE(sb_) NORMAL_VTABLE(utf8_)
};
static void PTRCALL
latin1_toUtf8(const ENCODING *enc,
- const char **fromP, const char *fromLim,
- char **toP, const char *toLim)
+ const char **fromP, const char *fromLim,
+ char **toP, const char *toLim)
{
- for (;;) {
- unsigned char c;
- if (*fromP == fromLim)
- break;
- c = (unsigned char)**fromP;
- if (c & 0x80) {
- if (toLim - *toP < 2)
- break;
- *(*toP)++ = (char)((c >> 6) | UTF8_cval2);
- *(*toP)++ = (char)((c & 0x3f) | 0x80);
- (*fromP)++;
- }
- else {
- if (*toP == toLim)
- break;
- *(*toP)++ = *(*fromP)++;
- }
- }
+ for (;;) {
+ unsigned char c;
+ if (*fromP == fromLim)
+ break;
+ c = (unsigned char)**fromP;
+ if (c & 0x80) {
+ if (toLim - *toP < 2)
+ break;
+ *(*toP)++ = (char)((c >> 6) | UTF8_cval2);
+ *(*toP)++ = (char)((c & 0x3f) | 0x80);
+ (*fromP)++;
+ }
+ else {
+ if (*toP == toLim)
+ break;
+ *(*toP)++ = *(*fromP)++;
+ }
+ }
}
static void PTRCALL
latin1_toUtf16(const ENCODING *enc,
- const char **fromP, const char *fromLim,
- unsigned short **toP, const unsigned short *toLim)
+ const char **fromP, const char *fromLim,
+ unsigned short **toP, const unsigned short *toLim)
{
- while (*fromP != fromLim && *toP != toLim)
- *(*toP)++ = (unsigned char)*(*fromP)++;
+ while (*fromP != fromLim && *toP != toLim)
+ *(*toP)++ = (unsigned char)*(*fromP)++;
}
#ifdef XML_NS
static const struct normal_encoding latin1_encoding_ns = {
- { VTABLE1, latin1_toUtf8, latin1_toUtf16, 1, 0, 0 },
- {
+ { VTABLE1, latin1_toUtf8, latin1_toUtf16, 1, 0, 0 },
+ {
#include "asciitab.h"
#include "latin1tab.h"
- },
- STANDARD_VTABLE(sb_)
+ },
+ STANDARD_VTABLE(sb_)
};
#endif
static const struct normal_encoding latin1_encoding = {
- { VTABLE1, latin1_toUtf8, latin1_toUtf16, 1, 0, 0 },
- {
+ { VTABLE1, latin1_toUtf8, latin1_toUtf16, 1, 0, 0 },
+ {
#define BT_COLON BT_NMSTRT
#include "asciitab.h"
#undef BT_COLON
#include "latin1tab.h"
- },
- STANDARD_VTABLE(sb_)
+ },
+ STANDARD_VTABLE(sb_)
};
static void PTRCALL
ascii_toUtf8(const ENCODING *enc,
- const char **fromP, const char *fromLim,
- char **toP, const char *toLim)
+ const char **fromP, const char *fromLim,
+ char **toP, const char *toLim)
{
- while (*fromP != fromLim && *toP != toLim)
- *(*toP)++ = *(*fromP)++;
+ while (*fromP != fromLim && *toP != toLim)
+ *(*toP)++ = *(*fromP)++;
}
#ifdef XML_NS
static const struct normal_encoding ascii_encoding_ns = {
- { VTABLE1, ascii_toUtf8, latin1_toUtf16, 1, 1, 0 },
- {
+ { VTABLE1, ascii_toUtf8, latin1_toUtf16, 1, 1, 0 },
+ {
#include "asciitab.h"
/* BT_NONXML == 0 */
- },
- STANDARD_VTABLE(sb_)
+ },
+ STANDARD_VTABLE(sb_)
};
#endif
static const struct normal_encoding ascii_encoding = {
- { VTABLE1, ascii_toUtf8, latin1_toUtf16, 1, 1, 0 },
- {
+ { VTABLE1, ascii_toUtf8, latin1_toUtf16, 1, 1, 0 },
+ {
#define BT_COLON BT_NMSTRT
#include "asciitab.h"
#undef BT_COLON
/* BT_NONXML == 0 */
- },
- STANDARD_VTABLE(sb_)
+ },
+ STANDARD_VTABLE(sb_)
};
static int PTRFASTCALL
unicode_byte_type(char hi, char lo)
{
- switch ((unsigned char)hi) {
- case 0xD8: case 0xD9: case 0xDA: case 0xDB:
- return BT_LEAD4;
- case 0xDC: case 0xDD: case 0xDE: case 0xDF:
- return BT_TRAIL;
- case 0xFF:
- switch ((unsigned char)lo) {
- case 0xFF:
- case 0xFE:
- return BT_NONXML;
- }
- break;
- }
- return BT_NONASCII;
+ switch ((unsigned char)hi) {
+ case 0xD8: case 0xD9: case 0xDA: case 0xDB:
+ return BT_LEAD4;
+ case 0xDC: case 0xDD: case 0xDE: case 0xDF:
+ return BT_TRAIL;
+ case 0xFF:
+ switch ((unsigned char)lo) {
+ case 0xFF:
+ case 0xFE:
+ return BT_NONXML;
+ }
+ break;
+ }
+ return BT_NONASCII;
}
#define DEFINE_UTF16_TO_UTF8(E) \
static void PTRCALL \
E ## toUtf8(const ENCODING *enc, \
- const char **fromP, const char *fromLim, \
- char **toP, const char *toLim) \
+ const char **fromP, const char *fromLim, \
+ char **toP, const char *toLim) \
{ \
- const char *from; \
- for (from = *fromP; from != fromLim; from += 2) { \
- int plane; \
- unsigned char lo2; \
- unsigned char lo = GET_LO(from); \
- unsigned char hi = GET_HI(from); \
- switch (hi) { \
- case 0: \
- if (lo < 0x80) { \
- if (*toP == toLim) { \
- *fromP = from; \
- return; \
- } \
- *(*toP)++ = lo; \
- break; \
- } \
- /* fall through */ \
- case 0x1: case 0x2: case 0x3: \
- case 0x4: case 0x5: case 0x6: case 0x7: \
- if (toLim - *toP < 2) { \
- *fromP = from; \
- return; \
- } \
- *(*toP)++ = ((lo >> 6) | (hi << 2) | UTF8_cval2); \
- *(*toP)++ = ((lo & 0x3f) | 0x80); \
- break; \
- default: \
- if (toLim - *toP < 3) { \
- *fromP = from; \
- return; \
- } \
- /* 16 bits divided 4, 6, 6 amongst 3 bytes */ \
- *(*toP)++ = ((hi >> 4) | UTF8_cval3); \
- *(*toP)++ = (((hi & 0xf) << 2) | (lo >> 6) | 0x80); \
- *(*toP)++ = ((lo & 0x3f) | 0x80); \
- break; \
- case 0xD8: case 0xD9: case 0xDA: case 0xDB: \
- if (toLim - *toP < 4) { \
- *fromP = from; \
- return; \
- } \
- plane = (((hi & 0x3) << 2) | ((lo >> 6) & 0x3)) + 1; \
- *(*toP)++ = ((plane >> 2) | UTF8_cval4); \
- *(*toP)++ = (((lo >> 2) & 0xF) | ((plane & 0x3) << 4) | 0x80); \
- from += 2; \
- lo2 = GET_LO(from); \
- *(*toP)++ = (((lo & 0x3) << 4) \
- | ((GET_HI(from) & 0x3) << 2) \
- | (lo2 >> 6) \
- | 0x80); \
- *(*toP)++ = ((lo2 & 0x3f) | 0x80); \
- break; \
- } \
- } \
- *fromP = from; \
+ const char *from; \
+ for (from = *fromP; from != fromLim; from += 2) { \
+ int plane; \
+ unsigned char lo2; \
+ unsigned char lo = GET_LO(from); \
+ unsigned char hi = GET_HI(from); \
+ switch (hi) { \
+ case 0: \
+ if (lo < 0x80) { \
+ if (*toP == toLim) { \
+ *fromP = from; \
+ return; \
+ } \
+ *(*toP)++ = lo; \
+ break; \
+ } \
+ /* fall through */ \
+ case 0x1: case 0x2: case 0x3: \
+ case 0x4: case 0x5: case 0x6: case 0x7: \
+ if (toLim - *toP < 2) { \
+ *fromP = from; \
+ return; \
+ } \
+ *(*toP)++ = ((lo >> 6) | (hi << 2) | UTF8_cval2); \
+ *(*toP)++ = ((lo & 0x3f) | 0x80); \
+ break; \
+ default: \
+ if (toLim - *toP < 3) { \
+ *fromP = from; \
+ return; \
+ } \
+ /* 16 bits divided 4, 6, 6 amongst 3 bytes */ \
+ *(*toP)++ = ((hi >> 4) | UTF8_cval3); \
+ *(*toP)++ = (((hi & 0xf) << 2) | (lo >> 6) | 0x80); \
+ *(*toP)++ = ((lo & 0x3f) | 0x80); \
+ break; \
+ case 0xD8: case 0xD9: case 0xDA: case 0xDB: \
+ if (toLim - *toP < 4) { \
+ *fromP = from; \
+ return; \
+ } \
+ plane = (((hi & 0x3) << 2) | ((lo >> 6) & 0x3)) + 1; \
+ *(*toP)++ = ((plane >> 2) | UTF8_cval4); \
+ *(*toP)++ = (((lo >> 2) & 0xF) | ((plane & 0x3) << 4) | 0x80); \
+ from += 2; \
+ lo2 = GET_LO(from); \
+ *(*toP)++ = (((lo & 0x3) << 4) \
+ | ((GET_HI(from) & 0x3) << 2) \
+ | (lo2 >> 6) \
+ | 0x80); \
+ *(*toP)++ = ((lo2 & 0x3f) | 0x80); \
+ break; \
+ } \
+ } \
+ *fromP = from; \
}
#define DEFINE_UTF16_TO_UTF16(E) \
static void PTRCALL \
E ## toUtf16(const ENCODING *enc, \
- const char **fromP, const char *fromLim, \
- unsigned short **toP, const unsigned short *toLim) \
+ const char **fromP, const char *fromLim, \
+ unsigned short **toP, const unsigned short *toLim) \
{ \
- /* Avoid copying first half only of surrogate */ \
- if (fromLim - *fromP > ((toLim - *toP) << 1) \
- && (GET_HI(fromLim - 2) & 0xF8) == 0xD8) \
- fromLim -= 2; \
- for (; *fromP != fromLim && *toP != toLim; *fromP += 2) \
- *(*toP)++ = (GET_HI(*fromP) << 8) | GET_LO(*fromP); \
+ /* Avoid copying first half only of surrogate */ \
+ if (fromLim - *fromP > ((toLim - *toP) << 1) \
+ && (GET_HI(fromLim - 2) & 0xF8) == 0xD8) \
+ fromLim -= 2; \
+ for (; *fromP != fromLim && *toP != toLim; *fromP += 2) \
+ *(*toP)++ = (GET_HI(*fromP) << 8) | GET_LO(*fromP); \
}
#define SET2(ptr, ch) \
- (((ptr)[0] = ((ch) & 0xff)), ((ptr)[1] = ((ch) >> 8)))
+ (((ptr)[0] = ((ch) & 0xff)), ((ptr)[1] = ((ch) >> 8)))
#define GET_LO(ptr) ((unsigned char)(ptr)[0])
#define GET_HI(ptr) ((unsigned char)(ptr)[1])
@@ -613,7 +613,7 @@ DEFINE_UTF16_TO_UTF16(little2_)
#undef GET_HI
#define SET2(ptr, ch) \
- (((ptr)[0] = ((ch) >> 8)), ((ptr)[1] = ((ch) & 0xFF)))
+ (((ptr)[0] = ((ch) >> 8)), ((ptr)[1] = ((ch) & 0xFF)))
#define GET_LO(ptr) ((unsigned char)(ptr)[1])
#define GET_HI(ptr) ((unsigned char)(ptr)[0])
@@ -625,46 +625,46 @@ DEFINE_UTF16_TO_UTF16(big2_)
#undef GET_HI
#define LITTLE2_BYTE_TYPE(enc, p) \
- ((p)[1] == 0 \
- ? ((struct normal_encoding *)(enc))->type[(unsigned char)*(p)] \
- : unicode_byte_type((p)[1], (p)[0]))
+ ((p)[1] == 0 \
+ ? ((struct normal_encoding *)(enc))->type[(unsigned char)*(p)] \
+ : unicode_byte_type((p)[1], (p)[0]))
#define LITTLE2_BYTE_TO_ASCII(enc, p) ((p)[1] == 0 ? (p)[0] : -1)
#define LITTLE2_CHAR_MATCHES(enc, p, c) ((p)[1] == 0 && (p)[0] == c)
#define LITTLE2_IS_NAME_CHAR_MINBPC(enc, p) \
- UCS2_GET_NAMING(namePages, (unsigned char)p[1], (unsigned char)p[0])
+ UCS2_GET_NAMING(namePages, (unsigned char)p[1], (unsigned char)p[0])
#define LITTLE2_IS_NMSTRT_CHAR_MINBPC(enc, p) \
- UCS2_GET_NAMING(nmstrtPages, (unsigned char)p[1], (unsigned char)p[0])
+ UCS2_GET_NAMING(nmstrtPages, (unsigned char)p[1], (unsigned char)p[0])
#ifdef XML_MIN_SIZE
static int PTRFASTCALL
little2_byteType(const ENCODING *enc, const char *p)
{
- return LITTLE2_BYTE_TYPE(enc, p);
+ return LITTLE2_BYTE_TYPE(enc, p);
}
static int PTRFASTCALL
little2_byteToAscii(const ENCODING *enc, const char *p)
{
- return LITTLE2_BYTE_TO_ASCII(enc, p);
+ return LITTLE2_BYTE_TO_ASCII(enc, p);
}
static int PTRCALL
little2_charMatches(const ENCODING *enc, const char *p, int c)
{
- return LITTLE2_CHAR_MATCHES(enc, p, c);
+ return LITTLE2_CHAR_MATCHES(enc, p, c);
}
static int PTRFASTCALL
little2_isNameMin(const ENCODING *enc, const char *p)
{
- return LITTLE2_IS_NAME_CHAR_MINBPC(enc, p);
+ return LITTLE2_IS_NAME_CHAR_MINBPC(enc, p);
}
static int PTRFASTCALL
little2_isNmstrtMin(const ENCODING *enc, const char *p)
{
- return LITTLE2_IS_NMSTRT_CHAR_MINBPC(enc, p);
+ return LITTLE2_IS_NMSTRT_CHAR_MINBPC(enc, p);
}
#undef VTABLE
@@ -703,37 +703,37 @@ little2_isNmstrtMin(const ENCODING *enc, const char *p)
#ifdef XML_NS
static const struct normal_encoding little2_encoding_ns = {
- { VTABLE, 2, 0,
+ { VTABLE, 2, 0,
#if BYTEORDER == 1234
- 1
+ 1
#else
- 0
+ 0
#endif
- },
- {
+ },
+ {
#include "asciitab.h"
#include "latin1tab.h"
- },
- STANDARD_VTABLE(little2_)
+ },
+ STANDARD_VTABLE(little2_)
};
#endif
static const struct normal_encoding little2_encoding = {
- { VTABLE, 2, 0,
+ { VTABLE, 2, 0,
#if BYTEORDER == 1234
- 1
+ 1
#else
- 0
+ 0
#endif
- },
- {
+ },
+ {
#define BT_COLON BT_NMSTRT
#include "asciitab.h"
#undef BT_COLON
#include "latin1tab.h"
- },
- STANDARD_VTABLE(little2_)
+ },
+ STANDARD_VTABLE(little2_)
};
#if BYTEORDER != 4321
@@ -741,71 +741,71 @@ static const struct normal_encoding little2_encoding = {
#ifdef XML_NS
static const struct normal_encoding internal_little2_encoding_ns = {
- { VTABLE, 2, 0, 1 },
- {
+ { VTABLE, 2, 0, 1 },
+ {
#include "iasciitab.h"
#include "latin1tab.h"
- },
- STANDARD_VTABLE(little2_)
+ },
+ STANDARD_VTABLE(little2_)
};
#endif
static const struct normal_encoding internal_little2_encoding = {
- { VTABLE, 2, 0, 1 },
- {
+ { VTABLE, 2, 0, 1 },
+ {
#define BT_COLON BT_NMSTRT
#include "iasciitab.h"
#undef BT_COLON
#include "latin1tab.h"
- },
- STANDARD_VTABLE(little2_)
+ },
+ STANDARD_VTABLE(little2_)
};
#endif
#define BIG2_BYTE_TYPE(enc, p) \
- ((p)[0] == 0 \
- ? ((struct normal_encoding *)(enc))->type[(unsigned char)(p)[1]] \
- : unicode_byte_type((p)[0], (p)[1]))
+ ((p)[0] == 0 \
+ ? ((struct normal_encoding *)(enc))->type[(unsigned char)(p)[1]] \
+ : unicode_byte_type((p)[0], (p)[1]))
#define BIG2_BYTE_TO_ASCII(enc, p) ((p)[0] == 0 ? (p)[1] : -1)
#define BIG2_CHAR_MATCHES(enc, p, c) ((p)[0] == 0 && (p)[1] == c)
#define BIG2_IS_NAME_CHAR_MINBPC(enc, p) \
- UCS2_GET_NAMING(namePages, (unsigned char)p[0], (unsigned char)p[1])
+ UCS2_GET_NAMING(namePages, (unsigned char)p[0], (unsigned char)p[1])
#define BIG2_IS_NMSTRT_CHAR_MINBPC(enc, p) \
- UCS2_GET_NAMING(nmstrtPages, (unsigned char)p[0], (unsigned char)p[1])
+ UCS2_GET_NAMING(nmstrtPages, (unsigned char)p[0], (unsigned char)p[1])
#ifdef XML_MIN_SIZE
static int PTRFASTCALL
big2_byteType(const ENCODING *enc, const char *p)
{
- return BIG2_BYTE_TYPE(enc, p);
+ return BIG2_BYTE_TYPE(enc, p);
}
static int PTRFASTCALL
big2_byteToAscii(const ENCODING *enc, const char *p)
{
- return BIG2_BYTE_TO_ASCII(enc, p);
+ return BIG2_BYTE_TO_ASCII(enc, p);
}
static int PTRCALL
big2_charMatches(const ENCODING *enc, const char *p, int c)
{
- return BIG2_CHAR_MATCHES(enc, p, c);
+ return BIG2_CHAR_MATCHES(enc, p, c);
}
static int PTRFASTCALL
big2_isNameMin(const ENCODING *enc, const char *p)
{
- return BIG2_IS_NAME_CHAR_MINBPC(enc, p);
+ return BIG2_IS_NAME_CHAR_MINBPC(enc, p);
}
static int PTRFASTCALL
big2_isNmstrtMin(const ENCODING *enc, const char *p)
{
- return BIG2_IS_NMSTRT_CHAR_MINBPC(enc, p);
+ return BIG2_IS_NMSTRT_CHAR_MINBPC(enc, p);
}
#undef VTABLE
@@ -844,37 +844,37 @@ big2_isNmstrtMin(const ENCODING *enc, const char *p)
#ifdef XML_NS
static const struct normal_encoding big2_encoding_ns = {
- { VTABLE, 2, 0,
+ { VTABLE, 2, 0,
#if BYTEORDER == 4321
- 1
+ 1
#else
- 0
+ 0
#endif
- },
- {
+ },
+ {
#include "asciitab.h"
#include "latin1tab.h"
- },
- STANDARD_VTABLE(big2_)
+ },
+ STANDARD_VTABLE(big2_)
};
#endif
static const struct normal_encoding big2_encoding = {
- { VTABLE, 2, 0,
+ { VTABLE, 2, 0,
#if BYTEORDER == 4321
- 1
+ 1
#else
- 0
+ 0
#endif
- },
- {
+ },
+ {
#define BT_COLON BT_NMSTRT
#include "asciitab.h"
#undef BT_COLON
#include "latin1tab.h"
- },
- STANDARD_VTABLE(big2_)
+ },
+ STANDARD_VTABLE(big2_)
};
#if BYTEORDER != 1234
@@ -882,25 +882,25 @@ static const struct normal_encoding big2_encoding = {
#ifdef XML_NS
static const struct normal_encoding internal_big2_encoding_ns = {
- { VTABLE, 2, 0, 1 },
- {
+ { VTABLE, 2, 0, 1 },
+ {
#include "iasciitab.h"
#include "latin1tab.h"
- },
- STANDARD_VTABLE(big2_)
+ },
+ STANDARD_VTABLE(big2_)
};
#endif
static const struct normal_encoding internal_big2_encoding = {
- { VTABLE, 2, 0, 1 },
- {
+ { VTABLE, 2, 0, 1 },
+ {
#define BT_COLON BT_NMSTRT
#include "iasciitab.h"
#undef BT_COLON
#include "latin1tab.h"
- },
- STANDARD_VTABLE(big2_)
+ },
+ STANDARD_VTABLE(big2_)
};
#endif
@@ -910,51 +910,51 @@ static const struct normal_encoding internal_big2_encoding = {
static int FASTCALL
streqci(const char *s1, const char *s2)
{
- for (;;) {
- char c1 = *s1++;
- char c2 = *s2++;
- if (ASCII_a <= c1 && c1 <= ASCII_z)
- c1 += ASCII_A - ASCII_a;
- if (ASCII_a <= c2 && c2 <= ASCII_z)
- c2 += ASCII_A - ASCII_a;
- if (c1 != c2)
- return 0;
- if (!c1)
- break;
- }
- return 1;
+ for (;;) {
+ char c1 = *s1++;
+ char c2 = *s2++;
+ if (ASCII_a <= c1 && c1 <= ASCII_z)
+ c1 += ASCII_A - ASCII_a;
+ if (ASCII_a <= c2 && c2 <= ASCII_z)
+ c2 += ASCII_A - ASCII_a;
+ if (c1 != c2)
+ return 0;
+ if (!c1)
+ break;
+ }
+ return 1;
}
static void PTRCALL
initUpdatePosition(const ENCODING *enc, const char *ptr,
- const char *end, POSITION *pos)
+ const char *end, POSITION *pos)
{
- normal_updatePosition(&utf8_encoding.enc, ptr, end, pos);
+ normal_updatePosition(&utf8_encoding.enc, ptr, end, pos);
}
static int
toAscii(const ENCODING *enc, const char *ptr, const char *end)
{
- char buf[1];
- char *p = buf;
- XmlUtf8Convert(enc, &ptr, end, &p, p + 1);
- if (p == buf)
- return -1;
- else
- return buf[0];
+ char buf[1];
+ char *p = buf;
+ XmlUtf8Convert(enc, &ptr, end, &p, p + 1);
+ if (p == buf)
+ return -1;
+ else
+ return buf[0];
}
static int FASTCALL
isSpace(int c)
{
- switch (c) {
- case 0x20:
- case 0xD:
- case 0xA:
- case 0x9:
- return 1;
- }
- return 0;
+ switch (c) {
+ case 0x20:
+ case 0xD:
+ case 0xA:
+ case 0x9:
+ return 1;
+ }
+ return 0;
}
/* Return 1 if there's just optional white space or there's an S
@@ -962,282 +962,282 @@ isSpace(int c)
*/
static int
parsePseudoAttribute(const ENCODING *enc,
- const char *ptr,
- const char *end,
- const char **namePtr,
- const char **nameEndPtr,
- const char **valPtr,
- const char **nextTokPtr)
+ const char *ptr,
+ const char *end,
+ const char **namePtr,
+ const char **nameEndPtr,
+ const char **valPtr,
+ const char **nextTokPtr)
{
- int c;
- char open;
- if (ptr == end) {
- *namePtr = NULL;
- return 1;
- }
- if (!isSpace(toAscii(enc, ptr, end))) {
- *nextTokPtr = ptr;
- return 0;
- }
- do {
- ptr += enc->minBytesPerChar;
- } while (isSpace(toAscii(enc, ptr, end)));
- if (ptr == end) {
- *namePtr = NULL;
- return 1;
- }
- *namePtr = ptr;
- for (;;) {
- c = toAscii(enc, ptr, end);
- if (c == -1) {
- *nextTokPtr = ptr;
- return 0;
- }
- if (c == ASCII_EQUALS) {
- *nameEndPtr = ptr;
- break;
- }
- if (isSpace(c)) {
- *nameEndPtr = ptr;
- do {
- ptr += enc->minBytesPerChar;
- } while (isSpace(c = toAscii(enc, ptr, end)));
- if (c != ASCII_EQUALS) {
- *nextTokPtr = ptr;
- return 0;
- }
- break;
- }
- ptr += enc->minBytesPerChar;
- }
- if (ptr == *namePtr) {
- *nextTokPtr = ptr;
- return 0;
- }
- ptr += enc->minBytesPerChar;
- c = toAscii(enc, ptr, end);
- while (isSpace(c)) {
- ptr += enc->minBytesPerChar;
- c = toAscii(enc, ptr, end);
- }
- if (c != ASCII_QUOT && c != ASCII_APOS) {
- *nextTokPtr = ptr;
- return 0;
- }
- open = (char)c;
- ptr += enc->minBytesPerChar;
- *valPtr = ptr;
- for (;; ptr += enc->minBytesPerChar) {
- c = toAscii(enc, ptr, end);
- if (c == open)
- break;
- if (!(ASCII_a <= c && c <= ASCII_z)
- && !(ASCII_A <= c && c <= ASCII_Z)
- && !(ASCII_0 <= c && c <= ASCII_9)
- && c != ASCII_PERIOD
- && c != ASCII_MINUS
- && c != ASCII_UNDERSCORE) {
- *nextTokPtr = ptr;
- return 0;
- }
- }
- *nextTokPtr = ptr + enc->minBytesPerChar;
- return 1;
+ int c;
+ char open;
+ if (ptr == end) {
+ *namePtr = NULL;
+ return 1;
+ }
+ if (!isSpace(toAscii(enc, ptr, end))) {
+ *nextTokPtr = ptr;
+ return 0;
+ }
+ do {
+ ptr += enc->minBytesPerChar;
+ } while (isSpace(toAscii(enc, ptr, end)));
+ if (ptr == end) {
+ *namePtr = NULL;
+ return 1;
+ }
+ *namePtr = ptr;
+ for (;;) {
+ c = toAscii(enc, ptr, end);
+ if (c == -1) {
+ *nextTokPtr = ptr;
+ return 0;
+ }
+ if (c == ASCII_EQUALS) {
+ *nameEndPtr = ptr;
+ break;
+ }
+ if (isSpace(c)) {
+ *nameEndPtr = ptr;
+ do {
+ ptr += enc->minBytesPerChar;
+ } while (isSpace(c = toAscii(enc, ptr, end)));
+ if (c != ASCII_EQUALS) {
+ *nextTokPtr = ptr;
+ return 0;
+ }
+ break;
+ }
+ ptr += enc->minBytesPerChar;
+ }
+ if (ptr == *namePtr) {
+ *nextTokPtr = ptr;
+ return 0;
+ }
+ ptr += enc->minBytesPerChar;
+ c = toAscii(enc, ptr, end);
+ while (isSpace(c)) {
+ ptr += enc->minBytesPerChar;
+ c = toAscii(enc, ptr, end);
+ }
+ if (c != ASCII_QUOT && c != ASCII_APOS) {
+ *nextTokPtr = ptr;
+ return 0;
+ }
+ open = (char)c;
+ ptr += enc->minBytesPerChar;
+ *valPtr = ptr;
+ for (;; ptr += enc->minBytesPerChar) {
+ c = toAscii(enc, ptr, end);
+ if (c == open)
+ break;
+ if (!(ASCII_a <= c && c <= ASCII_z)
+ && !(ASCII_A <= c && c <= ASCII_Z)
+ && !(ASCII_0 <= c && c <= ASCII_9)
+ && c != ASCII_PERIOD
+ && c != ASCII_MINUS
+ && c != ASCII_UNDERSCORE) {
+ *nextTokPtr = ptr;
+ return 0;
+ }
+ }
+ *nextTokPtr = ptr + enc->minBytesPerChar;
+ return 1;
}
static const char KW_version[] = {
- ASCII_v, ASCII_e, ASCII_r, ASCII_s, ASCII_i, ASCII_o, ASCII_n, '\0'
+ ASCII_v, ASCII_e, ASCII_r, ASCII_s, ASCII_i, ASCII_o, ASCII_n, '\0'
};
static const char KW_encoding[] = {
- ASCII_e, ASCII_n, ASCII_c, ASCII_o, ASCII_d, ASCII_i, ASCII_n, ASCII_g, '\0'
+ ASCII_e, ASCII_n, ASCII_c, ASCII_o, ASCII_d, ASCII_i, ASCII_n, ASCII_g, '\0'
};
static const char KW_standalone[] = {
- ASCII_s, ASCII_t, ASCII_a, ASCII_n, ASCII_d, ASCII_a, ASCII_l, ASCII_o,
- ASCII_n, ASCII_e, '\0'
+ ASCII_s, ASCII_t, ASCII_a, ASCII_n, ASCII_d, ASCII_a, ASCII_l, ASCII_o,
+ ASCII_n, ASCII_e, '\0'
};
static const char KW_yes[] = {
- ASCII_y, ASCII_e, ASCII_s, '\0'
+ ASCII_y, ASCII_e, ASCII_s, '\0'
};
static const char KW_no[] = {
- ASCII_n, ASCII_o, '\0'
+ ASCII_n, ASCII_o, '\0'
};
static int
doParseXmlDecl(const ENCODING *(*encodingFinder)(const ENCODING *,
- const char *,
- const char *),
- int isGeneralTextEntity,
- const ENCODING *enc,
- const char *ptr,
- const char *end,
- const char **badPtr,
- const char **versionPtr,
- const char **versionEndPtr,
- const char **encodingName,
- const ENCODING **encoding,
- int *standalone)
+ const char *,
+ const char *),
+ int isGeneralTextEntity,
+ const ENCODING *enc,
+ const char *ptr,
+ const char *end,
+ const char **badPtr,
+ const char **versionPtr,
+ const char **versionEndPtr,
+ const char **encodingName,
+ const ENCODING **encoding,
+ int *standalone)
{
- const char *val = NULL;
- const char *name = NULL;
- const char *nameEnd = NULL;
- ptr += 5 * enc->minBytesPerChar;
- end -= 2 * enc->minBytesPerChar;
- if (!parsePseudoAttribute(enc, ptr, end, &name, &nameEnd, &val, &ptr)
- || !name) {
- *badPtr = ptr;
- return 0;
- }
- if (!XmlNameMatchesAscii(enc, name, nameEnd, KW_version)) {
- if (!isGeneralTextEntity) {
- *badPtr = name;
- return 0;
- }
- }
- else {
- if (versionPtr)
- *versionPtr = val;
- if (versionEndPtr)
- *versionEndPtr = ptr;
- if (!parsePseudoAttribute(enc, ptr, end, &name, &nameEnd, &val, &ptr)) {
- *badPtr = ptr;
- return 0;
- }
- if (!name) {
- if (isGeneralTextEntity) {
- /* a TextDecl must have an EncodingDecl */
- *badPtr = ptr;
- return 0;
- }
- return 1;
- }
- }
- if (XmlNameMatchesAscii(enc, name, nameEnd, KW_encoding)) {
- int c = toAscii(enc, val, end);
- if (!(ASCII_a <= c && c <= ASCII_z) && !(ASCII_A <= c && c <= ASCII_Z)) {
- *badPtr = val;
- return 0;
- }
- if (encodingName)
- *encodingName = val;
- if (encoding)
- *encoding = encodingFinder(enc, val, ptr - enc->minBytesPerChar);
- if (!parsePseudoAttribute(enc, ptr, end, &name, &nameEnd, &val, &ptr)) {
- *badPtr = ptr;
- return 0;
- }
- if (!name)
- return 1;
- }
- if (!XmlNameMatchesAscii(enc, name, nameEnd, KW_standalone)
- || isGeneralTextEntity) {
- *badPtr = name;
- return 0;
- }
- if (XmlNameMatchesAscii(enc, val, ptr - enc->minBytesPerChar, KW_yes)) {
- if (standalone)
- *standalone = 1;
- }
- else if (XmlNameMatchesAscii(enc, val, ptr - enc->minBytesPerChar, KW_no)) {
- if (standalone)
- *standalone = 0;
- }
- else {
- *badPtr = val;
- return 0;
- }
- while (isSpace(toAscii(enc, ptr, end)))
- ptr += enc->minBytesPerChar;
- if (ptr != end) {
- *badPtr = ptr;
- return 0;
- }
- return 1;
+ const char *val = NULL;
+ const char *name = NULL;
+ const char *nameEnd = NULL;
+ ptr += 5 * enc->minBytesPerChar;
+ end -= 2 * enc->minBytesPerChar;
+ if (!parsePseudoAttribute(enc, ptr, end, &name, &nameEnd, &val, &ptr)
+ || !name) {
+ *badPtr = ptr;
+ return 0;
+ }
+ if (!XmlNameMatchesAscii(enc, name, nameEnd, KW_version)) {
+ if (!isGeneralTextEntity) {
+ *badPtr = name;
+ return 0;
+ }
+ }
+ else {
+ if (versionPtr)
+ *versionPtr = val;
+ if (versionEndPtr)
+ *versionEndPtr = ptr;
+ if (!parsePseudoAttribute(enc, ptr, end, &name, &nameEnd, &val, &ptr)) {
+ *badPtr = ptr;
+ return 0;
+ }
+ if (!name) {
+ if (isGeneralTextEntity) {
+ /* a TextDecl must have an EncodingDecl */
+ *badPtr = ptr;
+ return 0;
+ }
+ return 1;
+ }
+ }
+ if (XmlNameMatchesAscii(enc, name, nameEnd, KW_encoding)) {
+ int c = toAscii(enc, val, end);
+ if (!(ASCII_a <= c && c <= ASCII_z) && !(ASCII_A <= c && c <= ASCII_Z)) {
+ *badPtr = val;
+ return 0;
+ }
+ if (encodingName)
+ *encodingName = val;
+ if (encoding)
+ *encoding = encodingFinder(enc, val, ptr - enc->minBytesPerChar);
+ if (!parsePseudoAttribute(enc, ptr, end, &name, &nameEnd, &val, &ptr)) {
+ *badPtr = ptr;
+ return 0;
+ }
+ if (!name)
+ return 1;
+ }
+ if (!XmlNameMatchesAscii(enc, name, nameEnd, KW_standalone)
+ || isGeneralTextEntity) {
+ *badPtr = name;
+ return 0;
+ }
+ if (XmlNameMatchesAscii(enc, val, ptr - enc->minBytesPerChar, KW_yes)) {
+ if (standalone)
+ *standalone = 1;
+ }
+ else if (XmlNameMatchesAscii(enc, val, ptr - enc->minBytesPerChar, KW_no)) {
+ if (standalone)
+ *standalone = 0;
+ }
+ else {
+ *badPtr = val;
+ return 0;
+ }
+ while (isSpace(toAscii(enc, ptr, end)))
+ ptr += enc->minBytesPerChar;
+ if (ptr != end) {
+ *badPtr = ptr;
+ return 0;
+ }
+ return 1;
}
static int FASTCALL
checkCharRefNumber(int result)
{
- switch (result >> 8) {
- case 0xD8: case 0xD9: case 0xDA: case 0xDB:
- case 0xDC: case 0xDD: case 0xDE: case 0xDF:
- return -1;
- case 0:
- if (latin1_encoding.type[result] == BT_NONXML)
- return -1;
- break;
- case 0xFF:
- if (result == 0xFFFE || result == 0xFFFF)
- return -1;
- break;
- }
- return result;
+ switch (result >> 8) {
+ case 0xD8: case 0xD9: case 0xDA: case 0xDB:
+ case 0xDC: case 0xDD: case 0xDE: case 0xDF:
+ return -1;
+ case 0:
+ if (latin1_encoding.type[result] == BT_NONXML)
+ return -1;
+ break;
+ case 0xFF:
+ if (result == 0xFFFE || result == 0xFFFF)
+ return -1;
+ break;
+ }
+ return result;
}
int FASTCALL
XmlUtf8Encode(int c, char *buf)
{
- enum {
- /* minN is minimum legal resulting value for N byte sequence */
- min2 = 0x80,
- min3 = 0x800,
- min4 = 0x10000
- };
-
- if (c < 0)
- return 0;
- if (c < min2) {
- buf[0] = (char)(c | UTF8_cval1);
- return 1;
- }
- if (c < min3) {
- buf[0] = (char)((c >> 6) | UTF8_cval2);
- buf[1] = (char)((c & 0x3f) | 0x80);
- return 2;
- }
- if (c < min4) {
- buf[0] = (char)((c >> 12) | UTF8_cval3);
- buf[1] = (char)(((c >> 6) & 0x3f) | 0x80);
- buf[2] = (char)((c & 0x3f) | 0x80);
- return 3;
- }
- if (c < 0x110000) {
- buf[0] = (char)((c >> 18) | UTF8_cval4);
- buf[1] = (char)(((c >> 12) & 0x3f) | 0x80);
- buf[2] = (char)(((c >> 6) & 0x3f) | 0x80);
- buf[3] = (char)((c & 0x3f) | 0x80);
- return 4;
- }
- return 0;
+ enum {
+ /* minN is minimum legal resulting value for N byte sequence */
+ min2 = 0x80,
+ min3 = 0x800,
+ min4 = 0x10000
+ };
+
+ if (c < 0)
+ return 0;
+ if (c < min2) {
+ buf[0] = (char)(c | UTF8_cval1);
+ return 1;
+ }
+ if (c < min3) {
+ buf[0] = (char)((c >> 6) | UTF8_cval2);
+ buf[1] = (char)((c & 0x3f) | 0x80);
+ return 2;
+ }
+ if (c < min4) {
+ buf[0] = (char)((c >> 12) | UTF8_cval3);
+ buf[1] = (char)(((c >> 6) & 0x3f) | 0x80);
+ buf[2] = (char)((c & 0x3f) | 0x80);
+ return 3;
+ }
+ if (c < 0x110000) {
+ buf[0] = (char)((c >> 18) | UTF8_cval4);
+ buf[1] = (char)(((c >> 12) & 0x3f) | 0x80);
+ buf[2] = (char)(((c >> 6) & 0x3f) | 0x80);
+ buf[3] = (char)((c & 0x3f) | 0x80);
+ return 4;
+ }
+ return 0;
}
int FASTCALL
XmlUtf16Encode(int charNum, unsigned short *buf)
{
- if (charNum < 0)
- return 0;
- if (charNum < 0x10000) {
- buf[0] = (unsigned short)charNum;
- return 1;
- }
- if (charNum < 0x110000) {
- charNum -= 0x10000;
- buf[0] = (unsigned short)((charNum >> 10) + 0xD800);
- buf[1] = (unsigned short)((charNum & 0x3FF) + 0xDC00);
- return 2;
- }
- return 0;
+ if (charNum < 0)
+ return 0;
+ if (charNum < 0x10000) {
+ buf[0] = (unsigned short)charNum;
+ return 1;
+ }
+ if (charNum < 0x110000) {
+ charNum -= 0x10000;
+ buf[0] = (unsigned short)((charNum >> 10) + 0xD800);
+ buf[1] = (unsigned short)((charNum & 0x3FF) + 0xDC00);
+ return 2;
+ }
+ return 0;
}
struct unknown_encoding {
- struct normal_encoding normal;
- CONVERTER convert;
- void *userData;
- unsigned short utf16[256];
- char utf8[256][4];
+ struct normal_encoding normal;
+ CONVERTER convert;
+ void *userData;
+ unsigned short utf16[256];
+ char utf8[256][4];
};
#define AS_UNKNOWN_ENCODING(enc) ((const struct unknown_encoding *) (enc))
@@ -1245,225 +1245,225 @@ struct unknown_encoding {
int
XmlSizeOfUnknownEncoding(void)
{
- return sizeof(struct unknown_encoding);
+ return sizeof(struct unknown_encoding);
}
static int PTRFASTCALL
unknown_isName(const ENCODING *enc, const char *p)
{
- const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
- int c = uenc->convert(uenc->userData, p);
- if (c & ~0xFFFF)
- return 0;
- return UCS2_GET_NAMING(namePages, c >> 8, c & 0xFF);
+ const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
+ int c = uenc->convert(uenc->userData, p);
+ if (c & ~0xFFFF)
+ return 0;
+ return UCS2_GET_NAMING(namePages, c >> 8, c & 0xFF);
}
static int PTRFASTCALL
unknown_isNmstrt(const ENCODING *enc, const char *p)
{
- const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
- int c = uenc->convert(uenc->userData, p);
- if (c & ~0xFFFF)
- return 0;
- return UCS2_GET_NAMING(nmstrtPages, c >> 8, c & 0xFF);
+ const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
+ int c = uenc->convert(uenc->userData, p);
+ if (c & ~0xFFFF)
+ return 0;
+ return UCS2_GET_NAMING(nmstrtPages, c >> 8, c & 0xFF);
}
static int PTRFASTCALL
unknown_isInvalid(const ENCODING *enc, const char *p)
{
- const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
- int c = uenc->convert(uenc->userData, p);
- return (c & ~0xFFFF) || checkCharRefNumber(c) < 0;
+ const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
+ int c = uenc->convert(uenc->userData, p);
+ return (c & ~0xFFFF) || checkCharRefNumber(c) < 0;
}
static void PTRCALL
unknown_toUtf8(const ENCODING *enc,
- const char **fromP, const char *fromLim,
- char **toP, const char *toLim)
+ const char **fromP, const char *fromLim,
+ char **toP, const char *toLim)
{
- const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
- char buf[XML_UTF8_ENCODE_MAX];
- for (;;) {
- const char *utf8;
- int n;
- if (*fromP == fromLim)
- break;
- utf8 = uenc->utf8[(unsigned char)**fromP];
- n = *utf8++;
- if (n == 0) {
- int c = uenc->convert(uenc->userData, *fromP);
- n = XmlUtf8Encode(c, buf);
- if (n > toLim - *toP)
- break;
- utf8 = buf;
- *fromP += (AS_NORMAL_ENCODING(enc)->type[(unsigned char)**fromP]
- - (BT_LEAD2 - 2));
- }
- else {
- if (n > toLim - *toP)
- break;
- (*fromP)++;
- }
- do {
- *(*toP)++ = *utf8++;
- } while (--n != 0);
- }
+ const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
+ char buf[XML_UTF8_ENCODE_MAX];
+ for (;;) {
+ const char *utf8;
+ int n;
+ if (*fromP == fromLim)
+ break;
+ utf8 = uenc->utf8[(unsigned char)**fromP];
+ n = *utf8++;
+ if (n == 0) {
+ int c = uenc->convert(uenc->userData, *fromP);
+ n = XmlUtf8Encode(c, buf);
+ if (n > toLim - *toP)
+ break;
+ utf8 = buf;
+ *fromP += (AS_NORMAL_ENCODING(enc)->type[(unsigned char)**fromP]
+ - (BT_LEAD2 - 2));
+ }
+ else {
+ if (n > toLim - *toP)
+ break;
+ (*fromP)++;
+ }
+ do {
+ *(*toP)++ = *utf8++;
+ } while (--n != 0);
+ }
}
static void PTRCALL
unknown_toUtf16(const ENCODING *enc,
- const char **fromP, const char *fromLim,
- unsigned short **toP, const unsigned short *toLim)
+ const char **fromP, const char *fromLim,
+ unsigned short **toP, const unsigned short *toLim)
{
- const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
- while (*fromP != fromLim && *toP != toLim) {
- unsigned short c = uenc->utf16[(unsigned char)**fromP];
- if (c == 0) {
- c = (unsigned short)
- uenc->convert(uenc->userData, *fromP);
- *fromP += (AS_NORMAL_ENCODING(enc)->type[(unsigned char)**fromP]
- - (BT_LEAD2 - 2));
- }
- else
- (*fromP)++;
- *(*toP)++ = c;
- }
+ const struct unknown_encoding *uenc = AS_UNKNOWN_ENCODING(enc);
+ while (*fromP != fromLim && *toP != toLim) {
+ unsigned short c = uenc->utf16[(unsigned char)**fromP];
+ if (c == 0) {
+ c = (unsigned short)
+ uenc->convert(uenc->userData, *fromP);
+ *fromP += (AS_NORMAL_ENCODING(enc)->type[(unsigned char)**fromP]
+ - (BT_LEAD2 - 2));
+ }
+ else
+ (*fromP)++;
+ *(*toP)++ = c;
+ }
}
ENCODING *
XmlInitUnknownEncoding(void *mem,
- int *table,
- CONVERTER convert,
- void *userData)
+ int *table,
+ CONVERTER convert,
+ void *userData)
{
- int i;
- struct unknown_encoding *e = (struct unknown_encoding *)mem;
- for (i = 0; i < (int)sizeof(struct normal_encoding); i++)
- ((char *)mem)[i] = ((char *)&latin1_encoding)[i];
- for (i = 0; i < 128; i++)
- if (latin1_encoding.type[i] != BT_OTHER
- && latin1_encoding.type[i] != BT_NONXML
- && table[i] != i)
- return 0;
- for (i = 0; i < 256; i++) {
- int c = table[i];
- if (c == -1) {
- e->normal.type[i] = BT_MALFORM;
- /* This shouldn't really get used. */
- e->utf16[i] = 0xFFFF;
- e->utf8[i][0] = 1;
- e->utf8[i][1] = 0;
- }
- else if (c < 0) {
- if (c < -4)
- return 0;
- e->normal.type[i] = (unsigned char)(BT_LEAD2 - (c + 2));
- e->utf8[i][0] = 0;
- e->utf16[i] = 0;
- }
- else if (c < 0x80) {
- if (latin1_encoding.type[c] != BT_OTHER
- && latin1_encoding.type[c] != BT_NONXML
- && c != i)
- return 0;
- e->normal.type[i] = latin1_encoding.type[c];
- e->utf8[i][0] = 1;
- e->utf8[i][1] = (char)c;
- e->utf16[i] = (unsigned short)(c == 0 ? 0xFFFF : c);
- }
- else if (checkCharRefNumber(c) < 0) {
- e->normal.type[i] = BT_NONXML;
- /* This shouldn't really get used. */
- e->utf16[i] = 0xFFFF;
- e->utf8[i][0] = 1;
- e->utf8[i][1] = 0;
- }
- else {
- if (c > 0xFFFF)
- return 0;
- if (UCS2_GET_NAMING(nmstrtPages, c >> 8, c & 0xff))
- e->normal.type[i] = BT_NMSTRT;
- else if (UCS2_GET_NAMING(namePages, c >> 8, c & 0xff))
- e->normal.type[i] = BT_NAME;
- else
- e->normal.type[i] = BT_OTHER;
- e->utf8[i][0] = (char)XmlUtf8Encode(c, e->utf8[i] + 1);
- e->utf16[i] = (unsigned short)c;
- }
- }
- e->userData = userData;
- e->convert = convert;
- if (convert) {
- e->normal.isName2 = unknown_isName;
- e->normal.isName3 = unknown_isName;
- e->normal.isName4 = unknown_isName;
- e->normal.isNmstrt2 = unknown_isNmstrt;
- e->normal.isNmstrt3 = unknown_isNmstrt;
- e->normal.isNmstrt4 = unknown_isNmstrt;
- e->normal.isInvalid2 = unknown_isInvalid;
- e->normal.isInvalid3 = unknown_isInvalid;
- e->normal.isInvalid4 = unknown_isInvalid;
- }
- e->normal.enc.utf8Convert = unknown_toUtf8;
- e->normal.enc.utf16Convert = unknown_toUtf16;
- return &(e->normal.enc);
+ int i;
+ struct unknown_encoding *e = (struct unknown_encoding *)mem;
+ for (i = 0; i < (int)sizeof(struct normal_encoding); i++)
+ ((char *)mem)[i] = ((char *)&latin1_encoding)[i];
+ for (i = 0; i < 128; i++)
+ if (latin1_encoding.type[i] != BT_OTHER
+ && latin1_encoding.type[i] != BT_NONXML
+ && table[i] != i)
+ return 0;
+ for (i = 0; i < 256; i++) {
+ int c = table[i];
+ if (c == -1) {
+ e->normal.type[i] = BT_MALFORM;
+ /* This shouldn't really get used. */
+ e->utf16[i] = 0xFFFF;
+ e->utf8[i][0] = 1;
+ e->utf8[i][1] = 0;
+ }
+ else if (c < 0) {
+ if (c < -4)
+ return 0;
+ e->normal.type[i] = (unsigned char)(BT_LEAD2 - (c + 2));
+ e->utf8[i][0] = 0;
+ e->utf16[i] = 0;
+ }
+ else if (c < 0x80) {
+ if (latin1_encoding.type[c] != BT_OTHER
+ && latin1_encoding.type[c] != BT_NONXML
+ && c != i)
+ return 0;
+ e->normal.type[i] = latin1_encoding.type[c];
+ e->utf8[i][0] = 1;
+ e->utf8[i][1] = (char)c;
+ e->utf16[i] = (unsigned short)(c == 0 ? 0xFFFF : c);
+ }
+ else if (checkCharRefNumber(c) < 0) {
+ e->normal.type[i] = BT_NONXML;
+ /* This shouldn't really get used. */
+ e->utf16[i] = 0xFFFF;
+ e->utf8[i][0] = 1;
+ e->utf8[i][1] = 0;
+ }
+ else {
+ if (c > 0xFFFF)
+ return 0;
+ if (UCS2_GET_NAMING(nmstrtPages, c >> 8, c & 0xff))
+ e->normal.type[i] = BT_NMSTRT;
+ else if (UCS2_GET_NAMING(namePages, c >> 8, c & 0xff))
+ e->normal.type[i] = BT_NAME;
+ else
+ e->normal.type[i] = BT_OTHER;
+ e->utf8[i][0] = (char)XmlUtf8Encode(c, e->utf8[i] + 1);
+ e->utf16[i] = (unsigned short)c;
+ }
+ }
+ e->userData = userData;
+ e->convert = convert;
+ if (convert) {
+ e->normal.isName2 = unknown_isName;
+ e->normal.isName3 = unknown_isName;
+ e->normal.isName4 = unknown_isName;
+ e->normal.isNmstrt2 = unknown_isNmstrt;
+ e->normal.isNmstrt3 = unknown_isNmstrt;
+ e->normal.isNmstrt4 = unknown_isNmstrt;
+ e->normal.isInvalid2 = unknown_isInvalid;
+ e->normal.isInvalid3 = unknown_isInvalid;
+ e->normal.isInvalid4 = unknown_isInvalid;
+ }
+ e->normal.enc.utf8Convert = unknown_toUtf8;
+ e->normal.enc.utf16Convert = unknown_toUtf16;
+ return &(e->normal.enc);
}
/* If this enumeration is changed, getEncodingIndex and encodings
must also be changed. */
enum {
- UNKNOWN_ENC = -1,
- ISO_8859_1_ENC = 0,
- US_ASCII_ENC,
- UTF_8_ENC,
- UTF_16_ENC,
- UTF_16BE_ENC,
- UTF_16LE_ENC,
- /* must match encodingNames up to here */
- NO_ENC
+ UNKNOWN_ENC = -1,
+ ISO_8859_1_ENC = 0,
+ US_ASCII_ENC,
+ UTF_8_ENC,
+ UTF_16_ENC,
+ UTF_16BE_ENC,
+ UTF_16LE_ENC,
+ /* must match encodingNames up to here */
+ NO_ENC
};
static const char KW_ISO_8859_1[] = {
- ASCII_I, ASCII_S, ASCII_O, ASCII_MINUS, ASCII_8, ASCII_8, ASCII_5, ASCII_9,
- ASCII_MINUS, ASCII_1, '\0'
+ ASCII_I, ASCII_S, ASCII_O, ASCII_MINUS, ASCII_8, ASCII_8, ASCII_5, ASCII_9,
+ ASCII_MINUS, ASCII_1, '\0'
};
static const char KW_US_ASCII[] = {
- ASCII_U, ASCII_S, ASCII_MINUS, ASCII_A, ASCII_S, ASCII_C, ASCII_I, ASCII_I,
- '\0'
+ ASCII_U, ASCII_S, ASCII_MINUS, ASCII_A, ASCII_S, ASCII_C, ASCII_I, ASCII_I,
+ '\0'
};
static const char KW_UTF_8[] = {
- ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_8, '\0'
+ ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_8, '\0'
};
static const char KW_UTF_16[] = {
- ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_1, ASCII_6, '\0'
+ ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_1, ASCII_6, '\0'
};
static const char KW_UTF_16BE[] = {
- ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_1, ASCII_6, ASCII_B, ASCII_E,
- '\0'
+ ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_1, ASCII_6, ASCII_B, ASCII_E,
+ '\0'
};
static const char KW_UTF_16LE[] = {
- ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_1, ASCII_6, ASCII_L, ASCII_E,
- '\0'
+ ASCII_U, ASCII_T, ASCII_F, ASCII_MINUS, ASCII_1, ASCII_6, ASCII_L, ASCII_E,
+ '\0'
};
static int FASTCALL
getEncodingIndex(const char *name)
{
- static const char * const encodingNames[] = {
- KW_ISO_8859_1,
- KW_US_ASCII,
- KW_UTF_8,
- KW_UTF_16,
- KW_UTF_16BE,
- KW_UTF_16LE,
- };
- int i;
- if (name == NULL)
- return NO_ENC;
- for (i = 0; i < (int)(sizeof(encodingNames)/sizeof(encodingNames[0])); i++)
- if (streqci(name, encodingNames[i]))
- return i;
- return UNKNOWN_ENC;
+ static const char * const encodingNames[] = {
+ KW_ISO_8859_1,
+ KW_US_ASCII,
+ KW_UTF_8,
+ KW_UTF_16,
+ KW_UTF_16BE,
+ KW_UTF_16LE,
+ };
+ int i;
+ if (name == NULL)
+ return NO_ENC;
+ for (i = 0; i < (int)(sizeof(encodingNames)/sizeof(encodingNames[0])); i++)
+ if (streqci(name, encodingNames[i]))
+ return i;
+ return UNKNOWN_ENC;
}
/* For binary compatibility, we store the index of the encoding
@@ -1483,124 +1483,124 @@ getEncodingIndex(const char *name)
static int
initScan(const ENCODING * const *encodingTable,
- const INIT_ENCODING *enc,
- int state,
- const char *ptr,
- const char *end,
- const char **nextTokPtr)
+ const INIT_ENCODING *enc,
+ int state,
+ const char *ptr,
+ const char *end,
+ const char **nextTokPtr)
{
- const ENCODING **encPtr;
+ const ENCODING **encPtr;
- if (ptr == end)
- return XML_TOK_NONE;
- encPtr = enc->encPtr;
- if (ptr + 1 == end) {
- /* only a single byte available for auto-detection */
+ if (ptr == end)
+ return XML_TOK_NONE;
+ encPtr = enc->encPtr;
+ if (ptr + 1 == end) {
+ /* only a single byte available for auto-detection */
#ifndef XML_DTD /* FIXME */
- /* a well-formed document entity must have more than one byte */
- if (state != XML_CONTENT_STATE)
- return XML_TOK_PARTIAL;
+ /* a well-formed document entity must have more than one byte */
+ if (state != XML_CONTENT_STATE)
+ return XML_TOK_PARTIAL;
#endif
- /* so we're parsing an external text entity... */
- /* if UTF-16 was externally specified, then we need at least 2 bytes */
- switch (INIT_ENC_INDEX(enc)) {
- case UTF_16_ENC:
- case UTF_16LE_ENC:
- case UTF_16BE_ENC:
- return XML_TOK_PARTIAL;
- }
- switch ((unsigned char)*ptr) {
- case 0xFE:
- case 0xFF:
- case 0xEF: /* possibly first byte of UTF-8 BOM */
- if (INIT_ENC_INDEX(enc) == ISO_8859_1_ENC
- && state == XML_CONTENT_STATE)
- break;
- /* fall through */
- case 0x00:
- case 0x3C:
- return XML_TOK_PARTIAL;
- }
- }
- else {
- switch (((unsigned char)ptr[0] << 8) | (unsigned char)ptr[1]) {
- case 0xFEFF:
- if (INIT_ENC_INDEX(enc) == ISO_8859_1_ENC
- && state == XML_CONTENT_STATE)
- break;
- *nextTokPtr = ptr + 2;
- *encPtr = encodingTable[UTF_16BE_ENC];
- return XML_TOK_BOM;
- /* 00 3C is handled in the default case */
- case 0x3C00:
- if ((INIT_ENC_INDEX(enc) == UTF_16BE_ENC
- || INIT_ENC_INDEX(enc) == UTF_16_ENC)
- && state == XML_CONTENT_STATE)
- break;
- *encPtr = encodingTable[UTF_16LE_ENC];
- return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
- case 0xFFFE:
- if (INIT_ENC_INDEX(enc) == ISO_8859_1_ENC
- && state == XML_CONTENT_STATE)
- break;
- *nextTokPtr = ptr + 2;
- *encPtr = encodingTable[UTF_16LE_ENC];
- return XML_TOK_BOM;
- case 0xEFBB:
- /* Maybe a UTF-8 BOM (EF BB BF) */
- /* If there's an explicitly specified (external) encoding
- of ISO-8859-1 or some flavour of UTF-16
- and this is an external text entity,
- don't look for the BOM,
- because it might be a legal data.
- */
- if (state == XML_CONTENT_STATE) {
- int e = INIT_ENC_INDEX(enc);
- if (e == ISO_8859_1_ENC || e == UTF_16BE_ENC
- || e == UTF_16LE_ENC || e == UTF_16_ENC)
- break;
- }
- if (ptr + 2 == end)
- return XML_TOK_PARTIAL;
- if ((unsigned char)ptr[2] == 0xBF) {
- *nextTokPtr = ptr + 3;
- *encPtr = encodingTable[UTF_8_ENC];
- return XML_TOK_BOM;
- }
- break;
- default:
- if (ptr[0] == '\0') {
- /* 0 isn't a legal data character. Furthermore a document
- entity can only start with ASCII characters. So the only
- way this can fail to be big-endian UTF-16 if it it's an
- external parsed general entity that's labelled as
- UTF-16LE.
- */
- if (state == XML_CONTENT_STATE && INIT_ENC_INDEX(enc) == UTF_16LE_ENC)
- break;
- *encPtr = encodingTable[UTF_16BE_ENC];
- return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
- }
- else if (ptr[1] == '\0') {
- /* We could recover here in the case:
- - parsing an external entity
- - second byte is 0
- - no externally specified encoding
- - no encoding declaration
- by assuming UTF-16LE. But we don't, because this would mean when
- presented just with a single byte, we couldn't reliably determine
- whether we needed further bytes.
- */
- if (state == XML_CONTENT_STATE)
- break;
- *encPtr = encodingTable[UTF_16LE_ENC];
- return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
- }
- break;
- }
- }
- *encPtr = encodingTable[INIT_ENC_INDEX(enc)];
- return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
+ /* so we're parsing an external text entity... */
+ /* if UTF-16 was externally specified, then we need at least 2 bytes */
+ switch (INIT_ENC_INDEX(enc)) {
+ case UTF_16_ENC:
+ case UTF_16LE_ENC:
+ case UTF_16BE_ENC:
+ return XML_TOK_PARTIAL;
+ }
+ switch ((unsigned char)*ptr) {
+ case 0xFE:
+ case 0xFF:
+ case 0xEF: /* possibly first byte of UTF-8 BOM */
+ if (INIT_ENC_INDEX(enc) == ISO_8859_1_ENC
+ && state == XML_CONTENT_STATE)
+ break;
+ /* fall through */
+ case 0x00:
+ case 0x3C:
+ return XML_TOK_PARTIAL;
+ }
+ }
+ else {
+ switch (((unsigned char)ptr[0] << 8) | (unsigned char)ptr[1]) {
+ case 0xFEFF:
+ if (INIT_ENC_INDEX(enc) == ISO_8859_1_ENC
+ && state == XML_CONTENT_STATE)
+ break;
+ *nextTokPtr = ptr + 2;
+ *encPtr = encodingTable[UTF_16BE_ENC];
+ return XML_TOK_BOM;
+ /* 00 3C is handled in the default case */
+ case 0x3C00:
+ if ((INIT_ENC_INDEX(enc) == UTF_16BE_ENC
+ || INIT_ENC_INDEX(enc) == UTF_16_ENC)
+ && state == XML_CONTENT_STATE)
+ break;
+ *encPtr = encodingTable[UTF_16LE_ENC];
+ return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
+ case 0xFFFE:
+ if (INIT_ENC_INDEX(enc) == ISO_8859_1_ENC
+ && state == XML_CONTENT_STATE)
+ break;
+ *nextTokPtr = ptr + 2;
+ *encPtr = encodingTable[UTF_16LE_ENC];
+ return XML_TOK_BOM;
+ case 0xEFBB:
+ /* Maybe a UTF-8 BOM (EF BB BF) */
+ /* If there's an explicitly specified (external) encoding
+ of ISO-8859-1 or some flavour of UTF-16
+ and this is an external text entity,
+ don't look for the BOM,
+ because it might be a legal data.
+ */
+ if (state == XML_CONTENT_STATE) {
+ int e = INIT_ENC_INDEX(enc);
+ if (e == ISO_8859_1_ENC || e == UTF_16BE_ENC
+ || e == UTF_16LE_ENC || e == UTF_16_ENC)
+ break;
+ }
+ if (ptr + 2 == end)
+ return XML_TOK_PARTIAL;
+ if ((unsigned char)ptr[2] == 0xBF) {
+ *nextTokPtr = ptr + 3;
+ *encPtr = encodingTable[UTF_8_ENC];
+ return XML_TOK_BOM;
+ }
+ break;
+ default:
+ if (ptr[0] == '\0') {
+ /* 0 isn't a legal data character. Furthermore a document
+ entity can only start with ASCII characters. So the only
+ way this can fail to be big-endian UTF-16 if it it's an
+ external parsed general entity that's labelled as
+ UTF-16LE.
+ */
+ if (state == XML_CONTENT_STATE && INIT_ENC_INDEX(enc) == UTF_16LE_ENC)
+ break;
+ *encPtr = encodingTable[UTF_16BE_ENC];
+ return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
+ }
+ else if (ptr[1] == '\0') {
+ /* We could recover here in the case:
+ - parsing an external entity
+ - second byte is 0
+ - no externally specified encoding
+ - no encoding declaration
+ by assuming UTF-16LE. But we don't, because this would mean when
+ presented just with a single byte, we couldn't reliably determine
+ whether we needed further bytes.
+ */
+ if (state == XML_CONTENT_STATE)
+ break;
+ *encPtr = encodingTable[UTF_16LE_ENC];
+ return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
+ }
+ break;
+ }
+ }
+ *encPtr = encodingTable[INIT_ENC_INDEX(enc)];
+ return XmlTok(*encPtr, state, ptr, end, nextTokPtr);
}
@@ -1626,14 +1626,14 @@ initScan(const ENCODING * const *encodingTable,
ENCODING *
XmlInitUnknownEncodingNS(void *mem,
- int *table,
- CONVERTER convert,
- void *userData)
+ int *table,
+ CONVERTER convert,
+ void *userData)
{
- ENCODING *enc = XmlInitUnknownEncoding(mem, table, convert, userData);
- if (enc)
- ((struct normal_encoding *)enc)->type[ASCII_COLON] = BT_COLON;
- return enc;
+ ENCODING *enc = XmlInitUnknownEncoding(mem, table, convert, userData);
+ if (enc)
+ ((struct normal_encoding *)enc)->type[ASCII_COLON] = BT_COLON;
+ return enc;
}
#endif /* XML_NS */
diff --git a/src/lib/expat/xmltok.h b/src/lib/expat/xmltok.h
index ca867aa6b42..8e50406bddc 100644
--- a/src/lib/expat/xmltok.h
+++ b/src/lib/expat/xmltok.h
@@ -110,67 +110,67 @@ extern "C" {
#define XML_UTF16_ENCODE_MAX 2
typedef struct position {
- /* first line and first column are 0 not 1 */
- XML_Size lineNumber;
- XML_Size columnNumber;
+ /* first line and first column are 0 not 1 */
+ XML_Size lineNumber;
+ XML_Size columnNumber;
} POSITION;
typedef struct {
- const char *name;
- const char *valuePtr;
- const char *valueEnd;
- char normalized;
+ const char *name;
+ const char *valuePtr;
+ const char *valueEnd;
+ char normalized;
} ATTRIBUTE;
struct encoding;
typedef struct encoding ENCODING;
typedef int (PTRCALL *SCANNER)(const ENCODING *,
- const char *,
- const char *,
- const char **);
+ const char *,
+ const char *,
+ const char **);
struct encoding {
- SCANNER scanners[XML_N_STATES];
- SCANNER literalScanners[XML_N_LITERAL_TYPES];
- int (PTRCALL *sameName)(const ENCODING *,
- const char *,
- const char *);
- int (PTRCALL *nameMatchesAscii)(const ENCODING *,
- const char *,
- const char *,
- const char *);
- int (PTRFASTCALL *nameLength)(const ENCODING *, const char *);
- const char *(PTRFASTCALL *skipS)(const ENCODING *, const char *);
- int (PTRCALL *getAtts)(const ENCODING *enc,
- const char *ptr,
- int attsMax,
- ATTRIBUTE *atts);
- int (PTRFASTCALL *charRefNumber)(const ENCODING *enc, const char *ptr);
- int (PTRCALL *predefinedEntityName)(const ENCODING *,
- const char *,
- const char *);
- void (PTRCALL *updatePosition)(const ENCODING *,
- const char *ptr,
- const char *end,
- POSITION *);
- int (PTRCALL *isPublicId)(const ENCODING *enc,
- const char *ptr,
- const char *end,
- const char **badPtr);
- void (PTRCALL *utf8Convert)(const ENCODING *enc,
- const char **fromP,
- const char *fromLim,
- char **toP,
- const char *toLim);
- void (PTRCALL *utf16Convert)(const ENCODING *enc,
- const char **fromP,
- const char *fromLim,
- unsigned short **toP,
- const unsigned short *toLim);
- int minBytesPerChar;
- char isUtf8;
- char isUtf16;
+ SCANNER scanners[XML_N_STATES];
+ SCANNER literalScanners[XML_N_LITERAL_TYPES];
+ int (PTRCALL *sameName)(const ENCODING *,
+ const char *,
+ const char *);
+ int (PTRCALL *nameMatchesAscii)(const ENCODING *,
+ const char *,
+ const char *,
+ const char *);
+ int (PTRFASTCALL *nameLength)(const ENCODING *, const char *);
+ const char *(PTRFASTCALL *skipS)(const ENCODING *, const char *);
+ int (PTRCALL *getAtts)(const ENCODING *enc,
+ const char *ptr,
+ int attsMax,
+ ATTRIBUTE *atts);
+ int (PTRFASTCALL *charRefNumber)(const ENCODING *enc, const char *ptr);
+ int (PTRCALL *predefinedEntityName)(const ENCODING *,
+ const char *,
+ const char *);
+ void (PTRCALL *updatePosition)(const ENCODING *,
+ const char *ptr,
+ const char *end,
+ POSITION *);
+ int (PTRCALL *isPublicId)(const ENCODING *enc,
+ const char *ptr,
+ const char *end,
+ const char **badPtr);
+ void (PTRCALL *utf8Convert)(const ENCODING *enc,
+ const char **fromP,
+ const char *fromLim,
+ char **toP,
+ const char *toLim);
+ void (PTRCALL *utf16Convert)(const ENCODING *enc,
+ const char **fromP,
+ const char *fromLim,
+ unsigned short **toP,
+ const unsigned short *toLim);
+ int minBytesPerChar;
+ char isUtf8;
+ char isUtf16;
};
/* Scan the string starting at ptr until the end of the next complete
@@ -196,21 +196,21 @@ struct encoding {
#define XmlTok(enc, state, ptr, end, nextTokPtr) \
- (((enc)->scanners[state])(enc, ptr, end, nextTokPtr))
+ (((enc)->scanners[state])(enc, ptr, end, nextTokPtr))
#define XmlPrologTok(enc, ptr, end, nextTokPtr) \
- XmlTok(enc, XML_PROLOG_STATE, ptr, end, nextTokPtr)
+ XmlTok(enc, XML_PROLOG_STATE, ptr, end, nextTokPtr)
#define XmlContentTok(enc, ptr, end, nextTokPtr) \
- XmlTok(enc, XML_CONTENT_STATE, ptr, end, nextTokPtr)
+ XmlTok(enc, XML_CONTENT_STATE, ptr, end, nextTokPtr)
#define XmlCdataSectionTok(enc, ptr, end, nextTokPtr) \
- XmlTok(enc, XML_CDATA_SECTION_STATE, ptr, end, nextTokPtr)
+ XmlTok(enc, XML_CDATA_SECTION_STATE, ptr, end, nextTokPtr)
#ifdef XML_DTD
#define XmlIgnoreSectionTok(enc, ptr, end, nextTokPtr) \
- XmlTok(enc, XML_IGNORE_SECTION_STATE, ptr, end, nextTokPtr)
+ XmlTok(enc, XML_IGNORE_SECTION_STATE, ptr, end, nextTokPtr)
#endif /* XML_DTD */
@@ -218,61 +218,61 @@ struct encoding {
of a literal that has already been returned by XmlTok.
*/
#define XmlLiteralTok(enc, literalType, ptr, end, nextTokPtr) \
- (((enc)->literalScanners[literalType])(enc, ptr, end, nextTokPtr))
+ (((enc)->literalScanners[literalType])(enc, ptr, end, nextTokPtr))
#define XmlAttributeValueTok(enc, ptr, end, nextTokPtr) \
- XmlLiteralTok(enc, XML_ATTRIBUTE_VALUE_LITERAL, ptr, end, nextTokPtr)
+ XmlLiteralTok(enc, XML_ATTRIBUTE_VALUE_LITERAL, ptr, end, nextTokPtr)
#define XmlEntityValueTok(enc, ptr, end, nextTokPtr) \
- XmlLiteralTok(enc, XML_ENTITY_VALUE_LITERAL, ptr, end, nextTokPtr)
+ XmlLiteralTok(enc, XML_ENTITY_VALUE_LITERAL, ptr, end, nextTokPtr)
#define XmlSameName(enc, ptr1, ptr2) (((enc)->sameName)(enc, ptr1, ptr2))
#define XmlNameMatchesAscii(enc, ptr1, end1, ptr2) \
- (((enc)->nameMatchesAscii)(enc, ptr1, end1, ptr2))
+ (((enc)->nameMatchesAscii)(enc, ptr1, end1, ptr2))
#define XmlNameLength(enc, ptr) \
- (((enc)->nameLength)(enc, ptr))
+ (((enc)->nameLength)(enc, ptr))
#define XmlSkipS(enc, ptr) \
- (((enc)->skipS)(enc, ptr))
+ (((enc)->skipS)(enc, ptr))
#define XmlGetAttributes(enc, ptr, attsMax, atts) \
- (((enc)->getAtts)(enc, ptr, attsMax, atts))
+ (((enc)->getAtts)(enc, ptr, attsMax, atts))
#define XmlCharRefNumber(enc, ptr) \
- (((enc)->charRefNumber)(enc, ptr))
+ (((enc)->charRefNumber)(enc, ptr))
#define XmlPredefinedEntityName(enc, ptr, end) \
- (((enc)->predefinedEntityName)(enc, ptr, end))
+ (((enc)->predefinedEntityName)(enc, ptr, end))
#define XmlUpdatePosition(enc, ptr, end, pos) \
- (((enc)->updatePosition)(enc, ptr, end, pos))
+ (((enc)->updatePosition)(enc, ptr, end, pos))
#define XmlIsPublicId(enc, ptr, end, badPtr) \
- (((enc)->isPublicId)(enc, ptr, end, badPtr))
+ (((enc)->isPublicId)(enc, ptr, end, badPtr))
#define XmlUtf8Convert(enc, fromP, fromLim, toP, toLim) \
- (((enc)->utf8Convert)(enc, fromP, fromLim, toP, toLim))
+ (((enc)->utf8Convert)(enc, fromP, fromLim, toP, toLim))
#define XmlUtf16Convert(enc, fromP, fromLim, toP, toLim) \
- (((enc)->utf16Convert)(enc, fromP, fromLim, toP, toLim))
+ (((enc)->utf16Convert)(enc, fromP, fromLim, toP, toLim))
typedef struct {
- ENCODING initEnc;
- const ENCODING **encPtr;
+ ENCODING initEnc;
+ const ENCODING **encPtr;
} INIT_ENCODING;
int XmlParseXmlDecl(int isGeneralTextEntity,
- const ENCODING *enc,
- const char *ptr,
- const char *end,
- const char **badPtr,
- const char **versionPtr,
- const char **versionEndPtr,
- const char **encodingNamePtr,
- const ENCODING **namedEncodingPtr,
- int *standalonePtr);
+ const ENCODING *enc,
+ const char *ptr,
+ const char *end,
+ const char **badPtr,
+ const char **versionPtr,
+ const char **versionEndPtr,
+ const char **encodingNamePtr,
+ const ENCODING **namedEncodingPtr,
+ int *standalonePtr);
int XmlInitEncoding(INIT_ENCODING *, const ENCODING **, const char *name);
const ENCODING *XmlGetUtf8InternalEncoding(void);
@@ -286,29 +286,29 @@ typedef int (XMLCALL *CONVERTER) (void *userData, const char *p);
ENCODING *
XmlInitUnknownEncoding(void *mem,
- int *table,
- CONVERTER convert,
- void *userData);
+ int *table,
+ CONVERTER convert,
+ void *userData);
int XmlParseXmlDeclNS(int isGeneralTextEntity,
- const ENCODING *enc,
- const char *ptr,
- const char *end,
- const char **badPtr,
- const char **versionPtr,
- const char **versionEndPtr,
- const char **encodingNamePtr,
- const ENCODING **namedEncodingPtr,
- int *standalonePtr);
+ const ENCODING *enc,
+ const char *ptr,
+ const char *end,
+ const char **badPtr,
+ const char **versionPtr,
+ const char **versionEndPtr,
+ const char **encodingNamePtr,
+ const ENCODING **namedEncodingPtr,
+ int *standalonePtr);
int XmlInitEncodingNS(INIT_ENCODING *, const ENCODING **, const char *name);
const ENCODING *XmlGetUtf8InternalEncodingNS(void);
const ENCODING *XmlGetUtf16InternalEncodingNS(void);
ENCODING *
XmlInitUnknownEncodingNS(void *mem,
- int *table,
- CONVERTER convert,
- void *userData);
+ int *table,
+ CONVERTER convert,
+ void *userData);
#ifdef __cplusplus
}
#endif
diff --git a/src/lib/expat/xmltok_impl.c b/src/lib/expat/xmltok_impl.c
index 9c2895b8773..8223c68d67b 100644
--- a/src/lib/expat/xmltok_impl.c
+++ b/src/lib/expat/xmltok_impl.c
@@ -10,78 +10,78 @@
#endif
#define INVALID_LEAD_CASE(n, ptr, nextTokPtr) \
- case BT_LEAD ## n: \
- if (end - ptr < n) \
- return XML_TOK_PARTIAL_CHAR; \
- if (IS_INVALID_CHAR(enc, ptr, n)) { \
- *(nextTokPtr) = (ptr); \
- return XML_TOK_INVALID; \
- } \
- ptr += n; \
- break;
+ case BT_LEAD ## n: \
+ if (end - ptr < n) \
+ return XML_TOK_PARTIAL_CHAR; \
+ if (IS_INVALID_CHAR(enc, ptr, n)) { \
+ *(nextTokPtr) = (ptr); \
+ return XML_TOK_INVALID; \
+ } \
+ ptr += n; \
+ break;
#define INVALID_CASES(ptr, nextTokPtr) \
- INVALID_LEAD_CASE(2, ptr, nextTokPtr) \
- INVALID_LEAD_CASE(3, ptr, nextTokPtr) \
- INVALID_LEAD_CASE(4, ptr, nextTokPtr) \
- case BT_NONXML: \
- case BT_MALFORM: \
- case BT_TRAIL: \
- *(nextTokPtr) = (ptr); \
- return XML_TOK_INVALID;
+ INVALID_LEAD_CASE(2, ptr, nextTokPtr) \
+ INVALID_LEAD_CASE(3, ptr, nextTokPtr) \
+ INVALID_LEAD_CASE(4, ptr, nextTokPtr) \
+ case BT_NONXML: \
+ case BT_MALFORM: \
+ case BT_TRAIL: \
+ *(nextTokPtr) = (ptr); \
+ return XML_TOK_INVALID;
#define CHECK_NAME_CASE(n, enc, ptr, end, nextTokPtr) \
- case BT_LEAD ## n: \
- if (end - ptr < n) \
- return XML_TOK_PARTIAL_CHAR; \
- if (!IS_NAME_CHAR(enc, ptr, n)) { \
- *nextTokPtr = ptr; \
- return XML_TOK_INVALID; \
- } \
- ptr += n; \
- break;
+ case BT_LEAD ## n: \
+ if (end - ptr < n) \
+ return XML_TOK_PARTIAL_CHAR; \
+ if (!IS_NAME_CHAR(enc, ptr, n)) { \
+ *nextTokPtr = ptr; \
+ return XML_TOK_INVALID; \
+ } \
+ ptr += n; \
+ break;
#define CHECK_NAME_CASES(enc, ptr, end, nextTokPtr) \
- case BT_NONASCII: \
- if (!IS_NAME_CHAR_MINBPC(enc, ptr)) { \
- *nextTokPtr = ptr; \
- return XML_TOK_INVALID; \
- } \
- case BT_NMSTRT: \
- case BT_HEX: \
- case BT_DIGIT: \
- case BT_NAME: \
- case BT_MINUS: \
- ptr += MINBPC(enc); \
- break; \
- CHECK_NAME_CASE(2, enc, ptr, end, nextTokPtr) \
- CHECK_NAME_CASE(3, enc, ptr, end, nextTokPtr) \
- CHECK_NAME_CASE(4, enc, ptr, end, nextTokPtr)
+ case BT_NONASCII: \
+ if (!IS_NAME_CHAR_MINBPC(enc, ptr)) { \
+ *nextTokPtr = ptr; \
+ return XML_TOK_INVALID; \
+ } \
+ case BT_NMSTRT: \
+ case BT_HEX: \
+ case BT_DIGIT: \
+ case BT_NAME: \
+ case BT_MINUS: \
+ ptr += MINBPC(enc); \
+ break; \
+ CHECK_NAME_CASE(2, enc, ptr, end, nextTokPtr) \
+ CHECK_NAME_CASE(3, enc, ptr, end, nextTokPtr) \
+ CHECK_NAME_CASE(4, enc, ptr, end, nextTokPtr)
#define CHECK_NMSTRT_CASE(n, enc, ptr, end, nextTokPtr) \
- case BT_LEAD ## n: \
- if (end - ptr < n) \
- return XML_TOK_PARTIAL_CHAR; \
- if (!IS_NMSTRT_CHAR(enc, ptr, n)) { \
- *nextTokPtr = ptr; \
- return XML_TOK_INVALID; \
- } \
- ptr += n; \
- break;
+ case BT_LEAD ## n: \
+ if (end - ptr < n) \
+ return XML_TOK_PARTIAL_CHAR; \
+ if (!IS_NMSTRT_CHAR(enc, ptr, n)) { \
+ *nextTokPtr = ptr; \
+ return XML_TOK_INVALID; \
+ } \
+ ptr += n; \
+ break;
#define CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr) \
- case BT_NONASCII: \
- if (!IS_NMSTRT_CHAR_MINBPC(enc, ptr)) { \
- *nextTokPtr = ptr; \
- return XML_TOK_INVALID; \
- } \
- case BT_NMSTRT: \
- case BT_HEX: \
- ptr += MINBPC(enc); \
- break; \
- CHECK_NMSTRT_CASE(2, enc, ptr, end, nextTokPtr) \
- CHECK_NMSTRT_CASE(3, enc, ptr, end, nextTokPtr) \
- CHECK_NMSTRT_CASE(4, enc, ptr, end, nextTokPtr)
+ case BT_NONASCII: \
+ if (!IS_NMSTRT_CHAR_MINBPC(enc, ptr)) { \
+ *nextTokPtr = ptr; \
+ return XML_TOK_INVALID; \
+ } \
+ case BT_NMSTRT: \
+ case BT_HEX: \
+ ptr += MINBPC(enc); \
+ break; \
+ CHECK_NMSTRT_CASE(2, enc, ptr, end, nextTokPtr) \
+ CHECK_NMSTRT_CASE(3, enc, ptr, end, nextTokPtr) \
+ CHECK_NMSTRT_CASE(4, enc, ptr, end, nextTokPtr)
#ifndef PREFIX
#define PREFIX(ident) ident
@@ -91,1335 +91,1335 @@
static int PTRCALL
PREFIX(scanComment)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- if (ptr != end) {
- if (!CHAR_MATCHES(enc, ptr, ASCII_MINUS)) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- ptr += MINBPC(enc);
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- INVALID_CASES(ptr, nextTokPtr)
- case BT_MINUS:
- if ((ptr += MINBPC(enc)) == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr, ASCII_MINUS)) {
- if ((ptr += MINBPC(enc)) == end)
- return XML_TOK_PARTIAL;
- if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_COMMENT;
- }
- break;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- }
- return XML_TOK_PARTIAL;
+ if (ptr != end) {
+ if (!CHAR_MATCHES(enc, ptr, ASCII_MINUS)) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ ptr += MINBPC(enc);
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ INVALID_CASES(ptr, nextTokPtr)
+ case BT_MINUS:
+ if ((ptr += MINBPC(enc)) == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr, ASCII_MINUS)) {
+ if ((ptr += MINBPC(enc)) == end)
+ return XML_TOK_PARTIAL;
+ if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_COMMENT;
+ }
+ break;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ }
+ return XML_TOK_PARTIAL;
}
/* ptr points to character following "<!" */
static int PTRCALL
PREFIX(scanDecl)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_MINUS:
- return PREFIX(scanComment)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_LSQB:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_COND_SECT_OPEN;
- case BT_NMSTRT:
- case BT_HEX:
- ptr += MINBPC(enc);
- break;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_PERCNT:
- if (ptr + MINBPC(enc) == end)
- return XML_TOK_PARTIAL;
- /* don't allow <!ENTITY% foo "whatever"> */
- switch (BYTE_TYPE(enc, ptr + MINBPC(enc))) {
- case BT_S: case BT_CR: case BT_LF: case BT_PERCNT:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- /* fall through */
- case BT_S: case BT_CR: case BT_LF:
- *nextTokPtr = ptr;
- return XML_TOK_DECL_OPEN;
- case BT_NMSTRT:
- case BT_HEX:
- ptr += MINBPC(enc);
- break;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_MINUS:
+ return PREFIX(scanComment)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_LSQB:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_COND_SECT_OPEN;
+ case BT_NMSTRT:
+ case BT_HEX:
+ ptr += MINBPC(enc);
+ break;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_PERCNT:
+ if (ptr + MINBPC(enc) == end)
+ return XML_TOK_PARTIAL;
+ /* don't allow <!ENTITY% foo "whatever"> */
+ switch (BYTE_TYPE(enc, ptr + MINBPC(enc))) {
+ case BT_S: case BT_CR: case BT_LF: case BT_PERCNT:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ /* fall through */
+ case BT_S: case BT_CR: case BT_LF:
+ *nextTokPtr = ptr;
+ return XML_TOK_DECL_OPEN;
+ case BT_NMSTRT:
+ case BT_HEX:
+ ptr += MINBPC(enc);
+ break;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
static int PTRCALL
PREFIX(checkPiTarget)(const ENCODING *enc, const char *ptr,
- const char *end, int *tokPtr)
+ const char *end, int *tokPtr)
{
- int upper = 0;
- *tokPtr = XML_TOK_PI;
- if (end - ptr != MINBPC(enc)*3)
- return 1;
- switch (BYTE_TO_ASCII(enc, ptr)) {
- case ASCII_x:
- break;
- case ASCII_X:
- upper = 1;
- break;
- default:
- return 1;
- }
- ptr += MINBPC(enc);
- switch (BYTE_TO_ASCII(enc, ptr)) {
- case ASCII_m:
- break;
- case ASCII_M:
- upper = 1;
- break;
- default:
- return 1;
- }
- ptr += MINBPC(enc);
- switch (BYTE_TO_ASCII(enc, ptr)) {
- case ASCII_l:
- break;
- case ASCII_L:
- upper = 1;
- break;
- default:
- return 1;
- }
- if (upper)
- return 0;
- *tokPtr = XML_TOK_XML_DECL;
- return 1;
+ int upper = 0;
+ *tokPtr = XML_TOK_PI;
+ if (end - ptr != MINBPC(enc)*3)
+ return 1;
+ switch (BYTE_TO_ASCII(enc, ptr)) {
+ case ASCII_x:
+ break;
+ case ASCII_X:
+ upper = 1;
+ break;
+ default:
+ return 1;
+ }
+ ptr += MINBPC(enc);
+ switch (BYTE_TO_ASCII(enc, ptr)) {
+ case ASCII_m:
+ break;
+ case ASCII_M:
+ upper = 1;
+ break;
+ default:
+ return 1;
+ }
+ ptr += MINBPC(enc);
+ switch (BYTE_TO_ASCII(enc, ptr)) {
+ case ASCII_l:
+ break;
+ case ASCII_L:
+ upper = 1;
+ break;
+ default:
+ return 1;
+ }
+ if (upper)
+ return 0;
+ *tokPtr = XML_TOK_XML_DECL;
+ return 1;
}
/* ptr points to character following "<?" */
static int PTRCALL
PREFIX(scanPi)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- int tok;
- const char *target = ptr;
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
- case BT_S: case BT_CR: case BT_LF:
- if (!PREFIX(checkPiTarget)(enc, target, ptr, &tok)) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- ptr += MINBPC(enc);
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- INVALID_CASES(ptr, nextTokPtr)
- case BT_QUEST:
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- *nextTokPtr = ptr + MINBPC(enc);
- return tok;
- }
- break;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- return XML_TOK_PARTIAL;
- case BT_QUEST:
- if (!PREFIX(checkPiTarget)(enc, target, ptr, &tok)) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- *nextTokPtr = ptr + MINBPC(enc);
- return tok;
- }
- /* fall through */
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ int tok;
+ const char *target = ptr;
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ case BT_S: case BT_CR: case BT_LF:
+ if (!PREFIX(checkPiTarget)(enc, target, ptr, &tok)) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ ptr += MINBPC(enc);
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ INVALID_CASES(ptr, nextTokPtr)
+ case BT_QUEST:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ *nextTokPtr = ptr + MINBPC(enc);
+ return tok;
+ }
+ break;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ return XML_TOK_PARTIAL;
+ case BT_QUEST:
+ if (!PREFIX(checkPiTarget)(enc, target, ptr, &tok)) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ *nextTokPtr = ptr + MINBPC(enc);
+ return tok;
+ }
+ /* fall through */
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
static int PTRCALL
PREFIX(scanCdataSection)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- static const char CDATA_LSQB[] = { ASCII_C, ASCII_D, ASCII_A,
- ASCII_T, ASCII_A, ASCII_LSQB };
- int i;
- /* CDATA[ */
- if (end - ptr < 6 * MINBPC(enc))
- return XML_TOK_PARTIAL;
- for (i = 0; i < 6; i++, ptr += MINBPC(enc)) {
- if (!CHAR_MATCHES(enc, ptr, CDATA_LSQB[i])) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- *nextTokPtr = ptr;
- return XML_TOK_CDATA_SECT_OPEN;
+ static const char CDATA_LSQB[] = { ASCII_C, ASCII_D, ASCII_A,
+ ASCII_T, ASCII_A, ASCII_LSQB };
+ int i;
+ /* CDATA[ */
+ if (end - ptr < 6 * MINBPC(enc))
+ return XML_TOK_PARTIAL;
+ for (i = 0; i < 6; i++, ptr += MINBPC(enc)) {
+ if (!CHAR_MATCHES(enc, ptr, CDATA_LSQB[i])) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_CDATA_SECT_OPEN;
}
static int PTRCALL
PREFIX(cdataSectionTok)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- if (ptr == end)
- return XML_TOK_NONE;
- if (MINBPC(enc) > 1) {
- size_t n = end - ptr;
- if (n & (MINBPC(enc) - 1)) {
- n &= ~(MINBPC(enc) - 1);
- if (n == 0)
- return XML_TOK_PARTIAL;
- end = ptr + n;
- }
- }
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_RSQB:
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- if (!CHAR_MATCHES(enc, ptr, ASCII_RSQB))
- break;
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- ptr -= MINBPC(enc);
- break;
- }
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_CDATA_SECT_CLOSE;
- case BT_CR:
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- if (BYTE_TYPE(enc, ptr) == BT_LF)
- ptr += MINBPC(enc);
- *nextTokPtr = ptr;
- return XML_TOK_DATA_NEWLINE;
- case BT_LF:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_DATA_NEWLINE;
- INVALID_CASES(ptr, nextTokPtr)
- default:
- ptr += MINBPC(enc);
- break;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
+ if (ptr == end)
+ return XML_TOK_NONE;
+ if (MINBPC(enc) > 1) {
+ size_t n = end - ptr;
+ if (n & (MINBPC(enc) - 1)) {
+ n &= ~(MINBPC(enc) - 1);
+ if (n == 0)
+ return XML_TOK_PARTIAL;
+ end = ptr + n;
+ }
+ }
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_RSQB:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ if (!CHAR_MATCHES(enc, ptr, ASCII_RSQB))
+ break;
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ ptr -= MINBPC(enc);
+ break;
+ }
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_CDATA_SECT_CLOSE;
+ case BT_CR:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ if (BYTE_TYPE(enc, ptr) == BT_LF)
+ ptr += MINBPC(enc);
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_NEWLINE;
+ case BT_LF:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_DATA_NEWLINE;
+ INVALID_CASES(ptr, nextTokPtr)
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
#define LEAD_CASE(n) \
- case BT_LEAD ## n: \
- if (end - ptr < n || IS_INVALID_CHAR(enc, ptr, n)) { \
- *nextTokPtr = ptr; \
- return XML_TOK_DATA_CHARS; \
- } \
- ptr += n; \
- break;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: \
+ if (end - ptr < n || IS_INVALID_CHAR(enc, ptr, n)) { \
+ *nextTokPtr = ptr; \
+ return XML_TOK_DATA_CHARS; \
+ } \
+ ptr += n; \
+ break;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_NONXML:
- case BT_MALFORM:
- case BT_TRAIL:
- case BT_CR:
- case BT_LF:
- case BT_RSQB:
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
+ case BT_NONXML:
+ case BT_MALFORM:
+ case BT_TRAIL:
+ case BT_CR:
+ case BT_LF:
+ case BT_RSQB:
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
}
/* ptr points to character following "</" */
static int PTRCALL
PREFIX(scanEndTag)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
- case BT_S: case BT_CR: case BT_LF:
- for (ptr += MINBPC(enc); ptr != end; ptr += MINBPC(enc)) {
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_S: case BT_CR: case BT_LF:
- break;
- case BT_GT:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_END_TAG;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ case BT_S: case BT_CR: case BT_LF:
+ for (ptr += MINBPC(enc); ptr != end; ptr += MINBPC(enc)) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_S: case BT_CR: case BT_LF:
+ break;
+ case BT_GT:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_END_TAG;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
#ifdef XML_NS
- case BT_COLON:
- /* no need to check qname syntax here,
- since end-tag must match exactly */
- ptr += MINBPC(enc);
- break;
+ case BT_COLON:
+ /* no need to check qname syntax here,
+ since end-tag must match exactly */
+ ptr += MINBPC(enc);
+ break;
#endif
- case BT_GT:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_END_TAG;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ case BT_GT:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_END_TAG;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
/* ptr points to character following "&#X" */
static int PTRCALL
PREFIX(scanHexCharRef)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- if (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_DIGIT:
- case BT_HEX:
- break;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- for (ptr += MINBPC(enc); ptr != end; ptr += MINBPC(enc)) {
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_DIGIT:
- case BT_HEX:
- break;
- case BT_SEMI:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_CHAR_REF;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- }
- return XML_TOK_PARTIAL;
+ if (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_DIGIT:
+ case BT_HEX:
+ break;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ for (ptr += MINBPC(enc); ptr != end; ptr += MINBPC(enc)) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_DIGIT:
+ case BT_HEX:
+ break;
+ case BT_SEMI:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_CHAR_REF;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ }
+ return XML_TOK_PARTIAL;
}
/* ptr points to character following "&#" */
static int PTRCALL
PREFIX(scanCharRef)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- if (ptr != end) {
- if (CHAR_MATCHES(enc, ptr, ASCII_x))
- return PREFIX(scanHexCharRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_DIGIT:
- break;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- for (ptr += MINBPC(enc); ptr != end; ptr += MINBPC(enc)) {
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_DIGIT:
- break;
- case BT_SEMI:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_CHAR_REF;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- }
- return XML_TOK_PARTIAL;
+ if (ptr != end) {
+ if (CHAR_MATCHES(enc, ptr, ASCII_x))
+ return PREFIX(scanHexCharRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_DIGIT:
+ break;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ for (ptr += MINBPC(enc); ptr != end; ptr += MINBPC(enc)) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_DIGIT:
+ break;
+ case BT_SEMI:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_CHAR_REF;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ }
+ return XML_TOK_PARTIAL;
}
/* ptr points to character following "&" */
static int PTRCALL
PREFIX(scanRef)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- case BT_NUM:
- return PREFIX(scanCharRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
- case BT_SEMI:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_ENTITY_REF;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ case BT_NUM:
+ return PREFIX(scanCharRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ case BT_SEMI:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_ENTITY_REF;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
/* ptr points to character following first character of attribute name */
static int PTRCALL
PREFIX(scanAtts)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
#ifdef XML_NS
- int hadColon = 0;
+ int hadColon = 0;
#endif
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
#ifdef XML_NS
- case BT_COLON:
- if (hadColon) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- hadColon = 1;
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- break;
+ case BT_COLON:
+ if (hadColon) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ hadColon = 1;
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ break;
#endif
- case BT_S: case BT_CR: case BT_LF:
- for (;;) {
- int t;
+ case BT_S: case BT_CR: case BT_LF:
+ for (;;) {
+ int t;
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- t = BYTE_TYPE(enc, ptr);
- if (t == BT_EQUALS)
- break;
- switch (t) {
- case BT_S:
- case BT_LF:
- case BT_CR:
- break;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- /* fall through */
- case BT_EQUALS:
- {
- int open;
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ t = BYTE_TYPE(enc, ptr);
+ if (t == BT_EQUALS)
+ break;
+ switch (t) {
+ case BT_S:
+ case BT_LF:
+ case BT_CR:
+ break;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ /* fall through */
+ case BT_EQUALS:
+ {
+ int open;
#ifdef XML_NS
- hadColon = 0;
+ hadColon = 0;
#endif
- for (;;) {
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- open = BYTE_TYPE(enc, ptr);
- if (open == BT_QUOT || open == BT_APOS)
- break;
- switch (open) {
- case BT_S:
- case BT_LF:
- case BT_CR:
- break;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- ptr += MINBPC(enc);
- /* in attribute value */
- for (;;) {
- int t;
- if (ptr == end)
- return XML_TOK_PARTIAL;
- t = BYTE_TYPE(enc, ptr);
- if (t == open)
- break;
- switch (t) {
- INVALID_CASES(ptr, nextTokPtr)
- case BT_AMP:
- {
- int tok = PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, &ptr);
- if (tok <= 0) {
- if (tok == XML_TOK_INVALID)
- *nextTokPtr = ptr;
- return tok;
- }
- break;
- }
- case BT_LT:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_S:
- case BT_CR:
- case BT_LF:
- break;
- case BT_SOL:
- goto sol;
- case BT_GT:
- goto gt;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- /* ptr points to closing quote */
- for (;;) {
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- case BT_S: case BT_CR: case BT_LF:
- continue;
- case BT_GT:
- gt:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_START_TAG_WITH_ATTS;
- case BT_SOL:
- sol:
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_EMPTY_ELEMENT_WITH_ATTS;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- break;
- }
- break;
- }
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ for (;;) {
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ open = BYTE_TYPE(enc, ptr);
+ if (open == BT_QUOT || open == BT_APOS)
+ break;
+ switch (open) {
+ case BT_S:
+ case BT_LF:
+ case BT_CR:
+ break;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ ptr += MINBPC(enc);
+ /* in attribute value */
+ for (;;) {
+ int t;
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ t = BYTE_TYPE(enc, ptr);
+ if (t == open)
+ break;
+ switch (t) {
+ INVALID_CASES(ptr, nextTokPtr)
+ case BT_AMP:
+ {
+ int tok = PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, &ptr);
+ if (tok <= 0) {
+ if (tok == XML_TOK_INVALID)
+ *nextTokPtr = ptr;
+ return tok;
+ }
+ break;
+ }
+ case BT_LT:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_S:
+ case BT_CR:
+ case BT_LF:
+ break;
+ case BT_SOL:
+ goto sol;
+ case BT_GT:
+ goto gt;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ /* ptr points to closing quote */
+ for (;;) {
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ case BT_S: case BT_CR: case BT_LF:
+ continue;
+ case BT_GT:
+ gt:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_START_TAG_WITH_ATTS;
+ case BT_SOL:
+ sol:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_EMPTY_ELEMENT_WITH_ATTS;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ break;
+ }
+ break;
+ }
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
/* ptr points to character following "<" */
static int PTRCALL
PREFIX(scanLt)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
#ifdef XML_NS
- int hadColon;
+ int hadColon;
#endif
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- case BT_EXCL:
- if ((ptr += MINBPC(enc)) == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_MINUS:
- return PREFIX(scanComment)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_LSQB:
- return PREFIX(scanCdataSection)(enc, ptr + MINBPC(enc),
- end, nextTokPtr);
- }
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- case BT_QUEST:
- return PREFIX(scanPi)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_SOL:
- return PREFIX(scanEndTag)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ case BT_EXCL:
+ if ((ptr += MINBPC(enc)) == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_MINUS:
+ return PREFIX(scanComment)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_LSQB:
+ return PREFIX(scanCdataSection)(enc, ptr + MINBPC(enc),
+ end, nextTokPtr);
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ case BT_QUEST:
+ return PREFIX(scanPi)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_SOL:
+ return PREFIX(scanEndTag)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
#ifdef XML_NS
- hadColon = 0;
+ hadColon = 0;
#endif
- /* we have a start-tag */
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ /* we have a start-tag */
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
#ifdef XML_NS
- case BT_COLON:
- if (hadColon) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- hadColon = 1;
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- break;
+ case BT_COLON:
+ if (hadColon) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ hadColon = 1;
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ break;
#endif
- case BT_S: case BT_CR: case BT_LF:
- {
- ptr += MINBPC(enc);
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- case BT_GT:
- goto gt;
- case BT_SOL:
- goto sol;
- case BT_S: case BT_CR: case BT_LF:
- ptr += MINBPC(enc);
- continue;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- return PREFIX(scanAtts)(enc, ptr, end, nextTokPtr);
- }
- return XML_TOK_PARTIAL;
- }
- case BT_GT:
- gt:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_START_TAG_NO_ATTS;
- case BT_SOL:
- sol:
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_EMPTY_ELEMENT_NO_ATTS;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ case BT_S: case BT_CR: case BT_LF:
+ {
+ ptr += MINBPC(enc);
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ case BT_GT:
+ goto gt;
+ case BT_SOL:
+ goto sol;
+ case BT_S: case BT_CR: case BT_LF:
+ ptr += MINBPC(enc);
+ continue;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ return PREFIX(scanAtts)(enc, ptr, end, nextTokPtr);
+ }
+ return XML_TOK_PARTIAL;
+ }
+ case BT_GT:
+ gt:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_START_TAG_NO_ATTS;
+ case BT_SOL:
+ sol:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_EMPTY_ELEMENT_NO_ATTS;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
static int PTRCALL
PREFIX(contentTok)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
- if (ptr == end)
- return XML_TOK_NONE;
- if (MINBPC(enc) > 1) {
- size_t n = end - ptr;
- if (n & (MINBPC(enc) - 1)) {
- n &= ~(MINBPC(enc) - 1);
- if (n == 0)
- return XML_TOK_PARTIAL;
- end = ptr + n;
- }
- }
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_LT:
- return PREFIX(scanLt)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_AMP:
- return PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_CR:
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_TRAILING_CR;
- if (BYTE_TYPE(enc, ptr) == BT_LF)
- ptr += MINBPC(enc);
- *nextTokPtr = ptr;
- return XML_TOK_DATA_NEWLINE;
- case BT_LF:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_DATA_NEWLINE;
- case BT_RSQB:
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_TRAILING_RSQB;
- if (!CHAR_MATCHES(enc, ptr, ASCII_RSQB))
- break;
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_TRAILING_RSQB;
- if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- ptr -= MINBPC(enc);
- break;
- }
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- INVALID_CASES(ptr, nextTokPtr)
- default:
- ptr += MINBPC(enc);
- break;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
+ if (ptr == end)
+ return XML_TOK_NONE;
+ if (MINBPC(enc) > 1) {
+ size_t n = end - ptr;
+ if (n & (MINBPC(enc) - 1)) {
+ n &= ~(MINBPC(enc) - 1);
+ if (n == 0)
+ return XML_TOK_PARTIAL;
+ end = ptr + n;
+ }
+ }
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_LT:
+ return PREFIX(scanLt)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_AMP:
+ return PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_CR:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_TRAILING_CR;
+ if (BYTE_TYPE(enc, ptr) == BT_LF)
+ ptr += MINBPC(enc);
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_NEWLINE;
+ case BT_LF:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_DATA_NEWLINE;
+ case BT_RSQB:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_TRAILING_RSQB;
+ if (!CHAR_MATCHES(enc, ptr, ASCII_RSQB))
+ break;
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_TRAILING_RSQB;
+ if (!CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ ptr -= MINBPC(enc);
+ break;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ INVALID_CASES(ptr, nextTokPtr)
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
#define LEAD_CASE(n) \
- case BT_LEAD ## n: \
- if (end - ptr < n || IS_INVALID_CHAR(enc, ptr, n)) { \
- *nextTokPtr = ptr; \
- return XML_TOK_DATA_CHARS; \
- } \
- ptr += n; \
- break;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: \
+ if (end - ptr < n || IS_INVALID_CHAR(enc, ptr, n)) { \
+ *nextTokPtr = ptr; \
+ return XML_TOK_DATA_CHARS; \
+ } \
+ ptr += n; \
+ break;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_RSQB:
- if (ptr + MINBPC(enc) != end) {
- if (!CHAR_MATCHES(enc, ptr + MINBPC(enc), ASCII_RSQB)) {
- ptr += MINBPC(enc);
- break;
- }
- if (ptr + 2*MINBPC(enc) != end) {
- if (!CHAR_MATCHES(enc, ptr + 2*MINBPC(enc), ASCII_GT)) {
- ptr += MINBPC(enc);
- break;
- }
- *nextTokPtr = ptr + 2*MINBPC(enc);
- return XML_TOK_INVALID;
- }
- }
- /* fall through */
- case BT_AMP:
- case BT_LT:
- case BT_NONXML:
- case BT_MALFORM:
- case BT_TRAIL:
- case BT_CR:
- case BT_LF:
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
+ case BT_RSQB:
+ if (ptr + MINBPC(enc) != end) {
+ if (!CHAR_MATCHES(enc, ptr + MINBPC(enc), ASCII_RSQB)) {
+ ptr += MINBPC(enc);
+ break;
+ }
+ if (ptr + 2*MINBPC(enc) != end) {
+ if (!CHAR_MATCHES(enc, ptr + 2*MINBPC(enc), ASCII_GT)) {
+ ptr += MINBPC(enc);
+ break;
+ }
+ *nextTokPtr = ptr + 2*MINBPC(enc);
+ return XML_TOK_INVALID;
+ }
+ }
+ /* fall through */
+ case BT_AMP:
+ case BT_LT:
+ case BT_NONXML:
+ case BT_MALFORM:
+ case BT_TRAIL:
+ case BT_CR:
+ case BT_LF:
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
}
/* ptr points to character following "%" */
static int PTRCALL
PREFIX(scanPercent)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- case BT_S: case BT_LF: case BT_CR: case BT_PERCNT:
- *nextTokPtr = ptr;
- return XML_TOK_PERCENT;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
- case BT_SEMI:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_PARAM_ENTITY_REF;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return XML_TOK_PARTIAL;
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ case BT_S: case BT_LF: case BT_CR: case BT_PERCNT:
+ *nextTokPtr = ptr;
+ return XML_TOK_PERCENT;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ case BT_SEMI:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_PARAM_ENTITY_REF;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
static int PTRCALL
PREFIX(scanPoundName)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
- case BT_CR: case BT_LF: case BT_S:
- case BT_RPAR: case BT_GT: case BT_PERCNT: case BT_VERBAR:
- *nextTokPtr = ptr;
- return XML_TOK_POUND_NAME;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return -XML_TOK_POUND_NAME;
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NMSTRT_CASES(enc, ptr, end, nextTokPtr)
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ case BT_CR: case BT_LF: case BT_S:
+ case BT_RPAR: case BT_GT: case BT_PERCNT: case BT_VERBAR:
+ *nextTokPtr = ptr;
+ return XML_TOK_POUND_NAME;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return -XML_TOK_POUND_NAME;
}
static int PTRCALL
PREFIX(scanLit)(int open, const ENCODING *enc,
- const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char *ptr, const char *end,
+ const char **nextTokPtr)
{
- while (ptr != end) {
- int t = BYTE_TYPE(enc, ptr);
- switch (t) {
- INVALID_CASES(ptr, nextTokPtr)
- case BT_QUOT:
- case BT_APOS:
- ptr += MINBPC(enc);
- if (t != open)
- break;
- if (ptr == end)
- return -XML_TOK_LITERAL;
- *nextTokPtr = ptr;
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_S: case BT_CR: case BT_LF:
- case BT_GT: case BT_PERCNT: case BT_LSQB:
- return XML_TOK_LITERAL;
- default:
- return XML_TOK_INVALID;
- }
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- return XML_TOK_PARTIAL;
+ while (ptr != end) {
+ int t = BYTE_TYPE(enc, ptr);
+ switch (t) {
+ INVALID_CASES(ptr, nextTokPtr)
+ case BT_QUOT:
+ case BT_APOS:
+ ptr += MINBPC(enc);
+ if (t != open)
+ break;
+ if (ptr == end)
+ return -XML_TOK_LITERAL;
+ *nextTokPtr = ptr;
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_S: case BT_CR: case BT_LF:
+ case BT_GT: case BT_PERCNT: case BT_LSQB:
+ return XML_TOK_LITERAL;
+ default:
+ return XML_TOK_INVALID;
+ }
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
static int PTRCALL
PREFIX(prologTok)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
- int tok;
- if (ptr == end)
- return XML_TOK_NONE;
- if (MINBPC(enc) > 1) {
- size_t n = end - ptr;
- if (n & (MINBPC(enc) - 1)) {
- n &= ~(MINBPC(enc) - 1);
- if (n == 0)
- return XML_TOK_PARTIAL;
- end = ptr + n;
- }
- }
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_QUOT:
- return PREFIX(scanLit)(BT_QUOT, enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_APOS:
- return PREFIX(scanLit)(BT_APOS, enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_LT:
- {
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_PARTIAL;
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_EXCL:
- return PREFIX(scanDecl)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_QUEST:
- return PREFIX(scanPi)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_NMSTRT:
- case BT_HEX:
- case BT_NONASCII:
- case BT_LEAD2:
- case BT_LEAD3:
- case BT_LEAD4:
- *nextTokPtr = ptr - MINBPC(enc);
- return XML_TOK_INSTANCE_START;
- }
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- case BT_CR:
- if (ptr + MINBPC(enc) == end) {
- *nextTokPtr = end;
- /* indicate that this might be part of a CR/LF pair */
- return -XML_TOK_PROLOG_S;
- }
- /* fall through */
- case BT_S: case BT_LF:
- for (;;) {
- ptr += MINBPC(enc);
- if (ptr == end)
- break;
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_S: case BT_LF:
- break;
- case BT_CR:
- /* don't split CR/LF pair */
- if (ptr + MINBPC(enc) != end)
- break;
- /* fall through */
- default:
- *nextTokPtr = ptr;
- return XML_TOK_PROLOG_S;
- }
- }
- *nextTokPtr = ptr;
- return XML_TOK_PROLOG_S;
- case BT_PERCNT:
- return PREFIX(scanPercent)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- case BT_COMMA:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_COMMA;
- case BT_LSQB:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_OPEN_BRACKET;
- case BT_RSQB:
- ptr += MINBPC(enc);
- if (ptr == end)
- return -XML_TOK_CLOSE_BRACKET;
- if (CHAR_MATCHES(enc, ptr, ASCII_RSQB)) {
- if (ptr + MINBPC(enc) == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr + MINBPC(enc), ASCII_GT)) {
- *nextTokPtr = ptr + 2*MINBPC(enc);
- return XML_TOK_COND_SECT_CLOSE;
- }
- }
- *nextTokPtr = ptr;
- return XML_TOK_CLOSE_BRACKET;
- case BT_LPAR:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_OPEN_PAREN;
- case BT_RPAR:
- ptr += MINBPC(enc);
- if (ptr == end)
- return -XML_TOK_CLOSE_PAREN;
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_AST:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_CLOSE_PAREN_ASTERISK;
- case BT_QUEST:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_CLOSE_PAREN_QUESTION;
- case BT_PLUS:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_CLOSE_PAREN_PLUS;
- case BT_CR: case BT_LF: case BT_S:
- case BT_GT: case BT_COMMA: case BT_VERBAR:
- case BT_RPAR:
- *nextTokPtr = ptr;
- return XML_TOK_CLOSE_PAREN;
- }
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- case BT_VERBAR:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_OR;
- case BT_GT:
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_DECL_CLOSE;
- case BT_NUM:
- return PREFIX(scanPoundName)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ int tok;
+ if (ptr == end)
+ return XML_TOK_NONE;
+ if (MINBPC(enc) > 1) {
+ size_t n = end - ptr;
+ if (n & (MINBPC(enc) - 1)) {
+ n &= ~(MINBPC(enc) - 1);
+ if (n == 0)
+ return XML_TOK_PARTIAL;
+ end = ptr + n;
+ }
+ }
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_QUOT:
+ return PREFIX(scanLit)(BT_QUOT, enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_APOS:
+ return PREFIX(scanLit)(BT_APOS, enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_LT:
+ {
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_EXCL:
+ return PREFIX(scanDecl)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_QUEST:
+ return PREFIX(scanPi)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_NMSTRT:
+ case BT_HEX:
+ case BT_NONASCII:
+ case BT_LEAD2:
+ case BT_LEAD3:
+ case BT_LEAD4:
+ *nextTokPtr = ptr - MINBPC(enc);
+ return XML_TOK_INSTANCE_START;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ case BT_CR:
+ if (ptr + MINBPC(enc) == end) {
+ *nextTokPtr = end;
+ /* indicate that this might be part of a CR/LF pair */
+ return -XML_TOK_PROLOG_S;
+ }
+ /* fall through */
+ case BT_S: case BT_LF:
+ for (;;) {
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ break;
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_S: case BT_LF:
+ break;
+ case BT_CR:
+ /* don't split CR/LF pair */
+ if (ptr + MINBPC(enc) != end)
+ break;
+ /* fall through */
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_PROLOG_S;
+ }
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_PROLOG_S;
+ case BT_PERCNT:
+ return PREFIX(scanPercent)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ case BT_COMMA:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_COMMA;
+ case BT_LSQB:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_OPEN_BRACKET;
+ case BT_RSQB:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return -XML_TOK_CLOSE_BRACKET;
+ if (CHAR_MATCHES(enc, ptr, ASCII_RSQB)) {
+ if (ptr + MINBPC(enc) == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr + MINBPC(enc), ASCII_GT)) {
+ *nextTokPtr = ptr + 2*MINBPC(enc);
+ return XML_TOK_COND_SECT_CLOSE;
+ }
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_CLOSE_BRACKET;
+ case BT_LPAR:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_OPEN_PAREN;
+ case BT_RPAR:
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return -XML_TOK_CLOSE_PAREN;
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_AST:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_CLOSE_PAREN_ASTERISK;
+ case BT_QUEST:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_CLOSE_PAREN_QUESTION;
+ case BT_PLUS:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_CLOSE_PAREN_PLUS;
+ case BT_CR: case BT_LF: case BT_S:
+ case BT_GT: case BT_COMMA: case BT_VERBAR:
+ case BT_RPAR:
+ *nextTokPtr = ptr;
+ return XML_TOK_CLOSE_PAREN;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ case BT_VERBAR:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_OR;
+ case BT_GT:
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_DECL_CLOSE;
+ case BT_NUM:
+ return PREFIX(scanPoundName)(enc, ptr + MINBPC(enc), end, nextTokPtr);
#define LEAD_CASE(n) \
- case BT_LEAD ## n: \
- if (end - ptr < n) \
- return XML_TOK_PARTIAL_CHAR; \
- if (IS_NMSTRT_CHAR(enc, ptr, n)) { \
- ptr += n; \
- tok = XML_TOK_NAME; \
- break; \
- } \
- if (IS_NAME_CHAR(enc, ptr, n)) { \
- ptr += n; \
- tok = XML_TOK_NMTOKEN; \
- break; \
- } \
- *nextTokPtr = ptr; \
- return XML_TOK_INVALID;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: \
+ if (end - ptr < n) \
+ return XML_TOK_PARTIAL_CHAR; \
+ if (IS_NMSTRT_CHAR(enc, ptr, n)) { \
+ ptr += n; \
+ tok = XML_TOK_NAME; \
+ break; \
+ } \
+ if (IS_NAME_CHAR(enc, ptr, n)) { \
+ ptr += n; \
+ tok = XML_TOK_NMTOKEN; \
+ break; \
+ } \
+ *nextTokPtr = ptr; \
+ return XML_TOK_INVALID;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_NMSTRT:
- case BT_HEX:
- tok = XML_TOK_NAME;
- ptr += MINBPC(enc);
- break;
- case BT_DIGIT:
- case BT_NAME:
- case BT_MINUS:
+ case BT_NMSTRT:
+ case BT_HEX:
+ tok = XML_TOK_NAME;
+ ptr += MINBPC(enc);
+ break;
+ case BT_DIGIT:
+ case BT_NAME:
+ case BT_MINUS:
#ifdef XML_NS
- case BT_COLON:
+ case BT_COLON:
#endif
- tok = XML_TOK_NMTOKEN;
- ptr += MINBPC(enc);
- break;
- case BT_NONASCII:
- if (IS_NMSTRT_CHAR_MINBPC(enc, ptr)) {
- ptr += MINBPC(enc);
- tok = XML_TOK_NAME;
- break;
- }
- if (IS_NAME_CHAR_MINBPC(enc, ptr)) {
- ptr += MINBPC(enc);
- tok = XML_TOK_NMTOKEN;
- break;
- }
- /* fall through */
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
- case BT_GT: case BT_RPAR: case BT_COMMA:
- case BT_VERBAR: case BT_LSQB: case BT_PERCNT:
- case BT_S: case BT_CR: case BT_LF:
- *nextTokPtr = ptr;
- return tok;
+ tok = XML_TOK_NMTOKEN;
+ ptr += MINBPC(enc);
+ break;
+ case BT_NONASCII:
+ if (IS_NMSTRT_CHAR_MINBPC(enc, ptr)) {
+ ptr += MINBPC(enc);
+ tok = XML_TOK_NAME;
+ break;
+ }
+ if (IS_NAME_CHAR_MINBPC(enc, ptr)) {
+ ptr += MINBPC(enc);
+ tok = XML_TOK_NMTOKEN;
+ break;
+ }
+ /* fall through */
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ case BT_GT: case BT_RPAR: case BT_COMMA:
+ case BT_VERBAR: case BT_LSQB: case BT_PERCNT:
+ case BT_S: case BT_CR: case BT_LF:
+ *nextTokPtr = ptr;
+ return tok;
#ifdef XML_NS
- case BT_COLON:
- ptr += MINBPC(enc);
- switch (tok) {
- case XML_TOK_NAME:
- if (ptr == end)
- return XML_TOK_PARTIAL;
- tok = XML_TOK_PREFIXED_NAME;
- switch (BYTE_TYPE(enc, ptr)) {
- CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
- default:
- tok = XML_TOK_NMTOKEN;
- break;
- }
- break;
- case XML_TOK_PREFIXED_NAME:
- tok = XML_TOK_NMTOKEN;
- break;
- }
- break;
+ case BT_COLON:
+ ptr += MINBPC(enc);
+ switch (tok) {
+ case XML_TOK_NAME:
+ if (ptr == end)
+ return XML_TOK_PARTIAL;
+ tok = XML_TOK_PREFIXED_NAME;
+ switch (BYTE_TYPE(enc, ptr)) {
+ CHECK_NAME_CASES(enc, ptr, end, nextTokPtr)
+ default:
+ tok = XML_TOK_NMTOKEN;
+ break;
+ }
+ break;
+ case XML_TOK_PREFIXED_NAME:
+ tok = XML_TOK_NMTOKEN;
+ break;
+ }
+ break;
#endif
- case BT_PLUS:
- if (tok == XML_TOK_NMTOKEN) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_NAME_PLUS;
- case BT_AST:
- if (tok == XML_TOK_NMTOKEN) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_NAME_ASTERISK;
- case BT_QUEST:
- if (tok == XML_TOK_NMTOKEN) {
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_NAME_QUESTION;
- default:
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- }
- }
- return -tok;
+ case BT_PLUS:
+ if (tok == XML_TOK_NMTOKEN) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_NAME_PLUS;
+ case BT_AST:
+ if (tok == XML_TOK_NMTOKEN) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_NAME_ASTERISK;
+ case BT_QUEST:
+ if (tok == XML_TOK_NMTOKEN) {
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_NAME_QUESTION;
+ default:
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ }
+ }
+ return -tok;
}
static int PTRCALL
PREFIX(attributeValueTok)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- const char *start;
- if (ptr == end)
- return XML_TOK_NONE;
- start = ptr;
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
+ const char *start;
+ if (ptr == end)
+ return XML_TOK_NONE;
+ start = ptr;
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
#define LEAD_CASE(n) \
- case BT_LEAD ## n: ptr += n; break;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: ptr += n; break;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_AMP:
- if (ptr == start)
- return PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- case BT_LT:
- /* this is for inside entity references */
- *nextTokPtr = ptr;
- return XML_TOK_INVALID;
- case BT_LF:
- if (ptr == start) {
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_DATA_NEWLINE;
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- case BT_CR:
- if (ptr == start) {
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_TRAILING_CR;
- if (BYTE_TYPE(enc, ptr) == BT_LF)
- ptr += MINBPC(enc);
- *nextTokPtr = ptr;
- return XML_TOK_DATA_NEWLINE;
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- case BT_S:
- if (ptr == start) {
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_ATTRIBUTE_VALUE_S;
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
+ case BT_AMP:
+ if (ptr == start)
+ return PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ case BT_LT:
+ /* this is for inside entity references */
+ *nextTokPtr = ptr;
+ return XML_TOK_INVALID;
+ case BT_LF:
+ if (ptr == start) {
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_DATA_NEWLINE;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ case BT_CR:
+ if (ptr == start) {
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_TRAILING_CR;
+ if (BYTE_TYPE(enc, ptr) == BT_LF)
+ ptr += MINBPC(enc);
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_NEWLINE;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ case BT_S:
+ if (ptr == start) {
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_ATTRIBUTE_VALUE_S;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
}
static int PTRCALL
PREFIX(entityValueTok)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- const char *start;
- if (ptr == end)
- return XML_TOK_NONE;
- start = ptr;
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
+ const char *start;
+ if (ptr == end)
+ return XML_TOK_NONE;
+ start = ptr;
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
#define LEAD_CASE(n) \
- case BT_LEAD ## n: ptr += n; break;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: ptr += n; break;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_AMP:
- if (ptr == start)
- return PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- case BT_PERCNT:
- if (ptr == start) {
- int tok = PREFIX(scanPercent)(enc, ptr + MINBPC(enc),
- end, nextTokPtr);
- return (tok == XML_TOK_PERCENT) ? XML_TOK_INVALID : tok;
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- case BT_LF:
- if (ptr == start) {
- *nextTokPtr = ptr + MINBPC(enc);
- return XML_TOK_DATA_NEWLINE;
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- case BT_CR:
- if (ptr == start) {
- ptr += MINBPC(enc);
- if (ptr == end)
- return XML_TOK_TRAILING_CR;
- if (BYTE_TYPE(enc, ptr) == BT_LF)
- ptr += MINBPC(enc);
- *nextTokPtr = ptr;
- return XML_TOK_DATA_NEWLINE;
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- *nextTokPtr = ptr;
- return XML_TOK_DATA_CHARS;
+ case BT_AMP:
+ if (ptr == start)
+ return PREFIX(scanRef)(enc, ptr + MINBPC(enc), end, nextTokPtr);
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ case BT_PERCNT:
+ if (ptr == start) {
+ int tok = PREFIX(scanPercent)(enc, ptr + MINBPC(enc),
+ end, nextTokPtr);
+ return (tok == XML_TOK_PERCENT) ? XML_TOK_INVALID : tok;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ case BT_LF:
+ if (ptr == start) {
+ *nextTokPtr = ptr + MINBPC(enc);
+ return XML_TOK_DATA_NEWLINE;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ case BT_CR:
+ if (ptr == start) {
+ ptr += MINBPC(enc);
+ if (ptr == end)
+ return XML_TOK_TRAILING_CR;
+ if (BYTE_TYPE(enc, ptr) == BT_LF)
+ ptr += MINBPC(enc);
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_NEWLINE;
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ *nextTokPtr = ptr;
+ return XML_TOK_DATA_CHARS;
}
#ifdef XML_DTD
static int PTRCALL
PREFIX(ignoreSectionTok)(const ENCODING *enc, const char *ptr,
- const char *end, const char **nextTokPtr)
+ const char *end, const char **nextTokPtr)
{
- int level = 0;
- if (MINBPC(enc) > 1) {
- size_t n = end - ptr;
- if (n & (MINBPC(enc) - 1)) {
- n &= ~(MINBPC(enc) - 1);
- end = ptr + n;
- }
- }
- while (ptr != end) {
- switch (BYTE_TYPE(enc, ptr)) {
- INVALID_CASES(ptr, nextTokPtr)
- case BT_LT:
- if ((ptr += MINBPC(enc)) == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr, ASCII_EXCL)) {
- if ((ptr += MINBPC(enc)) == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr, ASCII_LSQB)) {
- ++level;
- ptr += MINBPC(enc);
- }
- }
- break;
- case BT_RSQB:
- if ((ptr += MINBPC(enc)) == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr, ASCII_RSQB)) {
- if ((ptr += MINBPC(enc)) == end)
- return XML_TOK_PARTIAL;
- if (CHAR_MATCHES(enc, ptr, ASCII_GT)) {
- ptr += MINBPC(enc);
- if (level == 0) {
- *nextTokPtr = ptr;
- return XML_TOK_IGNORE_SECT;
- }
- --level;
- }
- }
- break;
- default:
- ptr += MINBPC(enc);
- break;
- }
- }
- return XML_TOK_PARTIAL;
+ int level = 0;
+ if (MINBPC(enc) > 1) {
+ size_t n = end - ptr;
+ if (n & (MINBPC(enc) - 1)) {
+ n &= ~(MINBPC(enc) - 1);
+ end = ptr + n;
+ }
+ }
+ while (ptr != end) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ INVALID_CASES(ptr, nextTokPtr)
+ case BT_LT:
+ if ((ptr += MINBPC(enc)) == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr, ASCII_EXCL)) {
+ if ((ptr += MINBPC(enc)) == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr, ASCII_LSQB)) {
+ ++level;
+ ptr += MINBPC(enc);
+ }
+ }
+ break;
+ case BT_RSQB:
+ if ((ptr += MINBPC(enc)) == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr, ASCII_RSQB)) {
+ if ((ptr += MINBPC(enc)) == end)
+ return XML_TOK_PARTIAL;
+ if (CHAR_MATCHES(enc, ptr, ASCII_GT)) {
+ ptr += MINBPC(enc);
+ if (level == 0) {
+ *nextTokPtr = ptr;
+ return XML_TOK_IGNORE_SECT;
+ }
+ --level;
+ }
+ }
+ break;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ }
+ return XML_TOK_PARTIAL;
}
#endif /* XML_DTD */
static int PTRCALL
PREFIX(isPublicId)(const ENCODING *enc, const char *ptr, const char *end,
- const char **badPtr)
+ const char **badPtr)
{
- ptr += MINBPC(enc);
- end -= MINBPC(enc);
- for (; ptr != end; ptr += MINBPC(enc)) {
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_DIGIT:
- case BT_HEX:
- case BT_MINUS:
- case BT_APOS:
- case BT_LPAR:
- case BT_RPAR:
- case BT_PLUS:
- case BT_COMMA:
- case BT_SOL:
- case BT_EQUALS:
- case BT_QUEST:
- case BT_CR:
- case BT_LF:
- case BT_SEMI:
- case BT_EXCL:
- case BT_AST:
- case BT_PERCNT:
- case BT_NUM:
+ ptr += MINBPC(enc);
+ end -= MINBPC(enc);
+ for (; ptr != end; ptr += MINBPC(enc)) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_DIGIT:
+ case BT_HEX:
+ case BT_MINUS:
+ case BT_APOS:
+ case BT_LPAR:
+ case BT_RPAR:
+ case BT_PLUS:
+ case BT_COMMA:
+ case BT_SOL:
+ case BT_EQUALS:
+ case BT_QUEST:
+ case BT_CR:
+ case BT_LF:
+ case BT_SEMI:
+ case BT_EXCL:
+ case BT_AST:
+ case BT_PERCNT:
+ case BT_NUM:
#ifdef XML_NS
- case BT_COLON:
+ case BT_COLON:
#endif
- break;
- case BT_S:
- if (CHAR_MATCHES(enc, ptr, ASCII_TAB)) {
- *badPtr = ptr;
- return 0;
- }
- break;
- case BT_NAME:
- case BT_NMSTRT:
- if (!(BYTE_TO_ASCII(enc, ptr) & ~0x7f))
- break;
- default:
- switch (BYTE_TO_ASCII(enc, ptr)) {
- case 0x24: /* $ */
- case 0x40: /* @ */
- break;
- default:
- *badPtr = ptr;
- return 0;
- }
- break;
- }
- }
- return 1;
+ break;
+ case BT_S:
+ if (CHAR_MATCHES(enc, ptr, ASCII_TAB)) {
+ *badPtr = ptr;
+ return 0;
+ }
+ break;
+ case BT_NAME:
+ case BT_NMSTRT:
+ if (!(BYTE_TO_ASCII(enc, ptr) & ~0x7f))
+ break;
+ default:
+ switch (BYTE_TO_ASCII(enc, ptr)) {
+ case 0x24: /* $ */
+ case 0x40: /* @ */
+ break;
+ default:
+ *badPtr = ptr;
+ return 0;
+ }
+ break;
+ }
+ }
+ return 1;
}
/* This must only be called for a well-formed start-tag or empty
@@ -1429,347 +1429,347 @@ PREFIX(isPublicId)(const ENCODING *enc, const char *ptr, const char *end,
static int PTRCALL
PREFIX(getAtts)(const ENCODING *enc, const char *ptr,
- int attsMax, ATTRIBUTE *atts)
+ int attsMax, ATTRIBUTE *atts)
{
- enum { other, inName, inValue } state = inName;
- int nAtts = 0;
- int open = 0; /* defined when state == inValue;
+ enum { other, inName, inValue } state = inName;
+ int nAtts = 0;
+ int open = 0; /* defined when state == inValue;
initialization just to shut up compilers */
- for (ptr += MINBPC(enc);; ptr += MINBPC(enc)) {
- switch (BYTE_TYPE(enc, ptr)) {
+ for (ptr += MINBPC(enc);; ptr += MINBPC(enc)) {
+ switch (BYTE_TYPE(enc, ptr)) {
#define START_NAME \
- if (state == other) { \
- if (nAtts < attsMax) { \
- atts[nAtts].name = ptr; \
- atts[nAtts].normalized = 1; \
- } \
- state = inName; \
- }
+ if (state == other) { \
+ if (nAtts < attsMax) { \
+ atts[nAtts].name = ptr; \
+ atts[nAtts].normalized = 1; \
+ } \
+ state = inName; \
+ }
#define LEAD_CASE(n) \
- case BT_LEAD ## n: START_NAME ptr += (n - MINBPC(enc)); break;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: START_NAME ptr += (n - MINBPC(enc)); break;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_NONASCII:
- case BT_NMSTRT:
- case BT_HEX:
- START_NAME
- break;
+ case BT_NONASCII:
+ case BT_NMSTRT:
+ case BT_HEX:
+ START_NAME
+ break;
#undef START_NAME
- case BT_QUOT:
- if (state != inValue) {
- if (nAtts < attsMax)
- atts[nAtts].valuePtr = ptr + MINBPC(enc);
- state = inValue;
- open = BT_QUOT;
- }
- else if (open == BT_QUOT) {
- state = other;
- if (nAtts < attsMax)
- atts[nAtts].valueEnd = ptr;
- nAtts++;
- }
- break;
- case BT_APOS:
- if (state != inValue) {
- if (nAtts < attsMax)
- atts[nAtts].valuePtr = ptr + MINBPC(enc);
- state = inValue;
- open = BT_APOS;
- }
- else if (open == BT_APOS) {
- state = other;
- if (nAtts < attsMax)
- atts[nAtts].valueEnd = ptr;
- nAtts++;
- }
- break;
- case BT_AMP:
- if (nAtts < attsMax)
- atts[nAtts].normalized = 0;
- break;
- case BT_S:
- if (state == inName)
- state = other;
- else if (state == inValue
- && nAtts < attsMax
- && atts[nAtts].normalized
- && (ptr == atts[nAtts].valuePtr
- || BYTE_TO_ASCII(enc, ptr) != ASCII_SPACE
- || BYTE_TO_ASCII(enc, ptr + MINBPC(enc)) == ASCII_SPACE
- || BYTE_TYPE(enc, ptr + MINBPC(enc)) == open))
- atts[nAtts].normalized = 0;
- break;
- case BT_CR: case BT_LF:
- /* This case ensures that the first attribute name is counted
- Apart from that we could just change state on the quote. */
- if (state == inName)
- state = other;
- else if (state == inValue && nAtts < attsMax)
- atts[nAtts].normalized = 0;
- break;
- case BT_GT:
- case BT_SOL:
- if (state != inValue)
- return nAtts;
- break;
- default:
- break;
- }
- }
- /* not reached */
+ case BT_QUOT:
+ if (state != inValue) {
+ if (nAtts < attsMax)
+ atts[nAtts].valuePtr = ptr + MINBPC(enc);
+ state = inValue;
+ open = BT_QUOT;
+ }
+ else if (open == BT_QUOT) {
+ state = other;
+ if (nAtts < attsMax)
+ atts[nAtts].valueEnd = ptr;
+ nAtts++;
+ }
+ break;
+ case BT_APOS:
+ if (state != inValue) {
+ if (nAtts < attsMax)
+ atts[nAtts].valuePtr = ptr + MINBPC(enc);
+ state = inValue;
+ open = BT_APOS;
+ }
+ else if (open == BT_APOS) {
+ state = other;
+ if (nAtts < attsMax)
+ atts[nAtts].valueEnd = ptr;
+ nAtts++;
+ }
+ break;
+ case BT_AMP:
+ if (nAtts < attsMax)
+ atts[nAtts].normalized = 0;
+ break;
+ case BT_S:
+ if (state == inName)
+ state = other;
+ else if (state == inValue
+ && nAtts < attsMax
+ && atts[nAtts].normalized
+ && (ptr == atts[nAtts].valuePtr
+ || BYTE_TO_ASCII(enc, ptr) != ASCII_SPACE
+ || BYTE_TO_ASCII(enc, ptr + MINBPC(enc)) == ASCII_SPACE
+ || BYTE_TYPE(enc, ptr + MINBPC(enc)) == open))
+ atts[nAtts].normalized = 0;
+ break;
+ case BT_CR: case BT_LF:
+ /* This case ensures that the first attribute name is counted
+ Apart from that we could just change state on the quote. */
+ if (state == inName)
+ state = other;
+ else if (state == inValue && nAtts < attsMax)
+ atts[nAtts].normalized = 0;
+ break;
+ case BT_GT:
+ case BT_SOL:
+ if (state != inValue)
+ return nAtts;
+ break;
+ default:
+ break;
+ }
+ }
+ /* not reached */
}
static int PTRFASTCALL
PREFIX(charRefNumber)(const ENCODING *enc, const char *ptr)
{
- int result = 0;
- /* skip &# */
- ptr += 2*MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_x)) {
- for (ptr += MINBPC(enc);
- !CHAR_MATCHES(enc, ptr, ASCII_SEMI);
- ptr += MINBPC(enc)) {
- int c = BYTE_TO_ASCII(enc, ptr);
- switch (c) {
- case ASCII_0: case ASCII_1: case ASCII_2: case ASCII_3: case ASCII_4:
- case ASCII_5: case ASCII_6: case ASCII_7: case ASCII_8: case ASCII_9:
- result <<= 4;
- result |= (c - ASCII_0);
- break;
- case ASCII_A: case ASCII_B: case ASCII_C:
- case ASCII_D: case ASCII_E: case ASCII_F:
- result <<= 4;
- result += 10 + (c - ASCII_A);
- break;
- case ASCII_a: case ASCII_b: case ASCII_c:
- case ASCII_d: case ASCII_e: case ASCII_f:
- result <<= 4;
- result += 10 + (c - ASCII_a);
- break;
- }
- if (result >= 0x110000)
- return -1;
- }
- }
- else {
- for (; !CHAR_MATCHES(enc, ptr, ASCII_SEMI); ptr += MINBPC(enc)) {
- int c = BYTE_TO_ASCII(enc, ptr);
- result *= 10;
- result += (c - ASCII_0);
- if (result >= 0x110000)
- return -1;
- }
- }
- return checkCharRefNumber(result);
+ int result = 0;
+ /* skip &# */
+ ptr += 2*MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_x)) {
+ for (ptr += MINBPC(enc);
+ !CHAR_MATCHES(enc, ptr, ASCII_SEMI);
+ ptr += MINBPC(enc)) {
+ int c = BYTE_TO_ASCII(enc, ptr);
+ switch (c) {
+ case ASCII_0: case ASCII_1: case ASCII_2: case ASCII_3: case ASCII_4:
+ case ASCII_5: case ASCII_6: case ASCII_7: case ASCII_8: case ASCII_9:
+ result <<= 4;
+ result |= (c - ASCII_0);
+ break;
+ case ASCII_A: case ASCII_B: case ASCII_C:
+ case ASCII_D: case ASCII_E: case ASCII_F:
+ result <<= 4;
+ result += 10 + (c - ASCII_A);
+ break;
+ case ASCII_a: case ASCII_b: case ASCII_c:
+ case ASCII_d: case ASCII_e: case ASCII_f:
+ result <<= 4;
+ result += 10 + (c - ASCII_a);
+ break;
+ }
+ if (result >= 0x110000)
+ return -1;
+ }
+ }
+ else {
+ for (; !CHAR_MATCHES(enc, ptr, ASCII_SEMI); ptr += MINBPC(enc)) {
+ int c = BYTE_TO_ASCII(enc, ptr);
+ result *= 10;
+ result += (c - ASCII_0);
+ if (result >= 0x110000)
+ return -1;
+ }
+ }
+ return checkCharRefNumber(result);
}
static int PTRCALL
PREFIX(predefinedEntityName)(const ENCODING *enc, const char *ptr,
- const char *end)
+ const char *end)
{
- switch ((end - ptr)/MINBPC(enc)) {
- case 2:
- if (CHAR_MATCHES(enc, ptr + MINBPC(enc), ASCII_t)) {
- switch (BYTE_TO_ASCII(enc, ptr)) {
- case ASCII_l:
- return ASCII_LT;
- case ASCII_g:
- return ASCII_GT;
- }
- }
- break;
- case 3:
- if (CHAR_MATCHES(enc, ptr, ASCII_a)) {
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_m)) {
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_p))
- return ASCII_AMP;
- }
- }
- break;
- case 4:
- switch (BYTE_TO_ASCII(enc, ptr)) {
- case ASCII_q:
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_u)) {
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_o)) {
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_t))
- return ASCII_QUOT;
- }
- }
- break;
- case ASCII_a:
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_p)) {
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_o)) {
- ptr += MINBPC(enc);
- if (CHAR_MATCHES(enc, ptr, ASCII_s))
- return ASCII_APOS;
- }
- }
- break;
- }
- }
- return 0;
+ switch ((end - ptr)/MINBPC(enc)) {
+ case 2:
+ if (CHAR_MATCHES(enc, ptr + MINBPC(enc), ASCII_t)) {
+ switch (BYTE_TO_ASCII(enc, ptr)) {
+ case ASCII_l:
+ return ASCII_LT;
+ case ASCII_g:
+ return ASCII_GT;
+ }
+ }
+ break;
+ case 3:
+ if (CHAR_MATCHES(enc, ptr, ASCII_a)) {
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_m)) {
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_p))
+ return ASCII_AMP;
+ }
+ }
+ break;
+ case 4:
+ switch (BYTE_TO_ASCII(enc, ptr)) {
+ case ASCII_q:
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_u)) {
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_o)) {
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_t))
+ return ASCII_QUOT;
+ }
+ }
+ break;
+ case ASCII_a:
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_p)) {
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_o)) {
+ ptr += MINBPC(enc);
+ if (CHAR_MATCHES(enc, ptr, ASCII_s))
+ return ASCII_APOS;
+ }
+ }
+ break;
+ }
+ }
+ return 0;
}
static int PTRCALL
PREFIX(sameName)(const ENCODING *enc, const char *ptr1, const char *ptr2)
{
- for (;;) {
- switch (BYTE_TYPE(enc, ptr1)) {
+ for (;;) {
+ switch (BYTE_TYPE(enc, ptr1)) {
#define LEAD_CASE(n) \
- case BT_LEAD ## n: \
- if (*ptr1++ != *ptr2++) \
- return 0;
- LEAD_CASE(4) LEAD_CASE(3) LEAD_CASE(2)
+ case BT_LEAD ## n: \
+ if (*ptr1++ != *ptr2++) \
+ return 0;
+ LEAD_CASE(4) LEAD_CASE(3) LEAD_CASE(2)
#undef LEAD_CASE
- /* fall through */
- if (*ptr1++ != *ptr2++)
- return 0;
- break;
- case BT_NONASCII:
- case BT_NMSTRT:
+ /* fall through */
+ if (*ptr1++ != *ptr2++)
+ return 0;
+ break;
+ case BT_NONASCII:
+ case BT_NMSTRT:
#ifdef XML_NS
- case BT_COLON:
+ case BT_COLON:
#endif
- case BT_HEX:
- case BT_DIGIT:
- case BT_NAME:
- case BT_MINUS:
- if (*ptr2++ != *ptr1++)
- return 0;
- if (MINBPC(enc) > 1) {
- if (*ptr2++ != *ptr1++)
- return 0;
- if (MINBPC(enc) > 2) {
- if (*ptr2++ != *ptr1++)
- return 0;
- if (MINBPC(enc) > 3) {
- if (*ptr2++ != *ptr1++)
- return 0;
- }
- }
- }
- break;
- default:
- if (MINBPC(enc) == 1 && *ptr1 == *ptr2)
- return 1;
- switch (BYTE_TYPE(enc, ptr2)) {
- case BT_LEAD2:
- case BT_LEAD3:
- case BT_LEAD4:
- case BT_NONASCII:
- case BT_NMSTRT:
+ case BT_HEX:
+ case BT_DIGIT:
+ case BT_NAME:
+ case BT_MINUS:
+ if (*ptr2++ != *ptr1++)
+ return 0;
+ if (MINBPC(enc) > 1) {
+ if (*ptr2++ != *ptr1++)
+ return 0;
+ if (MINBPC(enc) > 2) {
+ if (*ptr2++ != *ptr1++)
+ return 0;
+ if (MINBPC(enc) > 3) {
+ if (*ptr2++ != *ptr1++)
+ return 0;
+ }
+ }
+ }
+ break;
+ default:
+ if (MINBPC(enc) == 1 && *ptr1 == *ptr2)
+ return 1;
+ switch (BYTE_TYPE(enc, ptr2)) {
+ case BT_LEAD2:
+ case BT_LEAD3:
+ case BT_LEAD4:
+ case BT_NONASCII:
+ case BT_NMSTRT:
#ifdef XML_NS
- case BT_COLON:
+ case BT_COLON:
#endif
- case BT_HEX:
- case BT_DIGIT:
- case BT_NAME:
- case BT_MINUS:
- return 0;
- default:
- return 1;
- }
- }
- }
- /* not reached */
+ case BT_HEX:
+ case BT_DIGIT:
+ case BT_NAME:
+ case BT_MINUS:
+ return 0;
+ default:
+ return 1;
+ }
+ }
+ }
+ /* not reached */
}
static int PTRCALL
PREFIX(nameMatchesAscii)(const ENCODING *enc, const char *ptr1,
- const char *end1, const char *ptr2)
+ const char *end1, const char *ptr2)
{
- for (; *ptr2; ptr1 += MINBPC(enc), ptr2++) {
- if (ptr1 == end1)
- return 0;
- if (!CHAR_MATCHES(enc, ptr1, *ptr2))
- return 0;
- }
- return ptr1 == end1;
+ for (; *ptr2; ptr1 += MINBPC(enc), ptr2++) {
+ if (ptr1 == end1)
+ return 0;
+ if (!CHAR_MATCHES(enc, ptr1, *ptr2))
+ return 0;
+ }
+ return ptr1 == end1;
}
static int PTRFASTCALL
PREFIX(nameLength)(const ENCODING *enc, const char *ptr)
{
- const char *start = ptr;
- for (;;) {
- switch (BYTE_TYPE(enc, ptr)) {
+ const char *start = ptr;
+ for (;;) {
+ switch (BYTE_TYPE(enc, ptr)) {
#define LEAD_CASE(n) \
- case BT_LEAD ## n: ptr += n; break;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: ptr += n; break;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_NONASCII:
- case BT_NMSTRT:
+ case BT_NONASCII:
+ case BT_NMSTRT:
#ifdef XML_NS
- case BT_COLON:
+ case BT_COLON:
#endif
- case BT_HEX:
- case BT_DIGIT:
- case BT_NAME:
- case BT_MINUS:
- ptr += MINBPC(enc);
- break;
- default:
- return (int)(ptr - start);
- }
- }
+ case BT_HEX:
+ case BT_DIGIT:
+ case BT_NAME:
+ case BT_MINUS:
+ ptr += MINBPC(enc);
+ break;
+ default:
+ return (int)(ptr - start);
+ }
+ }
}
static const char * PTRFASTCALL
PREFIX(skipS)(const ENCODING *enc, const char *ptr)
{
- for (;;) {
- switch (BYTE_TYPE(enc, ptr)) {
- case BT_LF:
- case BT_CR:
- case BT_S:
- ptr += MINBPC(enc);
- break;
- default:
- return ptr;
- }
- }
+ for (;;) {
+ switch (BYTE_TYPE(enc, ptr)) {
+ case BT_LF:
+ case BT_CR:
+ case BT_S:
+ ptr += MINBPC(enc);
+ break;
+ default:
+ return ptr;
+ }
+ }
}
static void PTRCALL
PREFIX(updatePosition)(const ENCODING *enc,
- const char *ptr,
- const char *end,
- POSITION *pos)
+ const char *ptr,
+ const char *end,
+ POSITION *pos)
{
- while (ptr < end) {
- switch (BYTE_TYPE(enc, ptr)) {
+ while (ptr < end) {
+ switch (BYTE_TYPE(enc, ptr)) {
#define LEAD_CASE(n) \
- case BT_LEAD ## n: \
- ptr += n; \
- break;
- LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
+ case BT_LEAD ## n: \
+ ptr += n; \
+ break;
+ LEAD_CASE(2) LEAD_CASE(3) LEAD_CASE(4)
#undef LEAD_CASE
- case BT_LF:
- pos->columnNumber = (XML_Size)-1;
- pos->lineNumber++;
- ptr += MINBPC(enc);
- break;
- case BT_CR:
- pos->lineNumber++;
- ptr += MINBPC(enc);
- if (ptr != end && BYTE_TYPE(enc, ptr) == BT_LF)
- ptr += MINBPC(enc);
- pos->columnNumber = (XML_Size)-1;
- break;
- default:
- ptr += MINBPC(enc);
- break;
- }
- pos->columnNumber++;
- }
+ case BT_LF:
+ pos->columnNumber = (XML_Size)-1;
+ pos->lineNumber++;
+ ptr += MINBPC(enc);
+ break;
+ case BT_CR:
+ pos->lineNumber++;
+ ptr += MINBPC(enc);
+ if (ptr != end && BYTE_TYPE(enc, ptr) == BT_LF)
+ ptr += MINBPC(enc);
+ pos->columnNumber = (XML_Size)-1;
+ break;
+ default:
+ ptr += MINBPC(enc);
+ break;
+ }
+ pos->columnNumber++;
+ }
}
#undef DO_LEAD_CASE
diff --git a/src/lib/expat/xmltok_impl.h b/src/lib/expat/xmltok_impl.h
index da0ea60a657..9cbcc12de1e 100644
--- a/src/lib/expat/xmltok_impl.h
+++ b/src/lib/expat/xmltok_impl.h
@@ -4,43 +4,43 @@ See the file COPYING for copying permission.
*/
enum {
- BT_NONXML,
- BT_MALFORM,
- BT_LT,
- BT_AMP,
- BT_RSQB,
- BT_LEAD2,
- BT_LEAD3,
- BT_LEAD4,
- BT_TRAIL,
- BT_CR,
- BT_LF,
- BT_GT,
- BT_QUOT,
- BT_APOS,
- BT_EQUALS,
- BT_QUEST,
- BT_EXCL,
- BT_SOL,
- BT_SEMI,
- BT_NUM,
- BT_LSQB,
- BT_S,
- BT_NMSTRT,
- BT_COLON,
- BT_HEX,
- BT_DIGIT,
- BT_NAME,
- BT_MINUS,
- BT_OTHER, /* known not to be a name or name start character */
- BT_NONASCII, /* might be a name or name start character */
- BT_PERCNT,
- BT_LPAR,
- BT_RPAR,
- BT_AST,
- BT_PLUS,
- BT_COMMA,
- BT_VERBAR
+ BT_NONXML,
+ BT_MALFORM,
+ BT_LT,
+ BT_AMP,
+ BT_RSQB,
+ BT_LEAD2,
+ BT_LEAD3,
+ BT_LEAD4,
+ BT_TRAIL,
+ BT_CR,
+ BT_LF,
+ BT_GT,
+ BT_QUOT,
+ BT_APOS,
+ BT_EQUALS,
+ BT_QUEST,
+ BT_EXCL,
+ BT_SOL,
+ BT_SEMI,
+ BT_NUM,
+ BT_LSQB,
+ BT_S,
+ BT_NMSTRT,
+ BT_COLON,
+ BT_HEX,
+ BT_DIGIT,
+ BT_NAME,
+ BT_MINUS,
+ BT_OTHER, /* known not to be a name or name start character */
+ BT_NONASCII, /* might be a name or name start character */
+ BT_PERCNT,
+ BT_LPAR,
+ BT_RPAR,
+ BT_AST,
+ BT_PLUS,
+ BT_COMMA,
+ BT_VERBAR
};
#include <stddef.h>
diff --git a/src/lib/expat/xmltok_ns.c b/src/lib/expat/xmltok_ns.c
index c3b88fdf4e3..94f8506dd0d 100644
--- a/src/lib/expat/xmltok_ns.c
+++ b/src/lib/expat/xmltok_ns.c
@@ -8,108 +8,108 @@
const ENCODING *
NS(XmlGetUtf8InternalEncoding)(void)
{
- return &ns(internal_utf8_encoding).enc;
+ return &ns(internal_utf8_encoding).enc;
}
const ENCODING *
NS(XmlGetUtf16InternalEncoding)(void)
{
#if BYTEORDER == 1234
- return &ns(internal_little2_encoding).enc;
+ return &ns(internal_little2_encoding).enc;
#elif BYTEORDER == 4321
- return &ns(internal_big2_encoding).enc;
+ return &ns(internal_big2_encoding).enc;
#else
- const short n = 1;
- return (*(const char *)&n
- ? &ns(internal_little2_encoding).enc
- : &ns(internal_big2_encoding).enc);
+ const short n = 1;
+ return (*(const char *)&n
+ ? &ns(internal_little2_encoding).enc
+ : &ns(internal_big2_encoding).enc);
#endif
}
static const ENCODING * const NS(encodings)[] = {
- &ns(latin1_encoding).enc,
- &ns(ascii_encoding).enc,
- &ns(utf8_encoding).enc,
- &ns(big2_encoding).enc,
- &ns(big2_encoding).enc,
- &ns(little2_encoding).enc,
- &ns(utf8_encoding).enc /* NO_ENC */
+ &ns(latin1_encoding).enc,
+ &ns(ascii_encoding).enc,
+ &ns(utf8_encoding).enc,
+ &ns(big2_encoding).enc,
+ &ns(big2_encoding).enc,
+ &ns(little2_encoding).enc,
+ &ns(utf8_encoding).enc /* NO_ENC */
};
static int PTRCALL
NS(initScanProlog)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
- return initScan(NS(encodings), (const INIT_ENCODING *)enc,
- XML_PROLOG_STATE, ptr, end, nextTokPtr);
+ return initScan(NS(encodings), (const INIT_ENCODING *)enc,
+ XML_PROLOG_STATE, ptr, end, nextTokPtr);
}
static int PTRCALL
NS(initScanContent)(const ENCODING *enc, const char *ptr, const char *end,
- const char **nextTokPtr)
+ const char **nextTokPtr)
{
- return initScan(NS(encodings), (const INIT_ENCODING *)enc,
- XML_CONTENT_STATE, ptr, end, nextTokPtr);
+ return initScan(NS(encodings), (const INIT_ENCODING *)enc,
+ XML_CONTENT_STATE, ptr, end, nextTokPtr);
}
int
NS(XmlInitEncoding)(INIT_ENCODING *p, const ENCODING **encPtr,
- const char *name)
+ const char *name)
{
- int i = getEncodingIndex(name);
- if (i == UNKNOWN_ENC)
- return 0;
- SET_INIT_ENC_INDEX(p, i);
- p->initEnc.scanners[XML_PROLOG_STATE] = NS(initScanProlog);
- p->initEnc.scanners[XML_CONTENT_STATE] = NS(initScanContent);
- p->initEnc.updatePosition = initUpdatePosition;
- p->encPtr = encPtr;
- *encPtr = &(p->initEnc);
- return 1;
+ int i = getEncodingIndex(name);
+ if (i == UNKNOWN_ENC)
+ return 0;
+ SET_INIT_ENC_INDEX(p, i);
+ p->initEnc.scanners[XML_PROLOG_STATE] = NS(initScanProlog);
+ p->initEnc.scanners[XML_CONTENT_STATE] = NS(initScanContent);
+ p->initEnc.updatePosition = initUpdatePosition;
+ p->encPtr = encPtr;
+ *encPtr = &(p->initEnc);
+ return 1;
}
static const ENCODING *
NS(findEncoding)(const ENCODING *enc, const char *ptr, const char *end)
{
#define ENCODING_MAX 128
- char buf[ENCODING_MAX];
- char *p = buf;
- int i;
- XmlUtf8Convert(enc, &ptr, end, &p, p + ENCODING_MAX - 1);
- if (ptr != end)
- return 0;
- *p = 0;
- if (streqci(buf, KW_UTF_16) && enc->minBytesPerChar == 2)
- return enc;
- i = getEncodingIndex(buf);
- if (i == UNKNOWN_ENC)
- return 0;
- return NS(encodings)[i];
+ char buf[ENCODING_MAX];
+ char *p = buf;
+ int i;
+ XmlUtf8Convert(enc, &ptr, end, &p, p + ENCODING_MAX - 1);
+ if (ptr != end)
+ return 0;
+ *p = 0;
+ if (streqci(buf, KW_UTF_16) && enc->minBytesPerChar == 2)
+ return enc;
+ i = getEncodingIndex(buf);
+ if (i == UNKNOWN_ENC)
+ return 0;
+ return NS(encodings)[i];
}
int
NS(XmlParseXmlDecl)(int isGeneralTextEntity,
- const ENCODING *enc,
- const char *ptr,
- const char *end,
- const char **badPtr,
- const char **versionPtr,
- const char **versionEndPtr,
- const char **encodingName,
- const ENCODING **encoding,
- int *standalone)
+ const ENCODING *enc,
+ const char *ptr,
+ const char *end,
+ const char **badPtr,
+ const char **versionPtr,
+ const char **versionEndPtr,
+ const char **encodingName,
+ const ENCODING **encoding,
+ int *standalone)
{
- return doParseXmlDecl(NS(findEncoding),
- isGeneralTextEntity,
- enc,
- ptr,
- end,
- badPtr,
- versionPtr,
- versionEndPtr,
- encodingName,
- encoding,
- standalone);
+ return doParseXmlDecl(NS(findEncoding),
+ isGeneralTextEntity,
+ enc,
+ ptr,
+ end,
+ badPtr,
+ versionPtr,
+ versionEndPtr,
+ encodingName,
+ encoding,
+ standalone);
}
#endif /* XML_TOK_NS_C */
diff --git a/src/lib/formats/a26_cas.c b/src/lib/formats/a26_cas.c
index feceba102d9..5d557626912 100644
--- a/src/lib/formats/a26_cas.c
+++ b/src/lib/formats/a26_cas.c
@@ -8,11 +8,11 @@ Atari 2600 SuperCharger support
#include "formats/a26_cas.h"
-#define A26_CAS_SIZE 8448
-#define A26_WAV_FREQUENCY 44100
-#define BIT_ZERO_LENGTH 10
-#define BIT_ONE_LENGTH 15
-#define ZEROS_ONES 2755
+#define A26_CAS_SIZE 8448
+#define A26_WAV_FREQUENCY 44100
+#define BIT_ZERO_LENGTH 10
+#define BIT_ONE_LENGTH 15
+#define ZEROS_ONES 2755
static const UINT16 one_wave[BIT_ONE_LENGTH] = {
0x2AE5, 0x4E60, 0x644E, 0x68E4, 0x5B56, 0x3DFE, 0x15ED, 0xEA13, 0xC202, 0xA4AA,
@@ -37,7 +37,7 @@ static int a26_cas_output_wave( INT16 **buffer, INT16 wave_data, int length ) {
static int a26_cas_output_bit( INT16 **buffer, int bit ) {
int size = 0;
- int bit_size = bit ? BIT_ONE_LENGTH : BIT_ZERO_LENGTH;
+ int bit_size = bit ? BIT_ONE_LENGTH : BIT_ZERO_LENGTH;
const INT16 *p = bit ? (const INT16 *)one_wave : (const INT16 *)zero_wave;
int i;
@@ -49,8 +49,8 @@ static int a26_cas_output_bit( INT16 **buffer, int bit ) {
}
static int a26_cas_output_byte( INT16 **buffer, UINT8 byte ) {
- int size = 0;
- int i;
+ int size = 0;
+ int i;
for( i = 0; i < 8; i++, byte <<= 1 ) {
size += a26_cas_output_bit( buffer, ( ( byte & 0x80 ) ? 1 : 0 ) );
@@ -59,15 +59,15 @@ static int a26_cas_output_byte( INT16 **buffer, UINT8 byte ) {
}
static int a26_cas_clearing_tone( INT16 **buffer ) {
- int size = 0;
+ int size = 0;
size += a26_cas_output_wave( buffer, 0, 44100 );
return size;
}
static int a26_cas_zeros_ones( INT16 **buffer ) {
- int size = 0;
- int i;
+ int size = 0;
+ int i;
for ( i = 0; i < ZEROS_ONES; i++ ) {
size += a26_cas_output_bit( buffer, 0 );
@@ -79,8 +79,8 @@ static int a26_cas_zeros_ones( INT16 **buffer ) {
}
static int a26_cas_output_contents( INT16 **buffer, const UINT8 *bytes ) {
- int size = 0;
- int i, pages, j;
+ int size = 0;
+ int i, pages, j;
/* There are 8 header bytes */
for( i = 0; i < 8; i++ ) {
@@ -102,7 +102,7 @@ static int a26_cas_output_contents( INT16 **buffer, const UINT8 *bytes ) {
}
static int a26_cas_do_work( INT16 **buffer, const UINT8 *bytes ) {
- int size = 0;
+ int size = 0;
/* Output clearing tone */
size += a26_cas_clearing_tone( buffer );
@@ -120,7 +120,7 @@ static int a26_cas_do_work( INT16 **buffer, const UINT8 *bytes ) {
}
static int a26_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes ) {
- INT16 *p = buffer;
+ INT16 *p = buffer;
return a26_cas_do_work( &p, (const UINT8 *)bytes );
}
@@ -163,4 +163,3 @@ static const struct CassetteFormat a26_cassette_format = {
CASSETTE_FORMATLIST_START(a26_cassette_formats)
CASSETTE_FORMAT(a26_cassette_format)
CASSETTE_FORMATLIST_END
-
diff --git a/src/lib/formats/ace_tap.c b/src/lib/formats/ace_tap.c
index 3cabe2e4ec4..b57dcb03cd7 100644
--- a/src/lib/formats/ace_tap.c
+++ b/src/lib/formats/ace_tap.c
@@ -10,9 +10,9 @@ For more information see:
#include "ace_tap.h"
-#define SMPLO -32768
-#define SILENCE 0
-#define SMPHI 32767
+#define SMPLO -32768
+#define SILENCE 0
+#define SMPHI 32767
static int cas_size;
@@ -79,7 +79,7 @@ INLINE int ace_tap_byte(INT16 *buffer, int sample_pos, UINT8 data)
static int ace_handle_tap(INT16 *buffer, const UINT8 *casdata)
{
- int data_pos, sample_count;
+ int data_pos, sample_count;
/* Make sure the file starts with a valid header */
if ( cas_size < 0x1C )
@@ -92,8 +92,8 @@ static int ace_handle_tap(INT16 *buffer, const UINT8 *casdata)
while( data_pos < cas_size )
{
- UINT16 block_size;
- int i;
+ UINT16 block_size;
+ int i;
/* Handle a block of tape data */
block_size = casdata[data_pos] + ( casdata[data_pos + 1] << 8 );
@@ -152,13 +152,13 @@ static int ace_tap_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller ace_legacy_fill_wave =
{
- ace_tap_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- ace_tap_to_wav_size, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ ace_tap_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ ace_tap_to_wav_size, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
diff --git a/src/lib/formats/ace_tap.h b/src/lib/formats/ace_tap.h
index 382d97697a4..12ce3b7a8a8 100644
--- a/src/lib/formats/ace_tap.h
+++ b/src/lib/formats/ace_tap.h
@@ -26,4 +26,3 @@ struct ace_tape_t
CASSETTE_FORMATLIST_EXTERN(ace_cassette_formats);
#endif /* ACE_TAP_H */
-
diff --git a/src/lib/formats/adam_cas.h b/src/lib/formats/adam_cas.h
index a1e794c2981..99e8b7bd481 100644
--- a/src/lib/formats/adam_cas.h
+++ b/src/lib/formats/adam_cas.h
@@ -14,4 +14,3 @@
CASSETTE_FORMATLIST_EXTERN(coleco_adam_cassette_formats);
#endif
-
diff --git a/src/lib/formats/ami_dsk.c b/src/lib/formats/ami_dsk.c
index e198a7213be..c1a187bd01e 100644
--- a/src/lib/formats/ami_dsk.c
+++ b/src/lib/formats/ami_dsk.c
@@ -104,7 +104,7 @@ bool adf_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
is_hd = true;
tracks = 80;
}
-
+
if (!is_hd) {
image->set_variant(floppy_image::DSDD);
for(int track=0; track < tracks; track++) {
@@ -172,8 +172,8 @@ bool adf_format::save(io_generic *io, floppy_image *image)
for(int i=0; i<track_size; i++)
if(g32(trackbuf, track_size, i) == 0x44894489 &&
- (g32(trackbuf, track_size, i+384) & 0x55555555) == checksum(trackbuf, track_size, i+32, 10) &&
- (g32(trackbuf, track_size, i+448) & 0x55555555) == checksum(trackbuf, track_size, i+480, 256)) {
+ (g32(trackbuf, track_size, i+384) & 0x55555555) == checksum(trackbuf, track_size, i+32, 10) &&
+ (g32(trackbuf, track_size, i+448) & 0x55555555) == checksum(trackbuf, track_size, i+480, 256)) {
UINT32 head = ((g32(trackbuf, track_size, i+32) & 0x55555555) << 1) | (g32(trackbuf, track_size, i+64) & 0x55555555);
int sect = (head >> 8) & 0xff;
diff --git a/src/lib/formats/ap2_dsk.c b/src/lib/formats/ap2_dsk.c
index 8e18fbb9383..4fde450ab69 100644
--- a/src/lib/formats/ap2_dsk.c
+++ b/src/lib/formats/ap2_dsk.c
@@ -14,9 +14,9 @@
#include "basicdsk.h"
-#define APPLE2_IMAGE_DO 0
-#define APPLE2_IMAGE_PO 1
-#define APPLE2_IMAGE_NIB 2
+#define APPLE2_IMAGE_DO 0
+#define APPLE2_IMAGE_PO 1
+#define APPLE2_IMAGE_NIB 2
/* used in for all Apple II images */
@@ -140,9 +140,9 @@ static FLOPPY_IDENTIFY(apple2_dsk_identify)
if (size == expected_size)
*vote = 100;
else if ((size > expected_size) && ((size - expected_size) < 8))
- *vote = 90; /* tolerate images with up to eight fewer/extra bytes (bug #638) */
+ *vote = 90; /* tolerate images with up to eight fewer/extra bytes (bug #638) */
else if ((size < expected_size) && ((expected_size - size) < 8))
- *vote = 90; /* tolerate images with up to eight fewer/extra bytes (bug #638) */
+ *vote = 90; /* tolerate images with up to eight fewer/extra bytes (bug #638) */
else
*vote = 0;
return FLOPPY_ERROR_SUCCESS;
@@ -492,19 +492,19 @@ static UINT32 apple2_get_track_size(floppy_image_legacy *floppy, int head, int t
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( apple2 )
- LEGACY_FLOPPY_OPTION( apple2_do, "do,dsk,bin", "Apple ][ DOS order disk image", apple2_dsk_identify, apple2_do_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple2_do, "do,dsk,bin", "Apple ][ DOS order disk image", apple2_dsk_identify, apple2_do_construct, NULL,
HEADS([1])
TRACKS([35])
SECTORS([16])
SECTOR_LENGTH([256])
FIRST_SECTOR_ID([0]))
- LEGACY_FLOPPY_OPTION( apple2_po, "po,dsk,bin", "Apple ][ ProDOS order disk image", apple2_dsk_identify, apple2_po_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple2_po, "po,dsk,bin", "Apple ][ ProDOS order disk image", apple2_dsk_identify, apple2_po_construct, NULL,
HEADS([1])
TRACKS([35])
SECTORS([16])
SECTOR_LENGTH([256])
FIRST_SECTOR_ID([0]))
- LEGACY_FLOPPY_OPTION( apple2_nib, "dsk,nib", "Apple ][ Nibble order disk image", apple2_nib_identify, apple2_nib_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple2_nib, "dsk,nib", "Apple ][ Nibble order disk image", apple2_nib_identify, apple2_nib_construct, NULL,
HEADS([1])
TRACKS([35])
SECTORS([16])
@@ -1280,13 +1280,13 @@ bool a2_rwts18_format::save(io_generic *io, floppy_image *image)
data[i] = gcr6bw_tb[gb(buf, ts, pos, wrap)] ;//^ c;
c ^= data[i];
/*if (((i&0x3)+1)==0x04) {
- printf("%c", ((((data[i-3]&0x30)<<2)|((data[i-2]&0x3F)>>0))&0x3F)+0x40);
- printf("%c", ((((data[i-3]&0x0C)<<4)|((data[i-1]&0x3F)>>0))&0x3F)+0x40);
- printf("%c", ((((data[i-3]&0x03)<<6)|((data[i-0]&0x3F)>>0))&0x3F)+0x40);
- *dest++ = ((data[i-3]&0x30)<<2)|((data[i-2]&0x3F)>>0);
- *dest++ = ((data[i-3]&0x0C)<<4)|((data[i-1]&0x3F)>>0);
- *dest++ = ((data[i-3]&0x03)<<6)|((data[i-0]&0x3F)>>0);
- }*/
+ printf("%c", ((((data[i-3]&0x30)<<2)|((data[i-2]&0x3F)>>0))&0x3F)+0x40);
+ printf("%c", ((((data[i-3]&0x0C)<<4)|((data[i-1]&0x3F)>>0))&0x3F)+0x40);
+ printf("%c", ((((data[i-3]&0x03)<<6)|((data[i-0]&0x3F)>>0))&0x3F)+0x40);
+ *dest++ = ((data[i-3]&0x30)<<2)|((data[i-2]&0x3F)>>0);
+ *dest++ = ((data[i-3]&0x0C)<<4)|((data[i-1]&0x3F)>>0);
+ *dest++ = ((data[i-3]&0x03)<<6)|((data[i-0]&0x3F)>>0);
+ }*/
// printf("%02x ", data[i]);
// if (((i&0xf)+1)==0x10) printf("\n");
}
@@ -1299,15 +1299,15 @@ bool a2_rwts18_format::save(io_generic *io, floppy_image *image)
}
/*if (se == 0) // dump some debug data to help find the lfsr before sector 5
- {
- printf("Data Postamble was 0x%08x\n", dpost);
- for(int i=0; i<0x400; i++) {
- data[i] = gcr6bw_tb[gb(buf, ts, pos, wrap)] ;//^ c;
- c ^= data[i];
- printf("%02x ", data[i]);
- if (((i&0xf)+1)==0x10) printf("\n");
- }
- }*/
+ {
+ printf("Data Postamble was 0x%08x\n", dpost);
+ for(int i=0; i<0x400; i++) {
+ data[i] = gcr6bw_tb[gb(buf, ts, pos, wrap)] ;//^ c;
+ c ^= data[i];
+ printf("%02x ", data[i]);
+ if (((i&0xf)+1)==0x10) printf("\n");
+ }
+ }*/
// only write it if the bitfield of the track shows datagood is NOT set.
// if it is set we don't want to overwrite a guaranteed good read with a bad one
diff --git a/src/lib/formats/ap_dsk35.c b/src/lib/formats/ap_dsk35.c
index ee827fef035..092c0831898 100644
--- a/src/lib/formats/ap_dsk35.c
+++ b/src/lib/formats/ap_dsk35.c
@@ -123,8 +123,8 @@ static const UINT8 apple35_tracklen_800kb[80] =
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10,
- 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
- 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8
+ 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9,
+ 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8
};
/* blocks of data used to nibblize tracks */
@@ -180,14 +180,14 @@ static const INT16 rev_diskbytes[] =
static const UINT8 blk1[] =
{
/*0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
- 0xFF, 0xFF, 0xD5, 0xAA, 0x96*/
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xD5, 0xAA, 0x96*/
0xFF,
0xFF, 0x3F, 0xCF, 0xF3, 0xFC, 0xFF,
0xFF, 0x3F, 0xCF, 0xF3, 0xFC, 0xFF,
@@ -243,15 +243,15 @@ int apple35_sectors_per_track(floppy_image_legacy *image, int track)
*/
static void sony_nibblize35(const UINT8 *in, UINT8 *nib_ptr, UINT8 *csum)
{
- int i, j;
+ int i, j;
UINT32 c1, c2, c3, c4;
UINT8 val;
UINT8 w1, w2, w3, w4;
UINT8 b1[175], b2[175], b3[175];
/* Copy from the user's buffer to our buffer, while computing
- * the three-byte data checksum
- */
+ * the three-byte data checksum
+ */
i = 0;
j = 0;
@@ -327,7 +327,7 @@ static void sony_nibblize35(const UINT8 *in, UINT8 *nib_ptr, UINT8 *csum)
*/
static void sony_denibblize35(UINT8 *out, const UINT8 *nib_ptr, UINT8 *checksum)
{
- int i, j;
+ int i, j;
UINT32 c1,c2,c3,c4;
UINT8 val;
UINT8 w1,w2,w3=0,w4;
@@ -348,8 +348,8 @@ static void sony_denibblize35(UINT8 *out, const UINT8 *nib_ptr, UINT8 *checksum)
}
/* Copy from the user's buffer to our buffer, while computing
- * the three-byte data checksum
- */
+ * the three-byte data checksum
+ */
i = 0;
j = 0;
@@ -429,8 +429,8 @@ UINT8 sony_fetchtrack(const UINT8 *buffer, size_t buffer_len, size_t *pos)
while ((data & 0x80) == 0)
{
/* this code looks weird because it isn't simply rotating the new bit
- * in, but for some reason it won't work if I rotate the bit in; I
- * have to match the algorithm used by the old code */
+ * in, but for some reason it won't work if I rotate the bit in; I
+ * have to match the algorithm used by the old code */
data <<= 1;
data |= (buffer[*pos / 8] >> (8 - ((*pos % 8) + 1)));
(*pos)++;
@@ -471,7 +471,7 @@ static UINT32 apple35_get_offset(floppy_image_legacy *floppy, int head, int trac
*tag_offset = sector_index * 12;
if (*tag_offset >= tag->tag_size)
*tag_offset = ~0;
- *tag_offset += tag->tag_offset;
+ *tag_offset += tag->tag_offset;
}
return sector_index * 0x200 + tag->data_offset;
}
@@ -483,9 +483,9 @@ static floperr_t apple35_read_sector(floppy_image_legacy *floppy, int head, int
UINT32 data_offset;
data_offset = apple35_get_offset(floppy, head, track, sector, NULL);
if (data_offset == ~0)
- {
+ {
return FLOPPY_ERROR_SEEKERROR;
- }
+ }
floppy_image_read(floppy, buffer, data_offset, buflen);
return FLOPPY_ERROR_SUCCESS;
}
@@ -515,17 +515,17 @@ static floperr_t apple35_read_sector_td(floppy_image_legacy *floppy, int head, i
/* first read the sector */
err = apple35_read_sector(floppy, head, track, sector, ((UINT8 *) buffer) + 12, 512);
if (err)
- {
+ {
return err;
- }
+ }
/* read the tag data, if possible */
memset(buffer, '\0', 12);
apple35_get_offset(floppy, head, track, sector, &tag_offset);
if (tag_offset != ~0)
- {
+ {
floppy_image_read(floppy, buffer, tag_offset, 12);
- }
+ }
return FLOPPY_ERROR_SUCCESS;
}
@@ -623,9 +623,9 @@ static floperr_t apple35_read_track(floppy_image_legacy *floppy, int head, int t
/* read the sector */
err = apple35_read_sector_td(floppy, head, track, sector, sector_data, ARRAY_LENGTH(sector_data));
if (err)
- {
+ {
return err;
- }
+ }
sony_nibblize35(sector_data, nibble_data, checksum);
@@ -733,7 +733,7 @@ static floperr_t apple35_write_track(floppy_image_legacy *floppy, int head, int
while((val = sony_fetchtrack((UINT8*)buffer, buflen, &pos)) == 0xFF)
j++;
if (val != 0xD5)
- continue; /* lost bit slip mark! */
+ continue; /* lost bit slip mark! */
j++;
if (sony_fetchtrack((UINT8*)buffer, buflen, &pos) != 0xAA)
@@ -761,9 +761,9 @@ static floperr_t apple35_write_track(floppy_image_legacy *floppy, int head, int
sony_fetchtrack((UINT8*)buffer, buflen, &pos);
}
- sony_fetchtrack((UINT8*)buffer, buflen, &pos); /* should get 0xDE */
- sony_fetchtrack((UINT8*)buffer, buflen, &pos); /* should get 0xAA */
- sony_fetchtrack((UINT8*)buffer, buflen, &pos); /* should get 0xFF */
+ sony_fetchtrack((UINT8*)buffer, buflen, &pos); /* should get 0xDE */
+ sony_fetchtrack((UINT8*)buffer, buflen, &pos); /* should get 0xAA */
+ sony_fetchtrack((UINT8*)buffer, buflen, &pos); /* should get 0xFF */
/* did we already write this sector? */
if ((found_sectors & (1 << sector)) == 0)
@@ -886,17 +886,17 @@ static FLOPPY_CONSTRUCT(apple35_raw_construct)
struct header_diskcopy
{
- UINT8 disk_name[64]; /* name of the disk */
- UINT32 data_size; /* total size of data for all sectors (512*number_of_sectors) */
- UINT32 tag_size; /* total size of tag data for all sectors (12*number_of_sectors for GCR 3.5" floppies, 20*number_of_sectors for HD20, 0 otherwise) */
- UINT32 data_checksum; /* CRC32 checksum of all sector data */
- UINT32 tag_checksum; /* CRC32 checksum of all tag data */
- UINT8 disk_format; /* 0 = 400K, 1 = 800K, 2 = 720K, 3 = 1440K (other values reserved) */
- UINT8 format_byte; /* should be $00 Apple II, $01 Lisa, $02 Mac MFS ??? */
+ UINT8 disk_name[64]; /* name of the disk */
+ UINT32 data_size; /* total size of data for all sectors (512*number_of_sectors) */
+ UINT32 tag_size; /* total size of tag data for all sectors (12*number_of_sectors for GCR 3.5" floppies, 20*number_of_sectors for HD20, 0 otherwise) */
+ UINT32 data_checksum; /* CRC32 checksum of all sector data */
+ UINT32 tag_checksum; /* CRC32 checksum of all tag data */
+ UINT8 disk_format; /* 0 = 400K, 1 = 800K, 2 = 720K, 3 = 1440K (other values reserved) */
+ UINT8 format_byte; /* should be $00 Apple II, $01 Lisa, $02 Mac MFS ??? */
/* $12 = 400K, $22 = >400K Macintosh (DiskCopy uses this value for
- all Apple II disks not 800K in size, and even for some of those),
- $24 = 800K Apple II disk */
- UINT16 magic; /* always $0100 (otherwise, the file may be in a different format. */
+ all Apple II disks not 800K in size, and even for some of those),
+ $24 = 800K Apple II disk */
+ UINT16 magic; /* always $0100 (otherwise, the file may be in a different format. */
};
@@ -1021,8 +1021,8 @@ static FLOPPY_CONSTRUCT(apple35_diskcopy_construct)
struct header_2img
{
- char magic[4]; /* '2IMG' */
- char creator[4]; /* signature; 'MESS' for MESS */
+ char magic[4]; /* '2IMG' */
+ char creator[4]; /* signature; 'MESS' for MESS */
UINT16 header_length;
UINT16 version;
UINT32 image_format;
@@ -1037,10 +1037,10 @@ struct header_2img
UINT32 padding[4];
};
-#define IMAGE_FORMAT_DO 0
-#define IMAGE_FORMAT_PO 1
-#define IMAGE_FORMAT_NIB 2
-#define IMAGE_FLAGS_LOCKED 0x80000000
+#define IMAGE_FORMAT_DO 0
+#define IMAGE_FORMAT_PO 1
+#define IMAGE_FORMAT_NIB 2
+#define IMAGE_FLAGS_LOCKED 0x80000000
@@ -1070,17 +1070,17 @@ static floperr_t apple35_2img_decode(floppy_image_legacy *floppy, UINT32 *image_
return FLOPPY_ERROR_INVALIDIMAGE;
}
- header.header_length = LITTLE_ENDIANIZE_INT16(header.header_length);
- header.version = LITTLE_ENDIANIZE_INT16(header.version);
- header.image_format = LITTLE_ENDIANIZE_INT32(header.image_format);
- header.flags = LITTLE_ENDIANIZE_INT32(header.flags);
- header.block_count = LITTLE_ENDIANIZE_INT32(header.block_count);
- header.data_offset = LITTLE_ENDIANIZE_INT32(header.data_offset);
- header.data_length = LITTLE_ENDIANIZE_INT32(header.data_length);
- header.comment_offset = LITTLE_ENDIANIZE_INT32(header.comment_offset);
- header.comment_length = LITTLE_ENDIANIZE_INT32(header.comment_length);
- header.creator_offset = LITTLE_ENDIANIZE_INT32(header.creator_offset);
- header.creator_length = LITTLE_ENDIANIZE_INT32(header.creator_length);
+ header.header_length = LITTLE_ENDIANIZE_INT16(header.header_length);
+ header.version = LITTLE_ENDIANIZE_INT16(header.version);
+ header.image_format = LITTLE_ENDIANIZE_INT32(header.image_format);
+ header.flags = LITTLE_ENDIANIZE_INT32(header.flags);
+ header.block_count = LITTLE_ENDIANIZE_INT32(header.block_count);
+ header.data_offset = LITTLE_ENDIANIZE_INT32(header.data_offset);
+ header.data_length = LITTLE_ENDIANIZE_INT32(header.data_length);
+ header.comment_offset = LITTLE_ENDIANIZE_INT32(header.comment_offset);
+ header.comment_length = LITTLE_ENDIANIZE_INT32(header.comment_length);
+ header.creator_offset = LITTLE_ENDIANIZE_INT32(header.creator_offset);
+ header.creator_length = LITTLE_ENDIANIZE_INT32(header.creator_length);
// at least some images "in the wild" (e.g. TOSEC Minor Set 1) have big-endian data sizes
// even though that's against the .2mg spec
@@ -1138,10 +1138,10 @@ static FLOPPY_CONSTRUCT(apple35_2img_construct)
data_size = 80*sides*10*512;
memset(&header, 0, sizeof(header));
- header.header_length = LITTLE_ENDIANIZE_INT16(sizeof(header));
- header.block_count = LITTLE_ENDIANIZE_INT32(80*sides*10);
- header.data_offset = LITTLE_ENDIANIZE_INT32(data_offset);
- header.data_length = LITTLE_ENDIANIZE_INT32(data_size);
+ header.header_length = LITTLE_ENDIANIZE_INT16(sizeof(header));
+ header.block_count = LITTLE_ENDIANIZE_INT32(80*sides*10);
+ header.data_offset = LITTLE_ENDIANIZE_INT32(data_offset);
+ header.data_length = LITTLE_ENDIANIZE_INT32(data_size);
floppy_image_write(floppy, &header, 0, sizeof(header));
floppy_image_write_filler(floppy, 0, sizeof(header), data_size);
@@ -1154,11 +1154,11 @@ static FLOPPY_CONSTRUCT(apple35_2img_construct)
return err;
if (data_size == 80*1*10*512)
- sides = 1; /* single sided */
+ sides = 1; /* single sided */
else if (data_size == 80*2*10*512)
- sides = 2; /* double sided */
+ sides = 2; /* double sided */
else
- sides = 2; /* unknown... what to do... */
+ sides = 2; /* unknown... what to do... */
}
return apple35_construct(floppy, data_offset, data_size,
@@ -1168,12 +1168,12 @@ static FLOPPY_CONSTRUCT(apple35_2img_construct)
LEGACY_FLOPPY_OPTIONS_START( apple35_mac )
- LEGACY_FLOPPY_OPTION( apple35_raw, "dsk,img,image", "Apple raw 3.5\" disk image", apple35_raw_identify, apple35_raw_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple35_raw, "dsk,img,image", "Apple raw 3.5\" disk image", apple35_raw_identify, apple35_raw_construct, NULL,
HEADS([1]-2)
TRACKS([80])
SECTOR_LENGTH([512])
FIRST_SECTOR_ID([0]))
- LEGACY_FLOPPY_OPTION( apple35_dc, "dc,dc42,dsk,img,image", "Apple DiskCopy disk image", apple35_diskcopy_identify, apple35_diskcopy_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple35_dc, "dc,dc42,dsk,img,image", "Apple DiskCopy disk image", apple35_diskcopy_identify, apple35_diskcopy_construct, NULL,
HEADS([1]-2)
TRACKS([80])
SECTOR_LENGTH([512])
@@ -1181,17 +1181,17 @@ LEGACY_FLOPPY_OPTIONS_START( apple35_mac )
LEGACY_FLOPPY_OPTIONS_END
LEGACY_FLOPPY_OPTIONS_START( apple35_iigs )
- LEGACY_FLOPPY_OPTION( apple35_raw, "dsk,img,image", "Apple raw 3.5\" disk image", apple35_raw_identify, apple35_raw_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple35_raw, "dsk,img,image", "Apple raw 3.5\" disk image", apple35_raw_identify, apple35_raw_construct, NULL,
HEADS([1]-2)
TRACKS([80])
SECTOR_LENGTH([512])
FIRST_SECTOR_ID([0]))
- LEGACY_FLOPPY_OPTION( apple35_dc, "dc,dsk,img,image", "Apple DiskCopy disk image", apple35_diskcopy_identify, apple35_diskcopy_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple35_dc, "dc,dsk,img,image", "Apple DiskCopy disk image", apple35_diskcopy_identify, apple35_diskcopy_construct, NULL,
HEADS([1]-2)
TRACKS([80])
SECTOR_LENGTH([512])
FIRST_SECTOR_ID([0]))
- LEGACY_FLOPPY_OPTION( apple35_2img, "2img,2mg", "Apple ][gs 2IMG disk image", apple35_2img_identify, apple35_2img_construct, NULL,
+ LEGACY_FLOPPY_OPTION( apple35_2img, "2img,2mg", "Apple ][gs 2IMG disk image", apple35_2img_identify, apple35_2img_construct, NULL,
HEADS([1]-2)
TRACKS([80])
SECTOR_LENGTH([512])
diff --git a/src/lib/formats/apf_apt.c b/src/lib/formats/apf_apt.c
index 1b079919a52..2e5d9c9030f 100644
--- a/src/lib/formats/apf_apt.c
+++ b/src/lib/formats/apf_apt.c
@@ -9,7 +9,7 @@
#define WAVEENTRY_NULL 0
/* frequency of wave */
-#define APF_WAV_FREQUENCY 11050
+#define APF_WAV_FREQUENCY 11050
#define APF_APT_BIT_0_LENGTH ((int)(APF_WAV_FREQUENCY*0.0005))
#define APF_APT_BIT_1_LENGTH ((int)(APF_WAV_FREQUENCY*0.001))
@@ -117,13 +117,13 @@ static int apf_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller apf_legacy_fill_wave =
{
- apf_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- apf_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- APF_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ apf_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ apf_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ APF_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
diff --git a/src/lib/formats/apridisk.c b/src/lib/formats/apridisk.c
index 1998a72acfc..e331607405d 100644
--- a/src/lib/formats/apridisk.c
+++ b/src/lib/formats/apridisk.c
@@ -11,17 +11,17 @@
CONSTANTS
***************************************************************************/
-#define APR_HEADER_SIZE 128
+#define APR_HEADER_SIZE 128
/* sector types */
-#define APR_DELETED 0xe31d0000
-#define APR_MAGIC 0xe31d0001
-#define APR_COMMENT 0xe31d0002
-#define APR_CREATOR 0xe31d0003
+#define APR_DELETED 0xe31d0000
+#define APR_MAGIC 0xe31d0001
+#define APR_COMMENT 0xe31d0002
+#define APR_CREATOR 0xe31d0003
/* compression type */
-#define APR_UNCOMPRESSED 0x9e90
-#define APR_COMPRESSED 0x3e5a
+#define APR_UNCOMPRESSED 0x9e90
+#define APR_COMPRESSED 0x3e5a
static const char *apr_magic = "ACT Apricot disk image\x1a\x04";
diff --git a/src/lib/formats/basicdsk.c b/src/lib/formats/basicdsk.c
index 22d1e1216a8..6b6b11ee4d1 100644
--- a/src/lib/formats/basicdsk.c
+++ b/src/lib/formats/basicdsk.c
@@ -24,7 +24,7 @@ static floperr_t basicdsk_format_track(floppy_image_legacy *floppy, int head, in
-#define BASICDSK_TAG "basicdsktag"
+#define BASICDSK_TAG "basicdsktag"
struct basicdsk_tag
{
@@ -290,19 +290,19 @@ static void basicdsk_default_geometry(const struct FloppyFormat *format, struct
int sector_length;
memset(geometry, 0, sizeof(*geometry));
- err = option_resolution_getdefault(format->param_guidelines, PARAM_HEADS, &geometry->heads);
+ err = option_resolution_getdefault(format->param_guidelines, PARAM_HEADS, &geometry->heads);
assert(!err);
- err = option_resolution_getdefault(format->param_guidelines, PARAM_TRACKS, &geometry->tracks);
+ err = option_resolution_getdefault(format->param_guidelines, PARAM_TRACKS, &geometry->tracks);
assert(!err);
- err = option_resolution_getdefault(format->param_guidelines, PARAM_SECTORS, &geometry->sectors);
+ err = option_resolution_getdefault(format->param_guidelines, PARAM_SECTORS, &geometry->sectors);
assert(!err);
- err = option_resolution_getdefault(format->param_guidelines, PARAM_FIRST_SECTOR_ID, &geometry->first_sector_id);
+ err = option_resolution_getdefault(format->param_guidelines, PARAM_FIRST_SECTOR_ID, &geometry->first_sector_id);
assert(!err);
- err = option_resolution_getdefault(format->param_guidelines, PARAM_INTERLEAVE, &geometry->interleave);
+ err = option_resolution_getdefault(format->param_guidelines, PARAM_INTERLEAVE, &geometry->interleave);
if (err!=0) {
geometry->interleave = 1;
}
- err = option_resolution_getdefault(format->param_guidelines, PARAM_SECTOR_LENGTH, &sector_length);
+ err = option_resolution_getdefault(format->param_guidelines, PARAM_SECTOR_LENGTH, &sector_length);
assert(!err);
geometry->sector_length = sector_length;
@@ -349,4 +349,3 @@ FLOPPY_IDENTIFY(basicdsk_identify_default)
*vote = (floppy_image_size(floppy) == expected_size) ? 100 : 50;
return FLOPPY_ERROR_SUCCESS;
}
-
diff --git a/src/lib/formats/cassimg.c b/src/lib/formats/cassimg.c
index 9cb9dc1996f..76a64e64f14 100644
--- a/src/lib/formats/cassimg.c
+++ b/src/lib/formats/cassimg.c
@@ -15,11 +15,11 @@
/* debugging parameters */
-#define LOG_PUT_SAMPLES 0
-#define DUMP_CASSETTES 0
+#define LOG_PUT_SAMPLES 0
+#define DUMP_CASSETTES 0
-#define SAMPLES_PER_BLOCK 0x40000
-#define CASSETTE_FLAG_DIRTY 0x10000
+#define SAMPLES_PER_BLOCK 0x40000
+#define CASSETTE_FLAG_DIRTY 0x10000
CASSETTE_FORMATLIST_START(cassette_default_formats)
@@ -535,8 +535,8 @@ casserr_t cassette_put_samples(cassette_image *cassette, int channel,
if (LOG_PUT_SAMPLES)
{
LOG_FORMATS("cassette_put_samples(): Putting samples TIME=[%2.6g..%2.6g] INDEX=[%i..%i]\n",
- time_index, time_index + sample_period,
- (int)ranges.sample_first, (int)ranges.sample_last);
+ time_index, time_index + sample_period,
+ (int)ranges.sample_first, (int)ranges.sample_last);
}
for (sample_index = ranges.sample_first; sample_index <= ranges.sample_last; sample_index++)
@@ -588,7 +588,7 @@ casserr_t cassette_get_sample(cassette_image *cassette, int channel,
double time_index, double sample_period, INT32 *sample)
{
return cassette_get_samples(cassette, channel, time_index,
- sample_period, 1, 0, sample, CASSETTE_WAVEFORM_32BIT);
+ sample_period, 1, 0, sample, CASSETTE_WAVEFORM_32BIT);
}
@@ -597,7 +597,7 @@ casserr_t cassette_put_sample(cassette_image *cassette, int channel,
double time_index, double sample_period, INT32 sample)
{
return cassette_put_samples(cassette, channel, time_index,
- sample_period, 1, 0, &sample, CASSETTE_WAVEFORM_32BIT);
+ sample_period, 1, 0, &sample, CASSETTE_WAVEFORM_32BIT);
}
@@ -1056,5 +1056,3 @@ void cassette_dump(cassette_image *image, const char *filename)
fclose(f);
}
-
-
diff --git a/src/lib/formats/cassimg.h b/src/lib/formats/cassimg.h
index fd34c91dbaf..550e1d16a95 100644
--- a/src/lib/formats/cassimg.h
+++ b/src/lib/formats/cassimg.h
@@ -23,33 +23,33 @@
***************************************************************************/
-#define CASSETTE_FLAG_READWRITE 0
-#define CASSETTE_FLAG_READONLY 1
-#define CASSETTE_FLAG_NOSAVEONEXIT 0
-#define CASSETTE_FLAG_SAVEONEXIT 2
+#define CASSETTE_FLAG_READWRITE 0
+#define CASSETTE_FLAG_READONLY 1
+#define CASSETTE_FLAG_NOSAVEONEXIT 0
+#define CASSETTE_FLAG_SAVEONEXIT 2
-#define CASSETTE_WAVEFORM_8BIT 0
-#define CASSETTE_WAVEFORM_16BIT 2
-#define CASSETTE_WAVEFORM_16BIT_FLIP 3
-#define CASSETTE_WAVEFORM_32BIT 4
-#define CASSETTE_WAVEFORM_32BIT_FLIP 5
-#define CASSETTE_WAVEFORM_ENDIAN_FLIP 1
-#define CASSETTE_WAVEFORM_UNSIGNED 8
+#define CASSETTE_WAVEFORM_8BIT 0
+#define CASSETTE_WAVEFORM_16BIT 2
+#define CASSETTE_WAVEFORM_16BIT_FLIP 3
+#define CASSETTE_WAVEFORM_32BIT 4
+#define CASSETTE_WAVEFORM_32BIT_FLIP 5
+#define CASSETTE_WAVEFORM_ENDIAN_FLIP 1
+#define CASSETTE_WAVEFORM_UNSIGNED 8
-#define CASSETTE_MODULATION_SQUAREWAVE 0
-#define CASSETTE_MODULATION_SINEWAVE 1
+#define CASSETTE_MODULATION_SQUAREWAVE 0
+#define CASSETTE_MODULATION_SINEWAVE 1
#ifdef LSB_FIRST
-#define CASSETTE_WAVEFORM_16BITBE CASSETTE_WAVEFORM_16BIT_FLIP
-#define CASSETTE_WAVEFORM_16BITLE CASSETTE_WAVEFORM_16BIT
-#define CASSETTE_WAVEFORM_32BITBE CASSETTE_WAVEFORM_32BIT_FLIP
-#define CASSETTE_WAVEFORM_32BITLE CASSETTE_WAVEFORM_32BIT
+#define CASSETTE_WAVEFORM_16BITBE CASSETTE_WAVEFORM_16BIT_FLIP
+#define CASSETTE_WAVEFORM_16BITLE CASSETTE_WAVEFORM_16BIT
+#define CASSETTE_WAVEFORM_32BITBE CASSETTE_WAVEFORM_32BIT_FLIP
+#define CASSETTE_WAVEFORM_32BITLE CASSETTE_WAVEFORM_32BIT
#else
-#define CASSETTE_WAVEFORM_16BITBE CASSETTE_WAVEFORM_16BIT
-#define CASSETTE_WAVEFORM_16BITLE CASSETTE_WAVEFORM_16BIT_FLIP
-#define CASSETTE_WAVEFORM_32BITBE CASSETTE_WAVEFORM_32BIT
-#define CASSETTE_WAVEFORM_32BITLE CASSETTE_WAVEFORM_32BIT_FLIP
+#define CASSETTE_WAVEFORM_16BITBE CASSETTE_WAVEFORM_16BIT
+#define CASSETTE_WAVEFORM_16BITLE CASSETTE_WAVEFORM_16BIT_FLIP
+#define CASSETTE_WAVEFORM_32BITBE CASSETTE_WAVEFORM_32BIT
+#define CASSETTE_WAVEFORM_32BITLE CASSETTE_WAVEFORM_32BIT_FLIP
#endif
@@ -61,11 +61,11 @@
typedef enum
{
- CASSETTE_ERROR_SUCCESS, /* no error */
- CASSETTE_ERROR_INTERNAL, /* fatal internal error */
- CASSETTE_ERROR_UNSUPPORTED, /* this operation is unsupported */
- CASSETTE_ERROR_OUTOFMEMORY, /* ran out of memory */
- CASSETTE_ERROR_INVALIDIMAGE, /* invalid image */
+ CASSETTE_ERROR_SUCCESS, /* no error */
+ CASSETTE_ERROR_INTERNAL, /* fatal internal error */
+ CASSETTE_ERROR_UNSUPPORTED, /* this operation is unsupported */
+ CASSETTE_ERROR_OUTOFMEMORY, /* ran out of memory */
+ CASSETTE_ERROR_INVALIDIMAGE, /* invalid image */
CASSETTE_ERROR_INVALIDARG
}
casserr_t;
@@ -142,19 +142,19 @@ struct CassetteLegacyWaveFiller
extern const struct CassetteFormat wavfile_format;
/* macros for specifying format lists */
-#define CASSETTE_FORMATLIST_EXTERN(name) \
+#define CASSETTE_FORMATLIST_EXTERN(name) \
extern const struct CassetteFormat *const name[]
-#define CASSETTE_FORMATLIST_START(name) \
- const struct CassetteFormat *const name[] = \
- { \
- &wavfile_format, \
+#define CASSETTE_FORMATLIST_START(name) \
+ const struct CassetteFormat *const name[] = \
+ { \
+ &wavfile_format, \
-#define CASSETTE_FORMAT(name) \
- &(name), \
+#define CASSETTE_FORMAT(name) \
+ &(name), \
-#define CASSETTE_FORMATLIST_END \
- NULL \
+#define CASSETTE_FORMATLIST_END \
+ NULL \
};
CASSETTE_FORMATLIST_EXTERN(cassette_default_formats);
@@ -219,8 +219,8 @@ casserr_t cassette_put_modulated_data_bit(cassette_image *cassette, int channel,
void cassette_dump(cassette_image *image, const char *filename);
/* legacy code support */
-#define CODE_HEADER ((UINT8*)-1)
-#define CODE_TRAILER ((UINT8*)-2)
+#define CODE_HEADER ((UINT8*)-1)
+#define CODE_TRAILER ((UINT8*)-2)
casserr_t cassette_legacy_identify(cassette_image *cassette, struct CassetteOptions *opts,
const struct CassetteLegacyWaveFiller *legacy_args);
casserr_t cassette_legacy_construct(cassette_image *cassette,
diff --git a/src/lib/formats/cbm_tap.c b/src/lib/formats/cbm_tap.c
index 847934de6c8..a78b03df117 100644
--- a/src/lib/formats/cbm_tap.c
+++ b/src/lib/formats/cbm_tap.c
@@ -95,46 +95,46 @@ below could be not working. FP ]
#include "cbm_tap.h"
-#define CBM_WAV_FREQUENCY 44100
+#define CBM_WAV_FREQUENCY 44100
/* Systems */
-#define C64 0
-#define VIC20 1
-#define C16 2
+#define C64 0
+#define VIC20 1
+#define C16 2
/* Video standards */
-#define PAL 0
-#define NTSC 1
+#define PAL 0
+#define NTSC 1
/* Frequencies in [Hz] to determine the length of each pulse */
-#define C64_PAL 123156 /* 985248 / 8 */
-#define C64_NTSC 127841 /* 1022727 / 8 */
-#define VIC20_PAL 138551 /* 1108405 / 8 */
-#define VIC20_NTSC 127841 /* 1022727 / 8 */
-#define C16_PAL 110840 /* 886724 / 8 */
-#define C16_NTSC 111860 /* 894886 / 8 */
+#define C64_PAL 123156 /* 985248 / 8 */
+#define C64_NTSC 127841 /* 1022727 / 8 */
+#define VIC20_PAL 138551 /* 1108405 / 8 */
+#define VIC20_NTSC 127841 /* 1022727 / 8 */
+#define C16_PAL 110840 /* 886724 / 8 */
+#define C16_NTSC 111860 /* 894886 / 8 */
-#define PAUSE (CBM_WAV_FREQUENCY / 50) /* tap2wav uses this value for 0x00 in .TAP v0, instead of 0x100 */
+#define PAUSE (CBM_WAV_FREQUENCY / 50) /* tap2wav uses this value for 0x00 in .TAP v0, instead of 0x100 */
/* These values do not really matter, as long as the produced pulses
go above & below 0. However, for documentation purpose it would be
nice to find out which values were used by Commodore tapes. I was
not able to find any reference on the subject. */
-#define WAVE_HIGH (0x5a9e >> 1)
-#define WAVE_LOW -(0x5a9e >> 1)
-#define WAVE_PAUSE 0x80
+#define WAVE_HIGH (0x5a9e >> 1)
+#define WAVE_LOW -(0x5a9e >> 1)
+#define WAVE_PAUSE 0x80
#define CBM_HEADER_SIZE 20
-static INT16 wave_data = 0;
-static int len;
+static INT16 wave_data = 0;
+static int len;
/* This in fact gives the number of samples for half of the pulse */
INLINE int tap_data_to_samplecount(int data, int frequency)
{
// return (int) (0.5 * (0.5 + (((double)CBM_WAV_FREQUENCY / frequency) * (double)data))); // MESS TZX formula
- return (int) (0.5 * (((double)CBM_WAV_FREQUENCY / frequency) * (double)((data) + 0.5))); // tap2wav formula
+ return (int) (0.5 * (((double)CBM_WAV_FREQUENCY / frequency) * (double)((data) + 0.5))); // tap2wav formula
}
/* The version with parameters could be handy if we decide to implement a
@@ -178,8 +178,8 @@ static int cbm_tap_do_work( INT16 **buffer, int length, const UINT8 *data )
UINT8 over_pulse_bytes[3] = {0 , 0, 0 };
int over_pulse_length = 0;
/* These waveamp_* values are currently stored but not used.
- Further investigations are needed to find real pulse amplitude
- in Commodore tapes. Implementation here would follow */
+ Further investigations are needed to find real pulse amplitude
+ in Commodore tapes. Implementation here would follow */
/* int waveamp_high, waveamp_low; */
/* Log .TAP info but only once */
@@ -205,21 +205,21 @@ static int cbm_tap_do_work( INT16 **buffer, int length, const UINT8 *data )
/* read the frequency from the .tap header */
- switch (system)
- {
- case VIC20:
- tap_frequency = (video_standard == NTSC) ? VIC20_NTSC : VIC20_PAL;
- break;
-
- case C16:
- tap_frequency = (video_standard == NTSC) ? C16_NTSC : C16_PAL;
- break;
-
- case C64:
- default:
- tap_frequency = (video_standard == NTSC) ? C64_NTSC : C64_PAL;
- break;
- }
+ switch (system)
+ {
+ case VIC20:
+ tap_frequency = (video_standard == NTSC) ? VIC20_NTSC : VIC20_PAL;
+ break;
+
+ case C16:
+ tap_frequency = (video_standard == NTSC) ? C16_NTSC : C16_PAL;
+ break;
+
+ case C64:
+ default:
+ tap_frequency = (video_standard == NTSC) ? C64_NTSC : C64_PAL;
+ break;
+ }
for (i = CBM_HEADER_SIZE; i < length; i++)
@@ -228,8 +228,8 @@ static int cbm_tap_do_work( INT16 **buffer, int length, const UINT8 *data )
/* .TAP v0 */
/* Here is simple:
- if byte is != 0 -> length = byte
- otherwise -> length = 0x100 (i.e. 0xff + 1) */
+ if byte is != 0 -> length = byte
+ otherwise -> length = 0x100 (i.e. 0xff + 1) */
if (!version)
{
if (byte != 0x00)
@@ -239,7 +239,7 @@ static int cbm_tap_do_work( INT16 **buffer, int length, const UINT8 *data )
}
else
{
- byte_samples = tap_data_to_samplecount(PAUSE, tap_frequency); // tap2wav value
+ byte_samples = tap_data_to_samplecount(PAUSE, tap_frequency); // tap2wav value
// byte_samples = tap_data_to_samplecount(0x100, tap_frequency); // vice value
/* waveamp_high = WAVE_PAUSE; */
}
@@ -248,9 +248,9 @@ static int cbm_tap_do_work( INT16 **buffer, int length, const UINT8 *data )
/* .TAP v1 & v2 */
/* Here is a bit more complicate:
- if byte is != 0 -> length = byte
- otherwise -> the length of the pulse is stored as a 24bit value in the 3 bytes after the 0.
- See below for comments on the implementation of this mechanism */
+ if byte is != 0 -> length = byte
+ otherwise -> the length of the pulse is stored as a 24bit value in the 3 bytes after the 0.
+ See below for comments on the implementation of this mechanism */
if (version)
{
if ((byte != 0x00) && !j)
@@ -261,14 +261,14 @@ static int cbm_tap_do_work( INT16 **buffer, int length, const UINT8 *data )
else
{
/* If we have a long pulse close to the end of the .TAP, check that bytes still
- to be read are enough to complete it. */
+ to be read are enough to complete it. */
if (length - i + j >= 4)
{
/* Here we read the 3 following bytes, using an index j
- j = 0 -> The 0x00 byte: we simply skip everything and go on
- j = 1,2 -> The 1st and 2nd bytes after 0x00: we store them and go on
- j = 3 -> The final byte of the pulse length: we store it,
- and then we pass to finally output the wave */
+ j = 0 -> The 0x00 byte: we simply skip everything and go on
+ j = 1,2 -> The 1st and 2nd bytes after 0x00: we store them and go on
+ j = 3 -> The final byte of the pulse length: we store it,
+ and then we pass to finally output the wave */
if (j > 0)
{
over_pulse_bytes[j-1] = byte;
@@ -334,13 +334,13 @@ static int cbm_tap_fill_wave( INT16 *buffer, int length, UINT8 *bytes )
static const struct CassetteLegacyWaveFiller cbm_legacy_fill_wave = {
- cbm_tap_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- cbm_tap_to_wav_size, /* chunk_sample_calc */
- CBM_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ cbm_tap_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ cbm_tap_to_wav_size, /* chunk_sample_calc */
+ CBM_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
diff --git a/src/lib/formats/cgen_cas.c b/src/lib/formats/cgen_cas.c
index b2aba94b41a..242e833ceb2 100644
--- a/src/lib/formats/cgen_cas.c
+++ b/src/lib/formats/cgen_cas.c
@@ -47,7 +47,7 @@ static int cgenie_output_byte(INT16 *buffer, int sample_count, UINT8 data)
static int cgenie_handle_cas(INT16 *buffer, const UINT8 *casdata)
{
- int i, data_pos, sample_count;
+ int i, data_pos, sample_count;
data_pos = 0;
sample_count = 0;
@@ -112,13 +112,13 @@ static int cgenie_cas_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller cgenie_cas_legacy_fill_wave =
{
- cgenie_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- cgenie_cas_to_wav_size, /* chunk_sample_calc */
- 2400, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ cgenie_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ cgenie_cas_to_wav_size, /* chunk_sample_calc */
+ 2400, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
@@ -146,4 +146,3 @@ static const struct CassetteFormat cgenie_cas_format =
CASSETTE_FORMATLIST_START(cgenie_cassette_formats)
CASSETTE_FORMAT(cgenie_cas_format)
CASSETTE_FORMATLIST_END
-
diff --git a/src/lib/formats/cgen_cas.h b/src/lib/formats/cgen_cas.h
index 3f45cd41d05..6dad463c15d 100644
--- a/src/lib/formats/cgen_cas.h
+++ b/src/lib/formats/cgen_cas.h
@@ -14,4 +14,3 @@
CASSETTE_FORMATLIST_EXTERN(cgenie_cassette_formats);
#endif /* __CGEN_CAS_H */
-
diff --git a/src/lib/formats/coco_cas.c b/src/lib/formats/coco_cas.c
index 441c8620ae1..d93b7518a2b 100644
--- a/src/lib/formats/coco_cas.c
+++ b/src/lib/formats/coco_cas.c
@@ -33,12 +33,12 @@
#include "coco_cas.h"
-#define COCO_WAVESAMPLES_HEADER (1.0)
-#define COCO_WAVESAMPLES_TRAILER (1.0)
-#define COCO_LONGSILENCE (5.0)
+#define COCO_WAVESAMPLES_HEADER (1.0)
+#define COCO_WAVESAMPLES_TRAILER (1.0)
+#define COCO_LONGSILENCE (5.0)
//some games load with only 5s, but most games need 15s
-#define ALICE32_WAVESAMPLES_HEADER (15.0)
+#define ALICE32_WAVESAMPLES_HEADER (15.0)
// PAIR is an endian-safe union useful for representing 32-bit CPU registers
union PAIR
@@ -63,8 +63,8 @@ static int synccount;
const struct CassetteModulation coco_cas_modulation =
{
CASSETTE_MODULATION_SINEWAVE,
- 600.0, 1200.0, 1500.0,
- 1500.0, 2400.0, 3000.0
+ 600.0, 1200.0, 1500.0,
+ 1500.0, 2400.0, 3000.0
};
@@ -170,7 +170,7 @@ static casserr_t cas_load(cassette_image *cassette, UINT8 silence)
casserr_t err;
UINT64 offset;
UINT64 image_size;
- UINT8 block[258]; /* 255 bytes per block + 3 (type, length, checksum) */
+ UINT8 block[258]; /* 255 bytes per block + 3 (type, length, checksum) */
int block_length = 0;
UINT8 last_blocktype;
double time_index = 0.0;
@@ -238,8 +238,8 @@ static casserr_t cas_load(cassette_image *cassette, UINT8 silence)
return err;
time_index += time_displacement;
}
- else if (synccount != 0) /* If we have multiple sync bytes in cas file, make sure they */
- { /* are passed through */
+ else if (synccount != 0) /* If we have multiple sync bytes in cas file, make sure they */
+ { /* are passed through */
/* sync data */
err = cassette_put_modulated_filler(cassette, 0, time_index, 0x55, synccount, &coco_cas_modulation, &time_displacement);
if (err)
diff --git a/src/lib/formats/coco_dsk.c b/src/lib/formats/coco_dsk.c
index 2b3cc5dd61e..9fb5e933d53 100644
--- a/src/lib/formats/coco_dsk.c
+++ b/src/lib/formats/coco_dsk.c
@@ -156,7 +156,7 @@ static int coco_jvc_decode_header(floppy_image_legacy *floppy, UINT64 size,
/* byte offset 4 - sector attribute flag */
sector_attribute_flag = (header_size > 4) ? header[4] : 0;
if (sector_attribute_flag != 0)
- return -1; /* we do not support sector attribute flags */
+ return -1; /* we do not support sector attribute flags */
physical_bytes_per_sector = geometry->sector_length;
if (sector_attribute_flag)
@@ -197,11 +197,11 @@ static FLOPPY_CONSTRUCT(coco_jvc_construct)
{
/* create */
memset(&geometry, 0, sizeof(geometry));
- geometry.heads = option_resolution_lookup_int(params, PARAM_HEADS);
- geometry.tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
- geometry.sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
- geometry.first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
- geometry.sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
+ geometry.heads = option_resolution_lookup_int(params, PARAM_HEADS);
+ geometry.tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
+ geometry.sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
+ geometry.first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
+ geometry.sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
header[0] = (UINT8) geometry.sectors;
header[1] = (UINT8) geometry.heads;
@@ -330,9 +330,9 @@ static floperr_t coco_os9_post_format(floppy_image_legacy *floppy, option_resolu
struct tm *ltime;
int heads, tracks, sectors, total_sectors;
- heads = option_resolution_lookup_int(params, PARAM_HEADS);
- tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
- sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
+ heads = option_resolution_lookup_int(params, PARAM_HEADS);
+ tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
+ sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
total_sectors = heads * tracks * sectors;
/* write the initial header */
@@ -436,11 +436,11 @@ static FLOPPY_CONSTRUCT(coco_os9_construct)
{
/* create */
memset(&geometry, 0, sizeof(geometry));
- geometry.heads = option_resolution_lookup_int(params, PARAM_HEADS);
- geometry.tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
- geometry.sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
- geometry.first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
- geometry.sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
+ geometry.heads = option_resolution_lookup_int(params, PARAM_HEADS);
+ geometry.tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
+ geometry.sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
+ geometry.first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
+ geometry.sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
}
else
{
@@ -617,20 +617,20 @@ struct dmk_tag
UINT32 track_size;
};
-#define DMK_HEADER_LEN 16
-#define DMK_TOC_LEN 64
-#define DMK_IDAM_LENGTH 7
-#define DMK_DATA_GAP 80
-#define DMK_LEAD_IN 32
-#define DMK_EXTRA_TRACK_LENGTH 156
+#define DMK_HEADER_LEN 16
+#define DMK_TOC_LEN 64
+#define DMK_IDAM_LENGTH 7
+#define DMK_DATA_GAP 80
+#define DMK_LEAD_IN 32
+#define DMK_EXTRA_TRACK_LENGTH 156
-#define dmk_idam_type(x) (x)[0]
-#define dmk_idam_track(x) (x)[1]
-#define dmk_idam_side(x) (x)[2]
-#define dmk_idam_sector(x) (x)[3]
-#define dmk_idam_sectorlength(x) (x)[4]
-#define dmk_idam_crc(x) (((x)[5] << 8) + (x)[6])
-#define dmk_idam_set_crc(x, crc) (x)[5] = ((crc) >> 8); (x)[6] = ((crc) >> 0);
+#define dmk_idam_type(x) (x)[0]
+#define dmk_idam_track(x) (x)[1]
+#define dmk_idam_side(x) (x)[2]
+#define dmk_idam_sector(x) (x)[3]
+#define dmk_idam_sectorlength(x) (x)[4]
+#define dmk_idam_crc(x) (((x)[5] << 8) + (x)[6])
+#define dmk_idam_set_crc(x, crc) (x)[5] = ((crc) >> 8); (x)[6] = ((crc) >> 0);
static struct dmk_tag *get_dmk_tag(floppy_image_legacy *floppy)
@@ -720,16 +720,16 @@ static floperr_t coco_dmk_format_track(floppy_image_legacy *floppy, int head, in
UINT32 max_track_size;
int *sector_map = NULL;
- sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
- sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
- interleave = option_resolution_lookup_int(params, PARAM_INTERLEAVE);
- first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
+ sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
+ sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
+ interleave = option_resolution_lookup_int(params, PARAM_INTERLEAVE);
+ first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
max_track_size = get_dmk_tag(floppy)->track_size;
if (sectors > DMK_TOC_LEN)
{
- err = FLOPPY_ERROR_INTERNAL;
+ err = FLOPPY_ERROR_INTERNAL;
goto done;
}
@@ -790,13 +790,13 @@ static floperr_t coco_dmk_format_track(floppy_image_legacy *floppy, int head, in
track_position += 3;
idam_offset = track_position | 0x8000;
- dmk_idam_type( &track_data[track_position]) = 0xFE;
- dmk_idam_track( &track_data[track_position]) = track;
- dmk_idam_side( &track_data[track_position]) = head;
- dmk_idam_sector( &track_data[track_position]) = logical_sector;
- dmk_idam_sectorlength( &track_data[track_position]) = compute_log2(sector_length / 128);
- crc = ccitt_crc16(0xcdb4, &track_data[track_position], DMK_IDAM_LENGTH - 2);
- dmk_idam_set_crc( &track_data[track_position], crc);
+ dmk_idam_type( &track_data[track_position]) = 0xFE;
+ dmk_idam_track( &track_data[track_position]) = track;
+ dmk_idam_side( &track_data[track_position]) = head;
+ dmk_idam_sector( &track_data[track_position]) = logical_sector;
+ dmk_idam_sectorlength( &track_data[track_position]) = compute_log2(sector_length / 128);
+ crc = ccitt_crc16(0xcdb4, &track_data[track_position], DMK_IDAM_LENGTH - 2);
+ dmk_idam_set_crc( &track_data[track_position], crc);
track_position += DMK_IDAM_LENGTH;
memset(&track_data[track_position], 0x4E, 22);
@@ -1106,10 +1106,10 @@ FLOPPY_CONSTRUCT(coco_dmk_construct)
if (params)
{
- heads = option_resolution_lookup_int(params, PARAM_HEADS);
- tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
- sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
- sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
+ heads = option_resolution_lookup_int(params, PARAM_HEADS);
+ tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
+ sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
+ sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
track_size = coco_dmk_min_track_size(sectors, sector_length) + DMK_EXTRA_TRACK_LENGTH;
@@ -1170,25 +1170,25 @@ FLOPPY_IDENTIFY(coco_dmk_identify)
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( coco )
- LEGACY_FLOPPY_OPTION( coco_jvc, "dsk", "CoCo JVC disk image", coco_jvc_identify, coco_jvc_construct, NULL,
+ LEGACY_FLOPPY_OPTION( coco_jvc, "dsk", "CoCo JVC disk image", coco_jvc_identify, coco_jvc_construct, NULL,
HEADS([1]-2)
TRACKS([35]-255)
SECTORS(1-[18]-255)
SECTOR_LENGTH(128/[256]/512/1024)
FIRST_SECTOR_ID(0-[1]))
- LEGACY_FLOPPY_OPTION( coco_os9, "os9", "CoCo OS-9 disk image", coco_os9_identify, coco_os9_construct, NULL,
+ LEGACY_FLOPPY_OPTION( coco_os9, "os9", "CoCo OS-9 disk image", coco_os9_identify, coco_os9_construct, NULL,
HEADS([1]-2)
TRACKS([35]-255)
SECTORS(1-[18]-255)
SECTOR_LENGTH([256])
FIRST_SECTOR_ID([1]))
- LEGACY_FLOPPY_OPTION( coco_vdk, "vdk", "CoCo VDK disk image", coco_vdk_identify, coco_vdk_construct, NULL,
+ LEGACY_FLOPPY_OPTION( coco_vdk, "vdk", "CoCo VDK disk image", coco_vdk_identify, coco_vdk_construct, NULL,
HEADS([1]-2)
TRACKS([35]-255)
SECTORS([18])
SECTOR_LENGTH([256])
FIRST_SECTOR_ID([1]))
- LEGACY_FLOPPY_OPTION( coco_dmk, "dsk,dmk", "CoCo DMK disk image", coco_dmk_identify, coco_dmk_construct, NULL,
+ LEGACY_FLOPPY_OPTION( coco_dmk, "dsk,dmk", "CoCo DMK disk image", coco_dmk_identify, coco_dmk_construct, NULL,
HEADS([1]-2)
TRACKS([35]-255)
SECTORS(1-[18])
diff --git a/src/lib/formats/comx35_dsk.c b/src/lib/formats/comx35_dsk.c
index 41f1732e55a..5bf8d70543e 100644
--- a/src/lib/formats/comx35_dsk.c
+++ b/src/lib/formats/comx35_dsk.c
@@ -44,26 +44,26 @@
TODO:
- implement 70 track image detection (first byte of file = 0x01 -> single sided)
- - format double sided, single track density
-
- :exp:fd:wd1770: track description
- 40xff 6x00
- fe 4x00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 07 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 0e 00 f7 17x00 fb 128x00 f7 16x00
- fe 2x00 05 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 0c 00 f7 17x00 fb 128x00 f7 16x00
- fe 2x00 03 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 0a 00 f7 17x00 fb 128x00 f7 16x00
- fe 2x00 01 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 08 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 0f 00 f7 17x00 fb 128x00 f7 16x00
- fe 2x00 06 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 0d 00 f7 17x00 fb 128x00 f7 16x00
- fe 2x00 04 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 0b 00 f7 17x00 fb 128x00 f7 16x00
- fe 2x00 02 00 f7 17x00 fb 128x00 f7 17x00
- fe 2x00 09 00 f7 17x00 fb 128x00 f7 3476x00
+ - format double sided, single track density
+
+ :exp:fd:wd1770: track description
+ 40xff 6x00
+ fe 4x00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 07 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 0e 00 f7 17x00 fb 128x00 f7 16x00
+ fe 2x00 05 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 0c 00 f7 17x00 fb 128x00 f7 16x00
+ fe 2x00 03 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 0a 00 f7 17x00 fb 128x00 f7 16x00
+ fe 2x00 01 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 08 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 0f 00 f7 17x00 fb 128x00 f7 16x00
+ fe 2x00 06 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 0d 00 f7 17x00 fb 128x00 f7 16x00
+ fe 2x00 04 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 0b 00 f7 17x00 fb 128x00 f7 16x00
+ fe 2x00 02 00 f7 17x00 fb 128x00 f7 17x00
+ fe 2x00 09 00 f7 17x00 fb 128x00 f7 3476x00
*/
@@ -100,9 +100,9 @@ const comx35_format::format comx35_format::formats[] = {
4000, 16, 35, 2, 128, {}, -1, { 0,7,14,5,12,3,10,1,8,15,6,13,4,11,2,9 }, 40, 11, 10
},
/*{ // 140K 5 1/4 inch single density, double track density, single sided, 70 tracks
- floppy_image::FF_525, floppy_image::SSQD, floppy_image::FM,
- 4000, 16, 70, 1, 128, {}, -1, { 0,7,14,5,12,3,10,1,8,15,6,13,4,11,2,9 }, 40, 11, 10
- },*/
+ floppy_image::FF_525, floppy_image::SSQD, floppy_image::FM,
+ 4000, 16, 70, 1, 128, {}, -1, { 0,7,14,5,12,3,10,1,8,15,6,13,4,11,2,9 }, 40, 11, 10
+ },*/
{}
};
diff --git a/src/lib/formats/cpis_dsk.c b/src/lib/formats/cpis_dsk.c
index 4e0f0ba5ba1..f355e024580 100644
--- a/src/lib/formats/cpis_dsk.c
+++ b/src/lib/formats/cpis_dsk.c
@@ -15,27 +15,27 @@
static int compis_get_tracks_and_sectors(floppy_image_legacy *floppy, int *tracks, int *sectors)
{
switch(floppy_image_size(floppy)) {
- case 0x50000: /* 320 KB */
+ case 0x50000: /* 320 KB */
*tracks = 40;
*sectors = 8;
break;
- case 0x5a000: /* 360 KB */
+ case 0x5a000: /* 360 KB */
*tracks = 40;
*sectors = 9;
break;
- case 0xa0000: /* 640 KB */
+ case 0xa0000: /* 640 KB */
*tracks = 80;
*sectors = 8;
break;
- case 0xb4000: /* 720 KB */
+ case 0xb4000: /* 720 KB */
*tracks = 80;
*sectors = 9;
break;
- case 0x12c000: /* 1200 KB */
+ case 0x12c000: /* 1200 KB */
*tracks = 80;
*sectors = 15;
break;
@@ -87,7 +87,7 @@ static FLOPPY_CONSTRUCT(compis_dsk_construct)
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( compis )
- LEGACY_FLOPPY_OPTION( compis_dsk, "dsk", "Compis floppy disk image", compis_dsk_identify, compis_dsk_construct, NULL,
+ LEGACY_FLOPPY_OPTION( compis_dsk, "dsk", "Compis floppy disk image", compis_dsk_identify, compis_dsk_construct, NULL,
TRACKS(40/[80])
SECTORS(8/[9]/15))
LEGACY_FLOPPY_OPTIONS_END
diff --git a/src/lib/formats/cqm_dsk.c b/src/lib/formats/cqm_dsk.c
index 0b15e44e216..3df90f72c2e 100644
--- a/src/lib/formats/cqm_dsk.c
+++ b/src/lib/formats/cqm_dsk.c
@@ -180,11 +180,11 @@ FLOPPY_CONSTRUCT( cqm_dsk_construct )
tag->sector_size = (header[0x04] << 8) + header[0x03];
tag->sector_per_track = header[0x10];
- tag->heads = header[0x12];
- tag->tracks = header[0x5b];
- tag->sector_base = header[0x71] + 1;
- tag->interleave = header[0x74];
- tag->skew = header[0x75];
+ tag->heads = header[0x12];
+ tag->tracks = header[0x5b];
+ tag->sector_base = header[0x71] + 1;
+ tag->interleave = header[0x74];
+ tag->skew = header[0x75];
// header + comment size to position on first data block
@@ -225,4 +225,3 @@ FLOPPY_CONSTRUCT( cqm_dsk_construct )
return FLOPPY_ERROR_SUCCESS;
}
-
diff --git a/src/lib/formats/csw_cas.c b/src/lib/formats/csw_cas.c
index 575e0e80499..58aa66c7348 100644
--- a/src/lib/formats/csw_cas.c
+++ b/src/lib/formats/csw_cas.c
@@ -27,7 +27,7 @@ Offset Value Type Description
#include "csw_cas.h"
-#define CSW_WAV_FREQUENCY 44100
+#define CSW_WAV_FREQUENCY 44100
static const UINT8 CSW_HEADER[] = { "Compressed Square Wave" };
@@ -50,11 +50,11 @@ UINT8 Flags;
UINT8 HeaderExtensionLength;
UINT8 *gz_ptr = NULL;
-int total_size;
-z_stream d_stream;
-int err;
-UINT8 *in_ptr;
-int bsize=0;
+int total_size;
+z_stream d_stream;
+int err;
+UINT8 *in_ptr;
+int bsize=0;
if ( memcmp( casdata, CSW_HEADER, sizeof(CSW_HEADER) ) ) {
LOG_FORMATS( "csw_cas_to_wav_size: cassette image has incompatible header\n" );
@@ -178,12 +178,12 @@ UINT8 HeaderExtensionLength;
INT8 Bit;
UINT8 *gz_ptr = NULL;
-int total_size;
-z_stream d_stream;
-int err;
-UINT8 *in_ptr;
-int bsize=0;
-int i;
+int total_size;
+z_stream d_stream;
+int err;
+UINT8 *in_ptr;
+int bsize=0;
+int i;
LOG_FORMATS("Length %d\n",length);
@@ -295,13 +295,13 @@ int i;
static const struct CassetteLegacyWaveFiller csw_legacy_fill_wave = {
- csw_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- csw_cas_to_wav_size, /* chunk_sample_calc */
- CSW_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ csw_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ csw_cas_to_wav_size, /* chunk_sample_calc */
+ CSW_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t csw_cassette_identify( cassette_image *cassette, struct CassetteOptions *opts ) {
diff --git a/src/lib/formats/d64_dsk.c b/src/lib/formats/d64_dsk.c
index aa5936ebce7..add49e62d88 100644
--- a/src/lib/formats/d64_dsk.c
+++ b/src/lib/formats/d64_dsk.c
@@ -26,27 +26,27 @@
PARAMETERS
***************************************************************************/
-#define MAX_HEADS 2
-#define MAX_TRACKS 84
-#define MAX_ERROR_SECTORS 4166
-#define SECTOR_SIZE 256
-#define SECTOR_SIZE_GCR 368
-
-#define INVALID_OFFSET 0xbadbad
-
-#define D64_SIZE_35_TRACKS 174848
-#define D64_SIZE_35_TRACKS_WITH_ERRORS 175531
-#define D64_SIZE_40_TRACKS 196608
-#define D64_SIZE_40_TRACKS_WITH_ERRORS 197376
-#define D64_SIZE_42_TRACKS 205312
-#define D64_SIZE_42_TRACKS_WITH_ERRORS 206114
-#define D67_SIZE_35_TRACKS 176640
-#define D71_SIZE_70_TRACKS 349696
-#define D71_SIZE_70_TRACKS_WITH_ERRORS 351062
-#define D80_SIZE_77_TRACKS 533248
-#define D80_SIZE_77_TRACKS_WITH_ERRORS 535331
-#define D82_SIZE_154_TRACKS 1066496
-#define D82_SIZE_154_TRACKS_WITH_ERRORS 1070662
+#define MAX_HEADS 2
+#define MAX_TRACKS 84
+#define MAX_ERROR_SECTORS 4166
+#define SECTOR_SIZE 256
+#define SECTOR_SIZE_GCR 368
+
+#define INVALID_OFFSET 0xbadbad
+
+#define D64_SIZE_35_TRACKS 174848
+#define D64_SIZE_35_TRACKS_WITH_ERRORS 175531
+#define D64_SIZE_40_TRACKS 196608
+#define D64_SIZE_40_TRACKS_WITH_ERRORS 197376
+#define D64_SIZE_42_TRACKS 205312
+#define D64_SIZE_42_TRACKS_WITH_ERRORS 206114
+#define D67_SIZE_35_TRACKS 176640
+#define D71_SIZE_70_TRACKS 349696
+#define D71_SIZE_70_TRACKS_WITH_ERRORS 351062
+#define D80_SIZE_77_TRACKS 533248
+#define D80_SIZE_77_TRACKS_WITH_ERRORS 535331
+#define D82_SIZE_154_TRACKS 1066496
+#define D82_SIZE_154_TRACKS_WITH_ERRORS 1070662
enum
{
@@ -60,17 +60,17 @@ static const char *const DOS_VERSION[] = { "1.0", "2.0", "2.5" };
enum
{
ERROR_00 = 1,
- ERROR_20, /* header block not found */
- ERROR_21, /* no sync character */
- ERROR_22, /* data block not present */
- ERROR_23, /* checksum error in data block */
- ERROR_24, /* write verify (on format) UNIMPLEMENTED */
- ERROR_25, /* write verify error UNIMPLEMENTED */
- ERROR_26, /* write protect on UNIMPLEMENTED */
- ERROR_27, /* checksum error in header block */
- ERROR_28, /* write error UNIMPLEMENTED */
- ERROR_29, /* disk ID mismatch */
- ERROR_74, /* disk not ready (no device 1) UNIMPLEMENTED */
+ ERROR_20, /* header block not found */
+ ERROR_21, /* no sync character */
+ ERROR_22, /* data block not present */
+ ERROR_23, /* checksum error in data block */
+ ERROR_24, /* write verify (on format) UNIMPLEMENTED */
+ ERROR_25, /* write verify error UNIMPLEMENTED */
+ ERROR_26, /* write protect on UNIMPLEMENTED */
+ ERROR_27, /* checksum error in header block */
+ ERROR_28, /* write error UNIMPLEMENTED */
+ ERROR_29, /* disk ID mismatch */
+ ERROR_74, /* disk not ready (no device 1) UNIMPLEMENTED */
};
static const char *const ERROR_CODE[] = { "00", "00", "20", "21", "22", "23", "24", "25", "26", "27", "28", "29", "74" };
@@ -129,21 +129,21 @@ static const int DOS2_SECTORS_PER_TRACK[] =
static const int DOS25_SECTORS_PER_TRACK[] =
{
29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
- 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, /* 1-39 */
- 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, /* 40-53 */
- 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, /* 54-64 */
- 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, /* 65-77 */
- 23, 23, 23, 23, 23, 23, 23 /* 78-84 */
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, /* 1-39 */
+ 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, 27, /* 40-53 */
+ 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, 25, /* 54-64 */
+ 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, 23, /* 65-77 */
+ 23, 23, 23, 23, 23, 23, 23 /* 78-84 */
};
static const int DOS25_SPEED_ZONE[] =
{
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, /* 1-39 */
- 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, /* 40-53 */
- 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 54-64 */
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 65-77 */
- 0, 0, 0, 0, 0, 0, 0 /* 78-84 */
+ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, /* 1-39 */
+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, /* 40-53 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 54-64 */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 65-77 */
+ 0, 0, 0, 0, 0, 0, 0 /* 78-84 */
};
/***************************************************************************
@@ -152,17 +152,17 @@ static const int DOS25_SPEED_ZONE[] =
struct d64dsk_tag
{
- int dos; /* CBM DOS version */
- int heads; /* number of physical heads */
- int tracks; /* number of physical tracks */
- int dos_tracks; /* number of logical tracks */
- int track_offset[MAX_HEADS][MAX_TRACKS]; /* offset within image for each physical track */
- UINT32 speed_zone[MAX_TRACKS]; /* speed zone for each physical track */
- bool has_errors; /* flag to check for available error codes */
- UINT8 error[MAX_ERROR_SECTORS]; /* error code for each logical sector */
- int error_offset[MAX_HEADS][MAX_TRACKS]; /* offset within error array for sector 0 of each logical track */
-
- UINT8 id1, id2; /* DOS disk format ID */
+ int dos; /* CBM DOS version */
+ int heads; /* number of physical heads */
+ int tracks; /* number of physical tracks */
+ int dos_tracks; /* number of logical tracks */
+ int track_offset[MAX_HEADS][MAX_TRACKS]; /* offset within image for each physical track */
+ UINT32 speed_zone[MAX_TRACKS]; /* speed zone for each physical track */
+ bool has_errors; /* flag to check for available error codes */
+ UINT8 error[MAX_ERROR_SECTORS]; /* error code for each logical sector */
+ int error_offset[MAX_HEADS][MAX_TRACKS]; /* offset within error array for sector 0 of each logical track */
+
+ UINT8 id1, id2; /* DOS disk format ID */
};
/***************************************************************************
@@ -214,9 +214,9 @@ static int d64_get_sectors_per_track(floppy_image_legacy *floppy, int head, int
switch (get_tag(floppy)->dos)
{
- case DOS1: sectors_per_track = DOS1_SECTORS_PER_TRACK[track / 2]; break;
- case DOS2: sectors_per_track = DOS2_SECTORS_PER_TRACK[track / 2]; break;
- case DOS25: sectors_per_track = DOS25_SECTORS_PER_TRACK[track]; break;
+ case DOS1: sectors_per_track = DOS1_SECTORS_PER_TRACK[track / 2]; break;
+ case DOS2: sectors_per_track = DOS2_SECTORS_PER_TRACK[track / 2]; break;
+ case DOS25: sectors_per_track = DOS25_SECTORS_PER_TRACK[track]; break;
}
return sectors_per_track;
@@ -436,13 +436,13 @@ static floperr_t d64_read_track(floppy_image_legacy *floppy, int head, int track
int i;
/*
- 1. Header sync FF FF FF FF FF (40 'on' bits, not GCR encoded)
- 2. Header info 52 54 B5 29 4B 7A 5E 95 55 55 (10 GCR bytes)
- 3. Header gap 55 55 55 55 55 55 55 55 55 (9 bytes, never read)
- 4. Data sync FF FF FF FF FF (40 'on' bits, not GCR encoded)
- 5. Data block 55...4A (325 GCR bytes)
- 6. Inter-sector gap 55 55 55 55...55 55 (4 to 19 bytes, never read)
- */
+ 1. Header sync FF FF FF FF FF (40 'on' bits, not GCR encoded)
+ 2. Header info 52 54 B5 29 4B 7A 5E 95 55 55 (10 GCR bytes)
+ 3. Header gap 55 55 55 55 55 55 55 55 55 (9 bytes, never read)
+ 4. Data sync FF FF FF FF FF (40 'on' bits, not GCR encoded)
+ 5. Data block 55...4A (325 GCR bytes)
+ 6. Inter-sector gap 55 55 55 55...55 55 (4 to 19 bytes, never read)
+ */
if (sector_error == ERROR_29)
id1 ^= 0xff;
@@ -499,11 +499,11 @@ static floperr_t d64_read_track(floppy_image_legacy *floppy, int head, int track
sector_checksum ^= 0xff;
/*
- $00 - data block ID ($07)
- $01-100 - 256 bytes sector data
- $101 - data block checksum (EOR of $01-100)
- $102-103 - $00 ("off" bytes, to make the sector size a multiple of 5)
- */
+ $00 - data block ID ($07)
+ $01-100 - 256 bytes sector data
+ $101 - data block checksum (EOR of $01-100)
+ $102-103 - $00 ("off" bytes, to make the sector size a multiple of 5)
+ */
gcr_double_2_gcr(data_block_id, d64_track_data[d64_pos], d64_track_data[d64_pos + 1], d64_track_data[d64_pos + 2], gcr_track_data + gcr_pos);
gcr_pos += 5;
@@ -536,7 +536,7 @@ static floperr_t d64_read_track(floppy_image_legacy *floppy, int head, int track
LOG_FORMATS("D64 track %.1f length %u\n", get_dos_track(track), gcr_track_size);
}
- else /* half tracks */
+ else /* half tracks */
{
/* set track length to 0 */
memset(buffer, 0, buflen);
@@ -566,27 +566,27 @@ static void d64_identify(floppy_image_legacy *floppy, int *dos, int *heads, int
switch (floppy_image_size(floppy))
{
/* 2040/3040 */
- case D67_SIZE_35_TRACKS: *dos = DOS1; *heads = 1; *tracks = 35; *has_errors = false; break;
+ case D67_SIZE_35_TRACKS: *dos = DOS1; *heads = 1; *tracks = 35; *has_errors = false; break;
/* 4040/2031/1541/1551 */
- case D64_SIZE_35_TRACKS: *dos = DOS2; *heads = 1; *tracks = 35; *has_errors = false; break;
- case D64_SIZE_35_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 1; *tracks = 35; *has_errors = true; break;
- case D64_SIZE_40_TRACKS: *dos = DOS2; *heads = 1; *tracks = 40; *has_errors = false; break;
- case D64_SIZE_40_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 1; *tracks = 40; *has_errors = true; break;
- case D64_SIZE_42_TRACKS: *dos = DOS2; *heads = 1; *tracks = 42; *has_errors = false; break;
- case D64_SIZE_42_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 1; *tracks = 42; *has_errors = true; break;
+ case D64_SIZE_35_TRACKS: *dos = DOS2; *heads = 1; *tracks = 35; *has_errors = false; break;
+ case D64_SIZE_35_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 1; *tracks = 35; *has_errors = true; break;
+ case D64_SIZE_40_TRACKS: *dos = DOS2; *heads = 1; *tracks = 40; *has_errors = false; break;
+ case D64_SIZE_40_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 1; *tracks = 40; *has_errors = true; break;
+ case D64_SIZE_42_TRACKS: *dos = DOS2; *heads = 1; *tracks = 42; *has_errors = false; break;
+ case D64_SIZE_42_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 1; *tracks = 42; *has_errors = true; break;
/* 1571 */
- case D71_SIZE_70_TRACKS: *dos = DOS2; *heads = 2; *tracks = 35; *has_errors = false; break;
- case D71_SIZE_70_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 2; *tracks = 35; *has_errors = true; break;
+ case D71_SIZE_70_TRACKS: *dos = DOS2; *heads = 2; *tracks = 35; *has_errors = false; break;
+ case D71_SIZE_70_TRACKS_WITH_ERRORS: *dos = DOS2; *heads = 2; *tracks = 35; *has_errors = true; break;
/* 8050 */
- case D80_SIZE_77_TRACKS: *dos = DOS25; *heads = 1; *tracks = 77; *has_errors = false; break;
- case D80_SIZE_77_TRACKS_WITH_ERRORS: *dos = DOS25; *heads = 1; *tracks = 77; *has_errors = true; break;
+ case D80_SIZE_77_TRACKS: *dos = DOS25; *heads = 1; *tracks = 77; *has_errors = false; break;
+ case D80_SIZE_77_TRACKS_WITH_ERRORS: *dos = DOS25; *heads = 1; *tracks = 77; *has_errors = true; break;
/* 8250/SFD1001 */
- case D82_SIZE_154_TRACKS: *dos = DOS25; *heads = 2; *tracks = 77; *has_errors = false; break;
- case D82_SIZE_154_TRACKS_WITH_ERRORS: *dos = DOS25; *heads = 2; *tracks = 77; *has_errors = true; break;
+ case D82_SIZE_154_TRACKS: *dos = DOS25; *heads = 2; *tracks = 77; *has_errors = false; break;
+ case D82_SIZE_154_TRACKS_WITH_ERRORS: *dos = DOS25; *heads = 2; *tracks = 77; *has_errors = true; break;
}
}
@@ -803,11 +803,11 @@ FLOPPY_CONSTRUCT( d64_dsk_construct )
/* read format ID from directory */
/*
- id1, id2 are the same for extended d64 (i.e. with error tables), for d67 and for d71
+ id1, id2 are the same for extended d64 (i.e. with error tables), for d67 and for d71
- for d81 they are at track 40 bytes 0x17 & 0x18
- for d80 & d82 they are at track 39 bytes 0x18 & 0x19
- */
+ for d81 they are at track 40 bytes 0x17 & 0x18
+ for d80 & d82 they are at track 39 bytes 0x18 & 0x19
+ */
if (dos == DOS25)
floppy_image_read(floppy, id, tag->track_offset[0][38] + 0x18, 2);
else
diff --git a/src/lib/formats/d88_dsk.c b/src/lib/formats/d88_dsk.c
index fa87c31d784..e2d476d8087 100644
--- a/src/lib/formats/d88_dsk.c
+++ b/src/lib/formats/d88_dsk.c
@@ -449,7 +449,7 @@ int d88_format::identify(io_generic *io, UINT32 form_factor)
io_generic_read(io, h, 0, 32);
if((LITTLE_ENDIANIZE_INT32(*(UINT32 *)(h+0x1c)) == size) &&
- (h[0x1b] == 0x00 || h[0x1b] == 0x10 || h[0x1b] == 0x20 || h[0x1b] == 0x30 || h[0x1b] == 0x40))
+ (h[0x1b] == 0x00 || h[0x1b] == 0x10 || h[0x1b] == 0x20 || h[0x1b] == 0x30 || h[0x1b] == 0x40))
return 100;
return 0;
diff --git a/src/lib/formats/dfi_dsk.c b/src/lib/formats/dfi_dsk.c
index a324c091e42..32371010b5f 100644
--- a/src/lib/formats/dfi_dsk.c
+++ b/src/lib/formats/dfi_dsk.c
@@ -182,7 +182,7 @@ bool dfi_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
fprintf(stderr,"Actual rpm based on index: %f\n", ((double)clock_rate/(double)onerev_time)*60);
}
- rpm += 0; // HACK: prevent GCC 4.6+ from warning "variable set but unused"
+ rpm += 0; // HACK: prevent GCC 4.6+ from warning "variable set but unused"
if(!index_time)
index_time = total_time;
diff --git a/src/lib/formats/dim_dsk.c b/src/lib/formats/dim_dsk.c
index f070a5008af..d4a0f2e1030 100644
--- a/src/lib/formats/dim_dsk.c
+++ b/src/lib/formats/dim_dsk.c
@@ -44,14 +44,14 @@ FLOPPY_CONSTRUCT(dim_dsk_construct)
}
// Offset + 0 : disk format type (1 byte):
- // 0 = 2HD / 2HDA (8 sector/track, 1024 bytes/sector, GAP#3 = 0x74)
- // 1 = 2HS (9 sector/track, 1024 bytes/sector, GAP#3 = 0x39)
- // 2 = 2HC (15 sector/track, 512 bytes/sector, GAP#3 = 0x54)
- // 3 = 2HDE(68) (9 sector/track, 1024 bytes/sector, GAP#3 = 0x39)
- // 9 = 2HQ (18 sector/track, 512 bytes/sector, GAP#3 = 0x54)
- // 17 = N88-BASIC (26 sector/track, 256 bytes/sector, GAP#3 = 0x33)
- // or (26 sector/track, 128 bytes/sector, GAP#3 = 0x1a)
- //
+ // 0 = 2HD / 2HDA (8 sector/track, 1024 bytes/sector, GAP#3 = 0x74)
+ // 1 = 2HS (9 sector/track, 1024 bytes/sector, GAP#3 = 0x39)
+ // 2 = 2HC (15 sector/track, 512 bytes/sector, GAP#3 = 0x54)
+ // 3 = 2HDE(68) (9 sector/track, 1024 bytes/sector, GAP#3 = 0x39)
+ // 9 = 2HQ (18 sector/track, 512 bytes/sector, GAP#3 = 0x54)
+ // 17 = N88-BASIC (26 sector/track, 256 bytes/sector, GAP#3 = 0x33)
+ // or (26 sector/track, 128 bytes/sector, GAP#3 = 0x1a)
+ //
floppy_image_read(floppy, &format_tmp,0,1);
switch(format_tmp)
@@ -98,4 +98,3 @@ FLOPPY_CONSTRUCT(dim_dsk_construct)
geometry.offset = 0x100;
return basicdsk_construct(floppy, &geometry);
}
-
diff --git a/src/lib/formats/dsk_dsk.c b/src/lib/formats/dsk_dsk.c
index 0dfe2046fa9..5651deae740 100644
--- a/src/lib/formats/dsk_dsk.c
+++ b/src/lib/formats/dsk_dsk.c
@@ -11,8 +11,8 @@
#include "imageutl.h"
#include "flopimg.h"
-#define MV_CPC "MV - CPC"
-#define EXTENDED "EXTENDED"
+#define MV_CPC "MV - CPC"
+#define EXTENDED "EXTENDED"
struct dskdsk_tag
{
@@ -266,8 +266,8 @@ FLOPPY_CONSTRUCT( dsk_dsk_construct )
#include "emu.h"
#include "dsk_dsk.h"
-#define DSK_FORMAT_HEADER "MV - CPC"
-#define EXT_FORMAT_HEADER "EXTENDED CPC DSK"
+#define DSK_FORMAT_HEADER "MV - CPC"
+#define EXT_FORMAT_HEADER "EXTENDED CPC DSK"
dsk_format::dsk_format() : floppy_image_format_t()
{
@@ -331,8 +331,8 @@ struct sector_header
UINT8 side;
UINT8 sector_id;
UINT8 sector_size_code;
- UINT8 fdc_status_reg1;
- UINT8 fdc_status_reg2;
+ UINT8 fdc_status_reg1;
+ UINT8 fdc_status_reg2;
UINT16 data_length;
};
@@ -420,4 +420,3 @@ bool dsk_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
}
const floppy_format_type FLOPPY_DSK_FORMAT = &floppy_image_format_creator<dsk_format>;
-
diff --git a/src/lib/formats/esq16_dsk.c b/src/lib/formats/esq16_dsk.c
index 56f93653fbd..b0224111ff1 100644
--- a/src/lib/formats/esq16_dsk.c
+++ b/src/lib/formats/esq16_dsk.c
@@ -72,15 +72,15 @@ void esqimg_format::find_size(io_generic *io, int &track_count, int &head_count,
{
int size = io_generic_size(io);
track_count = 80;
- head_count = 2;
+ head_count = 2;
sector_count = 10;
- if (size == 512*track_count*head_count*sector_count)
- {
- return;
- }
+ if (size == 512*track_count*head_count*sector_count)
+ {
+ return;
+ }
- track_count = head_count = sector_count = 0;
+ track_count = head_count = sector_count = 0;
}
int esqimg_format::identify(io_generic *io, UINT32 form_factor)
diff --git a/src/lib/formats/esq8_dsk.c b/src/lib/formats/esq8_dsk.c
index cfbff2594fc..ccf9dff80e0 100644
--- a/src/lib/formats/esq8_dsk.c
+++ b/src/lib/formats/esq8_dsk.c
@@ -74,15 +74,15 @@ void esq8img_format::find_size(io_generic *io, int &track_count, int &head_count
{
int size = io_generic_size(io);
track_count = 80;
- head_count = 1;
+ head_count = 1;
sector_count = 6;
- if (size == 5632 * 80)
- {
- return;
- }
+ if (size == 5632 * 80)
+ {
+ return;
+ }
- track_count = head_count = sector_count = 0;
+ track_count = head_count = sector_count = 0;
}
int esq8img_format::identify(io_generic *io, UINT32 form_factor)
@@ -103,26 +103,26 @@ bool esq8img_format::load(io_generic *io, UINT32 form_factor, floppy_image *imag
UINT8 sectdata[(5*1024) + 512];
desc_s sectors[6];
for(int i=0; i<sector_count; i++) {
- if (i < 5)
- {
- sectors[i].data = sectdata + (1024*i); // 5 1024 byte sectors
- sectors[i].size = 1024;
- sectors[i].sector_id = i;
- }
- else
- {
- sectors[i].data = sectdata + (5*1024); // 1 512 byte sector
- sectors[i].size = 512;
- sectors[i].sector_id = i;
- }
+ if (i < 5)
+ {
+ sectors[i].data = sectdata + (1024*i); // 5 1024 byte sectors
+ sectors[i].size = 1024;
+ sectors[i].sector_id = i;
+ }
+ else
+ {
+ sectors[i].data = sectdata + (5*1024); // 1 512 byte sector
+ sectors[i].size = 512;
+ sectors[i].sector_id = i;
+ }
}
int track_size = (5*1024) + 512;
for(int track=0; track < track_count; track++)
- {
+ {
for(int head=0; head < head_count; head++)
- {
+ {
io_generic_read(io, sectdata, (track*head_count + head)*track_size, track_size);
generate_track(esq_6_desc, track, head, sectors, sector_count, 109376, image);
}
diff --git a/src/lib/formats/fdi_dsk.c b/src/lib/formats/fdi_dsk.c
index 04ec14357df..9bf9019f5d3 100644
--- a/src/lib/formats/fdi_dsk.c
+++ b/src/lib/formats/fdi_dsk.c
@@ -23,10 +23,10 @@
#define LOG 1
-#define MAX_TRACKS 180
+#define MAX_TRACKS 180
-#define FLAGS_WRITE_PROTECTED 0x01
-#define FLAGS_INDEX_SYNC 0x02
+#define FLAGS_WRITE_PROTECTED 0x01
+#define FLAGS_INDEX_SYNC 0x02
/* media type */
enum
@@ -55,21 +55,21 @@ static const int TRACKS_PER_INCH[] = { 48, 67, 96, 100, 135, 192 };
/* high level track types */
enum
{
- TRACK_BLANK = 0, /* not supported */
- TRACK_AMIGA_DD, /* not supported */
- TRACK_AMIGA_HD, /* not supported */
- TRACK_ST_DD_9, /* not supported */
- TRACK_ST_DD_10, /* not supported */
- TRACK_PC_DD_8, /* not supported */
- TRACK_PC_DD_9, /* not supported */
- TRACK_PC_HD_15, /* not supported */
- TRACK_IBM_HD_18, /* not supported */
- TRACK_IBM_ED_36, /* not supported */
- TRACK_CBM_1541, /* not supported */
- TRACK_APPLE_DOS_32, /* not supported */
- TRACK_APPLE_DOS_33, /* not supported */
- TRACK_APPLE_GCR, /* not supported */
- TRACK_IBM_SD_10 /* not supported */
+ TRACK_BLANK = 0, /* not supported */
+ TRACK_AMIGA_DD, /* not supported */
+ TRACK_AMIGA_HD, /* not supported */
+ TRACK_ST_DD_9, /* not supported */
+ TRACK_ST_DD_10, /* not supported */
+ TRACK_PC_DD_8, /* not supported */
+ TRACK_PC_DD_9, /* not supported */
+ TRACK_PC_HD_15, /* not supported */
+ TRACK_IBM_HD_18, /* not supported */
+ TRACK_IBM_ED_36, /* not supported */
+ TRACK_CBM_1541, /* not supported */
+ TRACK_APPLE_DOS_32, /* not supported */
+ TRACK_APPLE_DOS_33, /* not supported */
+ TRACK_APPLE_GCR, /* not supported */
+ TRACK_IBM_SD_10 /* not supported */
};
//static const int SECTORS_PER_TRACK[] = { 0, 11, 22, 9, 10, 8, 9, 15, 18, 36, -1, -1, -1, -1, 10 };
@@ -81,9 +81,9 @@ enum
struct fdidsk_tag
{
int version;
- int heads; /* number of physical heads */
- int tracks; /* number of physical tracks */
- UINT32 track_offset[MAX_TRACKS]; /* offset within data for each track */
+ int heads; /* number of physical heads */
+ int tracks; /* number of physical tracks */
+ UINT32 track_offset[MAX_TRACKS]; /* offset within data for each track */
UINT8 track_type[MAX_TRACKS];
};
diff --git a/src/lib/formats/flopimg.c b/src/lib/formats/flopimg.c
index b33996fdeec..23a36b3e51d 100644
--- a/src/lib/formats/flopimg.c
+++ b/src/lib/formats/flopimg.c
@@ -485,7 +485,7 @@ static floperr_t floppy_readwrite_sector(floppy_image_legacy *floppy, int head,
if ((offset > 0) || (buffer_len < sector_length))
{
/* we will be doing an partial read/write; in other words we
- * will not be reading/writing a full sector */
+ * will not be reading/writing a full sector */
if (alloc_buf) free(alloc_buf);
alloc_buf = (UINT8*)malloc(sector_length);
if (!alloc_buf)
diff --git a/src/lib/formats/flopimg.h b/src/lib/formats/flopimg.h
index d2097db49a8..87b0a4d167c 100644
--- a/src/lib/formats/flopimg.h
+++ b/src/lib/formats/flopimg.h
@@ -227,33 +227,33 @@ public:
virtual ~floppy_image_format_t();
/*! @brief Identify an image.
- The identify function tests if the image is valid
- for this particular format.
- @param io buffer containing the image data.
- @param form_factor Physical form factor of disk, from the enum
- in floppy_image
- @return 1 if image valid, 0 otherwise.
- */
+ The identify function tests if the image is valid
+ for this particular format.
+ @param io buffer containing the image data.
+ @param form_factor Physical form factor of disk, from the enum
+ in floppy_image
+ @return 1 if image valid, 0 otherwise.
+ */
virtual int identify(io_generic *io, UINT32 form_factor) = 0;
/*! @brief Load an image.
- The load function opens an image file and converts it to the
- internal MESS floppy representation.
- @param io source buffer containing the image data.
- @param form_factor Physical form factor of disk, from the enum
- in floppy_image
- @param image output buffer for data in MESS internal format.
- @return true on success, false otherwise.
- */
+ The load function opens an image file and converts it to the
+ internal MESS floppy representation.
+ @param io source buffer containing the image data.
+ @param form_factor Physical form factor of disk, from the enum
+ in floppy_image
+ @param image output buffer for data in MESS internal format.
+ @return true on success, false otherwise.
+ */
virtual bool load(io_generic *io, UINT32 form_factor, floppy_image *image) = 0;
/*! @brief Save an image.
- The save function writes back an image from the MESS internal
- floppy representation to the appropriate format on disk.
- @param io output buffer for the data in the on-disk format.
- @param image source buffer containing data in MESS internal format.
- @return true on success, false otherwise.
- */
+ The save function writes back an image from the MESS internal
+ floppy representation to the appropriate format on disk.
+ @param io output buffer for the data in the on-disk format.
+ @param image source buffer containing data in MESS internal format.
+ @return true on success, false otherwise.
+ */
virtual bool save(io_generic *io, floppy_image *image);
//! @returns string containing name of format.
@@ -301,7 +301,7 @@ protected:
//! Opcodes of the format description language used by generate_track()
enum {
END, //!< End of description
- FM, //!< One byte in p1 to be fm-encoded, msb first, repeated p2 times
+ FM, //!< One byte in p1 to be fm-encoded, msb first, repeated p2 times
MFM, //!< One byte in p1 to be mfm-encoded, msb first, repeated p2 times
MFMBITS, //!< A value of p2 bits in p1 to be mfm-encoded, msb first
RAW, //!< One 16 bits word in p1 to be written raw, msb first, repeated p2 times
@@ -354,40 +354,40 @@ protected:
/*! @brief Generate one track according to the description vector.
- @param desc track data description
- @param track
- @param head
- @param sect a vector indexed by sector id.
- @param sect_count number of sectors.
- @param track_size in _cells_, i.e. 100000 for a usual 2us-per-cell track at 300rpm.
- @param image
- */
+ @param desc track data description
+ @param track
+ @param head
+ @param sect a vector indexed by sector id.
+ @param sect_count number of sectors.
+ @param track_size in _cells_, i.e. 100000 for a usual 2us-per-cell track at 300rpm.
+ @param image
+ */
void generate_track(const desc_e *desc, int track, int head, const desc_s *sect, int sect_count, int track_size, floppy_image *image);
/*! @brief Generate a track from cell binary values, MSB-first.
- @param track
- @param head
- @param trackbuf track input buffer.
- @param track_size in cells, not bytes.
- @param image
- */
+ @param track
+ @param head
+ @param trackbuf track input buffer.
+ @param track_size in cells, not bytes.
+ @param image
+ */
void generate_track_from_bitstream(int track, int head, const UINT8 *trackbuf, int track_size, floppy_image *image);
//! @brief Generate a track from cell level values (0/1/W/D/N).
/*! Note that this function needs to be able to split cells in two,
- so no time value should be less than 2, and even values are a
- good idea.
- */
+ so no time value should be less than 2, and even values are a
+ good idea.
+ */
/*! @param track
- @param head
- @param trackbuf track input buffer.
- @param track_size in cells, not bytes.
- @param splice_pos is the position of the track splice. For normal
- formats, use -1. For protected formats, you're supposed to
- know. trackbuf may be modified at that position or after.
- @param image
- */
+ @param head
+ @param trackbuf track input buffer.
+ @param track_size in cells, not bytes.
+ @param splice_pos is the position of the track splice. For normal
+ formats, use -1. For protected formats, you're supposed to
+ know. trackbuf may be modified at that position or after.
+ @param image
+ */
void generate_track_from_levels(int track, int head, UINT32 *trackbuf, int track_size, int splice_pos, floppy_image *image);
//! Normalize the times in a cell buffer to sum up to 200000000
@@ -429,43 +429,43 @@ protected:
// **** Writer helpers ****
/*! @brief Rebuild a cell bitstream for a track.
- Takes the cell standard
- angular size as a parameter, gives out a msb-first bitstream.
-
- Beware that fuzzy bits will always give out the same value.
- @param track
- @param head
- @param cell_size
- @param trackbuf Output buffer size should be 34% more than the nominal number
- of cells (the dpll tolerates a cell size down to 75% of the
- nominal one, with gives a cell count of 1/0.75=1.333... times
- the nominal one).
- @param track_size Output size is given in bits (cells).
- @param image
- */
+ Takes the cell standard
+ angular size as a parameter, gives out a msb-first bitstream.
+
+ Beware that fuzzy bits will always give out the same value.
+ @param track
+ @param head
+ @param cell_size
+ @param trackbuf Output buffer size should be 34% more than the nominal number
+ of cells (the dpll tolerates a cell size down to 75% of the
+ nominal one, with gives a cell count of 1/0.75=1.333... times
+ the nominal one).
+ @param track_size Output size is given in bits (cells).
+ @param image
+ */
/*! @verbatim
- Computing the standard angular size of a cell is
- simple. Noting:
- d = standard cell duration in microseconds
- r = motor rotational speed in rpm
- then:
- a = r * d * 10 / 3.
- Some values:
- Type Cell RPM Size
-
- C1541 tr 1-17 3.25 300 3250
- C1541 tr 18-24 3.50 300 3500
- C1541 tr 25-30 3.75 300 3750
- C1541 tr 31+ 4.00 300 4000
- 5.25" SD 4 300 4000
- 5.25" DD 2 300 2000
- 5.25" HD 1 360 1200
- 3.5" SD 4 300 4000
- 3.5" DD 2 300 2000
- 3.5" HD 1 300 1000
- 3.5" ED 0.5 300 500
- @endverbatim
- */
+ Computing the standard angular size of a cell is
+ simple. Noting:
+ d = standard cell duration in microseconds
+ r = motor rotational speed in rpm
+ then:
+ a = r * d * 10 / 3.
+ Some values:
+ Type Cell RPM Size
+
+ C1541 tr 1-17 3.25 300 3250
+ C1541 tr 18-24 3.50 300 3500
+ C1541 tr 25-30 3.75 300 3750
+ C1541 tr 31+ 4.00 300 4000
+ 5.25" SD 4 300 4000
+ 5.25" DD 2 300 2000
+ 5.25" HD 1 360 1200
+ 3.5" SD 4 300 4000
+ 3.5" DD 2 300 2000
+ 3.5" HD 1 300 1000
+ 3.5" ED 0.5 300 500
+ @endverbatim
+ */
void generate_bitstream_from_track(int track, int head, int cell_size, UINT8 *trackbuf, int &track_size, floppy_image *image);
@@ -671,10 +671,10 @@ public:
//! floppy_image constructor
/*!
- @param _tracks number of tracks.
- @param _heads number of heads.
- @param _form_factor form factor of drive (from enum)
- */
+ @param _tracks number of tracks.
+ @param _heads number of heads.
+ @param _form_factor form factor of drive (from enum)
+ */
floppy_image(int tracks, int heads, UINT32 form_factor);
virtual ~floppy_image();
@@ -686,17 +686,17 @@ public:
void set_variant(UINT32 v) { variant = v; }
/*!
- @param track
- @param head
- @param size size of this track
- */
+ @param track
+ @param head
+ @param size size of this track
+ */
void set_track_size(int track, int head, UINT32 size) { track_size[track][head] = size; ensure_alloc(track, head); }
/*!
- @param track track number
- @param head head number
- @return a pointer to the data buffer for this track and head
- */
+ @param track track number
+ @param head head number
+ @return a pointer to the data buffer for this track and head
+ */
UINT32 *get_buffer(int track, int head) { return cell_data[track][head]; }
//! @return the track size
//! @param track
@@ -711,9 +711,9 @@ public:
//! representation is the angular position relative to the index.
/*! @param track
- @param head
- @param pos the position
- */
+ @param head
+ @param pos the position
+ */
void set_write_splice_position(int track, int head, UINT32 pos) { write_splice[track][head] = pos; }
//! @return the current write splice position.
UINT32 get_write_splice_position(int track, int head) const { return write_splice[track][head]; }
diff --git a/src/lib/formats/fm7_cas.c b/src/lib/formats/fm7_cas.c
index 383060277c9..32ec7390459 100644
--- a/src/lib/formats/fm7_cas.c
+++ b/src/lib/formats/fm7_cas.c
@@ -4,8 +4,8 @@
#include "fm7_cas.h"
-#define WAVE_HIGH 0x5a9e
-#define WAVE_LOW -0x5a9e
+#define WAVE_HIGH 0x5a9e
+#define WAVE_LOW -0x5a9e
static int cas_size;
@@ -74,13 +74,13 @@ static int fm7_cas_fill_wave(INT16 *buffer, int sample_count, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller fm7_legacy_fill_wave =
{
- fm7_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- fm7_cas_to_wav_size, /* chunk_sample_calc */
- 110250, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ fm7_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ fm7_cas_to_wav_size, /* chunk_sample_calc */
+ 110250, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t fm7_cas_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/fmsx_cas.c b/src/lib/formats/fmsx_cas.c
index ab4a7a96ddd..082be3cda3f 100644
--- a/src/lib/formats/fmsx_cas.c
+++ b/src/lib/formats/fmsx_cas.c
@@ -14,7 +14,7 @@ static int cas_size;
********************************************************************/
static int fmsx_cas_to_wav_size (const UINT8 *casdata, int caslen)
{
- int pos, size;
+ int pos, size;
if (caslen < 8) return -1;
if (memcmp (casdata, CasHeader, sizeof (CasHeader) ) ) return -1;
@@ -51,7 +51,7 @@ static int fmsx_cas_fill_wave(INT16 *buffer, int sample_count, UINT8 *bytes)
cas_pos = 0;
samples_pos = 0;
- while (samples_pos < sample_count && cas_pos < cas_size)
+ while (samples_pos < sample_count && cas_pos < cas_size)
{
/* Check if we need to output a header */
if ( cas_pos + 8 < cas_size )
@@ -102,13 +102,13 @@ static int fmsx_cas_fill_wave(INT16 *buffer, int sample_count, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller fmsx_legacy_fill_wave =
{
- fmsx_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- fmsx_cas_to_wav_size, /* chunk_sample_calc */
- 22050, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ fmsx_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ fmsx_cas_to_wav_size, /* chunk_sample_calc */
+ 22050, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
diff --git a/src/lib/formats/g64_dsk.c b/src/lib/formats/g64_dsk.c
index 37617b769aa..2e71e979950 100644
--- a/src/lib/formats/g64_dsk.c
+++ b/src/lib/formats/g64_dsk.c
@@ -27,8 +27,8 @@
PARAMETERS
***************************************************************************/
-#define HEADER_LENGTH 0x2ac // standard length for 84 half tracks
-#define MAX_TRACKS 84
+#define HEADER_LENGTH 0x2ac // standard length for 84 half tracks
+#define MAX_TRACKS 84
/***************************************************************************
TYPE DEFINITIONS
@@ -37,11 +37,11 @@
struct g64dsk_tag
{
int version;
- int heads; // number of physical heads
- int tracks; // number of physical tracks
- UINT16 track_size[MAX_TRACKS]; // size of each track
- UINT32 track_offset[MAX_TRACKS]; // offset within data for each track
- UINT32 speed_zone_offset[MAX_TRACKS]; // offset within data for each track
+ int heads; // number of physical heads
+ int tracks; // number of physical tracks
+ UINT16 track_size[MAX_TRACKS]; // size of each track
+ UINT32 track_offset[MAX_TRACKS]; // offset within data for each track
+ UINT32 speed_zone_offset[MAX_TRACKS]; // offset within data for each track
};
/***************************************************************************
@@ -137,14 +137,14 @@ static floperr_t g64_read_track(floppy_image_legacy *floppy, int head, int track
{
/*
- The following is written into the buffer:
+ The following is written into the buffer:
- n bytes of track data
- 1982 bytes of speed zone data
+ n bytes of track data
+ 1982 bytes of speed zone data
- get_track_size() returns n (size of track data)
+ get_track_size() returns n (size of track data)
- */
+ */
struct g64dsk_tag *tag = get_tag(floppy);
floperr_t err;
diff --git a/src/lib/formats/g64_dsk.h b/src/lib/formats/g64_dsk.h
index d8f793de514..287446a4b88 100644
--- a/src/lib/formats/g64_dsk.h
+++ b/src/lib/formats/g64_dsk.h
@@ -15,25 +15,25 @@
MACROS / CONSTANTS
***************************************************************************/
-#define G64_SYNC_MARK 0x3ff /* 10 consecutive 1-bits */
+#define G64_SYNC_MARK 0x3ff /* 10 consecutive 1-bits */
-#define G64_BUFFER_SIZE 16384
-#define G64_SPEED_BLOCK_SIZE 1982
+#define G64_BUFFER_SIZE 16384
+#define G64_SPEED_BLOCK_SIZE 1982
const int C2040_BITRATE[] =
{
- XTAL_16MHz/16, /* tracks 1-17 */
- XTAL_16MHz/15, /* tracks 18-24 */
- XTAL_16MHz/14, /* tracks 25-30 */
- XTAL_16MHz/13 /* tracks 31-42 */
+ XTAL_16MHz/16, /* tracks 1-17 */
+ XTAL_16MHz/15, /* tracks 18-24 */
+ XTAL_16MHz/14, /* tracks 25-30 */
+ XTAL_16MHz/13 /* tracks 31-42 */
};
const int C8050_BITRATE[] =
{
- XTAL_12MHz/2/16, /* tracks 1-39 */
- XTAL_12MHz/2/15, /* tracks 40-53 */
- XTAL_12MHz/2/14, /* tracks 54-65 */
- XTAL_12MHz/2/13 /* tracks 65-84 */
+ XTAL_12MHz/2/16, /* tracks 1-39 */
+ XTAL_12MHz/2/15, /* tracks 40-53 */
+ XTAL_12MHz/2/14, /* tracks 54-65 */
+ XTAL_12MHz/2/13 /* tracks 65-84 */
};
/***************************************************************************
diff --git a/src/lib/formats/gtp_cas.c b/src/lib/formats/gtp_cas.c
index e3756c4dcf7..7f786bf1ab6 100644
--- a/src/lib/formats/gtp_cas.c
+++ b/src/lib/formats/gtp_cas.c
@@ -7,25 +7,25 @@
#include "gtp_cas.h"
-#define GTP_WAV_FREQUENCY 44100
-#define WAVE_LOW -0x5a9e
-#define WAVE_HIGH 0x5a9e
-#define WAVE_NULL 0
+#define GTP_WAV_FREQUENCY 44100
+#define WAVE_LOW -0x5a9e
+#define WAVE_HIGH 0x5a9e
+#define WAVE_NULL 0
-#define GTP_BLOCK_STANDARD 0x00
-#define GTP_BLOCK_TURBO 0x01
-#define GTP_BLOCK_NAME 0x10
+#define GTP_BLOCK_STANDARD 0x00
+#define GTP_BLOCK_TURBO 0x01
+#define GTP_BLOCK_NAME 0x10
-static INT16 wave_data;
-static INT16 len;
+static INT16 wave_data;
+static INT16 len;
-#define PULSE_WIDTH 30
-#define PERIOD_BASE 150
-#define PERIOD_1 75
-#define PERIOD_0 150
+#define PULSE_WIDTH 30
+#define PERIOD_BASE 150
+#define PERIOD_1 75
+#define PERIOD_0 150
-#define INTERBYTE_PAUSE 225
-#define INTERBLOCK_PAUSE 100000
+#define INTERBYTE_PAUSE 225
+#define INTERBLOCK_PAUSE 100000
static void gtp_output_wave( INT16 **buffer, int length ) {
@@ -162,13 +162,13 @@ static int gtp_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes ) {
static const struct CassetteLegacyWaveFiller gtp_legacy_fill_wave = {
- gtp_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- gtp_cas_to_wav_size, /* chunk_sample_calc */
- GTP_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ gtp_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ gtp_cas_to_wav_size, /* chunk_sample_calc */
+ GTP_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
@@ -196,5 +196,3 @@ static const struct CassetteFormat gtp_cassette_format = {
CASSETTE_FORMATLIST_START(gtp_cassette_formats)
CASSETTE_FORMAT(gtp_cassette_format)
CASSETTE_FORMATLIST_END
-
-
diff --git a/src/lib/formats/hect_tap.c b/src/lib/formats/hect_tap.c
index 5032728224f..ad67de93ecc 100644
--- a/src/lib/formats/hect_tap.c
+++ b/src/lib/formats/hect_tap.c
@@ -15,9 +15,9 @@ Updated 3/1/10 : use real value for timing.
#include "hect_tap.h"
-#define SMPLO -32768
-#define SILENCE 0
-#define SMPHI 32767
+#define SMPLO -32768
+#define SILENCE 0
+#define SMPHI 32767
static int cas_size;
@@ -92,54 +92,54 @@ INLINE int hector_tap_synchro(INT16 *buffer, int sample_pos, int nb_synchro)
static int hector_handle_tap(INT16 *buffer, const UINT8 *casdata)
{
- int data_pos, sample_count/*, block_count*/;
- int previous_block=0;
+ int data_pos, sample_count/*, block_count*/;
+ int previous_block=0;
data_pos = 0;
sample_count = 0;
- /*block_count = 0;*/
- previous_block = 0;
+ /*block_count = 0;*/
+ previous_block = 0;
/* First 768 cycle of synchro */
sample_count += hector_tap_synchro( buffer, sample_count, 768-4 );
/* on the entire file*/
- while( data_pos < cas_size )
+ while( data_pos < cas_size )
{
- UINT16 block_size;
+ UINT16 block_size;
- if (previous_block == 0xFE)
- /* Starting a block with 150 cycle of synchro to let time to Hector to do the job ! */
- sample_count += hector_tap_synchro( buffer, sample_count, 150 );
- else
- /* Starting a block with 4 cycle of synchro */
- sample_count += hector_tap_synchro( buffer, sample_count, 4 );
+ if (previous_block == 0xFE)
+ /* Starting a block with 150 cycle of synchro to let time to Hector to do the job ! */
+ sample_count += hector_tap_synchro( buffer, sample_count, 150 );
+ else
+ /* Starting a block with 4 cycle of synchro */
+ sample_count += hector_tap_synchro( buffer, sample_count, 4 );
- if (data_pos>1)
- previous_block = casdata[data_pos-1];
+ if (data_pos>1)
+ previous_block = casdata[data_pos-1];
/* Handle block lenght on tape data */
block_size = casdata[data_pos] ;
if (block_size==0)
- block_size=256;
+ block_size=256;
/*block_count++;*/
- sample_count += hector_tap_byte(buffer, sample_count, casdata[data_pos] );
- data_pos++;
+ sample_count += hector_tap_byte(buffer, sample_count, casdata[data_pos] );
+ data_pos++;
/* Data samples */
for ( ; block_size ; data_pos++, block_size-- )
- {
- /* Make sure there are enough bytes left */
- if ( data_pos > cas_size )
- return -1;
+ {
+ /* Make sure there are enough bytes left */
+ if ( data_pos > cas_size )
+ return -1;
sample_count += hector_tap_byte( buffer, sample_count, casdata[data_pos] );
- }
- }
- /*Finish by a zero*/
- sample_count += hector_tap_byte( buffer, sample_count, 0 );
+ }
+ }
+ /*Finish by a zero*/
+ sample_count += hector_tap_byte( buffer, sample_count, 0 );
return sample_count;
}
@@ -150,25 +150,25 @@ static int hector_handle_tap(INT16 *buffer, const UINT8 *casdata)
static int hector_handle_forth_tap(INT16 *buffer, const UINT8 *casdata)
{
- int data_pos, sample_count/*, block_count*/;
- /*int previous_block=0;*/
+ int data_pos, sample_count/*, block_count*/;
+ /*int previous_block=0;*/
data_pos = 0;
sample_count = 0;
- /*block_count = 0;*/
- /*previous_block = 0;*/
+ /*block_count = 0;*/
+ /*previous_block = 0;*/
- /* Out if len of file not modulo 822 octets */
+ /* Out if len of file not modulo 822 octets */
if ( (cas_size % 822) != 0 )
return -1;
/* on the entire file*/
- while( data_pos < cas_size )
+ while( data_pos < cas_size )
{
- UINT16 block_size;
+ UINT16 block_size;
- /* Starting a block with 768 cycle of synchro*/
- sample_count += hector_tap_synchro( buffer, sample_count, 768 );
+ /* Starting a block with 768 cycle of synchro*/
+ sample_count += hector_tap_synchro( buffer, sample_count, 768 );
/* Handle block lenght on tape data */
block_size = 822 ; /* Fixed size for the forth*/
@@ -177,18 +177,18 @@ static int hector_handle_forth_tap(INT16 *buffer, const UINT8 *casdata)
/* Data samples */
for ( ; block_size ; data_pos++, block_size-- )
- {
- /* Make sure there are enough bytes left */
- if ( data_pos > cas_size )
- return -1;
+ {
+ /* Make sure there are enough bytes left */
+ if ( data_pos > cas_size )
+ return -1;
sample_count += hector_tap_byte( buffer, sample_count, casdata[data_pos] );
- }
- }
+ }
+ }
- /*Finish by a zero*/
- sample_count += hector_tap_byte( buffer, sample_count, 0 );
+ /*Finish by a zero*/
+ sample_count += hector_tap_byte( buffer, sample_count, 0 );
return sample_count;
}
@@ -238,24 +238,24 @@ static int hector_tap_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller hector_legacy_fill_wave =
{
- hector_tap_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- hector_tap_to_wav_size, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ hector_tap_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ hector_tap_to_wav_size, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static const struct CassetteLegacyWaveFiller hector_forth_legacy_fill_wave =
{
- hector_tap_forth_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- hector_tap_forth_to_wav_size, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ hector_tap_forth_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ hector_tap_forth_to_wav_size, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
diff --git a/src/lib/formats/hect_tap.h b/src/lib/formats/hect_tap.h
index 893c3193510..fb1798ccca0 100644
--- a/src/lib/formats/hect_tap.h
+++ b/src/lib/formats/hect_tap.h
@@ -14,4 +14,3 @@
CASSETTE_FORMATLIST_EXTERN(hector_cassette_formats);
#endif /* HECT_TAP_H */
-
diff --git a/src/lib/formats/hxcmfm_dsk.c b/src/lib/formats/hxcmfm_dsk.c
index c3cfd9f5353..ea1e8d2987b 100644
--- a/src/lib/formats/hxcmfm_dsk.c
+++ b/src/lib/formats/hxcmfm_dsk.c
@@ -35,7 +35,7 @@
#include "hxcmfm_dsk.h"
-#define MFM_FORMAT_HEADER "HXCMFM"
+#define MFM_FORMAT_HEADER "HXCMFM"
#pragma pack(1)
diff --git a/src/lib/formats/imageutl.c b/src/lib/formats/imageutl.c
index b662792ba95..74f85a97d44 100644
--- a/src/lib/formats/imageutl.c
+++ b/src/lib/formats/imageutl.c
@@ -106,7 +106,7 @@ unsigned short ccitt_crc16(unsigned short crc, const unsigned char *buffer, size
unsigned short ccitt_crc16_one( unsigned short crc, const unsigned char data )
{
- return (crc << 8) ^ ccitt_crc16_table[(crc >> 8) ^ data];
+ return (crc << 8) ^ ccitt_crc16_table[(crc >> 8) ^ data];
}
@@ -220,4 +220,3 @@ void image_specify_extension(char *buffer, size_t buffer_len, const char *extens
}
}
}
-
diff --git a/src/lib/formats/imageutl.h b/src/lib/formats/imageutl.h
index 1822b72a17a..49c1df55b39 100644
--- a/src/lib/formats/imageutl.h
+++ b/src/lib/formats/imageutl.h
@@ -73,14 +73,14 @@ INLINE void place_integer_be(void *ptr, size_t offset, size_t size, UINT64 value
break;
default:
- if (size >= 1) byte_ptr[0] = (UINT8) (value >> ((size - 1) * 8));
- if (size >= 2) byte_ptr[1] = (UINT8) (value >> ((size - 2) * 8));
- if (size >= 3) byte_ptr[2] = (UINT8) (value >> ((size - 3) * 8));
- if (size >= 4) byte_ptr[3] = (UINT8) (value >> ((size - 4) * 8));
- if (size >= 5) byte_ptr[4] = (UINT8) (value >> ((size - 5) * 8));
- if (size >= 6) byte_ptr[5] = (UINT8) (value >> ((size - 6) * 8));
- if (size >= 7) byte_ptr[6] = (UINT8) (value >> ((size - 7) * 8));
- if (size >= 8) byte_ptr[7] = (UINT8) (value >> ((size - 8) * 8));
+ if (size >= 1) byte_ptr[0] = (UINT8) (value >> ((size - 1) * 8));
+ if (size >= 2) byte_ptr[1] = (UINT8) (value >> ((size - 2) * 8));
+ if (size >= 3) byte_ptr[2] = (UINT8) (value >> ((size - 3) * 8));
+ if (size >= 4) byte_ptr[3] = (UINT8) (value >> ((size - 4) * 8));
+ if (size >= 5) byte_ptr[4] = (UINT8) (value >> ((size - 5) * 8));
+ if (size >= 6) byte_ptr[5] = (UINT8) (value >> ((size - 6) * 8));
+ if (size >= 7) byte_ptr[6] = (UINT8) (value >> ((size - 7) * 8));
+ if (size >= 8) byte_ptr[7] = (UINT8) (value >> ((size - 8) * 8));
break;
}
}
@@ -109,14 +109,14 @@ INLINE UINT64 pick_integer_be(const void *ptr, size_t offset, size_t size)
break;
default:
- if (size >= 1) result |= ((UINT64) byte_ptr[0]) << ((size - 1) * 8);
- if (size >= 2) result |= ((UINT64) byte_ptr[1]) << ((size - 2) * 8);
- if (size >= 3) result |= ((UINT64) byte_ptr[2]) << ((size - 3) * 8);
- if (size >= 4) result |= ((UINT64) byte_ptr[3]) << ((size - 4) * 8);
- if (size >= 5) result |= ((UINT64) byte_ptr[4]) << ((size - 5) * 8);
- if (size >= 6) result |= ((UINT64) byte_ptr[5]) << ((size - 6) * 8);
- if (size >= 7) result |= ((UINT64) byte_ptr[6]) << ((size - 7) * 8);
- if (size >= 8) result |= ((UINT64) byte_ptr[7]) << ((size - 8) * 8);
+ if (size >= 1) result |= ((UINT64) byte_ptr[0]) << ((size - 1) * 8);
+ if (size >= 2) result |= ((UINT64) byte_ptr[1]) << ((size - 2) * 8);
+ if (size >= 3) result |= ((UINT64) byte_ptr[2]) << ((size - 3) * 8);
+ if (size >= 4) result |= ((UINT64) byte_ptr[3]) << ((size - 4) * 8);
+ if (size >= 5) result |= ((UINT64) byte_ptr[4]) << ((size - 5) * 8);
+ if (size >= 6) result |= ((UINT64) byte_ptr[5]) << ((size - 6) * 8);
+ if (size >= 7) result |= ((UINT64) byte_ptr[6]) << ((size - 7) * 8);
+ if (size >= 8) result |= ((UINT64) byte_ptr[7]) << ((size - 8) * 8);
break;
}
return result;
@@ -141,14 +141,14 @@ INLINE void place_integer_le(void *ptr, size_t offset, size_t size, UINT64 value
break;
default:
- if (size >= 1) byte_ptr[0] = (UINT8) (value >> (0 * 8));
- if (size >= 2) byte_ptr[1] = (UINT8) (value >> (1 * 8));
- if (size >= 3) byte_ptr[2] = (UINT8) (value >> (2 * 8));
- if (size >= 4) byte_ptr[3] = (UINT8) (value >> (3 * 8));
- if (size >= 5) byte_ptr[4] = (UINT8) (value >> (4 * 8));
- if (size >= 6) byte_ptr[5] = (UINT8) (value >> (5 * 8));
- if (size >= 7) byte_ptr[6] = (UINT8) (value >> (6 * 8));
- if (size >= 8) byte_ptr[7] = (UINT8) (value >> (7 * 8));
+ if (size >= 1) byte_ptr[0] = (UINT8) (value >> (0 * 8));
+ if (size >= 2) byte_ptr[1] = (UINT8) (value >> (1 * 8));
+ if (size >= 3) byte_ptr[2] = (UINT8) (value >> (2 * 8));
+ if (size >= 4) byte_ptr[3] = (UINT8) (value >> (3 * 8));
+ if (size >= 5) byte_ptr[4] = (UINT8) (value >> (4 * 8));
+ if (size >= 6) byte_ptr[5] = (UINT8) (value >> (5 * 8));
+ if (size >= 7) byte_ptr[6] = (UINT8) (value >> (6 * 8));
+ if (size >= 8) byte_ptr[7] = (UINT8) (value >> (7 * 8));
break;
}
}
@@ -177,14 +177,14 @@ INLINE UINT64 pick_integer_le(const void *ptr, size_t offset, size_t size)
break;
default:
- if (size >= 1) result |= ((UINT64) byte_ptr[0]) << (0 * 8);
- if (size >= 2) result |= ((UINT64) byte_ptr[1]) << (1 * 8);
- if (size >= 3) result |= ((UINT64) byte_ptr[2]) << (2 * 8);
- if (size >= 4) result |= ((UINT64) byte_ptr[3]) << (3 * 8);
- if (size >= 5) result |= ((UINT64) byte_ptr[4]) << (4 * 8);
- if (size >= 6) result |= ((UINT64) byte_ptr[5]) << (5 * 8);
- if (size >= 7) result |= ((UINT64) byte_ptr[6]) << (6 * 8);
- if (size >= 8) result |= ((UINT64) byte_ptr[7]) << (7 * 8);
+ if (size >= 1) result |= ((UINT64) byte_ptr[0]) << (0 * 8);
+ if (size >= 2) result |= ((UINT64) byte_ptr[1]) << (1 * 8);
+ if (size >= 3) result |= ((UINT64) byte_ptr[2]) << (2 * 8);
+ if (size >= 4) result |= ((UINT64) byte_ptr[3]) << (3 * 8);
+ if (size >= 5) result |= ((UINT64) byte_ptr[4]) << (4 * 8);
+ if (size >= 6) result |= ((UINT64) byte_ptr[5]) << (5 * 8);
+ if (size >= 7) result |= ((UINT64) byte_ptr[6]) << (6 * 8);
+ if (size >= 8) result |= ((UINT64) byte_ptr[7]) << (7 * 8);
break;
}
return result;
diff --git a/src/lib/formats/imd_dsk.c b/src/lib/formats/imd_dsk.c
index aa7c34065fb..b558a599c63 100644
--- a/src/lib/formats/imd_dsk.c
+++ b/src/lib/formats/imd_dsk.c
@@ -359,7 +359,7 @@ int imd_format::identify(io_generic *io, UINT32 form_factor)
if(h[7] == ':') {
h[30] = 0;
for(int i=0; i != 30; i++)
- if(h[i] >= '0' && h[i] <= '9') \
+ if(h[i] >= '0' && h[i] <= '9') \
h[i] = '0';
fixnum(h+ 9, h+11);
@@ -374,7 +374,7 @@ int imd_format::identify(io_generic *io, UINT32 form_factor)
} else {
h[31] = 0;
for(int i=0; i != 31; i++)
- if(h[i] >= '0' && h[i] <= '9') \
+ if(h[i] >= '0' && h[i] <= '9') \
h[i] = '0';
fixnum(h+10, h+12);
diff --git a/src/lib/formats/ioprocs.c b/src/lib/formats/ioprocs.c
index 66136f0cee1..3c47414ae00 100644
--- a/src/lib/formats/ioprocs.c
+++ b/src/lib/formats/ioprocs.c
@@ -211,6 +211,3 @@ UINT64 io_generic_size(struct io_generic *generic)
{
return generic->procs->filesizeproc(generic->file);
}
-
-
-
diff --git a/src/lib/formats/kc_cas.c b/src/lib/formats/kc_cas.c
index 465f68ccd52..8469b2e0e54 100644
--- a/src/lib/formats/kc_cas.c
+++ b/src/lib/formats/kc_cas.c
@@ -13,16 +13,16 @@
#include "kc_cas.h"
-#define SMPLO -32768
-#define SMPHI 32767
-#define SILENCE 0
+#define SMPLO -32768
+#define SMPHI 32767
+#define SILENCE 0
-#define KC_WAV_FREQUENCY 44100
+#define KC_WAV_FREQUENCY 44100
// from documentation
-#define FREQ_BIT_0 2400
-#define FREQ_BIT_1 1200
-#define FREQ_SEPARATOR 600
+#define FREQ_BIT_0 2400
+#define FREQ_BIT_1 1200
+#define FREQ_SEPARATOR 600
// file formats
enum
@@ -114,7 +114,7 @@ static int kc_handle_cass(INT16 *buffer, const UINT8 *casdata, int type)
sample_count += kc_cas_cycle( buffer, sample_count, FREQ_BIT_1);
// on the entire file
- while( data_pos < kc_image_size )
+ while( data_pos < kc_image_size )
{
UINT8 checksum = 0;
@@ -170,7 +170,7 @@ static int kc_handle_cass(INT16 *buffer, const UINT8 *casdata, int type)
}
block_id++;
- }
+ }
sample_count += kc_cas_cycle( buffer, sample_count, FREQ_SEPARATOR);
@@ -250,13 +250,13 @@ static int kc_kcc_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller kc_kcc_legacy_fill_wave =
{
- kc_kcc_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- kc_kcc_to_wav_size, /* chunk_sample_calc */
- KC_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ kc_kcc_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ kc_kcc_to_wav_size, /* chunk_sample_calc */
+ KC_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t kc_kcc_identify(cassette_image *cassette, struct CassetteOptions *opts)
@@ -302,13 +302,13 @@ static int kc_tap_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller kc_tap_legacy_fill_wave =
{
- kc_tap_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- kc_tap_to_wav_size, /* chunk_sample_calc */
- KC_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ kc_tap_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ kc_tap_to_wav_size, /* chunk_sample_calc */
+ KC_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t kc_tap_identify(cassette_image *cassette, struct CassetteOptions *opts)
@@ -354,13 +354,13 @@ static int kc_sss_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller kc_sss_legacy_fill_wave =
{
- kc_sss_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- kc_sss_to_wav_size, /* chunk_sample_calc */
- KC_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ kc_sss_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ kc_sss_to_wav_size, /* chunk_sample_calc */
+ KC_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t kc_sss_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/kc_cas.h b/src/lib/formats/kc_cas.h
index d02603f1be8..370464c9b30 100644
--- a/src/lib/formats/kc_cas.h
+++ b/src/lib/formats/kc_cas.h
@@ -12,4 +12,3 @@
CASSETTE_FORMATLIST_EXTERN(kc_cassette_formats);
#endif /* KC_CAS_H */
-
diff --git a/src/lib/formats/kim1_cas.c b/src/lib/formats/kim1_cas.c
index 290a0095c99..c3e048e6acc 100644
--- a/src/lib/formats/kim1_cas.c
+++ b/src/lib/formats/kim1_cas.c
@@ -1,7 +1,7 @@
#include "kim1_cas.h"
-#define SMPLO -32768
-#define SMPHI 32767
+#define SMPLO -32768
+#define SMPHI 32767
static int cas_size;
@@ -77,10 +77,10 @@ INLINE int kim1_output_byte( INT16 *buffer, int sample_pos, UINT8 byte )
static int kim1_handle_kim(INT16 *buffer, const UINT8 *casdata)
{
static const UINT8 encoding[16] = { 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46 };
- int i, data_pos, sample_count;
+ int i, data_pos, sample_count;
UINT16 size, address, file_id, checksum;
- if ( cas_size < 9 ) return -1;
+ if ( cas_size < 9 ) return -1;
if ( memcmp( casdata, "KIM1", 4 ) ) return -1;
address = casdata[4] | ( casdata[5] << 8 );
@@ -157,13 +157,13 @@ static int kim1_kim_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller kim1_kim_legacy_fill_wave =
{
- kim1_kim_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- kim1_kim_to_wav_size, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ kim1_kim_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ kim1_kim_to_wav_size, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
@@ -191,4 +191,3 @@ static const struct CassetteFormat kim1_kim_format =
CASSETTE_FORMATLIST_START(kim1_cassette_formats)
CASSETTE_FORMAT(kim1_kim_format)
CASSETTE_FORMATLIST_END
-
diff --git a/src/lib/formats/kim1_cas.h b/src/lib/formats/kim1_cas.h
index e0e547a6a89..8e971c842bb 100644
--- a/src/lib/formats/kim1_cas.h
+++ b/src/lib/formats/kim1_cas.h
@@ -14,4 +14,3 @@
CASSETTE_FORMATLIST_EXTERN(kim1_cassette_formats);
#endif /* __KIM1_CAS_H */
-
diff --git a/src/lib/formats/lviv_lvt.c b/src/lib/formats/lviv_lvt.c
index 55caa46933f..62de1d63981 100644
--- a/src/lib/formats/lviv_lvt.c
+++ b/src/lib/formats/lviv_lvt.c
@@ -4,14 +4,14 @@
#define WAVEENTRY_LOW -32768
#define WAVEENTRY_HIGH 32767
-#define LVIV_LVT_BIT_SAMPLES 60
-#define LVIV_LVT_HEADER_PILOT_SAMPLES 5190*60
-#define LVIV_LVT_HEADER_DATA_SAMPLES 16*11*60
-#define LVIV_LVT_PAUSE_SAMPLES 69370
-#define LVIV_LVT_BLOCK_PILOT_SAMPLES 1298*60
+#define LVIV_LVT_BIT_SAMPLES 60
+#define LVIV_LVT_HEADER_PILOT_SAMPLES 5190*60
+#define LVIV_LVT_HEADER_DATA_SAMPLES 16*11*60
+#define LVIV_LVT_PAUSE_SAMPLES 69370
+#define LVIV_LVT_BLOCK_PILOT_SAMPLES 1298*60
-#define LVIV_LVT_HEADER_PILOT_LENGTH 5190
-#define LVIV_LVT_BLOCK_PILOT_LENGTH 1298
+#define LVIV_LVT_HEADER_PILOT_LENGTH 5190
+#define LVIV_LVT_BLOCK_PILOT_LENGTH 1298
static INT16 *lviv_emit_level(INT16 *p, int count, int level)
{
@@ -38,7 +38,7 @@ static INT16* lviv_output_bit(INT16 *p, UINT8 b)
p = lviv_emit_level (p, 30, WAVEENTRY_HIGH);
p = lviv_emit_level (p, 30, WAVEENTRY_LOW);
}
- return p;
+ return p;
}
static INT16* lviv_output_byte(INT16 *p, UINT8 byte)
@@ -94,9 +94,9 @@ static int lviv_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
p = lviv_output_bit (p, 1);
data_size = length - ( LVIV_LVT_HEADER_PILOT_SAMPLES +
- LVIV_LVT_HEADER_DATA_SAMPLES +
- LVIV_LVT_PAUSE_SAMPLES +
- LVIV_LVT_BLOCK_PILOT_SAMPLES );
+ LVIV_LVT_HEADER_DATA_SAMPLES +
+ LVIV_LVT_PAUSE_SAMPLES +
+ LVIV_LVT_BLOCK_PILOT_SAMPLES );
data_size/=660;
for (i=0; i<data_size; i++)
@@ -109,13 +109,13 @@ static int lviv_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller lviv_legacy_fill_wave =
{
- lviv_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- lviv_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ lviv_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ lviv_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
diff --git a/src/lib/formats/mfi_dsk.c b/src/lib/formats/mfi_dsk.c
index 942d9ef0c8f..70c0a6cb0bf 100644
--- a/src/lib/formats/mfi_dsk.c
+++ b/src/lib/formats/mfi_dsk.c
@@ -128,9 +128,9 @@ int mfi_format::identify(io_generic *io, UINT32 form_factor)
io_generic_read(io, &h, 0, sizeof(header));
if(memcmp( h.sign, sign, 16 ) == 0 &&
- h.cyl_count <= 160 &&
- h.head_count <= 2 &&
- (!form_factor || h.form_factor == form_factor))
+ h.cyl_count <= 160 &&
+ h.head_count <= 2 &&
+ (!form_factor || h.form_factor == form_factor))
return 100;
return 0;
}
@@ -201,7 +201,7 @@ bool mfi_format::save(io_generic *io, floppy_image *image)
for(int head=0; head<heads; head++) {
int tsize = image->get_track_size(track, head);
if(tsize > max_track_size)
- max_track_size = tsize;
+ max_track_size = tsize;
}
header h;
@@ -233,7 +233,7 @@ bool mfi_format::save(io_generic *io, floppy_image *image)
for(int j=0; j<tsize-1; j++)
precomp[j] = (precomp[j] & floppy_image::MG_MASK) |
((precomp[j+1] & floppy_image::TIME_MASK) -
- (precomp[j] & floppy_image::TIME_MASK));
+ (precomp[j] & floppy_image::TIME_MASK));
precomp[tsize-1] = (precomp[tsize-1] & floppy_image::MG_MASK) |
(200000000 - (precomp[tsize-1] & floppy_image::TIME_MASK));
diff --git a/src/lib/formats/mz_cas.c b/src/lib/formats/mz_cas.c
index 3087dad8992..d7897ddf56f 100644
--- a/src/lib/formats/mz_cas.c
+++ b/src/lib/formats/mz_cas.c
@@ -8,38 +8,38 @@
//#define LOG(N,M,A)
// if(VERBOSE>=N){ if( M )LOG_FORMATS("%11.6f: %-24s",machine.time().as_double(), (const char*)M ); LOG_FORMATS A; }
-#define LOG(N,M,A) \
+#define LOG(N,M,A) \
if(VERBOSE>=N){ if( M )printf("%-24s",(const char*)M ); printf A; }
#define LO -32768
-#define HI +32767
+#define HI +32767
#define SHORT_PULSE 2
-#define LONG_PULSE 4
+#define LONG_PULSE 4
#define BYTE_SAMPLES (LONG_PULSE+8*LONG_PULSE)
-#define SILENCE 8000
+#define SILENCE 8000
/* long gap and tape mark */
#define LGAP 22000
-#define LTM_1 40
-#define LTM_0 40
-#define LTM_L 1
+#define LTM_1 40
+#define LTM_0 40
+#define LTM_L 1
/* short gap and tape mark */
#define SGAP 11000
-#define STM_1 20
-#define STM_0 20
-#define STM_L 1
+#define STM_1 20
+#define STM_0 20
+#define STM_L 1
static int fill_wave_1(INT16 *buffer, int offs)
{
buffer[offs++] = HI;
buffer[offs++] = HI;
buffer[offs++] = LO;
- buffer[offs++] = LO;
- return LONG_PULSE;
+ buffer[offs++] = LO;
+ return LONG_PULSE;
}
static int fill_wave_0(INT16 *buffer, int offs)
@@ -51,12 +51,12 @@ static int fill_wave_0(INT16 *buffer, int offs)
static int fill_wave_b(INT16 *buffer, int offs, int byte)
{
- int i, count = 0;
+ int i, count = 0;
/* data bits are preceded by a long pulse */
- count += fill_wave_1(buffer, offs + count);
+ count += fill_wave_1(buffer, offs + count);
- for( i = 7; i >= 0; i-- )
+ for( i = 7; i >= 0; i-- )
{
if( (byte >> i) & 1 )
count += fill_wave_1(buffer, offs + count);
@@ -69,107 +69,107 @@ static int fill_wave_b(INT16 *buffer, int offs, int byte)
static int fill_wave(INT16 *buffer, int length, UINT8 *code)
{
static INT16 *beg;
- static UINT16 csum = 0;
+ static UINT16 csum = 0;
static int header = 1, bytecount = 0;
int count = 0;
- if( code == CODE_HEADER )
- {
+ if( code == CODE_HEADER )
+ {
int i;
/* is there insufficient space for the LGAP? */
if( count + LGAP * SHORT_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700 fill_wave",("LGAP %d samples\n", LGAP * SHORT_PULSE));
- /* fill long gap */
+ /* fill long gap */
for( i = 0; i < LGAP; i++ )
count += fill_wave_0(buffer, count);
- /* make a long tape mark */
+ /* make a long tape mark */
/* is there insufficient space for the LTM 1? */
if( count + LTM_1 * LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("LTM 1 %d samples\n", LTM_1 * LONG_PULSE));
for( i = 0; i < LTM_1; i++ )
count += fill_wave_1(buffer, count);
/* is there insufficient space for the LTM 0? */
if( count + LTM_0 * SHORT_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("LTM 0 %d samples\n", LTM_0 * SHORT_PULSE));
for( i = 0; i < LTM_0; i++ )
count += fill_wave_0(buffer, count);
/* is there insufficient space for the L? */
if( count + LTM_L * LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE));
- count += fill_wave_1(buffer, count);
+ count += fill_wave_1(buffer, count);
/* reset header, bytecount and checksum */
- header = 1;
- bytecount = 0;
- csum = 0;
+ header = 1;
+ bytecount = 0;
+ csum = 0;
/* HDR begins here */
- beg = buffer + count;
+ beg = buffer + count;
- return count;
- }
+ return count;
+ }
if( code == CODE_TRAILER )
- {
+ {
int i, file_length;
INT16 *end = buffer;
/* is there insufficient space for the CHKF? */
if( count + 2 * BYTE_SAMPLES > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("CHKF 0x%04X\n", csum));
count += fill_wave_b(buffer, count, csum >> 8);
count += fill_wave_b(buffer, count, csum & 0xff);
- /* is there insufficient space for the L */
+ /* is there insufficient space for the L */
if( count + LTM_L * LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("L\n"));
- count += fill_wave_1(buffer, count);
+ count += fill_wave_1(buffer, count);
/* is there insufficient space for the 256S pulses? */
if( count + 256 * SHORT_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("256S\n"));
- for (i = 0; i < 256; i++)
+ for (i = 0; i < 256; i++)
count += fill_wave_0(buffer, count);
file_length = (int)(end - beg) / sizeof(INT16);
/* is there insufficient space for the FILEC ? */
if( count + file_length > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("FILEC %d samples\n", file_length));
memcpy(buffer + count, beg, file_length * sizeof(INT16));
count += file_length;
/* is there insufficient space for the CHKF ? */
if( count + 2 * BYTE_SAMPLES > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("CHKF 0x%04X\n", csum));
count += fill_wave_b(buffer, count, csum >> 8);
count += fill_wave_b(buffer, count, csum & 0xff);
/* is there insufficient space for the L ? */
if( count + STM_L * LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE));
- count += fill_wave_1(buffer, count);
+ count += fill_wave_1(buffer, count);
LOG(1,"mz700_fill_wave",("silence %d samples\n", SILENCE));
- /* silence at the end */
+ /* silence at the end */
for( i = 0; i < SILENCE; i++ )
buffer[count++] = 0;
return count;
- }
+ }
if( header == 1 && bytecount == 128 )
{
@@ -178,121 +178,121 @@ static int fill_wave(INT16 *buffer, int length, UINT8 *code)
/* is there insufficient space for the CHKH ? */
if( count + 2 * BYTE_SAMPLES > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("CHKH 0x%04X\n", csum & 0xffff));
count += fill_wave_b(buffer, count, (csum >> 8) & 0xff);
count += fill_wave_b(buffer, count, csum & 0xff);
/* is there insufficient space for the L ? */
if( count + LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE));
- count += fill_wave_1(buffer, count);
+ count += fill_wave_1(buffer, count);
/* is there insufficient space for the 256S ? */
if( count + 256 * SHORT_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("256S\n"));
- for (i = 0; i < 256; i++)
+ for (i = 0; i < 256; i++)
count += fill_wave_0(buffer, count);
hdr_length = (int)(end - beg) / sizeof(INT16);
/* is there insufficient space for the HDRC ? */
if( count + hdr_length > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("HDRC %d samples\n", hdr_length));
memcpy(buffer + count, beg, hdr_length * sizeof(INT16));
count += hdr_length;
/* is there insufficient space for CHKH ? */
if( count + 2 * BYTE_SAMPLES > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("CHKH 0x%04X\n", csum & 0xffff));
count += fill_wave_b(buffer, count, (csum >> 8) & 0xff);
count += fill_wave_b(buffer, count, csum & 0xff);
/* is there insufficient space for the L ? */
if( count + LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE));
- count += fill_wave_1(buffer, count);
+ count += fill_wave_1(buffer, count);
/* is there sufficient space for the SILENCE? */
if( count + SILENCE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("SILENCE %d samples\n", SILENCE));
/* fill silence */
for( i = 0; i < SILENCE; i++ )
buffer[count++] = 0;
- /* is there sufficient space for the SGAP? */
+ /* is there sufficient space for the SGAP? */
if( count + SGAP * SHORT_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("SGAP %d samples\n", SGAP * SHORT_PULSE));
/* fill short gap */
for( i = 0; i < SGAP; i++ )
count += fill_wave_0(buffer, count);
- /* make a short tape mark */
+ /* make a short tape mark */
- /* is there sufficient space for the STM 1? */
+ /* is there sufficient space for the STM 1? */
if( count + STM_1 * LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("STM 1 %d samples\n", STM_1 * LONG_PULSE));
for( i = 0; i < STM_1; i++ )
count += fill_wave_1(buffer, count);
/* is there sufficient space for the STM 0? */
if( count + STM_0 * SHORT_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("STM 0 %d samples\n", STM_0 * SHORT_PULSE));
for( i = 0; i < STM_0; i++ )
count += fill_wave_0(buffer, count);
/* is there sufficient space for the L? */
if( count + STM_L * LONG_PULSE > length )
- return -1;
+ return -1;
LOG(1,"mz700_fill_wave",("L %d samples\n", LONG_PULSE));
- count += fill_wave_1(buffer, count);
+ count += fill_wave_1(buffer, count);
bytecount = 0;
header = 0;
csum = 0;
/* FILE begins here */
- beg = buffer + count;
+ beg = buffer + count;
}
if( length < BYTE_SAMPLES )
- return -1;
+ return -1;
- if (*code & 0x01) csum++;
- if (*code & 0x02) csum++;
- if (*code & 0x04) csum++;
- if (*code & 0x08) csum++;
- if (*code & 0x10) csum++;
- if (*code & 0x20) csum++;
- if (*code & 0x40) csum++;
- if (*code & 0x80) csum++;
+ if (*code & 0x01) csum++;
+ if (*code & 0x02) csum++;
+ if (*code & 0x04) csum++;
+ if (*code & 0x08) csum++;
+ if (*code & 0x10) csum++;
+ if (*code & 0x20) csum++;
+ if (*code & 0x40) csum++;
+ if (*code & 0x80) csum++;
- bytecount++;
+ bytecount++;
count += fill_wave_b(buffer, count, *code);
- return count;
+ return count;
}
-#define MZ700_WAVESAMPLES_HEADER ( \
- LGAP * SHORT_PULSE + \
- LTM_1 * LONG_PULSE + \
- LTM_0 * SHORT_PULSE + \
- LTM_L * LONG_PULSE + \
- 2 * 2 * BYTE_SAMPLES + \
- SILENCE + \
- SGAP * SHORT_PULSE + \
- STM_1 * LONG_PULSE + \
- STM_0 * SHORT_PULSE + \
- STM_L * LONG_PULSE + \
+#define MZ700_WAVESAMPLES_HEADER ( \
+ LGAP * SHORT_PULSE + \
+ LTM_1 * LONG_PULSE + \
+ LTM_0 * SHORT_PULSE + \
+ LTM_L * LONG_PULSE + \
+ 2 * 2 * BYTE_SAMPLES + \
+ SILENCE + \
+ SGAP * SHORT_PULSE + \
+ STM_1 * LONG_PULSE + \
+ STM_0 * SHORT_PULSE + \
+ STM_L * LONG_PULSE + \
2 * 2 * BYTE_SAMPLES)
@@ -300,13 +300,13 @@ static int fill_wave(INT16 *buffer, int length, UINT8 *code)
static const struct CassetteLegacyWaveFiller mz700_legacy_fill_wave =
{
- fill_wave, /* fill_wave */
- 1, /* chunk_size */
- 2 * BYTE_SAMPLES, /* chunk_samples */
- NULL, /* chunk_sample_calc */
- 5120, /* sample_frequency */
- MZ700_WAVESAMPLES_HEADER, /* header_samples */
- 1 /* trailer_samples */
+ fill_wave, /* fill_wave */
+ 1, /* chunk_size */
+ 2 * BYTE_SAMPLES, /* chunk_samples */
+ NULL, /* chunk_sample_calc */
+ 5120, /* sample_frequency */
+ MZ700_WAVESAMPLES_HEADER, /* header_samples */
+ 1 /* trailer_samples */
};
diff --git a/src/lib/formats/orao_cas.c b/src/lib/formats/orao_cas.c
index 5c198db243e..78080b19f1b 100644
--- a/src/lib/formats/orao_cas.c
+++ b/src/lib/formats/orao_cas.c
@@ -6,17 +6,17 @@
#include "orao_cas.h"
-#define ORAO_WAV_FREQUENCY 44100
-#define WAVE_HIGH -32768
-#define WAVE_LOW 0
+#define ORAO_WAV_FREQUENCY 44100
+#define WAVE_HIGH -32768
+#define WAVE_LOW 0
-#define ORAO_WAVE_ONE 24
-#define ORAO_WAVE_ZERO 11
+#define ORAO_WAVE_ONE 24
+#define ORAO_WAVE_ZERO 11
#define ORAO_HEADER_SIZE 360
-static INT16 wave_data;
-static int len;
+static INT16 wave_data;
+static int len;
static void orao_output_wave( INT16 **buffer, int length ) {
if ( buffer == NULL ) {
@@ -82,13 +82,13 @@ static int orao_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes ) {
static const struct CassetteLegacyWaveFiller orao_legacy_fill_wave = {
- orao_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- orao_cas_to_wav_size, /* chunk_sample_calc */
- ORAO_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ orao_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ orao_cas_to_wav_size, /* chunk_sample_calc */
+ ORAO_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
@@ -116,5 +116,3 @@ static const struct CassetteFormat orao_cassette_format = {
CASSETTE_FORMATLIST_START(orao_cassette_formats)
CASSETTE_FORMAT(orao_cassette_format)
CASSETTE_FORMATLIST_END
-
-
diff --git a/src/lib/formats/oric_dsk.c b/src/lib/formats/oric_dsk.c
index 142c4118d7b..f36cbde018e 100644
--- a/src/lib/formats/oric_dsk.c
+++ b/src/lib/formats/oric_dsk.c
@@ -14,8 +14,8 @@
#include "basicdsk.h"
-#define mfm_disk_header_size 0x0100
-#define MFM_ID "MFM_DISK"
+#define mfm_disk_header_size 0x0100
+#define MFM_ID "MFM_DISK"
#define TRACK_SIZE_MFM 0x1900
@@ -34,7 +34,7 @@ struct oricdsk_tag
int geometry;
int tracksize;
int num_sectors;
- struct mfm_disk_sector_info sector_data[32];
+ struct mfm_disk_sector_info sector_data[32];
};
@@ -306,7 +306,7 @@ static FLOPPY_CONSTRUCT(oric_dsk_construct)
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( oric )
- LEGACY_FLOPPY_OPTION( oricmfm, "dsk", "Oric MFM floppy disk image", oric_dsk_identify, oric_dsk_construct, NULL, NULL)
+ LEGACY_FLOPPY_OPTION( oricmfm, "dsk", "Oric MFM floppy disk image", oric_dsk_identify, oric_dsk_construct, NULL, NULL)
LEGACY_FLOPPY_OPTION( oric, "dsk", "Oric disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
HEADS([2])
TRACKS([80])
diff --git a/src/lib/formats/oric_tap.c b/src/lib/formats/oric_tap.c
index 3f69ab3b034..ac6e6c0f72a 100644
--- a/src/lib/formats/oric_tap.c
+++ b/src/lib/formats/oric_tap.c
@@ -4,11 +4,11 @@
#define LOG(x) do { if (ORIC_WAV_DEBUG) printf x; } while (0)
/* this code based heavily on tap2wav by Fabrice Frances */
-#define ORIC_SYNC_BYTE 0x016
+#define ORIC_SYNC_BYTE 0x016
/* frequency of wave */
/* tapes use 1200Hz and 2400Hz samples */
-#define ORIC_WAV_FREQUENCY 4800
+#define ORIC_WAV_FREQUENCY 4800
/* 13 bits define a byte on the cassette */
/* 1 start bit, 8 data bits, 1 parity bit and 3 stop bits */
@@ -302,10 +302,10 @@ static int oric_cassette_calculate_size_in_samples(const UINT8 *bytes, int lengt
LOG_FORMATS("got end of filename\n");
/* 100 1 bits to separate header from data */
- for (i=0; i<100; i++)
- {
- count+=oric_get_bit_size_in_samples(1);
- }
+ for (i=0; i<100; i++)
+ {
+ count+=oric_get_bit_size_in_samples(1);
+ }
oric.cassette_state = ORIC_CASSETTE_WRITE_DATA;
oric.data_count = 0;
@@ -314,7 +314,7 @@ static int oric_cassette_calculate_size_in_samples(const UINT8 *bytes, int lengt
start = (((header[6] & 0x0ff)<<8) | (header[7] & 0x0ff));
LOG(("start (from header): %02x\n",start));
LOG(("end (from header): %02x\n",end));
- oric.data_length = end - start + 1;
+ oric.data_length = end - start + 1;
}
}
break;
@@ -352,7 +352,7 @@ static int oric_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
/* header and trailer act as pauses */
/* the trailer is required so that the via sees the last bit of the last
- byte */
+ byte */
if (bytes == CODE_HEADER) {
for (i = 0; i < ORIC_WAVESAMPLES_HEADER; i++)
*(p++) = WAVEENTRY_NULL;
@@ -438,10 +438,10 @@ static int oric_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
LOG_FORMATS("got end of filename\n");
/* oric includes a small delay, but I don't see
- it being 1 bits */
+ it being 1 bits */
for (i=0; i<100; i++)
{
- p = oric_output_bit(p,1);
+ p = oric_output_bit(p,1);
}
oric.cassette_state = ORIC_CASSETTE_WRITE_DATA;
@@ -451,7 +451,7 @@ static int oric_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
start = (((header[6] & 0x0ff)<<8) | (header[7] & 0x0ff));
LOG(("start (from header): %02x\n",start));
LOG(("end (from header): %02x\n",end));
- oric.data_length = end - start + 1;
+ oric.data_length = end - start + 1;
}
}
break;
@@ -479,13 +479,13 @@ static int oric_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller oric_legacy_fill_wave =
{
- oric_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- oric_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- ORIC_WAV_FREQUENCY, /* sample_frequency */
- ORIC_WAVESAMPLES_HEADER, /* header_samples */
- ORIC_WAVESAMPLES_TRAILER /* trailer_samples */
+ oric_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ oric_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ ORIC_WAV_FREQUENCY, /* sample_frequency */
+ ORIC_WAVESAMPLES_HEADER, /* header_samples */
+ ORIC_WAVESAMPLES_TRAILER /* trailer_samples */
};
diff --git a/src/lib/formats/p6001_cas.c b/src/lib/formats/p6001_cas.c
index ca3e0d4cd43..baf223d060f 100644
--- a/src/lib/formats/p6001_cas.c
+++ b/src/lib/formats/p6001_cas.c
@@ -4,8 +4,8 @@
#include "p6001_cas.h"
-#define WAVE_HIGH 0x5a9e
-#define WAVE_LOW -0x5a9e
+#define WAVE_HIGH 0x5a9e
+#define WAVE_LOW -0x5a9e
static int cas_size;
@@ -59,13 +59,13 @@ static int pc6001_cas_fill_wave(INT16 *buffer, int sample_count, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller pc6001_legacy_fill_wave =
{
- pc6001_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- pc6001_cas_to_wav_size, /* chunk_sample_calc */
- 8000, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ pc6001_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ pc6001_cas_to_wav_size, /* chunk_sample_calc */
+ 8000, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t pc6001_cas_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/pasti_dsk.c b/src/lib/formats/pasti_dsk.c
index 9e61f29546c..45c7aa51acf 100644
--- a/src/lib/formats/pasti_dsk.c
+++ b/src/lib/formats/pasti_dsk.c
@@ -41,7 +41,7 @@ int pasti_format::identify(io_generic *io, UINT32 form_factor)
io_generic_read(io, h, 0, 16);
if(!memcmp(h, "RSY\0\3\0", 6) &&
- (1 || (h[10] >= 80 && h[10] <= 82) || (h[10] >= 160 && h[10] <= 164)))
+ (1 || (h[10] >= 80 && h[10] <= 82) || (h[10] >= 160 && h[10] <= 164)))
return 100;
return 0;
@@ -113,8 +113,8 @@ bool pasti_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
if(0) {
printf("Track %2d.%d: el=%d fl=%d sect=%d flags=%04x tlen=%d/%d tnum=%d flags2=%02x sync=%x\n",
- track, head,
- entry_len, fuzz_len, sect, flags, track_len, tsize, track_num, flags2, syncpos);
+ track, head,
+ entry_len, fuzz_len, sect, flags, track_len, tsize, track_num, flags2, syncpos);
hexdump(raw_track+16*sect, entry_len-16-16*sect);
}
@@ -124,8 +124,8 @@ bool pasti_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
for(int i=0; i<tsize-8; i++) {
if(tdata[i] == 0xa1 && tdata[i+1] == 0xa1 && tdata[i+2] != 0xa1)
printf(" header %5d: %02x %02x %02x %02x %02x %02x %02x\n",
- i+2,
- tdata[i+2], tdata[i+3], tdata[i+4], tdata[i+5], tdata[i+6], tdata[i+7], tdata[i+8]);
+ i+2,
+ tdata[i+2], tdata[i+3], tdata[i+4], tdata[i+5], tdata[i+6], tdata[i+7], tdata[i+8]);
}
}
@@ -143,8 +143,8 @@ bool pasti_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
obs.sectors[s].position = s_pos/8-12;
if(0) {
printf(" sector %2d: off=%5d pos=%5d [%02x %02x] time=%04x flags=%04x id=%02x.%02x.%02x.%02x.%02x.%02x\n",
- s, s_off, s_pos, tdata ? tdata[s_pos/8] : 0x00, tdata ? tdata[s_pos/8+1] : 0x00, s_time, s_flags,
- sh[8], sh[9], sh[10], sh[11], sh[12], sh[13]);
+ s, s_off, s_pos, tdata ? tdata[s_pos/8] : 0x00, tdata ? tdata[s_pos/8+1] : 0x00, s_time, s_flags,
+ sh[8], sh[9], sh[10], sh[11], sh[12], sh[13]);
hexdump(bdata+s_off, 128<<(sh[11] & 3));
}
}
@@ -288,20 +288,20 @@ void pasti_format::wd_generate_track_from_sectors_and_track(int track, int head,
for(int i=0; i != obs.sector_count; i++) {
wd_sect_info *s = sect_infos + i;
printf("%2d: %5d-%5d %c %02x %02x|%02x %02x %5d-%5d %c %02x %02x|%02x %02x %f\n",
- i,
- s->hstart, s->hend, s->hsynced ? 'S' : '-',
- s->hstart == -1 ? 0 : obs.track_data[s->hstart],
- s->hstart == -1 ? 0 : obs.track_data[s->hstart+1],
- s->hend == -1 ? 0 : obs.track_data[s->hend],
- s->hend == -1 ? 0 : obs.track_data[s->hend+1],
-
- s->dstart, s->dend, s->dsynced ? 'S' : '-',
- s->dstart == -1 ? 0 : obs.track_data[s->dstart],
- s->dstart == -1 ? 0 : obs.track_data[s->dstart+1],
- s->dend == -1 ? 0 : obs.track_data[s->dend],
- s->dend == -1 ? 0 : obs.track_data[s->dend+1],
-
- obs.sectors[i].time_ratio);
+ i,
+ s->hstart, s->hend, s->hsynced ? 'S' : '-',
+ s->hstart == -1 ? 0 : obs.track_data[s->hstart],
+ s->hstart == -1 ? 0 : obs.track_data[s->hstart+1],
+ s->hend == -1 ? 0 : obs.track_data[s->hend],
+ s->hend == -1 ? 0 : obs.track_data[s->hend+1],
+
+ s->dstart, s->dend, s->dsynced ? 'S' : '-',
+ s->dstart == -1 ? 0 : obs.track_data[s->dstart],
+ s->dstart == -1 ? 0 : obs.track_data[s->dstart+1],
+ s->dend == -1 ? 0 : obs.track_data[s->dend],
+ s->dend == -1 ? 0 : obs.track_data[s->dend+1],
+
+ obs.sectors[i].time_ratio);
}
if(obs.sector_count) {
@@ -359,10 +359,10 @@ void pasti_format::wd_generate_track_from_sectors_only(int track, int head, flop
const wd_sect &s = obs.sectors[i];
printf("%2d: %02x.%02x.%02x.%02x.%02x.%02x %d %f\n",
- i,
- s.id[0], s.id[1], s.id[2], s.id[3], s.id[4], s.id[5],
- s.position,
- s.time_ratio);
+ i,
+ s.id[0], s.id[1], s.id[2], s.id[3], s.id[4], s.id[5],
+ s.position,
+ s.time_ratio);
if(track==10 && i==0)
hexdump(s.data, 512);
}
@@ -527,8 +527,8 @@ void pasti_format::map_sectors_in_track(wd_obs &obs, wd_sect_info *sect_infos)
for(int i=0; i != tsize; i++)
if(tdata[i] == 0xa1 &&
- tdata[(i+1) % tsize] == 0xa1 &&
- (tdata[(i+2) % tsize] == 0xfe ||
+ tdata[(i+1) % tsize] == 0xa1 &&
+ (tdata[(i+2) % tsize] == 0xfe ||
tdata[(i+2) % tsize] == 0xff)) {
UINT8 hbyte = tdata[(i+2) % tsize];
@@ -560,12 +560,12 @@ void pasti_format::map_sectors_in_track(wd_obs &obs, wd_sect_info *sect_infos)
if(best_bcount < 4) {
if(0)
printf("sector header at %x no match [%02x %02x %02x %02x %02x %02x]\n", i,
- tdata[hpos], tdata[hpos+1], tdata[hpos+2], tdata[hpos+3], tdata[hpos+4], tdata[hpos+5]);
+ tdata[hpos], tdata[hpos+1], tdata[hpos+2], tdata[hpos+3], tdata[hpos+4], tdata[hpos+5]);
} else {
if(0)
printf("sector header at %x matches %d [%02x %02x %02x %02x %02x %02x] [%02x] - %d %s\n", i, j,
- tdata[hpos], tdata[hpos+1], tdata[hpos+2], tdata[hpos+3], tdata[hpos+4], tdata[hpos+5], tdata[tend],
- obs.sectors[j].position, synced ? "synced" : "unsynced");
+ tdata[hpos], tdata[hpos+1], tdata[hpos+2], tdata[hpos+3], tdata[hpos+4], tdata[hpos+5], tdata[tend],
+ obs.sectors[j].position, synced ? "synced" : "unsynced");
sect_infos[j].hstart = hpos - 4;
sect_infos[j].hend = tend + (6-bcount);
@@ -575,9 +575,9 @@ void pasti_format::map_sectors_in_track(wd_obs &obs, wd_sect_info *sect_infos)
if(obs.sectors[j].data)
for(int j=35; j<45; j++) {
if(tdata[(hpos+j) % tsize] == 0xa1 &&
- tdata[(hpos+j+1) % tsize] == 0xa1 &&
- tdata[(hpos+j+2) % tsize] >= 0xfa &&
- tdata[(hpos+j+2) % tsize] <= 0xfd) {
+ tdata[(hpos+j+1) % tsize] == 0xa1 &&
+ tdata[(hpos+j+2) % tsize] >= 0xfa &&
+ tdata[(hpos+j+2) % tsize] <= 0xfd) {
dpos = (hpos+j+3) % tsize;
break;
}
diff --git a/src/lib/formats/pc_dsk.c b/src/lib/formats/pc_dsk.c
index f50e58fd9a5..97840e7d575 100644
--- a/src/lib/formats/pc_dsk.c
+++ b/src/lib/formats/pc_dsk.c
@@ -22,17 +22,17 @@ struct pc_disk_sizes
static const struct pc_disk_sizes disk_sizes[] =
{
- { 8*1*40*512, 8, 1}, /* 5 1/4 inch double density single sided */
- { 8*2*40*512, 8, 2}, /* 5 1/4 inch double density */
- { 9*1*40*512, 9, 1}, /* 5 1/4 inch double density single sided */
- { 9*2*40*512, 9, 2}, /* 5 1/4 inch double density */
- {10*2*40*512, 10, 2}, /* 5 1/4 inch double density single sided */
- { 9*2*80*512, 9, 2}, /* 80 tracks 5 1/4 inch drives rare in PCs */
- { 9*2*80*512, 9, 2}, /* 3 1/2 inch double density */
- {15*2*80*512, 15, 2}, /* 5 1/4 inch high density (or japanese 3 1/2 inch high density) */
- {18*2*80*512, 18, 2}, /* 3 1/2 inch high density */
- {21*2*80*512, 21, 2}, /* 3 1/2 inch high density DMF */
- {36*2*80*512, 36, 2} /* 3 1/2 inch enhanced density */
+ { 8*1*40*512, 8, 1}, /* 5 1/4 inch double density single sided */
+ { 8*2*40*512, 8, 2}, /* 5 1/4 inch double density */
+ { 9*1*40*512, 9, 1}, /* 5 1/4 inch double density single sided */
+ { 9*2*40*512, 9, 2}, /* 5 1/4 inch double density */
+ {10*2*40*512, 10, 2}, /* 5 1/4 inch double density single sided */
+ { 9*2*80*512, 9, 2}, /* 80 tracks 5 1/4 inch drives rare in PCs */
+ { 9*2*80*512, 9, 2}, /* 3 1/2 inch double density */
+ {15*2*80*512, 15, 2}, /* 5 1/4 inch high density (or japanese 3 1/2 inch high density) */
+ {18*2*80*512, 18, 2}, /* 3 1/2 inch high density */
+ {21*2*80*512, 21, 2}, /* 3 1/2 inch high density DMF */
+ {36*2*80*512, 36, 2} /* 3 1/2 inch enhanced density */
};
@@ -61,9 +61,9 @@ static floperr_t pc_dsk_compute_geometry(floppy_image_legacy *floppy, struct bas
if (size >= 0x1a)
{
/*
- * get info from boot sector.
- * not correct on all disks
- */
+ * get info from boot sector.
+ * not correct on all disks
+ */
UINT8 scl, spt, heads;
floppy_image_read(floppy, &scl, 0x0c, 1);
floppy_image_read(floppy, &spt, 0x18, 1);
@@ -131,7 +131,7 @@ static FLOPPY_CONSTRUCT(pc_dsk_construct)
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( pc )
- LEGACY_FLOPPY_OPTION( pc_dsk, "dsk,ima,img,ufi,360", "PC floppy disk image", pc_dsk_identify, pc_dsk_construct, NULL,
+ LEGACY_FLOPPY_OPTION( pc_dsk, "dsk,ima,img,ufi,360", "PC floppy disk image", pc_dsk_identify, pc_dsk_construct, NULL,
HEADS([1]-2)
TRACKS(40/[80])
SECTORS(8/[9]/10/15/18/36))
@@ -157,49 +157,49 @@ const char *pc_format::extensions() const
}
const pc_format::format pc_format::formats[] = {
- { /* 160K 5 1/4 inch double density single sided */
+ { /* 160K 5 1/4 inch double density single sided */
floppy_image::FF_525, floppy_image::SSDD, floppy_image::MFM,
2000, 8, 40, 1, 512, {}, 1, {}, 80, 50, 22, 80
},
- { /* 320K 5 1/4 inch double density */
+ { /* 320K 5 1/4 inch double density */
floppy_image::FF_525, floppy_image::DSDD, floppy_image::MFM,
2000, 8, 40, 2, 512, {}, 1, {}, 80, 50, 22, 80
},
- { /* 180K 5 1/4 inch double density single sided */
+ { /* 180K 5 1/4 inch double density single sided */
floppy_image::FF_525, floppy_image::SSDD, floppy_image::MFM,
2000, 9, 40, 1, 512, {}, 1, {}, 80, 50, 22, 80
},
- { /* 360K 5 1/4 inch double density */
+ { /* 360K 5 1/4 inch double density */
floppy_image::FF_525, floppy_image::DSDD, floppy_image::MFM,
2000, 9, 40, 2, 512, {}, 1, {}, 80, 50, 22, 80
},
- { /* 400K 5 1/4 inch double density - gaps unverified */
+ { /* 400K 5 1/4 inch double density - gaps unverified */
floppy_image::FF_525, floppy_image::DSDD, floppy_image::MFM,
2000, 10, 40, 2, 512, {}, 1, {}, 80, 50, 22, 80
},
- { /* 720K 5 1/4 inch quad density - gaps unverified */
+ { /* 720K 5 1/4 inch quad density - gaps unverified */
floppy_image::FF_525, floppy_image::DSQD, floppy_image::MFM,
2000, 9, 80, 2, 512, {}, 1, {}, 80, 50, 22, 80
},
- { /* 1200K 5 1/4 inch high density */
+ { /* 1200K 5 1/4 inch high density */
floppy_image::FF_525, floppy_image::DSHD, floppy_image::MFM,
1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84
},
- { /* 720K 3 1/2 inch double density */
+ { /* 720K 3 1/2 inch double density */
floppy_image::FF_35, floppy_image::DSDD, floppy_image::MFM,
2000, 9, 80, 2, 512, {}, 1, {}, 80, 50, 22, 80
},
- { /* 1200K 3 1/2 inch high density (japanese variant) - gaps unverified */
+ { /* 1200K 3 1/2 inch high density (japanese variant) - gaps unverified */
floppy_image::FF_35, floppy_image::DSHD, floppy_image::MFM,
1200, 15, 40, 2, 512, {}, 1, {}, 80, 50, 22, 84
},
- { /* 1440K 3 1/2 inch high density */
+ { /* 1440K 3 1/2 inch high density */
floppy_image::FF_35, floppy_image::DSHD, floppy_image::MFM,
1000, 18, 80, 2, 512, {}, 1, {}, 80, 50, 22, 108
},
- { /* 2880K 3 1/2 inch extended density - gaps unverified */
+ { /* 2880K 3 1/2 inch extended density - gaps unverified */
floppy_image::FF_35, floppy_image::DSED, floppy_image::MFM,
- 500, 36, 80, 2, 512, {}, 1, {}, 80, 50, 41, 80
+ 500, 36, 80, 2, 512, {}, 1, {}, 80, 50, 41, 80
},
{}
};
diff --git a/src/lib/formats/pmd_cas.c b/src/lib/formats/pmd_cas.c
index 78a793e48e2..40e3ea03b08 100644
--- a/src/lib/formats/pmd_cas.c
+++ b/src/lib/formats/pmd_cas.c
@@ -13,13 +13,13 @@
#define WAVEENTRY_LOW -32768
#define WAVEENTRY_HIGH 32767
-#define PMD85_WAV_FREQUENCY 7200
-#define PMD85_TIMER_FREQUENCY 1200
-#define PMD85_BIT_LENGTH (PMD85_WAV_FREQUENCY/PMD85_TIMER_FREQUENCY)
-#define PMD85_PILOT_BITS (PMD85_TIMER_FREQUENCY*3)
-#define PMD85_PAUSE_BITS (PMD85_TIMER_FREQUENCY/2)
-#define PMD85_HEADER_BYTES 63
-#define PMD85_BITS_PER_BYTE 11
+#define PMD85_WAV_FREQUENCY 7200
+#define PMD85_TIMER_FREQUENCY 1200
+#define PMD85_BIT_LENGTH (PMD85_WAV_FREQUENCY/PMD85_TIMER_FREQUENCY)
+#define PMD85_PILOT_BITS (PMD85_TIMER_FREQUENCY*3)
+#define PMD85_PAUSE_BITS (PMD85_TIMER_FREQUENCY/2)
+#define PMD85_HEADER_BYTES 63
+#define PMD85_BITS_PER_BYTE 11
// image size
static int pmd85_image_size;
@@ -50,7 +50,7 @@ static int pmd85_output_bit(INT16 *buffer, int sample_pos, UINT8 bit)
samples += pmd85_emit_level (buffer, sample_pos + samples, PMD85_BIT_LENGTH/2, WAVEENTRY_LOW);
}
- return samples;
+ return samples;
}
static int pmd85_output_byte(INT16 *buffer, int sample_pos, UINT8 byte)
@@ -182,13 +182,13 @@ static int pmd85_cassette_calculate_size_in_samples(const UINT8 *bytes, int leng
static const struct CassetteLegacyWaveFiller pmd85_legacy_fill_wave =
{
- pmd85_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- pmd85_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- PMD85_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ pmd85_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ pmd85_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ PMD85_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t pmd85_cassette_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/primoptp.c b/src/lib/formats/primoptp.c
index b145aa1d7b0..5de9a1a7bef 100644
--- a/src/lib/formats/primoptp.c
+++ b/src/lib/formats/primoptp.c
@@ -4,23 +4,23 @@
#include "primoptp.h"
-#define PRIMO_WAVEENTRY_LOW -32768
-#define PRIMO_WAVEENTRY_HIGH 32767
-#define PRIMO_WAVEENTRY_ZERO 0
+#define PRIMO_WAVEENTRY_LOW -32768
+#define PRIMO_WAVEENTRY_HIGH 32767
+#define PRIMO_WAVEENTRY_ZERO 0
-#define PRIMO_WAV_FREQUENCY 22050
-#define PRIMO_BIT_1_PERIOD (312*2*0.000001)
+#define PRIMO_WAV_FREQUENCY 22050
+#define PRIMO_BIT_1_PERIOD (312*2*0.000001)
#define PRIMO_BIT_0_PERIOD (3*PRIMO_BIT_1_PERIOD)
-#define PRIMO_BIT_1_LENGTH (PRIMO_BIT_1_PERIOD*PRIMO_WAV_FREQUENCY)
-#define PRIMO_BIT_0_LENGTH (PRIMO_BIT_0_PERIOD*PRIMO_WAV_FREQUENCY)
+#define PRIMO_BIT_1_LENGTH (PRIMO_BIT_1_PERIOD*PRIMO_WAV_FREQUENCY)
+#define PRIMO_BIT_0_LENGTH (PRIMO_BIT_0_PERIOD*PRIMO_WAV_FREQUENCY)
/*
#define PRIMO_BIT_1_LENGTH 6
#define PRIMO_BIT_0_LENGTH 16
*/
-#define PRIMO_PAUSE_LENGTH 2000
-#define PRIMO_FILE_PILOT_LENGTH ((4*PRIMO_BIT_1_LENGTH + 4*PRIMO_BIT_0_LENGTH)*512)
-#define PRIMO_BLOCK_PILOT_LENGTH ((8*PRIMO_BIT_1_LENGTH)*96 + (5*PRIMO_BIT_1_LENGTH + 3*PRIMO_BIT_0_LENGTH)*3)
+#define PRIMO_PAUSE_LENGTH 2000
+#define PRIMO_FILE_PILOT_LENGTH ((4*PRIMO_BIT_1_LENGTH + 4*PRIMO_BIT_0_LENGTH)*512)
+#define PRIMO_BLOCK_PILOT_LENGTH ((8*PRIMO_BIT_1_LENGTH)*96 + (5*PRIMO_BIT_1_LENGTH + 3*PRIMO_BIT_0_LENGTH)*3)
static UINT32 primo_tape_image_length;
@@ -28,7 +28,7 @@ static INT16 *primo_emit_level(INT16 *p, int count, int level)
{
int i;
- for (i=0; i<count; i++) *(p++) = level;
+ for (i=0; i<count; i++) *(p++) = level;
return p;
}
@@ -45,7 +45,7 @@ static INT16* primo_output_bit(INT16 *p, UINT8 bit)
p = primo_emit_level (p, PRIMO_BIT_0_LENGTH/2, PRIMO_WAVEENTRY_HIGH);
p = primo_emit_level (p, PRIMO_BIT_0_LENGTH/2, PRIMO_WAVEENTRY_LOW);
}
- return p;
+ return p;
}
static INT16* primo_output_byte(INT16 *p, UINT8 byte)
@@ -101,7 +101,7 @@ static int primo_cassette_calculate_size_in_samples(const UINT8 *bytes, int leng
LOG_FORMATS ("File size (with header): %u\n", file_size);
/* b is now set on the first data byte of file
- it means first byte (type) of block */
+ it means first byte (type) of block */
j = 0;
while (j < file_size-3)
@@ -172,7 +172,7 @@ static int primo_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
LOG_FORMATS ("File size: %u\n", file_size);
/* b is now set on the first data byte of file
- it means first byte (block type) of block header */
+ it means first byte (block type) of block header */
j = 0;
while (j < file_size-3)
@@ -215,13 +215,13 @@ static int primo_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller primo_legacy_fill_wave =
{
- primo_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- primo_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- PRIMO_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ primo_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ primo_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ PRIMO_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t primo_ptp_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/rk_cas.c b/src/lib/formats/rk_cas.c
index 8f7f5ca86c8..2a20a8499ab 100644
--- a/src/lib/formats/rk_cas.c
+++ b/src/lib/formats/rk_cas.c
@@ -6,17 +6,17 @@
#include "rk_cas.h"
-#define RK_WAV_FREQUENCY 44000
-#define WAVE_HIGH 32767
-#define WAVE_LOW -32768
+#define RK_WAV_FREQUENCY 44000
+#define WAVE_HIGH 32767
+#define WAVE_LOW -32768
-#define RK_HEADER_LEN 256
+#define RK_HEADER_LEN 256
#define RK_SIZE_20 20
#define RK_SIZE_22 22
#define RK_SIZE_60 60
-static int data_size;
+static int data_size;
static INT16 *rk_emit_level(INT16 *p, int count, int level)
{
@@ -42,7 +42,7 @@ static INT16* rk_output_bit(INT16 *p, UINT8 b,int bitsize)
p = rk_emit_level (p, bitsize, WAVE_HIGH);
}
- return p;
+ return p;
}
static INT16* rk_output_byte(INT16 *p, UINT8 byte,int bitsize)
@@ -138,13 +138,13 @@ static int gam_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes ) {
}
static const struct CassetteLegacyWaveFiller rk20_legacy_fill_wave = {
- rk20_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- rk20_cas_to_wav_size, /* chunk_sample_calc */
- RK_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ rk20_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ rk20_cas_to_wav_size, /* chunk_sample_calc */
+ RK_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t rk20_cassette_identify( cassette_image *cassette, struct CassetteOptions *opts ) {
@@ -156,13 +156,13 @@ static casserr_t rk20_cassette_load( cassette_image *cassette ) {
}
static const struct CassetteLegacyWaveFiller rk22_legacy_fill_wave = {
- rk22_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- rk22_cas_to_wav_size, /* chunk_sample_calc */
- RK_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ rk22_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ rk22_cas_to_wav_size, /* chunk_sample_calc */
+ RK_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t rk22_cassette_identify( cassette_image *cassette, struct CassetteOptions *opts ) {
@@ -174,13 +174,13 @@ static casserr_t rk22_cassette_load( cassette_image *cassette ) {
}
static const struct CassetteLegacyWaveFiller gam_legacy_fill_wave = {
- gam_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- gam_cas_to_wav_size, /* chunk_sample_calc */
- RK_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ gam_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ gam_cas_to_wav_size, /* chunk_sample_calc */
+ RK_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t gam_cassette_identify( cassette_image *cassette, struct CassetteOptions *opts ) {
@@ -192,13 +192,13 @@ static casserr_t gam_cassette_load( cassette_image *cassette ) {
}
static const struct CassetteLegacyWaveFiller rk60_legacy_fill_wave = {
- rk60_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- rk60_cas_to_wav_size, /* chunk_sample_calc */
- RK_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ rk60_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ rk60_cas_to_wav_size, /* chunk_sample_calc */
+ RK_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t rk60_cassette_identify( cassette_image *cassette, struct CassetteOptions *opts ) {
diff --git a/src/lib/formats/rk_cas.h b/src/lib/formats/rk_cas.h
index 71a8ae34860..204324b82c6 100644
--- a/src/lib/formats/rk_cas.h
+++ b/src/lib/formats/rk_cas.h
@@ -21,4 +21,3 @@ CASSETTE_FORMATLIST_EXTERN(rkp_cassette_formats);
CASSETTE_FORMATLIST_EXTERN(gam_cassette_formats);
#endif /* RK_CAS_H */
-
diff --git a/src/lib/formats/sf7000_dsk.c b/src/lib/formats/sf7000_dsk.c
index bc2369895a3..13abedae2e0 100644
--- a/src/lib/formats/sf7000_dsk.c
+++ b/src/lib/formats/sf7000_dsk.c
@@ -63,7 +63,7 @@ const char *sf7000_format::extensions() const
const sf7000_format::format sf7000_format::formats[] = {
{
- // mfm h=00 n=01 sc=10 gpl=2a d=ff
+ // mfm h=00 n=01 sc=10 gpl=2a d=ff
floppy_image::FF_3, floppy_image::SSDD, floppy_image::MFM,
2000, // 2us, 300rpm
16, 40, 1,
diff --git a/src/lib/formats/st_dsk.c b/src/lib/formats/st_dsk.c
index 1965993feb2..48d764e3c54 100644
--- a/src/lib/formats/st_dsk.c
+++ b/src/lib/formats/st_dsk.c
@@ -105,7 +105,7 @@ bool st_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
for(int head=0; head < head_count; head++) {
io_generic_read(io, sectdata, (track*head_count + head)*track_size, track_size);
generate_track(atari_st_fcp_get_desc(track, head, head_count, sector_count),
- track, head, sectors, sector_count, 100000, image);
+ track, head, sectors, sector_count, 100000, image);
}
}
@@ -242,10 +242,10 @@ int msa_format::identify(io_generic *io, UINT32 form_factor)
read_header(io, sign, sect, head, strack, etrack);
if(sign == 0x0e0f &&
- (sect >= 9 && sect <= 11) &&
- (head == 0 || head == 1) &&
- strack <= etrack &&
- etrack < 82)
+ (sect >= 9 && sect <= 11) &&
+ (head == 0 || head == 1) &&
+ strack <= etrack &&
+ etrack < 82)
return 100;
return 0;
}
@@ -279,7 +279,7 @@ bool msa_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
return false;
}
generate_track(atari_st_fcp_get_desc(track, head, head+1, sect),
- track, head, sectors, sect, 100000, image);
+ track, head, sectors, sect, 100000, image);
}
}
diff --git a/src/lib/formats/svi_cas.c b/src/lib/formats/svi_cas.c
index 08e3915ac1c..edb015382ba 100644
--- a/src/lib/formats/svi_cas.c
+++ b/src/lib/formats/svi_cas.c
@@ -1,10 +1,10 @@
#include "svi_cas.h"
-#define CAS_PERIOD_0 (37)
-#define CAS_PERIOD_1 (18)
+#define CAS_PERIOD_0 (37)
+#define CAS_PERIOD_1 (18)
#define CAS_HEADER_PERIODS (1600)
#define CAS_EMPTY_SAMPLES (24220)
-#define CAS_INIT_SAMPLES (200)
+#define CAS_INIT_SAMPLES (200)
static const UINT8 CasHeader[17] =
{
@@ -12,8 +12,8 @@ static const UINT8 CasHeader[17] =
0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x55, 0x7f
};
-#define SMPLO -32768
-#define SMPHI 32767
+#define SMPLO -32768
+#define SMPHI 32767
static int cas_size;
@@ -124,7 +124,7 @@ static int svi_cas_to_wav_size(const UINT8 *casdata, int caslen)
while (cas_pos < caslen)
{
size = CAS_HEADER_PERIODS * ( CAS_PERIOD_0 + CAS_PERIOD_1 ) +
- ( CAS_HEADER_PERIODS / 4 ) * 3;
+ ( CAS_HEADER_PERIODS / 4 ) * 3;
samples_pos += size;
@@ -169,13 +169,13 @@ static int svi_cas_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller svi_legacy_fill_wave =
{
- svi_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- svi_cas_to_wav_size, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ svi_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ svi_cas_to_wav_size, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
diff --git a/src/lib/formats/svi_cas.h b/src/lib/formats/svi_cas.h
index bb2590b45c5..37e62c48b31 100644
--- a/src/lib/formats/svi_cas.h
+++ b/src/lib/formats/svi_cas.h
@@ -14,4 +14,3 @@
CASSETTE_FORMATLIST_EXTERN(svi_cassette_formats);
#endif /* SVI_CAS_H */
-
diff --git a/src/lib/formats/svi_dsk.c b/src/lib/formats/svi_dsk.c
index 0d97c59e0c1..e94b2e2f94d 100644
--- a/src/lib/formats/svi_dsk.c
+++ b/src/lib/formats/svi_dsk.c
@@ -28,7 +28,7 @@ static int svi_get_tracks_per_disk(floppy_image_legacy *floppy)
}
static UINT64 svi_translate_offset(floppy_image_legacy *floppy,
- int track, int head, int sector)
+ int track, int head, int sector)
{
UINT64 o;
if ((track==0) && (head==0))
@@ -161,7 +161,7 @@ static FLOPPY_CONSTRUCT(svi_dsk_construct)
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( svi318 )
- LEGACY_FLOPPY_OPTION( svi_dsk, "dsk", "SVI-318 floppy disk image", svi_dsk_identify, svi_dsk_construct, NULL, NULL)
+ LEGACY_FLOPPY_OPTION( svi_dsk, "dsk", "SVI-318 floppy disk image", svi_dsk_identify, svi_dsk_construct, NULL, NULL)
LEGACY_FLOPPY_OPTION( svi_cpm, "dsk", "SVI-728 DSDD CP/M disk image", basicdsk_identify_default, basicdsk_construct_default, NULL,
HEADS([2])
TRACKS([40])
diff --git a/src/lib/formats/td0_dsk.c b/src/lib/formats/td0_dsk.c
index 363d996d633..9fbec75fa6a 100644
--- a/src/lib/formats/td0_dsk.c
+++ b/src/lib/formats/td0_dsk.c
@@ -28,12 +28,12 @@
/* Huffman coding parameters */
#define N_CHAR (256 - THRESHOLD + F)
- /* character code (= 0..N_CHAR-1) */
+ /* character code (= 0..N_CHAR-1) */
#define T (N_CHAR * 2 - 1) /* Size of table */
#define R (T - 1) /* root position */
#define MAX_FREQ 0x8000
- /* update when cumulative frequency */
- /* reaches to this value */
+ /* update when cumulative frequency */
+ /* reaches to this value */
struct td0dsk_tag
{
@@ -46,9 +46,9 @@ struct td0dsk_tag
struct tdlzhuf {
UINT16 r,
- bufcnt,bufndx,bufpos, // string buffer
- // the following to allow block reads from input in next_word()
- ibufcnt,ibufndx; // input buffer counters
+ bufcnt,bufndx,bufpos, // string buffer
+ // the following to allow block reads from input in next_word()
+ ibufcnt,ibufndx; // input buffer counters
UINT8 inbuf[BUFSZ]; // input buffer
};
@@ -328,116 +328,116 @@ int td0dsk_t::data_read(UINT8 *buf, UINT16 size)
/* decoder table */
static const UINT8 d_code[256] = {
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
- 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
- 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
- 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
- 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A,
- 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B,
- 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D,
- 0x0E, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x0F,
- 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11,
- 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13,
- 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15,
- 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17, 0x17,
- 0x18, 0x18, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B,
- 0x1C, 0x1C, 0x1D, 0x1D, 0x1E, 0x1E, 0x1F, 0x1F,
- 0x20, 0x20, 0x21, 0x21, 0x22, 0x22, 0x23, 0x23,
- 0x24, 0x24, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27,
- 0x28, 0x28, 0x29, 0x29, 0x2A, 0x2A, 0x2B, 0x2B,
- 0x2C, 0x2C, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F,
- 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
- 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
+ 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
+ 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
+ 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
+ 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
+ 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
+ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+ 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x09,
+ 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A, 0x0A,
+ 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B, 0x0B,
+ 0x0C, 0x0C, 0x0C, 0x0C, 0x0D, 0x0D, 0x0D, 0x0D,
+ 0x0E, 0x0E, 0x0E, 0x0E, 0x0F, 0x0F, 0x0F, 0x0F,
+ 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11, 0x11,
+ 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13, 0x13,
+ 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15, 0x15,
+ 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17, 0x17,
+ 0x18, 0x18, 0x19, 0x19, 0x1A, 0x1A, 0x1B, 0x1B,
+ 0x1C, 0x1C, 0x1D, 0x1D, 0x1E, 0x1E, 0x1F, 0x1F,
+ 0x20, 0x20, 0x21, 0x21, 0x22, 0x22, 0x23, 0x23,
+ 0x24, 0x24, 0x25, 0x25, 0x26, 0x26, 0x27, 0x27,
+ 0x28, 0x28, 0x29, 0x29, 0x2A, 0x2A, 0x2B, 0x2B,
+ 0x2C, 0x2C, 0x2D, 0x2D, 0x2E, 0x2E, 0x2F, 0x2F,
+ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+ 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
};
static const UINT8 d_len[256] = {
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
- 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
- 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
- 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
- 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
- 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
- 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
- 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
- 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
- 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
- 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
- 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
- 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
- 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
- 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
- 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+ 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
+ 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
+ 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
+ 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03,
+ 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
+ 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
+ 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
+ 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
+ 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
+ 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04, 0x04,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05,
+ 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
+ 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
+ 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
+ 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
+ 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
+ 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06,
+ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
+ 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
+ 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
};
int td0dsk_t::next_word()
{
- if(tdctl.ibufndx >= tdctl.ibufcnt)
- {
- tdctl.ibufndx = 0;
- tdctl.ibufcnt = data_read(tdctl.inbuf,BUFSZ);
- if(tdctl.ibufcnt <= 0)
- return(-1);
- }
- while (getlen <= 8) { // typically reads a word at a time
- getbuf |= tdctl.inbuf[tdctl.ibufndx++] << (8 - getlen);
- getlen += 8;
- }
- return(0);
+ if(tdctl.ibufndx >= tdctl.ibufcnt)
+ {
+ tdctl.ibufndx = 0;
+ tdctl.ibufcnt = data_read(tdctl.inbuf,BUFSZ);
+ if(tdctl.ibufcnt <= 0)
+ return(-1);
+ }
+ while (getlen <= 8) { // typically reads a word at a time
+ getbuf |= tdctl.inbuf[tdctl.ibufndx++] << (8 - getlen);
+ getlen += 8;
+ }
+ return(0);
}
int td0dsk_t::GetBit() /* get one bit */
{
- INT16 i;
- if(next_word() < 0)
- return(-1);
- i = getbuf;
- getbuf <<= 1;
- getlen--;
- if(i < 0)
- return(1);
- else
- return(0);
+ INT16 i;
+ if(next_word() < 0)
+ return(-1);
+ i = getbuf;
+ getbuf <<= 1;
+ getlen--;
+ if(i < 0)
+ return(1);
+ else
+ return(0);
}
int td0dsk_t::GetByte() /* get a byte */
{
- UINT16 i;
- if(next_word() != 0)
- return(-1);
- i = getbuf;
- getbuf <<= 8;
- getlen -= 8;
- i = i >> 8;
- return((int) i);
+ UINT16 i;
+ if(next_word() != 0)
+ return(-1);
+ i = getbuf;
+ getbuf <<= 8;
+ getlen -= 8;
+ i = i >> 8;
+ return((int) i);
}
@@ -446,22 +446,22 @@ int td0dsk_t::GetByte() /* get a byte */
void td0dsk_t::StartHuff()
{
- int i, j;
-
- for (i = 0; i < N_CHAR; i++) {
- freq[i] = 1;
- son[i] = i + T;
- prnt[i + T] = i;
- }
- i = 0; j = N_CHAR;
- while (j <= R) {
- freq[j] = freq[i] + freq[i + 1];
- son[j] = i;
- prnt[i] = prnt[i + 1] = j;
- i += 2; j++;
- }
- freq[T] = 0xffff;
- prnt[R] = 0;
+ int i, j;
+
+ for (i = 0; i < N_CHAR; i++) {
+ freq[i] = 1;
+ son[i] = i + T;
+ prnt[i + T] = i;
+ }
+ i = 0; j = N_CHAR;
+ while (j <= R) {
+ freq[j] = freq[i] + freq[i + 1];
+ son[j] = i;
+ prnt[i] = prnt[i + 1] = j;
+ i += 2; j++;
+ }
+ freq[T] = 0xffff;
+ prnt[R] = 0;
}
@@ -469,44 +469,44 @@ void td0dsk_t::StartHuff()
void td0dsk_t::reconst()
{
- INT16 i, j, k;
- UINT16 f, l;
-
- /* halven cumulative freq for leaf nodes */
- j = 0;
- for (i = 0; i < T; i++) {
- if (son[i] >= T) {
- freq[j] = (freq[i] + 1) / 2;
- son[j] = son[i];
- j++;
- }
- }
- /* make a tree : first, connect children nodes */
- for (i = 0, j = N_CHAR; j < T; i += 2, j++) {
- k = i + 1;
- f = freq[j] = freq[i] + freq[k];
- for (k = j - 1; f < freq[k]; k--);
- k++;
- l = (j - k) * 2;
-
- /* movmem() is Turbo-C dependent
- rewritten to memmove() by Kenji */
-
- /* movmem(&freq[k], &freq[k + 1], l); */
- (void)memmove(&freq[k + 1], &freq[k], l);
- freq[k] = f;
- /* movmem(&son[k], &son[k + 1], l); */
- (void)memmove(&son[k + 1], &son[k], l);
- son[k] = i;
- }
- /* connect parent nodes */
- for (i = 0; i < T; i++) {
- if ((k = son[i]) >= T) {
- prnt[k] = i;
- } else {
- prnt[k] = prnt[k + 1] = i;
- }
- }
+ INT16 i, j, k;
+ UINT16 f, l;
+
+ /* halven cumulative freq for leaf nodes */
+ j = 0;
+ for (i = 0; i < T; i++) {
+ if (son[i] >= T) {
+ freq[j] = (freq[i] + 1) / 2;
+ son[j] = son[i];
+ j++;
+ }
+ }
+ /* make a tree : first, connect children nodes */
+ for (i = 0, j = N_CHAR; j < T; i += 2, j++) {
+ k = i + 1;
+ f = freq[j] = freq[i] + freq[k];
+ for (k = j - 1; f < freq[k]; k--);
+ k++;
+ l = (j - k) * 2;
+
+ /* movmem() is Turbo-C dependent
+ rewritten to memmove() by Kenji */
+
+ /* movmem(&freq[k], &freq[k + 1], l); */
+ (void)memmove(&freq[k + 1], &freq[k], l);
+ freq[k] = f;
+ /* movmem(&son[k], &son[k + 1], l); */
+ (void)memmove(&son[k + 1], &son[k], l);
+ son[k] = i;
+ }
+ /* connect parent nodes */
+ for (i = 0; i < T; i++) {
+ if ((k = son[i]) >= T) {
+ prnt[k] = i;
+ } else {
+ prnt[k] = prnt[k + 1] = i;
+ }
+ }
}
@@ -514,82 +514,82 @@ void td0dsk_t::reconst()
void td0dsk_t::update(int c)
{
- int i, j, k, l;
-
- if (freq[R] == MAX_FREQ) {
- reconst();
- }
- c = prnt[c + T];
- do {
- k = ++freq[c];
-
- /* swap nodes to keep the tree freq-ordered */
- if (k > freq[l = c + 1]) {
- while (k > freq[++l]);
- l--;
- freq[c] = freq[l];
- freq[l] = k;
-
- i = son[c];
- prnt[i] = l;
- if (i < T) prnt[i + 1] = l;
-
- j = son[l];
- son[l] = i;
-
- prnt[j] = c;
- if (j < T) prnt[j + 1] = c;
- son[c] = j;
-
- c = l;
- }
- } while ((c = prnt[c]) != 0); /* do it until reaching the root */
+ int i, j, k, l;
+
+ if (freq[R] == MAX_FREQ) {
+ reconst();
+ }
+ c = prnt[c + T];
+ do {
+ k = ++freq[c];
+
+ /* swap nodes to keep the tree freq-ordered */
+ if (k > freq[l = c + 1]) {
+ while (k > freq[++l]);
+ l--;
+ freq[c] = freq[l];
+ freq[l] = k;
+
+ i = son[c];
+ prnt[i] = l;
+ if (i < T) prnt[i + 1] = l;
+
+ j = son[l];
+ son[l] = i;
+
+ prnt[j] = c;
+ if (j < T) prnt[j + 1] = c;
+ son[c] = j;
+
+ c = l;
+ }
+ } while ((c = prnt[c]) != 0); /* do it until reaching the root */
}
INT16 td0dsk_t::DecodeChar()
{
- int ret;
- UINT16 c;
-
- c = son[R];
-
- /*
- * start searching tree from the root to leaves.
- * choose node #(son[]) if input bit == 0
- * else choose #(son[]+1) (input bit == 1)
- */
- while (c < T) {
- if((ret = GetBit()) < 0)
- return(-1);
- c += (unsigned) ret;
- c = son[c];
- }
- c -= T;
- update(c);
- return c;
+ int ret;
+ UINT16 c;
+
+ c = son[R];
+
+ /*
+ * start searching tree from the root to leaves.
+ * choose node #(son[]) if input bit == 0
+ * else choose #(son[]+1) (input bit == 1)
+ */
+ while (c < T) {
+ if((ret = GetBit()) < 0)
+ return(-1);
+ c += (unsigned) ret;
+ c = son[c];
+ }
+ c -= T;
+ update(c);
+ return c;
}
INT16 td0dsk_t::DecodePosition()
{
- INT16 bit;
- UINT16 i, j, c;
-
- /* decode upper 6 bits from given table */
- if((bit=GetByte()) < 0)
- return(-1);
- i = (UINT16) bit;
- c = (UINT16)d_code[i] << 6;
- j = d_len[i];
-
- /* input lower 6 bits directly */
- j -= 2;
- while (j--) {
- if((bit = GetBit()) < 0)
- return(-1);
- i = (i << 1) + bit;
- }
- return(c | (i & 0x3f));
+ INT16 bit;
+ UINT16 i, j, c;
+
+ /* decode upper 6 bits from given table */
+ if((bit=GetByte()) < 0)
+ return(-1);
+ i = (UINT16) bit;
+ c = (UINT16)d_code[i] << 6;
+ j = d_len[i];
+
+ /* input lower 6 bits directly */
+ j -= 2;
+ while (j--) {
+ if((bit = GetBit()) < 0)
+ return(-1);
+ i = (i << 1) + bit;
+ }
+ return(c | (i & 0x3f));
}
/* DeCompression
@@ -600,55 +600,55 @@ split out initialization code to init_Decode()
void td0dsk_t::init_Decode()
{
- int i;
- getbuf = 0;
- getlen = 0;
- tdctl.ibufcnt= tdctl.ibufndx = 0; // input buffer is empty
- tdctl.bufcnt = 0;
- StartHuff();
- for (i = 0; i < N - F; i++)
- text_buf[i] = ' ';
- tdctl.r = N - F;
+ int i;
+ getbuf = 0;
+ getlen = 0;
+ tdctl.ibufcnt= tdctl.ibufndx = 0; // input buffer is empty
+ tdctl.bufcnt = 0;
+ StartHuff();
+ for (i = 0; i < N - F; i++)
+ text_buf[i] = ' ';
+ tdctl.r = N - F;
}
int td0dsk_t::Decode(UINT8 *buf, int len) /* Decoding/Uncompressing */
{
- INT16 c,pos;
- int count; // was an unsigned long, seems unnecessary
- for (count = 0; count < len; ) {
- if(tdctl.bufcnt == 0) {
- if((c = DecodeChar()) < 0)
- return(count); // fatal error
- if (c < 256) {
- *(buf++) = c;
- text_buf[tdctl.r++] = c;
- tdctl.r &= (N - 1);
- count++;
- }
- else {
- if((pos = DecodePosition()) < 0)
- return(count); // fatal error
- tdctl.bufpos = (tdctl.r - pos - 1) & (N - 1);
- tdctl.bufcnt = c - 255 + THRESHOLD;
- tdctl.bufndx = 0;
- }
- }
- else { // still chars from last string
- while( tdctl.bufndx < tdctl.bufcnt && count < len ) {
- c = text_buf[(tdctl.bufpos + tdctl.bufndx) & (N - 1)];
- *(buf++) = c;
- tdctl.bufndx++;
- text_buf[tdctl.r++] = c;
- tdctl.r &= (N - 1);
- count++;
- }
- // reset bufcnt after copy string from text_buf[]
- if(tdctl.bufndx >= tdctl.bufcnt)
- tdctl.bufndx = tdctl.bufcnt = 0;
- }
- }
- return(count); // count == len, success
+ INT16 c,pos;
+ int count; // was an unsigned long, seems unnecessary
+ for (count = 0; count < len; ) {
+ if(tdctl.bufcnt == 0) {
+ if((c = DecodeChar()) < 0)
+ return(count); // fatal error
+ if (c < 256) {
+ *(buf++) = c;
+ text_buf[tdctl.r++] = c;
+ tdctl.r &= (N - 1);
+ count++;
+ }
+ else {
+ if((pos = DecodePosition()) < 0)
+ return(count); // fatal error
+ tdctl.bufpos = (tdctl.r - pos - 1) & (N - 1);
+ tdctl.bufcnt = c - 255 + THRESHOLD;
+ tdctl.bufndx = 0;
+ }
+ }
+ else { // still chars from last string
+ while( tdctl.bufndx < tdctl.bufcnt && count < len ) {
+ c = text_buf[(tdctl.bufpos + tdctl.bufndx) & (N - 1)];
+ *(buf++) = c;
+ tdctl.bufndx++;
+ text_buf[tdctl.r++] = c;
+ tdctl.r &= (N - 1);
+ count++;
+ }
+ // reset bufcnt after copy string from text_buf[]
+ if(tdctl.bufndx >= tdctl.bufcnt)
+ tdctl.bufndx = tdctl.bufcnt = 0;
+ }
+ }
+ return(count); // count == len, success
}
diff --git a/src/lib/formats/thom_cas.c b/src/lib/formats/thom_cas.c
index 0ca43d3444e..4bbd78ce807 100644
--- a/src/lib/formats/thom_cas.c
+++ b/src/lib/formats/thom_cas.c
@@ -31,8 +31,8 @@
#define PRINT(x) printf x
-#define LOG(x) do { if (VERBOSE > 0) printf x; } while (0)
-#define VLOG(x) do { if (VERBOSE > 1) printf x; } while (0)
+#define LOG(x) do { if (VERBOSE > 0) printf x; } while (0)
+#define VLOG(x) do { if (VERBOSE > 1) printf x; } while (0)
#define TO7_BIT_LENGTH 0.001114
@@ -127,75 +127,75 @@ static casserr_t to7_k7_load( cassette_image *cass )
#define K7_PUT( PERIOD )
#else
#define K7_PUT( PERIOD ) \
- do \
- { \
- casserr_t err; \
+ do \
+ { \
+ casserr_t err; \
err = cassette_put_samples( cass, 0, time, (PERIOD), 2, 1, \
- square_wave, CASSETTE_WAVEFORM_8BIT ); \
- if ( err ) \
- return err; \
- time += (PERIOD); \
+ square_wave, CASSETTE_WAVEFORM_8BIT ); \
+ if ( err ) \
+ return err; \
+ time += (PERIOD); \
} while (0)
#endif
/* store one bit */
#define K7_PUT_BIT( BIT ) \
- do \
- { \
- int b; \
- if ( BIT ) \
- { \
- for ( b = 0; b < 7; b++ ) \
- K7_PUT( TO7_PERIOD_CASS_1 ); \
- } \
- else \
- { \
- for ( b = 0; b < 5; b++ ) \
- K7_PUT( TO7_PERIOD_CASS_0 ); \
- } \
- if ( to7_k7_bitsize + 1 >= bitmax ) \
- { \
- UINT8* a = (UINT8*)malloc(bitmax * 2); \
- memcpy ( a, to7_k7_bits, bitmax ); \
- bitmax *= 2; \
- to7_k7_bits = a; \
- } \
- to7_k7_bits[ to7_k7_bitsize++ ] = (BIT); \
+ do \
+ { \
+ int b; \
+ if ( BIT ) \
+ { \
+ for ( b = 0; b < 7; b++ ) \
+ K7_PUT( TO7_PERIOD_CASS_1 ); \
+ } \
+ else \
+ { \
+ for ( b = 0; b < 5; b++ ) \
+ K7_PUT( TO7_PERIOD_CASS_0 ); \
+ } \
+ if ( to7_k7_bitsize + 1 >= bitmax ) \
+ { \
+ UINT8* a = (UINT8*)malloc(bitmax * 2); \
+ memcpy ( a, to7_k7_bits, bitmax ); \
+ bitmax *= 2; \
+ to7_k7_bits = a; \
+ } \
+ to7_k7_bits[ to7_k7_bitsize++ ] = (BIT); \
} while (0)
/* store one byte, with start / stop bits */
#define K7_PUT_BYTE( BYTE ) \
- do \
- { \
- UINT8 x; \
- K7_PUT_BIT( 0 ); \
- for ( x = 0; x < 8; x++ ) \
- K7_PUT_BIT( ( (BYTE) >> x ) & 1 ); \
- K7_PUT_BIT( 1 ); \
- K7_PUT_BIT( 1 ); \
+ do \
+ { \
+ UINT8 x; \
+ K7_PUT_BIT( 0 ); \
+ for ( x = 0; x < 8; x++ ) \
+ K7_PUT_BIT( ( (BYTE) >> x ) & 1 ); \
+ K7_PUT_BIT( 1 ); \
+ K7_PUT_BIT( 1 ); \
} while (0)
#define K7_FILL_1( SIZE ) \
- do \
- { \
- if ( (SIZE) > 0 ) { \
- int ii; \
+ do \
+ { \
+ if ( (SIZE) > 0 ) { \
+ int ii; \
LOG (( "to7_k7_load: 1-filler size=%i bitstart=%i\n", \
- (SIZE), to7_k7_bitsize )); \
+ (SIZE), to7_k7_bitsize )); \
for ( ii = 0; ii < (SIZE); ii++ ) K7_PUT_BIT( 1 ); \
- } \
+ } \
} while (0)
#define K7_FILL_ff( SIZE ) \
- do \
- { \
- if ( (SIZE) > 0 ) \
- { \
- int ii; \
+ do \
+ { \
+ if ( (SIZE) > 0 ) \
+ { \
+ int ii; \
LOG (( "to7_k7_load: 0xff filler size=%i bitstart=%i\n", (SIZE), to7_k7_bitsize )); \
- for ( ii = 0; ii < (SIZE); ii++ ) \
- K7_PUT_BYTE( 0xff ); \
- } \
+ for ( ii = 0; ii < (SIZE); ii++ ) \
+ K7_PUT_BYTE( 0xff ); \
+ } \
} while (0)
/* check format */
@@ -241,8 +241,8 @@ static casserr_t to7_k7_load( cassette_image *cass )
{
cassette_image_read( cass, &in, pos, 1 );
/* actually, we are bit laxist and treat as 0xff bytes with at least
- 5 bits out of 8 set to 1
- */
+ 5 bits out of 8 set to 1
+ */
for ( i = 0; in; in >>= 1 )
i += (in & 1);
if ( i < 5 )
@@ -299,10 +299,10 @@ static casserr_t to7_k7_load( cassette_image *cass )
name[i] = '?';
}
PRINT (( "to7_k7_load: file \"%s\" type=%s,%s at %imn %is\n",
- name,
- (t==0) ? "bas" : (t==1) ? "dat" : (t==2) ? "bin" : "???",
- (u == 0) ? "a" : (u == 0xff) ? "b" : "?",
- p / 60, p % 60 ));
+ name,
+ (t==0) ? "bas" : (t==1) ? "dat" : (t==2) ? "bin" : "???",
+ (u == 0) ? "a" : (u == 0xff) ? "b" : "?",
+ p / 60, p % 60 ));
}
/* extra 1-fillers */
@@ -311,8 +311,8 @@ static casserr_t to7_k7_load( cassette_image *cass )
}
/* trailing data with invalid block structure
- => dump it in a raw form, but stay alert for hidden block starts
- */
+ => dump it in a raw form, but stay alert for hidden block starts
+ */
if ( pos < size )
{
invalid++;
@@ -373,7 +373,7 @@ static const struct CassetteFormat to7_k7 =
static casserr_t to7_wav_identify ( cassette_image *cass,
- struct CassetteOptions *opts )
+ struct CassetteOptions *opts )
{
casserr_t e = wavfile_format.identify( cass, opts );
return e;
@@ -401,9 +401,9 @@ static casserr_t to7_wav_load ( cassette_image *cass )
len = (double) info.sample_count / info.sample_frequency;
PRINT (( "to7_wav_load: loading cassette, length %imn %is, %i Hz, %i bps, %i bits\n",
- (int) len / 60, (int) len % 60,
- info.sample_frequency, info.bits_per_sample,
- (int) (len / TO7_BIT_LENGTH) ));
+ (int) len / 60, (int) len % 60,
+ info.sample_frequency, info.bits_per_sample,
+ (int) (len / TO7_BIT_LENGTH) ));
return CASSETTE_ERROR_SUCCESS;
}
@@ -430,7 +430,7 @@ static const struct CassetteFormat to7_wav =
static casserr_t mo5_k5_identify ( cassette_image *cass,
- struct CassetteOptions *opts )
+ struct CassetteOptions *opts )
{
opts -> bits_per_sample = 8;
opts -> channels = 1;
@@ -471,64 +471,64 @@ static casserr_t mo5_k5_load( cassette_image *cass )
PRINT (( "mo5_k5_load: open cassette, length: %li bytes\n", (long) size ));
/* store a half-bit */
-#define K5_PUT_HBIT \
- do \
- { \
+#define K5_PUT_HBIT \
+ do \
+ { \
cassette_put_sample ( cass, 0, hbitsize * MO5_HBIT_LENGTH, MO5_HBIT_LENGTH, (hbit ? 1 : -1) << 30 ); \
- hbitsize++; \
+ hbitsize++; \
} while ( 0 )
/* store one bit */
-#define K5_PUT_BIT( BIT ) \
- do \
- { \
- if ( BIT ) \
- { \
- K5_PUT_HBIT; \
- hbit = !hbit; \
- K5_PUT_HBIT; \
- } \
- else \
- { \
- K5_PUT_HBIT; \
- K5_PUT_HBIT; \
- } \
- hbit = !hbit; \
+#define K5_PUT_BIT( BIT ) \
+ do \
+ { \
+ if ( BIT ) \
+ { \
+ K5_PUT_HBIT; \
+ hbit = !hbit; \
+ K5_PUT_HBIT; \
+ } \
+ else \
+ { \
+ K5_PUT_HBIT; \
+ K5_PUT_HBIT; \
+ } \
+ hbit = !hbit; \
} while (0)
/* store one byte, no start / stop bit, converse order from TO7 */
#define K5_PUT_BYTE( BYTE ) \
- do \
- { \
- UINT8 b = BYTE; \
- int x; \
- for ( x = 0; x < 8; x++ ) \
- K5_PUT_BIT( (b >> (7 - x)) & 1 ); \
+ do \
+ { \
+ UINT8 b = BYTE; \
+ int x; \
+ for ( x = 0; x < 8; x++ ) \
+ K5_PUT_BIT( (b >> (7 - x)) & 1 ); \
} while (0)
/* store filler */
#define K5_FILL_0( SIZE ) \
- do \
- { \
- if ( (SIZE) > 0 ) \
- { \
- int j; \
+ do \
+ { \
+ if ( (SIZE) > 0 ) \
+ { \
+ int j; \
LOG (( "mo5_k5_load: 0-filler size=%i hbitstart=%i\n", (SIZE), hbitsize )); \
- for ( j = 0; j < (SIZE); j++ ) \
- K5_PUT_BIT( 0 ); \
- } \
+ for ( j = 0; j < (SIZE); j++ ) \
+ K5_PUT_BIT( 0 ); \
+ } \
} while (0)
-#define K5_FILL_01( SIZE ) \
- do \
- { \
- if ( (SIZE) > 0 ) \
- { \
- int j; \
+#define K5_FILL_01( SIZE ) \
+ do \
+ { \
+ if ( (SIZE) > 0 ) \
+ { \
+ int j; \
LOG (( "mo5_k5_load: 0x01 filler size=%i bitstart=%i\n", (SIZE), hbitsize )); \
- for ( j = 0; j < (SIZE); j++ ) \
- K5_PUT_BYTE( 0x01 ); \
- } \
+ for ( j = 0; j < (SIZE); j++ ) \
+ K5_PUT_BYTE( 0x01 ); \
+ } \
} while (0)
/* check format */
@@ -645,10 +645,10 @@ static casserr_t mo5_k5_load( cassette_image *cass )
name[i] = '?';
}
PRINT (( "mo5_k5_load: file \"%s\" type=%s,%s at %imn %is\n",
- name,
- (t==0) ? "bas" : (t==1) ? "dat" : (t==2) ? "bin" : "???",
- (u == 0) ? "a" : (u == 0xff) ? "b" : "?",
- p / 60, p % 60 ));
+ name,
+ (t==0) ? "bas" : (t==1) ? "dat" : (t==2) ? "bin" : "???",
+ (u == 0) ? "a" : (u == 0xff) ? "b" : "?",
+ p / 60, p % 60 ));
}
/* 0-fillers */
@@ -737,7 +737,7 @@ static const struct CassetteFormat mo5_k5 =
static casserr_t mo5_wav_identify ( cassette_image *cass,
- struct CassetteOptions *opts )
+ struct CassetteOptions *opts )
{
casserr_t e = wavfile_format.identify( cass, opts );
return e;
diff --git a/src/lib/formats/thom_dsk.c b/src/lib/formats/thom_dsk.c
index 837471e06fd..df910bcbc94 100644
--- a/src/lib/formats/thom_dsk.c
+++ b/src/lib/formats/thom_dsk.c
@@ -30,19 +30,19 @@ struct sap_dsk_tag
{
int tracks;
int sector_size;
- int sector_pos[80][16]; /* remember sector position in file */
+ int sector_pos[80][16]; /* remember sector position in file */
};
static UINT16 thom_sap_crc( UINT8* data, int size )
{
- int i;
- UINT16 crc = 0xffff, crc2;
- for ( i = 0; i < size; i++ )
- {
- crc2 = ( crc >> 4 ) ^ sap_crc[ ( crc ^ data[i] ) & 15 ];
- crc = ( crc2 >> 4 ) ^ sap_crc[ ( crc2 ^ (data[i] >> 4) ) & 15 ];
- }
- return crc;
+ int i;
+ UINT16 crc = 0xffff, crc2;
+ for ( i = 0; i < size; i++ )
+ {
+ crc2 = ( crc >> 4 ) ^ sap_crc[ ( crc ^ data[i] ) & 15 ];
+ crc = ( crc2 >> 4 ) ^ sap_crc[ ( crc2 ^ (data[i] >> 4) ) & 15 ];
+ }
+ return crc;
}
static struct sap_dsk_tag *get_tag(floppy_image_legacy *floppy)
@@ -79,7 +79,7 @@ static int sap_get_tracks_per_disk(floppy_image_legacy *floppy)
static floperr_t get_offset(floppy_image_legacy *floppy, int head, int track, int sector, int sector_is_index, UINT64 *offset)
{
UINT64 offs;
- struct sap_dsk_tag *tag = get_tag(floppy);
+ struct sap_dsk_tag *tag = get_tag(floppy);
/* translate the sector to a raw sector */
if (!sector_is_index)
{
@@ -90,9 +90,9 @@ static floperr_t get_offset(floppy_image_legacy *floppy, int head, int track, in
|| (sector < 0) || (sector >= 16))
return FLOPPY_ERROR_SEEKERROR;
- offs = tag->sector_pos[track][sector];
- if (offs <= 0 )
- return FLOPPY_ERROR_SEEKERROR;
+ offs = tag->sector_pos[track][sector];
+ if (offs <= 0 )
+ return FLOPPY_ERROR_SEEKERROR;
if (offset)
*offset = offs;
@@ -126,20 +126,20 @@ static floperr_t internal_sap_write_sector(floppy_image_legacy *floppy, int head
UINT64 offset;
floperr_t err;
UINT8 buf[256+6];
- UINT16 crc;
+ UINT16 crc;
int i;
err = get_offset(floppy, head, track, sector, sector_is_index, &offset);
if (err)
return err;
- /* buf = 4-byte header + sector + 2-byte CRC */
+ /* buf = 4-byte header + sector + 2-byte CRC */
floppy_image_read(floppy, buf, offset, 4);
for (i=0;i<buflen;i++) {
buf[i+4] = ((UINT8*)buffer)[i];
}
- crc = thom_sap_crc( buf, buflen+4 );
- buf[buflen+4] = crc >> 8;
- buf[buflen+5] = crc & 0xff;
+ crc = thom_sap_crc( buf, buflen+4 );
+ buf[buflen+4] = crc >> 8;
+ buf[buflen+5] = crc & 0xff;
for (i=0;i<buflen;i++) {
buf[i+4] ^= sap_magic_num;
}
@@ -209,41 +209,41 @@ static floperr_t sap_get_indexed_sector_info(floppy_image_legacy *floppy, int he
static floperr_t sap_post_format(floppy_image_legacy *floppy, option_resolution *params)
{
- int track,sector;
- int pos;
- UINT8 buf[256], header[4];
+ int track,sector;
+ int pos;
+ UINT8 buf[256], header[4];
struct sap_dsk_tag *tag;
- tag = (struct sap_dsk_tag *) floppy_create_tag(floppy, sizeof(struct sap_dsk_tag));
+ tag = (struct sap_dsk_tag *) floppy_create_tag(floppy, sizeof(struct sap_dsk_tag));
- /* default options */
- if ( !tag->tracks )
- {
- tag->tracks = 80;
- tag->sector_size = 256;
- }
+ /* default options */
+ if ( !tag->tracks )
+ {
+ tag->tracks = 80;
+ tag->sector_size = 256;
+ }
- /* create SAP file header */
- floppy_image_write( floppy, sap_header, 0, 66 );
+ /* create SAP file header */
+ floppy_image_write( floppy, sap_header, 0, 66 );
- for ( track = 0; track < 80; track++ )
- for ( sector = 0; sector < 16; sector++ )
- tag->sector_pos[track][sector] = 0;
+ for ( track = 0; track < 80; track++ )
+ for ( sector = 0; sector < 16; sector++ )
+ tag->sector_pos[track][sector] = 0;
- /* create all sectors with valid header and CRC */
+ /* create all sectors with valid header and CRC */
memset(buf, 0xe5, 256);
- pos = 0x42;
- header[0] = (tag->sector_size==128) ? 1 : 0;
- header[1] = 0;
- for ( track = 0, pos = 0x42; track < tag->tracks; track++ )
- for ( sector = 0; sector < 16; sector++, pos += tag->sector_size + 6 ) {
- tag->sector_pos[track][sector] = pos;
- header[2] = track;
- header[3] = sector + 1;
- floppy_image_write(floppy, header, pos, 4);
- sap_write_indexed_sector( floppy, 0, track, sector, buf, tag->sector_size, 0 );
- }
-
- return FLOPPY_ERROR_SUCCESS;
+ pos = 0x42;
+ header[0] = (tag->sector_size==128) ? 1 : 0;
+ header[1] = 0;
+ for ( track = 0, pos = 0x42; track < tag->tracks; track++ )
+ for ( sector = 0; sector < 16; sector++, pos += tag->sector_size + 6 ) {
+ tag->sector_pos[track][sector] = pos;
+ header[2] = track;
+ header[3] = sector + 1;
+ floppy_image_write(floppy, header, pos, 4);
+ sap_write_indexed_sector( floppy, 0, track, sector, buf, tag->sector_size, 0 );
+ }
+
+ return FLOPPY_ERROR_SUCCESS;
}
@@ -257,25 +257,25 @@ static FLOPPY_CONSTRUCT(sap_dsk_construct)
if (!tag)
return FLOPPY_ERROR_OUTOFMEMORY;
- /* guess format */
+ /* guess format */
floppy_image_read(floppy, &fmt, 0x42, 1);
if ( fmt==1 ) tag->sector_size = 128; else tag->sector_size = 256;
- /* start with an empty offset table */
- tag->tracks = 0;
- for ( i = 0; i < 80; i++ )
- for ( j = 0; j < 16; j++ )
- tag->sector_pos[i][j] = 0;
+ /* start with an empty offset table */
+ tag->tracks = 0;
+ for ( i = 0; i < 80; i++ )
+ for ( j = 0; j < 16; j++ )
+ tag->sector_pos[i][j] = 0;
- /* count tracks & fill sector offset table */
+ /* count tracks & fill sector offset table */
for ( i = 0x42; i+4 < floppy_image_size(floppy); i += tag->sector_size + 6 ) // CRC 2 bytes + 4 bytes sector header
{
- UINT8 sector, track;
+ UINT8 sector, track;
floppy_image_read(floppy, &track, i+2, 1);
floppy_image_read(floppy, &sector, i+3, 1);
- if ( track >= 80 || sector < 1 || sector > 16 ) continue;
- if ( track > tag->tracks ) tag->tracks = track+1;
- tag->sector_pos[track][sector-1] = i;
+ if ( track >= 80 || sector < 1 || sector > 16 ) continue;
+ if ( track > tag->tracks ) tag->tracks = track+1;
+ tag->sector_pos[track][sector-1] = i;
}
callbacks = floppy_callbacks(floppy);
callbacks->read_sector = sap_read_sector;
@@ -378,9 +378,9 @@ LEGACY_FLOPPY_OPTIONS_START(thomson)
SECTOR_LENGTH([128])
FIRST_SECTOR_ID([1]))
- LEGACY_FLOPPY_OPTION(sap,"sap", "Thomson SAP floppy disk image", sap_dsk_identify, sap_dsk_construct, NULL, NULL)
+ LEGACY_FLOPPY_OPTION(sap,"sap", "Thomson SAP floppy disk image", sap_dsk_identify, sap_dsk_construct, NULL, NULL)
- LEGACY_FLOPPY_OPTION(qdd,"qd", "Thomson QDD floppy disk image (2\"8 SD)", qdd_dsk_identify, qdd_dsk_construct, NULL,
+ LEGACY_FLOPPY_OPTION(qdd,"qd", "Thomson QDD floppy disk image (2\"8 SD)", qdd_dsk_identify, qdd_dsk_construct, NULL,
HEADS([1])
TRACKS([1])
SECTORS([400])
@@ -388,4 +388,3 @@ LEGACY_FLOPPY_OPTIONS_START(thomson)
FIRST_SECTOR_ID([0]))
LEGACY_FLOPPY_OPTIONS_END
-
diff --git a/src/lib/formats/tiki100_dsk.c b/src/lib/formats/tiki100_dsk.c
index 714cf1328da..e690ea9d5d0 100644
--- a/src/lib/formats/tiki100_dsk.c
+++ b/src/lib/formats/tiki100_dsk.c
@@ -70,15 +70,15 @@ const tiki100_format::format tiki100_format::formats[] = {
},
{ // 200K 5 1/4 inch double density single sided
floppy_image::FF_525, floppy_image::SSDD, floppy_image::MFM,
- 2000, 10, 40, 1, 512, {}, -1, { 1,6,2,7,3,8,4,9,5,10 }, 80, 22, 20
+ 2000, 10, 40, 1, 512, {}, -1, { 1,6,2,7,3,8,4,9,5,10 }, 80, 22, 20
},
{ // 400K 5 1/4 inch double density
floppy_image::FF_525, floppy_image::DSDD, floppy_image::MFM,
- 2000, 10, 40, 2, 512, {}, -1, { 1,6,2,7,3,8,4,9,5,10 }, 80, 22, 20
+ 2000, 10, 40, 2, 512, {}, -1, { 1,6,2,7,3,8,4,9,5,10 }, 80, 22, 20
},
{ // 800K 5 1/4 inch quad density
floppy_image::FF_525, floppy_image::DSQD, floppy_image::MFM,
- 2000, 10, 80, 2, 512, {}, -1, { 1,6,2,7,3,8,4,9,5,10 }, 80, 22, 20
+ 2000, 10, 80, 2, 512, {}, -1, { 1,6,2,7,3,8,4,9,5,10 }, 80, 22, 20
},
{}
};
diff --git a/src/lib/formats/trd_dsk.c b/src/lib/formats/trd_dsk.c
index 0d9c757d715..997636d4f4f 100644
--- a/src/lib/formats/trd_dsk.c
+++ b/src/lib/formats/trd_dsk.c
@@ -45,6 +45,5 @@ static FLOPPY_CONSTRUCT(trd_dsk_construct)
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( trd )
- LEGACY_FLOPPY_OPTION( trd_dsk, "trd", "TRD floppy disk image", trd_dsk_identify, trd_dsk_construct, NULL, NULL)
+ LEGACY_FLOPPY_OPTION( trd_dsk, "trd", "TRD floppy disk image", trd_dsk_identify, trd_dsk_construct, NULL, NULL)
LEGACY_FLOPPY_OPTIONS_END
-
diff --git a/src/lib/formats/trs_cas.c b/src/lib/formats/trs_cas.c
index dac68647699..6956e488d4c 100644
--- a/src/lib/formats/trs_cas.c
+++ b/src/lib/formats/trs_cas.c
@@ -6,7 +6,7 @@ Support for TRS80 .cas cassette images
#include "formats/trs_cas.h"
-#define SILENCE 0
+#define SILENCE 0
#define SMPLO -32768
#define SMPHI 32767
@@ -46,15 +46,15 @@ INLINE int trs80l2_cas_cycle(INT16 *buffer, int sample_pos, int silence, int hig
static int trs80l2_handle_cas(INT16 *buffer, const UINT8 *casdata)
{
- int data_pos, sample_count;
+ int data_pos, sample_count;
data_pos = 0;
sample_count = 0;
while( data_pos < cas_size )
{
- UINT8 data = casdata[data_pos];
- int i;
+ UINT8 data = casdata[data_pos];
+ int i;
for ( i = 0; i < 8; i++ )
{
@@ -97,13 +97,13 @@ static int trs80l2_cas_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller trs80l2_cas_legacy_fill_wave =
{
- trs80l2_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- trs80l2_cas_to_wav_size, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ trs80l2_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ trs80l2_cas_to_wav_size, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
@@ -131,4 +131,3 @@ static const struct CassetteFormat trs80l2_cas_format =
CASSETTE_FORMATLIST_START(trs80l2_cassette_formats)
CASSETTE_FORMAT(trs80l2_cas_format)
CASSETTE_FORMATLIST_END
-
diff --git a/src/lib/formats/trs_cas.h b/src/lib/formats/trs_cas.h
index d8ca4bb64a4..aa4305efdc3 100644
--- a/src/lib/formats/trs_cas.h
+++ b/src/lib/formats/trs_cas.h
@@ -14,4 +14,3 @@
CASSETTE_FORMATLIST_EXTERN(trs80l2_cassette_formats);
#endif /* __TRS_CAS_H */
-
diff --git a/src/lib/formats/trs_dsk.c b/src/lib/formats/trs_dsk.c
index 1151a238070..36c5a271622 100644
--- a/src/lib/formats/trs_dsk.c
+++ b/src/lib/formats/trs_dsk.c
@@ -11,10 +11,10 @@
* Very straight basic disk; 1 head, 10 sectors, 256 sector length
* ----------------------------------------------------------------------- */
-#define TRS80_JV1_HEADS 1
-#define TRS80_JV1_SECTORS 10
-#define TRS80_JV1_SECTORLENGTH 256
-#define TRS80_JV1_FIRSTSECTORID 0
+#define TRS80_JV1_HEADS 1
+#define TRS80_JV1_SECTORS 10
+#define TRS80_JV1_SECTORLENGTH 256
+#define TRS80_JV1_FIRSTSECTORID 0
static FLOPPY_IDENTIFY( trs80_jv1_identify )
{
@@ -40,11 +40,11 @@ static FLOPPY_CONSTRUCT( trs80_jv1_construct )
struct basicdsk_geometry geometry;
memset(&geometry, 0, sizeof(geometry));
- geometry.heads = TRS80_JV1_HEADS;
- geometry.sectors = TRS80_JV1_SECTORS;
- geometry.first_sector_id = TRS80_JV1_FIRSTSECTORID;
- geometry.sector_length = TRS80_JV1_SECTORLENGTH;
- geometry.get_ddam = trs80_jv1_get_ddam;
+ geometry.heads = TRS80_JV1_HEADS;
+ geometry.sectors = TRS80_JV1_SECTORS;
+ geometry.first_sector_id = TRS80_JV1_FIRSTSECTORID;
+ geometry.sector_length = TRS80_JV1_SECTORLENGTH;
+ geometry.get_ddam = trs80_jv1_get_ddam;
if (params)
{
@@ -65,9 +65,9 @@ static FLOPPY_CONSTRUCT( trs80_jv1_construct )
/* ----------------------------------------------------------------------- */
LEGACY_FLOPPY_OPTIONS_START( trs80 )
- LEGACY_FLOPPY_OPTION( trs80_jv1, "dsk", "TRS-80 JV1 disk image", trs80_jv1_identify, trs80_jv1_construct, NULL,
+ LEGACY_FLOPPY_OPTION( trs80_jv1, "dsk", "TRS-80 JV1 disk image", trs80_jv1_identify, trs80_jv1_construct, NULL,
TRACKS([35]-255))
- LEGACY_FLOPPY_OPTION( trs80_dmk, "dsk,dmk", "TRS-80 DMK disk image", coco_dmk_identify, coco_dmk_construct, NULL,
+ LEGACY_FLOPPY_OPTION( trs80_dmk, "dsk,dmk", "TRS-80 DMK disk image", coco_dmk_identify, coco_dmk_construct, NULL,
HEADS([1]-2)
TRACKS([35]-255)
SECTORS(1-[10]-18)
diff --git a/src/lib/formats/tvc_cas.c b/src/lib/formats/tvc_cas.c
index 5b7e6f8a422..1df1bc431b1 100644
--- a/src/lib/formats/tvc_cas.c
+++ b/src/lib/formats/tvc_cas.c
@@ -8,14 +8,14 @@
#include "tvc_cas.h"
-#define TVC64_BIT0_FREQ 1812
-#define TVC64_BIT1_FREQ 2577
-#define TVC64_PRE_FREQ 2128
-#define TVC64_SYNC_FREQ 1359
+#define TVC64_BIT0_FREQ 1812
+#define TVC64_BIT1_FREQ 2577
+#define TVC64_PRE_FREQ 2128
+#define TVC64_SYNC_FREQ 1359
-#define WAVE_AMPLITUDE 0x3fffffff
-#define TVC64_HEADER_BYTES 0x90
-#define TVC64_HEADER_BYTES 0x90
+#define WAVE_AMPLITUDE 0x3fffffff
+#define TVC64_HEADER_BYTES 0x90
+#define TVC64_HEADER_BYTES 0x90
static void tvc64_emit_level(cassette_image *cass, double &time, int freq, int level)
{
@@ -91,26 +91,26 @@ static casserr_t tvc64_cassette_load(cassette_image *cassette)
// tape header
tmp_buff[buff_idx++] = 0x00;
tmp_buff[buff_idx++] = 0x6a;
- tmp_buff[buff_idx++] = 0xff; // head sector
- tmp_buff[buff_idx++] = 0x11; // not puffered
- tmp_buff[buff_idx++] = 0x00; // not write protected
- tmp_buff[buff_idx++] = 0x01; // 1 sector
- tmp_buff[buff_idx++] = 0x00; // sector number
- tmp_buff[buff_idx++] = 0x12; // head size
- tmp_buff[buff_idx++] = 0x01; // name size
- tmp_buff[buff_idx++] = ' '; // name
+ tmp_buff[buff_idx++] = 0xff; // head sector
+ tmp_buff[buff_idx++] = 0x11; // not puffered
+ tmp_buff[buff_idx++] = 0x00; // not write protected
+ tmp_buff[buff_idx++] = 0x01; // 1 sector
+ tmp_buff[buff_idx++] = 0x00; // sector number
+ tmp_buff[buff_idx++] = 0x12; // head size
+ tmp_buff[buff_idx++] = 0x01; // name size
+ tmp_buff[buff_idx++] = ' '; // name
tmp_buff[buff_idx++] = 0x00;
- tmp_buff[buff_idx++] = header[0x81]; // type
- tmp_buff[buff_idx++] = header[0x82]; // size LSB
- tmp_buff[buff_idx++] = header[0x83]; // size MSB
+ tmp_buff[buff_idx++] = header[0x81]; // type
+ tmp_buff[buff_idx++] = header[0x82]; // size LSB
+ tmp_buff[buff_idx++] = header[0x83]; // size MSB
tmp_buff[buff_idx++] = header[0x84]; // autostart
- // sector fill
+ // sector fill
for (int i=0; i<10 ; i++)
tmp_buff[buff_idx++] = 0x00;
- tmp_buff[buff_idx++] = 0x00; // file version
- tmp_buff[buff_idx++] = 0x00; // no last sector
+ tmp_buff[buff_idx++] = 0x00; // file version
+ tmp_buff[buff_idx++] = 0x00; // no last sector
// updates the header CRC
UINT16 crc = tvc64_calc_crc(tmp_buff, buff_idx);
@@ -148,16 +148,16 @@ static casserr_t tvc64_cassette_load(cassette_image *cassette)
buff_idx = 0;
tmp_buff[buff_idx++] = 0x00;
tmp_buff[buff_idx++] = 0x6a;
- tmp_buff[buff_idx++] = 0x00; // data sector
- tmp_buff[buff_idx++] = 0x11; // not puffered
- tmp_buff[buff_idx++] = 0x00; // not write protected
- tmp_buff[buff_idx++] = (UINT8)((cas_size / 256) + ((cas_size % 256) > 0 ? 1 : 0)); // number of sectors
+ tmp_buff[buff_idx++] = 0x00; // data sector
+ tmp_buff[buff_idx++] = 0x11; // not puffered
+ tmp_buff[buff_idx++] = 0x00; // not write protected
+ tmp_buff[buff_idx++] = (UINT8)((cas_size / 256) + ((cas_size % 256) > 0 ? 1 : 0)); // number of sectors
UINT8 sect_num = 1;
int sector_num = cas_size / 256;
for (int i=0; i<=sector_num; i++)
{
- tmp_buff[buff_idx++] = sect_num++; // sector number
+ tmp_buff[buff_idx++] = sect_num++; // sector number
// sector size
if (i == sector_num)
@@ -171,9 +171,9 @@ static casserr_t tvc64_cassette_load(cassette_image *cassette)
cassette_image_read(cassette, &tmp_buff[buff_idx++], TVC64_HEADER_BYTES + i*256 + z, 1);
if (i == sector_num || ((i+1) == sector_num && (cas_size % 256 ) == 0))
- tmp_buff[buff_idx++] = 0xff; // last sector
+ tmp_buff[buff_idx++] = 0xff; // last sector
else
- tmp_buff[buff_idx++] = 0x00; // no last sector
+ tmp_buff[buff_idx++] = 0x00; // no last sector
// sector crc
crc = tvc64_calc_crc(tmp_buff, buff_idx);
diff --git a/src/lib/formats/tzx_cas.c b/src/lib/formats/tzx_cas.c
index 1f3278023dd..c7950138a09 100644
--- a/src/lib/formats/tzx_cas.c
+++ b/src/lib/formats/tzx_cas.c
@@ -41,15 +41,15 @@ We are currently using the numbers from the TZX specification...
#include "tzx_cas.h"
-#define TZX_WAV_FREQUENCY 44100
-#define WAVE_LOW -0x5a9e
-#define WAVE_HIGH 0x5a9e
-#define WAVE_NULL 0
+#define TZX_WAV_FREQUENCY 44100
+#define WAVE_LOW -0x5a9e
+#define WAVE_HIGH 0x5a9e
+#define WAVE_NULL 0
-#define SUPPORTED_VERSION_MAJOR 0x01
+#define SUPPORTED_VERSION_MAJOR 0x01
-#define INITIAL_MAX_BLOCK_COUNT 256
-#define BLOCK_COUNT_INCREMENTS 256
+#define INITIAL_MAX_BLOCK_COUNT 256
+#define BLOCK_COUNT_INCREMENTS 256
static const UINT8 TZX_HEADER[8] = { 'Z','X','T','a','p','e','!',0x1a };
@@ -59,9 +59,9 @@ static const UINT8 TZX_HEADER[8] = { 'Z','X','T','a','p','e','!',0x1a };
Initialized by tzx_cas_get_wave_size, used (and cleaned up) by tzx_cas_fill_wave
*/
-static INT16 wave_data = 0;
-static int block_count = 0;
-static UINT8** blocks = NULL;
+static INT16 wave_data = 0;
+static int block_count = 0;
+static UINT8** blocks = NULL;
static float t_scale = 1; /* for scaling T-states to the 4MHz CPC */
static void toggle_wave_data(void)
@@ -93,9 +93,9 @@ static void tzx_cas_get_blocks( const UINT8 *casdata, int caslen )
if (block_count == max_block_count)
{
void *old_blocks = blocks;
- int old_max_block_count = max_block_count;
+ int old_max_block_count = max_block_count;
max_block_count = max_block_count + BLOCK_COUNT_INCREMENTS;
- blocks = (UINT8**)malloc(max_block_count * sizeof(UINT8*)); // SHOULD NOT BE USING auto_alloc_array()
+ blocks = (UINT8**)malloc(max_block_count * sizeof(UINT8*)); // SHOULD NOT BE USING auto_alloc_array()
memset(blocks, 0, max_block_count);
memcpy(blocks, old_blocks, old_max_block_count * sizeof(UINT8*));
free(old_blocks);
@@ -264,11 +264,11 @@ static int tzx_cas_handle_block( INT16 **buffer, const UINT8 *bytes, int pause,
for (data_index = 0; data_index < data_size; data_index++)
{
UINT8 byte = bytes[data_index];
- int bits_to_go = (data_index == (data_size - 1)) ? bits_in_last_byte : 8;
+ int bits_to_go = (data_index == (data_size - 1)) ? bits_in_last_byte : 8;
for ( ; bits_to_go > 0; byte <<= 1, bits_to_go--)
{
- int bit_samples = (byte & 0x80) ? bit1_samples : bit0_samples;
+ int bit_samples = (byte & 0x80) ? bit1_samples : bit0_samples;
tzx_output_wave(buffer, bit_samples);
size += bit_samples;
toggle_wave_data();
@@ -324,8 +324,8 @@ static const char *const hw_info[] =
If buffer is not NULL the sample data will also be written. */
static int tzx_cas_do_work( INT16 **buffer )
{
- int current_block = 0;
- int size = 0;
+ int current_block = 0;
+ int size = 0;
wave_data = WAVE_LOW;
@@ -333,10 +333,10 @@ static int tzx_cas_do_work( INT16 **buffer )
while (current_block < block_count)
{
- int pause_time;
- int data_size, text_size, total_size, i;
- int pilot, pilot_length, sync1, sync2;
- int bit0, bit1, bits_in_last_byte;
+ int pause_time;
+ int data_size, text_size, total_size, i;
+ int pilot, pilot_length, sync1, sync2;
+ int bit0, bit1, bits_in_last_byte;
UINT8 *cur_block = blocks[current_block];
UINT8 block_type = cur_block[0];
@@ -346,14 +346,14 @@ static int tzx_cas_do_work( INT16 **buffer )
switch (block_type)
{
- case 0x10: /* Standard Speed Data Block (.TAP block) */
+ case 0x10: /* Standard Speed Data Block (.TAP block) */
pause_time = cur_block[1] + (cur_block[2] << 8);
data_size = cur_block[3] + (cur_block[4] << 8);
pilot_length = (cur_block[5] == 0x00) ? 8064 : 3220;
size += tzx_cas_handle_block(buffer, &cur_block[5], pause_time, data_size, 2168, pilot_length, 667, 735, 855, 1710, 8);
current_block++;
break;
- case 0x11: /* Turbo Loading Data Block */
+ case 0x11: /* Turbo Loading Data Block */
pilot = cur_block[1] + (cur_block[2] << 8);
sync1 = cur_block[3] + (cur_block[4] << 8);
sync2 = cur_block[5] + (cur_block[6] << 8);
@@ -366,13 +366,13 @@ static int tzx_cas_do_work( INT16 **buffer )
size += tzx_cas_handle_block(buffer, &cur_block[19], pause_time, data_size, pilot, pilot_length, sync1, sync2, bit0, bit1, bits_in_last_byte);
current_block++;
break;
- case 0x12: /* Pure Tone */
+ case 0x12: /* Pure Tone */
pilot = cur_block[1] + (cur_block[2] << 8);
pilot_length = cur_block[3] + (cur_block[4] << 8);
size += tzx_cas_handle_block(buffer, cur_block, 0, 0, pilot, pilot_length, 0, 0, 0, 0, 0);
current_block++;
break;
- case 0x13: /* Sequence of Pulses of Different Lengths */
+ case 0x13: /* Sequence of Pulses of Different Lengths */
for (data_size = 0; data_size < cur_block[1]; data_size++)
{
pilot = cur_block[2 + 2 * data_size] + (cur_block[3 + 2 * data_size] << 8);
@@ -380,7 +380,7 @@ static int tzx_cas_do_work( INT16 **buffer )
}
current_block++;
break;
- case 0x14: /* Pure Data Block */
+ case 0x14: /* Pure Data Block */
bit0 = cur_block[1] + (cur_block[2] << 8);
bit1 = cur_block[3] + (cur_block[4] << 8);
bits_in_last_byte = cur_block[5];
@@ -389,33 +389,33 @@ static int tzx_cas_do_work( INT16 **buffer )
size += tzx_cas_handle_block(buffer, &cur_block[11], pause_time, data_size, 0, 0, 0, 0, bit0, bit1, bits_in_last_byte);
current_block++;
break;
- case 0x20: /* Pause (Silence) or 'Stop the Tape' Command */
+ case 0x20: /* Pause (Silence) or 'Stop the Tape' Command */
pause_time = cur_block[1] + (cur_block[2] << 8);
if (pause_time == 0)
{
/* pause = 0 is used to let an emulator automagically stop the tape
- in MESS we do not do that, so we insert a 5 second pause. */
+ in MESS we do not do that, so we insert a 5 second pause. */
pause_time = 5000;
}
size += tzx_cas_handle_block(buffer, cur_block, pause_time, 0, 0, 0, 0, 0, 0, 0, 0);
current_block++;
break;
- case 0x16: /* C64 ROM Type Data Block */ // Deprecated in TZX 1.20
- case 0x17: /* C64 Turbo Tape Data Block */ // Deprecated in TZX 1.20
- case 0x34: /* Emulation Info */ // Deprecated in TZX 1.20
- case 0x40: /* Snapshot Block */ // Deprecated in TZX 1.20
+ case 0x16: /* C64 ROM Type Data Block */ // Deprecated in TZX 1.20
+ case 0x17: /* C64 Turbo Tape Data Block */ // Deprecated in TZX 1.20
+ case 0x34: /* Emulation Info */ // Deprecated in TZX 1.20
+ case 0x40: /* Snapshot Block */ // Deprecated in TZX 1.20
LOG_FORMATS("Deprecated block type (%02x) encountered.\n", block_type);
LOG_FORMATS("Please look for an updated .tzx file.\n");
current_block++;
break;
- case 0x30: /* Text Description */
+ case 0x30: /* Text Description */
ascii_block_common_log("Text Description Block", block_type);
for (data_size = 0; data_size < cur_block[1]; data_size++)
LOG_FORMATS("%c", cur_block[2 + data_size]);
LOG_FORMATS("\n");
current_block++;
break;
- case 0x31: /* Message Block */
+ case 0x31: /* Message Block */
ascii_block_common_log("Message Block", block_type);
LOG_FORMATS("Expected duration of the message display: %02x\n", cur_block[1]);
LOG_FORMATS("Message: \n");
@@ -428,11 +428,11 @@ static int tzx_cas_do_work( INT16 **buffer )
LOG_FORMATS("\n");
current_block++;
break;
- case 0x32: /* Archive Info */
+ case 0x32: /* Archive Info */
ascii_block_common_log("Archive Info Block", block_type);
total_size = cur_block[1] + (cur_block[2] << 8);
text_size = 0;
- for (data_size = 0; data_size < cur_block[3]; data_size++) // data_size = number of text blocks, in this case
+ for (data_size = 0; data_size < cur_block[3]; data_size++) // data_size = number of text blocks, in this case
{
if (cur_block[4 + text_size] < 0x09) {
LOG_FORMATS("%s: \n", archive_ident[cur_block[4 + text_size]]);
@@ -452,16 +452,16 @@ static int tzx_cas_do_work( INT16 **buffer )
LOG_FORMATS("Malformed Archive Info Block (Text length different from the declared one).\n Please verify your tape image.\n");
current_block++;
break;
- case 0x33: /* Hardware Type */
+ case 0x33: /* Hardware Type */
ascii_block_common_log("Hardware Type Block", block_type);
- for (data_size = 0; data_size < cur_block[1]; data_size++) // data_size = number of hardware blocks, in this case
+ for (data_size = 0; data_size < cur_block[1]; data_size++) // data_size = number of hardware blocks, in this case
{
LOG_FORMATS("Hardware Type %02x - Hardware ID %02x - ", cur_block[2 + data_size * 3], cur_block[2 + data_size * 3 + 1]);
LOG_FORMATS("%s \n ", hw_info[cur_block[2 + data_size * 3 + 2]]);
}
current_block++;
break;
- case 0x35: /* Custom Info Block */
+ case 0x35: /* Custom Info Block */
ascii_block_common_log("Custom Info Block", block_type);
for (data_size = 0; data_size < 10; data_size++)
{
@@ -474,19 +474,19 @@ static int tzx_cas_do_work( INT16 **buffer )
LOG_FORMATS("\n");
current_block++;
break;
- case 0x5A: /* "Glue" Block */
+ case 0x5A: /* "Glue" Block */
LOG_FORMATS("Glue Block (type %02x) encountered.\n", block_type);
LOG_FORMATS("Please use a .tzx handling utility to split the merged tape files.\n");
current_block++;
break;
- case 0x24: /* Loop Start */
+ case 0x24: /* Loop Start */
loopcount = cur_block[1] + (cur_block[2] << 8);
current_block++;
loopoffset = current_block;
LOG_FORMATS("loop start %d %d\n", loopcount, current_block);
break;
- case 0x25: /* Loop End */
+ case 0x25: /* Loop End */
if (loopcount>0)
{
current_block = loopoffset;
@@ -499,32 +499,32 @@ static int tzx_cas_do_work( INT16 **buffer )
}
break;
- case 0x21: /* Group Start */
- case 0x22: /* Group End */
- case 0x23: /* Jump To Block */
- case 0x26: /* Call Sequence */
- case 0x27: /* Return From Sequence */
- case 0x28: /* Select Block */
- case 0x2A: /* Stop Tape if in 48K Mode */
- case 0x2B: /* Set signal level */
+ case 0x21: /* Group Start */
+ case 0x22: /* Group End */
+ case 0x23: /* Jump To Block */
+ case 0x26: /* Call Sequence */
+ case 0x27: /* Return From Sequence */
+ case 0x28: /* Select Block */
+ case 0x2A: /* Stop Tape if in 48K Mode */
+ case 0x2B: /* Set signal level */
default:
LOG_FORMATS("Unsupported block type (%02x) encountered.\n", block_type);
current_block++;
break;
- case 0x15: /* Direct Recording */
+ case 0x15: /* Direct Recording */
// having this missing is fatal
printf("Unsupported block type (0x15 - Direct Recording) encountered.\n");
current_block++;
break;
- case 0x18: /* CSW Recording */
+ case 0x18: /* CSW Recording */
// having this missing is fatal
printf("Unsupported block type (0x15 - CSW Recording) encountered.\n");
current_block++;
break;
- case 0x19: /* Generalized Data Block */
+ case 0x19: /* Generalized Data Block */
// having this missing is fatal
printf("Unsupported block type (0x19 - Generalized Data Block) encountered.\n");
current_block++;
@@ -581,7 +581,7 @@ cleanup:
static int tzx_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes )
{
INT16 *p = buffer;
- int size = 0;
+ int size = 0;
t_scale = 1.0;
size = tzx_cas_do_work(&p);
return size;
@@ -590,7 +590,7 @@ static int tzx_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes )
static int cdt_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes )
{
INT16 *p = buffer;
- int size = 0;
+ int size = 0;
t_scale = (40 / 35); /* scale to 4MHz */
size = tzx_cas_do_work(&p);
return size;
@@ -604,7 +604,7 @@ static int tap_cas_to_wav_size( const UINT8 *casdata, int caslen )
while (p < casdata + caslen)
{
int data_size = p[0] + (p[1] << 8);
- int pilot_length = (p[2] == 0x00) ? 8064 : 3220; /* TZX specification */
+ int pilot_length = (p[2] == 0x00) ? 8064 : 3220; /* TZX specification */
// int pilot_length = (p[2] == 0x00) ? 8063 : 3223; /* worldofspectrum */
LOG_FORMATS("tap_cas_to_wav_size: Handling TAP block containing 0x%X bytes", data_size);
p += 2;
@@ -623,7 +623,7 @@ static int tap_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes )
while (size < length)
{
int data_size = bytes[0] + (bytes[1] << 8);
- int pilot_length = (bytes[2] == 0x00) ? 8064 : 3220; /* TZX specification */
+ int pilot_length = (bytes[2] == 0x00) ? 8064 : 3220; /* TZX specification */
// int pilot_length = (bytes[2] == 0x00) ? 8063 : 3223; /* worldofspectrum */
LOG_FORMATS("tap_cas_fill_wave: Handling TAP block containing 0x%X bytes\n", data_size);
bytes += 2;
@@ -635,35 +635,35 @@ static int tap_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes )
static const struct CassetteLegacyWaveFiller tzx_legacy_fill_wave =
{
- tzx_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- tzx_cas_to_wav_size, /* chunk_sample_calc */
- TZX_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ tzx_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ tzx_cas_to_wav_size, /* chunk_sample_calc */
+ TZX_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static const struct CassetteLegacyWaveFiller tap_legacy_fill_wave =
{
- tap_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- tap_cas_to_wav_size, /* chunk_sample_calc */
- TZX_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ tap_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ tap_cas_to_wav_size, /* chunk_sample_calc */
+ TZX_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static const struct CassetteLegacyWaveFiller cdt_legacy_fill_wave =
{
- cdt_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- tzx_cas_to_wav_size, /* chunk_sample_calc */
- TZX_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ cdt_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ tzx_cas_to_wav_size, /* chunk_sample_calc */
+ TZX_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t tzx_cassette_identify( cassette_image *cassette, struct CassetteOptions *opts )
@@ -728,4 +728,3 @@ CASSETTE_FORMATLIST_END
CASSETTE_FORMATLIST_START(cdt_cassette_formats)
CASSETTE_FORMAT(cdt_cassette_format)
CASSETTE_FORMATLIST_END
-
diff --git a/src/lib/formats/uef_cas.c b/src/lib/formats/uef_cas.c
index 3238f455f67..eb53697da6e 100644
--- a/src/lib/formats/uef_cas.c
+++ b/src/lib/formats/uef_cas.c
@@ -17,10 +17,10 @@ Not nice, but it works...
#include "uef_cas.h"
-#define UEF_WAV_FREQUENCY 4800
-#define WAVE_LOW -32768
-#define WAVE_HIGH 32767
-#define WAVE_NULL 0
+#define UEF_WAV_FREQUENCY 4800
+#define WAVE_LOW -32768
+#define WAVE_HIGH 32767
+#define WAVE_NULL 0
static const UINT8 UEF_HEADER[10] = { 0x55, 0x45, 0x46, 0x20, 0x46, 0x69, 0x6c, 0x65, 0x21, 0x00 };
@@ -32,12 +32,12 @@ static const UINT8 UEF_HEADER[10] = { 0x55, 0x45, 0x46, 0x20, 0x46, 0x69, 0x6c,
*/
/* gzip flag byte */
-#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */
-#define HEAD_CRC 0x02 /* bit 1 set: header CRC present */
-#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
-#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
-#define COMMENT 0x10 /* bit 4 set: file comment present */
-#define RESERVED 0xE0 /* bits 5..7: reserved */
+#define ASCII_FLAG 0x01 /* bit 0 set: file probably ascii text */
+#define HEAD_CRC 0x02 /* bit 1 set: header CRC present */
+#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
+#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
+#define COMMENT 0x10 /* bit 4 set: file comment present */
+#define RESERVED 0xE0 /* bits 5..7: reserved */
static const UINT8* skip_gz_header( const UINT8 *p ) {
UINT8 method, flags;
@@ -81,7 +81,7 @@ static float get_uef_float( const UINT8 *Float)
int Exponent;
/* assume a four byte array named Float exists, where Float[0]
- was the first byte read from the UEF, Float[1] the second, etc */
+ was the first byte read from the UEF, Float[1] the second, etc */
/* decode mantissa */
Mantissa = Float[0] | (Float[1] << 8) | ((Float[2]&0x7f)|0x80) << 16;
@@ -103,7 +103,7 @@ static float get_uef_float( const UINT8 *Float)
}
static int uef_cas_to_wav_size( const UINT8 *casdata, int caslen ) {
- int pos, size;
+ int pos, size;
if ( casdata[0] == 0x1f && casdata[1] == 0x8b ) {
int err;
@@ -162,14 +162,14 @@ static int uef_cas_to_wav_size( const UINT8 *casdata, int caslen ) {
pos += 6;
switch( chunk_type ) {
- case 0x0100: /* implicit start/stop bit data block */
+ case 0x0100: /* implicit start/stop bit data block */
size += ( chunk_length * 10 ) * 4;
break;
- case 0x0101: /* multiplexed data block */
+ case 0x0101: /* multiplexed data block */
case 0x0103:
LOG_FORMATS( "Unsupported chunk type: %04x\n", chunk_type );
break;
- case 0x0102: /* explicit tape data block */
+ case 0x0102: /* explicit tape data block */
size += ( ( chunk_length * 10 ) - casdata[pos] ) * 4;
break;
case 0x0104:
@@ -303,13 +303,13 @@ static int uef_cas_fill_wave( INT16 *buffer, int length, UINT8 *bytes ) {
}
static const struct CassetteLegacyWaveFiller uef_legacy_fill_wave = {
- uef_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- uef_cas_to_wav_size, /* chunk_sample_calc */
- UEF_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ uef_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ uef_cas_to_wav_size, /* chunk_sample_calc */
+ UEF_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t uef_cassette_identify( cassette_image *cassette, struct CassetteOptions *opts ) {
@@ -330,4 +330,3 @@ const struct CassetteFormat uef_cassette_format = {
CASSETTE_FORMATLIST_START(uef_cassette_formats)
CASSETTE_FORMAT(uef_cassette_format)
CASSETTE_FORMATLIST_END
-
diff --git a/src/lib/formats/upd765_dsk.c b/src/lib/formats/upd765_dsk.c
index 77e0bf07aa9..54b5b301cce 100644
--- a/src/lib/formats/upd765_dsk.c
+++ b/src/lib/formats/upd765_dsk.c
@@ -212,7 +212,7 @@ bool upd765_format::load(io_generic *io, UINT32 form_factor, floppy_image *image
switch (f.encoding)
{
- case floppy_image::FM:
+ case floppy_image::FM:
desc = get_desc_fm(f, current_size, end_gap_index);
break;
case floppy_image::MFM:
@@ -274,7 +274,7 @@ bool upd765_format::save(io_generic *io, floppy_image *image)
int candidates_count = 0;
for(int i=0; i != formats_count; i++) {
if(image->get_form_factor() == floppy_image::FF_UNKNOWN ||
- image->get_form_factor() == formats[i].form_factor) {
+ image->get_form_factor() == formats[i].form_factor) {
if(formats[i].cell_size == cur_cell_size)
candidates[candidates_count++] = i;
else if((!cur_cell_size || formats[i].cell_size < cur_cell_size) &&
@@ -381,7 +381,7 @@ void upd765_format::check_compatibility(floppy_image *image, int *candidates, in
switch (formats[candidates[0]].encoding)
{
- case floppy_image::FM:
+ case floppy_image::FM:
extract_sectors_from_bitstream_fm_pc(bitstream, track_size, sectors, sectdata, sizeof(sectdata));
break;
case floppy_image::MFM:
@@ -435,7 +435,7 @@ void upd765_format::extract_sectors(floppy_image *image, const format &f, desc_s
switch (f.encoding)
{
- case floppy_image::FM:
+ case floppy_image::FM:
extract_sectors_from_bitstream_fm_pc(bitstream, track_size, sectors, sectdata, sizeof(sectdata));
break;
case floppy_image::MFM:
diff --git a/src/lib/formats/upd765_dsk.h b/src/lib/formats/upd765_dsk.h
index 35f32a07a57..fa728101abd 100644
--- a/src/lib/formats/upd765_dsk.h
+++ b/src/lib/formats/upd765_dsk.h
@@ -17,7 +17,7 @@ public:
struct format {
UINT32 form_factor; // See floppy_image for possible values
UINT32 variant; // See floppy_image for possible values
- UINT32 encoding; // See floppy_image for possible values
+ UINT32 encoding; // See floppy_image for possible values
int cell_size; // See floppy_image_format_t for details
int sector_count;
diff --git a/src/lib/formats/vg5k_cas.c b/src/lib/formats/vg5k_cas.c
index 68ae6b4a026..e56765c9921 100644
--- a/src/lib/formats/vg5k_cas.c
+++ b/src/lib/formats/vg5k_cas.c
@@ -6,9 +6,9 @@
#include "vg5k_cas.h"
-#define SMPLO -32768
-#define SILENCE 0
-#define SMPHI 32767
+#define SMPLO -32768
+#define SILENCE 0
+#define SMPHI 32767
static int k7_size;
@@ -112,7 +112,7 @@ INLINE int vg5k_k7_synchro(INT16 *buffer, int sample_pos, int len)
static int vg5k_handle_tap(INT16 *buffer, const UINT8 *casdata)
{
- int data_pos, sample_count;
+ int data_pos, sample_count;
data_pos = 0;
sample_count = 0;
@@ -122,9 +122,9 @@ static int vg5k_handle_tap(INT16 *buffer, const UINT8 *casdata)
return -1;
/* on the entire file*/
- while( data_pos < k7_size )
+ while( data_pos < k7_size )
{
- UINT16 block_size = 0;
+ UINT16 block_size = 0;
/* Identify type of block */
if (casdata[data_pos] == 0xd3)
@@ -158,17 +158,17 @@ static int vg5k_handle_tap(INT16 *buffer, const UINT8 *casdata)
/* Data samples */
for ( ; block_size ; data_pos++, block_size-- )
- {
- /* Make sure there are enough bytes left */
- if (data_pos > k7_size)
- return -1;
+ {
+ /* Make sure there are enough bytes left */
+ if (data_pos > k7_size)
+ return -1;
- sample_count += vg5k_cas_byte( buffer, sample_count, casdata[data_pos] );
+ sample_count += vg5k_cas_byte( buffer, sample_count, casdata[data_pos] );
/* generate the end-byte samples */
sample_count += vg5k_cas_eob( buffer, sample_count);
}
- }
+ }
/* Finish with 10000 samples of silence */
sample_count += vg5k_cas_silence(buffer, sample_count, 10000);
@@ -199,13 +199,13 @@ static int vg5k_k7_to_wav_size(const UINT8 *casdata, int caslen)
static const struct CassetteLegacyWaveFiller vg5k_legacy_fill_wave =
{
- vg5k_k7_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- vg5k_k7_to_wav_size, /* chunk_sample_calc */
- 44100, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ vg5k_k7_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ vg5k_k7_to_wav_size, /* chunk_sample_calc */
+ 44100, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t vg5k_k7_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/vg5k_cas.h b/src/lib/formats/vg5k_cas.h
index 2686893a31b..b3bb120ddbe 100644
--- a/src/lib/formats/vg5k_cas.h
+++ b/src/lib/formats/vg5k_cas.h
@@ -12,4 +12,3 @@
CASSETTE_FORMATLIST_EXTERN(vg5k_cassette_formats);
#endif /* VG5K_CAS_H */
-
diff --git a/src/lib/formats/vt_cas.c b/src/lib/formats/vt_cas.c
index 0923b6c3213..4040b00d7aa 100644
--- a/src/lib/formats/vt_cas.c
+++ b/src/lib/formats/vt_cas.c
@@ -10,45 +10,45 @@ static int generic_fill_wave(INT16 *buffer, int length, UINT8 *code, int bitsamp
{
static int nullbyte;
- if( code == CODE_HEADER )
- {
+ if( code == CODE_HEADER )
+ {
int i;
- if( length < SILENCE )
+ if( length < SILENCE )
return -1;
for( i = 0; i < SILENCE; i++ )
*buffer++ = 0;
nullbyte = 0;
- return SILENCE;
- }
+ return SILENCE;
+ }
if( code == CODE_TRAILER )
- {
+ {
int i;
- /* silence at the end */
+ /* silence at the end */
for( i = 0; i < length; i++ )
*buffer++ = 0;
- return length;
- }
+ return length;
+ }
- if( length < bytesamples )
+ if( length < bytesamples )
return -1;
buffer = fill_wave_byte(buffer, *code);
- if( !nullbyte && *code == 0 )
+ if( !nullbyte && *code == 0 )
{
int i;
for( i = 0; i < 2*bitsamples; i++ )
*buffer++ = lo;
- nullbyte = 1;
+ nullbyte = 1;
return bytesamples + 2 * bitsamples;
}
- return bytesamples;
+ return bytesamples;
}
@@ -56,36 +56,36 @@ static int generic_fill_wave(INT16 *buffer, int length, UINT8 *code, int bitsamp
vtech 1
*********************************************************************/
-#define V1_LO -32768
-#define V1_HI +32767
+#define V1_LO -32768
+#define V1_HI +32767
-#define V1_BITSAMPLES 6
-#define V1_BYTESAMPLES 8*V1_BITSAMPLES
+#define V1_BITSAMPLES 6
+#define V1_BYTESAMPLES 8*V1_BITSAMPLES
static INT16 *vtech1_fill_wave_byte(INT16 *buffer, int byte)
{
int i;
- for( i = 7; i >= 0; i-- )
+ for( i = 7; i >= 0; i-- )
{
- *buffer++ = V1_HI; /* initial cycle */
+ *buffer++ = V1_HI; /* initial cycle */
*buffer++ = V1_LO;
if( (byte >> i) & 1 )
{
*buffer++ = V1_HI; /* two more cycles */
- *buffer++ = V1_LO;
+ *buffer++ = V1_LO;
*buffer++ = V1_HI;
- *buffer++ = V1_LO;
- }
+ *buffer++ = V1_LO;
+ }
else
{
*buffer++ = V1_HI; /* one slow cycle */
*buffer++ = V1_HI;
*buffer++ = V1_LO;
*buffer++ = V1_LO;
- }
+ }
}
- return buffer;
+ return buffer;
}
static int vtech1_cassette_fill_wave(INT16 *buffer, int length, UINT8 *code)
@@ -95,13 +95,13 @@ static int vtech1_cassette_fill_wave(INT16 *buffer, int length, UINT8 *code)
static const struct CassetteLegacyWaveFiller vtech1_legacy_fill_wave =
{
- vtech1_cassette_fill_wave, /* fill_wave */
- 1, /* chunk_size */
- V1_BYTESAMPLES, /* chunk_samples */
- NULL, /* chunk_sample_calc */
- 600*V1_BITSAMPLES, /* sample_frequency */
- 600*V1_BITSAMPLES, /* header_samples */
- 600*V1_BITSAMPLES /* trailer_samples */
+ vtech1_cassette_fill_wave, /* fill_wave */
+ 1, /* chunk_size */
+ V1_BYTESAMPLES, /* chunk_samples */
+ NULL, /* chunk_sample_calc */
+ 600*V1_BITSAMPLES, /* sample_frequency */
+ 600*V1_BITSAMPLES, /* header_samples */
+ 600*V1_BITSAMPLES /* trailer_samples */
};
static casserr_t vtech1_cas_identify(cassette_image *cassette, struct CassetteOptions *opts)
@@ -130,10 +130,10 @@ CASSETTE_FORMATLIST_END
vtech 2
*********************************************************************/
-#define VT2_LO -20000
-#define VT2_HI +20000
+#define VT2_LO -20000
+#define VT2_HI +20000
-#define VT2_BITSAMPLES 18
+#define VT2_BITSAMPLES 18
#define VT2_BYTESAMPLES 8*VT2_BITSAMPLES
static const INT16 vtech2_bit0[VT2_BITSAMPLES] =
@@ -160,12 +160,12 @@ static INT16 *vtech2_fill_wave_bit(INT16 *buffer, int bit)
{
for( i = 0; i < VT2_BITSAMPLES; i++ )
*buffer++ = vtech2_bit1[i];
- }
+ }
else
{
for( i = 0; i < VT2_BITSAMPLES; i++ )
*buffer++ = vtech2_bit0[i];
- }
+ }
return buffer;
}
@@ -180,7 +180,7 @@ static INT16 *vtech2_fill_wave_byte(INT16 *buffer, int byte)
buffer = vtech2_fill_wave_bit(buffer, (byte >> 2) & 1);
buffer = vtech2_fill_wave_bit(buffer, (byte >> 1) & 1);
buffer = vtech2_fill_wave_bit(buffer, (byte >> 0) & 1);
- return buffer;
+ return buffer;
}
static int vtech2_cassette_fill_wave(INT16 *buffer, int length, UINT8 *code)
@@ -190,13 +190,13 @@ static int vtech2_cassette_fill_wave(INT16 *buffer, int length, UINT8 *code)
static const struct CassetteLegacyWaveFiller vtech2_legacy_fill_wave =
{
- vtech2_cassette_fill_wave, /* fill_wave */
- 1, /* chunk_size */
- VT2_BYTESAMPLES, /* chunk_samples */
- NULL, /* chunk_sample_calc */
- 600*VT2_BITSAMPLES, /* sample_frequency */
- 600*VT2_BITSAMPLES, /* header_samples */
- 600*VT2_BITSAMPLES /* trailer_samples */
+ vtech2_cassette_fill_wave, /* fill_wave */
+ 1, /* chunk_size */
+ VT2_BYTESAMPLES, /* chunk_samples */
+ NULL, /* chunk_sample_calc */
+ 600*VT2_BITSAMPLES, /* sample_frequency */
+ 600*VT2_BITSAMPLES, /* header_samples */
+ 600*VT2_BITSAMPLES /* trailer_samples */
};
static casserr_t vtech2_cas_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/wavfile.c b/src/lib/formats/wavfile.c
index 2577a908025..e332110fbff 100644
--- a/src/lib/formats/wavfile.c
+++ b/src/lib/formats/wavfile.c
@@ -17,7 +17,7 @@ static const char magic2[4] = { 'W', 'A', 'V', 'E' };
static const char format_tag_id[4] = { 'f', 'm', 't', ' ' };
static const char data_tag_id[4] = { 'd', 'a', 't', 'a' };
-#define WAV_FORMAT_PCM 1
+#define WAV_FORMAT_PCM 1
@@ -104,12 +104,12 @@ static casserr_t wavfile_process(cassette_image *cassette, struct CassetteOption
cassette_image_read(cassette, format_tag, offset, sizeof(format_tag));
- format_type = get_leuint16(&format_tag[0]);
- opts->channels = get_leuint16(&format_tag[2]);
- opts->sample_frequency = get_leuint32(&format_tag[4]);
- bytes_per_second = get_leuint32(&format_tag[8]);
+ format_type = get_leuint16(&format_tag[0]);
+ opts->channels = get_leuint16(&format_tag[2]);
+ opts->sample_frequency = get_leuint32(&format_tag[4]);
+ bytes_per_second = get_leuint32(&format_tag[8]);
// block_align = get_leuint16(&format_tag[12]);
- opts->bits_per_sample = get_leuint16(&format_tag[14]);
+ opts->bits_per_sample = get_leuint16(&format_tag[14]);
if (format_type != WAV_FORMAT_PCM)
return CASSETTE_ERROR_INVALIDIMAGE;
@@ -119,7 +119,7 @@ static casserr_t wavfile_process(cassette_image *cassette, struct CassetteOption
switch(opts->bits_per_sample)
{
case 8:
- waveform_flags = CASSETTE_WAVEFORM_8BIT | CASSETTE_WAVEFORM_UNSIGNED; // 8-bits wav are stored unsigned
+ waveform_flags = CASSETTE_WAVEFORM_8BIT | CASSETTE_WAVEFORM_UNSIGNED; // 8-bits wav are stored unsigned
break;
case 16:
waveform_flags = CASSETTE_WAVEFORM_16BITLE;
@@ -176,10 +176,10 @@ static casserr_t wavfile_save(cassette_image *cassette, const struct CassetteInf
{
casserr_t err;
UINT8 consolidated_header[12 + 8 + 16 + 8];
- UINT8 *header = &consolidated_header[0];
- UINT8 *format_tag_header = &consolidated_header[12];
- UINT8 *format_tag_data = &consolidated_header[12 + 8];
- UINT8 *data_tag_header = &consolidated_header[12 + 8 + 16];
+ UINT8 *header = &consolidated_header[0];
+ UINT8 *format_tag_header = &consolidated_header[12];
+ UINT8 *format_tag_data = &consolidated_header[12 + 8];
+ UINT8 *data_tag_header = &consolidated_header[12 + 8 + 16];
UINT32 file_size;
UINT32 bytes_per_second;
UINT16 bits_per_sample;
@@ -195,23 +195,23 @@ static casserr_t wavfile_save(cassette_image *cassette, const struct CassetteInf
block_align = (UINT16) (bytes_per_sample * info->channels);
/* set up header */
- memcpy(&header[0], magic1, 4);
- memcpy(&header[8], magic2, 4);
- put_leuint32(&header[4], file_size);
+ memcpy(&header[0], magic1, 4);
+ memcpy(&header[8], magic2, 4);
+ put_leuint32(&header[4], file_size);
/* set up format tag */
- memcpy(&format_tag_header[0], format_tag_id, 4);
- put_leuint32(&format_tag_header[4], 16);
- put_leuint16(&format_tag_data[0], WAV_FORMAT_PCM);
- put_leuint16(&format_tag_data[2], info->channels);
- put_leuint32(&format_tag_data[4], info->sample_frequency);
- put_leuint32(&format_tag_data[8], bytes_per_second);
- put_leuint16(&format_tag_data[12], block_align);
- put_leuint16(&format_tag_data[14], bits_per_sample);
+ memcpy(&format_tag_header[0], format_tag_id, 4);
+ put_leuint32(&format_tag_header[4], 16);
+ put_leuint16(&format_tag_data[0], WAV_FORMAT_PCM);
+ put_leuint16(&format_tag_data[2], info->channels);
+ put_leuint32(&format_tag_data[4], info->sample_frequency);
+ put_leuint32(&format_tag_data[8], bytes_per_second);
+ put_leuint16(&format_tag_data[12], block_align);
+ put_leuint16(&format_tag_data[14], bits_per_sample);
/* set up data tag */
- memcpy(&data_tag_header[0], data_tag_id, 4);
- put_leuint32(&data_tag_header[4], data_size);
+ memcpy(&data_tag_header[0], data_tag_id, 4);
+ put_leuint32(&data_tag_header[4], data_size);
/* write consolidated header */
cassette_image_write(cassette, consolidated_header, 0, sizeof(consolidated_header));
@@ -286,6 +286,3 @@ void wavfile_testload(const char *fname)
fclose(f);
}
#endif
-
-
-
diff --git a/src/lib/formats/wd177x_dsk.c b/src/lib/formats/wd177x_dsk.c
index 07302c5a82c..8819c1bbd6d 100644
--- a/src/lib/formats/wd177x_dsk.c
+++ b/src/lib/formats/wd177x_dsk.c
@@ -205,7 +205,7 @@ bool wd177x_format::load(io_generic *io, UINT32 form_factor, floppy_image *image
switch (f.encoding)
{
- case floppy_image::FM:
+ case floppy_image::FM:
desc = get_desc_fm(f, current_size, end_gap_index);
break;
case floppy_image::MFM:
@@ -267,7 +267,7 @@ bool wd177x_format::save(io_generic *io, floppy_image *image)
int candidates_count = 0;
for(int i=0; i != formats_count; i++) {
if(image->get_form_factor() == floppy_image::FF_UNKNOWN ||
- image->get_form_factor() == formats[i].form_factor) {
+ image->get_form_factor() == formats[i].form_factor) {
if(formats[i].cell_size == cur_cell_size)
candidates[candidates_count++] = i;
else if((!cur_cell_size || formats[i].cell_size < cur_cell_size) &&
@@ -374,7 +374,7 @@ void wd177x_format::check_compatibility(floppy_image *image, int *candidates, in
switch (formats[candidates[0]].encoding)
{
- case floppy_image::FM:
+ case floppy_image::FM:
extract_sectors_from_bitstream_fm_pc(bitstream, track_size, sectors, sectdata, sizeof(sectdata));
break;
case floppy_image::MFM:
@@ -427,7 +427,7 @@ void wd177x_format::extract_sectors(floppy_image *image, const format &f, desc_s
switch (f.encoding)
{
- case floppy_image::FM:
+ case floppy_image::FM:
extract_sectors_from_bitstream_fm_pc(bitstream, track_size, sectors, sectdata, sizeof(sectdata));
break;
case floppy_image::MFM:
diff --git a/src/lib/formats/wd177x_dsk.h b/src/lib/formats/wd177x_dsk.h
index f08d1801ca9..966e790d5d8 100644
--- a/src/lib/formats/wd177x_dsk.h
+++ b/src/lib/formats/wd177x_dsk.h
@@ -17,7 +17,7 @@ public:
struct format {
UINT32 form_factor; // See floppy_image for possible values
UINT32 variant; // See floppy_image for possible values
- UINT32 encoding; // See floppy_image for possible values
+ UINT32 encoding; // See floppy_image for possible values
int cell_size; // See floppy_image_format_t for details
int sector_count;
diff --git a/src/lib/formats/x07_cas.c b/src/lib/formats/x07_cas.c
index 8765dea4f61..80b76593c69 100644
--- a/src/lib/formats/x07_cas.c
+++ b/src/lib/formats/x07_cas.c
@@ -9,10 +9,10 @@
#define WAVEENTRY_LOW -32768
#define WAVEENTRY_HIGH 32767
-#define X07_WAV_FREQUENCY 4800
-#define X07_TIMER_FREQUENCY 1200
-#define X07_BIT_LENGTH (X07_WAV_FREQUENCY/X07_TIMER_FREQUENCY)
-#define X07_HEADER_BYTES 16
+#define X07_WAV_FREQUENCY 4800
+#define X07_TIMER_FREQUENCY 1200
+#define X07_BIT_LENGTH (X07_WAV_FREQUENCY/X07_TIMER_FREQUENCY)
+#define X07_HEADER_BYTES 16
// image size
static int x07_image_size;
@@ -45,7 +45,7 @@ static int x07_output_bit(INT16 *buffer, int sample_pos, UINT8 bit)
samples += x07_put_samples(buffer, sample_pos + samples, X07_BIT_LENGTH/2, WAVEENTRY_LOW);
}
- return samples;
+ return samples;
}
static int x07_output_byte(INT16 *buffer, int sample_pos, UINT8 byte)
@@ -138,13 +138,13 @@ static int x07_cassette_calculate_size_in_samples(const UINT8 *bytes, int length
static const struct CassetteLegacyWaveFiller x07_legacy_fill_wave =
{
- x07_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- x07_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- X07_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ x07_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ x07_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ X07_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t x07_cassette_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/x1_tap.c b/src/lib/formats/x1_tap.c
index 795585fc4e5..3d42c41dad4 100644
--- a/src/lib/formats/x1_tap.c
+++ b/src/lib/formats/x1_tap.c
@@ -21,8 +21,8 @@
#include "x1_tap.h"
-#define WAVE_HIGH 0x5a9e
-#define WAVE_LOW -0x5a9e
+#define WAVE_HIGH 0x5a9e
+#define WAVE_LOW -0x5a9e
static int cas_size;
static int samplerate;
@@ -101,13 +101,13 @@ static int x1_cas_fill_wave(INT16 *buffer, int sample_count, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller x1_legacy_fill_wave =
{
- x1_cas_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- x1_cas_to_wav_size, /* chunk_sample_calc */
- 8000, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ x1_cas_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ x1_cas_to_wav_size, /* chunk_sample_calc */
+ 8000, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t x1_cas_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/formats/z80ne_dsk.c b/src/lib/formats/z80ne_dsk.c
index 585f2edd342..cc1d1901a31 100644
--- a/src/lib/formats/z80ne_dsk.c
+++ b/src/lib/formats/z80ne_dsk.c
@@ -63,29 +63,29 @@ struct dmk_tag
* See WD1711 documentation
*/
/* DMK file header */
-#define DMK_HEADER_LEN 16 /* DMK header */
+#define DMK_HEADER_LEN 16 /* DMK header */
/* For every track (40) */
- #define DMK_TOC_LEN 128 /* 64 16-bit relative offsets to IDAMs */
- #define DMK_GAP1_LEN 32 /* GAP1 (26 bytes 0xFF and 6 bytes 0x00) */
+ #define DMK_TOC_LEN 128 /* 64 16-bit relative offsets to IDAMs */
+ #define DMK_GAP1_LEN 32 /* GAP1 (26 bytes 0xFF and 6 bytes 0x00) */
/* For every sector (10) 301 bytes */
- #define DMK_IDAM_LEN 7 /* IDAM (0xFE, Track, 0x00, Sector, 0x00, CRChi, CRClo) */
- #define DMK_ID_GAP_LEN 17 /* GAP2 (11 bytes 0xFF and 6 bytes 0x00) */
- #define DMK_DAM_LEN 1 /* Data Address Mark (0xFB) */
- #define DMK_DATA_LEN 256 /* Data */
- #define DMK_DATA_CRC_LEN 2 /* Data CRC (CRChi, CRClo) */
- #define DMK_DATA_GAP_LEN 18 /* GAP3 (12 bytes 0xFF and 6 bytes 0x00) (not for last sector) */
-
- #define DMK_EXTRA_TRACK_LENGTH (176) /* GAP4 (192 bytes 0xFF) */
+ #define DMK_IDAM_LEN 7 /* IDAM (0xFE, Track, 0x00, Sector, 0x00, CRChi, CRClo) */
+ #define DMK_ID_GAP_LEN 17 /* GAP2 (11 bytes 0xFF and 6 bytes 0x00) */
+ #define DMK_DAM_LEN 1 /* Data Address Mark (0xFB) */
+ #define DMK_DATA_LEN 256 /* Data */
+ #define DMK_DATA_CRC_LEN 2 /* Data CRC (CRChi, CRClo) */
+ #define DMK_DATA_GAP_LEN 18 /* GAP3 (12 bytes 0xFF and 6 bytes 0x00) (not for last sector) */
+
+ #define DMK_EXTRA_TRACK_LENGTH (176) /* GAP4 (192 bytes 0xFF) */
/* End of DMK file structure */
-#define dmk_idam_type(x) (x)[0]
-#define dmk_idam_track(x) (x)[1]
-#define dmk_idam_side(x) (x)[2]
-#define dmk_idam_sector(x) (x)[3]
-#define dmk_idam_sectorlength(x) (x)[4]
-#define dmk_idam_crc(x) (((x)[5] << 8) + (x)[6])
-#define dmk_idam_set_crc(x, crc) (x)[5] = ((crc) >> 8); (x)[6] = ((crc) >> 0);
+#define dmk_idam_type(x) (x)[0]
+#define dmk_idam_track(x) (x)[1]
+#define dmk_idam_side(x) (x)[2]
+#define dmk_idam_sector(x) (x)[3]
+#define dmk_idam_sectorlength(x) (x)[4]
+#define dmk_idam_crc(x) (((x)[5] << 8) + (x)[6])
+#define dmk_idam_set_crc(x, crc) (x)[5] = ((crc) >> 8); (x)[6] = ((crc) >> 0);
static const char needle_data[] = "\x00\x00\x00\x00\x00\x00\x00\x00\xFB\xFB";
static const char needle_deleted_data_fa[] = "\x00\x00\x00\x00\x00\x00\x00\x00\xFA\xFA";
@@ -181,16 +181,16 @@ static floperr_t z80ne_dmk_format_track(floppy_image_legacy *floppy, int head, i
int sector_position;
int i;
- sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
- sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
- interleave = option_resolution_lookup_int(params, PARAM_INTERLEAVE);
- first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
+ sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
+ sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
+ interleave = option_resolution_lookup_int(params, PARAM_INTERLEAVE);
+ first_sector_id = option_resolution_lookup_int(params, PARAM_FIRST_SECTOR_ID);
max_track_size = get_dmk_tag(floppy)->track_size;
if (sectors > DMK_TOC_LEN/2)
{
- err = FLOPPY_ERROR_INTERNAL;
+ err = FLOPPY_ERROR_INTERNAL;
goto done;
}
@@ -230,11 +230,11 @@ static floperr_t z80ne_dmk_format_track(floppy_image_legacy *floppy, int head, i
/* set up a local physical sector template */
local_sector_size = (DMK_IDAM_LEN +
- DMK_ID_GAP_LEN +
- DMK_DAM_LEN +
- sector_length +
- DMK_DATA_CRC_LEN +
- DMK_DATA_GAP_LEN);
+ DMK_ID_GAP_LEN +
+ DMK_DAM_LEN +
+ sector_length +
+ DMK_DATA_CRC_LEN +
+ DMK_DATA_GAP_LEN);
local_sector = (UINT8*)malloc(local_sector_size);
if (!local_sector)
{
@@ -252,17 +252,17 @@ static floperr_t z80ne_dmk_format_track(floppy_image_legacy *floppy, int head, i
track_position = DMK_TOC_LEN + DMK_GAP1_LEN * 2;
/*
- * prepare template in local sector
- */
+ * prepare template in local sector
+ */
/* IDAM */
sector_position = 0;
- dmk_idam_type( &local_sector[sector_position]) = 0xFE;
- dmk_idam_track( &local_sector[sector_position]) = track;
- dmk_idam_side( &local_sector[sector_position]) = head;
- dmk_idam_sector( &local_sector[sector_position]) = 0; /* replace in sector instances */
- dmk_idam_sectorlength( &local_sector[sector_position]) = compute_log2(sector_length / 128);
- dmk_idam_set_crc( &local_sector[sector_position], 0); /* replace in sector instances */
+ dmk_idam_type( &local_sector[sector_position]) = 0xFE;
+ dmk_idam_track( &local_sector[sector_position]) = track;
+ dmk_idam_side( &local_sector[sector_position]) = head;
+ dmk_idam_sector( &local_sector[sector_position]) = 0; /* replace in sector instances */
+ dmk_idam_sectorlength( &local_sector[sector_position]) = compute_log2(sector_length / 128);
+ dmk_idam_set_crc( &local_sector[sector_position], 0); /* replace in sector instances */
sector_position += 7;
/* GAP2 (ID GAP) */
@@ -286,8 +286,8 @@ static floperr_t z80ne_dmk_format_track(floppy_image_legacy *floppy, int head, i
sector_position += 6;
/*
- * start of track data
- */
+ * start of track data
+ */
while(physical_sector < DMK_TOC_LEN/2)
{
if (physical_sector >= sectors)
@@ -302,9 +302,9 @@ static floperr_t z80ne_dmk_format_track(floppy_image_legacy *floppy, int head, i
logical_sector = sector_map[physical_sector];
/* update IDAM in local sector template */
- dmk_idam_sector( &local_sector[0]) = logical_sector; /* update sector number in sector instance */
- crc = ccitt_crc16(0xffff, &local_sector[0], DMK_IDAM_LEN - 2); /* and recalculate crc */
- dmk_idam_set_crc( &local_sector[0], crc);
+ dmk_idam_sector( &local_sector[0]) = logical_sector; /* update sector number in sector instance */
+ crc = ccitt_crc16(0xffff, &local_sector[0], DMK_IDAM_LEN - 2); /* and recalculate crc */
+ dmk_idam_set_crc( &local_sector[0], crc);
/* write local sector in track doubling every byte (DMK double density mode) */
for(i=0; i<local_sector_size; i++)
@@ -358,23 +358,23 @@ static UINT32 z80ne_dmk_get_track_size(floppy_image_legacy *floppy, int head, in
static UINT8 * my_memmem(UINT8 *haystack, size_t haystacklen,
UINT8 *needle, size_t needlelen)
{
- register UINT8 *h = haystack;
- register UINT8 *n = needle;
- register size_t hl = haystacklen;
- register size_t nl = needlelen;
- register size_t i;
+ register UINT8 *h = haystack;
+ register UINT8 *n = needle;
+ register size_t hl = haystacklen;
+ register size_t nl = needlelen;
+ register size_t i;
- if (nl == 0) return haystack; /* The first occurrence of the empty string is deemed to occur at
+ if (nl == 0) return haystack; /* The first occurrence of the empty string is deemed to occur at
the beginning of the string. */
- if (hl < nl)
- return NULL;
+ if (hl < nl)
+ return NULL;
- for( i = 0; (i < hl) && (i + nl <= hl ); i++ )
- if (h[i] == *n) /* first match */
- if ( !memcmp(&h[i]+1, n + 1, nl - 1) )
- return (haystack+i); /* returns a pointer to the substring */
+ for( i = 0; (i < hl) && (i + nl <= hl ); i++ )
+ if (h[i] == *n) /* first match */
+ if ( !memcmp(&h[i]+1, n + 1, nl - 1) )
+ return (haystack+i); /* returns a pointer to the substring */
- return (UINT8 *)NULL; /* not found */
+ return (UINT8 *)NULL; /* not found */
}
@@ -403,9 +403,9 @@ static floperr_t z80ne_dmk_seek_sector_in_track(floppy_image_legacy *floppy, int
/* set up a local IDAM space */
local_idam_size = (DMK_IDAM_LEN +
- DMK_ID_GAP_LEN +
- DMK_DAM_LEN +
- DMK_DATA_GAP_LEN);
+ DMK_ID_GAP_LEN +
+ DMK_DAM_LEN +
+ DMK_DATA_GAP_LEN);
local_idam = (UINT8*)malloc(local_idam_size);
if (!local_idam)
{
@@ -753,10 +753,10 @@ FLOPPY_CONSTRUCT(z80ne_dmk_construct)
if (params)
{
- heads = option_resolution_lookup_int(params, PARAM_HEADS);
- tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
- sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
- sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
+ heads = option_resolution_lookup_int(params, PARAM_HEADS);
+ tracks = option_resolution_lookup_int(params, PARAM_TRACKS);
+ sectors = option_resolution_lookup_int(params, PARAM_SECTORS);
+ sector_length = option_resolution_lookup_int(params, PARAM_SECTOR_LENGTH);
track_size = z80ne_dmk_min_track_size(sectors, sector_length);
@@ -819,17 +819,17 @@ FLOPPY_IDENTIFY(z80ne_dmk_identify)
LEGACY_FLOPPY_OPTIONS_START( z80ne )
/*
- * Single side
- * Single density
- * FM, 125 kbit/s,
- * 40 tracks, track ID: 0..39
- * 10 sectors/track, sector ID: 0..9
- * 256 bytes/sector
- * Interleave 1 (sector ID sequence on track: 0 5 1 6 2 7 3 8 4 9)
- * 3125 byte/track unformatted
- * Rotation speed 300 rpm (5 rps)
- */
- LEGACY_FLOPPY_OPTION( z80ne_dmk, "zmk", "Z80NE DMK disk image", z80ne_dmk_identify, z80ne_dmk_construct, NULL,
+ * Single side
+ * Single density
+ * FM, 125 kbit/s,
+ * 40 tracks, track ID: 0..39
+ * 10 sectors/track, sector ID: 0..9
+ * 256 bytes/sector
+ * Interleave 1 (sector ID sequence on track: 0 5 1 6 2 7 3 8 4 9)
+ * 3125 byte/track unformatted
+ * Rotation speed 300 rpm (5 rps)
+ */
+ LEGACY_FLOPPY_OPTION( z80ne_dmk, "zmk", "Z80NE DMK disk image", z80ne_dmk_identify, z80ne_dmk_construct, NULL,
HEADS([1])
TRACKS([40])
SECTORS([10])
diff --git a/src/lib/formats/zx81_p.c b/src/lib/formats/zx81_p.c
index ad813509e4e..bfb871c3c51 100644
--- a/src/lib/formats/zx81_p.c
+++ b/src/lib/formats/zx81_p.c
@@ -32,24 +32,24 @@ medium transfer rate is approx. 307 bps (38 bytes/sec) for files that contain
#include "zx81_p.h"
-#define WAVEENTRY_LOW -32768
-#define WAVEENTRY_HIGH 32767
-#define WAVEENTRY_ZERO 0
+#define WAVEENTRY_LOW -32768
+#define WAVEENTRY_HIGH 32767
+#define WAVEENTRY_ZERO 0
-#define ZX81_WAV_FREQUENCY 44100
+#define ZX81_WAV_FREQUENCY 44100
/* all following are in samples */
-#define ZX81_PULSE_LENGTH 16
-#define ZX81_PAUSE_LENGTH 56
-#define ZX81_PILOT_LENGTH 220500
+#define ZX81_PULSE_LENGTH 16
+#define ZX81_PAUSE_LENGTH 56
+#define ZX81_PILOT_LENGTH 220500
-#define ZX81_LOW_BIT_LENGTH (ZX81_PULSE_LENGTH*4+ZX81_PAUSE_LENGTH)
-#define ZX81_HIGH_BIT_LENGTH (ZX81_PULSE_LENGTH*9+ZX81_PAUSE_LENGTH)
+#define ZX81_LOW_BIT_LENGTH (ZX81_PULSE_LENGTH*4+ZX81_PAUSE_LENGTH)
+#define ZX81_HIGH_BIT_LENGTH (ZX81_PULSE_LENGTH*9+ZX81_PAUSE_LENGTH)
-#define ZX81_START_LOAD_ADDRESS 0x4009
-#define ZX80_START_LOAD_ADDRESS 0x4000
-#define ZX81_DATA_LENGTH_OFFSET 0x0b
-#define ZX80_DATA_LENGTH_OFFSET 0x04
+#define ZX81_START_LOAD_ADDRESS 0x4009
+#define ZX80_START_LOAD_ADDRESS 0x4000
+#define ZX81_DATA_LENGTH_OFFSET 0x0b
+#define ZX80_DATA_LENGTH_OFFSET 0x04
static UINT8 zx_file_name[128];
static UINT16 real_data_length = 0;
@@ -61,7 +61,7 @@ static INT16 *zx81_emit_level(INT16 *p, int count, int level)
{
int i;
- for (i=0; i<count; i++) *(p++) = level;
+ for (i=0; i<count; i++) *(p++) = level;
return p;
}
@@ -100,7 +100,7 @@ static INT16* zx81_output_bit(INT16 *p, UINT8 bit)
p = zx81_emit_pause(p);
- return p;
+ return p;
}
static INT16* zx81_output_byte(INT16 *p, UINT8 byte)
@@ -129,22 +129,22 @@ static UINT16 zx81_cassette_calculate_number_of_1(const UINT8 *bytes, UINT16 len
/* ZX-81 functions */
static const UINT8 zx81_chars[]={
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*00h-07h*/
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*08h-0fh*/
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*10h-17h*/
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*18h-1fh*/
- 0x00, 0x00, 0x0b, 0x00, 0x0d, 0x00, 0x00, 0x00, /*20h-27h*/
- 0x10, 0x11, 0x17, 0x15, 0x1a, 0x16, 0x1b, 0x18, /*28h-2fh*/
- 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, /*30h-37h*/
- 0x24, 0x25, 0x0e, 0x19, 0x13, 0x14, 0x12, 0x0f, /*38h-3fh*/
- 0x00, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, /*40h-47h*/
- 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, /*48h-4fh*/
- 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, /*50h-57h*/
- 0x3d, 0x3e, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, /*58h-5fh*/
- 0x00, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, /*60h-67h*/
- 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, /*68h-6fh*/
- 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, /*70h-77h*/
- 0x3d, 0x3e, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, /*78h-7fh*/
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*00h-07h*/
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*08h-0fh*/
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*10h-17h*/
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /*18h-1fh*/
+ 0x00, 0x00, 0x0b, 0x00, 0x0d, 0x00, 0x00, 0x00, /*20h-27h*/
+ 0x10, 0x11, 0x17, 0x15, 0x1a, 0x16, 0x1b, 0x18, /*28h-2fh*/
+ 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, /*30h-37h*/
+ 0x24, 0x25, 0x0e, 0x19, 0x13, 0x14, 0x12, 0x0f, /*38h-3fh*/
+ 0x00, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, /*40h-47h*/
+ 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, /*48h-4fh*/
+ 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, /*50h-57h*/
+ 0x3d, 0x3e, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, /*58h-5fh*/
+ 0x00, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, /*60h-67h*/
+ 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, /*68h-6fh*/
+ 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, /*70h-77h*/
+ 0x3d, 0x3e, 0x3f, 0x00, 0x00, 0x00, 0x00, 0x00, /*78h-7fh*/
};
static void zx81_fill_file_name(const char* name)
@@ -193,13 +193,13 @@ static int zx81_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller zx81_legacy_fill_wave =
{
- zx81_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- zx81_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- ZX81_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ zx81_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ zx81_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ ZX81_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t zx81_p_identify(cassette_image *cassette, struct CassetteOptions *opts)
@@ -210,9 +210,9 @@ static casserr_t zx81_p_identify(cassette_image *cassette, struct CassetteOption
static casserr_t zx81_p_load(cassette_image *cassette)
{
/* The filename of the file is used to create the wave stream for the emulated machine. Why is this information not
- part of the image file itself?
- Hardcoding this to "cassette".
- */
+ part of the image file itself?
+ Hardcoding this to "cassette".
+ */
zx81_fill_file_name ("cassette" /*image_basename_noext(device_list_find_by_tag( Machine->config->m_devicelist, CASSETTE, "cassette" ))*/ );
return cassette_legacy_construct(cassette, &zx81_legacy_fill_wave);
}
@@ -261,13 +261,13 @@ static int zx80_cassette_fill_wave(INT16 *buffer, int length, UINT8 *bytes)
static const struct CassetteLegacyWaveFiller zx80_legacy_fill_wave =
{
- zx80_cassette_fill_wave, /* fill_wave */
- -1, /* chunk_size */
- 0, /* chunk_samples */
- zx80_cassette_calculate_size_in_samples, /* chunk_sample_calc */
- ZX81_WAV_FREQUENCY, /* sample_frequency */
- 0, /* header_samples */
- 0 /* trailer_samples */
+ zx80_cassette_fill_wave, /* fill_wave */
+ -1, /* chunk_size */
+ 0, /* chunk_samples */
+ zx80_cassette_calculate_size_in_samples, /* chunk_sample_calc */
+ ZX81_WAV_FREQUENCY, /* sample_frequency */
+ 0, /* header_samples */
+ 0 /* trailer_samples */
};
static casserr_t zx80_o_identify(cassette_image *cassette, struct CassetteOptions *opts)
diff --git a/src/lib/lib.mak b/src/lib/lib.mak
index e7da9a7738f..050bd5e8c94 100644
--- a/src/lib/lib.mak
+++ b/src/lib/lib.mak
@@ -87,110 +87,110 @@ $(LIBOBJ)/expat/%.o: $(LIBSRC)/expat/%.c | $(OSPREBUILD)
#-------------------------------------------------
FORMATSOBJS = \
- $(LIBOBJ)/formats/cassimg.o \
- $(LIBOBJ)/formats/flopimg.o \
- $(LIBOBJ)/formats/imageutl.o \
- $(LIBOBJ)/formats/ioprocs.o \
- $(LIBOBJ)/formats/basicdsk.o \
- $(LIBOBJ)/formats/a26_cas.o \
- $(LIBOBJ)/formats/a5105_dsk.o \
- $(LIBOBJ)/formats/ace_tap.o \
- $(LIBOBJ)/formats/adam_cas.o \
- $(LIBOBJ)/formats/adam_dsk.o \
- $(LIBOBJ)/formats/ami_dsk.o \
- $(LIBOBJ)/formats/ap2_dsk.o \
- $(LIBOBJ)/formats/apf_apt.o \
- $(LIBOBJ)/formats/apridisk.o \
- $(LIBOBJ)/formats/apollo_dsk.o \
- $(LIBOBJ)/formats/ap_dsk35.o \
- $(LIBOBJ)/formats/atari_dsk.o \
- $(LIBOBJ)/formats/atarist_dsk.o \
- $(LIBOBJ)/formats/atom_tap.o \
- $(LIBOBJ)/formats/bw2_dsk.o \
- $(LIBOBJ)/formats/bw12_dsk.o \
- $(LIBOBJ)/formats/cbm_tap.o \
- $(LIBOBJ)/formats/cgen_cas.o \
- $(LIBOBJ)/formats/coco_cas.o \
- $(LIBOBJ)/formats/coco_dsk.o \
- $(LIBOBJ)/formats/comx35_dsk.o \
- $(LIBOBJ)/formats/coupedsk.o \
- $(LIBOBJ)/formats/cpis_dsk.o \
- $(LIBOBJ)/formats/cqm_dsk.o \
- $(LIBOBJ)/formats/csw_cas.o \
- $(LIBOBJ)/formats/d64_dsk.o \
- $(LIBOBJ)/formats/d81_dsk.o \
- $(LIBOBJ)/formats/d88_dsk.o \
- $(LIBOBJ)/formats/dfi_dsk.o \
- $(LIBOBJ)/formats/dim_dsk.o \
- $(LIBOBJ)/formats/dsk_dsk.o \
- $(LIBOBJ)/formats/esq8_dsk.o \
- $(LIBOBJ)/formats/esq16_dsk.o \
- $(LIBOBJ)/formats/fdi_dsk.o \
- $(LIBOBJ)/formats/fm7_cas.o \
- $(LIBOBJ)/formats/fmsx_cas.o \
- $(LIBOBJ)/formats/g64_dsk.o \
- $(LIBOBJ)/formats/gtp_cas.o \
- $(LIBOBJ)/formats/hect_dsk.o \
- $(LIBOBJ)/formats/hect_tap.o \
- $(LIBOBJ)/formats/iq151_dsk.o \
- $(LIBOBJ)/formats/imd_dsk.o \
- $(LIBOBJ)/formats/ipf_dsk.o \
- $(LIBOBJ)/formats/kc_cas.o \
- $(LIBOBJ)/formats/kc85_dsk.o \
- $(LIBOBJ)/formats/kim1_cas.o \
- $(LIBOBJ)/formats/lviv_lvt.o \
- $(LIBOBJ)/formats/m20_dsk.o \
- $(LIBOBJ)/formats/m5_dsk.o \
- $(LIBOBJ)/formats/mm_dsk.o \
- $(LIBOBJ)/formats/msx_dsk.o \
- $(LIBOBJ)/formats/mfi_dsk.o \
- $(LIBOBJ)/formats/mz_cas.o \
- $(LIBOBJ)/formats/nanos_dsk.o \
- $(LIBOBJ)/formats/nes_dsk.o \
- $(LIBOBJ)/formats/orao_cas.o \
- $(LIBOBJ)/formats/oric_dsk.o \
- $(LIBOBJ)/formats/oric_tap.o \
- $(LIBOBJ)/formats/p6001_cas.o \
- $(LIBOBJ)/formats/pasti_dsk.o \
- $(LIBOBJ)/formats/pc_dsk.o \
- $(LIBOBJ)/formats/pc98fdi_dsk.o \
- $(LIBOBJ)/formats/pmd_cas.o \
- $(LIBOBJ)/formats/primoptp.o \
- $(LIBOBJ)/formats/pyldin_dsk.o \
- $(LIBOBJ)/formats/rk_cas.o \
- $(LIBOBJ)/formats/sc3000_bit.o \
- $(LIBOBJ)/formats/sf7000_dsk.o \
- $(LIBOBJ)/formats/smx_dsk.o \
- $(LIBOBJ)/formats/sorc_dsk.o \
- $(LIBOBJ)/formats/sord_cas.o \
- $(LIBOBJ)/formats/st_dsk.o \
- $(LIBOBJ)/formats/svi_cas.o \
- $(LIBOBJ)/formats/svi_dsk.o \
- $(LIBOBJ)/formats/td0_dsk.o \
- $(LIBOBJ)/formats/thom_cas.o \
- $(LIBOBJ)/formats/thom_dsk.o \
- $(LIBOBJ)/formats/ti99_dsk.o \
- $(LIBOBJ)/formats/tiki100_dsk.o \
- $(LIBOBJ)/formats/trd_dsk.o \
- $(LIBOBJ)/formats/trs_cas.o \
- $(LIBOBJ)/formats/trs_dsk.o \
- $(LIBOBJ)/formats/tvc_cas.o \
- $(LIBOBJ)/formats/tvc_dsk.o \
- $(LIBOBJ)/formats/tzx_cas.o \
- $(LIBOBJ)/formats/uef_cas.o \
- $(LIBOBJ)/formats/upd765_dsk.o \
- $(LIBOBJ)/formats/vg5k_cas.o \
- $(LIBOBJ)/formats/vt_cas.o \
- $(LIBOBJ)/formats/vt_dsk.o \
- $(LIBOBJ)/formats/vtech1_dsk.o \
- $(LIBOBJ)/formats/wavfile.o \
- $(LIBOBJ)/formats/wd177x_dsk.o \
- $(LIBOBJ)/formats/x07_cas.o \
- $(LIBOBJ)/formats/x1_tap.o \
- $(LIBOBJ)/formats/xdf_dsk.o \
- $(LIBOBJ)/formats/z80ne_dsk.o \
- $(LIBOBJ)/formats/zx81_p.o \
- $(LIBOBJ)/formats/hxcmfm_dsk.o \
+ $(LIBOBJ)/formats/cassimg.o \
+ $(LIBOBJ)/formats/flopimg.o \
+ $(LIBOBJ)/formats/imageutl.o \
+ $(LIBOBJ)/formats/ioprocs.o \
+ $(LIBOBJ)/formats/basicdsk.o \
+ $(LIBOBJ)/formats/a26_cas.o \
+ $(LIBOBJ)/formats/a5105_dsk.o \
+ $(LIBOBJ)/formats/ace_tap.o \
+ $(LIBOBJ)/formats/adam_cas.o \
+ $(LIBOBJ)/formats/adam_dsk.o \
+ $(LIBOBJ)/formats/ami_dsk.o \
+ $(LIBOBJ)/formats/ap2_dsk.o \
+ $(LIBOBJ)/formats/apf_apt.o \
+ $(LIBOBJ)/formats/apridisk.o \
+ $(LIBOBJ)/formats/apollo_dsk.o \
+ $(LIBOBJ)/formats/ap_dsk35.o \
+ $(LIBOBJ)/formats/atari_dsk.o \
+ $(LIBOBJ)/formats/atarist_dsk.o \
+ $(LIBOBJ)/formats/atom_tap.o \
+ $(LIBOBJ)/formats/bw2_dsk.o \
+ $(LIBOBJ)/formats/bw12_dsk.o \
+ $(LIBOBJ)/formats/cbm_tap.o \
+ $(LIBOBJ)/formats/cgen_cas.o \
+ $(LIBOBJ)/formats/coco_cas.o \
+ $(LIBOBJ)/formats/coco_dsk.o \
+ $(LIBOBJ)/formats/comx35_dsk.o \
+ $(LIBOBJ)/formats/coupedsk.o \
+ $(LIBOBJ)/formats/cpis_dsk.o \
+ $(LIBOBJ)/formats/cqm_dsk.o \
+ $(LIBOBJ)/formats/csw_cas.o \
+ $(LIBOBJ)/formats/d64_dsk.o \
+ $(LIBOBJ)/formats/d81_dsk.o \
+ $(LIBOBJ)/formats/d88_dsk.o \
+ $(LIBOBJ)/formats/dfi_dsk.o \
+ $(LIBOBJ)/formats/dim_dsk.o \
+ $(LIBOBJ)/formats/dsk_dsk.o \
+ $(LIBOBJ)/formats/esq8_dsk.o \
+ $(LIBOBJ)/formats/esq16_dsk.o \
+ $(LIBOBJ)/formats/fdi_dsk.o \
+ $(LIBOBJ)/formats/fm7_cas.o \
+ $(LIBOBJ)/formats/fmsx_cas.o \
+ $(LIBOBJ)/formats/g64_dsk.o \
+ $(LIBOBJ)/formats/gtp_cas.o \
+ $(LIBOBJ)/formats/hect_dsk.o \
+ $(LIBOBJ)/formats/hect_tap.o \
+ $(LIBOBJ)/formats/iq151_dsk.o \
+ $(LIBOBJ)/formats/imd_dsk.o \
+ $(LIBOBJ)/formats/ipf_dsk.o \
+ $(LIBOBJ)/formats/kc_cas.o \
+ $(LIBOBJ)/formats/kc85_dsk.o \
+ $(LIBOBJ)/formats/kim1_cas.o \
+ $(LIBOBJ)/formats/lviv_lvt.o \
+ $(LIBOBJ)/formats/m20_dsk.o \
+ $(LIBOBJ)/formats/m5_dsk.o \
+ $(LIBOBJ)/formats/mm_dsk.o \
+ $(LIBOBJ)/formats/msx_dsk.o \
+ $(LIBOBJ)/formats/mfi_dsk.o \
+ $(LIBOBJ)/formats/mz_cas.o \
+ $(LIBOBJ)/formats/nanos_dsk.o \
+ $(LIBOBJ)/formats/nes_dsk.o \
+ $(LIBOBJ)/formats/orao_cas.o \
+ $(LIBOBJ)/formats/oric_dsk.o \
+ $(LIBOBJ)/formats/oric_tap.o \
+ $(LIBOBJ)/formats/p6001_cas.o \
+ $(LIBOBJ)/formats/pasti_dsk.o \
+ $(LIBOBJ)/formats/pc_dsk.o \
+ $(LIBOBJ)/formats/pc98fdi_dsk.o \
+ $(LIBOBJ)/formats/pmd_cas.o \
+ $(LIBOBJ)/formats/primoptp.o \
+ $(LIBOBJ)/formats/pyldin_dsk.o \
+ $(LIBOBJ)/formats/rk_cas.o \
+ $(LIBOBJ)/formats/sc3000_bit.o \
+ $(LIBOBJ)/formats/sf7000_dsk.o \
+ $(LIBOBJ)/formats/smx_dsk.o \
+ $(LIBOBJ)/formats/sorc_dsk.o \
+ $(LIBOBJ)/formats/sord_cas.o \
+ $(LIBOBJ)/formats/st_dsk.o \
+ $(LIBOBJ)/formats/svi_cas.o \
+ $(LIBOBJ)/formats/svi_dsk.o \
+ $(LIBOBJ)/formats/td0_dsk.o \
+ $(LIBOBJ)/formats/thom_cas.o \
+ $(LIBOBJ)/formats/thom_dsk.o \
+ $(LIBOBJ)/formats/ti99_dsk.o \
+ $(LIBOBJ)/formats/tiki100_dsk.o \
+ $(LIBOBJ)/formats/trd_dsk.o \
+ $(LIBOBJ)/formats/trs_cas.o \
+ $(LIBOBJ)/formats/trs_dsk.o \
+ $(LIBOBJ)/formats/tvc_cas.o \
+ $(LIBOBJ)/formats/tvc_dsk.o \
+ $(LIBOBJ)/formats/tzx_cas.o \
+ $(LIBOBJ)/formats/uef_cas.o \
+ $(LIBOBJ)/formats/upd765_dsk.o \
+ $(LIBOBJ)/formats/vg5k_cas.o \
+ $(LIBOBJ)/formats/vt_cas.o \
+ $(LIBOBJ)/formats/vt_dsk.o \
+ $(LIBOBJ)/formats/vtech1_dsk.o \
+ $(LIBOBJ)/formats/wavfile.o \
+ $(LIBOBJ)/formats/wd177x_dsk.o \
+ $(LIBOBJ)/formats/x07_cas.o \
+ $(LIBOBJ)/formats/x1_tap.o \
+ $(LIBOBJ)/formats/xdf_dsk.o \
+ $(LIBOBJ)/formats/z80ne_dsk.o \
+ $(LIBOBJ)/formats/zx81_p.o \
+ $(LIBOBJ)/formats/hxcmfm_dsk.o \
$(OBJ)/libformats.a: $(FORMATSOBJS)
@@ -232,8 +232,8 @@ SOFTFLOAT_MACROS = $(LIBSRC)/softfloat/softfloat/bits64/softfloat-macros
SOFTFLOATOBJS = \
$(LIBOBJ)/softfloat/softfloat.o \
- $(LIBOBJ)/softfloat/fsincos.o \
- $(LIBOBJ)/softfloat/fyl2x.o
+ $(LIBOBJ)/softfloat/fsincos.o \
+ $(LIBOBJ)/softfloat/fyl2x.o
$(OBJ)/libsoftfloat.a: $(SOFTFLOATOBJS)
@@ -379,7 +379,7 @@ $(LIBOBJ)/lib7z/%.o: $(LIBSRC)/lib7z/%.c | $(OSPREBUILD)
# portmidi library objects
#-------------------------------------------------
-PMOPTS =
+PMOPTS =
# common objects
LIBPMOBJS = \
diff --git a/src/lib/lib7z/7z.h b/src/lib/lib7z/7z.h
index 91c8b3ff021..e3a8e57dcac 100644
--- a/src/lib/lib7z/7z.h
+++ b/src/lib/lib7z/7z.h
@@ -15,40 +15,40 @@ extern Byte k7zSignature[k7zSignatureSize];
enum EIdEnum
{
- k7zIdEnd,
- k7zIdHeader,
- k7zIdArchiveProperties,
- k7zIdAdditionalStreamsInfo,
- k7zIdMainStreamsInfo,
- k7zIdFilesInfo,
- k7zIdPackInfo,
- k7zIdUnpackInfo,
- k7zIdSubStreamsInfo,
- k7zIdSize,
- k7zIdCRC,
- k7zIdFolder,
- k7zIdCodersUnpackSize,
- k7zIdNumUnpackStream,
- k7zIdEmptyStream,
- k7zIdEmptyFile,
- k7zIdAnti,
- k7zIdName,
- k7zIdCTime,
- k7zIdATime,
- k7zIdMTime,
- k7zIdWinAttributes,
- k7zIdComment,
- k7zIdEncodedHeader,
- k7zIdStartPos,
- k7zIdDummy
+ k7zIdEnd,
+ k7zIdHeader,
+ k7zIdArchiveProperties,
+ k7zIdAdditionalStreamsInfo,
+ k7zIdMainStreamsInfo,
+ k7zIdFilesInfo,
+ k7zIdPackInfo,
+ k7zIdUnpackInfo,
+ k7zIdSubStreamsInfo,
+ k7zIdSize,
+ k7zIdCRC,
+ k7zIdFolder,
+ k7zIdCodersUnpackSize,
+ k7zIdNumUnpackStream,
+ k7zIdEmptyStream,
+ k7zIdEmptyFile,
+ k7zIdAnti,
+ k7zIdName,
+ k7zIdCTime,
+ k7zIdATime,
+ k7zIdMTime,
+ k7zIdWinAttributes,
+ k7zIdComment,
+ k7zIdEncodedHeader,
+ k7zIdStartPos,
+ k7zIdDummy
};
typedef struct
{
- UInt32 NumInStreams;
- UInt32 NumOutStreams;
- UInt64 MethodID;
- CBuf Props;
+ UInt32 NumInStreams;
+ UInt32 NumOutStreams;
+ UInt64 MethodID;
+ CBuf Props;
} CSzCoderInfo;
void SzCoderInfo_Init(CSzCoderInfo *p);
@@ -56,23 +56,23 @@ void SzCoderInfo_Free(CSzCoderInfo *p, ISzAlloc *alloc);
typedef struct
{
- UInt32 InIndex;
- UInt32 OutIndex;
+ UInt32 InIndex;
+ UInt32 OutIndex;
} CSzBindPair;
typedef struct
{
- CSzCoderInfo *Coders;
- CSzBindPair *BindPairs;
- UInt32 *PackStreams;
- UInt64 *UnpackSizes;
- UInt32 NumCoders;
- UInt32 NumBindPairs;
- UInt32 NumPackStreams;
- int UnpackCRCDefined;
- UInt32 UnpackCRC;
-
- UInt32 NumUnpackStreams;
+ CSzCoderInfo *Coders;
+ CSzBindPair *BindPairs;
+ UInt32 *PackStreams;
+ UInt64 *UnpackSizes;
+ UInt32 NumCoders;
+ UInt32 NumBindPairs;
+ UInt32 NumPackStreams;
+ int UnpackCRCDefined;
+ UInt32 UnpackCRC;
+
+ UInt32 NumUnpackStreams;
} CSzFolder;
void SzFolder_Init(CSzFolder *p);
@@ -82,41 +82,41 @@ UInt32 SzFolder_GetNumOutStreams(CSzFolder *p);
UInt64 SzFolder_GetUnpackSize(CSzFolder *p);
SRes SzFolder_Decode(const CSzFolder *folder, const UInt64 *packSizes,
- ILookInStream *stream, UInt64 startPos,
- Byte *outBuffer, size_t outSize, ISzAlloc *allocMain);
+ ILookInStream *stream, UInt64 startPos,
+ Byte *outBuffer, size_t outSize, ISzAlloc *allocMain);
typedef struct
{
- UInt32 Low;
- UInt32 High;
+ UInt32 Low;
+ UInt32 High;
} CNtfsFileTime;
typedef struct
{
- CNtfsFileTime MTime;
- UInt64 Size;
- UInt32 Crc;
- UInt32 Attrib;
- Byte HasStream;
- Byte IsDir;
- Byte IsAnti;
- Byte CrcDefined;
- Byte MTimeDefined;
- Byte AttribDefined;
+ CNtfsFileTime MTime;
+ UInt64 Size;
+ UInt32 Crc;
+ UInt32 Attrib;
+ Byte HasStream;
+ Byte IsDir;
+ Byte IsAnti;
+ Byte CrcDefined;
+ Byte MTimeDefined;
+ Byte AttribDefined;
} CSzFileItem;
void SzFile_Init(CSzFileItem *p);
typedef struct
{
- UInt64 *PackSizes;
- Byte *PackCRCsDefined;
- UInt32 *PackCRCs;
- CSzFolder *Folders;
- CSzFileItem *Files;
- UInt32 NumPackStreams;
- UInt32 NumFolders;
- UInt32 NumFiles;
+ UInt64 *PackSizes;
+ Byte *PackCRCsDefined;
+ UInt32 *PackCRCs;
+ CSzFolder *Folders;
+ CSzFileItem *Files;
+ UInt32 NumPackStreams;
+ UInt32 NumFolders;
+ UInt32 NumFiles;
} CSzAr;
void SzAr_Init(CSzAr *p);
@@ -145,18 +145,18 @@ void SzAr_Free(CSzAr *p, ISzAlloc *alloc);
typedef struct
{
- CSzAr db;
+ CSzAr db;
- UInt64 startPosAfterHeader;
- UInt64 dataPos;
+ UInt64 startPosAfterHeader;
+ UInt64 dataPos;
- UInt32 *FolderStartPackStreamIndex;
- UInt64 *PackStreamStartPositions;
- UInt32 *FolderStartFileIndex;
- UInt32 *FileIndexToFolderIndexMap;
+ UInt32 *FolderStartPackStreamIndex;
+ UInt64 *PackStreamStartPositions;
+ UInt32 *FolderStartFileIndex;
+ UInt32 *FileIndexToFolderIndexMap;
- size_t *FileNameOffsets; /* in 2-byte steps */
- CBuf FileNames; /* UTF-16-LE */
+ size_t *FileNameOffsets; /* in 2-byte steps */
+ CBuf FileNames; /* UTF-16-LE */
} CSzArEx;
void SzArEx_Init(CSzArEx *p);
@@ -173,16 +173,16 @@ if dest != NULL, the return value specifies the number of 16-bit characters that
size_t SzArEx_GetFileNameUtf16(const CSzArEx *p, size_t fileIndex, UInt16 *dest);
SRes SzArEx_Extract(
- const CSzArEx *db,
- ILookInStream *inStream,
- UInt32 fileIndex, /* index of file */
- UInt32 *blockIndex, /* index of solid block */
- Byte **outBuffer, /* pointer to pointer to output buffer (allocated with allocMain) */
- size_t *outBufferSize, /* buffer size for output buffer */
- size_t *offset, /* offset of stream for required file in *outBuffer */
- size_t *outSizeProcessed, /* size of file in *outBuffer */
- ISzAlloc *allocMain,
- ISzAlloc *allocTemp);
+ const CSzArEx *db,
+ ILookInStream *inStream,
+ UInt32 fileIndex, /* index of file */
+ UInt32 *blockIndex, /* index of solid block */
+ Byte **outBuffer, /* pointer to pointer to output buffer (allocated with allocMain) */
+ size_t *outBufferSize, /* buffer size for output buffer */
+ size_t *offset, /* offset of stream for required file in *outBuffer */
+ size_t *outSizeProcessed, /* size of file in *outBuffer */
+ ISzAlloc *allocMain,
+ ISzAlloc *allocTemp);
/*
diff --git a/src/lib/lib7z/7zBuf.c b/src/lib/lib7z/7zBuf.c
index 14e7f4e2b92..76623d50f36 100644
--- a/src/lib/lib7z/7zBuf.c
+++ b/src/lib/lib7z/7zBuf.c
@@ -7,30 +7,30 @@ Public domain */
void Buf_Init(CBuf *p)
{
- p->data = 0;
- p->size = 0;
+ p->data = 0;
+ p->size = 0;
}
int Buf_Create(CBuf *p, size_t size, ISzAlloc *alloc)
{
- p->size = 0;
- if (size == 0)
- {
- p->data = 0;
- return 1;
- }
- p->data = (Byte *)alloc->Alloc(alloc, size);
- if (p->data != 0)
- {
- p->size = size;
- return 1;
- }
- return 0;
+ p->size = 0;
+ if (size == 0)
+ {
+ p->data = 0;
+ return 1;
+ }
+ p->data = (Byte *)alloc->Alloc(alloc, size);
+ if (p->data != 0)
+ {
+ p->size = size;
+ return 1;
+ }
+ return 0;
}
void Buf_Free(CBuf *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->data);
- p->data = 0;
- p->size = 0;
+ alloc->Free(alloc, p->data);
+ p->data = 0;
+ p->size = 0;
}
diff --git a/src/lib/lib7z/7zBuf.h b/src/lib/lib7z/7zBuf.h
index e9f2f316d0d..2d2aa71b649 100644
--- a/src/lib/lib7z/7zBuf.h
+++ b/src/lib/lib7z/7zBuf.h
@@ -12,8 +12,8 @@ extern "C" {
typedef struct
{
- Byte *data;
- size_t size;
+ Byte *data;
+ size_t size;
} CBuf;
void Buf_Init(CBuf *p);
@@ -22,9 +22,9 @@ void Buf_Free(CBuf *p, ISzAlloc *alloc);
typedef struct
{
- Byte *data;
- size_t size;
- size_t pos;
+ Byte *data;
+ size_t size;
+ size_t pos;
} CDynBuf;
void DynBuf_Construct(CDynBuf *p);
diff --git a/src/lib/lib7z/7zBuf2.c b/src/lib/lib7z/7zBuf2.c
index 8d17e0dcf80..f69cd442010 100644
--- a/src/lib/lib7z/7zBuf2.c
+++ b/src/lib/lib7z/7zBuf2.c
@@ -6,40 +6,40 @@
void DynBuf_Construct(CDynBuf *p)
{
- p->data = 0;
- p->size = 0;
- p->pos = 0;
+ p->data = 0;
+ p->size = 0;
+ p->pos = 0;
}
void DynBuf_SeekToBeg(CDynBuf *p)
{
- p->pos = 0;
+ p->pos = 0;
}
int DynBuf_Write(CDynBuf *p, const Byte *buf, size_t size, ISzAlloc *alloc)
{
- if (size > p->size - p->pos)
- {
- size_t newSize = p->pos + size;
- Byte *data;
- newSize += newSize / 4;
- data = (Byte *)alloc->Alloc(alloc, newSize);
- if (data == 0)
- return 0;
- p->size = newSize;
- memcpy(data, p->data, p->pos);
- alloc->Free(alloc, p->data);
- p->data = data;
- }
- memcpy(p->data + p->pos, buf, size);
- p->pos += size;
- return 1;
+ if (size > p->size - p->pos)
+ {
+ size_t newSize = p->pos + size;
+ Byte *data;
+ newSize += newSize / 4;
+ data = (Byte *)alloc->Alloc(alloc, newSize);
+ if (data == 0)
+ return 0;
+ p->size = newSize;
+ memcpy(data, p->data, p->pos);
+ alloc->Free(alloc, p->data);
+ p->data = data;
+ }
+ memcpy(p->data + p->pos, buf, size);
+ p->pos += size;
+ return 1;
}
void DynBuf_Free(CDynBuf *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->data);
- p->data = 0;
- p->size = 0;
- p->pos = 0;
+ alloc->Free(alloc, p->data);
+ p->data = 0;
+ p->size = 0;
+ p->pos = 0;
}
diff --git a/src/lib/lib7z/7zCrc.c b/src/lib/lib7z/7zCrc.c
index 1b948de0ec8..aa3bfad1634 100644
--- a/src/lib/lib7z/7zCrc.c
+++ b/src/lib/lib7z/7zCrc.c
@@ -7,15 +7,15 @@
#define kCrcPoly 0xEDB88320
#if defined(MY_CPU_LE)
- #define CRC_NUM_TABLES 4
+ #define CRC_NUM_TABLES 4
#else
- #define CRC_NUM_TABLES 5
- #define CRC_UINT32_SWAP(v) ((v >> 24) | ((v >> 8) & 0xFF00) | ((v << 8) & 0xFF0000) | (v << 24))
- UInt32 MY_FAST_CALL CrcUpdateT1_BeT4(UInt32 v, const void *data, size_t size, const UInt32 *table);
+ #define CRC_NUM_TABLES 5
+ #define CRC_UINT32_SWAP(v) ((v >> 24) | ((v >> 8) & 0xFF00) | ((v << 8) & 0xFF0000) | (v << 24))
+ UInt32 MY_FAST_CALL CrcUpdateT1_BeT4(UInt32 v, const void *data, size_t size, const UInt32 *table);
#endif
#ifndef MY_CPU_BE
- UInt32 MY_FAST_CALL CrcUpdateT4(UInt32 v, const void *data, size_t size, const UInt32 *table);
+ UInt32 MY_FAST_CALL CrcUpdateT4(UInt32 v, const void *data, size_t size, const UInt32 *table);
#endif
typedef UInt32 (MY_FAST_CALL *CRC_FUNC)(UInt32 v, const void *data, size_t size, const UInt32 *table);
@@ -25,56 +25,56 @@ UInt32 g_CrcTable[256 * CRC_NUM_TABLES];
UInt32 MY_FAST_CALL CrcUpdate(UInt32 v, const void *data, size_t size)
{
- return g_CrcUpdate(v, data, size, g_CrcTable);
+ return g_CrcUpdate(v, data, size, g_CrcTable);
}
UInt32 MY_FAST_CALL CrcCalc(const void *data, size_t size)
{
- return g_CrcUpdate(CRC_INIT_VAL, data, size, g_CrcTable) ^ CRC_INIT_VAL;
+ return g_CrcUpdate(CRC_INIT_VAL, data, size, g_CrcTable) ^ CRC_INIT_VAL;
}
void MY_FAST_CALL CrcGenerateTable()
{
- UInt32 i;
- for (i = 0; i < 256; i++)
- {
- UInt32 r = i;
- unsigned j;
- for (j = 0; j < 8; j++)
- r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1));
- g_CrcTable[i] = r;
- }
- for (; i < 256 * CRC_NUM_TABLES; i++)
- {
- UInt32 r = g_CrcTable[i - 256];
- g_CrcTable[i] = g_CrcTable[r & 0xFF] ^ (r >> 8);
- }
+ UInt32 i;
+ for (i = 0; i < 256; i++)
+ {
+ UInt32 r = i;
+ unsigned j;
+ for (j = 0; j < 8; j++)
+ r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1));
+ g_CrcTable[i] = r;
+ }
+ for (; i < 256 * CRC_NUM_TABLES; i++)
+ {
+ UInt32 r = g_CrcTable[i - 256];
+ g_CrcTable[i] = g_CrcTable[r & 0xFF] ^ (r >> 8);
+ }
- #ifdef MY_CPU_LE
+ #ifdef MY_CPU_LE
- g_CrcUpdate = CrcUpdateT4;
+ g_CrcUpdate = CrcUpdateT4;
- #if CRC_NUM_TABLES == 8
- if (!CPU_Is_InOrder())
- g_CrcUpdate = CrcUpdateT8;
- #endif
+ #if CRC_NUM_TABLES == 8
+ if (!CPU_Is_InOrder())
+ g_CrcUpdate = CrcUpdateT8;
+ #endif
- #else
- {
- #ifndef MY_CPU_BE
- UInt32 k = 1;
- if (*(const Byte *)&k == 1)
- g_CrcUpdate = CrcUpdateT4;
- else
- #endif
- {
- for (i = 256 * CRC_NUM_TABLES - 1; i >= 256; i--)
- {
- UInt32 x = g_CrcTable[i - 256];
- g_CrcTable[i] = CRC_UINT32_SWAP(x);
- }
- g_CrcUpdate = CrcUpdateT1_BeT4;
- }
- }
- #endif
+ #else
+ {
+ #ifndef MY_CPU_BE
+ UInt32 k = 1;
+ if (*(const Byte *)&k == 1)
+ g_CrcUpdate = CrcUpdateT4;
+ else
+ #endif
+ {
+ for (i = 256 * CRC_NUM_TABLES - 1; i >= 256; i--)
+ {
+ UInt32 x = g_CrcTable[i - 256];
+ g_CrcTable[i] = CRC_UINT32_SWAP(x);
+ }
+ g_CrcUpdate = CrcUpdateT1_BeT4;
+ }
+ }
+ #endif
}
diff --git a/src/lib/lib7z/7zCrcOpt.c b/src/lib/lib7z/7zCrcOpt.c
index a8d42a80074..db72778281b 100644
--- a/src/lib/lib7z/7zCrcOpt.c
+++ b/src/lib/lib7z/7zCrcOpt.c
@@ -9,26 +9,26 @@
UInt32 MY_FAST_CALL CrcUpdateT4(UInt32 v, const void *data, size_t size, const UInt32 *table)
{
- const Byte *p = (const Byte *)data;
- for (; size > 0 && ((unsigned)(ptrdiff_t)p & 3) != 0; size--, p++)
- v = CRC_UPDATE_BYTE_2(v, *p);
- for (; size >= 4; size -= 4, p += 4)
- {
- v ^= *(const UInt32 *)p;
- v =
- table[0x300 + (v & 0xFF)] ^
- table[0x200 + ((v >> 8) & 0xFF)] ^
- table[0x100 + ((v >> 16) & 0xFF)] ^
- table[0x000 + ((v >> 24))];
- }
- for (; size > 0; size--, p++)
- v = CRC_UPDATE_BYTE_2(v, *p);
- return v;
+ const Byte *p = (const Byte *)data;
+ for (; size > 0 && ((unsigned)(ptrdiff_t)p & 3) != 0; size--, p++)
+ v = CRC_UPDATE_BYTE_2(v, *p);
+ for (; size >= 4; size -= 4, p += 4)
+ {
+ v ^= *(const UInt32 *)p;
+ v =
+ table[0x300 + (v & 0xFF)] ^
+ table[0x200 + ((v >> 8) & 0xFF)] ^
+ table[0x100 + ((v >> 16) & 0xFF)] ^
+ table[0x000 + ((v >> 24))];
+ }
+ for (; size > 0; size--, p++)
+ v = CRC_UPDATE_BYTE_2(v, *p);
+ return v;
}
UInt32 MY_FAST_CALL CrcUpdateT8(UInt32 v, const void *data, size_t size, const UInt32 *table)
{
- return CrcUpdateT4(v, data, size, table);
+ return CrcUpdateT4(v, data, size, table);
}
#endif
@@ -40,25 +40,25 @@ UInt32 MY_FAST_CALL CrcUpdateT8(UInt32 v, const void *data, size_t size, const U
UInt32 MY_FAST_CALL CrcUpdateT1_BeT4(UInt32 v, const void *data, size_t size, const UInt32 *table)
{
- const Byte *p = (const Byte *)data;
- for (; size > 0 && ((unsigned)(ptrdiff_t)p & 3) != 0; size--, p++)
- v = CRC_UPDATE_BYTE_2(v, *p);
- v = CRC_UINT32_SWAP(v);
- table += 0x100;
- for (; size >= 4; size -= 4, p += 4)
- {
- v ^= *(const UInt32 *)p;
- v =
- table[0x000 + (v & 0xFF)] ^
- table[0x100 + ((v >> 8) & 0xFF)] ^
- table[0x200 + ((v >> 16) & 0xFF)] ^
- table[0x300 + ((v >> 24))];
- }
- table -= 0x100;
- v = CRC_UINT32_SWAP(v);
- for (; size > 0; size--, p++)
- v = CRC_UPDATE_BYTE_2(v, *p);
- return v;
+ const Byte *p = (const Byte *)data;
+ for (; size > 0 && ((unsigned)(ptrdiff_t)p & 3) != 0; size--, p++)
+ v = CRC_UPDATE_BYTE_2(v, *p);
+ v = CRC_UINT32_SWAP(v);
+ table += 0x100;
+ for (; size >= 4; size -= 4, p += 4)
+ {
+ v ^= *(const UInt32 *)p;
+ v =
+ table[0x000 + (v & 0xFF)] ^
+ table[0x100 + ((v >> 8) & 0xFF)] ^
+ table[0x200 + ((v >> 16) & 0xFF)] ^
+ table[0x300 + ((v >> 24))];
+ }
+ table -= 0x100;
+ v = CRC_UINT32_SWAP(v);
+ for (; size > 0; size--, p++)
+ v = CRC_UPDATE_BYTE_2(v, *p);
+ return v;
}
#endif
diff --git a/src/lib/lib7z/7zDec.c b/src/lib/lib7z/7zDec.c
index b6d809956cd..3da63156e40 100644
--- a/src/lib/lib7z/7zDec.c
+++ b/src/lib/lib7z/7zDec.c
@@ -32,439 +32,439 @@
typedef struct
{
- IByteIn p;
- const Byte *cur;
- const Byte *end;
- const Byte *begin;
- UInt64 processed;
- Bool extra;
- SRes res;
- ILookInStream *inStream;
+ IByteIn p;
+ const Byte *cur;
+ const Byte *end;
+ const Byte *begin;
+ UInt64 processed;
+ Bool extra;
+ SRes res;
+ ILookInStream *inStream;
} CByteInToLook;
static Byte ReadByte(void *pp)
{
- CByteInToLook *p = (CByteInToLook *)pp;
- if (p->cur != p->end)
- return *p->cur++;
- if (p->res == SZ_OK)
- {
- size_t size = p->cur - p->begin;
- p->processed += size;
- p->res = p->inStream->Skip(p->inStream, size);
- size = (1 << 25);
- p->res = p->inStream->Look(p->inStream, (const void **)&p->begin, &size);
- p->cur = p->begin;
- p->end = p->begin + size;
- if (size != 0)
- return *p->cur++;;
- }
- p->extra = True;
- return 0;
+ CByteInToLook *p = (CByteInToLook *)pp;
+ if (p->cur != p->end)
+ return *p->cur++;
+ if (p->res == SZ_OK)
+ {
+ size_t size = p->cur - p->begin;
+ p->processed += size;
+ p->res = p->inStream->Skip(p->inStream, size);
+ size = (1 << 25);
+ p->res = p->inStream->Look(p->inStream, (const void **)&p->begin, &size);
+ p->cur = p->begin;
+ p->end = p->begin + size;
+ if (size != 0)
+ return *p->cur++;;
+ }
+ p->extra = True;
+ return 0;
}
static SRes SzDecodePpmd(CSzCoderInfo *coder, UInt64 inSize, ILookInStream *inStream,
- Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain)
+ Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain)
{
- CPpmd7 ppmd;
- CByteInToLook s;
- SRes res = SZ_OK;
-
- s.p.Read = ReadByte;
- s.inStream = inStream;
- s.begin = s.end = s.cur = NULL;
- s.extra = False;
- s.res = SZ_OK;
- s.processed = 0;
-
- if (coder->Props.size != 5)
- return SZ_ERROR_UNSUPPORTED;
-
- {
- unsigned order = coder->Props.data[0];
- UInt32 memSize = GetUi32(coder->Props.data + 1);
- if (order < PPMD7_MIN_ORDER ||
- order > PPMD7_MAX_ORDER ||
- memSize < PPMD7_MIN_MEM_SIZE ||
- memSize > PPMD7_MAX_MEM_SIZE)
- return SZ_ERROR_UNSUPPORTED;
- Ppmd7_Construct(&ppmd);
- if (!Ppmd7_Alloc(&ppmd, memSize, allocMain))
- return SZ_ERROR_MEM;
- Ppmd7_Init(&ppmd, order);
- }
- {
- CPpmd7z_RangeDec rc;
- Ppmd7z_RangeDec_CreateVTable(&rc);
- rc.Stream = &s.p;
- if (!Ppmd7z_RangeDec_Init(&rc))
- res = SZ_ERROR_DATA;
- else if (s.extra)
- res = (s.res != SZ_OK ? s.res : SZ_ERROR_DATA);
- else
- {
- SizeT i;
- for (i = 0; i < outSize; i++)
- {
- int sym = Ppmd7_DecodeSymbol(&ppmd, &rc.p);
- if (s.extra || sym < 0)
- break;
- outBuffer[i] = (Byte)sym;
- }
- if (i != outSize)
- res = (s.res != SZ_OK ? s.res : SZ_ERROR_DATA);
- else if (s.processed + (s.cur - s.begin) != inSize || !Ppmd7z_RangeDec_IsFinishedOK(&rc))
- res = SZ_ERROR_DATA;
- }
- }
- Ppmd7_Free(&ppmd, allocMain);
- return res;
+ CPpmd7 ppmd;
+ CByteInToLook s;
+ SRes res = SZ_OK;
+
+ s.p.Read = ReadByte;
+ s.inStream = inStream;
+ s.begin = s.end = s.cur = NULL;
+ s.extra = False;
+ s.res = SZ_OK;
+ s.processed = 0;
+
+ if (coder->Props.size != 5)
+ return SZ_ERROR_UNSUPPORTED;
+
+ {
+ unsigned order = coder->Props.data[0];
+ UInt32 memSize = GetUi32(coder->Props.data + 1);
+ if (order < PPMD7_MIN_ORDER ||
+ order > PPMD7_MAX_ORDER ||
+ memSize < PPMD7_MIN_MEM_SIZE ||
+ memSize > PPMD7_MAX_MEM_SIZE)
+ return SZ_ERROR_UNSUPPORTED;
+ Ppmd7_Construct(&ppmd);
+ if (!Ppmd7_Alloc(&ppmd, memSize, allocMain))
+ return SZ_ERROR_MEM;
+ Ppmd7_Init(&ppmd, order);
+ }
+ {
+ CPpmd7z_RangeDec rc;
+ Ppmd7z_RangeDec_CreateVTable(&rc);
+ rc.Stream = &s.p;
+ if (!Ppmd7z_RangeDec_Init(&rc))
+ res = SZ_ERROR_DATA;
+ else if (s.extra)
+ res = (s.res != SZ_OK ? s.res : SZ_ERROR_DATA);
+ else
+ {
+ SizeT i;
+ for (i = 0; i < outSize; i++)
+ {
+ int sym = Ppmd7_DecodeSymbol(&ppmd, &rc.p);
+ if (s.extra || sym < 0)
+ break;
+ outBuffer[i] = (Byte)sym;
+ }
+ if (i != outSize)
+ res = (s.res != SZ_OK ? s.res : SZ_ERROR_DATA);
+ else if (s.processed + (s.cur - s.begin) != inSize || !Ppmd7z_RangeDec_IsFinishedOK(&rc))
+ res = SZ_ERROR_DATA;
+ }
+ }
+ Ppmd7_Free(&ppmd, allocMain);
+ return res;
}
#endif
static SRes SzDecodeLzma(CSzCoderInfo *coder, UInt64 inSize, ILookInStream *inStream,
- Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain)
+ Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain)
{
- CLzmaDec state;
- SRes res = SZ_OK;
-
- LzmaDec_Construct(&state);
- RINOK(LzmaDec_AllocateProbs(&state, coder->Props.data, (unsigned)coder->Props.size, allocMain));
- state.dic = outBuffer;
- state.dicBufSize = outSize;
- LzmaDec_Init(&state);
-
- for (;;)
- {
- Byte *inBuf = NULL;
- size_t lookahead = (1 << 18);
- if (lookahead > inSize)
- lookahead = (size_t)inSize;
- res = inStream->Look((void *)inStream, (const void **)&inBuf, &lookahead);
- if (res != SZ_OK)
- break;
-
- {
- SizeT inProcessed = (SizeT)lookahead, dicPos = state.dicPos;
- ELzmaStatus status;
- res = LzmaDec_DecodeToDic(&state, outSize, inBuf, &inProcessed, LZMA_FINISH_END, &status);
- lookahead -= inProcessed;
- inSize -= inProcessed;
- if (res != SZ_OK)
- break;
- if (state.dicPos == state.dicBufSize || (inProcessed == 0 && dicPos == state.dicPos))
- {
- if (state.dicBufSize != outSize || lookahead != 0 ||
- (status != LZMA_STATUS_FINISHED_WITH_MARK &&
- status != LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK))
- res = SZ_ERROR_DATA;
- break;
- }
- res = inStream->Skip((void *)inStream, inProcessed);
- if (res != SZ_OK)
- break;
- }
- }
-
- LzmaDec_FreeProbs(&state, allocMain);
- return res;
+ CLzmaDec state;
+ SRes res = SZ_OK;
+
+ LzmaDec_Construct(&state);
+ RINOK(LzmaDec_AllocateProbs(&state, coder->Props.data, (unsigned)coder->Props.size, allocMain));
+ state.dic = outBuffer;
+ state.dicBufSize = outSize;
+ LzmaDec_Init(&state);
+
+ for (;;)
+ {
+ Byte *inBuf = NULL;
+ size_t lookahead = (1 << 18);
+ if (lookahead > inSize)
+ lookahead = (size_t)inSize;
+ res = inStream->Look((void *)inStream, (const void **)&inBuf, &lookahead);
+ if (res != SZ_OK)
+ break;
+
+ {
+ SizeT inProcessed = (SizeT)lookahead, dicPos = state.dicPos;
+ ELzmaStatus status;
+ res = LzmaDec_DecodeToDic(&state, outSize, inBuf, &inProcessed, LZMA_FINISH_END, &status);
+ lookahead -= inProcessed;
+ inSize -= inProcessed;
+ if (res != SZ_OK)
+ break;
+ if (state.dicPos == state.dicBufSize || (inProcessed == 0 && dicPos == state.dicPos))
+ {
+ if (state.dicBufSize != outSize || lookahead != 0 ||
+ (status != LZMA_STATUS_FINISHED_WITH_MARK &&
+ status != LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK))
+ res = SZ_ERROR_DATA;
+ break;
+ }
+ res = inStream->Skip((void *)inStream, inProcessed);
+ if (res != SZ_OK)
+ break;
+ }
+ }
+
+ LzmaDec_FreeProbs(&state, allocMain);
+ return res;
}
static SRes SzDecodeLzma2(CSzCoderInfo *coder, UInt64 inSize, ILookInStream *inStream,
- Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain)
+ Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain)
{
- CLzma2Dec state;
- SRes res = SZ_OK;
-
- Lzma2Dec_Construct(&state);
- if (coder->Props.size != 1)
- return SZ_ERROR_DATA;
- RINOK(Lzma2Dec_AllocateProbs(&state, coder->Props.data[0], allocMain));
- state.decoder.dic = outBuffer;
- state.decoder.dicBufSize = outSize;
- Lzma2Dec_Init(&state);
-
- for (;;)
- {
- Byte *inBuf = NULL;
- size_t lookahead = (1 << 18);
- if (lookahead > inSize)
- lookahead = (size_t)inSize;
- res = inStream->Look((void *)inStream, (const void **)&inBuf, &lookahead);
- if (res != SZ_OK)
- break;
-
- {
- SizeT inProcessed = (SizeT)lookahead, dicPos = state.decoder.dicPos;
- ELzmaStatus status;
- res = Lzma2Dec_DecodeToDic(&state, outSize, inBuf, &inProcessed, LZMA_FINISH_END, &status);
- lookahead -= inProcessed;
- inSize -= inProcessed;
- if (res != SZ_OK)
- break;
- if (state.decoder.dicPos == state.decoder.dicBufSize || (inProcessed == 0 && dicPos == state.decoder.dicPos))
- {
- if (state.decoder.dicBufSize != outSize || lookahead != 0 ||
- (status != LZMA_STATUS_FINISHED_WITH_MARK))
- res = SZ_ERROR_DATA;
- break;
- }
- res = inStream->Skip((void *)inStream, inProcessed);
- if (res != SZ_OK)
- break;
- }
- }
-
- Lzma2Dec_FreeProbs(&state, allocMain);
- return res;
+ CLzma2Dec state;
+ SRes res = SZ_OK;
+
+ Lzma2Dec_Construct(&state);
+ if (coder->Props.size != 1)
+ return SZ_ERROR_DATA;
+ RINOK(Lzma2Dec_AllocateProbs(&state, coder->Props.data[0], allocMain));
+ state.decoder.dic = outBuffer;
+ state.decoder.dicBufSize = outSize;
+ Lzma2Dec_Init(&state);
+
+ for (;;)
+ {
+ Byte *inBuf = NULL;
+ size_t lookahead = (1 << 18);
+ if (lookahead > inSize)
+ lookahead = (size_t)inSize;
+ res = inStream->Look((void *)inStream, (const void **)&inBuf, &lookahead);
+ if (res != SZ_OK)
+ break;
+
+ {
+ SizeT inProcessed = (SizeT)lookahead, dicPos = state.decoder.dicPos;
+ ELzmaStatus status;
+ res = Lzma2Dec_DecodeToDic(&state, outSize, inBuf, &inProcessed, LZMA_FINISH_END, &status);
+ lookahead -= inProcessed;
+ inSize -= inProcessed;
+ if (res != SZ_OK)
+ break;
+ if (state.decoder.dicPos == state.decoder.dicBufSize || (inProcessed == 0 && dicPos == state.decoder.dicPos))
+ {
+ if (state.decoder.dicBufSize != outSize || lookahead != 0 ||
+ (status != LZMA_STATUS_FINISHED_WITH_MARK))
+ res = SZ_ERROR_DATA;
+ break;
+ }
+ res = inStream->Skip((void *)inStream, inProcessed);
+ if (res != SZ_OK)
+ break;
+ }
+ }
+
+ Lzma2Dec_FreeProbs(&state, allocMain);
+ return res;
}
static SRes SzDecodeCopy(UInt64 inSize, ILookInStream *inStream, Byte *outBuffer)
{
- while (inSize > 0)
- {
- void *inBuf;
- size_t curSize = (1 << 18);
- if (curSize > inSize)
- curSize = (size_t)inSize;
- RINOK(inStream->Look((void *)inStream, (const void **)&inBuf, &curSize));
- if (curSize == 0)
- return SZ_ERROR_INPUT_EOF;
- memcpy(outBuffer, inBuf, curSize);
- outBuffer += curSize;
- inSize -= curSize;
- RINOK(inStream->Skip((void *)inStream, curSize));
- }
- return SZ_OK;
+ while (inSize > 0)
+ {
+ void *inBuf;
+ size_t curSize = (1 << 18);
+ if (curSize > inSize)
+ curSize = (size_t)inSize;
+ RINOK(inStream->Look((void *)inStream, (const void **)&inBuf, &curSize));
+ if (curSize == 0)
+ return SZ_ERROR_INPUT_EOF;
+ memcpy(outBuffer, inBuf, curSize);
+ outBuffer += curSize;
+ inSize -= curSize;
+ RINOK(inStream->Skip((void *)inStream, curSize));
+ }
+ return SZ_OK;
}
static Bool IS_MAIN_METHOD(UInt32 m)
{
- switch(m)
- {
- case k_Copy:
- case k_LZMA:
- case k_LZMA2:
- #ifdef _7ZIP_PPMD_SUPPPORT
- case k_PPMD:
- #endif
- return True;
- }
- return False;
+ switch(m)
+ {
+ case k_Copy:
+ case k_LZMA:
+ case k_LZMA2:
+ #ifdef _7ZIP_PPMD_SUPPPORT
+ case k_PPMD:
+ #endif
+ return True;
+ }
+ return False;
}
static Bool IS_SUPPORTED_CODER(const CSzCoderInfo *c)
{
- return
- c->NumInStreams == 1 &&
- c->NumOutStreams == 1 &&
- c->MethodID <= (UInt32)0xFFFFFFFF &&
- IS_MAIN_METHOD((UInt32)c->MethodID);
+ return
+ c->NumInStreams == 1 &&
+ c->NumOutStreams == 1 &&
+ c->MethodID <= (UInt32)0xFFFFFFFF &&
+ IS_MAIN_METHOD((UInt32)c->MethodID);
}
#define IS_BCJ2(c) ((c)->MethodID == k_BCJ2 && (c)->NumInStreams == 4 && (c)->NumOutStreams == 1)
static SRes CheckSupportedFolder(const CSzFolder *f)
{
- if (f->NumCoders < 1 || f->NumCoders > 4)
- return SZ_ERROR_UNSUPPORTED;
- if (!IS_SUPPORTED_CODER(&f->Coders[0]))
- return SZ_ERROR_UNSUPPORTED;
- if (f->NumCoders == 1)
- {
- if (f->NumPackStreams != 1 || f->PackStreams[0] != 0 || f->NumBindPairs != 0)
- return SZ_ERROR_UNSUPPORTED;
- return SZ_OK;
- }
- if (f->NumCoders == 2)
- {
- CSzCoderInfo *c = &f->Coders[1];
- if (c->MethodID > (UInt32)0xFFFFFFFF ||
- c->NumInStreams != 1 ||
- c->NumOutStreams != 1 ||
- f->NumPackStreams != 1 ||
- f->PackStreams[0] != 0 ||
- f->NumBindPairs != 1 ||
- f->BindPairs[0].InIndex != 1 ||
- f->BindPairs[0].OutIndex != 0)
- return SZ_ERROR_UNSUPPORTED;
- switch ((UInt32)c->MethodID)
- {
- case k_BCJ:
- case k_ARM:
- break;
- default:
- return SZ_ERROR_UNSUPPORTED;
- }
- return SZ_OK;
- }
- if (f->NumCoders == 4)
- {
- if (!IS_SUPPORTED_CODER(&f->Coders[1]) ||
- !IS_SUPPORTED_CODER(&f->Coders[2]) ||
- !IS_BCJ2(&f->Coders[3]))
- return SZ_ERROR_UNSUPPORTED;
- if (f->NumPackStreams != 4 ||
- f->PackStreams[0] != 2 ||
- f->PackStreams[1] != 6 ||
- f->PackStreams[2] != 1 ||
- f->PackStreams[3] != 0 ||
- f->NumBindPairs != 3 ||
- f->BindPairs[0].InIndex != 5 || f->BindPairs[0].OutIndex != 0 ||
- f->BindPairs[1].InIndex != 4 || f->BindPairs[1].OutIndex != 1 ||
- f->BindPairs[2].InIndex != 3 || f->BindPairs[2].OutIndex != 2)
- return SZ_ERROR_UNSUPPORTED;
- return SZ_OK;
- }
- return SZ_ERROR_UNSUPPORTED;
+ if (f->NumCoders < 1 || f->NumCoders > 4)
+ return SZ_ERROR_UNSUPPORTED;
+ if (!IS_SUPPORTED_CODER(&f->Coders[0]))
+ return SZ_ERROR_UNSUPPORTED;
+ if (f->NumCoders == 1)
+ {
+ if (f->NumPackStreams != 1 || f->PackStreams[0] != 0 || f->NumBindPairs != 0)
+ return SZ_ERROR_UNSUPPORTED;
+ return SZ_OK;
+ }
+ if (f->NumCoders == 2)
+ {
+ CSzCoderInfo *c = &f->Coders[1];
+ if (c->MethodID > (UInt32)0xFFFFFFFF ||
+ c->NumInStreams != 1 ||
+ c->NumOutStreams != 1 ||
+ f->NumPackStreams != 1 ||
+ f->PackStreams[0] != 0 ||
+ f->NumBindPairs != 1 ||
+ f->BindPairs[0].InIndex != 1 ||
+ f->BindPairs[0].OutIndex != 0)
+ return SZ_ERROR_UNSUPPORTED;
+ switch ((UInt32)c->MethodID)
+ {
+ case k_BCJ:
+ case k_ARM:
+ break;
+ default:
+ return SZ_ERROR_UNSUPPORTED;
+ }
+ return SZ_OK;
+ }
+ if (f->NumCoders == 4)
+ {
+ if (!IS_SUPPORTED_CODER(&f->Coders[1]) ||
+ !IS_SUPPORTED_CODER(&f->Coders[2]) ||
+ !IS_BCJ2(&f->Coders[3]))
+ return SZ_ERROR_UNSUPPORTED;
+ if (f->NumPackStreams != 4 ||
+ f->PackStreams[0] != 2 ||
+ f->PackStreams[1] != 6 ||
+ f->PackStreams[2] != 1 ||
+ f->PackStreams[3] != 0 ||
+ f->NumBindPairs != 3 ||
+ f->BindPairs[0].InIndex != 5 || f->BindPairs[0].OutIndex != 0 ||
+ f->BindPairs[1].InIndex != 4 || f->BindPairs[1].OutIndex != 1 ||
+ f->BindPairs[2].InIndex != 3 || f->BindPairs[2].OutIndex != 2)
+ return SZ_ERROR_UNSUPPORTED;
+ return SZ_OK;
+ }
+ return SZ_ERROR_UNSUPPORTED;
}
static UInt64 GetSum(const UInt64 *values, UInt32 index)
{
- UInt64 sum = 0;
- UInt32 i;
- for (i = 0; i < index; i++)
- sum += values[i];
- return sum;
+ UInt64 sum = 0;
+ UInt32 i;
+ for (i = 0; i < index; i++)
+ sum += values[i];
+ return sum;
}
#define CASE_BRA_CONV(isa) case k_ ## isa: isa ## _Convert(outBuffer, outSize, 0, 0); break;
static SRes SzFolder_Decode2(const CSzFolder *folder, const UInt64 *packSizes,
- ILookInStream *inStream, UInt64 startPos,
- Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain,
- Byte *tempBuf[])
+ ILookInStream *inStream, UInt64 startPos,
+ Byte *outBuffer, SizeT outSize, ISzAlloc *allocMain,
+ Byte *tempBuf[])
{
- UInt32 ci;
- SizeT tempSizes[3] = { 0, 0, 0};
- SizeT tempSize3 = 0;
- Byte *tempBuf3 = 0;
-
- RINOK(CheckSupportedFolder(folder));
-
- for (ci = 0; ci < folder->NumCoders; ci++)
- {
- CSzCoderInfo *coder = &folder->Coders[ci];
-
- if (IS_MAIN_METHOD((UInt32)coder->MethodID))
- {
- UInt32 si = 0;
- UInt64 offset;
- UInt64 inSize;
- Byte *outBufCur = outBuffer;
- SizeT outSizeCur = outSize;
- if (folder->NumCoders == 4)
- {
- UInt32 indices[] = { 3, 2, 0 };
- UInt64 unpackSize = folder->UnpackSizes[ci];
- si = indices[ci];
- if (ci < 2)
- {
- Byte *temp;
- outSizeCur = (SizeT)unpackSize;
- if (outSizeCur != unpackSize)
- return SZ_ERROR_MEM;
- temp = (Byte *)IAlloc_Alloc(allocMain, outSizeCur);
- if (temp == 0 && outSizeCur != 0)
- return SZ_ERROR_MEM;
- outBufCur = tempBuf[1 - ci] = temp;
- tempSizes[1 - ci] = outSizeCur;
- }
- else if (ci == 2)
- {
- if (unpackSize > outSize) /* check it */
- return SZ_ERROR_PARAM;
- tempBuf3 = outBufCur = outBuffer + (outSize - (size_t)unpackSize);
- tempSize3 = outSizeCur = (SizeT)unpackSize;
- }
- else
- return SZ_ERROR_UNSUPPORTED;
- }
- offset = GetSum(packSizes, si);
- inSize = packSizes[si];
- RINOK(LookInStream_SeekTo(inStream, startPos + offset));
-
- if (coder->MethodID == k_Copy)
- {
- if (inSize != outSizeCur) /* check it */
- return SZ_ERROR_DATA;
- RINOK(SzDecodeCopy(inSize, inStream, outBufCur));
- }
- else if (coder->MethodID == k_LZMA)
- {
- RINOK(SzDecodeLzma(coder, inSize, inStream, outBufCur, outSizeCur, allocMain));
- }
- else if (coder->MethodID == k_LZMA2)
- {
- RINOK(SzDecodeLzma2(coder, inSize, inStream, outBufCur, outSizeCur, allocMain));
- }
- else
- {
- #ifdef _7ZIP_PPMD_SUPPPORT
- RINOK(SzDecodePpmd(coder, inSize, inStream, outBufCur, outSizeCur, allocMain));
- #else
- return SZ_ERROR_UNSUPPORTED;
- #endif
- }
- }
- else if (coder->MethodID == k_BCJ2)
- {
- UInt64 offset = GetSum(packSizes, 1);
- UInt64 s3Size = packSizes[1];
- SRes res;
- if (ci != 3)
- return SZ_ERROR_UNSUPPORTED;
- RINOK(LookInStream_SeekTo(inStream, startPos + offset));
- tempSizes[2] = (SizeT)s3Size;
- if (tempSizes[2] != s3Size)
- return SZ_ERROR_MEM;
- tempBuf[2] = (Byte *)IAlloc_Alloc(allocMain, tempSizes[2]);
- if (tempBuf[2] == 0 && tempSizes[2] != 0)
- return SZ_ERROR_MEM;
- res = SzDecodeCopy(s3Size, inStream, tempBuf[2]);
- RINOK(res)
-
- res = Bcj2_Decode(
- tempBuf3, tempSize3,
- tempBuf[0], tempSizes[0],
- tempBuf[1], tempSizes[1],
- tempBuf[2], tempSizes[2],
- outBuffer, outSize);
- RINOK(res)
- }
- else
- {
- if (ci != 1)
- return SZ_ERROR_UNSUPPORTED;
- switch(coder->MethodID)
- {
- case k_BCJ:
- {
- UInt32 state;
- x86_Convert_Init(state);
- x86_Convert(outBuffer, outSize, 0, &state, 0);
- break;
- }
- CASE_BRA_CONV(ARM)
- default:
- return SZ_ERROR_UNSUPPORTED;
- }
- }
- }
- return SZ_OK;
+ UInt32 ci;
+ SizeT tempSizes[3] = { 0, 0, 0};
+ SizeT tempSize3 = 0;
+ Byte *tempBuf3 = 0;
+
+ RINOK(CheckSupportedFolder(folder));
+
+ for (ci = 0; ci < folder->NumCoders; ci++)
+ {
+ CSzCoderInfo *coder = &folder->Coders[ci];
+
+ if (IS_MAIN_METHOD((UInt32)coder->MethodID))
+ {
+ UInt32 si = 0;
+ UInt64 offset;
+ UInt64 inSize;
+ Byte *outBufCur = outBuffer;
+ SizeT outSizeCur = outSize;
+ if (folder->NumCoders == 4)
+ {
+ UInt32 indices[] = { 3, 2, 0 };
+ UInt64 unpackSize = folder->UnpackSizes[ci];
+ si = indices[ci];
+ if (ci < 2)
+ {
+ Byte *temp;
+ outSizeCur = (SizeT)unpackSize;
+ if (outSizeCur != unpackSize)
+ return SZ_ERROR_MEM;
+ temp = (Byte *)IAlloc_Alloc(allocMain, outSizeCur);
+ if (temp == 0 && outSizeCur != 0)
+ return SZ_ERROR_MEM;
+ outBufCur = tempBuf[1 - ci] = temp;
+ tempSizes[1 - ci] = outSizeCur;
+ }
+ else if (ci == 2)
+ {
+ if (unpackSize > outSize) /* check it */
+ return SZ_ERROR_PARAM;
+ tempBuf3 = outBufCur = outBuffer + (outSize - (size_t)unpackSize);
+ tempSize3 = outSizeCur = (SizeT)unpackSize;
+ }
+ else
+ return SZ_ERROR_UNSUPPORTED;
+ }
+ offset = GetSum(packSizes, si);
+ inSize = packSizes[si];
+ RINOK(LookInStream_SeekTo(inStream, startPos + offset));
+
+ if (coder->MethodID == k_Copy)
+ {
+ if (inSize != outSizeCur) /* check it */
+ return SZ_ERROR_DATA;
+ RINOK(SzDecodeCopy(inSize, inStream, outBufCur));
+ }
+ else if (coder->MethodID == k_LZMA)
+ {
+ RINOK(SzDecodeLzma(coder, inSize, inStream, outBufCur, outSizeCur, allocMain));
+ }
+ else if (coder->MethodID == k_LZMA2)
+ {
+ RINOK(SzDecodeLzma2(coder, inSize, inStream, outBufCur, outSizeCur, allocMain));
+ }
+ else
+ {
+ #ifdef _7ZIP_PPMD_SUPPPORT
+ RINOK(SzDecodePpmd(coder, inSize, inStream, outBufCur, outSizeCur, allocMain));
+ #else
+ return SZ_ERROR_UNSUPPORTED;
+ #endif
+ }
+ }
+ else if (coder->MethodID == k_BCJ2)
+ {
+ UInt64 offset = GetSum(packSizes, 1);
+ UInt64 s3Size = packSizes[1];
+ SRes res;
+ if (ci != 3)
+ return SZ_ERROR_UNSUPPORTED;
+ RINOK(LookInStream_SeekTo(inStream, startPos + offset));
+ tempSizes[2] = (SizeT)s3Size;
+ if (tempSizes[2] != s3Size)
+ return SZ_ERROR_MEM;
+ tempBuf[2] = (Byte *)IAlloc_Alloc(allocMain, tempSizes[2]);
+ if (tempBuf[2] == 0 && tempSizes[2] != 0)
+ return SZ_ERROR_MEM;
+ res = SzDecodeCopy(s3Size, inStream, tempBuf[2]);
+ RINOK(res)
+
+ res = Bcj2_Decode(
+ tempBuf3, tempSize3,
+ tempBuf[0], tempSizes[0],
+ tempBuf[1], tempSizes[1],
+ tempBuf[2], tempSizes[2],
+ outBuffer, outSize);
+ RINOK(res)
+ }
+ else
+ {
+ if (ci != 1)
+ return SZ_ERROR_UNSUPPORTED;
+ switch(coder->MethodID)
+ {
+ case k_BCJ:
+ {
+ UInt32 state;
+ x86_Convert_Init(state);
+ x86_Convert(outBuffer, outSize, 0, &state, 0);
+ break;
+ }
+ CASE_BRA_CONV(ARM)
+ default:
+ return SZ_ERROR_UNSUPPORTED;
+ }
+ }
+ }
+ return SZ_OK;
}
SRes SzFolder_Decode(const CSzFolder *folder, const UInt64 *packSizes,
- ILookInStream *inStream, UInt64 startPos,
- Byte *outBuffer, size_t outSize, ISzAlloc *allocMain)
+ ILookInStream *inStream, UInt64 startPos,
+ Byte *outBuffer, size_t outSize, ISzAlloc *allocMain)
{
- Byte *tempBuf[3] = { 0, 0, 0};
- int i;
- SRes res = SzFolder_Decode2(folder, packSizes, inStream, startPos,
- outBuffer, (SizeT)outSize, allocMain, tempBuf);
- for (i = 0; i < 3; i++)
- IAlloc_Free(allocMain, tempBuf[i]);
- return res;
+ Byte *tempBuf[3] = { 0, 0, 0};
+ int i;
+ SRes res = SzFolder_Decode2(folder, packSizes, inStream, startPos,
+ outBuffer, (SizeT)outSize, allocMain, tempBuf);
+ for (i = 0; i < 3; i++)
+ IAlloc_Free(allocMain, tempBuf[i]);
+ return res;
}
diff --git a/src/lib/lib7z/7zIn.c b/src/lib/lib7z/7zIn.c
index d7256dde718..2716e8271b4 100644
--- a/src/lib/lib7z/7zIn.c
+++ b/src/lib/lib7z/7zIn.c
@@ -16,142 +16,142 @@ Byte k7zSignature[k7zSignatureSize] = {'7', 'z', 0xBC, 0xAF, 0x27, 0x1C};
void SzCoderInfo_Init(CSzCoderInfo *p)
{
- Buf_Init(&p->Props);
+ Buf_Init(&p->Props);
}
void SzCoderInfo_Free(CSzCoderInfo *p, ISzAlloc *alloc)
{
- Buf_Free(&p->Props, alloc);
- SzCoderInfo_Init(p);
+ Buf_Free(&p->Props, alloc);
+ SzCoderInfo_Init(p);
}
void SzFolder_Init(CSzFolder *p)
{
- p->Coders = 0;
- p->BindPairs = 0;
- p->PackStreams = 0;
- p->UnpackSizes = 0;
- p->NumCoders = 0;
- p->NumBindPairs = 0;
- p->NumPackStreams = 0;
- p->UnpackCRCDefined = 0;
- p->UnpackCRC = 0;
- p->NumUnpackStreams = 0;
+ p->Coders = 0;
+ p->BindPairs = 0;
+ p->PackStreams = 0;
+ p->UnpackSizes = 0;
+ p->NumCoders = 0;
+ p->NumBindPairs = 0;
+ p->NumPackStreams = 0;
+ p->UnpackCRCDefined = 0;
+ p->UnpackCRC = 0;
+ p->NumUnpackStreams = 0;
}
void SzFolder_Free(CSzFolder *p, ISzAlloc *alloc)
{
- UInt32 i;
- if (p->Coders)
- for (i = 0; i < p->NumCoders; i++)
- SzCoderInfo_Free(&p->Coders[i], alloc);
- IAlloc_Free(alloc, p->Coders);
- IAlloc_Free(alloc, p->BindPairs);
- IAlloc_Free(alloc, p->PackStreams);
- IAlloc_Free(alloc, p->UnpackSizes);
- SzFolder_Init(p);
+ UInt32 i;
+ if (p->Coders)
+ for (i = 0; i < p->NumCoders; i++)
+ SzCoderInfo_Free(&p->Coders[i], alloc);
+ IAlloc_Free(alloc, p->Coders);
+ IAlloc_Free(alloc, p->BindPairs);
+ IAlloc_Free(alloc, p->PackStreams);
+ IAlloc_Free(alloc, p->UnpackSizes);
+ SzFolder_Init(p);
}
UInt32 SzFolder_GetNumOutStreams(CSzFolder *p)
{
- UInt32 result = 0;
- UInt32 i;
- for (i = 0; i < p->NumCoders; i++)
- result += p->Coders[i].NumOutStreams;
- return result;
+ UInt32 result = 0;
+ UInt32 i;
+ for (i = 0; i < p->NumCoders; i++)
+ result += p->Coders[i].NumOutStreams;
+ return result;
}
int SzFolder_FindBindPairForInStream(CSzFolder *p, UInt32 inStreamIndex)
{
- UInt32 i;
- for (i = 0; i < p->NumBindPairs; i++)
- if (p->BindPairs[i].InIndex == inStreamIndex)
- return i;
- return -1;
+ UInt32 i;
+ for (i = 0; i < p->NumBindPairs; i++)
+ if (p->BindPairs[i].InIndex == inStreamIndex)
+ return i;
+ return -1;
}
int SzFolder_FindBindPairForOutStream(CSzFolder *p, UInt32 outStreamIndex)
{
- UInt32 i;
- for (i = 0; i < p->NumBindPairs; i++)
- if (p->BindPairs[i].OutIndex == outStreamIndex)
- return i;
- return -1;
+ UInt32 i;
+ for (i = 0; i < p->NumBindPairs; i++)
+ if (p->BindPairs[i].OutIndex == outStreamIndex)
+ return i;
+ return -1;
}
UInt64 SzFolder_GetUnpackSize(CSzFolder *p)
{
- int i = (int)SzFolder_GetNumOutStreams(p);
- if (i == 0)
- return 0;
- for (i--; i >= 0; i--)
- if (SzFolder_FindBindPairForOutStream(p, i) < 0)
- return p->UnpackSizes[i];
- /* throw 1; */
- return 0;
+ int i = (int)SzFolder_GetNumOutStreams(p);
+ if (i == 0)
+ return 0;
+ for (i--; i >= 0; i--)
+ if (SzFolder_FindBindPairForOutStream(p, i) < 0)
+ return p->UnpackSizes[i];
+ /* throw 1; */
+ return 0;
}
void SzFile_Init(CSzFileItem *p)
{
- p->HasStream = 1;
- p->IsDir = 0;
- p->IsAnti = 0;
- p->CrcDefined = 0;
- p->MTimeDefined = 0;
+ p->HasStream = 1;
+ p->IsDir = 0;
+ p->IsAnti = 0;
+ p->CrcDefined = 0;
+ p->MTimeDefined = 0;
}
void SzAr_Init(CSzAr *p)
{
- p->PackSizes = 0;
- p->PackCRCsDefined = 0;
- p->PackCRCs = 0;
- p->Folders = 0;
- p->Files = 0;
- p->NumPackStreams = 0;
- p->NumFolders = 0;
- p->NumFiles = 0;
+ p->PackSizes = 0;
+ p->PackCRCsDefined = 0;
+ p->PackCRCs = 0;
+ p->Folders = 0;
+ p->Files = 0;
+ p->NumPackStreams = 0;
+ p->NumFolders = 0;
+ p->NumFiles = 0;
}
void SzAr_Free(CSzAr *p, ISzAlloc *alloc)
{
- UInt32 i;
- if (p->Folders)
- for (i = 0; i < p->NumFolders; i++)
- SzFolder_Free(&p->Folders[i], alloc);
-
- IAlloc_Free(alloc, p->PackSizes);
- IAlloc_Free(alloc, p->PackCRCsDefined);
- IAlloc_Free(alloc, p->PackCRCs);
- IAlloc_Free(alloc, p->Folders);
- IAlloc_Free(alloc, p->Files);
- SzAr_Init(p);
+ UInt32 i;
+ if (p->Folders)
+ for (i = 0; i < p->NumFolders; i++)
+ SzFolder_Free(&p->Folders[i], alloc);
+
+ IAlloc_Free(alloc, p->PackSizes);
+ IAlloc_Free(alloc, p->PackCRCsDefined);
+ IAlloc_Free(alloc, p->PackCRCs);
+ IAlloc_Free(alloc, p->Folders);
+ IAlloc_Free(alloc, p->Files);
+ SzAr_Init(p);
}
void SzArEx_Init(CSzArEx *p)
{
- SzAr_Init(&p->db);
- p->FolderStartPackStreamIndex = 0;
- p->PackStreamStartPositions = 0;
- p->FolderStartFileIndex = 0;
- p->FileIndexToFolderIndexMap = 0;
- p->FileNameOffsets = 0;
- Buf_Init(&p->FileNames);
+ SzAr_Init(&p->db);
+ p->FolderStartPackStreamIndex = 0;
+ p->PackStreamStartPositions = 0;
+ p->FolderStartFileIndex = 0;
+ p->FileIndexToFolderIndexMap = 0;
+ p->FileNameOffsets = 0;
+ Buf_Init(&p->FileNames);
}
void SzArEx_Free(CSzArEx *p, ISzAlloc *alloc)
{
- IAlloc_Free(alloc, p->FolderStartPackStreamIndex);
- IAlloc_Free(alloc, p->PackStreamStartPositions);
- IAlloc_Free(alloc, p->FolderStartFileIndex);
- IAlloc_Free(alloc, p->FileIndexToFolderIndexMap);
+ IAlloc_Free(alloc, p->FolderStartPackStreamIndex);
+ IAlloc_Free(alloc, p->PackStreamStartPositions);
+ IAlloc_Free(alloc, p->FolderStartFileIndex);
+ IAlloc_Free(alloc, p->FileIndexToFolderIndexMap);
- IAlloc_Free(alloc, p->FileNameOffsets);
- Buf_Free(&p->FileNames, alloc);
+ IAlloc_Free(alloc, p->FileNameOffsets);
+ Buf_Free(&p->FileNames, alloc);
- SzAr_Free(&p->db, alloc);
- SzArEx_Init(p);
+ SzAr_Free(&p->db, alloc);
+ SzArEx_Init(p);
}
/*
@@ -174,93 +174,93 @@ UInt64 GetFilePackSize(int fileIndex) const
*/
#define MY_ALLOC(T, p, size, alloc) { if ((size) == 0) p = 0; else \
- if ((p = (T *)IAlloc_Alloc(alloc, (size) * sizeof(T))) == 0) return SZ_ERROR_MEM; }
+ if ((p = (T *)IAlloc_Alloc(alloc, (size) * sizeof(T))) == 0) return SZ_ERROR_MEM; }
static SRes SzArEx_Fill(CSzArEx *p, ISzAlloc *alloc)
{
- UInt32 startPos = 0;
- UInt64 startPosSize = 0;
- UInt32 i;
- UInt32 folderIndex = 0;
- UInt32 indexInFolder = 0;
- MY_ALLOC(UInt32, p->FolderStartPackStreamIndex, p->db.NumFolders, alloc);
- for (i = 0; i < p->db.NumFolders; i++)
- {
- p->FolderStartPackStreamIndex[i] = startPos;
- startPos += p->db.Folders[i].NumPackStreams;
- }
-
- MY_ALLOC(UInt64, p->PackStreamStartPositions, p->db.NumPackStreams, alloc);
-
- for (i = 0; i < p->db.NumPackStreams; i++)
- {
- p->PackStreamStartPositions[i] = startPosSize;
- startPosSize += p->db.PackSizes[i];
- }
-
- MY_ALLOC(UInt32, p->FolderStartFileIndex, p->db.NumFolders, alloc);
- MY_ALLOC(UInt32, p->FileIndexToFolderIndexMap, p->db.NumFiles, alloc);
-
- for (i = 0; i < p->db.NumFiles; i++)
- {
- CSzFileItem *file = p->db.Files + i;
- int emptyStream = !file->HasStream;
- if (emptyStream && indexInFolder == 0)
- {
- p->FileIndexToFolderIndexMap[i] = (UInt32)-1;
- continue;
- }
- if (indexInFolder == 0)
- {
- /*
- v3.13 incorrectly worked with empty folders
- v4.07: Loop for skipping empty folders
- */
- for (;;)
- {
- if (folderIndex >= p->db.NumFolders)
- return SZ_ERROR_ARCHIVE;
- p->FolderStartFileIndex[folderIndex] = i;
- if (p->db.Folders[folderIndex].NumUnpackStreams != 0)
- break;
- folderIndex++;
- }
- }
- p->FileIndexToFolderIndexMap[i] = folderIndex;
- if (emptyStream)
- continue;
- indexInFolder++;
- if (indexInFolder >= p->db.Folders[folderIndex].NumUnpackStreams)
- {
- folderIndex++;
- indexInFolder = 0;
- }
- }
- return SZ_OK;
+ UInt32 startPos = 0;
+ UInt64 startPosSize = 0;
+ UInt32 i;
+ UInt32 folderIndex = 0;
+ UInt32 indexInFolder = 0;
+ MY_ALLOC(UInt32, p->FolderStartPackStreamIndex, p->db.NumFolders, alloc);
+ for (i = 0; i < p->db.NumFolders; i++)
+ {
+ p->FolderStartPackStreamIndex[i] = startPos;
+ startPos += p->db.Folders[i].NumPackStreams;
+ }
+
+ MY_ALLOC(UInt64, p->PackStreamStartPositions, p->db.NumPackStreams, alloc);
+
+ for (i = 0; i < p->db.NumPackStreams; i++)
+ {
+ p->PackStreamStartPositions[i] = startPosSize;
+ startPosSize += p->db.PackSizes[i];
+ }
+
+ MY_ALLOC(UInt32, p->FolderStartFileIndex, p->db.NumFolders, alloc);
+ MY_ALLOC(UInt32, p->FileIndexToFolderIndexMap, p->db.NumFiles, alloc);
+
+ for (i = 0; i < p->db.NumFiles; i++)
+ {
+ CSzFileItem *file = p->db.Files + i;
+ int emptyStream = !file->HasStream;
+ if (emptyStream && indexInFolder == 0)
+ {
+ p->FileIndexToFolderIndexMap[i] = (UInt32)-1;
+ continue;
+ }
+ if (indexInFolder == 0)
+ {
+ /*
+ v3.13 incorrectly worked with empty folders
+ v4.07: Loop for skipping empty folders
+ */
+ for (;;)
+ {
+ if (folderIndex >= p->db.NumFolders)
+ return SZ_ERROR_ARCHIVE;
+ p->FolderStartFileIndex[folderIndex] = i;
+ if (p->db.Folders[folderIndex].NumUnpackStreams != 0)
+ break;
+ folderIndex++;
+ }
+ }
+ p->FileIndexToFolderIndexMap[i] = folderIndex;
+ if (emptyStream)
+ continue;
+ indexInFolder++;
+ if (indexInFolder >= p->db.Folders[folderIndex].NumUnpackStreams)
+ {
+ folderIndex++;
+ indexInFolder = 0;
+ }
+ }
+ return SZ_OK;
}
UInt64 SzArEx_GetFolderStreamPos(const CSzArEx *p, UInt32 folderIndex, UInt32 indexInFolder)
{
- return p->dataPos +
- p->PackStreamStartPositions[p->FolderStartPackStreamIndex[folderIndex] + indexInFolder];
+ return p->dataPos +
+ p->PackStreamStartPositions[p->FolderStartPackStreamIndex[folderIndex] + indexInFolder];
}
int SzArEx_GetFolderFullPackSize(const CSzArEx *p, UInt32 folderIndex, UInt64 *resSize)
{
- UInt32 packStreamIndex = p->FolderStartPackStreamIndex[folderIndex];
- CSzFolder *folder = p->db.Folders + folderIndex;
- UInt64 size = 0;
- UInt32 i;
- for (i = 0; i < folder->NumPackStreams; i++)
- {
- UInt64 t = size + p->db.PackSizes[packStreamIndex + i];
- if (t < size) /* check it */
- return SZ_ERROR_FAIL;
- size = t;
- }
- *resSize = size;
- return SZ_OK;
+ UInt32 packStreamIndex = p->FolderStartPackStreamIndex[folderIndex];
+ CSzFolder *folder = p->db.Folders + folderIndex;
+ UInt64 size = 0;
+ UInt32 i;
+ for (i = 0; i < folder->NumPackStreams; i++)
+ {
+ UInt64 t = size + p->db.PackSizes[packStreamIndex + i];
+ if (t < size) /* check it */
+ return SZ_ERROR_FAIL;
+ size = t;
+ }
+ *resSize = size;
+ return SZ_OK;
}
@@ -300,1103 +300,1103 @@ SRes SzReadTime(const CObjectVector<CBuf> &dataVector,
static int TestSignatureCandidate(Byte *testBytes)
{
- size_t i;
- for (i = 0; i < k7zSignatureSize; i++)
- if (testBytes[i] != k7zSignature[i])
- return 0;
- return 1;
+ size_t i;
+ for (i = 0; i < k7zSignatureSize; i++)
+ if (testBytes[i] != k7zSignature[i])
+ return 0;
+ return 1;
}
typedef struct _CSzState
{
- Byte *Data;
- size_t Size;
+ Byte *Data;
+ size_t Size;
}CSzData;
static SRes SzReadByte(CSzData *sd, Byte *b)
{
- if (sd->Size == 0)
- return SZ_ERROR_ARCHIVE;
- sd->Size--;
- *b = *sd->Data++;
- return SZ_OK;
+ if (sd->Size == 0)
+ return SZ_ERROR_ARCHIVE;
+ sd->Size--;
+ *b = *sd->Data++;
+ return SZ_OK;
}
static SRes SzReadBytes(CSzData *sd, Byte *data, size_t size)
{
- size_t i;
- for (i = 0; i < size; i++)
- {
- RINOK(SzReadByte(sd, data + i));
- }
- return SZ_OK;
+ size_t i;
+ for (i = 0; i < size; i++)
+ {
+ RINOK(SzReadByte(sd, data + i));
+ }
+ return SZ_OK;
}
static SRes SzReadUInt32(CSzData *sd, UInt32 *value)
{
- int i;
- *value = 0;
- for (i = 0; i < 4; i++)
- {
- Byte b;
- RINOK(SzReadByte(sd, &b));
- *value |= ((UInt32)(b) << (8 * i));
- }
- return SZ_OK;
+ int i;
+ *value = 0;
+ for (i = 0; i < 4; i++)
+ {
+ Byte b;
+ RINOK(SzReadByte(sd, &b));
+ *value |= ((UInt32)(b) << (8 * i));
+ }
+ return SZ_OK;
}
static SRes SzReadNumber(CSzData *sd, UInt64 *value)
{
- Byte firstByte;
- Byte mask = 0x80;
- int i;
- RINOK(SzReadByte(sd, &firstByte));
- *value = 0;
- for (i = 0; i < 8; i++)
- {
- Byte b;
- if ((firstByte & mask) == 0)
- {
- UInt64 highPart = firstByte & (mask - 1);
- *value += (highPart << (8 * i));
- return SZ_OK;
- }
- RINOK(SzReadByte(sd, &b));
- *value |= ((UInt64)b << (8 * i));
- mask >>= 1;
- }
- return SZ_OK;
+ Byte firstByte;
+ Byte mask = 0x80;
+ int i;
+ RINOK(SzReadByte(sd, &firstByte));
+ *value = 0;
+ for (i = 0; i < 8; i++)
+ {
+ Byte b;
+ if ((firstByte & mask) == 0)
+ {
+ UInt64 highPart = firstByte & (mask - 1);
+ *value += (highPart << (8 * i));
+ return SZ_OK;
+ }
+ RINOK(SzReadByte(sd, &b));
+ *value |= ((UInt64)b << (8 * i));
+ mask >>= 1;
+ }
+ return SZ_OK;
}
static SRes SzReadNumber32(CSzData *sd, UInt32 *value)
{
- UInt64 value64;
- RINOK(SzReadNumber(sd, &value64));
- if (value64 >= 0x80000000)
- return SZ_ERROR_UNSUPPORTED;
- if (value64 >= ((UInt64)(1) << ((sizeof(size_t) - 1) * 8 + 2)))
- return SZ_ERROR_UNSUPPORTED;
- *value = (UInt32)value64;
- return SZ_OK;
+ UInt64 value64;
+ RINOK(SzReadNumber(sd, &value64));
+ if (value64 >= 0x80000000)
+ return SZ_ERROR_UNSUPPORTED;
+ if (value64 >= ((UInt64)(1) << ((sizeof(size_t) - 1) * 8 + 2)))
+ return SZ_ERROR_UNSUPPORTED;
+ *value = (UInt32)value64;
+ return SZ_OK;
}
static SRes SzReadID(CSzData *sd, UInt64 *value)
{
- return SzReadNumber(sd, value);
+ return SzReadNumber(sd, value);
}
static SRes SzSkeepDataSize(CSzData *sd, UInt64 size)
{
- if (size > sd->Size)
- return SZ_ERROR_ARCHIVE;
- sd->Size -= (size_t)size;
- sd->Data += (size_t)size;
- return SZ_OK;
+ if (size > sd->Size)
+ return SZ_ERROR_ARCHIVE;
+ sd->Size -= (size_t)size;
+ sd->Data += (size_t)size;
+ return SZ_OK;
}
static SRes SzSkeepData(CSzData *sd)
{
- UInt64 size;
- RINOK(SzReadNumber(sd, &size));
- return SzSkeepDataSize(sd, size);
+ UInt64 size;
+ RINOK(SzReadNumber(sd, &size));
+ return SzSkeepDataSize(sd, size);
}
static SRes SzReadArchiveProperties(CSzData *sd)
{
- for (;;)
- {
- UInt64 type;
- RINOK(SzReadID(sd, &type));
- if (type == k7zIdEnd)
- break;
- SzSkeepData(sd);
- }
- return SZ_OK;
+ for (;;)
+ {
+ UInt64 type;
+ RINOK(SzReadID(sd, &type));
+ if (type == k7zIdEnd)
+ break;
+ SzSkeepData(sd);
+ }
+ return SZ_OK;
}
static SRes SzWaitAttribute(CSzData *sd, UInt64 attribute)
{
- for (;;)
- {
- UInt64 type;
- RINOK(SzReadID(sd, &type));
- if (type == attribute)
- return SZ_OK;
- if (type == k7zIdEnd)
- return SZ_ERROR_ARCHIVE;
- RINOK(SzSkeepData(sd));
- }
+ for (;;)
+ {
+ UInt64 type;
+ RINOK(SzReadID(sd, &type));
+ if (type == attribute)
+ return SZ_OK;
+ if (type == k7zIdEnd)
+ return SZ_ERROR_ARCHIVE;
+ RINOK(SzSkeepData(sd));
+ }
}
static SRes SzReadBoolVector(CSzData *sd, size_t numItems, Byte **v, ISzAlloc *alloc)
{
- Byte b = 0;
- Byte mask = 0;
- size_t i;
- MY_ALLOC(Byte, *v, numItems, alloc);
- for (i = 0; i < numItems; i++)
- {
- if (mask == 0)
- {
- RINOK(SzReadByte(sd, &b));
- mask = 0x80;
- }
- (*v)[i] = (Byte)(((b & mask) != 0) ? 1 : 0);
- mask >>= 1;
- }
- return SZ_OK;
+ Byte b = 0;
+ Byte mask = 0;
+ size_t i;
+ MY_ALLOC(Byte, *v, numItems, alloc);
+ for (i = 0; i < numItems; i++)
+ {
+ if (mask == 0)
+ {
+ RINOK(SzReadByte(sd, &b));
+ mask = 0x80;
+ }
+ (*v)[i] = (Byte)(((b & mask) != 0) ? 1 : 0);
+ mask >>= 1;
+ }
+ return SZ_OK;
}
static SRes SzReadBoolVector2(CSzData *sd, size_t numItems, Byte **v, ISzAlloc *alloc)
{
- Byte allAreDefined;
- size_t i;
- RINOK(SzReadByte(sd, &allAreDefined));
- if (allAreDefined == 0)
- return SzReadBoolVector(sd, numItems, v, alloc);
- MY_ALLOC(Byte, *v, numItems, alloc);
- for (i = 0; i < numItems; i++)
- (*v)[i] = 1;
- return SZ_OK;
+ Byte allAreDefined;
+ size_t i;
+ RINOK(SzReadByte(sd, &allAreDefined));
+ if (allAreDefined == 0)
+ return SzReadBoolVector(sd, numItems, v, alloc);
+ MY_ALLOC(Byte, *v, numItems, alloc);
+ for (i = 0; i < numItems; i++)
+ (*v)[i] = 1;
+ return SZ_OK;
}
static SRes SzReadHashDigests(
- CSzData *sd,
- size_t numItems,
- Byte **digestsDefined,
- UInt32 **digests,
- ISzAlloc *alloc)
+ CSzData *sd,
+ size_t numItems,
+ Byte **digestsDefined,
+ UInt32 **digests,
+ ISzAlloc *alloc)
{
- size_t i;
- RINOK(SzReadBoolVector2(sd, numItems, digestsDefined, alloc));
- MY_ALLOC(UInt32, *digests, numItems, alloc);
- for (i = 0; i < numItems; i++)
- if ((*digestsDefined)[i])
- {
- RINOK(SzReadUInt32(sd, (*digests) + i));
- }
- return SZ_OK;
+ size_t i;
+ RINOK(SzReadBoolVector2(sd, numItems, digestsDefined, alloc));
+ MY_ALLOC(UInt32, *digests, numItems, alloc);
+ for (i = 0; i < numItems; i++)
+ if ((*digestsDefined)[i])
+ {
+ RINOK(SzReadUInt32(sd, (*digests) + i));
+ }
+ return SZ_OK;
}
static SRes SzReadPackInfo(
- CSzData *sd,
- UInt64 *dataOffset,
- UInt32 *numPackStreams,
- UInt64 **packSizes,
- Byte **packCRCsDefined,
- UInt32 **packCRCs,
- ISzAlloc *alloc)
+ CSzData *sd,
+ UInt64 *dataOffset,
+ UInt32 *numPackStreams,
+ UInt64 **packSizes,
+ Byte **packCRCsDefined,
+ UInt32 **packCRCs,
+ ISzAlloc *alloc)
{
- UInt32 i;
- RINOK(SzReadNumber(sd, dataOffset));
- RINOK(SzReadNumber32(sd, numPackStreams));
-
- RINOK(SzWaitAttribute(sd, k7zIdSize));
-
- MY_ALLOC(UInt64, *packSizes, (size_t)*numPackStreams, alloc);
-
- for (i = 0; i < *numPackStreams; i++)
- {
- RINOK(SzReadNumber(sd, (*packSizes) + i));
- }
-
- for (;;)
- {
- UInt64 type;
- RINOK(SzReadID(sd, &type));
- if (type == k7zIdEnd)
- break;
- if (type == k7zIdCRC)
- {
- RINOK(SzReadHashDigests(sd, (size_t)*numPackStreams, packCRCsDefined, packCRCs, alloc));
- continue;
- }
- RINOK(SzSkeepData(sd));
- }
- if (*packCRCsDefined == 0)
- {
- MY_ALLOC(Byte, *packCRCsDefined, (size_t)*numPackStreams, alloc);
- MY_ALLOC(UInt32, *packCRCs, (size_t)*numPackStreams, alloc);
- for (i = 0; i < *numPackStreams; i++)
- {
- (*packCRCsDefined)[i] = 0;
- (*packCRCs)[i] = 0;
- }
- }
- return SZ_OK;
+ UInt32 i;
+ RINOK(SzReadNumber(sd, dataOffset));
+ RINOK(SzReadNumber32(sd, numPackStreams));
+
+ RINOK(SzWaitAttribute(sd, k7zIdSize));
+
+ MY_ALLOC(UInt64, *packSizes, (size_t)*numPackStreams, alloc);
+
+ for (i = 0; i < *numPackStreams; i++)
+ {
+ RINOK(SzReadNumber(sd, (*packSizes) + i));
+ }
+
+ for (;;)
+ {
+ UInt64 type;
+ RINOK(SzReadID(sd, &type));
+ if (type == k7zIdEnd)
+ break;
+ if (type == k7zIdCRC)
+ {
+ RINOK(SzReadHashDigests(sd, (size_t)*numPackStreams, packCRCsDefined, packCRCs, alloc));
+ continue;
+ }
+ RINOK(SzSkeepData(sd));
+ }
+ if (*packCRCsDefined == 0)
+ {
+ MY_ALLOC(Byte, *packCRCsDefined, (size_t)*numPackStreams, alloc);
+ MY_ALLOC(UInt32, *packCRCs, (size_t)*numPackStreams, alloc);
+ for (i = 0; i < *numPackStreams; i++)
+ {
+ (*packCRCsDefined)[i] = 0;
+ (*packCRCs)[i] = 0;
+ }
+ }
+ return SZ_OK;
}
static SRes SzReadSwitch(CSzData *sd)
{
- Byte external;
- RINOK(SzReadByte(sd, &external));
- return (external == 0) ? SZ_OK: SZ_ERROR_UNSUPPORTED;
+ Byte external;
+ RINOK(SzReadByte(sd, &external));
+ return (external == 0) ? SZ_OK: SZ_ERROR_UNSUPPORTED;
}
static SRes SzGetNextFolderItem(CSzData *sd, CSzFolder *folder, ISzAlloc *alloc)
{
- UInt32 numCoders, numBindPairs, numPackStreams, i;
- UInt32 numInStreams = 0, numOutStreams = 0;
-
- RINOK(SzReadNumber32(sd, &numCoders));
- if (numCoders > NUM_FOLDER_CODERS_MAX)
- return SZ_ERROR_UNSUPPORTED;
- folder->NumCoders = numCoders;
-
- MY_ALLOC(CSzCoderInfo, folder->Coders, (size_t)numCoders, alloc);
-
- for (i = 0; i < numCoders; i++)
- SzCoderInfo_Init(folder->Coders + i);
-
- for (i = 0; i < numCoders; i++)
- {
- Byte mainByte;
- CSzCoderInfo *coder = folder->Coders + i;
- {
- unsigned idSize, j;
- Byte longID[15];
- RINOK(SzReadByte(sd, &mainByte));
- idSize = (unsigned)(mainByte & 0xF);
- RINOK(SzReadBytes(sd, longID, idSize));
- if (idSize > sizeof(coder->MethodID))
- return SZ_ERROR_UNSUPPORTED;
- coder->MethodID = 0;
- for (j = 0; j < idSize; j++)
- coder->MethodID |= (UInt64)longID[idSize - 1 - j] << (8 * j);
-
- if ((mainByte & 0x10) != 0)
- {
- RINOK(SzReadNumber32(sd, &coder->NumInStreams));
- RINOK(SzReadNumber32(sd, &coder->NumOutStreams));
- if (coder->NumInStreams > NUM_CODER_STREAMS_MAX ||
- coder->NumOutStreams > NUM_CODER_STREAMS_MAX)
- return SZ_ERROR_UNSUPPORTED;
- }
- else
- {
- coder->NumInStreams = 1;
- coder->NumOutStreams = 1;
- }
- if ((mainByte & 0x20) != 0)
- {
- UInt64 propertiesSize = 0;
- RINOK(SzReadNumber(sd, &propertiesSize));
- if (!Buf_Create(&coder->Props, (size_t)propertiesSize, alloc))
- return SZ_ERROR_MEM;
- RINOK(SzReadBytes(sd, coder->Props.data, (size_t)propertiesSize));
- }
- }
- while ((mainByte & 0x80) != 0)
- {
- RINOK(SzReadByte(sd, &mainByte));
- RINOK(SzSkeepDataSize(sd, (mainByte & 0xF)));
- if ((mainByte & 0x10) != 0)
- {
- UInt32 n;
- RINOK(SzReadNumber32(sd, &n));
- RINOK(SzReadNumber32(sd, &n));
- }
- if ((mainByte & 0x20) != 0)
- {
- UInt64 propertiesSize = 0;
- RINOK(SzReadNumber(sd, &propertiesSize));
- RINOK(SzSkeepDataSize(sd, propertiesSize));
- }
- }
- numInStreams += coder->NumInStreams;
- numOutStreams += coder->NumOutStreams;
- }
-
- if (numOutStreams == 0)
- return SZ_ERROR_UNSUPPORTED;
-
- folder->NumBindPairs = numBindPairs = numOutStreams - 1;
- MY_ALLOC(CSzBindPair, folder->BindPairs, (size_t)numBindPairs, alloc);
-
- for (i = 0; i < numBindPairs; i++)
- {
- CSzBindPair *bp = folder->BindPairs + i;
- RINOK(SzReadNumber32(sd, &bp->InIndex));
- RINOK(SzReadNumber32(sd, &bp->OutIndex));
- }
-
- if (numInStreams < numBindPairs)
- return SZ_ERROR_UNSUPPORTED;
-
- folder->NumPackStreams = numPackStreams = numInStreams - numBindPairs;
- MY_ALLOC(UInt32, folder->PackStreams, (size_t)numPackStreams, alloc);
-
- if (numPackStreams == 1)
- {
- for (i = 0; i < numInStreams ; i++)
- if (SzFolder_FindBindPairForInStream(folder, i) < 0)
- break;
- if (i == numInStreams)
- return SZ_ERROR_UNSUPPORTED;
- folder->PackStreams[0] = i;
- }
- else
- for (i = 0; i < numPackStreams; i++)
- {
- RINOK(SzReadNumber32(sd, folder->PackStreams + i));
- }
- return SZ_OK;
+ UInt32 numCoders, numBindPairs, numPackStreams, i;
+ UInt32 numInStreams = 0, numOutStreams = 0;
+
+ RINOK(SzReadNumber32(sd, &numCoders));
+ if (numCoders > NUM_FOLDER_CODERS_MAX)
+ return SZ_ERROR_UNSUPPORTED;
+ folder->NumCoders = numCoders;
+
+ MY_ALLOC(CSzCoderInfo, folder->Coders, (size_t)numCoders, alloc);
+
+ for (i = 0; i < numCoders; i++)
+ SzCoderInfo_Init(folder->Coders + i);
+
+ for (i = 0; i < numCoders; i++)
+ {
+ Byte mainByte;
+ CSzCoderInfo *coder = folder->Coders + i;
+ {
+ unsigned idSize, j;
+ Byte longID[15];
+ RINOK(SzReadByte(sd, &mainByte));
+ idSize = (unsigned)(mainByte & 0xF);
+ RINOK(SzReadBytes(sd, longID, idSize));
+ if (idSize > sizeof(coder->MethodID))
+ return SZ_ERROR_UNSUPPORTED;
+ coder->MethodID = 0;
+ for (j = 0; j < idSize; j++)
+ coder->MethodID |= (UInt64)longID[idSize - 1 - j] << (8 * j);
+
+ if ((mainByte & 0x10) != 0)
+ {
+ RINOK(SzReadNumber32(sd, &coder->NumInStreams));
+ RINOK(SzReadNumber32(sd, &coder->NumOutStreams));
+ if (coder->NumInStreams > NUM_CODER_STREAMS_MAX ||
+ coder->NumOutStreams > NUM_CODER_STREAMS_MAX)
+ return SZ_ERROR_UNSUPPORTED;
+ }
+ else
+ {
+ coder->NumInStreams = 1;
+ coder->NumOutStreams = 1;
+ }
+ if ((mainByte & 0x20) != 0)
+ {
+ UInt64 propertiesSize = 0;
+ RINOK(SzReadNumber(sd, &propertiesSize));
+ if (!Buf_Create(&coder->Props, (size_t)propertiesSize, alloc))
+ return SZ_ERROR_MEM;
+ RINOK(SzReadBytes(sd, coder->Props.data, (size_t)propertiesSize));
+ }
+ }
+ while ((mainByte & 0x80) != 0)
+ {
+ RINOK(SzReadByte(sd, &mainByte));
+ RINOK(SzSkeepDataSize(sd, (mainByte & 0xF)));
+ if ((mainByte & 0x10) != 0)
+ {
+ UInt32 n;
+ RINOK(SzReadNumber32(sd, &n));
+ RINOK(SzReadNumber32(sd, &n));
+ }
+ if ((mainByte & 0x20) != 0)
+ {
+ UInt64 propertiesSize = 0;
+ RINOK(SzReadNumber(sd, &propertiesSize));
+ RINOK(SzSkeepDataSize(sd, propertiesSize));
+ }
+ }
+ numInStreams += coder->NumInStreams;
+ numOutStreams += coder->NumOutStreams;
+ }
+
+ if (numOutStreams == 0)
+ return SZ_ERROR_UNSUPPORTED;
+
+ folder->NumBindPairs = numBindPairs = numOutStreams - 1;
+ MY_ALLOC(CSzBindPair, folder->BindPairs, (size_t)numBindPairs, alloc);
+
+ for (i = 0; i < numBindPairs; i++)
+ {
+ CSzBindPair *bp = folder->BindPairs + i;
+ RINOK(SzReadNumber32(sd, &bp->InIndex));
+ RINOK(SzReadNumber32(sd, &bp->OutIndex));
+ }
+
+ if (numInStreams < numBindPairs)
+ return SZ_ERROR_UNSUPPORTED;
+
+ folder->NumPackStreams = numPackStreams = numInStreams - numBindPairs;
+ MY_ALLOC(UInt32, folder->PackStreams, (size_t)numPackStreams, alloc);
+
+ if (numPackStreams == 1)
+ {
+ for (i = 0; i < numInStreams ; i++)
+ if (SzFolder_FindBindPairForInStream(folder, i) < 0)
+ break;
+ if (i == numInStreams)
+ return SZ_ERROR_UNSUPPORTED;
+ folder->PackStreams[0] = i;
+ }
+ else
+ for (i = 0; i < numPackStreams; i++)
+ {
+ RINOK(SzReadNumber32(sd, folder->PackStreams + i));
+ }
+ return SZ_OK;
}
static SRes SzReadUnpackInfo(
- CSzData *sd,
- UInt32 *numFolders,
- CSzFolder **folders, /* for alloc */
- ISzAlloc *alloc,
- ISzAlloc *allocTemp)
+ CSzData *sd,
+ UInt32 *numFolders,
+ CSzFolder **folders, /* for alloc */
+ ISzAlloc *alloc,
+ ISzAlloc *allocTemp)
{
- UInt32 i;
- RINOK(SzWaitAttribute(sd, k7zIdFolder));
- RINOK(SzReadNumber32(sd, numFolders));
- {
- RINOK(SzReadSwitch(sd));
-
- MY_ALLOC(CSzFolder, *folders, (size_t)*numFolders, alloc);
-
- for (i = 0; i < *numFolders; i++)
- SzFolder_Init((*folders) + i);
-
- for (i = 0; i < *numFolders; i++)
- {
- RINOK(SzGetNextFolderItem(sd, (*folders) + i, alloc));
- }
- }
-
- RINOK(SzWaitAttribute(sd, k7zIdCodersUnpackSize));
-
- for (i = 0; i < *numFolders; i++)
- {
- UInt32 j;
- CSzFolder *folder = (*folders) + i;
- UInt32 numOutStreams = SzFolder_GetNumOutStreams(folder);
-
- MY_ALLOC(UInt64, folder->UnpackSizes, (size_t)numOutStreams, alloc);
-
- for (j = 0; j < numOutStreams; j++)
- {
- RINOK(SzReadNumber(sd, folder->UnpackSizes + j));
- }
- }
-
- for (;;)
- {
- UInt64 type;
- RINOK(SzReadID(sd, &type));
- if (type == k7zIdEnd)
- return SZ_OK;
- if (type == k7zIdCRC)
- {
- SRes res;
- Byte *crcsDefined = 0;
- UInt32 *crcs = 0;
- res = SzReadHashDigests(sd, *numFolders, &crcsDefined, &crcs, allocTemp);
- if (res == SZ_OK)
- {
- for (i = 0; i < *numFolders; i++)
- {
- CSzFolder *folder = (*folders) + i;
- folder->UnpackCRCDefined = crcsDefined[i];
- folder->UnpackCRC = crcs[i];
- }
- }
- IAlloc_Free(allocTemp, crcs);
- IAlloc_Free(allocTemp, crcsDefined);
- RINOK(res);
- continue;
- }
- RINOK(SzSkeepData(sd));
- }
+ UInt32 i;
+ RINOK(SzWaitAttribute(sd, k7zIdFolder));
+ RINOK(SzReadNumber32(sd, numFolders));
+ {
+ RINOK(SzReadSwitch(sd));
+
+ MY_ALLOC(CSzFolder, *folders, (size_t)*numFolders, alloc);
+
+ for (i = 0; i < *numFolders; i++)
+ SzFolder_Init((*folders) + i);
+
+ for (i = 0; i < *numFolders; i++)
+ {
+ RINOK(SzGetNextFolderItem(sd, (*folders) + i, alloc));
+ }
+ }
+
+ RINOK(SzWaitAttribute(sd, k7zIdCodersUnpackSize));
+
+ for (i = 0; i < *numFolders; i++)
+ {
+ UInt32 j;
+ CSzFolder *folder = (*folders) + i;
+ UInt32 numOutStreams = SzFolder_GetNumOutStreams(folder);
+
+ MY_ALLOC(UInt64, folder->UnpackSizes, (size_t)numOutStreams, alloc);
+
+ for (j = 0; j < numOutStreams; j++)
+ {
+ RINOK(SzReadNumber(sd, folder->UnpackSizes + j));
+ }
+ }
+
+ for (;;)
+ {
+ UInt64 type;
+ RINOK(SzReadID(sd, &type));
+ if (type == k7zIdEnd)
+ return SZ_OK;
+ if (type == k7zIdCRC)
+ {
+ SRes res;
+ Byte *crcsDefined = 0;
+ UInt32 *crcs = 0;
+ res = SzReadHashDigests(sd, *numFolders, &crcsDefined, &crcs, allocTemp);
+ if (res == SZ_OK)
+ {
+ for (i = 0; i < *numFolders; i++)
+ {
+ CSzFolder *folder = (*folders) + i;
+ folder->UnpackCRCDefined = crcsDefined[i];
+ folder->UnpackCRC = crcs[i];
+ }
+ }
+ IAlloc_Free(allocTemp, crcs);
+ IAlloc_Free(allocTemp, crcsDefined);
+ RINOK(res);
+ continue;
+ }
+ RINOK(SzSkeepData(sd));
+ }
}
static SRes SzReadSubStreamsInfo(
- CSzData *sd,
- UInt32 numFolders,
- CSzFolder *folders,
- UInt32 *numUnpackStreams,
- UInt64 **unpackSizes,
- Byte **digestsDefined,
- UInt32 **digests,
- ISzAlloc *allocTemp)
+ CSzData *sd,
+ UInt32 numFolders,
+ CSzFolder *folders,
+ UInt32 *numUnpackStreams,
+ UInt64 **unpackSizes,
+ Byte **digestsDefined,
+ UInt32 **digests,
+ ISzAlloc *allocTemp)
{
- UInt64 type = 0;
- UInt32 i;
- UInt32 si = 0;
- UInt32 numDigests = 0;
-
- for (i = 0; i < numFolders; i++)
- folders[i].NumUnpackStreams = 1;
- *numUnpackStreams = numFolders;
-
- for (;;)
- {
- RINOK(SzReadID(sd, &type));
- if (type == k7zIdNumUnpackStream)
- {
- *numUnpackStreams = 0;
- for (i = 0; i < numFolders; i++)
- {
- UInt32 numStreams;
- RINOK(SzReadNumber32(sd, &numStreams));
- folders[i].NumUnpackStreams = numStreams;
- *numUnpackStreams += numStreams;
- }
- continue;
- }
- if (type == k7zIdCRC || type == k7zIdSize)
- break;
- if (type == k7zIdEnd)
- break;
- RINOK(SzSkeepData(sd));
- }
-
- if (*numUnpackStreams == 0)
- {
- *unpackSizes = 0;
- *digestsDefined = 0;
- *digests = 0;
- }
- else
- {
- *unpackSizes = (UInt64 *)IAlloc_Alloc(allocTemp, (size_t)*numUnpackStreams * sizeof(UInt64));
- RINOM(*unpackSizes);
- *digestsDefined = (Byte *)IAlloc_Alloc(allocTemp, (size_t)*numUnpackStreams * sizeof(Byte));
- RINOM(*digestsDefined);
- *digests = (UInt32 *)IAlloc_Alloc(allocTemp, (size_t)*numUnpackStreams * sizeof(UInt32));
- RINOM(*digests);
- }
-
- for (i = 0; i < numFolders; i++)
- {
- /*
- v3.13 incorrectly worked with empty folders
- v4.07: we check that folder is empty
- */
- UInt64 sum = 0;
- UInt32 j;
- UInt32 numSubstreams = folders[i].NumUnpackStreams;
- if (numSubstreams == 0)
- continue;
- if (type == k7zIdSize)
- for (j = 1; j < numSubstreams; j++)
- {
- UInt64 size;
- RINOK(SzReadNumber(sd, &size));
- (*unpackSizes)[si++] = size;
- sum += size;
- }
- (*unpackSizes)[si++] = SzFolder_GetUnpackSize(folders + i) - sum;
- }
- if (type == k7zIdSize)
- {
- RINOK(SzReadID(sd, &type));
- }
-
- for (i = 0; i < *numUnpackStreams; i++)
- {
- (*digestsDefined)[i] = 0;
- (*digests)[i] = 0;
- }
-
-
- for (i = 0; i < numFolders; i++)
- {
- UInt32 numSubstreams = folders[i].NumUnpackStreams;
- if (numSubstreams != 1 || !folders[i].UnpackCRCDefined)
- numDigests += numSubstreams;
- }
-
-
- si = 0;
- for (;;)
- {
- if (type == k7zIdCRC)
- {
- int digestIndex = 0;
- Byte *digestsDefined2 = 0;
- UInt32 *digests2 = 0;
- SRes res = SzReadHashDigests(sd, numDigests, &digestsDefined2, &digests2, allocTemp);
- if (res == SZ_OK)
- {
- for (i = 0; i < numFolders; i++)
- {
- CSzFolder *folder = folders + i;
- UInt32 numSubstreams = folder->NumUnpackStreams;
- if (numSubstreams == 1 && folder->UnpackCRCDefined)
- {
- (*digestsDefined)[si] = 1;
- (*digests)[si] = folder->UnpackCRC;
- si++;
- }
- else
- {
- UInt32 j;
- for (j = 0; j < numSubstreams; j++, digestIndex++)
- {
- (*digestsDefined)[si] = digestsDefined2[digestIndex];
- (*digests)[si] = digests2[digestIndex];
- si++;
- }
- }
- }
- }
- IAlloc_Free(allocTemp, digestsDefined2);
- IAlloc_Free(allocTemp, digests2);
- RINOK(res);
- }
- else if (type == k7zIdEnd)
- return SZ_OK;
- else
- {
- RINOK(SzSkeepData(sd));
- }
- RINOK(SzReadID(sd, &type));
- }
+ UInt64 type = 0;
+ UInt32 i;
+ UInt32 si = 0;
+ UInt32 numDigests = 0;
+
+ for (i = 0; i < numFolders; i++)
+ folders[i].NumUnpackStreams = 1;
+ *numUnpackStreams = numFolders;
+
+ for (;;)
+ {
+ RINOK(SzReadID(sd, &type));
+ if (type == k7zIdNumUnpackStream)
+ {
+ *numUnpackStreams = 0;
+ for (i = 0; i < numFolders; i++)
+ {
+ UInt32 numStreams;
+ RINOK(SzReadNumber32(sd, &numStreams));
+ folders[i].NumUnpackStreams = numStreams;
+ *numUnpackStreams += numStreams;
+ }
+ continue;
+ }
+ if (type == k7zIdCRC || type == k7zIdSize)
+ break;
+ if (type == k7zIdEnd)
+ break;
+ RINOK(SzSkeepData(sd));
+ }
+
+ if (*numUnpackStreams == 0)
+ {
+ *unpackSizes = 0;
+ *digestsDefined = 0;
+ *digests = 0;
+ }
+ else
+ {
+ *unpackSizes = (UInt64 *)IAlloc_Alloc(allocTemp, (size_t)*numUnpackStreams * sizeof(UInt64));
+ RINOM(*unpackSizes);
+ *digestsDefined = (Byte *)IAlloc_Alloc(allocTemp, (size_t)*numUnpackStreams * sizeof(Byte));
+ RINOM(*digestsDefined);
+ *digests = (UInt32 *)IAlloc_Alloc(allocTemp, (size_t)*numUnpackStreams * sizeof(UInt32));
+ RINOM(*digests);
+ }
+
+ for (i = 0; i < numFolders; i++)
+ {
+ /*
+ v3.13 incorrectly worked with empty folders
+ v4.07: we check that folder is empty
+ */
+ UInt64 sum = 0;
+ UInt32 j;
+ UInt32 numSubstreams = folders[i].NumUnpackStreams;
+ if (numSubstreams == 0)
+ continue;
+ if (type == k7zIdSize)
+ for (j = 1; j < numSubstreams; j++)
+ {
+ UInt64 size;
+ RINOK(SzReadNumber(sd, &size));
+ (*unpackSizes)[si++] = size;
+ sum += size;
+ }
+ (*unpackSizes)[si++] = SzFolder_GetUnpackSize(folders + i) - sum;
+ }
+ if (type == k7zIdSize)
+ {
+ RINOK(SzReadID(sd, &type));
+ }
+
+ for (i = 0; i < *numUnpackStreams; i++)
+ {
+ (*digestsDefined)[i] = 0;
+ (*digests)[i] = 0;
+ }
+
+
+ for (i = 0; i < numFolders; i++)
+ {
+ UInt32 numSubstreams = folders[i].NumUnpackStreams;
+ if (numSubstreams != 1 || !folders[i].UnpackCRCDefined)
+ numDigests += numSubstreams;
+ }
+
+
+ si = 0;
+ for (;;)
+ {
+ if (type == k7zIdCRC)
+ {
+ int digestIndex = 0;
+ Byte *digestsDefined2 = 0;
+ UInt32 *digests2 = 0;
+ SRes res = SzReadHashDigests(sd, numDigests, &digestsDefined2, &digests2, allocTemp);
+ if (res == SZ_OK)
+ {
+ for (i = 0; i < numFolders; i++)
+ {
+ CSzFolder *folder = folders + i;
+ UInt32 numSubstreams = folder->NumUnpackStreams;
+ if (numSubstreams == 1 && folder->UnpackCRCDefined)
+ {
+ (*digestsDefined)[si] = 1;
+ (*digests)[si] = folder->UnpackCRC;
+ si++;
+ }
+ else
+ {
+ UInt32 j;
+ for (j = 0; j < numSubstreams; j++, digestIndex++)
+ {
+ (*digestsDefined)[si] = digestsDefined2[digestIndex];
+ (*digests)[si] = digests2[digestIndex];
+ si++;
+ }
+ }
+ }
+ }
+ IAlloc_Free(allocTemp, digestsDefined2);
+ IAlloc_Free(allocTemp, digests2);
+ RINOK(res);
+ }
+ else if (type == k7zIdEnd)
+ return SZ_OK;
+ else
+ {
+ RINOK(SzSkeepData(sd));
+ }
+ RINOK(SzReadID(sd, &type));
+ }
}
static SRes SzReadStreamsInfo(
- CSzData *sd,
- UInt64 *dataOffset,
- CSzAr *p,
- UInt32 *numUnpackStreams,
- UInt64 **unpackSizes, /* allocTemp */
- Byte **digestsDefined, /* allocTemp */
- UInt32 **digests, /* allocTemp */
- ISzAlloc *alloc,
- ISzAlloc *allocTemp)
+ CSzData *sd,
+ UInt64 *dataOffset,
+ CSzAr *p,
+ UInt32 *numUnpackStreams,
+ UInt64 **unpackSizes, /* allocTemp */
+ Byte **digestsDefined, /* allocTemp */
+ UInt32 **digests, /* allocTemp */
+ ISzAlloc *alloc,
+ ISzAlloc *allocTemp)
{
- for (;;)
- {
- UInt64 type;
- RINOK(SzReadID(sd, &type));
- if ((UInt64)(int)type != type)
- return SZ_ERROR_UNSUPPORTED;
- switch((int)type)
- {
- case k7zIdEnd:
- return SZ_OK;
- case k7zIdPackInfo:
- {
- RINOK(SzReadPackInfo(sd, dataOffset, &p->NumPackStreams,
- &p->PackSizes, &p->PackCRCsDefined, &p->PackCRCs, alloc));
- break;
- }
- case k7zIdUnpackInfo:
- {
- RINOK(SzReadUnpackInfo(sd, &p->NumFolders, &p->Folders, alloc, allocTemp));
- break;
- }
- case k7zIdSubStreamsInfo:
- {
- RINOK(SzReadSubStreamsInfo(sd, p->NumFolders, p->Folders,
- numUnpackStreams, unpackSizes, digestsDefined, digests, allocTemp));
- break;
- }
- default:
- return SZ_ERROR_UNSUPPORTED;
- }
- }
+ for (;;)
+ {
+ UInt64 type;
+ RINOK(SzReadID(sd, &type));
+ if ((UInt64)(int)type != type)
+ return SZ_ERROR_UNSUPPORTED;
+ switch((int)type)
+ {
+ case k7zIdEnd:
+ return SZ_OK;
+ case k7zIdPackInfo:
+ {
+ RINOK(SzReadPackInfo(sd, dataOffset, &p->NumPackStreams,
+ &p->PackSizes, &p->PackCRCsDefined, &p->PackCRCs, alloc));
+ break;
+ }
+ case k7zIdUnpackInfo:
+ {
+ RINOK(SzReadUnpackInfo(sd, &p->NumFolders, &p->Folders, alloc, allocTemp));
+ break;
+ }
+ case k7zIdSubStreamsInfo:
+ {
+ RINOK(SzReadSubStreamsInfo(sd, p->NumFolders, p->Folders,
+ numUnpackStreams, unpackSizes, digestsDefined, digests, allocTemp));
+ break;
+ }
+ default:
+ return SZ_ERROR_UNSUPPORTED;
+ }
+ }
}
size_t SzArEx_GetFileNameUtf16(const CSzArEx *p, size_t fileIndex, UInt16 *dest)
{
- size_t len = p->FileNameOffsets[fileIndex + 1] - p->FileNameOffsets[fileIndex];
- if (dest != 0)
- {
- size_t i;
- const Byte *src = p->FileNames.data + (p->FileNameOffsets[fileIndex] * 2);
- for (i = 0; i < len; i++)
- dest[i] = GetUi16(src + i * 2);
- }
- return len;
+ size_t len = p->FileNameOffsets[fileIndex + 1] - p->FileNameOffsets[fileIndex];
+ if (dest != 0)
+ {
+ size_t i;
+ const Byte *src = p->FileNames.data + (p->FileNameOffsets[fileIndex] * 2);
+ for (i = 0; i < len; i++)
+ dest[i] = GetUi16(src + i * 2);
+ }
+ return len;
}
static SRes SzReadFileNames(const Byte *p, size_t size, UInt32 numFiles, size_t *sizes)
{
- UInt32 i;
- size_t pos = 0;
- for (i = 0; i < numFiles; i++)
- {
- sizes[i] = pos;
- for (;;)
- {
- if (pos >= size)
- return SZ_ERROR_ARCHIVE;
- if (p[pos * 2] == 0 && p[pos * 2 + 1] == 0)
- break;
- pos++;
- }
- pos++;
- }
- sizes[i] = pos;
- return (pos == size) ? SZ_OK : SZ_ERROR_ARCHIVE;
+ UInt32 i;
+ size_t pos = 0;
+ for (i = 0; i < numFiles; i++)
+ {
+ sizes[i] = pos;
+ for (;;)
+ {
+ if (pos >= size)
+ return SZ_ERROR_ARCHIVE;
+ if (p[pos * 2] == 0 && p[pos * 2 + 1] == 0)
+ break;
+ pos++;
+ }
+ pos++;
+ }
+ sizes[i] = pos;
+ return (pos == size) ? SZ_OK : SZ_ERROR_ARCHIVE;
}
static SRes SzReadHeader2(
- CSzArEx *p, /* allocMain */
- CSzData *sd,
- UInt64 **unpackSizes, /* allocTemp */
- Byte **digestsDefined, /* allocTemp */
- UInt32 **digests, /* allocTemp */
- Byte **emptyStreamVector, /* allocTemp */
- Byte **emptyFileVector, /* allocTemp */
- Byte **lwtVector, /* allocTemp */
- ISzAlloc *allocMain,
- ISzAlloc *allocTemp)
+ CSzArEx *p, /* allocMain */
+ CSzData *sd,
+ UInt64 **unpackSizes, /* allocTemp */
+ Byte **digestsDefined, /* allocTemp */
+ UInt32 **digests, /* allocTemp */
+ Byte **emptyStreamVector, /* allocTemp */
+ Byte **emptyFileVector, /* allocTemp */
+ Byte **lwtVector, /* allocTemp */
+ ISzAlloc *allocMain,
+ ISzAlloc *allocTemp)
{
- UInt64 type;
- UInt32 numUnpackStreams = 0;
- UInt32 numFiles = 0;
- CSzFileItem *files = 0;
- UInt32 numEmptyStreams = 0;
- UInt32 i;
-
- RINOK(SzReadID(sd, &type));
-
- if (type == k7zIdArchiveProperties)
- {
- RINOK(SzReadArchiveProperties(sd));
- RINOK(SzReadID(sd, &type));
- }
-
-
- if (type == k7zIdMainStreamsInfo)
- {
- RINOK(SzReadStreamsInfo(sd,
- &p->dataPos,
- &p->db,
- &numUnpackStreams,
- unpackSizes,
- digestsDefined,
- digests, allocMain, allocTemp));
- p->dataPos += p->startPosAfterHeader;
- RINOK(SzReadID(sd, &type));
- }
-
- if (type == k7zIdEnd)
- return SZ_OK;
- if (type != k7zIdFilesInfo)
- return SZ_ERROR_ARCHIVE;
-
- RINOK(SzReadNumber32(sd, &numFiles));
- p->db.NumFiles = numFiles;
-
- MY_ALLOC(CSzFileItem, files, (size_t)numFiles, allocMain);
-
- p->db.Files = files;
- for (i = 0; i < numFiles; i++)
- SzFile_Init(files + i);
-
- for (;;)
- {
- UInt64 type;
- UInt64 size;
- RINOK(SzReadID(sd, &type));
- if (type == k7zIdEnd)
- break;
- RINOK(SzReadNumber(sd, &size));
- if (size > sd->Size)
- return SZ_ERROR_ARCHIVE;
- if ((UInt64)(int)type != type)
- {
- RINOK(SzSkeepDataSize(sd, size));
- }
- else
- switch((int)type)
- {
- case k7zIdName:
- {
- size_t namesSize;
- RINOK(SzReadSwitch(sd));
- namesSize = (size_t)size - 1;
- if ((namesSize & 1) != 0)
- return SZ_ERROR_ARCHIVE;
- if (!Buf_Create(&p->FileNames, namesSize, allocMain))
- return SZ_ERROR_MEM;
- MY_ALLOC(size_t, p->FileNameOffsets, numFiles + 1, allocMain);
- memcpy(p->FileNames.data, sd->Data, namesSize);
- RINOK(SzReadFileNames(sd->Data, namesSize >> 1, numFiles, p->FileNameOffsets))
- RINOK(SzSkeepDataSize(sd, namesSize));
- break;
- }
- case k7zIdEmptyStream:
- {
- RINOK(SzReadBoolVector(sd, numFiles, emptyStreamVector, allocTemp));
- numEmptyStreams = 0;
- for (i = 0; i < numFiles; i++)
- if ((*emptyStreamVector)[i])
- numEmptyStreams++;
- break;
- }
- case k7zIdEmptyFile:
- {
- RINOK(SzReadBoolVector(sd, numEmptyStreams, emptyFileVector, allocTemp));
- break;
- }
- case k7zIdWinAttributes:
- {
- RINOK(SzReadBoolVector2(sd, numFiles, lwtVector, allocTemp));
- RINOK(SzReadSwitch(sd));
- for (i = 0; i < numFiles; i++)
- {
- CSzFileItem *f = &files[i];
- Byte defined = (*lwtVector)[i];
- f->AttribDefined = defined;
- f->Attrib = 0;
- if (defined)
- {
- RINOK(SzReadUInt32(sd, &f->Attrib));
- }
- }
- IAlloc_Free(allocTemp, *lwtVector);
- *lwtVector = NULL;
- break;
- }
- case k7zIdMTime:
- {
- RINOK(SzReadBoolVector2(sd, numFiles, lwtVector, allocTemp));
- RINOK(SzReadSwitch(sd));
- for (i = 0; i < numFiles; i++)
- {
- CSzFileItem *f = &files[i];
- Byte defined = (*lwtVector)[i];
- f->MTimeDefined = defined;
- f->MTime.Low = f->MTime.High = 0;
- if (defined)
- {
- RINOK(SzReadUInt32(sd, &f->MTime.Low));
- RINOK(SzReadUInt32(sd, &f->MTime.High));
- }
- }
- IAlloc_Free(allocTemp, *lwtVector);
- *lwtVector = NULL;
- break;
- }
- default:
- {
- RINOK(SzSkeepDataSize(sd, size));
- }
- }
- }
-
- {
- UInt32 emptyFileIndex = 0;
- UInt32 sizeIndex = 0;
- for (i = 0; i < numFiles; i++)
- {
- CSzFileItem *file = files + i;
- file->IsAnti = 0;
- if (*emptyStreamVector == 0)
- file->HasStream = 1;
- else
- file->HasStream = (Byte)((*emptyStreamVector)[i] ? 0 : 1);
- if (file->HasStream)
- {
- file->IsDir = 0;
- file->Size = (*unpackSizes)[sizeIndex];
- file->Crc = (*digests)[sizeIndex];
- file->CrcDefined = (Byte)(*digestsDefined)[sizeIndex];
- sizeIndex++;
- }
- else
- {
- if (*emptyFileVector == 0)
- file->IsDir = 1;
- else
- file->IsDir = (Byte)((*emptyFileVector)[emptyFileIndex] ? 0 : 1);
- emptyFileIndex++;
- file->Size = 0;
- file->Crc = 0;
- file->CrcDefined = 0;
- }
- }
- }
- return SzArEx_Fill(p, allocMain);
+ UInt64 type;
+ UInt32 numUnpackStreams = 0;
+ UInt32 numFiles = 0;
+ CSzFileItem *files = 0;
+ UInt32 numEmptyStreams = 0;
+ UInt32 i;
+
+ RINOK(SzReadID(sd, &type));
+
+ if (type == k7zIdArchiveProperties)
+ {
+ RINOK(SzReadArchiveProperties(sd));
+ RINOK(SzReadID(sd, &type));
+ }
+
+
+ if (type == k7zIdMainStreamsInfo)
+ {
+ RINOK(SzReadStreamsInfo(sd,
+ &p->dataPos,
+ &p->db,
+ &numUnpackStreams,
+ unpackSizes,
+ digestsDefined,
+ digests, allocMain, allocTemp));
+ p->dataPos += p->startPosAfterHeader;
+ RINOK(SzReadID(sd, &type));
+ }
+
+ if (type == k7zIdEnd)
+ return SZ_OK;
+ if (type != k7zIdFilesInfo)
+ return SZ_ERROR_ARCHIVE;
+
+ RINOK(SzReadNumber32(sd, &numFiles));
+ p->db.NumFiles = numFiles;
+
+ MY_ALLOC(CSzFileItem, files, (size_t)numFiles, allocMain);
+
+ p->db.Files = files;
+ for (i = 0; i < numFiles; i++)
+ SzFile_Init(files + i);
+
+ for (;;)
+ {
+ UInt64 type;
+ UInt64 size;
+ RINOK(SzReadID(sd, &type));
+ if (type == k7zIdEnd)
+ break;
+ RINOK(SzReadNumber(sd, &size));
+ if (size > sd->Size)
+ return SZ_ERROR_ARCHIVE;
+ if ((UInt64)(int)type != type)
+ {
+ RINOK(SzSkeepDataSize(sd, size));
+ }
+ else
+ switch((int)type)
+ {
+ case k7zIdName:
+ {
+ size_t namesSize;
+ RINOK(SzReadSwitch(sd));
+ namesSize = (size_t)size - 1;
+ if ((namesSize & 1) != 0)
+ return SZ_ERROR_ARCHIVE;
+ if (!Buf_Create(&p->FileNames, namesSize, allocMain))
+ return SZ_ERROR_MEM;
+ MY_ALLOC(size_t, p->FileNameOffsets, numFiles + 1, allocMain);
+ memcpy(p->FileNames.data, sd->Data, namesSize);
+ RINOK(SzReadFileNames(sd->Data, namesSize >> 1, numFiles, p->FileNameOffsets))
+ RINOK(SzSkeepDataSize(sd, namesSize));
+ break;
+ }
+ case k7zIdEmptyStream:
+ {
+ RINOK(SzReadBoolVector(sd, numFiles, emptyStreamVector, allocTemp));
+ numEmptyStreams = 0;
+ for (i = 0; i < numFiles; i++)
+ if ((*emptyStreamVector)[i])
+ numEmptyStreams++;
+ break;
+ }
+ case k7zIdEmptyFile:
+ {
+ RINOK(SzReadBoolVector(sd, numEmptyStreams, emptyFileVector, allocTemp));
+ break;
+ }
+ case k7zIdWinAttributes:
+ {
+ RINOK(SzReadBoolVector2(sd, numFiles, lwtVector, allocTemp));
+ RINOK(SzReadSwitch(sd));
+ for (i = 0; i < numFiles; i++)
+ {
+ CSzFileItem *f = &files[i];
+ Byte defined = (*lwtVector)[i];
+ f->AttribDefined = defined;
+ f->Attrib = 0;
+ if (defined)
+ {
+ RINOK(SzReadUInt32(sd, &f->Attrib));
+ }
+ }
+ IAlloc_Free(allocTemp, *lwtVector);
+ *lwtVector = NULL;
+ break;
+ }
+ case k7zIdMTime:
+ {
+ RINOK(SzReadBoolVector2(sd, numFiles, lwtVector, allocTemp));
+ RINOK(SzReadSwitch(sd));
+ for (i = 0; i < numFiles; i++)
+ {
+ CSzFileItem *f = &files[i];
+ Byte defined = (*lwtVector)[i];
+ f->MTimeDefined = defined;
+ f->MTime.Low = f->MTime.High = 0;
+ if (defined)
+ {
+ RINOK(SzReadUInt32(sd, &f->MTime.Low));
+ RINOK(SzReadUInt32(sd, &f->MTime.High));
+ }
+ }
+ IAlloc_Free(allocTemp, *lwtVector);
+ *lwtVector = NULL;
+ break;
+ }
+ default:
+ {
+ RINOK(SzSkeepDataSize(sd, size));
+ }
+ }
+ }
+
+ {
+ UInt32 emptyFileIndex = 0;
+ UInt32 sizeIndex = 0;
+ for (i = 0; i < numFiles; i++)
+ {
+ CSzFileItem *file = files + i;
+ file->IsAnti = 0;
+ if (*emptyStreamVector == 0)
+ file->HasStream = 1;
+ else
+ file->HasStream = (Byte)((*emptyStreamVector)[i] ? 0 : 1);
+ if (file->HasStream)
+ {
+ file->IsDir = 0;
+ file->Size = (*unpackSizes)[sizeIndex];
+ file->Crc = (*digests)[sizeIndex];
+ file->CrcDefined = (Byte)(*digestsDefined)[sizeIndex];
+ sizeIndex++;
+ }
+ else
+ {
+ if (*emptyFileVector == 0)
+ file->IsDir = 1;
+ else
+ file->IsDir = (Byte)((*emptyFileVector)[emptyFileIndex] ? 0 : 1);
+ emptyFileIndex++;
+ file->Size = 0;
+ file->Crc = 0;
+ file->CrcDefined = 0;
+ }
+ }
+ }
+ return SzArEx_Fill(p, allocMain);
}
static SRes SzReadHeader(
- CSzArEx *p,
- CSzData *sd,
- ISzAlloc *allocMain,
- ISzAlloc *allocTemp)
+ CSzArEx *p,
+ CSzData *sd,
+ ISzAlloc *allocMain,
+ ISzAlloc *allocTemp)
{
- UInt64 *unpackSizes = 0;
- Byte *digestsDefined = 0;
- UInt32 *digests = 0;
- Byte *emptyStreamVector = 0;
- Byte *emptyFileVector = 0;
- Byte *lwtVector = 0;
- SRes res = SzReadHeader2(p, sd,
- &unpackSizes, &digestsDefined, &digests,
- &emptyStreamVector, &emptyFileVector, &lwtVector,
- allocMain, allocTemp);
- IAlloc_Free(allocTemp, unpackSizes);
- IAlloc_Free(allocTemp, digestsDefined);
- IAlloc_Free(allocTemp, digests);
- IAlloc_Free(allocTemp, emptyStreamVector);
- IAlloc_Free(allocTemp, emptyFileVector);
- IAlloc_Free(allocTemp, lwtVector);
- return res;
+ UInt64 *unpackSizes = 0;
+ Byte *digestsDefined = 0;
+ UInt32 *digests = 0;
+ Byte *emptyStreamVector = 0;
+ Byte *emptyFileVector = 0;
+ Byte *lwtVector = 0;
+ SRes res = SzReadHeader2(p, sd,
+ &unpackSizes, &digestsDefined, &digests,
+ &emptyStreamVector, &emptyFileVector, &lwtVector,
+ allocMain, allocTemp);
+ IAlloc_Free(allocTemp, unpackSizes);
+ IAlloc_Free(allocTemp, digestsDefined);
+ IAlloc_Free(allocTemp, digests);
+ IAlloc_Free(allocTemp, emptyStreamVector);
+ IAlloc_Free(allocTemp, emptyFileVector);
+ IAlloc_Free(allocTemp, lwtVector);
+ return res;
}
static SRes SzReadAndDecodePackedStreams2(
- ILookInStream *inStream,
- CSzData *sd,
- CBuf *outBuffer,
- UInt64 baseOffset,
- CSzAr *p,
- UInt64 **unpackSizes,
- Byte **digestsDefined,
- UInt32 **digests,
- ISzAlloc *allocTemp)
+ ILookInStream *inStream,
+ CSzData *sd,
+ CBuf *outBuffer,
+ UInt64 baseOffset,
+ CSzAr *p,
+ UInt64 **unpackSizes,
+ Byte **digestsDefined,
+ UInt32 **digests,
+ ISzAlloc *allocTemp)
{
- UInt32 numUnpackStreams = 0;
- UInt64 dataStartPos;
- CSzFolder *folder;
- UInt64 unpackSize;
- SRes res;
+ UInt32 numUnpackStreams = 0;
+ UInt64 dataStartPos;
+ CSzFolder *folder;
+ UInt64 unpackSize;
+ SRes res;
- RINOK(SzReadStreamsInfo(sd, &dataStartPos, p,
- &numUnpackStreams, unpackSizes, digestsDefined, digests,
- allocTemp, allocTemp));
+ RINOK(SzReadStreamsInfo(sd, &dataStartPos, p,
+ &numUnpackStreams, unpackSizes, digestsDefined, digests,
+ allocTemp, allocTemp));
- dataStartPos += baseOffset;
- if (p->NumFolders != 1)
- return SZ_ERROR_ARCHIVE;
+ dataStartPos += baseOffset;
+ if (p->NumFolders != 1)
+ return SZ_ERROR_ARCHIVE;
- folder = p->Folders;
- unpackSize = SzFolder_GetUnpackSize(folder);
+ folder = p->Folders;
+ unpackSize = SzFolder_GetUnpackSize(folder);
- RINOK(LookInStream_SeekTo(inStream, dataStartPos));
+ RINOK(LookInStream_SeekTo(inStream, dataStartPos));
- if (!Buf_Create(outBuffer, (size_t)unpackSize, allocTemp))
- return SZ_ERROR_MEM;
+ if (!Buf_Create(outBuffer, (size_t)unpackSize, allocTemp))
+ return SZ_ERROR_MEM;
- res = SzFolder_Decode(folder, p->PackSizes,
- inStream, dataStartPos,
- outBuffer->data, (size_t)unpackSize, allocTemp);
- RINOK(res);
- if (folder->UnpackCRCDefined)
- if (CrcCalc(outBuffer->data, (size_t)unpackSize) != folder->UnpackCRC)
- return SZ_ERROR_CRC;
- return SZ_OK;
+ res = SzFolder_Decode(folder, p->PackSizes,
+ inStream, dataStartPos,
+ outBuffer->data, (size_t)unpackSize, allocTemp);
+ RINOK(res);
+ if (folder->UnpackCRCDefined)
+ if (CrcCalc(outBuffer->data, (size_t)unpackSize) != folder->UnpackCRC)
+ return SZ_ERROR_CRC;
+ return SZ_OK;
}
static SRes SzReadAndDecodePackedStreams(
- ILookInStream *inStream,
- CSzData *sd,
- CBuf *outBuffer,
- UInt64 baseOffset,
- ISzAlloc *allocTemp)
+ ILookInStream *inStream,
+ CSzData *sd,
+ CBuf *outBuffer,
+ UInt64 baseOffset,
+ ISzAlloc *allocTemp)
{
- CSzAr p;
- UInt64 *unpackSizes = 0;
- Byte *digestsDefined = 0;
- UInt32 *digests = 0;
- SRes res;
- SzAr_Init(&p);
- res = SzReadAndDecodePackedStreams2(inStream, sd, outBuffer, baseOffset,
- &p, &unpackSizes, &digestsDefined, &digests,
- allocTemp);
- SzAr_Free(&p, allocTemp);
- IAlloc_Free(allocTemp, unpackSizes);
- IAlloc_Free(allocTemp, digestsDefined);
- IAlloc_Free(allocTemp, digests);
- return res;
+ CSzAr p;
+ UInt64 *unpackSizes = 0;
+ Byte *digestsDefined = 0;
+ UInt32 *digests = 0;
+ SRes res;
+ SzAr_Init(&p);
+ res = SzReadAndDecodePackedStreams2(inStream, sd, outBuffer, baseOffset,
+ &p, &unpackSizes, &digestsDefined, &digests,
+ allocTemp);
+ SzAr_Free(&p, allocTemp);
+ IAlloc_Free(allocTemp, unpackSizes);
+ IAlloc_Free(allocTemp, digestsDefined);
+ IAlloc_Free(allocTemp, digests);
+ return res;
}
static SRes SzArEx_Open2(
- CSzArEx *p,
- ILookInStream *inStream,
- ISzAlloc *allocMain,
- ISzAlloc *allocTemp)
+ CSzArEx *p,
+ ILookInStream *inStream,
+ ISzAlloc *allocMain,
+ ISzAlloc *allocTemp)
{
- Byte header[k7zStartHeaderSize];
- Int64 startArcPos;
- UInt64 nextHeaderOffset, nextHeaderSize;
- size_t nextHeaderSizeT;
- UInt32 nextHeaderCRC;
- CBuf buffer;
- SRes res;
-
- startArcPos = 0;
- RINOK(inStream->Seek(inStream, &startArcPos, SZ_SEEK_CUR));
-
- RINOK(LookInStream_Read2(inStream, header, k7zStartHeaderSize, SZ_ERROR_NO_ARCHIVE));
-
- if (!TestSignatureCandidate(header))
- return SZ_ERROR_NO_ARCHIVE;
- if (header[6] != k7zMajorVersion)
- return SZ_ERROR_UNSUPPORTED;
-
- nextHeaderOffset = GetUi64(header + 12);
- nextHeaderSize = GetUi64(header + 20);
- nextHeaderCRC = GetUi32(header + 28);
-
- p->startPosAfterHeader = startArcPos + k7zStartHeaderSize;
-
- if (CrcCalc(header + 12, 20) != GetUi32(header + 8))
- return SZ_ERROR_CRC;
-
- nextHeaderSizeT = (size_t)nextHeaderSize;
- if (nextHeaderSizeT != nextHeaderSize)
- return SZ_ERROR_MEM;
- if (nextHeaderSizeT == 0)
- return SZ_OK;
- if (nextHeaderOffset > nextHeaderOffset + nextHeaderSize ||
- nextHeaderOffset > nextHeaderOffset + nextHeaderSize + k7zStartHeaderSize)
- return SZ_ERROR_NO_ARCHIVE;
-
- {
- Int64 pos = 0;
- RINOK(inStream->Seek(inStream, &pos, SZ_SEEK_END));
- if ((UInt64)pos < startArcPos + nextHeaderOffset ||
- (UInt64)pos < startArcPos + k7zStartHeaderSize + nextHeaderOffset ||
- (UInt64)pos < startArcPos + k7zStartHeaderSize + nextHeaderOffset + nextHeaderSize)
- return SZ_ERROR_INPUT_EOF;
- }
-
- RINOK(LookInStream_SeekTo(inStream, startArcPos + k7zStartHeaderSize + nextHeaderOffset));
-
- if (!Buf_Create(&buffer, nextHeaderSizeT, allocTemp))
- return SZ_ERROR_MEM;
-
- res = LookInStream_Read(inStream, buffer.data, nextHeaderSizeT);
- if (res == SZ_OK)
- {
- res = SZ_ERROR_ARCHIVE;
- if (CrcCalc(buffer.data, nextHeaderSizeT) == nextHeaderCRC)
- {
- CSzData sd;
- UInt64 type;
- sd.Data = buffer.data;
- sd.Size = buffer.size;
- res = SzReadID(&sd, &type);
- if (res == SZ_OK)
- {
- if (type == k7zIdEncodedHeader)
- {
- CBuf outBuffer;
- Buf_Init(&outBuffer);
- res = SzReadAndDecodePackedStreams(inStream, &sd, &outBuffer, p->startPosAfterHeader, allocTemp);
- if (res != SZ_OK)
- Buf_Free(&outBuffer, allocTemp);
- else
- {
- Buf_Free(&buffer, allocTemp);
- buffer.data = outBuffer.data;
- buffer.size = outBuffer.size;
- sd.Data = buffer.data;
- sd.Size = buffer.size;
- res = SzReadID(&sd, &type);
- }
- }
- }
- if (res == SZ_OK)
- {
- if (type == k7zIdHeader)
- res = SzReadHeader(p, &sd, allocMain, allocTemp);
- else
- res = SZ_ERROR_UNSUPPORTED;
- }
- }
- }
- Buf_Free(&buffer, allocTemp);
- return res;
+ Byte header[k7zStartHeaderSize];
+ Int64 startArcPos;
+ UInt64 nextHeaderOffset, nextHeaderSize;
+ size_t nextHeaderSizeT;
+ UInt32 nextHeaderCRC;
+ CBuf buffer;
+ SRes res;
+
+ startArcPos = 0;
+ RINOK(inStream->Seek(inStream, &startArcPos, SZ_SEEK_CUR));
+
+ RINOK(LookInStream_Read2(inStream, header, k7zStartHeaderSize, SZ_ERROR_NO_ARCHIVE));
+
+ if (!TestSignatureCandidate(header))
+ return SZ_ERROR_NO_ARCHIVE;
+ if (header[6] != k7zMajorVersion)
+ return SZ_ERROR_UNSUPPORTED;
+
+ nextHeaderOffset = GetUi64(header + 12);
+ nextHeaderSize = GetUi64(header + 20);
+ nextHeaderCRC = GetUi32(header + 28);
+
+ p->startPosAfterHeader = startArcPos + k7zStartHeaderSize;
+
+ if (CrcCalc(header + 12, 20) != GetUi32(header + 8))
+ return SZ_ERROR_CRC;
+
+ nextHeaderSizeT = (size_t)nextHeaderSize;
+ if (nextHeaderSizeT != nextHeaderSize)
+ return SZ_ERROR_MEM;
+ if (nextHeaderSizeT == 0)
+ return SZ_OK;
+ if (nextHeaderOffset > nextHeaderOffset + nextHeaderSize ||
+ nextHeaderOffset > nextHeaderOffset + nextHeaderSize + k7zStartHeaderSize)
+ return SZ_ERROR_NO_ARCHIVE;
+
+ {
+ Int64 pos = 0;
+ RINOK(inStream->Seek(inStream, &pos, SZ_SEEK_END));
+ if ((UInt64)pos < startArcPos + nextHeaderOffset ||
+ (UInt64)pos < startArcPos + k7zStartHeaderSize + nextHeaderOffset ||
+ (UInt64)pos < startArcPos + k7zStartHeaderSize + nextHeaderOffset + nextHeaderSize)
+ return SZ_ERROR_INPUT_EOF;
+ }
+
+ RINOK(LookInStream_SeekTo(inStream, startArcPos + k7zStartHeaderSize + nextHeaderOffset));
+
+ if (!Buf_Create(&buffer, nextHeaderSizeT, allocTemp))
+ return SZ_ERROR_MEM;
+
+ res = LookInStream_Read(inStream, buffer.data, nextHeaderSizeT);
+ if (res == SZ_OK)
+ {
+ res = SZ_ERROR_ARCHIVE;
+ if (CrcCalc(buffer.data, nextHeaderSizeT) == nextHeaderCRC)
+ {
+ CSzData sd;
+ UInt64 type;
+ sd.Data = buffer.data;
+ sd.Size = buffer.size;
+ res = SzReadID(&sd, &type);
+ if (res == SZ_OK)
+ {
+ if (type == k7zIdEncodedHeader)
+ {
+ CBuf outBuffer;
+ Buf_Init(&outBuffer);
+ res = SzReadAndDecodePackedStreams(inStream, &sd, &outBuffer, p->startPosAfterHeader, allocTemp);
+ if (res != SZ_OK)
+ Buf_Free(&outBuffer, allocTemp);
+ else
+ {
+ Buf_Free(&buffer, allocTemp);
+ buffer.data = outBuffer.data;
+ buffer.size = outBuffer.size;
+ sd.Data = buffer.data;
+ sd.Size = buffer.size;
+ res = SzReadID(&sd, &type);
+ }
+ }
+ }
+ if (res == SZ_OK)
+ {
+ if (type == k7zIdHeader)
+ res = SzReadHeader(p, &sd, allocMain, allocTemp);
+ else
+ res = SZ_ERROR_UNSUPPORTED;
+ }
+ }
+ }
+ Buf_Free(&buffer, allocTemp);
+ return res;
}
SRes SzArEx_Open(CSzArEx *p, ILookInStream *inStream, ISzAlloc *allocMain, ISzAlloc *allocTemp)
{
- SRes res = SzArEx_Open2(p, inStream, allocMain, allocTemp);
- if (res != SZ_OK)
- SzArEx_Free(p, allocMain);
- return res;
+ SRes res = SzArEx_Open2(p, inStream, allocMain, allocTemp);
+ if (res != SZ_OK)
+ SzArEx_Free(p, allocMain);
+ return res;
}
SRes SzArEx_Extract(
- const CSzArEx *p,
- ILookInStream *inStream,
- UInt32 fileIndex,
- UInt32 *blockIndex,
- Byte **outBuffer,
- size_t *outBufferSize,
- size_t *offset,
- size_t *outSizeProcessed,
- ISzAlloc *allocMain,
- ISzAlloc *allocTemp)
+ const CSzArEx *p,
+ ILookInStream *inStream,
+ UInt32 fileIndex,
+ UInt32 *blockIndex,
+ Byte **outBuffer,
+ size_t *outBufferSize,
+ size_t *offset,
+ size_t *outSizeProcessed,
+ ISzAlloc *allocMain,
+ ISzAlloc *allocTemp)
{
- UInt32 folderIndex = p->FileIndexToFolderIndexMap[fileIndex];
- SRes res = SZ_OK;
- *offset = 0;
- *outSizeProcessed = 0;
- if (folderIndex == (UInt32)-1)
- {
- IAlloc_Free(allocMain, *outBuffer);
- *blockIndex = folderIndex;
- *outBuffer = 0;
- *outBufferSize = 0;
- return SZ_OK;
- }
-
- if (*outBuffer == 0 || *blockIndex != folderIndex)
- {
- CSzFolder *folder = p->db.Folders + folderIndex;
- UInt64 unpackSizeSpec = SzFolder_GetUnpackSize(folder);
- size_t unpackSize = (size_t)unpackSizeSpec;
- UInt64 startOffset = SzArEx_GetFolderStreamPos(p, folderIndex, 0);
-
- if (unpackSize != unpackSizeSpec)
- return SZ_ERROR_MEM;
- *blockIndex = folderIndex;
- IAlloc_Free(allocMain, *outBuffer);
- *outBuffer = 0;
-
- RINOK(LookInStream_SeekTo(inStream, startOffset));
-
- if (res == SZ_OK)
- {
- *outBufferSize = unpackSize;
- if (unpackSize != 0)
- {
- *outBuffer = (Byte *)IAlloc_Alloc(allocMain, unpackSize);
- if (*outBuffer == 0)
- res = SZ_ERROR_MEM;
- }
- if (res == SZ_OK)
- {
- res = SzFolder_Decode(folder,
- p->db.PackSizes + p->FolderStartPackStreamIndex[folderIndex],
- inStream, startOffset,
- *outBuffer, unpackSize, allocTemp);
- if (res == SZ_OK)
- {
- if (folder->UnpackCRCDefined)
- {
- if (CrcCalc(*outBuffer, unpackSize) != folder->UnpackCRC)
- res = SZ_ERROR_CRC;
- }
- }
- }
- }
- }
- if (res == SZ_OK)
- {
- UInt32 i;
- CSzFileItem *fileItem = p->db.Files + fileIndex;
- *offset = 0;
- for (i = p->FolderStartFileIndex[folderIndex]; i < fileIndex; i++)
- *offset += (UInt32)p->db.Files[i].Size;
- *outSizeProcessed = (size_t)fileItem->Size;
- if (*offset + *outSizeProcessed > *outBufferSize)
- return SZ_ERROR_FAIL;
- if (fileItem->CrcDefined && CrcCalc(*outBuffer + *offset, *outSizeProcessed) != fileItem->Crc)
- res = SZ_ERROR_CRC;
- }
- return res;
+ UInt32 folderIndex = p->FileIndexToFolderIndexMap[fileIndex];
+ SRes res = SZ_OK;
+ *offset = 0;
+ *outSizeProcessed = 0;
+ if (folderIndex == (UInt32)-1)
+ {
+ IAlloc_Free(allocMain, *outBuffer);
+ *blockIndex = folderIndex;
+ *outBuffer = 0;
+ *outBufferSize = 0;
+ return SZ_OK;
+ }
+
+ if (*outBuffer == 0 || *blockIndex != folderIndex)
+ {
+ CSzFolder *folder = p->db.Folders + folderIndex;
+ UInt64 unpackSizeSpec = SzFolder_GetUnpackSize(folder);
+ size_t unpackSize = (size_t)unpackSizeSpec;
+ UInt64 startOffset = SzArEx_GetFolderStreamPos(p, folderIndex, 0);
+
+ if (unpackSize != unpackSizeSpec)
+ return SZ_ERROR_MEM;
+ *blockIndex = folderIndex;
+ IAlloc_Free(allocMain, *outBuffer);
+ *outBuffer = 0;
+
+ RINOK(LookInStream_SeekTo(inStream, startOffset));
+
+ if (res == SZ_OK)
+ {
+ *outBufferSize = unpackSize;
+ if (unpackSize != 0)
+ {
+ *outBuffer = (Byte *)IAlloc_Alloc(allocMain, unpackSize);
+ if (*outBuffer == 0)
+ res = SZ_ERROR_MEM;
+ }
+ if (res == SZ_OK)
+ {
+ res = SzFolder_Decode(folder,
+ p->db.PackSizes + p->FolderStartPackStreamIndex[folderIndex],
+ inStream, startOffset,
+ *outBuffer, unpackSize, allocTemp);
+ if (res == SZ_OK)
+ {
+ if (folder->UnpackCRCDefined)
+ {
+ if (CrcCalc(*outBuffer, unpackSize) != folder->UnpackCRC)
+ res = SZ_ERROR_CRC;
+ }
+ }
+ }
+ }
+ }
+ if (res == SZ_OK)
+ {
+ UInt32 i;
+ CSzFileItem *fileItem = p->db.Files + fileIndex;
+ *offset = 0;
+ for (i = p->FolderStartFileIndex[folderIndex]; i < fileIndex; i++)
+ *offset += (UInt32)p->db.Files[i].Size;
+ *outSizeProcessed = (size_t)fileItem->Size;
+ if (*offset + *outSizeProcessed > *outBufferSize)
+ return SZ_ERROR_FAIL;
+ if (fileItem->CrcDefined && CrcCalc(*outBuffer + *offset, *outSizeProcessed) != fileItem->Crc)
+ res = SZ_ERROR_CRC;
+ }
+ return res;
}
diff --git a/src/lib/lib7z/7zStream.c b/src/lib/lib7z/7zStream.c
index 0ebb7b5f93c..61488bfc78c 100644
--- a/src/lib/lib7z/7zStream.c
+++ b/src/lib/lib7z/7zStream.c
@@ -7,163 +7,163 @@
SRes SeqInStream_Read2(ISeqInStream *stream, void *buf, size_t size, SRes errorType)
{
- while (size != 0)
- {
- size_t processed = size;
- RINOK(stream->Read(stream, buf, &processed));
- if (processed == 0)
- return errorType;
- buf = (void *)((Byte *)buf + processed);
- size -= processed;
- }
- return SZ_OK;
+ while (size != 0)
+ {
+ size_t processed = size;
+ RINOK(stream->Read(stream, buf, &processed));
+ if (processed == 0)
+ return errorType;
+ buf = (void *)((Byte *)buf + processed);
+ size -= processed;
+ }
+ return SZ_OK;
}
SRes SeqInStream_Read(ISeqInStream *stream, void *buf, size_t size)
{
- return SeqInStream_Read2(stream, buf, size, SZ_ERROR_INPUT_EOF);
+ return SeqInStream_Read2(stream, buf, size, SZ_ERROR_INPUT_EOF);
}
SRes SeqInStream_ReadByte(ISeqInStream *stream, Byte *buf)
{
- size_t processed = 1;
- RINOK(stream->Read(stream, buf, &processed));
- return (processed == 1) ? SZ_OK : SZ_ERROR_INPUT_EOF;
+ size_t processed = 1;
+ RINOK(stream->Read(stream, buf, &processed));
+ return (processed == 1) ? SZ_OK : SZ_ERROR_INPUT_EOF;
}
SRes LookInStream_SeekTo(ILookInStream *stream, UInt64 offset)
{
- Int64 t = offset;
- return stream->Seek(stream, &t, SZ_SEEK_SET);
+ Int64 t = offset;
+ return stream->Seek(stream, &t, SZ_SEEK_SET);
}
SRes LookInStream_LookRead(ILookInStream *stream, void *buf, size_t *size)
{
- const void *lookBuf;
- if (*size == 0)
- return SZ_OK;
- RINOK(stream->Look(stream, &lookBuf, size));
- memcpy(buf, lookBuf, *size);
- return stream->Skip(stream, *size);
+ const void *lookBuf;
+ if (*size == 0)
+ return SZ_OK;
+ RINOK(stream->Look(stream, &lookBuf, size));
+ memcpy(buf, lookBuf, *size);
+ return stream->Skip(stream, *size);
}
SRes LookInStream_Read2(ILookInStream *stream, void *buf, size_t size, SRes errorType)
{
- while (size != 0)
- {
- size_t processed = size;
- RINOK(stream->Read(stream, buf, &processed));
- if (processed == 0)
- return errorType;
- buf = (void *)((Byte *)buf + processed);
- size -= processed;
- }
- return SZ_OK;
+ while (size != 0)
+ {
+ size_t processed = size;
+ RINOK(stream->Read(stream, buf, &processed));
+ if (processed == 0)
+ return errorType;
+ buf = (void *)((Byte *)buf + processed);
+ size -= processed;
+ }
+ return SZ_OK;
}
SRes LookInStream_Read(ILookInStream *stream, void *buf, size_t size)
{
- return LookInStream_Read2(stream, buf, size, SZ_ERROR_INPUT_EOF);
+ return LookInStream_Read2(stream, buf, size, SZ_ERROR_INPUT_EOF);
}
static SRes LookToRead_Look_Lookahead(void *pp, const void **buf, size_t *size)
{
- SRes res = SZ_OK;
- CLookToRead *p = (CLookToRead *)pp;
- size_t size2 = p->size - p->pos;
- if (size2 == 0 && *size > 0)
- {
- p->pos = 0;
- size2 = LookToRead_BUF_SIZE;
- res = p->realStream->Read(p->realStream, p->buf, &size2);
- p->size = size2;
- }
- if (size2 < *size)
- *size = size2;
- *buf = p->buf + p->pos;
- return res;
+ SRes res = SZ_OK;
+ CLookToRead *p = (CLookToRead *)pp;
+ size_t size2 = p->size - p->pos;
+ if (size2 == 0 && *size > 0)
+ {
+ p->pos = 0;
+ size2 = LookToRead_BUF_SIZE;
+ res = p->realStream->Read(p->realStream, p->buf, &size2);
+ p->size = size2;
+ }
+ if (size2 < *size)
+ *size = size2;
+ *buf = p->buf + p->pos;
+ return res;
}
static SRes LookToRead_Look_Exact(void *pp, const void **buf, size_t *size)
{
- SRes res = SZ_OK;
- CLookToRead *p = (CLookToRead *)pp;
- size_t size2 = p->size - p->pos;
- if (size2 == 0 && *size > 0)
- {
- p->pos = 0;
- if (*size > LookToRead_BUF_SIZE)
- *size = LookToRead_BUF_SIZE;
- res = p->realStream->Read(p->realStream, p->buf, size);
- size2 = p->size = *size;
- }
- if (size2 < *size)
- *size = size2;
- *buf = p->buf + p->pos;
- return res;
+ SRes res = SZ_OK;
+ CLookToRead *p = (CLookToRead *)pp;
+ size_t size2 = p->size - p->pos;
+ if (size2 == 0 && *size > 0)
+ {
+ p->pos = 0;
+ if (*size > LookToRead_BUF_SIZE)
+ *size = LookToRead_BUF_SIZE;
+ res = p->realStream->Read(p->realStream, p->buf, size);
+ size2 = p->size = *size;
+ }
+ if (size2 < *size)
+ *size = size2;
+ *buf = p->buf + p->pos;
+ return res;
}
static SRes LookToRead_Skip(void *pp, size_t offset)
{
- CLookToRead *p = (CLookToRead *)pp;
- p->pos += offset;
- return SZ_OK;
+ CLookToRead *p = (CLookToRead *)pp;
+ p->pos += offset;
+ return SZ_OK;
}
static SRes LookToRead_Read(void *pp, void *buf, size_t *size)
{
- CLookToRead *p = (CLookToRead *)pp;
- size_t rem = p->size - p->pos;
- if (rem == 0)
- return p->realStream->Read(p->realStream, buf, size);
- if (rem > *size)
- rem = *size;
- memcpy(buf, p->buf + p->pos, rem);
- p->pos += rem;
- *size = rem;
- return SZ_OK;
+ CLookToRead *p = (CLookToRead *)pp;
+ size_t rem = p->size - p->pos;
+ if (rem == 0)
+ return p->realStream->Read(p->realStream, buf, size);
+ if (rem > *size)
+ rem = *size;
+ memcpy(buf, p->buf + p->pos, rem);
+ p->pos += rem;
+ *size = rem;
+ return SZ_OK;
}
static SRes LookToRead_Seek(void *pp, Int64 *pos, ESzSeek origin)
{
- CLookToRead *p = (CLookToRead *)pp;
- p->pos = p->size = 0;
- return p->realStream->Seek(p->realStream, pos, origin);
+ CLookToRead *p = (CLookToRead *)pp;
+ p->pos = p->size = 0;
+ return p->realStream->Seek(p->realStream, pos, origin);
}
void LookToRead_CreateVTable(CLookToRead *p, int lookahead)
{
- p->s.Look = lookahead ?
- LookToRead_Look_Lookahead :
- LookToRead_Look_Exact;
- p->s.Skip = LookToRead_Skip;
- p->s.Read = LookToRead_Read;
- p->s.Seek = LookToRead_Seek;
+ p->s.Look = lookahead ?
+ LookToRead_Look_Lookahead :
+ LookToRead_Look_Exact;
+ p->s.Skip = LookToRead_Skip;
+ p->s.Read = LookToRead_Read;
+ p->s.Seek = LookToRead_Seek;
}
void LookToRead_Init(CLookToRead *p)
{
- p->pos = p->size = 0;
+ p->pos = p->size = 0;
}
static SRes SecToLook_Read(void *pp, void *buf, size_t *size)
{
- CSecToLook *p = (CSecToLook *)pp;
- return LookInStream_LookRead(p->realStream, buf, size);
+ CSecToLook *p = (CSecToLook *)pp;
+ return LookInStream_LookRead(p->realStream, buf, size);
}
void SecToLook_CreateVTable(CSecToLook *p)
{
- p->s.Read = SecToLook_Read;
+ p->s.Read = SecToLook_Read;
}
static SRes SecToRead_Read(void *pp, void *buf, size_t *size)
{
- CSecToRead *p = (CSecToRead *)pp;
- return p->realStream->Read(p->realStream, buf, size);
+ CSecToRead *p = (CSecToRead *)pp;
+ return p->realStream->Read(p->realStream, buf, size);
}
void SecToRead_CreateVTable(CSecToRead *p)
{
- p->s.Read = SecToRead_Read;
+ p->s.Read = SecToRead_Read;
}
diff --git a/src/lib/lib7z/Aes.c b/src/lib/lib7z/Aes.c
index 2bdfc9b9af9..82da09473cd 100644
--- a/src/lib/lib7z/Aes.c
+++ b/src/lib/lib7z/Aes.c
@@ -6,22 +6,22 @@
static UInt32 T[256 * 4];
static Byte Sbox[256] = {
- 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
- 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
- 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
- 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
- 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
- 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
- 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
- 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
- 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
- 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
- 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
- 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
- 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
- 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
- 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
- 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16};
+ 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
+ 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
+ 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
+ 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
+ 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
+ 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
+ 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
+ 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
+ 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
+ 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
+ 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
+ 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
+ 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
+ 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
+ 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
+ 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16};
void MY_FAST_CALL AesCbc_Encode(UInt32 *ivAes, Byte *data, size_t numBlocks);
void MY_FAST_CALL AesCbc_Decode(UInt32 *ivAes, Byte *data, size_t numBlocks);
@@ -51,118 +51,118 @@ static Byte Rcon[11] = { 0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0
void AesGenTables(void)
{
- unsigned i;
- for (i = 0; i < 256; i++)
- InvS[Sbox[i]] = (Byte)i;
- for (i = 0; i < 256; i++)
- {
- {
- UInt32 a1 = Sbox[i];
- UInt32 a2 = xtime(a1);
- UInt32 a3 = a2 ^ a1;
- T[ i] = Ui32(a2, a1, a1, a3);
- T[0x100 + i] = Ui32(a3, a2, a1, a1);
- T[0x200 + i] = Ui32(a1, a3, a2, a1);
- T[0x300 + i] = Ui32(a1, a1, a3, a2);
- }
- {
- UInt32 a1 = InvS[i];
- UInt32 a2 = xtime(a1);
- UInt32 a4 = xtime(a2);
- UInt32 a8 = xtime(a4);
- UInt32 a9 = a8 ^ a1;
- UInt32 aB = a8 ^ a2 ^ a1;
- UInt32 aD = a8 ^ a4 ^ a1;
- UInt32 aE = a8 ^ a4 ^ a2;
- D[ i] = Ui32(aE, a9, aD, aB);
- D[0x100 + i] = Ui32(aB, aE, a9, aD);
- D[0x200 + i] = Ui32(aD, aB, aE, a9);
- D[0x300 + i] = Ui32(a9, aD, aB, aE);
- }
- }
- g_AesCbc_Encode = AesCbc_Encode;
- g_AesCbc_Decode = AesCbc_Decode;
- g_AesCtr_Code = AesCtr_Code;
- #ifdef MY_CPU_X86_OR_AMD64
- if (CPU_Is_Aes_Supported())
- {
- g_AesCbc_Encode = AesCbc_Encode_Intel;
- g_AesCbc_Decode = AesCbc_Decode_Intel;
- g_AesCtr_Code = AesCtr_Code_Intel;
- }
- #endif
+ unsigned i;
+ for (i = 0; i < 256; i++)
+ InvS[Sbox[i]] = (Byte)i;
+ for (i = 0; i < 256; i++)
+ {
+ {
+ UInt32 a1 = Sbox[i];
+ UInt32 a2 = xtime(a1);
+ UInt32 a3 = a2 ^ a1;
+ T[ i] = Ui32(a2, a1, a1, a3);
+ T[0x100 + i] = Ui32(a3, a2, a1, a1);
+ T[0x200 + i] = Ui32(a1, a3, a2, a1);
+ T[0x300 + i] = Ui32(a1, a1, a3, a2);
+ }
+ {
+ UInt32 a1 = InvS[i];
+ UInt32 a2 = xtime(a1);
+ UInt32 a4 = xtime(a2);
+ UInt32 a8 = xtime(a4);
+ UInt32 a9 = a8 ^ a1;
+ UInt32 aB = a8 ^ a2 ^ a1;
+ UInt32 aD = a8 ^ a4 ^ a1;
+ UInt32 aE = a8 ^ a4 ^ a2;
+ D[ i] = Ui32(aE, a9, aD, aB);
+ D[0x100 + i] = Ui32(aB, aE, a9, aD);
+ D[0x200 + i] = Ui32(aD, aB, aE, a9);
+ D[0x300 + i] = Ui32(a9, aD, aB, aE);
+ }
+ }
+ g_AesCbc_Encode = AesCbc_Encode;
+ g_AesCbc_Decode = AesCbc_Decode;
+ g_AesCtr_Code = AesCtr_Code;
+ #ifdef MY_CPU_X86_OR_AMD64
+ if (CPU_Is_Aes_Supported())
+ {
+ g_AesCbc_Encode = AesCbc_Encode_Intel;
+ g_AesCbc_Decode = AesCbc_Decode_Intel;
+ g_AesCtr_Code = AesCtr_Code_Intel;
+ }
+ #endif
}
#define HT(i, x, s) (T + (x << 8))[gb ## x(s[(i + x) & 3])]
#define HT4(m, i, s, p) m[i] = \
- HT(i, 0, s) ^ \
- HT(i, 1, s) ^ \
- HT(i, 2, s) ^ \
- HT(i, 3, s) ^ w[p + i]
+ HT(i, 0, s) ^ \
+ HT(i, 1, s) ^ \
+ HT(i, 2, s) ^ \
+ HT(i, 3, s) ^ w[p + i]
/* such order (2031) in HT16 is for VC6/K8 speed optimization) */
#define HT16(m, s, p) \
- HT4(m, 2, s, p); \
- HT4(m, 0, s, p); \
- HT4(m, 3, s, p); \
- HT4(m, 1, s, p); \
+ HT4(m, 2, s, p); \
+ HT4(m, 0, s, p); \
+ HT4(m, 3, s, p); \
+ HT4(m, 1, s, p); \
#define FT(i, x) Sbox[gb ## x(m[(i + x) & 3])]
#define FT4(i) dest[i] = Ui32(FT(i, 0), FT(i, 1), FT(i, 2), FT(i, 3)) ^ w[i];
#define HD(i, x, s) (D + (x << 8))[gb ## x(s[(i - x) & 3])]
#define HD4(m, i, s, p) m[i] = \
- HD(i, 0, s) ^ \
- HD(i, 1, s) ^ \
- HD(i, 2, s) ^ \
- HD(i, 3, s) ^ w[p + i];
+ HD(i, 0, s) ^ \
+ HD(i, 1, s) ^ \
+ HD(i, 2, s) ^ \
+ HD(i, 3, s) ^ w[p + i];
/* such order (0231) in HD16 is for VC6/K8 speed optimization) */
#define HD16(m, s, p) \
- HD4(m, 0, s, p); \
- HD4(m, 2, s, p); \
- HD4(m, 3, s, p); \
- HD4(m, 1, s, p); \
+ HD4(m, 0, s, p); \
+ HD4(m, 2, s, p); \
+ HD4(m, 3, s, p); \
+ HD4(m, 1, s, p); \
#define FD(i, x) InvS[gb ## x(m[(i - x) & 3])]
#define FD4(i) dest[i] = Ui32(FD(i, 0), FD(i, 1), FD(i, 2), FD(i, 3)) ^ w[i];
void MY_FAST_CALL Aes_SetKey_Enc(UInt32 *w, const Byte *key, unsigned keySize)
{
- unsigned i, wSize;
- wSize = keySize + 28;
- keySize /= 4;
- w[0] = ((UInt32)keySize / 2) + 3;
- w += 4;
+ unsigned i, wSize;
+ wSize = keySize + 28;
+ keySize /= 4;
+ w[0] = ((UInt32)keySize / 2) + 3;
+ w += 4;
- for (i = 0; i < keySize; i++, key += 4)
- w[i] = GetUi32(key);
+ for (i = 0; i < keySize; i++, key += 4)
+ w[i] = GetUi32(key);
- for (; i < wSize; i++)
- {
- UInt32 t = w[i - 1];
- unsigned rem = i % keySize;
- if (rem == 0)
- t = Ui32(Sbox[gb1(t)] ^ Rcon[i / keySize], Sbox[gb2(t)], Sbox[gb3(t)], Sbox[gb0(t)]);
- else if (keySize > 6 && rem == 4)
- t = Ui32(Sbox[gb0(t)], Sbox[gb1(t)], Sbox[gb2(t)], Sbox[gb3(t)]);
- w[i] = w[i - keySize] ^ t;
- }
+ for (; i < wSize; i++)
+ {
+ UInt32 t = w[i - 1];
+ unsigned rem = i % keySize;
+ if (rem == 0)
+ t = Ui32(Sbox[gb1(t)] ^ Rcon[i / keySize], Sbox[gb2(t)], Sbox[gb3(t)], Sbox[gb0(t)]);
+ else if (keySize > 6 && rem == 4)
+ t = Ui32(Sbox[gb0(t)], Sbox[gb1(t)], Sbox[gb2(t)], Sbox[gb3(t)]);
+ w[i] = w[i - keySize] ^ t;
+ }
}
void MY_FAST_CALL Aes_SetKey_Dec(UInt32 *w, const Byte *key, unsigned keySize)
{
- unsigned i, num;
- Aes_SetKey_Enc(w, key, keySize);
- num = keySize + 20;
- w += 8;
- for (i = 0; i < num; i++)
- {
- UInt32 r = w[i];
- w[i] =
- D[ Sbox[gb0(r)]] ^
- D[0x100 + Sbox[gb1(r)]] ^
- D[0x200 + Sbox[gb2(r)]] ^
- D[0x300 + Sbox[gb3(r)]];
- }
+ unsigned i, num;
+ Aes_SetKey_Enc(w, key, keySize);
+ num = keySize + 20;
+ w += 8;
+ for (i = 0; i < num; i++)
+ {
+ UInt32 r = w[i];
+ w[i] =
+ D[ Sbox[gb0(r)]] ^
+ D[0x100 + Sbox[gb1(r)]] ^
+ D[0x200 + Sbox[gb2(r)]] ^
+ D[0x300 + Sbox[gb3(r)]];
+ }
}
/* Aes_Encode and Aes_Decode functions work with little-endian words.
@@ -171,112 +171,112 @@ void MY_FAST_CALL Aes_SetKey_Dec(UInt32 *w, const Byte *key, unsigned keySize)
static void Aes_Encode(const UInt32 *w, UInt32 *dest, const UInt32 *src)
{
- UInt32 s[4];
- UInt32 m[4];
- UInt32 numRounds2 = w[0];
- w += 4;
- s[0] = src[0] ^ w[0];
- s[1] = src[1] ^ w[1];
- s[2] = src[2] ^ w[2];
- s[3] = src[3] ^ w[3];
- w += 4;
- for (;;)
- {
- HT16(m, s, 0);
- if (--numRounds2 == 0)
- break;
- HT16(s, m, 4);
- w += 8;
- }
- w += 4;
- FT4(0); FT4(1); FT4(2); FT4(3);
+ UInt32 s[4];
+ UInt32 m[4];
+ UInt32 numRounds2 = w[0];
+ w += 4;
+ s[0] = src[0] ^ w[0];
+ s[1] = src[1] ^ w[1];
+ s[2] = src[2] ^ w[2];
+ s[3] = src[3] ^ w[3];
+ w += 4;
+ for (;;)
+ {
+ HT16(m, s, 0);
+ if (--numRounds2 == 0)
+ break;
+ HT16(s, m, 4);
+ w += 8;
+ }
+ w += 4;
+ FT4(0); FT4(1); FT4(2); FT4(3);
}
static void Aes_Decode(const UInt32 *w, UInt32 *dest, const UInt32 *src)
{
- UInt32 s[4];
- UInt32 m[4];
- UInt32 numRounds2 = w[0];
- w += 4 + numRounds2 * 8;
- s[0] = src[0] ^ w[0];
- s[1] = src[1] ^ w[1];
- s[2] = src[2] ^ w[2];
- s[3] = src[3] ^ w[3];
- for (;;)
- {
- w -= 8;
- HD16(m, s, 4);
- if (--numRounds2 == 0)
- break;
- HD16(s, m, 0);
- }
- FD4(0); FD4(1); FD4(2); FD4(3);
+ UInt32 s[4];
+ UInt32 m[4];
+ UInt32 numRounds2 = w[0];
+ w += 4 + numRounds2 * 8;
+ s[0] = src[0] ^ w[0];
+ s[1] = src[1] ^ w[1];
+ s[2] = src[2] ^ w[2];
+ s[3] = src[3] ^ w[3];
+ for (;;)
+ {
+ w -= 8;
+ HD16(m, s, 4);
+ if (--numRounds2 == 0)
+ break;
+ HD16(s, m, 0);
+ }
+ FD4(0); FD4(1); FD4(2); FD4(3);
}
void AesCbc_Init(UInt32 *p, const Byte *iv)
{
- unsigned i;
- for (i = 0; i < 4; i++)
- p[i] = GetUi32(iv + i * 4);
+ unsigned i;
+ for (i = 0; i < 4; i++)
+ p[i] = GetUi32(iv + i * 4);
}
void MY_FAST_CALL AesCbc_Encode(UInt32 *p, Byte *data, size_t numBlocks)
{
- for (; numBlocks != 0; numBlocks--, data += AES_BLOCK_SIZE)
- {
- p[0] ^= GetUi32(data);
- p[1] ^= GetUi32(data + 4);
- p[2] ^= GetUi32(data + 8);
- p[3] ^= GetUi32(data + 12);
+ for (; numBlocks != 0; numBlocks--, data += AES_BLOCK_SIZE)
+ {
+ p[0] ^= GetUi32(data);
+ p[1] ^= GetUi32(data + 4);
+ p[2] ^= GetUi32(data + 8);
+ p[3] ^= GetUi32(data + 12);
- Aes_Encode(p + 4, p, p);
+ Aes_Encode(p + 4, p, p);
- SetUi32(data, p[0]);
- SetUi32(data + 4, p[1]);
- SetUi32(data + 8, p[2]);
- SetUi32(data + 12, p[3]);
- }
+ SetUi32(data, p[0]);
+ SetUi32(data + 4, p[1]);
+ SetUi32(data + 8, p[2]);
+ SetUi32(data + 12, p[3]);
+ }
}
void MY_FAST_CALL AesCbc_Decode(UInt32 *p, Byte *data, size_t numBlocks)
{
- UInt32 in[4], out[4];
- for (; numBlocks != 0; numBlocks--, data += AES_BLOCK_SIZE)
- {
- in[0] = GetUi32(data);
- in[1] = GetUi32(data + 4);
- in[2] = GetUi32(data + 8);
- in[3] = GetUi32(data + 12);
+ UInt32 in[4], out[4];
+ for (; numBlocks != 0; numBlocks--, data += AES_BLOCK_SIZE)
+ {
+ in[0] = GetUi32(data);
+ in[1] = GetUi32(data + 4);
+ in[2] = GetUi32(data + 8);
+ in[3] = GetUi32(data + 12);
- Aes_Decode(p + 4, out, in);
+ Aes_Decode(p + 4, out, in);
- SetUi32(data, p[0] ^ out[0]);
- SetUi32(data + 4, p[1] ^ out[1]);
- SetUi32(data + 8, p[2] ^ out[2]);
- SetUi32(data + 12, p[3] ^ out[3]);
+ SetUi32(data, p[0] ^ out[0]);
+ SetUi32(data + 4, p[1] ^ out[1]);
+ SetUi32(data + 8, p[2] ^ out[2]);
+ SetUi32(data + 12, p[3] ^ out[3]);
- p[0] = in[0];
- p[1] = in[1];
- p[2] = in[2];
- p[3] = in[3];
- }
+ p[0] = in[0];
+ p[1] = in[1];
+ p[2] = in[2];
+ p[3] = in[3];
+ }
}
void MY_FAST_CALL AesCtr_Code(UInt32 *p, Byte *data, size_t numBlocks)
{
- for (; numBlocks != 0; numBlocks--)
- {
- UInt32 temp[4];
- Byte buf[16];
- int i;
- if (++p[0] == 0)
- p[1]++;
- Aes_Encode(p + 4, temp, p);
- SetUi32(buf, temp[0]);
- SetUi32(buf + 4, temp[1]);
- SetUi32(buf + 8, temp[2]);
- SetUi32(buf + 12, temp[3]);
- for (i = 0; i < 16; i++)
- *data++ ^= buf[i];
- }
+ for (; numBlocks != 0; numBlocks--)
+ {
+ UInt32 temp[4];
+ Byte buf[16];
+ int i;
+ if (++p[0] == 0)
+ p[1]++;
+ Aes_Encode(p + 4, temp, p);
+ SetUi32(buf, temp[0]);
+ SetUi32(buf + 4, temp[1]);
+ SetUi32(buf + 8, temp[2]);
+ SetUi32(buf + 12, temp[3]);
+ for (i = 0; i < 16; i++)
+ *data++ ^= buf[i];
+ }
}
diff --git a/src/lib/lib7z/AesOpt.c b/src/lib/lib7z/AesOpt.c
index 60cfd86dcbc..cd06d62adfc 100644
--- a/src/lib/lib7z/AesOpt.c
+++ b/src/lib/lib7z/AesOpt.c
@@ -15,35 +15,35 @@
void MY_FAST_CALL AesCbc_Encode_Intel(__m128i *p, __m128i *data, size_t numBlocks)
{
- __m128i m = *p;
- for (; numBlocks != 0; numBlocks--, data++)
- {
- UInt32 numRounds2 = *(const UInt32 *)(p + 1) - 1;
- const __m128i *w = p + 3;
- m = _mm_xor_si128(m, *data);
- m = _mm_xor_si128(m, p[2]);
- do
- {
- m = _mm_aesenc_si128(m, w[0]);
- m = _mm_aesenc_si128(m, w[1]);
- w += 2;
- }
- while (--numRounds2 != 0);
- m = _mm_aesenc_si128(m, w[0]);
- m = _mm_aesenclast_si128(m, w[1]);
- *data = m;
- }
- *p = m;
+ __m128i m = *p;
+ for (; numBlocks != 0; numBlocks--, data++)
+ {
+ UInt32 numRounds2 = *(const UInt32 *)(p + 1) - 1;
+ const __m128i *w = p + 3;
+ m = _mm_xor_si128(m, *data);
+ m = _mm_xor_si128(m, p[2]);
+ do
+ {
+ m = _mm_aesenc_si128(m, w[0]);
+ m = _mm_aesenc_si128(m, w[1]);
+ w += 2;
+ }
+ while (--numRounds2 != 0);
+ m = _mm_aesenc_si128(m, w[0]);
+ m = _mm_aesenclast_si128(m, w[1]);
+ *data = m;
+ }
+ *p = m;
}
#define NUM_WAYS 3
#define AES_OP_W(op, n) { \
- const __m128i t = w[n]; \
- m0 = op(m0, t); \
- m1 = op(m1, t); \
- m2 = op(m2, t); \
- }
+ const __m128i t = w[n]; \
+ m0 = op(m0, t); \
+ m1 = op(m1, t); \
+ m2 = op(m2, t); \
+ }
#define AES_DEC(n) AES_OP_W(_mm_aesdec_si128, n)
#define AES_DEC_LAST(n) AES_OP_W(_mm_aesdeclast_si128, n)
@@ -52,110 +52,110 @@ void MY_FAST_CALL AesCbc_Encode_Intel(__m128i *p, __m128i *data, size_t numBlock
void MY_FAST_CALL AesCbc_Decode_Intel(__m128i *p, __m128i *data, size_t numBlocks)
{
- __m128i iv = *p;
- for (; numBlocks >= NUM_WAYS; numBlocks -= NUM_WAYS, data += NUM_WAYS)
- {
- UInt32 numRounds2 = *(const UInt32 *)(p + 1);
- const __m128i *w = p + numRounds2 * 2;
- __m128i m0, m1, m2;
- {
- const __m128i t = w[2];
- m0 = _mm_xor_si128(t, data[0]);
- m1 = _mm_xor_si128(t, data[1]);
- m2 = _mm_xor_si128(t, data[2]);
- }
- numRounds2--;
- do
- {
- AES_DEC(1)
- AES_DEC(0)
- w -= 2;
- }
- while (--numRounds2 != 0);
- AES_DEC(1)
- AES_DEC_LAST(0)
-
- {
- __m128i t;
- t = _mm_xor_si128(m0, iv); iv = data[0]; data[0] = t;
- t = _mm_xor_si128(m1, iv); iv = data[1]; data[1] = t;
- t = _mm_xor_si128(m2, iv); iv = data[2]; data[2] = t;
- }
- }
- for (; numBlocks != 0; numBlocks--, data++)
- {
- UInt32 numRounds2 = *(const UInt32 *)(p + 1);
- const __m128i *w = p + numRounds2 * 2;
- __m128i m = _mm_xor_si128(w[2], *data);
- numRounds2--;
- do
- {
- m = _mm_aesdec_si128(m, w[1]);
- m = _mm_aesdec_si128(m, w[0]);
- w -= 2;
- }
- while (--numRounds2 != 0);
- m = _mm_aesdec_si128(m, w[1]);
- m = _mm_aesdeclast_si128(m, w[0]);
-
- m = _mm_xor_si128(m, iv);
- iv = *data;
- *data = m;
- }
- *p = iv;
+ __m128i iv = *p;
+ for (; numBlocks >= NUM_WAYS; numBlocks -= NUM_WAYS, data += NUM_WAYS)
+ {
+ UInt32 numRounds2 = *(const UInt32 *)(p + 1);
+ const __m128i *w = p + numRounds2 * 2;
+ __m128i m0, m1, m2;
+ {
+ const __m128i t = w[2];
+ m0 = _mm_xor_si128(t, data[0]);
+ m1 = _mm_xor_si128(t, data[1]);
+ m2 = _mm_xor_si128(t, data[2]);
+ }
+ numRounds2--;
+ do
+ {
+ AES_DEC(1)
+ AES_DEC(0)
+ w -= 2;
+ }
+ while (--numRounds2 != 0);
+ AES_DEC(1)
+ AES_DEC_LAST(0)
+
+ {
+ __m128i t;
+ t = _mm_xor_si128(m0, iv); iv = data[0]; data[0] = t;
+ t = _mm_xor_si128(m1, iv); iv = data[1]; data[1] = t;
+ t = _mm_xor_si128(m2, iv); iv = data[2]; data[2] = t;
+ }
+ }
+ for (; numBlocks != 0; numBlocks--, data++)
+ {
+ UInt32 numRounds2 = *(const UInt32 *)(p + 1);
+ const __m128i *w = p + numRounds2 * 2;
+ __m128i m = _mm_xor_si128(w[2], *data);
+ numRounds2--;
+ do
+ {
+ m = _mm_aesdec_si128(m, w[1]);
+ m = _mm_aesdec_si128(m, w[0]);
+ w -= 2;
+ }
+ while (--numRounds2 != 0);
+ m = _mm_aesdec_si128(m, w[1]);
+ m = _mm_aesdeclast_si128(m, w[0]);
+
+ m = _mm_xor_si128(m, iv);
+ iv = *data;
+ *data = m;
+ }
+ *p = iv;
}
void MY_FAST_CALL AesCtr_Code_Intel(__m128i *p, __m128i *data, size_t numBlocks)
{
- __m128i ctr = *p;
- __m128i one;
- one.m128i_u64[0] = 1;
- one.m128i_u64[1] = 0;
- for (; numBlocks >= NUM_WAYS; numBlocks -= NUM_WAYS, data += NUM_WAYS)
- {
- UInt32 numRounds2 = *(const UInt32 *)(p + 1) - 1;
- const __m128i *w = p;
- __m128i m0, m1, m2;
- {
- const __m128i t = w[2];
- ctr = _mm_add_epi64(ctr, one); m0 = _mm_xor_si128(ctr, t);
- ctr = _mm_add_epi64(ctr, one); m1 = _mm_xor_si128(ctr, t);
- ctr = _mm_add_epi64(ctr, one); m2 = _mm_xor_si128(ctr, t);
- }
- w += 3;
- do
- {
- AES_ENC(0)
- AES_ENC(1)
- w += 2;
- }
- while (--numRounds2 != 0);
- AES_ENC(0)
- AES_ENC_LAST(1)
- data[0] = _mm_xor_si128(data[0], m0);
- data[1] = _mm_xor_si128(data[1], m1);
- data[2] = _mm_xor_si128(data[2], m2);
- }
- for (; numBlocks != 0; numBlocks--, data++)
- {
- UInt32 numRounds2 = *(const UInt32 *)(p + 1) - 1;
- const __m128i *w = p;
- __m128i m;
- ctr = _mm_add_epi64(ctr, one);
- m = _mm_xor_si128(ctr, p[2]);
- w += 3;
- do
- {
- m = _mm_aesenc_si128(m, w[0]);
- m = _mm_aesenc_si128(m, w[1]);
- w += 2;
- }
- while (--numRounds2 != 0);
- m = _mm_aesenc_si128(m, w[0]);
- m = _mm_aesenclast_si128(m, w[1]);
- *data = _mm_xor_si128(*data, m);
- }
- *p = ctr;
+ __m128i ctr = *p;
+ __m128i one;
+ one.m128i_u64[0] = 1;
+ one.m128i_u64[1] = 0;
+ for (; numBlocks >= NUM_WAYS; numBlocks -= NUM_WAYS, data += NUM_WAYS)
+ {
+ UInt32 numRounds2 = *(const UInt32 *)(p + 1) - 1;
+ const __m128i *w = p;
+ __m128i m0, m1, m2;
+ {
+ const __m128i t = w[2];
+ ctr = _mm_add_epi64(ctr, one); m0 = _mm_xor_si128(ctr, t);
+ ctr = _mm_add_epi64(ctr, one); m1 = _mm_xor_si128(ctr, t);
+ ctr = _mm_add_epi64(ctr, one); m2 = _mm_xor_si128(ctr, t);
+ }
+ w += 3;
+ do
+ {
+ AES_ENC(0)
+ AES_ENC(1)
+ w += 2;
+ }
+ while (--numRounds2 != 0);
+ AES_ENC(0)
+ AES_ENC_LAST(1)
+ data[0] = _mm_xor_si128(data[0], m0);
+ data[1] = _mm_xor_si128(data[1], m1);
+ data[2] = _mm_xor_si128(data[2], m2);
+ }
+ for (; numBlocks != 0; numBlocks--, data++)
+ {
+ UInt32 numRounds2 = *(const UInt32 *)(p + 1) - 1;
+ const __m128i *w = p;
+ __m128i m;
+ ctr = _mm_add_epi64(ctr, one);
+ m = _mm_xor_si128(ctr, p[2]);
+ w += 3;
+ do
+ {
+ m = _mm_aesenc_si128(m, w[0]);
+ m = _mm_aesenc_si128(m, w[1]);
+ w += 2;
+ }
+ while (--numRounds2 != 0);
+ m = _mm_aesenc_si128(m, w[0]);
+ m = _mm_aesenclast_si128(m, w[1]);
+ *data = _mm_xor_si128(*data, m);
+ }
+ *p = ctr;
}
#else
@@ -166,17 +166,17 @@ void MY_FAST_CALL AesCtr_Code(UInt32 *ivAes, Byte *data, size_t numBlocks);
void MY_FAST_CALL AesCbc_Encode_Intel(UInt32 *p, Byte *data, size_t numBlocks)
{
- AesCbc_Encode(p, data, numBlocks);
+ AesCbc_Encode(p, data, numBlocks);
}
void MY_FAST_CALL AesCbc_Decode_Intel(UInt32 *p, Byte *data, size_t numBlocks)
{
- AesCbc_Decode(p, data, numBlocks);
+ AesCbc_Decode(p, data, numBlocks);
}
void MY_FAST_CALL AesCtr_Code_Intel(UInt32 *p, Byte *data, size_t numBlocks)
{
- AesCtr_Code(p, data, numBlocks);
+ AesCtr_Code(p, data, numBlocks);
}
#endif
diff --git a/src/lib/lib7z/Alloc.c b/src/lib/lib7z/Alloc.c
index 651ada46961..c6e07c58942 100644
--- a/src/lib/lib7z/Alloc.c
+++ b/src/lib/lib7z/Alloc.c
@@ -22,49 +22,49 @@ int g_allocCountBig = 0;
void *MyAlloc(size_t size)
{
- if (size == 0)
- return 0;
- #ifdef _SZ_ALLOC_DEBUG
- {
- void *p = malloc(size);
- fprintf(stderr, "\nAlloc %10d bytes, count = %10d, addr = %8X", size, g_allocCount++, (unsigned)p);
- return p;
- }
- #else
- return malloc(size);
- #endif
+ if (size == 0)
+ return 0;
+ #ifdef _SZ_ALLOC_DEBUG
+ {
+ void *p = malloc(size);
+ fprintf(stderr, "\nAlloc %10d bytes, count = %10d, addr = %8X", size, g_allocCount++, (unsigned)p);
+ return p;
+ }
+ #else
+ return malloc(size);
+ #endif
}
void MyFree(void *address)
{
- #ifdef _SZ_ALLOC_DEBUG
- if (address != 0)
- fprintf(stderr, "\nFree; count = %10d, addr = %8X", --g_allocCount, (unsigned)address);
- #endif
- free(address);
+ #ifdef _SZ_ALLOC_DEBUG
+ if (address != 0)
+ fprintf(stderr, "\nFree; count = %10d, addr = %8X", --g_allocCount, (unsigned)address);
+ #endif
+ free(address);
}
#ifdef _WIN32_7Z
void *MidAlloc(size_t size)
{
- if (size == 0)
- return 0;
- #ifdef _SZ_ALLOC_DEBUG
- fprintf(stderr, "\nAlloc_Mid %10d bytes; count = %10d", size, g_allocCountMid++);
- #endif
- return VirtualAlloc(0, size, MEM_COMMIT, PAGE_READWRITE);
+ if (size == 0)
+ return 0;
+ #ifdef _SZ_ALLOC_DEBUG
+ fprintf(stderr, "\nAlloc_Mid %10d bytes; count = %10d", size, g_allocCountMid++);
+ #endif
+ return VirtualAlloc(0, size, MEM_COMMIT, PAGE_READWRITE);
}
void MidFree(void *address)
{
- #ifdef _SZ_ALLOC_DEBUG
- if (address != 0)
- fprintf(stderr, "\nFree_Mid; count = %10d", --g_allocCountMid);
- #endif
- if (address == 0)
- return;
- VirtualFree(address, 0, MEM_RELEASE);
+ #ifdef _SZ_ALLOC_DEBUG
+ if (address != 0)
+ fprintf(stderr, "\nFree_Mid; count = %10d", --g_allocCountMid);
+ #endif
+ if (address == 0)
+ return;
+ VirtualFree(address, 0, MEM_RELEASE);
}
#ifndef MEM_LARGE_PAGES
@@ -78,50 +78,50 @@ typedef SIZE_T (WINAPI *GetLargePageMinimumP)();
void SetLargePageSize()
{
- #ifdef _7ZIP_LARGE_PAGES
- SIZE_T size = 0;
- GetLargePageMinimumP largePageMinimum = (GetLargePageMinimumP)
- GetProcAddress(GetModuleHandle(TEXT("kernel32.dll")), "GetLargePageMinimum");
- if (largePageMinimum == 0)
- return;
- size = largePageMinimum();
- if (size == 0 || (size & (size - 1)) != 0)
- return;
- g_LargePageSize = size;
- #endif
+ #ifdef _7ZIP_LARGE_PAGES
+ SIZE_T size = 0;
+ GetLargePageMinimumP largePageMinimum = (GetLargePageMinimumP)
+ GetProcAddress(GetModuleHandle(TEXT("kernel32.dll")), "GetLargePageMinimum");
+ if (largePageMinimum == 0)
+ return;
+ size = largePageMinimum();
+ if (size == 0 || (size & (size - 1)) != 0)
+ return;
+ g_LargePageSize = size;
+ #endif
}
void *BigAlloc(size_t size)
{
- if (size == 0)
- return 0;
- #ifdef _SZ_ALLOC_DEBUG
- fprintf(stderr, "\nAlloc_Big %10d bytes; count = %10d", size, g_allocCountBig++);
- #endif
-
- #ifdef _7ZIP_LARGE_PAGES
- if (g_LargePageSize != 0 && g_LargePageSize <= (1 << 30) && size >= (1 << 18))
- {
- void *res = VirtualAlloc(0, (size + g_LargePageSize - 1) & (~(g_LargePageSize - 1)),
- MEM_COMMIT | MEM_LARGE_PAGES, PAGE_READWRITE);
- if (res != 0)
- return res;
- }
- #endif
- return VirtualAlloc(0, size, MEM_COMMIT, PAGE_READWRITE);
+ if (size == 0)
+ return 0;
+ #ifdef _SZ_ALLOC_DEBUG
+ fprintf(stderr, "\nAlloc_Big %10d bytes; count = %10d", size, g_allocCountBig++);
+ #endif
+
+ #ifdef _7ZIP_LARGE_PAGES
+ if (g_LargePageSize != 0 && g_LargePageSize <= (1 << 30) && size >= (1 << 18))
+ {
+ void *res = VirtualAlloc(0, (size + g_LargePageSize - 1) & (~(g_LargePageSize - 1)),
+ MEM_COMMIT | MEM_LARGE_PAGES, PAGE_READWRITE);
+ if (res != 0)
+ return res;
+ }
+ #endif
+ return VirtualAlloc(0, size, MEM_COMMIT, PAGE_READWRITE);
}
void BigFree(void *address)
{
- #ifdef _SZ_ALLOC_DEBUG
- if (address != 0)
- fprintf(stderr, "\nFree_Big; count = %10d", --g_allocCountBig);
- #endif
-
- if (address == 0)
- return;
- VirtualFree(address, 0, MEM_RELEASE);
+ #ifdef _SZ_ALLOC_DEBUG
+ if (address != 0)
+ fprintf(stderr, "\nFree_Big; count = %10d", --g_allocCountBig);
+ #endif
+
+ if (address == 0)
+ return;
+ VirtualFree(address, 0, MEM_RELEASE);
}
#endif
diff --git a/src/lib/lib7z/Bcj2.c b/src/lib/lib7z/Bcj2.c
index 20199ce5659..2e17ad31507 100644
--- a/src/lib/lib7z/Bcj2.c
+++ b/src/lib/lib7z/Bcj2.c
@@ -22,7 +22,7 @@
#define RC_READ_BYTE (*buffer++)
#define RC_TEST { if (buffer == bufferLim) return SZ_ERROR_DATA; }
#define RC_INIT2 code = 0; range = 0xFFFFFFFF; \
- { int i; for (i = 0; i < 5; i++) { RC_TEST; code = (code << 8) | RC_READ_BYTE; }}
+ { int i; for (i = 0; i < 5; i++) { RC_TEST; code = (code << 8) | RC_READ_BYTE; }}
#define NORMALIZE if (range < kTopValue) { RC_TEST; range <<= 8; code = (code << 8) | RC_READ_BYTE; }
@@ -31,102 +31,102 @@
#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CProb)(ttt - (ttt >> kNumMoveBits)); NORMALIZE;
int Bcj2_Decode(
- const Byte *buf0, SizeT size0,
- const Byte *buf1, SizeT size1,
- const Byte *buf2, SizeT size2,
- const Byte *buf3, SizeT size3,
- Byte *outBuf, SizeT outSize)
+ const Byte *buf0, SizeT size0,
+ const Byte *buf1, SizeT size1,
+ const Byte *buf2, SizeT size2,
+ const Byte *buf3, SizeT size3,
+ Byte *outBuf, SizeT outSize)
{
- CProb p[256 + 2];
- SizeT inPos = 0, outPos = 0;
-
- const Byte *buffer, *bufferLim;
- UInt32 range, code;
- Byte prevByte = 0;
-
- unsigned int i;
- for (i = 0; i < sizeof(p) / sizeof(p[0]); i++)
- p[i] = kBitModelTotal >> 1;
-
- buffer = buf3;
- bufferLim = buffer + size3;
- RC_INIT2
-
- if (outSize == 0)
- return SZ_OK;
-
- for (;;)
- {
- Byte b;
- CProb *prob;
- UInt32 bound;
- UInt32 ttt;
-
- SizeT limit = size0 - inPos;
- if (outSize - outPos < limit)
- limit = outSize - outPos;
- while (limit != 0)
- {
- Byte b = buf0[inPos];
- outBuf[outPos++] = b;
- if (IsJ(prevByte, b))
- break;
- inPos++;
- prevByte = b;
- limit--;
- }
-
- if (limit == 0 || outPos == outSize)
- break;
-
- b = buf0[inPos++];
-
- if (b == 0xE8)
- prob = p + prevByte;
- else if (b == 0xE9)
- prob = p + 256;
- else
- prob = p + 257;
-
- IF_BIT_0(prob)
- {
- UPDATE_0(prob)
- prevByte = b;
- }
- else
- {
- UInt32 dest;
- const Byte *v;
- UPDATE_1(prob)
- if (b == 0xE8)
- {
- v = buf1;
- if (size1 < 4)
- return SZ_ERROR_DATA;
- buf1 += 4;
- size1 -= 4;
- }
- else
- {
- v = buf2;
- if (size2 < 4)
- return SZ_ERROR_DATA;
- buf2 += 4;
- size2 -= 4;
- }
- dest = (((UInt32)v[0] << 24) | ((UInt32)v[1] << 16) |
- ((UInt32)v[2] << 8) | ((UInt32)v[3])) - ((UInt32)outPos + 4);
- outBuf[outPos++] = (Byte)dest;
- if (outPos == outSize)
- break;
- outBuf[outPos++] = (Byte)(dest >> 8);
- if (outPos == outSize)
- break;
- outBuf[outPos++] = (Byte)(dest >> 16);
- if (outPos == outSize)
- break;
- outBuf[outPos++] = prevByte = (Byte)(dest >> 24);
- }
- }
- return (outPos == outSize) ? SZ_OK : SZ_ERROR_DATA;
+ CProb p[256 + 2];
+ SizeT inPos = 0, outPos = 0;
+
+ const Byte *buffer, *bufferLim;
+ UInt32 range, code;
+ Byte prevByte = 0;
+
+ unsigned int i;
+ for (i = 0; i < sizeof(p) / sizeof(p[0]); i++)
+ p[i] = kBitModelTotal >> 1;
+
+ buffer = buf3;
+ bufferLim = buffer + size3;
+ RC_INIT2
+
+ if (outSize == 0)
+ return SZ_OK;
+
+ for (;;)
+ {
+ Byte b;
+ CProb *prob;
+ UInt32 bound;
+ UInt32 ttt;
+
+ SizeT limit = size0 - inPos;
+ if (outSize - outPos < limit)
+ limit = outSize - outPos;
+ while (limit != 0)
+ {
+ Byte b = buf0[inPos];
+ outBuf[outPos++] = b;
+ if (IsJ(prevByte, b))
+ break;
+ inPos++;
+ prevByte = b;
+ limit--;
+ }
+
+ if (limit == 0 || outPos == outSize)
+ break;
+
+ b = buf0[inPos++];
+
+ if (b == 0xE8)
+ prob = p + prevByte;
+ else if (b == 0xE9)
+ prob = p + 256;
+ else
+ prob = p + 257;
+
+ IF_BIT_0(prob)
+ {
+ UPDATE_0(prob)
+ prevByte = b;
+ }
+ else
+ {
+ UInt32 dest;
+ const Byte *v;
+ UPDATE_1(prob)
+ if (b == 0xE8)
+ {
+ v = buf1;
+ if (size1 < 4)
+ return SZ_ERROR_DATA;
+ buf1 += 4;
+ size1 -= 4;
+ }
+ else
+ {
+ v = buf2;
+ if (size2 < 4)
+ return SZ_ERROR_DATA;
+ buf2 += 4;
+ size2 -= 4;
+ }
+ dest = (((UInt32)v[0] << 24) | ((UInt32)v[1] << 16) |
+ ((UInt32)v[2] << 8) | ((UInt32)v[3])) - ((UInt32)outPos + 4);
+ outBuf[outPos++] = (Byte)dest;
+ if (outPos == outSize)
+ break;
+ outBuf[outPos++] = (Byte)(dest >> 8);
+ if (outPos == outSize)
+ break;
+ outBuf[outPos++] = (Byte)(dest >> 16);
+ if (outPos == outSize)
+ break;
+ outBuf[outPos++] = prevByte = (Byte)(dest >> 24);
+ }
+ }
+ return (outPos == outSize) ? SZ_OK : SZ_ERROR_DATA;
}
diff --git a/src/lib/lib7z/Bcj2.h b/src/lib/lib7z/Bcj2.h
index dbc054148d2..fcdaa5cf854 100644
--- a/src/lib/lib7z/Bcj2.h
+++ b/src/lib/lib7z/Bcj2.h
@@ -25,11 +25,11 @@ Returns:
*/
int Bcj2_Decode(
- const Byte *buf0, SizeT size0,
- const Byte *buf1, SizeT size1,
- const Byte *buf2, SizeT size2,
- const Byte *buf3, SizeT size3,
- Byte *outBuf, SizeT outSize);
+ const Byte *buf0, SizeT size0,
+ const Byte *buf1, SizeT size1,
+ const Byte *buf2, SizeT size2,
+ const Byte *buf3, SizeT size3,
+ Byte *outBuf, SizeT outSize);
#ifdef __cplusplus
}
diff --git a/src/lib/lib7z/Bra.c b/src/lib/lib7z/Bra.c
index e78e6f97b37..80e80631b01 100644
--- a/src/lib/lib7z/Bra.c
+++ b/src/lib/lib7z/Bra.c
@@ -5,129 +5,129 @@
SizeT ARM_Convert(Byte *data, SizeT size, UInt32 ip, int encoding)
{
- SizeT i;
- if (size < 4)
- return 0;
- size -= 4;
- ip += 8;
- for (i = 0; i <= size; i += 4)
- {
- if (data[i + 3] == 0xEB)
- {
- UInt32 dest;
- UInt32 src = ((UInt32)data[i + 2] << 16) | ((UInt32)data[i + 1] << 8) | (data[i + 0]);
- src <<= 2;
- if (encoding)
- dest = ip + (UInt32)i + src;
- else
- dest = src - (ip + (UInt32)i);
- dest >>= 2;
- data[i + 2] = (Byte)(dest >> 16);
- data[i + 1] = (Byte)(dest >> 8);
- data[i + 0] = (Byte)dest;
- }
- }
- return i;
+ SizeT i;
+ if (size < 4)
+ return 0;
+ size -= 4;
+ ip += 8;
+ for (i = 0; i <= size; i += 4)
+ {
+ if (data[i + 3] == 0xEB)
+ {
+ UInt32 dest;
+ UInt32 src = ((UInt32)data[i + 2] << 16) | ((UInt32)data[i + 1] << 8) | (data[i + 0]);
+ src <<= 2;
+ if (encoding)
+ dest = ip + (UInt32)i + src;
+ else
+ dest = src - (ip + (UInt32)i);
+ dest >>= 2;
+ data[i + 2] = (Byte)(dest >> 16);
+ data[i + 1] = (Byte)(dest >> 8);
+ data[i + 0] = (Byte)dest;
+ }
+ }
+ return i;
}
SizeT ARMT_Convert(Byte *data, SizeT size, UInt32 ip, int encoding)
{
- SizeT i;
- if (size < 4)
- return 0;
- size -= 4;
- ip += 4;
- for (i = 0; i <= size; i += 2)
- {
- if ((data[i + 1] & 0xF8) == 0xF0 &&
- (data[i + 3] & 0xF8) == 0xF8)
- {
- UInt32 dest;
- UInt32 src =
- (((UInt32)data[i + 1] & 0x7) << 19) |
- ((UInt32)data[i + 0] << 11) |
- (((UInt32)data[i + 3] & 0x7) << 8) |
- (data[i + 2]);
+ SizeT i;
+ if (size < 4)
+ return 0;
+ size -= 4;
+ ip += 4;
+ for (i = 0; i <= size; i += 2)
+ {
+ if ((data[i + 1] & 0xF8) == 0xF0 &&
+ (data[i + 3] & 0xF8) == 0xF8)
+ {
+ UInt32 dest;
+ UInt32 src =
+ (((UInt32)data[i + 1] & 0x7) << 19) |
+ ((UInt32)data[i + 0] << 11) |
+ (((UInt32)data[i + 3] & 0x7) << 8) |
+ (data[i + 2]);
- src <<= 1;
- if (encoding)
- dest = ip + (UInt32)i + src;
- else
- dest = src - (ip + (UInt32)i);
- dest >>= 1;
+ src <<= 1;
+ if (encoding)
+ dest = ip + (UInt32)i + src;
+ else
+ dest = src - (ip + (UInt32)i);
+ dest >>= 1;
- data[i + 1] = (Byte)(0xF0 | ((dest >> 19) & 0x7));
- data[i + 0] = (Byte)(dest >> 11);
- data[i + 3] = (Byte)(0xF8 | ((dest >> 8) & 0x7));
- data[i + 2] = (Byte)dest;
- i += 2;
- }
- }
- return i;
+ data[i + 1] = (Byte)(0xF0 | ((dest >> 19) & 0x7));
+ data[i + 0] = (Byte)(dest >> 11);
+ data[i + 3] = (Byte)(0xF8 | ((dest >> 8) & 0x7));
+ data[i + 2] = (Byte)dest;
+ i += 2;
+ }
+ }
+ return i;
}
SizeT PPC_Convert(Byte *data, SizeT size, UInt32 ip, int encoding)
{
- SizeT i;
- if (size < 4)
- return 0;
- size -= 4;
- for (i = 0; i <= size; i += 4)
- {
- if ((data[i] >> 2) == 0x12 && (data[i + 3] & 3) == 1)
- {
- UInt32 src = ((UInt32)(data[i + 0] & 3) << 24) |
- ((UInt32)data[i + 1] << 16) |
- ((UInt32)data[i + 2] << 8) |
- ((UInt32)data[i + 3] & (~3));
+ SizeT i;
+ if (size < 4)
+ return 0;
+ size -= 4;
+ for (i = 0; i <= size; i += 4)
+ {
+ if ((data[i] >> 2) == 0x12 && (data[i + 3] & 3) == 1)
+ {
+ UInt32 src = ((UInt32)(data[i + 0] & 3) << 24) |
+ ((UInt32)data[i + 1] << 16) |
+ ((UInt32)data[i + 2] << 8) |
+ ((UInt32)data[i + 3] & (~3));
- UInt32 dest;
- if (encoding)
- dest = ip + (UInt32)i + src;
- else
- dest = src - (ip + (UInt32)i);
- data[i + 0] = (Byte)(0x48 | ((dest >> 24) & 0x3));
- data[i + 1] = (Byte)(dest >> 16);
- data[i + 2] = (Byte)(dest >> 8);
- data[i + 3] &= 0x3;
- data[i + 3] |= dest;
- }
- }
- return i;
+ UInt32 dest;
+ if (encoding)
+ dest = ip + (UInt32)i + src;
+ else
+ dest = src - (ip + (UInt32)i);
+ data[i + 0] = (Byte)(0x48 | ((dest >> 24) & 0x3));
+ data[i + 1] = (Byte)(dest >> 16);
+ data[i + 2] = (Byte)(dest >> 8);
+ data[i + 3] &= 0x3;
+ data[i + 3] |= dest;
+ }
+ }
+ return i;
}
SizeT SPARC_Convert(Byte *data, SizeT size, UInt32 ip, int encoding)
{
- UInt32 i;
- if (size < 4)
- return 0;
- size -= 4;
- for (i = 0; i <= size; i += 4)
- {
- if ((data[i] == 0x40 && (data[i + 1] & 0xC0) == 0x00) ||
- (data[i] == 0x7F && (data[i + 1] & 0xC0) == 0xC0))
- {
- UInt32 src =
- ((UInt32)data[i + 0] << 24) |
- ((UInt32)data[i + 1] << 16) |
- ((UInt32)data[i + 2] << 8) |
- ((UInt32)data[i + 3]);
- UInt32 dest;
+ UInt32 i;
+ if (size < 4)
+ return 0;
+ size -= 4;
+ for (i = 0; i <= size; i += 4)
+ {
+ if ((data[i] == 0x40 && (data[i + 1] & 0xC0) == 0x00) ||
+ (data[i] == 0x7F && (data[i + 1] & 0xC0) == 0xC0))
+ {
+ UInt32 src =
+ ((UInt32)data[i + 0] << 24) |
+ ((UInt32)data[i + 1] << 16) |
+ ((UInt32)data[i + 2] << 8) |
+ ((UInt32)data[i + 3]);
+ UInt32 dest;
- src <<= 2;
- if (encoding)
- dest = ip + i + src;
- else
- dest = src - (ip + i);
- dest >>= 2;
+ src <<= 2;
+ if (encoding)
+ dest = ip + i + src;
+ else
+ dest = src - (ip + i);
+ dest >>= 2;
- dest = (((0 - ((dest >> 22) & 1)) << 22) & 0x3FFFFFFF) | (dest & 0x3FFFFF) | 0x40000000;
+ dest = (((0 - ((dest >> 22) & 1)) << 22) & 0x3FFFFFFF) | (dest & 0x3FFFFF) | 0x40000000;
- data[i + 0] = (Byte)(dest >> 24);
- data[i + 1] = (Byte)(dest >> 16);
- data[i + 2] = (Byte)(dest >> 8);
- data[i + 3] = (Byte)dest;
- }
- }
- return i;
+ data[i + 0] = (Byte)(dest >> 24);
+ data[i + 1] = (Byte)(dest >> 16);
+ data[i + 2] = (Byte)(dest >> 8);
+ data[i + 3] = (Byte)dest;
+ }
+ }
+ return i;
}
diff --git a/src/lib/lib7z/Bra86.c b/src/lib/lib7z/Bra86.c
index 1ee0e709b88..d5513ead552 100644
--- a/src/lib/lib7z/Bra86.c
+++ b/src/lib/lib7z/Bra86.c
@@ -10,76 +10,76 @@ const Byte kMaskToBitNumber[8] = {0, 1, 2, 2, 3, 3, 3, 3};
SizeT x86_Convert(Byte *data, SizeT size, UInt32 ip, UInt32 *state, int encoding)
{
- SizeT bufferPos = 0, prevPosT;
- UInt32 prevMask = *state & 0x7;
- if (size < 5)
- return 0;
- ip += 5;
- prevPosT = (SizeT)0 - 1;
+ SizeT bufferPos = 0, prevPosT;
+ UInt32 prevMask = *state & 0x7;
+ if (size < 5)
+ return 0;
+ ip += 5;
+ prevPosT = (SizeT)0 - 1;
- for (;;)
- {
- Byte *p = data + bufferPos;
- Byte *limit = data + size - 4;
- for (; p < limit; p++)
- if ((*p & 0xFE) == 0xE8)
- break;
- bufferPos = (SizeT)(p - data);
- if (p >= limit)
- break;
- prevPosT = bufferPos - prevPosT;
- if (prevPosT > 3)
- prevMask = 0;
- else
- {
- prevMask = (prevMask << ((int)prevPosT - 1)) & 0x7;
- if (prevMask != 0)
- {
- Byte b = p[4 - kMaskToBitNumber[prevMask]];
- if (!kMaskToAllowedStatus[prevMask] || Test86MSByte(b))
- {
- prevPosT = bufferPos;
- prevMask = ((prevMask << 1) & 0x7) | 1;
- bufferPos++;
- continue;
- }
- }
- }
- prevPosT = bufferPos;
+ for (;;)
+ {
+ Byte *p = data + bufferPos;
+ Byte *limit = data + size - 4;
+ for (; p < limit; p++)
+ if ((*p & 0xFE) == 0xE8)
+ break;
+ bufferPos = (SizeT)(p - data);
+ if (p >= limit)
+ break;
+ prevPosT = bufferPos - prevPosT;
+ if (prevPosT > 3)
+ prevMask = 0;
+ else
+ {
+ prevMask = (prevMask << ((int)prevPosT - 1)) & 0x7;
+ if (prevMask != 0)
+ {
+ Byte b = p[4 - kMaskToBitNumber[prevMask]];
+ if (!kMaskToAllowedStatus[prevMask] || Test86MSByte(b))
+ {
+ prevPosT = bufferPos;
+ prevMask = ((prevMask << 1) & 0x7) | 1;
+ bufferPos++;
+ continue;
+ }
+ }
+ }
+ prevPosT = bufferPos;
- if (Test86MSByte(p[4]))
- {
- UInt32 src = ((UInt32)p[4] << 24) | ((UInt32)p[3] << 16) | ((UInt32)p[2] << 8) | ((UInt32)p[1]);
- UInt32 dest;
- for (;;)
- {
- Byte b;
- int index;
- if (encoding)
- dest = (ip + (UInt32)bufferPos) + src;
- else
- dest = src - (ip + (UInt32)bufferPos);
- if (prevMask == 0)
- break;
- index = kMaskToBitNumber[prevMask] * 8;
- b = (Byte)(dest >> (24 - index));
- if (!Test86MSByte(b))
- break;
- src = dest ^ ((1 << (32 - index)) - 1);
- }
- p[4] = (Byte)(~(((dest >> 24) & 1) - 1));
- p[3] = (Byte)(dest >> 16);
- p[2] = (Byte)(dest >> 8);
- p[1] = (Byte)dest;
- bufferPos += 5;
- }
- else
- {
- prevMask = ((prevMask << 1) & 0x7) | 1;
- bufferPos++;
- }
- }
- prevPosT = bufferPos - prevPosT;
- *state = ((prevPosT > 3) ? 0 : ((prevMask << ((int)prevPosT - 1)) & 0x7));
- return bufferPos;
+ if (Test86MSByte(p[4]))
+ {
+ UInt32 src = ((UInt32)p[4] << 24) | ((UInt32)p[3] << 16) | ((UInt32)p[2] << 8) | ((UInt32)p[1]);
+ UInt32 dest;
+ for (;;)
+ {
+ Byte b;
+ int index;
+ if (encoding)
+ dest = (ip + (UInt32)bufferPos) + src;
+ else
+ dest = src - (ip + (UInt32)bufferPos);
+ if (prevMask == 0)
+ break;
+ index = kMaskToBitNumber[prevMask] * 8;
+ b = (Byte)(dest >> (24 - index));
+ if (!Test86MSByte(b))
+ break;
+ src = dest ^ ((1 << (32 - index)) - 1);
+ }
+ p[4] = (Byte)(~(((dest >> 24) & 1) - 1));
+ p[3] = (Byte)(dest >> 16);
+ p[2] = (Byte)(dest >> 8);
+ p[1] = (Byte)dest;
+ bufferPos += 5;
+ }
+ else
+ {
+ prevMask = ((prevMask << 1) & 0x7) | 1;
+ bufferPos++;
+ }
+ }
+ prevPosT = bufferPos - prevPosT;
+ *state = ((prevPosT > 3) ? 0 : ((prevMask << ((int)prevPosT - 1)) & 0x7));
+ return bufferPos;
}
diff --git a/src/lib/lib7z/BraIA64.c b/src/lib/lib7z/BraIA64.c
index 07fa7ba40fa..98553fdeafd 100644
--- a/src/lib/lib7z/BraIA64.c
+++ b/src/lib/lib7z/BraIA64.c
@@ -5,63 +5,63 @@
static const Byte kBranchTable[32] =
{
- 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0,
- 4, 4, 6, 6, 0, 0, 7, 7,
- 4, 4, 0, 0, 4, 4, 0, 0
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 4, 4, 6, 6, 0, 0, 7, 7,
+ 4, 4, 0, 0, 4, 4, 0, 0
};
SizeT IA64_Convert(Byte *data, SizeT size, UInt32 ip, int encoding)
{
- SizeT i;
- if (size < 16)
- return 0;
- size -= 16;
- for (i = 0; i <= size; i += 16)
- {
- UInt32 instrTemplate = data[i] & 0x1F;
- UInt32 mask = kBranchTable[instrTemplate];
- UInt32 bitPos = 5;
- int slot;
- for (slot = 0; slot < 3; slot++, bitPos += 41)
- {
- UInt32 bytePos, bitRes;
- UInt64 instruction, instNorm;
- int j;
- if (((mask >> slot) & 1) == 0)
- continue;
- bytePos = (bitPos >> 3);
- bitRes = bitPos & 0x7;
- instruction = 0;
- for (j = 0; j < 6; j++)
- instruction += (UInt64)data[i + j + bytePos] << (8 * j);
+ SizeT i;
+ if (size < 16)
+ return 0;
+ size -= 16;
+ for (i = 0; i <= size; i += 16)
+ {
+ UInt32 instrTemplate = data[i] & 0x1F;
+ UInt32 mask = kBranchTable[instrTemplate];
+ UInt32 bitPos = 5;
+ int slot;
+ for (slot = 0; slot < 3; slot++, bitPos += 41)
+ {
+ UInt32 bytePos, bitRes;
+ UInt64 instruction, instNorm;
+ int j;
+ if (((mask >> slot) & 1) == 0)
+ continue;
+ bytePos = (bitPos >> 3);
+ bitRes = bitPos & 0x7;
+ instruction = 0;
+ for (j = 0; j < 6; j++)
+ instruction += (UInt64)data[i + j + bytePos] << (8 * j);
- instNorm = instruction >> bitRes;
- if (((instNorm >> 37) & 0xF) == 0x5 && ((instNorm >> 9) & 0x7) == 0)
- {
- UInt32 src = (UInt32)((instNorm >> 13) & 0xFFFFF);
- UInt32 dest;
- src |= ((UInt32)(instNorm >> 36) & 1) << 20;
+ instNorm = instruction >> bitRes;
+ if (((instNorm >> 37) & 0xF) == 0x5 && ((instNorm >> 9) & 0x7) == 0)
+ {
+ UInt32 src = (UInt32)((instNorm >> 13) & 0xFFFFF);
+ UInt32 dest;
+ src |= ((UInt32)(instNorm >> 36) & 1) << 20;
- src <<= 4;
+ src <<= 4;
- if (encoding)
- dest = ip + (UInt32)i + src;
- else
- dest = src - (ip + (UInt32)i);
+ if (encoding)
+ dest = ip + (UInt32)i + src;
+ else
+ dest = src - (ip + (UInt32)i);
- dest >>= 4;
+ dest >>= 4;
- instNorm &= ~((UInt64)(0x8FFFFF) << 13);
- instNorm |= ((UInt64)(dest & 0xFFFFF) << 13);
- instNorm |= ((UInt64)(dest & 0x100000) << (36 - 20));
+ instNorm &= ~((UInt64)(0x8FFFFF) << 13);
+ instNorm |= ((UInt64)(dest & 0xFFFFF) << 13);
+ instNorm |= ((UInt64)(dest & 0x100000) << (36 - 20));
- instruction &= (1 << bitRes) - 1;
- instruction |= (instNorm << bitRes);
- for (j = 0; j < 6; j++)
- data[i + j + bytePos] = (Byte)(instruction >> (8 * j));
- }
- }
- }
- return i;
+ instruction &= (1 << bitRes) - 1;
+ instruction |= (instNorm << bitRes);
+ for (j = 0; j < 6; j++)
+ data[i + j + bytePos] = (Byte)(instruction >> (8 * j));
+ }
+ }
+ }
+ return i;
}
diff --git a/src/lib/lib7z/BwtSort.c b/src/lib/lib7z/BwtSort.c
index 482f41285f0..03be4f53049 100644
--- a/src/lib/lib7z/BwtSort.c
+++ b/src/lib/lib7z/BwtSort.c
@@ -36,20 +36,20 @@ Public domain */
#define kNumExtra0Mask ((1 << kNumExtra0Bits) - 1)
#define SetFinishedGroupSize(p, size) \
- { *(p) |= ((((size) - 1) & kNumExtra0Mask) << kNumBitsMax); \
- if ((size) > (1 << kNumExtra0Bits)) { \
- *(p) |= 0x40000000; *((p) + 1) |= ((((size) - 1)>> kNumExtra0Bits) << kNumBitsMax); } } \
+ { *(p) |= ((((size) - 1) & kNumExtra0Mask) << kNumBitsMax); \
+ if ((size) > (1 << kNumExtra0Bits)) { \
+ *(p) |= 0x40000000; *((p) + 1) |= ((((size) - 1)>> kNumExtra0Bits) << kNumBitsMax); } } \
static void SetGroupSize(UInt32 *p, UInt32 size)
{
- if (--size == 0)
- return;
- *p |= 0x80000000 | ((size & kNumExtra0Mask) << kNumBitsMax);
- if (size >= (1 << kNumExtra0Bits))
- {
- *p |= 0x40000000;
- p[1] |= ((size >> kNumExtra0Bits) << kNumBitsMax);
- }
+ if (--size == 0)
+ return;
+ *p |= 0x80000000 | ((size & kNumExtra0Mask) << kNumBitsMax);
+ if (size >= (1 << kNumExtra0Bits))
+ {
+ *p |= 0x40000000;
+ p[1] |= ((size >> kNumExtra0Bits) << kNumBitsMax);
+ }
}
#endif
@@ -61,456 +61,455 @@ returns: 1 - if there are groups, 0 - no more groups
*/
UInt32 NO_INLINE SortGroup(UInt32 BlockSize, UInt32 NumSortedBytes, UInt32 groupOffset, UInt32 groupSize, int NumRefBits, UInt32 *Indices
- #ifndef BLOCK_SORT_USE_HEAP_SORT
- , UInt32 left, UInt32 range
- #endif
- )
+ #ifndef BLOCK_SORT_USE_HEAP_SORT
+ , UInt32 left, UInt32 range
+ #endif
+ )
{
- UInt32 *ind2 = Indices + groupOffset;
- UInt32 *Groups;
- if (groupSize <= 1)
- {
- /*
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- SetFinishedGroupSize(ind2, 1);
- #endif
- */
- return 0;
- }
- Groups = Indices + BlockSize + BS_TEMP_SIZE;
- if (groupSize <= ((UInt32)1 << NumRefBits)
- #ifndef BLOCK_SORT_USE_HEAP_SORT
- && groupSize <= range
- #endif
- )
- {
- UInt32 *temp = Indices + BlockSize;
- UInt32 j;
- UInt32 mask, thereAreGroups, group, cg;
- {
- UInt32 gPrev;
- UInt32 gRes = 0;
- {
- UInt32 sp = ind2[0] + NumSortedBytes;
- if (sp >= BlockSize) sp -= BlockSize;
- gPrev = Groups[sp];
- temp[0] = (gPrev << NumRefBits);
- }
-
- for (j = 1; j < groupSize; j++)
- {
- UInt32 sp = ind2[j] + NumSortedBytes;
- UInt32 g;
- if (sp >= BlockSize) sp -= BlockSize;
- g = Groups[sp];
- temp[j] = (g << NumRefBits) | j;
- gRes |= (gPrev ^ g);
- }
- if (gRes == 0)
- {
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- SetGroupSize(ind2, groupSize);
- #endif
- return 1;
- }
- }
-
- HeapSort(temp, groupSize);
- mask = ((1 << NumRefBits) - 1);
- thereAreGroups = 0;
-
- group = groupOffset;
- cg = (temp[0] >> NumRefBits);
- temp[0] = ind2[temp[0] & mask];
-
- {
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- UInt32 *Flags = Groups + BlockSize;
- #else
- UInt32 prevGroupStart = 0;
- #endif
-
- for (j = 1; j < groupSize; j++)
- {
- UInt32 val = temp[j];
- UInt32 cgCur = (val >> NumRefBits);
-
- if (cgCur != cg)
- {
- cg = cgCur;
- group = groupOffset + j;
-
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- {
- UInt32 t = group - 1;
- Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
- }
- #else
- SetGroupSize(temp + prevGroupStart, j - prevGroupStart);
- prevGroupStart = j;
- #endif
- }
- else
- thereAreGroups = 1;
- {
- UInt32 ind = ind2[val & mask];
- temp[j] = ind;
- Groups[ind] = group;
- }
- }
-
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- SetGroupSize(temp + prevGroupStart, j - prevGroupStart);
- #endif
- }
-
- for (j = 0; j < groupSize; j++)
- ind2[j] = temp[j];
- return thereAreGroups;
- }
-
- /* Check that all strings are in one group (cannot sort) */
- {
- UInt32 group, j;
- UInt32 sp = ind2[0] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
- group = Groups[sp];
- for (j = 1; j < groupSize; j++)
- {
- sp = ind2[j] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
- if (Groups[sp] != group)
- break;
- }
- if (j == groupSize)
- {
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- SetGroupSize(ind2, groupSize);
- #endif
- return 1;
- }
- }
-
- #ifndef BLOCK_SORT_USE_HEAP_SORT
- {
- /* ---------- Range Sort ---------- */
- UInt32 i;
- UInt32 mid;
- for (;;)
- {
- UInt32 j;
- if (range <= 1)
- {
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- SetGroupSize(ind2, groupSize);
- #endif
- return 1;
- }
- mid = left + ((range + 1) >> 1);
- j = groupSize;
- i = 0;
- do
- {
- UInt32 sp = ind2[i] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
- if (Groups[sp] >= mid)
- {
- for (j--; j > i; j--)
- {
- sp = ind2[j] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
- if (Groups[sp] < mid)
- {
- UInt32 temp = ind2[i]; ind2[i] = ind2[j]; ind2[j] = temp;
- break;
- }
- }
- if (i >= j)
- break;
- }
- }
- while (++i < j);
- if (i == 0)
- {
- range = range - (mid - left);
- left = mid;
- }
- else if (i == groupSize)
- range = (mid - left);
- else
- break;
- }
-
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- {
- UInt32 t = (groupOffset + i - 1);
- UInt32 *Flags = Groups + BlockSize;
- Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
- }
- #endif
-
- {
- UInt32 j;
- for (j = i; j < groupSize; j++)
- Groups[ind2[j]] = groupOffset + i;
- }
-
- {
- UInt32 res = SortGroup(BlockSize, NumSortedBytes, groupOffset, i, NumRefBits, Indices, left, mid - left);
- return res | SortGroup(BlockSize, NumSortedBytes, groupOffset + i, groupSize - i, NumRefBits, Indices, mid, range - (mid - left));
- }
-
- }
-
- #else
-
- /* ---------- Heap Sort ---------- */
-
- {
- UInt32 j;
- for (j = 0; j < groupSize; j++)
- {
- UInt32 sp = ind2[j] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
- ind2[j] = sp;
- }
-
- HeapSortRef(ind2, Groups, groupSize);
-
- /* Write Flags */
- {
- UInt32 sp = ind2[0];
- UInt32 group = Groups[sp];
-
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- UInt32 *Flags = Groups + BlockSize;
- #else
- UInt32 prevGroupStart = 0;
- #endif
-
- for (j = 1; j < groupSize; j++)
- {
- sp = ind2[j];
- if (Groups[sp] != group)
- {
- group = Groups[sp];
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- {
- UInt32 t = groupOffset + j - 1;
- Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
- }
- #else
- SetGroupSize(ind2 + prevGroupStart, j - prevGroupStart);
- prevGroupStart = j;
- #endif
- }
- }
-
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- SetGroupSize(ind2 + prevGroupStart, j - prevGroupStart);
- #endif
- }
- {
- /* Write new Groups values and Check that there are groups */
- UInt32 thereAreGroups = 0;
- for (j = 0; j < groupSize; j++)
- {
- UInt32 group = groupOffset + j;
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- UInt32 subGroupSize = ((ind2[j] & ~0xC0000000) >> kNumBitsMax);
- if ((ind2[j] & 0x40000000) != 0)
- subGroupSize += ((ind2[j + 1] >> kNumBitsMax) << kNumExtra0Bits);
- subGroupSize++;
- for (;;)
- {
- UInt32 original = ind2[j];
- UInt32 sp = original & kIndexMask;
- if (sp < NumSortedBytes) sp += BlockSize; sp -= NumSortedBytes;
- ind2[j] = sp | (original & ~kIndexMask);
- Groups[sp] = group;
- if (--subGroupSize == 0)
- break;
- j++;
- thereAreGroups = 1;
- }
- #else
- UInt32 *Flags = Groups + BlockSize;
- for (;;)
- {
- UInt32 sp = ind2[j]; if (sp < NumSortedBytes) sp += BlockSize; sp -= NumSortedBytes;
- ind2[j] = sp;
- Groups[sp] = group;
- if ((Flags[(groupOffset + j) >> kNumFlagsBits] & (1 << ((groupOffset + j) & kFlagsMask))) == 0)
- break;
- j++;
- thereAreGroups = 1;
- }
- #endif
- }
- return thereAreGroups;
- }
- }
- #endif
+ UInt32 *ind2 = Indices + groupOffset;
+ UInt32 *Groups;
+ if (groupSize <= 1)
+ {
+ /*
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ SetFinishedGroupSize(ind2, 1);
+ #endif
+ */
+ return 0;
+ }
+ Groups = Indices + BlockSize + BS_TEMP_SIZE;
+ if (groupSize <= ((UInt32)1 << NumRefBits)
+ #ifndef BLOCK_SORT_USE_HEAP_SORT
+ && groupSize <= range
+ #endif
+ )
+ {
+ UInt32 *temp = Indices + BlockSize;
+ UInt32 j;
+ UInt32 mask, thereAreGroups, group, cg;
+ {
+ UInt32 gPrev;
+ UInt32 gRes = 0;
+ {
+ UInt32 sp = ind2[0] + NumSortedBytes;
+ if (sp >= BlockSize) sp -= BlockSize;
+ gPrev = Groups[sp];
+ temp[0] = (gPrev << NumRefBits);
+ }
+
+ for (j = 1; j < groupSize; j++)
+ {
+ UInt32 sp = ind2[j] + NumSortedBytes;
+ UInt32 g;
+ if (sp >= BlockSize) sp -= BlockSize;
+ g = Groups[sp];
+ temp[j] = (g << NumRefBits) | j;
+ gRes |= (gPrev ^ g);
+ }
+ if (gRes == 0)
+ {
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ SetGroupSize(ind2, groupSize);
+ #endif
+ return 1;
+ }
+ }
+
+ HeapSort(temp, groupSize);
+ mask = ((1 << NumRefBits) - 1);
+ thereAreGroups = 0;
+
+ group = groupOffset;
+ cg = (temp[0] >> NumRefBits);
+ temp[0] = ind2[temp[0] & mask];
+
+ {
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ UInt32 *Flags = Groups + BlockSize;
+ #else
+ UInt32 prevGroupStart = 0;
+ #endif
+
+ for (j = 1; j < groupSize; j++)
+ {
+ UInt32 val = temp[j];
+ UInt32 cgCur = (val >> NumRefBits);
+
+ if (cgCur != cg)
+ {
+ cg = cgCur;
+ group = groupOffset + j;
+
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ {
+ UInt32 t = group - 1;
+ Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
+ }
+ #else
+ SetGroupSize(temp + prevGroupStart, j - prevGroupStart);
+ prevGroupStart = j;
+ #endif
+ }
+ else
+ thereAreGroups = 1;
+ {
+ UInt32 ind = ind2[val & mask];
+ temp[j] = ind;
+ Groups[ind] = group;
+ }
+ }
+
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ SetGroupSize(temp + prevGroupStart, j - prevGroupStart);
+ #endif
+ }
+
+ for (j = 0; j < groupSize; j++)
+ ind2[j] = temp[j];
+ return thereAreGroups;
+ }
+
+ /* Check that all strings are in one group (cannot sort) */
+ {
+ UInt32 group, j;
+ UInt32 sp = ind2[0] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
+ group = Groups[sp];
+ for (j = 1; j < groupSize; j++)
+ {
+ sp = ind2[j] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
+ if (Groups[sp] != group)
+ break;
+ }
+ if (j == groupSize)
+ {
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ SetGroupSize(ind2, groupSize);
+ #endif
+ return 1;
+ }
+ }
+
+ #ifndef BLOCK_SORT_USE_HEAP_SORT
+ {
+ /* ---------- Range Sort ---------- */
+ UInt32 i;
+ UInt32 mid;
+ for (;;)
+ {
+ UInt32 j;
+ if (range <= 1)
+ {
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ SetGroupSize(ind2, groupSize);
+ #endif
+ return 1;
+ }
+ mid = left + ((range + 1) >> 1);
+ j = groupSize;
+ i = 0;
+ do
+ {
+ UInt32 sp = ind2[i] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
+ if (Groups[sp] >= mid)
+ {
+ for (j--; j > i; j--)
+ {
+ sp = ind2[j] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
+ if (Groups[sp] < mid)
+ {
+ UInt32 temp = ind2[i]; ind2[i] = ind2[j]; ind2[j] = temp;
+ break;
+ }
+ }
+ if (i >= j)
+ break;
+ }
+ }
+ while (++i < j);
+ if (i == 0)
+ {
+ range = range - (mid - left);
+ left = mid;
+ }
+ else if (i == groupSize)
+ range = (mid - left);
+ else
+ break;
+ }
+
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ {
+ UInt32 t = (groupOffset + i - 1);
+ UInt32 *Flags = Groups + BlockSize;
+ Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
+ }
+ #endif
+
+ {
+ UInt32 j;
+ for (j = i; j < groupSize; j++)
+ Groups[ind2[j]] = groupOffset + i;
+ }
+
+ {
+ UInt32 res = SortGroup(BlockSize, NumSortedBytes, groupOffset, i, NumRefBits, Indices, left, mid - left);
+ return res | SortGroup(BlockSize, NumSortedBytes, groupOffset + i, groupSize - i, NumRefBits, Indices, mid, range - (mid - left));
+ }
+
+ }
+
+ #else
+
+ /* ---------- Heap Sort ---------- */
+
+ {
+ UInt32 j;
+ for (j = 0; j < groupSize; j++)
+ {
+ UInt32 sp = ind2[j] + NumSortedBytes; if (sp >= BlockSize) sp -= BlockSize;
+ ind2[j] = sp;
+ }
+
+ HeapSortRef(ind2, Groups, groupSize);
+
+ /* Write Flags */
+ {
+ UInt32 sp = ind2[0];
+ UInt32 group = Groups[sp];
+
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ UInt32 *Flags = Groups + BlockSize;
+ #else
+ UInt32 prevGroupStart = 0;
+ #endif
+
+ for (j = 1; j < groupSize; j++)
+ {
+ sp = ind2[j];
+ if (Groups[sp] != group)
+ {
+ group = Groups[sp];
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ {
+ UInt32 t = groupOffset + j - 1;
+ Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
+ }
+ #else
+ SetGroupSize(ind2 + prevGroupStart, j - prevGroupStart);
+ prevGroupStart = j;
+ #endif
+ }
+ }
+
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ SetGroupSize(ind2 + prevGroupStart, j - prevGroupStart);
+ #endif
+ }
+ {
+ /* Write new Groups values and Check that there are groups */
+ UInt32 thereAreGroups = 0;
+ for (j = 0; j < groupSize; j++)
+ {
+ UInt32 group = groupOffset + j;
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ UInt32 subGroupSize = ((ind2[j] & ~0xC0000000) >> kNumBitsMax);
+ if ((ind2[j] & 0x40000000) != 0)
+ subGroupSize += ((ind2[j + 1] >> kNumBitsMax) << kNumExtra0Bits);
+ subGroupSize++;
+ for (;;)
+ {
+ UInt32 original = ind2[j];
+ UInt32 sp = original & kIndexMask;
+ if (sp < NumSortedBytes) sp += BlockSize; sp -= NumSortedBytes;
+ ind2[j] = sp | (original & ~kIndexMask);
+ Groups[sp] = group;
+ if (--subGroupSize == 0)
+ break;
+ j++;
+ thereAreGroups = 1;
+ }
+ #else
+ UInt32 *Flags = Groups + BlockSize;
+ for (;;)
+ {
+ UInt32 sp = ind2[j]; if (sp < NumSortedBytes) sp += BlockSize; sp -= NumSortedBytes;
+ ind2[j] = sp;
+ Groups[sp] = group;
+ if ((Flags[(groupOffset + j) >> kNumFlagsBits] & (1 << ((groupOffset + j) & kFlagsMask))) == 0)
+ break;
+ j++;
+ thereAreGroups = 1;
+ }
+ #endif
+ }
+ return thereAreGroups;
+ }
+ }
+ #endif
}
/* conditions: blockSize > 0 */
UInt32 BlockSort(UInt32 *Indices, const Byte *data, UInt32 blockSize)
{
- UInt32 *counters = Indices + blockSize;
- UInt32 i;
- UInt32 *Groups;
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- UInt32 *Flags;
- #endif
-
- /* Radix-Sort for 2 bytes */
- for (i = 0; i < kNumHashValues; i++)
- counters[i] = 0;
- for (i = 0; i < blockSize - 1; i++)
- counters[((UInt32)data[i] << 8) | data[i + 1]]++;
- counters[((UInt32)data[i] << 8) | data[0]]++;
-
- Groups = counters + BS_TEMP_SIZE;
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- Flags = Groups + blockSize;
- {
- UInt32 numWords = (blockSize + kFlagsMask) >> kNumFlagsBits;
- for (i = 0; i < numWords; i++)
- Flags[i] = kAllFlags;
- }
- #endif
-
- {
- UInt32 sum = 0;
- for (i = 0; i < kNumHashValues; i++)
- {
- UInt32 groupSize = counters[i];
- if (groupSize > 0)
- {
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
- UInt32 t = sum + groupSize - 1;
- Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
- #endif
- sum += groupSize;
- }
- counters[i] = sum - groupSize;
- }
-
- for (i = 0; i < blockSize - 1; i++)
- Groups[i] = counters[((UInt32)data[i] << 8) | data[i + 1]];
- Groups[i] = counters[((UInt32)data[i] << 8) | data[0]];
-
- for (i = 0; i < blockSize - 1; i++)
- Indices[counters[((UInt32)data[i] << 8) | data[i + 1]]++] = i;
- Indices[counters[((UInt32)data[i] << 8) | data[0]]++] = i;
-
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- {
- UInt32 prev = 0;
- for (i = 0; i < kNumHashValues; i++)
- {
- UInt32 prevGroupSize = counters[i] - prev;
- if (prevGroupSize == 0)
- continue;
- SetGroupSize(Indices + prev, prevGroupSize);
- prev = counters[i];
- }
- }
- #endif
- }
-
- {
- int NumRefBits;
- UInt32 NumSortedBytes;
- for (NumRefBits = 0; ((blockSize - 1) >> NumRefBits) != 0; NumRefBits++);
- NumRefBits = 32 - NumRefBits;
- if (NumRefBits > kNumRefBitsMax)
- NumRefBits = kNumRefBitsMax;
-
- for (NumSortedBytes = kNumHashBytes; ; NumSortedBytes <<= 1)
- {
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- UInt32 finishedGroupSize = 0;
- #endif
- UInt32 newLimit = 0;
- for (i = 0; i < blockSize;)
- {
- UInt32 groupSize;
- #ifdef BLOCK_SORT_EXTERNAL_FLAGS
-
- if ((Flags[i >> kNumFlagsBits] & (1 << (i & kFlagsMask))) == 0)
- {
- i++;
- continue;
- }
- for (groupSize = 1;
- (Flags[(i + groupSize) >> kNumFlagsBits] & (1 << ((i + groupSize) & kFlagsMask))) != 0;
- groupSize++);
-
- groupSize++;
-
- #else
-
- groupSize = ((Indices[i] & ~0xC0000000) >> kNumBitsMax);
- {
- Bool finishedGroup = ((Indices[i] & 0x80000000) == 0);
- if ((Indices[i] & 0x40000000) != 0)
- {
- groupSize += ((Indices[i + 1] >> kNumBitsMax) << kNumExtra0Bits);
- Indices[i + 1] &= kIndexMask;
- }
- Indices[i] &= kIndexMask;
- groupSize++;
- if (finishedGroup || groupSize == 1)
- {
- Indices[i - finishedGroupSize] &= kIndexMask;
- if (finishedGroupSize > 1)
- Indices[i - finishedGroupSize + 1] &= kIndexMask;
- {
- UInt32 newGroupSize = groupSize + finishedGroupSize;
- SetFinishedGroupSize(Indices + i - finishedGroupSize, newGroupSize);
- finishedGroupSize = newGroupSize;
- }
- i += groupSize;
- continue;
- }
- finishedGroupSize = 0;
- }
-
- #endif
-
- if (NumSortedBytes >= blockSize)
- {
- UInt32 j;
- for (j = 0; j < groupSize; j++)
- {
- UInt32 t = (i + j);
- /* Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask)); */
- Groups[Indices[t]] = t;
- }
- }
- else
- if (SortGroup(blockSize, NumSortedBytes, i, groupSize, NumRefBits, Indices
- #ifndef BLOCK_SORT_USE_HEAP_SORT
- , 0, blockSize
- #endif
- ) != 0)
- newLimit = i + groupSize;
- i += groupSize;
- }
- if (newLimit == 0)
- break;
- }
- }
- #ifndef BLOCK_SORT_EXTERNAL_FLAGS
- for (i = 0; i < blockSize;)
- {
- UInt32 groupSize = ((Indices[i] & ~0xC0000000) >> kNumBitsMax);
- if ((Indices[i] & 0x40000000) != 0)
- {
- groupSize += ((Indices[i + 1] >> kNumBitsMax) << kNumExtra0Bits);
- Indices[i + 1] &= kIndexMask;
- }
- Indices[i] &= kIndexMask;
- groupSize++;
- i += groupSize;
- }
- #endif
- return Groups[0];
+ UInt32 *counters = Indices + blockSize;
+ UInt32 i;
+ UInt32 *Groups;
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ UInt32 *Flags;
+ #endif
+
+ /* Radix-Sort for 2 bytes */
+ for (i = 0; i < kNumHashValues; i++)
+ counters[i] = 0;
+ for (i = 0; i < blockSize - 1; i++)
+ counters[((UInt32)data[i] << 8) | data[i + 1]]++;
+ counters[((UInt32)data[i] << 8) | data[0]]++;
+
+ Groups = counters + BS_TEMP_SIZE;
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ Flags = Groups + blockSize;
+ {
+ UInt32 numWords = (blockSize + kFlagsMask) >> kNumFlagsBits;
+ for (i = 0; i < numWords; i++)
+ Flags[i] = kAllFlags;
+ }
+ #endif
+
+ {
+ UInt32 sum = 0;
+ for (i = 0; i < kNumHashValues; i++)
+ {
+ UInt32 groupSize = counters[i];
+ if (groupSize > 0)
+ {
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+ UInt32 t = sum + groupSize - 1;
+ Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask));
+ #endif
+ sum += groupSize;
+ }
+ counters[i] = sum - groupSize;
+ }
+
+ for (i = 0; i < blockSize - 1; i++)
+ Groups[i] = counters[((UInt32)data[i] << 8) | data[i + 1]];
+ Groups[i] = counters[((UInt32)data[i] << 8) | data[0]];
+
+ for (i = 0; i < blockSize - 1; i++)
+ Indices[counters[((UInt32)data[i] << 8) | data[i + 1]]++] = i;
+ Indices[counters[((UInt32)data[i] << 8) | data[0]]++] = i;
+
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ {
+ UInt32 prev = 0;
+ for (i = 0; i < kNumHashValues; i++)
+ {
+ UInt32 prevGroupSize = counters[i] - prev;
+ if (prevGroupSize == 0)
+ continue;
+ SetGroupSize(Indices + prev, prevGroupSize);
+ prev = counters[i];
+ }
+ }
+ #endif
+ }
+
+ {
+ int NumRefBits;
+ UInt32 NumSortedBytes;
+ for (NumRefBits = 0; ((blockSize - 1) >> NumRefBits) != 0; NumRefBits++);
+ NumRefBits = 32 - NumRefBits;
+ if (NumRefBits > kNumRefBitsMax)
+ NumRefBits = kNumRefBitsMax;
+
+ for (NumSortedBytes = kNumHashBytes; ; NumSortedBytes <<= 1)
+ {
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ UInt32 finishedGroupSize = 0;
+ #endif
+ UInt32 newLimit = 0;
+ for (i = 0; i < blockSize;)
+ {
+ UInt32 groupSize;
+ #ifdef BLOCK_SORT_EXTERNAL_FLAGS
+
+ if ((Flags[i >> kNumFlagsBits] & (1 << (i & kFlagsMask))) == 0)
+ {
+ i++;
+ continue;
+ }
+ for (groupSize = 1;
+ (Flags[(i + groupSize) >> kNumFlagsBits] & (1 << ((i + groupSize) & kFlagsMask))) != 0;
+ groupSize++);
+
+ groupSize++;
+
+ #else
+
+ groupSize = ((Indices[i] & ~0xC0000000) >> kNumBitsMax);
+ {
+ Bool finishedGroup = ((Indices[i] & 0x80000000) == 0);
+ if ((Indices[i] & 0x40000000) != 0)
+ {
+ groupSize += ((Indices[i + 1] >> kNumBitsMax) << kNumExtra0Bits);
+ Indices[i + 1] &= kIndexMask;
+ }
+ Indices[i] &= kIndexMask;
+ groupSize++;
+ if (finishedGroup || groupSize == 1)
+ {
+ Indices[i - finishedGroupSize] &= kIndexMask;
+ if (finishedGroupSize > 1)
+ Indices[i - finishedGroupSize + 1] &= kIndexMask;
+ {
+ UInt32 newGroupSize = groupSize + finishedGroupSize;
+ SetFinishedGroupSize(Indices + i - finishedGroupSize, newGroupSize);
+ finishedGroupSize = newGroupSize;
+ }
+ i += groupSize;
+ continue;
+ }
+ finishedGroupSize = 0;
+ }
+
+ #endif
+
+ if (NumSortedBytes >= blockSize)
+ {
+ UInt32 j;
+ for (j = 0; j < groupSize; j++)
+ {
+ UInt32 t = (i + j);
+ /* Flags[t >> kNumFlagsBits] &= ~(1 << (t & kFlagsMask)); */
+ Groups[Indices[t]] = t;
+ }
+ }
+ else
+ if (SortGroup(blockSize, NumSortedBytes, i, groupSize, NumRefBits, Indices
+ #ifndef BLOCK_SORT_USE_HEAP_SORT
+ , 0, blockSize
+ #endif
+ ) != 0)
+ newLimit = i + groupSize;
+ i += groupSize;
+ }
+ if (newLimit == 0)
+ break;
+ }
+ }
+ #ifndef BLOCK_SORT_EXTERNAL_FLAGS
+ for (i = 0; i < blockSize;)
+ {
+ UInt32 groupSize = ((Indices[i] & ~0xC0000000) >> kNumBitsMax);
+ if ((Indices[i] & 0x40000000) != 0)
+ {
+ groupSize += ((Indices[i + 1] >> kNumBitsMax) << kNumExtra0Bits);
+ Indices[i + 1] &= kIndexMask;
+ }
+ Indices[i] &= kIndexMask;
+ groupSize++;
+ i += groupSize;
+ }
+ #endif
+ return Groups[0];
}
-
diff --git a/src/lib/lib7z/CpuArch.c b/src/lib/lib7z/CpuArch.c
index 6aa201a80c1..afbb25ccee6 100644
--- a/src/lib/lib7z/CpuArch.c
+++ b/src/lib/lib7z/CpuArch.c
@@ -12,36 +12,36 @@
#if defined(USE_ASM) && !defined(MY_CPU_AMD64)
static UInt32 CheckFlag(UInt32 flag)
{
- #ifdef _MSC_VER
- __asm pushfd;
- __asm pop EAX;
- __asm mov EDX, EAX;
- __asm xor EAX, flag;
- __asm push EAX;
- __asm popfd;
- __asm pushfd;
- __asm pop EAX;
- __asm xor EAX, EDX;
- __asm push EDX;
- __asm popfd;
- __asm and flag, EAX;
- #else
- __asm__ __volatile__ (
- "pushf\n\t"
- "pop %%EAX\n\t"
- "movl %%EAX,%%EDX\n\t"
- "xorl %0,%%EAX\n\t"
- "push %%EAX\n\t"
- "popf\n\t"
- "pushf\n\t"
- "pop %%EAX\n\t"
- "xorl %%EDX,%%EAX\n\t"
- "push %%EDX\n\t"
- "popf\n\t"
- "andl %%EAX, %0\n\t":
- "=c" (flag) : "c" (flag));
- #endif
- return flag;
+ #ifdef _MSC_VER
+ __asm pushfd;
+ __asm pop EAX;
+ __asm mov EDX, EAX;
+ __asm xor EAX, flag;
+ __asm push EAX;
+ __asm popfd;
+ __asm pushfd;
+ __asm pop EAX;
+ __asm xor EAX, EDX;
+ __asm push EDX;
+ __asm popfd;
+ __asm and flag, EAX;
+ #else
+ __asm__ __volatile__ (
+ "pushf\n\t"
+ "pop %%EAX\n\t"
+ "movl %%EAX,%%EDX\n\t"
+ "xorl %0,%%EAX\n\t"
+ "push %%EAX\n\t"
+ "popf\n\t"
+ "pushf\n\t"
+ "pop %%EAX\n\t"
+ "xorl %%EDX,%%EAX\n\t"
+ "push %%EDX\n\t"
+ "popf\n\t"
+ "andl %%EAX, %0\n\t":
+ "=c" (flag) : "c" (flag));
+ #endif
+ return flag;
}
#define CHECK_CPUID_IS_SUPPORTED if (CheckFlag(1 << 18) == 0 || CheckFlag(1 << 21) == 0) return False;
#else
@@ -50,118 +50,118 @@ static UInt32 CheckFlag(UInt32 flag)
static void MyCPUID(UInt32 function, UInt32 *a, UInt32 *b, UInt32 *c, UInt32 *d)
{
- #ifdef USE_ASM
-
- #ifdef _MSC_VER
-
- UInt32 a2, b2, c2, d2;
- __asm xor EBX, EBX;
- __asm xor ECX, ECX;
- __asm xor EDX, EDX;
- __asm mov EAX, function;
- __asm cpuid;
- __asm mov a2, EAX;
- __asm mov b2, EBX;
- __asm mov c2, ECX;
- __asm mov d2, EDX;
-
- *a = a2;
- *b = b2;
- *c = c2;
- *d = d2;
-
- #else
-
- #ifdef __PIC__
- __asm__ __volatile__ (
+ #ifdef USE_ASM
+
+ #ifdef _MSC_VER
+
+ UInt32 a2, b2, c2, d2;
+ __asm xor EBX, EBX;
+ __asm xor ECX, ECX;
+ __asm xor EDX, EDX;
+ __asm mov EAX, function;
+ __asm cpuid;
+ __asm mov a2, EAX;
+ __asm mov b2, EBX;
+ __asm mov c2, ECX;
+ __asm mov d2, EDX;
+
+ *a = a2;
+ *b = b2;
+ *c = c2;
+ *d = d2;
+
+ #else
+
+ #ifdef __PIC__
+ __asm__ __volatile__ (
"mov %%ebx, %%edi;"
- "cpuid;"
+ "cpuid;"
"xchgl %%ebx, %%edi;"
- : "=a" (*a) ,
- "=D" (*b) , /* edi */
- "=c" (*c) ,
- "=d" (*d)
- : "0" (function)) ;
- #else // __PIC__
- __asm__ __volatile__ (
- "cpuid"
- : "=a" (*a) ,
- "=b" (*b) ,
- "=c" (*c) ,
- "=d" (*d)
- : "0" (function)) ;
- #endif // __PIC__
-
- #endif
-
- #else
-
- int CPUInfo[4];
- __cpuid(CPUInfo, function);
- *a = CPUInfo[0];
- *b = CPUInfo[1];
- *c = CPUInfo[2];
- *d = CPUInfo[3];
-
- #endif
+ : "=a" (*a) ,
+ "=D" (*b) , /* edi */
+ "=c" (*c) ,
+ "=d" (*d)
+ : "0" (function)) ;
+ #else // __PIC__
+ __asm__ __volatile__ (
+ "cpuid"
+ : "=a" (*a) ,
+ "=b" (*b) ,
+ "=c" (*c) ,
+ "=d" (*d)
+ : "0" (function)) ;
+ #endif // __PIC__
+
+ #endif
+
+ #else
+
+ int CPUInfo[4];
+ __cpuid(CPUInfo, function);
+ *a = CPUInfo[0];
+ *b = CPUInfo[1];
+ *c = CPUInfo[2];
+ *d = CPUInfo[3];
+
+ #endif
}
Bool x86cpuid_CheckAndRead(Cx86cpuid *p)
{
- CHECK_CPUID_IS_SUPPORTED
- MyCPUID(0, &p->maxFunc, &p->vendor[0], &p->vendor[2], &p->vendor[1]);
- MyCPUID(1, &p->ver, &p->b, &p->c, &p->d);
- return True;
+ CHECK_CPUID_IS_SUPPORTED
+ MyCPUID(0, &p->maxFunc, &p->vendor[0], &p->vendor[2], &p->vendor[1]);
+ MyCPUID(1, &p->ver, &p->b, &p->c, &p->d);
+ return True;
}
static UInt32 kVendors[][3] =
{
- { 0x756E6547, 0x49656E69, 0x6C65746E},
- { 0x68747541, 0x69746E65, 0x444D4163},
- { 0x746E6543, 0x48727561, 0x736C7561}
+ { 0x756E6547, 0x49656E69, 0x6C65746E},
+ { 0x68747541, 0x69746E65, 0x444D4163},
+ { 0x746E6543, 0x48727561, 0x736C7561}
};
int x86cpuid_GetFirm(const Cx86cpuid *p)
{
- unsigned i;
- for (i = 0; i < sizeof(kVendors) / sizeof(kVendors[i]); i++)
- {
- const UInt32 *v = kVendors[i];
- if (v[0] == p->vendor[0] &&
- v[1] == p->vendor[1] &&
- v[2] == p->vendor[2])
- return (int)i;
- }
- return -1;
+ unsigned i;
+ for (i = 0; i < sizeof(kVendors) / sizeof(kVendors[i]); i++)
+ {
+ const UInt32 *v = kVendors[i];
+ if (v[0] == p->vendor[0] &&
+ v[1] == p->vendor[1] &&
+ v[2] == p->vendor[2])
+ return (int)i;
+ }
+ return -1;
}
Bool CPU_Is_InOrder(void)
{
- Cx86cpuid p;
- int firm;
- UInt32 family, model;
- if (!x86cpuid_CheckAndRead(&p))
- return True;
- family = x86cpuid_GetFamily(&p);
- model = x86cpuid_GetModel(&p);
- firm = x86cpuid_GetFirm(&p);
- switch (firm)
- {
- case CPU_FIRM_INTEL: return (family < 6 || (family == 6 && model == 0x100C));
- case CPU_FIRM_AMD: return (family < 5 || (family == 5 && (model < 6 || model == 0xA)));
- case CPU_FIRM_VIA: return (family < 6 || (family == 6 && model < 0xF));
- }
- return True;
+ Cx86cpuid p;
+ int firm;
+ UInt32 family, model;
+ if (!x86cpuid_CheckAndRead(&p))
+ return True;
+ family = x86cpuid_GetFamily(&p);
+ model = x86cpuid_GetModel(&p);
+ firm = x86cpuid_GetFirm(&p);
+ switch (firm)
+ {
+ case CPU_FIRM_INTEL: return (family < 6 || (family == 6 && model == 0x100C));
+ case CPU_FIRM_AMD: return (family < 5 || (family == 5 && (model < 6 || model == 0xA)));
+ case CPU_FIRM_VIA: return (family < 6 || (family == 6 && model < 0xF));
+ }
+ return True;
}
#if !defined(MY_CPU_AMD64) && defined(_WIN32_7Z)
static Bool CPU_Sys_Is_SSE_Supported(void)
{
- OSVERSIONINFO vi;
- vi.dwOSVersionInfoSize = sizeof(vi);
- if (!GetVersionEx(&vi))
- return False;
- return (vi.dwMajorVersion >= 5);
+ OSVERSIONINFO vi;
+ vi.dwOSVersionInfoSize = sizeof(vi);
+ if (!GetVersionEx(&vi))
+ return False;
+ return (vi.dwMajorVersion >= 5);
}
#define CHECK_SYS_SSE_SUPPORT if (!CPU_Sys_Is_SSE_Supported()) return False;
#else
@@ -170,11 +170,11 @@ static Bool CPU_Sys_Is_SSE_Supported(void)
Bool CPU_Is_Aes_Supported(void)
{
- Cx86cpuid p;
- CHECK_SYS_SSE_SUPPORT
- if (!x86cpuid_CheckAndRead(&p))
- return False;
- return (p.c >> 25) & 1;
+ Cx86cpuid p;
+ CHECK_SYS_SSE_SUPPORT
+ if (!x86cpuid_CheckAndRead(&p))
+ return False;
+ return (p.c >> 25) & 1;
}
#endif
diff --git a/src/lib/lib7z/CpuArch.h b/src/lib/lib7z/CpuArch.h
index 50a7467f639..e2043762650 100644
--- a/src/lib/lib7z/CpuArch.h
+++ b/src/lib/lib7z/CpuArch.h
@@ -74,26 +74,26 @@ Stop_Compiling_Bad_Endian
#define GetUi16(p) (((const Byte *)(p))[0] | ((UInt16)((const Byte *)(p))[1] << 8))
#define GetUi32(p) ( \
- ((const Byte *)(p))[0] | \
- ((UInt32)((const Byte *)(p))[1] << 8) | \
- ((UInt32)((const Byte *)(p))[2] << 16) | \
- ((UInt32)((const Byte *)(p))[3] << 24))
+ ((const Byte *)(p))[0] | \
+ ((UInt32)((const Byte *)(p))[1] << 8) | \
+ ((UInt32)((const Byte *)(p))[2] << 16) | \
+ ((UInt32)((const Byte *)(p))[3] << 24))
#define GetUi64(p) (GetUi32(p) | ((UInt64)GetUi32(((const Byte *)(p)) + 4) << 32))
#define SetUi16(p, d) { UInt32 _x_ = (d); \
- ((Byte *)(p))[0] = (Byte)_x_; \
- ((Byte *)(p))[1] = (Byte)(_x_ >> 8); }
+ ((Byte *)(p))[0] = (Byte)_x_; \
+ ((Byte *)(p))[1] = (Byte)(_x_ >> 8); }
#define SetUi32(p, d) { UInt32 _x_ = (d); \
- ((Byte *)(p))[0] = (Byte)_x_; \
- ((Byte *)(p))[1] = (Byte)(_x_ >> 8); \
- ((Byte *)(p))[2] = (Byte)(_x_ >> 16); \
- ((Byte *)(p))[3] = (Byte)(_x_ >> 24); }
+ ((Byte *)(p))[0] = (Byte)_x_; \
+ ((Byte *)(p))[1] = (Byte)(_x_ >> 8); \
+ ((Byte *)(p))[2] = (Byte)(_x_ >> 16); \
+ ((Byte *)(p))[3] = (Byte)(_x_ >> 24); }
#define SetUi64(p, d) { UInt64 _x64_ = (d); \
- SetUi32(p, (UInt32)_x64_); \
- SetUi32(((Byte *)(p)) + 4, (UInt32)(_x64_ >> 32)); }
+ SetUi32(p, (UInt32)_x64_); \
+ SetUi32(((Byte *)(p)) + 4, (UInt32)(_x64_ >> 32)); }
#endif
@@ -108,10 +108,10 @@ Stop_Compiling_Bad_Endian
#else
#define GetBe32(p) ( \
- ((UInt32)((const Byte *)(p))[0] << 24) | \
- ((UInt32)((const Byte *)(p))[1] << 16) | \
- ((UInt32)((const Byte *)(p))[2] << 8) | \
- ((const Byte *)(p))[3] )
+ ((UInt32)((const Byte *)(p))[0] << 24) | \
+ ((UInt32)((const Byte *)(p))[1] << 16) | \
+ ((UInt32)((const Byte *)(p))[2] << 8) | \
+ ((const Byte *)(p))[3] )
#define GetBe64(p) (((UInt64)GetBe32(p) << 32) | GetBe32(((const Byte *)(p)) + 4))
@@ -124,19 +124,19 @@ Stop_Compiling_Bad_Endian
typedef struct
{
- UInt32 maxFunc;
- UInt32 vendor[3];
- UInt32 ver;
- UInt32 b;
- UInt32 c;
- UInt32 d;
+ UInt32 maxFunc;
+ UInt32 vendor[3];
+ UInt32 ver;
+ UInt32 b;
+ UInt32 c;
+ UInt32 d;
} Cx86cpuid;
enum
{
- CPU_FIRM_INTEL,
- CPU_FIRM_AMD,
- CPU_FIRM_VIA
+ CPU_FIRM_INTEL,
+ CPU_FIRM_AMD,
+ CPU_FIRM_VIA
};
Bool x86cpuid_CheckAndRead(Cx86cpuid *p);
diff --git a/src/lib/lib7z/Delta.c b/src/lib/lib7z/Delta.c
index 2b327f15f37..c823a0b21ba 100644
--- a/src/lib/lib7z/Delta.c
+++ b/src/lib/lib7z/Delta.c
@@ -5,58 +5,58 @@
void Delta_Init(Byte *state)
{
- unsigned i;
- for (i = 0; i < DELTA_STATE_SIZE; i++)
- state[i] = 0;
+ unsigned i;
+ for (i = 0; i < DELTA_STATE_SIZE; i++)
+ state[i] = 0;
}
static void MyMemCpy(Byte *dest, const Byte *src, unsigned size)
{
- unsigned i;
- for (i = 0; i < size; i++)
- dest[i] = src[i];
+ unsigned i;
+ for (i = 0; i < size; i++)
+ dest[i] = src[i];
}
void Delta_Encode(Byte *state, unsigned delta, Byte *data, SizeT size)
{
- Byte buf[DELTA_STATE_SIZE];
- unsigned j = 0;
- MyMemCpy(buf, state, delta);
- {
- SizeT i;
- for (i = 0; i < size;)
- {
- for (j = 0; j < delta && i < size; i++, j++)
- {
- Byte b = data[i];
- data[i] = (Byte)(b - buf[j]);
- buf[j] = b;
- }
- }
- }
- if (j == delta)
- j = 0;
- MyMemCpy(state, buf + j, delta - j);
- MyMemCpy(state + delta - j, buf, j);
+ Byte buf[DELTA_STATE_SIZE];
+ unsigned j = 0;
+ MyMemCpy(buf, state, delta);
+ {
+ SizeT i;
+ for (i = 0; i < size;)
+ {
+ for (j = 0; j < delta && i < size; i++, j++)
+ {
+ Byte b = data[i];
+ data[i] = (Byte)(b - buf[j]);
+ buf[j] = b;
+ }
+ }
+ }
+ if (j == delta)
+ j = 0;
+ MyMemCpy(state, buf + j, delta - j);
+ MyMemCpy(state + delta - j, buf, j);
}
void Delta_Decode(Byte *state, unsigned delta, Byte *data, SizeT size)
{
- Byte buf[DELTA_STATE_SIZE];
- unsigned j = 0;
- MyMemCpy(buf, state, delta);
- {
- SizeT i;
- for (i = 0; i < size;)
- {
- for (j = 0; j < delta && i < size; i++, j++)
- {
- buf[j] = data[i] = (Byte)(buf[j] + data[i]);
- }
- }
- }
- if (j == delta)
- j = 0;
- MyMemCpy(state, buf + j, delta - j);
- MyMemCpy(state + delta - j, buf, j);
+ Byte buf[DELTA_STATE_SIZE];
+ unsigned j = 0;
+ MyMemCpy(buf, state, delta);
+ {
+ SizeT i;
+ for (i = 0; i < size;)
+ {
+ for (j = 0; j < delta && i < size; i++, j++)
+ {
+ buf[j] = data[i] = (Byte)(buf[j] + data[i]);
+ }
+ }
+ }
+ if (j == delta)
+ j = 0;
+ MyMemCpy(state, buf + j, delta - j);
+ MyMemCpy(state + delta - j, buf, j);
}
diff --git a/src/lib/lib7z/HuffEnc.c b/src/lib/lib7z/HuffEnc.c
index 9e6a139506f..a43229c9b2a 100644
--- a/src/lib/lib7z/HuffEnc.c
+++ b/src/lib/lib7z/HuffEnc.c
@@ -14,133 +14,133 @@
void Huffman_Generate(const UInt32 *freqs, UInt32 *p, Byte *lens, UInt32 numSymbols, UInt32 maxLen)
{
- UInt32 num = 0;
- /* if (maxLen > 10) maxLen = 10; */
- {
- UInt32 i;
-
- #ifdef HUFFMAN_SPEED_OPT
-
- UInt32 counters[NUM_COUNTERS];
- for (i = 0; i < NUM_COUNTERS; i++)
- counters[i] = 0;
- for (i = 0; i < numSymbols; i++)
- {
- UInt32 freq = freqs[i];
- counters[(freq < NUM_COUNTERS - 1) ? freq : NUM_COUNTERS - 1]++;
- }
-
- for (i = 1; i < NUM_COUNTERS; i++)
- {
- UInt32 temp = counters[i];
- counters[i] = num;
- num += temp;
- }
-
- for (i = 0; i < numSymbols; i++)
- {
- UInt32 freq = freqs[i];
- if (freq == 0)
- lens[i] = 0;
- else
- p[counters[((freq < NUM_COUNTERS - 1) ? freq : NUM_COUNTERS - 1)]++] = i | (freq << NUM_BITS);
- }
- counters[0] = 0;
- HeapSort(p + counters[NUM_COUNTERS - 2], counters[NUM_COUNTERS - 1] - counters[NUM_COUNTERS - 2]);
-
- #else
-
- for (i = 0; i < numSymbols; i++)
- {
- UInt32 freq = freqs[i];
- if (freq == 0)
- lens[i] = 0;
- else
- p[num++] = i | (freq << NUM_BITS);
- }
- HeapSort(p, num);
-
- #endif
- }
-
- if (num < 2)
- {
- unsigned minCode = 0;
- unsigned maxCode = 1;
- if (num == 1)
- {
- maxCode = (unsigned)p[0] & MASK;
- if (maxCode == 0)
- maxCode++;
- }
- p[minCode] = 0;
- p[maxCode] = 1;
- lens[minCode] = lens[maxCode] = 1;
- return;
- }
-
- {
- UInt32 b, e, i;
-
- i = b = e = 0;
- do
- {
- UInt32 n, m, freq;
- n = (i != num && (b == e || (p[i] >> NUM_BITS) <= (p[b] >> NUM_BITS))) ? i++ : b++;
- freq = (p[n] & ~MASK);
- p[n] = (p[n] & MASK) | (e << NUM_BITS);
- m = (i != num && (b == e || (p[i] >> NUM_BITS) <= (p[b] >> NUM_BITS))) ? i++ : b++;
- freq += (p[m] & ~MASK);
- p[m] = (p[m] & MASK) | (e << NUM_BITS);
- p[e] = (p[e] & MASK) | freq;
- e++;
- }
- while (num - e > 1);
-
- {
- UInt32 lenCounters[kMaxLen + 1];
- for (i = 0; i <= kMaxLen; i++)
- lenCounters[i] = 0;
-
- p[--e] &= MASK;
- lenCounters[1] = 2;
- while (e > 0)
- {
- UInt32 len = (p[p[--e] >> NUM_BITS] >> NUM_BITS) + 1;
- p[e] = (p[e] & MASK) | (len << NUM_BITS);
- if (len >= maxLen)
- for (len = maxLen - 1; lenCounters[len] == 0; len--);
- lenCounters[len]--;
- lenCounters[len + 1] += 2;
- }
-
- {
- UInt32 len;
- i = 0;
- for (len = maxLen; len != 0; len--)
- {
- UInt32 num;
- for (num = lenCounters[len]; num != 0; num--)
- lens[p[i++] & MASK] = (Byte)len;
- }
- }
-
- {
- UInt32 nextCodes[kMaxLen + 1];
- {
- UInt32 code = 0;
- UInt32 len;
- for (len = 1; len <= kMaxLen; len++)
- nextCodes[len] = code = (code + lenCounters[len - 1]) << 1;
- }
- /* if (code + lenCounters[kMaxLen] - 1 != (1 << kMaxLen) - 1) throw 1; */
-
- {
- UInt32 i;
- for (i = 0; i < numSymbols; i++)
- p[i] = nextCodes[lens[i]]++;
- }
- }
- }
- }
+ UInt32 num = 0;
+ /* if (maxLen > 10) maxLen = 10; */
+ {
+ UInt32 i;
+
+ #ifdef HUFFMAN_SPEED_OPT
+
+ UInt32 counters[NUM_COUNTERS];
+ for (i = 0; i < NUM_COUNTERS; i++)
+ counters[i] = 0;
+ for (i = 0; i < numSymbols; i++)
+ {
+ UInt32 freq = freqs[i];
+ counters[(freq < NUM_COUNTERS - 1) ? freq : NUM_COUNTERS - 1]++;
+ }
+
+ for (i = 1; i < NUM_COUNTERS; i++)
+ {
+ UInt32 temp = counters[i];
+ counters[i] = num;
+ num += temp;
+ }
+
+ for (i = 0; i < numSymbols; i++)
+ {
+ UInt32 freq = freqs[i];
+ if (freq == 0)
+ lens[i] = 0;
+ else
+ p[counters[((freq < NUM_COUNTERS - 1) ? freq : NUM_COUNTERS - 1)]++] = i | (freq << NUM_BITS);
+ }
+ counters[0] = 0;
+ HeapSort(p + counters[NUM_COUNTERS - 2], counters[NUM_COUNTERS - 1] - counters[NUM_COUNTERS - 2]);
+
+ #else
+
+ for (i = 0; i < numSymbols; i++)
+ {
+ UInt32 freq = freqs[i];
+ if (freq == 0)
+ lens[i] = 0;
+ else
+ p[num++] = i | (freq << NUM_BITS);
+ }
+ HeapSort(p, num);
+
+ #endif
+ }
+
+ if (num < 2)
+ {
+ unsigned minCode = 0;
+ unsigned maxCode = 1;
+ if (num == 1)
+ {
+ maxCode = (unsigned)p[0] & MASK;
+ if (maxCode == 0)
+ maxCode++;
+ }
+ p[minCode] = 0;
+ p[maxCode] = 1;
+ lens[minCode] = lens[maxCode] = 1;
+ return;
+ }
+
+ {
+ UInt32 b, e, i;
+
+ i = b = e = 0;
+ do
+ {
+ UInt32 n, m, freq;
+ n = (i != num && (b == e || (p[i] >> NUM_BITS) <= (p[b] >> NUM_BITS))) ? i++ : b++;
+ freq = (p[n] & ~MASK);
+ p[n] = (p[n] & MASK) | (e << NUM_BITS);
+ m = (i != num && (b == e || (p[i] >> NUM_BITS) <= (p[b] >> NUM_BITS))) ? i++ : b++;
+ freq += (p[m] & ~MASK);
+ p[m] = (p[m] & MASK) | (e << NUM_BITS);
+ p[e] = (p[e] & MASK) | freq;
+ e++;
+ }
+ while (num - e > 1);
+
+ {
+ UInt32 lenCounters[kMaxLen + 1];
+ for (i = 0; i <= kMaxLen; i++)
+ lenCounters[i] = 0;
+
+ p[--e] &= MASK;
+ lenCounters[1] = 2;
+ while (e > 0)
+ {
+ UInt32 len = (p[p[--e] >> NUM_BITS] >> NUM_BITS) + 1;
+ p[e] = (p[e] & MASK) | (len << NUM_BITS);
+ if (len >= maxLen)
+ for (len = maxLen - 1; lenCounters[len] == 0; len--);
+ lenCounters[len]--;
+ lenCounters[len + 1] += 2;
+ }
+
+ {
+ UInt32 len;
+ i = 0;
+ for (len = maxLen; len != 0; len--)
+ {
+ UInt32 num;
+ for (num = lenCounters[len]; num != 0; num--)
+ lens[p[i++] & MASK] = (Byte)len;
+ }
+ }
+
+ {
+ UInt32 nextCodes[kMaxLen + 1];
+ {
+ UInt32 code = 0;
+ UInt32 len;
+ for (len = 1; len <= kMaxLen; len++)
+ nextCodes[len] = code = (code + lenCounters[len - 1]) << 1;
+ }
+ /* if (code + lenCounters[kMaxLen] - 1 != (1 << kMaxLen) - 1) throw 1; */
+
+ {
+ UInt32 i;
+ for (i = 0; i < numSymbols; i++)
+ p[i] = nextCodes[lens[i]]++;
+ }
+ }
+ }
+ }
}
diff --git a/src/lib/lib7z/LzFind.c b/src/lib/lib7z/LzFind.c
index e753d04c692..554e6be9a3e 100644
--- a/src/lib/lib7z/LzFind.c
+++ b/src/lib/lib7z/LzFind.c
@@ -16,30 +16,30 @@
static void LzInWindow_Free(CMatchFinder *p, ISzAlloc *alloc)
{
- if (!p->directInput)
- {
- alloc->Free(alloc, p->bufferBase);
- p->bufferBase = 0;
- }
+ if (!p->directInput)
+ {
+ alloc->Free(alloc, p->bufferBase);
+ p->bufferBase = 0;
+ }
}
/* keepSizeBefore + keepSizeAfter + keepSizeReserv must be < 4G) */
static int LzInWindow_Create(CMatchFinder *p, UInt32 keepSizeReserv, ISzAlloc *alloc)
{
- UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
- if (p->directInput)
- {
- p->blockSize = blockSize;
- return 1;
- }
- if (p->bufferBase == 0 || p->blockSize != blockSize)
- {
- LzInWindow_Free(p, alloc);
- p->blockSize = blockSize;
- p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize);
- }
- return (p->bufferBase != 0);
+ UInt32 blockSize = p->keepSizeBefore + p->keepSizeAfter + keepSizeReserv;
+ if (p->directInput)
+ {
+ p->blockSize = blockSize;
+ return 1;
+ }
+ if (p->bufferBase == 0 || p->blockSize != blockSize)
+ {
+ LzInWindow_Free(p, alloc);
+ p->blockSize = blockSize;
+ p->bufferBase = (Byte *)alloc->Alloc(alloc, (size_t)blockSize);
+ }
+ return (p->bufferBase != 0);
}
Byte *MatchFinder_GetPointerToCurrentPos(CMatchFinder *p) { return p->buffer; }
@@ -49,425 +49,425 @@ UInt32 MatchFinder_GetNumAvailableBytes(CMatchFinder *p) { return p->streamPos -
void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue)
{
- p->posLimit -= subValue;
- p->pos -= subValue;
- p->streamPos -= subValue;
+ p->posLimit -= subValue;
+ p->pos -= subValue;
+ p->streamPos -= subValue;
}
static void MatchFinder_ReadBlock(CMatchFinder *p)
{
- if (p->streamEndWasReached || p->result != SZ_OK)
- return;
- if (p->directInput)
- {
- UInt32 curSize = 0xFFFFFFFF - p->streamPos;
- if (curSize > p->directInputRem)
- curSize = (UInt32)p->directInputRem;
- p->directInputRem -= curSize;
- p->streamPos += curSize;
- if (p->directInputRem == 0)
- p->streamEndWasReached = 1;
- return;
- }
- for (;;)
- {
- Byte *dest = p->buffer + (p->streamPos - p->pos);
- size_t size = (p->bufferBase + p->blockSize - dest);
- if (size == 0)
- return;
- p->result = p->stream->Read(p->stream, dest, &size);
- if (p->result != SZ_OK)
- return;
- if (size == 0)
- {
- p->streamEndWasReached = 1;
- return;
- }
- p->streamPos += (UInt32)size;
- if (p->streamPos - p->pos > p->keepSizeAfter)
- return;
- }
+ if (p->streamEndWasReached || p->result != SZ_OK)
+ return;
+ if (p->directInput)
+ {
+ UInt32 curSize = 0xFFFFFFFF - p->streamPos;
+ if (curSize > p->directInputRem)
+ curSize = (UInt32)p->directInputRem;
+ p->directInputRem -= curSize;
+ p->streamPos += curSize;
+ if (p->directInputRem == 0)
+ p->streamEndWasReached = 1;
+ return;
+ }
+ for (;;)
+ {
+ Byte *dest = p->buffer + (p->streamPos - p->pos);
+ size_t size = (p->bufferBase + p->blockSize - dest);
+ if (size == 0)
+ return;
+ p->result = p->stream->Read(p->stream, dest, &size);
+ if (p->result != SZ_OK)
+ return;
+ if (size == 0)
+ {
+ p->streamEndWasReached = 1;
+ return;
+ }
+ p->streamPos += (UInt32)size;
+ if (p->streamPos - p->pos > p->keepSizeAfter)
+ return;
+ }
}
void MatchFinder_MoveBlock(CMatchFinder *p)
{
- memmove(p->bufferBase,
- p->buffer - p->keepSizeBefore,
- (size_t)(p->streamPos - p->pos + p->keepSizeBefore));
- p->buffer = p->bufferBase + p->keepSizeBefore;
+ memmove(p->bufferBase,
+ p->buffer - p->keepSizeBefore,
+ (size_t)(p->streamPos - p->pos + p->keepSizeBefore));
+ p->buffer = p->bufferBase + p->keepSizeBefore;
}
int MatchFinder_NeedMove(CMatchFinder *p)
{
- if (p->directInput)
- return 0;
- /* if (p->streamEndWasReached) return 0; */
- return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
+ if (p->directInput)
+ return 0;
+ /* if (p->streamEndWasReached) return 0; */
+ return ((size_t)(p->bufferBase + p->blockSize - p->buffer) <= p->keepSizeAfter);
}
void MatchFinder_ReadIfRequired(CMatchFinder *p)
{
- if (p->streamEndWasReached)
- return;
- if (p->keepSizeAfter >= p->streamPos - p->pos)
- MatchFinder_ReadBlock(p);
+ if (p->streamEndWasReached)
+ return;
+ if (p->keepSizeAfter >= p->streamPos - p->pos)
+ MatchFinder_ReadBlock(p);
}
static void MatchFinder_CheckAndMoveAndRead(CMatchFinder *p)
{
- if (MatchFinder_NeedMove(p))
- MatchFinder_MoveBlock(p);
- MatchFinder_ReadBlock(p);
+ if (MatchFinder_NeedMove(p))
+ MatchFinder_MoveBlock(p);
+ MatchFinder_ReadBlock(p);
}
static void MatchFinder_SetDefaultSettings(CMatchFinder *p)
{
- p->cutValue = 32;
- p->btMode = 1;
- p->numHashBytes = 4;
- p->bigHash = 0;
+ p->cutValue = 32;
+ p->btMode = 1;
+ p->numHashBytes = 4;
+ p->bigHash = 0;
}
#define kCrcPoly 0xEDB88320
void MatchFinder_Construct(CMatchFinder *p)
{
- UInt32 i;
- p->bufferBase = 0;
- p->directInput = 0;
- p->hash = 0;
- MatchFinder_SetDefaultSettings(p);
+ UInt32 i;
+ p->bufferBase = 0;
+ p->directInput = 0;
+ p->hash = 0;
+ MatchFinder_SetDefaultSettings(p);
- for (i = 0; i < 256; i++)
- {
- UInt32 r = i;
- int j;
- for (j = 0; j < 8; j++)
- r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1));
- p->crc[i] = r;
- }
+ for (i = 0; i < 256; i++)
+ {
+ UInt32 r = i;
+ int j;
+ for (j = 0; j < 8; j++)
+ r = (r >> 1) ^ (kCrcPoly & ~((r & 1) - 1));
+ p->crc[i] = r;
+ }
}
static void MatchFinder_FreeThisClassMemory(CMatchFinder *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->hash);
- p->hash = 0;
+ alloc->Free(alloc, p->hash);
+ p->hash = 0;
}
void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc)
{
- MatchFinder_FreeThisClassMemory(p, alloc);
- LzInWindow_Free(p, alloc);
+ MatchFinder_FreeThisClassMemory(p, alloc);
+ LzInWindow_Free(p, alloc);
}
static CLzRef* AllocRefs(UInt32 num, ISzAlloc *alloc)
{
- size_t sizeInBytes = (size_t)num * sizeof(CLzRef);
- if (sizeInBytes / sizeof(CLzRef) != num)
- return 0;
- return (CLzRef *)alloc->Alloc(alloc, sizeInBytes);
+ size_t sizeInBytes = (size_t)num * sizeof(CLzRef);
+ if (sizeInBytes / sizeof(CLzRef) != num)
+ return 0;
+ return (CLzRef *)alloc->Alloc(alloc, sizeInBytes);
}
int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
- UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
- ISzAlloc *alloc)
-{
- UInt32 sizeReserv;
- if (historySize > kMaxHistorySize)
- {
- MatchFinder_Free(p, alloc);
- return 0;
- }
- sizeReserv = historySize >> 1;
- if (historySize > ((UInt32)2 << 30))
- sizeReserv = historySize >> 2;
- sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19);
-
- p->keepSizeBefore = historySize + keepAddBufferBefore + 1;
- p->keepSizeAfter = matchMaxLen + keepAddBufferAfter;
- /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */
- if (LzInWindow_Create(p, sizeReserv, alloc))
- {
- UInt32 newCyclicBufferSize = historySize + 1;
- UInt32 hs;
- p->matchMaxLen = matchMaxLen;
- {
- p->fixedHashSize = 0;
- if (p->numHashBytes == 2)
- hs = (1 << 16) - 1;
- else
- {
- hs = historySize - 1;
- hs |= (hs >> 1);
- hs |= (hs >> 2);
- hs |= (hs >> 4);
- hs |= (hs >> 8);
- hs >>= 1;
- hs |= 0xFFFF; /* don't change it! It's required for Deflate */
- if (hs > (1 << 24))
- {
- if (p->numHashBytes == 3)
- hs = (1 << 24) - 1;
- else
- hs >>= 1;
- }
- }
- p->hashMask = hs;
- hs++;
- if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size;
- if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size;
- if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size;
- hs += p->fixedHashSize;
- }
-
- {
- UInt32 prevSize = p->hashSizeSum + p->numSons;
- UInt32 newSize;
- p->historySize = historySize;
- p->hashSizeSum = hs;
- p->cyclicBufferSize = newCyclicBufferSize;
- p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize);
- newSize = p->hashSizeSum + p->numSons;
- if (p->hash != 0 && prevSize == newSize)
- return 1;
- MatchFinder_FreeThisClassMemory(p, alloc);
- p->hash = AllocRefs(newSize, alloc);
- if (p->hash != 0)
- {
- p->son = p->hash + p->hashSizeSum;
- return 1;
- }
- }
- }
- MatchFinder_Free(p, alloc);
- return 0;
+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
+ ISzAlloc *alloc)
+{
+ UInt32 sizeReserv;
+ if (historySize > kMaxHistorySize)
+ {
+ MatchFinder_Free(p, alloc);
+ return 0;
+ }
+ sizeReserv = historySize >> 1;
+ if (historySize > ((UInt32)2 << 30))
+ sizeReserv = historySize >> 2;
+ sizeReserv += (keepAddBufferBefore + matchMaxLen + keepAddBufferAfter) / 2 + (1 << 19);
+
+ p->keepSizeBefore = historySize + keepAddBufferBefore + 1;
+ p->keepSizeAfter = matchMaxLen + keepAddBufferAfter;
+ /* we need one additional byte, since we use MoveBlock after pos++ and before dictionary using */
+ if (LzInWindow_Create(p, sizeReserv, alloc))
+ {
+ UInt32 newCyclicBufferSize = historySize + 1;
+ UInt32 hs;
+ p->matchMaxLen = matchMaxLen;
+ {
+ p->fixedHashSize = 0;
+ if (p->numHashBytes == 2)
+ hs = (1 << 16) - 1;
+ else
+ {
+ hs = historySize - 1;
+ hs |= (hs >> 1);
+ hs |= (hs >> 2);
+ hs |= (hs >> 4);
+ hs |= (hs >> 8);
+ hs >>= 1;
+ hs |= 0xFFFF; /* don't change it! It's required for Deflate */
+ if (hs > (1 << 24))
+ {
+ if (p->numHashBytes == 3)
+ hs = (1 << 24) - 1;
+ else
+ hs >>= 1;
+ }
+ }
+ p->hashMask = hs;
+ hs++;
+ if (p->numHashBytes > 2) p->fixedHashSize += kHash2Size;
+ if (p->numHashBytes > 3) p->fixedHashSize += kHash3Size;
+ if (p->numHashBytes > 4) p->fixedHashSize += kHash4Size;
+ hs += p->fixedHashSize;
+ }
+
+ {
+ UInt32 prevSize = p->hashSizeSum + p->numSons;
+ UInt32 newSize;
+ p->historySize = historySize;
+ p->hashSizeSum = hs;
+ p->cyclicBufferSize = newCyclicBufferSize;
+ p->numSons = (p->btMode ? newCyclicBufferSize * 2 : newCyclicBufferSize);
+ newSize = p->hashSizeSum + p->numSons;
+ if (p->hash != 0 && prevSize == newSize)
+ return 1;
+ MatchFinder_FreeThisClassMemory(p, alloc);
+ p->hash = AllocRefs(newSize, alloc);
+ if (p->hash != 0)
+ {
+ p->son = p->hash + p->hashSizeSum;
+ return 1;
+ }
+ }
+ }
+ MatchFinder_Free(p, alloc);
+ return 0;
}
static void MatchFinder_SetLimits(CMatchFinder *p)
{
- UInt32 limit = kMaxValForNormalize - p->pos;
- UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos;
- if (limit2 < limit)
- limit = limit2;
- limit2 = p->streamPos - p->pos;
- if (limit2 <= p->keepSizeAfter)
- {
- if (limit2 > 0)
- limit2 = 1;
- }
- else
- limit2 -= p->keepSizeAfter;
- if (limit2 < limit)
- limit = limit2;
- {
- UInt32 lenLimit = p->streamPos - p->pos;
- if (lenLimit > p->matchMaxLen)
- lenLimit = p->matchMaxLen;
- p->lenLimit = lenLimit;
- }
- p->posLimit = p->pos + limit;
+ UInt32 limit = kMaxValForNormalize - p->pos;
+ UInt32 limit2 = p->cyclicBufferSize - p->cyclicBufferPos;
+ if (limit2 < limit)
+ limit = limit2;
+ limit2 = p->streamPos - p->pos;
+ if (limit2 <= p->keepSizeAfter)
+ {
+ if (limit2 > 0)
+ limit2 = 1;
+ }
+ else
+ limit2 -= p->keepSizeAfter;
+ if (limit2 < limit)
+ limit = limit2;
+ {
+ UInt32 lenLimit = p->streamPos - p->pos;
+ if (lenLimit > p->matchMaxLen)
+ lenLimit = p->matchMaxLen;
+ p->lenLimit = lenLimit;
+ }
+ p->posLimit = p->pos + limit;
}
void MatchFinder_Init(CMatchFinder *p)
{
- UInt32 i;
- for (i = 0; i < p->hashSizeSum; i++)
- p->hash[i] = kEmptyHashValue;
- p->cyclicBufferPos = 0;
- p->buffer = p->bufferBase;
- p->pos = p->streamPos = p->cyclicBufferSize;
- p->result = SZ_OK;
- p->streamEndWasReached = 0;
- MatchFinder_ReadBlock(p);
- MatchFinder_SetLimits(p);
+ UInt32 i;
+ for (i = 0; i < p->hashSizeSum; i++)
+ p->hash[i] = kEmptyHashValue;
+ p->cyclicBufferPos = 0;
+ p->buffer = p->bufferBase;
+ p->pos = p->streamPos = p->cyclicBufferSize;
+ p->result = SZ_OK;
+ p->streamEndWasReached = 0;
+ MatchFinder_ReadBlock(p);
+ MatchFinder_SetLimits(p);
}
static UInt32 MatchFinder_GetSubValue(CMatchFinder *p)
{
- return (p->pos - p->historySize - 1) & kNormalizeMask;
+ return (p->pos - p->historySize - 1) & kNormalizeMask;
}
void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems)
{
- UInt32 i;
- for (i = 0; i < numItems; i++)
- {
- UInt32 value = items[i];
- if (value <= subValue)
- value = kEmptyHashValue;
- else
- value -= subValue;
- items[i] = value;
- }
+ UInt32 i;
+ for (i = 0; i < numItems; i++)
+ {
+ UInt32 value = items[i];
+ if (value <= subValue)
+ value = kEmptyHashValue;
+ else
+ value -= subValue;
+ items[i] = value;
+ }
}
static void MatchFinder_Normalize(CMatchFinder *p)
{
- UInt32 subValue = MatchFinder_GetSubValue(p);
- MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons);
- MatchFinder_ReduceOffsets(p, subValue);
+ UInt32 subValue = MatchFinder_GetSubValue(p);
+ MatchFinder_Normalize3(subValue, p->hash, p->hashSizeSum + p->numSons);
+ MatchFinder_ReduceOffsets(p, subValue);
}
static void MatchFinder_CheckLimits(CMatchFinder *p)
{
- if (p->pos == kMaxValForNormalize)
- MatchFinder_Normalize(p);
- if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos)
- MatchFinder_CheckAndMoveAndRead(p);
- if (p->cyclicBufferPos == p->cyclicBufferSize)
- p->cyclicBufferPos = 0;
- MatchFinder_SetLimits(p);
+ if (p->pos == kMaxValForNormalize)
+ MatchFinder_Normalize(p);
+ if (!p->streamEndWasReached && p->keepSizeAfter == p->streamPos - p->pos)
+ MatchFinder_CheckAndMoveAndRead(p);
+ if (p->cyclicBufferPos == p->cyclicBufferSize)
+ p->cyclicBufferPos = 0;
+ MatchFinder_SetLimits(p);
}
static UInt32 * Hc_GetMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
- UInt32 *distances, UInt32 maxLen)
-{
- son[_cyclicBufferPos] = curMatch;
- for (;;)
- {
- UInt32 delta = pos - curMatch;
- if (cutValue-- == 0 || delta >= _cyclicBufferSize)
- return distances;
- {
- const Byte *pb = cur - delta;
- curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
- if (pb[maxLen] == cur[maxLen] && *pb == *cur)
- {
- UInt32 len = 0;
- while (++len != lenLimit)
- if (pb[len] != cur[len])
- break;
- if (maxLen < len)
- {
- *distances++ = maxLen = len;
- *distances++ = delta - 1;
- if (len == lenLimit)
- return distances;
- }
- }
- }
- }
+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
+ UInt32 *distances, UInt32 maxLen)
+{
+ son[_cyclicBufferPos] = curMatch;
+ for (;;)
+ {
+ UInt32 delta = pos - curMatch;
+ if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+ return distances;
+ {
+ const Byte *pb = cur - delta;
+ curMatch = son[_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)];
+ if (pb[maxLen] == cur[maxLen] && *pb == *cur)
+ {
+ UInt32 len = 0;
+ while (++len != lenLimit)
+ if (pb[len] != cur[len])
+ break;
+ if (maxLen < len)
+ {
+ *distances++ = maxLen = len;
+ *distances++ = delta - 1;
+ if (len == lenLimit)
+ return distances;
+ }
+ }
+ }
+ }
}
UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
- UInt32 *distances, UInt32 maxLen)
-{
- CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
- CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
- UInt32 len0 = 0, len1 = 0;
- for (;;)
- {
- UInt32 delta = pos - curMatch;
- if (cutValue-- == 0 || delta >= _cyclicBufferSize)
- {
- *ptr0 = *ptr1 = kEmptyHashValue;
- return distances;
- }
- {
- CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
- const Byte *pb = cur - delta;
- UInt32 len = (len0 < len1 ? len0 : len1);
- if (pb[len] == cur[len])
- {
- if (++len != lenLimit && pb[len] == cur[len])
- while (++len != lenLimit)
- if (pb[len] != cur[len])
- break;
- if (maxLen < len)
- {
- *distances++ = maxLen = len;
- *distances++ = delta - 1;
- if (len == lenLimit)
- {
- *ptr1 = pair[0];
- *ptr0 = pair[1];
- return distances;
- }
- }
- }
- if (pb[len] < cur[len])
- {
- *ptr1 = curMatch;
- ptr1 = pair + 1;
- curMatch = *ptr1;
- len1 = len;
- }
- else
- {
- *ptr0 = curMatch;
- ptr0 = pair;
- curMatch = *ptr0;
- len0 = len;
- }
- }
- }
+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue,
+ UInt32 *distances, UInt32 maxLen)
+{
+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
+ UInt32 len0 = 0, len1 = 0;
+ for (;;)
+ {
+ UInt32 delta = pos - curMatch;
+ if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+ {
+ *ptr0 = *ptr1 = kEmptyHashValue;
+ return distances;
+ }
+ {
+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
+ const Byte *pb = cur - delta;
+ UInt32 len = (len0 < len1 ? len0 : len1);
+ if (pb[len] == cur[len])
+ {
+ if (++len != lenLimit && pb[len] == cur[len])
+ while (++len != lenLimit)
+ if (pb[len] != cur[len])
+ break;
+ if (maxLen < len)
+ {
+ *distances++ = maxLen = len;
+ *distances++ = delta - 1;
+ if (len == lenLimit)
+ {
+ *ptr1 = pair[0];
+ *ptr0 = pair[1];
+ return distances;
+ }
+ }
+ }
+ if (pb[len] < cur[len])
+ {
+ *ptr1 = curMatch;
+ ptr1 = pair + 1;
+ curMatch = *ptr1;
+ len1 = len;
+ }
+ else
+ {
+ *ptr0 = curMatch;
+ ptr0 = pair;
+ curMatch = *ptr0;
+ len0 = len;
+ }
+ }
+ }
}
static void SkipMatchesSpec(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *cur, CLzRef *son,
- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue)
-{
- CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
- CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
- UInt32 len0 = 0, len1 = 0;
- for (;;)
- {
- UInt32 delta = pos - curMatch;
- if (cutValue-- == 0 || delta >= _cyclicBufferSize)
- {
- *ptr0 = *ptr1 = kEmptyHashValue;
- return;
- }
- {
- CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
- const Byte *pb = cur - delta;
- UInt32 len = (len0 < len1 ? len0 : len1);
- if (pb[len] == cur[len])
- {
- while (++len != lenLimit)
- if (pb[len] != cur[len])
- break;
- {
- if (len == lenLimit)
- {
- *ptr1 = pair[0];
- *ptr0 = pair[1];
- return;
- }
- }
- }
- if (pb[len] < cur[len])
- {
- *ptr1 = curMatch;
- ptr1 = pair + 1;
- curMatch = *ptr1;
- len1 = len;
- }
- else
- {
- *ptr0 = curMatch;
- ptr0 = pair;
- curMatch = *ptr0;
- len0 = len;
- }
- }
- }
+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 cutValue)
+{
+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
+ UInt32 len0 = 0, len1 = 0;
+ for (;;)
+ {
+ UInt32 delta = pos - curMatch;
+ if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+ {
+ *ptr0 = *ptr1 = kEmptyHashValue;
+ return;
+ }
+ {
+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
+ const Byte *pb = cur - delta;
+ UInt32 len = (len0 < len1 ? len0 : len1);
+ if (pb[len] == cur[len])
+ {
+ while (++len != lenLimit)
+ if (pb[len] != cur[len])
+ break;
+ {
+ if (len == lenLimit)
+ {
+ *ptr1 = pair[0];
+ *ptr0 = pair[1];
+ return;
+ }
+ }
+ }
+ if (pb[len] < cur[len])
+ {
+ *ptr1 = curMatch;
+ ptr1 = pair + 1;
+ curMatch = *ptr1;
+ len1 = len;
+ }
+ else
+ {
+ *ptr0 = curMatch;
+ ptr0 = pair;
+ curMatch = *ptr0;
+ len0 = len;
+ }
+ }
+ }
}
#define MOVE_POS \
- ++p->cyclicBufferPos; \
- p->buffer++; \
- if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
+ ++p->cyclicBufferPos; \
+ p->buffer++; \
+ if (++p->pos == p->posLimit) MatchFinder_CheckLimits(p);
#define MOVE_POS_RET MOVE_POS return offset;
static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
#define GET_MATCHES_HEADER2(minLen, ret_op) \
- UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
- lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
- cur = p->buffer;
+ UInt32 lenLimit; UInt32 hashValue; const Byte *cur; UInt32 curMatch; \
+ lenLimit = p->lenLimit; { if (lenLimit < minLen) { MatchFinder_MovePos(p); ret_op; }} \
+ cur = p->buffer;
#define GET_MATCHES_HEADER(minLen) GET_MATCHES_HEADER2(minLen, return 0)
#define SKIP_HEADER(minLen) GET_MATCHES_HEADER2(minLen, continue)
@@ -475,287 +475,287 @@ static void MatchFinder_MovePos(CMatchFinder *p) { MOVE_POS; }
#define MF_PARAMS(p) p->pos, p->buffer, p->son, p->cyclicBufferPos, p->cyclicBufferSize, p->cutValue
#define GET_MATCHES_FOOTER(offset, maxLen) \
- offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \
- distances + offset, maxLen) - distances); MOVE_POS_RET;
+ offset = (UInt32)(GetMatchesSpec1(lenLimit, curMatch, MF_PARAMS(p), \
+ distances + offset, maxLen) - distances); MOVE_POS_RET;
#define SKIP_FOOTER \
- SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p)); MOVE_POS;
static UInt32 Bt2_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
{
- UInt32 offset;
- GET_MATCHES_HEADER(2)
- HASH2_CALC;
- curMatch = p->hash[hashValue];
- p->hash[hashValue] = p->pos;
- offset = 0;
- GET_MATCHES_FOOTER(offset, 1)
+ UInt32 offset;
+ GET_MATCHES_HEADER(2)
+ HASH2_CALC;
+ curMatch = p->hash[hashValue];
+ p->hash[hashValue] = p->pos;
+ offset = 0;
+ GET_MATCHES_FOOTER(offset, 1)
}
UInt32 Bt3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
{
- UInt32 offset;
- GET_MATCHES_HEADER(3)
- HASH_ZIP_CALC;
- curMatch = p->hash[hashValue];
- p->hash[hashValue] = p->pos;
- offset = 0;
- GET_MATCHES_FOOTER(offset, 2)
+ UInt32 offset;
+ GET_MATCHES_HEADER(3)
+ HASH_ZIP_CALC;
+ curMatch = p->hash[hashValue];
+ p->hash[hashValue] = p->pos;
+ offset = 0;
+ GET_MATCHES_FOOTER(offset, 2)
}
static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
{
- UInt32 hash2Value, delta2, maxLen, offset;
- GET_MATCHES_HEADER(3)
+ UInt32 hash2Value, delta2, maxLen, offset;
+ GET_MATCHES_HEADER(3)
- HASH3_CALC;
+ HASH3_CALC;
- delta2 = p->pos - p->hash[hash2Value];
- curMatch = p->hash[kFix3HashSize + hashValue];
+ delta2 = p->pos - p->hash[hash2Value];
+ curMatch = p->hash[kFix3HashSize + hashValue];
- p->hash[hash2Value] =
- p->hash[kFix3HashSize + hashValue] = p->pos;
+ p->hash[hash2Value] =
+ p->hash[kFix3HashSize + hashValue] = p->pos;
- maxLen = 2;
- offset = 0;
- if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
- {
- for (; maxLen != lenLimit; maxLen++)
- if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
- break;
- distances[0] = maxLen;
- distances[1] = delta2 - 1;
- offset = 2;
- if (maxLen == lenLimit)
- {
- SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
- MOVE_POS_RET;
- }
- }
- GET_MATCHES_FOOTER(offset, maxLen)
+ maxLen = 2;
+ offset = 0;
+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+ {
+ for (; maxLen != lenLimit; maxLen++)
+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+ break;
+ distances[0] = maxLen;
+ distances[1] = delta2 - 1;
+ offset = 2;
+ if (maxLen == lenLimit)
+ {
+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
+ MOVE_POS_RET;
+ }
+ }
+ GET_MATCHES_FOOTER(offset, maxLen)
}
static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
{
- UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
- GET_MATCHES_HEADER(4)
-
- HASH4_CALC;
-
- delta2 = p->pos - p->hash[ hash2Value];
- delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
- curMatch = p->hash[kFix4HashSize + hashValue];
-
- p->hash[ hash2Value] =
- p->hash[kFix3HashSize + hash3Value] =
- p->hash[kFix4HashSize + hashValue] = p->pos;
-
- maxLen = 1;
- offset = 0;
- if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
- {
- distances[0] = maxLen = 2;
- distances[1] = delta2 - 1;
- offset = 2;
- }
- if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
- {
- maxLen = 3;
- distances[offset + 1] = delta3 - 1;
- offset += 2;
- delta2 = delta3;
- }
- if (offset != 0)
- {
- for (; maxLen != lenLimit; maxLen++)
- if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
- break;
- distances[offset - 2] = maxLen;
- if (maxLen == lenLimit)
- {
- SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
- MOVE_POS_RET;
- }
- }
- if (maxLen < 3)
- maxLen = 3;
- GET_MATCHES_FOOTER(offset, maxLen)
+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
+ GET_MATCHES_HEADER(4)
+
+ HASH4_CALC;
+
+ delta2 = p->pos - p->hash[ hash2Value];
+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
+ curMatch = p->hash[kFix4HashSize + hashValue];
+
+ p->hash[ hash2Value] =
+ p->hash[kFix3HashSize + hash3Value] =
+ p->hash[kFix4HashSize + hashValue] = p->pos;
+
+ maxLen = 1;
+ offset = 0;
+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+ {
+ distances[0] = maxLen = 2;
+ distances[1] = delta2 - 1;
+ offset = 2;
+ }
+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
+ {
+ maxLen = 3;
+ distances[offset + 1] = delta3 - 1;
+ offset += 2;
+ delta2 = delta3;
+ }
+ if (offset != 0)
+ {
+ for (; maxLen != lenLimit; maxLen++)
+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+ break;
+ distances[offset - 2] = maxLen;
+ if (maxLen == lenLimit)
+ {
+ SkipMatchesSpec(lenLimit, curMatch, MF_PARAMS(p));
+ MOVE_POS_RET;
+ }
+ }
+ if (maxLen < 3)
+ maxLen = 3;
+ GET_MATCHES_FOOTER(offset, maxLen)
}
static UInt32 Hc4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
{
- UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
- GET_MATCHES_HEADER(4)
-
- HASH4_CALC;
-
- delta2 = p->pos - p->hash[ hash2Value];
- delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
- curMatch = p->hash[kFix4HashSize + hashValue];
-
- p->hash[ hash2Value] =
- p->hash[kFix3HashSize + hash3Value] =
- p->hash[kFix4HashSize + hashValue] = p->pos;
-
- maxLen = 1;
- offset = 0;
- if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
- {
- distances[0] = maxLen = 2;
- distances[1] = delta2 - 1;
- offset = 2;
- }
- if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
- {
- maxLen = 3;
- distances[offset + 1] = delta3 - 1;
- offset += 2;
- delta2 = delta3;
- }
- if (offset != 0)
- {
- for (; maxLen != lenLimit; maxLen++)
- if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
- break;
- distances[offset - 2] = maxLen;
- if (maxLen == lenLimit)
- {
- p->son[p->cyclicBufferPos] = curMatch;
- MOVE_POS_RET;
- }
- }
- if (maxLen < 3)
- maxLen = 3;
- offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
- distances + offset, maxLen) - (distances));
- MOVE_POS_RET
+ UInt32 hash2Value, hash3Value, delta2, delta3, maxLen, offset;
+ GET_MATCHES_HEADER(4)
+
+ HASH4_CALC;
+
+ delta2 = p->pos - p->hash[ hash2Value];
+ delta3 = p->pos - p->hash[kFix3HashSize + hash3Value];
+ curMatch = p->hash[kFix4HashSize + hashValue];
+
+ p->hash[ hash2Value] =
+ p->hash[kFix3HashSize + hash3Value] =
+ p->hash[kFix4HashSize + hashValue] = p->pos;
+
+ maxLen = 1;
+ offset = 0;
+ if (delta2 < p->cyclicBufferSize && *(cur - delta2) == *cur)
+ {
+ distances[0] = maxLen = 2;
+ distances[1] = delta2 - 1;
+ offset = 2;
+ }
+ if (delta2 != delta3 && delta3 < p->cyclicBufferSize && *(cur - delta3) == *cur)
+ {
+ maxLen = 3;
+ distances[offset + 1] = delta3 - 1;
+ offset += 2;
+ delta2 = delta3;
+ }
+ if (offset != 0)
+ {
+ for (; maxLen != lenLimit; maxLen++)
+ if (cur[(ptrdiff_t)maxLen - delta2] != cur[maxLen])
+ break;
+ distances[offset - 2] = maxLen;
+ if (maxLen == lenLimit)
+ {
+ p->son[p->cyclicBufferPos] = curMatch;
+ MOVE_POS_RET;
+ }
+ }
+ if (maxLen < 3)
+ maxLen = 3;
+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
+ distances + offset, maxLen) - (distances));
+ MOVE_POS_RET
}
UInt32 Hc3Zip_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances)
{
- UInt32 offset;
- GET_MATCHES_HEADER(3)
- HASH_ZIP_CALC;
- curMatch = p->hash[hashValue];
- p->hash[hashValue] = p->pos;
- offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
- distances, 2) - (distances));
- MOVE_POS_RET
+ UInt32 offset;
+ GET_MATCHES_HEADER(3)
+ HASH_ZIP_CALC;
+ curMatch = p->hash[hashValue];
+ p->hash[hashValue] = p->pos;
+ offset = (UInt32)(Hc_GetMatchesSpec(lenLimit, curMatch, MF_PARAMS(p),
+ distances, 2) - (distances));
+ MOVE_POS_RET
}
static void Bt2_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
{
- do
- {
- SKIP_HEADER(2)
- HASH2_CALC;
- curMatch = p->hash[hashValue];
- p->hash[hashValue] = p->pos;
- SKIP_FOOTER
- }
- while (--num != 0);
+ do
+ {
+ SKIP_HEADER(2)
+ HASH2_CALC;
+ curMatch = p->hash[hashValue];
+ p->hash[hashValue] = p->pos;
+ SKIP_FOOTER
+ }
+ while (--num != 0);
}
void Bt3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
{
- do
- {
- SKIP_HEADER(3)
- HASH_ZIP_CALC;
- curMatch = p->hash[hashValue];
- p->hash[hashValue] = p->pos;
- SKIP_FOOTER
- }
- while (--num != 0);
+ do
+ {
+ SKIP_HEADER(3)
+ HASH_ZIP_CALC;
+ curMatch = p->hash[hashValue];
+ p->hash[hashValue] = p->pos;
+ SKIP_FOOTER
+ }
+ while (--num != 0);
}
static void Bt3_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
{
- do
- {
- UInt32 hash2Value;
- SKIP_HEADER(3)
- HASH3_CALC;
- curMatch = p->hash[kFix3HashSize + hashValue];
- p->hash[hash2Value] =
- p->hash[kFix3HashSize + hashValue] = p->pos;
- SKIP_FOOTER
- }
- while (--num != 0);
+ do
+ {
+ UInt32 hash2Value;
+ SKIP_HEADER(3)
+ HASH3_CALC;
+ curMatch = p->hash[kFix3HashSize + hashValue];
+ p->hash[hash2Value] =
+ p->hash[kFix3HashSize + hashValue] = p->pos;
+ SKIP_FOOTER
+ }
+ while (--num != 0);
}
static void Bt4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
{
- do
- {
- UInt32 hash2Value, hash3Value;
- SKIP_HEADER(4)
- HASH4_CALC;
- curMatch = p->hash[kFix4HashSize + hashValue];
- p->hash[ hash2Value] =
- p->hash[kFix3HashSize + hash3Value] = p->pos;
- p->hash[kFix4HashSize + hashValue] = p->pos;
- SKIP_FOOTER
- }
- while (--num != 0);
+ do
+ {
+ UInt32 hash2Value, hash3Value;
+ SKIP_HEADER(4)
+ HASH4_CALC;
+ curMatch = p->hash[kFix4HashSize + hashValue];
+ p->hash[ hash2Value] =
+ p->hash[kFix3HashSize + hash3Value] = p->pos;
+ p->hash[kFix4HashSize + hashValue] = p->pos;
+ SKIP_FOOTER
+ }
+ while (--num != 0);
}
static void Hc4_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
{
- do
- {
- UInt32 hash2Value, hash3Value;
- SKIP_HEADER(4)
- HASH4_CALC;
- curMatch = p->hash[kFix4HashSize + hashValue];
- p->hash[ hash2Value] =
- p->hash[kFix3HashSize + hash3Value] =
- p->hash[kFix4HashSize + hashValue] = p->pos;
- p->son[p->cyclicBufferPos] = curMatch;
- MOVE_POS
- }
- while (--num != 0);
+ do
+ {
+ UInt32 hash2Value, hash3Value;
+ SKIP_HEADER(4)
+ HASH4_CALC;
+ curMatch = p->hash[kFix4HashSize + hashValue];
+ p->hash[ hash2Value] =
+ p->hash[kFix3HashSize + hash3Value] =
+ p->hash[kFix4HashSize + hashValue] = p->pos;
+ p->son[p->cyclicBufferPos] = curMatch;
+ MOVE_POS
+ }
+ while (--num != 0);
}
void Hc3Zip_MatchFinder_Skip(CMatchFinder *p, UInt32 num)
{
- do
- {
- SKIP_HEADER(3)
- HASH_ZIP_CALC;
- curMatch = p->hash[hashValue];
- p->hash[hashValue] = p->pos;
- p->son[p->cyclicBufferPos] = curMatch;
- MOVE_POS
- }
- while (--num != 0);
+ do
+ {
+ SKIP_HEADER(3)
+ HASH_ZIP_CALC;
+ curMatch = p->hash[hashValue];
+ p->hash[hashValue] = p->pos;
+ p->son[p->cyclicBufferPos] = curMatch;
+ MOVE_POS
+ }
+ while (--num != 0);
}
void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable)
{
- vTable->Init = (Mf_Init_Func)MatchFinder_Init;
- vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
- vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
- vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
- if (!p->btMode)
- {
- vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
- vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
- }
- else if (p->numHashBytes == 2)
- {
- vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
- vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
- }
- else if (p->numHashBytes == 3)
- {
- vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
- vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
- }
- else
- {
- vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
- vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
- }
+ vTable->Init = (Mf_Init_Func)MatchFinder_Init;
+ vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinder_GetIndexByte;
+ vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinder_GetNumAvailableBytes;
+ vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinder_GetPointerToCurrentPos;
+ if (!p->btMode)
+ {
+ vTable->GetMatches = (Mf_GetMatches_Func)Hc4_MatchFinder_GetMatches;
+ vTable->Skip = (Mf_Skip_Func)Hc4_MatchFinder_Skip;
+ }
+ else if (p->numHashBytes == 2)
+ {
+ vTable->GetMatches = (Mf_GetMatches_Func)Bt2_MatchFinder_GetMatches;
+ vTable->Skip = (Mf_Skip_Func)Bt2_MatchFinder_Skip;
+ }
+ else if (p->numHashBytes == 3)
+ {
+ vTable->GetMatches = (Mf_GetMatches_Func)Bt3_MatchFinder_GetMatches;
+ vTable->Skip = (Mf_Skip_Func)Bt3_MatchFinder_Skip;
+ }
+ else
+ {
+ vTable->GetMatches = (Mf_GetMatches_Func)Bt4_MatchFinder_GetMatches;
+ vTable->Skip = (Mf_Skip_Func)Bt4_MatchFinder_Skip;
+ }
}
diff --git a/src/lib/lib7z/LzFind.h b/src/lib/lib7z/LzFind.h
index 010c4b92ba3..e0a655ddb24 100644
--- a/src/lib/lib7z/LzFind.h
+++ b/src/lib/lib7z/LzFind.h
@@ -14,40 +14,40 @@ typedef UInt32 CLzRef;
typedef struct _CMatchFinder
{
- Byte *buffer;
- UInt32 pos;
- UInt32 posLimit;
- UInt32 streamPos;
- UInt32 lenLimit;
-
- UInt32 cyclicBufferPos;
- UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */
-
- UInt32 matchMaxLen;
- CLzRef *hash;
- CLzRef *son;
- UInt32 hashMask;
- UInt32 cutValue;
-
- Byte *bufferBase;
- ISeqInStream *stream;
- int streamEndWasReached;
-
- UInt32 blockSize;
- UInt32 keepSizeBefore;
- UInt32 keepSizeAfter;
-
- UInt32 numHashBytes;
- int directInput;
- size_t directInputRem;
- int btMode;
- int bigHash;
- UInt32 historySize;
- UInt32 fixedHashSize;
- UInt32 hashSizeSum;
- UInt32 numSons;
- SRes result;
- UInt32 crc[256];
+ Byte *buffer;
+ UInt32 pos;
+ UInt32 posLimit;
+ UInt32 streamPos;
+ UInt32 lenLimit;
+
+ UInt32 cyclicBufferPos;
+ UInt32 cyclicBufferSize; /* it must be = (historySize + 1) */
+
+ UInt32 matchMaxLen;
+ CLzRef *hash;
+ CLzRef *son;
+ UInt32 hashMask;
+ UInt32 cutValue;
+
+ Byte *bufferBase;
+ ISeqInStream *stream;
+ int streamEndWasReached;
+
+ UInt32 blockSize;
+ UInt32 keepSizeBefore;
+ UInt32 keepSizeAfter;
+
+ UInt32 numHashBytes;
+ int directInput;
+ size_t directInputRem;
+ int btMode;
+ int bigHash;
+ UInt32 historySize;
+ UInt32 fixedHashSize;
+ UInt32 hashSizeSum;
+ UInt32 numSons;
+ SRes result;
+ UInt32 crc[256];
} CMatchFinder;
#define Inline_MatchFinder_GetPointerToCurrentPos(p) ((p)->buffer)
@@ -67,15 +67,15 @@ void MatchFinder_Construct(CMatchFinder *p);
keepAddBufferBefore + matchMaxLen + keepAddBufferAfter < 511MB
*/
int MatchFinder_Create(CMatchFinder *p, UInt32 historySize,
- UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
- ISzAlloc *alloc);
+ UInt32 keepAddBufferBefore, UInt32 matchMaxLen, UInt32 keepAddBufferAfter,
+ ISzAlloc *alloc);
void MatchFinder_Free(CMatchFinder *p, ISzAlloc *alloc);
void MatchFinder_Normalize3(UInt32 subValue, CLzRef *items, UInt32 numItems);
void MatchFinder_ReduceOffsets(CMatchFinder *p, UInt32 subValue);
UInt32 * GetMatchesSpec1(UInt32 lenLimit, UInt32 curMatch, UInt32 pos, const Byte *buffer, CLzRef *son,
- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
- UInt32 *distances, UInt32 maxLen);
+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
+ UInt32 *distances, UInt32 maxLen);
/*
Conditions:
@@ -92,12 +92,12 @@ typedef void (*Mf_Skip_Func)(void *object, UInt32);
typedef struct _IMatchFinder
{
- Mf_Init_Func Init;
- Mf_GetIndexByte_Func GetIndexByte;
- Mf_GetNumAvailableBytes_Func GetNumAvailableBytes;
- Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos;
- Mf_GetMatches_Func GetMatches;
- Mf_Skip_Func Skip;
+ Mf_Init_Func Init;
+ Mf_GetIndexByte_Func GetIndexByte;
+ Mf_GetNumAvailableBytes_Func GetNumAvailableBytes;
+ Mf_GetPointerToCurrentPos_Func GetPointerToCurrentPos;
+ Mf_GetMatches_Func GetMatches;
+ Mf_Skip_Func Skip;
} IMatchFinder;
void MatchFinder_CreateVTable(CMatchFinder *p, IMatchFinder *vTable);
diff --git a/src/lib/lib7z/LzFindMt.c b/src/lib/lib7z/LzFindMt.c
index 0f7b314f4c5..053a24fc152 100644
--- a/src/lib/lib7z/LzFindMt.c
+++ b/src/lib/lib7z/LzFindMt.c
@@ -7,124 +7,124 @@
void MtSync_Construct(CMtSync *p)
{
- p->wasCreated = False;
- p->csWasInitialized = False;
- p->csWasEntered = False;
- Thread_Construct(&p->thread);
- Event_Construct(&p->canStart);
- Event_Construct(&p->wasStarted);
- Event_Construct(&p->wasStopped);
- Semaphore_Construct(&p->freeSemaphore);
- Semaphore_Construct(&p->filledSemaphore);
+ p->wasCreated = False;
+ p->csWasInitialized = False;
+ p->csWasEntered = False;
+ Thread_Construct(&p->thread);
+ Event_Construct(&p->canStart);
+ Event_Construct(&p->wasStarted);
+ Event_Construct(&p->wasStopped);
+ Semaphore_Construct(&p->freeSemaphore);
+ Semaphore_Construct(&p->filledSemaphore);
}
void MtSync_GetNextBlock(CMtSync *p)
{
- if (p->needStart)
- {
- p->numProcessedBlocks = 1;
- p->needStart = False;
- p->stopWriting = False;
- p->exit = False;
- Event_Reset(&p->wasStarted);
- Event_Reset(&p->wasStopped);
-
- Event_Set(&p->canStart);
- Event_Wait(&p->wasStarted);
- }
- else
- {
- CriticalSection_Leave(&p->cs);
- p->csWasEntered = False;
- p->numProcessedBlocks++;
- Semaphore_Release1(&p->freeSemaphore);
- }
- Semaphore_Wait(&p->filledSemaphore);
- CriticalSection_Enter(&p->cs);
- p->csWasEntered = True;
+ if (p->needStart)
+ {
+ p->numProcessedBlocks = 1;
+ p->needStart = False;
+ p->stopWriting = False;
+ p->exit = False;
+ Event_Reset(&p->wasStarted);
+ Event_Reset(&p->wasStopped);
+
+ Event_Set(&p->canStart);
+ Event_Wait(&p->wasStarted);
+ }
+ else
+ {
+ CriticalSection_Leave(&p->cs);
+ p->csWasEntered = False;
+ p->numProcessedBlocks++;
+ Semaphore_Release1(&p->freeSemaphore);
+ }
+ Semaphore_Wait(&p->filledSemaphore);
+ CriticalSection_Enter(&p->cs);
+ p->csWasEntered = True;
}
/* MtSync_StopWriting must be called if Writing was started */
void MtSync_StopWriting(CMtSync *p)
{
- UInt32 myNumBlocks = p->numProcessedBlocks;
- if (!Thread_WasCreated(&p->thread) || p->needStart)
- return;
- p->stopWriting = True;
- if (p->csWasEntered)
- {
- CriticalSection_Leave(&p->cs);
- p->csWasEntered = False;
- }
- Semaphore_Release1(&p->freeSemaphore);
+ UInt32 myNumBlocks = p->numProcessedBlocks;
+ if (!Thread_WasCreated(&p->thread) || p->needStart)
+ return;
+ p->stopWriting = True;
+ if (p->csWasEntered)
+ {
+ CriticalSection_Leave(&p->cs);
+ p->csWasEntered = False;
+ }
+ Semaphore_Release1(&p->freeSemaphore);
- Event_Wait(&p->wasStopped);
+ Event_Wait(&p->wasStopped);
- while (myNumBlocks++ != p->numProcessedBlocks)
- {
- Semaphore_Wait(&p->filledSemaphore);
- Semaphore_Release1(&p->freeSemaphore);
- }
- p->needStart = True;
+ while (myNumBlocks++ != p->numProcessedBlocks)
+ {
+ Semaphore_Wait(&p->filledSemaphore);
+ Semaphore_Release1(&p->freeSemaphore);
+ }
+ p->needStart = True;
}
void MtSync_Destruct(CMtSync *p)
{
- if (Thread_WasCreated(&p->thread))
- {
- MtSync_StopWriting(p);
- p->exit = True;
- if (p->needStart)
- Event_Set(&p->canStart);
- Thread_Wait(&p->thread);
- Thread_Close(&p->thread);
- }
- if (p->csWasInitialized)
- {
- CriticalSection_Delete(&p->cs);
- p->csWasInitialized = False;
- }
-
- Event_Close(&p->canStart);
- Event_Close(&p->wasStarted);
- Event_Close(&p->wasStopped);
- Semaphore_Close(&p->freeSemaphore);
- Semaphore_Close(&p->filledSemaphore);
-
- p->wasCreated = False;
+ if (Thread_WasCreated(&p->thread))
+ {
+ MtSync_StopWriting(p);
+ p->exit = True;
+ if (p->needStart)
+ Event_Set(&p->canStart);
+ Thread_Wait(&p->thread);
+ Thread_Close(&p->thread);
+ }
+ if (p->csWasInitialized)
+ {
+ CriticalSection_Delete(&p->cs);
+ p->csWasInitialized = False;
+ }
+
+ Event_Close(&p->canStart);
+ Event_Close(&p->wasStarted);
+ Event_Close(&p->wasStopped);
+ Semaphore_Close(&p->freeSemaphore);
+ Semaphore_Close(&p->filledSemaphore);
+
+ p->wasCreated = False;
}
#define RINOK_THREAD(x) { if ((x) != 0) return SZ_ERROR_THREAD; }
static SRes MtSync_Create2(CMtSync *p, unsigned (MY_STD_CALL *startAddress)(void *), void *obj, UInt32 numBlocks)
{
- if (p->wasCreated)
- return SZ_OK;
+ if (p->wasCreated)
+ return SZ_OK;
- RINOK_THREAD(CriticalSection_Init(&p->cs));
- p->csWasInitialized = True;
+ RINOK_THREAD(CriticalSection_Init(&p->cs));
+ p->csWasInitialized = True;
- RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->canStart));
- RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->wasStarted));
- RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->wasStopped));
+ RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->canStart));
+ RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->wasStarted));
+ RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->wasStopped));
- RINOK_THREAD(Semaphore_Create(&p->freeSemaphore, numBlocks, numBlocks));
- RINOK_THREAD(Semaphore_Create(&p->filledSemaphore, 0, numBlocks));
+ RINOK_THREAD(Semaphore_Create(&p->freeSemaphore, numBlocks, numBlocks));
+ RINOK_THREAD(Semaphore_Create(&p->filledSemaphore, 0, numBlocks));
- p->needStart = True;
+ p->needStart = True;
- RINOK_THREAD(Thread_Create(&p->thread, startAddress, obj));
- p->wasCreated = True;
- return SZ_OK;
+ RINOK_THREAD(Thread_Create(&p->thread, startAddress, obj));
+ p->wasCreated = True;
+ return SZ_OK;
}
static SRes MtSync_Create(CMtSync *p, unsigned (MY_STD_CALL *startAddress)(void *), void *obj, UInt32 numBlocks)
{
- SRes res = MtSync_Create2(p, startAddress, obj, numBlocks);
- if (res != SZ_OK)
- MtSync_Destruct(p);
- return res;
+ SRes res = MtSync_Create2(p, startAddress, obj, numBlocks);
+ if (res != SZ_OK)
+ MtSync_Destruct(p);
+ return res;
}
void MtSync_Init(CMtSync *p) { p->needStart = True; }
@@ -147,80 +147,80 @@ DEF_GetHeads(4b, (crc[p[0]] ^ p[1] ^ ((UInt32)p[2] << 8) ^ ((UInt32)p[3] << 16))
void HashThreadFunc(CMatchFinderMt *mt)
{
- CMtSync *p = &mt->hashSync;
- for (;;)
- {
- UInt32 numProcessedBlocks = 0;
- Event_Wait(&p->canStart);
- Event_Set(&p->wasStarted);
- for (;;)
- {
- if (p->exit)
- return;
- if (p->stopWriting)
- {
- p->numProcessedBlocks = numProcessedBlocks;
- Event_Set(&p->wasStopped);
- break;
- }
-
- {
- CMatchFinder *mf = mt->MatchFinder;
- if (MatchFinder_NeedMove(mf))
- {
- CriticalSection_Enter(&mt->btSync.cs);
- CriticalSection_Enter(&mt->hashSync.cs);
- {
- const Byte *beforePtr = MatchFinder_GetPointerToCurrentPos(mf);
- const Byte *afterPtr;
- MatchFinder_MoveBlock(mf);
- afterPtr = MatchFinder_GetPointerToCurrentPos(mf);
- mt->pointerToCurPos -= beforePtr - afterPtr;
- mt->buffer -= beforePtr - afterPtr;
- }
- CriticalSection_Leave(&mt->btSync.cs);
- CriticalSection_Leave(&mt->hashSync.cs);
- continue;
- }
-
- Semaphore_Wait(&p->freeSemaphore);
-
- MatchFinder_ReadIfRequired(mf);
- if (mf->pos > (kMtMaxValForNormalize - kMtHashBlockSize))
- {
- UInt32 subValue = (mf->pos - mf->historySize - 1);
- MatchFinder_ReduceOffsets(mf, subValue);
- MatchFinder_Normalize3(subValue, mf->hash + mf->fixedHashSize, mf->hashMask + 1);
- }
- {
- UInt32 *heads = mt->hashBuf + ((numProcessedBlocks++) & kMtHashNumBlocksMask) * kMtHashBlockSize;
- UInt32 num = mf->streamPos - mf->pos;
- heads[0] = 2;
- heads[1] = num;
- if (num >= mf->numHashBytes)
- {
- num = num - mf->numHashBytes + 1;
- if (num > kMtHashBlockSize - 2)
- num = kMtHashBlockSize - 2;
- mt->GetHeadsFunc(mf->buffer, mf->pos, mf->hash + mf->fixedHashSize, mf->hashMask, heads + 2, num, mf->crc);
- heads[0] += num;
- }
- mf->pos += num;
- mf->buffer += num;
- }
- }
-
- Semaphore_Release1(&p->filledSemaphore);
- }
- }
+ CMtSync *p = &mt->hashSync;
+ for (;;)
+ {
+ UInt32 numProcessedBlocks = 0;
+ Event_Wait(&p->canStart);
+ Event_Set(&p->wasStarted);
+ for (;;)
+ {
+ if (p->exit)
+ return;
+ if (p->stopWriting)
+ {
+ p->numProcessedBlocks = numProcessedBlocks;
+ Event_Set(&p->wasStopped);
+ break;
+ }
+
+ {
+ CMatchFinder *mf = mt->MatchFinder;
+ if (MatchFinder_NeedMove(mf))
+ {
+ CriticalSection_Enter(&mt->btSync.cs);
+ CriticalSection_Enter(&mt->hashSync.cs);
+ {
+ const Byte *beforePtr = MatchFinder_GetPointerToCurrentPos(mf);
+ const Byte *afterPtr;
+ MatchFinder_MoveBlock(mf);
+ afterPtr = MatchFinder_GetPointerToCurrentPos(mf);
+ mt->pointerToCurPos -= beforePtr - afterPtr;
+ mt->buffer -= beforePtr - afterPtr;
+ }
+ CriticalSection_Leave(&mt->btSync.cs);
+ CriticalSection_Leave(&mt->hashSync.cs);
+ continue;
+ }
+
+ Semaphore_Wait(&p->freeSemaphore);
+
+ MatchFinder_ReadIfRequired(mf);
+ if (mf->pos > (kMtMaxValForNormalize - kMtHashBlockSize))
+ {
+ UInt32 subValue = (mf->pos - mf->historySize - 1);
+ MatchFinder_ReduceOffsets(mf, subValue);
+ MatchFinder_Normalize3(subValue, mf->hash + mf->fixedHashSize, mf->hashMask + 1);
+ }
+ {
+ UInt32 *heads = mt->hashBuf + ((numProcessedBlocks++) & kMtHashNumBlocksMask) * kMtHashBlockSize;
+ UInt32 num = mf->streamPos - mf->pos;
+ heads[0] = 2;
+ heads[1] = num;
+ if (num >= mf->numHashBytes)
+ {
+ num = num - mf->numHashBytes + 1;
+ if (num > kMtHashBlockSize - 2)
+ num = kMtHashBlockSize - 2;
+ mt->GetHeadsFunc(mf->buffer, mf->pos, mf->hash + mf->fixedHashSize, mf->hashMask, heads + 2, num, mf->crc);
+ heads[0] += num;
+ }
+ mf->pos += num;
+ mf->buffer += num;
+ }
+ }
+
+ Semaphore_Release1(&p->filledSemaphore);
+ }
+ }
}
void MatchFinderMt_GetNextBlock_Hash(CMatchFinderMt *p)
{
- MtSync_GetNextBlock(&p->hashSync);
- p->hashBufPosLimit = p->hashBufPos = ((p->hashSync.numProcessedBlocks - 1) & kMtHashNumBlocksMask) * kMtHashBlockSize;
- p->hashBufPosLimit += p->hashBuf[p->hashBufPos++];
- p->hashNumAvail = p->hashBuf[p->hashBufPos++];
+ MtSync_GetNextBlock(&p->hashSync);
+ p->hashBufPosLimit = p->hashBufPos = ((p->hashSync.numProcessedBlocks - 1) & kMtHashNumBlocksMask) * kMtHashBlockSize;
+ p->hashBufPosLimit += p->hashBuf[p->hashBufPos++];
+ p->hashNumAvail = p->hashBuf[p->hashBufPos++];
}
#define kEmptyHashValue 0
@@ -232,220 +232,220 @@ void MatchFinderMt_GetNextBlock_Hash(CMatchFinderMt *p)
#define NO_INLINE MY_FAST_CALL
Int32 NO_INLINE GetMatchesSpecN(UInt32 lenLimit, UInt32 pos, const Byte *cur, CLzRef *son,
- UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
- UInt32 *_distances, UInt32 _maxLen, const UInt32 *hash, Int32 limit, UInt32 size, UInt32 *posRes)
-{
- do
- {
- UInt32 *distances = _distances + 1;
- UInt32 curMatch = pos - *hash++;
-
- CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
- CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
- UInt32 len0 = 0, len1 = 0;
- UInt32 cutValue = _cutValue;
- UInt32 maxLen = _maxLen;
- for (;;)
- {
- UInt32 delta = pos - curMatch;
- if (cutValue-- == 0 || delta >= _cyclicBufferSize)
- {
- *ptr0 = *ptr1 = kEmptyHashValue;
- break;
- }
- {
- CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
- const Byte *pb = cur - delta;
- UInt32 len = (len0 < len1 ? len0 : len1);
- if (pb[len] == cur[len])
- {
- if (++len != lenLimit && pb[len] == cur[len])
- while (++len != lenLimit)
- if (pb[len] != cur[len])
- break;
- if (maxLen < len)
- {
- *distances++ = maxLen = len;
- *distances++ = delta - 1;
- if (len == lenLimit)
- {
- *ptr1 = pair[0];
- *ptr0 = pair[1];
- break;
- }
- }
- }
- if (pb[len] < cur[len])
- {
- *ptr1 = curMatch;
- ptr1 = pair + 1;
- curMatch = *ptr1;
- len1 = len;
- }
- else
- {
- *ptr0 = curMatch;
- ptr0 = pair;
- curMatch = *ptr0;
- len0 = len;
- }
- }
- }
- pos++;
- _cyclicBufferPos++;
- cur++;
- {
- UInt32 num = (UInt32)(distances - _distances);
- *_distances = num - 1;
- _distances += num;
- limit -= num;
- }
- }
- while (limit > 0 && --size != 0);
- *posRes = pos;
- return limit;
+ UInt32 _cyclicBufferPos, UInt32 _cyclicBufferSize, UInt32 _cutValue,
+ UInt32 *_distances, UInt32 _maxLen, const UInt32 *hash, Int32 limit, UInt32 size, UInt32 *posRes)
+{
+ do
+ {
+ UInt32 *distances = _distances + 1;
+ UInt32 curMatch = pos - *hash++;
+
+ CLzRef *ptr0 = son + (_cyclicBufferPos << 1) + 1;
+ CLzRef *ptr1 = son + (_cyclicBufferPos << 1);
+ UInt32 len0 = 0, len1 = 0;
+ UInt32 cutValue = _cutValue;
+ UInt32 maxLen = _maxLen;
+ for (;;)
+ {
+ UInt32 delta = pos - curMatch;
+ if (cutValue-- == 0 || delta >= _cyclicBufferSize)
+ {
+ *ptr0 = *ptr1 = kEmptyHashValue;
+ break;
+ }
+ {
+ CLzRef *pair = son + ((_cyclicBufferPos - delta + ((delta > _cyclicBufferPos) ? _cyclicBufferSize : 0)) << 1);
+ const Byte *pb = cur - delta;
+ UInt32 len = (len0 < len1 ? len0 : len1);
+ if (pb[len] == cur[len])
+ {
+ if (++len != lenLimit && pb[len] == cur[len])
+ while (++len != lenLimit)
+ if (pb[len] != cur[len])
+ break;
+ if (maxLen < len)
+ {
+ *distances++ = maxLen = len;
+ *distances++ = delta - 1;
+ if (len == lenLimit)
+ {
+ *ptr1 = pair[0];
+ *ptr0 = pair[1];
+ break;
+ }
+ }
+ }
+ if (pb[len] < cur[len])
+ {
+ *ptr1 = curMatch;
+ ptr1 = pair + 1;
+ curMatch = *ptr1;
+ len1 = len;
+ }
+ else
+ {
+ *ptr0 = curMatch;
+ ptr0 = pair;
+ curMatch = *ptr0;
+ len0 = len;
+ }
+ }
+ }
+ pos++;
+ _cyclicBufferPos++;
+ cur++;
+ {
+ UInt32 num = (UInt32)(distances - _distances);
+ *_distances = num - 1;
+ _distances += num;
+ limit -= num;
+ }
+ }
+ while (limit > 0 && --size != 0);
+ *posRes = pos;
+ return limit;
}
#endif
void BtGetMatches(CMatchFinderMt *p, UInt32 *distances)
{
- UInt32 numProcessed = 0;
- UInt32 curPos = 2;
- UInt32 limit = kMtBtBlockSize - (p->matchMaxLen * 2);
- distances[1] = p->hashNumAvail;
- while (curPos < limit)
- {
- if (p->hashBufPos == p->hashBufPosLimit)
- {
- MatchFinderMt_GetNextBlock_Hash(p);
- distances[1] = numProcessed + p->hashNumAvail;
- if (p->hashNumAvail >= p->numHashBytes)
- continue;
- for (; p->hashNumAvail != 0; p->hashNumAvail--)
- distances[curPos++] = 0;
- break;
- }
- {
- UInt32 size = p->hashBufPosLimit - p->hashBufPos;
- UInt32 lenLimit = p->matchMaxLen;
- UInt32 pos = p->pos;
- UInt32 cyclicBufferPos = p->cyclicBufferPos;
- if (lenLimit >= p->hashNumAvail)
- lenLimit = p->hashNumAvail;
- {
- UInt32 size2 = p->hashNumAvail - lenLimit + 1;
- if (size2 < size)
- size = size2;
- size2 = p->cyclicBufferSize - cyclicBufferPos;
- if (size2 < size)
- size = size2;
- }
- #ifndef MFMT_GM_INLINE
- while (curPos < limit && size-- != 0)
- {
- UInt32 *startDistances = distances + curPos;
- UInt32 num = (UInt32)(GetMatchesSpec1(lenLimit, pos - p->hashBuf[p->hashBufPos++],
- pos, p->buffer, p->son, cyclicBufferPos, p->cyclicBufferSize, p->cutValue,
- startDistances + 1, p->numHashBytes - 1) - startDistances);
- *startDistances = num - 1;
- curPos += num;
- cyclicBufferPos++;
- pos++;
- p->buffer++;
- }
- #else
- {
- UInt32 posRes;
- curPos = limit - GetMatchesSpecN(lenLimit, pos, p->buffer, p->son, cyclicBufferPos, p->cyclicBufferSize, p->cutValue,
- distances + curPos, p->numHashBytes - 1, p->hashBuf + p->hashBufPos, (Int32)(limit - curPos) , size, &posRes);
- p->hashBufPos += posRes - pos;
- cyclicBufferPos += posRes - pos;
- p->buffer += posRes - pos;
- pos = posRes;
- }
- #endif
-
- numProcessed += pos - p->pos;
- p->hashNumAvail -= pos - p->pos;
- p->pos = pos;
- if (cyclicBufferPos == p->cyclicBufferSize)
- cyclicBufferPos = 0;
- p->cyclicBufferPos = cyclicBufferPos;
- }
- }
- distances[0] = curPos;
+ UInt32 numProcessed = 0;
+ UInt32 curPos = 2;
+ UInt32 limit = kMtBtBlockSize - (p->matchMaxLen * 2);
+ distances[1] = p->hashNumAvail;
+ while (curPos < limit)
+ {
+ if (p->hashBufPos == p->hashBufPosLimit)
+ {
+ MatchFinderMt_GetNextBlock_Hash(p);
+ distances[1] = numProcessed + p->hashNumAvail;
+ if (p->hashNumAvail >= p->numHashBytes)
+ continue;
+ for (; p->hashNumAvail != 0; p->hashNumAvail--)
+ distances[curPos++] = 0;
+ break;
+ }
+ {
+ UInt32 size = p->hashBufPosLimit - p->hashBufPos;
+ UInt32 lenLimit = p->matchMaxLen;
+ UInt32 pos = p->pos;
+ UInt32 cyclicBufferPos = p->cyclicBufferPos;
+ if (lenLimit >= p->hashNumAvail)
+ lenLimit = p->hashNumAvail;
+ {
+ UInt32 size2 = p->hashNumAvail - lenLimit + 1;
+ if (size2 < size)
+ size = size2;
+ size2 = p->cyclicBufferSize - cyclicBufferPos;
+ if (size2 < size)
+ size = size2;
+ }
+ #ifndef MFMT_GM_INLINE
+ while (curPos < limit && size-- != 0)
+ {
+ UInt32 *startDistances = distances + curPos;
+ UInt32 num = (UInt32)(GetMatchesSpec1(lenLimit, pos - p->hashBuf[p->hashBufPos++],
+ pos, p->buffer, p->son, cyclicBufferPos, p->cyclicBufferSize, p->cutValue,
+ startDistances + 1, p->numHashBytes - 1) - startDistances);
+ *startDistances = num - 1;
+ curPos += num;
+ cyclicBufferPos++;
+ pos++;
+ p->buffer++;
+ }
+ #else
+ {
+ UInt32 posRes;
+ curPos = limit - GetMatchesSpecN(lenLimit, pos, p->buffer, p->son, cyclicBufferPos, p->cyclicBufferSize, p->cutValue,
+ distances + curPos, p->numHashBytes - 1, p->hashBuf + p->hashBufPos, (Int32)(limit - curPos) , size, &posRes);
+ p->hashBufPos += posRes - pos;
+ cyclicBufferPos += posRes - pos;
+ p->buffer += posRes - pos;
+ pos = posRes;
+ }
+ #endif
+
+ numProcessed += pos - p->pos;
+ p->hashNumAvail -= pos - p->pos;
+ p->pos = pos;
+ if (cyclicBufferPos == p->cyclicBufferSize)
+ cyclicBufferPos = 0;
+ p->cyclicBufferPos = cyclicBufferPos;
+ }
+ }
+ distances[0] = curPos;
}
void BtFillBlock(CMatchFinderMt *p, UInt32 globalBlockIndex)
{
- CMtSync *sync = &p->hashSync;
- if (!sync->needStart)
- {
- CriticalSection_Enter(&sync->cs);
- sync->csWasEntered = True;
- }
+ CMtSync *sync = &p->hashSync;
+ if (!sync->needStart)
+ {
+ CriticalSection_Enter(&sync->cs);
+ sync->csWasEntered = True;
+ }
- BtGetMatches(p, p->btBuf + (globalBlockIndex & kMtBtNumBlocksMask) * kMtBtBlockSize);
+ BtGetMatches(p, p->btBuf + (globalBlockIndex & kMtBtNumBlocksMask) * kMtBtBlockSize);
- if (p->pos > kMtMaxValForNormalize - kMtBtBlockSize)
- {
- UInt32 subValue = p->pos - p->cyclicBufferSize;
- MatchFinder_Normalize3(subValue, p->son, p->cyclicBufferSize * 2);
- p->pos -= subValue;
- }
+ if (p->pos > kMtMaxValForNormalize - kMtBtBlockSize)
+ {
+ UInt32 subValue = p->pos - p->cyclicBufferSize;
+ MatchFinder_Normalize3(subValue, p->son, p->cyclicBufferSize * 2);
+ p->pos -= subValue;
+ }
- if (!sync->needStart)
- {
- CriticalSection_Leave(&sync->cs);
- sync->csWasEntered = False;
- }
+ if (!sync->needStart)
+ {
+ CriticalSection_Leave(&sync->cs);
+ sync->csWasEntered = False;
+ }
}
void BtThreadFunc(CMatchFinderMt *mt)
{
- CMtSync *p = &mt->btSync;
- for (;;)
- {
- UInt32 blockIndex = 0;
- Event_Wait(&p->canStart);
- Event_Set(&p->wasStarted);
- for (;;)
- {
- if (p->exit)
- return;
- if (p->stopWriting)
- {
- p->numProcessedBlocks = blockIndex;
- MtSync_StopWriting(&mt->hashSync);
- Event_Set(&p->wasStopped);
- break;
- }
- Semaphore_Wait(&p->freeSemaphore);
- BtFillBlock(mt, blockIndex++);
- Semaphore_Release1(&p->filledSemaphore);
- }
- }
+ CMtSync *p = &mt->btSync;
+ for (;;)
+ {
+ UInt32 blockIndex = 0;
+ Event_Wait(&p->canStart);
+ Event_Set(&p->wasStarted);
+ for (;;)
+ {
+ if (p->exit)
+ return;
+ if (p->stopWriting)
+ {
+ p->numProcessedBlocks = blockIndex;
+ MtSync_StopWriting(&mt->hashSync);
+ Event_Set(&p->wasStopped);
+ break;
+ }
+ Semaphore_Wait(&p->freeSemaphore);
+ BtFillBlock(mt, blockIndex++);
+ Semaphore_Release1(&p->filledSemaphore);
+ }
+ }
}
void MatchFinderMt_Construct(CMatchFinderMt *p)
{
- p->hashBuf = 0;
- MtSync_Construct(&p->hashSync);
- MtSync_Construct(&p->btSync);
+ p->hashBuf = 0;
+ MtSync_Construct(&p->hashSync);
+ MtSync_Construct(&p->btSync);
}
void MatchFinderMt_FreeMem(CMatchFinderMt *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->hashBuf);
- p->hashBuf = 0;
+ alloc->Free(alloc, p->hashBuf);
+ p->hashBuf = 0;
}
void MatchFinderMt_Destruct(CMatchFinderMt *p, ISzAlloc *alloc)
{
- MtSync_Destruct(&p->hashSync);
- MtSync_Destruct(&p->btSync);
- MatchFinderMt_FreeMem(p, alloc);
+ MtSync_Destruct(&p->hashSync);
+ MtSync_Destruct(&p->btSync);
+ MatchFinderMt_FreeMem(p, alloc);
}
#define kHashBufferSize (kMtHashBlockSize * kMtHashNumBlocks)
@@ -454,158 +454,158 @@ void MatchFinderMt_Destruct(CMatchFinderMt *p, ISzAlloc *alloc)
static unsigned MY_STD_CALL HashThreadFunc2(void *p) { HashThreadFunc((CMatchFinderMt *)p); return 0; }
static unsigned MY_STD_CALL BtThreadFunc2(void *p)
{
- Byte allocaDummy[0x180];
- int i = 0;
- for (i = 0; i < 16; i++)
- allocaDummy[i] = (Byte)i;
- BtThreadFunc((CMatchFinderMt *)p);
- return 0;
+ Byte allocaDummy[0x180];
+ int i = 0;
+ for (i = 0; i < 16; i++)
+ allocaDummy[i] = (Byte)i;
+ BtThreadFunc((CMatchFinderMt *)p);
+ return 0;
}
SRes MatchFinderMt_Create(CMatchFinderMt *p, UInt32 historySize, UInt32 keepAddBufferBefore,
- UInt32 matchMaxLen, UInt32 keepAddBufferAfter, ISzAlloc *alloc)
-{
- CMatchFinder *mf = p->MatchFinder;
- p->historySize = historySize;
- if (kMtBtBlockSize <= matchMaxLen * 4)
- return SZ_ERROR_PARAM;
- if (p->hashBuf == 0)
- {
- p->hashBuf = (UInt32 *)alloc->Alloc(alloc, (kHashBufferSize + kBtBufferSize) * sizeof(UInt32));
- if (p->hashBuf == 0)
- return SZ_ERROR_MEM;
- p->btBuf = p->hashBuf + kHashBufferSize;
- }
- keepAddBufferBefore += (kHashBufferSize + kBtBufferSize);
- keepAddBufferAfter += kMtHashBlockSize;
- if (!MatchFinder_Create(mf, historySize, keepAddBufferBefore, matchMaxLen, keepAddBufferAfter, alloc))
- return SZ_ERROR_MEM;
-
- RINOK(MtSync_Create(&p->hashSync, HashThreadFunc2, p, kMtHashNumBlocks));
- RINOK(MtSync_Create(&p->btSync, BtThreadFunc2, p, kMtBtNumBlocks));
- return SZ_OK;
+ UInt32 matchMaxLen, UInt32 keepAddBufferAfter, ISzAlloc *alloc)
+{
+ CMatchFinder *mf = p->MatchFinder;
+ p->historySize = historySize;
+ if (kMtBtBlockSize <= matchMaxLen * 4)
+ return SZ_ERROR_PARAM;
+ if (p->hashBuf == 0)
+ {
+ p->hashBuf = (UInt32 *)alloc->Alloc(alloc, (kHashBufferSize + kBtBufferSize) * sizeof(UInt32));
+ if (p->hashBuf == 0)
+ return SZ_ERROR_MEM;
+ p->btBuf = p->hashBuf + kHashBufferSize;
+ }
+ keepAddBufferBefore += (kHashBufferSize + kBtBufferSize);
+ keepAddBufferAfter += kMtHashBlockSize;
+ if (!MatchFinder_Create(mf, historySize, keepAddBufferBefore, matchMaxLen, keepAddBufferAfter, alloc))
+ return SZ_ERROR_MEM;
+
+ RINOK(MtSync_Create(&p->hashSync, HashThreadFunc2, p, kMtHashNumBlocks));
+ RINOK(MtSync_Create(&p->btSync, BtThreadFunc2, p, kMtBtNumBlocks));
+ return SZ_OK;
}
/* Call it after ReleaseStream / SetStream */
void MatchFinderMt_Init(CMatchFinderMt *p)
{
- CMatchFinder *mf = p->MatchFinder;
- p->btBufPos = p->btBufPosLimit = 0;
- p->hashBufPos = p->hashBufPosLimit = 0;
- MatchFinder_Init(mf);
- p->pointerToCurPos = MatchFinder_GetPointerToCurrentPos(mf);
- p->btNumAvailBytes = 0;
- p->lzPos = p->historySize + 1;
+ CMatchFinder *mf = p->MatchFinder;
+ p->btBufPos = p->btBufPosLimit = 0;
+ p->hashBufPos = p->hashBufPosLimit = 0;
+ MatchFinder_Init(mf);
+ p->pointerToCurPos = MatchFinder_GetPointerToCurrentPos(mf);
+ p->btNumAvailBytes = 0;
+ p->lzPos = p->historySize + 1;
- p->hash = mf->hash;
- p->fixedHashSize = mf->fixedHashSize;
- p->crc = mf->crc;
+ p->hash = mf->hash;
+ p->fixedHashSize = mf->fixedHashSize;
+ p->crc = mf->crc;
- p->son = mf->son;
- p->matchMaxLen = mf->matchMaxLen;
- p->numHashBytes = mf->numHashBytes;
- p->pos = mf->pos;
- p->buffer = mf->buffer;
- p->cyclicBufferPos = mf->cyclicBufferPos;
- p->cyclicBufferSize = mf->cyclicBufferSize;
- p->cutValue = mf->cutValue;
+ p->son = mf->son;
+ p->matchMaxLen = mf->matchMaxLen;
+ p->numHashBytes = mf->numHashBytes;
+ p->pos = mf->pos;
+ p->buffer = mf->buffer;
+ p->cyclicBufferPos = mf->cyclicBufferPos;
+ p->cyclicBufferSize = mf->cyclicBufferSize;
+ p->cutValue = mf->cutValue;
}
/* ReleaseStream is required to finish multithreading */
void MatchFinderMt_ReleaseStream(CMatchFinderMt *p)
{
- MtSync_StopWriting(&p->btSync);
- /* p->MatchFinder->ReleaseStream(); */
+ MtSync_StopWriting(&p->btSync);
+ /* p->MatchFinder->ReleaseStream(); */
}
void MatchFinderMt_Normalize(CMatchFinderMt *p)
{
- MatchFinder_Normalize3(p->lzPos - p->historySize - 1, p->hash, p->fixedHashSize);
- p->lzPos = p->historySize + 1;
+ MatchFinder_Normalize3(p->lzPos - p->historySize - 1, p->hash, p->fixedHashSize);
+ p->lzPos = p->historySize + 1;
}
void MatchFinderMt_GetNextBlock_Bt(CMatchFinderMt *p)
{
- UInt32 blockIndex;
- MtSync_GetNextBlock(&p->btSync);
- blockIndex = ((p->btSync.numProcessedBlocks - 1) & kMtBtNumBlocksMask);
- p->btBufPosLimit = p->btBufPos = blockIndex * kMtBtBlockSize;
- p->btBufPosLimit += p->btBuf[p->btBufPos++];
- p->btNumAvailBytes = p->btBuf[p->btBufPos++];
- if (p->lzPos >= kMtMaxValForNormalize - kMtBtBlockSize)
- MatchFinderMt_Normalize(p);
+ UInt32 blockIndex;
+ MtSync_GetNextBlock(&p->btSync);
+ blockIndex = ((p->btSync.numProcessedBlocks - 1) & kMtBtNumBlocksMask);
+ p->btBufPosLimit = p->btBufPos = blockIndex * kMtBtBlockSize;
+ p->btBufPosLimit += p->btBuf[p->btBufPos++];
+ p->btNumAvailBytes = p->btBuf[p->btBufPos++];
+ if (p->lzPos >= kMtMaxValForNormalize - kMtBtBlockSize)
+ MatchFinderMt_Normalize(p);
}
const Byte * MatchFinderMt_GetPointerToCurrentPos(CMatchFinderMt *p)
{
- return p->pointerToCurPos;
+ return p->pointerToCurPos;
}
#define GET_NEXT_BLOCK_IF_REQUIRED if (p->btBufPos == p->btBufPosLimit) MatchFinderMt_GetNextBlock_Bt(p);
UInt32 MatchFinderMt_GetNumAvailableBytes(CMatchFinderMt *p)
{
- GET_NEXT_BLOCK_IF_REQUIRED;
- return p->btNumAvailBytes;
+ GET_NEXT_BLOCK_IF_REQUIRED;
+ return p->btNumAvailBytes;
}
Byte MatchFinderMt_GetIndexByte(CMatchFinderMt *p, Int32 index)
{
- return p->pointerToCurPos[index];
+ return p->pointerToCurPos[index];
}
UInt32 * MixMatches2(CMatchFinderMt *p, UInt32 matchMinPos, UInt32 *distances)
{
- UInt32 hash2Value, curMatch2;
- UInt32 *hash = p->hash;
- const Byte *cur = p->pointerToCurPos;
- UInt32 lzPos = p->lzPos;
- MT_HASH2_CALC
+ UInt32 hash2Value, curMatch2;
+ UInt32 *hash = p->hash;
+ const Byte *cur = p->pointerToCurPos;
+ UInt32 lzPos = p->lzPos;
+ MT_HASH2_CALC
- curMatch2 = hash[hash2Value];
- hash[hash2Value] = lzPos;
+ curMatch2 = hash[hash2Value];
+ hash[hash2Value] = lzPos;
- if (curMatch2 >= matchMinPos)
- if (cur[(ptrdiff_t)curMatch2 - lzPos] == cur[0])
- {
- *distances++ = 2;
- *distances++ = lzPos - curMatch2 - 1;
- }
- return distances;
+ if (curMatch2 >= matchMinPos)
+ if (cur[(ptrdiff_t)curMatch2 - lzPos] == cur[0])
+ {
+ *distances++ = 2;
+ *distances++ = lzPos - curMatch2 - 1;
+ }
+ return distances;
}
UInt32 * MixMatches3(CMatchFinderMt *p, UInt32 matchMinPos, UInt32 *distances)
{
- UInt32 hash2Value, hash3Value, curMatch2, curMatch3;
- UInt32 *hash = p->hash;
- const Byte *cur = p->pointerToCurPos;
- UInt32 lzPos = p->lzPos;
- MT_HASH3_CALC
-
- curMatch2 = hash[ hash2Value];
- curMatch3 = hash[kFix3HashSize + hash3Value];
-
- hash[ hash2Value] =
- hash[kFix3HashSize + hash3Value] =
- lzPos;
-
- if (curMatch2 >= matchMinPos && cur[(ptrdiff_t)curMatch2 - lzPos] == cur[0])
- {
- distances[1] = lzPos - curMatch2 - 1;
- if (cur[(ptrdiff_t)curMatch2 - lzPos + 2] == cur[2])
- {
- distances[0] = 3;
- return distances + 2;
- }
- distances[0] = 2;
- distances += 2;
- }
- if (curMatch3 >= matchMinPos && cur[(ptrdiff_t)curMatch3 - lzPos] == cur[0])
- {
- *distances++ = 3;
- *distances++ = lzPos - curMatch3 - 1;
- }
- return distances;
+ UInt32 hash2Value, hash3Value, curMatch2, curMatch3;
+ UInt32 *hash = p->hash;
+ const Byte *cur = p->pointerToCurPos;
+ UInt32 lzPos = p->lzPos;
+ MT_HASH3_CALC
+
+ curMatch2 = hash[ hash2Value];
+ curMatch3 = hash[kFix3HashSize + hash3Value];
+
+ hash[ hash2Value] =
+ hash[kFix3HashSize + hash3Value] =
+ lzPos;
+
+ if (curMatch2 >= matchMinPos && cur[(ptrdiff_t)curMatch2 - lzPos] == cur[0])
+ {
+ distances[1] = lzPos - curMatch2 - 1;
+ if (cur[(ptrdiff_t)curMatch2 - lzPos + 2] == cur[2])
+ {
+ distances[0] = 3;
+ return distances + 2;
+ }
+ distances[0] = 2;
+ distances += 2;
+ }
+ if (curMatch3 >= matchMinPos && cur[(ptrdiff_t)curMatch3 - lzPos] == cur[0])
+ {
+ *distances++ = 3;
+ *distances++ = lzPos - curMatch3 - 1;
+ }
+ return distances;
}
/*
@@ -666,49 +666,49 @@ UInt32 *MixMatches4(CMatchFinderMt *p, UInt32 matchMinPos, UInt32 *distances)
UInt32 MatchFinderMt2_GetMatches(CMatchFinderMt *p, UInt32 *distances)
{
- const UInt32 *btBuf = p->btBuf + p->btBufPos;
- UInt32 len = *btBuf++;
- p->btBufPos += 1 + len;
- p->btNumAvailBytes--;
- {
- UInt32 i;
- for (i = 0; i < len; i += 2)
- {
- *distances++ = *btBuf++;
- *distances++ = *btBuf++;
- }
- }
- INCREASE_LZ_POS
- return len;
+ const UInt32 *btBuf = p->btBuf + p->btBufPos;
+ UInt32 len = *btBuf++;
+ p->btBufPos += 1 + len;
+ p->btNumAvailBytes--;
+ {
+ UInt32 i;
+ for (i = 0; i < len; i += 2)
+ {
+ *distances++ = *btBuf++;
+ *distances++ = *btBuf++;
+ }
+ }
+ INCREASE_LZ_POS
+ return len;
}
UInt32 MatchFinderMt_GetMatches(CMatchFinderMt *p, UInt32 *distances)
{
- const UInt32 *btBuf = p->btBuf + p->btBufPos;
- UInt32 len = *btBuf++;
- p->btBufPos += 1 + len;
-
- if (len == 0)
- {
- if (p->btNumAvailBytes-- >= 4)
- len = (UInt32)(p->MixMatchesFunc(p, p->lzPos - p->historySize, distances) - (distances));
- }
- else
- {
- /* Condition: there are matches in btBuf with length < p->numHashBytes */
- UInt32 *distances2;
- p->btNumAvailBytes--;
- distances2 = p->MixMatchesFunc(p, p->lzPos - btBuf[1], distances);
- do
- {
- *distances2++ = *btBuf++;
- *distances2++ = *btBuf++;
- }
- while ((len -= 2) != 0);
- len = (UInt32)(distances2 - (distances));
- }
- INCREASE_LZ_POS
- return len;
+ const UInt32 *btBuf = p->btBuf + p->btBufPos;
+ UInt32 len = *btBuf++;
+ p->btBufPos += 1 + len;
+
+ if (len == 0)
+ {
+ if (p->btNumAvailBytes-- >= 4)
+ len = (UInt32)(p->MixMatchesFunc(p, p->lzPos - p->historySize, distances) - (distances));
+ }
+ else
+ {
+ /* Condition: there are matches in btBuf with length < p->numHashBytes */
+ UInt32 *distances2;
+ p->btNumAvailBytes--;
+ distances2 = p->MixMatchesFunc(p, p->lzPos - btBuf[1], distances);
+ do
+ {
+ *distances2++ = *btBuf++;
+ *distances2++ = *btBuf++;
+ }
+ while ((len -= 2) != 0);
+ len = (UInt32)(distances2 - (distances));
+ }
+ INCREASE_LZ_POS
+ return len;
}
#define SKIP_HEADER2_MT do { GET_NEXT_BLOCK_IF_REQUIRED
@@ -717,28 +717,28 @@ UInt32 MatchFinderMt_GetMatches(CMatchFinderMt *p, UInt32 *distances)
void MatchFinderMt0_Skip(CMatchFinderMt *p, UInt32 num)
{
- SKIP_HEADER2_MT { p->btNumAvailBytes--;
- SKIP_FOOTER_MT
+ SKIP_HEADER2_MT { p->btNumAvailBytes--;
+ SKIP_FOOTER_MT
}
void MatchFinderMt2_Skip(CMatchFinderMt *p, UInt32 num)
{
- SKIP_HEADER_MT(2)
- UInt32 hash2Value;
- MT_HASH2_CALC
- hash[hash2Value] = p->lzPos;
- SKIP_FOOTER_MT
+ SKIP_HEADER_MT(2)
+ UInt32 hash2Value;
+ MT_HASH2_CALC
+ hash[hash2Value] = p->lzPos;
+ SKIP_FOOTER_MT
}
void MatchFinderMt3_Skip(CMatchFinderMt *p, UInt32 num)
{
- SKIP_HEADER_MT(3)
- UInt32 hash2Value, hash3Value;
- MT_HASH3_CALC
- hash[kFix3HashSize + hash3Value] =
- hash[ hash2Value] =
- p->lzPos;
- SKIP_FOOTER_MT
+ SKIP_HEADER_MT(3)
+ UInt32 hash2Value, hash3Value;
+ MT_HASH3_CALC
+ hash[kFix3HashSize + hash3Value] =
+ hash[ hash2Value] =
+ p->lzPos;
+ SKIP_FOOTER_MT
}
/*
@@ -757,37 +757,37 @@ void MatchFinderMt4_Skip(CMatchFinderMt *p, UInt32 num)
void MatchFinderMt_CreateVTable(CMatchFinderMt *p, IMatchFinder *vTable)
{
- vTable->Init = (Mf_Init_Func)MatchFinderMt_Init;
- vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinderMt_GetIndexByte;
- vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinderMt_GetNumAvailableBytes;
- vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinderMt_GetPointerToCurrentPos;
- vTable->GetMatches = (Mf_GetMatches_Func)MatchFinderMt_GetMatches;
- switch(p->MatchFinder->numHashBytes)
- {
- case 2:
- p->GetHeadsFunc = GetHeads2;
- p->MixMatchesFunc = (Mf_Mix_Matches)0;
- vTable->Skip = (Mf_Skip_Func)MatchFinderMt0_Skip;
- vTable->GetMatches = (Mf_GetMatches_Func)MatchFinderMt2_GetMatches;
- break;
- case 3:
- p->GetHeadsFunc = GetHeads3;
- p->MixMatchesFunc = (Mf_Mix_Matches)MixMatches2;
- vTable->Skip = (Mf_Skip_Func)MatchFinderMt2_Skip;
- break;
- default:
- /* case 4: */
- p->GetHeadsFunc = p->MatchFinder->bigHash ? GetHeads4b : GetHeads4;
- /* p->GetHeadsFunc = GetHeads4; */
- p->MixMatchesFunc = (Mf_Mix_Matches)MixMatches3;
- vTable->Skip = (Mf_Skip_Func)MatchFinderMt3_Skip;
- break;
- /*
- default:
- p->GetHeadsFunc = GetHeads5;
- p->MixMatchesFunc = (Mf_Mix_Matches)MixMatches4;
- vTable->Skip = (Mf_Skip_Func)MatchFinderMt4_Skip;
- break;
- */
- }
+ vTable->Init = (Mf_Init_Func)MatchFinderMt_Init;
+ vTable->GetIndexByte = (Mf_GetIndexByte_Func)MatchFinderMt_GetIndexByte;
+ vTable->GetNumAvailableBytes = (Mf_GetNumAvailableBytes_Func)MatchFinderMt_GetNumAvailableBytes;
+ vTable->GetPointerToCurrentPos = (Mf_GetPointerToCurrentPos_Func)MatchFinderMt_GetPointerToCurrentPos;
+ vTable->GetMatches = (Mf_GetMatches_Func)MatchFinderMt_GetMatches;
+ switch(p->MatchFinder->numHashBytes)
+ {
+ case 2:
+ p->GetHeadsFunc = GetHeads2;
+ p->MixMatchesFunc = (Mf_Mix_Matches)0;
+ vTable->Skip = (Mf_Skip_Func)MatchFinderMt0_Skip;
+ vTable->GetMatches = (Mf_GetMatches_Func)MatchFinderMt2_GetMatches;
+ break;
+ case 3:
+ p->GetHeadsFunc = GetHeads3;
+ p->MixMatchesFunc = (Mf_Mix_Matches)MixMatches2;
+ vTable->Skip = (Mf_Skip_Func)MatchFinderMt2_Skip;
+ break;
+ default:
+ /* case 4: */
+ p->GetHeadsFunc = p->MatchFinder->bigHash ? GetHeads4b : GetHeads4;
+ /* p->GetHeadsFunc = GetHeads4; */
+ p->MixMatchesFunc = (Mf_Mix_Matches)MixMatches3;
+ vTable->Skip = (Mf_Skip_Func)MatchFinderMt3_Skip;
+ break;
+ /*
+ default:
+ p->GetHeadsFunc = GetHeads5;
+ p->MixMatchesFunc = (Mf_Mix_Matches)MixMatches4;
+ vTable->Skip = (Mf_Skip_Func)MatchFinderMt4_Skip;
+ break;
+ */
+ }
}
diff --git a/src/lib/lib7z/LzFindMt.h b/src/lib/lib7z/LzFindMt.h
index 63133b1b909..e36e0e82331 100644
--- a/src/lib/lib7z/LzFindMt.h
+++ b/src/lib/lib7z/LzFindMt.h
@@ -21,21 +21,21 @@ extern "C" {
typedef struct _CMtSync
{
- Bool wasCreated;
- Bool needStart;
- Bool exit;
- Bool stopWriting;
-
- CThread thread;
- CAutoResetEvent canStart;
- CAutoResetEvent wasStarted;
- CAutoResetEvent wasStopped;
- CSemaphore freeSemaphore;
- CSemaphore filledSemaphore;
- Bool csWasInitialized;
- Bool csWasEntered;
- CCriticalSection cs;
- UInt32 numProcessedBlocks;
+ Bool wasCreated;
+ Bool needStart;
+ Bool exit;
+ Bool stopWriting;
+
+ CThread thread;
+ CAutoResetEvent canStart;
+ CAutoResetEvent wasStarted;
+ CAutoResetEvent wasStopped;
+ CSemaphore freeSemaphore;
+ CSemaphore filledSemaphore;
+ Bool csWasInitialized;
+ Bool csWasEntered;
+ CCriticalSection cs;
+ UInt32 numProcessedBlocks;
} CMtSync;
typedef UInt32 * (*Mf_Mix_Matches)(void *p, UInt32 matchMinPos, UInt32 *distances);
@@ -44,57 +44,57 @@ typedef UInt32 * (*Mf_Mix_Matches)(void *p, UInt32 matchMinPos, UInt32 *distance
#define kMtCacheLineDummy 128
typedef void (*Mf_GetHeads)(const Byte *buffer, UInt32 pos,
- UInt32 *hash, UInt32 hashMask, UInt32 *heads, UInt32 numHeads, const UInt32 *crc);
+ UInt32 *hash, UInt32 hashMask, UInt32 *heads, UInt32 numHeads, const UInt32 *crc);
typedef struct _CMatchFinderMt
{
- /* LZ */
- const Byte *pointerToCurPos;
- UInt32 *btBuf;
- UInt32 btBufPos;
- UInt32 btBufPosLimit;
- UInt32 lzPos;
- UInt32 btNumAvailBytes;
-
- UInt32 *hash;
- UInt32 fixedHashSize;
- UInt32 historySize;
- const UInt32 *crc;
-
- Mf_Mix_Matches MixMatchesFunc;
-
- /* LZ + BT */
- CMtSync btSync;
- Byte btDummy[kMtCacheLineDummy];
-
- /* BT */
- UInt32 *hashBuf;
- UInt32 hashBufPos;
- UInt32 hashBufPosLimit;
- UInt32 hashNumAvail;
-
- CLzRef *son;
- UInt32 matchMaxLen;
- UInt32 numHashBytes;
- UInt32 pos;
- Byte *buffer;
- UInt32 cyclicBufferPos;
- UInt32 cyclicBufferSize; /* it must be historySize + 1 */
- UInt32 cutValue;
-
- /* BT + Hash */
- CMtSync hashSync;
- /* Byte hashDummy[kMtCacheLineDummy]; */
-
- /* Hash */
- Mf_GetHeads GetHeadsFunc;
- CMatchFinder *MatchFinder;
+ /* LZ */
+ const Byte *pointerToCurPos;
+ UInt32 *btBuf;
+ UInt32 btBufPos;
+ UInt32 btBufPosLimit;
+ UInt32 lzPos;
+ UInt32 btNumAvailBytes;
+
+ UInt32 *hash;
+ UInt32 fixedHashSize;
+ UInt32 historySize;
+ const UInt32 *crc;
+
+ Mf_Mix_Matches MixMatchesFunc;
+
+ /* LZ + BT */
+ CMtSync btSync;
+ Byte btDummy[kMtCacheLineDummy];
+
+ /* BT */
+ UInt32 *hashBuf;
+ UInt32 hashBufPos;
+ UInt32 hashBufPosLimit;
+ UInt32 hashNumAvail;
+
+ CLzRef *son;
+ UInt32 matchMaxLen;
+ UInt32 numHashBytes;
+ UInt32 pos;
+ Byte *buffer;
+ UInt32 cyclicBufferPos;
+ UInt32 cyclicBufferSize; /* it must be historySize + 1 */
+ UInt32 cutValue;
+
+ /* BT + Hash */
+ CMtSync hashSync;
+ /* Byte hashDummy[kMtCacheLineDummy]; */
+
+ /* Hash */
+ Mf_GetHeads GetHeadsFunc;
+ CMatchFinder *MatchFinder;
} CMatchFinderMt;
void MatchFinderMt_Construct(CMatchFinderMt *p);
void MatchFinderMt_Destruct(CMatchFinderMt *p, ISzAlloc *alloc);
SRes MatchFinderMt_Create(CMatchFinderMt *p, UInt32 historySize, UInt32 keepAddBufferBefore,
- UInt32 matchMaxLen, UInt32 keepAddBufferAfter, ISzAlloc *alloc);
+ UInt32 matchMaxLen, UInt32 keepAddBufferAfter, ISzAlloc *alloc);
void MatchFinderMt_CreateVTable(CMatchFinderMt *p, IMatchFinder *vTable);
void MatchFinderMt_ReleaseStream(CMatchFinderMt *p);
diff --git a/src/lib/lib7z/LzHash.h b/src/lib/lib7z/LzHash.h
index f3e89966cc7..4ea924cef5b 100644
--- a/src/lib/lib7z/LzHash.h
+++ b/src/lib/lib7z/LzHash.h
@@ -15,40 +15,40 @@
#define HASH2_CALC hashValue = cur[0] | ((UInt32)cur[1] << 8);
#define HASH3_CALC { \
- UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
- hash2Value = temp & (kHash2Size - 1); \
- hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; }
+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+ hash2Value = temp & (kHash2Size - 1); \
+ hashValue = (temp ^ ((UInt32)cur[2] << 8)) & p->hashMask; }
#define HASH4_CALC { \
- UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
- hash2Value = temp & (kHash2Size - 1); \
- hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
- hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; }
+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+ hash2Value = temp & (kHash2Size - 1); \
+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
+ hashValue = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & p->hashMask; }
#define HASH5_CALC { \
- UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
- hash2Value = temp & (kHash2Size - 1); \
- hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
- hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \
- hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \
- hash4Value &= (kHash4Size - 1); }
+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+ hash2Value = temp & (kHash2Size - 1); \
+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)); \
+ hashValue = (hash4Value ^ (p->crc[cur[4]] << 3)) & p->hashMask; \
+ hash4Value &= (kHash4Size - 1); }
/* #define HASH_ZIP_CALC hashValue = ((cur[0] | ((UInt32)cur[1] << 8)) ^ p->crc[cur[2]]) & 0xFFFF; */
#define HASH_ZIP_CALC hashValue = ((cur[2] | ((UInt32)cur[0] << 8)) ^ p->crc[cur[1]]) & 0xFFFF;
#define MT_HASH2_CALC \
- hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1);
+ hash2Value = (p->crc[cur[0]] ^ cur[1]) & (kHash2Size - 1);
#define MT_HASH3_CALC { \
- UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
- hash2Value = temp & (kHash2Size - 1); \
- hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); }
+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+ hash2Value = temp & (kHash2Size - 1); \
+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); }
#define MT_HASH4_CALC { \
- UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
- hash2Value = temp & (kHash2Size - 1); \
- hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
- hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); }
+ UInt32 temp = p->crc[cur[0]] ^ cur[1]; \
+ hash2Value = temp & (kHash2Size - 1); \
+ hash3Value = (temp ^ ((UInt32)cur[2] << 8)) & (kHash3Size - 1); \
+ hash4Value = (temp ^ ((UInt32)cur[2] << 8) ^ (p->crc[cur[3]] << 5)) & (kHash4Size - 1); }
#endif
diff --git a/src/lib/lib7z/Lzma2Dec.c b/src/lib/lib7z/Lzma2Dec.c
index d2f8c8884c9..ec1ea12a765 100644
--- a/src/lib/lib7z/Lzma2Dec.c
+++ b/src/lib/lib7z/Lzma2Dec.c
@@ -46,305 +46,305 @@
typedef enum
{
- LZMA2_STATE_CONTROL,
- LZMA2_STATE_UNPACK0,
- LZMA2_STATE_UNPACK1,
- LZMA2_STATE_PACK0,
- LZMA2_STATE_PACK1,
- LZMA2_STATE_PROP,
- LZMA2_STATE_DATA,
- LZMA2_STATE_DATA_CONT,
- LZMA2_STATE_FINISHED,
- LZMA2_STATE_ERROR
+ LZMA2_STATE_CONTROL,
+ LZMA2_STATE_UNPACK0,
+ LZMA2_STATE_UNPACK1,
+ LZMA2_STATE_PACK0,
+ LZMA2_STATE_PACK1,
+ LZMA2_STATE_PROP,
+ LZMA2_STATE_DATA,
+ LZMA2_STATE_DATA_CONT,
+ LZMA2_STATE_FINISHED,
+ LZMA2_STATE_ERROR
} ELzma2State;
static SRes Lzma2Dec_GetOldProps(Byte prop, Byte *props)
{
- UInt32 dicSize;
- if (prop > 40)
- return SZ_ERROR_UNSUPPORTED;
- dicSize = (prop == 40) ? 0xFFFFFFFF : LZMA2_DIC_SIZE_FROM_PROP(prop);
- props[0] = (Byte)LZMA2_LCLP_MAX;
- props[1] = (Byte)(dicSize);
- props[2] = (Byte)(dicSize >> 8);
- props[3] = (Byte)(dicSize >> 16);
- props[4] = (Byte)(dicSize >> 24);
- return SZ_OK;
+ UInt32 dicSize;
+ if (prop > 40)
+ return SZ_ERROR_UNSUPPORTED;
+ dicSize = (prop == 40) ? 0xFFFFFFFF : LZMA2_DIC_SIZE_FROM_PROP(prop);
+ props[0] = (Byte)LZMA2_LCLP_MAX;
+ props[1] = (Byte)(dicSize);
+ props[2] = (Byte)(dicSize >> 8);
+ props[3] = (Byte)(dicSize >> 16);
+ props[4] = (Byte)(dicSize >> 24);
+ return SZ_OK;
}
SRes Lzma2Dec_AllocateProbs(CLzma2Dec *p, Byte prop, ISzAlloc *alloc)
{
- Byte props[LZMA_PROPS_SIZE];
- RINOK(Lzma2Dec_GetOldProps(prop, props));
- return LzmaDec_AllocateProbs(&p->decoder, props, LZMA_PROPS_SIZE, alloc);
+ Byte props[LZMA_PROPS_SIZE];
+ RINOK(Lzma2Dec_GetOldProps(prop, props));
+ return LzmaDec_AllocateProbs(&p->decoder, props, LZMA_PROPS_SIZE, alloc);
}
SRes Lzma2Dec_Allocate(CLzma2Dec *p, Byte prop, ISzAlloc *alloc)
{
- Byte props[LZMA_PROPS_SIZE];
- RINOK(Lzma2Dec_GetOldProps(prop, props));
- return LzmaDec_Allocate(&p->decoder, props, LZMA_PROPS_SIZE, alloc);
+ Byte props[LZMA_PROPS_SIZE];
+ RINOK(Lzma2Dec_GetOldProps(prop, props));
+ return LzmaDec_Allocate(&p->decoder, props, LZMA_PROPS_SIZE, alloc);
}
void Lzma2Dec_Init(CLzma2Dec *p)
{
- p->state = LZMA2_STATE_CONTROL;
- p->needInitDic = True;
- p->needInitState = True;
- p->needInitProp = True;
- LzmaDec_Init(&p->decoder);
+ p->state = LZMA2_STATE_CONTROL;
+ p->needInitDic = True;
+ p->needInitState = True;
+ p->needInitProp = True;
+ LzmaDec_Init(&p->decoder);
}
static ELzma2State Lzma2Dec_UpdateState(CLzma2Dec *p, Byte b)
{
- switch(p->state)
- {
- case LZMA2_STATE_CONTROL:
- p->control = b;
- PRF(printf("\n %4X ", p->decoder.dicPos));
- PRF(printf(" %2X", b));
- if (p->control == 0)
- return LZMA2_STATE_FINISHED;
- if (LZMA2_IS_UNCOMPRESSED_STATE(p))
- {
- if ((p->control & 0x7F) > 2)
- return LZMA2_STATE_ERROR;
- p->unpackSize = 0;
- }
- else
- p->unpackSize = (UInt32)(p->control & 0x1F) << 16;
- return LZMA2_STATE_UNPACK0;
-
- case LZMA2_STATE_UNPACK0:
- p->unpackSize |= (UInt32)b << 8;
- return LZMA2_STATE_UNPACK1;
-
- case LZMA2_STATE_UNPACK1:
- p->unpackSize |= (UInt32)b;
- p->unpackSize++;
- PRF(printf(" %8d", p->unpackSize));
- return (LZMA2_IS_UNCOMPRESSED_STATE(p)) ? LZMA2_STATE_DATA : LZMA2_STATE_PACK0;
-
- case LZMA2_STATE_PACK0:
- p->packSize = (UInt32)b << 8;
- return LZMA2_STATE_PACK1;
-
- case LZMA2_STATE_PACK1:
- p->packSize |= (UInt32)b;
- p->packSize++;
- PRF(printf(" %8d", p->packSize));
- return LZMA2_IS_THERE_PROP(LZMA2_GET_LZMA_MODE(p)) ? LZMA2_STATE_PROP:
- (p->needInitProp ? LZMA2_STATE_ERROR : LZMA2_STATE_DATA);
-
- case LZMA2_STATE_PROP:
- {
- int lc, lp;
- if (b >= (9 * 5 * 5))
- return LZMA2_STATE_ERROR;
- lc = b % 9;
- b /= 9;
- p->decoder.prop.pb = b / 5;
- lp = b % 5;
- if (lc + lp > LZMA2_LCLP_MAX)
- return LZMA2_STATE_ERROR;
- p->decoder.prop.lc = lc;
- p->decoder.prop.lp = lp;
- p->needInitProp = False;
- return LZMA2_STATE_DATA;
- }
- }
- return LZMA2_STATE_ERROR;
+ switch(p->state)
+ {
+ case LZMA2_STATE_CONTROL:
+ p->control = b;
+ PRF(printf("\n %4X ", p->decoder.dicPos));
+ PRF(printf(" %2X", b));
+ if (p->control == 0)
+ return LZMA2_STATE_FINISHED;
+ if (LZMA2_IS_UNCOMPRESSED_STATE(p))
+ {
+ if ((p->control & 0x7F) > 2)
+ return LZMA2_STATE_ERROR;
+ p->unpackSize = 0;
+ }
+ else
+ p->unpackSize = (UInt32)(p->control & 0x1F) << 16;
+ return LZMA2_STATE_UNPACK0;
+
+ case LZMA2_STATE_UNPACK0:
+ p->unpackSize |= (UInt32)b << 8;
+ return LZMA2_STATE_UNPACK1;
+
+ case LZMA2_STATE_UNPACK1:
+ p->unpackSize |= (UInt32)b;
+ p->unpackSize++;
+ PRF(printf(" %8d", p->unpackSize));
+ return (LZMA2_IS_UNCOMPRESSED_STATE(p)) ? LZMA2_STATE_DATA : LZMA2_STATE_PACK0;
+
+ case LZMA2_STATE_PACK0:
+ p->packSize = (UInt32)b << 8;
+ return LZMA2_STATE_PACK1;
+
+ case LZMA2_STATE_PACK1:
+ p->packSize |= (UInt32)b;
+ p->packSize++;
+ PRF(printf(" %8d", p->packSize));
+ return LZMA2_IS_THERE_PROP(LZMA2_GET_LZMA_MODE(p)) ? LZMA2_STATE_PROP:
+ (p->needInitProp ? LZMA2_STATE_ERROR : LZMA2_STATE_DATA);
+
+ case LZMA2_STATE_PROP:
+ {
+ int lc, lp;
+ if (b >= (9 * 5 * 5))
+ return LZMA2_STATE_ERROR;
+ lc = b % 9;
+ b /= 9;
+ p->decoder.prop.pb = b / 5;
+ lp = b % 5;
+ if (lc + lp > LZMA2_LCLP_MAX)
+ return LZMA2_STATE_ERROR;
+ p->decoder.prop.lc = lc;
+ p->decoder.prop.lp = lp;
+ p->needInitProp = False;
+ return LZMA2_STATE_DATA;
+ }
+ }
+ return LZMA2_STATE_ERROR;
}
static void LzmaDec_UpdateWithUncompressed(CLzmaDec *p, const Byte *src, SizeT size)
{
- memcpy(p->dic + p->dicPos, src, size);
- p->dicPos += size;
- if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= size)
- p->checkDicSize = p->prop.dicSize;
- p->processedPos += (UInt32)size;
+ memcpy(p->dic + p->dicPos, src, size);
+ p->dicPos += size;
+ if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= size)
+ p->checkDicSize = p->prop.dicSize;
+ p->processedPos += (UInt32)size;
}
void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState);
SRes Lzma2Dec_DecodeToDic(CLzma2Dec *p, SizeT dicLimit,
- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
{
- SizeT inSize = *srcLen;
- *srcLen = 0;
- *status = LZMA_STATUS_NOT_SPECIFIED;
-
- while (p->state != LZMA2_STATE_FINISHED)
- {
- SizeT dicPos = p->decoder.dicPos;
- if (p->state == LZMA2_STATE_ERROR)
- return SZ_ERROR_DATA;
- if (dicPos == dicLimit && finishMode == LZMA_FINISH_ANY)
- {
- *status = LZMA_STATUS_NOT_FINISHED;
- return SZ_OK;
- }
- if (p->state != LZMA2_STATE_DATA && p->state != LZMA2_STATE_DATA_CONT)
- {
- if (*srcLen == inSize)
- {
- *status = LZMA_STATUS_NEEDS_MORE_INPUT;
- return SZ_OK;
- }
- (*srcLen)++;
- p->state = Lzma2Dec_UpdateState(p, *src++);
- continue;
- }
- {
- SizeT destSizeCur = dicLimit - dicPos;
- SizeT srcSizeCur = inSize - *srcLen;
- ELzmaFinishMode curFinishMode = LZMA_FINISH_ANY;
-
- if (p->unpackSize <= destSizeCur)
- {
- destSizeCur = (SizeT)p->unpackSize;
- curFinishMode = LZMA_FINISH_END;
- }
-
- if (LZMA2_IS_UNCOMPRESSED_STATE(p))
- {
- if (*srcLen == inSize)
- {
- *status = LZMA_STATUS_NEEDS_MORE_INPUT;
- return SZ_OK;
- }
-
- if (p->state == LZMA2_STATE_DATA)
- {
- Bool initDic = (p->control == LZMA2_CONTROL_COPY_RESET_DIC);
- if (initDic)
- p->needInitProp = p->needInitState = True;
- else if (p->needInitDic)
- return SZ_ERROR_DATA;
- p->needInitDic = False;
- LzmaDec_InitDicAndState(&p->decoder, initDic, False);
- }
-
- if (srcSizeCur > destSizeCur)
- srcSizeCur = destSizeCur;
-
- if (srcSizeCur == 0)
- return SZ_ERROR_DATA;
-
- LzmaDec_UpdateWithUncompressed(&p->decoder, src, srcSizeCur);
-
- src += srcSizeCur;
- *srcLen += srcSizeCur;
- p->unpackSize -= (UInt32)srcSizeCur;
- p->state = (p->unpackSize == 0) ? LZMA2_STATE_CONTROL : LZMA2_STATE_DATA_CONT;
- }
- else
- {
- SizeT outSizeProcessed;
- SRes res;
-
- if (p->state == LZMA2_STATE_DATA)
- {
- int mode = LZMA2_GET_LZMA_MODE(p);
- Bool initDic = (mode == 3);
- Bool initState = (mode > 0);
- if ((!initDic && p->needInitDic) || (!initState && p->needInitState))
- return SZ_ERROR_DATA;
-
- LzmaDec_InitDicAndState(&p->decoder, initDic, initState);
- p->needInitDic = False;
- p->needInitState = False;
- p->state = LZMA2_STATE_DATA_CONT;
- }
- if (srcSizeCur > p->packSize)
- srcSizeCur = (SizeT)p->packSize;
-
- res = LzmaDec_DecodeToDic(&p->decoder, dicPos + destSizeCur, src, &srcSizeCur, curFinishMode, status);
-
- src += srcSizeCur;
- *srcLen += srcSizeCur;
- p->packSize -= (UInt32)srcSizeCur;
-
- outSizeProcessed = p->decoder.dicPos - dicPos;
- p->unpackSize -= (UInt32)outSizeProcessed;
-
- RINOK(res);
- if (*status == LZMA_STATUS_NEEDS_MORE_INPUT)
- return res;
-
- if (srcSizeCur == 0 && outSizeProcessed == 0)
- {
- if (*status != LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK ||
- p->unpackSize != 0 || p->packSize != 0)
- return SZ_ERROR_DATA;
- p->state = LZMA2_STATE_CONTROL;
- }
- if (*status == LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK)
- *status = LZMA_STATUS_NOT_FINISHED;
- }
- }
- }
- *status = LZMA_STATUS_FINISHED_WITH_MARK;
- return SZ_OK;
+ SizeT inSize = *srcLen;
+ *srcLen = 0;
+ *status = LZMA_STATUS_NOT_SPECIFIED;
+
+ while (p->state != LZMA2_STATE_FINISHED)
+ {
+ SizeT dicPos = p->decoder.dicPos;
+ if (p->state == LZMA2_STATE_ERROR)
+ return SZ_ERROR_DATA;
+ if (dicPos == dicLimit && finishMode == LZMA_FINISH_ANY)
+ {
+ *status = LZMA_STATUS_NOT_FINISHED;
+ return SZ_OK;
+ }
+ if (p->state != LZMA2_STATE_DATA && p->state != LZMA2_STATE_DATA_CONT)
+ {
+ if (*srcLen == inSize)
+ {
+ *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+ return SZ_OK;
+ }
+ (*srcLen)++;
+ p->state = Lzma2Dec_UpdateState(p, *src++);
+ continue;
+ }
+ {
+ SizeT destSizeCur = dicLimit - dicPos;
+ SizeT srcSizeCur = inSize - *srcLen;
+ ELzmaFinishMode curFinishMode = LZMA_FINISH_ANY;
+
+ if (p->unpackSize <= destSizeCur)
+ {
+ destSizeCur = (SizeT)p->unpackSize;
+ curFinishMode = LZMA_FINISH_END;
+ }
+
+ if (LZMA2_IS_UNCOMPRESSED_STATE(p))
+ {
+ if (*srcLen == inSize)
+ {
+ *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+ return SZ_OK;
+ }
+
+ if (p->state == LZMA2_STATE_DATA)
+ {
+ Bool initDic = (p->control == LZMA2_CONTROL_COPY_RESET_DIC);
+ if (initDic)
+ p->needInitProp = p->needInitState = True;
+ else if (p->needInitDic)
+ return SZ_ERROR_DATA;
+ p->needInitDic = False;
+ LzmaDec_InitDicAndState(&p->decoder, initDic, False);
+ }
+
+ if (srcSizeCur > destSizeCur)
+ srcSizeCur = destSizeCur;
+
+ if (srcSizeCur == 0)
+ return SZ_ERROR_DATA;
+
+ LzmaDec_UpdateWithUncompressed(&p->decoder, src, srcSizeCur);
+
+ src += srcSizeCur;
+ *srcLen += srcSizeCur;
+ p->unpackSize -= (UInt32)srcSizeCur;
+ p->state = (p->unpackSize == 0) ? LZMA2_STATE_CONTROL : LZMA2_STATE_DATA_CONT;
+ }
+ else
+ {
+ SizeT outSizeProcessed;
+ SRes res;
+
+ if (p->state == LZMA2_STATE_DATA)
+ {
+ int mode = LZMA2_GET_LZMA_MODE(p);
+ Bool initDic = (mode == 3);
+ Bool initState = (mode > 0);
+ if ((!initDic && p->needInitDic) || (!initState && p->needInitState))
+ return SZ_ERROR_DATA;
+
+ LzmaDec_InitDicAndState(&p->decoder, initDic, initState);
+ p->needInitDic = False;
+ p->needInitState = False;
+ p->state = LZMA2_STATE_DATA_CONT;
+ }
+ if (srcSizeCur > p->packSize)
+ srcSizeCur = (SizeT)p->packSize;
+
+ res = LzmaDec_DecodeToDic(&p->decoder, dicPos + destSizeCur, src, &srcSizeCur, curFinishMode, status);
+
+ src += srcSizeCur;
+ *srcLen += srcSizeCur;
+ p->packSize -= (UInt32)srcSizeCur;
+
+ outSizeProcessed = p->decoder.dicPos - dicPos;
+ p->unpackSize -= (UInt32)outSizeProcessed;
+
+ RINOK(res);
+ if (*status == LZMA_STATUS_NEEDS_MORE_INPUT)
+ return res;
+
+ if (srcSizeCur == 0 && outSizeProcessed == 0)
+ {
+ if (*status != LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK ||
+ p->unpackSize != 0 || p->packSize != 0)
+ return SZ_ERROR_DATA;
+ p->state = LZMA2_STATE_CONTROL;
+ }
+ if (*status == LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK)
+ *status = LZMA_STATUS_NOT_FINISHED;
+ }
+ }
+ }
+ *status = LZMA_STATUS_FINISHED_WITH_MARK;
+ return SZ_OK;
}
SRes Lzma2Dec_DecodeToBuf(CLzma2Dec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
{
- SizeT outSize = *destLen, inSize = *srcLen;
- *srcLen = *destLen = 0;
- for (;;)
- {
- SizeT srcSizeCur = inSize, outSizeCur, dicPos;
- ELzmaFinishMode curFinishMode;
- SRes res;
- if (p->decoder.dicPos == p->decoder.dicBufSize)
- p->decoder.dicPos = 0;
- dicPos = p->decoder.dicPos;
- if (outSize > p->decoder.dicBufSize - dicPos)
- {
- outSizeCur = p->decoder.dicBufSize;
- curFinishMode = LZMA_FINISH_ANY;
- }
- else
- {
- outSizeCur = dicPos + outSize;
- curFinishMode = finishMode;
- }
-
- res = Lzma2Dec_DecodeToDic(p, outSizeCur, src, &srcSizeCur, curFinishMode, status);
- src += srcSizeCur;
- inSize -= srcSizeCur;
- *srcLen += srcSizeCur;
- outSizeCur = p->decoder.dicPos - dicPos;
- memcpy(dest, p->decoder.dic + dicPos, outSizeCur);
- dest += outSizeCur;
- outSize -= outSizeCur;
- *destLen += outSizeCur;
- if (res != 0)
- return res;
- if (outSizeCur == 0 || outSize == 0)
- return SZ_OK;
- }
+ SizeT outSize = *destLen, inSize = *srcLen;
+ *srcLen = *destLen = 0;
+ for (;;)
+ {
+ SizeT srcSizeCur = inSize, outSizeCur, dicPos;
+ ELzmaFinishMode curFinishMode;
+ SRes res;
+ if (p->decoder.dicPos == p->decoder.dicBufSize)
+ p->decoder.dicPos = 0;
+ dicPos = p->decoder.dicPos;
+ if (outSize > p->decoder.dicBufSize - dicPos)
+ {
+ outSizeCur = p->decoder.dicBufSize;
+ curFinishMode = LZMA_FINISH_ANY;
+ }
+ else
+ {
+ outSizeCur = dicPos + outSize;
+ curFinishMode = finishMode;
+ }
+
+ res = Lzma2Dec_DecodeToDic(p, outSizeCur, src, &srcSizeCur, curFinishMode, status);
+ src += srcSizeCur;
+ inSize -= srcSizeCur;
+ *srcLen += srcSizeCur;
+ outSizeCur = p->decoder.dicPos - dicPos;
+ memcpy(dest, p->decoder.dic + dicPos, outSizeCur);
+ dest += outSizeCur;
+ outSize -= outSizeCur;
+ *destLen += outSizeCur;
+ if (res != 0)
+ return res;
+ if (outSizeCur == 0 || outSize == 0)
+ return SZ_OK;
+ }
}
SRes Lzma2Decode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- Byte prop, ELzmaFinishMode finishMode, ELzmaStatus *status, ISzAlloc *alloc)
+ Byte prop, ELzmaFinishMode finishMode, ELzmaStatus *status, ISzAlloc *alloc)
{
- CLzma2Dec p;
- SRes res;
- SizeT outSize = *destLen, inSize = *srcLen;
- *destLen = *srcLen = 0;
- *status = LZMA_STATUS_NOT_SPECIFIED;
- Lzma2Dec_Construct(&p);
- RINOK(Lzma2Dec_AllocateProbs(&p, prop, alloc));
- p.decoder.dic = dest;
- p.decoder.dicBufSize = outSize;
- Lzma2Dec_Init(&p);
- *srcLen = inSize;
- res = Lzma2Dec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status);
- *destLen = p.decoder.dicPos;
- if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT)
- res = SZ_ERROR_INPUT_EOF;
- Lzma2Dec_FreeProbs(&p, alloc);
- return res;
+ CLzma2Dec p;
+ SRes res;
+ SizeT outSize = *destLen, inSize = *srcLen;
+ *destLen = *srcLen = 0;
+ *status = LZMA_STATUS_NOT_SPECIFIED;
+ Lzma2Dec_Construct(&p);
+ RINOK(Lzma2Dec_AllocateProbs(&p, prop, alloc));
+ p.decoder.dic = dest;
+ p.decoder.dicBufSize = outSize;
+ Lzma2Dec_Init(&p);
+ *srcLen = inSize;
+ res = Lzma2Dec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status);
+ *destLen = p.decoder.dicPos;
+ if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT)
+ res = SZ_ERROR_INPUT_EOF;
+ Lzma2Dec_FreeProbs(&p, alloc);
+ return res;
}
diff --git a/src/lib/lib7z/Lzma2Dec.h b/src/lib/lib7z/Lzma2Dec.h
index 6bc07bbc185..d922f9be6b3 100644
--- a/src/lib/lib7z/Lzma2Dec.h
+++ b/src/lib/lib7z/Lzma2Dec.h
@@ -14,14 +14,14 @@ extern "C" {
typedef struct
{
- CLzmaDec decoder;
- UInt32 packSize;
- UInt32 unpackSize;
- int state;
- Byte control;
- Bool needInitDic;
- Bool needInitState;
- Bool needInitProp;
+ CLzmaDec decoder;
+ UInt32 packSize;
+ UInt32 unpackSize;
+ int state;
+ Byte control;
+ Bool needInitDic;
+ Bool needInitState;
+ Bool needInitProp;
} CLzma2Dec;
#define Lzma2Dec_Construct(p) LzmaDec_Construct(&(p)->decoder)
@@ -49,10 +49,10 @@ Returns:
*/
SRes Lzma2Dec_DecodeToDic(CLzma2Dec *p, SizeT dicLimit,
- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
SRes Lzma2Dec_DecodeToBuf(CLzma2Dec *p, Byte *dest, SizeT *destLen,
- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
/* ---------- One Call Interface ---------- */
@@ -75,7 +75,7 @@ Returns:
*/
SRes Lzma2Decode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- Byte prop, ELzmaFinishMode finishMode, ELzmaStatus *status, ISzAlloc *alloc);
+ Byte prop, ELzmaFinishMode finishMode, ELzmaStatus *status, ISzAlloc *alloc);
#ifdef __cplusplus
}
diff --git a/src/lib/lib7z/Lzma2Enc.c b/src/lib/lib7z/Lzma2Enc.c
index 86869551668..caeace955a8 100644
--- a/src/lib/lib7z/Lzma2Enc.c
+++ b/src/lib/lib7z/Lzma2Enc.c
@@ -37,32 +37,32 @@
typedef struct
{
- CLzmaEncHandle enc;
- UInt64 srcPos;
- Byte props;
- Bool needInitState;
- Bool needInitProp;
+ CLzmaEncHandle enc;
+ UInt64 srcPos;
+ Byte props;
+ Bool needInitState;
+ Bool needInitProp;
} CLzma2EncInt;
static SRes Lzma2EncInt_Init(CLzma2EncInt *p, const CLzma2EncProps *props)
{
- Byte propsEncoded[LZMA_PROPS_SIZE];
- SizeT propsSize = LZMA_PROPS_SIZE;
- RINOK(LzmaEnc_SetProps(p->enc, &props->lzmaProps));
- RINOK(LzmaEnc_WriteProperties(p->enc, propsEncoded, &propsSize));
- p->srcPos = 0;
- p->props = propsEncoded[0];
- p->needInitState = True;
- p->needInitProp = True;
- return SZ_OK;
+ Byte propsEncoded[LZMA_PROPS_SIZE];
+ SizeT propsSize = LZMA_PROPS_SIZE;
+ RINOK(LzmaEnc_SetProps(p->enc, &props->lzmaProps));
+ RINOK(LzmaEnc_WriteProperties(p->enc, propsEncoded, &propsSize));
+ p->srcPos = 0;
+ p->props = propsEncoded[0];
+ p->needInitState = True;
+ p->needInitProp = True;
+ return SZ_OK;
}
SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp, ISeqInStream *inStream, UInt32 keepWindowSize,
- ISzAlloc *alloc, ISzAlloc *allocBig);
+ ISzAlloc *alloc, ISzAlloc *allocBig);
SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
- UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig);
+ UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig);
SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
- Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize);
+ Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize);
const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp);
void LzmaEnc_Finish(CLzmaEncHandle pp);
void LzmaEnc_SaveState(CLzmaEncHandle pp);
@@ -70,191 +70,191 @@ void LzmaEnc_RestoreState(CLzmaEncHandle pp);
static SRes Lzma2EncInt_EncodeSubblock(CLzma2EncInt *p, Byte *outBuf,
- size_t *packSizeRes, ISeqOutStream *outStream)
+ size_t *packSizeRes, ISeqOutStream *outStream)
{
- size_t packSizeLimit = *packSizeRes;
- size_t packSize = packSizeLimit;
- UInt32 unpackSize = LZMA2_UNPACK_SIZE_MAX;
- unsigned lzHeaderSize = 5 + (p->needInitProp ? 1 : 0);
- Bool useCopyBlock;
- SRes res;
-
- *packSizeRes = 0;
- if (packSize < lzHeaderSize)
- return SZ_ERROR_OUTPUT_EOF;
- packSize -= lzHeaderSize;
-
- LzmaEnc_SaveState(p->enc);
- res = LzmaEnc_CodeOneMemBlock(p->enc, p->needInitState,
- outBuf + lzHeaderSize, &packSize, LZMA2_PACK_SIZE_MAX, &unpackSize);
-
- PRF(printf("\npackSize = %7d unpackSize = %7d ", packSize, unpackSize));
-
- if (unpackSize == 0)
- return res;
-
- if (res == SZ_OK)
- useCopyBlock = (packSize + 2 >= unpackSize || packSize > (1 << 16));
- else
- {
- if (res != SZ_ERROR_OUTPUT_EOF)
- return res;
- res = SZ_OK;
- useCopyBlock = True;
- }
-
- if (useCopyBlock)
- {
- size_t destPos = 0;
- PRF(printf("################# COPY "));
- while (unpackSize > 0)
- {
- UInt32 u = (unpackSize < LZMA2_COPY_CHUNK_SIZE) ? unpackSize : LZMA2_COPY_CHUNK_SIZE;
- if (packSizeLimit - destPos < u + 3)
- return SZ_ERROR_OUTPUT_EOF;
- outBuf[destPos++] = (Byte)(p->srcPos == 0 ? LZMA2_CONTROL_COPY_RESET_DIC : LZMA2_CONTROL_COPY_NO_RESET);
- outBuf[destPos++] = (Byte)((u - 1) >> 8);
- outBuf[destPos++] = (Byte)(u - 1);
- memcpy(outBuf + destPos, LzmaEnc_GetCurBuf(p->enc) - unpackSize, u);
- unpackSize -= u;
- destPos += u;
- p->srcPos += u;
- if (outStream)
- {
- *packSizeRes += destPos;
- if (outStream->Write(outStream, outBuf, destPos) != destPos)
- return SZ_ERROR_WRITE;
- destPos = 0;
- }
- else
- *packSizeRes = destPos;
- /* needInitState = True; */
- }
- LzmaEnc_RestoreState(p->enc);
- return SZ_OK;
- }
- {
- size_t destPos = 0;
- UInt32 u = unpackSize - 1;
- UInt32 pm = (UInt32)(packSize - 1);
- unsigned mode = (p->srcPos == 0) ? 3 : (p->needInitState ? (p->needInitProp ? 2 : 1) : 0);
-
- PRF(printf(" "));
-
- outBuf[destPos++] = (Byte)(LZMA2_CONTROL_LZMA | (mode << 5) | ((u >> 16) & 0x1F));
- outBuf[destPos++] = (Byte)(u >> 8);
- outBuf[destPos++] = (Byte)u;
- outBuf[destPos++] = (Byte)(pm >> 8);
- outBuf[destPos++] = (Byte)pm;
-
- if (p->needInitProp)
- outBuf[destPos++] = p->props;
-
- p->needInitProp = False;
- p->needInitState = False;
- destPos += packSize;
- p->srcPos += unpackSize;
-
- if (outStream)
- if (outStream->Write(outStream, outBuf, destPos) != destPos)
- return SZ_ERROR_WRITE;
- *packSizeRes = destPos;
- return SZ_OK;
- }
+ size_t packSizeLimit = *packSizeRes;
+ size_t packSize = packSizeLimit;
+ UInt32 unpackSize = LZMA2_UNPACK_SIZE_MAX;
+ unsigned lzHeaderSize = 5 + (p->needInitProp ? 1 : 0);
+ Bool useCopyBlock;
+ SRes res;
+
+ *packSizeRes = 0;
+ if (packSize < lzHeaderSize)
+ return SZ_ERROR_OUTPUT_EOF;
+ packSize -= lzHeaderSize;
+
+ LzmaEnc_SaveState(p->enc);
+ res = LzmaEnc_CodeOneMemBlock(p->enc, p->needInitState,
+ outBuf + lzHeaderSize, &packSize, LZMA2_PACK_SIZE_MAX, &unpackSize);
+
+ PRF(printf("\npackSize = %7d unpackSize = %7d ", packSize, unpackSize));
+
+ if (unpackSize == 0)
+ return res;
+
+ if (res == SZ_OK)
+ useCopyBlock = (packSize + 2 >= unpackSize || packSize > (1 << 16));
+ else
+ {
+ if (res != SZ_ERROR_OUTPUT_EOF)
+ return res;
+ res = SZ_OK;
+ useCopyBlock = True;
+ }
+
+ if (useCopyBlock)
+ {
+ size_t destPos = 0;
+ PRF(printf("################# COPY "));
+ while (unpackSize > 0)
+ {
+ UInt32 u = (unpackSize < LZMA2_COPY_CHUNK_SIZE) ? unpackSize : LZMA2_COPY_CHUNK_SIZE;
+ if (packSizeLimit - destPos < u + 3)
+ return SZ_ERROR_OUTPUT_EOF;
+ outBuf[destPos++] = (Byte)(p->srcPos == 0 ? LZMA2_CONTROL_COPY_RESET_DIC : LZMA2_CONTROL_COPY_NO_RESET);
+ outBuf[destPos++] = (Byte)((u - 1) >> 8);
+ outBuf[destPos++] = (Byte)(u - 1);
+ memcpy(outBuf + destPos, LzmaEnc_GetCurBuf(p->enc) - unpackSize, u);
+ unpackSize -= u;
+ destPos += u;
+ p->srcPos += u;
+ if (outStream)
+ {
+ *packSizeRes += destPos;
+ if (outStream->Write(outStream, outBuf, destPos) != destPos)
+ return SZ_ERROR_WRITE;
+ destPos = 0;
+ }
+ else
+ *packSizeRes = destPos;
+ /* needInitState = True; */
+ }
+ LzmaEnc_RestoreState(p->enc);
+ return SZ_OK;
+ }
+ {
+ size_t destPos = 0;
+ UInt32 u = unpackSize - 1;
+ UInt32 pm = (UInt32)(packSize - 1);
+ unsigned mode = (p->srcPos == 0) ? 3 : (p->needInitState ? (p->needInitProp ? 2 : 1) : 0);
+
+ PRF(printf(" "));
+
+ outBuf[destPos++] = (Byte)(LZMA2_CONTROL_LZMA | (mode << 5) | ((u >> 16) & 0x1F));
+ outBuf[destPos++] = (Byte)(u >> 8);
+ outBuf[destPos++] = (Byte)u;
+ outBuf[destPos++] = (Byte)(pm >> 8);
+ outBuf[destPos++] = (Byte)pm;
+
+ if (p->needInitProp)
+ outBuf[destPos++] = p->props;
+
+ p->needInitProp = False;
+ p->needInitState = False;
+ destPos += packSize;
+ p->srcPos += unpackSize;
+
+ if (outStream)
+ if (outStream->Write(outStream, outBuf, destPos) != destPos)
+ return SZ_ERROR_WRITE;
+ *packSizeRes = destPos;
+ return SZ_OK;
+ }
}
/* ---------- Lzma2 Props ---------- */
void Lzma2EncProps_Init(CLzma2EncProps *p)
{
- LzmaEncProps_Init(&p->lzmaProps);
- p->numTotalThreads = -1;
- p->numBlockThreads = -1;
- p->blockSize = 0;
+ LzmaEncProps_Init(&p->lzmaProps);
+ p->numTotalThreads = -1;
+ p->numBlockThreads = -1;
+ p->blockSize = 0;
}
void Lzma2EncProps_Normalize(CLzma2EncProps *p)
{
- int t1, t1n, t2, t3;
- {
- CLzmaEncProps lzmaProps = p->lzmaProps;
- LzmaEncProps_Normalize(&lzmaProps);
- t1n = lzmaProps.numThreads;
- }
-
- t1 = p->lzmaProps.numThreads;
- t2 = p->numBlockThreads;
- t3 = p->numTotalThreads;
-
- if (t2 > NUM_MT_CODER_THREADS_MAX)
- t2 = NUM_MT_CODER_THREADS_MAX;
-
- if (t3 <= 0)
- {
- if (t2 <= 0)
- t2 = 1;
- t3 = t1n * t2;
- }
- else if (t2 <= 0)
- {
- t2 = t3 / t1n;
- if (t2 == 0)
- {
- t1 = 1;
- t2 = t3;
- }
- if (t2 > NUM_MT_CODER_THREADS_MAX)
- t2 = NUM_MT_CODER_THREADS_MAX;
- }
- else if (t1 <= 0)
- {
- t1 = t3 / t2;
- if (t1 == 0)
- t1 = 1;
- }
- else
- t3 = t1n * t2;
-
- p->lzmaProps.numThreads = t1;
- p->numBlockThreads = t2;
- p->numTotalThreads = t3;
- LzmaEncProps_Normalize(&p->lzmaProps);
-
- if (p->blockSize == 0)
- {
- UInt32 dictSize = p->lzmaProps.dictSize;
- UInt64 blockSize = (UInt64)dictSize << 2;
- const UInt32 kMinSize = (UInt32)1 << 20;
- const UInt32 kMaxSize = (UInt32)1 << 28;
- if (blockSize < kMinSize) blockSize = kMinSize;
- if (blockSize > kMaxSize) blockSize = kMaxSize;
- if (blockSize < dictSize) blockSize = dictSize;
- p->blockSize = (size_t)blockSize;
- }
+ int t1, t1n, t2, t3;
+ {
+ CLzmaEncProps lzmaProps = p->lzmaProps;
+ LzmaEncProps_Normalize(&lzmaProps);
+ t1n = lzmaProps.numThreads;
+ }
+
+ t1 = p->lzmaProps.numThreads;
+ t2 = p->numBlockThreads;
+ t3 = p->numTotalThreads;
+
+ if (t2 > NUM_MT_CODER_THREADS_MAX)
+ t2 = NUM_MT_CODER_THREADS_MAX;
+
+ if (t3 <= 0)
+ {
+ if (t2 <= 0)
+ t2 = 1;
+ t3 = t1n * t2;
+ }
+ else if (t2 <= 0)
+ {
+ t2 = t3 / t1n;
+ if (t2 == 0)
+ {
+ t1 = 1;
+ t2 = t3;
+ }
+ if (t2 > NUM_MT_CODER_THREADS_MAX)
+ t2 = NUM_MT_CODER_THREADS_MAX;
+ }
+ else if (t1 <= 0)
+ {
+ t1 = t3 / t2;
+ if (t1 == 0)
+ t1 = 1;
+ }
+ else
+ t3 = t1n * t2;
+
+ p->lzmaProps.numThreads = t1;
+ p->numBlockThreads = t2;
+ p->numTotalThreads = t3;
+ LzmaEncProps_Normalize(&p->lzmaProps);
+
+ if (p->blockSize == 0)
+ {
+ UInt32 dictSize = p->lzmaProps.dictSize;
+ UInt64 blockSize = (UInt64)dictSize << 2;
+ const UInt32 kMinSize = (UInt32)1 << 20;
+ const UInt32 kMaxSize = (UInt32)1 << 28;
+ if (blockSize < kMinSize) blockSize = kMinSize;
+ if (blockSize > kMaxSize) blockSize = kMaxSize;
+ if (blockSize < dictSize) blockSize = dictSize;
+ p->blockSize = (size_t)blockSize;
+ }
}
static SRes Progress(ICompressProgress *p, UInt64 inSize, UInt64 outSize)
{
- return (p && p->Progress(p, inSize, outSize) != SZ_OK) ? SZ_ERROR_PROGRESS : SZ_OK;
+ return (p && p->Progress(p, inSize, outSize) != SZ_OK) ? SZ_ERROR_PROGRESS : SZ_OK;
}
/* ---------- Lzma2 ---------- */
typedef struct
{
- Byte propEncoded;
- CLzma2EncProps props;
+ Byte propEncoded;
+ CLzma2EncProps props;
- Byte *outBuf;
+ Byte *outBuf;
- ISzAlloc *alloc;
- ISzAlloc *allocBig;
+ ISzAlloc *alloc;
+ ISzAlloc *allocBig;
- CLzma2EncInt coders[NUM_MT_CODER_THREADS_MAX];
+ CLzma2EncInt coders[NUM_MT_CODER_THREADS_MAX];
- #ifndef _7ZIP_ST
- CMtCoder mtCoder;
- #endif
+ #ifndef _7ZIP_ST
+ CMtCoder mtCoder;
+ #endif
} CLzma2Enc;
@@ -262,102 +262,102 @@ typedef struct
/* ---------- Lzma2EncThread ---------- */
static SRes Lzma2Enc_EncodeMt1(CLzma2EncInt *p, CLzma2Enc *mainEncoder,
- ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress)
+ ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress)
{
- UInt64 packTotal = 0;
- SRes res = SZ_OK;
-
- if (mainEncoder->outBuf == 0)
- {
- mainEncoder->outBuf = (Byte *)IAlloc_Alloc(mainEncoder->alloc, LZMA2_CHUNK_SIZE_COMPRESSED_MAX);
- if (mainEncoder->outBuf == 0)
- return SZ_ERROR_MEM;
- }
- RINOK(Lzma2EncInt_Init(p, &mainEncoder->props));
- RINOK(LzmaEnc_PrepareForLzma2(p->enc, inStream, LZMA2_KEEP_WINDOW_SIZE,
- mainEncoder->alloc, mainEncoder->allocBig));
- for (;;)
- {
- size_t packSize = LZMA2_CHUNK_SIZE_COMPRESSED_MAX;
- res = Lzma2EncInt_EncodeSubblock(p, mainEncoder->outBuf, &packSize, outStream);
- if (res != SZ_OK)
- break;
- packTotal += packSize;
- res = Progress(progress, p->srcPos, packTotal);
- if (res != SZ_OK)
- break;
- if (packSize == 0)
- break;
- }
- LzmaEnc_Finish(p->enc);
- if (res == SZ_OK)
- {
- Byte b = 0;
- if (outStream->Write(outStream, &b, 1) != 1)
- return SZ_ERROR_WRITE;
- }
- return res;
+ UInt64 packTotal = 0;
+ SRes res = SZ_OK;
+
+ if (mainEncoder->outBuf == 0)
+ {
+ mainEncoder->outBuf = (Byte *)IAlloc_Alloc(mainEncoder->alloc, LZMA2_CHUNK_SIZE_COMPRESSED_MAX);
+ if (mainEncoder->outBuf == 0)
+ return SZ_ERROR_MEM;
+ }
+ RINOK(Lzma2EncInt_Init(p, &mainEncoder->props));
+ RINOK(LzmaEnc_PrepareForLzma2(p->enc, inStream, LZMA2_KEEP_WINDOW_SIZE,
+ mainEncoder->alloc, mainEncoder->allocBig));
+ for (;;)
+ {
+ size_t packSize = LZMA2_CHUNK_SIZE_COMPRESSED_MAX;
+ res = Lzma2EncInt_EncodeSubblock(p, mainEncoder->outBuf, &packSize, outStream);
+ if (res != SZ_OK)
+ break;
+ packTotal += packSize;
+ res = Progress(progress, p->srcPos, packTotal);
+ if (res != SZ_OK)
+ break;
+ if (packSize == 0)
+ break;
+ }
+ LzmaEnc_Finish(p->enc);
+ if (res == SZ_OK)
+ {
+ Byte b = 0;
+ if (outStream->Write(outStream, &b, 1) != 1)
+ return SZ_ERROR_WRITE;
+ }
+ return res;
}
#ifndef _7ZIP_ST
typedef struct
{
- IMtCoderCallback funcTable;
- CLzma2Enc *lzma2Enc;
+ IMtCoderCallback funcTable;
+ CLzma2Enc *lzma2Enc;
} CMtCallbackImp;
static SRes MtCallbackImp_Code(void *pp, unsigned index, Byte *dest, size_t *destSize,
- const Byte *src, size_t srcSize, int finished)
+ const Byte *src, size_t srcSize, int finished)
{
- CMtCallbackImp *imp = (CMtCallbackImp *)pp;
- CLzma2Enc *mainEncoder = imp->lzma2Enc;
- CLzma2EncInt *p = &mainEncoder->coders[index];
-
- SRes res = SZ_OK;
- {
- size_t destLim = *destSize;
- *destSize = 0;
-
- if (srcSize != 0)
- {
- RINOK(Lzma2EncInt_Init(p, &mainEncoder->props));
-
- RINOK(LzmaEnc_MemPrepare(p->enc, src, srcSize, LZMA2_KEEP_WINDOW_SIZE,
- mainEncoder->alloc, mainEncoder->allocBig));
-
- while (p->srcPos < srcSize)
- {
- size_t packSize = destLim - *destSize;
- res = Lzma2EncInt_EncodeSubblock(p, dest + *destSize, &packSize, NULL);
- if (res != SZ_OK)
- break;
- *destSize += packSize;
-
- if (packSize == 0)
- {
- res = SZ_ERROR_FAIL;
- break;
- }
-
- if (MtProgress_Set(&mainEncoder->mtCoder.mtProgress, index, p->srcPos, *destSize) != SZ_OK)
- {
- res = SZ_ERROR_PROGRESS;
- break;
- }
- }
- LzmaEnc_Finish(p->enc);
- if (res != SZ_OK)
- return res;
- }
- if (finished)
- {
- if (*destSize == destLim)
- return SZ_ERROR_OUTPUT_EOF;
- dest[(*destSize)++] = 0;
- }
- }
- return res;
+ CMtCallbackImp *imp = (CMtCallbackImp *)pp;
+ CLzma2Enc *mainEncoder = imp->lzma2Enc;
+ CLzma2EncInt *p = &mainEncoder->coders[index];
+
+ SRes res = SZ_OK;
+ {
+ size_t destLim = *destSize;
+ *destSize = 0;
+
+ if (srcSize != 0)
+ {
+ RINOK(Lzma2EncInt_Init(p, &mainEncoder->props));
+
+ RINOK(LzmaEnc_MemPrepare(p->enc, src, srcSize, LZMA2_KEEP_WINDOW_SIZE,
+ mainEncoder->alloc, mainEncoder->allocBig));
+
+ while (p->srcPos < srcSize)
+ {
+ size_t packSize = destLim - *destSize;
+ res = Lzma2EncInt_EncodeSubblock(p, dest + *destSize, &packSize, NULL);
+ if (res != SZ_OK)
+ break;
+ *destSize += packSize;
+
+ if (packSize == 0)
+ {
+ res = SZ_ERROR_FAIL;
+ break;
+ }
+
+ if (MtProgress_Set(&mainEncoder->mtCoder.mtProgress, index, p->srcPos, *destSize) != SZ_OK)
+ {
+ res = SZ_ERROR_PROGRESS;
+ break;
+ }
+ }
+ LzmaEnc_Finish(p->enc);
+ if (res != SZ_OK)
+ return res;
+ }
+ if (finished)
+ {
+ if (*destSize == destLim)
+ return SZ_ERROR_OUTPUT_EOF;
+ dest[(*destSize)++] = 0;
+ }
+ }
+ return res;
}
#endif
@@ -366,112 +366,112 @@ static SRes MtCallbackImp_Code(void *pp, unsigned index, Byte *dest, size_t *des
CLzma2EncHandle Lzma2Enc_Create(ISzAlloc *alloc, ISzAlloc *allocBig)
{
- CLzma2Enc *p = (CLzma2Enc *)alloc->Alloc(alloc, sizeof(CLzma2Enc));
- if (p == 0)
- return NULL;
- Lzma2EncProps_Init(&p->props);
- Lzma2EncProps_Normalize(&p->props);
- p->outBuf = 0;
- p->alloc = alloc;
- p->allocBig = allocBig;
- {
- unsigned i;
- for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
- p->coders[i].enc = 0;
- }
- #ifndef _7ZIP_ST
- MtCoder_Construct(&p->mtCoder);
- #endif
-
- return p;
+ CLzma2Enc *p = (CLzma2Enc *)alloc->Alloc(alloc, sizeof(CLzma2Enc));
+ if (p == 0)
+ return NULL;
+ Lzma2EncProps_Init(&p->props);
+ Lzma2EncProps_Normalize(&p->props);
+ p->outBuf = 0;
+ p->alloc = alloc;
+ p->allocBig = allocBig;
+ {
+ unsigned i;
+ for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
+ p->coders[i].enc = 0;
+ }
+ #ifndef _7ZIP_ST
+ MtCoder_Construct(&p->mtCoder);
+ #endif
+
+ return p;
}
void Lzma2Enc_Destroy(CLzma2EncHandle pp)
{
- CLzma2Enc *p = (CLzma2Enc *)pp;
- unsigned i;
- for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
- {
- CLzma2EncInt *t = &p->coders[i];
- if (t->enc)
- {
- LzmaEnc_Destroy(t->enc, p->alloc, p->allocBig);
- t->enc = 0;
- }
- }
-
- #ifndef _7ZIP_ST
- MtCoder_Destruct(&p->mtCoder);
- #endif
-
- IAlloc_Free(p->alloc, p->outBuf);
- IAlloc_Free(p->alloc, pp);
+ CLzma2Enc *p = (CLzma2Enc *)pp;
+ unsigned i;
+ for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
+ {
+ CLzma2EncInt *t = &p->coders[i];
+ if (t->enc)
+ {
+ LzmaEnc_Destroy(t->enc, p->alloc, p->allocBig);
+ t->enc = 0;
+ }
+ }
+
+ #ifndef _7ZIP_ST
+ MtCoder_Destruct(&p->mtCoder);
+ #endif
+
+ IAlloc_Free(p->alloc, p->outBuf);
+ IAlloc_Free(p->alloc, pp);
}
SRes Lzma2Enc_SetProps(CLzma2EncHandle pp, const CLzma2EncProps *props)
{
- CLzma2Enc *p = (CLzma2Enc *)pp;
- CLzmaEncProps lzmaProps = props->lzmaProps;
- LzmaEncProps_Normalize(&lzmaProps);
- if (lzmaProps.lc + lzmaProps.lp > LZMA2_LCLP_MAX)
- return SZ_ERROR_PARAM;
- p->props = *props;
- Lzma2EncProps_Normalize(&p->props);
- return SZ_OK;
+ CLzma2Enc *p = (CLzma2Enc *)pp;
+ CLzmaEncProps lzmaProps = props->lzmaProps;
+ LzmaEncProps_Normalize(&lzmaProps);
+ if (lzmaProps.lc + lzmaProps.lp > LZMA2_LCLP_MAX)
+ return SZ_ERROR_PARAM;
+ p->props = *props;
+ Lzma2EncProps_Normalize(&p->props);
+ return SZ_OK;
}
Byte Lzma2Enc_WriteProperties(CLzma2EncHandle pp)
{
- CLzma2Enc *p = (CLzma2Enc *)pp;
- unsigned i;
- UInt32 dicSize = LzmaEncProps_GetDictSize(&p->props.lzmaProps);
- for (i = 0; i < 40; i++)
- if (dicSize <= LZMA2_DIC_SIZE_FROM_PROP(i))
- break;
- return (Byte)i;
+ CLzma2Enc *p = (CLzma2Enc *)pp;
+ unsigned i;
+ UInt32 dicSize = LzmaEncProps_GetDictSize(&p->props.lzmaProps);
+ for (i = 0; i < 40; i++)
+ if (dicSize <= LZMA2_DIC_SIZE_FROM_PROP(i))
+ break;
+ return (Byte)i;
}
SRes Lzma2Enc_Encode(CLzma2EncHandle pp,
- ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress)
+ ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress)
{
- CLzma2Enc *p = (CLzma2Enc *)pp;
- int i;
-
- for (i = 0; i < p->props.numBlockThreads; i++)
- {
- CLzma2EncInt *t = &p->coders[i];
- if (t->enc == NULL)
- {
- t->enc = LzmaEnc_Create(p->alloc);
- if (t->enc == NULL)
- return SZ_ERROR_MEM;
- }
- }
-
- #ifndef _7ZIP_ST
- if (p->props.numBlockThreads <= 1)
- #endif
- return Lzma2Enc_EncodeMt1(&p->coders[0], p, outStream, inStream, progress);
-
- #ifndef _7ZIP_ST
-
- {
- CMtCallbackImp mtCallback;
-
- mtCallback.funcTable.Code = MtCallbackImp_Code;
- mtCallback.lzma2Enc = p;
-
- p->mtCoder.progress = progress;
- p->mtCoder.inStream = inStream;
- p->mtCoder.outStream = outStream;
- p->mtCoder.alloc = p->alloc;
- p->mtCoder.mtCallback = &mtCallback.funcTable;
-
- p->mtCoder.blockSize = p->props.blockSize;
- p->mtCoder.destBlockSize = p->props.blockSize + (p->props.blockSize >> 10) + 16;
- p->mtCoder.numThreads = p->props.numBlockThreads;
-
- return MtCoder_Code(&p->mtCoder);
- }
- #endif
+ CLzma2Enc *p = (CLzma2Enc *)pp;
+ int i;
+
+ for (i = 0; i < p->props.numBlockThreads; i++)
+ {
+ CLzma2EncInt *t = &p->coders[i];
+ if (t->enc == NULL)
+ {
+ t->enc = LzmaEnc_Create(p->alloc);
+ if (t->enc == NULL)
+ return SZ_ERROR_MEM;
+ }
+ }
+
+ #ifndef _7ZIP_ST
+ if (p->props.numBlockThreads <= 1)
+ #endif
+ return Lzma2Enc_EncodeMt1(&p->coders[0], p, outStream, inStream, progress);
+
+ #ifndef _7ZIP_ST
+
+ {
+ CMtCallbackImp mtCallback;
+
+ mtCallback.funcTable.Code = MtCallbackImp_Code;
+ mtCallback.lzma2Enc = p;
+
+ p->mtCoder.progress = progress;
+ p->mtCoder.inStream = inStream;
+ p->mtCoder.outStream = outStream;
+ p->mtCoder.alloc = p->alloc;
+ p->mtCoder.mtCallback = &mtCallback.funcTable;
+
+ p->mtCoder.blockSize = p->props.blockSize;
+ p->mtCoder.destBlockSize = p->props.blockSize + (p->props.blockSize >> 10) + 16;
+ p->mtCoder.numThreads = p->props.numBlockThreads;
+
+ return MtCoder_Code(&p->mtCoder);
+ }
+ #endif
}
diff --git a/src/lib/lib7z/Lzma2Enc.h b/src/lib/lib7z/Lzma2Enc.h
index 283525581e9..88b65270fbb 100644
--- a/src/lib/lib7z/Lzma2Enc.h
+++ b/src/lib/lib7z/Lzma2Enc.h
@@ -12,10 +12,10 @@ extern "C" {
typedef struct
{
- CLzmaEncProps lzmaProps;
- size_t blockSize;
- int numBlockThreads;
- int numTotalThreads;
+ CLzmaEncProps lzmaProps;
+ size_t blockSize;
+ int numBlockThreads;
+ int numTotalThreads;
} CLzma2EncProps;
void Lzma2EncProps_Init(CLzma2EncProps *p);
@@ -40,7 +40,7 @@ void Lzma2Enc_Destroy(CLzma2EncHandle p);
SRes Lzma2Enc_SetProps(CLzma2EncHandle p, const CLzma2EncProps *props);
Byte Lzma2Enc_WriteProperties(CLzma2EncHandle p);
SRes Lzma2Enc_Encode(CLzma2EncHandle p,
- ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress);
+ ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress);
/* ---------- One Call Interface ---------- */
diff --git a/src/lib/lib7z/Lzma86.h b/src/lib/lib7z/Lzma86.h
index 6acbd888a04..04903c64508 100644
--- a/src/lib/lib7z/Lzma86.h
+++ b/src/lib/lib7z/Lzma86.h
@@ -63,13 +63,13 @@ Return code:
enum ESzFilterMode
{
- SZ_FILTER_NO,
- SZ_FILTER_YES,
- SZ_FILTER_AUTO
+ SZ_FILTER_NO,
+ SZ_FILTER_YES,
+ SZ_FILTER_AUTO
};
SRes Lzma86_Encode(Byte *dest, size_t *destLen, const Byte *src, size_t srcLen,
- int level, UInt32 dictSize, int filterMode);
+ int level, UInt32 dictSize, int filterMode);
/*
diff --git a/src/lib/lib7z/Lzma86Dec.c b/src/lib/lib7z/Lzma86Dec.c
index fe7726097d0..1b54072085e 100644
--- a/src/lib/lib7z/Lzma86Dec.c
+++ b/src/lib/lib7z/Lzma86Dec.c
@@ -12,45 +12,45 @@ static void SzFree(void *p, void *address) { p = p; MyFree(address); }
SRes Lzma86_GetUnpackSize(const Byte *src, SizeT srcLen, UInt64 *unpackSize)
{
- unsigned i;
- if (srcLen < LZMA86_HEADER_SIZE)
- return SZ_ERROR_INPUT_EOF;
- *unpackSize = 0;
- for (i = 0; i < sizeof(UInt64); i++)
- *unpackSize += ((UInt64)src[LZMA86_SIZE_OFFSET + i]) << (8 * i);
- return SZ_OK;
+ unsigned i;
+ if (srcLen < LZMA86_HEADER_SIZE)
+ return SZ_ERROR_INPUT_EOF;
+ *unpackSize = 0;
+ for (i = 0; i < sizeof(UInt64); i++)
+ *unpackSize += ((UInt64)src[LZMA86_SIZE_OFFSET + i]) << (8 * i);
+ return SZ_OK;
}
SRes Lzma86_Decode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen)
{
- ISzAlloc g_Alloc = { SzAlloc, SzFree };
- SRes res;
- int useFilter;
- SizeT inSizePure;
- ELzmaStatus status;
-
- if (*srcLen < LZMA86_HEADER_SIZE)
- return SZ_ERROR_INPUT_EOF;
-
- useFilter = src[0];
-
- if (useFilter > 1)
- {
- *destLen = 0;
- return SZ_ERROR_UNSUPPORTED;
- }
-
- inSizePure = *srcLen - LZMA86_HEADER_SIZE;
- res = LzmaDecode(dest, destLen, src + LZMA86_HEADER_SIZE, &inSizePure,
- src + 1, LZMA_PROPS_SIZE, LZMA_FINISH_ANY, &status, &g_Alloc);
- *srcLen = inSizePure + LZMA86_HEADER_SIZE;
- if (res != SZ_OK)
- return res;
- if (useFilter == 1)
- {
- UInt32 x86State;
- x86_Convert_Init(x86State);
- x86_Convert(dest, *destLen, 0, &x86State, 0);
- }
- return SZ_OK;
+ ISzAlloc g_Alloc = { SzAlloc, SzFree };
+ SRes res;
+ int useFilter;
+ SizeT inSizePure;
+ ELzmaStatus status;
+
+ if (*srcLen < LZMA86_HEADER_SIZE)
+ return SZ_ERROR_INPUT_EOF;
+
+ useFilter = src[0];
+
+ if (useFilter > 1)
+ {
+ *destLen = 0;
+ return SZ_ERROR_UNSUPPORTED;
+ }
+
+ inSizePure = *srcLen - LZMA86_HEADER_SIZE;
+ res = LzmaDecode(dest, destLen, src + LZMA86_HEADER_SIZE, &inSizePure,
+ src + 1, LZMA_PROPS_SIZE, LZMA_FINISH_ANY, &status, &g_Alloc);
+ *srcLen = inSizePure + LZMA86_HEADER_SIZE;
+ if (res != SZ_OK)
+ return res;
+ if (useFilter == 1)
+ {
+ UInt32 x86State;
+ x86_Convert_Init(x86State);
+ x86_Convert(dest, *destLen, 0, &x86State, 0);
+ }
+ return SZ_OK;
}
diff --git a/src/lib/lib7z/Lzma86Enc.c b/src/lib/lib7z/Lzma86Enc.c
index 45b96b68e43..a0302674a46 100644
--- a/src/lib/lib7z/Lzma86Enc.c
+++ b/src/lib/lib7z/Lzma86Enc.c
@@ -15,94 +15,94 @@ static void *SzAlloc(void *p, size_t size) { p = p; return MyAlloc(size); }
static void SzFree(void *p, void *address) { p = p; MyFree(address); }
int Lzma86_Encode(Byte *dest, size_t *destLen, const Byte *src, size_t srcLen,
- int level, UInt32 dictSize, int filterMode)
+ int level, UInt32 dictSize, int filterMode)
{
- ISzAlloc g_Alloc = { SzAlloc, SzFree };
- size_t outSize2 = *destLen;
- Byte *filteredStream;
- Bool useFilter;
- int mainResult = SZ_ERROR_OUTPUT_EOF;
- CLzmaEncProps props;
- LzmaEncProps_Init(&props);
- props.level = level;
- props.dictSize = dictSize;
+ ISzAlloc g_Alloc = { SzAlloc, SzFree };
+ size_t outSize2 = *destLen;
+ Byte *filteredStream;
+ Bool useFilter;
+ int mainResult = SZ_ERROR_OUTPUT_EOF;
+ CLzmaEncProps props;
+ LzmaEncProps_Init(&props);
+ props.level = level;
+ props.dictSize = dictSize;
- *destLen = 0;
- if (outSize2 < LZMA86_HEADER_SIZE)
- return SZ_ERROR_OUTPUT_EOF;
+ *destLen = 0;
+ if (outSize2 < LZMA86_HEADER_SIZE)
+ return SZ_ERROR_OUTPUT_EOF;
- {
- int i;
- UInt64 t = srcLen;
- for (i = 0; i < 8; i++, t >>= 8)
- dest[LZMA86_SIZE_OFFSET + i] = (Byte)t;
- }
+ {
+ int i;
+ UInt64 t = srcLen;
+ for (i = 0; i < 8; i++, t >>= 8)
+ dest[LZMA86_SIZE_OFFSET + i] = (Byte)t;
+ }
- filteredStream = 0;
- useFilter = (filterMode != SZ_FILTER_NO);
- if (useFilter)
- {
- if (srcLen != 0)
- {
- filteredStream = (Byte *)MyAlloc(srcLen);
- if (filteredStream == 0)
- return SZ_ERROR_MEM;
- memcpy(filteredStream, src, srcLen);
- }
- {
- UInt32 x86State;
- x86_Convert_Init(x86State);
- x86_Convert(filteredStream, srcLen, 0, &x86State, 1);
- }
- }
+ filteredStream = 0;
+ useFilter = (filterMode != SZ_FILTER_NO);
+ if (useFilter)
+ {
+ if (srcLen != 0)
+ {
+ filteredStream = (Byte *)MyAlloc(srcLen);
+ if (filteredStream == 0)
+ return SZ_ERROR_MEM;
+ memcpy(filteredStream, src, srcLen);
+ }
+ {
+ UInt32 x86State;
+ x86_Convert_Init(x86State);
+ x86_Convert(filteredStream, srcLen, 0, &x86State, 1);
+ }
+ }
- {
- size_t minSize = 0;
- Bool bestIsFiltered = False;
+ {
+ size_t minSize = 0;
+ Bool bestIsFiltered = False;
- /* passes for SZ_FILTER_AUTO:
- 0 - BCJ + LZMA
- 1 - LZMA
- 2 - BCJ + LZMA agaian, if pass 0 (BCJ + LZMA) is better.
- */
- int numPasses = (filterMode == SZ_FILTER_AUTO) ? 3 : 1;
+ /* passes for SZ_FILTER_AUTO:
+ 0 - BCJ + LZMA
+ 1 - LZMA
+ 2 - BCJ + LZMA agaian, if pass 0 (BCJ + LZMA) is better.
+ */
+ int numPasses = (filterMode == SZ_FILTER_AUTO) ? 3 : 1;
- int i;
- for (i = 0; i < numPasses; i++)
- {
- size_t outSizeProcessed = outSize2 - LZMA86_HEADER_SIZE;
- size_t outPropsSize = 5;
- SRes curRes;
- Bool curModeIsFiltered = (numPasses > 1 && i == numPasses - 1);
- if (curModeIsFiltered && !bestIsFiltered)
- break;
- if (useFilter && i == 0)
- curModeIsFiltered = True;
+ int i;
+ for (i = 0; i < numPasses; i++)
+ {
+ size_t outSizeProcessed = outSize2 - LZMA86_HEADER_SIZE;
+ size_t outPropsSize = 5;
+ SRes curRes;
+ Bool curModeIsFiltered = (numPasses > 1 && i == numPasses - 1);
+ if (curModeIsFiltered && !bestIsFiltered)
+ break;
+ if (useFilter && i == 0)
+ curModeIsFiltered = True;
- curRes = LzmaEncode(dest + LZMA86_HEADER_SIZE, &outSizeProcessed,
- curModeIsFiltered ? filteredStream : src, srcLen,
- &props, dest + 1, &outPropsSize, 0,
- NULL, &g_Alloc, &g_Alloc);
+ curRes = LzmaEncode(dest + LZMA86_HEADER_SIZE, &outSizeProcessed,
+ curModeIsFiltered ? filteredStream : src, srcLen,
+ &props, dest + 1, &outPropsSize, 0,
+ NULL, &g_Alloc, &g_Alloc);
- if (curRes != SZ_ERROR_OUTPUT_EOF)
- {
- if (curRes != SZ_OK)
- {
- mainResult = curRes;
- break;
- }
- if (outSizeProcessed <= minSize || mainResult != SZ_OK)
- {
- minSize = outSizeProcessed;
- bestIsFiltered = curModeIsFiltered;
- mainResult = SZ_OK;
- }
- }
- }
- dest[0] = (bestIsFiltered ? 1 : 0);
- *destLen = LZMA86_HEADER_SIZE + minSize;
- }
- if (useFilter)
- MyFree(filteredStream);
- return mainResult;
+ if (curRes != SZ_ERROR_OUTPUT_EOF)
+ {
+ if (curRes != SZ_OK)
+ {
+ mainResult = curRes;
+ break;
+ }
+ if (outSizeProcessed <= minSize || mainResult != SZ_OK)
+ {
+ minSize = outSizeProcessed;
+ bestIsFiltered = curModeIsFiltered;
+ mainResult = SZ_OK;
+ }
+ }
+ }
+ dest[0] = (bestIsFiltered ? 1 : 0);
+ *destLen = LZMA86_HEADER_SIZE + minSize;
+ }
+ if (useFilter)
+ MyFree(filteredStream);
+ return mainResult;
}
diff --git a/src/lib/lib7z/LzmaDec.c b/src/lib/lib7z/LzmaDec.c
index 14d0f2d3250..cf4c2261f2e 100644
--- a/src/lib/lib7z/LzmaDec.c
+++ b/src/lib/lib7z/LzmaDec.c
@@ -20,13 +20,13 @@
#define UPDATE_0(p) range = bound; *(p) = (CLzmaProb)(ttt + ((kBitModelTotal - ttt) >> kNumMoveBits));
#define UPDATE_1(p) range -= bound; code -= bound; *(p) = (CLzmaProb)(ttt - (ttt >> kNumMoveBits));
#define GET_BIT2(p, i, A0, A1) IF_BIT_0(p) \
- { UPDATE_0(p); i = (i + i); A0; } else \
- { UPDATE_1(p); i = (i + i) + 1; A1; }
+ { UPDATE_0(p); i = (i + i); A0; } else \
+ { UPDATE_1(p); i = (i + i) + 1; A1; }
#define GET_BIT(p, i) GET_BIT2(p, i, ; , ;)
#define TREE_GET_BIT(probs, i) { GET_BIT((probs + i), i); }
#define TREE_DECODE(probs, limit, i) \
- { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; }
+ { i = 1; do { TREE_GET_BIT(probs, i); } while (i < limit); i -= limit; }
/* #define _LZMA_SIZE_OPT */
@@ -34,14 +34,14 @@
#define TREE_6_DECODE(probs, i) TREE_DECODE(probs, (1 << 6), i)
#else
#define TREE_6_DECODE(probs, i) \
- { i = 1; \
- TREE_GET_BIT(probs, i); \
- TREE_GET_BIT(probs, i); \
- TREE_GET_BIT(probs, i); \
- TREE_GET_BIT(probs, i); \
- TREE_GET_BIT(probs, i); \
- TREE_GET_BIT(probs, i); \
- i -= 0x40; }
+ { i = 1; \
+ TREE_GET_BIT(probs, i); \
+ TREE_GET_BIT(probs, i); \
+ TREE_GET_BIT(probs, i); \
+ TREE_GET_BIT(probs, i); \
+ TREE_GET_BIT(probs, i); \
+ TREE_GET_BIT(probs, i); \
+ i -= 0x40; }
#endif
#define NORMALIZE_CHECK if (range < kTopValue) { if (buf >= bufLimit) return DUMMY_ERROR; range <<= 8; code = (code << 8) | (*buf++); }
@@ -50,11 +50,11 @@
#define UPDATE_0_CHECK range = bound;
#define UPDATE_1_CHECK range -= bound; code -= bound;
#define GET_BIT2_CHECK(p, i, A0, A1) IF_BIT_0_CHECK(p) \
- { UPDATE_0_CHECK; i = (i + i); A0; } else \
- { UPDATE_1_CHECK; i = (i + i) + 1; A1; }
+ { UPDATE_0_CHECK; i = (i + i); A0; } else \
+ { UPDATE_1_CHECK; i = (i + i) + 1; A1; }
#define GET_BIT_CHECK(p, i) GET_BIT2_CHECK(p, i, ; , ;)
#define TREE_DECODE_CHECK(probs, limit, i) \
- { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; }
+ { i = 1; do { GET_BIT_CHECK(probs + i, i) } while (i < limit); i -= limit; }
#define kNumPosBitsMax 4
@@ -130,885 +130,885 @@ Out:
static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
{
- CLzmaProb *probs = p->probs;
-
- unsigned state = p->state;
- UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3];
- unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1;
- unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1;
- unsigned lc = p->prop.lc;
-
- Byte *dic = p->dic;
- SizeT dicBufSize = p->dicBufSize;
- SizeT dicPos = p->dicPos;
-
- UInt32 processedPos = p->processedPos;
- UInt32 checkDicSize = p->checkDicSize;
- unsigned len = 0;
-
- const Byte *buf = p->buf;
- UInt32 range = p->range;
- UInt32 code = p->code;
-
- do
- {
- CLzmaProb *prob;
- UInt32 bound;
- unsigned ttt;
- unsigned posState = processedPos & pbMask;
-
- prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
- IF_BIT_0(prob)
- {
- unsigned symbol;
- UPDATE_0(prob);
- prob = probs + Literal;
- if (checkDicSize != 0 || processedPos != 0)
- prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) +
- (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc))));
-
- if (state < kNumLitStates)
- {
- state -= (state < 4) ? state : 3;
- symbol = 1;
- do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100);
- }
- else
- {
- unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
- unsigned offs = 0x100;
- state -= (state < 10) ? 3 : 6;
- symbol = 1;
- do
- {
- unsigned bit;
- CLzmaProb *probLit;
- matchByte <<= 1;
- bit = (matchByte & offs);
- probLit = prob + offs + bit + symbol;
- GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit)
- }
- while (symbol < 0x100);
- }
- dic[dicPos++] = (Byte)symbol;
- processedPos++;
- continue;
- }
- else
- {
- UPDATE_1(prob);
- prob = probs + IsRep + state;
- IF_BIT_0(prob)
- {
- UPDATE_0(prob);
- state += kNumStates;
- prob = probs + LenCoder;
- }
- else
- {
- UPDATE_1(prob);
- if (checkDicSize == 0 && processedPos == 0)
- return SZ_ERROR_DATA;
- prob = probs + IsRepG0 + state;
- IF_BIT_0(prob)
- {
- UPDATE_0(prob);
- prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
- IF_BIT_0(prob)
- {
- UPDATE_0(prob);
- dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
- dicPos++;
- processedPos++;
- state = state < kNumLitStates ? 9 : 11;
- continue;
- }
- UPDATE_1(prob);
- }
- else
- {
- UInt32 distance;
- UPDATE_1(prob);
- prob = probs + IsRepG1 + state;
- IF_BIT_0(prob)
- {
- UPDATE_0(prob);
- distance = rep1;
- }
- else
- {
- UPDATE_1(prob);
- prob = probs + IsRepG2 + state;
- IF_BIT_0(prob)
- {
- UPDATE_0(prob);
- distance = rep2;
- }
- else
- {
- UPDATE_1(prob);
- distance = rep3;
- rep3 = rep2;
- }
- rep2 = rep1;
- }
- rep1 = rep0;
- rep0 = distance;
- }
- state = state < kNumLitStates ? 8 : 11;
- prob = probs + RepLenCoder;
- }
- {
- unsigned limit, offset;
- CLzmaProb *probLen = prob + LenChoice;
- IF_BIT_0(probLen)
- {
- UPDATE_0(probLen);
- probLen = prob + LenLow + (posState << kLenNumLowBits);
- offset = 0;
- limit = (1 << kLenNumLowBits);
- }
- else
- {
- UPDATE_1(probLen);
- probLen = prob + LenChoice2;
- IF_BIT_0(probLen)
- {
- UPDATE_0(probLen);
- probLen = prob + LenMid + (posState << kLenNumMidBits);
- offset = kLenNumLowSymbols;
- limit = (1 << kLenNumMidBits);
- }
- else
- {
- UPDATE_1(probLen);
- probLen = prob + LenHigh;
- offset = kLenNumLowSymbols + kLenNumMidSymbols;
- limit = (1 << kLenNumHighBits);
- }
- }
- TREE_DECODE(probLen, limit, len);
- len += offset;
- }
-
- if (state >= kNumStates)
- {
- UInt32 distance;
- prob = probs + PosSlot +
- ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits);
- TREE_6_DECODE(prob, distance);
- if (distance >= kStartPosModelIndex)
- {
- unsigned posSlot = (unsigned)distance;
- int numDirectBits = (int)(((distance >> 1) - 1));
- distance = (2 | (distance & 1));
- if (posSlot < kEndPosModelIndex)
- {
- distance <<= numDirectBits;
- prob = probs + SpecPos + distance - posSlot - 1;
- {
- UInt32 mask = 1;
- unsigned i = 1;
- do
- {
- GET_BIT2(prob + i, i, ; , distance |= mask);
- mask <<= 1;
- }
- while (--numDirectBits != 0);
- }
- }
- else
- {
- numDirectBits -= kNumAlignBits;
- do
- {
- NORMALIZE
- range >>= 1;
-
- {
- UInt32 t;
- code -= range;
- t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */
- distance = (distance << 1) + (t + 1);
- code += range & t;
- }
- /*
- distance <<= 1;
- if (code >= range)
- {
- code -= range;
- distance |= 1;
- }
- */
- }
- while (--numDirectBits != 0);
- prob = probs + Align;
- distance <<= kNumAlignBits;
- {
- unsigned i = 1;
- GET_BIT2(prob + i, i, ; , distance |= 1);
- GET_BIT2(prob + i, i, ; , distance |= 2);
- GET_BIT2(prob + i, i, ; , distance |= 4);
- GET_BIT2(prob + i, i, ; , distance |= 8);
- }
- if (distance == (UInt32)0xFFFFFFFF)
- {
- len += kMatchSpecLenStart;
- state -= kNumStates;
- break;
- }
- }
- }
- rep3 = rep2;
- rep2 = rep1;
- rep1 = rep0;
- rep0 = distance + 1;
- if (checkDicSize == 0)
- {
- if (distance >= processedPos)
- return SZ_ERROR_DATA;
- }
- else if (distance >= checkDicSize)
- return SZ_ERROR_DATA;
- state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3;
- }
-
- len += kMatchMinLen;
-
- if (limit == dicPos)
- return SZ_ERROR_DATA;
- {
- SizeT rem = limit - dicPos;
- unsigned curLen = ((rem < len) ? (unsigned)rem : len);
- SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0);
-
- processedPos += curLen;
-
- len -= curLen;
- if (pos + curLen <= dicBufSize)
- {
- Byte *dest = dic + dicPos;
- ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos;
- const Byte *lim = dest + curLen;
- dicPos += curLen;
- do
- *(dest) = (Byte)*(dest + src);
- while (++dest != lim);
- }
- else
- {
- do
- {
- dic[dicPos++] = dic[pos];
- if (++pos == dicBufSize)
- pos = 0;
- }
- while (--curLen != 0);
- }
- }
- }
- }
- while (dicPos < limit && buf < bufLimit);
- NORMALIZE;
- p->buf = buf;
- p->range = range;
- p->code = code;
- p->remainLen = len;
- p->dicPos = dicPos;
- p->processedPos = processedPos;
- p->reps[0] = rep0;
- p->reps[1] = rep1;
- p->reps[2] = rep2;
- p->reps[3] = rep3;
- p->state = state;
-
- return SZ_OK;
+ CLzmaProb *probs = p->probs;
+
+ unsigned state = p->state;
+ UInt32 rep0 = p->reps[0], rep1 = p->reps[1], rep2 = p->reps[2], rep3 = p->reps[3];
+ unsigned pbMask = ((unsigned)1 << (p->prop.pb)) - 1;
+ unsigned lpMask = ((unsigned)1 << (p->prop.lp)) - 1;
+ unsigned lc = p->prop.lc;
+
+ Byte *dic = p->dic;
+ SizeT dicBufSize = p->dicBufSize;
+ SizeT dicPos = p->dicPos;
+
+ UInt32 processedPos = p->processedPos;
+ UInt32 checkDicSize = p->checkDicSize;
+ unsigned len = 0;
+
+ const Byte *buf = p->buf;
+ UInt32 range = p->range;
+ UInt32 code = p->code;
+
+ do
+ {
+ CLzmaProb *prob;
+ UInt32 bound;
+ unsigned ttt;
+ unsigned posState = processedPos & pbMask;
+
+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
+ IF_BIT_0(prob)
+ {
+ unsigned symbol;
+ UPDATE_0(prob);
+ prob = probs + Literal;
+ if (checkDicSize != 0 || processedPos != 0)
+ prob += (LZMA_LIT_SIZE * (((processedPos & lpMask) << lc) +
+ (dic[(dicPos == 0 ? dicBufSize : dicPos) - 1] >> (8 - lc))));
+
+ if (state < kNumLitStates)
+ {
+ state -= (state < 4) ? state : 3;
+ symbol = 1;
+ do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100);
+ }
+ else
+ {
+ unsigned matchByte = p->dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
+ unsigned offs = 0x100;
+ state -= (state < 10) ? 3 : 6;
+ symbol = 1;
+ do
+ {
+ unsigned bit;
+ CLzmaProb *probLit;
+ matchByte <<= 1;
+ bit = (matchByte & offs);
+ probLit = prob + offs + bit + symbol;
+ GET_BIT2(probLit, symbol, offs &= ~bit, offs &= bit)
+ }
+ while (symbol < 0x100);
+ }
+ dic[dicPos++] = (Byte)symbol;
+ processedPos++;
+ continue;
+ }
+ else
+ {
+ UPDATE_1(prob);
+ prob = probs + IsRep + state;
+ IF_BIT_0(prob)
+ {
+ UPDATE_0(prob);
+ state += kNumStates;
+ prob = probs + LenCoder;
+ }
+ else
+ {
+ UPDATE_1(prob);
+ if (checkDicSize == 0 && processedPos == 0)
+ return SZ_ERROR_DATA;
+ prob = probs + IsRepG0 + state;
+ IF_BIT_0(prob)
+ {
+ UPDATE_0(prob);
+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
+ IF_BIT_0(prob)
+ {
+ UPDATE_0(prob);
+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
+ dicPos++;
+ processedPos++;
+ state = state < kNumLitStates ? 9 : 11;
+ continue;
+ }
+ UPDATE_1(prob);
+ }
+ else
+ {
+ UInt32 distance;
+ UPDATE_1(prob);
+ prob = probs + IsRepG1 + state;
+ IF_BIT_0(prob)
+ {
+ UPDATE_0(prob);
+ distance = rep1;
+ }
+ else
+ {
+ UPDATE_1(prob);
+ prob = probs + IsRepG2 + state;
+ IF_BIT_0(prob)
+ {
+ UPDATE_0(prob);
+ distance = rep2;
+ }
+ else
+ {
+ UPDATE_1(prob);
+ distance = rep3;
+ rep3 = rep2;
+ }
+ rep2 = rep1;
+ }
+ rep1 = rep0;
+ rep0 = distance;
+ }
+ state = state < kNumLitStates ? 8 : 11;
+ prob = probs + RepLenCoder;
+ }
+ {
+ unsigned limit, offset;
+ CLzmaProb *probLen = prob + LenChoice;
+ IF_BIT_0(probLen)
+ {
+ UPDATE_0(probLen);
+ probLen = prob + LenLow + (posState << kLenNumLowBits);
+ offset = 0;
+ limit = (1 << kLenNumLowBits);
+ }
+ else
+ {
+ UPDATE_1(probLen);
+ probLen = prob + LenChoice2;
+ IF_BIT_0(probLen)
+ {
+ UPDATE_0(probLen);
+ probLen = prob + LenMid + (posState << kLenNumMidBits);
+ offset = kLenNumLowSymbols;
+ limit = (1 << kLenNumMidBits);
+ }
+ else
+ {
+ UPDATE_1(probLen);
+ probLen = prob + LenHigh;
+ offset = kLenNumLowSymbols + kLenNumMidSymbols;
+ limit = (1 << kLenNumHighBits);
+ }
+ }
+ TREE_DECODE(probLen, limit, len);
+ len += offset;
+ }
+
+ if (state >= kNumStates)
+ {
+ UInt32 distance;
+ prob = probs + PosSlot +
+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) << kNumPosSlotBits);
+ TREE_6_DECODE(prob, distance);
+ if (distance >= kStartPosModelIndex)
+ {
+ unsigned posSlot = (unsigned)distance;
+ int numDirectBits = (int)(((distance >> 1) - 1));
+ distance = (2 | (distance & 1));
+ if (posSlot < kEndPosModelIndex)
+ {
+ distance <<= numDirectBits;
+ prob = probs + SpecPos + distance - posSlot - 1;
+ {
+ UInt32 mask = 1;
+ unsigned i = 1;
+ do
+ {
+ GET_BIT2(prob + i, i, ; , distance |= mask);
+ mask <<= 1;
+ }
+ while (--numDirectBits != 0);
+ }
+ }
+ else
+ {
+ numDirectBits -= kNumAlignBits;
+ do
+ {
+ NORMALIZE
+ range >>= 1;
+
+ {
+ UInt32 t;
+ code -= range;
+ t = (0 - ((UInt32)code >> 31)); /* (UInt32)((Int32)code >> 31) */
+ distance = (distance << 1) + (t + 1);
+ code += range & t;
+ }
+ /*
+ distance <<= 1;
+ if (code >= range)
+ {
+ code -= range;
+ distance |= 1;
+ }
+ */
+ }
+ while (--numDirectBits != 0);
+ prob = probs + Align;
+ distance <<= kNumAlignBits;
+ {
+ unsigned i = 1;
+ GET_BIT2(prob + i, i, ; , distance |= 1);
+ GET_BIT2(prob + i, i, ; , distance |= 2);
+ GET_BIT2(prob + i, i, ; , distance |= 4);
+ GET_BIT2(prob + i, i, ; , distance |= 8);
+ }
+ if (distance == (UInt32)0xFFFFFFFF)
+ {
+ len += kMatchSpecLenStart;
+ state -= kNumStates;
+ break;
+ }
+ }
+ }
+ rep3 = rep2;
+ rep2 = rep1;
+ rep1 = rep0;
+ rep0 = distance + 1;
+ if (checkDicSize == 0)
+ {
+ if (distance >= processedPos)
+ return SZ_ERROR_DATA;
+ }
+ else if (distance >= checkDicSize)
+ return SZ_ERROR_DATA;
+ state = (state < kNumStates + kNumLitStates) ? kNumLitStates : kNumLitStates + 3;
+ }
+
+ len += kMatchMinLen;
+
+ if (limit == dicPos)
+ return SZ_ERROR_DATA;
+ {
+ SizeT rem = limit - dicPos;
+ unsigned curLen = ((rem < len) ? (unsigned)rem : len);
+ SizeT pos = (dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0);
+
+ processedPos += curLen;
+
+ len -= curLen;
+ if (pos + curLen <= dicBufSize)
+ {
+ Byte *dest = dic + dicPos;
+ ptrdiff_t src = (ptrdiff_t)pos - (ptrdiff_t)dicPos;
+ const Byte *lim = dest + curLen;
+ dicPos += curLen;
+ do
+ *(dest) = (Byte)*(dest + src);
+ while (++dest != lim);
+ }
+ else
+ {
+ do
+ {
+ dic[dicPos++] = dic[pos];
+ if (++pos == dicBufSize)
+ pos = 0;
+ }
+ while (--curLen != 0);
+ }
+ }
+ }
+ }
+ while (dicPos < limit && buf < bufLimit);
+ NORMALIZE;
+ p->buf = buf;
+ p->range = range;
+ p->code = code;
+ p->remainLen = len;
+ p->dicPos = dicPos;
+ p->processedPos = processedPos;
+ p->reps[0] = rep0;
+ p->reps[1] = rep1;
+ p->reps[2] = rep2;
+ p->reps[3] = rep3;
+ p->state = state;
+
+ return SZ_OK;
}
static void MY_FAST_CALL LzmaDec_WriteRem(CLzmaDec *p, SizeT limit)
{
- if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart)
- {
- Byte *dic = p->dic;
- SizeT dicPos = p->dicPos;
- SizeT dicBufSize = p->dicBufSize;
- unsigned len = p->remainLen;
- UInt32 rep0 = p->reps[0];
- if (limit - dicPos < len)
- len = (unsigned)(limit - dicPos);
-
- if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len)
- p->checkDicSize = p->prop.dicSize;
-
- p->processedPos += len;
- p->remainLen -= len;
- while (len != 0)
- {
- len--;
- dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
- dicPos++;
- }
- p->dicPos = dicPos;
- }
+ if (p->remainLen != 0 && p->remainLen < kMatchSpecLenStart)
+ {
+ Byte *dic = p->dic;
+ SizeT dicPos = p->dicPos;
+ SizeT dicBufSize = p->dicBufSize;
+ unsigned len = p->remainLen;
+ UInt32 rep0 = p->reps[0];
+ if (limit - dicPos < len)
+ len = (unsigned)(limit - dicPos);
+
+ if (p->checkDicSize == 0 && p->prop.dicSize - p->processedPos <= len)
+ p->checkDicSize = p->prop.dicSize;
+
+ p->processedPos += len;
+ p->remainLen -= len;
+ while (len != 0)
+ {
+ len--;
+ dic[dicPos] = dic[(dicPos - rep0) + ((dicPos < rep0) ? dicBufSize : 0)];
+ dicPos++;
+ }
+ p->dicPos = dicPos;
+ }
}
static int MY_FAST_CALL LzmaDec_DecodeReal2(CLzmaDec *p, SizeT limit, const Byte *bufLimit)
{
- do
- {
- SizeT limit2 = limit;
- if (p->checkDicSize == 0)
- {
- UInt32 rem = p->prop.dicSize - p->processedPos;
- if (limit - p->dicPos > rem)
- limit2 = p->dicPos + rem;
- }
- RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit));
- if (p->processedPos >= p->prop.dicSize)
- p->checkDicSize = p->prop.dicSize;
- LzmaDec_WriteRem(p, limit);
- }
- while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart);
-
- if (p->remainLen > kMatchSpecLenStart)
- {
- p->remainLen = kMatchSpecLenStart;
- }
- return 0;
+ do
+ {
+ SizeT limit2 = limit;
+ if (p->checkDicSize == 0)
+ {
+ UInt32 rem = p->prop.dicSize - p->processedPos;
+ if (limit - p->dicPos > rem)
+ limit2 = p->dicPos + rem;
+ }
+ RINOK(LzmaDec_DecodeReal(p, limit2, bufLimit));
+ if (p->processedPos >= p->prop.dicSize)
+ p->checkDicSize = p->prop.dicSize;
+ LzmaDec_WriteRem(p, limit);
+ }
+ while (p->dicPos < limit && p->buf < bufLimit && p->remainLen < kMatchSpecLenStart);
+
+ if (p->remainLen > kMatchSpecLenStart)
+ {
+ p->remainLen = kMatchSpecLenStart;
+ }
+ return 0;
}
typedef enum
{
- DUMMY_ERROR, /* unexpected end of input stream */
- DUMMY_LIT,
- DUMMY_MATCH,
- DUMMY_REP
+ DUMMY_ERROR, /* unexpected end of input stream */
+ DUMMY_LIT,
+ DUMMY_MATCH,
+ DUMMY_REP
} ELzmaDummy;
static ELzmaDummy LzmaDec_TryDummy(const CLzmaDec *p, const Byte *buf, SizeT inSize)
{
- UInt32 range = p->range;
- UInt32 code = p->code;
- const Byte *bufLimit = buf + inSize;
- CLzmaProb *probs = p->probs;
- unsigned state = p->state;
- ELzmaDummy res;
-
- {
- CLzmaProb *prob;
- UInt32 bound;
- unsigned ttt;
- unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1);
-
- prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
- IF_BIT_0_CHECK(prob)
- {
- UPDATE_0_CHECK
-
- /* if (bufLimit - buf >= 7) return DUMMY_LIT; */
-
- prob = probs + Literal;
- if (p->checkDicSize != 0 || p->processedPos != 0)
- prob += (LZMA_LIT_SIZE *
- ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) +
- (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc))));
-
- if (state < kNumLitStates)
- {
- unsigned symbol = 1;
- do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100);
- }
- else
- {
- unsigned matchByte = p->dic[p->dicPos - p->reps[0] +
- ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)];
- unsigned offs = 0x100;
- unsigned symbol = 1;
- do
- {
- unsigned bit;
- CLzmaProb *probLit;
- matchByte <<= 1;
- bit = (matchByte & offs);
- probLit = prob + offs + bit + symbol;
- GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit)
- }
- while (symbol < 0x100);
- }
- res = DUMMY_LIT;
- }
- else
- {
- unsigned len;
- UPDATE_1_CHECK;
-
- prob = probs + IsRep + state;
- IF_BIT_0_CHECK(prob)
- {
- UPDATE_0_CHECK;
- state = 0;
- prob = probs + LenCoder;
- res = DUMMY_MATCH;
- }
- else
- {
- UPDATE_1_CHECK;
- res = DUMMY_REP;
- prob = probs + IsRepG0 + state;
- IF_BIT_0_CHECK(prob)
- {
- UPDATE_0_CHECK;
- prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
- IF_BIT_0_CHECK(prob)
- {
- UPDATE_0_CHECK;
- NORMALIZE_CHECK;
- return DUMMY_REP;
- }
- else
- {
- UPDATE_1_CHECK;
- }
- }
- else
- {
- UPDATE_1_CHECK;
- prob = probs + IsRepG1 + state;
- IF_BIT_0_CHECK(prob)
- {
- UPDATE_0_CHECK;
- }
- else
- {
- UPDATE_1_CHECK;
- prob = probs + IsRepG2 + state;
- IF_BIT_0_CHECK(prob)
- {
- UPDATE_0_CHECK;
- }
- else
- {
- UPDATE_1_CHECK;
- }
- }
- }
- state = kNumStates;
- prob = probs + RepLenCoder;
- }
- {
- unsigned limit, offset;
- CLzmaProb *probLen = prob + LenChoice;
- IF_BIT_0_CHECK(probLen)
- {
- UPDATE_0_CHECK;
- probLen = prob + LenLow + (posState << kLenNumLowBits);
- offset = 0;
- limit = 1 << kLenNumLowBits;
- }
- else
- {
- UPDATE_1_CHECK;
- probLen = prob + LenChoice2;
- IF_BIT_0_CHECK(probLen)
- {
- UPDATE_0_CHECK;
- probLen = prob + LenMid + (posState << kLenNumMidBits);
- offset = kLenNumLowSymbols;
- limit = 1 << kLenNumMidBits;
- }
- else
- {
- UPDATE_1_CHECK;
- probLen = prob + LenHigh;
- offset = kLenNumLowSymbols + kLenNumMidSymbols;
- limit = 1 << kLenNumHighBits;
- }
- }
- TREE_DECODE_CHECK(probLen, limit, len);
- len += offset;
- }
-
- if (state < 4)
- {
- unsigned posSlot;
- prob = probs + PosSlot +
- ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
- kNumPosSlotBits);
- TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot);
- if (posSlot >= kStartPosModelIndex)
- {
- int numDirectBits = ((posSlot >> 1) - 1);
-
- /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */
-
- if (posSlot < kEndPosModelIndex)
- {
- prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1;
- }
- else
- {
- numDirectBits -= kNumAlignBits;
- do
- {
- NORMALIZE_CHECK
- range >>= 1;
- code -= range & (((code - range) >> 31) - 1);
- /* if (code >= range) code -= range; */
- }
- while (--numDirectBits != 0);
- prob = probs + Align;
- numDirectBits = kNumAlignBits;
- }
- {
- unsigned i = 1;
- do
- {
- GET_BIT_CHECK(prob + i, i);
- }
- while (--numDirectBits != 0);
- }
- }
- }
- }
- }
- NORMALIZE_CHECK;
- return res;
+ UInt32 range = p->range;
+ UInt32 code = p->code;
+ const Byte *bufLimit = buf + inSize;
+ CLzmaProb *probs = p->probs;
+ unsigned state = p->state;
+ ELzmaDummy res;
+
+ {
+ CLzmaProb *prob;
+ UInt32 bound;
+ unsigned ttt;
+ unsigned posState = (p->processedPos) & ((1 << p->prop.pb) - 1);
+
+ prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
+ IF_BIT_0_CHECK(prob)
+ {
+ UPDATE_0_CHECK
+
+ /* if (bufLimit - buf >= 7) return DUMMY_LIT; */
+
+ prob = probs + Literal;
+ if (p->checkDicSize != 0 || p->processedPos != 0)
+ prob += (LZMA_LIT_SIZE *
+ ((((p->processedPos) & ((1 << (p->prop.lp)) - 1)) << p->prop.lc) +
+ (p->dic[(p->dicPos == 0 ? p->dicBufSize : p->dicPos) - 1] >> (8 - p->prop.lc))));
+
+ if (state < kNumLitStates)
+ {
+ unsigned symbol = 1;
+ do { GET_BIT_CHECK(prob + symbol, symbol) } while (symbol < 0x100);
+ }
+ else
+ {
+ unsigned matchByte = p->dic[p->dicPos - p->reps[0] +
+ ((p->dicPos < p->reps[0]) ? p->dicBufSize : 0)];
+ unsigned offs = 0x100;
+ unsigned symbol = 1;
+ do
+ {
+ unsigned bit;
+ CLzmaProb *probLit;
+ matchByte <<= 1;
+ bit = (matchByte & offs);
+ probLit = prob + offs + bit + symbol;
+ GET_BIT2_CHECK(probLit, symbol, offs &= ~bit, offs &= bit)
+ }
+ while (symbol < 0x100);
+ }
+ res = DUMMY_LIT;
+ }
+ else
+ {
+ unsigned len;
+ UPDATE_1_CHECK;
+
+ prob = probs + IsRep + state;
+ IF_BIT_0_CHECK(prob)
+ {
+ UPDATE_0_CHECK;
+ state = 0;
+ prob = probs + LenCoder;
+ res = DUMMY_MATCH;
+ }
+ else
+ {
+ UPDATE_1_CHECK;
+ res = DUMMY_REP;
+ prob = probs + IsRepG0 + state;
+ IF_BIT_0_CHECK(prob)
+ {
+ UPDATE_0_CHECK;
+ prob = probs + IsRep0Long + (state << kNumPosBitsMax) + posState;
+ IF_BIT_0_CHECK(prob)
+ {
+ UPDATE_0_CHECK;
+ NORMALIZE_CHECK;
+ return DUMMY_REP;
+ }
+ else
+ {
+ UPDATE_1_CHECK;
+ }
+ }
+ else
+ {
+ UPDATE_1_CHECK;
+ prob = probs + IsRepG1 + state;
+ IF_BIT_0_CHECK(prob)
+ {
+ UPDATE_0_CHECK;
+ }
+ else
+ {
+ UPDATE_1_CHECK;
+ prob = probs + IsRepG2 + state;
+ IF_BIT_0_CHECK(prob)
+ {
+ UPDATE_0_CHECK;
+ }
+ else
+ {
+ UPDATE_1_CHECK;
+ }
+ }
+ }
+ state = kNumStates;
+ prob = probs + RepLenCoder;
+ }
+ {
+ unsigned limit, offset;
+ CLzmaProb *probLen = prob + LenChoice;
+ IF_BIT_0_CHECK(probLen)
+ {
+ UPDATE_0_CHECK;
+ probLen = prob + LenLow + (posState << kLenNumLowBits);
+ offset = 0;
+ limit = 1 << kLenNumLowBits;
+ }
+ else
+ {
+ UPDATE_1_CHECK;
+ probLen = prob + LenChoice2;
+ IF_BIT_0_CHECK(probLen)
+ {
+ UPDATE_0_CHECK;
+ probLen = prob + LenMid + (posState << kLenNumMidBits);
+ offset = kLenNumLowSymbols;
+ limit = 1 << kLenNumMidBits;
+ }
+ else
+ {
+ UPDATE_1_CHECK;
+ probLen = prob + LenHigh;
+ offset = kLenNumLowSymbols + kLenNumMidSymbols;
+ limit = 1 << kLenNumHighBits;
+ }
+ }
+ TREE_DECODE_CHECK(probLen, limit, len);
+ len += offset;
+ }
+
+ if (state < 4)
+ {
+ unsigned posSlot;
+ prob = probs + PosSlot +
+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
+ kNumPosSlotBits);
+ TREE_DECODE_CHECK(prob, 1 << kNumPosSlotBits, posSlot);
+ if (posSlot >= kStartPosModelIndex)
+ {
+ int numDirectBits = ((posSlot >> 1) - 1);
+
+ /* if (bufLimit - buf >= 8) return DUMMY_MATCH; */
+
+ if (posSlot < kEndPosModelIndex)
+ {
+ prob = probs + SpecPos + ((2 | (posSlot & 1)) << numDirectBits) - posSlot - 1;
+ }
+ else
+ {
+ numDirectBits -= kNumAlignBits;
+ do
+ {
+ NORMALIZE_CHECK
+ range >>= 1;
+ code -= range & (((code - range) >> 31) - 1);
+ /* if (code >= range) code -= range; */
+ }
+ while (--numDirectBits != 0);
+ prob = probs + Align;
+ numDirectBits = kNumAlignBits;
+ }
+ {
+ unsigned i = 1;
+ do
+ {
+ GET_BIT_CHECK(prob + i, i);
+ }
+ while (--numDirectBits != 0);
+ }
+ }
+ }
+ }
+ }
+ NORMALIZE_CHECK;
+ return res;
}
static void LzmaDec_InitRc(CLzmaDec *p, const Byte *data)
{
- p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]);
- p->range = 0xFFFFFFFF;
- p->needFlush = 0;
+ p->code = ((UInt32)data[1] << 24) | ((UInt32)data[2] << 16) | ((UInt32)data[3] << 8) | ((UInt32)data[4]);
+ p->range = 0xFFFFFFFF;
+ p->needFlush = 0;
}
void LzmaDec_InitDicAndState(CLzmaDec *p, Bool initDic, Bool initState)
{
- p->needFlush = 1;
- p->remainLen = 0;
- p->tempBufSize = 0;
-
- if (initDic)
- {
- p->processedPos = 0;
- p->checkDicSize = 0;
- p->needInitState = 1;
- }
- if (initState)
- p->needInitState = 1;
+ p->needFlush = 1;
+ p->remainLen = 0;
+ p->tempBufSize = 0;
+
+ if (initDic)
+ {
+ p->processedPos = 0;
+ p->checkDicSize = 0;
+ p->needInitState = 1;
+ }
+ if (initState)
+ p->needInitState = 1;
}
void LzmaDec_Init(CLzmaDec *p)
{
- p->dicPos = 0;
- LzmaDec_InitDicAndState(p, True, True);
+ p->dicPos = 0;
+ LzmaDec_InitDicAndState(p, True, True);
}
static void LzmaDec_InitStateReal(CLzmaDec *p)
{
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp));
- UInt32 i;
- CLzmaProb *probs = p->probs;
- for (i = 0; i < numProbs; i++)
- probs[i] = kBitModelTotal >> 1;
- p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1;
- p->state = 0;
- p->needInitState = 0;
+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (p->prop.lc + p->prop.lp));
+ UInt32 i;
+ CLzmaProb *probs = p->probs;
+ for (i = 0; i < numProbs; i++)
+ probs[i] = kBitModelTotal >> 1;
+ p->reps[0] = p->reps[1] = p->reps[2] = p->reps[3] = 1;
+ p->state = 0;
+ p->needInitState = 0;
}
SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *srcLen,
- ELzmaFinishMode finishMode, ELzmaStatus *status)
+ ELzmaFinishMode finishMode, ELzmaStatus *status)
{
- SizeT inSize = *srcLen;
- (*srcLen) = 0;
- LzmaDec_WriteRem(p, dicLimit);
-
- *status = LZMA_STATUS_NOT_SPECIFIED;
-
- while (p->remainLen != kMatchSpecLenStart)
- {
- int checkEndMarkNow;
-
- if (p->needFlush != 0)
- {
- for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--)
- p->tempBuf[p->tempBufSize++] = *src++;
- if (p->tempBufSize < RC_INIT_SIZE)
- {
- *status = LZMA_STATUS_NEEDS_MORE_INPUT;
- return SZ_OK;
- }
- if (p->tempBuf[0] != 0)
- return SZ_ERROR_DATA;
-
- LzmaDec_InitRc(p, p->tempBuf);
- p->tempBufSize = 0;
- }
-
- checkEndMarkNow = 0;
- if (p->dicPos >= dicLimit)
- {
- if (p->remainLen == 0 && p->code == 0)
- {
- *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK;
- return SZ_OK;
- }
- if (finishMode == LZMA_FINISH_ANY)
- {
- *status = LZMA_STATUS_NOT_FINISHED;
- return SZ_OK;
- }
- if (p->remainLen != 0)
- {
- *status = LZMA_STATUS_NOT_FINISHED;
- return SZ_ERROR_DATA;
- }
- checkEndMarkNow = 1;
- }
-
- if (p->needInitState)
- LzmaDec_InitStateReal(p);
-
- if (p->tempBufSize == 0)
- {
- SizeT processed;
- const Byte *bufLimit;
- if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
- {
- int dummyRes = LzmaDec_TryDummy(p, src, inSize);
- if (dummyRes == DUMMY_ERROR)
- {
- memcpy(p->tempBuf, src, inSize);
- p->tempBufSize = (unsigned)inSize;
- (*srcLen) += inSize;
- *status = LZMA_STATUS_NEEDS_MORE_INPUT;
- return SZ_OK;
- }
- if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
- {
- *status = LZMA_STATUS_NOT_FINISHED;
- return SZ_ERROR_DATA;
- }
- bufLimit = src;
- }
- else
- bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX;
- p->buf = src;
- if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0)
- return SZ_ERROR_DATA;
- processed = (SizeT)(p->buf - src);
- (*srcLen) += processed;
- src += processed;
- inSize -= processed;
- }
- else
- {
- unsigned rem = p->tempBufSize, lookAhead = 0;
- while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize)
- p->tempBuf[rem++] = src[lookAhead++];
- p->tempBufSize = rem;
- if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
- {
- int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem);
- if (dummyRes == DUMMY_ERROR)
- {
- (*srcLen) += lookAhead;
- *status = LZMA_STATUS_NEEDS_MORE_INPUT;
- return SZ_OK;
- }
- if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
- {
- *status = LZMA_STATUS_NOT_FINISHED;
- return SZ_ERROR_DATA;
- }
- }
- p->buf = p->tempBuf;
- if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0)
- return SZ_ERROR_DATA;
- lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf));
- (*srcLen) += lookAhead;
- src += lookAhead;
- inSize -= lookAhead;
- p->tempBufSize = 0;
- }
- }
- if (p->code == 0)
- *status = LZMA_STATUS_FINISHED_WITH_MARK;
- return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
+ SizeT inSize = *srcLen;
+ (*srcLen) = 0;
+ LzmaDec_WriteRem(p, dicLimit);
+
+ *status = LZMA_STATUS_NOT_SPECIFIED;
+
+ while (p->remainLen != kMatchSpecLenStart)
+ {
+ int checkEndMarkNow;
+
+ if (p->needFlush != 0)
+ {
+ for (; inSize > 0 && p->tempBufSize < RC_INIT_SIZE; (*srcLen)++, inSize--)
+ p->tempBuf[p->tempBufSize++] = *src++;
+ if (p->tempBufSize < RC_INIT_SIZE)
+ {
+ *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+ return SZ_OK;
+ }
+ if (p->tempBuf[0] != 0)
+ return SZ_ERROR_DATA;
+
+ LzmaDec_InitRc(p, p->tempBuf);
+ p->tempBufSize = 0;
+ }
+
+ checkEndMarkNow = 0;
+ if (p->dicPos >= dicLimit)
+ {
+ if (p->remainLen == 0 && p->code == 0)
+ {
+ *status = LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK;
+ return SZ_OK;
+ }
+ if (finishMode == LZMA_FINISH_ANY)
+ {
+ *status = LZMA_STATUS_NOT_FINISHED;
+ return SZ_OK;
+ }
+ if (p->remainLen != 0)
+ {
+ *status = LZMA_STATUS_NOT_FINISHED;
+ return SZ_ERROR_DATA;
+ }
+ checkEndMarkNow = 1;
+ }
+
+ if (p->needInitState)
+ LzmaDec_InitStateReal(p);
+
+ if (p->tempBufSize == 0)
+ {
+ SizeT processed;
+ const Byte *bufLimit;
+ if (inSize < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
+ {
+ int dummyRes = LzmaDec_TryDummy(p, src, inSize);
+ if (dummyRes == DUMMY_ERROR)
+ {
+ memcpy(p->tempBuf, src, inSize);
+ p->tempBufSize = (unsigned)inSize;
+ (*srcLen) += inSize;
+ *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+ return SZ_OK;
+ }
+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
+ {
+ *status = LZMA_STATUS_NOT_FINISHED;
+ return SZ_ERROR_DATA;
+ }
+ bufLimit = src;
+ }
+ else
+ bufLimit = src + inSize - LZMA_REQUIRED_INPUT_MAX;
+ p->buf = src;
+ if (LzmaDec_DecodeReal2(p, dicLimit, bufLimit) != 0)
+ return SZ_ERROR_DATA;
+ processed = (SizeT)(p->buf - src);
+ (*srcLen) += processed;
+ src += processed;
+ inSize -= processed;
+ }
+ else
+ {
+ unsigned rem = p->tempBufSize, lookAhead = 0;
+ while (rem < LZMA_REQUIRED_INPUT_MAX && lookAhead < inSize)
+ p->tempBuf[rem++] = src[lookAhead++];
+ p->tempBufSize = rem;
+ if (rem < LZMA_REQUIRED_INPUT_MAX || checkEndMarkNow)
+ {
+ int dummyRes = LzmaDec_TryDummy(p, p->tempBuf, rem);
+ if (dummyRes == DUMMY_ERROR)
+ {
+ (*srcLen) += lookAhead;
+ *status = LZMA_STATUS_NEEDS_MORE_INPUT;
+ return SZ_OK;
+ }
+ if (checkEndMarkNow && dummyRes != DUMMY_MATCH)
+ {
+ *status = LZMA_STATUS_NOT_FINISHED;
+ return SZ_ERROR_DATA;
+ }
+ }
+ p->buf = p->tempBuf;
+ if (LzmaDec_DecodeReal2(p, dicLimit, p->buf) != 0)
+ return SZ_ERROR_DATA;
+ lookAhead -= (rem - (unsigned)(p->buf - p->tempBuf));
+ (*srcLen) += lookAhead;
+ src += lookAhead;
+ inSize -= lookAhead;
+ p->tempBufSize = 0;
+ }
+ }
+ if (p->code == 0)
+ *status = LZMA_STATUS_FINISHED_WITH_MARK;
+ return (p->code == 0) ? SZ_OK : SZ_ERROR_DATA;
}
SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status)
{
- SizeT outSize = *destLen;
- SizeT inSize = *srcLen;
- *srcLen = *destLen = 0;
- for (;;)
- {
- SizeT inSizeCur = inSize, outSizeCur, dicPos;
- ELzmaFinishMode curFinishMode;
- SRes res;
- if (p->dicPos == p->dicBufSize)
- p->dicPos = 0;
- dicPos = p->dicPos;
- if (outSize > p->dicBufSize - dicPos)
- {
- outSizeCur = p->dicBufSize;
- curFinishMode = LZMA_FINISH_ANY;
- }
- else
- {
- outSizeCur = dicPos + outSize;
- curFinishMode = finishMode;
- }
-
- res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
- src += inSizeCur;
- inSize -= inSizeCur;
- *srcLen += inSizeCur;
- outSizeCur = p->dicPos - dicPos;
- memcpy(dest, p->dic + dicPos, outSizeCur);
- dest += outSizeCur;
- outSize -= outSizeCur;
- *destLen += outSizeCur;
- if (res != 0)
- return res;
- if (outSizeCur == 0 || outSize == 0)
- return SZ_OK;
- }
+ SizeT outSize = *destLen;
+ SizeT inSize = *srcLen;
+ *srcLen = *destLen = 0;
+ for (;;)
+ {
+ SizeT inSizeCur = inSize, outSizeCur, dicPos;
+ ELzmaFinishMode curFinishMode;
+ SRes res;
+ if (p->dicPos == p->dicBufSize)
+ p->dicPos = 0;
+ dicPos = p->dicPos;
+ if (outSize > p->dicBufSize - dicPos)
+ {
+ outSizeCur = p->dicBufSize;
+ curFinishMode = LZMA_FINISH_ANY;
+ }
+ else
+ {
+ outSizeCur = dicPos + outSize;
+ curFinishMode = finishMode;
+ }
+
+ res = LzmaDec_DecodeToDic(p, outSizeCur, src, &inSizeCur, curFinishMode, status);
+ src += inSizeCur;
+ inSize -= inSizeCur;
+ *srcLen += inSizeCur;
+ outSizeCur = p->dicPos - dicPos;
+ memcpy(dest, p->dic + dicPos, outSizeCur);
+ dest += outSizeCur;
+ outSize -= outSizeCur;
+ *destLen += outSizeCur;
+ if (res != 0)
+ return res;
+ if (outSizeCur == 0 || outSize == 0)
+ return SZ_OK;
+ }
}
void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->probs);
- p->probs = 0;
+ alloc->Free(alloc, p->probs);
+ p->probs = 0;
}
static void LzmaDec_FreeDict(CLzmaDec *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->dic);
- p->dic = 0;
+ alloc->Free(alloc, p->dic);
+ p->dic = 0;
}
void LzmaDec_Free(CLzmaDec *p, ISzAlloc *alloc)
{
- LzmaDec_FreeProbs(p, alloc);
- LzmaDec_FreeDict(p, alloc);
+ LzmaDec_FreeProbs(p, alloc);
+ LzmaDec_FreeDict(p, alloc);
}
SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size)
{
- UInt32 dicSize;
- Byte d;
+ UInt32 dicSize;
+ Byte d;
- if (size < LZMA_PROPS_SIZE)
- return SZ_ERROR_UNSUPPORTED;
- else
- dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24);
+ if (size < LZMA_PROPS_SIZE)
+ return SZ_ERROR_UNSUPPORTED;
+ else
+ dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24);
- if (dicSize < LZMA_DIC_MIN)
- dicSize = LZMA_DIC_MIN;
- p->dicSize = dicSize;
+ if (dicSize < LZMA_DIC_MIN)
+ dicSize = LZMA_DIC_MIN;
+ p->dicSize = dicSize;
- d = data[0];
- if (d >= (9 * 5 * 5))
- return SZ_ERROR_UNSUPPORTED;
+ d = data[0];
+ if (d >= (9 * 5 * 5))
+ return SZ_ERROR_UNSUPPORTED;
- p->lc = d % 9;
- d /= 9;
- p->pb = d / 5;
- p->lp = d % 5;
+ p->lc = d % 9;
+ d /= 9;
+ p->pb = d / 5;
+ p->lp = d % 5;
- return SZ_OK;
+ return SZ_OK;
}
static SRes LzmaDec_AllocateProbs2(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc)
{
- UInt32 numProbs = LzmaProps_GetNumProbs(propNew);
- if (p->probs == 0 || numProbs != p->numProbs)
- {
- LzmaDec_FreeProbs(p, alloc);
- p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb));
- p->numProbs = numProbs;
- if (p->probs == 0)
- return SZ_ERROR_MEM;
- }
- return SZ_OK;
+ UInt32 numProbs = LzmaProps_GetNumProbs(propNew);
+ if (p->probs == 0 || numProbs != p->numProbs)
+ {
+ LzmaDec_FreeProbs(p, alloc);
+ p->probs = (CLzmaProb *)alloc->Alloc(alloc, numProbs * sizeof(CLzmaProb));
+ p->numProbs = numProbs;
+ if (p->probs == 0)
+ return SZ_ERROR_MEM;
+ }
+ return SZ_OK;
}
SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
{
- CLzmaProps propNew;
- RINOK(LzmaProps_Decode(&propNew, props, propsSize));
- RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
- p->prop = propNew;
- return SZ_OK;
+ CLzmaProps propNew;
+ RINOK(LzmaProps_Decode(&propNew, props, propsSize));
+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
+ p->prop = propNew;
+ return SZ_OK;
}
SRes LzmaDec_Allocate(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc)
{
- CLzmaProps propNew;
- SizeT dicBufSize;
- RINOK(LzmaProps_Decode(&propNew, props, propsSize));
- RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
- dicBufSize = propNew.dicSize;
- if (p->dic == 0 || dicBufSize != p->dicBufSize)
- {
- LzmaDec_FreeDict(p, alloc);
- p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
- if (p->dic == 0)
- {
- LzmaDec_FreeProbs(p, alloc);
- return SZ_ERROR_MEM;
- }
- }
- p->dicBufSize = dicBufSize;
- p->prop = propNew;
- return SZ_OK;
+ CLzmaProps propNew;
+ SizeT dicBufSize;
+ RINOK(LzmaProps_Decode(&propNew, props, propsSize));
+ RINOK(LzmaDec_AllocateProbs2(p, &propNew, alloc));
+ dicBufSize = propNew.dicSize;
+ if (p->dic == 0 || dicBufSize != p->dicBufSize)
+ {
+ LzmaDec_FreeDict(p, alloc);
+ p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
+ if (p->dic == 0)
+ {
+ LzmaDec_FreeProbs(p, alloc);
+ return SZ_ERROR_MEM;
+ }
+ }
+ p->dicBufSize = dicBufSize;
+ p->prop = propNew;
+ return SZ_OK;
}
// why isn't there an interface to pass in the properties directly????
SRes LzmaDec_Allocate_MAME(CLzmaDec *p, const CLzmaProps *propNew, ISzAlloc *alloc)
{
- SizeT dicBufSize;
- RINOK(LzmaDec_AllocateProbs2(p, propNew, alloc));
- dicBufSize = propNew->dicSize;
- if (p->dic == 0 || dicBufSize != p->dicBufSize)
- {
- LzmaDec_FreeDict(p, alloc);
- p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
- if (p->dic == 0)
- {
- LzmaDec_FreeProbs(p, alloc);
- return SZ_ERROR_MEM;
- }
- }
- p->dicBufSize = dicBufSize;
- p->prop = *propNew;
- return SZ_OK;
+ SizeT dicBufSize;
+ RINOK(LzmaDec_AllocateProbs2(p, propNew, alloc));
+ dicBufSize = propNew->dicSize;
+ if (p->dic == 0 || dicBufSize != p->dicBufSize)
+ {
+ LzmaDec_FreeDict(p, alloc);
+ p->dic = (Byte *)alloc->Alloc(alloc, dicBufSize);
+ if (p->dic == 0)
+ {
+ LzmaDec_FreeProbs(p, alloc);
+ return SZ_ERROR_MEM;
+ }
+ }
+ p->dicBufSize = dicBufSize;
+ p->prop = *propNew;
+ return SZ_OK;
}
SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
- ELzmaStatus *status, ISzAlloc *alloc)
+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
+ ELzmaStatus *status, ISzAlloc *alloc)
{
- CLzmaDec p;
- SRes res;
- SizeT outSize = *destLen, inSize = *srcLen;
- *destLen = *srcLen = 0;
- *status = LZMA_STATUS_NOT_SPECIFIED;
- if (inSize < RC_INIT_SIZE)
- return SZ_ERROR_INPUT_EOF;
- LzmaDec_Construct(&p);
- RINOK(LzmaDec_AllocateProbs(&p, propData, propSize, alloc));
- p.dic = dest;
- p.dicBufSize = outSize;
- LzmaDec_Init(&p);
- *srcLen = inSize;
- res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status);
- *destLen = p.dicPos;
- if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT)
- res = SZ_ERROR_INPUT_EOF;
- LzmaDec_FreeProbs(&p, alloc);
- return res;
+ CLzmaDec p;
+ SRes res;
+ SizeT outSize = *destLen, inSize = *srcLen;
+ *destLen = *srcLen = 0;
+ *status = LZMA_STATUS_NOT_SPECIFIED;
+ if (inSize < RC_INIT_SIZE)
+ return SZ_ERROR_INPUT_EOF;
+ LzmaDec_Construct(&p);
+ RINOK(LzmaDec_AllocateProbs(&p, propData, propSize, alloc));
+ p.dic = dest;
+ p.dicBufSize = outSize;
+ LzmaDec_Init(&p);
+ *srcLen = inSize;
+ res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status);
+ *destLen = p.dicPos;
+ if (res == SZ_OK && *status == LZMA_STATUS_NEEDS_MORE_INPUT)
+ res = SZ_ERROR_INPUT_EOF;
+ LzmaDec_FreeProbs(&p, alloc);
+ return res;
}
diff --git a/src/lib/lib7z/LzmaDec.h b/src/lib/lib7z/LzmaDec.h
index ad93b170fc0..fd88cf0e79e 100644
--- a/src/lib/lib7z/LzmaDec.h
+++ b/src/lib/lib7z/LzmaDec.h
@@ -27,8 +27,8 @@ extern "C" {
typedef struct _CLzmaProps
{
- unsigned lc, lp, pb;
- UInt32 dicSize;
+ unsigned lc, lp, pb;
+ UInt32 dicSize;
} CLzmaProps;
/* LzmaProps_Decode - decodes properties
@@ -49,23 +49,23 @@ SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size);
typedef struct
{
- CLzmaProps prop;
- CLzmaProb *probs;
- Byte *dic;
- const Byte *buf;
- UInt32 range, code;
- SizeT dicPos;
- SizeT dicBufSize;
- UInt32 processedPos;
- UInt32 checkDicSize;
- unsigned state;
- UInt32 reps[4];
- unsigned remainLen;
- int needFlush;
- int needInitState;
- UInt32 numProbs;
- unsigned tempBufSize;
- Byte tempBuf[LZMA_REQUIRED_INPUT_MAX];
+ CLzmaProps prop;
+ CLzmaProb *probs;
+ Byte *dic;
+ const Byte *buf;
+ UInt32 range, code;
+ SizeT dicPos;
+ SizeT dicBufSize;
+ UInt32 processedPos;
+ UInt32 checkDicSize;
+ unsigned state;
+ UInt32 reps[4];
+ unsigned remainLen;
+ int needFlush;
+ int needInitState;
+ UInt32 numProbs;
+ unsigned tempBufSize;
+ Byte tempBuf[LZMA_REQUIRED_INPUT_MAX];
} CLzmaDec;
#define LzmaDec_Construct(p) { (p)->dic = 0; (p)->probs = 0; }
@@ -78,8 +78,8 @@ void LzmaDec_Init(CLzmaDec *p);
typedef enum
{
- LZMA_FINISH_ANY, /* finish at any point */
- LZMA_FINISH_END /* block must be finished at the end */
+ LZMA_FINISH_ANY, /* finish at any point */
+ LZMA_FINISH_END /* block must be finished at the end */
} ELzmaFinishMode;
/* ELzmaFinishMode has meaning only if the decoding reaches output limit !!!
@@ -99,11 +99,11 @@ typedef enum
typedef enum
{
- LZMA_STATUS_NOT_SPECIFIED, /* use main error code instead */
- LZMA_STATUS_FINISHED_WITH_MARK, /* stream was finished with end mark. */
- LZMA_STATUS_NOT_FINISHED, /* stream was not finished */
- LZMA_STATUS_NEEDS_MORE_INPUT, /* you must provide more input bytes */
- LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK /* there is probability that stream was finished without end mark */
+ LZMA_STATUS_NOT_SPECIFIED, /* use main error code instead */
+ LZMA_STATUS_FINISHED_WITH_MARK, /* stream was finished with end mark. */
+ LZMA_STATUS_NOT_FINISHED, /* stream was not finished */
+ LZMA_STATUS_NEEDS_MORE_INPUT, /* you must provide more input bytes */
+ LZMA_STATUS_MAYBE_FINISHED_WITHOUT_MARK /* there is probability that stream was finished without end mark */
} ELzmaStatus;
/* ELzmaStatus is used only as output value for function call */
@@ -179,7 +179,7 @@ Returns:
*/
SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit,
- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
/* ---------- Buffer Interface ---------- */
@@ -196,7 +196,7 @@ finishMode:
*/
SRes LzmaDec_DecodeToBuf(CLzmaDec *p, Byte *dest, SizeT *destLen,
- const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
+ const Byte *src, SizeT *srcLen, ELzmaFinishMode finishMode, ELzmaStatus *status);
/* ---------- One Call Interface ---------- */
@@ -221,8 +221,8 @@ Returns:
*/
SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
- ELzmaStatus *status, ISzAlloc *alloc);
+ const Byte *propData, unsigned propSize, ELzmaFinishMode finishMode,
+ ELzmaStatus *status, ISzAlloc *alloc);
/*
* Why isn't there an interface to pass in the properties directly????
diff --git a/src/lib/lib7z/LzmaEnc.c b/src/lib/lib7z/LzmaEnc.c
index cdcf8b017ea..2830db9781d 100644
--- a/src/lib/lib7z/LzmaEnc.c
+++ b/src/lib/lib7z/LzmaEnc.c
@@ -44,50 +44,50 @@ static int ttt = 0;
void LzmaEncProps_Init(CLzmaEncProps *p)
{
- p->level = 5;
- p->dictSize = p->mc = 0;
- p->reduceSize = (UInt32)(Int32)-1;
- p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1;
- p->writeEndMark = 0;
+ p->level = 5;
+ p->dictSize = p->mc = 0;
+ p->reduceSize = (UInt32)(Int32)-1;
+ p->lc = p->lp = p->pb = p->algo = p->fb = p->btMode = p->numHashBytes = p->numThreads = -1;
+ p->writeEndMark = 0;
}
void LzmaEncProps_Normalize(CLzmaEncProps *p)
{
- int level = p->level;
- if (level < 0) level = 5;
- p->level = level;
- if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26)));
- if (p->dictSize > p->reduceSize)
- {
- unsigned i;
- for (i = 15; i <= 30; i++)
- {
- if (p->reduceSize <= ((UInt32)2 << i)) { p->dictSize = ((UInt32)2 << i); break; }
- if (p->reduceSize <= ((UInt32)3 << i)) { p->dictSize = ((UInt32)3 << i); break; }
- }
- }
- if (p->lc < 0) p->lc = 3;
- if (p->lp < 0) p->lp = 0;
- if (p->pb < 0) p->pb = 2;
- if (p->algo < 0) p->algo = (level < 5 ? 0 : 1);
- if (p->fb < 0) p->fb = (level < 7 ? 32 : 64);
- if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1);
- if (p->numHashBytes < 0) p->numHashBytes = 4;
- if (p->mc == 0) p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1);
- if (p->numThreads < 0)
- p->numThreads =
- #ifndef _7ZIP_ST
- ((p->btMode && p->algo) ? 2 : 1);
- #else
- 1;
- #endif
+ int level = p->level;
+ if (level < 0) level = 5;
+ p->level = level;
+ if (p->dictSize == 0) p->dictSize = (level <= 5 ? (1 << (level * 2 + 14)) : (level == 6 ? (1 << 25) : (1 << 26)));
+ if (p->dictSize > p->reduceSize)
+ {
+ unsigned i;
+ for (i = 15; i <= 30; i++)
+ {
+ if (p->reduceSize <= ((UInt32)2 << i)) { p->dictSize = ((UInt32)2 << i); break; }
+ if (p->reduceSize <= ((UInt32)3 << i)) { p->dictSize = ((UInt32)3 << i); break; }
+ }
+ }
+ if (p->lc < 0) p->lc = 3;
+ if (p->lp < 0) p->lp = 0;
+ if (p->pb < 0) p->pb = 2;
+ if (p->algo < 0) p->algo = (level < 5 ? 0 : 1);
+ if (p->fb < 0) p->fb = (level < 7 ? 32 : 64);
+ if (p->btMode < 0) p->btMode = (p->algo == 0 ? 0 : 1);
+ if (p->numHashBytes < 0) p->numHashBytes = 4;
+ if (p->mc == 0) p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1);
+ if (p->numThreads < 0)
+ p->numThreads =
+ #ifndef _7ZIP_ST
+ ((p->btMode && p->algo) ? 2 : 1);
+ #else
+ 1;
+ #endif
}
UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
{
- CLzmaEncProps props = *props2;
- LzmaEncProps_Normalize(&props);
- return props.dictSize;
+ CLzmaEncProps props = *props2;
+ LzmaEncProps_Normalize(&props);
+ return props.dictSize;
}
/* #define LZMA_LOG_BSR */
@@ -102,9 +102,9 @@ UInt32 LzmaEncProps_GetDictSize(const CLzmaEncProps *props2)
UInt32 GetPosSlot1(UInt32 pos)
{
- UInt32 res;
- BSR2_RET(pos, res);
- return res;
+ UInt32 res;
+ BSR2_RET(pos, res);
+ return res;
}
#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); }
#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); }
@@ -116,22 +116,22 @@ UInt32 GetPosSlot1(UInt32 pos)
void LzmaEnc_FastPosInit(Byte *g_FastPos)
{
- int c = 2, slotFast;
- g_FastPos[0] = 0;
- g_FastPos[1] = 1;
+ int c = 2, slotFast;
+ g_FastPos[0] = 0;
+ g_FastPos[1] = 1;
- for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++)
- {
- UInt32 k = (1 << ((slotFast >> 1) - 1));
- UInt32 j;
- for (j = 0; j < k; j++, c++)
- g_FastPos[c] = (Byte)slotFast;
- }
+ for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++)
+ {
+ UInt32 k = (1 << ((slotFast >> 1) - 1));
+ UInt32 j;
+ for (j = 0; j < k; j++, c++)
+ g_FastPos[c] = (Byte)slotFast;
+ }
}
#define BSR2_RET(pos, res) { UInt32 i = 6 + ((kNumLogBits - 1) & \
- (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \
- res = p->g_FastPos[pos >> i] + (i * 2); }
+ (0 - (((((UInt32)1 << (kNumLogBits + 6)) - 1) - pos) >> 31))); \
+ res = p->g_FastPos[pos >> i] + (i * 2); }
/*
#define BSR2_RET(pos, res) { res = (pos < (1 << (kNumLogBits + 6))) ? \
p->g_FastPos[pos >> 6] + 12 : \
@@ -151,18 +151,18 @@ typedef unsigned CState;
typedef struct
{
- UInt32 price;
+ UInt32 price;
- CState state;
- int prev1IsChar;
- int prev2;
+ CState state;
+ int prev1IsChar;
+ int prev2;
- UInt32 posPrev2;
- UInt32 backPrev2;
+ UInt32 posPrev2;
+ UInt32 backPrev2;
- UInt32 posPrev;
- UInt32 backPrev;
- UInt32 backs[LZMA_NUM_REPS];
+ UInt32 posPrev;
+ UInt32 backPrev;
+ UInt32 backs[LZMA_NUM_REPS];
} COptimal;
#define kNumOpts (1 << 12)
@@ -213,241 +213,241 @@ typedef struct
typedef struct
{
- CLzmaProb choice;
- CLzmaProb choice2;
- CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits];
- CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits];
- CLzmaProb high[kLenNumHighSymbols];
+ CLzmaProb choice;
+ CLzmaProb choice2;
+ CLzmaProb low[LZMA_NUM_PB_STATES_MAX << kLenNumLowBits];
+ CLzmaProb mid[LZMA_NUM_PB_STATES_MAX << kLenNumMidBits];
+ CLzmaProb high[kLenNumHighSymbols];
} CLenEnc;
typedef struct
{
- CLenEnc p;
- UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal];
- UInt32 tableSize;
- UInt32 counters[LZMA_NUM_PB_STATES_MAX];
+ CLenEnc p;
+ UInt32 prices[LZMA_NUM_PB_STATES_MAX][kLenNumSymbolsTotal];
+ UInt32 tableSize;
+ UInt32 counters[LZMA_NUM_PB_STATES_MAX];
} CLenPriceEnc;
typedef struct
{
- UInt32 range;
- Byte cache;
- UInt64 low;
- UInt64 cacheSize;
- Byte *buf;
- Byte *bufLim;
- Byte *bufBase;
- ISeqOutStream *outStream;
- UInt64 processed;
- SRes res;
+ UInt32 range;
+ Byte cache;
+ UInt64 low;
+ UInt64 cacheSize;
+ Byte *buf;
+ Byte *bufLim;
+ Byte *bufBase;
+ ISeqOutStream *outStream;
+ UInt64 processed;
+ SRes res;
} CRangeEnc;
typedef struct
{
- CLzmaProb *litProbs;
+ CLzmaProb *litProbs;
- CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
- CLzmaProb isRep[kNumStates];
- CLzmaProb isRepG0[kNumStates];
- CLzmaProb isRepG1[kNumStates];
- CLzmaProb isRepG2[kNumStates];
- CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
+ CLzmaProb isRep[kNumStates];
+ CLzmaProb isRepG0[kNumStates];
+ CLzmaProb isRepG1[kNumStates];
+ CLzmaProb isRepG2[kNumStates];
+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
- CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
- CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
- CLzmaProb posAlignEncoder[1 << kNumAlignBits];
+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
+ CLzmaProb posAlignEncoder[1 << kNumAlignBits];
- CLenPriceEnc lenEnc;
- CLenPriceEnc repLenEnc;
+ CLenPriceEnc lenEnc;
+ CLenPriceEnc repLenEnc;
- UInt32 reps[LZMA_NUM_REPS];
- UInt32 state;
+ UInt32 reps[LZMA_NUM_REPS];
+ UInt32 state;
} CSaveState;
typedef struct
{
- IMatchFinder matchFinder;
- void *matchFinderObj;
+ IMatchFinder matchFinder;
+ void *matchFinderObj;
- #ifndef _7ZIP_ST
- Bool mtMode;
- CMatchFinderMt matchFinderMt;
- #endif
+ #ifndef _7ZIP_ST
+ Bool mtMode;
+ CMatchFinderMt matchFinderMt;
+ #endif
- CMatchFinder matchFinderBase;
+ CMatchFinder matchFinderBase;
- #ifndef _7ZIP_ST
- Byte pad[128];
- #endif
+ #ifndef _7ZIP_ST
+ Byte pad[128];
+ #endif
- UInt32 optimumEndIndex;
- UInt32 optimumCurrentIndex;
+ UInt32 optimumEndIndex;
+ UInt32 optimumCurrentIndex;
- UInt32 longestMatchLength;
- UInt32 numPairs;
- UInt32 numAvail;
- COptimal opt[kNumOpts];
+ UInt32 longestMatchLength;
+ UInt32 numPairs;
+ UInt32 numAvail;
+ COptimal opt[kNumOpts];
- #ifndef LZMA_LOG_BSR
- Byte g_FastPos[1 << kNumLogBits];
- #endif
+ #ifndef LZMA_LOG_BSR
+ Byte g_FastPos[1 << kNumLogBits];
+ #endif
- UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits];
- UInt32 matches[LZMA_MATCH_LEN_MAX * 2 + 2 + 1];
- UInt32 numFastBytes;
- UInt32 additionalOffset;
- UInt32 reps[LZMA_NUM_REPS];
- UInt32 state;
+ UInt32 ProbPrices[kBitModelTotal >> kNumMoveReducingBits];
+ UInt32 matches[LZMA_MATCH_LEN_MAX * 2 + 2 + 1];
+ UInt32 numFastBytes;
+ UInt32 additionalOffset;
+ UInt32 reps[LZMA_NUM_REPS];
+ UInt32 state;
- UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax];
- UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances];
- UInt32 alignPrices[kAlignTableSize];
- UInt32 alignPriceCount;
+ UInt32 posSlotPrices[kNumLenToPosStates][kDistTableSizeMax];
+ UInt32 distancesPrices[kNumLenToPosStates][kNumFullDistances];
+ UInt32 alignPrices[kAlignTableSize];
+ UInt32 alignPriceCount;
- UInt32 distTableSize;
+ UInt32 distTableSize;
- unsigned lc, lp, pb;
- unsigned lpMask, pbMask;
+ unsigned lc, lp, pb;
+ unsigned lpMask, pbMask;
- CLzmaProb *litProbs;
+ CLzmaProb *litProbs;
- CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
- CLzmaProb isRep[kNumStates];
- CLzmaProb isRepG0[kNumStates];
- CLzmaProb isRepG1[kNumStates];
- CLzmaProb isRepG2[kNumStates];
- CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
+ CLzmaProb isMatch[kNumStates][LZMA_NUM_PB_STATES_MAX];
+ CLzmaProb isRep[kNumStates];
+ CLzmaProb isRepG0[kNumStates];
+ CLzmaProb isRepG1[kNumStates];
+ CLzmaProb isRepG2[kNumStates];
+ CLzmaProb isRep0Long[kNumStates][LZMA_NUM_PB_STATES_MAX];
- CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
- CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
- CLzmaProb posAlignEncoder[1 << kNumAlignBits];
+ CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits];
+ CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex];
+ CLzmaProb posAlignEncoder[1 << kNumAlignBits];
- CLenPriceEnc lenEnc;
- CLenPriceEnc repLenEnc;
+ CLenPriceEnc lenEnc;
+ CLenPriceEnc repLenEnc;
- unsigned lclp;
+ unsigned lclp;
- Bool fastMode;
+ Bool fastMode;
- CRangeEnc rc;
+ CRangeEnc rc;
- Bool writeEndMark;
- UInt64 nowPos64;
- UInt32 matchPriceCount;
- Bool finished;
- Bool multiThread;
+ Bool writeEndMark;
+ UInt64 nowPos64;
+ UInt32 matchPriceCount;
+ Bool finished;
+ Bool multiThread;
- SRes result;
- UInt32 dictSize;
+ SRes result;
+ UInt32 dictSize;
- int needInit;
+ int needInit;
- CSaveState saveState;
+ CSaveState saveState;
} CLzmaEnc;
void LzmaEnc_SaveState(CLzmaEncHandle pp)
{
- CLzmaEnc *p = (CLzmaEnc *)pp;
- CSaveState *dest = &p->saveState;
- int i;
- dest->lenEnc = p->lenEnc;
- dest->repLenEnc = p->repLenEnc;
- dest->state = p->state;
-
- for (i = 0; i < kNumStates; i++)
- {
- memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
- memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
- }
- for (i = 0; i < kNumLenToPosStates; i++)
- memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
- memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
- memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
- memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
- memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
- memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
- memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
- memcpy(dest->reps, p->reps, sizeof(p->reps));
- memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ CSaveState *dest = &p->saveState;
+ int i;
+ dest->lenEnc = p->lenEnc;
+ dest->repLenEnc = p->repLenEnc;
+ dest->state = p->state;
+
+ for (i = 0; i < kNumStates; i++)
+ {
+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
+ }
+ for (i = 0; i < kNumLenToPosStates; i++)
+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
+ memcpy(dest->reps, p->reps, sizeof(p->reps));
+ memcpy(dest->litProbs, p->litProbs, (0x300 << p->lclp) * sizeof(CLzmaProb));
}
void LzmaEnc_RestoreState(CLzmaEncHandle pp)
{
- CLzmaEnc *dest = (CLzmaEnc *)pp;
- const CSaveState *p = &dest->saveState;
- int i;
- dest->lenEnc = p->lenEnc;
- dest->repLenEnc = p->repLenEnc;
- dest->state = p->state;
-
- for (i = 0; i < kNumStates; i++)
- {
- memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
- memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
- }
- for (i = 0; i < kNumLenToPosStates; i++)
- memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
- memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
- memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
- memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
- memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
- memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
- memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
- memcpy(dest->reps, p->reps, sizeof(p->reps));
- memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
+ CLzmaEnc *dest = (CLzmaEnc *)pp;
+ const CSaveState *p = &dest->saveState;
+ int i;
+ dest->lenEnc = p->lenEnc;
+ dest->repLenEnc = p->repLenEnc;
+ dest->state = p->state;
+
+ for (i = 0; i < kNumStates; i++)
+ {
+ memcpy(dest->isMatch[i], p->isMatch[i], sizeof(p->isMatch[i]));
+ memcpy(dest->isRep0Long[i], p->isRep0Long[i], sizeof(p->isRep0Long[i]));
+ }
+ for (i = 0; i < kNumLenToPosStates; i++)
+ memcpy(dest->posSlotEncoder[i], p->posSlotEncoder[i], sizeof(p->posSlotEncoder[i]));
+ memcpy(dest->isRep, p->isRep, sizeof(p->isRep));
+ memcpy(dest->isRepG0, p->isRepG0, sizeof(p->isRepG0));
+ memcpy(dest->isRepG1, p->isRepG1, sizeof(p->isRepG1));
+ memcpy(dest->isRepG2, p->isRepG2, sizeof(p->isRepG2));
+ memcpy(dest->posEncoders, p->posEncoders, sizeof(p->posEncoders));
+ memcpy(dest->posAlignEncoder, p->posAlignEncoder, sizeof(p->posAlignEncoder));
+ memcpy(dest->reps, p->reps, sizeof(p->reps));
+ memcpy(dest->litProbs, p->litProbs, (0x300 << dest->lclp) * sizeof(CLzmaProb));
}
SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const CLzmaEncProps *props2)
{
- CLzmaEnc *p = (CLzmaEnc *)pp;
- CLzmaEncProps props = *props2;
- LzmaEncProps_Normalize(&props);
-
- if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX ||
- props.dictSize > ((UInt32)1 << kDicLogSizeMaxCompress) || props.dictSize > ((UInt32)1 << 30))
- return SZ_ERROR_PARAM;
- p->dictSize = props.dictSize;
- {
- unsigned fb = props.fb;
- if (fb < 5)
- fb = 5;
- if (fb > LZMA_MATCH_LEN_MAX)
- fb = LZMA_MATCH_LEN_MAX;
- p->numFastBytes = fb;
- }
- p->lc = props.lc;
- p->lp = props.lp;
- p->pb = props.pb;
- p->fastMode = (props.algo == 0);
- p->matchFinderBase.btMode = props.btMode;
- {
- UInt32 numHashBytes = 4;
- if (props.btMode)
- {
- if (props.numHashBytes < 2)
- numHashBytes = 2;
- else if (props.numHashBytes < 4)
- numHashBytes = props.numHashBytes;
- }
- p->matchFinderBase.numHashBytes = numHashBytes;
- }
-
- p->matchFinderBase.cutValue = props.mc;
-
- p->writeEndMark = props.writeEndMark;
-
- #ifndef _7ZIP_ST
- /*
- if (newMultiThread != _multiThread)
- {
- ReleaseMatchFinder();
- _multiThread = newMultiThread;
- }
- */
- p->multiThread = (props.numThreads > 1);
- #endif
-
- return SZ_OK;
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ CLzmaEncProps props = *props2;
+ LzmaEncProps_Normalize(&props);
+
+ if (props.lc > LZMA_LC_MAX || props.lp > LZMA_LP_MAX || props.pb > LZMA_PB_MAX ||
+ props.dictSize > ((UInt32)1 << kDicLogSizeMaxCompress) || props.dictSize > ((UInt32)1 << 30))
+ return SZ_ERROR_PARAM;
+ p->dictSize = props.dictSize;
+ {
+ unsigned fb = props.fb;
+ if (fb < 5)
+ fb = 5;
+ if (fb > LZMA_MATCH_LEN_MAX)
+ fb = LZMA_MATCH_LEN_MAX;
+ p->numFastBytes = fb;
+ }
+ p->lc = props.lc;
+ p->lp = props.lp;
+ p->pb = props.pb;
+ p->fastMode = (props.algo == 0);
+ p->matchFinderBase.btMode = props.btMode;
+ {
+ UInt32 numHashBytes = 4;
+ if (props.btMode)
+ {
+ if (props.numHashBytes < 2)
+ numHashBytes = 2;
+ else if (props.numHashBytes < 4)
+ numHashBytes = props.numHashBytes;
+ }
+ p->matchFinderBase.numHashBytes = numHashBytes;
+ }
+
+ p->matchFinderBase.cutValue = props.mc;
+
+ p->writeEndMark = props.writeEndMark;
+
+ #ifndef _7ZIP_ST
+ /*
+ if (newMultiThread != _multiThread)
+ {
+ ReleaseMatchFinder();
+ _multiThread = newMultiThread;
+ }
+ */
+ p->multiThread = (props.numThreads > 1);
+ #endif
+
+ return SZ_OK;
}
static const int kLiteralNextStates[kNumStates] = {0, 0, 0, 0, 1, 2, 3, 4, 5, 6, 4, 5};
@@ -463,8 +463,8 @@ static const int kShortRepNextStates[kNumStates]= {9, 9, 9, 9, 9, 9, 9, 11, 11,
static void RangeEnc_Construct(CRangeEnc *p)
{
- p->outStream = 0;
- p->bufBase = 0;
+ p->outStream = 0;
+ p->bufBase = 0;
}
#define RangeEnc_GetProcessed(p) ((p)->processed + ((p)->buf - (p)->bufBase) + (p)->cacheSize)
@@ -472,168 +472,168 @@ static void RangeEnc_Construct(CRangeEnc *p)
#define RC_BUF_SIZE (1 << 16)
static int RangeEnc_Alloc(CRangeEnc *p, ISzAlloc *alloc)
{
- if (p->bufBase == 0)
- {
- p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE);
- if (p->bufBase == 0)
- return 0;
- p->bufLim = p->bufBase + RC_BUF_SIZE;
- }
- return 1;
+ if (p->bufBase == 0)
+ {
+ p->bufBase = (Byte *)alloc->Alloc(alloc, RC_BUF_SIZE);
+ if (p->bufBase == 0)
+ return 0;
+ p->bufLim = p->bufBase + RC_BUF_SIZE;
+ }
+ return 1;
}
static void RangeEnc_Free(CRangeEnc *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->bufBase);
- p->bufBase = 0;
+ alloc->Free(alloc, p->bufBase);
+ p->bufBase = 0;
}
static void RangeEnc_Init(CRangeEnc *p)
{
- /* Stream.Init(); */
- p->low = 0;
- p->range = 0xFFFFFFFF;
- p->cacheSize = 1;
- p->cache = 0;
+ /* Stream.Init(); */
+ p->low = 0;
+ p->range = 0xFFFFFFFF;
+ p->cacheSize = 1;
+ p->cache = 0;
- p->buf = p->bufBase;
+ p->buf = p->bufBase;
- p->processed = 0;
- p->res = SZ_OK;
+ p->processed = 0;
+ p->res = SZ_OK;
}
static void RangeEnc_FlushStream(CRangeEnc *p)
{
- size_t num;
- if (p->res != SZ_OK)
- return;
- num = p->buf - p->bufBase;
- if (num != p->outStream->Write(p->outStream, p->bufBase, num))
- p->res = SZ_ERROR_WRITE;
- p->processed += num;
- p->buf = p->bufBase;
+ size_t num;
+ if (p->res != SZ_OK)
+ return;
+ num = p->buf - p->bufBase;
+ if (num != p->outStream->Write(p->outStream, p->bufBase, num))
+ p->res = SZ_ERROR_WRITE;
+ p->processed += num;
+ p->buf = p->bufBase;
}
static void MY_FAST_CALL RangeEnc_ShiftLow(CRangeEnc *p)
{
- if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0)
- {
- Byte temp = p->cache;
- do
- {
- Byte *buf = p->buf;
- *buf++ = (Byte)(temp + (Byte)(p->low >> 32));
- p->buf = buf;
- if (buf == p->bufLim)
- RangeEnc_FlushStream(p);
- temp = 0xFF;
- }
- while (--p->cacheSize != 0);
- p->cache = (Byte)((UInt32)p->low >> 24);
- }
- p->cacheSize++;
- p->low = (UInt32)p->low << 8;
+ if ((UInt32)p->low < (UInt32)0xFF000000 || (int)(p->low >> 32) != 0)
+ {
+ Byte temp = p->cache;
+ do
+ {
+ Byte *buf = p->buf;
+ *buf++ = (Byte)(temp + (Byte)(p->low >> 32));
+ p->buf = buf;
+ if (buf == p->bufLim)
+ RangeEnc_FlushStream(p);
+ temp = 0xFF;
+ }
+ while (--p->cacheSize != 0);
+ p->cache = (Byte)((UInt32)p->low >> 24);
+ }
+ p->cacheSize++;
+ p->low = (UInt32)p->low << 8;
}
static void RangeEnc_FlushData(CRangeEnc *p)
{
- int i;
- for (i = 0; i < 5; i++)
- RangeEnc_ShiftLow(p);
+ int i;
+ for (i = 0; i < 5; i++)
+ RangeEnc_ShiftLow(p);
}
static void RangeEnc_EncodeDirectBits(CRangeEnc *p, UInt32 value, int numBits)
{
- do
- {
- p->range >>= 1;
- p->low += p->range & (0 - ((value >> --numBits) & 1));
- if (p->range < kTopValue)
- {
- p->range <<= 8;
- RangeEnc_ShiftLow(p);
- }
- }
- while (numBits != 0);
+ do
+ {
+ p->range >>= 1;
+ p->low += p->range & (0 - ((value >> --numBits) & 1));
+ if (p->range < kTopValue)
+ {
+ p->range <<= 8;
+ RangeEnc_ShiftLow(p);
+ }
+ }
+ while (numBits != 0);
}
static void RangeEnc_EncodeBit(CRangeEnc *p, CLzmaProb *prob, UInt32 symbol)
{
- UInt32 ttt = *prob;
- UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt;
- if (symbol == 0)
- {
- p->range = newBound;
- ttt += (kBitModelTotal - ttt) >> kNumMoveBits;
- }
- else
- {
- p->low += newBound;
- p->range -= newBound;
- ttt -= ttt >> kNumMoveBits;
- }
- *prob = (CLzmaProb)ttt;
- if (p->range < kTopValue)
- {
- p->range <<= 8;
- RangeEnc_ShiftLow(p);
- }
+ UInt32 ttt = *prob;
+ UInt32 newBound = (p->range >> kNumBitModelTotalBits) * ttt;
+ if (symbol == 0)
+ {
+ p->range = newBound;
+ ttt += (kBitModelTotal - ttt) >> kNumMoveBits;
+ }
+ else
+ {
+ p->low += newBound;
+ p->range -= newBound;
+ ttt -= ttt >> kNumMoveBits;
+ }
+ *prob = (CLzmaProb)ttt;
+ if (p->range < kTopValue)
+ {
+ p->range <<= 8;
+ RangeEnc_ShiftLow(p);
+ }
}
static void LitEnc_Encode(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol)
{
- symbol |= 0x100;
- do
- {
- RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1);
- symbol <<= 1;
- }
- while (symbol < 0x10000);
+ symbol |= 0x100;
+ do
+ {
+ RangeEnc_EncodeBit(p, probs + (symbol >> 8), (symbol >> 7) & 1);
+ symbol <<= 1;
+ }
+ while (symbol < 0x10000);
}
static void LitEnc_EncodeMatched(CRangeEnc *p, CLzmaProb *probs, UInt32 symbol, UInt32 matchByte)
{
- UInt32 offs = 0x100;
- symbol |= 0x100;
- do
- {
- matchByte <<= 1;
- RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1);
- symbol <<= 1;
- offs &= ~(matchByte ^ symbol);
- }
- while (symbol < 0x10000);
+ UInt32 offs = 0x100;
+ symbol |= 0x100;
+ do
+ {
+ matchByte <<= 1;
+ RangeEnc_EncodeBit(p, probs + (offs + (matchByte & offs) + (symbol >> 8)), (symbol >> 7) & 1);
+ symbol <<= 1;
+ offs &= ~(matchByte ^ symbol);
+ }
+ while (symbol < 0x10000);
}
void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
{
- UInt32 i;
- for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
- {
- const int kCyclesBits = kNumBitPriceShiftBits;
- UInt32 w = i;
- UInt32 bitCount = 0;
- int j;
- for (j = 0; j < kCyclesBits; j++)
- {
- w = w * w;
- bitCount <<= 1;
- while (w >= ((UInt32)1 << 16))
- {
- w >>= 1;
- bitCount++;
- }
- }
- ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount);
- }
+ UInt32 i;
+ for (i = (1 << kNumMoveReducingBits) / 2; i < kBitModelTotal; i += (1 << kNumMoveReducingBits))
+ {
+ const int kCyclesBits = kNumBitPriceShiftBits;
+ UInt32 w = i;
+ UInt32 bitCount = 0;
+ int j;
+ for (j = 0; j < kCyclesBits; j++)
+ {
+ w = w * w;
+ bitCount <<= 1;
+ while (w >= ((UInt32)1 << 16))
+ {
+ w >>= 1;
+ bitCount++;
+ }
+ }
+ ProbPrices[i >> kNumMoveReducingBits] = ((kNumBitModelTotalBits << kCyclesBits) - 15 - bitCount);
+ }
}
#define GET_PRICE(prob, symbol) \
- p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
+ p->ProbPrices[((prob) ^ (((-(int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
#define GET_PRICEa(prob, symbol) \
- ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
+ ProbPrices[((prob) ^ ((-((int)(symbol))) & (kBitModelTotal - 1))) >> kNumMoveReducingBits];
#define GET_PRICE_0(prob) p->ProbPrices[(prob) >> kNumMoveReducingBits]
#define GET_PRICE_1(prob) p->ProbPrices[((prob) ^ (kBitModelTotal - 1)) >> kNumMoveReducingBits]
@@ -643,166 +643,166 @@ void LzmaEnc_InitPriceTables(UInt32 *ProbPrices)
static UInt32 LitEnc_GetPrice(const CLzmaProb *probs, UInt32 symbol, UInt32 *ProbPrices)
{
- UInt32 price = 0;
- symbol |= 0x100;
- do
- {
- price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1);
- symbol <<= 1;
- }
- while (symbol < 0x10000);
- return price;
+ UInt32 price = 0;
+ symbol |= 0x100;
+ do
+ {
+ price += GET_PRICEa(probs[symbol >> 8], (symbol >> 7) & 1);
+ symbol <<= 1;
+ }
+ while (symbol < 0x10000);
+ return price;
}
static UInt32 LitEnc_GetPriceMatched(const CLzmaProb *probs, UInt32 symbol, UInt32 matchByte, UInt32 *ProbPrices)
{
- UInt32 price = 0;
- UInt32 offs = 0x100;
- symbol |= 0x100;
- do
- {
- matchByte <<= 1;
- price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1);
- symbol <<= 1;
- offs &= ~(matchByte ^ symbol);
- }
- while (symbol < 0x10000);
- return price;
+ UInt32 price = 0;
+ UInt32 offs = 0x100;
+ symbol |= 0x100;
+ do
+ {
+ matchByte <<= 1;
+ price += GET_PRICEa(probs[offs + (matchByte & offs) + (symbol >> 8)], (symbol >> 7) & 1);
+ symbol <<= 1;
+ offs &= ~(matchByte ^ symbol);
+ }
+ while (symbol < 0x10000);
+ return price;
}
static void RcTree_Encode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
{
- UInt32 m = 1;
- int i;
- for (i = numBitLevels; i != 0;)
- {
- UInt32 bit;
- i--;
- bit = (symbol >> i) & 1;
- RangeEnc_EncodeBit(rc, probs + m, bit);
- m = (m << 1) | bit;
- }
+ UInt32 m = 1;
+ int i;
+ for (i = numBitLevels; i != 0;)
+ {
+ UInt32 bit;
+ i--;
+ bit = (symbol >> i) & 1;
+ RangeEnc_EncodeBit(rc, probs + m, bit);
+ m = (m << 1) | bit;
+ }
}
static void RcTree_ReverseEncode(CRangeEnc *rc, CLzmaProb *probs, int numBitLevels, UInt32 symbol)
{
- UInt32 m = 1;
- int i;
- for (i = 0; i < numBitLevels; i++)
- {
- UInt32 bit = symbol & 1;
- RangeEnc_EncodeBit(rc, probs + m, bit);
- m = (m << 1) | bit;
- symbol >>= 1;
- }
+ UInt32 m = 1;
+ int i;
+ for (i = 0; i < numBitLevels; i++)
+ {
+ UInt32 bit = symbol & 1;
+ RangeEnc_EncodeBit(rc, probs + m, bit);
+ m = (m << 1) | bit;
+ symbol >>= 1;
+ }
}
static UInt32 RcTree_GetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
{
- UInt32 price = 0;
- symbol |= (1 << numBitLevels);
- while (symbol != 1)
- {
- price += GET_PRICEa(probs[symbol >> 1], symbol & 1);
- symbol >>= 1;
- }
- return price;
+ UInt32 price = 0;
+ symbol |= (1 << numBitLevels);
+ while (symbol != 1)
+ {
+ price += GET_PRICEa(probs[symbol >> 1], symbol & 1);
+ symbol >>= 1;
+ }
+ return price;
}
static UInt32 RcTree_ReverseGetPrice(const CLzmaProb *probs, int numBitLevels, UInt32 symbol, UInt32 *ProbPrices)
{
- UInt32 price = 0;
- UInt32 m = 1;
- int i;
- for (i = numBitLevels; i != 0; i--)
- {
- UInt32 bit = symbol & 1;
- symbol >>= 1;
- price += GET_PRICEa(probs[m], bit);
- m = (m << 1) | bit;
- }
- return price;
+ UInt32 price = 0;
+ UInt32 m = 1;
+ int i;
+ for (i = numBitLevels; i != 0; i--)
+ {
+ UInt32 bit = symbol & 1;
+ symbol >>= 1;
+ price += GET_PRICEa(probs[m], bit);
+ m = (m << 1) | bit;
+ }
+ return price;
}
static void LenEnc_Init(CLenEnc *p)
{
- unsigned i;
- p->choice = p->choice2 = kProbInitValue;
- for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++)
- p->low[i] = kProbInitValue;
- for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++)
- p->mid[i] = kProbInitValue;
- for (i = 0; i < kLenNumHighSymbols; i++)
- p->high[i] = kProbInitValue;
+ unsigned i;
+ p->choice = p->choice2 = kProbInitValue;
+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumLowBits); i++)
+ p->low[i] = kProbInitValue;
+ for (i = 0; i < (LZMA_NUM_PB_STATES_MAX << kLenNumMidBits); i++)
+ p->mid[i] = kProbInitValue;
+ for (i = 0; i < kLenNumHighSymbols; i++)
+ p->high[i] = kProbInitValue;
}
static void LenEnc_Encode(CLenEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState)
{
- if (symbol < kLenNumLowSymbols)
- {
- RangeEnc_EncodeBit(rc, &p->choice, 0);
- RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol);
- }
- else
- {
- RangeEnc_EncodeBit(rc, &p->choice, 1);
- if (symbol < kLenNumLowSymbols + kLenNumMidSymbols)
- {
- RangeEnc_EncodeBit(rc, &p->choice2, 0);
- RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols);
- }
- else
- {
- RangeEnc_EncodeBit(rc, &p->choice2, 1);
- RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols);
- }
- }
+ if (symbol < kLenNumLowSymbols)
+ {
+ RangeEnc_EncodeBit(rc, &p->choice, 0);
+ RcTree_Encode(rc, p->low + (posState << kLenNumLowBits), kLenNumLowBits, symbol);
+ }
+ else
+ {
+ RangeEnc_EncodeBit(rc, &p->choice, 1);
+ if (symbol < kLenNumLowSymbols + kLenNumMidSymbols)
+ {
+ RangeEnc_EncodeBit(rc, &p->choice2, 0);
+ RcTree_Encode(rc, p->mid + (posState << kLenNumMidBits), kLenNumMidBits, symbol - kLenNumLowSymbols);
+ }
+ else
+ {
+ RangeEnc_EncodeBit(rc, &p->choice2, 1);
+ RcTree_Encode(rc, p->high, kLenNumHighBits, symbol - kLenNumLowSymbols - kLenNumMidSymbols);
+ }
+ }
}
static void LenEnc_SetPrices(CLenEnc *p, UInt32 posState, UInt32 numSymbols, UInt32 *prices, UInt32 *ProbPrices)
{
- UInt32 a0 = GET_PRICE_0a(p->choice);
- UInt32 a1 = GET_PRICE_1a(p->choice);
- UInt32 b0 = a1 + GET_PRICE_0a(p->choice2);
- UInt32 b1 = a1 + GET_PRICE_1a(p->choice2);
- UInt32 i = 0;
- for (i = 0; i < kLenNumLowSymbols; i++)
- {
- if (i >= numSymbols)
- return;
- prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices);
- }
- for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++)
- {
- if (i >= numSymbols)
- return;
- prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices);
- }
- for (; i < numSymbols; i++)
- prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices);
+ UInt32 a0 = GET_PRICE_0a(p->choice);
+ UInt32 a1 = GET_PRICE_1a(p->choice);
+ UInt32 b0 = a1 + GET_PRICE_0a(p->choice2);
+ UInt32 b1 = a1 + GET_PRICE_1a(p->choice2);
+ UInt32 i = 0;
+ for (i = 0; i < kLenNumLowSymbols; i++)
+ {
+ if (i >= numSymbols)
+ return;
+ prices[i] = a0 + RcTree_GetPrice(p->low + (posState << kLenNumLowBits), kLenNumLowBits, i, ProbPrices);
+ }
+ for (; i < kLenNumLowSymbols + kLenNumMidSymbols; i++)
+ {
+ if (i >= numSymbols)
+ return;
+ prices[i] = b0 + RcTree_GetPrice(p->mid + (posState << kLenNumMidBits), kLenNumMidBits, i - kLenNumLowSymbols, ProbPrices);
+ }
+ for (; i < numSymbols; i++)
+ prices[i] = b1 + RcTree_GetPrice(p->high, kLenNumHighBits, i - kLenNumLowSymbols - kLenNumMidSymbols, ProbPrices);
}
static void MY_FAST_CALL LenPriceEnc_UpdateTable(CLenPriceEnc *p, UInt32 posState, UInt32 *ProbPrices)
{
- LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices);
- p->counters[posState] = p->tableSize;
+ LenEnc_SetPrices(&p->p, posState, p->tableSize, p->prices[posState], ProbPrices);
+ p->counters[posState] = p->tableSize;
}
static void LenPriceEnc_UpdateTables(CLenPriceEnc *p, UInt32 numPosStates, UInt32 *ProbPrices)
{
- UInt32 posState;
- for (posState = 0; posState < numPosStates; posState++)
- LenPriceEnc_UpdateTable(p, posState, ProbPrices);
+ UInt32 posState;
+ for (posState = 0; posState < numPosStates; posState++)
+ LenPriceEnc_UpdateTable(p, posState, ProbPrices);
}
static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32 posState, Bool updatePrice, UInt32 *ProbPrices)
{
- LenEnc_Encode(&p->p, rc, symbol, posState);
- if (updatePrice)
- if (--p->counters[posState] == 0)
- LenPriceEnc_UpdateTable(p, posState, ProbPrices);
+ LenEnc_Encode(&p->p, rc, symbol, posState);
+ if (updatePrice)
+ if (--p->counters[posState] == 0)
+ LenPriceEnc_UpdateTable(p, posState, ProbPrices);
}
@@ -810,50 +810,50 @@ static void LenEnc_Encode2(CLenPriceEnc *p, CRangeEnc *rc, UInt32 symbol, UInt32
static void MovePos(CLzmaEnc *p, UInt32 num)
{
- #ifdef SHOW_STAT
- ttt += num;
- printf("\n MovePos %d", num);
- #endif
- if (num != 0)
- {
- p->additionalOffset += num;
- p->matchFinder.Skip(p->matchFinderObj, num);
- }
+ #ifdef SHOW_STAT
+ ttt += num;
+ printf("\n MovePos %d", num);
+ #endif
+ if (num != 0)
+ {
+ p->additionalOffset += num;
+ p->matchFinder.Skip(p->matchFinderObj, num);
+ }
}
static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes)
{
- UInt32 lenRes = 0, numPairs;
- p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
- numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches);
- #ifdef SHOW_STAT
- printf("\n i = %d numPairs = %d ", ttt, numPairs / 2);
- ttt++;
- {
- UInt32 i;
- for (i = 0; i < numPairs; i += 2)
- printf("%2d %6d | ", p->matches[i], p->matches[i + 1]);
- }
- #endif
- if (numPairs > 0)
- {
- lenRes = p->matches[numPairs - 2];
- if (lenRes == p->numFastBytes)
- {
- const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
- UInt32 distance = p->matches[numPairs - 1] + 1;
- UInt32 numAvail = p->numAvail;
- if (numAvail > LZMA_MATCH_LEN_MAX)
- numAvail = LZMA_MATCH_LEN_MAX;
- {
- const Byte *pby2 = pby - distance;
- for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++);
- }
- }
- }
- p->additionalOffset++;
- *numDistancePairsRes = numPairs;
- return lenRes;
+ UInt32 lenRes = 0, numPairs;
+ p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
+ numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches);
+ #ifdef SHOW_STAT
+ printf("\n i = %d numPairs = %d ", ttt, numPairs / 2);
+ ttt++;
+ {
+ UInt32 i;
+ for (i = 0; i < numPairs; i += 2)
+ printf("%2d %6d | ", p->matches[i], p->matches[i + 1]);
+ }
+ #endif
+ if (numPairs > 0)
+ {
+ lenRes = p->matches[numPairs - 2];
+ if (lenRes == p->numFastBytes)
+ {
+ const Byte *pby = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+ UInt32 distance = p->matches[numPairs - 1] + 1;
+ UInt32 numAvail = p->numAvail;
+ if (numAvail > LZMA_MATCH_LEN_MAX)
+ numAvail = LZMA_MATCH_LEN_MAX;
+ {
+ const Byte *pby2 = pby - distance;
+ for (; lenRes < numAvail && pby[lenRes] == pby2[lenRes]; lenRes++);
+ }
+ }
+ }
+ p->additionalOffset++;
+ *numDistancePairsRes = numPairs;
+ return lenRes;
}
@@ -863,1414 +863,1414 @@ static UInt32 ReadMatchDistances(CLzmaEnc *p, UInt32 *numDistancePairsRes)
static UInt32 GetRepLen1Price(CLzmaEnc *p, UInt32 state, UInt32 posState)
{
- return
- GET_PRICE_0(p->isRepG0[state]) +
- GET_PRICE_0(p->isRep0Long[state][posState]);
+ return
+ GET_PRICE_0(p->isRepG0[state]) +
+ GET_PRICE_0(p->isRep0Long[state][posState]);
}
static UInt32 GetPureRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 state, UInt32 posState)
{
- UInt32 price;
- if (repIndex == 0)
- {
- price = GET_PRICE_0(p->isRepG0[state]);
- price += GET_PRICE_1(p->isRep0Long[state][posState]);
- }
- else
- {
- price = GET_PRICE_1(p->isRepG0[state]);
- if (repIndex == 1)
- price += GET_PRICE_0(p->isRepG1[state]);
- else
- {
- price += GET_PRICE_1(p->isRepG1[state]);
- price += GET_PRICE(p->isRepG2[state], repIndex - 2);
- }
- }
- return price;
+ UInt32 price;
+ if (repIndex == 0)
+ {
+ price = GET_PRICE_0(p->isRepG0[state]);
+ price += GET_PRICE_1(p->isRep0Long[state][posState]);
+ }
+ else
+ {
+ price = GET_PRICE_1(p->isRepG0[state]);
+ if (repIndex == 1)
+ price += GET_PRICE_0(p->isRepG1[state]);
+ else
+ {
+ price += GET_PRICE_1(p->isRepG1[state]);
+ price += GET_PRICE(p->isRepG2[state], repIndex - 2);
+ }
+ }
+ return price;
}
static UInt32 GetRepPrice(CLzmaEnc *p, UInt32 repIndex, UInt32 len, UInt32 state, UInt32 posState)
{
- return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] +
- GetPureRepPrice(p, repIndex, state, posState);
+ return p->repLenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN] +
+ GetPureRepPrice(p, repIndex, state, posState);
}
static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur)
{
- UInt32 posMem = p->opt[cur].posPrev;
- UInt32 backMem = p->opt[cur].backPrev;
- p->optimumEndIndex = cur;
- do
- {
- if (p->opt[cur].prev1IsChar)
- {
- MakeAsChar(&p->opt[posMem])
- p->opt[posMem].posPrev = posMem - 1;
- if (p->opt[cur].prev2)
- {
- p->opt[posMem - 1].prev1IsChar = False;
- p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2;
- p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2;
- }
- }
- {
- UInt32 posPrev = posMem;
- UInt32 backCur = backMem;
-
- backMem = p->opt[posPrev].backPrev;
- posMem = p->opt[posPrev].posPrev;
-
- p->opt[posPrev].backPrev = backCur;
- p->opt[posPrev].posPrev = cur;
- cur = posPrev;
- }
- }
- while (cur != 0);
- *backRes = p->opt[0].backPrev;
- p->optimumCurrentIndex = p->opt[0].posPrev;
- return p->optimumCurrentIndex;
+ UInt32 posMem = p->opt[cur].posPrev;
+ UInt32 backMem = p->opt[cur].backPrev;
+ p->optimumEndIndex = cur;
+ do
+ {
+ if (p->opt[cur].prev1IsChar)
+ {
+ MakeAsChar(&p->opt[posMem])
+ p->opt[posMem].posPrev = posMem - 1;
+ if (p->opt[cur].prev2)
+ {
+ p->opt[posMem - 1].prev1IsChar = False;
+ p->opt[posMem - 1].posPrev = p->opt[cur].posPrev2;
+ p->opt[posMem - 1].backPrev = p->opt[cur].backPrev2;
+ }
+ }
+ {
+ UInt32 posPrev = posMem;
+ UInt32 backCur = backMem;
+
+ backMem = p->opt[posPrev].backPrev;
+ posMem = p->opt[posPrev].posPrev;
+
+ p->opt[posPrev].backPrev = backCur;
+ p->opt[posPrev].posPrev = cur;
+ cur = posPrev;
+ }
+ }
+ while (cur != 0);
+ *backRes = p->opt[0].backPrev;
+ p->optimumCurrentIndex = p->opt[0].posPrev;
+ return p->optimumCurrentIndex;
}
#define LIT_PROBS(pos, prevByte) (p->litProbs + ((((pos) & p->lpMask) << p->lc) + ((prevByte) >> (8 - p->lc))) * 0x300)
static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes)
{
- UInt32 numAvail, mainLen, numPairs, repMaxIndex, i, posState, lenEnd, len, cur;
- UInt32 matchPrice, repMatchPrice, normalMatchPrice;
- UInt32 reps[LZMA_NUM_REPS], repLens[LZMA_NUM_REPS];
- UInt32 *matches;
- const Byte *data;
- Byte curByte, matchByte;
- if (p->optimumEndIndex != p->optimumCurrentIndex)
- {
- const COptimal *opt = &p->opt[p->optimumCurrentIndex];
- UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex;
- *backRes = opt->backPrev;
- p->optimumCurrentIndex = opt->posPrev;
- return lenRes;
- }
- p->optimumCurrentIndex = p->optimumEndIndex = 0;
-
- if (p->additionalOffset == 0)
- mainLen = ReadMatchDistances(p, &numPairs);
- else
- {
- mainLen = p->longestMatchLength;
- numPairs = p->numPairs;
- }
-
- numAvail = p->numAvail;
- if (numAvail < 2)
- {
- *backRes = (UInt32)(-1);
- return 1;
- }
- if (numAvail > LZMA_MATCH_LEN_MAX)
- numAvail = LZMA_MATCH_LEN_MAX;
-
- data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
- repMaxIndex = 0;
- for (i = 0; i < LZMA_NUM_REPS; i++)
- {
- UInt32 lenTest;
- const Byte *data2;
- reps[i] = p->reps[i];
- data2 = data - (reps[i] + 1);
- if (data[0] != data2[0] || data[1] != data2[1])
- {
- repLens[i] = 0;
- continue;
- }
- for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
- repLens[i] = lenTest;
- if (lenTest > repLens[repMaxIndex])
- repMaxIndex = i;
- }
- if (repLens[repMaxIndex] >= p->numFastBytes)
- {
- UInt32 lenRes;
- *backRes = repMaxIndex;
- lenRes = repLens[repMaxIndex];
- MovePos(p, lenRes - 1);
- return lenRes;
- }
-
- matches = p->matches;
- if (mainLen >= p->numFastBytes)
- {
- *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
- MovePos(p, mainLen - 1);
- return mainLen;
- }
- curByte = *data;
- matchByte = *(data - (reps[0] + 1));
-
- if (mainLen < 2 && curByte != matchByte && repLens[repMaxIndex] < 2)
- {
- *backRes = (UInt32)-1;
- return 1;
- }
-
- p->opt[0].state = (CState)p->state;
-
- posState = (position & p->pbMask);
-
- {
- const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
- p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) +
- (!IsCharState(p->state) ?
- LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
- LitEnc_GetPrice(probs, curByte, p->ProbPrices));
- }
-
- MakeAsChar(&p->opt[1]);
-
- matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]);
- repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]);
-
- if (matchByte == curByte)
- {
- UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState);
- if (shortRepPrice < p->opt[1].price)
- {
- p->opt[1].price = shortRepPrice;
- MakeAsShortRep(&p->opt[1]);
- }
- }
- lenEnd = ((mainLen >= repLens[repMaxIndex]) ? mainLen : repLens[repMaxIndex]);
-
- if (lenEnd < 2)
- {
- *backRes = p->opt[1].backPrev;
- return 1;
- }
-
- p->opt[1].posPrev = 0;
- for (i = 0; i < LZMA_NUM_REPS; i++)
- p->opt[0].backs[i] = reps[i];
-
- len = lenEnd;
- do
- p->opt[len--].price = kInfinityPrice;
- while (len >= 2);
-
- for (i = 0; i < LZMA_NUM_REPS; i++)
- {
- UInt32 repLen = repLens[i];
- UInt32 price;
- if (repLen < 2)
- continue;
- price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState);
- do
- {
- UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2];
- COptimal *opt = &p->opt[repLen];
- if (curAndLenPrice < opt->price)
- {
- opt->price = curAndLenPrice;
- opt->posPrev = 0;
- opt->backPrev = i;
- opt->prev1IsChar = False;
- }
- }
- while (--repLen >= 2);
- }
-
- normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]);
-
- len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2);
- if (len <= mainLen)
- {
- UInt32 offs = 0;
- while (len > matches[offs])
- offs += 2;
- for (; ; len++)
- {
- COptimal *opt;
- UInt32 distance = matches[offs + 1];
-
- UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN];
- UInt32 lenToPosState = GetLenToPosState(len);
- if (distance < kNumFullDistances)
- curAndLenPrice += p->distancesPrices[lenToPosState][distance];
- else
- {
- UInt32 slot;
- GetPosSlot2(distance, slot);
- curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot];
- }
- opt = &p->opt[len];
- if (curAndLenPrice < opt->price)
- {
- opt->price = curAndLenPrice;
- opt->posPrev = 0;
- opt->backPrev = distance + LZMA_NUM_REPS;
- opt->prev1IsChar = False;
- }
- if (len == matches[offs])
- {
- offs += 2;
- if (offs == numPairs)
- break;
- }
- }
- }
-
- cur = 0;
-
- #ifdef SHOW_STAT2
- if (position >= 0)
- {
- unsigned i;
- printf("\n pos = %4X", position);
- for (i = cur; i <= lenEnd; i++)
- printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price);
- }
- #endif
-
- for (;;)
- {
- UInt32 numAvailFull, newLen, numPairs, posPrev, state, posState, startLen;
- UInt32 curPrice, curAnd1Price, matchPrice, repMatchPrice;
- Bool nextIsChar;
- Byte curByte, matchByte;
- const Byte *data;
- COptimal *curOpt;
- COptimal *nextOpt;
-
- cur++;
- if (cur == lenEnd)
- return Backward(p, backRes, cur);
-
- newLen = ReadMatchDistances(p, &numPairs);
- if (newLen >= p->numFastBytes)
- {
- p->numPairs = numPairs;
- p->longestMatchLength = newLen;
- return Backward(p, backRes, cur);
- }
- position++;
- curOpt = &p->opt[cur];
- posPrev = curOpt->posPrev;
- if (curOpt->prev1IsChar)
- {
- posPrev--;
- if (curOpt->prev2)
- {
- state = p->opt[curOpt->posPrev2].state;
- if (curOpt->backPrev2 < LZMA_NUM_REPS)
- state = kRepNextStates[state];
- else
- state = kMatchNextStates[state];
- }
- else
- state = p->opt[posPrev].state;
- state = kLiteralNextStates[state];
- }
- else
- state = p->opt[posPrev].state;
- if (posPrev == cur - 1)
- {
- if (IsShortRep(curOpt))
- state = kShortRepNextStates[state];
- else
- state = kLiteralNextStates[state];
- }
- else
- {
- UInt32 pos;
- const COptimal *prevOpt;
- if (curOpt->prev1IsChar && curOpt->prev2)
- {
- posPrev = curOpt->posPrev2;
- pos = curOpt->backPrev2;
- state = kRepNextStates[state];
- }
- else
- {
- pos = curOpt->backPrev;
- if (pos < LZMA_NUM_REPS)
- state = kRepNextStates[state];
- else
- state = kMatchNextStates[state];
- }
- prevOpt = &p->opt[posPrev];
- if (pos < LZMA_NUM_REPS)
- {
- UInt32 i;
- reps[0] = prevOpt->backs[pos];
- for (i = 1; i <= pos; i++)
- reps[i] = prevOpt->backs[i - 1];
- for (; i < LZMA_NUM_REPS; i++)
- reps[i] = prevOpt->backs[i];
- }
- else
- {
- UInt32 i;
- reps[0] = (pos - LZMA_NUM_REPS);
- for (i = 1; i < LZMA_NUM_REPS; i++)
- reps[i] = prevOpt->backs[i - 1];
- }
- }
- curOpt->state = (CState)state;
-
- curOpt->backs[0] = reps[0];
- curOpt->backs[1] = reps[1];
- curOpt->backs[2] = reps[2];
- curOpt->backs[3] = reps[3];
-
- curPrice = curOpt->price;
- nextIsChar = False;
- data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
- curByte = *data;
- matchByte = *(data - (reps[0] + 1));
-
- posState = (position & p->pbMask);
-
- curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]);
- {
- const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
- curAnd1Price +=
- (!IsCharState(state) ?
- LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
- LitEnc_GetPrice(probs, curByte, p->ProbPrices));
- }
-
- nextOpt = &p->opt[cur + 1];
-
- if (curAnd1Price < nextOpt->price)
- {
- nextOpt->price = curAnd1Price;
- nextOpt->posPrev = cur;
- MakeAsChar(nextOpt);
- nextIsChar = True;
- }
-
- matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]);
- repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]);
-
- if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0))
- {
- UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState);
- if (shortRepPrice <= nextOpt->price)
- {
- nextOpt->price = shortRepPrice;
- nextOpt->posPrev = cur;
- MakeAsShortRep(nextOpt);
- nextIsChar = True;
- }
- }
- numAvailFull = p->numAvail;
- {
- UInt32 temp = kNumOpts - 1 - cur;
- if (temp < numAvailFull)
- numAvailFull = temp;
- }
-
- if (numAvailFull < 2)
- continue;
- numAvail = (numAvailFull <= p->numFastBytes ? numAvailFull : p->numFastBytes);
-
- if (!nextIsChar && matchByte != curByte) /* speed optimization */
- {
- /* try Literal + rep0 */
- UInt32 temp;
- UInt32 lenTest2;
- const Byte *data2 = data - (reps[0] + 1);
- UInt32 limit = p->numFastBytes + 1;
- if (limit > numAvailFull)
- limit = numAvailFull;
-
- for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++);
- lenTest2 = temp - 1;
- if (lenTest2 >= 2)
- {
- UInt32 state2 = kLiteralNextStates[state];
- UInt32 posStateNext = (position + 1) & p->pbMask;
- UInt32 nextRepMatchPrice = curAnd1Price +
- GET_PRICE_1(p->isMatch[state2][posStateNext]) +
- GET_PRICE_1(p->isRep[state2]);
- /* for (; lenTest2 >= 2; lenTest2--) */
- {
- UInt32 curAndLenPrice;
- COptimal *opt;
- UInt32 offset = cur + 1 + lenTest2;
- while (lenEnd < offset)
- p->opt[++lenEnd].price = kInfinityPrice;
- curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
- opt = &p->opt[offset];
- if (curAndLenPrice < opt->price)
- {
- opt->price = curAndLenPrice;
- opt->posPrev = cur + 1;
- opt->backPrev = 0;
- opt->prev1IsChar = True;
- opt->prev2 = False;
- }
- }
- }
- }
-
- startLen = 2; /* speed optimization */
- {
- UInt32 repIndex;
- for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++)
- {
- UInt32 lenTest;
- UInt32 lenTestTemp;
- UInt32 price;
- const Byte *data2 = data - (reps[repIndex] + 1);
- if (data[0] != data2[0] || data[1] != data2[1])
- continue;
- for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
- while (lenEnd < cur + lenTest)
- p->opt[++lenEnd].price = kInfinityPrice;
- lenTestTemp = lenTest;
- price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState);
- do
- {
- UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2];
- COptimal *opt = &p->opt[cur + lenTest];
- if (curAndLenPrice < opt->price)
- {
- opt->price = curAndLenPrice;
- opt->posPrev = cur;
- opt->backPrev = repIndex;
- opt->prev1IsChar = False;
- }
- }
- while (--lenTest >= 2);
- lenTest = lenTestTemp;
-
- if (repIndex == 0)
- startLen = lenTest + 1;
-
- /* if (_maxMode) */
- {
- UInt32 lenTest2 = lenTest + 1;
- UInt32 limit = lenTest2 + p->numFastBytes;
- UInt32 nextRepMatchPrice;
- if (limit > numAvailFull)
- limit = numAvailFull;
- for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
- lenTest2 -= lenTest + 1;
- if (lenTest2 >= 2)
- {
- UInt32 state2 = kRepNextStates[state];
- UInt32 posStateNext = (position + lenTest) & p->pbMask;
- UInt32 curAndLenCharPrice =
- price + p->repLenEnc.prices[posState][lenTest - 2] +
- GET_PRICE_0(p->isMatch[state2][posStateNext]) +
- LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
- data[lenTest], data2[lenTest], p->ProbPrices);
- state2 = kLiteralNextStates[state2];
- posStateNext = (position + lenTest + 1) & p->pbMask;
- nextRepMatchPrice = curAndLenCharPrice +
- GET_PRICE_1(p->isMatch[state2][posStateNext]) +
- GET_PRICE_1(p->isRep[state2]);
-
- /* for (; lenTest2 >= 2; lenTest2--) */
- {
- UInt32 curAndLenPrice;
- COptimal *opt;
- UInt32 offset = cur + lenTest + 1 + lenTest2;
- while (lenEnd < offset)
- p->opt[++lenEnd].price = kInfinityPrice;
- curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
- opt = &p->opt[offset];
- if (curAndLenPrice < opt->price)
- {
- opt->price = curAndLenPrice;
- opt->posPrev = cur + lenTest + 1;
- opt->backPrev = 0;
- opt->prev1IsChar = True;
- opt->prev2 = True;
- opt->posPrev2 = cur;
- opt->backPrev2 = repIndex;
- }
- }
- }
- }
- }
- }
- /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */
- if (newLen > numAvail)
- {
- newLen = numAvail;
- for (numPairs = 0; newLen > matches[numPairs]; numPairs += 2);
- matches[numPairs] = newLen;
- numPairs += 2;
- }
- if (newLen >= startLen)
- {
- UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]);
- UInt32 offs, curBack, posSlot;
- UInt32 lenTest;
- while (lenEnd < cur + newLen)
- p->opt[++lenEnd].price = kInfinityPrice;
-
- offs = 0;
- while (startLen > matches[offs])
- offs += 2;
- curBack = matches[offs + 1];
- GetPosSlot2(curBack, posSlot);
- for (lenTest = /*2*/ startLen; ; lenTest++)
- {
- UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN];
- UInt32 lenToPosState = GetLenToPosState(lenTest);
- COptimal *opt;
- if (curBack < kNumFullDistances)
- curAndLenPrice += p->distancesPrices[lenToPosState][curBack];
- else
- curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask];
-
- opt = &p->opt[cur + lenTest];
- if (curAndLenPrice < opt->price)
- {
- opt->price = curAndLenPrice;
- opt->posPrev = cur;
- opt->backPrev = curBack + LZMA_NUM_REPS;
- opt->prev1IsChar = False;
- }
-
- if (/*_maxMode && */lenTest == matches[offs])
- {
- /* Try Match + Literal + Rep0 */
- const Byte *data2 = data - (curBack + 1);
- UInt32 lenTest2 = lenTest + 1;
- UInt32 limit = lenTest2 + p->numFastBytes;
- UInt32 nextRepMatchPrice;
- if (limit > numAvailFull)
- limit = numAvailFull;
- for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
- lenTest2 -= lenTest + 1;
- if (lenTest2 >= 2)
- {
- UInt32 state2 = kMatchNextStates[state];
- UInt32 posStateNext = (position + lenTest) & p->pbMask;
- UInt32 curAndLenCharPrice = curAndLenPrice +
- GET_PRICE_0(p->isMatch[state2][posStateNext]) +
- LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
- data[lenTest], data2[lenTest], p->ProbPrices);
- state2 = kLiteralNextStates[state2];
- posStateNext = (posStateNext + 1) & p->pbMask;
- nextRepMatchPrice = curAndLenCharPrice +
- GET_PRICE_1(p->isMatch[state2][posStateNext]) +
- GET_PRICE_1(p->isRep[state2]);
-
- /* for (; lenTest2 >= 2; lenTest2--) */
- {
- UInt32 offset = cur + lenTest + 1 + lenTest2;
- UInt32 curAndLenPrice;
- COptimal *opt;
- while (lenEnd < offset)
- p->opt[++lenEnd].price = kInfinityPrice;
- curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
- opt = &p->opt[offset];
- if (curAndLenPrice < opt->price)
- {
- opt->price = curAndLenPrice;
- opt->posPrev = cur + lenTest + 1;
- opt->backPrev = 0;
- opt->prev1IsChar = True;
- opt->prev2 = True;
- opt->posPrev2 = cur;
- opt->backPrev2 = curBack + LZMA_NUM_REPS;
- }
- }
- }
- offs += 2;
- if (offs == numPairs)
- break;
- curBack = matches[offs + 1];
- if (curBack >= kNumFullDistances)
- GetPosSlot2(curBack, posSlot);
- }
- }
- }
- }
+ UInt32 numAvail, mainLen, numPairs, repMaxIndex, i, posState, lenEnd, len, cur;
+ UInt32 matchPrice, repMatchPrice, normalMatchPrice;
+ UInt32 reps[LZMA_NUM_REPS], repLens[LZMA_NUM_REPS];
+ UInt32 *matches;
+ const Byte *data;
+ Byte curByte, matchByte;
+ if (p->optimumEndIndex != p->optimumCurrentIndex)
+ {
+ const COptimal *opt = &p->opt[p->optimumCurrentIndex];
+ UInt32 lenRes = opt->posPrev - p->optimumCurrentIndex;
+ *backRes = opt->backPrev;
+ p->optimumCurrentIndex = opt->posPrev;
+ return lenRes;
+ }
+ p->optimumCurrentIndex = p->optimumEndIndex = 0;
+
+ if (p->additionalOffset == 0)
+ mainLen = ReadMatchDistances(p, &numPairs);
+ else
+ {
+ mainLen = p->longestMatchLength;
+ numPairs = p->numPairs;
+ }
+
+ numAvail = p->numAvail;
+ if (numAvail < 2)
+ {
+ *backRes = (UInt32)(-1);
+ return 1;
+ }
+ if (numAvail > LZMA_MATCH_LEN_MAX)
+ numAvail = LZMA_MATCH_LEN_MAX;
+
+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+ repMaxIndex = 0;
+ for (i = 0; i < LZMA_NUM_REPS; i++)
+ {
+ UInt32 lenTest;
+ const Byte *data2;
+ reps[i] = p->reps[i];
+ data2 = data - (reps[i] + 1);
+ if (data[0] != data2[0] || data[1] != data2[1])
+ {
+ repLens[i] = 0;
+ continue;
+ }
+ for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
+ repLens[i] = lenTest;
+ if (lenTest > repLens[repMaxIndex])
+ repMaxIndex = i;
+ }
+ if (repLens[repMaxIndex] >= p->numFastBytes)
+ {
+ UInt32 lenRes;
+ *backRes = repMaxIndex;
+ lenRes = repLens[repMaxIndex];
+ MovePos(p, lenRes - 1);
+ return lenRes;
+ }
+
+ matches = p->matches;
+ if (mainLen >= p->numFastBytes)
+ {
+ *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
+ MovePos(p, mainLen - 1);
+ return mainLen;
+ }
+ curByte = *data;
+ matchByte = *(data - (reps[0] + 1));
+
+ if (mainLen < 2 && curByte != matchByte && repLens[repMaxIndex] < 2)
+ {
+ *backRes = (UInt32)-1;
+ return 1;
+ }
+
+ p->opt[0].state = (CState)p->state;
+
+ posState = (position & p->pbMask);
+
+ {
+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
+ p->opt[1].price = GET_PRICE_0(p->isMatch[p->state][posState]) +
+ (!IsCharState(p->state) ?
+ LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
+ LitEnc_GetPrice(probs, curByte, p->ProbPrices));
+ }
+
+ MakeAsChar(&p->opt[1]);
+
+ matchPrice = GET_PRICE_1(p->isMatch[p->state][posState]);
+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[p->state]);
+
+ if (matchByte == curByte)
+ {
+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, p->state, posState);
+ if (shortRepPrice < p->opt[1].price)
+ {
+ p->opt[1].price = shortRepPrice;
+ MakeAsShortRep(&p->opt[1]);
+ }
+ }
+ lenEnd = ((mainLen >= repLens[repMaxIndex]) ? mainLen : repLens[repMaxIndex]);
+
+ if (lenEnd < 2)
+ {
+ *backRes = p->opt[1].backPrev;
+ return 1;
+ }
+
+ p->opt[1].posPrev = 0;
+ for (i = 0; i < LZMA_NUM_REPS; i++)
+ p->opt[0].backs[i] = reps[i];
+
+ len = lenEnd;
+ do
+ p->opt[len--].price = kInfinityPrice;
+ while (len >= 2);
+
+ for (i = 0; i < LZMA_NUM_REPS; i++)
+ {
+ UInt32 repLen = repLens[i];
+ UInt32 price;
+ if (repLen < 2)
+ continue;
+ price = repMatchPrice + GetPureRepPrice(p, i, p->state, posState);
+ do
+ {
+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][repLen - 2];
+ COptimal *opt = &p->opt[repLen];
+ if (curAndLenPrice < opt->price)
+ {
+ opt->price = curAndLenPrice;
+ opt->posPrev = 0;
+ opt->backPrev = i;
+ opt->prev1IsChar = False;
+ }
+ }
+ while (--repLen >= 2);
+ }
+
+ normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[p->state]);
+
+ len = ((repLens[0] >= 2) ? repLens[0] + 1 : 2);
+ if (len <= mainLen)
+ {
+ UInt32 offs = 0;
+ while (len > matches[offs])
+ offs += 2;
+ for (; ; len++)
+ {
+ COptimal *opt;
+ UInt32 distance = matches[offs + 1];
+
+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][len - LZMA_MATCH_LEN_MIN];
+ UInt32 lenToPosState = GetLenToPosState(len);
+ if (distance < kNumFullDistances)
+ curAndLenPrice += p->distancesPrices[lenToPosState][distance];
+ else
+ {
+ UInt32 slot;
+ GetPosSlot2(distance, slot);
+ curAndLenPrice += p->alignPrices[distance & kAlignMask] + p->posSlotPrices[lenToPosState][slot];
+ }
+ opt = &p->opt[len];
+ if (curAndLenPrice < opt->price)
+ {
+ opt->price = curAndLenPrice;
+ opt->posPrev = 0;
+ opt->backPrev = distance + LZMA_NUM_REPS;
+ opt->prev1IsChar = False;
+ }
+ if (len == matches[offs])
+ {
+ offs += 2;
+ if (offs == numPairs)
+ break;
+ }
+ }
+ }
+
+ cur = 0;
+
+ #ifdef SHOW_STAT2
+ if (position >= 0)
+ {
+ unsigned i;
+ printf("\n pos = %4X", position);
+ for (i = cur; i <= lenEnd; i++)
+ printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price);
+ }
+ #endif
+
+ for (;;)
+ {
+ UInt32 numAvailFull, newLen, numPairs, posPrev, state, posState, startLen;
+ UInt32 curPrice, curAnd1Price, matchPrice, repMatchPrice;
+ Bool nextIsChar;
+ Byte curByte, matchByte;
+ const Byte *data;
+ COptimal *curOpt;
+ COptimal *nextOpt;
+
+ cur++;
+ if (cur == lenEnd)
+ return Backward(p, backRes, cur);
+
+ newLen = ReadMatchDistances(p, &numPairs);
+ if (newLen >= p->numFastBytes)
+ {
+ p->numPairs = numPairs;
+ p->longestMatchLength = newLen;
+ return Backward(p, backRes, cur);
+ }
+ position++;
+ curOpt = &p->opt[cur];
+ posPrev = curOpt->posPrev;
+ if (curOpt->prev1IsChar)
+ {
+ posPrev--;
+ if (curOpt->prev2)
+ {
+ state = p->opt[curOpt->posPrev2].state;
+ if (curOpt->backPrev2 < LZMA_NUM_REPS)
+ state = kRepNextStates[state];
+ else
+ state = kMatchNextStates[state];
+ }
+ else
+ state = p->opt[posPrev].state;
+ state = kLiteralNextStates[state];
+ }
+ else
+ state = p->opt[posPrev].state;
+ if (posPrev == cur - 1)
+ {
+ if (IsShortRep(curOpt))
+ state = kShortRepNextStates[state];
+ else
+ state = kLiteralNextStates[state];
+ }
+ else
+ {
+ UInt32 pos;
+ const COptimal *prevOpt;
+ if (curOpt->prev1IsChar && curOpt->prev2)
+ {
+ posPrev = curOpt->posPrev2;
+ pos = curOpt->backPrev2;
+ state = kRepNextStates[state];
+ }
+ else
+ {
+ pos = curOpt->backPrev;
+ if (pos < LZMA_NUM_REPS)
+ state = kRepNextStates[state];
+ else
+ state = kMatchNextStates[state];
+ }
+ prevOpt = &p->opt[posPrev];
+ if (pos < LZMA_NUM_REPS)
+ {
+ UInt32 i;
+ reps[0] = prevOpt->backs[pos];
+ for (i = 1; i <= pos; i++)
+ reps[i] = prevOpt->backs[i - 1];
+ for (; i < LZMA_NUM_REPS; i++)
+ reps[i] = prevOpt->backs[i];
+ }
+ else
+ {
+ UInt32 i;
+ reps[0] = (pos - LZMA_NUM_REPS);
+ for (i = 1; i < LZMA_NUM_REPS; i++)
+ reps[i] = prevOpt->backs[i - 1];
+ }
+ }
+ curOpt->state = (CState)state;
+
+ curOpt->backs[0] = reps[0];
+ curOpt->backs[1] = reps[1];
+ curOpt->backs[2] = reps[2];
+ curOpt->backs[3] = reps[3];
+
+ curPrice = curOpt->price;
+ nextIsChar = False;
+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+ curByte = *data;
+ matchByte = *(data - (reps[0] + 1));
+
+ posState = (position & p->pbMask);
+
+ curAnd1Price = curPrice + GET_PRICE_0(p->isMatch[state][posState]);
+ {
+ const CLzmaProb *probs = LIT_PROBS(position, *(data - 1));
+ curAnd1Price +=
+ (!IsCharState(state) ?
+ LitEnc_GetPriceMatched(probs, curByte, matchByte, p->ProbPrices) :
+ LitEnc_GetPrice(probs, curByte, p->ProbPrices));
+ }
+
+ nextOpt = &p->opt[cur + 1];
+
+ if (curAnd1Price < nextOpt->price)
+ {
+ nextOpt->price = curAnd1Price;
+ nextOpt->posPrev = cur;
+ MakeAsChar(nextOpt);
+ nextIsChar = True;
+ }
+
+ matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]);
+ repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]);
+
+ if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0))
+ {
+ UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState);
+ if (shortRepPrice <= nextOpt->price)
+ {
+ nextOpt->price = shortRepPrice;
+ nextOpt->posPrev = cur;
+ MakeAsShortRep(nextOpt);
+ nextIsChar = True;
+ }
+ }
+ numAvailFull = p->numAvail;
+ {
+ UInt32 temp = kNumOpts - 1 - cur;
+ if (temp < numAvailFull)
+ numAvailFull = temp;
+ }
+
+ if (numAvailFull < 2)
+ continue;
+ numAvail = (numAvailFull <= p->numFastBytes ? numAvailFull : p->numFastBytes);
+
+ if (!nextIsChar && matchByte != curByte) /* speed optimization */
+ {
+ /* try Literal + rep0 */
+ UInt32 temp;
+ UInt32 lenTest2;
+ const Byte *data2 = data - (reps[0] + 1);
+ UInt32 limit = p->numFastBytes + 1;
+ if (limit > numAvailFull)
+ limit = numAvailFull;
+
+ for (temp = 1; temp < limit && data[temp] == data2[temp]; temp++);
+ lenTest2 = temp - 1;
+ if (lenTest2 >= 2)
+ {
+ UInt32 state2 = kLiteralNextStates[state];
+ UInt32 posStateNext = (position + 1) & p->pbMask;
+ UInt32 nextRepMatchPrice = curAnd1Price +
+ GET_PRICE_1(p->isMatch[state2][posStateNext]) +
+ GET_PRICE_1(p->isRep[state2]);
+ /* for (; lenTest2 >= 2; lenTest2--) */
+ {
+ UInt32 curAndLenPrice;
+ COptimal *opt;
+ UInt32 offset = cur + 1 + lenTest2;
+ while (lenEnd < offset)
+ p->opt[++lenEnd].price = kInfinityPrice;
+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
+ opt = &p->opt[offset];
+ if (curAndLenPrice < opt->price)
+ {
+ opt->price = curAndLenPrice;
+ opt->posPrev = cur + 1;
+ opt->backPrev = 0;
+ opt->prev1IsChar = True;
+ opt->prev2 = False;
+ }
+ }
+ }
+ }
+
+ startLen = 2; /* speed optimization */
+ {
+ UInt32 repIndex;
+ for (repIndex = 0; repIndex < LZMA_NUM_REPS; repIndex++)
+ {
+ UInt32 lenTest;
+ UInt32 lenTestTemp;
+ UInt32 price;
+ const Byte *data2 = data - (reps[repIndex] + 1);
+ if (data[0] != data2[0] || data[1] != data2[1])
+ continue;
+ for (lenTest = 2; lenTest < numAvail && data[lenTest] == data2[lenTest]; lenTest++);
+ while (lenEnd < cur + lenTest)
+ p->opt[++lenEnd].price = kInfinityPrice;
+ lenTestTemp = lenTest;
+ price = repMatchPrice + GetPureRepPrice(p, repIndex, state, posState);
+ do
+ {
+ UInt32 curAndLenPrice = price + p->repLenEnc.prices[posState][lenTest - 2];
+ COptimal *opt = &p->opt[cur + lenTest];
+ if (curAndLenPrice < opt->price)
+ {
+ opt->price = curAndLenPrice;
+ opt->posPrev = cur;
+ opt->backPrev = repIndex;
+ opt->prev1IsChar = False;
+ }
+ }
+ while (--lenTest >= 2);
+ lenTest = lenTestTemp;
+
+ if (repIndex == 0)
+ startLen = lenTest + 1;
+
+ /* if (_maxMode) */
+ {
+ UInt32 lenTest2 = lenTest + 1;
+ UInt32 limit = lenTest2 + p->numFastBytes;
+ UInt32 nextRepMatchPrice;
+ if (limit > numAvailFull)
+ limit = numAvailFull;
+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
+ lenTest2 -= lenTest + 1;
+ if (lenTest2 >= 2)
+ {
+ UInt32 state2 = kRepNextStates[state];
+ UInt32 posStateNext = (position + lenTest) & p->pbMask;
+ UInt32 curAndLenCharPrice =
+ price + p->repLenEnc.prices[posState][lenTest - 2] +
+ GET_PRICE_0(p->isMatch[state2][posStateNext]) +
+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
+ data[lenTest], data2[lenTest], p->ProbPrices);
+ state2 = kLiteralNextStates[state2];
+ posStateNext = (position + lenTest + 1) & p->pbMask;
+ nextRepMatchPrice = curAndLenCharPrice +
+ GET_PRICE_1(p->isMatch[state2][posStateNext]) +
+ GET_PRICE_1(p->isRep[state2]);
+
+ /* for (; lenTest2 >= 2; lenTest2--) */
+ {
+ UInt32 curAndLenPrice;
+ COptimal *opt;
+ UInt32 offset = cur + lenTest + 1 + lenTest2;
+ while (lenEnd < offset)
+ p->opt[++lenEnd].price = kInfinityPrice;
+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
+ opt = &p->opt[offset];
+ if (curAndLenPrice < opt->price)
+ {
+ opt->price = curAndLenPrice;
+ opt->posPrev = cur + lenTest + 1;
+ opt->backPrev = 0;
+ opt->prev1IsChar = True;
+ opt->prev2 = True;
+ opt->posPrev2 = cur;
+ opt->backPrev2 = repIndex;
+ }
+ }
+ }
+ }
+ }
+ }
+ /* for (UInt32 lenTest = 2; lenTest <= newLen; lenTest++) */
+ if (newLen > numAvail)
+ {
+ newLen = numAvail;
+ for (numPairs = 0; newLen > matches[numPairs]; numPairs += 2);
+ matches[numPairs] = newLen;
+ numPairs += 2;
+ }
+ if (newLen >= startLen)
+ {
+ UInt32 normalMatchPrice = matchPrice + GET_PRICE_0(p->isRep[state]);
+ UInt32 offs, curBack, posSlot;
+ UInt32 lenTest;
+ while (lenEnd < cur + newLen)
+ p->opt[++lenEnd].price = kInfinityPrice;
+
+ offs = 0;
+ while (startLen > matches[offs])
+ offs += 2;
+ curBack = matches[offs + 1];
+ GetPosSlot2(curBack, posSlot);
+ for (lenTest = /*2*/ startLen; ; lenTest++)
+ {
+ UInt32 curAndLenPrice = normalMatchPrice + p->lenEnc.prices[posState][lenTest - LZMA_MATCH_LEN_MIN];
+ UInt32 lenToPosState = GetLenToPosState(lenTest);
+ COptimal *opt;
+ if (curBack < kNumFullDistances)
+ curAndLenPrice += p->distancesPrices[lenToPosState][curBack];
+ else
+ curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask];
+
+ opt = &p->opt[cur + lenTest];
+ if (curAndLenPrice < opt->price)
+ {
+ opt->price = curAndLenPrice;
+ opt->posPrev = cur;
+ opt->backPrev = curBack + LZMA_NUM_REPS;
+ opt->prev1IsChar = False;
+ }
+
+ if (/*_maxMode && */lenTest == matches[offs])
+ {
+ /* Try Match + Literal + Rep0 */
+ const Byte *data2 = data - (curBack + 1);
+ UInt32 lenTest2 = lenTest + 1;
+ UInt32 limit = lenTest2 + p->numFastBytes;
+ UInt32 nextRepMatchPrice;
+ if (limit > numAvailFull)
+ limit = numAvailFull;
+ for (; lenTest2 < limit && data[lenTest2] == data2[lenTest2]; lenTest2++);
+ lenTest2 -= lenTest + 1;
+ if (lenTest2 >= 2)
+ {
+ UInt32 state2 = kMatchNextStates[state];
+ UInt32 posStateNext = (position + lenTest) & p->pbMask;
+ UInt32 curAndLenCharPrice = curAndLenPrice +
+ GET_PRICE_0(p->isMatch[state2][posStateNext]) +
+ LitEnc_GetPriceMatched(LIT_PROBS(position + lenTest, data[lenTest - 1]),
+ data[lenTest], data2[lenTest], p->ProbPrices);
+ state2 = kLiteralNextStates[state2];
+ posStateNext = (posStateNext + 1) & p->pbMask;
+ nextRepMatchPrice = curAndLenCharPrice +
+ GET_PRICE_1(p->isMatch[state2][posStateNext]) +
+ GET_PRICE_1(p->isRep[state2]);
+
+ /* for (; lenTest2 >= 2; lenTest2--) */
+ {
+ UInt32 offset = cur + lenTest + 1 + lenTest2;
+ UInt32 curAndLenPrice;
+ COptimal *opt;
+ while (lenEnd < offset)
+ p->opt[++lenEnd].price = kInfinityPrice;
+ curAndLenPrice = nextRepMatchPrice + GetRepPrice(p, 0, lenTest2, state2, posStateNext);
+ opt = &p->opt[offset];
+ if (curAndLenPrice < opt->price)
+ {
+ opt->price = curAndLenPrice;
+ opt->posPrev = cur + lenTest + 1;
+ opt->backPrev = 0;
+ opt->prev1IsChar = True;
+ opt->prev2 = True;
+ opt->posPrev2 = cur;
+ opt->backPrev2 = curBack + LZMA_NUM_REPS;
+ }
+ }
+ }
+ offs += 2;
+ if (offs == numPairs)
+ break;
+ curBack = matches[offs + 1];
+ if (curBack >= kNumFullDistances)
+ GetPosSlot2(curBack, posSlot);
+ }
+ }
+ }
+ }
}
#define ChangePair(smallDist, bigDist) (((bigDist) >> 7) > (smallDist))
static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes)
{
- UInt32 numAvail, mainLen, mainDist, numPairs, repIndex, repLen, i;
- const Byte *data;
- const UInt32 *matches;
-
- if (p->additionalOffset == 0)
- mainLen = ReadMatchDistances(p, &numPairs);
- else
- {
- mainLen = p->longestMatchLength;
- numPairs = p->numPairs;
- }
-
- numAvail = p->numAvail;
- *backRes = (UInt32)-1;
- if (numAvail < 2)
- return 1;
- if (numAvail > LZMA_MATCH_LEN_MAX)
- numAvail = LZMA_MATCH_LEN_MAX;
- data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
-
- repLen = repIndex = 0;
- for (i = 0; i < LZMA_NUM_REPS; i++)
- {
- UInt32 len;
- const Byte *data2 = data - (p->reps[i] + 1);
- if (data[0] != data2[0] || data[1] != data2[1])
- continue;
- for (len = 2; len < numAvail && data[len] == data2[len]; len++);
- if (len >= p->numFastBytes)
- {
- *backRes = i;
- MovePos(p, len - 1);
- return len;
- }
- if (len > repLen)
- {
- repIndex = i;
- repLen = len;
- }
- }
-
- matches = p->matches;
- if (mainLen >= p->numFastBytes)
- {
- *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
- MovePos(p, mainLen - 1);
- return mainLen;
- }
-
- mainDist = 0; /* for GCC */
- if (mainLen >= 2)
- {
- mainDist = matches[numPairs - 1];
- while (numPairs > 2 && mainLen == matches[numPairs - 4] + 1)
- {
- if (!ChangePair(matches[numPairs - 3], mainDist))
- break;
- numPairs -= 2;
- mainLen = matches[numPairs - 2];
- mainDist = matches[numPairs - 1];
- }
- if (mainLen == 2 && mainDist >= 0x80)
- mainLen = 1;
- }
-
- if (repLen >= 2 && (
- (repLen + 1 >= mainLen) ||
- (repLen + 2 >= mainLen && mainDist >= (1 << 9)) ||
- (repLen + 3 >= mainLen && mainDist >= (1 << 15))))
- {
- *backRes = repIndex;
- MovePos(p, repLen - 1);
- return repLen;
- }
-
- if (mainLen < 2 || numAvail <= 2)
- return 1;
-
- p->longestMatchLength = ReadMatchDistances(p, &p->numPairs);
- if (p->longestMatchLength >= 2)
- {
- UInt32 newDistance = matches[p->numPairs - 1];
- if ((p->longestMatchLength >= mainLen && newDistance < mainDist) ||
- (p->longestMatchLength == mainLen + 1 && !ChangePair(mainDist, newDistance)) ||
- (p->longestMatchLength > mainLen + 1) ||
- (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist)))
- return 1;
- }
-
- data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
- for (i = 0; i < LZMA_NUM_REPS; i++)
- {
- UInt32 len, limit;
- const Byte *data2 = data - (p->reps[i] + 1);
- if (data[0] != data2[0] || data[1] != data2[1])
- continue;
- limit = mainLen - 1;
- for (len = 2; len < limit && data[len] == data2[len]; len++);
- if (len >= limit)
- return 1;
- }
- *backRes = mainDist + LZMA_NUM_REPS;
- MovePos(p, mainLen - 2);
- return mainLen;
+ UInt32 numAvail, mainLen, mainDist, numPairs, repIndex, repLen, i;
+ const Byte *data;
+ const UInt32 *matches;
+
+ if (p->additionalOffset == 0)
+ mainLen = ReadMatchDistances(p, &numPairs);
+ else
+ {
+ mainLen = p->longestMatchLength;
+ numPairs = p->numPairs;
+ }
+
+ numAvail = p->numAvail;
+ *backRes = (UInt32)-1;
+ if (numAvail < 2)
+ return 1;
+ if (numAvail > LZMA_MATCH_LEN_MAX)
+ numAvail = LZMA_MATCH_LEN_MAX;
+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+
+ repLen = repIndex = 0;
+ for (i = 0; i < LZMA_NUM_REPS; i++)
+ {
+ UInt32 len;
+ const Byte *data2 = data - (p->reps[i] + 1);
+ if (data[0] != data2[0] || data[1] != data2[1])
+ continue;
+ for (len = 2; len < numAvail && data[len] == data2[len]; len++);
+ if (len >= p->numFastBytes)
+ {
+ *backRes = i;
+ MovePos(p, len - 1);
+ return len;
+ }
+ if (len > repLen)
+ {
+ repIndex = i;
+ repLen = len;
+ }
+ }
+
+ matches = p->matches;
+ if (mainLen >= p->numFastBytes)
+ {
+ *backRes = matches[numPairs - 1] + LZMA_NUM_REPS;
+ MovePos(p, mainLen - 1);
+ return mainLen;
+ }
+
+ mainDist = 0; /* for GCC */
+ if (mainLen >= 2)
+ {
+ mainDist = matches[numPairs - 1];
+ while (numPairs > 2 && mainLen == matches[numPairs - 4] + 1)
+ {
+ if (!ChangePair(matches[numPairs - 3], mainDist))
+ break;
+ numPairs -= 2;
+ mainLen = matches[numPairs - 2];
+ mainDist = matches[numPairs - 1];
+ }
+ if (mainLen == 2 && mainDist >= 0x80)
+ mainLen = 1;
+ }
+
+ if (repLen >= 2 && (
+ (repLen + 1 >= mainLen) ||
+ (repLen + 2 >= mainLen && mainDist >= (1 << 9)) ||
+ (repLen + 3 >= mainLen && mainDist >= (1 << 15))))
+ {
+ *backRes = repIndex;
+ MovePos(p, repLen - 1);
+ return repLen;
+ }
+
+ if (mainLen < 2 || numAvail <= 2)
+ return 1;
+
+ p->longestMatchLength = ReadMatchDistances(p, &p->numPairs);
+ if (p->longestMatchLength >= 2)
+ {
+ UInt32 newDistance = matches[p->numPairs - 1];
+ if ((p->longestMatchLength >= mainLen && newDistance < mainDist) ||
+ (p->longestMatchLength == mainLen + 1 && !ChangePair(mainDist, newDistance)) ||
+ (p->longestMatchLength > mainLen + 1) ||
+ (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist)))
+ return 1;
+ }
+
+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1;
+ for (i = 0; i < LZMA_NUM_REPS; i++)
+ {
+ UInt32 len, limit;
+ const Byte *data2 = data - (p->reps[i] + 1);
+ if (data[0] != data2[0] || data[1] != data2[1])
+ continue;
+ limit = mainLen - 1;
+ for (len = 2; len < limit && data[len] == data2[len]; len++);
+ if (len >= limit)
+ return 1;
+ }
+ *backRes = mainDist + LZMA_NUM_REPS;
+ MovePos(p, mainLen - 2);
+ return mainLen;
}
static void WriteEndMarker(CLzmaEnc *p, UInt32 posState)
{
- UInt32 len;
- RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
- RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
- p->state = kMatchNextStates[p->state];
- len = LZMA_MATCH_LEN_MIN;
- LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
- RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1);
- RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits);
- RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask);
+ UInt32 len;
+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
+ p->state = kMatchNextStates[p->state];
+ len = LZMA_MATCH_LEN_MIN;
+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, (1 << kNumPosSlotBits) - 1);
+ RangeEnc_EncodeDirectBits(&p->rc, (((UInt32)1 << 30) - 1) >> kNumAlignBits, 30 - kNumAlignBits);
+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, kAlignMask);
}
static SRes CheckErrors(CLzmaEnc *p)
{
- if (p->result != SZ_OK)
- return p->result;
- if (p->rc.res != SZ_OK)
- p->result = SZ_ERROR_WRITE;
- if (p->matchFinderBase.result != SZ_OK)
- p->result = SZ_ERROR_READ;
- if (p->result != SZ_OK)
- p->finished = True;
- return p->result;
+ if (p->result != SZ_OK)
+ return p->result;
+ if (p->rc.res != SZ_OK)
+ p->result = SZ_ERROR_WRITE;
+ if (p->matchFinderBase.result != SZ_OK)
+ p->result = SZ_ERROR_READ;
+ if (p->result != SZ_OK)
+ p->finished = True;
+ return p->result;
}
static SRes Flush(CLzmaEnc *p, UInt32 nowPos)
{
- /* ReleaseMFStream(); */
- p->finished = True;
- if (p->writeEndMark)
- WriteEndMarker(p, nowPos & p->pbMask);
- RangeEnc_FlushData(&p->rc);
- RangeEnc_FlushStream(&p->rc);
- return CheckErrors(p);
+ /* ReleaseMFStream(); */
+ p->finished = True;
+ if (p->writeEndMark)
+ WriteEndMarker(p, nowPos & p->pbMask);
+ RangeEnc_FlushData(&p->rc);
+ RangeEnc_FlushStream(&p->rc);
+ return CheckErrors(p);
}
static void FillAlignPrices(CLzmaEnc *p)
{
- UInt32 i;
- for (i = 0; i < kAlignTableSize; i++)
- p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices);
- p->alignPriceCount = 0;
+ UInt32 i;
+ for (i = 0; i < kAlignTableSize; i++)
+ p->alignPrices[i] = RcTree_ReverseGetPrice(p->posAlignEncoder, kNumAlignBits, i, p->ProbPrices);
+ p->alignPriceCount = 0;
}
static void FillDistancesPrices(CLzmaEnc *p)
{
- UInt32 tempPrices[kNumFullDistances];
- UInt32 i, lenToPosState;
- for (i = kStartPosModelIndex; i < kNumFullDistances; i++)
- {
- UInt32 posSlot = GetPosSlot1(i);
- UInt32 footerBits = ((posSlot >> 1) - 1);
- UInt32 base = ((2 | (posSlot & 1)) << footerBits);
- tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices);
- }
-
- for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++)
- {
- UInt32 posSlot;
- const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState];
- UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState];
- for (posSlot = 0; posSlot < p->distTableSize; posSlot++)
- posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices);
- for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++)
- posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits);
-
- {
- UInt32 *distancesPrices = p->distancesPrices[lenToPosState];
- UInt32 i;
- for (i = 0; i < kStartPosModelIndex; i++)
- distancesPrices[i] = posSlotPrices[i];
- for (; i < kNumFullDistances; i++)
- distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i];
- }
- }
- p->matchPriceCount = 0;
+ UInt32 tempPrices[kNumFullDistances];
+ UInt32 i, lenToPosState;
+ for (i = kStartPosModelIndex; i < kNumFullDistances; i++)
+ {
+ UInt32 posSlot = GetPosSlot1(i);
+ UInt32 footerBits = ((posSlot >> 1) - 1);
+ UInt32 base = ((2 | (posSlot & 1)) << footerBits);
+ tempPrices[i] = RcTree_ReverseGetPrice(p->posEncoders + base - posSlot - 1, footerBits, i - base, p->ProbPrices);
+ }
+
+ for (lenToPosState = 0; lenToPosState < kNumLenToPosStates; lenToPosState++)
+ {
+ UInt32 posSlot;
+ const CLzmaProb *encoder = p->posSlotEncoder[lenToPosState];
+ UInt32 *posSlotPrices = p->posSlotPrices[lenToPosState];
+ for (posSlot = 0; posSlot < p->distTableSize; posSlot++)
+ posSlotPrices[posSlot] = RcTree_GetPrice(encoder, kNumPosSlotBits, posSlot, p->ProbPrices);
+ for (posSlot = kEndPosModelIndex; posSlot < p->distTableSize; posSlot++)
+ posSlotPrices[posSlot] += ((((posSlot >> 1) - 1) - kNumAlignBits) << kNumBitPriceShiftBits);
+
+ {
+ UInt32 *distancesPrices = p->distancesPrices[lenToPosState];
+ UInt32 i;
+ for (i = 0; i < kStartPosModelIndex; i++)
+ distancesPrices[i] = posSlotPrices[i];
+ for (; i < kNumFullDistances; i++)
+ distancesPrices[i] = posSlotPrices[GetPosSlot1(i)] + tempPrices[i];
+ }
+ }
+ p->matchPriceCount = 0;
}
void LzmaEnc_Construct(CLzmaEnc *p)
{
- RangeEnc_Construct(&p->rc);
- MatchFinder_Construct(&p->matchFinderBase);
- #ifndef _7ZIP_ST
- MatchFinderMt_Construct(&p->matchFinderMt);
- p->matchFinderMt.MatchFinder = &p->matchFinderBase;
- #endif
+ RangeEnc_Construct(&p->rc);
+ MatchFinder_Construct(&p->matchFinderBase);
+ #ifndef _7ZIP_ST
+ MatchFinderMt_Construct(&p->matchFinderMt);
+ p->matchFinderMt.MatchFinder = &p->matchFinderBase;
+ #endif
- {
- CLzmaEncProps props;
- LzmaEncProps_Init(&props);
- LzmaEnc_SetProps(p, &props);
- }
+ {
+ CLzmaEncProps props;
+ LzmaEncProps_Init(&props);
+ LzmaEnc_SetProps(p, &props);
+ }
- #ifndef LZMA_LOG_BSR
- LzmaEnc_FastPosInit(p->g_FastPos);
- #endif
+ #ifndef LZMA_LOG_BSR
+ LzmaEnc_FastPosInit(p->g_FastPos);
+ #endif
- LzmaEnc_InitPriceTables(p->ProbPrices);
- p->litProbs = 0;
- p->saveState.litProbs = 0;
+ LzmaEnc_InitPriceTables(p->ProbPrices);
+ p->litProbs = 0;
+ p->saveState.litProbs = 0;
}
CLzmaEncHandle LzmaEnc_Create(ISzAlloc *alloc)
{
- void *p;
- p = alloc->Alloc(alloc, sizeof(CLzmaEnc));
- if (p != 0)
- LzmaEnc_Construct((CLzmaEnc *)p);
- return p;
+ void *p;
+ p = alloc->Alloc(alloc, sizeof(CLzmaEnc));
+ if (p != 0)
+ LzmaEnc_Construct((CLzmaEnc *)p);
+ return p;
}
void LzmaEnc_FreeLits(CLzmaEnc *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->litProbs);
- alloc->Free(alloc, p->saveState.litProbs);
- p->litProbs = 0;
- p->saveState.litProbs = 0;
+ alloc->Free(alloc, p->litProbs);
+ alloc->Free(alloc, p->saveState.litProbs);
+ p->litProbs = 0;
+ p->saveState.litProbs = 0;
}
void LzmaEnc_Destruct(CLzmaEnc *p, ISzAlloc *alloc, ISzAlloc *allocBig)
{
- #ifndef _7ZIP_ST
- MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
- #endif
- MatchFinder_Free(&p->matchFinderBase, allocBig);
- LzmaEnc_FreeLits(p, alloc);
- RangeEnc_Free(&p->rc, alloc);
+ #ifndef _7ZIP_ST
+ MatchFinderMt_Destruct(&p->matchFinderMt, allocBig);
+ #endif
+ MatchFinder_Free(&p->matchFinderBase, allocBig);
+ LzmaEnc_FreeLits(p, alloc);
+ RangeEnc_Free(&p->rc, alloc);
}
void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig)
{
- LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig);
- alloc->Free(alloc, p);
+ LzmaEnc_Destruct((CLzmaEnc *)p, alloc, allocBig);
+ alloc->Free(alloc, p);
}
static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize, UInt32 maxUnpackSize)
{
- UInt32 nowPos32, startPos32;
- if (p->needInit)
- {
- p->matchFinder.Init(p->matchFinderObj);
- p->needInit = 0;
- }
-
- if (p->finished)
- return p->result;
- RINOK(CheckErrors(p));
-
- nowPos32 = (UInt32)p->nowPos64;
- startPos32 = nowPos32;
-
- if (p->nowPos64 == 0)
- {
- UInt32 numPairs;
- Byte curByte;
- if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
- return Flush(p, nowPos32);
- ReadMatchDistances(p, &numPairs);
- RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0);
- p->state = kLiteralNextStates[p->state];
- curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset);
- LitEnc_Encode(&p->rc, p->litProbs, curByte);
- p->additionalOffset--;
- nowPos32++;
- }
-
- if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0)
- for (;;)
- {
- UInt32 pos, len, posState;
-
- if (p->fastMode)
- len = GetOptimumFast(p, &pos);
- else
- len = GetOptimum(p, nowPos32, &pos);
-
- #ifdef SHOW_STAT2
- printf("\n pos = %4X, len = %d pos = %d", nowPos32, len, pos);
- #endif
-
- posState = nowPos32 & p->pbMask;
- if (len == 1 && pos == (UInt32)-1)
- {
- Byte curByte;
- CLzmaProb *probs;
- const Byte *data;
-
- RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0);
- data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
- curByte = *data;
- probs = LIT_PROBS(nowPos32, *(data - 1));
- if (IsCharState(p->state))
- LitEnc_Encode(&p->rc, probs, curByte);
- else
- LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1));
- p->state = kLiteralNextStates[p->state];
- }
- else
- {
- RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
- if (pos < LZMA_NUM_REPS)
- {
- RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1);
- if (pos == 0)
- {
- RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0);
- RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1));
- }
- else
- {
- UInt32 distance = p->reps[pos];
- RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1);
- if (pos == 1)
- RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0);
- else
- {
- RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1);
- RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2);
- if (pos == 3)
- p->reps[3] = p->reps[2];
- p->reps[2] = p->reps[1];
- }
- p->reps[1] = p->reps[0];
- p->reps[0] = distance;
- }
- if (len == 1)
- p->state = kShortRepNextStates[p->state];
- else
- {
- LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
- p->state = kRepNextStates[p->state];
- }
- }
- else
- {
- UInt32 posSlot;
- RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
- p->state = kMatchNextStates[p->state];
- LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
- pos -= LZMA_NUM_REPS;
- GetPosSlot(pos, posSlot);
- RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot);
-
- if (posSlot >= kStartPosModelIndex)
- {
- UInt32 footerBits = ((posSlot >> 1) - 1);
- UInt32 base = ((2 | (posSlot & 1)) << footerBits);
- UInt32 posReduced = pos - base;
-
- if (posSlot < kEndPosModelIndex)
- RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced);
- else
- {
- RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits);
- RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask);
- p->alignPriceCount++;
- }
- }
- p->reps[3] = p->reps[2];
- p->reps[2] = p->reps[1];
- p->reps[1] = p->reps[0];
- p->reps[0] = pos;
- p->matchPriceCount++;
- }
- }
- p->additionalOffset -= len;
- nowPos32 += len;
- if (p->additionalOffset == 0)
- {
- UInt32 processed;
- if (!p->fastMode)
- {
- if (p->matchPriceCount >= (1 << 7))
- FillDistancesPrices(p);
- if (p->alignPriceCount >= kAlignTableSize)
- FillAlignPrices(p);
- }
- if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
- break;
- processed = nowPos32 - startPos32;
- if (useLimits)
- {
- if (processed + kNumOpts + 300 >= maxUnpackSize ||
- RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize)
- break;
- }
- else if (processed >= (1 << 15))
- {
- p->nowPos64 += nowPos32 - startPos32;
- return CheckErrors(p);
- }
- }
- }
- p->nowPos64 += nowPos32 - startPos32;
- return Flush(p, nowPos32);
+ UInt32 nowPos32, startPos32;
+ if (p->needInit)
+ {
+ p->matchFinder.Init(p->matchFinderObj);
+ p->needInit = 0;
+ }
+
+ if (p->finished)
+ return p->result;
+ RINOK(CheckErrors(p));
+
+ nowPos32 = (UInt32)p->nowPos64;
+ startPos32 = nowPos32;
+
+ if (p->nowPos64 == 0)
+ {
+ UInt32 numPairs;
+ Byte curByte;
+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
+ return Flush(p, nowPos32);
+ ReadMatchDistances(p, &numPairs);
+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][0], 0);
+ p->state = kLiteralNextStates[p->state];
+ curByte = p->matchFinder.GetIndexByte(p->matchFinderObj, 0 - p->additionalOffset);
+ LitEnc_Encode(&p->rc, p->litProbs, curByte);
+ p->additionalOffset--;
+ nowPos32++;
+ }
+
+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) != 0)
+ for (;;)
+ {
+ UInt32 pos, len, posState;
+
+ if (p->fastMode)
+ len = GetOptimumFast(p, &pos);
+ else
+ len = GetOptimum(p, nowPos32, &pos);
+
+ #ifdef SHOW_STAT2
+ printf("\n pos = %4X, len = %d pos = %d", nowPos32, len, pos);
+ #endif
+
+ posState = nowPos32 & p->pbMask;
+ if (len == 1 && pos == (UInt32)-1)
+ {
+ Byte curByte;
+ CLzmaProb *probs;
+ const Byte *data;
+
+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 0);
+ data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
+ curByte = *data;
+ probs = LIT_PROBS(nowPos32, *(data - 1));
+ if (IsCharState(p->state))
+ LitEnc_Encode(&p->rc, probs, curByte);
+ else
+ LitEnc_EncodeMatched(&p->rc, probs, curByte, *(data - p->reps[0] - 1));
+ p->state = kLiteralNextStates[p->state];
+ }
+ else
+ {
+ RangeEnc_EncodeBit(&p->rc, &p->isMatch[p->state][posState], 1);
+ if (pos < LZMA_NUM_REPS)
+ {
+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 1);
+ if (pos == 0)
+ {
+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 0);
+ RangeEnc_EncodeBit(&p->rc, &p->isRep0Long[p->state][posState], ((len == 1) ? 0 : 1));
+ }
+ else
+ {
+ UInt32 distance = p->reps[pos];
+ RangeEnc_EncodeBit(&p->rc, &p->isRepG0[p->state], 1);
+ if (pos == 1)
+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 0);
+ else
+ {
+ RangeEnc_EncodeBit(&p->rc, &p->isRepG1[p->state], 1);
+ RangeEnc_EncodeBit(&p->rc, &p->isRepG2[p->state], pos - 2);
+ if (pos == 3)
+ p->reps[3] = p->reps[2];
+ p->reps[2] = p->reps[1];
+ }
+ p->reps[1] = p->reps[0];
+ p->reps[0] = distance;
+ }
+ if (len == 1)
+ p->state = kShortRepNextStates[p->state];
+ else
+ {
+ LenEnc_Encode2(&p->repLenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
+ p->state = kRepNextStates[p->state];
+ }
+ }
+ else
+ {
+ UInt32 posSlot;
+ RangeEnc_EncodeBit(&p->rc, &p->isRep[p->state], 0);
+ p->state = kMatchNextStates[p->state];
+ LenEnc_Encode2(&p->lenEnc, &p->rc, len - LZMA_MATCH_LEN_MIN, posState, !p->fastMode, p->ProbPrices);
+ pos -= LZMA_NUM_REPS;
+ GetPosSlot(pos, posSlot);
+ RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot);
+
+ if (posSlot >= kStartPosModelIndex)
+ {
+ UInt32 footerBits = ((posSlot >> 1) - 1);
+ UInt32 base = ((2 | (posSlot & 1)) << footerBits);
+ UInt32 posReduced = pos - base;
+
+ if (posSlot < kEndPosModelIndex)
+ RcTree_ReverseEncode(&p->rc, p->posEncoders + base - posSlot - 1, footerBits, posReduced);
+ else
+ {
+ RangeEnc_EncodeDirectBits(&p->rc, posReduced >> kNumAlignBits, footerBits - kNumAlignBits);
+ RcTree_ReverseEncode(&p->rc, p->posAlignEncoder, kNumAlignBits, posReduced & kAlignMask);
+ p->alignPriceCount++;
+ }
+ }
+ p->reps[3] = p->reps[2];
+ p->reps[2] = p->reps[1];
+ p->reps[1] = p->reps[0];
+ p->reps[0] = pos;
+ p->matchPriceCount++;
+ }
+ }
+ p->additionalOffset -= len;
+ nowPos32 += len;
+ if (p->additionalOffset == 0)
+ {
+ UInt32 processed;
+ if (!p->fastMode)
+ {
+ if (p->matchPriceCount >= (1 << 7))
+ FillDistancesPrices(p);
+ if (p->alignPriceCount >= kAlignTableSize)
+ FillAlignPrices(p);
+ }
+ if (p->matchFinder.GetNumAvailableBytes(p->matchFinderObj) == 0)
+ break;
+ processed = nowPos32 - startPos32;
+ if (useLimits)
+ {
+ if (processed + kNumOpts + 300 >= maxUnpackSize ||
+ RangeEnc_GetProcessed(&p->rc) + kNumOpts * 2 >= maxPackSize)
+ break;
+ }
+ else if (processed >= (1 << 15))
+ {
+ p->nowPos64 += nowPos32 - startPos32;
+ return CheckErrors(p);
+ }
+ }
+ }
+ p->nowPos64 += nowPos32 - startPos32;
+ return Flush(p, nowPos32);
}
#define kBigHashDicLimit ((UInt32)1 << 24)
static SRes LzmaEnc_Alloc(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
{
- UInt32 beforeSize = kNumOpts;
- #ifndef _7ZIP_ST
- Bool btMode;
- #endif
- if (!RangeEnc_Alloc(&p->rc, alloc))
- return SZ_ERROR_MEM;
- #ifndef _7ZIP_ST
- btMode = (p->matchFinderBase.btMode != 0);
- p->mtMode = (p->multiThread && !p->fastMode && btMode);
- #endif
-
- {
- unsigned lclp = p->lc + p->lp;
- if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp)
- {
- LzmaEnc_FreeLits(p, alloc);
- p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
- p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
- if (p->litProbs == 0 || p->saveState.litProbs == 0)
- {
- LzmaEnc_FreeLits(p, alloc);
- return SZ_ERROR_MEM;
- }
- p->lclp = lclp;
- }
- }
-
- p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit);
-
- if (beforeSize + p->dictSize < keepWindowSize)
- beforeSize = keepWindowSize - p->dictSize;
-
- #ifndef _7ZIP_ST
- if (p->mtMode)
- {
- RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig));
- p->matchFinderObj = &p->matchFinderMt;
- MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder);
- }
- else
- #endif
- {
- if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig))
- return SZ_ERROR_MEM;
- p->matchFinderObj = &p->matchFinderBase;
- MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder);
- }
- return SZ_OK;
+ UInt32 beforeSize = kNumOpts;
+ #ifndef _7ZIP_ST
+ Bool btMode;
+ #endif
+ if (!RangeEnc_Alloc(&p->rc, alloc))
+ return SZ_ERROR_MEM;
+ #ifndef _7ZIP_ST
+ btMode = (p->matchFinderBase.btMode != 0);
+ p->mtMode = (p->multiThread && !p->fastMode && btMode);
+ #endif
+
+ {
+ unsigned lclp = p->lc + p->lp;
+ if (p->litProbs == 0 || p->saveState.litProbs == 0 || p->lclp != lclp)
+ {
+ LzmaEnc_FreeLits(p, alloc);
+ p->litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
+ p->saveState.litProbs = (CLzmaProb *)alloc->Alloc(alloc, (0x300 << lclp) * sizeof(CLzmaProb));
+ if (p->litProbs == 0 || p->saveState.litProbs == 0)
+ {
+ LzmaEnc_FreeLits(p, alloc);
+ return SZ_ERROR_MEM;
+ }
+ p->lclp = lclp;
+ }
+ }
+
+ p->matchFinderBase.bigHash = (p->dictSize > kBigHashDicLimit);
+
+ if (beforeSize + p->dictSize < keepWindowSize)
+ beforeSize = keepWindowSize - p->dictSize;
+
+ #ifndef _7ZIP_ST
+ if (p->mtMode)
+ {
+ RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig));
+ p->matchFinderObj = &p->matchFinderMt;
+ MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder);
+ }
+ else
+ #endif
+ {
+ if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastBytes, LZMA_MATCH_LEN_MAX, allocBig))
+ return SZ_ERROR_MEM;
+ p->matchFinderObj = &p->matchFinderBase;
+ MatchFinder_CreateVTable(&p->matchFinderBase, &p->matchFinder);
+ }
+ return SZ_OK;
}
void LzmaEnc_Init(CLzmaEnc *p)
{
- UInt32 i;
- p->state = 0;
- for (i = 0 ; i < LZMA_NUM_REPS; i++)
- p->reps[i] = 0;
-
- RangeEnc_Init(&p->rc);
-
-
- for (i = 0; i < kNumStates; i++)
- {
- UInt32 j;
- for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++)
- {
- p->isMatch[i][j] = kProbInitValue;
- p->isRep0Long[i][j] = kProbInitValue;
- }
- p->isRep[i] = kProbInitValue;
- p->isRepG0[i] = kProbInitValue;
- p->isRepG1[i] = kProbInitValue;
- p->isRepG2[i] = kProbInitValue;
- }
-
- {
- UInt32 num = 0x300 << (p->lp + p->lc);
- for (i = 0; i < num; i++)
- p->litProbs[i] = kProbInitValue;
- }
-
- {
- for (i = 0; i < kNumLenToPosStates; i++)
- {
- CLzmaProb *probs = p->posSlotEncoder[i];
- UInt32 j;
- for (j = 0; j < (1 << kNumPosSlotBits); j++)
- probs[j] = kProbInitValue;
- }
- }
- {
- for (i = 0; i < kNumFullDistances - kEndPosModelIndex; i++)
- p->posEncoders[i] = kProbInitValue;
- }
-
- LenEnc_Init(&p->lenEnc.p);
- LenEnc_Init(&p->repLenEnc.p);
-
- for (i = 0; i < (1 << kNumAlignBits); i++)
- p->posAlignEncoder[i] = kProbInitValue;
-
- p->optimumEndIndex = 0;
- p->optimumCurrentIndex = 0;
- p->additionalOffset = 0;
-
- p->pbMask = (1 << p->pb) - 1;
- p->lpMask = (1 << p->lp) - 1;
+ UInt32 i;
+ p->state = 0;
+ for (i = 0 ; i < LZMA_NUM_REPS; i++)
+ p->reps[i] = 0;
+
+ RangeEnc_Init(&p->rc);
+
+
+ for (i = 0; i < kNumStates; i++)
+ {
+ UInt32 j;
+ for (j = 0; j < LZMA_NUM_PB_STATES_MAX; j++)
+ {
+ p->isMatch[i][j] = kProbInitValue;
+ p->isRep0Long[i][j] = kProbInitValue;
+ }
+ p->isRep[i] = kProbInitValue;
+ p->isRepG0[i] = kProbInitValue;
+ p->isRepG1[i] = kProbInitValue;
+ p->isRepG2[i] = kProbInitValue;
+ }
+
+ {
+ UInt32 num = 0x300 << (p->lp + p->lc);
+ for (i = 0; i < num; i++)
+ p->litProbs[i] = kProbInitValue;
+ }
+
+ {
+ for (i = 0; i < kNumLenToPosStates; i++)
+ {
+ CLzmaProb *probs = p->posSlotEncoder[i];
+ UInt32 j;
+ for (j = 0; j < (1 << kNumPosSlotBits); j++)
+ probs[j] = kProbInitValue;
+ }
+ }
+ {
+ for (i = 0; i < kNumFullDistances - kEndPosModelIndex; i++)
+ p->posEncoders[i] = kProbInitValue;
+ }
+
+ LenEnc_Init(&p->lenEnc.p);
+ LenEnc_Init(&p->repLenEnc.p);
+
+ for (i = 0; i < (1 << kNumAlignBits); i++)
+ p->posAlignEncoder[i] = kProbInitValue;
+
+ p->optimumEndIndex = 0;
+ p->optimumCurrentIndex = 0;
+ p->additionalOffset = 0;
+
+ p->pbMask = (1 << p->pb) - 1;
+ p->lpMask = (1 << p->lp) - 1;
}
void LzmaEnc_InitPrices(CLzmaEnc *p)
{
- if (!p->fastMode)
- {
- FillDistancesPrices(p);
- FillAlignPrices(p);
- }
+ if (!p->fastMode)
+ {
+ FillDistancesPrices(p);
+ FillAlignPrices(p);
+ }
- p->lenEnc.tableSize =
- p->repLenEnc.tableSize =
- p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN;
- LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices);
- LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices);
+ p->lenEnc.tableSize =
+ p->repLenEnc.tableSize =
+ p->numFastBytes + 1 - LZMA_MATCH_LEN_MIN;
+ LenPriceEnc_UpdateTables(&p->lenEnc, 1 << p->pb, p->ProbPrices);
+ LenPriceEnc_UpdateTables(&p->repLenEnc, 1 << p->pb, p->ProbPrices);
}
static SRes LzmaEnc_AllocAndInit(CLzmaEnc *p, UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
{
- UInt32 i;
- for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++)
- if (p->dictSize <= ((UInt32)1 << i))
- break;
- p->distTableSize = i * 2;
+ UInt32 i;
+ for (i = 0; i < (UInt32)kDicLogSizeMaxCompress; i++)
+ if (p->dictSize <= ((UInt32)1 << i))
+ break;
+ p->distTableSize = i * 2;
- p->finished = False;
- p->result = SZ_OK;
- RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig));
- LzmaEnc_Init(p);
- LzmaEnc_InitPrices(p);
- p->nowPos64 = 0;
- return SZ_OK;
+ p->finished = False;
+ p->result = SZ_OK;
+ RINOK(LzmaEnc_Alloc(p, keepWindowSize, alloc, allocBig));
+ LzmaEnc_Init(p);
+ LzmaEnc_InitPrices(p);
+ p->nowPos64 = 0;
+ return SZ_OK;
}
static SRes LzmaEnc_Prepare(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream,
- ISzAlloc *alloc, ISzAlloc *allocBig)
+ ISzAlloc *alloc, ISzAlloc *allocBig)
{
- CLzmaEnc *p = (CLzmaEnc *)pp;
- p->matchFinderBase.stream = inStream;
- p->needInit = 1;
- p->rc.outStream = outStream;
- return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ p->matchFinderBase.stream = inStream;
+ p->needInit = 1;
+ p->rc.outStream = outStream;
+ return LzmaEnc_AllocAndInit(p, 0, alloc, allocBig);
}
SRes LzmaEnc_PrepareForLzma2(CLzmaEncHandle pp,
- ISeqInStream *inStream, UInt32 keepWindowSize,
- ISzAlloc *alloc, ISzAlloc *allocBig)
+ ISeqInStream *inStream, UInt32 keepWindowSize,
+ ISzAlloc *alloc, ISzAlloc *allocBig)
{
- CLzmaEnc *p = (CLzmaEnc *)pp;
- p->matchFinderBase.stream = inStream;
- p->needInit = 1;
- return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ p->matchFinderBase.stream = inStream;
+ p->needInit = 1;
+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
}
static void LzmaEnc_SetInputBuf(CLzmaEnc *p, const Byte *src, SizeT srcLen)
{
- p->matchFinderBase.directInput = 1;
- p->matchFinderBase.bufferBase = (Byte *)src;
- p->matchFinderBase.directInputRem = srcLen;
+ p->matchFinderBase.directInput = 1;
+ p->matchFinderBase.bufferBase = (Byte *)src;
+ p->matchFinderBase.directInputRem = srcLen;
}
SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const Byte *src, SizeT srcLen,
- UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
+ UInt32 keepWindowSize, ISzAlloc *alloc, ISzAlloc *allocBig)
{
- CLzmaEnc *p = (CLzmaEnc *)pp;
- LzmaEnc_SetInputBuf(p, src, srcLen);
- p->needInit = 1;
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ LzmaEnc_SetInputBuf(p, src, srcLen);
+ p->needInit = 1;
- return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
+ return LzmaEnc_AllocAndInit(p, keepWindowSize, alloc, allocBig);
}
void LzmaEnc_Finish(CLzmaEncHandle pp)
{
- #ifndef _7ZIP_ST
- CLzmaEnc *p = (CLzmaEnc *)pp;
- if (p->mtMode)
- MatchFinderMt_ReleaseStream(&p->matchFinderMt);
- #endif
+ #ifndef _7ZIP_ST
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ if (p->mtMode)
+ MatchFinderMt_ReleaseStream(&p->matchFinderMt);
+ #endif
}
typedef struct
{
- ISeqOutStream funcTable;
- Byte *data;
- SizeT rem;
- Bool overflow;
+ ISeqOutStream funcTable;
+ Byte *data;
+ SizeT rem;
+ Bool overflow;
} CSeqOutStreamBuf;
static size_t MyWrite(void *pp, const void *data, size_t size)
{
- CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp;
- if (p->rem < size)
- {
- size = p->rem;
- p->overflow = True;
- }
- memcpy(p->data, data, size);
- p->rem -= size;
- p->data += size;
- return size;
+ CSeqOutStreamBuf *p = (CSeqOutStreamBuf *)pp;
+ if (p->rem < size)
+ {
+ size = p->rem;
+ p->overflow = True;
+ }
+ memcpy(p->data, data, size);
+ p->rem -= size;
+ p->data += size;
+ return size;
}
UInt32 LzmaEnc_GetNumAvailableBytes(CLzmaEncHandle pp)
{
- const CLzmaEnc *p = (CLzmaEnc *)pp;
- return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
+ const CLzmaEnc *p = (CLzmaEnc *)pp;
+ return p->matchFinder.GetNumAvailableBytes(p->matchFinderObj);
}
const Byte *LzmaEnc_GetCurBuf(CLzmaEncHandle pp)
{
- const CLzmaEnc *p = (CLzmaEnc *)pp;
- return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
+ const CLzmaEnc *p = (CLzmaEnc *)pp;
+ return p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - p->additionalOffset;
}
SRes LzmaEnc_CodeOneMemBlock(CLzmaEncHandle pp, Bool reInit,
- Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
+ Byte *dest, size_t *destLen, UInt32 desiredPackSize, UInt32 *unpackSize)
{
- CLzmaEnc *p = (CLzmaEnc *)pp;
- UInt64 nowPos64;
- SRes res;
- CSeqOutStreamBuf outStream;
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ UInt64 nowPos64;
+ SRes res;
+ CSeqOutStreamBuf outStream;
- outStream.funcTable.Write = MyWrite;
- outStream.data = dest;
- outStream.rem = *destLen;
- outStream.overflow = False;
+ outStream.funcTable.Write = MyWrite;
+ outStream.data = dest;
+ outStream.rem = *destLen;
+ outStream.overflow = False;
- p->writeEndMark = False;
- p->finished = False;
- p->result = SZ_OK;
+ p->writeEndMark = False;
+ p->finished = False;
+ p->result = SZ_OK;
- if (reInit)
- LzmaEnc_Init(p);
- LzmaEnc_InitPrices(p);
- nowPos64 = p->nowPos64;
- RangeEnc_Init(&p->rc);
- p->rc.outStream = &outStream.funcTable;
+ if (reInit)
+ LzmaEnc_Init(p);
+ LzmaEnc_InitPrices(p);
+ nowPos64 = p->nowPos64;
+ RangeEnc_Init(&p->rc);
+ p->rc.outStream = &outStream.funcTable;
- res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
+ res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize);
- *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
- *destLen -= outStream.rem;
- if (outStream.overflow)
- return SZ_ERROR_OUTPUT_EOF;
+ *unpackSize = (UInt32)(p->nowPos64 - nowPos64);
+ *destLen -= outStream.rem;
+ if (outStream.overflow)
+ return SZ_ERROR_OUTPUT_EOF;
- return res;
+ return res;
}
static SRes LzmaEnc_Encode2(CLzmaEnc *p, ICompressProgress *progress)
{
- SRes res = SZ_OK;
-
- #ifndef _7ZIP_ST
- Byte allocaDummy[0x300];
- int i = 0;
- for (i = 0; i < 16; i++)
- allocaDummy[i] = (Byte)i;
- #endif
-
- for (;;)
- {
- res = LzmaEnc_CodeOneBlock(p, False, 0, 0);
- if (res != SZ_OK || p->finished != 0)
- break;
- if (progress != 0)
- {
- res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc));
- if (res != SZ_OK)
- {
- res = SZ_ERROR_PROGRESS;
- break;
- }
- }
- }
- LzmaEnc_Finish(p);
- return res;
+ SRes res = SZ_OK;
+
+ #ifndef _7ZIP_ST
+ Byte allocaDummy[0x300];
+ int i = 0;
+ for (i = 0; i < 16; i++)
+ allocaDummy[i] = (Byte)i;
+ #endif
+
+ for (;;)
+ {
+ res = LzmaEnc_CodeOneBlock(p, False, 0, 0);
+ if (res != SZ_OK || p->finished != 0)
+ break;
+ if (progress != 0)
+ {
+ res = progress->Progress(progress, p->nowPos64, RangeEnc_GetProcessed(&p->rc));
+ if (res != SZ_OK)
+ {
+ res = SZ_ERROR_PROGRESS;
+ break;
+ }
+ }
+ }
+ LzmaEnc_Finish(p);
+ return res;
}
SRes LzmaEnc_Encode(CLzmaEncHandle pp, ISeqOutStream *outStream, ISeqInStream *inStream, ICompressProgress *progress,
- ISzAlloc *alloc, ISzAlloc *allocBig)
+ ISzAlloc *alloc, ISzAlloc *allocBig)
{
- RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
- return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
+ RINOK(LzmaEnc_Prepare(pp, outStream, inStream, alloc, allocBig));
+ return LzmaEnc_Encode2((CLzmaEnc *)pp, progress);
}
SRes LzmaEnc_WriteProperties(CLzmaEncHandle pp, Byte *props, SizeT *size)
{
- CLzmaEnc *p = (CLzmaEnc *)pp;
- int i;
- UInt32 dictSize = p->dictSize;
- if (*size < LZMA_PROPS_SIZE)
- return SZ_ERROR_PARAM;
- *size = LZMA_PROPS_SIZE;
- props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc);
-
- for (i = 11; i <= 30; i++)
- {
- if (dictSize <= ((UInt32)2 << i))
- {
- dictSize = (2 << i);
- break;
- }
- if (dictSize <= ((UInt32)3 << i))
- {
- dictSize = (3 << i);
- break;
- }
- }
-
- for (i = 0; i < 4; i++)
- props[1 + i] = (Byte)(dictSize >> (8 * i));
- return SZ_OK;
+ CLzmaEnc *p = (CLzmaEnc *)pp;
+ int i;
+ UInt32 dictSize = p->dictSize;
+ if (*size < LZMA_PROPS_SIZE)
+ return SZ_ERROR_PARAM;
+ *size = LZMA_PROPS_SIZE;
+ props[0] = (Byte)((p->pb * 5 + p->lp) * 9 + p->lc);
+
+ for (i = 11; i <= 30; i++)
+ {
+ if (dictSize <= ((UInt32)2 << i))
+ {
+ dictSize = (2 << i);
+ break;
+ }
+ if (dictSize <= ((UInt32)3 << i))
+ {
+ dictSize = (3 << i);
+ break;
+ }
+ }
+
+ for (i = 0; i < 4; i++)
+ props[1 + i] = (Byte)(dictSize >> (8 * i));
+ return SZ_OK;
}
SRes LzmaEnc_MemEncode(CLzmaEncHandle pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
- int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
{
- SRes res;
- CLzmaEnc *p = (CLzmaEnc *)pp;
+ SRes res;
+ CLzmaEnc *p = (CLzmaEnc *)pp;
- CSeqOutStreamBuf outStream;
+ CSeqOutStreamBuf outStream;
- LzmaEnc_SetInputBuf(p, src, srcLen);
+ LzmaEnc_SetInputBuf(p, src, srcLen);
- outStream.funcTable.Write = MyWrite;
- outStream.data = dest;
- outStream.rem = *destLen;
- outStream.overflow = False;
+ outStream.funcTable.Write = MyWrite;
+ outStream.data = dest;
+ outStream.rem = *destLen;
+ outStream.overflow = False;
- p->writeEndMark = writeEndMark;
+ p->writeEndMark = writeEndMark;
- p->rc.outStream = &outStream.funcTable;
- res = LzmaEnc_MemPrepare(pp, src, srcLen, 0, alloc, allocBig);
- if (res == SZ_OK)
- res = LzmaEnc_Encode2(p, progress);
+ p->rc.outStream = &outStream.funcTable;
+ res = LzmaEnc_MemPrepare(pp, src, srcLen, 0, alloc, allocBig);
+ if (res == SZ_OK)
+ res = LzmaEnc_Encode2(p, progress);
- *destLen -= outStream.rem;
- if (outStream.overflow)
- return SZ_ERROR_OUTPUT_EOF;
- return res;
+ *destLen -= outStream.rem;
+ if (outStream.overflow)
+ return SZ_ERROR_OUTPUT_EOF;
+ return res;
}
SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
- const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
-{
- CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
- SRes res;
- if (p == 0)
- return SZ_ERROR_MEM;
-
- res = LzmaEnc_SetProps(p, props);
- if (res == SZ_OK)
- {
- res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
- if (res == SZ_OK)
- res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
- writeEndMark, progress, alloc, allocBig);
- }
-
- LzmaEnc_Destroy(p, alloc, allocBig);
- return res;
+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig)
+{
+ CLzmaEnc *p = (CLzmaEnc *)LzmaEnc_Create(alloc);
+ SRes res;
+ if (p == 0)
+ return SZ_ERROR_MEM;
+
+ res = LzmaEnc_SetProps(p, props);
+ if (res == SZ_OK)
+ {
+ res = LzmaEnc_WriteProperties(p, propsEncoded, propsSize);
+ if (res == SZ_OK)
+ res = LzmaEnc_MemEncode(p, dest, destLen, src, srcLen,
+ writeEndMark, progress, alloc, allocBig);
+ }
+
+ LzmaEnc_Destroy(p, alloc, allocBig);
+ return res;
}
diff --git a/src/lib/lib7z/LzmaEnc.h b/src/lib/lib7z/LzmaEnc.h
index b8d9ce77230..830a8a4d146 100644
--- a/src/lib/lib7z/LzmaEnc.h
+++ b/src/lib/lib7z/LzmaEnc.h
@@ -12,22 +12,22 @@ EXTERN_C_BEGIN
typedef struct _CLzmaEncProps
{
- int level; /* 0 <= level <= 9 */
- UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version
+ int level; /* 0 <= level <= 9 */
+ UInt32 dictSize; /* (1 << 12) <= dictSize <= (1 << 27) for 32-bit version
(1 << 12) <= dictSize <= (1 << 30) for 64-bit version
default = (1 << 24) */
- UInt32 reduceSize; /* estimated size of data that will be compressed. default = 0xFFFFFFFF.
+ UInt32 reduceSize; /* estimated size of data that will be compressed. default = 0xFFFFFFFF.
Encoder uses this value to reduce dictionary size */
- int lc; /* 0 <= lc <= 8, default = 3 */
- int lp; /* 0 <= lp <= 4, default = 0 */
- int pb; /* 0 <= pb <= 4, default = 2 */
- int algo; /* 0 - fast, 1 - normal, default = 1 */
- int fb; /* 5 <= fb <= 273, default = 32 */
- int btMode; /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */
- int numHashBytes; /* 2, 3 or 4, default = 4 */
- UInt32 mc; /* 1 <= mc <= (1 << 30), default = 32 */
- unsigned writeEndMark; /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */
- int numThreads; /* 1 or 2, default = 2 */
+ int lc; /* 0 <= lc <= 8, default = 3 */
+ int lp; /* 0 <= lp <= 4, default = 0 */
+ int pb; /* 0 <= pb <= 4, default = 2 */
+ int algo; /* 0 - fast, 1 - normal, default = 1 */
+ int fb; /* 5 <= fb <= 273, default = 32 */
+ int btMode; /* 0 - hashChain Mode, 1 - binTree mode - normal, default = 1 */
+ int numHashBytes; /* 2, 3 or 4, default = 4 */
+ UInt32 mc; /* 1 <= mc <= (1 << 30), default = 32 */
+ unsigned writeEndMark; /* 0 - do not write EOPM, 1 - write EOPM, default = 0 */
+ int numThreads; /* 1 or 2, default = 2 */
} CLzmaEncProps;
void LzmaEncProps_Init(CLzmaEncProps *p);
@@ -54,9 +54,9 @@ void LzmaEnc_Destroy(CLzmaEncHandle p, ISzAlloc *alloc, ISzAlloc *allocBig);
SRes LzmaEnc_SetProps(CLzmaEncHandle p, const CLzmaEncProps *props);
SRes LzmaEnc_WriteProperties(CLzmaEncHandle p, Byte *properties, SizeT *size);
SRes LzmaEnc_Encode(CLzmaEncHandle p, ISeqOutStream *outStream, ISeqInStream *inStream,
- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
SRes LzmaEnc_MemEncode(CLzmaEncHandle p, Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
- int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+ int writeEndMark, ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
/* ---------- One Call Interface ---------- */
@@ -70,8 +70,8 @@ Return code:
*/
SRes LzmaEncode(Byte *dest, SizeT *destLen, const Byte *src, SizeT srcLen,
- const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
- ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
+ const CLzmaEncProps *props, Byte *propsEncoded, SizeT *propsSize, int writeEndMark,
+ ICompressProgress *progress, ISzAlloc *alloc, ISzAlloc *allocBig);
EXTERN_C_END
diff --git a/src/lib/lib7z/LzmaLib.c b/src/lib/lib7z/LzmaLib.c
index 02a511857c9..1602621bcf0 100644
--- a/src/lib/lib7z/LzmaLib.c
+++ b/src/lib/lib7z/LzmaLib.c
@@ -13,34 +13,34 @@ static void SzFree(void *p, void *address) { p = p; MyFree(address); }
static ISzAlloc g_Alloc = { SzAlloc, SzFree };
MY_STDAPI LzmaCompress(unsigned char *dest, size_t *destLen, const unsigned char *src, size_t srcLen,
- unsigned char *outProps, size_t *outPropsSize,
- int level, /* 0 <= level <= 9, default = 5 */
- unsigned dictSize, /* use (1 << N) or (3 << N). 4 KB < dictSize <= 128 MB */
- int lc, /* 0 <= lc <= 8, default = 3 */
- int lp, /* 0 <= lp <= 4, default = 0 */
- int pb, /* 0 <= pb <= 4, default = 2 */
- int fb, /* 5 <= fb <= 273, default = 32 */
- int numThreads /* 1 or 2, default = 2 */
+ unsigned char *outProps, size_t *outPropsSize,
+ int level, /* 0 <= level <= 9, default = 5 */
+ unsigned dictSize, /* use (1 << N) or (3 << N). 4 KB < dictSize <= 128 MB */
+ int lc, /* 0 <= lc <= 8, default = 3 */
+ int lp, /* 0 <= lp <= 4, default = 0 */
+ int pb, /* 0 <= pb <= 4, default = 2 */
+ int fb, /* 5 <= fb <= 273, default = 32 */
+ int numThreads /* 1 or 2, default = 2 */
)
{
- CLzmaEncProps props;
- LzmaEncProps_Init(&props);
- props.level = level;
- props.dictSize = dictSize;
- props.lc = lc;
- props.lp = lp;
- props.pb = pb;
- props.fb = fb;
- props.numThreads = numThreads;
+ CLzmaEncProps props;
+ LzmaEncProps_Init(&props);
+ props.level = level;
+ props.dictSize = dictSize;
+ props.lc = lc;
+ props.lp = lp;
+ props.pb = pb;
+ props.fb = fb;
+ props.numThreads = numThreads;
- return LzmaEncode(dest, destLen, src, srcLen, &props, outProps, outPropsSize, 0,
- NULL, &g_Alloc, &g_Alloc);
+ return LzmaEncode(dest, destLen, src, srcLen, &props, outProps, outPropsSize, 0,
+ NULL, &g_Alloc, &g_Alloc);
}
MY_STDAPI LzmaUncompress(unsigned char *dest, size_t *destLen, const unsigned char *src, size_t *srcLen,
- const unsigned char *props, size_t propsSize)
+ const unsigned char *props, size_t propsSize)
{
- ELzmaStatus status;
- return LzmaDecode(dest, destLen, src, srcLen, props, (unsigned)propsSize, LZMA_FINISH_ANY, &status, &g_Alloc);
+ ELzmaStatus status;
+ return LzmaDecode(dest, destLen, src, srcLen, props, (unsigned)propsSize, LZMA_FINISH_ANY, &status, &g_Alloc);
}
diff --git a/src/lib/lib7z/LzmaLib.h b/src/lib/lib7z/LzmaLib.h
index 2a3efe161c1..719d8efd13f 100644
--- a/src/lib/lib7z/LzmaLib.h
+++ b/src/lib/lib7z/LzmaLib.h
@@ -96,15 +96,15 @@ Returns:
*/
MY_STDAPI LzmaCompress(unsigned char *dest, size_t *destLen, const unsigned char *src, size_t srcLen,
- unsigned char *outProps, size_t *outPropsSize, /* *outPropsSize must be = 5 */
- int level, /* 0 <= level <= 9, default = 5 */
- unsigned dictSize, /* default = (1 << 24) */
- int lc, /* 0 <= lc <= 8, default = 3 */
- int lp, /* 0 <= lp <= 4, default = 0 */
- int pb, /* 0 <= pb <= 4, default = 2 */
- int fb, /* 5 <= fb <= 273, default = 32 */
- int numThreads /* 1 or 2, default = 2 */
- );
+ unsigned char *outProps, size_t *outPropsSize, /* *outPropsSize must be = 5 */
+ int level, /* 0 <= level <= 9, default = 5 */
+ unsigned dictSize, /* default = (1 << 24) */
+ int lc, /* 0 <= lc <= 8, default = 3 */
+ int lp, /* 0 <= lp <= 4, default = 0 */
+ int pb, /* 0 <= pb <= 4, default = 2 */
+ int fb, /* 5 <= fb <= 273, default = 32 */
+ int numThreads /* 1 or 2, default = 2 */
+ );
/*
LzmaUncompress
@@ -126,7 +126,7 @@ Returns:
*/
MY_STDAPI LzmaUncompress(unsigned char *dest, size_t *destLen, const unsigned char *src, SizeT *srcLen,
- const unsigned char *props, size_t propsSize);
+ const unsigned char *props, size_t propsSize);
#ifdef __cplusplus
}
diff --git a/src/lib/lib7z/MtCoder.c b/src/lib/lib7z/MtCoder.c
index c6a992a64ba..03feff4a1b7 100644
--- a/src/lib/lib7z/MtCoder.c
+++ b/src/lib/lib7z/MtCoder.c
@@ -7,47 +7,47 @@
void LoopThread_Construct(CLoopThread *p)
{
- Thread_Construct(&p->thread);
- Event_Construct(&p->startEvent);
- Event_Construct(&p->finishedEvent);
+ Thread_Construct(&p->thread);
+ Event_Construct(&p->startEvent);
+ Event_Construct(&p->finishedEvent);
}
void LoopThread_Close(CLoopThread *p)
{
- Thread_Close(&p->thread);
- Event_Close(&p->startEvent);
- Event_Close(&p->finishedEvent);
+ Thread_Close(&p->thread);
+ Event_Close(&p->startEvent);
+ Event_Close(&p->finishedEvent);
}
static THREAD_FUNC_RET_TYPE THREAD_FUNC_CALL_TYPE LoopThreadFunc(void *pp)
{
- CLoopThread *p = (CLoopThread *)pp;
- for (;;)
- {
- if (Event_Wait(&p->startEvent) != 0)
- return SZ_ERROR_THREAD;
- if (p->stop)
- return 0;
- p->res = p->func(p->param);
- if (Event_Set(&p->finishedEvent) != 0)
- return SZ_ERROR_THREAD;
- }
+ CLoopThread *p = (CLoopThread *)pp;
+ for (;;)
+ {
+ if (Event_Wait(&p->startEvent) != 0)
+ return SZ_ERROR_THREAD;
+ if (p->stop)
+ return 0;
+ p->res = p->func(p->param);
+ if (Event_Set(&p->finishedEvent) != 0)
+ return SZ_ERROR_THREAD;
+ }
}
WRes LoopThread_Create(CLoopThread *p)
{
- p->stop = 0;
- RINOK(AutoResetEvent_CreateNotSignaled(&p->startEvent));
- RINOK(AutoResetEvent_CreateNotSignaled(&p->finishedEvent));
- return Thread_Create(&p->thread, LoopThreadFunc, p);
+ p->stop = 0;
+ RINOK(AutoResetEvent_CreateNotSignaled(&p->startEvent));
+ RINOK(AutoResetEvent_CreateNotSignaled(&p->finishedEvent));
+ return Thread_Create(&p->thread, LoopThreadFunc, p);
}
WRes LoopThread_StopAndWait(CLoopThread *p)
{
- p->stop = 1;
- if (Event_Set(&p->startEvent) != 0)
- return SZ_ERROR_THREAD;
- return Thread_Wait(&p->thread);
+ p->stop = 1;
+ if (Event_Set(&p->startEvent) != 0)
+ return SZ_ERROR_THREAD;
+ return Thread_Wait(&p->thread);
}
WRes LoopThread_StartSubThread(CLoopThread *p) { return Event_Set(&p->startEvent); }
@@ -55,273 +55,273 @@ WRes LoopThread_WaitSubThread(CLoopThread *p) { return Event_Wait(&p->finishedEv
static SRes Progress(ICompressProgress *p, UInt64 inSize, UInt64 outSize)
{
- return (p && p->Progress(p, inSize, outSize) != SZ_OK) ? SZ_ERROR_PROGRESS : SZ_OK;
+ return (p && p->Progress(p, inSize, outSize) != SZ_OK) ? SZ_ERROR_PROGRESS : SZ_OK;
}
static void MtProgress_Init(CMtProgress *p, ICompressProgress *progress)
{
- unsigned i;
- for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
- p->inSizes[i] = p->outSizes[i] = 0;
- p->totalInSize = p->totalOutSize = 0;
- p->progress = progress;
- p->res = SZ_OK;
+ unsigned i;
+ for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
+ p->inSizes[i] = p->outSizes[i] = 0;
+ p->totalInSize = p->totalOutSize = 0;
+ p->progress = progress;
+ p->res = SZ_OK;
}
static void MtProgress_Reinit(CMtProgress *p, unsigned index)
{
- p->inSizes[index] = 0;
- p->outSizes[index] = 0;
+ p->inSizes[index] = 0;
+ p->outSizes[index] = 0;
}
#define UPDATE_PROGRESS(size, prev, total) \
- if (size != (UInt64)(Int64)-1) { total += size - prev; prev = size; }
+ if (size != (UInt64)(Int64)-1) { total += size - prev; prev = size; }
SRes MtProgress_Set(CMtProgress *p, unsigned index, UInt64 inSize, UInt64 outSize)
{
- SRes res;
- CriticalSection_Enter(&p->cs);
- UPDATE_PROGRESS(inSize, p->inSizes[index], p->totalInSize)
- UPDATE_PROGRESS(outSize, p->outSizes[index], p->totalOutSize)
- if (p->res == SZ_OK)
- p->res = Progress(p->progress, p->totalInSize, p->totalOutSize);
- res = p->res;
- CriticalSection_Leave(&p->cs);
- return res;
+ SRes res;
+ CriticalSection_Enter(&p->cs);
+ UPDATE_PROGRESS(inSize, p->inSizes[index], p->totalInSize)
+ UPDATE_PROGRESS(outSize, p->outSizes[index], p->totalOutSize)
+ if (p->res == SZ_OK)
+ p->res = Progress(p->progress, p->totalInSize, p->totalOutSize);
+ res = p->res;
+ CriticalSection_Leave(&p->cs);
+ return res;
}
static void MtProgress_SetError(CMtProgress *p, SRes res)
{
- CriticalSection_Enter(&p->cs);
- if (p->res == SZ_OK)
- p->res = res;
- CriticalSection_Leave(&p->cs);
+ CriticalSection_Enter(&p->cs);
+ if (p->res == SZ_OK)
+ p->res = res;
+ CriticalSection_Leave(&p->cs);
}
static void MtCoder_SetError(CMtCoder* p, SRes res)
{
- CriticalSection_Enter(&p->cs);
- if (p->res == SZ_OK)
- p->res = res;
- CriticalSection_Leave(&p->cs);
+ CriticalSection_Enter(&p->cs);
+ if (p->res == SZ_OK)
+ p->res = res;
+ CriticalSection_Leave(&p->cs);
}
/* ---------- MtThread ---------- */
void CMtThread_Construct(CMtThread *p, CMtCoder *mtCoder)
{
- p->mtCoder = mtCoder;
- p->outBuf = 0;
- p->inBuf = 0;
- Event_Construct(&p->canRead);
- Event_Construct(&p->canWrite);
- LoopThread_Construct(&p->thread);
+ p->mtCoder = mtCoder;
+ p->outBuf = 0;
+ p->inBuf = 0;
+ Event_Construct(&p->canRead);
+ Event_Construct(&p->canWrite);
+ LoopThread_Construct(&p->thread);
}
#define RINOK_THREAD(x) { if((x) != 0) return SZ_ERROR_THREAD; }
static void CMtThread_CloseEvents(CMtThread *p)
{
- Event_Close(&p->canRead);
- Event_Close(&p->canWrite);
+ Event_Close(&p->canRead);
+ Event_Close(&p->canWrite);
}
static void CMtThread_Destruct(CMtThread *p)
{
- CMtThread_CloseEvents(p);
+ CMtThread_CloseEvents(p);
- if (Thread_WasCreated(&p->thread.thread))
- {
- LoopThread_StopAndWait(&p->thread);
- LoopThread_Close(&p->thread);
- }
+ if (Thread_WasCreated(&p->thread.thread))
+ {
+ LoopThread_StopAndWait(&p->thread);
+ LoopThread_Close(&p->thread);
+ }
- if (p->mtCoder->alloc)
- IAlloc_Free(p->mtCoder->alloc, p->outBuf);
- p->outBuf = 0;
+ if (p->mtCoder->alloc)
+ IAlloc_Free(p->mtCoder->alloc, p->outBuf);
+ p->outBuf = 0;
- if (p->mtCoder->alloc)
- IAlloc_Free(p->mtCoder->alloc, p->inBuf);
- p->inBuf = 0;
+ if (p->mtCoder->alloc)
+ IAlloc_Free(p->mtCoder->alloc, p->inBuf);
+ p->inBuf = 0;
}
#define MY_BUF_ALLOC(buf, size, newSize) \
- if (buf == 0 || size != newSize) \
- { IAlloc_Free(p->mtCoder->alloc, buf); \
- size = newSize; buf = (Byte *)IAlloc_Alloc(p->mtCoder->alloc, size); \
- if (buf == 0) return SZ_ERROR_MEM; }
+ if (buf == 0 || size != newSize) \
+ { IAlloc_Free(p->mtCoder->alloc, buf); \
+ size = newSize; buf = (Byte *)IAlloc_Alloc(p->mtCoder->alloc, size); \
+ if (buf == 0) return SZ_ERROR_MEM; }
static SRes CMtThread_Prepare(CMtThread *p)
{
- MY_BUF_ALLOC(p->inBuf, p->inBufSize, p->mtCoder->blockSize)
- MY_BUF_ALLOC(p->outBuf, p->outBufSize, p->mtCoder->destBlockSize)
+ MY_BUF_ALLOC(p->inBuf, p->inBufSize, p->mtCoder->blockSize)
+ MY_BUF_ALLOC(p->outBuf, p->outBufSize, p->mtCoder->destBlockSize)
- p->stopReading = False;
- p->stopWriting = False;
- RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->canRead));
- RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->canWrite));
+ p->stopReading = False;
+ p->stopWriting = False;
+ RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->canRead));
+ RINOK_THREAD(AutoResetEvent_CreateNotSignaled(&p->canWrite));
- return SZ_OK;
+ return SZ_OK;
}
static SRes FullRead(ISeqInStream *stream, Byte *data, size_t *processedSize)
{
- size_t size = *processedSize;
- *processedSize = 0;
- while (size != 0)
- {
- size_t curSize = size;
- SRes res = stream->Read(stream, data, &curSize);
- *processedSize += curSize;
- data += curSize;
- size -= curSize;
- RINOK(res);
- if (curSize == 0)
- return SZ_OK;
- }
- return SZ_OK;
+ size_t size = *processedSize;
+ *processedSize = 0;
+ while (size != 0)
+ {
+ size_t curSize = size;
+ SRes res = stream->Read(stream, data, &curSize);
+ *processedSize += curSize;
+ data += curSize;
+ size -= curSize;
+ RINOK(res);
+ if (curSize == 0)
+ return SZ_OK;
+ }
+ return SZ_OK;
}
#define GET_NEXT_THREAD(p) &p->mtCoder->threads[p->index == p->mtCoder->numThreads - 1 ? 0 : p->index + 1]
static SRes MtThread_Process(CMtThread *p, Bool *stop)
{
- CMtThread *next;
- *stop = True;
- if (Event_Wait(&p->canRead) != 0)
- return SZ_ERROR_THREAD;
-
- next = GET_NEXT_THREAD(p);
-
- if (p->stopReading)
- {
- next->stopReading = True;
- return Event_Set(&next->canRead) == 0 ? SZ_OK : SZ_ERROR_THREAD;
- }
-
- {
- size_t size = p->mtCoder->blockSize;
- size_t destSize = p->outBufSize;
-
- RINOK(FullRead(p->mtCoder->inStream, p->inBuf, &size));
- next->stopReading = *stop = (size != p->mtCoder->blockSize);
- if (Event_Set(&next->canRead) != 0)
- return SZ_ERROR_THREAD;
-
- RINOK(p->mtCoder->mtCallback->Code(p->mtCoder->mtCallback, p->index,
- p->outBuf, &destSize, p->inBuf, size, *stop));
-
- MtProgress_Reinit(&p->mtCoder->mtProgress, p->index);
-
- if (Event_Wait(&p->canWrite) != 0)
- return SZ_ERROR_THREAD;
- if (p->stopWriting)
- return SZ_ERROR_FAIL;
- if (p->mtCoder->outStream->Write(p->mtCoder->outStream, p->outBuf, destSize) != destSize)
- return SZ_ERROR_WRITE;
- return Event_Set(&next->canWrite) == 0 ? SZ_OK : SZ_ERROR_THREAD;
- }
+ CMtThread *next;
+ *stop = True;
+ if (Event_Wait(&p->canRead) != 0)
+ return SZ_ERROR_THREAD;
+
+ next = GET_NEXT_THREAD(p);
+
+ if (p->stopReading)
+ {
+ next->stopReading = True;
+ return Event_Set(&next->canRead) == 0 ? SZ_OK : SZ_ERROR_THREAD;
+ }
+
+ {
+ size_t size = p->mtCoder->blockSize;
+ size_t destSize = p->outBufSize;
+
+ RINOK(FullRead(p->mtCoder->inStream, p->inBuf, &size));
+ next->stopReading = *stop = (size != p->mtCoder->blockSize);
+ if (Event_Set(&next->canRead) != 0)
+ return SZ_ERROR_THREAD;
+
+ RINOK(p->mtCoder->mtCallback->Code(p->mtCoder->mtCallback, p->index,
+ p->outBuf, &destSize, p->inBuf, size, *stop));
+
+ MtProgress_Reinit(&p->mtCoder->mtProgress, p->index);
+
+ if (Event_Wait(&p->canWrite) != 0)
+ return SZ_ERROR_THREAD;
+ if (p->stopWriting)
+ return SZ_ERROR_FAIL;
+ if (p->mtCoder->outStream->Write(p->mtCoder->outStream, p->outBuf, destSize) != destSize)
+ return SZ_ERROR_WRITE;
+ return Event_Set(&next->canWrite) == 0 ? SZ_OK : SZ_ERROR_THREAD;
+ }
}
static THREAD_FUNC_RET_TYPE THREAD_FUNC_CALL_TYPE ThreadFunc(void *pp)
{
- CMtThread *p = (CMtThread *)pp;
- for (;;)
- {
- Bool stop;
- CMtThread *next = GET_NEXT_THREAD(p);
- SRes res = MtThread_Process(p, &stop);
- if (res != SZ_OK)
- {
- MtCoder_SetError(p->mtCoder, res);
- MtProgress_SetError(&p->mtCoder->mtProgress, res);
- next->stopReading = True;
- next->stopWriting = True;
- Event_Set(&next->canRead);
- Event_Set(&next->canWrite);
- return res;
- }
- if (stop)
- return 0;
- }
+ CMtThread *p = (CMtThread *)pp;
+ for (;;)
+ {
+ Bool stop;
+ CMtThread *next = GET_NEXT_THREAD(p);
+ SRes res = MtThread_Process(p, &stop);
+ if (res != SZ_OK)
+ {
+ MtCoder_SetError(p->mtCoder, res);
+ MtProgress_SetError(&p->mtCoder->mtProgress, res);
+ next->stopReading = True;
+ next->stopWriting = True;
+ Event_Set(&next->canRead);
+ Event_Set(&next->canWrite);
+ return res;
+ }
+ if (stop)
+ return 0;
+ }
}
void MtCoder_Construct(CMtCoder* p)
{
- unsigned i;
- p->alloc = 0;
- for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
- {
- CMtThread *t = &p->threads[i];
- t->index = i;
- CMtThread_Construct(t, p);
- }
- CriticalSection_Init(&p->cs);
- CriticalSection_Init(&p->mtProgress.cs);
+ unsigned i;
+ p->alloc = 0;
+ for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
+ {
+ CMtThread *t = &p->threads[i];
+ t->index = i;
+ CMtThread_Construct(t, p);
+ }
+ CriticalSection_Init(&p->cs);
+ CriticalSection_Init(&p->mtProgress.cs);
}
void MtCoder_Destruct(CMtCoder* p)
{
- unsigned i;
- for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
- CMtThread_Destruct(&p->threads[i]);
- CriticalSection_Delete(&p->cs);
- CriticalSection_Delete(&p->mtProgress.cs);
+ unsigned i;
+ for (i = 0; i < NUM_MT_CODER_THREADS_MAX; i++)
+ CMtThread_Destruct(&p->threads[i]);
+ CriticalSection_Delete(&p->cs);
+ CriticalSection_Delete(&p->mtProgress.cs);
}
SRes MtCoder_Code(CMtCoder *p)
{
- unsigned i, numThreads = p->numThreads;
- SRes res = SZ_OK;
- p->res = SZ_OK;
-
- MtProgress_Init(&p->mtProgress, p->progress);
-
- for (i = 0; i < numThreads; i++)
- {
- RINOK(CMtThread_Prepare(&p->threads[i]));
- }
-
- for (i = 0; i < numThreads; i++)
- {
- CMtThread *t = &p->threads[i];
- CLoopThread *lt = &t->thread;
-
- if (!Thread_WasCreated(&lt->thread))
- {
- lt->func = ThreadFunc;
- lt->param = t;
-
- if (LoopThread_Create(lt) != SZ_OK)
- {
- res = SZ_ERROR_THREAD;
- break;
- }
- }
- }
-
- if (res == SZ_OK)
- {
- unsigned j;
- for (i = 0; i < numThreads; i++)
- {
- CMtThread *t = &p->threads[i];
- if (LoopThread_StartSubThread(&t->thread) != SZ_OK)
- {
- res = SZ_ERROR_THREAD;
- p->threads[0].stopReading = True;
- break;
- }
- }
-
- Event_Set(&p->threads[0].canWrite);
- Event_Set(&p->threads[0].canRead);
-
- for (j = 0; j < i; j++)
- LoopThread_WaitSubThread(&p->threads[j].thread);
- }
-
- for (i = 0; i < numThreads; i++)
- CMtThread_CloseEvents(&p->threads[i]);
- return (res == SZ_OK) ? p->res : res;
+ unsigned i, numThreads = p->numThreads;
+ SRes res = SZ_OK;
+ p->res = SZ_OK;
+
+ MtProgress_Init(&p->mtProgress, p->progress);
+
+ for (i = 0; i < numThreads; i++)
+ {
+ RINOK(CMtThread_Prepare(&p->threads[i]));
+ }
+
+ for (i = 0; i < numThreads; i++)
+ {
+ CMtThread *t = &p->threads[i];
+ CLoopThread *lt = &t->thread;
+
+ if (!Thread_WasCreated(&lt->thread))
+ {
+ lt->func = ThreadFunc;
+ lt->param = t;
+
+ if (LoopThread_Create(lt) != SZ_OK)
+ {
+ res = SZ_ERROR_THREAD;
+ break;
+ }
+ }
+ }
+
+ if (res == SZ_OK)
+ {
+ unsigned j;
+ for (i = 0; i < numThreads; i++)
+ {
+ CMtThread *t = &p->threads[i];
+ if (LoopThread_StartSubThread(&t->thread) != SZ_OK)
+ {
+ res = SZ_ERROR_THREAD;
+ p->threads[0].stopReading = True;
+ break;
+ }
+ }
+
+ Event_Set(&p->threads[0].canWrite);
+ Event_Set(&p->threads[0].canRead);
+
+ for (j = 0; j < i; j++)
+ LoopThread_WaitSubThread(&p->threads[j].thread);
+ }
+
+ for (i = 0; i < numThreads; i++)
+ CMtThread_CloseEvents(&p->threads[i]);
+ return (res == SZ_OK) ? p->res : res;
}
diff --git a/src/lib/lib7z/MtCoder.h b/src/lib/lib7z/MtCoder.h
index e2cbdc3ab2e..89764de78f6 100644
--- a/src/lib/lib7z/MtCoder.h
+++ b/src/lib/lib7z/MtCoder.h
@@ -10,14 +10,14 @@ EXTERN_C_BEGIN
typedef struct
{
- CThread thread;
- CAutoResetEvent startEvent;
- CAutoResetEvent finishedEvent;
- int stop;
-
- THREAD_FUNC_TYPE func;
- LPVOID param;
- THREAD_FUNC_RET_TYPE res;
+ CThread thread;
+ CAutoResetEvent startEvent;
+ CAutoResetEvent finishedEvent;
+ int stop;
+
+ THREAD_FUNC_TYPE func;
+ LPVOID param;
+ THREAD_FUNC_RET_TYPE res;
} CLoopThread;
void LoopThread_Construct(CLoopThread *p);
@@ -35,13 +35,13 @@ WRes LoopThread_WaitSubThread(CLoopThread *p);
typedef struct
{
- UInt64 totalInSize;
- UInt64 totalOutSize;
- ICompressProgress *progress;
- SRes res;
- CCriticalSection cs;
- UInt64 inSizes[NUM_MT_CODER_THREADS_MAX];
- UInt64 outSizes[NUM_MT_CODER_THREADS_MAX];
+ UInt64 totalInSize;
+ UInt64 totalOutSize;
+ ICompressProgress *progress;
+ SRes res;
+ CCriticalSection cs;
+ UInt64 inSizes[NUM_MT_CODER_THREADS_MAX];
+ UInt64 outSizes[NUM_MT_CODER_THREADS_MAX];
} CMtProgress;
SRes MtProgress_Set(CMtProgress *p, unsigned index, UInt64 inSize, UInt64 outSize);
@@ -50,43 +50,43 @@ struct _CMtCoder;
typedef struct
{
- struct _CMtCoder *mtCoder;
- Byte *outBuf;
- size_t outBufSize;
- Byte *inBuf;
- size_t inBufSize;
- unsigned index;
- CLoopThread thread;
-
- Bool stopReading;
- Bool stopWriting;
- CAutoResetEvent canRead;
- CAutoResetEvent canWrite;
+ struct _CMtCoder *mtCoder;
+ Byte *outBuf;
+ size_t outBufSize;
+ Byte *inBuf;
+ size_t inBufSize;
+ unsigned index;
+ CLoopThread thread;
+
+ Bool stopReading;
+ Bool stopWriting;
+ CAutoResetEvent canRead;
+ CAutoResetEvent canWrite;
} CMtThread;
typedef struct
{
- SRes (*Code)(void *p, unsigned index, Byte *dest, size_t *destSize,
- const Byte *src, size_t srcSize, int finished);
+ SRes (*Code)(void *p, unsigned index, Byte *dest, size_t *destSize,
+ const Byte *src, size_t srcSize, int finished);
} IMtCoderCallback;
typedef struct _CMtCoder
{
- size_t blockSize;
- size_t destBlockSize;
- unsigned numThreads;
+ size_t blockSize;
+ size_t destBlockSize;
+ unsigned numThreads;
- ISeqInStream *inStream;
- ISeqOutStream *outStream;
- ICompressProgress *progress;
- ISzAlloc *alloc;
+ ISeqInStream *inStream;
+ ISeqOutStream *outStream;
+ ICompressProgress *progress;
+ ISzAlloc *alloc;
- IMtCoderCallback *mtCallback;
- CCriticalSection cs;
- SRes res;
+ IMtCoderCallback *mtCallback;
+ CCriticalSection cs;
+ SRes res;
- CMtProgress mtProgress;
- CMtThread threads[NUM_MT_CODER_THREADS_MAX];
+ CMtProgress mtProgress;
+ CMtThread threads[NUM_MT_CODER_THREADS_MAX];
} CMtCoder;
void MtCoder_Construct(CMtCoder* p);
diff --git a/src/lib/lib7z/Ppmd.h b/src/lib/lib7z/Ppmd.h
index db8a16d6371..480f6891e76 100644
--- a/src/lib/lib7z/Ppmd.h
+++ b/src/lib/lib7z/Ppmd.h
@@ -11,7 +11,7 @@ This code is based on PPMd var.H (2001): Dmitry Shkarin : Public domain */
EXTERN_C_BEGIN
#ifdef MY_CPU_32BIT
- #define PPMD_32BIT
+ #define PPMD_32BIT
#endif
#define PPMD_INT_BITS 7
@@ -35,51 +35,51 @@ EXTERN_C_BEGIN
/* SEE-contexts for PPM-contexts with masked symbols */
typedef struct
{
- UInt16 Summ; /* Freq */
- Byte Shift; /* Speed of Freq change; low Shift is for fast change */
- Byte Count; /* Count to next change of Shift */
+ UInt16 Summ; /* Freq */
+ Byte Shift; /* Speed of Freq change; low Shift is for fast change */
+ Byte Count; /* Count to next change of Shift */
} CPpmd_See;
#define Ppmd_See_Update(p) if ((p)->Shift < PPMD_PERIOD_BITS && --(p)->Count == 0) \
- { (p)->Summ <<= 1; (p)->Count = (Byte)(3 << (p)->Shift++); }
+ { (p)->Summ <<= 1; (p)->Count = (Byte)(3 << (p)->Shift++); }
typedef struct
{
- Byte Symbol;
- Byte Freq;
- UInt16 SuccessorLow;
- UInt16 SuccessorHigh;
+ Byte Symbol;
+ Byte Freq;
+ UInt16 SuccessorLow;
+ UInt16 SuccessorHigh;
} CPpmd_State;
#pragma pack(pop)
typedef
- #ifdef PPMD_32BIT
- CPpmd_State *
- #else
- UInt32
- #endif
- CPpmd_State_Ref;
+ #ifdef PPMD_32BIT
+ CPpmd_State *
+ #else
+ UInt32
+ #endif
+ CPpmd_State_Ref;
typedef
- #ifdef PPMD_32BIT
- void *
- #else
- UInt32
- #endif
- CPpmd_Void_Ref;
+ #ifdef PPMD_32BIT
+ void *
+ #else
+ UInt32
+ #endif
+ CPpmd_Void_Ref;
typedef
- #ifdef PPMD_32BIT
- Byte *
- #else
- UInt32
- #endif
- CPpmd_Byte_Ref;
+ #ifdef PPMD_32BIT
+ Byte *
+ #else
+ UInt32
+ #endif
+ CPpmd_Byte_Ref;
#define PPMD_SetAllBitsIn256Bytes(p) \
- { unsigned i; for (i = 0; i < 256 / sizeof(p[0]); i += 8) { \
- p[i+7] = p[i+6] = p[i+5] = p[i+4] = p[i+3] = p[i+2] = p[i+1] = p[i+0] = ~(size_t)0; }}
+ { unsigned i; for (i = 0; i < 256 / sizeof(p[0]); i += 8) { \
+ p[i+7] = p[i+6] = p[i+5] = p[i+4] = p[i+3] = p[i+2] = p[i+1] = p[i+0] = ~(size_t)0; }}
EXTERN_C_END
diff --git a/src/lib/lib7z/Ppmd7.c b/src/lib/lib7z/Ppmd7.c
index 58244e13610..a50e800d3ab 100644
--- a/src/lib/lib7z/Ppmd7.c
+++ b/src/lib/lib7z/Ppmd7.c
@@ -17,9 +17,9 @@ static const UInt16 kInitBinEsc[] = { 0x3CDD, 0x1F3F, 0x59BF, 0x48F3, 0x64A1, 0x
#define I2U(indx) (p->Indx2Units[indx])
#ifdef PPMD_32BIT
- #define REF(ptr) (ptr)
+ #define REF(ptr) (ptr)
#else
- #define REF(ptr) ((UInt32)((Byte *)(ptr) - (p)->Base))
+ #define REF(ptr) ((UInt32)((Byte *)(ptr) - (p)->Base))
#endif
#define STATS_REF(ptr) ((CPpmd_State_Ref)REF(ptr))
@@ -34,675 +34,675 @@ typedef CPpmd7_Context * CTX_PTR;
struct CPpmd7_Node_;
typedef
- #ifdef PPMD_32BIT
- struct CPpmd7_Node_ *
- #else
- UInt32
- #endif
- CPpmd7_Node_Ref;
+ #ifdef PPMD_32BIT
+ struct CPpmd7_Node_ *
+ #else
+ UInt32
+ #endif
+ CPpmd7_Node_Ref;
typedef struct CPpmd7_Node_
{
- UInt16 Stamp; /* must be at offset 0 as CPpmd7_Context::NumStats. Stamp=0 means free */
- UInt16 NU;
- CPpmd7_Node_Ref Next; /* must be at offset >= 4 */
- CPpmd7_Node_Ref Prev;
+ UInt16 Stamp; /* must be at offset 0 as CPpmd7_Context::NumStats. Stamp=0 means free */
+ UInt16 NU;
+ CPpmd7_Node_Ref Next; /* must be at offset >= 4 */
+ CPpmd7_Node_Ref Prev;
} CPpmd7_Node;
#ifdef PPMD_32BIT
- #define NODE(ptr) (ptr)
+ #define NODE(ptr) (ptr)
#else
- #define NODE(offs) ((CPpmd7_Node *)(p->Base + (offs)))
+ #define NODE(offs) ((CPpmd7_Node *)(p->Base + (offs)))
#endif
void Ppmd7_Construct(CPpmd7 *p)
{
- unsigned i, k, m;
-
- p->Base = 0;
-
- for (i = 0, k = 0; i < PPMD_NUM_INDEXES; i++)
- {
- unsigned step = (i >= 12 ? 4 : (i >> 2) + 1);
- do { p->Units2Indx[k++] = (Byte)i; } while(--step);
- p->Indx2Units[i] = (Byte)k;
- }
-
- p->NS2BSIndx[0] = (0 << 1);
- p->NS2BSIndx[1] = (1 << 1);
- memset(p->NS2BSIndx + 2, (2 << 1), 9);
- memset(p->NS2BSIndx + 11, (3 << 1), 256 - 11);
-
- for (i = 0; i < 3; i++)
- p->NS2Indx[i] = (Byte)i;
- for (m = i, k = 1; i < 256; i++)
- {
- p->NS2Indx[i] = (Byte)m;
- if (--k == 0)
- k = (++m) - 2;
- }
-
- memset(p->HB2Flag, 0, 0x40);
- memset(p->HB2Flag + 0x40, 8, 0x100 - 0x40);
+ unsigned i, k, m;
+
+ p->Base = 0;
+
+ for (i = 0, k = 0; i < PPMD_NUM_INDEXES; i++)
+ {
+ unsigned step = (i >= 12 ? 4 : (i >> 2) + 1);
+ do { p->Units2Indx[k++] = (Byte)i; } while(--step);
+ p->Indx2Units[i] = (Byte)k;
+ }
+
+ p->NS2BSIndx[0] = (0 << 1);
+ p->NS2BSIndx[1] = (1 << 1);
+ memset(p->NS2BSIndx + 2, (2 << 1), 9);
+ memset(p->NS2BSIndx + 11, (3 << 1), 256 - 11);
+
+ for (i = 0; i < 3; i++)
+ p->NS2Indx[i] = (Byte)i;
+ for (m = i, k = 1; i < 256; i++)
+ {
+ p->NS2Indx[i] = (Byte)m;
+ if (--k == 0)
+ k = (++m) - 2;
+ }
+
+ memset(p->HB2Flag, 0, 0x40);
+ memset(p->HB2Flag + 0x40, 8, 0x100 - 0x40);
}
void Ppmd7_Free(CPpmd7 *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->Base);
- p->Size = 0;
- p->Base = 0;
+ alloc->Free(alloc, p->Base);
+ p->Size = 0;
+ p->Base = 0;
}
Bool Ppmd7_Alloc(CPpmd7 *p, UInt32 size, ISzAlloc *alloc)
{
- if (p->Base == 0 || p->Size != size)
- {
- Ppmd7_Free(p, alloc);
- p->AlignOffset =
- #ifdef PPMD_32BIT
- (4 - size) & 3;
- #else
- 4 - (size & 3);
- #endif
- if ((p->Base = (Byte *)alloc->Alloc(alloc, p->AlignOffset + size
- #ifndef PPMD_32BIT
- + UNIT_SIZE
- #endif
- )) == 0)
- return False;
- p->Size = size;
- }
- return True;
+ if (p->Base == 0 || p->Size != size)
+ {
+ Ppmd7_Free(p, alloc);
+ p->AlignOffset =
+ #ifdef PPMD_32BIT
+ (4 - size) & 3;
+ #else
+ 4 - (size & 3);
+ #endif
+ if ((p->Base = (Byte *)alloc->Alloc(alloc, p->AlignOffset + size
+ #ifndef PPMD_32BIT
+ + UNIT_SIZE
+ #endif
+ )) == 0)
+ return False;
+ p->Size = size;
+ }
+ return True;
}
static void InsertNode(CPpmd7 *p, void *node, unsigned indx)
{
- *((CPpmd_Void_Ref *)node) = p->FreeList[indx];
- p->FreeList[indx] = REF(node);
+ *((CPpmd_Void_Ref *)node) = p->FreeList[indx];
+ p->FreeList[indx] = REF(node);
}
static void *RemoveNode(CPpmd7 *p, unsigned indx)
{
- CPpmd_Void_Ref *node = (CPpmd_Void_Ref *)Ppmd7_GetPtr(p, p->FreeList[indx]);
- p->FreeList[indx] = *node;
- return node;
+ CPpmd_Void_Ref *node = (CPpmd_Void_Ref *)Ppmd7_GetPtr(p, p->FreeList[indx]);
+ p->FreeList[indx] = *node;
+ return node;
}
static void SplitBlock(CPpmd7 *p, void *ptr, unsigned oldIndx, unsigned newIndx)
{
- unsigned i, nu = I2U(oldIndx) - I2U(newIndx);
- ptr = (Byte *)ptr + U2B(I2U(newIndx));
- if (I2U(i = U2I(nu)) != nu)
- {
- unsigned k = I2U(--i);
- InsertNode(p, ((Byte *)ptr) + U2B(k), nu - k - 1);
- }
- InsertNode(p, ptr, i);
+ unsigned i, nu = I2U(oldIndx) - I2U(newIndx);
+ ptr = (Byte *)ptr + U2B(I2U(newIndx));
+ if (I2U(i = U2I(nu)) != nu)
+ {
+ unsigned k = I2U(--i);
+ InsertNode(p, ((Byte *)ptr) + U2B(k), nu - k - 1);
+ }
+ InsertNode(p, ptr, i);
}
static void GlueFreeBlocks(CPpmd7 *p)
{
- #ifdef PPMD_32BIT
- CPpmd7_Node headItem;
- CPpmd7_Node_Ref head = &headItem;
- #else
- CPpmd7_Node_Ref head = p->AlignOffset + p->Size;
- #endif
-
- CPpmd7_Node_Ref n = head;
- unsigned i;
-
- p->GlueCount = 255;
-
- /* create doubly-linked list of free blocks */
- for (i = 0; i < PPMD_NUM_INDEXES; i++)
- {
- UInt16 nu = I2U(i);
- CPpmd7_Node_Ref next = (CPpmd7_Node_Ref)p->FreeList[i];
- p->FreeList[i] = 0;
- while (next != 0)
- {
- CPpmd7_Node *node = NODE(next);
- node->Next = n;
- n = NODE(n)->Prev = next;
- next = *(const CPpmd7_Node_Ref *)node;
- node->Stamp = 0;
- node->NU = (UInt16)nu;
- }
- }
- NODE(head)->Stamp = 1;
- NODE(head)->Next = n;
- NODE(n)->Prev = head;
- if (p->LoUnit != p->HiUnit)
- ((CPpmd7_Node *)p->LoUnit)->Stamp = 1;
-
- /* Glue free blocks */
- while (n != head)
- {
- CPpmd7_Node *node = NODE(n);
- UInt32 nu = (UInt32)node->NU;
- for (;;)
- {
- CPpmd7_Node *node2 = NODE(n) + nu;
- nu += node2->NU;
- if (node2->Stamp != 0 || nu >= 0x10000)
- break;
- NODE(node2->Prev)->Next = node2->Next;
- NODE(node2->Next)->Prev = node2->Prev;
- node->NU = (UInt16)nu;
- }
- n = node->Next;
- }
-
- /* Fill lists of free blocks */
- for (n = NODE(head)->Next; n != head;)
- {
- CPpmd7_Node *node = NODE(n);
- unsigned nu;
- CPpmd7_Node_Ref next = node->Next;
- for (nu = node->NU; nu > 128; nu -= 128, node += 128)
- InsertNode(p, node, PPMD_NUM_INDEXES - 1);
- if (I2U(i = U2I(nu)) != nu)
- {
- unsigned k = I2U(--i);
- InsertNode(p, node + k, nu - k - 1);
- }
- InsertNode(p, node, i);
- n = next;
- }
+ #ifdef PPMD_32BIT
+ CPpmd7_Node headItem;
+ CPpmd7_Node_Ref head = &headItem;
+ #else
+ CPpmd7_Node_Ref head = p->AlignOffset + p->Size;
+ #endif
+
+ CPpmd7_Node_Ref n = head;
+ unsigned i;
+
+ p->GlueCount = 255;
+
+ /* create doubly-linked list of free blocks */
+ for (i = 0; i < PPMD_NUM_INDEXES; i++)
+ {
+ UInt16 nu = I2U(i);
+ CPpmd7_Node_Ref next = (CPpmd7_Node_Ref)p->FreeList[i];
+ p->FreeList[i] = 0;
+ while (next != 0)
+ {
+ CPpmd7_Node *node = NODE(next);
+ node->Next = n;
+ n = NODE(n)->Prev = next;
+ next = *(const CPpmd7_Node_Ref *)node;
+ node->Stamp = 0;
+ node->NU = (UInt16)nu;
+ }
+ }
+ NODE(head)->Stamp = 1;
+ NODE(head)->Next = n;
+ NODE(n)->Prev = head;
+ if (p->LoUnit != p->HiUnit)
+ ((CPpmd7_Node *)p->LoUnit)->Stamp = 1;
+
+ /* Glue free blocks */
+ while (n != head)
+ {
+ CPpmd7_Node *node = NODE(n);
+ UInt32 nu = (UInt32)node->NU;
+ for (;;)
+ {
+ CPpmd7_Node *node2 = NODE(n) + nu;
+ nu += node2->NU;
+ if (node2->Stamp != 0 || nu >= 0x10000)
+ break;
+ NODE(node2->Prev)->Next = node2->Next;
+ NODE(node2->Next)->Prev = node2->Prev;
+ node->NU = (UInt16)nu;
+ }
+ n = node->Next;
+ }
+
+ /* Fill lists of free blocks */
+ for (n = NODE(head)->Next; n != head;)
+ {
+ CPpmd7_Node *node = NODE(n);
+ unsigned nu;
+ CPpmd7_Node_Ref next = node->Next;
+ for (nu = node->NU; nu > 128; nu -= 128, node += 128)
+ InsertNode(p, node, PPMD_NUM_INDEXES - 1);
+ if (I2U(i = U2I(nu)) != nu)
+ {
+ unsigned k = I2U(--i);
+ InsertNode(p, node + k, nu - k - 1);
+ }
+ InsertNode(p, node, i);
+ n = next;
+ }
}
static void *AllocUnitsRare(CPpmd7 *p, unsigned indx)
{
- unsigned i;
- void *retVal;
- if (p->GlueCount == 0)
- {
- GlueFreeBlocks(p);
- if (p->FreeList[indx] != 0)
- return RemoveNode(p, indx);
- }
- i = indx;
- do
- {
- if (++i == PPMD_NUM_INDEXES)
- {
- UInt32 numBytes = U2B(I2U(indx));
- p->GlueCount--;
- return ((UInt32)(p->UnitsStart - p->Text) > numBytes) ? (p->UnitsStart -= numBytes) : (NULL);
- }
- }
- while (p->FreeList[i] == 0);
- retVal = RemoveNode(p, i);
- SplitBlock(p, retVal, i, indx);
- return retVal;
+ unsigned i;
+ void *retVal;
+ if (p->GlueCount == 0)
+ {
+ GlueFreeBlocks(p);
+ if (p->FreeList[indx] != 0)
+ return RemoveNode(p, indx);
+ }
+ i = indx;
+ do
+ {
+ if (++i == PPMD_NUM_INDEXES)
+ {
+ UInt32 numBytes = U2B(I2U(indx));
+ p->GlueCount--;
+ return ((UInt32)(p->UnitsStart - p->Text) > numBytes) ? (p->UnitsStart -= numBytes) : (NULL);
+ }
+ }
+ while (p->FreeList[i] == 0);
+ retVal = RemoveNode(p, i);
+ SplitBlock(p, retVal, i, indx);
+ return retVal;
}
static void *AllocUnits(CPpmd7 *p, unsigned indx)
{
- UInt32 numBytes;
- if (p->FreeList[indx] != 0)
- return RemoveNode(p, indx);
- numBytes = U2B(I2U(indx));
- if (numBytes <= (UInt32)(p->HiUnit - p->LoUnit))
- {
- void *retVal = p->LoUnit;
- p->LoUnit += numBytes;
- return retVal;
- }
- return AllocUnitsRare(p, indx);
+ UInt32 numBytes;
+ if (p->FreeList[indx] != 0)
+ return RemoveNode(p, indx);
+ numBytes = U2B(I2U(indx));
+ if (numBytes <= (UInt32)(p->HiUnit - p->LoUnit))
+ {
+ void *retVal = p->LoUnit;
+ p->LoUnit += numBytes;
+ return retVal;
+ }
+ return AllocUnitsRare(p, indx);
}
#define MyMem12Cpy(dest, src, num) \
- { UInt32 *d = (UInt32 *)dest; const UInt32 *s = (const UInt32 *)src; UInt32 n = num; \
- do { d[0] = s[0]; d[1] = s[1]; d[2] = s[2]; s += 3; d += 3; } while(--n); }
+ { UInt32 *d = (UInt32 *)dest; const UInt32 *s = (const UInt32 *)src; UInt32 n = num; \
+ do { d[0] = s[0]; d[1] = s[1]; d[2] = s[2]; s += 3; d += 3; } while(--n); }
static void *ShrinkUnits(CPpmd7 *p, void *oldPtr, unsigned oldNU, unsigned newNU)
{
- unsigned i0 = U2I(oldNU);
- unsigned i1 = U2I(newNU);
- if (i0 == i1)
- return oldPtr;
- if (p->FreeList[i1] != 0)
- {
- void *ptr = RemoveNode(p, i1);
- MyMem12Cpy(ptr, oldPtr, newNU);
- InsertNode(p, oldPtr, i0);
- return ptr;
- }
- SplitBlock(p, oldPtr, i0, i1);
- return oldPtr;
+ unsigned i0 = U2I(oldNU);
+ unsigned i1 = U2I(newNU);
+ if (i0 == i1)
+ return oldPtr;
+ if (p->FreeList[i1] != 0)
+ {
+ void *ptr = RemoveNode(p, i1);
+ MyMem12Cpy(ptr, oldPtr, newNU);
+ InsertNode(p, oldPtr, i0);
+ return ptr;
+ }
+ SplitBlock(p, oldPtr, i0, i1);
+ return oldPtr;
}
#define SUCCESSOR(p) ((CPpmd_Void_Ref)((p)->SuccessorLow | ((UInt32)(p)->SuccessorHigh << 16)))
static void SetSuccessor(CPpmd_State *p, CPpmd_Void_Ref v)
{
- (p)->SuccessorLow = (UInt16)((UInt32)(v) & 0xFFFF);
- (p)->SuccessorHigh = (UInt16)(((UInt32)(v) >> 16) & 0xFFFF);
+ (p)->SuccessorLow = (UInt16)((UInt32)(v) & 0xFFFF);
+ (p)->SuccessorHigh = (UInt16)(((UInt32)(v) >> 16) & 0xFFFF);
}
static void RestartModel(CPpmd7 *p)
{
- unsigned i, k, m;
-
- memset(p->FreeList, 0, sizeof(p->FreeList));
- p->Text = p->Base + p->AlignOffset;
- p->HiUnit = p->Text + p->Size;
- p->LoUnit = p->UnitsStart = p->HiUnit - p->Size / 8 / UNIT_SIZE * 7 * UNIT_SIZE;
- p->GlueCount = 0;
-
- p->OrderFall = p->MaxOrder;
- p->RunLength = p->InitRL = -(Int32)((p->MaxOrder < 12) ? p->MaxOrder : 12) - 1;
- p->PrevSuccess = 0;
-
- p->MinContext = p->MaxContext = (CTX_PTR)(p->HiUnit -= UNIT_SIZE); /* AllocContext(p); */
- p->MinContext->Suffix = 0;
- p->MinContext->NumStats = 256;
- p->MinContext->SummFreq = 256 + 1;
- p->FoundState = (CPpmd_State *)p->LoUnit; /* AllocUnits(p, PPMD_NUM_INDEXES - 1); */
- p->LoUnit += U2B(256 / 2);
- p->MinContext->Stats = REF(p->FoundState);
- for (i = 0; i < 256; i++)
- {
- CPpmd_State *s = &p->FoundState[i];
- s->Symbol = (Byte)i;
- s->Freq = 1;
- SetSuccessor(s, 0);
- }
-
- for (i = 0; i < 128; i++)
- for (k = 0; k < 8; k++)
- {
- UInt16 *dest = p->BinSumm[i] + k;
- UInt16 val = (UInt16)(PPMD_BIN_SCALE - kInitBinEsc[k] / (i + 2));
- for (m = 0; m < 64; m += 8)
- dest[m] = val;
- }
-
- for (i = 0; i < 25; i++)
- for (k = 0; k < 16; k++)
- {
- CPpmd_See *s = &p->See[i][k];
- s->Summ = (UInt16)((5 * i + 10) << (s->Shift = PPMD_PERIOD_BITS - 4));
- s->Count = 4;
- }
+ unsigned i, k, m;
+
+ memset(p->FreeList, 0, sizeof(p->FreeList));
+ p->Text = p->Base + p->AlignOffset;
+ p->HiUnit = p->Text + p->Size;
+ p->LoUnit = p->UnitsStart = p->HiUnit - p->Size / 8 / UNIT_SIZE * 7 * UNIT_SIZE;
+ p->GlueCount = 0;
+
+ p->OrderFall = p->MaxOrder;
+ p->RunLength = p->InitRL = -(Int32)((p->MaxOrder < 12) ? p->MaxOrder : 12) - 1;
+ p->PrevSuccess = 0;
+
+ p->MinContext = p->MaxContext = (CTX_PTR)(p->HiUnit -= UNIT_SIZE); /* AllocContext(p); */
+ p->MinContext->Suffix = 0;
+ p->MinContext->NumStats = 256;
+ p->MinContext->SummFreq = 256 + 1;
+ p->FoundState = (CPpmd_State *)p->LoUnit; /* AllocUnits(p, PPMD_NUM_INDEXES - 1); */
+ p->LoUnit += U2B(256 / 2);
+ p->MinContext->Stats = REF(p->FoundState);
+ for (i = 0; i < 256; i++)
+ {
+ CPpmd_State *s = &p->FoundState[i];
+ s->Symbol = (Byte)i;
+ s->Freq = 1;
+ SetSuccessor(s, 0);
+ }
+
+ for (i = 0; i < 128; i++)
+ for (k = 0; k < 8; k++)
+ {
+ UInt16 *dest = p->BinSumm[i] + k;
+ UInt16 val = (UInt16)(PPMD_BIN_SCALE - kInitBinEsc[k] / (i + 2));
+ for (m = 0; m < 64; m += 8)
+ dest[m] = val;
+ }
+
+ for (i = 0; i < 25; i++)
+ for (k = 0; k < 16; k++)
+ {
+ CPpmd_See *s = &p->See[i][k];
+ s->Summ = (UInt16)((5 * i + 10) << (s->Shift = PPMD_PERIOD_BITS - 4));
+ s->Count = 4;
+ }
}
void Ppmd7_Init(CPpmd7 *p, unsigned maxOrder)
{
- p->MaxOrder = maxOrder;
- RestartModel(p);
- p->DummySee.Shift = PPMD_PERIOD_BITS;
- p->DummySee.Summ = 0; /* unused */
- p->DummySee.Count = 64; /* unused */
+ p->MaxOrder = maxOrder;
+ RestartModel(p);
+ p->DummySee.Shift = PPMD_PERIOD_BITS;
+ p->DummySee.Summ = 0; /* unused */
+ p->DummySee.Count = 64; /* unused */
}
static CTX_PTR CreateSuccessors(CPpmd7 *p, Bool skip)
{
- CPpmd_State upState;
- CTX_PTR c = p->MinContext;
- CPpmd_Byte_Ref upBranch = (CPpmd_Byte_Ref)SUCCESSOR(p->FoundState);
- CPpmd_State *ps[PPMD7_MAX_ORDER];
- unsigned numPs = 0;
-
- if (!skip)
- ps[numPs++] = p->FoundState;
-
- while (c->Suffix)
- {
- CPpmd_Void_Ref successor;
- CPpmd_State *s;
- c = SUFFIX(c);
- if (c->NumStats != 1)
- {
- for (s = STATS(c); s->Symbol != p->FoundState->Symbol; s++);
- }
- else
- s = ONE_STATE(c);
- successor = SUCCESSOR(s);
- if (successor != upBranch)
- {
- c = CTX(successor);
- if (numPs == 0)
- return c;
- break;
- }
- ps[numPs++] = s;
- }
-
- upState.Symbol = *(const Byte *)Ppmd7_GetPtr(p, upBranch);
- SetSuccessor(&upState, upBranch + 1);
-
- if (c->NumStats == 1)
- upState.Freq = ONE_STATE(c)->Freq;
- else
- {
- UInt32 cf, s0;
- CPpmd_State *s;
- for (s = STATS(c); s->Symbol != upState.Symbol; s++);
- cf = s->Freq - 1;
- s0 = c->SummFreq - c->NumStats - cf;
- upState.Freq = (Byte)(1 + ((2 * cf <= s0) ? (5 * cf > s0) : ((2 * cf + 3 * s0 - 1) / (2 * s0))));
- }
-
- do
- {
- /* Create Child */
- CTX_PTR c1; /* = AllocContext(p); */
- if (p->HiUnit != p->LoUnit)
- c1 = (CTX_PTR)(p->HiUnit -= UNIT_SIZE);
- else if (p->FreeList[0] != 0)
- c1 = (CTX_PTR)RemoveNode(p, 0);
- else
- {
- c1 = (CTX_PTR)AllocUnitsRare(p, 0);
- if (!c1)
- return NULL;
- }
- c1->NumStats = 1;
- *ONE_STATE(c1) = upState;
- c1->Suffix = REF(c);
- SetSuccessor(ps[--numPs], REF(c1));
- c = c1;
- }
- while (numPs != 0);
-
- return c;
+ CPpmd_State upState;
+ CTX_PTR c = p->MinContext;
+ CPpmd_Byte_Ref upBranch = (CPpmd_Byte_Ref)SUCCESSOR(p->FoundState);
+ CPpmd_State *ps[PPMD7_MAX_ORDER];
+ unsigned numPs = 0;
+
+ if (!skip)
+ ps[numPs++] = p->FoundState;
+
+ while (c->Suffix)
+ {
+ CPpmd_Void_Ref successor;
+ CPpmd_State *s;
+ c = SUFFIX(c);
+ if (c->NumStats != 1)
+ {
+ for (s = STATS(c); s->Symbol != p->FoundState->Symbol; s++);
+ }
+ else
+ s = ONE_STATE(c);
+ successor = SUCCESSOR(s);
+ if (successor != upBranch)
+ {
+ c = CTX(successor);
+ if (numPs == 0)
+ return c;
+ break;
+ }
+ ps[numPs++] = s;
+ }
+
+ upState.Symbol = *(const Byte *)Ppmd7_GetPtr(p, upBranch);
+ SetSuccessor(&upState, upBranch + 1);
+
+ if (c->NumStats == 1)
+ upState.Freq = ONE_STATE(c)->Freq;
+ else
+ {
+ UInt32 cf, s0;
+ CPpmd_State *s;
+ for (s = STATS(c); s->Symbol != upState.Symbol; s++);
+ cf = s->Freq - 1;
+ s0 = c->SummFreq - c->NumStats - cf;
+ upState.Freq = (Byte)(1 + ((2 * cf <= s0) ? (5 * cf > s0) : ((2 * cf + 3 * s0 - 1) / (2 * s0))));
+ }
+
+ do
+ {
+ /* Create Child */
+ CTX_PTR c1; /* = AllocContext(p); */
+ if (p->HiUnit != p->LoUnit)
+ c1 = (CTX_PTR)(p->HiUnit -= UNIT_SIZE);
+ else if (p->FreeList[0] != 0)
+ c1 = (CTX_PTR)RemoveNode(p, 0);
+ else
+ {
+ c1 = (CTX_PTR)AllocUnitsRare(p, 0);
+ if (!c1)
+ return NULL;
+ }
+ c1->NumStats = 1;
+ *ONE_STATE(c1) = upState;
+ c1->Suffix = REF(c);
+ SetSuccessor(ps[--numPs], REF(c1));
+ c = c1;
+ }
+ while (numPs != 0);
+
+ return c;
}
static void SwapStates(CPpmd_State *t1, CPpmd_State *t2)
{
- CPpmd_State tmp = *t1;
- *t1 = *t2;
- *t2 = tmp;
+ CPpmd_State tmp = *t1;
+ *t1 = *t2;
+ *t2 = tmp;
}
static void UpdateModel(CPpmd7 *p)
{
- CPpmd_Void_Ref successor, fSuccessor = SUCCESSOR(p->FoundState);
- CTX_PTR c;
- unsigned s0, ns;
-
- if (p->FoundState->Freq < MAX_FREQ / 4 && p->MinContext->Suffix != 0)
- {
- c = SUFFIX(p->MinContext);
-
- if (c->NumStats == 1)
- {
- CPpmd_State *s = ONE_STATE(c);
- if (s->Freq < 32)
- s->Freq++;
- }
- else
- {
- CPpmd_State *s = STATS(c);
- if (s->Symbol != p->FoundState->Symbol)
- {
- do { s++; } while (s->Symbol != p->FoundState->Symbol);
- if (s[0].Freq >= s[-1].Freq)
- {
- SwapStates(&s[0], &s[-1]);
- s--;
- }
- }
- if (s->Freq < MAX_FREQ - 9)
- {
- s->Freq += 2;
- c->SummFreq += 2;
- }
- }
- }
-
- if (p->OrderFall == 0)
- {
- p->MinContext = p->MaxContext = CreateSuccessors(p, True);
- if (p->MinContext == 0)
- {
- RestartModel(p);
- return;
- }
- SetSuccessor(p->FoundState, REF(p->MinContext));
- return;
- }
-
- *p->Text++ = p->FoundState->Symbol;
- successor = REF(p->Text);
- if (p->Text >= p->UnitsStart)
- {
- RestartModel(p);
- return;
- }
-
- if (fSuccessor)
- {
- if (fSuccessor <= successor)
- {
- CTX_PTR cs = CreateSuccessors(p, False);
- if (cs == NULL)
- {
- RestartModel(p);
- return;
- }
- fSuccessor = REF(cs);
- }
- if (--p->OrderFall == 0)
- {
- successor = fSuccessor;
- p->Text -= (p->MaxContext != p->MinContext);
- }
- }
- else
- {
- SetSuccessor(p->FoundState, successor);
- fSuccessor = REF(p->MinContext);
- }
-
- s0 = p->MinContext->SummFreq - (ns = p->MinContext->NumStats) - (p->FoundState->Freq - 1);
-
- for (c = p->MaxContext; c != p->MinContext; c = SUFFIX(c))
- {
- unsigned ns1;
- UInt32 cf, sf;
- if ((ns1 = c->NumStats) != 1)
- {
- if ((ns1 & 1) == 0)
- {
- /* Expand for one UNIT */
- unsigned oldNU = ns1 >> 1;
- unsigned i = U2I(oldNU);
- if (i != U2I(oldNU + 1))
- {
- void *ptr = AllocUnits(p, i + 1);
- void *oldPtr;
- if (!ptr)
- {
- RestartModel(p);
- return;
- }
- oldPtr = STATS(c);
- MyMem12Cpy(ptr, oldPtr, oldNU);
- InsertNode(p, oldPtr, i);
- c->Stats = STATS_REF(ptr);
- }
- }
- c->SummFreq = (UInt16)(c->SummFreq + (2 * ns1 < ns) + 2 * ((4 * ns1 <= ns) & (c->SummFreq <= 8 * ns1)));
- }
- else
- {
- CPpmd_State *s = (CPpmd_State*)AllocUnits(p, 0);
- if (!s)
- {
- RestartModel(p);
- return;
- }
- *s = *ONE_STATE(c);
- c->Stats = REF(s);
- if (s->Freq < MAX_FREQ / 4 - 1)
- s->Freq <<= 1;
- else
- s->Freq = MAX_FREQ - 4;
- c->SummFreq = (UInt16)(s->Freq + p->InitEsc + (ns > 3));
- }
- cf = 2 * (UInt32)p->FoundState->Freq * (c->SummFreq + 6);
- sf = (UInt32)s0 + c->SummFreq;
- if (cf < 6 * sf)
- {
- cf = 1 + (cf > sf) + (cf >= 4 * sf);
- c->SummFreq += 3;
- }
- else
- {
- cf = 4 + (cf >= 9 * sf) + (cf >= 12 * sf) + (cf >= 15 * sf);
- c->SummFreq = (UInt16)(c->SummFreq + cf);
- }
- {
- CPpmd_State *s = STATS(c) + ns1;
- SetSuccessor(s, successor);
- s->Symbol = p->FoundState->Symbol;
- s->Freq = (Byte)cf;
- c->NumStats = (UInt16)(ns1 + 1);
- }
- }
- p->MaxContext = p->MinContext = CTX(fSuccessor);
+ CPpmd_Void_Ref successor, fSuccessor = SUCCESSOR(p->FoundState);
+ CTX_PTR c;
+ unsigned s0, ns;
+
+ if (p->FoundState->Freq < MAX_FREQ / 4 && p->MinContext->Suffix != 0)
+ {
+ c = SUFFIX(p->MinContext);
+
+ if (c->NumStats == 1)
+ {
+ CPpmd_State *s = ONE_STATE(c);
+ if (s->Freq < 32)
+ s->Freq++;
+ }
+ else
+ {
+ CPpmd_State *s = STATS(c);
+ if (s->Symbol != p->FoundState->Symbol)
+ {
+ do { s++; } while (s->Symbol != p->FoundState->Symbol);
+ if (s[0].Freq >= s[-1].Freq)
+ {
+ SwapStates(&s[0], &s[-1]);
+ s--;
+ }
+ }
+ if (s->Freq < MAX_FREQ - 9)
+ {
+ s->Freq += 2;
+ c->SummFreq += 2;
+ }
+ }
+ }
+
+ if (p->OrderFall == 0)
+ {
+ p->MinContext = p->MaxContext = CreateSuccessors(p, True);
+ if (p->MinContext == 0)
+ {
+ RestartModel(p);
+ return;
+ }
+ SetSuccessor(p->FoundState, REF(p->MinContext));
+ return;
+ }
+
+ *p->Text++ = p->FoundState->Symbol;
+ successor = REF(p->Text);
+ if (p->Text >= p->UnitsStart)
+ {
+ RestartModel(p);
+ return;
+ }
+
+ if (fSuccessor)
+ {
+ if (fSuccessor <= successor)
+ {
+ CTX_PTR cs = CreateSuccessors(p, False);
+ if (cs == NULL)
+ {
+ RestartModel(p);
+ return;
+ }
+ fSuccessor = REF(cs);
+ }
+ if (--p->OrderFall == 0)
+ {
+ successor = fSuccessor;
+ p->Text -= (p->MaxContext != p->MinContext);
+ }
+ }
+ else
+ {
+ SetSuccessor(p->FoundState, successor);
+ fSuccessor = REF(p->MinContext);
+ }
+
+ s0 = p->MinContext->SummFreq - (ns = p->MinContext->NumStats) - (p->FoundState->Freq - 1);
+
+ for (c = p->MaxContext; c != p->MinContext; c = SUFFIX(c))
+ {
+ unsigned ns1;
+ UInt32 cf, sf;
+ if ((ns1 = c->NumStats) != 1)
+ {
+ if ((ns1 & 1) == 0)
+ {
+ /* Expand for one UNIT */
+ unsigned oldNU = ns1 >> 1;
+ unsigned i = U2I(oldNU);
+ if (i != U2I(oldNU + 1))
+ {
+ void *ptr = AllocUnits(p, i + 1);
+ void *oldPtr;
+ if (!ptr)
+ {
+ RestartModel(p);
+ return;
+ }
+ oldPtr = STATS(c);
+ MyMem12Cpy(ptr, oldPtr, oldNU);
+ InsertNode(p, oldPtr, i);
+ c->Stats = STATS_REF(ptr);
+ }
+ }
+ c->SummFreq = (UInt16)(c->SummFreq + (2 * ns1 < ns) + 2 * ((4 * ns1 <= ns) & (c->SummFreq <= 8 * ns1)));
+ }
+ else
+ {
+ CPpmd_State *s = (CPpmd_State*)AllocUnits(p, 0);
+ if (!s)
+ {
+ RestartModel(p);
+ return;
+ }
+ *s = *ONE_STATE(c);
+ c->Stats = REF(s);
+ if (s->Freq < MAX_FREQ / 4 - 1)
+ s->Freq <<= 1;
+ else
+ s->Freq = MAX_FREQ - 4;
+ c->SummFreq = (UInt16)(s->Freq + p->InitEsc + (ns > 3));
+ }
+ cf = 2 * (UInt32)p->FoundState->Freq * (c->SummFreq + 6);
+ sf = (UInt32)s0 + c->SummFreq;
+ if (cf < 6 * sf)
+ {
+ cf = 1 + (cf > sf) + (cf >= 4 * sf);
+ c->SummFreq += 3;
+ }
+ else
+ {
+ cf = 4 + (cf >= 9 * sf) + (cf >= 12 * sf) + (cf >= 15 * sf);
+ c->SummFreq = (UInt16)(c->SummFreq + cf);
+ }
+ {
+ CPpmd_State *s = STATS(c) + ns1;
+ SetSuccessor(s, successor);
+ s->Symbol = p->FoundState->Symbol;
+ s->Freq = (Byte)cf;
+ c->NumStats = (UInt16)(ns1 + 1);
+ }
+ }
+ p->MaxContext = p->MinContext = CTX(fSuccessor);
}
static void Rescale(CPpmd7 *p)
{
- unsigned i, adder, sumFreq, escFreq;
- CPpmd_State *stats = STATS(p->MinContext);
- CPpmd_State *s = p->FoundState;
- {
- CPpmd_State tmp = *s;
- for (; s != stats; s--)
- s[0] = s[-1];
- *s = tmp;
- }
- escFreq = p->MinContext->SummFreq - s->Freq;
- s->Freq += 4;
- adder = (p->OrderFall != 0);
- s->Freq = (Byte)((s->Freq + adder) >> 1);
- sumFreq = s->Freq;
-
- i = p->MinContext->NumStats - 1;
- do
- {
- escFreq -= (++s)->Freq;
- s->Freq = (Byte)((s->Freq + adder) >> 1);
- sumFreq += s->Freq;
- if (s[0].Freq > s[-1].Freq)
- {
- CPpmd_State *s1 = s;
- CPpmd_State tmp = *s1;
- do
- s1[0] = s1[-1];
- while (--s1 != stats && tmp.Freq > s1[-1].Freq);
- *s1 = tmp;
- }
- }
- while (--i);
-
- if (s->Freq == 0)
- {
- unsigned numStats = p->MinContext->NumStats;
- unsigned n0, n1;
- do { i++; } while ((--s)->Freq == 0);
- escFreq += i;
- p->MinContext->NumStats = (UInt16)(p->MinContext->NumStats - i);
- if (p->MinContext->NumStats == 1)
- {
- CPpmd_State tmp = *stats;
- do
- {
- tmp.Freq = (Byte)(tmp.Freq - (tmp.Freq >> 1));
- escFreq >>= 1;
- }
- while (escFreq > 1);
- InsertNode(p, stats, U2I(((numStats + 1) >> 1)));
- *(p->FoundState = ONE_STATE(p->MinContext)) = tmp;
- return;
- }
- n0 = (numStats + 1) >> 1;
- n1 = (p->MinContext->NumStats + 1) >> 1;
- if (n0 != n1)
- p->MinContext->Stats = STATS_REF(ShrinkUnits(p, stats, n0, n1));
- }
- p->MinContext->SummFreq = (UInt16)(sumFreq + escFreq - (escFreq >> 1));
- p->FoundState = STATS(p->MinContext);
+ unsigned i, adder, sumFreq, escFreq;
+ CPpmd_State *stats = STATS(p->MinContext);
+ CPpmd_State *s = p->FoundState;
+ {
+ CPpmd_State tmp = *s;
+ for (; s != stats; s--)
+ s[0] = s[-1];
+ *s = tmp;
+ }
+ escFreq = p->MinContext->SummFreq - s->Freq;
+ s->Freq += 4;
+ adder = (p->OrderFall != 0);
+ s->Freq = (Byte)((s->Freq + adder) >> 1);
+ sumFreq = s->Freq;
+
+ i = p->MinContext->NumStats - 1;
+ do
+ {
+ escFreq -= (++s)->Freq;
+ s->Freq = (Byte)((s->Freq + adder) >> 1);
+ sumFreq += s->Freq;
+ if (s[0].Freq > s[-1].Freq)
+ {
+ CPpmd_State *s1 = s;
+ CPpmd_State tmp = *s1;
+ do
+ s1[0] = s1[-1];
+ while (--s1 != stats && tmp.Freq > s1[-1].Freq);
+ *s1 = tmp;
+ }
+ }
+ while (--i);
+
+ if (s->Freq == 0)
+ {
+ unsigned numStats = p->MinContext->NumStats;
+ unsigned n0, n1;
+ do { i++; } while ((--s)->Freq == 0);
+ escFreq += i;
+ p->MinContext->NumStats = (UInt16)(p->MinContext->NumStats - i);
+ if (p->MinContext->NumStats == 1)
+ {
+ CPpmd_State tmp = *stats;
+ do
+ {
+ tmp.Freq = (Byte)(tmp.Freq - (tmp.Freq >> 1));
+ escFreq >>= 1;
+ }
+ while (escFreq > 1);
+ InsertNode(p, stats, U2I(((numStats + 1) >> 1)));
+ *(p->FoundState = ONE_STATE(p->MinContext)) = tmp;
+ return;
+ }
+ n0 = (numStats + 1) >> 1;
+ n1 = (p->MinContext->NumStats + 1) >> 1;
+ if (n0 != n1)
+ p->MinContext->Stats = STATS_REF(ShrinkUnits(p, stats, n0, n1));
+ }
+ p->MinContext->SummFreq = (UInt16)(sumFreq + escFreq - (escFreq >> 1));
+ p->FoundState = STATS(p->MinContext);
}
CPpmd_See *Ppmd7_MakeEscFreq(CPpmd7 *p, unsigned numMasked, UInt32 *escFreq)
{
- CPpmd_See *see;
- unsigned nonMasked = p->MinContext->NumStats - numMasked;
- if (p->MinContext->NumStats != 256)
- {
- see = p->See[p->NS2Indx[nonMasked - 1]] +
- (nonMasked < (unsigned)SUFFIX(p->MinContext)->NumStats - p->MinContext->NumStats) +
- 2 * (p->MinContext->SummFreq < 11 * p->MinContext->NumStats) +
- 4 * (numMasked > nonMasked) +
- p->HiBitsFlag;
- {
- unsigned r = (see->Summ >> see->Shift);
- see->Summ = (UInt16)(see->Summ - r);
- *escFreq = r + (r == 0);
- }
- }
- else
- {
- see = &p->DummySee;
- *escFreq = 1;
- }
- return see;
+ CPpmd_See *see;
+ unsigned nonMasked = p->MinContext->NumStats - numMasked;
+ if (p->MinContext->NumStats != 256)
+ {
+ see = p->See[p->NS2Indx[nonMasked - 1]] +
+ (nonMasked < (unsigned)SUFFIX(p->MinContext)->NumStats - p->MinContext->NumStats) +
+ 2 * (p->MinContext->SummFreq < 11 * p->MinContext->NumStats) +
+ 4 * (numMasked > nonMasked) +
+ p->HiBitsFlag;
+ {
+ unsigned r = (see->Summ >> see->Shift);
+ see->Summ = (UInt16)(see->Summ - r);
+ *escFreq = r + (r == 0);
+ }
+ }
+ else
+ {
+ see = &p->DummySee;
+ *escFreq = 1;
+ }
+ return see;
}
static void NextContext(CPpmd7 *p)
{
- CTX_PTR c = CTX(SUCCESSOR(p->FoundState));
- if (p->OrderFall == 0 && (Byte *)c > p->Text)
- p->MinContext = p->MaxContext = c;
- else
- UpdateModel(p);
+ CTX_PTR c = CTX(SUCCESSOR(p->FoundState));
+ if (p->OrderFall == 0 && (Byte *)c > p->Text)
+ p->MinContext = p->MaxContext = c;
+ else
+ UpdateModel(p);
}
void Ppmd7_Update1(CPpmd7 *p)
{
- CPpmd_State *s = p->FoundState;
- s->Freq += 4;
- p->MinContext->SummFreq += 4;
- if (s[0].Freq > s[-1].Freq)
- {
- SwapStates(&s[0], &s[-1]);
- p->FoundState = --s;
- if (s->Freq > MAX_FREQ)
- Rescale(p);
- }
- NextContext(p);
+ CPpmd_State *s = p->FoundState;
+ s->Freq += 4;
+ p->MinContext->SummFreq += 4;
+ if (s[0].Freq > s[-1].Freq)
+ {
+ SwapStates(&s[0], &s[-1]);
+ p->FoundState = --s;
+ if (s->Freq > MAX_FREQ)
+ Rescale(p);
+ }
+ NextContext(p);
}
void Ppmd7_Update1_0(CPpmd7 *p)
{
- p->PrevSuccess = (2 * p->FoundState->Freq > p->MinContext->SummFreq);
- p->RunLength += p->PrevSuccess;
- p->MinContext->SummFreq += 4;
- if ((p->FoundState->Freq += 4) > MAX_FREQ)
- Rescale(p);
- NextContext(p);
+ p->PrevSuccess = (2 * p->FoundState->Freq > p->MinContext->SummFreq);
+ p->RunLength += p->PrevSuccess;
+ p->MinContext->SummFreq += 4;
+ if ((p->FoundState->Freq += 4) > MAX_FREQ)
+ Rescale(p);
+ NextContext(p);
}
void Ppmd7_UpdateBin(CPpmd7 *p)
{
- p->FoundState->Freq = (Byte)(p->FoundState->Freq + (p->FoundState->Freq < 128 ? 1: 0));
- p->PrevSuccess = 1;
- p->RunLength++;
- NextContext(p);
+ p->FoundState->Freq = (Byte)(p->FoundState->Freq + (p->FoundState->Freq < 128 ? 1: 0));
+ p->PrevSuccess = 1;
+ p->RunLength++;
+ NextContext(p);
}
void Ppmd7_Update2(CPpmd7 *p)
{
- p->MinContext->SummFreq += 4;
- if ((p->FoundState->Freq += 4) > MAX_FREQ)
- Rescale(p);
- p->RunLength = p->InitRL;
- UpdateModel(p);
+ p->MinContext->SummFreq += 4;
+ if ((p->FoundState->Freq += 4) > MAX_FREQ)
+ Rescale(p);
+ p->RunLength = p->InitRL;
+ UpdateModel(p);
}
diff --git a/src/lib/lib7z/Ppmd7.h b/src/lib/lib7z/Ppmd7.h
index fa4225e2d35..1300118082b 100644
--- a/src/lib/lib7z/Ppmd7.h
+++ b/src/lib/lib7z/Ppmd7.h
@@ -22,41 +22,41 @@ EXTERN_C_BEGIN
struct CPpmd7_Context_;
typedef
- #ifdef PPMD_32BIT
- struct CPpmd7_Context_ *
- #else
- UInt32
- #endif
- CPpmd7_Context_Ref;
+ #ifdef PPMD_32BIT
+ struct CPpmd7_Context_ *
+ #else
+ UInt32
+ #endif
+ CPpmd7_Context_Ref;
typedef struct CPpmd7_Context_
{
- UInt16 NumStats;
- UInt16 SummFreq;
- CPpmd_State_Ref Stats;
- CPpmd7_Context_Ref Suffix;
+ UInt16 NumStats;
+ UInt16 SummFreq;
+ CPpmd_State_Ref Stats;
+ CPpmd7_Context_Ref Suffix;
} CPpmd7_Context;
#define Ppmd7Context_OneState(p) ((CPpmd_State *)&(p)->SummFreq)
typedef struct
{
- CPpmd7_Context *MinContext, *MaxContext;
- CPpmd_State *FoundState;
- unsigned OrderFall, InitEsc, PrevSuccess, MaxOrder, HiBitsFlag;
- Int32 RunLength, InitRL; /* must be 32-bit at least */
-
- UInt32 Size;
- UInt32 GlueCount;
- Byte *Base, *LoUnit, *HiUnit, *Text, *UnitsStart;
- UInt32 AlignOffset;
-
- Byte Indx2Units[PPMD_NUM_INDEXES];
- Byte Units2Indx[128];
- CPpmd_Void_Ref FreeList[PPMD_NUM_INDEXES];
- Byte NS2Indx[256], NS2BSIndx[256], HB2Flag[256];
- CPpmd_See DummySee, See[25][16];
- UInt16 BinSumm[128][64];
+ CPpmd7_Context *MinContext, *MaxContext;
+ CPpmd_State *FoundState;
+ unsigned OrderFall, InitEsc, PrevSuccess, MaxOrder, HiBitsFlag;
+ Int32 RunLength, InitRL; /* must be 32-bit at least */
+
+ UInt32 Size;
+ UInt32 GlueCount;
+ Byte *Base, *LoUnit, *HiUnit, *Text, *UnitsStart;
+ UInt32 AlignOffset;
+
+ Byte Indx2Units[PPMD_NUM_INDEXES];
+ Byte Units2Indx[128];
+ CPpmd_Void_Ref FreeList[PPMD_NUM_INDEXES];
+ Byte NS2Indx[256], NS2BSIndx[256], HB2Flag[256];
+ CPpmd_See DummySee, See[25][16];
+ UInt16 BinSumm[128][64];
} CPpmd7;
void Ppmd7_Construct(CPpmd7 *p);
@@ -71,13 +71,13 @@ void Ppmd7_Init(CPpmd7 *p, unsigned maxOrder);
extern const Byte PPMD7_kExpEscape[16];
#ifdef PPMD_32BIT
- #define Ppmd7_GetPtr(p, ptr) (ptr)
- #define Ppmd7_GetContext(p, ptr) (ptr)
- #define Ppmd7_GetStats(p, ctx) ((ctx)->Stats)
+ #define Ppmd7_GetPtr(p, ptr) (ptr)
+ #define Ppmd7_GetContext(p, ptr) (ptr)
+ #define Ppmd7_GetStats(p, ctx) ((ctx)->Stats)
#else
- #define Ppmd7_GetPtr(p, offs) ((void *)((p)->Base + (offs)))
- #define Ppmd7_GetContext(p, offs) ((CPpmd7_Context *)Ppmd7_GetPtr((p), (offs)))
- #define Ppmd7_GetStats(p, ctx) ((CPpmd_State *)Ppmd7_GetPtr((p), ((ctx)->Stats)))
+ #define Ppmd7_GetPtr(p, offs) ((void *)((p)->Base + (offs)))
+ #define Ppmd7_GetContext(p, offs) ((CPpmd7_Context *)Ppmd7_GetPtr((p), (offs)))
+ #define Ppmd7_GetStats(p, ctx) ((CPpmd_State *)Ppmd7_GetPtr((p), ((ctx)->Stats)))
#endif
void Ppmd7_Update1(CPpmd7 *p);
@@ -86,11 +86,11 @@ void Ppmd7_Update2(CPpmd7 *p);
void Ppmd7_UpdateBin(CPpmd7 *p);
#define Ppmd7_GetBinSumm(p) \
- &p->BinSumm[Ppmd7Context_OneState(p->MinContext)->Freq - 1][p->PrevSuccess + \
- p->NS2BSIndx[Ppmd7_GetContext(p, p->MinContext->Suffix)->NumStats - 1] + \
- (p->HiBitsFlag = p->HB2Flag[p->FoundState->Symbol]) + \
- 2 * p->HB2Flag[Ppmd7Context_OneState(p->MinContext)->Symbol] + \
- ((p->RunLength >> 26) & 0x20)]
+ &p->BinSumm[Ppmd7Context_OneState(p->MinContext)->Freq - 1][p->PrevSuccess + \
+ p->NS2BSIndx[Ppmd7_GetContext(p, p->MinContext->Suffix)->NumStats - 1] + \
+ (p->HiBitsFlag = p->HB2Flag[p->FoundState->Symbol]) + \
+ 2 * p->HB2Flag[Ppmd7Context_OneState(p->MinContext)->Symbol] + \
+ ((p->RunLength >> 26) & 0x20)]
CPpmd_See *Ppmd7_MakeEscFreq(CPpmd7 *p, unsigned numMasked, UInt32 *scale);
@@ -99,17 +99,17 @@ CPpmd_See *Ppmd7_MakeEscFreq(CPpmd7 *p, unsigned numMasked, UInt32 *scale);
typedef struct
{
- UInt32 (*GetThreshold)(void *p, UInt32 total);
- void (*Decode)(void *p, UInt32 start, UInt32 size);
- UInt32 (*DecodeBit)(void *p, UInt32 size0);
+ UInt32 (*GetThreshold)(void *p, UInt32 total);
+ void (*Decode)(void *p, UInt32 start, UInt32 size);
+ UInt32 (*DecodeBit)(void *p, UInt32 size0);
} IPpmd7_RangeDec;
typedef struct
{
- IPpmd7_RangeDec p;
- UInt32 Range;
- UInt32 Code;
- IByteIn *Stream;
+ IPpmd7_RangeDec p;
+ UInt32 Range;
+ UInt32 Code;
+ IByteIn *Stream;
} CPpmd7z_RangeDec;
void Ppmd7z_RangeDec_CreateVTable(CPpmd7z_RangeDec *p);
@@ -123,11 +123,11 @@ int Ppmd7_DecodeSymbol(CPpmd7 *p, IPpmd7_RangeDec *rc);
typedef struct
{
- UInt64 Low;
- UInt32 Range;
- Byte Cache;
- UInt64 CacheSize;
- IByteOut *Stream;
+ UInt64 Low;
+ UInt32 Range;
+ Byte Cache;
+ UInt64 CacheSize;
+ IByteOut *Stream;
} CPpmd7z_RangeEnc;
void Ppmd7z_RangeEnc_Init(CPpmd7z_RangeEnc *p);
diff --git a/src/lib/lib7z/Ppmd7Dec.c b/src/lib/lib7z/Ppmd7Dec.c
index dc31b4f3a82..dcd261c5316 100644
--- a/src/lib/lib7z/Ppmd7Dec.c
+++ b/src/lib/lib7z/Ppmd7Dec.c
@@ -8,69 +8,69 @@ This code is based on PPMd var.H (2001): Dmitry Shkarin : Public domain */
Bool Ppmd7z_RangeDec_Init(CPpmd7z_RangeDec *p)
{
- unsigned i;
- p->Code = 0;
- p->Range = 0xFFFFFFFF;
- if (p->Stream->Read((void *)p->Stream) != 0)
- return False;
- for (i = 0; i < 4; i++)
- p->Code = (p->Code << 8) | p->Stream->Read((void *)p->Stream);
- return (p->Code < 0xFFFFFFFF);
+ unsigned i;
+ p->Code = 0;
+ p->Range = 0xFFFFFFFF;
+ if (p->Stream->Read((void *)p->Stream) != 0)
+ return False;
+ for (i = 0; i < 4; i++)
+ p->Code = (p->Code << 8) | p->Stream->Read((void *)p->Stream);
+ return (p->Code < 0xFFFFFFFF);
}
static UInt32 Range_GetThreshold(void *pp, UInt32 total)
{
- CPpmd7z_RangeDec *p = (CPpmd7z_RangeDec *)pp;
- return (p->Code) / (p->Range /= total);
+ CPpmd7z_RangeDec *p = (CPpmd7z_RangeDec *)pp;
+ return (p->Code) / (p->Range /= total);
}
static void Range_Normalize(CPpmd7z_RangeDec *p)
{
- if (p->Range < kTopValue)
- {
- p->Code = (p->Code << 8) | p->Stream->Read((void *)p->Stream);
- p->Range <<= 8;
- if (p->Range < kTopValue)
- {
- p->Code = (p->Code << 8) | p->Stream->Read((void *)p->Stream);
- p->Range <<= 8;
- }
- }
+ if (p->Range < kTopValue)
+ {
+ p->Code = (p->Code << 8) | p->Stream->Read((void *)p->Stream);
+ p->Range <<= 8;
+ if (p->Range < kTopValue)
+ {
+ p->Code = (p->Code << 8) | p->Stream->Read((void *)p->Stream);
+ p->Range <<= 8;
+ }
+ }
}
static void Range_Decode(void *pp, UInt32 start, UInt32 size)
{
- CPpmd7z_RangeDec *p = (CPpmd7z_RangeDec *)pp;
- p->Code -= start * p->Range;
- p->Range *= size;
- Range_Normalize(p);
+ CPpmd7z_RangeDec *p = (CPpmd7z_RangeDec *)pp;
+ p->Code -= start * p->Range;
+ p->Range *= size;
+ Range_Normalize(p);
}
static UInt32 Range_DecodeBit(void *pp, UInt32 size0)
{
- CPpmd7z_RangeDec *p = (CPpmd7z_RangeDec *)pp;
- UInt32 newBound = (p->Range >> 14) * size0;
- UInt32 symbol;
- if (p->Code < newBound)
- {
- symbol = 0;
- p->Range = newBound;
- }
- else
- {
- symbol = 1;
- p->Code -= newBound;
- p->Range -= newBound;
- }
- Range_Normalize(p);
- return symbol;
+ CPpmd7z_RangeDec *p = (CPpmd7z_RangeDec *)pp;
+ UInt32 newBound = (p->Range >> 14) * size0;
+ UInt32 symbol;
+ if (p->Code < newBound)
+ {
+ symbol = 0;
+ p->Range = newBound;
+ }
+ else
+ {
+ symbol = 1;
+ p->Code -= newBound;
+ p->Range -= newBound;
+ }
+ Range_Normalize(p);
+ return symbol;
}
void Ppmd7z_RangeDec_CreateVTable(CPpmd7z_RangeDec *p)
{
- p->p.GetThreshold = Range_GetThreshold;
- p->p.Decode = Range_Decode;
- p->p.DecodeBit = Range_DecodeBit;
+ p->p.GetThreshold = Range_GetThreshold;
+ p->p.Decode = Range_Decode;
+ p->p.DecodeBit = Range_DecodeBit;
}
@@ -78,110 +78,110 @@ void Ppmd7z_RangeDec_CreateVTable(CPpmd7z_RangeDec *p)
int Ppmd7_DecodeSymbol(CPpmd7 *p, IPpmd7_RangeDec *rc)
{
- size_t charMask[256 / sizeof(size_t)];
- if (p->MinContext->NumStats != 1)
- {
- CPpmd_State *s = Ppmd7_GetStats(p, p->MinContext);
- unsigned i;
- UInt32 count, hiCnt;
- if ((count = rc->GetThreshold(rc, p->MinContext->SummFreq)) < (hiCnt = s->Freq))
- {
- Byte symbol;
- rc->Decode(rc, 0, s->Freq);
- p->FoundState = s;
- symbol = s->Symbol;
- Ppmd7_Update1_0(p);
- return symbol;
- }
- p->PrevSuccess = 0;
- i = p->MinContext->NumStats - 1;
- do
- {
- if ((hiCnt += (++s)->Freq) > count)
- {
- Byte symbol;
- rc->Decode(rc, hiCnt - s->Freq, s->Freq);
- p->FoundState = s;
- symbol = s->Symbol;
- Ppmd7_Update1(p);
- return symbol;
- }
- }
- while (--i);
- if (count >= p->MinContext->SummFreq)
- return -2;
- p->HiBitsFlag = p->HB2Flag[p->FoundState->Symbol];
- rc->Decode(rc, hiCnt, p->MinContext->SummFreq - hiCnt);
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(s->Symbol) = 0;
- i = p->MinContext->NumStats - 1;
- do { MASK((--s)->Symbol) = 0; } while (--i);
- }
- else
- {
- UInt16 *prob = Ppmd7_GetBinSumm(p);
- if (rc->DecodeBit(rc, *prob) == 0)
- {
- Byte symbol;
- *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
- symbol = (p->FoundState = Ppmd7Context_OneState(p->MinContext))->Symbol;
- Ppmd7_UpdateBin(p);
- return symbol;
- }
- *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
- p->InitEsc = PPMD7_kExpEscape[*prob >> 10];
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(Ppmd7Context_OneState(p->MinContext)->Symbol) = 0;
- p->PrevSuccess = 0;
- }
- for (;;)
- {
- CPpmd_State *ps[256], *s;
- UInt32 freqSum, count, hiCnt;
- CPpmd_See *see;
- unsigned i, num, numMasked = p->MinContext->NumStats;
- do
- {
- p->OrderFall++;
- if (!p->MinContext->Suffix)
- return -1;
- p->MinContext = Ppmd7_GetContext(p, p->MinContext->Suffix);
- }
- while (p->MinContext->NumStats == numMasked);
- hiCnt = 0;
- s = Ppmd7_GetStats(p, p->MinContext);
- i = 0;
- num = p->MinContext->NumStats - numMasked;
- do
- {
- int k = (int)(MASK(s->Symbol));
- hiCnt += (s->Freq & k);
- ps[i] = s++;
- i -= k;
- }
- while (i != num);
+ size_t charMask[256 / sizeof(size_t)];
+ if (p->MinContext->NumStats != 1)
+ {
+ CPpmd_State *s = Ppmd7_GetStats(p, p->MinContext);
+ unsigned i;
+ UInt32 count, hiCnt;
+ if ((count = rc->GetThreshold(rc, p->MinContext->SummFreq)) < (hiCnt = s->Freq))
+ {
+ Byte symbol;
+ rc->Decode(rc, 0, s->Freq);
+ p->FoundState = s;
+ symbol = s->Symbol;
+ Ppmd7_Update1_0(p);
+ return symbol;
+ }
+ p->PrevSuccess = 0;
+ i = p->MinContext->NumStats - 1;
+ do
+ {
+ if ((hiCnt += (++s)->Freq) > count)
+ {
+ Byte symbol;
+ rc->Decode(rc, hiCnt - s->Freq, s->Freq);
+ p->FoundState = s;
+ symbol = s->Symbol;
+ Ppmd7_Update1(p);
+ return symbol;
+ }
+ }
+ while (--i);
+ if (count >= p->MinContext->SummFreq)
+ return -2;
+ p->HiBitsFlag = p->HB2Flag[p->FoundState->Symbol];
+ rc->Decode(rc, hiCnt, p->MinContext->SummFreq - hiCnt);
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(s->Symbol) = 0;
+ i = p->MinContext->NumStats - 1;
+ do { MASK((--s)->Symbol) = 0; } while (--i);
+ }
+ else
+ {
+ UInt16 *prob = Ppmd7_GetBinSumm(p);
+ if (rc->DecodeBit(rc, *prob) == 0)
+ {
+ Byte symbol;
+ *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
+ symbol = (p->FoundState = Ppmd7Context_OneState(p->MinContext))->Symbol;
+ Ppmd7_UpdateBin(p);
+ return symbol;
+ }
+ *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
+ p->InitEsc = PPMD7_kExpEscape[*prob >> 10];
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(Ppmd7Context_OneState(p->MinContext)->Symbol) = 0;
+ p->PrevSuccess = 0;
+ }
+ for (;;)
+ {
+ CPpmd_State *ps[256], *s;
+ UInt32 freqSum, count, hiCnt;
+ CPpmd_See *see;
+ unsigned i, num, numMasked = p->MinContext->NumStats;
+ do
+ {
+ p->OrderFall++;
+ if (!p->MinContext->Suffix)
+ return -1;
+ p->MinContext = Ppmd7_GetContext(p, p->MinContext->Suffix);
+ }
+ while (p->MinContext->NumStats == numMasked);
+ hiCnt = 0;
+ s = Ppmd7_GetStats(p, p->MinContext);
+ i = 0;
+ num = p->MinContext->NumStats - numMasked;
+ do
+ {
+ int k = (int)(MASK(s->Symbol));
+ hiCnt += (s->Freq & k);
+ ps[i] = s++;
+ i -= k;
+ }
+ while (i != num);
- see = Ppmd7_MakeEscFreq(p, numMasked, &freqSum);
- freqSum += hiCnt;
- count = rc->GetThreshold(rc, freqSum);
+ see = Ppmd7_MakeEscFreq(p, numMasked, &freqSum);
+ freqSum += hiCnt;
+ count = rc->GetThreshold(rc, freqSum);
- if (count < hiCnt)
- {
- Byte symbol;
- CPpmd_State **pps = ps;
- for (hiCnt = 0; (hiCnt += (*pps)->Freq) <= count; pps++);
- s = *pps;
- rc->Decode(rc, hiCnt - s->Freq, s->Freq);
- Ppmd_See_Update(see);
- p->FoundState = s;
- symbol = s->Symbol;
- Ppmd7_Update2(p);
- return symbol;
- }
- if (count >= freqSum)
- return -2;
- rc->Decode(rc, hiCnt, freqSum - hiCnt);
- see->Summ = (UInt16)(see->Summ + freqSum);
- do { MASK(ps[--i]->Symbol) = 0; } while (i != 0);
- }
+ if (count < hiCnt)
+ {
+ Byte symbol;
+ CPpmd_State **pps = ps;
+ for (hiCnt = 0; (hiCnt += (*pps)->Freq) <= count; pps++);
+ s = *pps;
+ rc->Decode(rc, hiCnt - s->Freq, s->Freq);
+ Ppmd_See_Update(see);
+ p->FoundState = s;
+ symbol = s->Symbol;
+ Ppmd7_Update2(p);
+ return symbol;
+ }
+ if (count >= freqSum)
+ return -2;
+ rc->Decode(rc, hiCnt, freqSum - hiCnt);
+ see->Summ = (UInt16)(see->Summ + freqSum);
+ do { MASK(ps[--i]->Symbol) = 0; } while (i != 0);
+ }
}
diff --git a/src/lib/lib7z/Ppmd7Enc.c b/src/lib/lib7z/Ppmd7Enc.c
index 51a36b0178d..3ec9ee51c26 100644
--- a/src/lib/lib7z/Ppmd7Enc.c
+++ b/src/lib/lib7z/Ppmd7Enc.c
@@ -8,67 +8,67 @@ This code is based on PPMd var.H (2001): Dmitry Shkarin : Public domain */
void Ppmd7z_RangeEnc_Init(CPpmd7z_RangeEnc *p)
{
- p->Low = 0;
- p->Range = 0xFFFFFFFF;
- p->Cache = 0;
- p->CacheSize = 1;
+ p->Low = 0;
+ p->Range = 0xFFFFFFFF;
+ p->Cache = 0;
+ p->CacheSize = 1;
}
static void RangeEnc_ShiftLow(CPpmd7z_RangeEnc *p)
{
- if ((UInt32)p->Low < (UInt32)0xFF000000 || (unsigned)(p->Low >> 32) != 0)
- {
- Byte temp = p->Cache;
- do
- {
- p->Stream->Write(p->Stream, (Byte)(temp + (Byte)(p->Low >> 32)));
- temp = 0xFF;
- }
- while(--p->CacheSize != 0);
- p->Cache = (Byte)((UInt32)p->Low >> 24);
- }
- p->CacheSize++;
- p->Low = (UInt32)p->Low << 8;
+ if ((UInt32)p->Low < (UInt32)0xFF000000 || (unsigned)(p->Low >> 32) != 0)
+ {
+ Byte temp = p->Cache;
+ do
+ {
+ p->Stream->Write(p->Stream, (Byte)(temp + (Byte)(p->Low >> 32)));
+ temp = 0xFF;
+ }
+ while(--p->CacheSize != 0);
+ p->Cache = (Byte)((UInt32)p->Low >> 24);
+ }
+ p->CacheSize++;
+ p->Low = (UInt32)p->Low << 8;
}
static void RangeEnc_Encode(CPpmd7z_RangeEnc *p, UInt32 start, UInt32 size, UInt32 total)
{
- p->Low += start * (p->Range /= total);
- p->Range *= size;
- while (p->Range < kTopValue)
- {
- p->Range <<= 8;
- RangeEnc_ShiftLow(p);
- }
+ p->Low += start * (p->Range /= total);
+ p->Range *= size;
+ while (p->Range < kTopValue)
+ {
+ p->Range <<= 8;
+ RangeEnc_ShiftLow(p);
+ }
}
static void RangeEnc_EncodeBit_0(CPpmd7z_RangeEnc *p, UInt32 size0)
{
- p->Range = (p->Range >> 14) * size0;
- while (p->Range < kTopValue)
- {
- p->Range <<= 8;
- RangeEnc_ShiftLow(p);
- }
+ p->Range = (p->Range >> 14) * size0;
+ while (p->Range < kTopValue)
+ {
+ p->Range <<= 8;
+ RangeEnc_ShiftLow(p);
+ }
}
static void RangeEnc_EncodeBit_1(CPpmd7z_RangeEnc *p, UInt32 size0)
{
- UInt32 newBound = (p->Range >> 14) * size0;
- p->Low += newBound;
- p->Range -= newBound;
- while (p->Range < kTopValue)
- {
- p->Range <<= 8;
- RangeEnc_ShiftLow(p);
- }
+ UInt32 newBound = (p->Range >> 14) * size0;
+ p->Low += newBound;
+ p->Range -= newBound;
+ while (p->Range < kTopValue)
+ {
+ p->Range <<= 8;
+ RangeEnc_ShiftLow(p);
+ }
}
void Ppmd7z_RangeEnc_FlushData(CPpmd7z_RangeEnc *p)
{
- unsigned i;
- for (i = 0; i < 5; i++)
- RangeEnc_ShiftLow(p);
+ unsigned i;
+ for (i = 0; i < 5; i++)
+ RangeEnc_ShiftLow(p);
}
@@ -76,110 +76,110 @@ void Ppmd7z_RangeEnc_FlushData(CPpmd7z_RangeEnc *p)
void Ppmd7_EncodeSymbol(CPpmd7 *p, CPpmd7z_RangeEnc *rc, int symbol)
{
- size_t charMask[256 / sizeof(size_t)];
- if (p->MinContext->NumStats != 1)
- {
- CPpmd_State *s = Ppmd7_GetStats(p, p->MinContext);
- UInt32 sum;
- unsigned i;
- if (s->Symbol == symbol)
- {
- RangeEnc_Encode(rc, 0, s->Freq, p->MinContext->SummFreq);
- p->FoundState = s;
- Ppmd7_Update1_0(p);
- return;
- }
- p->PrevSuccess = 0;
- sum = s->Freq;
- i = p->MinContext->NumStats - 1;
- do
- {
- if ((++s)->Symbol == symbol)
- {
- RangeEnc_Encode(rc, sum, s->Freq, p->MinContext->SummFreq);
- p->FoundState = s;
- Ppmd7_Update1(p);
- return;
- }
- sum += s->Freq;
- }
- while (--i);
+ size_t charMask[256 / sizeof(size_t)];
+ if (p->MinContext->NumStats != 1)
+ {
+ CPpmd_State *s = Ppmd7_GetStats(p, p->MinContext);
+ UInt32 sum;
+ unsigned i;
+ if (s->Symbol == symbol)
+ {
+ RangeEnc_Encode(rc, 0, s->Freq, p->MinContext->SummFreq);
+ p->FoundState = s;
+ Ppmd7_Update1_0(p);
+ return;
+ }
+ p->PrevSuccess = 0;
+ sum = s->Freq;
+ i = p->MinContext->NumStats - 1;
+ do
+ {
+ if ((++s)->Symbol == symbol)
+ {
+ RangeEnc_Encode(rc, sum, s->Freq, p->MinContext->SummFreq);
+ p->FoundState = s;
+ Ppmd7_Update1(p);
+ return;
+ }
+ sum += s->Freq;
+ }
+ while (--i);
- p->HiBitsFlag = p->HB2Flag[p->FoundState->Symbol];
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(s->Symbol) = 0;
- i = p->MinContext->NumStats - 1;
- do { MASK((--s)->Symbol) = 0; } while (--i);
- RangeEnc_Encode(rc, sum, p->MinContext->SummFreq - sum, p->MinContext->SummFreq);
- }
- else
- {
- UInt16 *prob = Ppmd7_GetBinSumm(p);
- CPpmd_State *s = Ppmd7Context_OneState(p->MinContext);
- if (s->Symbol == symbol)
- {
- RangeEnc_EncodeBit_0(rc, *prob);
- *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
- p->FoundState = s;
- Ppmd7_UpdateBin(p);
- return;
- }
- else
- {
- RangeEnc_EncodeBit_1(rc, *prob);
- *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
- p->InitEsc = PPMD7_kExpEscape[*prob >> 10];
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(s->Symbol) = 0;
- p->PrevSuccess = 0;
- }
- }
- for (;;)
- {
- UInt32 escFreq;
- CPpmd_See *see;
- CPpmd_State *s;
- UInt32 sum;
- unsigned i, numMasked = p->MinContext->NumStats;
- do
- {
- p->OrderFall++;
- if (!p->MinContext->Suffix)
- return; /* EndMarker (symbol = -1) */
- p->MinContext = Ppmd7_GetContext(p, p->MinContext->Suffix);
- }
- while (p->MinContext->NumStats == numMasked);
+ p->HiBitsFlag = p->HB2Flag[p->FoundState->Symbol];
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(s->Symbol) = 0;
+ i = p->MinContext->NumStats - 1;
+ do { MASK((--s)->Symbol) = 0; } while (--i);
+ RangeEnc_Encode(rc, sum, p->MinContext->SummFreq - sum, p->MinContext->SummFreq);
+ }
+ else
+ {
+ UInt16 *prob = Ppmd7_GetBinSumm(p);
+ CPpmd_State *s = Ppmd7Context_OneState(p->MinContext);
+ if (s->Symbol == symbol)
+ {
+ RangeEnc_EncodeBit_0(rc, *prob);
+ *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
+ p->FoundState = s;
+ Ppmd7_UpdateBin(p);
+ return;
+ }
+ else
+ {
+ RangeEnc_EncodeBit_1(rc, *prob);
+ *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
+ p->InitEsc = PPMD7_kExpEscape[*prob >> 10];
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(s->Symbol) = 0;
+ p->PrevSuccess = 0;
+ }
+ }
+ for (;;)
+ {
+ UInt32 escFreq;
+ CPpmd_See *see;
+ CPpmd_State *s;
+ UInt32 sum;
+ unsigned i, numMasked = p->MinContext->NumStats;
+ do
+ {
+ p->OrderFall++;
+ if (!p->MinContext->Suffix)
+ return; /* EndMarker (symbol = -1) */
+ p->MinContext = Ppmd7_GetContext(p, p->MinContext->Suffix);
+ }
+ while (p->MinContext->NumStats == numMasked);
- see = Ppmd7_MakeEscFreq(p, numMasked, &escFreq);
- s = Ppmd7_GetStats(p, p->MinContext);
- sum = 0;
- i = p->MinContext->NumStats;
- do
- {
- int cur = s->Symbol;
- if (cur == symbol)
- {
- UInt32 low = sum;
- CPpmd_State *s1 = s;
- do
- {
- sum += (s->Freq & (int)(MASK(s->Symbol)));
- s++;
- }
- while (--i);
- RangeEnc_Encode(rc, low, s1->Freq, sum + escFreq);
- Ppmd_See_Update(see);
- p->FoundState = s1;
- Ppmd7_Update2(p);
- return;
- }
- sum += (s->Freq & (int)(MASK(cur)));
- MASK(cur) = 0;
- s++;
- }
- while (--i);
+ see = Ppmd7_MakeEscFreq(p, numMasked, &escFreq);
+ s = Ppmd7_GetStats(p, p->MinContext);
+ sum = 0;
+ i = p->MinContext->NumStats;
+ do
+ {
+ int cur = s->Symbol;
+ if (cur == symbol)
+ {
+ UInt32 low = sum;
+ CPpmd_State *s1 = s;
+ do
+ {
+ sum += (s->Freq & (int)(MASK(s->Symbol)));
+ s++;
+ }
+ while (--i);
+ RangeEnc_Encode(rc, low, s1->Freq, sum + escFreq);
+ Ppmd_See_Update(see);
+ p->FoundState = s1;
+ Ppmd7_Update2(p);
+ return;
+ }
+ sum += (s->Freq & (int)(MASK(cur)));
+ MASK(cur) = 0;
+ s++;
+ }
+ while (--i);
- RangeEnc_Encode(rc, sum, escFreq, sum + escFreq);
- see->Summ = (UInt16)(see->Summ + sum + escFreq);
- }
+ RangeEnc_Encode(rc, sum, escFreq, sum + escFreq);
+ see->Summ = (UInt16)(see->Summ + sum + escFreq);
+ }
}
diff --git a/src/lib/lib7z/Ppmd8.c b/src/lib/lib7z/Ppmd8.c
index 8bec6f560f1..91e419d5938 100644
--- a/src/lib/lib7z/Ppmd8.c
+++ b/src/lib/lib7z/Ppmd8.c
@@ -17,9 +17,9 @@ static const UInt16 kInitBinEsc[] = { 0x3CDD, 0x1F3F, 0x59BF, 0x48F3, 0x64A1, 0x
#define I2U(indx) (p->Indx2Units[indx])
#ifdef PPMD_32BIT
- #define REF(ptr) (ptr)
+ #define REF(ptr) (ptr)
#else
- #define REF(ptr) ((UInt32)((Byte *)(ptr) - (p)->Base))
+ #define REF(ptr) ((UInt32)((Byte *)(ptr) - (p)->Base))
#endif
#define STATS_REF(ptr) ((CPpmd_State_Ref)REF(ptr))
@@ -34,1079 +34,1079 @@ typedef CPpmd8_Context * CTX_PTR;
struct CPpmd8_Node_;
typedef
- #ifdef PPMD_32BIT
- struct CPpmd8_Node_ *
- #else
- UInt32
- #endif
- CPpmd8_Node_Ref;
+ #ifdef PPMD_32BIT
+ struct CPpmd8_Node_ *
+ #else
+ UInt32
+ #endif
+ CPpmd8_Node_Ref;
typedef struct CPpmd8_Node_
{
- UInt32 Stamp;
- CPpmd8_Node_Ref Next;
- UInt32 NU;
+ UInt32 Stamp;
+ CPpmd8_Node_Ref Next;
+ UInt32 NU;
} CPpmd8_Node;
#ifdef PPMD_32BIT
- #define NODE(ptr) (ptr)
+ #define NODE(ptr) (ptr)
#else
- #define NODE(offs) ((CPpmd8_Node *)(p->Base + (offs)))
+ #define NODE(offs) ((CPpmd8_Node *)(p->Base + (offs)))
#endif
#define EMPTY_NODE 0xFFFFFFFF
void Ppmd8_Construct(CPpmd8 *p)
{
- unsigned i, k, m;
-
- p->Base = 0;
-
- for (i = 0, k = 0; i < PPMD_NUM_INDEXES; i++)
- {
- unsigned step = (i >= 12 ? 4 : (i >> 2) + 1);
- do { p->Units2Indx[k++] = (Byte)i; } while(--step);
- p->Indx2Units[i] = (Byte)k;
- }
-
- p->NS2BSIndx[0] = (0 << 1);
- p->NS2BSIndx[1] = (1 << 1);
- memset(p->NS2BSIndx + 2, (2 << 1), 9);
- memset(p->NS2BSIndx + 11, (3 << 1), 256 - 11);
-
- for (i = 0; i < 5; i++)
- p->NS2Indx[i] = (Byte)i;
- for (m = i, k = 1; i < 260; i++)
- {
- p->NS2Indx[i] = (Byte)m;
- if (--k == 0)
- k = (++m) - 4;
- }
+ unsigned i, k, m;
+
+ p->Base = 0;
+
+ for (i = 0, k = 0; i < PPMD_NUM_INDEXES; i++)
+ {
+ unsigned step = (i >= 12 ? 4 : (i >> 2) + 1);
+ do { p->Units2Indx[k++] = (Byte)i; } while(--step);
+ p->Indx2Units[i] = (Byte)k;
+ }
+
+ p->NS2BSIndx[0] = (0 << 1);
+ p->NS2BSIndx[1] = (1 << 1);
+ memset(p->NS2BSIndx + 2, (2 << 1), 9);
+ memset(p->NS2BSIndx + 11, (3 << 1), 256 - 11);
+
+ for (i = 0; i < 5; i++)
+ p->NS2Indx[i] = (Byte)i;
+ for (m = i, k = 1; i < 260; i++)
+ {
+ p->NS2Indx[i] = (Byte)m;
+ if (--k == 0)
+ k = (++m) - 4;
+ }
}
void Ppmd8_Free(CPpmd8 *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->Base);
- p->Size = 0;
- p->Base = 0;
+ alloc->Free(alloc, p->Base);
+ p->Size = 0;
+ p->Base = 0;
}
Bool Ppmd8_Alloc(CPpmd8 *p, UInt32 size, ISzAlloc *alloc)
{
- if (p->Base == 0 || p->Size != size)
- {
- Ppmd8_Free(p, alloc);
- p->AlignOffset =
- #ifdef PPMD_32BIT
- (4 - size) & 3;
- #else
- 4 - (size & 3);
- #endif
- if ((p->Base = (Byte *)alloc->Alloc(alloc, p->AlignOffset + size)) == 0)
- return False;
- p->Size = size;
- }
- return True;
+ if (p->Base == 0 || p->Size != size)
+ {
+ Ppmd8_Free(p, alloc);
+ p->AlignOffset =
+ #ifdef PPMD_32BIT
+ (4 - size) & 3;
+ #else
+ 4 - (size & 3);
+ #endif
+ if ((p->Base = (Byte *)alloc->Alloc(alloc, p->AlignOffset + size)) == 0)
+ return False;
+ p->Size = size;
+ }
+ return True;
}
static void InsertNode(CPpmd8 *p, void *node, unsigned indx)
{
- ((CPpmd8_Node *)node)->Stamp = EMPTY_NODE;
- ((CPpmd8_Node *)node)->Next = (CPpmd8_Node_Ref)p->FreeList[indx];
- ((CPpmd8_Node *)node)->NU = I2U(indx);
- p->FreeList[indx] = REF(node);
- p->Stamps[indx]++;
+ ((CPpmd8_Node *)node)->Stamp = EMPTY_NODE;
+ ((CPpmd8_Node *)node)->Next = (CPpmd8_Node_Ref)p->FreeList[indx];
+ ((CPpmd8_Node *)node)->NU = I2U(indx);
+ p->FreeList[indx] = REF(node);
+ p->Stamps[indx]++;
}
static void *RemoveNode(CPpmd8 *p, unsigned indx)
{
- CPpmd8_Node *node = NODE((CPpmd8_Node_Ref)p->FreeList[indx]);
- p->FreeList[indx] = node->Next;
- p->Stamps[indx]--;
- return node;
+ CPpmd8_Node *node = NODE((CPpmd8_Node_Ref)p->FreeList[indx]);
+ p->FreeList[indx] = node->Next;
+ p->Stamps[indx]--;
+ return node;
}
static void SplitBlock(CPpmd8 *p, void *ptr, unsigned oldIndx, unsigned newIndx)
{
- unsigned i, nu = I2U(oldIndx) - I2U(newIndx);
- ptr = (Byte *)ptr + U2B(I2U(newIndx));
- if (I2U(i = U2I(nu)) != nu)
- {
- unsigned k = I2U(--i);
- InsertNode(p, ((Byte *)ptr) + U2B(k), nu - k - 1);
- }
- InsertNode(p, ptr, i);
+ unsigned i, nu = I2U(oldIndx) - I2U(newIndx);
+ ptr = (Byte *)ptr + U2B(I2U(newIndx));
+ if (I2U(i = U2I(nu)) != nu)
+ {
+ unsigned k = I2U(--i);
+ InsertNode(p, ((Byte *)ptr) + U2B(k), nu - k - 1);
+ }
+ InsertNode(p, ptr, i);
}
static void GlueFreeBlocks(CPpmd8 *p)
{
- CPpmd8_Node_Ref head = 0;
- CPpmd8_Node_Ref *prev = &head;
- unsigned i;
-
- p->GlueCount = 1 << 13;
- memset(p->Stamps, 0, sizeof(p->Stamps));
-
- /* Order-0 context is always at top UNIT, so we don't need guard NODE at the end.
- All blocks up to p->LoUnit can be free, so we need guard NODE at LoUnit. */
- if (p->LoUnit != p->HiUnit)
- ((CPpmd8_Node *)p->LoUnit)->Stamp = 0;
-
- /* Glue free blocks */
- for (i = 0; i < PPMD_NUM_INDEXES; i++)
- {
- CPpmd8_Node_Ref next = (CPpmd8_Node_Ref)p->FreeList[i];
- p->FreeList[i] = 0;
- while (next != 0)
- {
- CPpmd8_Node *node = NODE(next);
- if (node->NU != 0)
- {
- CPpmd8_Node *node2;
- *prev = next;
- prev = &(node->Next);
- while ((node2 = node + node->NU)->Stamp == EMPTY_NODE)
- {
- node->NU += node2->NU;
- node2->NU = 0;
- }
- }
- next = node->Next;
- }
- }
- *prev = 0;
-
- /* Fill lists of free blocks */
- while (head != 0)
- {
- CPpmd8_Node *node = NODE(head);
- unsigned nu;
- head = node->Next;
- nu = node->NU;
- if (nu == 0)
- continue;
- for (; nu > 128; nu -= 128, node += 128)
- InsertNode(p, node, PPMD_NUM_INDEXES - 1);
- if (I2U(i = U2I(nu)) != nu)
- {
- unsigned k = I2U(--i);
- InsertNode(p, node + k, nu - k - 1);
- }
- InsertNode(p, node, i);
- }
+ CPpmd8_Node_Ref head = 0;
+ CPpmd8_Node_Ref *prev = &head;
+ unsigned i;
+
+ p->GlueCount = 1 << 13;
+ memset(p->Stamps, 0, sizeof(p->Stamps));
+
+ /* Order-0 context is always at top UNIT, so we don't need guard NODE at the end.
+ All blocks up to p->LoUnit can be free, so we need guard NODE at LoUnit. */
+ if (p->LoUnit != p->HiUnit)
+ ((CPpmd8_Node *)p->LoUnit)->Stamp = 0;
+
+ /* Glue free blocks */
+ for (i = 0; i < PPMD_NUM_INDEXES; i++)
+ {
+ CPpmd8_Node_Ref next = (CPpmd8_Node_Ref)p->FreeList[i];
+ p->FreeList[i] = 0;
+ while (next != 0)
+ {
+ CPpmd8_Node *node = NODE(next);
+ if (node->NU != 0)
+ {
+ CPpmd8_Node *node2;
+ *prev = next;
+ prev = &(node->Next);
+ while ((node2 = node + node->NU)->Stamp == EMPTY_NODE)
+ {
+ node->NU += node2->NU;
+ node2->NU = 0;
+ }
+ }
+ next = node->Next;
+ }
+ }
+ *prev = 0;
+
+ /* Fill lists of free blocks */
+ while (head != 0)
+ {
+ CPpmd8_Node *node = NODE(head);
+ unsigned nu;
+ head = node->Next;
+ nu = node->NU;
+ if (nu == 0)
+ continue;
+ for (; nu > 128; nu -= 128, node += 128)
+ InsertNode(p, node, PPMD_NUM_INDEXES - 1);
+ if (I2U(i = U2I(nu)) != nu)
+ {
+ unsigned k = I2U(--i);
+ InsertNode(p, node + k, nu - k - 1);
+ }
+ InsertNode(p, node, i);
+ }
}
static void *AllocUnitsRare(CPpmd8 *p, unsigned indx)
{
- unsigned i;
- void *retVal;
- if (p->GlueCount == 0)
- {
- GlueFreeBlocks(p);
- if (p->FreeList[indx] != 0)
- return RemoveNode(p, indx);
- }
- i = indx;
- do
- {
- if (++i == PPMD_NUM_INDEXES)
- {
- UInt32 numBytes = U2B(I2U(indx));
- p->GlueCount--;
- return ((UInt32)(p->UnitsStart - p->Text) > numBytes) ? (p->UnitsStart -= numBytes) : (NULL);
- }
- }
- while (p->FreeList[i] == 0);
- retVal = RemoveNode(p, i);
- SplitBlock(p, retVal, i, indx);
- return retVal;
+ unsigned i;
+ void *retVal;
+ if (p->GlueCount == 0)
+ {
+ GlueFreeBlocks(p);
+ if (p->FreeList[indx] != 0)
+ return RemoveNode(p, indx);
+ }
+ i = indx;
+ do
+ {
+ if (++i == PPMD_NUM_INDEXES)
+ {
+ UInt32 numBytes = U2B(I2U(indx));
+ p->GlueCount--;
+ return ((UInt32)(p->UnitsStart - p->Text) > numBytes) ? (p->UnitsStart -= numBytes) : (NULL);
+ }
+ }
+ while (p->FreeList[i] == 0);
+ retVal = RemoveNode(p, i);
+ SplitBlock(p, retVal, i, indx);
+ return retVal;
}
static void *AllocUnits(CPpmd8 *p, unsigned indx)
{
- UInt32 numBytes;
- if (p->FreeList[indx] != 0)
- return RemoveNode(p, indx);
- numBytes = U2B(I2U(indx));
- if (numBytes <= (UInt32)(p->HiUnit - p->LoUnit))
- {
- void *retVal = p->LoUnit;
- p->LoUnit += numBytes;
- return retVal;
- }
- return AllocUnitsRare(p, indx);
+ UInt32 numBytes;
+ if (p->FreeList[indx] != 0)
+ return RemoveNode(p, indx);
+ numBytes = U2B(I2U(indx));
+ if (numBytes <= (UInt32)(p->HiUnit - p->LoUnit))
+ {
+ void *retVal = p->LoUnit;
+ p->LoUnit += numBytes;
+ return retVal;
+ }
+ return AllocUnitsRare(p, indx);
}
#define MyMem12Cpy(dest, src, num) \
- { UInt32 *d = (UInt32 *)dest; const UInt32 *s = (const UInt32 *)src; UInt32 n = num; \
- do { d[0] = s[0]; d[1] = s[1]; d[2] = s[2]; s += 3; d += 3; } while(--n); }
+ { UInt32 *d = (UInt32 *)dest; const UInt32 *s = (const UInt32 *)src; UInt32 n = num; \
+ do { d[0] = s[0]; d[1] = s[1]; d[2] = s[2]; s += 3; d += 3; } while(--n); }
static void *ShrinkUnits(CPpmd8 *p, void *oldPtr, unsigned oldNU, unsigned newNU)
{
- unsigned i0 = U2I(oldNU);
- unsigned i1 = U2I(newNU);
- if (i0 == i1)
- return oldPtr;
- if (p->FreeList[i1] != 0)
- {
- void *ptr = RemoveNode(p, i1);
- MyMem12Cpy(ptr, oldPtr, newNU);
- InsertNode(p, oldPtr, i0);
- return ptr;
- }
- SplitBlock(p, oldPtr, i0, i1);
- return oldPtr;
+ unsigned i0 = U2I(oldNU);
+ unsigned i1 = U2I(newNU);
+ if (i0 == i1)
+ return oldPtr;
+ if (p->FreeList[i1] != 0)
+ {
+ void *ptr = RemoveNode(p, i1);
+ MyMem12Cpy(ptr, oldPtr, newNU);
+ InsertNode(p, oldPtr, i0);
+ return ptr;
+ }
+ SplitBlock(p, oldPtr, i0, i1);
+ return oldPtr;
}
static void FreeUnits(CPpmd8 *p, void *ptr, unsigned nu)
{
- InsertNode(p, ptr, U2I(nu));
+ InsertNode(p, ptr, U2I(nu));
}
static void SpecialFreeUnit(CPpmd8 *p, void *ptr)
{
- if ((Byte *)ptr != p->UnitsStart)
- InsertNode(p, ptr, 0);
- else
- {
- #ifdef PPMD8_FREEZE_SUPPORT
- *(UInt32 *)ptr = EMPTY_NODE; /* it's used for (Flags == 0xFF) check in RemoveBinContexts */
- #endif
- p->UnitsStart += UNIT_SIZE;
- }
+ if ((Byte *)ptr != p->UnitsStart)
+ InsertNode(p, ptr, 0);
+ else
+ {
+ #ifdef PPMD8_FREEZE_SUPPORT
+ *(UInt32 *)ptr = EMPTY_NODE; /* it's used for (Flags == 0xFF) check in RemoveBinContexts */
+ #endif
+ p->UnitsStart += UNIT_SIZE;
+ }
}
static void *MoveUnitsUp(CPpmd8 *p, void *oldPtr, unsigned nu)
{
- unsigned indx = U2I(nu);
- void *ptr;
- if ((Byte *)oldPtr > p->UnitsStart + 16 * 1024 || REF(oldPtr) > p->FreeList[indx])
- return oldPtr;
- ptr = RemoveNode(p, indx);
- MyMem12Cpy(ptr, oldPtr, nu);
- if ((Byte*)oldPtr != p->UnitsStart)
- InsertNode(p, oldPtr, indx);
- else
- p->UnitsStart += U2B(I2U(indx));
- return ptr;
+ unsigned indx = U2I(nu);
+ void *ptr;
+ if ((Byte *)oldPtr > p->UnitsStart + 16 * 1024 || REF(oldPtr) > p->FreeList[indx])
+ return oldPtr;
+ ptr = RemoveNode(p, indx);
+ MyMem12Cpy(ptr, oldPtr, nu);
+ if ((Byte*)oldPtr != p->UnitsStart)
+ InsertNode(p, oldPtr, indx);
+ else
+ p->UnitsStart += U2B(I2U(indx));
+ return ptr;
}
static void ExpandTextArea(CPpmd8 *p)
{
- UInt32 count[PPMD_NUM_INDEXES];
- unsigned i;
- memset(count, 0, sizeof(count));
- if (p->LoUnit != p->HiUnit)
- ((CPpmd8_Node *)p->LoUnit)->Stamp = 0;
-
- {
- CPpmd8_Node *node = (CPpmd8_Node *)p->UnitsStart;
- for (; node->Stamp == EMPTY_NODE; node += node->NU)
- {
- node->Stamp = 0;
- count[U2I(node->NU)]++;
- }
- p->UnitsStart = (Byte *)node;
- }
-
- for (i = 0; i < PPMD_NUM_INDEXES; i++)
- {
- CPpmd8_Node_Ref *next = (CPpmd8_Node_Ref *)&p->FreeList[i];
- while (count[i] != 0)
- {
- CPpmd8_Node *node = NODE(*next);
- while (node->Stamp == 0)
- {
- *next = node->Next;
- node = NODE(*next);
- p->Stamps[i]--;
- if (--count[i] == 0)
- break;
- }
- next = &node->Next;
- }
- }
+ UInt32 count[PPMD_NUM_INDEXES];
+ unsigned i;
+ memset(count, 0, sizeof(count));
+ if (p->LoUnit != p->HiUnit)
+ ((CPpmd8_Node *)p->LoUnit)->Stamp = 0;
+
+ {
+ CPpmd8_Node *node = (CPpmd8_Node *)p->UnitsStart;
+ for (; node->Stamp == EMPTY_NODE; node += node->NU)
+ {
+ node->Stamp = 0;
+ count[U2I(node->NU)]++;
+ }
+ p->UnitsStart = (Byte *)node;
+ }
+
+ for (i = 0; i < PPMD_NUM_INDEXES; i++)
+ {
+ CPpmd8_Node_Ref *next = (CPpmd8_Node_Ref *)&p->FreeList[i];
+ while (count[i] != 0)
+ {
+ CPpmd8_Node *node = NODE(*next);
+ while (node->Stamp == 0)
+ {
+ *next = node->Next;
+ node = NODE(*next);
+ p->Stamps[i]--;
+ if (--count[i] == 0)
+ break;
+ }
+ next = &node->Next;
+ }
+ }
}
#define SUCCESSOR(p) ((CPpmd_Void_Ref)((p)->SuccessorLow | ((UInt32)(p)->SuccessorHigh << 16)))
static void SetSuccessor(CPpmd_State *p, CPpmd_Void_Ref v)
{
- (p)->SuccessorLow = (UInt16)((UInt32)(v) & 0xFFFF);
- (p)->SuccessorHigh = (UInt16)(((UInt32)(v) >> 16) & 0xFFFF);
+ (p)->SuccessorLow = (UInt16)((UInt32)(v) & 0xFFFF);
+ (p)->SuccessorHigh = (UInt16)(((UInt32)(v) >> 16) & 0xFFFF);
}
#define RESET_TEXT(offs) { p->Text = p->Base + p->AlignOffset + (offs); }
static void RestartModel(CPpmd8 *p)
{
- unsigned i, k, m, r;
-
- memset(p->FreeList, 0, sizeof(p->FreeList));
- memset(p->Stamps, 0, sizeof(p->Stamps));
- RESET_TEXT(0);
- p->HiUnit = p->Text + p->Size;
- p->LoUnit = p->UnitsStart = p->HiUnit - p->Size / 8 / UNIT_SIZE * 7 * UNIT_SIZE;
- p->GlueCount = 0;
-
- p->OrderFall = p->MaxOrder;
- p->RunLength = p->InitRL = -(Int32)((p->MaxOrder < 12) ? p->MaxOrder : 12) - 1;
- p->PrevSuccess = 0;
-
- p->MinContext = p->MaxContext = (CTX_PTR)(p->HiUnit -= UNIT_SIZE); /* AllocContext(p); */
- p->MinContext->Suffix = 0;
- p->MinContext->NumStats = 255;
- p->MinContext->Flags = 0;
- p->MinContext->SummFreq = 256 + 1;
- p->FoundState = (CPpmd_State *)p->LoUnit; /* AllocUnits(p, PPMD_NUM_INDEXES - 1); */
- p->LoUnit += U2B(256 / 2);
- p->MinContext->Stats = REF(p->FoundState);
- for (i = 0; i < 256; i++)
- {
- CPpmd_State *s = &p->FoundState[i];
- s->Symbol = (Byte)i;
- s->Freq = 1;
- SetSuccessor(s, 0);
- }
-
- for (i = m = 0; m < 25; m++)
- {
- while (p->NS2Indx[i] == m)
- i++;
- for (k = 0; k < 8; k++)
- {
- UInt16 val = (UInt16)(PPMD_BIN_SCALE - kInitBinEsc[k] / (i + 1));
- UInt16 *dest = p->BinSumm[m] + k;
- for (r = 0; r < 64; r += 8)
- dest[r] = val;
- }
- }
-
- for (i = m = 0; m < 24; m++)
- {
- while (p->NS2Indx[i + 3] == m + 3)
- i++;
- for (k = 0; k < 32; k++)
- {
- CPpmd_See *s = &p->See[m][k];
- s->Summ = (UInt16)((2 * i + 5) << (s->Shift = PPMD_PERIOD_BITS - 4));
- s->Count = 7;
- }
- }
+ unsigned i, k, m, r;
+
+ memset(p->FreeList, 0, sizeof(p->FreeList));
+ memset(p->Stamps, 0, sizeof(p->Stamps));
+ RESET_TEXT(0);
+ p->HiUnit = p->Text + p->Size;
+ p->LoUnit = p->UnitsStart = p->HiUnit - p->Size / 8 / UNIT_SIZE * 7 * UNIT_SIZE;
+ p->GlueCount = 0;
+
+ p->OrderFall = p->MaxOrder;
+ p->RunLength = p->InitRL = -(Int32)((p->MaxOrder < 12) ? p->MaxOrder : 12) - 1;
+ p->PrevSuccess = 0;
+
+ p->MinContext = p->MaxContext = (CTX_PTR)(p->HiUnit -= UNIT_SIZE); /* AllocContext(p); */
+ p->MinContext->Suffix = 0;
+ p->MinContext->NumStats = 255;
+ p->MinContext->Flags = 0;
+ p->MinContext->SummFreq = 256 + 1;
+ p->FoundState = (CPpmd_State *)p->LoUnit; /* AllocUnits(p, PPMD_NUM_INDEXES - 1); */
+ p->LoUnit += U2B(256 / 2);
+ p->MinContext->Stats = REF(p->FoundState);
+ for (i = 0; i < 256; i++)
+ {
+ CPpmd_State *s = &p->FoundState[i];
+ s->Symbol = (Byte)i;
+ s->Freq = 1;
+ SetSuccessor(s, 0);
+ }
+
+ for (i = m = 0; m < 25; m++)
+ {
+ while (p->NS2Indx[i] == m)
+ i++;
+ for (k = 0; k < 8; k++)
+ {
+ UInt16 val = (UInt16)(PPMD_BIN_SCALE - kInitBinEsc[k] / (i + 1));
+ UInt16 *dest = p->BinSumm[m] + k;
+ for (r = 0; r < 64; r += 8)
+ dest[r] = val;
+ }
+ }
+
+ for (i = m = 0; m < 24; m++)
+ {
+ while (p->NS2Indx[i + 3] == m + 3)
+ i++;
+ for (k = 0; k < 32; k++)
+ {
+ CPpmd_See *s = &p->See[m][k];
+ s->Summ = (UInt16)((2 * i + 5) << (s->Shift = PPMD_PERIOD_BITS - 4));
+ s->Count = 7;
+ }
+ }
}
void Ppmd8_Init(CPpmd8 *p, unsigned maxOrder, unsigned restoreMethod)
{
- p->MaxOrder = maxOrder;
- p->RestoreMethod = restoreMethod;
- RestartModel(p);
- p->DummySee.Shift = PPMD_PERIOD_BITS;
- p->DummySee.Summ = 0; /* unused */
- p->DummySee.Count = 64; /* unused */
+ p->MaxOrder = maxOrder;
+ p->RestoreMethod = restoreMethod;
+ RestartModel(p);
+ p->DummySee.Shift = PPMD_PERIOD_BITS;
+ p->DummySee.Summ = 0; /* unused */
+ p->DummySee.Count = 64; /* unused */
}
static void Refresh(CPpmd8 *p, CTX_PTR ctx, unsigned oldNU, unsigned scale)
{
- unsigned i = ctx->NumStats, escFreq, sumFreq, flags;
- CPpmd_State *s = (CPpmd_State *)ShrinkUnits(p, STATS(ctx), oldNU, (i + 2) >> 1);
- ctx->Stats = REF(s);
- #ifdef PPMD8_FREEZE_SUPPORT
- /* fixed over Shkarin's code. Fixed code is not compatible with original code for some files in FREEZE mode. */
- scale |= (ctx->SummFreq >= ((UInt32)1 << 15));
- #endif
- flags = (ctx->Flags & (0x10 + 0x04 * scale)) + 0x08 * (s->Symbol >= 0x40);
- escFreq = ctx->SummFreq - s->Freq;
- sumFreq = (s->Freq = (Byte)((s->Freq + scale) >> scale));
- do
- {
- escFreq -= (++s)->Freq;
- sumFreq += (s->Freq = (Byte)((s->Freq + scale) >> scale));
- flags |= 0x08 * (s->Symbol >= 0x40);
- }
- while (--i);
- ctx->SummFreq = (UInt16)(sumFreq + ((escFreq + scale) >> scale));
- ctx->Flags = (Byte)flags;
+ unsigned i = ctx->NumStats, escFreq, sumFreq, flags;
+ CPpmd_State *s = (CPpmd_State *)ShrinkUnits(p, STATS(ctx), oldNU, (i + 2) >> 1);
+ ctx->Stats = REF(s);
+ #ifdef PPMD8_FREEZE_SUPPORT
+ /* fixed over Shkarin's code. Fixed code is not compatible with original code for some files in FREEZE mode. */
+ scale |= (ctx->SummFreq >= ((UInt32)1 << 15));
+ #endif
+ flags = (ctx->Flags & (0x10 + 0x04 * scale)) + 0x08 * (s->Symbol >= 0x40);
+ escFreq = ctx->SummFreq - s->Freq;
+ sumFreq = (s->Freq = (Byte)((s->Freq + scale) >> scale));
+ do
+ {
+ escFreq -= (++s)->Freq;
+ sumFreq += (s->Freq = (Byte)((s->Freq + scale) >> scale));
+ flags |= 0x08 * (s->Symbol >= 0x40);
+ }
+ while (--i);
+ ctx->SummFreq = (UInt16)(sumFreq + ((escFreq + scale) >> scale));
+ ctx->Flags = (Byte)flags;
}
static void SwapStates(CPpmd_State *t1, CPpmd_State *t2)
{
- CPpmd_State tmp = *t1;
- *t1 = *t2;
- *t2 = tmp;
+ CPpmd_State tmp = *t1;
+ *t1 = *t2;
+ *t2 = tmp;
}
static CPpmd_Void_Ref CutOff(CPpmd8 *p, CTX_PTR ctx, unsigned order)
{
- int i;
- unsigned tmp;
- CPpmd_State *s;
-
- if (!ctx->NumStats)
- {
- s = ONE_STATE(ctx);
- if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) >= p->UnitsStart)
- {
- if (order < p->MaxOrder)
- SetSuccessor(s, CutOff(p, CTX(SUCCESSOR(s)), order + 1));
- else
- SetSuccessor(s, 0);
- if (SUCCESSOR(s) || order <= 9) /* O_BOUND */
- return REF(ctx);
- }
- SpecialFreeUnit(p, ctx);
- return 0;
- }
-
- ctx->Stats = STATS_REF(MoveUnitsUp(p, STATS(ctx), tmp = ((unsigned)ctx->NumStats + 2) >> 1));
-
- for (s = STATS(ctx) + (i = ctx->NumStats); s >= STATS(ctx); s--)
- if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) < p->UnitsStart)
- {
- CPpmd_State *s2 = STATS(ctx) + (i--);
- SetSuccessor(s, 0);
- SwapStates(s, s2);
- }
- else if (order < p->MaxOrder)
- SetSuccessor(s, CutOff(p, CTX(SUCCESSOR(s)), order + 1));
- else
- SetSuccessor(s, 0);
-
- if (i != ctx->NumStats && order)
- {
- ctx->NumStats = (Byte)i;
- s = STATS(ctx);
- if (i < 0)
- {
- FreeUnits(p, s, tmp);
- SpecialFreeUnit(p, ctx);
- return 0;
- }
- if (i == 0)
- {
- ctx->Flags = (ctx->Flags & 0x10) + 0x08 * (s->Symbol >= 0x40);
- *ONE_STATE(ctx) = *s;
- FreeUnits(p, s, tmp);
- ONE_STATE(ctx)->Freq = (Byte)((unsigned)ONE_STATE(ctx)->Freq + 11) >> 3;
- }
- else
- Refresh(p, ctx, tmp, ctx->SummFreq > 16 * i);
- }
- return REF(ctx);
+ int i;
+ unsigned tmp;
+ CPpmd_State *s;
+
+ if (!ctx->NumStats)
+ {
+ s = ONE_STATE(ctx);
+ if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) >= p->UnitsStart)
+ {
+ if (order < p->MaxOrder)
+ SetSuccessor(s, CutOff(p, CTX(SUCCESSOR(s)), order + 1));
+ else
+ SetSuccessor(s, 0);
+ if (SUCCESSOR(s) || order <= 9) /* O_BOUND */
+ return REF(ctx);
+ }
+ SpecialFreeUnit(p, ctx);
+ return 0;
+ }
+
+ ctx->Stats = STATS_REF(MoveUnitsUp(p, STATS(ctx), tmp = ((unsigned)ctx->NumStats + 2) >> 1));
+
+ for (s = STATS(ctx) + (i = ctx->NumStats); s >= STATS(ctx); s--)
+ if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) < p->UnitsStart)
+ {
+ CPpmd_State *s2 = STATS(ctx) + (i--);
+ SetSuccessor(s, 0);
+ SwapStates(s, s2);
+ }
+ else if (order < p->MaxOrder)
+ SetSuccessor(s, CutOff(p, CTX(SUCCESSOR(s)), order + 1));
+ else
+ SetSuccessor(s, 0);
+
+ if (i != ctx->NumStats && order)
+ {
+ ctx->NumStats = (Byte)i;
+ s = STATS(ctx);
+ if (i < 0)
+ {
+ FreeUnits(p, s, tmp);
+ SpecialFreeUnit(p, ctx);
+ return 0;
+ }
+ if (i == 0)
+ {
+ ctx->Flags = (ctx->Flags & 0x10) + 0x08 * (s->Symbol >= 0x40);
+ *ONE_STATE(ctx) = *s;
+ FreeUnits(p, s, tmp);
+ ONE_STATE(ctx)->Freq = (Byte)((unsigned)ONE_STATE(ctx)->Freq + 11) >> 3;
+ }
+ else
+ Refresh(p, ctx, tmp, ctx->SummFreq > 16 * i);
+ }
+ return REF(ctx);
}
#ifdef PPMD8_FREEZE_SUPPORT
static CPpmd_Void_Ref RemoveBinContexts(CPpmd8 *p, CTX_PTR ctx, unsigned order)
{
- CPpmd_State *s;
- if (!ctx->NumStats)
- {
- s = ONE_STATE(ctx);
- if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) >= p->UnitsStart && order < p->MaxOrder)
- SetSuccessor(s, RemoveBinContexts(p, CTX(SUCCESSOR(s)), order + 1));
- else
- SetSuccessor(s, 0);
- /* Suffix context can be removed already, since different (high-order)
- Successors may refer to same context. So we check Flags == 0xFF (Stamp == EMPTY_NODE) */
- if (!SUCCESSOR(s) && (!SUFFIX(ctx)->NumStats || SUFFIX(ctx)->Flags == 0xFF))
- {
- FreeUnits(p, ctx, 1);
- return 0;
- }
- else
- return REF(ctx);
- }
-
- for (s = STATS(ctx) + ctx->NumStats; s >= STATS(ctx); s--)
- if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) >= p->UnitsStart && order < p->MaxOrder)
- SetSuccessor(s, RemoveBinContexts(p, CTX(SUCCESSOR(s)), order + 1));
- else
- SetSuccessor(s, 0);
-
- return REF(ctx);
+ CPpmd_State *s;
+ if (!ctx->NumStats)
+ {
+ s = ONE_STATE(ctx);
+ if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) >= p->UnitsStart && order < p->MaxOrder)
+ SetSuccessor(s, RemoveBinContexts(p, CTX(SUCCESSOR(s)), order + 1));
+ else
+ SetSuccessor(s, 0);
+ /* Suffix context can be removed already, since different (high-order)
+ Successors may refer to same context. So we check Flags == 0xFF (Stamp == EMPTY_NODE) */
+ if (!SUCCESSOR(s) && (!SUFFIX(ctx)->NumStats || SUFFIX(ctx)->Flags == 0xFF))
+ {
+ FreeUnits(p, ctx, 1);
+ return 0;
+ }
+ else
+ return REF(ctx);
+ }
+
+ for (s = STATS(ctx) + ctx->NumStats; s >= STATS(ctx); s--)
+ if ((Byte *)Ppmd8_GetPtr(p, SUCCESSOR(s)) >= p->UnitsStart && order < p->MaxOrder)
+ SetSuccessor(s, RemoveBinContexts(p, CTX(SUCCESSOR(s)), order + 1));
+ else
+ SetSuccessor(s, 0);
+
+ return REF(ctx);
}
#endif
static UInt32 GetUsedMemory(const CPpmd8 *p)
{
- UInt32 v = 0;
- unsigned i;
- for (i = 0; i < PPMD_NUM_INDEXES; i++)
- v += p->Stamps[i] * I2U(i);
- return p->Size - (UInt32)(p->HiUnit - p->LoUnit) - (UInt32)(p->UnitsStart - p->Text) - U2B(v);
+ UInt32 v = 0;
+ unsigned i;
+ for (i = 0; i < PPMD_NUM_INDEXES; i++)
+ v += p->Stamps[i] * I2U(i);
+ return p->Size - (UInt32)(p->HiUnit - p->LoUnit) - (UInt32)(p->UnitsStart - p->Text) - U2B(v);
}
#ifdef PPMD8_FREEZE_SUPPORT
- #define RESTORE_MODEL(c1, fSuccessor) RestoreModel(p, c1, fSuccessor)
+ #define RESTORE_MODEL(c1, fSuccessor) RestoreModel(p, c1, fSuccessor)
#else
- #define RESTORE_MODEL(c1, fSuccessor) RestoreModel(p, c1)
+ #define RESTORE_MODEL(c1, fSuccessor) RestoreModel(p, c1)
#endif
static void RestoreModel(CPpmd8 *p, CTX_PTR c1
- #ifdef PPMD8_FREEZE_SUPPORT
- , CTX_PTR fSuccessor
- #endif
- )
+ #ifdef PPMD8_FREEZE_SUPPORT
+ , CTX_PTR fSuccessor
+ #endif
+ )
{
- CTX_PTR c;
- CPpmd_State *s;
- RESET_TEXT(0);
- for (c = p->MaxContext; c != c1; c = SUFFIX(c))
- if (--(c->NumStats) == 0)
- {
- s = STATS(c);
- c->Flags = (c->Flags & 0x10) + 0x08 * (s->Symbol >= 0x40);
- *ONE_STATE(c) = *s;
- SpecialFreeUnit(p, s);
- ONE_STATE(c)->Freq = (ONE_STATE(c)->Freq + 11) >> 3;
- }
- else
- Refresh(p, c, (c->NumStats+3) >> 1, 0);
-
- for (; c != p->MinContext; c = SUFFIX(c))
- if (!c->NumStats)
- ONE_STATE(c)->Freq -= ONE_STATE(c)->Freq >> 1;
- else if ((c->SummFreq += 4) > 128 + 4 * c->NumStats)
- Refresh(p, c, (c->NumStats + 2) >> 1, 1);
-
- #ifdef PPMD8_FREEZE_SUPPORT
- if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
- {
- p->MaxContext = fSuccessor;
- p->GlueCount += !(p->Stamps[1] & 1);
- }
- else if (p->RestoreMethod == PPMD8_RESTORE_METHOD_FREEZE)
- {
- while (p->MaxContext->Suffix)
- p->MaxContext = SUFFIX(p->MaxContext);
- RemoveBinContexts(p, p->MaxContext, 0);
- p->RestoreMethod++;
- p->GlueCount = 0;
- p->OrderFall = p->MaxOrder;
- }
- else
- #endif
- if (p->RestoreMethod == PPMD8_RESTORE_METHOD_RESTART || GetUsedMemory(p) < (p->Size >> 1))
- RestartModel(p);
- else
- {
- while (p->MaxContext->Suffix)
- p->MaxContext = SUFFIX(p->MaxContext);
- do
- {
- CutOff(p, p->MaxContext, 0);
- ExpandTextArea(p);
- }
- while (GetUsedMemory(p) > 3 * (p->Size >> 2));
- p->GlueCount = 0;
- p->OrderFall = p->MaxOrder;
- }
+ CTX_PTR c;
+ CPpmd_State *s;
+ RESET_TEXT(0);
+ for (c = p->MaxContext; c != c1; c = SUFFIX(c))
+ if (--(c->NumStats) == 0)
+ {
+ s = STATS(c);
+ c->Flags = (c->Flags & 0x10) + 0x08 * (s->Symbol >= 0x40);
+ *ONE_STATE(c) = *s;
+ SpecialFreeUnit(p, s);
+ ONE_STATE(c)->Freq = (ONE_STATE(c)->Freq + 11) >> 3;
+ }
+ else
+ Refresh(p, c, (c->NumStats+3) >> 1, 0);
+
+ for (; c != p->MinContext; c = SUFFIX(c))
+ if (!c->NumStats)
+ ONE_STATE(c)->Freq -= ONE_STATE(c)->Freq >> 1;
+ else if ((c->SummFreq += 4) > 128 + 4 * c->NumStats)
+ Refresh(p, c, (c->NumStats + 2) >> 1, 1);
+
+ #ifdef PPMD8_FREEZE_SUPPORT
+ if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
+ {
+ p->MaxContext = fSuccessor;
+ p->GlueCount += !(p->Stamps[1] & 1);
+ }
+ else if (p->RestoreMethod == PPMD8_RESTORE_METHOD_FREEZE)
+ {
+ while (p->MaxContext->Suffix)
+ p->MaxContext = SUFFIX(p->MaxContext);
+ RemoveBinContexts(p, p->MaxContext, 0);
+ p->RestoreMethod++;
+ p->GlueCount = 0;
+ p->OrderFall = p->MaxOrder;
+ }
+ else
+ #endif
+ if (p->RestoreMethod == PPMD8_RESTORE_METHOD_RESTART || GetUsedMemory(p) < (p->Size >> 1))
+ RestartModel(p);
+ else
+ {
+ while (p->MaxContext->Suffix)
+ p->MaxContext = SUFFIX(p->MaxContext);
+ do
+ {
+ CutOff(p, p->MaxContext, 0);
+ ExpandTextArea(p);
+ }
+ while (GetUsedMemory(p) > 3 * (p->Size >> 2));
+ p->GlueCount = 0;
+ p->OrderFall = p->MaxOrder;
+ }
}
static CTX_PTR CreateSuccessors(CPpmd8 *p, Bool skip, CPpmd_State *s1, CTX_PTR c)
{
- CPpmd_State upState;
- Byte flags;
- CPpmd_Byte_Ref upBranch = (CPpmd_Byte_Ref)SUCCESSOR(p->FoundState);
- /* fixed over Shkarin's code. Maybe it could work without + 1 too. */
- CPpmd_State *ps[PPMD8_MAX_ORDER + 1];
- unsigned numPs = 0;
-
- if (!skip)
- ps[numPs++] = p->FoundState;
-
- while (c->Suffix)
- {
- CPpmd_Void_Ref successor;
- CPpmd_State *s;
- c = SUFFIX(c);
- if (s1)
- {
- s = s1;
- s1 = NULL;
- }
- else if (c->NumStats != 0)
- {
- for (s = STATS(c); s->Symbol != p->FoundState->Symbol; s++);
- if (s->Freq < MAX_FREQ - 9)
- {
- s->Freq++;
- c->SummFreq++;
- }
- }
- else
- {
- s = ONE_STATE(c);
- s->Freq += (!SUFFIX(c)->NumStats & (s->Freq < 24));
- }
- successor = SUCCESSOR(s);
- if (successor != upBranch)
- {
- c = CTX(successor);
- if (numPs == 0)
- return c;
- break;
- }
- ps[numPs++] = s;
- }
-
- upState.Symbol = *(const Byte *)Ppmd8_GetPtr(p, upBranch);
- SetSuccessor(&upState, upBranch + 1);
- flags = 0x10 * (p->FoundState->Symbol >= 0x40) + 0x08 * (upState.Symbol >= 0x40);
-
- if (c->NumStats == 0)
- upState.Freq = ONE_STATE(c)->Freq;
- else
- {
- UInt32 cf, s0;
- CPpmd_State *s;
- for (s = STATS(c); s->Symbol != upState.Symbol; s++);
- cf = s->Freq - 1;
- s0 = c->SummFreq - c->NumStats - cf;
- upState.Freq = (Byte)(1 + ((2 * cf <= s0) ? (5 * cf > s0) : ((cf + 2 * s0 - 3) / s0)));
- }
-
- do
- {
- /* Create Child */
- CTX_PTR c1; /* = AllocContext(p); */
- if (p->HiUnit != p->LoUnit)
- c1 = (CTX_PTR)(p->HiUnit -= UNIT_SIZE);
- else if (p->FreeList[0] != 0)
- c1 = (CTX_PTR)RemoveNode(p, 0);
- else
- {
- c1 = (CTX_PTR)AllocUnitsRare(p, 0);
- if (!c1)
- return NULL;
- }
- c1->NumStats = 0;
- c1->Flags = flags;
- *ONE_STATE(c1) = upState;
- c1->Suffix = REF(c);
- SetSuccessor(ps[--numPs], REF(c1));
- c = c1;
- }
- while (numPs != 0);
-
- return c;
+ CPpmd_State upState;
+ Byte flags;
+ CPpmd_Byte_Ref upBranch = (CPpmd_Byte_Ref)SUCCESSOR(p->FoundState);
+ /* fixed over Shkarin's code. Maybe it could work without + 1 too. */
+ CPpmd_State *ps[PPMD8_MAX_ORDER + 1];
+ unsigned numPs = 0;
+
+ if (!skip)
+ ps[numPs++] = p->FoundState;
+
+ while (c->Suffix)
+ {
+ CPpmd_Void_Ref successor;
+ CPpmd_State *s;
+ c = SUFFIX(c);
+ if (s1)
+ {
+ s = s1;
+ s1 = NULL;
+ }
+ else if (c->NumStats != 0)
+ {
+ for (s = STATS(c); s->Symbol != p->FoundState->Symbol; s++);
+ if (s->Freq < MAX_FREQ - 9)
+ {
+ s->Freq++;
+ c->SummFreq++;
+ }
+ }
+ else
+ {
+ s = ONE_STATE(c);
+ s->Freq += (!SUFFIX(c)->NumStats & (s->Freq < 24));
+ }
+ successor = SUCCESSOR(s);
+ if (successor != upBranch)
+ {
+ c = CTX(successor);
+ if (numPs == 0)
+ return c;
+ break;
+ }
+ ps[numPs++] = s;
+ }
+
+ upState.Symbol = *(const Byte *)Ppmd8_GetPtr(p, upBranch);
+ SetSuccessor(&upState, upBranch + 1);
+ flags = 0x10 * (p->FoundState->Symbol >= 0x40) + 0x08 * (upState.Symbol >= 0x40);
+
+ if (c->NumStats == 0)
+ upState.Freq = ONE_STATE(c)->Freq;
+ else
+ {
+ UInt32 cf, s0;
+ CPpmd_State *s;
+ for (s = STATS(c); s->Symbol != upState.Symbol; s++);
+ cf = s->Freq - 1;
+ s0 = c->SummFreq - c->NumStats - cf;
+ upState.Freq = (Byte)(1 + ((2 * cf <= s0) ? (5 * cf > s0) : ((cf + 2 * s0 - 3) / s0)));
+ }
+
+ do
+ {
+ /* Create Child */
+ CTX_PTR c1; /* = AllocContext(p); */
+ if (p->HiUnit != p->LoUnit)
+ c1 = (CTX_PTR)(p->HiUnit -= UNIT_SIZE);
+ else if (p->FreeList[0] != 0)
+ c1 = (CTX_PTR)RemoveNode(p, 0);
+ else
+ {
+ c1 = (CTX_PTR)AllocUnitsRare(p, 0);
+ if (!c1)
+ return NULL;
+ }
+ c1->NumStats = 0;
+ c1->Flags = flags;
+ *ONE_STATE(c1) = upState;
+ c1->Suffix = REF(c);
+ SetSuccessor(ps[--numPs], REF(c1));
+ c = c1;
+ }
+ while (numPs != 0);
+
+ return c;
}
static CTX_PTR ReduceOrder(CPpmd8 *p, CPpmd_State *s1, CTX_PTR c)
{
- CPpmd_State *s = NULL;
- CTX_PTR c1 = c;
- CPpmd_Void_Ref upBranch = REF(p->Text);
-
- #ifdef PPMD8_FREEZE_SUPPORT
- /* The BUG in Shkarin's code was fixed: ps could overflow in CUT_OFF mode. */
- CPpmd_State *ps[PPMD8_MAX_ORDER + 1];
- unsigned numPs = 0;
- ps[numPs++] = p->FoundState;
- #endif
-
- SetSuccessor(p->FoundState, upBranch);
- p->OrderFall++;
-
- for (;;)
- {
- if (s1)
- {
- c = SUFFIX(c);
- s = s1;
- s1 = NULL;
- }
- else
- {
- if (!c->Suffix)
- {
- #ifdef PPMD8_FREEZE_SUPPORT
- if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
- {
- do { SetSuccessor(ps[--numPs], REF(c)); } while (numPs);
- RESET_TEXT(1);
- p->OrderFall = 1;
- }
- #endif
- return c;
- }
- c = SUFFIX(c);
- if (c->NumStats)
- {
- if ((s = STATS(c))->Symbol != p->FoundState->Symbol)
- do { s++; } while (s->Symbol != p->FoundState->Symbol);
- if (s->Freq < MAX_FREQ - 9)
- {
- s->Freq += 2;
- c->SummFreq += 2;
- }
- }
- else
- {
- s = ONE_STATE(c);
- s->Freq += (s->Freq < 32);
- }
- }
- if (SUCCESSOR(s))
- break;
- #ifdef PPMD8_FREEZE_SUPPORT
- ps[numPs++] = s;
- #endif
- SetSuccessor(s, upBranch);
- p->OrderFall++;
- }
-
- #ifdef PPMD8_FREEZE_SUPPORT
- if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
- {
- c = CTX(SUCCESSOR(s));
- do { SetSuccessor(ps[--numPs], REF(c)); } while (numPs);
- RESET_TEXT(1);
- p->OrderFall = 1;
- return c;
- }
- else
- #endif
- if (SUCCESSOR(s) <= upBranch)
- {
- CTX_PTR successor;
- CPpmd_State *s1 = p->FoundState;
- p->FoundState = s;
-
- successor = CreateSuccessors(p, False, NULL, c);
- if (successor == NULL)
- SetSuccessor(s, 0);
- else
- SetSuccessor(s, REF(successor));
- p->FoundState = s1;
- }
-
- if (p->OrderFall == 1 && c1 == p->MaxContext)
- {
- SetSuccessor(p->FoundState, SUCCESSOR(s));
- p->Text--;
- }
- if (SUCCESSOR(s) == 0)
- return NULL;
- return CTX(SUCCESSOR(s));
+ CPpmd_State *s = NULL;
+ CTX_PTR c1 = c;
+ CPpmd_Void_Ref upBranch = REF(p->Text);
+
+ #ifdef PPMD8_FREEZE_SUPPORT
+ /* The BUG in Shkarin's code was fixed: ps could overflow in CUT_OFF mode. */
+ CPpmd_State *ps[PPMD8_MAX_ORDER + 1];
+ unsigned numPs = 0;
+ ps[numPs++] = p->FoundState;
+ #endif
+
+ SetSuccessor(p->FoundState, upBranch);
+ p->OrderFall++;
+
+ for (;;)
+ {
+ if (s1)
+ {
+ c = SUFFIX(c);
+ s = s1;
+ s1 = NULL;
+ }
+ else
+ {
+ if (!c->Suffix)
+ {
+ #ifdef PPMD8_FREEZE_SUPPORT
+ if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
+ {
+ do { SetSuccessor(ps[--numPs], REF(c)); } while (numPs);
+ RESET_TEXT(1);
+ p->OrderFall = 1;
+ }
+ #endif
+ return c;
+ }
+ c = SUFFIX(c);
+ if (c->NumStats)
+ {
+ if ((s = STATS(c))->Symbol != p->FoundState->Symbol)
+ do { s++; } while (s->Symbol != p->FoundState->Symbol);
+ if (s->Freq < MAX_FREQ - 9)
+ {
+ s->Freq += 2;
+ c->SummFreq += 2;
+ }
+ }
+ else
+ {
+ s = ONE_STATE(c);
+ s->Freq += (s->Freq < 32);
+ }
+ }
+ if (SUCCESSOR(s))
+ break;
+ #ifdef PPMD8_FREEZE_SUPPORT
+ ps[numPs++] = s;
+ #endif
+ SetSuccessor(s, upBranch);
+ p->OrderFall++;
+ }
+
+ #ifdef PPMD8_FREEZE_SUPPORT
+ if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
+ {
+ c = CTX(SUCCESSOR(s));
+ do { SetSuccessor(ps[--numPs], REF(c)); } while (numPs);
+ RESET_TEXT(1);
+ p->OrderFall = 1;
+ return c;
+ }
+ else
+ #endif
+ if (SUCCESSOR(s) <= upBranch)
+ {
+ CTX_PTR successor;
+ CPpmd_State *s1 = p->FoundState;
+ p->FoundState = s;
+
+ successor = CreateSuccessors(p, False, NULL, c);
+ if (successor == NULL)
+ SetSuccessor(s, 0);
+ else
+ SetSuccessor(s, REF(successor));
+ p->FoundState = s1;
+ }
+
+ if (p->OrderFall == 1 && c1 == p->MaxContext)
+ {
+ SetSuccessor(p->FoundState, SUCCESSOR(s));
+ p->Text--;
+ }
+ if (SUCCESSOR(s) == 0)
+ return NULL;
+ return CTX(SUCCESSOR(s));
}
static void UpdateModel(CPpmd8 *p)
{
- CPpmd_Void_Ref successor, fSuccessor = SUCCESSOR(p->FoundState);
- CTX_PTR c;
- unsigned s0, ns, fFreq = p->FoundState->Freq;
- Byte flag, fSymbol = p->FoundState->Symbol;
- CPpmd_State *s = NULL;
-
- if (p->FoundState->Freq < MAX_FREQ / 4 && p->MinContext->Suffix != 0)
- {
- c = SUFFIX(p->MinContext);
-
- if (c->NumStats == 0)
- {
- s = ONE_STATE(c);
- if (s->Freq < 32)
- s->Freq++;
- }
- else
- {
- s = STATS(c);
- if (s->Symbol != p->FoundState->Symbol)
- {
- do { s++; } while (s->Symbol != p->FoundState->Symbol);
- if (s[0].Freq >= s[-1].Freq)
- {
- SwapStates(&s[0], &s[-1]);
- s--;
- }
- }
- if (s->Freq < MAX_FREQ - 9)
- {
- s->Freq += 2;
- c->SummFreq += 2;
- }
- }
- }
-
- c = p->MaxContext;
- if (p->OrderFall == 0 && fSuccessor)
- {
- CTX_PTR cs = CreateSuccessors(p, True, s, p->MinContext);
- if (cs == 0)
- {
- SetSuccessor(p->FoundState, 0);
- RESTORE_MODEL(c, CTX(fSuccessor));
- }
- else
- {
- SetSuccessor(p->FoundState, REF(cs));
- p->MaxContext = cs;
- }
- return;
- }
-
- *p->Text++ = p->FoundState->Symbol;
- successor = REF(p->Text);
- if (p->Text >= p->UnitsStart)
- {
- RESTORE_MODEL(c, CTX(fSuccessor)); /* check it */
- return;
- }
-
- if (!fSuccessor)
- {
- CTX_PTR cs = ReduceOrder(p, s, p->MinContext);
- if (cs == NULL)
- {
- RESTORE_MODEL(c, 0);
- return;
- }
- fSuccessor = REF(cs);
- }
- else if ((Byte *)Ppmd8_GetPtr(p, fSuccessor) < p->UnitsStart)
- {
- CTX_PTR cs = CreateSuccessors(p, False, s, p->MinContext);
- if (cs == NULL)
- {
- RESTORE_MODEL(c, 0);
- return;
- }
- fSuccessor = REF(cs);
- }
-
- if (--p->OrderFall == 0)
- {
- successor = fSuccessor;
- p->Text -= (p->MaxContext != p->MinContext);
- }
- #ifdef PPMD8_FREEZE_SUPPORT
- else if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
- {
- successor = fSuccessor;
- RESET_TEXT(0);
- p->OrderFall = 0;
- }
- #endif
-
- s0 = p->MinContext->SummFreq - (ns = p->MinContext->NumStats) - fFreq;
- flag = 0x08 * (fSymbol >= 0x40);
-
- for (; c != p->MinContext; c = SUFFIX(c))
- {
- unsigned ns1;
- UInt32 cf, sf;
- if ((ns1 = c->NumStats) != 0)
- {
- if ((ns1 & 1) != 0)
- {
- /* Expand for one UNIT */
- unsigned oldNU = (ns1 + 1) >> 1;
- unsigned i = U2I(oldNU);
- if (i != U2I(oldNU + 1))
- {
- void *ptr = AllocUnits(p, i + 1);
- void *oldPtr;
- if (!ptr)
- {
- RESTORE_MODEL(c, CTX(fSuccessor));
- return;
- }
- oldPtr = STATS(c);
- MyMem12Cpy(ptr, oldPtr, oldNU);
- InsertNode(p, oldPtr, i);
- c->Stats = STATS_REF(ptr);
- }
- }
- c->SummFreq = (UInt16)(c->SummFreq + (3 * ns1 + 1 < ns));
- }
- else
- {
- CPpmd_State *s = (CPpmd_State*)AllocUnits(p, 0);
- if (!s)
- {
- RESTORE_MODEL(c, CTX(fSuccessor));
- return;
- }
- *s = *ONE_STATE(c);
- c->Stats = REF(s);
- if (s->Freq < MAX_FREQ / 4 - 1)
- s->Freq <<= 1;
- else
- s->Freq = MAX_FREQ - 4;
- c->SummFreq = (UInt16)(s->Freq + p->InitEsc + (ns > 2));
- }
- cf = 2 * fFreq * (c->SummFreq + 6);
- sf = (UInt32)s0 + c->SummFreq;
- if (cf < 6 * sf)
- {
- cf = 1 + (cf > sf) + (cf >= 4 * sf);
- c->SummFreq += 4;
- }
- else
- {
- cf = 4 + (cf > 9 * sf) + (cf > 12 * sf) + (cf > 15 * sf);
- c->SummFreq = (UInt16)(c->SummFreq + cf);
- }
- {
- CPpmd_State *s = STATS(c) + ns1 + 1;
- SetSuccessor(s, successor);
- s->Symbol = fSymbol;
- s->Freq = (Byte)cf;
- c->Flags |= flag;
- c->NumStats = (Byte)(ns1 + 1);
- }
- }
- p->MaxContext = p->MinContext = CTX(fSuccessor);
+ CPpmd_Void_Ref successor, fSuccessor = SUCCESSOR(p->FoundState);
+ CTX_PTR c;
+ unsigned s0, ns, fFreq = p->FoundState->Freq;
+ Byte flag, fSymbol = p->FoundState->Symbol;
+ CPpmd_State *s = NULL;
+
+ if (p->FoundState->Freq < MAX_FREQ / 4 && p->MinContext->Suffix != 0)
+ {
+ c = SUFFIX(p->MinContext);
+
+ if (c->NumStats == 0)
+ {
+ s = ONE_STATE(c);
+ if (s->Freq < 32)
+ s->Freq++;
+ }
+ else
+ {
+ s = STATS(c);
+ if (s->Symbol != p->FoundState->Symbol)
+ {
+ do { s++; } while (s->Symbol != p->FoundState->Symbol);
+ if (s[0].Freq >= s[-1].Freq)
+ {
+ SwapStates(&s[0], &s[-1]);
+ s--;
+ }
+ }
+ if (s->Freq < MAX_FREQ - 9)
+ {
+ s->Freq += 2;
+ c->SummFreq += 2;
+ }
+ }
+ }
+
+ c = p->MaxContext;
+ if (p->OrderFall == 0 && fSuccessor)
+ {
+ CTX_PTR cs = CreateSuccessors(p, True, s, p->MinContext);
+ if (cs == 0)
+ {
+ SetSuccessor(p->FoundState, 0);
+ RESTORE_MODEL(c, CTX(fSuccessor));
+ }
+ else
+ {
+ SetSuccessor(p->FoundState, REF(cs));
+ p->MaxContext = cs;
+ }
+ return;
+ }
+
+ *p->Text++ = p->FoundState->Symbol;
+ successor = REF(p->Text);
+ if (p->Text >= p->UnitsStart)
+ {
+ RESTORE_MODEL(c, CTX(fSuccessor)); /* check it */
+ return;
+ }
+
+ if (!fSuccessor)
+ {
+ CTX_PTR cs = ReduceOrder(p, s, p->MinContext);
+ if (cs == NULL)
+ {
+ RESTORE_MODEL(c, 0);
+ return;
+ }
+ fSuccessor = REF(cs);
+ }
+ else if ((Byte *)Ppmd8_GetPtr(p, fSuccessor) < p->UnitsStart)
+ {
+ CTX_PTR cs = CreateSuccessors(p, False, s, p->MinContext);
+ if (cs == NULL)
+ {
+ RESTORE_MODEL(c, 0);
+ return;
+ }
+ fSuccessor = REF(cs);
+ }
+
+ if (--p->OrderFall == 0)
+ {
+ successor = fSuccessor;
+ p->Text -= (p->MaxContext != p->MinContext);
+ }
+ #ifdef PPMD8_FREEZE_SUPPORT
+ else if (p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE)
+ {
+ successor = fSuccessor;
+ RESET_TEXT(0);
+ p->OrderFall = 0;
+ }
+ #endif
+
+ s0 = p->MinContext->SummFreq - (ns = p->MinContext->NumStats) - fFreq;
+ flag = 0x08 * (fSymbol >= 0x40);
+
+ for (; c != p->MinContext; c = SUFFIX(c))
+ {
+ unsigned ns1;
+ UInt32 cf, sf;
+ if ((ns1 = c->NumStats) != 0)
+ {
+ if ((ns1 & 1) != 0)
+ {
+ /* Expand for one UNIT */
+ unsigned oldNU = (ns1 + 1) >> 1;
+ unsigned i = U2I(oldNU);
+ if (i != U2I(oldNU + 1))
+ {
+ void *ptr = AllocUnits(p, i + 1);
+ void *oldPtr;
+ if (!ptr)
+ {
+ RESTORE_MODEL(c, CTX(fSuccessor));
+ return;
+ }
+ oldPtr = STATS(c);
+ MyMem12Cpy(ptr, oldPtr, oldNU);
+ InsertNode(p, oldPtr, i);
+ c->Stats = STATS_REF(ptr);
+ }
+ }
+ c->SummFreq = (UInt16)(c->SummFreq + (3 * ns1 + 1 < ns));
+ }
+ else
+ {
+ CPpmd_State *s = (CPpmd_State*)AllocUnits(p, 0);
+ if (!s)
+ {
+ RESTORE_MODEL(c, CTX(fSuccessor));
+ return;
+ }
+ *s = *ONE_STATE(c);
+ c->Stats = REF(s);
+ if (s->Freq < MAX_FREQ / 4 - 1)
+ s->Freq <<= 1;
+ else
+ s->Freq = MAX_FREQ - 4;
+ c->SummFreq = (UInt16)(s->Freq + p->InitEsc + (ns > 2));
+ }
+ cf = 2 * fFreq * (c->SummFreq + 6);
+ sf = (UInt32)s0 + c->SummFreq;
+ if (cf < 6 * sf)
+ {
+ cf = 1 + (cf > sf) + (cf >= 4 * sf);
+ c->SummFreq += 4;
+ }
+ else
+ {
+ cf = 4 + (cf > 9 * sf) + (cf > 12 * sf) + (cf > 15 * sf);
+ c->SummFreq = (UInt16)(c->SummFreq + cf);
+ }
+ {
+ CPpmd_State *s = STATS(c) + ns1 + 1;
+ SetSuccessor(s, successor);
+ s->Symbol = fSymbol;
+ s->Freq = (Byte)cf;
+ c->Flags |= flag;
+ c->NumStats = (Byte)(ns1 + 1);
+ }
+ }
+ p->MaxContext = p->MinContext = CTX(fSuccessor);
}
static void Rescale(CPpmd8 *p)
{
- unsigned i, adder, sumFreq, escFreq;
- CPpmd_State *stats = STATS(p->MinContext);
- CPpmd_State *s = p->FoundState;
- {
- CPpmd_State tmp = *s;
- for (; s != stats; s--)
- s[0] = s[-1];
- *s = tmp;
- }
- escFreq = p->MinContext->SummFreq - s->Freq;
- s->Freq += 4;
- adder = (p->OrderFall != 0
- #ifdef PPMD8_FREEZE_SUPPORT
- || p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE
- #endif
- );
- s->Freq = (Byte)((s->Freq + adder) >> 1);
- sumFreq = s->Freq;
-
- i = p->MinContext->NumStats;
- do
- {
- escFreq -= (++s)->Freq;
- s->Freq = (Byte)((s->Freq + adder) >> 1);
- sumFreq += s->Freq;
- if (s[0].Freq > s[-1].Freq)
- {
- CPpmd_State *s1 = s;
- CPpmd_State tmp = *s1;
- do
- s1[0] = s1[-1];
- while (--s1 != stats && tmp.Freq > s1[-1].Freq);
- *s1 = tmp;
- }
- }
- while (--i);
-
- if (s->Freq == 0)
- {
- unsigned numStats = p->MinContext->NumStats;
- unsigned n0, n1;
- do { i++; } while ((--s)->Freq == 0);
- escFreq += i;
- p->MinContext->NumStats = (Byte)(p->MinContext->NumStats - i);
- if (p->MinContext->NumStats == 0)
- {
- CPpmd_State tmp = *stats;
- tmp.Freq = (Byte)((2 * tmp.Freq + escFreq - 1) / escFreq);
- if (tmp.Freq > MAX_FREQ / 3)
- tmp.Freq = MAX_FREQ / 3;
- InsertNode(p, stats, U2I((numStats + 2) >> 1));
- p->MinContext->Flags = (p->MinContext->Flags & 0x10) + 0x08 * (tmp.Symbol >= 0x40);
- *(p->FoundState = ONE_STATE(p->MinContext)) = tmp;
- return;
- }
- n0 = (numStats + 2) >> 1;
- n1 = (p->MinContext->NumStats + 2) >> 1;
- if (n0 != n1)
- p->MinContext->Stats = STATS_REF(ShrinkUnits(p, stats, n0, n1));
- p->MinContext->Flags &= ~0x08;
- p->MinContext->Flags |= 0x08 * ((s = STATS(p->MinContext))->Symbol >= 0x40);
- i = p->MinContext->NumStats;
- do { p->MinContext->Flags |= 0x08*((++s)->Symbol >= 0x40); } while (--i);
- }
- p->MinContext->SummFreq = (UInt16)(sumFreq + escFreq - (escFreq >> 1));
- p->MinContext->Flags |= 0x4;
- p->FoundState = STATS(p->MinContext);
+ unsigned i, adder, sumFreq, escFreq;
+ CPpmd_State *stats = STATS(p->MinContext);
+ CPpmd_State *s = p->FoundState;
+ {
+ CPpmd_State tmp = *s;
+ for (; s != stats; s--)
+ s[0] = s[-1];
+ *s = tmp;
+ }
+ escFreq = p->MinContext->SummFreq - s->Freq;
+ s->Freq += 4;
+ adder = (p->OrderFall != 0
+ #ifdef PPMD8_FREEZE_SUPPORT
+ || p->RestoreMethod > PPMD8_RESTORE_METHOD_FREEZE
+ #endif
+ );
+ s->Freq = (Byte)((s->Freq + adder) >> 1);
+ sumFreq = s->Freq;
+
+ i = p->MinContext->NumStats;
+ do
+ {
+ escFreq -= (++s)->Freq;
+ s->Freq = (Byte)((s->Freq + adder) >> 1);
+ sumFreq += s->Freq;
+ if (s[0].Freq > s[-1].Freq)
+ {
+ CPpmd_State *s1 = s;
+ CPpmd_State tmp = *s1;
+ do
+ s1[0] = s1[-1];
+ while (--s1 != stats && tmp.Freq > s1[-1].Freq);
+ *s1 = tmp;
+ }
+ }
+ while (--i);
+
+ if (s->Freq == 0)
+ {
+ unsigned numStats = p->MinContext->NumStats;
+ unsigned n0, n1;
+ do { i++; } while ((--s)->Freq == 0);
+ escFreq += i;
+ p->MinContext->NumStats = (Byte)(p->MinContext->NumStats - i);
+ if (p->MinContext->NumStats == 0)
+ {
+ CPpmd_State tmp = *stats;
+ tmp.Freq = (Byte)((2 * tmp.Freq + escFreq - 1) / escFreq);
+ if (tmp.Freq > MAX_FREQ / 3)
+ tmp.Freq = MAX_FREQ / 3;
+ InsertNode(p, stats, U2I((numStats + 2) >> 1));
+ p->MinContext->Flags = (p->MinContext->Flags & 0x10) + 0x08 * (tmp.Symbol >= 0x40);
+ *(p->FoundState = ONE_STATE(p->MinContext)) = tmp;
+ return;
+ }
+ n0 = (numStats + 2) >> 1;
+ n1 = (p->MinContext->NumStats + 2) >> 1;
+ if (n0 != n1)
+ p->MinContext->Stats = STATS_REF(ShrinkUnits(p, stats, n0, n1));
+ p->MinContext->Flags &= ~0x08;
+ p->MinContext->Flags |= 0x08 * ((s = STATS(p->MinContext))->Symbol >= 0x40);
+ i = p->MinContext->NumStats;
+ do { p->MinContext->Flags |= 0x08*((++s)->Symbol >= 0x40); } while (--i);
+ }
+ p->MinContext->SummFreq = (UInt16)(sumFreq + escFreq - (escFreq >> 1));
+ p->MinContext->Flags |= 0x4;
+ p->FoundState = STATS(p->MinContext);
}
CPpmd_See *Ppmd8_MakeEscFreq(CPpmd8 *p, unsigned numMasked1, UInt32 *escFreq)
{
- CPpmd_See *see;
- if (p->MinContext->NumStats != 0xFF)
- {
- see = p->See[p->NS2Indx[p->MinContext->NumStats + 2] - 3] +
- (p->MinContext->SummFreq > 11 * ((unsigned)p->MinContext->NumStats + 1)) +
- 2 * (2 * (unsigned)p->MinContext->NumStats <
- ((unsigned)SUFFIX(p->MinContext)->NumStats + numMasked1)) +
- p->MinContext->Flags;
- {
- unsigned r = (see->Summ >> see->Shift);
- see->Summ = (UInt16)(see->Summ - r);
- *escFreq = r + (r == 0);
- }
- }
- else
- {
- see = &p->DummySee;
- *escFreq = 1;
- }
- return see;
+ CPpmd_See *see;
+ if (p->MinContext->NumStats != 0xFF)
+ {
+ see = p->See[p->NS2Indx[p->MinContext->NumStats + 2] - 3] +
+ (p->MinContext->SummFreq > 11 * ((unsigned)p->MinContext->NumStats + 1)) +
+ 2 * (2 * (unsigned)p->MinContext->NumStats <
+ ((unsigned)SUFFIX(p->MinContext)->NumStats + numMasked1)) +
+ p->MinContext->Flags;
+ {
+ unsigned r = (see->Summ >> see->Shift);
+ see->Summ = (UInt16)(see->Summ - r);
+ *escFreq = r + (r == 0);
+ }
+ }
+ else
+ {
+ see = &p->DummySee;
+ *escFreq = 1;
+ }
+ return see;
}
static void NextContext(CPpmd8 *p)
{
- CTX_PTR c = CTX(SUCCESSOR(p->FoundState));
- if (p->OrderFall == 0 && (Byte *)c >= p->UnitsStart)
- p->MinContext = p->MaxContext = c;
- else
- {
- UpdateModel(p);
- p->MinContext = p->MaxContext;
- }
+ CTX_PTR c = CTX(SUCCESSOR(p->FoundState));
+ if (p->OrderFall == 0 && (Byte *)c >= p->UnitsStart)
+ p->MinContext = p->MaxContext = c;
+ else
+ {
+ UpdateModel(p);
+ p->MinContext = p->MaxContext;
+ }
}
void Ppmd8_Update1(CPpmd8 *p)
{
- CPpmd_State *s = p->FoundState;
- s->Freq += 4;
- p->MinContext->SummFreq += 4;
- if (s[0].Freq > s[-1].Freq)
- {
- SwapStates(&s[0], &s[-1]);
- p->FoundState = --s;
- if (s->Freq > MAX_FREQ)
- Rescale(p);
- }
- NextContext(p);
+ CPpmd_State *s = p->FoundState;
+ s->Freq += 4;
+ p->MinContext->SummFreq += 4;
+ if (s[0].Freq > s[-1].Freq)
+ {
+ SwapStates(&s[0], &s[-1]);
+ p->FoundState = --s;
+ if (s->Freq > MAX_FREQ)
+ Rescale(p);
+ }
+ NextContext(p);
}
void Ppmd8_Update1_0(CPpmd8 *p)
{
- p->PrevSuccess = (2 * p->FoundState->Freq >= p->MinContext->SummFreq);
- p->RunLength += p->PrevSuccess;
- p->MinContext->SummFreq += 4;
- if ((p->FoundState->Freq += 4) > MAX_FREQ)
- Rescale(p);
- NextContext(p);
+ p->PrevSuccess = (2 * p->FoundState->Freq >= p->MinContext->SummFreq);
+ p->RunLength += p->PrevSuccess;
+ p->MinContext->SummFreq += 4;
+ if ((p->FoundState->Freq += 4) > MAX_FREQ)
+ Rescale(p);
+ NextContext(p);
}
void Ppmd8_UpdateBin(CPpmd8 *p)
{
- p->FoundState->Freq = (Byte)(p->FoundState->Freq + (p->FoundState->Freq < 196));
- p->PrevSuccess = 1;
- p->RunLength++;
- NextContext(p);
+ p->FoundState->Freq = (Byte)(p->FoundState->Freq + (p->FoundState->Freq < 196));
+ p->PrevSuccess = 1;
+ p->RunLength++;
+ NextContext(p);
}
void Ppmd8_Update2(CPpmd8 *p)
{
- p->MinContext->SummFreq += 4;
- if ((p->FoundState->Freq += 4) > MAX_FREQ)
- Rescale(p);
- p->RunLength = p->InitRL;
- UpdateModel(p);
- p->MinContext = p->MaxContext;
+ p->MinContext->SummFreq += 4;
+ if ((p->FoundState->Freq += 4) > MAX_FREQ)
+ Rescale(p);
+ p->RunLength = p->InitRL;
+ UpdateModel(p);
+ p->MinContext = p->MaxContext;
}
/* H->I changes:
diff --git a/src/lib/lib7z/Ppmd8.h b/src/lib/lib7z/Ppmd8.h
index 813254cd462..5c3613fd8b9 100644
--- a/src/lib/lib7z/Ppmd8.h
+++ b/src/lib/lib7z/Ppmd8.h
@@ -17,22 +17,22 @@ EXTERN_C_BEGIN
struct CPpmd8_Context_;
typedef
- #ifdef PPMD_32BIT
- struct CPpmd8_Context_ *
- #else
- UInt32
- #endif
- CPpmd8_Context_Ref;
+ #ifdef PPMD_32BIT
+ struct CPpmd8_Context_ *
+ #else
+ UInt32
+ #endif
+ CPpmd8_Context_Ref;
#pragma pack(push, 1)
typedef struct CPpmd8_Context_
{
- Byte NumStats;
- Byte Flags;
- UInt16 SummFreq;
- CPpmd_State_Ref Stats;
- CPpmd8_Context_Ref Suffix;
+ Byte NumStats;
+ Byte Flags;
+ UInt16 SummFreq;
+ CPpmd_State_Ref Stats;
+ CPpmd8_Context_Ref Suffix;
} CPpmd8_Context;
#pragma pack(pop)
@@ -45,44 +45,44 @@ typedef struct CPpmd8_Context_
enum
{
- PPMD8_RESTORE_METHOD_RESTART,
- PPMD8_RESTORE_METHOD_CUT_OFF
- #ifdef PPMD8_FREEZE_SUPPORT
- , PPMD8_RESTORE_METHOD_FREEZE
- #endif
+ PPMD8_RESTORE_METHOD_RESTART,
+ PPMD8_RESTORE_METHOD_CUT_OFF
+ #ifdef PPMD8_FREEZE_SUPPORT
+ , PPMD8_RESTORE_METHOD_FREEZE
+ #endif
};
typedef struct
{
- CPpmd8_Context *MinContext, *MaxContext;
- CPpmd_State *FoundState;
- unsigned OrderFall, InitEsc, PrevSuccess, MaxOrder;
- Int32 RunLength, InitRL; /* must be 32-bit at least */
-
- UInt32 Size;
- UInt32 GlueCount;
- Byte *Base, *LoUnit, *HiUnit, *Text, *UnitsStart;
- UInt32 AlignOffset;
- unsigned RestoreMethod;
-
- /* Range Coder */
- UInt32 Range;
- UInt32 Code;
- UInt32 Low;
- union
- {
- IByteIn *In;
- IByteOut *Out;
- } Stream;
-
- Byte Indx2Units[PPMD_NUM_INDEXES];
- Byte Units2Indx[128];
- CPpmd_Void_Ref FreeList[PPMD_NUM_INDEXES];
- UInt32 Stamps[PPMD_NUM_INDEXES];
-
- Byte NS2BSIndx[256], NS2Indx[260];
- CPpmd_See DummySee, See[24][32];
- UInt16 BinSumm[25][64];
+ CPpmd8_Context *MinContext, *MaxContext;
+ CPpmd_State *FoundState;
+ unsigned OrderFall, InitEsc, PrevSuccess, MaxOrder;
+ Int32 RunLength, InitRL; /* must be 32-bit at least */
+
+ UInt32 Size;
+ UInt32 GlueCount;
+ Byte *Base, *LoUnit, *HiUnit, *Text, *UnitsStart;
+ UInt32 AlignOffset;
+ unsigned RestoreMethod;
+
+ /* Range Coder */
+ UInt32 Range;
+ UInt32 Code;
+ UInt32 Low;
+ union
+ {
+ IByteIn *In;
+ IByteOut *Out;
+ } Stream;
+
+ Byte Indx2Units[PPMD_NUM_INDEXES];
+ Byte Units2Indx[128];
+ CPpmd_Void_Ref FreeList[PPMD_NUM_INDEXES];
+ UInt32 Stamps[PPMD_NUM_INDEXES];
+
+ Byte NS2BSIndx[256], NS2Indx[260];
+ CPpmd_See DummySee, See[24][32];
+ UInt16 BinSumm[25][64];
} CPpmd8;
void Ppmd8_Construct(CPpmd8 *p);
@@ -97,13 +97,13 @@ void Ppmd8_Init(CPpmd8 *p, unsigned maxOrder, unsigned restoreMethod);
extern const Byte PPMD8_kExpEscape[16];
#ifdef PPMD_32BIT
- #define Ppmd8_GetPtr(p, ptr) (ptr)
- #define Ppmd8_GetContext(p, ptr) (ptr)
- #define Ppmd8_GetStats(p, ctx) ((ctx)->Stats)
+ #define Ppmd8_GetPtr(p, ptr) (ptr)
+ #define Ppmd8_GetContext(p, ptr) (ptr)
+ #define Ppmd8_GetStats(p, ctx) ((ctx)->Stats)
#else
- #define Ppmd8_GetPtr(p, offs) ((void *)((p)->Base + (offs)))
- #define Ppmd8_GetContext(p, offs) ((CPpmd8_Context *)Ppmd8_GetPtr((p), (offs)))
- #define Ppmd8_GetStats(p, ctx) ((CPpmd_State *)Ppmd8_GetPtr((p), ((ctx)->Stats)))
+ #define Ppmd8_GetPtr(p, offs) ((void *)((p)->Base + (offs)))
+ #define Ppmd8_GetContext(p, offs) ((CPpmd8_Context *)Ppmd8_GetPtr((p), (offs)))
+ #define Ppmd8_GetStats(p, ctx) ((CPpmd_State *)Ppmd8_GetPtr((p), ((ctx)->Stats)))
#endif
void Ppmd8_Update1(CPpmd8 *p);
@@ -112,9 +112,9 @@ void Ppmd8_Update2(CPpmd8 *p);
void Ppmd8_UpdateBin(CPpmd8 *p);
#define Ppmd8_GetBinSumm(p) \
- &p->BinSumm[p->NS2Indx[Ppmd8Context_OneState(p->MinContext)->Freq - 1]][ \
- p->NS2BSIndx[Ppmd8_GetContext(p, p->MinContext->Suffix)->NumStats] + \
- p->PrevSuccess + p->MinContext->Flags + ((p->RunLength >> 26) & 0x20)]
+ &p->BinSumm[p->NS2Indx[Ppmd8Context_OneState(p->MinContext)->Freq - 1]][ \
+ p->NS2BSIndx[Ppmd8_GetContext(p, p->MinContext->Suffix)->NumStats] + \
+ p->PrevSuccess + p->MinContext->Flags + ((p->RunLength >> 26) & 0x20)]
CPpmd_See *Ppmd8_MakeEscFreq(CPpmd8 *p, unsigned numMasked, UInt32 *scale);
diff --git a/src/lib/lib7z/Ppmd8Dec.c b/src/lib/lib7z/Ppmd8Dec.c
index 12fd7ec0d79..7c9fcc095b0 100644
--- a/src/lib/lib7z/Ppmd8Dec.c
+++ b/src/lib/lib7z/Ppmd8Dec.c
@@ -11,145 +11,145 @@ This code is based on:
Bool Ppmd8_RangeDec_Init(CPpmd8 *p)
{
- unsigned i;
- p->Low = 0;
- p->Range = 0xFFFFFFFF;
- p->Code = 0;
- for (i = 0; i < 4; i++)
- p->Code = (p->Code << 8) | p->Stream.In->Read(p->Stream.In);
- return (p->Code < 0xFFFFFFFF);
+ unsigned i;
+ p->Low = 0;
+ p->Range = 0xFFFFFFFF;
+ p->Code = 0;
+ for (i = 0; i < 4; i++)
+ p->Code = (p->Code << 8) | p->Stream.In->Read(p->Stream.In);
+ return (p->Code < 0xFFFFFFFF);
}
static UInt32 RangeDec_GetThreshold(CPpmd8 *p, UInt32 total)
{
- return p->Code / (p->Range /= total);
+ return p->Code / (p->Range /= total);
}
static void RangeDec_Decode(CPpmd8 *p, UInt32 start, UInt32 size)
{
- start *= p->Range;
- p->Low += start;
- p->Code -= start;
- p->Range *= size;
+ start *= p->Range;
+ p->Low += start;
+ p->Code -= start;
+ p->Range *= size;
- while ((p->Low ^ (p->Low + p->Range)) < kTop ||
- (p->Range < kBot && ((p->Range = (0 - p->Low) & (kBot - 1)), 1)))
- {
- p->Code = (p->Code << 8) | p->Stream.In->Read(p->Stream.In);
- p->Range <<= 8;
- p->Low <<= 8;
- }
+ while ((p->Low ^ (p->Low + p->Range)) < kTop ||
+ (p->Range < kBot && ((p->Range = (0 - p->Low) & (kBot - 1)), 1)))
+ {
+ p->Code = (p->Code << 8) | p->Stream.In->Read(p->Stream.In);
+ p->Range <<= 8;
+ p->Low <<= 8;
+ }
}
#define MASK(sym) ((signed char *)charMask)[sym]
int Ppmd8_DecodeSymbol(CPpmd8 *p)
{
- size_t charMask[256 / sizeof(size_t)];
- if (p->MinContext->NumStats != 0)
- {
- CPpmd_State *s = Ppmd8_GetStats(p, p->MinContext);
- unsigned i;
- UInt32 count, hiCnt;
- if ((count = RangeDec_GetThreshold(p, p->MinContext->SummFreq)) < (hiCnt = s->Freq))
- {
- Byte symbol;
- RangeDec_Decode(p, 0, s->Freq);
- p->FoundState = s;
- symbol = s->Symbol;
- Ppmd8_Update1_0(p);
- return symbol;
- }
- p->PrevSuccess = 0;
- i = p->MinContext->NumStats;
- do
- {
- if ((hiCnt += (++s)->Freq) > count)
- {
- Byte symbol;
- RangeDec_Decode(p, hiCnt - s->Freq, s->Freq);
- p->FoundState = s;
- symbol = s->Symbol;
- Ppmd8_Update1(p);
- return symbol;
- }
- }
- while (--i);
- if (count >= p->MinContext->SummFreq)
- return -2;
- RangeDec_Decode(p, hiCnt, p->MinContext->SummFreq - hiCnt);
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(s->Symbol) = 0;
- i = p->MinContext->NumStats;
- do { MASK((--s)->Symbol) = 0; } while (--i);
- }
- else
- {
- UInt16 *prob = Ppmd8_GetBinSumm(p);
- if (((p->Code / (p->Range >>= 14)) < *prob))
- {
- Byte symbol;
- RangeDec_Decode(p, 0, *prob);
- *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
- symbol = (p->FoundState = Ppmd8Context_OneState(p->MinContext))->Symbol;
- Ppmd8_UpdateBin(p);
- return symbol;
- }
- RangeDec_Decode(p, *prob, (1 << 14) - *prob);
- *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
- p->InitEsc = PPMD8_kExpEscape[*prob >> 10];
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(Ppmd8Context_OneState(p->MinContext)->Symbol) = 0;
- p->PrevSuccess = 0;
- }
- for (;;)
- {
- CPpmd_State *ps[256], *s;
- UInt32 freqSum, count, hiCnt;
- CPpmd_See *see;
- unsigned i, num, numMasked = p->MinContext->NumStats;
- do
- {
- p->OrderFall++;
- if (!p->MinContext->Suffix)
- return -1;
- p->MinContext = Ppmd8_GetContext(p, p->MinContext->Suffix);
- }
- while (p->MinContext->NumStats == numMasked);
- hiCnt = 0;
- s = Ppmd8_GetStats(p, p->MinContext);
- i = 0;
- num = p->MinContext->NumStats - numMasked;
- do
- {
- int k = (int)(MASK(s->Symbol));
- hiCnt += (s->Freq & k);
- ps[i] = s++;
- i -= k;
- }
- while (i != num);
+ size_t charMask[256 / sizeof(size_t)];
+ if (p->MinContext->NumStats != 0)
+ {
+ CPpmd_State *s = Ppmd8_GetStats(p, p->MinContext);
+ unsigned i;
+ UInt32 count, hiCnt;
+ if ((count = RangeDec_GetThreshold(p, p->MinContext->SummFreq)) < (hiCnt = s->Freq))
+ {
+ Byte symbol;
+ RangeDec_Decode(p, 0, s->Freq);
+ p->FoundState = s;
+ symbol = s->Symbol;
+ Ppmd8_Update1_0(p);
+ return symbol;
+ }
+ p->PrevSuccess = 0;
+ i = p->MinContext->NumStats;
+ do
+ {
+ if ((hiCnt += (++s)->Freq) > count)
+ {
+ Byte symbol;
+ RangeDec_Decode(p, hiCnt - s->Freq, s->Freq);
+ p->FoundState = s;
+ symbol = s->Symbol;
+ Ppmd8_Update1(p);
+ return symbol;
+ }
+ }
+ while (--i);
+ if (count >= p->MinContext->SummFreq)
+ return -2;
+ RangeDec_Decode(p, hiCnt, p->MinContext->SummFreq - hiCnt);
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(s->Symbol) = 0;
+ i = p->MinContext->NumStats;
+ do { MASK((--s)->Symbol) = 0; } while (--i);
+ }
+ else
+ {
+ UInt16 *prob = Ppmd8_GetBinSumm(p);
+ if (((p->Code / (p->Range >>= 14)) < *prob))
+ {
+ Byte symbol;
+ RangeDec_Decode(p, 0, *prob);
+ *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
+ symbol = (p->FoundState = Ppmd8Context_OneState(p->MinContext))->Symbol;
+ Ppmd8_UpdateBin(p);
+ return symbol;
+ }
+ RangeDec_Decode(p, *prob, (1 << 14) - *prob);
+ *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
+ p->InitEsc = PPMD8_kExpEscape[*prob >> 10];
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(Ppmd8Context_OneState(p->MinContext)->Symbol) = 0;
+ p->PrevSuccess = 0;
+ }
+ for (;;)
+ {
+ CPpmd_State *ps[256], *s;
+ UInt32 freqSum, count, hiCnt;
+ CPpmd_See *see;
+ unsigned i, num, numMasked = p->MinContext->NumStats;
+ do
+ {
+ p->OrderFall++;
+ if (!p->MinContext->Suffix)
+ return -1;
+ p->MinContext = Ppmd8_GetContext(p, p->MinContext->Suffix);
+ }
+ while (p->MinContext->NumStats == numMasked);
+ hiCnt = 0;
+ s = Ppmd8_GetStats(p, p->MinContext);
+ i = 0;
+ num = p->MinContext->NumStats - numMasked;
+ do
+ {
+ int k = (int)(MASK(s->Symbol));
+ hiCnt += (s->Freq & k);
+ ps[i] = s++;
+ i -= k;
+ }
+ while (i != num);
- see = Ppmd8_MakeEscFreq(p, numMasked, &freqSum);
- freqSum += hiCnt;
- count = RangeDec_GetThreshold(p, freqSum);
+ see = Ppmd8_MakeEscFreq(p, numMasked, &freqSum);
+ freqSum += hiCnt;
+ count = RangeDec_GetThreshold(p, freqSum);
- if (count < hiCnt)
- {
- Byte symbol;
- CPpmd_State **pps = ps;
- for (hiCnt = 0; (hiCnt += (*pps)->Freq) <= count; pps++);
- s = *pps;
- RangeDec_Decode(p, hiCnt - s->Freq, s->Freq);
- Ppmd_See_Update(see);
- p->FoundState = s;
- symbol = s->Symbol;
- Ppmd8_Update2(p);
- return symbol;
- }
- if (count >= freqSum)
- return -2;
- RangeDec_Decode(p, hiCnt, freqSum - hiCnt);
- see->Summ = (UInt16)(see->Summ + freqSum);
- do { MASK(ps[--i]->Symbol) = 0; } while (i != 0);
- }
+ if (count < hiCnt)
+ {
+ Byte symbol;
+ CPpmd_State **pps = ps;
+ for (hiCnt = 0; (hiCnt += (*pps)->Freq) <= count; pps++);
+ s = *pps;
+ RangeDec_Decode(p, hiCnt - s->Freq, s->Freq);
+ Ppmd_See_Update(see);
+ p->FoundState = s;
+ symbol = s->Symbol;
+ Ppmd8_Update2(p);
+ return symbol;
+ }
+ if (count >= freqSum)
+ return -2;
+ RangeDec_Decode(p, hiCnt, freqSum - hiCnt);
+ see->Summ = (UInt16)(see->Summ + freqSum);
+ do { MASK(ps[--i]->Symbol) = 0; } while (i != 0);
+ }
}
diff --git a/src/lib/lib7z/Ppmd8Enc.c b/src/lib/lib7z/Ppmd8Enc.c
index f433fe9ee0a..87a3e344495 100644
--- a/src/lib/lib7z/Ppmd8Enc.c
+++ b/src/lib/lib7z/Ppmd8Enc.c
@@ -11,41 +11,41 @@ This code is based on:
void Ppmd8_RangeEnc_FlushData(CPpmd8 *p)
{
- unsigned i;
- for (i = 0; i < 4; i++, p->Low <<= 8 )
- p->Stream.Out->Write(p->Stream.Out, (Byte)(p->Low >> 24));
+ unsigned i;
+ for (i = 0; i < 4; i++, p->Low <<= 8 )
+ p->Stream.Out->Write(p->Stream.Out, (Byte)(p->Low >> 24));
}
static void RangeEnc_Normalize(CPpmd8 *p)
{
- while ((p->Low ^ (p->Low + p->Range)) < kTop ||
- (p->Range < kBot && ((p->Range = (0 - p->Low) & (kBot - 1)), 1)))
- {
- p->Stream.Out->Write(p->Stream.Out, (Byte)(p->Low >> 24));
- p->Range <<= 8;
- p->Low <<= 8;
- }
+ while ((p->Low ^ (p->Low + p->Range)) < kTop ||
+ (p->Range < kBot && ((p->Range = (0 - p->Low) & (kBot - 1)), 1)))
+ {
+ p->Stream.Out->Write(p->Stream.Out, (Byte)(p->Low >> 24));
+ p->Range <<= 8;
+ p->Low <<= 8;
+ }
}
static void RangeEnc_Encode(CPpmd8 *p, UInt32 start, UInt32 size, UInt32 total)
{
- p->Low += start * (p->Range /= total);
- p->Range *= size;
- RangeEnc_Normalize(p);
+ p->Low += start * (p->Range /= total);
+ p->Range *= size;
+ RangeEnc_Normalize(p);
}
static void RangeEnc_EncodeBit_0(CPpmd8 *p, UInt32 size0)
{
- p->Range >>= 14;
- p->Range *= size0;
- RangeEnc_Normalize(p);
+ p->Range >>= 14;
+ p->Range *= size0;
+ RangeEnc_Normalize(p);
}
static void RangeEnc_EncodeBit_1(CPpmd8 *p, UInt32 size0)
{
- p->Low += size0 * (p->Range >>= 14);
- p->Range *= ((1 << 14) - size0);
- RangeEnc_Normalize(p);
+ p->Low += size0 * (p->Range >>= 14);
+ p->Range *= ((1 << 14) - size0);
+ RangeEnc_Normalize(p);
}
@@ -53,109 +53,109 @@ static void RangeEnc_EncodeBit_1(CPpmd8 *p, UInt32 size0)
void Ppmd8_EncodeSymbol(CPpmd8 *p, int symbol)
{
- size_t charMask[256 / sizeof(size_t)];
- if (p->MinContext->NumStats != 0)
- {
- CPpmd_State *s = Ppmd8_GetStats(p, p->MinContext);
- UInt32 sum;
- unsigned i;
- if (s->Symbol == symbol)
- {
- RangeEnc_Encode(p, 0, s->Freq, p->MinContext->SummFreq);
- p->FoundState = s;
- Ppmd8_Update1_0(p);
- return;
- }
- p->PrevSuccess = 0;
- sum = s->Freq;
- i = p->MinContext->NumStats;
- do
- {
- if ((++s)->Symbol == symbol)
- {
- RangeEnc_Encode(p, sum, s->Freq, p->MinContext->SummFreq);
- p->FoundState = s;
- Ppmd8_Update1(p);
- return;
- }
- sum += s->Freq;
- }
- while (--i);
+ size_t charMask[256 / sizeof(size_t)];
+ if (p->MinContext->NumStats != 0)
+ {
+ CPpmd_State *s = Ppmd8_GetStats(p, p->MinContext);
+ UInt32 sum;
+ unsigned i;
+ if (s->Symbol == symbol)
+ {
+ RangeEnc_Encode(p, 0, s->Freq, p->MinContext->SummFreq);
+ p->FoundState = s;
+ Ppmd8_Update1_0(p);
+ return;
+ }
+ p->PrevSuccess = 0;
+ sum = s->Freq;
+ i = p->MinContext->NumStats;
+ do
+ {
+ if ((++s)->Symbol == symbol)
+ {
+ RangeEnc_Encode(p, sum, s->Freq, p->MinContext->SummFreq);
+ p->FoundState = s;
+ Ppmd8_Update1(p);
+ return;
+ }
+ sum += s->Freq;
+ }
+ while (--i);
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(s->Symbol) = 0;
- i = p->MinContext->NumStats;
- do { MASK((--s)->Symbol) = 0; } while (--i);
- RangeEnc_Encode(p, sum, p->MinContext->SummFreq - sum, p->MinContext->SummFreq);
- }
- else
- {
- UInt16 *prob = Ppmd8_GetBinSumm(p);
- CPpmd_State *s = Ppmd8Context_OneState(p->MinContext);
- if (s->Symbol == symbol)
- {
- RangeEnc_EncodeBit_0(p, *prob);
- *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
- p->FoundState = s;
- Ppmd8_UpdateBin(p);
- return;
- }
- else
- {
- RangeEnc_EncodeBit_1(p, *prob);
- *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
- p->InitEsc = PPMD8_kExpEscape[*prob >> 10];
- PPMD_SetAllBitsIn256Bytes(charMask);
- MASK(s->Symbol) = 0;
- p->PrevSuccess = 0;
- }
- }
- for (;;)
- {
- UInt32 escFreq;
- CPpmd_See *see;
- CPpmd_State *s;
- UInt32 sum;
- unsigned i, numMasked = p->MinContext->NumStats;
- do
- {
- p->OrderFall++;
- if (!p->MinContext->Suffix)
- return; /* EndMarker (symbol = -1) */
- p->MinContext = Ppmd8_GetContext(p, p->MinContext->Suffix);
- }
- while (p->MinContext->NumStats == numMasked);
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(s->Symbol) = 0;
+ i = p->MinContext->NumStats;
+ do { MASK((--s)->Symbol) = 0; } while (--i);
+ RangeEnc_Encode(p, sum, p->MinContext->SummFreq - sum, p->MinContext->SummFreq);
+ }
+ else
+ {
+ UInt16 *prob = Ppmd8_GetBinSumm(p);
+ CPpmd_State *s = Ppmd8Context_OneState(p->MinContext);
+ if (s->Symbol == symbol)
+ {
+ RangeEnc_EncodeBit_0(p, *prob);
+ *prob = (UInt16)PPMD_UPDATE_PROB_0(*prob);
+ p->FoundState = s;
+ Ppmd8_UpdateBin(p);
+ return;
+ }
+ else
+ {
+ RangeEnc_EncodeBit_1(p, *prob);
+ *prob = (UInt16)PPMD_UPDATE_PROB_1(*prob);
+ p->InitEsc = PPMD8_kExpEscape[*prob >> 10];
+ PPMD_SetAllBitsIn256Bytes(charMask);
+ MASK(s->Symbol) = 0;
+ p->PrevSuccess = 0;
+ }
+ }
+ for (;;)
+ {
+ UInt32 escFreq;
+ CPpmd_See *see;
+ CPpmd_State *s;
+ UInt32 sum;
+ unsigned i, numMasked = p->MinContext->NumStats;
+ do
+ {
+ p->OrderFall++;
+ if (!p->MinContext->Suffix)
+ return; /* EndMarker (symbol = -1) */
+ p->MinContext = Ppmd8_GetContext(p, p->MinContext->Suffix);
+ }
+ while (p->MinContext->NumStats == numMasked);
- see = Ppmd8_MakeEscFreq(p, numMasked, &escFreq);
- s = Ppmd8_GetStats(p, p->MinContext);
- sum = 0;
- i = p->MinContext->NumStats + 1;
- do
- {
- int cur = s->Symbol;
- if (cur == symbol)
- {
- UInt32 low = sum;
- CPpmd_State *s1 = s;
- do
- {
- sum += (s->Freq & (int)(MASK(s->Symbol)));
- s++;
- }
- while (--i);
- RangeEnc_Encode(p, low, s1->Freq, sum + escFreq);
- Ppmd_See_Update(see);
- p->FoundState = s1;
- Ppmd8_Update2(p);
- return;
- }
- sum += (s->Freq & (int)(MASK(cur)));
- MASK(cur) = 0;
- s++;
- }
- while (--i);
+ see = Ppmd8_MakeEscFreq(p, numMasked, &escFreq);
+ s = Ppmd8_GetStats(p, p->MinContext);
+ sum = 0;
+ i = p->MinContext->NumStats + 1;
+ do
+ {
+ int cur = s->Symbol;
+ if (cur == symbol)
+ {
+ UInt32 low = sum;
+ CPpmd_State *s1 = s;
+ do
+ {
+ sum += (s->Freq & (int)(MASK(s->Symbol)));
+ s++;
+ }
+ while (--i);
+ RangeEnc_Encode(p, low, s1->Freq, sum + escFreq);
+ Ppmd_See_Update(see);
+ p->FoundState = s1;
+ Ppmd8_Update2(p);
+ return;
+ }
+ sum += (s->Freq & (int)(MASK(cur)));
+ MASK(cur) = 0;
+ s++;
+ }
+ while (--i);
- RangeEnc_Encode(p, sum, escFreq, sum + escFreq);
- see->Summ = (UInt16)(see->Summ + sum + escFreq);
- }
+ RangeEnc_Encode(p, sum, escFreq, sum + escFreq);
+ see->Summ = (UInt16)(see->Summ + sum + escFreq);
+ }
}
diff --git a/src/lib/lib7z/Sha256.c b/src/lib/lib7z/Sha256.c
index 8b824744ced..fd330df36cf 100644
--- a/src/lib/lib7z/Sha256.c
+++ b/src/lib/lib7z/Sha256.c
@@ -11,15 +11,15 @@ This code is based on public domain code from Wei Dai's Crypto++ library. */
void Sha256_Init(CSha256 *p)
{
- p->state[0] = 0x6a09e667;
- p->state[1] = 0xbb67ae85;
- p->state[2] = 0x3c6ef372;
- p->state[3] = 0xa54ff53a;
- p->state[4] = 0x510e527f;
- p->state[5] = 0x9b05688c;
- p->state[6] = 0x1f83d9ab;
- p->state[7] = 0x5be0cd19;
- p->count = 0;
+ p->state[0] = 0x6a09e667;
+ p->state[1] = 0xbb67ae85;
+ p->state[2] = 0x3c6ef372;
+ p->state[3] = 0xa54ff53a;
+ p->state[4] = 0x510e527f;
+ p->state[5] = 0x9b05688c;
+ p->state[6] = 0x1f83d9ab;
+ p->state[7] = 0x5be0cd19;
+ p->count = 0;
}
#define S0(x) (rotrFixed(x, 2) ^ rotrFixed(x,13) ^ rotrFixed(x, 22))
@@ -46,22 +46,22 @@ void Sha256_Init(CSha256 *p)
#ifdef _SHA256_UNROLL2
#define R(a,b,c,d,e,f,g,h, i) h += S1(e) + Ch(e,f,g) + K[i+j] + (j?blk2(i):blk0(i));\
- d += h; h += S0(a) + Maj(a, b, c)
+ d += h; h += S0(a) + Maj(a, b, c)
#define RX_8(i) \
- R(a,b,c,d,e,f,g,h, i); \
- R(h,a,b,c,d,e,f,g, i+1); \
- R(g,h,a,b,c,d,e,f, i+2); \
- R(f,g,h,a,b,c,d,e, i+3); \
- R(e,f,g,h,a,b,c,d, i+4); \
- R(d,e,f,g,h,a,b,c, i+5); \
- R(c,d,e,f,g,h,a,b, i+6); \
- R(b,c,d,e,f,g,h,a, i+7)
+ R(a,b,c,d,e,f,g,h, i); \
+ R(h,a,b,c,d,e,f,g, i+1); \
+ R(g,h,a,b,c,d,e,f, i+2); \
+ R(f,g,h,a,b,c,d,e, i+3); \
+ R(e,f,g,h,a,b,c,d, i+4); \
+ R(d,e,f,g,h,a,b,c, i+5); \
+ R(c,d,e,f,g,h,a,b, i+6); \
+ R(b,c,d,e,f,g,h,a, i+7)
#else
#define R(i) h(i) += S1(e(i)) + Ch(e(i),f(i),g(i)) + K[i+j] + (j?blk2(i):blk0(i));\
- d(i) += h(i); h(i) += S0(a(i)) + Maj(a(i), b(i), c(i))
+ d(i) += h(i); h(i) += S0(a(i)) + Maj(a(i), b(i), c(i))
#ifdef _SHA256_UNROLL
@@ -72,71 +72,71 @@ void Sha256_Init(CSha256 *p)
#endif
static const UInt32 K[64] = {
- 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
- 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
- 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
- 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
- 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
- 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
- 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
- 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
- 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
- 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
- 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
- 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
- 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
- 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
- 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
- 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
+ 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
+ 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
+ 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+ 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
+ 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
+ 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+ 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
+ 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
+ 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+ 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
+ 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
+ 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+ 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
+ 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
+ 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+ 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
};
static void Sha256_Transform(UInt32 *state, const UInt32 *data)
{
- UInt32 W[16];
- unsigned j;
- #ifdef _SHA256_UNROLL2
- UInt32 a,b,c,d,e,f,g,h;
- a = state[0];
- b = state[1];
- c = state[2];
- d = state[3];
- e = state[4];
- f = state[5];
- g = state[6];
- h = state[7];
- #else
- UInt32 T[8];
- for (j = 0; j < 8; j++)
- T[j] = state[j];
- #endif
-
- for (j = 0; j < 64; j += 16)
- {
- #if defined(_SHA256_UNROLL) || defined(_SHA256_UNROLL2)
- RX_8(0); RX_8(8);
- #else
- unsigned i;
- for (i = 0; i < 16; i++) { R(i); }
- #endif
- }
-
- #ifdef _SHA256_UNROLL2
- state[0] += a;
- state[1] += b;
- state[2] += c;
- state[3] += d;
- state[4] += e;
- state[5] += f;
- state[6] += g;
- state[7] += h;
- #else
- for (j = 0; j < 8; j++)
- state[j] += T[j];
- #endif
-
- /* Wipe variables */
- /* memset(W, 0, sizeof(W)); */
- /* memset(T, 0, sizeof(T)); */
+ UInt32 W[16];
+ unsigned j;
+ #ifdef _SHA256_UNROLL2
+ UInt32 a,b,c,d,e,f,g,h;
+ a = state[0];
+ b = state[1];
+ c = state[2];
+ d = state[3];
+ e = state[4];
+ f = state[5];
+ g = state[6];
+ h = state[7];
+ #else
+ UInt32 T[8];
+ for (j = 0; j < 8; j++)
+ T[j] = state[j];
+ #endif
+
+ for (j = 0; j < 64; j += 16)
+ {
+ #if defined(_SHA256_UNROLL) || defined(_SHA256_UNROLL2)
+ RX_8(0); RX_8(8);
+ #else
+ unsigned i;
+ for (i = 0; i < 16; i++) { R(i); }
+ #endif
+ }
+
+ #ifdef _SHA256_UNROLL2
+ state[0] += a;
+ state[1] += b;
+ state[2] += c;
+ state[3] += d;
+ state[4] += e;
+ state[5] += f;
+ state[6] += g;
+ state[7] += h;
+ #else
+ for (j = 0; j < 8; j++)
+ state[j] += T[j];
+ #endif
+
+ /* Wipe variables */
+ /* memset(W, 0, sizeof(W)); */
+ /* memset(T, 0, sizeof(T)); */
}
#undef S0
@@ -146,59 +146,59 @@ static void Sha256_Transform(UInt32 *state, const UInt32 *data)
static void Sha256_WriteByteBlock(CSha256 *p)
{
- UInt32 data32[16];
- unsigned i;
- for (i = 0; i < 16; i++)
- data32[i] =
- ((UInt32)(p->buffer[i * 4 ]) << 24) +
- ((UInt32)(p->buffer[i * 4 + 1]) << 16) +
- ((UInt32)(p->buffer[i * 4 + 2]) << 8) +
- ((UInt32)(p->buffer[i * 4 + 3]));
- Sha256_Transform(p->state, data32);
+ UInt32 data32[16];
+ unsigned i;
+ for (i = 0; i < 16; i++)
+ data32[i] =
+ ((UInt32)(p->buffer[i * 4 ]) << 24) +
+ ((UInt32)(p->buffer[i * 4 + 1]) << 16) +
+ ((UInt32)(p->buffer[i * 4 + 2]) << 8) +
+ ((UInt32)(p->buffer[i * 4 + 3]));
+ Sha256_Transform(p->state, data32);
}
void Sha256_Update(CSha256 *p, const Byte *data, size_t size)
{
- UInt32 curBufferPos = (UInt32)p->count & 0x3F;
- while (size > 0)
- {
- p->buffer[curBufferPos++] = *data++;
- p->count++;
- size--;
- if (curBufferPos == 64)
- {
- curBufferPos = 0;
- Sha256_WriteByteBlock(p);
- }
- }
+ UInt32 curBufferPos = (UInt32)p->count & 0x3F;
+ while (size > 0)
+ {
+ p->buffer[curBufferPos++] = *data++;
+ p->count++;
+ size--;
+ if (curBufferPos == 64)
+ {
+ curBufferPos = 0;
+ Sha256_WriteByteBlock(p);
+ }
+ }
}
void Sha256_Final(CSha256 *p, Byte *digest)
{
- UInt64 lenInBits = (p->count << 3);
- UInt32 curBufferPos = (UInt32)p->count & 0x3F;
- unsigned i;
- p->buffer[curBufferPos++] = 0x80;
- while (curBufferPos != (64 - 8))
- {
- curBufferPos &= 0x3F;
- if (curBufferPos == 0)
- Sha256_WriteByteBlock(p);
- p->buffer[curBufferPos++] = 0;
- }
- for (i = 0; i < 8; i++)
- {
- p->buffer[curBufferPos++] = (Byte)(lenInBits >> 56);
- lenInBits <<= 8;
- }
- Sha256_WriteByteBlock(p);
-
- for (i = 0; i < 8; i++)
- {
- *digest++ = (Byte)(p->state[i] >> 24);
- *digest++ = (Byte)(p->state[i] >> 16);
- *digest++ = (Byte)(p->state[i] >> 8);
- *digest++ = (Byte)(p->state[i]);
- }
- Sha256_Init(p);
+ UInt64 lenInBits = (p->count << 3);
+ UInt32 curBufferPos = (UInt32)p->count & 0x3F;
+ unsigned i;
+ p->buffer[curBufferPos++] = 0x80;
+ while (curBufferPos != (64 - 8))
+ {
+ curBufferPos &= 0x3F;
+ if (curBufferPos == 0)
+ Sha256_WriteByteBlock(p);
+ p->buffer[curBufferPos++] = 0;
+ }
+ for (i = 0; i < 8; i++)
+ {
+ p->buffer[curBufferPos++] = (Byte)(lenInBits >> 56);
+ lenInBits <<= 8;
+ }
+ Sha256_WriteByteBlock(p);
+
+ for (i = 0; i < 8; i++)
+ {
+ *digest++ = (Byte)(p->state[i] >> 24);
+ *digest++ = (Byte)(p->state[i] >> 16);
+ *digest++ = (Byte)(p->state[i] >> 8);
+ *digest++ = (Byte)(p->state[i]);
+ }
+ Sha256_Init(p);
}
diff --git a/src/lib/lib7z/Sha256.h b/src/lib/lib7z/Sha256.h
index 530f513ec68..d1ed1538314 100644
--- a/src/lib/lib7z/Sha256.h
+++ b/src/lib/lib7z/Sha256.h
@@ -12,9 +12,9 @@ EXTERN_C_BEGIN
typedef struct
{
- UInt32 state[8];
- UInt64 count;
- Byte buffer[64];
+ UInt32 state[8];
+ UInt64 count;
+ Byte buffer[64];
} CSha256;
void Sha256_Init(CSha256 *p);
diff --git a/src/lib/lib7z/Sort.c b/src/lib/lib7z/Sort.c
index 388d228938f..57559a5d580 100644
--- a/src/lib/lib7z/Sort.c
+++ b/src/lib/lib7z/Sort.c
@@ -4,58 +4,58 @@
#include "Sort.h"
#define HeapSortDown(p, k, size, temp) \
- { for (;;) { \
- UInt32 s = (k << 1); \
- if (s > size) break; \
- if (s < size && p[s + 1] > p[s]) s++; \
- if (temp >= p[s]) break; \
- p[k] = p[s]; k = s; \
- } p[k] = temp; }
+ { for (;;) { \
+ UInt32 s = (k << 1); \
+ if (s > size) break; \
+ if (s < size && p[s + 1] > p[s]) s++; \
+ if (temp >= p[s]) break; \
+ p[k] = p[s]; k = s; \
+ } p[k] = temp; }
void HeapSort(UInt32 *p, UInt32 size)
{
- if (size <= 1)
- return;
- p--;
- {
- UInt32 i = size / 2;
- do
- {
- UInt32 temp = p[i];
- UInt32 k = i;
- HeapSortDown(p, k, size, temp)
- }
- while (--i != 0);
- }
- /*
- do
- {
- UInt32 k = 1;
- UInt32 temp = p[size];
- p[size--] = p[1];
- HeapSortDown(p, k, size, temp)
- }
- while (size > 1);
- */
- while (size > 3)
- {
- UInt32 temp = p[size];
- UInt32 k = (p[3] > p[2]) ? 3 : 2;
- p[size--] = p[1];
- p[1] = p[k];
- HeapSortDown(p, k, size, temp)
- }
- {
- UInt32 temp = p[size];
- p[size] = p[1];
- if (size > 2 && p[2] < temp)
- {
- p[1] = p[2];
- p[2] = temp;
- }
- else
- p[1] = temp;
- }
+ if (size <= 1)
+ return;
+ p--;
+ {
+ UInt32 i = size / 2;
+ do
+ {
+ UInt32 temp = p[i];
+ UInt32 k = i;
+ HeapSortDown(p, k, size, temp)
+ }
+ while (--i != 0);
+ }
+ /*
+ do
+ {
+ UInt32 k = 1;
+ UInt32 temp = p[size];
+ p[size--] = p[1];
+ HeapSortDown(p, k, size, temp)
+ }
+ while (size > 1);
+ */
+ while (size > 3)
+ {
+ UInt32 temp = p[size];
+ UInt32 k = (p[3] > p[2]) ? 3 : 2;
+ p[size--] = p[1];
+ p[1] = p[k];
+ HeapSortDown(p, k, size, temp)
+ }
+ {
+ UInt32 temp = p[size];
+ p[size] = p[1];
+ if (size > 2 && p[2] < temp)
+ {
+ p[1] = p[2];
+ p[2] = temp;
+ }
+ else
+ p[1] = temp;
+ }
}
/*
diff --git a/src/lib/lib7z/Threads.c b/src/lib/lib7z/Threads.c
index 68561067fe6..f8ec51f23f2 100644
--- a/src/lib/lib7z/Threads.c
+++ b/src/lib/lib7z/Threads.c
@@ -9,8 +9,8 @@
static WRes GetError()
{
- DWORD res = GetLastError();
- return (res) ? (WRes)(res) : 1;
+ DWORD res = GetLastError();
+ return (res) ? (WRes)(res) : 1;
}
WRes HandleToWRes(HANDLE h) { return (h != 0) ? 0 : GetError(); }
@@ -18,32 +18,32 @@ WRes BOOLToWRes(BOOL v) { return v ? 0 : GetError(); }
WRes HandlePtr_Close(HANDLE *p)
{
- if (*p != NULL)
- if (!CloseHandle(*p))
- return GetError();
- *p = NULL;
- return 0;
+ if (*p != NULL)
+ if (!CloseHandle(*p))
+ return GetError();
+ *p = NULL;
+ return 0;
}
WRes Handle_WaitObject(HANDLE h) { return (WRes)WaitForSingleObject(h, INFINITE); }
WRes Thread_Create(CThread *p, THREAD_FUNC_TYPE func, LPVOID param)
{
- unsigned threadId; /* Windows Me/98/95: threadId parameter may not be NULL in _beginthreadex/CreateThread functions */
- *p =
- #ifdef UNDER_CE
- CreateThread(0, 0, func, param, 0, &threadId);
- #else
- (HANDLE)_beginthreadex(NULL, 0, func, param, 0, &threadId);
- #endif
- /* maybe we must use errno here, but probably GetLastError() is also OK. */
- return HandleToWRes(*p);
+ unsigned threadId; /* Windows Me/98/95: threadId parameter may not be NULL in _beginthreadex/CreateThread functions */
+ *p =
+ #ifdef UNDER_CE
+ CreateThread(0, 0, func, param, 0, &threadId);
+ #else
+ (HANDLE)_beginthreadex(NULL, 0, func, param, 0, &threadId);
+ #endif
+ /* maybe we must use errno here, but probably GetLastError() is also OK. */
+ return HandleToWRes(*p);
}
WRes Event_Create(CEvent *p, BOOL manualReset, int signaled)
{
- *p = CreateEvent(NULL, manualReset, (signaled ? TRUE : FALSE), NULL);
- return HandleToWRes(*p);
+ *p = CreateEvent(NULL, manualReset, (signaled ? TRUE : FALSE), NULL);
+ return HandleToWRes(*p);
}
WRes Event_Set(CEvent *p) { return BOOLToWRes(SetEvent(*p)); }
@@ -57,28 +57,28 @@ WRes AutoResetEvent_CreateNotSignaled(CAutoResetEvent *p) { return AutoResetEven
WRes Semaphore_Create(CSemaphore *p, UInt32 initCount, UInt32 maxCount)
{
- *p = CreateSemaphore(NULL, (LONG)initCount, (LONG)maxCount, NULL);
- return HandleToWRes(*p);
+ *p = CreateSemaphore(NULL, (LONG)initCount, (LONG)maxCount, NULL);
+ return HandleToWRes(*p);
}
static WRes Semaphore_Release(CSemaphore *p, LONG releaseCount, LONG *previousCount)
- { return BOOLToWRes(ReleaseSemaphore(*p, releaseCount, previousCount)); }
+ { return BOOLToWRes(ReleaseSemaphore(*p, releaseCount, previousCount)); }
WRes Semaphore_ReleaseN(CSemaphore *p, UInt32 num)
- { return Semaphore_Release(p, (LONG)num, NULL); }
+ { return Semaphore_Release(p, (LONG)num, NULL); }
WRes Semaphore_Release1(CSemaphore *p) { return Semaphore_ReleaseN(p, 1); }
WRes CriticalSection_Init(CCriticalSection *p)
{
- /* InitializeCriticalSection can raise only STATUS_NO_MEMORY exception */
- #ifdef _MSC_VER
- __try
- #endif
- {
- InitializeCriticalSection(p);
- /* InitializeCriticalSectionAndSpinCount(p, 0); */
- }
- #ifdef _MSC_VER
- __except (EXCEPTION_EXECUTE_HANDLER) { return 1; }
- #endif
- return 0;
+ /* InitializeCriticalSection can raise only STATUS_NO_MEMORY exception */
+ #ifdef _MSC_VER
+ __try
+ #endif
+ {
+ InitializeCriticalSection(p);
+ /* InitializeCriticalSectionAndSpinCount(p, 0); */
+ }
+ #ifdef _MSC_VER
+ __except (EXCEPTION_EXECUTE_HANDLER) { return 1; }
+ #endif
+ return 0;
}
diff --git a/src/lib/lib7z/Types.h b/src/lib/lib7z/Types.h
index 1dfea2fbea4..c73340bb053 100644
--- a/src/lib/lib7z/Types.h
+++ b/src/lib/lib7z/Types.h
@@ -126,19 +126,19 @@ typedef int Bool;
typedef struct
{
- Byte (*Read)(void *p); /* reads one byte, returns 0 in case of EOF or error */
+ Byte (*Read)(void *p); /* reads one byte, returns 0 in case of EOF or error */
} IByteIn;
typedef struct
{
- void (*Write)(void *p, Byte b);
+ void (*Write)(void *p, Byte b);
} IByteOut;
typedef struct
{
- SRes (*Read)(void *p, void *buf, size_t *size);
- /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
- (output(*size) < input(*size)) is allowed */
+ SRes (*Read)(void *p, void *buf, size_t *size);
+ /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
+ (output(*size) < input(*size)) is allowed */
} ISeqInStream;
/* it can return SZ_ERROR_INPUT_EOF */
@@ -148,36 +148,36 @@ SRes SeqInStream_ReadByte(ISeqInStream *stream, Byte *buf);
typedef struct
{
- size_t (*Write)(void *p, const void *buf, size_t size);
- /* Returns: result - the number of actually written bytes.
- (result < size) means error */
+ size_t (*Write)(void *p, const void *buf, size_t size);
+ /* Returns: result - the number of actually written bytes.
+ (result < size) means error */
} ISeqOutStream;
typedef enum
{
- SZ_SEEK_SET = 0,
- SZ_SEEK_CUR = 1,
- SZ_SEEK_END = 2
+ SZ_SEEK_SET = 0,
+ SZ_SEEK_CUR = 1,
+ SZ_SEEK_END = 2
} ESzSeek;
typedef struct
{
- SRes (*Read)(void *p, void *buf, size_t *size); /* same as ISeqInStream::Read */
- SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
+ SRes (*Read)(void *p, void *buf, size_t *size); /* same as ISeqInStream::Read */
+ SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
} ISeekInStream;
typedef struct
{
- SRes (*Look)(void *p, const void **buf, size_t *size);
- /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
- (output(*size) > input(*size)) is not allowed
- (output(*size) < input(*size)) is allowed */
- SRes (*Skip)(void *p, size_t offset);
- /* offset must be <= output(*size) of Look */
-
- SRes (*Read)(void *p, void *buf, size_t *size);
- /* reads directly (without buffer). It's same as ISeqInStream::Read */
- SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
+ SRes (*Look)(void *p, const void **buf, size_t *size);
+ /* if (input(*size) != 0 && output(*size) == 0) means end_of_stream.
+ (output(*size) > input(*size)) is not allowed
+ (output(*size) < input(*size)) is allowed */
+ SRes (*Skip)(void *p, size_t offset);
+ /* offset must be <= output(*size) of Look */
+
+ SRes (*Read)(void *p, void *buf, size_t *size);
+ /* reads directly (without buffer). It's same as ISeqInStream::Read */
+ SRes (*Seek)(void *p, Int64 *pos, ESzSeek origin);
} ILookInStream;
SRes LookInStream_LookRead(ILookInStream *stream, void *buf, size_t *size);
@@ -191,11 +191,11 @@ SRes LookInStream_Read(ILookInStream *stream, void *buf, size_t size);
typedef struct
{
- ILookInStream s;
- ISeekInStream *realStream;
- size_t pos;
- size_t size;
- Byte buf[LookToRead_BUF_SIZE];
+ ILookInStream s;
+ ISeekInStream *realStream;
+ size_t pos;
+ size_t size;
+ Byte buf[LookToRead_BUF_SIZE];
} CLookToRead;
void LookToRead_CreateVTable(CLookToRead *p, int lookahead);
@@ -203,31 +203,31 @@ void LookToRead_Init(CLookToRead *p);
typedef struct
{
- ISeqInStream s;
- ILookInStream *realStream;
+ ISeqInStream s;
+ ILookInStream *realStream;
} CSecToLook;
void SecToLook_CreateVTable(CSecToLook *p);
typedef struct
{
- ISeqInStream s;
- ILookInStream *realStream;
+ ISeqInStream s;
+ ILookInStream *realStream;
} CSecToRead;
void SecToRead_CreateVTable(CSecToRead *p);
typedef struct
{
- SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize);
- /* Returns: result. (result != SZ_OK) means break.
- Value (UInt64)(Int64)-1 for size means unknown value. */
+ SRes (*Progress)(void *p, UInt64 inSize, UInt64 outSize);
+ /* Returns: result. (result != SZ_OK) means break.
+ Value (UInt64)(Int64)-1 for size means unknown value. */
} ICompressProgress;
typedef struct
{
- void *(*Alloc)(void *p, size_t size);
- void (*Free)(void *p, void *address); /* address can be 0 */
+ void *(*Alloc)(void *p, size_t size);
+ void (*Free)(void *p, void *address); /* address can be 0 */
} ISzAlloc;
#define IAlloc_Alloc(p, size) (p)->Alloc((p), size)
diff --git a/src/lib/lib7z/Xz.c b/src/lib/lib7z/Xz.c
index 18caba2c15b..29c77f77a9d 100644
--- a/src/lib/lib7z/Xz.c
+++ b/src/lib/lib7z/Xz.c
@@ -11,78 +11,78 @@ Byte XZ_FOOTER_SIG[XZ_FOOTER_SIG_SIZE] = { 'Y', 'Z' };
unsigned Xz_WriteVarInt(Byte *buf, UInt64 v)
{
- unsigned i = 0;
- do
- {
- buf[i++] = (Byte)((v & 0x7F) | 0x80);
- v >>= 7;
- }
- while (v != 0);
- buf[i - 1] &= 0x7F;
- return i;
+ unsigned i = 0;
+ do
+ {
+ buf[i++] = (Byte)((v & 0x7F) | 0x80);
+ v >>= 7;
+ }
+ while (v != 0);
+ buf[i - 1] &= 0x7F;
+ return i;
}
void Xz_Construct(CXzStream *p)
{
- p->numBlocks = p->numBlocksAllocated = 0;
- p->blocks = 0;
- p->flags = 0;
+ p->numBlocks = p->numBlocksAllocated = 0;
+ p->blocks = 0;
+ p->flags = 0;
}
void Xz_Free(CXzStream *p, ISzAlloc *alloc)
{
- alloc->Free(alloc, p->blocks);
- p->numBlocks = p->numBlocksAllocated = 0;
- p->blocks = 0;
+ alloc->Free(alloc, p->blocks);
+ p->numBlocks = p->numBlocksAllocated = 0;
+ p->blocks = 0;
}
unsigned XzFlags_GetCheckSize(CXzStreamFlags f)
{
- int t = XzFlags_GetCheckType(f);
- return (t == 0) ? 0 : (4 << ((t - 1) / 3));
+ int t = XzFlags_GetCheckType(f);
+ return (t == 0) ? 0 : (4 << ((t - 1) / 3));
}
void XzCheck_Init(CXzCheck *p, int mode)
{
- p->mode = mode;
- switch (mode)
- {
- case XZ_CHECK_CRC32: p->crc = CRC_INIT_VAL; break;
- case XZ_CHECK_CRC64: p->crc64 = CRC64_INIT_VAL; break;
- case XZ_CHECK_SHA256: Sha256_Init(&p->sha); break;
- }
+ p->mode = mode;
+ switch (mode)
+ {
+ case XZ_CHECK_CRC32: p->crc = CRC_INIT_VAL; break;
+ case XZ_CHECK_CRC64: p->crc64 = CRC64_INIT_VAL; break;
+ case XZ_CHECK_SHA256: Sha256_Init(&p->sha); break;
+ }
}
void XzCheck_Update(CXzCheck *p, const void *data, size_t size)
{
- switch (p->mode)
- {
- case XZ_CHECK_CRC32: p->crc = CrcUpdate(p->crc, data, size); break;
- case XZ_CHECK_CRC64: p->crc64 = Crc64Update(p->crc64, data, size); break;
- case XZ_CHECK_SHA256: Sha256_Update(&p->sha, (const Byte *)data, size); break;
- }
+ switch (p->mode)
+ {
+ case XZ_CHECK_CRC32: p->crc = CrcUpdate(p->crc, data, size); break;
+ case XZ_CHECK_CRC64: p->crc64 = Crc64Update(p->crc64, data, size); break;
+ case XZ_CHECK_SHA256: Sha256_Update(&p->sha, (const Byte *)data, size); break;
+ }
}
int XzCheck_Final(CXzCheck *p, Byte *digest)
{
- switch (p->mode)
- {
- case XZ_CHECK_CRC32:
- SetUi32(digest, CRC_GET_DIGEST(p->crc));
- break;
- case XZ_CHECK_CRC64:
- {
- int i;
- UInt64 v = CRC64_GET_DIGEST(p->crc64);
- for (i = 0; i < 8; i++, v >>= 8)
- digest[i] = (Byte)(v & 0xFF);
- break;
- }
- case XZ_CHECK_SHA256:
- Sha256_Final(&p->sha, digest);
- break;
- default:
- return 0;
- }
- return 1;
+ switch (p->mode)
+ {
+ case XZ_CHECK_CRC32:
+ SetUi32(digest, CRC_GET_DIGEST(p->crc));
+ break;
+ case XZ_CHECK_CRC64:
+ {
+ int i;
+ UInt64 v = CRC64_GET_DIGEST(p->crc64);
+ for (i = 0; i < 8; i++, v >>= 8)
+ digest[i] = (Byte)(v & 0xFF);
+ break;
+ }
+ case XZ_CHECK_SHA256:
+ Sha256_Final(&p->sha, digest);
+ break;
+ default:
+ return 0;
+ }
+ return 1;
}
diff --git a/src/lib/lib7z/Xz.h b/src/lib/lib7z/Xz.h
index 45481cfdf6d..087df4ea68c 100644
--- a/src/lib/lib7z/Xz.h
+++ b/src/lib/lib7z/Xz.h
@@ -34,17 +34,17 @@ unsigned Xz_WriteVarInt(Byte *buf, UInt64 v);
typedef struct
{
- UInt64 id;
- UInt32 propsSize;
- Byte props[XZ_FILTER_PROPS_SIZE_MAX];
+ UInt64 id;
+ UInt32 propsSize;
+ Byte props[XZ_FILTER_PROPS_SIZE_MAX];
} CXzFilter;
typedef struct
{
- UInt64 packSize;
- UInt64 unpackSize;
- Byte flags;
- CXzFilter filters[XZ_NUM_FILTERS_MAX];
+ UInt64 packSize;
+ UInt64 unpackSize;
+ Byte flags;
+ CXzFilter filters[XZ_NUM_FILTERS_MAX];
} CXzBlock;
#define XzBlock_GetNumFilters(p) (((p)->flags & XZ_BF_NUM_FILTERS_MASK) + 1)
@@ -76,10 +76,10 @@ extern Byte XZ_FOOTER_SIG[XZ_FOOTER_SIG_SIZE];
typedef struct
{
- int mode;
- UInt32 crc;
- UInt64 crc64;
- CSha256 sha;
+ int mode;
+ UInt32 crc;
+ UInt64 crc64;
+ CSha256 sha;
} CXzCheck;
void XzCheck_Init(CXzCheck *p, int mode);
@@ -98,17 +98,17 @@ SRes Xz_ReadHeader(CXzStreamFlags *p, ISeqInStream *inStream);
typedef struct
{
- UInt64 unpackSize;
- UInt64 totalSize;
+ UInt64 unpackSize;
+ UInt64 totalSize;
} CXzBlockSizes;
typedef struct
{
- CXzStreamFlags flags;
- size_t numBlocks;
- size_t numBlocksAllocated;
- CXzBlockSizes *blocks;
- UInt64 startOffset;
+ CXzStreamFlags flags;
+ size_t numBlocks;
+ size_t numBlocksAllocated;
+ CXzBlockSizes *blocks;
+ UInt64 startOffset;
} CXzStream;
void Xz_Construct(CXzStream *p);
@@ -121,9 +121,9 @@ UInt64 Xz_GetPackSize(const CXzStream *p);
typedef struct
{
- size_t num;
- size_t numAllocated;
- CXzStream *streams;
+ size_t num;
+ size_t numAllocated;
+ CXzStream *streams;
} CXzs;
void Xzs_Construct(CXzs *p);
@@ -135,40 +135,40 @@ UInt64 Xzs_GetUnpackSize(const CXzs *p);
typedef enum
{
- CODER_STATUS_NOT_SPECIFIED, /* use main error code instead */
- CODER_STATUS_FINISHED_WITH_MARK, /* stream was finished with end mark. */
- CODER_STATUS_NOT_FINISHED, /* stream was not finished */
- CODER_STATUS_NEEDS_MORE_INPUT /* you must provide more input bytes */
+ CODER_STATUS_NOT_SPECIFIED, /* use main error code instead */
+ CODER_STATUS_FINISHED_WITH_MARK, /* stream was finished with end mark. */
+ CODER_STATUS_NOT_FINISHED, /* stream was not finished */
+ CODER_STATUS_NEEDS_MORE_INPUT /* you must provide more input bytes */
} ECoderStatus;
typedef enum
{
- CODER_FINISH_ANY, /* finish at any point */
- CODER_FINISH_END /* block must be finished at the end */
+ CODER_FINISH_ANY, /* finish at any point */
+ CODER_FINISH_END /* block must be finished at the end */
} ECoderFinishMode;
typedef struct _IStateCoder
{
- void *p;
- void (*Free)(void *p, ISzAlloc *alloc);
- SRes (*SetProps)(void *p, const Byte *props, size_t propSize, ISzAlloc *alloc);
- void (*Init)(void *p);
- SRes (*Code)(void *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished);
+ void *p;
+ void (*Free)(void *p, ISzAlloc *alloc);
+ SRes (*SetProps)(void *p, const Byte *props, size_t propSize, ISzAlloc *alloc);
+ void (*Init)(void *p);
+ SRes (*Code)(void *p, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
+ int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished);
} IStateCoder;
#define MIXCODER_NUM_FILTERS_MAX 4
typedef struct
{
- ISzAlloc *alloc;
- Byte *buf;
- int numCoders;
- int finished[MIXCODER_NUM_FILTERS_MAX - 1];
- size_t pos[MIXCODER_NUM_FILTERS_MAX - 1];
- size_t size[MIXCODER_NUM_FILTERS_MAX - 1];
- UInt64 ids[MIXCODER_NUM_FILTERS_MAX];
- IStateCoder coders[MIXCODER_NUM_FILTERS_MAX];
+ ISzAlloc *alloc;
+ Byte *buf;
+ int numCoders;
+ int finished[MIXCODER_NUM_FILTERS_MAX - 1];
+ size_t pos[MIXCODER_NUM_FILTERS_MAX - 1];
+ size_t size[MIXCODER_NUM_FILTERS_MAX - 1];
+ UInt64 ids[MIXCODER_NUM_FILTERS_MAX];
+ IStateCoder coders[MIXCODER_NUM_FILTERS_MAX];
} CMixCoder;
void MixCoder_Construct(CMixCoder *p, ISzAlloc *alloc);
@@ -176,48 +176,48 @@ void MixCoder_Free(CMixCoder *p);
void MixCoder_Init(CMixCoder *p);
SRes MixCoder_SetFromMethod(CMixCoder *p, int coderIndex, UInt64 methodId);
SRes MixCoder_Code(CMixCoder *p, Byte *dest, SizeT *destLen,
- const Byte *src, SizeT *srcLen, int srcWasFinished,
- ECoderFinishMode finishMode, ECoderStatus *status);
+ const Byte *src, SizeT *srcLen, int srcWasFinished,
+ ECoderFinishMode finishMode, ECoderStatus *status);
typedef enum
{
- XZ_STATE_STREAM_HEADER,
- XZ_STATE_STREAM_INDEX,
- XZ_STATE_STREAM_INDEX_CRC,
- XZ_STATE_STREAM_FOOTER,
- XZ_STATE_STREAM_PADDING,
- XZ_STATE_BLOCK_HEADER,
- XZ_STATE_BLOCK,
- XZ_STATE_BLOCK_FOOTER
+ XZ_STATE_STREAM_HEADER,
+ XZ_STATE_STREAM_INDEX,
+ XZ_STATE_STREAM_INDEX_CRC,
+ XZ_STATE_STREAM_FOOTER,
+ XZ_STATE_STREAM_PADDING,
+ XZ_STATE_BLOCK_HEADER,
+ XZ_STATE_BLOCK,
+ XZ_STATE_BLOCK_FOOTER
} EXzState;
typedef struct
{
- EXzState state;
- UInt32 pos;
- unsigned alignPos;
- unsigned indexPreSize;
-
- CXzStreamFlags streamFlags;
-
- UInt32 blockHeaderSize;
- UInt64 packSize;
- UInt64 unpackSize;
-
- UInt64 numBlocks;
- UInt64 indexSize;
- UInt64 indexPos;
- UInt64 padSize;
-
- UInt64 numStreams;
-
- UInt32 crc;
- CMixCoder decoder;
- CXzBlock block;
- CXzCheck check;
- CSha256 sha;
- Byte shaDigest[SHA256_DIGEST_SIZE];
- Byte buf[XZ_BLOCK_HEADER_SIZE_MAX];
+ EXzState state;
+ UInt32 pos;
+ unsigned alignPos;
+ unsigned indexPreSize;
+
+ CXzStreamFlags streamFlags;
+
+ UInt32 blockHeaderSize;
+ UInt64 packSize;
+ UInt64 unpackSize;
+
+ UInt64 numBlocks;
+ UInt64 indexSize;
+ UInt64 indexPos;
+ UInt64 padSize;
+
+ UInt64 numStreams;
+
+ UInt32 crc;
+ CMixCoder decoder;
+ CXzBlock block;
+ CXzCheck check;
+ CSha256 sha;
+ Byte shaDigest[SHA256_DIGEST_SIZE];
+ Byte buf[XZ_BLOCK_HEADER_SIZE_MAX];
} CXzUnpacker;
void XzUnpacker_Construct(CXzUnpacker *p, ISzAlloc *alloc);
@@ -244,8 +244,8 @@ Returns:
SRes XzUnpacker_Code(CXzUnpacker *p, Byte *dest, SizeT *destLen,
- const Byte *src, SizeT *srcLen, /* int srcWasFinished, */ int finishMode,
- ECoderStatus *status);
+ const Byte *src, SizeT *srcLen, /* int srcWasFinished, */ int finishMode,
+ ECoderStatus *status);
Bool XzUnpacker_IsStreamWasFinished(CXzUnpacker *p);
diff --git a/src/lib/lib7z/XzCrc64.c b/src/lib/lib7z/XzCrc64.c
index 0369554b736..41f5e007563 100644
--- a/src/lib/lib7z/XzCrc64.c
+++ b/src/lib/lib7z/XzCrc64.c
@@ -8,26 +8,26 @@ UInt64 g_Crc64Table[256];
void MY_FAST_CALL Crc64GenerateTable(void)
{
- UInt32 i;
- for (i = 0; i < 256; i++)
- {
- UInt64 r = i;
- int j;
- for (j = 0; j < 8; j++)
- r = (r >> 1) ^ ((UInt64)kCrc64Poly & ~((r & 1) - 1));
- g_Crc64Table[i] = r;
- }
+ UInt32 i;
+ for (i = 0; i < 256; i++)
+ {
+ UInt64 r = i;
+ int j;
+ for (j = 0; j < 8; j++)
+ r = (r >> 1) ^ ((UInt64)kCrc64Poly & ~((r & 1) - 1));
+ g_Crc64Table[i] = r;
+ }
}
UInt64 MY_FAST_CALL Crc64Update(UInt64 v, const void *data, size_t size)
{
- const Byte *p = (const Byte *)data;
- for (; size > 0 ; size--, p++)
- v = CRC64_UPDATE_BYTE(v, *p);
- return v;
+ const Byte *p = (const Byte *)data;
+ for (; size > 0 ; size--, p++)
+ v = CRC64_UPDATE_BYTE(v, *p);
+ return v;
}
UInt64 MY_FAST_CALL Crc64Calc(const void *data, size_t size)
{
- return CRC64_GET_DIGEST(Crc64Update(CRC64_INIT_VAL, data, size));
+ return CRC64_GET_DIGEST(Crc64Update(CRC64_INIT_VAL, data, size));
}
diff --git a/src/lib/lib7z/XzDec.c b/src/lib/lib7z/XzDec.c
index 5a4a9a1ca0e..f3a19e782fb 100644
--- a/src/lib/lib7z/XzDec.c
+++ b/src/lib/lib7z/XzDec.c
@@ -30,18 +30,18 @@
unsigned Xz_ReadVarInt(const Byte *p, size_t maxSize, UInt64 *value)
{
- int i, limit;
- *value = 0;
- limit = (maxSize > 9) ? 9 : (int)maxSize;
-
- for (i = 0; i < limit;)
- {
- Byte b = p[i];
- *value |= (UInt64)(b & 0x7F) << (7 * i++);
- if ((b & 0x80) == 0)
- return (b == 0 && i != 1) ? 0 : i;
- }
- return 0;
+ int i, limit;
+ *value = 0;
+ limit = (maxSize > 9) ? 9 : (int)maxSize;
+
+ for (i = 0; i < limit;)
+ {
+ Byte b = p[i];
+ *value |= (UInt64)(b & 0x7F) << (7 * i++);
+ if ((b & 0x80) == 0)
+ return (b == 0 && i != 1) ? 0 : i;
+ }
+ return 0;
}
/* ---------- BraState ---------- */
@@ -50,174 +50,174 @@ unsigned Xz_ReadVarInt(const Byte *p, size_t maxSize, UInt64 *value)
typedef struct
{
- size_t bufPos;
- size_t bufConv;
- size_t bufTotal;
-
- UInt32 methodId;
- int encodeMode;
- UInt32 delta;
- UInt32 ip;
- UInt32 x86State;
- Byte deltaState[DELTA_STATE_SIZE];
-
- Byte buf[BRA_BUF_SIZE];
+ size_t bufPos;
+ size_t bufConv;
+ size_t bufTotal;
+
+ UInt32 methodId;
+ int encodeMode;
+ UInt32 delta;
+ UInt32 ip;
+ UInt32 x86State;
+ Byte deltaState[DELTA_STATE_SIZE];
+
+ Byte buf[BRA_BUF_SIZE];
} CBraState;
void BraState_Free(void *pp, ISzAlloc *alloc)
{
- alloc->Free(alloc, pp);
+ alloc->Free(alloc, pp);
}
SRes BraState_SetProps(void *pp, const Byte *props, size_t propSize, ISzAlloc *alloc)
{
- CBraState *p = ((CBraState *)pp);
- alloc = alloc;
- p->ip = 0;
- if (p->methodId == XZ_ID_Delta)
- {
- if (propSize != 1)
- return SZ_ERROR_UNSUPPORTED;
- p->delta = (unsigned)props[0] + 1;
- }
- else
- {
- if (propSize == 4)
- {
- UInt32 v = GetUi32(props);
- switch(p->methodId)
- {
- case XZ_ID_PPC:
- case XZ_ID_ARM:
- case XZ_ID_SPARC:
- if ((v & 3) != 0)
- return SZ_ERROR_UNSUPPORTED;
- break;
- case XZ_ID_ARMT:
- if ((v & 1) != 0)
- return SZ_ERROR_UNSUPPORTED;
- break;
- case XZ_ID_IA64:
- if ((v & 0xF) != 0)
- return SZ_ERROR_UNSUPPORTED;
- break;
- }
- p->ip = v;
- }
- else if (propSize != 0)
- return SZ_ERROR_UNSUPPORTED;
- }
- return SZ_OK;
+ CBraState *p = ((CBraState *)pp);
+ alloc = alloc;
+ p->ip = 0;
+ if (p->methodId == XZ_ID_Delta)
+ {
+ if (propSize != 1)
+ return SZ_ERROR_UNSUPPORTED;
+ p->delta = (unsigned)props[0] + 1;
+ }
+ else
+ {
+ if (propSize == 4)
+ {
+ UInt32 v = GetUi32(props);
+ switch(p->methodId)
+ {
+ case XZ_ID_PPC:
+ case XZ_ID_ARM:
+ case XZ_ID_SPARC:
+ if ((v & 3) != 0)
+ return SZ_ERROR_UNSUPPORTED;
+ break;
+ case XZ_ID_ARMT:
+ if ((v & 1) != 0)
+ return SZ_ERROR_UNSUPPORTED;
+ break;
+ case XZ_ID_IA64:
+ if ((v & 0xF) != 0)
+ return SZ_ERROR_UNSUPPORTED;
+ break;
+ }
+ p->ip = v;
+ }
+ else if (propSize != 0)
+ return SZ_ERROR_UNSUPPORTED;
+ }
+ return SZ_OK;
}
void BraState_Init(void *pp)
{
- CBraState *p = ((CBraState *)pp);
- p->bufPos = p->bufConv = p->bufTotal = 0;
- x86_Convert_Init(p->x86State);
- if (p->methodId == XZ_ID_Delta)
- Delta_Init(p->deltaState);
+ CBraState *p = ((CBraState *)pp);
+ p->bufPos = p->bufConv = p->bufTotal = 0;
+ x86_Convert_Init(p->x86State);
+ if (p->methodId == XZ_ID_Delta)
+ Delta_Init(p->deltaState);
}
#define CASE_BRA_CONV(isa) case XZ_ID_ ## isa: p->bufConv = isa ## _Convert(p->buf, p->bufTotal, p->ip, p->encodeMode); break;
static SRes BraState_Code(void *pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished)
+ int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished)
{
- CBraState *p = ((CBraState *)pp);
- SizeT destLenOrig = *destLen;
- SizeT srcLenOrig = *srcLen;
- *destLen = 0;
- *srcLen = 0;
- finishMode = finishMode;
- *wasFinished = 0;
- while (destLenOrig > 0)
- {
- if (p->bufPos != p->bufConv)
- {
- size_t curSize = p->bufConv - p->bufPos;
- if (curSize > destLenOrig)
- curSize = destLenOrig;
- memcpy(dest, p->buf + p->bufPos, curSize);
- p->bufPos += curSize;
- *destLen += curSize;
- dest += curSize;
- destLenOrig -= curSize;
- continue;
- }
- p->bufTotal -= p->bufPos;
- memmove(p->buf, p->buf + p->bufPos, p->bufTotal);
- p->bufPos = 0;
- p->bufConv = 0;
- {
- size_t curSize = BRA_BUF_SIZE - p->bufTotal;
- if (curSize > srcLenOrig)
- curSize = srcLenOrig;
- memcpy(p->buf + p->bufTotal, src, curSize);
- *srcLen += curSize;
- src += curSize;
- srcLenOrig -= curSize;
- p->bufTotal += curSize;
- }
- if (p->bufTotal == 0)
- break;
- switch(p->methodId)
- {
- case XZ_ID_Delta:
- if (p->encodeMode)
- Delta_Encode(p->deltaState, p->delta, p->buf, p->bufTotal);
- else
- Delta_Decode(p->deltaState, p->delta, p->buf, p->bufTotal);
- p->bufConv = p->bufTotal;
- break;
- case XZ_ID_X86:
- p->bufConv = x86_Convert(p->buf, p->bufTotal, p->ip, &p->x86State, p->encodeMode);
- break;
- CASE_BRA_CONV(PPC)
- CASE_BRA_CONV(IA64)
- CASE_BRA_CONV(ARM)
- CASE_BRA_CONV(ARMT)
- CASE_BRA_CONV(SPARC)
- default:
- return SZ_ERROR_UNSUPPORTED;
- }
- p->ip += (UInt32)p->bufConv;
-
- if (p->bufConv == 0)
- {
- if (!srcWasFinished)
- break;
- p->bufConv = p->bufTotal;
- }
- }
- if (p->bufTotal == p->bufPos && srcLenOrig == 0 && srcWasFinished)
- *wasFinished = 1;
- return SZ_OK;
+ CBraState *p = ((CBraState *)pp);
+ SizeT destLenOrig = *destLen;
+ SizeT srcLenOrig = *srcLen;
+ *destLen = 0;
+ *srcLen = 0;
+ finishMode = finishMode;
+ *wasFinished = 0;
+ while (destLenOrig > 0)
+ {
+ if (p->bufPos != p->bufConv)
+ {
+ size_t curSize = p->bufConv - p->bufPos;
+ if (curSize > destLenOrig)
+ curSize = destLenOrig;
+ memcpy(dest, p->buf + p->bufPos, curSize);
+ p->bufPos += curSize;
+ *destLen += curSize;
+ dest += curSize;
+ destLenOrig -= curSize;
+ continue;
+ }
+ p->bufTotal -= p->bufPos;
+ memmove(p->buf, p->buf + p->bufPos, p->bufTotal);
+ p->bufPos = 0;
+ p->bufConv = 0;
+ {
+ size_t curSize = BRA_BUF_SIZE - p->bufTotal;
+ if (curSize > srcLenOrig)
+ curSize = srcLenOrig;
+ memcpy(p->buf + p->bufTotal, src, curSize);
+ *srcLen += curSize;
+ src += curSize;
+ srcLenOrig -= curSize;
+ p->bufTotal += curSize;
+ }
+ if (p->bufTotal == 0)
+ break;
+ switch(p->methodId)
+ {
+ case XZ_ID_Delta:
+ if (p->encodeMode)
+ Delta_Encode(p->deltaState, p->delta, p->buf, p->bufTotal);
+ else
+ Delta_Decode(p->deltaState, p->delta, p->buf, p->bufTotal);
+ p->bufConv = p->bufTotal;
+ break;
+ case XZ_ID_X86:
+ p->bufConv = x86_Convert(p->buf, p->bufTotal, p->ip, &p->x86State, p->encodeMode);
+ break;
+ CASE_BRA_CONV(PPC)
+ CASE_BRA_CONV(IA64)
+ CASE_BRA_CONV(ARM)
+ CASE_BRA_CONV(ARMT)
+ CASE_BRA_CONV(SPARC)
+ default:
+ return SZ_ERROR_UNSUPPORTED;
+ }
+ p->ip += (UInt32)p->bufConv;
+
+ if (p->bufConv == 0)
+ {
+ if (!srcWasFinished)
+ break;
+ p->bufConv = p->bufTotal;
+ }
+ }
+ if (p->bufTotal == p->bufPos && srcLenOrig == 0 && srcWasFinished)
+ *wasFinished = 1;
+ return SZ_OK;
}
SRes BraState_SetFromMethod(IStateCoder *p, UInt64 id, int encodeMode, ISzAlloc *alloc)
{
- CBraState *decoder;
- if (id != XZ_ID_Delta &&
- id != XZ_ID_X86 &&
- id != XZ_ID_PPC &&
- id != XZ_ID_IA64 &&
- id != XZ_ID_ARM &&
- id != XZ_ID_ARMT &&
- id != XZ_ID_SPARC)
- return SZ_ERROR_UNSUPPORTED;
- p->p = 0;
- decoder = alloc->Alloc(alloc, sizeof(CBraState));
- if (decoder == 0)
- return SZ_ERROR_MEM;
- decoder->methodId = (UInt32)id;
- decoder->encodeMode = encodeMode;
- p->p = decoder;
- p->Free = BraState_Free;
- p->SetProps = BraState_SetProps;
- p->Init = BraState_Init;
- p->Code = BraState_Code;
- return SZ_OK;
+ CBraState *decoder;
+ if (id != XZ_ID_Delta &&
+ id != XZ_ID_X86 &&
+ id != XZ_ID_PPC &&
+ id != XZ_ID_IA64 &&
+ id != XZ_ID_ARM &&
+ id != XZ_ID_ARMT &&
+ id != XZ_ID_SPARC)
+ return SZ_ERROR_UNSUPPORTED;
+ p->p = 0;
+ decoder = alloc->Alloc(alloc, sizeof(CBraState));
+ if (decoder == 0)
+ return SZ_ERROR_MEM;
+ decoder->methodId = (UInt32)id;
+ decoder->encodeMode = encodeMode;
+ p->p = decoder;
+ p->Free = BraState_Free;
+ p->SetProps = BraState_SetProps;
+ p->Init = BraState_Init;
+ p->Code = BraState_Code;
+ return SZ_OK;
}
/* ---------- SbState ---------- */
@@ -226,57 +226,57 @@ SRes BraState_SetFromMethod(IStateCoder *p, UInt64 id, int encodeMode, ISzAlloc
static void SbState_Free(void *pp, ISzAlloc *alloc)
{
- CSbDec *p = (CSbDec *)pp;
- SbDec_Free(p);
- alloc->Free(alloc, pp);
+ CSbDec *p = (CSbDec *)pp;
+ SbDec_Free(p);
+ alloc->Free(alloc, pp);
}
static SRes SbState_SetProps(void *pp, const Byte *props, size_t propSize, ISzAlloc *alloc)
{
- pp = pp;
- props = props;
- alloc = alloc;
- return (propSize == 0) ? SZ_OK : SZ_ERROR_UNSUPPORTED;
+ pp = pp;
+ props = props;
+ alloc = alloc;
+ return (propSize == 0) ? SZ_OK : SZ_ERROR_UNSUPPORTED;
}
static void SbState_Init(void *pp)
{
- SbDec_Init((CSbDec *)pp);
+ SbDec_Init((CSbDec *)pp);
}
static SRes SbState_Code(void *pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished)
+ int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished)
{
- CSbDec *p = (CSbDec *)pp;
- SRes res;
- srcWasFinished = srcWasFinished;
- p->dest = dest;
- p->destLen = *destLen;
- p->src = src;
- p->srcLen = *srcLen;
- p->finish = finishMode; /* change it */
- res = SbDec_Decode((CSbDec *)pp);
- *destLen -= p->destLen;
- *srcLen -= p->srcLen;
- *wasFinished = (*destLen == 0 && *srcLen == 0); /* change it */
- return res;
+ CSbDec *p = (CSbDec *)pp;
+ SRes res;
+ srcWasFinished = srcWasFinished;
+ p->dest = dest;
+ p->destLen = *destLen;
+ p->src = src;
+ p->srcLen = *srcLen;
+ p->finish = finishMode; /* change it */
+ res = SbDec_Decode((CSbDec *)pp);
+ *destLen -= p->destLen;
+ *srcLen -= p->srcLen;
+ *wasFinished = (*destLen == 0 && *srcLen == 0); /* change it */
+ return res;
}
SRes SbState_SetFromMethod(IStateCoder *p, ISzAlloc *alloc)
{
- CSbDec *decoder;
- p->p = 0;
- decoder = alloc->Alloc(alloc, sizeof(CSbDec));
- if (decoder == 0)
- return SZ_ERROR_MEM;
- p->p = decoder;
- p->Free = SbState_Free;
- p->SetProps = SbState_SetProps;
- p->Init = SbState_Init;
- p->Code = SbState_Code;
- SbDec_Construct(decoder);
- SbDec_SetAlloc(decoder, alloc);
- return SZ_OK;
+ CSbDec *decoder;
+ p->p = 0;
+ decoder = alloc->Alloc(alloc, sizeof(CSbDec));
+ if (decoder == 0)
+ return SZ_ERROR_MEM;
+ p->p = decoder;
+ p->Free = SbState_Free;
+ p->SetProps = SbState_SetProps;
+ p->Init = SbState_Init;
+ p->Code = SbState_Code;
+ SbDec_Construct(decoder);
+ SbDec_SetAlloc(decoder, alloc);
+ return SZ_OK;
}
#endif
@@ -284,606 +284,606 @@ SRes SbState_SetFromMethod(IStateCoder *p, ISzAlloc *alloc)
static void Lzma2State_Free(void *pp, ISzAlloc *alloc)
{
- Lzma2Dec_Free((CLzma2Dec *)pp, alloc);
- alloc->Free(alloc, pp);
+ Lzma2Dec_Free((CLzma2Dec *)pp, alloc);
+ alloc->Free(alloc, pp);
}
static SRes Lzma2State_SetProps(void *pp, const Byte *props, size_t propSize, ISzAlloc *alloc)
{
- if (propSize != 1)
- return SZ_ERROR_UNSUPPORTED;
- return Lzma2Dec_Allocate((CLzma2Dec *)pp, props[0], alloc);
+ if (propSize != 1)
+ return SZ_ERROR_UNSUPPORTED;
+ return Lzma2Dec_Allocate((CLzma2Dec *)pp, props[0], alloc);
}
static void Lzma2State_Init(void *pp)
{
- Lzma2Dec_Init((CLzma2Dec *)pp);
+ Lzma2Dec_Init((CLzma2Dec *)pp);
}
static SRes Lzma2State_Code(void *pp, Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen,
- int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished)
+ int srcWasFinished, ECoderFinishMode finishMode, int *wasFinished)
{
- ELzmaStatus status;
- /* ELzmaFinishMode fm = (finishMode == LZMA_FINISH_ANY) ? LZMA_FINISH_ANY : LZMA_FINISH_END; */
- SRes res = Lzma2Dec_DecodeToBuf((CLzma2Dec *)pp, dest, destLen, src, srcLen, finishMode, &status);
- srcWasFinished = srcWasFinished;
- *wasFinished = (status == LZMA_STATUS_FINISHED_WITH_MARK);
- return res;
+ ELzmaStatus status;
+ /* ELzmaFinishMode fm = (finishMode == LZMA_FINISH_ANY) ? LZMA_FINISH_ANY : LZMA_FINISH_END; */
+ SRes res = Lzma2Dec_DecodeToBuf((CLzma2Dec *)pp, dest, destLen, src, srcLen, finishMode, &status);
+ srcWasFinished = srcWasFinished;
+ *wasFinished = (status == LZMA_STATUS_FINISHED_WITH_MARK);
+ return res;
}
static SRes Lzma2State_SetFromMethod(IStateCoder *p, ISzAlloc *alloc)
{
- CLzma2Dec *decoder = alloc->Alloc(alloc, sizeof(CLzma2Dec));
- p->p = decoder;
- if (decoder == 0)
- return SZ_ERROR_MEM;
- p->Free = Lzma2State_Free;
- p->SetProps = Lzma2State_SetProps;
- p->Init = Lzma2State_Init;
- p->Code = Lzma2State_Code;
- Lzma2Dec_Construct(decoder);
- return SZ_OK;
+ CLzma2Dec *decoder = alloc->Alloc(alloc, sizeof(CLzma2Dec));
+ p->p = decoder;
+ if (decoder == 0)
+ return SZ_ERROR_MEM;
+ p->Free = Lzma2State_Free;
+ p->SetProps = Lzma2State_SetProps;
+ p->Init = Lzma2State_Init;
+ p->Code = Lzma2State_Code;
+ Lzma2Dec_Construct(decoder);
+ return SZ_OK;
}
void MixCoder_Construct(CMixCoder *p, ISzAlloc *alloc)
{
- int i;
- p->alloc = alloc;
- p->buf = 0;
- p->numCoders = 0;
- for (i = 0; i < MIXCODER_NUM_FILTERS_MAX; i++)
- p->coders[i].p = NULL;
+ int i;
+ p->alloc = alloc;
+ p->buf = 0;
+ p->numCoders = 0;
+ for (i = 0; i < MIXCODER_NUM_FILTERS_MAX; i++)
+ p->coders[i].p = NULL;
}
void MixCoder_Free(CMixCoder *p)
{
- int i;
- for (i = 0; i < p->numCoders; i++)
- {
- IStateCoder *sc = &p->coders[i];
- if (p->alloc && sc->p)
- sc->Free(sc->p, p->alloc);
- }
- p->numCoders = 0;
- if (p->buf)
- p->alloc->Free(p->alloc, p->buf);
+ int i;
+ for (i = 0; i < p->numCoders; i++)
+ {
+ IStateCoder *sc = &p->coders[i];
+ if (p->alloc && sc->p)
+ sc->Free(sc->p, p->alloc);
+ }
+ p->numCoders = 0;
+ if (p->buf)
+ p->alloc->Free(p->alloc, p->buf);
}
void MixCoder_Init(CMixCoder *p)
{
- int i;
- for (i = 0; i < p->numCoders - 1; i++)
- {
- p->size[i] = 0;
- p->pos[i] = 0;
- p->finished[i] = 0;
- }
- for (i = 0; i < p->numCoders; i++)
- {
- IStateCoder *coder = &p->coders[i];
- coder->Init(coder->p);
- }
+ int i;
+ for (i = 0; i < p->numCoders - 1; i++)
+ {
+ p->size[i] = 0;
+ p->pos[i] = 0;
+ p->finished[i] = 0;
+ }
+ for (i = 0; i < p->numCoders; i++)
+ {
+ IStateCoder *coder = &p->coders[i];
+ coder->Init(coder->p);
+ }
}
SRes MixCoder_SetFromMethod(CMixCoder *p, int coderIndex, UInt64 methodId)
{
- IStateCoder *sc = &p->coders[coderIndex];
- p->ids[coderIndex] = methodId;
- switch(methodId)
- {
- case XZ_ID_LZMA2: return Lzma2State_SetFromMethod(sc, p->alloc);
- #ifdef USE_SUBBLOCK
- case XZ_ID_Subblock: return SbState_SetFromMethod(sc, p->alloc);
- #endif
- }
- if (coderIndex == 0)
- return SZ_ERROR_UNSUPPORTED;
- return BraState_SetFromMethod(sc, methodId, 0, p->alloc);
+ IStateCoder *sc = &p->coders[coderIndex];
+ p->ids[coderIndex] = methodId;
+ switch(methodId)
+ {
+ case XZ_ID_LZMA2: return Lzma2State_SetFromMethod(sc, p->alloc);
+ #ifdef USE_SUBBLOCK
+ case XZ_ID_Subblock: return SbState_SetFromMethod(sc, p->alloc);
+ #endif
+ }
+ if (coderIndex == 0)
+ return SZ_ERROR_UNSUPPORTED;
+ return BraState_SetFromMethod(sc, methodId, 0, p->alloc);
}
SRes MixCoder_Code(CMixCoder *p, Byte *dest, SizeT *destLen,
- const Byte *src, SizeT *srcLen, int srcWasFinished,
- ECoderFinishMode finishMode, ECoderStatus *status)
+ const Byte *src, SizeT *srcLen, int srcWasFinished,
+ ECoderFinishMode finishMode, ECoderStatus *status)
{
- SizeT destLenOrig = *destLen;
- SizeT srcLenOrig = *srcLen;
- Bool allFinished = True;
- *destLen = 0;
- *srcLen = 0;
- *status = CODER_STATUS_NOT_FINISHED;
-
- if (p->buf == 0)
- {
- p->buf = p->alloc->Alloc(p->alloc, CODER_BUF_SIZE * (MIXCODER_NUM_FILTERS_MAX - 1));
- if (p->buf == 0)
- return SZ_ERROR_MEM;
- }
-
- if (p->numCoders != 1)
- finishMode = CODER_FINISH_ANY;
-
- for (;;)
- {
- Bool processed = False;
- int i;
- /*
- if (p->numCoders == 1 && *destLen == destLenOrig && finishMode == LZMA_FINISH_ANY)
- break;
- */
-
- for (i = 0; i < p->numCoders; i++)
- {
- SRes res;
- IStateCoder *coder = &p->coders[i];
- Byte *destCur;
- SizeT destLenCur, srcLenCur;
- const Byte *srcCur;
- int srcFinishedCur;
- int encodingWasFinished;
-
- if (i == 0)
- {
- srcCur = src;
- srcLenCur = srcLenOrig - *srcLen;
- srcFinishedCur = srcWasFinished;
- }
- else
- {
- srcCur = p->buf + (CODER_BUF_SIZE * (i - 1)) + p->pos[i - 1];
- srcLenCur = p->size[i - 1] - p->pos[i - 1];
- srcFinishedCur = p->finished[i - 1];
- }
-
- if (i == p->numCoders - 1)
- {
- destCur = dest;
- destLenCur = destLenOrig - *destLen;
- }
- else
- {
- if (p->pos[i] != p->size[i])
- continue;
- destCur = p->buf + (CODER_BUF_SIZE * i);
- destLenCur = CODER_BUF_SIZE;
- }
-
- res = coder->Code(coder->p, destCur, &destLenCur, srcCur, &srcLenCur, srcFinishedCur, finishMode, &encodingWasFinished);
-
- if (!encodingWasFinished)
- allFinished = False;
-
- if (i == 0)
- {
- *srcLen += srcLenCur;
- src += srcLenCur;
- }
- else
- {
- p->pos[i - 1] += srcLenCur;
- }
-
- if (i == p->numCoders - 1)
- {
- *destLen += destLenCur;
- dest += destLenCur;
- }
- else
- {
- p->size[i] = destLenCur;
- p->pos[i] = 0;
- p->finished[i] = encodingWasFinished;
- }
-
- if (res != SZ_OK)
- return res;
-
- if (destLenCur != 0 || srcLenCur != 0)
- processed = True;
- }
- if (!processed)
- break;
- }
- if (allFinished)
- *status = CODER_STATUS_FINISHED_WITH_MARK;
- return SZ_OK;
+ SizeT destLenOrig = *destLen;
+ SizeT srcLenOrig = *srcLen;
+ Bool allFinished = True;
+ *destLen = 0;
+ *srcLen = 0;
+ *status = CODER_STATUS_NOT_FINISHED;
+
+ if (p->buf == 0)
+ {
+ p->buf = p->alloc->Alloc(p->alloc, CODER_BUF_SIZE * (MIXCODER_NUM_FILTERS_MAX - 1));
+ if (p->buf == 0)
+ return SZ_ERROR_MEM;
+ }
+
+ if (p->numCoders != 1)
+ finishMode = CODER_FINISH_ANY;
+
+ for (;;)
+ {
+ Bool processed = False;
+ int i;
+ /*
+ if (p->numCoders == 1 && *destLen == destLenOrig && finishMode == LZMA_FINISH_ANY)
+ break;
+ */
+
+ for (i = 0; i < p->numCoders; i++)
+ {
+ SRes res;
+ IStateCoder *coder = &p->coders[i];
+ Byte *destCur;
+ SizeT destLenCur, srcLenCur;
+ const Byte *srcCur;
+ int srcFinishedCur;
+ int encodingWasFinished;
+
+ if (i == 0)
+ {
+ srcCur = src;
+ srcLenCur = srcLenOrig - *srcLen;
+ srcFinishedCur = srcWasFinished;
+ }
+ else
+ {
+ srcCur = p->buf + (CODER_BUF_SIZE * (i - 1)) + p->pos[i - 1];
+ srcLenCur = p->size[i - 1] - p->pos[i - 1];
+ srcFinishedCur = p->finished[i - 1];
+ }
+
+ if (i == p->numCoders - 1)
+ {
+ destCur = dest;
+ destLenCur = destLenOrig - *destLen;
+ }
+ else
+ {
+ if (p->pos[i] != p->size[i])
+ continue;
+ destCur = p->buf + (CODER_BUF_SIZE * i);
+ destLenCur = CODER_BUF_SIZE;
+ }
+
+ res = coder->Code(coder->p, destCur, &destLenCur, srcCur, &srcLenCur, srcFinishedCur, finishMode, &encodingWasFinished);
+
+ if (!encodingWasFinished)
+ allFinished = False;
+
+ if (i == 0)
+ {
+ *srcLen += srcLenCur;
+ src += srcLenCur;
+ }
+ else
+ {
+ p->pos[i - 1] += srcLenCur;
+ }
+
+ if (i == p->numCoders - 1)
+ {
+ *destLen += destLenCur;
+ dest += destLenCur;
+ }
+ else
+ {
+ p->size[i] = destLenCur;
+ p->pos[i] = 0;
+ p->finished[i] = encodingWasFinished;
+ }
+
+ if (res != SZ_OK)
+ return res;
+
+ if (destLenCur != 0 || srcLenCur != 0)
+ processed = True;
+ }
+ if (!processed)
+ break;
+ }
+ if (allFinished)
+ *status = CODER_STATUS_FINISHED_WITH_MARK;
+ return SZ_OK;
}
SRes Xz_ParseHeader(CXzStreamFlags *p, const Byte *buf)
{
- *p = (CXzStreamFlags)GetBe16(buf + XZ_SIG_SIZE);
- if (CrcCalc(buf + XZ_SIG_SIZE, XZ_STREAM_FLAGS_SIZE) !=
- GetUi32(buf + XZ_SIG_SIZE + XZ_STREAM_FLAGS_SIZE))
- return SZ_ERROR_NO_ARCHIVE;
- return XzFlags_IsSupported(*p) ? SZ_OK : SZ_ERROR_UNSUPPORTED;
+ *p = (CXzStreamFlags)GetBe16(buf + XZ_SIG_SIZE);
+ if (CrcCalc(buf + XZ_SIG_SIZE, XZ_STREAM_FLAGS_SIZE) !=
+ GetUi32(buf + XZ_SIG_SIZE + XZ_STREAM_FLAGS_SIZE))
+ return SZ_ERROR_NO_ARCHIVE;
+ return XzFlags_IsSupported(*p) ? SZ_OK : SZ_ERROR_UNSUPPORTED;
}
static Bool Xz_CheckFooter(CXzStreamFlags flags, UInt64 indexSize, const Byte *buf)
{
- return
- indexSize == (((UInt64)GetUi32(buf + 4) + 1) << 2) &&
- (GetUi32(buf) == CrcCalc(buf + 4, 6) &&
- flags == GetBe16(buf + 8) &&
- memcmp(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE) == 0);
+ return
+ indexSize == (((UInt64)GetUi32(buf + 4) + 1) << 2) &&
+ (GetUi32(buf) == CrcCalc(buf + 4, 6) &&
+ flags == GetBe16(buf + 8) &&
+ memcmp(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE) == 0);
}
#define READ_VARINT_AND_CHECK(buf, pos, size, res) \
- { unsigned s = Xz_ReadVarInt(buf + pos, size - pos, res); \
- if (s == 0) return SZ_ERROR_ARCHIVE; pos += s; }
+ { unsigned s = Xz_ReadVarInt(buf + pos, size - pos, res); \
+ if (s == 0) return SZ_ERROR_ARCHIVE; pos += s; }
SRes XzBlock_Parse(CXzBlock *p, const Byte *header)
{
- unsigned pos;
- int numFilters, i;
- UInt32 headerSize = (UInt32)header[0] << 2;
-
- if (CrcCalc(header, headerSize) != GetUi32(header + headerSize))
- return SZ_ERROR_ARCHIVE;
-
- pos = 1;
- if (pos == headerSize)
- return SZ_ERROR_ARCHIVE;
- p->flags = header[pos++];
-
- if (XzBlock_HasPackSize(p))
- {
- READ_VARINT_AND_CHECK(header, pos, headerSize, &p->packSize);
- if (p->packSize == 0 || p->packSize + headerSize >= (UInt64)1 << 63)
- return SZ_ERROR_ARCHIVE;
- }
-
- if (XzBlock_HasUnpackSize(p))
- READ_VARINT_AND_CHECK(header, pos, headerSize, &p->unpackSize);
-
- numFilters = XzBlock_GetNumFilters(p);
- for (i = 0; i < numFilters; i++)
- {
- CXzFilter *filter = p->filters + i;
- UInt64 size;
- READ_VARINT_AND_CHECK(header, pos, headerSize, &filter->id);
- READ_VARINT_AND_CHECK(header, pos, headerSize, &size);
- if (size > headerSize - pos || size > XZ_FILTER_PROPS_SIZE_MAX)
- return SZ_ERROR_ARCHIVE;
- filter->propsSize = (UInt32)size;
- memcpy(filter->props, header + pos, (size_t)size);
- pos += (unsigned)size;
-
- #ifdef XZ_DUMP
- printf("\nf[%d] = %2X: ", i, filter->id);
- {
- int i;
- for (i = 0; i < size; i++)
- printf(" %2X", filter->props[i]);
- }
- #endif
- }
-
- while (pos < headerSize)
- if (header[pos++] != 0)
- return SZ_ERROR_ARCHIVE;
- return SZ_OK;
+ unsigned pos;
+ int numFilters, i;
+ UInt32 headerSize = (UInt32)header[0] << 2;
+
+ if (CrcCalc(header, headerSize) != GetUi32(header + headerSize))
+ return SZ_ERROR_ARCHIVE;
+
+ pos = 1;
+ if (pos == headerSize)
+ return SZ_ERROR_ARCHIVE;
+ p->flags = header[pos++];
+
+ if (XzBlock_HasPackSize(p))
+ {
+ READ_VARINT_AND_CHECK(header, pos, headerSize, &p->packSize);
+ if (p->packSize == 0 || p->packSize + headerSize >= (UInt64)1 << 63)
+ return SZ_ERROR_ARCHIVE;
+ }
+
+ if (XzBlock_HasUnpackSize(p))
+ READ_VARINT_AND_CHECK(header, pos, headerSize, &p->unpackSize);
+
+ numFilters = XzBlock_GetNumFilters(p);
+ for (i = 0; i < numFilters; i++)
+ {
+ CXzFilter *filter = p->filters + i;
+ UInt64 size;
+ READ_VARINT_AND_CHECK(header, pos, headerSize, &filter->id);
+ READ_VARINT_AND_CHECK(header, pos, headerSize, &size);
+ if (size > headerSize - pos || size > XZ_FILTER_PROPS_SIZE_MAX)
+ return SZ_ERROR_ARCHIVE;
+ filter->propsSize = (UInt32)size;
+ memcpy(filter->props, header + pos, (size_t)size);
+ pos += (unsigned)size;
+
+ #ifdef XZ_DUMP
+ printf("\nf[%d] = %2X: ", i, filter->id);
+ {
+ int i;
+ for (i = 0; i < size; i++)
+ printf(" %2X", filter->props[i]);
+ }
+ #endif
+ }
+
+ while (pos < headerSize)
+ if (header[pos++] != 0)
+ return SZ_ERROR_ARCHIVE;
+ return SZ_OK;
}
SRes XzDec_Init(CMixCoder *p, const CXzBlock *block)
{
- int i;
- Bool needReInit = True;
- int numFilters = XzBlock_GetNumFilters(block);
- if (numFilters == p->numCoders)
- {
- for (i = 0; i < numFilters; i++)
- if (p->ids[i] != block->filters[numFilters - 1 - i].id)
- break;
- needReInit = (i != numFilters);
- }
- if (needReInit)
- {
- MixCoder_Free(p);
- p->numCoders = numFilters;
- for (i = 0; i < numFilters; i++)
- {
- const CXzFilter *f = &block->filters[numFilters - 1 - i];
- RINOK(MixCoder_SetFromMethod(p, i, f->id));
- }
- }
- for (i = 0; i < numFilters; i++)
- {
- const CXzFilter *f = &block->filters[numFilters - 1 - i];
- IStateCoder *sc = &p->coders[i];
- RINOK(sc->SetProps(sc->p, f->props, f->propsSize, p->alloc));
- }
- MixCoder_Init(p);
- return SZ_OK;
+ int i;
+ Bool needReInit = True;
+ int numFilters = XzBlock_GetNumFilters(block);
+ if (numFilters == p->numCoders)
+ {
+ for (i = 0; i < numFilters; i++)
+ if (p->ids[i] != block->filters[numFilters - 1 - i].id)
+ break;
+ needReInit = (i != numFilters);
+ }
+ if (needReInit)
+ {
+ MixCoder_Free(p);
+ p->numCoders = numFilters;
+ for (i = 0; i < numFilters; i++)
+ {
+ const CXzFilter *f = &block->filters[numFilters - 1 - i];
+ RINOK(MixCoder_SetFromMethod(p, i, f->id));
+ }
+ }
+ for (i = 0; i < numFilters; i++)
+ {
+ const CXzFilter *f = &block->filters[numFilters - 1 - i];
+ IStateCoder *sc = &p->coders[i];
+ RINOK(sc->SetProps(sc->p, f->props, f->propsSize, p->alloc));
+ }
+ MixCoder_Init(p);
+ return SZ_OK;
}
void XzUnpacker_Init(CXzUnpacker *p)
{
- p->state = XZ_STATE_STREAM_HEADER;
- p->pos = 0;
- p->numStreams = 0;
+ p->state = XZ_STATE_STREAM_HEADER;
+ p->pos = 0;
+ p->numStreams = 0;
}
void XzUnpacker_Construct(CXzUnpacker *p, ISzAlloc *alloc)
{
- MixCoder_Construct(&p->decoder, alloc);
- XzUnpacker_Init(p);
+ MixCoder_Construct(&p->decoder, alloc);
+ XzUnpacker_Init(p);
}
void XzUnpacker_Free(CXzUnpacker *p)
{
- MixCoder_Free(&p->decoder);
+ MixCoder_Free(&p->decoder);
}
SRes XzUnpacker_Code(CXzUnpacker *p, Byte *dest, SizeT *destLen,
- const Byte *src, SizeT *srcLen, int finishMode, ECoderStatus *status)
+ const Byte *src, SizeT *srcLen, int finishMode, ECoderStatus *status)
{
- SizeT destLenOrig = *destLen;
- SizeT srcLenOrig = *srcLen;
- *destLen = 0;
- *srcLen = 0;
- *status = CODER_STATUS_NOT_SPECIFIED;
- for (;;)
- {
- SizeT srcRem = srcLenOrig - *srcLen;
-
- if (p->state == XZ_STATE_BLOCK)
- {
- SizeT destLen2 = destLenOrig - *destLen;
- SizeT srcLen2 = srcLenOrig - *srcLen;
- SRes res;
- if (srcLen2 == 0 && destLen2 == 0)
- {
- *status = CODER_STATUS_NOT_FINISHED;
- return SZ_OK;
- }
-
- res = MixCoder_Code(&p->decoder, dest, &destLen2, src, &srcLen2, False, finishMode, status);
- XzCheck_Update(&p->check, dest, destLen2);
-
- (*srcLen) += srcLen2;
- src += srcLen2;
- p->packSize += srcLen2;
-
- (*destLen) += destLen2;
- dest += destLen2;
- p->unpackSize += destLen2;
-
- RINOK(res);
-
- if (*status == CODER_STATUS_FINISHED_WITH_MARK)
- {
- Byte temp[32];
- unsigned num = Xz_WriteVarInt(temp, p->packSize + p->blockHeaderSize + XzFlags_GetCheckSize(p->streamFlags));
- num += Xz_WriteVarInt(temp + num, p->unpackSize);
- Sha256_Update(&p->sha, temp, num);
- p->indexSize += num;
- p->numBlocks++;
-
- p->state = XZ_STATE_BLOCK_FOOTER;
- p->pos = 0;
- p->alignPos = 0;
- }
- else if (srcLen2 == 0 && destLen2 == 0)
- return SZ_OK;
-
- continue;
- }
-
- if (srcRem == 0)
- {
- *status = CODER_STATUS_NEEDS_MORE_INPUT;
- return SZ_OK;
- }
-
- switch(p->state)
- {
- case XZ_STATE_STREAM_HEADER:
- {
- if (p->pos < XZ_STREAM_HEADER_SIZE)
- {
- if (p->pos < XZ_SIG_SIZE && *src != XZ_SIG[p->pos])
- return SZ_ERROR_NO_ARCHIVE;
- p->buf[p->pos++] = *src++;
- (*srcLen)++;
- }
- else
- {
- RINOK(Xz_ParseHeader(&p->streamFlags, p->buf));
- p->state = XZ_STATE_BLOCK_HEADER;
- Sha256_Init(&p->sha);
- p->indexSize = 0;
- p->numBlocks = 0;
- p->pos = 0;
- }
- break;
- }
-
- case XZ_STATE_BLOCK_HEADER:
- {
- if (p->pos == 0)
- {
- p->buf[p->pos++] = *src++;
- (*srcLen)++;
- if (p->buf[0] == 0)
- {
- p->indexPreSize = 1 + Xz_WriteVarInt(p->buf + 1, p->numBlocks);
- p->indexPos = p->indexPreSize;
- p->indexSize += p->indexPreSize;
- Sha256_Final(&p->sha, p->shaDigest);
- Sha256_Init(&p->sha);
- p->crc = CrcUpdate(CRC_INIT_VAL, p->buf, p->indexPreSize);
- p->state = XZ_STATE_STREAM_INDEX;
- }
- p->blockHeaderSize = ((UInt32)p->buf[0] << 2) + 4;
- }
- else if (p->pos != p->blockHeaderSize)
- {
- UInt32 cur = p->blockHeaderSize - p->pos;
- if (cur > srcRem)
- cur = (UInt32)srcRem;
- memcpy(p->buf + p->pos, src, cur);
- p->pos += cur;
- (*srcLen) += cur;
- src += cur;
- }
- else
- {
- RINOK(XzBlock_Parse(&p->block, p->buf));
- p->state = XZ_STATE_BLOCK;
- p->packSize = 0;
- p->unpackSize = 0;
- XzCheck_Init(&p->check, XzFlags_GetCheckType(p->streamFlags));
- RINOK(XzDec_Init(&p->decoder, &p->block));
- }
- break;
- }
-
- case XZ_STATE_BLOCK_FOOTER:
- {
- if (((p->packSize + p->alignPos) & 3) != 0)
- {
- (*srcLen)++;
- p->alignPos++;
- if (*src++ != 0)
- return SZ_ERROR_CRC;
- }
- else
- {
- UInt32 checkSize = XzFlags_GetCheckSize(p->streamFlags);
- UInt32 cur = checkSize - p->pos;
- if (cur != 0)
- {
- if (cur > srcRem)
- cur = (UInt32)srcRem;
- memcpy(p->buf + p->pos, src, cur);
- p->pos += cur;
- (*srcLen) += cur;
- src += cur;
- }
- else
- {
- Byte digest[XZ_CHECK_SIZE_MAX];
- p->state = XZ_STATE_BLOCK_HEADER;
- p->pos = 0;
- if (XzCheck_Final(&p->check, digest) && memcmp(digest, p->buf, checkSize) != 0)
- return SZ_ERROR_CRC;
- }
- }
- break;
- }
-
- case XZ_STATE_STREAM_INDEX:
- {
- if (p->pos < p->indexPreSize)
- {
- (*srcLen)++;
- if (*src++ != p->buf[p->pos++])
- return SZ_ERROR_CRC;
- }
- else
- {
- if (p->indexPos < p->indexSize)
- {
- UInt64 cur = p->indexSize - p->indexPos;
- if (srcRem > cur)
- srcRem = (SizeT)cur;
- p->crc = CrcUpdate(p->crc, src, srcRem);
- Sha256_Update(&p->sha, src, srcRem);
- (*srcLen) += srcRem;
- src += srcRem;
- p->indexPos += srcRem;
- }
- else if ((p->indexPos & 3) != 0)
- {
- Byte b = *src++;
- p->crc = CRC_UPDATE_BYTE(p->crc, b);
- (*srcLen)++;
- p->indexPos++;
- p->indexSize++;
- if (b != 0)
- return SZ_ERROR_CRC;
- }
- else
- {
- Byte digest[SHA256_DIGEST_SIZE];
- p->state = XZ_STATE_STREAM_INDEX_CRC;
- p->indexSize += 4;
- p->pos = 0;
- Sha256_Final(&p->sha, digest);
- if (memcmp(digest, p->shaDigest, SHA256_DIGEST_SIZE) != 0)
- return SZ_ERROR_CRC;
- }
- }
- break;
- }
-
- case XZ_STATE_STREAM_INDEX_CRC:
- {
- if (p->pos < 4)
- {
- (*srcLen)++;
- p->buf[p->pos++] = *src++;
- }
- else
- {
- p->state = XZ_STATE_STREAM_FOOTER;
- p->pos = 0;
- if (CRC_GET_DIGEST(p->crc) != GetUi32(p->buf))
- return SZ_ERROR_CRC;
- }
- break;
- }
-
- case XZ_STATE_STREAM_FOOTER:
- {
- UInt32 cur = XZ_STREAM_FOOTER_SIZE - p->pos;
- if (cur > srcRem)
- cur = (UInt32)srcRem;
- memcpy(p->buf + p->pos, src, cur);
- p->pos += cur;
- (*srcLen) += cur;
- src += cur;
- if (p->pos == XZ_STREAM_FOOTER_SIZE)
- {
- p->state = XZ_STATE_STREAM_PADDING;
- p->numStreams++;
- p->padSize = 0;
- if (!Xz_CheckFooter(p->streamFlags, p->indexSize, p->buf))
- return SZ_ERROR_CRC;
- }
- break;
- }
-
- case XZ_STATE_STREAM_PADDING:
- {
- if (*src != 0)
- {
- if (((UInt32)p->padSize & 3) != 0)
- return SZ_ERROR_NO_ARCHIVE;
- p->pos = 0;
- p->state = XZ_STATE_STREAM_HEADER;
- }
- else
- {
- (*srcLen)++;
- src++;
- p->padSize++;
- }
- break;
- }
-
- case XZ_STATE_BLOCK: break; /* to disable GCC warning */
- }
- }
- /*
- if (p->state == XZ_STATE_FINISHED)
- *status = CODER_STATUS_FINISHED_WITH_MARK;
- return SZ_OK;
- */
+ SizeT destLenOrig = *destLen;
+ SizeT srcLenOrig = *srcLen;
+ *destLen = 0;
+ *srcLen = 0;
+ *status = CODER_STATUS_NOT_SPECIFIED;
+ for (;;)
+ {
+ SizeT srcRem = srcLenOrig - *srcLen;
+
+ if (p->state == XZ_STATE_BLOCK)
+ {
+ SizeT destLen2 = destLenOrig - *destLen;
+ SizeT srcLen2 = srcLenOrig - *srcLen;
+ SRes res;
+ if (srcLen2 == 0 && destLen2 == 0)
+ {
+ *status = CODER_STATUS_NOT_FINISHED;
+ return SZ_OK;
+ }
+
+ res = MixCoder_Code(&p->decoder, dest, &destLen2, src, &srcLen2, False, finishMode, status);
+ XzCheck_Update(&p->check, dest, destLen2);
+
+ (*srcLen) += srcLen2;
+ src += srcLen2;
+ p->packSize += srcLen2;
+
+ (*destLen) += destLen2;
+ dest += destLen2;
+ p->unpackSize += destLen2;
+
+ RINOK(res);
+
+ if (*status == CODER_STATUS_FINISHED_WITH_MARK)
+ {
+ Byte temp[32];
+ unsigned num = Xz_WriteVarInt(temp, p->packSize + p->blockHeaderSize + XzFlags_GetCheckSize(p->streamFlags));
+ num += Xz_WriteVarInt(temp + num, p->unpackSize);
+ Sha256_Update(&p->sha, temp, num);
+ p->indexSize += num;
+ p->numBlocks++;
+
+ p->state = XZ_STATE_BLOCK_FOOTER;
+ p->pos = 0;
+ p->alignPos = 0;
+ }
+ else if (srcLen2 == 0 && destLen2 == 0)
+ return SZ_OK;
+
+ continue;
+ }
+
+ if (srcRem == 0)
+ {
+ *status = CODER_STATUS_NEEDS_MORE_INPUT;
+ return SZ_OK;
+ }
+
+ switch(p->state)
+ {
+ case XZ_STATE_STREAM_HEADER:
+ {
+ if (p->pos < XZ_STREAM_HEADER_SIZE)
+ {
+ if (p->pos < XZ_SIG_SIZE && *src != XZ_SIG[p->pos])
+ return SZ_ERROR_NO_ARCHIVE;
+ p->buf[p->pos++] = *src++;
+ (*srcLen)++;
+ }
+ else
+ {
+ RINOK(Xz_ParseHeader(&p->streamFlags, p->buf));
+ p->state = XZ_STATE_BLOCK_HEADER;
+ Sha256_Init(&p->sha);
+ p->indexSize = 0;
+ p->numBlocks = 0;
+ p->pos = 0;
+ }
+ break;
+ }
+
+ case XZ_STATE_BLOCK_HEADER:
+ {
+ if (p->pos == 0)
+ {
+ p->buf[p->pos++] = *src++;
+ (*srcLen)++;
+ if (p->buf[0] == 0)
+ {
+ p->indexPreSize = 1 + Xz_WriteVarInt(p->buf + 1, p->numBlocks);
+ p->indexPos = p->indexPreSize;
+ p->indexSize += p->indexPreSize;
+ Sha256_Final(&p->sha, p->shaDigest);
+ Sha256_Init(&p->sha);
+ p->crc = CrcUpdate(CRC_INIT_VAL, p->buf, p->indexPreSize);
+ p->state = XZ_STATE_STREAM_INDEX;
+ }
+ p->blockHeaderSize = ((UInt32)p->buf[0] << 2) + 4;
+ }
+ else if (p->pos != p->blockHeaderSize)
+ {
+ UInt32 cur = p->blockHeaderSize - p->pos;
+ if (cur > srcRem)
+ cur = (UInt32)srcRem;
+ memcpy(p->buf + p->pos, src, cur);
+ p->pos += cur;
+ (*srcLen) += cur;
+ src += cur;
+ }
+ else
+ {
+ RINOK(XzBlock_Parse(&p->block, p->buf));
+ p->state = XZ_STATE_BLOCK;
+ p->packSize = 0;
+ p->unpackSize = 0;
+ XzCheck_Init(&p->check, XzFlags_GetCheckType(p->streamFlags));
+ RINOK(XzDec_Init(&p->decoder, &p->block));
+ }
+ break;
+ }
+
+ case XZ_STATE_BLOCK_FOOTER:
+ {
+ if (((p->packSize + p->alignPos) & 3) != 0)
+ {
+ (*srcLen)++;
+ p->alignPos++;
+ if (*src++ != 0)
+ return SZ_ERROR_CRC;
+ }
+ else
+ {
+ UInt32 checkSize = XzFlags_GetCheckSize(p->streamFlags);
+ UInt32 cur = checkSize - p->pos;
+ if (cur != 0)
+ {
+ if (cur > srcRem)
+ cur = (UInt32)srcRem;
+ memcpy(p->buf + p->pos, src, cur);
+ p->pos += cur;
+ (*srcLen) += cur;
+ src += cur;
+ }
+ else
+ {
+ Byte digest[XZ_CHECK_SIZE_MAX];
+ p->state = XZ_STATE_BLOCK_HEADER;
+ p->pos = 0;
+ if (XzCheck_Final(&p->check, digest) && memcmp(digest, p->buf, checkSize) != 0)
+ return SZ_ERROR_CRC;
+ }
+ }
+ break;
+ }
+
+ case XZ_STATE_STREAM_INDEX:
+ {
+ if (p->pos < p->indexPreSize)
+ {
+ (*srcLen)++;
+ if (*src++ != p->buf[p->pos++])
+ return SZ_ERROR_CRC;
+ }
+ else
+ {
+ if (p->indexPos < p->indexSize)
+ {
+ UInt64 cur = p->indexSize - p->indexPos;
+ if (srcRem > cur)
+ srcRem = (SizeT)cur;
+ p->crc = CrcUpdate(p->crc, src, srcRem);
+ Sha256_Update(&p->sha, src, srcRem);
+ (*srcLen) += srcRem;
+ src += srcRem;
+ p->indexPos += srcRem;
+ }
+ else if ((p->indexPos & 3) != 0)
+ {
+ Byte b = *src++;
+ p->crc = CRC_UPDATE_BYTE(p->crc, b);
+ (*srcLen)++;
+ p->indexPos++;
+ p->indexSize++;
+ if (b != 0)
+ return SZ_ERROR_CRC;
+ }
+ else
+ {
+ Byte digest[SHA256_DIGEST_SIZE];
+ p->state = XZ_STATE_STREAM_INDEX_CRC;
+ p->indexSize += 4;
+ p->pos = 0;
+ Sha256_Final(&p->sha, digest);
+ if (memcmp(digest, p->shaDigest, SHA256_DIGEST_SIZE) != 0)
+ return SZ_ERROR_CRC;
+ }
+ }
+ break;
+ }
+
+ case XZ_STATE_STREAM_INDEX_CRC:
+ {
+ if (p->pos < 4)
+ {
+ (*srcLen)++;
+ p->buf[p->pos++] = *src++;
+ }
+ else
+ {
+ p->state = XZ_STATE_STREAM_FOOTER;
+ p->pos = 0;
+ if (CRC_GET_DIGEST(p->crc) != GetUi32(p->buf))
+ return SZ_ERROR_CRC;
+ }
+ break;
+ }
+
+ case XZ_STATE_STREAM_FOOTER:
+ {
+ UInt32 cur = XZ_STREAM_FOOTER_SIZE - p->pos;
+ if (cur > srcRem)
+ cur = (UInt32)srcRem;
+ memcpy(p->buf + p->pos, src, cur);
+ p->pos += cur;
+ (*srcLen) += cur;
+ src += cur;
+ if (p->pos == XZ_STREAM_FOOTER_SIZE)
+ {
+ p->state = XZ_STATE_STREAM_PADDING;
+ p->numStreams++;
+ p->padSize = 0;
+ if (!Xz_CheckFooter(p->streamFlags, p->indexSize, p->buf))
+ return SZ_ERROR_CRC;
+ }
+ break;
+ }
+
+ case XZ_STATE_STREAM_PADDING:
+ {
+ if (*src != 0)
+ {
+ if (((UInt32)p->padSize & 3) != 0)
+ return SZ_ERROR_NO_ARCHIVE;
+ p->pos = 0;
+ p->state = XZ_STATE_STREAM_HEADER;
+ }
+ else
+ {
+ (*srcLen)++;
+ src++;
+ p->padSize++;
+ }
+ break;
+ }
+
+ case XZ_STATE_BLOCK: break; /* to disable GCC warning */
+ }
+ }
+ /*
+ if (p->state == XZ_STATE_FINISHED)
+ *status = CODER_STATUS_FINISHED_WITH_MARK;
+ return SZ_OK;
+ */
}
Bool XzUnpacker_IsStreamWasFinished(CXzUnpacker *p)
{
- return (p->state == XZ_STATE_STREAM_PADDING) && (((UInt32)p->padSize & 3) == 0);
+ return (p->state == XZ_STATE_STREAM_PADDING) && (((UInt32)p->padSize & 3) == 0);
}
diff --git a/src/lib/lib7z/XzEnc.c b/src/lib/lib7z/XzEnc.c
index 8a206f4b9af..4d41b28619f 100644
--- a/src/lib/lib7z/XzEnc.c
+++ b/src/lib/lib7z/XzEnc.c
@@ -31,171 +31,171 @@ static ISzAlloc g_Alloc = { SzAlloc, SzFree };
static SRes WriteBytes(ISeqOutStream *s, const void *buf, UInt32 size)
{
- return (s->Write(s, buf, size) == size) ? SZ_OK : SZ_ERROR_WRITE;
+ return (s->Write(s, buf, size) == size) ? SZ_OK : SZ_ERROR_WRITE;
}
static SRes WriteBytesAndCrc(ISeqOutStream *s, const void *buf, UInt32 size, UInt32 *crc)
{
- *crc = CrcUpdate(*crc, buf, size);
- return WriteBytes(s, buf, size);
+ *crc = CrcUpdate(*crc, buf, size);
+ return WriteBytes(s, buf, size);
}
SRes Xz_WriteHeader(CXzStreamFlags f, ISeqOutStream *s)
{
- UInt32 crc;
- Byte header[XZ_STREAM_HEADER_SIZE];
- memcpy(header, XZ_SIG, XZ_SIG_SIZE);
- header[XZ_SIG_SIZE] = (Byte)(f >> 8);
- header[XZ_SIG_SIZE + 1] = (Byte)(f & 0xFF);
- crc = CrcCalc(header + XZ_SIG_SIZE, XZ_STREAM_FLAGS_SIZE);
- SetUi32(header + XZ_SIG_SIZE + XZ_STREAM_FLAGS_SIZE, crc);
- return WriteBytes(s, header, XZ_STREAM_HEADER_SIZE);
+ UInt32 crc;
+ Byte header[XZ_STREAM_HEADER_SIZE];
+ memcpy(header, XZ_SIG, XZ_SIG_SIZE);
+ header[XZ_SIG_SIZE] = (Byte)(f >> 8);
+ header[XZ_SIG_SIZE + 1] = (Byte)(f & 0xFF);
+ crc = CrcCalc(header + XZ_SIG_SIZE, XZ_STREAM_FLAGS_SIZE);
+ SetUi32(header + XZ_SIG_SIZE + XZ_STREAM_FLAGS_SIZE, crc);
+ return WriteBytes(s, header, XZ_STREAM_HEADER_SIZE);
}
SRes XzBlock_WriteHeader(const CXzBlock *p, ISeqOutStream *s)
{
- Byte header[XZ_BLOCK_HEADER_SIZE_MAX];
-
- unsigned pos = 1;
- int numFilters, i;
- header[pos++] = p->flags;
-
- if (XzBlock_HasPackSize(p)) pos += Xz_WriteVarInt(header + pos, p->packSize);
- if (XzBlock_HasUnpackSize(p)) pos += Xz_WriteVarInt(header + pos, p->unpackSize);
- numFilters = XzBlock_GetNumFilters(p);
- for (i = 0; i < numFilters; i++)
- {
- const CXzFilter *f = &p->filters[i];
- pos += Xz_WriteVarInt(header + pos, f->id);
- pos += Xz_WriteVarInt(header + pos, f->propsSize);
- memcpy(header + pos, f->props, f->propsSize);
- pos += f->propsSize;
- }
- while((pos & 3) != 0)
- header[pos++] = 0;
- header[0] = (Byte)(pos >> 2);
- SetUi32(header + pos, CrcCalc(header, pos));
- return WriteBytes(s, header, pos + 4);
+ Byte header[XZ_BLOCK_HEADER_SIZE_MAX];
+
+ unsigned pos = 1;
+ int numFilters, i;
+ header[pos++] = p->flags;
+
+ if (XzBlock_HasPackSize(p)) pos += Xz_WriteVarInt(header + pos, p->packSize);
+ if (XzBlock_HasUnpackSize(p)) pos += Xz_WriteVarInt(header + pos, p->unpackSize);
+ numFilters = XzBlock_GetNumFilters(p);
+ for (i = 0; i < numFilters; i++)
+ {
+ const CXzFilter *f = &p->filters[i];
+ pos += Xz_WriteVarInt(header + pos, f->id);
+ pos += Xz_WriteVarInt(header + pos, f->propsSize);
+ memcpy(header + pos, f->props, f->propsSize);
+ pos += f->propsSize;
+ }
+ while((pos & 3) != 0)
+ header[pos++] = 0;
+ header[0] = (Byte)(pos >> 2);
+ SetUi32(header + pos, CrcCalc(header, pos));
+ return WriteBytes(s, header, pos + 4);
}
SRes Xz_WriteFooter(CXzStream *p, ISeqOutStream *s)
{
- Byte buf[32];
- UInt64 globalPos;
- {
- UInt32 crc = CRC_INIT_VAL;
- unsigned pos = 1 + Xz_WriteVarInt(buf + 1, p->numBlocks);
- size_t i;
-
- globalPos = pos;
- buf[0] = 0;
- RINOK(WriteBytesAndCrc(s, buf, pos, &crc));
- for (i = 0; i < p->numBlocks; i++)
- {
- const CXzBlockSizes *block = &p->blocks[i];
- pos = Xz_WriteVarInt(buf, block->totalSize);
- pos += Xz_WriteVarInt(buf + pos, block->unpackSize);
- globalPos += pos;
- RINOK(WriteBytesAndCrc(s, buf, pos, &crc));
- }
- pos = ((unsigned)globalPos & 3);
- if (pos != 0)
- {
- buf[0] = buf[1] = buf[2] = 0;
- RINOK(WriteBytesAndCrc(s, buf, 4 - pos, &crc));
- globalPos += 4 - pos;
- }
- {
- SetUi32(buf, CRC_GET_DIGEST(crc));
- RINOK(WriteBytes(s, buf, 4));
- globalPos += 4;
- }
- }
-
- {
- UInt32 indexSize = (UInt32)((globalPos >> 2) - 1);
- SetUi32(buf + 4, indexSize);
- buf[8] = (Byte)(p->flags >> 8);
- buf[9] = (Byte)(p->flags & 0xFF);
- SetUi32(buf, CrcCalc(buf + 4, 6));
- memcpy(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE);
- return WriteBytes(s, buf, 12);
- }
+ Byte buf[32];
+ UInt64 globalPos;
+ {
+ UInt32 crc = CRC_INIT_VAL;
+ unsigned pos = 1 + Xz_WriteVarInt(buf + 1, p->numBlocks);
+ size_t i;
+
+ globalPos = pos;
+ buf[0] = 0;
+ RINOK(WriteBytesAndCrc(s, buf, pos, &crc));
+ for (i = 0; i < p->numBlocks; i++)
+ {
+ const CXzBlockSizes *block = &p->blocks[i];
+ pos = Xz_WriteVarInt(buf, block->totalSize);
+ pos += Xz_WriteVarInt(buf + pos, block->unpackSize);
+ globalPos += pos;
+ RINOK(WriteBytesAndCrc(s, buf, pos, &crc));
+ }
+ pos = ((unsigned)globalPos & 3);
+ if (pos != 0)
+ {
+ buf[0] = buf[1] = buf[2] = 0;
+ RINOK(WriteBytesAndCrc(s, buf, 4 - pos, &crc));
+ globalPos += 4 - pos;
+ }
+ {
+ SetUi32(buf, CRC_GET_DIGEST(crc));
+ RINOK(WriteBytes(s, buf, 4));
+ globalPos += 4;
+ }
+ }
+
+ {
+ UInt32 indexSize = (UInt32)((globalPos >> 2) - 1);
+ SetUi32(buf + 4, indexSize);
+ buf[8] = (Byte)(p->flags >> 8);
+ buf[9] = (Byte)(p->flags & 0xFF);
+ SetUi32(buf, CrcCalc(buf + 4, 6));
+ memcpy(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE);
+ return WriteBytes(s, buf, 12);
+ }
}
SRes Xz_AddIndexRecord(CXzStream *p, UInt64 unpackSize, UInt64 totalSize, ISzAlloc *alloc)
{
- if (p->blocks == 0 || p->numBlocksAllocated == p->numBlocks)
- {
- size_t num = (p->numBlocks + 1) * 2;
- size_t newSize = sizeof(CXzBlockSizes) * num;
- CXzBlockSizes *blocks;
- if (newSize / sizeof(CXzBlockSizes) != num)
- return SZ_ERROR_MEM;
- blocks = alloc->Alloc(alloc, newSize);
- if (blocks == 0)
- return SZ_ERROR_MEM;
- if (p->numBlocks != 0)
- {
- memcpy(blocks, p->blocks, p->numBlocks * sizeof(CXzBlockSizes));
- Xz_Free(p, alloc);
- }
- p->blocks = blocks;
- p->numBlocksAllocated = num;
- }
- {
- CXzBlockSizes *block = &p->blocks[p->numBlocks++];
- block->totalSize = totalSize;
- block->unpackSize = unpackSize;
- }
- return SZ_OK;
+ if (p->blocks == 0 || p->numBlocksAllocated == p->numBlocks)
+ {
+ size_t num = (p->numBlocks + 1) * 2;
+ size_t newSize = sizeof(CXzBlockSizes) * num;
+ CXzBlockSizes *blocks;
+ if (newSize / sizeof(CXzBlockSizes) != num)
+ return SZ_ERROR_MEM;
+ blocks = alloc->Alloc(alloc, newSize);
+ if (blocks == 0)
+ return SZ_ERROR_MEM;
+ if (p->numBlocks != 0)
+ {
+ memcpy(blocks, p->blocks, p->numBlocks * sizeof(CXzBlockSizes));
+ Xz_Free(p, alloc);
+ }
+ p->blocks = blocks;
+ p->numBlocksAllocated = num;
+ }
+ {
+ CXzBlockSizes *block = &p->blocks[p->numBlocks++];
+ block->totalSize = totalSize;
+ block->unpackSize = unpackSize;
+ }
+ return SZ_OK;
}
/* ---------- CSeqCheckInStream ---------- */
typedef struct
{
- ISeqInStream p;
- ISeqInStream *realStream;
- UInt64 processed;
- CXzCheck check;
+ ISeqInStream p;
+ ISeqInStream *realStream;
+ UInt64 processed;
+ CXzCheck check;
} CSeqCheckInStream;
void SeqCheckInStream_Init(CSeqCheckInStream *p, int mode)
{
- p->processed = 0;
- XzCheck_Init(&p->check, mode);
+ p->processed = 0;
+ XzCheck_Init(&p->check, mode);
}
void SeqCheckInStream_GetDigest(CSeqCheckInStream *p, Byte *digest)
{
- XzCheck_Final(&p->check, digest);
+ XzCheck_Final(&p->check, digest);
}
static SRes SeqCheckInStream_Read(void *pp, void *data, size_t *size)
{
- CSeqCheckInStream *p = (CSeqCheckInStream *)pp;
- SRes res = p->realStream->Read(p->realStream, data, size);
- XzCheck_Update(&p->check, data, *size);
- p->processed += *size;
- return res;
+ CSeqCheckInStream *p = (CSeqCheckInStream *)pp;
+ SRes res = p->realStream->Read(p->realStream, data, size);
+ XzCheck_Update(&p->check, data, *size);
+ p->processed += *size;
+ return res;
}
/* ---------- CSeqSizeOutStream ---------- */
typedef struct
{
- ISeqOutStream p;
- ISeqOutStream *realStream;
- UInt64 processed;
+ ISeqOutStream p;
+ ISeqOutStream *realStream;
+ UInt64 processed;
} CSeqSizeOutStream;
static size_t MyWrite(void *pp, const void *data, size_t size)
{
- CSeqSizeOutStream *p = (CSeqSizeOutStream *)pp;
- size = p->realStream->Write(p->realStream, data, size);
- p->processed += size;
- return size;
+ CSeqSizeOutStream *p = (CSeqSizeOutStream *)pp;
+ size = p->realStream->Write(p->realStream, data, size);
+ p->processed += size;
+ return size;
}
/* ---------- CSeqInFilter ---------- */
@@ -204,77 +204,77 @@ static size_t MyWrite(void *pp, const void *data, size_t size)
typedef struct
{
- ISeqInStream p;
- ISeqInStream *realStream;
- IStateCoder StateCoder;
- Byte *buf;
- size_t curPos;
- size_t endPos;
- int srcWasFinished;
+ ISeqInStream p;
+ ISeqInStream *realStream;
+ IStateCoder StateCoder;
+ Byte *buf;
+ size_t curPos;
+ size_t endPos;
+ int srcWasFinished;
} CSeqInFilter;
static SRes SeqInFilter_Read(void *pp, void *data, size_t *size)
{
- CSeqInFilter *p = (CSeqInFilter *)pp;
- size_t sizeOriginal = *size;
- if (sizeOriginal == 0)
- return S_OK;
- *size = 0;
- for (;;)
- {
- if (!p->srcWasFinished && p->curPos == p->endPos)
- {
- p->curPos = 0;
- p->endPos = FILTER_BUF_SIZE;
- RINOK(p->realStream->Read(p->realStream, p->buf, &p->endPos));
- if (p->endPos == 0)
- p->srcWasFinished = 1;
- }
- {
- SizeT srcLen = p->endPos - p->curPos;
- int wasFinished;
- SRes res;
- *size = sizeOriginal;
- res = p->StateCoder.Code(p->StateCoder.p, data, size, p->buf + p->curPos, &srcLen,
- p->srcWasFinished, CODER_FINISH_ANY, &wasFinished);
- p->curPos += srcLen;
- if (*size != 0 || srcLen == 0 || res != 0)
- return res;
- }
- }
+ CSeqInFilter *p = (CSeqInFilter *)pp;
+ size_t sizeOriginal = *size;
+ if (sizeOriginal == 0)
+ return S_OK;
+ *size = 0;
+ for (;;)
+ {
+ if (!p->srcWasFinished && p->curPos == p->endPos)
+ {
+ p->curPos = 0;
+ p->endPos = FILTER_BUF_SIZE;
+ RINOK(p->realStream->Read(p->realStream, p->buf, &p->endPos));
+ if (p->endPos == 0)
+ p->srcWasFinished = 1;
+ }
+ {
+ SizeT srcLen = p->endPos - p->curPos;
+ int wasFinished;
+ SRes res;
+ *size = sizeOriginal;
+ res = p->StateCoder.Code(p->StateCoder.p, data, size, p->buf + p->curPos, &srcLen,
+ p->srcWasFinished, CODER_FINISH_ANY, &wasFinished);
+ p->curPos += srcLen;
+ if (*size != 0 || srcLen == 0 || res != 0)
+ return res;
+ }
+ }
}
static void SeqInFilter_Construct(CSeqInFilter *p)
{
- p->buf = NULL;
- p->p.Read = SeqInFilter_Read;
+ p->buf = NULL;
+ p->p.Read = SeqInFilter_Read;
}
static void SeqInFilter_Free(CSeqInFilter *p)
{
- if (p->buf)
- {
- g_Alloc.Free(&g_Alloc, p->buf);
- p->buf = NULL;
- }
+ if (p->buf)
+ {
+ g_Alloc.Free(&g_Alloc, p->buf);
+ p->buf = NULL;
+ }
}
SRes BraState_SetFromMethod(IStateCoder *p, UInt64 id, int encodeMode, ISzAlloc *alloc);
static SRes SeqInFilter_Init(CSeqInFilter *p, const CXzFilter *props)
{
- if (!p->buf)
- {
- p->buf = g_Alloc.Alloc(&g_Alloc, FILTER_BUF_SIZE);
- if (!p->buf)
- return SZ_ERROR_MEM;
- }
- p->curPos = p->endPos = 0;
- p->srcWasFinished = 0;
- RINOK(BraState_SetFromMethod(&p->StateCoder, props->id, 1, &g_Alloc));
- RINOK(p->StateCoder.SetProps(p->StateCoder.p, props->props, props->propsSize, &g_Alloc));
- p->StateCoder.Init(p->StateCoder.p);
- return S_OK;
+ if (!p->buf)
+ {
+ p->buf = g_Alloc.Alloc(&g_Alloc, FILTER_BUF_SIZE);
+ if (!p->buf)
+ return SZ_ERROR_MEM;
+ }
+ p->curPos = p->endPos = 0;
+ p->srcWasFinished = 0;
+ RINOK(BraState_SetFromMethod(&p->StateCoder, props->id, 1, &g_Alloc));
+ RINOK(p->StateCoder.SetProps(p->StateCoder.p, props->props, props->propsSize, &g_Alloc));
+ p->StateCoder.Init(p->StateCoder.p);
+ return S_OK;
}
/* ---------- CSbEncInStream ---------- */
@@ -283,52 +283,52 @@ static SRes SeqInFilter_Init(CSeqInFilter *p, const CXzFilter *props)
typedef struct
{
- ISeqInStream p;
- ISeqInStream *inStream;
- CSbEnc enc;
+ ISeqInStream p;
+ ISeqInStream *inStream;
+ CSbEnc enc;
} CSbEncInStream;
static SRes SbEncInStream_Read(void *pp, void *data, size_t *size)
{
- CSbEncInStream *p = (CSbEncInStream *)pp;
- size_t sizeOriginal = *size;
- if (sizeOriginal == 0)
- return S_OK;
- for (;;)
- {
- if (p->enc.needRead && !p->enc.readWasFinished)
- {
- size_t processed = p->enc.needReadSizeMax;
- RINOK(p->inStream->Read(p->inStream, p->enc.buf + p->enc.readPos, &processed));
- p->enc.readPos += processed;
- if (processed == 0)
- {
- p->enc.readWasFinished = True;
- p->enc.isFinalFinished = True;
- }
- p->enc.needRead = False;
- }
- *size = sizeOriginal;
- RINOK(SbEnc_Read(&p->enc, data, size));
- if (*size != 0 || !p->enc.needRead)
- return S_OK;
- }
+ CSbEncInStream *p = (CSbEncInStream *)pp;
+ size_t sizeOriginal = *size;
+ if (sizeOriginal == 0)
+ return S_OK;
+ for (;;)
+ {
+ if (p->enc.needRead && !p->enc.readWasFinished)
+ {
+ size_t processed = p->enc.needReadSizeMax;
+ RINOK(p->inStream->Read(p->inStream, p->enc.buf + p->enc.readPos, &processed));
+ p->enc.readPos += processed;
+ if (processed == 0)
+ {
+ p->enc.readWasFinished = True;
+ p->enc.isFinalFinished = True;
+ }
+ p->enc.needRead = False;
+ }
+ *size = sizeOriginal;
+ RINOK(SbEnc_Read(&p->enc, data, size));
+ if (*size != 0 || !p->enc.needRead)
+ return S_OK;
+ }
}
void SbEncInStream_Construct(CSbEncInStream *p, ISzAlloc *alloc)
{
- SbEnc_Construct(&p->enc, alloc);
- p->p.Read = SbEncInStream_Read;
+ SbEnc_Construct(&p->enc, alloc);
+ p->p.Read = SbEncInStream_Read;
}
SRes SbEncInStream_Init(CSbEncInStream *p)
{
- return SbEnc_Init(&p->enc);
+ return SbEnc_Init(&p->enc);
}
void SbEncInStream_Free(CSbEncInStream *p)
{
- SbEnc_Free(&p->enc);
+ SbEnc_Free(&p->enc);
}
#endif
@@ -336,185 +336,185 @@ void SbEncInStream_Free(CSbEncInStream *p)
typedef struct
{
- CLzma2EncHandle lzma2;
- #ifdef USE_SUBBLOCK
- CSbEncInStream sb;
- #endif
- CSeqInFilter filter;
- ISzAlloc *alloc;
- ISzAlloc *bigAlloc;
+ CLzma2EncHandle lzma2;
+ #ifdef USE_SUBBLOCK
+ CSbEncInStream sb;
+ #endif
+ CSeqInFilter filter;
+ ISzAlloc *alloc;
+ ISzAlloc *bigAlloc;
} CLzma2WithFilters;
static void Lzma2WithFilters_Construct(CLzma2WithFilters *p, ISzAlloc *alloc, ISzAlloc *bigAlloc)
{
- p->alloc = alloc;
- p->bigAlloc = bigAlloc;
- p->lzma2 = NULL;
- #ifdef USE_SUBBLOCK
- SbEncInStream_Construct(&p->sb, alloc);
- #endif
- SeqInFilter_Construct(&p->filter);
+ p->alloc = alloc;
+ p->bigAlloc = bigAlloc;
+ p->lzma2 = NULL;
+ #ifdef USE_SUBBLOCK
+ SbEncInStream_Construct(&p->sb, alloc);
+ #endif
+ SeqInFilter_Construct(&p->filter);
}
static SRes Lzma2WithFilters_Create(CLzma2WithFilters *p)
{
- p->lzma2 = Lzma2Enc_Create(p->alloc, p->bigAlloc);
- if (p->lzma2 == 0)
- return SZ_ERROR_MEM;
- return SZ_OK;
+ p->lzma2 = Lzma2Enc_Create(p->alloc, p->bigAlloc);
+ if (p->lzma2 == 0)
+ return SZ_ERROR_MEM;
+ return SZ_OK;
}
static void Lzma2WithFilters_Free(CLzma2WithFilters *p)
{
- SeqInFilter_Free(&p->filter);
- #ifdef USE_SUBBLOCK
- SbEncInStream_Free(&p->sb);
- #endif
- if (p->lzma2)
- {
- Lzma2Enc_Destroy(p->lzma2);
- p->lzma2 = NULL;
- }
+ SeqInFilter_Free(&p->filter);
+ #ifdef USE_SUBBLOCK
+ SbEncInStream_Free(&p->sb);
+ #endif
+ if (p->lzma2)
+ {
+ Lzma2Enc_Destroy(p->lzma2);
+ p->lzma2 = NULL;
+ }
}
void XzProps_Init(CXzProps *p)
{
- p->lzma2Props = 0;
- p->filterProps = 0;
- p->checkId = XZ_CHECK_CRC32;
+ p->lzma2Props = 0;
+ p->filterProps = 0;
+ p->checkId = XZ_CHECK_CRC32;
}
void XzFilterProps_Init(CXzFilterProps *p)
{
- p->id = 0;
- p->delta = 0;
- p->ip= 0;
- p->ipDefined = False;
+ p->id = 0;
+ p->delta = 0;
+ p->ip= 0;
+ p->ipDefined = False;
}
static SRes Xz_Compress(CXzStream *xz, CLzma2WithFilters *lzmaf,
- ISeqOutStream *outStream, ISeqInStream *inStream,
- const CXzProps *props, ICompressProgress *progress)
+ ISeqOutStream *outStream, ISeqInStream *inStream,
+ const CXzProps *props, ICompressProgress *progress)
{
- xz->flags = (Byte)props->checkId;
-
- RINOK(Lzma2Enc_SetProps(lzmaf->lzma2, props->lzma2Props));
- RINOK(Xz_WriteHeader(xz->flags, outStream));
-
- {
- CSeqCheckInStream checkInStream;
- CSeqSizeOutStream seqSizeOutStream;
- CXzBlock block;
- int filterIndex = 0;
- CXzFilter *filter = NULL;
- const CXzFilterProps *fp = props->filterProps;
-
- XzBlock_ClearFlags(&block);
- XzBlock_SetNumFilters(&block, 1 + (fp ? 1 : 0));
-
- if (fp)
- {
- filter = &block.filters[filterIndex++];
- filter->id = fp->id;
- filter->propsSize = 0;
- if (fp->id == XZ_ID_Delta)
- {
- filter->props[0] = (Byte)(fp->delta - 1);
- filter->propsSize = 1;
- }
- else if (fp->ipDefined)
- {
- SetUi32(filter->props, fp->ip);
- filter->propsSize = 4;
- }
- }
-
- {
- CXzFilter *f = &block.filters[filterIndex++];
- f->id = XZ_ID_LZMA2;
- f->propsSize = 1;
- f->props[0] = Lzma2Enc_WriteProperties(lzmaf->lzma2);
- }
-
- seqSizeOutStream.p.Write = MyWrite;
- seqSizeOutStream.realStream = outStream;
- seqSizeOutStream.processed = 0;
-
- RINOK(XzBlock_WriteHeader(&block, &seqSizeOutStream.p));
-
- checkInStream.p.Read = SeqCheckInStream_Read;
- checkInStream.realStream = inStream;
- SeqCheckInStream_Init(&checkInStream, XzFlags_GetCheckType(xz->flags));
-
- if (fp)
- {
- #ifdef USE_SUBBLOCK
- if (fp->id == XZ_ID_Subblock)
- {
- lzmaf->sb.inStream = &checkInStream.p;
- RINOK(SbEncInStream_Init(&lzmaf->sb));
- }
- else
- #endif
- {
- lzmaf->filter.realStream = &checkInStream.p;
- RINOK(SeqInFilter_Init(&lzmaf->filter, filter));
- }
- }
-
- {
- UInt64 packPos = seqSizeOutStream.processed;
- SRes res = Lzma2Enc_Encode(lzmaf->lzma2, &seqSizeOutStream.p,
- fp ?
- #ifdef USE_SUBBLOCK
- (fp->id == XZ_ID_Subblock) ? &lzmaf->sb.p:
- #endif
- &lzmaf->filter.p:
- &checkInStream.p,
- progress);
- RINOK(res);
- block.unpackSize = checkInStream.processed;
- block.packSize = seqSizeOutStream.processed - packPos;
- }
-
- {
- unsigned padSize = 0;
- Byte buf[128];
- while((((unsigned)block.packSize + padSize) & 3) != 0)
- buf[padSize++] = 0;
- SeqCheckInStream_GetDigest(&checkInStream, buf + padSize);
- RINOK(WriteBytes(&seqSizeOutStream.p, buf, padSize + XzFlags_GetCheckSize(xz->flags)));
- RINOK(Xz_AddIndexRecord(xz, block.unpackSize, seqSizeOutStream.processed - padSize, &g_Alloc));
- }
- }
- return Xz_WriteFooter(xz, outStream);
+ xz->flags = (Byte)props->checkId;
+
+ RINOK(Lzma2Enc_SetProps(lzmaf->lzma2, props->lzma2Props));
+ RINOK(Xz_WriteHeader(xz->flags, outStream));
+
+ {
+ CSeqCheckInStream checkInStream;
+ CSeqSizeOutStream seqSizeOutStream;
+ CXzBlock block;
+ int filterIndex = 0;
+ CXzFilter *filter = NULL;
+ const CXzFilterProps *fp = props->filterProps;
+
+ XzBlock_ClearFlags(&block);
+ XzBlock_SetNumFilters(&block, 1 + (fp ? 1 : 0));
+
+ if (fp)
+ {
+ filter = &block.filters[filterIndex++];
+ filter->id = fp->id;
+ filter->propsSize = 0;
+ if (fp->id == XZ_ID_Delta)
+ {
+ filter->props[0] = (Byte)(fp->delta - 1);
+ filter->propsSize = 1;
+ }
+ else if (fp->ipDefined)
+ {
+ SetUi32(filter->props, fp->ip);
+ filter->propsSize = 4;
+ }
+ }
+
+ {
+ CXzFilter *f = &block.filters[filterIndex++];
+ f->id = XZ_ID_LZMA2;
+ f->propsSize = 1;
+ f->props[0] = Lzma2Enc_WriteProperties(lzmaf->lzma2);
+ }
+
+ seqSizeOutStream.p.Write = MyWrite;
+ seqSizeOutStream.realStream = outStream;
+ seqSizeOutStream.processed = 0;
+
+ RINOK(XzBlock_WriteHeader(&block, &seqSizeOutStream.p));
+
+ checkInStream.p.Read = SeqCheckInStream_Read;
+ checkInStream.realStream = inStream;
+ SeqCheckInStream_Init(&checkInStream, XzFlags_GetCheckType(xz->flags));
+
+ if (fp)
+ {
+ #ifdef USE_SUBBLOCK
+ if (fp->id == XZ_ID_Subblock)
+ {
+ lzmaf->sb.inStream = &checkInStream.p;
+ RINOK(SbEncInStream_Init(&lzmaf->sb));
+ }
+ else
+ #endif
+ {
+ lzmaf->filter.realStream = &checkInStream.p;
+ RINOK(SeqInFilter_Init(&lzmaf->filter, filter));
+ }
+ }
+
+ {
+ UInt64 packPos = seqSizeOutStream.processed;
+ SRes res = Lzma2Enc_Encode(lzmaf->lzma2, &seqSizeOutStream.p,
+ fp ?
+ #ifdef USE_SUBBLOCK
+ (fp->id == XZ_ID_Subblock) ? &lzmaf->sb.p:
+ #endif
+ &lzmaf->filter.p:
+ &checkInStream.p,
+ progress);
+ RINOK(res);
+ block.unpackSize = checkInStream.processed;
+ block.packSize = seqSizeOutStream.processed - packPos;
+ }
+
+ {
+ unsigned padSize = 0;
+ Byte buf[128];
+ while((((unsigned)block.packSize + padSize) & 3) != 0)
+ buf[padSize++] = 0;
+ SeqCheckInStream_GetDigest(&checkInStream, buf + padSize);
+ RINOK(WriteBytes(&seqSizeOutStream.p, buf, padSize + XzFlags_GetCheckSize(xz->flags)));
+ RINOK(Xz_AddIndexRecord(xz, block.unpackSize, seqSizeOutStream.processed - padSize, &g_Alloc));
+ }
+ }
+ return Xz_WriteFooter(xz, outStream);
}
SRes Xz_Encode(ISeqOutStream *outStream, ISeqInStream *inStream,
- const CXzProps *props, ICompressProgress *progress)
+ const CXzProps *props, ICompressProgress *progress)
{
- SRes res;
- CXzStream xz;
- CLzma2WithFilters lzmaf;
- Xz_Construct(&xz);
- Lzma2WithFilters_Construct(&lzmaf, &g_Alloc, &g_BigAlloc);
- res = Lzma2WithFilters_Create(&lzmaf);
- if (res == SZ_OK)
- res = Xz_Compress(&xz, &lzmaf, outStream, inStream, props, progress);
- Lzma2WithFilters_Free(&lzmaf);
- Xz_Free(&xz, &g_Alloc);
- return res;
+ SRes res;
+ CXzStream xz;
+ CLzma2WithFilters lzmaf;
+ Xz_Construct(&xz);
+ Lzma2WithFilters_Construct(&lzmaf, &g_Alloc, &g_BigAlloc);
+ res = Lzma2WithFilters_Create(&lzmaf);
+ if (res == SZ_OK)
+ res = Xz_Compress(&xz, &lzmaf, outStream, inStream, props, progress);
+ Lzma2WithFilters_Free(&lzmaf);
+ Xz_Free(&xz, &g_Alloc);
+ return res;
}
SRes Xz_EncodeEmpty(ISeqOutStream *outStream)
{
- SRes res;
- CXzStream xz;
- Xz_Construct(&xz);
- res = Xz_WriteHeader(xz.flags, outStream);
- if (res == SZ_OK)
- res = Xz_WriteFooter(&xz, outStream);
- Xz_Free(&xz, &g_Alloc);
- return res;
+ SRes res;
+ CXzStream xz;
+ Xz_Construct(&xz);
+ res = Xz_WriteHeader(xz.flags, outStream);
+ if (res == SZ_OK)
+ res = Xz_WriteFooter(&xz, outStream);
+ Xz_Free(&xz, &g_Alloc);
+ return res;
}
diff --git a/src/lib/lib7z/XzEnc.h b/src/lib/lib7z/XzEnc.h
index c3c19eca008..5140c72a3a4 100644
--- a/src/lib/lib7z/XzEnc.h
+++ b/src/lib/lib7z/XzEnc.h
@@ -12,25 +12,25 @@ EXTERN_C_BEGIN
typedef struct
{
- UInt32 id;
- UInt32 delta;
- UInt32 ip;
- int ipDefined;
+ UInt32 id;
+ UInt32 delta;
+ UInt32 ip;
+ int ipDefined;
} CXzFilterProps;
void XzFilterProps_Init(CXzFilterProps *p);
typedef struct
{
- const CLzma2EncProps *lzma2Props;
- const CXzFilterProps *filterProps;
- unsigned checkId;
+ const CLzma2EncProps *lzma2Props;
+ const CXzFilterProps *filterProps;
+ unsigned checkId;
} CXzProps;
void XzProps_Init(CXzProps *p);
SRes Xz_Encode(ISeqOutStream *outStream, ISeqInStream *inStream,
- const CXzProps *props, ICompressProgress *progress);
+ const CXzProps *props, ICompressProgress *progress);
SRes Xz_EncodeEmpty(ISeqOutStream *outStream);
diff --git a/src/lib/lib7z/XzIn.c b/src/lib/lib7z/XzIn.c
index adb24c0eaac..ddd3a54599f 100644
--- a/src/lib/lib7z/XzIn.c
+++ b/src/lib/lib7z/XzIn.c
@@ -9,56 +9,56 @@
SRes Xz_ReadHeader(CXzStreamFlags *p, ISeqInStream *inStream)
{
- Byte sig[XZ_STREAM_HEADER_SIZE];
- RINOK(SeqInStream_Read2(inStream, sig, XZ_STREAM_HEADER_SIZE, SZ_ERROR_NO_ARCHIVE));
- if (memcmp(sig, XZ_SIG, XZ_SIG_SIZE) != 0)
- return SZ_ERROR_NO_ARCHIVE;
- return Xz_ParseHeader(p, sig);
+ Byte sig[XZ_STREAM_HEADER_SIZE];
+ RINOK(SeqInStream_Read2(inStream, sig, XZ_STREAM_HEADER_SIZE, SZ_ERROR_NO_ARCHIVE));
+ if (memcmp(sig, XZ_SIG, XZ_SIG_SIZE) != 0)
+ return SZ_ERROR_NO_ARCHIVE;
+ return Xz_ParseHeader(p, sig);
}
#define READ_VARINT_AND_CHECK(buf, pos, size, res) \
- { unsigned s = Xz_ReadVarInt(buf + pos, size - pos, res); \
- if (s == 0) return SZ_ERROR_ARCHIVE; pos += s; }
+ { unsigned s = Xz_ReadVarInt(buf + pos, size - pos, res); \
+ if (s == 0) return SZ_ERROR_ARCHIVE; pos += s; }
SRes XzBlock_ReadHeader(CXzBlock *p, ISeqInStream *inStream, Bool *isIndex, UInt32 *headerSizeRes)
{
- Byte header[XZ_BLOCK_HEADER_SIZE_MAX];
- unsigned headerSize;
- *headerSizeRes = 0;
- RINOK(SeqInStream_ReadByte(inStream, &header[0]));
- headerSize = ((unsigned)header[0] << 2) + 4;
- if (headerSize == 0)
- {
- *headerSizeRes = 1;
- *isIndex = True;
- return SZ_OK;
- }
-
- *isIndex = False;
- *headerSizeRes = headerSize;
- RINOK(SeqInStream_Read(inStream, header + 1, headerSize - 1));
- return XzBlock_Parse(p, header);
+ Byte header[XZ_BLOCK_HEADER_SIZE_MAX];
+ unsigned headerSize;
+ *headerSizeRes = 0;
+ RINOK(SeqInStream_ReadByte(inStream, &header[0]));
+ headerSize = ((unsigned)header[0] << 2) + 4;
+ if (headerSize == 0)
+ {
+ *headerSizeRes = 1;
+ *isIndex = True;
+ return SZ_OK;
+ }
+
+ *isIndex = False;
+ *headerSizeRes = headerSize;
+ RINOK(SeqInStream_Read(inStream, header + 1, headerSize - 1));
+ return XzBlock_Parse(p, header);
}
#define ADD_SIZE_CHECH(size, val) \
- { UInt64 newSize = size + (val); if (newSize < size) return XZ_SIZE_OVERFLOW; size = newSize; }
+ { UInt64 newSize = size + (val); if (newSize < size) return XZ_SIZE_OVERFLOW; size = newSize; }
UInt64 Xz_GetUnpackSize(const CXzStream *p)
{
- UInt64 size = 0;
- size_t i;
- for (i = 0; i < p->numBlocks; i++)
- ADD_SIZE_CHECH(size, p->blocks[i].unpackSize);
- return size;
+ UInt64 size = 0;
+ size_t i;
+ for (i = 0; i < p->numBlocks; i++)
+ ADD_SIZE_CHECH(size, p->blocks[i].unpackSize);
+ return size;
}
UInt64 Xz_GetPackSize(const CXzStream *p)
{
- UInt64 size = 0;
- size_t i;
- for (i = 0; i < p->numBlocks; i++)
- ADD_SIZE_CHECH(size, (p->blocks[i].totalSize + 3) & ~(UInt64)3);
- return size;
+ UInt64 size = 0;
+ size_t i;
+ for (i = 0; i < p->numBlocks; i++)
+ ADD_SIZE_CHECH(size, (p->blocks[i].totalSize + 3) & ~(UInt64)3);
+ return size;
}
/*
@@ -70,156 +70,156 @@ SRes XzBlock_ReadFooter(CXzBlock *p, CXzStreamFlags f, ISeqInStream *inStream)
static SRes Xz_ReadIndex2(CXzStream *p, const Byte *buf, size_t size, ISzAlloc *alloc)
{
- size_t i, numBlocks, crcStartPos, pos = 1;
- UInt32 crc;
-
- if (size < 5 || buf[0] != 0)
- return SZ_ERROR_ARCHIVE;
-
- size -= 4;
- crc = CrcCalc(buf, size);
- if (crc != GetUi32(buf + size))
- return SZ_ERROR_ARCHIVE;
-
- {
- UInt64 numBlocks64;
- READ_VARINT_AND_CHECK(buf, pos, size, &numBlocks64);
- numBlocks = (size_t)numBlocks64;
- if (numBlocks != numBlocks64 || numBlocks * 2 > size)
- return SZ_ERROR_ARCHIVE;
- }
-
- crcStartPos = pos;
- Xz_Free(p, alloc);
- if (numBlocks != 0)
- {
- p->numBlocks = numBlocks;
- p->numBlocksAllocated = numBlocks;
- p->blocks = alloc->Alloc(alloc, sizeof(CXzBlockSizes) * numBlocks);
- if (p->blocks == 0)
- return SZ_ERROR_MEM;
- for (i = 0; i < numBlocks; i++)
- {
- CXzBlockSizes *block = &p->blocks[i];
- READ_VARINT_AND_CHECK(buf, pos, size, &block->totalSize);
- READ_VARINT_AND_CHECK(buf, pos, size, &block->unpackSize);
- if (block->totalSize == 0)
- return SZ_ERROR_ARCHIVE;
- }
- }
- while ((pos & 3) != 0)
- if (buf[pos++] != 0)
- return SZ_ERROR_ARCHIVE;
- return (pos == size) ? SZ_OK : SZ_ERROR_ARCHIVE;
+ size_t i, numBlocks, crcStartPos, pos = 1;
+ UInt32 crc;
+
+ if (size < 5 || buf[0] != 0)
+ return SZ_ERROR_ARCHIVE;
+
+ size -= 4;
+ crc = CrcCalc(buf, size);
+ if (crc != GetUi32(buf + size))
+ return SZ_ERROR_ARCHIVE;
+
+ {
+ UInt64 numBlocks64;
+ READ_VARINT_AND_CHECK(buf, pos, size, &numBlocks64);
+ numBlocks = (size_t)numBlocks64;
+ if (numBlocks != numBlocks64 || numBlocks * 2 > size)
+ return SZ_ERROR_ARCHIVE;
+ }
+
+ crcStartPos = pos;
+ Xz_Free(p, alloc);
+ if (numBlocks != 0)
+ {
+ p->numBlocks = numBlocks;
+ p->numBlocksAllocated = numBlocks;
+ p->blocks = alloc->Alloc(alloc, sizeof(CXzBlockSizes) * numBlocks);
+ if (p->blocks == 0)
+ return SZ_ERROR_MEM;
+ for (i = 0; i < numBlocks; i++)
+ {
+ CXzBlockSizes *block = &p->blocks[i];
+ READ_VARINT_AND_CHECK(buf, pos, size, &block->totalSize);
+ READ_VARINT_AND_CHECK(buf, pos, size, &block->unpackSize);
+ if (block->totalSize == 0)
+ return SZ_ERROR_ARCHIVE;
+ }
+ }
+ while ((pos & 3) != 0)
+ if (buf[pos++] != 0)
+ return SZ_ERROR_ARCHIVE;
+ return (pos == size) ? SZ_OK : SZ_ERROR_ARCHIVE;
}
static SRes Xz_ReadIndex(CXzStream *p, ILookInStream *stream, UInt64 indexSize, ISzAlloc *alloc)
{
- SRes res;
- size_t size;
- Byte *buf;
- if (indexSize > ((UInt32)1 << 31))
- return SZ_ERROR_UNSUPPORTED;
- size = (size_t)indexSize;
- if (size != indexSize)
- return SZ_ERROR_UNSUPPORTED;
- buf = alloc->Alloc(alloc, size);
- if (buf == 0)
- return SZ_ERROR_MEM;
- res = LookInStream_Read2(stream, buf, size, SZ_ERROR_UNSUPPORTED);
- if (res == SZ_OK)
- res = Xz_ReadIndex2(p, buf, size, alloc);
- alloc->Free(alloc, buf);
- return res;
+ SRes res;
+ size_t size;
+ Byte *buf;
+ if (indexSize > ((UInt32)1 << 31))
+ return SZ_ERROR_UNSUPPORTED;
+ size = (size_t)indexSize;
+ if (size != indexSize)
+ return SZ_ERROR_UNSUPPORTED;
+ buf = alloc->Alloc(alloc, size);
+ if (buf == 0)
+ return SZ_ERROR_MEM;
+ res = LookInStream_Read2(stream, buf, size, SZ_ERROR_UNSUPPORTED);
+ if (res == SZ_OK)
+ res = Xz_ReadIndex2(p, buf, size, alloc);
+ alloc->Free(alloc, buf);
+ return res;
}
static SRes SeekFromCur(ILookInStream *inStream, Int64 *res)
{
- return inStream->Seek(inStream, res, SZ_SEEK_CUR);
+ return inStream->Seek(inStream, res, SZ_SEEK_CUR);
}
static SRes Xz_ReadBackward(CXzStream *p, ILookInStream *stream, Int64 *startOffset, ISzAlloc *alloc)
{
- UInt64 indexSize;
- Byte buf[XZ_STREAM_FOOTER_SIZE];
-
- if ((*startOffset & 3) != 0 || *startOffset < XZ_STREAM_FOOTER_SIZE)
- return SZ_ERROR_NO_ARCHIVE;
- *startOffset = -XZ_STREAM_FOOTER_SIZE;
- RINOK(SeekFromCur(stream, startOffset));
-
- RINOK(LookInStream_Read2(stream, buf, XZ_STREAM_FOOTER_SIZE, SZ_ERROR_NO_ARCHIVE));
-
- if (memcmp(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE) != 0)
- {
- UInt32 total = 0;
- *startOffset += XZ_STREAM_FOOTER_SIZE;
- for (;;)
- {
- size_t i;
- #define TEMP_BUF_SIZE (1 << 10)
- Byte tempBuf[TEMP_BUF_SIZE];
- if (*startOffset < XZ_STREAM_FOOTER_SIZE || total > (1 << 16))
- return SZ_ERROR_NO_ARCHIVE;
- i = (*startOffset > TEMP_BUF_SIZE) ? TEMP_BUF_SIZE : (size_t)*startOffset;
- total += (UInt32)i;
- *startOffset = -(Int64)i;
- RINOK(SeekFromCur(stream, startOffset));
- RINOK(LookInStream_Read2(stream, tempBuf, i, SZ_ERROR_NO_ARCHIVE));
- for (; i != 0; i--)
- if (tempBuf[i - 1] != 0)
- break;
- if (i != 0)
- {
- if ((i & 3) != 0)
- return SZ_ERROR_NO_ARCHIVE;
- *startOffset += i;
- break;
- }
- }
- if (*startOffset < XZ_STREAM_FOOTER_SIZE)
- return SZ_ERROR_NO_ARCHIVE;
- *startOffset -= XZ_STREAM_FOOTER_SIZE;
- RINOK(stream->Seek(stream, startOffset, SZ_SEEK_SET));
- RINOK(LookInStream_Read2(stream, buf, XZ_STREAM_FOOTER_SIZE, SZ_ERROR_NO_ARCHIVE));
- if (memcmp(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE) != 0)
- return SZ_ERROR_NO_ARCHIVE;
- }
-
- p->flags = (CXzStreamFlags)GetBe16(buf + 8);
-
- if (!XzFlags_IsSupported(p->flags))
- return SZ_ERROR_UNSUPPORTED;
-
- if (GetUi32(buf) != CrcCalc(buf + 4, 6))
- return SZ_ERROR_ARCHIVE;
-
- indexSize = ((UInt64)GetUi32(buf + 4) + 1) << 2;
-
- *startOffset = -(Int64)(indexSize + XZ_STREAM_FOOTER_SIZE);
- RINOK(SeekFromCur(stream, startOffset));
-
- RINOK(Xz_ReadIndex(p, stream, indexSize, alloc));
-
- {
- UInt64 totalSize = Xz_GetPackSize(p);
- UInt64 sum = XZ_STREAM_HEADER_SIZE + totalSize + indexSize;
- if (totalSize == XZ_SIZE_OVERFLOW ||
- sum >= ((UInt64)1 << 63) ||
- totalSize >= ((UInt64)1 << 63))
- return SZ_ERROR_ARCHIVE;
- *startOffset = -(Int64)sum;
- RINOK(SeekFromCur(stream, startOffset));
- }
- {
- CXzStreamFlags headerFlags;
- CSecToRead secToRead;
- SecToRead_CreateVTable(&secToRead);
- secToRead.realStream = stream;
-
- RINOK(Xz_ReadHeader(&headerFlags, &secToRead.s));
- return (p->flags == headerFlags) ? SZ_OK : SZ_ERROR_ARCHIVE;
- }
+ UInt64 indexSize;
+ Byte buf[XZ_STREAM_FOOTER_SIZE];
+
+ if ((*startOffset & 3) != 0 || *startOffset < XZ_STREAM_FOOTER_SIZE)
+ return SZ_ERROR_NO_ARCHIVE;
+ *startOffset = -XZ_STREAM_FOOTER_SIZE;
+ RINOK(SeekFromCur(stream, startOffset));
+
+ RINOK(LookInStream_Read2(stream, buf, XZ_STREAM_FOOTER_SIZE, SZ_ERROR_NO_ARCHIVE));
+
+ if (memcmp(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE) != 0)
+ {
+ UInt32 total = 0;
+ *startOffset += XZ_STREAM_FOOTER_SIZE;
+ for (;;)
+ {
+ size_t i;
+ #define TEMP_BUF_SIZE (1 << 10)
+ Byte tempBuf[TEMP_BUF_SIZE];
+ if (*startOffset < XZ_STREAM_FOOTER_SIZE || total > (1 << 16))
+ return SZ_ERROR_NO_ARCHIVE;
+ i = (*startOffset > TEMP_BUF_SIZE) ? TEMP_BUF_SIZE : (size_t)*startOffset;
+ total += (UInt32)i;
+ *startOffset = -(Int64)i;
+ RINOK(SeekFromCur(stream, startOffset));
+ RINOK(LookInStream_Read2(stream, tempBuf, i, SZ_ERROR_NO_ARCHIVE));
+ for (; i != 0; i--)
+ if (tempBuf[i - 1] != 0)
+ break;
+ if (i != 0)
+ {
+ if ((i & 3) != 0)
+ return SZ_ERROR_NO_ARCHIVE;
+ *startOffset += i;
+ break;
+ }
+ }
+ if (*startOffset < XZ_STREAM_FOOTER_SIZE)
+ return SZ_ERROR_NO_ARCHIVE;
+ *startOffset -= XZ_STREAM_FOOTER_SIZE;
+ RINOK(stream->Seek(stream, startOffset, SZ_SEEK_SET));
+ RINOK(LookInStream_Read2(stream, buf, XZ_STREAM_FOOTER_SIZE, SZ_ERROR_NO_ARCHIVE));
+ if (memcmp(buf + 10, XZ_FOOTER_SIG, XZ_FOOTER_SIG_SIZE) != 0)
+ return SZ_ERROR_NO_ARCHIVE;
+ }
+
+ p->flags = (CXzStreamFlags)GetBe16(buf + 8);
+
+ if (!XzFlags_IsSupported(p->flags))
+ return SZ_ERROR_UNSUPPORTED;
+
+ if (GetUi32(buf) != CrcCalc(buf + 4, 6))
+ return SZ_ERROR_ARCHIVE;
+
+ indexSize = ((UInt64)GetUi32(buf + 4) + 1) << 2;
+
+ *startOffset = -(Int64)(indexSize + XZ_STREAM_FOOTER_SIZE);
+ RINOK(SeekFromCur(stream, startOffset));
+
+ RINOK(Xz_ReadIndex(p, stream, indexSize, alloc));
+
+ {
+ UInt64 totalSize = Xz_GetPackSize(p);
+ UInt64 sum = XZ_STREAM_HEADER_SIZE + totalSize + indexSize;
+ if (totalSize == XZ_SIZE_OVERFLOW ||
+ sum >= ((UInt64)1 << 63) ||
+ totalSize >= ((UInt64)1 << 63))
+ return SZ_ERROR_ARCHIVE;
+ *startOffset = -(Int64)sum;
+ RINOK(SeekFromCur(stream, startOffset));
+ }
+ {
+ CXzStreamFlags headerFlags;
+ CSecToRead secToRead;
+ SecToRead_CreateVTable(&secToRead);
+ secToRead.realStream = stream;
+
+ RINOK(Xz_ReadHeader(&headerFlags, &secToRead.s));
+ return (p->flags == headerFlags) ? SZ_OK : SZ_ERROR_ARCHIVE;
+ }
}
@@ -227,36 +227,36 @@ static SRes Xz_ReadBackward(CXzStream *p, ILookInStream *stream, Int64 *startOff
void Xzs_Construct(CXzs *p)
{
- p->num = p->numAllocated = 0;
- p->streams = 0;
+ p->num = p->numAllocated = 0;
+ p->streams = 0;
}
void Xzs_Free(CXzs *p, ISzAlloc *alloc)
{
- size_t i;
- for (i = 0; i < p->num; i++)
- Xz_Free(&p->streams[i], alloc);
- alloc->Free(alloc, p->streams);
- p->num = p->numAllocated = 0;
- p->streams = 0;
+ size_t i;
+ for (i = 0; i < p->num; i++)
+ Xz_Free(&p->streams[i], alloc);
+ alloc->Free(alloc, p->streams);
+ p->num = p->numAllocated = 0;
+ p->streams = 0;
}
UInt64 Xzs_GetNumBlocks(const CXzs *p)
{
- UInt64 num = 0;
- size_t i;
- for (i = 0; i < p->num; i++)
- num += p->streams[i].numBlocks;
- return num;
+ UInt64 num = 0;
+ size_t i;
+ for (i = 0; i < p->num; i++)
+ num += p->streams[i].numBlocks;
+ return num;
}
UInt64 Xzs_GetUnpackSize(const CXzs *p)
{
- UInt64 size = 0;
- size_t i;
- for (i = 0; i < p->num; i++)
- ADD_SIZE_CHECH(size, Xz_GetUnpackSize(&p->streams[i]));
- return size;
+ UInt64 size = 0;
+ size_t i;
+ for (i = 0; i < p->num; i++)
+ ADD_SIZE_CHECH(size, Xz_GetUnpackSize(&p->streams[i]));
+ return size;
}
/*
@@ -272,34 +272,34 @@ UInt64 Xzs_GetPackSize(const CXzs *p)
SRes Xzs_ReadBackward(CXzs *p, ILookInStream *stream, Int64 *startOffset, ICompressProgress *progress, ISzAlloc *alloc)
{
- Int64 endOffset = 0;
- RINOK(stream->Seek(stream, &endOffset, SZ_SEEK_END));
- *startOffset = endOffset;
- for (;;)
- {
- CXzStream st;
- SRes res;
- Xz_Construct(&st);
- res = Xz_ReadBackward(&st, stream, startOffset, alloc);
- st.startOffset = *startOffset;
- RINOK(res);
- if (p->num == p->numAllocated)
- {
- size_t newNum = p->num + p->num / 4 + 1;
- Byte *data = (Byte *)alloc->Alloc(alloc, newNum * sizeof(CXzStream));
- if (data == 0)
- return SZ_ERROR_MEM;
- p->numAllocated = newNum;
- memcpy(data, p->streams, p->num * sizeof(CXzStream));
- alloc->Free(alloc, p->streams);
- p->streams = (CXzStream *)data;
- }
- p->streams[p->num++] = st;
- if (*startOffset == 0)
- break;
- RINOK(stream->Seek(stream, startOffset, SZ_SEEK_SET));
- if (progress && progress->Progress(progress, endOffset - *startOffset, (UInt64)(Int64)-1) != SZ_OK)
- return SZ_ERROR_PROGRESS;
- }
- return SZ_OK;
+ Int64 endOffset = 0;
+ RINOK(stream->Seek(stream, &endOffset, SZ_SEEK_END));
+ *startOffset = endOffset;
+ for (;;)
+ {
+ CXzStream st;
+ SRes res;
+ Xz_Construct(&st);
+ res = Xz_ReadBackward(&st, stream, startOffset, alloc);
+ st.startOffset = *startOffset;
+ RINOK(res);
+ if (p->num == p->numAllocated)
+ {
+ size_t newNum = p->num + p->num / 4 + 1;
+ Byte *data = (Byte *)alloc->Alloc(alloc, newNum * sizeof(CXzStream));
+ if (data == 0)
+ return SZ_ERROR_MEM;
+ p->numAllocated = newNum;
+ memcpy(data, p->streams, p->num * sizeof(CXzStream));
+ alloc->Free(alloc, p->streams);
+ p->streams = (CXzStream *)data;
+ }
+ p->streams[p->num++] = st;
+ if (*startOffset == 0)
+ break;
+ RINOK(stream->Seek(stream, startOffset, SZ_SEEK_SET));
+ if (progress && progress->Progress(progress, endOffset - *startOffset, (UInt64)(Int64)-1) != SZ_OK)
+ return SZ_ERROR_PROGRESS;
+ }
+ return SZ_OK;
}
diff --git a/src/lib/lib7z/x7zAlloc.c b/src/lib/lib7z/x7zAlloc.c
index 1678156caf9..a1d3e6d0b20 100644
--- a/src/lib/lib7z/x7zAlloc.c
+++ b/src/lib/lib7z/x7zAlloc.c
@@ -20,57 +20,57 @@ int g_allocCountTemp = 0;
void *SzAlloc(void *p, size_t size)
{
- p = p;
- if (size == 0)
- return 0;
- #ifdef _SZ_ALLOC_DEBUG
- fprintf(stderr, "\nAlloc %10d bytes; count = %10d", size, g_allocCount);
- g_allocCount++;
- #endif
- return malloc(size);
+ p = p;
+ if (size == 0)
+ return 0;
+ #ifdef _SZ_ALLOC_DEBUG
+ fprintf(stderr, "\nAlloc %10d bytes; count = %10d", size, g_allocCount);
+ g_allocCount++;
+ #endif
+ return malloc(size);
}
void SzFree(void *p, void *address)
{
- p = p;
- #ifdef _SZ_ALLOC_DEBUG
- if (address != 0)
- {
- g_allocCount--;
- fprintf(stderr, "\nFree; count = %10d", g_allocCount);
- }
- #endif
- free(address);
+ p = p;
+ #ifdef _SZ_ALLOC_DEBUG
+ if (address != 0)
+ {
+ g_allocCount--;
+ fprintf(stderr, "\nFree; count = %10d", g_allocCount);
+ }
+ #endif
+ free(address);
}
void *SzAllocTemp(void *p, size_t size)
{
- p = p;
- if (size == 0)
- return 0;
- #ifdef _SZ_ALLOC_DEBUG
- fprintf(stderr, "\nAlloc_temp %10d bytes; count = %10d", size, g_allocCountTemp);
- g_allocCountTemp++;
- #ifdef _WIN32_7Z
- return HeapAlloc(GetProcessHeap(), 0, size);
- #endif
- #endif
- return malloc(size);
+ p = p;
+ if (size == 0)
+ return 0;
+ #ifdef _SZ_ALLOC_DEBUG
+ fprintf(stderr, "\nAlloc_temp %10d bytes; count = %10d", size, g_allocCountTemp);
+ g_allocCountTemp++;
+ #ifdef _WIN32_7Z
+ return HeapAlloc(GetProcessHeap(), 0, size);
+ #endif
+ #endif
+ return malloc(size);
}
void SzFreeTemp(void *p, void *address)
{
- p = p;
- #ifdef _SZ_ALLOC_DEBUG
- if (address != 0)
- {
- g_allocCountTemp--;
- fprintf(stderr, "\nFree_temp; count = %10d", g_allocCountTemp);
- }
- #ifdef _WIN32_7Z
- HeapFree(GetProcessHeap(), 0, address);
- return;
- #endif
- #endif
- free(address);
+ p = p;
+ #ifdef _SZ_ALLOC_DEBUG
+ if (address != 0)
+ {
+ g_allocCountTemp--;
+ fprintf(stderr, "\nFree_temp; count = %10d", g_allocCountTemp);
+ }
+ #ifdef _WIN32_7Z
+ HeapFree(GetProcessHeap(), 0, address);
+ return;
+ #endif
+ #endif
+ free(address);
}
diff --git a/src/lib/lib7z/x7zFile.c b/src/lib/lib7z/x7zFile.c
index 8eb02b5020c..e8d735b648d 100644
--- a/src/lib/lib7z/x7zFile.c
+++ b/src/lib/lib7z/x7zFile.c
@@ -27,32 +27,32 @@
void File_Construct(CSzFile *p)
{
- #ifdef USE_WINDOWS_FILE
- p->handle = INVALID_HANDLE_VALUE;
- #else
- p->file = NULL;
- #endif
+ #ifdef USE_WINDOWS_FILE
+ p->handle = INVALID_HANDLE_VALUE;
+ #else
+ p->file = NULL;
+ #endif
}
#if !defined(UNDER_CE) || !defined(USE_WINDOWS_FILE)
static WRes File_Open(CSzFile *p, const char *name, int writeMode)
{
- #ifdef USE_WINDOWS_FILE
- p->handle = CreateFileA(name,
- writeMode ? GENERIC_WRITE : GENERIC_READ,
- FILE_SHARE_READ, NULL,
- writeMode ? CREATE_ALWAYS : OPEN_EXISTING,
- FILE_ATTRIBUTE_NORMAL, NULL);
- return (p->handle != INVALID_HANDLE_VALUE) ? 0 : GetLastError();
- #else
- p->file = fopen(name, writeMode ? "wb+" : "rb");
- return (p->file != 0) ? 0 :
- #ifdef UNDER_CE
- 2; /* ENOENT */
- #else
- errno;
- #endif
- #endif
+ #ifdef USE_WINDOWS_FILE
+ p->handle = CreateFileA(name,
+ writeMode ? GENERIC_WRITE : GENERIC_READ,
+ FILE_SHARE_READ, NULL,
+ writeMode ? CREATE_ALWAYS : OPEN_EXISTING,
+ FILE_ATTRIBUTE_NORMAL, NULL);
+ return (p->handle != INVALID_HANDLE_VALUE) ? 0 : GetLastError();
+ #else
+ p->file = fopen(name, writeMode ? "wb+" : "rb");
+ return (p->file != 0) ? 0 :
+ #ifdef UNDER_CE
+ 2; /* ENOENT */
+ #else
+ errno;
+ #endif
+ #endif
}
WRes InFile_Open(CSzFile *p, const char *name) { return File_Open(p, name, 0); }
@@ -62,12 +62,12 @@ WRes OutFile_Open(CSzFile *p, const char *name) { return File_Open(p, name, 1);
#ifdef USE_WINDOWS_FILE
static WRes File_OpenW(CSzFile *p, const WCHAR *name, int writeMode)
{
- p->handle = CreateFileW(name,
- writeMode ? GENERIC_WRITE : GENERIC_READ,
- FILE_SHARE_READ, NULL,
- writeMode ? CREATE_ALWAYS : OPEN_EXISTING,
- FILE_ATTRIBUTE_NORMAL, NULL);
- return (p->handle != INVALID_HANDLE_VALUE) ? 0 : GetLastError();
+ p->handle = CreateFileW(name,
+ writeMode ? GENERIC_WRITE : GENERIC_READ,
+ FILE_SHARE_READ, NULL,
+ writeMode ? CREATE_ALWAYS : OPEN_EXISTING,
+ FILE_ATTRIBUTE_NORMAL, NULL);
+ return (p->handle != INVALID_HANDLE_VALUE) ? 0 : GetLastError();
}
WRes InFile_OpenW(CSzFile *p, const WCHAR *name) { return File_OpenW(p, name, 0); }
WRes OutFile_OpenW(CSzFile *p, const WCHAR *name) { return File_OpenW(p, name, 1); }
@@ -75,162 +75,162 @@ WRes OutFile_OpenW(CSzFile *p, const WCHAR *name) { return File_OpenW(p, name, 1
WRes File_Close(CSzFile *p)
{
- #ifdef USE_WINDOWS_FILE
- if (p->handle != INVALID_HANDLE_VALUE)
- {
- if (!CloseHandle(p->handle))
- return GetLastError();
- p->handle = INVALID_HANDLE_VALUE;
- }
- #else
- if (p->file != NULL)
- {
- int res = fclose(p->file);
- if (res != 0)
- return res;
- p->file = NULL;
- }
- #endif
- return 0;
+ #ifdef USE_WINDOWS_FILE
+ if (p->handle != INVALID_HANDLE_VALUE)
+ {
+ if (!CloseHandle(p->handle))
+ return GetLastError();
+ p->handle = INVALID_HANDLE_VALUE;
+ }
+ #else
+ if (p->file != NULL)
+ {
+ int res = fclose(p->file);
+ if (res != 0)
+ return res;
+ p->file = NULL;
+ }
+ #endif
+ return 0;
}
WRes File_Read(CSzFile *p, void *data, size_t *size)
{
- size_t originalSize = *size;
- if (originalSize == 0)
- return 0;
-
- #ifdef USE_WINDOWS_FILE
-
- *size = 0;
- do
- {
- DWORD curSize = (originalSize > kChunkSizeMax) ? kChunkSizeMax : (DWORD)originalSize;
- DWORD processed = 0;
- BOOL res = ReadFile(p->handle, data, curSize, &processed, NULL);
- data = (void *)((Byte *)data + processed);
- originalSize -= processed;
- *size += processed;
- if (!res)
- return GetLastError();
- if (processed == 0)
- break;
- }
- while (originalSize > 0);
- return 0;
-
- #else
-
- *size = fread(data, 1, originalSize, p->file);
- if (*size == originalSize)
- return 0;
- return ferror(p->file);
-
- #endif
+ size_t originalSize = *size;
+ if (originalSize == 0)
+ return 0;
+
+ #ifdef USE_WINDOWS_FILE
+
+ *size = 0;
+ do
+ {
+ DWORD curSize = (originalSize > kChunkSizeMax) ? kChunkSizeMax : (DWORD)originalSize;
+ DWORD processed = 0;
+ BOOL res = ReadFile(p->handle, data, curSize, &processed, NULL);
+ data = (void *)((Byte *)data + processed);
+ originalSize -= processed;
+ *size += processed;
+ if (!res)
+ return GetLastError();
+ if (processed == 0)
+ break;
+ }
+ while (originalSize > 0);
+ return 0;
+
+ #else
+
+ *size = fread(data, 1, originalSize, p->file);
+ if (*size == originalSize)
+ return 0;
+ return ferror(p->file);
+
+ #endif
}
WRes File_Write(CSzFile *p, const void *data, size_t *size)
{
- size_t originalSize = *size;
- if (originalSize == 0)
- return 0;
-
- #ifdef USE_WINDOWS_FILE
-
- *size = 0;
- do
- {
- DWORD curSize = (originalSize > kChunkSizeMax) ? kChunkSizeMax : (DWORD)originalSize;
- DWORD processed = 0;
- BOOL res = WriteFile(p->handle, data, curSize, &processed, NULL);
- data = (void *)((Byte *)data + processed);
- originalSize -= processed;
- *size += processed;
- if (!res)
- return GetLastError();
- if (processed == 0)
- break;
- }
- while (originalSize > 0);
- return 0;
-
- #else
-
- *size = fwrite(data, 1, originalSize, p->file);
- if (*size == originalSize)
- return 0;
- return ferror(p->file);
-
- #endif
+ size_t originalSize = *size;
+ if (originalSize == 0)
+ return 0;
+
+ #ifdef USE_WINDOWS_FILE
+
+ *size = 0;
+ do
+ {
+ DWORD curSize = (originalSize > kChunkSizeMax) ? kChunkSizeMax : (DWORD)originalSize;
+ DWORD processed = 0;
+ BOOL res = WriteFile(p->handle, data, curSize, &processed, NULL);
+ data = (void *)((Byte *)data + processed);
+ originalSize -= processed;
+ *size += processed;
+ if (!res)
+ return GetLastError();
+ if (processed == 0)
+ break;
+ }
+ while (originalSize > 0);
+ return 0;
+
+ #else
+
+ *size = fwrite(data, 1, originalSize, p->file);
+ if (*size == originalSize)
+ return 0;
+ return ferror(p->file);
+
+ #endif
}
WRes File_Seek(CSzFile *p, Int64 *pos, ESzSeek origin)
{
- #ifdef USE_WINDOWS_FILE
-
- LARGE_INTEGER value;
- DWORD moveMethod;
- value.LowPart = (DWORD)*pos;
- value.HighPart = (LONG)((UInt64)*pos >> 16 >> 16); /* for case when UInt64 is 32-bit only */
- switch (origin)
- {
- case SZ_SEEK_SET: moveMethod = FILE_BEGIN; break;
- case SZ_SEEK_CUR: moveMethod = FILE_CURRENT; break;
- case SZ_SEEK_END: moveMethod = FILE_END; break;
- default: return ERROR_INVALID_PARAMETER;
- }
- value.LowPart = SetFilePointer(p->handle, value.LowPart, &value.HighPart, moveMethod);
- if (value.LowPart == 0xFFFFFFFF)
- {
- WRes res = GetLastError();
- if (res != NO_ERROR)
- return res;
- }
- *pos = ((Int64)value.HighPart << 32) | value.LowPart;
- return 0;
-
- #else
-
- int moveMethod;
- int res;
- switch (origin)
- {
- case SZ_SEEK_SET: moveMethod = SEEK_SET; break;
- case SZ_SEEK_CUR: moveMethod = SEEK_CUR; break;
- case SZ_SEEK_END: moveMethod = SEEK_END; break;
- default: return 1;
- }
- res = fseek(p->file, (long)*pos, moveMethod);
- *pos = ftell(p->file);
- return res;
-
- #endif
+ #ifdef USE_WINDOWS_FILE
+
+ LARGE_INTEGER value;
+ DWORD moveMethod;
+ value.LowPart = (DWORD)*pos;
+ value.HighPart = (LONG)((UInt64)*pos >> 16 >> 16); /* for case when UInt64 is 32-bit only */
+ switch (origin)
+ {
+ case SZ_SEEK_SET: moveMethod = FILE_BEGIN; break;
+ case SZ_SEEK_CUR: moveMethod = FILE_CURRENT; break;
+ case SZ_SEEK_END: moveMethod = FILE_END; break;
+ default: return ERROR_INVALID_PARAMETER;
+ }
+ value.LowPart = SetFilePointer(p->handle, value.LowPart, &value.HighPart, moveMethod);
+ if (value.LowPart == 0xFFFFFFFF)
+ {
+ WRes res = GetLastError();
+ if (res != NO_ERROR)
+ return res;
+ }
+ *pos = ((Int64)value.HighPart << 32) | value.LowPart;
+ return 0;
+
+ #else
+
+ int moveMethod;
+ int res;
+ switch (origin)
+ {
+ case SZ_SEEK_SET: moveMethod = SEEK_SET; break;
+ case SZ_SEEK_CUR: moveMethod = SEEK_CUR; break;
+ case SZ_SEEK_END: moveMethod = SEEK_END; break;
+ default: return 1;
+ }
+ res = fseek(p->file, (long)*pos, moveMethod);
+ *pos = ftell(p->file);
+ return res;
+
+ #endif
}
WRes File_GetLength(CSzFile *p, UInt64 *length)
{
- #ifdef USE_WINDOWS_FILE
-
- DWORD sizeHigh;
- DWORD sizeLow = GetFileSize(p->handle, &sizeHigh);
- if (sizeLow == 0xFFFFFFFF)
- {
- DWORD res = GetLastError();
- if (res != NO_ERROR)
- return res;
- }
- *length = (((UInt64)sizeHigh) << 32) + sizeLow;
- return 0;
-
- #else
-
- long pos = ftell(p->file);
- int res = fseek(p->file, 0, SEEK_END);
- *length = ftell(p->file);
- fseek(p->file, pos, SEEK_SET);
- return res;
-
- #endif
+ #ifdef USE_WINDOWS_FILE
+
+ DWORD sizeHigh;
+ DWORD sizeLow = GetFileSize(p->handle, &sizeHigh);
+ if (sizeLow == 0xFFFFFFFF)
+ {
+ DWORD res = GetLastError();
+ if (res != NO_ERROR)
+ return res;
+ }
+ *length = (((UInt64)sizeHigh) << 32) + sizeLow;
+ return 0;
+
+ #else
+
+ long pos = ftell(p->file);
+ int res = fseek(p->file, 0, SEEK_END);
+ *length = ftell(p->file);
+ fseek(p->file, pos, SEEK_SET);
+ return res;
+
+ #endif
}
@@ -238,13 +238,13 @@ WRes File_GetLength(CSzFile *p, UInt64 *length)
static SRes FileSeqInStream_Read(void *pp, void *buf, size_t *size)
{
- CFileSeqInStream *p = (CFileSeqInStream *)pp;
- return File_Read(&p->file, buf, size) == 0 ? SZ_OK : SZ_ERROR_READ;
+ CFileSeqInStream *p = (CFileSeqInStream *)pp;
+ return File_Read(&p->file, buf, size) == 0 ? SZ_OK : SZ_ERROR_READ;
}
void FileSeqInStream_CreateVTable(CFileSeqInStream *p)
{
- p->s.Read = FileSeqInStream_Read;
+ p->s.Read = FileSeqInStream_Read;
}
@@ -252,20 +252,20 @@ void FileSeqInStream_CreateVTable(CFileSeqInStream *p)
static SRes FileInStream_Read(void *pp, void *buf, size_t *size)
{
- CFileInStream *p = (CFileInStream *)pp;
- return (File_Read(&p->file, buf, size) == 0) ? SZ_OK : SZ_ERROR_READ;
+ CFileInStream *p = (CFileInStream *)pp;
+ return (File_Read(&p->file, buf, size) == 0) ? SZ_OK : SZ_ERROR_READ;
}
static SRes FileInStream_Seek(void *pp, Int64 *pos, ESzSeek origin)
{
- CFileInStream *p = (CFileInStream *)pp;
- return File_Seek(&p->file, pos, origin);
+ CFileInStream *p = (CFileInStream *)pp;
+ return File_Seek(&p->file, pos, origin);
}
void FileInStream_CreateVTable(CFileInStream *p)
{
- p->s.Read = FileInStream_Read;
- p->s.Seek = FileInStream_Seek;
+ p->s.Read = FileInStream_Read;
+ p->s.Seek = FileInStream_Seek;
}
@@ -273,12 +273,12 @@ void FileInStream_CreateVTable(CFileInStream *p)
static size_t FileOutStream_Write(void *pp, const void *data, size_t size)
{
- CFileOutStream *p = (CFileOutStream *)pp;
- File_Write(&p->file, data, &size);
- return size;
+ CFileOutStream *p = (CFileOutStream *)pp;
+ File_Write(&p->file, data, &size);
+ return size;
}
void FileOutStream_CreateVTable(CFileOutStream *p)
{
- p->s.Write = FileOutStream_Write;
+ p->s.Write = FileOutStream_Write;
}
diff --git a/src/lib/lib7z/x7zFile.h b/src/lib/lib7z/x7zFile.h
index dee79380c26..37c7874cd83 100644
--- a/src/lib/lib7z/x7zFile.h
+++ b/src/lib/lib7z/x7zFile.h
@@ -22,11 +22,11 @@ EXTERN_C_BEGIN
typedef struct
{
- #ifdef USE_WINDOWS_FILE
- HANDLE handle;
- #else
- FILE *file;
- #endif
+ #ifdef USE_WINDOWS_FILE
+ HANDLE handle;
+ #else
+ FILE *file;
+ #endif
} CSzFile;
void File_Construct(CSzFile *p);
@@ -54,8 +54,8 @@ WRes File_GetLength(CSzFile *p, UInt64 *length);
typedef struct
{
- ISeqInStream s;
- CSzFile file;
+ ISeqInStream s;
+ CSzFile file;
} CFileSeqInStream;
void FileSeqInStream_CreateVTable(CFileSeqInStream *p);
@@ -63,8 +63,8 @@ void FileSeqInStream_CreateVTable(CFileSeqInStream *p);
typedef struct
{
- ISeekInStream s;
- CSzFile file;
+ ISeekInStream s;
+ CSzFile file;
} CFileInStream;
void FileInStream_CreateVTable(CFileInStream *p);
@@ -72,8 +72,8 @@ void FileInStream_CreateVTable(CFileInStream *p);
typedef struct
{
- ISeqOutStream s;
- CSzFile file;
+ ISeqOutStream s;
+ CSzFile file;
} CFileOutStream;
void FileOutStream_CreateVTable(CFileOutStream *p);
diff --git a/src/lib/libflac/include/flac++/decoder.h b/src/lib/libflac/include/flac++/decoder.h
index 223602fa434..b00a917a6e0 100644
--- a/src/lib/libflac/include/flac++/decoder.h
+++ b/src/lib/libflac/include/flac++/decoder.h
@@ -78,28 +78,28 @@ namespace FLAC {
namespace Decoder {
/** \ingroup flacpp_decoder
- * \brief
- * This class wraps the ::FLAC__StreamDecoder. If you are
- * decoding from a file, FLAC::Decoder::File may be more
- * convenient.
- *
- * The usage of this class is similar to FLAC__StreamDecoder,
- * except instead of providing callbacks to
- * FLAC__stream_decoder_init*_stream(), you will inherit from this
- * class and override the virtual callback functions with your
- * own implementations, then call init() or init_ogg(). The rest
- * of the calls work the same as in the C layer.
- *
- * Only the read, write, and error callbacks are mandatory. The
- * others are optional; this class provides default
- * implementations that do nothing. In order for seeking to work
- * you must overide seek_callback(), tell_callback(),
- * length_callback(), and eof_callback().
- */
+ * \brief
+ * This class wraps the ::FLAC__StreamDecoder. If you are
+ * decoding from a file, FLAC::Decoder::File may be more
+ * convenient.
+ *
+ * The usage of this class is similar to FLAC__StreamDecoder,
+ * except instead of providing callbacks to
+ * FLAC__stream_decoder_init*_stream(), you will inherit from this
+ * class and override the virtual callback functions with your
+ * own implementations, then call init() or init_ogg(). The rest
+ * of the calls work the same as in the C layer.
+ *
+ * Only the read, write, and error callbacks are mandatory. The
+ * others are optional; this class provides default
+ * implementations that do nothing. In order for seeking to work
+ * you must overide seek_callback(), tell_callback(),
+ * length_callback(), and eof_callback().
+ */
class FLACPP_API Stream {
public:
/** This class is a wrapper around FLAC__StreamDecoderState.
- */
+ */
class FLACPP_API State {
public:
inline State(::FLAC__StreamDecoderState state): state_(state) { }
@@ -115,8 +115,8 @@ namespace FLAC {
//@{
/** Call after construction to check the that the object was created
- * successfully. If not, use get_state() to find out why not.
- */
+ * successfully. If not, use get_state() to find out why not.
+ */
virtual bool is_valid() const;
inline operator bool() const { return is_valid(); } ///< See is_valid()
//@}
@@ -201,24 +201,24 @@ namespace FLAC {
};
/** \ingroup flacpp_decoder
- * \brief
- * This class wraps the ::FLAC__StreamDecoder. If you are
- * not decoding from a file, you may need to use
- * FLAC::Decoder::Stream.
- *
- * The usage of this class is similar to FLAC__StreamDecoder,
- * except instead of providing callbacks to
- * FLAC__stream_decoder_init*_FILE() or
- * FLAC__stream_decoder_init*_file(), you will inherit from this
- * class and override the virtual callback functions with your
- * own implementations, then call init() or init_off(). The rest
- * of the calls work the same as in the C layer.
- *
- * Only the write, and error callbacks from FLAC::Decoder::Stream
- * are mandatory. The others are optional; this class provides
- * full working implementations for all other callbacks and
- * supports seeking.
- */
+ * \brief
+ * This class wraps the ::FLAC__StreamDecoder. If you are
+ * not decoding from a file, you may need to use
+ * FLAC::Decoder::Stream.
+ *
+ * The usage of this class is similar to FLAC__StreamDecoder,
+ * except instead of providing callbacks to
+ * FLAC__stream_decoder_init*_FILE() or
+ * FLAC__stream_decoder_init*_file(), you will inherit from this
+ * class and override the virtual callback functions with your
+ * own implementations, then call init() or init_off(). The rest
+ * of the calls work the same as in the C layer.
+ *
+ * Only the write, and error callbacks from FLAC::Decoder::Stream
+ * are mandatory. The others are optional; this class provides
+ * full working implementations for all other callbacks and
+ * supports seeking.
+ */
class FLACPP_API File: public Stream {
public:
File();
diff --git a/src/lib/libflac/include/flac++/encoder.h b/src/lib/libflac/include/flac++/encoder.h
index c89be19cfb6..d16d889d870 100644
--- a/src/lib/libflac/include/flac++/encoder.h
+++ b/src/lib/libflac/include/flac++/encoder.h
@@ -79,29 +79,29 @@ namespace FLAC {
namespace Encoder {
/** \ingroup flacpp_encoder
- * \brief
- * This class wraps the ::FLAC__StreamEncoder. If you are
- * encoding to a file, FLAC::Encoder::File may be more
- * convenient.
- *
- * The usage of this class is similar to FLAC__StreamEncoder,
- * except instead of providing callbacks to
- * FLAC__stream_encoder_init*_stream(), you will inherit from this
- * class and override the virtual callback functions with your
- * own implementations, then call init() or init_ogg(). The rest of
- * the calls work the same as in the C layer.
- *
- * Only the write callback is mandatory. The others are
- * optional; this class provides default implementations that do
- * nothing. In order for some STREAMINFO and SEEKTABLE data to
- * be written properly, you must overide seek_callback() and
- * tell_callback(); see FLAC__stream_encoder_init_stream() as to
- * why.
- */
+ * \brief
+ * This class wraps the ::FLAC__StreamEncoder. If you are
+ * encoding to a file, FLAC::Encoder::File may be more
+ * convenient.
+ *
+ * The usage of this class is similar to FLAC__StreamEncoder,
+ * except instead of providing callbacks to
+ * FLAC__stream_encoder_init*_stream(), you will inherit from this
+ * class and override the virtual callback functions with your
+ * own implementations, then call init() or init_ogg(). The rest of
+ * the calls work the same as in the C layer.
+ *
+ * Only the write callback is mandatory. The others are
+ * optional; this class provides default implementations that do
+ * nothing. In order for some STREAMINFO and SEEKTABLE data to
+ * be written properly, you must overide seek_callback() and
+ * tell_callback(); see FLAC__stream_encoder_init_stream() as to
+ * why.
+ */
class FLACPP_API Stream {
public:
/** This class is a wrapper around FLAC__StreamEncoderState.
- */
+ */
class FLACPP_API State {
public:
inline State(::FLAC__StreamEncoderState state): state_(state) { }
@@ -117,9 +117,9 @@ namespace FLAC {
//@{
/** Call after construction to check the that the object was created
- * successfully. If not, use get_state() to find out why not.
- *
- */
+ * successfully. If not, use get_state() to find out why not.
+ *
+ */
virtual bool is_valid() const;
inline operator bool() const { return is_valid(); } ///< See is_valid()
//@}
@@ -210,25 +210,25 @@ namespace FLAC {
};
/** \ingroup flacpp_encoder
- * \brief
- * This class wraps the ::FLAC__StreamEncoder. If you are
- * not encoding to a file, you may need to use
- * FLAC::Encoder::Stream.
- *
- * The usage of this class is similar to FLAC__StreamEncoder,
- * except instead of providing callbacks to
- * FLAC__stream_encoder_init*_FILE() or
- * FLAC__stream_encoder_init*_file(), you will inherit from this
- * class and override the virtual callback functions with your
- * own implementations, then call init() or init_ogg(). The rest
- * of the calls work the same as in the C layer.
- *
- * There are no mandatory callbacks; all the callbacks from
- * FLAC::Encoder::Stream are implemented here fully and support
- * full post-encode STREAMINFO and SEEKTABLE updating. There is
- * only an optional progress callback which you may override to
- * get periodic reports on the progress of the encode.
- */
+ * \brief
+ * This class wraps the ::FLAC__StreamEncoder. If you are
+ * not encoding to a file, you may need to use
+ * FLAC::Encoder::Stream.
+ *
+ * The usage of this class is similar to FLAC__StreamEncoder,
+ * except instead of providing callbacks to
+ * FLAC__stream_encoder_init*_FILE() or
+ * FLAC__stream_encoder_init*_file(), you will inherit from this
+ * class and override the virtual callback functions with your
+ * own implementations, then call init() or init_ogg(). The rest
+ * of the calls work the same as in the C layer.
+ *
+ * There are no mandatory callbacks; all the callbacks from
+ * FLAC::Encoder::Stream are implemented here fully and support
+ * full post-encode STREAMINFO and SEEKTABLE updating. There is
+ * only an optional progress callback which you may override to
+ * get periodic reports on the progress of the encode.
+ */
class FLACPP_API File: public Stream {
public:
File();
diff --git a/src/lib/libflac/include/flac++/export.h b/src/lib/libflac/include/flac++/export.h
index d2deb7b9ef4..34a04d6b678 100644
--- a/src/lib/libflac/include/flac++/export.h
+++ b/src/lib/libflac/include/flac++/export.h
@@ -61,9 +61,9 @@
#else
#ifdef FLACPP_API_EXPORTS
-#define FLACPP_API _declspec(dllexport)
+#define FLACPP_API _declspec(dllexport)
#else
-#define FLACPP_API _declspec(dllimport)
+#define FLACPP_API _declspec(dllimport)
#endif
#endif
diff --git a/src/lib/libflac/include/flac++/metadata.h b/src/lib/libflac/include/flac++/metadata.h
index 6e04f550d4e..3f6318f1b1e 100644
--- a/src/lib/libflac/include/flac++/metadata.h
+++ b/src/lib/libflac/include/flac++/metadata.h
@@ -81,51 +81,51 @@ namespace FLAC {
// ============================================================
/** \defgroup flacpp_metadata_object FLAC++/metadata.h: metadata object classes
- * \ingroup flacpp_metadata
- *
- * This module contains classes representing FLAC metadata
- * blocks in memory.
- *
- * The behavior closely mimics the C layer interface; be
- * sure to read the detailed description of the
- * \link flac_metadata_object C metadata object module \endlink.
- *
- * Any time a metadata object is constructed or assigned, you
- * should check is_valid() to make sure the underlying
- * ::FLAC__StreamMetadata object was able to be created.
- *
- * \warning
- * When the get_*() methods of any metadata object method
- * return you a const pointer, DO NOT disobey and write into it.
- * Always use the set_*() methods.
- *
- * \{
- */
+ * \ingroup flacpp_metadata
+ *
+ * This module contains classes representing FLAC metadata
+ * blocks in memory.
+ *
+ * The behavior closely mimics the C layer interface; be
+ * sure to read the detailed description of the
+ * \link flac_metadata_object C metadata object module \endlink.
+ *
+ * Any time a metadata object is constructed or assigned, you
+ * should check is_valid() to make sure the underlying
+ * ::FLAC__StreamMetadata object was able to be created.
+ *
+ * \warning
+ * When the get_*() methods of any metadata object method
+ * return you a const pointer, DO NOT disobey and write into it.
+ * Always use the set_*() methods.
+ *
+ * \{
+ */
/** Base class for all metadata block types.
- * See the \link flacpp_metadata_object overview \endlink for more.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more.
+ */
class FLACPP_API Prototype {
protected:
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
Prototype(const Prototype &);
Prototype(const ::FLAC__StreamMetadata &);
Prototype(const ::FLAC__StreamMetadata *);
//@}
/** Constructs an object with copy control. When \a copy
- * is \c true, behaves identically to
- * FLAC::Metadata::Prototype::Prototype(const ::FLAC__StreamMetadata *object).
- * When \a copy is \c false, the instance takes ownership of
- * the pointer and the ::FLAC__StreamMetadata object will
- * be freed by the destructor.
- *
- * \assert
- * \code object != NULL \endcode
- */
+ * is \c true, behaves identically to
+ * FLAC::Metadata::Prototype::Prototype(const ::FLAC__StreamMetadata *object).
+ * When \a copy is \c false, the instance takes ownership of
+ * the pointer and the ::FLAC__StreamMetadata object will
+ * be freed by the destructor.
+ *
+ * \assert
+ * \code object != NULL \endcode
+ */
Prototype(::FLAC__StreamMetadata *object, bool copy);
//@{
@@ -136,23 +136,23 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
Prototype &assign_object(::FLAC__StreamMetadata *object, bool copy);
/** Deletes the underlying ::FLAC__StreamMetadata object.
- */
+ */
virtual void clear();
::FLAC__StreamMetadata *object_;
public:
/** Deletes the underlying ::FLAC__StreamMetadata object.
- */
+ */
virtual ~Prototype();
//@{
/** Check for equality, performing a deep compare by following pointers.
- */
+ */
inline bool operator==(const Prototype &) const;
inline bool operator==(const ::FLAC__StreamMetadata &) const;
inline bool operator==(const ::FLAC__StreamMetadata *) const;
@@ -169,52 +169,52 @@ namespace FLAC {
friend class Iterator;
/** Returns \c true if the object was correctly constructed
- * (i.e. the underlying ::FLAC__StreamMetadata object was
- * properly allocated), else \c false.
- */
+ * (i.e. the underlying ::FLAC__StreamMetadata object was
+ * properly allocated), else \c false.
+ */
inline bool is_valid() const;
/** Returns \c true if this block is the last block in a
- * stream, else \c false.
- *
- * \assert
- * \code is_valid() \endcode
- */
+ * stream, else \c false.
+ *
+ * \assert
+ * \code is_valid() \endcode
+ */
bool get_is_last() const;
/** Returns the type of the block.
- *
- * \assert
- * \code is_valid() \endcode
- */
+ *
+ * \assert
+ * \code is_valid() \endcode
+ */
::FLAC__MetadataType get_type() const;
/** Returns the stream length of the metadata block.
- *
- * \note
- * The length does not include the metadata block header,
- * per spec.
- *
- * \assert
- * \code is_valid() \endcode
- */
+ *
+ * \note
+ * The length does not include the metadata block header,
+ * per spec.
+ *
+ * \assert
+ * \code is_valid() \endcode
+ */
unsigned get_length() const;
/** Sets the "is_last" flag for the block. When using the iterators
- * it is not necessary to set this flag; they will do it for you.
- *
- * \assert
- * \code is_valid() \endcode
- */
+ * it is not necessary to set this flag; they will do it for you.
+ *
+ * \assert
+ * \code is_valid() \endcode
+ */
void set_is_last(bool);
/** Returns a pointer to the underlying ::FLAC__StreamMetadata
- * object. This can be useful for plugging any holes between
- * the C++ and C interfaces.
- *
- * \assert
- * \code is_valid() \endcode
- */
+ * object. This can be useful for plugging any holes between
+ * the C++ and C interfaces.
+ *
+ * \assert
+ * \code is_valid() \endcode
+ */
inline operator const ::FLAC__StreamMetadata *() const;
private:
/** Private and undefined so you can't use it. */
@@ -264,25 +264,25 @@ namespace FLAC {
/** STREAMINFO metadata block.
- * See the \link flacpp_metadata_object overview \endlink for more,
- * and the <A HREF="../format.html#metadata_block_streaminfo">format specification</A>.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ * and the <A HREF="../format.html#metadata_block_streaminfo">format specification</A>.
+ */
class FLACPP_API StreamInfo : public Prototype {
public:
StreamInfo();
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline StreamInfo(const StreamInfo &object): Prototype(object) { }
inline StreamInfo(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline StreamInfo(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline StreamInfo(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~StreamInfo();
@@ -295,8 +295,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline StreamInfo &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -338,25 +338,25 @@ namespace FLAC {
};
/** PADDING metadata block.
- * See the \link flacpp_metadata_object overview \endlink for more,
- * and the <A HREF="../format.html#metadata_block_padding">format specification</A>.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ * and the <A HREF="../format.html#metadata_block_padding">format specification</A>.
+ */
class FLACPP_API Padding : public Prototype {
public:
Padding();
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline Padding(const Padding &object): Prototype(object) { }
inline Padding(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline Padding(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Padding(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~Padding();
@@ -369,8 +369,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Padding &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -391,25 +391,25 @@ namespace FLAC {
};
/** APPLICATION metadata block.
- * See the \link flacpp_metadata_object overview \endlink for more,
- * and the <A HREF="../format.html#metadata_block_application">format specification</A>.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ * and the <A HREF="../format.html#metadata_block_application">format specification</A>.
+ */
class FLACPP_API Application : public Prototype {
public:
Application();
//
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline Application(const Application &object): Prototype(object) { }
inline Application(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline Application(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Application(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~Application();
@@ -422,8 +422,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Application &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -450,25 +450,25 @@ namespace FLAC {
};
/** SEEKTABLE metadata block.
- * See the \link flacpp_metadata_object overview \endlink for more,
- * and the <A HREF="../format.html#metadata_block_seektable">format specification</A>.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ * and the <A HREF="../format.html#metadata_block_seektable">format specification</A>.
+ */
class FLACPP_API SeekTable : public Prototype {
public:
SeekTable();
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline SeekTable(const SeekTable &object): Prototype(object) { }
inline SeekTable(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline SeekTable(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline SeekTable(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~SeekTable();
@@ -481,8 +481,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline SeekTable &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -516,40 +516,40 @@ namespace FLAC {
};
/** VORBIS_COMMENT metadata block.
- * See the \link flacpp_metadata_object overview \endlink for more,
- * and the <A HREF="../format.html#metadata_block_vorbis_comment">format specification</A>.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ * and the <A HREF="../format.html#metadata_block_vorbis_comment">format specification</A>.
+ */
class FLACPP_API VorbisComment : public Prototype {
public:
/** Convenience class for encapsulating Vorbis comment
- * entries. An entry is a vendor string or a comment
- * field. In the case of a vendor string, the field
- * name is undefined; only the field value is relevant.
- *
- * A \a field as used in the methods refers to an
- * entire 'NAME=VALUE' string; for convenience the
- * string is NUL-terminated. A length field is
- * required in the unlikely event that the value
- * contains contain embedded NULs.
- *
- * A \a field_name is what is on the left side of the
- * first '=' in the \a field. By definition it is ASCII
- * and so is NUL-terminated and does not require a
- * length to describe it. \a field_name is undefined
- * for a vendor string entry.
- *
- * A \a field_value is what is on the right side of the
- * first '=' in the \a field. By definition, this may
- * contain embedded NULs and so a \a field_value_length
- * is required to describe it. However in practice,
- * embedded NULs are not known to be used, so it is
- * generally safe to treat field values as NUL-
- * terminated UTF-8 strings.
- *
- * Always check is_valid() after the constructor or operator=
- * to make sure memory was properly allocated and that the
- * Entry conforms to the Vorbis comment specification.
- */
+ * entries. An entry is a vendor string or a comment
+ * field. In the case of a vendor string, the field
+ * name is undefined; only the field value is relevant.
+ *
+ * A \a field as used in the methods refers to an
+ * entire 'NAME=VALUE' string; for convenience the
+ * string is NUL-terminated. A length field is
+ * required in the unlikely event that the value
+ * contains contain embedded NULs.
+ *
+ * A \a field_name is what is on the left side of the
+ * first '=' in the \a field. By definition it is ASCII
+ * and so is NUL-terminated and does not require a
+ * length to describe it. \a field_name is undefined
+ * for a vendor string entry.
+ *
+ * A \a field_value is what is on the right side of the
+ * first '=' in the \a field. By definition, this may
+ * contain embedded NULs and so a \a field_value_length
+ * is required to describe it. However in practice,
+ * embedded NULs are not known to be used, so it is
+ * generally safe to treat field values as NUL-
+ * terminated UTF-8 strings.
+ *
+ * Always check is_valid() after the constructor or operator=
+ * to make sure memory was properly allocated and that the
+ * Entry conforms to the Vorbis comment specification.
+ */
class FLACPP_API Entry {
public:
Entry();
@@ -607,16 +607,16 @@ namespace FLAC {
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline VorbisComment(const VorbisComment &object): Prototype(object) { }
inline VorbisComment(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline VorbisComment(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline VorbisComment(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~VorbisComment();
@@ -629,8 +629,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline VorbisComment &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -668,17 +668,17 @@ namespace FLAC {
};
/** CUESHEET metadata block.
- * See the \link flacpp_metadata_object overview \endlink for more,
- * and the <A HREF="../format.html#metadata_block_cuesheet">format specification</A>.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ * and the <A HREF="../format.html#metadata_block_cuesheet">format specification</A>.
+ */
class FLACPP_API CueSheet : public Prototype {
public:
/** Convenience class for encapsulating a cue sheet
- * track.
- *
- * Always check is_valid() after the constructor or operator=
- * to make sure memory was properly allocated.
- */
+ * track.
+ *
+ * Always check is_valid() after the constructor or operator=
+ * to make sure memory was properly allocated.
+ */
class FLACPP_API Track {
protected:
::FLAC__StreamMetadata_CueSheet_Track *object_;
@@ -719,16 +719,16 @@ namespace FLAC {
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline CueSheet(const CueSheet &object): Prototype(object) { }
inline CueSheet(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline CueSheet(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline CueSheet(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~CueSheet();
@@ -741,8 +741,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline CueSheet &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -795,25 +795,25 @@ namespace FLAC {
};
/** PICTURE metadata block.
- * See the \link flacpp_metadata_object overview \endlink for more,
- * and the <A HREF="../format.html#metadata_block_picture">format specification</A>.
- */
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ * and the <A HREF="../format.html#metadata_block_picture">format specification</A>.
+ */
class FLACPP_API Picture : public Prototype {
public:
Picture();
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline Picture(const Picture &object): Prototype(object) { }
inline Picture(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline Picture(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Picture(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~Picture();
@@ -826,8 +826,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Picture &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -872,27 +872,27 @@ namespace FLAC {
};
/** Opaque metadata block for storing unknown types.
- * This should not be used unless you know what you are doing;
- * it is currently used only internally to support forward
- * compatibility of metadata blocks.
- * See the \link flacpp_metadata_object overview \endlink for more,
- */
+ * This should not be used unless you know what you are doing;
+ * it is currently used only internally to support forward
+ * compatibility of metadata blocks.
+ * See the \link flacpp_metadata_object overview \endlink for more,
+ */
class FLACPP_API Unknown : public Prototype {
public:
Unknown();
//
//@{
/** Constructs a copy of the given object. This form
- * always performs a deep copy.
- */
+ * always performs a deep copy.
+ */
inline Unknown(const Unknown &object): Prototype(object) { }
inline Unknown(const ::FLAC__StreamMetadata &object): Prototype(object) { }
inline Unknown(const ::FLAC__StreamMetadata *object): Prototype(object) { }
//@}
/** Constructs an object with copy control. See
- * Prototype(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Unknown(::FLAC__StreamMetadata *object, bool copy): Prototype(object, copy) { }
~Unknown();
@@ -905,8 +905,8 @@ namespace FLAC {
//@}
/** Assigns an object with copy control. See
- * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
- */
+ * Prototype::assign_object(::FLAC__StreamMetadata *object, bool copy).
+ */
inline Unknown &assign(::FLAC__StreamMetadata *object, bool copy) { Prototype::assign_object(object, copy); return *this; }
//@{
@@ -934,16 +934,16 @@ namespace FLAC {
/** \defgroup flacpp_metadata_level0 FLAC++/metadata.h: metadata level 0 interface
- * \ingroup flacpp_metadata
- *
- * \brief
- * Level 0 metadata iterators.
- *
- * See the \link flac_metadata_level0 C layer equivalent \endlink
- * for more.
- *
- * \{
- */
+ * \ingroup flacpp_metadata
+ *
+ * \brief
+ * Level 0 metadata iterators.
+ *
+ * See the \link flac_metadata_level0 C layer equivalent \endlink
+ * for more.
+ *
+ * \{
+ */
FLACPP_API bool get_streaminfo(const char *filename, StreamInfo &streaminfo); ///< See FLAC__metadata_get_streaminfo().
@@ -960,43 +960,43 @@ namespace FLAC {
/** \defgroup flacpp_metadata_level1 FLAC++/metadata.h: metadata level 1 interface
- * \ingroup flacpp_metadata
- *
- * \brief
- * Level 1 metadata iterator.
- *
- * The flow through the iterator in the C++ layer is similar
- * to the C layer:
- * - Create a SimpleIterator instance
- * - Check SimpleIterator::is_valid()
- * - Call SimpleIterator::init() and check the return
- * - Traverse and/or edit. Edits are written to file
- * immediately.
- * - Destroy the SimpleIterator instance
- *
- * The ownership of pointers in the C++ layer follows that in
- * the C layer, i.e.
- * - The objects returned by get_block() are yours to
- * modify, but changes are not reflected in the FLAC file
- * until you call set_block(). The objects are also
- * yours to delete; they are not automatically deleted
- * when passed to set_block() or insert_block_after().
- *
- * See the \link flac_metadata_level1 C layer equivalent \endlink
- * for more.
- *
- * \{
- */
+ * \ingroup flacpp_metadata
+ *
+ * \brief
+ * Level 1 metadata iterator.
+ *
+ * The flow through the iterator in the C++ layer is similar
+ * to the C layer:
+ * - Create a SimpleIterator instance
+ * - Check SimpleIterator::is_valid()
+ * - Call SimpleIterator::init() and check the return
+ * - Traverse and/or edit. Edits are written to file
+ * immediately.
+ * - Destroy the SimpleIterator instance
+ *
+ * The ownership of pointers in the C++ layer follows that in
+ * the C layer, i.e.
+ * - The objects returned by get_block() are yours to
+ * modify, but changes are not reflected in the FLAC file
+ * until you call set_block(). The objects are also
+ * yours to delete; they are not automatically deleted
+ * when passed to set_block() or insert_block_after().
+ *
+ * See the \link flac_metadata_level1 C layer equivalent \endlink
+ * for more.
+ *
+ * \{
+ */
/** This class is a wrapper around the FLAC__metadata_simple_iterator
- * structures and methods; see the
- * \link flacpp_metadata_level1 usage guide \endlink and
- * ::FLAC__Metadata_SimpleIterator.
- */
+ * structures and methods; see the
+ * \link flacpp_metadata_level1 usage guide \endlink and
+ * ::FLAC__Metadata_SimpleIterator.
+ */
class FLACPP_API SimpleIterator {
public:
/** This class is a wrapper around FLAC__Metadata_SimpleIteratorStatus.
- */
+ */
class FLACPP_API Status {
public:
inline Status(::FLAC__Metadata_SimpleIteratorStatus status): status_(status) { }
@@ -1038,51 +1038,51 @@ namespace FLAC {
/** \defgroup flacpp_metadata_level2 FLAC++/metadata.h: metadata level 2 interface
- * \ingroup flacpp_metadata
- *
- * \brief
- * Level 2 metadata iterator.
- *
- * The flow through the iterator in the C++ layer is similar
- * to the C layer:
- * - Create a Chain instance
- * - Check Chain::is_valid()
- * - Call Chain::read() and check the return
- * - Traverse and/or edit with an Iterator or with
- * Chain::merge_padding() or Chain::sort_padding()
- * - Write changes back to FLAC file with Chain::write()
- * - Destroy the Chain instance
- *
- * The ownership of pointers in the C++ layer is slightly
- * different than in the C layer, i.e.
- * - The objects returned by Iterator::get_block() are NOT
- * owned by the iterator and should be deleted by the
- * caller when finished, BUT, when you modify the block,
- * it will directly edit what's in the chain and you do
- * not need to call Iterator::set_block(). However the
- * changes will not be reflected in the FLAC file until
- * the chain is written with Chain::write().
- * - When you pass an object to Iterator::set_block(),
- * Iterator::insert_block_before(), or
- * Iterator::insert_block_after(), the iterator takes
- * ownership of the block and it will be deleted by the
- * chain.
- *
- * See the \link flac_metadata_level2 C layer equivalent \endlink
- * for more.
- *
- * \{
- */
+ * \ingroup flacpp_metadata
+ *
+ * \brief
+ * Level 2 metadata iterator.
+ *
+ * The flow through the iterator in the C++ layer is similar
+ * to the C layer:
+ * - Create a Chain instance
+ * - Check Chain::is_valid()
+ * - Call Chain::read() and check the return
+ * - Traverse and/or edit with an Iterator or with
+ * Chain::merge_padding() or Chain::sort_padding()
+ * - Write changes back to FLAC file with Chain::write()
+ * - Destroy the Chain instance
+ *
+ * The ownership of pointers in the C++ layer is slightly
+ * different than in the C layer, i.e.
+ * - The objects returned by Iterator::get_block() are NOT
+ * owned by the iterator and should be deleted by the
+ * caller when finished, BUT, when you modify the block,
+ * it will directly edit what's in the chain and you do
+ * not need to call Iterator::set_block(). However the
+ * changes will not be reflected in the FLAC file until
+ * the chain is written with Chain::write().
+ * - When you pass an object to Iterator::set_block(),
+ * Iterator::insert_block_before(), or
+ * Iterator::insert_block_after(), the iterator takes
+ * ownership of the block and it will be deleted by the
+ * chain.
+ *
+ * See the \link flac_metadata_level2 C layer equivalent \endlink
+ * for more.
+ *
+ * \{
+ */
/** This class is a wrapper around the FLAC__metadata_chain
- * structures and methods; see the
- * \link flacpp_metadata_level2 usage guide \endlink and
- * ::FLAC__Metadata_Chain.
- */
+ * structures and methods; see the
+ * \link flacpp_metadata_level2 usage guide \endlink and
+ * ::FLAC__Metadata_Chain.
+ */
class FLACPP_API Chain {
public:
/** This class is a wrapper around FLAC__Metadata_ChainStatus.
- */
+ */
class FLACPP_API Status {
public:
inline Status(::FLAC__Metadata_ChainStatus status): status_(status) { }
@@ -1119,10 +1119,10 @@ namespace FLAC {
};
/** This class is a wrapper around the FLAC__metadata_iterator
- * structures and methods; see the
- * \link flacpp_metadata_level2 usage guide \endlink and
- * ::FLAC__Metadata_Iterator.
- */
+ * structures and methods; see the
+ * \link flacpp_metadata_level2 usage guide \endlink and
+ * ::FLAC__Metadata_Iterator.
+ */
class FLACPP_API Iterator {
public:
Iterator();
diff --git a/src/lib/libflac/include/flac/export.h b/src/lib/libflac/include/flac/export.h
index a525f29c1e5..e8295b86eac 100644
--- a/src/lib/libflac/include/flac/export.h
+++ b/src/lib/libflac/include/flac/export.h
@@ -61,9 +61,9 @@
#else
#ifdef FLAC_API_EXPORTS
-#define FLAC_API _declspec(dllexport)
+#define FLAC_API _declspec(dllexport)
#else
-#define FLAC_API _declspec(dllimport)
+#define FLAC_API _declspec(dllimport)
#endif
#endif
diff --git a/src/lib/libflac/include/flac/format.h b/src/lib/libflac/include/flac/format.h
index a48e95c5e4d..4f4c7f07ce4 100644
--- a/src/lib/libflac/include/flac/format.h
+++ b/src/lib/libflac/include/flac/format.h
@@ -193,11 +193,11 @@ extern FLAC_API const unsigned FLAC__STREAM_SYNC_LEN; /* = 32 bits */
typedef enum {
FLAC__ENTROPY_CODING_METHOD_PARTITIONED_RICE = 0,
/**< Residual is coded by partitioning into contexts, each with it's own
- * 4-bit Rice parameter. */
+ * 4-bit Rice parameter. */
FLAC__ENTROPY_CODING_METHOD_PARTITIONED_RICE2 = 1
/**< Residual is coded by partitioning into contexts, each with it's own
- * 5-bit Rice parameter. */
+ * 5-bit Rice parameter. */
} FLAC__EntropyCodingMethodType;
/** Maps a FLAC__EntropyCodingMethodType to a C string.
@@ -217,14 +217,14 @@ typedef struct {
unsigned *raw_bits;
/**< Widths for escape-coded partitions. Will be non-zero for escaped
- * partitions and zero for unescaped partitions.
- */
+ * partitions and zero for unescaped partitions.
+ */
unsigned capacity_by_order;
/**< The capacity of the \a parameters and \a raw_bits arrays
- * specified as an order, i.e. the number of array elements
- * allocated is 2 ^ \a capacity_by_order.
- */
+ * specified as an order, i.e. the number of array elements
+ * allocated is 2 ^ \a capacity_by_order.
+ */
} FLAC__EntropyCodingMethod_PartitionedRiceContents;
/** Header for a Rice partitioned residual. (c.f. <A HREF="../format.html#partitioned_rice">format specification</A>)
@@ -425,21 +425,21 @@ typedef struct {
FLAC__FrameNumberType number_type;
/**< The numbering scheme used for the frame. As a convenience, the
- * decoder will always convert a frame number to a sample number because
- * the rules are complex. */
+ * decoder will always convert a frame number to a sample number because
+ * the rules are complex. */
union {
FLAC__uint32 frame_number;
FLAC__uint64 sample_number;
} number;
/**< The frame number or sample number of first sample in frame;
- * use the \a number_type value to determine which to use. */
+ * use the \a number_type value to determine which to use. */
FLAC__uint8 crc;
/**< CRC-8 (polynomial = x^8 + x^2 + x^1 + x^0, initialized with 0)
- * of the raw frame header bytes, meaning everything before the CRC byte
- * including the sync code.
- */
+ * of the raw frame header bytes, meaning everything before the CRC byte
+ * including the sync code.
+ */
} FLAC__FrameHeader;
extern FLAC_API const unsigned FLAC__FRAME_HEADER_SYNC; /**< == 0x3ffe; the frame header sync code */
@@ -459,9 +459,9 @@ extern FLAC_API const unsigned FLAC__FRAME_HEADER_CRC_LEN; /**< == 8 (bits) */
typedef struct {
FLAC__uint16 crc;
/**< CRC-16 (polynomial = x^16 + x^15 + x^2 + x^0, initialized with
- * 0) of the bytes before the crc, back to and including the frame header
- * sync code.
- */
+ * 0) of the bytes before the crc, back to and including the frame header
+ * sync code.
+ */
} FLAC__FrameFooter;
extern FLAC_API const unsigned FLAC__FRAME_FOOTER_CRC_LEN; /**< == 16 (bits) */
@@ -551,9 +551,9 @@ extern FLAC_API const unsigned FLAC__STREAM_METADATA_STREAMINFO_MD5SUM_LEN; /**<
typedef struct {
int dummy;
/**< Conceptually this is an empty struct since we don't store the
- * padding bytes. Empty structs are not allowed by some C compilers,
- * hence the dummy.
- */
+ * padding bytes. Empty structs are not allowed by some C compilers,
+ * hence the dummy.
+ */
} FLAC__StreamMetadata_Padding;
@@ -574,7 +574,7 @@ typedef struct {
FLAC__uint64 stream_offset;
/**< The offset, in bytes, of the target frame with respect to
- * beginning of the first frame. */
+ * beginning of the first frame. */
unsigned frame_samples;
/**< The number of samples in the target frame. */
@@ -644,8 +644,8 @@ extern FLAC_API const unsigned FLAC__STREAM_METADATA_VORBIS_COMMENT_NUM_COMMENTS
typedef struct {
FLAC__uint64 offset;
/**< Offset in samples, relative to the track offset, of the index
- * point.
- */
+ * point.
+ */
FLAC__byte number;
/**< The index point number. */
@@ -700,9 +700,9 @@ extern FLAC_API const unsigned FLAC__STREAM_METADATA_CUESHEET_TRACK_NUM_INDICES_
typedef struct {
char media_catalog_number[129];
/**< Media catalog number, in ASCII printable characters 0x20-0x7e. In
- * general, the media catalog number may be 0 to 128 bytes long; any
- * unused characters should be right-padded with NUL characters.
- */
+ * general, the media catalog number may be 0 to 128 bytes long; any
+ * unused characters should be right-padded with NUL characters.
+ */
FLAC__uint64 lead_in;
/**< The number of lead-in samples. */
@@ -769,21 +769,21 @@ typedef struct {
char *mime_type;
/**< Picture data's MIME type, in ASCII printable characters
- * 0x20-0x7e, NUL terminated. For best compatibility with players,
- * use picture data of MIME type \c image/jpeg or \c image/png. A
- * MIME type of '-->' is also allowed, in which case the picture
- * data should be a complete URL. In file storage, the MIME type is
- * stored as a 32-bit length followed by the ASCII string with no NUL
- * terminator, but is converted to a plain C string in this structure
- * for convenience.
- */
+ * 0x20-0x7e, NUL terminated. For best compatibility with players,
+ * use picture data of MIME type \c image/jpeg or \c image/png. A
+ * MIME type of '-->' is also allowed, in which case the picture
+ * data should be a complete URL. In file storage, the MIME type is
+ * stored as a 32-bit length followed by the ASCII string with no NUL
+ * terminator, but is converted to a plain C string in this structure
+ * for convenience.
+ */
FLAC__byte *description;
/**< Picture's description in UTF-8, NUL terminated. In file storage,
- * the description is stored as a 32-bit length followed by the UTF-8
- * string with no NUL terminator, but is converted to a plain C string
- * in this structure for convenience.
- */
+ * the description is stored as a 32-bit length followed by the UTF-8
+ * string with no NUL terminator, but is converted to a plain C string
+ * in this structure for convenience.
+ */
FLAC__uint32 width;
/**< Picture's width in pixels. */
@@ -796,8 +796,8 @@ typedef struct {
FLAC__uint32 colors;
/**< For indexed palettes (like GIF), picture's number of colors (the
- * number of palette entries), or \c 0 for non-indexed (i.e. 2^depth).
- */
+ * number of palette entries), or \c 0 for non-indexed (i.e. 2^depth).
+ */
FLAC__uint32 data_length;
/**< Length of binary picture data in bytes. */
@@ -831,8 +831,8 @@ typedef struct {
typedef struct {
FLAC__MetadataType type;
/**< The type of the metadata block; used determine which member of the
- * \a data union to dereference. If type >= FLAC__METADATA_TYPE_UNDEFINED
- * then \a data.unknown must be used. */
+ * \a data union to dereference. If type >= FLAC__METADATA_TYPE_UNDEFINED
+ * then \a data.unknown must be used. */
FLAC__bool is_last;
/**< \c true if this metadata block is the last, else \a false */
@@ -851,7 +851,7 @@ typedef struct {
FLAC__StreamMetadata_Unknown unknown;
} data;
/**< Polymorphic block data; use the \a type value to determine which
- * to use. */
+ * to use. */
} FLAC__StreamMetadata;
extern FLAC_API const unsigned FLAC__STREAM_METADATA_IS_LAST_LEN; /**< == 1 (bit) */
diff --git a/src/lib/libflac/include/flac/metadata.h b/src/lib/libflac/include/flac/metadata.h
index 6453b748e99..c07937bccab 100644
--- a/src/lib/libflac/include/flac/metadata.h
+++ b/src/lib/libflac/include/flac/metadata.h
@@ -762,22 +762,22 @@ typedef enum {
FLAC__METADATA_CHAIN_STATUS_READ_WRITE_MISMATCH,
/**< FLAC__metadata_chain_write() was called on a chain read by
- * FLAC__metadata_chain_read_with_callbacks()/FLAC__metadata_chain_read_ogg_with_callbacks(),
- * or
- * FLAC__metadata_chain_write_with_callbacks()/FLAC__metadata_chain_write_with_callbacks_and_tempfile()
- * was called on a chain read by
- * FLAC__metadata_chain_read()/FLAC__metadata_chain_read_ogg().
- * Matching read/write methods must always be used. */
+ * FLAC__metadata_chain_read_with_callbacks()/FLAC__metadata_chain_read_ogg_with_callbacks(),
+ * or
+ * FLAC__metadata_chain_write_with_callbacks()/FLAC__metadata_chain_write_with_callbacks_and_tempfile()
+ * was called on a chain read by
+ * FLAC__metadata_chain_read()/FLAC__metadata_chain_read_ogg().
+ * Matching read/write methods must always be used. */
FLAC__METADATA_CHAIN_STATUS_WRONG_WRITE_CALL
/**< FLAC__metadata_chain_write_with_callbacks() was called when the
- * chain write requires a tempfile; use
- * FLAC__metadata_chain_write_with_callbacks_and_tempfile() instead.
- * Or, FLAC__metadata_chain_write_with_callbacks_and_tempfile() was
- * called when the chain write does not require a tempfile; use
- * FLAC__metadata_chain_write_with_callbacks() instead.
- * Always check FLAC__metadata_chain_check_if_tempfile_needed()
- * before writing via callbacks. */
+ * chain write requires a tempfile; use
+ * FLAC__metadata_chain_write_with_callbacks_and_tempfile() instead.
+ * Or, FLAC__metadata_chain_write_with_callbacks_and_tempfile() was
+ * called when the chain write does not require a tempfile; use
+ * FLAC__metadata_chain_write_with_callbacks() instead.
+ * Always check FLAC__metadata_chain_check_if_tempfile_needed()
+ * before writing via callbacks. */
} FLAC__Metadata_ChainStatus;
diff --git a/src/lib/libflac/include/flac/stream_decoder.h b/src/lib/libflac/include/flac/stream_decoder.h
index 8c2dc51bfb4..9ac159474af 100644
--- a/src/lib/libflac/include/flac/stream_decoder.h
+++ b/src/lib/libflac/include/flac/stream_decoder.h
@@ -208,8 +208,8 @@ typedef enum {
FLAC__STREAM_DECODER_SEARCH_FOR_FRAME_SYNC,
/**< The decoder is ready to or is in the process of searching for the
- * frame sync code.
- */
+ * frame sync code.
+ */
FLAC__STREAM_DECODER_READ_FRAME,
/**< The decoder is ready to or is in the process of reading a frame. */
@@ -222,23 +222,23 @@ typedef enum {
FLAC__STREAM_DECODER_SEEK_ERROR,
/**< An error occurred while seeking. The decoder must be flushed
- * with FLAC__stream_decoder_flush() or reset with
- * FLAC__stream_decoder_reset() before decoding can continue.
- */
+ * with FLAC__stream_decoder_flush() or reset with
+ * FLAC__stream_decoder_reset() before decoding can continue.
+ */
FLAC__STREAM_DECODER_ABORTED,
/**< The decoder was aborted by the read callback. */
FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR,
/**< An error occurred allocating memory. The decoder is in an invalid
- * state and can no longer be used.
- */
+ * state and can no longer be used.
+ */
FLAC__STREAM_DECODER_UNINITIALIZED
/**< The decoder is in the uninitialized state; one of the
- * FLAC__stream_decoder_init_*() functions must be called before samples
- * can be processed.
- */
+ * FLAC__stream_decoder_init_*() functions must be called before samples
+ * can be processed.
+ */
} FLAC__StreamDecoderState;
@@ -259,8 +259,8 @@ typedef enum {
FLAC__STREAM_DECODER_INIT_STATUS_UNSUPPORTED_CONTAINER,
/**< The library was not compiled with support for the given container
- * format.
- */
+ * format.
+ */
FLAC__STREAM_DECODER_INIT_STATUS_INVALID_CALLBACKS,
/**< A required callback was not supplied. */
@@ -270,13 +270,13 @@ typedef enum {
FLAC__STREAM_DECODER_INIT_STATUS_ERROR_OPENING_FILE,
/**< fopen() failed in FLAC__stream_decoder_init_file() or
- * FLAC__stream_decoder_init_ogg_file(). */
+ * FLAC__stream_decoder_init_ogg_file(). */
FLAC__STREAM_DECODER_INIT_STATUS_ALREADY_INITIALIZED
/**< FLAC__stream_decoder_init_*() was called when the decoder was
- * already initialized, usually because
- * FLAC__stream_decoder_finish() was not called.
- */
+ * already initialized, usually because
+ * FLAC__stream_decoder_finish() was not called.
+ */
} FLAC__StreamDecoderInitStatus;
@@ -297,14 +297,14 @@ typedef enum {
FLAC__STREAM_DECODER_READ_STATUS_END_OF_STREAM,
/**< The read was attempted while at the end of the stream. Note that
- * the client must only return this value when the read callback was
- * called when already at the end of the stream. Otherwise, if the read
- * itself moves to the end of the stream, the client should still return
- * the data and \c FLAC__STREAM_DECODER_READ_STATUS_CONTINUE, and then on
- * the next read callback it should return
- * \c FLAC__STREAM_DECODER_READ_STATUS_END_OF_STREAM with a byte count
- * of \c 0.
- */
+ * the client must only return this value when the read callback was
+ * called when already at the end of the stream. Otherwise, if the read
+ * itself moves to the end of the stream, the client should still return
+ * the data and \c FLAC__STREAM_DECODER_READ_STATUS_CONTINUE, and then on
+ * the next read callback it should return
+ * \c FLAC__STREAM_DECODER_READ_STATUS_END_OF_STREAM with a byte count
+ * of \c 0.
+ */
FLAC__STREAM_DECODER_READ_STATUS_ABORT
/**< An unrecoverable error occurred. The decoder will return from the process call. */
diff --git a/src/lib/libflac/include/flac/stream_encoder.h b/src/lib/libflac/include/flac/stream_encoder.h
index 0f609a15ba0..dbbbb23ee11 100644
--- a/src/lib/libflac/include/flac/stream_encoder.h
+++ b/src/lib/libflac/include/flac/stream_encoder.h
@@ -244,35 +244,35 @@ typedef enum {
FLAC__STREAM_ENCODER_UNINITIALIZED,
/**< The encoder is in the uninitialized state; one of the
- * FLAC__stream_encoder_init_*() functions must be called before samples
- * can be processed.
- */
+ * FLAC__stream_encoder_init_*() functions must be called before samples
+ * can be processed.
+ */
FLAC__STREAM_ENCODER_OGG_ERROR,
/**< An error occurred in the underlying Ogg layer. */
FLAC__STREAM_ENCODER_VERIFY_DECODER_ERROR,
/**< An error occurred in the underlying verify stream decoder;
- * check FLAC__stream_encoder_get_verify_decoder_state().
- */
+ * check FLAC__stream_encoder_get_verify_decoder_state().
+ */
FLAC__STREAM_ENCODER_VERIFY_MISMATCH_IN_AUDIO_DATA,
/**< The verify decoder detected a mismatch between the original
- * audio signal and the decoded audio signal.
- */
+ * audio signal and the decoded audio signal.
+ */
FLAC__STREAM_ENCODER_CLIENT_ERROR,
/**< One of the callbacks returned a fatal error. */
FLAC__STREAM_ENCODER_IO_ERROR,
/**< An I/O error occurred while opening/reading/writing a file.
- * Check \c errno.
- */
+ * Check \c errno.
+ */
FLAC__STREAM_ENCODER_FRAMING_ERROR,
/**< An error occurred while writing the stream; usually, the
- * write_callback returned an error.
- */
+ * write_callback returned an error.
+ */
FLAC__STREAM_ENCODER_MEMORY_ALLOCATION_ERROR
/**< Memory allocation failed. */
@@ -299,8 +299,8 @@ typedef enum {
FLAC__STREAM_ENCODER_INIT_STATUS_UNSUPPORTED_CONTAINER,
/**< The library was not compiled with support for the given container
- * format.
- */
+ * format.
+ */
FLAC__STREAM_ENCODER_INIT_STATUS_INVALID_CALLBACKS,
/**< A required callback was not supplied. */
@@ -310,9 +310,9 @@ typedef enum {
FLAC__STREAM_ENCODER_INIT_STATUS_INVALID_BITS_PER_SAMPLE,
/**< The encoder has an invalid setting for bits-per-sample.
- * FLAC supports 4-32 bps but the reference encoder currently supports
- * only up to 24 bps.
- */
+ * FLAC supports 4-32 bps but the reference encoder currently supports
+ * only up to 24 bps.
+ */
FLAC__STREAM_ENCODER_INIT_STATUS_INVALID_SAMPLE_RATE,
/**< The encoder has an invalid setting for the input sample rate. */
@@ -334,18 +334,18 @@ typedef enum {
FLAC__STREAM_ENCODER_INIT_STATUS_INVALID_METADATA,
/**< The metadata input to the encoder is invalid, in one of the following ways:
- * - FLAC__stream_encoder_set_metadata() was called with a null pointer but a block count > 0
- * - One of the metadata blocks contains an undefined type
- * - It contains an illegal CUESHEET as checked by FLAC__format_cuesheet_is_legal()
- * - It contains an illegal SEEKTABLE as checked by FLAC__format_seektable_is_legal()
- * - It contains more than one SEEKTABLE block or more than one VORBIS_COMMENT block
- */
+ * - FLAC__stream_encoder_set_metadata() was called with a null pointer but a block count > 0
+ * - One of the metadata blocks contains an undefined type
+ * - It contains an illegal CUESHEET as checked by FLAC__format_cuesheet_is_legal()
+ * - It contains an illegal SEEKTABLE as checked by FLAC__format_seektable_is_legal()
+ * - It contains more than one SEEKTABLE block or more than one VORBIS_COMMENT block
+ */
FLAC__STREAM_ENCODER_INIT_STATUS_ALREADY_INITIALIZED
/**< FLAC__stream_encoder_init_*() was called when the encoder was
- * already initialized, usually because
- * FLAC__stream_encoder_finish() was not called.
- */
+ * already initialized, usually because
+ * FLAC__stream_encoder_finish() was not called.
+ */
} FLAC__StreamEncoderInitStatus;
diff --git a/src/lib/libflac/libflac/bitreader.c b/src/lib/libflac/libflac/bitreader.c
index 976bc28c732..ae30011509e 100644
--- a/src/lib/libflac/libflac/bitreader.c
+++ b/src/lib/libflac/libflac/bitreader.c
@@ -219,21 +219,21 @@ FLAC__bool bitreader_read_from_client_(FLAC__BitReader *br)
}
/*
- * set the target for reading, taking into account word alignment and endianness
- */
+ * set the target for reading, taking into account word alignment and endianness
+ */
bytes = (br->capacity - br->words) * FLAC__BYTES_PER_WORD - br->bytes;
if(bytes == 0)
return false; /* no space left, buffer is too small; see note for FLAC__BITREADER_DEFAULT_CAPACITY */
target = ((FLAC__byte*)(br->buffer+br->words)) + br->bytes;
/* before reading, if the existing reader looks like this (say brword is 32 bits wide)
- * bitstream : 11 22 33 44 55 br->words=1 br->bytes=1 (partial tail word is left-justified)
- * buffer[BE]: 11 22 33 44 55 ?? ?? ?? (shown layed out as bytes sequentially in memory)
- * buffer[LE]: 44 33 22 11 ?? ?? ?? 55 (?? being don't-care)
- * ^^-------target, bytes=3
- * on LE machines, have to byteswap the odd tail word so nothing is
- * overwritten:
- */
+ * bitstream : 11 22 33 44 55 br->words=1 br->bytes=1 (partial tail word is left-justified)
+ * buffer[BE]: 11 22 33 44 55 ?? ?? ?? (shown layed out as bytes sequentially in memory)
+ * buffer[LE]: 44 33 22 11 ?? ?? ?? 55 (?? being don't-care)
+ * ^^-------target, bytes=3
+ * on LE machines, have to byteswap the odd tail word so nothing is
+ * overwritten:
+ */
#if WORDS_BIGENDIAN
#else
if(br->bytes)
@@ -241,22 +241,22 @@ FLAC__bool bitreader_read_from_client_(FLAC__BitReader *br)
#endif
/* now it looks like:
- * bitstream : 11 22 33 44 55 br->words=1 br->bytes=1
- * buffer[BE]: 11 22 33 44 55 ?? ?? ??
- * buffer[LE]: 44 33 22 11 55 ?? ?? ??
- * ^^-------target, bytes=3
- */
+ * bitstream : 11 22 33 44 55 br->words=1 br->bytes=1
+ * buffer[BE]: 11 22 33 44 55 ?? ?? ??
+ * buffer[LE]: 44 33 22 11 55 ?? ?? ??
+ * ^^-------target, bytes=3
+ */
/* read in the data; note that the callback may return a smaller number of bytes */
if(!br->read_callback(target, &bytes, br->client_data))
return false;
/* after reading bytes 66 77 88 99 AA BB CC DD EE FF from the client:
- * bitstream : 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF
- * buffer[BE]: 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF ??
- * buffer[LE]: 44 33 22 11 55 66 77 88 99 AA BB CC DD EE FF ??
- * now have to byteswap on LE machines:
- */
+ * bitstream : 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF
+ * buffer[BE]: 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF ??
+ * buffer[LE]: 44 33 22 11 55 66 77 88 99 AA BB CC DD EE FF ??
+ * now have to byteswap on LE machines:
+ */
#if WORDS_BIGENDIAN
#else
end = (br->words*FLAC__BYTES_PER_WORD + br->bytes + bytes + (FLAC__BYTES_PER_WORD-1)) / FLAC__BYTES_PER_WORD;
@@ -272,11 +272,11 @@ FLAC__bool bitreader_read_from_client_(FLAC__BitReader *br)
#endif
/* now it looks like:
- * bitstream : 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF
- * buffer[BE]: 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF ??
- * buffer[LE]: 44 33 22 11 88 77 66 55 CC BB AA 99 ?? FF EE DD
- * finally we'll update the reader values:
- */
+ * bitstream : 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF
+ * buffer[BE]: 11 22 33 44 55 66 77 88 99 AA BB CC DD EE FF ??
+ * buffer[LE]: 44 33 22 11 88 77 66 55 CC BB AA 99 ?? FF EE DD
+ * finally we'll update the reader values:
+ */
end = br->words*FLAC__BYTES_PER_WORD + br->bytes + bytes;
br->words = end / FLAC__BYTES_PER_WORD;
br->bytes = end % FLAC__BYTES_PER_WORD;
@@ -295,14 +295,14 @@ FLAC__BitReader *FLAC__bitreader_new(void)
FLAC__BitReader *br = (FLAC__BitReader*)calloc(1, sizeof(FLAC__BitReader));
/* calloc() implies:
- memset(br, 0, sizeof(FLAC__BitReader));
- br->buffer = 0;
- br->capacity = 0;
- br->words = br->bytes = 0;
- br->consumed_words = br->consumed_bits = 0;
- br->read_callback = 0;
- br->client_data = 0;
- */
+ memset(br, 0, sizeof(FLAC__BitReader));
+ br->buffer = 0;
+ br->capacity = 0;
+ br->words = br->bytes = 0;
+ br->consumed_words = br->consumed_bits = 0;
+ br->read_callback = 0;
+ br->client_data = 0;
+ */
return br;
}
@@ -489,9 +489,9 @@ FLaC__INLINE FLAC__bool FLAC__bitreader_read_raw_uint32(FLAC__BitReader *br, FLA
}
else {
/* in this case we're starting our read at a partial tail word;
- * the reader has guaranteed that we have at least 'bits' bits
- * available to read, which makes this case simpler.
- */
+ * the reader has guaranteed that we have at least 'bits' bits
+ * available to read, which makes this case simpler.
+ */
/* OPT: taking out the consumed_bits==0 "else" case below might make things faster if less code allows the compiler to inline this function */
if(br->consumed_bits) {
/* this also works when consumed_bits==0, it's just a little slower than necessary for that case */
@@ -568,9 +568,9 @@ FLaC__INLINE FLAC__bool FLAC__bitreader_read_uint32_little_endian(FLAC__BitReade
FLAC__bool FLAC__bitreader_skip_bits_no_crc(FLAC__BitReader *br, unsigned bits)
{
/*
- * OPT: a faster implementation is possible but probably not that useful
- * since this is only called a couple of times in the metadata readers.
- */
+ * OPT: a faster implementation is possible but probably not that useful
+ * since this is only called a couple of times in the metadata readers.
+ */
FLAC__ASSERT(0 != br);
FLAC__ASSERT(0 != br->buffer);
@@ -742,12 +742,12 @@ FLaC__INLINE FLAC__bool FLAC__bitreader_read_unary_unsigned(FLAC__BitReader *br,
}
}
/* at this point we've eaten up all the whole words; have to try
- * reading through any tail bytes before calling the read callback.
- * this is a repeat of the above logic adjusted for the fact we
- * don't have a whole word. note though if the client is feeding
- * us data a byte at a time (unlikely), br->consumed_bits may not
- * be zero.
- */
+ * reading through any tail bytes before calling the read callback.
+ * this is a repeat of the above logic adjusted for the fact we
+ * don't have a whole word. note though if the client is feeding
+ * us data a byte at a time (unlikely), br->consumed_bits may not
+ * be zero.
+ */
if(br->bytes) {
const unsigned end = br->bytes * 8;
brword b = (br->buffer[br->consumed_words] & (FLAC__WORD_ALL_ONES << (FLAC__BITS_PER_WORD-end))) << br->consumed_bits;
@@ -810,8 +810,8 @@ FLAC__bool FLAC__bitreader_read_rice_signed_block(FLAC__BitReader *br, int vals[
unsigned bits; /* the # of binary LSBs left to read to finish a rice codeword */
/* try and get br->consumed_words and br->consumed_bits into register;
- * must remember to flush them back to *br before calling other
- * bitwriter functions that use them, and before returning */
+ * must remember to flush them back to *br before calling other
+ * bitwriter functions that use them, and before returning */
register unsigned cwords;
register unsigned cbits;
@@ -865,12 +865,12 @@ FLAC__bool FLAC__bitreader_read_rice_signed_block(FLAC__BitReader *br, int vals[
}
}
/* at this point we've eaten up all the whole words; have to try
- * reading through any tail bytes before calling the read callback.
- * this is a repeat of the above logic adjusted for the fact we
- * don't have a whole word. note though if the client is feeding
- * us data a byte at a time (unlikely), br->consumed_bits may not
- * be zero.
- */
+ * reading through any tail bytes before calling the read callback.
+ * this is a repeat of the above logic adjusted for the fact we
+ * don't have a whole word. note though if the client is feeding
+ * us data a byte at a time (unlikely), br->consumed_bits may not
+ * be zero.
+ */
if(br->bytes) {
const unsigned end = br->bytes * 8;
brword b = (br->buffer[cwords] & (FLAC__WORD_ALL_ONES << (FLAC__BITS_PER_WORD-end))) << cbits;
@@ -891,9 +891,9 @@ FLAC__bool FLAC__bitreader_read_rice_signed_block(FLAC__BitReader *br, int vals[
}
}
/* flush registers and read; bitreader_read_from_client_() does
- * not touch br->consumed_bits at all but we still need to set
- * it in case it fails and we have to return false.
- */
+ * not touch br->consumed_bits at all but we still need to set
+ * it in case it fails and we have to return false.
+ */
br->consumed_bits = cbits;
br->consumed_words = cwords;
if(!bitreader_read_from_client_(br))
@@ -907,9 +907,9 @@ break1:
if(bits) {
while((br->words-cwords)*FLAC__BITS_PER_WORD + br->bytes*8 - cbits < bits) {
/* flush registers and read; bitreader_read_from_client_() does
- * not touch br->consumed_bits at all but we still need to set
- * it in case it fails and we have to return false.
- */
+ * not touch br->consumed_bits at all but we still need to set
+ * it in case it fails and we have to return false.
+ */
br->consumed_bits = cbits;
br->consumed_words = cwords;
if(!bitreader_read_from_client_(br))
@@ -950,9 +950,9 @@ break1:
}
else {
/* in this case we're starting our read at a partial tail word;
- * the reader has guaranteed that we have at least 'bits' bits
- * available to read, which makes this case simpler.
- */
+ * the reader has guaranteed that we have at least 'bits' bits
+ * available to read, which makes this case simpler.
+ */
uval <<= bits;
if(cbits) {
/* this also works when consumed_bits==0, it's just a little slower than necessary for that case */
@@ -991,8 +991,8 @@ break2:
unsigned uval = 0;
/* try and get br->consumed_words and br->consumed_bits into register;
- * must remember to flush them back to *br before calling other
- * bitwriter functions that use them, and before returning */
+ * must remember to flush them back to *br before calling other
+ * bitwriter functions that use them, and before returning */
register unsigned cwords;
register unsigned cbits;
unsigned ucbits; /* keep track of the number of unconsumed bits in the buffer */
@@ -1048,12 +1048,12 @@ break2:
}
}
/* at this point we've eaten up all the whole words; have to try
- * reading through any tail bytes before calling the read callback.
- * this is a repeat of the above logic adjusted for the fact we
- * don't have a whole word. note though if the client is feeding
- * us data a byte at a time (unlikely), br->consumed_bits may not
- * be zero.
- */
+ * reading through any tail bytes before calling the read callback.
+ * this is a repeat of the above logic adjusted for the fact we
+ * don't have a whole word. note though if the client is feeding
+ * us data a byte at a time (unlikely), br->consumed_bits may not
+ * be zero.
+ */
if(br->bytes) {
const unsigned end = br->bytes * 8;
brword b = (br->buffer[cwords] & ~(FLAC__WORD_ALL_ONES >> end)) << cbits;
@@ -1073,9 +1073,9 @@ break2:
}
}
/* flush registers and read; bitreader_read_from_client_() does
- * not touch br->consumed_bits at all but we still need to set
- * it in case it fails and we have to return false.
- */
+ * not touch br->consumed_bits at all but we still need to set
+ * it in case it fails and we have to return false.
+ */
br->consumed_bits = cbits;
br->consumed_words = cwords;
if(!bitreader_read_from_client_(br))
@@ -1083,9 +1083,9 @@ break2:
cwords = br->consumed_words;
ucbits = (br->words-cwords)*FLAC__BITS_PER_WORD + br->bytes*8 - cbits + uval;
/* + uval to offset our count by the # of unary bits already
- * consumed before the read, because we will add these back
- * in all at once at break1
- */
+ * consumed before the read, because we will add these back
+ * in all at once at break1
+ */
}
break1:
ucbits -= uval;
@@ -1097,9 +1097,9 @@ break1:
if(parameter) {
while(ucbits < parameter) {
/* flush registers and read; bitreader_read_from_client_() does
- * not touch br->consumed_bits at all but we still need to set
- * it in case it fails and we have to return false.
- */
+ * not touch br->consumed_bits at all but we still need to set
+ * it in case it fails and we have to return false.
+ */
br->consumed_bits = cbits;
br->consumed_words = cwords;
if(!bitreader_read_from_client_(br))
@@ -1137,9 +1137,9 @@ break1:
}
else {
/* in this case we're starting our read at a partial tail word;
- * the reader has guaranteed that we have at least 'parameter'
- * bits available to read, which makes this case simpler.
- */
+ * the reader has guaranteed that we have at least 'parameter'
+ * bits available to read, which makes this case simpler.
+ */
uval <<= parameter;
if(cbits) {
/* this also works when consumed_bits==0, it's just a little slower than necessary for that case */
diff --git a/src/lib/libflac/libflac/bitwriter.c b/src/lib/libflac/libflac/bitwriter.c
index a5e4be119ff..430d3b99b67 100644
--- a/src/lib/libflac/libflac/bitwriter.c
+++ b/src/lib/libflac/libflac/bitwriter.c
@@ -124,8 +124,8 @@ static FLAC__bool bitwriter_grow_(FLAC__BitWriter *bw, unsigned bits_to_add)
new_capacity = bw->words + ((bw->bits + bits_to_add + FLAC__BITS_PER_WORD - 1) / FLAC__BITS_PER_WORD);
/* it's possible (due to pessimism in the growth estimation that
- * leads to this call) that we don't actually need to grow
- */
+ * leads to this call) that we don't actually need to grow
+ */
if(bw->capacity >= new_capacity)
return true;
@@ -289,8 +289,8 @@ FLAC__bool FLAC__bitwriter_get_buffer(FLAC__BitWriter *bw, const FLAC__byte **bu
void FLAC__bitwriter_release_buffer(FLAC__BitWriter *bw)
{
/* nothing to do. in the future, strict checking of a 'writer-is-in-
- * get-mode' flag could be added everywhere and then cleared here
- */
+ * get-mode' flag could be added everywhere and then cleared here
+ */
(void)bw;
}
@@ -630,9 +630,9 @@ break1:
}
else {
/* if bw->bits == 0, left==FLAC__BITS_PER_WORD which will always
- * be > lsbits (because of previous assertions) so it would have
- * triggered the (lsbits<left) case above.
- */
+ * be > lsbits (because of previous assertions) so it would have
+ * triggered the (lsbits<left) case above.
+ */
FLAC__ASSERT(bw->bits);
FLAC__ASSERT(left < FLAC__BITS_PER_WORD);
bw->accum <<= left;
diff --git a/src/lib/libflac/libflac/cpu.c b/src/lib/libflac/libflac/cpu.c
index 73b51f58eae..60b73bff143 100644
--- a/src/lib/libflac/libflac/cpu.c
+++ b/src/lib/libflac/libflac/cpu.c
@@ -211,8 +211,8 @@ void FLAC__cpu_info(FLAC__CPUInfo *info)
#endif
/*
- * now have to check for OS support of SSE/SSE2
- */
+ * now have to check for OS support of SSE/SSE2
+ */
if(info->data.ia32.fxsr || info->data.ia32.sse || info->data.ia32.sse2) {
#if defined FLAC__NO_SSE_OS
/* assume user knows better than us; turn it off */
diff --git a/src/lib/libflac/libflac/fixed.c b/src/lib/libflac/libflac/fixed.c
index 0bcdc36fc30..5871b1f5f5d 100644
--- a/src/lib/libflac/libflac/fixed.c
+++ b/src/lib/libflac/libflac/fixed.c
@@ -75,10 +75,10 @@ static FLAC__fixedpoint local__compute_rbps_integerized(FLAC__uint32 err, FLAC__
if(err <= n)
return 0;
/*
- * The above two things tell us 1) n fits in 16 bits; 2) err/n > 1.
- * These allow us later to know we won't lose too much precision in the
- * fixed-point division (err<<fracbits)/n.
- */
+ * The above two things tell us 1) n fits in 16 bits; 2) err/n > 1.
+ * These allow us later to know we won't lose too much precision in the
+ * fixed-point division (err<<fracbits)/n.
+ */
fracbits = (8*sizeof(err)) - (FLAC__bitmath_ilog2(err)+1);
@@ -87,9 +87,9 @@ static FLAC__fixedpoint local__compute_rbps_integerized(FLAC__uint32 err, FLAC__
/* err now holds err/n with fracbits fractional bits */
/*
- * Whittle err down to 16 bits max. 16 significant bits is enough for
- * our purposes.
- */
+ * Whittle err down to 16 bits max. 16 significant bits is enough for
+ * our purposes.
+ */
FLAC__ASSERT(err > 0);
bits = FLAC__bitmath_ilog2(err)+1;
if(bits > 16) {
@@ -118,16 +118,16 @@ static FLAC__fixedpoint local__compute_rbps_integerized(FLAC__uint32 err, FLAC__
return 0;
/*
- * The return value must have 16 fractional bits. Since the whole part
- * of the base-2 log of a 32 bit number must fit in 5 bits, and fracbits
- * must be >= -3, these assertion allows us to be able to shift rbps
- * left if necessary to get 16 fracbits without losing any bits of the
- * whole part of rbps.
- *
- * There is a slight chance due to accumulated error that the whole part
- * will require 6 bits, so we use 6 in the assertion. Really though as
- * long as it fits in 13 bits (32 - (16 - (-3))) we are fine.
- */
+ * The return value must have 16 fractional bits. Since the whole part
+ * of the base-2 log of a 32 bit number must fit in 5 bits, and fracbits
+ * must be >= -3, these assertion allows us to be able to shift rbps
+ * left if necessary to get 16 fracbits without losing any bits of the
+ * whole part of rbps.
+ *
+ * There is a slight chance due to accumulated error that the whole part
+ * will require 6 bits, so we use 6 in the assertion. Really though as
+ * long as it fits in 13 bits (32 - (16 - (-3))) we are fine.
+ */
FLAC__ASSERT((int)FLAC__bitmath_ilog2(rbps)+1 <= fracbits + 6);
FLAC__ASSERT(fracbits >= -3);
@@ -154,10 +154,10 @@ static FLAC__fixedpoint local__compute_rbps_wide_integerized(FLAC__uint64 err, F
if(err <= n)
return 0;
/*
- * The above two things tell us 1) n fits in 16 bits; 2) err/n > 1.
- * These allow us later to know we won't lose too much precision in the
- * fixed-point division (err<<fracbits)/n.
- */
+ * The above two things tell us 1) n fits in 16 bits; 2) err/n > 1.
+ * These allow us later to know we won't lose too much precision in the
+ * fixed-point division (err<<fracbits)/n.
+ */
fracbits = (8*sizeof(err)) - (FLAC__bitmath_ilog2_wide(err)+1);
@@ -166,9 +166,9 @@ static FLAC__fixedpoint local__compute_rbps_wide_integerized(FLAC__uint64 err, F
/* err now holds err/n with fracbits fractional bits */
/*
- * Whittle err down to 16 bits max. 16 significant bits is enough for
- * our purposes.
- */
+ * Whittle err down to 16 bits max. 16 significant bits is enough for
+ * our purposes.
+ */
FLAC__ASSERT(err > 0);
bits = FLAC__bitmath_ilog2_wide(err)+1;
if(bits > 16) {
@@ -197,16 +197,16 @@ static FLAC__fixedpoint local__compute_rbps_wide_integerized(FLAC__uint64 err, F
return 0;
/*
- * The return value must have 16 fractional bits. Since the whole part
- * of the base-2 log of a 32 bit number must fit in 5 bits, and fracbits
- * must be >= -3, these assertion allows us to be able to shift rbps
- * left if necessary to get 16 fracbits without losing any bits of the
- * whole part of rbps.
- *
- * There is a slight chance due to accumulated error that the whole part
- * will require 6 bits, so we use 6 in the assertion. Really though as
- * long as it fits in 13 bits (32 - (16 - (-3))) we are fine.
- */
+ * The return value must have 16 fractional bits. Since the whole part
+ * of the base-2 log of a 32 bit number must fit in 5 bits, and fracbits
+ * must be >= -3, these assertion allows us to be able to shift rbps
+ * left if necessary to get 16 fracbits without losing any bits of the
+ * whole part of rbps.
+ *
+ * There is a slight chance due to accumulated error that the whole part
+ * will require 6 bits, so we use 6 in the assertion. Really though as
+ * long as it fits in 13 bits (32 - (16 - (-3))) we are fine.
+ */
FLAC__ASSERT((int)FLAC__bitmath_ilog2(rbps)+1 <= fracbits + 6);
FLAC__ASSERT(fracbits >= -3);
@@ -290,9 +290,9 @@ unsigned FLAC__fixed_compute_best_predictor_wide(const FLAC__int32 data[], unsig
FLAC__int32 last_error_3 = last_error_2 - (data[-2] - 2*data[-3] + data[-4]);
FLAC__int32 error, save;
/* total_error_* are 64-bits to avoid overflow when encoding
- * erratic signals when the bits-per-sample and blocksize are
- * large.
- */
+ * erratic signals when the bits-per-sample and blocksize are
+ * large.
+ */
FLAC__uint64 total_error_0 = 0, total_error_1 = 0, total_error_2 = 0, total_error_3 = 0, total_error_4 = 0;
unsigned i, order;
diff --git a/src/lib/libflac/libflac/float.c b/src/lib/libflac/libflac/float.c
index 24ea8bc4bf7..108880af7c3 100644
--- a/src/lib/libflac/libflac/float.c
+++ b/src/lib/libflac/libflac/float.c
@@ -57,8 +57,8 @@ const FLAC__fixedpoint FLAC__FP_E = 178145;
static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
{
/*
- * 0 fraction bits
- */
+ * 0 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x00000001,
/* lg(4/3) = */ 0x00000000,
@@ -78,8 +78,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
},
{
/*
- * 4 fraction bits
- */
+ * 4 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x00000010,
/* lg(4/3) = */ 0x00000007,
@@ -99,8 +99,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
},
{
/*
- * 8 fraction bits
- */
+ * 8 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x00000100,
/* lg(4/3) = */ 0x0000006a,
@@ -120,8 +120,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
},
{
/*
- * 12 fraction bits
- */
+ * 12 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x00001000,
/* lg(4/3) = */ 0x000006a4,
@@ -141,8 +141,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
},
{
/*
- * 16 fraction bits
- */
+ * 16 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x00010000,
/* lg(4/3) = */ 0x00006a40,
@@ -162,8 +162,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
},
{
/*
- * 20 fraction bits
- */
+ * 20 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x00100000,
/* lg(4/3) = */ 0x0006a3fe,
@@ -183,8 +183,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
},
{
/*
- * 24 fraction bits
- */
+ * 24 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x01000000,
/* lg(4/3) = */ 0x006a3fe6,
@@ -204,8 +204,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
},
{
/*
- * 28 fraction bits
- */
+ * 28 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ 0x10000000,
/* lg(4/3) = */ 0x06a3fe5c,
@@ -229,8 +229,8 @@ static const FLAC__uint32 log2_lookup[][LOG2_LOOKUP_PRECISION] = {
static const FLAC__uint64 log2_lookup_wide[] = {
{
/*
- * 32 fraction bits
- */
+ * 32 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ FLAC__U64L(0x100000000),
/* lg(4/3) = */ FLAC__U64L(0x6a3fe5c6),
@@ -250,8 +250,8 @@ static const FLAC__uint64 log2_lookup_wide[] = {
},
{
/*
- * 48 fraction bits
- */
+ * 48 fraction bits
+ */
/* undefined */ 0x00000000,
/* lg(2/1) = */ FLAC__U64L(0x1000000000000),
/* lg(4/3) = */ FLAC__U64L(0x6a3fe5c60429),
diff --git a/src/lib/libflac/libflac/lpc.c b/src/lib/libflac/libflac/lpc.c
index 61a4bb59ad0..0fc247d9a1b 100644
--- a/src/lib/libflac/libflac/lpc.c
+++ b/src/lib/libflac/libflac/lpc.c
@@ -71,12 +71,12 @@ void FLAC__lpc_compute_autocorrelation(const FLAC__real data[], unsigned data_le
FLAC__ASSERT(lag <= data_len);
/*
- * Technically we should subtract the mean first like so:
- * for(i = 0; i < data_len; i++)
- * data[i] -= mean;
- * but it appears not to make enough of a difference to matter, and
- * most signals are already closely centered around zero
- */
+ * Technically we should subtract the mean first like so:
+ * for(i = 0; i < data_len; i++)
+ * data[i] -= mean;
+ * but it appears not to make enough of a difference to matter, and
+ * most signals are already closely centered around zero
+ */
while(lag--) {
for(i = lag, d = 0.0; i < data_len; i++)
d += data[i] * data[i - lag];
@@ -85,9 +85,9 @@ void FLAC__lpc_compute_autocorrelation(const FLAC__real data[], unsigned data_le
#endif
/*
- * this version tends to run faster because of better data locality
- * ('data_len' is usually much larger than 'lag')
- */
+ * this version tends to run faster because of better data locality
+ * ('data_len' is usually much larger than 'lag')
+ */
FLAC__real d;
unsigned sample, coeff;
const unsigned limit = data_len - lag;
@@ -223,9 +223,9 @@ int FLAC__lpc_quantize_coefficients(const FLAC__real lp_coeff[], unsigned order,
}
}
/* negative shift is very rare but due to design flaw, negative shift is
- * a NOP in the decoder, so it must be handled specially by scaling down
- * coeffs
- */
+ * a NOP in the decoder, so it must be handled specially by scaling down
+ * coeffs
+ */
else {
const int nshift = -(*shift);
FLAC__double error = 0.0;
@@ -297,13 +297,13 @@ void FLAC__lpc_compute_residual_from_qlp_coefficients(const FLAC__int32 *data, u
}
/* Here's a slower but clearer version:
- for(i = 0; i < data_len; i++) {
- sum = 0;
- for(j = 0; j < order; j++)
- sum += qlp_coeff[j] * data[i-j-1];
- residual[i] = data[i] - (sum >> lp_quantization);
- }
- */
+ for(i = 0; i < data_len; i++) {
+ sum = 0;
+ for(j = 0; j < order; j++)
+ sum += qlp_coeff[j] * data[i-j-1];
+ residual[i] = data[i] - (sum >> lp_quantization);
+ }
+ */
}
#else /* fully unrolled version for normal use */
{
@@ -314,10 +314,10 @@ void FLAC__lpc_compute_residual_from_qlp_coefficients(const FLAC__int32 *data, u
FLAC__ASSERT(order <= 32);
/*
- * We do unique versions up to 12th order since that's the subset limit.
- * Also they are roughly ordered to match frequency of occurrence to
- * minimize branching.
- */
+ * We do unique versions up to 12th order since that's the subset limit.
+ * Also they are roughly ordered to match frequency of occurrence to
+ * minimize branching.
+ */
if(order <= 12) {
if(order > 8) {
if(order > 10) {
@@ -509,18 +509,18 @@ void FLAC__lpc_compute_residual_from_qlp_coefficients(const FLAC__int32 *data, u
case 15: sum += qlp_coeff[14] * data[i-15];
case 14: sum += qlp_coeff[13] * data[i-14];
case 13: sum += qlp_coeff[12] * data[i-13];
- sum += qlp_coeff[11] * data[i-12];
- sum += qlp_coeff[10] * data[i-11];
- sum += qlp_coeff[ 9] * data[i-10];
- sum += qlp_coeff[ 8] * data[i- 9];
- sum += qlp_coeff[ 7] * data[i- 8];
- sum += qlp_coeff[ 6] * data[i- 7];
- sum += qlp_coeff[ 5] * data[i- 6];
- sum += qlp_coeff[ 4] * data[i- 5];
- sum += qlp_coeff[ 3] * data[i- 4];
- sum += qlp_coeff[ 2] * data[i- 3];
- sum += qlp_coeff[ 1] * data[i- 2];
- sum += qlp_coeff[ 0] * data[i- 1];
+ sum += qlp_coeff[11] * data[i-12];
+ sum += qlp_coeff[10] * data[i-11];
+ sum += qlp_coeff[ 9] * data[i-10];
+ sum += qlp_coeff[ 8] * data[i- 9];
+ sum += qlp_coeff[ 7] * data[i- 8];
+ sum += qlp_coeff[ 6] * data[i- 7];
+ sum += qlp_coeff[ 5] * data[i- 6];
+ sum += qlp_coeff[ 4] * data[i- 5];
+ sum += qlp_coeff[ 3] * data[i- 4];
+ sum += qlp_coeff[ 2] * data[i- 3];
+ sum += qlp_coeff[ 1] * data[i- 2];
+ sum += qlp_coeff[ 0] * data[i- 1];
}
residual[i] = data[i] - (sum >> lp_quantization);
}
@@ -576,10 +576,10 @@ void FLAC__lpc_compute_residual_from_qlp_coefficients_wide(const FLAC__int32 *da
FLAC__ASSERT(order <= 32);
/*
- * We do unique versions up to 12th order since that's the subset limit.
- * Also they are roughly ordered to match frequency of occurrence to
- * minimize branching.
- */
+ * We do unique versions up to 12th order since that's the subset limit.
+ * Also they are roughly ordered to match frequency of occurrence to
+ * minimize branching.
+ */
if(order <= 12) {
if(order > 8) {
if(order > 10) {
@@ -771,18 +771,18 @@ void FLAC__lpc_compute_residual_from_qlp_coefficients_wide(const FLAC__int32 *da
case 15: sum += qlp_coeff[14] * (FLAC__int64)data[i-15];
case 14: sum += qlp_coeff[13] * (FLAC__int64)data[i-14];
case 13: sum += qlp_coeff[12] * (FLAC__int64)data[i-13];
- sum += qlp_coeff[11] * (FLAC__int64)data[i-12];
- sum += qlp_coeff[10] * (FLAC__int64)data[i-11];
- sum += qlp_coeff[ 9] * (FLAC__int64)data[i-10];
- sum += qlp_coeff[ 8] * (FLAC__int64)data[i- 9];
- sum += qlp_coeff[ 7] * (FLAC__int64)data[i- 8];
- sum += qlp_coeff[ 6] * (FLAC__int64)data[i- 7];
- sum += qlp_coeff[ 5] * (FLAC__int64)data[i- 6];
- sum += qlp_coeff[ 4] * (FLAC__int64)data[i- 5];
- sum += qlp_coeff[ 3] * (FLAC__int64)data[i- 4];
- sum += qlp_coeff[ 2] * (FLAC__int64)data[i- 3];
- sum += qlp_coeff[ 1] * (FLAC__int64)data[i- 2];
- sum += qlp_coeff[ 0] * (FLAC__int64)data[i- 1];
+ sum += qlp_coeff[11] * (FLAC__int64)data[i-12];
+ sum += qlp_coeff[10] * (FLAC__int64)data[i-11];
+ sum += qlp_coeff[ 9] * (FLAC__int64)data[i-10];
+ sum += qlp_coeff[ 8] * (FLAC__int64)data[i- 9];
+ sum += qlp_coeff[ 7] * (FLAC__int64)data[i- 8];
+ sum += qlp_coeff[ 6] * (FLAC__int64)data[i- 7];
+ sum += qlp_coeff[ 5] * (FLAC__int64)data[i- 6];
+ sum += qlp_coeff[ 4] * (FLAC__int64)data[i- 5];
+ sum += qlp_coeff[ 3] * (FLAC__int64)data[i- 4];
+ sum += qlp_coeff[ 2] * (FLAC__int64)data[i- 3];
+ sum += qlp_coeff[ 1] * (FLAC__int64)data[i- 2];
+ sum += qlp_coeff[ 0] * (FLAC__int64)data[i- 1];
}
residual[i] = data[i] - (FLAC__int32)(sum >> lp_quantization);
}
@@ -827,13 +827,13 @@ void FLAC__lpc_restore_signal(const FLAC__int32 residual[], unsigned data_len, c
}
/* Here's a slower but clearer version:
- for(i = 0; i < data_len; i++) {
- sum = 0;
- for(j = 0; j < order; j++)
- sum += qlp_coeff[j] * data[i-j-1];
- data[i] = residual[i] + (sum >> lp_quantization);
- }
- */
+ for(i = 0; i < data_len; i++) {
+ sum = 0;
+ for(j = 0; j < order; j++)
+ sum += qlp_coeff[j] * data[i-j-1];
+ data[i] = residual[i] + (sum >> lp_quantization);
+ }
+ */
}
#else /* fully unrolled version for normal use */
{
@@ -844,10 +844,10 @@ void FLAC__lpc_restore_signal(const FLAC__int32 residual[], unsigned data_len, c
FLAC__ASSERT(order <= 32);
/*
- * We do unique versions up to 12th order since that's the subset limit.
- * Also they are roughly ordered to match frequency of occurrence to
- * minimize branching.
- */
+ * We do unique versions up to 12th order since that's the subset limit.
+ * Also they are roughly ordered to match frequency of occurrence to
+ * minimize branching.
+ */
if(order <= 12) {
if(order > 8) {
if(order > 10) {
@@ -1039,18 +1039,18 @@ void FLAC__lpc_restore_signal(const FLAC__int32 residual[], unsigned data_len, c
case 15: sum += qlp_coeff[14] * data[i-15];
case 14: sum += qlp_coeff[13] * data[i-14];
case 13: sum += qlp_coeff[12] * data[i-13];
- sum += qlp_coeff[11] * data[i-12];
- sum += qlp_coeff[10] * data[i-11];
- sum += qlp_coeff[ 9] * data[i-10];
- sum += qlp_coeff[ 8] * data[i- 9];
- sum += qlp_coeff[ 7] * data[i- 8];
- sum += qlp_coeff[ 6] * data[i- 7];
- sum += qlp_coeff[ 5] * data[i- 6];
- sum += qlp_coeff[ 4] * data[i- 5];
- sum += qlp_coeff[ 3] * data[i- 4];
- sum += qlp_coeff[ 2] * data[i- 3];
- sum += qlp_coeff[ 1] * data[i- 2];
- sum += qlp_coeff[ 0] * data[i- 1];
+ sum += qlp_coeff[11] * data[i-12];
+ sum += qlp_coeff[10] * data[i-11];
+ sum += qlp_coeff[ 9] * data[i-10];
+ sum += qlp_coeff[ 8] * data[i- 9];
+ sum += qlp_coeff[ 7] * data[i- 8];
+ sum += qlp_coeff[ 6] * data[i- 7];
+ sum += qlp_coeff[ 5] * data[i- 6];
+ sum += qlp_coeff[ 4] * data[i- 5];
+ sum += qlp_coeff[ 3] * data[i- 4];
+ sum += qlp_coeff[ 2] * data[i- 3];
+ sum += qlp_coeff[ 1] * data[i- 2];
+ sum += qlp_coeff[ 0] * data[i- 1];
}
data[i] = residual[i] + (sum >> lp_quantization);
}
@@ -1106,10 +1106,10 @@ void FLAC__lpc_restore_signal_wide(const FLAC__int32 residual[], unsigned data_l
FLAC__ASSERT(order <= 32);
/*
- * We do unique versions up to 12th order since that's the subset limit.
- * Also they are roughly ordered to match frequency of occurrence to
- * minimize branching.
- */
+ * We do unique versions up to 12th order since that's the subset limit.
+ * Also they are roughly ordered to match frequency of occurrence to
+ * minimize branching.
+ */
if(order <= 12) {
if(order > 8) {
if(order > 10) {
@@ -1301,18 +1301,18 @@ void FLAC__lpc_restore_signal_wide(const FLAC__int32 residual[], unsigned data_l
case 15: sum += qlp_coeff[14] * (FLAC__int64)data[i-15];
case 14: sum += qlp_coeff[13] * (FLAC__int64)data[i-14];
case 13: sum += qlp_coeff[12] * (FLAC__int64)data[i-13];
- sum += qlp_coeff[11] * (FLAC__int64)data[i-12];
- sum += qlp_coeff[10] * (FLAC__int64)data[i-11];
- sum += qlp_coeff[ 9] * (FLAC__int64)data[i-10];
- sum += qlp_coeff[ 8] * (FLAC__int64)data[i- 9];
- sum += qlp_coeff[ 7] * (FLAC__int64)data[i- 8];
- sum += qlp_coeff[ 6] * (FLAC__int64)data[i- 7];
- sum += qlp_coeff[ 5] * (FLAC__int64)data[i- 6];
- sum += qlp_coeff[ 4] * (FLAC__int64)data[i- 5];
- sum += qlp_coeff[ 3] * (FLAC__int64)data[i- 4];
- sum += qlp_coeff[ 2] * (FLAC__int64)data[i- 3];
- sum += qlp_coeff[ 1] * (FLAC__int64)data[i- 2];
- sum += qlp_coeff[ 0] * (FLAC__int64)data[i- 1];
+ sum += qlp_coeff[11] * (FLAC__int64)data[i-12];
+ sum += qlp_coeff[10] * (FLAC__int64)data[i-11];
+ sum += qlp_coeff[ 9] * (FLAC__int64)data[i-10];
+ sum += qlp_coeff[ 8] * (FLAC__int64)data[i- 9];
+ sum += qlp_coeff[ 7] * (FLAC__int64)data[i- 8];
+ sum += qlp_coeff[ 6] * (FLAC__int64)data[i- 7];
+ sum += qlp_coeff[ 5] * (FLAC__int64)data[i- 6];
+ sum += qlp_coeff[ 4] * (FLAC__int64)data[i- 5];
+ sum += qlp_coeff[ 3] * (FLAC__int64)data[i- 4];
+ sum += qlp_coeff[ 2] * (FLAC__int64)data[i- 3];
+ sum += qlp_coeff[ 1] * (FLAC__int64)data[i- 2];
+ sum += qlp_coeff[ 0] * (FLAC__int64)data[i- 1];
}
data[i] = residual[i] + (FLAC__int32)(sum >> lp_quantization);
}
diff --git a/src/lib/libflac/libflac/md5.c b/src/lib/libflac/libflac/md5.c
index 396c1aa451b..f958cb51106 100644
--- a/src/lib/libflac/libflac/md5.c
+++ b/src/lib/libflac/libflac/md5.c
@@ -2,8 +2,8 @@
# include <config.h>
#endif
-#include <stdlib.h> /* for malloc() */
-#include <string.h> /* for memcpy() */
+#include <stdlib.h> /* for malloc() */
+#include <string.h> /* for memcpy() */
#include "private/md5.h"
#include "share/alloc.h"
@@ -47,7 +47,7 @@
/* This is the central step in the MD5 algorithm. */
#define MD5STEP(f,w,x,y,z,in,s) \
- (w += f(x,y,z) + in, w = (w<<s | w>>(32-s)) + x)
+ (w += f(x,y,z) + in, w = (w<<s | w>>(32-s)) + x)
/*
* The core of the MD5 algorithm, this alters an existing MD5 hash to
@@ -186,9 +186,9 @@ static void FLAC__MD5Update(FLAC__MD5Context *ctx, FLAC__byte const *buf, unsign
t = ctx->bytes[0];
if ((ctx->bytes[0] = t + len) < t)
- ctx->bytes[1]++; /* Carry from low to high */
+ ctx->bytes[1]++; /* Carry from low to high */
- t = 64 - (t & 0x3f); /* Space available in ctx->in (at least 1) */
+ t = 64 - (t & 0x3f); /* Space available in ctx->in (at least 1) */
if (t > len) {
memcpy((FLAC__byte *)ctx->in + 64 - t, buf, len);
return;
@@ -237,7 +237,7 @@ void FLAC__MD5Init(FLAC__MD5Context *ctx)
*/
void FLAC__MD5Final(FLAC__byte digest[16], FLAC__MD5Context *ctx)
{
- int count = ctx->bytes[0] & 0x3f; /* Number of bytes in ctx->in */
+ int count = ctx->bytes[0] & 0x3f; /* Number of bytes in ctx->in */
FLAC__byte *p = (FLAC__byte *)ctx->in + count;
/* Set the first char of padding to 0x80. There is always room. */
@@ -246,7 +246,7 @@ void FLAC__MD5Final(FLAC__byte digest[16], FLAC__MD5Context *ctx)
/* Bytes of padding needed to make 56 bytes (-8..55) */
count = 56 - 1 - count;
- if (count < 0) { /* Padding forces an extra block */
+ if (count < 0) { /* Padding forces an extra block */
memset(p, 0, count + 8);
byteSwapX16(ctx->in);
FLAC__MD5Transform(ctx->buf, ctx->in);
@@ -268,7 +268,7 @@ void FLAC__MD5Final(FLAC__byte digest[16], FLAC__MD5Context *ctx)
ctx->internal_buf = 0;
ctx->capacity = 0;
}
- memset(ctx, 0, sizeof(*ctx)); /* In case it's sensitive */
+ memset(ctx, 0, sizeof(*ctx)); /* In case it's sensitive */
}
/*
diff --git a/src/lib/libflac/libflac/metadata_iterators.c b/src/lib/libflac/libflac/metadata_iterators.c
index 4ea6595d352..5038cda291b 100644
--- a/src/lib/libflac/libflac/metadata_iterators.c
+++ b/src/lib/libflac/libflac/metadata_iterators.c
@@ -264,9 +264,9 @@ void metadata_callback_(const FLAC__StreamDecoder *decoder, const FLAC__StreamMe
(void)decoder;
/*
- * we assume we only get here when the one metadata block we were
- * looking for was passed to us
- */
+ * we assume we only get here when the one metadata block we were
+ * looking for was passed to us
+ */
if(!cd->got_error && 0 == cd->object) {
if(0 == (cd->object = FLAC__metadata_object_clone(metadata)))
cd->got_error = true;
@@ -906,10 +906,10 @@ struct FLAC__Metadata_Chain {
FLAC__Metadata_ChainStatus status;
off_t first_offset, last_offset;
/*
- * This is the length of the chain initially read from the FLAC file.
- * it is used to compare against the current length to decide whether
- * or not the whole file has to be rewritten.
- */
+ * This is the length of the chain initially read from the FLAC file.
+ * it is used to compare against the current length to decide whether
+ * or not the whole file has to be rewritten.
+ */
off_t initial_length;
/* @@@ hacky, these are currently only needed by ogg reader */
FLAC__IOHandle handle;
@@ -1613,9 +1613,9 @@ FLAC_API FLAC__bool FLAC__metadata_chain_read_ogg_with_callbacks(FLAC__Metadata_
FLAC_API FLAC__bool FLAC__metadata_chain_check_if_tempfile_needed(FLAC__Metadata_Chain *chain, FLAC__bool use_padding)
{
/* This does all the same checks that are in chain_prepare_for_write_()
- * but doesn't actually alter the chain. Make sure to update the logic
- * here if chain_prepare_for_write_() changes.
- */
+ * but doesn't actually alter the chain. Make sure to update the logic
+ * here if chain_prepare_for_write_() changes.
+ */
const off_t current_length = chain_calculate_length_(chain);
FLAC__ASSERT(0 != chain);
@@ -1811,9 +1811,9 @@ FLAC_API void FLAC__metadata_chain_sort_padding(FLAC__Metadata_Chain *chain)
FLAC__ASSERT(0 != chain);
/*
- * Don't try and be too smart... this simple algo is good enough for
- * the small number of nodes that we deal with.
- */
+ * Don't try and be too smart... this simple algo is good enough for
+ * the small number of nodes that we deal with.
+ */
for(i = 0, node = chain->head; i < chain->nodes; i++) {
if(node->data->type == FLAC__METADATA_TYPE_PADDING) {
save = node->next;
@@ -1835,9 +1835,9 @@ FLAC_API FLAC__Metadata_Iterator *FLAC__metadata_iterator_new(void)
FLAC__Metadata_Iterator *iterator = (FLAC__Metadata_Iterator*)calloc(1, sizeof(FLAC__Metadata_Iterator));
/* calloc() implies:
- iterator->current = 0;
- iterator->chain = 0;
- */
+ iterator->current = 0;
+ iterator->chain = 0;
+ */
return iterator;
}
@@ -2087,9 +2087,9 @@ FLAC__bool read_metadata_block_header_cb_(FLAC__IOHandle handle, FLAC__IOCallbac
*length = unpack_uint32_(raw_header + 1, 3);
/* Note that we don't check:
- * if(iterator->type >= FLAC__METADATA_TYPE_UNDEFINED)
- * we just will read in an opaque block
- */
+ * if(iterator->type >= FLAC__METADATA_TYPE_UNDEFINED)
+ * we just will read in an opaque block
+ */
return true;
}
@@ -2126,9 +2126,9 @@ FLAC__Metadata_SimpleIteratorStatus read_metadata_block_data_streaminfo_cb_(FLAC
b = buffer;
/* we are using hardcoded numbers for simplicity but we should
- * probably eventually write a bit-level unpacker and use the
- * _STREAMINFO_ constants.
- */
+ * probably eventually write a bit-level unpacker and use the
+ * _STREAMINFO_ constants.
+ */
block->min_blocksize = unpack_uint32_(b, 2); b += 2;
block->max_blocksize = unpack_uint32_(b, 2); b += 2;
block->min_framesize = unpack_uint32_(b, 3); b += 3;
@@ -2555,9 +2555,9 @@ FLAC__bool write_metadata_block_data_streaminfo_cb_(FLAC__IOHandle handle, FLAC_
const unsigned bps1 = block->bits_per_sample - 1;
/* we are using hardcoded numbers for simplicity but we should
- * probably eventually write a bit-level packer and use the
- * _STREAMINFO_ constants.
- */
+ * probably eventually write a bit-level packer and use the
+ * _STREAMINFO_ constants.
+ */
pack_uint32_(block->min_blocksize, buffer, 2);
pack_uint32_(block->max_blocksize, buffer+2, 2);
pack_uint32_(block->min_framesize, buffer+4, 3);
@@ -3066,11 +3066,11 @@ FLAC__bool simple_iterator_copy_file_postfix_(FLAC__Metadata_SimpleIterator *ite
if(fixup_is_last_code != 0) {
/*
- * if code == 1, it means a block was appended to the end so
- * we have to clear the is_last flag of the previous block
- * if code == -1, it means the last block was deleted so
- * we have to set the is_last flag of the previous block
- */
+ * if code == 1, it means a block was appended to the end so
+ * we have to clear the is_last flag of the previous block
+ * if code == -1, it means the last block was deleted so
+ * we have to set the is_last flag of the previous block
+ */
/* MAGIC NUMBERs here; we know the is_last flag is the high bit of the byte at this location */
FLAC__byte x;
if(0 != fseeko(*tempfile, fixup_is_last_flag_offset, SEEK_SET)) {
diff --git a/src/lib/libflac/libflac/metadata_object.c b/src/lib/libflac/libflac/metadata_object.c
index f00e0d597f5..5ded5a5c681 100644
--- a/src/lib/libflac/libflac/metadata_object.c
+++ b/src/lib/libflac/libflac/metadata_object.c
@@ -268,13 +268,13 @@ static FLAC__bool vorbiscomment_set_entry_(FLAC__StreamMetadata *object, FLAC__S
/* we have to make sure that the string we're taking over is null-terminated */
/*
- * Stripping the const from src->entry is OK since we're taking
- * ownership of the pointer. This is a hack around a deficiency
- * in the API where the same function is used for 'copy' and
- * 'own', but the source entry is a const pointer. If we were
- * precise, the 'own' flavor would be a separate function with a
- * non-const source pointer. But it's not, so we hack away.
- */
+ * Stripping the const from src->entry is OK since we're taking
+ * ownership of the pointer. This is a hack around a deficiency
+ * in the API where the same function is used for 'copy' and
+ * 'own', but the source entry is a const pointer. If we were
+ * precise, the 'own' flavor would be a separate function with a
+ * non-const source pointer. But it's not, so we hack away.
+ */
if(!ensure_null_terminated_((FLAC__byte**)(&src->entry), src->length))
return false;
*dest = *src;
@@ -447,21 +447,21 @@ FLAC_API FLAC__StreamMetadata *FLAC__metadata_object_new(FLAC__MetadataType type
break;
case FLAC__METADATA_TYPE_PADDING:
/* calloc() took care of this for us:
- object->length = 0;
- */
+ object->length = 0;
+ */
break;
case FLAC__METADATA_TYPE_APPLICATION:
object->length = FLAC__STREAM_METADATA_APPLICATION_ID_LEN / 8;
/* calloc() took care of this for us:
- object->data.application.data = 0;
- */
+ object->data.application.data = 0;
+ */
break;
case FLAC__METADATA_TYPE_SEEKTABLE:
/* calloc() took care of this for us:
- object->length = 0;
- object->data.seek_table.num_points = 0;
- object->data.seek_table.points = 0;
- */
+ object->length = 0;
+ object->data.seek_table.num_points = 0;
+ object->data.seek_table.points = 0;
+ */
break;
case FLAC__METADATA_TYPE_VORBIS_COMMENT:
object->data.vorbis_comment.vendor_string.length = (unsigned)strlen(FLAC__VENDOR_STRING);
@@ -490,13 +490,13 @@ FLAC_API FLAC__StreamMetadata *FLAC__metadata_object_new(FLAC__MetadataType type
object->data.picture.mime_type = 0;
object->data.picture.description = 0;
/* calloc() took care of this for us:
- object->data.picture.width = 0;
- object->data.picture.height = 0;
- object->data.picture.depth = 0;
- object->data.picture.colors = 0;
- object->data.picture.data_length = 0;
- object->data.picture.data = 0;
- */
+ object->data.picture.width = 0;
+ object->data.picture.height = 0;
+ object->data.picture.depth = 0;
+ object->data.picture.colors = 0;
+ object->data.picture.data_length = 0;
+ object->data.picture.data = 0;
+ */
/* now initialize mime_type and description with empty strings to make things easier on the client */
if(!copy_cstring_(&object->data.picture.mime_type, "")) {
free(object);
@@ -511,9 +511,9 @@ FLAC_API FLAC__StreamMetadata *FLAC__metadata_object_new(FLAC__MetadataType type
break;
default:
/* calloc() took care of this for us:
- object->length = 0;
- object->data.unknown.data = 0;
- */
+ object->length = 0;
+ object->data.unknown.data = 0;
+ */
break;
}
}
diff --git a/src/lib/libflac/libflac/stream_decoder.c b/src/lib/libflac/libflac/stream_decoder.c
index dfd5809c1a3..8fa8c13e931 100644
--- a/src/lib/libflac/libflac/stream_decoder.c
+++ b/src/lib/libflac/libflac/stream_decoder.c
@@ -400,8 +400,8 @@ static FLAC__StreamDecoderInitStatus init_stream_internal_(
#endif
/*
- * get the CPU info and set the function pointers
- */
+ * get the CPU info and set the function pointers
+ */
FLAC__cpu_info(&decoder->private_->cpuinfo);
/* first default to the non-asm routines */
decoder->private_->local_lpc_restore_signal = FLAC__lpc_restore_signal;
@@ -549,10 +549,10 @@ static FLAC__StreamDecoderInitStatus init_FILE_internal_(
return decoder->protected_->state = FLAC__STREAM_DECODER_INIT_STATUS_INVALID_CALLBACKS;
/*
- * To make sure that our file does not go unclosed after an error, we
- * must assign the FILE pointer before any further error can occur in
- * this routine.
- */
+ * To make sure that our file does not go unclosed after an error, we
+ * must assign the FILE pointer before any further error can occur in
+ * this routine.
+ */
if(file == stdin)
file = get_binary_stdin_(); /* just to be safe */
@@ -612,10 +612,10 @@ static FLAC__StreamDecoderInitStatus init_file_internal_(
FLAC__ASSERT(0 != decoder);
/*
- * To make sure that our file does not go unclosed after an error, we
- * have to do the same entrance checks here that are later performed
- * in FLAC__stream_decoder_init_FILE() before the FILE* is assigned.
- */
+ * To make sure that our file does not go unclosed after an error, we
+ * have to do the same entrance checks here that are later performed
+ * in FLAC__stream_decoder_init_FILE() before the FILE* is assigned.
+ */
if(decoder->protected_->state != FLAC__STREAM_DECODER_UNINITIALIZED)
return decoder->protected_->state = FLAC__STREAM_DECODER_INIT_STATUS_ALREADY_INITIALIZED;
@@ -667,8 +667,8 @@ FLAC_API FLAC__bool FLAC__stream_decoder_finish(FLAC__StreamDecoder *decoder)
return true;
/* see the comment in FLAC__seekable_stream_decoder_reset() as to why we
- * always call FLAC__MD5Final()
- */
+ * always call FLAC__MD5Final()
+ */
FLAC__MD5Final(decoder->private_->computed_md5sum, &decoder->private_->md5context);
if(decoder->private_->has_seek_table && 0 != decoder->private_->seek_table.data.seek_table.points) {
@@ -679,11 +679,11 @@ FLAC_API FLAC__bool FLAC__stream_decoder_finish(FLAC__StreamDecoder *decoder)
FLAC__bitreader_free(decoder->private_->input);
for(i = 0; i < FLAC__MAX_CHANNELS; i++) {
/* WATCHOUT:
- * FLAC__lpc_restore_signal_asm_ia32_mmx() requires that the
- * output arrays have a buffer of up to 3 zeroes in front
- * (at negative indices) for alignment purposes; we use 4
- * to keep the data well-aligned.
- */
+ * FLAC__lpc_restore_signal_asm_ia32_mmx() requires that the
+ * output arrays have a buffer of up to 3 zeroes in front
+ * (at negative indices) for alignment purposes; we use 4
+ * to keep the data well-aligned.
+ */
if(0 != decoder->private_->output[i]) {
free(decoder->private_->output[i]-4);
decoder->private_->output[i] = 0;
@@ -987,10 +987,10 @@ FLAC_API FLAC__bool FLAC__stream_decoder_reset(FLAC__StreamDecoder *decoder)
#endif
/* Rewind if necessary. If FLAC__stream_decoder_init() is calling us,
- * (internal_reset_hack) don't try to rewind since we are already at
- * the beginning of the stream and don't want to fail if the input is
- * not seekable.
- */
+ * (internal_reset_hack) don't try to rewind since we are already at
+ * the beginning of the stream and don't want to fail if the input is
+ * not seekable.
+ */
if(!decoder->private_->internal_reset_hack) {
if(decoder->private_->file == stdin)
return false; /* can't rewind stdin, reset fails */
@@ -1010,17 +1010,17 @@ FLAC_API FLAC__bool FLAC__stream_decoder_reset(FLAC__StreamDecoder *decoder)
}
decoder->private_->do_md5_checking = decoder->protected_->md5_checking;
/*
- * This goes in reset() and not flush() because according to the spec, a
- * fixed-blocksize stream must stay that way through the whole stream.
- */
+ * This goes in reset() and not flush() because according to the spec, a
+ * fixed-blocksize stream must stay that way through the whole stream.
+ */
decoder->private_->fixed_block_size = decoder->private_->next_fixed_block_size = 0;
/* We initialize the FLAC__MD5Context even though we may never use it. This
- * is because md5 checking may be turned on to start and then turned off if
- * a seek occurs. So we init the context here and finalize it in
- * FLAC__stream_decoder_finish() to make sure things are always cleaned up
- * properly.
- */
+ * is because md5 checking may be turned on to start and then turned off if
+ * a seek occurs. So we init the context here and finalize it in
+ * FLAC__stream_decoder_finish() to make sure things are always cleaned up
+ * properly.
+ */
FLAC__MD5Init(&decoder->private_->md5context);
decoder->private_->first_frame_offset = 0;
@@ -1276,11 +1276,11 @@ void set_defaults_(FLAC__StreamDecoder *decoder)
*/
FILE *get_binary_stdin_(void)
{
- #if 0
+ #if 0
/* if something breaks here it is probably due to the presence or
- * absence of an underscore before the identifiers 'setmode',
- * 'fileno', and/or 'O_BINARY'; check your system header files.
- */
+ * absence of an underscore before the identifiers 'setmode',
+ * 'fileno', and/or 'O_BINARY'; check your system header files.
+ */
#if defined _MSC_VER || defined __MINGW32__
_setmode(_fileno(stdin), _O_BINARY);
#elif defined __CYGWIN__
@@ -1289,7 +1289,7 @@ FILE *get_binary_stdin_(void)
#elif defined __EMX__
setmode(fileno(stdin), O_BINARY);
#endif
- #endif
+ #endif
return stdin;
}
@@ -1316,11 +1316,11 @@ FLAC__bool allocate_output_(FLAC__StreamDecoder *decoder, unsigned size, unsigne
for(i = 0; i < channels; i++) {
/* WATCHOUT:
- * FLAC__lpc_restore_signal_asm_ia32_mmx() requires that the
- * output arrays have a buffer of up to 3 zeroes in front
- * (at negative indices) for alignment purposes; we use 4
- * to keep the data well-aligned.
- */
+ * FLAC__lpc_restore_signal_asm_ia32_mmx() requires that the
+ * output arrays have a buffer of up to 3 zeroes in front
+ * (at negative indices) for alignment purposes; we use 4
+ * to keep the data well-aligned.
+ */
tmp = (FLAC__int32*)safe_malloc_muladd2_(sizeof(FLAC__int32), /*times (*/size, /*+*/4/*)*/);
if(tmp == 0) {
decoder->protected_->state = FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR;
@@ -1330,8 +1330,8 @@ FLAC__bool allocate_output_(FLAC__StreamDecoder *decoder, unsigned size, unsigne
decoder->private_->output[i] = tmp + 4;
/* WATCHOUT:
- * minimum of quadword alignment for PPC vector optimizations is REQUIRED:
- */
+ * minimum of quadword alignment for PPC vector optimizations is REQUIRED:
+ */
if(!FLAC__memory_alloc_aligned_int32_array(size, &decoder->private_->residual_unaligned[i], &decoder->private_->residual[i])) {
decoder->protected_->state = FLAC__STREAM_DECODER_MEMORY_ALLOCATION_ERROR;
return false;
@@ -2012,8 +2012,8 @@ FLAC__bool read_frame_(FLAC__StreamDecoder *decoder, FLAC__bool *got_a_frame, FL
return false;
for(channel = 0; channel < decoder->private_->frame.header.channels; channel++) {
/*
- * first figure the correct bits-per-sample of the subframe
- */
+ * first figure the correct bits-per-sample of the subframe
+ */
unsigned bps = decoder->private_->frame.header.bits_per_sample;
switch(decoder->private_->frame.header.channel_assignment) {
case FLAC__CHANNEL_ASSIGNMENT_INDEPENDENT:
@@ -2038,8 +2038,8 @@ FLAC__bool read_frame_(FLAC__StreamDecoder *decoder, FLAC__bool *got_a_frame, FL
FLAC__ASSERT(0);
}
/*
- * now read it
- */
+ * now read it
+ */
if(!read_subframe_(decoder, channel, bps, do_full_decode))
return false;
if(decoder->protected_->state == FLAC__STREAM_DECODER_SEARCH_FOR_FRAME_SYNC) /* means bad sync or got corruption */
@@ -2051,8 +2051,8 @@ FLAC__bool read_frame_(FLAC__StreamDecoder *decoder, FLAC__bool *got_a_frame, FL
return true;
/*
- * Read the frame CRC-16 from the footer and check
- */
+ * Read the frame CRC-16 from the footer and check
+ */
frame_crc = FLAC__bitreader_get_read_crc16(decoder->private_->input);
if(!FLAC__bitreader_read_raw_uint32(decoder->private_->input, &x, FLAC__FRAME_FOOTER_CRC_LEN))
return false; /* read_callback_ sets the state for us */
@@ -2154,27 +2154,27 @@ FLAC__bool read_frame_header_(FLAC__StreamDecoder *decoder)
is_unparseable = true;
/*
- * Note that along the way as we read the header, we look for a sync
- * code inside. If we find one it would indicate that our original
- * sync was bad since there cannot be a sync code in a valid header.
- *
- * Three kinds of things can go wrong when reading the frame header:
- * 1) We may have sync'ed incorrectly and not landed on a frame header.
- * If we don't find a sync code, it can end up looking like we read
- * a valid but unparseable header, until getting to the frame header
- * CRC. Even then we could get a false positive on the CRC.
- * 2) We may have sync'ed correctly but on an unparseable frame (from a
- * future encoder).
- * 3) We may be on a damaged frame which appears valid but unparseable.
- *
- * For all these reasons, we try and read a complete frame header as
- * long as it seems valid, even if unparseable, up until the frame
- * header CRC.
- */
+ * Note that along the way as we read the header, we look for a sync
+ * code inside. If we find one it would indicate that our original
+ * sync was bad since there cannot be a sync code in a valid header.
+ *
+ * Three kinds of things can go wrong when reading the frame header:
+ * 1) We may have sync'ed incorrectly and not landed on a frame header.
+ * If we don't find a sync code, it can end up looking like we read
+ * a valid but unparseable header, until getting to the frame header
+ * CRC. Even then we could get a false positive on the CRC.
+ * 2) We may have sync'ed correctly but on an unparseable frame (from a
+ * future encoder).
+ * 3) We may be on a damaged frame which appears valid but unparseable.
+ *
+ * For all these reasons, we try and read a complete frame header as
+ * long as it seems valid, even if unparseable, up until the frame
+ * header CRC.
+ */
/*
- * read in the raw header as bytes so we can CRC it, and parse it on the way
- */
+ * read in the raw header as bytes so we can CRC it, and parse it on the way
+ */
for(i = 0; i < 2; i++) {
if(!FLAC__bitreader_read_raw_uint32(decoder->private_->input, &x, 8))
return false; /* read_callback_ sets the state for us */
@@ -2465,8 +2465,8 @@ FLAC__bool read_subframe_(FLAC__StreamDecoder *decoder, unsigned channel, unsign
decoder->private_->frame.subframes[channel].wasted_bits = 0;
/*
- * Lots of magic numbers here
- */
+ * Lots of magic numbers here
+ */
if(x & 0x80) {
send_error_to_client_(decoder, FLAC__STREAM_DECODER_ERROR_STATUS_LOST_SYNC);
decoder->protected_->state = FLAC__STREAM_DECODER_SEARCH_FOR_FRAME_SYNC;
@@ -2666,8 +2666,8 @@ FLAC__bool read_subframe_lpc_(FLAC__StreamDecoder *decoder, unsigned channel, un
if(do_full_decode) {
memcpy(decoder->private_->output[channel], subframe->warmup, sizeof(FLAC__int32) * order);
/*@@@@@@ technically not pessimistic enough, should be more like
- if( (FLAC__uint64)order * ((((FLAC__uint64)1)<<bps)-1) * ((1<<subframe->qlp_coeff_precision)-1) < (((FLAC__uint64)-1) << 32) )
- */
+ if( (FLAC__uint64)order * ((((FLAC__uint64)1)<<bps)-1) * ((1<<subframe->qlp_coeff_precision)-1) < (((FLAC__uint64)-1) << 32) )
+ */
if(bps + subframe->qlp_coeff_precision + FLAC__bitmath_ilog2(order) <= 32)
if(bps <= 16 && subframe->qlp_coeff_precision <= 16) {
if(order <= 8)
@@ -2796,15 +2796,15 @@ FLAC__bool read_callback_(FLAC__byte buffer[], size_t *bytes, void *client_data)
}
else if(*bytes > 0) {
/* While seeking, it is possible for our seek to land in the
- * middle of audio data that looks exactly like a frame header
- * from a future version of an encoder. When that happens, our
- * error callback will get an
- * FLAC__STREAM_DECODER_UNPARSEABLE_STREAM and increment its
- * unparseable_frame_count. But there is a remote possibility
- * that it is properly synced at such a "future-codec frame",
- * so to make sure, we wait to see many "unparseable" errors in
- * a row before bailing out.
- */
+ * middle of audio data that looks exactly like a frame header
+ * from a future version of an encoder. When that happens, our
+ * error callback will get an
+ * FLAC__STREAM_DECODER_UNPARSEABLE_STREAM and increment its
+ * unparseable_frame_count. But there is a remote possibility
+ * that it is properly synced at such a "future-codec frame",
+ * so to make sure, we wait to see many "unparseable" errors in
+ * a row before bailing out.
+ */
if(decoder->private_->is_seeking && decoder->private_->unparseable_frame_count > 20) {
decoder->protected_->state = FLAC__STREAM_DECODER_ABORTED;
return false;
@@ -2848,15 +2848,15 @@ FLAC__bool read_callback_(FLAC__byte buffer[], size_t *bytes, void *client_data)
return false;
}
/* [1] @@@ HACK NOTE: The end-of-stream checking has to be hacked around
- * for Ogg FLAC. This is because the ogg decoder aspect can lose sync
- * and at the same time hit the end of the stream (for example, seeking
- * to a point that is after the beginning of the last Ogg page). There
- * is no way to report an Ogg sync loss through the callbacks (see note
- * in read_callback_ogg_aspect_()) so it returns CONTINUE with *bytes==0.
- * So to keep the decoder from stopping at this point we gate the call
- * to the eof_callback and let the Ogg decoder aspect set the
- * end-of-stream state when it is needed.
- */
+ * for Ogg FLAC. This is because the ogg decoder aspect can lose sync
+ * and at the same time hit the end of the stream (for example, seeking
+ * to a point that is after the beginning of the last Ogg page). There
+ * is no way to report an Ogg sync loss through the callbacks (see note
+ * in read_callback_ogg_aspect_()) so it returns CONTINUE with *bytes==0.
+ * So to keep the decoder from stopping at this point we gate the call
+ * to the eof_callback and let the Ogg decoder aspect set the
+ * end-of-stream state when it is needed.
+ */
}
#if FLAC__HAS_OGG
@@ -2866,9 +2866,9 @@ FLAC__StreamDecoderReadStatus read_callback_ogg_aspect_(const FLAC__StreamDecode
case FLAC__OGG_DECODER_ASPECT_READ_STATUS_OK:
return FLAC__STREAM_DECODER_READ_STATUS_CONTINUE;
/* we don't really have a way to handle lost sync via read
- * callback so we'll let it pass and let the underlying
- * FLAC decoder catch the error
- */
+ * callback so we'll let it pass and let the underlying
+ * FLAC decoder catch the error
+ */
case FLAC__OGG_DECODER_ASPECT_READ_STATUS_LOST_SYNC:
return FLAC__STREAM_DECODER_READ_STATUS_CONTINUE;
case FLAC__OGG_DECODER_ASPECT_READ_STATUS_END_OF_STREAM:
@@ -2944,9 +2944,9 @@ FLAC__StreamDecoderWriteStatus write_audio_frame_to_client_(FLAC__StreamDecoder
}
else {
/*
- * If we never got STREAMINFO, turn off MD5 checking to save
- * cycles since we don't have a sum to compare to anyway
- */
+ * If we never got STREAMINFO, turn off MD5 checking to save
+ * cycles since we don't have a sum to compare to anyway
+ */
if(!decoder->private_->has_stream_info)
decoder->private_->do_md5_checking = false;
if(decoder->private_->do_md5_checking) {
@@ -2992,11 +2992,11 @@ FLAC__bool seek_to_absolute_sample_(FLAC__StreamDecoder *decoder, FLAC__uint64 s
if(max_framesize > 0)
approx_bytes_per_frame = (max_framesize + min_framesize) / 2 + 1;
/*
- * Check if it's a known fixed-blocksize stream. Note that though
- * the spec doesn't allow zeroes in the STREAMINFO block, we may
- * never get a STREAMINFO block when decoding so the value of
- * min_blocksize might be zero.
- */
+ * Check if it's a known fixed-blocksize stream. Note that though
+ * the spec doesn't allow zeroes in the STREAMINFO block, we may
+ * never get a STREAMINFO block when decoding so the value of
+ * min_blocksize might be zero.
+ */
else if(min_blocksize == max_blocksize && min_blocksize > 0) {
/* note there are no () around 'bps/8' to keep precision up since it's an integer calulation */
approx_bytes_per_frame = min_blocksize * channels * bps/8 + 64;
@@ -3005,24 +3005,24 @@ FLAC__bool seek_to_absolute_sample_(FLAC__StreamDecoder *decoder, FLAC__uint64 s
approx_bytes_per_frame = 4096 * channels * bps/8 + 64;
/*
- * First, we set an upper and lower bound on where in the
- * stream we will search. For now we assume the worst case
- * scenario, which is our best guess at the beginning of
- * the first frame and end of the stream.
- */
+ * First, we set an upper and lower bound on where in the
+ * stream we will search. For now we assume the worst case
+ * scenario, which is our best guess at the beginning of
+ * the first frame and end of the stream.
+ */
lower_bound = first_frame_offset;
lower_bound_sample = 0;
upper_bound = stream_length;
upper_bound_sample = total_samples > 0 ? total_samples : target_sample /*estimate it*/;
/*
- * Now we refine the bounds if we have a seektable with
- * suitable points. Note that according to the spec they
- * must be ordered by ascending sample number.
- *
- * Note: to protect against invalid seek tables we will ignore points
- * that have frame_samples==0 or sample_number>=total_samples
- */
+ * Now we refine the bounds if we have a seektable with
+ * suitable points. Note that according to the spec they
+ * must be ordered by ascending sample number.
+ *
+ * Note: to protect against invalid seek tables we will ignore points
+ * that have frame_samples==0 or sample_number>=total_samples
+ */
if(seek_table) {
FLAC__uint64 new_lower_bound = lower_bound;
FLAC__uint64 new_upper_bound = upper_bound;
@@ -3069,14 +3069,14 @@ FLAC__bool seek_to_absolute_sample_(FLAC__StreamDecoder *decoder, FLAC__uint64 s
FLAC__ASSERT(upper_bound_sample >= lower_bound_sample);
/* there are 2 insidious ways that the following equality occurs, which
- * we need to fix:
- * 1) total_samples is 0 (unknown) and target_sample is 0
- * 2) total_samples is 0 (unknown) and target_sample happens to be
- * exactly equal to the last seek point in the seek table; this
- * means there is no seek point above it, and upper_bound_samples
- * remains equal to the estimate (of target_samples) we made above
- * in either case it does not hurt to move upper_bound_sample up by 1
- */
+ * we need to fix:
+ * 1) total_samples is 0 (unknown) and target_sample is 0
+ * 2) total_samples is 0 (unknown) and target_sample happens to be
+ * exactly equal to the last seek point in the seek table; this
+ * means there is no seek point above it, and upper_bound_samples
+ * remains equal to the estimate (of target_samples) we made above
+ * in either case it does not hurt to move upper_bound_sample up by 1
+ */
if(upper_bound_sample == lower_bound_sample)
upper_bound_sample++;
@@ -3114,11 +3114,11 @@ FLAC__bool seek_to_absolute_sample_(FLAC__StreamDecoder *decoder, FLAC__uint64 s
return false;
}
/* Now we need to get a frame. First we need to reset our
- * unparseable_frame_count; if we get too many unparseable
- * frames in a row, the read callback will return
- * FLAC__STREAM_DECODER_READ_STATUS_ABORT, causing
- * FLAC__stream_decoder_process_single() to return false.
- */
+ * unparseable_frame_count; if we get too many unparseable
+ * frames in a row, the read callback will return
+ * FLAC__STREAM_DECODER_READ_STATUS_ABORT, causing
+ * FLAC__stream_decoder_process_single() to return false.
+ */
decoder->private_->unparseable_frame_count = 0;
if(!FLAC__stream_decoder_process_single(decoder)) {
decoder->protected_->state = FLAC__STREAM_DECODER_SEEK_ERROR;
@@ -3190,20 +3190,20 @@ FLAC__bool seek_to_absolute_sample_ogg_(FLAC__StreamDecoder *decoder, FLAC__uint
unsigned iteration = 0;
/* In the first iterations, we will calculate the target byte position
- * by the distance from the target sample to left_sample and
- * right_sample (let's call it "proportional search"). After that, we
- * will switch to binary search.
- */
+ * by the distance from the target sample to left_sample and
+ * right_sample (let's call it "proportional search"). After that, we
+ * will switch to binary search.
+ */
unsigned BINARY_SEARCH_AFTER_ITERATION = 2;
/* We will switch to a linear search once our current sample is less
- * than this number of samples ahead of the target sample
- */
+ * than this number of samples ahead of the target sample
+ */
static const FLAC__uint64 LINEAR_SEARCH_WITHIN_SAMPLES = FLAC__MAX_BLOCK_SIZE * 2;
/* If the total number of samples is unknown, use a large value, and
- * force binary search immediately.
- */
+ * force binary search immediately.
+ */
if(right_sample == 0) {
right_sample = (FLAC__uint64)(-1);
BINARY_SEARCH_AFTER_ITERATION = 0;
@@ -3231,10 +3231,10 @@ FLAC__bool seek_to_absolute_sample_ogg_(FLAC__StreamDecoder *decoder, FLAC__uint
pos = (FLAC__int64)((((target_sample-left_sample)>>8) * ((right_pos-left_pos)>>8)) / ((right_sample-left_sample)>>16));
#endif
/* @@@ TODO: might want to limit pos to some distance
- * before EOF, to make sure we land before the last frame,
- * thereby getting a this_frame_sample and so having a better
- * estimate.
- */
+ * before EOF, to make sure we land before the last frame,
+ * thereby getting a this_frame_sample and so having a better
+ * estimate.
+ */
}
/* physical seek */
@@ -3259,16 +3259,16 @@ FLAC__bool seek_to_absolute_sample_ogg_(FLAC__StreamDecoder *decoder, FLAC__uint
if(!decoder->private_->got_a_frame) {
if(did_a_seek) {
/* this can happen if we seek to a point after the last frame; we drop
- * to binary search right away in this case to avoid any wasted
- * iterations of proportional search.
- */
+ * to binary search right away in this case to avoid any wasted
+ * iterations of proportional search.
+ */
right_pos = pos;
BINARY_SEARCH_AFTER_ITERATION = 0;
}
else {
/* this can probably only happen if total_samples is unknown and the
- * target_sample is past the end of the stream
- */
+ * target_sample is past the end of the stream
+ */
decoder->protected_->state = FLAC__STREAM_DECODER_SEEK_ERROR;
return false;
}
@@ -3284,11 +3284,11 @@ FLAC__bool seek_to_absolute_sample_ogg_(FLAC__StreamDecoder *decoder, FLAC__uint
if (did_a_seek) {
if (this_frame_sample <= target_sample) {
/* The 'equal' case should not happen, since
- * FLAC__stream_decoder_process_single()
- * should recognize that it has hit the
- * target sample and we would exit through
- * the 'break' above.
- */
+ * FLAC__stream_decoder_process_single()
+ * should recognize that it has hit the
+ * target sample and we would exit through
+ * the 'break' above.
+ */
FLAC__ASSERT(this_frame_sample != target_sample);
left_sample = this_frame_sample;
diff --git a/src/lib/libflac/libflac/stream_encoder.c b/src/lib/libflac/libflac/stream_encoder.c
index 6ef569bc6a4..5462e5d5e14 100644
--- a/src/lib/libflac/libflac/stream_encoder.c
+++ b/src/lib/libflac/libflac/stream_encoder.c
@@ -408,16 +408,16 @@ typedef struct FLAC__StreamEncoderPrivate {
FLAC__uint64 *abs_residual_partition_sums_unaligned;
unsigned *raw_bits_per_partition_unaligned;
/*
- * These fields have been moved here from private function local
- * declarations merely to save stack space during encoding.
- */
+ * These fields have been moved here from private function local
+ * declarations merely to save stack space during encoding.
+ */
#ifndef FLAC__INTEGER_ONLY_LIBRARY
FLAC__real lp_coeff[FLAC__MAX_LPC_ORDER][FLAC__MAX_LPC_ORDER]; /* from process_subframe_() */
#endif
FLAC__EntropyCodingMethod_PartitionedRiceContents partitioned_rice_contents_extra[2]; /* from find_best_partition_order_() */
/*
- * The data for the verify section
- */
+ * The data for the verify section
+ */
struct {
FLAC__StreamDecoder *decoder;
EncoderStateHint state_hint;
@@ -896,8 +896,8 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
encoder->private_->use_wide_by_partition = (false); /*@@@ need to set this */
/*
- * get the CPU info and set the function pointers
- */
+ * get the CPU info and set the function pointers
+ */
FLAC__cpu_info(&encoder->private_->cpuinfo);
/* first default to the non-asm routines */
#ifndef FLAC__INTEGER_ONLY_LIBRARY
@@ -979,13 +979,13 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
}
/*
- * Set up the verify stuff if necessary
- */
+ * Set up the verify stuff if necessary
+ */
if(encoder->protected_->verify) {
/*
- * First, set up the fifo which will hold the
- * original signal to compare against
- */
+ * First, set up the fifo which will hold the
+ * original signal to compare against
+ */
encoder->private_->verify.input_fifo.size = encoder->protected_->blocksize+OVERREAD_;
for(i = 0; i < encoder->protected_->channels; i++) {
if(0 == (encoder->private_->verify.input_fifo.data[i] = (FLAC__int32*)safe_malloc_mul_2op_(sizeof(FLAC__int32), /*times*/encoder->private_->verify.input_fifo.size))) {
@@ -996,8 +996,8 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
encoder->private_->verify.input_fifo.tail = 0;
/*
- * Now set up a stream decoder for verification
- */
+ * Now set up a stream decoder for verification
+ */
encoder->private_->verify.decoder = FLAC__stream_decoder_new();
if(0 == encoder->private_->verify.decoder) {
encoder->protected_->state = FLAC__STREAM_ENCODER_VERIFY_DECODER_ERROR;
@@ -1017,9 +1017,9 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
encoder->private_->verify.error_stats.got = 0;
/*
- * These must be done before we write any metadata, because that
- * calls the write_callback, which uses these values.
- */
+ * These must be done before we write any metadata, because that
+ * calls the write_callback, which uses these values.
+ */
encoder->private_->first_seekpoint_to_check = 0;
encoder->private_->samples_written = 0;
encoder->protected_->streaminfo_offset = 0;
@@ -1027,8 +1027,8 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
encoder->protected_->audio_offset = 0;
/*
- * write the stream header
- */
+ * write the stream header
+ */
if(encoder->protected_->verify)
encoder->private_->verify.state_hint = ENCODER_IN_MAGIC;
if(!FLAC__bitwriter_write_raw_uint32(encoder->private_->frame, FLAC__STREAM_SYNC, FLAC__STREAM_SYNC_LEN)) {
@@ -1041,8 +1041,8 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
}
/*
- * write the STREAMINFO metadata block
- */
+ * write the STREAMINFO metadata block
+ */
if(encoder->protected_->verify)
encoder->private_->verify.state_hint = ENCODER_IN_METADATA;
encoder->private_->streaminfo.type = FLAC__METADATA_TYPE_STREAMINFO;
@@ -1069,23 +1069,23 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
}
/*
- * Now that the STREAMINFO block is written, we can init this to an
- * absurdly-high value...
- */
+ * Now that the STREAMINFO block is written, we can init this to an
+ * absurdly-high value...
+ */
encoder->private_->streaminfo.data.stream_info.min_framesize = (1u << FLAC__STREAM_METADATA_STREAMINFO_MIN_FRAME_SIZE_LEN) - 1;
/* ... and clear this to 0 */
encoder->private_->streaminfo.data.stream_info.total_samples = 0;
/*
- * Check to see if the supplied metadata contains a VORBIS_COMMENT;
- * if not, we will write an empty one (FLAC__add_metadata_block()
- * automatically supplies the vendor string).
- *
- * WATCHOUT: the Ogg FLAC mapping requires us to write this block after
- * the STREAMINFO. (In the case that metadata_has_vorbis_comment is
- * true it will have already insured that the metadata list is properly
- * ordered.)
- */
+ * Check to see if the supplied metadata contains a VORBIS_COMMENT;
+ * if not, we will write an empty one (FLAC__add_metadata_block()
+ * automatically supplies the vendor string).
+ *
+ * WATCHOUT: the Ogg FLAC mapping requires us to write this block after
+ * the STREAMINFO. (In the case that metadata_has_vorbis_comment is
+ * true it will have already insured that the metadata list is properly
+ * ordered.)
+ */
if(!metadata_has_vorbis_comment) {
FLAC__StreamMetadata vorbis_comment;
vorbis_comment.type = FLAC__METADATA_TYPE_VORBIS_COMMENT;
@@ -1106,8 +1106,8 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
}
/*
- * write the user's metadata blocks
- */
+ * write the user's metadata blocks
+ */
for(i = 0; i < encoder->protected_->num_metadata_blocks; i++) {
encoder->protected_->metadata[i]->is_last = (i == encoder->protected_->num_metadata_blocks - 1);
if(!FLAC__add_metadata_block(encoder->protected_->metadata[i], encoder->private_->frame)) {
@@ -1198,10 +1198,10 @@ static FLAC__StreamEncoderInitStatus init_FILE_internal_(
}
/*
- * To make sure that our file does not go unclosed after an error, we
- * must assign the FILE pointer before any further error can occur in
- * this routine.
- */
+ * To make sure that our file does not go unclosed after an error, we
+ * must assign the FILE pointer before any further error can occur in
+ * this routine.
+ */
if(file == stdout)
file = get_binary_stdout_(); /* just to be safe */
@@ -1270,10 +1270,10 @@ static FLAC__StreamEncoderInitStatus init_file_internal_(
FLAC__ASSERT(0 != encoder);
/*
- * To make sure that our file does not go unclosed after an error, we
- * have to do the same entrance checks here that are later performed
- * in FLAC__stream_encoder_init_FILE() before the FILE* is assigned.
- */
+ * To make sure that our file does not go unclosed after an error, we
+ * have to do the same entrance checks here that are later performed
+ * in FLAC__stream_encoder_init_FILE() before the FILE* is assigned.
+ */
if(encoder->protected_->state != FLAC__STREAM_ENCODER_UNINITIALIZED)
return FLAC__STREAM_ENCODER_INIT_STATUS_ALREADY_INITIALIZED;
@@ -2035,13 +2035,13 @@ FLAC_API FLAC__bool FLAC__stream_encoder_process_interleaved(FLAC__StreamEncoder
j = k = 0;
/*
- * we have several flavors of the same basic loop, optimized for
- * different conditions:
- */
+ * we have several flavors of the same basic loop, optimized for
+ * different conditions:
+ */
if(encoder->protected_->do_mid_side_stereo && channels == 2) {
/*
- * stereo coding: unroll channel loop
- */
+ * stereo coding: unroll channel loop
+ */
do {
if(encoder->protected_->verify)
append_to_verify_fifo_interleaved_(&encoder->private_->verify.input_fifo, buffer, j, channels, min(blocksize+OVERREAD_-encoder->private_->current_sample_number, samples-j));
@@ -2075,8 +2075,8 @@ FLAC_API FLAC__bool FLAC__stream_encoder_process_interleaved(FLAC__StreamEncoder
}
else {
/*
- * independent channel coding: buffer each channel in inner loop
- */
+ * independent channel coding: buffer each channel in inner loop
+ */
do {
if(encoder->protected_->verify)
append_to_verify_fifo_interleaved_(&encoder->private_->verify.input_fifo, buffer, j, channels, min(blocksize+OVERREAD_-encoder->private_->current_sample_number, samples-j));
@@ -2261,10 +2261,10 @@ FLAC__bool resize_buffers_(FLAC__StreamEncoder *encoder, unsigned new_blocksize)
ok = true;
/* WATCHOUT: FLAC__lpc_compute_residual_from_qlp_coefficients_asm_ia32_mmx()
- * requires that the input arrays (in our case the integer signals)
- * have a buffer of up to 3 zeroes in front (at negative indices) for
- * alignment purposes; we use 4 in front to keep the data well-aligned.
- */
+ * requires that the input arrays (in our case the integer signals)
+ * have a buffer of up to 3 zeroes in front (at negative indices) for
+ * alignment purposes; we use 4 in front to keep the data well-aligned.
+ */
for(i = 0; ok && i < encoder->protected_->channels; i++) {
ok = ok && FLAC__memory_alloc_aligned_int32_array(new_blocksize+4+OVERREAD_, &encoder->private_->integer_signal_unaligned[i], &encoder->private_->integer_signal[i]);
@@ -2438,8 +2438,8 @@ FLAC__StreamEncoderWriteStatus write_frame_(FLAC__StreamEncoder *encoder, const
}
/*
- * Watch for the STREAMINFO block and first SEEKTABLE block to go by and store their offsets.
- */
+ * Watch for the STREAMINFO block and first SEEKTABLE block to go by and store their offsets.
+ */
if(samples == 0) {
FLAC__MetadataType type = (buffer[0] & 0x7f);
if(type == FLAC__METADATA_TYPE_STREAMINFO)
@@ -2449,10 +2449,10 @@ FLAC__StreamEncoderWriteStatus write_frame_(FLAC__StreamEncoder *encoder, const
}
/*
- * Mark the current seek point if hit (if audio_offset == 0 that
- * means we're still writing metadata and haven't hit the first
- * frame yet)
- */
+ * Mark the current seek point if hit (if audio_offset == 0 that
+ * means we're still writing metadata and haven't hit the first
+ * frame yet)
+ */
if(0 != encoder->private_->seek_table && encoder->protected_->audio_offset > 0 && encoder->private_->seek_table->num_points > 0) {
const unsigned blocksize = FLAC__stream_encoder_get_blocksize(encoder);
const FLAC__uint64 frame_first_sample = encoder->private_->samples_written;
@@ -2470,11 +2470,11 @@ FLAC__StreamEncoderWriteStatus write_frame_(FLAC__StreamEncoder *encoder, const
encoder->private_->seek_table->points[i].frame_samples = blocksize;
encoder->private_->first_seekpoint_to_check++;
/* DO NOT: "break;" and here's why:
- * The seektable template may contain more than one target
- * sample for any given frame; we will keep looping, generating
- * duplicate seekpoints for them, and we'll clean it up later,
- * just before writing the seektable back to the metadata.
- */
+ * The seektable template may contain more than one target
+ * sample for any given frame; we will keep looping, generating
+ * duplicate seekpoints for them, and we'll clean it up later,
+ * just before writing the seektable back to the metadata.
+ */
}
else {
encoder->private_->first_seekpoint_to_check++;
@@ -2504,9 +2504,9 @@ FLAC__StreamEncoderWriteStatus write_frame_(FLAC__StreamEncoder *encoder, const
encoder->private_->bytes_written += bytes;
encoder->private_->samples_written += samples;
/* we keep a high watermark on the number of frames written because
- * when the encoder goes back to write metadata, 'current_frame'
- * will drop back to 0.
- */
+ * when the encoder goes back to write metadata, 'current_frame'
+ * will drop back to 0.
+ */
encoder->private_->frames_written = max(encoder->private_->frames_written, encoder->private_->current_frame_number+1);
}
else
@@ -2529,13 +2529,13 @@ void update_metadata_(const FLAC__StreamEncoder *encoder)
FLAC__ASSERT(metadata->type == FLAC__METADATA_TYPE_STREAMINFO);
/* All this is based on intimate knowledge of the stream header
- * layout, but a change to the header format that would break this
- * would also break all streams encoded in the previous format.
- */
+ * layout, but a change to the header format that would break this
+ * would also break all streams encoded in the previous format.
+ */
/*
- * Write MD5 signature
- */
+ * Write MD5 signature
+ */
{
const unsigned md5_offset =
FLAC__STREAM_METADATA_HEADER_LENGTH +
@@ -2562,8 +2562,8 @@ void update_metadata_(const FLAC__StreamEncoder *encoder)
}
/*
- * Write total samples
- */
+ * Write total samples
+ */
{
const unsigned total_samples_byte_offset =
FLAC__STREAM_METADATA_HEADER_LENGTH +
@@ -2595,8 +2595,8 @@ void update_metadata_(const FLAC__StreamEncoder *encoder)
}
/*
- * Write min/max framesize
- */
+ * Write min/max framesize
+ */
{
const unsigned min_framesize_offset =
FLAC__STREAM_METADATA_HEADER_LENGTH +
@@ -2623,8 +2623,8 @@ void update_metadata_(const FLAC__StreamEncoder *encoder)
}
/*
- * Write seektable
- */
+ * Write seektable
+ */
if(0 != encoder->private_->seek_table && encoder->private_->seek_table->num_points > 0 && encoder->protected_->seektable_offset > 0) {
unsigned i;
@@ -2694,19 +2694,19 @@ void update_ogg_metadata_(FLAC__StreamEncoder *encoder)
FLAC__ASSERT(0 != encoder->private_->seek_callback);
/* Pre-check that client supports seeking, since we don't want the
- * ogg_helper code to ever have to deal with this condition.
- */
+ * ogg_helper code to ever have to deal with this condition.
+ */
if(encoder->private_->seek_callback(encoder, 0, encoder->private_->client_data) == FLAC__STREAM_ENCODER_SEEK_STATUS_UNSUPPORTED)
return;
/* All this is based on intimate knowledge of the stream header
- * layout, but a change to the header format that would break this
- * would also break all streams encoded in the previous format.
- */
+ * layout, but a change to the header format that would break this
+ * would also break all streams encoded in the previous format.
+ */
/**
- ** Write STREAMINFO stats
- **/
+ ** Write STREAMINFO stats
+ **/
simple_ogg_page__init(&page);
if(!simple_ogg_page__get_at(encoder, encoder->protected_->streaminfo_offset, &page, encoder->private_->seek_callback, encoder->private_->read_callback, encoder->private_->client_data)) {
simple_ogg_page__clear(&page);
@@ -2714,8 +2714,8 @@ void update_ogg_metadata_(FLAC__StreamEncoder *encoder)
}
/*
- * Write MD5 signature
- */
+ * Write MD5 signature
+ */
{
const unsigned md5_offset =
FIRST_OGG_PACKET_STREAMINFO_PREFIX_LENGTH +
@@ -2740,8 +2740,8 @@ void update_ogg_metadata_(FLAC__StreamEncoder *encoder)
}
/*
- * Write total samples
- */
+ * Write total samples
+ */
{
const unsigned total_samples_byte_offset =
FIRST_OGG_PACKET_STREAMINFO_PREFIX_LENGTH +
@@ -2772,8 +2772,8 @@ void update_ogg_metadata_(FLAC__StreamEncoder *encoder)
}
/*
- * Write min/max framesize
- */
+ * Write min/max framesize
+ */
{
const unsigned min_framesize_offset =
FIRST_OGG_PACKET_STREAMINFO_PREFIX_LENGTH +
@@ -2803,8 +2803,8 @@ void update_ogg_metadata_(FLAC__StreamEncoder *encoder)
simple_ogg_page__clear(&page);
/*
- * Write seektable
- */
+ * Write seektable
+ */
if(0 != encoder->private_->seek_table && encoder->private_->seek_table->num_points > 0 && encoder->protected_->seektable_offset > 0) {
unsigned i;
FLAC__byte *p;
@@ -2867,32 +2867,32 @@ FLAC__bool process_frame_(FLAC__StreamEncoder *encoder, FLAC__bool is_fractional
FLAC__ASSERT(encoder->protected_->state == FLAC__STREAM_ENCODER_OK);
/*
- * Accumulate raw signal to the MD5 signature
- */
+ * Accumulate raw signal to the MD5 signature
+ */
if(encoder->protected_->do_md5 && !FLAC__MD5Accumulate(&encoder->private_->md5context, (const FLAC__int32 * const *)encoder->private_->integer_signal, encoder->protected_->channels, encoder->protected_->blocksize, (encoder->protected_->bits_per_sample+7) / 8)) {
encoder->protected_->state = FLAC__STREAM_ENCODER_MEMORY_ALLOCATION_ERROR;
return false;
}
/*
- * Process the frame header and subframes into the frame bitbuffer
- */
+ * Process the frame header and subframes into the frame bitbuffer
+ */
if(!process_subframes_(encoder, is_fractional_block)) {
/* the above function sets the state for us in case of an error */
return false;
}
/*
- * Zero-pad the frame to a byte_boundary
- */
+ * Zero-pad the frame to a byte_boundary
+ */
if(!FLAC__bitwriter_zero_pad_to_byte_boundary(encoder->private_->frame)) {
encoder->protected_->state = FLAC__STREAM_ENCODER_MEMORY_ALLOCATION_ERROR;
return false;
}
/*
- * CRC-16 the whole thing
- */
+ * CRC-16 the whole thing
+ */
FLAC__ASSERT(FLAC__bitwriter_is_byte_aligned(encoder->private_->frame));
if(
!FLAC__bitwriter_get_write_crc16(encoder->private_->frame, &crc) ||
@@ -2903,16 +2903,16 @@ FLAC__bool process_frame_(FLAC__StreamEncoder *encoder, FLAC__bool is_fractional
}
/*
- * Write it
- */
+ * Write it
+ */
if(!write_bitbuffer_(encoder, encoder->protected_->blocksize, is_last_block)) {
/* the above function sets the state for us in case of an error */
return false;
}
/*
- * Get ready for the next frame
- */
+ * Get ready for the next frame
+ */
encoder->private_->current_sample_number = 0;
encoder->private_->current_frame_number++;
encoder->private_->streaminfo.data.stream_info.total_samples += (FLAC__uint64)encoder->protected_->blocksize;
@@ -2927,8 +2927,8 @@ FLAC__bool process_subframes_(FLAC__StreamEncoder *encoder, FLAC__bool is_fracti
FLAC__bool do_independent, do_mid_side;
/*
- * Calculate the min,max Rice partition orders
- */
+ * Calculate the min,max Rice partition orders
+ */
if(is_fractional_block) {
max_partition_order = 0;
}
@@ -2939,8 +2939,8 @@ FLAC__bool process_subframes_(FLAC__StreamEncoder *encoder, FLAC__bool is_fracti
min_partition_order = min(min_partition_order, max_partition_order);
/*
- * Setup the frame
- */
+ * Setup the frame
+ */
frame_header.blocksize = encoder->protected_->blocksize;
frame_header.sample_rate = encoder->protected_->sample_rate;
frame_header.channels = encoder->protected_->channels;
@@ -2950,8 +2950,8 @@ FLAC__bool process_subframes_(FLAC__StreamEncoder *encoder, FLAC__bool is_fracti
frame_header.number.frame_number = encoder->private_->current_frame_number;
/*
- * Figure out what channel assignments to try
- */
+ * Figure out what channel assignments to try
+ */
if(encoder->protected_->do_mid_side_stereo) {
if(encoder->protected_->loose_mid_side_stereo) {
if(encoder->private_->loose_mid_side_stereo_frame_count == 0) {
@@ -2976,8 +2976,8 @@ FLAC__bool process_subframes_(FLAC__StreamEncoder *encoder, FLAC__bool is_fracti
FLAC__ASSERT(do_independent || do_mid_side);
/*
- * Check for wasted bits; set effective bps for each subframe
- */
+ * Check for wasted bits; set effective bps for each subframe
+ */
if(do_independent) {
for(channel = 0; channel < encoder->protected_->channels; channel++) {
const unsigned w = get_wasted_bits_(encoder->private_->integer_signal[channel], encoder->protected_->blocksize);
@@ -2995,8 +2995,8 @@ FLAC__bool process_subframes_(FLAC__StreamEncoder *encoder, FLAC__bool is_fracti
}
/*
- * First do a normal encoding pass of each independent channel
- */
+ * First do a normal encoding pass of each independent channel
+ */
if(do_independent) {
for(channel = 0; channel < encoder->protected_->channels; channel++) {
if(!
@@ -3019,8 +3019,8 @@ FLAC__bool process_subframes_(FLAC__StreamEncoder *encoder, FLAC__bool is_fracti
}
/*
- * Now do mid and side channels if requested
- */
+ * Now do mid and side channels if requested
+ */
if(do_mid_side) {
FLAC__ASSERT(encoder->protected_->channels == 2);
@@ -3045,8 +3045,8 @@ FLAC__bool process_subframes_(FLAC__StreamEncoder *encoder, FLAC__bool is_fracti
}
/*
- * Compose the frame bitbuffer
- */
+ * Compose the frame bitbuffer
+ */
if(do_mid_side) {
unsigned left_bps = 0, right_bps = 0; /* initialized only to prevent superfluous compiler warning */
FLAC__Subframe *left_subframe = 0, *right_subframe = 0; /* initialized only to prevent superfluous compiler warning */
@@ -3736,9 +3736,9 @@ unsigned find_best_partition_order_(
{
/*
- * We are allowed to de-const the pointer based on our special
- * knowledge; it is const to the outside world.
- */
+ * We are allowed to de-const the pointer based on our special
+ * knowledge; it is const to the outside world.
+ */
FLAC__EntropyCodingMethod_PartitionedRiceContents* prc = (FLAC__EntropyCodingMethod_PartitionedRiceContents*)best_ecm->data.partitioned_rice.contents;
unsigned partition;
@@ -3748,10 +3748,10 @@ unsigned find_best_partition_order_(
if(do_escape_coding)
memcpy(prc->raw_bits, private_->partitioned_rice_contents_extra[best_parameters_index].raw_bits, sizeof(unsigned)*((unsigned long long)1<<(best_partition_order)));
/*
- * Now need to check if the type should be changed to
- * FLAC__ENTROPY_CODING_METHOD_PARTITIONED_RICE2 based on the
- * size of the rice parameters.
- */
+ * Now need to check if the type should be changed to
+ * FLAC__ENTROPY_CODING_METHOD_PARTITIONED_RICE2 based on the
+ * size of the rice parameters.
+ */
for(partition = 0; partition < (1u<<best_partition_order); partition++) {
if(prc->parameters[partition] >= FLAC__ENTROPY_CODING_METHOD_PARTITIONED_RICE_ESCAPE_PARAMETER) {
best_ecm->type = FLAC__ENTROPY_CODING_METHOD_PARTITIONED_RICE2;
@@ -3934,11 +3934,11 @@ static FLaC__INLINE unsigned count_rice_bits_in_partition_(
)
- (partition_samples >> 1)
/* -(partition_samples>>1) to subtract out extra contributions to the abs_residual_partition_sum.
- * The actual number of bits used is closer to the sum(for all i in the partition) of abs(residual[i])>>(rice_parameter-1)
- * By using the abs_residual_partition sum, we also add in bits in the LSBs that would normally be shifted out.
- * So the subtraction term tries to guess how many extra bits were contributed.
- * If the LSBs are randomly distributed, this should average to 0.5 extra bits per sample.
- */
+ * The actual number of bits used is closer to the sum(for all i in the partition) of abs(residual[i])>>(rice_parameter-1)
+ * By using the abs_residual_partition sum, we also add in bits in the LSBs that would normally be shifted out.
+ * So the subtraction term tries to guess how many extra bits were contributed.
+ * If the LSBs are randomly distributed, this should average to 0.5 extra bits per sample.
+ */
;
}
#endif
@@ -4040,13 +4040,13 @@ FLAC__bool set_partitioned_rice_(
}
mean = abs_residual_partition_sums[partition];
/* we are basically calculating the size in bits of the
- * average residual magnitude in the partition:
- * rice_parameter = floor(log2(mean/partition_samples))
- * 'mean' is not a good name for the variable, it is
- * actually the sum of magnitudes of all residual values
- * in the partition, so the actual mean is
- * mean/partition_samples
- */
+ * average residual magnitude in the partition:
+ * rice_parameter = floor(log2(mean/partition_samples))
+ * 'mean' is not a good name for the variable, it is
+ * actually the sum of magnitudes of all residual values
+ * in the partition, so the actual mean is
+ * mean/partition_samples
+ */
for(rice_parameter = 0, k = partition_samples; k < mean; rice_parameter++, k <<= 1)
;
if(rice_parameter >= rice_parameter_limit) {
@@ -4126,7 +4126,7 @@ unsigned get_wasted_bits_(FLAC__int32 signal[], unsigned samples)
if(shift > 0) {
for(i = 0; i < samples; i++)
- signal[i] >>= shift;
+ signal[i] >>= shift;
}
return shift;
@@ -4176,9 +4176,9 @@ FLAC__StreamDecoderReadStatus verify_read_callback_(const FLAC__StreamDecoder *d
else {
if(encoded_bytes == 0) {
/*
- * If we get here, a FIFO underflow has occurred,
- * which means there is a bug somewhere.
- */
+ * If we get here, a FIFO underflow has occurred,
+ * which means there is a bug somewhere.
+ */
FLAC__ASSERT(0);
return FLAC__STREAM_DECODER_READ_STATUS_ABORT;
}
@@ -4308,21 +4308,21 @@ FLAC__StreamEncoderWriteStatus file_write_callback_(const FLAC__StreamEncoder *e
FLAC__bool call_it = 0 != encoder->private_->progress_callback && (
#if FLAC__HAS_OGG
/* We would like to be able to use 'samples > 0' in the
- * clause here but currently because of the nature of our
- * Ogg writing implementation, 'samples' is always 0 (see
- * ogg_encoder_aspect.c). The downside is extra progress
- * callbacks.
- */
+ * clause here but currently because of the nature of our
+ * Ogg writing implementation, 'samples' is always 0 (see
+ * ogg_encoder_aspect.c). The downside is extra progress
+ * callbacks.
+ */
encoder->private_->is_ogg? true :
#endif
samples > 0
);
if(call_it) {
/* NOTE: We have to add +bytes, +samples, and +1 to the stats
- * because at this point in the callback chain, the stats
- * have not been updated. Only after we return and control
- * gets back to write_frame_() are the stats updated
- */
+ * because at this point in the callback chain, the stats
+ * have not been updated. Only after we return and control
+ * gets back to write_frame_() are the stats updated
+ */
encoder->private_->progress_callback(encoder, encoder->private_->bytes_written+bytes, encoder->private_->samples_written+samples, encoder->private_->frames_written+(samples?1:0), encoder->private_->total_frames_estimate, encoder->private_->client_data);
}
return FLAC__STREAM_ENCODER_WRITE_STATUS_OK;
@@ -4337,10 +4337,10 @@ FLAC__StreamEncoderWriteStatus file_write_callback_(const FLAC__StreamEncoder *e
FILE *get_binary_stdout_(void)
{
#if 0
- /* if something breaks here it is probably due to the presence or
- * absence of an underscore before the identifiers 'setmode',
- * 'fileno', and/or 'O_BINARY'; check your system header files.
- */
+ /* if something breaks here it is probably due to the presence or
+ * absence of an underscore before the identifiers 'setmode',
+ * 'fileno', and/or 'O_BINARY'; check your system header files.
+ */
#if defined _MSC_VER || defined __MINGW32__
_setmode(_fileno(stdout), _O_BINARY);
#elif defined __CYGWIN__
diff --git a/src/lib/libflac/libflac/stream_encoder_framing.c b/src/lib/libflac/libflac/stream_encoder_framing.c
index eefb7cb6f3c..664b963bb62 100644
--- a/src/lib/libflac/libflac/stream_encoder_framing.c
+++ b/src/lib/libflac/libflac/stream_encoder_framing.c
@@ -59,8 +59,8 @@ FLAC__bool FLAC__add_metadata_block(const FLAC__StreamMetadata *metadata, FLAC__
return false;
/*
- * First, for VORBIS_COMMENTs, adjust the length to reflect our vendor string
- */
+ * First, for VORBIS_COMMENTs, adjust the length to reflect our vendor string
+ */
i = metadata->length;
if(metadata->type == FLAC__METADATA_TYPE_VORBIS_COMMENT) {
FLAC__ASSERT(metadata->data.vorbis_comment.vendor_string.length == 0 || 0 != metadata->data.vorbis_comment.vendor_string.entry);
diff --git a/src/lib/libjpeg/jaricom.c b/src/lib/libjpeg/jaricom.c
index f43e2ea7fac..0842b77ebc7 100644
--- a/src/lib/libjpeg/jaricom.c
+++ b/src/lib/libjpeg/jaricom.c
@@ -32,122 +32,122 @@ const INT32 jpeg_aritab[113+1] = {
/*
* Index, Qe_Value, Next_Index_LPS, Next_Index_MPS, Switch_MPS
*/
- V( 0, 0x5a1d, 1, 1, 1 ),
- V( 1, 0x2586, 14, 2, 0 ),
- V( 2, 0x1114, 16, 3, 0 ),
- V( 3, 0x080b, 18, 4, 0 ),
- V( 4, 0x03d8, 20, 5, 0 ),
- V( 5, 0x01da, 23, 6, 0 ),
- V( 6, 0x00e5, 25, 7, 0 ),
- V( 7, 0x006f, 28, 8, 0 ),
- V( 8, 0x0036, 30, 9, 0 ),
- V( 9, 0x001a, 33, 10, 0 ),
- V( 10, 0x000d, 35, 11, 0 ),
- V( 11, 0x0006, 9, 12, 0 ),
- V( 12, 0x0003, 10, 13, 0 ),
- V( 13, 0x0001, 12, 13, 0 ),
- V( 14, 0x5a7f, 15, 15, 1 ),
- V( 15, 0x3f25, 36, 16, 0 ),
- V( 16, 0x2cf2, 38, 17, 0 ),
- V( 17, 0x207c, 39, 18, 0 ),
- V( 18, 0x17b9, 40, 19, 0 ),
- V( 19, 0x1182, 42, 20, 0 ),
- V( 20, 0x0cef, 43, 21, 0 ),
- V( 21, 0x09a1, 45, 22, 0 ),
- V( 22, 0x072f, 46, 23, 0 ),
- V( 23, 0x055c, 48, 24, 0 ),
- V( 24, 0x0406, 49, 25, 0 ),
- V( 25, 0x0303, 51, 26, 0 ),
- V( 26, 0x0240, 52, 27, 0 ),
- V( 27, 0x01b1, 54, 28, 0 ),
- V( 28, 0x0144, 56, 29, 0 ),
- V( 29, 0x00f5, 57, 30, 0 ),
- V( 30, 0x00b7, 59, 31, 0 ),
- V( 31, 0x008a, 60, 32, 0 ),
- V( 32, 0x0068, 62, 33, 0 ),
- V( 33, 0x004e, 63, 34, 0 ),
- V( 34, 0x003b, 32, 35, 0 ),
- V( 35, 0x002c, 33, 9, 0 ),
- V( 36, 0x5ae1, 37, 37, 1 ),
- V( 37, 0x484c, 64, 38, 0 ),
- V( 38, 0x3a0d, 65, 39, 0 ),
- V( 39, 0x2ef1, 67, 40, 0 ),
- V( 40, 0x261f, 68, 41, 0 ),
- V( 41, 0x1f33, 69, 42, 0 ),
- V( 42, 0x19a8, 70, 43, 0 ),
- V( 43, 0x1518, 72, 44, 0 ),
- V( 44, 0x1177, 73, 45, 0 ),
- V( 45, 0x0e74, 74, 46, 0 ),
- V( 46, 0x0bfb, 75, 47, 0 ),
- V( 47, 0x09f8, 77, 48, 0 ),
- V( 48, 0x0861, 78, 49, 0 ),
- V( 49, 0x0706, 79, 50, 0 ),
- V( 50, 0x05cd, 48, 51, 0 ),
- V( 51, 0x04de, 50, 52, 0 ),
- V( 52, 0x040f, 50, 53, 0 ),
- V( 53, 0x0363, 51, 54, 0 ),
- V( 54, 0x02d4, 52, 55, 0 ),
- V( 55, 0x025c, 53, 56, 0 ),
- V( 56, 0x01f8, 54, 57, 0 ),
- V( 57, 0x01a4, 55, 58, 0 ),
- V( 58, 0x0160, 56, 59, 0 ),
- V( 59, 0x0125, 57, 60, 0 ),
- V( 60, 0x00f6, 58, 61, 0 ),
- V( 61, 0x00cb, 59, 62, 0 ),
- V( 62, 0x00ab, 61, 63, 0 ),
- V( 63, 0x008f, 61, 32, 0 ),
- V( 64, 0x5b12, 65, 65, 1 ),
- V( 65, 0x4d04, 80, 66, 0 ),
- V( 66, 0x412c, 81, 67, 0 ),
- V( 67, 0x37d8, 82, 68, 0 ),
- V( 68, 0x2fe8, 83, 69, 0 ),
- V( 69, 0x293c, 84, 70, 0 ),
- V( 70, 0x2379, 86, 71, 0 ),
- V( 71, 0x1edf, 87, 72, 0 ),
- V( 72, 0x1aa9, 87, 73, 0 ),
- V( 73, 0x174e, 72, 74, 0 ),
- V( 74, 0x1424, 72, 75, 0 ),
- V( 75, 0x119c, 74, 76, 0 ),
- V( 76, 0x0f6b, 74, 77, 0 ),
- V( 77, 0x0d51, 75, 78, 0 ),
- V( 78, 0x0bb6, 77, 79, 0 ),
- V( 79, 0x0a40, 77, 48, 0 ),
- V( 80, 0x5832, 80, 81, 1 ),
- V( 81, 0x4d1c, 88, 82, 0 ),
- V( 82, 0x438e, 89, 83, 0 ),
- V( 83, 0x3bdd, 90, 84, 0 ),
- V( 84, 0x34ee, 91, 85, 0 ),
- V( 85, 0x2eae, 92, 86, 0 ),
- V( 86, 0x299a, 93, 87, 0 ),
- V( 87, 0x2516, 86, 71, 0 ),
- V( 88, 0x5570, 88, 89, 1 ),
- V( 89, 0x4ca9, 95, 90, 0 ),
- V( 90, 0x44d9, 96, 91, 0 ),
- V( 91, 0x3e22, 97, 92, 0 ),
- V( 92, 0x3824, 99, 93, 0 ),
- V( 93, 0x32b4, 99, 94, 0 ),
- V( 94, 0x2e17, 93, 86, 0 ),
- V( 95, 0x56a8, 95, 96, 1 ),
- V( 96, 0x4f46, 101, 97, 0 ),
- V( 97, 0x47e5, 102, 98, 0 ),
- V( 98, 0x41cf, 103, 99, 0 ),
- V( 99, 0x3c3d, 104, 100, 0 ),
- V( 100, 0x375e, 99, 93, 0 ),
- V( 101, 0x5231, 105, 102, 0 ),
- V( 102, 0x4c0f, 106, 103, 0 ),
- V( 103, 0x4639, 107, 104, 0 ),
- V( 104, 0x415e, 103, 99, 0 ),
- V( 105, 0x5627, 105, 106, 1 ),
- V( 106, 0x50e7, 108, 107, 0 ),
- V( 107, 0x4b85, 109, 103, 0 ),
- V( 108, 0x5597, 110, 109, 0 ),
- V( 109, 0x504f, 111, 107, 0 ),
- V( 110, 0x5a10, 110, 111, 1 ),
- V( 111, 0x5522, 112, 109, 0 ),
- V( 112, 0x59eb, 112, 111, 1 ),
+ V( 0, 0x5a1d, 1, 1, 1 ),
+ V( 1, 0x2586, 14, 2, 0 ),
+ V( 2, 0x1114, 16, 3, 0 ),
+ V( 3, 0x080b, 18, 4, 0 ),
+ V( 4, 0x03d8, 20, 5, 0 ),
+ V( 5, 0x01da, 23, 6, 0 ),
+ V( 6, 0x00e5, 25, 7, 0 ),
+ V( 7, 0x006f, 28, 8, 0 ),
+ V( 8, 0x0036, 30, 9, 0 ),
+ V( 9, 0x001a, 33, 10, 0 ),
+ V( 10, 0x000d, 35, 11, 0 ),
+ V( 11, 0x0006, 9, 12, 0 ),
+ V( 12, 0x0003, 10, 13, 0 ),
+ V( 13, 0x0001, 12, 13, 0 ),
+ V( 14, 0x5a7f, 15, 15, 1 ),
+ V( 15, 0x3f25, 36, 16, 0 ),
+ V( 16, 0x2cf2, 38, 17, 0 ),
+ V( 17, 0x207c, 39, 18, 0 ),
+ V( 18, 0x17b9, 40, 19, 0 ),
+ V( 19, 0x1182, 42, 20, 0 ),
+ V( 20, 0x0cef, 43, 21, 0 ),
+ V( 21, 0x09a1, 45, 22, 0 ),
+ V( 22, 0x072f, 46, 23, 0 ),
+ V( 23, 0x055c, 48, 24, 0 ),
+ V( 24, 0x0406, 49, 25, 0 ),
+ V( 25, 0x0303, 51, 26, 0 ),
+ V( 26, 0x0240, 52, 27, 0 ),
+ V( 27, 0x01b1, 54, 28, 0 ),
+ V( 28, 0x0144, 56, 29, 0 ),
+ V( 29, 0x00f5, 57, 30, 0 ),
+ V( 30, 0x00b7, 59, 31, 0 ),
+ V( 31, 0x008a, 60, 32, 0 ),
+ V( 32, 0x0068, 62, 33, 0 ),
+ V( 33, 0x004e, 63, 34, 0 ),
+ V( 34, 0x003b, 32, 35, 0 ),
+ V( 35, 0x002c, 33, 9, 0 ),
+ V( 36, 0x5ae1, 37, 37, 1 ),
+ V( 37, 0x484c, 64, 38, 0 ),
+ V( 38, 0x3a0d, 65, 39, 0 ),
+ V( 39, 0x2ef1, 67, 40, 0 ),
+ V( 40, 0x261f, 68, 41, 0 ),
+ V( 41, 0x1f33, 69, 42, 0 ),
+ V( 42, 0x19a8, 70, 43, 0 ),
+ V( 43, 0x1518, 72, 44, 0 ),
+ V( 44, 0x1177, 73, 45, 0 ),
+ V( 45, 0x0e74, 74, 46, 0 ),
+ V( 46, 0x0bfb, 75, 47, 0 ),
+ V( 47, 0x09f8, 77, 48, 0 ),
+ V( 48, 0x0861, 78, 49, 0 ),
+ V( 49, 0x0706, 79, 50, 0 ),
+ V( 50, 0x05cd, 48, 51, 0 ),
+ V( 51, 0x04de, 50, 52, 0 ),
+ V( 52, 0x040f, 50, 53, 0 ),
+ V( 53, 0x0363, 51, 54, 0 ),
+ V( 54, 0x02d4, 52, 55, 0 ),
+ V( 55, 0x025c, 53, 56, 0 ),
+ V( 56, 0x01f8, 54, 57, 0 ),
+ V( 57, 0x01a4, 55, 58, 0 ),
+ V( 58, 0x0160, 56, 59, 0 ),
+ V( 59, 0x0125, 57, 60, 0 ),
+ V( 60, 0x00f6, 58, 61, 0 ),
+ V( 61, 0x00cb, 59, 62, 0 ),
+ V( 62, 0x00ab, 61, 63, 0 ),
+ V( 63, 0x008f, 61, 32, 0 ),
+ V( 64, 0x5b12, 65, 65, 1 ),
+ V( 65, 0x4d04, 80, 66, 0 ),
+ V( 66, 0x412c, 81, 67, 0 ),
+ V( 67, 0x37d8, 82, 68, 0 ),
+ V( 68, 0x2fe8, 83, 69, 0 ),
+ V( 69, 0x293c, 84, 70, 0 ),
+ V( 70, 0x2379, 86, 71, 0 ),
+ V( 71, 0x1edf, 87, 72, 0 ),
+ V( 72, 0x1aa9, 87, 73, 0 ),
+ V( 73, 0x174e, 72, 74, 0 ),
+ V( 74, 0x1424, 72, 75, 0 ),
+ V( 75, 0x119c, 74, 76, 0 ),
+ V( 76, 0x0f6b, 74, 77, 0 ),
+ V( 77, 0x0d51, 75, 78, 0 ),
+ V( 78, 0x0bb6, 77, 79, 0 ),
+ V( 79, 0x0a40, 77, 48, 0 ),
+ V( 80, 0x5832, 80, 81, 1 ),
+ V( 81, 0x4d1c, 88, 82, 0 ),
+ V( 82, 0x438e, 89, 83, 0 ),
+ V( 83, 0x3bdd, 90, 84, 0 ),
+ V( 84, 0x34ee, 91, 85, 0 ),
+ V( 85, 0x2eae, 92, 86, 0 ),
+ V( 86, 0x299a, 93, 87, 0 ),
+ V( 87, 0x2516, 86, 71, 0 ),
+ V( 88, 0x5570, 88, 89, 1 ),
+ V( 89, 0x4ca9, 95, 90, 0 ),
+ V( 90, 0x44d9, 96, 91, 0 ),
+ V( 91, 0x3e22, 97, 92, 0 ),
+ V( 92, 0x3824, 99, 93, 0 ),
+ V( 93, 0x32b4, 99, 94, 0 ),
+ V( 94, 0x2e17, 93, 86, 0 ),
+ V( 95, 0x56a8, 95, 96, 1 ),
+ V( 96, 0x4f46, 101, 97, 0 ),
+ V( 97, 0x47e5, 102, 98, 0 ),
+ V( 98, 0x41cf, 103, 99, 0 ),
+ V( 99, 0x3c3d, 104, 100, 0 ),
+ V( 100, 0x375e, 99, 93, 0 ),
+ V( 101, 0x5231, 105, 102, 0 ),
+ V( 102, 0x4c0f, 106, 103, 0 ),
+ V( 103, 0x4639, 107, 104, 0 ),
+ V( 104, 0x415e, 103, 99, 0 ),
+ V( 105, 0x5627, 105, 106, 1 ),
+ V( 106, 0x50e7, 108, 107, 0 ),
+ V( 107, 0x4b85, 109, 103, 0 ),
+ V( 108, 0x5597, 110, 109, 0 ),
+ V( 109, 0x504f, 111, 107, 0 ),
+ V( 110, 0x5a10, 110, 111, 1 ),
+ V( 111, 0x5522, 112, 109, 0 ),
+ V( 112, 0x59eb, 112, 111, 1 ),
/*
* This last entry is used for fixed probability estimate of 0.5
* as recommended in Section 10.3 Table 5 of ITU-T Rec. T.851.
*/
- V( 113, 0x5a1d, 113, 113, 0 )
+ V( 113, 0x5a1d, 113, 113, 0 )
};
diff --git a/src/lib/libjpeg/jcapimin.c b/src/lib/libjpeg/jcapimin.c
index 8ae33d837ba..18957f9eea7 100644
--- a/src/lib/libjpeg/jcapimin.c
+++ b/src/lib/libjpeg/jcapimin.c
@@ -30,61 +30,61 @@
GLOBAL(void)
jpeg_CreateCompress (j_compress_ptr cinfo, int version, size_t structsize)
{
- int i;
-
- /* Guard against version mismatches between library and caller. */
- cinfo->mem = NULL; /* so jpeg_destroy knows mem mgr not called */
- if (version != JPEG_LIB_VERSION)
- ERREXIT2(cinfo, JERR_BAD_LIB_VERSION, JPEG_LIB_VERSION, version);
- if (structsize != SIZEOF(struct jpeg_compress_struct))
- ERREXIT2(cinfo, JERR_BAD_STRUCT_SIZE,
- (int) SIZEOF(struct jpeg_compress_struct), (int) structsize);
-
- /* For debugging purposes, we zero the whole master structure.
- * But the application has already set the err pointer, and may have set
- * client_data, so we have to save and restore those fields.
- * Note: if application hasn't set client_data, tools like Purify may
- * complain here.
- */
- {
- struct jpeg_error_mgr * err = cinfo->err;
- void * client_data = cinfo->client_data; /* ignore Purify complaint here */
- MEMZERO(cinfo, SIZEOF(struct jpeg_compress_struct));
- cinfo->err = err;
- cinfo->client_data = client_data;
- }
- cinfo->is_decompressor = FALSE;
-
- /* Initialize a memory manager instance for this object */
- jinit_memory_mgr((j_common_ptr) cinfo);
-
- /* Zero out pointers to permanent structures. */
- cinfo->progress = NULL;
- cinfo->dest = NULL;
-
- cinfo->comp_info = NULL;
-
- for (i = 0; i < NUM_QUANT_TBLS; i++) {
- cinfo->quant_tbl_ptrs[i] = NULL;
- cinfo->q_scale_factor[i] = 100;
- }
-
- for (i = 0; i < NUM_HUFF_TBLS; i++) {
- cinfo->dc_huff_tbl_ptrs[i] = NULL;
- cinfo->ac_huff_tbl_ptrs[i] = NULL;
- }
-
- /* Must do it here for emit_dqt in case jpeg_write_tables is used */
- cinfo->block_size = DCTSIZE;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
-
- cinfo->script_space = NULL;
-
- cinfo->input_gamma = 1.0; /* in case application forgets */
-
- /* OK, I'm ready */
- cinfo->global_state = CSTATE_START;
+ int i;
+
+ /* Guard against version mismatches between library and caller. */
+ cinfo->mem = NULL; /* so jpeg_destroy knows mem mgr not called */
+ if (version != JPEG_LIB_VERSION)
+ ERREXIT2(cinfo, JERR_BAD_LIB_VERSION, JPEG_LIB_VERSION, version);
+ if (structsize != SIZEOF(struct jpeg_compress_struct))
+ ERREXIT2(cinfo, JERR_BAD_STRUCT_SIZE,
+ (int) SIZEOF(struct jpeg_compress_struct), (int) structsize);
+
+ /* For debugging purposes, we zero the whole master structure.
+ * But the application has already set the err pointer, and may have set
+ * client_data, so we have to save and restore those fields.
+ * Note: if application hasn't set client_data, tools like Purify may
+ * complain here.
+ */
+ {
+ struct jpeg_error_mgr * err = cinfo->err;
+ void * client_data = cinfo->client_data; /* ignore Purify complaint here */
+ MEMZERO(cinfo, SIZEOF(struct jpeg_compress_struct));
+ cinfo->err = err;
+ cinfo->client_data = client_data;
+ }
+ cinfo->is_decompressor = FALSE;
+
+ /* Initialize a memory manager instance for this object */
+ jinit_memory_mgr((j_common_ptr) cinfo);
+
+ /* Zero out pointers to permanent structures. */
+ cinfo->progress = NULL;
+ cinfo->dest = NULL;
+
+ cinfo->comp_info = NULL;
+
+ for (i = 0; i < NUM_QUANT_TBLS; i++) {
+ cinfo->quant_tbl_ptrs[i] = NULL;
+ cinfo->q_scale_factor[i] = 100;
+ }
+
+ for (i = 0; i < NUM_HUFF_TBLS; i++) {
+ cinfo->dc_huff_tbl_ptrs[i] = NULL;
+ cinfo->ac_huff_tbl_ptrs[i] = NULL;
+ }
+
+ /* Must do it here for emit_dqt in case jpeg_write_tables is used */
+ cinfo->block_size = DCTSIZE;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+
+ cinfo->script_space = NULL;
+
+ cinfo->input_gamma = 1.0; /* in case application forgets */
+
+ /* OK, I'm ready */
+ cinfo->global_state = CSTATE_START;
}
@@ -95,7 +95,7 @@ jpeg_CreateCompress (j_compress_ptr cinfo, int version, size_t structsize)
GLOBAL(void)
jpeg_destroy_compress (j_compress_ptr cinfo)
{
- jpeg_destroy((j_common_ptr) cinfo); /* use common routine */
+ jpeg_destroy((j_common_ptr) cinfo); /* use common routine */
}
@@ -107,7 +107,7 @@ jpeg_destroy_compress (j_compress_ptr cinfo)
GLOBAL(void)
jpeg_abort_compress (j_compress_ptr cinfo)
{
- jpeg_abort((j_common_ptr) cinfo); /* use common routine */
+ jpeg_abort((j_common_ptr) cinfo); /* use common routine */
}
@@ -126,21 +126,21 @@ jpeg_abort_compress (j_compress_ptr cinfo)
GLOBAL(void)
jpeg_suppress_tables (j_compress_ptr cinfo, boolean suppress)
{
- int i;
- JQUANT_TBL * qtbl;
- JHUFF_TBL * htbl;
-
- for (i = 0; i < NUM_QUANT_TBLS; i++) {
- if ((qtbl = cinfo->quant_tbl_ptrs[i]) != NULL)
- qtbl->sent_table = suppress;
- }
-
- for (i = 0; i < NUM_HUFF_TBLS; i++) {
- if ((htbl = cinfo->dc_huff_tbl_ptrs[i]) != NULL)
- htbl->sent_table = suppress;
- if ((htbl = cinfo->ac_huff_tbl_ptrs[i]) != NULL)
- htbl->sent_table = suppress;
- }
+ int i;
+ JQUANT_TBL * qtbl;
+ JHUFF_TBL * htbl;
+
+ for (i = 0; i < NUM_QUANT_TBLS; i++) {
+ if ((qtbl = cinfo->quant_tbl_ptrs[i]) != NULL)
+ qtbl->sent_table = suppress;
+ }
+
+ for (i = 0; i < NUM_HUFF_TBLS; i++) {
+ if ((htbl = cinfo->dc_huff_tbl_ptrs[i]) != NULL)
+ htbl->sent_table = suppress;
+ if ((htbl = cinfo->ac_huff_tbl_ptrs[i]) != NULL)
+ htbl->sent_table = suppress;
+ }
}
@@ -154,38 +154,38 @@ jpeg_suppress_tables (j_compress_ptr cinfo, boolean suppress)
GLOBAL(void)
jpeg_finish_compress (j_compress_ptr cinfo)
{
- JDIMENSION iMCU_row;
-
- if (cinfo->global_state == CSTATE_SCANNING ||
- cinfo->global_state == CSTATE_RAW_OK) {
- /* Terminate first pass */
- if (cinfo->next_scanline < cinfo->image_height)
- ERREXIT(cinfo, JERR_TOO_LITTLE_DATA);
- (*cinfo->master->finish_pass) (cinfo);
- } else if (cinfo->global_state != CSTATE_WRCOEFS)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- /* Perform any remaining passes */
- while (! cinfo->master->is_last_pass) {
- (*cinfo->master->prepare_for_pass) (cinfo);
- for (iMCU_row = 0; iMCU_row < cinfo->total_iMCU_rows; iMCU_row++) {
- if (cinfo->progress != NULL) {
+ JDIMENSION iMCU_row;
+
+ if (cinfo->global_state == CSTATE_SCANNING ||
+ cinfo->global_state == CSTATE_RAW_OK) {
+ /* Terminate first pass */
+ if (cinfo->next_scanline < cinfo->image_height)
+ ERREXIT(cinfo, JERR_TOO_LITTLE_DATA);
+ (*cinfo->master->finish_pass) (cinfo);
+ } else if (cinfo->global_state != CSTATE_WRCOEFS)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ /* Perform any remaining passes */
+ while (! cinfo->master->is_last_pass) {
+ (*cinfo->master->prepare_for_pass) (cinfo);
+ for (iMCU_row = 0; iMCU_row < cinfo->total_iMCU_rows; iMCU_row++) {
+ if (cinfo->progress != NULL) {
cinfo->progress->pass_counter = (long) iMCU_row;
cinfo->progress->pass_limit = (long) cinfo->total_iMCU_rows;
(*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
- }
- /* We bypass the main controller and invoke coef controller directly;
- * all work is being done from the coefficient buffer.
- */
- if (! (*cinfo->coef->compress_data) (cinfo, (JSAMPIMAGE) NULL))
+ }
+ /* We bypass the main controller and invoke coef controller directly;
+ * all work is being done from the coefficient buffer.
+ */
+ if (! (*cinfo->coef->compress_data) (cinfo, (JSAMPIMAGE) NULL))
ERREXIT(cinfo, JERR_CANT_SUSPEND);
- }
- (*cinfo->master->finish_pass) (cinfo);
- }
- /* Write EOI, do final cleanup */
- (*cinfo->marker->write_file_trailer) (cinfo);
- (*cinfo->dest->term_destination) (cinfo);
- /* We can use jpeg_abort to release memory and reset global_state */
- jpeg_abort((j_common_ptr) cinfo);
+ }
+ (*cinfo->master->finish_pass) (cinfo);
+ }
+ /* Write EOI, do final cleanup */
+ (*cinfo->marker->write_file_trailer) (cinfo);
+ (*cinfo->dest->term_destination) (cinfo);
+ /* We can use jpeg_abort to release memory and reset global_state */
+ jpeg_abort((j_common_ptr) cinfo);
}
@@ -198,22 +198,22 @@ jpeg_finish_compress (j_compress_ptr cinfo)
GLOBAL(void)
jpeg_write_marker (j_compress_ptr cinfo, int marker,
- const JOCTET *dataptr, unsigned int datalen)
+ const JOCTET *dataptr, unsigned int datalen)
{
- JMETHOD(void, write_marker_byte, (j_compress_ptr info, int val));
-
- if (cinfo->next_scanline != 0 ||
- (cinfo->global_state != CSTATE_SCANNING &&
- cinfo->global_state != CSTATE_RAW_OK &&
- cinfo->global_state != CSTATE_WRCOEFS))
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- (*cinfo->marker->write_marker_header) (cinfo, marker, datalen);
- write_marker_byte = cinfo->marker->write_marker_byte; /* copy for speed */
- while (datalen--) {
- (*write_marker_byte) (cinfo, *dataptr);
- dataptr++;
- }
+ JMETHOD(void, write_marker_byte, (j_compress_ptr info, int val));
+
+ if (cinfo->next_scanline != 0 ||
+ (cinfo->global_state != CSTATE_SCANNING &&
+ cinfo->global_state != CSTATE_RAW_OK &&
+ cinfo->global_state != CSTATE_WRCOEFS))
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ (*cinfo->marker->write_marker_header) (cinfo, marker, datalen);
+ write_marker_byte = cinfo->marker->write_marker_byte; /* copy for speed */
+ while (datalen--) {
+ (*write_marker_byte) (cinfo, *dataptr);
+ dataptr++;
+ }
}
/* Same, but piecemeal. */
@@ -221,19 +221,19 @@ jpeg_write_marker (j_compress_ptr cinfo, int marker,
GLOBAL(void)
jpeg_write_m_header (j_compress_ptr cinfo, int marker, unsigned int datalen)
{
- if (cinfo->next_scanline != 0 ||
- (cinfo->global_state != CSTATE_SCANNING &&
- cinfo->global_state != CSTATE_RAW_OK &&
- cinfo->global_state != CSTATE_WRCOEFS))
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ if (cinfo->next_scanline != 0 ||
+ (cinfo->global_state != CSTATE_SCANNING &&
+ cinfo->global_state != CSTATE_RAW_OK &&
+ cinfo->global_state != CSTATE_WRCOEFS))
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- (*cinfo->marker->write_marker_header) (cinfo, marker, datalen);
+ (*cinfo->marker->write_marker_header) (cinfo, marker, datalen);
}
GLOBAL(void)
jpeg_write_m_byte (j_compress_ptr cinfo, int val)
{
- (*cinfo->marker->write_marker_byte) (cinfo, val);
+ (*cinfo->marker->write_marker_byte) (cinfo, val);
}
@@ -261,28 +261,28 @@ jpeg_write_m_byte (j_compress_ptr cinfo, int val)
GLOBAL(void)
jpeg_write_tables (j_compress_ptr cinfo)
{
- if (cinfo->global_state != CSTATE_START)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- /* (Re)initialize error mgr and destination modules */
- (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
- (*cinfo->dest->init_destination) (cinfo);
- /* Initialize the marker writer ... bit of a crock to do it here. */
- jinit_marker_writer(cinfo);
- /* Write them tables! */
- (*cinfo->marker->write_tables_only) (cinfo);
- /* And clean up. */
- (*cinfo->dest->term_destination) (cinfo);
- /*
- * In library releases up through v6a, we called jpeg_abort() here to free
- * any working memory allocated by the destination manager and marker
- * writer. Some applications had a problem with that: they allocated space
- * of their own from the library memory manager, and didn't want it to go
- * away during write_tables. So now we do nothing. This will cause a
- * memory leak if an app calls write_tables repeatedly without doing a full
- * compression cycle or otherwise resetting the JPEG object. However, that
- * seems less bad than unexpectedly freeing memory in the normal case.
- * An app that prefers the old behavior can call jpeg_abort for itself after
- * each call to jpeg_write_tables().
- */
+ if (cinfo->global_state != CSTATE_START)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ /* (Re)initialize error mgr and destination modules */
+ (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
+ (*cinfo->dest->init_destination) (cinfo);
+ /* Initialize the marker writer ... bit of a crock to do it here. */
+ jinit_marker_writer(cinfo);
+ /* Write them tables! */
+ (*cinfo->marker->write_tables_only) (cinfo);
+ /* And clean up. */
+ (*cinfo->dest->term_destination) (cinfo);
+ /*
+ * In library releases up through v6a, we called jpeg_abort() here to free
+ * any working memory allocated by the destination manager and marker
+ * writer. Some applications had a problem with that: they allocated space
+ * of their own from the library memory manager, and didn't want it to go
+ * away during write_tables. So now we do nothing. This will cause a
+ * memory leak if an app calls write_tables repeatedly without doing a full
+ * compression cycle or otherwise resetting the JPEG object. However, that
+ * seems less bad than unexpectedly freeing memory in the normal case.
+ * An app that prefers the old behavior can call jpeg_abort for itself after
+ * each call to jpeg_write_tables().
+ */
}
diff --git a/src/lib/libjpeg/jcapistd.c b/src/lib/libjpeg/jcapistd.c
index c0320b1b190..4173ade0d74 100644
--- a/src/lib/libjpeg/jcapistd.c
+++ b/src/lib/libjpeg/jcapistd.c
@@ -37,24 +37,24 @@
GLOBAL(void)
jpeg_start_compress (j_compress_ptr cinfo, boolean write_all_tables)
{
- if (cinfo->global_state != CSTATE_START)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- if (write_all_tables)
- jpeg_suppress_tables(cinfo, FALSE); /* mark all tables to be written */
-
- /* (Re)initialize error mgr and destination modules */
- (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
- (*cinfo->dest->init_destination) (cinfo);
- /* Perform master selection of active modules */
- jinit_compress_master(cinfo);
- /* Set up for the first pass */
- (*cinfo->master->prepare_for_pass) (cinfo);
- /* Ready for application to drive first pass through jpeg_write_scanlines
- * or jpeg_write_raw_data.
- */
- cinfo->next_scanline = 0;
- cinfo->global_state = (cinfo->raw_data_in ? CSTATE_RAW_OK : CSTATE_SCANNING);
+ if (cinfo->global_state != CSTATE_START)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ if (write_all_tables)
+ jpeg_suppress_tables(cinfo, FALSE); /* mark all tables to be written */
+
+ /* (Re)initialize error mgr and destination modules */
+ (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
+ (*cinfo->dest->init_destination) (cinfo);
+ /* Perform master selection of active modules */
+ jinit_compress_master(cinfo);
+ /* Set up for the first pass */
+ (*cinfo->master->prepare_for_pass) (cinfo);
+ /* Ready for application to drive first pass through jpeg_write_scanlines
+ * or jpeg_write_raw_data.
+ */
+ cinfo->next_scanline = 0;
+ cinfo->global_state = (cinfo->raw_data_in ? CSTATE_RAW_OK : CSTATE_SCANNING);
}
@@ -75,39 +75,39 @@ jpeg_start_compress (j_compress_ptr cinfo, boolean write_all_tables)
GLOBAL(JDIMENSION)
jpeg_write_scanlines (j_compress_ptr cinfo, JSAMPARRAY scanlines,
- JDIMENSION num_lines)
+ JDIMENSION num_lines)
{
- JDIMENSION row_ctr, rows_left;
-
- if (cinfo->global_state != CSTATE_SCANNING)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- if (cinfo->next_scanline >= cinfo->image_height)
- WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
-
- /* Call progress monitor hook if present */
- if (cinfo->progress != NULL) {
- cinfo->progress->pass_counter = (long) cinfo->next_scanline;
- cinfo->progress->pass_limit = (long) cinfo->image_height;
- (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
- }
-
- /* Give master control module another chance if this is first call to
- * jpeg_write_scanlines. This lets output of the frame/scan headers be
- * delayed so that application can write COM, etc, markers between
- * jpeg_start_compress and jpeg_write_scanlines.
- */
- if (cinfo->master->call_pass_startup)
- (*cinfo->master->pass_startup) (cinfo);
-
- /* Ignore any extra scanlines at bottom of image. */
- rows_left = cinfo->image_height - cinfo->next_scanline;
- if (num_lines > rows_left)
- num_lines = rows_left;
-
- row_ctr = 0;
- (*cinfo->main->process_data) (cinfo, scanlines, &row_ctr, num_lines);
- cinfo->next_scanline += row_ctr;
- return row_ctr;
+ JDIMENSION row_ctr, rows_left;
+
+ if (cinfo->global_state != CSTATE_SCANNING)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ if (cinfo->next_scanline >= cinfo->image_height)
+ WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
+
+ /* Call progress monitor hook if present */
+ if (cinfo->progress != NULL) {
+ cinfo->progress->pass_counter = (long) cinfo->next_scanline;
+ cinfo->progress->pass_limit = (long) cinfo->image_height;
+ (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
+ }
+
+ /* Give master control module another chance if this is first call to
+ * jpeg_write_scanlines. This lets output of the frame/scan headers be
+ * delayed so that application can write COM, etc, markers between
+ * jpeg_start_compress and jpeg_write_scanlines.
+ */
+ if (cinfo->master->call_pass_startup)
+ (*cinfo->master->pass_startup) (cinfo);
+
+ /* Ignore any extra scanlines at bottom of image. */
+ rows_left = cinfo->image_height - cinfo->next_scanline;
+ if (num_lines > rows_left)
+ num_lines = rows_left;
+
+ row_ctr = 0;
+ (*cinfo->main->process_data) (cinfo, scanlines, &row_ctr, num_lines);
+ cinfo->next_scanline += row_ctr;
+ return row_ctr;
}
@@ -118,44 +118,44 @@ jpeg_write_scanlines (j_compress_ptr cinfo, JSAMPARRAY scanlines,
GLOBAL(JDIMENSION)
jpeg_write_raw_data (j_compress_ptr cinfo, JSAMPIMAGE data,
- JDIMENSION num_lines)
+ JDIMENSION num_lines)
{
- JDIMENSION lines_per_iMCU_row;
-
- if (cinfo->global_state != CSTATE_RAW_OK)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- if (cinfo->next_scanline >= cinfo->image_height) {
- WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
- return 0;
- }
-
- /* Call progress monitor hook if present */
- if (cinfo->progress != NULL) {
- cinfo->progress->pass_counter = (long) cinfo->next_scanline;
- cinfo->progress->pass_limit = (long) cinfo->image_height;
- (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
- }
-
- /* Give master control module another chance if this is first call to
- * jpeg_write_raw_data. This lets output of the frame/scan headers be
- * delayed so that application can write COM, etc, markers between
- * jpeg_start_compress and jpeg_write_raw_data.
- */
- if (cinfo->master->call_pass_startup)
- (*cinfo->master->pass_startup) (cinfo);
-
- /* Verify that at least one iMCU row has been passed. */
- lines_per_iMCU_row = cinfo->max_v_samp_factor * DCTSIZE;
- if (num_lines < lines_per_iMCU_row)
- ERREXIT(cinfo, JERR_BUFFER_SIZE);
-
- /* Directly compress the row. */
- if (! (*cinfo->coef->compress_data) (cinfo, data)) {
- /* If compressor did not consume the whole row, suspend processing. */
- return 0;
- }
-
- /* OK, we processed one iMCU row. */
- cinfo->next_scanline += lines_per_iMCU_row;
- return lines_per_iMCU_row;
+ JDIMENSION lines_per_iMCU_row;
+
+ if (cinfo->global_state != CSTATE_RAW_OK)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ if (cinfo->next_scanline >= cinfo->image_height) {
+ WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
+ return 0;
+ }
+
+ /* Call progress monitor hook if present */
+ if (cinfo->progress != NULL) {
+ cinfo->progress->pass_counter = (long) cinfo->next_scanline;
+ cinfo->progress->pass_limit = (long) cinfo->image_height;
+ (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
+ }
+
+ /* Give master control module another chance if this is first call to
+ * jpeg_write_raw_data. This lets output of the frame/scan headers be
+ * delayed so that application can write COM, etc, markers between
+ * jpeg_start_compress and jpeg_write_raw_data.
+ */
+ if (cinfo->master->call_pass_startup)
+ (*cinfo->master->pass_startup) (cinfo);
+
+ /* Verify that at least one iMCU row has been passed. */
+ lines_per_iMCU_row = cinfo->max_v_samp_factor * DCTSIZE;
+ if (num_lines < lines_per_iMCU_row)
+ ERREXIT(cinfo, JERR_BUFFER_SIZE);
+
+ /* Directly compress the row. */
+ if (! (*cinfo->coef->compress_data) (cinfo, data)) {
+ /* If compressor did not consume the whole row, suspend processing. */
+ return 0;
+ }
+
+ /* OK, we processed one iMCU row. */
+ cinfo->next_scanline += lines_per_iMCU_row;
+ return lines_per_iMCU_row;
}
diff --git a/src/lib/libjpeg/jcarith.c b/src/lib/libjpeg/jcarith.c
index e26905af240..aeffcb0f7bb 100644
--- a/src/lib/libjpeg/jcarith.c
+++ b/src/lib/libjpeg/jcarith.c
@@ -21,28 +21,28 @@
/* Expanded entropy encoder object for arithmetic encoding. */
typedef struct {
- struct jpeg_entropy_encoder pub; /* public fields */
+ struct jpeg_entropy_encoder pub; /* public fields */
- INT32 c; /* C register, base of coding interval, layout as in sec. D.1.3 */
- INT32 a; /* A register, normalized size of coding interval */
- INT32 sc; /* counter for stacked 0xFF values which might overflow */
- INT32 zc; /* counter for pending 0x00 output values which might *
+ INT32 c; /* C register, base of coding interval, layout as in sec. D.1.3 */
+ INT32 a; /* A register, normalized size of coding interval */
+ INT32 sc; /* counter for stacked 0xFF values which might overflow */
+ INT32 zc; /* counter for pending 0x00 output values which might *
* be discarded at the end ("Pacman" termination) */
- int ct; /* bit shift counter, determines when next byte will be written */
- int buffer; /* buffer for most recent output byte != 0xFF */
+ int ct; /* bit shift counter, determines when next byte will be written */
+ int buffer; /* buffer for most recent output byte != 0xFF */
- int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
- int dc_context[MAX_COMPS_IN_SCAN]; /* context index for DC conditioning */
+ int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
+ int dc_context[MAX_COMPS_IN_SCAN]; /* context index for DC conditioning */
- unsigned int restarts_to_go; /* MCUs left in this restart interval */
- int next_restart_num; /* next restart number to write (0-7) */
+ unsigned int restarts_to_go; /* MCUs left in this restart interval */
+ int next_restart_num; /* next restart number to write (0-7) */
- /* Pointers to statistics areas (these workspaces have image lifespan) */
- unsigned char * dc_stats[NUM_ARITH_TBLS];
- unsigned char * ac_stats[NUM_ARITH_TBLS];
+ /* Pointers to statistics areas (these workspaces have image lifespan) */
+ unsigned char * dc_stats[NUM_ARITH_TBLS];
+ unsigned char * ac_stats[NUM_ARITH_TBLS];
- /* Statistics bin for coding with fixed probability 0.5 */
- unsigned char fixed_bin[4];
+ /* Statistics bin for coding with fixed probability 0.5 */
+ unsigned char fixed_bin[4];
} arith_entropy_encoder;
typedef arith_entropy_encoder * arith_entropy_ptr;
@@ -101,14 +101,14 @@ typedef arith_entropy_encoder * arith_entropy_ptr;
*/
#ifdef RIGHT_SHIFT_IS_UNSIGNED
-#define ISHIFT_TEMPS int ishift_temp;
+#define ISHIFT_TEMPS int ishift_temp;
#define IRIGHT_SHIFT(x,shft) \
((ishift_temp = (x)) < 0 ? \
- (ishift_temp >> (shft)) | ((~0) << (16-(shft))) : \
- (ishift_temp >> (shft)))
+ (ishift_temp >> (shft)) | ((~0) << (16-(shft))) : \
+ (ishift_temp >> (shft)))
#else
#define ISHIFT_TEMPS
-#define IRIGHT_SHIFT(x,shft) ((x) >> (shft))
+#define IRIGHT_SHIFT(x,shft) ((x) >> (shft))
#endif
@@ -116,12 +116,12 @@ LOCAL(void)
emit_byte (int val, j_compress_ptr cinfo)
/* Write next output byte; we do not support suspension in this module. */
{
- struct jpeg_destination_mgr * dest = cinfo->dest;
+ struct jpeg_destination_mgr * dest = cinfo->dest;
- *dest->next_output_byte++ = (JOCTET) val;
- if (--dest->free_in_buffer == 0)
- if (! (*dest->empty_output_buffer) (cinfo))
- ERREXIT(cinfo, JERR_CANT_SUSPEND);
+ *dest->next_output_byte++ = (JOCTET) val;
+ if (--dest->free_in_buffer == 0)
+ if (! (*dest->empty_output_buffer) (cinfo))
+ ERREXIT(cinfo, JERR_CANT_SUSPEND);
}
@@ -132,64 +132,64 @@ emit_byte (int val, j_compress_ptr cinfo)
METHODDEF(void)
finish_pass (j_compress_ptr cinfo)
{
- arith_entropy_ptr e = (arith_entropy_ptr) cinfo->entropy;
- INT32 temp;
-
- /* Section D.1.8: Termination of encoding */
-
- /* Find the e->c in the coding interval with the largest
- * number of trailing zero bits */
- if ((temp = (e->a - 1 + e->c) & 0xFFFF0000L) < e->c)
- e->c = temp + 0x8000L;
- else
- e->c = temp;
- /* Send remaining bytes to output */
- e->c <<= e->ct;
- if (e->c & 0xF8000000L) {
- /* One final overflow has to be handled */
- if (e->buffer >= 0) {
- if (e->zc)
+ arith_entropy_ptr e = (arith_entropy_ptr) cinfo->entropy;
+ INT32 temp;
+
+ /* Section D.1.8: Termination of encoding */
+
+ /* Find the e->c in the coding interval with the largest
+ * number of trailing zero bits */
+ if ((temp = (e->a - 1 + e->c) & 0xFFFF0000L) < e->c)
+ e->c = temp + 0x8000L;
+ else
+ e->c = temp;
+ /* Send remaining bytes to output */
+ e->c <<= e->ct;
+ if (e->c & 0xF8000000L) {
+ /* One final overflow has to be handled */
+ if (e->buffer >= 0) {
+ if (e->zc)
do emit_byte(0x00, cinfo);
while (--e->zc);
- emit_byte(e->buffer + 1, cinfo);
- if (e->buffer + 1 == 0xFF)
+ emit_byte(e->buffer + 1, cinfo);
+ if (e->buffer + 1 == 0xFF)
emit_byte(0x00, cinfo);
- }
- e->zc += e->sc; /* carry-over converts stacked 0xFF bytes to 0x00 */
- e->sc = 0;
- } else {
- if (e->buffer == 0)
- ++e->zc;
- else if (e->buffer >= 0) {
- if (e->zc)
+ }
+ e->zc += e->sc; /* carry-over converts stacked 0xFF bytes to 0x00 */
+ e->sc = 0;
+ } else {
+ if (e->buffer == 0)
+ ++e->zc;
+ else if (e->buffer >= 0) {
+ if (e->zc)
do emit_byte(0x00, cinfo);
while (--e->zc);
- emit_byte(e->buffer, cinfo);
- }
- if (e->sc) {
- if (e->zc)
+ emit_byte(e->buffer, cinfo);
+ }
+ if (e->sc) {
+ if (e->zc)
do emit_byte(0x00, cinfo);
while (--e->zc);
- do {
+ do {
emit_byte(0xFF, cinfo);
emit_byte(0x00, cinfo);
- } while (--e->sc);
- }
- }
- /* Output final bytes only if they are not 0x00 */
- if (e->c & 0x7FFF800L) {
- if (e->zc) /* output final pending zero bytes */
- do emit_byte(0x00, cinfo);
- while (--e->zc);
- emit_byte((e->c >> 19) & 0xFF, cinfo);
- if (((e->c >> 19) & 0xFF) == 0xFF)
- emit_byte(0x00, cinfo);
- if (e->c & 0x7F800L) {
- emit_byte((e->c >> 11) & 0xFF, cinfo);
- if (((e->c >> 11) & 0xFF) == 0xFF)
+ } while (--e->sc);
+ }
+ }
+ /* Output final bytes only if they are not 0x00 */
+ if (e->c & 0x7FFF800L) {
+ if (e->zc) /* output final pending zero bytes */
+ do emit_byte(0x00, cinfo);
+ while (--e->zc);
+ emit_byte((e->c >> 19) & 0xFF, cinfo);
+ if (((e->c >> 19) & 0xFF) == 0xFF)
+ emit_byte(0x00, cinfo);
+ if (e->c & 0x7F800L) {
+ emit_byte((e->c >> 11) & 0xFF, cinfo);
+ if (((e->c >> 11) & 0xFF) == 0xFF)
emit_byte(0x00, cinfo);
- }
- }
+ }
+ }
}
@@ -218,96 +218,96 @@ finish_pass (j_compress_ptr cinfo)
LOCAL(void)
arith_encode (j_compress_ptr cinfo, unsigned char *st, int val)
{
- register arith_entropy_ptr e = (arith_entropy_ptr) cinfo->entropy;
- register unsigned char nl, nm;
- register INT32 qe, temp;
- register int sv;
-
- /* Fetch values from our compact representation of Table D.2:
- * Qe values and probability estimation state machine
- */
- sv = *st;
- qe = jpeg_aritab[sv & 0x7F]; /* => Qe_Value */
- nl = qe & 0xFF; qe >>= 8; /* Next_Index_LPS + Switch_MPS */
- nm = qe & 0xFF; qe >>= 8; /* Next_Index_MPS */
-
- /* Encode & estimation procedures per sections D.1.4 & D.1.5 */
- e->a -= qe;
- if (val != (sv >> 7)) {
- /* Encode the less probable symbol */
- if (e->a >= qe) {
- /* If the interval size (qe) for the less probable symbol (LPS)
- * is larger than the interval size for the MPS, then exchange
- * the two symbols for coding efficiency, otherwise code the LPS
- * as usual: */
- e->c += e->a;
- e->a = qe;
- }
- *st = (sv & 0x80) ^ nl; /* Estimate_after_LPS */
- } else {
- /* Encode the more probable symbol */
- if (e->a >= 0x8000L)
- return; /* A >= 0x8000 -> ready, no renormalization required */
- if (e->a < qe) {
- /* If the interval size (qe) for the less probable symbol (LPS)
- * is larger than the interval size for the MPS, then exchange
- * the two symbols for coding efficiency: */
- e->c += e->a;
- e->a = qe;
- }
- *st = (sv & 0x80) ^ nm; /* Estimate_after_MPS */
- }
-
- /* Renormalization & data output per section D.1.6 */
- do {
- e->a <<= 1;
- e->c <<= 1;
- if (--e->ct == 0) {
- /* Another byte is ready for output */
- temp = e->c >> 19;
- if (temp > 0xFF) {
+ register arith_entropy_ptr e = (arith_entropy_ptr) cinfo->entropy;
+ register unsigned char nl, nm;
+ register INT32 qe, temp;
+ register int sv;
+
+ /* Fetch values from our compact representation of Table D.2:
+ * Qe values and probability estimation state machine
+ */
+ sv = *st;
+ qe = jpeg_aritab[sv & 0x7F]; /* => Qe_Value */
+ nl = qe & 0xFF; qe >>= 8; /* Next_Index_LPS + Switch_MPS */
+ nm = qe & 0xFF; qe >>= 8; /* Next_Index_MPS */
+
+ /* Encode & estimation procedures per sections D.1.4 & D.1.5 */
+ e->a -= qe;
+ if (val != (sv >> 7)) {
+ /* Encode the less probable symbol */
+ if (e->a >= qe) {
+ /* If the interval size (qe) for the less probable symbol (LPS)
+ * is larger than the interval size for the MPS, then exchange
+ * the two symbols for coding efficiency, otherwise code the LPS
+ * as usual: */
+ e->c += e->a;
+ e->a = qe;
+ }
+ *st = (sv & 0x80) ^ nl; /* Estimate_after_LPS */
+ } else {
+ /* Encode the more probable symbol */
+ if (e->a >= 0x8000L)
+ return; /* A >= 0x8000 -> ready, no renormalization required */
+ if (e->a < qe) {
+ /* If the interval size (qe) for the less probable symbol (LPS)
+ * is larger than the interval size for the MPS, then exchange
+ * the two symbols for coding efficiency: */
+ e->c += e->a;
+ e->a = qe;
+ }
+ *st = (sv & 0x80) ^ nm; /* Estimate_after_MPS */
+ }
+
+ /* Renormalization & data output per section D.1.6 */
+ do {
+ e->a <<= 1;
+ e->c <<= 1;
+ if (--e->ct == 0) {
+ /* Another byte is ready for output */
+ temp = e->c >> 19;
+ if (temp > 0xFF) {
/* Handle overflow over all stacked 0xFF bytes */
if (e->buffer >= 0) {
- if (e->zc)
- do emit_byte(0x00, cinfo);
- while (--e->zc);
- emit_byte(e->buffer + 1, cinfo);
- if (e->buffer + 1 == 0xFF)
- emit_byte(0x00, cinfo);
+ if (e->zc)
+ do emit_byte(0x00, cinfo);
+ while (--e->zc);
+ emit_byte(e->buffer + 1, cinfo);
+ if (e->buffer + 1 == 0xFF)
+ emit_byte(0x00, cinfo);
}
e->zc += e->sc; /* carry-over converts stacked 0xFF bytes to 0x00 */
e->sc = 0;
/* Note: The 3 spacer bits in the C register guarantee
- * that the new buffer byte can't be 0xFF here
- * (see page 160 in the P&M JPEG book). */
+ * that the new buffer byte can't be 0xFF here
+ * (see page 160 in the P&M JPEG book). */
e->buffer = temp & 0xFF; /* new output byte, might overflow later */
- } else if (temp == 0xFF) {
+ } else if (temp == 0xFF) {
++e->sc; /* stack 0xFF byte (which might overflow later) */
- } else {
+ } else {
/* Output all stacked 0xFF bytes, they will not overflow any more */
if (e->buffer == 0)
- ++e->zc;
+ ++e->zc;
else if (e->buffer >= 0) {
- if (e->zc)
- do emit_byte(0x00, cinfo);
- while (--e->zc);
- emit_byte(e->buffer, cinfo);
+ if (e->zc)
+ do emit_byte(0x00, cinfo);
+ while (--e->zc);
+ emit_byte(e->buffer, cinfo);
}
if (e->sc) {
- if (e->zc)
- do emit_byte(0x00, cinfo);
- while (--e->zc);
- do {
- emit_byte(0xFF, cinfo);
- emit_byte(0x00, cinfo);
- } while (--e->sc);
+ if (e->zc)
+ do emit_byte(0x00, cinfo);
+ while (--e->zc);
+ do {
+ emit_byte(0xFF, cinfo);
+ emit_byte(0x00, cinfo);
+ } while (--e->sc);
}
e->buffer = temp & 0xFF; /* new output byte (can still overflow) */
- }
- e->c &= 0x7FFFFL;
- e->ct += 8;
- }
- } while (e->a < 0x8000L);
+ }
+ e->c &= 0x7FFFFL;
+ e->ct += 8;
+ }
+ } while (e->a < 0x8000L);
}
@@ -318,38 +318,38 @@ arith_encode (j_compress_ptr cinfo, unsigned char *st, int val)
LOCAL(void)
emit_restart (j_compress_ptr cinfo, int restart_num)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- int ci;
- jpeg_component_info * compptr;
-
- finish_pass(cinfo);
-
- emit_byte(0xFF, cinfo);
- emit_byte(JPEG_RST0 + restart_num, cinfo);
-
- /* Re-initialize statistics areas */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* DC needs no table for refinement scan */
- if (cinfo->Ss == 0 && cinfo->Ah == 0) {
- MEMZERO(entropy->dc_stats[compptr->dc_tbl_no], DC_STAT_BINS);
- /* Reset DC predictions to 0 */
- entropy->last_dc_val[ci] = 0;
- entropy->dc_context[ci] = 0;
- }
- /* AC needs no table when not present */
- if (cinfo->Se) {
- MEMZERO(entropy->ac_stats[compptr->ac_tbl_no], AC_STAT_BINS);
- }
- }
-
- /* Reset arithmetic encoding variables */
- entropy->c = 0;
- entropy->a = 0x10000L;
- entropy->sc = 0;
- entropy->zc = 0;
- entropy->ct = 11;
- entropy->buffer = -1; /* empty */
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ int ci;
+ jpeg_component_info * compptr;
+
+ finish_pass(cinfo);
+
+ emit_byte(0xFF, cinfo);
+ emit_byte(JPEG_RST0 + restart_num, cinfo);
+
+ /* Re-initialize statistics areas */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* DC needs no table for refinement scan */
+ if (cinfo->Ss == 0 && cinfo->Ah == 0) {
+ MEMZERO(entropy->dc_stats[compptr->dc_tbl_no], DC_STAT_BINS);
+ /* Reset DC predictions to 0 */
+ entropy->last_dc_val[ci] = 0;
+ entropy->dc_context[ci] = 0;
+ }
+ /* AC needs no table when not present */
+ if (cinfo->Se) {
+ MEMZERO(entropy->ac_stats[compptr->ac_tbl_no], AC_STAT_BINS);
+ }
+ }
+
+ /* Reset arithmetic encoding variables */
+ entropy->c = 0;
+ entropy->a = 0x10000L;
+ entropy->sc = 0;
+ entropy->zc = 0;
+ entropy->ct = 11;
+ entropy->buffer = -1; /* empty */
}
@@ -361,86 +361,86 @@ emit_restart (j_compress_ptr cinfo, int restart_num)
METHODDEF(boolean)
encode_mcu_DC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- JBLOCKROW block;
- unsigned char *st;
- int blkn, ci, tbl;
- int v, v2, m;
- ISHIFT_TEMPS
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- emit_restart(cinfo, entropy->next_restart_num);
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- /* Encode the MCU data blocks */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
- ci = cinfo->MCU_membership[blkn];
- tbl = cinfo->cur_comp_info[ci]->dc_tbl_no;
-
- /* Compute the DC value after the required point transform by Al.
- * This is simply an arithmetic right shift.
- */
- m = IRIGHT_SHIFT((int) ((*block)[0]), cinfo->Al);
-
- /* Sections F.1.4.1 & F.1.4.4.1: Encoding of DC coefficients */
-
- /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
- st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
-
- /* Figure F.4: Encode_DC_DIFF */
- if ((v = m - entropy->last_dc_val[ci]) == 0) {
- arith_encode(cinfo, st, 0);
- entropy->dc_context[ci] = 0; /* zero diff category */
- } else {
- entropy->last_dc_val[ci] = m;
- arith_encode(cinfo, st, 1);
- /* Figure F.6: Encoding nonzero value v */
- /* Figure F.7: Encoding the sign of v */
- if (v > 0) {
- arith_encode(cinfo, st + 1, 0); /* Table F.4: SS = S0 + 1 */
- st += 2; /* Table F.4: SP = S0 + 2 */
- entropy->dc_context[ci] = 4; /* small positive diff category */
- } else {
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ JBLOCKROW block;
+ unsigned char *st;
+ int blkn, ci, tbl;
+ int v, v2, m;
+ ISHIFT_TEMPS
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ emit_restart(cinfo, entropy->next_restart_num);
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ /* Encode the MCU data blocks */
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
+ ci = cinfo->MCU_membership[blkn];
+ tbl = cinfo->cur_comp_info[ci]->dc_tbl_no;
+
+ /* Compute the DC value after the required point transform by Al.
+ * This is simply an arithmetic right shift.
+ */
+ m = IRIGHT_SHIFT((int) ((*block)[0]), cinfo->Al);
+
+ /* Sections F.1.4.1 & F.1.4.4.1: Encoding of DC coefficients */
+
+ /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
+ st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
+
+ /* Figure F.4: Encode_DC_DIFF */
+ if ((v = m - entropy->last_dc_val[ci]) == 0) {
+ arith_encode(cinfo, st, 0);
+ entropy->dc_context[ci] = 0; /* zero diff category */
+ } else {
+ entropy->last_dc_val[ci] = m;
+ arith_encode(cinfo, st, 1);
+ /* Figure F.6: Encoding nonzero value v */
+ /* Figure F.7: Encoding the sign of v */
+ if (v > 0) {
+ arith_encode(cinfo, st + 1, 0); /* Table F.4: SS = S0 + 1 */
+ st += 2; /* Table F.4: SP = S0 + 2 */
+ entropy->dc_context[ci] = 4; /* small positive diff category */
+ } else {
v = -v;
- arith_encode(cinfo, st + 1, 1); /* Table F.4: SS = S0 + 1 */
- st += 3; /* Table F.4: SN = S0 + 3 */
- entropy->dc_context[ci] = 8; /* small negative diff category */
- }
- /* Figure F.8: Encoding the magnitude category of v */
- m = 0;
- if (v -= 1) {
+ arith_encode(cinfo, st + 1, 1); /* Table F.4: SS = S0 + 1 */
+ st += 3; /* Table F.4: SN = S0 + 3 */
+ entropy->dc_context[ci] = 8; /* small negative diff category */
+ }
+ /* Figure F.8: Encoding the magnitude category of v */
+ m = 0;
+ if (v -= 1) {
arith_encode(cinfo, st, 1);
m = 1;
v2 = v;
st = entropy->dc_stats[tbl] + 20; /* Table F.4: X1 = 20 */
while (v2 >>= 1) {
- arith_encode(cinfo, st, 1);
- m <<= 1;
- st += 1;
- }
- }
- arith_encode(cinfo, st, 0);
- /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
- if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
- entropy->dc_context[ci] = 0; /* zero diff category */
- else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
- entropy->dc_context[ci] += 8; /* large diff category */
- /* Figure F.9: Encoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
+ arith_encode(cinfo, st, 1);
+ m <<= 1;
+ st += 1;
+ }
+ }
+ arith_encode(cinfo, st, 0);
+ /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
+ if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
+ entropy->dc_context[ci] = 0; /* zero diff category */
+ else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
+ entropy->dc_context[ci] += 8; /* large diff category */
+ /* Figure F.9: Encoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
arith_encode(cinfo, st, (m & v) ? 1 : 0);
- }
- }
+ }
+ }
- return TRUE;
+ return TRUE;
}
@@ -452,98 +452,98 @@ encode_mcu_DC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
encode_mcu_AC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- JBLOCKROW block;
- unsigned char *st;
- int tbl, k, ke;
- int v, v2, m;
- const int * natural_order;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- emit_restart(cinfo, entropy->next_restart_num);
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- natural_order = cinfo->natural_order;
-
- /* Encode the MCU data block */
- block = MCU_data[0];
- tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
-
- /* Sections F.1.4.2 & F.1.4.4.2: Encoding of AC coefficients */
-
- /* Establish EOB (end-of-block) index */
- for (ke = cinfo->Se; ke > 0; ke--)
- /* We must apply the point transform by Al. For AC coefficients this
- * is an integer division with rounding towards 0. To do this portably
- * in C, we shift after obtaining the absolute value.
- */
- if ((v = (*block)[natural_order[ke]]) >= 0) {
- if (v >>= cinfo->Al) break;
- } else {
- v = -v;
- if (v >>= cinfo->Al) break;
- }
-
- /* Figure F.5: Encode_AC_Coefficients */
- for (k = cinfo->Ss; k <= ke; k++) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- arith_encode(cinfo, st, 0); /* EOB decision */
- for (;;) {
- if ((v = (*block)[natural_order[k]]) >= 0) {
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ JBLOCKROW block;
+ unsigned char *st;
+ int tbl, k, ke;
+ int v, v2, m;
+ const int * natural_order;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ emit_restart(cinfo, entropy->next_restart_num);
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ natural_order = cinfo->natural_order;
+
+ /* Encode the MCU data block */
+ block = MCU_data[0];
+ tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
+
+ /* Sections F.1.4.2 & F.1.4.4.2: Encoding of AC coefficients */
+
+ /* Establish EOB (end-of-block) index */
+ for (ke = cinfo->Se; ke > 0; ke--)
+ /* We must apply the point transform by Al. For AC coefficients this
+ * is an integer division with rounding towards 0. To do this portably
+ * in C, we shift after obtaining the absolute value.
+ */
+ if ((v = (*block)[natural_order[ke]]) >= 0) {
+ if (v >>= cinfo->Al) break;
+ } else {
+ v = -v;
+ if (v >>= cinfo->Al) break;
+ }
+
+ /* Figure F.5: Encode_AC_Coefficients */
+ for (k = cinfo->Ss; k <= ke; k++) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ arith_encode(cinfo, st, 0); /* EOB decision */
+ for (;;) {
+ if ((v = (*block)[natural_order[k]]) >= 0) {
if (v >>= cinfo->Al) {
- arith_encode(cinfo, st + 1, 1);
- arith_encode(cinfo, entropy->fixed_bin, 0);
- break;
+ arith_encode(cinfo, st + 1, 1);
+ arith_encode(cinfo, entropy->fixed_bin, 0);
+ break;
}
- } else {
+ } else {
v = -v;
if (v >>= cinfo->Al) {
- arith_encode(cinfo, st + 1, 1);
- arith_encode(cinfo, entropy->fixed_bin, 1);
- break;
- }
- }
- arith_encode(cinfo, st + 1, 0); st += 3; k++;
- }
- st += 2;
- /* Figure F.8: Encoding the magnitude category of v */
- m = 0;
- if (v -= 1) {
- arith_encode(cinfo, st, 1);
- m = 1;
- v2 = v;
- if (v2 >>= 1) {
+ arith_encode(cinfo, st + 1, 1);
+ arith_encode(cinfo, entropy->fixed_bin, 1);
+ break;
+ }
+ }
+ arith_encode(cinfo, st + 1, 0); st += 3; k++;
+ }
+ st += 2;
+ /* Figure F.8: Encoding the magnitude category of v */
+ m = 0;
+ if (v -= 1) {
+ arith_encode(cinfo, st, 1);
+ m = 1;
+ v2 = v;
+ if (v2 >>= 1) {
arith_encode(cinfo, st, 1);
m <<= 1;
st = entropy->ac_stats[tbl] +
- (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
+ (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
while (v2 >>= 1) {
- arith_encode(cinfo, st, 1);
- m <<= 1;
- st += 1;
- }
- }
- }
- arith_encode(cinfo, st, 0);
- /* Figure F.9: Encoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
- arith_encode(cinfo, st, (m & v) ? 1 : 0);
- }
- /* Encode EOB decision only if k <= cinfo->Se */
- if (k <= cinfo->Se) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- arith_encode(cinfo, st, 1);
- }
-
- return TRUE;
+ arith_encode(cinfo, st, 1);
+ m <<= 1;
+ st += 1;
+ }
+ }
+ }
+ arith_encode(cinfo, st, 0);
+ /* Figure F.9: Encoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
+ arith_encode(cinfo, st, (m & v) ? 1 : 0);
+ }
+ /* Encode EOB decision only if k <= cinfo->Se */
+ if (k <= cinfo->Se) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ arith_encode(cinfo, st, 1);
+ }
+
+ return TRUE;
}
@@ -554,31 +554,31 @@ encode_mcu_AC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
encode_mcu_DC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- unsigned char *st;
- int Al, blkn;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- emit_restart(cinfo, entropy->next_restart_num);
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- st = entropy->fixed_bin; /* use fixed probability estimation */
- Al = cinfo->Al;
-
- /* Encode the MCU data blocks */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- /* We simply emit the Al'th bit of the DC coefficient value. */
- arith_encode(cinfo, st, (MCU_data[blkn][0][0] >> Al) & 1);
- }
-
- return TRUE;
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ unsigned char *st;
+ int Al, blkn;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ emit_restart(cinfo, entropy->next_restart_num);
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ st = entropy->fixed_bin; /* use fixed probability estimation */
+ Al = cinfo->Al;
+
+ /* Encode the MCU data blocks */
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ /* We simply emit the Al'th bit of the DC coefficient value. */
+ arith_encode(cinfo, st, (MCU_data[blkn][0][0] >> Al) & 1);
+ }
+
+ return TRUE;
}
@@ -589,92 +589,92 @@ encode_mcu_DC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
encode_mcu_AC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- JBLOCKROW block;
- unsigned char *st;
- int tbl, k, ke, kex;
- int v;
- const int * natural_order;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- emit_restart(cinfo, entropy->next_restart_num);
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- natural_order = cinfo->natural_order;
-
- /* Encode the MCU data block */
- block = MCU_data[0];
- tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
-
- /* Section G.1.3.3: Encoding of AC coefficients */
-
- /* Establish EOB (end-of-block) index */
- for (ke = cinfo->Se; ke > 0; ke--)
- /* We must apply the point transform by Al. For AC coefficients this
- * is an integer division with rounding towards 0. To do this portably
- * in C, we shift after obtaining the absolute value.
- */
- if ((v = (*block)[natural_order[ke]]) >= 0) {
- if (v >>= cinfo->Al) break;
- } else {
- v = -v;
- if (v >>= cinfo->Al) break;
- }
-
- /* Establish EOBx (previous stage end-of-block) index */
- for (kex = ke; kex > 0; kex--)
- if ((v = (*block)[natural_order[kex]]) >= 0) {
- if (v >>= cinfo->Ah) break;
- } else {
- v = -v;
- if (v >>= cinfo->Ah) break;
- }
-
- /* Figure G.10: Encode_AC_Coefficients_SA */
- for (k = cinfo->Ss; k <= ke; k++) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- if (k > kex)
- arith_encode(cinfo, st, 0); /* EOB decision */
- for (;;) {
- if ((v = (*block)[natural_order[k]]) >= 0) {
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ JBLOCKROW block;
+ unsigned char *st;
+ int tbl, k, ke, kex;
+ int v;
+ const int * natural_order;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ emit_restart(cinfo, entropy->next_restart_num);
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ natural_order = cinfo->natural_order;
+
+ /* Encode the MCU data block */
+ block = MCU_data[0];
+ tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
+
+ /* Section G.1.3.3: Encoding of AC coefficients */
+
+ /* Establish EOB (end-of-block) index */
+ for (ke = cinfo->Se; ke > 0; ke--)
+ /* We must apply the point transform by Al. For AC coefficients this
+ * is an integer division with rounding towards 0. To do this portably
+ * in C, we shift after obtaining the absolute value.
+ */
+ if ((v = (*block)[natural_order[ke]]) >= 0) {
+ if (v >>= cinfo->Al) break;
+ } else {
+ v = -v;
+ if (v >>= cinfo->Al) break;
+ }
+
+ /* Establish EOBx (previous stage end-of-block) index */
+ for (kex = ke; kex > 0; kex--)
+ if ((v = (*block)[natural_order[kex]]) >= 0) {
+ if (v >>= cinfo->Ah) break;
+ } else {
+ v = -v;
+ if (v >>= cinfo->Ah) break;
+ }
+
+ /* Figure G.10: Encode_AC_Coefficients_SA */
+ for (k = cinfo->Ss; k <= ke; k++) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ if (k > kex)
+ arith_encode(cinfo, st, 0); /* EOB decision */
+ for (;;) {
+ if ((v = (*block)[natural_order[k]]) >= 0) {
if (v >>= cinfo->Al) {
- if (v >> 1) /* previously nonzero coef */
- arith_encode(cinfo, st + 2, (v & 1));
- else { /* newly nonzero coef */
- arith_encode(cinfo, st + 1, 1);
- arith_encode(cinfo, entropy->fixed_bin, 0);
- }
- break;
- }
- } else {
+ if (v >> 1) /* previously nonzero coef */
+ arith_encode(cinfo, st + 2, (v & 1));
+ else { /* newly nonzero coef */
+ arith_encode(cinfo, st + 1, 1);
+ arith_encode(cinfo, entropy->fixed_bin, 0);
+ }
+ break;
+ }
+ } else {
v = -v;
if (v >>= cinfo->Al) {
- if (v >> 1) /* previously nonzero coef */
- arith_encode(cinfo, st + 2, (v & 1));
- else { /* newly nonzero coef */
- arith_encode(cinfo, st + 1, 1);
- arith_encode(cinfo, entropy->fixed_bin, 1);
- }
- break;
- }
- }
- arith_encode(cinfo, st + 1, 0); st += 3; k++;
- }
- }
- /* Encode EOB decision only if k <= cinfo->Se */
- if (k <= cinfo->Se) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- arith_encode(cinfo, st, 1);
- }
-
- return TRUE;
+ if (v >> 1) /* previously nonzero coef */
+ arith_encode(cinfo, st + 2, (v & 1));
+ else { /* newly nonzero coef */
+ arith_encode(cinfo, st + 1, 1);
+ arith_encode(cinfo, entropy->fixed_bin, 1);
+ }
+ break;
+ }
+ }
+ arith_encode(cinfo, st + 1, 0); st += 3; k++;
+ }
+ }
+ /* Encode EOB decision only if k <= cinfo->Se */
+ if (k <= cinfo->Se) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ arith_encode(cinfo, st, 1);
+ }
+
+ return TRUE;
}
@@ -685,141 +685,141 @@ encode_mcu_AC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
encode_mcu (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- jpeg_component_info * compptr;
- JBLOCKROW block;
- unsigned char *st;
- int blkn, ci, tbl, k, ke;
- int v, v2, m;
- const int * natural_order;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- emit_restart(cinfo, entropy->next_restart_num);
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- natural_order = cinfo->natural_order;
-
- /* Encode the MCU data blocks */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
- ci = cinfo->MCU_membership[blkn];
- compptr = cinfo->cur_comp_info[ci];
-
- /* Sections F.1.4.1 & F.1.4.4.1: Encoding of DC coefficients */
-
- tbl = compptr->dc_tbl_no;
-
- /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
- st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
-
- /* Figure F.4: Encode_DC_DIFF */
- if ((v = (*block)[0] - entropy->last_dc_val[ci]) == 0) {
- arith_encode(cinfo, st, 0);
- entropy->dc_context[ci] = 0; /* zero diff category */
- } else {
- entropy->last_dc_val[ci] = (*block)[0];
- arith_encode(cinfo, st, 1);
- /* Figure F.6: Encoding nonzero value v */
- /* Figure F.7: Encoding the sign of v */
- if (v > 0) {
- arith_encode(cinfo, st + 1, 0); /* Table F.4: SS = S0 + 1 */
- st += 2; /* Table F.4: SP = S0 + 2 */
- entropy->dc_context[ci] = 4; /* small positive diff category */
- } else {
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ jpeg_component_info * compptr;
+ JBLOCKROW block;
+ unsigned char *st;
+ int blkn, ci, tbl, k, ke;
+ int v, v2, m;
+ const int * natural_order;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ emit_restart(cinfo, entropy->next_restart_num);
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ natural_order = cinfo->natural_order;
+
+ /* Encode the MCU data blocks */
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
+ ci = cinfo->MCU_membership[blkn];
+ compptr = cinfo->cur_comp_info[ci];
+
+ /* Sections F.1.4.1 & F.1.4.4.1: Encoding of DC coefficients */
+
+ tbl = compptr->dc_tbl_no;
+
+ /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
+ st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
+
+ /* Figure F.4: Encode_DC_DIFF */
+ if ((v = (*block)[0] - entropy->last_dc_val[ci]) == 0) {
+ arith_encode(cinfo, st, 0);
+ entropy->dc_context[ci] = 0; /* zero diff category */
+ } else {
+ entropy->last_dc_val[ci] = (*block)[0];
+ arith_encode(cinfo, st, 1);
+ /* Figure F.6: Encoding nonzero value v */
+ /* Figure F.7: Encoding the sign of v */
+ if (v > 0) {
+ arith_encode(cinfo, st + 1, 0); /* Table F.4: SS = S0 + 1 */
+ st += 2; /* Table F.4: SP = S0 + 2 */
+ entropy->dc_context[ci] = 4; /* small positive diff category */
+ } else {
v = -v;
- arith_encode(cinfo, st + 1, 1); /* Table F.4: SS = S0 + 1 */
- st += 3; /* Table F.4: SN = S0 + 3 */
- entropy->dc_context[ci] = 8; /* small negative diff category */
- }
- /* Figure F.8: Encoding the magnitude category of v */
- m = 0;
- if (v -= 1) {
+ arith_encode(cinfo, st + 1, 1); /* Table F.4: SS = S0 + 1 */
+ st += 3; /* Table F.4: SN = S0 + 3 */
+ entropy->dc_context[ci] = 8; /* small negative diff category */
+ }
+ /* Figure F.8: Encoding the magnitude category of v */
+ m = 0;
+ if (v -= 1) {
arith_encode(cinfo, st, 1);
m = 1;
v2 = v;
st = entropy->dc_stats[tbl] + 20; /* Table F.4: X1 = 20 */
while (v2 >>= 1) {
- arith_encode(cinfo, st, 1);
- m <<= 1;
- st += 1;
- }
- }
- arith_encode(cinfo, st, 0);
- /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
- if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
- entropy->dc_context[ci] = 0; /* zero diff category */
- else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
- entropy->dc_context[ci] += 8; /* large diff category */
- /* Figure F.9: Encoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
+ arith_encode(cinfo, st, 1);
+ m <<= 1;
+ st += 1;
+ }
+ }
+ arith_encode(cinfo, st, 0);
+ /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
+ if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
+ entropy->dc_context[ci] = 0; /* zero diff category */
+ else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
+ entropy->dc_context[ci] += 8; /* large diff category */
+ /* Figure F.9: Encoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
arith_encode(cinfo, st, (m & v) ? 1 : 0);
- }
+ }
- /* Sections F.1.4.2 & F.1.4.4.2: Encoding of AC coefficients */
+ /* Sections F.1.4.2 & F.1.4.4.2: Encoding of AC coefficients */
- tbl = compptr->ac_tbl_no;
+ tbl = compptr->ac_tbl_no;
- /* Establish EOB (end-of-block) index */
- for (ke = cinfo->lim_Se; ke > 0; ke--)
- if ((*block)[natural_order[ke]]) break;
+ /* Establish EOB (end-of-block) index */
+ for (ke = cinfo->lim_Se; ke > 0; ke--)
+ if ((*block)[natural_order[ke]]) break;
- /* Figure F.5: Encode_AC_Coefficients */
- for (k = 1; k <= ke; k++) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- arith_encode(cinfo, st, 0); /* EOB decision */
- while ((v = (*block)[natural_order[k]]) == 0) {
+ /* Figure F.5: Encode_AC_Coefficients */
+ for (k = 1; k <= ke; k++) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ arith_encode(cinfo, st, 0); /* EOB decision */
+ while ((v = (*block)[natural_order[k]]) == 0) {
arith_encode(cinfo, st + 1, 0); st += 3; k++;
- }
- arith_encode(cinfo, st + 1, 1);
- /* Figure F.6: Encoding nonzero value v */
- /* Figure F.7: Encoding the sign of v */
- if (v > 0) {
+ }
+ arith_encode(cinfo, st + 1, 1);
+ /* Figure F.6: Encoding nonzero value v */
+ /* Figure F.7: Encoding the sign of v */
+ if (v > 0) {
arith_encode(cinfo, entropy->fixed_bin, 0);
- } else {
+ } else {
v = -v;
arith_encode(cinfo, entropy->fixed_bin, 1);
- }
- st += 2;
- /* Figure F.8: Encoding the magnitude category of v */
- m = 0;
- if (v -= 1) {
+ }
+ st += 2;
+ /* Figure F.8: Encoding the magnitude category of v */
+ m = 0;
+ if (v -= 1) {
arith_encode(cinfo, st, 1);
m = 1;
v2 = v;
if (v2 >>= 1) {
- arith_encode(cinfo, st, 1);
- m <<= 1;
- st = entropy->ac_stats[tbl] +
- (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
- while (v2 >>= 1) {
- arith_encode(cinfo, st, 1);
- m <<= 1;
- st += 1;
- }
- }
- }
- arith_encode(cinfo, st, 0);
- /* Figure F.9: Encoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
+ arith_encode(cinfo, st, 1);
+ m <<= 1;
+ st = entropy->ac_stats[tbl] +
+ (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
+ while (v2 >>= 1) {
+ arith_encode(cinfo, st, 1);
+ m <<= 1;
+ st += 1;
+ }
+ }
+ }
+ arith_encode(cinfo, st, 0);
+ /* Figure F.9: Encoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
arith_encode(cinfo, st, (m & v) ? 1 : 0);
- }
- /* Encode EOB decision only if k <= cinfo->lim_Se */
- if (k <= cinfo->lim_Se) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- arith_encode(cinfo, st, 1);
- }
- }
-
- return TRUE;
+ }
+ /* Encode EOB decision only if k <= cinfo->lim_Se */
+ if (k <= cinfo->lim_Se) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ arith_encode(cinfo, st, 1);
+ }
+ }
+
+ return TRUE;
}
@@ -830,79 +830,79 @@ encode_mcu (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(void)
start_pass (j_compress_ptr cinfo, boolean gather_statistics)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- int ci, tbl;
- jpeg_component_info * compptr;
-
- if (gather_statistics)
- /* Make sure to avoid that in the master control logic!
- * We are fully adaptive here and need no extra
- * statistics gathering pass!
- */
- ERREXIT(cinfo, JERR_NOT_COMPILED);
-
- /* We assume jcmaster.c already validated the progressive scan parameters. */
-
- /* Select execution routines */
- if (cinfo->progressive_mode) {
- if (cinfo->Ah == 0) {
- if (cinfo->Ss == 0)
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ int ci, tbl;
+ jpeg_component_info * compptr;
+
+ if (gather_statistics)
+ /* Make sure to avoid that in the master control logic!
+ * We are fully adaptive here and need no extra
+ * statistics gathering pass!
+ */
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
+
+ /* We assume jcmaster.c already validated the progressive scan parameters. */
+
+ /* Select execution routines */
+ if (cinfo->progressive_mode) {
+ if (cinfo->Ah == 0) {
+ if (cinfo->Ss == 0)
entropy->pub.encode_mcu = encode_mcu_DC_first;
- else
+ else
entropy->pub.encode_mcu = encode_mcu_AC_first;
- } else {
- if (cinfo->Ss == 0)
+ } else {
+ if (cinfo->Ss == 0)
entropy->pub.encode_mcu = encode_mcu_DC_refine;
- else
+ else
entropy->pub.encode_mcu = encode_mcu_AC_refine;
- }
- } else
- entropy->pub.encode_mcu = encode_mcu;
-
- /* Allocate & initialize requested statistics areas */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* DC needs no table for refinement scan */
- if (cinfo->Ss == 0 && cinfo->Ah == 0) {
- tbl = compptr->dc_tbl_no;
- if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
+ }
+ } else
+ entropy->pub.encode_mcu = encode_mcu;
+
+ /* Allocate & initialize requested statistics areas */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* DC needs no table for refinement scan */
+ if (cinfo->Ss == 0 && cinfo->Ah == 0) {
+ tbl = compptr->dc_tbl_no;
+ if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
ERREXIT1(cinfo, JERR_NO_ARITH_TABLE, tbl);
- if (entropy->dc_stats[tbl] == NULL)
+ if (entropy->dc_stats[tbl] == NULL)
entropy->dc_stats[tbl] = (unsigned char *) (*cinfo->mem->alloc_small)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, DC_STAT_BINS);
- MEMZERO(entropy->dc_stats[tbl], DC_STAT_BINS);
- /* Initialize DC predictions to 0 */
- entropy->last_dc_val[ci] = 0;
- entropy->dc_context[ci] = 0;
- }
- /* AC needs no table when not present */
- if (cinfo->Se) {
- tbl = compptr->ac_tbl_no;
- if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, DC_STAT_BINS);
+ MEMZERO(entropy->dc_stats[tbl], DC_STAT_BINS);
+ /* Initialize DC predictions to 0 */
+ entropy->last_dc_val[ci] = 0;
+ entropy->dc_context[ci] = 0;
+ }
+ /* AC needs no table when not present */
+ if (cinfo->Se) {
+ tbl = compptr->ac_tbl_no;
+ if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
ERREXIT1(cinfo, JERR_NO_ARITH_TABLE, tbl);
- if (entropy->ac_stats[tbl] == NULL)
+ if (entropy->ac_stats[tbl] == NULL)
entropy->ac_stats[tbl] = (unsigned char *) (*cinfo->mem->alloc_small)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, AC_STAT_BINS);
- MEMZERO(entropy->ac_stats[tbl], AC_STAT_BINS);
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, AC_STAT_BINS);
+ MEMZERO(entropy->ac_stats[tbl], AC_STAT_BINS);
#ifdef CALCULATE_SPECTRAL_CONDITIONING
- if (cinfo->progressive_mode)
+ if (cinfo->progressive_mode)
/* Section G.1.3.2: Set appropriate arithmetic conditioning value Kx */
cinfo->arith_ac_K[tbl] = cinfo->Ss + ((8 + cinfo->Se - cinfo->Ss) >> 4);
#endif
- }
- }
-
- /* Initialize arithmetic encoding variables */
- entropy->c = 0;
- entropy->a = 0x10000L;
- entropy->sc = 0;
- entropy->zc = 0;
- entropy->ct = 11;
- entropy->buffer = -1; /* empty */
-
- /* Initialize restart stuff */
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num = 0;
+ }
+ }
+
+ /* Initialize arithmetic encoding variables */
+ entropy->c = 0;
+ entropy->a = 0x10000L;
+ entropy->sc = 0;
+ entropy->zc = 0;
+ entropy->ct = 11;
+ entropy->buffer = -1; /* empty */
+
+ /* Initialize restart stuff */
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num = 0;
}
@@ -913,22 +913,22 @@ start_pass (j_compress_ptr cinfo, boolean gather_statistics)
GLOBAL(void)
jinit_arith_encoder (j_compress_ptr cinfo)
{
- arith_entropy_ptr entropy;
- int i;
+ arith_entropy_ptr entropy;
+ int i;
- entropy = (arith_entropy_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ entropy = (arith_entropy_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(arith_entropy_encoder));
- cinfo->entropy = (struct jpeg_entropy_encoder *) entropy;
- entropy->pub.start_pass = start_pass;
- entropy->pub.finish_pass = finish_pass;
-
- /* Mark tables unallocated */
- for (i = 0; i < NUM_ARITH_TBLS; i++) {
- entropy->dc_stats[i] = NULL;
- entropy->ac_stats[i] = NULL;
- }
-
- /* Initialize index for fixed probability estimation */
- entropy->fixed_bin[0] = 113;
+ cinfo->entropy = (struct jpeg_entropy_encoder *) entropy;
+ entropy->pub.start_pass = start_pass;
+ entropy->pub.finish_pass = finish_pass;
+
+ /* Mark tables unallocated */
+ for (i = 0; i < NUM_ARITH_TBLS; i++) {
+ entropy->dc_stats[i] = NULL;
+ entropy->ac_stats[i] = NULL;
+ }
+
+ /* Initialize index for fixed probability estimation */
+ entropy->fixed_bin[0] = 113;
}
diff --git a/src/lib/libjpeg/jccoefct.c b/src/lib/libjpeg/jccoefct.c
index d775313b86f..10ce0635231 100644
--- a/src/lib/libjpeg/jccoefct.c
+++ b/src/lib/libjpeg/jccoefct.c
@@ -32,26 +32,26 @@
/* Private buffer controller object */
typedef struct {
- struct jpeg_c_coef_controller pub; /* public fields */
-
- JDIMENSION iMCU_row_num; /* iMCU row # within image */
- JDIMENSION mcu_ctr; /* counts MCUs processed in current row */
- int MCU_vert_offset; /* counts MCU rows within iMCU row */
- int MCU_rows_per_iMCU_row; /* number of such rows needed */
-
- /* For single-pass compression, it's sufficient to buffer just one MCU
- * (although this may prove a bit slow in practice). We allocate a
- * workspace of C_MAX_BLOCKS_IN_MCU coefficient blocks, and reuse it for each
- * MCU constructed and sent. (On 80x86, the workspace is FAR even though
- * it's not really very big; this is to keep the module interfaces unchanged
- * when a large coefficient buffer is necessary.)
- * In multi-pass modes, this array points to the current MCU's blocks
- * within the virtual arrays.
- */
- JBLOCKROW MCU_buffer[C_MAX_BLOCKS_IN_MCU];
-
- /* In multi-pass modes, we need a virtual block array for each component. */
- jvirt_barray_ptr whole_image[MAX_COMPONENTS];
+ struct jpeg_c_coef_controller pub; /* public fields */
+
+ JDIMENSION iMCU_row_num; /* iMCU row # within image */
+ JDIMENSION mcu_ctr; /* counts MCUs processed in current row */
+ int MCU_vert_offset; /* counts MCU rows within iMCU row */
+ int MCU_rows_per_iMCU_row; /* number of such rows needed */
+
+ /* For single-pass compression, it's sufficient to buffer just one MCU
+ * (although this may prove a bit slow in practice). We allocate a
+ * workspace of C_MAX_BLOCKS_IN_MCU coefficient blocks, and reuse it for each
+ * MCU constructed and sent. (On 80x86, the workspace is FAR even though
+ * it's not really very big; this is to keep the module interfaces unchanged
+ * when a large coefficient buffer is necessary.)
+ * In multi-pass modes, this array points to the current MCU's blocks
+ * within the virtual arrays.
+ */
+ JBLOCKROW MCU_buffer[C_MAX_BLOCKS_IN_MCU];
+
+ /* In multi-pass modes, we need a virtual block array for each component. */
+ jvirt_barray_ptr whole_image[MAX_COMPONENTS];
} my_coef_controller;
typedef my_coef_controller * my_coef_ptr;
@@ -59,12 +59,12 @@ typedef my_coef_controller * my_coef_ptr;
/* Forward declarations */
METHODDEF(boolean) compress_data
- JPP((j_compress_ptr cinfo, JSAMPIMAGE input_buf));
+ JPP((j_compress_ptr cinfo, JSAMPIMAGE input_buf));
#ifdef FULL_COEF_BUFFER_SUPPORTED
METHODDEF(boolean) compress_first_pass
- JPP((j_compress_ptr cinfo, JSAMPIMAGE input_buf));
+ JPP((j_compress_ptr cinfo, JSAMPIMAGE input_buf));
METHODDEF(boolean) compress_output
- JPP((j_compress_ptr cinfo, JSAMPIMAGE input_buf));
+ JPP((j_compress_ptr cinfo, JSAMPIMAGE input_buf));
#endif
@@ -72,23 +72,23 @@ LOCAL(void)
start_iMCU_row (j_compress_ptr cinfo)
/* Reset within-iMCU-row counters for a new row */
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
-
- /* In an interleaved scan, an MCU row is the same as an iMCU row.
- * In a noninterleaved scan, an iMCU row has v_samp_factor MCU rows.
- * But at the bottom of the image, process only what's left.
- */
- if (cinfo->comps_in_scan > 1) {
- coef->MCU_rows_per_iMCU_row = 1;
- } else {
- if (coef->iMCU_row_num < (cinfo->total_iMCU_rows-1))
- coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->v_samp_factor;
- else
- coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->last_row_height;
- }
-
- coef->mcu_ctr = 0;
- coef->MCU_vert_offset = 0;
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+
+ /* In an interleaved scan, an MCU row is the same as an iMCU row.
+ * In a noninterleaved scan, an iMCU row has v_samp_factor MCU rows.
+ * But at the bottom of the image, process only what's left.
+ */
+ if (cinfo->comps_in_scan > 1) {
+ coef->MCU_rows_per_iMCU_row = 1;
+ } else {
+ if (coef->iMCU_row_num < (cinfo->total_iMCU_rows-1))
+ coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->v_samp_factor;
+ else
+ coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->last_row_height;
+ }
+
+ coef->mcu_ctr = 0;
+ coef->MCU_vert_offset = 0;
}
@@ -99,33 +99,33 @@ start_iMCU_row (j_compress_ptr cinfo)
METHODDEF(void)
start_pass_coef (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- coef->iMCU_row_num = 0;
- start_iMCU_row(cinfo);
+ coef->iMCU_row_num = 0;
+ start_iMCU_row(cinfo);
- switch (pass_mode) {
- case JBUF_PASS_THRU:
- if (coef->whole_image[0] != NULL)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- coef->pub.compress_data = compress_data;
- break;
+ switch (pass_mode) {
+ case JBUF_PASS_THRU:
+ if (coef->whole_image[0] != NULL)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ coef->pub.compress_data = compress_data;
+ break;
#ifdef FULL_COEF_BUFFER_SUPPORTED
- case JBUF_SAVE_AND_PASS:
- if (coef->whole_image[0] == NULL)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- coef->pub.compress_data = compress_first_pass;
- break;
- case JBUF_CRANK_DEST:
- if (coef->whole_image[0] == NULL)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- coef->pub.compress_data = compress_output;
- break;
+ case JBUF_SAVE_AND_PASS:
+ if (coef->whole_image[0] == NULL)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ coef->pub.compress_data = compress_first_pass;
+ break;
+ case JBUF_CRANK_DEST:
+ if (coef->whole_image[0] == NULL)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ coef->pub.compress_data = compress_output;
+ break;
#endif
- default:
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- break;
- }
+ default:
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ break;
+ }
}
@@ -142,31 +142,31 @@ start_pass_coef (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
METHODDEF(boolean)
compress_data (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION MCU_col_num; /* index of current MCU within row */
- JDIMENSION last_MCU_col = cinfo->MCUs_per_row - 1;
- JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
- int blkn, bi, ci, yindex, yoffset, blockcnt;
- JDIMENSION ypos, xpos;
- jpeg_component_info *compptr;
- forward_DCT_ptr forward_DCT;
-
- /* Loop to write as much as one whole iMCU row */
- for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
- yoffset++) {
- for (MCU_col_num = coef->mcu_ctr; MCU_col_num <= last_MCU_col;
- MCU_col_num++) {
- /* Determine where data comes from in input_buf and do the DCT thing.
- * Each call on forward_DCT processes a horizontal row of DCT blocks
- * as wide as an MCU; we rely on having allocated the MCU_buffer[] blocks
- * sequentially. Dummy blocks at the right or bottom edge are filled in
- * specially. The data in them does not matter for image reconstruction,
- * so we fill them with values that will encode to the smallest amount of
- * data, viz: all zeroes in the AC entries, DC entries equal to previous
- * block's DC value. (Thanks to Thomas Kinsman for this idea.)
- */
- blkn = 0;
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION MCU_col_num; /* index of current MCU within row */
+ JDIMENSION last_MCU_col = cinfo->MCUs_per_row - 1;
+ JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
+ int blkn, bi, ci, yindex, yoffset, blockcnt;
+ JDIMENSION ypos, xpos;
+ jpeg_component_info *compptr;
+ forward_DCT_ptr forward_DCT;
+
+ /* Loop to write as much as one whole iMCU row */
+ for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
+ yoffset++) {
+ for (MCU_col_num = coef->mcu_ctr; MCU_col_num <= last_MCU_col;
+ MCU_col_num++) {
+ /* Determine where data comes from in input_buf and do the DCT thing.
+ * Each call on forward_DCT processes a horizontal row of DCT blocks
+ * as wide as an MCU; we rely on having allocated the MCU_buffer[] blocks
+ * sequentially. Dummy blocks at the right or bottom edge are filled in
+ * specially. The data in them does not matter for image reconstruction,
+ * so we fill them with values that will encode to the smallest amount of
+ * data, viz: all zeroes in the AC entries, DC entries equal to previous
+ * block's DC value. (Thanks to Thomas Kinsman for this idea.)
+ */
+ blkn = 0;
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
compptr = cinfo->cur_comp_info[ci];
forward_DCT = cinfo->fdct->forward_DCT[compptr->component_index];
blockcnt = (MCU_col_num < last_MCU_col) ? compptr->MCU_width
@@ -175,49 +175,49 @@ compress_data (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
ypos = yoffset * compptr->DCT_v_scaled_size;
/* ypos == (yoffset+yindex) * DCTSIZE */
for (yindex = 0; yindex < compptr->MCU_height; yindex++) {
- if (coef->iMCU_row_num < last_iMCU_row ||
- yoffset+yindex < compptr->last_row_height) {
- (*forward_DCT) (cinfo, compptr,
- input_buf[compptr->component_index],
- coef->MCU_buffer[blkn],
- ypos, xpos, (JDIMENSION) blockcnt);
- if (blockcnt < compptr->MCU_width) {
- /* Create some dummy blocks at the right edge of the image. */
- jzero_far((void FAR *) coef->MCU_buffer[blkn + blockcnt],
+ if (coef->iMCU_row_num < last_iMCU_row ||
+ yoffset+yindex < compptr->last_row_height) {
+ (*forward_DCT) (cinfo, compptr,
+ input_buf[compptr->component_index],
+ coef->MCU_buffer[blkn],
+ ypos, xpos, (JDIMENSION) blockcnt);
+ if (blockcnt < compptr->MCU_width) {
+ /* Create some dummy blocks at the right edge of the image. */
+ jzero_far((void FAR *) coef->MCU_buffer[blkn + blockcnt],
(compptr->MCU_width - blockcnt) * SIZEOF(JBLOCK));
- for (bi = blockcnt; bi < compptr->MCU_width; bi++) {
+ for (bi = blockcnt; bi < compptr->MCU_width; bi++) {
coef->MCU_buffer[blkn+bi][0][0] = coef->MCU_buffer[blkn+bi-1][0][0];
- }
- }
- } else {
- /* Create a row of dummy blocks at the bottom of the image. */
- jzero_far((void FAR *) coef->MCU_buffer[blkn],
- compptr->MCU_width * SIZEOF(JBLOCK));
- for (bi = 0; bi < compptr->MCU_width; bi++) {
- coef->MCU_buffer[blkn+bi][0][0] = coef->MCU_buffer[blkn-1][0][0];
- }
- }
- blkn += compptr->MCU_width;
- ypos += compptr->DCT_v_scaled_size;
+ }
+ }
+ } else {
+ /* Create a row of dummy blocks at the bottom of the image. */
+ jzero_far((void FAR *) coef->MCU_buffer[blkn],
+ compptr->MCU_width * SIZEOF(JBLOCK));
+ for (bi = 0; bi < compptr->MCU_width; bi++) {
+ coef->MCU_buffer[blkn+bi][0][0] = coef->MCU_buffer[blkn-1][0][0];
+ }
+ }
+ blkn += compptr->MCU_width;
+ ypos += compptr->DCT_v_scaled_size;
}
- }
- /* Try to write the MCU. In event of a suspension failure, we will
- * re-DCT the MCU on restart (a bit inefficient, could be fixed...)
- */
- if (! (*cinfo->entropy->encode_mcu) (cinfo, coef->MCU_buffer)) {
+ }
+ /* Try to write the MCU. In event of a suspension failure, we will
+ * re-DCT the MCU on restart (a bit inefficient, could be fixed...)
+ */
+ if (! (*cinfo->entropy->encode_mcu) (cinfo, coef->MCU_buffer)) {
/* Suspension forced; update state counters and exit */
coef->MCU_vert_offset = yoffset;
coef->mcu_ctr = MCU_col_num;
return FALSE;
- }
- }
- /* Completed an MCU row, but perhaps not an iMCU row */
- coef->mcu_ctr = 0;
- }
- /* Completed the iMCU row, advance counters for next one */
- coef->iMCU_row_num++;
- start_iMCU_row(cinfo);
- return TRUE;
+ }
+ }
+ /* Completed an MCU row, but perhaps not an iMCU row */
+ coef->mcu_ctr = 0;
+ }
+ /* Completed the iMCU row, advance counters for next one */
+ coef->iMCU_row_num++;
+ start_iMCU_row(cinfo);
+ return TRUE;
}
@@ -247,87 +247,87 @@ compress_data (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
METHODDEF(boolean)
compress_first_pass (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
- JDIMENSION blocks_across, MCUs_across, MCUindex;
- int bi, ci, h_samp_factor, block_row, block_rows, ndummy;
- JCOEF lastDC;
- jpeg_component_info *compptr;
- JBLOCKARRAY buffer;
- JBLOCKROW thisblockrow, lastblockrow;
- forward_DCT_ptr forward_DCT;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Align the virtual buffer for this component. */
- buffer = (*cinfo->mem->access_virt_barray)
- ((j_common_ptr) cinfo, coef->whole_image[ci],
- coef->iMCU_row_num * compptr->v_samp_factor,
- (JDIMENSION) compptr->v_samp_factor, TRUE);
- /* Count non-dummy DCT block rows in this iMCU row. */
- if (coef->iMCU_row_num < last_iMCU_row)
- block_rows = compptr->v_samp_factor;
- else {
- /* NB: can't use last_row_height here, since may not be set! */
- block_rows = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
- if (block_rows == 0) block_rows = compptr->v_samp_factor;
- }
- blocks_across = compptr->width_in_blocks;
- h_samp_factor = compptr->h_samp_factor;
- /* Count number of dummy blocks to be added at the right margin. */
- ndummy = (int) (blocks_across % h_samp_factor);
- if (ndummy > 0)
- ndummy = h_samp_factor - ndummy;
- forward_DCT = cinfo->fdct->forward_DCT[ci];
- /* Perform DCT for all non-dummy blocks in this iMCU row. Each call
- * on forward_DCT processes a complete horizontal row of DCT blocks.
- */
- for (block_row = 0; block_row < block_rows; block_row++) {
- thisblockrow = buffer[block_row];
- (*forward_DCT) (cinfo, compptr, input_buf[ci], thisblockrow,
- (JDIMENSION) (block_row * compptr->DCT_v_scaled_size),
- (JDIMENSION) 0, blocks_across);
- if (ndummy > 0) {
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
+ JDIMENSION blocks_across, MCUs_across, MCUindex;
+ int bi, ci, h_samp_factor, block_row, block_rows, ndummy;
+ JCOEF lastDC;
+ jpeg_component_info *compptr;
+ JBLOCKARRAY buffer;
+ JBLOCKROW thisblockrow, lastblockrow;
+ forward_DCT_ptr forward_DCT;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Align the virtual buffer for this component. */
+ buffer = (*cinfo->mem->access_virt_barray)
+ ((j_common_ptr) cinfo, coef->whole_image[ci],
+ coef->iMCU_row_num * compptr->v_samp_factor,
+ (JDIMENSION) compptr->v_samp_factor, TRUE);
+ /* Count non-dummy DCT block rows in this iMCU row. */
+ if (coef->iMCU_row_num < last_iMCU_row)
+ block_rows = compptr->v_samp_factor;
+ else {
+ /* NB: can't use last_row_height here, since may not be set! */
+ block_rows = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
+ if (block_rows == 0) block_rows = compptr->v_samp_factor;
+ }
+ blocks_across = compptr->width_in_blocks;
+ h_samp_factor = compptr->h_samp_factor;
+ /* Count number of dummy blocks to be added at the right margin. */
+ ndummy = (int) (blocks_across % h_samp_factor);
+ if (ndummy > 0)
+ ndummy = h_samp_factor - ndummy;
+ forward_DCT = cinfo->fdct->forward_DCT[ci];
+ /* Perform DCT for all non-dummy blocks in this iMCU row. Each call
+ * on forward_DCT processes a complete horizontal row of DCT blocks.
+ */
+ for (block_row = 0; block_row < block_rows; block_row++) {
+ thisblockrow = buffer[block_row];
+ (*forward_DCT) (cinfo, compptr, input_buf[ci], thisblockrow,
+ (JDIMENSION) (block_row * compptr->DCT_v_scaled_size),
+ (JDIMENSION) 0, blocks_across);
+ if (ndummy > 0) {
/* Create dummy blocks at the right edge of the image. */
thisblockrow += blocks_across; /* => first dummy block */
jzero_far((void FAR *) thisblockrow, ndummy * SIZEOF(JBLOCK));
lastDC = thisblockrow[-1][0];
for (bi = 0; bi < ndummy; bi++) {
- thisblockrow[bi][0] = lastDC;
+ thisblockrow[bi][0] = lastDC;
+ }
+ }
}
- }
- }
- /* If at end of image, create dummy block rows as needed.
- * The tricky part here is that within each MCU, we want the DC values
- * of the dummy blocks to match the last real block's DC value.
- * This squeezes a few more bytes out of the resulting file...
- */
- if (coef->iMCU_row_num == last_iMCU_row) {
- blocks_across += ndummy; /* include lower right corner */
- MCUs_across = blocks_across / h_samp_factor;
- for (block_row = block_rows; block_row < compptr->v_samp_factor;
- block_row++) {
+ /* If at end of image, create dummy block rows as needed.
+ * The tricky part here is that within each MCU, we want the DC values
+ * of the dummy blocks to match the last real block's DC value.
+ * This squeezes a few more bytes out of the resulting file...
+ */
+ if (coef->iMCU_row_num == last_iMCU_row) {
+ blocks_across += ndummy; /* include lower right corner */
+ MCUs_across = blocks_across / h_samp_factor;
+ for (block_row = block_rows; block_row < compptr->v_samp_factor;
+ block_row++) {
thisblockrow = buffer[block_row];
lastblockrow = buffer[block_row-1];
jzero_far((void FAR *) thisblockrow,
- (size_t) (blocks_across * SIZEOF(JBLOCK)));
+ (size_t) (blocks_across * SIZEOF(JBLOCK)));
for (MCUindex = 0; MCUindex < MCUs_across; MCUindex++) {
- lastDC = lastblockrow[h_samp_factor-1][0];
- for (bi = 0; bi < h_samp_factor; bi++) {
- thisblockrow[bi][0] = lastDC;
- }
- thisblockrow += h_samp_factor; /* advance to next MCU in row */
- lastblockrow += h_samp_factor;
+ lastDC = lastblockrow[h_samp_factor-1][0];
+ for (bi = 0; bi < h_samp_factor; bi++) {
+ thisblockrow[bi][0] = lastDC;
+ }
+ thisblockrow += h_samp_factor; /* advance to next MCU in row */
+ lastblockrow += h_samp_factor;
+ }
+ }
+ }
}
- }
- }
- }
- /* NB: compress_output will increment iMCU_row_num if successful.
- * A suspension return will result in redoing all the work above next time.
- */
-
- /* Emit data to the entropy encoder, sharing code with subsequent passes */
- return compress_output(cinfo, input_buf);
+ /* NB: compress_output will increment iMCU_row_num if successful.
+ * A suspension return will result in redoing all the work above next time.
+ */
+
+ /* Emit data to the entropy encoder, sharing code with subsequent passes */
+ return compress_output(cinfo, input_buf);
}
@@ -344,58 +344,58 @@ compress_first_pass (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
METHODDEF(boolean)
compress_output (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION MCU_col_num; /* index of current MCU within row */
- int blkn, ci, xindex, yindex, yoffset;
- JDIMENSION start_col;
- JBLOCKARRAY buffer[MAX_COMPS_IN_SCAN];
- JBLOCKROW buffer_ptr;
- jpeg_component_info *compptr;
-
- /* Align the virtual buffers for the components used in this scan.
- * NB: during first pass, this is safe only because the buffers will
- * already be aligned properly, so jmemmgr.c won't need to do any I/O.
- */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- buffer[ci] = (*cinfo->mem->access_virt_barray)
- ((j_common_ptr) cinfo, coef->whole_image[compptr->component_index],
- coef->iMCU_row_num * compptr->v_samp_factor,
- (JDIMENSION) compptr->v_samp_factor, FALSE);
- }
-
- /* Loop to process one whole iMCU row */
- for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
- yoffset++) {
- for (MCU_col_num = coef->mcu_ctr; MCU_col_num < cinfo->MCUs_per_row;
- MCU_col_num++) {
- /* Construct list of pointers to DCT blocks belonging to this MCU */
- blkn = 0; /* index of current DCT block within MCU */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION MCU_col_num; /* index of current MCU within row */
+ int blkn, ci, xindex, yindex, yoffset;
+ JDIMENSION start_col;
+ JBLOCKARRAY buffer[MAX_COMPS_IN_SCAN];
+ JBLOCKROW buffer_ptr;
+ jpeg_component_info *compptr;
+
+ /* Align the virtual buffers for the components used in this scan.
+ * NB: during first pass, this is safe only because the buffers will
+ * already be aligned properly, so jmemmgr.c won't need to do any I/O.
+ */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ buffer[ci] = (*cinfo->mem->access_virt_barray)
+ ((j_common_ptr) cinfo, coef->whole_image[compptr->component_index],
+ coef->iMCU_row_num * compptr->v_samp_factor,
+ (JDIMENSION) compptr->v_samp_factor, FALSE);
+ }
+
+ /* Loop to process one whole iMCU row */
+ for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
+ yoffset++) {
+ for (MCU_col_num = coef->mcu_ctr; MCU_col_num < cinfo->MCUs_per_row;
+ MCU_col_num++) {
+ /* Construct list of pointers to DCT blocks belonging to this MCU */
+ blkn = 0; /* index of current DCT block within MCU */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
compptr = cinfo->cur_comp_info[ci];
start_col = MCU_col_num * compptr->MCU_width;
for (yindex = 0; yindex < compptr->MCU_height; yindex++) {
- buffer_ptr = buffer[ci][yindex+yoffset] + start_col;
- for (xindex = 0; xindex < compptr->MCU_width; xindex++) {
- coef->MCU_buffer[blkn++] = buffer_ptr++;
- }
+ buffer_ptr = buffer[ci][yindex+yoffset] + start_col;
+ for (xindex = 0; xindex < compptr->MCU_width; xindex++) {
+ coef->MCU_buffer[blkn++] = buffer_ptr++;
+ }
}
- }
- /* Try to write the MCU. */
- if (! (*cinfo->entropy->encode_mcu) (cinfo, coef->MCU_buffer)) {
+ }
+ /* Try to write the MCU. */
+ if (! (*cinfo->entropy->encode_mcu) (cinfo, coef->MCU_buffer)) {
/* Suspension forced; update state counters and exit */
coef->MCU_vert_offset = yoffset;
coef->mcu_ctr = MCU_col_num;
return FALSE;
- }
- }
- /* Completed an MCU row, but perhaps not an iMCU row */
- coef->mcu_ctr = 0;
- }
- /* Completed the iMCU row, advance counters for next one */
- coef->iMCU_row_num++;
- start_iMCU_row(cinfo);
- return TRUE;
+ }
+ }
+ /* Completed an MCU row, but perhaps not an iMCU row */
+ coef->mcu_ctr = 0;
+ }
+ /* Completed the iMCU row, advance counters for next one */
+ coef->iMCU_row_num++;
+ start_iMCU_row(cinfo);
+ return TRUE;
}
#endif /* FULL_COEF_BUFFER_SUPPORTED */
@@ -408,46 +408,46 @@ compress_output (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
GLOBAL(void)
jinit_c_coef_controller (j_compress_ptr cinfo, boolean need_full_buffer)
{
- my_coef_ptr coef;
+ my_coef_ptr coef;
- coef = (my_coef_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ coef = (my_coef_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_coef_controller));
- cinfo->coef = (struct jpeg_c_coef_controller *) coef;
- coef->pub.start_pass = start_pass_coef;
+ cinfo->coef = (struct jpeg_c_coef_controller *) coef;
+ coef->pub.start_pass = start_pass_coef;
- /* Create the coefficient buffer. */
- if (need_full_buffer) {
+ /* Create the coefficient buffer. */
+ if (need_full_buffer) {
#ifdef FULL_COEF_BUFFER_SUPPORTED
- /* Allocate a full-image virtual array for each component, */
- /* padded to a multiple of samp_factor DCT blocks in each direction. */
- int ci;
- jpeg_component_info *compptr;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- coef->whole_image[ci] = (*cinfo->mem->request_virt_barray)
+ /* Allocate a full-image virtual array for each component, */
+ /* padded to a multiple of samp_factor DCT blocks in each direction. */
+ int ci;
+ jpeg_component_info *compptr;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ coef->whole_image[ci] = (*cinfo->mem->request_virt_barray)
((j_common_ptr) cinfo, JPOOL_IMAGE, FALSE,
- (JDIMENSION) jround_up((long) compptr->width_in_blocks,
+ (JDIMENSION) jround_up((long) compptr->width_in_blocks,
(long) compptr->h_samp_factor),
- (JDIMENSION) jround_up((long) compptr->height_in_blocks,
+ (JDIMENSION) jround_up((long) compptr->height_in_blocks,
(long) compptr->v_samp_factor),
- (JDIMENSION) compptr->v_samp_factor);
- }
+ (JDIMENSION) compptr->v_samp_factor);
+ }
#else
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
#endif
- } else {
- /* We only need a single-MCU buffer. */
- JBLOCKROW buffer;
- int i;
-
- buffer = (JBLOCKROW)
- (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- C_MAX_BLOCKS_IN_MCU * SIZEOF(JBLOCK));
- for (i = 0; i < C_MAX_BLOCKS_IN_MCU; i++) {
- coef->MCU_buffer[i] = buffer + i;
- }
- coef->whole_image[0] = NULL; /* flag for no virtual arrays */
- }
+ } else {
+ /* We only need a single-MCU buffer. */
+ JBLOCKROW buffer;
+ int i;
+
+ buffer = (JBLOCKROW)
+ (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ C_MAX_BLOCKS_IN_MCU * SIZEOF(JBLOCK));
+ for (i = 0; i < C_MAX_BLOCKS_IN_MCU; i++) {
+ coef->MCU_buffer[i] = buffer + i;
+ }
+ coef->whole_image[0] = NULL; /* flag for no virtual arrays */
+ }
}
diff --git a/src/lib/libjpeg/jccolor.c b/src/lib/libjpeg/jccolor.c
index 787454e2c25..14b77e0e1ac 100644
--- a/src/lib/libjpeg/jccolor.c
+++ b/src/lib/libjpeg/jccolor.c
@@ -16,10 +16,10 @@
/* Private subobject */
typedef struct {
- struct jpeg_color_converter pub; /* public fields */
+ struct jpeg_color_converter pub; /* public fields */
- /* Private state for RGB->YCC conversion */
- INT32 * rgb_ycc_tab; /* => table for RGB to YCbCr conversion */
+ /* Private state for RGB->YCC conversion */
+ INT32 * rgb_ycc_tab; /* => table for RGB to YCbCr conversion */
} my_color_converter;
typedef my_color_converter * my_cconvert_ptr;
@@ -55,10 +55,10 @@ typedef my_color_converter * my_cconvert_ptr;
* in the tables to save adding them separately in the inner loop.
*/
-#define SCALEBITS 16 /* speediest right-shift on some machines */
-#define CBCR_OFFSET ((INT32) CENTERJSAMPLE << SCALEBITS)
-#define ONE_HALF ((INT32) 1 << (SCALEBITS-1))
-#define FIX(x) ((INT32) ((x) * (1L<<SCALEBITS) + 0.5))
+#define SCALEBITS 16 /* speediest right-shift on some machines */
+#define CBCR_OFFSET ((INT32) CENTERJSAMPLE << SCALEBITS)
+#define ONE_HALF ((INT32) 1 << (SCALEBITS-1))
+#define FIX(x) ((INT32) ((x) * (1L<<SCALEBITS) + 0.5))
/* We allocate one big table and divide it up into eight parts, instead of
* doing eight alloc_small requests. This lets us use a single table base
@@ -66,16 +66,16 @@ typedef my_color_converter * my_cconvert_ptr;
* machines (more than can hold all eight addresses, anyway).
*/
-#define R_Y_OFF 0 /* offset to R => Y section */
-#define G_Y_OFF (1*(MAXJSAMPLE+1)) /* offset to G => Y section */
-#define B_Y_OFF (2*(MAXJSAMPLE+1)) /* etc. */
-#define R_CB_OFF (3*(MAXJSAMPLE+1))
-#define G_CB_OFF (4*(MAXJSAMPLE+1))
-#define B_CB_OFF (5*(MAXJSAMPLE+1))
-#define R_CR_OFF B_CB_OFF /* B=>Cb, R=>Cr are the same */
-#define G_CR_OFF (6*(MAXJSAMPLE+1))
-#define B_CR_OFF (7*(MAXJSAMPLE+1))
-#define TABLE_SIZE (8*(MAXJSAMPLE+1))
+#define R_Y_OFF 0 /* offset to R => Y section */
+#define G_Y_OFF (1*(MAXJSAMPLE+1)) /* offset to G => Y section */
+#define B_Y_OFF (2*(MAXJSAMPLE+1)) /* etc. */
+#define R_CB_OFF (3*(MAXJSAMPLE+1))
+#define G_CB_OFF (4*(MAXJSAMPLE+1))
+#define B_CB_OFF (5*(MAXJSAMPLE+1))
+#define R_CR_OFF B_CB_OFF /* B=>Cb, R=>Cr are the same */
+#define G_CR_OFF (6*(MAXJSAMPLE+1))
+#define B_CR_OFF (7*(MAXJSAMPLE+1))
+#define TABLE_SIZE (8*(MAXJSAMPLE+1))
/*
@@ -85,32 +85,32 @@ typedef my_color_converter * my_cconvert_ptr;
METHODDEF(void)
rgb_ycc_start (j_compress_ptr cinfo)
{
- my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
- INT32 * rgb_ycc_tab;
- INT32 i;
+ my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
+ INT32 * rgb_ycc_tab;
+ INT32 i;
- /* Allocate and fill in the conversion tables. */
- cconvert->rgb_ycc_tab = rgb_ycc_tab = (INT32 *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ /* Allocate and fill in the conversion tables. */
+ cconvert->rgb_ycc_tab = rgb_ycc_tab = (INT32 *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(TABLE_SIZE * SIZEOF(INT32)));
- for (i = 0; i <= MAXJSAMPLE; i++) {
- rgb_ycc_tab[i+R_Y_OFF] = FIX(0.29900) * i;
- rgb_ycc_tab[i+G_Y_OFF] = FIX(0.58700) * i;
- rgb_ycc_tab[i+B_Y_OFF] = FIX(0.11400) * i + ONE_HALF;
- rgb_ycc_tab[i+R_CB_OFF] = (-FIX(0.16874)) * i;
- rgb_ycc_tab[i+G_CB_OFF] = (-FIX(0.33126)) * i;
- /* We use a rounding fudge-factor of 0.5-epsilon for Cb and Cr.
- * This ensures that the maximum output will round to MAXJSAMPLE
- * not MAXJSAMPLE+1, and thus that we don't have to range-limit.
- */
- rgb_ycc_tab[i+B_CB_OFF] = FIX(0.50000) * i + CBCR_OFFSET + ONE_HALF-1;
+ for (i = 0; i <= MAXJSAMPLE; i++) {
+ rgb_ycc_tab[i+R_Y_OFF] = FIX(0.29900) * i;
+ rgb_ycc_tab[i+G_Y_OFF] = FIX(0.58700) * i;
+ rgb_ycc_tab[i+B_Y_OFF] = FIX(0.11400) * i + ONE_HALF;
+ rgb_ycc_tab[i+R_CB_OFF] = (-FIX(0.16874)) * i;
+ rgb_ycc_tab[i+G_CB_OFF] = (-FIX(0.33126)) * i;
+ /* We use a rounding fudge-factor of 0.5-epsilon for Cb and Cr.
+ * This ensures that the maximum output will round to MAXJSAMPLE
+ * not MAXJSAMPLE+1, and thus that we don't have to range-limit.
+ */
+ rgb_ycc_tab[i+B_CB_OFF] = FIX(0.50000) * i + CBCR_OFFSET + ONE_HALF-1;
/* B=>Cb and R=>Cr tables are the same
rgb_ycc_tab[i+R_CR_OFF] = FIX(0.50000) * i + CBCR_OFFSET + ONE_HALF-1;
*/
- rgb_ycc_tab[i+G_CR_OFF] = (-FIX(0.41869)) * i;
- rgb_ycc_tab[i+B_CR_OFF] = (-FIX(0.08131)) * i;
- }
+ rgb_ycc_tab[i+G_CR_OFF] = (-FIX(0.41869)) * i;
+ rgb_ycc_tab[i+B_CR_OFF] = (-FIX(0.08131)) * i;
+ }
}
@@ -128,47 +128,47 @@ rgb_ycc_start (j_compress_ptr cinfo)
METHODDEF(void)
rgb_ycc_convert (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
- JDIMENSION output_row, int num_rows)
+ JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
+ JDIMENSION output_row, int num_rows)
{
- my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
- register int r, g, b;
- register INT32 * ctab = cconvert->rgb_ycc_tab;
- register JSAMPROW inptr;
- register JSAMPROW outptr0, outptr1, outptr2;
- register JDIMENSION col;
- JDIMENSION num_cols = cinfo->image_width;
-
- while (--num_rows >= 0) {
- inptr = *input_buf++;
- outptr0 = output_buf[0][output_row];
- outptr1 = output_buf[1][output_row];
- outptr2 = output_buf[2][output_row];
- output_row++;
- for (col = 0; col < num_cols; col++) {
- r = GETJSAMPLE(inptr[RGB_RED]);
- g = GETJSAMPLE(inptr[RGB_GREEN]);
- b = GETJSAMPLE(inptr[RGB_BLUE]);
- inptr += RGB_PIXELSIZE;
- /* If the inputs are 0..MAXJSAMPLE, the outputs of these equations
- * must be too; we do not need an explicit range-limiting operation.
- * Hence the value being shifted is never negative, and we don't
- * need the general RIGHT_SHIFT macro.
- */
- /* Y */
- outptr0[col] = (JSAMPLE)
+ my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
+ register int r, g, b;
+ register INT32 * ctab = cconvert->rgb_ycc_tab;
+ register JSAMPROW inptr;
+ register JSAMPROW outptr0, outptr1, outptr2;
+ register JDIMENSION col;
+ JDIMENSION num_cols = cinfo->image_width;
+
+ while (--num_rows >= 0) {
+ inptr = *input_buf++;
+ outptr0 = output_buf[0][output_row];
+ outptr1 = output_buf[1][output_row];
+ outptr2 = output_buf[2][output_row];
+ output_row++;
+ for (col = 0; col < num_cols; col++) {
+ r = GETJSAMPLE(inptr[RGB_RED]);
+ g = GETJSAMPLE(inptr[RGB_GREEN]);
+ b = GETJSAMPLE(inptr[RGB_BLUE]);
+ inptr += RGB_PIXELSIZE;
+ /* If the inputs are 0..MAXJSAMPLE, the outputs of these equations
+ * must be too; we do not need an explicit range-limiting operation.
+ * Hence the value being shifted is never negative, and we don't
+ * need the general RIGHT_SHIFT macro.
+ */
+ /* Y */
+ outptr0[col] = (JSAMPLE)
((ctab[r+R_Y_OFF] + ctab[g+G_Y_OFF] + ctab[b+B_Y_OFF])
- >> SCALEBITS);
- /* Cb */
- outptr1[col] = (JSAMPLE)
+ >> SCALEBITS);
+ /* Cb */
+ outptr1[col] = (JSAMPLE)
((ctab[r+R_CB_OFF] + ctab[g+G_CB_OFF] + ctab[b+B_CB_OFF])
- >> SCALEBITS);
- /* Cr */
- outptr2[col] = (JSAMPLE)
+ >> SCALEBITS);
+ /* Cr */
+ outptr2[col] = (JSAMPLE)
((ctab[r+R_CR_OFF] + ctab[g+G_CR_OFF] + ctab[b+B_CR_OFF])
- >> SCALEBITS);
- }
- }
+ >> SCALEBITS);
+ }
+ }
}
@@ -184,32 +184,32 @@ rgb_ycc_convert (j_compress_ptr cinfo,
METHODDEF(void)
rgb_gray_convert (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
- JDIMENSION output_row, int num_rows)
+ JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
+ JDIMENSION output_row, int num_rows)
{
- my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
- register int r, g, b;
- register INT32 * ctab = cconvert->rgb_ycc_tab;
- register JSAMPROW inptr;
- register JSAMPROW outptr;
- register JDIMENSION col;
- JDIMENSION num_cols = cinfo->image_width;
-
- while (--num_rows >= 0) {
- inptr = *input_buf++;
- outptr = output_buf[0][output_row];
- output_row++;
- for (col = 0; col < num_cols; col++) {
- r = GETJSAMPLE(inptr[RGB_RED]);
- g = GETJSAMPLE(inptr[RGB_GREEN]);
- b = GETJSAMPLE(inptr[RGB_BLUE]);
- inptr += RGB_PIXELSIZE;
- /* Y */
- outptr[col] = (JSAMPLE)
+ my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
+ register int r, g, b;
+ register INT32 * ctab = cconvert->rgb_ycc_tab;
+ register JSAMPROW inptr;
+ register JSAMPROW outptr;
+ register JDIMENSION col;
+ JDIMENSION num_cols = cinfo->image_width;
+
+ while (--num_rows >= 0) {
+ inptr = *input_buf++;
+ outptr = output_buf[0][output_row];
+ output_row++;
+ for (col = 0; col < num_cols; col++) {
+ r = GETJSAMPLE(inptr[RGB_RED]);
+ g = GETJSAMPLE(inptr[RGB_GREEN]);
+ b = GETJSAMPLE(inptr[RGB_BLUE]);
+ inptr += RGB_PIXELSIZE;
+ /* Y */
+ outptr[col] = (JSAMPLE)
((ctab[r+R_Y_OFF] + ctab[g+G_Y_OFF] + ctab[b+B_Y_OFF])
- >> SCALEBITS);
- }
- }
+ >> SCALEBITS);
+ }
+ }
}
@@ -223,50 +223,50 @@ rgb_gray_convert (j_compress_ptr cinfo,
METHODDEF(void)
cmyk_ycck_convert (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
- JDIMENSION output_row, int num_rows)
+ JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
+ JDIMENSION output_row, int num_rows)
{
- my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
- register int r, g, b;
- register INT32 * ctab = cconvert->rgb_ycc_tab;
- register JSAMPROW inptr;
- register JSAMPROW outptr0, outptr1, outptr2, outptr3;
- register JDIMENSION col;
- JDIMENSION num_cols = cinfo->image_width;
-
- while (--num_rows >= 0) {
- inptr = *input_buf++;
- outptr0 = output_buf[0][output_row];
- outptr1 = output_buf[1][output_row];
- outptr2 = output_buf[2][output_row];
- outptr3 = output_buf[3][output_row];
- output_row++;
- for (col = 0; col < num_cols; col++) {
- r = MAXJSAMPLE - GETJSAMPLE(inptr[0]);
- g = MAXJSAMPLE - GETJSAMPLE(inptr[1]);
- b = MAXJSAMPLE - GETJSAMPLE(inptr[2]);
- /* K passes through as-is */
- outptr3[col] = inptr[3]; /* don't need GETJSAMPLE here */
- inptr += 4;
- /* If the inputs are 0..MAXJSAMPLE, the outputs of these equations
- * must be too; we do not need an explicit range-limiting operation.
- * Hence the value being shifted is never negative, and we don't
- * need the general RIGHT_SHIFT macro.
- */
- /* Y */
- outptr0[col] = (JSAMPLE)
+ my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
+ register int r, g, b;
+ register INT32 * ctab = cconvert->rgb_ycc_tab;
+ register JSAMPROW inptr;
+ register JSAMPROW outptr0, outptr1, outptr2, outptr3;
+ register JDIMENSION col;
+ JDIMENSION num_cols = cinfo->image_width;
+
+ while (--num_rows >= 0) {
+ inptr = *input_buf++;
+ outptr0 = output_buf[0][output_row];
+ outptr1 = output_buf[1][output_row];
+ outptr2 = output_buf[2][output_row];
+ outptr3 = output_buf[3][output_row];
+ output_row++;
+ for (col = 0; col < num_cols; col++) {
+ r = MAXJSAMPLE - GETJSAMPLE(inptr[0]);
+ g = MAXJSAMPLE - GETJSAMPLE(inptr[1]);
+ b = MAXJSAMPLE - GETJSAMPLE(inptr[2]);
+ /* K passes through as-is */
+ outptr3[col] = inptr[3]; /* don't need GETJSAMPLE here */
+ inptr += 4;
+ /* If the inputs are 0..MAXJSAMPLE, the outputs of these equations
+ * must be too; we do not need an explicit range-limiting operation.
+ * Hence the value being shifted is never negative, and we don't
+ * need the general RIGHT_SHIFT macro.
+ */
+ /* Y */
+ outptr0[col] = (JSAMPLE)
((ctab[r+R_Y_OFF] + ctab[g+G_Y_OFF] + ctab[b+B_Y_OFF])
- >> SCALEBITS);
- /* Cb */
- outptr1[col] = (JSAMPLE)
+ >> SCALEBITS);
+ /* Cb */
+ outptr1[col] = (JSAMPLE)
((ctab[r+R_CB_OFF] + ctab[g+G_CB_OFF] + ctab[b+B_CB_OFF])
- >> SCALEBITS);
- /* Cr */
- outptr2[col] = (JSAMPLE)
+ >> SCALEBITS);
+ /* Cr */
+ outptr2[col] = (JSAMPLE)
((ctab[r+R_CR_OFF] + ctab[g+G_CR_OFF] + ctab[b+B_CR_OFF])
- >> SCALEBITS);
- }
- }
+ >> SCALEBITS);
+ }
+ }
}
@@ -278,24 +278,24 @@ cmyk_ycck_convert (j_compress_ptr cinfo,
METHODDEF(void)
grayscale_convert (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
- JDIMENSION output_row, int num_rows)
+ JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
+ JDIMENSION output_row, int num_rows)
{
- register JSAMPROW inptr;
- register JSAMPROW outptr;
- register JDIMENSION col;
- JDIMENSION num_cols = cinfo->image_width;
- int instride = cinfo->input_components;
-
- while (--num_rows >= 0) {
- inptr = *input_buf++;
- outptr = output_buf[0][output_row];
- output_row++;
- for (col = 0; col < num_cols; col++) {
- outptr[col] = inptr[0]; /* don't need GETJSAMPLE() here */
- inptr += instride;
- }
- }
+ register JSAMPROW inptr;
+ register JSAMPROW outptr;
+ register JDIMENSION col;
+ JDIMENSION num_cols = cinfo->image_width;
+ int instride = cinfo->input_components;
+
+ while (--num_rows >= 0) {
+ inptr = *input_buf++;
+ outptr = output_buf[0][output_row];
+ output_row++;
+ for (col = 0; col < num_cols; col++) {
+ outptr[col] = inptr[0]; /* don't need GETJSAMPLE() here */
+ inptr += instride;
+ }
+ }
}
@@ -307,29 +307,29 @@ grayscale_convert (j_compress_ptr cinfo,
METHODDEF(void)
null_convert (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
- JDIMENSION output_row, int num_rows)
+ JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
+ JDIMENSION output_row, int num_rows)
{
- register JSAMPROW inptr;
- register JSAMPROW outptr;
- register JDIMENSION col;
- register int ci;
- int nc = cinfo->num_components;
- JDIMENSION num_cols = cinfo->image_width;
-
- while (--num_rows >= 0) {
- /* It seems fastest to make a separate pass for each component. */
- for (ci = 0; ci < nc; ci++) {
- inptr = *input_buf;
- outptr = output_buf[ci][output_row];
- for (col = 0; col < num_cols; col++) {
+ register JSAMPROW inptr;
+ register JSAMPROW outptr;
+ register JDIMENSION col;
+ register int ci;
+ int nc = cinfo->num_components;
+ JDIMENSION num_cols = cinfo->image_width;
+
+ while (--num_rows >= 0) {
+ /* It seems fastest to make a separate pass for each component. */
+ for (ci = 0; ci < nc; ci++) {
+ inptr = *input_buf;
+ outptr = output_buf[ci][output_row];
+ for (col = 0; col < num_cols; col++) {
outptr[col] = inptr[ci]; /* don't need GETJSAMPLE() here */
inptr += nc;
- }
- }
- input_buf++;
- output_row++;
- }
+ }
+ }
+ input_buf++;
+ output_row++;
+ }
}
@@ -340,7 +340,7 @@ null_convert (j_compress_ptr cinfo,
METHODDEF(void)
null_method (j_compress_ptr cinfo)
{
- /* no work needed */
+ /* no work needed */
}
@@ -351,109 +351,109 @@ null_method (j_compress_ptr cinfo)
GLOBAL(void)
jinit_color_converter (j_compress_ptr cinfo)
{
- my_cconvert_ptr cconvert;
+ my_cconvert_ptr cconvert;
- cconvert = (my_cconvert_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cconvert = (my_cconvert_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_color_converter));
- cinfo->cconvert = (struct jpeg_color_converter *) cconvert;
- /* set start_pass to null method until we find out differently */
- cconvert->pub.start_pass = null_method;
-
- /* Make sure input_components agrees with in_color_space */
- switch (cinfo->in_color_space) {
- case JCS_GRAYSCALE:
- if (cinfo->input_components != 1)
- ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
- break;
-
- case JCS_RGB:
+ cinfo->cconvert = (struct jpeg_color_converter *) cconvert;
+ /* set start_pass to null method until we find out differently */
+ cconvert->pub.start_pass = null_method;
+
+ /* Make sure input_components agrees with in_color_space */
+ switch (cinfo->in_color_space) {
+ case JCS_GRAYSCALE:
+ if (cinfo->input_components != 1)
+ ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
+ break;
+
+ case JCS_RGB:
#if RGB_PIXELSIZE != 3
- if (cinfo->input_components != RGB_PIXELSIZE)
- ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
- break;
+ if (cinfo->input_components != RGB_PIXELSIZE)
+ ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
+ break;
#endif /* else share code with YCbCr */
- case JCS_YCbCr:
- if (cinfo->input_components != 3)
- ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
- break;
-
- case JCS_CMYK:
- case JCS_YCCK:
- if (cinfo->input_components != 4)
- ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
- break;
-
- default: /* JCS_UNKNOWN can be anything */
- if (cinfo->input_components < 1)
- ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
- break;
- }
-
- /* Check num_components, set conversion method based on requested space */
- switch (cinfo->jpeg_color_space) {
- case JCS_GRAYSCALE:
- if (cinfo->num_components != 1)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- if (cinfo->in_color_space == JCS_GRAYSCALE)
- cconvert->pub.color_convert = grayscale_convert;
- else if (cinfo->in_color_space == JCS_RGB) {
- cconvert->pub.start_pass = rgb_ycc_start;
- cconvert->pub.color_convert = rgb_gray_convert;
- } else if (cinfo->in_color_space == JCS_YCbCr)
- cconvert->pub.color_convert = grayscale_convert;
- else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- case JCS_RGB:
- if (cinfo->num_components != 3)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- if (cinfo->in_color_space == JCS_RGB && RGB_PIXELSIZE == 3)
- cconvert->pub.color_convert = null_convert;
- else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- case JCS_YCbCr:
- if (cinfo->num_components != 3)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- if (cinfo->in_color_space == JCS_RGB) {
- cconvert->pub.start_pass = rgb_ycc_start;
- cconvert->pub.color_convert = rgb_ycc_convert;
- } else if (cinfo->in_color_space == JCS_YCbCr)
- cconvert->pub.color_convert = null_convert;
- else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- case JCS_CMYK:
- if (cinfo->num_components != 4)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- if (cinfo->in_color_space == JCS_CMYK)
- cconvert->pub.color_convert = null_convert;
- else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- case JCS_YCCK:
- if (cinfo->num_components != 4)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- if (cinfo->in_color_space == JCS_CMYK) {
- cconvert->pub.start_pass = rgb_ycc_start;
- cconvert->pub.color_convert = cmyk_ycck_convert;
- } else if (cinfo->in_color_space == JCS_YCCK)
- cconvert->pub.color_convert = null_convert;
- else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- default: /* allow null conversion of JCS_UNKNOWN */
- if (cinfo->jpeg_color_space != cinfo->in_color_space ||
+ case JCS_YCbCr:
+ if (cinfo->input_components != 3)
+ ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
+ break;
+
+ case JCS_CMYK:
+ case JCS_YCCK:
+ if (cinfo->input_components != 4)
+ ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
+ break;
+
+ default: /* JCS_UNKNOWN can be anything */
+ if (cinfo->input_components < 1)
+ ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
+ break;
+ }
+
+ /* Check num_components, set conversion method based on requested space */
+ switch (cinfo->jpeg_color_space) {
+ case JCS_GRAYSCALE:
+ if (cinfo->num_components != 1)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ if (cinfo->in_color_space == JCS_GRAYSCALE)
+ cconvert->pub.color_convert = grayscale_convert;
+ else if (cinfo->in_color_space == JCS_RGB) {
+ cconvert->pub.start_pass = rgb_ycc_start;
+ cconvert->pub.color_convert = rgb_gray_convert;
+ } else if (cinfo->in_color_space == JCS_YCbCr)
+ cconvert->pub.color_convert = grayscale_convert;
+ else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ case JCS_RGB:
+ if (cinfo->num_components != 3)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ if (cinfo->in_color_space == JCS_RGB && RGB_PIXELSIZE == 3)
+ cconvert->pub.color_convert = null_convert;
+ else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ case JCS_YCbCr:
+ if (cinfo->num_components != 3)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ if (cinfo->in_color_space == JCS_RGB) {
+ cconvert->pub.start_pass = rgb_ycc_start;
+ cconvert->pub.color_convert = rgb_ycc_convert;
+ } else if (cinfo->in_color_space == JCS_YCbCr)
+ cconvert->pub.color_convert = null_convert;
+ else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ case JCS_CMYK:
+ if (cinfo->num_components != 4)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ if (cinfo->in_color_space == JCS_CMYK)
+ cconvert->pub.color_convert = null_convert;
+ else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ case JCS_YCCK:
+ if (cinfo->num_components != 4)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ if (cinfo->in_color_space == JCS_CMYK) {
+ cconvert->pub.start_pass = rgb_ycc_start;
+ cconvert->pub.color_convert = cmyk_ycck_convert;
+ } else if (cinfo->in_color_space == JCS_YCCK)
+ cconvert->pub.color_convert = null_convert;
+ else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ default: /* allow null conversion of JCS_UNKNOWN */
+ if (cinfo->jpeg_color_space != cinfo->in_color_space ||
cinfo->num_components != cinfo->input_components)
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- cconvert->pub.color_convert = null_convert;
- break;
- }
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ cconvert->pub.color_convert = null_convert;
+ break;
+ }
}
diff --git a/src/lib/libjpeg/jcdctmgr.c b/src/lib/libjpeg/jcdctmgr.c
index 83bea7f5f2d..def4e1d5c12 100644
--- a/src/lib/libjpeg/jcdctmgr.c
+++ b/src/lib/libjpeg/jcdctmgr.c
@@ -14,27 +14,27 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
/* Private subobject for this module */
typedef struct {
- struct jpeg_forward_dct pub; /* public fields */
+ struct jpeg_forward_dct pub; /* public fields */
- /* Pointer to the DCT routine actually in use */
- forward_DCT_method_ptr do_dct[MAX_COMPONENTS];
+ /* Pointer to the DCT routine actually in use */
+ forward_DCT_method_ptr do_dct[MAX_COMPONENTS];
- /* The actual post-DCT divisors --- not identical to the quant table
- * entries, because of scaling (especially for an unnormalized DCT).
- * Each table is given in normal array order.
- */
- DCTELEM * divisors[NUM_QUANT_TBLS];
+ /* The actual post-DCT divisors --- not identical to the quant table
+ * entries, because of scaling (especially for an unnormalized DCT).
+ * Each table is given in normal array order.
+ */
+ DCTELEM * divisors[NUM_QUANT_TBLS];
#ifdef DCT_FLOAT_SUPPORTED
- /* Same as above for the floating-point case. */
- float_DCT_method_ptr do_float_dct[MAX_COMPONENTS];
- FAST_FLOAT * float_divisors[NUM_QUANT_TBLS];
+ /* Same as above for the floating-point case. */
+ float_DCT_method_ptr do_float_dct[MAX_COMPONENTS];
+ FAST_FLOAT * float_divisors[NUM_QUANT_TBLS];
#endif
} my_fdct_controller;
@@ -63,62 +63,62 @@ typedef my_fdct_controller * my_fdct_ptr;
METHODDEF(void)
forward_DCT (j_compress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY sample_data, JBLOCKROW coef_blocks,
- JDIMENSION start_row, JDIMENSION start_col,
- JDIMENSION num_blocks)
+ JSAMPARRAY sample_data, JBLOCKROW coef_blocks,
+ JDIMENSION start_row, JDIMENSION start_col,
+ JDIMENSION num_blocks)
/* This version is used for integer DCT implementations. */
{
- /* This routine is heavily used, so it's worth coding it tightly. */
- my_fdct_ptr fdct = (my_fdct_ptr) cinfo->fdct;
- forward_DCT_method_ptr do_dct = fdct->do_dct[compptr->component_index];
- DCTELEM * divisors = fdct->divisors[compptr->quant_tbl_no];
- DCTELEM workspace[DCTSIZE2]; /* work area for FDCT subroutine */
- JDIMENSION bi;
+ /* This routine is heavily used, so it's worth coding it tightly. */
+ my_fdct_ptr fdct = (my_fdct_ptr) cinfo->fdct;
+ forward_DCT_method_ptr do_dct = fdct->do_dct[compptr->component_index];
+ DCTELEM * divisors = fdct->divisors[compptr->quant_tbl_no];
+ DCTELEM workspace[DCTSIZE2]; /* work area for FDCT subroutine */
+ JDIMENSION bi;
- sample_data += start_row; /* fold in the vertical offset once */
+ sample_data += start_row; /* fold in the vertical offset once */
- for (bi = 0; bi < num_blocks; bi++, start_col += compptr->DCT_h_scaled_size) {
- /* Perform the DCT */
- (*do_dct) (workspace, sample_data, start_col);
+ for (bi = 0; bi < num_blocks; bi++, start_col += compptr->DCT_h_scaled_size) {
+ /* Perform the DCT */
+ (*do_dct) (workspace, sample_data, start_col);
- /* Quantize/descale the coefficients, and store into coef_blocks[] */
- { register DCTELEM temp, qval;
- register int i;
- register JCOEFPTR output_ptr = coef_blocks[bi];
+ /* Quantize/descale the coefficients, and store into coef_blocks[] */
+ { register DCTELEM temp, qval;
+ register int i;
+ register JCOEFPTR output_ptr = coef_blocks[bi];
- for (i = 0; i < DCTSIZE2; i++) {
+ for (i = 0; i < DCTSIZE2; i++) {
qval = divisors[i];
temp = workspace[i];
/* Divide the coefficient value by qval, ensuring proper rounding.
- * Since C does not specify the direction of rounding for negative
- * quotients, we have to force the dividend positive for portability.
- *
- * In most files, at least half of the output values will be zero
- * (at default quantization settings, more like three-quarters...)
- * so we should ensure that this case is fast. On many machines,
- * a comparison is enough cheaper than a divide to make a special test
- * a win. Since both inputs will be nonnegative, we need only test
- * for a < b to discover whether a/b is 0.
- * If your machine's division is fast enough, define FAST_DIVIDE.
- */
+ * Since C does not specify the direction of rounding for negative
+ * quotients, we have to force the dividend positive for portability.
+ *
+ * In most files, at least half of the output values will be zero
+ * (at default quantization settings, more like three-quarters...)
+ * so we should ensure that this case is fast. On many machines,
+ * a comparison is enough cheaper than a divide to make a special test
+ * a win. Since both inputs will be nonnegative, we need only test
+ * for a < b to discover whether a/b is 0.
+ * If your machine's division is fast enough, define FAST_DIVIDE.
+ */
#ifdef FAST_DIVIDE
-#define DIVIDE_BY(a,b) a /= b
+#define DIVIDE_BY(a,b) a /= b
#else
-#define DIVIDE_BY(a,b) if (a >= b) a /= b; else a = 0
+#define DIVIDE_BY(a,b) if (a >= b) a /= b; else a = 0
#endif
if (temp < 0) {
- temp = -temp;
- temp += qval>>1; /* for rounding */
- DIVIDE_BY(temp, qval);
- temp = -temp;
+ temp = -temp;
+ temp += qval>>1; /* for rounding */
+ DIVIDE_BY(temp, qval);
+ temp = -temp;
} else {
- temp += qval>>1; /* for rounding */
- DIVIDE_BY(temp, qval);
+ temp += qval>>1; /* for rounding */
+ DIVIDE_BY(temp, qval);
}
output_ptr[i] = (JCOEF) temp;
- }
- }
- }
+ }
+ }
+ }
}
@@ -126,42 +126,42 @@ forward_DCT (j_compress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
forward_DCT_float (j_compress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY sample_data, JBLOCKROW coef_blocks,
- JDIMENSION start_row, JDIMENSION start_col,
- JDIMENSION num_blocks)
+ JSAMPARRAY sample_data, JBLOCKROW coef_blocks,
+ JDIMENSION start_row, JDIMENSION start_col,
+ JDIMENSION num_blocks)
/* This version is used for floating-point DCT implementations. */
{
- /* This routine is heavily used, so it's worth coding it tightly. */
- my_fdct_ptr fdct = (my_fdct_ptr) cinfo->fdct;
- float_DCT_method_ptr do_dct = fdct->do_float_dct[compptr->component_index];
- FAST_FLOAT * divisors = fdct->float_divisors[compptr->quant_tbl_no];
- FAST_FLOAT workspace[DCTSIZE2]; /* work area for FDCT subroutine */
- JDIMENSION bi;
+ /* This routine is heavily used, so it's worth coding it tightly. */
+ my_fdct_ptr fdct = (my_fdct_ptr) cinfo->fdct;
+ float_DCT_method_ptr do_dct = fdct->do_float_dct[compptr->component_index];
+ FAST_FLOAT * divisors = fdct->float_divisors[compptr->quant_tbl_no];
+ FAST_FLOAT workspace[DCTSIZE2]; /* work area for FDCT subroutine */
+ JDIMENSION bi;
- sample_data += start_row; /* fold in the vertical offset once */
+ sample_data += start_row; /* fold in the vertical offset once */
- for (bi = 0; bi < num_blocks; bi++, start_col += compptr->DCT_h_scaled_size) {
- /* Perform the DCT */
- (*do_dct) (workspace, sample_data, start_col);
+ for (bi = 0; bi < num_blocks; bi++, start_col += compptr->DCT_h_scaled_size) {
+ /* Perform the DCT */
+ (*do_dct) (workspace, sample_data, start_col);
- /* Quantize/descale the coefficients, and store into coef_blocks[] */
- { register FAST_FLOAT temp;
- register int i;
- register JCOEFPTR output_ptr = coef_blocks[bi];
+ /* Quantize/descale the coefficients, and store into coef_blocks[] */
+ { register FAST_FLOAT temp;
+ register int i;
+ register JCOEFPTR output_ptr = coef_blocks[bi];
- for (i = 0; i < DCTSIZE2; i++) {
+ for (i = 0; i < DCTSIZE2; i++) {
/* Apply the quantization and scaling factor */
temp = workspace[i] * divisors[i];
/* Round to nearest integer.
- * Since C does not specify the direction of rounding for negative
- * quotients, we have to force the dividend positive for portability.
- * The maximum coefficient size is +-16K (for 12-bit data), so this
- * code should work for either 16-bit or 32-bit ints.
- */
+ * Since C does not specify the direction of rounding for negative
+ * quotients, we have to force the dividend positive for portability.
+ * The maximum coefficient size is +-16K (for 12-bit data), so this
+ * code should work for either 16-bit or 32-bit ints.
+ */
output_ptr[i] = (JCOEF) ((int) (temp + (FAST_FLOAT) 16384.5) - 16384);
- }
- }
- }
+ }
+ }
+ }
}
#endif /* DCT_FLOAT_SUPPORTED */
@@ -179,280 +179,280 @@ forward_DCT_float (j_compress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
start_pass_fdctmgr (j_compress_ptr cinfo)
{
- my_fdct_ptr fdct = (my_fdct_ptr) cinfo->fdct;
- int ci, qtblno, i;
- jpeg_component_info *compptr;
- int method = 0;
- JQUANT_TBL * qtbl;
- DCTELEM * dtbl;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Select the proper DCT routine for this component's scaling */
- switch ((compptr->DCT_h_scaled_size << 8) + compptr->DCT_v_scaled_size) {
+ my_fdct_ptr fdct = (my_fdct_ptr) cinfo->fdct;
+ int ci, qtblno, i;
+ jpeg_component_info *compptr;
+ int method = 0;
+ JQUANT_TBL * qtbl;
+ DCTELEM * dtbl;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Select the proper DCT routine for this component's scaling */
+ switch ((compptr->DCT_h_scaled_size << 8) + compptr->DCT_v_scaled_size) {
#ifdef DCT_SCALING_SUPPORTED
- case ((1 << 8) + 1):
- fdct->do_dct[ci] = jpeg_fdct_1x1;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((2 << 8) + 2):
- fdct->do_dct[ci] = jpeg_fdct_2x2;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((3 << 8) + 3):
- fdct->do_dct[ci] = jpeg_fdct_3x3;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((4 << 8) + 4):
- fdct->do_dct[ci] = jpeg_fdct_4x4;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((5 << 8) + 5):
- fdct->do_dct[ci] = jpeg_fdct_5x5;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((6 << 8) + 6):
- fdct->do_dct[ci] = jpeg_fdct_6x6;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((7 << 8) + 7):
- fdct->do_dct[ci] = jpeg_fdct_7x7;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((9 << 8) + 9):
- fdct->do_dct[ci] = jpeg_fdct_9x9;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((10 << 8) + 10):
- fdct->do_dct[ci] = jpeg_fdct_10x10;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((11 << 8) + 11):
- fdct->do_dct[ci] = jpeg_fdct_11x11;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((12 << 8) + 12):
- fdct->do_dct[ci] = jpeg_fdct_12x12;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((13 << 8) + 13):
- fdct->do_dct[ci] = jpeg_fdct_13x13;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((14 << 8) + 14):
- fdct->do_dct[ci] = jpeg_fdct_14x14;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((15 << 8) + 15):
- fdct->do_dct[ci] = jpeg_fdct_15x15;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((16 << 8) + 16):
- fdct->do_dct[ci] = jpeg_fdct_16x16;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((16 << 8) + 8):
- fdct->do_dct[ci] = jpeg_fdct_16x8;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((14 << 8) + 7):
- fdct->do_dct[ci] = jpeg_fdct_14x7;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((12 << 8) + 6):
- fdct->do_dct[ci] = jpeg_fdct_12x6;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((10 << 8) + 5):
- fdct->do_dct[ci] = jpeg_fdct_10x5;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((8 << 8) + 4):
- fdct->do_dct[ci] = jpeg_fdct_8x4;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((6 << 8) + 3):
- fdct->do_dct[ci] = jpeg_fdct_6x3;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((4 << 8) + 2):
- fdct->do_dct[ci] = jpeg_fdct_4x2;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((2 << 8) + 1):
- fdct->do_dct[ci] = jpeg_fdct_2x1;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((8 << 8) + 16):
- fdct->do_dct[ci] = jpeg_fdct_8x16;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((7 << 8) + 14):
- fdct->do_dct[ci] = jpeg_fdct_7x14;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((6 << 8) + 12):
- fdct->do_dct[ci] = jpeg_fdct_6x12;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((5 << 8) + 10):
- fdct->do_dct[ci] = jpeg_fdct_5x10;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((4 << 8) + 8):
- fdct->do_dct[ci] = jpeg_fdct_4x8;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((3 << 8) + 6):
- fdct->do_dct[ci] = jpeg_fdct_3x6;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((2 << 8) + 4):
- fdct->do_dct[ci] = jpeg_fdct_2x4;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
- case ((1 << 8) + 2):
- fdct->do_dct[ci] = jpeg_fdct_1x2;
- method = JDCT_ISLOW; /* jfdctint uses islow-style table */
- break;
+ case ((1 << 8) + 1):
+ fdct->do_dct[ci] = jpeg_fdct_1x1;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((2 << 8) + 2):
+ fdct->do_dct[ci] = jpeg_fdct_2x2;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((3 << 8) + 3):
+ fdct->do_dct[ci] = jpeg_fdct_3x3;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((4 << 8) + 4):
+ fdct->do_dct[ci] = jpeg_fdct_4x4;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((5 << 8) + 5):
+ fdct->do_dct[ci] = jpeg_fdct_5x5;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((6 << 8) + 6):
+ fdct->do_dct[ci] = jpeg_fdct_6x6;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((7 << 8) + 7):
+ fdct->do_dct[ci] = jpeg_fdct_7x7;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((9 << 8) + 9):
+ fdct->do_dct[ci] = jpeg_fdct_9x9;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((10 << 8) + 10):
+ fdct->do_dct[ci] = jpeg_fdct_10x10;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((11 << 8) + 11):
+ fdct->do_dct[ci] = jpeg_fdct_11x11;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((12 << 8) + 12):
+ fdct->do_dct[ci] = jpeg_fdct_12x12;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((13 << 8) + 13):
+ fdct->do_dct[ci] = jpeg_fdct_13x13;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((14 << 8) + 14):
+ fdct->do_dct[ci] = jpeg_fdct_14x14;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((15 << 8) + 15):
+ fdct->do_dct[ci] = jpeg_fdct_15x15;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((16 << 8) + 16):
+ fdct->do_dct[ci] = jpeg_fdct_16x16;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((16 << 8) + 8):
+ fdct->do_dct[ci] = jpeg_fdct_16x8;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((14 << 8) + 7):
+ fdct->do_dct[ci] = jpeg_fdct_14x7;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((12 << 8) + 6):
+ fdct->do_dct[ci] = jpeg_fdct_12x6;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((10 << 8) + 5):
+ fdct->do_dct[ci] = jpeg_fdct_10x5;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((8 << 8) + 4):
+ fdct->do_dct[ci] = jpeg_fdct_8x4;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((6 << 8) + 3):
+ fdct->do_dct[ci] = jpeg_fdct_6x3;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((4 << 8) + 2):
+ fdct->do_dct[ci] = jpeg_fdct_4x2;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((2 << 8) + 1):
+ fdct->do_dct[ci] = jpeg_fdct_2x1;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((8 << 8) + 16):
+ fdct->do_dct[ci] = jpeg_fdct_8x16;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((7 << 8) + 14):
+ fdct->do_dct[ci] = jpeg_fdct_7x14;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((6 << 8) + 12):
+ fdct->do_dct[ci] = jpeg_fdct_6x12;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((5 << 8) + 10):
+ fdct->do_dct[ci] = jpeg_fdct_5x10;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((4 << 8) + 8):
+ fdct->do_dct[ci] = jpeg_fdct_4x8;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((3 << 8) + 6):
+ fdct->do_dct[ci] = jpeg_fdct_3x6;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((2 << 8) + 4):
+ fdct->do_dct[ci] = jpeg_fdct_2x4;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
+ case ((1 << 8) + 2):
+ fdct->do_dct[ci] = jpeg_fdct_1x2;
+ method = JDCT_ISLOW; /* jfdctint uses islow-style table */
+ break;
#endif
- case ((DCTSIZE << 8) + DCTSIZE):
- switch (cinfo->dct_method) {
+ case ((DCTSIZE << 8) + DCTSIZE):
+ switch (cinfo->dct_method) {
#ifdef DCT_ISLOW_SUPPORTED
- case JDCT_ISLOW:
+ case JDCT_ISLOW:
fdct->do_dct[ci] = jpeg_fdct_islow;
method = JDCT_ISLOW;
break;
#endif
#ifdef DCT_IFAST_SUPPORTED
- case JDCT_IFAST:
+ case JDCT_IFAST:
fdct->do_dct[ci] = jpeg_fdct_ifast;
method = JDCT_IFAST;
break;
#endif
#ifdef DCT_FLOAT_SUPPORTED
- case JDCT_FLOAT:
+ case JDCT_FLOAT:
fdct->do_float_dct[ci] = jpeg_fdct_float;
method = JDCT_FLOAT;
break;
#endif
- default:
+ default:
ERREXIT(cinfo, JERR_NOT_COMPILED);
break;
- }
- break;
- default:
- ERREXIT2(cinfo, JERR_BAD_DCTSIZE,
- compptr->DCT_h_scaled_size, compptr->DCT_v_scaled_size);
- break;
- }
- qtblno = compptr->quant_tbl_no;
- /* Make sure specified quantization table is present */
- if (qtblno < 0 || qtblno >= NUM_QUANT_TBLS ||
+ }
+ break;
+ default:
+ ERREXIT2(cinfo, JERR_BAD_DCTSIZE,
+ compptr->DCT_h_scaled_size, compptr->DCT_v_scaled_size);
+ break;
+ }
+ qtblno = compptr->quant_tbl_no;
+ /* Make sure specified quantization table is present */
+ if (qtblno < 0 || qtblno >= NUM_QUANT_TBLS ||
cinfo->quant_tbl_ptrs[qtblno] == NULL)
- ERREXIT1(cinfo, JERR_NO_QUANT_TABLE, qtblno);
- qtbl = cinfo->quant_tbl_ptrs[qtblno];
- /* Compute divisors for this quant table */
- /* We may do this more than once for same table, but it's not a big deal */
- switch (method) {
+ ERREXIT1(cinfo, JERR_NO_QUANT_TABLE, qtblno);
+ qtbl = cinfo->quant_tbl_ptrs[qtblno];
+ /* Compute divisors for this quant table */
+ /* We may do this more than once for same table, but it's not a big deal */
+ switch (method) {
#ifdef PROVIDE_ISLOW_TABLES
- case JDCT_ISLOW:
- /* For LL&M IDCT method, divisors are equal to raw quantization
- * coefficients multiplied by 8 (to counteract scaling).
- */
- if (fdct->divisors[qtblno] == NULL) {
+ case JDCT_ISLOW:
+ /* For LL&M IDCT method, divisors are equal to raw quantization
+ * coefficients multiplied by 8 (to counteract scaling).
+ */
+ if (fdct->divisors[qtblno] == NULL) {
fdct->divisors[qtblno] = (DCTELEM *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- DCTSIZE2 * SIZEOF(DCTELEM));
- }
- dtbl = fdct->divisors[qtblno];
- for (i = 0; i < DCTSIZE2; i++) {
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ DCTSIZE2 * SIZEOF(DCTELEM));
+ }
+ dtbl = fdct->divisors[qtblno];
+ for (i = 0; i < DCTSIZE2; i++) {
dtbl[i] = ((DCTELEM) qtbl->quantval[i]) << 3;
- }
- fdct->pub.forward_DCT[ci] = forward_DCT;
- break;
+ }
+ fdct->pub.forward_DCT[ci] = forward_DCT;
+ break;
#endif
#ifdef DCT_IFAST_SUPPORTED
- case JDCT_IFAST:
- {
+ case JDCT_IFAST:
+ {
/* For AA&N IDCT method, divisors are equal to quantization
- * coefficients scaled by scalefactor[row]*scalefactor[col], where
- * scalefactor[0] = 1
- * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
- * We apply a further scale factor of 8.
- */
+ * coefficients scaled by scalefactor[row]*scalefactor[col], where
+ * scalefactor[0] = 1
+ * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
+ * We apply a further scale factor of 8.
+ */
#define CONST_BITS 14
static const INT16 aanscales[DCTSIZE2] = {
- /* precomputed values scaled up by 14 bits */
- 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
- 22725, 31521, 29692, 26722, 22725, 17855, 12299, 6270,
- 21407, 29692, 27969, 25172, 21407, 16819, 11585, 5906,
- 19266, 26722, 25172, 22654, 19266, 15137, 10426, 5315,
- 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
- 12873, 17855, 16819, 15137, 12873, 10114, 6967, 3552,
- 8867, 12299, 11585, 10426, 8867, 6967, 4799, 2446,
- 4520, 6270, 5906, 5315, 4520, 3552, 2446, 1247
+ /* precomputed values scaled up by 14 bits */
+ 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
+ 22725, 31521, 29692, 26722, 22725, 17855, 12299, 6270,
+ 21407, 29692, 27969, 25172, 21407, 16819, 11585, 5906,
+ 19266, 26722, 25172, 22654, 19266, 15137, 10426, 5315,
+ 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
+ 12873, 17855, 16819, 15137, 12873, 10114, 6967, 3552,
+ 8867, 12299, 11585, 10426, 8867, 6967, 4799, 2446,
+ 4520, 6270, 5906, 5315, 4520, 3552, 2446, 1247
};
SHIFT_TEMPS
if (fdct->divisors[qtblno] == NULL) {
- fdct->divisors[qtblno] = (DCTELEM *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ fdct->divisors[qtblno] = (DCTELEM *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
DCTSIZE2 * SIZEOF(DCTELEM));
}
dtbl = fdct->divisors[qtblno];
for (i = 0; i < DCTSIZE2; i++) {
- dtbl[i] = (DCTELEM)
- DESCALE(MULTIPLY16V16((INT32) qtbl->quantval[i],
- (INT32) aanscales[i]),
- CONST_BITS-3);
+ dtbl[i] = (DCTELEM)
+ DESCALE(MULTIPLY16V16((INT32) qtbl->quantval[i],
+ (INT32) aanscales[i]),
+ CONST_BITS-3);
}
- }
- fdct->pub.forward_DCT[ci] = forward_DCT;
- break;
+ }
+ fdct->pub.forward_DCT[ci] = forward_DCT;
+ break;
#endif
#ifdef DCT_FLOAT_SUPPORTED
- case JDCT_FLOAT:
- {
+ case JDCT_FLOAT:
+ {
/* For float AA&N IDCT method, divisors are equal to quantization
- * coefficients scaled by scalefactor[row]*scalefactor[col], where
- * scalefactor[0] = 1
- * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
- * We apply a further scale factor of 8.
- * What's actually stored is 1/divisor so that the inner loop can
- * use a multiplication rather than a division.
- */
+ * coefficients scaled by scalefactor[row]*scalefactor[col], where
+ * scalefactor[0] = 1
+ * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
+ * We apply a further scale factor of 8.
+ * What's actually stored is 1/divisor so that the inner loop can
+ * use a multiplication rather than a division.
+ */
FAST_FLOAT * fdtbl;
int row, col;
static const double aanscalefactor[DCTSIZE] = {
- 1.0, 1.387039845, 1.306562965, 1.175875602,
- 1.0, 0.785694958, 0.541196100, 0.275899379
+ 1.0, 1.387039845, 1.306562965, 1.175875602,
+ 1.0, 0.785694958, 0.541196100, 0.275899379
};
if (fdct->float_divisors[qtblno] == NULL) {
- fdct->float_divisors[qtblno] = (FAST_FLOAT *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ fdct->float_divisors[qtblno] = (FAST_FLOAT *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
DCTSIZE2 * SIZEOF(FAST_FLOAT));
}
fdtbl = fdct->float_divisors[qtblno];
i = 0;
for (row = 0; row < DCTSIZE; row++) {
- for (col = 0; col < DCTSIZE; col++) {
- fdtbl[i] = (FAST_FLOAT)
- (1.0 / (((double) qtbl->quantval[i] *
- aanscalefactor[row] * aanscalefactor[col] * 8.0)));
- i++;
- }
+ for (col = 0; col < DCTSIZE; col++) {
+ fdtbl[i] = (FAST_FLOAT)
+ (1.0 / (((double) qtbl->quantval[i] *
+ aanscalefactor[row] * aanscalefactor[col] * 8.0)));
+ i++;
+ }
}
- }
- fdct->pub.forward_DCT[ci] = forward_DCT_float;
- break;
+ }
+ fdct->pub.forward_DCT[ci] = forward_DCT_float;
+ break;
#endif
- default:
- ERREXIT(cinfo, JERR_NOT_COMPILED);
- break;
- }
- }
+ default:
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
+ break;
+ }
+ }
}
@@ -463,20 +463,20 @@ start_pass_fdctmgr (j_compress_ptr cinfo)
GLOBAL(void)
jinit_forward_dct (j_compress_ptr cinfo)
{
- my_fdct_ptr fdct;
- int i;
+ my_fdct_ptr fdct;
+ int i;
- fdct = (my_fdct_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ fdct = (my_fdct_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_fdct_controller));
- cinfo->fdct = (struct jpeg_forward_dct *) fdct;
- fdct->pub.start_pass = start_pass_fdctmgr;
+ cinfo->fdct = (struct jpeg_forward_dct *) fdct;
+ fdct->pub.start_pass = start_pass_fdctmgr;
- /* Mark divisor tables unallocated */
- for (i = 0; i < NUM_QUANT_TBLS; i++) {
- fdct->divisors[i] = NULL;
+ /* Mark divisor tables unallocated */
+ for (i = 0; i < NUM_QUANT_TBLS; i++) {
+ fdct->divisors[i] = NULL;
#ifdef DCT_FLOAT_SUPPORTED
- fdct->float_divisors[i] = NULL;
+ fdct->float_divisors[i] = NULL;
#endif
- }
+ }
}
diff --git a/src/lib/libjpeg/jchuff.c b/src/lib/libjpeg/jchuff.c
index d226a5093cf..b1d008dd5b6 100644
--- a/src/lib/libjpeg/jchuff.c
+++ b/src/lib/libjpeg/jchuff.c
@@ -40,9 +40,9 @@
/* Derived data constructed for each Huffman table */
typedef struct {
- unsigned int ehufco[256]; /* code for each symbol */
- char ehufsi[256]; /* length of code for each symbol */
- /* If no code has been allocated for a symbol S, ehufsi[S] contains 0 */
+ unsigned int ehufco[256]; /* code for each symbol */
+ char ehufsi[256]; /* length of code for each symbol */
+ /* If no code has been allocated for a symbol S, ehufsi[S] contains 0 */
} c_derived_tbl;
@@ -53,9 +53,9 @@ typedef struct {
*/
typedef struct {
- INT32 put_buffer; /* current bit-accumulation buffer */
- int put_bits; /* # of bits now in it */
- int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
+ INT32 put_buffer; /* current bit-accumulation buffer */
+ int put_bits; /* # of bits now in it */
+ int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
} savable_state;
/* This macro is to work around compilers with missing or broken
@@ -69,49 +69,49 @@ typedef struct {
#if MAX_COMPS_IN_SCAN == 4
#define ASSIGN_STATE(dest,src) \
((dest).put_buffer = (src).put_buffer, \
- (dest).put_bits = (src).put_bits, \
- (dest).last_dc_val[0] = (src).last_dc_val[0], \
- (dest).last_dc_val[1] = (src).last_dc_val[1], \
- (dest).last_dc_val[2] = (src).last_dc_val[2], \
- (dest).last_dc_val[3] = (src).last_dc_val[3])
+ (dest).put_bits = (src).put_bits, \
+ (dest).last_dc_val[0] = (src).last_dc_val[0], \
+ (dest).last_dc_val[1] = (src).last_dc_val[1], \
+ (dest).last_dc_val[2] = (src).last_dc_val[2], \
+ (dest).last_dc_val[3] = (src).last_dc_val[3])
#endif
#endif
typedef struct {
- struct jpeg_entropy_encoder pub; /* public fields */
+ struct jpeg_entropy_encoder pub; /* public fields */
- savable_state saved; /* Bit buffer & DC state at start of MCU */
+ savable_state saved; /* Bit buffer & DC state at start of MCU */
- /* These fields are NOT loaded into local working state. */
- unsigned int restarts_to_go; /* MCUs left in this restart interval */
- int next_restart_num; /* next restart number to write (0-7) */
+ /* These fields are NOT loaded into local working state. */
+ unsigned int restarts_to_go; /* MCUs left in this restart interval */
+ int next_restart_num; /* next restart number to write (0-7) */
- /* Pointers to derived tables (these workspaces have image lifespan) */
- c_derived_tbl * dc_derived_tbls[NUM_HUFF_TBLS];
- c_derived_tbl * ac_derived_tbls[NUM_HUFF_TBLS];
+ /* Pointers to derived tables (these workspaces have image lifespan) */
+ c_derived_tbl * dc_derived_tbls[NUM_HUFF_TBLS];
+ c_derived_tbl * ac_derived_tbls[NUM_HUFF_TBLS];
- /* Statistics tables for optimization */
- long * dc_count_ptrs[NUM_HUFF_TBLS];
- long * ac_count_ptrs[NUM_HUFF_TBLS];
+ /* Statistics tables for optimization */
+ long * dc_count_ptrs[NUM_HUFF_TBLS];
+ long * ac_count_ptrs[NUM_HUFF_TBLS];
- /* Following fields used only in progressive mode */
+ /* Following fields used only in progressive mode */
- /* Mode flag: TRUE for optimization, FALSE for actual data output */
- boolean gather_statistics;
+ /* Mode flag: TRUE for optimization, FALSE for actual data output */
+ boolean gather_statistics;
- /* next_output_byte/free_in_buffer are local copies of cinfo->dest fields.
- */
- JOCTET * next_output_byte; /* => next byte to write in buffer */
- size_t free_in_buffer; /* # of byte spaces remaining in buffer */
- j_compress_ptr cinfo; /* link to cinfo (needed for dump_buffer) */
+ /* next_output_byte/free_in_buffer are local copies of cinfo->dest fields.
+ */
+ JOCTET * next_output_byte; /* => next byte to write in buffer */
+ size_t free_in_buffer; /* # of byte spaces remaining in buffer */
+ j_compress_ptr cinfo; /* link to cinfo (needed for dump_buffer) */
- /* Coding status for AC components */
- int ac_tbl_no; /* the table number of the single component */
- unsigned int EOBRUN; /* run length of EOBs */
- unsigned int BE; /* # of buffered correction bits before MCU */
- char * bit_buffer; /* buffer for correction bits (1 per char) */
- /* packing correction bits tightly would save some space but cost time... */
+ /* Coding status for AC components */
+ int ac_tbl_no; /* the table number of the single component */
+ unsigned int EOBRUN; /* run length of EOBs */
+ unsigned int BE; /* # of buffered correction bits before MCU */
+ char * bit_buffer; /* buffer for correction bits (1 per char) */
+ /* packing correction bits tightly would save some space but cost time... */
} huff_entropy_encoder;
typedef huff_entropy_encoder * huff_entropy_ptr;
@@ -121,10 +121,10 @@ typedef huff_entropy_encoder * huff_entropy_ptr;
*/
typedef struct {
- JOCTET * next_output_byte; /* => next byte to write in buffer */
- size_t free_in_buffer; /* # of byte spaces remaining in buffer */
- savable_state cur; /* Current bit buffer & DC state */
- j_compress_ptr cinfo; /* dump_buffer needs access to this */
+ JOCTET * next_output_byte; /* => next byte to write in buffer */
+ size_t free_in_buffer; /* # of byte spaces remaining in buffer */
+ savable_state cur; /* Current bit buffer & DC state */
+ j_compress_ptr cinfo; /* dump_buffer needs access to this */
} working_state;
/* MAX_CORR_BITS is the number of bits the AC refinement correction-bit
@@ -133,7 +133,7 @@ typedef struct {
* The minimum safe size is 64 bits.
*/
-#define MAX_CORR_BITS 1000 /* Max # of correction bits I can buffer */
+#define MAX_CORR_BITS 1000 /* Max # of correction bits I can buffer */
/* IRIGHT_SHIFT is like RIGHT_SHIFT, but works on int rather than INT32.
* We assume that int right shift is unsigned if INT32 right shift is,
@@ -141,14 +141,14 @@ typedef struct {
*/
#ifdef RIGHT_SHIFT_IS_UNSIGNED
-#define ISHIFT_TEMPS int ishift_temp;
+#define ISHIFT_TEMPS int ishift_temp;
#define IRIGHT_SHIFT(x,shft) \
((ishift_temp = (x)) < 0 ? \
- (ishift_temp >> (shft)) | ((~0) << (16-(shft))) : \
- (ishift_temp >> (shft)))
+ (ishift_temp >> (shft)) | ((~0) << (16-(shft))) : \
+ (ishift_temp >> (shft)))
#else
#define ISHIFT_TEMPS
-#define IRIGHT_SHIFT(x,shft) ((x) >> (shft))
+#define IRIGHT_SHIFT(x,shft) ((x) >> (shft))
#endif
@@ -159,90 +159,90 @@ typedef struct {
LOCAL(void)
jpeg_make_c_derived_tbl (j_compress_ptr cinfo, boolean isDC, int tblno,
- c_derived_tbl ** pdtbl)
+ c_derived_tbl ** pdtbl)
{
- JHUFF_TBL *htbl;
- c_derived_tbl *dtbl;
- int p, i, l, lastp, si, maxsymbol;
- char huffsize[257];
- unsigned int huffcode[257];
- unsigned int code;
-
- /* Note that huffsize[] and huffcode[] are filled in code-length order,
- * paralleling the order of the symbols themselves in htbl->huffval[].
- */
-
- /* Find the input Huffman table */
- if (tblno < 0 || tblno >= NUM_HUFF_TBLS)
- ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
- htbl =
- isDC ? cinfo->dc_huff_tbl_ptrs[tblno] : cinfo->ac_huff_tbl_ptrs[tblno];
- if (htbl == NULL)
- ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
-
- /* Allocate a workspace if we haven't already done so. */
- if (*pdtbl == NULL)
- *pdtbl = (c_derived_tbl *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- SIZEOF(c_derived_tbl));
- dtbl = *pdtbl;
-
- /* Figure C.1: make table of Huffman code length for each symbol */
-
- p = 0;
- for (l = 1; l <= 16; l++) {
- i = (int) htbl->bits[l];
- if (i < 0 || p + i > 256) /* protect against table overrun */
- ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
- while (i--)
- huffsize[p++] = (char) l;
- }
- huffsize[p] = 0;
- lastp = p;
-
- /* Figure C.2: generate the codes themselves */
- /* We also validate that the counts represent a legal Huffman code tree. */
-
- code = 0;
- si = huffsize[0];
- p = 0;
- while (huffsize[p]) {
- while (((int) huffsize[p]) == si) {
- huffcode[p++] = code;
- code++;
- }
- /* code is now 1 more than the last code used for codelength si; but
- * it must still fit in si bits, since no code is allowed to be all ones.
- */
- if (((INT32) code) >= (((INT32) 1) << si))
- ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
- code <<= 1;
- si++;
- }
-
- /* Figure C.3: generate encoding tables */
- /* These are code and size indexed by symbol value */
-
- /* Set all codeless symbols to have code length 0;
- * this lets us detect duplicate VAL entries here, and later
- * allows emit_bits to detect any attempt to emit such symbols.
- */
- MEMZERO(dtbl->ehufsi, SIZEOF(dtbl->ehufsi));
-
- /* This is also a convenient place to check for out-of-range
- * and duplicated VAL entries. We allow 0..255 for AC symbols
- * but only 0..15 for DC. (We could constrain them further
- * based on data depth and mode, but this seems enough.)
- */
- maxsymbol = isDC ? 15 : 255;
-
- for (p = 0; p < lastp; p++) {
- i = htbl->huffval[p];
- if (i < 0 || i > maxsymbol || dtbl->ehufsi[i])
- ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
- dtbl->ehufco[i] = huffcode[p];
- dtbl->ehufsi[i] = huffsize[p];
- }
+ JHUFF_TBL *htbl;
+ c_derived_tbl *dtbl;
+ int p, i, l, lastp, si, maxsymbol;
+ char huffsize[257];
+ unsigned int huffcode[257];
+ unsigned int code;
+
+ /* Note that huffsize[] and huffcode[] are filled in code-length order,
+ * paralleling the order of the symbols themselves in htbl->huffval[].
+ */
+
+ /* Find the input Huffman table */
+ if (tblno < 0 || tblno >= NUM_HUFF_TBLS)
+ ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
+ htbl =
+ isDC ? cinfo->dc_huff_tbl_ptrs[tblno] : cinfo->ac_huff_tbl_ptrs[tblno];
+ if (htbl == NULL)
+ ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
+
+ /* Allocate a workspace if we haven't already done so. */
+ if (*pdtbl == NULL)
+ *pdtbl = (c_derived_tbl *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ SIZEOF(c_derived_tbl));
+ dtbl = *pdtbl;
+
+ /* Figure C.1: make table of Huffman code length for each symbol */
+
+ p = 0;
+ for (l = 1; l <= 16; l++) {
+ i = (int) htbl->bits[l];
+ if (i < 0 || p + i > 256) /* protect against table overrun */
+ ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
+ while (i--)
+ huffsize[p++] = (char) l;
+ }
+ huffsize[p] = 0;
+ lastp = p;
+
+ /* Figure C.2: generate the codes themselves */
+ /* We also validate that the counts represent a legal Huffman code tree. */
+
+ code = 0;
+ si = huffsize[0];
+ p = 0;
+ while (huffsize[p]) {
+ while (((int) huffsize[p]) == si) {
+ huffcode[p++] = code;
+ code++;
+ }
+ /* code is now 1 more than the last code used for codelength si; but
+ * it must still fit in si bits, since no code is allowed to be all ones.
+ */
+ if (((INT32) code) >= (((INT32) 1) << si))
+ ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
+ code <<= 1;
+ si++;
+ }
+
+ /* Figure C.3: generate encoding tables */
+ /* These are code and size indexed by symbol value */
+
+ /* Set all codeless symbols to have code length 0;
+ * this lets us detect duplicate VAL entries here, and later
+ * allows emit_bits to detect any attempt to emit such symbols.
+ */
+ MEMZERO(dtbl->ehufsi, SIZEOF(dtbl->ehufsi));
+
+ /* This is also a convenient place to check for out-of-range
+ * and duplicated VAL entries. We allow 0..255 for AC symbols
+ * but only 0..15 for DC. (We could constrain them further
+ * based on data depth and mode, but this seems enough.)
+ */
+ maxsymbol = isDC ? 15 : 255;
+
+ for (p = 0; p < lastp; p++) {
+ i = htbl->huffval[p];
+ if (i < 0 || i > maxsymbol || dtbl->ehufsi[i])
+ ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
+ dtbl->ehufco[i] = huffcode[p];
+ dtbl->ehufsi[i] = huffsize[p];
+ }
}
@@ -254,29 +254,29 @@ jpeg_make_c_derived_tbl (j_compress_ptr cinfo, boolean isDC, int tblno,
/* Emit a byte, taking 'action' if must suspend. */
#define emit_byte_s(state,val,action) \
{ *(state)->next_output_byte++ = (JOCTET) (val); \
- if (--(state)->free_in_buffer == 0) \
- if (! dump_buffer_s(state)) \
- { action; } }
+ if (--(state)->free_in_buffer == 0) \
+ if (! dump_buffer_s(state)) \
+ { action; } }
/* Emit a byte */
#define emit_byte_e(entropy,val) \
{ *(entropy)->next_output_byte++ = (JOCTET) (val); \
- if (--(entropy)->free_in_buffer == 0) \
- dump_buffer_e(entropy); }
+ if (--(entropy)->free_in_buffer == 0) \
+ dump_buffer_e(entropy); }
LOCAL(boolean)
dump_buffer_s (working_state * state)
/* Empty the output buffer; return TRUE if successful, FALSE if must suspend */
{
- struct jpeg_destination_mgr * dest = state->cinfo->dest;
-
- if (! (*dest->empty_output_buffer) (state->cinfo))
- return FALSE;
- /* After a successful buffer dump, must reset buffer pointers */
- state->next_output_byte = dest->next_output_byte;
- state->free_in_buffer = dest->free_in_buffer;
- return TRUE;
+ struct jpeg_destination_mgr * dest = state->cinfo->dest;
+
+ if (! (*dest->empty_output_buffer) (state->cinfo))
+ return FALSE;
+ /* After a successful buffer dump, must reset buffer pointers */
+ state->next_output_byte = dest->next_output_byte;
+ state->free_in_buffer = dest->free_in_buffer;
+ return TRUE;
}
@@ -284,13 +284,13 @@ LOCAL(void)
dump_buffer_e (huff_entropy_ptr entropy)
/* Empty the output buffer; we do not support suspension in this case. */
{
- struct jpeg_destination_mgr * dest = entropy->cinfo->dest;
+ struct jpeg_destination_mgr * dest = entropy->cinfo->dest;
- if (! (*dest->empty_output_buffer) (entropy->cinfo))
- ERREXIT(entropy->cinfo, JERR_CANT_SUSPEND);
- /* After a successful buffer dump, must reset buffer pointers */
- entropy->next_output_byte = dest->next_output_byte;
- entropy->free_in_buffer = dest->free_in_buffer;
+ if (! (*dest->empty_output_buffer) (entropy->cinfo))
+ ERREXIT(entropy->cinfo, JERR_CANT_SUSPEND);
+ /* After a successful buffer dump, must reset buffer pointers */
+ entropy->next_output_byte = dest->next_output_byte;
+ entropy->free_in_buffer = dest->free_in_buffer;
}
@@ -307,37 +307,37 @@ LOCAL(boolean)
emit_bits_s (working_state * state, unsigned int code, int size)
/* Emit some bits; return TRUE if successful, FALSE if must suspend */
{
- /* This routine is heavily used, so it's worth coding tightly. */
- register INT32 put_buffer = (INT32) code;
- register int put_bits = state->cur.put_bits;
+ /* This routine is heavily used, so it's worth coding tightly. */
+ register INT32 put_buffer = (INT32) code;
+ register int put_bits = state->cur.put_bits;
- /* if size is 0, caller used an invalid Huffman table entry */
- if (size == 0)
- ERREXIT(state->cinfo, JERR_HUFF_MISSING_CODE);
+ /* if size is 0, caller used an invalid Huffman table entry */
+ if (size == 0)
+ ERREXIT(state->cinfo, JERR_HUFF_MISSING_CODE);
- put_buffer &= (((INT32) 1)<<size) - 1; /* mask off any extra bits in code */
+ put_buffer &= (((INT32) 1)<<size) - 1; /* mask off any extra bits in code */
- put_bits += size; /* new number of bits in buffer */
+ put_bits += size; /* new number of bits in buffer */
- put_buffer <<= 24 - put_bits; /* align incoming bits */
+ put_buffer <<= 24 - put_bits; /* align incoming bits */
- put_buffer |= state->cur.put_buffer; /* and merge with old buffer contents */
+ put_buffer |= state->cur.put_buffer; /* and merge with old buffer contents */
- while (put_bits >= 8) {
- int c = (int) ((put_buffer >> 16) & 0xFF);
+ while (put_bits >= 8) {
+ int c = (int) ((put_buffer >> 16) & 0xFF);
- emit_byte_s(state, c, return FALSE);
- if (c == 0xFF) { /* need to stuff a zero byte? */
- emit_byte_s(state, 0, return FALSE);
- }
- put_buffer <<= 8;
- put_bits -= 8;
- }
+ emit_byte_s(state, c, return FALSE);
+ if (c == 0xFF) { /* need to stuff a zero byte? */
+ emit_byte_s(state, 0, return FALSE);
+ }
+ put_buffer <<= 8;
+ put_bits -= 8;
+ }
- state->cur.put_buffer = put_buffer; /* update state variables */
- state->cur.put_bits = put_bits;
+ state->cur.put_buffer = put_buffer; /* update state variables */
+ state->cur.put_bits = put_bits;
- return TRUE;
+ return TRUE;
}
@@ -346,59 +346,59 @@ LOCAL(void)
emit_bits_e (huff_entropy_ptr entropy, unsigned int code, int size)
/* Emit some bits, unless we are in gather mode */
{
- /* This routine is heavily used, so it's worth coding tightly. */
- register INT32 put_buffer = (INT32) code;
- register int put_bits = entropy->saved.put_bits;
+ /* This routine is heavily used, so it's worth coding tightly. */
+ register INT32 put_buffer = (INT32) code;
+ register int put_bits = entropy->saved.put_bits;
- /* if size is 0, caller used an invalid Huffman table entry */
- if (size == 0)
- ERREXIT(entropy->cinfo, JERR_HUFF_MISSING_CODE);
+ /* if size is 0, caller used an invalid Huffman table entry */
+ if (size == 0)
+ ERREXIT(entropy->cinfo, JERR_HUFF_MISSING_CODE);
- if (entropy->gather_statistics)
- return; /* do nothing if we're only getting stats */
+ if (entropy->gather_statistics)
+ return; /* do nothing if we're only getting stats */
- put_buffer &= (((INT32) 1)<<size) - 1; /* mask off any extra bits in code */
+ put_buffer &= (((INT32) 1)<<size) - 1; /* mask off any extra bits in code */
- put_bits += size; /* new number of bits in buffer */
+ put_bits += size; /* new number of bits in buffer */
- put_buffer <<= 24 - put_bits; /* align incoming bits */
+ put_buffer <<= 24 - put_bits; /* align incoming bits */
- /* and merge with old buffer contents */
- put_buffer |= entropy->saved.put_buffer;
+ /* and merge with old buffer contents */
+ put_buffer |= entropy->saved.put_buffer;
- while (put_bits >= 8) {
- int c = (int) ((put_buffer >> 16) & 0xFF);
+ while (put_bits >= 8) {
+ int c = (int) ((put_buffer >> 16) & 0xFF);
- emit_byte_e(entropy, c);
- if (c == 0xFF) { /* need to stuff a zero byte? */
- emit_byte_e(entropy, 0);
- }
- put_buffer <<= 8;
- put_bits -= 8;
- }
+ emit_byte_e(entropy, c);
+ if (c == 0xFF) { /* need to stuff a zero byte? */
+ emit_byte_e(entropy, 0);
+ }
+ put_buffer <<= 8;
+ put_bits -= 8;
+ }
- entropy->saved.put_buffer = put_buffer; /* update variables */
- entropy->saved.put_bits = put_bits;
+ entropy->saved.put_buffer = put_buffer; /* update variables */
+ entropy->saved.put_bits = put_bits;
}
LOCAL(boolean)
flush_bits_s (working_state * state)
{
- if (! emit_bits_s(state, 0x7F, 7)) /* fill any partial byte with ones */
- return FALSE;
- state->cur.put_buffer = 0; /* and reset bit-buffer to empty */
- state->cur.put_bits = 0;
- return TRUE;
+ if (! emit_bits_s(state, 0x7F, 7)) /* fill any partial byte with ones */
+ return FALSE;
+ state->cur.put_buffer = 0; /* and reset bit-buffer to empty */
+ state->cur.put_bits = 0;
+ return TRUE;
}
LOCAL(void)
flush_bits_e (huff_entropy_ptr entropy)
{
- emit_bits_e(entropy, 0x7F, 7); /* fill any partial byte with ones */
- entropy->saved.put_buffer = 0; /* and reset bit-buffer to empty */
- entropy->saved.put_bits = 0;
+ emit_bits_e(entropy, 0x7F, 7); /* fill any partial byte with ones */
+ entropy->saved.put_buffer = 0; /* and reset bit-buffer to empty */
+ entropy->saved.put_bits = 0;
}
@@ -410,12 +410,12 @@ flush_bits_e (huff_entropy_ptr entropy)
LOCAL(void)
emit_dc_symbol (huff_entropy_ptr entropy, int tbl_no, int symbol)
{
- if (entropy->gather_statistics)
- entropy->dc_count_ptrs[tbl_no][symbol]++;
- else {
- c_derived_tbl * tbl = entropy->dc_derived_tbls[tbl_no];
- emit_bits_e(entropy, tbl->ehufco[symbol], tbl->ehufsi[symbol]);
- }
+ if (entropy->gather_statistics)
+ entropy->dc_count_ptrs[tbl_no][symbol]++;
+ else {
+ c_derived_tbl * tbl = entropy->dc_derived_tbls[tbl_no];
+ emit_bits_e(entropy, tbl->ehufco[symbol], tbl->ehufsi[symbol]);
+ }
}
@@ -423,12 +423,12 @@ emit_dc_symbol (huff_entropy_ptr entropy, int tbl_no, int symbol)
LOCAL(void)
emit_ac_symbol (huff_entropy_ptr entropy, int tbl_no, int symbol)
{
- if (entropy->gather_statistics)
- entropy->ac_count_ptrs[tbl_no][symbol]++;
- else {
- c_derived_tbl * tbl = entropy->ac_derived_tbls[tbl_no];
- emit_bits_e(entropy, tbl->ehufco[symbol], tbl->ehufsi[symbol]);
- }
+ if (entropy->gather_statistics)
+ entropy->ac_count_ptrs[tbl_no][symbol]++;
+ else {
+ c_derived_tbl * tbl = entropy->ac_derived_tbls[tbl_no];
+ emit_bits_e(entropy, tbl->ehufco[symbol], tbl->ehufsi[symbol]);
+ }
}
@@ -438,16 +438,16 @@ emit_ac_symbol (huff_entropy_ptr entropy, int tbl_no, int symbol)
LOCAL(void)
emit_buffered_bits (huff_entropy_ptr entropy, char * bufstart,
- unsigned int nbits)
+ unsigned int nbits)
{
- if (entropy->gather_statistics)
- return; /* no real work */
-
- while (nbits > 0) {
- emit_bits_e(entropy, (unsigned int) (*bufstart), 1);
- bufstart++;
- nbits--;
- }
+ if (entropy->gather_statistics)
+ return; /* no real work */
+
+ while (nbits > 0) {
+ emit_bits_e(entropy, (unsigned int) (*bufstart), 1);
+ bufstart++;
+ nbits--;
+ }
}
@@ -458,27 +458,27 @@ emit_buffered_bits (huff_entropy_ptr entropy, char * bufstart,
LOCAL(void)
emit_eobrun (huff_entropy_ptr entropy)
{
- register int temp, nbits;
-
- if (entropy->EOBRUN > 0) { /* if there is any pending EOBRUN */
- temp = entropy->EOBRUN;
- nbits = 0;
- while ((temp >>= 1))
- nbits++;
- /* safety check: shouldn't happen given limited correction-bit buffer */
- if (nbits > 14)
- ERREXIT(entropy->cinfo, JERR_HUFF_MISSING_CODE);
-
- emit_ac_symbol(entropy, entropy->ac_tbl_no, nbits << 4);
- if (nbits)
- emit_bits_e(entropy, entropy->EOBRUN, nbits);
-
- entropy->EOBRUN = 0;
-
- /* Emit any buffered correction bits */
- emit_buffered_bits(entropy, entropy->bit_buffer, entropy->BE);
- entropy->BE = 0;
- }
+ register int temp, nbits;
+
+ if (entropy->EOBRUN > 0) { /* if there is any pending EOBRUN */
+ temp = entropy->EOBRUN;
+ nbits = 0;
+ while ((temp >>= 1))
+ nbits++;
+ /* safety check: shouldn't happen given limited correction-bit buffer */
+ if (nbits > 14)
+ ERREXIT(entropy->cinfo, JERR_HUFF_MISSING_CODE);
+
+ emit_ac_symbol(entropy, entropy->ac_tbl_no, nbits << 4);
+ if (nbits)
+ emit_bits_e(entropy, entropy->EOBRUN, nbits);
+
+ entropy->EOBRUN = 0;
+
+ /* Emit any buffered correction bits */
+ emit_buffered_bits(entropy, entropy->bit_buffer, entropy->BE);
+ entropy->BE = 0;
+ }
}
@@ -489,46 +489,46 @@ emit_eobrun (huff_entropy_ptr entropy)
LOCAL(boolean)
emit_restart_s (working_state * state, int restart_num)
{
- int ci;
+ int ci;
- if (! flush_bits_s(state))
- return FALSE;
+ if (! flush_bits_s(state))
+ return FALSE;
- emit_byte_s(state, 0xFF, return FALSE);
- emit_byte_s(state, JPEG_RST0 + restart_num, return FALSE);
+ emit_byte_s(state, 0xFF, return FALSE);
+ emit_byte_s(state, JPEG_RST0 + restart_num, return FALSE);
- /* Re-initialize DC predictions to 0 */
- for (ci = 0; ci < state->cinfo->comps_in_scan; ci++)
- state->cur.last_dc_val[ci] = 0;
+ /* Re-initialize DC predictions to 0 */
+ for (ci = 0; ci < state->cinfo->comps_in_scan; ci++)
+ state->cur.last_dc_val[ci] = 0;
- /* The restart counter is not updated until we successfully write the MCU. */
+ /* The restart counter is not updated until we successfully write the MCU. */
- return TRUE;
+ return TRUE;
}
LOCAL(void)
emit_restart_e (huff_entropy_ptr entropy, int restart_num)
{
- int ci;
-
- emit_eobrun(entropy);
-
- if (! entropy->gather_statistics) {
- flush_bits_e(entropy);
- emit_byte_e(entropy, 0xFF);
- emit_byte_e(entropy, JPEG_RST0 + restart_num);
- }
-
- if (entropy->cinfo->Ss == 0) {
- /* Re-initialize DC predictions to 0 */
- for (ci = 0; ci < entropy->cinfo->comps_in_scan; ci++)
- entropy->saved.last_dc_val[ci] = 0;
- } else {
- /* Re-initialize all AC-related fields to 0 */
- entropy->EOBRUN = 0;
- entropy->BE = 0;
- }
+ int ci;
+
+ emit_eobrun(entropy);
+
+ if (! entropy->gather_statistics) {
+ flush_bits_e(entropy);
+ emit_byte_e(entropy, 0xFF);
+ emit_byte_e(entropy, JPEG_RST0 + restart_num);
+ }
+
+ if (entropy->cinfo->Ss == 0) {
+ /* Re-initialize DC predictions to 0 */
+ for (ci = 0; ci < entropy->cinfo->comps_in_scan; ci++)
+ entropy->saved.last_dc_val[ci] = 0;
+ } else {
+ /* Re-initialize all AC-related fields to 0 */
+ entropy->EOBRUN = 0;
+ entropy->BE = 0;
+ }
}
@@ -540,82 +540,82 @@ emit_restart_e (huff_entropy_ptr entropy, int restart_num)
METHODDEF(boolean)
encode_mcu_DC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- register int temp, temp2;
- register int nbits;
- int blkn, ci;
- int Al = cinfo->Al;
- JBLOCKROW block;
- jpeg_component_info * compptr;
- ISHIFT_TEMPS
-
- entropy->next_output_byte = cinfo->dest->next_output_byte;
- entropy->free_in_buffer = cinfo->dest->free_in_buffer;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval)
- if (entropy->restarts_to_go == 0)
- emit_restart_e(entropy, entropy->next_restart_num);
-
- /* Encode the MCU data blocks */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
- ci = cinfo->MCU_membership[blkn];
- compptr = cinfo->cur_comp_info[ci];
-
- /* Compute the DC value after the required point transform by Al.
- * This is simply an arithmetic right shift.
- */
- temp2 = IRIGHT_SHIFT((int) ((*block)[0]), Al);
-
- /* DC differences are figured on the point-transformed values. */
- temp = temp2 - entropy->saved.last_dc_val[ci];
- entropy->saved.last_dc_val[ci] = temp2;
-
- /* Encode the DC coefficient difference per section G.1.2.1 */
- temp2 = temp;
- if (temp < 0) {
- temp = -temp; /* temp is abs value of input */
- /* For a negative input, want temp2 = bitwise complement of abs(input) */
- /* This code assumes we are on a two's complement machine */
- temp2--;
- }
-
- /* Find the number of bits needed for the magnitude of the coefficient */
- nbits = 0;
- while (temp) {
- nbits++;
- temp >>= 1;
- }
- /* Check for out-of-range coefficient values.
- * Since we're encoding a difference, the range limit is twice as much.
- */
- if (nbits > MAX_COEF_BITS+1)
- ERREXIT(cinfo, JERR_BAD_DCT_COEF);
-
- /* Count/emit the Huffman-coded symbol for the number of bits */
- emit_dc_symbol(entropy, compptr->dc_tbl_no, nbits);
-
- /* Emit that number of bits of the value, if positive, */
- /* or the complement of its magnitude, if negative. */
- if (nbits) /* emit_bits rejects calls with size 0 */
- emit_bits_e(entropy, (unsigned int) temp2, nbits);
- }
-
- cinfo->dest->next_output_byte = entropy->next_output_byte;
- cinfo->dest->free_in_buffer = entropy->free_in_buffer;
-
- /* Update restart-interval state too */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- return TRUE;
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ register int temp, temp2;
+ register int nbits;
+ int blkn, ci;
+ int Al = cinfo->Al;
+ JBLOCKROW block;
+ jpeg_component_info * compptr;
+ ISHIFT_TEMPS
+
+ entropy->next_output_byte = cinfo->dest->next_output_byte;
+ entropy->free_in_buffer = cinfo->dest->free_in_buffer;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval)
+ if (entropy->restarts_to_go == 0)
+ emit_restart_e(entropy, entropy->next_restart_num);
+
+ /* Encode the MCU data blocks */
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
+ ci = cinfo->MCU_membership[blkn];
+ compptr = cinfo->cur_comp_info[ci];
+
+ /* Compute the DC value after the required point transform by Al.
+ * This is simply an arithmetic right shift.
+ */
+ temp2 = IRIGHT_SHIFT((int) ((*block)[0]), Al);
+
+ /* DC differences are figured on the point-transformed values. */
+ temp = temp2 - entropy->saved.last_dc_val[ci];
+ entropy->saved.last_dc_val[ci] = temp2;
+
+ /* Encode the DC coefficient difference per section G.1.2.1 */
+ temp2 = temp;
+ if (temp < 0) {
+ temp = -temp; /* temp is abs value of input */
+ /* For a negative input, want temp2 = bitwise complement of abs(input) */
+ /* This code assumes we are on a two's complement machine */
+ temp2--;
+ }
+
+ /* Find the number of bits needed for the magnitude of the coefficient */
+ nbits = 0;
+ while (temp) {
+ nbits++;
+ temp >>= 1;
+ }
+ /* Check for out-of-range coefficient values.
+ * Since we're encoding a difference, the range limit is twice as much.
+ */
+ if (nbits > MAX_COEF_BITS+1)
+ ERREXIT(cinfo, JERR_BAD_DCT_COEF);
+
+ /* Count/emit the Huffman-coded symbol for the number of bits */
+ emit_dc_symbol(entropy, compptr->dc_tbl_no, nbits);
+
+ /* Emit that number of bits of the value, if positive, */
+ /* or the complement of its magnitude, if negative. */
+ if (nbits) /* emit_bits rejects calls with size 0 */
+ emit_bits_e(entropy, (unsigned int) temp2, nbits);
+ }
+
+ cinfo->dest->next_output_byte = entropy->next_output_byte;
+ cinfo->dest->free_in_buffer = entropy->free_in_buffer;
+
+ /* Update restart-interval state too */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ return TRUE;
}
@@ -627,105 +627,105 @@ encode_mcu_DC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
encode_mcu_AC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- register int temp, temp2;
- register int nbits;
- register int r, k;
- int Se, Al;
- const int * natural_order;
- JBLOCKROW block;
-
- entropy->next_output_byte = cinfo->dest->next_output_byte;
- entropy->free_in_buffer = cinfo->dest->free_in_buffer;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval)
- if (entropy->restarts_to_go == 0)
- emit_restart_e(entropy, entropy->next_restart_num);
-
- Se = cinfo->Se;
- Al = cinfo->Al;
- natural_order = cinfo->natural_order;
-
- /* Encode the MCU data block */
- block = MCU_data[0];
-
- /* Encode the AC coefficients per section G.1.2.2, fig. G.3 */
-
- r = 0; /* r = run length of zeros */
-
- for (k = cinfo->Ss; k <= Se; k++) {
- if ((temp = (*block)[natural_order[k]]) == 0) {
- r++;
- continue;
- }
- /* We must apply the point transform by Al. For AC coefficients this
- * is an integer division with rounding towards 0. To do this portably
- * in C, we shift after obtaining the absolute value; so the code is
- * interwoven with finding the abs value (temp) and output bits (temp2).
- */
- if (temp < 0) {
- temp = -temp; /* temp is abs value of input */
- temp >>= Al; /* apply the point transform */
- /* For a negative coef, want temp2 = bitwise complement of abs(coef) */
- temp2 = ~temp;
- } else {
- temp >>= Al; /* apply the point transform */
- temp2 = temp;
- }
- /* Watch out for case that nonzero coef is zero after point transform */
- if (temp == 0) {
- r++;
- continue;
- }
-
- /* Emit any pending EOBRUN */
- if (entropy->EOBRUN > 0)
- emit_eobrun(entropy);
- /* if run length > 15, must emit special run-length-16 codes (0xF0) */
- while (r > 15) {
- emit_ac_symbol(entropy, entropy->ac_tbl_no, 0xF0);
- r -= 16;
- }
-
- /* Find the number of bits needed for the magnitude of the coefficient */
- nbits = 1; /* there must be at least one 1 bit */
- while ((temp >>= 1))
- nbits++;
- /* Check for out-of-range coefficient values */
- if (nbits > MAX_COEF_BITS)
- ERREXIT(cinfo, JERR_BAD_DCT_COEF);
-
- /* Count/emit Huffman symbol for run length / number of bits */
- emit_ac_symbol(entropy, entropy->ac_tbl_no, (r << 4) + nbits);
-
- /* Emit that number of bits of the value, if positive, */
- /* or the complement of its magnitude, if negative. */
- emit_bits_e(entropy, (unsigned int) temp2, nbits);
-
- r = 0; /* reset zero run length */
- }
-
- if (r > 0) { /* If there are trailing zeroes, */
- entropy->EOBRUN++; /* count an EOB */
- if (entropy->EOBRUN == 0x7FFF)
- emit_eobrun(entropy); /* force it out to avoid overflow */
- }
-
- cinfo->dest->next_output_byte = entropy->next_output_byte;
- cinfo->dest->free_in_buffer = entropy->free_in_buffer;
-
- /* Update restart-interval state too */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- return TRUE;
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ register int temp, temp2;
+ register int nbits;
+ register int r, k;
+ int Se, Al;
+ const int * natural_order;
+ JBLOCKROW block;
+
+ entropy->next_output_byte = cinfo->dest->next_output_byte;
+ entropy->free_in_buffer = cinfo->dest->free_in_buffer;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval)
+ if (entropy->restarts_to_go == 0)
+ emit_restart_e(entropy, entropy->next_restart_num);
+
+ Se = cinfo->Se;
+ Al = cinfo->Al;
+ natural_order = cinfo->natural_order;
+
+ /* Encode the MCU data block */
+ block = MCU_data[0];
+
+ /* Encode the AC coefficients per section G.1.2.2, fig. G.3 */
+
+ r = 0; /* r = run length of zeros */
+
+ for (k = cinfo->Ss; k <= Se; k++) {
+ if ((temp = (*block)[natural_order[k]]) == 0) {
+ r++;
+ continue;
+ }
+ /* We must apply the point transform by Al. For AC coefficients this
+ * is an integer division with rounding towards 0. To do this portably
+ * in C, we shift after obtaining the absolute value; so the code is
+ * interwoven with finding the abs value (temp) and output bits (temp2).
+ */
+ if (temp < 0) {
+ temp = -temp; /* temp is abs value of input */
+ temp >>= Al; /* apply the point transform */
+ /* For a negative coef, want temp2 = bitwise complement of abs(coef) */
+ temp2 = ~temp;
+ } else {
+ temp >>= Al; /* apply the point transform */
+ temp2 = temp;
+ }
+ /* Watch out for case that nonzero coef is zero after point transform */
+ if (temp == 0) {
+ r++;
+ continue;
+ }
+
+ /* Emit any pending EOBRUN */
+ if (entropy->EOBRUN > 0)
+ emit_eobrun(entropy);
+ /* if run length > 15, must emit special run-length-16 codes (0xF0) */
+ while (r > 15) {
+ emit_ac_symbol(entropy, entropy->ac_tbl_no, 0xF0);
+ r -= 16;
+ }
+
+ /* Find the number of bits needed for the magnitude of the coefficient */
+ nbits = 1; /* there must be at least one 1 bit */
+ while ((temp >>= 1))
+ nbits++;
+ /* Check for out-of-range coefficient values */
+ if (nbits > MAX_COEF_BITS)
+ ERREXIT(cinfo, JERR_BAD_DCT_COEF);
+
+ /* Count/emit Huffman symbol for run length / number of bits */
+ emit_ac_symbol(entropy, entropy->ac_tbl_no, (r << 4) + nbits);
+
+ /* Emit that number of bits of the value, if positive, */
+ /* or the complement of its magnitude, if negative. */
+ emit_bits_e(entropy, (unsigned int) temp2, nbits);
+
+ r = 0; /* reset zero run length */
+ }
+
+ if (r > 0) { /* If there are trailing zeroes, */
+ entropy->EOBRUN++; /* count an EOB */
+ if (entropy->EOBRUN == 0x7FFF)
+ emit_eobrun(entropy); /* force it out to avoid overflow */
+ }
+
+ cinfo->dest->next_output_byte = entropy->next_output_byte;
+ cinfo->dest->free_in_buffer = entropy->free_in_buffer;
+
+ /* Update restart-interval state too */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ return TRUE;
}
@@ -738,43 +738,43 @@ encode_mcu_AC_first (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
encode_mcu_DC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- register int temp;
- int blkn;
- int Al = cinfo->Al;
- JBLOCKROW block;
-
- entropy->next_output_byte = cinfo->dest->next_output_byte;
- entropy->free_in_buffer = cinfo->dest->free_in_buffer;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval)
- if (entropy->restarts_to_go == 0)
- emit_restart_e(entropy, entropy->next_restart_num);
-
- /* Encode the MCU data blocks */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
-
- /* We simply emit the Al'th bit of the DC coefficient value. */
- temp = (*block)[0];
- emit_bits_e(entropy, (unsigned int) (temp >> Al), 1);
- }
-
- cinfo->dest->next_output_byte = entropy->next_output_byte;
- cinfo->dest->free_in_buffer = entropy->free_in_buffer;
-
- /* Update restart-interval state too */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- return TRUE;
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ register int temp;
+ int blkn;
+ int Al = cinfo->Al;
+ JBLOCKROW block;
+
+ entropy->next_output_byte = cinfo->dest->next_output_byte;
+ entropy->free_in_buffer = cinfo->dest->free_in_buffer;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval)
+ if (entropy->restarts_to_go == 0)
+ emit_restart_e(entropy, entropy->next_restart_num);
+
+ /* Encode the MCU data blocks */
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
+
+ /* We simply emit the Al'th bit of the DC coefficient value. */
+ temp = (*block)[0];
+ emit_bits_e(entropy, (unsigned int) (temp >> Al), 1);
+ }
+
+ cinfo->dest->next_output_byte = entropy->next_output_byte;
+ cinfo->dest->free_in_buffer = entropy->free_in_buffer;
+
+ /* Update restart-interval state too */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ return TRUE;
}
@@ -785,128 +785,128 @@ encode_mcu_DC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
encode_mcu_AC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- register int temp;
- register int r, k;
- int EOB;
- char *BR_buffer;
- unsigned int BR;
- int Se, Al;
- const int * natural_order;
- JBLOCKROW block;
- int absvalues[DCTSIZE2];
-
- entropy->next_output_byte = cinfo->dest->next_output_byte;
- entropy->free_in_buffer = cinfo->dest->free_in_buffer;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval)
- if (entropy->restarts_to_go == 0)
- emit_restart_e(entropy, entropy->next_restart_num);
-
- Se = cinfo->Se;
- Al = cinfo->Al;
- natural_order = cinfo->natural_order;
-
- /* Encode the MCU data block */
- block = MCU_data[0];
-
- /* It is convenient to make a pre-pass to determine the transformed
- * coefficients' absolute values and the EOB position.
- */
- EOB = 0;
- for (k = cinfo->Ss; k <= Se; k++) {
- temp = (*block)[natural_order[k]];
- /* We must apply the point transform by Al. For AC coefficients this
- * is an integer division with rounding towards 0. To do this portably
- * in C, we shift after obtaining the absolute value.
- */
- if (temp < 0)
- temp = -temp; /* temp is abs value of input */
- temp >>= Al; /* apply the point transform */
- absvalues[k] = temp; /* save abs value for main pass */
- if (temp == 1)
- EOB = k; /* EOB = index of last newly-nonzero coef */
- }
-
- /* Encode the AC coefficients per section G.1.2.3, fig. G.7 */
-
- r = 0; /* r = run length of zeros */
- BR = 0; /* BR = count of buffered bits added now */
- BR_buffer = entropy->bit_buffer + entropy->BE; /* Append bits to buffer */
-
- for (k = cinfo->Ss; k <= Se; k++) {
- if ((temp = absvalues[k]) == 0) {
- r++;
- continue;
- }
-
- /* Emit any required ZRLs, but not if they can be folded into EOB */
- while (r > 15 && k <= EOB) {
- /* emit any pending EOBRUN and the BE correction bits */
- emit_eobrun(entropy);
- /* Emit ZRL */
- emit_ac_symbol(entropy, entropy->ac_tbl_no, 0xF0);
- r -= 16;
- /* Emit buffered correction bits that must be associated with ZRL */
- emit_buffered_bits(entropy, BR_buffer, BR);
- BR_buffer = entropy->bit_buffer; /* BE bits are gone now */
- BR = 0;
- }
-
- /* If the coef was previously nonzero, it only needs a correction bit.
- * NOTE: a straight translation of the spec's figure G.7 would suggest
- * that we also need to test r > 15. But if r > 15, we can only get here
- * if k > EOB, which implies that this coefficient is not 1.
- */
- if (temp > 1) {
- /* The correction bit is the next bit of the absolute value. */
- BR_buffer[BR++] = (char) (temp & 1);
- continue;
- }
-
- /* Emit any pending EOBRUN and the BE correction bits */
- emit_eobrun(entropy);
-
- /* Count/emit Huffman symbol for run length / number of bits */
- emit_ac_symbol(entropy, entropy->ac_tbl_no, (r << 4) + 1);
-
- /* Emit output bit for newly-nonzero coef */
- temp = ((*block)[natural_order[k]] < 0) ? 0 : 1;
- emit_bits_e(entropy, (unsigned int) temp, 1);
-
- /* Emit buffered correction bits that must be associated with this code */
- emit_buffered_bits(entropy, BR_buffer, BR);
- BR_buffer = entropy->bit_buffer; /* BE bits are gone now */
- BR = 0;
- r = 0; /* reset zero run length */
- }
-
- if (r > 0 || BR > 0) { /* If there are trailing zeroes, */
- entropy->EOBRUN++; /* count an EOB */
- entropy->BE += BR; /* concat my correction bits to older ones */
- /* We force out the EOB if we risk either:
- * 1. overflow of the EOB counter;
- * 2. overflow of the correction bit buffer during the next MCU.
- */
- if (entropy->EOBRUN == 0x7FFF || entropy->BE > (MAX_CORR_BITS-DCTSIZE2+1))
- emit_eobrun(entropy);
- }
-
- cinfo->dest->next_output_byte = entropy->next_output_byte;
- cinfo->dest->free_in_buffer = entropy->free_in_buffer;
-
- /* Update restart-interval state too */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- return TRUE;
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ register int temp;
+ register int r, k;
+ int EOB;
+ char *BR_buffer;
+ unsigned int BR;
+ int Se, Al;
+ const int * natural_order;
+ JBLOCKROW block;
+ int absvalues[DCTSIZE2];
+
+ entropy->next_output_byte = cinfo->dest->next_output_byte;
+ entropy->free_in_buffer = cinfo->dest->free_in_buffer;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval)
+ if (entropy->restarts_to_go == 0)
+ emit_restart_e(entropy, entropy->next_restart_num);
+
+ Se = cinfo->Se;
+ Al = cinfo->Al;
+ natural_order = cinfo->natural_order;
+
+ /* Encode the MCU data block */
+ block = MCU_data[0];
+
+ /* It is convenient to make a pre-pass to determine the transformed
+ * coefficients' absolute values and the EOB position.
+ */
+ EOB = 0;
+ for (k = cinfo->Ss; k <= Se; k++) {
+ temp = (*block)[natural_order[k]];
+ /* We must apply the point transform by Al. For AC coefficients this
+ * is an integer division with rounding towards 0. To do this portably
+ * in C, we shift after obtaining the absolute value.
+ */
+ if (temp < 0)
+ temp = -temp; /* temp is abs value of input */
+ temp >>= Al; /* apply the point transform */
+ absvalues[k] = temp; /* save abs value for main pass */
+ if (temp == 1)
+ EOB = k; /* EOB = index of last newly-nonzero coef */
+ }
+
+ /* Encode the AC coefficients per section G.1.2.3, fig. G.7 */
+
+ r = 0; /* r = run length of zeros */
+ BR = 0; /* BR = count of buffered bits added now */
+ BR_buffer = entropy->bit_buffer + entropy->BE; /* Append bits to buffer */
+
+ for (k = cinfo->Ss; k <= Se; k++) {
+ if ((temp = absvalues[k]) == 0) {
+ r++;
+ continue;
+ }
+
+ /* Emit any required ZRLs, but not if they can be folded into EOB */
+ while (r > 15 && k <= EOB) {
+ /* emit any pending EOBRUN and the BE correction bits */
+ emit_eobrun(entropy);
+ /* Emit ZRL */
+ emit_ac_symbol(entropy, entropy->ac_tbl_no, 0xF0);
+ r -= 16;
+ /* Emit buffered correction bits that must be associated with ZRL */
+ emit_buffered_bits(entropy, BR_buffer, BR);
+ BR_buffer = entropy->bit_buffer; /* BE bits are gone now */
+ BR = 0;
+ }
+
+ /* If the coef was previously nonzero, it only needs a correction bit.
+ * NOTE: a straight translation of the spec's figure G.7 would suggest
+ * that we also need to test r > 15. But if r > 15, we can only get here
+ * if k > EOB, which implies that this coefficient is not 1.
+ */
+ if (temp > 1) {
+ /* The correction bit is the next bit of the absolute value. */
+ BR_buffer[BR++] = (char) (temp & 1);
+ continue;
+ }
+
+ /* Emit any pending EOBRUN and the BE correction bits */
+ emit_eobrun(entropy);
+
+ /* Count/emit Huffman symbol for run length / number of bits */
+ emit_ac_symbol(entropy, entropy->ac_tbl_no, (r << 4) + 1);
+
+ /* Emit output bit for newly-nonzero coef */
+ temp = ((*block)[natural_order[k]] < 0) ? 0 : 1;
+ emit_bits_e(entropy, (unsigned int) temp, 1);
+
+ /* Emit buffered correction bits that must be associated with this code */
+ emit_buffered_bits(entropy, BR_buffer, BR);
+ BR_buffer = entropy->bit_buffer; /* BE bits are gone now */
+ BR = 0;
+ r = 0; /* reset zero run length */
+ }
+
+ if (r > 0 || BR > 0) { /* If there are trailing zeroes, */
+ entropy->EOBRUN++; /* count an EOB */
+ entropy->BE += BR; /* concat my correction bits to older ones */
+ /* We force out the EOB if we risk either:
+ * 1. overflow of the EOB counter;
+ * 2. overflow of the correction bit buffer during the next MCU.
+ */
+ if (entropy->EOBRUN == 0x7FFF || entropy->BE > (MAX_CORR_BITS-DCTSIZE2+1))
+ emit_eobrun(entropy);
+ }
+
+ cinfo->dest->next_output_byte = entropy->next_output_byte;
+ cinfo->dest->free_in_buffer = entropy->free_in_buffer;
+
+ /* Update restart-interval state too */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ return TRUE;
}
@@ -914,97 +914,97 @@ encode_mcu_AC_refine (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
LOCAL(boolean)
encode_one_block (working_state * state, JCOEFPTR block, int last_dc_val,
- c_derived_tbl *dctbl, c_derived_tbl *actbl)
+ c_derived_tbl *dctbl, c_derived_tbl *actbl)
{
- register int temp, temp2;
- register int nbits;
- register int k, r, i;
- int Se = state->cinfo->lim_Se;
- const int * natural_order = state->cinfo->natural_order;
-
- /* Encode the DC coefficient difference per section F.1.2.1 */
-
- temp = temp2 = block[0] - last_dc_val;
-
- if (temp < 0) {
- temp = -temp; /* temp is abs value of input */
- /* For a negative input, want temp2 = bitwise complement of abs(input) */
- /* This code assumes we are on a two's complement machine */
- temp2--;
- }
-
- /* Find the number of bits needed for the magnitude of the coefficient */
- nbits = 0;
- while (temp) {
- nbits++;
- temp >>= 1;
- }
- /* Check for out-of-range coefficient values.
- * Since we're encoding a difference, the range limit is twice as much.
- */
- if (nbits > MAX_COEF_BITS+1)
- ERREXIT(state->cinfo, JERR_BAD_DCT_COEF);
-
- /* Emit the Huffman-coded symbol for the number of bits */
- if (! emit_bits_s(state, dctbl->ehufco[nbits], dctbl->ehufsi[nbits]))
- return FALSE;
-
- /* Emit that number of bits of the value, if positive, */
- /* or the complement of its magnitude, if negative. */
- if (nbits) /* emit_bits rejects calls with size 0 */
- if (! emit_bits_s(state, (unsigned int) temp2, nbits))
- return FALSE;
-
- /* Encode the AC coefficients per section F.1.2.2 */
-
- r = 0; /* r = run length of zeros */
-
- for (k = 1; k <= Se; k++) {
- if ((temp = block[natural_order[k]]) == 0) {
- r++;
- } else {
- /* if run length > 15, must emit special run-length-16 codes (0xF0) */
- while (r > 15) {
+ register int temp, temp2;
+ register int nbits;
+ register int k, r, i;
+ int Se = state->cinfo->lim_Se;
+ const int * natural_order = state->cinfo->natural_order;
+
+ /* Encode the DC coefficient difference per section F.1.2.1 */
+
+ temp = temp2 = block[0] - last_dc_val;
+
+ if (temp < 0) {
+ temp = -temp; /* temp is abs value of input */
+ /* For a negative input, want temp2 = bitwise complement of abs(input) */
+ /* This code assumes we are on a two's complement machine */
+ temp2--;
+ }
+
+ /* Find the number of bits needed for the magnitude of the coefficient */
+ nbits = 0;
+ while (temp) {
+ nbits++;
+ temp >>= 1;
+ }
+ /* Check for out-of-range coefficient values.
+ * Since we're encoding a difference, the range limit is twice as much.
+ */
+ if (nbits > MAX_COEF_BITS+1)
+ ERREXIT(state->cinfo, JERR_BAD_DCT_COEF);
+
+ /* Emit the Huffman-coded symbol for the number of bits */
+ if (! emit_bits_s(state, dctbl->ehufco[nbits], dctbl->ehufsi[nbits]))
+ return FALSE;
+
+ /* Emit that number of bits of the value, if positive, */
+ /* or the complement of its magnitude, if negative. */
+ if (nbits) /* emit_bits rejects calls with size 0 */
+ if (! emit_bits_s(state, (unsigned int) temp2, nbits))
+ return FALSE;
+
+ /* Encode the AC coefficients per section F.1.2.2 */
+
+ r = 0; /* r = run length of zeros */
+
+ for (k = 1; k <= Se; k++) {
+ if ((temp = block[natural_order[k]]) == 0) {
+ r++;
+ } else {
+ /* if run length > 15, must emit special run-length-16 codes (0xF0) */
+ while (r > 15) {
if (! emit_bits_s(state, actbl->ehufco[0xF0], actbl->ehufsi[0xF0]))
- return FALSE;
+ return FALSE;
r -= 16;
- }
+ }
- temp2 = temp;
- if (temp < 0) {
- temp = -temp; /* temp is abs value of input */
+ temp2 = temp;
+ if (temp < 0) {
+ temp = -temp; /* temp is abs value of input */
/* This code assumes we are on a two's complement machine */
temp2--;
- }
+ }
- /* Find the number of bits needed for the magnitude of the coefficient */
- nbits = 1; /* there must be at least one 1 bit */
- while ((temp >>= 1))
+ /* Find the number of bits needed for the magnitude of the coefficient */
+ nbits = 1; /* there must be at least one 1 bit */
+ while ((temp >>= 1))
nbits++;
- /* Check for out-of-range coefficient values */
- if (nbits > MAX_COEF_BITS)
+ /* Check for out-of-range coefficient values */
+ if (nbits > MAX_COEF_BITS)
ERREXIT(state->cinfo, JERR_BAD_DCT_COEF);
- /* Emit Huffman symbol for run length / number of bits */
- i = (r << 4) + nbits;
- if (! emit_bits_s(state, actbl->ehufco[i], actbl->ehufsi[i]))
+ /* Emit Huffman symbol for run length / number of bits */
+ i = (r << 4) + nbits;
+ if (! emit_bits_s(state, actbl->ehufco[i], actbl->ehufsi[i]))
return FALSE;
- /* Emit that number of bits of the value, if positive, */
- /* or the complement of its magnitude, if negative. */
- if (! emit_bits_s(state, (unsigned int) temp2, nbits))
+ /* Emit that number of bits of the value, if positive, */
+ /* or the complement of its magnitude, if negative. */
+ if (! emit_bits_s(state, (unsigned int) temp2, nbits))
return FALSE;
- r = 0;
- }
- }
+ r = 0;
+ }
+ }
- /* If the last coef(s) were zero, emit an end-of-block code */
- if (r > 0)
- if (! emit_bits_s(state, actbl->ehufco[0], actbl->ehufsi[0]))
- return FALSE;
+ /* If the last coef(s) were zero, emit an end-of-block code */
+ if (r > 0)
+ if (! emit_bits_s(state, actbl->ehufco[0], actbl->ehufsi[0]))
+ return FALSE;
- return TRUE;
+ return TRUE;
}
@@ -1015,53 +1015,53 @@ encode_one_block (working_state * state, JCOEFPTR block, int last_dc_val,
METHODDEF(boolean)
encode_mcu_huff (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- working_state state;
- int blkn, ci;
- jpeg_component_info * compptr;
-
- /* Load up working state */
- state.next_output_byte = cinfo->dest->next_output_byte;
- state.free_in_buffer = cinfo->dest->free_in_buffer;
- ASSIGN_STATE(state.cur, entropy->saved);
- state.cinfo = cinfo;
-
- /* Emit restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- if (! emit_restart_s(&state, entropy->next_restart_num))
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ working_state state;
+ int blkn, ci;
+ jpeg_component_info * compptr;
+
+ /* Load up working state */
+ state.next_output_byte = cinfo->dest->next_output_byte;
+ state.free_in_buffer = cinfo->dest->free_in_buffer;
+ ASSIGN_STATE(state.cur, entropy->saved);
+ state.cinfo = cinfo;
+
+ /* Emit restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ if (! emit_restart_s(&state, entropy->next_restart_num))
return FALSE;
- }
-
- /* Encode the MCU data blocks */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- ci = cinfo->MCU_membership[blkn];
- compptr = cinfo->cur_comp_info[ci];
- if (! encode_one_block(&state,
- MCU_data[blkn][0], state.cur.last_dc_val[ci],
- entropy->dc_derived_tbls[compptr->dc_tbl_no],
- entropy->ac_derived_tbls[compptr->ac_tbl_no]))
- return FALSE;
- /* Update last_dc_val */
- state.cur.last_dc_val[ci] = MCU_data[blkn][0][0];
- }
-
- /* Completed MCU, so update state */
- cinfo->dest->next_output_byte = state.next_output_byte;
- cinfo->dest->free_in_buffer = state.free_in_buffer;
- ASSIGN_STATE(entropy->saved, state.cur);
-
- /* Update restart-interval state too */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num++;
- entropy->next_restart_num &= 7;
- }
- entropy->restarts_to_go--;
- }
-
- return TRUE;
+ }
+
+ /* Encode the MCU data blocks */
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ ci = cinfo->MCU_membership[blkn];
+ compptr = cinfo->cur_comp_info[ci];
+ if (! encode_one_block(&state,
+ MCU_data[blkn][0], state.cur.last_dc_val[ci],
+ entropy->dc_derived_tbls[compptr->dc_tbl_no],
+ entropy->ac_derived_tbls[compptr->ac_tbl_no]))
+ return FALSE;
+ /* Update last_dc_val */
+ state.cur.last_dc_val[ci] = MCU_data[blkn][0][0];
+ }
+
+ /* Completed MCU, so update state */
+ cinfo->dest->next_output_byte = state.next_output_byte;
+ cinfo->dest->free_in_buffer = state.free_in_buffer;
+ ASSIGN_STATE(entropy->saved, state.cur);
+
+ /* Update restart-interval state too */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num++;
+ entropy->next_restart_num &= 7;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ return TRUE;
}
@@ -1072,35 +1072,35 @@ encode_mcu_huff (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(void)
finish_pass_huff (j_compress_ptr cinfo)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- working_state state;
-
- if (cinfo->progressive_mode) {
- entropy->next_output_byte = cinfo->dest->next_output_byte;
- entropy->free_in_buffer = cinfo->dest->free_in_buffer;
-
- /* Flush out any buffered data */
- emit_eobrun(entropy);
- flush_bits_e(entropy);
-
- cinfo->dest->next_output_byte = entropy->next_output_byte;
- cinfo->dest->free_in_buffer = entropy->free_in_buffer;
- } else {
- /* Load up working state ... flush_bits needs it */
- state.next_output_byte = cinfo->dest->next_output_byte;
- state.free_in_buffer = cinfo->dest->free_in_buffer;
- ASSIGN_STATE(state.cur, entropy->saved);
- state.cinfo = cinfo;
-
- /* Flush out the last data */
- if (! flush_bits_s(&state))
- ERREXIT(cinfo, JERR_CANT_SUSPEND);
-
- /* Update state */
- cinfo->dest->next_output_byte = state.next_output_byte;
- cinfo->dest->free_in_buffer = state.free_in_buffer;
- ASSIGN_STATE(entropy->saved, state.cur);
- }
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ working_state state;
+
+ if (cinfo->progressive_mode) {
+ entropy->next_output_byte = cinfo->dest->next_output_byte;
+ entropy->free_in_buffer = cinfo->dest->free_in_buffer;
+
+ /* Flush out any buffered data */
+ emit_eobrun(entropy);
+ flush_bits_e(entropy);
+
+ cinfo->dest->next_output_byte = entropy->next_output_byte;
+ cinfo->dest->free_in_buffer = entropy->free_in_buffer;
+ } else {
+ /* Load up working state ... flush_bits needs it */
+ state.next_output_byte = cinfo->dest->next_output_byte;
+ state.free_in_buffer = cinfo->dest->free_in_buffer;
+ ASSIGN_STATE(state.cur, entropy->saved);
+ state.cinfo = cinfo;
+
+ /* Flush out the last data */
+ if (! flush_bits_s(&state))
+ ERREXIT(cinfo, JERR_CANT_SUSPEND);
+
+ /* Update state */
+ cinfo->dest->next_output_byte = state.next_output_byte;
+ cinfo->dest->free_in_buffer = state.free_in_buffer;
+ ASSIGN_STATE(entropy->saved, state.cur);
+ }
}
@@ -1120,71 +1120,71 @@ finish_pass_huff (j_compress_ptr cinfo)
LOCAL(void)
htest_one_block (j_compress_ptr cinfo, JCOEFPTR block, int last_dc_val,
- long dc_counts[], long ac_counts[])
+ long dc_counts[], long ac_counts[])
{
- register int temp;
- register int nbits;
- register int k, r;
- int Se = cinfo->lim_Se;
- const int * natural_order = cinfo->natural_order;
-
- /* Encode the DC coefficient difference per section F.1.2.1 */
-
- temp = block[0] - last_dc_val;
- if (temp < 0)
- temp = -temp;
-
- /* Find the number of bits needed for the magnitude of the coefficient */
- nbits = 0;
- while (temp) {
- nbits++;
- temp >>= 1;
- }
- /* Check for out-of-range coefficient values.
- * Since we're encoding a difference, the range limit is twice as much.
- */
- if (nbits > MAX_COEF_BITS+1)
- ERREXIT(cinfo, JERR_BAD_DCT_COEF);
-
- /* Count the Huffman symbol for the number of bits */
- dc_counts[nbits]++;
-
- /* Encode the AC coefficients per section F.1.2.2 */
-
- r = 0; /* r = run length of zeros */
-
- for (k = 1; k <= Se; k++) {
- if ((temp = block[natural_order[k]]) == 0) {
- r++;
- } else {
- /* if run length > 15, must emit special run-length-16 codes (0xF0) */
- while (r > 15) {
+ register int temp;
+ register int nbits;
+ register int k, r;
+ int Se = cinfo->lim_Se;
+ const int * natural_order = cinfo->natural_order;
+
+ /* Encode the DC coefficient difference per section F.1.2.1 */
+
+ temp = block[0] - last_dc_val;
+ if (temp < 0)
+ temp = -temp;
+
+ /* Find the number of bits needed for the magnitude of the coefficient */
+ nbits = 0;
+ while (temp) {
+ nbits++;
+ temp >>= 1;
+ }
+ /* Check for out-of-range coefficient values.
+ * Since we're encoding a difference, the range limit is twice as much.
+ */
+ if (nbits > MAX_COEF_BITS+1)
+ ERREXIT(cinfo, JERR_BAD_DCT_COEF);
+
+ /* Count the Huffman symbol for the number of bits */
+ dc_counts[nbits]++;
+
+ /* Encode the AC coefficients per section F.1.2.2 */
+
+ r = 0; /* r = run length of zeros */
+
+ for (k = 1; k <= Se; k++) {
+ if ((temp = block[natural_order[k]]) == 0) {
+ r++;
+ } else {
+ /* if run length > 15, must emit special run-length-16 codes (0xF0) */
+ while (r > 15) {
ac_counts[0xF0]++;
r -= 16;
- }
+ }
- /* Find the number of bits needed for the magnitude of the coefficient */
- if (temp < 0)
+ /* Find the number of bits needed for the magnitude of the coefficient */
+ if (temp < 0)
temp = -temp;
- /* Find the number of bits needed for the magnitude of the coefficient */
- nbits = 1; /* there must be at least one 1 bit */
- while ((temp >>= 1))
+ /* Find the number of bits needed for the magnitude of the coefficient */
+ nbits = 1; /* there must be at least one 1 bit */
+ while ((temp >>= 1))
nbits++;
- /* Check for out-of-range coefficient values */
- if (nbits > MAX_COEF_BITS)
+ /* Check for out-of-range coefficient values */
+ if (nbits > MAX_COEF_BITS)
ERREXIT(cinfo, JERR_BAD_DCT_COEF);
- /* Count Huffman symbol for run length / number of bits */
- ac_counts[(r << 4) + nbits]++;
+ /* Count Huffman symbol for run length / number of bits */
+ ac_counts[(r << 4) + nbits]++;
- r = 0;
- }
- }
+ r = 0;
+ }
+ }
- /* If the last coef(s) were zero, emit an end-of-block code */
- if (r > 0)
- ac_counts[0]++;
+ /* If the last coef(s) were zero, emit an end-of-block code */
+ if (r > 0)
+ ac_counts[0]++;
}
@@ -1196,32 +1196,32 @@ htest_one_block (j_compress_ptr cinfo, JCOEFPTR block, int last_dc_val,
METHODDEF(boolean)
encode_mcu_gather (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int blkn, ci;
- jpeg_component_info * compptr;
-
- /* Take care of restart intervals if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0) {
- /* Re-initialize DC predictions to 0 */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++)
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int blkn, ci;
+ jpeg_component_info * compptr;
+
+ /* Take care of restart intervals if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0) {
+ /* Re-initialize DC predictions to 0 */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++)
entropy->saved.last_dc_val[ci] = 0;
- /* Update restart state */
- entropy->restarts_to_go = cinfo->restart_interval;
- }
- entropy->restarts_to_go--;
- }
-
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- ci = cinfo->MCU_membership[blkn];
- compptr = cinfo->cur_comp_info[ci];
- htest_one_block(cinfo, MCU_data[blkn][0], entropy->saved.last_dc_val[ci],
- entropy->dc_count_ptrs[compptr->dc_tbl_no],
- entropy->ac_count_ptrs[compptr->ac_tbl_no]);
- entropy->saved.last_dc_val[ci] = MCU_data[blkn][0][0];
- }
-
- return TRUE;
+ /* Update restart state */
+ entropy->restarts_to_go = cinfo->restart_interval;
+ }
+ entropy->restarts_to_go--;
+ }
+
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ ci = cinfo->MCU_membership[blkn];
+ compptr = cinfo->cur_comp_info[ci];
+ htest_one_block(cinfo, MCU_data[blkn][0], entropy->saved.last_dc_val[ci],
+ entropy->dc_count_ptrs[compptr->dc_tbl_no],
+ entropy->ac_count_ptrs[compptr->ac_tbl_no]);
+ entropy->saved.last_dc_val[ci] = MCU_data[blkn][0][0];
+ }
+
+ return TRUE;
}
@@ -1255,137 +1255,137 @@ encode_mcu_gather (j_compress_ptr cinfo, JBLOCKROW *MCU_data)
LOCAL(void)
jpeg_gen_optimal_table (j_compress_ptr cinfo, JHUFF_TBL * htbl, long freq[])
{
-#define MAX_CLEN 32 /* assumed maximum initial code length */
- UINT8 bits[MAX_CLEN+1]; /* bits[k] = # of symbols with code length k */
- int codesize[257]; /* codesize[k] = code length of symbol k */
- int others[257]; /* next symbol in current branch of tree */
- int c1, c2;
- int p, i, j;
- long v;
-
- /* This algorithm is explained in section K.2 of the JPEG standard */
-
- MEMZERO(bits, SIZEOF(bits));
- MEMZERO(codesize, SIZEOF(codesize));
- for (i = 0; i < 257; i++)
- others[i] = -1; /* init links to empty */
-
- freq[256] = 1; /* make sure 256 has a nonzero count */
- /* Including the pseudo-symbol 256 in the Huffman procedure guarantees
- * that no real symbol is given code-value of all ones, because 256
- * will be placed last in the largest codeword category.
- */
-
- /* Huffman's basic algorithm to assign optimal code lengths to symbols */
-
- for (;;) {
- /* Find the smallest nonzero frequency, set c1 = its symbol */
- /* In case of ties, take the larger symbol number */
- c1 = -1;
- v = 1000000000L;
- for (i = 0; i <= 256; i++) {
- if (freq[i] && freq[i] <= v) {
+#define MAX_CLEN 32 /* assumed maximum initial code length */
+ UINT8 bits[MAX_CLEN+1]; /* bits[k] = # of symbols with code length k */
+ int codesize[257]; /* codesize[k] = code length of symbol k */
+ int others[257]; /* next symbol in current branch of tree */
+ int c1, c2;
+ int p, i, j;
+ long v;
+
+ /* This algorithm is explained in section K.2 of the JPEG standard */
+
+ MEMZERO(bits, SIZEOF(bits));
+ MEMZERO(codesize, SIZEOF(codesize));
+ for (i = 0; i < 257; i++)
+ others[i] = -1; /* init links to empty */
+
+ freq[256] = 1; /* make sure 256 has a nonzero count */
+ /* Including the pseudo-symbol 256 in the Huffman procedure guarantees
+ * that no real symbol is given code-value of all ones, because 256
+ * will be placed last in the largest codeword category.
+ */
+
+ /* Huffman's basic algorithm to assign optimal code lengths to symbols */
+
+ for (;;) {
+ /* Find the smallest nonzero frequency, set c1 = its symbol */
+ /* In case of ties, take the larger symbol number */
+ c1 = -1;
+ v = 1000000000L;
+ for (i = 0; i <= 256; i++) {
+ if (freq[i] && freq[i] <= v) {
v = freq[i];
c1 = i;
- }
- }
-
- /* Find the next smallest nonzero frequency, set c2 = its symbol */
- /* In case of ties, take the larger symbol number */
- c2 = -1;
- v = 1000000000L;
- for (i = 0; i <= 256; i++) {
- if (freq[i] && freq[i] <= v && i != c1) {
+ }
+ }
+
+ /* Find the next smallest nonzero frequency, set c2 = its symbol */
+ /* In case of ties, take the larger symbol number */
+ c2 = -1;
+ v = 1000000000L;
+ for (i = 0; i <= 256; i++) {
+ if (freq[i] && freq[i] <= v && i != c1) {
v = freq[i];
c2 = i;
- }
- }
-
- /* Done if we've merged everything into one frequency */
- if (c2 < 0)
- break;
-
- /* Else merge the two counts/trees */
- freq[c1] += freq[c2];
- freq[c2] = 0;
-
- /* Increment the codesize of everything in c1's tree branch */
- codesize[c1]++;
- while (others[c1] >= 0) {
- c1 = others[c1];
- codesize[c1]++;
- }
-
- others[c1] = c2; /* chain c2 onto c1's tree branch */
-
- /* Increment the codesize of everything in c2's tree branch */
- codesize[c2]++;
- while (others[c2] >= 0) {
- c2 = others[c2];
- codesize[c2]++;
- }
- }
-
- /* Now count the number of symbols of each code length */
- for (i = 0; i <= 256; i++) {
- if (codesize[i]) {
- /* The JPEG standard seems to think that this can't happen, */
- /* but I'm paranoid... */
- if (codesize[i] > MAX_CLEN)
+ }
+ }
+
+ /* Done if we've merged everything into one frequency */
+ if (c2 < 0)
+ break;
+
+ /* Else merge the two counts/trees */
+ freq[c1] += freq[c2];
+ freq[c2] = 0;
+
+ /* Increment the codesize of everything in c1's tree branch */
+ codesize[c1]++;
+ while (others[c1] >= 0) {
+ c1 = others[c1];
+ codesize[c1]++;
+ }
+
+ others[c1] = c2; /* chain c2 onto c1's tree branch */
+
+ /* Increment the codesize of everything in c2's tree branch */
+ codesize[c2]++;
+ while (others[c2] >= 0) {
+ c2 = others[c2];
+ codesize[c2]++;
+ }
+ }
+
+ /* Now count the number of symbols of each code length */
+ for (i = 0; i <= 256; i++) {
+ if (codesize[i]) {
+ /* The JPEG standard seems to think that this can't happen, */
+ /* but I'm paranoid... */
+ if (codesize[i] > MAX_CLEN)
ERREXIT(cinfo, JERR_HUFF_CLEN_OVERFLOW);
- bits[codesize[i]]++;
- }
- }
-
- /* JPEG doesn't allow symbols with code lengths over 16 bits, so if the pure
- * Huffman procedure assigned any such lengths, we must adjust the coding.
- * Here is what the JPEG spec says about how this next bit works:
- * Since symbols are paired for the longest Huffman code, the symbols are
- * removed from this length category two at a time. The prefix for the pair
- * (which is one bit shorter) is allocated to one of the pair; then,
- * skipping the BITS entry for that prefix length, a code word from the next
- * shortest nonzero BITS entry is converted into a prefix for two code words
- * one bit longer.
- */
-
- for (i = MAX_CLEN; i > 16; i--) {
- while (bits[i] > 0) {
- j = i - 2; /* find length of new prefix to be used */
- while (bits[j] == 0)
+ bits[codesize[i]]++;
+ }
+ }
+
+ /* JPEG doesn't allow symbols with code lengths over 16 bits, so if the pure
+ * Huffman procedure assigned any such lengths, we must adjust the coding.
+ * Here is what the JPEG spec says about how this next bit works:
+ * Since symbols are paired for the longest Huffman code, the symbols are
+ * removed from this length category two at a time. The prefix for the pair
+ * (which is one bit shorter) is allocated to one of the pair; then,
+ * skipping the BITS entry for that prefix length, a code word from the next
+ * shortest nonzero BITS entry is converted into a prefix for two code words
+ * one bit longer.
+ */
+
+ for (i = MAX_CLEN; i > 16; i--) {
+ while (bits[i] > 0) {
+ j = i - 2; /* find length of new prefix to be used */
+ while (bits[j] == 0)
j--;
- bits[i] -= 2; /* remove two symbols */
- bits[i-1]++; /* one goes in this length */
- bits[j+1] += 2; /* two new symbols in this length */
- bits[j]--; /* symbol of this length is now a prefix */
- }
- }
-
- /* Remove the count for the pseudo-symbol 256 from the largest codelength */
- while (bits[i] == 0) /* find largest codelength still in use */
- i--;
- bits[i]--;
-
- /* Return final symbol counts (only for lengths 0..16) */
- MEMCOPY(htbl->bits, bits, SIZEOF(htbl->bits));
-
- /* Return a list of the symbols sorted by code length */
- /* It's not real clear to me why we don't need to consider the codelength
- * changes made above, but the JPEG spec seems to think this works.
- */
- p = 0;
- for (i = 1; i <= MAX_CLEN; i++) {
- for (j = 0; j <= 255; j++) {
- if (codesize[j] == i) {
+ bits[i] -= 2; /* remove two symbols */
+ bits[i-1]++; /* one goes in this length */
+ bits[j+1] += 2; /* two new symbols in this length */
+ bits[j]--; /* symbol of this length is now a prefix */
+ }
+ }
+
+ /* Remove the count for the pseudo-symbol 256 from the largest codelength */
+ while (bits[i] == 0) /* find largest codelength still in use */
+ i--;
+ bits[i]--;
+
+ /* Return final symbol counts (only for lengths 0..16) */
+ MEMCOPY(htbl->bits, bits, SIZEOF(htbl->bits));
+
+ /* Return a list of the symbols sorted by code length */
+ /* It's not real clear to me why we don't need to consider the codelength
+ * changes made above, but the JPEG spec seems to think this works.
+ */
+ p = 0;
+ for (i = 1; i <= MAX_CLEN; i++) {
+ for (j = 0; j <= 255; j++) {
+ if (codesize[j] == i) {
htbl->huffval[p] = (UINT8) j;
p++;
- }
- }
- }
+ }
+ }
+ }
- /* Set sent_table FALSE so updated table will be written to JPEG file. */
- htbl->sent_table = FALSE;
+ /* Set sent_table FALSE so updated table will be written to JPEG file. */
+ htbl->sent_table = FALSE;
}
@@ -1396,48 +1396,48 @@ jpeg_gen_optimal_table (j_compress_ptr cinfo, JHUFF_TBL * htbl, long freq[])
METHODDEF(void)
finish_pass_gather (j_compress_ptr cinfo)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int ci, tbl;
- jpeg_component_info * compptr;
- JHUFF_TBL **htblptr;
- boolean did_dc[NUM_HUFF_TBLS];
- boolean did_ac[NUM_HUFF_TBLS];
-
- /* It's important not to apply jpeg_gen_optimal_table more than once
- * per table, because it clobbers the input frequency counts!
- */
- if (cinfo->progressive_mode)
- /* Flush out buffered data (all we care about is counting the EOB symbol) */
- emit_eobrun(entropy);
-
- MEMZERO(did_dc, SIZEOF(did_dc));
- MEMZERO(did_ac, SIZEOF(did_ac));
-
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* DC needs no table for refinement scan */
- if (cinfo->Ss == 0 && cinfo->Ah == 0) {
- tbl = compptr->dc_tbl_no;
- if (! did_dc[tbl]) {
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int ci, tbl;
+ jpeg_component_info * compptr;
+ JHUFF_TBL **htblptr;
+ boolean did_dc[NUM_HUFF_TBLS];
+ boolean did_ac[NUM_HUFF_TBLS];
+
+ /* It's important not to apply jpeg_gen_optimal_table more than once
+ * per table, because it clobbers the input frequency counts!
+ */
+ if (cinfo->progressive_mode)
+ /* Flush out buffered data (all we care about is counting the EOB symbol) */
+ emit_eobrun(entropy);
+
+ MEMZERO(did_dc, SIZEOF(did_dc));
+ MEMZERO(did_ac, SIZEOF(did_ac));
+
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* DC needs no table for refinement scan */
+ if (cinfo->Ss == 0 && cinfo->Ah == 0) {
+ tbl = compptr->dc_tbl_no;
+ if (! did_dc[tbl]) {
htblptr = & cinfo->dc_huff_tbl_ptrs[tbl];
if (*htblptr == NULL)
- *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
+ *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
jpeg_gen_optimal_table(cinfo, *htblptr, entropy->dc_count_ptrs[tbl]);
did_dc[tbl] = TRUE;
- }
- }
- /* AC needs no table when not present */
- if (cinfo->Se) {
- tbl = compptr->ac_tbl_no;
- if (! did_ac[tbl]) {
+ }
+ }
+ /* AC needs no table when not present */
+ if (cinfo->Se) {
+ tbl = compptr->ac_tbl_no;
+ if (! did_ac[tbl]) {
htblptr = & cinfo->ac_huff_tbl_ptrs[tbl];
if (*htblptr == NULL)
- *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
+ *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
jpeg_gen_optimal_table(cinfo, *htblptr, entropy->ac_count_ptrs[tbl]);
did_ac[tbl] = TRUE;
- }
- }
- }
+ }
+ }
+ }
}
@@ -1450,102 +1450,102 @@ finish_pass_gather (j_compress_ptr cinfo)
METHODDEF(void)
start_pass_huff (j_compress_ptr cinfo, boolean gather_statistics)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int ci, tbl;
- jpeg_component_info * compptr;
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int ci, tbl;
+ jpeg_component_info * compptr;
- if (gather_statistics)
- entropy->pub.finish_pass = finish_pass_gather;
- else
- entropy->pub.finish_pass = finish_pass_huff;
+ if (gather_statistics)
+ entropy->pub.finish_pass = finish_pass_gather;
+ else
+ entropy->pub.finish_pass = finish_pass_huff;
- if (cinfo->progressive_mode) {
- entropy->cinfo = cinfo;
- entropy->gather_statistics = gather_statistics;
+ if (cinfo->progressive_mode) {
+ entropy->cinfo = cinfo;
+ entropy->gather_statistics = gather_statistics;
- /* We assume jcmaster.c already validated the scan parameters. */
+ /* We assume jcmaster.c already validated the scan parameters. */
- /* Select execution routine */
- if (cinfo->Ah == 0) {
- if (cinfo->Ss == 0)
+ /* Select execution routine */
+ if (cinfo->Ah == 0) {
+ if (cinfo->Ss == 0)
entropy->pub.encode_mcu = encode_mcu_DC_first;
- else
+ else
entropy->pub.encode_mcu = encode_mcu_AC_first;
- } else {
- if (cinfo->Ss == 0)
+ } else {
+ if (cinfo->Ss == 0)
entropy->pub.encode_mcu = encode_mcu_DC_refine;
- else {
+ else {
entropy->pub.encode_mcu = encode_mcu_AC_refine;
/* AC refinement needs a correction bit buffer */
if (entropy->bit_buffer == NULL)
- entropy->bit_buffer = (char *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ entropy->bit_buffer = (char *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
MAX_CORR_BITS * SIZEOF(char));
- }
- }
-
- /* Initialize AC stuff */
- entropy->ac_tbl_no = cinfo->cur_comp_info[0]->ac_tbl_no;
- entropy->EOBRUN = 0;
- entropy->BE = 0;
- } else {
- if (gather_statistics)
- entropy->pub.encode_mcu = encode_mcu_gather;
- else
- entropy->pub.encode_mcu = encode_mcu_huff;
- }
-
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* DC needs no table for refinement scan */
- if (cinfo->Ss == 0 && cinfo->Ah == 0) {
- tbl = compptr->dc_tbl_no;
- if (gather_statistics) {
+ }
+ }
+
+ /* Initialize AC stuff */
+ entropy->ac_tbl_no = cinfo->cur_comp_info[0]->ac_tbl_no;
+ entropy->EOBRUN = 0;
+ entropy->BE = 0;
+ } else {
+ if (gather_statistics)
+ entropy->pub.encode_mcu = encode_mcu_gather;
+ else
+ entropy->pub.encode_mcu = encode_mcu_huff;
+ }
+
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* DC needs no table for refinement scan */
+ if (cinfo->Ss == 0 && cinfo->Ah == 0) {
+ tbl = compptr->dc_tbl_no;
+ if (gather_statistics) {
/* Check for invalid table index */
/* (make_c_derived_tbl does this in the other path) */
if (tbl < 0 || tbl >= NUM_HUFF_TBLS)
- ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tbl);
+ ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tbl);
/* Allocate and zero the statistics tables */
/* Note that jpeg_gen_optimal_table expects 257 entries in each table! */
if (entropy->dc_count_ptrs[tbl] == NULL)
- entropy->dc_count_ptrs[tbl] = (long *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ entropy->dc_count_ptrs[tbl] = (long *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
257 * SIZEOF(long));
MEMZERO(entropy->dc_count_ptrs[tbl], 257 * SIZEOF(long));
- } else {
+ } else {
/* Compute derived values for Huffman tables */
/* We may do this more than once for a table, but it's not expensive */
jpeg_make_c_derived_tbl(cinfo, TRUE, tbl,
& entropy->dc_derived_tbls[tbl]);
- }
- /* Initialize DC predictions to 0 */
- entropy->saved.last_dc_val[ci] = 0;
- }
- /* AC needs no table when not present */
- if (cinfo->Se) {
- tbl = compptr->ac_tbl_no;
- if (gather_statistics) {
+ }
+ /* Initialize DC predictions to 0 */
+ entropy->saved.last_dc_val[ci] = 0;
+ }
+ /* AC needs no table when not present */
+ if (cinfo->Se) {
+ tbl = compptr->ac_tbl_no;
+ if (gather_statistics) {
if (tbl < 0 || tbl >= NUM_HUFF_TBLS)
- ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tbl);
+ ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tbl);
if (entropy->ac_count_ptrs[tbl] == NULL)
- entropy->ac_count_ptrs[tbl] = (long *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ entropy->ac_count_ptrs[tbl] = (long *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
257 * SIZEOF(long));
MEMZERO(entropy->ac_count_ptrs[tbl], 257 * SIZEOF(long));
- } else {
+ } else {
jpeg_make_c_derived_tbl(cinfo, FALSE, tbl,
& entropy->ac_derived_tbls[tbl]);
- }
- }
- }
+ }
+ }
+ }
- /* Initialize bit buffer to empty */
- entropy->saved.put_buffer = 0;
- entropy->saved.put_bits = 0;
+ /* Initialize bit buffer to empty */
+ entropy->saved.put_buffer = 0;
+ entropy->saved.put_bits = 0;
- /* Initialize restart stuff */
- entropy->restarts_to_go = cinfo->restart_interval;
- entropy->next_restart_num = 0;
+ /* Initialize restart stuff */
+ entropy->restarts_to_go = cinfo->restart_interval;
+ entropy->next_restart_num = 0;
}
@@ -1556,21 +1556,21 @@ start_pass_huff (j_compress_ptr cinfo, boolean gather_statistics)
GLOBAL(void)
jinit_huff_encoder (j_compress_ptr cinfo)
{
- huff_entropy_ptr entropy;
- int i;
+ huff_entropy_ptr entropy;
+ int i;
- entropy = (huff_entropy_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ entropy = (huff_entropy_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(huff_entropy_encoder));
- cinfo->entropy = (struct jpeg_entropy_encoder *) entropy;
- entropy->pub.start_pass = start_pass_huff;
+ cinfo->entropy = (struct jpeg_entropy_encoder *) entropy;
+ entropy->pub.start_pass = start_pass_huff;
- /* Mark tables unallocated */
- for (i = 0; i < NUM_HUFF_TBLS; i++) {
- entropy->dc_derived_tbls[i] = entropy->ac_derived_tbls[i] = NULL;
- entropy->dc_count_ptrs[i] = entropy->ac_count_ptrs[i] = NULL;
- }
+ /* Mark tables unallocated */
+ for (i = 0; i < NUM_HUFF_TBLS; i++) {
+ entropy->dc_derived_tbls[i] = entropy->ac_derived_tbls[i] = NULL;
+ entropy->dc_count_ptrs[i] = entropy->ac_count_ptrs[i] = NULL;
+ }
- if (cinfo->progressive_mode)
- entropy->bit_buffer = NULL; /* needed only in AC refinement scan */
+ if (cinfo->progressive_mode)
+ entropy->bit_buffer = NULL; /* needed only in AC refinement scan */
}
diff --git a/src/lib/libjpeg/jcinit.c b/src/lib/libjpeg/jcinit.c
index 0ba310f217d..9b727d71e18 100644
--- a/src/lib/libjpeg/jcinit.c
+++ b/src/lib/libjpeg/jcinit.c
@@ -29,37 +29,37 @@
GLOBAL(void)
jinit_compress_master (j_compress_ptr cinfo)
{
- /* Initialize master control (includes parameter checking/processing) */
- jinit_c_master_control(cinfo, FALSE /* full compression */);
+ /* Initialize master control (includes parameter checking/processing) */
+ jinit_c_master_control(cinfo, FALSE /* full compression */);
- /* Preprocessing */
- if (! cinfo->raw_data_in) {
- jinit_color_converter(cinfo);
- jinit_downsampler(cinfo);
- jinit_c_prep_controller(cinfo, FALSE /* never need full buffer here */);
- }
- /* Forward DCT */
- jinit_forward_dct(cinfo);
- /* Entropy encoding: either Huffman or arithmetic coding. */
- if (cinfo->arith_code)
- jinit_arith_encoder(cinfo);
- else {
- jinit_huff_encoder(cinfo);
- }
+ /* Preprocessing */
+ if (! cinfo->raw_data_in) {
+ jinit_color_converter(cinfo);
+ jinit_downsampler(cinfo);
+ jinit_c_prep_controller(cinfo, FALSE /* never need full buffer here */);
+ }
+ /* Forward DCT */
+ jinit_forward_dct(cinfo);
+ /* Entropy encoding: either Huffman or arithmetic coding. */
+ if (cinfo->arith_code)
+ jinit_arith_encoder(cinfo);
+ else {
+ jinit_huff_encoder(cinfo);
+ }
- /* Need a full-image coefficient buffer in any multi-pass mode. */
- jinit_c_coef_controller(cinfo,
+ /* Need a full-image coefficient buffer in any multi-pass mode. */
+ jinit_c_coef_controller(cinfo,
(boolean) (cinfo->num_scans > 1 || cinfo->optimize_coding));
- jinit_c_main_controller(cinfo, FALSE /* never need full buffer here */);
+ jinit_c_main_controller(cinfo, FALSE /* never need full buffer here */);
- jinit_marker_writer(cinfo);
+ jinit_marker_writer(cinfo);
- /* We can now tell the memory manager to allocate virtual arrays. */
- (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
+ /* We can now tell the memory manager to allocate virtual arrays. */
+ (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
- /* Write the datastream header (SOI) immediately.
- * Frame and scan headers are postponed till later.
- * This lets application insert special markers after the SOI.
- */
- (*cinfo->marker->write_file_header) (cinfo);
+ /* Write the datastream header (SOI) immediately.
+ * Frame and scan headers are postponed till later.
+ * This lets application insert special markers after the SOI.
+ */
+ (*cinfo->marker->write_file_header) (cinfo);
}
diff --git a/src/lib/libjpeg/jcmainct.c b/src/lib/libjpeg/jcmainct.c
index b0368223700..2b5a221ea05 100644
--- a/src/lib/libjpeg/jcmainct.c
+++ b/src/lib/libjpeg/jcmainct.c
@@ -26,24 +26,24 @@
/* Private buffer controller object */
typedef struct {
- struct jpeg_c_main_controller pub; /* public fields */
+ struct jpeg_c_main_controller pub; /* public fields */
- JDIMENSION cur_iMCU_row; /* number of current iMCU row */
- JDIMENSION rowgroup_ctr; /* counts row groups received in iMCU row */
- boolean suspended; /* remember if we suspended output */
- J_BUF_MODE pass_mode; /* current operating mode */
+ JDIMENSION cur_iMCU_row; /* number of current iMCU row */
+ JDIMENSION rowgroup_ctr; /* counts row groups received in iMCU row */
+ boolean suspended; /* remember if we suspended output */
+ J_BUF_MODE pass_mode; /* current operating mode */
- /* If using just a strip buffer, this points to the entire set of buffers
- * (we allocate one for each component). In the full-image case, this
- * points to the currently accessible strips of the virtual arrays.
- */
- JSAMPARRAY buffer[MAX_COMPONENTS];
+ /* If using just a strip buffer, this points to the entire set of buffers
+ * (we allocate one for each component). In the full-image case, this
+ * points to the currently accessible strips of the virtual arrays.
+ */
+ JSAMPARRAY buffer[MAX_COMPONENTS];
#ifdef FULL_MAIN_BUFFER_SUPPORTED
- /* If using full-image storage, this array holds pointers to virtual-array
- * control blocks for each component. Unused if not full-image storage.
- */
- jvirt_sarray_ptr whole_image[MAX_COMPONENTS];
+ /* If using full-image storage, this array holds pointers to virtual-array
+ * control blocks for each component. Unused if not full-image storage.
+ */
+ jvirt_sarray_ptr whole_image[MAX_COMPONENTS];
#endif
} my_main_controller;
@@ -53,11 +53,11 @@ typedef my_main_controller * my_main_ptr;
/* Forward declarations */
METHODDEF(void) process_data_simple_main
JPP((j_compress_ptr cinfo, JSAMPARRAY input_buf,
- JDIMENSION *in_row_ctr, JDIMENSION in_rows_avail));
+ JDIMENSION *in_row_ctr, JDIMENSION in_rows_avail));
#ifdef FULL_MAIN_BUFFER_SUPPORTED
METHODDEF(void) process_data_buffer_main
JPP((j_compress_ptr cinfo, JSAMPARRAY input_buf,
- JDIMENSION *in_row_ctr, JDIMENSION in_rows_avail));
+ JDIMENSION *in_row_ctr, JDIMENSION in_rows_avail));
#endif
@@ -68,38 +68,38 @@ METHODDEF(void) process_data_buffer_main
METHODDEF(void)
start_pass_main (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
- /* Do nothing in raw-data mode. */
- if (cinfo->raw_data_in)
- return;
+ /* Do nothing in raw-data mode. */
+ if (cinfo->raw_data_in)
+ return;
- mymain->cur_iMCU_row = 0; /* initialize counters */
- mymain->rowgroup_ctr = 0;
- mymain->suspended = FALSE;
- mymain->pass_mode = pass_mode; /* save mode for use by process_data */
+ mymain->cur_iMCU_row = 0; /* initialize counters */
+ mymain->rowgroup_ctr = 0;
+ mymain->suspended = FALSE;
+ mymain->pass_mode = pass_mode; /* save mode for use by process_data */
- switch (pass_mode) {
- case JBUF_PASS_THRU:
+ switch (pass_mode) {
+ case JBUF_PASS_THRU:
#ifdef FULL_MAIN_BUFFER_SUPPORTED
- if (mymain->whole_image[0] != NULL)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ if (mymain->whole_image[0] != NULL)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
#endif
- mymain->pub.process_data = process_data_simple_main;
- break;
+ mymain->pub.process_data = process_data_simple_main;
+ break;
#ifdef FULL_MAIN_BUFFER_SUPPORTED
- case JBUF_SAVE_SOURCE:
- case JBUF_CRANK_DEST:
- case JBUF_SAVE_AND_PASS:
- if (mymain->whole_image[0] == NULL)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- mymain->pub.process_data = process_data_buffer_main;
- break;
+ case JBUF_SAVE_SOURCE:
+ case JBUF_CRANK_DEST:
+ case JBUF_SAVE_AND_PASS:
+ if (mymain->whole_image[0] == NULL)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ mymain->pub.process_data = process_data_buffer_main;
+ break;
#endif
- default:
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- break;
- }
+ default:
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ break;
+ }
}
@@ -111,50 +111,50 @@ start_pass_main (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
METHODDEF(void)
process_data_simple_main (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
- JDIMENSION in_rows_avail)
+ JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
+ JDIMENSION in_rows_avail)
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
- while (mymain->cur_iMCU_row < cinfo->total_iMCU_rows) {
- /* Read input data if we haven't filled the main buffer yet */
- if (mymain->rowgroup_ctr < (JDIMENSION) cinfo->min_DCT_v_scaled_size)
- (*cinfo->prep->pre_process_data) (cinfo,
+ while (mymain->cur_iMCU_row < cinfo->total_iMCU_rows) {
+ /* Read input data if we haven't filled the main buffer yet */
+ if (mymain->rowgroup_ctr < (JDIMENSION) cinfo->min_DCT_v_scaled_size)
+ (*cinfo->prep->pre_process_data) (cinfo,
input_buf, in_row_ctr, in_rows_avail,
mymain->buffer, &mymain->rowgroup_ctr,
(JDIMENSION) cinfo->min_DCT_v_scaled_size);
- /* If we don't have a full iMCU row buffered, return to application for
- * more data. Note that preprocessor will always pad to fill the iMCU row
- * at the bottom of the image.
- */
- if (mymain->rowgroup_ctr != (JDIMENSION) cinfo->min_DCT_v_scaled_size)
- return;
-
- /* Send the completed row to the compressor */
- if (! (*cinfo->coef->compress_data) (cinfo, mymain->buffer)) {
- /* If compressor did not consume the whole row, then we must need to
- * suspend processing and return to the application. In this situation
- * we pretend we didn't yet consume the last input row; otherwise, if
- * it happened to be the last row of the image, the application would
- * think we were done.
- */
- if (! mymain->suspended) {
+ /* If we don't have a full iMCU row buffered, return to application for
+ * more data. Note that preprocessor will always pad to fill the iMCU row
+ * at the bottom of the image.
+ */
+ if (mymain->rowgroup_ctr != (JDIMENSION) cinfo->min_DCT_v_scaled_size)
+ return;
+
+ /* Send the completed row to the compressor */
+ if (! (*cinfo->coef->compress_data) (cinfo, mymain->buffer)) {
+ /* If compressor did not consume the whole row, then we must need to
+ * suspend processing and return to the application. In this situation
+ * we pretend we didn't yet consume the last input row; otherwise, if
+ * it happened to be the last row of the image, the application would
+ * think we were done.
+ */
+ if (! mymain->suspended) {
(*in_row_ctr)--;
mymain->suspended = TRUE;
- }
- return;
- }
- /* We did finish the row. Undo our little suspension hack if a previous
- * call suspended; then mark the main buffer empty.
- */
- if (mymain->suspended) {
- (*in_row_ctr)++;
- mymain->suspended = FALSE;
- }
- mymain->rowgroup_ctr = 0;
- mymain->cur_iMCU_row++;
- }
+ }
+ return;
+ }
+ /* We did finish the row. Undo our little suspension hack if a previous
+ * call suspended; then mark the main buffer empty.
+ */
+ if (mymain->suspended) {
+ (*in_row_ctr)++;
+ mymain->suspended = FALSE;
+ }
+ mymain->rowgroup_ctr = 0;
+ mymain->cur_iMCU_row++;
+ }
}
@@ -167,71 +167,71 @@ process_data_simple_main (j_compress_ptr cinfo,
METHODDEF(void)
process_data_buffer_main (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
- JDIMENSION in_rows_avail)
+ JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
+ JDIMENSION in_rows_avail)
{
- my_main_ptr main = (my_main_ptr) cinfo->main;
- int ci;
- jpeg_component_info *compptr;
- boolean writing = (main->pass_mode != JBUF_CRANK_DEST);
-
- while (main->cur_iMCU_row < cinfo->total_iMCU_rows) {
- /* Realign the virtual buffers if at the start of an iMCU row. */
- if (main->rowgroup_ctr == 0) {
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
+ my_main_ptr main = (my_main_ptr) cinfo->main;
+ int ci;
+ jpeg_component_info *compptr;
+ boolean writing = (main->pass_mode != JBUF_CRANK_DEST);
+
+ while (main->cur_iMCU_row < cinfo->total_iMCU_rows) {
+ /* Realign the virtual buffers if at the start of an iMCU row. */
+ if (main->rowgroup_ctr == 0) {
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
main->buffer[ci] = (*cinfo->mem->access_virt_sarray)
- ((j_common_ptr) cinfo, main->whole_image[ci],
- main->cur_iMCU_row * (compptr->v_samp_factor * DCTSIZE),
- (JDIMENSION) (compptr->v_samp_factor * DCTSIZE), writing);
- }
- /* In a read pass, pretend we just read some source data. */
- if (! writing) {
+ ((j_common_ptr) cinfo, main->whole_image[ci],
+ main->cur_iMCU_row * (compptr->v_samp_factor * DCTSIZE),
+ (JDIMENSION) (compptr->v_samp_factor * DCTSIZE), writing);
+ }
+ /* In a read pass, pretend we just read some source data. */
+ if (! writing) {
*in_row_ctr += cinfo->max_v_samp_factor * DCTSIZE;
main->rowgroup_ctr = DCTSIZE;
- }
- }
+ }
+ }
- /* If a write pass, read input data until the current iMCU row is full. */
- /* Note: preprocessor will pad if necessary to fill the last iMCU row. */
- if (writing) {
- (*cinfo->prep->pre_process_data) (cinfo,
+ /* If a write pass, read input data until the current iMCU row is full. */
+ /* Note: preprocessor will pad if necessary to fill the last iMCU row. */
+ if (writing) {
+ (*cinfo->prep->pre_process_data) (cinfo,
input_buf, in_row_ctr, in_rows_avail,
main->buffer, &main->rowgroup_ctr,
(JDIMENSION) DCTSIZE);
- /* Return to application if we need more data to fill the iMCU row. */
- if (main->rowgroup_ctr < DCTSIZE)
+ /* Return to application if we need more data to fill the iMCU row. */
+ if (main->rowgroup_ctr < DCTSIZE)
return;
- }
+ }
- /* Emit data, unless this is a sink-only pass. */
- if (main->pass_mode != JBUF_SAVE_SOURCE) {
- if (! (*cinfo->coef->compress_data) (cinfo, main->buffer)) {
+ /* Emit data, unless this is a sink-only pass. */
+ if (main->pass_mode != JBUF_SAVE_SOURCE) {
+ if (! (*cinfo->coef->compress_data) (cinfo, main->buffer)) {
/* If compressor did not consume the whole row, then we must need to
- * suspend processing and return to the application. In this situation
- * we pretend we didn't yet consume the last input row; otherwise, if
- * it happened to be the last row of the image, the application would
- * think we were done.
- */
+ * suspend processing and return to the application. In this situation
+ * we pretend we didn't yet consume the last input row; otherwise, if
+ * it happened to be the last row of the image, the application would
+ * think we were done.
+ */
if (! main->suspended) {
- (*in_row_ctr)--;
- main->suspended = TRUE;
+ (*in_row_ctr)--;
+ main->suspended = TRUE;
}
return;
- }
- /* We did finish the row. Undo our little suspension hack if a previous
- * call suspended; then mark the main buffer empty.
- */
- if (main->suspended) {
+ }
+ /* We did finish the row. Undo our little suspension hack if a previous
+ * call suspended; then mark the main buffer empty.
+ */
+ if (main->suspended) {
(*in_row_ctr)++;
main->suspended = FALSE;
- }
- }
+ }
+ }
- /* If get here, we are done with this iMCU row. Mark buffer empty. */
- main->rowgroup_ctr = 0;
- main->cur_iMCU_row++;
- }
+ /* If get here, we are done with this iMCU row. Mark buffer empty. */
+ main->rowgroup_ctr = 0;
+ main->cur_iMCU_row++;
+ }
}
#endif /* FULL_MAIN_BUFFER_SUPPORTED */
@@ -244,50 +244,50 @@ process_data_buffer_main (j_compress_ptr cinfo,
GLOBAL(void)
jinit_c_main_controller (j_compress_ptr cinfo, boolean need_full_buffer)
{
- my_main_ptr mymain;
- int ci;
- jpeg_component_info *compptr;
+ my_main_ptr mymain;
+ int ci;
+ jpeg_component_info *compptr;
- mymain = (my_main_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ mymain = (my_main_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_main_controller));
- cinfo->main = (struct jpeg_c_main_controller *) mymain;
- mymain->pub.start_pass = start_pass_main;
+ cinfo->main = (struct jpeg_c_main_controller *) mymain;
+ mymain->pub.start_pass = start_pass_main;
- /* We don't need to create a buffer in raw-data mode. */
- if (cinfo->raw_data_in)
- return;
+ /* We don't need to create a buffer in raw-data mode. */
+ if (cinfo->raw_data_in)
+ return;
- /* Create the buffer. It holds downsampled data, so each component
- * may be of a different size.
- */
- if (need_full_buffer) {
+ /* Create the buffer. It holds downsampled data, so each component
+ * may be of a different size.
+ */
+ if (need_full_buffer) {
#ifdef FULL_MAIN_BUFFER_SUPPORTED
- /* Allocate a full-image virtual array for each component */
- /* Note we pad the bottom to a multiple of the iMCU height */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- mymain->whole_image[ci] = (*cinfo->mem->request_virt_sarray)
+ /* Allocate a full-image virtual array for each component */
+ /* Note we pad the bottom to a multiple of the iMCU height */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ mymain->whole_image[ci] = (*cinfo->mem->request_virt_sarray)
((j_common_ptr) cinfo, JPOOL_IMAGE, FALSE,
- compptr->width_in_blocks * compptr->DCT_h_scaled_size,
- (JDIMENSION) jround_up((long) compptr->height_in_blocks,
+ compptr->width_in_blocks * compptr->DCT_h_scaled_size,
+ (JDIMENSION) jround_up((long) compptr->height_in_blocks,
(long) compptr->v_samp_factor) * DCTSIZE,
- (JDIMENSION) (compptr->v_samp_factor * compptr->DCT_v_scaled_size));
- }
+ (JDIMENSION) (compptr->v_samp_factor * compptr->DCT_v_scaled_size));
+ }
#else
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
#endif
- } else {
+ } else {
#ifdef FULL_MAIN_BUFFER_SUPPORTED
- mymain->whole_image[0] = NULL; /* flag for no virtual arrays */
+ mymain->whole_image[0] = NULL; /* flag for no virtual arrays */
#endif
- /* Allocate a strip buffer for each component */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- mymain->buffer[ci] = (*cinfo->mem->alloc_sarray)
+ /* Allocate a strip buffer for each component */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ mymain->buffer[ci] = (*cinfo->mem->alloc_sarray)
((j_common_ptr) cinfo, JPOOL_IMAGE,
- compptr->width_in_blocks * compptr->DCT_h_scaled_size,
- (JDIMENSION) (compptr->v_samp_factor * compptr->DCT_v_scaled_size));
- }
- }
+ compptr->width_in_blocks * compptr->DCT_h_scaled_size,
+ (JDIMENSION) (compptr->v_samp_factor * compptr->DCT_v_scaled_size));
+ }
+ }
}
diff --git a/src/lib/libjpeg/jcmarker.c b/src/lib/libjpeg/jcmarker.c
index af5442abf63..81184005517 100644
--- a/src/lib/libjpeg/jcmarker.c
+++ b/src/lib/libjpeg/jcmarker.c
@@ -14,80 +14,80 @@
#include "jpeglib.h"
-typedef enum { /* JPEG marker codes */
- M_SOF0 = 0xc0,
- M_SOF1 = 0xc1,
- M_SOF2 = 0xc2,
- M_SOF3 = 0xc3,
-
- M_SOF5 = 0xc5,
- M_SOF6 = 0xc6,
- M_SOF7 = 0xc7,
-
- M_JPG = 0xc8,
- M_SOF9 = 0xc9,
- M_SOF10 = 0xca,
- M_SOF11 = 0xcb,
-
- M_SOF13 = 0xcd,
- M_SOF14 = 0xce,
- M_SOF15 = 0xcf,
-
- M_DHT = 0xc4,
-
- M_DAC = 0xcc,
-
- M_RST0 = 0xd0,
- M_RST1 = 0xd1,
- M_RST2 = 0xd2,
- M_RST3 = 0xd3,
- M_RST4 = 0xd4,
- M_RST5 = 0xd5,
- M_RST6 = 0xd6,
- M_RST7 = 0xd7,
-
- M_SOI = 0xd8,
- M_EOI = 0xd9,
- M_SOS = 0xda,
- M_DQT = 0xdb,
- M_DNL = 0xdc,
- M_DRI = 0xdd,
- M_DHP = 0xde,
- M_EXP = 0xdf,
-
- M_APP0 = 0xe0,
- M_APP1 = 0xe1,
- M_APP2 = 0xe2,
- M_APP3 = 0xe3,
- M_APP4 = 0xe4,
- M_APP5 = 0xe5,
- M_APP6 = 0xe6,
- M_APP7 = 0xe7,
- M_APP8 = 0xe8,
- M_APP9 = 0xe9,
- M_APP10 = 0xea,
- M_APP11 = 0xeb,
- M_APP12 = 0xec,
- M_APP13 = 0xed,
- M_APP14 = 0xee,
- M_APP15 = 0xef,
-
- M_JPG0 = 0xf0,
- M_JPG13 = 0xfd,
- M_COM = 0xfe,
-
- M_TEM = 0x01,
-
- M_ERROR = 0x100
+typedef enum { /* JPEG marker codes */
+ M_SOF0 = 0xc0,
+ M_SOF1 = 0xc1,
+ M_SOF2 = 0xc2,
+ M_SOF3 = 0xc3,
+
+ M_SOF5 = 0xc5,
+ M_SOF6 = 0xc6,
+ M_SOF7 = 0xc7,
+
+ M_JPG = 0xc8,
+ M_SOF9 = 0xc9,
+ M_SOF10 = 0xca,
+ M_SOF11 = 0xcb,
+
+ M_SOF13 = 0xcd,
+ M_SOF14 = 0xce,
+ M_SOF15 = 0xcf,
+
+ M_DHT = 0xc4,
+
+ M_DAC = 0xcc,
+
+ M_RST0 = 0xd0,
+ M_RST1 = 0xd1,
+ M_RST2 = 0xd2,
+ M_RST3 = 0xd3,
+ M_RST4 = 0xd4,
+ M_RST5 = 0xd5,
+ M_RST6 = 0xd6,
+ M_RST7 = 0xd7,
+
+ M_SOI = 0xd8,
+ M_EOI = 0xd9,
+ M_SOS = 0xda,
+ M_DQT = 0xdb,
+ M_DNL = 0xdc,
+ M_DRI = 0xdd,
+ M_DHP = 0xde,
+ M_EXP = 0xdf,
+
+ M_APP0 = 0xe0,
+ M_APP1 = 0xe1,
+ M_APP2 = 0xe2,
+ M_APP3 = 0xe3,
+ M_APP4 = 0xe4,
+ M_APP5 = 0xe5,
+ M_APP6 = 0xe6,
+ M_APP7 = 0xe7,
+ M_APP8 = 0xe8,
+ M_APP9 = 0xe9,
+ M_APP10 = 0xea,
+ M_APP11 = 0xeb,
+ M_APP12 = 0xec,
+ M_APP13 = 0xed,
+ M_APP14 = 0xee,
+ M_APP15 = 0xef,
+
+ M_JPG0 = 0xf0,
+ M_JPG13 = 0xfd,
+ M_COM = 0xfe,
+
+ M_TEM = 0x01,
+
+ M_ERROR = 0x100
} JPEG_MARKER;
/* Private state */
typedef struct {
- struct jpeg_marker_writer pub; /* public fields */
+ struct jpeg_marker_writer pub; /* public fields */
- unsigned int last_restart_interval; /* last DRI value emitted; 0 after SOI */
+ unsigned int last_restart_interval; /* last DRI value emitted; 0 after SOI */
} my_marker_writer;
typedef my_marker_writer * my_marker_ptr;
@@ -109,13 +109,13 @@ LOCAL(void)
emit_byte (j_compress_ptr cinfo, int val)
/* Emit a byte */
{
- struct jpeg_destination_mgr * dest = cinfo->dest;
+ struct jpeg_destination_mgr * dest = cinfo->dest;
- *(dest->next_output_byte)++ = (JOCTET) val;
- if (--dest->free_in_buffer == 0) {
- if (! (*dest->empty_output_buffer) (cinfo))
- ERREXIT(cinfo, JERR_CANT_SUSPEND);
- }
+ *(dest->next_output_byte)++ = (JOCTET) val;
+ if (--dest->free_in_buffer == 0) {
+ if (! (*dest->empty_output_buffer) (cinfo))
+ ERREXIT(cinfo, JERR_CANT_SUSPEND);
+ }
}
@@ -123,8 +123,8 @@ LOCAL(void)
emit_marker (j_compress_ptr cinfo, JPEG_MARKER mark)
/* Emit a marker code */
{
- emit_byte(cinfo, 0xFF);
- emit_byte(cinfo, (int) mark);
+ emit_byte(cinfo, 0xFF);
+ emit_byte(cinfo, (int) mark);
}
@@ -132,8 +132,8 @@ LOCAL(void)
emit_2bytes (j_compress_ptr cinfo, int value)
/* Emit a 2-byte integer; these are always MSB first in JPEG files */
{
- emit_byte(cinfo, (value >> 8) & 0xFF);
- emit_byte(cinfo, value & 0xFF);
+ emit_byte(cinfo, (value >> 8) & 0xFF);
+ emit_byte(cinfo, value & 0xFF);
}
@@ -146,39 +146,39 @@ emit_dqt (j_compress_ptr cinfo, int index)
/* Emit a DQT marker */
/* Returns the precision used (0 = 8bits, 1 = 16bits) for baseline checking */
{
- JQUANT_TBL * qtbl = cinfo->quant_tbl_ptrs[index];
- int prec;
- int i;
+ JQUANT_TBL * qtbl = cinfo->quant_tbl_ptrs[index];
+ int prec;
+ int i;
- if (qtbl == NULL)
- ERREXIT1(cinfo, JERR_NO_QUANT_TABLE, index);
+ if (qtbl == NULL)
+ ERREXIT1(cinfo, JERR_NO_QUANT_TABLE, index);
- prec = 0;
- for (i = 0; i <= cinfo->lim_Se; i++) {
- if (qtbl->quantval[cinfo->natural_order[i]] > 255)
- prec = 1;
- }
+ prec = 0;
+ for (i = 0; i <= cinfo->lim_Se; i++) {
+ if (qtbl->quantval[cinfo->natural_order[i]] > 255)
+ prec = 1;
+ }
- if (! qtbl->sent_table) {
- emit_marker(cinfo, M_DQT);
+ if (! qtbl->sent_table) {
+ emit_marker(cinfo, M_DQT);
- emit_2bytes(cinfo,
- prec ? cinfo->lim_Se * 2 + 2 + 1 + 2 : cinfo->lim_Se + 1 + 1 + 2);
+ emit_2bytes(cinfo,
+ prec ? cinfo->lim_Se * 2 + 2 + 1 + 2 : cinfo->lim_Se + 1 + 1 + 2);
- emit_byte(cinfo, index + (prec<<4));
+ emit_byte(cinfo, index + (prec<<4));
- for (i = 0; i <= cinfo->lim_Se; i++) {
- /* The table entries must be emitted in zigzag order. */
- unsigned int qval = qtbl->quantval[cinfo->natural_order[i]];
- if (prec)
+ for (i = 0; i <= cinfo->lim_Se; i++) {
+ /* The table entries must be emitted in zigzag order. */
+ unsigned int qval = qtbl->quantval[cinfo->natural_order[i]];
+ if (prec)
emit_byte(cinfo, (int) (qval >> 8));
- emit_byte(cinfo, (int) (qval & 0xFF));
- }
+ emit_byte(cinfo, (int) (qval & 0xFF));
+ }
- qtbl->sent_table = TRUE;
- }
+ qtbl->sent_table = TRUE;
+ }
- return prec;
+ return prec;
}
@@ -186,37 +186,37 @@ LOCAL(void)
emit_dht (j_compress_ptr cinfo, int index, boolean is_ac)
/* Emit a DHT marker */
{
- JHUFF_TBL * htbl;
- int length, i;
+ JHUFF_TBL * htbl;
+ int length, i;
- if (is_ac) {
- htbl = cinfo->ac_huff_tbl_ptrs[index];
- index += 0x10; /* output index has AC bit set */
- } else {
- htbl = cinfo->dc_huff_tbl_ptrs[index];
- }
+ if (is_ac) {
+ htbl = cinfo->ac_huff_tbl_ptrs[index];
+ index += 0x10; /* output index has AC bit set */
+ } else {
+ htbl = cinfo->dc_huff_tbl_ptrs[index];
+ }
- if (htbl == NULL)
- ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, index);
+ if (htbl == NULL)
+ ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, index);
- if (! htbl->sent_table) {
- emit_marker(cinfo, M_DHT);
+ if (! htbl->sent_table) {
+ emit_marker(cinfo, M_DHT);
- length = 0;
- for (i = 1; i <= 16; i++)
- length += htbl->bits[i];
+ length = 0;
+ for (i = 1; i <= 16; i++)
+ length += htbl->bits[i];
- emit_2bytes(cinfo, length + 2 + 1 + 16);
- emit_byte(cinfo, index);
+ emit_2bytes(cinfo, length + 2 + 1 + 16);
+ emit_byte(cinfo, index);
- for (i = 1; i <= 16; i++)
- emit_byte(cinfo, htbl->bits[i]);
+ for (i = 1; i <= 16; i++)
+ emit_byte(cinfo, htbl->bits[i]);
- for (i = 0; i < length; i++)
- emit_byte(cinfo, htbl->huffval[i]);
+ for (i = 0; i < length; i++)
+ emit_byte(cinfo, htbl->huffval[i]);
- htbl->sent_table = TRUE;
- }
+ htbl->sent_table = TRUE;
+ }
}
@@ -227,44 +227,44 @@ emit_dac (j_compress_ptr cinfo)
/* one DAC marker. Therefore this routine does its own scan of the table. */
{
#ifdef C_ARITH_CODING_SUPPORTED
- char dc_in_use[NUM_ARITH_TBLS];
- char ac_in_use[NUM_ARITH_TBLS];
- int length, i;
- jpeg_component_info *compptr;
-
- for (i = 0; i < NUM_ARITH_TBLS; i++)
- dc_in_use[i] = ac_in_use[i] = 0;
-
- for (i = 0; i < cinfo->comps_in_scan; i++) {
- compptr = cinfo->cur_comp_info[i];
- /* DC needs no table for refinement scan */
- if (cinfo->Ss == 0 && cinfo->Ah == 0)
- dc_in_use[compptr->dc_tbl_no] = 1;
- /* AC needs no table when not present */
- if (cinfo->Se)
- ac_in_use[compptr->ac_tbl_no] = 1;
- }
-
- length = 0;
- for (i = 0; i < NUM_ARITH_TBLS; i++)
- length += dc_in_use[i] + ac_in_use[i];
-
- if (length) {
- emit_marker(cinfo, M_DAC);
-
- emit_2bytes(cinfo, length*2 + 2);
-
- for (i = 0; i < NUM_ARITH_TBLS; i++) {
- if (dc_in_use[i]) {
+ char dc_in_use[NUM_ARITH_TBLS];
+ char ac_in_use[NUM_ARITH_TBLS];
+ int length, i;
+ jpeg_component_info *compptr;
+
+ for (i = 0; i < NUM_ARITH_TBLS; i++)
+ dc_in_use[i] = ac_in_use[i] = 0;
+
+ for (i = 0; i < cinfo->comps_in_scan; i++) {
+ compptr = cinfo->cur_comp_info[i];
+ /* DC needs no table for refinement scan */
+ if (cinfo->Ss == 0 && cinfo->Ah == 0)
+ dc_in_use[compptr->dc_tbl_no] = 1;
+ /* AC needs no table when not present */
+ if (cinfo->Se)
+ ac_in_use[compptr->ac_tbl_no] = 1;
+ }
+
+ length = 0;
+ for (i = 0; i < NUM_ARITH_TBLS; i++)
+ length += dc_in_use[i] + ac_in_use[i];
+
+ if (length) {
+ emit_marker(cinfo, M_DAC);
+
+ emit_2bytes(cinfo, length*2 + 2);
+
+ for (i = 0; i < NUM_ARITH_TBLS; i++) {
+ if (dc_in_use[i]) {
emit_byte(cinfo, i);
emit_byte(cinfo, cinfo->arith_dc_L[i] + (cinfo->arith_dc_U[i]<<4));
- }
- if (ac_in_use[i]) {
+ }
+ if (ac_in_use[i]) {
emit_byte(cinfo, i + 0x10);
emit_byte(cinfo, cinfo->arith_ac_K[i]);
- }
- }
- }
+ }
+ }
+ }
#endif /* C_ARITH_CODING_SUPPORTED */
}
@@ -273,11 +273,11 @@ LOCAL(void)
emit_dri (j_compress_ptr cinfo)
/* Emit a DRI marker */
{
- emit_marker(cinfo, M_DRI);
+ emit_marker(cinfo, M_DRI);
- emit_2bytes(cinfo, 4); /* fixed length */
+ emit_2bytes(cinfo, 4); /* fixed length */
- emit_2bytes(cinfo, (int) cinfo->restart_interval);
+ emit_2bytes(cinfo, (int) cinfo->restart_interval);
}
@@ -285,30 +285,30 @@ LOCAL(void)
emit_sof (j_compress_ptr cinfo, JPEG_MARKER code)
/* Emit a SOF marker */
{
- int ci;
- jpeg_component_info *compptr;
+ int ci;
+ jpeg_component_info *compptr;
- emit_marker(cinfo, code);
+ emit_marker(cinfo, code);
- emit_2bytes(cinfo, 3 * cinfo->num_components + 2 + 5 + 1); /* length */
+ emit_2bytes(cinfo, 3 * cinfo->num_components + 2 + 5 + 1); /* length */
- /* Make sure image isn't bigger than SOF field can handle */
- if ((long) cinfo->jpeg_height > 65535L ||
- (long) cinfo->jpeg_width > 65535L)
- ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) 65535);
+ /* Make sure image isn't bigger than SOF field can handle */
+ if ((long) cinfo->jpeg_height > 65535L ||
+ (long) cinfo->jpeg_width > 65535L)
+ ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) 65535);
- emit_byte(cinfo, cinfo->data_precision);
- emit_2bytes(cinfo, (int) cinfo->jpeg_height);
- emit_2bytes(cinfo, (int) cinfo->jpeg_width);
+ emit_byte(cinfo, cinfo->data_precision);
+ emit_2bytes(cinfo, (int) cinfo->jpeg_height);
+ emit_2bytes(cinfo, (int) cinfo->jpeg_width);
- emit_byte(cinfo, cinfo->num_components);
+ emit_byte(cinfo, cinfo->num_components);
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- emit_byte(cinfo, compptr->component_id);
- emit_byte(cinfo, (compptr->h_samp_factor << 4) + compptr->v_samp_factor);
- emit_byte(cinfo, compptr->quant_tbl_no);
- }
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ emit_byte(cinfo, compptr->component_id);
+ emit_byte(cinfo, (compptr->h_samp_factor << 4) + compptr->v_samp_factor);
+ emit_byte(cinfo, compptr->quant_tbl_no);
+ }
}
@@ -316,34 +316,34 @@ LOCAL(void)
emit_sos (j_compress_ptr cinfo)
/* Emit a SOS marker */
{
- int i, td, ta;
- jpeg_component_info *compptr;
+ int i, td, ta;
+ jpeg_component_info *compptr;
- emit_marker(cinfo, M_SOS);
+ emit_marker(cinfo, M_SOS);
- emit_2bytes(cinfo, 2 * cinfo->comps_in_scan + 2 + 1 + 3); /* length */
+ emit_2bytes(cinfo, 2 * cinfo->comps_in_scan + 2 + 1 + 3); /* length */
- emit_byte(cinfo, cinfo->comps_in_scan);
+ emit_byte(cinfo, cinfo->comps_in_scan);
- for (i = 0; i < cinfo->comps_in_scan; i++) {
- compptr = cinfo->cur_comp_info[i];
- emit_byte(cinfo, compptr->component_id);
+ for (i = 0; i < cinfo->comps_in_scan; i++) {
+ compptr = cinfo->cur_comp_info[i];
+ emit_byte(cinfo, compptr->component_id);
- /* We emit 0 for unused field(s); this is recommended by the P&M text
- * but does not seem to be specified in the standard.
- */
+ /* We emit 0 for unused field(s); this is recommended by the P&M text
+ * but does not seem to be specified in the standard.
+ */
- /* DC needs no table for refinement scan */
- td = cinfo->Ss == 0 && cinfo->Ah == 0 ? compptr->dc_tbl_no : 0;
- /* AC needs no table when not present */
- ta = cinfo->Se ? compptr->ac_tbl_no : 0;
+ /* DC needs no table for refinement scan */
+ td = cinfo->Ss == 0 && cinfo->Ah == 0 ? compptr->dc_tbl_no : 0;
+ /* AC needs no table when not present */
+ ta = cinfo->Se ? compptr->ac_tbl_no : 0;
- emit_byte(cinfo, (td << 4) + ta);
- }
+ emit_byte(cinfo, (td << 4) + ta);
+ }
- emit_byte(cinfo, cinfo->Ss);
- emit_byte(cinfo, cinfo->Se);
- emit_byte(cinfo, (cinfo->Ah << 4) + cinfo->Al);
+ emit_byte(cinfo, cinfo->Ss);
+ emit_byte(cinfo, cinfo->Se);
+ emit_byte(cinfo, (cinfo->Ah << 4) + cinfo->Al);
}
@@ -351,15 +351,15 @@ LOCAL(void)
emit_pseudo_sos (j_compress_ptr cinfo)
/* Emit a pseudo SOS marker */
{
- emit_marker(cinfo, M_SOS);
+ emit_marker(cinfo, M_SOS);
- emit_2bytes(cinfo, 2 + 1 + 3); /* length */
+ emit_2bytes(cinfo, 2 + 1 + 3); /* length */
- emit_byte(cinfo, 0); /* Ns */
+ emit_byte(cinfo, 0); /* Ns */
- emit_byte(cinfo, 0); /* Ss */
- emit_byte(cinfo, cinfo->block_size * cinfo->block_size - 1); /* Se */
- emit_byte(cinfo, 0); /* Ah/Al */
+ emit_byte(cinfo, 0); /* Ss */
+ emit_byte(cinfo, cinfo->block_size * cinfo->block_size - 1); /* Se */
+ emit_byte(cinfo, 0); /* Ah/Al */
}
@@ -367,34 +367,34 @@ LOCAL(void)
emit_jfif_app0 (j_compress_ptr cinfo)
/* Emit a JFIF-compliant APP0 marker */
{
- /*
- * Length of APP0 block (2 bytes)
- * Block ID (4 bytes - ASCII "JFIF")
- * Zero byte (1 byte to terminate the ID string)
- * Version Major, Minor (2 bytes - major first)
- * Units (1 byte - 0x00 = none, 0x01 = inch, 0x02 = cm)
- * Xdpu (2 bytes - dots per unit horizontal)
- * Ydpu (2 bytes - dots per unit vertical)
- * Thumbnail X size (1 byte)
- * Thumbnail Y size (1 byte)
- */
-
- emit_marker(cinfo, M_APP0);
-
- emit_2bytes(cinfo, 2 + 4 + 1 + 2 + 1 + 2 + 2 + 1 + 1); /* length */
-
- emit_byte(cinfo, 0x4A); /* Identifier: ASCII "JFIF" */
- emit_byte(cinfo, 0x46);
- emit_byte(cinfo, 0x49);
- emit_byte(cinfo, 0x46);
- emit_byte(cinfo, 0);
- emit_byte(cinfo, cinfo->JFIF_major_version); /* Version fields */
- emit_byte(cinfo, cinfo->JFIF_minor_version);
- emit_byte(cinfo, cinfo->density_unit); /* Pixel size information */
- emit_2bytes(cinfo, (int) cinfo->X_density);
- emit_2bytes(cinfo, (int) cinfo->Y_density);
- emit_byte(cinfo, 0); /* No thumbnail image */
- emit_byte(cinfo, 0);
+ /*
+ * Length of APP0 block (2 bytes)
+ * Block ID (4 bytes - ASCII "JFIF")
+ * Zero byte (1 byte to terminate the ID string)
+ * Version Major, Minor (2 bytes - major first)
+ * Units (1 byte - 0x00 = none, 0x01 = inch, 0x02 = cm)
+ * Xdpu (2 bytes - dots per unit horizontal)
+ * Ydpu (2 bytes - dots per unit vertical)
+ * Thumbnail X size (1 byte)
+ * Thumbnail Y size (1 byte)
+ */
+
+ emit_marker(cinfo, M_APP0);
+
+ emit_2bytes(cinfo, 2 + 4 + 1 + 2 + 1 + 2 + 2 + 1 + 1); /* length */
+
+ emit_byte(cinfo, 0x4A); /* Identifier: ASCII "JFIF" */
+ emit_byte(cinfo, 0x46);
+ emit_byte(cinfo, 0x49);
+ emit_byte(cinfo, 0x46);
+ emit_byte(cinfo, 0);
+ emit_byte(cinfo, cinfo->JFIF_major_version); /* Version fields */
+ emit_byte(cinfo, cinfo->JFIF_minor_version);
+ emit_byte(cinfo, cinfo->density_unit); /* Pixel size information */
+ emit_2bytes(cinfo, (int) cinfo->X_density);
+ emit_2bytes(cinfo, (int) cinfo->Y_density);
+ emit_byte(cinfo, 0); /* No thumbnail image */
+ emit_byte(cinfo, 0);
}
@@ -402,45 +402,45 @@ LOCAL(void)
emit_adobe_app14 (j_compress_ptr cinfo)
/* Emit an Adobe APP14 marker */
{
- /*
- * Length of APP14 block (2 bytes)
- * Block ID (5 bytes - ASCII "Adobe")
- * Version Number (2 bytes - currently 100)
- * Flags0 (2 bytes - currently 0)
- * Flags1 (2 bytes - currently 0)
- * Color transform (1 byte)
- *
- * Although Adobe TN 5116 mentions Version = 101, all the Adobe files
- * now in circulation seem to use Version = 100, so that's what we write.
- *
- * We write the color transform byte as 1 if the JPEG color space is
- * YCbCr, 2 if it's YCCK, 0 otherwise. Adobe's definition has to do with
- * whether the encoder performed a transformation, which is pretty useless.
- */
-
- emit_marker(cinfo, M_APP14);
-
- emit_2bytes(cinfo, 2 + 5 + 2 + 2 + 2 + 1); /* length */
-
- emit_byte(cinfo, 0x41); /* Identifier: ASCII "Adobe" */
- emit_byte(cinfo, 0x64);
- emit_byte(cinfo, 0x6F);
- emit_byte(cinfo, 0x62);
- emit_byte(cinfo, 0x65);
- emit_2bytes(cinfo, 100); /* Version */
- emit_2bytes(cinfo, 0); /* Flags0 */
- emit_2bytes(cinfo, 0); /* Flags1 */
- switch (cinfo->jpeg_color_space) {
- case JCS_YCbCr:
- emit_byte(cinfo, 1); /* Color transform = 1 */
- break;
- case JCS_YCCK:
- emit_byte(cinfo, 2); /* Color transform = 2 */
- break;
- default:
- emit_byte(cinfo, 0); /* Color transform = 0 */
- break;
- }
+ /*
+ * Length of APP14 block (2 bytes)
+ * Block ID (5 bytes - ASCII "Adobe")
+ * Version Number (2 bytes - currently 100)
+ * Flags0 (2 bytes - currently 0)
+ * Flags1 (2 bytes - currently 0)
+ * Color transform (1 byte)
+ *
+ * Although Adobe TN 5116 mentions Version = 101, all the Adobe files
+ * now in circulation seem to use Version = 100, so that's what we write.
+ *
+ * We write the color transform byte as 1 if the JPEG color space is
+ * YCbCr, 2 if it's YCCK, 0 otherwise. Adobe's definition has to do with
+ * whether the encoder performed a transformation, which is pretty useless.
+ */
+
+ emit_marker(cinfo, M_APP14);
+
+ emit_2bytes(cinfo, 2 + 5 + 2 + 2 + 2 + 1); /* length */
+
+ emit_byte(cinfo, 0x41); /* Identifier: ASCII "Adobe" */
+ emit_byte(cinfo, 0x64);
+ emit_byte(cinfo, 0x6F);
+ emit_byte(cinfo, 0x62);
+ emit_byte(cinfo, 0x65);
+ emit_2bytes(cinfo, 100); /* Version */
+ emit_2bytes(cinfo, 0); /* Flags0 */
+ emit_2bytes(cinfo, 0); /* Flags1 */
+ switch (cinfo->jpeg_color_space) {
+ case JCS_YCbCr:
+ emit_byte(cinfo, 1); /* Color transform = 1 */
+ break;
+ case JCS_YCCK:
+ emit_byte(cinfo, 2); /* Color transform = 2 */
+ break;
+ default:
+ emit_byte(cinfo, 0); /* Color transform = 0 */
+ break;
+ }
}
@@ -456,19 +456,19 @@ METHODDEF(void)
write_marker_header (j_compress_ptr cinfo, int marker, unsigned int datalen)
/* Emit an arbitrary marker header */
{
- if (datalen > (unsigned int) 65533) /* safety check */
- ERREXIT(cinfo, JERR_BAD_LENGTH);
+ if (datalen > (unsigned int) 65533) /* safety check */
+ ERREXIT(cinfo, JERR_BAD_LENGTH);
- emit_marker(cinfo, (JPEG_MARKER) marker);
+ emit_marker(cinfo, (JPEG_MARKER) marker);
- emit_2bytes(cinfo, (int) (datalen + 2)); /* total length */
+ emit_2bytes(cinfo, (int) (datalen + 2)); /* total length */
}
METHODDEF(void)
write_marker_byte (j_compress_ptr cinfo, int val)
/* Emit one byte of marker parameters following write_marker_header */
{
- emit_byte(cinfo, val);
+ emit_byte(cinfo, val);
}
@@ -486,17 +486,17 @@ write_marker_byte (j_compress_ptr cinfo, int val)
METHODDEF(void)
write_file_header (j_compress_ptr cinfo)
{
- my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
+ my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
- emit_marker(cinfo, M_SOI); /* first the SOI */
+ emit_marker(cinfo, M_SOI); /* first the SOI */
- /* SOI is defined to reset restart interval to 0 */
- marker->last_restart_interval = 0;
+ /* SOI is defined to reset restart interval to 0 */
+ marker->last_restart_interval = 0;
- if (cinfo->write_JFIF_header) /* next an optional JFIF APP0 */
- emit_jfif_app0(cinfo);
- if (cinfo->write_Adobe_marker) /* next an optional Adobe APP14 */
- emit_adobe_app14(cinfo);
+ if (cinfo->write_JFIF_header) /* next an optional JFIF APP0 */
+ emit_jfif_app0(cinfo);
+ if (cinfo->write_Adobe_marker) /* next an optional Adobe APP14 */
+ emit_adobe_app14(cinfo);
}
@@ -511,58 +511,58 @@ write_file_header (j_compress_ptr cinfo)
METHODDEF(void)
write_frame_header (j_compress_ptr cinfo)
{
- int ci, prec;
- boolean is_baseline;
- jpeg_component_info *compptr;
-
- /* Emit DQT for each quantization table.
- * Note that emit_dqt() suppresses any duplicate tables.
- */
- prec = 0;
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- prec += emit_dqt(cinfo, compptr->quant_tbl_no);
- }
- /* now prec is nonzero iff there are any 16-bit quant tables. */
-
- /* Check for a non-baseline specification.
- * Note we assume that Huffman table numbers won't be changed later.
- */
- if (cinfo->arith_code || cinfo->progressive_mode ||
- cinfo->data_precision != 8 || cinfo->block_size != DCTSIZE) {
- is_baseline = FALSE;
- } else {
- is_baseline = TRUE;
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- if (compptr->dc_tbl_no > 1 || compptr->ac_tbl_no > 1)
+ int ci, prec;
+ boolean is_baseline;
+ jpeg_component_info *compptr;
+
+ /* Emit DQT for each quantization table.
+ * Note that emit_dqt() suppresses any duplicate tables.
+ */
+ prec = 0;
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ prec += emit_dqt(cinfo, compptr->quant_tbl_no);
+ }
+ /* now prec is nonzero iff there are any 16-bit quant tables. */
+
+ /* Check for a non-baseline specification.
+ * Note we assume that Huffman table numbers won't be changed later.
+ */
+ if (cinfo->arith_code || cinfo->progressive_mode ||
+ cinfo->data_precision != 8 || cinfo->block_size != DCTSIZE) {
is_baseline = FALSE;
- }
- if (prec && is_baseline) {
- is_baseline = FALSE;
- /* If it's baseline except for quantizer size, warn the user */
- TRACEMS(cinfo, 0, JTRC_16BIT_TABLES);
- }
- }
-
- /* Emit the proper SOF marker */
- if (cinfo->arith_code) {
- if (cinfo->progressive_mode)
- emit_sof(cinfo, M_SOF10); /* SOF code for progressive arithmetic */
- else
- emit_sof(cinfo, M_SOF9); /* SOF code for sequential arithmetic */
- } else {
- if (cinfo->progressive_mode)
- emit_sof(cinfo, M_SOF2); /* SOF code for progressive Huffman */
- else if (is_baseline)
- emit_sof(cinfo, M_SOF0); /* SOF code for baseline implementation */
- else
- emit_sof(cinfo, M_SOF1); /* SOF code for non-baseline Huffman file */
- }
-
- /* Check to emit pseudo SOS marker */
- if (cinfo->progressive_mode && cinfo->block_size != DCTSIZE)
- emit_pseudo_sos(cinfo);
+ } else {
+ is_baseline = TRUE;
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ if (compptr->dc_tbl_no > 1 || compptr->ac_tbl_no > 1)
+ is_baseline = FALSE;
+ }
+ if (prec && is_baseline) {
+ is_baseline = FALSE;
+ /* If it's baseline except for quantizer size, warn the user */
+ TRACEMS(cinfo, 0, JTRC_16BIT_TABLES);
+ }
+ }
+
+ /* Emit the proper SOF marker */
+ if (cinfo->arith_code) {
+ if (cinfo->progressive_mode)
+ emit_sof(cinfo, M_SOF10); /* SOF code for progressive arithmetic */
+ else
+ emit_sof(cinfo, M_SOF9); /* SOF code for sequential arithmetic */
+ } else {
+ if (cinfo->progressive_mode)
+ emit_sof(cinfo, M_SOF2); /* SOF code for progressive Huffman */
+ else if (is_baseline)
+ emit_sof(cinfo, M_SOF0); /* SOF code for baseline implementation */
+ else
+ emit_sof(cinfo, M_SOF1); /* SOF code for non-baseline Huffman file */
+ }
+
+ /* Check to emit pseudo SOS marker */
+ if (cinfo->progressive_mode && cinfo->block_size != DCTSIZE)
+ emit_pseudo_sos(cinfo);
}
@@ -575,40 +575,40 @@ write_frame_header (j_compress_ptr cinfo)
METHODDEF(void)
write_scan_header (j_compress_ptr cinfo)
{
- my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
- int i;
- jpeg_component_info *compptr;
-
- if (cinfo->arith_code) {
- /* Emit arith conditioning info. We may have some duplication
- * if the file has multiple scans, but it's so small it's hardly
- * worth worrying about.
- */
- emit_dac(cinfo);
- } else {
- /* Emit Huffman tables.
- * Note that emit_dht() suppresses any duplicate tables.
- */
- for (i = 0; i < cinfo->comps_in_scan; i++) {
- compptr = cinfo->cur_comp_info[i];
- /* DC needs no table for refinement scan */
- if (cinfo->Ss == 0 && cinfo->Ah == 0)
+ my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
+ int i;
+ jpeg_component_info *compptr;
+
+ if (cinfo->arith_code) {
+ /* Emit arith conditioning info. We may have some duplication
+ * if the file has multiple scans, but it's so small it's hardly
+ * worth worrying about.
+ */
+ emit_dac(cinfo);
+ } else {
+ /* Emit Huffman tables.
+ * Note that emit_dht() suppresses any duplicate tables.
+ */
+ for (i = 0; i < cinfo->comps_in_scan; i++) {
+ compptr = cinfo->cur_comp_info[i];
+ /* DC needs no table for refinement scan */
+ if (cinfo->Ss == 0 && cinfo->Ah == 0)
emit_dht(cinfo, compptr->dc_tbl_no, FALSE);
- /* AC needs no table when not present */
- if (cinfo->Se)
+ /* AC needs no table when not present */
+ if (cinfo->Se)
emit_dht(cinfo, compptr->ac_tbl_no, TRUE);
- }
- }
-
- /* Emit DRI if required --- note that DRI value could change for each scan.
- * We avoid wasting space with unnecessary DRIs, however.
- */
- if (cinfo->restart_interval != marker->last_restart_interval) {
- emit_dri(cinfo);
- marker->last_restart_interval = cinfo->restart_interval;
- }
-
- emit_sos(cinfo);
+ }
+ }
+
+ /* Emit DRI if required --- note that DRI value could change for each scan.
+ * We avoid wasting space with unnecessary DRIs, however.
+ */
+ if (cinfo->restart_interval != marker->last_restart_interval) {
+ emit_dri(cinfo);
+ marker->last_restart_interval = cinfo->restart_interval;
+ }
+
+ emit_sos(cinfo);
}
@@ -619,7 +619,7 @@ write_scan_header (j_compress_ptr cinfo)
METHODDEF(void)
write_file_trailer (j_compress_ptr cinfo)
{
- emit_marker(cinfo, M_EOI);
+ emit_marker(cinfo, M_EOI);
}
@@ -633,25 +633,25 @@ write_file_trailer (j_compress_ptr cinfo)
METHODDEF(void)
write_tables_only (j_compress_ptr cinfo)
{
- int i;
+ int i;
- emit_marker(cinfo, M_SOI);
+ emit_marker(cinfo, M_SOI);
- for (i = 0; i < NUM_QUANT_TBLS; i++) {
- if (cinfo->quant_tbl_ptrs[i] != NULL)
- (void) emit_dqt(cinfo, i);
- }
+ for (i = 0; i < NUM_QUANT_TBLS; i++) {
+ if (cinfo->quant_tbl_ptrs[i] != NULL)
+ (void) emit_dqt(cinfo, i);
+ }
- if (! cinfo->arith_code) {
- for (i = 0; i < NUM_HUFF_TBLS; i++) {
- if (cinfo->dc_huff_tbl_ptrs[i] != NULL)
+ if (! cinfo->arith_code) {
+ for (i = 0; i < NUM_HUFF_TBLS; i++) {
+ if (cinfo->dc_huff_tbl_ptrs[i] != NULL)
emit_dht(cinfo, i, FALSE);
- if (cinfo->ac_huff_tbl_ptrs[i] != NULL)
+ if (cinfo->ac_huff_tbl_ptrs[i] != NULL)
emit_dht(cinfo, i, TRUE);
- }
- }
+ }
+ }
- emit_marker(cinfo, M_EOI);
+ emit_marker(cinfo, M_EOI);
}
@@ -662,21 +662,21 @@ write_tables_only (j_compress_ptr cinfo)
GLOBAL(void)
jinit_marker_writer (j_compress_ptr cinfo)
{
- my_marker_ptr marker;
+ my_marker_ptr marker;
- /* Create the subobject */
- marker = (my_marker_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ /* Create the subobject */
+ marker = (my_marker_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_marker_writer));
- cinfo->marker = (struct jpeg_marker_writer *) marker;
- /* Initialize method pointers */
- marker->pub.write_file_header = write_file_header;
- marker->pub.write_frame_header = write_frame_header;
- marker->pub.write_scan_header = write_scan_header;
- marker->pub.write_file_trailer = write_file_trailer;
- marker->pub.write_tables_only = write_tables_only;
- marker->pub.write_marker_header = write_marker_header;
- marker->pub.write_marker_byte = write_marker_byte;
- /* Initialize private state */
- marker->last_restart_interval = 0;
+ cinfo->marker = (struct jpeg_marker_writer *) marker;
+ /* Initialize method pointers */
+ marker->pub.write_file_header = write_file_header;
+ marker->pub.write_frame_header = write_frame_header;
+ marker->pub.write_scan_header = write_scan_header;
+ marker->pub.write_file_trailer = write_file_trailer;
+ marker->pub.write_tables_only = write_tables_only;
+ marker->pub.write_marker_header = write_marker_header;
+ marker->pub.write_marker_byte = write_marker_byte;
+ /* Initialize private state */
+ marker->last_restart_interval = 0;
}
diff --git a/src/lib/libjpeg/jcmaster.c b/src/lib/libjpeg/jcmaster.c
index 2929f6b5d44..111e8309860 100644
--- a/src/lib/libjpeg/jcmaster.c
+++ b/src/lib/libjpeg/jcmaster.c
@@ -20,20 +20,20 @@
/* Private state */
typedef enum {
- main_pass, /* input data, also do first output step */
- huff_opt_pass, /* Huffman code optimization pass */
- output_pass /* data output pass */
+ main_pass, /* input data, also do first output step */
+ huff_opt_pass, /* Huffman code optimization pass */
+ output_pass /* data output pass */
} c_pass_type;
typedef struct {
- struct jpeg_comp_master pub; /* public fields */
+ struct jpeg_comp_master pub; /* public fields */
- c_pass_type pass_type; /* the type of the current pass */
+ c_pass_type pass_type; /* the type of the current pass */
- int pass_number; /* # of passes completed */
- int total_passes; /* total # of passes needed */
+ int pass_number; /* # of passes completed */
+ int total_passes; /* total # of passes needed */
- int scan_number; /* current index in scan_info[] */
+ int scan_number; /* current index in scan_info[] */
} my_comp_master;
typedef my_comp_master * my_master_ptr;
@@ -55,151 +55,151 @@ jpeg_calc_jpeg_dimensions (j_compress_ptr cinfo)
{
#ifdef DCT_SCALING_SUPPORTED
- /* Sanity check on input image dimensions to prevent overflow in
- * following calculation.
- * We do check jpeg_width and jpeg_height in initial_setup below,
- * but image_width and image_height can come from arbitrary data,
- * and we need some space for multiplication by block_size.
- */
- if (((long) cinfo->image_width >> 24) || ((long) cinfo->image_height >> 24))
- ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) JPEG_MAX_DIMENSION);
-
- /* Compute actual JPEG image dimensions and DCT scaling choices. */
- if (cinfo->scale_num >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/1 scaling */
- cinfo->jpeg_width = cinfo->image_width * cinfo->block_size;
- cinfo->jpeg_height = cinfo->image_height * cinfo->block_size;
- cinfo->min_DCT_h_scaled_size = 1;
- cinfo->min_DCT_v_scaled_size = 1;
- } else if (cinfo->scale_num * 2 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/2 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 2L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 2L);
- cinfo->min_DCT_h_scaled_size = 2;
- cinfo->min_DCT_v_scaled_size = 2;
- } else if (cinfo->scale_num * 3 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/3 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 3L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 3L);
- cinfo->min_DCT_h_scaled_size = 3;
- cinfo->min_DCT_v_scaled_size = 3;
- } else if (cinfo->scale_num * 4 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/4 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 4L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 4L);
- cinfo->min_DCT_h_scaled_size = 4;
- cinfo->min_DCT_v_scaled_size = 4;
- } else if (cinfo->scale_num * 5 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/5 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 5L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 5L);
- cinfo->min_DCT_h_scaled_size = 5;
- cinfo->min_DCT_v_scaled_size = 5;
- } else if (cinfo->scale_num * 6 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/6 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 6L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 6L);
- cinfo->min_DCT_h_scaled_size = 6;
- cinfo->min_DCT_v_scaled_size = 6;
- } else if (cinfo->scale_num * 7 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/7 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 7L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 7L);
- cinfo->min_DCT_h_scaled_size = 7;
- cinfo->min_DCT_v_scaled_size = 7;
- } else if (cinfo->scale_num * 8 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/8 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 8L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 8L);
- cinfo->min_DCT_h_scaled_size = 8;
- cinfo->min_DCT_v_scaled_size = 8;
- } else if (cinfo->scale_num * 9 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/9 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 9L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 9L);
- cinfo->min_DCT_h_scaled_size = 9;
- cinfo->min_DCT_v_scaled_size = 9;
- } else if (cinfo->scale_num * 10 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/10 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 10L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 10L);
- cinfo->min_DCT_h_scaled_size = 10;
- cinfo->min_DCT_v_scaled_size = 10;
- } else if (cinfo->scale_num * 11 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/11 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 11L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 11L);
- cinfo->min_DCT_h_scaled_size = 11;
- cinfo->min_DCT_v_scaled_size = 11;
- } else if (cinfo->scale_num * 12 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/12 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 12L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 12L);
- cinfo->min_DCT_h_scaled_size = 12;
- cinfo->min_DCT_v_scaled_size = 12;
- } else if (cinfo->scale_num * 13 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/13 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 13L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 13L);
- cinfo->min_DCT_h_scaled_size = 13;
- cinfo->min_DCT_v_scaled_size = 13;
- } else if (cinfo->scale_num * 14 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/14 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 14L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 14L);
- cinfo->min_DCT_h_scaled_size = 14;
- cinfo->min_DCT_v_scaled_size = 14;
- } else if (cinfo->scale_num * 15 >= cinfo->scale_denom * cinfo->block_size) {
- /* Provide block_size/15 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 15L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 15L);
- cinfo->min_DCT_h_scaled_size = 15;
- cinfo->min_DCT_v_scaled_size = 15;
- } else {
- /* Provide block_size/16 scaling */
- cinfo->jpeg_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 16L);
- cinfo->jpeg_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 16L);
- cinfo->min_DCT_h_scaled_size = 16;
- cinfo->min_DCT_v_scaled_size = 16;
- }
+ /* Sanity check on input image dimensions to prevent overflow in
+ * following calculation.
+ * We do check jpeg_width and jpeg_height in initial_setup below,
+ * but image_width and image_height can come from arbitrary data,
+ * and we need some space for multiplication by block_size.
+ */
+ if (((long) cinfo->image_width >> 24) || ((long) cinfo->image_height >> 24))
+ ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) JPEG_MAX_DIMENSION);
+
+ /* Compute actual JPEG image dimensions and DCT scaling choices. */
+ if (cinfo->scale_num >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/1 scaling */
+ cinfo->jpeg_width = cinfo->image_width * cinfo->block_size;
+ cinfo->jpeg_height = cinfo->image_height * cinfo->block_size;
+ cinfo->min_DCT_h_scaled_size = 1;
+ cinfo->min_DCT_v_scaled_size = 1;
+ } else if (cinfo->scale_num * 2 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/2 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 2L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 2L);
+ cinfo->min_DCT_h_scaled_size = 2;
+ cinfo->min_DCT_v_scaled_size = 2;
+ } else if (cinfo->scale_num * 3 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/3 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 3L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 3L);
+ cinfo->min_DCT_h_scaled_size = 3;
+ cinfo->min_DCT_v_scaled_size = 3;
+ } else if (cinfo->scale_num * 4 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/4 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 4L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 4L);
+ cinfo->min_DCT_h_scaled_size = 4;
+ cinfo->min_DCT_v_scaled_size = 4;
+ } else if (cinfo->scale_num * 5 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/5 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 5L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 5L);
+ cinfo->min_DCT_h_scaled_size = 5;
+ cinfo->min_DCT_v_scaled_size = 5;
+ } else if (cinfo->scale_num * 6 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/6 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 6L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 6L);
+ cinfo->min_DCT_h_scaled_size = 6;
+ cinfo->min_DCT_v_scaled_size = 6;
+ } else if (cinfo->scale_num * 7 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/7 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 7L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 7L);
+ cinfo->min_DCT_h_scaled_size = 7;
+ cinfo->min_DCT_v_scaled_size = 7;
+ } else if (cinfo->scale_num * 8 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/8 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 8L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 8L);
+ cinfo->min_DCT_h_scaled_size = 8;
+ cinfo->min_DCT_v_scaled_size = 8;
+ } else if (cinfo->scale_num * 9 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/9 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 9L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 9L);
+ cinfo->min_DCT_h_scaled_size = 9;
+ cinfo->min_DCT_v_scaled_size = 9;
+ } else if (cinfo->scale_num * 10 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/10 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 10L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 10L);
+ cinfo->min_DCT_h_scaled_size = 10;
+ cinfo->min_DCT_v_scaled_size = 10;
+ } else if (cinfo->scale_num * 11 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/11 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 11L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 11L);
+ cinfo->min_DCT_h_scaled_size = 11;
+ cinfo->min_DCT_v_scaled_size = 11;
+ } else if (cinfo->scale_num * 12 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/12 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 12L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 12L);
+ cinfo->min_DCT_h_scaled_size = 12;
+ cinfo->min_DCT_v_scaled_size = 12;
+ } else if (cinfo->scale_num * 13 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/13 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 13L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 13L);
+ cinfo->min_DCT_h_scaled_size = 13;
+ cinfo->min_DCT_v_scaled_size = 13;
+ } else if (cinfo->scale_num * 14 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/14 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 14L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 14L);
+ cinfo->min_DCT_h_scaled_size = 14;
+ cinfo->min_DCT_v_scaled_size = 14;
+ } else if (cinfo->scale_num * 15 >= cinfo->scale_denom * cinfo->block_size) {
+ /* Provide block_size/15 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 15L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 15L);
+ cinfo->min_DCT_h_scaled_size = 15;
+ cinfo->min_DCT_v_scaled_size = 15;
+ } else {
+ /* Provide block_size/16 scaling */
+ cinfo->jpeg_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * cinfo->block_size, 16L);
+ cinfo->jpeg_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * cinfo->block_size, 16L);
+ cinfo->min_DCT_h_scaled_size = 16;
+ cinfo->min_DCT_v_scaled_size = 16;
+ }
#else /* !DCT_SCALING_SUPPORTED */
- /* Hardwire it to "no scaling" */
- cinfo->jpeg_width = cinfo->image_width;
- cinfo->jpeg_height = cinfo->image_height;
- cinfo->min_DCT_h_scaled_size = DCTSIZE;
- cinfo->min_DCT_v_scaled_size = DCTSIZE;
+ /* Hardwire it to "no scaling" */
+ cinfo->jpeg_width = cinfo->image_width;
+ cinfo->jpeg_height = cinfo->image_height;
+ cinfo->min_DCT_h_scaled_size = DCTSIZE;
+ cinfo->min_DCT_v_scaled_size = DCTSIZE;
#endif /* DCT_SCALING_SUPPORTED */
}
@@ -208,11 +208,11 @@ jpeg_calc_jpeg_dimensions (j_compress_ptr cinfo)
LOCAL(void)
jpeg_calc_trans_dimensions (j_compress_ptr cinfo)
{
- if (cinfo->min_DCT_h_scaled_size != cinfo->min_DCT_v_scaled_size)
- ERREXIT2(cinfo, JERR_BAD_DCTSIZE,
- cinfo->min_DCT_h_scaled_size, cinfo->min_DCT_v_scaled_size);
+ if (cinfo->min_DCT_h_scaled_size != cinfo->min_DCT_v_scaled_size)
+ ERREXIT2(cinfo, JERR_BAD_DCTSIZE,
+ cinfo->min_DCT_h_scaled_size, cinfo->min_DCT_v_scaled_size);
- cinfo->block_size = cinfo->min_DCT_h_scaled_size;
+ cinfo->block_size = cinfo->min_DCT_h_scaled_size;
}
@@ -220,135 +220,135 @@ LOCAL(void)
initial_setup (j_compress_ptr cinfo, boolean transcode_only)
/* Do computations that are needed before master selection phase */
{
- int ci, ssize;
- jpeg_component_info *compptr;
- long samplesperrow;
- JDIMENSION jd_samplesperrow;
-
- if (transcode_only)
- jpeg_calc_trans_dimensions(cinfo);
- else
- jpeg_calc_jpeg_dimensions(cinfo);
-
- /* Sanity check on block_size */
- if (cinfo->block_size < 1 || cinfo->block_size > 16)
- ERREXIT2(cinfo, JERR_BAD_DCTSIZE, cinfo->block_size, cinfo->block_size);
-
- /* Derive natural_order from block_size */
- switch (cinfo->block_size) {
- case 2: cinfo->natural_order = jpeg_natural_order2; break;
- case 3: cinfo->natural_order = jpeg_natural_order3; break;
- case 4: cinfo->natural_order = jpeg_natural_order4; break;
- case 5: cinfo->natural_order = jpeg_natural_order5; break;
- case 6: cinfo->natural_order = jpeg_natural_order6; break;
- case 7: cinfo->natural_order = jpeg_natural_order7; break;
- default: cinfo->natural_order = jpeg_natural_order; break;
- }
-
- /* Derive lim_Se from block_size */
- cinfo->lim_Se = cinfo->block_size < DCTSIZE ?
- cinfo->block_size * cinfo->block_size - 1 : DCTSIZE2-1;
-
- /* Sanity check on image dimensions */
- if (cinfo->jpeg_height <= 0 || cinfo->jpeg_width <= 0 ||
- cinfo->num_components <= 0 || cinfo->input_components <= 0)
- ERREXIT(cinfo, JERR_EMPTY_IMAGE);
-
- /* Make sure image isn't bigger than I can handle */
- if ((long) cinfo->jpeg_height > (long) JPEG_MAX_DIMENSION ||
- (long) cinfo->jpeg_width > (long) JPEG_MAX_DIMENSION)
- ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) JPEG_MAX_DIMENSION);
-
- /* Width of an input scanline must be representable as JDIMENSION. */
- samplesperrow = (long) cinfo->image_width * (long) cinfo->input_components;
- jd_samplesperrow = (JDIMENSION) samplesperrow;
- if ((long) jd_samplesperrow != samplesperrow)
- ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
-
- /* For now, precision must match compiled-in value... */
- if (cinfo->data_precision != BITS_IN_JSAMPLE)
- ERREXIT1(cinfo, JERR_BAD_PRECISION, cinfo->data_precision);
-
- /* Check that number of components won't exceed internal array sizes */
- if (cinfo->num_components > MAX_COMPONENTS)
- ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
- MAX_COMPONENTS);
-
- /* Compute maximum sampling factors; check factor validity */
- cinfo->max_h_samp_factor = 1;
- cinfo->max_v_samp_factor = 1;
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- if (compptr->h_samp_factor<=0 || compptr->h_samp_factor>MAX_SAMP_FACTOR ||
+ int ci, ssize;
+ jpeg_component_info *compptr;
+ long samplesperrow;
+ JDIMENSION jd_samplesperrow;
+
+ if (transcode_only)
+ jpeg_calc_trans_dimensions(cinfo);
+ else
+ jpeg_calc_jpeg_dimensions(cinfo);
+
+ /* Sanity check on block_size */
+ if (cinfo->block_size < 1 || cinfo->block_size > 16)
+ ERREXIT2(cinfo, JERR_BAD_DCTSIZE, cinfo->block_size, cinfo->block_size);
+
+ /* Derive natural_order from block_size */
+ switch (cinfo->block_size) {
+ case 2: cinfo->natural_order = jpeg_natural_order2; break;
+ case 3: cinfo->natural_order = jpeg_natural_order3; break;
+ case 4: cinfo->natural_order = jpeg_natural_order4; break;
+ case 5: cinfo->natural_order = jpeg_natural_order5; break;
+ case 6: cinfo->natural_order = jpeg_natural_order6; break;
+ case 7: cinfo->natural_order = jpeg_natural_order7; break;
+ default: cinfo->natural_order = jpeg_natural_order; break;
+ }
+
+ /* Derive lim_Se from block_size */
+ cinfo->lim_Se = cinfo->block_size < DCTSIZE ?
+ cinfo->block_size * cinfo->block_size - 1 : DCTSIZE2-1;
+
+ /* Sanity check on image dimensions */
+ if (cinfo->jpeg_height <= 0 || cinfo->jpeg_width <= 0 ||
+ cinfo->num_components <= 0 || cinfo->input_components <= 0)
+ ERREXIT(cinfo, JERR_EMPTY_IMAGE);
+
+ /* Make sure image isn't bigger than I can handle */
+ if ((long) cinfo->jpeg_height > (long) JPEG_MAX_DIMENSION ||
+ (long) cinfo->jpeg_width > (long) JPEG_MAX_DIMENSION)
+ ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) JPEG_MAX_DIMENSION);
+
+ /* Width of an input scanline must be representable as JDIMENSION. */
+ samplesperrow = (long) cinfo->image_width * (long) cinfo->input_components;
+ jd_samplesperrow = (JDIMENSION) samplesperrow;
+ if ((long) jd_samplesperrow != samplesperrow)
+ ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
+
+ /* For now, precision must match compiled-in value... */
+ if (cinfo->data_precision != BITS_IN_JSAMPLE)
+ ERREXIT1(cinfo, JERR_BAD_PRECISION, cinfo->data_precision);
+
+ /* Check that number of components won't exceed internal array sizes */
+ if (cinfo->num_components > MAX_COMPONENTS)
+ ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
+ MAX_COMPONENTS);
+
+ /* Compute maximum sampling factors; check factor validity */
+ cinfo->max_h_samp_factor = 1;
+ cinfo->max_v_samp_factor = 1;
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ if (compptr->h_samp_factor<=0 || compptr->h_samp_factor>MAX_SAMP_FACTOR ||
compptr->v_samp_factor<=0 || compptr->v_samp_factor>MAX_SAMP_FACTOR)
- ERREXIT(cinfo, JERR_BAD_SAMPLING);
- cinfo->max_h_samp_factor = MAX(cinfo->max_h_samp_factor,
- compptr->h_samp_factor);
- cinfo->max_v_samp_factor = MAX(cinfo->max_v_samp_factor,
- compptr->v_samp_factor);
- }
-
- /* Compute dimensions of components */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Fill in the correct component_index value; don't rely on application */
- compptr->component_index = ci;
- /* In selecting the actual DCT scaling for each component, we try to
- * scale down the chroma components via DCT scaling rather than downsampling.
- * This saves time if the downsampler gets to use 1:1 scaling.
- * Note this code adapts subsampling ratios which are powers of 2.
- */
- ssize = 1;
+ ERREXIT(cinfo, JERR_BAD_SAMPLING);
+ cinfo->max_h_samp_factor = MAX(cinfo->max_h_samp_factor,
+ compptr->h_samp_factor);
+ cinfo->max_v_samp_factor = MAX(cinfo->max_v_samp_factor,
+ compptr->v_samp_factor);
+ }
+
+ /* Compute dimensions of components */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Fill in the correct component_index value; don't rely on application */
+ compptr->component_index = ci;
+ /* In selecting the actual DCT scaling for each component, we try to
+ * scale down the chroma components via DCT scaling rather than downsampling.
+ * This saves time if the downsampler gets to use 1:1 scaling.
+ * Note this code adapts subsampling ratios which are powers of 2.
+ */
+ ssize = 1;
#ifdef DCT_SCALING_SUPPORTED
- while (cinfo->min_DCT_h_scaled_size * ssize <=
- (cinfo->do_fancy_downsampling ? DCTSIZE : DCTSIZE / 2) &&
- (cinfo->max_h_samp_factor % (compptr->h_samp_factor * ssize * 2)) == 0) {
- ssize = ssize * 2;
- }
+ while (cinfo->min_DCT_h_scaled_size * ssize <=
+ (cinfo->do_fancy_downsampling ? DCTSIZE : DCTSIZE / 2) &&
+ (cinfo->max_h_samp_factor % (compptr->h_samp_factor * ssize * 2)) == 0) {
+ ssize = ssize * 2;
+ }
#endif
- compptr->DCT_h_scaled_size = cinfo->min_DCT_h_scaled_size * ssize;
- ssize = 1;
+ compptr->DCT_h_scaled_size = cinfo->min_DCT_h_scaled_size * ssize;
+ ssize = 1;
#ifdef DCT_SCALING_SUPPORTED
- while (cinfo->min_DCT_v_scaled_size * ssize <=
- (cinfo->do_fancy_downsampling ? DCTSIZE : DCTSIZE / 2) &&
- (cinfo->max_v_samp_factor % (compptr->v_samp_factor * ssize * 2)) == 0) {
- ssize = ssize * 2;
- }
+ while (cinfo->min_DCT_v_scaled_size * ssize <=
+ (cinfo->do_fancy_downsampling ? DCTSIZE : DCTSIZE / 2) &&
+ (cinfo->max_v_samp_factor % (compptr->v_samp_factor * ssize * 2)) == 0) {
+ ssize = ssize * 2;
+ }
#endif
- compptr->DCT_v_scaled_size = cinfo->min_DCT_v_scaled_size * ssize;
+ compptr->DCT_v_scaled_size = cinfo->min_DCT_v_scaled_size * ssize;
- /* We don't support DCT ratios larger than 2. */
- if (compptr->DCT_h_scaled_size > compptr->DCT_v_scaled_size * 2)
+ /* We don't support DCT ratios larger than 2. */
+ if (compptr->DCT_h_scaled_size > compptr->DCT_v_scaled_size * 2)
compptr->DCT_h_scaled_size = compptr->DCT_v_scaled_size * 2;
- else if (compptr->DCT_v_scaled_size > compptr->DCT_h_scaled_size * 2)
+ else if (compptr->DCT_v_scaled_size > compptr->DCT_h_scaled_size * 2)
compptr->DCT_v_scaled_size = compptr->DCT_h_scaled_size * 2;
- /* Size in DCT blocks */
- compptr->width_in_blocks = (JDIMENSION)
- jdiv_round_up((long) cinfo->jpeg_width * (long) compptr->h_samp_factor,
- (long) (cinfo->max_h_samp_factor * cinfo->block_size));
- compptr->height_in_blocks = (JDIMENSION)
- jdiv_round_up((long) cinfo->jpeg_height * (long) compptr->v_samp_factor,
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
- /* Size in samples */
- compptr->downsampled_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->jpeg_width *
- (long) (compptr->h_samp_factor * compptr->DCT_h_scaled_size),
- (long) (cinfo->max_h_samp_factor * cinfo->block_size));
- compptr->downsampled_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->jpeg_height *
- (long) (compptr->v_samp_factor * compptr->DCT_v_scaled_size),
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
- /* Mark component needed (this flag isn't actually used for compression) */
- compptr->component_needed = TRUE;
- }
-
- /* Compute number of fully interleaved MCU rows (number of times that
- * main controller will call coefficient controller).
- */
- cinfo->total_iMCU_rows = (JDIMENSION)
- jdiv_round_up((long) cinfo->jpeg_height,
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+ /* Size in DCT blocks */
+ compptr->width_in_blocks = (JDIMENSION)
+ jdiv_round_up((long) cinfo->jpeg_width * (long) compptr->h_samp_factor,
+ (long) (cinfo->max_h_samp_factor * cinfo->block_size));
+ compptr->height_in_blocks = (JDIMENSION)
+ jdiv_round_up((long) cinfo->jpeg_height * (long) compptr->v_samp_factor,
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+ /* Size in samples */
+ compptr->downsampled_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->jpeg_width *
+ (long) (compptr->h_samp_factor * compptr->DCT_h_scaled_size),
+ (long) (cinfo->max_h_samp_factor * cinfo->block_size));
+ compptr->downsampled_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->jpeg_height *
+ (long) (compptr->v_samp_factor * compptr->DCT_v_scaled_size),
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+ /* Mark component needed (this flag isn't actually used for compression) */
+ compptr->component_needed = TRUE;
+ }
+
+ /* Compute number of fully interleaved MCU rows (number of times that
+ * main controller will call coefficient controller).
+ */
+ cinfo->total_iMCU_rows = (JDIMENSION)
+ jdiv_round_up((long) cinfo->jpeg_height,
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
}
@@ -360,132 +360,132 @@ validate_script (j_compress_ptr cinfo)
* determine whether it uses progressive JPEG, and set cinfo->progressive_mode.
*/
{
- const jpeg_scan_info * scanptr;
- int scanno, ncomps, ci, coefi, thisi;
- int Ss, Se, Ah, Al;
- boolean component_sent[MAX_COMPONENTS];
+ const jpeg_scan_info * scanptr;
+ int scanno, ncomps, ci, coefi, thisi;
+ int Ss, Se, Ah, Al;
+ boolean component_sent[MAX_COMPONENTS];
#ifdef C_PROGRESSIVE_SUPPORTED
- int * last_bitpos_ptr;
- int last_bitpos[MAX_COMPONENTS][DCTSIZE2];
- /* -1 until that coefficient has been seen; then last Al for it */
+ int * last_bitpos_ptr;
+ int last_bitpos[MAX_COMPONENTS][DCTSIZE2];
+ /* -1 until that coefficient has been seen; then last Al for it */
#endif
- if (cinfo->num_scans <= 0)
- ERREXIT1(cinfo, JERR_BAD_SCAN_SCRIPT, 0);
+ if (cinfo->num_scans <= 0)
+ ERREXIT1(cinfo, JERR_BAD_SCAN_SCRIPT, 0);
- /* For sequential JPEG, all scans must have Ss=0, Se=DCTSIZE2-1;
- * for progressive JPEG, no scan can have this.
- */
- scanptr = cinfo->scan_info;
- if (scanptr->Ss != 0 || scanptr->Se != DCTSIZE2-1) {
+ /* For sequential JPEG, all scans must have Ss=0, Se=DCTSIZE2-1;
+ * for progressive JPEG, no scan can have this.
+ */
+ scanptr = cinfo->scan_info;
+ if (scanptr->Ss != 0 || scanptr->Se != DCTSIZE2-1) {
#ifdef C_PROGRESSIVE_SUPPORTED
- cinfo->progressive_mode = TRUE;
- last_bitpos_ptr = & last_bitpos[0][0];
- for (ci = 0; ci < cinfo->num_components; ci++)
- for (coefi = 0; coefi < DCTSIZE2; coefi++)
+ cinfo->progressive_mode = TRUE;
+ last_bitpos_ptr = & last_bitpos[0][0];
+ for (ci = 0; ci < cinfo->num_components; ci++)
+ for (coefi = 0; coefi < DCTSIZE2; coefi++)
*last_bitpos_ptr++ = -1;
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif
- } else {
- cinfo->progressive_mode = FALSE;
- for (ci = 0; ci < cinfo->num_components; ci++)
- component_sent[ci] = FALSE;
- }
-
- for (scanno = 1; scanno <= cinfo->num_scans; scanptr++, scanno++) {
- /* Validate component indexes */
- ncomps = scanptr->comps_in_scan;
- if (ncomps <= 0 || ncomps > MAX_COMPS_IN_SCAN)
- ERREXIT2(cinfo, JERR_COMPONENT_COUNT, ncomps, MAX_COMPS_IN_SCAN);
- for (ci = 0; ci < ncomps; ci++) {
- thisi = scanptr->component_index[ci];
- if (thisi < 0 || thisi >= cinfo->num_components)
+ } else {
+ cinfo->progressive_mode = FALSE;
+ for (ci = 0; ci < cinfo->num_components; ci++)
+ component_sent[ci] = FALSE;
+ }
+
+ for (scanno = 1; scanno <= cinfo->num_scans; scanptr++, scanno++) {
+ /* Validate component indexes */
+ ncomps = scanptr->comps_in_scan;
+ if (ncomps <= 0 || ncomps > MAX_COMPS_IN_SCAN)
+ ERREXIT2(cinfo, JERR_COMPONENT_COUNT, ncomps, MAX_COMPS_IN_SCAN);
+ for (ci = 0; ci < ncomps; ci++) {
+ thisi = scanptr->component_index[ci];
+ if (thisi < 0 || thisi >= cinfo->num_components)
ERREXIT1(cinfo, JERR_BAD_SCAN_SCRIPT, scanno);
- /* Components must appear in SOF order within each scan */
- if (ci > 0 && thisi <= scanptr->component_index[ci-1])
+ /* Components must appear in SOF order within each scan */
+ if (ci > 0 && thisi <= scanptr->component_index[ci-1])
ERREXIT1(cinfo, JERR_BAD_SCAN_SCRIPT, scanno);
- }
- /* Validate progression parameters */
- Ss = scanptr->Ss;
- Se = scanptr->Se;
- Ah = scanptr->Ah;
- Al = scanptr->Al;
- if (cinfo->progressive_mode) {
+ }
+ /* Validate progression parameters */
+ Ss = scanptr->Ss;
+ Se = scanptr->Se;
+ Ah = scanptr->Ah;
+ Al = scanptr->Al;
+ if (cinfo->progressive_mode) {
#ifdef C_PROGRESSIVE_SUPPORTED
- /* The JPEG spec simply gives the ranges 0..13 for Ah and Al, but that
- * seems wrong: the upper bound ought to depend on data precision.
- * Perhaps they really meant 0..N+1 for N-bit precision.
- * Here we allow 0..10 for 8-bit data; Al larger than 10 results in
- * out-of-range reconstructed DC values during the first DC scan,
- * which might cause problems for some decoders.
- */
+ /* The JPEG spec simply gives the ranges 0..13 for Ah and Al, but that
+ * seems wrong: the upper bound ought to depend on data precision.
+ * Perhaps they really meant 0..N+1 for N-bit precision.
+ * Here we allow 0..10 for 8-bit data; Al larger than 10 results in
+ * out-of-range reconstructed DC values during the first DC scan,
+ * which might cause problems for some decoders.
+ */
#if BITS_IN_JSAMPLE == 8
#define MAX_AH_AL 10
#else
#define MAX_AH_AL 13
#endif
- if (Ss < 0 || Ss >= DCTSIZE2 || Se < Ss || Se >= DCTSIZE2 ||
- Ah < 0 || Ah > MAX_AH_AL || Al < 0 || Al > MAX_AH_AL)
+ if (Ss < 0 || Ss >= DCTSIZE2 || Se < Ss || Se >= DCTSIZE2 ||
+ Ah < 0 || Ah > MAX_AH_AL || Al < 0 || Al > MAX_AH_AL)
ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
- if (Ss == 0) {
- if (Se != 0) /* DC and AC together not OK */
- ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
- } else {
- if (ncomps != 1) /* AC scans must be for only one component */
- ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
- }
- for (ci = 0; ci < ncomps; ci++) {
+ if (Ss == 0) {
+ if (Se != 0) /* DC and AC together not OK */
+ ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
+ } else {
+ if (ncomps != 1) /* AC scans must be for only one component */
+ ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
+ }
+ for (ci = 0; ci < ncomps; ci++) {
last_bitpos_ptr = & last_bitpos[scanptr->component_index[ci]][0];
if (Ss != 0 && last_bitpos_ptr[0] < 0) /* AC without prior DC scan */
- ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
+ ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
for (coefi = Ss; coefi <= Se; coefi++) {
- if (last_bitpos_ptr[coefi] < 0) {
- /* first scan of this coefficient */
- if (Ah != 0)
- ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
- } else {
- /* not first scan */
- if (Ah != last_bitpos_ptr[coefi] || Al != Ah-1)
- ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
- }
- last_bitpos_ptr[coefi] = Al;
- }
- }
+ if (last_bitpos_ptr[coefi] < 0) {
+ /* first scan of this coefficient */
+ if (Ah != 0)
+ ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
+ } else {
+ /* not first scan */
+ if (Ah != last_bitpos_ptr[coefi] || Al != Ah-1)
+ ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
+ }
+ last_bitpos_ptr[coefi] = Al;
+ }
+ }
#endif
- } else {
- /* For sequential JPEG, all progression parameters must be these: */
- if (Ss != 0 || Se != DCTSIZE2-1 || Ah != 0 || Al != 0)
+ } else {
+ /* For sequential JPEG, all progression parameters must be these: */
+ if (Ss != 0 || Se != DCTSIZE2-1 || Ah != 0 || Al != 0)
ERREXIT1(cinfo, JERR_BAD_PROG_SCRIPT, scanno);
- /* Make sure components are not sent twice */
- for (ci = 0; ci < ncomps; ci++) {
+ /* Make sure components are not sent twice */
+ for (ci = 0; ci < ncomps; ci++) {
thisi = scanptr->component_index[ci];
if (component_sent[thisi])
- ERREXIT1(cinfo, JERR_BAD_SCAN_SCRIPT, scanno);
+ ERREXIT1(cinfo, JERR_BAD_SCAN_SCRIPT, scanno);
component_sent[thisi] = TRUE;
- }
- }
- }
+ }
+ }
+ }
- /* Now verify that everything got sent. */
- if (cinfo->progressive_mode) {
+ /* Now verify that everything got sent. */
+ if (cinfo->progressive_mode) {
#ifdef C_PROGRESSIVE_SUPPORTED
- /* For progressive mode, we only check that at least some DC data
- * got sent for each component; the spec does not require that all bits
- * of all coefficients be transmitted. Would it be wiser to enforce
- * transmission of all coefficient bits??
- */
- for (ci = 0; ci < cinfo->num_components; ci++) {
- if (last_bitpos[ci][0] < 0)
+ /* For progressive mode, we only check that at least some DC data
+ * got sent for each component; the spec does not require that all bits
+ * of all coefficients be transmitted. Would it be wiser to enforce
+ * transmission of all coefficient bits??
+ */
+ for (ci = 0; ci < cinfo->num_components; ci++) {
+ if (last_bitpos[ci][0] < 0)
ERREXIT(cinfo, JERR_MISSING_DATA);
- }
+ }
#endif
- } else {
- for (ci = 0; ci < cinfo->num_components; ci++) {
- if (! component_sent[ci])
+ } else {
+ for (ci = 0; ci < cinfo->num_components; ci++) {
+ if (! component_sent[ci])
ERREXIT(cinfo, JERR_MISSING_DATA);
- }
- }
+ }
+ }
}
@@ -495,30 +495,30 @@ reduce_script (j_compress_ptr cinfo)
* assume that script has been validated before.
*/
{
- jpeg_scan_info * scanptr;
- int idxout, idxin;
-
- /* Circumvent const declaration for this function */
- scanptr = (jpeg_scan_info *) cinfo->scan_info;
- idxout = 0;
-
- for (idxin = 0; idxin < cinfo->num_scans; idxin++) {
- /* After skipping, idxout becomes smaller than idxin */
- if (idxin != idxout)
- /* Copy rest of data;
- * note we stay in given chunk of allocated memory.
- */
- scanptr[idxout] = scanptr[idxin];
- if (scanptr[idxout].Ss > cinfo->lim_Se)
- /* Entire scan out of range - skip this entry */
- continue;
- if (scanptr[idxout].Se > cinfo->lim_Se)
- /* Limit scan to end of block */
- scanptr[idxout].Se = cinfo->lim_Se;
- idxout++;
- }
-
- cinfo->num_scans = idxout;
+ jpeg_scan_info * scanptr;
+ int idxout, idxin;
+
+ /* Circumvent const declaration for this function */
+ scanptr = (jpeg_scan_info *) cinfo->scan_info;
+ idxout = 0;
+
+ for (idxin = 0; idxin < cinfo->num_scans; idxin++) {
+ /* After skipping, idxout becomes smaller than idxin */
+ if (idxin != idxout)
+ /* Copy rest of data;
+ * note we stay in given chunk of allocated memory.
+ */
+ scanptr[idxout] = scanptr[idxin];
+ if (scanptr[idxout].Ss > cinfo->lim_Se)
+ /* Entire scan out of range - skip this entry */
+ continue;
+ if (scanptr[idxout].Se > cinfo->lim_Se)
+ /* Limit scan to end of block */
+ scanptr[idxout].Se = cinfo->lim_Se;
+ idxout++;
+ }
+
+ cinfo->num_scans = idxout;
}
#endif /* C_MULTISCAN_FILES_SUPPORTED */
@@ -528,43 +528,43 @@ LOCAL(void)
select_scan_parameters (j_compress_ptr cinfo)
/* Set up the scan parameters for the current scan */
{
- int ci;
+ int ci;
#ifdef C_MULTISCAN_FILES_SUPPORTED
- if (cinfo->scan_info != NULL) {
- /* Prepare for current scan --- the script is already validated */
- my_master_ptr master = (my_master_ptr) cinfo->master;
- const jpeg_scan_info * scanptr = cinfo->scan_info + master->scan_number;
-
- cinfo->comps_in_scan = scanptr->comps_in_scan;
- for (ci = 0; ci < scanptr->comps_in_scan; ci++) {
- cinfo->cur_comp_info[ci] =
+ if (cinfo->scan_info != NULL) {
+ /* Prepare for current scan --- the script is already validated */
+ my_master_ptr master = (my_master_ptr) cinfo->master;
+ const jpeg_scan_info * scanptr = cinfo->scan_info + master->scan_number;
+
+ cinfo->comps_in_scan = scanptr->comps_in_scan;
+ for (ci = 0; ci < scanptr->comps_in_scan; ci++) {
+ cinfo->cur_comp_info[ci] =
&cinfo->comp_info[scanptr->component_index[ci]];
- }
- if (cinfo->progressive_mode) {
- cinfo->Ss = scanptr->Ss;
- cinfo->Se = scanptr->Se;
- cinfo->Ah = scanptr->Ah;
- cinfo->Al = scanptr->Al;
- return;
- }
- }
- else
+ }
+ if (cinfo->progressive_mode) {
+ cinfo->Ss = scanptr->Ss;
+ cinfo->Se = scanptr->Se;
+ cinfo->Ah = scanptr->Ah;
+ cinfo->Al = scanptr->Al;
+ return;
+ }
+ }
+ else
#endif
- {
- /* Prepare for single sequential-JPEG scan containing all components */
- if (cinfo->num_components > MAX_COMPS_IN_SCAN)
- ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
- MAX_COMPS_IN_SCAN);
- cinfo->comps_in_scan = cinfo->num_components;
- for (ci = 0; ci < cinfo->num_components; ci++) {
- cinfo->cur_comp_info[ci] = &cinfo->comp_info[ci];
- }
- }
- cinfo->Ss = 0;
- cinfo->Se = cinfo->block_size * cinfo->block_size - 1;
- cinfo->Ah = 0;
- cinfo->Al = 0;
+ {
+ /* Prepare for single sequential-JPEG scan containing all components */
+ if (cinfo->num_components > MAX_COMPS_IN_SCAN)
+ ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
+ MAX_COMPS_IN_SCAN);
+ cinfo->comps_in_scan = cinfo->num_components;
+ for (ci = 0; ci < cinfo->num_components; ci++) {
+ cinfo->cur_comp_info[ci] = &cinfo->comp_info[ci];
+ }
+ }
+ cinfo->Ss = 0;
+ cinfo->Se = cinfo->block_size * cinfo->block_size - 1;
+ cinfo->Ah = 0;
+ cinfo->Al = 0;
}
@@ -573,83 +573,83 @@ per_scan_setup (j_compress_ptr cinfo)
/* Do computations that are needed before processing a JPEG scan */
/* cinfo->comps_in_scan and cinfo->cur_comp_info[] are already set */
{
- int ci, mcublks, tmp;
- jpeg_component_info *compptr;
-
- if (cinfo->comps_in_scan == 1) {
-
- /* Noninterleaved (single-component) scan */
- compptr = cinfo->cur_comp_info[0];
-
- /* Overall image size in MCUs */
- cinfo->MCUs_per_row = compptr->width_in_blocks;
- cinfo->MCU_rows_in_scan = compptr->height_in_blocks;
-
- /* For noninterleaved scan, always one block per MCU */
- compptr->MCU_width = 1;
- compptr->MCU_height = 1;
- compptr->MCU_blocks = 1;
- compptr->MCU_sample_width = compptr->DCT_h_scaled_size;
- compptr->last_col_width = 1;
- /* For noninterleaved scans, it is convenient to define last_row_height
- * as the number of block rows present in the last iMCU row.
- */
- tmp = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
- if (tmp == 0) tmp = compptr->v_samp_factor;
- compptr->last_row_height = tmp;
-
- /* Prepare array describing MCU composition */
- cinfo->blocks_in_MCU = 1;
- cinfo->MCU_membership[0] = 0;
-
- } else {
-
- /* Interleaved (multi-component) scan */
- if (cinfo->comps_in_scan <= 0 || cinfo->comps_in_scan > MAX_COMPS_IN_SCAN)
- ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->comps_in_scan,
- MAX_COMPS_IN_SCAN);
-
- /* Overall image size in MCUs */
- cinfo->MCUs_per_row = (JDIMENSION)
- jdiv_round_up((long) cinfo->jpeg_width,
- (long) (cinfo->max_h_samp_factor * cinfo->block_size));
- cinfo->MCU_rows_in_scan = (JDIMENSION)
- jdiv_round_up((long) cinfo->jpeg_height,
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
-
- cinfo->blocks_in_MCU = 0;
-
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* Sampling factors give # of blocks of component in each MCU */
- compptr->MCU_width = compptr->h_samp_factor;
- compptr->MCU_height = compptr->v_samp_factor;
- compptr->MCU_blocks = compptr->MCU_width * compptr->MCU_height;
- compptr->MCU_sample_width = compptr->MCU_width * compptr->DCT_h_scaled_size;
- /* Figure number of non-dummy blocks in last MCU column & row */
- tmp = (int) (compptr->width_in_blocks % compptr->MCU_width);
- if (tmp == 0) tmp = compptr->MCU_width;
- compptr->last_col_width = tmp;
- tmp = (int) (compptr->height_in_blocks % compptr->MCU_height);
- if (tmp == 0) tmp = compptr->MCU_height;
- compptr->last_row_height = tmp;
- /* Prepare array describing MCU composition */
- mcublks = compptr->MCU_blocks;
- if (cinfo->blocks_in_MCU + mcublks > C_MAX_BLOCKS_IN_MCU)
+ int ci, mcublks, tmp;
+ jpeg_component_info *compptr;
+
+ if (cinfo->comps_in_scan == 1) {
+
+ /* Noninterleaved (single-component) scan */
+ compptr = cinfo->cur_comp_info[0];
+
+ /* Overall image size in MCUs */
+ cinfo->MCUs_per_row = compptr->width_in_blocks;
+ cinfo->MCU_rows_in_scan = compptr->height_in_blocks;
+
+ /* For noninterleaved scan, always one block per MCU */
+ compptr->MCU_width = 1;
+ compptr->MCU_height = 1;
+ compptr->MCU_blocks = 1;
+ compptr->MCU_sample_width = compptr->DCT_h_scaled_size;
+ compptr->last_col_width = 1;
+ /* For noninterleaved scans, it is convenient to define last_row_height
+ * as the number of block rows present in the last iMCU row.
+ */
+ tmp = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
+ if (tmp == 0) tmp = compptr->v_samp_factor;
+ compptr->last_row_height = tmp;
+
+ /* Prepare array describing MCU composition */
+ cinfo->blocks_in_MCU = 1;
+ cinfo->MCU_membership[0] = 0;
+
+ } else {
+
+ /* Interleaved (multi-component) scan */
+ if (cinfo->comps_in_scan <= 0 || cinfo->comps_in_scan > MAX_COMPS_IN_SCAN)
+ ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->comps_in_scan,
+ MAX_COMPS_IN_SCAN);
+
+ /* Overall image size in MCUs */
+ cinfo->MCUs_per_row = (JDIMENSION)
+ jdiv_round_up((long) cinfo->jpeg_width,
+ (long) (cinfo->max_h_samp_factor * cinfo->block_size));
+ cinfo->MCU_rows_in_scan = (JDIMENSION)
+ jdiv_round_up((long) cinfo->jpeg_height,
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+
+ cinfo->blocks_in_MCU = 0;
+
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* Sampling factors give # of blocks of component in each MCU */
+ compptr->MCU_width = compptr->h_samp_factor;
+ compptr->MCU_height = compptr->v_samp_factor;
+ compptr->MCU_blocks = compptr->MCU_width * compptr->MCU_height;
+ compptr->MCU_sample_width = compptr->MCU_width * compptr->DCT_h_scaled_size;
+ /* Figure number of non-dummy blocks in last MCU column & row */
+ tmp = (int) (compptr->width_in_blocks % compptr->MCU_width);
+ if (tmp == 0) tmp = compptr->MCU_width;
+ compptr->last_col_width = tmp;
+ tmp = (int) (compptr->height_in_blocks % compptr->MCU_height);
+ if (tmp == 0) tmp = compptr->MCU_height;
+ compptr->last_row_height = tmp;
+ /* Prepare array describing MCU composition */
+ mcublks = compptr->MCU_blocks;
+ if (cinfo->blocks_in_MCU + mcublks > C_MAX_BLOCKS_IN_MCU)
ERREXIT(cinfo, JERR_BAD_MCU_SIZE);
- while (mcublks-- > 0) {
+ while (mcublks-- > 0) {
cinfo->MCU_membership[cinfo->blocks_in_MCU++] = ci;
- }
- }
+ }
+ }
- }
+ }
- /* Convert restart specified in rows to actual MCU count. */
- /* Note that count must fit in 16 bits, so we provide limiting. */
- if (cinfo->restart_in_rows > 0) {
- long nominal = (long) cinfo->restart_in_rows * (long) cinfo->MCUs_per_row;
- cinfo->restart_interval = (unsigned int) MIN(nominal, 65535L);
- }
+ /* Convert restart specified in rows to actual MCU count. */
+ /* Note that count must fit in 16 bits, so we provide limiting. */
+ if (cinfo->restart_in_rows > 0) {
+ long nominal = (long) cinfo->restart_in_rows * (long) cinfo->MCUs_per_row;
+ cinfo->restart_interval = (unsigned int) MIN(nominal, 65535L);
+ }
}
@@ -664,78 +664,78 @@ per_scan_setup (j_compress_ptr cinfo)
METHODDEF(void)
prepare_for_pass (j_compress_ptr cinfo)
{
- my_master_ptr master = (my_master_ptr) cinfo->master;
-
- switch (master->pass_type) {
- case main_pass:
- /* Initial pass: will collect input data, and do either Huffman
- * optimization or data output for the first scan.
- */
- select_scan_parameters(cinfo);
- per_scan_setup(cinfo);
- if (! cinfo->raw_data_in) {
- (*cinfo->cconvert->start_pass) (cinfo);
- (*cinfo->downsample->start_pass) (cinfo);
- (*cinfo->prep->start_pass) (cinfo, JBUF_PASS_THRU);
- }
- (*cinfo->fdct->start_pass) (cinfo);
- (*cinfo->entropy->start_pass) (cinfo, cinfo->optimize_coding);
- (*cinfo->coef->start_pass) (cinfo,
+ my_master_ptr master = (my_master_ptr) cinfo->master;
+
+ switch (master->pass_type) {
+ case main_pass:
+ /* Initial pass: will collect input data, and do either Huffman
+ * optimization or data output for the first scan.
+ */
+ select_scan_parameters(cinfo);
+ per_scan_setup(cinfo);
+ if (! cinfo->raw_data_in) {
+ (*cinfo->cconvert->start_pass) (cinfo);
+ (*cinfo->downsample->start_pass) (cinfo);
+ (*cinfo->prep->start_pass) (cinfo, JBUF_PASS_THRU);
+ }
+ (*cinfo->fdct->start_pass) (cinfo);
+ (*cinfo->entropy->start_pass) (cinfo, cinfo->optimize_coding);
+ (*cinfo->coef->start_pass) (cinfo,
(master->total_passes > 1 ?
- JBUF_SAVE_AND_PASS : JBUF_PASS_THRU));
- (*cinfo->main->start_pass) (cinfo, JBUF_PASS_THRU);
- if (cinfo->optimize_coding) {
- /* No immediate data output; postpone writing frame/scan headers */
- master->pub.call_pass_startup = FALSE;
- } else {
- /* Will write frame/scan headers at first jpeg_write_scanlines call */
- master->pub.call_pass_startup = TRUE;
- }
- break;
+ JBUF_SAVE_AND_PASS : JBUF_PASS_THRU));
+ (*cinfo->main->start_pass) (cinfo, JBUF_PASS_THRU);
+ if (cinfo->optimize_coding) {
+ /* No immediate data output; postpone writing frame/scan headers */
+ master->pub.call_pass_startup = FALSE;
+ } else {
+ /* Will write frame/scan headers at first jpeg_write_scanlines call */
+ master->pub.call_pass_startup = TRUE;
+ }
+ break;
#ifdef ENTROPY_OPT_SUPPORTED
- case huff_opt_pass:
- /* Do Huffman optimization for a scan after the first one. */
- select_scan_parameters(cinfo);
- per_scan_setup(cinfo);
- if (cinfo->Ss != 0 || cinfo->Ah == 0) {
- (*cinfo->entropy->start_pass) (cinfo, TRUE);
- (*cinfo->coef->start_pass) (cinfo, JBUF_CRANK_DEST);
- master->pub.call_pass_startup = FALSE;
- break;
- }
- /* Special case: Huffman DC refinement scans need no Huffman table
- * and therefore we can skip the optimization pass for them.
- */
- master->pass_type = output_pass;
- master->pass_number++;
- /*FALLTHROUGH*/
+ case huff_opt_pass:
+ /* Do Huffman optimization for a scan after the first one. */
+ select_scan_parameters(cinfo);
+ per_scan_setup(cinfo);
+ if (cinfo->Ss != 0 || cinfo->Ah == 0) {
+ (*cinfo->entropy->start_pass) (cinfo, TRUE);
+ (*cinfo->coef->start_pass) (cinfo, JBUF_CRANK_DEST);
+ master->pub.call_pass_startup = FALSE;
+ break;
+ }
+ /* Special case: Huffman DC refinement scans need no Huffman table
+ * and therefore we can skip the optimization pass for them.
+ */
+ master->pass_type = output_pass;
+ master->pass_number++;
+ /*FALLTHROUGH*/
#endif
- case output_pass:
- /* Do a data-output pass. */
- /* We need not repeat per-scan setup if prior optimization pass did it. */
- if (! cinfo->optimize_coding) {
- select_scan_parameters(cinfo);
- per_scan_setup(cinfo);
- }
- (*cinfo->entropy->start_pass) (cinfo, FALSE);
- (*cinfo->coef->start_pass) (cinfo, JBUF_CRANK_DEST);
- /* We emit frame/scan headers now */
- if (master->scan_number == 0)
- (*cinfo->marker->write_frame_header) (cinfo);
- (*cinfo->marker->write_scan_header) (cinfo);
- master->pub.call_pass_startup = FALSE;
- break;
- default:
- ERREXIT(cinfo, JERR_NOT_COMPILED);
- }
-
- master->pub.is_last_pass = (master->pass_number == master->total_passes-1);
-
- /* Set up progress monitor's pass info if present */
- if (cinfo->progress != NULL) {
- cinfo->progress->completed_passes = master->pass_number;
- cinfo->progress->total_passes = master->total_passes;
- }
+ case output_pass:
+ /* Do a data-output pass. */
+ /* We need not repeat per-scan setup if prior optimization pass did it. */
+ if (! cinfo->optimize_coding) {
+ select_scan_parameters(cinfo);
+ per_scan_setup(cinfo);
+ }
+ (*cinfo->entropy->start_pass) (cinfo, FALSE);
+ (*cinfo->coef->start_pass) (cinfo, JBUF_CRANK_DEST);
+ /* We emit frame/scan headers now */
+ if (master->scan_number == 0)
+ (*cinfo->marker->write_frame_header) (cinfo);
+ (*cinfo->marker->write_scan_header) (cinfo);
+ master->pub.call_pass_startup = FALSE;
+ break;
+ default:
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
+ }
+
+ master->pub.is_last_pass = (master->pass_number == master->total_passes-1);
+
+ /* Set up progress monitor's pass info if present */
+ if (cinfo->progress != NULL) {
+ cinfo->progress->completed_passes = master->pass_number;
+ cinfo->progress->total_passes = master->total_passes;
+ }
}
@@ -752,10 +752,10 @@ prepare_for_pass (j_compress_ptr cinfo)
METHODDEF(void)
pass_startup (j_compress_ptr cinfo)
{
- cinfo->master->call_pass_startup = FALSE; /* reset flag so call only once */
+ cinfo->master->call_pass_startup = FALSE; /* reset flag so call only once */
- (*cinfo->marker->write_frame_header) (cinfo);
- (*cinfo->marker->write_scan_header) (cinfo);
+ (*cinfo->marker->write_frame_header) (cinfo);
+ (*cinfo->marker->write_scan_header) (cinfo);
}
@@ -766,36 +766,36 @@ pass_startup (j_compress_ptr cinfo)
METHODDEF(void)
finish_pass_master (j_compress_ptr cinfo)
{
- my_master_ptr master = (my_master_ptr) cinfo->master;
-
- /* The entropy coder always needs an end-of-pass call,
- * either to analyze statistics or to flush its output buffer.
- */
- (*cinfo->entropy->finish_pass) (cinfo);
-
- /* Update state for next pass */
- switch (master->pass_type) {
- case main_pass:
- /* next pass is either output of scan 0 (after optimization)
- * or output of scan 1 (if no optimization).
- */
- master->pass_type = output_pass;
- if (! cinfo->optimize_coding)
- master->scan_number++;
- break;
- case huff_opt_pass:
- /* next pass is always output of current scan */
- master->pass_type = output_pass;
- break;
- case output_pass:
- /* next pass is either optimization or output of next scan */
- if (cinfo->optimize_coding)
- master->pass_type = huff_opt_pass;
- master->scan_number++;
- break;
- }
-
- master->pass_number++;
+ my_master_ptr master = (my_master_ptr) cinfo->master;
+
+ /* The entropy coder always needs an end-of-pass call,
+ * either to analyze statistics or to flush its output buffer.
+ */
+ (*cinfo->entropy->finish_pass) (cinfo);
+
+ /* Update state for next pass */
+ switch (master->pass_type) {
+ case main_pass:
+ /* next pass is either output of scan 0 (after optimization)
+ * or output of scan 1 (if no optimization).
+ */
+ master->pass_type = output_pass;
+ if (! cinfo->optimize_coding)
+ master->scan_number++;
+ break;
+ case huff_opt_pass:
+ /* next pass is always output of current scan */
+ master->pass_type = output_pass;
+ break;
+ case output_pass:
+ /* next pass is either optimization or output of next scan */
+ if (cinfo->optimize_coding)
+ master->pass_type = huff_opt_pass;
+ master->scan_number++;
+ break;
+ }
+
+ master->pass_number++;
}
@@ -806,53 +806,53 @@ finish_pass_master (j_compress_ptr cinfo)
GLOBAL(void)
jinit_c_master_control (j_compress_ptr cinfo, boolean transcode_only)
{
- my_master_ptr master;
+ my_master_ptr master;
- master = (my_master_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- SIZEOF(my_comp_master));
- cinfo->master = (struct jpeg_comp_master *) master;
- master->pub.prepare_for_pass = prepare_for_pass;
- master->pub.pass_startup = pass_startup;
- master->pub.finish_pass = finish_pass_master;
- master->pub.is_last_pass = FALSE;
+ master = (my_master_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ SIZEOF(my_comp_master));
+ cinfo->master = (struct jpeg_comp_master *) master;
+ master->pub.prepare_for_pass = prepare_for_pass;
+ master->pub.pass_startup = pass_startup;
+ master->pub.finish_pass = finish_pass_master;
+ master->pub.is_last_pass = FALSE;
- /* Validate parameters, determine derived values */
- initial_setup(cinfo, transcode_only);
+ /* Validate parameters, determine derived values */
+ initial_setup(cinfo, transcode_only);
- if (cinfo->scan_info != NULL) {
+ if (cinfo->scan_info != NULL) {
#ifdef C_MULTISCAN_FILES_SUPPORTED
- validate_script(cinfo);
- if (cinfo->block_size < DCTSIZE)
- reduce_script(cinfo);
+ validate_script(cinfo);
+ if (cinfo->block_size < DCTSIZE)
+ reduce_script(cinfo);
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif
- } else {
- cinfo->progressive_mode = FALSE;
- cinfo->num_scans = 1;
- }
-
- if ((cinfo->progressive_mode || cinfo->block_size < DCTSIZE) &&
- !cinfo->arith_code) /* TEMPORARY HACK ??? */
- /* assume default tables no good for progressive or downscale mode */
- cinfo->optimize_coding = TRUE;
-
- /* Initialize my private state */
- if (transcode_only) {
- /* no main pass in transcoding */
- if (cinfo->optimize_coding)
- master->pass_type = huff_opt_pass;
- else
- master->pass_type = output_pass;
- } else {
- /* for normal compression, first pass is always this type: */
- master->pass_type = main_pass;
- }
- master->scan_number = 0;
- master->pass_number = 0;
- if (cinfo->optimize_coding)
- master->total_passes = cinfo->num_scans * 2;
- else
- master->total_passes = cinfo->num_scans;
+ } else {
+ cinfo->progressive_mode = FALSE;
+ cinfo->num_scans = 1;
+ }
+
+ if ((cinfo->progressive_mode || cinfo->block_size < DCTSIZE) &&
+ !cinfo->arith_code) /* TEMPORARY HACK ??? */
+ /* assume default tables no good for progressive or downscale mode */
+ cinfo->optimize_coding = TRUE;
+
+ /* Initialize my private state */
+ if (transcode_only) {
+ /* no main pass in transcoding */
+ if (cinfo->optimize_coding)
+ master->pass_type = huff_opt_pass;
+ else
+ master->pass_type = output_pass;
+ } else {
+ /* for normal compression, first pass is always this type: */
+ master->pass_type = main_pass;
+ }
+ master->scan_number = 0;
+ master->pass_number = 0;
+ if (cinfo->optimize_coding)
+ master->total_passes = cinfo->num_scans * 2;
+ else
+ master->total_passes = cinfo->num_scans;
}
diff --git a/src/lib/libjpeg/jcomapi.c b/src/lib/libjpeg/jcomapi.c
index 9b1fa7568a6..fbfb6ecd634 100644
--- a/src/lib/libjpeg/jcomapi.c
+++ b/src/lib/libjpeg/jcomapi.c
@@ -28,29 +28,29 @@
GLOBAL(void)
jpeg_abort (j_common_ptr cinfo)
{
- int pool;
-
- /* Do nothing if called on a not-initialized or destroyed JPEG object. */
- if (cinfo->mem == NULL)
- return;
-
- /* Releasing pools in reverse order might help avoid fragmentation
- * with some (brain-damaged) malloc libraries.
- */
- for (pool = JPOOL_NUMPOOLS-1; pool > JPOOL_PERMANENT; pool--) {
- (*cinfo->mem->free_pool) (cinfo, pool);
- }
-
- /* Reset overall state for possible reuse of object */
- if (cinfo->is_decompressor) {
- cinfo->global_state = DSTATE_START;
- /* Try to keep application from accessing now-deleted marker list.
- * A bit kludgy to do it here, but this is the most central place.
- */
- ((j_decompress_ptr) cinfo)->marker_list = NULL;
- } else {
- cinfo->global_state = CSTATE_START;
- }
+ int pool;
+
+ /* Do nothing if called on a not-initialized or destroyed JPEG object. */
+ if (cinfo->mem == NULL)
+ return;
+
+ /* Releasing pools in reverse order might help avoid fragmentation
+ * with some (brain-damaged) malloc libraries.
+ */
+ for (pool = JPOOL_NUMPOOLS-1; pool > JPOOL_PERMANENT; pool--) {
+ (*cinfo->mem->free_pool) (cinfo, pool);
+ }
+
+ /* Reset overall state for possible reuse of object */
+ if (cinfo->is_decompressor) {
+ cinfo->global_state = DSTATE_START;
+ /* Try to keep application from accessing now-deleted marker list.
+ * A bit kludgy to do it here, but this is the most central place.
+ */
+ ((j_decompress_ptr) cinfo)->marker_list = NULL;
+ } else {
+ cinfo->global_state = CSTATE_START;
+ }
}
@@ -68,12 +68,12 @@ jpeg_abort (j_common_ptr cinfo)
GLOBAL(void)
jpeg_destroy (j_common_ptr cinfo)
{
- /* We need only tell the memory manager to release everything. */
- /* NB: mem pointer is NULL if memory mgr failed to initialize. */
- if (cinfo->mem != NULL)
- (*cinfo->mem->self_destruct) (cinfo);
- cinfo->mem = NULL; /* be safe if jpeg_destroy is called twice */
- cinfo->global_state = 0; /* mark it destroyed */
+ /* We need only tell the memory manager to release everything. */
+ /* NB: mem pointer is NULL if memory mgr failed to initialize. */
+ if (cinfo->mem != NULL)
+ (*cinfo->mem->self_destruct) (cinfo);
+ cinfo->mem = NULL; /* be safe if jpeg_destroy is called twice */
+ cinfo->global_state = 0; /* mark it destroyed */
}
@@ -85,22 +85,22 @@ jpeg_destroy (j_common_ptr cinfo)
GLOBAL(JQUANT_TBL *)
jpeg_alloc_quant_table (j_common_ptr cinfo)
{
- JQUANT_TBL *tbl;
+ JQUANT_TBL *tbl;
- tbl = (JQUANT_TBL *)
- (*cinfo->mem->alloc_small) (cinfo, JPOOL_PERMANENT, SIZEOF(JQUANT_TBL));
- tbl->sent_table = FALSE; /* make sure this is false in any new table */
- return tbl;
+ tbl = (JQUANT_TBL *)
+ (*cinfo->mem->alloc_small) (cinfo, JPOOL_PERMANENT, SIZEOF(JQUANT_TBL));
+ tbl->sent_table = FALSE; /* make sure this is false in any new table */
+ return tbl;
}
GLOBAL(JHUFF_TBL *)
jpeg_alloc_huff_table (j_common_ptr cinfo)
{
- JHUFF_TBL *tbl;
+ JHUFF_TBL *tbl;
- tbl = (JHUFF_TBL *)
- (*cinfo->mem->alloc_small) (cinfo, JPOOL_PERMANENT, SIZEOF(JHUFF_TBL));
- tbl->sent_table = FALSE; /* make sure this is false in any new table */
- return tbl;
+ tbl = (JHUFF_TBL *)
+ (*cinfo->mem->alloc_small) (cinfo, JPOOL_PERMANENT, SIZEOF(JHUFF_TBL));
+ tbl->sent_table = FALSE; /* make sure this is false in any new table */
+ return tbl;
}
diff --git a/src/lib/libjpeg/jconfig.h b/src/lib/libjpeg/jconfig.h
index 679404da4ee..719ff11eac2 100644
--- a/src/lib/libjpeg/jconfig.h
+++ b/src/lib/libjpeg/jconfig.h
@@ -11,15 +11,15 @@
#define HAVE_STDLIB_H
#undef NEED_BSD_STRINGS
#undef NEED_SYS_TYPES_H
-#undef NEED_FAR_POINTERS /* we presume a 32-bit flat memory model */
+#undef NEED_FAR_POINTERS /* we presume a 32-bit flat memory model */
#undef NEED_SHORT_EXTERNAL_NAMES
#undef INCOMPLETE_TYPES_BROKEN
/* Define "boolean" as unsigned char, not int, per Windows custom */
-#ifndef __RPCNDR_H__ /* don't conflict if rpcndr.h already read */
+#ifndef __RPCNDR_H__ /* don't conflict if rpcndr.h already read */
typedef unsigned char boolean;
#endif
-#define HAVE_BOOLEAN /* prevent jmorecfg.h from redefining it */
+#define HAVE_BOOLEAN /* prevent jmorecfg.h from redefining it */
#ifdef JPEG_INTERNALS
@@ -30,16 +30,16 @@ typedef unsigned char boolean;
#ifdef JPEG_CJPEG_DJPEG
-#define BMP_SUPPORTED /* BMP image file format */
-#define GIF_SUPPORTED /* GIF image file format */
-#define PPM_SUPPORTED /* PBMPLUS PPM/PGM image file format */
-#undef RLE_SUPPORTED /* Utah RLE image file format */
-#define TARGA_SUPPORTED /* Targa image file format */
+#define BMP_SUPPORTED /* BMP image file format */
+#define GIF_SUPPORTED /* GIF image file format */
+#define PPM_SUPPORTED /* PBMPLUS PPM/PGM image file format */
+#undef RLE_SUPPORTED /* Utah RLE image file format */
+#define TARGA_SUPPORTED /* Targa image file format */
-#define TWO_FILE_COMMANDLINE /* optional */
-#define USE_SETMODE /* Microsoft has setmode() */
+#define TWO_FILE_COMMANDLINE /* optional */
+#define USE_SETMODE /* Microsoft has setmode() */
#undef NEED_SIGNAL_CATCHER
#undef DONT_USE_B_MODE
-#undef PROGRESS_REPORT /* optional */
+#undef PROGRESS_REPORT /* optional */
#endif /* JPEG_CJPEG_DJPEG */
diff --git a/src/lib/libjpeg/jcparam.c b/src/lib/libjpeg/jcparam.c
index e974fec994f..26344b233e1 100644
--- a/src/lib/libjpeg/jcparam.c
+++ b/src/lib/libjpeg/jcparam.c
@@ -22,42 +22,42 @@
GLOBAL(void)
jpeg_add_quant_table (j_compress_ptr cinfo, int which_tbl,
- const unsigned int *basic_table,
- int scale_factor, boolean force_baseline)
+ const unsigned int *basic_table,
+ int scale_factor, boolean force_baseline)
/* Define a quantization table equal to the basic_table times
* a scale factor (given as a percentage).
* If force_baseline is TRUE, the computed quantization table entries
* are limited to 1..255 for JPEG baseline compatibility.
*/
{
- JQUANT_TBL ** qtblptr;
- int i;
- long temp;
-
- /* Safety check to ensure start_compress not called yet. */
- if (cinfo->global_state != CSTATE_START)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- if (which_tbl < 0 || which_tbl >= NUM_QUANT_TBLS)
- ERREXIT1(cinfo, JERR_DQT_INDEX, which_tbl);
-
- qtblptr = & cinfo->quant_tbl_ptrs[which_tbl];
-
- if (*qtblptr == NULL)
- *qtblptr = jpeg_alloc_quant_table((j_common_ptr) cinfo);
-
- for (i = 0; i < DCTSIZE2; i++) {
- temp = ((long) basic_table[i] * scale_factor + 50L) / 100L;
- /* limit the values to the valid range */
- if (temp <= 0L) temp = 1L;
- if (temp > 32767L) temp = 32767L; /* max quantizer needed for 12 bits */
- if (force_baseline && temp > 255L)
- temp = 255L; /* limit to baseline range if requested */
- (*qtblptr)->quantval[i] = (UINT16) temp;
- }
-
- /* Initialize sent_table FALSE so table will be written to JPEG file. */
- (*qtblptr)->sent_table = FALSE;
+ JQUANT_TBL ** qtblptr;
+ int i;
+ long temp;
+
+ /* Safety check to ensure start_compress not called yet. */
+ if (cinfo->global_state != CSTATE_START)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ if (which_tbl < 0 || which_tbl >= NUM_QUANT_TBLS)
+ ERREXIT1(cinfo, JERR_DQT_INDEX, which_tbl);
+
+ qtblptr = & cinfo->quant_tbl_ptrs[which_tbl];
+
+ if (*qtblptr == NULL)
+ *qtblptr = jpeg_alloc_quant_table((j_common_ptr) cinfo);
+
+ for (i = 0; i < DCTSIZE2; i++) {
+ temp = ((long) basic_table[i] * scale_factor + 50L) / 100L;
+ /* limit the values to the valid range */
+ if (temp <= 0L) temp = 1L;
+ if (temp > 32767L) temp = 32767L; /* max quantizer needed for 12 bits */
+ if (force_baseline && temp > 255L)
+ temp = 255L; /* limit to baseline range if requested */
+ (*qtblptr)->quantval[i] = (UINT16) temp;
+ }
+
+ /* Initialize sent_table FALSE so table will be written to JPEG file. */
+ (*qtblptr)->sent_table = FALSE;
}
@@ -66,24 +66,24 @@ jpeg_add_quant_table (j_compress_ptr cinfo, int which_tbl,
* when divided by 2, "very good" quality.
*/
static const unsigned int std_luminance_quant_tbl[DCTSIZE2] = {
- 16, 11, 10, 16, 24, 40, 51, 61,
- 12, 12, 14, 19, 26, 58, 60, 55,
- 14, 13, 16, 24, 40, 57, 69, 56,
- 14, 17, 22, 29, 51, 87, 80, 62,
- 18, 22, 37, 56, 68, 109, 103, 77,
- 24, 35, 55, 64, 81, 104, 113, 92,
- 49, 64, 78, 87, 103, 121, 120, 101,
- 72, 92, 95, 98, 112, 100, 103, 99
+ 16, 11, 10, 16, 24, 40, 51, 61,
+ 12, 12, 14, 19, 26, 58, 60, 55,
+ 14, 13, 16, 24, 40, 57, 69, 56,
+ 14, 17, 22, 29, 51, 87, 80, 62,
+ 18, 22, 37, 56, 68, 109, 103, 77,
+ 24, 35, 55, 64, 81, 104, 113, 92,
+ 49, 64, 78, 87, 103, 121, 120, 101,
+ 72, 92, 95, 98, 112, 100, 103, 99
};
static const unsigned int std_chrominance_quant_tbl[DCTSIZE2] = {
- 17, 18, 24, 47, 99, 99, 99, 99,
- 18, 21, 26, 66, 99, 99, 99, 99,
- 24, 26, 56, 99, 99, 99, 99, 99,
- 47, 66, 99, 99, 99, 99, 99, 99,
- 99, 99, 99, 99, 99, 99, 99, 99,
- 99, 99, 99, 99, 99, 99, 99, 99,
- 99, 99, 99, 99, 99, 99, 99, 99,
- 99, 99, 99, 99, 99, 99, 99, 99
+ 17, 18, 24, 47, 99, 99, 99, 99,
+ 18, 21, 26, 66, 99, 99, 99, 99,
+ 24, 26, 56, 99, 99, 99, 99, 99,
+ 47, 66, 99, 99, 99, 99, 99, 99,
+ 99, 99, 99, 99, 99, 99, 99, 99,
+ 99, 99, 99, 99, 99, 99, 99, 99,
+ 99, 99, 99, 99, 99, 99, 99, 99,
+ 99, 99, 99, 99, 99, 99, 99, 99
};
@@ -94,28 +94,28 @@ jpeg_default_qtables (j_compress_ptr cinfo, boolean force_baseline)
* This entry point allows different scalings for luminance and chrominance.
*/
{
- /* Set up two quantization tables using the specified scaling */
- jpeg_add_quant_table(cinfo, 0, std_luminance_quant_tbl,
- cinfo->q_scale_factor[0], force_baseline);
- jpeg_add_quant_table(cinfo, 1, std_chrominance_quant_tbl,
- cinfo->q_scale_factor[1], force_baseline);
+ /* Set up two quantization tables using the specified scaling */
+ jpeg_add_quant_table(cinfo, 0, std_luminance_quant_tbl,
+ cinfo->q_scale_factor[0], force_baseline);
+ jpeg_add_quant_table(cinfo, 1, std_chrominance_quant_tbl,
+ cinfo->q_scale_factor[1], force_baseline);
}
GLOBAL(void)
jpeg_set_linear_quality (j_compress_ptr cinfo, int scale_factor,
- boolean force_baseline)
+ boolean force_baseline)
/* Set or change the 'quality' (quantization) setting, using default tables
* and a straight percentage-scaling quality scale. In most cases it's better
* to use jpeg_set_quality (below); this entry point is provided for
* applications that insist on a linear percentage scaling.
*/
{
- /* Set up two quantization tables using the specified scaling */
- jpeg_add_quant_table(cinfo, 0, std_luminance_quant_tbl,
- scale_factor, force_baseline);
- jpeg_add_quant_table(cinfo, 1, std_chrominance_quant_tbl,
- scale_factor, force_baseline);
+ /* Set up two quantization tables using the specified scaling */
+ jpeg_add_quant_table(cinfo, 0, std_luminance_quant_tbl,
+ scale_factor, force_baseline);
+ jpeg_add_quant_table(cinfo, 1, std_chrominance_quant_tbl,
+ scale_factor, force_baseline);
}
@@ -126,22 +126,22 @@ jpeg_quality_scaling (int quality)
* The input 'quality' factor should be 0 (terrible) to 100 (very good).
*/
{
- /* Safety limit on quality factor. Convert 0 to 1 to avoid zero divide. */
- if (quality <= 0) quality = 1;
- if (quality > 100) quality = 100;
-
- /* The basic table is used as-is (scaling 100) for a quality of 50.
- * Qualities 50..100 are converted to scaling percentage 200 - 2*Q;
- * note that at Q=100 the scaling is 0, which will cause jpeg_add_quant_table
- * to make all the table entries 1 (hence, minimum quantization loss).
- * Qualities 1..50 are converted to scaling percentage 5000/Q.
- */
- if (quality < 50)
- quality = 5000 / quality;
- else
- quality = 200 - quality*2;
-
- return quality;
+ /* Safety limit on quality factor. Convert 0 to 1 to avoid zero divide. */
+ if (quality <= 0) quality = 1;
+ if (quality > 100) quality = 100;
+
+ /* The basic table is used as-is (scaling 100) for a quality of 50.
+ * Qualities 50..100 are converted to scaling percentage 200 - 2*Q;
+ * note that at Q=100 the scaling is 0, which will cause jpeg_add_quant_table
+ * to make all the table entries 1 (hence, minimum quantization loss).
+ * Qualities 1..50 are converted to scaling percentage 5000/Q.
+ */
+ if (quality < 50)
+ quality = 5000 / quality;
+ else
+ quality = 200 - quality*2;
+
+ return quality;
}
@@ -153,11 +153,11 @@ jpeg_set_quality (j_compress_ptr cinfo, int quality, boolean force_baseline)
* would use the preceding three routines directly.
*/
{
- /* Convert user 0-100 rating to percentage scaling */
- quality = jpeg_quality_scaling(quality);
+ /* Convert user 0-100 rating to percentage scaling */
+ quality = jpeg_quality_scaling(quality);
- /* Set up standard quality tables */
- jpeg_set_linear_quality(cinfo, quality, force_baseline);
+ /* Set up standard quality tables */
+ jpeg_set_linear_quality(cinfo, quality, force_baseline);
}
@@ -170,28 +170,28 @@ add_huff_table (j_compress_ptr cinfo,
JHUFF_TBL **htblptr, const UINT8 *bits, const UINT8 *val)
/* Define a Huffman table */
{
- int nsymbols, len;
+ int nsymbols, len;
- if (*htblptr == NULL)
- *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
+ if (*htblptr == NULL)
+ *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
- /* Copy the number-of-symbols-of-each-code-length counts */
- MEMCOPY((*htblptr)->bits, bits, SIZEOF((*htblptr)->bits));
+ /* Copy the number-of-symbols-of-each-code-length counts */
+ MEMCOPY((*htblptr)->bits, bits, SIZEOF((*htblptr)->bits));
- /* Validate the counts. We do this here mainly so we can copy the right
- * number of symbols from the val[] array, without risking marching off
- * the end of memory. jchuff.c will do a more thorough test later.
- */
- nsymbols = 0;
- for (len = 1; len <= 16; len++)
- nsymbols += bits[len];
- if (nsymbols < 1 || nsymbols > 256)
- ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
+ /* Validate the counts. We do this here mainly so we can copy the right
+ * number of symbols from the val[] array, without risking marching off
+ * the end of memory. jchuff.c will do a more thorough test later.
+ */
+ nsymbols = 0;
+ for (len = 1; len <= 16; len++)
+ nsymbols += bits[len];
+ if (nsymbols < 1 || nsymbols > 256)
+ ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
- MEMCOPY((*htblptr)->huffval, val, nsymbols * SIZEOF(UINT8));
+ MEMCOPY((*htblptr)->huffval, val, nsymbols * SIZEOF(UINT8));
- /* Initialize sent_table FALSE so table will be written to JPEG file. */
- (*htblptr)->sent_table = FALSE;
+ /* Initialize sent_table FALSE so table will be written to JPEG file. */
+ (*htblptr)->sent_table = FALSE;
}
@@ -200,74 +200,74 @@ std_huff_tables (j_compress_ptr cinfo)
/* Set up the standard Huffman tables (cf. JPEG standard section K.3) */
/* IMPORTANT: these are only valid for 8-bit data precision! */
{
- static const UINT8 bits_dc_luminance[17] =
- { /* 0-base */ 0, 0, 1, 5, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0 };
- static const UINT8 val_dc_luminance[] =
- { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 };
-
- static const UINT8 bits_dc_chrominance[17] =
- { /* 0-base */ 0, 0, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0 };
- static const UINT8 val_dc_chrominance[] =
- { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 };
-
- static const UINT8 bits_ac_luminance[17] =
- { /* 0-base */ 0, 0, 2, 1, 3, 3, 2, 4, 3, 5, 5, 4, 4, 0, 0, 1, 0x7d };
- static const UINT8 val_ac_luminance[] =
- { 0x01, 0x02, 0x03, 0x00, 0x04, 0x11, 0x05, 0x12,
- 0x21, 0x31, 0x41, 0x06, 0x13, 0x51, 0x61, 0x07,
- 0x22, 0x71, 0x14, 0x32, 0x81, 0x91, 0xa1, 0x08,
- 0x23, 0x42, 0xb1, 0xc1, 0x15, 0x52, 0xd1, 0xf0,
- 0x24, 0x33, 0x62, 0x72, 0x82, 0x09, 0x0a, 0x16,
- 0x17, 0x18, 0x19, 0x1a, 0x25, 0x26, 0x27, 0x28,
- 0x29, 0x2a, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
- 0x3a, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
- 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,
- 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69,
- 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79,
- 0x7a, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89,
- 0x8a, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98,
- 0x99, 0x9a, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
- 0xa8, 0xa9, 0xaa, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6,
- 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3, 0xc4, 0xc5,
- 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2, 0xd3, 0xd4,
- 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xe1, 0xe2,
- 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea,
- 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8,
- 0xf9, 0xfa };
-
- static const UINT8 bits_ac_chrominance[17] =
- { /* 0-base */ 0, 0, 2, 1, 2, 4, 4, 3, 4, 7, 5, 4, 4, 0, 1, 2, 0x77 };
- static const UINT8 val_ac_chrominance[] =
- { 0x00, 0x01, 0x02, 0x03, 0x11, 0x04, 0x05, 0x21,
- 0x31, 0x06, 0x12, 0x41, 0x51, 0x07, 0x61, 0x71,
- 0x13, 0x22, 0x32, 0x81, 0x08, 0x14, 0x42, 0x91,
- 0xa1, 0xb1, 0xc1, 0x09, 0x23, 0x33, 0x52, 0xf0,
- 0x15, 0x62, 0x72, 0xd1, 0x0a, 0x16, 0x24, 0x34,
- 0xe1, 0x25, 0xf1, 0x17, 0x18, 0x19, 0x1a, 0x26,
- 0x27, 0x28, 0x29, 0x2a, 0x35, 0x36, 0x37, 0x38,
- 0x39, 0x3a, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48,
- 0x49, 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
- 0x59, 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
- 0x69, 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
- 0x79, 0x7a, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
- 0x88, 0x89, 0x8a, 0x92, 0x93, 0x94, 0x95, 0x96,
- 0x97, 0x98, 0x99, 0x9a, 0xa2, 0xa3, 0xa4, 0xa5,
- 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xb2, 0xb3, 0xb4,
- 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3,
- 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2,
- 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda,
- 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9,
- 0xea, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8,
- 0xf9, 0xfa };
-
- add_huff_table(cinfo, &cinfo->dc_huff_tbl_ptrs[0],
- bits_dc_luminance, val_dc_luminance);
- add_huff_table(cinfo, &cinfo->ac_huff_tbl_ptrs[0],
- bits_ac_luminance, val_ac_luminance);
- add_huff_table(cinfo, &cinfo->dc_huff_tbl_ptrs[1],
- bits_dc_chrominance, val_dc_chrominance);
- add_huff_table(cinfo, &cinfo->ac_huff_tbl_ptrs[1],
- bits_ac_chrominance, val_ac_chrominance);
+ static const UINT8 bits_dc_luminance[17] =
+ { /* 0-base */ 0, 0, 1, 5, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0 };
+ static const UINT8 val_dc_luminance[] =
+ { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 };
+
+ static const UINT8 bits_dc_chrominance[17] =
+ { /* 0-base */ 0, 0, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0 };
+ static const UINT8 val_dc_chrominance[] =
+ { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 };
+
+ static const UINT8 bits_ac_luminance[17] =
+ { /* 0-base */ 0, 0, 2, 1, 3, 3, 2, 4, 3, 5, 5, 4, 4, 0, 0, 1, 0x7d };
+ static const UINT8 val_ac_luminance[] =
+ { 0x01, 0x02, 0x03, 0x00, 0x04, 0x11, 0x05, 0x12,
+ 0x21, 0x31, 0x41, 0x06, 0x13, 0x51, 0x61, 0x07,
+ 0x22, 0x71, 0x14, 0x32, 0x81, 0x91, 0xa1, 0x08,
+ 0x23, 0x42, 0xb1, 0xc1, 0x15, 0x52, 0xd1, 0xf0,
+ 0x24, 0x33, 0x62, 0x72, 0x82, 0x09, 0x0a, 0x16,
+ 0x17, 0x18, 0x19, 0x1a, 0x25, 0x26, 0x27, 0x28,
+ 0x29, 0x2a, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39,
+ 0x3a, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49,
+ 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59,
+ 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69,
+ 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79,
+ 0x7a, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89,
+ 0x8a, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98,
+ 0x99, 0x9a, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
+ 0xa8, 0xa9, 0xaa, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6,
+ 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3, 0xc4, 0xc5,
+ 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2, 0xd3, 0xd4,
+ 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda, 0xe1, 0xe2,
+ 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9, 0xea,
+ 0xf1, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8,
+ 0xf9, 0xfa };
+
+ static const UINT8 bits_ac_chrominance[17] =
+ { /* 0-base */ 0, 0, 2, 1, 2, 4, 4, 3, 4, 7, 5, 4, 4, 0, 1, 2, 0x77 };
+ static const UINT8 val_ac_chrominance[] =
+ { 0x00, 0x01, 0x02, 0x03, 0x11, 0x04, 0x05, 0x21,
+ 0x31, 0x06, 0x12, 0x41, 0x51, 0x07, 0x61, 0x71,
+ 0x13, 0x22, 0x32, 0x81, 0x08, 0x14, 0x42, 0x91,
+ 0xa1, 0xb1, 0xc1, 0x09, 0x23, 0x33, 0x52, 0xf0,
+ 0x15, 0x62, 0x72, 0xd1, 0x0a, 0x16, 0x24, 0x34,
+ 0xe1, 0x25, 0xf1, 0x17, 0x18, 0x19, 0x1a, 0x26,
+ 0x27, 0x28, 0x29, 0x2a, 0x35, 0x36, 0x37, 0x38,
+ 0x39, 0x3a, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48,
+ 0x49, 0x4a, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58,
+ 0x59, 0x5a, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68,
+ 0x69, 0x6a, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78,
+ 0x79, 0x7a, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
+ 0x88, 0x89, 0x8a, 0x92, 0x93, 0x94, 0x95, 0x96,
+ 0x97, 0x98, 0x99, 0x9a, 0xa2, 0xa3, 0xa4, 0xa5,
+ 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xb2, 0xb3, 0xb4,
+ 0xb5, 0xb6, 0xb7, 0xb8, 0xb9, 0xba, 0xc2, 0xc3,
+ 0xc4, 0xc5, 0xc6, 0xc7, 0xc8, 0xc9, 0xca, 0xd2,
+ 0xd3, 0xd4, 0xd5, 0xd6, 0xd7, 0xd8, 0xd9, 0xda,
+ 0xe2, 0xe3, 0xe4, 0xe5, 0xe6, 0xe7, 0xe8, 0xe9,
+ 0xea, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7, 0xf8,
+ 0xf9, 0xfa };
+
+ add_huff_table(cinfo, &cinfo->dc_huff_tbl_ptrs[0],
+ bits_dc_luminance, val_dc_luminance);
+ add_huff_table(cinfo, &cinfo->ac_huff_tbl_ptrs[0],
+ bits_ac_luminance, val_ac_luminance);
+ add_huff_table(cinfo, &cinfo->dc_huff_tbl_ptrs[1],
+ bits_dc_chrominance, val_dc_chrominance);
+ add_huff_table(cinfo, &cinfo->ac_huff_tbl_ptrs[1],
+ bits_ac_chrominance, val_ac_chrominance);
}
@@ -284,92 +284,92 @@ std_huff_tables (j_compress_ptr cinfo)
GLOBAL(void)
jpeg_set_defaults (j_compress_ptr cinfo)
{
- int i;
-
- /* Safety check to ensure start_compress not called yet. */
- if (cinfo->global_state != CSTATE_START)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- /* Allocate comp_info array large enough for maximum component count.
- * Array is made permanent in case application wants to compress
- * multiple images at same param settings.
- */
- if (cinfo->comp_info == NULL)
- cinfo->comp_info = (jpeg_component_info *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
- MAX_COMPONENTS * SIZEOF(jpeg_component_info));
-
- /* Initialize everything not dependent on the color space */
-
- cinfo->scale_num = 1; /* 1:1 scaling */
- cinfo->scale_denom = 1;
- cinfo->data_precision = BITS_IN_JSAMPLE;
- /* Set up two quantization tables using default quality of 75 */
- jpeg_set_quality(cinfo, 75, TRUE);
- /* Set up two Huffman tables */
- std_huff_tables(cinfo);
-
- /* Initialize default arithmetic coding conditioning */
- for (i = 0; i < NUM_ARITH_TBLS; i++) {
- cinfo->arith_dc_L[i] = 0;
- cinfo->arith_dc_U[i] = 1;
- cinfo->arith_ac_K[i] = 5;
- }
-
- /* Default is no multiple-scan output */
- cinfo->scan_info = NULL;
- cinfo->num_scans = 0;
-
- /* Expect normal source image, not raw downsampled data */
- cinfo->raw_data_in = FALSE;
-
- /* Use Huffman coding, not arithmetic coding, by default */
- cinfo->arith_code = FALSE;
-
- /* By default, don't do extra passes to optimize entropy coding */
- cinfo->optimize_coding = FALSE;
- /* The standard Huffman tables are only valid for 8-bit data precision.
- * If the precision is higher, force optimization on so that usable
- * tables will be computed. This test can be removed if default tables
- * are supplied that are valid for the desired precision.
- */
- if (cinfo->data_precision > 8)
- cinfo->optimize_coding = TRUE;
-
- /* By default, use the simpler non-cosited sampling alignment */
- cinfo->CCIR601_sampling = FALSE;
-
- /* By default, apply fancy downsampling */
- cinfo->do_fancy_downsampling = TRUE;
-
- /* No input smoothing */
- cinfo->smoothing_factor = 0;
-
- /* DCT algorithm preference */
- cinfo->dct_method = JDCT_DEFAULT;
-
- /* No restart markers */
- cinfo->restart_interval = 0;
- cinfo->restart_in_rows = 0;
-
- /* Fill in default JFIF marker parameters. Note that whether the marker
- * will actually be written is determined by jpeg_set_colorspace.
- *
- * By default, the library emits JFIF version code 1.01.
- * An application that wants to emit JFIF 1.02 extension markers should set
- * JFIF_minor_version to 2. We could probably get away with just defaulting
- * to 1.02, but there may still be some decoders in use that will complain
- * about that; saying 1.01 should minimize compatibility problems.
- */
- cinfo->JFIF_major_version = 1; /* Default JFIF version = 1.01 */
- cinfo->JFIF_minor_version = 1;
- cinfo->density_unit = 0; /* Pixel size is unknown by default */
- cinfo->X_density = 1; /* Pixel aspect ratio is square by default */
- cinfo->Y_density = 1;
-
- /* Choose JPEG colorspace based on input space, set defaults accordingly */
-
- jpeg_default_colorspace(cinfo);
+ int i;
+
+ /* Safety check to ensure start_compress not called yet. */
+ if (cinfo->global_state != CSTATE_START)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ /* Allocate comp_info array large enough for maximum component count.
+ * Array is made permanent in case application wants to compress
+ * multiple images at same param settings.
+ */
+ if (cinfo->comp_info == NULL)
+ cinfo->comp_info = (jpeg_component_info *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ MAX_COMPONENTS * SIZEOF(jpeg_component_info));
+
+ /* Initialize everything not dependent on the color space */
+
+ cinfo->scale_num = 1; /* 1:1 scaling */
+ cinfo->scale_denom = 1;
+ cinfo->data_precision = BITS_IN_JSAMPLE;
+ /* Set up two quantization tables using default quality of 75 */
+ jpeg_set_quality(cinfo, 75, TRUE);
+ /* Set up two Huffman tables */
+ std_huff_tables(cinfo);
+
+ /* Initialize default arithmetic coding conditioning */
+ for (i = 0; i < NUM_ARITH_TBLS; i++) {
+ cinfo->arith_dc_L[i] = 0;
+ cinfo->arith_dc_U[i] = 1;
+ cinfo->arith_ac_K[i] = 5;
+ }
+
+ /* Default is no multiple-scan output */
+ cinfo->scan_info = NULL;
+ cinfo->num_scans = 0;
+
+ /* Expect normal source image, not raw downsampled data */
+ cinfo->raw_data_in = FALSE;
+
+ /* Use Huffman coding, not arithmetic coding, by default */
+ cinfo->arith_code = FALSE;
+
+ /* By default, don't do extra passes to optimize entropy coding */
+ cinfo->optimize_coding = FALSE;
+ /* The standard Huffman tables are only valid for 8-bit data precision.
+ * If the precision is higher, force optimization on so that usable
+ * tables will be computed. This test can be removed if default tables
+ * are supplied that are valid for the desired precision.
+ */
+ if (cinfo->data_precision > 8)
+ cinfo->optimize_coding = TRUE;
+
+ /* By default, use the simpler non-cosited sampling alignment */
+ cinfo->CCIR601_sampling = FALSE;
+
+ /* By default, apply fancy downsampling */
+ cinfo->do_fancy_downsampling = TRUE;
+
+ /* No input smoothing */
+ cinfo->smoothing_factor = 0;
+
+ /* DCT algorithm preference */
+ cinfo->dct_method = JDCT_DEFAULT;
+
+ /* No restart markers */
+ cinfo->restart_interval = 0;
+ cinfo->restart_in_rows = 0;
+
+ /* Fill in default JFIF marker parameters. Note that whether the marker
+ * will actually be written is determined by jpeg_set_colorspace.
+ *
+ * By default, the library emits JFIF version code 1.01.
+ * An application that wants to emit JFIF 1.02 extension markers should set
+ * JFIF_minor_version to 2. We could probably get away with just defaulting
+ * to 1.02, but there may still be some decoders in use that will complain
+ * about that; saying 1.01 should minimize compatibility problems.
+ */
+ cinfo->JFIF_major_version = 1; /* Default JFIF version = 1.01 */
+ cinfo->JFIF_minor_version = 1;
+ cinfo->density_unit = 0; /* Pixel size is unknown by default */
+ cinfo->X_density = 1; /* Pixel aspect ratio is square by default */
+ cinfo->Y_density = 1;
+
+ /* Choose JPEG colorspace based on input space, set defaults accordingly */
+
+ jpeg_default_colorspace(cinfo);
}
@@ -380,28 +380,28 @@ jpeg_set_defaults (j_compress_ptr cinfo)
GLOBAL(void)
jpeg_default_colorspace (j_compress_ptr cinfo)
{
- switch (cinfo->in_color_space) {
- case JCS_GRAYSCALE:
- jpeg_set_colorspace(cinfo, JCS_GRAYSCALE);
- break;
- case JCS_RGB:
- jpeg_set_colorspace(cinfo, JCS_YCbCr);
- break;
- case JCS_YCbCr:
- jpeg_set_colorspace(cinfo, JCS_YCbCr);
- break;
- case JCS_CMYK:
- jpeg_set_colorspace(cinfo, JCS_CMYK); /* By default, no translation */
- break;
- case JCS_YCCK:
- jpeg_set_colorspace(cinfo, JCS_YCCK);
- break;
- case JCS_UNKNOWN:
- jpeg_set_colorspace(cinfo, JCS_UNKNOWN);
- break;
- default:
- ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
- }
+ switch (cinfo->in_color_space) {
+ case JCS_GRAYSCALE:
+ jpeg_set_colorspace(cinfo, JCS_GRAYSCALE);
+ break;
+ case JCS_RGB:
+ jpeg_set_colorspace(cinfo, JCS_YCbCr);
+ break;
+ case JCS_YCbCr:
+ jpeg_set_colorspace(cinfo, JCS_YCbCr);
+ break;
+ case JCS_CMYK:
+ jpeg_set_colorspace(cinfo, JCS_CMYK); /* By default, no translation */
+ break;
+ case JCS_YCCK:
+ jpeg_set_colorspace(cinfo, JCS_YCCK);
+ break;
+ case JCS_UNKNOWN:
+ jpeg_set_colorspace(cinfo, JCS_UNKNOWN);
+ break;
+ default:
+ ERREXIT(cinfo, JERR_BAD_IN_COLORSPACE);
+ }
}
@@ -412,82 +412,82 @@ jpeg_default_colorspace (j_compress_ptr cinfo)
GLOBAL(void)
jpeg_set_colorspace (j_compress_ptr cinfo, J_COLOR_SPACE colorspace)
{
- jpeg_component_info * compptr;
- int ci;
+ jpeg_component_info * compptr;
+ int ci;
#define SET_COMP(index,id,hsamp,vsamp,quant,dctbl,actbl) \
- (compptr = &cinfo->comp_info[index], \
- compptr->component_id = (id), \
- compptr->h_samp_factor = (hsamp), \
- compptr->v_samp_factor = (vsamp), \
- compptr->quant_tbl_no = (quant), \
- compptr->dc_tbl_no = (dctbl), \
- compptr->ac_tbl_no = (actbl) )
-
- /* Safety check to ensure start_compress not called yet. */
- if (cinfo->global_state != CSTATE_START)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- /* For all colorspaces, we use Q and Huff tables 0 for luminance components,
- * tables 1 for chrominance components.
- */
-
- cinfo->jpeg_color_space = colorspace;
-
- cinfo->write_JFIF_header = FALSE; /* No marker for non-JFIF colorspaces */
- cinfo->write_Adobe_marker = FALSE; /* write no Adobe marker by default */
-
- switch (colorspace) {
- case JCS_GRAYSCALE:
- cinfo->write_JFIF_header = TRUE; /* Write a JFIF marker */
- cinfo->num_components = 1;
- /* JFIF specifies component ID 1 */
- SET_COMP(0, 1, 1,1, 0, 0,0);
- break;
- case JCS_RGB:
- cinfo->write_Adobe_marker = TRUE; /* write Adobe marker to flag RGB */
- cinfo->num_components = 3;
- SET_COMP(0, 0x52 /* 'R' */, 1,1, 0, 0,0);
- SET_COMP(1, 0x47 /* 'G' */, 1,1, 0, 0,0);
- SET_COMP(2, 0x42 /* 'B' */, 1,1, 0, 0,0);
- break;
- case JCS_YCbCr:
- cinfo->write_JFIF_header = TRUE; /* Write a JFIF marker */
- cinfo->num_components = 3;
- /* JFIF specifies component IDs 1,2,3 */
- /* We default to 2x2 subsamples of chrominance */
- SET_COMP(0, 1, 2,2, 0, 0,0);
- SET_COMP(1, 2, 1,1, 1, 1,1);
- SET_COMP(2, 3, 1,1, 1, 1,1);
- break;
- case JCS_CMYK:
- cinfo->write_Adobe_marker = TRUE; /* write Adobe marker to flag CMYK */
- cinfo->num_components = 4;
- SET_COMP(0, 0x43 /* 'C' */, 1,1, 0, 0,0);
- SET_COMP(1, 0x4D /* 'M' */, 1,1, 0, 0,0);
- SET_COMP(2, 0x59 /* 'Y' */, 1,1, 0, 0,0);
- SET_COMP(3, 0x4B /* 'K' */, 1,1, 0, 0,0);
- break;
- case JCS_YCCK:
- cinfo->write_Adobe_marker = TRUE; /* write Adobe marker to flag YCCK */
- cinfo->num_components = 4;
- SET_COMP(0, 1, 2,2, 0, 0,0);
- SET_COMP(1, 2, 1,1, 1, 1,1);
- SET_COMP(2, 3, 1,1, 1, 1,1);
- SET_COMP(3, 4, 2,2, 0, 0,0);
- break;
- case JCS_UNKNOWN:
- cinfo->num_components = cinfo->input_components;
- if (cinfo->num_components < 1 || cinfo->num_components > MAX_COMPONENTS)
- ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
- MAX_COMPONENTS);
- for (ci = 0; ci < cinfo->num_components; ci++) {
- SET_COMP(ci, ci, 1,1, 0, 0,0);
- }
- break;
- default:
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- }
+ (compptr = &cinfo->comp_info[index], \
+ compptr->component_id = (id), \
+ compptr->h_samp_factor = (hsamp), \
+ compptr->v_samp_factor = (vsamp), \
+ compptr->quant_tbl_no = (quant), \
+ compptr->dc_tbl_no = (dctbl), \
+ compptr->ac_tbl_no = (actbl) )
+
+ /* Safety check to ensure start_compress not called yet. */
+ if (cinfo->global_state != CSTATE_START)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ /* For all colorspaces, we use Q and Huff tables 0 for luminance components,
+ * tables 1 for chrominance components.
+ */
+
+ cinfo->jpeg_color_space = colorspace;
+
+ cinfo->write_JFIF_header = FALSE; /* No marker for non-JFIF colorspaces */
+ cinfo->write_Adobe_marker = FALSE; /* write no Adobe marker by default */
+
+ switch (colorspace) {
+ case JCS_GRAYSCALE:
+ cinfo->write_JFIF_header = TRUE; /* Write a JFIF marker */
+ cinfo->num_components = 1;
+ /* JFIF specifies component ID 1 */
+ SET_COMP(0, 1, 1,1, 0, 0,0);
+ break;
+ case JCS_RGB:
+ cinfo->write_Adobe_marker = TRUE; /* write Adobe marker to flag RGB */
+ cinfo->num_components = 3;
+ SET_COMP(0, 0x52 /* 'R' */, 1,1, 0, 0,0);
+ SET_COMP(1, 0x47 /* 'G' */, 1,1, 0, 0,0);
+ SET_COMP(2, 0x42 /* 'B' */, 1,1, 0, 0,0);
+ break;
+ case JCS_YCbCr:
+ cinfo->write_JFIF_header = TRUE; /* Write a JFIF marker */
+ cinfo->num_components = 3;
+ /* JFIF specifies component IDs 1,2,3 */
+ /* We default to 2x2 subsamples of chrominance */
+ SET_COMP(0, 1, 2,2, 0, 0,0);
+ SET_COMP(1, 2, 1,1, 1, 1,1);
+ SET_COMP(2, 3, 1,1, 1, 1,1);
+ break;
+ case JCS_CMYK:
+ cinfo->write_Adobe_marker = TRUE; /* write Adobe marker to flag CMYK */
+ cinfo->num_components = 4;
+ SET_COMP(0, 0x43 /* 'C' */, 1,1, 0, 0,0);
+ SET_COMP(1, 0x4D /* 'M' */, 1,1, 0, 0,0);
+ SET_COMP(2, 0x59 /* 'Y' */, 1,1, 0, 0,0);
+ SET_COMP(3, 0x4B /* 'K' */, 1,1, 0, 0,0);
+ break;
+ case JCS_YCCK:
+ cinfo->write_Adobe_marker = TRUE; /* write Adobe marker to flag YCCK */
+ cinfo->num_components = 4;
+ SET_COMP(0, 1, 2,2, 0, 0,0);
+ SET_COMP(1, 2, 1,1, 1, 1,1);
+ SET_COMP(2, 3, 1,1, 1, 1,1);
+ SET_COMP(3, 4, 2,2, 0, 0,0);
+ break;
+ case JCS_UNKNOWN:
+ cinfo->num_components = cinfo->input_components;
+ if (cinfo->num_components < 1 || cinfo->num_components > MAX_COMPONENTS)
+ ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
+ MAX_COMPONENTS);
+ for (ci = 0; ci < cinfo->num_components; ci++) {
+ SET_COMP(ci, ci, 1,1, 0, 0,0);
+ }
+ break;
+ default:
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ }
}
@@ -495,58 +495,58 @@ jpeg_set_colorspace (j_compress_ptr cinfo, J_COLOR_SPACE colorspace)
LOCAL(jpeg_scan_info *)
fill_a_scan (jpeg_scan_info * scanptr, int ci,
- int Ss, int Se, int Ah, int Al)
+ int Ss, int Se, int Ah, int Al)
/* Support routine: generate one scan for specified component */
{
- scanptr->comps_in_scan = 1;
- scanptr->component_index[0] = ci;
- scanptr->Ss = Ss;
- scanptr->Se = Se;
- scanptr->Ah = Ah;
- scanptr->Al = Al;
- scanptr++;
- return scanptr;
+ scanptr->comps_in_scan = 1;
+ scanptr->component_index[0] = ci;
+ scanptr->Ss = Ss;
+ scanptr->Se = Se;
+ scanptr->Ah = Ah;
+ scanptr->Al = Al;
+ scanptr++;
+ return scanptr;
}
LOCAL(jpeg_scan_info *)
fill_scans (jpeg_scan_info * scanptr, int ncomps,
- int Ss, int Se, int Ah, int Al)
+ int Ss, int Se, int Ah, int Al)
/* Support routine: generate one scan for each component */
{
- int ci;
-
- for (ci = 0; ci < ncomps; ci++) {
- scanptr->comps_in_scan = 1;
- scanptr->component_index[0] = ci;
- scanptr->Ss = Ss;
- scanptr->Se = Se;
- scanptr->Ah = Ah;
- scanptr->Al = Al;
- scanptr++;
- }
- return scanptr;
+ int ci;
+
+ for (ci = 0; ci < ncomps; ci++) {
+ scanptr->comps_in_scan = 1;
+ scanptr->component_index[0] = ci;
+ scanptr->Ss = Ss;
+ scanptr->Se = Se;
+ scanptr->Ah = Ah;
+ scanptr->Al = Al;
+ scanptr++;
+ }
+ return scanptr;
}
LOCAL(jpeg_scan_info *)
fill_dc_scans (jpeg_scan_info * scanptr, int ncomps, int Ah, int Al)
/* Support routine: generate interleaved DC scan if possible, else N scans */
{
- int ci;
-
- if (ncomps <= MAX_COMPS_IN_SCAN) {
- /* Single interleaved DC scan */
- scanptr->comps_in_scan = ncomps;
- for (ci = 0; ci < ncomps; ci++)
- scanptr->component_index[ci] = ci;
- scanptr->Ss = scanptr->Se = 0;
- scanptr->Ah = Ah;
- scanptr->Al = Al;
- scanptr++;
- } else {
- /* Noninterleaved DC scan for each component */
- scanptr = fill_scans(scanptr, ncomps, 0, 0, Ah, Al);
- }
- return scanptr;
+ int ci;
+
+ if (ncomps <= MAX_COMPS_IN_SCAN) {
+ /* Single interleaved DC scan */
+ scanptr->comps_in_scan = ncomps;
+ for (ci = 0; ci < ncomps; ci++)
+ scanptr->component_index[ci] = ci;
+ scanptr->Ss = scanptr->Se = 0;
+ scanptr->Ah = Ah;
+ scanptr->Al = Al;
+ scanptr++;
+ } else {
+ /* Noninterleaved DC scan for each component */
+ scanptr = fill_scans(scanptr, ncomps, 0, 0, Ah, Al);
+ }
+ return scanptr;
}
@@ -558,75 +558,75 @@ fill_dc_scans (jpeg_scan_info * scanptr, int ncomps, int Ah, int Al)
GLOBAL(void)
jpeg_simple_progression (j_compress_ptr cinfo)
{
- int ncomps = cinfo->num_components;
- int nscans;
- jpeg_scan_info * scanptr;
-
- /* Safety check to ensure start_compress not called yet. */
- if (cinfo->global_state != CSTATE_START)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- /* Figure space needed for script. Calculation must match code below! */
- if (ncomps == 3 && cinfo->jpeg_color_space == JCS_YCbCr) {
- /* Custom script for YCbCr color images. */
- nscans = 10;
- } else {
- /* All-purpose script for other color spaces. */
- if (ncomps > MAX_COMPS_IN_SCAN)
- nscans = 6 * ncomps; /* 2 DC + 4 AC scans per component */
- else
- nscans = 2 + 4 * ncomps; /* 2 DC scans; 4 AC scans per component */
- }
-
- /* Allocate space for script.
- * We need to put it in the permanent pool in case the application performs
- * multiple compressions without changing the settings. To avoid a memory
- * leak if jpeg_simple_progression is called repeatedly for the same JPEG
- * object, we try to re-use previously allocated space, and we allocate
- * enough space to handle YCbCr even if initially asked for grayscale.
- */
- if (cinfo->script_space == NULL || cinfo->script_space_size < nscans) {
- cinfo->script_space_size = MAX(nscans, 10);
- cinfo->script_space = (jpeg_scan_info *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ int ncomps = cinfo->num_components;
+ int nscans;
+ jpeg_scan_info * scanptr;
+
+ /* Safety check to ensure start_compress not called yet. */
+ if (cinfo->global_state != CSTATE_START)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ /* Figure space needed for script. Calculation must match code below! */
+ if (ncomps == 3 && cinfo->jpeg_color_space == JCS_YCbCr) {
+ /* Custom script for YCbCr color images. */
+ nscans = 10;
+ } else {
+ /* All-purpose script for other color spaces. */
+ if (ncomps > MAX_COMPS_IN_SCAN)
+ nscans = 6 * ncomps; /* 2 DC + 4 AC scans per component */
+ else
+ nscans = 2 + 4 * ncomps; /* 2 DC scans; 4 AC scans per component */
+ }
+
+ /* Allocate space for script.
+ * We need to put it in the permanent pool in case the application performs
+ * multiple compressions without changing the settings. To avoid a memory
+ * leak if jpeg_simple_progression is called repeatedly for the same JPEG
+ * object, we try to re-use previously allocated space, and we allocate
+ * enough space to handle YCbCr even if initially asked for grayscale.
+ */
+ if (cinfo->script_space == NULL || cinfo->script_space_size < nscans) {
+ cinfo->script_space_size = MAX(nscans, 10);
+ cinfo->script_space = (jpeg_scan_info *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
cinfo->script_space_size * SIZEOF(jpeg_scan_info));
- }
- scanptr = cinfo->script_space;
- cinfo->scan_info = scanptr;
- cinfo->num_scans = nscans;
-
- if (ncomps == 3 && cinfo->jpeg_color_space == JCS_YCbCr) {
- /* Custom script for YCbCr color images. */
- /* Initial DC scan */
- scanptr = fill_dc_scans(scanptr, ncomps, 0, 1);
- /* Initial AC scan: get some luma data out in a hurry */
- scanptr = fill_a_scan(scanptr, 0, 1, 5, 0, 2);
- /* Chroma data is too small to be worth expending many scans on */
- scanptr = fill_a_scan(scanptr, 2, 1, 63, 0, 1);
- scanptr = fill_a_scan(scanptr, 1, 1, 63, 0, 1);
- /* Complete spectral selection for luma AC */
- scanptr = fill_a_scan(scanptr, 0, 6, 63, 0, 2);
- /* Refine next bit of luma AC */
- scanptr = fill_a_scan(scanptr, 0, 1, 63, 2, 1);
- /* Finish DC successive approximation */
- scanptr = fill_dc_scans(scanptr, ncomps, 1, 0);
- /* Finish AC successive approximation */
- scanptr = fill_a_scan(scanptr, 2, 1, 63, 1, 0);
- scanptr = fill_a_scan(scanptr, 1, 1, 63, 1, 0);
- /* Luma bottom bit comes last since it's usually largest scan */
- scanptr = fill_a_scan(scanptr, 0, 1, 63, 1, 0);
- } else {
- /* All-purpose script for other color spaces. */
- /* Successive approximation first pass */
- scanptr = fill_dc_scans(scanptr, ncomps, 0, 1);
- scanptr = fill_scans(scanptr, ncomps, 1, 5, 0, 2);
- scanptr = fill_scans(scanptr, ncomps, 6, 63, 0, 2);
- /* Successive approximation second pass */
- scanptr = fill_scans(scanptr, ncomps, 1, 63, 2, 1);
- /* Successive approximation final pass */
- scanptr = fill_dc_scans(scanptr, ncomps, 1, 0);
- scanptr = fill_scans(scanptr, ncomps, 1, 63, 1, 0);
- }
+ }
+ scanptr = cinfo->script_space;
+ cinfo->scan_info = scanptr;
+ cinfo->num_scans = nscans;
+
+ if (ncomps == 3 && cinfo->jpeg_color_space == JCS_YCbCr) {
+ /* Custom script for YCbCr color images. */
+ /* Initial DC scan */
+ scanptr = fill_dc_scans(scanptr, ncomps, 0, 1);
+ /* Initial AC scan: get some luma data out in a hurry */
+ scanptr = fill_a_scan(scanptr, 0, 1, 5, 0, 2);
+ /* Chroma data is too small to be worth expending many scans on */
+ scanptr = fill_a_scan(scanptr, 2, 1, 63, 0, 1);
+ scanptr = fill_a_scan(scanptr, 1, 1, 63, 0, 1);
+ /* Complete spectral selection for luma AC */
+ scanptr = fill_a_scan(scanptr, 0, 6, 63, 0, 2);
+ /* Refine next bit of luma AC */
+ scanptr = fill_a_scan(scanptr, 0, 1, 63, 2, 1);
+ /* Finish DC successive approximation */
+ scanptr = fill_dc_scans(scanptr, ncomps, 1, 0);
+ /* Finish AC successive approximation */
+ scanptr = fill_a_scan(scanptr, 2, 1, 63, 1, 0);
+ scanptr = fill_a_scan(scanptr, 1, 1, 63, 1, 0);
+ /* Luma bottom bit comes last since it's usually largest scan */
+ scanptr = fill_a_scan(scanptr, 0, 1, 63, 1, 0);
+ } else {
+ /* All-purpose script for other color spaces. */
+ /* Successive approximation first pass */
+ scanptr = fill_dc_scans(scanptr, ncomps, 0, 1);
+ scanptr = fill_scans(scanptr, ncomps, 1, 5, 0, 2);
+ scanptr = fill_scans(scanptr, ncomps, 6, 63, 0, 2);
+ /* Successive approximation second pass */
+ scanptr = fill_scans(scanptr, ncomps, 1, 63, 2, 1);
+ /* Successive approximation final pass */
+ scanptr = fill_dc_scans(scanptr, ncomps, 1, 0);
+ scanptr = fill_scans(scanptr, ncomps, 1, 63, 1, 0);
+ }
}
#endif /* C_PROGRESSIVE_SUPPORTED */
diff --git a/src/lib/libjpeg/jcprepct.c b/src/lib/libjpeg/jcprepct.c
index be44cc4b451..053b4a78eba 100644
--- a/src/lib/libjpeg/jcprepct.c
+++ b/src/lib/libjpeg/jcprepct.c
@@ -51,19 +51,19 @@
/* Private buffer controller object */
typedef struct {
- struct jpeg_c_prep_controller pub; /* public fields */
+ struct jpeg_c_prep_controller pub; /* public fields */
- /* Downsampling input buffer. This buffer holds color-converted data
- * until we have enough to do a downsample step.
- */
- JSAMPARRAY color_buf[MAX_COMPONENTS];
+ /* Downsampling input buffer. This buffer holds color-converted data
+ * until we have enough to do a downsample step.
+ */
+ JSAMPARRAY color_buf[MAX_COMPONENTS];
- JDIMENSION rows_to_go; /* counts rows remaining in source image */
- int next_buf_row; /* index of next row to store in color_buf */
+ JDIMENSION rows_to_go; /* counts rows remaining in source image */
+ int next_buf_row; /* index of next row to store in color_buf */
-#ifdef CONTEXT_ROWS_SUPPORTED /* only needed for context case */
- int this_row_group; /* starting row index of group to process */
- int next_buf_stop; /* downsample when we reach this index */
+#ifdef CONTEXT_ROWS_SUPPORTED /* only needed for context case */
+ int this_row_group; /* starting row index of group to process */
+ int next_buf_stop; /* downsample when we reach this index */
#endif
} my_prep_controller;
@@ -77,22 +77,22 @@ typedef my_prep_controller * my_prep_ptr;
METHODDEF(void)
start_pass_prep (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
{
- my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
+ my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
- if (pass_mode != JBUF_PASS_THRU)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ if (pass_mode != JBUF_PASS_THRU)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- /* Initialize total-height counter for detecting bottom of image */
- prep->rows_to_go = cinfo->image_height;
- /* Mark the conversion buffer empty */
- prep->next_buf_row = 0;
+ /* Initialize total-height counter for detecting bottom of image */
+ prep->rows_to_go = cinfo->image_height;
+ /* Mark the conversion buffer empty */
+ prep->next_buf_row = 0;
#ifdef CONTEXT_ROWS_SUPPORTED
- /* Preset additional state variables for context mode.
- * These aren't used in non-context mode, so we needn't test which mode.
- */
- prep->this_row_group = 0;
- /* Set next_buf_stop to stop after two row groups have been read in. */
- prep->next_buf_stop = 2 * cinfo->max_v_samp_factor;
+ /* Preset additional state variables for context mode.
+ * These aren't used in non-context mode, so we needn't test which mode.
+ */
+ prep->this_row_group = 0;
+ /* Set next_buf_stop to stop after two row groups have been read in. */
+ prep->next_buf_stop = 2 * cinfo->max_v_samp_factor;
#endif
}
@@ -104,14 +104,14 @@ start_pass_prep (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
LOCAL(void)
expand_bottom_edge (JSAMPARRAY image_data, JDIMENSION num_cols,
- int input_rows, int output_rows)
+ int input_rows, int output_rows)
{
- register int row;
+ register int row;
- for (row = input_rows; row < output_rows; row++) {
- jcopy_sample_rows(image_data, input_rows-1, image_data, row,
- 1, num_cols);
- }
+ for (row = input_rows; row < output_rows; row++) {
+ jcopy_sample_rows(image_data, input_rows-1, image_data, row,
+ 1, num_cols);
+ }
}
@@ -126,64 +126,64 @@ expand_bottom_edge (JSAMPARRAY image_data, JDIMENSION num_cols,
METHODDEF(void)
pre_process_data (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
- JDIMENSION in_rows_avail,
- JSAMPIMAGE output_buf, JDIMENSION *out_row_group_ctr,
- JDIMENSION out_row_groups_avail)
+ JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
+ JDIMENSION in_rows_avail,
+ JSAMPIMAGE output_buf, JDIMENSION *out_row_group_ctr,
+ JDIMENSION out_row_groups_avail)
{
- my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
- int numrows, ci;
- JDIMENSION inrows;
- jpeg_component_info * compptr;
-
- while (*in_row_ctr < in_rows_avail &&
- *out_row_group_ctr < out_row_groups_avail) {
- /* Do color conversion to fill the conversion buffer. */
- inrows = in_rows_avail - *in_row_ctr;
- numrows = cinfo->max_v_samp_factor - prep->next_buf_row;
- numrows = (int) MIN((JDIMENSION) numrows, inrows);
- (*cinfo->cconvert->color_convert) (cinfo, input_buf + *in_row_ctr,
- prep->color_buf,
- (JDIMENSION) prep->next_buf_row,
- numrows);
- *in_row_ctr += numrows;
- prep->next_buf_row += numrows;
- prep->rows_to_go -= numrows;
- /* If at bottom of image, pad to fill the conversion buffer. */
- if (prep->rows_to_go == 0 &&
+ my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
+ int numrows, ci;
+ JDIMENSION inrows;
+ jpeg_component_info * compptr;
+
+ while (*in_row_ctr < in_rows_avail &&
+ *out_row_group_ctr < out_row_groups_avail) {
+ /* Do color conversion to fill the conversion buffer. */
+ inrows = in_rows_avail - *in_row_ctr;
+ numrows = cinfo->max_v_samp_factor - prep->next_buf_row;
+ numrows = (int) MIN((JDIMENSION) numrows, inrows);
+ (*cinfo->cconvert->color_convert) (cinfo, input_buf + *in_row_ctr,
+ prep->color_buf,
+ (JDIMENSION) prep->next_buf_row,
+ numrows);
+ *in_row_ctr += numrows;
+ prep->next_buf_row += numrows;
+ prep->rows_to_go -= numrows;
+ /* If at bottom of image, pad to fill the conversion buffer. */
+ if (prep->rows_to_go == 0 &&
prep->next_buf_row < cinfo->max_v_samp_factor) {
- for (ci = 0; ci < cinfo->num_components; ci++) {
+ for (ci = 0; ci < cinfo->num_components; ci++) {
expand_bottom_edge(prep->color_buf[ci], cinfo->image_width,
- prep->next_buf_row, cinfo->max_v_samp_factor);
- }
- prep->next_buf_row = cinfo->max_v_samp_factor;
- }
- /* If we've filled the conversion buffer, empty it. */
- if (prep->next_buf_row == cinfo->max_v_samp_factor) {
- (*cinfo->downsample->downsample) (cinfo,
+ prep->next_buf_row, cinfo->max_v_samp_factor);
+ }
+ prep->next_buf_row = cinfo->max_v_samp_factor;
+ }
+ /* If we've filled the conversion buffer, empty it. */
+ if (prep->next_buf_row == cinfo->max_v_samp_factor) {
+ (*cinfo->downsample->downsample) (cinfo,
prep->color_buf, (JDIMENSION) 0,
output_buf, *out_row_group_ctr);
- prep->next_buf_row = 0;
- (*out_row_group_ctr)++;
- }
- /* If at bottom of image, pad the output to a full iMCU height.
- * Note we assume the caller is providing a one-iMCU-height output buffer!
- */
- if (prep->rows_to_go == 0 &&
+ prep->next_buf_row = 0;
+ (*out_row_group_ctr)++;
+ }
+ /* If at bottom of image, pad the output to a full iMCU height.
+ * Note we assume the caller is providing a one-iMCU-height output buffer!
+ */
+ if (prep->rows_to_go == 0 &&
*out_row_group_ctr < out_row_groups_avail) {
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
numrows = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
- cinfo->min_DCT_v_scaled_size;
+ cinfo->min_DCT_v_scaled_size;
expand_bottom_edge(output_buf[ci],
- compptr->width_in_blocks * compptr->DCT_h_scaled_size,
- (int) (*out_row_group_ctr * numrows),
- (int) (out_row_groups_avail * numrows));
- }
- *out_row_group_ctr = out_row_groups_avail;
- break; /* can exit outer loop without test */
- }
- }
+ compptr->width_in_blocks * compptr->DCT_h_scaled_size,
+ (int) (*out_row_group_ctr * numrows),
+ (int) (out_row_groups_avail * numrows));
+ }
+ *out_row_group_ctr = out_row_groups_avail;
+ break; /* can exit outer loop without test */
+ }
+ }
}
@@ -195,69 +195,69 @@ pre_process_data (j_compress_ptr cinfo,
METHODDEF(void)
pre_process_context (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
- JDIMENSION in_rows_avail,
- JSAMPIMAGE output_buf, JDIMENSION *out_row_group_ctr,
- JDIMENSION out_row_groups_avail)
+ JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
+ JDIMENSION in_rows_avail,
+ JSAMPIMAGE output_buf, JDIMENSION *out_row_group_ctr,
+ JDIMENSION out_row_groups_avail)
{
- my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
- int numrows, ci;
- int buf_height = cinfo->max_v_samp_factor * 3;
- JDIMENSION inrows;
-
- while (*out_row_group_ctr < out_row_groups_avail) {
- if (*in_row_ctr < in_rows_avail) {
- /* Do color conversion to fill the conversion buffer. */
- inrows = in_rows_avail - *in_row_ctr;
- numrows = prep->next_buf_stop - prep->next_buf_row;
- numrows = (int) MIN((JDIMENSION) numrows, inrows);
- (*cinfo->cconvert->color_convert) (cinfo, input_buf + *in_row_ctr,
- prep->color_buf,
- (JDIMENSION) prep->next_buf_row,
- numrows);
- /* Pad at top of image, if first time through */
- if (prep->rows_to_go == cinfo->image_height) {
+ my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
+ int numrows, ci;
+ int buf_height = cinfo->max_v_samp_factor * 3;
+ JDIMENSION inrows;
+
+ while (*out_row_group_ctr < out_row_groups_avail) {
+ if (*in_row_ctr < in_rows_avail) {
+ /* Do color conversion to fill the conversion buffer. */
+ inrows = in_rows_avail - *in_row_ctr;
+ numrows = prep->next_buf_stop - prep->next_buf_row;
+ numrows = (int) MIN((JDIMENSION) numrows, inrows);
+ (*cinfo->cconvert->color_convert) (cinfo, input_buf + *in_row_ctr,
+ prep->color_buf,
+ (JDIMENSION) prep->next_buf_row,
+ numrows);
+ /* Pad at top of image, if first time through */
+ if (prep->rows_to_go == cinfo->image_height) {
for (ci = 0; ci < cinfo->num_components; ci++) {
- int row;
- for (row = 1; row <= cinfo->max_v_samp_factor; row++) {
- jcopy_sample_rows(prep->color_buf[ci], 0,
- prep->color_buf[ci], -row,
- 1, cinfo->image_width);
- }
+ int row;
+ for (row = 1; row <= cinfo->max_v_samp_factor; row++) {
+ jcopy_sample_rows(prep->color_buf[ci], 0,
+ prep->color_buf[ci], -row,
+ 1, cinfo->image_width);
+ }
}
- }
- *in_row_ctr += numrows;
- prep->next_buf_row += numrows;
- prep->rows_to_go -= numrows;
- } else {
- /* Return for more data, unless we are at the bottom of the image. */
- if (prep->rows_to_go != 0)
+ }
+ *in_row_ctr += numrows;
+ prep->next_buf_row += numrows;
+ prep->rows_to_go -= numrows;
+ } else {
+ /* Return for more data, unless we are at the bottom of the image. */
+ if (prep->rows_to_go != 0)
break;
- /* When at bottom of image, pad to fill the conversion buffer. */
- if (prep->next_buf_row < prep->next_buf_stop) {
+ /* When at bottom of image, pad to fill the conversion buffer. */
+ if (prep->next_buf_row < prep->next_buf_stop) {
for (ci = 0; ci < cinfo->num_components; ci++) {
- expand_bottom_edge(prep->color_buf[ci], cinfo->image_width,
- prep->next_buf_row, prep->next_buf_stop);
+ expand_bottom_edge(prep->color_buf[ci], cinfo->image_width,
+ prep->next_buf_row, prep->next_buf_stop);
}
prep->next_buf_row = prep->next_buf_stop;
- }
- }
- /* If we've gotten enough data, downsample a row group. */
- if (prep->next_buf_row == prep->next_buf_stop) {
- (*cinfo->downsample->downsample) (cinfo,
+ }
+ }
+ /* If we've gotten enough data, downsample a row group. */
+ if (prep->next_buf_row == prep->next_buf_stop) {
+ (*cinfo->downsample->downsample) (cinfo,
prep->color_buf,
(JDIMENSION) prep->this_row_group,
output_buf, *out_row_group_ctr);
- (*out_row_group_ctr)++;
- /* Advance pointers with wraparound as necessary. */
- prep->this_row_group += cinfo->max_v_samp_factor;
- if (prep->this_row_group >= buf_height)
+ (*out_row_group_ctr)++;
+ /* Advance pointers with wraparound as necessary. */
+ prep->this_row_group += cinfo->max_v_samp_factor;
+ if (prep->this_row_group >= buf_height)
prep->this_row_group = 0;
- if (prep->next_buf_row >= buf_height)
+ if (prep->next_buf_row >= buf_height)
prep->next_buf_row = 0;
- prep->next_buf_stop = prep->next_buf_row + cinfo->max_v_samp_factor;
- }
- }
+ prep->next_buf_stop = prep->next_buf_row + cinfo->max_v_samp_factor;
+ }
+ }
}
@@ -268,43 +268,43 @@ pre_process_context (j_compress_ptr cinfo,
LOCAL(void)
create_context_buffer (j_compress_ptr cinfo)
{
- my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
- int rgroup_height = cinfo->max_v_samp_factor;
- int ci, i;
- jpeg_component_info * compptr;
- JSAMPARRAY true_buffer, fake_buffer;
-
- /* Grab enough space for fake row pointers for all the components;
- * we need five row groups' worth of pointers for each component.
- */
- fake_buffer = (JSAMPARRAY)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ my_prep_ptr prep = (my_prep_ptr) cinfo->prep;
+ int rgroup_height = cinfo->max_v_samp_factor;
+ int ci, i;
+ jpeg_component_info * compptr;
+ JSAMPARRAY true_buffer, fake_buffer;
+
+ /* Grab enough space for fake row pointers for all the components;
+ * we need five row groups' worth of pointers for each component.
+ */
+ fake_buffer = (JSAMPARRAY)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(cinfo->num_components * 5 * rgroup_height) *
SIZEOF(JSAMPROW));
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Allocate the actual buffer space (3 row groups) for this component.
- * We make the buffer wide enough to allow the downsampler to edge-expand
- * horizontally within the buffer, if it so chooses.
- */
- true_buffer = (*cinfo->mem->alloc_sarray)
- ((j_common_ptr) cinfo, JPOOL_IMAGE,
- (JDIMENSION) (((long) compptr->width_in_blocks *
- cinfo->min_DCT_h_scaled_size *
- cinfo->max_h_samp_factor) / compptr->h_samp_factor),
- (JDIMENSION) (3 * rgroup_height));
- /* Copy true buffer row pointers into the middle of the fake row array */
- MEMCOPY(fake_buffer + rgroup_height, true_buffer,
- 3 * rgroup_height * SIZEOF(JSAMPROW));
- /* Fill in the above and below wraparound pointers */
- for (i = 0; i < rgroup_height; i++) {
- fake_buffer[i] = true_buffer[2 * rgroup_height + i];
- fake_buffer[4 * rgroup_height + i] = true_buffer[i];
- }
- prep->color_buf[ci] = fake_buffer + rgroup_height;
- fake_buffer += 5 * rgroup_height; /* point to space for next component */
- }
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Allocate the actual buffer space (3 row groups) for this component.
+ * We make the buffer wide enough to allow the downsampler to edge-expand
+ * horizontally within the buffer, if it so chooses.
+ */
+ true_buffer = (*cinfo->mem->alloc_sarray)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ (JDIMENSION) (((long) compptr->width_in_blocks *
+ cinfo->min_DCT_h_scaled_size *
+ cinfo->max_h_samp_factor) / compptr->h_samp_factor),
+ (JDIMENSION) (3 * rgroup_height));
+ /* Copy true buffer row pointers into the middle of the fake row array */
+ MEMCOPY(fake_buffer + rgroup_height, true_buffer,
+ 3 * rgroup_height * SIZEOF(JSAMPROW));
+ /* Fill in the above and below wraparound pointers */
+ for (i = 0; i < rgroup_height; i++) {
+ fake_buffer[i] = true_buffer[2 * rgroup_height + i];
+ fake_buffer[4 * rgroup_height + i] = true_buffer[i];
+ }
+ prep->color_buf[ci] = fake_buffer + rgroup_height;
+ fake_buffer += 5 * rgroup_height; /* point to space for next component */
+ }
}
#endif /* CONTEXT_ROWS_SUPPORTED */
@@ -317,42 +317,42 @@ create_context_buffer (j_compress_ptr cinfo)
GLOBAL(void)
jinit_c_prep_controller (j_compress_ptr cinfo, boolean need_full_buffer)
{
- my_prep_ptr prep;
- int ci;
- jpeg_component_info * compptr;
+ my_prep_ptr prep;
+ int ci;
+ jpeg_component_info * compptr;
- if (need_full_buffer) /* safety check */
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ if (need_full_buffer) /* safety check */
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- prep = (my_prep_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ prep = (my_prep_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_prep_controller));
- cinfo->prep = (struct jpeg_c_prep_controller *) prep;
- prep->pub.start_pass = start_pass_prep;
-
- /* Allocate the color conversion buffer.
- * We make the buffer wide enough to allow the downsampler to edge-expand
- * horizontally within the buffer, if it so chooses.
- */
- if (cinfo->downsample->need_context_rows) {
- /* Set up to provide context rows */
+ cinfo->prep = (struct jpeg_c_prep_controller *) prep;
+ prep->pub.start_pass = start_pass_prep;
+
+ /* Allocate the color conversion buffer.
+ * We make the buffer wide enough to allow the downsampler to edge-expand
+ * horizontally within the buffer, if it so chooses.
+ */
+ if (cinfo->downsample->need_context_rows) {
+ /* Set up to provide context rows */
#ifdef CONTEXT_ROWS_SUPPORTED
- prep->pub.pre_process_data = pre_process_context;
- create_context_buffer(cinfo);
+ prep->pub.pre_process_data = pre_process_context;
+ create_context_buffer(cinfo);
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif
- } else {
- /* No context, just make it tall enough for one row group */
- prep->pub.pre_process_data = pre_process_data;
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- prep->color_buf[ci] = (*cinfo->mem->alloc_sarray)
+ } else {
+ /* No context, just make it tall enough for one row group */
+ prep->pub.pre_process_data = pre_process_data;
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ prep->color_buf[ci] = (*cinfo->mem->alloc_sarray)
((j_common_ptr) cinfo, JPOOL_IMAGE,
- (JDIMENSION) (((long) compptr->width_in_blocks *
+ (JDIMENSION) (((long) compptr->width_in_blocks *
cinfo->min_DCT_h_scaled_size *
cinfo->max_h_samp_factor) / compptr->h_samp_factor),
- (JDIMENSION) cinfo->max_v_samp_factor);
- }
- }
+ (JDIMENSION) cinfo->max_v_samp_factor);
+ }
+ }
}
diff --git a/src/lib/libjpeg/jcsample.c b/src/lib/libjpeg/jcsample.c
index 4d36f85f356..35b01387a02 100644
--- a/src/lib/libjpeg/jcsample.c
+++ b/src/lib/libjpeg/jcsample.c
@@ -53,24 +53,24 @@
/* Pointer to routine to downsample a single component */
typedef JMETHOD(void, downsample1_ptr,
(j_compress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY output_data));
+ JSAMPARRAY input_data, JSAMPARRAY output_data));
/* Private subobject */
typedef struct {
- struct jpeg_downsampler pub; /* public fields */
+ struct jpeg_downsampler pub; /* public fields */
- /* Downsampling method pointers, one per component */
- downsample1_ptr methods[MAX_COMPONENTS];
+ /* Downsampling method pointers, one per component */
+ downsample1_ptr methods[MAX_COMPONENTS];
- /* Height of an output row group for each component. */
- int rowgroup_height[MAX_COMPONENTS];
+ /* Height of an output row group for each component. */
+ int rowgroup_height[MAX_COMPONENTS];
- /* These arrays save pixel expansion factors so that int_downsample need not
- * recompute them each time. They are unused for other downsampling methods.
- */
- UINT8 h_expand[MAX_COMPONENTS];
- UINT8 v_expand[MAX_COMPONENTS];
+ /* These arrays save pixel expansion factors so that int_downsample need not
+ * recompute them each time. They are unused for other downsampling methods.
+ */
+ UINT8 h_expand[MAX_COMPONENTS];
+ UINT8 v_expand[MAX_COMPONENTS];
} my_downsampler;
typedef my_downsampler * my_downsample_ptr;
@@ -83,7 +83,7 @@ typedef my_downsampler * my_downsample_ptr;
METHODDEF(void)
start_pass_downsample (j_compress_ptr cinfo)
{
- /* no work for now */
+ /* no work for now */
}
@@ -94,22 +94,22 @@ start_pass_downsample (j_compress_ptr cinfo)
LOCAL(void)
expand_right_edge (JSAMPARRAY image_data, int num_rows,
- JDIMENSION input_cols, JDIMENSION output_cols)
+ JDIMENSION input_cols, JDIMENSION output_cols)
{
- register JSAMPROW ptr;
- register JSAMPLE pixval;
- register int count;
- int row;
- int numcols = (int) (output_cols - input_cols);
-
- if (numcols > 0) {
- for (row = 0; row < num_rows; row++) {
- ptr = image_data[row] + input_cols;
- pixval = ptr[-1]; /* don't need GETJSAMPLE() here */
- for (count = numcols; count > 0; count--)
+ register JSAMPROW ptr;
+ register JSAMPLE pixval;
+ register int count;
+ int row;
+ int numcols = (int) (output_cols - input_cols);
+
+ if (numcols > 0) {
+ for (row = 0; row < num_rows; row++) {
+ ptr = image_data[row] + input_cols;
+ pixval = ptr[-1]; /* don't need GETJSAMPLE() here */
+ for (count = numcols; count > 0; count--)
*ptr++ = pixval;
- }
- }
+ }
+ }
}
@@ -124,18 +124,18 @@ sep_downsample (j_compress_ptr cinfo,
JSAMPIMAGE input_buf, JDIMENSION in_row_index,
JSAMPIMAGE output_buf, JDIMENSION out_row_group_index)
{
- my_downsample_ptr downsample = (my_downsample_ptr) cinfo->downsample;
- int ci;
- jpeg_component_info * compptr;
- JSAMPARRAY in_ptr, out_ptr;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- in_ptr = input_buf[ci] + in_row_index;
- out_ptr = output_buf[ci] +
- (out_row_group_index * downsample->rowgroup_height[ci]);
- (*downsample->methods[ci]) (cinfo, compptr, in_ptr, out_ptr);
- }
+ my_downsample_ptr downsample = (my_downsample_ptr) cinfo->downsample;
+ int ci;
+ jpeg_component_info * compptr;
+ JSAMPARRAY in_ptr, out_ptr;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ in_ptr = input_buf[ci] + in_row_index;
+ out_ptr = output_buf[ci] +
+ (out_row_group_index * downsample->rowgroup_height[ci]);
+ (*downsample->methods[ci]) (cinfo, compptr, in_ptr, out_ptr);
+ }
}
@@ -150,42 +150,42 @@ METHODDEF(void)
int_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
JSAMPARRAY input_data, JSAMPARRAY output_data)
{
- my_downsample_ptr downsample = (my_downsample_ptr) cinfo->downsample;
- int inrow, outrow, h_expand, v_expand, numpix, numpix2, h, v;
- JDIMENSION outcol, outcol_h; /* outcol_h == outcol*h_expand */
- JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
- JSAMPROW inptr, outptr;
- INT32 outvalue;
-
- h_expand = downsample->h_expand[compptr->component_index];
- v_expand = downsample->v_expand[compptr->component_index];
- numpix = h_expand * v_expand;
- numpix2 = numpix/2;
-
- /* Expand input data enough to let all the output samples be generated
- * by the standard loop. Special-casing padded output would be more
- * efficient.
- */
- expand_right_edge(input_data, cinfo->max_v_samp_factor,
- cinfo->image_width, output_cols * h_expand);
-
- inrow = outrow = 0;
- while (inrow < cinfo->max_v_samp_factor) {
- outptr = output_data[outrow];
- for (outcol = 0, outcol_h = 0; outcol < output_cols;
- outcol++, outcol_h += h_expand) {
- outvalue = 0;
- for (v = 0; v < v_expand; v++) {
+ my_downsample_ptr downsample = (my_downsample_ptr) cinfo->downsample;
+ int inrow, outrow, h_expand, v_expand, numpix, numpix2, h, v;
+ JDIMENSION outcol, outcol_h; /* outcol_h == outcol*h_expand */
+ JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
+ JSAMPROW inptr, outptr;
+ INT32 outvalue;
+
+ h_expand = downsample->h_expand[compptr->component_index];
+ v_expand = downsample->v_expand[compptr->component_index];
+ numpix = h_expand * v_expand;
+ numpix2 = numpix/2;
+
+ /* Expand input data enough to let all the output samples be generated
+ * by the standard loop. Special-casing padded output would be more
+ * efficient.
+ */
+ expand_right_edge(input_data, cinfo->max_v_samp_factor,
+ cinfo->image_width, output_cols * h_expand);
+
+ inrow = outrow = 0;
+ while (inrow < cinfo->max_v_samp_factor) {
+ outptr = output_data[outrow];
+ for (outcol = 0, outcol_h = 0; outcol < output_cols;
+ outcol++, outcol_h += h_expand) {
+ outvalue = 0;
+ for (v = 0; v < v_expand; v++) {
inptr = input_data[inrow+v] + outcol_h;
for (h = 0; h < h_expand; h++) {
- outvalue += (INT32) GETJSAMPLE(*inptr++);
+ outvalue += (INT32) GETJSAMPLE(*inptr++);
+ }
+ }
+ *outptr++ = (JSAMPLE) ((outvalue + numpix2) / numpix);
+ }
+ inrow += v_expand;
+ outrow++;
}
- }
- *outptr++ = (JSAMPLE) ((outvalue + numpix2) / numpix);
- }
- inrow += v_expand;
- outrow++;
- }
}
@@ -197,14 +197,14 @@ int_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
fullsize_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY output_data)
+ JSAMPARRAY input_data, JSAMPARRAY output_data)
{
- /* Copy the data */
- jcopy_sample_rows(input_data, 0, output_data, 0,
- cinfo->max_v_samp_factor, cinfo->image_width);
- /* Edge-expand */
- expand_right_edge(output_data, cinfo->max_v_samp_factor, cinfo->image_width,
- compptr->width_in_blocks * compptr->DCT_h_scaled_size);
+ /* Copy the data */
+ jcopy_sample_rows(input_data, 0, output_data, 0,
+ cinfo->max_v_samp_factor, cinfo->image_width);
+ /* Edge-expand */
+ expand_right_edge(output_data, cinfo->max_v_samp_factor, cinfo->image_width,
+ compptr->width_in_blocks * compptr->DCT_h_scaled_size);
}
@@ -222,32 +222,32 @@ fullsize_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
h2v1_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY output_data)
+ JSAMPARRAY input_data, JSAMPARRAY output_data)
{
- int inrow;
- JDIMENSION outcol;
- JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
- register JSAMPROW inptr, outptr;
- register int bias;
-
- /* Expand input data enough to let all the output samples be generated
- * by the standard loop. Special-casing padded output would be more
- * efficient.
- */
- expand_right_edge(input_data, cinfo->max_v_samp_factor,
- cinfo->image_width, output_cols * 2);
-
- for (inrow = 0; inrow < cinfo->max_v_samp_factor; inrow++) {
- outptr = output_data[inrow];
- inptr = input_data[inrow];
- bias = 0; /* bias = 0,1,0,1,... for successive samples */
- for (outcol = 0; outcol < output_cols; outcol++) {
- *outptr++ = (JSAMPLE) ((GETJSAMPLE(*inptr) + GETJSAMPLE(inptr[1])
- + bias) >> 1);
- bias ^= 1; /* 0=>1, 1=>0 */
- inptr += 2;
- }
- }
+ int inrow;
+ JDIMENSION outcol;
+ JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
+ register JSAMPROW inptr, outptr;
+ register int bias;
+
+ /* Expand input data enough to let all the output samples be generated
+ * by the standard loop. Special-casing padded output would be more
+ * efficient.
+ */
+ expand_right_edge(input_data, cinfo->max_v_samp_factor,
+ cinfo->image_width, output_cols * 2);
+
+ for (inrow = 0; inrow < cinfo->max_v_samp_factor; inrow++) {
+ outptr = output_data[inrow];
+ inptr = input_data[inrow];
+ bias = 0; /* bias = 0,1,0,1,... for successive samples */
+ for (outcol = 0; outcol < output_cols; outcol++) {
+ *outptr++ = (JSAMPLE) ((GETJSAMPLE(*inptr) + GETJSAMPLE(inptr[1])
+ + bias) >> 1);
+ bias ^= 1; /* 0=>1, 1=>0 */
+ inptr += 2;
+ }
+ }
}
@@ -259,37 +259,37 @@ h2v1_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
h2v2_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY output_data)
+ JSAMPARRAY input_data, JSAMPARRAY output_data)
{
- int inrow, outrow;
- JDIMENSION outcol;
- JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
- register JSAMPROW inptr0, inptr1, outptr;
- register int bias;
-
- /* Expand input data enough to let all the output samples be generated
- * by the standard loop. Special-casing padded output would be more
- * efficient.
- */
- expand_right_edge(input_data, cinfo->max_v_samp_factor,
- cinfo->image_width, output_cols * 2);
-
- inrow = outrow = 0;
- while (inrow < cinfo->max_v_samp_factor) {
- outptr = output_data[outrow];
- inptr0 = input_data[inrow];
- inptr1 = input_data[inrow+1];
- bias = 1; /* bias = 1,2,1,2,... for successive samples */
- for (outcol = 0; outcol < output_cols; outcol++) {
- *outptr++ = (JSAMPLE) ((GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
- GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[1])
- + bias) >> 2);
- bias ^= 3; /* 1=>2, 2=>1 */
- inptr0 += 2; inptr1 += 2;
- }
- inrow += 2;
- outrow++;
- }
+ int inrow, outrow;
+ JDIMENSION outcol;
+ JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
+ register JSAMPROW inptr0, inptr1, outptr;
+ register int bias;
+
+ /* Expand input data enough to let all the output samples be generated
+ * by the standard loop. Special-casing padded output would be more
+ * efficient.
+ */
+ expand_right_edge(input_data, cinfo->max_v_samp_factor,
+ cinfo->image_width, output_cols * 2);
+
+ inrow = outrow = 0;
+ while (inrow < cinfo->max_v_samp_factor) {
+ outptr = output_data[outrow];
+ inptr0 = input_data[inrow];
+ inptr1 = input_data[inrow+1];
+ bias = 1; /* bias = 1,2,1,2,... for successive samples */
+ for (outcol = 0; outcol < output_cols; outcol++) {
+ *outptr++ = (JSAMPLE) ((GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
+ GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[1])
+ + bias) >> 2);
+ bias ^= 3; /* 1=>2, 2=>1 */
+ inptr0 += 2; inptr1 += 2;
+ }
+ inrow += 2;
+ outrow++;
+ }
}
@@ -305,94 +305,94 @@ METHODDEF(void)
h2v2_smooth_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
JSAMPARRAY input_data, JSAMPARRAY output_data)
{
- int inrow, outrow;
- JDIMENSION colctr;
- JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
- register JSAMPROW inptr0, inptr1, above_ptr, below_ptr, outptr;
- INT32 membersum, neighsum, memberscale, neighscale;
-
- /* Expand input data enough to let all the output samples be generated
- * by the standard loop. Special-casing padded output would be more
- * efficient.
- */
- expand_right_edge(input_data - 1, cinfo->max_v_samp_factor + 2,
- cinfo->image_width, output_cols * 2);
-
- /* We don't bother to form the individual "smoothed" input pixel values;
- * we can directly compute the output which is the average of the four
- * smoothed values. Each of the four member pixels contributes a fraction
- * (1-8*SF) to its own smoothed image and a fraction SF to each of the three
- * other smoothed pixels, therefore a total fraction (1-5*SF)/4 to the final
- * output. The four corner-adjacent neighbor pixels contribute a fraction
- * SF to just one smoothed pixel, or SF/4 to the final output; while the
- * eight edge-adjacent neighbors contribute SF to each of two smoothed
- * pixels, or SF/2 overall. In order to use integer arithmetic, these
- * factors are scaled by 2^16 = 65536.
- * Also recall that SF = smoothing_factor / 1024.
- */
-
- memberscale = 16384 - cinfo->smoothing_factor * 80; /* scaled (1-5*SF)/4 */
- neighscale = cinfo->smoothing_factor * 16; /* scaled SF/4 */
-
- inrow = outrow = 0;
- while (inrow < cinfo->max_v_samp_factor) {
- outptr = output_data[outrow];
- inptr0 = input_data[inrow];
- inptr1 = input_data[inrow+1];
- above_ptr = input_data[inrow-1];
- below_ptr = input_data[inrow+2];
-
- /* Special case for first column: pretend column -1 is same as column 0 */
- membersum = GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
+ int inrow, outrow;
+ JDIMENSION colctr;
+ JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
+ register JSAMPROW inptr0, inptr1, above_ptr, below_ptr, outptr;
+ INT32 membersum, neighsum, memberscale, neighscale;
+
+ /* Expand input data enough to let all the output samples be generated
+ * by the standard loop. Special-casing padded output would be more
+ * efficient.
+ */
+ expand_right_edge(input_data - 1, cinfo->max_v_samp_factor + 2,
+ cinfo->image_width, output_cols * 2);
+
+ /* We don't bother to form the individual "smoothed" input pixel values;
+ * we can directly compute the output which is the average of the four
+ * smoothed values. Each of the four member pixels contributes a fraction
+ * (1-8*SF) to its own smoothed image and a fraction SF to each of the three
+ * other smoothed pixels, therefore a total fraction (1-5*SF)/4 to the final
+ * output. The four corner-adjacent neighbor pixels contribute a fraction
+ * SF to just one smoothed pixel, or SF/4 to the final output; while the
+ * eight edge-adjacent neighbors contribute SF to each of two smoothed
+ * pixels, or SF/2 overall. In order to use integer arithmetic, these
+ * factors are scaled by 2^16 = 65536.
+ * Also recall that SF = smoothing_factor / 1024.
+ */
+
+ memberscale = 16384 - cinfo->smoothing_factor * 80; /* scaled (1-5*SF)/4 */
+ neighscale = cinfo->smoothing_factor * 16; /* scaled SF/4 */
+
+ inrow = outrow = 0;
+ while (inrow < cinfo->max_v_samp_factor) {
+ outptr = output_data[outrow];
+ inptr0 = input_data[inrow];
+ inptr1 = input_data[inrow+1];
+ above_ptr = input_data[inrow-1];
+ below_ptr = input_data[inrow+2];
+
+ /* Special case for first column: pretend column -1 is same as column 0 */
+ membersum = GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[1]);
- neighsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[1]) +
- GETJSAMPLE(*below_ptr) + GETJSAMPLE(below_ptr[1]) +
- GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[2]) +
- GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[2]);
- neighsum += neighsum;
- neighsum += GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[2]) +
+ neighsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[1]) +
+ GETJSAMPLE(*below_ptr) + GETJSAMPLE(below_ptr[1]) +
+ GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[2]) +
+ GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[2]);
+ neighsum += neighsum;
+ neighsum += GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[2]) +
GETJSAMPLE(*below_ptr) + GETJSAMPLE(below_ptr[2]);
- membersum = membersum * memberscale + neighsum * neighscale;
- *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
- inptr0 += 2; inptr1 += 2; above_ptr += 2; below_ptr += 2;
-
- for (colctr = output_cols - 2; colctr > 0; colctr--) {
- /* sum of pixels directly mapped to this output element */
- membersum = GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
- GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[1]);
- /* sum of edge-neighbor pixels */
- neighsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[1]) +
- GETJSAMPLE(*below_ptr) + GETJSAMPLE(below_ptr[1]) +
- GETJSAMPLE(inptr0[-1]) + GETJSAMPLE(inptr0[2]) +
- GETJSAMPLE(inptr1[-1]) + GETJSAMPLE(inptr1[2]);
- /* The edge-neighbors count twice as much as corner-neighbors */
- neighsum += neighsum;
- /* Add in the corner-neighbors */
- neighsum += GETJSAMPLE(above_ptr[-1]) + GETJSAMPLE(above_ptr[2]) +
- GETJSAMPLE(below_ptr[-1]) + GETJSAMPLE(below_ptr[2]);
- /* form final output scaled up by 2^16 */
- membersum = membersum * memberscale + neighsum * neighscale;
- /* round, descale and output it */
- *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
- inptr0 += 2; inptr1 += 2; above_ptr += 2; below_ptr += 2;
- }
-
- /* Special case for last column */
- membersum = GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
+ membersum = membersum * memberscale + neighsum * neighscale;
+ *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
+ inptr0 += 2; inptr1 += 2; above_ptr += 2; below_ptr += 2;
+
+ for (colctr = output_cols - 2; colctr > 0; colctr--) {
+ /* sum of pixels directly mapped to this output element */
+ membersum = GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
+ GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[1]);
+ /* sum of edge-neighbor pixels */
+ neighsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[1]) +
+ GETJSAMPLE(*below_ptr) + GETJSAMPLE(below_ptr[1]) +
+ GETJSAMPLE(inptr0[-1]) + GETJSAMPLE(inptr0[2]) +
+ GETJSAMPLE(inptr1[-1]) + GETJSAMPLE(inptr1[2]);
+ /* The edge-neighbors count twice as much as corner-neighbors */
+ neighsum += neighsum;
+ /* Add in the corner-neighbors */
+ neighsum += GETJSAMPLE(above_ptr[-1]) + GETJSAMPLE(above_ptr[2]) +
+ GETJSAMPLE(below_ptr[-1]) + GETJSAMPLE(below_ptr[2]);
+ /* form final output scaled up by 2^16 */
+ membersum = membersum * memberscale + neighsum * neighscale;
+ /* round, descale and output it */
+ *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
+ inptr0 += 2; inptr1 += 2; above_ptr += 2; below_ptr += 2;
+ }
+
+ /* Special case for last column */
+ membersum = GETJSAMPLE(*inptr0) + GETJSAMPLE(inptr0[1]) +
GETJSAMPLE(*inptr1) + GETJSAMPLE(inptr1[1]);
- neighsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[1]) +
- GETJSAMPLE(*below_ptr) + GETJSAMPLE(below_ptr[1]) +
- GETJSAMPLE(inptr0[-1]) + GETJSAMPLE(inptr0[1]) +
- GETJSAMPLE(inptr1[-1]) + GETJSAMPLE(inptr1[1]);
- neighsum += neighsum;
- neighsum += GETJSAMPLE(above_ptr[-1]) + GETJSAMPLE(above_ptr[1]) +
+ neighsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(above_ptr[1]) +
+ GETJSAMPLE(*below_ptr) + GETJSAMPLE(below_ptr[1]) +
+ GETJSAMPLE(inptr0[-1]) + GETJSAMPLE(inptr0[1]) +
+ GETJSAMPLE(inptr1[-1]) + GETJSAMPLE(inptr1[1]);
+ neighsum += neighsum;
+ neighsum += GETJSAMPLE(above_ptr[-1]) + GETJSAMPLE(above_ptr[1]) +
GETJSAMPLE(below_ptr[-1]) + GETJSAMPLE(below_ptr[1]);
- membersum = membersum * memberscale + neighsum * neighscale;
- *outptr = (JSAMPLE) ((membersum + 32768) >> 16);
+ membersum = membersum * memberscale + neighsum * neighscale;
+ *outptr = (JSAMPLE) ((membersum + 32768) >> 16);
- inrow += 2;
- outrow++;
- }
+ inrow += 2;
+ outrow++;
+ }
}
@@ -404,66 +404,66 @@ h2v2_smooth_downsample (j_compress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
fullsize_smooth_downsample (j_compress_ptr cinfo, jpeg_component_info *compptr,
- JSAMPARRAY input_data, JSAMPARRAY output_data)
+ JSAMPARRAY input_data, JSAMPARRAY output_data)
{
- int inrow;
- JDIMENSION colctr;
- JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
- register JSAMPROW inptr, above_ptr, below_ptr, outptr;
- INT32 membersum, neighsum, memberscale, neighscale;
- int colsum, lastcolsum, nextcolsum;
-
- /* Expand input data enough to let all the output samples be generated
- * by the standard loop. Special-casing padded output would be more
- * efficient.
- */
- expand_right_edge(input_data - 1, cinfo->max_v_samp_factor + 2,
- cinfo->image_width, output_cols);
-
- /* Each of the eight neighbor pixels contributes a fraction SF to the
- * smoothed pixel, while the main pixel contributes (1-8*SF). In order
- * to use integer arithmetic, these factors are multiplied by 2^16 = 65536.
- * Also recall that SF = smoothing_factor / 1024.
- */
-
- memberscale = 65536L - cinfo->smoothing_factor * 512L; /* scaled 1-8*SF */
- neighscale = cinfo->smoothing_factor * 64; /* scaled SF */
-
- for (inrow = 0; inrow < cinfo->max_v_samp_factor; inrow++) {
- outptr = output_data[inrow];
- inptr = input_data[inrow];
- above_ptr = input_data[inrow-1];
- below_ptr = input_data[inrow+1];
-
- /* Special case for first column */
- colsum = GETJSAMPLE(*above_ptr++) + GETJSAMPLE(*below_ptr++) +
- GETJSAMPLE(*inptr);
- membersum = GETJSAMPLE(*inptr++);
- nextcolsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(*below_ptr) +
- GETJSAMPLE(*inptr);
- neighsum = colsum + (colsum - membersum) + nextcolsum;
- membersum = membersum * memberscale + neighsum * neighscale;
- *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
- lastcolsum = colsum; colsum = nextcolsum;
-
- for (colctr = output_cols - 2; colctr > 0; colctr--) {
- membersum = GETJSAMPLE(*inptr++);
- above_ptr++; below_ptr++;
- nextcolsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(*below_ptr) +
- GETJSAMPLE(*inptr);
- neighsum = lastcolsum + (colsum - membersum) + nextcolsum;
- membersum = membersum * memberscale + neighsum * neighscale;
- *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
- lastcolsum = colsum; colsum = nextcolsum;
- }
-
- /* Special case for last column */
- membersum = GETJSAMPLE(*inptr);
- neighsum = lastcolsum + (colsum - membersum) + colsum;
- membersum = membersum * memberscale + neighsum * neighscale;
- *outptr = (JSAMPLE) ((membersum + 32768) >> 16);
-
- }
+ int inrow;
+ JDIMENSION colctr;
+ JDIMENSION output_cols = compptr->width_in_blocks * compptr->DCT_h_scaled_size;
+ register JSAMPROW inptr, above_ptr, below_ptr, outptr;
+ INT32 membersum, neighsum, memberscale, neighscale;
+ int colsum, lastcolsum, nextcolsum;
+
+ /* Expand input data enough to let all the output samples be generated
+ * by the standard loop. Special-casing padded output would be more
+ * efficient.
+ */
+ expand_right_edge(input_data - 1, cinfo->max_v_samp_factor + 2,
+ cinfo->image_width, output_cols);
+
+ /* Each of the eight neighbor pixels contributes a fraction SF to the
+ * smoothed pixel, while the main pixel contributes (1-8*SF). In order
+ * to use integer arithmetic, these factors are multiplied by 2^16 = 65536.
+ * Also recall that SF = smoothing_factor / 1024.
+ */
+
+ memberscale = 65536L - cinfo->smoothing_factor * 512L; /* scaled 1-8*SF */
+ neighscale = cinfo->smoothing_factor * 64; /* scaled SF */
+
+ for (inrow = 0; inrow < cinfo->max_v_samp_factor; inrow++) {
+ outptr = output_data[inrow];
+ inptr = input_data[inrow];
+ above_ptr = input_data[inrow-1];
+ below_ptr = input_data[inrow+1];
+
+ /* Special case for first column */
+ colsum = GETJSAMPLE(*above_ptr++) + GETJSAMPLE(*below_ptr++) +
+ GETJSAMPLE(*inptr);
+ membersum = GETJSAMPLE(*inptr++);
+ nextcolsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(*below_ptr) +
+ GETJSAMPLE(*inptr);
+ neighsum = colsum + (colsum - membersum) + nextcolsum;
+ membersum = membersum * memberscale + neighsum * neighscale;
+ *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
+ lastcolsum = colsum; colsum = nextcolsum;
+
+ for (colctr = output_cols - 2; colctr > 0; colctr--) {
+ membersum = GETJSAMPLE(*inptr++);
+ above_ptr++; below_ptr++;
+ nextcolsum = GETJSAMPLE(*above_ptr) + GETJSAMPLE(*below_ptr) +
+ GETJSAMPLE(*inptr);
+ neighsum = lastcolsum + (colsum - membersum) + nextcolsum;
+ membersum = membersum * memberscale + neighsum * neighscale;
+ *outptr++ = (JSAMPLE) ((membersum + 32768) >> 16);
+ lastcolsum = colsum; colsum = nextcolsum;
+ }
+
+ /* Special case for last column */
+ membersum = GETJSAMPLE(*inptr);
+ neighsum = lastcolsum + (colsum - membersum) + colsum;
+ membersum = membersum * memberscale + neighsum * neighscale;
+ *outptr = (JSAMPLE) ((membersum + 32768) >> 16);
+
+ }
}
#endif /* INPUT_SMOOTHING_SUPPORTED */
@@ -477,69 +477,69 @@ fullsize_smooth_downsample (j_compress_ptr cinfo, jpeg_component_info *compptr,
GLOBAL(void)
jinit_downsampler (j_compress_ptr cinfo)
{
- my_downsample_ptr downsample;
- int ci;
- jpeg_component_info * compptr;
- boolean smoothok = TRUE;
- int h_in_group, v_in_group, h_out_group, v_out_group;
-
- downsample = (my_downsample_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ my_downsample_ptr downsample;
+ int ci;
+ jpeg_component_info * compptr;
+ boolean smoothok = TRUE;
+ int h_in_group, v_in_group, h_out_group, v_out_group;
+
+ downsample = (my_downsample_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_downsampler));
- cinfo->downsample = (struct jpeg_downsampler *) downsample;
- downsample->pub.start_pass = start_pass_downsample;
- downsample->pub.downsample = sep_downsample;
- downsample->pub.need_context_rows = FALSE;
-
- if (cinfo->CCIR601_sampling)
- ERREXIT(cinfo, JERR_CCIR601_NOTIMPL);
-
- /* Verify we can handle the sampling factors, and set up method pointers */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Compute size of an "output group" for DCT scaling. This many samples
- * are to be converted from max_h_samp_factor * max_v_samp_factor pixels.
- */
- h_out_group = (compptr->h_samp_factor * compptr->DCT_h_scaled_size) /
- cinfo->min_DCT_h_scaled_size;
- v_out_group = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
- cinfo->min_DCT_v_scaled_size;
- h_in_group = cinfo->max_h_samp_factor;
- v_in_group = cinfo->max_v_samp_factor;
- downsample->rowgroup_height[ci] = v_out_group; /* save for use later */
- if (h_in_group == h_out_group && v_in_group == v_out_group) {
+ cinfo->downsample = (struct jpeg_downsampler *) downsample;
+ downsample->pub.start_pass = start_pass_downsample;
+ downsample->pub.downsample = sep_downsample;
+ downsample->pub.need_context_rows = FALSE;
+
+ if (cinfo->CCIR601_sampling)
+ ERREXIT(cinfo, JERR_CCIR601_NOTIMPL);
+
+ /* Verify we can handle the sampling factors, and set up method pointers */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Compute size of an "output group" for DCT scaling. This many samples
+ * are to be converted from max_h_samp_factor * max_v_samp_factor pixels.
+ */
+ h_out_group = (compptr->h_samp_factor * compptr->DCT_h_scaled_size) /
+ cinfo->min_DCT_h_scaled_size;
+ v_out_group = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
+ cinfo->min_DCT_v_scaled_size;
+ h_in_group = cinfo->max_h_samp_factor;
+ v_in_group = cinfo->max_v_samp_factor;
+ downsample->rowgroup_height[ci] = v_out_group; /* save for use later */
+ if (h_in_group == h_out_group && v_in_group == v_out_group) {
#ifdef INPUT_SMOOTHING_SUPPORTED
- if (cinfo->smoothing_factor) {
+ if (cinfo->smoothing_factor) {
downsample->methods[ci] = fullsize_smooth_downsample;
downsample->pub.need_context_rows = TRUE;
- } else
+ } else
#endif
downsample->methods[ci] = fullsize_downsample;
- } else if (h_in_group == h_out_group * 2 &&
- v_in_group == v_out_group) {
- smoothok = FALSE;
- downsample->methods[ci] = h2v1_downsample;
- } else if (h_in_group == h_out_group * 2 &&
- v_in_group == v_out_group * 2) {
+ } else if (h_in_group == h_out_group * 2 &&
+ v_in_group == v_out_group) {
+ smoothok = FALSE;
+ downsample->methods[ci] = h2v1_downsample;
+ } else if (h_in_group == h_out_group * 2 &&
+ v_in_group == v_out_group * 2) {
#ifdef INPUT_SMOOTHING_SUPPORTED
- if (cinfo->smoothing_factor) {
+ if (cinfo->smoothing_factor) {
downsample->methods[ci] = h2v2_smooth_downsample;
downsample->pub.need_context_rows = TRUE;
- } else
+ } else
#endif
downsample->methods[ci] = h2v2_downsample;
- } else if ((h_in_group % h_out_group) == 0 &&
- (v_in_group % v_out_group) == 0) {
- smoothok = FALSE;
- downsample->methods[ci] = int_downsample;
- downsample->h_expand[ci] = (UINT8) (h_in_group / h_out_group);
- downsample->v_expand[ci] = (UINT8) (v_in_group / v_out_group);
- } else
- ERREXIT(cinfo, JERR_FRACT_SAMPLE_NOTIMPL);
- }
+ } else if ((h_in_group % h_out_group) == 0 &&
+ (v_in_group % v_out_group) == 0) {
+ smoothok = FALSE;
+ downsample->methods[ci] = int_downsample;
+ downsample->h_expand[ci] = (UINT8) (h_in_group / h_out_group);
+ downsample->v_expand[ci] = (UINT8) (v_in_group / v_out_group);
+ } else
+ ERREXIT(cinfo, JERR_FRACT_SAMPLE_NOTIMPL);
+ }
#ifdef INPUT_SMOOTHING_SUPPORTED
- if (cinfo->smoothing_factor && !smoothok)
- TRACEMS(cinfo, 0, JTRC_SMOOTH_NOTIMPL);
+ if (cinfo->smoothing_factor && !smoothok)
+ TRACEMS(cinfo, 0, JTRC_SMOOTH_NOTIMPL);
#endif
}
diff --git a/src/lib/libjpeg/jctrans.c b/src/lib/libjpeg/jctrans.c
index dea0c3699a1..e67cee984dd 100644
--- a/src/lib/libjpeg/jctrans.c
+++ b/src/lib/libjpeg/jctrans.c
@@ -38,18 +38,18 @@ LOCAL(void) transencode_coef_controller
GLOBAL(void)
jpeg_write_coefficients (j_compress_ptr cinfo, jvirt_barray_ptr * coef_arrays)
{
- if (cinfo->global_state != CSTATE_START)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- /* Mark all tables to be written */
- jpeg_suppress_tables(cinfo, FALSE);
- /* (Re)initialize error mgr and destination modules */
- (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
- (*cinfo->dest->init_destination) (cinfo);
- /* Perform master selection of active modules */
- transencode_master_selection(cinfo, coef_arrays);
- /* Wait for jpeg_finish_compress() call */
- cinfo->next_scanline = 0; /* so jpeg_write_marker works */
- cinfo->global_state = CSTATE_WRCOEFS;
+ if (cinfo->global_state != CSTATE_START)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ /* Mark all tables to be written */
+ jpeg_suppress_tables(cinfo, FALSE);
+ /* (Re)initialize error mgr and destination modules */
+ (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
+ (*cinfo->dest->init_destination) (cinfo);
+ /* Perform master selection of active modules */
+ transencode_master_selection(cinfo, coef_arrays);
+ /* Wait for jpeg_finish_compress() call */
+ cinfo->next_scanline = 0; /* so jpeg_write_marker works */
+ cinfo->global_state = CSTATE_WRCOEFS;
}
@@ -62,95 +62,95 @@ jpeg_write_coefficients (j_compress_ptr cinfo, jvirt_barray_ptr * coef_arrays)
GLOBAL(void)
jpeg_copy_critical_parameters (j_decompress_ptr srcinfo,
- j_compress_ptr dstinfo)
+ j_compress_ptr dstinfo)
{
- JQUANT_TBL ** qtblptr;
- jpeg_component_info *incomp, *outcomp;
- JQUANT_TBL *c_quant, *slot_quant;
- int tblno, ci, coefi;
-
- /* Safety check to ensure start_compress not called yet. */
- if (dstinfo->global_state != CSTATE_START)
- ERREXIT1(dstinfo, JERR_BAD_STATE, dstinfo->global_state);
- /* Copy fundamental image dimensions */
- dstinfo->image_width = srcinfo->image_width;
- dstinfo->image_height = srcinfo->image_height;
- dstinfo->input_components = srcinfo->num_components;
- dstinfo->in_color_space = srcinfo->jpeg_color_space;
- dstinfo->jpeg_width = srcinfo->output_width;
- dstinfo->jpeg_height = srcinfo->output_height;
- dstinfo->min_DCT_h_scaled_size = srcinfo->min_DCT_h_scaled_size;
- dstinfo->min_DCT_v_scaled_size = srcinfo->min_DCT_v_scaled_size;
- /* Initialize all parameters to default values */
- jpeg_set_defaults(dstinfo);
- /* jpeg_set_defaults may choose wrong colorspace, eg YCbCr if input is RGB.
- * Fix it to get the right header markers for the image colorspace.
- */
- jpeg_set_colorspace(dstinfo, srcinfo->jpeg_color_space);
- dstinfo->data_precision = srcinfo->data_precision;
- dstinfo->CCIR601_sampling = srcinfo->CCIR601_sampling;
- /* Copy the source's quantization tables. */
- for (tblno = 0; tblno < NUM_QUANT_TBLS; tblno++) {
- if (srcinfo->quant_tbl_ptrs[tblno] != NULL) {
- qtblptr = & dstinfo->quant_tbl_ptrs[tblno];
- if (*qtblptr == NULL)
+ JQUANT_TBL ** qtblptr;
+ jpeg_component_info *incomp, *outcomp;
+ JQUANT_TBL *c_quant, *slot_quant;
+ int tblno, ci, coefi;
+
+ /* Safety check to ensure start_compress not called yet. */
+ if (dstinfo->global_state != CSTATE_START)
+ ERREXIT1(dstinfo, JERR_BAD_STATE, dstinfo->global_state);
+ /* Copy fundamental image dimensions */
+ dstinfo->image_width = srcinfo->image_width;
+ dstinfo->image_height = srcinfo->image_height;
+ dstinfo->input_components = srcinfo->num_components;
+ dstinfo->in_color_space = srcinfo->jpeg_color_space;
+ dstinfo->jpeg_width = srcinfo->output_width;
+ dstinfo->jpeg_height = srcinfo->output_height;
+ dstinfo->min_DCT_h_scaled_size = srcinfo->min_DCT_h_scaled_size;
+ dstinfo->min_DCT_v_scaled_size = srcinfo->min_DCT_v_scaled_size;
+ /* Initialize all parameters to default values */
+ jpeg_set_defaults(dstinfo);
+ /* jpeg_set_defaults may choose wrong colorspace, eg YCbCr if input is RGB.
+ * Fix it to get the right header markers for the image colorspace.
+ */
+ jpeg_set_colorspace(dstinfo, srcinfo->jpeg_color_space);
+ dstinfo->data_precision = srcinfo->data_precision;
+ dstinfo->CCIR601_sampling = srcinfo->CCIR601_sampling;
+ /* Copy the source's quantization tables. */
+ for (tblno = 0; tblno < NUM_QUANT_TBLS; tblno++) {
+ if (srcinfo->quant_tbl_ptrs[tblno] != NULL) {
+ qtblptr = & dstinfo->quant_tbl_ptrs[tblno];
+ if (*qtblptr == NULL)
*qtblptr = jpeg_alloc_quant_table((j_common_ptr) dstinfo);
- MEMCOPY((*qtblptr)->quantval,
- srcinfo->quant_tbl_ptrs[tblno]->quantval,
- SIZEOF((*qtblptr)->quantval));
- (*qtblptr)->sent_table = FALSE;
- }
- }
- /* Copy the source's per-component info.
- * Note we assume jpeg_set_defaults has allocated the dest comp_info array.
- */
- dstinfo->num_components = srcinfo->num_components;
- if (dstinfo->num_components < 1 || dstinfo->num_components > MAX_COMPONENTS)
- ERREXIT2(dstinfo, JERR_COMPONENT_COUNT, dstinfo->num_components,
- MAX_COMPONENTS);
- for (ci = 0, incomp = srcinfo->comp_info, outcomp = dstinfo->comp_info;
- ci < dstinfo->num_components; ci++, incomp++, outcomp++) {
- outcomp->component_id = incomp->component_id;
- outcomp->h_samp_factor = incomp->h_samp_factor;
- outcomp->v_samp_factor = incomp->v_samp_factor;
- outcomp->quant_tbl_no = incomp->quant_tbl_no;
- /* Make sure saved quantization table for component matches the qtable
- * slot. If not, the input file re-used this qtable slot.
- * IJG encoder currently cannot duplicate this.
- */
- tblno = outcomp->quant_tbl_no;
- if (tblno < 0 || tblno >= NUM_QUANT_TBLS ||
+ MEMCOPY((*qtblptr)->quantval,
+ srcinfo->quant_tbl_ptrs[tblno]->quantval,
+ SIZEOF((*qtblptr)->quantval));
+ (*qtblptr)->sent_table = FALSE;
+ }
+ }
+ /* Copy the source's per-component info.
+ * Note we assume jpeg_set_defaults has allocated the dest comp_info array.
+ */
+ dstinfo->num_components = srcinfo->num_components;
+ if (dstinfo->num_components < 1 || dstinfo->num_components > MAX_COMPONENTS)
+ ERREXIT2(dstinfo, JERR_COMPONENT_COUNT, dstinfo->num_components,
+ MAX_COMPONENTS);
+ for (ci = 0, incomp = srcinfo->comp_info, outcomp = dstinfo->comp_info;
+ ci < dstinfo->num_components; ci++, incomp++, outcomp++) {
+ outcomp->component_id = incomp->component_id;
+ outcomp->h_samp_factor = incomp->h_samp_factor;
+ outcomp->v_samp_factor = incomp->v_samp_factor;
+ outcomp->quant_tbl_no = incomp->quant_tbl_no;
+ /* Make sure saved quantization table for component matches the qtable
+ * slot. If not, the input file re-used this qtable slot.
+ * IJG encoder currently cannot duplicate this.
+ */
+ tblno = outcomp->quant_tbl_no;
+ if (tblno < 0 || tblno >= NUM_QUANT_TBLS ||
srcinfo->quant_tbl_ptrs[tblno] == NULL)
- ERREXIT1(dstinfo, JERR_NO_QUANT_TABLE, tblno);
- slot_quant = srcinfo->quant_tbl_ptrs[tblno];
- c_quant = incomp->quant_table;
- if (c_quant != NULL) {
- for (coefi = 0; coefi < DCTSIZE2; coefi++) {
+ ERREXIT1(dstinfo, JERR_NO_QUANT_TABLE, tblno);
+ slot_quant = srcinfo->quant_tbl_ptrs[tblno];
+ c_quant = incomp->quant_table;
+ if (c_quant != NULL) {
+ for (coefi = 0; coefi < DCTSIZE2; coefi++) {
if (c_quant->quantval[coefi] != slot_quant->quantval[coefi])
- ERREXIT1(dstinfo, JERR_MISMATCHED_QUANT_TABLE, tblno);
- }
- }
- /* Note: we do not copy the source's Huffman table assignments;
- * instead we rely on jpeg_set_colorspace to have made a suitable choice.
- */
- }
- /* Also copy JFIF version and resolution information, if available.
- * Strictly speaking this isn't "critical" info, but it's nearly
- * always appropriate to copy it if available. In particular,
- * if the application chooses to copy JFIF 1.02 extension markers from
- * the source file, we need to copy the version to make sure we don't
- * emit a file that has 1.02 extensions but a claimed version of 1.01.
- * We will *not*, however, copy version info from mislabeled "2.01" files.
- */
- if (srcinfo->saw_JFIF_marker) {
- if (srcinfo->JFIF_major_version == 1) {
- dstinfo->JFIF_major_version = srcinfo->JFIF_major_version;
- dstinfo->JFIF_minor_version = srcinfo->JFIF_minor_version;
- }
- dstinfo->density_unit = srcinfo->density_unit;
- dstinfo->X_density = srcinfo->X_density;
- dstinfo->Y_density = srcinfo->Y_density;
- }
+ ERREXIT1(dstinfo, JERR_MISMATCHED_QUANT_TABLE, tblno);
+ }
+ }
+ /* Note: we do not copy the source's Huffman table assignments;
+ * instead we rely on jpeg_set_colorspace to have made a suitable choice.
+ */
+ }
+ /* Also copy JFIF version and resolution information, if available.
+ * Strictly speaking this isn't "critical" info, but it's nearly
+ * always appropriate to copy it if available. In particular,
+ * if the application chooses to copy JFIF 1.02 extension markers from
+ * the source file, we need to copy the version to make sure we don't
+ * emit a file that has 1.02 extensions but a claimed version of 1.01.
+ * We will *not*, however, copy version info from mislabeled "2.01" files.
+ */
+ if (srcinfo->saw_JFIF_marker) {
+ if (srcinfo->JFIF_major_version == 1) {
+ dstinfo->JFIF_major_version = srcinfo->JFIF_major_version;
+ dstinfo->JFIF_minor_version = srcinfo->JFIF_minor_version;
+ }
+ dstinfo->density_unit = srcinfo->density_unit;
+ dstinfo->X_density = srcinfo->X_density;
+ dstinfo->Y_density = srcinfo->Y_density;
+ }
}
@@ -161,31 +161,31 @@ jpeg_copy_critical_parameters (j_decompress_ptr srcinfo,
LOCAL(void)
transencode_master_selection (j_compress_ptr cinfo,
- jvirt_barray_ptr * coef_arrays)
+ jvirt_barray_ptr * coef_arrays)
{
- /* Initialize master control (includes parameter checking/processing) */
- jinit_c_master_control(cinfo, TRUE /* transcode only */);
-
- /* Entropy encoding: either Huffman or arithmetic coding. */
- if (cinfo->arith_code)
- jinit_arith_encoder(cinfo);
- else {
- jinit_huff_encoder(cinfo);
- }
+ /* Initialize master control (includes parameter checking/processing) */
+ jinit_c_master_control(cinfo, TRUE /* transcode only */);
+
+ /* Entropy encoding: either Huffman or arithmetic coding. */
+ if (cinfo->arith_code)
+ jinit_arith_encoder(cinfo);
+ else {
+ jinit_huff_encoder(cinfo);
+ }
- /* We need a special coefficient buffer controller. */
- transencode_coef_controller(cinfo, coef_arrays);
+ /* We need a special coefficient buffer controller. */
+ transencode_coef_controller(cinfo, coef_arrays);
- jinit_marker_writer(cinfo);
+ jinit_marker_writer(cinfo);
- /* We can now tell the memory manager to allocate virtual arrays. */
- (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
+ /* We can now tell the memory manager to allocate virtual arrays. */
+ (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
- /* Write the datastream header (SOI, JFIF) immediately.
- * Frame and scan headers are postponed till later.
- * This lets application insert special markers after the SOI.
- */
- (*cinfo->marker->write_file_header) (cinfo);
+ /* Write the datastream header (SOI, JFIF) immediately.
+ * Frame and scan headers are postponed till later.
+ * This lets application insert special markers after the SOI.
+ */
+ (*cinfo->marker->write_file_header) (cinfo);
}
@@ -200,18 +200,18 @@ transencode_master_selection (j_compress_ptr cinfo,
/* Private buffer controller object */
typedef struct {
- struct jpeg_c_coef_controller pub; /* public fields */
+ struct jpeg_c_coef_controller pub; /* public fields */
- JDIMENSION iMCU_row_num; /* iMCU row # within image */
- JDIMENSION mcu_ctr; /* counts MCUs processed in current row */
- int MCU_vert_offset; /* counts MCU rows within iMCU row */
- int MCU_rows_per_iMCU_row; /* number of such rows needed */
+ JDIMENSION iMCU_row_num; /* iMCU row # within image */
+ JDIMENSION mcu_ctr; /* counts MCUs processed in current row */
+ int MCU_vert_offset; /* counts MCU rows within iMCU row */
+ int MCU_rows_per_iMCU_row; /* number of such rows needed */
- /* Virtual block array for each component. */
- jvirt_barray_ptr * whole_image;
+ /* Virtual block array for each component. */
+ jvirt_barray_ptr * whole_image;
- /* Workspace for constructing dummy blocks at right/bottom edges. */
- JBLOCKROW dummy_buffer[C_MAX_BLOCKS_IN_MCU];
+ /* Workspace for constructing dummy blocks at right/bottom edges. */
+ JBLOCKROW dummy_buffer[C_MAX_BLOCKS_IN_MCU];
} my_coef_controller;
typedef my_coef_controller * my_coef_ptr;
@@ -221,23 +221,23 @@ LOCAL(void)
start_iMCU_row (j_compress_ptr cinfo)
/* Reset within-iMCU-row counters for a new row */
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
-
- /* In an interleaved scan, an MCU row is the same as an iMCU row.
- * In a noninterleaved scan, an iMCU row has v_samp_factor MCU rows.
- * But at the bottom of the image, process only what's left.
- */
- if (cinfo->comps_in_scan > 1) {
- coef->MCU_rows_per_iMCU_row = 1;
- } else {
- if (coef->iMCU_row_num < (cinfo->total_iMCU_rows-1))
- coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->v_samp_factor;
- else
- coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->last_row_height;
- }
-
- coef->mcu_ctr = 0;
- coef->MCU_vert_offset = 0;
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+
+ /* In an interleaved scan, an MCU row is the same as an iMCU row.
+ * In a noninterleaved scan, an iMCU row has v_samp_factor MCU rows.
+ * But at the bottom of the image, process only what's left.
+ */
+ if (cinfo->comps_in_scan > 1) {
+ coef->MCU_rows_per_iMCU_row = 1;
+ } else {
+ if (coef->iMCU_row_num < (cinfo->total_iMCU_rows-1))
+ coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->v_samp_factor;
+ else
+ coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->last_row_height;
+ }
+
+ coef->mcu_ctr = 0;
+ coef->MCU_vert_offset = 0;
}
@@ -248,13 +248,13 @@ start_iMCU_row (j_compress_ptr cinfo)
METHODDEF(void)
start_pass_coef (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- if (pass_mode != JBUF_CRANK_DEST)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ if (pass_mode != JBUF_CRANK_DEST)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- coef->iMCU_row_num = 0;
- start_iMCU_row(cinfo);
+ coef->iMCU_row_num = 0;
+ start_iMCU_row(cinfo);
}
@@ -271,77 +271,77 @@ start_pass_coef (j_compress_ptr cinfo, J_BUF_MODE pass_mode)
METHODDEF(boolean)
compress_output (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION MCU_col_num; /* index of current MCU within row */
- JDIMENSION last_MCU_col = cinfo->MCUs_per_row - 1;
- JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
- int blkn, ci, xindex, yindex, yoffset, blockcnt;
- JDIMENSION start_col;
- JBLOCKARRAY buffer[MAX_COMPS_IN_SCAN];
- JBLOCKROW MCU_buffer[C_MAX_BLOCKS_IN_MCU];
- JBLOCKROW buffer_ptr;
- jpeg_component_info *compptr;
-
- /* Align the virtual buffers for the components used in this scan. */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- buffer[ci] = (*cinfo->mem->access_virt_barray)
- ((j_common_ptr) cinfo, coef->whole_image[compptr->component_index],
- coef->iMCU_row_num * compptr->v_samp_factor,
- (JDIMENSION) compptr->v_samp_factor, FALSE);
- }
-
- /* Loop to process one whole iMCU row */
- for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
- yoffset++) {
- for (MCU_col_num = coef->mcu_ctr; MCU_col_num < cinfo->MCUs_per_row;
- MCU_col_num++) {
- /* Construct list of pointers to DCT blocks belonging to this MCU */
- blkn = 0; /* index of current DCT block within MCU */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION MCU_col_num; /* index of current MCU within row */
+ JDIMENSION last_MCU_col = cinfo->MCUs_per_row - 1;
+ JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
+ int blkn, ci, xindex, yindex, yoffset, blockcnt;
+ JDIMENSION start_col;
+ JBLOCKARRAY buffer[MAX_COMPS_IN_SCAN];
+ JBLOCKROW MCU_buffer[C_MAX_BLOCKS_IN_MCU];
+ JBLOCKROW buffer_ptr;
+ jpeg_component_info *compptr;
+
+ /* Align the virtual buffers for the components used in this scan. */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ buffer[ci] = (*cinfo->mem->access_virt_barray)
+ ((j_common_ptr) cinfo, coef->whole_image[compptr->component_index],
+ coef->iMCU_row_num * compptr->v_samp_factor,
+ (JDIMENSION) compptr->v_samp_factor, FALSE);
+ }
+
+ /* Loop to process one whole iMCU row */
+ for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
+ yoffset++) {
+ for (MCU_col_num = coef->mcu_ctr; MCU_col_num < cinfo->MCUs_per_row;
+ MCU_col_num++) {
+ /* Construct list of pointers to DCT blocks belonging to this MCU */
+ blkn = 0; /* index of current DCT block within MCU */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
compptr = cinfo->cur_comp_info[ci];
start_col = MCU_col_num * compptr->MCU_width;
blockcnt = (MCU_col_num < last_MCU_col) ? compptr->MCU_width
: compptr->last_col_width;
for (yindex = 0; yindex < compptr->MCU_height; yindex++) {
- if (coef->iMCU_row_num < last_iMCU_row ||
- yindex+yoffset < compptr->last_row_height) {
- /* Fill in pointers to real blocks in this row */
- buffer_ptr = buffer[ci][yindex+yoffset] + start_col;
- for (xindex = 0; xindex < blockcnt; xindex++)
- MCU_buffer[blkn++] = buffer_ptr++;
- } else {
- /* At bottom of image, need a whole row of dummy blocks */
- xindex = 0;
- }
- /* Fill in any dummy blocks needed in this row.
- * Dummy blocks are filled in the same way as in jccoefct.c:
- * all zeroes in the AC entries, DC entries equal to previous
- * block's DC value. The init routine has already zeroed the
- * AC entries, so we need only set the DC entries correctly.
- */
- for (; xindex < compptr->MCU_width; xindex++) {
- MCU_buffer[blkn] = coef->dummy_buffer[blkn];
- MCU_buffer[blkn][0][0] = MCU_buffer[blkn-1][0][0];
- blkn++;
- }
+ if (coef->iMCU_row_num < last_iMCU_row ||
+ yindex+yoffset < compptr->last_row_height) {
+ /* Fill in pointers to real blocks in this row */
+ buffer_ptr = buffer[ci][yindex+yoffset] + start_col;
+ for (xindex = 0; xindex < blockcnt; xindex++)
+ MCU_buffer[blkn++] = buffer_ptr++;
+ } else {
+ /* At bottom of image, need a whole row of dummy blocks */
+ xindex = 0;
+ }
+ /* Fill in any dummy blocks needed in this row.
+ * Dummy blocks are filled in the same way as in jccoefct.c:
+ * all zeroes in the AC entries, DC entries equal to previous
+ * block's DC value. The init routine has already zeroed the
+ * AC entries, so we need only set the DC entries correctly.
+ */
+ for (; xindex < compptr->MCU_width; xindex++) {
+ MCU_buffer[blkn] = coef->dummy_buffer[blkn];
+ MCU_buffer[blkn][0][0] = MCU_buffer[blkn-1][0][0];
+ blkn++;
+ }
}
- }
- /* Try to write the MCU. */
- if (! (*cinfo->entropy->encode_mcu) (cinfo, MCU_buffer)) {
+ }
+ /* Try to write the MCU. */
+ if (! (*cinfo->entropy->encode_mcu) (cinfo, MCU_buffer)) {
/* Suspension forced; update state counters and exit */
coef->MCU_vert_offset = yoffset;
coef->mcu_ctr = MCU_col_num;
return FALSE;
- }
- }
- /* Completed an MCU row, but perhaps not an iMCU row */
- coef->mcu_ctr = 0;
- }
- /* Completed the iMCU row, advance counters for next one */
- coef->iMCU_row_num++;
- start_iMCU_row(cinfo);
- return TRUE;
+ }
+ }
+ /* Completed an MCU row, but perhaps not an iMCU row */
+ coef->mcu_ctr = 0;
+ }
+ /* Completed the iMCU row, advance counters for next one */
+ coef->iMCU_row_num++;
+ start_iMCU_row(cinfo);
+ return TRUE;
}
@@ -355,28 +355,28 @@ compress_output (j_compress_ptr cinfo, JSAMPIMAGE input_buf)
LOCAL(void)
transencode_coef_controller (j_compress_ptr cinfo,
- jvirt_barray_ptr * coef_arrays)
+ jvirt_barray_ptr * coef_arrays)
{
- my_coef_ptr coef;
- JBLOCKROW buffer;
- int i;
+ my_coef_ptr coef;
+ JBLOCKROW buffer;
+ int i;
- coef = (my_coef_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ coef = (my_coef_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_coef_controller));
- cinfo->coef = (struct jpeg_c_coef_controller *) coef;
- coef->pub.start_pass = start_pass_coef;
- coef->pub.compress_data = compress_output;
+ cinfo->coef = (struct jpeg_c_coef_controller *) coef;
+ coef->pub.start_pass = start_pass_coef;
+ coef->pub.compress_data = compress_output;
- /* Save pointer to virtual arrays */
- coef->whole_image = coef_arrays;
+ /* Save pointer to virtual arrays */
+ coef->whole_image = coef_arrays;
- /* Allocate and pre-zero space for dummy DCT blocks. */
- buffer = (JBLOCKROW)
- (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ /* Allocate and pre-zero space for dummy DCT blocks. */
+ buffer = (JBLOCKROW)
+ (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
C_MAX_BLOCKS_IN_MCU * SIZEOF(JBLOCK));
- jzero_far((void FAR *) buffer, C_MAX_BLOCKS_IN_MCU * SIZEOF(JBLOCK));
- for (i = 0; i < C_MAX_BLOCKS_IN_MCU; i++) {
- coef->dummy_buffer[i] = buffer + i;
- }
+ jzero_far((void FAR *) buffer, C_MAX_BLOCKS_IN_MCU * SIZEOF(JBLOCK));
+ for (i = 0; i < C_MAX_BLOCKS_IN_MCU; i++) {
+ coef->dummy_buffer[i] = buffer + i;
+ }
}
diff --git a/src/lib/libjpeg/jdapimin.c b/src/lib/libjpeg/jdapimin.c
index 8b4032b7f07..4c9520aba97 100644
--- a/src/lib/libjpeg/jdapimin.c
+++ b/src/lib/libjpeg/jdapimin.c
@@ -30,57 +30,57 @@
GLOBAL(void)
jpeg_CreateDecompress (j_decompress_ptr cinfo, int version, size_t structsize)
{
- int i;
-
- /* Guard against version mismatches between library and caller. */
- cinfo->mem = NULL; /* so jpeg_destroy knows mem mgr not called */
- if (version != JPEG_LIB_VERSION)
- ERREXIT2(cinfo, JERR_BAD_LIB_VERSION, JPEG_LIB_VERSION, version);
- if (structsize != SIZEOF(struct jpeg_decompress_struct))
- ERREXIT2(cinfo, JERR_BAD_STRUCT_SIZE,
- (int) SIZEOF(struct jpeg_decompress_struct), (int) structsize);
-
- /* For debugging purposes, we zero the whole master structure.
- * But the application has already set the err pointer, and may have set
- * client_data, so we have to save and restore those fields.
- * Note: if application hasn't set client_data, tools like Purify may
- * complain here.
- */
- {
- struct jpeg_error_mgr * err = cinfo->err;
- void * client_data = cinfo->client_data; /* ignore Purify complaint here */
- MEMZERO(cinfo, SIZEOF(struct jpeg_decompress_struct));
- cinfo->err = err;
- cinfo->client_data = client_data;
- }
- cinfo->is_decompressor = TRUE;
-
- /* Initialize a memory manager instance for this object */
- jinit_memory_mgr((j_common_ptr) cinfo);
-
- /* Zero out pointers to permanent structures. */
- cinfo->progress = NULL;
- cinfo->src = NULL;
-
- for (i = 0; i < NUM_QUANT_TBLS; i++)
- cinfo->quant_tbl_ptrs[i] = NULL;
-
- for (i = 0; i < NUM_HUFF_TBLS; i++) {
- cinfo->dc_huff_tbl_ptrs[i] = NULL;
- cinfo->ac_huff_tbl_ptrs[i] = NULL;
- }
-
- /* Initialize marker processor so application can override methods
- * for COM, APPn markers before calling jpeg_read_header.
- */
- cinfo->marker_list = NULL;
- jinit_marker_reader(cinfo);
-
- /* And initialize the overall input controller. */
- jinit_input_controller(cinfo);
-
- /* OK, I'm ready */
- cinfo->global_state = DSTATE_START;
+ int i;
+
+ /* Guard against version mismatches between library and caller. */
+ cinfo->mem = NULL; /* so jpeg_destroy knows mem mgr not called */
+ if (version != JPEG_LIB_VERSION)
+ ERREXIT2(cinfo, JERR_BAD_LIB_VERSION, JPEG_LIB_VERSION, version);
+ if (structsize != SIZEOF(struct jpeg_decompress_struct))
+ ERREXIT2(cinfo, JERR_BAD_STRUCT_SIZE,
+ (int) SIZEOF(struct jpeg_decompress_struct), (int) structsize);
+
+ /* For debugging purposes, we zero the whole master structure.
+ * But the application has already set the err pointer, and may have set
+ * client_data, so we have to save and restore those fields.
+ * Note: if application hasn't set client_data, tools like Purify may
+ * complain here.
+ */
+ {
+ struct jpeg_error_mgr * err = cinfo->err;
+ void * client_data = cinfo->client_data; /* ignore Purify complaint here */
+ MEMZERO(cinfo, SIZEOF(struct jpeg_decompress_struct));
+ cinfo->err = err;
+ cinfo->client_data = client_data;
+ }
+ cinfo->is_decompressor = TRUE;
+
+ /* Initialize a memory manager instance for this object */
+ jinit_memory_mgr((j_common_ptr) cinfo);
+
+ /* Zero out pointers to permanent structures. */
+ cinfo->progress = NULL;
+ cinfo->src = NULL;
+
+ for (i = 0; i < NUM_QUANT_TBLS; i++)
+ cinfo->quant_tbl_ptrs[i] = NULL;
+
+ for (i = 0; i < NUM_HUFF_TBLS; i++) {
+ cinfo->dc_huff_tbl_ptrs[i] = NULL;
+ cinfo->ac_huff_tbl_ptrs[i] = NULL;
+ }
+
+ /* Initialize marker processor so application can override methods
+ * for COM, APPn markers before calling jpeg_read_header.
+ */
+ cinfo->marker_list = NULL;
+ jinit_marker_reader(cinfo);
+
+ /* And initialize the overall input controller. */
+ jinit_input_controller(cinfo);
+
+ /* OK, I'm ready */
+ cinfo->global_state = DSTATE_START;
}
@@ -91,7 +91,7 @@ jpeg_CreateDecompress (j_decompress_ptr cinfo, int version, size_t structsize)
GLOBAL(void)
jpeg_destroy_decompress (j_decompress_ptr cinfo)
{
- jpeg_destroy((j_common_ptr) cinfo); /* use common routine */
+ jpeg_destroy((j_common_ptr) cinfo); /* use common routine */
}
@@ -103,7 +103,7 @@ jpeg_destroy_decompress (j_decompress_ptr cinfo)
GLOBAL(void)
jpeg_abort_decompress (j_decompress_ptr cinfo)
{
- jpeg_abort((j_common_ptr) cinfo); /* use common routine */
+ jpeg_abort((j_common_ptr) cinfo); /* use common routine */
}
@@ -114,100 +114,100 @@ jpeg_abort_decompress (j_decompress_ptr cinfo)
LOCAL(void)
default_decompress_parms (j_decompress_ptr cinfo)
{
- /* Guess the input colorspace, and set output colorspace accordingly. */
- /* (Wish JPEG committee had provided a real way to specify this...) */
- /* Note application may override our guesses. */
- switch (cinfo->num_components) {
- case 1:
- cinfo->jpeg_color_space = JCS_GRAYSCALE;
- cinfo->out_color_space = JCS_GRAYSCALE;
- break;
-
- case 3:
- if (cinfo->saw_JFIF_marker) {
- cinfo->jpeg_color_space = JCS_YCbCr; /* JFIF implies YCbCr */
- } else if (cinfo->saw_Adobe_marker) {
- switch (cinfo->Adobe_transform) {
- case 0:
+ /* Guess the input colorspace, and set output colorspace accordingly. */
+ /* (Wish JPEG committee had provided a real way to specify this...) */
+ /* Note application may override our guesses. */
+ switch (cinfo->num_components) {
+ case 1:
+ cinfo->jpeg_color_space = JCS_GRAYSCALE;
+ cinfo->out_color_space = JCS_GRAYSCALE;
+ break;
+
+ case 3:
+ if (cinfo->saw_JFIF_marker) {
+ cinfo->jpeg_color_space = JCS_YCbCr; /* JFIF implies YCbCr */
+ } else if (cinfo->saw_Adobe_marker) {
+ switch (cinfo->Adobe_transform) {
+ case 0:
cinfo->jpeg_color_space = JCS_RGB;
break;
- case 1:
+ case 1:
cinfo->jpeg_color_space = JCS_YCbCr;
break;
- default:
+ default:
WARNMS1(cinfo, JWRN_ADOBE_XFORM, cinfo->Adobe_transform);
cinfo->jpeg_color_space = JCS_YCbCr; /* assume it's YCbCr */
break;
- }
- } else {
- /* Saw no special markers, try to guess from the component IDs */
- int cid0 = cinfo->comp_info[0].component_id;
- int cid1 = cinfo->comp_info[1].component_id;
- int cid2 = cinfo->comp_info[2].component_id;
-
- if (cid0 == 1 && cid1 == 2 && cid2 == 3)
+ }
+ } else {
+ /* Saw no special markers, try to guess from the component IDs */
+ int cid0 = cinfo->comp_info[0].component_id;
+ int cid1 = cinfo->comp_info[1].component_id;
+ int cid2 = cinfo->comp_info[2].component_id;
+
+ if (cid0 == 1 && cid1 == 2 && cid2 == 3)
cinfo->jpeg_color_space = JCS_YCbCr; /* assume JFIF w/out marker */
- else if (cid0 == 82 && cid1 == 71 && cid2 == 66)
+ else if (cid0 == 82 && cid1 == 71 && cid2 == 66)
cinfo->jpeg_color_space = JCS_RGB; /* ASCII 'R', 'G', 'B' */
- else {
+ else {
TRACEMS3(cinfo, 1, JTRC_UNKNOWN_IDS, cid0, cid1, cid2);
cinfo->jpeg_color_space = JCS_YCbCr; /* assume it's YCbCr */
- }
- }
- /* Always guess RGB is proper output colorspace. */
- cinfo->out_color_space = JCS_RGB;
- break;
-
- case 4:
- if (cinfo->saw_Adobe_marker) {
- switch (cinfo->Adobe_transform) {
- case 0:
+ }
+ }
+ /* Always guess RGB is proper output colorspace. */
+ cinfo->out_color_space = JCS_RGB;
+ break;
+
+ case 4:
+ if (cinfo->saw_Adobe_marker) {
+ switch (cinfo->Adobe_transform) {
+ case 0:
cinfo->jpeg_color_space = JCS_CMYK;
break;
- case 2:
+ case 2:
cinfo->jpeg_color_space = JCS_YCCK;
break;
- default:
+ default:
WARNMS1(cinfo, JWRN_ADOBE_XFORM, cinfo->Adobe_transform);
cinfo->jpeg_color_space = JCS_YCCK; /* assume it's YCCK */
break;
- }
- } else {
- /* No special markers, assume straight CMYK. */
- cinfo->jpeg_color_space = JCS_CMYK;
- }
- cinfo->out_color_space = JCS_CMYK;
- break;
-
- default:
- cinfo->jpeg_color_space = JCS_UNKNOWN;
- cinfo->out_color_space = JCS_UNKNOWN;
- break;
- }
-
- /* Set defaults for other decompression parameters. */
- cinfo->scale_num = cinfo->block_size; /* 1:1 scaling */
- cinfo->scale_denom = cinfo->block_size;
- cinfo->output_gamma = 1.0;
- cinfo->buffered_image = FALSE;
- cinfo->raw_data_out = FALSE;
- cinfo->dct_method = JDCT_DEFAULT;
- cinfo->do_fancy_upsampling = TRUE;
- cinfo->do_block_smoothing = TRUE;
- cinfo->quantize_colors = FALSE;
- /* We set these in case application only sets quantize_colors. */
- cinfo->dither_mode = JDITHER_FS;
+ }
+ } else {
+ /* No special markers, assume straight CMYK. */
+ cinfo->jpeg_color_space = JCS_CMYK;
+ }
+ cinfo->out_color_space = JCS_CMYK;
+ break;
+
+ default:
+ cinfo->jpeg_color_space = JCS_UNKNOWN;
+ cinfo->out_color_space = JCS_UNKNOWN;
+ break;
+ }
+
+ /* Set defaults for other decompression parameters. */
+ cinfo->scale_num = cinfo->block_size; /* 1:1 scaling */
+ cinfo->scale_denom = cinfo->block_size;
+ cinfo->output_gamma = 1.0;
+ cinfo->buffered_image = FALSE;
+ cinfo->raw_data_out = FALSE;
+ cinfo->dct_method = JDCT_DEFAULT;
+ cinfo->do_fancy_upsampling = TRUE;
+ cinfo->do_block_smoothing = TRUE;
+ cinfo->quantize_colors = FALSE;
+ /* We set these in case application only sets quantize_colors. */
+ cinfo->dither_mode = JDITHER_FS;
#ifdef QUANT_2PASS_SUPPORTED
- cinfo->two_pass_quantize = TRUE;
+ cinfo->two_pass_quantize = TRUE;
#else
- cinfo->two_pass_quantize = FALSE;
+ cinfo->two_pass_quantize = FALSE;
#endif
- cinfo->desired_number_of_colors = 256;
- cinfo->colormap = NULL;
- /* Initialize for no mode change in buffered-image mode. */
- cinfo->enable_1pass_quant = FALSE;
- cinfo->enable_external_quant = FALSE;
- cinfo->enable_2pass_quant = FALSE;
+ cinfo->desired_number_of_colors = 256;
+ cinfo->colormap = NULL;
+ /* Initialize for no mode change in buffered-image mode. */
+ cinfo->enable_1pass_quant = FALSE;
+ cinfo->enable_external_quant = FALSE;
+ cinfo->enable_2pass_quant = FALSE;
}
@@ -241,34 +241,34 @@ default_decompress_parms (j_decompress_ptr cinfo)
GLOBAL(int)
jpeg_read_header (j_decompress_ptr cinfo, boolean require_image)
{
- int retcode;
-
- if (cinfo->global_state != DSTATE_START &&
- cinfo->global_state != DSTATE_INHEADER)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- retcode = jpeg_consume_input(cinfo);
-
- switch (retcode) {
- case JPEG_REACHED_SOS:
- retcode = JPEG_HEADER_OK;
- break;
- case JPEG_REACHED_EOI:
- if (require_image) /* Complain if application wanted an image */
- ERREXIT(cinfo, JERR_NO_IMAGE);
- /* Reset to start state; it would be safer to require the application to
- * call jpeg_abort, but we can't change it now for compatibility reasons.
- * A side effect is to free any temporary memory (there shouldn't be any).
- */
- jpeg_abort((j_common_ptr) cinfo); /* sets state = DSTATE_START */
- retcode = JPEG_HEADER_TABLES_ONLY;
- break;
- case JPEG_SUSPENDED:
- /* no work */
- break;
- }
-
- return retcode;
+ int retcode;
+
+ if (cinfo->global_state != DSTATE_START &&
+ cinfo->global_state != DSTATE_INHEADER)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ retcode = jpeg_consume_input(cinfo);
+
+ switch (retcode) {
+ case JPEG_REACHED_SOS:
+ retcode = JPEG_HEADER_OK;
+ break;
+ case JPEG_REACHED_EOI:
+ if (require_image) /* Complain if application wanted an image */
+ ERREXIT(cinfo, JERR_NO_IMAGE);
+ /* Reset to start state; it would be safer to require the application to
+ * call jpeg_abort, but we can't change it now for compatibility reasons.
+ * A side effect is to free any temporary memory (there shouldn't be any).
+ */
+ jpeg_abort((j_common_ptr) cinfo); /* sets state = DSTATE_START */
+ retcode = JPEG_HEADER_TABLES_ONLY;
+ break;
+ case JPEG_SUSPENDED:
+ /* no work */
+ break;
+ }
+
+ return retcode;
}
@@ -287,43 +287,43 @@ jpeg_read_header (j_decompress_ptr cinfo, boolean require_image)
GLOBAL(int)
jpeg_consume_input (j_decompress_ptr cinfo)
{
- int retcode = JPEG_SUSPENDED;
-
- /* NB: every possible DSTATE value should be listed in this switch */
- switch (cinfo->global_state) {
- case DSTATE_START:
- /* Start-of-datastream actions: reset appropriate modules */
- (*cinfo->inputctl->reset_input_controller) (cinfo);
- /* Initialize application's data source module */
- (*cinfo->src->init_source) (cinfo);
- cinfo->global_state = DSTATE_INHEADER;
- /*FALLTHROUGH*/
- case DSTATE_INHEADER:
- retcode = (*cinfo->inputctl->consume_input) (cinfo);
- if (retcode == JPEG_REACHED_SOS) { /* Found SOS, prepare to decompress */
- /* Set up default parameters based on header data */
- default_decompress_parms(cinfo);
- /* Set global state: ready for start_decompress */
- cinfo->global_state = DSTATE_READY;
- }
- break;
- case DSTATE_READY:
- /* Can't advance past first SOS until start_decompress is called */
- retcode = JPEG_REACHED_SOS;
- break;
- case DSTATE_PRELOAD:
- case DSTATE_PRESCAN:
- case DSTATE_SCANNING:
- case DSTATE_RAW_OK:
- case DSTATE_BUFIMAGE:
- case DSTATE_BUFPOST:
- case DSTATE_STOPPING:
- retcode = (*cinfo->inputctl->consume_input) (cinfo);
- break;
- default:
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- }
- return retcode;
+ int retcode = JPEG_SUSPENDED;
+
+ /* NB: every possible DSTATE value should be listed in this switch */
+ switch (cinfo->global_state) {
+ case DSTATE_START:
+ /* Start-of-datastream actions: reset appropriate modules */
+ (*cinfo->inputctl->reset_input_controller) (cinfo);
+ /* Initialize application's data source module */
+ (*cinfo->src->init_source) (cinfo);
+ cinfo->global_state = DSTATE_INHEADER;
+ /*FALLTHROUGH*/
+ case DSTATE_INHEADER:
+ retcode = (*cinfo->inputctl->consume_input) (cinfo);
+ if (retcode == JPEG_REACHED_SOS) { /* Found SOS, prepare to decompress */
+ /* Set up default parameters based on header data */
+ default_decompress_parms(cinfo);
+ /* Set global state: ready for start_decompress */
+ cinfo->global_state = DSTATE_READY;
+ }
+ break;
+ case DSTATE_READY:
+ /* Can't advance past first SOS until start_decompress is called */
+ retcode = JPEG_REACHED_SOS;
+ break;
+ case DSTATE_PRELOAD:
+ case DSTATE_PRESCAN:
+ case DSTATE_SCANNING:
+ case DSTATE_RAW_OK:
+ case DSTATE_BUFIMAGE:
+ case DSTATE_BUFPOST:
+ case DSTATE_STOPPING:
+ retcode = (*cinfo->inputctl->consume_input) (cinfo);
+ break;
+ default:
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ }
+ return retcode;
}
@@ -334,11 +334,11 @@ jpeg_consume_input (j_decompress_ptr cinfo)
GLOBAL(boolean)
jpeg_input_complete (j_decompress_ptr cinfo)
{
- /* Check for valid jpeg object */
- if (cinfo->global_state < DSTATE_START ||
- cinfo->global_state > DSTATE_STOPPING)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- return cinfo->inputctl->eoi_reached;
+ /* Check for valid jpeg object */
+ if (cinfo->global_state < DSTATE_START ||
+ cinfo->global_state > DSTATE_STOPPING)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ return cinfo->inputctl->eoi_reached;
}
@@ -349,11 +349,11 @@ jpeg_input_complete (j_decompress_ptr cinfo)
GLOBAL(boolean)
jpeg_has_multiple_scans (j_decompress_ptr cinfo)
{
- /* Only valid after jpeg_read_header completes */
- if (cinfo->global_state < DSTATE_READY ||
- cinfo->global_state > DSTATE_STOPPING)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- return cinfo->inputctl->has_multiple_scans;
+ /* Only valid after jpeg_read_header completes */
+ if (cinfo->global_state < DSTATE_READY ||
+ cinfo->global_state > DSTATE_STOPPING)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ return cinfo->inputctl->has_multiple_scans;
}
@@ -369,28 +369,28 @@ jpeg_has_multiple_scans (j_decompress_ptr cinfo)
GLOBAL(boolean)
jpeg_finish_decompress (j_decompress_ptr cinfo)
{
- if ((cinfo->global_state == DSTATE_SCANNING ||
- cinfo->global_state == DSTATE_RAW_OK) && ! cinfo->buffered_image) {
- /* Terminate final pass of non-buffered mode */
- if (cinfo->output_scanline < cinfo->output_height)
- ERREXIT(cinfo, JERR_TOO_LITTLE_DATA);
- (*cinfo->master->finish_output_pass) (cinfo);
- cinfo->global_state = DSTATE_STOPPING;
- } else if (cinfo->global_state == DSTATE_BUFIMAGE) {
- /* Finishing after a buffered-image operation */
- cinfo->global_state = DSTATE_STOPPING;
- } else if (cinfo->global_state != DSTATE_STOPPING) {
- /* STOPPING = repeat call after a suspension, anything else is error */
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- }
- /* Read until EOI */
- while (! cinfo->inputctl->eoi_reached) {
- if ((*cinfo->inputctl->consume_input) (cinfo) == JPEG_SUSPENDED)
- return FALSE; /* Suspend, come back later */
- }
- /* Do final cleanup */
- (*cinfo->src->term_source) (cinfo);
- /* We can use jpeg_abort to release memory and reset global_state */
- jpeg_abort((j_common_ptr) cinfo);
- return TRUE;
+ if ((cinfo->global_state == DSTATE_SCANNING ||
+ cinfo->global_state == DSTATE_RAW_OK) && ! cinfo->buffered_image) {
+ /* Terminate final pass of non-buffered mode */
+ if (cinfo->output_scanline < cinfo->output_height)
+ ERREXIT(cinfo, JERR_TOO_LITTLE_DATA);
+ (*cinfo->master->finish_output_pass) (cinfo);
+ cinfo->global_state = DSTATE_STOPPING;
+ } else if (cinfo->global_state == DSTATE_BUFIMAGE) {
+ /* Finishing after a buffered-image operation */
+ cinfo->global_state = DSTATE_STOPPING;
+ } else if (cinfo->global_state != DSTATE_STOPPING) {
+ /* STOPPING = repeat call after a suspension, anything else is error */
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ }
+ /* Read until EOI */
+ while (! cinfo->inputctl->eoi_reached) {
+ if ((*cinfo->inputctl->consume_input) (cinfo) == JPEG_SUSPENDED)
+ return FALSE; /* Suspend, come back later */
+ }
+ /* Do final cleanup */
+ (*cinfo->src->term_source) (cinfo);
+ /* We can use jpeg_abort to release memory and reset global_state */
+ jpeg_abort((j_common_ptr) cinfo);
+ return TRUE;
}
diff --git a/src/lib/libjpeg/jdapistd.c b/src/lib/libjpeg/jdapistd.c
index 9d745377724..291f77f128d 100644
--- a/src/lib/libjpeg/jdapistd.c
+++ b/src/lib/libjpeg/jdapistd.c
@@ -37,49 +37,49 @@ LOCAL(boolean) output_pass_setup JPP((j_decompress_ptr cinfo));
GLOBAL(boolean)
jpeg_start_decompress (j_decompress_ptr cinfo)
{
- if (cinfo->global_state == DSTATE_READY) {
- /* First call: initialize master control, select active modules */
- jinit_master_decompress(cinfo);
- if (cinfo->buffered_image) {
- /* No more work here; expecting jpeg_start_output next */
- cinfo->global_state = DSTATE_BUFIMAGE;
- return TRUE;
- }
- cinfo->global_state = DSTATE_PRELOAD;
- }
- if (cinfo->global_state == DSTATE_PRELOAD) {
- /* If file has multiple scans, absorb them all into the coef buffer */
- if (cinfo->inputctl->has_multiple_scans) {
+ if (cinfo->global_state == DSTATE_READY) {
+ /* First call: initialize master control, select active modules */
+ jinit_master_decompress(cinfo);
+ if (cinfo->buffered_image) {
+ /* No more work here; expecting jpeg_start_output next */
+ cinfo->global_state = DSTATE_BUFIMAGE;
+ return TRUE;
+ }
+ cinfo->global_state = DSTATE_PRELOAD;
+ }
+ if (cinfo->global_state == DSTATE_PRELOAD) {
+ /* If file has multiple scans, absorb them all into the coef buffer */
+ if (cinfo->inputctl->has_multiple_scans) {
#ifdef D_MULTISCAN_FILES_SUPPORTED
- for (;;) {
+ for (;;) {
int retcode;
/* Call progress monitor hook if present */
if (cinfo->progress != NULL)
- (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
+ (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
/* Absorb some more input */
retcode = (*cinfo->inputctl->consume_input) (cinfo);
if (retcode == JPEG_SUSPENDED)
- return FALSE;
+ return FALSE;
if (retcode == JPEG_REACHED_EOI)
- break;
+ break;
/* Advance progress counter if appropriate */
if (cinfo->progress != NULL &&
- (retcode == JPEG_ROW_COMPLETED || retcode == JPEG_REACHED_SOS)) {
- if (++cinfo->progress->pass_counter >= cinfo->progress->pass_limit) {
- /* jdmaster underestimated number of scans; ratchet up one scan */
- cinfo->progress->pass_limit += (long) cinfo->total_iMCU_rows;
- }
+ (retcode == JPEG_ROW_COMPLETED || retcode == JPEG_REACHED_SOS)) {
+ if (++cinfo->progress->pass_counter >= cinfo->progress->pass_limit) {
+ /* jdmaster underestimated number of scans; ratchet up one scan */
+ cinfo->progress->pass_limit += (long) cinfo->total_iMCU_rows;
+ }
}
- }
+ }
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif /* D_MULTISCAN_FILES_SUPPORTED */
- }
- cinfo->output_scan_number = cinfo->input_scan_number;
- } else if (cinfo->global_state != DSTATE_PRESCAN)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- /* Perform any dummy output passes, and set up for the final pass */
- return output_pass_setup(cinfo);
+ }
+ cinfo->output_scan_number = cinfo->input_scan_number;
+ } else if (cinfo->global_state != DSTATE_PRESCAN)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ /* Perform any dummy output passes, and set up for the final pass */
+ return output_pass_setup(cinfo);
}
@@ -94,44 +94,44 @@ jpeg_start_decompress (j_decompress_ptr cinfo)
LOCAL(boolean)
output_pass_setup (j_decompress_ptr cinfo)
{
- if (cinfo->global_state != DSTATE_PRESCAN) {
- /* First call: do pass setup */
- (*cinfo->master->prepare_for_output_pass) (cinfo);
- cinfo->output_scanline = 0;
- cinfo->global_state = DSTATE_PRESCAN;
- }
- /* Loop over any required dummy passes */
- while (cinfo->master->is_dummy_pass) {
+ if (cinfo->global_state != DSTATE_PRESCAN) {
+ /* First call: do pass setup */
+ (*cinfo->master->prepare_for_output_pass) (cinfo);
+ cinfo->output_scanline = 0;
+ cinfo->global_state = DSTATE_PRESCAN;
+ }
+ /* Loop over any required dummy passes */
+ while (cinfo->master->is_dummy_pass) {
#ifdef QUANT_2PASS_SUPPORTED
- /* Crank through the dummy pass */
- while (cinfo->output_scanline < cinfo->output_height) {
- JDIMENSION last_scanline;
- /* Call progress monitor hook if present */
- if (cinfo->progress != NULL) {
+ /* Crank through the dummy pass */
+ while (cinfo->output_scanline < cinfo->output_height) {
+ JDIMENSION last_scanline;
+ /* Call progress monitor hook if present */
+ if (cinfo->progress != NULL) {
cinfo->progress->pass_counter = (long) cinfo->output_scanline;
cinfo->progress->pass_limit = (long) cinfo->output_height;
(*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
- }
- /* Process some data */
- last_scanline = cinfo->output_scanline;
- (*cinfo->main->process_data) (cinfo, (JSAMPARRAY) NULL,
- &cinfo->output_scanline, (JDIMENSION) 0);
- if (cinfo->output_scanline == last_scanline)
- return FALSE; /* No progress made, must suspend */
- }
- /* Finish up dummy pass, and set up for another one */
- (*cinfo->master->finish_output_pass) (cinfo);
- (*cinfo->master->prepare_for_output_pass) (cinfo);
- cinfo->output_scanline = 0;
+ }
+ /* Process some data */
+ last_scanline = cinfo->output_scanline;
+ (*cinfo->main->process_data) (cinfo, (JSAMPARRAY) NULL,
+ &cinfo->output_scanline, (JDIMENSION) 0);
+ if (cinfo->output_scanline == last_scanline)
+ return FALSE; /* No progress made, must suspend */
+ }
+ /* Finish up dummy pass, and set up for another one */
+ (*cinfo->master->finish_output_pass) (cinfo);
+ (*cinfo->master->prepare_for_output_pass) (cinfo);
+ cinfo->output_scanline = 0;
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif /* QUANT_2PASS_SUPPORTED */
- }
- /* Ready for application to drive output pass through
- * jpeg_read_scanlines or jpeg_read_raw_data.
- */
- cinfo->global_state = cinfo->raw_data_out ? DSTATE_RAW_OK : DSTATE_SCANNING;
- return TRUE;
+ }
+ /* Ready for application to drive output pass through
+ * jpeg_read_scanlines or jpeg_read_raw_data.
+ */
+ cinfo->global_state = cinfo->raw_data_out ? DSTATE_RAW_OK : DSTATE_SCANNING;
+ return TRUE;
}
@@ -150,29 +150,29 @@ output_pass_setup (j_decompress_ptr cinfo)
GLOBAL(JDIMENSION)
jpeg_read_scanlines (j_decompress_ptr cinfo, JSAMPARRAY scanlines,
- JDIMENSION max_lines)
+ JDIMENSION max_lines)
{
- JDIMENSION row_ctr;
-
- if (cinfo->global_state != DSTATE_SCANNING)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- if (cinfo->output_scanline >= cinfo->output_height) {
- WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
- return 0;
- }
-
- /* Call progress monitor hook if present */
- if (cinfo->progress != NULL) {
- cinfo->progress->pass_counter = (long) cinfo->output_scanline;
- cinfo->progress->pass_limit = (long) cinfo->output_height;
- (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
- }
-
- /* Process some data */
- row_ctr = 0;
- (*cinfo->main->process_data) (cinfo, scanlines, &row_ctr, max_lines);
- cinfo->output_scanline += row_ctr;
- return row_ctr;
+ JDIMENSION row_ctr;
+
+ if (cinfo->global_state != DSTATE_SCANNING)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ if (cinfo->output_scanline >= cinfo->output_height) {
+ WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
+ return 0;
+ }
+
+ /* Call progress monitor hook if present */
+ if (cinfo->progress != NULL) {
+ cinfo->progress->pass_counter = (long) cinfo->output_scanline;
+ cinfo->progress->pass_limit = (long) cinfo->output_height;
+ (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
+ }
+
+ /* Process some data */
+ row_ctr = 0;
+ (*cinfo->main->process_data) (cinfo, scanlines, &row_ctr, max_lines);
+ cinfo->output_scanline += row_ctr;
+ return row_ctr;
}
@@ -183,36 +183,36 @@ jpeg_read_scanlines (j_decompress_ptr cinfo, JSAMPARRAY scanlines,
GLOBAL(JDIMENSION)
jpeg_read_raw_data (j_decompress_ptr cinfo, JSAMPIMAGE data,
- JDIMENSION max_lines)
+ JDIMENSION max_lines)
{
- JDIMENSION lines_per_iMCU_row;
-
- if (cinfo->global_state != DSTATE_RAW_OK)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- if (cinfo->output_scanline >= cinfo->output_height) {
- WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
- return 0;
- }
-
- /* Call progress monitor hook if present */
- if (cinfo->progress != NULL) {
- cinfo->progress->pass_counter = (long) cinfo->output_scanline;
- cinfo->progress->pass_limit = (long) cinfo->output_height;
- (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
- }
-
- /* Verify that at least one iMCU row can be returned. */
- lines_per_iMCU_row = cinfo->max_v_samp_factor * cinfo->min_DCT_v_scaled_size;
- if (max_lines < lines_per_iMCU_row)
- ERREXIT(cinfo, JERR_BUFFER_SIZE);
-
- /* Decompress directly into user's buffer. */
- if (! (*cinfo->coef->decompress_data) (cinfo, data))
- return 0; /* suspension forced, can do nothing more */
-
- /* OK, we processed one iMCU row. */
- cinfo->output_scanline += lines_per_iMCU_row;
- return lines_per_iMCU_row;
+ JDIMENSION lines_per_iMCU_row;
+
+ if (cinfo->global_state != DSTATE_RAW_OK)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ if (cinfo->output_scanline >= cinfo->output_height) {
+ WARNMS(cinfo, JWRN_TOO_MUCH_DATA);
+ return 0;
+ }
+
+ /* Call progress monitor hook if present */
+ if (cinfo->progress != NULL) {
+ cinfo->progress->pass_counter = (long) cinfo->output_scanline;
+ cinfo->progress->pass_limit = (long) cinfo->output_height;
+ (*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
+ }
+
+ /* Verify that at least one iMCU row can be returned. */
+ lines_per_iMCU_row = cinfo->max_v_samp_factor * cinfo->min_DCT_v_scaled_size;
+ if (max_lines < lines_per_iMCU_row)
+ ERREXIT(cinfo, JERR_BUFFER_SIZE);
+
+ /* Decompress directly into user's buffer. */
+ if (! (*cinfo->coef->decompress_data) (cinfo, data))
+ return 0; /* suspension forced, can do nothing more */
+
+ /* OK, we processed one iMCU row. */
+ cinfo->output_scanline += lines_per_iMCU_row;
+ return lines_per_iMCU_row;
}
@@ -227,18 +227,18 @@ jpeg_read_raw_data (j_decompress_ptr cinfo, JSAMPIMAGE data,
GLOBAL(boolean)
jpeg_start_output (j_decompress_ptr cinfo, int scan_number)
{
- if (cinfo->global_state != DSTATE_BUFIMAGE &&
- cinfo->global_state != DSTATE_PRESCAN)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- /* Limit scan number to valid range */
- if (scan_number <= 0)
- scan_number = 1;
- if (cinfo->inputctl->eoi_reached &&
- scan_number > cinfo->input_scan_number)
- scan_number = cinfo->input_scan_number;
- cinfo->output_scan_number = scan_number;
- /* Perform any dummy output passes, and set up for the real pass */
- return output_pass_setup(cinfo);
+ if (cinfo->global_state != DSTATE_BUFIMAGE &&
+ cinfo->global_state != DSTATE_PRESCAN)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ /* Limit scan number to valid range */
+ if (scan_number <= 0)
+ scan_number = 1;
+ if (cinfo->inputctl->eoi_reached &&
+ scan_number > cinfo->input_scan_number)
+ scan_number = cinfo->input_scan_number;
+ cinfo->output_scan_number = scan_number;
+ /* Perform any dummy output passes, and set up for the real pass */
+ return output_pass_setup(cinfo);
}
@@ -252,24 +252,24 @@ jpeg_start_output (j_decompress_ptr cinfo, int scan_number)
GLOBAL(boolean)
jpeg_finish_output (j_decompress_ptr cinfo)
{
- if ((cinfo->global_state == DSTATE_SCANNING ||
- cinfo->global_state == DSTATE_RAW_OK) && cinfo->buffered_image) {
- /* Terminate this pass. */
- /* We do not require the whole pass to have been completed. */
- (*cinfo->master->finish_output_pass) (cinfo);
- cinfo->global_state = DSTATE_BUFPOST;
- } else if (cinfo->global_state != DSTATE_BUFPOST) {
- /* BUFPOST = repeat call after a suspension, anything else is error */
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- }
- /* Read markers looking for SOS or EOI */
- while (cinfo->input_scan_number <= cinfo->output_scan_number &&
- ! cinfo->inputctl->eoi_reached) {
- if ((*cinfo->inputctl->consume_input) (cinfo) == JPEG_SUSPENDED)
- return FALSE; /* Suspend, come back later */
- }
- cinfo->global_state = DSTATE_BUFIMAGE;
- return TRUE;
+ if ((cinfo->global_state == DSTATE_SCANNING ||
+ cinfo->global_state == DSTATE_RAW_OK) && cinfo->buffered_image) {
+ /* Terminate this pass. */
+ /* We do not require the whole pass to have been completed. */
+ (*cinfo->master->finish_output_pass) (cinfo);
+ cinfo->global_state = DSTATE_BUFPOST;
+ } else if (cinfo->global_state != DSTATE_BUFPOST) {
+ /* BUFPOST = repeat call after a suspension, anything else is error */
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ }
+ /* Read markers looking for SOS or EOI */
+ while (cinfo->input_scan_number <= cinfo->output_scan_number &&
+ ! cinfo->inputctl->eoi_reached) {
+ if ((*cinfo->inputctl->consume_input) (cinfo) == JPEG_SUSPENDED)
+ return FALSE; /* Suspend, come back later */
+ }
+ cinfo->global_state = DSTATE_BUFIMAGE;
+ return TRUE;
}
#endif /* D_MULTISCAN_FILES_SUPPORTED */
diff --git a/src/lib/libjpeg/jdarith.c b/src/lib/libjpeg/jdarith.c
index d5c04953195..d567217c024 100644
--- a/src/lib/libjpeg/jdarith.c
+++ b/src/lib/libjpeg/jdarith.c
@@ -21,25 +21,25 @@
/* Expanded entropy decoder object for arithmetic decoding. */
typedef struct {
- struct jpeg_entropy_decoder pub; /* public fields */
+ struct jpeg_entropy_decoder pub; /* public fields */
- INT32 c; /* C register, base of coding interval + input bit buffer */
- INT32 a; /* A register, normalized size of coding interval */
- int ct; /* bit shift counter, # of bits left in bit buffer part of C */
- /* init: ct = -16 */
- /* run: ct = 0..7 */
- /* error: ct = -1 */
- int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
- int dc_context[MAX_COMPS_IN_SCAN]; /* context index for DC conditioning */
+ INT32 c; /* C register, base of coding interval + input bit buffer */
+ INT32 a; /* A register, normalized size of coding interval */
+ int ct; /* bit shift counter, # of bits left in bit buffer part of C */
+ /* init: ct = -16 */
+ /* run: ct = 0..7 */
+ /* error: ct = -1 */
+ int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
+ int dc_context[MAX_COMPS_IN_SCAN]; /* context index for DC conditioning */
- unsigned int restarts_to_go; /* MCUs left in this restart interval */
+ unsigned int restarts_to_go; /* MCUs left in this restart interval */
- /* Pointers to statistics areas (these workspaces have image lifespan) */
- unsigned char * dc_stats[NUM_ARITH_TBLS];
- unsigned char * ac_stats[NUM_ARITH_TBLS];
+ /* Pointers to statistics areas (these workspaces have image lifespan) */
+ unsigned char * dc_stats[NUM_ARITH_TBLS];
+ unsigned char * ac_stats[NUM_ARITH_TBLS];
- /* Statistics bin for coding with fixed probability 0.5 */
- unsigned char fixed_bin[4];
+ /* Statistics bin for coding with fixed probability 0.5 */
+ unsigned char fixed_bin[4];
} arith_entropy_decoder;
typedef arith_entropy_decoder * arith_entropy_ptr;
@@ -65,13 +65,13 @@ LOCAL(int)
get_byte (j_decompress_ptr cinfo)
/* Read next input byte; we do not support suspension in this module. */
{
- struct jpeg_source_mgr * src = cinfo->src;
+ struct jpeg_source_mgr * src = cinfo->src;
- if (src->bytes_in_buffer == 0)
- if (! (*src->fill_input_buffer) (cinfo))
- ERREXIT(cinfo, JERR_CANT_SUSPEND);
- src->bytes_in_buffer--;
- return GETJOCTET(*src->next_input_byte++);
+ if (src->bytes_in_buffer == 0)
+ if (! (*src->fill_input_buffer) (cinfo))
+ ERREXIT(cinfo, JERR_CANT_SUSPEND);
+ src->bytes_in_buffer--;
+ return GETJOCTET(*src->next_input_byte++);
}
@@ -105,80 +105,80 @@ get_byte (j_decompress_ptr cinfo)
LOCAL(int)
arith_decode (j_decompress_ptr cinfo, unsigned char *st)
{
- register arith_entropy_ptr e = (arith_entropy_ptr) cinfo->entropy;
- register unsigned char nl, nm;
- register INT32 qe, temp;
- register int sv, data;
-
- /* Renormalization & data input per section D.2.6 */
- while (e->a < 0x8000L) {
- if (--e->ct < 0) {
- /* Need to fetch next data byte */
- if (cinfo->unread_marker)
- data = 0; /* stuff zero data */
- else {
- data = get_byte(cinfo); /* read next input byte */
- if (data == 0xFF) { /* zero stuff or marker code */
- do data = get_byte(cinfo);
- while (data == 0xFF); /* swallow extra 0xFF bytes */
- if (data == 0)
- data = 0xFF; /* discard stuffed zero byte */
- else {
- /* Note: Different from the Huffman decoder, hitting
- * a marker while processing the compressed data
- * segment is legal in arithmetic coding.
- * The convention is to supply zero data
- * then until decoding is complete.
- */
- cinfo->unread_marker = data;
- data = 0;
- }
- }
- }
- e->c = (e->c << 8) | data; /* insert data into C register */
- if ((e->ct += 8) < 0) /* update bit shift counter */
+ register arith_entropy_ptr e = (arith_entropy_ptr) cinfo->entropy;
+ register unsigned char nl, nm;
+ register INT32 qe, temp;
+ register int sv, data;
+
+ /* Renormalization & data input per section D.2.6 */
+ while (e->a < 0x8000L) {
+ if (--e->ct < 0) {
+ /* Need to fetch next data byte */
+ if (cinfo->unread_marker)
+ data = 0; /* stuff zero data */
+ else {
+ data = get_byte(cinfo); /* read next input byte */
+ if (data == 0xFF) { /* zero stuff or marker code */
+ do data = get_byte(cinfo);
+ while (data == 0xFF); /* swallow extra 0xFF bytes */
+ if (data == 0)
+ data = 0xFF; /* discard stuffed zero byte */
+ else {
+ /* Note: Different from the Huffman decoder, hitting
+ * a marker while processing the compressed data
+ * segment is legal in arithmetic coding.
+ * The convention is to supply zero data
+ * then until decoding is complete.
+ */
+ cinfo->unread_marker = data;
+ data = 0;
+ }
+ }
+ }
+ e->c = (e->c << 8) | data; /* insert data into C register */
+ if ((e->ct += 8) < 0) /* update bit shift counter */
/* Need more initial bytes */
if (++e->ct == 0)
- /* Got 2 initial bytes -> re-init A and exit loop */
- e->a = 0x8000L; /* => e->a = 0x10000L after loop exit */
- }
- e->a <<= 1;
- }
-
- /* Fetch values from our compact representation of Table D.2:
- * Qe values and probability estimation state machine
- */
- sv = *st;
- qe = jpeg_aritab[sv & 0x7F]; /* => Qe_Value */
- nl = qe & 0xFF; qe >>= 8; /* Next_Index_LPS + Switch_MPS */
- nm = qe & 0xFF; qe >>= 8; /* Next_Index_MPS */
-
- /* Decode & estimation procedures per sections D.2.4 & D.2.5 */
- temp = e->a - qe;
- e->a = temp;
- temp <<= e->ct;
- if (e->c >= temp) {
- e->c -= temp;
- /* Conditional LPS (less probable symbol) exchange */
- if (e->a < qe) {
- e->a = qe;
- *st = (sv & 0x80) ^ nm; /* Estimate_after_MPS */
- } else {
- e->a = qe;
- *st = (sv & 0x80) ^ nl; /* Estimate_after_LPS */
- sv ^= 0x80; /* Exchange LPS/MPS */
- }
- } else if (e->a < 0x8000L) {
- /* Conditional MPS (more probable symbol) exchange */
- if (e->a < qe) {
- *st = (sv & 0x80) ^ nl; /* Estimate_after_LPS */
- sv ^= 0x80; /* Exchange LPS/MPS */
- } else {
- *st = (sv & 0x80) ^ nm; /* Estimate_after_MPS */
- }
- }
-
- return sv >> 7;
+ /* Got 2 initial bytes -> re-init A and exit loop */
+ e->a = 0x8000L; /* => e->a = 0x10000L after loop exit */
+ }
+ e->a <<= 1;
+ }
+
+ /* Fetch values from our compact representation of Table D.2:
+ * Qe values and probability estimation state machine
+ */
+ sv = *st;
+ qe = jpeg_aritab[sv & 0x7F]; /* => Qe_Value */
+ nl = qe & 0xFF; qe >>= 8; /* Next_Index_LPS + Switch_MPS */
+ nm = qe & 0xFF; qe >>= 8; /* Next_Index_MPS */
+
+ /* Decode & estimation procedures per sections D.2.4 & D.2.5 */
+ temp = e->a - qe;
+ e->a = temp;
+ temp <<= e->ct;
+ if (e->c >= temp) {
+ e->c -= temp;
+ /* Conditional LPS (less probable symbol) exchange */
+ if (e->a < qe) {
+ e->a = qe;
+ *st = (sv & 0x80) ^ nm; /* Estimate_after_MPS */
+ } else {
+ e->a = qe;
+ *st = (sv & 0x80) ^ nl; /* Estimate_after_LPS */
+ sv ^= 0x80; /* Exchange LPS/MPS */
+ }
+ } else if (e->a < 0x8000L) {
+ /* Conditional MPS (more probable symbol) exchange */
+ if (e->a < qe) {
+ *st = (sv & 0x80) ^ nl; /* Estimate_after_LPS */
+ sv ^= 0x80; /* Exchange LPS/MPS */
+ } else {
+ *st = (sv & 0x80) ^ nm; /* Estimate_after_MPS */
+ }
+ }
+
+ return sv >> 7;
}
@@ -189,36 +189,36 @@ arith_decode (j_decompress_ptr cinfo, unsigned char *st)
LOCAL(void)
process_restart (j_decompress_ptr cinfo)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- int ci;
- jpeg_component_info * compptr;
-
- /* Advance past the RSTn marker */
- if (! (*cinfo->marker->read_restart_marker) (cinfo))
- ERREXIT(cinfo, JERR_CANT_SUSPEND);
-
- /* Re-initialize statistics areas */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- if (! cinfo->progressive_mode || (cinfo->Ss == 0 && cinfo->Ah == 0)) {
- MEMZERO(entropy->dc_stats[compptr->dc_tbl_no], DC_STAT_BINS);
- /* Reset DC predictions to 0 */
- entropy->last_dc_val[ci] = 0;
- entropy->dc_context[ci] = 0;
- }
- if ((! cinfo->progressive_mode && cinfo->lim_Se) ||
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ int ci;
+ jpeg_component_info * compptr;
+
+ /* Advance past the RSTn marker */
+ if (! (*cinfo->marker->read_restart_marker) (cinfo))
+ ERREXIT(cinfo, JERR_CANT_SUSPEND);
+
+ /* Re-initialize statistics areas */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ if (! cinfo->progressive_mode || (cinfo->Ss == 0 && cinfo->Ah == 0)) {
+ MEMZERO(entropy->dc_stats[compptr->dc_tbl_no], DC_STAT_BINS);
+ /* Reset DC predictions to 0 */
+ entropy->last_dc_val[ci] = 0;
+ entropy->dc_context[ci] = 0;
+ }
+ if ((! cinfo->progressive_mode && cinfo->lim_Se) ||
(cinfo->progressive_mode && cinfo->Ss)) {
- MEMZERO(entropy->ac_stats[compptr->ac_tbl_no], AC_STAT_BINS);
- }
- }
+ MEMZERO(entropy->ac_stats[compptr->ac_tbl_no], AC_STAT_BINS);
+ }
+ }
- /* Reset arithmetic decoding variables */
- entropy->c = 0;
- entropy->a = 0;
- entropy->ct = -16; /* force reading 2 initial bytes to fill C */
+ /* Reset arithmetic decoding variables */
+ entropy->c = 0;
+ entropy->a = 0;
+ entropy->ct = -16; /* force reading 2 initial bytes to fill C */
- /* Reset restart counter */
- entropy->restarts_to_go = cinfo->restart_interval;
+ /* Reset restart counter */
+ entropy->restarts_to_go = cinfo->restart_interval;
}
@@ -241,74 +241,74 @@ process_restart (j_decompress_ptr cinfo)
METHODDEF(boolean)
decode_mcu_DC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- JBLOCKROW block;
- unsigned char *st;
- int blkn, ci, tbl, sign;
- int v, m;
-
- /* Process restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- process_restart(cinfo);
- entropy->restarts_to_go--;
- }
-
- if (entropy->ct == -1) return TRUE; /* if error do nothing */
-
- /* Outer loop handles each block in the MCU */
-
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
- ci = cinfo->MCU_membership[blkn];
- tbl = cinfo->cur_comp_info[ci]->dc_tbl_no;
-
- /* Sections F.2.4.1 & F.1.4.4.1: Decoding of DC coefficients */
-
- /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
- st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
-
- /* Figure F.19: Decode_DC_DIFF */
- if (arith_decode(cinfo, st) == 0)
- entropy->dc_context[ci] = 0;
- else {
- /* Figure F.21: Decoding nonzero value v */
- /* Figure F.22: Decoding the sign of v */
- sign = arith_decode(cinfo, st + 1);
- st += 2; st += sign;
- /* Figure F.23: Decoding the magnitude category of v */
- if ((m = arith_decode(cinfo, st)) != 0) {
- st = entropy->dc_stats[tbl] + 20; /* Table F.4: X1 = 20 */
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ JBLOCKROW block;
+ unsigned char *st;
+ int blkn, ci, tbl, sign;
+ int v, m;
+
+ /* Process restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ process_restart(cinfo);
+ entropy->restarts_to_go--;
+ }
+
+ if (entropy->ct == -1) return TRUE; /* if error do nothing */
+
+ /* Outer loop handles each block in the MCU */
+
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
+ ci = cinfo->MCU_membership[blkn];
+ tbl = cinfo->cur_comp_info[ci]->dc_tbl_no;
+
+ /* Sections F.2.4.1 & F.1.4.4.1: Decoding of DC coefficients */
+
+ /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
+ st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
+
+ /* Figure F.19: Decode_DC_DIFF */
+ if (arith_decode(cinfo, st) == 0)
+ entropy->dc_context[ci] = 0;
+ else {
+ /* Figure F.21: Decoding nonzero value v */
+ /* Figure F.22: Decoding the sign of v */
+ sign = arith_decode(cinfo, st + 1);
+ st += 2; st += sign;
+ /* Figure F.23: Decoding the magnitude category of v */
+ if ((m = arith_decode(cinfo, st)) != 0) {
+ st = entropy->dc_stats[tbl] + 20; /* Table F.4: X1 = 20 */
while (arith_decode(cinfo, st)) {
- if ((m <<= 1) == 0x8000) {
- WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
- entropy->ct = -1; /* magnitude overflow */
- return TRUE;
- }
- st += 1;
- }
- }
- /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
- if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
- entropy->dc_context[ci] = 0; /* zero diff category */
- else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
+ if ((m <<= 1) == 0x8000) {
+ WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
+ entropy->ct = -1; /* magnitude overflow */
+ return TRUE;
+ }
+ st += 1;
+ }
+ }
+ /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
+ if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
+ entropy->dc_context[ci] = 0; /* zero diff category */
+ else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
entropy->dc_context[ci] = 12 + (sign * 4); /* large diff category */
- else
+ else
entropy->dc_context[ci] = 4 + (sign * 4); /* small diff category */
- v = m;
- /* Figure F.24: Decoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
+ v = m;
+ /* Figure F.24: Decoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
if (arith_decode(cinfo, st)) v |= m;
- v += 1; if (sign) v = -v;
- entropy->last_dc_val[ci] += v;
- }
+ v += 1; if (sign) v = -v;
+ entropy->last_dc_val[ci] += v;
+ }
- /* Scale and output the DC coefficient (assumes jpeg_natural_order[0]=0) */
- (*block)[0] = (JCOEF) (entropy->last_dc_val[ci] << cinfo->Al);
- }
+ /* Scale and output the DC coefficient (assumes jpeg_natural_order[0]=0) */
+ (*block)[0] = (JCOEF) (entropy->last_dc_val[ci] << cinfo->Al);
+ }
- return TRUE;
+ return TRUE;
}
@@ -320,73 +320,73 @@ decode_mcu_DC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu_AC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- JBLOCKROW block;
- unsigned char *st;
- int tbl, sign, k;
- int v, m;
- const int * natural_order;
-
- /* Process restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- process_restart(cinfo);
- entropy->restarts_to_go--;
- }
-
- if (entropy->ct == -1) return TRUE; /* if error do nothing */
-
- natural_order = cinfo->natural_order;
-
- /* There is always only one block per MCU */
- block = MCU_data[0];
- tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
-
- /* Sections F.2.4.2 & F.1.4.4.2: Decoding of AC coefficients */
-
- /* Figure F.20: Decode_AC_coefficients */
- for (k = cinfo->Ss; k <= cinfo->Se; k++) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- if (arith_decode(cinfo, st)) break; /* EOB flag */
- while (arith_decode(cinfo, st + 1) == 0) {
- st += 3; k++;
- if (k > cinfo->Se) {
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ JBLOCKROW block;
+ unsigned char *st;
+ int tbl, sign, k;
+ int v, m;
+ const int * natural_order;
+
+ /* Process restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ process_restart(cinfo);
+ entropy->restarts_to_go--;
+ }
+
+ if (entropy->ct == -1) return TRUE; /* if error do nothing */
+
+ natural_order = cinfo->natural_order;
+
+ /* There is always only one block per MCU */
+ block = MCU_data[0];
+ tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
+
+ /* Sections F.2.4.2 & F.1.4.4.2: Decoding of AC coefficients */
+
+ /* Figure F.20: Decode_AC_coefficients */
+ for (k = cinfo->Ss; k <= cinfo->Se; k++) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ if (arith_decode(cinfo, st)) break; /* EOB flag */
+ while (arith_decode(cinfo, st + 1) == 0) {
+ st += 3; k++;
+ if (k > cinfo->Se) {
WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
- entropy->ct = -1; /* spectral overflow */
+ entropy->ct = -1; /* spectral overflow */
return TRUE;
- }
- }
- /* Figure F.21: Decoding nonzero value v */
- /* Figure F.22: Decoding the sign of v */
- sign = arith_decode(cinfo, entropy->fixed_bin);
- st += 2;
- /* Figure F.23: Decoding the magnitude category of v */
- if ((m = arith_decode(cinfo, st)) != 0) {
- if (arith_decode(cinfo, st)) {
+ }
+ }
+ /* Figure F.21: Decoding nonzero value v */
+ /* Figure F.22: Decoding the sign of v */
+ sign = arith_decode(cinfo, entropy->fixed_bin);
+ st += 2;
+ /* Figure F.23: Decoding the magnitude category of v */
+ if ((m = arith_decode(cinfo, st)) != 0) {
+ if (arith_decode(cinfo, st)) {
m <<= 1;
st = entropy->ac_stats[tbl] +
- (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
+ (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
while (arith_decode(cinfo, st)) {
- if ((m <<= 1) == 0x8000) {
- WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
- entropy->ct = -1; /* magnitude overflow */
- return TRUE;
- }
- st += 1;
- }
- }
- }
- v = m;
- /* Figure F.24: Decoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
- if (arith_decode(cinfo, st)) v |= m;
- v += 1; if (sign) v = -v;
- /* Scale and output coefficient in natural (dezigzagged) order */
- (*block)[natural_order[k]] = (JCOEF) (v << cinfo->Al);
- }
-
- return TRUE;
+ if ((m <<= 1) == 0x8000) {
+ WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
+ entropy->ct = -1; /* magnitude overflow */
+ return TRUE;
+ }
+ st += 1;
+ }
+ }
+ }
+ v = m;
+ /* Figure F.24: Decoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
+ if (arith_decode(cinfo, st)) v |= m;
+ v += 1; if (sign) v = -v;
+ /* Scale and output coefficient in natural (dezigzagged) order */
+ (*block)[natural_order[k]] = (JCOEF) (v << cinfo->Al);
+ }
+
+ return TRUE;
}
@@ -397,29 +397,29 @@ decode_mcu_AC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu_DC_refine (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- unsigned char *st;
- int p1, blkn;
-
- /* Process restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- process_restart(cinfo);
- entropy->restarts_to_go--;
- }
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ unsigned char *st;
+ int p1, blkn;
+
+ /* Process restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ process_restart(cinfo);
+ entropy->restarts_to_go--;
+ }
- st = entropy->fixed_bin; /* use fixed probability estimation */
- p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
+ st = entropy->fixed_bin; /* use fixed probability estimation */
+ p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
- /* Outer loop handles each block in the MCU */
+ /* Outer loop handles each block in the MCU */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- /* Encoded data is simply the next bit of the two's-complement DC value */
- if (arith_decode(cinfo, st))
- MCU_data[blkn][0][0] |= p1;
- }
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ /* Encoded data is simply the next bit of the two's-complement DC value */
+ if (arith_decode(cinfo, st))
+ MCU_data[blkn][0][0] |= p1;
+ }
- return TRUE;
+ return TRUE;
}
@@ -430,68 +430,68 @@ decode_mcu_DC_refine (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu_AC_refine (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- JBLOCKROW block;
- JCOEFPTR thiscoef;
- unsigned char *st;
- int tbl, k, kex;
- int p1, m1;
- const int * natural_order;
-
- /* Process restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- process_restart(cinfo);
- entropy->restarts_to_go--;
- }
-
- if (entropy->ct == -1) return TRUE; /* if error do nothing */
-
- natural_order = cinfo->natural_order;
-
- /* There is always only one block per MCU */
- block = MCU_data[0];
- tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
-
- p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
- m1 = (-1) << cinfo->Al; /* -1 in the bit position being coded */
-
- /* Establish EOBx (previous stage end-of-block) index */
- for (kex = cinfo->Se; kex > 0; kex--)
- if ((*block)[natural_order[kex]]) break;
-
- for (k = cinfo->Ss; k <= cinfo->Se; k++) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- if (k > kex)
- if (arith_decode(cinfo, st)) break; /* EOB flag */
- for (;;) {
- thiscoef = *block + natural_order[k];
- if (*thiscoef) { /* previously nonzero coef */
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ JBLOCKROW block;
+ JCOEFPTR thiscoef;
+ unsigned char *st;
+ int tbl, k, kex;
+ int p1, m1;
+ const int * natural_order;
+
+ /* Process restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ process_restart(cinfo);
+ entropy->restarts_to_go--;
+ }
+
+ if (entropy->ct == -1) return TRUE; /* if error do nothing */
+
+ natural_order = cinfo->natural_order;
+
+ /* There is always only one block per MCU */
+ block = MCU_data[0];
+ tbl = cinfo->cur_comp_info[0]->ac_tbl_no;
+
+ p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
+ m1 = (-1) << cinfo->Al; /* -1 in the bit position being coded */
+
+ /* Establish EOBx (previous stage end-of-block) index */
+ for (kex = cinfo->Se; kex > 0; kex--)
+ if ((*block)[natural_order[kex]]) break;
+
+ for (k = cinfo->Ss; k <= cinfo->Se; k++) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ if (k > kex)
+ if (arith_decode(cinfo, st)) break; /* EOB flag */
+ for (;;) {
+ thiscoef = *block + natural_order[k];
+ if (*thiscoef) { /* previously nonzero coef */
if (arith_decode(cinfo, st + 2)) {
- if (*thiscoef < 0)
- *thiscoef += m1;
- else
- *thiscoef += p1;
+ if (*thiscoef < 0)
+ *thiscoef += m1;
+ else
+ *thiscoef += p1;
}
break;
- }
- if (arith_decode(cinfo, st + 1)) { /* newly nonzero coef */
+ }
+ if (arith_decode(cinfo, st + 1)) { /* newly nonzero coef */
if (arith_decode(cinfo, entropy->fixed_bin))
- *thiscoef = m1;
+ *thiscoef = m1;
else
- *thiscoef = p1;
+ *thiscoef = p1;
break;
- }
- st += 3; k++;
- if (k > cinfo->Se) {
+ }
+ st += 3; k++;
+ if (k > cinfo->Se) {
WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
- entropy->ct = -1; /* spectral overflow */
+ entropy->ct = -1; /* spectral overflow */
return TRUE;
- }
- }
- }
+ }
+ }
+ }
- return TRUE;
+ return TRUE;
}
@@ -502,124 +502,124 @@ decode_mcu_AC_refine (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- jpeg_component_info * compptr;
- JBLOCKROW block;
- unsigned char *st;
- int blkn, ci, tbl, sign, k;
- int v, m;
- const int * natural_order;
-
- /* Process restart marker if needed */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- process_restart(cinfo);
- entropy->restarts_to_go--;
- }
-
- if (entropy->ct == -1) return TRUE; /* if error do nothing */
-
- natural_order = cinfo->natural_order;
-
- /* Outer loop handles each block in the MCU */
-
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
- ci = cinfo->MCU_membership[blkn];
- compptr = cinfo->cur_comp_info[ci];
-
- /* Sections F.2.4.1 & F.1.4.4.1: Decoding of DC coefficients */
-
- tbl = compptr->dc_tbl_no;
-
- /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
- st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
-
- /* Figure F.19: Decode_DC_DIFF */
- if (arith_decode(cinfo, st) == 0)
- entropy->dc_context[ci] = 0;
- else {
- /* Figure F.21: Decoding nonzero value v */
- /* Figure F.22: Decoding the sign of v */
- sign = arith_decode(cinfo, st + 1);
- st += 2; st += sign;
- /* Figure F.23: Decoding the magnitude category of v */
- if ((m = arith_decode(cinfo, st)) != 0) {
- st = entropy->dc_stats[tbl] + 20; /* Table F.4: X1 = 20 */
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ jpeg_component_info * compptr;
+ JBLOCKROW block;
+ unsigned char *st;
+ int blkn, ci, tbl, sign, k;
+ int v, m;
+ const int * natural_order;
+
+ /* Process restart marker if needed */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ process_restart(cinfo);
+ entropy->restarts_to_go--;
+ }
+
+ if (entropy->ct == -1) return TRUE; /* if error do nothing */
+
+ natural_order = cinfo->natural_order;
+
+ /* Outer loop handles each block in the MCU */
+
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
+ ci = cinfo->MCU_membership[blkn];
+ compptr = cinfo->cur_comp_info[ci];
+
+ /* Sections F.2.4.1 & F.1.4.4.1: Decoding of DC coefficients */
+
+ tbl = compptr->dc_tbl_no;
+
+ /* Table F.4: Point to statistics bin S0 for DC coefficient coding */
+ st = entropy->dc_stats[tbl] + entropy->dc_context[ci];
+
+ /* Figure F.19: Decode_DC_DIFF */
+ if (arith_decode(cinfo, st) == 0)
+ entropy->dc_context[ci] = 0;
+ else {
+ /* Figure F.21: Decoding nonzero value v */
+ /* Figure F.22: Decoding the sign of v */
+ sign = arith_decode(cinfo, st + 1);
+ st += 2; st += sign;
+ /* Figure F.23: Decoding the magnitude category of v */
+ if ((m = arith_decode(cinfo, st)) != 0) {
+ st = entropy->dc_stats[tbl] + 20; /* Table F.4: X1 = 20 */
while (arith_decode(cinfo, st)) {
- if ((m <<= 1) == 0x8000) {
- WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
- entropy->ct = -1; /* magnitude overflow */
- return TRUE;
- }
- st += 1;
- }
- }
- /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
- if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
- entropy->dc_context[ci] = 0; /* zero diff category */
- else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
+ if ((m <<= 1) == 0x8000) {
+ WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
+ entropy->ct = -1; /* magnitude overflow */
+ return TRUE;
+ }
+ st += 1;
+ }
+ }
+ /* Section F.1.4.4.1.2: Establish dc_context conditioning category */
+ if (m < (int) ((1L << cinfo->arith_dc_L[tbl]) >> 1))
+ entropy->dc_context[ci] = 0; /* zero diff category */
+ else if (m > (int) ((1L << cinfo->arith_dc_U[tbl]) >> 1))
entropy->dc_context[ci] = 12 + (sign * 4); /* large diff category */
- else
+ else
entropy->dc_context[ci] = 4 + (sign * 4); /* small diff category */
- v = m;
- /* Figure F.24: Decoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
+ v = m;
+ /* Figure F.24: Decoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
if (arith_decode(cinfo, st)) v |= m;
- v += 1; if (sign) v = -v;
- entropy->last_dc_val[ci] += v;
- }
+ v += 1; if (sign) v = -v;
+ entropy->last_dc_val[ci] += v;
+ }
- (*block)[0] = (JCOEF) entropy->last_dc_val[ci];
+ (*block)[0] = (JCOEF) entropy->last_dc_val[ci];
- /* Sections F.2.4.2 & F.1.4.4.2: Decoding of AC coefficients */
+ /* Sections F.2.4.2 & F.1.4.4.2: Decoding of AC coefficients */
- tbl = compptr->ac_tbl_no;
+ tbl = compptr->ac_tbl_no;
- /* Figure F.20: Decode_AC_coefficients */
- for (k = 1; k <= cinfo->lim_Se; k++) {
- st = entropy->ac_stats[tbl] + 3 * (k - 1);
- if (arith_decode(cinfo, st)) break; /* EOB flag */
- while (arith_decode(cinfo, st + 1) == 0) {
+ /* Figure F.20: Decode_AC_coefficients */
+ for (k = 1; k <= cinfo->lim_Se; k++) {
+ st = entropy->ac_stats[tbl] + 3 * (k - 1);
+ if (arith_decode(cinfo, st)) break; /* EOB flag */
+ while (arith_decode(cinfo, st + 1) == 0) {
st += 3; k++;
if (k > cinfo->lim_Se) {
- WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
- entropy->ct = -1; /* spectral overflow */
- return TRUE;
- }
- }
- /* Figure F.21: Decoding nonzero value v */
- /* Figure F.22: Decoding the sign of v */
- sign = arith_decode(cinfo, entropy->fixed_bin);
- st += 2;
- /* Figure F.23: Decoding the magnitude category of v */
- if ((m = arith_decode(cinfo, st)) != 0) {
+ WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
+ entropy->ct = -1; /* spectral overflow */
+ return TRUE;
+ }
+ }
+ /* Figure F.21: Decoding nonzero value v */
+ /* Figure F.22: Decoding the sign of v */
+ sign = arith_decode(cinfo, entropy->fixed_bin);
+ st += 2;
+ /* Figure F.23: Decoding the magnitude category of v */
+ if ((m = arith_decode(cinfo, st)) != 0) {
if (arith_decode(cinfo, st)) {
- m <<= 1;
- st = entropy->ac_stats[tbl] +
- (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
- while (arith_decode(cinfo, st)) {
- if ((m <<= 1) == 0x8000) {
- WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
- entropy->ct = -1; /* magnitude overflow */
- return TRUE;
- }
- st += 1;
- }
- }
- }
- v = m;
- /* Figure F.24: Decoding the magnitude bit pattern of v */
- st += 14;
- while (m >>= 1)
+ m <<= 1;
+ st = entropy->ac_stats[tbl] +
+ (k <= cinfo->arith_ac_K[tbl] ? 189 : 217);
+ while (arith_decode(cinfo, st)) {
+ if ((m <<= 1) == 0x8000) {
+ WARNMS(cinfo, JWRN_ARITH_BAD_CODE);
+ entropy->ct = -1; /* magnitude overflow */
+ return TRUE;
+ }
+ st += 1;
+ }
+ }
+ }
+ v = m;
+ /* Figure F.24: Decoding the magnitude bit pattern of v */
+ st += 14;
+ while (m >>= 1)
if (arith_decode(cinfo, st)) v |= m;
- v += 1; if (sign) v = -v;
- (*block)[natural_order[k]] = (JCOEF) v;
- }
- }
+ v += 1; if (sign) v = -v;
+ (*block)[natural_order[k]] = (JCOEF) v;
+ }
+ }
- return TRUE;
+ return TRUE;
}
@@ -630,106 +630,106 @@ decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(void)
start_pass (j_decompress_ptr cinfo)
{
- arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
- int ci, tbl;
- jpeg_component_info * compptr;
-
- if (cinfo->progressive_mode) {
- /* Validate progressive scan parameters */
- if (cinfo->Ss == 0) {
- if (cinfo->Se != 0)
+ arith_entropy_ptr entropy = (arith_entropy_ptr) cinfo->entropy;
+ int ci, tbl;
+ jpeg_component_info * compptr;
+
+ if (cinfo->progressive_mode) {
+ /* Validate progressive scan parameters */
+ if (cinfo->Ss == 0) {
+ if (cinfo->Se != 0)
goto bad;
- } else {
- /* need not check Ss/Se < 0 since they came from unsigned bytes */
- if (cinfo->Se < cinfo->Ss || cinfo->Se > cinfo->lim_Se)
+ } else {
+ /* need not check Ss/Se < 0 since they came from unsigned bytes */
+ if (cinfo->Se < cinfo->Ss || cinfo->Se > cinfo->lim_Se)
goto bad;
- /* AC scans may have only one component */
- if (cinfo->comps_in_scan != 1)
+ /* AC scans may have only one component */
+ if (cinfo->comps_in_scan != 1)
goto bad;
- }
- if (cinfo->Ah != 0) {
- /* Successive approximation refinement scan: must have Al = Ah-1. */
- if (cinfo->Ah-1 != cinfo->Al)
+ }
+ if (cinfo->Ah != 0) {
+ /* Successive approximation refinement scan: must have Al = Ah-1. */
+ if (cinfo->Ah-1 != cinfo->Al)
goto bad;
- }
- if (cinfo->Al > 13) { /* need not check for < 0 */
- bad:
- ERREXIT4(cinfo, JERR_BAD_PROGRESSION,
- cinfo->Ss, cinfo->Se, cinfo->Ah, cinfo->Al);
- }
- /* Update progression status, and verify that scan order is legal.
- * Note that inter-scan inconsistencies are treated as warnings
- * not fatal errors ... not clear if this is right way to behave.
- */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- int coefi, cindex = cinfo->cur_comp_info[ci]->component_index;
- int *coef_bit_ptr = & cinfo->coef_bits[cindex][0];
- if (cinfo->Ss && coef_bit_ptr[0] < 0) /* AC without prior DC scan */
+ }
+ if (cinfo->Al > 13) { /* need not check for < 0 */
+ bad:
+ ERREXIT4(cinfo, JERR_BAD_PROGRESSION,
+ cinfo->Ss, cinfo->Se, cinfo->Ah, cinfo->Al);
+ }
+ /* Update progression status, and verify that scan order is legal.
+ * Note that inter-scan inconsistencies are treated as warnings
+ * not fatal errors ... not clear if this is right way to behave.
+ */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ int coefi, cindex = cinfo->cur_comp_info[ci]->component_index;
+ int *coef_bit_ptr = & cinfo->coef_bits[cindex][0];
+ if (cinfo->Ss && coef_bit_ptr[0] < 0) /* AC without prior DC scan */
WARNMS2(cinfo, JWRN_BOGUS_PROGRESSION, cindex, 0);
- for (coefi = cinfo->Ss; coefi <= cinfo->Se; coefi++) {
+ for (coefi = cinfo->Ss; coefi <= cinfo->Se; coefi++) {
int expected = (coef_bit_ptr[coefi] < 0) ? 0 : coef_bit_ptr[coefi];
if (cinfo->Ah != expected)
- WARNMS2(cinfo, JWRN_BOGUS_PROGRESSION, cindex, coefi);
+ WARNMS2(cinfo, JWRN_BOGUS_PROGRESSION, cindex, coefi);
coef_bit_ptr[coefi] = cinfo->Al;
- }
- }
- /* Select MCU decoding routine */
- if (cinfo->Ah == 0) {
- if (cinfo->Ss == 0)
+ }
+ }
+ /* Select MCU decoding routine */
+ if (cinfo->Ah == 0) {
+ if (cinfo->Ss == 0)
entropy->pub.decode_mcu = decode_mcu_DC_first;
- else
+ else
entropy->pub.decode_mcu = decode_mcu_AC_first;
- } else {
- if (cinfo->Ss == 0)
+ } else {
+ if (cinfo->Ss == 0)
entropy->pub.decode_mcu = decode_mcu_DC_refine;
- else
+ else
entropy->pub.decode_mcu = decode_mcu_AC_refine;
- }
- } else {
- /* Check that the scan parameters Ss, Se, Ah/Al are OK for sequential JPEG.
- * This ought to be an error condition, but we make it a warning.
- */
- if (cinfo->Ss != 0 || cinfo->Ah != 0 || cinfo->Al != 0 ||
+ }
+ } else {
+ /* Check that the scan parameters Ss, Se, Ah/Al are OK for sequential JPEG.
+ * This ought to be an error condition, but we make it a warning.
+ */
+ if (cinfo->Ss != 0 || cinfo->Ah != 0 || cinfo->Al != 0 ||
(cinfo->Se < DCTSIZE2 && cinfo->Se != cinfo->lim_Se))
- WARNMS(cinfo, JWRN_NOT_SEQUENTIAL);
- /* Select MCU decoding routine */
- entropy->pub.decode_mcu = decode_mcu;
- }
-
- /* Allocate & initialize requested statistics areas */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- if (! cinfo->progressive_mode || (cinfo->Ss == 0 && cinfo->Ah == 0)) {
- tbl = compptr->dc_tbl_no;
- if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
+ WARNMS(cinfo, JWRN_NOT_SEQUENTIAL);
+ /* Select MCU decoding routine */
+ entropy->pub.decode_mcu = decode_mcu;
+ }
+
+ /* Allocate & initialize requested statistics areas */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ if (! cinfo->progressive_mode || (cinfo->Ss == 0 && cinfo->Ah == 0)) {
+ tbl = compptr->dc_tbl_no;
+ if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
ERREXIT1(cinfo, JERR_NO_ARITH_TABLE, tbl);
- if (entropy->dc_stats[tbl] == NULL)
+ if (entropy->dc_stats[tbl] == NULL)
entropy->dc_stats[tbl] = (unsigned char *) (*cinfo->mem->alloc_small)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, DC_STAT_BINS);
- MEMZERO(entropy->dc_stats[tbl], DC_STAT_BINS);
- /* Initialize DC predictions to 0 */
- entropy->last_dc_val[ci] = 0;
- entropy->dc_context[ci] = 0;
- }
- if ((! cinfo->progressive_mode && cinfo->lim_Se) ||
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, DC_STAT_BINS);
+ MEMZERO(entropy->dc_stats[tbl], DC_STAT_BINS);
+ /* Initialize DC predictions to 0 */
+ entropy->last_dc_val[ci] = 0;
+ entropy->dc_context[ci] = 0;
+ }
+ if ((! cinfo->progressive_mode && cinfo->lim_Se) ||
(cinfo->progressive_mode && cinfo->Ss)) {
- tbl = compptr->ac_tbl_no;
- if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
+ tbl = compptr->ac_tbl_no;
+ if (tbl < 0 || tbl >= NUM_ARITH_TBLS)
ERREXIT1(cinfo, JERR_NO_ARITH_TABLE, tbl);
- if (entropy->ac_stats[tbl] == NULL)
+ if (entropy->ac_stats[tbl] == NULL)
entropy->ac_stats[tbl] = (unsigned char *) (*cinfo->mem->alloc_small)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, AC_STAT_BINS);
- MEMZERO(entropy->ac_stats[tbl], AC_STAT_BINS);
- }
- }
-
- /* Initialize arithmetic decoding variables */
- entropy->c = 0;
- entropy->a = 0;
- entropy->ct = -16; /* force reading 2 initial bytes to fill C */
-
- /* Initialize restart counter */
- entropy->restarts_to_go = cinfo->restart_interval;
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, AC_STAT_BINS);
+ MEMZERO(entropy->ac_stats[tbl], AC_STAT_BINS);
+ }
+ }
+
+ /* Initialize arithmetic decoding variables */
+ entropy->c = 0;
+ entropy->a = 0;
+ entropy->ct = -16; /* force reading 2 initial bytes to fill C */
+
+ /* Initialize restart counter */
+ entropy->restarts_to_go = cinfo->restart_interval;
}
@@ -740,33 +740,33 @@ start_pass (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_arith_decoder (j_decompress_ptr cinfo)
{
- arith_entropy_ptr entropy;
- int i;
+ arith_entropy_ptr entropy;
+ int i;
- entropy = (arith_entropy_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ entropy = (arith_entropy_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(arith_entropy_decoder));
- cinfo->entropy = (struct jpeg_entropy_decoder *) entropy;
- entropy->pub.start_pass = start_pass;
-
- /* Mark tables unallocated */
- for (i = 0; i < NUM_ARITH_TBLS; i++) {
- entropy->dc_stats[i] = NULL;
- entropy->ac_stats[i] = NULL;
- }
-
- /* Initialize index for fixed probability estimation */
- entropy->fixed_bin[0] = 113;
-
- if (cinfo->progressive_mode) {
- /* Create progression status table */
- int *coef_bit_ptr, ci;
- cinfo->coef_bits = (int (*)[DCTSIZE2])
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- cinfo->num_components*DCTSIZE2*SIZEOF(int));
- coef_bit_ptr = & cinfo->coef_bits[0][0];
- for (ci = 0; ci < cinfo->num_components; ci++)
- for (i = 0; i < DCTSIZE2; i++)
+ cinfo->entropy = (struct jpeg_entropy_decoder *) entropy;
+ entropy->pub.start_pass = start_pass;
+
+ /* Mark tables unallocated */
+ for (i = 0; i < NUM_ARITH_TBLS; i++) {
+ entropy->dc_stats[i] = NULL;
+ entropy->ac_stats[i] = NULL;
+ }
+
+ /* Initialize index for fixed probability estimation */
+ entropy->fixed_bin[0] = 113;
+
+ if (cinfo->progressive_mode) {
+ /* Create progression status table */
+ int *coef_bit_ptr, ci;
+ cinfo->coef_bits = (int (*)[DCTSIZE2])
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cinfo->num_components*DCTSIZE2*SIZEOF(int));
+ coef_bit_ptr = & cinfo->coef_bits[0][0];
+ for (ci = 0; ci < cinfo->num_components; ci++)
+ for (i = 0; i < DCTSIZE2; i++)
*coef_bit_ptr++ = -1;
- }
+ }
}
diff --git a/src/lib/libjpeg/jdatadst.c b/src/lib/libjpeg/jdatadst.c
index a0ccfb20a66..dbafe7bc9a9 100644
--- a/src/lib/libjpeg/jdatadst.c
+++ b/src/lib/libjpeg/jdatadst.c
@@ -20,7 +20,7 @@
#include "jpeglib.h"
#include "jerror.h"
-#ifndef HAVE_STDLIB_H /* <stdlib.h> should declare malloc(),free() */
+#ifndef HAVE_STDLIB_H /* <stdlib.h> should declare malloc(),free() */
extern void * malloc JPP((size_t size));
extern void free JPP((void *ptr));
#endif
@@ -29,27 +29,27 @@ extern void free JPP((void *ptr));
/* Expanded data destination object for stdio output */
typedef struct {
- struct jpeg_destination_mgr pub; /* public fields */
+ struct jpeg_destination_mgr pub; /* public fields */
- FILE * outfile; /* target stream */
- JOCTET * buffer; /* start of buffer */
+ FILE * outfile; /* target stream */
+ JOCTET * buffer; /* start of buffer */
} my_destination_mgr;
typedef my_destination_mgr * my_dest_ptr;
-#define OUTPUT_BUF_SIZE 4096 /* choose an efficiently fwrite'able size */
+#define OUTPUT_BUF_SIZE 4096 /* choose an efficiently fwrite'able size */
/* Expanded data destination object for memory output */
typedef struct {
- struct jpeg_destination_mgr pub; /* public fields */
+ struct jpeg_destination_mgr pub; /* public fields */
- unsigned char ** outbuffer; /* target buffer */
- unsigned long * outsize;
- unsigned char * newbuffer; /* newly allocated buffer */
- JOCTET * buffer; /* start of buffer */
- size_t bufsize;
+ unsigned char ** outbuffer; /* target buffer */
+ unsigned long * outsize;
+ unsigned char * newbuffer; /* newly allocated buffer */
+ JOCTET * buffer; /* start of buffer */
+ size_t bufsize;
} my_mem_destination_mgr;
typedef my_mem_destination_mgr * my_mem_dest_ptr;
@@ -63,21 +63,21 @@ typedef my_mem_destination_mgr * my_mem_dest_ptr;
METHODDEF(void)
init_destination (j_compress_ptr cinfo)
{
- my_dest_ptr dest = (my_dest_ptr) cinfo->dest;
+ my_dest_ptr dest = (my_dest_ptr) cinfo->dest;
- /* Allocate the output buffer --- it will be released when done with image */
- dest->buffer = (JOCTET *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- OUTPUT_BUF_SIZE * SIZEOF(JOCTET));
+ /* Allocate the output buffer --- it will be released when done with image */
+ dest->buffer = (JOCTET *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ OUTPUT_BUF_SIZE * SIZEOF(JOCTET));
- dest->pub.next_output_byte = dest->buffer;
- dest->pub.free_in_buffer = OUTPUT_BUF_SIZE;
+ dest->pub.next_output_byte = dest->buffer;
+ dest->pub.free_in_buffer = OUTPUT_BUF_SIZE;
}
METHODDEF(void)
init_mem_destination (j_compress_ptr cinfo)
{
- /* no work necessary here */
+ /* no work necessary here */
}
@@ -107,46 +107,46 @@ init_mem_destination (j_compress_ptr cinfo)
METHODDEF(boolean)
empty_output_buffer (j_compress_ptr cinfo)
{
- my_dest_ptr dest = (my_dest_ptr) cinfo->dest;
+ my_dest_ptr dest = (my_dest_ptr) cinfo->dest;
- if (JFWRITE(dest->outfile, dest->buffer, OUTPUT_BUF_SIZE) !=
- (size_t) OUTPUT_BUF_SIZE)
- ERREXIT(cinfo, JERR_FILE_WRITE);
+ if (JFWRITE(dest->outfile, dest->buffer, OUTPUT_BUF_SIZE) !=
+ (size_t) OUTPUT_BUF_SIZE)
+ ERREXIT(cinfo, JERR_FILE_WRITE);
- dest->pub.next_output_byte = dest->buffer;
- dest->pub.free_in_buffer = OUTPUT_BUF_SIZE;
+ dest->pub.next_output_byte = dest->buffer;
+ dest->pub.free_in_buffer = OUTPUT_BUF_SIZE;
- return TRUE;
+ return TRUE;
}
METHODDEF(boolean)
empty_mem_output_buffer (j_compress_ptr cinfo)
{
- size_t nextsize;
- JOCTET * nextbuffer;
- my_mem_dest_ptr dest = (my_mem_dest_ptr) cinfo->dest;
+ size_t nextsize;
+ JOCTET * nextbuffer;
+ my_mem_dest_ptr dest = (my_mem_dest_ptr) cinfo->dest;
- /* Try to allocate new buffer with double size */
- nextsize = dest->bufsize * 2;
- nextbuffer = (JOCTET*)malloc(nextsize);
+ /* Try to allocate new buffer with double size */
+ nextsize = dest->bufsize * 2;
+ nextbuffer = (JOCTET*)malloc(nextsize);
- if (nextbuffer == NULL)
- ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, 10);
+ if (nextbuffer == NULL)
+ ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, 10);
- MEMCOPY(nextbuffer, dest->buffer, dest->bufsize);
+ MEMCOPY(nextbuffer, dest->buffer, dest->bufsize);
- if (dest->newbuffer != NULL)
- free(dest->newbuffer);
+ if (dest->newbuffer != NULL)
+ free(dest->newbuffer);
- dest->newbuffer = nextbuffer;
+ dest->newbuffer = nextbuffer;
- dest->pub.next_output_byte = nextbuffer + dest->bufsize;
- dest->pub.free_in_buffer = dest->bufsize;
+ dest->pub.next_output_byte = nextbuffer + dest->bufsize;
+ dest->pub.free_in_buffer = dest->bufsize;
- dest->buffer = nextbuffer;
- dest->bufsize = nextsize;
+ dest->buffer = nextbuffer;
+ dest->bufsize = nextsize;
- return TRUE;
+ return TRUE;
}
@@ -162,27 +162,27 @@ empty_mem_output_buffer (j_compress_ptr cinfo)
METHODDEF(void)
term_destination (j_compress_ptr cinfo)
{
- my_dest_ptr dest = (my_dest_ptr) cinfo->dest;
- size_t datacount = OUTPUT_BUF_SIZE - dest->pub.free_in_buffer;
-
- /* Write any data remaining in the buffer */
- if (datacount > 0) {
- if (JFWRITE(dest->outfile, dest->buffer, datacount) != datacount)
- ERREXIT(cinfo, JERR_FILE_WRITE);
- }
- fflush(dest->outfile);
- /* Make sure we wrote the output file OK */
- if (ferror(dest->outfile))
- ERREXIT(cinfo, JERR_FILE_WRITE);
+ my_dest_ptr dest = (my_dest_ptr) cinfo->dest;
+ size_t datacount = OUTPUT_BUF_SIZE - dest->pub.free_in_buffer;
+
+ /* Write any data remaining in the buffer */
+ if (datacount > 0) {
+ if (JFWRITE(dest->outfile, dest->buffer, datacount) != datacount)
+ ERREXIT(cinfo, JERR_FILE_WRITE);
+ }
+ fflush(dest->outfile);
+ /* Make sure we wrote the output file OK */
+ if (ferror(dest->outfile))
+ ERREXIT(cinfo, JERR_FILE_WRITE);
}
METHODDEF(void)
term_mem_destination (j_compress_ptr cinfo)
{
- my_mem_dest_ptr dest = (my_mem_dest_ptr) cinfo->dest;
+ my_mem_dest_ptr dest = (my_mem_dest_ptr) cinfo->dest;
- *dest->outbuffer = dest->buffer;
- *dest->outsize = dest->bufsize - dest->pub.free_in_buffer;
+ *dest->outbuffer = dest->buffer;
+ *dest->outsize = dest->bufsize - dest->pub.free_in_buffer;
}
@@ -195,25 +195,25 @@ term_mem_destination (j_compress_ptr cinfo)
GLOBAL(void)
jpeg_stdio_dest (j_compress_ptr cinfo, FILE * outfile)
{
- my_dest_ptr dest;
-
- /* The destination object is made permanent so that multiple JPEG images
- * can be written to the same file without re-executing jpeg_stdio_dest.
- * This makes it dangerous to use this manager and a different destination
- * manager serially with the same JPEG object, because their private object
- * sizes may be different. Caveat programmer.
- */
- if (cinfo->dest == NULL) { /* first time for this JPEG object? */
- cinfo->dest = (struct jpeg_destination_mgr *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
- SIZEOF(my_destination_mgr));
- }
-
- dest = (my_dest_ptr) cinfo->dest;
- dest->pub.init_destination = init_destination;
- dest->pub.empty_output_buffer = empty_output_buffer;
- dest->pub.term_destination = term_destination;
- dest->outfile = outfile;
+ my_dest_ptr dest;
+
+ /* The destination object is made permanent so that multiple JPEG images
+ * can be written to the same file without re-executing jpeg_stdio_dest.
+ * This makes it dangerous to use this manager and a different destination
+ * manager serially with the same JPEG object, because their private object
+ * sizes may be different. Caveat programmer.
+ */
+ if (cinfo->dest == NULL) { /* first time for this JPEG object? */
+ cinfo->dest = (struct jpeg_destination_mgr *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ SIZEOF(my_destination_mgr));
+ }
+
+ dest = (my_dest_ptr) cinfo->dest;
+ dest->pub.init_destination = init_destination;
+ dest->pub.empty_output_buffer = empty_output_buffer;
+ dest->pub.term_destination = term_destination;
+ dest->outfile = outfile;
}
@@ -230,38 +230,38 @@ jpeg_stdio_dest (j_compress_ptr cinfo, FILE * outfile)
GLOBAL(void)
jpeg_mem_dest (j_compress_ptr cinfo,
- unsigned char ** outbuffer, unsigned long * outsize)
+ unsigned char ** outbuffer, unsigned long * outsize)
{
- my_mem_dest_ptr dest;
-
- if (outbuffer == NULL || outsize == NULL) /* sanity check */
- ERREXIT(cinfo, JERR_BUFFER_SIZE);
-
- /* The destination object is made permanent so that multiple JPEG images
- * can be written to the same buffer without re-executing jpeg_mem_dest.
- */
- if (cinfo->dest == NULL) { /* first time for this JPEG object? */
- cinfo->dest = (struct jpeg_destination_mgr *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
- SIZEOF(my_mem_destination_mgr));
- }
-
- dest = (my_mem_dest_ptr) cinfo->dest;
- dest->pub.init_destination = init_mem_destination;
- dest->pub.empty_output_buffer = empty_mem_output_buffer;
- dest->pub.term_destination = term_mem_destination;
- dest->outbuffer = outbuffer;
- dest->outsize = outsize;
- dest->newbuffer = NULL;
-
- if (*outbuffer == NULL || *outsize == 0) {
- /* Allocate initial buffer */
- dest->newbuffer = *outbuffer = (unsigned char*)malloc(OUTPUT_BUF_SIZE);
- if (dest->newbuffer == NULL)
- ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, 10);
- *outsize = OUTPUT_BUF_SIZE;
- }
-
- dest->pub.next_output_byte = dest->buffer = *outbuffer;
- dest->pub.free_in_buffer = dest->bufsize = *outsize;
+ my_mem_dest_ptr dest;
+
+ if (outbuffer == NULL || outsize == NULL) /* sanity check */
+ ERREXIT(cinfo, JERR_BUFFER_SIZE);
+
+ /* The destination object is made permanent so that multiple JPEG images
+ * can be written to the same buffer without re-executing jpeg_mem_dest.
+ */
+ if (cinfo->dest == NULL) { /* first time for this JPEG object? */
+ cinfo->dest = (struct jpeg_destination_mgr *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ SIZEOF(my_mem_destination_mgr));
+ }
+
+ dest = (my_mem_dest_ptr) cinfo->dest;
+ dest->pub.init_destination = init_mem_destination;
+ dest->pub.empty_output_buffer = empty_mem_output_buffer;
+ dest->pub.term_destination = term_mem_destination;
+ dest->outbuffer = outbuffer;
+ dest->outsize = outsize;
+ dest->newbuffer = NULL;
+
+ if (*outbuffer == NULL || *outsize == 0) {
+ /* Allocate initial buffer */
+ dest->newbuffer = *outbuffer = (unsigned char*)malloc(OUTPUT_BUF_SIZE);
+ if (dest->newbuffer == NULL)
+ ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, 10);
+ *outsize = OUTPUT_BUF_SIZE;
+ }
+
+ dest->pub.next_output_byte = dest->buffer = *outbuffer;
+ dest->pub.free_in_buffer = dest->bufsize = *outsize;
}
diff --git a/src/lib/libjpeg/jdatasrc.c b/src/lib/libjpeg/jdatasrc.c
index c8fe3daf336..4d5622871b8 100644
--- a/src/lib/libjpeg/jdatasrc.c
+++ b/src/lib/libjpeg/jdatasrc.c
@@ -24,16 +24,16 @@
/* Expanded data source object for stdio input */
typedef struct {
- struct jpeg_source_mgr pub; /* public fields */
+ struct jpeg_source_mgr pub; /* public fields */
- FILE * infile; /* source stream */
- JOCTET * buffer; /* start of buffer */
- boolean start_of_file; /* have we gotten any data yet? */
+ FILE * infile; /* source stream */
+ JOCTET * buffer; /* start of buffer */
+ boolean start_of_file; /* have we gotten any data yet? */
} my_source_mgr;
typedef my_source_mgr * my_src_ptr;
-#define INPUT_BUF_SIZE 4096 /* choose an efficiently fread'able size */
+#define INPUT_BUF_SIZE 4096 /* choose an efficiently fread'able size */
/*
@@ -44,19 +44,19 @@ typedef my_source_mgr * my_src_ptr;
METHODDEF(void)
init_source (j_decompress_ptr cinfo)
{
- my_src_ptr src = (my_src_ptr) cinfo->src;
+ my_src_ptr src = (my_src_ptr) cinfo->src;
- /* We reset the empty-input-file flag for each image,
- * but we don't clear the input buffer.
- * This is correct behavior for reading a series of images from one source.
- */
- src->start_of_file = TRUE;
+ /* We reset the empty-input-file flag for each image,
+ * but we don't clear the input buffer.
+ * This is correct behavior for reading a series of images from one source.
+ */
+ src->start_of_file = TRUE;
}
METHODDEF(void)
init_mem_source (j_decompress_ptr cinfo)
{
- /* no work necessary here */
+ /* no work necessary here */
}
@@ -96,46 +96,46 @@ init_mem_source (j_decompress_ptr cinfo)
METHODDEF(boolean)
fill_input_buffer (j_decompress_ptr cinfo)
{
- my_src_ptr src = (my_src_ptr) cinfo->src;
- size_t nbytes;
-
- nbytes = JFREAD(src->infile, src->buffer, INPUT_BUF_SIZE);
-
- if (nbytes <= 0) {
- if (src->start_of_file) /* Treat empty input file as fatal error */
- ERREXIT(cinfo, JERR_INPUT_EMPTY);
- WARNMS(cinfo, JWRN_JPEG_EOF);
- /* Insert a fake EOI marker */
- src->buffer[0] = (JOCTET) 0xFF;
- src->buffer[1] = (JOCTET) JPEG_EOI;
- nbytes = 2;
- }
-
- src->pub.next_input_byte = src->buffer;
- src->pub.bytes_in_buffer = nbytes;
- src->start_of_file = FALSE;
-
- return TRUE;
+ my_src_ptr src = (my_src_ptr) cinfo->src;
+ size_t nbytes;
+
+ nbytes = JFREAD(src->infile, src->buffer, INPUT_BUF_SIZE);
+
+ if (nbytes <= 0) {
+ if (src->start_of_file) /* Treat empty input file as fatal error */
+ ERREXIT(cinfo, JERR_INPUT_EMPTY);
+ WARNMS(cinfo, JWRN_JPEG_EOF);
+ /* Insert a fake EOI marker */
+ src->buffer[0] = (JOCTET) 0xFF;
+ src->buffer[1] = (JOCTET) JPEG_EOI;
+ nbytes = 2;
+ }
+
+ src->pub.next_input_byte = src->buffer;
+ src->pub.bytes_in_buffer = nbytes;
+ src->start_of_file = FALSE;
+
+ return TRUE;
}
METHODDEF(boolean)
fill_mem_input_buffer (j_decompress_ptr cinfo)
{
- static JOCTET mybuffer[4];
+ static JOCTET mybuffer[4];
- /* The whole JPEG data is expected to reside in the supplied memory
- * buffer, so any request for more data beyond the given buffer size
- * is treated as an error.
- */
- WARNMS(cinfo, JWRN_JPEG_EOF);
- /* Insert a fake EOI marker */
- mybuffer[0] = (JOCTET) 0xFF;
- mybuffer[1] = (JOCTET) JPEG_EOI;
+ /* The whole JPEG data is expected to reside in the supplied memory
+ * buffer, so any request for more data beyond the given buffer size
+ * is treated as an error.
+ */
+ WARNMS(cinfo, JWRN_JPEG_EOF);
+ /* Insert a fake EOI marker */
+ mybuffer[0] = (JOCTET) 0xFF;
+ mybuffer[1] = (JOCTET) JPEG_EOI;
- cinfo->src->next_input_byte = mybuffer;
- cinfo->src->bytes_in_buffer = 2;
+ cinfo->src->next_input_byte = mybuffer;
+ cinfo->src->bytes_in_buffer = 2;
- return TRUE;
+ return TRUE;
}
@@ -154,23 +154,23 @@ fill_mem_input_buffer (j_decompress_ptr cinfo)
METHODDEF(void)
skip_input_data (j_decompress_ptr cinfo, long num_bytes)
{
- struct jpeg_source_mgr * src = cinfo->src;
-
- /* Just a dumb implementation for now. Could use fseek() except
- * it doesn't work on pipes. Not clear that being smart is worth
- * any trouble anyway --- large skips are infrequent.
- */
- if (num_bytes > 0) {
- while (num_bytes > (long) src->bytes_in_buffer) {
- num_bytes -= (long) src->bytes_in_buffer;
- (void) (*src->fill_input_buffer) (cinfo);
- /* note we assume that fill_input_buffer will never return FALSE,
- * so suspension need not be handled.
- */
- }
- src->next_input_byte += (size_t) num_bytes;
- src->bytes_in_buffer -= (size_t) num_bytes;
- }
+ struct jpeg_source_mgr * src = cinfo->src;
+
+ /* Just a dumb implementation for now. Could use fseek() except
+ * it doesn't work on pipes. Not clear that being smart is worth
+ * any trouble anyway --- large skips are infrequent.
+ */
+ if (num_bytes > 0) {
+ while (num_bytes > (long) src->bytes_in_buffer) {
+ num_bytes -= (long) src->bytes_in_buffer;
+ (void) (*src->fill_input_buffer) (cinfo);
+ /* note we assume that fill_input_buffer will never return FALSE,
+ * so suspension need not be handled.
+ */
+ }
+ src->next_input_byte += (size_t) num_bytes;
+ src->bytes_in_buffer -= (size_t) num_bytes;
+ }
}
@@ -195,7 +195,7 @@ skip_input_data (j_decompress_ptr cinfo, long num_bytes)
METHODDEF(void)
term_source (j_decompress_ptr cinfo)
{
- /* no work necessary here */
+ /* no work necessary here */
}
@@ -208,34 +208,34 @@ term_source (j_decompress_ptr cinfo)
GLOBAL(void)
jpeg_stdio_src (j_decompress_ptr cinfo, FILE * infile)
{
- my_src_ptr src;
-
- /* The source object and input buffer are made permanent so that a series
- * of JPEG images can be read from the same file by calling jpeg_stdio_src
- * only before the first one. (If we discarded the buffer at the end of
- * one image, we'd likely lose the start of the next one.)
- * This makes it unsafe to use this manager and a different source
- * manager serially with the same JPEG object. Caveat programmer.
- */
- if (cinfo->src == NULL) { /* first time for this JPEG object? */
- cinfo->src = (struct jpeg_source_mgr *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
- SIZEOF(my_source_mgr));
- src = (my_src_ptr) cinfo->src;
- src->buffer = (JOCTET *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
- INPUT_BUF_SIZE * SIZEOF(JOCTET));
- }
-
- src = (my_src_ptr) cinfo->src;
- src->pub.init_source = init_source;
- src->pub.fill_input_buffer = fill_input_buffer;
- src->pub.skip_input_data = skip_input_data;
- src->pub.resync_to_restart = jpeg_resync_to_restart; /* use default method */
- src->pub.term_source = term_source;
- src->infile = infile;
- src->pub.bytes_in_buffer = 0; /* forces fill_input_buffer on first read */
- src->pub.next_input_byte = NULL; /* until buffer loaded */
+ my_src_ptr src;
+
+ /* The source object and input buffer are made permanent so that a series
+ * of JPEG images can be read from the same file by calling jpeg_stdio_src
+ * only before the first one. (If we discarded the buffer at the end of
+ * one image, we'd likely lose the start of the next one.)
+ * This makes it unsafe to use this manager and a different source
+ * manager serially with the same JPEG object. Caveat programmer.
+ */
+ if (cinfo->src == NULL) { /* first time for this JPEG object? */
+ cinfo->src = (struct jpeg_source_mgr *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ SIZEOF(my_source_mgr));
+ src = (my_src_ptr) cinfo->src;
+ src->buffer = (JOCTET *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ INPUT_BUF_SIZE * SIZEOF(JOCTET));
+ }
+
+ src = (my_src_ptr) cinfo->src;
+ src->pub.init_source = init_source;
+ src->pub.fill_input_buffer = fill_input_buffer;
+ src->pub.skip_input_data = skip_input_data;
+ src->pub.resync_to_restart = jpeg_resync_to_restart; /* use default method */
+ src->pub.term_source = term_source;
+ src->infile = infile;
+ src->pub.bytes_in_buffer = 0; /* forces fill_input_buffer on first read */
+ src->pub.next_input_byte = NULL; /* until buffer loaded */
}
@@ -246,29 +246,29 @@ jpeg_stdio_src (j_decompress_ptr cinfo, FILE * infile)
GLOBAL(void)
jpeg_mem_src (j_decompress_ptr cinfo,
- unsigned char * inbuffer, unsigned long insize)
+ unsigned char * inbuffer, unsigned long insize)
{
- struct jpeg_source_mgr * src;
-
- if (inbuffer == NULL || insize == 0) /* Treat empty input as fatal error */
- ERREXIT(cinfo, JERR_INPUT_EMPTY);
-
- /* The source object is made permanent so that a series of JPEG images
- * can be read from the same buffer by calling jpeg_mem_src only before
- * the first one.
- */
- if (cinfo->src == NULL) { /* first time for this JPEG object? */
- cinfo->src = (struct jpeg_source_mgr *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
- SIZEOF(struct jpeg_source_mgr));
- }
-
- src = cinfo->src;
- src->init_source = init_mem_source;
- src->fill_input_buffer = fill_mem_input_buffer;
- src->skip_input_data = skip_input_data;
- src->resync_to_restart = jpeg_resync_to_restart; /* use default method */
- src->term_source = term_source;
- src->bytes_in_buffer = (size_t) insize;
- src->next_input_byte = (JOCTET *) inbuffer;
+ struct jpeg_source_mgr * src;
+
+ if (inbuffer == NULL || insize == 0) /* Treat empty input as fatal error */
+ ERREXIT(cinfo, JERR_INPUT_EMPTY);
+
+ /* The source object is made permanent so that a series of JPEG images
+ * can be read from the same buffer by calling jpeg_mem_src only before
+ * the first one.
+ */
+ if (cinfo->src == NULL) { /* first time for this JPEG object? */
+ cinfo->src = (struct jpeg_source_mgr *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ SIZEOF(struct jpeg_source_mgr));
+ }
+
+ src = cinfo->src;
+ src->init_source = init_mem_source;
+ src->fill_input_buffer = fill_mem_input_buffer;
+ src->skip_input_data = skip_input_data;
+ src->resync_to_restart = jpeg_resync_to_restart; /* use default method */
+ src->term_source = term_source;
+ src->bytes_in_buffer = (size_t) insize;
+ src->next_input_byte = (JOCTET *) inbuffer;
}
diff --git a/src/lib/libjpeg/jdcoefct.c b/src/lib/libjpeg/jdcoefct.c
index 1f0f442ab47..90cf3368022 100644
--- a/src/lib/libjpeg/jdcoefct.c
+++ b/src/lib/libjpeg/jdcoefct.c
@@ -26,36 +26,36 @@
/* Private buffer controller object */
typedef struct {
- struct jpeg_d_coef_controller pub; /* public fields */
-
- /* These variables keep track of the current location of the input side. */
- /* cinfo->input_iMCU_row is also used for this. */
- JDIMENSION MCU_ctr; /* counts MCUs processed in current row */
- int MCU_vert_offset; /* counts MCU rows within iMCU row */
- int MCU_rows_per_iMCU_row; /* number of such rows needed */
-
- /* The output side's location is represented by cinfo->output_iMCU_row. */
-
- /* In single-pass modes, it's sufficient to buffer just one MCU.
- * We allocate a workspace of D_MAX_BLOCKS_IN_MCU coefficient blocks,
- * and let the entropy decoder write into that workspace each time.
- * (On 80x86, the workspace is FAR even though it's not really very big;
- * this is to keep the module interfaces unchanged when a large coefficient
- * buffer is necessary.)
- * In multi-pass modes, this array points to the current MCU's blocks
- * within the virtual arrays; it is used only by the input side.
- */
- JBLOCKROW MCU_buffer[D_MAX_BLOCKS_IN_MCU];
+ struct jpeg_d_coef_controller pub; /* public fields */
+
+ /* These variables keep track of the current location of the input side. */
+ /* cinfo->input_iMCU_row is also used for this. */
+ JDIMENSION MCU_ctr; /* counts MCUs processed in current row */
+ int MCU_vert_offset; /* counts MCU rows within iMCU row */
+ int MCU_rows_per_iMCU_row; /* number of such rows needed */
+
+ /* The output side's location is represented by cinfo->output_iMCU_row. */
+
+ /* In single-pass modes, it's sufficient to buffer just one MCU.
+ * We allocate a workspace of D_MAX_BLOCKS_IN_MCU coefficient blocks,
+ * and let the entropy decoder write into that workspace each time.
+ * (On 80x86, the workspace is FAR even though it's not really very big;
+ * this is to keep the module interfaces unchanged when a large coefficient
+ * buffer is necessary.)
+ * In multi-pass modes, this array points to the current MCU's blocks
+ * within the virtual arrays; it is used only by the input side.
+ */
+ JBLOCKROW MCU_buffer[D_MAX_BLOCKS_IN_MCU];
#ifdef D_MULTISCAN_FILES_SUPPORTED
- /* In multi-pass modes, we need a virtual block array for each component. */
- jvirt_barray_ptr whole_image[MAX_COMPONENTS];
+ /* In multi-pass modes, we need a virtual block array for each component. */
+ jvirt_barray_ptr whole_image[MAX_COMPONENTS];
#endif
#ifdef BLOCK_SMOOTHING_SUPPORTED
- /* When doing block smoothing, we latch coefficient Al values here */
- int * coef_bits_latch;
-#define SAVED_COEFS 6 /* we save coef_bits[0..5] */
+ /* When doing block smoothing, we latch coefficient Al values here */
+ int * coef_bits_latch;
+#define SAVED_COEFS 6 /* we save coef_bits[0..5] */
#endif
} my_coef_controller;
@@ -79,23 +79,23 @@ LOCAL(void)
start_iMCU_row (j_decompress_ptr cinfo)
/* Reset within-iMCU-row counters for a new row (input side) */
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
-
- /* In an interleaved scan, an MCU row is the same as an iMCU row.
- * In a noninterleaved scan, an iMCU row has v_samp_factor MCU rows.
- * But at the bottom of the image, process only what's left.
- */
- if (cinfo->comps_in_scan > 1) {
- coef->MCU_rows_per_iMCU_row = 1;
- } else {
- if (cinfo->input_iMCU_row < (cinfo->total_iMCU_rows-1))
- coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->v_samp_factor;
- else
- coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->last_row_height;
- }
-
- coef->MCU_ctr = 0;
- coef->MCU_vert_offset = 0;
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+
+ /* In an interleaved scan, an MCU row is the same as an iMCU row.
+ * In a noninterleaved scan, an iMCU row has v_samp_factor MCU rows.
+ * But at the bottom of the image, process only what's left.
+ */
+ if (cinfo->comps_in_scan > 1) {
+ coef->MCU_rows_per_iMCU_row = 1;
+ } else {
+ if (cinfo->input_iMCU_row < (cinfo->total_iMCU_rows-1))
+ coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->v_samp_factor;
+ else
+ coef->MCU_rows_per_iMCU_row = cinfo->cur_comp_info[0]->last_row_height;
+ }
+
+ coef->MCU_ctr = 0;
+ coef->MCU_vert_offset = 0;
}
@@ -106,8 +106,8 @@ start_iMCU_row (j_decompress_ptr cinfo)
METHODDEF(void)
start_input_pass (j_decompress_ptr cinfo)
{
- cinfo->input_iMCU_row = 0;
- start_iMCU_row(cinfo);
+ cinfo->input_iMCU_row = 0;
+ start_iMCU_row(cinfo);
}
@@ -119,17 +119,17 @@ METHODDEF(void)
start_output_pass (j_decompress_ptr cinfo)
{
#ifdef BLOCK_SMOOTHING_SUPPORTED
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
-
- /* If multipass, check to see whether to use block smoothing on this pass */
- if (coef->pub.coef_arrays != NULL) {
- if (cinfo->do_block_smoothing && smoothing_ok(cinfo))
- coef->pub.decompress_data = decompress_smooth_data;
- else
- coef->pub.decompress_data = decompress_data;
- }
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+
+ /* If multipass, check to see whether to use block smoothing on this pass */
+ if (coef->pub.coef_arrays != NULL) {
+ if (cinfo->do_block_smoothing && smoothing_ok(cinfo))
+ coef->pub.decompress_data = decompress_smooth_data;
+ else
+ coef->pub.decompress_data = decompress_data;
+ }
#endif
- cinfo->output_iMCU_row = 0;
+ cinfo->output_iMCU_row = 0;
}
@@ -146,77 +146,77 @@ start_output_pass (j_decompress_ptr cinfo)
METHODDEF(int)
decompress_onepass (j_decompress_ptr cinfo, JSAMPIMAGE output_buf)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION MCU_col_num; /* index of current MCU within row */
- JDIMENSION last_MCU_col = cinfo->MCUs_per_row - 1;
- JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
- int blkn, ci, xindex, yindex, yoffset, useful_width;
- JSAMPARRAY output_ptr;
- JDIMENSION start_col, output_col;
- jpeg_component_info *compptr;
- inverse_DCT_method_ptr inverse_DCT;
-
- /* Loop to process as much as one whole iMCU row */
- for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
- yoffset++) {
- for (MCU_col_num = coef->MCU_ctr; MCU_col_num <= last_MCU_col;
- MCU_col_num++) {
- /* Try to fetch an MCU. Entropy decoder expects buffer to be zeroed. */
- jzero_far((void FAR *) coef->MCU_buffer[0],
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION MCU_col_num; /* index of current MCU within row */
+ JDIMENSION last_MCU_col = cinfo->MCUs_per_row - 1;
+ JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
+ int blkn, ci, xindex, yindex, yoffset, useful_width;
+ JSAMPARRAY output_ptr;
+ JDIMENSION start_col, output_col;
+ jpeg_component_info *compptr;
+ inverse_DCT_method_ptr inverse_DCT;
+
+ /* Loop to process as much as one whole iMCU row */
+ for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
+ yoffset++) {
+ for (MCU_col_num = coef->MCU_ctr; MCU_col_num <= last_MCU_col;
+ MCU_col_num++) {
+ /* Try to fetch an MCU. Entropy decoder expects buffer to be zeroed. */
+ jzero_far((void FAR *) coef->MCU_buffer[0],
(size_t) (cinfo->blocks_in_MCU * SIZEOF(JBLOCK)));
- if (! (*cinfo->entropy->decode_mcu) (cinfo, coef->MCU_buffer)) {
+ if (! (*cinfo->entropy->decode_mcu) (cinfo, coef->MCU_buffer)) {
/* Suspension forced; update state counters and exit */
coef->MCU_vert_offset = yoffset;
coef->MCU_ctr = MCU_col_num;
return JPEG_SUSPENDED;
- }
- /* Determine where data should go in output_buf and do the IDCT thing.
- * We skip dummy blocks at the right and bottom edges (but blkn gets
- * incremented past them!). Note the inner loop relies on having
- * allocated the MCU_buffer[] blocks sequentially.
- */
- blkn = 0; /* index of current DCT block within MCU */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ }
+ /* Determine where data should go in output_buf and do the IDCT thing.
+ * We skip dummy blocks at the right and bottom edges (but blkn gets
+ * incremented past them!). Note the inner loop relies on having
+ * allocated the MCU_buffer[] blocks sequentially.
+ */
+ blkn = 0; /* index of current DCT block within MCU */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
compptr = cinfo->cur_comp_info[ci];
/* Don't bother to IDCT an uninteresting component. */
if (! compptr->component_needed) {
- blkn += compptr->MCU_blocks;
- continue;
+ blkn += compptr->MCU_blocks;
+ continue;
}
inverse_DCT = cinfo->idct->inverse_DCT[compptr->component_index];
useful_width = (MCU_col_num < last_MCU_col) ? compptr->MCU_width
- : compptr->last_col_width;
+ : compptr->last_col_width;
output_ptr = output_buf[compptr->component_index] +
- yoffset * compptr->DCT_v_scaled_size;
+ yoffset * compptr->DCT_v_scaled_size;
start_col = MCU_col_num * compptr->MCU_sample_width;
for (yindex = 0; yindex < compptr->MCU_height; yindex++) {
- if (cinfo->input_iMCU_row < last_iMCU_row ||
- yoffset+yindex < compptr->last_row_height) {
- output_col = start_col;
- for (xindex = 0; xindex < useful_width; xindex++) {
- (*inverse_DCT) (cinfo, compptr,
- (JCOEFPTR) coef->MCU_buffer[blkn+xindex],
- output_ptr, output_col);
- output_col += compptr->DCT_h_scaled_size;
- }
- }
- blkn += compptr->MCU_width;
- output_ptr += compptr->DCT_v_scaled_size;
- }
- }
- }
- /* Completed an MCU row, but perhaps not an iMCU row */
- coef->MCU_ctr = 0;
- }
- /* Completed the iMCU row, advance counters for next one */
- cinfo->output_iMCU_row++;
- if (++(cinfo->input_iMCU_row) < cinfo->total_iMCU_rows) {
- start_iMCU_row(cinfo);
- return JPEG_ROW_COMPLETED;
- }
- /* Completed the scan */
- (*cinfo->inputctl->finish_input_pass) (cinfo);
- return JPEG_SCAN_COMPLETED;
+ if (cinfo->input_iMCU_row < last_iMCU_row ||
+ yoffset+yindex < compptr->last_row_height) {
+ output_col = start_col;
+ for (xindex = 0; xindex < useful_width; xindex++) {
+ (*inverse_DCT) (cinfo, compptr,
+ (JCOEFPTR) coef->MCU_buffer[blkn+xindex],
+ output_ptr, output_col);
+ output_col += compptr->DCT_h_scaled_size;
+ }
+ }
+ blkn += compptr->MCU_width;
+ output_ptr += compptr->DCT_v_scaled_size;
+ }
+ }
+ }
+ /* Completed an MCU row, but perhaps not an iMCU row */
+ coef->MCU_ctr = 0;
+ }
+ /* Completed the iMCU row, advance counters for next one */
+ cinfo->output_iMCU_row++;
+ if (++(cinfo->input_iMCU_row) < cinfo->total_iMCU_rows) {
+ start_iMCU_row(cinfo);
+ return JPEG_ROW_COMPLETED;
+ }
+ /* Completed the scan */
+ (*cinfo->inputctl->finish_input_pass) (cinfo);
+ return JPEG_SCAN_COMPLETED;
}
@@ -227,7 +227,7 @@ decompress_onepass (j_decompress_ptr cinfo, JSAMPIMAGE output_buf)
METHODDEF(int)
dummy_consume_data (j_decompress_ptr cinfo)
{
- return JPEG_SUSPENDED; /* Always indicate nothing was done */
+ return JPEG_SUSPENDED; /* Always indicate nothing was done */
}
@@ -243,63 +243,63 @@ dummy_consume_data (j_decompress_ptr cinfo)
METHODDEF(int)
consume_data (j_decompress_ptr cinfo)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION MCU_col_num; /* index of current MCU within row */
- int blkn, ci, xindex, yindex, yoffset;
- JDIMENSION start_col;
- JBLOCKARRAY buffer[MAX_COMPS_IN_SCAN];
- JBLOCKROW buffer_ptr;
- jpeg_component_info *compptr;
-
- /* Align the virtual buffers for the components used in this scan. */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- buffer[ci] = (*cinfo->mem->access_virt_barray)
- ((j_common_ptr) cinfo, coef->whole_image[compptr->component_index],
- cinfo->input_iMCU_row * compptr->v_samp_factor,
- (JDIMENSION) compptr->v_samp_factor, TRUE);
- /* Note: entropy decoder expects buffer to be zeroed,
- * but this is handled automatically by the memory manager
- * because we requested a pre-zeroed array.
- */
- }
-
- /* Loop to process one whole iMCU row */
- for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
- yoffset++) {
- for (MCU_col_num = coef->MCU_ctr; MCU_col_num < cinfo->MCUs_per_row;
- MCU_col_num++) {
- /* Construct list of pointers to DCT blocks belonging to this MCU */
- blkn = 0; /* index of current DCT block within MCU */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION MCU_col_num; /* index of current MCU within row */
+ int blkn, ci, xindex, yindex, yoffset;
+ JDIMENSION start_col;
+ JBLOCKARRAY buffer[MAX_COMPS_IN_SCAN];
+ JBLOCKROW buffer_ptr;
+ jpeg_component_info *compptr;
+
+ /* Align the virtual buffers for the components used in this scan. */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ buffer[ci] = (*cinfo->mem->access_virt_barray)
+ ((j_common_ptr) cinfo, coef->whole_image[compptr->component_index],
+ cinfo->input_iMCU_row * compptr->v_samp_factor,
+ (JDIMENSION) compptr->v_samp_factor, TRUE);
+ /* Note: entropy decoder expects buffer to be zeroed,
+ * but this is handled automatically by the memory manager
+ * because we requested a pre-zeroed array.
+ */
+ }
+
+ /* Loop to process one whole iMCU row */
+ for (yoffset = coef->MCU_vert_offset; yoffset < coef->MCU_rows_per_iMCU_row;
+ yoffset++) {
+ for (MCU_col_num = coef->MCU_ctr; MCU_col_num < cinfo->MCUs_per_row;
+ MCU_col_num++) {
+ /* Construct list of pointers to DCT blocks belonging to this MCU */
+ blkn = 0; /* index of current DCT block within MCU */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
compptr = cinfo->cur_comp_info[ci];
start_col = MCU_col_num * compptr->MCU_width;
for (yindex = 0; yindex < compptr->MCU_height; yindex++) {
- buffer_ptr = buffer[ci][yindex+yoffset] + start_col;
- for (xindex = 0; xindex < compptr->MCU_width; xindex++) {
- coef->MCU_buffer[blkn++] = buffer_ptr++;
- }
- }
- }
- /* Try to fetch the MCU. */
- if (! (*cinfo->entropy->decode_mcu) (cinfo, coef->MCU_buffer)) {
+ buffer_ptr = buffer[ci][yindex+yoffset] + start_col;
+ for (xindex = 0; xindex < compptr->MCU_width; xindex++) {
+ coef->MCU_buffer[blkn++] = buffer_ptr++;
+ }
+ }
+ }
+ /* Try to fetch the MCU. */
+ if (! (*cinfo->entropy->decode_mcu) (cinfo, coef->MCU_buffer)) {
/* Suspension forced; update state counters and exit */
coef->MCU_vert_offset = yoffset;
coef->MCU_ctr = MCU_col_num;
return JPEG_SUSPENDED;
- }
- }
- /* Completed an MCU row, but perhaps not an iMCU row */
- coef->MCU_ctr = 0;
- }
- /* Completed the iMCU row, advance counters for next one */
- if (++(cinfo->input_iMCU_row) < cinfo->total_iMCU_rows) {
- start_iMCU_row(cinfo);
- return JPEG_ROW_COMPLETED;
- }
- /* Completed the scan */
- (*cinfo->inputctl->finish_input_pass) (cinfo);
- return JPEG_SCAN_COMPLETED;
+ }
+ }
+ /* Completed an MCU row, but perhaps not an iMCU row */
+ coef->MCU_ctr = 0;
+ }
+ /* Completed the iMCU row, advance counters for next one */
+ if (++(cinfo->input_iMCU_row) < cinfo->total_iMCU_rows) {
+ start_iMCU_row(cinfo);
+ return JPEG_ROW_COMPLETED;
+ }
+ /* Completed the scan */
+ (*cinfo->inputctl->finish_input_pass) (cinfo);
+ return JPEG_SCAN_COMPLETED;
}
@@ -314,63 +314,63 @@ consume_data (j_decompress_ptr cinfo)
METHODDEF(int)
decompress_data (j_decompress_ptr cinfo, JSAMPIMAGE output_buf)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
- JDIMENSION block_num;
- int ci, block_row, block_rows;
- JBLOCKARRAY buffer;
- JBLOCKROW buffer_ptr;
- JSAMPARRAY output_ptr;
- JDIMENSION output_col;
- jpeg_component_info *compptr;
- inverse_DCT_method_ptr inverse_DCT;
-
- /* Force some input to be done if we are getting ahead of the input. */
- while (cinfo->input_scan_number < cinfo->output_scan_number ||
- (cinfo->input_scan_number == cinfo->output_scan_number &&
- cinfo->input_iMCU_row <= cinfo->output_iMCU_row)) {
- if ((*cinfo->inputctl->consume_input)(cinfo) == JPEG_SUSPENDED)
- return JPEG_SUSPENDED;
- }
-
- /* OK, output from the virtual arrays. */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Don't bother to IDCT an uninteresting component. */
- if (! compptr->component_needed)
- continue;
- /* Align the virtual buffer for this component. */
- buffer = (*cinfo->mem->access_virt_barray)
- ((j_common_ptr) cinfo, coef->whole_image[ci],
- cinfo->output_iMCU_row * compptr->v_samp_factor,
- (JDIMENSION) compptr->v_samp_factor, FALSE);
- /* Count non-dummy DCT block rows in this iMCU row. */
- if (cinfo->output_iMCU_row < last_iMCU_row)
- block_rows = compptr->v_samp_factor;
- else {
- /* NB: can't use last_row_height here; it is input-side-dependent! */
- block_rows = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
- if (block_rows == 0) block_rows = compptr->v_samp_factor;
- }
- inverse_DCT = cinfo->idct->inverse_DCT[ci];
- output_ptr = output_buf[ci];
- /* Loop over all DCT blocks to be processed. */
- for (block_row = 0; block_row < block_rows; block_row++) {
- buffer_ptr = buffer[block_row];
- output_col = 0;
- for (block_num = 0; block_num < compptr->width_in_blocks; block_num++) {
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
+ JDIMENSION block_num;
+ int ci, block_row, block_rows;
+ JBLOCKARRAY buffer;
+ JBLOCKROW buffer_ptr;
+ JSAMPARRAY output_ptr;
+ JDIMENSION output_col;
+ jpeg_component_info *compptr;
+ inverse_DCT_method_ptr inverse_DCT;
+
+ /* Force some input to be done if we are getting ahead of the input. */
+ while (cinfo->input_scan_number < cinfo->output_scan_number ||
+ (cinfo->input_scan_number == cinfo->output_scan_number &&
+ cinfo->input_iMCU_row <= cinfo->output_iMCU_row)) {
+ if ((*cinfo->inputctl->consume_input)(cinfo) == JPEG_SUSPENDED)
+ return JPEG_SUSPENDED;
+ }
+
+ /* OK, output from the virtual arrays. */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Don't bother to IDCT an uninteresting component. */
+ if (! compptr->component_needed)
+ continue;
+ /* Align the virtual buffer for this component. */
+ buffer = (*cinfo->mem->access_virt_barray)
+ ((j_common_ptr) cinfo, coef->whole_image[ci],
+ cinfo->output_iMCU_row * compptr->v_samp_factor,
+ (JDIMENSION) compptr->v_samp_factor, FALSE);
+ /* Count non-dummy DCT block rows in this iMCU row. */
+ if (cinfo->output_iMCU_row < last_iMCU_row)
+ block_rows = compptr->v_samp_factor;
+ else {
+ /* NB: can't use last_row_height here; it is input-side-dependent! */
+ block_rows = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
+ if (block_rows == 0) block_rows = compptr->v_samp_factor;
+ }
+ inverse_DCT = cinfo->idct->inverse_DCT[ci];
+ output_ptr = output_buf[ci];
+ /* Loop over all DCT blocks to be processed. */
+ for (block_row = 0; block_row < block_rows; block_row++) {
+ buffer_ptr = buffer[block_row];
+ output_col = 0;
+ for (block_num = 0; block_num < compptr->width_in_blocks; block_num++) {
(*inverse_DCT) (cinfo, compptr, (JCOEFPTR) buffer_ptr,
output_ptr, output_col);
buffer_ptr++;
output_col += compptr->DCT_h_scaled_size;
- }
- output_ptr += compptr->DCT_v_scaled_size;
- }
- }
-
- if (++(cinfo->output_iMCU_row) < cinfo->total_iMCU_rows)
- return JPEG_ROW_COMPLETED;
- return JPEG_SCAN_COMPLETED;
+ }
+ output_ptr += compptr->DCT_v_scaled_size;
+ }
+ }
+
+ if (++(cinfo->output_iMCU_row) < cinfo->total_iMCU_rows)
+ return JPEG_ROW_COMPLETED;
+ return JPEG_SCAN_COMPLETED;
}
#endif /* D_MULTISCAN_FILES_SUPPORTED */
@@ -404,52 +404,52 @@ decompress_data (j_decompress_ptr cinfo, JSAMPIMAGE output_buf)
LOCAL(boolean)
smoothing_ok (j_decompress_ptr cinfo)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- boolean smoothing_useful = FALSE;
- int ci, coefi;
- jpeg_component_info *compptr;
- JQUANT_TBL * qtable;
- int * coef_bits;
- int * coef_bits_latch;
-
- if (! cinfo->progressive_mode || cinfo->coef_bits == NULL)
- return FALSE;
-
- /* Allocate latch area if not already done */
- if (coef->coef_bits_latch == NULL)
- coef->coef_bits_latch = (int *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- cinfo->num_components *
- (SAVED_COEFS * SIZEOF(int)));
- coef_bits_latch = coef->coef_bits_latch;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* All components' quantization values must already be latched. */
- if ((qtable = compptr->quant_table) == NULL)
- return FALSE;
- /* Verify DC & first 5 AC quantizers are nonzero to avoid zero-divide. */
- if (qtable->quantval[0] == 0 ||
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ boolean smoothing_useful = FALSE;
+ int ci, coefi;
+ jpeg_component_info *compptr;
+ JQUANT_TBL * qtable;
+ int * coef_bits;
+ int * coef_bits_latch;
+
+ if (! cinfo->progressive_mode || cinfo->coef_bits == NULL)
+ return FALSE;
+
+ /* Allocate latch area if not already done */
+ if (coef->coef_bits_latch == NULL)
+ coef->coef_bits_latch = (int *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cinfo->num_components *
+ (SAVED_COEFS * SIZEOF(int)));
+ coef_bits_latch = coef->coef_bits_latch;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* All components' quantization values must already be latched. */
+ if ((qtable = compptr->quant_table) == NULL)
+ return FALSE;
+ /* Verify DC & first 5 AC quantizers are nonzero to avoid zero-divide. */
+ if (qtable->quantval[0] == 0 ||
qtable->quantval[Q01_POS] == 0 ||
qtable->quantval[Q10_POS] == 0 ||
qtable->quantval[Q20_POS] == 0 ||
qtable->quantval[Q11_POS] == 0 ||
qtable->quantval[Q02_POS] == 0)
- return FALSE;
- /* DC values must be at least partly known for all components. */
- coef_bits = cinfo->coef_bits[ci];
- if (coef_bits[0] < 0)
- return FALSE;
- /* Block smoothing is helpful if some AC coefficients remain inaccurate. */
- for (coefi = 1; coefi <= 5; coefi++) {
- coef_bits_latch[coefi] = coef_bits[coefi];
- if (coef_bits[coefi] != 0)
+ return FALSE;
+ /* DC values must be at least partly known for all components. */
+ coef_bits = cinfo->coef_bits[ci];
+ if (coef_bits[0] < 0)
+ return FALSE;
+ /* Block smoothing is helpful if some AC coefficients remain inaccurate. */
+ for (coefi = 1; coefi <= 5; coefi++) {
+ coef_bits_latch[coefi] = coef_bits[coefi];
+ if (coef_bits[coefi] != 0)
smoothing_useful = TRUE;
- }
- coef_bits_latch += SAVED_COEFS;
- }
+ }
+ coef_bits_latch += SAVED_COEFS;
+ }
- return smoothing_useful;
+ return smoothing_useful;
}
@@ -460,191 +460,191 @@ smoothing_ok (j_decompress_ptr cinfo)
METHODDEF(int)
decompress_smooth_data (j_decompress_ptr cinfo, JSAMPIMAGE output_buf)
{
- my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
- JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
- JDIMENSION block_num, last_block_column;
- int ci, block_row, block_rows, access_rows;
- JBLOCKARRAY buffer;
- JBLOCKROW buffer_ptr, prev_block_row, next_block_row;
- JSAMPARRAY output_ptr;
- JDIMENSION output_col;
- jpeg_component_info *compptr;
- inverse_DCT_method_ptr inverse_DCT;
- boolean first_row, last_row;
- JBLOCK workspace;
- int *coef_bits;
- JQUANT_TBL *quanttbl;
- INT32 Q00,Q01,Q02,Q10,Q11,Q20, num;
- int DC1,DC2,DC3,DC4,DC5,DC6,DC7,DC8,DC9;
- int Al, pred;
-
- /* Force some input to be done if we are getting ahead of the input. */
- while (cinfo->input_scan_number <= cinfo->output_scan_number &&
- ! cinfo->inputctl->eoi_reached) {
- if (cinfo->input_scan_number == cinfo->output_scan_number) {
- /* If input is working on current scan, we ordinarily want it to
- * have completed the current row. But if input scan is DC,
- * we want it to keep one row ahead so that next block row's DC
- * values are up to date.
- */
- JDIMENSION delta = (cinfo->Ss == 0) ? 1 : 0;
- if (cinfo->input_iMCU_row > cinfo->output_iMCU_row+delta)
+ my_coef_ptr coef = (my_coef_ptr) cinfo->coef;
+ JDIMENSION last_iMCU_row = cinfo->total_iMCU_rows - 1;
+ JDIMENSION block_num, last_block_column;
+ int ci, block_row, block_rows, access_rows;
+ JBLOCKARRAY buffer;
+ JBLOCKROW buffer_ptr, prev_block_row, next_block_row;
+ JSAMPARRAY output_ptr;
+ JDIMENSION output_col;
+ jpeg_component_info *compptr;
+ inverse_DCT_method_ptr inverse_DCT;
+ boolean first_row, last_row;
+ JBLOCK workspace;
+ int *coef_bits;
+ JQUANT_TBL *quanttbl;
+ INT32 Q00,Q01,Q02,Q10,Q11,Q20, num;
+ int DC1,DC2,DC3,DC4,DC5,DC6,DC7,DC8,DC9;
+ int Al, pred;
+
+ /* Force some input to be done if we are getting ahead of the input. */
+ while (cinfo->input_scan_number <= cinfo->output_scan_number &&
+ ! cinfo->inputctl->eoi_reached) {
+ if (cinfo->input_scan_number == cinfo->output_scan_number) {
+ /* If input is working on current scan, we ordinarily want it to
+ * have completed the current row. But if input scan is DC,
+ * we want it to keep one row ahead so that next block row's DC
+ * values are up to date.
+ */
+ JDIMENSION delta = (cinfo->Ss == 0) ? 1 : 0;
+ if (cinfo->input_iMCU_row > cinfo->output_iMCU_row+delta)
break;
- }
- if ((*cinfo->inputctl->consume_input)(cinfo) == JPEG_SUSPENDED)
- return JPEG_SUSPENDED;
- }
-
- /* OK, output from the virtual arrays. */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Don't bother to IDCT an uninteresting component. */
- if (! compptr->component_needed)
- continue;
- /* Count non-dummy DCT block rows in this iMCU row. */
- if (cinfo->output_iMCU_row < last_iMCU_row) {
- block_rows = compptr->v_samp_factor;
- access_rows = block_rows * 2; /* this and next iMCU row */
- last_row = FALSE;
- } else {
- /* NB: can't use last_row_height here; it is input-side-dependent! */
- block_rows = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
- if (block_rows == 0) block_rows = compptr->v_samp_factor;
- access_rows = block_rows; /* this iMCU row only */
- last_row = TRUE;
- }
- /* Align the virtual buffer for this component. */
- if (cinfo->output_iMCU_row > 0) {
- access_rows += compptr->v_samp_factor; /* prior iMCU row too */
- buffer = (*cinfo->mem->access_virt_barray)
+ }
+ if ((*cinfo->inputctl->consume_input)(cinfo) == JPEG_SUSPENDED)
+ return JPEG_SUSPENDED;
+ }
+
+ /* OK, output from the virtual arrays. */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Don't bother to IDCT an uninteresting component. */
+ if (! compptr->component_needed)
+ continue;
+ /* Count non-dummy DCT block rows in this iMCU row. */
+ if (cinfo->output_iMCU_row < last_iMCU_row) {
+ block_rows = compptr->v_samp_factor;
+ access_rows = block_rows * 2; /* this and next iMCU row */
+ last_row = FALSE;
+ } else {
+ /* NB: can't use last_row_height here; it is input-side-dependent! */
+ block_rows = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
+ if (block_rows == 0) block_rows = compptr->v_samp_factor;
+ access_rows = block_rows; /* this iMCU row only */
+ last_row = TRUE;
+ }
+ /* Align the virtual buffer for this component. */
+ if (cinfo->output_iMCU_row > 0) {
+ access_rows += compptr->v_samp_factor; /* prior iMCU row too */
+ buffer = (*cinfo->mem->access_virt_barray)
((j_common_ptr) cinfo, coef->whole_image[ci],
- (cinfo->output_iMCU_row - 1) * compptr->v_samp_factor,
- (JDIMENSION) access_rows, FALSE);
- buffer += compptr->v_samp_factor; /* point to current iMCU row */
- first_row = FALSE;
- } else {
- buffer = (*cinfo->mem->access_virt_barray)
+ (cinfo->output_iMCU_row - 1) * compptr->v_samp_factor,
+ (JDIMENSION) access_rows, FALSE);
+ buffer += compptr->v_samp_factor; /* point to current iMCU row */
+ first_row = FALSE;
+ } else {
+ buffer = (*cinfo->mem->access_virt_barray)
((j_common_ptr) cinfo, coef->whole_image[ci],
- (JDIMENSION) 0, (JDIMENSION) access_rows, FALSE);
- first_row = TRUE;
- }
- /* Fetch component-dependent info */
- coef_bits = coef->coef_bits_latch + (ci * SAVED_COEFS);
- quanttbl = compptr->quant_table;
- Q00 = quanttbl->quantval[0];
- Q01 = quanttbl->quantval[Q01_POS];
- Q10 = quanttbl->quantval[Q10_POS];
- Q20 = quanttbl->quantval[Q20_POS];
- Q11 = quanttbl->quantval[Q11_POS];
- Q02 = quanttbl->quantval[Q02_POS];
- inverse_DCT = cinfo->idct->inverse_DCT[ci];
- output_ptr = output_buf[ci];
- /* Loop over all DCT blocks to be processed. */
- for (block_row = 0; block_row < block_rows; block_row++) {
- buffer_ptr = buffer[block_row];
- if (first_row && block_row == 0)
+ (JDIMENSION) 0, (JDIMENSION) access_rows, FALSE);
+ first_row = TRUE;
+ }
+ /* Fetch component-dependent info */
+ coef_bits = coef->coef_bits_latch + (ci * SAVED_COEFS);
+ quanttbl = compptr->quant_table;
+ Q00 = quanttbl->quantval[0];
+ Q01 = quanttbl->quantval[Q01_POS];
+ Q10 = quanttbl->quantval[Q10_POS];
+ Q20 = quanttbl->quantval[Q20_POS];
+ Q11 = quanttbl->quantval[Q11_POS];
+ Q02 = quanttbl->quantval[Q02_POS];
+ inverse_DCT = cinfo->idct->inverse_DCT[ci];
+ output_ptr = output_buf[ci];
+ /* Loop over all DCT blocks to be processed. */
+ for (block_row = 0; block_row < block_rows; block_row++) {
+ buffer_ptr = buffer[block_row];
+ if (first_row && block_row == 0)
prev_block_row = buffer_ptr;
- else
+ else
prev_block_row = buffer[block_row-1];
- if (last_row && block_row == block_rows-1)
+ if (last_row && block_row == block_rows-1)
next_block_row = buffer_ptr;
- else
+ else
next_block_row = buffer[block_row+1];
- /* We fetch the surrounding DC values using a sliding-register approach.
- * Initialize all nine here so as to do the right thing on narrow pics.
- */
- DC1 = DC2 = DC3 = (int) prev_block_row[0][0];
- DC4 = DC5 = DC6 = (int) buffer_ptr[0][0];
- DC7 = DC8 = DC9 = (int) next_block_row[0][0];
- output_col = 0;
- last_block_column = compptr->width_in_blocks - 1;
- for (block_num = 0; block_num <= last_block_column; block_num++) {
+ /* We fetch the surrounding DC values using a sliding-register approach.
+ * Initialize all nine here so as to do the right thing on narrow pics.
+ */
+ DC1 = DC2 = DC3 = (int) prev_block_row[0][0];
+ DC4 = DC5 = DC6 = (int) buffer_ptr[0][0];
+ DC7 = DC8 = DC9 = (int) next_block_row[0][0];
+ output_col = 0;
+ last_block_column = compptr->width_in_blocks - 1;
+ for (block_num = 0; block_num <= last_block_column; block_num++) {
/* Fetch current DCT block into workspace so we can modify it. */
jcopy_block_row(buffer_ptr, (JBLOCKROW) workspace, (JDIMENSION) 1);
/* Update DC values */
if (block_num < last_block_column) {
- DC3 = (int) prev_block_row[1][0];
- DC6 = (int) buffer_ptr[1][0];
- DC9 = (int) next_block_row[1][0];
+ DC3 = (int) prev_block_row[1][0];
+ DC6 = (int) buffer_ptr[1][0];
+ DC9 = (int) next_block_row[1][0];
}
/* Compute coefficient estimates per K.8.
- * An estimate is applied only if coefficient is still zero,
- * and is not known to be fully accurate.
- */
+ * An estimate is applied only if coefficient is still zero,
+ * and is not known to be fully accurate.
+ */
/* AC01 */
if ((Al=coef_bits[1]) != 0 && workspace[1] == 0) {
- num = 36 * Q00 * (DC4 - DC6);
- if (num >= 0) {
- pred = (int) (((Q01<<7) + num) / (Q01<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- } else {
- pred = (int) (((Q01<<7) - num) / (Q01<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- pred = -pred;
- }
- workspace[1] = (JCOEF) pred;
+ num = 36 * Q00 * (DC4 - DC6);
+ if (num >= 0) {
+ pred = (int) (((Q01<<7) + num) / (Q01<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ } else {
+ pred = (int) (((Q01<<7) - num) / (Q01<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ pred = -pred;
+ }
+ workspace[1] = (JCOEF) pred;
}
/* AC10 */
if ((Al=coef_bits[2]) != 0 && workspace[8] == 0) {
- num = 36 * Q00 * (DC2 - DC8);
- if (num >= 0) {
- pred = (int) (((Q10<<7) + num) / (Q10<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- } else {
- pred = (int) (((Q10<<7) - num) / (Q10<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- pred = -pred;
- }
- workspace[8] = (JCOEF) pred;
+ num = 36 * Q00 * (DC2 - DC8);
+ if (num >= 0) {
+ pred = (int) (((Q10<<7) + num) / (Q10<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ } else {
+ pred = (int) (((Q10<<7) - num) / (Q10<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ pred = -pred;
+ }
+ workspace[8] = (JCOEF) pred;
}
/* AC20 */
if ((Al=coef_bits[3]) != 0 && workspace[16] == 0) {
- num = 9 * Q00 * (DC2 + DC8 - 2*DC5);
- if (num >= 0) {
- pred = (int) (((Q20<<7) + num) / (Q20<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- } else {
- pred = (int) (((Q20<<7) - num) / (Q20<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- pred = -pred;
- }
- workspace[16] = (JCOEF) pred;
+ num = 9 * Q00 * (DC2 + DC8 - 2*DC5);
+ if (num >= 0) {
+ pred = (int) (((Q20<<7) + num) / (Q20<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ } else {
+ pred = (int) (((Q20<<7) - num) / (Q20<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ pred = -pred;
+ }
+ workspace[16] = (JCOEF) pred;
}
/* AC11 */
if ((Al=coef_bits[4]) != 0 && workspace[9] == 0) {
- num = 5 * Q00 * (DC1 - DC3 - DC7 + DC9);
- if (num >= 0) {
- pred = (int) (((Q11<<7) + num) / (Q11<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- } else {
- pred = (int) (((Q11<<7) - num) / (Q11<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- pred = -pred;
- }
- workspace[9] = (JCOEF) pred;
+ num = 5 * Q00 * (DC1 - DC3 - DC7 + DC9);
+ if (num >= 0) {
+ pred = (int) (((Q11<<7) + num) / (Q11<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ } else {
+ pred = (int) (((Q11<<7) - num) / (Q11<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ pred = -pred;
+ }
+ workspace[9] = (JCOEF) pred;
}
/* AC02 */
if ((Al=coef_bits[5]) != 0 && workspace[2] == 0) {
- num = 9 * Q00 * (DC4 + DC6 - 2*DC5);
- if (num >= 0) {
- pred = (int) (((Q02<<7) + num) / (Q02<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- } else {
- pred = (int) (((Q02<<7) - num) / (Q02<<8));
- if (Al > 0 && pred >= (1<<Al))
- pred = (1<<Al)-1;
- pred = -pred;
- }
- workspace[2] = (JCOEF) pred;
+ num = 9 * Q00 * (DC4 + DC6 - 2*DC5);
+ if (num >= 0) {
+ pred = (int) (((Q02<<7) + num) / (Q02<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ } else {
+ pred = (int) (((Q02<<7) - num) / (Q02<<8));
+ if (Al > 0 && pred >= (1<<Al))
+ pred = (1<<Al)-1;
+ pred = -pred;
+ }
+ workspace[2] = (JCOEF) pred;
}
/* OK, do the IDCT */
(*inverse_DCT) (cinfo, compptr, (JCOEFPTR) workspace,
@@ -655,14 +655,14 @@ decompress_smooth_data (j_decompress_ptr cinfo, JSAMPIMAGE output_buf)
DC7 = DC8; DC8 = DC9;
buffer_ptr++, prev_block_row++, next_block_row++;
output_col += compptr->DCT_h_scaled_size;
- }
- output_ptr += compptr->DCT_v_scaled_size;
- }
- }
-
- if (++(cinfo->output_iMCU_row) < cinfo->total_iMCU_rows)
- return JPEG_ROW_COMPLETED;
- return JPEG_SCAN_COMPLETED;
+ }
+ output_ptr += compptr->DCT_v_scaled_size;
+ }
+ }
+
+ if (++(cinfo->output_iMCU_row) < cinfo->total_iMCU_rows)
+ return JPEG_ROW_COMPLETED;
+ return JPEG_SCAN_COMPLETED;
}
#endif /* BLOCK_SMOOTHING_SUPPORTED */
@@ -675,62 +675,62 @@ decompress_smooth_data (j_decompress_ptr cinfo, JSAMPIMAGE output_buf)
GLOBAL(void)
jinit_d_coef_controller (j_decompress_ptr cinfo, boolean need_full_buffer)
{
- my_coef_ptr coef;
+ my_coef_ptr coef;
- coef = (my_coef_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ coef = (my_coef_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_coef_controller));
- cinfo->coef = (struct jpeg_d_coef_controller *) coef;
- coef->pub.start_input_pass = start_input_pass;
- coef->pub.start_output_pass = start_output_pass;
+ cinfo->coef = (struct jpeg_d_coef_controller *) coef;
+ coef->pub.start_input_pass = start_input_pass;
+ coef->pub.start_output_pass = start_output_pass;
#ifdef BLOCK_SMOOTHING_SUPPORTED
- coef->coef_bits_latch = NULL;
+ coef->coef_bits_latch = NULL;
#endif
- /* Create the coefficient buffer. */
- if (need_full_buffer) {
+ /* Create the coefficient buffer. */
+ if (need_full_buffer) {
#ifdef D_MULTISCAN_FILES_SUPPORTED
- /* Allocate a full-image virtual array for each component, */
- /* padded to a multiple of samp_factor DCT blocks in each direction. */
- /* Note we ask for a pre-zeroed array. */
- int ci, access_rows;
- jpeg_component_info *compptr;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- access_rows = compptr->v_samp_factor;
+ /* Allocate a full-image virtual array for each component, */
+ /* padded to a multiple of samp_factor DCT blocks in each direction. */
+ /* Note we ask for a pre-zeroed array. */
+ int ci, access_rows;
+ jpeg_component_info *compptr;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ access_rows = compptr->v_samp_factor;
#ifdef BLOCK_SMOOTHING_SUPPORTED
- /* If block smoothing could be used, need a bigger window */
- if (cinfo->progressive_mode)
+ /* If block smoothing could be used, need a bigger window */
+ if (cinfo->progressive_mode)
access_rows *= 3;
#endif
- coef->whole_image[ci] = (*cinfo->mem->request_virt_barray)
+ coef->whole_image[ci] = (*cinfo->mem->request_virt_barray)
((j_common_ptr) cinfo, JPOOL_IMAGE, TRUE,
- (JDIMENSION) jround_up((long) compptr->width_in_blocks,
+ (JDIMENSION) jround_up((long) compptr->width_in_blocks,
(long) compptr->h_samp_factor),
- (JDIMENSION) jround_up((long) compptr->height_in_blocks,
+ (JDIMENSION) jround_up((long) compptr->height_in_blocks,
(long) compptr->v_samp_factor),
- (JDIMENSION) access_rows);
- }
- coef->pub.consume_data = consume_data;
- coef->pub.decompress_data = decompress_data;
- coef->pub.coef_arrays = coef->whole_image; /* link to virtual arrays */
+ (JDIMENSION) access_rows);
+ }
+ coef->pub.consume_data = consume_data;
+ coef->pub.decompress_data = decompress_data;
+ coef->pub.coef_arrays = coef->whole_image; /* link to virtual arrays */
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif
- } else {
- /* We only need a single-MCU buffer. */
- JBLOCKROW buffer;
- int i;
-
- buffer = (JBLOCKROW)
- (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- D_MAX_BLOCKS_IN_MCU * SIZEOF(JBLOCK));
- for (i = 0; i < D_MAX_BLOCKS_IN_MCU; i++) {
- coef->MCU_buffer[i] = buffer + i;
- }
- coef->pub.consume_data = dummy_consume_data;
- coef->pub.decompress_data = decompress_onepass;
- coef->pub.coef_arrays = NULL; /* flag for no virtual arrays */
- }
+ } else {
+ /* We only need a single-MCU buffer. */
+ JBLOCKROW buffer;
+ int i;
+
+ buffer = (JBLOCKROW)
+ (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ D_MAX_BLOCKS_IN_MCU * SIZEOF(JBLOCK));
+ for (i = 0; i < D_MAX_BLOCKS_IN_MCU; i++) {
+ coef->MCU_buffer[i] = buffer + i;
+ }
+ coef->pub.consume_data = dummy_consume_data;
+ coef->pub.decompress_data = decompress_onepass;
+ coef->pub.coef_arrays = NULL; /* flag for no virtual arrays */
+ }
}
diff --git a/src/lib/libjpeg/jdcolor.c b/src/lib/libjpeg/jdcolor.c
index 66c219529e3..47fd9254900 100644
--- a/src/lib/libjpeg/jdcolor.c
+++ b/src/lib/libjpeg/jdcolor.c
@@ -16,13 +16,13 @@
/* Private subobject */
typedef struct {
- struct jpeg_color_deconverter pub; /* public fields */
+ struct jpeg_color_deconverter pub; /* public fields */
- /* Private state for YCC->RGB conversion */
- int * Cr_r_tab; /* => table for Cr to R conversion */
- int * Cb_b_tab; /* => table for Cb to B conversion */
- INT32 * Cr_g_tab; /* => table for Cr to G conversion */
- INT32 * Cb_g_tab; /* => table for Cb to G conversion */
+ /* Private state for YCC->RGB conversion */
+ int * Cr_r_tab; /* => table for Cr to R conversion */
+ int * Cb_b_tab; /* => table for Cb to B conversion */
+ INT32 * Cr_g_tab; /* => table for Cr to G conversion */
+ INT32 * Cb_g_tab; /* => table for Cb to G conversion */
} my_color_deconverter;
typedef my_color_deconverter * my_cconvert_ptr;
@@ -57,9 +57,9 @@ typedef my_color_deconverter * my_cconvert_ptr;
* together before rounding.
*/
-#define SCALEBITS 16 /* speediest right-shift on some machines */
-#define ONE_HALF ((INT32) 1 << (SCALEBITS-1))
-#define FIX(x) ((INT32) ((x) * (1L<<SCALEBITS) + 0.5))
+#define SCALEBITS 16 /* speediest right-shift on some machines */
+#define ONE_HALF ((INT32) 1 << (SCALEBITS-1))
+#define FIX(x) ((INT32) ((x) * (1L<<SCALEBITS) + 0.5))
/*
@@ -69,39 +69,39 @@ typedef my_color_deconverter * my_cconvert_ptr;
LOCAL(void)
build_ycc_rgb_table (j_decompress_ptr cinfo)
{
- my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
- int i;
- INT32 x;
- SHIFT_TEMPS
+ my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
+ int i;
+ INT32 x;
+ SHIFT_TEMPS
- cconvert->Cr_r_tab = (int *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cconvert->Cr_r_tab = (int *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(int));
- cconvert->Cb_b_tab = (int *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cconvert->Cb_b_tab = (int *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(int));
- cconvert->Cr_g_tab = (INT32 *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cconvert->Cr_g_tab = (INT32 *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(INT32));
- cconvert->Cb_g_tab = (INT32 *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cconvert->Cb_g_tab = (INT32 *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(INT32));
- for (i = 0, x = -CENTERJSAMPLE; i <= MAXJSAMPLE; i++, x++) {
- /* i is the actual input pixel value, in the range 0..MAXJSAMPLE */
- /* The Cb or Cr value we are thinking of is x = i - CENTERJSAMPLE */
- /* Cr=>R value is nearest int to 1.40200 * x */
- cconvert->Cr_r_tab[i] = (int)
- RIGHT_SHIFT(FIX(1.40200) * x + ONE_HALF, SCALEBITS);
- /* Cb=>B value is nearest int to 1.77200 * x */
- cconvert->Cb_b_tab[i] = (int)
- RIGHT_SHIFT(FIX(1.77200) * x + ONE_HALF, SCALEBITS);
- /* Cr=>G value is scaled-up -0.71414 * x */
- cconvert->Cr_g_tab[i] = (- FIX(0.71414)) * x;
- /* Cb=>G value is scaled-up -0.34414 * x */
- /* We also add in ONE_HALF so that need not do it in inner loop */
- cconvert->Cb_g_tab[i] = (- FIX(0.34414)) * x + ONE_HALF;
- }
+ for (i = 0, x = -CENTERJSAMPLE; i <= MAXJSAMPLE; i++, x++) {
+ /* i is the actual input pixel value, in the range 0..MAXJSAMPLE */
+ /* The Cb or Cr value we are thinking of is x = i - CENTERJSAMPLE */
+ /* Cr=>R value is nearest int to 1.40200 * x */
+ cconvert->Cr_r_tab[i] = (int)
+ RIGHT_SHIFT(FIX(1.40200) * x + ONE_HALF, SCALEBITS);
+ /* Cb=>B value is nearest int to 1.77200 * x */
+ cconvert->Cb_b_tab[i] = (int)
+ RIGHT_SHIFT(FIX(1.77200) * x + ONE_HALF, SCALEBITS);
+ /* Cr=>G value is scaled-up -0.71414 * x */
+ cconvert->Cr_g_tab[i] = (- FIX(0.71414)) * x;
+ /* Cb=>G value is scaled-up -0.34414 * x */
+ /* We also add in ONE_HALF so that need not do it in inner loop */
+ cconvert->Cb_g_tab[i] = (- FIX(0.34414)) * x + ONE_HALF;
+ }
}
@@ -118,42 +118,42 @@ build_ycc_rgb_table (j_decompress_ptr cinfo)
METHODDEF(void)
ycc_rgb_convert (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION input_row,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPIMAGE input_buf, JDIMENSION input_row,
+ JSAMPARRAY output_buf, int num_rows)
{
- my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
- register int y, cb, cr;
- register JSAMPROW outptr;
- register JSAMPROW inptr0, inptr1, inptr2;
- register JDIMENSION col;
- JDIMENSION num_cols = cinfo->output_width;
- /* copy these pointers into registers if possible */
- register JSAMPLE * range_limit = cinfo->sample_range_limit;
- register int * Crrtab = cconvert->Cr_r_tab;
- register int * Cbbtab = cconvert->Cb_b_tab;
- register INT32 * Crgtab = cconvert->Cr_g_tab;
- register INT32 * Cbgtab = cconvert->Cb_g_tab;
- SHIFT_TEMPS
-
- while (--num_rows >= 0) {
- inptr0 = input_buf[0][input_row];
- inptr1 = input_buf[1][input_row];
- inptr2 = input_buf[2][input_row];
- input_row++;
- outptr = *output_buf++;
- for (col = 0; col < num_cols; col++) {
- y = GETJSAMPLE(inptr0[col]);
- cb = GETJSAMPLE(inptr1[col]);
- cr = GETJSAMPLE(inptr2[col]);
- /* Range-limiting is essential due to noise introduced by DCT losses. */
- outptr[RGB_RED] = range_limit[y + Crrtab[cr]];
- outptr[RGB_GREEN] = range_limit[y +
- ((int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr],
- SCALEBITS))];
- outptr[RGB_BLUE] = range_limit[y + Cbbtab[cb]];
- outptr += RGB_PIXELSIZE;
- }
- }
+ my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
+ register int y, cb, cr;
+ register JSAMPROW outptr;
+ register JSAMPROW inptr0, inptr1, inptr2;
+ register JDIMENSION col;
+ JDIMENSION num_cols = cinfo->output_width;
+ /* copy these pointers into registers if possible */
+ register JSAMPLE * range_limit = cinfo->sample_range_limit;
+ register int * Crrtab = cconvert->Cr_r_tab;
+ register int * Cbbtab = cconvert->Cb_b_tab;
+ register INT32 * Crgtab = cconvert->Cr_g_tab;
+ register INT32 * Cbgtab = cconvert->Cb_g_tab;
+ SHIFT_TEMPS
+
+ while (--num_rows >= 0) {
+ inptr0 = input_buf[0][input_row];
+ inptr1 = input_buf[1][input_row];
+ inptr2 = input_buf[2][input_row];
+ input_row++;
+ outptr = *output_buf++;
+ for (col = 0; col < num_cols; col++) {
+ y = GETJSAMPLE(inptr0[col]);
+ cb = GETJSAMPLE(inptr1[col]);
+ cr = GETJSAMPLE(inptr2[col]);
+ /* Range-limiting is essential due to noise introduced by DCT losses. */
+ outptr[RGB_RED] = range_limit[y + Crrtab[cr]];
+ outptr[RGB_GREEN] = range_limit[y +
+ ((int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr],
+ SCALEBITS))];
+ outptr[RGB_BLUE] = range_limit[y + Cbbtab[cb]];
+ outptr += RGB_PIXELSIZE;
+ }
+ }
}
@@ -167,27 +167,27 @@ ycc_rgb_convert (j_decompress_ptr cinfo,
METHODDEF(void)
null_convert (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION input_row,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPIMAGE input_buf, JDIMENSION input_row,
+ JSAMPARRAY output_buf, int num_rows)
{
- register JSAMPROW inptr, outptr;
- register JDIMENSION count;
- register int num_components = cinfo->num_components;
- JDIMENSION num_cols = cinfo->output_width;
- int ci;
-
- while (--num_rows >= 0) {
- for (ci = 0; ci < num_components; ci++) {
- inptr = input_buf[ci][input_row];
- outptr = output_buf[0] + ci;
- for (count = num_cols; count > 0; count--) {
- *outptr = *inptr++; /* needn't bother with GETJSAMPLE() here */
+ register JSAMPROW inptr, outptr;
+ register JDIMENSION count;
+ register int num_components = cinfo->num_components;
+ JDIMENSION num_cols = cinfo->output_width;
+ int ci;
+
+ while (--num_rows >= 0) {
+ for (ci = 0; ci < num_components; ci++) {
+ inptr = input_buf[ci][input_row];
+ outptr = output_buf[0] + ci;
+ for (count = num_cols; count > 0; count--) {
+ *outptr = *inptr++; /* needn't bother with GETJSAMPLE() here */
outptr += num_components;
- }
- }
- input_row++;
- output_buf++;
- }
+ }
+ }
+ input_row++;
+ output_buf++;
+ }
}
@@ -199,11 +199,11 @@ null_convert (j_decompress_ptr cinfo,
METHODDEF(void)
grayscale_convert (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION input_row,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPIMAGE input_buf, JDIMENSION input_row,
+ JSAMPARRAY output_buf, int num_rows)
{
- jcopy_sample_rows(input_buf[0], (int) input_row, output_buf, 0,
- num_rows, cinfo->output_width);
+ jcopy_sample_rows(input_buf[0], (int) input_row, output_buf, 0,
+ num_rows, cinfo->output_width);
}
@@ -215,22 +215,22 @@ grayscale_convert (j_decompress_ptr cinfo,
METHODDEF(void)
gray_rgb_convert (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION input_row,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPIMAGE input_buf, JDIMENSION input_row,
+ JSAMPARRAY output_buf, int num_rows)
{
- register JSAMPROW inptr, outptr;
- register JDIMENSION col;
- JDIMENSION num_cols = cinfo->output_width;
-
- while (--num_rows >= 0) {
- inptr = input_buf[0][input_row++];
- outptr = *output_buf++;
- for (col = 0; col < num_cols; col++) {
- /* We can dispense with GETJSAMPLE() here */
- outptr[RGB_RED] = outptr[RGB_GREEN] = outptr[RGB_BLUE] = inptr[col];
- outptr += RGB_PIXELSIZE;
- }
- }
+ register JSAMPROW inptr, outptr;
+ register JDIMENSION col;
+ JDIMENSION num_cols = cinfo->output_width;
+
+ while (--num_rows >= 0) {
+ inptr = input_buf[0][input_row++];
+ outptr = *output_buf++;
+ for (col = 0; col < num_cols; col++) {
+ /* We can dispense with GETJSAMPLE() here */
+ outptr[RGB_RED] = outptr[RGB_GREEN] = outptr[RGB_BLUE] = inptr[col];
+ outptr += RGB_PIXELSIZE;
+ }
+ }
}
@@ -243,45 +243,45 @@ gray_rgb_convert (j_decompress_ptr cinfo,
METHODDEF(void)
ycck_cmyk_convert (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION input_row,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPIMAGE input_buf, JDIMENSION input_row,
+ JSAMPARRAY output_buf, int num_rows)
{
- my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
- register int y, cb, cr;
- register JSAMPROW outptr;
- register JSAMPROW inptr0, inptr1, inptr2, inptr3;
- register JDIMENSION col;
- JDIMENSION num_cols = cinfo->output_width;
- /* copy these pointers into registers if possible */
- register JSAMPLE * range_limit = cinfo->sample_range_limit;
- register int * Crrtab = cconvert->Cr_r_tab;
- register int * Cbbtab = cconvert->Cb_b_tab;
- register INT32 * Crgtab = cconvert->Cr_g_tab;
- register INT32 * Cbgtab = cconvert->Cb_g_tab;
- SHIFT_TEMPS
-
- while (--num_rows >= 0) {
- inptr0 = input_buf[0][input_row];
- inptr1 = input_buf[1][input_row];
- inptr2 = input_buf[2][input_row];
- inptr3 = input_buf[3][input_row];
- input_row++;
- outptr = *output_buf++;
- for (col = 0; col < num_cols; col++) {
- y = GETJSAMPLE(inptr0[col]);
- cb = GETJSAMPLE(inptr1[col]);
- cr = GETJSAMPLE(inptr2[col]);
- /* Range-limiting is essential due to noise introduced by DCT losses. */
- outptr[0] = range_limit[MAXJSAMPLE - (y + Crrtab[cr])]; /* red */
- outptr[1] = range_limit[MAXJSAMPLE - (y + /* green */
- ((int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr],
- SCALEBITS)))];
- outptr[2] = range_limit[MAXJSAMPLE - (y + Cbbtab[cb])]; /* blue */
- /* K passes through unchanged */
- outptr[3] = inptr3[col]; /* don't need GETJSAMPLE here */
- outptr += 4;
- }
- }
+ my_cconvert_ptr cconvert = (my_cconvert_ptr) cinfo->cconvert;
+ register int y, cb, cr;
+ register JSAMPROW outptr;
+ register JSAMPROW inptr0, inptr1, inptr2, inptr3;
+ register JDIMENSION col;
+ JDIMENSION num_cols = cinfo->output_width;
+ /* copy these pointers into registers if possible */
+ register JSAMPLE * range_limit = cinfo->sample_range_limit;
+ register int * Crrtab = cconvert->Cr_r_tab;
+ register int * Cbbtab = cconvert->Cb_b_tab;
+ register INT32 * Crgtab = cconvert->Cr_g_tab;
+ register INT32 * Cbgtab = cconvert->Cb_g_tab;
+ SHIFT_TEMPS
+
+ while (--num_rows >= 0) {
+ inptr0 = input_buf[0][input_row];
+ inptr1 = input_buf[1][input_row];
+ inptr2 = input_buf[2][input_row];
+ inptr3 = input_buf[3][input_row];
+ input_row++;
+ outptr = *output_buf++;
+ for (col = 0; col < num_cols; col++) {
+ y = GETJSAMPLE(inptr0[col]);
+ cb = GETJSAMPLE(inptr1[col]);
+ cr = GETJSAMPLE(inptr2[col]);
+ /* Range-limiting is essential due to noise introduced by DCT losses. */
+ outptr[0] = range_limit[MAXJSAMPLE - (y + Crrtab[cr])]; /* red */
+ outptr[1] = range_limit[MAXJSAMPLE - (y + /* green */
+ ((int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr],
+ SCALEBITS)))];
+ outptr[2] = range_limit[MAXJSAMPLE - (y + Cbbtab[cb])]; /* blue */
+ /* K passes through unchanged */
+ outptr[3] = inptr3[col]; /* don't need GETJSAMPLE here */
+ outptr += 4;
+ }
+ }
}
@@ -292,7 +292,7 @@ ycck_cmyk_convert (j_decompress_ptr cinfo,
METHODDEF(void)
start_pass_dcolor (j_decompress_ptr cinfo)
{
- /* no work needed */
+ /* no work needed */
}
@@ -303,94 +303,94 @@ start_pass_dcolor (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_color_deconverter (j_decompress_ptr cinfo)
{
- my_cconvert_ptr cconvert;
- int ci;
+ my_cconvert_ptr cconvert;
+ int ci;
- cconvert = (my_cconvert_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cconvert = (my_cconvert_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_color_deconverter));
- cinfo->cconvert = (struct jpeg_color_deconverter *) cconvert;
- cconvert->pub.start_pass = start_pass_dcolor;
-
- /* Make sure num_components agrees with jpeg_color_space */
- switch (cinfo->jpeg_color_space) {
- case JCS_GRAYSCALE:
- if (cinfo->num_components != 1)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- break;
-
- case JCS_RGB:
- case JCS_YCbCr:
- if (cinfo->num_components != 3)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- break;
-
- case JCS_CMYK:
- case JCS_YCCK:
- if (cinfo->num_components != 4)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- break;
-
- default: /* JCS_UNKNOWN can be anything */
- if (cinfo->num_components < 1)
- ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
- break;
- }
-
- /* Set out_color_components and conversion method based on requested space.
- * Also clear the component_needed flags for any unused components,
- * so that earlier pipeline stages can avoid useless computation.
- */
-
- switch (cinfo->out_color_space) {
- case JCS_GRAYSCALE:
- cinfo->out_color_components = 1;
- if (cinfo->jpeg_color_space == JCS_GRAYSCALE ||
+ cinfo->cconvert = (struct jpeg_color_deconverter *) cconvert;
+ cconvert->pub.start_pass = start_pass_dcolor;
+
+ /* Make sure num_components agrees with jpeg_color_space */
+ switch (cinfo->jpeg_color_space) {
+ case JCS_GRAYSCALE:
+ if (cinfo->num_components != 1)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ break;
+
+ case JCS_RGB:
+ case JCS_YCbCr:
+ if (cinfo->num_components != 3)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ break;
+
+ case JCS_CMYK:
+ case JCS_YCCK:
+ if (cinfo->num_components != 4)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ break;
+
+ default: /* JCS_UNKNOWN can be anything */
+ if (cinfo->num_components < 1)
+ ERREXIT(cinfo, JERR_BAD_J_COLORSPACE);
+ break;
+ }
+
+ /* Set out_color_components and conversion method based on requested space.
+ * Also clear the component_needed flags for any unused components,
+ * so that earlier pipeline stages can avoid useless computation.
+ */
+
+ switch (cinfo->out_color_space) {
+ case JCS_GRAYSCALE:
+ cinfo->out_color_components = 1;
+ if (cinfo->jpeg_color_space == JCS_GRAYSCALE ||
cinfo->jpeg_color_space == JCS_YCbCr) {
- cconvert->pub.color_convert = grayscale_convert;
- /* For color->grayscale conversion, only the Y (0) component is needed */
- for (ci = 1; ci < cinfo->num_components; ci++)
+ cconvert->pub.color_convert = grayscale_convert;
+ /* For color->grayscale conversion, only the Y (0) component is needed */
+ for (ci = 1; ci < cinfo->num_components; ci++)
cinfo->comp_info[ci].component_needed = FALSE;
- } else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- case JCS_RGB:
- cinfo->out_color_components = RGB_PIXELSIZE;
- if (cinfo->jpeg_color_space == JCS_YCbCr) {
- cconvert->pub.color_convert = ycc_rgb_convert;
- build_ycc_rgb_table(cinfo);
- } else if (cinfo->jpeg_color_space == JCS_GRAYSCALE) {
- cconvert->pub.color_convert = gray_rgb_convert;
- } else if (cinfo->jpeg_color_space == JCS_RGB && RGB_PIXELSIZE == 3) {
- cconvert->pub.color_convert = null_convert;
- } else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- case JCS_CMYK:
- cinfo->out_color_components = 4;
- if (cinfo->jpeg_color_space == JCS_YCCK) {
- cconvert->pub.color_convert = ycck_cmyk_convert;
- build_ycc_rgb_table(cinfo);
- } else if (cinfo->jpeg_color_space == JCS_CMYK) {
- cconvert->pub.color_convert = null_convert;
- } else
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
-
- default:
- /* Permit null conversion to same output space */
- if (cinfo->out_color_space == cinfo->jpeg_color_space) {
- cinfo->out_color_components = cinfo->num_components;
- cconvert->pub.color_convert = null_convert;
- } else /* unsupported non-null conversion */
- ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
- break;
- }
-
- if (cinfo->quantize_colors)
- cinfo->output_components = 1; /* single colormapped output component */
- else
- cinfo->output_components = cinfo->out_color_components;
+ } else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ case JCS_RGB:
+ cinfo->out_color_components = RGB_PIXELSIZE;
+ if (cinfo->jpeg_color_space == JCS_YCbCr) {
+ cconvert->pub.color_convert = ycc_rgb_convert;
+ build_ycc_rgb_table(cinfo);
+ } else if (cinfo->jpeg_color_space == JCS_GRAYSCALE) {
+ cconvert->pub.color_convert = gray_rgb_convert;
+ } else if (cinfo->jpeg_color_space == JCS_RGB && RGB_PIXELSIZE == 3) {
+ cconvert->pub.color_convert = null_convert;
+ } else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ case JCS_CMYK:
+ cinfo->out_color_components = 4;
+ if (cinfo->jpeg_color_space == JCS_YCCK) {
+ cconvert->pub.color_convert = ycck_cmyk_convert;
+ build_ycc_rgb_table(cinfo);
+ } else if (cinfo->jpeg_color_space == JCS_CMYK) {
+ cconvert->pub.color_convert = null_convert;
+ } else
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+
+ default:
+ /* Permit null conversion to same output space */
+ if (cinfo->out_color_space == cinfo->jpeg_color_space) {
+ cinfo->out_color_components = cinfo->num_components;
+ cconvert->pub.color_convert = null_convert;
+ } else /* unsupported non-null conversion */
+ ERREXIT(cinfo, JERR_CONVERSION_NOTIMPL);
+ break;
+ }
+
+ if (cinfo->quantize_colors)
+ cinfo->output_components = 1; /* single colormapped output component */
+ else
+ cinfo->output_components = cinfo->out_color_components;
}
diff --git a/src/lib/libjpeg/jdct.h b/src/lib/libjpeg/jdct.h
index 832c2cfee38..82573a4f7ca 100644
--- a/src/lib/libjpeg/jdct.h
+++ b/src/lib/libjpeg/jdct.h
@@ -32,17 +32,17 @@
*/
#if BITS_IN_JSAMPLE == 8
-typedef int DCTELEM; /* 16 or 32 bits is fine */
+typedef int DCTELEM; /* 16 or 32 bits is fine */
#else
-typedef INT32 DCTELEM; /* must have 32 bits */
+typedef INT32 DCTELEM; /* must have 32 bits */
#endif
typedef JMETHOD(void, forward_DCT_method_ptr, (DCTELEM * data,
- JSAMPARRAY sample_data,
- JDIMENSION start_col));
+ JSAMPARRAY sample_data,
+ JDIMENSION start_col));
typedef JMETHOD(void, float_DCT_method_ptr, (FAST_FLOAT * data,
- JSAMPARRAY sample_data,
- JDIMENSION start_col));
+ JSAMPARRAY sample_data,
+ JDIMENSION start_col));
/*
@@ -65,10 +65,10 @@ typedef JMETHOD(void, float_DCT_method_ptr, (FAST_FLOAT * data,
typedef MULTIPLIER ISLOW_MULT_TYPE; /* short or int, whichever is faster */
#if BITS_IN_JSAMPLE == 8
typedef MULTIPLIER IFAST_MULT_TYPE; /* 16 bits is OK, use short if faster */
-#define IFAST_SCALE_BITS 2 /* fractional bits in scale factors */
+#define IFAST_SCALE_BITS 2 /* fractional bits in scale factors */
#else
-typedef INT32 IFAST_MULT_TYPE; /* need 32 bits for scaled quantizers */
-#define IFAST_SCALE_BITS 13 /* fractional bits in scale factors */
+typedef INT32 IFAST_MULT_TYPE; /* need 32 bits for scaled quantizers */
+#define IFAST_SCALE_BITS 13 /* fractional bits in scale factors */
#endif
typedef FAST_FLOAT FLOAT_MULT_TYPE; /* preferred floating type */
@@ -90,249 +90,249 @@ typedef FAST_FLOAT FLOAT_MULT_TYPE; /* preferred floating type */
/* Short forms of external names for systems with brain-damaged linkers. */
#ifdef NEED_SHORT_EXTERNAL_NAMES
-#define jpeg_fdct_islow jFDislow
-#define jpeg_fdct_ifast jFDifast
-#define jpeg_fdct_float jFDfloat
-#define jpeg_fdct_7x7 jFD7x7
-#define jpeg_fdct_6x6 jFD6x6
-#define jpeg_fdct_5x5 jFD5x5
-#define jpeg_fdct_4x4 jFD4x4
-#define jpeg_fdct_3x3 jFD3x3
-#define jpeg_fdct_2x2 jFD2x2
-#define jpeg_fdct_1x1 jFD1x1
-#define jpeg_fdct_9x9 jFD9x9
-#define jpeg_fdct_10x10 jFD10x10
-#define jpeg_fdct_11x11 jFD11x11
-#define jpeg_fdct_12x12 jFD12x12
-#define jpeg_fdct_13x13 jFD13x13
-#define jpeg_fdct_14x14 jFD14x14
-#define jpeg_fdct_15x15 jFD15x15
-#define jpeg_fdct_16x16 jFD16x16
-#define jpeg_fdct_16x8 jFD16x8
-#define jpeg_fdct_14x7 jFD14x7
-#define jpeg_fdct_12x6 jFD12x6
-#define jpeg_fdct_10x5 jFD10x5
-#define jpeg_fdct_8x4 jFD8x4
-#define jpeg_fdct_6x3 jFD6x3
-#define jpeg_fdct_4x2 jFD4x2
-#define jpeg_fdct_2x1 jFD2x1
-#define jpeg_fdct_8x16 jFD8x16
-#define jpeg_fdct_7x14 jFD7x14
-#define jpeg_fdct_6x12 jFD6x12
-#define jpeg_fdct_5x10 jFD5x10
-#define jpeg_fdct_4x8 jFD4x8
-#define jpeg_fdct_3x6 jFD3x6
-#define jpeg_fdct_2x4 jFD2x4
-#define jpeg_fdct_1x2 jFD1x2
-#define jpeg_idct_islow jRDislow
-#define jpeg_idct_ifast jRDifast
-#define jpeg_idct_float jRDfloat
-#define jpeg_idct_7x7 jRD7x7
-#define jpeg_idct_6x6 jRD6x6
-#define jpeg_idct_5x5 jRD5x5
-#define jpeg_idct_4x4 jRD4x4
-#define jpeg_idct_3x3 jRD3x3
-#define jpeg_idct_2x2 jRD2x2
-#define jpeg_idct_1x1 jRD1x1
-#define jpeg_idct_9x9 jRD9x9
-#define jpeg_idct_10x10 jRD10x10
-#define jpeg_idct_11x11 jRD11x11
-#define jpeg_idct_12x12 jRD12x12
-#define jpeg_idct_13x13 jRD13x13
-#define jpeg_idct_14x14 jRD14x14
-#define jpeg_idct_15x15 jRD15x15
-#define jpeg_idct_16x16 jRD16x16
-#define jpeg_idct_16x8 jRD16x8
-#define jpeg_idct_14x7 jRD14x7
-#define jpeg_idct_12x6 jRD12x6
-#define jpeg_idct_10x5 jRD10x5
-#define jpeg_idct_8x4 jRD8x4
-#define jpeg_idct_6x3 jRD6x3
-#define jpeg_idct_4x2 jRD4x2
-#define jpeg_idct_2x1 jRD2x1
-#define jpeg_idct_8x16 jRD8x16
-#define jpeg_idct_7x14 jRD7x14
-#define jpeg_idct_6x12 jRD6x12
-#define jpeg_idct_5x10 jRD5x10
-#define jpeg_idct_4x8 jRD4x8
-#define jpeg_idct_3x6 jRD3x8
-#define jpeg_idct_2x4 jRD2x4
-#define jpeg_idct_1x2 jRD1x2
+#define jpeg_fdct_islow jFDislow
+#define jpeg_fdct_ifast jFDifast
+#define jpeg_fdct_float jFDfloat
+#define jpeg_fdct_7x7 jFD7x7
+#define jpeg_fdct_6x6 jFD6x6
+#define jpeg_fdct_5x5 jFD5x5
+#define jpeg_fdct_4x4 jFD4x4
+#define jpeg_fdct_3x3 jFD3x3
+#define jpeg_fdct_2x2 jFD2x2
+#define jpeg_fdct_1x1 jFD1x1
+#define jpeg_fdct_9x9 jFD9x9
+#define jpeg_fdct_10x10 jFD10x10
+#define jpeg_fdct_11x11 jFD11x11
+#define jpeg_fdct_12x12 jFD12x12
+#define jpeg_fdct_13x13 jFD13x13
+#define jpeg_fdct_14x14 jFD14x14
+#define jpeg_fdct_15x15 jFD15x15
+#define jpeg_fdct_16x16 jFD16x16
+#define jpeg_fdct_16x8 jFD16x8
+#define jpeg_fdct_14x7 jFD14x7
+#define jpeg_fdct_12x6 jFD12x6
+#define jpeg_fdct_10x5 jFD10x5
+#define jpeg_fdct_8x4 jFD8x4
+#define jpeg_fdct_6x3 jFD6x3
+#define jpeg_fdct_4x2 jFD4x2
+#define jpeg_fdct_2x1 jFD2x1
+#define jpeg_fdct_8x16 jFD8x16
+#define jpeg_fdct_7x14 jFD7x14
+#define jpeg_fdct_6x12 jFD6x12
+#define jpeg_fdct_5x10 jFD5x10
+#define jpeg_fdct_4x8 jFD4x8
+#define jpeg_fdct_3x6 jFD3x6
+#define jpeg_fdct_2x4 jFD2x4
+#define jpeg_fdct_1x2 jFD1x2
+#define jpeg_idct_islow jRDislow
+#define jpeg_idct_ifast jRDifast
+#define jpeg_idct_float jRDfloat
+#define jpeg_idct_7x7 jRD7x7
+#define jpeg_idct_6x6 jRD6x6
+#define jpeg_idct_5x5 jRD5x5
+#define jpeg_idct_4x4 jRD4x4
+#define jpeg_idct_3x3 jRD3x3
+#define jpeg_idct_2x2 jRD2x2
+#define jpeg_idct_1x1 jRD1x1
+#define jpeg_idct_9x9 jRD9x9
+#define jpeg_idct_10x10 jRD10x10
+#define jpeg_idct_11x11 jRD11x11
+#define jpeg_idct_12x12 jRD12x12
+#define jpeg_idct_13x13 jRD13x13
+#define jpeg_idct_14x14 jRD14x14
+#define jpeg_idct_15x15 jRD15x15
+#define jpeg_idct_16x16 jRD16x16
+#define jpeg_idct_16x8 jRD16x8
+#define jpeg_idct_14x7 jRD14x7
+#define jpeg_idct_12x6 jRD12x6
+#define jpeg_idct_10x5 jRD10x5
+#define jpeg_idct_8x4 jRD8x4
+#define jpeg_idct_6x3 jRD6x3
+#define jpeg_idct_4x2 jRD4x2
+#define jpeg_idct_2x1 jRD2x1
+#define jpeg_idct_8x16 jRD8x16
+#define jpeg_idct_7x14 jRD7x14
+#define jpeg_idct_6x12 jRD6x12
+#define jpeg_idct_5x10 jRD5x10
+#define jpeg_idct_4x8 jRD4x8
+#define jpeg_idct_3x6 jRD3x8
+#define jpeg_idct_2x4 jRD2x4
+#define jpeg_idct_1x2 jRD1x2
#endif /* NEED_SHORT_EXTERNAL_NAMES */
/* Extern declarations for the forward and inverse DCT routines. */
EXTERN(void) jpeg_fdct_islow
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_ifast
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_float
- JPP((FAST_FLOAT * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((FAST_FLOAT * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_7x7
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_6x6
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_5x5
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_4x4
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_3x3
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_2x2
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_1x1
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_9x9
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_10x10
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_11x11
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_12x12
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_13x13
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_14x14
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_15x15
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_16x16
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_16x8
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_14x7
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_12x6
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_10x5
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_8x4
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_6x3
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_4x2
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_2x1
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_8x16
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_7x14
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_6x12
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_5x10
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_4x8
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_3x6
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_2x4
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_fdct_1x2
- JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
+ JPP((DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col));
EXTERN(void) jpeg_idct_islow
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_ifast
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_float
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_7x7
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_6x6
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_5x5
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_4x4
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_3x3
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_2x2
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_1x1
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_9x9
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_10x10
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_11x11
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_12x12
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_13x13
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_14x14
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_15x15
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_16x16
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_16x8
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_14x7
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_12x6
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_10x5
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_8x4
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_6x3
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_4x2
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_2x1
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_8x16
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_7x14
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_6x12
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_5x10
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_4x8
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_3x6
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_2x4
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
EXTERN(void) jpeg_idct_1x2
- JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
+ JPP((j_decompress_ptr cinfo, jpeg_component_info * compptr,
+ JCOEFPTR coef_block, JSAMPARRAY output_buf, JDIMENSION output_col));
/*
@@ -345,7 +345,7 @@ EXTERN(void) jpeg_idct_1x2
* and may differ from one module to the next.
*/
-#define ONE ((INT32) 1)
+#define ONE ((INT32) 1)
#define CONST_SCALE (ONE << CONST_BITS)
/* Convert a positive real constant to an integer scaled by CONST_SCALE.
@@ -353,7 +353,7 @@ EXTERN(void) jpeg_idct_1x2
* thus causing a lot of useless floating-point operations at run time.
*/
-#define FIX(x) ((INT32) ((x) * CONST_SCALE + 0.5))
+#define FIX(x) ((INT32) ((x) * CONST_SCALE + 0.5))
/* Descale and correctly round an INT32 value that's scaled by N bits.
* We assume RIGHT_SHIFT rounds towards minus infinity, so adding
@@ -371,23 +371,23 @@ EXTERN(void) jpeg_idct_1x2
* correct combination of casts.
*/
-#ifdef SHORTxSHORT_32 /* may work if 'int' is 32 bits */
+#ifdef SHORTxSHORT_32 /* may work if 'int' is 32 bits */
#define MULTIPLY16C16(var,const) (((INT16) (var)) * ((INT16) (const)))
#endif
-#ifdef SHORTxLCONST_32 /* known to work with Microsoft C 6.0 */
+#ifdef SHORTxLCONST_32 /* known to work with Microsoft C 6.0 */
#define MULTIPLY16C16(var,const) (((INT16) (var)) * ((INT32) (const)))
#endif
-#ifndef MULTIPLY16C16 /* default definition */
+#ifndef MULTIPLY16C16 /* default definition */
#define MULTIPLY16C16(var,const) ((var) * (const))
#endif
/* Same except both inputs are variables. */
-#ifdef SHORTxSHORT_32 /* may work if 'int' is 32 bits */
+#ifdef SHORTxSHORT_32 /* may work if 'int' is 32 bits */
#define MULTIPLY16V16(var1,var2) (((INT16) (var1)) * ((INT16) (var2)))
#endif
-#ifndef MULTIPLY16V16 /* default definition */
+#ifndef MULTIPLY16V16 /* default definition */
#define MULTIPLY16V16(var1,var2) ((var1) * (var2))
#endif
diff --git a/src/lib/libjpeg/jddctmgr.c b/src/lib/libjpeg/jddctmgr.c
index ecc21beb863..8fe9e41a51d 100644
--- a/src/lib/libjpeg/jddctmgr.c
+++ b/src/lib/libjpeg/jddctmgr.c
@@ -19,7 +19,7 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
/*
@@ -42,14 +42,14 @@
/* Private subobject for this module */
typedef struct {
- struct jpeg_inverse_dct pub; /* public fields */
+ struct jpeg_inverse_dct pub; /* public fields */
- /* This array contains the IDCT method code that each multiplier table
- * is currently set up for, or -1 if it's not yet set up.
- * The actual multiplier tables are pointed to by dct_table in the
- * per-component comp_info structures.
- */
- int cur_method[MAX_COMPONENTS];
+ /* This array contains the IDCT method code that each multiplier table
+ * is currently set up for, or -1 if it's not yet set up.
+ * The actual multiplier tables are pointed to by dct_table in the
+ * per-component comp_info structures.
+ */
+ int cur_method[MAX_COMPONENTS];
} my_idct_controller;
typedef my_idct_controller * my_idct_ptr;
@@ -58,12 +58,12 @@ typedef my_idct_controller * my_idct_ptr;
/* Allocated multiplier tables: big enough for any supported variant */
typedef union {
- ISLOW_MULT_TYPE islow_array[DCTSIZE2];
+ ISLOW_MULT_TYPE islow_array[DCTSIZE2];
#ifdef DCT_IFAST_SUPPORTED
- IFAST_MULT_TYPE ifast_array[DCTSIZE2];
+ IFAST_MULT_TYPE ifast_array[DCTSIZE2];
#endif
#ifdef DCT_FLOAT_SUPPORTED
- FLOAT_MULT_TYPE float_array[DCTSIZE2];
+ FLOAT_MULT_TYPE float_array[DCTSIZE2];
#endif
} multiplier_table;
@@ -89,268 +89,268 @@ typedef union {
METHODDEF(void)
start_pass (j_decompress_ptr cinfo)
{
- my_idct_ptr idct = (my_idct_ptr) cinfo->idct;
- int ci, i;
- jpeg_component_info *compptr;
- int method = 0;
- inverse_DCT_method_ptr method_ptr = NULL;
- JQUANT_TBL * qtbl;
+ my_idct_ptr idct = (my_idct_ptr) cinfo->idct;
+ int ci, i;
+ jpeg_component_info *compptr;
+ int method = 0;
+ inverse_DCT_method_ptr method_ptr = NULL;
+ JQUANT_TBL * qtbl;
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Select the proper IDCT routine for this component's scaling */
- switch ((compptr->DCT_h_scaled_size << 8) + compptr->DCT_v_scaled_size) {
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Select the proper IDCT routine for this component's scaling */
+ switch ((compptr->DCT_h_scaled_size << 8) + compptr->DCT_v_scaled_size) {
#ifdef IDCT_SCALING_SUPPORTED
- case ((1 << 8) + 1):
- method_ptr = jpeg_idct_1x1;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((2 << 8) + 2):
- method_ptr = jpeg_idct_2x2;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((3 << 8) + 3):
- method_ptr = jpeg_idct_3x3;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((4 << 8) + 4):
- method_ptr = jpeg_idct_4x4;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((5 << 8) + 5):
- method_ptr = jpeg_idct_5x5;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((6 << 8) + 6):
- method_ptr = jpeg_idct_6x6;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((7 << 8) + 7):
- method_ptr = jpeg_idct_7x7;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((9 << 8) + 9):
- method_ptr = jpeg_idct_9x9;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((10 << 8) + 10):
- method_ptr = jpeg_idct_10x10;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((11 << 8) + 11):
- method_ptr = jpeg_idct_11x11;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((12 << 8) + 12):
- method_ptr = jpeg_idct_12x12;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((13 << 8) + 13):
- method_ptr = jpeg_idct_13x13;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((14 << 8) + 14):
- method_ptr = jpeg_idct_14x14;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((15 << 8) + 15):
- method_ptr = jpeg_idct_15x15;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((16 << 8) + 16):
- method_ptr = jpeg_idct_16x16;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((16 << 8) + 8):
- method_ptr = jpeg_idct_16x8;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((14 << 8) + 7):
- method_ptr = jpeg_idct_14x7;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((12 << 8) + 6):
- method_ptr = jpeg_idct_12x6;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((10 << 8) + 5):
- method_ptr = jpeg_idct_10x5;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((8 << 8) + 4):
- method_ptr = jpeg_idct_8x4;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((6 << 8) + 3):
- method_ptr = jpeg_idct_6x3;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((4 << 8) + 2):
- method_ptr = jpeg_idct_4x2;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((2 << 8) + 1):
- method_ptr = jpeg_idct_2x1;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((8 << 8) + 16):
- method_ptr = jpeg_idct_8x16;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((7 << 8) + 14):
- method_ptr = jpeg_idct_7x14;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((6 << 8) + 12):
- method_ptr = jpeg_idct_6x12;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((5 << 8) + 10):
- method_ptr = jpeg_idct_5x10;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((4 << 8) + 8):
- method_ptr = jpeg_idct_4x8;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((3 << 8) + 6):
- method_ptr = jpeg_idct_3x6;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((2 << 8) + 4):
- method_ptr = jpeg_idct_2x4;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
- case ((1 << 8) + 2):
- method_ptr = jpeg_idct_1x2;
- method = JDCT_ISLOW; /* jidctint uses islow-style table */
- break;
+ case ((1 << 8) + 1):
+ method_ptr = jpeg_idct_1x1;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((2 << 8) + 2):
+ method_ptr = jpeg_idct_2x2;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((3 << 8) + 3):
+ method_ptr = jpeg_idct_3x3;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((4 << 8) + 4):
+ method_ptr = jpeg_idct_4x4;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((5 << 8) + 5):
+ method_ptr = jpeg_idct_5x5;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((6 << 8) + 6):
+ method_ptr = jpeg_idct_6x6;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((7 << 8) + 7):
+ method_ptr = jpeg_idct_7x7;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((9 << 8) + 9):
+ method_ptr = jpeg_idct_9x9;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((10 << 8) + 10):
+ method_ptr = jpeg_idct_10x10;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((11 << 8) + 11):
+ method_ptr = jpeg_idct_11x11;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((12 << 8) + 12):
+ method_ptr = jpeg_idct_12x12;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((13 << 8) + 13):
+ method_ptr = jpeg_idct_13x13;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((14 << 8) + 14):
+ method_ptr = jpeg_idct_14x14;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((15 << 8) + 15):
+ method_ptr = jpeg_idct_15x15;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((16 << 8) + 16):
+ method_ptr = jpeg_idct_16x16;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((16 << 8) + 8):
+ method_ptr = jpeg_idct_16x8;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((14 << 8) + 7):
+ method_ptr = jpeg_idct_14x7;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((12 << 8) + 6):
+ method_ptr = jpeg_idct_12x6;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((10 << 8) + 5):
+ method_ptr = jpeg_idct_10x5;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((8 << 8) + 4):
+ method_ptr = jpeg_idct_8x4;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((6 << 8) + 3):
+ method_ptr = jpeg_idct_6x3;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((4 << 8) + 2):
+ method_ptr = jpeg_idct_4x2;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((2 << 8) + 1):
+ method_ptr = jpeg_idct_2x1;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((8 << 8) + 16):
+ method_ptr = jpeg_idct_8x16;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((7 << 8) + 14):
+ method_ptr = jpeg_idct_7x14;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((6 << 8) + 12):
+ method_ptr = jpeg_idct_6x12;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((5 << 8) + 10):
+ method_ptr = jpeg_idct_5x10;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((4 << 8) + 8):
+ method_ptr = jpeg_idct_4x8;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((3 << 8) + 6):
+ method_ptr = jpeg_idct_3x6;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((2 << 8) + 4):
+ method_ptr = jpeg_idct_2x4;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
+ case ((1 << 8) + 2):
+ method_ptr = jpeg_idct_1x2;
+ method = JDCT_ISLOW; /* jidctint uses islow-style table */
+ break;
#endif
- case ((DCTSIZE << 8) + DCTSIZE):
- switch (cinfo->dct_method) {
+ case ((DCTSIZE << 8) + DCTSIZE):
+ switch (cinfo->dct_method) {
#ifdef DCT_ISLOW_SUPPORTED
- case JDCT_ISLOW:
+ case JDCT_ISLOW:
method_ptr = jpeg_idct_islow;
method = JDCT_ISLOW;
break;
#endif
#ifdef DCT_IFAST_SUPPORTED
- case JDCT_IFAST:
+ case JDCT_IFAST:
method_ptr = jpeg_idct_ifast;
method = JDCT_IFAST;
break;
#endif
#ifdef DCT_FLOAT_SUPPORTED
- case JDCT_FLOAT:
+ case JDCT_FLOAT:
method_ptr = jpeg_idct_float;
method = JDCT_FLOAT;
break;
#endif
- default:
+ default:
ERREXIT(cinfo, JERR_NOT_COMPILED);
break;
- }
- break;
- default:
- ERREXIT2(cinfo, JERR_BAD_DCTSIZE,
- compptr->DCT_h_scaled_size, compptr->DCT_v_scaled_size);
- break;
- }
- idct->pub.inverse_DCT[ci] = method_ptr;
- /* Create multiplier table from quant table.
- * However, we can skip this if the component is uninteresting
- * or if we already built the table. Also, if no quant table
- * has yet been saved for the component, we leave the
- * multiplier table all-zero; we'll be reading zeroes from the
- * coefficient controller's buffer anyway.
- */
- if (! compptr->component_needed || idct->cur_method[ci] == method)
- continue;
- qtbl = compptr->quant_table;
- if (qtbl == NULL) /* happens if no data yet for component */
- continue;
- idct->cur_method[ci] = method;
- switch (method) {
+ }
+ break;
+ default:
+ ERREXIT2(cinfo, JERR_BAD_DCTSIZE,
+ compptr->DCT_h_scaled_size, compptr->DCT_v_scaled_size);
+ break;
+ }
+ idct->pub.inverse_DCT[ci] = method_ptr;
+ /* Create multiplier table from quant table.
+ * However, we can skip this if the component is uninteresting
+ * or if we already built the table. Also, if no quant table
+ * has yet been saved for the component, we leave the
+ * multiplier table all-zero; we'll be reading zeroes from the
+ * coefficient controller's buffer anyway.
+ */
+ if (! compptr->component_needed || idct->cur_method[ci] == method)
+ continue;
+ qtbl = compptr->quant_table;
+ if (qtbl == NULL) /* happens if no data yet for component */
+ continue;
+ idct->cur_method[ci] = method;
+ switch (method) {
#ifdef PROVIDE_ISLOW_TABLES
- case JDCT_ISLOW:
- {
+ case JDCT_ISLOW:
+ {
/* For LL&M IDCT method, multipliers are equal to raw quantization
- * coefficients, but are stored as ints to ensure access efficiency.
- */
+ * coefficients, but are stored as ints to ensure access efficiency.
+ */
ISLOW_MULT_TYPE * ismtbl = (ISLOW_MULT_TYPE *) compptr->dct_table;
for (i = 0; i < DCTSIZE2; i++) {
- ismtbl[i] = (ISLOW_MULT_TYPE) qtbl->quantval[i];
+ ismtbl[i] = (ISLOW_MULT_TYPE) qtbl->quantval[i];
}
- }
- break;
+ }
+ break;
#endif
#ifdef DCT_IFAST_SUPPORTED
- case JDCT_IFAST:
- {
+ case JDCT_IFAST:
+ {
/* For AA&N IDCT method, multipliers are equal to quantization
- * coefficients scaled by scalefactor[row]*scalefactor[col], where
- * scalefactor[0] = 1
- * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
- * For integer operation, the multiplier table is to be scaled by
- * IFAST_SCALE_BITS.
- */
+ * coefficients scaled by scalefactor[row]*scalefactor[col], where
+ * scalefactor[0] = 1
+ * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
+ * For integer operation, the multiplier table is to be scaled by
+ * IFAST_SCALE_BITS.
+ */
IFAST_MULT_TYPE * ifmtbl = (IFAST_MULT_TYPE *) compptr->dct_table;
#define CONST_BITS 14
static const INT16 aanscales[DCTSIZE2] = {
- /* precomputed values scaled up by 14 bits */
- 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
- 22725, 31521, 29692, 26722, 22725, 17855, 12299, 6270,
- 21407, 29692, 27969, 25172, 21407, 16819, 11585, 5906,
- 19266, 26722, 25172, 22654, 19266, 15137, 10426, 5315,
- 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
- 12873, 17855, 16819, 15137, 12873, 10114, 6967, 3552,
- 8867, 12299, 11585, 10426, 8867, 6967, 4799, 2446,
- 4520, 6270, 5906, 5315, 4520, 3552, 2446, 1247
+ /* precomputed values scaled up by 14 bits */
+ 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
+ 22725, 31521, 29692, 26722, 22725, 17855, 12299, 6270,
+ 21407, 29692, 27969, 25172, 21407, 16819, 11585, 5906,
+ 19266, 26722, 25172, 22654, 19266, 15137, 10426, 5315,
+ 16384, 22725, 21407, 19266, 16384, 12873, 8867, 4520,
+ 12873, 17855, 16819, 15137, 12873, 10114, 6967, 3552,
+ 8867, 12299, 11585, 10426, 8867, 6967, 4799, 2446,
+ 4520, 6270, 5906, 5315, 4520, 3552, 2446, 1247
};
SHIFT_TEMPS
for (i = 0; i < DCTSIZE2; i++) {
- ifmtbl[i] = (IFAST_MULT_TYPE)
- DESCALE(MULTIPLY16V16((INT32) qtbl->quantval[i],
- (INT32) aanscales[i]),
- CONST_BITS-IFAST_SCALE_BITS);
+ ifmtbl[i] = (IFAST_MULT_TYPE)
+ DESCALE(MULTIPLY16V16((INT32) qtbl->quantval[i],
+ (INT32) aanscales[i]),
+ CONST_BITS-IFAST_SCALE_BITS);
}
- }
- break;
+ }
+ break;
#endif
#ifdef DCT_FLOAT_SUPPORTED
- case JDCT_FLOAT:
- {
+ case JDCT_FLOAT:
+ {
/* For float AA&N IDCT method, multipliers are equal to quantization
- * coefficients scaled by scalefactor[row]*scalefactor[col], where
- * scalefactor[0] = 1
- * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
- * We apply a further scale factor of 1/8.
- */
+ * coefficients scaled by scalefactor[row]*scalefactor[col], where
+ * scalefactor[0] = 1
+ * scalefactor[k] = cos(k*PI/16) * sqrt(2) for k=1..7
+ * We apply a further scale factor of 1/8.
+ */
FLOAT_MULT_TYPE * fmtbl = (FLOAT_MULT_TYPE *) compptr->dct_table;
int row, col;
static const double aanscalefactor[DCTSIZE] = {
- 1.0, 1.387039845, 1.306562965, 1.175875602,
- 1.0, 0.785694958, 0.541196100, 0.275899379
+ 1.0, 1.387039845, 1.306562965, 1.175875602,
+ 1.0, 0.785694958, 0.541196100, 0.275899379
};
i = 0;
for (row = 0; row < DCTSIZE; row++) {
- for (col = 0; col < DCTSIZE; col++) {
- fmtbl[i] = (FLOAT_MULT_TYPE)
- ((double) qtbl->quantval[i] *
- aanscalefactor[row] * aanscalefactor[col] * 0.125);
- i++;
- }
+ for (col = 0; col < DCTSIZE; col++) {
+ fmtbl[i] = (FLOAT_MULT_TYPE)
+ ((double) qtbl->quantval[i] *
+ aanscalefactor[row] * aanscalefactor[col] * 0.125);
+ i++;
+ }
}
- }
- break;
+ }
+ break;
#endif
- default:
- ERREXIT(cinfo, JERR_NOT_COMPILED);
- break;
- }
- }
+ default:
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
+ break;
+ }
+ }
}
@@ -361,24 +361,24 @@ start_pass (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_inverse_dct (j_decompress_ptr cinfo)
{
- my_idct_ptr idct;
- int ci;
- jpeg_component_info *compptr;
+ my_idct_ptr idct;
+ int ci;
+ jpeg_component_info *compptr;
- idct = (my_idct_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ idct = (my_idct_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_idct_controller));
- cinfo->idct = (struct jpeg_inverse_dct *) idct;
- idct->pub.start_pass = start_pass;
+ cinfo->idct = (struct jpeg_inverse_dct *) idct;
+ idct->pub.start_pass = start_pass;
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Allocate and pre-zero a multiplier table for each component */
- compptr->dct_table =
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- SIZEOF(multiplier_table));
- MEMZERO(compptr->dct_table, SIZEOF(multiplier_table));
- /* Mark multiplier table not yet set up for any method */
- idct->cur_method[ci] = -1;
- }
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Allocate and pre-zero a multiplier table for each component */
+ compptr->dct_table =
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ SIZEOF(multiplier_table));
+ MEMZERO(compptr->dct_table, SIZEOF(multiplier_table));
+ /* Mark multiplier table not yet set up for any method */
+ idct->cur_method[ci] = -1;
+ }
}
diff --git a/src/lib/libjpeg/jdhuff.c b/src/lib/libjpeg/jdhuff.c
index 8f0581fa172..ef3c9c72201 100644
--- a/src/lib/libjpeg/jdhuff.c
+++ b/src/lib/libjpeg/jdhuff.c
@@ -23,28 +23,28 @@
/* Derived data constructed for each Huffman table */
-#define HUFF_LOOKAHEAD 8 /* # of bits of lookahead */
+#define HUFF_LOOKAHEAD 8 /* # of bits of lookahead */
typedef struct {
- /* Basic tables: (element [0] of each array is unused) */
- INT32 maxcode[18]; /* largest code of length k (-1 if none) */
- /* (maxcode[17] is a sentinel to ensure jpeg_huff_decode terminates) */
- INT32 valoffset[17]; /* huffval[] offset for codes of length k */
- /* valoffset[k] = huffval[] index of 1st symbol of code length k, less
- * the smallest code of length k; so given a code of length k, the
- * corresponding symbol is huffval[code + valoffset[k]]
- */
-
- /* Link to public Huffman table (needed only in jpeg_huff_decode) */
- JHUFF_TBL *pub;
-
- /* Lookahead tables: indexed by the next HUFF_LOOKAHEAD bits of
- * the input data stream. If the next Huffman code is no more
- * than HUFF_LOOKAHEAD bits long, we can obtain its length and
- * the corresponding symbol directly from these tables.
- */
- int look_nbits[1<<HUFF_LOOKAHEAD]; /* # bits, or 0 if too long */
- UINT8 look_sym[1<<HUFF_LOOKAHEAD]; /* symbol, or unused */
+ /* Basic tables: (element [0] of each array is unused) */
+ INT32 maxcode[18]; /* largest code of length k (-1 if none) */
+ /* (maxcode[17] is a sentinel to ensure jpeg_huff_decode terminates) */
+ INT32 valoffset[17]; /* huffval[] offset for codes of length k */
+ /* valoffset[k] = huffval[] index of 1st symbol of code length k, less
+ * the smallest code of length k; so given a code of length k, the
+ * corresponding symbol is huffval[code + valoffset[k]]
+ */
+
+ /* Link to public Huffman table (needed only in jpeg_huff_decode) */
+ JHUFF_TBL *pub;
+
+ /* Lookahead tables: indexed by the next HUFF_LOOKAHEAD bits of
+ * the input data stream. If the next Huffman code is no more
+ * than HUFF_LOOKAHEAD bits long, we can obtain its length and
+ * the corresponding symbol directly from these tables.
+ */
+ int look_nbits[1<<HUFF_LOOKAHEAD]; /* # bits, or 0 if too long */
+ UINT8 look_sym[1<<HUFF_LOOKAHEAD]; /* symbol, or unused */
} d_derived_tbl;
@@ -66,8 +66,8 @@ typedef struct {
* necessary.
*/
-typedef INT32 bit_buf_type; /* type of bit-extraction buffer */
-#define BIT_BUF_SIZE 32 /* size of buffer in bits */
+typedef INT32 bit_buf_type; /* type of bit-extraction buffer */
+#define BIT_BUF_SIZE 32 /* size of buffer in bits */
/* If long is > 32 bits on your machine, and shifting/masking longs is
* reasonably fast, making bit_buf_type be long and setting BIT_BUF_SIZE
@@ -76,23 +76,23 @@ typedef INT32 bit_buf_type; /* type of bit-extraction buffer */
* because not all machines measure sizeof in 8-bit bytes.
*/
-typedef struct { /* Bitreading state saved across MCUs */
- bit_buf_type get_buffer; /* current bit-extraction buffer */
- int bits_left; /* # of unused bits in it */
+typedef struct { /* Bitreading state saved across MCUs */
+ bit_buf_type get_buffer; /* current bit-extraction buffer */
+ int bits_left; /* # of unused bits in it */
} bitread_perm_state;
-typedef struct { /* Bitreading working state within an MCU */
- /* Current data source location */
- /* We need a copy, rather than munging the original, in case of suspension */
- const JOCTET * next_input_byte; /* => next byte to read from source */
- size_t bytes_in_buffer; /* # of bytes remaining in source buffer */
- /* Bit input buffer --- note these values are kept in register variables,
- * not in this struct, inside the inner loops.
- */
- bit_buf_type get_buffer; /* current bit-extraction buffer */
- int bits_left; /* # of unused bits in it */
- /* Pointer needed by jpeg_fill_bit_buffer. */
- j_decompress_ptr cinfo; /* back link to decompress master record */
+typedef struct { /* Bitreading working state within an MCU */
+ /* Current data source location */
+ /* We need a copy, rather than munging the original, in case of suspension */
+ const JOCTET * next_input_byte; /* => next byte to read from source */
+ size_t bytes_in_buffer; /* # of bytes remaining in source buffer */
+ /* Bit input buffer --- note these values are kept in register variables,
+ * not in this struct, inside the inner loops.
+ */
+ bit_buf_type get_buffer; /* current bit-extraction buffer */
+ int bits_left; /* # of unused bits in it */
+ /* Pointer needed by jpeg_fill_bit_buffer. */
+ j_decompress_ptr cinfo; /* back link to decompress master record */
} bitread_working_state;
/* Macros to declare and load/save bitread local variables. */
@@ -134,9 +134,9 @@ typedef struct { /* Bitreading working state within an MCU */
#define CHECK_BIT_BUFFER(state,nbits,action) \
{ if (bits_left < (nbits)) { \
- if (! jpeg_fill_bit_buffer(&(state),get_buffer,bits_left,nbits)) \
- { action; } \
- get_buffer = (state).get_buffer; bits_left = (state).bits_left; } }
+ if (! jpeg_fill_bit_buffer(&(state),get_buffer,bits_left,nbits)) \
+ { action; } \
+ get_buffer = (state).get_buffer; bits_left = (state).bits_left; } }
#define GET_BITS(nbits) \
(((int) (get_buffer >> (bits_left -= (nbits)))) & BIT_MASK(nbits))
@@ -167,24 +167,24 @@ typedef struct { /* Bitreading working state within an MCU */
#define HUFF_DECODE(result,state,htbl,failaction,slowlabel) \
{ register int nb, look; \
- if (bits_left < HUFF_LOOKAHEAD) { \
- if (! jpeg_fill_bit_buffer(&state,get_buffer,bits_left, 0)) {failaction;} \
- get_buffer = state.get_buffer; bits_left = state.bits_left; \
- if (bits_left < HUFF_LOOKAHEAD) { \
- nb = 1; goto slowlabel; \
- } \
- } \
- look = PEEK_BITS(HUFF_LOOKAHEAD); \
- if ((nb = htbl->look_nbits[look]) != 0) { \
- DROP_BITS(nb); \
- result = htbl->look_sym[look]; \
- } else { \
- nb = HUFF_LOOKAHEAD+1; \
+ if (bits_left < HUFF_LOOKAHEAD) { \
+ if (! jpeg_fill_bit_buffer(&state,get_buffer,bits_left, 0)) {failaction;} \
+ get_buffer = state.get_buffer; bits_left = state.bits_left; \
+ if (bits_left < HUFF_LOOKAHEAD) { \
+ nb = 1; goto slowlabel; \
+ } \
+ } \
+ look = PEEK_BITS(HUFF_LOOKAHEAD); \
+ if ((nb = htbl->look_nbits[look]) != 0) { \
+ DROP_BITS(nb); \
+ result = htbl->look_sym[look]; \
+ } else { \
+ nb = HUFF_LOOKAHEAD+1; \
slowlabel: \
- if ((result=jpeg_huff_decode(&state,get_buffer,bits_left,htbl,nb)) < 0) \
+ if ((result=jpeg_huff_decode(&state,get_buffer,bits_left,htbl,nb)) < 0) \
{ failaction; } \
- get_buffer = state.get_buffer; bits_left = state.bits_left; \
- } \
+ get_buffer = state.get_buffer; bits_left = state.bits_left; \
+ } \
}
@@ -196,8 +196,8 @@ slowlabel: \
*/
typedef struct {
- unsigned int EOBRUN; /* remaining EOBs in EOBRUN */
- int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
+ unsigned int EOBRUN; /* remaining EOBs in EOBRUN */
+ int last_dc_val[MAX_COMPS_IN_SCAN]; /* last DC coef for each component */
} savable_state;
/* This macro is to work around compilers with missing or broken
@@ -211,106 +211,106 @@ typedef struct {
#if MAX_COMPS_IN_SCAN == 4
#define ASSIGN_STATE(dest,src) \
((dest).EOBRUN = (src).EOBRUN, \
- (dest).last_dc_val[0] = (src).last_dc_val[0], \
- (dest).last_dc_val[1] = (src).last_dc_val[1], \
- (dest).last_dc_val[2] = (src).last_dc_val[2], \
- (dest).last_dc_val[3] = (src).last_dc_val[3])
+ (dest).last_dc_val[0] = (src).last_dc_val[0], \
+ (dest).last_dc_val[1] = (src).last_dc_val[1], \
+ (dest).last_dc_val[2] = (src).last_dc_val[2], \
+ (dest).last_dc_val[3] = (src).last_dc_val[3])
#endif
#endif
typedef struct {
- struct jpeg_entropy_decoder pub; /* public fields */
+ struct jpeg_entropy_decoder pub; /* public fields */
- /* These fields are loaded into local variables at start of each MCU.
- * In case of suspension, we exit WITHOUT updating them.
- */
- bitread_perm_state bitstate; /* Bit buffer at start of MCU */
- savable_state saved; /* Other state at start of MCU */
+ /* These fields are loaded into local variables at start of each MCU.
+ * In case of suspension, we exit WITHOUT updating them.
+ */
+ bitread_perm_state bitstate; /* Bit buffer at start of MCU */
+ savable_state saved; /* Other state at start of MCU */
- /* These fields are NOT loaded into local working state. */
- boolean insufficient_data; /* set TRUE after emitting warning */
- unsigned int restarts_to_go; /* MCUs left in this restart interval */
+ /* These fields are NOT loaded into local working state. */
+ boolean insufficient_data; /* set TRUE after emitting warning */
+ unsigned int restarts_to_go; /* MCUs left in this restart interval */
- /* Following two fields used only in progressive mode */
+ /* Following two fields used only in progressive mode */
- /* Pointers to derived tables (these workspaces have image lifespan) */
- d_derived_tbl * derived_tbls[NUM_HUFF_TBLS];
+ /* Pointers to derived tables (these workspaces have image lifespan) */
+ d_derived_tbl * derived_tbls[NUM_HUFF_TBLS];
- d_derived_tbl * ac_derived_tbl; /* active table during an AC scan */
+ d_derived_tbl * ac_derived_tbl; /* active table during an AC scan */
- /* Following fields used only in sequential mode */
+ /* Following fields used only in sequential mode */
- /* Pointers to derived tables (these workspaces have image lifespan) */
- d_derived_tbl * dc_derived_tbls[NUM_HUFF_TBLS];
- d_derived_tbl * ac_derived_tbls[NUM_HUFF_TBLS];
+ /* Pointers to derived tables (these workspaces have image lifespan) */
+ d_derived_tbl * dc_derived_tbls[NUM_HUFF_TBLS];
+ d_derived_tbl * ac_derived_tbls[NUM_HUFF_TBLS];
- /* Precalculated info set up by start_pass for use in decode_mcu: */
+ /* Precalculated info set up by start_pass for use in decode_mcu: */
- /* Pointers to derived tables to be used for each block within an MCU */
- d_derived_tbl * dc_cur_tbls[D_MAX_BLOCKS_IN_MCU];
- d_derived_tbl * ac_cur_tbls[D_MAX_BLOCKS_IN_MCU];
- /* Whether we care about the DC and AC coefficient values for each block */
- int coef_limit[D_MAX_BLOCKS_IN_MCU];
+ /* Pointers to derived tables to be used for each block within an MCU */
+ d_derived_tbl * dc_cur_tbls[D_MAX_BLOCKS_IN_MCU];
+ d_derived_tbl * ac_cur_tbls[D_MAX_BLOCKS_IN_MCU];
+ /* Whether we care about the DC and AC coefficient values for each block */
+ int coef_limit[D_MAX_BLOCKS_IN_MCU];
} huff_entropy_decoder;
typedef huff_entropy_decoder * huff_entropy_ptr;
static const int jpeg_zigzag_order[8][8] = {
- { 0, 1, 5, 6, 14, 15, 27, 28 },
- { 2, 4, 7, 13, 16, 26, 29, 42 },
- { 3, 8, 12, 17, 25, 30, 41, 43 },
- { 9, 11, 18, 24, 31, 40, 44, 53 },
- { 10, 19, 23, 32, 39, 45, 52, 54 },
- { 20, 22, 33, 38, 46, 51, 55, 60 },
- { 21, 34, 37, 47, 50, 56, 59, 61 },
- { 35, 36, 48, 49, 57, 58, 62, 63 }
+ { 0, 1, 5, 6, 14, 15, 27, 28 },
+ { 2, 4, 7, 13, 16, 26, 29, 42 },
+ { 3, 8, 12, 17, 25, 30, 41, 43 },
+ { 9, 11, 18, 24, 31, 40, 44, 53 },
+ { 10, 19, 23, 32, 39, 45, 52, 54 },
+ { 20, 22, 33, 38, 46, 51, 55, 60 },
+ { 21, 34, 37, 47, 50, 56, 59, 61 },
+ { 35, 36, 48, 49, 57, 58, 62, 63 }
};
static const int jpeg_zigzag_order7[7][7] = {
- { 0, 1, 5, 6, 14, 15, 27 },
- { 2, 4, 7, 13, 16, 26, 28 },
- { 3, 8, 12, 17, 25, 29, 38 },
- { 9, 11, 18, 24, 30, 37, 39 },
- { 10, 19, 23, 31, 36, 40, 45 },
- { 20, 22, 32, 35, 41, 44, 46 },
- { 21, 33, 34, 42, 43, 47, 48 }
+ { 0, 1, 5, 6, 14, 15, 27 },
+ { 2, 4, 7, 13, 16, 26, 28 },
+ { 3, 8, 12, 17, 25, 29, 38 },
+ { 9, 11, 18, 24, 30, 37, 39 },
+ { 10, 19, 23, 31, 36, 40, 45 },
+ { 20, 22, 32, 35, 41, 44, 46 },
+ { 21, 33, 34, 42, 43, 47, 48 }
};
static const int jpeg_zigzag_order6[6][6] = {
- { 0, 1, 5, 6, 14, 15 },
- { 2, 4, 7, 13, 16, 25 },
- { 3, 8, 12, 17, 24, 26 },
- { 9, 11, 18, 23, 27, 32 },
- { 10, 19, 22, 28, 31, 33 },
- { 20, 21, 29, 30, 34, 35 }
+ { 0, 1, 5, 6, 14, 15 },
+ { 2, 4, 7, 13, 16, 25 },
+ { 3, 8, 12, 17, 24, 26 },
+ { 9, 11, 18, 23, 27, 32 },
+ { 10, 19, 22, 28, 31, 33 },
+ { 20, 21, 29, 30, 34, 35 }
};
static const int jpeg_zigzag_order5[5][5] = {
- { 0, 1, 5, 6, 14 },
- { 2, 4, 7, 13, 15 },
- { 3, 8, 12, 16, 21 },
- { 9, 11, 17, 20, 22 },
- { 10, 18, 19, 23, 24 }
+ { 0, 1, 5, 6, 14 },
+ { 2, 4, 7, 13, 15 },
+ { 3, 8, 12, 16, 21 },
+ { 9, 11, 17, 20, 22 },
+ { 10, 18, 19, 23, 24 }
};
static const int jpeg_zigzag_order4[4][4] = {
- { 0, 1, 5, 6 },
- { 2, 4, 7, 12 },
- { 3, 8, 11, 13 },
- { 9, 10, 14, 15 }
+ { 0, 1, 5, 6 },
+ { 2, 4, 7, 12 },
+ { 3, 8, 11, 13 },
+ { 9, 10, 14, 15 }
};
static const int jpeg_zigzag_order3[3][3] = {
- { 0, 1, 5 },
- { 2, 4, 6 },
- { 3, 7, 8 }
+ { 0, 1, 5 },
+ { 2, 4, 6 },
+ { 3, 7, 8 }
};
static const int jpeg_zigzag_order2[2][2] = {
- { 0, 1 },
- { 2, 3 }
+ { 0, 1 },
+ { 2, 3 }
};
@@ -321,122 +321,122 @@ static const int jpeg_zigzag_order2[2][2] = {
LOCAL(void)
jpeg_make_d_derived_tbl (j_decompress_ptr cinfo, boolean isDC, int tblno,
- d_derived_tbl ** pdtbl)
+ d_derived_tbl ** pdtbl)
{
- JHUFF_TBL *htbl;
- d_derived_tbl *dtbl;
- int p, i, l, si, numsymbols;
- int lookbits, ctr;
- char huffsize[257];
- unsigned int huffcode[257];
- unsigned int code;
-
- /* Note that huffsize[] and huffcode[] are filled in code-length order,
- * paralleling the order of the symbols themselves in htbl->huffval[].
- */
-
- /* Find the input Huffman table */
- if (tblno < 0 || tblno >= NUM_HUFF_TBLS)
- ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
- htbl =
- isDC ? cinfo->dc_huff_tbl_ptrs[tblno] : cinfo->ac_huff_tbl_ptrs[tblno];
- if (htbl == NULL)
- ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
-
- /* Allocate a workspace if we haven't already done so. */
- if (*pdtbl == NULL)
- *pdtbl = (d_derived_tbl *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- SIZEOF(d_derived_tbl));
- dtbl = *pdtbl;
- dtbl->pub = htbl; /* fill in back link */
-
- /* Figure C.1: make table of Huffman code length for each symbol */
-
- p = 0;
- for (l = 1; l <= 16; l++) {
- i = (int) htbl->bits[l];
- if (i < 0 || p + i > 256) /* protect against table overrun */
- ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
- while (i--)
- huffsize[p++] = (char) l;
- }
- huffsize[p] = 0;
- numsymbols = p;
-
- /* Figure C.2: generate the codes themselves */
- /* We also validate that the counts represent a legal Huffman code tree. */
-
- code = 0;
- si = huffsize[0];
- p = 0;
- while (huffsize[p]) {
- while (((int) huffsize[p]) == si) {
- huffcode[p++] = code;
- code++;
- }
- /* code is now 1 more than the last code used for codelength si; but
- * it must still fit in si bits, since no code is allowed to be all ones.
- */
- if (((INT32) code) >= (((INT32) 1) << si))
- ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
- code <<= 1;
- si++;
- }
-
- /* Figure F.15: generate decoding tables for bit-sequential decoding */
-
- p = 0;
- for (l = 1; l <= 16; l++) {
- if (htbl->bits[l]) {
- /* valoffset[l] = huffval[] index of 1st symbol of code length l,
- * minus the minimum code of length l
- */
- dtbl->valoffset[l] = (INT32) p - (INT32) huffcode[p];
- p += htbl->bits[l];
- dtbl->maxcode[l] = huffcode[p-1]; /* maximum code of length l */
- } else {
- dtbl->maxcode[l] = -1; /* -1 if no codes of this length */
- }
- }
- dtbl->maxcode[17] = 0xFFFFFL; /* ensures jpeg_huff_decode terminates */
-
- /* Compute lookahead tables to speed up decoding.
- * First we set all the table entries to 0, indicating "too long";
- * then we iterate through the Huffman codes that are short enough and
- * fill in all the entries that correspond to bit sequences starting
- * with that code.
- */
-
- MEMZERO(dtbl->look_nbits, SIZEOF(dtbl->look_nbits));
-
- p = 0;
- for (l = 1; l <= HUFF_LOOKAHEAD; l++) {
- for (i = 1; i <= (int) htbl->bits[l]; i++, p++) {
- /* l = current code's length, p = its index in huffcode[] & huffval[]. */
- /* Generate left-justified code followed by all possible bit sequences */
- lookbits = huffcode[p] << (HUFF_LOOKAHEAD-l);
- for (ctr = 1 << (HUFF_LOOKAHEAD-l); ctr > 0; ctr--) {
+ JHUFF_TBL *htbl;
+ d_derived_tbl *dtbl;
+ int p, i, l, si, numsymbols;
+ int lookbits, ctr;
+ char huffsize[257];
+ unsigned int huffcode[257];
+ unsigned int code;
+
+ /* Note that huffsize[] and huffcode[] are filled in code-length order,
+ * paralleling the order of the symbols themselves in htbl->huffval[].
+ */
+
+ /* Find the input Huffman table */
+ if (tblno < 0 || tblno >= NUM_HUFF_TBLS)
+ ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
+ htbl =
+ isDC ? cinfo->dc_huff_tbl_ptrs[tblno] : cinfo->ac_huff_tbl_ptrs[tblno];
+ if (htbl == NULL)
+ ERREXIT1(cinfo, JERR_NO_HUFF_TABLE, tblno);
+
+ /* Allocate a workspace if we haven't already done so. */
+ if (*pdtbl == NULL)
+ *pdtbl = (d_derived_tbl *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ SIZEOF(d_derived_tbl));
+ dtbl = *pdtbl;
+ dtbl->pub = htbl; /* fill in back link */
+
+ /* Figure C.1: make table of Huffman code length for each symbol */
+
+ p = 0;
+ for (l = 1; l <= 16; l++) {
+ i = (int) htbl->bits[l];
+ if (i < 0 || p + i > 256) /* protect against table overrun */
+ ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
+ while (i--)
+ huffsize[p++] = (char) l;
+ }
+ huffsize[p] = 0;
+ numsymbols = p;
+
+ /* Figure C.2: generate the codes themselves */
+ /* We also validate that the counts represent a legal Huffman code tree. */
+
+ code = 0;
+ si = huffsize[0];
+ p = 0;
+ while (huffsize[p]) {
+ while (((int) huffsize[p]) == si) {
+ huffcode[p++] = code;
+ code++;
+ }
+ /* code is now 1 more than the last code used for codelength si; but
+ * it must still fit in si bits, since no code is allowed to be all ones.
+ */
+ if (((INT32) code) >= (((INT32) 1) << si))
+ ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
+ code <<= 1;
+ si++;
+ }
+
+ /* Figure F.15: generate decoding tables for bit-sequential decoding */
+
+ p = 0;
+ for (l = 1; l <= 16; l++) {
+ if (htbl->bits[l]) {
+ /* valoffset[l] = huffval[] index of 1st symbol of code length l,
+ * minus the minimum code of length l
+ */
+ dtbl->valoffset[l] = (INT32) p - (INT32) huffcode[p];
+ p += htbl->bits[l];
+ dtbl->maxcode[l] = huffcode[p-1]; /* maximum code of length l */
+ } else {
+ dtbl->maxcode[l] = -1; /* -1 if no codes of this length */
+ }
+ }
+ dtbl->maxcode[17] = 0xFFFFFL; /* ensures jpeg_huff_decode terminates */
+
+ /* Compute lookahead tables to speed up decoding.
+ * First we set all the table entries to 0, indicating "too long";
+ * then we iterate through the Huffman codes that are short enough and
+ * fill in all the entries that correspond to bit sequences starting
+ * with that code.
+ */
+
+ MEMZERO(dtbl->look_nbits, SIZEOF(dtbl->look_nbits));
+
+ p = 0;
+ for (l = 1; l <= HUFF_LOOKAHEAD; l++) {
+ for (i = 1; i <= (int) htbl->bits[l]; i++, p++) {
+ /* l = current code's length, p = its index in huffcode[] & huffval[]. */
+ /* Generate left-justified code followed by all possible bit sequences */
+ lookbits = huffcode[p] << (HUFF_LOOKAHEAD-l);
+ for (ctr = 1 << (HUFF_LOOKAHEAD-l); ctr > 0; ctr--) {
dtbl->look_nbits[lookbits] = l;
dtbl->look_sym[lookbits] = htbl->huffval[p];
lookbits++;
- }
- }
- }
-
- /* Validate symbols as being reasonable.
- * For AC tables, we make no check, but accept all byte values 0..255.
- * For DC tables, we require the symbols to be in range 0..15.
- * (Tighter bounds could be applied depending on the data depth and mode,
- * but this is sufficient to ensure safe decoding.)
- */
- if (isDC) {
- for (i = 0; i < numsymbols; i++) {
- int sym = htbl->huffval[i];
- if (sym < 0 || sym > 15)
+ }
+ }
+ }
+
+ /* Validate symbols as being reasonable.
+ * For AC tables, we make no check, but accept all byte values 0..255.
+ * For DC tables, we require the symbols to be in range 0..15.
+ * (Tighter bounds could be applied depending on the data depth and mode,
+ * but this is sufficient to ensure safe decoding.)
+ */
+ if (isDC) {
+ for (i = 0; i < numsymbols; i++) {
+ int sym = htbl->huffval[i];
+ if (sym < 0 || sym > 15)
ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
- }
- }
+ }
+ }
}
@@ -455,7 +455,7 @@ jpeg_make_d_derived_tbl (j_decompress_ptr cinfo, boolean isDC, int tblno,
*/
#ifdef SLOW_SHIFT_32
-#define MIN_GET_BITS 15 /* minimum allowable value */
+#define MIN_GET_BITS 15 /* minimum allowable value */
#else
#define MIN_GET_BITS (BIT_BUF_SIZE-7)
#endif
@@ -463,102 +463,102 @@ jpeg_make_d_derived_tbl (j_decompress_ptr cinfo, boolean isDC, int tblno,
LOCAL(boolean)
jpeg_fill_bit_buffer (bitread_working_state * state,
- register bit_buf_type get_buffer, register int bits_left,
- int nbits)
+ register bit_buf_type get_buffer, register int bits_left,
+ int nbits)
/* Load up the bit buffer to a depth of at least nbits */
{
- /* Copy heavily used state fields into locals (hopefully registers) */
- register const JOCTET * next_input_byte = state->next_input_byte;
- register size_t bytes_in_buffer = state->bytes_in_buffer;
- j_decompress_ptr cinfo = state->cinfo;
+ /* Copy heavily used state fields into locals (hopefully registers) */
+ register const JOCTET * next_input_byte = state->next_input_byte;
+ register size_t bytes_in_buffer = state->bytes_in_buffer;
+ j_decompress_ptr cinfo = state->cinfo;
- /* Attempt to load at least MIN_GET_BITS bits into get_buffer. */
- /* (It is assumed that no request will be for more than that many bits.) */
- /* We fail to do so only if we hit a marker or are forced to suspend. */
+ /* Attempt to load at least MIN_GET_BITS bits into get_buffer. */
+ /* (It is assumed that no request will be for more than that many bits.) */
+ /* We fail to do so only if we hit a marker or are forced to suspend. */
- if (cinfo->unread_marker == 0) { /* cannot advance past a marker */
- while (bits_left < MIN_GET_BITS) {
- register int c;
+ if (cinfo->unread_marker == 0) { /* cannot advance past a marker */
+ while (bits_left < MIN_GET_BITS) {
+ register int c;
- /* Attempt to read a byte */
- if (bytes_in_buffer == 0) {
+ /* Attempt to read a byte */
+ if (bytes_in_buffer == 0) {
if (! (*cinfo->src->fill_input_buffer) (cinfo))
- return FALSE;
+ return FALSE;
next_input_byte = cinfo->src->next_input_byte;
bytes_in_buffer = cinfo->src->bytes_in_buffer;
- }
- bytes_in_buffer--;
- c = GETJOCTET(*next_input_byte++);
+ }
+ bytes_in_buffer--;
+ c = GETJOCTET(*next_input_byte++);
- /* If it's 0xFF, check and discard stuffed zero byte */
- if (c == 0xFF) {
+ /* If it's 0xFF, check and discard stuffed zero byte */
+ if (c == 0xFF) {
/* Loop here to discard any padding FF's on terminating marker,
- * so that we can save a valid unread_marker value. NOTE: we will
- * accept multiple FF's followed by a 0 as meaning a single FF data
- * byte. This data pattern is not valid according to the standard.
- */
+ * so that we can save a valid unread_marker value. NOTE: we will
+ * accept multiple FF's followed by a 0 as meaning a single FF data
+ * byte. This data pattern is not valid according to the standard.
+ */
do {
- if (bytes_in_buffer == 0) {
- if (! (*cinfo->src->fill_input_buffer) (cinfo))
- return FALSE;
- next_input_byte = cinfo->src->next_input_byte;
- bytes_in_buffer = cinfo->src->bytes_in_buffer;
- }
- bytes_in_buffer--;
- c = GETJOCTET(*next_input_byte++);
+ if (bytes_in_buffer == 0) {
+ if (! (*cinfo->src->fill_input_buffer) (cinfo))
+ return FALSE;
+ next_input_byte = cinfo->src->next_input_byte;
+ bytes_in_buffer = cinfo->src->bytes_in_buffer;
+ }
+ bytes_in_buffer--;
+ c = GETJOCTET(*next_input_byte++);
} while (c == 0xFF);
if (c == 0) {
- /* Found FF/00, which represents an FF data byte */
- c = 0xFF;
+ /* Found FF/00, which represents an FF data byte */
+ c = 0xFF;
} else {
- /* Oops, it's actually a marker indicating end of compressed data.
- * Save the marker code for later use.
- * Fine point: it might appear that we should save the marker into
- * bitread working state, not straight into permanent state. But
- * once we have hit a marker, we cannot need to suspend within the
- * current MCU, because we will read no more bytes from the data
- * source. So it is OK to update permanent state right away.
- */
- cinfo->unread_marker = c;
- /* See if we need to insert some fake zero bits. */
- goto no_more_bytes;
+ /* Oops, it's actually a marker indicating end of compressed data.
+ * Save the marker code for later use.
+ * Fine point: it might appear that we should save the marker into
+ * bitread working state, not straight into permanent state. But
+ * once we have hit a marker, we cannot need to suspend within the
+ * current MCU, because we will read no more bytes from the data
+ * source. So it is OK to update permanent state right away.
+ */
+ cinfo->unread_marker = c;
+ /* See if we need to insert some fake zero bits. */
+ goto no_more_bytes;
}
- }
-
- /* OK, load c into get_buffer */
- get_buffer = (get_buffer << 8) | c;
- bits_left += 8;
- } /* end while */
- } else {
- no_more_bytes:
- /* We get here if we've read the marker that terminates the compressed
- * data segment. There should be enough bits in the buffer register
- * to satisfy the request; if so, no problem.
- */
- if (nbits > bits_left) {
- /* Uh-oh. Report corrupted data to user and stuff zeroes into
- * the data stream, so that we can produce some kind of image.
- * We use a nonvolatile flag to ensure that only one warning message
- * appears per data segment.
- */
- if (! ((huff_entropy_ptr) cinfo->entropy)->insufficient_data) {
+ }
+
+ /* OK, load c into get_buffer */
+ get_buffer = (get_buffer << 8) | c;
+ bits_left += 8;
+ } /* end while */
+ } else {
+ no_more_bytes:
+ /* We get here if we've read the marker that terminates the compressed
+ * data segment. There should be enough bits in the buffer register
+ * to satisfy the request; if so, no problem.
+ */
+ if (nbits > bits_left) {
+ /* Uh-oh. Report corrupted data to user and stuff zeroes into
+ * the data stream, so that we can produce some kind of image.
+ * We use a nonvolatile flag to ensure that only one warning message
+ * appears per data segment.
+ */
+ if (! ((huff_entropy_ptr) cinfo->entropy)->insufficient_data) {
WARNMS(cinfo, JWRN_HIT_MARKER);
((huff_entropy_ptr) cinfo->entropy)->insufficient_data = TRUE;
- }
- /* Fill the buffer with zero bits */
- get_buffer <<= MIN_GET_BITS - bits_left;
- bits_left = MIN_GET_BITS;
- }
- }
-
- /* Unload the local registers */
- state->next_input_byte = next_input_byte;
- state->bytes_in_buffer = bytes_in_buffer;
- state->get_buffer = get_buffer;
- state->bits_left = bits_left;
-
- return TRUE;
+ }
+ /* Fill the buffer with zero bits */
+ get_buffer <<= MIN_GET_BITS - bits_left;
+ bits_left = MIN_GET_BITS;
+ }
+ }
+
+ /* Unload the local registers */
+ state->next_input_byte = next_input_byte;
+ state->bytes_in_buffer = bytes_in_buffer;
+ state->get_buffer = get_buffer;
+ state->bits_left = bits_left;
+
+ return TRUE;
}
@@ -577,9 +577,9 @@ jpeg_fill_bit_buffer (bitread_working_state * state,
#define BIT_MASK(nbits) bmask[nbits]
#define HUFF_EXTEND(x,s) ((x) <= bmask[(s) - 1] ? (x) - bmask[s] : (x))
-static const int bmask[16] = /* bmask[n] is mask for n rightmost bits */
- { 0, 0x0001, 0x0003, 0x0007, 0x000F, 0x001F, 0x003F, 0x007F, 0x00FF,
- 0x01FF, 0x03FF, 0x07FF, 0x0FFF, 0x1FFF, 0x3FFF, 0x7FFF };
+static const int bmask[16] = /* bmask[n] is mask for n rightmost bits */
+ { 0, 0x0001, 0x0003, 0x0007, 0x000F, 0x001F, 0x003F, 0x007F, 0x00FF,
+ 0x01FF, 0x03FF, 0x07FF, 0x0FFF, 0x1FFF, 0x3FFF, 0x7FFF };
#endif /* AVOID_TABLES */
@@ -590,40 +590,40 @@ static const int bmask[16] = /* bmask[n] is mask for n rightmost bits */
LOCAL(int)
jpeg_huff_decode (bitread_working_state * state,
- register bit_buf_type get_buffer, register int bits_left,
- d_derived_tbl * htbl, int min_bits)
+ register bit_buf_type get_buffer, register int bits_left,
+ d_derived_tbl * htbl, int min_bits)
{
- register int l = min_bits;
- register INT32 code;
+ register int l = min_bits;
+ register INT32 code;
- /* HUFF_DECODE has determined that the code is at least min_bits */
- /* bits long, so fetch that many bits in one swoop. */
+ /* HUFF_DECODE has determined that the code is at least min_bits */
+ /* bits long, so fetch that many bits in one swoop. */
- CHECK_BIT_BUFFER(*state, l, return -1);
- code = GET_BITS(l);
+ CHECK_BIT_BUFFER(*state, l, return -1);
+ code = GET_BITS(l);
- /* Collect the rest of the Huffman code one bit at a time. */
- /* This is per Figure F.16 in the JPEG spec. */
+ /* Collect the rest of the Huffman code one bit at a time. */
+ /* This is per Figure F.16 in the JPEG spec. */
- while (code > htbl->maxcode[l]) {
- code <<= 1;
- CHECK_BIT_BUFFER(*state, 1, return -1);
- code |= GET_BITS(1);
- l++;
- }
+ while (code > htbl->maxcode[l]) {
+ code <<= 1;
+ CHECK_BIT_BUFFER(*state, 1, return -1);
+ code |= GET_BITS(1);
+ l++;
+ }
- /* Unload the local registers */
- state->get_buffer = get_buffer;
- state->bits_left = bits_left;
+ /* Unload the local registers */
+ state->get_buffer = get_buffer;
+ state->bits_left = bits_left;
- /* With garbage input we may reach the sentinel value l = 17. */
+ /* With garbage input we may reach the sentinel value l = 17. */
- if (l > 16) {
- WARNMS(state->cinfo, JWRN_HUFF_BAD_CODE);
- return 0; /* fake a zero as the safest result */
- }
+ if (l > 16) {
+ WARNMS(state->cinfo, JWRN_HUFF_BAD_CODE);
+ return 0; /* fake a zero as the safest result */
+ }
- return htbl->pub->huffval[ (int) (code + htbl->valoffset[l]) ];
+ return htbl->pub->huffval[ (int) (code + htbl->valoffset[l]) ];
}
@@ -635,36 +635,36 @@ jpeg_huff_decode (bitread_working_state * state,
LOCAL(boolean)
process_restart (j_decompress_ptr cinfo)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int ci;
-
- /* Throw away any unused bits remaining in bit buffer; */
- /* include any full bytes in next_marker's count of discarded bytes */
- cinfo->marker->discarded_bytes += entropy->bitstate.bits_left / 8;
- entropy->bitstate.bits_left = 0;
-
- /* Advance past the RSTn marker */
- if (! (*cinfo->marker->read_restart_marker) (cinfo))
- return FALSE;
-
- /* Re-initialize DC predictions to 0 */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++)
- entropy->saved.last_dc_val[ci] = 0;
- /* Re-init EOB run count, too */
- entropy->saved.EOBRUN = 0;
-
- /* Reset restart counter */
- entropy->restarts_to_go = cinfo->restart_interval;
-
- /* Reset out-of-data flag, unless read_restart_marker left us smack up
- * against a marker. In that case we will end up treating the next data
- * segment as empty, and we can avoid producing bogus output pixels by
- * leaving the flag set.
- */
- if (cinfo->unread_marker == 0)
- entropy->insufficient_data = FALSE;
-
- return TRUE;
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int ci;
+
+ /* Throw away any unused bits remaining in bit buffer; */
+ /* include any full bytes in next_marker's count of discarded bytes */
+ cinfo->marker->discarded_bytes += entropy->bitstate.bits_left / 8;
+ entropy->bitstate.bits_left = 0;
+
+ /* Advance past the RSTn marker */
+ if (! (*cinfo->marker->read_restart_marker) (cinfo))
+ return FALSE;
+
+ /* Re-initialize DC predictions to 0 */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++)
+ entropy->saved.last_dc_val[ci] = 0;
+ /* Re-init EOB run count, too */
+ entropy->saved.EOBRUN = 0;
+
+ /* Reset restart counter */
+ entropy->restarts_to_go = cinfo->restart_interval;
+
+ /* Reset out-of-data flag, unless read_restart_marker left us smack up
+ * against a marker. In that case we will end up treating the next data
+ * segment as empty, and we can avoid producing bogus output pixels by
+ * leaving the flag set.
+ */
+ if (cinfo->unread_marker == 0)
+ entropy->insufficient_data = FALSE;
+
+ return TRUE;
}
@@ -694,66 +694,66 @@ process_restart (j_decompress_ptr cinfo)
METHODDEF(boolean)
decode_mcu_DC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int Al = cinfo->Al;
- register int s, r;
- int blkn, ci;
- JBLOCKROW block;
- BITREAD_STATE_VARS;
- savable_state state;
- d_derived_tbl * tbl;
- jpeg_component_info * compptr;
-
- /* Process restart marker if needed; may have to suspend */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- if (! process_restart(cinfo))
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int Al = cinfo->Al;
+ register int s, r;
+ int blkn, ci;
+ JBLOCKROW block;
+ BITREAD_STATE_VARS;
+ savable_state state;
+ d_derived_tbl * tbl;
+ jpeg_component_info * compptr;
+
+ /* Process restart marker if needed; may have to suspend */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ if (! process_restart(cinfo))
return FALSE;
- }
+ }
- /* If we've run out of data, just leave the MCU set to zeroes.
- * This way, we return uniform gray for the remainder of the segment.
- */
- if (! entropy->insufficient_data) {
+ /* If we've run out of data, just leave the MCU set to zeroes.
+ * This way, we return uniform gray for the remainder of the segment.
+ */
+ if (! entropy->insufficient_data) {
- /* Load up working state */
- BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
- ASSIGN_STATE(state, entropy->saved);
+ /* Load up working state */
+ BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
+ ASSIGN_STATE(state, entropy->saved);
- /* Outer loop handles each block in the MCU */
+ /* Outer loop handles each block in the MCU */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
- ci = cinfo->MCU_membership[blkn];
- compptr = cinfo->cur_comp_info[ci];
- tbl = entropy->derived_tbls[compptr->dc_tbl_no];
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
+ ci = cinfo->MCU_membership[blkn];
+ compptr = cinfo->cur_comp_info[ci];
+ tbl = entropy->derived_tbls[compptr->dc_tbl_no];
- /* Decode a single block's worth of coefficients */
+ /* Decode a single block's worth of coefficients */
- /* Section F.2.2.1: decode the DC coefficient difference */
- HUFF_DECODE(s, br_state, tbl, return FALSE, label1);
- if (s) {
+ /* Section F.2.2.1: decode the DC coefficient difference */
+ HUFF_DECODE(s, br_state, tbl, return FALSE, label1);
+ if (s) {
CHECK_BIT_BUFFER(br_state, s, return FALSE);
r = GET_BITS(s);
s = HUFF_EXTEND(r, s);
- }
+ }
- /* Convert DC difference to actual value, update last_dc_val */
- s += state.last_dc_val[ci];
- state.last_dc_val[ci] = s;
- /* Scale and output the coefficient (assumes jpeg_natural_order[0]=0) */
- (*block)[0] = (JCOEF) (s << Al);
- }
+ /* Convert DC difference to actual value, update last_dc_val */
+ s += state.last_dc_val[ci];
+ state.last_dc_val[ci] = s;
+ /* Scale and output the coefficient (assumes jpeg_natural_order[0]=0) */
+ (*block)[0] = (JCOEF) (s << Al);
+ }
- /* Completed MCU, so update state */
- BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
- ASSIGN_STATE(entropy->saved, state);
- }
+ /* Completed MCU, so update state */
+ BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
+ ASSIGN_STATE(entropy->saved, state);
+ }
- /* Account for restart interval (no-op if not using restarts) */
- entropy->restarts_to_go--;
+ /* Account for restart interval (no-op if not using restarts) */
+ entropy->restarts_to_go--;
- return TRUE;
+ return TRUE;
}
@@ -765,83 +765,83 @@ decode_mcu_DC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu_AC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- register int s, k, r;
- unsigned int EOBRUN;
- int Se, Al;
- const int * natural_order;
- JBLOCKROW block;
- BITREAD_STATE_VARS;
- d_derived_tbl * tbl;
-
- /* Process restart marker if needed; may have to suspend */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- if (! process_restart(cinfo))
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ register int s, k, r;
+ unsigned int EOBRUN;
+ int Se, Al;
+ const int * natural_order;
+ JBLOCKROW block;
+ BITREAD_STATE_VARS;
+ d_derived_tbl * tbl;
+
+ /* Process restart marker if needed; may have to suspend */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ if (! process_restart(cinfo))
return FALSE;
- }
+ }
- /* If we've run out of data, just leave the MCU set to zeroes.
- * This way, we return uniform gray for the remainder of the segment.
- */
- if (! entropy->insufficient_data) {
+ /* If we've run out of data, just leave the MCU set to zeroes.
+ * This way, we return uniform gray for the remainder of the segment.
+ */
+ if (! entropy->insufficient_data) {
- Se = cinfo->Se;
- Al = cinfo->Al;
- natural_order = cinfo->natural_order;
+ Se = cinfo->Se;
+ Al = cinfo->Al;
+ natural_order = cinfo->natural_order;
- /* Load up working state.
- * We can avoid loading/saving bitread state if in an EOB run.
- */
- EOBRUN = entropy->saved.EOBRUN; /* only part of saved state we need */
+ /* Load up working state.
+ * We can avoid loading/saving bitread state if in an EOB run.
+ */
+ EOBRUN = entropy->saved.EOBRUN; /* only part of saved state we need */
- /* There is always only one block per MCU */
+ /* There is always only one block per MCU */
- if (EOBRUN > 0) /* if it's a band of zeroes... */
- EOBRUN--; /* ...process it now (we do nothing) */
- else {
- BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
- block = MCU_data[0];
- tbl = entropy->ac_derived_tbl;
+ if (EOBRUN > 0) /* if it's a band of zeroes... */
+ EOBRUN--; /* ...process it now (we do nothing) */
+ else {
+ BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
+ block = MCU_data[0];
+ tbl = entropy->ac_derived_tbl;
- for (k = cinfo->Ss; k <= Se; k++) {
+ for (k = cinfo->Ss; k <= Se; k++) {
HUFF_DECODE(s, br_state, tbl, return FALSE, label2);
r = s >> 4;
s &= 15;
if (s) {
- k += r;
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- r = GET_BITS(s);
- s = HUFF_EXTEND(r, s);
- /* Scale and output coefficient in natural (dezigzagged) order */
- (*block)[natural_order[k]] = (JCOEF) (s << Al);
+ k += r;
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ r = GET_BITS(s);
+ s = HUFF_EXTEND(r, s);
+ /* Scale and output coefficient in natural (dezigzagged) order */
+ (*block)[natural_order[k]] = (JCOEF) (s << Al);
} else {
- if (r == 15) { /* ZRL */
- k += 15; /* skip 15 zeroes in band */
- } else { /* EOBr, run length is 2^r + appended bits */
- EOBRUN = 1 << r;
- if (r) { /* EOBr, r > 0 */
- CHECK_BIT_BUFFER(br_state, r, return FALSE);
- r = GET_BITS(r);
- EOBRUN += r;
- }
- EOBRUN--; /* this band is processed at this moment */
- break; /* force end-of-band */
- }
+ if (r == 15) { /* ZRL */
+ k += 15; /* skip 15 zeroes in band */
+ } else { /* EOBr, run length is 2^r + appended bits */
+ EOBRUN = 1 << r;
+ if (r) { /* EOBr, r > 0 */
+ CHECK_BIT_BUFFER(br_state, r, return FALSE);
+ r = GET_BITS(r);
+ EOBRUN += r;
+ }
+ EOBRUN--; /* this band is processed at this moment */
+ break; /* force end-of-band */
+ }
}
- }
+ }
- BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
- }
+ BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
+ }
- /* Completed MCU, so update state */
- entropy->saved.EOBRUN = EOBRUN; /* only part of saved state we need */
- }
+ /* Completed MCU, so update state */
+ entropy->saved.EOBRUN = EOBRUN; /* only part of saved state we need */
+ }
- /* Account for restart interval (no-op if not using restarts) */
- entropy->restarts_to_go--;
+ /* Account for restart interval (no-op if not using restarts) */
+ entropy->restarts_to_go--;
- return TRUE;
+ return TRUE;
}
@@ -854,45 +854,45 @@ decode_mcu_AC_first (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu_DC_refine (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
- int blkn;
- JBLOCKROW block;
- BITREAD_STATE_VARS;
-
- /* Process restart marker if needed; may have to suspend */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- if (! process_restart(cinfo))
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
+ int blkn;
+ JBLOCKROW block;
+ BITREAD_STATE_VARS;
+
+ /* Process restart marker if needed; may have to suspend */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ if (! process_restart(cinfo))
return FALSE;
- }
+ }
- /* Not worth the cycles to check insufficient_data here,
- * since we will not change the data anyway if we read zeroes.
- */
+ /* Not worth the cycles to check insufficient_data here,
+ * since we will not change the data anyway if we read zeroes.
+ */
- /* Load up working state */
- BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
+ /* Load up working state */
+ BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
- /* Outer loop handles each block in the MCU */
+ /* Outer loop handles each block in the MCU */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- block = MCU_data[blkn];
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ block = MCU_data[blkn];
- /* Encoded data is simply the next bit of the two's-complement DC value */
- CHECK_BIT_BUFFER(br_state, 1, return FALSE);
- if (GET_BITS(1))
- (*block)[0] |= p1;
- /* Note: since we use |=, repeating the assignment later is safe */
- }
+ /* Encoded data is simply the next bit of the two's-complement DC value */
+ CHECK_BIT_BUFFER(br_state, 1, return FALSE);
+ if (GET_BITS(1))
+ (*block)[0] |= p1;
+ /* Note: since we use |=, repeating the assignment later is safe */
+ }
- /* Completed MCU, so update state */
- BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
+ /* Completed MCU, so update state */
+ BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
- /* Account for restart interval (no-op if not using restarts) */
- entropy->restarts_to_go--;
+ /* Account for restart interval (no-op if not using restarts) */
+ entropy->restarts_to_go--;
- return TRUE;
+ return TRUE;
}
@@ -903,150 +903,150 @@ decode_mcu_DC_refine (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu_AC_refine (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- register int s, k, r;
- unsigned int EOBRUN;
- int Se, p1, m1;
- const int * natural_order;
- JBLOCKROW block;
- JCOEFPTR thiscoef;
- BITREAD_STATE_VARS;
- d_derived_tbl * tbl;
- int num_newnz;
- int newnz_pos[DCTSIZE2];
-
- /* Process restart marker if needed; may have to suspend */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- if (! process_restart(cinfo))
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ register int s, k, r;
+ unsigned int EOBRUN;
+ int Se, p1, m1;
+ const int * natural_order;
+ JBLOCKROW block;
+ JCOEFPTR thiscoef;
+ BITREAD_STATE_VARS;
+ d_derived_tbl * tbl;
+ int num_newnz;
+ int newnz_pos[DCTSIZE2];
+
+ /* Process restart marker if needed; may have to suspend */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ if (! process_restart(cinfo))
return FALSE;
- }
-
- /* If we've run out of data, don't modify the MCU.
- */
- if (! entropy->insufficient_data) {
-
- Se = cinfo->Se;
- p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
- m1 = (-1) << cinfo->Al; /* -1 in the bit position being coded */
- natural_order = cinfo->natural_order;
-
- /* Load up working state */
- BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
- EOBRUN = entropy->saved.EOBRUN; /* only part of saved state we need */
-
- /* There is always only one block per MCU */
- block = MCU_data[0];
- tbl = entropy->ac_derived_tbl;
-
- /* If we are forced to suspend, we must undo the assignments to any newly
- * nonzero coefficients in the block, because otherwise we'd get confused
- * next time about which coefficients were already nonzero.
- * But we need not undo addition of bits to already-nonzero coefficients;
- * instead, we can test the current bit to see if we already did it.
- */
- num_newnz = 0;
-
- /* initialize coefficient loop counter to start of band */
- k = cinfo->Ss;
-
- if (EOBRUN == 0) {
- for (; k <= Se; k++) {
+ }
+
+ /* If we've run out of data, don't modify the MCU.
+ */
+ if (! entropy->insufficient_data) {
+
+ Se = cinfo->Se;
+ p1 = 1 << cinfo->Al; /* 1 in the bit position being coded */
+ m1 = (-1) << cinfo->Al; /* -1 in the bit position being coded */
+ natural_order = cinfo->natural_order;
+
+ /* Load up working state */
+ BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
+ EOBRUN = entropy->saved.EOBRUN; /* only part of saved state we need */
+
+ /* There is always only one block per MCU */
+ block = MCU_data[0];
+ tbl = entropy->ac_derived_tbl;
+
+ /* If we are forced to suspend, we must undo the assignments to any newly
+ * nonzero coefficients in the block, because otherwise we'd get confused
+ * next time about which coefficients were already nonzero.
+ * But we need not undo addition of bits to already-nonzero coefficients;
+ * instead, we can test the current bit to see if we already did it.
+ */
+ num_newnz = 0;
+
+ /* initialize coefficient loop counter to start of band */
+ k = cinfo->Ss;
+
+ if (EOBRUN == 0) {
+ for (; k <= Se; k++) {
HUFF_DECODE(s, br_state, tbl, goto undoit, label3);
r = s >> 4;
s &= 15;
if (s) {
- if (s != 1) /* size of new coef should always be 1 */
- WARNMS(cinfo, JWRN_HUFF_BAD_CODE);
- CHECK_BIT_BUFFER(br_state, 1, goto undoit);
- if (GET_BITS(1))
- s = p1; /* newly nonzero coef is positive */
- else
- s = m1; /* newly nonzero coef is negative */
+ if (s != 1) /* size of new coef should always be 1 */
+ WARNMS(cinfo, JWRN_HUFF_BAD_CODE);
+ CHECK_BIT_BUFFER(br_state, 1, goto undoit);
+ if (GET_BITS(1))
+ s = p1; /* newly nonzero coef is positive */
+ else
+ s = m1; /* newly nonzero coef is negative */
} else {
- if (r != 15) {
- EOBRUN = 1 << r; /* EOBr, run length is 2^r + appended bits */
- if (r) {
- CHECK_BIT_BUFFER(br_state, r, goto undoit);
- r = GET_BITS(r);
- EOBRUN += r;
- }
- break; /* rest of block is handled by EOB logic */
- }
- /* note s = 0 for processing ZRL */
+ if (r != 15) {
+ EOBRUN = 1 << r; /* EOBr, run length is 2^r + appended bits */
+ if (r) {
+ CHECK_BIT_BUFFER(br_state, r, goto undoit);
+ r = GET_BITS(r);
+ EOBRUN += r;
+ }
+ break; /* rest of block is handled by EOB logic */
+ }
+ /* note s = 0 for processing ZRL */
}
/* Advance over already-nonzero coefs and r still-zero coefs,
- * appending correction bits to the nonzeroes. A correction bit is 1
- * if the absolute value of the coefficient must be increased.
- */
+ * appending correction bits to the nonzeroes. A correction bit is 1
+ * if the absolute value of the coefficient must be increased.
+ */
do {
- thiscoef = *block + natural_order[k];
- if (*thiscoef != 0) {
- CHECK_BIT_BUFFER(br_state, 1, goto undoit);
- if (GET_BITS(1)) {
- if ((*thiscoef & p1) == 0) { /* do nothing if already set it */
+ thiscoef = *block + natural_order[k];
+ if (*thiscoef != 0) {
+ CHECK_BIT_BUFFER(br_state, 1, goto undoit);
+ if (GET_BITS(1)) {
+ if ((*thiscoef & p1) == 0) { /* do nothing if already set it */
if (*thiscoef >= 0)
- *thiscoef += p1;
+ *thiscoef += p1;
else
- *thiscoef += m1;
- }
- }
- } else {
- if (--r < 0)
- break; /* reached target zero coefficient */
- }
- k++;
+ *thiscoef += m1;
+ }
+ }
+ } else {
+ if (--r < 0)
+ break; /* reached target zero coefficient */
+ }
+ k++;
} while (k <= Se);
if (s) {
- int pos = natural_order[k];
- /* Output newly nonzero coefficient */
- (*block)[pos] = (JCOEF) s;
- /* Remember its position in case we have to suspend */
- newnz_pos[num_newnz++] = pos;
+ int pos = natural_order[k];
+ /* Output newly nonzero coefficient */
+ (*block)[pos] = (JCOEF) s;
+ /* Remember its position in case we have to suspend */
+ newnz_pos[num_newnz++] = pos;
+ }
+ }
}
- }
- }
-
- if (EOBRUN > 0) {
- /* Scan any remaining coefficient positions after the end-of-band
- * (the last newly nonzero coefficient, if any). Append a correction
- * bit to each already-nonzero coefficient. A correction bit is 1
- * if the absolute value of the coefficient must be increased.
- */
- for (; k <= Se; k++) {
+
+ if (EOBRUN > 0) {
+ /* Scan any remaining coefficient positions after the end-of-band
+ * (the last newly nonzero coefficient, if any). Append a correction
+ * bit to each already-nonzero coefficient. A correction bit is 1
+ * if the absolute value of the coefficient must be increased.
+ */
+ for (; k <= Se; k++) {
thiscoef = *block + natural_order[k];
if (*thiscoef != 0) {
- CHECK_BIT_BUFFER(br_state, 1, goto undoit);
- if (GET_BITS(1)) {
- if ((*thiscoef & p1) == 0) { /* do nothing if already changed it */
- if (*thiscoef >= 0)
+ CHECK_BIT_BUFFER(br_state, 1, goto undoit);
+ if (GET_BITS(1)) {
+ if ((*thiscoef & p1) == 0) { /* do nothing if already changed it */
+ if (*thiscoef >= 0)
*thiscoef += p1;
- else
+ else
*thiscoef += m1;
- }
- }
+ }
+ }
+ }
+ }
+ /* Count one block completed in EOB run */
+ EOBRUN--;
}
- }
- /* Count one block completed in EOB run */
- EOBRUN--;
- }
- /* Completed MCU, so update state */
- BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
- entropy->saved.EOBRUN = EOBRUN; /* only part of saved state we need */
- }
+ /* Completed MCU, so update state */
+ BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
+ entropy->saved.EOBRUN = EOBRUN; /* only part of saved state we need */
+ }
- /* Account for restart interval (no-op if not using restarts) */
- entropy->restarts_to_go--;
+ /* Account for restart interval (no-op if not using restarts) */
+ entropy->restarts_to_go--;
- return TRUE;
+ return TRUE;
undoit:
- /* Re-zero any output coefficients that we made newly nonzero */
- while (num_newnz > 0)
- (*block)[newnz_pos[--num_newnz]] = 0;
+ /* Re-zero any output coefficients that we made newly nonzero */
+ while (num_newnz > 0)
+ (*block)[newnz_pos[--num_newnz]] = 0;
- return FALSE;
+ return FALSE;
}
@@ -1058,54 +1058,54 @@ undoit:
METHODDEF(boolean)
decode_mcu_sub (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- const int * natural_order;
- int Se, blkn;
- BITREAD_STATE_VARS;
- savable_state state;
-
- /* Process restart marker if needed; may have to suspend */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- if (! process_restart(cinfo))
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ const int * natural_order;
+ int Se, blkn;
+ BITREAD_STATE_VARS;
+ savable_state state;
+
+ /* Process restart marker if needed; may have to suspend */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ if (! process_restart(cinfo))
return FALSE;
- }
+ }
- /* If we've run out of data, just leave the MCU set to zeroes.
- * This way, we return uniform gray for the remainder of the segment.
- */
- if (! entropy->insufficient_data) {
+ /* If we've run out of data, just leave the MCU set to zeroes.
+ * This way, we return uniform gray for the remainder of the segment.
+ */
+ if (! entropy->insufficient_data) {
- natural_order = cinfo->natural_order;
- Se = cinfo->lim_Se;
+ natural_order = cinfo->natural_order;
+ Se = cinfo->lim_Se;
- /* Load up working state */
- BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
- ASSIGN_STATE(state, entropy->saved);
+ /* Load up working state */
+ BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
+ ASSIGN_STATE(state, entropy->saved);
- /* Outer loop handles each block in the MCU */
+ /* Outer loop handles each block in the MCU */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- JBLOCKROW block = MCU_data[blkn];
- d_derived_tbl * htbl;
- register int s, k, r;
- int coef_limit, ci;
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ JBLOCKROW block = MCU_data[blkn];
+ d_derived_tbl * htbl;
+ register int s, k, r;
+ int coef_limit, ci;
- /* Decode a single block's worth of coefficients */
+ /* Decode a single block's worth of coefficients */
- /* Section F.2.2.1: decode the DC coefficient difference */
- htbl = entropy->dc_cur_tbls[blkn];
- HUFF_DECODE(s, br_state, htbl, return FALSE, label1);
+ /* Section F.2.2.1: decode the DC coefficient difference */
+ htbl = entropy->dc_cur_tbls[blkn];
+ HUFF_DECODE(s, br_state, htbl, return FALSE, label1);
- htbl = entropy->ac_cur_tbls[blkn];
- k = 1;
- coef_limit = entropy->coef_limit[blkn];
- if (coef_limit) {
+ htbl = entropy->ac_cur_tbls[blkn];
+ k = 1;
+ coef_limit = entropy->coef_limit[blkn];
+ if (coef_limit) {
/* Convert DC difference to actual value, update last_dc_val */
if (s) {
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- r = GET_BITS(s);
- s = HUFF_EXTEND(r, s);
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ r = GET_BITS(s);
+ s = HUFF_EXTEND(r, s);
}
ci = cinfo->MCU_membership[blkn];
s += state.last_dc_val[ci];
@@ -1116,65 +1116,65 @@ decode_mcu_sub (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
/* Section F.2.2.2: decode the AC coefficients */
/* Since zeroes are skipped, output area must be cleared beforehand */
for (; k < coef_limit; k++) {
- HUFF_DECODE(s, br_state, htbl, return FALSE, label2);
-
- r = s >> 4;
- s &= 15;
-
- if (s) {
- k += r;
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- r = GET_BITS(s);
- s = HUFF_EXTEND(r, s);
- /* Output coefficient in natural (dezigzagged) order.
- * Note: the extra entries in natural_order[] will save us
- * if k > Se, which could happen if the data is corrupted.
- */
- (*block)[natural_order[k]] = (JCOEF) s;
- } else {
- if (r != 15)
- goto EndOfBlock;
- k += 15;
- }
+ HUFF_DECODE(s, br_state, htbl, return FALSE, label2);
+
+ r = s >> 4;
+ s &= 15;
+
+ if (s) {
+ k += r;
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ r = GET_BITS(s);
+ s = HUFF_EXTEND(r, s);
+ /* Output coefficient in natural (dezigzagged) order.
+ * Note: the extra entries in natural_order[] will save us
+ * if k > Se, which could happen if the data is corrupted.
+ */
+ (*block)[natural_order[k]] = (JCOEF) s;
+ } else {
+ if (r != 15)
+ goto EndOfBlock;
+ k += 15;
+ }
}
- } else {
+ } else {
if (s) {
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- DROP_BITS(s);
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ DROP_BITS(s);
}
- }
+ }
- /* Section F.2.2.2: decode the AC coefficients */
- /* In this path we just discard the values */
- for (; k <= Se; k++) {
+ /* Section F.2.2.2: decode the AC coefficients */
+ /* In this path we just discard the values */
+ for (; k <= Se; k++) {
HUFF_DECODE(s, br_state, htbl, return FALSE, label3);
r = s >> 4;
s &= 15;
if (s) {
- k += r;
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- DROP_BITS(s);
+ k += r;
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ DROP_BITS(s);
} else {
- if (r != 15)
- break;
- k += 15;
+ if (r != 15)
+ break;
+ k += 15;
}
- }
+ }
- EndOfBlock: ;
- }
+ EndOfBlock: ;
+ }
- /* Completed MCU, so update state */
- BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
- ASSIGN_STATE(entropy->saved, state);
- }
+ /* Completed MCU, so update state */
+ BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
+ ASSIGN_STATE(entropy->saved, state);
+ }
- /* Account for restart interval (no-op if not using restarts) */
- entropy->restarts_to_go--;
+ /* Account for restart interval (no-op if not using restarts) */
+ entropy->restarts_to_go--;
- return TRUE;
+ return TRUE;
}
@@ -1186,50 +1186,50 @@ decode_mcu_sub (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(boolean)
decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int blkn;
- BITREAD_STATE_VARS;
- savable_state state;
-
- /* Process restart marker if needed; may have to suspend */
- if (cinfo->restart_interval) {
- if (entropy->restarts_to_go == 0)
- if (! process_restart(cinfo))
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int blkn;
+ BITREAD_STATE_VARS;
+ savable_state state;
+
+ /* Process restart marker if needed; may have to suspend */
+ if (cinfo->restart_interval) {
+ if (entropy->restarts_to_go == 0)
+ if (! process_restart(cinfo))
return FALSE;
- }
+ }
- /* If we've run out of data, just leave the MCU set to zeroes.
- * This way, we return uniform gray for the remainder of the segment.
- */
- if (! entropy->insufficient_data) {
+ /* If we've run out of data, just leave the MCU set to zeroes.
+ * This way, we return uniform gray for the remainder of the segment.
+ */
+ if (! entropy->insufficient_data) {
- /* Load up working state */
- BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
- ASSIGN_STATE(state, entropy->saved);
+ /* Load up working state */
+ BITREAD_LOAD_STATE(cinfo,entropy->bitstate);
+ ASSIGN_STATE(state, entropy->saved);
- /* Outer loop handles each block in the MCU */
+ /* Outer loop handles each block in the MCU */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- JBLOCKROW block = MCU_data[blkn];
- d_derived_tbl * htbl;
- register int s, k, r;
- int coef_limit, ci;
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ JBLOCKROW block = MCU_data[blkn];
+ d_derived_tbl * htbl;
+ register int s, k, r;
+ int coef_limit, ci;
- /* Decode a single block's worth of coefficients */
+ /* Decode a single block's worth of coefficients */
- /* Section F.2.2.1: decode the DC coefficient difference */
- htbl = entropy->dc_cur_tbls[blkn];
- HUFF_DECODE(s, br_state, htbl, return FALSE, label1);
+ /* Section F.2.2.1: decode the DC coefficient difference */
+ htbl = entropy->dc_cur_tbls[blkn];
+ HUFF_DECODE(s, br_state, htbl, return FALSE, label1);
- htbl = entropy->ac_cur_tbls[blkn];
- k = 1;
- coef_limit = entropy->coef_limit[blkn];
- if (coef_limit) {
+ htbl = entropy->ac_cur_tbls[blkn];
+ k = 1;
+ coef_limit = entropy->coef_limit[blkn];
+ if (coef_limit) {
/* Convert DC difference to actual value, update last_dc_val */
if (s) {
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- r = GET_BITS(s);
- s = HUFF_EXTEND(r, s);
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ r = GET_BITS(s);
+ s = HUFF_EXTEND(r, s);
}
ci = cinfo->MCU_membership[blkn];
s += state.last_dc_val[ci];
@@ -1240,65 +1240,65 @@ decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
/* Section F.2.2.2: decode the AC coefficients */
/* Since zeroes are skipped, output area must be cleared beforehand */
for (; k < coef_limit; k++) {
- HUFF_DECODE(s, br_state, htbl, return FALSE, label2);
-
- r = s >> 4;
- s &= 15;
-
- if (s) {
- k += r;
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- r = GET_BITS(s);
- s = HUFF_EXTEND(r, s);
- /* Output coefficient in natural (dezigzagged) order.
- * Note: the extra entries in jpeg_natural_order[] will save us
- * if k >= DCTSIZE2, which could happen if the data is corrupted.
- */
- (*block)[jpeg_natural_order[k]] = (JCOEF) s;
- } else {
- if (r != 15)
- goto EndOfBlock;
- k += 15;
- }
+ HUFF_DECODE(s, br_state, htbl, return FALSE, label2);
+
+ r = s >> 4;
+ s &= 15;
+
+ if (s) {
+ k += r;
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ r = GET_BITS(s);
+ s = HUFF_EXTEND(r, s);
+ /* Output coefficient in natural (dezigzagged) order.
+ * Note: the extra entries in jpeg_natural_order[] will save us
+ * if k >= DCTSIZE2, which could happen if the data is corrupted.
+ */
+ (*block)[jpeg_natural_order[k]] = (JCOEF) s;
+ } else {
+ if (r != 15)
+ goto EndOfBlock;
+ k += 15;
+ }
}
- } else {
+ } else {
if (s) {
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- DROP_BITS(s);
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ DROP_BITS(s);
}
- }
+ }
- /* Section F.2.2.2: decode the AC coefficients */
- /* In this path we just discard the values */
- for (; k < DCTSIZE2; k++) {
+ /* Section F.2.2.2: decode the AC coefficients */
+ /* In this path we just discard the values */
+ for (; k < DCTSIZE2; k++) {
HUFF_DECODE(s, br_state, htbl, return FALSE, label3);
r = s >> 4;
s &= 15;
if (s) {
- k += r;
- CHECK_BIT_BUFFER(br_state, s, return FALSE);
- DROP_BITS(s);
+ k += r;
+ CHECK_BIT_BUFFER(br_state, s, return FALSE);
+ DROP_BITS(s);
} else {
- if (r != 15)
- break;
- k += 15;
+ if (r != 15)
+ break;
+ k += 15;
}
- }
+ }
- EndOfBlock: ;
- }
+ EndOfBlock: ;
+ }
- /* Completed MCU, so update state */
- BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
- ASSIGN_STATE(entropy->saved, state);
- }
+ /* Completed MCU, so update state */
+ BITREAD_SAVE_STATE(cinfo,entropy->bitstate);
+ ASSIGN_STATE(entropy->saved, state);
+ }
- /* Account for restart interval (no-op if not using restarts) */
- entropy->restarts_to_go--;
+ /* Account for restart interval (no-op if not using restarts) */
+ entropy->restarts_to_go--;
- return TRUE;
+ return TRUE;
}
@@ -1309,195 +1309,195 @@ decode_mcu (j_decompress_ptr cinfo, JBLOCKROW *MCU_data)
METHODDEF(void)
start_pass_huff_decoder (j_decompress_ptr cinfo)
{
- huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
- int ci, blkn, tbl, i;
- jpeg_component_info * compptr;
-
- if (cinfo->progressive_mode) {
- /* Validate progressive scan parameters */
- if (cinfo->Ss == 0) {
- if (cinfo->Se != 0)
+ huff_entropy_ptr entropy = (huff_entropy_ptr) cinfo->entropy;
+ int ci, blkn, tbl, i;
+ jpeg_component_info * compptr;
+
+ if (cinfo->progressive_mode) {
+ /* Validate progressive scan parameters */
+ if (cinfo->Ss == 0) {
+ if (cinfo->Se != 0)
goto bad;
- } else {
- /* need not check Ss/Se < 0 since they came from unsigned bytes */
- if (cinfo->Se < cinfo->Ss || cinfo->Se > cinfo->lim_Se)
+ } else {
+ /* need not check Ss/Se < 0 since they came from unsigned bytes */
+ if (cinfo->Se < cinfo->Ss || cinfo->Se > cinfo->lim_Se)
goto bad;
- /* AC scans may have only one component */
- if (cinfo->comps_in_scan != 1)
+ /* AC scans may have only one component */
+ if (cinfo->comps_in_scan != 1)
goto bad;
- }
- if (cinfo->Ah != 0) {
- /* Successive approximation refinement scan: must have Al = Ah-1. */
- if (cinfo->Ah-1 != cinfo->Al)
+ }
+ if (cinfo->Ah != 0) {
+ /* Successive approximation refinement scan: must have Al = Ah-1. */
+ if (cinfo->Ah-1 != cinfo->Al)
goto bad;
- }
- if (cinfo->Al > 13) { /* need not check for < 0 */
- /* Arguably the maximum Al value should be less than 13 for 8-bit precision,
- * but the spec doesn't say so, and we try to be liberal about what we
- * accept. Note: large Al values could result in out-of-range DC
- * coefficients during early scans, leading to bizarre displays due to
- * overflows in the IDCT math. But we won't crash.
- */
- bad:
- ERREXIT4(cinfo, JERR_BAD_PROGRESSION,
- cinfo->Ss, cinfo->Se, cinfo->Ah, cinfo->Al);
- }
- /* Update progression status, and verify that scan order is legal.
- * Note that inter-scan inconsistencies are treated as warnings
- * not fatal errors ... not clear if this is right way to behave.
- */
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- int coefi, cindex = cinfo->cur_comp_info[ci]->component_index;
- int *coef_bit_ptr = & cinfo->coef_bits[cindex][0];
- if (cinfo->Ss && coef_bit_ptr[0] < 0) /* AC without prior DC scan */
+ }
+ if (cinfo->Al > 13) { /* need not check for < 0 */
+ /* Arguably the maximum Al value should be less than 13 for 8-bit precision,
+ * but the spec doesn't say so, and we try to be liberal about what we
+ * accept. Note: large Al values could result in out-of-range DC
+ * coefficients during early scans, leading to bizarre displays due to
+ * overflows in the IDCT math. But we won't crash.
+ */
+ bad:
+ ERREXIT4(cinfo, JERR_BAD_PROGRESSION,
+ cinfo->Ss, cinfo->Se, cinfo->Ah, cinfo->Al);
+ }
+ /* Update progression status, and verify that scan order is legal.
+ * Note that inter-scan inconsistencies are treated as warnings
+ * not fatal errors ... not clear if this is right way to behave.
+ */
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ int coefi, cindex = cinfo->cur_comp_info[ci]->component_index;
+ int *coef_bit_ptr = & cinfo->coef_bits[cindex][0];
+ if (cinfo->Ss && coef_bit_ptr[0] < 0) /* AC without prior DC scan */
WARNMS2(cinfo, JWRN_BOGUS_PROGRESSION, cindex, 0);
- for (coefi = cinfo->Ss; coefi <= cinfo->Se; coefi++) {
+ for (coefi = cinfo->Ss; coefi <= cinfo->Se; coefi++) {
int expected = (coef_bit_ptr[coefi] < 0) ? 0 : coef_bit_ptr[coefi];
if (cinfo->Ah != expected)
- WARNMS2(cinfo, JWRN_BOGUS_PROGRESSION, cindex, coefi);
+ WARNMS2(cinfo, JWRN_BOGUS_PROGRESSION, cindex, coefi);
coef_bit_ptr[coefi] = cinfo->Al;
- }
- }
+ }
+ }
- /* Select MCU decoding routine */
- if (cinfo->Ah == 0) {
- if (cinfo->Ss == 0)
+ /* Select MCU decoding routine */
+ if (cinfo->Ah == 0) {
+ if (cinfo->Ss == 0)
entropy->pub.decode_mcu = decode_mcu_DC_first;
- else
+ else
entropy->pub.decode_mcu = decode_mcu_AC_first;
- } else {
- if (cinfo->Ss == 0)
+ } else {
+ if (cinfo->Ss == 0)
entropy->pub.decode_mcu = decode_mcu_DC_refine;
- else
+ else
entropy->pub.decode_mcu = decode_mcu_AC_refine;
- }
-
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* Make sure requested tables are present, and compute derived tables.
- * We may build same derived table more than once, but it's not expensive.
- */
- if (cinfo->Ss == 0) {
- if (cinfo->Ah == 0) { /* DC refinement needs no table */
- tbl = compptr->dc_tbl_no;
- jpeg_make_d_derived_tbl(cinfo, TRUE, tbl,
- & entropy->derived_tbls[tbl]);
}
- } else {
+
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* Make sure requested tables are present, and compute derived tables.
+ * We may build same derived table more than once, but it's not expensive.
+ */
+ if (cinfo->Ss == 0) {
+ if (cinfo->Ah == 0) { /* DC refinement needs no table */
+ tbl = compptr->dc_tbl_no;
+ jpeg_make_d_derived_tbl(cinfo, TRUE, tbl,
+ & entropy->derived_tbls[tbl]);
+ }
+ } else {
tbl = compptr->ac_tbl_no;
jpeg_make_d_derived_tbl(cinfo, FALSE, tbl,
& entropy->derived_tbls[tbl]);
/* remember the single active table */
entropy->ac_derived_tbl = entropy->derived_tbls[tbl];
- }
- /* Initialize DC predictions to 0 */
- entropy->saved.last_dc_val[ci] = 0;
- }
-
- /* Initialize private state variables */
- entropy->saved.EOBRUN = 0;
- } else {
- /* Check that the scan parameters Ss, Se, Ah/Al are OK for sequential JPEG.
- * This ought to be an error condition, but we make it a warning because
- * there are some baseline files out there with all zeroes in these bytes.
- */
- if (cinfo->Ss != 0 || cinfo->Ah != 0 || cinfo->Al != 0 ||
+ }
+ /* Initialize DC predictions to 0 */
+ entropy->saved.last_dc_val[ci] = 0;
+ }
+
+ /* Initialize private state variables */
+ entropy->saved.EOBRUN = 0;
+ } else {
+ /* Check that the scan parameters Ss, Se, Ah/Al are OK for sequential JPEG.
+ * This ought to be an error condition, but we make it a warning because
+ * there are some baseline files out there with all zeroes in these bytes.
+ */
+ if (cinfo->Ss != 0 || cinfo->Ah != 0 || cinfo->Al != 0 ||
((cinfo->is_baseline || cinfo->Se < DCTSIZE2) &&
cinfo->Se != cinfo->lim_Se))
- WARNMS(cinfo, JWRN_NOT_SEQUENTIAL);
-
- /* Select MCU decoding routine */
- /* We retain the hard-coded case for full-size blocks.
- * This is not necessary, but it appears that this version is slightly
- * more performant in the given implementation.
- * With an improved implementation we would prefer a single optimized
- * function.
- */
- if (cinfo->lim_Se != DCTSIZE2-1)
- entropy->pub.decode_mcu = decode_mcu_sub;
- else
- entropy->pub.decode_mcu = decode_mcu;
-
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* Compute derived values for Huffman tables */
- /* We may do this more than once for a table, but it's not expensive */
- tbl = compptr->dc_tbl_no;
- jpeg_make_d_derived_tbl(cinfo, TRUE, tbl,
- & entropy->dc_derived_tbls[tbl]);
- if (cinfo->lim_Se) { /* AC needs no table when not present */
+ WARNMS(cinfo, JWRN_NOT_SEQUENTIAL);
+
+ /* Select MCU decoding routine */
+ /* We retain the hard-coded case for full-size blocks.
+ * This is not necessary, but it appears that this version is slightly
+ * more performant in the given implementation.
+ * With an improved implementation we would prefer a single optimized
+ * function.
+ */
+ if (cinfo->lim_Se != DCTSIZE2-1)
+ entropy->pub.decode_mcu = decode_mcu_sub;
+ else
+ entropy->pub.decode_mcu = decode_mcu;
+
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* Compute derived values for Huffman tables */
+ /* We may do this more than once for a table, but it's not expensive */
+ tbl = compptr->dc_tbl_no;
+ jpeg_make_d_derived_tbl(cinfo, TRUE, tbl,
+ & entropy->dc_derived_tbls[tbl]);
+ if (cinfo->lim_Se) { /* AC needs no table when not present */
tbl = compptr->ac_tbl_no;
jpeg_make_d_derived_tbl(cinfo, FALSE, tbl,
& entropy->ac_derived_tbls[tbl]);
- }
- /* Initialize DC predictions to 0 */
- entropy->saved.last_dc_val[ci] = 0;
- }
-
- /* Precalculate decoding info for each block in an MCU of this scan */
- for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
- ci = cinfo->MCU_membership[blkn];
- compptr = cinfo->cur_comp_info[ci];
- /* Precalculate which table to use for each block */
- entropy->dc_cur_tbls[blkn] = entropy->dc_derived_tbls[compptr->dc_tbl_no];
- entropy->ac_cur_tbls[blkn] = entropy->ac_derived_tbls[compptr->ac_tbl_no];
- /* Decide whether we really care about the coefficient values */
- if (compptr->component_needed) {
+ }
+ /* Initialize DC predictions to 0 */
+ entropy->saved.last_dc_val[ci] = 0;
+ }
+
+ /* Precalculate decoding info for each block in an MCU of this scan */
+ for (blkn = 0; blkn < cinfo->blocks_in_MCU; blkn++) {
+ ci = cinfo->MCU_membership[blkn];
+ compptr = cinfo->cur_comp_info[ci];
+ /* Precalculate which table to use for each block */
+ entropy->dc_cur_tbls[blkn] = entropy->dc_derived_tbls[compptr->dc_tbl_no];
+ entropy->ac_cur_tbls[blkn] = entropy->ac_derived_tbls[compptr->ac_tbl_no];
+ /* Decide whether we really care about the coefficient values */
+ if (compptr->component_needed) {
ci = compptr->DCT_v_scaled_size;
i = compptr->DCT_h_scaled_size;
switch (cinfo->lim_Se) {
case (1*1-1):
- entropy->coef_limit[blkn] = 1;
- break;
+ entropy->coef_limit[blkn] = 1;
+ break;
case (2*2-1):
- if (ci <= 0 || ci > 2) ci = 2;
- if (i <= 0 || i > 2) i = 2;
- entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order2[ci - 1][i - 1];
- break;
+ if (ci <= 0 || ci > 2) ci = 2;
+ if (i <= 0 || i > 2) i = 2;
+ entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order2[ci - 1][i - 1];
+ break;
case (3*3-1):
- if (ci <= 0 || ci > 3) ci = 3;
- if (i <= 0 || i > 3) i = 3;
- entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order3[ci - 1][i - 1];
- break;
+ if (ci <= 0 || ci > 3) ci = 3;
+ if (i <= 0 || i > 3) i = 3;
+ entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order3[ci - 1][i - 1];
+ break;
case (4*4-1):
- if (ci <= 0 || ci > 4) ci = 4;
- if (i <= 0 || i > 4) i = 4;
- entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order4[ci - 1][i - 1];
- break;
+ if (ci <= 0 || ci > 4) ci = 4;
+ if (i <= 0 || i > 4) i = 4;
+ entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order4[ci - 1][i - 1];
+ break;
case (5*5-1):
- if (ci <= 0 || ci > 5) ci = 5;
- if (i <= 0 || i > 5) i = 5;
- entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order5[ci - 1][i - 1];
- break;
+ if (ci <= 0 || ci > 5) ci = 5;
+ if (i <= 0 || i > 5) i = 5;
+ entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order5[ci - 1][i - 1];
+ break;
case (6*6-1):
- if (ci <= 0 || ci > 6) ci = 6;
- if (i <= 0 || i > 6) i = 6;
- entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order6[ci - 1][i - 1];
- break;
+ if (ci <= 0 || ci > 6) ci = 6;
+ if (i <= 0 || i > 6) i = 6;
+ entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order6[ci - 1][i - 1];
+ break;
case (7*7-1):
- if (ci <= 0 || ci > 7) ci = 7;
- if (i <= 0 || i > 7) i = 7;
- entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order7[ci - 1][i - 1];
- break;
+ if (ci <= 0 || ci > 7) ci = 7;
+ if (i <= 0 || i > 7) i = 7;
+ entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order7[ci - 1][i - 1];
+ break;
default:
- if (ci <= 0 || ci > 8) ci = 8;
- if (i <= 0 || i > 8) i = 8;
- entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order[ci - 1][i - 1];
- break;
+ if (ci <= 0 || ci > 8) ci = 8;
+ if (i <= 0 || i > 8) i = 8;
+ entropy->coef_limit[blkn] = 1 + jpeg_zigzag_order[ci - 1][i - 1];
+ break;
}
- } else {
+ } else {
entropy->coef_limit[blkn] = 0;
- }
- }
- }
+ }
+ }
+ }
- /* Initialize bitread state variables */
- entropy->bitstate.bits_left = 0;
- entropy->bitstate.get_buffer = 0; /* unnecessary, but keeps Purify quiet */
- entropy->insufficient_data = FALSE;
+ /* Initialize bitread state variables */
+ entropy->bitstate.bits_left = 0;
+ entropy->bitstate.get_buffer = 0; /* unnecessary, but keeps Purify quiet */
+ entropy->insufficient_data = FALSE;
- /* Initialize restart counter */
- entropy->restarts_to_go = cinfo->restart_interval;
+ /* Initialize restart counter */
+ entropy->restarts_to_go = cinfo->restart_interval;
}
@@ -1508,34 +1508,34 @@ start_pass_huff_decoder (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_huff_decoder (j_decompress_ptr cinfo)
{
- huff_entropy_ptr entropy;
- int i;
+ huff_entropy_ptr entropy;
+ int i;
- entropy = (huff_entropy_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ entropy = (huff_entropy_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(huff_entropy_decoder));
- cinfo->entropy = (struct jpeg_entropy_decoder *) entropy;
- entropy->pub.start_pass = start_pass_huff_decoder;
-
- if (cinfo->progressive_mode) {
- /* Create progression status table */
- int *coef_bit_ptr, ci;
- cinfo->coef_bits = (int (*)[DCTSIZE2])
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- cinfo->num_components*DCTSIZE2*SIZEOF(int));
- coef_bit_ptr = & cinfo->coef_bits[0][0];
- for (ci = 0; ci < cinfo->num_components; ci++)
- for (i = 0; i < DCTSIZE2; i++)
+ cinfo->entropy = (struct jpeg_entropy_decoder *) entropy;
+ entropy->pub.start_pass = start_pass_huff_decoder;
+
+ if (cinfo->progressive_mode) {
+ /* Create progression status table */
+ int *coef_bit_ptr, ci;
+ cinfo->coef_bits = (int (*)[DCTSIZE2])
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cinfo->num_components*DCTSIZE2*SIZEOF(int));
+ coef_bit_ptr = & cinfo->coef_bits[0][0];
+ for (ci = 0; ci < cinfo->num_components; ci++)
+ for (i = 0; i < DCTSIZE2; i++)
*coef_bit_ptr++ = -1;
- /* Mark derived tables unallocated */
- for (i = 0; i < NUM_HUFF_TBLS; i++) {
- entropy->derived_tbls[i] = NULL;
- }
- } else {
- /* Mark tables unallocated */
- for (i = 0; i < NUM_HUFF_TBLS; i++) {
- entropy->dc_derived_tbls[i] = entropy->ac_derived_tbls[i] = NULL;
- }
- }
+ /* Mark derived tables unallocated */
+ for (i = 0; i < NUM_HUFF_TBLS; i++) {
+ entropy->derived_tbls[i] = NULL;
+ }
+ } else {
+ /* Mark tables unallocated */
+ for (i = 0; i < NUM_HUFF_TBLS; i++) {
+ entropy->dc_derived_tbls[i] = entropy->ac_derived_tbls[i] = NULL;
+ }
+ }
}
diff --git a/src/lib/libjpeg/jdinput.c b/src/lib/libjpeg/jdinput.c
index 2fcf04fdfc2..57c3537c504 100644
--- a/src/lib/libjpeg/jdinput.c
+++ b/src/lib/libjpeg/jdinput.c
@@ -20,9 +20,9 @@
/* Private state */
typedef struct {
- struct jpeg_input_controller pub; /* public fields */
+ struct jpeg_input_controller pub; /* public fields */
- int inheaders; /* Nonzero until first SOS is reached */
+ int inheaders; /* Nonzero until first SOS is reached */
} my_input_controller;
typedef my_input_controller * my_inputctl_ptr;
@@ -50,155 +50,155 @@ jpeg_core_output_dimensions (j_decompress_ptr cinfo)
*/
{
#ifdef IDCT_SCALING_SUPPORTED
- int ci;
- jpeg_component_info *compptr;
-
- /* Compute actual output image dimensions and DCT scaling choices. */
- if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom) {
- /* Provide 1/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 1;
- cinfo->min_DCT_v_scaled_size = 1;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 2) {
- /* Provide 2/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 2L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 2L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 2;
- cinfo->min_DCT_v_scaled_size = 2;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 3) {
- /* Provide 3/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 3L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 3L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 3;
- cinfo->min_DCT_v_scaled_size = 3;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 4) {
- /* Provide 4/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 4L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 4L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 4;
- cinfo->min_DCT_v_scaled_size = 4;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 5) {
- /* Provide 5/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 5L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 5L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 5;
- cinfo->min_DCT_v_scaled_size = 5;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 6) {
- /* Provide 6/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 6L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 6L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 6;
- cinfo->min_DCT_v_scaled_size = 6;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 7) {
- /* Provide 7/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 7L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 7L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 7;
- cinfo->min_DCT_v_scaled_size = 7;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 8) {
- /* Provide 8/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 8L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 8L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 8;
- cinfo->min_DCT_v_scaled_size = 8;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 9) {
- /* Provide 9/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 9L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 9L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 9;
- cinfo->min_DCT_v_scaled_size = 9;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 10) {
- /* Provide 10/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 10L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 10L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 10;
- cinfo->min_DCT_v_scaled_size = 10;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 11) {
- /* Provide 11/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 11L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 11L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 11;
- cinfo->min_DCT_v_scaled_size = 11;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 12) {
- /* Provide 12/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 12L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 12L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 12;
- cinfo->min_DCT_v_scaled_size = 12;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 13) {
- /* Provide 13/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 13L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 13L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 13;
- cinfo->min_DCT_v_scaled_size = 13;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 14) {
- /* Provide 14/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 14L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 14L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 14;
- cinfo->min_DCT_v_scaled_size = 14;
- } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 15) {
- /* Provide 15/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 15L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 15L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 15;
- cinfo->min_DCT_v_scaled_size = 15;
- } else {
- /* Provide 16/block_size scaling */
- cinfo->output_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * 16L, (long) cinfo->block_size);
- cinfo->output_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * 16L, (long) cinfo->block_size);
- cinfo->min_DCT_h_scaled_size = 16;
- cinfo->min_DCT_v_scaled_size = 16;
- }
-
- /* Recompute dimensions of components */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- compptr->DCT_h_scaled_size = cinfo->min_DCT_h_scaled_size;
- compptr->DCT_v_scaled_size = cinfo->min_DCT_v_scaled_size;
- }
+ int ci;
+ jpeg_component_info *compptr;
+
+ /* Compute actual output image dimensions and DCT scaling choices. */
+ if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom) {
+ /* Provide 1/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 1;
+ cinfo->min_DCT_v_scaled_size = 1;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 2) {
+ /* Provide 2/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 2L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 2L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 2;
+ cinfo->min_DCT_v_scaled_size = 2;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 3) {
+ /* Provide 3/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 3L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 3L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 3;
+ cinfo->min_DCT_v_scaled_size = 3;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 4) {
+ /* Provide 4/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 4L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 4L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 4;
+ cinfo->min_DCT_v_scaled_size = 4;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 5) {
+ /* Provide 5/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 5L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 5L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 5;
+ cinfo->min_DCT_v_scaled_size = 5;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 6) {
+ /* Provide 6/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 6L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 6L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 6;
+ cinfo->min_DCT_v_scaled_size = 6;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 7) {
+ /* Provide 7/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 7L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 7L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 7;
+ cinfo->min_DCT_v_scaled_size = 7;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 8) {
+ /* Provide 8/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 8L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 8L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 8;
+ cinfo->min_DCT_v_scaled_size = 8;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 9) {
+ /* Provide 9/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 9L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 9L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 9;
+ cinfo->min_DCT_v_scaled_size = 9;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 10) {
+ /* Provide 10/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 10L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 10L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 10;
+ cinfo->min_DCT_v_scaled_size = 10;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 11) {
+ /* Provide 11/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 11L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 11L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 11;
+ cinfo->min_DCT_v_scaled_size = 11;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 12) {
+ /* Provide 12/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 12L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 12L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 12;
+ cinfo->min_DCT_v_scaled_size = 12;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 13) {
+ /* Provide 13/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 13L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 13L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 13;
+ cinfo->min_DCT_v_scaled_size = 13;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 14) {
+ /* Provide 14/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 14L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 14L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 14;
+ cinfo->min_DCT_v_scaled_size = 14;
+ } else if (cinfo->scale_num * cinfo->block_size <= cinfo->scale_denom * 15) {
+ /* Provide 15/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 15L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 15L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 15;
+ cinfo->min_DCT_v_scaled_size = 15;
+ } else {
+ /* Provide 16/block_size scaling */
+ cinfo->output_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * 16L, (long) cinfo->block_size);
+ cinfo->output_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * 16L, (long) cinfo->block_size);
+ cinfo->min_DCT_h_scaled_size = 16;
+ cinfo->min_DCT_v_scaled_size = 16;
+ }
+
+ /* Recompute dimensions of components */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ compptr->DCT_h_scaled_size = cinfo->min_DCT_h_scaled_size;
+ compptr->DCT_v_scaled_size = cinfo->min_DCT_v_scaled_size;
+ }
#else /* !IDCT_SCALING_SUPPORTED */
- /* Hardwire it to "no scaling" */
- cinfo->output_width = cinfo->image_width;
- cinfo->output_height = cinfo->image_height;
- /* jdinput.c has already initialized DCT_scaled_size,
- * and has computed unscaled downsampled_width and downsampled_height.
- */
+ /* Hardwire it to "no scaling" */
+ cinfo->output_width = cinfo->image_width;
+ cinfo->output_height = cinfo->image_height;
+ /* jdinput.c has already initialized DCT_scaled_size,
+ * and has computed unscaled downsampled_width and downsampled_height.
+ */
#endif /* IDCT_SCALING_SUPPORTED */
}
@@ -208,179 +208,179 @@ LOCAL(void)
initial_setup (j_decompress_ptr cinfo)
/* Called once, when first SOS marker is reached */
{
- int ci;
- jpeg_component_info *compptr;
-
- /* Make sure image isn't bigger than I can handle */
- if ((long) cinfo->image_height > (long) JPEG_MAX_DIMENSION ||
- (long) cinfo->image_width > (long) JPEG_MAX_DIMENSION)
- ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) JPEG_MAX_DIMENSION);
-
- /* For now, precision must match compiled-in value... */
- if (cinfo->data_precision != BITS_IN_JSAMPLE)
- ERREXIT1(cinfo, JERR_BAD_PRECISION, cinfo->data_precision);
-
- /* Check that number of components won't exceed internal array sizes */
- if (cinfo->num_components > MAX_COMPONENTS)
- ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
- MAX_COMPONENTS);
-
- /* Compute maximum sampling factors; check factor validity */
- cinfo->max_h_samp_factor = 1;
- cinfo->max_v_samp_factor = 1;
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- if (compptr->h_samp_factor<=0 || compptr->h_samp_factor>MAX_SAMP_FACTOR ||
+ int ci;
+ jpeg_component_info *compptr;
+
+ /* Make sure image isn't bigger than I can handle */
+ if ((long) cinfo->image_height > (long) JPEG_MAX_DIMENSION ||
+ (long) cinfo->image_width > (long) JPEG_MAX_DIMENSION)
+ ERREXIT1(cinfo, JERR_IMAGE_TOO_BIG, (unsigned int) JPEG_MAX_DIMENSION);
+
+ /* For now, precision must match compiled-in value... */
+ if (cinfo->data_precision != BITS_IN_JSAMPLE)
+ ERREXIT1(cinfo, JERR_BAD_PRECISION, cinfo->data_precision);
+
+ /* Check that number of components won't exceed internal array sizes */
+ if (cinfo->num_components > MAX_COMPONENTS)
+ ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->num_components,
+ MAX_COMPONENTS);
+
+ /* Compute maximum sampling factors; check factor validity */
+ cinfo->max_h_samp_factor = 1;
+ cinfo->max_v_samp_factor = 1;
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ if (compptr->h_samp_factor<=0 || compptr->h_samp_factor>MAX_SAMP_FACTOR ||
compptr->v_samp_factor<=0 || compptr->v_samp_factor>MAX_SAMP_FACTOR)
- ERREXIT(cinfo, JERR_BAD_SAMPLING);
- cinfo->max_h_samp_factor = MAX(cinfo->max_h_samp_factor,
- compptr->h_samp_factor);
- cinfo->max_v_samp_factor = MAX(cinfo->max_v_samp_factor,
- compptr->v_samp_factor);
- }
-
- /* Derive block_size, natural_order, and lim_Se */
- if (cinfo->is_baseline || (cinfo->progressive_mode &&
- cinfo->comps_in_scan)) { /* no pseudo SOS marker */
- cinfo->block_size = DCTSIZE;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- } else
- switch (cinfo->Se) {
- case (1*1-1):
- cinfo->block_size = 1;
- cinfo->natural_order = jpeg_natural_order; /* not needed */
- cinfo->lim_Se = cinfo->Se;
- break;
- case (2*2-1):
- cinfo->block_size = 2;
- cinfo->natural_order = jpeg_natural_order2;
- cinfo->lim_Se = cinfo->Se;
- break;
- case (3*3-1):
- cinfo->block_size = 3;
- cinfo->natural_order = jpeg_natural_order3;
- cinfo->lim_Se = cinfo->Se;
- break;
- case (4*4-1):
- cinfo->block_size = 4;
- cinfo->natural_order = jpeg_natural_order4;
- cinfo->lim_Se = cinfo->Se;
- break;
- case (5*5-1):
- cinfo->block_size = 5;
- cinfo->natural_order = jpeg_natural_order5;
- cinfo->lim_Se = cinfo->Se;
- break;
- case (6*6-1):
- cinfo->block_size = 6;
- cinfo->natural_order = jpeg_natural_order6;
- cinfo->lim_Se = cinfo->Se;
- break;
- case (7*7-1):
- cinfo->block_size = 7;
- cinfo->natural_order = jpeg_natural_order7;
- cinfo->lim_Se = cinfo->Se;
- break;
- case (8*8-1):
- cinfo->block_size = 8;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (9*9-1):
- cinfo->block_size = 9;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (10*10-1):
- cinfo->block_size = 10;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (11*11-1):
- cinfo->block_size = 11;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (12*12-1):
- cinfo->block_size = 12;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (13*13-1):
- cinfo->block_size = 13;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (14*14-1):
- cinfo->block_size = 14;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (15*15-1):
- cinfo->block_size = 15;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- case (16*16-1):
- cinfo->block_size = 16;
- cinfo->natural_order = jpeg_natural_order;
- cinfo->lim_Se = DCTSIZE2-1;
- break;
- default:
- ERREXIT4(cinfo, JERR_BAD_PROGRESSION,
- cinfo->Ss, cinfo->Se, cinfo->Ah, cinfo->Al);
- break;
- }
-
- /* We initialize DCT_scaled_size and min_DCT_scaled_size to block_size.
- * In the full decompressor,
- * this will be overridden by jpeg_calc_output_dimensions in jdmaster.c;
- * but in the transcoder,
- * jpeg_calc_output_dimensions is not used, so we must do it here.
- */
- cinfo->min_DCT_h_scaled_size = cinfo->block_size;
- cinfo->min_DCT_v_scaled_size = cinfo->block_size;
-
- /* Compute dimensions of components */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- compptr->DCT_h_scaled_size = cinfo->block_size;
- compptr->DCT_v_scaled_size = cinfo->block_size;
- /* Size in DCT blocks */
- compptr->width_in_blocks = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * (long) compptr->h_samp_factor,
- (long) (cinfo->max_h_samp_factor * cinfo->block_size));
- compptr->height_in_blocks = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * (long) compptr->v_samp_factor,
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
- /* downsampled_width and downsampled_height will also be overridden by
- * jdmaster.c if we are doing full decompression. The transcoder library
- * doesn't use these values, but the calling application might.
- */
- /* Size in samples */
- compptr->downsampled_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width * (long) compptr->h_samp_factor,
- (long) cinfo->max_h_samp_factor);
- compptr->downsampled_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height * (long) compptr->v_samp_factor,
- (long) cinfo->max_v_samp_factor);
- /* Mark component needed, until color conversion says otherwise */
- compptr->component_needed = TRUE;
- /* Mark no quantization table yet saved for component */
- compptr->quant_table = NULL;
- }
-
- /* Compute number of fully interleaved MCU rows. */
- cinfo->total_iMCU_rows = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height,
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
-
- /* Decide whether file contains multiple scans */
- if (cinfo->comps_in_scan < cinfo->num_components || cinfo->progressive_mode)
- cinfo->inputctl->has_multiple_scans = TRUE;
- else
- cinfo->inputctl->has_multiple_scans = FALSE;
+ ERREXIT(cinfo, JERR_BAD_SAMPLING);
+ cinfo->max_h_samp_factor = MAX(cinfo->max_h_samp_factor,
+ compptr->h_samp_factor);
+ cinfo->max_v_samp_factor = MAX(cinfo->max_v_samp_factor,
+ compptr->v_samp_factor);
+ }
+
+ /* Derive block_size, natural_order, and lim_Se */
+ if (cinfo->is_baseline || (cinfo->progressive_mode &&
+ cinfo->comps_in_scan)) { /* no pseudo SOS marker */
+ cinfo->block_size = DCTSIZE;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ } else
+ switch (cinfo->Se) {
+ case (1*1-1):
+ cinfo->block_size = 1;
+ cinfo->natural_order = jpeg_natural_order; /* not needed */
+ cinfo->lim_Se = cinfo->Se;
+ break;
+ case (2*2-1):
+ cinfo->block_size = 2;
+ cinfo->natural_order = jpeg_natural_order2;
+ cinfo->lim_Se = cinfo->Se;
+ break;
+ case (3*3-1):
+ cinfo->block_size = 3;
+ cinfo->natural_order = jpeg_natural_order3;
+ cinfo->lim_Se = cinfo->Se;
+ break;
+ case (4*4-1):
+ cinfo->block_size = 4;
+ cinfo->natural_order = jpeg_natural_order4;
+ cinfo->lim_Se = cinfo->Se;
+ break;
+ case (5*5-1):
+ cinfo->block_size = 5;
+ cinfo->natural_order = jpeg_natural_order5;
+ cinfo->lim_Se = cinfo->Se;
+ break;
+ case (6*6-1):
+ cinfo->block_size = 6;
+ cinfo->natural_order = jpeg_natural_order6;
+ cinfo->lim_Se = cinfo->Se;
+ break;
+ case (7*7-1):
+ cinfo->block_size = 7;
+ cinfo->natural_order = jpeg_natural_order7;
+ cinfo->lim_Se = cinfo->Se;
+ break;
+ case (8*8-1):
+ cinfo->block_size = 8;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (9*9-1):
+ cinfo->block_size = 9;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (10*10-1):
+ cinfo->block_size = 10;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (11*11-1):
+ cinfo->block_size = 11;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (12*12-1):
+ cinfo->block_size = 12;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (13*13-1):
+ cinfo->block_size = 13;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (14*14-1):
+ cinfo->block_size = 14;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (15*15-1):
+ cinfo->block_size = 15;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ case (16*16-1):
+ cinfo->block_size = 16;
+ cinfo->natural_order = jpeg_natural_order;
+ cinfo->lim_Se = DCTSIZE2-1;
+ break;
+ default:
+ ERREXIT4(cinfo, JERR_BAD_PROGRESSION,
+ cinfo->Ss, cinfo->Se, cinfo->Ah, cinfo->Al);
+ break;
+ }
+
+ /* We initialize DCT_scaled_size and min_DCT_scaled_size to block_size.
+ * In the full decompressor,
+ * this will be overridden by jpeg_calc_output_dimensions in jdmaster.c;
+ * but in the transcoder,
+ * jpeg_calc_output_dimensions is not used, so we must do it here.
+ */
+ cinfo->min_DCT_h_scaled_size = cinfo->block_size;
+ cinfo->min_DCT_v_scaled_size = cinfo->block_size;
+
+ /* Compute dimensions of components */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ compptr->DCT_h_scaled_size = cinfo->block_size;
+ compptr->DCT_v_scaled_size = cinfo->block_size;
+ /* Size in DCT blocks */
+ compptr->width_in_blocks = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * (long) compptr->h_samp_factor,
+ (long) (cinfo->max_h_samp_factor * cinfo->block_size));
+ compptr->height_in_blocks = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * (long) compptr->v_samp_factor,
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+ /* downsampled_width and downsampled_height will also be overridden by
+ * jdmaster.c if we are doing full decompression. The transcoder library
+ * doesn't use these values, but the calling application might.
+ */
+ /* Size in samples */
+ compptr->downsampled_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width * (long) compptr->h_samp_factor,
+ (long) cinfo->max_h_samp_factor);
+ compptr->downsampled_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height * (long) compptr->v_samp_factor,
+ (long) cinfo->max_v_samp_factor);
+ /* Mark component needed, until color conversion says otherwise */
+ compptr->component_needed = TRUE;
+ /* Mark no quantization table yet saved for component */
+ compptr->quant_table = NULL;
+ }
+
+ /* Compute number of fully interleaved MCU rows. */
+ cinfo->total_iMCU_rows = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height,
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+
+ /* Decide whether file contains multiple scans */
+ if (cinfo->comps_in_scan < cinfo->num_components || cinfo->progressive_mode)
+ cinfo->inputctl->has_multiple_scans = TRUE;
+ else
+ cinfo->inputctl->has_multiple_scans = FALSE;
}
@@ -389,76 +389,76 @@ per_scan_setup (j_decompress_ptr cinfo)
/* Do computations that are needed before processing a JPEG scan */
/* cinfo->comps_in_scan and cinfo->cur_comp_info[] were set from SOS marker */
{
- int ci, mcublks, tmp;
- jpeg_component_info *compptr;
-
- if (cinfo->comps_in_scan == 1) {
-
- /* Noninterleaved (single-component) scan */
- compptr = cinfo->cur_comp_info[0];
-
- /* Overall image size in MCUs */
- cinfo->MCUs_per_row = compptr->width_in_blocks;
- cinfo->MCU_rows_in_scan = compptr->height_in_blocks;
-
- /* For noninterleaved scan, always one block per MCU */
- compptr->MCU_width = 1;
- compptr->MCU_height = 1;
- compptr->MCU_blocks = 1;
- compptr->MCU_sample_width = compptr->DCT_h_scaled_size;
- compptr->last_col_width = 1;
- /* For noninterleaved scans, it is convenient to define last_row_height
- * as the number of block rows present in the last iMCU row.
- */
- tmp = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
- if (tmp == 0) tmp = compptr->v_samp_factor;
- compptr->last_row_height = tmp;
-
- /* Prepare array describing MCU composition */
- cinfo->blocks_in_MCU = 1;
- cinfo->MCU_membership[0] = 0;
-
- } else {
-
- /* Interleaved (multi-component) scan */
- if (cinfo->comps_in_scan <= 0 || cinfo->comps_in_scan > MAX_COMPS_IN_SCAN)
- ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->comps_in_scan,
- MAX_COMPS_IN_SCAN);
-
- /* Overall image size in MCUs */
- cinfo->MCUs_per_row = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width,
- (long) (cinfo->max_h_samp_factor * cinfo->block_size));
- cinfo->MCU_rows_in_scan = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height,
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
-
- cinfo->blocks_in_MCU = 0;
-
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* Sampling factors give # of blocks of component in each MCU */
- compptr->MCU_width = compptr->h_samp_factor;
- compptr->MCU_height = compptr->v_samp_factor;
- compptr->MCU_blocks = compptr->MCU_width * compptr->MCU_height;
- compptr->MCU_sample_width = compptr->MCU_width * compptr->DCT_h_scaled_size;
- /* Figure number of non-dummy blocks in last MCU column & row */
- tmp = (int) (compptr->width_in_blocks % compptr->MCU_width);
- if (tmp == 0) tmp = compptr->MCU_width;
- compptr->last_col_width = tmp;
- tmp = (int) (compptr->height_in_blocks % compptr->MCU_height);
- if (tmp == 0) tmp = compptr->MCU_height;
- compptr->last_row_height = tmp;
- /* Prepare array describing MCU composition */
- mcublks = compptr->MCU_blocks;
- if (cinfo->blocks_in_MCU + mcublks > D_MAX_BLOCKS_IN_MCU)
+ int ci, mcublks, tmp;
+ jpeg_component_info *compptr;
+
+ if (cinfo->comps_in_scan == 1) {
+
+ /* Noninterleaved (single-component) scan */
+ compptr = cinfo->cur_comp_info[0];
+
+ /* Overall image size in MCUs */
+ cinfo->MCUs_per_row = compptr->width_in_blocks;
+ cinfo->MCU_rows_in_scan = compptr->height_in_blocks;
+
+ /* For noninterleaved scan, always one block per MCU */
+ compptr->MCU_width = 1;
+ compptr->MCU_height = 1;
+ compptr->MCU_blocks = 1;
+ compptr->MCU_sample_width = compptr->DCT_h_scaled_size;
+ compptr->last_col_width = 1;
+ /* For noninterleaved scans, it is convenient to define last_row_height
+ * as the number of block rows present in the last iMCU row.
+ */
+ tmp = (int) (compptr->height_in_blocks % compptr->v_samp_factor);
+ if (tmp == 0) tmp = compptr->v_samp_factor;
+ compptr->last_row_height = tmp;
+
+ /* Prepare array describing MCU composition */
+ cinfo->blocks_in_MCU = 1;
+ cinfo->MCU_membership[0] = 0;
+
+ } else {
+
+ /* Interleaved (multi-component) scan */
+ if (cinfo->comps_in_scan <= 0 || cinfo->comps_in_scan > MAX_COMPS_IN_SCAN)
+ ERREXIT2(cinfo, JERR_COMPONENT_COUNT, cinfo->comps_in_scan,
+ MAX_COMPS_IN_SCAN);
+
+ /* Overall image size in MCUs */
+ cinfo->MCUs_per_row = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width,
+ (long) (cinfo->max_h_samp_factor * cinfo->block_size));
+ cinfo->MCU_rows_in_scan = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height,
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+
+ cinfo->blocks_in_MCU = 0;
+
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* Sampling factors give # of blocks of component in each MCU */
+ compptr->MCU_width = compptr->h_samp_factor;
+ compptr->MCU_height = compptr->v_samp_factor;
+ compptr->MCU_blocks = compptr->MCU_width * compptr->MCU_height;
+ compptr->MCU_sample_width = compptr->MCU_width * compptr->DCT_h_scaled_size;
+ /* Figure number of non-dummy blocks in last MCU column & row */
+ tmp = (int) (compptr->width_in_blocks % compptr->MCU_width);
+ if (tmp == 0) tmp = compptr->MCU_width;
+ compptr->last_col_width = tmp;
+ tmp = (int) (compptr->height_in_blocks % compptr->MCU_height);
+ if (tmp == 0) tmp = compptr->MCU_height;
+ compptr->last_row_height = tmp;
+ /* Prepare array describing MCU composition */
+ mcublks = compptr->MCU_blocks;
+ if (cinfo->blocks_in_MCU + mcublks > D_MAX_BLOCKS_IN_MCU)
ERREXIT(cinfo, JERR_BAD_MCU_SIZE);
- while (mcublks-- > 0) {
+ while (mcublks-- > 0) {
cinfo->MCU_membership[cinfo->blocks_in_MCU++] = ci;
- }
- }
+ }
+ }
- }
+ }
}
@@ -486,27 +486,27 @@ per_scan_setup (j_decompress_ptr cinfo)
LOCAL(void)
latch_quant_tables (j_decompress_ptr cinfo)
{
- int ci, qtblno;
- jpeg_component_info *compptr;
- JQUANT_TBL * qtbl;
-
- for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
- compptr = cinfo->cur_comp_info[ci];
- /* No work if we already saved Q-table for this component */
- if (compptr->quant_table != NULL)
- continue;
- /* Make sure specified quantization table is present */
- qtblno = compptr->quant_tbl_no;
- if (qtblno < 0 || qtblno >= NUM_QUANT_TBLS ||
+ int ci, qtblno;
+ jpeg_component_info *compptr;
+ JQUANT_TBL * qtbl;
+
+ for (ci = 0; ci < cinfo->comps_in_scan; ci++) {
+ compptr = cinfo->cur_comp_info[ci];
+ /* No work if we already saved Q-table for this component */
+ if (compptr->quant_table != NULL)
+ continue;
+ /* Make sure specified quantization table is present */
+ qtblno = compptr->quant_tbl_no;
+ if (qtblno < 0 || qtblno >= NUM_QUANT_TBLS ||
cinfo->quant_tbl_ptrs[qtblno] == NULL)
- ERREXIT1(cinfo, JERR_NO_QUANT_TABLE, qtblno);
- /* OK, save away the quantization table */
- qtbl = (JQUANT_TBL *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- SIZEOF(JQUANT_TBL));
- MEMCOPY(qtbl, cinfo->quant_tbl_ptrs[qtblno], SIZEOF(JQUANT_TBL));
- compptr->quant_table = qtbl;
- }
+ ERREXIT1(cinfo, JERR_NO_QUANT_TABLE, qtblno);
+ /* OK, save away the quantization table */
+ qtbl = (JQUANT_TBL *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ SIZEOF(JQUANT_TBL));
+ MEMCOPY(qtbl, cinfo->quant_tbl_ptrs[qtblno], SIZEOF(JQUANT_TBL));
+ compptr->quant_table = qtbl;
+ }
}
@@ -520,11 +520,11 @@ latch_quant_tables (j_decompress_ptr cinfo)
METHODDEF(void)
start_input_pass (j_decompress_ptr cinfo)
{
- per_scan_setup(cinfo);
- latch_quant_tables(cinfo);
- (*cinfo->entropy->start_pass) (cinfo);
- (*cinfo->coef->start_input_pass) (cinfo);
- cinfo->inputctl->consume_input = cinfo->coef->consume_data;
+ per_scan_setup(cinfo);
+ latch_quant_tables(cinfo);
+ (*cinfo->entropy->start_pass) (cinfo);
+ (*cinfo->coef->start_input_pass) (cinfo);
+ cinfo->inputctl->consume_input = cinfo->coef->consume_data;
}
@@ -537,7 +537,7 @@ start_input_pass (j_decompress_ptr cinfo)
METHODDEF(void)
finish_input_pass (j_decompress_ptr cinfo)
{
- cinfo->inputctl->consume_input = consume_markers;
+ cinfo->inputctl->consume_input = consume_markers;
}
@@ -558,56 +558,56 @@ finish_input_pass (j_decompress_ptr cinfo)
METHODDEF(int)
consume_markers (j_decompress_ptr cinfo)
{
- my_inputctl_ptr inputctl = (my_inputctl_ptr) cinfo->inputctl;
- int val;
+ my_inputctl_ptr inputctl = (my_inputctl_ptr) cinfo->inputctl;
+ int val;
- if (inputctl->pub.eoi_reached) /* After hitting EOI, read no further */
- return JPEG_REACHED_EOI;
+ if (inputctl->pub.eoi_reached) /* After hitting EOI, read no further */
+ return JPEG_REACHED_EOI;
- for (;;) { /* Loop to pass pseudo SOS marker */
- val = (*cinfo->marker->read_markers) (cinfo);
+ for (;;) { /* Loop to pass pseudo SOS marker */
+ val = (*cinfo->marker->read_markers) (cinfo);
- switch (val) {
- case JPEG_REACHED_SOS: /* Found SOS */
- if (inputctl->inheaders) { /* 1st SOS */
+ switch (val) {
+ case JPEG_REACHED_SOS: /* Found SOS */
+ if (inputctl->inheaders) { /* 1st SOS */
if (inputctl->inheaders == 1)
- initial_setup(cinfo);
+ initial_setup(cinfo);
if (cinfo->comps_in_scan == 0) { /* pseudo SOS marker */
- inputctl->inheaders = 2;
- break;
+ inputctl->inheaders = 2;
+ break;
}
inputctl->inheaders = 0;
/* Note: start_input_pass must be called by jdmaster.c
- * before any more input can be consumed. jdapimin.c is
- * responsible for enforcing this sequencing.
- */
- } else { /* 2nd or later SOS marker */
+ * before any more input can be consumed. jdapimin.c is
+ * responsible for enforcing this sequencing.
+ */
+ } else { /* 2nd or later SOS marker */
if (! inputctl->pub.has_multiple_scans)
- ERREXIT(cinfo, JERR_EOI_EXPECTED); /* Oops, I wasn't expecting this! */
+ ERREXIT(cinfo, JERR_EOI_EXPECTED); /* Oops, I wasn't expecting this! */
if (cinfo->comps_in_scan == 0) /* unexpected pseudo SOS marker */
- break;
+ break;
start_input_pass(cinfo);
- }
- return val;
- case JPEG_REACHED_EOI: /* Found EOI */
- inputctl->pub.eoi_reached = TRUE;
- if (inputctl->inheaders) { /* Tables-only datastream, apparently */
+ }
+ return val;
+ case JPEG_REACHED_EOI: /* Found EOI */
+ inputctl->pub.eoi_reached = TRUE;
+ if (inputctl->inheaders) { /* Tables-only datastream, apparently */
if (cinfo->marker->saw_SOF)
- ERREXIT(cinfo, JERR_SOF_NO_SOS);
- } else {
+ ERREXIT(cinfo, JERR_SOF_NO_SOS);
+ } else {
/* Prevent infinite loop in coef ctlr's decompress_data routine
- * if user set output_scan_number larger than number of scans.
- */
+ * if user set output_scan_number larger than number of scans.
+ */
if (cinfo->output_scan_number > cinfo->input_scan_number)
- cinfo->output_scan_number = cinfo->input_scan_number;
- }
- return val;
- case JPEG_SUSPENDED:
- return val;
- default:
- return val;
- }
- }
+ cinfo->output_scan_number = cinfo->input_scan_number;
+ }
+ return val;
+ case JPEG_SUSPENDED:
+ return val;
+ default:
+ return val;
+ }
+ }
}
@@ -618,17 +618,17 @@ consume_markers (j_decompress_ptr cinfo)
METHODDEF(void)
reset_input_controller (j_decompress_ptr cinfo)
{
- my_inputctl_ptr inputctl = (my_inputctl_ptr) cinfo->inputctl;
-
- inputctl->pub.consume_input = consume_markers;
- inputctl->pub.has_multiple_scans = FALSE; /* "unknown" would be better */
- inputctl->pub.eoi_reached = FALSE;
- inputctl->inheaders = 1;
- /* Reset other modules */
- (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
- (*cinfo->marker->reset_marker_reader) (cinfo);
- /* Reset progression state -- would be cleaner if entropy decoder did this */
- cinfo->coef_bits = NULL;
+ my_inputctl_ptr inputctl = (my_inputctl_ptr) cinfo->inputctl;
+
+ inputctl->pub.consume_input = consume_markers;
+ inputctl->pub.has_multiple_scans = FALSE; /* "unknown" would be better */
+ inputctl->pub.eoi_reached = FALSE;
+ inputctl->inheaders = 1;
+ /* Reset other modules */
+ (*cinfo->err->reset_error_mgr) ((j_common_ptr) cinfo);
+ (*cinfo->marker->reset_marker_reader) (cinfo);
+ /* Reset progression state -- would be cleaner if entropy decoder did this */
+ cinfo->coef_bits = NULL;
}
@@ -640,22 +640,22 @@ reset_input_controller (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_input_controller (j_decompress_ptr cinfo)
{
- my_inputctl_ptr inputctl;
+ my_inputctl_ptr inputctl;
- /* Create subobject in permanent pool */
- inputctl = (my_inputctl_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ /* Create subobject in permanent pool */
+ inputctl = (my_inputctl_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
SIZEOF(my_input_controller));
- cinfo->inputctl = (struct jpeg_input_controller *) inputctl;
- /* Initialize method pointers */
- inputctl->pub.consume_input = consume_markers;
- inputctl->pub.reset_input_controller = reset_input_controller;
- inputctl->pub.start_input_pass = start_input_pass;
- inputctl->pub.finish_input_pass = finish_input_pass;
- /* Initialize state: can't use reset_input_controller since we don't
- * want to try to reset other modules yet.
- */
- inputctl->pub.has_multiple_scans = FALSE; /* "unknown" would be better */
- inputctl->pub.eoi_reached = FALSE;
- inputctl->inheaders = 1;
+ cinfo->inputctl = (struct jpeg_input_controller *) inputctl;
+ /* Initialize method pointers */
+ inputctl->pub.consume_input = consume_markers;
+ inputctl->pub.reset_input_controller = reset_input_controller;
+ inputctl->pub.start_input_pass = start_input_pass;
+ inputctl->pub.finish_input_pass = finish_input_pass;
+ /* Initialize state: can't use reset_input_controller since we don't
+ * want to try to reset other modules yet.
+ */
+ inputctl->pub.has_multiple_scans = FALSE; /* "unknown" would be better */
+ inputctl->pub.eoi_reached = FALSE;
+ inputctl->inheaders = 1;
}
diff --git a/src/lib/libjpeg/jdmainct.c b/src/lib/libjpeg/jdmainct.c
index b1defa2facc..841f3b38c96 100644
--- a/src/lib/libjpeg/jdmainct.c
+++ b/src/lib/libjpeg/jdmainct.c
@@ -112,44 +112,44 @@
/* Private buffer controller object */
typedef struct {
- struct jpeg_d_main_controller pub; /* public fields */
+ struct jpeg_d_main_controller pub; /* public fields */
- /* Pointer to allocated workspace (M or M+2 row groups). */
- JSAMPARRAY buffer[MAX_COMPONENTS];
+ /* Pointer to allocated workspace (M or M+2 row groups). */
+ JSAMPARRAY buffer[MAX_COMPONENTS];
- boolean buffer_full; /* Have we gotten an iMCU row from decoder? */
- JDIMENSION rowgroup_ctr; /* counts row groups output to postprocessor */
+ boolean buffer_full; /* Have we gotten an iMCU row from decoder? */
+ JDIMENSION rowgroup_ctr; /* counts row groups output to postprocessor */
- /* Remaining fields are only used in the context case. */
+ /* Remaining fields are only used in the context case. */
- /* These are the master pointers to the funny-order pointer lists. */
- JSAMPIMAGE xbuffer[2]; /* pointers to weird pointer lists */
+ /* These are the master pointers to the funny-order pointer lists. */
+ JSAMPIMAGE xbuffer[2]; /* pointers to weird pointer lists */
- int whichptr; /* indicates which pointer set is now in use */
- int context_state; /* process_data state machine status */
- JDIMENSION rowgroups_avail; /* row groups available to postprocessor */
- JDIMENSION iMCU_row_ctr; /* counts iMCU rows to detect image top/bot */
+ int whichptr; /* indicates which pointer set is now in use */
+ int context_state; /* process_data state machine status */
+ JDIMENSION rowgroups_avail; /* row groups available to postprocessor */
+ JDIMENSION iMCU_row_ctr; /* counts iMCU rows to detect image top/bot */
} my_main_controller;
typedef my_main_controller * my_main_ptr;
/* context_state values: */
-#define CTX_PREPARE_FOR_IMCU 0 /* need to prepare for MCU row */
-#define CTX_PROCESS_IMCU 1 /* feeding iMCU to postprocessor */
-#define CTX_POSTPONED_ROW 2 /* feeding postponed row group */
+#define CTX_PREPARE_FOR_IMCU 0 /* need to prepare for MCU row */
+#define CTX_PROCESS_IMCU 1 /* feeding iMCU to postprocessor */
+#define CTX_POSTPONED_ROW 2 /* feeding postponed row group */
/* Forward declarations */
METHODDEF(void) process_data_simple_main
JPP((j_decompress_ptr cinfo, JSAMPARRAY output_buf,
- JDIMENSION *out_row_ctr, JDIMENSION out_rows_avail));
+ JDIMENSION *out_row_ctr, JDIMENSION out_rows_avail));
METHODDEF(void) process_data_context_main
JPP((j_decompress_ptr cinfo, JSAMPARRAY output_buf,
- JDIMENSION *out_row_ctr, JDIMENSION out_rows_avail));
+ JDIMENSION *out_row_ctr, JDIMENSION out_rows_avail));
#ifdef QUANT_2PASS_SUPPORTED
METHODDEF(void) process_data_crank_post
JPP((j_decompress_ptr cinfo, JSAMPARRAY output_buf,
- JDIMENSION *out_row_ctr, JDIMENSION out_rows_avail));
+ JDIMENSION *out_row_ctr, JDIMENSION out_rows_avail));
#endif
@@ -159,35 +159,35 @@ alloc_funny_pointers (j_decompress_ptr cinfo)
* This is done only once, not once per pass.
*/
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
- int ci, rgroup;
- int M = cinfo->min_DCT_v_scaled_size;
- jpeg_component_info *compptr;
- JSAMPARRAY xbuf;
-
- /* Get top-level space for component array pointers.
- * We alloc both arrays with one call to save a few cycles.
- */
- mymain->xbuffer[0] = (JSAMPIMAGE)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
+ int ci, rgroup;
+ int M = cinfo->min_DCT_v_scaled_size;
+ jpeg_component_info *compptr;
+ JSAMPARRAY xbuf;
+
+ /* Get top-level space for component array pointers.
+ * We alloc both arrays with one call to save a few cycles.
+ */
+ mymain->xbuffer[0] = (JSAMPIMAGE)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
cinfo->num_components * 2 * SIZEOF(JSAMPARRAY));
- mymain->xbuffer[1] = mymain->xbuffer[0] + cinfo->num_components;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
- cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
- /* Get space for pointer lists --- M+4 row groups in each list.
- * We alloc both pointer lists with one call to save a few cycles.
- */
- xbuf = (JSAMPARRAY)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- 2 * (rgroup * (M + 4)) * SIZEOF(JSAMPROW));
- xbuf += rgroup; /* want one row group at negative offsets */
- mymain->xbuffer[0][ci] = xbuf;
- xbuf += rgroup * (M + 4);
- mymain->xbuffer[1][ci] = xbuf;
- }
+ mymain->xbuffer[1] = mymain->xbuffer[0] + cinfo->num_components;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
+ cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
+ /* Get space for pointer lists --- M+4 row groups in each list.
+ * We alloc both pointer lists with one call to save a few cycles.
+ */
+ xbuf = (JSAMPARRAY)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ 2 * (rgroup * (M + 4)) * SIZEOF(JSAMPROW));
+ xbuf += rgroup; /* want one row group at negative offsets */
+ mymain->xbuffer[0][ci] = xbuf;
+ xbuf += rgroup * (M + 4);
+ mymain->xbuffer[1][ci] = xbuf;
+ }
}
@@ -200,37 +200,37 @@ make_funny_pointers (j_decompress_ptr cinfo)
* This will be repeated at the beginning of each pass.
*/
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
- int ci, i, rgroup;
- int M = cinfo->min_DCT_v_scaled_size;
- jpeg_component_info *compptr;
- JSAMPARRAY buf, xbuf0, xbuf1;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
- cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
- xbuf0 = mymain->xbuffer[0][ci];
- xbuf1 = mymain->xbuffer[1][ci];
- /* First copy the workspace pointers as-is */
- buf = mymain->buffer[ci];
- for (i = 0; i < rgroup * (M + 2); i++) {
- xbuf0[i] = xbuf1[i] = buf[i];
- }
- /* In the second list, put the last four row groups in swapped order */
- for (i = 0; i < rgroup * 2; i++) {
- xbuf1[rgroup*(M-2) + i] = buf[rgroup*M + i];
- xbuf1[rgroup*M + i] = buf[rgroup*(M-2) + i];
- }
- /* The wraparound pointers at top and bottom will be filled later
- * (see set_wraparound_pointers, below). Initially we want the "above"
- * pointers to duplicate the first actual data line. This only needs
- * to happen in xbuffer[0].
- */
- for (i = 0; i < rgroup; i++) {
- xbuf0[i - rgroup] = xbuf0[0];
- }
- }
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
+ int ci, i, rgroup;
+ int M = cinfo->min_DCT_v_scaled_size;
+ jpeg_component_info *compptr;
+ JSAMPARRAY buf, xbuf0, xbuf1;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
+ cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
+ xbuf0 = mymain->xbuffer[0][ci];
+ xbuf1 = mymain->xbuffer[1][ci];
+ /* First copy the workspace pointers as-is */
+ buf = mymain->buffer[ci];
+ for (i = 0; i < rgroup * (M + 2); i++) {
+ xbuf0[i] = xbuf1[i] = buf[i];
+ }
+ /* In the second list, put the last four row groups in swapped order */
+ for (i = 0; i < rgroup * 2; i++) {
+ xbuf1[rgroup*(M-2) + i] = buf[rgroup*M + i];
+ xbuf1[rgroup*M + i] = buf[rgroup*(M-2) + i];
+ }
+ /* The wraparound pointers at top and bottom will be filled later
+ * (see set_wraparound_pointers, below). Initially we want the "above"
+ * pointers to duplicate the first actual data line. This only needs
+ * to happen in xbuffer[0].
+ */
+ for (i = 0; i < rgroup; i++) {
+ xbuf0[i - rgroup] = xbuf0[0];
+ }
+ }
}
@@ -240,25 +240,25 @@ set_wraparound_pointers (j_decompress_ptr cinfo)
* This changes the pointer list state from top-of-image to the normal state.
*/
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
- int ci, i, rgroup;
- int M = cinfo->min_DCT_v_scaled_size;
- jpeg_component_info *compptr;
- JSAMPARRAY xbuf0, xbuf1;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
- cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
- xbuf0 = mymain->xbuffer[0][ci];
- xbuf1 = mymain->xbuffer[1][ci];
- for (i = 0; i < rgroup; i++) {
- xbuf0[i - rgroup] = xbuf0[rgroup*(M+1) + i];
- xbuf1[i - rgroup] = xbuf1[rgroup*(M+1) + i];
- xbuf0[rgroup*(M+2) + i] = xbuf0[i];
- xbuf1[rgroup*(M+2) + i] = xbuf1[i];
- }
- }
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
+ int ci, i, rgroup;
+ int M = cinfo->min_DCT_v_scaled_size;
+ jpeg_component_info *compptr;
+ JSAMPARRAY xbuf0, xbuf1;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
+ cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
+ xbuf0 = mymain->xbuffer[0][ci];
+ xbuf1 = mymain->xbuffer[1][ci];
+ for (i = 0; i < rgroup; i++) {
+ xbuf0[i - rgroup] = xbuf0[rgroup*(M+1) + i];
+ xbuf1[i - rgroup] = xbuf1[rgroup*(M+1) + i];
+ xbuf0[rgroup*(M+2) + i] = xbuf0[i];
+ xbuf1[rgroup*(M+2) + i] = xbuf1[i];
+ }
+ }
}
@@ -269,33 +269,33 @@ set_bottom_pointers (j_decompress_ptr cinfo)
* Also sets rowgroups_avail to indicate number of nondummy row groups in row.
*/
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
- int ci, i, rgroup, iMCUheight, rows_left;
- jpeg_component_info *compptr;
- JSAMPARRAY xbuf;
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Count sample rows in one iMCU row and in one row group */
- iMCUheight = compptr->v_samp_factor * compptr->DCT_v_scaled_size;
- rgroup = iMCUheight / cinfo->min_DCT_v_scaled_size;
- /* Count nondummy sample rows remaining for this component */
- rows_left = (int) (compptr->downsampled_height % (JDIMENSION) iMCUheight);
- if (rows_left == 0) rows_left = iMCUheight;
- /* Count nondummy row groups. Should get same answer for each component,
- * so we need only do it once.
- */
- if (ci == 0) {
- mymain->rowgroups_avail = (JDIMENSION) ((rows_left-1) / rgroup + 1);
- }
- /* Duplicate the last real sample row rgroup*2 times; this pads out the
- * last partial rowgroup and ensures at least one full rowgroup of context.
- */
- xbuf = mymain->xbuffer[mymain->whichptr][ci];
- for (i = 0; i < rgroup * 2; i++) {
- xbuf[rows_left + i] = xbuf[rows_left-1];
- }
- }
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
+ int ci, i, rgroup, iMCUheight, rows_left;
+ jpeg_component_info *compptr;
+ JSAMPARRAY xbuf;
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Count sample rows in one iMCU row and in one row group */
+ iMCUheight = compptr->v_samp_factor * compptr->DCT_v_scaled_size;
+ rgroup = iMCUheight / cinfo->min_DCT_v_scaled_size;
+ /* Count nondummy sample rows remaining for this component */
+ rows_left = (int) (compptr->downsampled_height % (JDIMENSION) iMCUheight);
+ if (rows_left == 0) rows_left = iMCUheight;
+ /* Count nondummy row groups. Should get same answer for each component,
+ * so we need only do it once.
+ */
+ if (ci == 0) {
+ mymain->rowgroups_avail = (JDIMENSION) ((rows_left-1) / rgroup + 1);
+ }
+ /* Duplicate the last real sample row rgroup*2 times; this pads out the
+ * last partial rowgroup and ensures at least one full rowgroup of context.
+ */
+ xbuf = mymain->xbuffer[mymain->whichptr][ci];
+ for (i = 0; i < rgroup * 2; i++) {
+ xbuf[rows_left + i] = xbuf[rows_left-1];
+ }
+ }
}
@@ -306,33 +306,33 @@ set_bottom_pointers (j_decompress_ptr cinfo)
METHODDEF(void)
start_pass_main (j_decompress_ptr cinfo, J_BUF_MODE pass_mode)
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
-
- switch (pass_mode) {
- case JBUF_PASS_THRU:
- if (cinfo->upsample->need_context_rows) {
- mymain->pub.process_data = process_data_context_main;
- make_funny_pointers(cinfo); /* Create the xbuffer[] lists */
- mymain->whichptr = 0; /* Read first iMCU row into xbuffer[0] */
- mymain->context_state = CTX_PREPARE_FOR_IMCU;
- mymain->iMCU_row_ctr = 0;
- } else {
- /* Simple case with no context needed */
- mymain->pub.process_data = process_data_simple_main;
- }
- mymain->buffer_full = FALSE; /* Mark buffer empty */
- mymain->rowgroup_ctr = 0;
- break;
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
+
+ switch (pass_mode) {
+ case JBUF_PASS_THRU:
+ if (cinfo->upsample->need_context_rows) {
+ mymain->pub.process_data = process_data_context_main;
+ make_funny_pointers(cinfo); /* Create the xbuffer[] lists */
+ mymain->whichptr = 0; /* Read first iMCU row into xbuffer[0] */
+ mymain->context_state = CTX_PREPARE_FOR_IMCU;
+ mymain->iMCU_row_ctr = 0;
+ } else {
+ /* Simple case with no context needed */
+ mymain->pub.process_data = process_data_simple_main;
+ }
+ mymain->buffer_full = FALSE; /* Mark buffer empty */
+ mymain->rowgroup_ctr = 0;
+ break;
#ifdef QUANT_2PASS_SUPPORTED
- case JBUF_CRANK_DEST:
- /* For last pass of 2-pass quantization, just crank the postprocessor */
- mymain->pub.process_data = process_data_crank_post;
- break;
+ case JBUF_CRANK_DEST:
+ /* For last pass of 2-pass quantization, just crank the postprocessor */
+ mymain->pub.process_data = process_data_crank_post;
+ break;
#endif
- default:
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- break;
- }
+ default:
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ break;
+ }
}
@@ -343,36 +343,36 @@ start_pass_main (j_decompress_ptr cinfo, J_BUF_MODE pass_mode)
METHODDEF(void)
process_data_simple_main (j_decompress_ptr cinfo,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
- JDIMENSION rowgroups_avail;
-
- /* Read input data if we haven't filled the main buffer yet */
- if (! mymain->buffer_full) {
- if (! (*cinfo->coef->decompress_data) (cinfo, mymain->buffer))
- return; /* suspension forced, can do nothing more */
- mymain->buffer_full = TRUE; /* OK, we have an iMCU row to work with */
- }
-
- /* There are always min_DCT_scaled_size row groups in an iMCU row. */
- rowgroups_avail = (JDIMENSION) cinfo->min_DCT_v_scaled_size;
- /* Note: at the bottom of the image, we may pass extra garbage row groups
- * to the postprocessor. The postprocessor has to check for bottom
- * of image anyway (at row resolution), so no point in us doing it too.
- */
-
- /* Feed the postprocessor */
- (*cinfo->post->post_process_data) (cinfo, mymain->buffer,
- &mymain->rowgroup_ctr, rowgroups_avail,
- output_buf, out_row_ctr, out_rows_avail);
-
- /* Has postprocessor consumed all the data yet? If so, mark buffer empty */
- if (mymain->rowgroup_ctr >= rowgroups_avail) {
- mymain->buffer_full = FALSE;
- mymain->rowgroup_ctr = 0;
- }
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
+ JDIMENSION rowgroups_avail;
+
+ /* Read input data if we haven't filled the main buffer yet */
+ if (! mymain->buffer_full) {
+ if (! (*cinfo->coef->decompress_data) (cinfo, mymain->buffer))
+ return; /* suspension forced, can do nothing more */
+ mymain->buffer_full = TRUE; /* OK, we have an iMCU row to work with */
+ }
+
+ /* There are always min_DCT_scaled_size row groups in an iMCU row. */
+ rowgroups_avail = (JDIMENSION) cinfo->min_DCT_v_scaled_size;
+ /* Note: at the bottom of the image, we may pass extra garbage row groups
+ * to the postprocessor. The postprocessor has to check for bottom
+ * of image anyway (at row resolution), so no point in us doing it too.
+ */
+
+ /* Feed the postprocessor */
+ (*cinfo->post->post_process_data) (cinfo, mymain->buffer,
+ &mymain->rowgroup_ctr, rowgroups_avail,
+ output_buf, out_row_ctr, out_rows_avail);
+
+ /* Has postprocessor consumed all the data yet? If so, mark buffer empty */
+ if (mymain->rowgroup_ctr >= rowgroups_avail) {
+ mymain->buffer_full = FALSE;
+ mymain->rowgroup_ctr = 0;
+ }
}
@@ -383,67 +383,67 @@ process_data_simple_main (j_decompress_ptr cinfo,
METHODDEF(void)
process_data_context_main (j_decompress_ptr cinfo,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
{
- my_main_ptr mymain = (my_main_ptr) cinfo->main;
-
- /* Read input data if we haven't filled the main buffer yet */
- if (! mymain->buffer_full) {
- if (! (*cinfo->coef->decompress_data) (cinfo,
- mymain->xbuffer[mymain->whichptr]))
- return; /* suspension forced, can do nothing more */
- mymain->buffer_full = TRUE; /* OK, we have an iMCU row to work with */
- mymain->iMCU_row_ctr++; /* count rows received */
- }
-
- /* Postprocessor typically will not swallow all the input data it is handed
- * in one call (due to filling the output buffer first). Must be prepared
- * to exit and restart. This switch lets us keep track of how far we got.
- * Note that each case falls through to the next on successful completion.
- */
- switch (mymain->context_state) {
- case CTX_POSTPONED_ROW:
- /* Call postprocessor using previously set pointers for postponed row */
- (*cinfo->post->post_process_data) (cinfo, mymain->xbuffer[mymain->whichptr],
+ my_main_ptr mymain = (my_main_ptr) cinfo->main;
+
+ /* Read input data if we haven't filled the main buffer yet */
+ if (! mymain->buffer_full) {
+ if (! (*cinfo->coef->decompress_data) (cinfo,
+ mymain->xbuffer[mymain->whichptr]))
+ return; /* suspension forced, can do nothing more */
+ mymain->buffer_full = TRUE; /* OK, we have an iMCU row to work with */
+ mymain->iMCU_row_ctr++; /* count rows received */
+ }
+
+ /* Postprocessor typically will not swallow all the input data it is handed
+ * in one call (due to filling the output buffer first). Must be prepared
+ * to exit and restart. This switch lets us keep track of how far we got.
+ * Note that each case falls through to the next on successful completion.
+ */
+ switch (mymain->context_state) {
+ case CTX_POSTPONED_ROW:
+ /* Call postprocessor using previously set pointers for postponed row */
+ (*cinfo->post->post_process_data) (cinfo, mymain->xbuffer[mymain->whichptr],
&mymain->rowgroup_ctr, mymain->rowgroups_avail,
output_buf, out_row_ctr, out_rows_avail);
- if (mymain->rowgroup_ctr < mymain->rowgroups_avail)
- return; /* Need to suspend */
- mymain->context_state = CTX_PREPARE_FOR_IMCU;
- if (*out_row_ctr >= out_rows_avail)
- return; /* Postprocessor exactly filled output buf */
- /*FALLTHROUGH*/
- case CTX_PREPARE_FOR_IMCU:
- /* Prepare to process first M-1 row groups of this iMCU row */
- mymain->rowgroup_ctr = 0;
- mymain->rowgroups_avail = (JDIMENSION) (cinfo->min_DCT_v_scaled_size - 1);
- /* Check for bottom of image: if so, tweak pointers to "duplicate"
- * the last sample row, and adjust rowgroups_avail to ignore padding rows.
- */
- if (mymain->iMCU_row_ctr == cinfo->total_iMCU_rows)
- set_bottom_pointers(cinfo);
- mymain->context_state = CTX_PROCESS_IMCU;
- /*FALLTHROUGH*/
- case CTX_PROCESS_IMCU:
- /* Call postprocessor using previously set pointers */
- (*cinfo->post->post_process_data) (cinfo, mymain->xbuffer[mymain->whichptr],
+ if (mymain->rowgroup_ctr < mymain->rowgroups_avail)
+ return; /* Need to suspend */
+ mymain->context_state = CTX_PREPARE_FOR_IMCU;
+ if (*out_row_ctr >= out_rows_avail)
+ return; /* Postprocessor exactly filled output buf */
+ /*FALLTHROUGH*/
+ case CTX_PREPARE_FOR_IMCU:
+ /* Prepare to process first M-1 row groups of this iMCU row */
+ mymain->rowgroup_ctr = 0;
+ mymain->rowgroups_avail = (JDIMENSION) (cinfo->min_DCT_v_scaled_size - 1);
+ /* Check for bottom of image: if so, tweak pointers to "duplicate"
+ * the last sample row, and adjust rowgroups_avail to ignore padding rows.
+ */
+ if (mymain->iMCU_row_ctr == cinfo->total_iMCU_rows)
+ set_bottom_pointers(cinfo);
+ mymain->context_state = CTX_PROCESS_IMCU;
+ /*FALLTHROUGH*/
+ case CTX_PROCESS_IMCU:
+ /* Call postprocessor using previously set pointers */
+ (*cinfo->post->post_process_data) (cinfo, mymain->xbuffer[mymain->whichptr],
&mymain->rowgroup_ctr, mymain->rowgroups_avail,
output_buf, out_row_ctr, out_rows_avail);
- if (mymain->rowgroup_ctr < mymain->rowgroups_avail)
- return; /* Need to suspend */
- /* After the first iMCU, change wraparound pointers to normal state */
- if (mymain->iMCU_row_ctr == 1)
- set_wraparound_pointers(cinfo);
- /* Prepare to load new iMCU row using other xbuffer list */
- mymain->whichptr ^= 1; /* 0=>1 or 1=>0 */
- mymain->buffer_full = FALSE;
- /* Still need to process last row group of this iMCU row, */
- /* which is saved at index M+1 of the other xbuffer */
- mymain->rowgroup_ctr = (JDIMENSION) (cinfo->min_DCT_v_scaled_size + 1);
- mymain->rowgroups_avail = (JDIMENSION) (cinfo->min_DCT_v_scaled_size + 2);
- mymain->context_state = CTX_POSTPONED_ROW;
- }
+ if (mymain->rowgroup_ctr < mymain->rowgroups_avail)
+ return; /* Need to suspend */
+ /* After the first iMCU, change wraparound pointers to normal state */
+ if (mymain->iMCU_row_ctr == 1)
+ set_wraparound_pointers(cinfo);
+ /* Prepare to load new iMCU row using other xbuffer list */
+ mymain->whichptr ^= 1; /* 0=>1 or 1=>0 */
+ mymain->buffer_full = FALSE;
+ /* Still need to process last row group of this iMCU row, */
+ /* which is saved at index M+1 of the other xbuffer */
+ mymain->rowgroup_ctr = (JDIMENSION) (cinfo->min_DCT_v_scaled_size + 1);
+ mymain->rowgroups_avail = (JDIMENSION) (cinfo->min_DCT_v_scaled_size + 2);
+ mymain->context_state = CTX_POSTPONED_ROW;
+ }
}
@@ -457,12 +457,12 @@ process_data_context_main (j_decompress_ptr cinfo,
METHODDEF(void)
process_data_crank_post (j_decompress_ptr cinfo,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
{
- (*cinfo->post->post_process_data) (cinfo, (JSAMPIMAGE) NULL,
- (JDIMENSION *) NULL, (JDIMENSION) 0,
- output_buf, out_row_ctr, out_rows_avail);
+ (*cinfo->post->post_process_data) (cinfo, (JSAMPIMAGE) NULL,
+ (JDIMENSION *) NULL, (JDIMENSION) 0,
+ output_buf, out_row_ctr, out_rows_avail);
}
#endif /* QUANT_2PASS_SUPPORTED */
@@ -475,38 +475,38 @@ process_data_crank_post (j_decompress_ptr cinfo,
GLOBAL(void)
jinit_d_main_controller (j_decompress_ptr cinfo, boolean need_full_buffer)
{
- my_main_ptr mymain;
- int ci, rgroup, ngroups;
- jpeg_component_info *compptr;
+ my_main_ptr mymain;
+ int ci, rgroup, ngroups;
+ jpeg_component_info *compptr;
- mymain = (my_main_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ mymain = (my_main_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_main_controller));
- cinfo->main = (struct jpeg_d_main_controller *) mymain;
- mymain->pub.start_pass = start_pass_main;
-
- if (need_full_buffer) /* shouldn't happen */
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
-
- /* Allocate the workspace.
- * ngroups is the number of row groups we need.
- */
- if (cinfo->upsample->need_context_rows) {
- if (cinfo->min_DCT_v_scaled_size < 2) /* unsupported, see comments above */
- ERREXIT(cinfo, JERR_NOTIMPL);
- alloc_funny_pointers(cinfo); /* Alloc space for xbuffer[] lists */
- ngroups = cinfo->min_DCT_v_scaled_size + 2;
- } else {
- ngroups = cinfo->min_DCT_v_scaled_size;
- }
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
- cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
- mymain->buffer[ci] = (*cinfo->mem->alloc_sarray)
+ cinfo->main = (struct jpeg_d_main_controller *) mymain;
+ mymain->pub.start_pass = start_pass_main;
+
+ if (need_full_buffer) /* shouldn't happen */
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+
+ /* Allocate the workspace.
+ * ngroups is the number of row groups we need.
+ */
+ if (cinfo->upsample->need_context_rows) {
+ if (cinfo->min_DCT_v_scaled_size < 2) /* unsupported, see comments above */
+ ERREXIT(cinfo, JERR_NOTIMPL);
+ alloc_funny_pointers(cinfo); /* Alloc space for xbuffer[] lists */
+ ngroups = cinfo->min_DCT_v_scaled_size + 2;
+ } else {
+ ngroups = cinfo->min_DCT_v_scaled_size;
+ }
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ rgroup = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
+ cinfo->min_DCT_v_scaled_size; /* height of a row group of component */
+ mymain->buffer[ci] = (*cinfo->mem->alloc_sarray)
((j_common_ptr) cinfo, JPOOL_IMAGE,
- compptr->width_in_blocks * compptr->DCT_h_scaled_size,
- (JDIMENSION) (rgroup * ngroups));
- }
+ compptr->width_in_blocks * compptr->DCT_h_scaled_size,
+ (JDIMENSION) (rgroup * ngroups));
+ }
}
diff --git a/src/lib/libjpeg/jdmarker.c b/src/lib/libjpeg/jdmarker.c
index a9268370fe3..3a60cde591d 100644
--- a/src/lib/libjpeg/jdmarker.c
+++ b/src/lib/libjpeg/jdmarker.c
@@ -18,91 +18,91 @@
#include "jpeglib.h"
-typedef enum { /* JPEG marker codes */
- M_SOF0 = 0xc0,
- M_SOF1 = 0xc1,
- M_SOF2 = 0xc2,
- M_SOF3 = 0xc3,
-
- M_SOF5 = 0xc5,
- M_SOF6 = 0xc6,
- M_SOF7 = 0xc7,
-
- M_JPG = 0xc8,
- M_SOF9 = 0xc9,
- M_SOF10 = 0xca,
- M_SOF11 = 0xcb,
-
- M_SOF13 = 0xcd,
- M_SOF14 = 0xce,
- M_SOF15 = 0xcf,
-
- M_DHT = 0xc4,
-
- M_DAC = 0xcc,
-
- M_RST0 = 0xd0,
- M_RST1 = 0xd1,
- M_RST2 = 0xd2,
- M_RST3 = 0xd3,
- M_RST4 = 0xd4,
- M_RST5 = 0xd5,
- M_RST6 = 0xd6,
- M_RST7 = 0xd7,
-
- M_SOI = 0xd8,
- M_EOI = 0xd9,
- M_SOS = 0xda,
- M_DQT = 0xdb,
- M_DNL = 0xdc,
- M_DRI = 0xdd,
- M_DHP = 0xde,
- M_EXP = 0xdf,
-
- M_APP0 = 0xe0,
- M_APP1 = 0xe1,
- M_APP2 = 0xe2,
- M_APP3 = 0xe3,
- M_APP4 = 0xe4,
- M_APP5 = 0xe5,
- M_APP6 = 0xe6,
- M_APP7 = 0xe7,
- M_APP8 = 0xe8,
- M_APP9 = 0xe9,
- M_APP10 = 0xea,
- M_APP11 = 0xeb,
- M_APP12 = 0xec,
- M_APP13 = 0xed,
- M_APP14 = 0xee,
- M_APP15 = 0xef,
-
- M_JPG0 = 0xf0,
- M_JPG13 = 0xfd,
- M_COM = 0xfe,
-
- M_TEM = 0x01,
-
- M_ERROR = 0x100
+typedef enum { /* JPEG marker codes */
+ M_SOF0 = 0xc0,
+ M_SOF1 = 0xc1,
+ M_SOF2 = 0xc2,
+ M_SOF3 = 0xc3,
+
+ M_SOF5 = 0xc5,
+ M_SOF6 = 0xc6,
+ M_SOF7 = 0xc7,
+
+ M_JPG = 0xc8,
+ M_SOF9 = 0xc9,
+ M_SOF10 = 0xca,
+ M_SOF11 = 0xcb,
+
+ M_SOF13 = 0xcd,
+ M_SOF14 = 0xce,
+ M_SOF15 = 0xcf,
+
+ M_DHT = 0xc4,
+
+ M_DAC = 0xcc,
+
+ M_RST0 = 0xd0,
+ M_RST1 = 0xd1,
+ M_RST2 = 0xd2,
+ M_RST3 = 0xd3,
+ M_RST4 = 0xd4,
+ M_RST5 = 0xd5,
+ M_RST6 = 0xd6,
+ M_RST7 = 0xd7,
+
+ M_SOI = 0xd8,
+ M_EOI = 0xd9,
+ M_SOS = 0xda,
+ M_DQT = 0xdb,
+ M_DNL = 0xdc,
+ M_DRI = 0xdd,
+ M_DHP = 0xde,
+ M_EXP = 0xdf,
+
+ M_APP0 = 0xe0,
+ M_APP1 = 0xe1,
+ M_APP2 = 0xe2,
+ M_APP3 = 0xe3,
+ M_APP4 = 0xe4,
+ M_APP5 = 0xe5,
+ M_APP6 = 0xe6,
+ M_APP7 = 0xe7,
+ M_APP8 = 0xe8,
+ M_APP9 = 0xe9,
+ M_APP10 = 0xea,
+ M_APP11 = 0xeb,
+ M_APP12 = 0xec,
+ M_APP13 = 0xed,
+ M_APP14 = 0xee,
+ M_APP15 = 0xef,
+
+ M_JPG0 = 0xf0,
+ M_JPG13 = 0xfd,
+ M_COM = 0xfe,
+
+ M_TEM = 0x01,
+
+ M_ERROR = 0x100
} JPEG_MARKER;
/* Private state */
typedef struct {
- struct jpeg_marker_reader pub; /* public fields */
+ struct jpeg_marker_reader pub; /* public fields */
- /* Application-overridable marker processing methods */
- jpeg_marker_parser_method process_COM;
- jpeg_marker_parser_method process_APPn[16];
+ /* Application-overridable marker processing methods */
+ jpeg_marker_parser_method process_COM;
+ jpeg_marker_parser_method process_APPn[16];
- /* Limit on marker data length to save for each marker type */
- unsigned int length_limit_COM;
- unsigned int length_limit_APPn[16];
+ /* Limit on marker data length to save for each marker type */
+ unsigned int length_limit_COM;
+ unsigned int length_limit_APPn[16];
- /* Status of COM/APPn marker saving */
- jpeg_saved_marker_ptr cur_marker; /* NULL if not processing a marker */
- unsigned int bytes_read; /* data bytes read so far in marker */
- /* Note: cur_marker is not linked into marker_list until it's all read. */
+ /* Status of COM/APPn marker saving */
+ jpeg_saved_marker_ptr cur_marker; /* NULL if not processing a marker */
+ unsigned int bytes_read; /* data bytes read so far in marker */
+ /* Note: cur_marker is not linked into marker_list until it's all read. */
} my_marker_reader;
typedef my_marker_reader * my_marker_ptr;
@@ -125,12 +125,12 @@ typedef my_marker_reader * my_marker_ptr;
/* Unload the local copies --- do this only at a restart boundary */
#define INPUT_SYNC(cinfo) \
( datasrc->next_input_byte = next_input_byte, \
- datasrc->bytes_in_buffer = bytes_in_buffer )
+ datasrc->bytes_in_buffer = bytes_in_buffer )
/* Reload the local copies --- used only in MAKE_BYTE_AVAIL */
#define INPUT_RELOAD(cinfo) \
( next_input_byte = datasrc->next_input_byte, \
- bytes_in_buffer = datasrc->bytes_in_buffer )
+ bytes_in_buffer = datasrc->bytes_in_buffer )
/* Internal macro for INPUT_BYTE and INPUT_2BYTES: make a byte available.
* Note we do *not* do INPUT_SYNC before calling fill_input_buffer,
@@ -138,9 +138,9 @@ typedef my_marker_reader * my_marker_ptr;
*/
#define MAKE_BYTE_AVAIL(cinfo,action) \
if (bytes_in_buffer == 0) { \
- if (! (*datasrc->fill_input_buffer) (cinfo)) \
- { action; } \
- INPUT_RELOAD(cinfo); \
+ if (! (*datasrc->fill_input_buffer) (cinfo)) \
+ { action; } \
+ INPUT_RELOAD(cinfo); \
}
/* Read a byte into variable V.
@@ -148,19 +148,19 @@ typedef my_marker_reader * my_marker_ptr;
*/
#define INPUT_BYTE(cinfo,V,action) \
MAKESTMT( MAKE_BYTE_AVAIL(cinfo,action); \
- bytes_in_buffer--; \
- V = GETJOCTET(*next_input_byte++); )
+ bytes_in_buffer--; \
+ V = GETJOCTET(*next_input_byte++); )
/* As above, but read two bytes interpreted as an unsigned 16-bit integer.
* V should be declared unsigned int or perhaps INT32.
*/
#define INPUT_2BYTES(cinfo,V,action) \
MAKESTMT( MAKE_BYTE_AVAIL(cinfo,action); \
- bytes_in_buffer--; \
- V = ((unsigned int) GETJOCTET(*next_input_byte++)) << 8; \
- MAKE_BYTE_AVAIL(cinfo,action); \
- bytes_in_buffer--; \
- V += GETJOCTET(*next_input_byte++); )
+ bytes_in_buffer--; \
+ V = ((unsigned int) GETJOCTET(*next_input_byte++)) << 8; \
+ MAKE_BYTE_AVAIL(cinfo,action); \
+ bytes_in_buffer--; \
+ V += GETJOCTET(*next_input_byte++); )
/*
@@ -198,105 +198,105 @@ LOCAL(boolean)
get_soi (j_decompress_ptr cinfo)
/* Process an SOI marker */
{
- int i;
+ int i;
- TRACEMS(cinfo, 1, JTRC_SOI);
+ TRACEMS(cinfo, 1, JTRC_SOI);
- if (cinfo->marker->saw_SOI)
- ERREXIT(cinfo, JERR_SOI_DUPLICATE);
+ if (cinfo->marker->saw_SOI)
+ ERREXIT(cinfo, JERR_SOI_DUPLICATE);
- /* Reset all parameters that are defined to be reset by SOI */
+ /* Reset all parameters that are defined to be reset by SOI */
- for (i = 0; i < NUM_ARITH_TBLS; i++) {
- cinfo->arith_dc_L[i] = 0;
- cinfo->arith_dc_U[i] = 1;
- cinfo->arith_ac_K[i] = 5;
- }
- cinfo->restart_interval = 0;
+ for (i = 0; i < NUM_ARITH_TBLS; i++) {
+ cinfo->arith_dc_L[i] = 0;
+ cinfo->arith_dc_U[i] = 1;
+ cinfo->arith_ac_K[i] = 5;
+ }
+ cinfo->restart_interval = 0;
- /* Set initial assumptions for colorspace etc */
+ /* Set initial assumptions for colorspace etc */
- cinfo->jpeg_color_space = JCS_UNKNOWN;
- cinfo->CCIR601_sampling = FALSE; /* Assume non-CCIR sampling??? */
+ cinfo->jpeg_color_space = JCS_UNKNOWN;
+ cinfo->CCIR601_sampling = FALSE; /* Assume non-CCIR sampling??? */
- cinfo->saw_JFIF_marker = FALSE;
- cinfo->JFIF_major_version = 1; /* set default JFIF APP0 values */
- cinfo->JFIF_minor_version = 1;
- cinfo->density_unit = 0;
- cinfo->X_density = 1;
- cinfo->Y_density = 1;
- cinfo->saw_Adobe_marker = FALSE;
- cinfo->Adobe_transform = 0;
+ cinfo->saw_JFIF_marker = FALSE;
+ cinfo->JFIF_major_version = 1; /* set default JFIF APP0 values */
+ cinfo->JFIF_minor_version = 1;
+ cinfo->density_unit = 0;
+ cinfo->X_density = 1;
+ cinfo->Y_density = 1;
+ cinfo->saw_Adobe_marker = FALSE;
+ cinfo->Adobe_transform = 0;
- cinfo->marker->saw_SOI = TRUE;
+ cinfo->marker->saw_SOI = TRUE;
- return TRUE;
+ return TRUE;
}
LOCAL(boolean)
get_sof (j_decompress_ptr cinfo, boolean is_baseline, boolean is_prog,
- boolean is_arith)
+ boolean is_arith)
/* Process a SOFn marker */
{
- INT32 length;
- int c, ci;
- jpeg_component_info * compptr;
- INPUT_VARS(cinfo);
+ INT32 length;
+ int c, ci;
+ jpeg_component_info * compptr;
+ INPUT_VARS(cinfo);
- cinfo->is_baseline = is_baseline;
- cinfo->progressive_mode = is_prog;
- cinfo->arith_code = is_arith;
+ cinfo->is_baseline = is_baseline;
+ cinfo->progressive_mode = is_prog;
+ cinfo->arith_code = is_arith;
- INPUT_2BYTES(cinfo, length, return FALSE);
+ INPUT_2BYTES(cinfo, length, return FALSE);
- INPUT_BYTE(cinfo, cinfo->data_precision, return FALSE);
- INPUT_2BYTES(cinfo, cinfo->image_height, return FALSE);
- INPUT_2BYTES(cinfo, cinfo->image_width, return FALSE);
- INPUT_BYTE(cinfo, cinfo->num_components, return FALSE);
+ INPUT_BYTE(cinfo, cinfo->data_precision, return FALSE);
+ INPUT_2BYTES(cinfo, cinfo->image_height, return FALSE);
+ INPUT_2BYTES(cinfo, cinfo->image_width, return FALSE);
+ INPUT_BYTE(cinfo, cinfo->num_components, return FALSE);
- length -= 8;
+ length -= 8;
- TRACEMS4(cinfo, 1, JTRC_SOF, cinfo->unread_marker,
- (int) cinfo->image_width, (int) cinfo->image_height,
- cinfo->num_components);
+ TRACEMS4(cinfo, 1, JTRC_SOF, cinfo->unread_marker,
+ (int) cinfo->image_width, (int) cinfo->image_height,
+ cinfo->num_components);
- if (cinfo->marker->saw_SOF)
- ERREXIT(cinfo, JERR_SOF_DUPLICATE);
+ if (cinfo->marker->saw_SOF)
+ ERREXIT(cinfo, JERR_SOF_DUPLICATE);
- /* We don't support files in which the image height is initially specified */
- /* as 0 and is later redefined by DNL. As long as we have to check that, */
- /* might as well have a general sanity check. */
- if (cinfo->image_height <= 0 || cinfo->image_width <= 0
- || cinfo->num_components <= 0)
- ERREXIT(cinfo, JERR_EMPTY_IMAGE);
+ /* We don't support files in which the image height is initially specified */
+ /* as 0 and is later redefined by DNL. As long as we have to check that, */
+ /* might as well have a general sanity check. */
+ if (cinfo->image_height <= 0 || cinfo->image_width <= 0
+ || cinfo->num_components <= 0)
+ ERREXIT(cinfo, JERR_EMPTY_IMAGE);
- if (length != (cinfo->num_components * 3))
- ERREXIT(cinfo, JERR_BAD_LENGTH);
+ if (length != (cinfo->num_components * 3))
+ ERREXIT(cinfo, JERR_BAD_LENGTH);
- if (cinfo->comp_info == NULL) /* do only once, even if suspend */
- cinfo->comp_info = (jpeg_component_info *) (*cinfo->mem->alloc_small)
+ if (cinfo->comp_info == NULL) /* do only once, even if suspend */
+ cinfo->comp_info = (jpeg_component_info *) (*cinfo->mem->alloc_small)
((j_common_ptr) cinfo, JPOOL_IMAGE,
- cinfo->num_components * SIZEOF(jpeg_component_info));
-
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- compptr->component_index = ci;
- INPUT_BYTE(cinfo, compptr->component_id, return FALSE);
- INPUT_BYTE(cinfo, c, return FALSE);
- compptr->h_samp_factor = (c >> 4) & 15;
- compptr->v_samp_factor = (c ) & 15;
- INPUT_BYTE(cinfo, compptr->quant_tbl_no, return FALSE);
-
- TRACEMS4(cinfo, 1, JTRC_SOF_COMPONENT,
- compptr->component_id, compptr->h_samp_factor,
- compptr->v_samp_factor, compptr->quant_tbl_no);
- }
-
- cinfo->marker->saw_SOF = TRUE;
-
- INPUT_SYNC(cinfo);
- return TRUE;
+ cinfo->num_components * SIZEOF(jpeg_component_info));
+
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ compptr->component_index = ci;
+ INPUT_BYTE(cinfo, compptr->component_id, return FALSE);
+ INPUT_BYTE(cinfo, c, return FALSE);
+ compptr->h_samp_factor = (c >> 4) & 15;
+ compptr->v_samp_factor = (c ) & 15;
+ INPUT_BYTE(cinfo, compptr->quant_tbl_no, return FALSE);
+
+ TRACEMS4(cinfo, 1, JTRC_SOF_COMPONENT,
+ compptr->component_id, compptr->h_samp_factor,
+ compptr->v_samp_factor, compptr->quant_tbl_no);
+ }
+
+ cinfo->marker->saw_SOF = TRUE;
+
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
@@ -304,71 +304,71 @@ LOCAL(boolean)
get_sos (j_decompress_ptr cinfo)
/* Process a SOS marker */
{
- INT32 length;
- int i, ci, n, c, cc;
- jpeg_component_info * compptr;
- INPUT_VARS(cinfo);
+ INT32 length;
+ int i, ci, n, c, cc;
+ jpeg_component_info * compptr;
+ INPUT_VARS(cinfo);
- if (! cinfo->marker->saw_SOF)
- ERREXIT(cinfo, JERR_SOS_NO_SOF);
+ if (! cinfo->marker->saw_SOF)
+ ERREXIT(cinfo, JERR_SOS_NO_SOF);
- INPUT_2BYTES(cinfo, length, return FALSE);
+ INPUT_2BYTES(cinfo, length, return FALSE);
- INPUT_BYTE(cinfo, n, return FALSE); /* Number of components */
+ INPUT_BYTE(cinfo, n, return FALSE); /* Number of components */
- TRACEMS1(cinfo, 1, JTRC_SOS, n);
+ TRACEMS1(cinfo, 1, JTRC_SOS, n);
- if (length != (n * 2 + 6) || n > MAX_COMPS_IN_SCAN ||
- (n == 0 && !cinfo->progressive_mode))
- /* pseudo SOS marker only allowed in progressive mode */
- ERREXIT(cinfo, JERR_BAD_LENGTH);
+ if (length != (n * 2 + 6) || n > MAX_COMPS_IN_SCAN ||
+ (n == 0 && !cinfo->progressive_mode))
+ /* pseudo SOS marker only allowed in progressive mode */
+ ERREXIT(cinfo, JERR_BAD_LENGTH);
- cinfo->comps_in_scan = n;
+ cinfo->comps_in_scan = n;
- /* Collect the component-spec parameters */
+ /* Collect the component-spec parameters */
- for (i = 0; i < n; i++) {
- INPUT_BYTE(cinfo, cc, return FALSE);
- INPUT_BYTE(cinfo, c, return FALSE);
+ for (i = 0; i < n; i++) {
+ INPUT_BYTE(cinfo, cc, return FALSE);
+ INPUT_BYTE(cinfo, c, return FALSE);
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- if (cc == compptr->component_id)
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ if (cc == compptr->component_id)
goto id_found;
- }
+ }
- ERREXIT1(cinfo, JERR_BAD_COMPONENT_ID, cc);
+ ERREXIT1(cinfo, JERR_BAD_COMPONENT_ID, cc);
- id_found:
+ id_found:
- cinfo->cur_comp_info[i] = compptr;
- compptr->dc_tbl_no = (c >> 4) & 15;
- compptr->ac_tbl_no = (c ) & 15;
+ cinfo->cur_comp_info[i] = compptr;
+ compptr->dc_tbl_no = (c >> 4) & 15;
+ compptr->ac_tbl_no = (c ) & 15;
- TRACEMS3(cinfo, 1, JTRC_SOS_COMPONENT, cc,
- compptr->dc_tbl_no, compptr->ac_tbl_no);
- }
+ TRACEMS3(cinfo, 1, JTRC_SOS_COMPONENT, cc,
+ compptr->dc_tbl_no, compptr->ac_tbl_no);
+ }
- /* Collect the additional scan parameters Ss, Se, Ah/Al. */
- INPUT_BYTE(cinfo, c, return FALSE);
- cinfo->Ss = c;
- INPUT_BYTE(cinfo, c, return FALSE);
- cinfo->Se = c;
- INPUT_BYTE(cinfo, c, return FALSE);
- cinfo->Ah = (c >> 4) & 15;
- cinfo->Al = (c ) & 15;
+ /* Collect the additional scan parameters Ss, Se, Ah/Al. */
+ INPUT_BYTE(cinfo, c, return FALSE);
+ cinfo->Ss = c;
+ INPUT_BYTE(cinfo, c, return FALSE);
+ cinfo->Se = c;
+ INPUT_BYTE(cinfo, c, return FALSE);
+ cinfo->Ah = (c >> 4) & 15;
+ cinfo->Al = (c ) & 15;
- TRACEMS4(cinfo, 1, JTRC_SOS_PARAMS, cinfo->Ss, cinfo->Se,
- cinfo->Ah, cinfo->Al);
+ TRACEMS4(cinfo, 1, JTRC_SOS_PARAMS, cinfo->Ss, cinfo->Se,
+ cinfo->Ah, cinfo->Al);
- /* Prepare to scan data & restart markers */
- cinfo->marker->next_restart_num = 0;
+ /* Prepare to scan data & restart markers */
+ cinfo->marker->next_restart_num = 0;
- /* Count another (non-pseudo) SOS marker */
- if (n) cinfo->input_scan_number++;
+ /* Count another (non-pseudo) SOS marker */
+ if (n) cinfo->input_scan_number++;
- INPUT_SYNC(cinfo);
- return TRUE;
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
@@ -378,39 +378,39 @@ LOCAL(boolean)
get_dac (j_decompress_ptr cinfo)
/* Process a DAC marker */
{
- INT32 length;
- int index, val;
- INPUT_VARS(cinfo);
+ INT32 length;
+ int index, val;
+ INPUT_VARS(cinfo);
- INPUT_2BYTES(cinfo, length, return FALSE);
- length -= 2;
+ INPUT_2BYTES(cinfo, length, return FALSE);
+ length -= 2;
- while (length > 0) {
- INPUT_BYTE(cinfo, index, return FALSE);
- INPUT_BYTE(cinfo, val, return FALSE);
+ while (length > 0) {
+ INPUT_BYTE(cinfo, index, return FALSE);
+ INPUT_BYTE(cinfo, val, return FALSE);
- length -= 2;
+ length -= 2;
- TRACEMS2(cinfo, 1, JTRC_DAC, index, val);
+ TRACEMS2(cinfo, 1, JTRC_DAC, index, val);
- if (index < 0 || index >= (2*NUM_ARITH_TBLS))
- ERREXIT1(cinfo, JERR_DAC_INDEX, index);
+ if (index < 0 || index >= (2*NUM_ARITH_TBLS))
+ ERREXIT1(cinfo, JERR_DAC_INDEX, index);
- if (index >= NUM_ARITH_TBLS) { /* define AC table */
- cinfo->arith_ac_K[index-NUM_ARITH_TBLS] = (UINT8) val;
- } else { /* define DC table */
- cinfo->arith_dc_L[index] = (UINT8) (val & 0x0F);
- cinfo->arith_dc_U[index] = (UINT8) (val >> 4);
- if (cinfo->arith_dc_L[index] > cinfo->arith_dc_U[index])
+ if (index >= NUM_ARITH_TBLS) { /* define AC table */
+ cinfo->arith_ac_K[index-NUM_ARITH_TBLS] = (UINT8) val;
+ } else { /* define DC table */
+ cinfo->arith_dc_L[index] = (UINT8) (val & 0x0F);
+ cinfo->arith_dc_U[index] = (UINT8) (val >> 4);
+ if (cinfo->arith_dc_L[index] > cinfo->arith_dc_U[index])
ERREXIT1(cinfo, JERR_DAC_VALUE, val);
- }
- }
+ }
+ }
- if (length != 0)
- ERREXIT(cinfo, JERR_BAD_LENGTH);
+ if (length != 0)
+ ERREXIT(cinfo, JERR_BAD_LENGTH);
- INPUT_SYNC(cinfo);
- return TRUE;
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
#else /* ! D_ARITH_CODING_SUPPORTED */
@@ -424,70 +424,70 @@ LOCAL(boolean)
get_dht (j_decompress_ptr cinfo)
/* Process a DHT marker */
{
- INT32 length;
- UINT8 bits[17];
- UINT8 huffval[256];
- int i, index, count;
- JHUFF_TBL **htblptr;
- INPUT_VARS(cinfo);
-
- INPUT_2BYTES(cinfo, length, return FALSE);
- length -= 2;
-
- while (length > 16) {
- INPUT_BYTE(cinfo, index, return FALSE);
-
- TRACEMS1(cinfo, 1, JTRC_DHT, index);
-
- bits[0] = 0;
- count = 0;
- for (i = 1; i <= 16; i++) {
- INPUT_BYTE(cinfo, bits[i], return FALSE);
- count += bits[i];
- }
-
- length -= 1 + 16;
-
- TRACEMS8(cinfo, 2, JTRC_HUFFBITS,
- bits[1], bits[2], bits[3], bits[4],
- bits[5], bits[6], bits[7], bits[8]);
- TRACEMS8(cinfo, 2, JTRC_HUFFBITS,
- bits[9], bits[10], bits[11], bits[12],
- bits[13], bits[14], bits[15], bits[16]);
-
- /* Here we just do minimal validation of the counts to avoid walking
- * off the end of our table space. jdhuff.c will check more carefully.
- */
- if (count > 256 || ((INT32) count) > length)
- ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
-
- for (i = 0; i < count; i++)
- INPUT_BYTE(cinfo, huffval[i], return FALSE);
-
- length -= count;
-
- if (index & 0x10) { /* AC table definition */
- index -= 0x10;
- htblptr = &cinfo->ac_huff_tbl_ptrs[index];
- } else { /* DC table definition */
- htblptr = &cinfo->dc_huff_tbl_ptrs[index];
- }
-
- if (index < 0 || index >= NUM_HUFF_TBLS)
- ERREXIT1(cinfo, JERR_DHT_INDEX, index);
-
- if (*htblptr == NULL)
- *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
-
- MEMCOPY((*htblptr)->bits, bits, SIZEOF((*htblptr)->bits));
- MEMCOPY((*htblptr)->huffval, huffval, SIZEOF((*htblptr)->huffval));
- }
-
- if (length != 0)
- ERREXIT(cinfo, JERR_BAD_LENGTH);
-
- INPUT_SYNC(cinfo);
- return TRUE;
+ INT32 length;
+ UINT8 bits[17];
+ UINT8 huffval[256];
+ int i, index, count;
+ JHUFF_TBL **htblptr;
+ INPUT_VARS(cinfo);
+
+ INPUT_2BYTES(cinfo, length, return FALSE);
+ length -= 2;
+
+ while (length > 16) {
+ INPUT_BYTE(cinfo, index, return FALSE);
+
+ TRACEMS1(cinfo, 1, JTRC_DHT, index);
+
+ bits[0] = 0;
+ count = 0;
+ for (i = 1; i <= 16; i++) {
+ INPUT_BYTE(cinfo, bits[i], return FALSE);
+ count += bits[i];
+ }
+
+ length -= 1 + 16;
+
+ TRACEMS8(cinfo, 2, JTRC_HUFFBITS,
+ bits[1], bits[2], bits[3], bits[4],
+ bits[5], bits[6], bits[7], bits[8]);
+ TRACEMS8(cinfo, 2, JTRC_HUFFBITS,
+ bits[9], bits[10], bits[11], bits[12],
+ bits[13], bits[14], bits[15], bits[16]);
+
+ /* Here we just do minimal validation of the counts to avoid walking
+ * off the end of our table space. jdhuff.c will check more carefully.
+ */
+ if (count > 256 || ((INT32) count) > length)
+ ERREXIT(cinfo, JERR_BAD_HUFF_TABLE);
+
+ for (i = 0; i < count; i++)
+ INPUT_BYTE(cinfo, huffval[i], return FALSE);
+
+ length -= count;
+
+ if (index & 0x10) { /* AC table definition */
+ index -= 0x10;
+ htblptr = &cinfo->ac_huff_tbl_ptrs[index];
+ } else { /* DC table definition */
+ htblptr = &cinfo->dc_huff_tbl_ptrs[index];
+ }
+
+ if (index < 0 || index >= NUM_HUFF_TBLS)
+ ERREXIT1(cinfo, JERR_DHT_INDEX, index);
+
+ if (*htblptr == NULL)
+ *htblptr = jpeg_alloc_huff_table((j_common_ptr) cinfo);
+
+ MEMCOPY((*htblptr)->bits, bits, SIZEOF((*htblptr)->bits));
+ MEMCOPY((*htblptr)->huffval, huffval, SIZEOF((*htblptr)->huffval));
+ }
+
+ if (length != 0)
+ ERREXIT(cinfo, JERR_BAD_LENGTH);
+
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
@@ -495,89 +495,89 @@ LOCAL(boolean)
get_dqt (j_decompress_ptr cinfo)
/* Process a DQT marker */
{
- INT32 length, count, i;
- int n, prec;
- unsigned int tmp;
- JQUANT_TBL *quant_ptr;
- const int *natural_order;
- INPUT_VARS(cinfo);
+ INT32 length, count, i;
+ int n, prec;
+ unsigned int tmp;
+ JQUANT_TBL *quant_ptr;
+ const int *natural_order;
+ INPUT_VARS(cinfo);
- INPUT_2BYTES(cinfo, length, return FALSE);
- length -= 2;
+ INPUT_2BYTES(cinfo, length, return FALSE);
+ length -= 2;
- while (length > 0) {
- length--;
- INPUT_BYTE(cinfo, n, return FALSE);
- prec = n >> 4;
- n &= 0x0F;
+ while (length > 0) {
+ length--;
+ INPUT_BYTE(cinfo, n, return FALSE);
+ prec = n >> 4;
+ n &= 0x0F;
- TRACEMS2(cinfo, 1, JTRC_DQT, n, prec);
+ TRACEMS2(cinfo, 1, JTRC_DQT, n, prec);
- if (n >= NUM_QUANT_TBLS)
- ERREXIT1(cinfo, JERR_DQT_INDEX, n);
+ if (n >= NUM_QUANT_TBLS)
+ ERREXIT1(cinfo, JERR_DQT_INDEX, n);
- if (cinfo->quant_tbl_ptrs[n] == NULL)
- cinfo->quant_tbl_ptrs[n] = jpeg_alloc_quant_table((j_common_ptr) cinfo);
- quant_ptr = cinfo->quant_tbl_ptrs[n];
+ if (cinfo->quant_tbl_ptrs[n] == NULL)
+ cinfo->quant_tbl_ptrs[n] = jpeg_alloc_quant_table((j_common_ptr) cinfo);
+ quant_ptr = cinfo->quant_tbl_ptrs[n];
- if (prec) {
- if (length < DCTSIZE2 * 2) {
+ if (prec) {
+ if (length < DCTSIZE2 * 2) {
/* Initialize full table for safety. */
for (i = 0; i < DCTSIZE2; i++) {
- quant_ptr->quantval[i] = 1;
+ quant_ptr->quantval[i] = 1;
}
count = length >> 1;
- } else
+ } else
count = DCTSIZE2;
- } else {
- if (length < DCTSIZE2) {
+ } else {
+ if (length < DCTSIZE2) {
/* Initialize full table for safety. */
for (i = 0; i < DCTSIZE2; i++) {
- quant_ptr->quantval[i] = 1;
+ quant_ptr->quantval[i] = 1;
}
count = length;
- } else
+ } else
count = DCTSIZE2;
- }
-
- switch (count) {
- case (2*2): natural_order = jpeg_natural_order2; break;
- case (3*3): natural_order = jpeg_natural_order3; break;
- case (4*4): natural_order = jpeg_natural_order4; break;
- case (5*5): natural_order = jpeg_natural_order5; break;
- case (6*6): natural_order = jpeg_natural_order6; break;
- case (7*7): natural_order = jpeg_natural_order7; break;
- default: natural_order = jpeg_natural_order; break;
- }
-
- for (i = 0; i < count; i++) {
- if (prec)
+ }
+
+ switch (count) {
+ case (2*2): natural_order = jpeg_natural_order2; break;
+ case (3*3): natural_order = jpeg_natural_order3; break;
+ case (4*4): natural_order = jpeg_natural_order4; break;
+ case (5*5): natural_order = jpeg_natural_order5; break;
+ case (6*6): natural_order = jpeg_natural_order6; break;
+ case (7*7): natural_order = jpeg_natural_order7; break;
+ default: natural_order = jpeg_natural_order; break;
+ }
+
+ for (i = 0; i < count; i++) {
+ if (prec)
INPUT_2BYTES(cinfo, tmp, return FALSE);
- else
+ else
INPUT_BYTE(cinfo, tmp, return FALSE);
- /* We convert the zigzag-order table to natural array order. */
- quant_ptr->quantval[natural_order[i]] = (UINT16) tmp;
- }
+ /* We convert the zigzag-order table to natural array order. */
+ quant_ptr->quantval[natural_order[i]] = (UINT16) tmp;
+ }
- if (cinfo->err->trace_level >= 2) {
- for (i = 0; i < DCTSIZE2; i += 8) {
+ if (cinfo->err->trace_level >= 2) {
+ for (i = 0; i < DCTSIZE2; i += 8) {
TRACEMS8(cinfo, 2, JTRC_QUANTVALS,
- quant_ptr->quantval[i], quant_ptr->quantval[i+1],
- quant_ptr->quantval[i+2], quant_ptr->quantval[i+3],
- quant_ptr->quantval[i+4], quant_ptr->quantval[i+5],
- quant_ptr->quantval[i+6], quant_ptr->quantval[i+7]);
- }
- }
-
- length -= count;
- if (prec) length -= count;
- }
-
- if (length != 0)
- ERREXIT(cinfo, JERR_BAD_LENGTH);
-
- INPUT_SYNC(cinfo);
- return TRUE;
+ quant_ptr->quantval[i], quant_ptr->quantval[i+1],
+ quant_ptr->quantval[i+2], quant_ptr->quantval[i+3],
+ quant_ptr->quantval[i+4], quant_ptr->quantval[i+5],
+ quant_ptr->quantval[i+6], quant_ptr->quantval[i+7]);
+ }
+ }
+
+ length -= count;
+ if (prec) length -= count;
+ }
+
+ if (length != 0)
+ ERREXIT(cinfo, JERR_BAD_LENGTH);
+
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
@@ -585,23 +585,23 @@ LOCAL(boolean)
get_dri (j_decompress_ptr cinfo)
/* Process a DRI marker */
{
- INT32 length;
- unsigned int tmp;
- INPUT_VARS(cinfo);
+ INT32 length;
+ unsigned int tmp;
+ INPUT_VARS(cinfo);
- INPUT_2BYTES(cinfo, length, return FALSE);
+ INPUT_2BYTES(cinfo, length, return FALSE);
- if (length != 4)
- ERREXIT(cinfo, JERR_BAD_LENGTH);
+ if (length != 4)
+ ERREXIT(cinfo, JERR_BAD_LENGTH);
- INPUT_2BYTES(cinfo, tmp, return FALSE);
+ INPUT_2BYTES(cinfo, tmp, return FALSE);
- TRACEMS1(cinfo, 1, JTRC_DRI, tmp);
+ TRACEMS1(cinfo, 1, JTRC_DRI, tmp);
- cinfo->restart_interval = tmp;
+ cinfo->restart_interval = tmp;
- INPUT_SYNC(cinfo);
- return TRUE;
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
@@ -612,115 +612,115 @@ get_dri (j_decompress_ptr cinfo)
* JFIF and Adobe markers, respectively.
*/
-#define APP0_DATA_LEN 14 /* Length of interesting data in APP0 */
-#define APP14_DATA_LEN 12 /* Length of interesting data in APP14 */
-#define APPN_DATA_LEN 14 /* Must be the largest of the above!! */
+#define APP0_DATA_LEN 14 /* Length of interesting data in APP0 */
+#define APP14_DATA_LEN 12 /* Length of interesting data in APP14 */
+#define APPN_DATA_LEN 14 /* Must be the largest of the above!! */
LOCAL(void)
examine_app0 (j_decompress_ptr cinfo, JOCTET FAR * data,
- unsigned int datalen, INT32 remaining)
+ unsigned int datalen, INT32 remaining)
/* Examine first few bytes from an APP0.
* Take appropriate action if it is a JFIF marker.
* datalen is # of bytes at data[], remaining is length of rest of marker data.
*/
{
- INT32 totallen = (INT32) datalen + remaining;
-
- if (datalen >= APP0_DATA_LEN &&
- GETJOCTET(data[0]) == 0x4A &&
- GETJOCTET(data[1]) == 0x46 &&
- GETJOCTET(data[2]) == 0x49 &&
- GETJOCTET(data[3]) == 0x46 &&
- GETJOCTET(data[4]) == 0) {
- /* Found JFIF APP0 marker: save info */
- cinfo->saw_JFIF_marker = TRUE;
- cinfo->JFIF_major_version = GETJOCTET(data[5]);
- cinfo->JFIF_minor_version = GETJOCTET(data[6]);
- cinfo->density_unit = GETJOCTET(data[7]);
- cinfo->X_density = (GETJOCTET(data[8]) << 8) + GETJOCTET(data[9]);
- cinfo->Y_density = (GETJOCTET(data[10]) << 8) + GETJOCTET(data[11]);
- /* Check version.
- * Major version must be 1, anything else signals an incompatible change.
- * (We used to treat this as an error, but now it's a nonfatal warning,
- * because some bozo at Hijaak couldn't read the spec.)
- * Minor version should be 0..2, but process anyway if newer.
- */
- if (cinfo->JFIF_major_version != 1)
- WARNMS2(cinfo, JWRN_JFIF_MAJOR,
- cinfo->JFIF_major_version, cinfo->JFIF_minor_version);
- /* Generate trace messages */
- TRACEMS5(cinfo, 1, JTRC_JFIF,
- cinfo->JFIF_major_version, cinfo->JFIF_minor_version,
- cinfo->X_density, cinfo->Y_density, cinfo->density_unit);
- /* Validate thumbnail dimensions and issue appropriate messages */
- if (GETJOCTET(data[12]) | GETJOCTET(data[13]))
- TRACEMS2(cinfo, 1, JTRC_JFIF_THUMBNAIL,
- GETJOCTET(data[12]), GETJOCTET(data[13]));
- totallen -= APP0_DATA_LEN;
- if (totallen !=
+ INT32 totallen = (INT32) datalen + remaining;
+
+ if (datalen >= APP0_DATA_LEN &&
+ GETJOCTET(data[0]) == 0x4A &&
+ GETJOCTET(data[1]) == 0x46 &&
+ GETJOCTET(data[2]) == 0x49 &&
+ GETJOCTET(data[3]) == 0x46 &&
+ GETJOCTET(data[4]) == 0) {
+ /* Found JFIF APP0 marker: save info */
+ cinfo->saw_JFIF_marker = TRUE;
+ cinfo->JFIF_major_version = GETJOCTET(data[5]);
+ cinfo->JFIF_minor_version = GETJOCTET(data[6]);
+ cinfo->density_unit = GETJOCTET(data[7]);
+ cinfo->X_density = (GETJOCTET(data[8]) << 8) + GETJOCTET(data[9]);
+ cinfo->Y_density = (GETJOCTET(data[10]) << 8) + GETJOCTET(data[11]);
+ /* Check version.
+ * Major version must be 1, anything else signals an incompatible change.
+ * (We used to treat this as an error, but now it's a nonfatal warning,
+ * because some bozo at Hijaak couldn't read the spec.)
+ * Minor version should be 0..2, but process anyway if newer.
+ */
+ if (cinfo->JFIF_major_version != 1)
+ WARNMS2(cinfo, JWRN_JFIF_MAJOR,
+ cinfo->JFIF_major_version, cinfo->JFIF_minor_version);
+ /* Generate trace messages */
+ TRACEMS5(cinfo, 1, JTRC_JFIF,
+ cinfo->JFIF_major_version, cinfo->JFIF_minor_version,
+ cinfo->X_density, cinfo->Y_density, cinfo->density_unit);
+ /* Validate thumbnail dimensions and issue appropriate messages */
+ if (GETJOCTET(data[12]) | GETJOCTET(data[13]))
+ TRACEMS2(cinfo, 1, JTRC_JFIF_THUMBNAIL,
+ GETJOCTET(data[12]), GETJOCTET(data[13]));
+ totallen -= APP0_DATA_LEN;
+ if (totallen !=
((INT32)GETJOCTET(data[12]) * (INT32)GETJOCTET(data[13]) * (INT32) 3))
- TRACEMS1(cinfo, 1, JTRC_JFIF_BADTHUMBNAILSIZE, (int) totallen);
- } else if (datalen >= 6 &&
- GETJOCTET(data[0]) == 0x4A &&
- GETJOCTET(data[1]) == 0x46 &&
- GETJOCTET(data[2]) == 0x58 &&
- GETJOCTET(data[3]) == 0x58 &&
- GETJOCTET(data[4]) == 0) {
- /* Found JFIF "JFXX" extension APP0 marker */
- /* The library doesn't actually do anything with these,
- * but we try to produce a helpful trace message.
- */
- switch (GETJOCTET(data[5])) {
- case 0x10:
- TRACEMS1(cinfo, 1, JTRC_THUMB_JPEG, (int) totallen);
- break;
- case 0x11:
- TRACEMS1(cinfo, 1, JTRC_THUMB_PALETTE, (int) totallen);
- break;
- case 0x13:
- TRACEMS1(cinfo, 1, JTRC_THUMB_RGB, (int) totallen);
- break;
- default:
- TRACEMS2(cinfo, 1, JTRC_JFIF_EXTENSION,
- GETJOCTET(data[5]), (int) totallen);
- break;
- }
- } else {
- /* Start of APP0 does not match "JFIF" or "JFXX", or too short */
- TRACEMS1(cinfo, 1, JTRC_APP0, (int) totallen);
- }
+ TRACEMS1(cinfo, 1, JTRC_JFIF_BADTHUMBNAILSIZE, (int) totallen);
+ } else if (datalen >= 6 &&
+ GETJOCTET(data[0]) == 0x4A &&
+ GETJOCTET(data[1]) == 0x46 &&
+ GETJOCTET(data[2]) == 0x58 &&
+ GETJOCTET(data[3]) == 0x58 &&
+ GETJOCTET(data[4]) == 0) {
+ /* Found JFIF "JFXX" extension APP0 marker */
+ /* The library doesn't actually do anything with these,
+ * but we try to produce a helpful trace message.
+ */
+ switch (GETJOCTET(data[5])) {
+ case 0x10:
+ TRACEMS1(cinfo, 1, JTRC_THUMB_JPEG, (int) totallen);
+ break;
+ case 0x11:
+ TRACEMS1(cinfo, 1, JTRC_THUMB_PALETTE, (int) totallen);
+ break;
+ case 0x13:
+ TRACEMS1(cinfo, 1, JTRC_THUMB_RGB, (int) totallen);
+ break;
+ default:
+ TRACEMS2(cinfo, 1, JTRC_JFIF_EXTENSION,
+ GETJOCTET(data[5]), (int) totallen);
+ break;
+ }
+ } else {
+ /* Start of APP0 does not match "JFIF" or "JFXX", or too short */
+ TRACEMS1(cinfo, 1, JTRC_APP0, (int) totallen);
+ }
}
LOCAL(void)
examine_app14 (j_decompress_ptr cinfo, JOCTET FAR * data,
- unsigned int datalen, INT32 remaining)
+ unsigned int datalen, INT32 remaining)
/* Examine first few bytes from an APP14.
* Take appropriate action if it is an Adobe marker.
* datalen is # of bytes at data[], remaining is length of rest of marker data.
*/
{
- unsigned int version, flags0, flags1, transform;
-
- if (datalen >= APP14_DATA_LEN &&
- GETJOCTET(data[0]) == 0x41 &&
- GETJOCTET(data[1]) == 0x64 &&
- GETJOCTET(data[2]) == 0x6F &&
- GETJOCTET(data[3]) == 0x62 &&
- GETJOCTET(data[4]) == 0x65) {
- /* Found Adobe APP14 marker */
- version = (GETJOCTET(data[5]) << 8) + GETJOCTET(data[6]);
- flags0 = (GETJOCTET(data[7]) << 8) + GETJOCTET(data[8]);
- flags1 = (GETJOCTET(data[9]) << 8) + GETJOCTET(data[10]);
- transform = GETJOCTET(data[11]);
- TRACEMS4(cinfo, 1, JTRC_ADOBE, version, flags0, flags1, transform);
- cinfo->saw_Adobe_marker = TRUE;
- cinfo->Adobe_transform = (UINT8) transform;
- } else {
- /* Start of APP14 does not match "Adobe", or too short */
- TRACEMS1(cinfo, 1, JTRC_APP14, (int) (datalen + remaining));
- }
+ unsigned int version, flags0, flags1, transform;
+
+ if (datalen >= APP14_DATA_LEN &&
+ GETJOCTET(data[0]) == 0x41 &&
+ GETJOCTET(data[1]) == 0x64 &&
+ GETJOCTET(data[2]) == 0x6F &&
+ GETJOCTET(data[3]) == 0x62 &&
+ GETJOCTET(data[4]) == 0x65) {
+ /* Found Adobe APP14 marker */
+ version = (GETJOCTET(data[5]) << 8) + GETJOCTET(data[6]);
+ flags0 = (GETJOCTET(data[7]) << 8) + GETJOCTET(data[8]);
+ flags1 = (GETJOCTET(data[9]) << 8) + GETJOCTET(data[10]);
+ transform = GETJOCTET(data[11]);
+ TRACEMS4(cinfo, 1, JTRC_ADOBE, version, flags0, flags1, transform);
+ cinfo->saw_Adobe_marker = TRUE;
+ cinfo->Adobe_transform = (UINT8) transform;
+ } else {
+ /* Start of APP14 does not match "Adobe", or too short */
+ TRACEMS1(cinfo, 1, JTRC_APP14, (int) (datalen + remaining));
+ }
}
@@ -728,45 +728,45 @@ METHODDEF(boolean)
get_interesting_appn (j_decompress_ptr cinfo)
/* Process an APP0 or APP14 marker without saving it */
{
- INT32 length;
- JOCTET b[APPN_DATA_LEN];
- unsigned int i, numtoread;
- INPUT_VARS(cinfo);
-
- INPUT_2BYTES(cinfo, length, return FALSE);
- length -= 2;
-
- /* get the interesting part of the marker data */
- if (length >= APPN_DATA_LEN)
- numtoread = APPN_DATA_LEN;
- else if (length > 0)
- numtoread = (unsigned int) length;
- else
- numtoread = 0;
- for (i = 0; i < numtoread; i++)
- INPUT_BYTE(cinfo, b[i], return FALSE);
- length -= numtoread;
-
- /* process it */
- switch (cinfo->unread_marker) {
- case M_APP0:
- examine_app0(cinfo, (JOCTET FAR *) b, numtoread, length);
- break;
- case M_APP14:
- examine_app14(cinfo, (JOCTET FAR *) b, numtoread, length);
- break;
- default:
- /* can't get here unless jpeg_save_markers chooses wrong processor */
- ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, cinfo->unread_marker);
- break;
- }
-
- /* skip any remaining data -- could be lots */
- INPUT_SYNC(cinfo);
- if (length > 0)
- (*cinfo->src->skip_input_data) (cinfo, (long) length);
-
- return TRUE;
+ INT32 length;
+ JOCTET b[APPN_DATA_LEN];
+ unsigned int i, numtoread;
+ INPUT_VARS(cinfo);
+
+ INPUT_2BYTES(cinfo, length, return FALSE);
+ length -= 2;
+
+ /* get the interesting part of the marker data */
+ if (length >= APPN_DATA_LEN)
+ numtoread = APPN_DATA_LEN;
+ else if (length > 0)
+ numtoread = (unsigned int) length;
+ else
+ numtoread = 0;
+ for (i = 0; i < numtoread; i++)
+ INPUT_BYTE(cinfo, b[i], return FALSE);
+ length -= numtoread;
+
+ /* process it */
+ switch (cinfo->unread_marker) {
+ case M_APP0:
+ examine_app0(cinfo, (JOCTET FAR *) b, numtoread, length);
+ break;
+ case M_APP14:
+ examine_app14(cinfo, (JOCTET FAR *) b, numtoread, length);
+ break;
+ default:
+ /* can't get here unless jpeg_save_markers chooses wrong processor */
+ ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, cinfo->unread_marker);
+ break;
+ }
+
+ /* skip any remaining data -- could be lots */
+ INPUT_SYNC(cinfo);
+ if (length > 0)
+ (*cinfo->src->skip_input_data) (cinfo, (long) length);
+
+ return TRUE;
}
@@ -776,103 +776,103 @@ METHODDEF(boolean)
save_marker (j_decompress_ptr cinfo)
/* Save an APPn or COM marker into the marker list */
{
- my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
- jpeg_saved_marker_ptr cur_marker = marker->cur_marker;
- unsigned int bytes_read, data_length;
- JOCTET FAR * data;
- INT32 length = 0;
- INPUT_VARS(cinfo);
-
- if (cur_marker == NULL) {
- /* begin reading a marker */
- INPUT_2BYTES(cinfo, length, return FALSE);
- length -= 2;
- if (length >= 0) { /* watch out for bogus length word */
- /* figure out how much we want to save */
- unsigned int limit;
- if (cinfo->unread_marker == (int) M_COM)
+ my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
+ jpeg_saved_marker_ptr cur_marker = marker->cur_marker;
+ unsigned int bytes_read, data_length;
+ JOCTET FAR * data;
+ INT32 length = 0;
+ INPUT_VARS(cinfo);
+
+ if (cur_marker == NULL) {
+ /* begin reading a marker */
+ INPUT_2BYTES(cinfo, length, return FALSE);
+ length -= 2;
+ if (length >= 0) { /* watch out for bogus length word */
+ /* figure out how much we want to save */
+ unsigned int limit;
+ if (cinfo->unread_marker == (int) M_COM)
limit = marker->length_limit_COM;
- else
+ else
limit = marker->length_limit_APPn[cinfo->unread_marker - (int) M_APP0];
- if ((unsigned int) length < limit)
+ if ((unsigned int) length < limit)
limit = (unsigned int) length;
- /* allocate and initialize the marker item */
- cur_marker = (jpeg_saved_marker_ptr)
+ /* allocate and initialize the marker item */
+ cur_marker = (jpeg_saved_marker_ptr)
(*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- SIZEOF(struct jpeg_marker_struct) + limit);
- cur_marker->next = NULL;
- cur_marker->marker = (UINT8) cinfo->unread_marker;
- cur_marker->original_length = (unsigned int) length;
- cur_marker->data_length = limit;
- /* data area is just beyond the jpeg_marker_struct */
- data = cur_marker->data = (JOCTET FAR *) (cur_marker + 1);
- marker->cur_marker = cur_marker;
- marker->bytes_read = 0;
- bytes_read = 0;
- data_length = limit;
- } else {
- /* deal with bogus length word */
- bytes_read = data_length = 0;
- data = NULL;
- }
- } else {
- /* resume reading a marker */
- bytes_read = marker->bytes_read;
- data_length = cur_marker->data_length;
- data = cur_marker->data + bytes_read;
- }
-
- while (bytes_read < data_length) {
- INPUT_SYNC(cinfo); /* move the restart point to here */
- marker->bytes_read = bytes_read;
- /* If there's not at least one byte in buffer, suspend */
- MAKE_BYTE_AVAIL(cinfo, return FALSE);
- /* Copy bytes with reasonable rapidity */
- while (bytes_read < data_length && bytes_in_buffer > 0) {
- *data++ = *next_input_byte++;
- bytes_in_buffer--;
- bytes_read++;
- }
- }
-
- /* Done reading what we want to read */
- if (cur_marker != NULL) { /* will be NULL if bogus length word */
- /* Add new marker to end of list */
- if (cinfo->marker_list == NULL) {
- cinfo->marker_list = cur_marker;
- } else {
- jpeg_saved_marker_ptr prev = cinfo->marker_list;
- while (prev->next != NULL)
+ SIZEOF(struct jpeg_marker_struct) + limit);
+ cur_marker->next = NULL;
+ cur_marker->marker = (UINT8) cinfo->unread_marker;
+ cur_marker->original_length = (unsigned int) length;
+ cur_marker->data_length = limit;
+ /* data area is just beyond the jpeg_marker_struct */
+ data = cur_marker->data = (JOCTET FAR *) (cur_marker + 1);
+ marker->cur_marker = cur_marker;
+ marker->bytes_read = 0;
+ bytes_read = 0;
+ data_length = limit;
+ } else {
+ /* deal with bogus length word */
+ bytes_read = data_length = 0;
+ data = NULL;
+ }
+ } else {
+ /* resume reading a marker */
+ bytes_read = marker->bytes_read;
+ data_length = cur_marker->data_length;
+ data = cur_marker->data + bytes_read;
+ }
+
+ while (bytes_read < data_length) {
+ INPUT_SYNC(cinfo); /* move the restart point to here */
+ marker->bytes_read = bytes_read;
+ /* If there's not at least one byte in buffer, suspend */
+ MAKE_BYTE_AVAIL(cinfo, return FALSE);
+ /* Copy bytes with reasonable rapidity */
+ while (bytes_read < data_length && bytes_in_buffer > 0) {
+ *data++ = *next_input_byte++;
+ bytes_in_buffer--;
+ bytes_read++;
+ }
+ }
+
+ /* Done reading what we want to read */
+ if (cur_marker != NULL) { /* will be NULL if bogus length word */
+ /* Add new marker to end of list */
+ if (cinfo->marker_list == NULL) {
+ cinfo->marker_list = cur_marker;
+ } else {
+ jpeg_saved_marker_ptr prev = cinfo->marker_list;
+ while (prev->next != NULL)
prev = prev->next;
- prev->next = cur_marker;
- }
- /* Reset pointer & calc remaining data length */
- data = cur_marker->data;
- length = cur_marker->original_length - data_length;
- }
- /* Reset to initial state for next marker */
- marker->cur_marker = NULL;
-
- /* Process the marker if interesting; else just make a generic trace msg */
- switch (cinfo->unread_marker) {
- case M_APP0:
- examine_app0(cinfo, data, data_length, length);
- break;
- case M_APP14:
- examine_app14(cinfo, data, data_length, length);
- break;
- default:
- TRACEMS2(cinfo, 1, JTRC_MISC_MARKER, cinfo->unread_marker,
- (int) (data_length + length));
- break;
- }
-
- /* skip any remaining data -- could be lots */
- INPUT_SYNC(cinfo); /* do before skip_input_data */
- if (length > 0)
- (*cinfo->src->skip_input_data) (cinfo, (long) length);
-
- return TRUE;
+ prev->next = cur_marker;
+ }
+ /* Reset pointer & calc remaining data length */
+ data = cur_marker->data;
+ length = cur_marker->original_length - data_length;
+ }
+ /* Reset to initial state for next marker */
+ marker->cur_marker = NULL;
+
+ /* Process the marker if interesting; else just make a generic trace msg */
+ switch (cinfo->unread_marker) {
+ case M_APP0:
+ examine_app0(cinfo, data, data_length, length);
+ break;
+ case M_APP14:
+ examine_app14(cinfo, data, data_length, length);
+ break;
+ default:
+ TRACEMS2(cinfo, 1, JTRC_MISC_MARKER, cinfo->unread_marker,
+ (int) (data_length + length));
+ break;
+ }
+
+ /* skip any remaining data -- could be lots */
+ INPUT_SYNC(cinfo); /* do before skip_input_data */
+ if (length > 0)
+ (*cinfo->src->skip_input_data) (cinfo, (long) length);
+
+ return TRUE;
}
#endif /* SAVE_MARKERS_SUPPORTED */
@@ -882,19 +882,19 @@ METHODDEF(boolean)
skip_variable (j_decompress_ptr cinfo)
/* Skip over an unknown or uninteresting variable-length marker */
{
- INT32 length;
- INPUT_VARS(cinfo);
+ INT32 length;
+ INPUT_VARS(cinfo);
- INPUT_2BYTES(cinfo, length, return FALSE);
- length -= 2;
+ INPUT_2BYTES(cinfo, length, return FALSE);
+ length -= 2;
- TRACEMS2(cinfo, 1, JTRC_MISC_MARKER, cinfo->unread_marker, (int) length);
+ TRACEMS2(cinfo, 1, JTRC_MISC_MARKER, cinfo->unread_marker, (int) length);
- INPUT_SYNC(cinfo); /* do before skip_input_data */
- if (length > 0)
- (*cinfo->src->skip_input_data) (cinfo, (long) length);
+ INPUT_SYNC(cinfo); /* do before skip_input_data */
+ if (length > 0)
+ (*cinfo->src->skip_input_data) (cinfo, (long) length);
- return TRUE;
+ return TRUE;
}
@@ -910,47 +910,47 @@ skip_variable (j_decompress_ptr cinfo)
LOCAL(boolean)
next_marker (j_decompress_ptr cinfo)
{
- int c;
- INPUT_VARS(cinfo);
-
- for (;;) {
- INPUT_BYTE(cinfo, c, return FALSE);
- /* Skip any non-FF bytes.
- * This may look a bit inefficient, but it will not occur in a valid file.
- * We sync after each discarded byte so that a suspending data source
- * can discard the byte from its buffer.
- */
- while (c != 0xFF) {
- cinfo->marker->discarded_bytes++;
- INPUT_SYNC(cinfo);
- INPUT_BYTE(cinfo, c, return FALSE);
- }
- /* This loop swallows any duplicate FF bytes. Extra FFs are legal as
- * pad bytes, so don't count them in discarded_bytes. We assume there
- * will not be so many consecutive FF bytes as to overflow a suspending
- * data source's input buffer.
- */
- do {
- INPUT_BYTE(cinfo, c, return FALSE);
- } while (c == 0xFF);
- if (c != 0)
- break; /* found a valid marker, exit loop */
- /* Reach here if we found a stuffed-zero data sequence (FF/00).
- * Discard it and loop back to try again.
- */
- cinfo->marker->discarded_bytes += 2;
- INPUT_SYNC(cinfo);
- }
-
- if (cinfo->marker->discarded_bytes != 0) {
- WARNMS2(cinfo, JWRN_EXTRANEOUS_DATA, cinfo->marker->discarded_bytes, c);
- cinfo->marker->discarded_bytes = 0;
- }
-
- cinfo->unread_marker = c;
-
- INPUT_SYNC(cinfo);
- return TRUE;
+ int c;
+ INPUT_VARS(cinfo);
+
+ for (;;) {
+ INPUT_BYTE(cinfo, c, return FALSE);
+ /* Skip any non-FF bytes.
+ * This may look a bit inefficient, but it will not occur in a valid file.
+ * We sync after each discarded byte so that a suspending data source
+ * can discard the byte from its buffer.
+ */
+ while (c != 0xFF) {
+ cinfo->marker->discarded_bytes++;
+ INPUT_SYNC(cinfo);
+ INPUT_BYTE(cinfo, c, return FALSE);
+ }
+ /* This loop swallows any duplicate FF bytes. Extra FFs are legal as
+ * pad bytes, so don't count them in discarded_bytes. We assume there
+ * will not be so many consecutive FF bytes as to overflow a suspending
+ * data source's input buffer.
+ */
+ do {
+ INPUT_BYTE(cinfo, c, return FALSE);
+ } while (c == 0xFF);
+ if (c != 0)
+ break; /* found a valid marker, exit loop */
+ /* Reach here if we found a stuffed-zero data sequence (FF/00).
+ * Discard it and loop back to try again.
+ */
+ cinfo->marker->discarded_bytes += 2;
+ INPUT_SYNC(cinfo);
+ }
+
+ if (cinfo->marker->discarded_bytes != 0) {
+ WARNMS2(cinfo, JWRN_EXTRANEOUS_DATA, cinfo->marker->discarded_bytes, c);
+ cinfo->marker->discarded_bytes = 0;
+ }
+
+ cinfo->unread_marker = c;
+
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
@@ -963,18 +963,18 @@ first_marker (j_decompress_ptr cinfo)
* SOI before calling the JPEG library.
*/
{
- int c, c2;
- INPUT_VARS(cinfo);
+ int c, c2;
+ INPUT_VARS(cinfo);
- INPUT_BYTE(cinfo, c, return FALSE);
- INPUT_BYTE(cinfo, c2, return FALSE);
- if (c != 0xFF || c2 != (int) M_SOI)
- ERREXIT2(cinfo, JERR_NO_SOI, c, c2);
+ INPUT_BYTE(cinfo, c, return FALSE);
+ INPUT_BYTE(cinfo, c2, return FALSE);
+ if (c != 0xFF || c2 != (int) M_SOI)
+ ERREXIT2(cinfo, JERR_NO_SOI, c, c2);
- cinfo->unread_marker = c2;
+ cinfo->unread_marker = c2;
- INPUT_SYNC(cinfo);
- return TRUE;
+ INPUT_SYNC(cinfo);
+ return TRUE;
}
@@ -993,153 +993,153 @@ first_marker (j_decompress_ptr cinfo)
METHODDEF(int)
read_markers (j_decompress_ptr cinfo)
{
- /* Outer loop repeats once for each marker. */
- for (;;) {
- /* Collect the marker proper, unless we already did. */
- /* NB: first_marker() enforces the requirement that SOI appear first. */
- if (cinfo->unread_marker == 0) {
- if (! cinfo->marker->saw_SOI) {
+ /* Outer loop repeats once for each marker. */
+ for (;;) {
+ /* Collect the marker proper, unless we already did. */
+ /* NB: first_marker() enforces the requirement that SOI appear first. */
+ if (cinfo->unread_marker == 0) {
+ if (! cinfo->marker->saw_SOI) {
if (! first_marker(cinfo))
- return JPEG_SUSPENDED;
- } else {
+ return JPEG_SUSPENDED;
+ } else {
if (! next_marker(cinfo))
- return JPEG_SUSPENDED;
- }
- }
- /* At this point cinfo->unread_marker contains the marker code and the
- * input point is just past the marker proper, but before any parameters.
- * A suspension will cause us to return with this state still true.
- */
- switch (cinfo->unread_marker) {
- case M_SOI:
- if (! get_soi(cinfo))
+ return JPEG_SUSPENDED;
+ }
+ }
+ /* At this point cinfo->unread_marker contains the marker code and the
+ * input point is just past the marker proper, but before any parameters.
+ * A suspension will cause us to return with this state still true.
+ */
+ switch (cinfo->unread_marker) {
+ case M_SOI:
+ if (! get_soi(cinfo))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_SOF0: /* Baseline */
- if (! get_sof(cinfo, TRUE, FALSE, FALSE))
+ case M_SOF0: /* Baseline */
+ if (! get_sof(cinfo, TRUE, FALSE, FALSE))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_SOF1: /* Extended sequential, Huffman */
- if (! get_sof(cinfo, FALSE, FALSE, FALSE))
+ case M_SOF1: /* Extended sequential, Huffman */
+ if (! get_sof(cinfo, FALSE, FALSE, FALSE))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_SOF2: /* Progressive, Huffman */
- if (! get_sof(cinfo, FALSE, TRUE, FALSE))
+ case M_SOF2: /* Progressive, Huffman */
+ if (! get_sof(cinfo, FALSE, TRUE, FALSE))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_SOF9: /* Extended sequential, arithmetic */
- if (! get_sof(cinfo, FALSE, FALSE, TRUE))
+ case M_SOF9: /* Extended sequential, arithmetic */
+ if (! get_sof(cinfo, FALSE, FALSE, TRUE))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_SOF10: /* Progressive, arithmetic */
- if (! get_sof(cinfo, FALSE, TRUE, TRUE))
+ case M_SOF10: /* Progressive, arithmetic */
+ if (! get_sof(cinfo, FALSE, TRUE, TRUE))
return JPEG_SUSPENDED;
- break;
-
- /* Currently unsupported SOFn types */
- case M_SOF3: /* Lossless, Huffman */
- case M_SOF5: /* Differential sequential, Huffman */
- case M_SOF6: /* Differential progressive, Huffman */
- case M_SOF7: /* Differential lossless, Huffman */
- case M_JPG: /* Reserved for JPEG extensions */
- case M_SOF11: /* Lossless, arithmetic */
- case M_SOF13: /* Differential sequential, arithmetic */
- case M_SOF14: /* Differential progressive, arithmetic */
- case M_SOF15: /* Differential lossless, arithmetic */
- ERREXIT1(cinfo, JERR_SOF_UNSUPPORTED, cinfo->unread_marker);
- break;
-
- case M_SOS:
- if (! get_sos(cinfo))
+ break;
+
+ /* Currently unsupported SOFn types */
+ case M_SOF3: /* Lossless, Huffman */
+ case M_SOF5: /* Differential sequential, Huffman */
+ case M_SOF6: /* Differential progressive, Huffman */
+ case M_SOF7: /* Differential lossless, Huffman */
+ case M_JPG: /* Reserved for JPEG extensions */
+ case M_SOF11: /* Lossless, arithmetic */
+ case M_SOF13: /* Differential sequential, arithmetic */
+ case M_SOF14: /* Differential progressive, arithmetic */
+ case M_SOF15: /* Differential lossless, arithmetic */
+ ERREXIT1(cinfo, JERR_SOF_UNSUPPORTED, cinfo->unread_marker);
+ break;
+
+ case M_SOS:
+ if (! get_sos(cinfo))
return JPEG_SUSPENDED;
- cinfo->unread_marker = 0; /* processed the marker */
- return JPEG_REACHED_SOS;
+ cinfo->unread_marker = 0; /* processed the marker */
+ return JPEG_REACHED_SOS;
- case M_EOI:
- TRACEMS(cinfo, 1, JTRC_EOI);
- cinfo->unread_marker = 0; /* processed the marker */
- return JPEG_REACHED_EOI;
+ case M_EOI:
+ TRACEMS(cinfo, 1, JTRC_EOI);
+ cinfo->unread_marker = 0; /* processed the marker */
+ return JPEG_REACHED_EOI;
- case M_DAC:
- if (! get_dac(cinfo))
+ case M_DAC:
+ if (! get_dac(cinfo))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_DHT:
- if (! get_dht(cinfo))
+ case M_DHT:
+ if (! get_dht(cinfo))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_DQT:
- if (! get_dqt(cinfo))
+ case M_DQT:
+ if (! get_dqt(cinfo))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_DRI:
- if (! get_dri(cinfo))
+ case M_DRI:
+ if (! get_dri(cinfo))
return JPEG_SUSPENDED;
- break;
-
- case M_APP0:
- case M_APP1:
- case M_APP2:
- case M_APP3:
- case M_APP4:
- case M_APP5:
- case M_APP6:
- case M_APP7:
- case M_APP8:
- case M_APP9:
- case M_APP10:
- case M_APP11:
- case M_APP12:
- case M_APP13:
- case M_APP14:
- case M_APP15:
- if (! (*((my_marker_ptr) cinfo->marker)->process_APPn[
+ break;
+
+ case M_APP0:
+ case M_APP1:
+ case M_APP2:
+ case M_APP3:
+ case M_APP4:
+ case M_APP5:
+ case M_APP6:
+ case M_APP7:
+ case M_APP8:
+ case M_APP9:
+ case M_APP10:
+ case M_APP11:
+ case M_APP12:
+ case M_APP13:
+ case M_APP14:
+ case M_APP15:
+ if (! (*((my_marker_ptr) cinfo->marker)->process_APPn[
cinfo->unread_marker - (int) M_APP0]) (cinfo))
return JPEG_SUSPENDED;
- break;
+ break;
- case M_COM:
- if (! (*((my_marker_ptr) cinfo->marker)->process_COM) (cinfo))
+ case M_COM:
+ if (! (*((my_marker_ptr) cinfo->marker)->process_COM) (cinfo))
return JPEG_SUSPENDED;
- break;
-
- case M_RST0: /* these are all parameterless */
- case M_RST1:
- case M_RST2:
- case M_RST3:
- case M_RST4:
- case M_RST5:
- case M_RST6:
- case M_RST7:
- case M_TEM:
- TRACEMS1(cinfo, 1, JTRC_PARMLESS_MARKER, cinfo->unread_marker);
- break;
-
- case M_DNL: /* Ignore DNL ... perhaps the wrong thing */
- if (! skip_variable(cinfo))
+ break;
+
+ case M_RST0: /* these are all parameterless */
+ case M_RST1:
+ case M_RST2:
+ case M_RST3:
+ case M_RST4:
+ case M_RST5:
+ case M_RST6:
+ case M_RST7:
+ case M_TEM:
+ TRACEMS1(cinfo, 1, JTRC_PARMLESS_MARKER, cinfo->unread_marker);
+ break;
+
+ case M_DNL: /* Ignore DNL ... perhaps the wrong thing */
+ if (! skip_variable(cinfo))
return JPEG_SUSPENDED;
- break;
-
- default: /* must be DHP, EXP, JPGn, or RESn */
- /* For now, we treat the reserved markers as fatal errors since they are
- * likely to be used to signal incompatible JPEG Part 3 extensions.
- * Once the JPEG 3 version-number marker is well defined, this code
- * ought to change!
- */
- ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, cinfo->unread_marker);
- break;
- }
- /* Successfully processed marker, so reset state variable */
- cinfo->unread_marker = 0;
- } /* end loop */
+ break;
+
+ default: /* must be DHP, EXP, JPGn, or RESn */
+ /* For now, we treat the reserved markers as fatal errors since they are
+ * likely to be used to signal incompatible JPEG Part 3 extensions.
+ * Once the JPEG 3 version-number marker is well defined, this code
+ * ought to change!
+ */
+ ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, cinfo->unread_marker);
+ break;
+ }
+ /* Successfully processed marker, so reset state variable */
+ cinfo->unread_marker = 0;
+ } /* end loop */
}
@@ -1158,30 +1158,30 @@ read_markers (j_decompress_ptr cinfo)
METHODDEF(boolean)
read_restart_marker (j_decompress_ptr cinfo)
{
- /* Obtain a marker unless we already did. */
- /* Note that next_marker will complain if it skips any data. */
- if (cinfo->unread_marker == 0) {
- if (! next_marker(cinfo))
- return FALSE;
- }
-
- if (cinfo->unread_marker ==
- ((int) M_RST0 + cinfo->marker->next_restart_num)) {
- /* Normal case --- swallow the marker and let entropy decoder continue */
- TRACEMS1(cinfo, 3, JTRC_RST, cinfo->marker->next_restart_num);
- cinfo->unread_marker = 0;
- } else {
- /* Uh-oh, the restart markers have been messed up. */
- /* Let the data source manager determine how to resync. */
- if (! (*cinfo->src->resync_to_restart) (cinfo,
- cinfo->marker->next_restart_num))
- return FALSE;
- }
-
- /* Update next-restart state */
- cinfo->marker->next_restart_num = (cinfo->marker->next_restart_num + 1) & 7;
-
- return TRUE;
+ /* Obtain a marker unless we already did. */
+ /* Note that next_marker will complain if it skips any data. */
+ if (cinfo->unread_marker == 0) {
+ if (! next_marker(cinfo))
+ return FALSE;
+ }
+
+ if (cinfo->unread_marker ==
+ ((int) M_RST0 + cinfo->marker->next_restart_num)) {
+ /* Normal case --- swallow the marker and let entropy decoder continue */
+ TRACEMS1(cinfo, 3, JTRC_RST, cinfo->marker->next_restart_num);
+ cinfo->unread_marker = 0;
+ } else {
+ /* Uh-oh, the restart markers have been messed up. */
+ /* Let the data source manager determine how to resync. */
+ if (! (*cinfo->src->resync_to_restart) (cinfo,
+ cinfo->marker->next_restart_num))
+ return FALSE;
+ }
+
+ /* Update next-restart state */
+ cinfo->marker->next_restart_num = (cinfo->marker->next_restart_num + 1) & 7;
+
+ return TRUE;
}
@@ -1237,46 +1237,46 @@ read_restart_marker (j_decompress_ptr cinfo)
GLOBAL(boolean)
jpeg_resync_to_restart (j_decompress_ptr cinfo, int desired)
{
- int marker = cinfo->unread_marker;
- int action = 1;
-
- /* Always put up a warning. */
- WARNMS2(cinfo, JWRN_MUST_RESYNC, marker, desired);
-
- /* Outer loop handles repeated decision after scanning forward. */
- for (;;) {
- if (marker < (int) M_SOF0)
- action = 2; /* invalid marker */
- else if (marker < (int) M_RST0 || marker > (int) M_RST7)
- action = 3; /* valid non-restart marker */
- else {
- if (marker == ((int) M_RST0 + ((desired+1) & 7)) ||
- marker == ((int) M_RST0 + ((desired+2) & 7)))
- action = 3; /* one of the next two expected restarts */
- else if (marker == ((int) M_RST0 + ((desired-1) & 7)) ||
- marker == ((int) M_RST0 + ((desired-2) & 7)))
- action = 2; /* a prior restart, so advance */
- else
- action = 1; /* desired restart or too far away */
- }
- TRACEMS2(cinfo, 4, JTRC_RECOVERY_ACTION, marker, action);
- switch (action) {
- case 1:
- /* Discard marker and let entropy decoder resume processing. */
- cinfo->unread_marker = 0;
- return TRUE;
- case 2:
- /* Scan to the next marker, and repeat the decision loop. */
- if (! next_marker(cinfo))
+ int marker = cinfo->unread_marker;
+ int action = 1;
+
+ /* Always put up a warning. */
+ WARNMS2(cinfo, JWRN_MUST_RESYNC, marker, desired);
+
+ /* Outer loop handles repeated decision after scanning forward. */
+ for (;;) {
+ if (marker < (int) M_SOF0)
+ action = 2; /* invalid marker */
+ else if (marker < (int) M_RST0 || marker > (int) M_RST7)
+ action = 3; /* valid non-restart marker */
+ else {
+ if (marker == ((int) M_RST0 + ((desired+1) & 7)) ||
+ marker == ((int) M_RST0 + ((desired+2) & 7)))
+ action = 3; /* one of the next two expected restarts */
+ else if (marker == ((int) M_RST0 + ((desired-1) & 7)) ||
+ marker == ((int) M_RST0 + ((desired-2) & 7)))
+ action = 2; /* a prior restart, so advance */
+ else
+ action = 1; /* desired restart or too far away */
+ }
+ TRACEMS2(cinfo, 4, JTRC_RECOVERY_ACTION, marker, action);
+ switch (action) {
+ case 1:
+ /* Discard marker and let entropy decoder resume processing. */
+ cinfo->unread_marker = 0;
+ return TRUE;
+ case 2:
+ /* Scan to the next marker, and repeat the decision loop. */
+ if (! next_marker(cinfo))
return FALSE;
- marker = cinfo->unread_marker;
- break;
- case 3:
- /* Return without advancing past this marker. */
- /* Entropy decoder will be forced to process an empty segment. */
- return TRUE;
- }
- } /* end loop */
+ marker = cinfo->unread_marker;
+ break;
+ case 3:
+ /* Return without advancing past this marker. */
+ /* Entropy decoder will be forced to process an empty segment. */
+ return TRUE;
+ }
+ } /* end loop */
}
@@ -1287,15 +1287,15 @@ jpeg_resync_to_restart (j_decompress_ptr cinfo, int desired)
METHODDEF(void)
reset_marker_reader (j_decompress_ptr cinfo)
{
- my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
-
- cinfo->comp_info = NULL; /* until allocated by get_sof */
- cinfo->input_scan_number = 0; /* no SOS seen yet */
- cinfo->unread_marker = 0; /* no pending marker */
- marker->pub.saw_SOI = FALSE; /* set internal state too */
- marker->pub.saw_SOF = FALSE;
- marker->pub.discarded_bytes = 0;
- marker->cur_marker = NULL;
+ my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
+
+ cinfo->comp_info = NULL; /* until allocated by get_sof */
+ cinfo->input_scan_number = 0; /* no SOS seen yet */
+ cinfo->unread_marker = 0; /* no pending marker */
+ marker->pub.saw_SOI = FALSE; /* set internal state too */
+ marker->pub.saw_SOF = FALSE;
+ marker->pub.discarded_bytes = 0;
+ marker->cur_marker = NULL;
}
@@ -1307,32 +1307,32 @@ reset_marker_reader (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_marker_reader (j_decompress_ptr cinfo)
{
- my_marker_ptr marker;
- int i;
+ my_marker_ptr marker;
+ int i;
- /* Create subobject in permanent pool */
- marker = (my_marker_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
+ /* Create subobject in permanent pool */
+ marker = (my_marker_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_PERMANENT,
SIZEOF(my_marker_reader));
- cinfo->marker = (struct jpeg_marker_reader *) marker;
- /* Initialize public method pointers */
- marker->pub.reset_marker_reader = reset_marker_reader;
- marker->pub.read_markers = read_markers;
- marker->pub.read_restart_marker = read_restart_marker;
- /* Initialize COM/APPn processing.
- * By default, we examine and then discard APP0 and APP14,
- * but simply discard COM and all other APPn.
- */
- marker->process_COM = skip_variable;
- marker->length_limit_COM = 0;
- for (i = 0; i < 16; i++) {
- marker->process_APPn[i] = skip_variable;
- marker->length_limit_APPn[i] = 0;
- }
- marker->process_APPn[0] = get_interesting_appn;
- marker->process_APPn[14] = get_interesting_appn;
- /* Reset marker processing state */
- reset_marker_reader(cinfo);
+ cinfo->marker = (struct jpeg_marker_reader *) marker;
+ /* Initialize public method pointers */
+ marker->pub.reset_marker_reader = reset_marker_reader;
+ marker->pub.read_markers = read_markers;
+ marker->pub.read_restart_marker = read_restart_marker;
+ /* Initialize COM/APPn processing.
+ * By default, we examine and then discard APP0 and APP14,
+ * but simply discard COM and all other APPn.
+ */
+ marker->process_COM = skip_variable;
+ marker->length_limit_COM = 0;
+ for (i = 0; i < 16; i++) {
+ marker->process_APPn[i] = skip_variable;
+ marker->length_limit_APPn[i] = 0;
+ }
+ marker->process_APPn[0] = get_interesting_appn;
+ marker->process_APPn[14] = get_interesting_appn;
+ /* Reset marker processing state */
+ reset_marker_reader(cinfo);
}
@@ -1344,44 +1344,44 @@ jinit_marker_reader (j_decompress_ptr cinfo)
GLOBAL(void)
jpeg_save_markers (j_decompress_ptr cinfo, int marker_code,
- unsigned int length_limit)
+ unsigned int length_limit)
{
- my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
- long maxlength;
- jpeg_marker_parser_method processor;
-
- /* Length limit mustn't be larger than what we can allocate
- * (should only be a concern in a 16-bit environment).
- */
- maxlength = cinfo->mem->max_alloc_chunk - SIZEOF(struct jpeg_marker_struct);
- if (((long) length_limit) > maxlength)
- length_limit = (unsigned int) maxlength;
-
- /* Choose processor routine to use.
- * APP0/APP14 have special requirements.
- */
- if (length_limit) {
- processor = save_marker;
- /* If saving APP0/APP14, save at least enough for our internal use. */
- if (marker_code == (int) M_APP0 && length_limit < APP0_DATA_LEN)
- length_limit = APP0_DATA_LEN;
- else if (marker_code == (int) M_APP14 && length_limit < APP14_DATA_LEN)
- length_limit = APP14_DATA_LEN;
- } else {
- processor = skip_variable;
- /* If discarding APP0/APP14, use our regular on-the-fly processor. */
- if (marker_code == (int) M_APP0 || marker_code == (int) M_APP14)
- processor = get_interesting_appn;
- }
-
- if (marker_code == (int) M_COM) {
- marker->process_COM = processor;
- marker->length_limit_COM = length_limit;
- } else if (marker_code >= (int) M_APP0 && marker_code <= (int) M_APP15) {
- marker->process_APPn[marker_code - (int) M_APP0] = processor;
- marker->length_limit_APPn[marker_code - (int) M_APP0] = length_limit;
- } else
- ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, marker_code);
+ my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
+ long maxlength;
+ jpeg_marker_parser_method processor;
+
+ /* Length limit mustn't be larger than what we can allocate
+ * (should only be a concern in a 16-bit environment).
+ */
+ maxlength = cinfo->mem->max_alloc_chunk - SIZEOF(struct jpeg_marker_struct);
+ if (((long) length_limit) > maxlength)
+ length_limit = (unsigned int) maxlength;
+
+ /* Choose processor routine to use.
+ * APP0/APP14 have special requirements.
+ */
+ if (length_limit) {
+ processor = save_marker;
+ /* If saving APP0/APP14, save at least enough for our internal use. */
+ if (marker_code == (int) M_APP0 && length_limit < APP0_DATA_LEN)
+ length_limit = APP0_DATA_LEN;
+ else if (marker_code == (int) M_APP14 && length_limit < APP14_DATA_LEN)
+ length_limit = APP14_DATA_LEN;
+ } else {
+ processor = skip_variable;
+ /* If discarding APP0/APP14, use our regular on-the-fly processor. */
+ if (marker_code == (int) M_APP0 || marker_code == (int) M_APP14)
+ processor = get_interesting_appn;
+ }
+
+ if (marker_code == (int) M_COM) {
+ marker->process_COM = processor;
+ marker->length_limit_COM = length_limit;
+ } else if (marker_code >= (int) M_APP0 && marker_code <= (int) M_APP15) {
+ marker->process_APPn[marker_code - (int) M_APP0] = processor;
+ marker->length_limit_APPn[marker_code - (int) M_APP0] = length_limit;
+ } else
+ ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, marker_code);
}
#endif /* SAVE_MARKERS_SUPPORTED */
@@ -1393,14 +1393,14 @@ jpeg_save_markers (j_decompress_ptr cinfo, int marker_code,
GLOBAL(void)
jpeg_set_marker_processor (j_decompress_ptr cinfo, int marker_code,
- jpeg_marker_parser_method routine)
+ jpeg_marker_parser_method routine)
{
- my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
-
- if (marker_code == (int) M_COM)
- marker->process_COM = routine;
- else if (marker_code >= (int) M_APP0 && marker_code <= (int) M_APP15)
- marker->process_APPn[marker_code - (int) M_APP0] = routine;
- else
- ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, marker_code);
+ my_marker_ptr marker = (my_marker_ptr) cinfo->marker;
+
+ if (marker_code == (int) M_COM)
+ marker->process_COM = routine;
+ else if (marker_code >= (int) M_APP0 && marker_code <= (int) M_APP15)
+ marker->process_APPn[marker_code - (int) M_APP0] = routine;
+ else
+ ERREXIT1(cinfo, JERR_UNKNOWN_MARKER, marker_code);
}
diff --git a/src/lib/libjpeg/jdmaster.c b/src/lib/libjpeg/jdmaster.c
index ba667eb65c1..78a9ad68b43 100644
--- a/src/lib/libjpeg/jdmaster.c
+++ b/src/lib/libjpeg/jdmaster.c
@@ -20,17 +20,17 @@
/* Private state */
typedef struct {
- struct jpeg_decomp_master pub; /* public fields */
+ struct jpeg_decomp_master pub; /* public fields */
- int pass_number; /* # of passes completed */
+ int pass_number; /* # of passes completed */
- boolean using_merged_upsample; /* TRUE if using merged upsample/cconvert */
+ boolean using_merged_upsample; /* TRUE if using merged upsample/cconvert */
- /* Saved references to initialized quantizer modules,
- * in case we need to switch modes.
- */
- struct jpeg_color_quantizer * quantizer_1pass;
- struct jpeg_color_quantizer * quantizer_2pass;
+ /* Saved references to initialized quantizer modules,
+ * in case we need to switch modes.
+ */
+ struct jpeg_color_quantizer * quantizer_1pass;
+ struct jpeg_color_quantizer * quantizer_2pass;
} my_decomp_master;
typedef my_decomp_master * my_master_ptr;
@@ -45,34 +45,34 @@ LOCAL(boolean)
use_merged_upsample (j_decompress_ptr cinfo)
{
#ifdef UPSAMPLE_MERGING_SUPPORTED
- /* Merging is the equivalent of plain box-filter upsampling */
- if (cinfo->do_fancy_upsampling || cinfo->CCIR601_sampling)
- return FALSE;
- /* jdmerge.c only supports YCC=>RGB color conversion */
- if (cinfo->jpeg_color_space != JCS_YCbCr || cinfo->num_components != 3 ||
- cinfo->out_color_space != JCS_RGB ||
- cinfo->out_color_components != RGB_PIXELSIZE)
- return FALSE;
- /* and it only handles 2h1v or 2h2v sampling ratios */
- if (cinfo->comp_info[0].h_samp_factor != 2 ||
- cinfo->comp_info[1].h_samp_factor != 1 ||
- cinfo->comp_info[2].h_samp_factor != 1 ||
- cinfo->comp_info[0].v_samp_factor > 2 ||
- cinfo->comp_info[1].v_samp_factor != 1 ||
- cinfo->comp_info[2].v_samp_factor != 1)
- return FALSE;
- /* furthermore, it doesn't work if we've scaled the IDCTs differently */
- if (cinfo->comp_info[0].DCT_h_scaled_size != cinfo->min_DCT_h_scaled_size ||
- cinfo->comp_info[1].DCT_h_scaled_size != cinfo->min_DCT_h_scaled_size ||
- cinfo->comp_info[2].DCT_h_scaled_size != cinfo->min_DCT_h_scaled_size ||
- cinfo->comp_info[0].DCT_v_scaled_size != cinfo->min_DCT_v_scaled_size ||
- cinfo->comp_info[1].DCT_v_scaled_size != cinfo->min_DCT_v_scaled_size ||
- cinfo->comp_info[2].DCT_v_scaled_size != cinfo->min_DCT_v_scaled_size)
- return FALSE;
- /* ??? also need to test for upsample-time rescaling, when & if supported */
- return TRUE; /* by golly, it'll work... */
+ /* Merging is the equivalent of plain box-filter upsampling */
+ if (cinfo->do_fancy_upsampling || cinfo->CCIR601_sampling)
+ return FALSE;
+ /* jdmerge.c only supports YCC=>RGB color conversion */
+ if (cinfo->jpeg_color_space != JCS_YCbCr || cinfo->num_components != 3 ||
+ cinfo->out_color_space != JCS_RGB ||
+ cinfo->out_color_components != RGB_PIXELSIZE)
+ return FALSE;
+ /* and it only handles 2h1v or 2h2v sampling ratios */
+ if (cinfo->comp_info[0].h_samp_factor != 2 ||
+ cinfo->comp_info[1].h_samp_factor != 1 ||
+ cinfo->comp_info[2].h_samp_factor != 1 ||
+ cinfo->comp_info[0].v_samp_factor > 2 ||
+ cinfo->comp_info[1].v_samp_factor != 1 ||
+ cinfo->comp_info[2].v_samp_factor != 1)
+ return FALSE;
+ /* furthermore, it doesn't work if we've scaled the IDCTs differently */
+ if (cinfo->comp_info[0].DCT_h_scaled_size != cinfo->min_DCT_h_scaled_size ||
+ cinfo->comp_info[1].DCT_h_scaled_size != cinfo->min_DCT_h_scaled_size ||
+ cinfo->comp_info[2].DCT_h_scaled_size != cinfo->min_DCT_h_scaled_size ||
+ cinfo->comp_info[0].DCT_v_scaled_size != cinfo->min_DCT_v_scaled_size ||
+ cinfo->comp_info[1].DCT_v_scaled_size != cinfo->min_DCT_v_scaled_size ||
+ cinfo->comp_info[2].DCT_v_scaled_size != cinfo->min_DCT_v_scaled_size)
+ return FALSE;
+ /* ??? also need to test for upsample-time rescaling, when & if supported */
+ return TRUE; /* by golly, it'll work... */
#else
- return FALSE;
+ return FALSE;
#endif
}
@@ -91,96 +91,96 @@ jpeg_calc_output_dimensions (j_decompress_ptr cinfo)
*/
{
#ifdef IDCT_SCALING_SUPPORTED
- int ci;
- jpeg_component_info *compptr;
+ int ci;
+ jpeg_component_info *compptr;
#endif
- /* Prevent application from calling me at wrong times */
- if (cinfo->global_state != DSTATE_READY)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ /* Prevent application from calling me at wrong times */
+ if (cinfo->global_state != DSTATE_READY)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- /* Compute core output image dimensions and DCT scaling choices. */
- jpeg_core_output_dimensions(cinfo);
+ /* Compute core output image dimensions and DCT scaling choices. */
+ jpeg_core_output_dimensions(cinfo);
#ifdef IDCT_SCALING_SUPPORTED
- /* In selecting the actual DCT scaling for each component, we try to
- * scale up the chroma components via IDCT scaling rather than upsampling.
- * This saves time if the upsampler gets to use 1:1 scaling.
- * Note this code adapts subsampling ratios which are powers of 2.
- */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- int ssize = 1;
- while (cinfo->min_DCT_h_scaled_size * ssize <=
- (cinfo->do_fancy_upsampling ? DCTSIZE : DCTSIZE / 2) &&
- (cinfo->max_h_samp_factor % (compptr->h_samp_factor * ssize * 2)) == 0) {
- ssize = ssize * 2;
- }
- compptr->DCT_h_scaled_size = cinfo->min_DCT_h_scaled_size * ssize;
- ssize = 1;
- while (cinfo->min_DCT_v_scaled_size * ssize <=
- (cinfo->do_fancy_upsampling ? DCTSIZE : DCTSIZE / 2) &&
- (cinfo->max_v_samp_factor % (compptr->v_samp_factor * ssize * 2)) == 0) {
- ssize = ssize * 2;
- }
- compptr->DCT_v_scaled_size = cinfo->min_DCT_v_scaled_size * ssize;
-
- /* We don't support IDCT ratios larger than 2. */
- if (compptr->DCT_h_scaled_size > compptr->DCT_v_scaled_size * 2)
+ /* In selecting the actual DCT scaling for each component, we try to
+ * scale up the chroma components via IDCT scaling rather than upsampling.
+ * This saves time if the upsampler gets to use 1:1 scaling.
+ * Note this code adapts subsampling ratios which are powers of 2.
+ */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ int ssize = 1;
+ while (cinfo->min_DCT_h_scaled_size * ssize <=
+ (cinfo->do_fancy_upsampling ? DCTSIZE : DCTSIZE / 2) &&
+ (cinfo->max_h_samp_factor % (compptr->h_samp_factor * ssize * 2)) == 0) {
+ ssize = ssize * 2;
+ }
+ compptr->DCT_h_scaled_size = cinfo->min_DCT_h_scaled_size * ssize;
+ ssize = 1;
+ while (cinfo->min_DCT_v_scaled_size * ssize <=
+ (cinfo->do_fancy_upsampling ? DCTSIZE : DCTSIZE / 2) &&
+ (cinfo->max_v_samp_factor % (compptr->v_samp_factor * ssize * 2)) == 0) {
+ ssize = ssize * 2;
+ }
+ compptr->DCT_v_scaled_size = cinfo->min_DCT_v_scaled_size * ssize;
+
+ /* We don't support IDCT ratios larger than 2. */
+ if (compptr->DCT_h_scaled_size > compptr->DCT_v_scaled_size * 2)
compptr->DCT_h_scaled_size = compptr->DCT_v_scaled_size * 2;
- else if (compptr->DCT_v_scaled_size > compptr->DCT_h_scaled_size * 2)
+ else if (compptr->DCT_v_scaled_size > compptr->DCT_h_scaled_size * 2)
compptr->DCT_v_scaled_size = compptr->DCT_h_scaled_size * 2;
- }
-
- /* Recompute downsampled dimensions of components;
- * application needs to know these if using raw downsampled data.
- */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Size in samples, after IDCT scaling */
- compptr->downsampled_width = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_width *
- (long) (compptr->h_samp_factor * compptr->DCT_h_scaled_size),
- (long) (cinfo->max_h_samp_factor * cinfo->block_size));
- compptr->downsampled_height = (JDIMENSION)
- jdiv_round_up((long) cinfo->image_height *
- (long) (compptr->v_samp_factor * compptr->DCT_v_scaled_size),
- (long) (cinfo->max_v_samp_factor * cinfo->block_size));
- }
+ }
+
+ /* Recompute downsampled dimensions of components;
+ * application needs to know these if using raw downsampled data.
+ */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Size in samples, after IDCT scaling */
+ compptr->downsampled_width = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_width *
+ (long) (compptr->h_samp_factor * compptr->DCT_h_scaled_size),
+ (long) (cinfo->max_h_samp_factor * cinfo->block_size));
+ compptr->downsampled_height = (JDIMENSION)
+ jdiv_round_up((long) cinfo->image_height *
+ (long) (compptr->v_samp_factor * compptr->DCT_v_scaled_size),
+ (long) (cinfo->max_v_samp_factor * cinfo->block_size));
+ }
#endif /* IDCT_SCALING_SUPPORTED */
- /* Report number of components in selected colorspace. */
- /* Probably this should be in the color conversion module... */
- switch (cinfo->out_color_space) {
- case JCS_GRAYSCALE:
- cinfo->out_color_components = 1;
- break;
- case JCS_RGB:
+ /* Report number of components in selected colorspace. */
+ /* Probably this should be in the color conversion module... */
+ switch (cinfo->out_color_space) {
+ case JCS_GRAYSCALE:
+ cinfo->out_color_components = 1;
+ break;
+ case JCS_RGB:
#if RGB_PIXELSIZE != 3
- cinfo->out_color_components = RGB_PIXELSIZE;
- break;
+ cinfo->out_color_components = RGB_PIXELSIZE;
+ break;
#endif /* else share code with YCbCr */
- case JCS_YCbCr:
- cinfo->out_color_components = 3;
- break;
- case JCS_CMYK:
- case JCS_YCCK:
- cinfo->out_color_components = 4;
- break;
- default: /* else must be same colorspace as in file */
- cinfo->out_color_components = cinfo->num_components;
- break;
- }
- cinfo->output_components = (cinfo->quantize_colors ? 1 :
- cinfo->out_color_components);
-
- /* See if upsampler will want to emit more than one row at a time */
- if (use_merged_upsample(cinfo))
- cinfo->rec_outbuf_height = cinfo->max_v_samp_factor;
- else
- cinfo->rec_outbuf_height = 1;
+ case JCS_YCbCr:
+ cinfo->out_color_components = 3;
+ break;
+ case JCS_CMYK:
+ case JCS_YCCK:
+ cinfo->out_color_components = 4;
+ break;
+ default: /* else must be same colorspace as in file */
+ cinfo->out_color_components = cinfo->num_components;
+ break;
+ }
+ cinfo->output_components = (cinfo->quantize_colors ? 1 :
+ cinfo->out_color_components);
+
+ /* See if upsampler will want to emit more than one row at a time */
+ if (use_merged_upsample(cinfo))
+ cinfo->rec_outbuf_height = cinfo->max_v_samp_factor;
+ else
+ cinfo->rec_outbuf_height = 1;
}
@@ -231,28 +231,28 @@ LOCAL(void)
prepare_range_limit_table (j_decompress_ptr cinfo)
/* Allocate and fill in the sample_range_limit table */
{
- JSAMPLE * table;
- int i;
+ JSAMPLE * table;
+ int i;
- table = (JSAMPLE *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ table = (JSAMPLE *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(5 * (MAXJSAMPLE+1) + CENTERJSAMPLE) * SIZEOF(JSAMPLE));
- table += (MAXJSAMPLE+1); /* allow negative subscripts of simple table */
- cinfo->sample_range_limit = table;
- /* First segment of "simple" table: limit[x] = 0 for x < 0 */
- MEMZERO(table - (MAXJSAMPLE+1), (MAXJSAMPLE+1) * SIZEOF(JSAMPLE));
- /* Main part of "simple" table: limit[x] = x */
- for (i = 0; i <= MAXJSAMPLE; i++)
- table[i] = (JSAMPLE) i;
- table += CENTERJSAMPLE; /* Point to where post-IDCT table starts */
- /* End of simple table, rest of first half of post-IDCT table */
- for (i = CENTERJSAMPLE; i < 2*(MAXJSAMPLE+1); i++)
- table[i] = MAXJSAMPLE;
- /* Second half of post-IDCT table */
- MEMZERO(table + (2 * (MAXJSAMPLE+1)),
- (2 * (MAXJSAMPLE+1) - CENTERJSAMPLE) * SIZEOF(JSAMPLE));
- MEMCOPY(table + (4 * (MAXJSAMPLE+1) - CENTERJSAMPLE),
- cinfo->sample_range_limit, CENTERJSAMPLE * SIZEOF(JSAMPLE));
+ table += (MAXJSAMPLE+1); /* allow negative subscripts of simple table */
+ cinfo->sample_range_limit = table;
+ /* First segment of "simple" table: limit[x] = 0 for x < 0 */
+ MEMZERO(table - (MAXJSAMPLE+1), (MAXJSAMPLE+1) * SIZEOF(JSAMPLE));
+ /* Main part of "simple" table: limit[x] = x */
+ for (i = 0; i <= MAXJSAMPLE; i++)
+ table[i] = (JSAMPLE) i;
+ table += CENTERJSAMPLE; /* Point to where post-IDCT table starts */
+ /* End of simple table, rest of first half of post-IDCT table */
+ for (i = CENTERJSAMPLE; i < 2*(MAXJSAMPLE+1); i++)
+ table[i] = MAXJSAMPLE;
+ /* Second half of post-IDCT table */
+ MEMZERO(table + (2 * (MAXJSAMPLE+1)),
+ (2 * (MAXJSAMPLE+1) - CENTERJSAMPLE) * SIZEOF(JSAMPLE));
+ MEMCOPY(table + (4 * (MAXJSAMPLE+1) - CENTERJSAMPLE),
+ cinfo->sample_range_limit, CENTERJSAMPLE * SIZEOF(JSAMPLE));
}
@@ -270,133 +270,133 @@ prepare_range_limit_table (j_decompress_ptr cinfo)
LOCAL(void)
master_selection (j_decompress_ptr cinfo)
{
- my_master_ptr master = (my_master_ptr) cinfo->master;
- boolean use_c_buffer;
- long samplesperrow;
- JDIMENSION jd_samplesperrow;
-
- /* Initialize dimensions and other stuff */
- jpeg_calc_output_dimensions(cinfo);
- prepare_range_limit_table(cinfo);
-
- /* Width of an output scanline must be representable as JDIMENSION. */
- samplesperrow = (long) cinfo->output_width * (long) cinfo->out_color_components;
- jd_samplesperrow = (JDIMENSION) samplesperrow;
- if ((long) jd_samplesperrow != samplesperrow)
- ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
-
- /* Initialize my private state */
- master->pass_number = 0;
- master->using_merged_upsample = use_merged_upsample(cinfo);
-
- /* Color quantizer selection */
- master->quantizer_1pass = NULL;
- master->quantizer_2pass = NULL;
- /* No mode changes if not using buffered-image mode. */
- if (! cinfo->quantize_colors || ! cinfo->buffered_image) {
- cinfo->enable_1pass_quant = FALSE;
- cinfo->enable_external_quant = FALSE;
- cinfo->enable_2pass_quant = FALSE;
- }
- if (cinfo->quantize_colors) {
- if (cinfo->raw_data_out)
- ERREXIT(cinfo, JERR_NOTIMPL);
- /* 2-pass quantizer only works in 3-component color space. */
- if (cinfo->out_color_components != 3) {
- cinfo->enable_1pass_quant = TRUE;
- cinfo->enable_external_quant = FALSE;
- cinfo->enable_2pass_quant = FALSE;
- cinfo->colormap = NULL;
- } else if (cinfo->colormap != NULL) {
- cinfo->enable_external_quant = TRUE;
- } else if (cinfo->two_pass_quantize) {
- cinfo->enable_2pass_quant = TRUE;
- } else {
- cinfo->enable_1pass_quant = TRUE;
- }
-
- if (cinfo->enable_1pass_quant) {
+ my_master_ptr master = (my_master_ptr) cinfo->master;
+ boolean use_c_buffer;
+ long samplesperrow;
+ JDIMENSION jd_samplesperrow;
+
+ /* Initialize dimensions and other stuff */
+ jpeg_calc_output_dimensions(cinfo);
+ prepare_range_limit_table(cinfo);
+
+ /* Width of an output scanline must be representable as JDIMENSION. */
+ samplesperrow = (long) cinfo->output_width * (long) cinfo->out_color_components;
+ jd_samplesperrow = (JDIMENSION) samplesperrow;
+ if ((long) jd_samplesperrow != samplesperrow)
+ ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
+
+ /* Initialize my private state */
+ master->pass_number = 0;
+ master->using_merged_upsample = use_merged_upsample(cinfo);
+
+ /* Color quantizer selection */
+ master->quantizer_1pass = NULL;
+ master->quantizer_2pass = NULL;
+ /* No mode changes if not using buffered-image mode. */
+ if (! cinfo->quantize_colors || ! cinfo->buffered_image) {
+ cinfo->enable_1pass_quant = FALSE;
+ cinfo->enable_external_quant = FALSE;
+ cinfo->enable_2pass_quant = FALSE;
+ }
+ if (cinfo->quantize_colors) {
+ if (cinfo->raw_data_out)
+ ERREXIT(cinfo, JERR_NOTIMPL);
+ /* 2-pass quantizer only works in 3-component color space. */
+ if (cinfo->out_color_components != 3) {
+ cinfo->enable_1pass_quant = TRUE;
+ cinfo->enable_external_quant = FALSE;
+ cinfo->enable_2pass_quant = FALSE;
+ cinfo->colormap = NULL;
+ } else if (cinfo->colormap != NULL) {
+ cinfo->enable_external_quant = TRUE;
+ } else if (cinfo->two_pass_quantize) {
+ cinfo->enable_2pass_quant = TRUE;
+ } else {
+ cinfo->enable_1pass_quant = TRUE;
+ }
+
+ if (cinfo->enable_1pass_quant) {
#ifdef QUANT_1PASS_SUPPORTED
- jinit_1pass_quantizer(cinfo);
- master->quantizer_1pass = cinfo->cquantize;
+ jinit_1pass_quantizer(cinfo);
+ master->quantizer_1pass = cinfo->cquantize;
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif
- }
+ }
- /* We use the 2-pass code to map to external colormaps. */
- if (cinfo->enable_2pass_quant || cinfo->enable_external_quant) {
+ /* We use the 2-pass code to map to external colormaps. */
+ if (cinfo->enable_2pass_quant || cinfo->enable_external_quant) {
#ifdef QUANT_2PASS_SUPPORTED
- jinit_2pass_quantizer(cinfo);
- master->quantizer_2pass = cinfo->cquantize;
+ jinit_2pass_quantizer(cinfo);
+ master->quantizer_2pass = cinfo->cquantize;
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif
- }
- /* If both quantizers are initialized, the 2-pass one is left active;
- * this is necessary for starting with quantization to an external map.
- */
- }
-
- /* Post-processing: in particular, color conversion first */
- if (! cinfo->raw_data_out) {
- if (master->using_merged_upsample) {
+ }
+ /* If both quantizers are initialized, the 2-pass one is left active;
+ * this is necessary for starting with quantization to an external map.
+ */
+ }
+
+ /* Post-processing: in particular, color conversion first */
+ if (! cinfo->raw_data_out) {
+ if (master->using_merged_upsample) {
#ifdef UPSAMPLE_MERGING_SUPPORTED
- jinit_merged_upsampler(cinfo); /* does color conversion too */
+ jinit_merged_upsampler(cinfo); /* does color conversion too */
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif
- } else {
- jinit_color_deconverter(cinfo);
- jinit_upsampler(cinfo);
- }
- jinit_d_post_controller(cinfo, cinfo->enable_2pass_quant);
- }
- /* Inverse DCT */
- jinit_inverse_dct(cinfo);
- /* Entropy decoding: either Huffman or arithmetic coding. */
- if (cinfo->arith_code)
- jinit_arith_decoder(cinfo);
- else {
- jinit_huff_decoder(cinfo);
- }
-
- /* Initialize principal buffer controllers. */
- use_c_buffer = cinfo->inputctl->has_multiple_scans || cinfo->buffered_image;
- jinit_d_coef_controller(cinfo, use_c_buffer);
-
- if (! cinfo->raw_data_out)
- jinit_d_main_controller(cinfo, FALSE /* never need full buffer here */);
-
- /* We can now tell the memory manager to allocate virtual arrays. */
- (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
-
- /* Initialize input side of decompressor to consume first scan. */
- (*cinfo->inputctl->start_input_pass) (cinfo);
+ } else {
+ jinit_color_deconverter(cinfo);
+ jinit_upsampler(cinfo);
+ }
+ jinit_d_post_controller(cinfo, cinfo->enable_2pass_quant);
+ }
+ /* Inverse DCT */
+ jinit_inverse_dct(cinfo);
+ /* Entropy decoding: either Huffman or arithmetic coding. */
+ if (cinfo->arith_code)
+ jinit_arith_decoder(cinfo);
+ else {
+ jinit_huff_decoder(cinfo);
+ }
+
+ /* Initialize principal buffer controllers. */
+ use_c_buffer = cinfo->inputctl->has_multiple_scans || cinfo->buffered_image;
+ jinit_d_coef_controller(cinfo, use_c_buffer);
+
+ if (! cinfo->raw_data_out)
+ jinit_d_main_controller(cinfo, FALSE /* never need full buffer here */);
+
+ /* We can now tell the memory manager to allocate virtual arrays. */
+ (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
+
+ /* Initialize input side of decompressor to consume first scan. */
+ (*cinfo->inputctl->start_input_pass) (cinfo);
#ifdef D_MULTISCAN_FILES_SUPPORTED
- /* If jpeg_start_decompress will read the whole file, initialize
- * progress monitoring appropriately. The input step is counted
- * as one pass.
- */
- if (cinfo->progress != NULL && ! cinfo->buffered_image &&
- cinfo->inputctl->has_multiple_scans) {
- int nscans;
- /* Estimate number of scans to set pass_limit. */
- if (cinfo->progressive_mode) {
- /* Arbitrarily estimate 2 interleaved DC scans + 3 AC scans/component. */
- nscans = 2 + 3 * cinfo->num_components;
- } else {
- /* For a nonprogressive multiscan file, estimate 1 scan per component. */
- nscans = cinfo->num_components;
- }
- cinfo->progress->pass_counter = 0L;
- cinfo->progress->pass_limit = (long) cinfo->total_iMCU_rows * nscans;
- cinfo->progress->completed_passes = 0;
- cinfo->progress->total_passes = (cinfo->enable_2pass_quant ? 3 : 2);
- /* Count the input pass as done */
- master->pass_number++;
- }
+ /* If jpeg_start_decompress will read the whole file, initialize
+ * progress monitoring appropriately. The input step is counted
+ * as one pass.
+ */
+ if (cinfo->progress != NULL && ! cinfo->buffered_image &&
+ cinfo->inputctl->has_multiple_scans) {
+ int nscans;
+ /* Estimate number of scans to set pass_limit. */
+ if (cinfo->progressive_mode) {
+ /* Arbitrarily estimate 2 interleaved DC scans + 3 AC scans/component. */
+ nscans = 2 + 3 * cinfo->num_components;
+ } else {
+ /* For a nonprogressive multiscan file, estimate 1 scan per component. */
+ nscans = cinfo->num_components;
+ }
+ cinfo->progress->pass_counter = 0L;
+ cinfo->progress->pass_limit = (long) cinfo->total_iMCU_rows * nscans;
+ cinfo->progress->completed_passes = 0;
+ cinfo->progress->total_passes = (cinfo->enable_2pass_quant ? 3 : 2);
+ /* Count the input pass as done */
+ master->pass_number++;
+ }
#endif /* D_MULTISCAN_FILES_SUPPORTED */
}
@@ -413,56 +413,56 @@ master_selection (j_decompress_ptr cinfo)
METHODDEF(void)
prepare_for_output_pass (j_decompress_ptr cinfo)
{
- my_master_ptr master = (my_master_ptr) cinfo->master;
+ my_master_ptr master = (my_master_ptr) cinfo->master;
- if (master->pub.is_dummy_pass) {
+ if (master->pub.is_dummy_pass) {
#ifdef QUANT_2PASS_SUPPORTED
- /* Final pass of 2-pass quantization */
- master->pub.is_dummy_pass = FALSE;
- (*cinfo->cquantize->start_pass) (cinfo, FALSE);
- (*cinfo->post->start_pass) (cinfo, JBUF_CRANK_DEST);
- (*cinfo->main->start_pass) (cinfo, JBUF_CRANK_DEST);
+ /* Final pass of 2-pass quantization */
+ master->pub.is_dummy_pass = FALSE;
+ (*cinfo->cquantize->start_pass) (cinfo, FALSE);
+ (*cinfo->post->start_pass) (cinfo, JBUF_CRANK_DEST);
+ (*cinfo->main->start_pass) (cinfo, JBUF_CRANK_DEST);
#else
- ERREXIT(cinfo, JERR_NOT_COMPILED);
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
#endif /* QUANT_2PASS_SUPPORTED */
- } else {
- if (cinfo->quantize_colors && cinfo->colormap == NULL) {
- /* Select new quantization method */
- if (cinfo->two_pass_quantize && cinfo->enable_2pass_quant) {
+ } else {
+ if (cinfo->quantize_colors && cinfo->colormap == NULL) {
+ /* Select new quantization method */
+ if (cinfo->two_pass_quantize && cinfo->enable_2pass_quant) {
cinfo->cquantize = master->quantizer_2pass;
master->pub.is_dummy_pass = TRUE;
- } else if (cinfo->enable_1pass_quant) {
+ } else if (cinfo->enable_1pass_quant) {
cinfo->cquantize = master->quantizer_1pass;
- } else {
+ } else {
ERREXIT(cinfo, JERR_MODE_CHANGE);
- }
- }
- (*cinfo->idct->start_pass) (cinfo);
- (*cinfo->coef->start_output_pass) (cinfo);
- if (! cinfo->raw_data_out) {
- if (! master->using_merged_upsample)
+ }
+ }
+ (*cinfo->idct->start_pass) (cinfo);
+ (*cinfo->coef->start_output_pass) (cinfo);
+ if (! cinfo->raw_data_out) {
+ if (! master->using_merged_upsample)
(*cinfo->cconvert->start_pass) (cinfo);
- (*cinfo->upsample->start_pass) (cinfo);
- if (cinfo->quantize_colors)
+ (*cinfo->upsample->start_pass) (cinfo);
+ if (cinfo->quantize_colors)
(*cinfo->cquantize->start_pass) (cinfo, master->pub.is_dummy_pass);
- (*cinfo->post->start_pass) (cinfo,
- (master->pub.is_dummy_pass ? JBUF_SAVE_AND_PASS : JBUF_PASS_THRU));
- (*cinfo->main->start_pass) (cinfo, JBUF_PASS_THRU);
- }
- }
-
- /* Set up progress monitor's pass info if present */
- if (cinfo->progress != NULL) {
- cinfo->progress->completed_passes = master->pass_number;
- cinfo->progress->total_passes = master->pass_number +
- (master->pub.is_dummy_pass ? 2 : 1);
- /* In buffered-image mode, we assume one more output pass if EOI not
- * yet reached, but no more passes if EOI has been reached.
- */
- if (cinfo->buffered_image && ! cinfo->inputctl->eoi_reached) {
- cinfo->progress->total_passes += (cinfo->enable_2pass_quant ? 2 : 1);
- }
- }
+ (*cinfo->post->start_pass) (cinfo,
+ (master->pub.is_dummy_pass ? JBUF_SAVE_AND_PASS : JBUF_PASS_THRU));
+ (*cinfo->main->start_pass) (cinfo, JBUF_PASS_THRU);
+ }
+ }
+
+ /* Set up progress monitor's pass info if present */
+ if (cinfo->progress != NULL) {
+ cinfo->progress->completed_passes = master->pass_number;
+ cinfo->progress->total_passes = master->pass_number +
+ (master->pub.is_dummy_pass ? 2 : 1);
+ /* In buffered-image mode, we assume one more output pass if EOI not
+ * yet reached, but no more passes if EOI has been reached.
+ */
+ if (cinfo->buffered_image && ! cinfo->inputctl->eoi_reached) {
+ cinfo->progress->total_passes += (cinfo->enable_2pass_quant ? 2 : 1);
+ }
+ }
}
@@ -473,11 +473,11 @@ prepare_for_output_pass (j_decompress_ptr cinfo)
METHODDEF(void)
finish_output_pass (j_decompress_ptr cinfo)
{
- my_master_ptr master = (my_master_ptr) cinfo->master;
+ my_master_ptr master = (my_master_ptr) cinfo->master;
- if (cinfo->quantize_colors)
- (*cinfo->cquantize->finish_pass) (cinfo);
- master->pass_number++;
+ if (cinfo->quantize_colors)
+ (*cinfo->cquantize->finish_pass) (cinfo);
+ master->pass_number++;
}
@@ -490,21 +490,21 @@ finish_output_pass (j_decompress_ptr cinfo)
GLOBAL(void)
jpeg_new_colormap (j_decompress_ptr cinfo)
{
- my_master_ptr master = (my_master_ptr) cinfo->master;
-
- /* Prevent application from calling me at wrong times */
- if (cinfo->global_state != DSTATE_BUFIMAGE)
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
-
- if (cinfo->quantize_colors && cinfo->enable_external_quant &&
- cinfo->colormap != NULL) {
- /* Select 2-pass quantizer for external colormap use */
- cinfo->cquantize = master->quantizer_2pass;
- /* Notify quantizer of colormap change */
- (*cinfo->cquantize->new_color_map) (cinfo);
- master->pub.is_dummy_pass = FALSE; /* just in case */
- } else
- ERREXIT(cinfo, JERR_MODE_CHANGE);
+ my_master_ptr master = (my_master_ptr) cinfo->master;
+
+ /* Prevent application from calling me at wrong times */
+ if (cinfo->global_state != DSTATE_BUFIMAGE)
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+
+ if (cinfo->quantize_colors && cinfo->enable_external_quant &&
+ cinfo->colormap != NULL) {
+ /* Select 2-pass quantizer for external colormap use */
+ cinfo->cquantize = master->quantizer_2pass;
+ /* Notify quantizer of colormap change */
+ (*cinfo->cquantize->new_color_map) (cinfo);
+ master->pub.is_dummy_pass = FALSE; /* just in case */
+ } else
+ ERREXIT(cinfo, JERR_MODE_CHANGE);
}
#endif /* D_MULTISCAN_FILES_SUPPORTED */
@@ -518,16 +518,16 @@ jpeg_new_colormap (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_master_decompress (j_decompress_ptr cinfo)
{
- my_master_ptr master;
+ my_master_ptr master;
- master = (my_master_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
- SIZEOF(my_decomp_master));
- cinfo->master = (struct jpeg_decomp_master *) master;
- master->pub.prepare_for_output_pass = prepare_for_output_pass;
- master->pub.finish_output_pass = finish_output_pass;
+ master = (my_master_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ SIZEOF(my_decomp_master));
+ cinfo->master = (struct jpeg_decomp_master *) master;
+ master->pub.prepare_for_output_pass = prepare_for_output_pass;
+ master->pub.finish_output_pass = finish_output_pass;
- master->pub.is_dummy_pass = FALSE;
+ master->pub.is_dummy_pass = FALSE;
- master_selection(cinfo);
+ master_selection(cinfo);
}
diff --git a/src/lib/libjpeg/jdmerge.c b/src/lib/libjpeg/jdmerge.c
index c421f45e972..e9ef1af4cfc 100644
--- a/src/lib/libjpeg/jdmerge.c
+++ b/src/lib/libjpeg/jdmerge.c
@@ -42,36 +42,36 @@
/* Private subobject */
typedef struct {
- struct jpeg_upsampler pub; /* public fields */
-
- /* Pointer to routine to do actual upsampling/conversion of one row group */
- JMETHOD(void, upmethod, (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION in_row_group_ctr,
- JSAMPARRAY output_buf));
-
- /* Private state for YCC->RGB conversion */
- int * Cr_r_tab; /* => table for Cr to R conversion */
- int * Cb_b_tab; /* => table for Cb to B conversion */
- INT32 * Cr_g_tab; /* => table for Cr to G conversion */
- INT32 * Cb_g_tab; /* => table for Cb to G conversion */
-
- /* For 2:1 vertical sampling, we produce two output rows at a time.
- * We need a "spare" row buffer to hold the second output row if the
- * application provides just a one-row buffer; we also use the spare
- * to discard the dummy last row if the image height is odd.
- */
- JSAMPROW spare_row;
- boolean spare_full; /* T if spare buffer is occupied */
-
- JDIMENSION out_row_width; /* samples per output row */
- JDIMENSION rows_to_go; /* counts rows remaining in image */
+ struct jpeg_upsampler pub; /* public fields */
+
+ /* Pointer to routine to do actual upsampling/conversion of one row group */
+ JMETHOD(void, upmethod, (j_decompress_ptr cinfo,
+ JSAMPIMAGE input_buf, JDIMENSION in_row_group_ctr,
+ JSAMPARRAY output_buf));
+
+ /* Private state for YCC->RGB conversion */
+ int * Cr_r_tab; /* => table for Cr to R conversion */
+ int * Cb_b_tab; /* => table for Cb to B conversion */
+ INT32 * Cr_g_tab; /* => table for Cr to G conversion */
+ INT32 * Cb_g_tab; /* => table for Cb to G conversion */
+
+ /* For 2:1 vertical sampling, we produce two output rows at a time.
+ * We need a "spare" row buffer to hold the second output row if the
+ * application provides just a one-row buffer; we also use the spare
+ * to discard the dummy last row if the image height is odd.
+ */
+ JSAMPROW spare_row;
+ boolean spare_full; /* T if spare buffer is occupied */
+
+ JDIMENSION out_row_width; /* samples per output row */
+ JDIMENSION rows_to_go; /* counts rows remaining in image */
} my_upsampler;
typedef my_upsampler * my_upsample_ptr;
-#define SCALEBITS 16 /* speediest right-shift on some machines */
-#define ONE_HALF ((INT32) 1 << (SCALEBITS-1))
-#define FIX(x) ((INT32) ((x) * (1L<<SCALEBITS) + 0.5))
+#define SCALEBITS 16 /* speediest right-shift on some machines */
+#define ONE_HALF ((INT32) 1 << (SCALEBITS-1))
+#define FIX(x) ((INT32) ((x) * (1L<<SCALEBITS) + 0.5))
/*
@@ -82,39 +82,39 @@ typedef my_upsampler * my_upsample_ptr;
LOCAL(void)
build_ycc_rgb_table (j_decompress_ptr cinfo)
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- int i;
- INT32 x;
- SHIFT_TEMPS
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ int i;
+ INT32 x;
+ SHIFT_TEMPS
- upsample->Cr_r_tab = (int *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ upsample->Cr_r_tab = (int *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(int));
- upsample->Cb_b_tab = (int *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ upsample->Cb_b_tab = (int *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(int));
- upsample->Cr_g_tab = (INT32 *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ upsample->Cr_g_tab = (INT32 *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(INT32));
- upsample->Cb_g_tab = (INT32 *)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ upsample->Cb_g_tab = (INT32 *)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(MAXJSAMPLE+1) * SIZEOF(INT32));
- for (i = 0, x = -CENTERJSAMPLE; i <= MAXJSAMPLE; i++, x++) {
- /* i is the actual input pixel value, in the range 0..MAXJSAMPLE */
- /* The Cb or Cr value we are thinking of is x = i - CENTERJSAMPLE */
- /* Cr=>R value is nearest int to 1.40200 * x */
- upsample->Cr_r_tab[i] = (int)
- RIGHT_SHIFT(FIX(1.40200) * x + ONE_HALF, SCALEBITS);
- /* Cb=>B value is nearest int to 1.77200 * x */
- upsample->Cb_b_tab[i] = (int)
- RIGHT_SHIFT(FIX(1.77200) * x + ONE_HALF, SCALEBITS);
- /* Cr=>G value is scaled-up -0.71414 * x */
- upsample->Cr_g_tab[i] = (- FIX(0.71414)) * x;
- /* Cb=>G value is scaled-up -0.34414 * x */
- /* We also add in ONE_HALF so that need not do it in inner loop */
- upsample->Cb_g_tab[i] = (- FIX(0.34414)) * x + ONE_HALF;
- }
+ for (i = 0, x = -CENTERJSAMPLE; i <= MAXJSAMPLE; i++, x++) {
+ /* i is the actual input pixel value, in the range 0..MAXJSAMPLE */
+ /* The Cb or Cr value we are thinking of is x = i - CENTERJSAMPLE */
+ /* Cr=>R value is nearest int to 1.40200 * x */
+ upsample->Cr_r_tab[i] = (int)
+ RIGHT_SHIFT(FIX(1.40200) * x + ONE_HALF, SCALEBITS);
+ /* Cb=>B value is nearest int to 1.77200 * x */
+ upsample->Cb_b_tab[i] = (int)
+ RIGHT_SHIFT(FIX(1.77200) * x + ONE_HALF, SCALEBITS);
+ /* Cr=>G value is scaled-up -0.71414 * x */
+ upsample->Cr_g_tab[i] = (- FIX(0.71414)) * x;
+ /* Cb=>G value is scaled-up -0.34414 * x */
+ /* We also add in ONE_HALF so that need not do it in inner loop */
+ upsample->Cb_g_tab[i] = (- FIX(0.34414)) * x + ONE_HALF;
+ }
}
@@ -125,12 +125,12 @@ build_ycc_rgb_table (j_decompress_ptr cinfo)
METHODDEF(void)
start_pass_merged_upsample (j_decompress_ptr cinfo)
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- /* Mark the spare buffer empty */
- upsample->spare_full = FALSE;
- /* Initialize total-height counter for detecting bottom of image */
- upsample->rows_to_go = cinfo->output_height;
+ /* Mark the spare buffer empty */
+ upsample->spare_full = FALSE;
+ /* Initialize total-height counter for detecting bottom of image */
+ upsample->rows_to_go = cinfo->output_height;
}
@@ -142,69 +142,69 @@ start_pass_merged_upsample (j_decompress_ptr cinfo)
METHODDEF(void)
merged_2v_upsample (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
/* 2:1 vertical sampling case: may need a spare row. */
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- JSAMPROW work_ptrs[2];
- JDIMENSION num_rows; /* number of rows returned to caller */
-
- if (upsample->spare_full) {
- /* If we have a spare row saved from a previous cycle, just return it. */
- jcopy_sample_rows(& upsample->spare_row, 0, output_buf + *out_row_ctr, 0,
- 1, upsample->out_row_width);
- num_rows = 1;
- upsample->spare_full = FALSE;
- } else {
- /* Figure number of rows to return to caller. */
- num_rows = 2;
- /* Not more than the distance to the end of the image. */
- if (num_rows > upsample->rows_to_go)
- num_rows = upsample->rows_to_go;
- /* And not more than what the client can accept: */
- out_rows_avail -= *out_row_ctr;
- if (num_rows > out_rows_avail)
- num_rows = out_rows_avail;
- /* Create output pointer array for upsampler. */
- work_ptrs[0] = output_buf[*out_row_ctr];
- if (num_rows > 1) {
- work_ptrs[1] = output_buf[*out_row_ctr + 1];
- } else {
- work_ptrs[1] = upsample->spare_row;
- upsample->spare_full = TRUE;
- }
- /* Now do the upsampling. */
- (*upsample->upmethod) (cinfo, input_buf, *in_row_group_ctr, work_ptrs);
- }
-
- /* Adjust counts */
- *out_row_ctr += num_rows;
- upsample->rows_to_go -= num_rows;
- /* When the buffer is emptied, declare this input row group consumed */
- if (! upsample->spare_full)
- (*in_row_group_ctr)++;
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ JSAMPROW work_ptrs[2];
+ JDIMENSION num_rows; /* number of rows returned to caller */
+
+ if (upsample->spare_full) {
+ /* If we have a spare row saved from a previous cycle, just return it. */
+ jcopy_sample_rows(& upsample->spare_row, 0, output_buf + *out_row_ctr, 0,
+ 1, upsample->out_row_width);
+ num_rows = 1;
+ upsample->spare_full = FALSE;
+ } else {
+ /* Figure number of rows to return to caller. */
+ num_rows = 2;
+ /* Not more than the distance to the end of the image. */
+ if (num_rows > upsample->rows_to_go)
+ num_rows = upsample->rows_to_go;
+ /* And not more than what the client can accept: */
+ out_rows_avail -= *out_row_ctr;
+ if (num_rows > out_rows_avail)
+ num_rows = out_rows_avail;
+ /* Create output pointer array for upsampler. */
+ work_ptrs[0] = output_buf[*out_row_ctr];
+ if (num_rows > 1) {
+ work_ptrs[1] = output_buf[*out_row_ctr + 1];
+ } else {
+ work_ptrs[1] = upsample->spare_row;
+ upsample->spare_full = TRUE;
+ }
+ /* Now do the upsampling. */
+ (*upsample->upmethod) (cinfo, input_buf, *in_row_group_ctr, work_ptrs);
+ }
+
+ /* Adjust counts */
+ *out_row_ctr += num_rows;
+ upsample->rows_to_go -= num_rows;
+ /* When the buffer is emptied, declare this input row group consumed */
+ if (! upsample->spare_full)
+ (*in_row_group_ctr)++;
}
METHODDEF(void)
merged_1v_upsample (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
/* 1:1 vertical sampling case: much easier, never need a spare row. */
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
-
- /* Just do the upsampling. */
- (*upsample->upmethod) (cinfo, input_buf, *in_row_group_ctr,
- output_buf + *out_row_ctr);
- /* Adjust counts */
- (*out_row_ctr)++;
- (*in_row_group_ctr)++;
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+
+ /* Just do the upsampling. */
+ (*upsample->upmethod) (cinfo, input_buf, *in_row_group_ctr,
+ output_buf + *out_row_ctr);
+ /* Adjust counts */
+ (*out_row_ctr)++;
+ (*in_row_group_ctr)++;
}
@@ -224,59 +224,59 @@ merged_1v_upsample (j_decompress_ptr cinfo,
METHODDEF(void)
h2v1_merged_upsample (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION in_row_group_ctr,
- JSAMPARRAY output_buf)
+ JSAMPIMAGE input_buf, JDIMENSION in_row_group_ctr,
+ JSAMPARRAY output_buf)
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- register int y, cred, cgreen, cblue;
- int cb, cr;
- register JSAMPROW outptr;
- JSAMPROW inptr0, inptr1, inptr2;
- JDIMENSION col;
- /* copy these pointers into registers if possible */
- register JSAMPLE * range_limit = cinfo->sample_range_limit;
- int * Crrtab = upsample->Cr_r_tab;
- int * Cbbtab = upsample->Cb_b_tab;
- INT32 * Crgtab = upsample->Cr_g_tab;
- INT32 * Cbgtab = upsample->Cb_g_tab;
- SHIFT_TEMPS
-
- inptr0 = input_buf[0][in_row_group_ctr];
- inptr1 = input_buf[1][in_row_group_ctr];
- inptr2 = input_buf[2][in_row_group_ctr];
- outptr = output_buf[0];
- /* Loop for each pair of output pixels */
- for (col = cinfo->output_width >> 1; col > 0; col--) {
- /* Do the chroma part of the calculation */
- cb = GETJSAMPLE(*inptr1++);
- cr = GETJSAMPLE(*inptr2++);
- cred = Crrtab[cr];
- cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
- cblue = Cbbtab[cb];
- /* Fetch 2 Y values and emit 2 pixels */
- y = GETJSAMPLE(*inptr0++);
- outptr[RGB_RED] = range_limit[y + cred];
- outptr[RGB_GREEN] = range_limit[y + cgreen];
- outptr[RGB_BLUE] = range_limit[y + cblue];
- outptr += RGB_PIXELSIZE;
- y = GETJSAMPLE(*inptr0++);
- outptr[RGB_RED] = range_limit[y + cred];
- outptr[RGB_GREEN] = range_limit[y + cgreen];
- outptr[RGB_BLUE] = range_limit[y + cblue];
- outptr += RGB_PIXELSIZE;
- }
- /* If image width is odd, do the last output column separately */
- if (cinfo->output_width & 1) {
- cb = GETJSAMPLE(*inptr1);
- cr = GETJSAMPLE(*inptr2);
- cred = Crrtab[cr];
- cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
- cblue = Cbbtab[cb];
- y = GETJSAMPLE(*inptr0);
- outptr[RGB_RED] = range_limit[y + cred];
- outptr[RGB_GREEN] = range_limit[y + cgreen];
- outptr[RGB_BLUE] = range_limit[y + cblue];
- }
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ register int y, cred, cgreen, cblue;
+ int cb, cr;
+ register JSAMPROW outptr;
+ JSAMPROW inptr0, inptr1, inptr2;
+ JDIMENSION col;
+ /* copy these pointers into registers if possible */
+ register JSAMPLE * range_limit = cinfo->sample_range_limit;
+ int * Crrtab = upsample->Cr_r_tab;
+ int * Cbbtab = upsample->Cb_b_tab;
+ INT32 * Crgtab = upsample->Cr_g_tab;
+ INT32 * Cbgtab = upsample->Cb_g_tab;
+ SHIFT_TEMPS
+
+ inptr0 = input_buf[0][in_row_group_ctr];
+ inptr1 = input_buf[1][in_row_group_ctr];
+ inptr2 = input_buf[2][in_row_group_ctr];
+ outptr = output_buf[0];
+ /* Loop for each pair of output pixels */
+ for (col = cinfo->output_width >> 1; col > 0; col--) {
+ /* Do the chroma part of the calculation */
+ cb = GETJSAMPLE(*inptr1++);
+ cr = GETJSAMPLE(*inptr2++);
+ cred = Crrtab[cr];
+ cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
+ cblue = Cbbtab[cb];
+ /* Fetch 2 Y values and emit 2 pixels */
+ y = GETJSAMPLE(*inptr0++);
+ outptr[RGB_RED] = range_limit[y + cred];
+ outptr[RGB_GREEN] = range_limit[y + cgreen];
+ outptr[RGB_BLUE] = range_limit[y + cblue];
+ outptr += RGB_PIXELSIZE;
+ y = GETJSAMPLE(*inptr0++);
+ outptr[RGB_RED] = range_limit[y + cred];
+ outptr[RGB_GREEN] = range_limit[y + cgreen];
+ outptr[RGB_BLUE] = range_limit[y + cblue];
+ outptr += RGB_PIXELSIZE;
+ }
+ /* If image width is odd, do the last output column separately */
+ if (cinfo->output_width & 1) {
+ cb = GETJSAMPLE(*inptr1);
+ cr = GETJSAMPLE(*inptr2);
+ cred = Crrtab[cr];
+ cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
+ cblue = Cbbtab[cb];
+ y = GETJSAMPLE(*inptr0);
+ outptr[RGB_RED] = range_limit[y + cred];
+ outptr[RGB_GREEN] = range_limit[y + cgreen];
+ outptr[RGB_BLUE] = range_limit[y + cblue];
+ }
}
@@ -286,75 +286,75 @@ h2v1_merged_upsample (j_decompress_ptr cinfo,
METHODDEF(void)
h2v2_merged_upsample (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION in_row_group_ctr,
- JSAMPARRAY output_buf)
+ JSAMPIMAGE input_buf, JDIMENSION in_row_group_ctr,
+ JSAMPARRAY output_buf)
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- register int y, cred, cgreen, cblue;
- int cb, cr;
- register JSAMPROW outptr0, outptr1;
- JSAMPROW inptr00, inptr01, inptr1, inptr2;
- JDIMENSION col;
- /* copy these pointers into registers if possible */
- register JSAMPLE * range_limit = cinfo->sample_range_limit;
- int * Crrtab = upsample->Cr_r_tab;
- int * Cbbtab = upsample->Cb_b_tab;
- INT32 * Crgtab = upsample->Cr_g_tab;
- INT32 * Cbgtab = upsample->Cb_g_tab;
- SHIFT_TEMPS
-
- inptr00 = input_buf[0][in_row_group_ctr*2];
- inptr01 = input_buf[0][in_row_group_ctr*2 + 1];
- inptr1 = input_buf[1][in_row_group_ctr];
- inptr2 = input_buf[2][in_row_group_ctr];
- outptr0 = output_buf[0];
- outptr1 = output_buf[1];
- /* Loop for each group of output pixels */
- for (col = cinfo->output_width >> 1; col > 0; col--) {
- /* Do the chroma part of the calculation */
- cb = GETJSAMPLE(*inptr1++);
- cr = GETJSAMPLE(*inptr2++);
- cred = Crrtab[cr];
- cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
- cblue = Cbbtab[cb];
- /* Fetch 4 Y values and emit 4 pixels */
- y = GETJSAMPLE(*inptr00++);
- outptr0[RGB_RED] = range_limit[y + cred];
- outptr0[RGB_GREEN] = range_limit[y + cgreen];
- outptr0[RGB_BLUE] = range_limit[y + cblue];
- outptr0 += RGB_PIXELSIZE;
- y = GETJSAMPLE(*inptr00++);
- outptr0[RGB_RED] = range_limit[y + cred];
- outptr0[RGB_GREEN] = range_limit[y + cgreen];
- outptr0[RGB_BLUE] = range_limit[y + cblue];
- outptr0 += RGB_PIXELSIZE;
- y = GETJSAMPLE(*inptr01++);
- outptr1[RGB_RED] = range_limit[y + cred];
- outptr1[RGB_GREEN] = range_limit[y + cgreen];
- outptr1[RGB_BLUE] = range_limit[y + cblue];
- outptr1 += RGB_PIXELSIZE;
- y = GETJSAMPLE(*inptr01++);
- outptr1[RGB_RED] = range_limit[y + cred];
- outptr1[RGB_GREEN] = range_limit[y + cgreen];
- outptr1[RGB_BLUE] = range_limit[y + cblue];
- outptr1 += RGB_PIXELSIZE;
- }
- /* If image width is odd, do the last output column separately */
- if (cinfo->output_width & 1) {
- cb = GETJSAMPLE(*inptr1);
- cr = GETJSAMPLE(*inptr2);
- cred = Crrtab[cr];
- cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
- cblue = Cbbtab[cb];
- y = GETJSAMPLE(*inptr00);
- outptr0[RGB_RED] = range_limit[y + cred];
- outptr0[RGB_GREEN] = range_limit[y + cgreen];
- outptr0[RGB_BLUE] = range_limit[y + cblue];
- y = GETJSAMPLE(*inptr01);
- outptr1[RGB_RED] = range_limit[y + cred];
- outptr1[RGB_GREEN] = range_limit[y + cgreen];
- outptr1[RGB_BLUE] = range_limit[y + cblue];
- }
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ register int y, cred, cgreen, cblue;
+ int cb, cr;
+ register JSAMPROW outptr0, outptr1;
+ JSAMPROW inptr00, inptr01, inptr1, inptr2;
+ JDIMENSION col;
+ /* copy these pointers into registers if possible */
+ register JSAMPLE * range_limit = cinfo->sample_range_limit;
+ int * Crrtab = upsample->Cr_r_tab;
+ int * Cbbtab = upsample->Cb_b_tab;
+ INT32 * Crgtab = upsample->Cr_g_tab;
+ INT32 * Cbgtab = upsample->Cb_g_tab;
+ SHIFT_TEMPS
+
+ inptr00 = input_buf[0][in_row_group_ctr*2];
+ inptr01 = input_buf[0][in_row_group_ctr*2 + 1];
+ inptr1 = input_buf[1][in_row_group_ctr];
+ inptr2 = input_buf[2][in_row_group_ctr];
+ outptr0 = output_buf[0];
+ outptr1 = output_buf[1];
+ /* Loop for each group of output pixels */
+ for (col = cinfo->output_width >> 1; col > 0; col--) {
+ /* Do the chroma part of the calculation */
+ cb = GETJSAMPLE(*inptr1++);
+ cr = GETJSAMPLE(*inptr2++);
+ cred = Crrtab[cr];
+ cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
+ cblue = Cbbtab[cb];
+ /* Fetch 4 Y values and emit 4 pixels */
+ y = GETJSAMPLE(*inptr00++);
+ outptr0[RGB_RED] = range_limit[y + cred];
+ outptr0[RGB_GREEN] = range_limit[y + cgreen];
+ outptr0[RGB_BLUE] = range_limit[y + cblue];
+ outptr0 += RGB_PIXELSIZE;
+ y = GETJSAMPLE(*inptr00++);
+ outptr0[RGB_RED] = range_limit[y + cred];
+ outptr0[RGB_GREEN] = range_limit[y + cgreen];
+ outptr0[RGB_BLUE] = range_limit[y + cblue];
+ outptr0 += RGB_PIXELSIZE;
+ y = GETJSAMPLE(*inptr01++);
+ outptr1[RGB_RED] = range_limit[y + cred];
+ outptr1[RGB_GREEN] = range_limit[y + cgreen];
+ outptr1[RGB_BLUE] = range_limit[y + cblue];
+ outptr1 += RGB_PIXELSIZE;
+ y = GETJSAMPLE(*inptr01++);
+ outptr1[RGB_RED] = range_limit[y + cred];
+ outptr1[RGB_GREEN] = range_limit[y + cgreen];
+ outptr1[RGB_BLUE] = range_limit[y + cblue];
+ outptr1 += RGB_PIXELSIZE;
+ }
+ /* If image width is odd, do the last output column separately */
+ if (cinfo->output_width & 1) {
+ cb = GETJSAMPLE(*inptr1);
+ cr = GETJSAMPLE(*inptr2);
+ cred = Crrtab[cr];
+ cgreen = (int) RIGHT_SHIFT(Cbgtab[cb] + Crgtab[cr], SCALEBITS);
+ cblue = Cbbtab[cb];
+ y = GETJSAMPLE(*inptr00);
+ outptr0[RGB_RED] = range_limit[y + cred];
+ outptr0[RGB_GREEN] = range_limit[y + cgreen];
+ outptr0[RGB_BLUE] = range_limit[y + cblue];
+ y = GETJSAMPLE(*inptr01);
+ outptr1[RGB_RED] = range_limit[y + cred];
+ outptr1[RGB_GREEN] = range_limit[y + cgreen];
+ outptr1[RGB_BLUE] = range_limit[y + cblue];
+ }
}
@@ -369,32 +369,32 @@ h2v2_merged_upsample (j_decompress_ptr cinfo,
GLOBAL(void)
jinit_merged_upsampler (j_decompress_ptr cinfo)
{
- my_upsample_ptr upsample;
+ my_upsample_ptr upsample;
- upsample = (my_upsample_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ upsample = (my_upsample_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_upsampler));
- cinfo->upsample = (struct jpeg_upsampler *) upsample;
- upsample->pub.start_pass = start_pass_merged_upsample;
- upsample->pub.need_context_rows = FALSE;
-
- upsample->out_row_width = cinfo->output_width * cinfo->out_color_components;
-
- if (cinfo->max_v_samp_factor == 2) {
- upsample->pub.upsample = merged_2v_upsample;
- upsample->upmethod = h2v2_merged_upsample;
- /* Allocate a spare row buffer */
- upsample->spare_row = (JSAMPROW)
- (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cinfo->upsample = (struct jpeg_upsampler *) upsample;
+ upsample->pub.start_pass = start_pass_merged_upsample;
+ upsample->pub.need_context_rows = FALSE;
+
+ upsample->out_row_width = cinfo->output_width * cinfo->out_color_components;
+
+ if (cinfo->max_v_samp_factor == 2) {
+ upsample->pub.upsample = merged_2v_upsample;
+ upsample->upmethod = h2v2_merged_upsample;
+ /* Allocate a spare row buffer */
+ upsample->spare_row = (JSAMPROW)
+ (*cinfo->mem->alloc_large) ((j_common_ptr) cinfo, JPOOL_IMAGE,
(size_t) (upsample->out_row_width * SIZEOF(JSAMPLE)));
- } else {
- upsample->pub.upsample = merged_1v_upsample;
- upsample->upmethod = h2v1_merged_upsample;
- /* No spare row needed */
- upsample->spare_row = NULL;
- }
-
- build_ycc_rgb_table(cinfo);
+ } else {
+ upsample->pub.upsample = merged_1v_upsample;
+ upsample->upmethod = h2v1_merged_upsample;
+ /* No spare row needed */
+ upsample->spare_row = NULL;
+ }
+
+ build_ycc_rgb_table(cinfo);
}
#endif /* UPSAMPLE_MERGING_SUPPORTED */
diff --git a/src/lib/libjpeg/jdpostct.c b/src/lib/libjpeg/jdpostct.c
index 571563d728e..ddebd1a8964 100644
--- a/src/lib/libjpeg/jdpostct.c
+++ b/src/lib/libjpeg/jdpostct.c
@@ -24,19 +24,19 @@
/* Private buffer controller object */
typedef struct {
- struct jpeg_d_post_controller pub; /* public fields */
-
- /* Color quantization source buffer: this holds output data from
- * the upsample/color conversion step to be passed to the quantizer.
- * For two-pass color quantization, we need a full-image buffer;
- * for one-pass operation, a strip buffer is sufficient.
- */
- jvirt_sarray_ptr whole_image; /* virtual array, or NULL if one-pass */
- JSAMPARRAY buffer; /* strip buffer, or current strip of virtual */
- JDIMENSION strip_height; /* buffer size in rows */
- /* for two-pass mode only: */
- JDIMENSION starting_row; /* row # of first row in current strip */
- JDIMENSION next_row; /* index of next row to fill/empty in strip */
+ struct jpeg_d_post_controller pub; /* public fields */
+
+ /* Color quantization source buffer: this holds output data from
+ * the upsample/color conversion step to be passed to the quantizer.
+ * For two-pass color quantization, we need a full-image buffer;
+ * for one-pass operation, a strip buffer is sufficient.
+ */
+ jvirt_sarray_ptr whole_image; /* virtual array, or NULL if one-pass */
+ JSAMPARRAY buffer; /* strip buffer, or current strip of virtual */
+ JDIMENSION strip_height; /* buffer size in rows */
+ /* for two-pass mode only: */
+ JDIMENSION starting_row; /* row # of first row in current strip */
+ JDIMENSION next_row; /* index of next row to fill/empty in strip */
} my_post_controller;
typedef my_post_controller * my_post_ptr;
@@ -45,23 +45,23 @@ typedef my_post_controller * my_post_ptr;
/* Forward declarations */
METHODDEF(void) post_process_1pass
JPP((j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail));
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail));
#ifdef QUANT_2PASS_SUPPORTED
METHODDEF(void) post_process_prepass
JPP((j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail));
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail));
METHODDEF(void) post_process_2pass
JPP((j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail));
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail));
#endif
@@ -72,48 +72,48 @@ METHODDEF(void) post_process_2pass
METHODDEF(void)
start_pass_dpost (j_decompress_ptr cinfo, J_BUF_MODE pass_mode)
{
- my_post_ptr post = (my_post_ptr) cinfo->post;
-
- switch (pass_mode) {
- case JBUF_PASS_THRU:
- if (cinfo->quantize_colors) {
- /* Single-pass processing with color quantization. */
- post->pub.post_process_data = post_process_1pass;
- /* We could be doing buffered-image output before starting a 2-pass
- * color quantization; in that case, jinit_d_post_controller did not
- * allocate a strip buffer. Use the virtual-array buffer as workspace.
- */
- if (post->buffer == NULL) {
+ my_post_ptr post = (my_post_ptr) cinfo->post;
+
+ switch (pass_mode) {
+ case JBUF_PASS_THRU:
+ if (cinfo->quantize_colors) {
+ /* Single-pass processing with color quantization. */
+ post->pub.post_process_data = post_process_1pass;
+ /* We could be doing buffered-image output before starting a 2-pass
+ * color quantization; in that case, jinit_d_post_controller did not
+ * allocate a strip buffer. Use the virtual-array buffer as workspace.
+ */
+ if (post->buffer == NULL) {
post->buffer = (*cinfo->mem->access_virt_sarray)
- ((j_common_ptr) cinfo, post->whole_image,
- (JDIMENSION) 0, post->strip_height, TRUE);
- }
- } else {
- /* For single-pass processing without color quantization,
- * I have no work to do; just call the upsampler directly.
- */
- post->pub.post_process_data = cinfo->upsample->upsample;
- }
- break;
+ ((j_common_ptr) cinfo, post->whole_image,
+ (JDIMENSION) 0, post->strip_height, TRUE);
+ }
+ } else {
+ /* For single-pass processing without color quantization,
+ * I have no work to do; just call the upsampler directly.
+ */
+ post->pub.post_process_data = cinfo->upsample->upsample;
+ }
+ break;
#ifdef QUANT_2PASS_SUPPORTED
- case JBUF_SAVE_AND_PASS:
- /* First pass of 2-pass quantization */
- if (post->whole_image == NULL)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- post->pub.post_process_data = post_process_prepass;
- break;
- case JBUF_CRANK_DEST:
- /* Second pass of 2-pass quantization */
- if (post->whole_image == NULL)
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- post->pub.post_process_data = post_process_2pass;
- break;
+ case JBUF_SAVE_AND_PASS:
+ /* First pass of 2-pass quantization */
+ if (post->whole_image == NULL)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ post->pub.post_process_data = post_process_prepass;
+ break;
+ case JBUF_CRANK_DEST:
+ /* Second pass of 2-pass quantization */
+ if (post->whole_image == NULL)
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ post->pub.post_process_data = post_process_2pass;
+ break;
#endif /* QUANT_2PASS_SUPPORTED */
- default:
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
- break;
- }
- post->starting_row = post->next_row = 0;
+ default:
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ break;
+ }
+ post->starting_row = post->next_row = 0;
}
@@ -124,27 +124,27 @@ start_pass_dpost (j_decompress_ptr cinfo, J_BUF_MODE pass_mode)
METHODDEF(void)
post_process_1pass (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
{
- my_post_ptr post = (my_post_ptr) cinfo->post;
- JDIMENSION num_rows, max_rows;
-
- /* Fill the buffer, but not more than what we can dump out in one go. */
- /* Note we rely on the upsampler to detect bottom of image. */
- max_rows = out_rows_avail - *out_row_ctr;
- if (max_rows > post->strip_height)
- max_rows = post->strip_height;
- num_rows = 0;
- (*cinfo->upsample->upsample) (cinfo,
+ my_post_ptr post = (my_post_ptr) cinfo->post;
+ JDIMENSION num_rows, max_rows;
+
+ /* Fill the buffer, but not more than what we can dump out in one go. */
+ /* Note we rely on the upsampler to detect bottom of image. */
+ max_rows = out_rows_avail - *out_row_ctr;
+ if (max_rows > post->strip_height)
+ max_rows = post->strip_height;
+ num_rows = 0;
+ (*cinfo->upsample->upsample) (cinfo,
input_buf, in_row_group_ctr, in_row_groups_avail,
post->buffer, &num_rows, max_rows);
- /* Quantize and emit data. */
- (*cinfo->cquantize->color_quantize) (cinfo,
+ /* Quantize and emit data. */
+ (*cinfo->cquantize->color_quantize) (cinfo,
post->buffer, output_buf + *out_row_ctr, (int) num_rows);
- *out_row_ctr += num_rows;
+ *out_row_ctr += num_rows;
}
@@ -156,41 +156,41 @@ post_process_1pass (j_decompress_ptr cinfo,
METHODDEF(void)
post_process_prepass (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
{
- my_post_ptr post = (my_post_ptr) cinfo->post;
- JDIMENSION old_next_row, num_rows;
+ my_post_ptr post = (my_post_ptr) cinfo->post;
+ JDIMENSION old_next_row, num_rows;
- /* Reposition virtual buffer if at start of strip. */
- if (post->next_row == 0) {
- post->buffer = (*cinfo->mem->access_virt_sarray)
+ /* Reposition virtual buffer if at start of strip. */
+ if (post->next_row == 0) {
+ post->buffer = (*cinfo->mem->access_virt_sarray)
((j_common_ptr) cinfo, post->whole_image,
- post->starting_row, post->strip_height, TRUE);
- }
+ post->starting_row, post->strip_height, TRUE);
+ }
- /* Upsample some data (up to a strip height's worth). */
- old_next_row = post->next_row;
- (*cinfo->upsample->upsample) (cinfo,
+ /* Upsample some data (up to a strip height's worth). */
+ old_next_row = post->next_row;
+ (*cinfo->upsample->upsample) (cinfo,
input_buf, in_row_group_ctr, in_row_groups_avail,
post->buffer, &post->next_row, post->strip_height);
- /* Allow quantizer to scan new data. No data is emitted, */
- /* but we advance out_row_ctr so outer loop can tell when we're done. */
- if (post->next_row > old_next_row) {
- num_rows = post->next_row - old_next_row;
- (*cinfo->cquantize->color_quantize) (cinfo, post->buffer + old_next_row,
- (JSAMPARRAY) NULL, (int) num_rows);
- *out_row_ctr += num_rows;
- }
-
- /* Advance if we filled the strip. */
- if (post->next_row >= post->strip_height) {
- post->starting_row += post->strip_height;
- post->next_row = 0;
- }
+ /* Allow quantizer to scan new data. No data is emitted, */
+ /* but we advance out_row_ctr so outer loop can tell when we're done. */
+ if (post->next_row > old_next_row) {
+ num_rows = post->next_row - old_next_row;
+ (*cinfo->cquantize->color_quantize) (cinfo, post->buffer + old_next_row,
+ (JSAMPARRAY) NULL, (int) num_rows);
+ *out_row_ctr += num_rows;
+ }
+
+ /* Advance if we filled the strip. */
+ if (post->next_row >= post->strip_height) {
+ post->starting_row += post->strip_height;
+ post->next_row = 0;
+ }
}
@@ -200,43 +200,43 @@ post_process_prepass (j_decompress_ptr cinfo,
METHODDEF(void)
post_process_2pass (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
{
- my_post_ptr post = (my_post_ptr) cinfo->post;
- JDIMENSION num_rows, max_rows;
+ my_post_ptr post = (my_post_ptr) cinfo->post;
+ JDIMENSION num_rows, max_rows;
- /* Reposition virtual buffer if at start of strip. */
- if (post->next_row == 0) {
- post->buffer = (*cinfo->mem->access_virt_sarray)
+ /* Reposition virtual buffer if at start of strip. */
+ if (post->next_row == 0) {
+ post->buffer = (*cinfo->mem->access_virt_sarray)
((j_common_ptr) cinfo, post->whole_image,
- post->starting_row, post->strip_height, FALSE);
- }
-
- /* Determine number of rows to emit. */
- num_rows = post->strip_height - post->next_row; /* available in strip */
- max_rows = out_rows_avail - *out_row_ctr; /* available in output area */
- if (num_rows > max_rows)
- num_rows = max_rows;
- /* We have to check bottom of image here, can't depend on upsampler. */
- max_rows = cinfo->output_height - post->starting_row;
- if (num_rows > max_rows)
- num_rows = max_rows;
-
- /* Quantize and emit data. */
- (*cinfo->cquantize->color_quantize) (cinfo,
+ post->starting_row, post->strip_height, FALSE);
+ }
+
+ /* Determine number of rows to emit. */
+ num_rows = post->strip_height - post->next_row; /* available in strip */
+ max_rows = out_rows_avail - *out_row_ctr; /* available in output area */
+ if (num_rows > max_rows)
+ num_rows = max_rows;
+ /* We have to check bottom of image here, can't depend on upsampler. */
+ max_rows = cinfo->output_height - post->starting_row;
+ if (num_rows > max_rows)
+ num_rows = max_rows;
+
+ /* Quantize and emit data. */
+ (*cinfo->cquantize->color_quantize) (cinfo,
post->buffer + post->next_row, output_buf + *out_row_ctr,
(int) num_rows);
- *out_row_ctr += num_rows;
-
- /* Advance if we filled the strip. */
- post->next_row += num_rows;
- if (post->next_row >= post->strip_height) {
- post->starting_row += post->strip_height;
- post->next_row = 0;
- }
+ *out_row_ctr += num_rows;
+
+ /* Advance if we filled the strip. */
+ post->next_row += num_rows;
+ if (post->next_row >= post->strip_height) {
+ post->starting_row += post->strip_height;
+ post->next_row = 0;
+ }
}
#endif /* QUANT_2PASS_SUPPORTED */
@@ -249,42 +249,42 @@ post_process_2pass (j_decompress_ptr cinfo,
GLOBAL(void)
jinit_d_post_controller (j_decompress_ptr cinfo, boolean need_full_buffer)
{
- my_post_ptr post;
+ my_post_ptr post;
- post = (my_post_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ post = (my_post_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_post_controller));
- cinfo->post = (struct jpeg_d_post_controller *) post;
- post->pub.start_pass = start_pass_dpost;
- post->whole_image = NULL; /* flag for no virtual arrays */
- post->buffer = NULL; /* flag for no strip buffer */
-
- /* Create the quantization buffer, if needed */
- if (cinfo->quantize_colors) {
- /* The buffer strip height is max_v_samp_factor, which is typically
- * an efficient number of rows for upsampling to return.
- * (In the presence of output rescaling, we might want to be smarter?)
- */
- post->strip_height = (JDIMENSION) cinfo->max_v_samp_factor;
- if (need_full_buffer) {
- /* Two-pass color quantization: need full-image storage. */
- /* We round up the number of rows to a multiple of the strip height. */
+ cinfo->post = (struct jpeg_d_post_controller *) post;
+ post->pub.start_pass = start_pass_dpost;
+ post->whole_image = NULL; /* flag for no virtual arrays */
+ post->buffer = NULL; /* flag for no strip buffer */
+
+ /* Create the quantization buffer, if needed */
+ if (cinfo->quantize_colors) {
+ /* The buffer strip height is max_v_samp_factor, which is typically
+ * an efficient number of rows for upsampling to return.
+ * (In the presence of output rescaling, we might want to be smarter?)
+ */
+ post->strip_height = (JDIMENSION) cinfo->max_v_samp_factor;
+ if (need_full_buffer) {
+ /* Two-pass color quantization: need full-image storage. */
+ /* We round up the number of rows to a multiple of the strip height. */
#ifdef QUANT_2PASS_SUPPORTED
- post->whole_image = (*cinfo->mem->request_virt_sarray)
+ post->whole_image = (*cinfo->mem->request_virt_sarray)
((j_common_ptr) cinfo, JPOOL_IMAGE, FALSE,
- cinfo->output_width * cinfo->out_color_components,
- (JDIMENSION) jround_up((long) cinfo->output_height,
+ cinfo->output_width * cinfo->out_color_components,
+ (JDIMENSION) jround_up((long) cinfo->output_height,
(long) post->strip_height),
- post->strip_height);
+ post->strip_height);
#else
- ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
+ ERREXIT(cinfo, JERR_BAD_BUFFER_MODE);
#endif /* QUANT_2PASS_SUPPORTED */
- } else {
- /* One-pass color quantization: just make a strip buffer. */
- post->buffer = (*cinfo->mem->alloc_sarray)
+ } else {
+ /* One-pass color quantization: just make a strip buffer. */
+ post->buffer = (*cinfo->mem->alloc_sarray)
((j_common_ptr) cinfo, JPOOL_IMAGE,
- cinfo->output_width * cinfo->out_color_components,
- post->strip_height);
- }
- }
+ cinfo->output_width * cinfo->out_color_components,
+ post->strip_height);
+ }
+ }
}
diff --git a/src/lib/libjpeg/jdsample.c b/src/lib/libjpeg/jdsample.c
index 1be3f725582..16fa2840b85 100644
--- a/src/lib/libjpeg/jdsample.c
+++ b/src/lib/libjpeg/jdsample.c
@@ -27,36 +27,36 @@
/* Pointer to routine to upsample a single component */
typedef JMETHOD(void, upsample1_ptr,
(j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr));
+ JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr));
/* Private subobject */
typedef struct {
- struct jpeg_upsampler pub; /* public fields */
-
- /* Color conversion buffer. When using separate upsampling and color
- * conversion steps, this buffer holds one upsampled row group until it
- * has been color converted and output.
- * Note: we do not allocate any storage for component(s) which are full-size,
- * ie do not need rescaling. The corresponding entry of color_buf[] is
- * simply set to point to the input data array, thereby avoiding copying.
- */
- JSAMPARRAY color_buf[MAX_COMPONENTS];
-
- /* Per-component upsampling method pointers */
- upsample1_ptr methods[MAX_COMPONENTS];
-
- int next_row_out; /* counts rows emitted from color_buf */
- JDIMENSION rows_to_go; /* counts rows remaining in image */
-
- /* Height of an input row group for each component. */
- int rowgroup_height[MAX_COMPONENTS];
-
- /* These arrays save pixel expansion factors so that int_expand need not
- * recompute them each time. They are unused for other upsampling methods.
- */
- UINT8 h_expand[MAX_COMPONENTS];
- UINT8 v_expand[MAX_COMPONENTS];
+ struct jpeg_upsampler pub; /* public fields */
+
+ /* Color conversion buffer. When using separate upsampling and color
+ * conversion steps, this buffer holds one upsampled row group until it
+ * has been color converted and output.
+ * Note: we do not allocate any storage for component(s) which are full-size,
+ * ie do not need rescaling. The corresponding entry of color_buf[] is
+ * simply set to point to the input data array, thereby avoiding copying.
+ */
+ JSAMPARRAY color_buf[MAX_COMPONENTS];
+
+ /* Per-component upsampling method pointers */
+ upsample1_ptr methods[MAX_COMPONENTS];
+
+ int next_row_out; /* counts rows emitted from color_buf */
+ JDIMENSION rows_to_go; /* counts rows remaining in image */
+
+ /* Height of an input row group for each component. */
+ int rowgroup_height[MAX_COMPONENTS];
+
+ /* These arrays save pixel expansion factors so that int_expand need not
+ * recompute them each time. They are unused for other upsampling methods.
+ */
+ UINT8 h_expand[MAX_COMPONENTS];
+ UINT8 v_expand[MAX_COMPONENTS];
} my_upsampler;
typedef my_upsampler * my_upsample_ptr;
@@ -69,12 +69,12 @@ typedef my_upsampler * my_upsample_ptr;
METHODDEF(void)
start_pass_upsample (j_decompress_ptr cinfo)
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- /* Mark the conversion buffer empty */
- upsample->next_row_out = cinfo->max_v_samp_factor;
- /* Initialize total-height counter for detecting bottom of image */
- upsample->rows_to_go = cinfo->output_height;
+ /* Mark the conversion buffer empty */
+ upsample->next_row_out = cinfo->max_v_samp_factor;
+ /* Initialize total-height counter for detecting bottom of image */
+ upsample->rows_to_go = cinfo->output_height;
}
@@ -88,56 +88,56 @@ start_pass_upsample (j_decompress_ptr cinfo)
METHODDEF(void)
sep_upsample (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail)
+ JSAMPIMAGE input_buf, JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail)
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- int ci;
- jpeg_component_info * compptr;
- JDIMENSION num_rows;
-
- /* Fill the conversion buffer, if it's empty */
- if (upsample->next_row_out >= cinfo->max_v_samp_factor) {
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Invoke per-component upsample method. Notice we pass a POINTER
- * to color_buf[ci], so that fullsize_upsample can change it.
- */
- (*upsample->methods[ci]) (cinfo, compptr,
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ int ci;
+ jpeg_component_info * compptr;
+ JDIMENSION num_rows;
+
+ /* Fill the conversion buffer, if it's empty */
+ if (upsample->next_row_out >= cinfo->max_v_samp_factor) {
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Invoke per-component upsample method. Notice we pass a POINTER
+ * to color_buf[ci], so that fullsize_upsample can change it.
+ */
+ (*upsample->methods[ci]) (cinfo, compptr,
input_buf[ci] + (*in_row_group_ctr * upsample->rowgroup_height[ci]),
upsample->color_buf + ci);
- }
- upsample->next_row_out = 0;
- }
-
- /* Color-convert and emit rows */
-
- /* How many we have in the buffer: */
- num_rows = (JDIMENSION) (cinfo->max_v_samp_factor - upsample->next_row_out);
- /* Not more than the distance to the end of the image. Need this test
- * in case the image height is not a multiple of max_v_samp_factor:
- */
- if (num_rows > upsample->rows_to_go)
- num_rows = upsample->rows_to_go;
- /* And not more than what the client can accept: */
- out_rows_avail -= *out_row_ctr;
- if (num_rows > out_rows_avail)
- num_rows = out_rows_avail;
-
- (*cinfo->cconvert->color_convert) (cinfo, upsample->color_buf,
- (JDIMENSION) upsample->next_row_out,
- output_buf + *out_row_ctr,
- (int) num_rows);
-
- /* Adjust counts */
- *out_row_ctr += num_rows;
- upsample->rows_to_go -= num_rows;
- upsample->next_row_out += num_rows;
- /* When the buffer is emptied, declare this input row group consumed */
- if (upsample->next_row_out >= cinfo->max_v_samp_factor)
- (*in_row_group_ctr)++;
+ }
+ upsample->next_row_out = 0;
+ }
+
+ /* Color-convert and emit rows */
+
+ /* How many we have in the buffer: */
+ num_rows = (JDIMENSION) (cinfo->max_v_samp_factor - upsample->next_row_out);
+ /* Not more than the distance to the end of the image. Need this test
+ * in case the image height is not a multiple of max_v_samp_factor:
+ */
+ if (num_rows > upsample->rows_to_go)
+ num_rows = upsample->rows_to_go;
+ /* And not more than what the client can accept: */
+ out_rows_avail -= *out_row_ctr;
+ if (num_rows > out_rows_avail)
+ num_rows = out_rows_avail;
+
+ (*cinfo->cconvert->color_convert) (cinfo, upsample->color_buf,
+ (JDIMENSION) upsample->next_row_out,
+ output_buf + *out_row_ctr,
+ (int) num_rows);
+
+ /* Adjust counts */
+ *out_row_ctr += num_rows;
+ upsample->rows_to_go -= num_rows;
+ upsample->next_row_out += num_rows;
+ /* When the buffer is emptied, declare this input row group consumed */
+ if (upsample->next_row_out >= cinfo->max_v_samp_factor)
+ (*in_row_group_ctr)++;
}
@@ -156,9 +156,9 @@ sep_upsample (j_decompress_ptr cinfo,
METHODDEF(void)
fullsize_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
+ JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
{
- *output_data_ptr = input_data;
+ *output_data_ptr = input_data;
}
@@ -169,9 +169,9 @@ fullsize_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
noop_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
+ JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
{
- *output_data_ptr = NULL; /* safety check */
+ *output_data_ptr = NULL; /* safety check */
}
@@ -188,40 +188,40 @@ noop_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
int_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
+ JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
{
- my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
- JSAMPARRAY output_data = *output_data_ptr;
- register JSAMPROW inptr, outptr;
- register JSAMPLE invalue;
- register int h;
- JSAMPROW outend;
- int h_expand, v_expand;
- int inrow, outrow;
-
- h_expand = upsample->h_expand[compptr->component_index];
- v_expand = upsample->v_expand[compptr->component_index];
-
- inrow = outrow = 0;
- while (outrow < cinfo->max_v_samp_factor) {
- /* Generate one output row with proper horizontal expansion */
- inptr = input_data[inrow];
- outptr = output_data[outrow];
- outend = outptr + cinfo->output_width;
- while (outptr < outend) {
- invalue = *inptr++; /* don't need GETJSAMPLE() here */
- for (h = h_expand; h > 0; h--) {
+ my_upsample_ptr upsample = (my_upsample_ptr) cinfo->upsample;
+ JSAMPARRAY output_data = *output_data_ptr;
+ register JSAMPROW inptr, outptr;
+ register JSAMPLE invalue;
+ register int h;
+ JSAMPROW outend;
+ int h_expand, v_expand;
+ int inrow, outrow;
+
+ h_expand = upsample->h_expand[compptr->component_index];
+ v_expand = upsample->v_expand[compptr->component_index];
+
+ inrow = outrow = 0;
+ while (outrow < cinfo->max_v_samp_factor) {
+ /* Generate one output row with proper horizontal expansion */
+ inptr = input_data[inrow];
+ outptr = output_data[outrow];
+ outend = outptr + cinfo->output_width;
+ while (outptr < outend) {
+ invalue = *inptr++; /* don't need GETJSAMPLE() here */
+ for (h = h_expand; h > 0; h--) {
*outptr++ = invalue;
- }
- }
- /* Generate any additional output rows by duplicating the first one */
- if (v_expand > 1) {
- jcopy_sample_rows(output_data, outrow, output_data, outrow+1,
+ }
+ }
+ /* Generate any additional output rows by duplicating the first one */
+ if (v_expand > 1) {
+ jcopy_sample_rows(output_data, outrow, output_data, outrow+1,
v_expand-1, cinfo->output_width);
- }
- inrow++;
- outrow += v_expand;
- }
+ }
+ inrow++;
+ outrow += v_expand;
+ }
}
@@ -232,24 +232,24 @@ int_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
h2v1_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
+ JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
{
- JSAMPARRAY output_data = *output_data_ptr;
- register JSAMPROW inptr, outptr;
- register JSAMPLE invalue;
- JSAMPROW outend;
- int outrow;
-
- for (outrow = 0; outrow < cinfo->max_v_samp_factor; outrow++) {
- inptr = input_data[outrow];
- outptr = output_data[outrow];
- outend = outptr + cinfo->output_width;
- while (outptr < outend) {
- invalue = *inptr++; /* don't need GETJSAMPLE() here */
- *outptr++ = invalue;
- *outptr++ = invalue;
- }
- }
+ JSAMPARRAY output_data = *output_data_ptr;
+ register JSAMPROW inptr, outptr;
+ register JSAMPLE invalue;
+ JSAMPROW outend;
+ int outrow;
+
+ for (outrow = 0; outrow < cinfo->max_v_samp_factor; outrow++) {
+ inptr = input_data[outrow];
+ outptr = output_data[outrow];
+ outend = outptr + cinfo->output_width;
+ while (outptr < outend) {
+ invalue = *inptr++; /* don't need GETJSAMPLE() here */
+ *outptr++ = invalue;
+ *outptr++ = invalue;
+ }
+ }
}
@@ -260,29 +260,29 @@ h2v1_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
METHODDEF(void)
h2v2_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
+ JSAMPARRAY input_data, JSAMPARRAY * output_data_ptr)
{
- JSAMPARRAY output_data = *output_data_ptr;
- register JSAMPROW inptr, outptr;
- register JSAMPLE invalue;
- JSAMPROW outend;
- int inrow, outrow;
-
- inrow = outrow = 0;
- while (outrow < cinfo->max_v_samp_factor) {
- inptr = input_data[inrow];
- outptr = output_data[outrow];
- outend = outptr + cinfo->output_width;
- while (outptr < outend) {
- invalue = *inptr++; /* don't need GETJSAMPLE() here */
- *outptr++ = invalue;
- *outptr++ = invalue;
- }
- jcopy_sample_rows(output_data, outrow, output_data, outrow+1,
- 1, cinfo->output_width);
- inrow++;
- outrow += 2;
- }
+ JSAMPARRAY output_data = *output_data_ptr;
+ register JSAMPROW inptr, outptr;
+ register JSAMPLE invalue;
+ JSAMPROW outend;
+ int inrow, outrow;
+
+ inrow = outrow = 0;
+ while (outrow < cinfo->max_v_samp_factor) {
+ inptr = input_data[inrow];
+ outptr = output_data[outrow];
+ outend = outptr + cinfo->output_width;
+ while (outptr < outend) {
+ invalue = *inptr++; /* don't need GETJSAMPLE() here */
+ *outptr++ = invalue;
+ *outptr++ = invalue;
+ }
+ jcopy_sample_rows(output_data, outrow, output_data, outrow+1,
+ 1, cinfo->output_width);
+ inrow++;
+ outrow += 2;
+ }
}
@@ -293,69 +293,69 @@ h2v2_upsample (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jinit_upsampler (j_decompress_ptr cinfo)
{
- my_upsample_ptr upsample;
- int ci;
- jpeg_component_info * compptr;
- boolean need_buffer;
- int h_in_group, v_in_group, h_out_group, v_out_group;
-
- upsample = (my_upsample_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ my_upsample_ptr upsample;
+ int ci;
+ jpeg_component_info * compptr;
+ boolean need_buffer;
+ int h_in_group, v_in_group, h_out_group, v_out_group;
+
+ upsample = (my_upsample_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_upsampler));
- cinfo->upsample = (struct jpeg_upsampler *) upsample;
- upsample->pub.start_pass = start_pass_upsample;
- upsample->pub.upsample = sep_upsample;
- upsample->pub.need_context_rows = FALSE; /* until we find out differently */
-
- if (cinfo->CCIR601_sampling) /* this isn't supported */
- ERREXIT(cinfo, JERR_CCIR601_NOTIMPL);
-
- /* Verify we can handle the sampling factors, select per-component methods,
- * and create storage as needed.
- */
- for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
- ci++, compptr++) {
- /* Compute size of an "input group" after IDCT scaling. This many samples
- * are to be converted to max_h_samp_factor * max_v_samp_factor pixels.
- */
- h_in_group = (compptr->h_samp_factor * compptr->DCT_h_scaled_size) /
- cinfo->min_DCT_h_scaled_size;
- v_in_group = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
- cinfo->min_DCT_v_scaled_size;
- h_out_group = cinfo->max_h_samp_factor;
- v_out_group = cinfo->max_v_samp_factor;
- upsample->rowgroup_height[ci] = v_in_group; /* save for use later */
- need_buffer = TRUE;
- if (! compptr->component_needed) {
- /* Don't bother to upsample an uninteresting component. */
- upsample->methods[ci] = noop_upsample;
- need_buffer = FALSE;
- } else if (h_in_group == h_out_group && v_in_group == v_out_group) {
- /* Fullsize components can be processed without any work. */
- upsample->methods[ci] = fullsize_upsample;
- need_buffer = FALSE;
- } else if (h_in_group * 2 == h_out_group &&
- v_in_group == v_out_group) {
- /* Special case for 2h1v upsampling */
- upsample->methods[ci] = h2v1_upsample;
- } else if (h_in_group * 2 == h_out_group &&
- v_in_group * 2 == v_out_group) {
- /* Special case for 2h2v upsampling */
- upsample->methods[ci] = h2v2_upsample;
- } else if ((h_out_group % h_in_group) == 0 &&
- (v_out_group % v_in_group) == 0) {
- /* Generic integral-factors upsampling method */
- upsample->methods[ci] = int_upsample;
- upsample->h_expand[ci] = (UINT8) (h_out_group / h_in_group);
- upsample->v_expand[ci] = (UINT8) (v_out_group / v_in_group);
- } else
- ERREXIT(cinfo, JERR_FRACT_SAMPLE_NOTIMPL);
- if (need_buffer) {
- upsample->color_buf[ci] = (*cinfo->mem->alloc_sarray)
+ cinfo->upsample = (struct jpeg_upsampler *) upsample;
+ upsample->pub.start_pass = start_pass_upsample;
+ upsample->pub.upsample = sep_upsample;
+ upsample->pub.need_context_rows = FALSE; /* until we find out differently */
+
+ if (cinfo->CCIR601_sampling) /* this isn't supported */
+ ERREXIT(cinfo, JERR_CCIR601_NOTIMPL);
+
+ /* Verify we can handle the sampling factors, select per-component methods,
+ * and create storage as needed.
+ */
+ for (ci = 0, compptr = cinfo->comp_info; ci < cinfo->num_components;
+ ci++, compptr++) {
+ /* Compute size of an "input group" after IDCT scaling. This many samples
+ * are to be converted to max_h_samp_factor * max_v_samp_factor pixels.
+ */
+ h_in_group = (compptr->h_samp_factor * compptr->DCT_h_scaled_size) /
+ cinfo->min_DCT_h_scaled_size;
+ v_in_group = (compptr->v_samp_factor * compptr->DCT_v_scaled_size) /
+ cinfo->min_DCT_v_scaled_size;
+ h_out_group = cinfo->max_h_samp_factor;
+ v_out_group = cinfo->max_v_samp_factor;
+ upsample->rowgroup_height[ci] = v_in_group; /* save for use later */
+ need_buffer = TRUE;
+ if (! compptr->component_needed) {
+ /* Don't bother to upsample an uninteresting component. */
+ upsample->methods[ci] = noop_upsample;
+ need_buffer = FALSE;
+ } else if (h_in_group == h_out_group && v_in_group == v_out_group) {
+ /* Fullsize components can be processed without any work. */
+ upsample->methods[ci] = fullsize_upsample;
+ need_buffer = FALSE;
+ } else if (h_in_group * 2 == h_out_group &&
+ v_in_group == v_out_group) {
+ /* Special case for 2h1v upsampling */
+ upsample->methods[ci] = h2v1_upsample;
+ } else if (h_in_group * 2 == h_out_group &&
+ v_in_group * 2 == v_out_group) {
+ /* Special case for 2h2v upsampling */
+ upsample->methods[ci] = h2v2_upsample;
+ } else if ((h_out_group % h_in_group) == 0 &&
+ (v_out_group % v_in_group) == 0) {
+ /* Generic integral-factors upsampling method */
+ upsample->methods[ci] = int_upsample;
+ upsample->h_expand[ci] = (UINT8) (h_out_group / h_in_group);
+ upsample->v_expand[ci] = (UINT8) (v_out_group / v_in_group);
+ } else
+ ERREXIT(cinfo, JERR_FRACT_SAMPLE_NOTIMPL);
+ if (need_buffer) {
+ upsample->color_buf[ci] = (*cinfo->mem->alloc_sarray)
((j_common_ptr) cinfo, JPOOL_IMAGE,
- (JDIMENSION) jround_up((long) cinfo->output_width,
+ (JDIMENSION) jround_up((long) cinfo->output_width,
(long) cinfo->max_h_samp_factor),
- (JDIMENSION) cinfo->max_v_samp_factor);
- }
- }
+ (JDIMENSION) cinfo->max_v_samp_factor);
+ }
+ }
}
diff --git a/src/lib/libjpeg/jdtrans.c b/src/lib/libjpeg/jdtrans.c
index 22dd47fb5c5..3b113cdfcc8 100644
--- a/src/lib/libjpeg/jdtrans.c
+++ b/src/lib/libjpeg/jdtrans.c
@@ -45,47 +45,47 @@ LOCAL(void) transdecode_master_selection JPP((j_decompress_ptr cinfo));
GLOBAL(jvirt_barray_ptr *)
jpeg_read_coefficients (j_decompress_ptr cinfo)
{
- if (cinfo->global_state == DSTATE_READY) {
- /* First call: initialize active modules */
- transdecode_master_selection(cinfo);
- cinfo->global_state = DSTATE_RDCOEFS;
- }
- if (cinfo->global_state == DSTATE_RDCOEFS) {
- /* Absorb whole file into the coef buffer */
- for (;;) {
- int retcode;
- /* Call progress monitor hook if present */
- if (cinfo->progress != NULL)
+ if (cinfo->global_state == DSTATE_READY) {
+ /* First call: initialize active modules */
+ transdecode_master_selection(cinfo);
+ cinfo->global_state = DSTATE_RDCOEFS;
+ }
+ if (cinfo->global_state == DSTATE_RDCOEFS) {
+ /* Absorb whole file into the coef buffer */
+ for (;;) {
+ int retcode;
+ /* Call progress monitor hook if present */
+ if (cinfo->progress != NULL)
(*cinfo->progress->progress_monitor) ((j_common_ptr) cinfo);
- /* Absorb some more input */
- retcode = (*cinfo->inputctl->consume_input) (cinfo);
- if (retcode == JPEG_SUSPENDED)
+ /* Absorb some more input */
+ retcode = (*cinfo->inputctl->consume_input) (cinfo);
+ if (retcode == JPEG_SUSPENDED)
return NULL;
- if (retcode == JPEG_REACHED_EOI)
+ if (retcode == JPEG_REACHED_EOI)
break;
- /* Advance progress counter if appropriate */
- if (cinfo->progress != NULL &&
- (retcode == JPEG_ROW_COMPLETED || retcode == JPEG_REACHED_SOS)) {
+ /* Advance progress counter if appropriate */
+ if (cinfo->progress != NULL &&
+ (retcode == JPEG_ROW_COMPLETED || retcode == JPEG_REACHED_SOS)) {
if (++cinfo->progress->pass_counter >= cinfo->progress->pass_limit) {
- /* startup underestimated number of scans; ratchet up one scan */
- cinfo->progress->pass_limit += (long) cinfo->total_iMCU_rows;
+ /* startup underestimated number of scans; ratchet up one scan */
+ cinfo->progress->pass_limit += (long) cinfo->total_iMCU_rows;
+ }
+ }
+ }
+ /* Set state so that jpeg_finish_decompress does the right thing */
+ cinfo->global_state = DSTATE_STOPPING;
+ }
+ /* At this point we should be in state DSTATE_STOPPING if being used
+ * standalone, or in state DSTATE_BUFIMAGE if being invoked to get access
+ * to the coefficients during a full buffered-image-mode decompression.
+ */
+ if ((cinfo->global_state == DSTATE_STOPPING ||
+ cinfo->global_state == DSTATE_BUFIMAGE) && cinfo->buffered_image) {
+ return cinfo->coef->coef_arrays;
}
- }
- }
- /* Set state so that jpeg_finish_decompress does the right thing */
- cinfo->global_state = DSTATE_STOPPING;
- }
- /* At this point we should be in state DSTATE_STOPPING if being used
- * standalone, or in state DSTATE_BUFIMAGE if being invoked to get access
- * to the coefficients during a full buffered-image-mode decompression.
- */
- if ((cinfo->global_state == DSTATE_STOPPING ||
- cinfo->global_state == DSTATE_BUFIMAGE) && cinfo->buffered_image) {
- return cinfo->coef->coef_arrays;
- }
- /* Oops, improper usage */
- ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
- return NULL; /* keep compiler happy */
+ /* Oops, improper usage */
+ ERREXIT1(cinfo, JERR_BAD_STATE, cinfo->global_state);
+ return NULL; /* keep compiler happy */
}
@@ -97,44 +97,44 @@ jpeg_read_coefficients (j_decompress_ptr cinfo)
LOCAL(void)
transdecode_master_selection (j_decompress_ptr cinfo)
{
- /* This is effectively a buffered-image operation. */
- cinfo->buffered_image = TRUE;
+ /* This is effectively a buffered-image operation. */
+ cinfo->buffered_image = TRUE;
- /* Compute output image dimensions and related values. */
- jpeg_core_output_dimensions(cinfo);
+ /* Compute output image dimensions and related values. */
+ jpeg_core_output_dimensions(cinfo);
- /* Entropy decoding: either Huffman or arithmetic coding. */
- if (cinfo->arith_code)
- jinit_arith_decoder(cinfo);
- else {
- jinit_huff_decoder(cinfo);
- }
+ /* Entropy decoding: either Huffman or arithmetic coding. */
+ if (cinfo->arith_code)
+ jinit_arith_decoder(cinfo);
+ else {
+ jinit_huff_decoder(cinfo);
+ }
- /* Always get a full-image coefficient buffer. */
- jinit_d_coef_controller(cinfo, TRUE);
+ /* Always get a full-image coefficient buffer. */
+ jinit_d_coef_controller(cinfo, TRUE);
- /* We can now tell the memory manager to allocate virtual arrays. */
- (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
+ /* We can now tell the memory manager to allocate virtual arrays. */
+ (*cinfo->mem->realize_virt_arrays) ((j_common_ptr) cinfo);
- /* Initialize input side of decompressor to consume first scan. */
- (*cinfo->inputctl->start_input_pass) (cinfo);
+ /* Initialize input side of decompressor to consume first scan. */
+ (*cinfo->inputctl->start_input_pass) (cinfo);
- /* Initialize progress monitoring. */
- if (cinfo->progress != NULL) {
- int nscans;
- /* Estimate number of scans to set pass_limit. */
- if (cinfo->progressive_mode) {
- /* Arbitrarily estimate 2 interleaved DC scans + 3 AC scans/component. */
- nscans = 2 + 3 * cinfo->num_components;
- } else if (cinfo->inputctl->has_multiple_scans) {
- /* For a nonprogressive multiscan file, estimate 1 scan per component. */
- nscans = cinfo->num_components;
- } else {
- nscans = 1;
- }
- cinfo->progress->pass_counter = 0L;
- cinfo->progress->pass_limit = (long) cinfo->total_iMCU_rows * nscans;
- cinfo->progress->completed_passes = 0;
- cinfo->progress->total_passes = 1;
- }
+ /* Initialize progress monitoring. */
+ if (cinfo->progress != NULL) {
+ int nscans;
+ /* Estimate number of scans to set pass_limit. */
+ if (cinfo->progressive_mode) {
+ /* Arbitrarily estimate 2 interleaved DC scans + 3 AC scans/component. */
+ nscans = 2 + 3 * cinfo->num_components;
+ } else if (cinfo->inputctl->has_multiple_scans) {
+ /* For a nonprogressive multiscan file, estimate 1 scan per component. */
+ nscans = cinfo->num_components;
+ } else {
+ nscans = 1;
+ }
+ cinfo->progress->pass_counter = 0L;
+ cinfo->progress->pass_limit = (long) cinfo->total_iMCU_rows * nscans;
+ cinfo->progress->completed_passes = 0;
+ cinfo->progress->total_passes = 1;
+ }
}
diff --git a/src/lib/libjpeg/jerror.c b/src/lib/libjpeg/jerror.c
index d63d8b10e6a..886ff69cbba 100644
--- a/src/lib/libjpeg/jerror.c
+++ b/src/lib/libjpeg/jerror.c
@@ -28,7 +28,7 @@
#include <windows.h>
#endif
-#ifndef EXIT_FAILURE /* define exit() codes if not provided */
+#ifndef EXIT_FAILURE /* define exit() codes if not provided */
#define EXIT_FAILURE 1
#endif
@@ -42,14 +42,14 @@
*/
#ifdef NEED_SHORT_EXTERNAL_NAMES
-#define jpeg_std_message_table jMsgTable
+#define jpeg_std_message_table jMsgTable
#endif
-#define JMESSAGE(code,string) string ,
+#define JMESSAGE(code,string) string ,
const char * const jpeg_std_message_table[] = {
#include "jerror.h"
- NULL
+ NULL
};
@@ -69,13 +69,13 @@ const char * const jpeg_std_message_table[] = {
METHODDEF(void)
error_exit (j_common_ptr cinfo)
{
- /* Always display the message */
- (*cinfo->err->output_message) (cinfo);
+ /* Always display the message */
+ (*cinfo->err->output_message) (cinfo);
- /* Let the memory manager delete any temp files before we die */
- jpeg_destroy(cinfo);
+ /* Let the memory manager delete any temp files before we die */
+ jpeg_destroy(cinfo);
- exit(EXIT_FAILURE);
+ exit(EXIT_FAILURE);
}
@@ -97,18 +97,18 @@ error_exit (j_common_ptr cinfo)
METHODDEF(void)
output_message (j_common_ptr cinfo)
{
- char buffer[JMSG_LENGTH_MAX];
+ char buffer[JMSG_LENGTH_MAX];
- /* Create the message */
- (*cinfo->err->format_message) (cinfo, buffer);
+ /* Create the message */
+ (*cinfo->err->format_message) (cinfo, buffer);
#ifdef USE_WINDOWS_MESSAGEBOX
- /* Display it in a message dialog box */
- MessageBox(GetActiveWindow(), buffer, "JPEG Library Error",
- MB_OK | MB_ICONERROR);
+ /* Display it in a message dialog box */
+ MessageBox(GetActiveWindow(), buffer, "JPEG Library Error",
+ MB_OK | MB_ICONERROR);
#else
- /* Send it to stderr, adding a newline */
- fprintf(stderr, "%s\n", buffer);
+ /* Send it to stderr, adding a newline */
+ fprintf(stderr, "%s\n", buffer);
#endif
}
@@ -127,22 +127,22 @@ output_message (j_common_ptr cinfo)
METHODDEF(void)
emit_message (j_common_ptr cinfo, int msg_level)
{
- struct jpeg_error_mgr * err = cinfo->err;
-
- if (msg_level < 0) {
- /* It's a warning message. Since corrupt files may generate many warnings,
- * the policy implemented here is to show only the first warning,
- * unless trace_level >= 3.
- */
- if (err->num_warnings == 0 || err->trace_level >= 3)
- (*err->output_message) (cinfo);
- /* Always count warnings in num_warnings. */
- err->num_warnings++;
- } else {
- /* It's a trace message. Show it if trace_level >= msg_level. */
- if (err->trace_level >= msg_level)
- (*err->output_message) (cinfo);
- }
+ struct jpeg_error_mgr * err = cinfo->err;
+
+ if (msg_level < 0) {
+ /* It's a warning message. Since corrupt files may generate many warnings,
+ * the policy implemented here is to show only the first warning,
+ * unless trace_level >= 3.
+ */
+ if (err->num_warnings == 0 || err->trace_level >= 3)
+ (*err->output_message) (cinfo);
+ /* Always count warnings in num_warnings. */
+ err->num_warnings++;
+ } else {
+ /* It's a trace message. Show it if trace_level >= msg_level. */
+ if (err->trace_level >= msg_level)
+ (*err->output_message) (cinfo);
+ }
}
@@ -156,47 +156,47 @@ emit_message (j_common_ptr cinfo, int msg_level)
METHODDEF(void)
format_message (j_common_ptr cinfo, char * buffer)
{
- struct jpeg_error_mgr * err = cinfo->err;
- int msg_code = err->msg_code;
- const char * msgtext = NULL;
- const char * msgptr;
- char ch;
- boolean isstring;
-
- /* Look up message string in proper table */
- if (msg_code > 0 && msg_code <= err->last_jpeg_message) {
- msgtext = err->jpeg_message_table[msg_code];
- } else if (err->addon_message_table != NULL &&
- msg_code >= err->first_addon_message &&
- msg_code <= err->last_addon_message) {
- msgtext = err->addon_message_table[msg_code - err->first_addon_message];
- }
-
- /* Defend against bogus message number */
- if (msgtext == NULL) {
- err->msg_parm.i[0] = msg_code;
- msgtext = err->jpeg_message_table[0];
- }
-
- /* Check for string parameter, as indicated by %s in the message text */
- isstring = FALSE;
- msgptr = msgtext;
- while ((ch = *msgptr++) != '\0') {
- if (ch == '%') {
- if (*msgptr == 's') isstring = TRUE;
- break;
- }
- }
-
- /* Format the message into the passed buffer */
- if (isstring)
- sprintf(buffer, msgtext, err->msg_parm.s);
- else
- sprintf(buffer, msgtext,
- err->msg_parm.i[0], err->msg_parm.i[1],
- err->msg_parm.i[2], err->msg_parm.i[3],
- err->msg_parm.i[4], err->msg_parm.i[5],
- err->msg_parm.i[6], err->msg_parm.i[7]);
+ struct jpeg_error_mgr * err = cinfo->err;
+ int msg_code = err->msg_code;
+ const char * msgtext = NULL;
+ const char * msgptr;
+ char ch;
+ boolean isstring;
+
+ /* Look up message string in proper table */
+ if (msg_code > 0 && msg_code <= err->last_jpeg_message) {
+ msgtext = err->jpeg_message_table[msg_code];
+ } else if (err->addon_message_table != NULL &&
+ msg_code >= err->first_addon_message &&
+ msg_code <= err->last_addon_message) {
+ msgtext = err->addon_message_table[msg_code - err->first_addon_message];
+ }
+
+ /* Defend against bogus message number */
+ if (msgtext == NULL) {
+ err->msg_parm.i[0] = msg_code;
+ msgtext = err->jpeg_message_table[0];
+ }
+
+ /* Check for string parameter, as indicated by %s in the message text */
+ isstring = FALSE;
+ msgptr = msgtext;
+ while ((ch = *msgptr++) != '\0') {
+ if (ch == '%') {
+ if (*msgptr == 's') isstring = TRUE;
+ break;
+ }
+ }
+
+ /* Format the message into the passed buffer */
+ if (isstring)
+ sprintf(buffer, msgtext, err->msg_parm.s);
+ else
+ sprintf(buffer, msgtext,
+ err->msg_parm.i[0], err->msg_parm.i[1],
+ err->msg_parm.i[2], err->msg_parm.i[3],
+ err->msg_parm.i[4], err->msg_parm.i[5],
+ err->msg_parm.i[6], err->msg_parm.i[7]);
}
@@ -211,9 +211,9 @@ format_message (j_common_ptr cinfo, char * buffer)
METHODDEF(void)
reset_error_mgr (j_common_ptr cinfo)
{
- cinfo->err->num_warnings = 0;
- /* trace_level is not reset since it is an application-supplied parameter */
- cinfo->err->msg_code = 0; /* may be useful as a flag for "no error" */
+ cinfo->err->num_warnings = 0;
+ /* trace_level is not reset since it is an application-supplied parameter */
+ cinfo->err->msg_code = 0; /* may be useful as a flag for "no error" */
}
@@ -230,23 +230,23 @@ reset_error_mgr (j_common_ptr cinfo)
GLOBAL(struct jpeg_error_mgr *)
jpeg_std_error (struct jpeg_error_mgr * err)
{
- err->error_exit = error_exit;
- err->emit_message = emit_message;
- err->output_message = output_message;
- err->format_message = format_message;
- err->reset_error_mgr = reset_error_mgr;
+ err->error_exit = error_exit;
+ err->emit_message = emit_message;
+ err->output_message = output_message;
+ err->format_message = format_message;
+ err->reset_error_mgr = reset_error_mgr;
- err->trace_level = 0; /* default = no tracing */
- err->num_warnings = 0; /* no warnings emitted yet */
- err->msg_code = 0; /* may be useful as a flag for "no error" */
+ err->trace_level = 0; /* default = no tracing */
+ err->num_warnings = 0; /* no warnings emitted yet */
+ err->msg_code = 0; /* may be useful as a flag for "no error" */
- /* Initialize message table pointers */
- err->jpeg_message_table = jpeg_std_message_table;
- err->last_jpeg_message = (int) JMSG_LASTMSGCODE - 1;
+ /* Initialize message table pointers */
+ err->jpeg_message_table = jpeg_std_message_table;
+ err->last_jpeg_message = (int) JMSG_LASTMSGCODE - 1;
- err->addon_message_table = NULL;
- err->first_addon_message = 0; /* for safety */
- err->last_addon_message = 0;
+ err->addon_message_table = NULL;
+ err->first_addon_message = 0; /* for safety */
+ err->last_addon_message = 0;
- return err;
+ return err;
}
diff --git a/src/lib/libjpeg/jerror.h b/src/lib/libjpeg/jerror.h
index 1cfb2b19d85..2713154b63b 100644
--- a/src/lib/libjpeg/jerror.h
+++ b/src/lib/libjpeg/jerror.h
@@ -33,7 +33,7 @@
typedef enum {
-#define JMESSAGE(code,string) code ,
+#define JMESSAGE(code,string) code ,
#endif /* JMAKE_ENUM_LIST */
@@ -48,25 +48,25 @@ JMESSAGE(JERR_BAD_CROP_SPEC, "Invalid crop request")
JMESSAGE(JERR_BAD_DCT_COEF, "DCT coefficient out of range")
JMESSAGE(JERR_BAD_DCTSIZE, "DCT scaled block size %dx%d not supported")
JMESSAGE(JERR_BAD_DROP_SAMPLING,
- "Component index %d: mismatching sampling ratio %d:%d, %d:%d, %c")
+ "Component index %d: mismatching sampling ratio %d:%d, %d:%d, %c")
JMESSAGE(JERR_BAD_HUFF_TABLE, "Bogus Huffman table definition")
JMESSAGE(JERR_BAD_IN_COLORSPACE, "Bogus input colorspace")
JMESSAGE(JERR_BAD_J_COLORSPACE, "Bogus JPEG colorspace")
JMESSAGE(JERR_BAD_LENGTH, "Bogus marker length")
JMESSAGE(JERR_BAD_LIB_VERSION,
- "Wrong JPEG library version: library is %d, caller expects %d")
+ "Wrong JPEG library version: library is %d, caller expects %d")
JMESSAGE(JERR_BAD_MCU_SIZE, "Sampling factors too large for interleaved scan")
JMESSAGE(JERR_BAD_POOL_ID, "Invalid memory pool code %d")
JMESSAGE(JERR_BAD_PRECISION, "Unsupported JPEG data precision %d")
JMESSAGE(JERR_BAD_PROGRESSION,
- "Invalid progressive parameters Ss=%d Se=%d Ah=%d Al=%d")
+ "Invalid progressive parameters Ss=%d Se=%d Ah=%d Al=%d")
JMESSAGE(JERR_BAD_PROG_SCRIPT,
- "Invalid progressive parameters at scan script entry %d")
+ "Invalid progressive parameters at scan script entry %d")
JMESSAGE(JERR_BAD_SAMPLING, "Bogus sampling factors")
JMESSAGE(JERR_BAD_SCAN_SCRIPT, "Invalid scan script at entry %d")
JMESSAGE(JERR_BAD_STATE, "Improper call to JPEG library in state %d")
JMESSAGE(JERR_BAD_STRUCT_SIZE,
- "JPEG parameter struct mismatch: library thinks size is %u, caller expects %u")
+ "JPEG parameter struct mismatch: library thinks size is %u, caller expects %u")
JMESSAGE(JERR_BAD_VIRTUAL_ACCESS, "Bogus virtual array access")
JMESSAGE(JERR_BUFFER_SIZE, "Buffer passed to JPEG library is too small")
JMESSAGE(JERR_CANT_SUSPEND, "Suspension not allowed here")
@@ -90,7 +90,7 @@ JMESSAGE(JERR_IMAGE_TOO_BIG, "Maximum supported image dimension is %u pixels")
JMESSAGE(JERR_INPUT_EMPTY, "Empty input file")
JMESSAGE(JERR_INPUT_EOF, "Premature end of input file")
JMESSAGE(JERR_MISMATCHED_QUANT_TABLE,
- "Cannot transcode due to multiple use of quantization table %d")
+ "Cannot transcode due to multiple use of quantization table %d")
JMESSAGE(JERR_MISSING_DATA, "Scan script does not transmit all data")
JMESSAGE(JERR_MODE_CHANGE, "Invalid color quantization mode change")
JMESSAGE(JERR_NOTIMPL, "Not implemented yet")
@@ -103,7 +103,7 @@ JMESSAGE(JERR_NO_QUANT_TABLE, "Quantization table 0x%02x was not defined")
JMESSAGE(JERR_NO_SOI, "Not a JPEG file: starts with 0x%02x 0x%02x")
JMESSAGE(JERR_OUT_OF_MEMORY, "Insufficient memory (case %d)")
JMESSAGE(JERR_QUANT_COMPONENTS,
- "Cannot quantize more than %d color components")
+ "Cannot quantize more than %d color components")
JMESSAGE(JERR_QUANT_FEW_COLORS, "Cannot quantize to fewer than %d colors")
JMESSAGE(JERR_QUANT_MANY_COLORS, "Cannot quantize to more than %d colors")
JMESSAGE(JERR_SOF_DUPLICATE, "Invalid JPEG file structure: two SOF markers")
@@ -115,7 +115,7 @@ JMESSAGE(JERR_TFILE_CREATE, "Failed to create temporary file %s")
JMESSAGE(JERR_TFILE_READ, "Read failed on temporary file")
JMESSAGE(JERR_TFILE_SEEK, "Seek failed on temporary file")
JMESSAGE(JERR_TFILE_WRITE,
- "Write failed on temporary file --- out of disk space?")
+ "Write failed on temporary file --- out of disk space?")
JMESSAGE(JERR_TOO_LITTLE_DATA, "Application transferred too few scanlines")
JMESSAGE(JERR_UNKNOWN_MARKER, "Unsupported marker type 0x%02x")
JMESSAGE(JERR_VIRTUAL_BUG, "Virtual array controller messed up")
@@ -125,9 +125,9 @@ JMESSAGE(JERR_XMS_WRITE, "Write to XMS failed")
JMESSAGE(JMSG_COPYRIGHT, JCOPYRIGHT)
JMESSAGE(JMSG_VERSION, JVERSION)
JMESSAGE(JTRC_16BIT_TABLES,
- "Caution: quantization tables are too coarse for baseline JPEG")
+ "Caution: quantization tables are too coarse for baseline JPEG")
JMESSAGE(JTRC_ADOBE,
- "Adobe APP14 marker: version %d, flags 0x%04x 0x%04x, transform %d")
+ "Adobe APP14 marker: version %d, flags 0x%04x 0x%04x, transform %d")
JMESSAGE(JTRC_APP0, "Unknown APP0 marker (not JFIF), length %u")
JMESSAGE(JTRC_APP14, "Unknown APP14 marker (not Adobe), length %u")
JMESSAGE(JTRC_DAC, "Define Arithmetic Table 0x%02x: 0x%02x")
@@ -140,9 +140,9 @@ JMESSAGE(JTRC_EOI, "End Of Image")
JMESSAGE(JTRC_HUFFBITS, " %3d %3d %3d %3d %3d %3d %3d %3d")
JMESSAGE(JTRC_JFIF, "JFIF APP0 marker: version %d.%02d, density %dx%d %d")
JMESSAGE(JTRC_JFIF_BADTHUMBNAILSIZE,
- "Warning: thumbnail image size does not match data length %u")
+ "Warning: thumbnail image size does not match data length %u")
JMESSAGE(JTRC_JFIF_EXTENSION,
- "JFIF extension marker: type 0x%02x, length %u")
+ "JFIF extension marker: type 0x%02x, length %u")
JMESSAGE(JTRC_JFIF_THUMBNAIL, " with %d x %d thumbnail image")
JMESSAGE(JTRC_MISC_MARKER, "Miscellaneous marker 0x%02x, length %u")
JMESSAGE(JTRC_PARMLESS_MARKER, "Unexpected marker 0x%02x")
@@ -153,7 +153,7 @@ JMESSAGE(JTRC_QUANT_SELECTED, "Selected %d colors for quantization")
JMESSAGE(JTRC_RECOVERY_ACTION, "At marker 0x%02x, recovery action %d")
JMESSAGE(JTRC_RST, "RST%d")
JMESSAGE(JTRC_SMOOTH_NOTIMPL,
- "Smoothing not supported with nonstandard sampling ratios")
+ "Smoothing not supported with nonstandard sampling ratios")
JMESSAGE(JTRC_SOF, "Start Of Frame 0x%02x: width=%u, height=%u, components=%d")
JMESSAGE(JTRC_SOF_COMPONENT, " Component %d: %dhx%dv q=%d")
JMESSAGE(JTRC_SOI, "Start of Image")
@@ -163,33 +163,33 @@ JMESSAGE(JTRC_SOS_PARAMS, " Ss=%d, Se=%d, Ah=%d, Al=%d")
JMESSAGE(JTRC_TFILE_CLOSE, "Closed temporary file %s")
JMESSAGE(JTRC_TFILE_OPEN, "Opened temporary file %s")
JMESSAGE(JTRC_THUMB_JPEG,
- "JFIF extension marker: JPEG-compressed thumbnail image, length %u")
+ "JFIF extension marker: JPEG-compressed thumbnail image, length %u")
JMESSAGE(JTRC_THUMB_PALETTE,
- "JFIF extension marker: palette thumbnail image, length %u")
+ "JFIF extension marker: palette thumbnail image, length %u")
JMESSAGE(JTRC_THUMB_RGB,
- "JFIF extension marker: RGB thumbnail image, length %u")
+ "JFIF extension marker: RGB thumbnail image, length %u")
JMESSAGE(JTRC_UNKNOWN_IDS,
- "Unrecognized component IDs %d %d %d, assuming YCbCr")
+ "Unrecognized component IDs %d %d %d, assuming YCbCr")
JMESSAGE(JTRC_XMS_CLOSE, "Freed XMS handle %u")
JMESSAGE(JTRC_XMS_OPEN, "Obtained XMS handle %u")
JMESSAGE(JWRN_ADOBE_XFORM, "Unknown Adobe color transform code %d")
JMESSAGE(JWRN_ARITH_BAD_CODE, "Corrupt JPEG data: bad arithmetic code")
JMESSAGE(JWRN_BOGUS_PROGRESSION,
- "Inconsistent progression sequence for component %d coefficient %d")
+ "Inconsistent progression sequence for component %d coefficient %d")
JMESSAGE(JWRN_EXTRANEOUS_DATA,
- "Corrupt JPEG data: %u extraneous bytes before marker 0x%02x")
+ "Corrupt JPEG data: %u extraneous bytes before marker 0x%02x")
JMESSAGE(JWRN_HIT_MARKER, "Corrupt JPEG data: premature end of data segment")
JMESSAGE(JWRN_HUFF_BAD_CODE, "Corrupt JPEG data: bad Huffman code")
JMESSAGE(JWRN_JFIF_MAJOR, "Warning: unknown JFIF revision number %d.%02d")
JMESSAGE(JWRN_JPEG_EOF, "Premature end of JPEG file")
JMESSAGE(JWRN_MUST_RESYNC,
- "Corrupt JPEG data: found marker 0x%02x instead of RST%d")
+ "Corrupt JPEG data: found marker 0x%02x instead of RST%d")
JMESSAGE(JWRN_NOT_SEQUENTIAL, "Invalid SOS parameters for sequential JPEG")
JMESSAGE(JWRN_TOO_MUCH_DATA, "Application transferred too many scanlines")
#ifdef JMAKE_ENUM_LIST
- JMSG_LASTMSGCODE
+ JMSG_LASTMSGCODE
} J_MESSAGE_CODE;
#undef JMAKE_ENUM_LIST
@@ -207,98 +207,98 @@ JMESSAGE(JWRN_TOO_MUCH_DATA, "Application transferred too many scanlines")
/* Fatal errors (print message and exit) */
#define ERREXIT(cinfo,code) \
- ((cinfo)->err->msg_code = (code), \
- (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
+ ((cinfo)->err->msg_code = (code), \
+ (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
#define ERREXIT1(cinfo,code,p1) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
#define ERREXIT2(cinfo,code,p1,p2) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (cinfo)->err->msg_parm.i[1] = (p2), \
- (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (cinfo)->err->msg_parm.i[1] = (p2), \
+ (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
#define ERREXIT3(cinfo,code,p1,p2,p3) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (cinfo)->err->msg_parm.i[1] = (p2), \
- (cinfo)->err->msg_parm.i[2] = (p3), \
- (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (cinfo)->err->msg_parm.i[1] = (p2), \
+ (cinfo)->err->msg_parm.i[2] = (p3), \
+ (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
#define ERREXIT4(cinfo,code,p1,p2,p3,p4) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (cinfo)->err->msg_parm.i[1] = (p2), \
- (cinfo)->err->msg_parm.i[2] = (p3), \
- (cinfo)->err->msg_parm.i[3] = (p4), \
- (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (cinfo)->err->msg_parm.i[1] = (p2), \
+ (cinfo)->err->msg_parm.i[2] = (p3), \
+ (cinfo)->err->msg_parm.i[3] = (p4), \
+ (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
#define ERREXIT6(cinfo,code,p1,p2,p3,p4,p5,p6) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (cinfo)->err->msg_parm.i[1] = (p2), \
- (cinfo)->err->msg_parm.i[2] = (p3), \
- (cinfo)->err->msg_parm.i[3] = (p4), \
- (cinfo)->err->msg_parm.i[4] = (p5), \
- (cinfo)->err->msg_parm.i[5] = (p6), \
- (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (cinfo)->err->msg_parm.i[1] = (p2), \
+ (cinfo)->err->msg_parm.i[2] = (p3), \
+ (cinfo)->err->msg_parm.i[3] = (p4), \
+ (cinfo)->err->msg_parm.i[4] = (p5), \
+ (cinfo)->err->msg_parm.i[5] = (p6), \
+ (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
#define ERREXITS(cinfo,code,str) \
- ((cinfo)->err->msg_code = (code), \
- strncpy((cinfo)->err->msg_parm.s, (str), JMSG_STR_PARM_MAX), \
- (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
+ ((cinfo)->err->msg_code = (code), \
+ strncpy((cinfo)->err->msg_parm.s, (str), JMSG_STR_PARM_MAX), \
+ (*(cinfo)->err->error_exit) ((j_common_ptr) (cinfo)))
-#define MAKESTMT(stuff) do { stuff } while (0)
+#define MAKESTMT(stuff) do { stuff } while (0)
/* Nonfatal errors (we can keep going, but the data is probably corrupt) */
#define WARNMS(cinfo,code) \
- ((cinfo)->err->msg_code = (code), \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), -1))
+ ((cinfo)->err->msg_code = (code), \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), -1))
#define WARNMS1(cinfo,code,p1) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), -1))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), -1))
#define WARNMS2(cinfo,code,p1,p2) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (cinfo)->err->msg_parm.i[1] = (p2), \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), -1))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (cinfo)->err->msg_parm.i[1] = (p2), \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), -1))
/* Informational/debugging messages */
#define TRACEMS(cinfo,lvl,code) \
- ((cinfo)->err->msg_code = (code), \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
+ ((cinfo)->err->msg_code = (code), \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
#define TRACEMS1(cinfo,lvl,code,p1) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
#define TRACEMS2(cinfo,lvl,code,p1,p2) \
- ((cinfo)->err->msg_code = (code), \
- (cinfo)->err->msg_parm.i[0] = (p1), \
- (cinfo)->err->msg_parm.i[1] = (p2), \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
+ ((cinfo)->err->msg_code = (code), \
+ (cinfo)->err->msg_parm.i[0] = (p1), \
+ (cinfo)->err->msg_parm.i[1] = (p2), \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
#define TRACEMS3(cinfo,lvl,code,p1,p2,p3) \
- MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
- _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); \
- (cinfo)->err->msg_code = (code); \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
+ MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
+ _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); \
+ (cinfo)->err->msg_code = (code); \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
#define TRACEMS4(cinfo,lvl,code,p1,p2,p3,p4) \
- MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
- _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); _mp[3] = (p4); \
- (cinfo)->err->msg_code = (code); \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
+ MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
+ _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); _mp[3] = (p4); \
+ (cinfo)->err->msg_code = (code); \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
#define TRACEMS5(cinfo,lvl,code,p1,p2,p3,p4,p5) \
- MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
- _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); _mp[3] = (p4); \
- _mp[4] = (p5); \
- (cinfo)->err->msg_code = (code); \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
+ MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
+ _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); _mp[3] = (p4); \
+ _mp[4] = (p5); \
+ (cinfo)->err->msg_code = (code); \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
#define TRACEMS8(cinfo,lvl,code,p1,p2,p3,p4,p5,p6,p7,p8) \
- MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
- _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); _mp[3] = (p4); \
- _mp[4] = (p5); _mp[5] = (p6); _mp[6] = (p7); _mp[7] = (p8); \
- (cinfo)->err->msg_code = (code); \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
+ MAKESTMT(int * _mp = (cinfo)->err->msg_parm.i; \
+ _mp[0] = (p1); _mp[1] = (p2); _mp[2] = (p3); _mp[3] = (p4); \
+ _mp[4] = (p5); _mp[5] = (p6); _mp[6] = (p7); _mp[7] = (p8); \
+ (cinfo)->err->msg_code = (code); \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)); )
#define TRACEMSS(cinfo,lvl,code,str) \
- ((cinfo)->err->msg_code = (code), \
- strncpy((cinfo)->err->msg_parm.s, (str), JMSG_STR_PARM_MAX), \
- (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
+ ((cinfo)->err->msg_code = (code), \
+ strncpy((cinfo)->err->msg_parm.s, (str), JMSG_STR_PARM_MAX), \
+ (*(cinfo)->err->emit_message) ((j_common_ptr) (cinfo), (lvl)))
#endif /* JERROR_H */
diff --git a/src/lib/libjpeg/jfdctflt.c b/src/lib/libjpeg/jfdctflt.c
index 74d0d862dcb..7f57ffc6278 100644
--- a/src/lib/libjpeg/jfdctflt.c
+++ b/src/lib/libjpeg/jfdctflt.c
@@ -38,7 +38,7 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
#ifdef DCT_FLOAT_SUPPORTED
@@ -48,7 +48,7 @@
*/
#if DCTSIZE != 8
- Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
+ Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
#endif
@@ -59,116 +59,116 @@
GLOBAL(void)
jpeg_fdct_float (FAST_FLOAT * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- FAST_FLOAT tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- FAST_FLOAT tmp10, tmp11, tmp12, tmp13;
- FAST_FLOAT z1, z2, z3, z4, z5, z11, z13;
- FAST_FLOAT *dataptr;
- JSAMPROW elemptr;
- int ctr;
-
- /* Pass 1: process rows. */
-
- dataptr = data;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Load data into workspace */
- tmp0 = (FAST_FLOAT) (GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]));
- tmp7 = (FAST_FLOAT) (GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]));
- tmp1 = (FAST_FLOAT) (GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]));
- tmp6 = (FAST_FLOAT) (GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]));
- tmp2 = (FAST_FLOAT) (GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]));
- tmp5 = (FAST_FLOAT) (GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]));
- tmp3 = (FAST_FLOAT) (GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]));
- tmp4 = (FAST_FLOAT) (GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]));
-
- /* Even part */
-
- tmp10 = tmp0 + tmp3; /* phase 2 */
- tmp13 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp1 - tmp2;
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = tmp10 + tmp11 - 8 * CENTERJSAMPLE; /* phase 3 */
- dataptr[4] = tmp10 - tmp11;
-
- z1 = (tmp12 + tmp13) * ((FAST_FLOAT) 0.707106781); /* c4 */
- dataptr[2] = tmp13 + z1; /* phase 5 */
- dataptr[6] = tmp13 - z1;
-
- /* Odd part */
-
- tmp10 = tmp4 + tmp5; /* phase 2 */
- tmp11 = tmp5 + tmp6;
- tmp12 = tmp6 + tmp7;
-
- /* The rotator is modified from fig 4-8 to avoid extra negations. */
- z5 = (tmp10 - tmp12) * ((FAST_FLOAT) 0.382683433); /* c6 */
- z2 = ((FAST_FLOAT) 0.541196100) * tmp10 + z5; /* c2-c6 */
- z4 = ((FAST_FLOAT) 1.306562965) * tmp12 + z5; /* c2+c6 */
- z3 = tmp11 * ((FAST_FLOAT) 0.707106781); /* c4 */
-
- z11 = tmp7 + z3; /* phase 5 */
- z13 = tmp7 - z3;
-
- dataptr[5] = z13 + z2; /* phase 6 */
- dataptr[3] = z13 - z2;
- dataptr[1] = z11 + z4;
- dataptr[7] = z11 - z4;
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns. */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
- tmp7 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
- tmp6 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
- tmp5 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
- tmp4 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
-
- /* Even part */
-
- tmp10 = tmp0 + tmp3; /* phase 2 */
- tmp13 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp1 - tmp2;
-
- dataptr[DCTSIZE*0] = tmp10 + tmp11; /* phase 3 */
- dataptr[DCTSIZE*4] = tmp10 - tmp11;
-
- z1 = (tmp12 + tmp13) * ((FAST_FLOAT) 0.707106781); /* c4 */
- dataptr[DCTSIZE*2] = tmp13 + z1; /* phase 5 */
- dataptr[DCTSIZE*6] = tmp13 - z1;
-
- /* Odd part */
-
- tmp10 = tmp4 + tmp5; /* phase 2 */
- tmp11 = tmp5 + tmp6;
- tmp12 = tmp6 + tmp7;
-
- /* The rotator is modified from fig 4-8 to avoid extra negations. */
- z5 = (tmp10 - tmp12) * ((FAST_FLOAT) 0.382683433); /* c6 */
- z2 = ((FAST_FLOAT) 0.541196100) * tmp10 + z5; /* c2-c6 */
- z4 = ((FAST_FLOAT) 1.306562965) * tmp12 + z5; /* c2+c6 */
- z3 = tmp11 * ((FAST_FLOAT) 0.707106781); /* c4 */
-
- z11 = tmp7 + z3; /* phase 5 */
- z13 = tmp7 - z3;
-
- dataptr[DCTSIZE*5] = z13 + z2; /* phase 6 */
- dataptr[DCTSIZE*3] = z13 - z2;
- dataptr[DCTSIZE*1] = z11 + z4;
- dataptr[DCTSIZE*7] = z11 - z4;
-
- dataptr++; /* advance pointer to next column */
- }
+ FAST_FLOAT tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ FAST_FLOAT tmp10, tmp11, tmp12, tmp13;
+ FAST_FLOAT z1, z2, z3, z4, z5, z11, z13;
+ FAST_FLOAT *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+
+ /* Pass 1: process rows. */
+
+ dataptr = data;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Load data into workspace */
+ tmp0 = (FAST_FLOAT) (GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]));
+ tmp7 = (FAST_FLOAT) (GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]));
+ tmp1 = (FAST_FLOAT) (GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]));
+ tmp6 = (FAST_FLOAT) (GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]));
+ tmp2 = (FAST_FLOAT) (GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]));
+ tmp5 = (FAST_FLOAT) (GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]));
+ tmp3 = (FAST_FLOAT) (GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]));
+ tmp4 = (FAST_FLOAT) (GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]));
+
+ /* Even part */
+
+ tmp10 = tmp0 + tmp3; /* phase 2 */
+ tmp13 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp1 - tmp2;
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = tmp10 + tmp11 - 8 * CENTERJSAMPLE; /* phase 3 */
+ dataptr[4] = tmp10 - tmp11;
+
+ z1 = (tmp12 + tmp13) * ((FAST_FLOAT) 0.707106781); /* c4 */
+ dataptr[2] = tmp13 + z1; /* phase 5 */
+ dataptr[6] = tmp13 - z1;
+
+ /* Odd part */
+
+ tmp10 = tmp4 + tmp5; /* phase 2 */
+ tmp11 = tmp5 + tmp6;
+ tmp12 = tmp6 + tmp7;
+
+ /* The rotator is modified from fig 4-8 to avoid extra negations. */
+ z5 = (tmp10 - tmp12) * ((FAST_FLOAT) 0.382683433); /* c6 */
+ z2 = ((FAST_FLOAT) 0.541196100) * tmp10 + z5; /* c2-c6 */
+ z4 = ((FAST_FLOAT) 1.306562965) * tmp12 + z5; /* c2+c6 */
+ z3 = tmp11 * ((FAST_FLOAT) 0.707106781); /* c4 */
+
+ z11 = tmp7 + z3; /* phase 5 */
+ z13 = tmp7 - z3;
+
+ dataptr[5] = z13 + z2; /* phase 6 */
+ dataptr[3] = z13 - z2;
+ dataptr[1] = z11 + z4;
+ dataptr[7] = z11 - z4;
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns. */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
+ tmp7 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
+ tmp6 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
+ tmp5 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
+ tmp4 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
+
+ /* Even part */
+
+ tmp10 = tmp0 + tmp3; /* phase 2 */
+ tmp13 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp1 - tmp2;
+
+ dataptr[DCTSIZE*0] = tmp10 + tmp11; /* phase 3 */
+ dataptr[DCTSIZE*4] = tmp10 - tmp11;
+
+ z1 = (tmp12 + tmp13) * ((FAST_FLOAT) 0.707106781); /* c4 */
+ dataptr[DCTSIZE*2] = tmp13 + z1; /* phase 5 */
+ dataptr[DCTSIZE*6] = tmp13 - z1;
+
+ /* Odd part */
+
+ tmp10 = tmp4 + tmp5; /* phase 2 */
+ tmp11 = tmp5 + tmp6;
+ tmp12 = tmp6 + tmp7;
+
+ /* The rotator is modified from fig 4-8 to avoid extra negations. */
+ z5 = (tmp10 - tmp12) * ((FAST_FLOAT) 0.382683433); /* c6 */
+ z2 = ((FAST_FLOAT) 0.541196100) * tmp10 + z5; /* c2-c6 */
+ z4 = ((FAST_FLOAT) 1.306562965) * tmp12 + z5; /* c2+c6 */
+ z3 = tmp11 * ((FAST_FLOAT) 0.707106781); /* c4 */
+
+ z11 = tmp7 + z3; /* phase 5 */
+ z13 = tmp7 - z3;
+
+ dataptr[DCTSIZE*5] = z13 + z2; /* phase 6 */
+ dataptr[DCTSIZE*3] = z13 - z2;
+ dataptr[DCTSIZE*1] = z11 + z4;
+ dataptr[DCTSIZE*7] = z11 - z4;
+
+ dataptr++; /* advance pointer to next column */
+ }
}
#endif /* DCT_FLOAT_SUPPORTED */
diff --git a/src/lib/libjpeg/jfdctfst.c b/src/lib/libjpeg/jfdctfst.c
index 8cad5f22939..47a55316d85 100644
--- a/src/lib/libjpeg/jfdctfst.c
+++ b/src/lib/libjpeg/jfdctfst.c
@@ -34,7 +34,7 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
#ifdef DCT_IFAST_SUPPORTED
@@ -44,7 +44,7 @@
*/
#if DCTSIZE != 8
- Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
+ Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
#endif
@@ -77,10 +77,10 @@
*/
#if CONST_BITS == 8
-#define FIX_0_382683433 ((INT32) 98) /* FIX(0.382683433) */
-#define FIX_0_541196100 ((INT32) 139) /* FIX(0.541196100) */
-#define FIX_0_707106781 ((INT32) 181) /* FIX(0.707106781) */
-#define FIX_1_306562965 ((INT32) 334) /* FIX(1.306562965) */
+#define FIX_0_382683433 ((INT32) 98) /* FIX(0.382683433) */
+#define FIX_0_541196100 ((INT32) 139) /* FIX(0.541196100) */
+#define FIX_0_707106781 ((INT32) 181) /* FIX(0.707106781) */
+#define FIX_1_306562965 ((INT32) 334) /* FIX(1.306562965) */
#else
#define FIX_0_382683433 FIX(0.382683433)
#define FIX_0_541196100 FIX(0.541196100)
@@ -114,117 +114,117 @@
GLOBAL(void)
jpeg_fdct_ifast (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- DCTELEM tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- DCTELEM tmp10, tmp11, tmp12, tmp13;
- DCTELEM z1, z2, z3, z4, z5, z11, z13;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
-
- dataptr = data;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Load data into workspace */
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
- tmp7 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
- tmp6 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
- tmp5 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
- tmp4 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
-
- /* Even part */
-
- tmp10 = tmp0 + tmp3; /* phase 2 */
- tmp13 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp1 - tmp2;
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = tmp10 + tmp11 - 8 * CENTERJSAMPLE; /* phase 3 */
- dataptr[4] = tmp10 - tmp11;
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_707106781); /* c4 */
- dataptr[2] = tmp13 + z1; /* phase 5 */
- dataptr[6] = tmp13 - z1;
-
- /* Odd part */
-
- tmp10 = tmp4 + tmp5; /* phase 2 */
- tmp11 = tmp5 + tmp6;
- tmp12 = tmp6 + tmp7;
-
- /* The rotator is modified from fig 4-8 to avoid extra negations. */
- z5 = MULTIPLY(tmp10 - tmp12, FIX_0_382683433); /* c6 */
- z2 = MULTIPLY(tmp10, FIX_0_541196100) + z5; /* c2-c6 */
- z4 = MULTIPLY(tmp12, FIX_1_306562965) + z5; /* c2+c6 */
- z3 = MULTIPLY(tmp11, FIX_0_707106781); /* c4 */
-
- z11 = tmp7 + z3; /* phase 5 */
- z13 = tmp7 - z3;
-
- dataptr[5] = z13 + z2; /* phase 6 */
- dataptr[3] = z13 - z2;
- dataptr[1] = z11 + z4;
- dataptr[7] = z11 - z4;
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns. */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
- tmp7 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
- tmp6 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
- tmp5 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
- tmp4 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
-
- /* Even part */
-
- tmp10 = tmp0 + tmp3; /* phase 2 */
- tmp13 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp1 - tmp2;
-
- dataptr[DCTSIZE*0] = tmp10 + tmp11; /* phase 3 */
- dataptr[DCTSIZE*4] = tmp10 - tmp11;
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_707106781); /* c4 */
- dataptr[DCTSIZE*2] = tmp13 + z1; /* phase 5 */
- dataptr[DCTSIZE*6] = tmp13 - z1;
-
- /* Odd part */
-
- tmp10 = tmp4 + tmp5; /* phase 2 */
- tmp11 = tmp5 + tmp6;
- tmp12 = tmp6 + tmp7;
-
- /* The rotator is modified from fig 4-8 to avoid extra negations. */
- z5 = MULTIPLY(tmp10 - tmp12, FIX_0_382683433); /* c6 */
- z2 = MULTIPLY(tmp10, FIX_0_541196100) + z5; /* c2-c6 */
- z4 = MULTIPLY(tmp12, FIX_1_306562965) + z5; /* c2+c6 */
- z3 = MULTIPLY(tmp11, FIX_0_707106781); /* c4 */
-
- z11 = tmp7 + z3; /* phase 5 */
- z13 = tmp7 - z3;
-
- dataptr[DCTSIZE*5] = z13 + z2; /* phase 6 */
- dataptr[DCTSIZE*3] = z13 - z2;
- dataptr[DCTSIZE*1] = z11 + z4;
- dataptr[DCTSIZE*7] = z11 - z4;
-
- dataptr++; /* advance pointer to next column */
- }
+ DCTELEM tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ DCTELEM tmp10, tmp11, tmp12, tmp13;
+ DCTELEM z1, z2, z3, z4, z5, z11, z13;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+
+ dataptr = data;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Load data into workspace */
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
+ tmp7 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
+ tmp6 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
+ tmp5 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
+ tmp4 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
+
+ /* Even part */
+
+ tmp10 = tmp0 + tmp3; /* phase 2 */
+ tmp13 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp1 - tmp2;
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = tmp10 + tmp11 - 8 * CENTERJSAMPLE; /* phase 3 */
+ dataptr[4] = tmp10 - tmp11;
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_707106781); /* c4 */
+ dataptr[2] = tmp13 + z1; /* phase 5 */
+ dataptr[6] = tmp13 - z1;
+
+ /* Odd part */
+
+ tmp10 = tmp4 + tmp5; /* phase 2 */
+ tmp11 = tmp5 + tmp6;
+ tmp12 = tmp6 + tmp7;
+
+ /* The rotator is modified from fig 4-8 to avoid extra negations. */
+ z5 = MULTIPLY(tmp10 - tmp12, FIX_0_382683433); /* c6 */
+ z2 = MULTIPLY(tmp10, FIX_0_541196100) + z5; /* c2-c6 */
+ z4 = MULTIPLY(tmp12, FIX_1_306562965) + z5; /* c2+c6 */
+ z3 = MULTIPLY(tmp11, FIX_0_707106781); /* c4 */
+
+ z11 = tmp7 + z3; /* phase 5 */
+ z13 = tmp7 - z3;
+
+ dataptr[5] = z13 + z2; /* phase 6 */
+ dataptr[3] = z13 - z2;
+ dataptr[1] = z11 + z4;
+ dataptr[7] = z11 - z4;
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns. */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
+ tmp7 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
+ tmp6 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
+ tmp5 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
+ tmp4 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
+
+ /* Even part */
+
+ tmp10 = tmp0 + tmp3; /* phase 2 */
+ tmp13 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp1 - tmp2;
+
+ dataptr[DCTSIZE*0] = tmp10 + tmp11; /* phase 3 */
+ dataptr[DCTSIZE*4] = tmp10 - tmp11;
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_707106781); /* c4 */
+ dataptr[DCTSIZE*2] = tmp13 + z1; /* phase 5 */
+ dataptr[DCTSIZE*6] = tmp13 - z1;
+
+ /* Odd part */
+
+ tmp10 = tmp4 + tmp5; /* phase 2 */
+ tmp11 = tmp5 + tmp6;
+ tmp12 = tmp6 + tmp7;
+
+ /* The rotator is modified from fig 4-8 to avoid extra negations. */
+ z5 = MULTIPLY(tmp10 - tmp12, FIX_0_382683433); /* c6 */
+ z2 = MULTIPLY(tmp10, FIX_0_541196100) + z5; /* c2-c6 */
+ z4 = MULTIPLY(tmp12, FIX_1_306562965) + z5; /* c2+c6 */
+ z3 = MULTIPLY(tmp11, FIX_0_707106781); /* c4 */
+
+ z11 = tmp7 + z3; /* phase 5 */
+ z13 = tmp7 - z3;
+
+ dataptr[DCTSIZE*5] = z13 + z2; /* phase 6 */
+ dataptr[DCTSIZE*3] = z13 - z2;
+ dataptr[DCTSIZE*1] = z11 + z4;
+ dataptr[DCTSIZE*7] = z11 - z4;
+
+ dataptr++; /* advance pointer to next column */
+ }
}
#endif /* DCT_IFAST_SUPPORTED */
diff --git a/src/lib/libjpeg/jfdctint.c b/src/lib/libjpeg/jfdctint.c
index 1dde58c499d..00ff700bfd0 100644
--- a/src/lib/libjpeg/jfdctint.c
+++ b/src/lib/libjpeg/jfdctint.c
@@ -44,7 +44,7 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
#ifdef DCT_ISLOW_SUPPORTED
@@ -54,7 +54,7 @@
*/
#if DCTSIZE != 8
- Sorry, this code only copes with 8x8 DCT blocks. /* deliberate syntax err */
+ Sorry, this code only copes with 8x8 DCT blocks. /* deliberate syntax err */
#endif
@@ -97,7 +97,7 @@
#define PASS1_BITS 2
#else
#define CONST_BITS 13
-#define PASS1_BITS 1 /* lose a little precision to avoid overflow */
+#define PASS1_BITS 1 /* lose a little precision to avoid overflow */
#endif
/* Some C compilers fail to reduce "FIX(constant)" at compile time, thus
@@ -108,18 +108,18 @@
*/
#if CONST_BITS == 13
-#define FIX_0_298631336 ((INT32) 2446) /* FIX(0.298631336) */
-#define FIX_0_390180644 ((INT32) 3196) /* FIX(0.390180644) */
-#define FIX_0_541196100 ((INT32) 4433) /* FIX(0.541196100) */
-#define FIX_0_765366865 ((INT32) 6270) /* FIX(0.765366865) */
-#define FIX_0_899976223 ((INT32) 7373) /* FIX(0.899976223) */
-#define FIX_1_175875602 ((INT32) 9633) /* FIX(1.175875602) */
-#define FIX_1_501321110 ((INT32) 12299) /* FIX(1.501321110) */
-#define FIX_1_847759065 ((INT32) 15137) /* FIX(1.847759065) */
-#define FIX_1_961570560 ((INT32) 16069) /* FIX(1.961570560) */
-#define FIX_2_053119869 ((INT32) 16819) /* FIX(2.053119869) */
-#define FIX_2_562915447 ((INT32) 20995) /* FIX(2.562915447) */
-#define FIX_3_072711026 ((INT32) 25172) /* FIX(3.072711026) */
+#define FIX_0_298631336 ((INT32) 2446) /* FIX(0.298631336) */
+#define FIX_0_390180644 ((INT32) 3196) /* FIX(0.390180644) */
+#define FIX_0_541196100 ((INT32) 4433) /* FIX(0.541196100) */
+#define FIX_0_765366865 ((INT32) 6270) /* FIX(0.765366865) */
+#define FIX_0_899976223 ((INT32) 7373) /* FIX(0.899976223) */
+#define FIX_1_175875602 ((INT32) 9633) /* FIX(1.175875602) */
+#define FIX_1_501321110 ((INT32) 12299) /* FIX(1.501321110) */
+#define FIX_1_847759065 ((INT32) 15137) /* FIX(1.847759065) */
+#define FIX_1_961570560 ((INT32) 16069) /* FIX(1.961570560) */
+#define FIX_2_053119869 ((INT32) 16819) /* FIX(2.053119869) */
+#define FIX_2_562915447 ((INT32) 20995) /* FIX(2.562915447) */
+#define FIX_3_072711026 ((INT32) 25172) /* FIX(3.072711026) */
#else
#define FIX_0_298631336 FIX(0.298631336)
#define FIX_0_390180644 FIX(0.390180644)
@@ -157,164 +157,164 @@
GLOBAL(void)
jpeg_fdct_islow (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- INT32 tmp10, tmp11, tmp12, tmp13;
- INT32 z1;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
-
- dataptr = data;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part per LL&M figure 1 --- note that published figure is faulty;
- * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
- */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
-
- tmp10 = tmp0 + tmp3;
- tmp12 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp13 = tmp1 - tmp2;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM) ((tmp10 + tmp11 - 8 * CENTERJSAMPLE) << PASS1_BITS);
- dataptr[4] = (DCTELEM) ((tmp10 - tmp11) << PASS1_BITS);
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
- dataptr[2] = (DCTELEM) RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865),
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM) RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065),
- CONST_BITS-PASS1_BITS);
-
- /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
- * cK represents sqrt(2) * cos(K*pi/16).
- * i0..i3 in the paper are tmp0..tmp3 here.
- */
-
- tmp10 = tmp0 + tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp1 + tmp3;
- z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
- tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
- tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
- tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
- tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
- tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
- tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
- tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
-
- tmp12 += z1;
- tmp13 += z1;
-
- dataptr[1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM)
- RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS-PASS1_BITS);
- dataptr[5] = (DCTELEM)
- RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS-PASS1_BITS);
- dataptr[7] = (DCTELEM)
- RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS-PASS1_BITS);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part per LL&M figure 1 --- note that published figure is faulty;
- * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
- */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
-
- /* Add fudge factor here for final descale. */
- tmp10 = tmp0 + tmp3 + (ONE << (PASS1_BITS-1));
- tmp12 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp13 = tmp1 - tmp2;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
-
- dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp10 + tmp11, PASS1_BITS);
- dataptr[DCTSIZE*4] = (DCTELEM) RIGHT_SHIFT(tmp10 - tmp11, PASS1_BITS);
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS+PASS1_BITS-1);
- dataptr[DCTSIZE*2] = (DCTELEM)
- RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865), CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*6] = (DCTELEM)
- RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065), CONST_BITS+PASS1_BITS);
-
- /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
- * cK represents sqrt(2) * cos(K*pi/16).
- * i0..i3 in the paper are tmp0..tmp3 here.
- */
-
- tmp10 = tmp0 + tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp1 + tmp3;
- z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS+PASS1_BITS-1);
-
- tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
- tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
- tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
- tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
- tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
- tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
- tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
- tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
-
- tmp12 += z1;
- tmp13 += z1;
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*5] = (DCTELEM)
- RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*7] = (DCTELEM)
- RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ INT32 tmp10, tmp11, tmp12, tmp13;
+ INT32 z1;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+
+ dataptr = data;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part per LL&M figure 1 --- note that published figure is faulty;
+ * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
+ */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
+
+ tmp10 = tmp0 + tmp3;
+ tmp12 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp13 = tmp1 - tmp2;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM) ((tmp10 + tmp11 - 8 * CENTERJSAMPLE) << PASS1_BITS);
+ dataptr[4] = (DCTELEM) ((tmp10 - tmp11) << PASS1_BITS);
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+ dataptr[2] = (DCTELEM) RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865),
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM) RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065),
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
+ * cK represents sqrt(2) * cos(K*pi/16).
+ * i0..i3 in the paper are tmp0..tmp3 here.
+ */
+
+ tmp10 = tmp0 + tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp1 + tmp3;
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
+ tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
+ tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
+ tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
+ tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
+ tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
+ tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
+ tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
+
+ tmp12 += z1;
+ tmp13 += z1;
+
+ dataptr[1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM)
+ RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS-PASS1_BITS);
+ dataptr[5] = (DCTELEM)
+ RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS-PASS1_BITS);
+ dataptr[7] = (DCTELEM)
+ RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS-PASS1_BITS);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part per LL&M figure 1 --- note that published figure is faulty;
+ * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
+ */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
+
+ /* Add fudge factor here for final descale. */
+ tmp10 = tmp0 + tmp3 + (ONE << (PASS1_BITS-1));
+ tmp12 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp13 = tmp1 - tmp2;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
+
+ dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp10 + tmp11, PASS1_BITS);
+ dataptr[DCTSIZE*4] = (DCTELEM) RIGHT_SHIFT(tmp10 - tmp11, PASS1_BITS);
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS+PASS1_BITS-1);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865), CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065), CONST_BITS+PASS1_BITS);
+
+ /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
+ * cK represents sqrt(2) * cos(K*pi/16).
+ * i0..i3 in the paper are tmp0..tmp3 here.
+ */
+
+ tmp10 = tmp0 + tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp1 + tmp3;
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS+PASS1_BITS-1);
+
+ tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
+ tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
+ tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
+ tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
+ tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
+ tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
+ tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
+ tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
+
+ tmp12 += z1;
+ tmp13 += z1;
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*7] = (DCTELEM)
+ RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
#ifdef DCT_SCALING_SUPPORTED
@@ -327,131 +327,131 @@ jpeg_fdct_islow (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_7x7 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- INT32 tmp10, tmp11, tmp12;
- INT32 z1, z2, z3;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* cK represents sqrt(2) * cos(K*pi/14). */
-
- dataptr = data;
- for (ctr = 0; ctr < 7; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[6]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[5]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[4]);
- tmp3 = GETJSAMPLE(elemptr[3]);
-
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[6]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[5]);
- tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[4]);
-
- z1 = tmp0 + tmp2;
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((z1 + tmp1 + tmp3 - 7 * CENTERJSAMPLE) << PASS1_BITS);
- tmp3 += tmp3;
- z1 -= tmp3;
- z1 -= tmp3;
- z1 = MULTIPLY(z1, FIX(0.353553391)); /* (c2+c6-c4)/2 */
- z2 = MULTIPLY(tmp0 - tmp2, FIX(0.920609002)); /* (c2+c4-c6)/2 */
- z3 = MULTIPLY(tmp1 - tmp2, FIX(0.314692123)); /* c6 */
- dataptr[2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS-PASS1_BITS);
- z1 -= z2;
- z2 = MULTIPLY(tmp0 - tmp1, FIX(0.881747734)); /* c4 */
- dataptr[4] = (DCTELEM)
- DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.707106781)), /* c2+c6-c4 */
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(0.935414347)); /* (c3+c1-c5)/2 */
- tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.170262339)); /* (c3+c5-c1)/2 */
- tmp0 = tmp1 - tmp2;
- tmp1 += tmp2;
- tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.378756276)); /* -c1 */
- tmp1 += tmp2;
- tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.613604268)); /* c5 */
- tmp0 += tmp3;
- tmp2 += tmp3 + MULTIPLY(tmp12, FIX(1.870828693)); /* c3+c1-c5 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS-PASS1_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS-PASS1_BITS);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/7)**2 = 64/49, which we fold
- * into the constant multipliers:
- * cK now represents sqrt(2) * cos(K*pi/14) * 64/49.
- */
-
- dataptr = data;
- for (ctr = 0; ctr < 7; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*6];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*5];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*4];
- tmp3 = dataptr[DCTSIZE*3];
-
- tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*6];
- tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*5];
- tmp12 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*4];
-
- z1 = tmp0 + tmp2;
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(z1 + tmp1 + tmp3, FIX(1.306122449)), /* 64/49 */
- CONST_BITS+PASS1_BITS);
- tmp3 += tmp3;
- z1 -= tmp3;
- z1 -= tmp3;
- z1 = MULTIPLY(z1, FIX(0.461784020)); /* (c2+c6-c4)/2 */
- z2 = MULTIPLY(tmp0 - tmp2, FIX(1.202428084)); /* (c2+c4-c6)/2 */
- z3 = MULTIPLY(tmp1 - tmp2, FIX(0.411026446)); /* c6 */
- dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS+PASS1_BITS);
- z1 -= z2;
- z2 = MULTIPLY(tmp0 - tmp1, FIX(1.151670509)); /* c4 */
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.923568041)), /* c2+c6-c4 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.221765677)); /* (c3+c1-c5)/2 */
- tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.222383464)); /* (c3+c5-c1)/2 */
- tmp0 = tmp1 - tmp2;
- tmp1 += tmp2;
- tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.800824523)); /* -c1 */
- tmp1 += tmp2;
- tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.801442310)); /* c5 */
- tmp0 += tmp3;
- tmp2 += tmp3 + MULTIPLY(tmp12, FIX(2.443531355)); /* c3+c1-c5 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ INT32 tmp10, tmp11, tmp12;
+ INT32 z1, z2, z3;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* cK represents sqrt(2) * cos(K*pi/14). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 7; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[6]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[5]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[4]);
+ tmp3 = GETJSAMPLE(elemptr[3]);
+
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[6]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[5]);
+ tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[4]);
+
+ z1 = tmp0 + tmp2;
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((z1 + tmp1 + tmp3 - 7 * CENTERJSAMPLE) << PASS1_BITS);
+ tmp3 += tmp3;
+ z1 -= tmp3;
+ z1 -= tmp3;
+ z1 = MULTIPLY(z1, FIX(0.353553391)); /* (c2+c6-c4)/2 */
+ z2 = MULTIPLY(tmp0 - tmp2, FIX(0.920609002)); /* (c2+c4-c6)/2 */
+ z3 = MULTIPLY(tmp1 - tmp2, FIX(0.314692123)); /* c6 */
+ dataptr[2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS-PASS1_BITS);
+ z1 -= z2;
+ z2 = MULTIPLY(tmp0 - tmp1, FIX(0.881747734)); /* c4 */
+ dataptr[4] = (DCTELEM)
+ DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.707106781)), /* c2+c6-c4 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(0.935414347)); /* (c3+c1-c5)/2 */
+ tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.170262339)); /* (c3+c5-c1)/2 */
+ tmp0 = tmp1 - tmp2;
+ tmp1 += tmp2;
+ tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.378756276)); /* -c1 */
+ tmp1 += tmp2;
+ tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.613604268)); /* c5 */
+ tmp0 += tmp3;
+ tmp2 += tmp3 + MULTIPLY(tmp12, FIX(1.870828693)); /* c3+c1-c5 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS-PASS1_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS-PASS1_BITS);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/7)**2 = 64/49, which we fold
+ * into the constant multipliers:
+ * cK now represents sqrt(2) * cos(K*pi/14) * 64/49.
+ */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 7; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*6];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*5];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*4];
+ tmp3 = dataptr[DCTSIZE*3];
+
+ tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*6];
+ tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*5];
+ tmp12 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*4];
+
+ z1 = tmp0 + tmp2;
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 + tmp1 + tmp3, FIX(1.306122449)), /* 64/49 */
+ CONST_BITS+PASS1_BITS);
+ tmp3 += tmp3;
+ z1 -= tmp3;
+ z1 -= tmp3;
+ z1 = MULTIPLY(z1, FIX(0.461784020)); /* (c2+c6-c4)/2 */
+ z2 = MULTIPLY(tmp0 - tmp2, FIX(1.202428084)); /* (c2+c4-c6)/2 */
+ z3 = MULTIPLY(tmp1 - tmp2, FIX(0.411026446)); /* c6 */
+ dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS+PASS1_BITS);
+ z1 -= z2;
+ z2 = MULTIPLY(tmp0 - tmp1, FIX(1.151670509)); /* c4 */
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.923568041)), /* c2+c6-c4 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.221765677)); /* (c3+c1-c5)/2 */
+ tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.222383464)); /* (c3+c5-c1)/2 */
+ tmp0 = tmp1 - tmp2;
+ tmp1 += tmp2;
+ tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.800824523)); /* -c1 */
+ tmp1 += tmp2;
+ tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.801442310)); /* c5 */
+ tmp0 += tmp3;
+ tmp2 += tmp3 + MULTIPLY(tmp12, FIX(2.443531355)); /* c3+c1-c5 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -462,109 +462,109 @@ jpeg_fdct_7x7 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_6x6 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2;
- INT32 tmp10, tmp11, tmp12;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* cK represents sqrt(2) * cos(K*pi/12). */
-
- dataptr = data;
- for (ctr = 0; ctr < 6; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[5]);
- tmp11 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[4]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[3]);
-
- tmp10 = tmp0 + tmp2;
- tmp12 = tmp0 - tmp2;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[5]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[4]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[3]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 - 6 * CENTERJSAMPLE) << PASS1_BITS);
- dataptr[2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp12, FIX(1.224744871)), /* c2 */
- CONST_BITS-PASS1_BITS);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(0.707106781)), /* c4 */
- CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = DESCALE(MULTIPLY(tmp0 + tmp2, FIX(0.366025404)), /* c5 */
- CONST_BITS-PASS1_BITS);
-
- dataptr[1] = (DCTELEM) (tmp10 + ((tmp0 + tmp1) << PASS1_BITS));
- dataptr[3] = (DCTELEM) ((tmp0 - tmp1 - tmp2) << PASS1_BITS);
- dataptr[5] = (DCTELEM) (tmp10 + ((tmp2 - tmp1) << PASS1_BITS));
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/6)**2 = 16/9, which we fold
- * into the constant multipliers:
- * cK now represents sqrt(2) * cos(K*pi/12) * 16/9.
- */
-
- dataptr = data;
- for (ctr = 0; ctr < 6; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*5];
- tmp11 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*3];
-
- tmp10 = tmp0 + tmp2;
- tmp12 = tmp0 - tmp2;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*5];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*3];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp12, FIX(2.177324216)), /* c2 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(1.257078722)), /* c4 */
- CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp0 + tmp2, FIX(0.650711829)); /* c5 */
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp1 - tmp2, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp2 - tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2;
+ INT32 tmp10, tmp11, tmp12;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* cK represents sqrt(2) * cos(K*pi/12). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 6; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[5]);
+ tmp11 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[4]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[3]);
+
+ tmp10 = tmp0 + tmp2;
+ tmp12 = tmp0 - tmp2;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[5]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[4]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[3]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 - 6 * CENTERJSAMPLE) << PASS1_BITS);
+ dataptr[2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp12, FIX(1.224744871)), /* c2 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(0.707106781)), /* c4 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = DESCALE(MULTIPLY(tmp0 + tmp2, FIX(0.366025404)), /* c5 */
+ CONST_BITS-PASS1_BITS);
+
+ dataptr[1] = (DCTELEM) (tmp10 + ((tmp0 + tmp1) << PASS1_BITS));
+ dataptr[3] = (DCTELEM) ((tmp0 - tmp1 - tmp2) << PASS1_BITS);
+ dataptr[5] = (DCTELEM) (tmp10 + ((tmp2 - tmp1) << PASS1_BITS));
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/6)**2 = 16/9, which we fold
+ * into the constant multipliers:
+ * cK now represents sqrt(2) * cos(K*pi/12) * 16/9.
+ */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 6; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*5];
+ tmp11 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*3];
+
+ tmp10 = tmp0 + tmp2;
+ tmp12 = tmp0 - tmp2;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*5];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*3];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp12, FIX(2.177324216)), /* c2 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(1.257078722)), /* c4 */
+ CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp0 + tmp2, FIX(0.650711829)); /* c5 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp1 - tmp2, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp2 - tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -575,106 +575,106 @@ jpeg_fdct_6x6 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_5x5 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2;
- INT32 tmp10, tmp11;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We scale the results further by 2 as part of output adaption */
- /* scaling for different DCT size. */
- /* cK represents sqrt(2) * cos(K*pi/10). */
-
- dataptr = data;
- for (ctr = 0; ctr < 5; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[4]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[3]);
- tmp2 = GETJSAMPLE(elemptr[2]);
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[4]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[3]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp2 - 5 * CENTERJSAMPLE) << (PASS1_BITS+1));
- tmp11 = MULTIPLY(tmp11, FIX(0.790569415)); /* (c2+c4)/2 */
- tmp10 -= tmp2 << 2;
- tmp10 = MULTIPLY(tmp10, FIX(0.353553391)); /* (c2-c4)/2 */
- dataptr[2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS-PASS1_BITS-1);
- dataptr[4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS-PASS1_BITS-1);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp0 + tmp1, FIX(0.831253876)); /* c3 */
-
- dataptr[1] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.513743148)), /* c1-c3 */
- CONST_BITS-PASS1_BITS-1);
- dataptr[3] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.176250899)), /* c1+c3 */
- CONST_BITS-PASS1_BITS-1);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/5)**2 = 64/25, which we partially
- * fold into the constant multipliers (other part was done in pass 1):
- * cK now represents sqrt(2) * cos(K*pi/10) * 32/25.
- */
-
- dataptr = data;
- for (ctr = 0; ctr < 5; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*4];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*3];
- tmp2 = dataptr[DCTSIZE*2];
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*4];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*3];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp2, FIX(1.28)), /* 32/25 */
- CONST_BITS+PASS1_BITS);
- tmp11 = MULTIPLY(tmp11, FIX(1.011928851)); /* (c2+c4)/2 */
- tmp10 -= tmp2 << 2;
- tmp10 = MULTIPLY(tmp10, FIX(0.452548340)); /* (c2-c4)/2 */
- dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp0 + tmp1, FIX(1.064004961)); /* c3 */
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.657591230)), /* c1-c3 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.785601151)), /* c1+c3 */
- CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2;
+ INT32 tmp10, tmp11;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We scale the results further by 2 as part of output adaption */
+ /* scaling for different DCT size. */
+ /* cK represents sqrt(2) * cos(K*pi/10). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 5; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[4]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[3]);
+ tmp2 = GETJSAMPLE(elemptr[2]);
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[4]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[3]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp2 - 5 * CENTERJSAMPLE) << (PASS1_BITS+1));
+ tmp11 = MULTIPLY(tmp11, FIX(0.790569415)); /* (c2+c4)/2 */
+ tmp10 -= tmp2 << 2;
+ tmp10 = MULTIPLY(tmp10, FIX(0.353553391)); /* (c2-c4)/2 */
+ dataptr[2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS-PASS1_BITS-1);
+ dataptr[4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS-PASS1_BITS-1);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp0 + tmp1, FIX(0.831253876)); /* c3 */
+
+ dataptr[1] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.513743148)), /* c1-c3 */
+ CONST_BITS-PASS1_BITS-1);
+ dataptr[3] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.176250899)), /* c1+c3 */
+ CONST_BITS-PASS1_BITS-1);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/5)**2 = 64/25, which we partially
+ * fold into the constant multipliers (other part was done in pass 1):
+ * cK now represents sqrt(2) * cos(K*pi/10) * 32/25.
+ */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 5; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*4];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*3];
+ tmp2 = dataptr[DCTSIZE*2];
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*4];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*3];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp2, FIX(1.28)), /* 32/25 */
+ CONST_BITS+PASS1_BITS);
+ tmp11 = MULTIPLY(tmp11, FIX(1.011928851)); /* (c2+c4)/2 */
+ tmp10 -= tmp2 << 2;
+ tmp10 = MULTIPLY(tmp10, FIX(0.452548340)); /* (c2-c4)/2 */
+ dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp0 + tmp1, FIX(1.064004961)); /* c3 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.657591230)), /* c1-c3 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.785601151)), /* c1+c3 */
+ CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -685,89 +685,89 @@ jpeg_fdct_5x5 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_4x4 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1;
- INT32 tmp10, tmp11;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
+ INT32 tmp0, tmp1;
+ INT32 tmp10, tmp11;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We must also scale the output by (8/4)**2 = 2**2, which we add here. */
- /* cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point FDCT]. */
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We must also scale the output by (8/4)**2 = 2**2, which we add here. */
+ /* cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point FDCT]. */
- dataptr = data;
- for (ctr = 0; ctr < 4; ctr++) {
- elemptr = sample_data[ctr] + start_col;
+ dataptr = data;
+ for (ctr = 0; ctr < 4; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
- /* Even part */
+ /* Even part */
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[3]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[2]);
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[3]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[2]);
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[3]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[2]);
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[3]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[2]);
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp0 + tmp1 - 4 * CENTERJSAMPLE) << (PASS1_BITS+2));
- dataptr[2] = (DCTELEM) ((tmp0 - tmp1) << (PASS1_BITS+2));
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp0 + tmp1 - 4 * CENTERJSAMPLE) << (PASS1_BITS+2));
+ dataptr[2] = (DCTELEM) ((tmp0 - tmp1) << (PASS1_BITS+2));
- /* Odd part */
+ /* Odd part */
- tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-3);
+ tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-3);
- dataptr[1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
- CONST_BITS-PASS1_BITS-2);
- dataptr[3] = (DCTELEM)
- RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
- CONST_BITS-PASS1_BITS-2);
+ dataptr[1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS-PASS1_BITS-2);
+ dataptr[3] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS-PASS1_BITS-2);
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- */
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ */
- dataptr = data;
- for (ctr = 0; ctr < 4; ctr++) {
- /* Even part */
+ dataptr = data;
+ for (ctr = 0; ctr < 4; ctr++) {
+ /* Even part */
- /* Add fudge factor here for final descale. */
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*3] + (ONE << (PASS1_BITS-1));
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*2];
+ /* Add fudge factor here for final descale. */
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*3] + (ONE << (PASS1_BITS-1));
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*2];
- tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*3];
- tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*2];
+ tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*3];
+ tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*2];
- dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp0 + tmp1, PASS1_BITS);
- dataptr[DCTSIZE*2] = (DCTELEM) RIGHT_SHIFT(tmp0 - tmp1, PASS1_BITS);
+ dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp0 + tmp1, PASS1_BITS);
+ dataptr[DCTSIZE*2] = (DCTELEM) RIGHT_SHIFT(tmp0 - tmp1, PASS1_BITS);
- /* Odd part */
+ /* Odd part */
- tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS+PASS1_BITS-1);
+ tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS+PASS1_BITS-1);
- dataptr[DCTSIZE*1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
- CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS+PASS1_BITS);
- dataptr++; /* advance pointer to next column */
- }
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -778,81 +778,81 @@ jpeg_fdct_4x4 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_3x3 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
+ INT32 tmp0, tmp1, tmp2;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We scale the results further by 2**2 as part of output adaption */
- /* scaling for different DCT size. */
- /* cK represents sqrt(2) * cos(K*pi/6). */
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We scale the results further by 2**2 as part of output adaption */
+ /* scaling for different DCT size. */
+ /* cK represents sqrt(2) * cos(K*pi/6). */
- dataptr = data;
- for (ctr = 0; ctr < 3; ctr++) {
- elemptr = sample_data[ctr] + start_col;
+ dataptr = data;
+ for (ctr = 0; ctr < 3; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
- /* Even part */
+ /* Even part */
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[2]);
- tmp1 = GETJSAMPLE(elemptr[1]);
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[2]);
+ tmp1 = GETJSAMPLE(elemptr[1]);
- tmp2 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[2]);
+ tmp2 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[2]);
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp0 + tmp1 - 3 * CENTERJSAMPLE) << (PASS1_BITS+2));
- dataptr[2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(0.707106781)), /* c2 */
- CONST_BITS-PASS1_BITS-2);
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp0 + tmp1 - 3 * CENTERJSAMPLE) << (PASS1_BITS+2));
+ dataptr[2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(0.707106781)), /* c2 */
+ CONST_BITS-PASS1_BITS-2);
- /* Odd part */
+ /* Odd part */
- dataptr[1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp2, FIX(1.224744871)), /* c1 */
- CONST_BITS-PASS1_BITS-2);
+ dataptr[1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp2, FIX(1.224744871)), /* c1 */
+ CONST_BITS-PASS1_BITS-2);
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/3)**2 = 64/9, which we partially
- * fold into the constant multipliers (other part was done in pass 1):
- * cK now represents sqrt(2) * cos(K*pi/6) * 16/9.
- */
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/3)**2 = 64/9, which we partially
+ * fold into the constant multipliers (other part was done in pass 1):
+ * cK now represents sqrt(2) * cos(K*pi/6) * 16/9.
+ */
- dataptr = data;
- for (ctr = 0; ctr < 3; ctr++) {
- /* Even part */
+ dataptr = data;
+ for (ctr = 0; ctr < 3; ctr++) {
+ /* Even part */
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*2];
- tmp1 = dataptr[DCTSIZE*1];
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*2];
+ tmp1 = dataptr[DCTSIZE*1];
- tmp2 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*2];
+ tmp2 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*2];
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(1.257078722)), /* c2 */
- CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(1.257078722)), /* c2 */
+ CONST_BITS+PASS1_BITS);
- /* Odd part */
+ /* Odd part */
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp2, FIX(2.177324216)), /* c1 */
- CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp2, FIX(2.177324216)), /* c1 */
+ CONST_BITS+PASS1_BITS);
- dataptr++; /* advance pointer to next column */
- }
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -863,40 +863,40 @@ jpeg_fdct_3x3 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_2x2 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- JSAMPROW elemptr;
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ JSAMPROW elemptr;
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT. */
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT. */
- /* Row 0 */
- elemptr = sample_data[0] + start_col;
+ /* Row 0 */
+ elemptr = sample_data[0] + start_col;
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[1]);
- tmp1 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[1]);
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[1]);
+ tmp1 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[1]);
- /* Row 1 */
- elemptr = sample_data[1] + start_col;
+ /* Row 1 */
+ elemptr = sample_data[1] + start_col;
- tmp2 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[1]);
- tmp3 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[1]);
+ tmp2 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[1]);
+ tmp3 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[1]);
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/2)**2 = 2**4.
- */
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/2)**2 = 2**4.
+ */
- /* Column 0 */
- /* Apply unsigned->signed conversion */
- data[DCTSIZE*0] = (DCTELEM) ((tmp0 + tmp2 - 4 * CENTERJSAMPLE) << 4);
- data[DCTSIZE*1] = (DCTELEM) ((tmp0 - tmp2) << 4);
+ /* Column 0 */
+ /* Apply unsigned->signed conversion */
+ data[DCTSIZE*0] = (DCTELEM) ((tmp0 + tmp2 - 4 * CENTERJSAMPLE) << 4);
+ data[DCTSIZE*1] = (DCTELEM) ((tmp0 - tmp2) << 4);
- /* Column 1 */
- data[DCTSIZE*0+1] = (DCTELEM) ((tmp1 + tmp3) << 4);
- data[DCTSIZE*1+1] = (DCTELEM) ((tmp1 - tmp3) << 4);
+ /* Column 1 */
+ data[DCTSIZE*0+1] = (DCTELEM) ((tmp1 + tmp3) << 4);
+ data[DCTSIZE*1+1] = (DCTELEM) ((tmp1 - tmp3) << 4);
}
@@ -907,14 +907,14 @@ jpeg_fdct_2x2 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_1x1 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* We leave the result scaled up by an overall factor of 8. */
- /* We must also scale the output by (8/1)**2 = 2**6. */
- /* Apply unsigned->signed conversion */
- data[0] = (DCTELEM)
- ((GETJSAMPLE(sample_data[0][start_col]) - CENTERJSAMPLE) << 6);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* We leave the result scaled up by an overall factor of 8. */
+ /* We must also scale the output by (8/1)**2 = 2**6. */
+ /* Apply unsigned->signed conversion */
+ data[0] = (DCTELEM)
+ ((GETJSAMPLE(sample_data[0][start_col]) - CENTERJSAMPLE) << 6);
}
@@ -925,146 +925,146 @@ jpeg_fdct_1x1 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_9x9 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
- INT32 tmp10, tmp11, tmp12, tmp13;
- INT32 z1, z2;
- DCTELEM workspace[8];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* we scale the results further by 2 as part of output adaption */
- /* scaling for different DCT size. */
- /* cK represents sqrt(2) * cos(K*pi/18). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[8]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[7]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[6]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[5]);
- tmp4 = GETJSAMPLE(elemptr[4]);
-
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[8]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[7]);
- tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[6]);
- tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[5]);
-
- z1 = tmp0 + tmp2 + tmp3;
- z2 = tmp1 + tmp4;
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM) ((z1 + z2 - 9 * CENTERJSAMPLE) << 1);
- dataptr[6] = (DCTELEM)
- DESCALE(MULTIPLY(z1 - z2 - z2, FIX(0.707106781)), /* c6 */
- CONST_BITS-1);
- z1 = MULTIPLY(tmp0 - tmp2, FIX(1.328926049)); /* c2 */
- z2 = MULTIPLY(tmp1 - tmp4 - tmp4, FIX(0.707106781)); /* c6 */
- dataptr[2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp2 - tmp3, FIX(1.083350441)) /* c4 */
- + z1 + z2, CONST_BITS-1);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp3 - tmp0, FIX(0.245575608)) /* c8 */
- + z1 - z2, CONST_BITS-1);
-
- /* Odd part */
-
- dataptr[3] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12 - tmp13, FIX(1.224744871)), /* c3 */
- CONST_BITS-1);
-
- tmp11 = MULTIPLY(tmp11, FIX(1.224744871)); /* c3 */
- tmp0 = MULTIPLY(tmp10 + tmp12, FIX(0.909038955)); /* c5 */
- tmp1 = MULTIPLY(tmp10 + tmp13, FIX(0.483689525)); /* c7 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp11 + tmp0 + tmp1, CONST_BITS-1);
-
- tmp2 = MULTIPLY(tmp12 - tmp13, FIX(1.392728481)); /* c1 */
-
- dataptr[5] = (DCTELEM) DESCALE(tmp0 - tmp11 - tmp2, CONST_BITS-1);
- dataptr[7] = (DCTELEM) DESCALE(tmp1 - tmp11 + tmp2, CONST_BITS-1);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 9)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/9)**2 = 64/81, which we partially
- * fold into the constant multipliers and final/initial shifting:
- * cK now represents sqrt(2) * cos(K*pi/18) * 128/81.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*0];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*7];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*6];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*5];
- tmp4 = dataptr[DCTSIZE*4];
-
- tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*0];
- tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*7];
- tmp12 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*6];
- tmp13 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*5];
-
- z1 = tmp0 + tmp2 + tmp3;
- z2 = tmp1 + tmp4;
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(z1 + z2, FIX(1.580246914)), /* 128/81 */
- CONST_BITS+2);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(MULTIPLY(z1 - z2 - z2, FIX(1.117403309)), /* c6 */
- CONST_BITS+2);
- z1 = MULTIPLY(tmp0 - tmp2, FIX(2.100031287)); /* c2 */
- z2 = MULTIPLY(tmp1 - tmp4 - tmp4, FIX(1.117403309)); /* c6 */
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp2 - tmp3, FIX(1.711961190)) /* c4 */
- + z1 + z2, CONST_BITS+2);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp3 - tmp0, FIX(0.388070096)) /* c8 */
- + z1 - z2, CONST_BITS+2);
-
- /* Odd part */
-
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12 - tmp13, FIX(1.935399303)), /* c3 */
- CONST_BITS+2);
-
- tmp11 = MULTIPLY(tmp11, FIX(1.935399303)); /* c3 */
- tmp0 = MULTIPLY(tmp10 + tmp12, FIX(1.436506004)); /* c5 */
- tmp1 = MULTIPLY(tmp10 + tmp13, FIX(0.764348879)); /* c7 */
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp11 + tmp0 + tmp1, CONST_BITS+2);
-
- tmp2 = MULTIPLY(tmp12 - tmp13, FIX(2.200854883)); /* c1 */
-
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(tmp0 - tmp11 - tmp2, CONST_BITS+2);
- dataptr[DCTSIZE*7] = (DCTELEM)
- DESCALE(tmp1 - tmp11 + tmp2, CONST_BITS+2);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
+ INT32 tmp10, tmp11, tmp12, tmp13;
+ INT32 z1, z2;
+ DCTELEM workspace[8];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* we scale the results further by 2 as part of output adaption */
+ /* scaling for different DCT size. */
+ /* cK represents sqrt(2) * cos(K*pi/18). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[8]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[7]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[6]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[5]);
+ tmp4 = GETJSAMPLE(elemptr[4]);
+
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[8]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[7]);
+ tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[6]);
+ tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[5]);
+
+ z1 = tmp0 + tmp2 + tmp3;
+ z2 = tmp1 + tmp4;
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM) ((z1 + z2 - 9 * CENTERJSAMPLE) << 1);
+ dataptr[6] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 - z2 - z2, FIX(0.707106781)), /* c6 */
+ CONST_BITS-1);
+ z1 = MULTIPLY(tmp0 - tmp2, FIX(1.328926049)); /* c2 */
+ z2 = MULTIPLY(tmp1 - tmp4 - tmp4, FIX(0.707106781)); /* c6 */
+ dataptr[2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp2 - tmp3, FIX(1.083350441)) /* c4 */
+ + z1 + z2, CONST_BITS-1);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp3 - tmp0, FIX(0.245575608)) /* c8 */
+ + z1 - z2, CONST_BITS-1);
+
+ /* Odd part */
+
+ dataptr[3] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12 - tmp13, FIX(1.224744871)), /* c3 */
+ CONST_BITS-1);
+
+ tmp11 = MULTIPLY(tmp11, FIX(1.224744871)); /* c3 */
+ tmp0 = MULTIPLY(tmp10 + tmp12, FIX(0.909038955)); /* c5 */
+ tmp1 = MULTIPLY(tmp10 + tmp13, FIX(0.483689525)); /* c7 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp11 + tmp0 + tmp1, CONST_BITS-1);
+
+ tmp2 = MULTIPLY(tmp12 - tmp13, FIX(1.392728481)); /* c1 */
+
+ dataptr[5] = (DCTELEM) DESCALE(tmp0 - tmp11 - tmp2, CONST_BITS-1);
+ dataptr[7] = (DCTELEM) DESCALE(tmp1 - tmp11 + tmp2, CONST_BITS-1);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 9)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/9)**2 = 64/81, which we partially
+ * fold into the constant multipliers and final/initial shifting:
+ * cK now represents sqrt(2) * cos(K*pi/18) * 128/81.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*0];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*7];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*6];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*5];
+ tmp4 = dataptr[DCTSIZE*4];
+
+ tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*0];
+ tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*7];
+ tmp12 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*6];
+ tmp13 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*5];
+
+ z1 = tmp0 + tmp2 + tmp3;
+ z2 = tmp1 + tmp4;
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 + z2, FIX(1.580246914)), /* 128/81 */
+ CONST_BITS+2);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 - z2 - z2, FIX(1.117403309)), /* c6 */
+ CONST_BITS+2);
+ z1 = MULTIPLY(tmp0 - tmp2, FIX(2.100031287)); /* c2 */
+ z2 = MULTIPLY(tmp1 - tmp4 - tmp4, FIX(1.117403309)); /* c6 */
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp2 - tmp3, FIX(1.711961190)) /* c4 */
+ + z1 + z2, CONST_BITS+2);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp3 - tmp0, FIX(0.388070096)) /* c8 */
+ + z1 - z2, CONST_BITS+2);
+
+ /* Odd part */
+
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12 - tmp13, FIX(1.935399303)), /* c3 */
+ CONST_BITS+2);
+
+ tmp11 = MULTIPLY(tmp11, FIX(1.935399303)); /* c3 */
+ tmp0 = MULTIPLY(tmp10 + tmp12, FIX(1.436506004)); /* c5 */
+ tmp1 = MULTIPLY(tmp10 + tmp13, FIX(0.764348879)); /* c7 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp11 + tmp0 + tmp1, CONST_BITS+2);
+
+ tmp2 = MULTIPLY(tmp12 - tmp13, FIX(2.200854883)); /* c1 */
+
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(tmp0 - tmp11 - tmp2, CONST_BITS+2);
+ dataptr[DCTSIZE*7] = (DCTELEM)
+ DESCALE(tmp1 - tmp11 + tmp2, CONST_BITS+2);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -1075,159 +1075,159 @@ jpeg_fdct_9x9 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_10x10 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- DCTELEM workspace[8*2];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* we scale the results further by 2 as part of output adaption */
- /* scaling for different DCT size. */
- /* cK represents sqrt(2) * cos(K*pi/20). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[9]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[8]);
- tmp12 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[7]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[6]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[5]);
-
- tmp10 = tmp0 + tmp4;
- tmp13 = tmp0 - tmp4;
- tmp11 = tmp1 + tmp3;
- tmp14 = tmp1 - tmp3;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[9]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[8]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[7]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[6]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[5]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 + tmp12 - 10 * CENTERJSAMPLE) << 1);
- tmp12 += tmp12;
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.144122806)) - /* c4 */
- MULTIPLY(tmp11 - tmp12, FIX(0.437016024)), /* c8 */
- CONST_BITS-1);
- tmp10 = MULTIPLY(tmp13 + tmp14, FIX(0.831253876)); /* c6 */
- dataptr[2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.513743148)), /* c2-c6 */
- CONST_BITS-1);
- dataptr[6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.176250899)), /* c2+c6 */
- CONST_BITS-1);
-
- /* Odd part */
-
- tmp10 = tmp0 + tmp4;
- tmp11 = tmp1 - tmp3;
- dataptr[5] = (DCTELEM) ((tmp10 - tmp11 - tmp2) << 1);
- tmp2 <<= CONST_BITS;
- dataptr[1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0, FIX(1.396802247)) + /* c1 */
- MULTIPLY(tmp1, FIX(1.260073511)) + tmp2 + /* c3 */
- MULTIPLY(tmp3, FIX(0.642039522)) + /* c7 */
- MULTIPLY(tmp4, FIX(0.221231742)), /* c9 */
- CONST_BITS-1);
- tmp12 = MULTIPLY(tmp0 - tmp4, FIX(0.951056516)) - /* (c3+c7)/2 */
- MULTIPLY(tmp1 + tmp3, FIX(0.587785252)); /* (c1-c9)/2 */
- tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.309016994)) + /* (c3-c7)/2 */
- (tmp11 << (CONST_BITS - 1)) - tmp2;
- dataptr[3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS-1);
- dataptr[7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS-1);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 10)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/10)**2 = 16/25, which we partially
- * fold into the constant multipliers and final/initial shifting:
- * cK now represents sqrt(2) * cos(K*pi/20) * 32/25.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*1];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*0];
- tmp12 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*7];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*6];
- tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*5];
-
- tmp10 = tmp0 + tmp4;
- tmp13 = tmp0 - tmp4;
- tmp11 = tmp1 + tmp3;
- tmp14 = tmp1 - tmp3;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*1];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*0];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*7];
- tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*6];
- tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*5];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(1.28)), /* 32/25 */
- CONST_BITS+2);
- tmp12 += tmp12;
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.464477191)) - /* c4 */
- MULTIPLY(tmp11 - tmp12, FIX(0.559380511)), /* c8 */
- CONST_BITS+2);
- tmp10 = MULTIPLY(tmp13 + tmp14, FIX(1.064004961)); /* c6 */
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.657591230)), /* c2-c6 */
- CONST_BITS+2);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.785601151)), /* c2+c6 */
- CONST_BITS+2);
-
- /* Odd part */
-
- tmp10 = tmp0 + tmp4;
- tmp11 = tmp1 - tmp3;
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp2, FIX(1.28)), /* 32/25 */
- CONST_BITS+2);
- tmp2 = MULTIPLY(tmp2, FIX(1.28)); /* 32/25 */
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0, FIX(1.787906876)) + /* c1 */
- MULTIPLY(tmp1, FIX(1.612894094)) + tmp2 + /* c3 */
- MULTIPLY(tmp3, FIX(0.821810588)) + /* c7 */
- MULTIPLY(tmp4, FIX(0.283176630)), /* c9 */
- CONST_BITS+2);
- tmp12 = MULTIPLY(tmp0 - tmp4, FIX(1.217352341)) - /* (c3+c7)/2 */
- MULTIPLY(tmp1 + tmp3, FIX(0.752365123)); /* (c1-c9)/2 */
- tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.395541753)) + /* (c3-c7)/2 */
- MULTIPLY(tmp11, FIX(0.64)) - tmp2; /* 16/25 */
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS+2);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS+2);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ DCTELEM workspace[8*2];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* we scale the results further by 2 as part of output adaption */
+ /* scaling for different DCT size. */
+ /* cK represents sqrt(2) * cos(K*pi/20). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[9]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[8]);
+ tmp12 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[7]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[6]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[5]);
+
+ tmp10 = tmp0 + tmp4;
+ tmp13 = tmp0 - tmp4;
+ tmp11 = tmp1 + tmp3;
+ tmp14 = tmp1 - tmp3;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[9]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[8]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[7]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[6]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[5]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 + tmp12 - 10 * CENTERJSAMPLE) << 1);
+ tmp12 += tmp12;
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.144122806)) - /* c4 */
+ MULTIPLY(tmp11 - tmp12, FIX(0.437016024)), /* c8 */
+ CONST_BITS-1);
+ tmp10 = MULTIPLY(tmp13 + tmp14, FIX(0.831253876)); /* c6 */
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.513743148)), /* c2-c6 */
+ CONST_BITS-1);
+ dataptr[6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.176250899)), /* c2+c6 */
+ CONST_BITS-1);
+
+ /* Odd part */
+
+ tmp10 = tmp0 + tmp4;
+ tmp11 = tmp1 - tmp3;
+ dataptr[5] = (DCTELEM) ((tmp10 - tmp11 - tmp2) << 1);
+ tmp2 <<= CONST_BITS;
+ dataptr[1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0, FIX(1.396802247)) + /* c1 */
+ MULTIPLY(tmp1, FIX(1.260073511)) + tmp2 + /* c3 */
+ MULTIPLY(tmp3, FIX(0.642039522)) + /* c7 */
+ MULTIPLY(tmp4, FIX(0.221231742)), /* c9 */
+ CONST_BITS-1);
+ tmp12 = MULTIPLY(tmp0 - tmp4, FIX(0.951056516)) - /* (c3+c7)/2 */
+ MULTIPLY(tmp1 + tmp3, FIX(0.587785252)); /* (c1-c9)/2 */
+ tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.309016994)) + /* (c3-c7)/2 */
+ (tmp11 << (CONST_BITS - 1)) - tmp2;
+ dataptr[3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS-1);
+ dataptr[7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS-1);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 10)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/10)**2 = 16/25, which we partially
+ * fold into the constant multipliers and final/initial shifting:
+ * cK now represents sqrt(2) * cos(K*pi/20) * 32/25.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*1];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*0];
+ tmp12 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*7];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*6];
+ tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*5];
+
+ tmp10 = tmp0 + tmp4;
+ tmp13 = tmp0 - tmp4;
+ tmp11 = tmp1 + tmp3;
+ tmp14 = tmp1 - tmp3;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*1];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*0];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*7];
+ tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*6];
+ tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*5];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(1.28)), /* 32/25 */
+ CONST_BITS+2);
+ tmp12 += tmp12;
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.464477191)) - /* c4 */
+ MULTIPLY(tmp11 - tmp12, FIX(0.559380511)), /* c8 */
+ CONST_BITS+2);
+ tmp10 = MULTIPLY(tmp13 + tmp14, FIX(1.064004961)); /* c6 */
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.657591230)), /* c2-c6 */
+ CONST_BITS+2);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.785601151)), /* c2+c6 */
+ CONST_BITS+2);
+
+ /* Odd part */
+
+ tmp10 = tmp0 + tmp4;
+ tmp11 = tmp1 - tmp3;
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp2, FIX(1.28)), /* 32/25 */
+ CONST_BITS+2);
+ tmp2 = MULTIPLY(tmp2, FIX(1.28)); /* 32/25 */
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0, FIX(1.787906876)) + /* c1 */
+ MULTIPLY(tmp1, FIX(1.612894094)) + tmp2 + /* c3 */
+ MULTIPLY(tmp3, FIX(0.821810588)) + /* c7 */
+ MULTIPLY(tmp4, FIX(0.283176630)), /* c9 */
+ CONST_BITS+2);
+ tmp12 = MULTIPLY(tmp0 - tmp4, FIX(1.217352341)) - /* (c3+c7)/2 */
+ MULTIPLY(tmp1 + tmp3, FIX(0.752365123)); /* (c1-c9)/2 */
+ tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.395541753)) + /* (c3-c7)/2 */
+ MULTIPLY(tmp11, FIX(0.64)) - tmp2; /* 16/25 */
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS+2);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS+2);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -1238,179 +1238,179 @@ jpeg_fdct_10x10 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_11x11 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- INT32 z1, z2, z3;
- DCTELEM workspace[8*3];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* we scale the results further by 2 as part of output adaption */
- /* scaling for different DCT size. */
- /* cK represents sqrt(2) * cos(K*pi/22). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[10]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[9]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[8]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[7]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[6]);
- tmp5 = GETJSAMPLE(elemptr[5]);
-
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[10]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[9]);
- tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[8]);
- tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[7]);
- tmp14 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[6]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5 - 11 * CENTERJSAMPLE) << 1);
- tmp5 += tmp5;
- tmp0 -= tmp5;
- tmp1 -= tmp5;
- tmp2 -= tmp5;
- tmp3 -= tmp5;
- tmp4 -= tmp5;
- z1 = MULTIPLY(tmp0 + tmp3, FIX(1.356927976)) + /* c2 */
- MULTIPLY(tmp2 + tmp4, FIX(0.201263574)); /* c10 */
- z2 = MULTIPLY(tmp1 - tmp3, FIX(0.926112931)); /* c6 */
- z3 = MULTIPLY(tmp0 - tmp1, FIX(1.189712156)); /* c4 */
- dataptr[2] = (DCTELEM)
- DESCALE(z1 + z2 - MULTIPLY(tmp3, FIX(1.018300590)) /* c2+c8-c6 */
- - MULTIPLY(tmp4, FIX(1.390975730)), /* c4+c10 */
- CONST_BITS-1);
- dataptr[4] = (DCTELEM)
- DESCALE(z2 + z3 + MULTIPLY(tmp1, FIX(0.062335650)) /* c4-c6-c10 */
- - MULTIPLY(tmp2, FIX(1.356927976)) /* c2 */
- + MULTIPLY(tmp4, FIX(0.587485545)), /* c8 */
- CONST_BITS-1);
- dataptr[6] = (DCTELEM)
- DESCALE(z1 + z3 - MULTIPLY(tmp0, FIX(1.620527200)) /* c2+c4-c6 */
- - MULTIPLY(tmp2, FIX(0.788749120)), /* c8+c10 */
- CONST_BITS-1);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.286413905)); /* c3 */
- tmp2 = MULTIPLY(tmp10 + tmp12, FIX(1.068791298)); /* c5 */
- tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.764581576)); /* c7 */
- tmp0 = tmp1 + tmp2 + tmp3 - MULTIPLY(tmp10, FIX(1.719967871)) /* c7+c5+c3-c1 */
- + MULTIPLY(tmp14, FIX(0.398430003)); /* c9 */
- tmp4 = MULTIPLY(tmp11 + tmp12, - FIX(0.764581576)); /* -c7 */
- tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(1.399818907)); /* -c1 */
- tmp1 += tmp4 + tmp5 + MULTIPLY(tmp11, FIX(1.276416582)) /* c9+c7+c1-c3 */
- - MULTIPLY(tmp14, FIX(1.068791298)); /* c5 */
- tmp10 = MULTIPLY(tmp12 + tmp13, FIX(0.398430003)); /* c9 */
- tmp2 += tmp4 + tmp10 - MULTIPLY(tmp12, FIX(1.989053629)) /* c9+c5+c3-c7 */
- + MULTIPLY(tmp14, FIX(1.399818907)); /* c1 */
- tmp3 += tmp5 + tmp10 + MULTIPLY(tmp13, FIX(1.305598626)) /* c1+c5-c9-c7 */
- - MULTIPLY(tmp14, FIX(1.286413905)); /* c3 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS-1);
- dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS-1);
- dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS-1);
- dataptr[7] = (DCTELEM) DESCALE(tmp3, CONST_BITS-1);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 11)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/11)**2 = 64/121, which we partially
- * fold into the constant multipliers and final/initial shifting:
- * cK now represents sqrt(2) * cos(K*pi/22) * 128/121.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*2];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*1];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*0];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*7];
- tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*6];
- tmp5 = dataptr[DCTSIZE*5];
-
- tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*2];
- tmp11 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*1];
- tmp12 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*0];
- tmp13 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*7];
- tmp14 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*6];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5,
- FIX(1.057851240)), /* 128/121 */
- CONST_BITS+2);
- tmp5 += tmp5;
- tmp0 -= tmp5;
- tmp1 -= tmp5;
- tmp2 -= tmp5;
- tmp3 -= tmp5;
- tmp4 -= tmp5;
- z1 = MULTIPLY(tmp0 + tmp3, FIX(1.435427942)) + /* c2 */
- MULTIPLY(tmp2 + tmp4, FIX(0.212906922)); /* c10 */
- z2 = MULTIPLY(tmp1 - tmp3, FIX(0.979689713)); /* c6 */
- z3 = MULTIPLY(tmp0 - tmp1, FIX(1.258538479)); /* c4 */
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(z1 + z2 - MULTIPLY(tmp3, FIX(1.077210542)) /* c2+c8-c6 */
- - MULTIPLY(tmp4, FIX(1.471445400)), /* c4+c10 */
- CONST_BITS+2);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(z2 + z3 + MULTIPLY(tmp1, FIX(0.065941844)) /* c4-c6-c10 */
- - MULTIPLY(tmp2, FIX(1.435427942)) /* c2 */
- + MULTIPLY(tmp4, FIX(0.621472312)), /* c8 */
- CONST_BITS+2);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(z1 + z3 - MULTIPLY(tmp0, FIX(1.714276708)) /* c2+c4-c6 */
- - MULTIPLY(tmp2, FIX(0.834379234)), /* c8+c10 */
- CONST_BITS+2);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.360834544)); /* c3 */
- tmp2 = MULTIPLY(tmp10 + tmp12, FIX(1.130622199)); /* c5 */
- tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.808813568)); /* c7 */
- tmp0 = tmp1 + tmp2 + tmp3 - MULTIPLY(tmp10, FIX(1.819470145)) /* c7+c5+c3-c1 */
- + MULTIPLY(tmp14, FIX(0.421479672)); /* c9 */
- tmp4 = MULTIPLY(tmp11 + tmp12, - FIX(0.808813568)); /* -c7 */
- tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(1.480800167)); /* -c1 */
- tmp1 += tmp4 + tmp5 + MULTIPLY(tmp11, FIX(1.350258864)) /* c9+c7+c1-c3 */
- - MULTIPLY(tmp14, FIX(1.130622199)); /* c5 */
- tmp10 = MULTIPLY(tmp12 + tmp13, FIX(0.421479672)); /* c9 */
- tmp2 += tmp4 + tmp10 - MULTIPLY(tmp12, FIX(2.104122847)) /* c9+c5+c3-c7 */
- + MULTIPLY(tmp14, FIX(1.480800167)); /* c1 */
- tmp3 += tmp5 + tmp10 + MULTIPLY(tmp13, FIX(1.381129125)) /* c1+c5-c9-c7 */
- - MULTIPLY(tmp14, FIX(1.360834544)); /* c3 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+2);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+2);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+2);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3, CONST_BITS+2);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ INT32 z1, z2, z3;
+ DCTELEM workspace[8*3];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* we scale the results further by 2 as part of output adaption */
+ /* scaling for different DCT size. */
+ /* cK represents sqrt(2) * cos(K*pi/22). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[10]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[9]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[8]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[7]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[6]);
+ tmp5 = GETJSAMPLE(elemptr[5]);
+
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[10]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[9]);
+ tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[8]);
+ tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[7]);
+ tmp14 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[6]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5 - 11 * CENTERJSAMPLE) << 1);
+ tmp5 += tmp5;
+ tmp0 -= tmp5;
+ tmp1 -= tmp5;
+ tmp2 -= tmp5;
+ tmp3 -= tmp5;
+ tmp4 -= tmp5;
+ z1 = MULTIPLY(tmp0 + tmp3, FIX(1.356927976)) + /* c2 */
+ MULTIPLY(tmp2 + tmp4, FIX(0.201263574)); /* c10 */
+ z2 = MULTIPLY(tmp1 - tmp3, FIX(0.926112931)); /* c6 */
+ z3 = MULTIPLY(tmp0 - tmp1, FIX(1.189712156)); /* c4 */
+ dataptr[2] = (DCTELEM)
+ DESCALE(z1 + z2 - MULTIPLY(tmp3, FIX(1.018300590)) /* c2+c8-c6 */
+ - MULTIPLY(tmp4, FIX(1.390975730)), /* c4+c10 */
+ CONST_BITS-1);
+ dataptr[4] = (DCTELEM)
+ DESCALE(z2 + z3 + MULTIPLY(tmp1, FIX(0.062335650)) /* c4-c6-c10 */
+ - MULTIPLY(tmp2, FIX(1.356927976)) /* c2 */
+ + MULTIPLY(tmp4, FIX(0.587485545)), /* c8 */
+ CONST_BITS-1);
+ dataptr[6] = (DCTELEM)
+ DESCALE(z1 + z3 - MULTIPLY(tmp0, FIX(1.620527200)) /* c2+c4-c6 */
+ - MULTIPLY(tmp2, FIX(0.788749120)), /* c8+c10 */
+ CONST_BITS-1);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.286413905)); /* c3 */
+ tmp2 = MULTIPLY(tmp10 + tmp12, FIX(1.068791298)); /* c5 */
+ tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.764581576)); /* c7 */
+ tmp0 = tmp1 + tmp2 + tmp3 - MULTIPLY(tmp10, FIX(1.719967871)) /* c7+c5+c3-c1 */
+ + MULTIPLY(tmp14, FIX(0.398430003)); /* c9 */
+ tmp4 = MULTIPLY(tmp11 + tmp12, - FIX(0.764581576)); /* -c7 */
+ tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(1.399818907)); /* -c1 */
+ tmp1 += tmp4 + tmp5 + MULTIPLY(tmp11, FIX(1.276416582)) /* c9+c7+c1-c3 */
+ - MULTIPLY(tmp14, FIX(1.068791298)); /* c5 */
+ tmp10 = MULTIPLY(tmp12 + tmp13, FIX(0.398430003)); /* c9 */
+ tmp2 += tmp4 + tmp10 - MULTIPLY(tmp12, FIX(1.989053629)) /* c9+c5+c3-c7 */
+ + MULTIPLY(tmp14, FIX(1.399818907)); /* c1 */
+ tmp3 += tmp5 + tmp10 + MULTIPLY(tmp13, FIX(1.305598626)) /* c1+c5-c9-c7 */
+ - MULTIPLY(tmp14, FIX(1.286413905)); /* c3 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS-1);
+ dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS-1);
+ dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS-1);
+ dataptr[7] = (DCTELEM) DESCALE(tmp3, CONST_BITS-1);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 11)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/11)**2 = 64/121, which we partially
+ * fold into the constant multipliers and final/initial shifting:
+ * cK now represents sqrt(2) * cos(K*pi/22) * 128/121.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*2];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*1];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*0];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*7];
+ tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*6];
+ tmp5 = dataptr[DCTSIZE*5];
+
+ tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*2];
+ tmp11 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*1];
+ tmp12 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*0];
+ tmp13 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*7];
+ tmp14 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*6];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5,
+ FIX(1.057851240)), /* 128/121 */
+ CONST_BITS+2);
+ tmp5 += tmp5;
+ tmp0 -= tmp5;
+ tmp1 -= tmp5;
+ tmp2 -= tmp5;
+ tmp3 -= tmp5;
+ tmp4 -= tmp5;
+ z1 = MULTIPLY(tmp0 + tmp3, FIX(1.435427942)) + /* c2 */
+ MULTIPLY(tmp2 + tmp4, FIX(0.212906922)); /* c10 */
+ z2 = MULTIPLY(tmp1 - tmp3, FIX(0.979689713)); /* c6 */
+ z3 = MULTIPLY(tmp0 - tmp1, FIX(1.258538479)); /* c4 */
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(z1 + z2 - MULTIPLY(tmp3, FIX(1.077210542)) /* c2+c8-c6 */
+ - MULTIPLY(tmp4, FIX(1.471445400)), /* c4+c10 */
+ CONST_BITS+2);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(z2 + z3 + MULTIPLY(tmp1, FIX(0.065941844)) /* c4-c6-c10 */
+ - MULTIPLY(tmp2, FIX(1.435427942)) /* c2 */
+ + MULTIPLY(tmp4, FIX(0.621472312)), /* c8 */
+ CONST_BITS+2);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(z1 + z3 - MULTIPLY(tmp0, FIX(1.714276708)) /* c2+c4-c6 */
+ - MULTIPLY(tmp2, FIX(0.834379234)), /* c8+c10 */
+ CONST_BITS+2);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.360834544)); /* c3 */
+ tmp2 = MULTIPLY(tmp10 + tmp12, FIX(1.130622199)); /* c5 */
+ tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.808813568)); /* c7 */
+ tmp0 = tmp1 + tmp2 + tmp3 - MULTIPLY(tmp10, FIX(1.819470145)) /* c7+c5+c3-c1 */
+ + MULTIPLY(tmp14, FIX(0.421479672)); /* c9 */
+ tmp4 = MULTIPLY(tmp11 + tmp12, - FIX(0.808813568)); /* -c7 */
+ tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(1.480800167)); /* -c1 */
+ tmp1 += tmp4 + tmp5 + MULTIPLY(tmp11, FIX(1.350258864)) /* c9+c7+c1-c3 */
+ - MULTIPLY(tmp14, FIX(1.130622199)); /* c5 */
+ tmp10 = MULTIPLY(tmp12 + tmp13, FIX(0.421479672)); /* c9 */
+ tmp2 += tmp4 + tmp10 - MULTIPLY(tmp12, FIX(2.104122847)) /* c9+c5+c3-c7 */
+ + MULTIPLY(tmp14, FIX(1.480800167)); /* c1 */
+ tmp3 += tmp5 + tmp10 + MULTIPLY(tmp13, FIX(1.381129125)) /* c1+c5-c9-c7 */
+ - MULTIPLY(tmp14, FIX(1.360834544)); /* c3 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+2);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+2);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+2);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3, CONST_BITS+2);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -1421,161 +1421,161 @@ jpeg_fdct_11x11 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_12x12 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- DCTELEM workspace[8*4];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT. */
- /* cK represents sqrt(2) * cos(K*pi/24). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[11]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[10]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[9]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[8]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[7]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[6]);
-
- tmp10 = tmp0 + tmp5;
- tmp13 = tmp0 - tmp5;
- tmp11 = tmp1 + tmp4;
- tmp14 = tmp1 - tmp4;
- tmp12 = tmp2 + tmp3;
- tmp15 = tmp2 - tmp3;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[11]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[10]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[9]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[8]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[7]);
- tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[6]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM) (tmp10 + tmp11 + tmp12 - 12 * CENTERJSAMPLE);
- dataptr[6] = (DCTELEM) (tmp13 - tmp14 - tmp15);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.224744871)), /* c4 */
- CONST_BITS);
- dataptr[2] = (DCTELEM)
- DESCALE(tmp14 - tmp15 + MULTIPLY(tmp13 + tmp15, FIX(1.366025404)), /* c2 */
- CONST_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp1 + tmp4, FIX_0_541196100); /* c9 */
- tmp14 = tmp10 + MULTIPLY(tmp1, FIX_0_765366865); /* c3-c9 */
- tmp15 = tmp10 - MULTIPLY(tmp4, FIX_1_847759065); /* c3+c9 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.121971054)); /* c5 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.860918669)); /* c7 */
- tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.580774953)) /* c5+c7-c1 */
- + MULTIPLY(tmp5, FIX(0.184591911)); /* c11 */
- tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.184591911)); /* -c11 */
- tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.339493912)) /* c1+c5-c11 */
- + MULTIPLY(tmp5, FIX(0.860918669)); /* c7 */
- tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.725788011)) /* c1+c11-c7 */
- - MULTIPLY(tmp5, FIX(1.121971054)); /* c5 */
- tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.306562965)) /* c3 */
- - MULTIPLY(tmp2 + tmp5, FIX_0_541196100); /* c9 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 12)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/12)**2 = 4/9, which we partially
- * fold into the constant multipliers and final shifting:
- * cK now represents sqrt(2) * cos(K*pi/24) * 8/9.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*3];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*2];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*1];
- tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*0];
- tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*7];
- tmp5 = dataptr[DCTSIZE*5] + dataptr[DCTSIZE*6];
-
- tmp10 = tmp0 + tmp5;
- tmp13 = tmp0 - tmp5;
- tmp11 = tmp1 + tmp4;
- tmp14 = tmp1 - tmp4;
- tmp12 = tmp2 + tmp3;
- tmp15 = tmp2 - tmp3;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*3];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*2];
- tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*1];
- tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*0];
- tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*7];
- tmp5 = dataptr[DCTSIZE*5] - dataptr[DCTSIZE*6];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(0.888888889)), /* 8/9 */
- CONST_BITS+1);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(MULTIPLY(tmp13 - tmp14 - tmp15, FIX(0.888888889)), /* 8/9 */
- CONST_BITS+1);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.088662108)), /* c4 */
- CONST_BITS+1);
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp14 - tmp15, FIX(0.888888889)) + /* 8/9 */
- MULTIPLY(tmp13 + tmp15, FIX(1.214244803)), /* c2 */
- CONST_BITS+1);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp1 + tmp4, FIX(0.481063200)); /* c9 */
- tmp14 = tmp10 + MULTIPLY(tmp1, FIX(0.680326102)); /* c3-c9 */
- tmp15 = tmp10 - MULTIPLY(tmp4, FIX(1.642452502)); /* c3+c9 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(0.997307603)); /* c5 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.765261039)); /* c7 */
- tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.516244403)) /* c5+c7-c1 */
- + MULTIPLY(tmp5, FIX(0.164081699)); /* c11 */
- tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.164081699)); /* -c11 */
- tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.079550144)) /* c1+c5-c11 */
- + MULTIPLY(tmp5, FIX(0.765261039)); /* c7 */
- tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.645144899)) /* c1+c11-c7 */
- - MULTIPLY(tmp5, FIX(0.997307603)); /* c5 */
- tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.161389302)) /* c3 */
- - MULTIPLY(tmp2 + tmp5, FIX(0.481063200)); /* c9 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+1);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+1);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+1);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+1);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ DCTELEM workspace[8*4];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT. */
+ /* cK represents sqrt(2) * cos(K*pi/24). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[11]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[10]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[9]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[8]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[7]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[6]);
+
+ tmp10 = tmp0 + tmp5;
+ tmp13 = tmp0 - tmp5;
+ tmp11 = tmp1 + tmp4;
+ tmp14 = tmp1 - tmp4;
+ tmp12 = tmp2 + tmp3;
+ tmp15 = tmp2 - tmp3;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[11]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[10]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[9]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[8]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[7]);
+ tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[6]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM) (tmp10 + tmp11 + tmp12 - 12 * CENTERJSAMPLE);
+ dataptr[6] = (DCTELEM) (tmp13 - tmp14 - tmp15);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.224744871)), /* c4 */
+ CONST_BITS);
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp14 - tmp15 + MULTIPLY(tmp13 + tmp15, FIX(1.366025404)), /* c2 */
+ CONST_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp1 + tmp4, FIX_0_541196100); /* c9 */
+ tmp14 = tmp10 + MULTIPLY(tmp1, FIX_0_765366865); /* c3-c9 */
+ tmp15 = tmp10 - MULTIPLY(tmp4, FIX_1_847759065); /* c3+c9 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.121971054)); /* c5 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.860918669)); /* c7 */
+ tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.580774953)) /* c5+c7-c1 */
+ + MULTIPLY(tmp5, FIX(0.184591911)); /* c11 */
+ tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.184591911)); /* -c11 */
+ tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.339493912)) /* c1+c5-c11 */
+ + MULTIPLY(tmp5, FIX(0.860918669)); /* c7 */
+ tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.725788011)) /* c1+c11-c7 */
+ - MULTIPLY(tmp5, FIX(1.121971054)); /* c5 */
+ tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.306562965)) /* c3 */
+ - MULTIPLY(tmp2 + tmp5, FIX_0_541196100); /* c9 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 12)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/12)**2 = 4/9, which we partially
+ * fold into the constant multipliers and final shifting:
+ * cK now represents sqrt(2) * cos(K*pi/24) * 8/9.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*3];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*2];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*1];
+ tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*0];
+ tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*7];
+ tmp5 = dataptr[DCTSIZE*5] + dataptr[DCTSIZE*6];
+
+ tmp10 = tmp0 + tmp5;
+ tmp13 = tmp0 - tmp5;
+ tmp11 = tmp1 + tmp4;
+ tmp14 = tmp1 - tmp4;
+ tmp12 = tmp2 + tmp3;
+ tmp15 = tmp2 - tmp3;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*3];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*2];
+ tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*1];
+ tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*0];
+ tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*7];
+ tmp5 = dataptr[DCTSIZE*5] - dataptr[DCTSIZE*6];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(0.888888889)), /* 8/9 */
+ CONST_BITS+1);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp13 - tmp14 - tmp15, FIX(0.888888889)), /* 8/9 */
+ CONST_BITS+1);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.088662108)), /* c4 */
+ CONST_BITS+1);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp14 - tmp15, FIX(0.888888889)) + /* 8/9 */
+ MULTIPLY(tmp13 + tmp15, FIX(1.214244803)), /* c2 */
+ CONST_BITS+1);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp1 + tmp4, FIX(0.481063200)); /* c9 */
+ tmp14 = tmp10 + MULTIPLY(tmp1, FIX(0.680326102)); /* c3-c9 */
+ tmp15 = tmp10 - MULTIPLY(tmp4, FIX(1.642452502)); /* c3+c9 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(0.997307603)); /* c5 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.765261039)); /* c7 */
+ tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.516244403)) /* c5+c7-c1 */
+ + MULTIPLY(tmp5, FIX(0.164081699)); /* c11 */
+ tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.164081699)); /* -c11 */
+ tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.079550144)) /* c1+c5-c11 */
+ + MULTIPLY(tmp5, FIX(0.765261039)); /* c7 */
+ tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.645144899)) /* c1+c11-c7 */
+ - MULTIPLY(tmp5, FIX(0.997307603)); /* c5 */
+ tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.161389302)) /* c3 */
+ - MULTIPLY(tmp2 + tmp5, FIX(0.481063200)); /* c9 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+1);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+1);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+1);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+1);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -1586,195 +1586,195 @@ jpeg_fdct_12x12 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_13x13 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- INT32 z1, z2;
- DCTELEM workspace[8*5];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT. */
- /* cK represents sqrt(2) * cos(K*pi/26). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[12]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[11]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[10]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[9]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[8]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[7]);
- tmp6 = GETJSAMPLE(elemptr[6]);
-
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[12]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[11]);
- tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[10]);
- tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[9]);
- tmp14 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[8]);
- tmp15 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[7]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- (tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5 + tmp6 - 13 * CENTERJSAMPLE);
- tmp6 += tmp6;
- tmp0 -= tmp6;
- tmp1 -= tmp6;
- tmp2 -= tmp6;
- tmp3 -= tmp6;
- tmp4 -= tmp6;
- tmp5 -= tmp6;
- dataptr[2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0, FIX(1.373119086)) + /* c2 */
- MULTIPLY(tmp1, FIX(1.058554052)) + /* c6 */
- MULTIPLY(tmp2, FIX(0.501487041)) - /* c10 */
- MULTIPLY(tmp3, FIX(0.170464608)) - /* c12 */
- MULTIPLY(tmp4, FIX(0.803364869)) - /* c8 */
- MULTIPLY(tmp5, FIX(1.252223920)), /* c4 */
- CONST_BITS);
- z1 = MULTIPLY(tmp0 - tmp2, FIX(1.155388986)) - /* (c4+c6)/2 */
- MULTIPLY(tmp3 - tmp4, FIX(0.435816023)) - /* (c2-c10)/2 */
- MULTIPLY(tmp1 - tmp5, FIX(0.316450131)); /* (c8-c12)/2 */
- z2 = MULTIPLY(tmp0 + tmp2, FIX(0.096834934)) - /* (c4-c6)/2 */
- MULTIPLY(tmp3 + tmp4, FIX(0.937303064)) + /* (c2+c10)/2 */
- MULTIPLY(tmp1 + tmp5, FIX(0.486914739)); /* (c8+c12)/2 */
-
- dataptr[4] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS);
- dataptr[6] = (DCTELEM) DESCALE(z1 - z2, CONST_BITS);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.322312651)); /* c3 */
- tmp2 = MULTIPLY(tmp10 + tmp12, FIX(1.163874945)); /* c5 */
- tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.937797057)) + /* c7 */
- MULTIPLY(tmp14 + tmp15, FIX(0.338443458)); /* c11 */
- tmp0 = tmp1 + tmp2 + tmp3 -
- MULTIPLY(tmp10, FIX(2.020082300)) + /* c3+c5+c7-c1 */
- MULTIPLY(tmp14, FIX(0.318774355)); /* c9-c11 */
- tmp4 = MULTIPLY(tmp14 - tmp15, FIX(0.937797057)) - /* c7 */
- MULTIPLY(tmp11 + tmp12, FIX(0.338443458)); /* c11 */
- tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(1.163874945)); /* -c5 */
- tmp1 += tmp4 + tmp5 +
- MULTIPLY(tmp11, FIX(0.837223564)) - /* c5+c9+c11-c3 */
- MULTIPLY(tmp14, FIX(2.341699410)); /* c1+c7 */
- tmp6 = MULTIPLY(tmp12 + tmp13, - FIX(0.657217813)); /* -c9 */
- tmp2 += tmp4 + tmp6 -
- MULTIPLY(tmp12, FIX(1.572116027)) + /* c1+c5-c9-c11 */
- MULTIPLY(tmp15, FIX(2.260109708)); /* c3+c7 */
- tmp3 += tmp5 + tmp6 +
- MULTIPLY(tmp13, FIX(2.205608352)) - /* c3+c5+c9-c7 */
- MULTIPLY(tmp15, FIX(1.742345811)); /* c1+c11 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp3, CONST_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 13)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/13)**2 = 64/169, which we partially
- * fold into the constant multipliers and final shifting:
- * cK now represents sqrt(2) * cos(K*pi/26) * 128/169.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*4];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*3];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*2];
- tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*1];
- tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*0];
- tmp5 = dataptr[DCTSIZE*5] + dataptr[DCTSIZE*7];
- tmp6 = dataptr[DCTSIZE*6];
-
- tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*4];
- tmp11 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*3];
- tmp12 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*2];
- tmp13 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*1];
- tmp14 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*0];
- tmp15 = dataptr[DCTSIZE*5] - dataptr[DCTSIZE*7];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5 + tmp6,
- FIX(0.757396450)), /* 128/169 */
- CONST_BITS+1);
- tmp6 += tmp6;
- tmp0 -= tmp6;
- tmp1 -= tmp6;
- tmp2 -= tmp6;
- tmp3 -= tmp6;
- tmp4 -= tmp6;
- tmp5 -= tmp6;
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0, FIX(1.039995521)) + /* c2 */
- MULTIPLY(tmp1, FIX(0.801745081)) + /* c6 */
- MULTIPLY(tmp2, FIX(0.379824504)) - /* c10 */
- MULTIPLY(tmp3, FIX(0.129109289)) - /* c12 */
- MULTIPLY(tmp4, FIX(0.608465700)) - /* c8 */
- MULTIPLY(tmp5, FIX(0.948429952)), /* c4 */
- CONST_BITS+1);
- z1 = MULTIPLY(tmp0 - tmp2, FIX(0.875087516)) - /* (c4+c6)/2 */
- MULTIPLY(tmp3 - tmp4, FIX(0.330085509)) - /* (c2-c10)/2 */
- MULTIPLY(tmp1 - tmp5, FIX(0.239678205)); /* (c8-c12)/2 */
- z2 = MULTIPLY(tmp0 + tmp2, FIX(0.073342435)) - /* (c4-c6)/2 */
- MULTIPLY(tmp3 + tmp4, FIX(0.709910013)) + /* (c2+c10)/2 */
- MULTIPLY(tmp1 + tmp5, FIX(0.368787494)); /* (c8+c12)/2 */
-
- dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS+1);
- dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 - z2, CONST_BITS+1);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.001514908)); /* c3 */
- tmp2 = MULTIPLY(tmp10 + tmp12, FIX(0.881514751)); /* c5 */
- tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.710284161)) + /* c7 */
- MULTIPLY(tmp14 + tmp15, FIX(0.256335874)); /* c11 */
- tmp0 = tmp1 + tmp2 + tmp3 -
- MULTIPLY(tmp10, FIX(1.530003162)) + /* c3+c5+c7-c1 */
- MULTIPLY(tmp14, FIX(0.241438564)); /* c9-c11 */
- tmp4 = MULTIPLY(tmp14 - tmp15, FIX(0.710284161)) - /* c7 */
- MULTIPLY(tmp11 + tmp12, FIX(0.256335874)); /* c11 */
- tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(0.881514751)); /* -c5 */
- tmp1 += tmp4 + tmp5 +
- MULTIPLY(tmp11, FIX(0.634110155)) - /* c5+c9+c11-c3 */
- MULTIPLY(tmp14, FIX(1.773594819)); /* c1+c7 */
- tmp6 = MULTIPLY(tmp12 + tmp13, - FIX(0.497774438)); /* -c9 */
- tmp2 += tmp4 + tmp6 -
- MULTIPLY(tmp12, FIX(1.190715098)) + /* c1+c5-c9-c11 */
- MULTIPLY(tmp15, FIX(1.711799069)); /* c3+c7 */
- tmp3 += tmp5 + tmp6 +
- MULTIPLY(tmp13, FIX(1.670519935)) - /* c3+c5+c9-c7 */
- MULTIPLY(tmp15, FIX(1.319646532)); /* c1+c11 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+1);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+1);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+1);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3, CONST_BITS+1);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ INT32 z1, z2;
+ DCTELEM workspace[8*5];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT. */
+ /* cK represents sqrt(2) * cos(K*pi/26). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[12]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[11]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[10]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[9]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[8]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[7]);
+ tmp6 = GETJSAMPLE(elemptr[6]);
+
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[12]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[11]);
+ tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[10]);
+ tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[9]);
+ tmp14 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[8]);
+ tmp15 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[7]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ (tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5 + tmp6 - 13 * CENTERJSAMPLE);
+ tmp6 += tmp6;
+ tmp0 -= tmp6;
+ tmp1 -= tmp6;
+ tmp2 -= tmp6;
+ tmp3 -= tmp6;
+ tmp4 -= tmp6;
+ tmp5 -= tmp6;
+ dataptr[2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0, FIX(1.373119086)) + /* c2 */
+ MULTIPLY(tmp1, FIX(1.058554052)) + /* c6 */
+ MULTIPLY(tmp2, FIX(0.501487041)) - /* c10 */
+ MULTIPLY(tmp3, FIX(0.170464608)) - /* c12 */
+ MULTIPLY(tmp4, FIX(0.803364869)) - /* c8 */
+ MULTIPLY(tmp5, FIX(1.252223920)), /* c4 */
+ CONST_BITS);
+ z1 = MULTIPLY(tmp0 - tmp2, FIX(1.155388986)) - /* (c4+c6)/2 */
+ MULTIPLY(tmp3 - tmp4, FIX(0.435816023)) - /* (c2-c10)/2 */
+ MULTIPLY(tmp1 - tmp5, FIX(0.316450131)); /* (c8-c12)/2 */
+ z2 = MULTIPLY(tmp0 + tmp2, FIX(0.096834934)) - /* (c4-c6)/2 */
+ MULTIPLY(tmp3 + tmp4, FIX(0.937303064)) + /* (c2+c10)/2 */
+ MULTIPLY(tmp1 + tmp5, FIX(0.486914739)); /* (c8+c12)/2 */
+
+ dataptr[4] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS);
+ dataptr[6] = (DCTELEM) DESCALE(z1 - z2, CONST_BITS);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.322312651)); /* c3 */
+ tmp2 = MULTIPLY(tmp10 + tmp12, FIX(1.163874945)); /* c5 */
+ tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.937797057)) + /* c7 */
+ MULTIPLY(tmp14 + tmp15, FIX(0.338443458)); /* c11 */
+ tmp0 = tmp1 + tmp2 + tmp3 -
+ MULTIPLY(tmp10, FIX(2.020082300)) + /* c3+c5+c7-c1 */
+ MULTIPLY(tmp14, FIX(0.318774355)); /* c9-c11 */
+ tmp4 = MULTIPLY(tmp14 - tmp15, FIX(0.937797057)) - /* c7 */
+ MULTIPLY(tmp11 + tmp12, FIX(0.338443458)); /* c11 */
+ tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(1.163874945)); /* -c5 */
+ tmp1 += tmp4 + tmp5 +
+ MULTIPLY(tmp11, FIX(0.837223564)) - /* c5+c9+c11-c3 */
+ MULTIPLY(tmp14, FIX(2.341699410)); /* c1+c7 */
+ tmp6 = MULTIPLY(tmp12 + tmp13, - FIX(0.657217813)); /* -c9 */
+ tmp2 += tmp4 + tmp6 -
+ MULTIPLY(tmp12, FIX(1.572116027)) + /* c1+c5-c9-c11 */
+ MULTIPLY(tmp15, FIX(2.260109708)); /* c3+c7 */
+ tmp3 += tmp5 + tmp6 +
+ MULTIPLY(tmp13, FIX(2.205608352)) - /* c3+c5+c9-c7 */
+ MULTIPLY(tmp15, FIX(1.742345811)); /* c1+c11 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp3, CONST_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 13)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/13)**2 = 64/169, which we partially
+ * fold into the constant multipliers and final shifting:
+ * cK now represents sqrt(2) * cos(K*pi/26) * 128/169.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*4];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*3];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*2];
+ tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*1];
+ tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*0];
+ tmp5 = dataptr[DCTSIZE*5] + dataptr[DCTSIZE*7];
+ tmp6 = dataptr[DCTSIZE*6];
+
+ tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*4];
+ tmp11 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*3];
+ tmp12 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*2];
+ tmp13 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*1];
+ tmp14 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*0];
+ tmp15 = dataptr[DCTSIZE*5] - dataptr[DCTSIZE*7];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 + tmp1 + tmp2 + tmp3 + tmp4 + tmp5 + tmp6,
+ FIX(0.757396450)), /* 128/169 */
+ CONST_BITS+1);
+ tmp6 += tmp6;
+ tmp0 -= tmp6;
+ tmp1 -= tmp6;
+ tmp2 -= tmp6;
+ tmp3 -= tmp6;
+ tmp4 -= tmp6;
+ tmp5 -= tmp6;
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0, FIX(1.039995521)) + /* c2 */
+ MULTIPLY(tmp1, FIX(0.801745081)) + /* c6 */
+ MULTIPLY(tmp2, FIX(0.379824504)) - /* c10 */
+ MULTIPLY(tmp3, FIX(0.129109289)) - /* c12 */
+ MULTIPLY(tmp4, FIX(0.608465700)) - /* c8 */
+ MULTIPLY(tmp5, FIX(0.948429952)), /* c4 */
+ CONST_BITS+1);
+ z1 = MULTIPLY(tmp0 - tmp2, FIX(0.875087516)) - /* (c4+c6)/2 */
+ MULTIPLY(tmp3 - tmp4, FIX(0.330085509)) - /* (c2-c10)/2 */
+ MULTIPLY(tmp1 - tmp5, FIX(0.239678205)); /* (c8-c12)/2 */
+ z2 = MULTIPLY(tmp0 + tmp2, FIX(0.073342435)) - /* (c4-c6)/2 */
+ MULTIPLY(tmp3 + tmp4, FIX(0.709910013)) + /* (c2+c10)/2 */
+ MULTIPLY(tmp1 + tmp5, FIX(0.368787494)); /* (c8+c12)/2 */
+
+ dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS+1);
+ dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 - z2, CONST_BITS+1);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.001514908)); /* c3 */
+ tmp2 = MULTIPLY(tmp10 + tmp12, FIX(0.881514751)); /* c5 */
+ tmp3 = MULTIPLY(tmp10 + tmp13, FIX(0.710284161)) + /* c7 */
+ MULTIPLY(tmp14 + tmp15, FIX(0.256335874)); /* c11 */
+ tmp0 = tmp1 + tmp2 + tmp3 -
+ MULTIPLY(tmp10, FIX(1.530003162)) + /* c3+c5+c7-c1 */
+ MULTIPLY(tmp14, FIX(0.241438564)); /* c9-c11 */
+ tmp4 = MULTIPLY(tmp14 - tmp15, FIX(0.710284161)) - /* c7 */
+ MULTIPLY(tmp11 + tmp12, FIX(0.256335874)); /* c11 */
+ tmp5 = MULTIPLY(tmp11 + tmp13, - FIX(0.881514751)); /* -c5 */
+ tmp1 += tmp4 + tmp5 +
+ MULTIPLY(tmp11, FIX(0.634110155)) - /* c5+c9+c11-c3 */
+ MULTIPLY(tmp14, FIX(1.773594819)); /* c1+c7 */
+ tmp6 = MULTIPLY(tmp12 + tmp13, - FIX(0.497774438)); /* -c9 */
+ tmp2 += tmp4 + tmp6 -
+ MULTIPLY(tmp12, FIX(1.190715098)) + /* c1+c5-c9-c11 */
+ MULTIPLY(tmp15, FIX(1.711799069)); /* c3+c7 */
+ tmp3 += tmp5 + tmp6 +
+ MULTIPLY(tmp13, FIX(1.670519935)) - /* c3+c5+c9-c7 */
+ MULTIPLY(tmp15, FIX(1.319646532)); /* c1+c11 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+1);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+1);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+1);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3, CONST_BITS+1);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -1785,196 +1785,196 @@ jpeg_fdct_13x13 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_14x14 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- DCTELEM workspace[8*6];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT. */
- /* cK represents sqrt(2) * cos(K*pi/28). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[13]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[12]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[11]);
- tmp13 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[10]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[9]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[8]);
- tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[7]);
-
- tmp10 = tmp0 + tmp6;
- tmp14 = tmp0 - tmp6;
- tmp11 = tmp1 + tmp5;
- tmp15 = tmp1 - tmp5;
- tmp12 = tmp2 + tmp4;
- tmp16 = tmp2 - tmp4;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[13]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[12]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[11]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[10]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[9]);
- tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[8]);
- tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[7]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- (tmp10 + tmp11 + tmp12 + tmp13 - 14 * CENTERJSAMPLE);
- tmp13 += tmp13;
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.274162392)) + /* c4 */
- MULTIPLY(tmp11 - tmp13, FIX(0.314692123)) - /* c12 */
- MULTIPLY(tmp12 - tmp13, FIX(0.881747734)), /* c8 */
- CONST_BITS);
-
- tmp10 = MULTIPLY(tmp14 + tmp15, FIX(1.105676686)); /* c6 */
-
- dataptr[2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.273079590)) /* c2-c6 */
- + MULTIPLY(tmp16, FIX(0.613604268)), /* c10 */
- CONST_BITS);
- dataptr[6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.719280954)) /* c6+c10 */
- - MULTIPLY(tmp16, FIX(1.378756276)), /* c2 */
- CONST_BITS);
-
- /* Odd part */
-
- tmp10 = tmp1 + tmp2;
- tmp11 = tmp5 - tmp4;
- dataptr[7] = (DCTELEM) (tmp0 - tmp10 + tmp3 - tmp11 - tmp6);
- tmp3 <<= CONST_BITS;
- tmp10 = MULTIPLY(tmp10, - FIX(0.158341681)); /* -c13 */
- tmp11 = MULTIPLY(tmp11, FIX(1.405321284)); /* c1 */
- tmp10 += tmp11 - tmp3;
- tmp11 = MULTIPLY(tmp0 + tmp2, FIX(1.197448846)) + /* c5 */
- MULTIPLY(tmp4 + tmp6, FIX(0.752406978)); /* c9 */
- dataptr[5] = (DCTELEM)
- DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(2.373959773)) /* c3+c5-c13 */
- + MULTIPLY(tmp4, FIX(1.119999435)), /* c1+c11-c9 */
- CONST_BITS);
- tmp12 = MULTIPLY(tmp0 + tmp1, FIX(1.334852607)) + /* c3 */
- MULTIPLY(tmp5 - tmp6, FIX(0.467085129)); /* c11 */
- dataptr[3] = (DCTELEM)
- DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.424103948)) /* c3-c9-c13 */
- - MULTIPLY(tmp5, FIX(3.069855259)), /* c1+c5+c11 */
- CONST_BITS);
- dataptr[1] = (DCTELEM)
- DESCALE(tmp11 + tmp12 + tmp3 + tmp6 -
- MULTIPLY(tmp0 + tmp6, FIX(1.126980169)), /* c3+c5-c1 */
- CONST_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 14)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/14)**2 = 16/49, which we partially
- * fold into the constant multipliers and final shifting:
- * cK now represents sqrt(2) * cos(K*pi/28) * 32/49.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*5];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*3];
- tmp13 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*2];
- tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*1];
- tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*0];
- tmp6 = dataptr[DCTSIZE*6] + dataptr[DCTSIZE*7];
-
- tmp10 = tmp0 + tmp6;
- tmp14 = tmp0 - tmp6;
- tmp11 = tmp1 + tmp5;
- tmp15 = tmp1 - tmp5;
- tmp12 = tmp2 + tmp4;
- tmp16 = tmp2 - tmp4;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*5];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*3];
- tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*2];
- tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*1];
- tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*0];
- tmp6 = dataptr[DCTSIZE*6] - dataptr[DCTSIZE*7];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12 + tmp13,
- FIX(0.653061224)), /* 32/49 */
- CONST_BITS+1);
- tmp13 += tmp13;
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(0.832106052)) + /* c4 */
- MULTIPLY(tmp11 - tmp13, FIX(0.205513223)) - /* c12 */
- MULTIPLY(tmp12 - tmp13, FIX(0.575835255)), /* c8 */
- CONST_BITS+1);
-
- tmp10 = MULTIPLY(tmp14 + tmp15, FIX(0.722074570)); /* c6 */
-
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.178337691)) /* c2-c6 */
- + MULTIPLY(tmp16, FIX(0.400721155)), /* c10 */
- CONST_BITS+1);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.122795725)) /* c6+c10 */
- - MULTIPLY(tmp16, FIX(0.900412262)), /* c2 */
- CONST_BITS+1);
-
- /* Odd part */
-
- tmp10 = tmp1 + tmp2;
- tmp11 = tmp5 - tmp4;
- dataptr[DCTSIZE*7] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp10 + tmp3 - tmp11 - tmp6,
- FIX(0.653061224)), /* 32/49 */
- CONST_BITS+1);
- tmp3 = MULTIPLY(tmp3 , FIX(0.653061224)); /* 32/49 */
- tmp10 = MULTIPLY(tmp10, - FIX(0.103406812)); /* -c13 */
- tmp11 = MULTIPLY(tmp11, FIX(0.917760839)); /* c1 */
- tmp10 += tmp11 - tmp3;
- tmp11 = MULTIPLY(tmp0 + tmp2, FIX(0.782007410)) + /* c5 */
- MULTIPLY(tmp4 + tmp6, FIX(0.491367823)); /* c9 */
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(1.550341076)) /* c3+c5-c13 */
- + MULTIPLY(tmp4, FIX(0.731428202)), /* c1+c11-c9 */
- CONST_BITS+1);
- tmp12 = MULTIPLY(tmp0 + tmp1, FIX(0.871740478)) + /* c3 */
- MULTIPLY(tmp5 - tmp6, FIX(0.305035186)); /* c11 */
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.276965844)) /* c3-c9-c13 */
- - MULTIPLY(tmp5, FIX(2.004803435)), /* c1+c5+c11 */
- CONST_BITS+1);
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp11 + tmp12 + tmp3
- - MULTIPLY(tmp0, FIX(0.735987049)) /* c3+c5-c1 */
- - MULTIPLY(tmp6, FIX(0.082925825)), /* c9-c11-c13 */
- CONST_BITS+1);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ DCTELEM workspace[8*6];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT. */
+ /* cK represents sqrt(2) * cos(K*pi/28). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[13]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[12]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[11]);
+ tmp13 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[10]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[9]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[8]);
+ tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[7]);
+
+ tmp10 = tmp0 + tmp6;
+ tmp14 = tmp0 - tmp6;
+ tmp11 = tmp1 + tmp5;
+ tmp15 = tmp1 - tmp5;
+ tmp12 = tmp2 + tmp4;
+ tmp16 = tmp2 - tmp4;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[13]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[12]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[11]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[10]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[9]);
+ tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[8]);
+ tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[7]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ (tmp10 + tmp11 + tmp12 + tmp13 - 14 * CENTERJSAMPLE);
+ tmp13 += tmp13;
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.274162392)) + /* c4 */
+ MULTIPLY(tmp11 - tmp13, FIX(0.314692123)) - /* c12 */
+ MULTIPLY(tmp12 - tmp13, FIX(0.881747734)), /* c8 */
+ CONST_BITS);
+
+ tmp10 = MULTIPLY(tmp14 + tmp15, FIX(1.105676686)); /* c6 */
+
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.273079590)) /* c2-c6 */
+ + MULTIPLY(tmp16, FIX(0.613604268)), /* c10 */
+ CONST_BITS);
+ dataptr[6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.719280954)) /* c6+c10 */
+ - MULTIPLY(tmp16, FIX(1.378756276)), /* c2 */
+ CONST_BITS);
+
+ /* Odd part */
+
+ tmp10 = tmp1 + tmp2;
+ tmp11 = tmp5 - tmp4;
+ dataptr[7] = (DCTELEM) (tmp0 - tmp10 + tmp3 - tmp11 - tmp6);
+ tmp3 <<= CONST_BITS;
+ tmp10 = MULTIPLY(tmp10, - FIX(0.158341681)); /* -c13 */
+ tmp11 = MULTIPLY(tmp11, FIX(1.405321284)); /* c1 */
+ tmp10 += tmp11 - tmp3;
+ tmp11 = MULTIPLY(tmp0 + tmp2, FIX(1.197448846)) + /* c5 */
+ MULTIPLY(tmp4 + tmp6, FIX(0.752406978)); /* c9 */
+ dataptr[5] = (DCTELEM)
+ DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(2.373959773)) /* c3+c5-c13 */
+ + MULTIPLY(tmp4, FIX(1.119999435)), /* c1+c11-c9 */
+ CONST_BITS);
+ tmp12 = MULTIPLY(tmp0 + tmp1, FIX(1.334852607)) + /* c3 */
+ MULTIPLY(tmp5 - tmp6, FIX(0.467085129)); /* c11 */
+ dataptr[3] = (DCTELEM)
+ DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.424103948)) /* c3-c9-c13 */
+ - MULTIPLY(tmp5, FIX(3.069855259)), /* c1+c5+c11 */
+ CONST_BITS);
+ dataptr[1] = (DCTELEM)
+ DESCALE(tmp11 + tmp12 + tmp3 + tmp6 -
+ MULTIPLY(tmp0 + tmp6, FIX(1.126980169)), /* c3+c5-c1 */
+ CONST_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 14)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/14)**2 = 16/49, which we partially
+ * fold into the constant multipliers and final shifting:
+ * cK now represents sqrt(2) * cos(K*pi/28) * 32/49.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*5];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*3];
+ tmp13 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*2];
+ tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*1];
+ tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*0];
+ tmp6 = dataptr[DCTSIZE*6] + dataptr[DCTSIZE*7];
+
+ tmp10 = tmp0 + tmp6;
+ tmp14 = tmp0 - tmp6;
+ tmp11 = tmp1 + tmp5;
+ tmp15 = tmp1 - tmp5;
+ tmp12 = tmp2 + tmp4;
+ tmp16 = tmp2 - tmp4;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*5];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*3];
+ tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*2];
+ tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*1];
+ tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*0];
+ tmp6 = dataptr[DCTSIZE*6] - dataptr[DCTSIZE*7];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12 + tmp13,
+ FIX(0.653061224)), /* 32/49 */
+ CONST_BITS+1);
+ tmp13 += tmp13;
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(0.832106052)) + /* c4 */
+ MULTIPLY(tmp11 - tmp13, FIX(0.205513223)) - /* c12 */
+ MULTIPLY(tmp12 - tmp13, FIX(0.575835255)), /* c8 */
+ CONST_BITS+1);
+
+ tmp10 = MULTIPLY(tmp14 + tmp15, FIX(0.722074570)); /* c6 */
+
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.178337691)) /* c2-c6 */
+ + MULTIPLY(tmp16, FIX(0.400721155)), /* c10 */
+ CONST_BITS+1);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.122795725)) /* c6+c10 */
+ - MULTIPLY(tmp16, FIX(0.900412262)), /* c2 */
+ CONST_BITS+1);
+
+ /* Odd part */
+
+ tmp10 = tmp1 + tmp2;
+ tmp11 = tmp5 - tmp4;
+ dataptr[DCTSIZE*7] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp10 + tmp3 - tmp11 - tmp6,
+ FIX(0.653061224)), /* 32/49 */
+ CONST_BITS+1);
+ tmp3 = MULTIPLY(tmp3 , FIX(0.653061224)); /* 32/49 */
+ tmp10 = MULTIPLY(tmp10, - FIX(0.103406812)); /* -c13 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.917760839)); /* c1 */
+ tmp10 += tmp11 - tmp3;
+ tmp11 = MULTIPLY(tmp0 + tmp2, FIX(0.782007410)) + /* c5 */
+ MULTIPLY(tmp4 + tmp6, FIX(0.491367823)); /* c9 */
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(1.550341076)) /* c3+c5-c13 */
+ + MULTIPLY(tmp4, FIX(0.731428202)), /* c1+c11-c9 */
+ CONST_BITS+1);
+ tmp12 = MULTIPLY(tmp0 + tmp1, FIX(0.871740478)) + /* c3 */
+ MULTIPLY(tmp5 - tmp6, FIX(0.305035186)); /* c11 */
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.276965844)) /* c3-c9-c13 */
+ - MULTIPLY(tmp5, FIX(2.004803435)), /* c1+c5+c11 */
+ CONST_BITS+1);
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp11 + tmp12 + tmp3
+ - MULTIPLY(tmp0, FIX(0.735987049)) /* c3+c5-c1 */
+ - MULTIPLY(tmp6, FIX(0.082925825)), /* c9-c11-c13 */
+ CONST_BITS+1);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -1985,175 +1985,175 @@ jpeg_fdct_14x14 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_15x15 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- INT32 z1, z2, z3;
- DCTELEM workspace[8*7];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT. */
- /* cK represents sqrt(2) * cos(K*pi/30). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[14]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[13]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[12]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[11]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[10]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[9]);
- tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[8]);
- tmp7 = GETJSAMPLE(elemptr[7]);
-
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[14]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[13]);
- tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[12]);
- tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[11]);
- tmp14 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[10]);
- tmp15 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[9]);
- tmp16 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[8]);
-
- z1 = tmp0 + tmp4 + tmp5;
- z2 = tmp1 + tmp3 + tmp6;
- z3 = tmp2 + tmp7;
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM) (z1 + z2 + z3 - 15 * CENTERJSAMPLE);
- z3 += z3;
- dataptr[6] = (DCTELEM)
- DESCALE(MULTIPLY(z1 - z3, FIX(1.144122806)) - /* c6 */
- MULTIPLY(z2 - z3, FIX(0.437016024)), /* c12 */
- CONST_BITS);
- tmp2 += ((tmp1 + tmp4) >> 1) - tmp7 - tmp7;
- z1 = MULTIPLY(tmp3 - tmp2, FIX(1.531135173)) - /* c2+c14 */
- MULTIPLY(tmp6 - tmp2, FIX(2.238241955)); /* c4+c8 */
- z2 = MULTIPLY(tmp5 - tmp2, FIX(0.798468008)) - /* c8-c14 */
- MULTIPLY(tmp0 - tmp2, FIX(0.091361227)); /* c2-c4 */
- z3 = MULTIPLY(tmp0 - tmp3, FIX(1.383309603)) + /* c2 */
- MULTIPLY(tmp6 - tmp5, FIX(0.946293579)) + /* c8 */
- MULTIPLY(tmp1 - tmp4, FIX(0.790569415)); /* (c6+c12)/2 */
-
- dataptr[2] = (DCTELEM) DESCALE(z1 + z3, CONST_BITS);
- dataptr[4] = (DCTELEM) DESCALE(z2 + z3, CONST_BITS);
-
- /* Odd part */
-
- tmp2 = MULTIPLY(tmp10 - tmp12 - tmp13 + tmp15 + tmp16,
- FIX(1.224744871)); /* c5 */
- tmp1 = MULTIPLY(tmp10 - tmp14 - tmp15, FIX(1.344997024)) + /* c3 */
- MULTIPLY(tmp11 - tmp13 - tmp16, FIX(0.831253876)); /* c9 */
- tmp12 = MULTIPLY(tmp12, FIX(1.224744871)); /* c5 */
- tmp4 = MULTIPLY(tmp10 - tmp16, FIX(1.406466353)) + /* c1 */
- MULTIPLY(tmp11 + tmp14, FIX(1.344997024)) + /* c3 */
- MULTIPLY(tmp13 + tmp15, FIX(0.575212477)); /* c11 */
- tmp0 = MULTIPLY(tmp13, FIX(0.475753014)) - /* c7-c11 */
- MULTIPLY(tmp14, FIX(0.513743148)) + /* c3-c9 */
- MULTIPLY(tmp16, FIX(1.700497885)) + tmp4 + tmp12; /* c1+c13 */
- tmp3 = MULTIPLY(tmp10, - FIX(0.355500862)) - /* -(c1-c7) */
- MULTIPLY(tmp11, FIX(2.176250899)) - /* c3+c9 */
- MULTIPLY(tmp15, FIX(0.869244010)) + tmp4 - tmp12; /* c11+c13 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp3, CONST_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 15)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/15)**2 = 64/225, which we partially
- * fold into the constant multipliers and final shifting:
- * cK now represents sqrt(2) * cos(K*pi/30) * 256/225.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*6];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*5];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*4];
- tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*3];
- tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*2];
- tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*1];
- tmp6 = dataptr[DCTSIZE*6] + wsptr[DCTSIZE*0];
- tmp7 = dataptr[DCTSIZE*7];
-
- tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*6];
- tmp11 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*5];
- tmp12 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*4];
- tmp13 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*3];
- tmp14 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*2];
- tmp15 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*1];
- tmp16 = dataptr[DCTSIZE*6] - wsptr[DCTSIZE*0];
-
- z1 = tmp0 + tmp4 + tmp5;
- z2 = tmp1 + tmp3 + tmp6;
- z3 = tmp2 + tmp7;
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(z1 + z2 + z3, FIX(1.137777778)), /* 256/225 */
- CONST_BITS+2);
- z3 += z3;
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(MULTIPLY(z1 - z3, FIX(1.301757503)) - /* c6 */
- MULTIPLY(z2 - z3, FIX(0.497227121)), /* c12 */
- CONST_BITS+2);
- tmp2 += ((tmp1 + tmp4) >> 1) - tmp7 - tmp7;
- z1 = MULTIPLY(tmp3 - tmp2, FIX(1.742091575)) - /* c2+c14 */
- MULTIPLY(tmp6 - tmp2, FIX(2.546621957)); /* c4+c8 */
- z2 = MULTIPLY(tmp5 - tmp2, FIX(0.908479156)) - /* c8-c14 */
- MULTIPLY(tmp0 - tmp2, FIX(0.103948774)); /* c2-c4 */
- z3 = MULTIPLY(tmp0 - tmp3, FIX(1.573898926)) + /* c2 */
- MULTIPLY(tmp6 - tmp5, FIX(1.076671805)) + /* c8 */
- MULTIPLY(tmp1 - tmp4, FIX(0.899492312)); /* (c6+c12)/2 */
-
- dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + z3, CONST_BITS+2);
- dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(z2 + z3, CONST_BITS+2);
-
- /* Odd part */
-
- tmp2 = MULTIPLY(tmp10 - tmp12 - tmp13 + tmp15 + tmp16,
- FIX(1.393487498)); /* c5 */
- tmp1 = MULTIPLY(tmp10 - tmp14 - tmp15, FIX(1.530307725)) + /* c3 */
- MULTIPLY(tmp11 - tmp13 - tmp16, FIX(0.945782187)); /* c9 */
- tmp12 = MULTIPLY(tmp12, FIX(1.393487498)); /* c5 */
- tmp4 = MULTIPLY(tmp10 - tmp16, FIX(1.600246161)) + /* c1 */
- MULTIPLY(tmp11 + tmp14, FIX(1.530307725)) + /* c3 */
- MULTIPLY(tmp13 + tmp15, FIX(0.654463974)); /* c11 */
- tmp0 = MULTIPLY(tmp13, FIX(0.541301207)) - /* c7-c11 */
- MULTIPLY(tmp14, FIX(0.584525538)) + /* c3-c9 */
- MULTIPLY(tmp16, FIX(1.934788705)) + tmp4 + tmp12; /* c1+c13 */
- tmp3 = MULTIPLY(tmp10, - FIX(0.404480980)) - /* -(c1-c7) */
- MULTIPLY(tmp11, FIX(2.476089912)) - /* c3+c9 */
- MULTIPLY(tmp15, FIX(0.989006518)) + tmp4 - tmp12; /* c11+c13 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+2);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+2);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+2);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3, CONST_BITS+2);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ INT32 z1, z2, z3;
+ DCTELEM workspace[8*7];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT. */
+ /* cK represents sqrt(2) * cos(K*pi/30). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[14]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[13]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[12]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[11]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[10]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[9]);
+ tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[8]);
+ tmp7 = GETJSAMPLE(elemptr[7]);
+
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[14]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[13]);
+ tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[12]);
+ tmp13 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[11]);
+ tmp14 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[10]);
+ tmp15 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[9]);
+ tmp16 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[8]);
+
+ z1 = tmp0 + tmp4 + tmp5;
+ z2 = tmp1 + tmp3 + tmp6;
+ z3 = tmp2 + tmp7;
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM) (z1 + z2 + z3 - 15 * CENTERJSAMPLE);
+ z3 += z3;
+ dataptr[6] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 - z3, FIX(1.144122806)) - /* c6 */
+ MULTIPLY(z2 - z3, FIX(0.437016024)), /* c12 */
+ CONST_BITS);
+ tmp2 += ((tmp1 + tmp4) >> 1) - tmp7 - tmp7;
+ z1 = MULTIPLY(tmp3 - tmp2, FIX(1.531135173)) - /* c2+c14 */
+ MULTIPLY(tmp6 - tmp2, FIX(2.238241955)); /* c4+c8 */
+ z2 = MULTIPLY(tmp5 - tmp2, FIX(0.798468008)) - /* c8-c14 */
+ MULTIPLY(tmp0 - tmp2, FIX(0.091361227)); /* c2-c4 */
+ z3 = MULTIPLY(tmp0 - tmp3, FIX(1.383309603)) + /* c2 */
+ MULTIPLY(tmp6 - tmp5, FIX(0.946293579)) + /* c8 */
+ MULTIPLY(tmp1 - tmp4, FIX(0.790569415)); /* (c6+c12)/2 */
+
+ dataptr[2] = (DCTELEM) DESCALE(z1 + z3, CONST_BITS);
+ dataptr[4] = (DCTELEM) DESCALE(z2 + z3, CONST_BITS);
+
+ /* Odd part */
+
+ tmp2 = MULTIPLY(tmp10 - tmp12 - tmp13 + tmp15 + tmp16,
+ FIX(1.224744871)); /* c5 */
+ tmp1 = MULTIPLY(tmp10 - tmp14 - tmp15, FIX(1.344997024)) + /* c3 */
+ MULTIPLY(tmp11 - tmp13 - tmp16, FIX(0.831253876)); /* c9 */
+ tmp12 = MULTIPLY(tmp12, FIX(1.224744871)); /* c5 */
+ tmp4 = MULTIPLY(tmp10 - tmp16, FIX(1.406466353)) + /* c1 */
+ MULTIPLY(tmp11 + tmp14, FIX(1.344997024)) + /* c3 */
+ MULTIPLY(tmp13 + tmp15, FIX(0.575212477)); /* c11 */
+ tmp0 = MULTIPLY(tmp13, FIX(0.475753014)) - /* c7-c11 */
+ MULTIPLY(tmp14, FIX(0.513743148)) + /* c3-c9 */
+ MULTIPLY(tmp16, FIX(1.700497885)) + tmp4 + tmp12; /* c1+c13 */
+ tmp3 = MULTIPLY(tmp10, - FIX(0.355500862)) - /* -(c1-c7) */
+ MULTIPLY(tmp11, FIX(2.176250899)) - /* c3+c9 */
+ MULTIPLY(tmp15, FIX(0.869244010)) + tmp4 - tmp12; /* c11+c13 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp3, CONST_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 15)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/15)**2 = 64/225, which we partially
+ * fold into the constant multipliers and final shifting:
+ * cK now represents sqrt(2) * cos(K*pi/30) * 256/225.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*6];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*5];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*4];
+ tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*3];
+ tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*2];
+ tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*1];
+ tmp6 = dataptr[DCTSIZE*6] + wsptr[DCTSIZE*0];
+ tmp7 = dataptr[DCTSIZE*7];
+
+ tmp10 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*6];
+ tmp11 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*5];
+ tmp12 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*4];
+ tmp13 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*3];
+ tmp14 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*2];
+ tmp15 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*1];
+ tmp16 = dataptr[DCTSIZE*6] - wsptr[DCTSIZE*0];
+
+ z1 = tmp0 + tmp4 + tmp5;
+ z2 = tmp1 + tmp3 + tmp6;
+ z3 = tmp2 + tmp7;
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 + z2 + z3, FIX(1.137777778)), /* 256/225 */
+ CONST_BITS+2);
+ z3 += z3;
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 - z3, FIX(1.301757503)) - /* c6 */
+ MULTIPLY(z2 - z3, FIX(0.497227121)), /* c12 */
+ CONST_BITS+2);
+ tmp2 += ((tmp1 + tmp4) >> 1) - tmp7 - tmp7;
+ z1 = MULTIPLY(tmp3 - tmp2, FIX(1.742091575)) - /* c2+c14 */
+ MULTIPLY(tmp6 - tmp2, FIX(2.546621957)); /* c4+c8 */
+ z2 = MULTIPLY(tmp5 - tmp2, FIX(0.908479156)) - /* c8-c14 */
+ MULTIPLY(tmp0 - tmp2, FIX(0.103948774)); /* c2-c4 */
+ z3 = MULTIPLY(tmp0 - tmp3, FIX(1.573898926)) + /* c2 */
+ MULTIPLY(tmp6 - tmp5, FIX(1.076671805)) + /* c8 */
+ MULTIPLY(tmp1 - tmp4, FIX(0.899492312)); /* (c6+c12)/2 */
+
+ dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + z3, CONST_BITS+2);
+ dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(z2 + z3, CONST_BITS+2);
+
+ /* Odd part */
+
+ tmp2 = MULTIPLY(tmp10 - tmp12 - tmp13 + tmp15 + tmp16,
+ FIX(1.393487498)); /* c5 */
+ tmp1 = MULTIPLY(tmp10 - tmp14 - tmp15, FIX(1.530307725)) + /* c3 */
+ MULTIPLY(tmp11 - tmp13 - tmp16, FIX(0.945782187)); /* c9 */
+ tmp12 = MULTIPLY(tmp12, FIX(1.393487498)); /* c5 */
+ tmp4 = MULTIPLY(tmp10 - tmp16, FIX(1.600246161)) + /* c1 */
+ MULTIPLY(tmp11 + tmp14, FIX(1.530307725)) + /* c3 */
+ MULTIPLY(tmp13 + tmp15, FIX(0.654463974)); /* c11 */
+ tmp0 = MULTIPLY(tmp13, FIX(0.541301207)) - /* c7-c11 */
+ MULTIPLY(tmp14, FIX(0.584525538)) + /* c3-c9 */
+ MULTIPLY(tmp16, FIX(1.934788705)) + tmp4 + tmp12; /* c1+c13 */
+ tmp3 = MULTIPLY(tmp10, - FIX(0.404480980)) - /* -(c1-c7) */
+ MULTIPLY(tmp11, FIX(2.476089912)) - /* c3+c9 */
+ MULTIPLY(tmp15, FIX(0.989006518)) + tmp4 - tmp12; /* c11+c13 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+2);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+2);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+2);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3, CONST_BITS+2);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -2164,202 +2164,202 @@ jpeg_fdct_15x15 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_16x16 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16, tmp17;
- DCTELEM workspace[DCTSIZE2];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* cK represents sqrt(2) * cos(K*pi/32). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[15]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[14]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[13]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[12]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[11]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[10]);
- tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[9]);
- tmp7 = GETJSAMPLE(elemptr[7]) + GETJSAMPLE(elemptr[8]);
-
- tmp10 = tmp0 + tmp7;
- tmp14 = tmp0 - tmp7;
- tmp11 = tmp1 + tmp6;
- tmp15 = tmp1 - tmp6;
- tmp12 = tmp2 + tmp5;
- tmp16 = tmp2 - tmp5;
- tmp13 = tmp3 + tmp4;
- tmp17 = tmp3 - tmp4;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[15]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[14]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[13]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[12]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[11]);
- tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[10]);
- tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[9]);
- tmp7 = GETJSAMPLE(elemptr[7]) - GETJSAMPLE(elemptr[8]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 + tmp12 + tmp13 - 16 * CENTERJSAMPLE) << PASS1_BITS);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
- MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
- CONST_BITS-PASS1_BITS);
-
- tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
- MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- dataptr[2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
- + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+c10 */
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
- - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
- CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
- MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
- MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
- MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
- tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
- MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
- tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
- MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
- tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
- MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
- MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
- tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
- - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
- tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
- + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
- tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
- + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS-PASS1_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS-PASS1_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS-PASS1_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == DCTSIZE * 2)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/16)**2 = 1/2**2.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*4];
- tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*3];
- tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*2];
- tmp6 = dataptr[DCTSIZE*6] + wsptr[DCTSIZE*1];
- tmp7 = dataptr[DCTSIZE*7] + wsptr[DCTSIZE*0];
-
- tmp10 = tmp0 + tmp7;
- tmp14 = tmp0 - tmp7;
- tmp11 = tmp1 + tmp6;
- tmp15 = tmp1 - tmp6;
- tmp12 = tmp2 + tmp5;
- tmp16 = tmp2 - tmp5;
- tmp13 = tmp3 + tmp4;
- tmp17 = tmp3 - tmp4;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*4];
- tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*3];
- tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*2];
- tmp6 = dataptr[DCTSIZE*6] - wsptr[DCTSIZE*1];
- tmp7 = dataptr[DCTSIZE*7] - wsptr[DCTSIZE*0];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(tmp10 + tmp11 + tmp12 + tmp13, PASS1_BITS+2);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
- MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
- CONST_BITS+PASS1_BITS+2);
-
- tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
- MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
- + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+10 */
- CONST_BITS+PASS1_BITS+2);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
- - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
- CONST_BITS+PASS1_BITS+2);
-
- /* Odd part */
-
- tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
- MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
- MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
- MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
- tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
- MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
- tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
- MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
- tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
- MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
- MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
- tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
- - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
- tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
- + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
- tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
- + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+PASS1_BITS+2);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+PASS1_BITS+2);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+PASS1_BITS+2);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+PASS1_BITS+2);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16, tmp17;
+ DCTELEM workspace[DCTSIZE2];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* cK represents sqrt(2) * cos(K*pi/32). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[15]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[14]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[13]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[12]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[11]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[10]);
+ tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[9]);
+ tmp7 = GETJSAMPLE(elemptr[7]) + GETJSAMPLE(elemptr[8]);
+
+ tmp10 = tmp0 + tmp7;
+ tmp14 = tmp0 - tmp7;
+ tmp11 = tmp1 + tmp6;
+ tmp15 = tmp1 - tmp6;
+ tmp12 = tmp2 + tmp5;
+ tmp16 = tmp2 - tmp5;
+ tmp13 = tmp3 + tmp4;
+ tmp17 = tmp3 - tmp4;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[15]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[14]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[13]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[12]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[11]);
+ tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[10]);
+ tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[9]);
+ tmp7 = GETJSAMPLE(elemptr[7]) - GETJSAMPLE(elemptr[8]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 + tmp12 + tmp13 - 16 * CENTERJSAMPLE) << PASS1_BITS);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
+ MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
+ CONST_BITS-PASS1_BITS);
+
+ tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
+ MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
+ + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+c10 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
+ - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
+ MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
+ MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
+ MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
+ tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
+ MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
+ tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
+ MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
+ tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
+ MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
+ MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
+ tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
+ - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
+ tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
+ + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
+ tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
+ + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS-PASS1_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS-PASS1_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS-PASS1_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == DCTSIZE * 2)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/16)**2 = 1/2**2.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*4];
+ tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*3];
+ tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*2];
+ tmp6 = dataptr[DCTSIZE*6] + wsptr[DCTSIZE*1];
+ tmp7 = dataptr[DCTSIZE*7] + wsptr[DCTSIZE*0];
+
+ tmp10 = tmp0 + tmp7;
+ tmp14 = tmp0 - tmp7;
+ tmp11 = tmp1 + tmp6;
+ tmp15 = tmp1 - tmp6;
+ tmp12 = tmp2 + tmp5;
+ tmp16 = tmp2 - tmp5;
+ tmp13 = tmp3 + tmp4;
+ tmp17 = tmp3 - tmp4;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*4];
+ tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*3];
+ tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*2];
+ tmp6 = dataptr[DCTSIZE*6] - wsptr[DCTSIZE*1];
+ tmp7 = dataptr[DCTSIZE*7] - wsptr[DCTSIZE*0];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(tmp10 + tmp11 + tmp12 + tmp13, PASS1_BITS+2);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
+ MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
+ CONST_BITS+PASS1_BITS+2);
+
+ tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
+ MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
+ + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+10 */
+ CONST_BITS+PASS1_BITS+2);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
+ - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
+ CONST_BITS+PASS1_BITS+2);
+
+ /* Odd part */
+
+ tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
+ MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
+ MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
+ MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
+ tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
+ MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
+ tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
+ MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
+ tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
+ MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
+ MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
+ tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
+ - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
+ tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
+ + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
+ tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
+ + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+PASS1_BITS+2);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+PASS1_BITS+2);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+PASS1_BITS+2);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+PASS1_BITS+2);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -2372,175 +2372,175 @@ jpeg_fdct_16x16 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_16x8 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16, tmp17;
- INT32 z1;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* 16-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/32). */
-
- dataptr = data;
- ctr = 0;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[15]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[14]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[13]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[12]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[11]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[10]);
- tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[9]);
- tmp7 = GETJSAMPLE(elemptr[7]) + GETJSAMPLE(elemptr[8]);
-
- tmp10 = tmp0 + tmp7;
- tmp14 = tmp0 - tmp7;
- tmp11 = tmp1 + tmp6;
- tmp15 = tmp1 - tmp6;
- tmp12 = tmp2 + tmp5;
- tmp16 = tmp2 - tmp5;
- tmp13 = tmp3 + tmp4;
- tmp17 = tmp3 - tmp4;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[15]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[14]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[13]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[12]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[11]);
- tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[10]);
- tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[9]);
- tmp7 = GETJSAMPLE(elemptr[7]) - GETJSAMPLE(elemptr[8]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 + tmp12 + tmp13 - 16 * CENTERJSAMPLE) << PASS1_BITS);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
- MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
- CONST_BITS-PASS1_BITS);
-
- tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
- MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- dataptr[2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
- + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+c10 */
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
- - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
- CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
- MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
- MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
- MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
- tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
- MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
- tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
- MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
- tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
- MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
- MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
- tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
- - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
- tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
- + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
- tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
- + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS-PASS1_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS-PASS1_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS-PASS1_BITS);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by 8/16 = 1/2.
- */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part per LL&M figure 1 --- note that published figure is faulty;
- * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
- */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
-
- tmp10 = tmp0 + tmp3;
- tmp12 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp13 = tmp1 - tmp2;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
-
- dataptr[DCTSIZE*0] = (DCTELEM) DESCALE(tmp10 + tmp11, PASS1_BITS+1);
- dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(tmp10 - tmp11, PASS1_BITS+1);
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
- dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + MULTIPLY(tmp12, FIX_0_765366865),
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 - MULTIPLY(tmp13, FIX_1_847759065),
- CONST_BITS+PASS1_BITS+1);
-
- /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
- * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
- * i0..i3 in the paper are tmp0..tmp3 here.
- */
-
- tmp10 = tmp0 + tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp1 + tmp3;
- z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
-
- tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
- tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
- tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
- tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
- tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
- tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
- tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
- tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
-
- tmp12 += z1;
- tmp13 += z1;
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0 + tmp10 + tmp12,
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1 + tmp11 + tmp13,
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2 + tmp11 + tmp12,
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3 + tmp10 + tmp13,
- CONST_BITS+PASS1_BITS+1);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16, tmp17;
+ INT32 z1;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* 16-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/32). */
+
+ dataptr = data;
+ ctr = 0;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[15]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[14]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[13]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[12]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[11]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[10]);
+ tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[9]);
+ tmp7 = GETJSAMPLE(elemptr[7]) + GETJSAMPLE(elemptr[8]);
+
+ tmp10 = tmp0 + tmp7;
+ tmp14 = tmp0 - tmp7;
+ tmp11 = tmp1 + tmp6;
+ tmp15 = tmp1 - tmp6;
+ tmp12 = tmp2 + tmp5;
+ tmp16 = tmp2 - tmp5;
+ tmp13 = tmp3 + tmp4;
+ tmp17 = tmp3 - tmp4;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[15]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[14]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[13]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[12]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[11]);
+ tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[10]);
+ tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[9]);
+ tmp7 = GETJSAMPLE(elemptr[7]) - GETJSAMPLE(elemptr[8]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 + tmp12 + tmp13 - 16 * CENTERJSAMPLE) << PASS1_BITS);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
+ MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
+ CONST_BITS-PASS1_BITS);
+
+ tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
+ MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
+ + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+c10 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
+ - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
+ MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
+ MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
+ MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
+ tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
+ MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
+ tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
+ MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
+ tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
+ MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
+ MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
+ tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
+ - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
+ tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
+ + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
+ tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
+ + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS-PASS1_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS-PASS1_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS-PASS1_BITS);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by 8/16 = 1/2.
+ */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part per LL&M figure 1 --- note that published figure is faulty;
+ * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
+ */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
+
+ tmp10 = tmp0 + tmp3;
+ tmp12 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp13 = tmp1 - tmp2;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
+
+ dataptr[DCTSIZE*0] = (DCTELEM) DESCALE(tmp10 + tmp11, PASS1_BITS+1);
+ dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(tmp10 - tmp11, PASS1_BITS+1);
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
+ dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + MULTIPLY(tmp12, FIX_0_765366865),
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 - MULTIPLY(tmp13, FIX_1_847759065),
+ CONST_BITS+PASS1_BITS+1);
+
+ /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
+ * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
+ * i0..i3 in the paper are tmp0..tmp3 here.
+ */
+
+ tmp10 = tmp0 + tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp1 + tmp3;
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
+
+ tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
+ tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
+ tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
+ tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
+ tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
+ tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
+ tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
+ tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
+
+ tmp12 += z1;
+ tmp13 += z1;
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0 + tmp10 + tmp12,
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1 + tmp11 + tmp13,
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2 + tmp11 + tmp12,
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp3 + tmp10 + tmp13,
+ CONST_BITS+PASS1_BITS+1);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -2553,158 +2553,158 @@ jpeg_fdct_16x8 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_14x7 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- INT32 z1, z2, z3;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Zero bottom row of output coefficient block. */
- MEMZERO(&data[DCTSIZE*7], SIZEOF(DCTELEM) * DCTSIZE);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* 14-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/28). */
-
- dataptr = data;
- for (ctr = 0; ctr < 7; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[13]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[12]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[11]);
- tmp13 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[10]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[9]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[8]);
- tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[7]);
-
- tmp10 = tmp0 + tmp6;
- tmp14 = tmp0 - tmp6;
- tmp11 = tmp1 + tmp5;
- tmp15 = tmp1 - tmp5;
- tmp12 = tmp2 + tmp4;
- tmp16 = tmp2 - tmp4;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[13]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[12]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[11]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[10]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[9]);
- tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[8]);
- tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[7]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 + tmp12 + tmp13 - 14 * CENTERJSAMPLE) << PASS1_BITS);
- tmp13 += tmp13;
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.274162392)) + /* c4 */
- MULTIPLY(tmp11 - tmp13, FIX(0.314692123)) - /* c12 */
- MULTIPLY(tmp12 - tmp13, FIX(0.881747734)), /* c8 */
- CONST_BITS-PASS1_BITS);
-
- tmp10 = MULTIPLY(tmp14 + tmp15, FIX(1.105676686)); /* c6 */
-
- dataptr[2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.273079590)) /* c2-c6 */
- + MULTIPLY(tmp16, FIX(0.613604268)), /* c10 */
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.719280954)) /* c6+c10 */
- - MULTIPLY(tmp16, FIX(1.378756276)), /* c2 */
- CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = tmp1 + tmp2;
- tmp11 = tmp5 - tmp4;
- dataptr[7] = (DCTELEM) ((tmp0 - tmp10 + tmp3 - tmp11 - tmp6) << PASS1_BITS);
- tmp3 <<= CONST_BITS;
- tmp10 = MULTIPLY(tmp10, - FIX(0.158341681)); /* -c13 */
- tmp11 = MULTIPLY(tmp11, FIX(1.405321284)); /* c1 */
- tmp10 += tmp11 - tmp3;
- tmp11 = MULTIPLY(tmp0 + tmp2, FIX(1.197448846)) + /* c5 */
- MULTIPLY(tmp4 + tmp6, FIX(0.752406978)); /* c9 */
- dataptr[5] = (DCTELEM)
- DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(2.373959773)) /* c3+c5-c13 */
- + MULTIPLY(tmp4, FIX(1.119999435)), /* c1+c11-c9 */
- CONST_BITS-PASS1_BITS);
- tmp12 = MULTIPLY(tmp0 + tmp1, FIX(1.334852607)) + /* c3 */
- MULTIPLY(tmp5 - tmp6, FIX(0.467085129)); /* c11 */
- dataptr[3] = (DCTELEM)
- DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.424103948)) /* c3-c9-c13 */
- - MULTIPLY(tmp5, FIX(3.069855259)), /* c1+c5+c11 */
- CONST_BITS-PASS1_BITS);
- dataptr[1] = (DCTELEM)
- DESCALE(tmp11 + tmp12 + tmp3 + tmp6 -
- MULTIPLY(tmp0 + tmp6, FIX(1.126980169)), /* c3+c5-c1 */
- CONST_BITS-PASS1_BITS);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/14)*(8/7) = 32/49, which we
- * partially fold into the constant multipliers and final shifting:
- * 7-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/14) * 64/49.
- */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*6];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*5];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*4];
- tmp3 = dataptr[DCTSIZE*3];
-
- tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*6];
- tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*5];
- tmp12 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*4];
-
- z1 = tmp0 + tmp2;
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(z1 + tmp1 + tmp3, FIX(1.306122449)), /* 64/49 */
- CONST_BITS+PASS1_BITS+1);
- tmp3 += tmp3;
- z1 -= tmp3;
- z1 -= tmp3;
- z1 = MULTIPLY(z1, FIX(0.461784020)); /* (c2+c6-c4)/2 */
- z2 = MULTIPLY(tmp0 - tmp2, FIX(1.202428084)); /* (c2+c4-c6)/2 */
- z3 = MULTIPLY(tmp1 - tmp2, FIX(0.411026446)); /* c6 */
- dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS+PASS1_BITS+1);
- z1 -= z2;
- z2 = MULTIPLY(tmp0 - tmp1, FIX(1.151670509)); /* c4 */
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.923568041)), /* c2+c6-c4 */
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS+PASS1_BITS+1);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.221765677)); /* (c3+c1-c5)/2 */
- tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.222383464)); /* (c3+c5-c1)/2 */
- tmp0 = tmp1 - tmp2;
- tmp1 += tmp2;
- tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.800824523)); /* -c1 */
- tmp1 += tmp2;
- tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.801442310)); /* c5 */
- tmp0 += tmp3;
- tmp2 += tmp3 + MULTIPLY(tmp12, FIX(2.443531355)); /* c3+c1-c5 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+PASS1_BITS+1);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ INT32 z1, z2, z3;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Zero bottom row of output coefficient block. */
+ MEMZERO(&data[DCTSIZE*7], SIZEOF(DCTELEM) * DCTSIZE);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* 14-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/28). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 7; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[13]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[12]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[11]);
+ tmp13 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[10]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[9]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[8]);
+ tmp6 = GETJSAMPLE(elemptr[6]) + GETJSAMPLE(elemptr[7]);
+
+ tmp10 = tmp0 + tmp6;
+ tmp14 = tmp0 - tmp6;
+ tmp11 = tmp1 + tmp5;
+ tmp15 = tmp1 - tmp5;
+ tmp12 = tmp2 + tmp4;
+ tmp16 = tmp2 - tmp4;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[13]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[12]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[11]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[10]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[9]);
+ tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[8]);
+ tmp6 = GETJSAMPLE(elemptr[6]) - GETJSAMPLE(elemptr[7]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 + tmp12 + tmp13 - 14 * CENTERJSAMPLE) << PASS1_BITS);
+ tmp13 += tmp13;
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.274162392)) + /* c4 */
+ MULTIPLY(tmp11 - tmp13, FIX(0.314692123)) - /* c12 */
+ MULTIPLY(tmp12 - tmp13, FIX(0.881747734)), /* c8 */
+ CONST_BITS-PASS1_BITS);
+
+ tmp10 = MULTIPLY(tmp14 + tmp15, FIX(1.105676686)); /* c6 */
+
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.273079590)) /* c2-c6 */
+ + MULTIPLY(tmp16, FIX(0.613604268)), /* c10 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.719280954)) /* c6+c10 */
+ - MULTIPLY(tmp16, FIX(1.378756276)), /* c2 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = tmp1 + tmp2;
+ tmp11 = tmp5 - tmp4;
+ dataptr[7] = (DCTELEM) ((tmp0 - tmp10 + tmp3 - tmp11 - tmp6) << PASS1_BITS);
+ tmp3 <<= CONST_BITS;
+ tmp10 = MULTIPLY(tmp10, - FIX(0.158341681)); /* -c13 */
+ tmp11 = MULTIPLY(tmp11, FIX(1.405321284)); /* c1 */
+ tmp10 += tmp11 - tmp3;
+ tmp11 = MULTIPLY(tmp0 + tmp2, FIX(1.197448846)) + /* c5 */
+ MULTIPLY(tmp4 + tmp6, FIX(0.752406978)); /* c9 */
+ dataptr[5] = (DCTELEM)
+ DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(2.373959773)) /* c3+c5-c13 */
+ + MULTIPLY(tmp4, FIX(1.119999435)), /* c1+c11-c9 */
+ CONST_BITS-PASS1_BITS);
+ tmp12 = MULTIPLY(tmp0 + tmp1, FIX(1.334852607)) + /* c3 */
+ MULTIPLY(tmp5 - tmp6, FIX(0.467085129)); /* c11 */
+ dataptr[3] = (DCTELEM)
+ DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.424103948)) /* c3-c9-c13 */
+ - MULTIPLY(tmp5, FIX(3.069855259)), /* c1+c5+c11 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[1] = (DCTELEM)
+ DESCALE(tmp11 + tmp12 + tmp3 + tmp6 -
+ MULTIPLY(tmp0 + tmp6, FIX(1.126980169)), /* c3+c5-c1 */
+ CONST_BITS-PASS1_BITS);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/14)*(8/7) = 32/49, which we
+ * partially fold into the constant multipliers and final shifting:
+ * 7-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/14) * 64/49.
+ */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*6];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*5];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*4];
+ tmp3 = dataptr[DCTSIZE*3];
+
+ tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*6];
+ tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*5];
+ tmp12 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*4];
+
+ z1 = tmp0 + tmp2;
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(z1 + tmp1 + tmp3, FIX(1.306122449)), /* 64/49 */
+ CONST_BITS+PASS1_BITS+1);
+ tmp3 += tmp3;
+ z1 -= tmp3;
+ z1 -= tmp3;
+ z1 = MULTIPLY(z1, FIX(0.461784020)); /* (c2+c6-c4)/2 */
+ z2 = MULTIPLY(tmp0 - tmp2, FIX(1.202428084)); /* (c2+c4-c6)/2 */
+ z3 = MULTIPLY(tmp1 - tmp2, FIX(0.411026446)); /* c6 */
+ dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS+PASS1_BITS+1);
+ z1 -= z2;
+ z2 = MULTIPLY(tmp0 - tmp1, FIX(1.151670509)); /* c4 */
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.923568041)), /* c2+c6-c4 */
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS+PASS1_BITS+1);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(1.221765677)); /* (c3+c1-c5)/2 */
+ tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.222383464)); /* (c3+c5-c1)/2 */
+ tmp0 = tmp1 - tmp2;
+ tmp1 += tmp2;
+ tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.800824523)); /* -c1 */
+ tmp1 += tmp2;
+ tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.801442310)); /* c5 */
+ tmp0 += tmp3;
+ tmp2 += tmp3 + MULTIPLY(tmp12, FIX(2.443531355)); /* c3+c1-c5 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp0, CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp1, CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp2, CONST_BITS+PASS1_BITS+1);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -2717,133 +2717,133 @@ jpeg_fdct_14x7 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_12x6 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Zero 2 bottom rows of output coefficient block. */
- MEMZERO(&data[DCTSIZE*6], SIZEOF(DCTELEM) * DCTSIZE * 2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* 12-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/24). */
-
- dataptr = data;
- for (ctr = 0; ctr < 6; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[11]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[10]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[9]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[8]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[7]);
- tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[6]);
-
- tmp10 = tmp0 + tmp5;
- tmp13 = tmp0 - tmp5;
- tmp11 = tmp1 + tmp4;
- tmp14 = tmp1 - tmp4;
- tmp12 = tmp2 + tmp3;
- tmp15 = tmp2 - tmp3;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[11]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[10]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[9]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[8]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[7]);
- tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[6]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 + tmp12 - 12 * CENTERJSAMPLE) << PASS1_BITS);
- dataptr[6] = (DCTELEM) ((tmp13 - tmp14 - tmp15) << PASS1_BITS);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.224744871)), /* c4 */
- CONST_BITS-PASS1_BITS);
- dataptr[2] = (DCTELEM)
- DESCALE(tmp14 - tmp15 + MULTIPLY(tmp13 + tmp15, FIX(1.366025404)), /* c2 */
- CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp1 + tmp4, FIX_0_541196100); /* c9 */
- tmp14 = tmp10 + MULTIPLY(tmp1, FIX_0_765366865); /* c3-c9 */
- tmp15 = tmp10 - MULTIPLY(tmp4, FIX_1_847759065); /* c3+c9 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.121971054)); /* c5 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.860918669)); /* c7 */
- tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.580774953)) /* c5+c7-c1 */
- + MULTIPLY(tmp5, FIX(0.184591911)); /* c11 */
- tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.184591911)); /* -c11 */
- tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.339493912)) /* c1+c5-c11 */
- + MULTIPLY(tmp5, FIX(0.860918669)); /* c7 */
- tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.725788011)) /* c1+c11-c7 */
- - MULTIPLY(tmp5, FIX(1.121971054)); /* c5 */
- tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.306562965)) /* c3 */
- - MULTIPLY(tmp2 + tmp5, FIX_0_541196100); /* c9 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS-PASS1_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS-PASS1_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS-PASS1_BITS);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/12)*(8/6) = 8/9, which we
- * partially fold into the constant multipliers and final shifting:
- * 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12) * 16/9.
- */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*5];
- tmp11 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*3];
-
- tmp10 = tmp0 + tmp2;
- tmp12 = tmp0 - tmp2;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*5];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*3];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp12, FIX(2.177324216)), /* c2 */
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(1.257078722)), /* c4 */
- CONST_BITS+PASS1_BITS+1);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp0 + tmp2, FIX(0.650711829)); /* c5 */
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp1 - tmp2, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp2 - tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS+1);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Zero 2 bottom rows of output coefficient block. */
+ MEMZERO(&data[DCTSIZE*6], SIZEOF(DCTELEM) * DCTSIZE * 2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* 12-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/24). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 6; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[11]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[10]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[9]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[8]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[7]);
+ tmp5 = GETJSAMPLE(elemptr[5]) + GETJSAMPLE(elemptr[6]);
+
+ tmp10 = tmp0 + tmp5;
+ tmp13 = tmp0 - tmp5;
+ tmp11 = tmp1 + tmp4;
+ tmp14 = tmp1 - tmp4;
+ tmp12 = tmp2 + tmp3;
+ tmp15 = tmp2 - tmp3;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[11]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[10]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[9]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[8]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[7]);
+ tmp5 = GETJSAMPLE(elemptr[5]) - GETJSAMPLE(elemptr[6]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 + tmp12 - 12 * CENTERJSAMPLE) << PASS1_BITS);
+ dataptr[6] = (DCTELEM) ((tmp13 - tmp14 - tmp15) << PASS1_BITS);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.224744871)), /* c4 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp14 - tmp15 + MULTIPLY(tmp13 + tmp15, FIX(1.366025404)), /* c2 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp1 + tmp4, FIX_0_541196100); /* c9 */
+ tmp14 = tmp10 + MULTIPLY(tmp1, FIX_0_765366865); /* c3-c9 */
+ tmp15 = tmp10 - MULTIPLY(tmp4, FIX_1_847759065); /* c3+c9 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.121971054)); /* c5 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.860918669)); /* c7 */
+ tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.580774953)) /* c5+c7-c1 */
+ + MULTIPLY(tmp5, FIX(0.184591911)); /* c11 */
+ tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.184591911)); /* -c11 */
+ tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.339493912)) /* c1+c5-c11 */
+ + MULTIPLY(tmp5, FIX(0.860918669)); /* c7 */
+ tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.725788011)) /* c1+c11-c7 */
+ - MULTIPLY(tmp5, FIX(1.121971054)); /* c5 */
+ tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.306562965)) /* c3 */
+ - MULTIPLY(tmp2 + tmp5, FIX_0_541196100); /* c9 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp10, CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp11, CONST_BITS-PASS1_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp12, CONST_BITS-PASS1_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp13, CONST_BITS-PASS1_BITS);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/12)*(8/6) = 8/9, which we
+ * partially fold into the constant multipliers and final shifting:
+ * 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12) * 16/9.
+ */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*5];
+ tmp11 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*3];
+
+ tmp10 = tmp0 + tmp2;
+ tmp12 = tmp0 - tmp2;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*5];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*3];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp12, FIX(2.177324216)), /* c2 */
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(1.257078722)), /* c4 */
+ CONST_BITS+PASS1_BITS+1);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp0 + tmp2, FIX(0.650711829)); /* c5 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp1 - tmp2, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp2 - tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS+1);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -2856,126 +2856,126 @@ jpeg_fdct_12x6 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_10x5 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Zero 3 bottom rows of output coefficient block. */
- MEMZERO(&data[DCTSIZE*5], SIZEOF(DCTELEM) * DCTSIZE * 3);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* 10-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/20). */
-
- dataptr = data;
- for (ctr = 0; ctr < 5; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[9]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[8]);
- tmp12 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[7]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[6]);
- tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[5]);
-
- tmp10 = tmp0 + tmp4;
- tmp13 = tmp0 - tmp4;
- tmp11 = tmp1 + tmp3;
- tmp14 = tmp1 - tmp3;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[9]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[8]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[7]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[6]);
- tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[5]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 + tmp12 - 10 * CENTERJSAMPLE) << PASS1_BITS);
- tmp12 += tmp12;
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.144122806)) - /* c4 */
- MULTIPLY(tmp11 - tmp12, FIX(0.437016024)), /* c8 */
- CONST_BITS-PASS1_BITS);
- tmp10 = MULTIPLY(tmp13 + tmp14, FIX(0.831253876)); /* c6 */
- dataptr[2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.513743148)), /* c2-c6 */
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.176250899)), /* c2+c6 */
- CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = tmp0 + tmp4;
- tmp11 = tmp1 - tmp3;
- dataptr[5] = (DCTELEM) ((tmp10 - tmp11 - tmp2) << PASS1_BITS);
- tmp2 <<= CONST_BITS;
- dataptr[1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0, FIX(1.396802247)) + /* c1 */
- MULTIPLY(tmp1, FIX(1.260073511)) + tmp2 + /* c3 */
- MULTIPLY(tmp3, FIX(0.642039522)) + /* c7 */
- MULTIPLY(tmp4, FIX(0.221231742)), /* c9 */
- CONST_BITS-PASS1_BITS);
- tmp12 = MULTIPLY(tmp0 - tmp4, FIX(0.951056516)) - /* (c3+c7)/2 */
- MULTIPLY(tmp1 + tmp3, FIX(0.587785252)); /* (c1-c9)/2 */
- tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.309016994)) + /* (c3-c7)/2 */
- (tmp11 << (CONST_BITS - 1)) - tmp2;
- dataptr[3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS-PASS1_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS-PASS1_BITS);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/10)*(8/5) = 32/25, which we
- * fold into the constant multipliers:
- * 5-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/10) * 32/25.
- */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*4];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*3];
- tmp2 = dataptr[DCTSIZE*2];
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*4];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*3];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp2, FIX(1.28)), /* 32/25 */
- CONST_BITS+PASS1_BITS);
- tmp11 = MULTIPLY(tmp11, FIX(1.011928851)); /* (c2+c4)/2 */
- tmp10 -= tmp2 << 2;
- tmp10 = MULTIPLY(tmp10, FIX(0.452548340)); /* (c2-c4)/2 */
- dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp0 + tmp1, FIX(1.064004961)); /* c3 */
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.657591230)), /* c1-c3 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.785601151)), /* c1+c3 */
- CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Zero 3 bottom rows of output coefficient block. */
+ MEMZERO(&data[DCTSIZE*5], SIZEOF(DCTELEM) * DCTSIZE * 3);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* 10-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/20). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 5; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[9]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[8]);
+ tmp12 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[7]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[6]);
+ tmp4 = GETJSAMPLE(elemptr[4]) + GETJSAMPLE(elemptr[5]);
+
+ tmp10 = tmp0 + tmp4;
+ tmp13 = tmp0 - tmp4;
+ tmp11 = tmp1 + tmp3;
+ tmp14 = tmp1 - tmp3;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[9]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[8]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[7]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[6]);
+ tmp4 = GETJSAMPLE(elemptr[4]) - GETJSAMPLE(elemptr[5]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 + tmp12 - 10 * CENTERJSAMPLE) << PASS1_BITS);
+ tmp12 += tmp12;
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.144122806)) - /* c4 */
+ MULTIPLY(tmp11 - tmp12, FIX(0.437016024)), /* c8 */
+ CONST_BITS-PASS1_BITS);
+ tmp10 = MULTIPLY(tmp13 + tmp14, FIX(0.831253876)); /* c6 */
+ dataptr[2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.513743148)), /* c2-c6 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.176250899)), /* c2+c6 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = tmp0 + tmp4;
+ tmp11 = tmp1 - tmp3;
+ dataptr[5] = (DCTELEM) ((tmp10 - tmp11 - tmp2) << PASS1_BITS);
+ tmp2 <<= CONST_BITS;
+ dataptr[1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0, FIX(1.396802247)) + /* c1 */
+ MULTIPLY(tmp1, FIX(1.260073511)) + tmp2 + /* c3 */
+ MULTIPLY(tmp3, FIX(0.642039522)) + /* c7 */
+ MULTIPLY(tmp4, FIX(0.221231742)), /* c9 */
+ CONST_BITS-PASS1_BITS);
+ tmp12 = MULTIPLY(tmp0 - tmp4, FIX(0.951056516)) - /* (c3+c7)/2 */
+ MULTIPLY(tmp1 + tmp3, FIX(0.587785252)); /* (c1-c9)/2 */
+ tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.309016994)) + /* (c3-c7)/2 */
+ (tmp11 << (CONST_BITS - 1)) - tmp2;
+ dataptr[3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS-PASS1_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS-PASS1_BITS);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/10)*(8/5) = 32/25, which we
+ * fold into the constant multipliers:
+ * 5-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/10) * 32/25.
+ */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*4];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*3];
+ tmp2 = dataptr[DCTSIZE*2];
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*4];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*3];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp2, FIX(1.28)), /* 32/25 */
+ CONST_BITS+PASS1_BITS);
+ tmp11 = MULTIPLY(tmp11, FIX(1.011928851)); /* (c2+c4)/2 */
+ tmp10 -= tmp2 << 2;
+ tmp10 = MULTIPLY(tmp10, FIX(0.452548340)); /* (c2-c4)/2 */
+ dataptr[DCTSIZE*2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp0 + tmp1, FIX(1.064004961)); /* c3 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.657591230)), /* c1-c3 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.785601151)), /* c1+c3 */
+ CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -2988,130 +2988,130 @@ jpeg_fdct_10x5 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_8x4 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- INT32 tmp10, tmp11, tmp12, tmp13;
- INT32 z1;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Zero 4 bottom rows of output coefficient block. */
- MEMZERO(&data[DCTSIZE*4], SIZEOF(DCTELEM) * DCTSIZE * 4);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We must also scale the output by 8/4 = 2, which we add here. */
-
- dataptr = data;
- for (ctr = 0; ctr < 4; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part per LL&M figure 1 --- note that published figure is faulty;
- * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
- */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
-
- tmp10 = tmp0 + tmp3;
- tmp12 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp13 = tmp1 - tmp2;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 - 8 * CENTERJSAMPLE) << (PASS1_BITS+1));
- dataptr[4] = (DCTELEM) ((tmp10 - tmp11) << (PASS1_BITS+1));
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-2);
- dataptr[2] = (DCTELEM) RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865),
- CONST_BITS-PASS1_BITS-1);
- dataptr[6] = (DCTELEM) RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065),
- CONST_BITS-PASS1_BITS-1);
-
- /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
- * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
- * i0..i3 in the paper are tmp0..tmp3 here.
- */
-
- tmp10 = tmp0 + tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp1 + tmp3;
- z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-2);
-
- tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
- tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
- tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
- tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
- tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
- tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
- tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
- tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
-
- tmp12 += z1;
- tmp13 += z1;
-
- dataptr[1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS-PASS1_BITS-1);
- dataptr[3] = (DCTELEM)
- RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS-PASS1_BITS-1);
- dataptr[5] = (DCTELEM)
- RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS-PASS1_BITS-1);
- dataptr[7] = (DCTELEM)
- RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS-PASS1_BITS-1);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * 4-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
- */
-
- dataptr = data;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*3] + (ONE << (PASS1_BITS-1));
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*2];
-
- tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*3];
- tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*2];
-
- dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp0 + tmp1, PASS1_BITS);
- dataptr[DCTSIZE*2] = (DCTELEM) RIGHT_SHIFT(tmp0 - tmp1, PASS1_BITS);
-
- /* Odd part */
-
- tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS+PASS1_BITS-1);
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
- CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ INT32 tmp10, tmp11, tmp12, tmp13;
+ INT32 z1;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Zero 4 bottom rows of output coefficient block. */
+ MEMZERO(&data[DCTSIZE*4], SIZEOF(DCTELEM) * DCTSIZE * 4);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We must also scale the output by 8/4 = 2, which we add here. */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 4; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part per LL&M figure 1 --- note that published figure is faulty;
+ * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
+ */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
+
+ tmp10 = tmp0 + tmp3;
+ tmp12 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp13 = tmp1 - tmp2;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 - 8 * CENTERJSAMPLE) << (PASS1_BITS+1));
+ dataptr[4] = (DCTELEM) ((tmp10 - tmp11) << (PASS1_BITS+1));
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-2);
+ dataptr[2] = (DCTELEM) RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865),
+ CONST_BITS-PASS1_BITS-1);
+ dataptr[6] = (DCTELEM) RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065),
+ CONST_BITS-PASS1_BITS-1);
+
+ /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
+ * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
+ * i0..i3 in the paper are tmp0..tmp3 here.
+ */
+
+ tmp10 = tmp0 + tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp1 + tmp3;
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-2);
+
+ tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
+ tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
+ tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
+ tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
+ tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
+ tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
+ tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
+ tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
+
+ tmp12 += z1;
+ tmp13 += z1;
+
+ dataptr[1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS-PASS1_BITS-1);
+ dataptr[3] = (DCTELEM)
+ RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS-PASS1_BITS-1);
+ dataptr[5] = (DCTELEM)
+ RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS-PASS1_BITS-1);
+ dataptr[7] = (DCTELEM)
+ RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS-PASS1_BITS-1);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * 4-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
+ */
+
+ dataptr = data;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*3] + (ONE << (PASS1_BITS-1));
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*2];
+
+ tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*3];
+ tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*2];
+
+ dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp0 + tmp1, PASS1_BITS);
+ dataptr[DCTSIZE*2] = (DCTELEM) RIGHT_SHIFT(tmp0 - tmp1, PASS1_BITS);
+
+ /* Odd part */
+
+ tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS+PASS1_BITS-1);
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -3124,94 +3124,94 @@ jpeg_fdct_8x4 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_6x3 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2;
- INT32 tmp10, tmp11, tmp12;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We scale the results further by 2 as part of output adaption */
- /* scaling for different DCT size. */
- /* 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12). */
-
- dataptr = data;
- for (ctr = 0; ctr < 3; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[5]);
- tmp11 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[4]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[3]);
-
- tmp10 = tmp0 + tmp2;
- tmp12 = tmp0 - tmp2;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[5]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[4]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[3]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 - 6 * CENTERJSAMPLE) << (PASS1_BITS+1));
- dataptr[2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp12, FIX(1.224744871)), /* c2 */
- CONST_BITS-PASS1_BITS-1);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(0.707106781)), /* c4 */
- CONST_BITS-PASS1_BITS-1);
-
- /* Odd part */
-
- tmp10 = DESCALE(MULTIPLY(tmp0 + tmp2, FIX(0.366025404)), /* c5 */
- CONST_BITS-PASS1_BITS-1);
-
- dataptr[1] = (DCTELEM) (tmp10 + ((tmp0 + tmp1) << (PASS1_BITS+1)));
- dataptr[3] = (DCTELEM) ((tmp0 - tmp1 - tmp2) << (PASS1_BITS+1));
- dataptr[5] = (DCTELEM) (tmp10 + ((tmp2 - tmp1) << (PASS1_BITS+1)));
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/6)*(8/3) = 32/9, which we partially
- * fold into the constant multipliers (other part was done in pass 1):
- * 3-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/6) * 16/9.
- */
-
- dataptr = data;
- for (ctr = 0; ctr < 6; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*2];
- tmp1 = dataptr[DCTSIZE*1];
-
- tmp2 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*2];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(1.257078722)), /* c2 */
- CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp2, FIX(2.177324216)), /* c1 */
- CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2;
+ INT32 tmp10, tmp11, tmp12;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We scale the results further by 2 as part of output adaption */
+ /* scaling for different DCT size. */
+ /* 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 3; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[5]);
+ tmp11 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[4]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[3]);
+
+ tmp10 = tmp0 + tmp2;
+ tmp12 = tmp0 - tmp2;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[5]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[4]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[3]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 - 6 * CENTERJSAMPLE) << (PASS1_BITS+1));
+ dataptr[2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp12, FIX(1.224744871)), /* c2 */
+ CONST_BITS-PASS1_BITS-1);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(0.707106781)), /* c4 */
+ CONST_BITS-PASS1_BITS-1);
+
+ /* Odd part */
+
+ tmp10 = DESCALE(MULTIPLY(tmp0 + tmp2, FIX(0.366025404)), /* c5 */
+ CONST_BITS-PASS1_BITS-1);
+
+ dataptr[1] = (DCTELEM) (tmp10 + ((tmp0 + tmp1) << (PASS1_BITS+1)));
+ dataptr[3] = (DCTELEM) ((tmp0 - tmp1 - tmp2) << (PASS1_BITS+1));
+ dataptr[5] = (DCTELEM) (tmp10 + ((tmp2 - tmp1) << (PASS1_BITS+1)));
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/6)*(8/3) = 32/9, which we partially
+ * fold into the constant multipliers (other part was done in pass 1):
+ * 3-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/6) * 16/9.
+ */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 6; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*2];
+ tmp1 = dataptr[DCTSIZE*1];
+
+ tmp2 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*2];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(1.257078722)), /* c2 */
+ CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp2, FIX(2.177324216)), /* c1 */
+ CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -3224,77 +3224,77 @@ jpeg_fdct_6x3 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_4x2 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1;
- INT32 tmp10, tmp11;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
+ INT32 tmp0, tmp1;
+ INT32 tmp10, tmp11;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We must also scale the output by (8/4)*(8/2) = 2**3, which we add here. */
- /* 4-point FDCT kernel, */
- /* cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point FDCT]. */
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We must also scale the output by (8/4)*(8/2) = 2**3, which we add here. */
+ /* 4-point FDCT kernel, */
+ /* cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point FDCT]. */
- dataptr = data;
- for (ctr = 0; ctr < 2; ctr++) {
- elemptr = sample_data[ctr] + start_col;
+ dataptr = data;
+ for (ctr = 0; ctr < 2; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
- /* Even part */
+ /* Even part */
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[3]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[2]);
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[3]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[2]);
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[3]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[2]);
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[3]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[2]);
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp0 + tmp1 - 4 * CENTERJSAMPLE) << (PASS1_BITS+3));
- dataptr[2] = (DCTELEM) ((tmp0 - tmp1) << (PASS1_BITS+3));
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp0 + tmp1 - 4 * CENTERJSAMPLE) << (PASS1_BITS+3));
+ dataptr[2] = (DCTELEM) ((tmp0 - tmp1) << (PASS1_BITS+3));
- /* Odd part */
+ /* Odd part */
- tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-4);
+ tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-4);
- dataptr[1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
- CONST_BITS-PASS1_BITS-3);
- dataptr[3] = (DCTELEM)
- RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
- CONST_BITS-PASS1_BITS-3);
+ dataptr[1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS-PASS1_BITS-3);
+ dataptr[3] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS-PASS1_BITS-3);
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- */
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ */
- dataptr = data;
- for (ctr = 0; ctr < 4; ctr++) {
- /* Even part */
+ dataptr = data;
+ for (ctr = 0; ctr < 4; ctr++) {
+ /* Even part */
- /* Add fudge factor here for final descale. */
- tmp0 = dataptr[DCTSIZE*0] + (ONE << (PASS1_BITS-1));
- tmp1 = dataptr[DCTSIZE*1];
+ /* Add fudge factor here for final descale. */
+ tmp0 = dataptr[DCTSIZE*0] + (ONE << (PASS1_BITS-1));
+ tmp1 = dataptr[DCTSIZE*1];
- dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp0 + tmp1, PASS1_BITS);
+ dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp0 + tmp1, PASS1_BITS);
- /* Odd part */
+ /* Odd part */
- dataptr[DCTSIZE*1] = (DCTELEM) RIGHT_SHIFT(tmp0 - tmp1, PASS1_BITS);
+ dataptr[DCTSIZE*1] = (DCTELEM) RIGHT_SHIFT(tmp0 - tmp1, PASS1_BITS);
- dataptr++; /* advance pointer to next column */
- }
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -3307,27 +3307,27 @@ jpeg_fdct_4x2 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_2x1 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1;
- JSAMPROW elemptr;
+ INT32 tmp0, tmp1;
+ JSAMPROW elemptr;
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
- elemptr = sample_data[0] + start_col;
+ elemptr = sample_data[0] + start_col;
- tmp0 = GETJSAMPLE(elemptr[0]);
- tmp1 = GETJSAMPLE(elemptr[1]);
+ tmp0 = GETJSAMPLE(elemptr[0]);
+ tmp1 = GETJSAMPLE(elemptr[1]);
- /* We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/2)*(8/1) = 2**5.
- */
+ /* We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/2)*(8/1) = 2**5.
+ */
- /* Even part */
- /* Apply unsigned->signed conversion */
- data[0] = (DCTELEM) ((tmp0 + tmp1 - 2 * CENTERJSAMPLE) << 5);
+ /* Even part */
+ /* Apply unsigned->signed conversion */
+ data[0] = (DCTELEM) ((tmp0 + tmp1 - 2 * CENTERJSAMPLE) << 5);
- /* Odd part */
- data[1] = (DCTELEM) ((tmp0 - tmp1) << 5);
+ /* Odd part */
+ data[1] = (DCTELEM) ((tmp0 - tmp1) << 5);
}
@@ -3340,182 +3340,182 @@ jpeg_fdct_2x1 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_8x16 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16, tmp17;
- INT32 z1;
- DCTELEM workspace[DCTSIZE2];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part per LL&M figure 1 --- note that published figure is faulty;
- * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
- */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
- tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
-
- tmp10 = tmp0 + tmp3;
- tmp12 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp13 = tmp1 - tmp2;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
- tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM) ((tmp10 + tmp11 - 8 * CENTERJSAMPLE) << PASS1_BITS);
- dataptr[4] = (DCTELEM) ((tmp10 - tmp11) << PASS1_BITS);
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
- dataptr[2] = (DCTELEM) DESCALE(z1 + MULTIPLY(tmp12, FIX_0_765366865),
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM) DESCALE(z1 - MULTIPLY(tmp13, FIX_1_847759065),
- CONST_BITS-PASS1_BITS);
-
- /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
- * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
- * i0..i3 in the paper are tmp0..tmp3 here.
- */
-
- tmp10 = tmp0 + tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp1 + tmp3;
- z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
-
- tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
- tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
- tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
- tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
- tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
- tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
- tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
- tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
-
- tmp12 += z1;
- tmp13 += z1;
-
- dataptr[1] = (DCTELEM) DESCALE(tmp0 + tmp10 + tmp12, CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp1 + tmp11 + tmp13, CONST_BITS-PASS1_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp2 + tmp11 + tmp12, CONST_BITS-PASS1_BITS);
- dataptr[7] = (DCTELEM) DESCALE(tmp3 + tmp10 + tmp13, CONST_BITS-PASS1_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == DCTSIZE * 2)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by 8/16 = 1/2.
- * 16-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/32).
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*4];
- tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*3];
- tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*2];
- tmp6 = dataptr[DCTSIZE*6] + wsptr[DCTSIZE*1];
- tmp7 = dataptr[DCTSIZE*7] + wsptr[DCTSIZE*0];
-
- tmp10 = tmp0 + tmp7;
- tmp14 = tmp0 - tmp7;
- tmp11 = tmp1 + tmp6;
- tmp15 = tmp1 - tmp6;
- tmp12 = tmp2 + tmp5;
- tmp16 = tmp2 - tmp5;
- tmp13 = tmp3 + tmp4;
- tmp17 = tmp3 - tmp4;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*4];
- tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*3];
- tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*2];
- tmp6 = dataptr[DCTSIZE*6] - wsptr[DCTSIZE*1];
- tmp7 = dataptr[DCTSIZE*7] - wsptr[DCTSIZE*0];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(tmp10 + tmp11 + tmp12 + tmp13, PASS1_BITS+1);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
- MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
- CONST_BITS+PASS1_BITS+1);
-
- tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
- MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
- + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+c10 */
- CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
- - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
- CONST_BITS+PASS1_BITS+1);
-
- /* Odd part */
-
- tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
- MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
- MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
- MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
- tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
- MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
- tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
- MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
- tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
- MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
- MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
- tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
- - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
- tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
- + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
- tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
- + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+PASS1_BITS+1);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+PASS1_BITS+1);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16, tmp17;
+ INT32 z1;
+ DCTELEM workspace[DCTSIZE2];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part per LL&M figure 1 --- note that published figure is faulty;
+ * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
+ */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[7]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[6]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[5]);
+ tmp3 = GETJSAMPLE(elemptr[3]) + GETJSAMPLE(elemptr[4]);
+
+ tmp10 = tmp0 + tmp3;
+ tmp12 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp13 = tmp1 - tmp2;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[7]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[6]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[5]);
+ tmp3 = GETJSAMPLE(elemptr[3]) - GETJSAMPLE(elemptr[4]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM) ((tmp10 + tmp11 - 8 * CENTERJSAMPLE) << PASS1_BITS);
+ dataptr[4] = (DCTELEM) ((tmp10 - tmp11) << PASS1_BITS);
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
+ dataptr[2] = (DCTELEM) DESCALE(z1 + MULTIPLY(tmp12, FIX_0_765366865),
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM) DESCALE(z1 - MULTIPLY(tmp13, FIX_1_847759065),
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
+ * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
+ * i0..i3 in the paper are tmp0..tmp3 here.
+ */
+
+ tmp10 = tmp0 + tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp1 + tmp3;
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
+
+ tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
+ tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
+ tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
+ tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
+ tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
+ tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
+ tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
+ tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
+
+ tmp12 += z1;
+ tmp13 += z1;
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp0 + tmp10 + tmp12, CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp1 + tmp11 + tmp13, CONST_BITS-PASS1_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp2 + tmp11 + tmp12, CONST_BITS-PASS1_BITS);
+ dataptr[7] = (DCTELEM) DESCALE(tmp3 + tmp10 + tmp13, CONST_BITS-PASS1_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == DCTSIZE * 2)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by 8/16 = 1/2.
+ * 16-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/32).
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = DCTSIZE-1; ctr >= 0; ctr--) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*4];
+ tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*3];
+ tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*2];
+ tmp6 = dataptr[DCTSIZE*6] + wsptr[DCTSIZE*1];
+ tmp7 = dataptr[DCTSIZE*7] + wsptr[DCTSIZE*0];
+
+ tmp10 = tmp0 + tmp7;
+ tmp14 = tmp0 - tmp7;
+ tmp11 = tmp1 + tmp6;
+ tmp15 = tmp1 - tmp6;
+ tmp12 = tmp2 + tmp5;
+ tmp16 = tmp2 - tmp5;
+ tmp13 = tmp3 + tmp4;
+ tmp17 = tmp3 - tmp4;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*4];
+ tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*3];
+ tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*2];
+ tmp6 = dataptr[DCTSIZE*6] - wsptr[DCTSIZE*1];
+ tmp7 = dataptr[DCTSIZE*7] - wsptr[DCTSIZE*0];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(tmp10 + tmp11 + tmp12 + tmp13, PASS1_BITS+1);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(1.306562965)) + /* c4[16] = c2[8] */
+ MULTIPLY(tmp11 - tmp12, FIX_0_541196100), /* c12[16] = c6[8] */
+ CONST_BITS+PASS1_BITS+1);
+
+ tmp10 = MULTIPLY(tmp17 - tmp15, FIX(0.275899379)) + /* c14[16] = c7[8] */
+ MULTIPLY(tmp14 - tmp16, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp15, FIX(1.451774982)) /* c6+c14 */
+ + MULTIPLY(tmp16, FIX(2.172734804)), /* c2+c10 */
+ CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(0.211164243)) /* c2-c6 */
+ - MULTIPLY(tmp17, FIX(1.061594338)), /* c10+c14 */
+ CONST_BITS+PASS1_BITS+1);
+
+ /* Odd part */
+
+ tmp11 = MULTIPLY(tmp0 + tmp1, FIX(1.353318001)) + /* c3 */
+ MULTIPLY(tmp6 - tmp7, FIX(0.410524528)); /* c13 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(1.247225013)) + /* c5 */
+ MULTIPLY(tmp5 + tmp7, FIX(0.666655658)); /* c11 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(1.093201867)) + /* c7 */
+ MULTIPLY(tmp4 - tmp7, FIX(0.897167586)); /* c9 */
+ tmp14 = MULTIPLY(tmp1 + tmp2, FIX(0.138617169)) + /* c15 */
+ MULTIPLY(tmp6 - tmp5, FIX(1.407403738)); /* c1 */
+ tmp15 = MULTIPLY(tmp1 + tmp3, - FIX(0.666655658)) + /* -c11 */
+ MULTIPLY(tmp4 + tmp6, - FIX(1.247225013)); /* -c5 */
+ tmp16 = MULTIPLY(tmp2 + tmp3, - FIX(1.353318001)) + /* -c3 */
+ MULTIPLY(tmp5 - tmp4, FIX(0.410524528)); /* c13 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(tmp0, FIX(2.286341144)) + /* c7+c5+c3-c1 */
+ MULTIPLY(tmp7, FIX(0.779653625)); /* c15+c13-c11+c9 */
+ tmp11 += tmp14 + tmp15 + MULTIPLY(tmp1, FIX(0.071888074)) /* c9-c3-c15+c11 */
+ - MULTIPLY(tmp6, FIX(1.663905119)); /* c7+c13+c1-c5 */
+ tmp12 += tmp14 + tmp16 - MULTIPLY(tmp2, FIX(1.125726048)) /* c7+c5+c15-c3 */
+ + MULTIPLY(tmp5, FIX(1.227391138)); /* c9-c11+c1-c13 */
+ tmp13 += tmp15 + tmp16 + MULTIPLY(tmp3, FIX(1.065388962)) /* c15+c3+c11-c7 */
+ + MULTIPLY(tmp4, FIX(2.167985692)); /* c1+c13+c5-c9 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+PASS1_BITS+1);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+PASS1_BITS+1);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -3528,175 +3528,175 @@ jpeg_fdct_8x16 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_7x14 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- INT32 z1, z2, z3;
- DCTELEM workspace[8*6];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* 7-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/14). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[6]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[5]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[4]);
- tmp3 = GETJSAMPLE(elemptr[3]);
-
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[6]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[5]);
- tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[4]);
-
- z1 = tmp0 + tmp2;
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((z1 + tmp1 + tmp3 - 7 * CENTERJSAMPLE) << PASS1_BITS);
- tmp3 += tmp3;
- z1 -= tmp3;
- z1 -= tmp3;
- z1 = MULTIPLY(z1, FIX(0.353553391)); /* (c2+c6-c4)/2 */
- z2 = MULTIPLY(tmp0 - tmp2, FIX(0.920609002)); /* (c2+c4-c6)/2 */
- z3 = MULTIPLY(tmp1 - tmp2, FIX(0.314692123)); /* c6 */
- dataptr[2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS-PASS1_BITS);
- z1 -= z2;
- z2 = MULTIPLY(tmp0 - tmp1, FIX(0.881747734)); /* c4 */
- dataptr[4] = (DCTELEM)
- DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.707106781)), /* c2+c6-c4 */
- CONST_BITS-PASS1_BITS);
- dataptr[6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp1 = MULTIPLY(tmp10 + tmp11, FIX(0.935414347)); /* (c3+c1-c5)/2 */
- tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.170262339)); /* (c3+c5-c1)/2 */
- tmp0 = tmp1 - tmp2;
- tmp1 += tmp2;
- tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.378756276)); /* -c1 */
- tmp1 += tmp2;
- tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.613604268)); /* c5 */
- tmp0 += tmp3;
- tmp2 += tmp3 + MULTIPLY(tmp12, FIX(1.870828693)); /* c3+c1-c5 */
-
- dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS-PASS1_BITS);
- dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS-PASS1_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 14)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/7)*(8/14) = 32/49, which we
- * fold into the constant multipliers:
- * 14-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/28) * 32/49.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = 0; ctr < 7; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*5];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*3];
- tmp13 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*2];
- tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*1];
- tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*0];
- tmp6 = dataptr[DCTSIZE*6] + dataptr[DCTSIZE*7];
-
- tmp10 = tmp0 + tmp6;
- tmp14 = tmp0 - tmp6;
- tmp11 = tmp1 + tmp5;
- tmp15 = tmp1 - tmp5;
- tmp12 = tmp2 + tmp4;
- tmp16 = tmp2 - tmp4;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*5];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*3];
- tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*2];
- tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*1];
- tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*0];
- tmp6 = dataptr[DCTSIZE*6] - dataptr[DCTSIZE*7];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12 + tmp13,
- FIX(0.653061224)), /* 32/49 */
- CONST_BITS+PASS1_BITS);
- tmp13 += tmp13;
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp13, FIX(0.832106052)) + /* c4 */
- MULTIPLY(tmp11 - tmp13, FIX(0.205513223)) - /* c12 */
- MULTIPLY(tmp12 - tmp13, FIX(0.575835255)), /* c8 */
- CONST_BITS+PASS1_BITS);
-
- tmp10 = MULTIPLY(tmp14 + tmp15, FIX(0.722074570)); /* c6 */
-
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.178337691)) /* c2-c6 */
- + MULTIPLY(tmp16, FIX(0.400721155)), /* c10 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.122795725)) /* c6+c10 */
- - MULTIPLY(tmp16, FIX(0.900412262)), /* c2 */
- CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = tmp1 + tmp2;
- tmp11 = tmp5 - tmp4;
- dataptr[DCTSIZE*7] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp10 + tmp3 - tmp11 - tmp6,
- FIX(0.653061224)), /* 32/49 */
- CONST_BITS+PASS1_BITS);
- tmp3 = MULTIPLY(tmp3 , FIX(0.653061224)); /* 32/49 */
- tmp10 = MULTIPLY(tmp10, - FIX(0.103406812)); /* -c13 */
- tmp11 = MULTIPLY(tmp11, FIX(0.917760839)); /* c1 */
- tmp10 += tmp11 - tmp3;
- tmp11 = MULTIPLY(tmp0 + tmp2, FIX(0.782007410)) + /* c5 */
- MULTIPLY(tmp4 + tmp6, FIX(0.491367823)); /* c9 */
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(1.550341076)) /* c3+c5-c13 */
- + MULTIPLY(tmp4, FIX(0.731428202)), /* c1+c11-c9 */
- CONST_BITS+PASS1_BITS);
- tmp12 = MULTIPLY(tmp0 + tmp1, FIX(0.871740478)) + /* c3 */
- MULTIPLY(tmp5 - tmp6, FIX(0.305035186)); /* c11 */
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.276965844)) /* c3-c9-c13 */
- - MULTIPLY(tmp5, FIX(2.004803435)), /* c1+c5+c11 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp11 + tmp12 + tmp3
- - MULTIPLY(tmp0, FIX(0.735987049)) /* c3+c5-c1 */
- - MULTIPLY(tmp6, FIX(0.082925825)), /* c9-c11-c13 */
- CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ INT32 z1, z2, z3;
+ DCTELEM workspace[8*6];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* 7-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/14). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[6]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[5]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[4]);
+ tmp3 = GETJSAMPLE(elemptr[3]);
+
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[6]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[5]);
+ tmp12 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[4]);
+
+ z1 = tmp0 + tmp2;
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((z1 + tmp1 + tmp3 - 7 * CENTERJSAMPLE) << PASS1_BITS);
+ tmp3 += tmp3;
+ z1 -= tmp3;
+ z1 -= tmp3;
+ z1 = MULTIPLY(z1, FIX(0.353553391)); /* (c2+c6-c4)/2 */
+ z2 = MULTIPLY(tmp0 - tmp2, FIX(0.920609002)); /* (c2+c4-c6)/2 */
+ z3 = MULTIPLY(tmp1 - tmp2, FIX(0.314692123)); /* c6 */
+ dataptr[2] = (DCTELEM) DESCALE(z1 + z2 + z3, CONST_BITS-PASS1_BITS);
+ z1 -= z2;
+ z2 = MULTIPLY(tmp0 - tmp1, FIX(0.881747734)); /* c4 */
+ dataptr[4] = (DCTELEM)
+ DESCALE(z2 + z3 - MULTIPLY(tmp1 - tmp3, FIX(0.707106781)), /* c2+c6-c4 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[6] = (DCTELEM) DESCALE(z1 + z2, CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp1 = MULTIPLY(tmp10 + tmp11, FIX(0.935414347)); /* (c3+c1-c5)/2 */
+ tmp2 = MULTIPLY(tmp10 - tmp11, FIX(0.170262339)); /* (c3+c5-c1)/2 */
+ tmp0 = tmp1 - tmp2;
+ tmp1 += tmp2;
+ tmp2 = MULTIPLY(tmp11 + tmp12, - FIX(1.378756276)); /* -c1 */
+ tmp1 += tmp2;
+ tmp3 = MULTIPLY(tmp10 + tmp12, FIX(0.613604268)); /* c5 */
+ tmp0 += tmp3;
+ tmp2 += tmp3 + MULTIPLY(tmp12, FIX(1.870828693)); /* c3+c1-c5 */
+
+ dataptr[1] = (DCTELEM) DESCALE(tmp0, CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM) DESCALE(tmp1, CONST_BITS-PASS1_BITS);
+ dataptr[5] = (DCTELEM) DESCALE(tmp2, CONST_BITS-PASS1_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 14)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/7)*(8/14) = 32/49, which we
+ * fold into the constant multipliers:
+ * 14-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/28) * 32/49.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 7; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*5];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*3];
+ tmp13 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*2];
+ tmp4 = dataptr[DCTSIZE*4] + wsptr[DCTSIZE*1];
+ tmp5 = dataptr[DCTSIZE*5] + wsptr[DCTSIZE*0];
+ tmp6 = dataptr[DCTSIZE*6] + dataptr[DCTSIZE*7];
+
+ tmp10 = tmp0 + tmp6;
+ tmp14 = tmp0 - tmp6;
+ tmp11 = tmp1 + tmp5;
+ tmp15 = tmp1 - tmp5;
+ tmp12 = tmp2 + tmp4;
+ tmp16 = tmp2 - tmp4;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*5];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*3];
+ tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*2];
+ tmp4 = dataptr[DCTSIZE*4] - wsptr[DCTSIZE*1];
+ tmp5 = dataptr[DCTSIZE*5] - wsptr[DCTSIZE*0];
+ tmp6 = dataptr[DCTSIZE*6] - dataptr[DCTSIZE*7];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12 + tmp13,
+ FIX(0.653061224)), /* 32/49 */
+ CONST_BITS+PASS1_BITS);
+ tmp13 += tmp13;
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp13, FIX(0.832106052)) + /* c4 */
+ MULTIPLY(tmp11 - tmp13, FIX(0.205513223)) - /* c12 */
+ MULTIPLY(tmp12 - tmp13, FIX(0.575835255)), /* c8 */
+ CONST_BITS+PASS1_BITS);
+
+ tmp10 = MULTIPLY(tmp14 + tmp15, FIX(0.722074570)); /* c6 */
+
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp14, FIX(0.178337691)) /* c2-c6 */
+ + MULTIPLY(tmp16, FIX(0.400721155)), /* c10 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp15, FIX(1.122795725)) /* c6+c10 */
+ - MULTIPLY(tmp16, FIX(0.900412262)), /* c2 */
+ CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = tmp1 + tmp2;
+ tmp11 = tmp5 - tmp4;
+ dataptr[DCTSIZE*7] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp10 + tmp3 - tmp11 - tmp6,
+ FIX(0.653061224)), /* 32/49 */
+ CONST_BITS+PASS1_BITS);
+ tmp3 = MULTIPLY(tmp3 , FIX(0.653061224)); /* 32/49 */
+ tmp10 = MULTIPLY(tmp10, - FIX(0.103406812)); /* -c13 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.917760839)); /* c1 */
+ tmp10 += tmp11 - tmp3;
+ tmp11 = MULTIPLY(tmp0 + tmp2, FIX(0.782007410)) + /* c5 */
+ MULTIPLY(tmp4 + tmp6, FIX(0.491367823)); /* c9 */
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(tmp10 + tmp11 - MULTIPLY(tmp2, FIX(1.550341076)) /* c3+c5-c13 */
+ + MULTIPLY(tmp4, FIX(0.731428202)), /* c1+c11-c9 */
+ CONST_BITS+PASS1_BITS);
+ tmp12 = MULTIPLY(tmp0 + tmp1, FIX(0.871740478)) + /* c3 */
+ MULTIPLY(tmp5 - tmp6, FIX(0.305035186)); /* c11 */
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(tmp10 + tmp12 - MULTIPLY(tmp1, FIX(0.276965844)) /* c3-c9-c13 */
+ - MULTIPLY(tmp5, FIX(2.004803435)), /* c1+c5+c11 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp11 + tmp12 + tmp3
+ - MULTIPLY(tmp0, FIX(0.735987049)) /* c3+c5-c1 */
+ - MULTIPLY(tmp6, FIX(0.082925825)), /* c9-c11-c13 */
+ CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -3709,143 +3709,143 @@ jpeg_fdct_7x14 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_6x12 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- DCTELEM workspace[8*4];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[5]);
- tmp11 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[4]);
- tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[3]);
-
- tmp10 = tmp0 + tmp2;
- tmp12 = tmp0 - tmp2;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[5]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[4]);
- tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[3]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp11 - 6 * CENTERJSAMPLE) << PASS1_BITS);
- dataptr[2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp12, FIX(1.224744871)), /* c2 */
- CONST_BITS-PASS1_BITS);
- dataptr[4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(0.707106781)), /* c4 */
- CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = DESCALE(MULTIPLY(tmp0 + tmp2, FIX(0.366025404)), /* c5 */
- CONST_BITS-PASS1_BITS);
-
- dataptr[1] = (DCTELEM) (tmp10 + ((tmp0 + tmp1) << PASS1_BITS));
- dataptr[3] = (DCTELEM) ((tmp0 - tmp1 - tmp2) << PASS1_BITS);
- dataptr[5] = (DCTELEM) (tmp10 + ((tmp2 - tmp1) << PASS1_BITS));
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 12)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/6)*(8/12) = 8/9, which we
- * fold into the constant multipliers:
- * 12-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/24) * 8/9.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = 0; ctr < 6; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*3];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*2];
- tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*1];
- tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*0];
- tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*7];
- tmp5 = dataptr[DCTSIZE*5] + dataptr[DCTSIZE*6];
-
- tmp10 = tmp0 + tmp5;
- tmp13 = tmp0 - tmp5;
- tmp11 = tmp1 + tmp4;
- tmp14 = tmp1 - tmp4;
- tmp12 = tmp2 + tmp3;
- tmp15 = tmp2 - tmp3;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*3];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*2];
- tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*1];
- tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*0];
- tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*7];
- tmp5 = dataptr[DCTSIZE*5] - dataptr[DCTSIZE*6];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(0.888888889)), /* 8/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(MULTIPLY(tmp13 - tmp14 - tmp15, FIX(0.888888889)), /* 8/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.088662108)), /* c4 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp14 - tmp15, FIX(0.888888889)) + /* 8/9 */
- MULTIPLY(tmp13 + tmp15, FIX(1.214244803)), /* c2 */
- CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp1 + tmp4, FIX(0.481063200)); /* c9 */
- tmp14 = tmp10 + MULTIPLY(tmp1, FIX(0.680326102)); /* c3-c9 */
- tmp15 = tmp10 - MULTIPLY(tmp4, FIX(1.642452502)); /* c3+c9 */
- tmp12 = MULTIPLY(tmp0 + tmp2, FIX(0.997307603)); /* c5 */
- tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.765261039)); /* c7 */
- tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.516244403)) /* c5+c7-c1 */
- + MULTIPLY(tmp5, FIX(0.164081699)); /* c11 */
- tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.164081699)); /* -c11 */
- tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.079550144)) /* c1+c5-c11 */
- + MULTIPLY(tmp5, FIX(0.765261039)); /* c7 */
- tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.645144899)) /* c1+c11-c7 */
- - MULTIPLY(tmp5, FIX(0.997307603)); /* c5 */
- tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.161389302)) /* c3 */
- - MULTIPLY(tmp2 + tmp5, FIX(0.481063200)); /* c9 */
-
- dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ DCTELEM workspace[8*4];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[5]);
+ tmp11 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[4]);
+ tmp2 = GETJSAMPLE(elemptr[2]) + GETJSAMPLE(elemptr[3]);
+
+ tmp10 = tmp0 + tmp2;
+ tmp12 = tmp0 - tmp2;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[5]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[4]);
+ tmp2 = GETJSAMPLE(elemptr[2]) - GETJSAMPLE(elemptr[3]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp11 - 6 * CENTERJSAMPLE) << PASS1_BITS);
+ dataptr[2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp12, FIX(1.224744871)), /* c2 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(0.707106781)), /* c4 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = DESCALE(MULTIPLY(tmp0 + tmp2, FIX(0.366025404)), /* c5 */
+ CONST_BITS-PASS1_BITS);
+
+ dataptr[1] = (DCTELEM) (tmp10 + ((tmp0 + tmp1) << PASS1_BITS));
+ dataptr[3] = (DCTELEM) ((tmp0 - tmp1 - tmp2) << PASS1_BITS);
+ dataptr[5] = (DCTELEM) (tmp10 + ((tmp2 - tmp1) << PASS1_BITS));
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 12)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/6)*(8/12) = 8/9, which we
+ * fold into the constant multipliers:
+ * 12-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/24) * 8/9.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 6; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*3];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*2];
+ tmp2 = dataptr[DCTSIZE*2] + wsptr[DCTSIZE*1];
+ tmp3 = dataptr[DCTSIZE*3] + wsptr[DCTSIZE*0];
+ tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*7];
+ tmp5 = dataptr[DCTSIZE*5] + dataptr[DCTSIZE*6];
+
+ tmp10 = tmp0 + tmp5;
+ tmp13 = tmp0 - tmp5;
+ tmp11 = tmp1 + tmp4;
+ tmp14 = tmp1 - tmp4;
+ tmp12 = tmp2 + tmp3;
+ tmp15 = tmp2 - tmp3;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*3];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*2];
+ tmp2 = dataptr[DCTSIZE*2] - wsptr[DCTSIZE*1];
+ tmp3 = dataptr[DCTSIZE*3] - wsptr[DCTSIZE*0];
+ tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*7];
+ tmp5 = dataptr[DCTSIZE*5] - dataptr[DCTSIZE*6];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(0.888888889)), /* 8/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp13 - tmp14 - tmp15, FIX(0.888888889)), /* 8/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.088662108)), /* c4 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp14 - tmp15, FIX(0.888888889)) + /* 8/9 */
+ MULTIPLY(tmp13 + tmp15, FIX(1.214244803)), /* c2 */
+ CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp1 + tmp4, FIX(0.481063200)); /* c9 */
+ tmp14 = tmp10 + MULTIPLY(tmp1, FIX(0.680326102)); /* c3-c9 */
+ tmp15 = tmp10 - MULTIPLY(tmp4, FIX(1.642452502)); /* c3+c9 */
+ tmp12 = MULTIPLY(tmp0 + tmp2, FIX(0.997307603)); /* c5 */
+ tmp13 = MULTIPLY(tmp0 + tmp3, FIX(0.765261039)); /* c7 */
+ tmp10 = tmp12 + tmp13 + tmp14 - MULTIPLY(tmp0, FIX(0.516244403)) /* c5+c7-c1 */
+ + MULTIPLY(tmp5, FIX(0.164081699)); /* c11 */
+ tmp11 = MULTIPLY(tmp2 + tmp3, - FIX(0.164081699)); /* -c11 */
+ tmp12 += tmp11 - tmp15 - MULTIPLY(tmp2, FIX(2.079550144)) /* c1+c5-c11 */
+ + MULTIPLY(tmp5, FIX(0.765261039)); /* c7 */
+ tmp13 += tmp11 - tmp14 + MULTIPLY(tmp3, FIX(0.645144899)) /* c1+c11-c7 */
+ - MULTIPLY(tmp5, FIX(0.997307603)); /* c5 */
+ tmp11 = tmp15 + MULTIPLY(tmp0 - tmp3, FIX(1.161389302)) /* c3 */
+ - MULTIPLY(tmp2 + tmp5, FIX(0.481063200)); /* c9 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM) DESCALE(tmp10, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp11, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*5] = (DCTELEM) DESCALE(tmp12, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp13, CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -3858,140 +3858,140 @@ jpeg_fdct_6x12 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_5x10 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- DCTELEM workspace[8*2];
- DCTELEM *dataptr;
- DCTELEM *wsptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* 5-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/10). */
-
- dataptr = data;
- ctr = 0;
- for (;;) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[4]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[3]);
- tmp2 = GETJSAMPLE(elemptr[2]);
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
-
- tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[4]);
- tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[3]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp10 + tmp2 - 5 * CENTERJSAMPLE) << PASS1_BITS);
- tmp11 = MULTIPLY(tmp11, FIX(0.790569415)); /* (c2+c4)/2 */
- tmp10 -= tmp2 << 2;
- tmp10 = MULTIPLY(tmp10, FIX(0.353553391)); /* (c2-c4)/2 */
- dataptr[2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS-PASS1_BITS);
- dataptr[4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS-PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp0 + tmp1, FIX(0.831253876)); /* c3 */
-
- dataptr[1] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.513743148)), /* c1-c3 */
- CONST_BITS-PASS1_BITS);
- dataptr[3] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.176250899)), /* c1+c3 */
- CONST_BITS-PASS1_BITS);
-
- ctr++;
-
- if (ctr != DCTSIZE) {
- if (ctr == 10)
- break; /* Done. */
- dataptr += DCTSIZE; /* advance pointer to next row */
- } else
- dataptr = workspace; /* switch pointer to extended workspace */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/5)*(8/10) = 32/25, which we
- * fold into the constant multipliers:
- * 10-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/20) * 32/25.
- */
-
- dataptr = data;
- wsptr = workspace;
- for (ctr = 0; ctr < 5; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*1];
- tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*0];
- tmp12 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*7];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*6];
- tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*5];
-
- tmp10 = tmp0 + tmp4;
- tmp13 = tmp0 - tmp4;
- tmp11 = tmp1 + tmp3;
- tmp14 = tmp1 - tmp3;
-
- tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*1];
- tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*0];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*7];
- tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*6];
- tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*5];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(1.28)), /* 32/25 */
- CONST_BITS+PASS1_BITS);
- tmp12 += tmp12;
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.464477191)) - /* c4 */
- MULTIPLY(tmp11 - tmp12, FIX(0.559380511)), /* c8 */
- CONST_BITS+PASS1_BITS);
- tmp10 = MULTIPLY(tmp13 + tmp14, FIX(1.064004961)); /* c6 */
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.657591230)), /* c2-c6 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*6] = (DCTELEM)
- DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.785601151)), /* c2+c6 */
- CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = tmp0 + tmp4;
- tmp11 = tmp1 - tmp3;
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp2, FIX(1.28)), /* 32/25 */
- CONST_BITS+PASS1_BITS);
- tmp2 = MULTIPLY(tmp2, FIX(1.28)); /* 32/25 */
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0, FIX(1.787906876)) + /* c1 */
- MULTIPLY(tmp1, FIX(1.612894094)) + tmp2 + /* c3 */
- MULTIPLY(tmp3, FIX(0.821810588)) + /* c7 */
- MULTIPLY(tmp4, FIX(0.283176630)), /* c9 */
- CONST_BITS+PASS1_BITS);
- tmp12 = MULTIPLY(tmp0 - tmp4, FIX(1.217352341)) - /* (c3+c7)/2 */
- MULTIPLY(tmp1 + tmp3, FIX(0.752365123)); /* (c1-c9)/2 */
- tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.395541753)) + /* (c3-c7)/2 */
- MULTIPLY(tmp11, FIX(0.64)) - tmp2; /* 16/25 */
- dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- wsptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ DCTELEM workspace[8*2];
+ DCTELEM *dataptr;
+ DCTELEM *wsptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* 5-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/10). */
+
+ dataptr = data;
+ ctr = 0;
+ for (;;) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[4]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[3]);
+ tmp2 = GETJSAMPLE(elemptr[2]);
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+
+ tmp0 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[4]);
+ tmp1 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[3]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp10 + tmp2 - 5 * CENTERJSAMPLE) << PASS1_BITS);
+ tmp11 = MULTIPLY(tmp11, FIX(0.790569415)); /* (c2+c4)/2 */
+ tmp10 -= tmp2 << 2;
+ tmp10 = MULTIPLY(tmp10, FIX(0.353553391)); /* (c2-c4)/2 */
+ dataptr[2] = (DCTELEM) DESCALE(tmp11 + tmp10, CONST_BITS-PASS1_BITS);
+ dataptr[4] = (DCTELEM) DESCALE(tmp11 - tmp10, CONST_BITS-PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp0 + tmp1, FIX(0.831253876)); /* c3 */
+
+ dataptr[1] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp0, FIX(0.513743148)), /* c1-c3 */
+ CONST_BITS-PASS1_BITS);
+ dataptr[3] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp1, FIX(2.176250899)), /* c1+c3 */
+ CONST_BITS-PASS1_BITS);
+
+ ctr++;
+
+ if (ctr != DCTSIZE) {
+ if (ctr == 10)
+ break; /* Done. */
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ } else
+ dataptr = workspace; /* switch pointer to extended workspace */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/5)*(8/10) = 32/25, which we
+ * fold into the constant multipliers:
+ * 10-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/20) * 32/25.
+ */
+
+ dataptr = data;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 5; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + wsptr[DCTSIZE*1];
+ tmp1 = dataptr[DCTSIZE*1] + wsptr[DCTSIZE*0];
+ tmp12 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*7];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*6];
+ tmp4 = dataptr[DCTSIZE*4] + dataptr[DCTSIZE*5];
+
+ tmp10 = tmp0 + tmp4;
+ tmp13 = tmp0 - tmp4;
+ tmp11 = tmp1 + tmp3;
+ tmp14 = tmp1 - tmp3;
+
+ tmp0 = dataptr[DCTSIZE*0] - wsptr[DCTSIZE*1];
+ tmp1 = dataptr[DCTSIZE*1] - wsptr[DCTSIZE*0];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*7];
+ tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*6];
+ tmp4 = dataptr[DCTSIZE*4] - dataptr[DCTSIZE*5];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11 + tmp12, FIX(1.28)), /* 32/25 */
+ CONST_BITS+PASS1_BITS);
+ tmp12 += tmp12;
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp12, FIX(1.464477191)) - /* c4 */
+ MULTIPLY(tmp11 - tmp12, FIX(0.559380511)), /* c8 */
+ CONST_BITS+PASS1_BITS);
+ tmp10 = MULTIPLY(tmp13 + tmp14, FIX(1.064004961)); /* c6 */
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp13, FIX(0.657591230)), /* c2-c6 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ DESCALE(tmp10 - MULTIPLY(tmp14, FIX(2.785601151)), /* c2+c6 */
+ CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = tmp0 + tmp4;
+ tmp11 = tmp1 - tmp3;
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp2, FIX(1.28)), /* 32/25 */
+ CONST_BITS+PASS1_BITS);
+ tmp2 = MULTIPLY(tmp2, FIX(1.28)); /* 32/25 */
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0, FIX(1.787906876)) + /* c1 */
+ MULTIPLY(tmp1, FIX(1.612894094)) + tmp2 + /* c3 */
+ MULTIPLY(tmp3, FIX(0.821810588)) + /* c7 */
+ MULTIPLY(tmp4, FIX(0.283176630)), /* c9 */
+ CONST_BITS+PASS1_BITS);
+ tmp12 = MULTIPLY(tmp0 - tmp4, FIX(1.217352341)) - /* (c3+c7)/2 */
+ MULTIPLY(tmp1 + tmp3, FIX(0.752365123)); /* (c1-c9)/2 */
+ tmp13 = MULTIPLY(tmp10 + tmp11, FIX(0.395541753)) + /* (c3-c7)/2 */
+ MULTIPLY(tmp11, FIX(0.64)) - tmp2; /* 16/25 */
+ dataptr[DCTSIZE*3] = (DCTELEM) DESCALE(tmp12 + tmp13, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*7] = (DCTELEM) DESCALE(tmp12 - tmp13, CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ wsptr++; /* advance pointer to next column */
+ }
}
@@ -4004,130 +4004,130 @@ jpeg_fdct_5x10 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_4x8 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- INT32 tmp10, tmp11, tmp12, tmp13;
- INT32 z1;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We must also scale the output by 8/4 = 2, which we add here. */
- /* 4-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16). */
-
- dataptr = data;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[3]);
- tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[2]);
-
- tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[3]);
- tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[2]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp0 + tmp1 - 4 * CENTERJSAMPLE) << (PASS1_BITS+1));
- dataptr[2] = (DCTELEM) ((tmp0 - tmp1) << (PASS1_BITS+1));
-
- /* Odd part */
-
- tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-2);
-
- dataptr[1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
- CONST_BITS-PASS1_BITS-1);
- dataptr[3] = (DCTELEM)
- RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
- CONST_BITS-PASS1_BITS-1);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- */
-
- dataptr = data;
- for (ctr = 0; ctr < 4; ctr++) {
- /* Even part per LL&M figure 1 --- note that published figure is faulty;
- * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
- */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
-
- /* Add fudge factor here for final descale. */
- tmp10 = tmp0 + tmp3 + (ONE << (PASS1_BITS-1));
- tmp12 = tmp0 - tmp3;
- tmp11 = tmp1 + tmp2;
- tmp13 = tmp1 - tmp2;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
- tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
-
- dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp10 + tmp11, PASS1_BITS);
- dataptr[DCTSIZE*4] = (DCTELEM) RIGHT_SHIFT(tmp10 - tmp11, PASS1_BITS);
-
- z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS+PASS1_BITS-1);
- dataptr[DCTSIZE*2] = (DCTELEM)
- RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865), CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*6] = (DCTELEM)
- RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065), CONST_BITS+PASS1_BITS);
-
- /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
- * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
- * i0..i3 in the paper are tmp0..tmp3 here.
- */
-
- tmp10 = tmp0 + tmp3;
- tmp11 = tmp1 + tmp2;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp1 + tmp3;
- z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS+PASS1_BITS-1);
-
- tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
- tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
- tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
- tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
- tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
- tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
- tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
- tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
-
- tmp12 += z1;
- tmp13 += z1;
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*5] = (DCTELEM)
- RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*7] = (DCTELEM)
- RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ INT32 tmp10, tmp11, tmp12, tmp13;
+ INT32 z1;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We must also scale the output by 8/4 = 2, which we add here. */
+ /* 4-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[3]);
+ tmp1 = GETJSAMPLE(elemptr[1]) + GETJSAMPLE(elemptr[2]);
+
+ tmp10 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[3]);
+ tmp11 = GETJSAMPLE(elemptr[1]) - GETJSAMPLE(elemptr[2]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp0 + tmp1 - 4 * CENTERJSAMPLE) << (PASS1_BITS+1));
+ dataptr[2] = (DCTELEM) ((tmp0 - tmp1) << (PASS1_BITS+1));
+
+ /* Odd part */
+
+ tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-2);
+
+ dataptr[1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS-PASS1_BITS-1);
+ dataptr[3] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS-PASS1_BITS-1);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 4; ctr++) {
+ /* Even part per LL&M figure 1 --- note that published figure is faulty;
+ * rotator "sqrt(2)*c1" should be "sqrt(2)*c6".
+ */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] + dataptr[DCTSIZE*4];
+
+ /* Add fudge factor here for final descale. */
+ tmp10 = tmp0 + tmp3 + (ONE << (PASS1_BITS-1));
+ tmp12 = tmp0 - tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp13 = tmp1 - tmp2;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*7];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*6];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*5];
+ tmp3 = dataptr[DCTSIZE*3] - dataptr[DCTSIZE*4];
+
+ dataptr[DCTSIZE*0] = (DCTELEM) RIGHT_SHIFT(tmp10 + tmp11, PASS1_BITS);
+ dataptr[DCTSIZE*4] = (DCTELEM) RIGHT_SHIFT(tmp10 - tmp11, PASS1_BITS);
+
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_0_541196100);
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS+PASS1_BITS-1);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ RIGHT_SHIFT(z1 + MULTIPLY(tmp12, FIX_0_765366865), CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*6] = (DCTELEM)
+ RIGHT_SHIFT(z1 - MULTIPLY(tmp13, FIX_1_847759065), CONST_BITS+PASS1_BITS);
+
+ /* Odd part per figure 8 --- note paper omits factor of sqrt(2).
+ * 8-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
+ * i0..i3 in the paper are tmp0..tmp3 here.
+ */
+
+ tmp10 = tmp0 + tmp3;
+ tmp11 = tmp1 + tmp2;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp1 + tmp3;
+ z1 = MULTIPLY(tmp12 + tmp13, FIX_1_175875602); /* c3 */
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS+PASS1_BITS-1);
+
+ tmp0 = MULTIPLY(tmp0, FIX_1_501321110); /* c1+c3-c5-c7 */
+ tmp1 = MULTIPLY(tmp1, FIX_3_072711026); /* c1+c3+c5-c7 */
+ tmp2 = MULTIPLY(tmp2, FIX_2_053119869); /* c1+c3-c5+c7 */
+ tmp3 = MULTIPLY(tmp3, FIX_0_298631336); /* -c1+c3+c5-c7 */
+ tmp10 = MULTIPLY(tmp10, - FIX_0_899976223); /* c7-c3 */
+ tmp11 = MULTIPLY(tmp11, - FIX_2_562915447); /* -c1-c3 */
+ tmp12 = MULTIPLY(tmp12, - FIX_0_390180644); /* c5-c3 */
+ tmp13 = MULTIPLY(tmp13, - FIX_1_961570560); /* -c3-c5 */
+
+ tmp12 += z1;
+ tmp13 += z1;
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + tmp10 + tmp12, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ RIGHT_SHIFT(tmp1 + tmp11 + tmp13, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ RIGHT_SHIFT(tmp2 + tmp11 + tmp12, CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*7] = (DCTELEM)
+ RIGHT_SHIFT(tmp3 + tmp10 + tmp13, CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -4140,99 +4140,99 @@ jpeg_fdct_4x8 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_3x6 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1, tmp2;
- INT32 tmp10, tmp11, tmp12;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
-
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
-
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
- /* We scale the results further by 2 as part of output adaption */
- /* scaling for different DCT size. */
- /* 3-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/6). */
-
- dataptr = data;
- for (ctr = 0; ctr < 6; ctr++) {
- elemptr = sample_data[ctr] + start_col;
-
- /* Even part */
-
- tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[2]);
- tmp1 = GETJSAMPLE(elemptr[1]);
-
- tmp2 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[2]);
-
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM)
- ((tmp0 + tmp1 - 3 * CENTERJSAMPLE) << (PASS1_BITS+1));
- dataptr[2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(0.707106781)), /* c2 */
- CONST_BITS-PASS1_BITS-1);
-
- /* Odd part */
-
- dataptr[1] = (DCTELEM)
- DESCALE(MULTIPLY(tmp2, FIX(1.224744871)), /* c1 */
- CONST_BITS-PASS1_BITS-1);
-
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
-
- /* Pass 2: process columns.
- * We remove the PASS1_BITS scaling, but leave the results scaled up
- * by an overall factor of 8.
- * We must also scale the output by (8/6)*(8/3) = 32/9, which we partially
- * fold into the constant multipliers (other part was done in pass 1):
- * 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12) * 16/9.
- */
-
- dataptr = data;
- for (ctr = 0; ctr < 3; ctr++) {
- /* Even part */
-
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*5];
- tmp11 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*3];
-
- tmp10 = tmp0 + tmp2;
- tmp12 = tmp0 - tmp2;
-
- tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*5];
- tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*4];
- tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*3];
-
- dataptr[DCTSIZE*0] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 + tmp11, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*2] = (DCTELEM)
- DESCALE(MULTIPLY(tmp12, FIX(2.177324216)), /* c2 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*4] = (DCTELEM)
- DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(1.257078722)), /* c4 */
- CONST_BITS+PASS1_BITS);
-
- /* Odd part */
-
- tmp10 = MULTIPLY(tmp0 + tmp2, FIX(0.650711829)); /* c5 */
-
- dataptr[DCTSIZE*1] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- DESCALE(MULTIPLY(tmp0 - tmp1 - tmp2, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
- dataptr[DCTSIZE*5] = (DCTELEM)
- DESCALE(tmp10 + MULTIPLY(tmp2 - tmp1, FIX(1.777777778)), /* 16/9 */
- CONST_BITS+PASS1_BITS);
-
- dataptr++; /* advance pointer to next column */
- }
+ INT32 tmp0, tmp1, tmp2;
+ INT32 tmp10, tmp11, tmp12;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
+
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+ /* We scale the results further by 2 as part of output adaption */
+ /* scaling for different DCT size. */
+ /* 3-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/6). */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 6; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
+
+ /* Even part */
+
+ tmp0 = GETJSAMPLE(elemptr[0]) + GETJSAMPLE(elemptr[2]);
+ tmp1 = GETJSAMPLE(elemptr[1]);
+
+ tmp2 = GETJSAMPLE(elemptr[0]) - GETJSAMPLE(elemptr[2]);
+
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM)
+ ((tmp0 + tmp1 - 3 * CENTERJSAMPLE) << (PASS1_BITS+1));
+ dataptr[2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp1 - tmp1, FIX(0.707106781)), /* c2 */
+ CONST_BITS-PASS1_BITS-1);
+
+ /* Odd part */
+
+ dataptr[1] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp2, FIX(1.224744871)), /* c1 */
+ CONST_BITS-PASS1_BITS-1);
+
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
+
+ /* Pass 2: process columns.
+ * We remove the PASS1_BITS scaling, but leave the results scaled up
+ * by an overall factor of 8.
+ * We must also scale the output by (8/6)*(8/3) = 32/9, which we partially
+ * fold into the constant multipliers (other part was done in pass 1):
+ * 6-point FDCT kernel, cK represents sqrt(2) * cos(K*pi/12) * 16/9.
+ */
+
+ dataptr = data;
+ for (ctr = 0; ctr < 3; ctr++) {
+ /* Even part */
+
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*5];
+ tmp11 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] + dataptr[DCTSIZE*3];
+
+ tmp10 = tmp0 + tmp2;
+ tmp12 = tmp0 - tmp2;
+
+ tmp0 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*5];
+ tmp1 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*4];
+ tmp2 = dataptr[DCTSIZE*2] - dataptr[DCTSIZE*3];
+
+ dataptr[DCTSIZE*0] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 + tmp11, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*2] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp12, FIX(2.177324216)), /* c2 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*4] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp10 - tmp11 - tmp11, FIX(1.257078722)), /* c4 */
+ CONST_BITS+PASS1_BITS);
+
+ /* Odd part */
+
+ tmp10 = MULTIPLY(tmp0 + tmp2, FIX(0.650711829)); /* c5 */
+
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp0 + tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ DESCALE(MULTIPLY(tmp0 - tmp1 - tmp2, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+ dataptr[DCTSIZE*5] = (DCTELEM)
+ DESCALE(tmp10 + MULTIPLY(tmp2 - tmp1, FIX(1.777777778)), /* 16/9 */
+ CONST_BITS+PASS1_BITS);
+
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -4245,73 +4245,73 @@ jpeg_fdct_3x6 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_2x4 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1;
- INT32 tmp10, tmp11;
- DCTELEM *dataptr;
- JSAMPROW elemptr;
- int ctr;
- SHIFT_TEMPS
+ INT32 tmp0, tmp1;
+ INT32 tmp10, tmp11;
+ DCTELEM *dataptr;
+ JSAMPROW elemptr;
+ int ctr;
+ SHIFT_TEMPS
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
- /* Pass 1: process rows. */
- /* Note results are scaled up by sqrt(8) compared to a true DCT. */
- /* We must also scale the output by (8/2)*(8/4) = 2**3, which we add here. */
+ /* Pass 1: process rows. */
+ /* Note results are scaled up by sqrt(8) compared to a true DCT. */
+ /* We must also scale the output by (8/2)*(8/4) = 2**3, which we add here. */
- dataptr = data;
- for (ctr = 0; ctr < 4; ctr++) {
- elemptr = sample_data[ctr] + start_col;
+ dataptr = data;
+ for (ctr = 0; ctr < 4; ctr++) {
+ elemptr = sample_data[ctr] + start_col;
- /* Even part */
+ /* Even part */
- tmp0 = GETJSAMPLE(elemptr[0]);
- tmp1 = GETJSAMPLE(elemptr[1]);
+ tmp0 = GETJSAMPLE(elemptr[0]);
+ tmp1 = GETJSAMPLE(elemptr[1]);
- /* Apply unsigned->signed conversion */
- dataptr[0] = (DCTELEM) ((tmp0 + tmp1 - 2 * CENTERJSAMPLE) << 3);
+ /* Apply unsigned->signed conversion */
+ dataptr[0] = (DCTELEM) ((tmp0 + tmp1 - 2 * CENTERJSAMPLE) << 3);
- /* Odd part */
+ /* Odd part */
- dataptr[1] = (DCTELEM) ((tmp0 - tmp1) << 3);
+ dataptr[1] = (DCTELEM) ((tmp0 - tmp1) << 3);
- dataptr += DCTSIZE; /* advance pointer to next row */
- }
+ dataptr += DCTSIZE; /* advance pointer to next row */
+ }
- /* Pass 2: process columns.
- * We leave the results scaled up by an overall factor of 8.
- * 4-point FDCT kernel,
- * cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point FDCT].
- */
+ /* Pass 2: process columns.
+ * We leave the results scaled up by an overall factor of 8.
+ * 4-point FDCT kernel,
+ * cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point FDCT].
+ */
- dataptr = data;
- for (ctr = 0; ctr < 2; ctr++) {
- /* Even part */
+ dataptr = data;
+ for (ctr = 0; ctr < 2; ctr++) {
+ /* Even part */
- tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*3];
- tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*2];
+ tmp0 = dataptr[DCTSIZE*0] + dataptr[DCTSIZE*3];
+ tmp1 = dataptr[DCTSIZE*1] + dataptr[DCTSIZE*2];
- tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*3];
- tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*2];
+ tmp10 = dataptr[DCTSIZE*0] - dataptr[DCTSIZE*3];
+ tmp11 = dataptr[DCTSIZE*1] - dataptr[DCTSIZE*2];
- dataptr[DCTSIZE*0] = (DCTELEM) (tmp0 + tmp1);
- dataptr[DCTSIZE*2] = (DCTELEM) (tmp0 - tmp1);
+ dataptr[DCTSIZE*0] = (DCTELEM) (tmp0 + tmp1);
+ dataptr[DCTSIZE*2] = (DCTELEM) (tmp0 - tmp1);
- /* Odd part */
+ /* Odd part */
- tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-1);
+ tmp0 = MULTIPLY(tmp10 + tmp11, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-1);
- dataptr[DCTSIZE*1] = (DCTELEM)
- RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
- CONST_BITS);
- dataptr[DCTSIZE*3] = (DCTELEM)
- RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
- CONST_BITS);
+ dataptr[DCTSIZE*1] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 + MULTIPLY(tmp10, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS);
+ dataptr[DCTSIZE*3] = (DCTELEM)
+ RIGHT_SHIFT(tmp0 - MULTIPLY(tmp11, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS);
- dataptr++; /* advance pointer to next column */
- }
+ dataptr++; /* advance pointer to next column */
+ }
}
@@ -4324,24 +4324,24 @@ jpeg_fdct_2x4 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
GLOBAL(void)
jpeg_fdct_1x2 (DCTELEM * data, JSAMPARRAY sample_data, JDIMENSION start_col)
{
- INT32 tmp0, tmp1;
+ INT32 tmp0, tmp1;
- /* Pre-zero output coefficient block. */
- MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
+ /* Pre-zero output coefficient block. */
+ MEMZERO(data, SIZEOF(DCTELEM) * DCTSIZE2);
- tmp0 = GETJSAMPLE(sample_data[0][start_col]);
- tmp1 = GETJSAMPLE(sample_data[1][start_col]);
+ tmp0 = GETJSAMPLE(sample_data[0][start_col]);
+ tmp1 = GETJSAMPLE(sample_data[1][start_col]);
- /* We leave the results scaled up by an overall factor of 8.
- * We must also scale the output by (8/1)*(8/2) = 2**5.
- */
+ /* We leave the results scaled up by an overall factor of 8.
+ * We must also scale the output by (8/1)*(8/2) = 2**5.
+ */
- /* Even part */
- /* Apply unsigned->signed conversion */
- data[DCTSIZE*0] = (DCTELEM) ((tmp0 + tmp1 - 2 * CENTERJSAMPLE) << 5);
+ /* Even part */
+ /* Apply unsigned->signed conversion */
+ data[DCTSIZE*0] = (DCTELEM) ((tmp0 + tmp1 - 2 * CENTERJSAMPLE) << 5);
- /* Odd part */
- data[DCTSIZE*1] = (DCTELEM) ((tmp0 - tmp1) << 5);
+ /* Odd part */
+ data[DCTSIZE*1] = (DCTELEM) ((tmp0 - tmp1) << 5);
}
#endif /* DCT_SCALING_SUPPORTED */
diff --git a/src/lib/libjpeg/jidctflt.c b/src/lib/libjpeg/jidctflt.c
index ae040eab77e..82391d205cc 100644
--- a/src/lib/libjpeg/jidctflt.c
+++ b/src/lib/libjpeg/jidctflt.c
@@ -40,7 +40,7 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
#ifdef DCT_FLOAT_SUPPORTED
@@ -50,7 +50,7 @@
*/
#if DCTSIZE != 8
- Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
+ Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
#endif
@@ -67,169 +67,169 @@
GLOBAL(void)
jpeg_idct_float (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- FAST_FLOAT tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- FAST_FLOAT tmp10, tmp11, tmp12, tmp13;
- FAST_FLOAT z5, z10, z11, z12, z13;
- JCOEFPTR inptr;
- FLOAT_MULT_TYPE * quantptr;
- FAST_FLOAT * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = cinfo->sample_range_limit;
- int ctr;
- FAST_FLOAT workspace[DCTSIZE2]; /* buffers data between passes */
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (FLOAT_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = DCTSIZE; ctr > 0; ctr--) {
- /* Due to quantization, we will usually find that many of the input
- * coefficients are zero, especially the AC terms. We can exploit this
- * by short-circuiting the IDCT calculation for any column in which all
- * the AC terms are zero. In that case each output is equal to the
- * DC coefficient (with scale factor as needed).
- * With typical images and quantization tables, half or more of the
- * column DCT calculations can be simplified this way.
- */
-
- if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
+ FAST_FLOAT tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ FAST_FLOAT tmp10, tmp11, tmp12, tmp13;
+ FAST_FLOAT z5, z10, z11, z12, z13;
+ JCOEFPTR inptr;
+ FLOAT_MULT_TYPE * quantptr;
+ FAST_FLOAT * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = cinfo->sample_range_limit;
+ int ctr;
+ FAST_FLOAT workspace[DCTSIZE2]; /* buffers data between passes */
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (FLOAT_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = DCTSIZE; ctr > 0; ctr--) {
+ /* Due to quantization, we will usually find that many of the input
+ * coefficients are zero, especially the AC terms. We can exploit this
+ * by short-circuiting the IDCT calculation for any column in which all
+ * the AC terms are zero. In that case each output is equal to the
+ * DC coefficient (with scale factor as needed).
+ * With typical images and quantization tables, half or more of the
+ * column DCT calculations can be simplified this way.
+ */
+
+ if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
inptr[DCTSIZE*3] == 0 && inptr[DCTSIZE*4] == 0 &&
inptr[DCTSIZE*5] == 0 && inptr[DCTSIZE*6] == 0 &&
inptr[DCTSIZE*7] == 0) {
- /* AC terms all zero */
- FAST_FLOAT dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
-
- wsptr[DCTSIZE*0] = dcval;
- wsptr[DCTSIZE*1] = dcval;
- wsptr[DCTSIZE*2] = dcval;
- wsptr[DCTSIZE*3] = dcval;
- wsptr[DCTSIZE*4] = dcval;
- wsptr[DCTSIZE*5] = dcval;
- wsptr[DCTSIZE*6] = dcval;
- wsptr[DCTSIZE*7] = dcval;
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- continue;
- }
-
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- tmp3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp10 = tmp0 + tmp2; /* phase 3 */
- tmp11 = tmp0 - tmp2;
-
- tmp13 = tmp1 + tmp3; /* phases 5-3 */
- tmp12 = (tmp1 - tmp3) * ((FAST_FLOAT) 1.414213562) - tmp13; /* 2*c4 */
-
- tmp0 = tmp10 + tmp13; /* phase 2 */
- tmp3 = tmp10 - tmp13;
- tmp1 = tmp11 + tmp12;
- tmp2 = tmp11 - tmp12;
-
- /* Odd part */
-
- tmp4 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- tmp5 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- tmp6 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp7 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- z13 = tmp6 + tmp5; /* phase 6 */
- z10 = tmp6 - tmp5;
- z11 = tmp4 + tmp7;
- z12 = tmp4 - tmp7;
-
- tmp7 = z11 + z13; /* phase 5 */
- tmp11 = (z11 - z13) * ((FAST_FLOAT) 1.414213562); /* 2*c4 */
-
- z5 = (z10 + z12) * ((FAST_FLOAT) 1.847759065); /* 2*c2 */
- tmp10 = z5 - z12 * ((FAST_FLOAT) 1.082392200); /* 2*(c2-c6) */
- tmp12 = z5 - z10 * ((FAST_FLOAT) 2.613125930); /* 2*(c2+c6) */
-
- tmp6 = tmp12 - tmp7; /* phase 2 */
- tmp5 = tmp11 - tmp6;
- tmp4 = tmp10 - tmp5;
-
- wsptr[DCTSIZE*0] = tmp0 + tmp7;
- wsptr[DCTSIZE*7] = tmp0 - tmp7;
- wsptr[DCTSIZE*1] = tmp1 + tmp6;
- wsptr[DCTSIZE*6] = tmp1 - tmp6;
- wsptr[DCTSIZE*2] = tmp2 + tmp5;
- wsptr[DCTSIZE*5] = tmp2 - tmp5;
- wsptr[DCTSIZE*3] = tmp3 + tmp4;
- wsptr[DCTSIZE*4] = tmp3 - tmp4;
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- }
-
- /* Pass 2: process rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- outptr = output_buf[ctr] + output_col;
- /* Rows of zeroes can be exploited in the same way as we did with columns.
- * However, the column calculation has created many nonzero AC terms, so
- * the simplification applies less often (typically 5% to 10% of the time).
- * And testing floats for zero is relatively expensive, so we don't bother.
- */
-
- /* Even part */
-
- /* Apply signed->unsigned and prepare float->int conversion */
- z5 = wsptr[0] + ((FAST_FLOAT) CENTERJSAMPLE + (FAST_FLOAT) 0.5);
- tmp10 = z5 + wsptr[4];
- tmp11 = z5 - wsptr[4];
-
- tmp13 = wsptr[2] + wsptr[6];
- tmp12 = (wsptr[2] - wsptr[6]) * ((FAST_FLOAT) 1.414213562) - tmp13;
-
- tmp0 = tmp10 + tmp13;
- tmp3 = tmp10 - tmp13;
- tmp1 = tmp11 + tmp12;
- tmp2 = tmp11 - tmp12;
-
- /* Odd part */
-
- z13 = wsptr[5] + wsptr[3];
- z10 = wsptr[5] - wsptr[3];
- z11 = wsptr[1] + wsptr[7];
- z12 = wsptr[1] - wsptr[7];
-
- tmp7 = z11 + z13;
- tmp11 = (z11 - z13) * ((FAST_FLOAT) 1.414213562);
-
- z5 = (z10 + z12) * ((FAST_FLOAT) 1.847759065); /* 2*c2 */
- tmp10 = z5 - z12 * ((FAST_FLOAT) 1.082392200); /* 2*(c2-c6) */
- tmp12 = z5 - z10 * ((FAST_FLOAT) 2.613125930); /* 2*(c2+c6) */
-
- tmp6 = tmp12 - tmp7;
- tmp5 = tmp11 - tmp6;
- tmp4 = tmp10 - tmp5;
-
- /* Final output stage: float->int conversion and range-limit */
-
- outptr[0] = range_limit[((int) (tmp0 + tmp7)) & RANGE_MASK];
- outptr[7] = range_limit[((int) (tmp0 - tmp7)) & RANGE_MASK];
- outptr[1] = range_limit[((int) (tmp1 + tmp6)) & RANGE_MASK];
- outptr[6] = range_limit[((int) (tmp1 - tmp6)) & RANGE_MASK];
- outptr[2] = range_limit[((int) (tmp2 + tmp5)) & RANGE_MASK];
- outptr[5] = range_limit[((int) (tmp2 - tmp5)) & RANGE_MASK];
- outptr[3] = range_limit[((int) (tmp3 + tmp4)) & RANGE_MASK];
- outptr[4] = range_limit[((int) (tmp3 - tmp4)) & RANGE_MASK];
-
- wsptr += DCTSIZE; /* advance pointer to next row */
- }
+ /* AC terms all zero */
+ FAST_FLOAT dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+
+ wsptr[DCTSIZE*0] = dcval;
+ wsptr[DCTSIZE*1] = dcval;
+ wsptr[DCTSIZE*2] = dcval;
+ wsptr[DCTSIZE*3] = dcval;
+ wsptr[DCTSIZE*4] = dcval;
+ wsptr[DCTSIZE*5] = dcval;
+ wsptr[DCTSIZE*6] = dcval;
+ wsptr[DCTSIZE*7] = dcval;
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ continue;
+ }
+
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ tmp3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp10 = tmp0 + tmp2; /* phase 3 */
+ tmp11 = tmp0 - tmp2;
+
+ tmp13 = tmp1 + tmp3; /* phases 5-3 */
+ tmp12 = (tmp1 - tmp3) * ((FAST_FLOAT) 1.414213562) - tmp13; /* 2*c4 */
+
+ tmp0 = tmp10 + tmp13; /* phase 2 */
+ tmp3 = tmp10 - tmp13;
+ tmp1 = tmp11 + tmp12;
+ tmp2 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ tmp4 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ tmp5 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ tmp6 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp7 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ z13 = tmp6 + tmp5; /* phase 6 */
+ z10 = tmp6 - tmp5;
+ z11 = tmp4 + tmp7;
+ z12 = tmp4 - tmp7;
+
+ tmp7 = z11 + z13; /* phase 5 */
+ tmp11 = (z11 - z13) * ((FAST_FLOAT) 1.414213562); /* 2*c4 */
+
+ z5 = (z10 + z12) * ((FAST_FLOAT) 1.847759065); /* 2*c2 */
+ tmp10 = z5 - z12 * ((FAST_FLOAT) 1.082392200); /* 2*(c2-c6) */
+ tmp12 = z5 - z10 * ((FAST_FLOAT) 2.613125930); /* 2*(c2+c6) */
+
+ tmp6 = tmp12 - tmp7; /* phase 2 */
+ tmp5 = tmp11 - tmp6;
+ tmp4 = tmp10 - tmp5;
+
+ wsptr[DCTSIZE*0] = tmp0 + tmp7;
+ wsptr[DCTSIZE*7] = tmp0 - tmp7;
+ wsptr[DCTSIZE*1] = tmp1 + tmp6;
+ wsptr[DCTSIZE*6] = tmp1 - tmp6;
+ wsptr[DCTSIZE*2] = tmp2 + tmp5;
+ wsptr[DCTSIZE*5] = tmp2 - tmp5;
+ wsptr[DCTSIZE*3] = tmp3 + tmp4;
+ wsptr[DCTSIZE*4] = tmp3 - tmp4;
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ }
+
+ /* Pass 2: process rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+ /* Rows of zeroes can be exploited in the same way as we did with columns.
+ * However, the column calculation has created many nonzero AC terms, so
+ * the simplification applies less often (typically 5% to 10% of the time).
+ * And testing floats for zero is relatively expensive, so we don't bother.
+ */
+
+ /* Even part */
+
+ /* Apply signed->unsigned and prepare float->int conversion */
+ z5 = wsptr[0] + ((FAST_FLOAT) CENTERJSAMPLE + (FAST_FLOAT) 0.5);
+ tmp10 = z5 + wsptr[4];
+ tmp11 = z5 - wsptr[4];
+
+ tmp13 = wsptr[2] + wsptr[6];
+ tmp12 = (wsptr[2] - wsptr[6]) * ((FAST_FLOAT) 1.414213562) - tmp13;
+
+ tmp0 = tmp10 + tmp13;
+ tmp3 = tmp10 - tmp13;
+ tmp1 = tmp11 + tmp12;
+ tmp2 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ z13 = wsptr[5] + wsptr[3];
+ z10 = wsptr[5] - wsptr[3];
+ z11 = wsptr[1] + wsptr[7];
+ z12 = wsptr[1] - wsptr[7];
+
+ tmp7 = z11 + z13;
+ tmp11 = (z11 - z13) * ((FAST_FLOAT) 1.414213562);
+
+ z5 = (z10 + z12) * ((FAST_FLOAT) 1.847759065); /* 2*c2 */
+ tmp10 = z5 - z12 * ((FAST_FLOAT) 1.082392200); /* 2*(c2-c6) */
+ tmp12 = z5 - z10 * ((FAST_FLOAT) 2.613125930); /* 2*(c2+c6) */
+
+ tmp6 = tmp12 - tmp7;
+ tmp5 = tmp11 - tmp6;
+ tmp4 = tmp10 - tmp5;
+
+ /* Final output stage: float->int conversion and range-limit */
+
+ outptr[0] = range_limit[((int) (tmp0 + tmp7)) & RANGE_MASK];
+ outptr[7] = range_limit[((int) (tmp0 - tmp7)) & RANGE_MASK];
+ outptr[1] = range_limit[((int) (tmp1 + tmp6)) & RANGE_MASK];
+ outptr[6] = range_limit[((int) (tmp1 - tmp6)) & RANGE_MASK];
+ outptr[2] = range_limit[((int) (tmp2 + tmp5)) & RANGE_MASK];
+ outptr[5] = range_limit[((int) (tmp2 - tmp5)) & RANGE_MASK];
+ outptr[3] = range_limit[((int) (tmp3 + tmp4)) & RANGE_MASK];
+ outptr[4] = range_limit[((int) (tmp3 - tmp4)) & RANGE_MASK];
+
+ wsptr += DCTSIZE; /* advance pointer to next row */
+ }
}
#endif /* DCT_FLOAT_SUPPORTED */
diff --git a/src/lib/libjpeg/jidctfst.c b/src/lib/libjpeg/jidctfst.c
index af3f7733d03..34200f184dc 100644
--- a/src/lib/libjpeg/jidctfst.c
+++ b/src/lib/libjpeg/jidctfst.c
@@ -35,7 +35,7 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
#ifdef DCT_IFAST_SUPPORTED
@@ -45,7 +45,7 @@
*/
#if DCTSIZE != 8
- Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
+ Sorry, this code only copes with 8x8 DCTs. /* deliberate syntax err */
#endif
@@ -78,7 +78,7 @@
#define PASS1_BITS 2
#else
#define CONST_BITS 8
-#define PASS1_BITS 1 /* lose a little precision to avoid overflow */
+#define PASS1_BITS 1 /* lose a little precision to avoid overflow */
#endif
/* Some C compilers fail to reduce "FIX(constant)" at compile time, thus
@@ -89,10 +89,10 @@
*/
#if CONST_BITS == 8
-#define FIX_1_082392200 ((INT32) 277) /* FIX(1.082392200) */
-#define FIX_1_414213562 ((INT32) 362) /* FIX(1.414213562) */
-#define FIX_1_847759065 ((INT32) 473) /* FIX(1.847759065) */
-#define FIX_2_613125930 ((INT32) 669) /* FIX(2.613125930) */
+#define FIX_1_082392200 ((INT32) 277) /* FIX(1.082392200) */
+#define FIX_1_414213562 ((INT32) 362) /* FIX(1.414213562) */
+#define FIX_1_847759065 ((INT32) 473) /* FIX(1.847759065) */
+#define FIX_2_613125930 ((INT32) 669) /* FIX(2.613125930) */
#else
#define FIX_1_082392200 FIX(1.082392200)
#define FIX_1_414213562 FIX(1.414213562)
@@ -138,19 +138,19 @@
*/
#ifdef RIGHT_SHIFT_IS_UNSIGNED
-#define ISHIFT_TEMPS DCTELEM ishift_temp;
+#define ISHIFT_TEMPS DCTELEM ishift_temp;
#if BITS_IN_JSAMPLE == 8
-#define DCTELEMBITS 16 /* DCTELEM may be 16 or 32 bits */
+#define DCTELEMBITS 16 /* DCTELEM may be 16 or 32 bits */
#else
-#define DCTELEMBITS 32 /* DCTELEM must be 32 bits */
+#define DCTELEMBITS 32 /* DCTELEM must be 32 bits */
#endif
#define IRIGHT_SHIFT(x,shft) \
- ((ishift_temp = (x)) < 0 ? \
- (ishift_temp >> (shft)) | ((~((DCTELEM) 0)) << (DCTELEMBITS-(shft))) : \
- (ishift_temp >> (shft)))
+ ((ishift_temp = (x)) < 0 ? \
+ (ishift_temp >> (shft)) | ((~((DCTELEM) 0)) << (DCTELEMBITS-(shft))) : \
+ (ishift_temp >> (shft)))
#else
#define ISHIFT_TEMPS
-#define IRIGHT_SHIFT(x,shft) ((x) >> (shft))
+#define IRIGHT_SHIFT(x,shft) ((x) >> (shft))
#endif
#ifdef USE_ACCURATE_ROUNDING
@@ -166,203 +166,203 @@
GLOBAL(void)
jpeg_idct_ifast (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- DCTELEM tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
- DCTELEM tmp10, tmp11, tmp12, tmp13;
- DCTELEM z5, z10, z11, z12, z13;
- JCOEFPTR inptr;
- IFAST_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[DCTSIZE2]; /* buffers data between passes */
- SHIFT_TEMPS /* for DESCALE */
- ISHIFT_TEMPS /* for IDESCALE */
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (IFAST_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = DCTSIZE; ctr > 0; ctr--) {
- /* Due to quantization, we will usually find that many of the input
- * coefficients are zero, especially the AC terms. We can exploit this
- * by short-circuiting the IDCT calculation for any column in which all
- * the AC terms are zero. In that case each output is equal to the
- * DC coefficient (with scale factor as needed).
- * With typical images and quantization tables, half or more of the
- * column DCT calculations can be simplified this way.
- */
-
- if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
+ DCTELEM tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7;
+ DCTELEM tmp10, tmp11, tmp12, tmp13;
+ DCTELEM z5, z10, z11, z12, z13;
+ JCOEFPTR inptr;
+ IFAST_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[DCTSIZE2]; /* buffers data between passes */
+ SHIFT_TEMPS /* for DESCALE */
+ ISHIFT_TEMPS /* for IDESCALE */
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (IFAST_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = DCTSIZE; ctr > 0; ctr--) {
+ /* Due to quantization, we will usually find that many of the input
+ * coefficients are zero, especially the AC terms. We can exploit this
+ * by short-circuiting the IDCT calculation for any column in which all
+ * the AC terms are zero. In that case each output is equal to the
+ * DC coefficient (with scale factor as needed).
+ * With typical images and quantization tables, half or more of the
+ * column DCT calculations can be simplified this way.
+ */
+
+ if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
inptr[DCTSIZE*3] == 0 && inptr[DCTSIZE*4] == 0 &&
inptr[DCTSIZE*5] == 0 && inptr[DCTSIZE*6] == 0 &&
inptr[DCTSIZE*7] == 0) {
- /* AC terms all zero */
- int dcval = (int) DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
-
- wsptr[DCTSIZE*0] = dcval;
- wsptr[DCTSIZE*1] = dcval;
- wsptr[DCTSIZE*2] = dcval;
- wsptr[DCTSIZE*3] = dcval;
- wsptr[DCTSIZE*4] = dcval;
- wsptr[DCTSIZE*5] = dcval;
- wsptr[DCTSIZE*6] = dcval;
- wsptr[DCTSIZE*7] = dcval;
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- continue;
- }
-
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- tmp3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp10 = tmp0 + tmp2; /* phase 3 */
- tmp11 = tmp0 - tmp2;
-
- tmp13 = tmp1 + tmp3; /* phases 5-3 */
- tmp12 = MULTIPLY(tmp1 - tmp3, FIX_1_414213562) - tmp13; /* 2*c4 */
-
- tmp0 = tmp10 + tmp13; /* phase 2 */
- tmp3 = tmp10 - tmp13;
- tmp1 = tmp11 + tmp12;
- tmp2 = tmp11 - tmp12;
-
- /* Odd part */
-
- tmp4 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- tmp5 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- tmp6 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp7 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- z13 = tmp6 + tmp5; /* phase 6 */
- z10 = tmp6 - tmp5;
- z11 = tmp4 + tmp7;
- z12 = tmp4 - tmp7;
-
- tmp7 = z11 + z13; /* phase 5 */
- tmp11 = MULTIPLY(z11 - z13, FIX_1_414213562); /* 2*c4 */
-
- z5 = MULTIPLY(z10 + z12, FIX_1_847759065); /* 2*c2 */
- tmp10 = MULTIPLY(z12, FIX_1_082392200) - z5; /* 2*(c2-c6) */
- tmp12 = MULTIPLY(z10, - FIX_2_613125930) + z5; /* -2*(c2+c6) */
-
- tmp6 = tmp12 - tmp7; /* phase 2 */
- tmp5 = tmp11 - tmp6;
- tmp4 = tmp10 + tmp5;
-
- wsptr[DCTSIZE*0] = (int) (tmp0 + tmp7);
- wsptr[DCTSIZE*7] = (int) (tmp0 - tmp7);
- wsptr[DCTSIZE*1] = (int) (tmp1 + tmp6);
- wsptr[DCTSIZE*6] = (int) (tmp1 - tmp6);
- wsptr[DCTSIZE*2] = (int) (tmp2 + tmp5);
- wsptr[DCTSIZE*5] = (int) (tmp2 - tmp5);
- wsptr[DCTSIZE*4] = (int) (tmp3 + tmp4);
- wsptr[DCTSIZE*3] = (int) (tmp3 - tmp4);
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- }
-
- /* Pass 2: process rows from work array, store into output array. */
- /* Note that we must descale the results by a factor of 8 == 2**3, */
- /* and also undo the PASS1_BITS scaling. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- outptr = output_buf[ctr] + output_col;
- /* Rows of zeroes can be exploited in the same way as we did with columns.
- * However, the column calculation has created many nonzero AC terms, so
- * the simplification applies less often (typically 5% to 10% of the time).
- * On machines with very fast multiplication, it's possible that the
- * test takes more time than it's worth. In that case this section
- * may be commented out.
- */
+ /* AC terms all zero */
+ int dcval = (int) DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+
+ wsptr[DCTSIZE*0] = dcval;
+ wsptr[DCTSIZE*1] = dcval;
+ wsptr[DCTSIZE*2] = dcval;
+ wsptr[DCTSIZE*3] = dcval;
+ wsptr[DCTSIZE*4] = dcval;
+ wsptr[DCTSIZE*5] = dcval;
+ wsptr[DCTSIZE*6] = dcval;
+ wsptr[DCTSIZE*7] = dcval;
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ continue;
+ }
+
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ tmp3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp10 = tmp0 + tmp2; /* phase 3 */
+ tmp11 = tmp0 - tmp2;
+
+ tmp13 = tmp1 + tmp3; /* phases 5-3 */
+ tmp12 = MULTIPLY(tmp1 - tmp3, FIX_1_414213562) - tmp13; /* 2*c4 */
+
+ tmp0 = tmp10 + tmp13; /* phase 2 */
+ tmp3 = tmp10 - tmp13;
+ tmp1 = tmp11 + tmp12;
+ tmp2 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ tmp4 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ tmp5 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ tmp6 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp7 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ z13 = tmp6 + tmp5; /* phase 6 */
+ z10 = tmp6 - tmp5;
+ z11 = tmp4 + tmp7;
+ z12 = tmp4 - tmp7;
+
+ tmp7 = z11 + z13; /* phase 5 */
+ tmp11 = MULTIPLY(z11 - z13, FIX_1_414213562); /* 2*c4 */
+
+ z5 = MULTIPLY(z10 + z12, FIX_1_847759065); /* 2*c2 */
+ tmp10 = MULTIPLY(z12, FIX_1_082392200) - z5; /* 2*(c2-c6) */
+ tmp12 = MULTIPLY(z10, - FIX_2_613125930) + z5; /* -2*(c2+c6) */
+
+ tmp6 = tmp12 - tmp7; /* phase 2 */
+ tmp5 = tmp11 - tmp6;
+ tmp4 = tmp10 + tmp5;
+
+ wsptr[DCTSIZE*0] = (int) (tmp0 + tmp7);
+ wsptr[DCTSIZE*7] = (int) (tmp0 - tmp7);
+ wsptr[DCTSIZE*1] = (int) (tmp1 + tmp6);
+ wsptr[DCTSIZE*6] = (int) (tmp1 - tmp6);
+ wsptr[DCTSIZE*2] = (int) (tmp2 + tmp5);
+ wsptr[DCTSIZE*5] = (int) (tmp2 - tmp5);
+ wsptr[DCTSIZE*4] = (int) (tmp3 + tmp4);
+ wsptr[DCTSIZE*3] = (int) (tmp3 - tmp4);
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ }
+
+ /* Pass 2: process rows from work array, store into output array. */
+ /* Note that we must descale the results by a factor of 8 == 2**3, */
+ /* and also undo the PASS1_BITS scaling. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+ /* Rows of zeroes can be exploited in the same way as we did with columns.
+ * However, the column calculation has created many nonzero AC terms, so
+ * the simplification applies less often (typically 5% to 10% of the time).
+ * On machines with very fast multiplication, it's possible that the
+ * test takes more time than it's worth. In that case this section
+ * may be commented out.
+ */
#ifndef NO_ZERO_ROW_TEST
- if (wsptr[1] == 0 && wsptr[2] == 0 && wsptr[3] == 0 && wsptr[4] == 0 &&
+ if (wsptr[1] == 0 && wsptr[2] == 0 && wsptr[3] == 0 && wsptr[4] == 0 &&
wsptr[5] == 0 && wsptr[6] == 0 && wsptr[7] == 0) {
- /* AC terms all zero */
- JSAMPLE dcval = range_limit[IDESCALE(wsptr[0], PASS1_BITS+3)
- & RANGE_MASK];
-
- outptr[0] = dcval;
- outptr[1] = dcval;
- outptr[2] = dcval;
- outptr[3] = dcval;
- outptr[4] = dcval;
- outptr[5] = dcval;
- outptr[6] = dcval;
- outptr[7] = dcval;
-
- wsptr += DCTSIZE; /* advance pointer to next row */
- continue;
- }
+ /* AC terms all zero */
+ JSAMPLE dcval = range_limit[IDESCALE(wsptr[0], PASS1_BITS+3)
+ & RANGE_MASK];
+
+ outptr[0] = dcval;
+ outptr[1] = dcval;
+ outptr[2] = dcval;
+ outptr[3] = dcval;
+ outptr[4] = dcval;
+ outptr[5] = dcval;
+ outptr[6] = dcval;
+ outptr[7] = dcval;
+
+ wsptr += DCTSIZE; /* advance pointer to next row */
+ continue;
+ }
#endif
- /* Even part */
-
- tmp10 = ((DCTELEM) wsptr[0] + (DCTELEM) wsptr[4]);
- tmp11 = ((DCTELEM) wsptr[0] - (DCTELEM) wsptr[4]);
-
- tmp13 = ((DCTELEM) wsptr[2] + (DCTELEM) wsptr[6]);
- tmp12 = MULTIPLY((DCTELEM) wsptr[2] - (DCTELEM) wsptr[6], FIX_1_414213562)
- - tmp13;
-
- tmp0 = tmp10 + tmp13;
- tmp3 = tmp10 - tmp13;
- tmp1 = tmp11 + tmp12;
- tmp2 = tmp11 - tmp12;
-
- /* Odd part */
-
- z13 = (DCTELEM) wsptr[5] + (DCTELEM) wsptr[3];
- z10 = (DCTELEM) wsptr[5] - (DCTELEM) wsptr[3];
- z11 = (DCTELEM) wsptr[1] + (DCTELEM) wsptr[7];
- z12 = (DCTELEM) wsptr[1] - (DCTELEM) wsptr[7];
-
- tmp7 = z11 + z13; /* phase 5 */
- tmp11 = MULTIPLY(z11 - z13, FIX_1_414213562); /* 2*c4 */
-
- z5 = MULTIPLY(z10 + z12, FIX_1_847759065); /* 2*c2 */
- tmp10 = MULTIPLY(z12, FIX_1_082392200) - z5; /* 2*(c2-c6) */
- tmp12 = MULTIPLY(z10, - FIX_2_613125930) + z5; /* -2*(c2+c6) */
-
- tmp6 = tmp12 - tmp7; /* phase 2 */
- tmp5 = tmp11 - tmp6;
- tmp4 = tmp10 + tmp5;
-
- /* Final output stage: scale down by a factor of 8 and range-limit */
-
- outptr[0] = range_limit[IDESCALE(tmp0 + tmp7, PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[IDESCALE(tmp0 - tmp7, PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[IDESCALE(tmp1 + tmp6, PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[IDESCALE(tmp1 - tmp6, PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[IDESCALE(tmp2 + tmp5, PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[IDESCALE(tmp2 - tmp5, PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[IDESCALE(tmp3 + tmp4, PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[IDESCALE(tmp3 - tmp4, PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += DCTSIZE; /* advance pointer to next row */
- }
+ /* Even part */
+
+ tmp10 = ((DCTELEM) wsptr[0] + (DCTELEM) wsptr[4]);
+ tmp11 = ((DCTELEM) wsptr[0] - (DCTELEM) wsptr[4]);
+
+ tmp13 = ((DCTELEM) wsptr[2] + (DCTELEM) wsptr[6]);
+ tmp12 = MULTIPLY((DCTELEM) wsptr[2] - (DCTELEM) wsptr[6], FIX_1_414213562)
+ - tmp13;
+
+ tmp0 = tmp10 + tmp13;
+ tmp3 = tmp10 - tmp13;
+ tmp1 = tmp11 + tmp12;
+ tmp2 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ z13 = (DCTELEM) wsptr[5] + (DCTELEM) wsptr[3];
+ z10 = (DCTELEM) wsptr[5] - (DCTELEM) wsptr[3];
+ z11 = (DCTELEM) wsptr[1] + (DCTELEM) wsptr[7];
+ z12 = (DCTELEM) wsptr[1] - (DCTELEM) wsptr[7];
+
+ tmp7 = z11 + z13; /* phase 5 */
+ tmp11 = MULTIPLY(z11 - z13, FIX_1_414213562); /* 2*c4 */
+
+ z5 = MULTIPLY(z10 + z12, FIX_1_847759065); /* 2*c2 */
+ tmp10 = MULTIPLY(z12, FIX_1_082392200) - z5; /* 2*(c2-c6) */
+ tmp12 = MULTIPLY(z10, - FIX_2_613125930) + z5; /* -2*(c2+c6) */
+
+ tmp6 = tmp12 - tmp7; /* phase 2 */
+ tmp5 = tmp11 - tmp6;
+ tmp4 = tmp10 + tmp5;
+
+ /* Final output stage: scale down by a factor of 8 and range-limit */
+
+ outptr[0] = range_limit[IDESCALE(tmp0 + tmp7, PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[IDESCALE(tmp0 - tmp7, PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[IDESCALE(tmp1 + tmp6, PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[IDESCALE(tmp1 - tmp6, PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[IDESCALE(tmp2 + tmp5, PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[IDESCALE(tmp2 - tmp5, PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[IDESCALE(tmp3 + tmp4, PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[IDESCALE(tmp3 - tmp4, PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += DCTSIZE; /* advance pointer to next row */
+ }
}
#endif /* DCT_IFAST_SUPPORTED */
diff --git a/src/lib/libjpeg/jidctint.c b/src/lib/libjpeg/jidctint.c
index 07096b1081f..555861cbc14 100644
--- a/src/lib/libjpeg/jidctint.c
+++ b/src/lib/libjpeg/jidctint.c
@@ -51,7 +51,7 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jdct.h" /* Private declarations for DCT subsystem */
+#include "jdct.h" /* Private declarations for DCT subsystem */
#ifdef DCT_ISLOW_SUPPORTED
@@ -61,7 +61,7 @@
*/
#if DCTSIZE != 8
- Sorry, this code only copes with 8x8 DCT blocks. /* deliberate syntax err */
+ Sorry, this code only copes with 8x8 DCT blocks. /* deliberate syntax err */
#endif
@@ -102,7 +102,7 @@
#define PASS1_BITS 2
#else
#define CONST_BITS 13
-#define PASS1_BITS 1 /* lose a little precision to avoid overflow */
+#define PASS1_BITS 1 /* lose a little precision to avoid overflow */
#endif
/* Some C compilers fail to reduce "FIX(constant)" at compile time, thus
@@ -113,18 +113,18 @@
*/
#if CONST_BITS == 13
-#define FIX_0_298631336 ((INT32) 2446) /* FIX(0.298631336) */
-#define FIX_0_390180644 ((INT32) 3196) /* FIX(0.390180644) */
-#define FIX_0_541196100 ((INT32) 4433) /* FIX(0.541196100) */
-#define FIX_0_765366865 ((INT32) 6270) /* FIX(0.765366865) */
-#define FIX_0_899976223 ((INT32) 7373) /* FIX(0.899976223) */
-#define FIX_1_175875602 ((INT32) 9633) /* FIX(1.175875602) */
-#define FIX_1_501321110 ((INT32) 12299) /* FIX(1.501321110) */
-#define FIX_1_847759065 ((INT32) 15137) /* FIX(1.847759065) */
-#define FIX_1_961570560 ((INT32) 16069) /* FIX(1.961570560) */
-#define FIX_2_053119869 ((INT32) 16819) /* FIX(2.053119869) */
-#define FIX_2_562915447 ((INT32) 20995) /* FIX(2.562915447) */
-#define FIX_3_072711026 ((INT32) 25172) /* FIX(3.072711026) */
+#define FIX_0_298631336 ((INT32) 2446) /* FIX(0.298631336) */
+#define FIX_0_390180644 ((INT32) 3196) /* FIX(0.390180644) */
+#define FIX_0_541196100 ((INT32) 4433) /* FIX(0.541196100) */
+#define FIX_0_765366865 ((INT32) 6270) /* FIX(0.765366865) */
+#define FIX_0_899976223 ((INT32) 7373) /* FIX(0.899976223) */
+#define FIX_1_175875602 ((INT32) 9633) /* FIX(1.175875602) */
+#define FIX_1_501321110 ((INT32) 12299) /* FIX(1.501321110) */
+#define FIX_1_847759065 ((INT32) 15137) /* FIX(1.847759065) */
+#define FIX_1_961570560 ((INT32) 16069) /* FIX(1.961570560) */
+#define FIX_2_053119869 ((INT32) 16819) /* FIX(2.053119869) */
+#define FIX_2_562915447 ((INT32) 20995) /* FIX(2.562915447) */
+#define FIX_3_072711026 ((INT32) 25172) /* FIX(3.072711026) */
#else
#define FIX_0_298631336 FIX(0.298631336)
#define FIX_0_390180644 FIX(0.390180644)
@@ -169,248 +169,248 @@
GLOBAL(void)
jpeg_idct_islow (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- INT32 tmp10, tmp11, tmp12, tmp13;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[DCTSIZE2]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
- /* Note results are scaled up by sqrt(8) compared to a true IDCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = DCTSIZE; ctr > 0; ctr--) {
- /* Due to quantization, we will usually find that many of the input
- * coefficients are zero, especially the AC terms. We can exploit this
- * by short-circuiting the IDCT calculation for any column in which all
- * the AC terms are zero. In that case each output is equal to the
- * DC coefficient (with scale factor as needed).
- * With typical images and quantization tables, half or more of the
- * column DCT calculations can be simplified this way.
- */
-
- if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ INT32 tmp10, tmp11, tmp12, tmp13;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[DCTSIZE2]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+ /* Note results are scaled up by sqrt(8) compared to a true IDCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = DCTSIZE; ctr > 0; ctr--) {
+ /* Due to quantization, we will usually find that many of the input
+ * coefficients are zero, especially the AC terms. We can exploit this
+ * by short-circuiting the IDCT calculation for any column in which all
+ * the AC terms are zero. In that case each output is equal to the
+ * DC coefficient (with scale factor as needed).
+ * With typical images and quantization tables, half or more of the
+ * column DCT calculations can be simplified this way.
+ */
+
+ if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
inptr[DCTSIZE*3] == 0 && inptr[DCTSIZE*4] == 0 &&
inptr[DCTSIZE*5] == 0 && inptr[DCTSIZE*6] == 0 &&
inptr[DCTSIZE*7] == 0) {
- /* AC terms all zero */
- int dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]) << PASS1_BITS;
-
- wsptr[DCTSIZE*0] = dcval;
- wsptr[DCTSIZE*1] = dcval;
- wsptr[DCTSIZE*2] = dcval;
- wsptr[DCTSIZE*3] = dcval;
- wsptr[DCTSIZE*4] = dcval;
- wsptr[DCTSIZE*5] = dcval;
- wsptr[DCTSIZE*6] = dcval;
- wsptr[DCTSIZE*7] = dcval;
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- continue;
- }
-
- /* Even part: reverse the even part of the forward DCT. */
- /* The rotator is sqrt(2)*c(-6). */
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
- tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
- tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z2 <<= CONST_BITS;
- z3 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z2 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- tmp0 = z2 + z3;
- tmp1 = z2 - z3;
-
- tmp10 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
- tmp11 = tmp1 + tmp3;
- tmp12 = tmp1 - tmp3;
-
- /* Odd part per figure 8; the matrix is unitary and hence its
- * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
- */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
- tmp1 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- tmp3 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
-
- z2 = tmp0 + tmp2;
- z3 = tmp1 + tmp3;
-
- z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
- z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
- z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
- z2 += z1;
- z3 += z1;
-
- z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
- tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
- tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
- tmp0 += z1 + z2;
- tmp3 += z1 + z3;
-
- z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
- tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
- tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
- tmp1 += z1 + z3;
- tmp2 += z1 + z2;
-
- /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
-
- wsptr[DCTSIZE*0] = (int) RIGHT_SHIFT(tmp10 + tmp3, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*7] = (int) RIGHT_SHIFT(tmp10 - tmp3, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*1] = (int) RIGHT_SHIFT(tmp11 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*6] = (int) RIGHT_SHIFT(tmp11 - tmp2, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*2] = (int) RIGHT_SHIFT(tmp12 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*5] = (int) RIGHT_SHIFT(tmp12 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*3] = (int) RIGHT_SHIFT(tmp13 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*4] = (int) RIGHT_SHIFT(tmp13 - tmp0, CONST_BITS-PASS1_BITS);
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- }
-
- /* Pass 2: process rows from work array, store into output array. */
- /* Note that we must descale the results by a factor of 8 == 2**3, */
- /* and also undo the PASS1_BITS scaling. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < DCTSIZE; ctr++) {
- outptr = output_buf[ctr] + output_col;
- /* Rows of zeroes can be exploited in the same way as we did with columns.
- * However, the column calculation has created many nonzero AC terms, so
- * the simplification applies less often (typically 5% to 10% of the time).
- * On machines with very fast multiplication, it's possible that the
- * test takes more time than it's worth. In that case this section
- * may be commented out.
- */
+ /* AC terms all zero */
+ int dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]) << PASS1_BITS;
+
+ wsptr[DCTSIZE*0] = dcval;
+ wsptr[DCTSIZE*1] = dcval;
+ wsptr[DCTSIZE*2] = dcval;
+ wsptr[DCTSIZE*3] = dcval;
+ wsptr[DCTSIZE*4] = dcval;
+ wsptr[DCTSIZE*5] = dcval;
+ wsptr[DCTSIZE*6] = dcval;
+ wsptr[DCTSIZE*7] = dcval;
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ continue;
+ }
+
+ /* Even part: reverse the even part of the forward DCT. */
+ /* The rotator is sqrt(2)*c(-6). */
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
+ tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
+ tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z2 <<= CONST_BITS;
+ z3 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z2 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ tmp0 = z2 + z3;
+ tmp1 = z2 - z3;
+
+ tmp10 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+ tmp11 = tmp1 + tmp3;
+ tmp12 = tmp1 - tmp3;
+
+ /* Odd part per figure 8; the matrix is unitary and hence its
+ * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
+ */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+ tmp1 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ tmp3 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+
+ z2 = tmp0 + tmp2;
+ z3 = tmp1 + tmp3;
+
+ z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
+ z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
+ z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
+ z2 += z1;
+ z3 += z1;
+
+ z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
+ tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
+ tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
+ tmp0 += z1 + z2;
+ tmp3 += z1 + z3;
+
+ z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
+ tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
+ tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
+ tmp1 += z1 + z3;
+ tmp2 += z1 + z2;
+
+ /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
+
+ wsptr[DCTSIZE*0] = (int) RIGHT_SHIFT(tmp10 + tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*7] = (int) RIGHT_SHIFT(tmp10 - tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*1] = (int) RIGHT_SHIFT(tmp11 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*6] = (int) RIGHT_SHIFT(tmp11 - tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*2] = (int) RIGHT_SHIFT(tmp12 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*5] = (int) RIGHT_SHIFT(tmp12 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*3] = (int) RIGHT_SHIFT(tmp13 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*4] = (int) RIGHT_SHIFT(tmp13 - tmp0, CONST_BITS-PASS1_BITS);
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ }
+
+ /* Pass 2: process rows from work array, store into output array. */
+ /* Note that we must descale the results by a factor of 8 == 2**3, */
+ /* and also undo the PASS1_BITS scaling. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < DCTSIZE; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+ /* Rows of zeroes can be exploited in the same way as we did with columns.
+ * However, the column calculation has created many nonzero AC terms, so
+ * the simplification applies less often (typically 5% to 10% of the time).
+ * On machines with very fast multiplication, it's possible that the
+ * test takes more time than it's worth. In that case this section
+ * may be commented out.
+ */
#ifndef NO_ZERO_ROW_TEST
- if (wsptr[1] == 0 && wsptr[2] == 0 && wsptr[3] == 0 && wsptr[4] == 0 &&
+ if (wsptr[1] == 0 && wsptr[2] == 0 && wsptr[3] == 0 && wsptr[4] == 0 &&
wsptr[5] == 0 && wsptr[6] == 0 && wsptr[7] == 0) {
- /* AC terms all zero */
- JSAMPLE dcval = range_limit[(int) DESCALE((INT32) wsptr[0], PASS1_BITS+3)
- & RANGE_MASK];
-
- outptr[0] = dcval;
- outptr[1] = dcval;
- outptr[2] = dcval;
- outptr[3] = dcval;
- outptr[4] = dcval;
- outptr[5] = dcval;
- outptr[6] = dcval;
- outptr[7] = dcval;
-
- wsptr += DCTSIZE; /* advance pointer to next row */
- continue;
- }
+ /* AC terms all zero */
+ JSAMPLE dcval = range_limit[(int) DESCALE((INT32) wsptr[0], PASS1_BITS+3)
+ & RANGE_MASK];
+
+ outptr[0] = dcval;
+ outptr[1] = dcval;
+ outptr[2] = dcval;
+ outptr[3] = dcval;
+ outptr[4] = dcval;
+ outptr[5] = dcval;
+ outptr[6] = dcval;
+ outptr[7] = dcval;
+
+ wsptr += DCTSIZE; /* advance pointer to next row */
+ continue;
+ }
#endif
- /* Even part: reverse the even part of the forward DCT. */
- /* The rotator is sqrt(2)*c(-6). */
-
- z2 = (INT32) wsptr[2];
- z3 = (INT32) wsptr[6];
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
- tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
- tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
-
- /* Add fudge factor here for final descale. */
- z2 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z3 = (INT32) wsptr[4];
-
- tmp0 = (z2 + z3) << CONST_BITS;
- tmp1 = (z2 - z3) << CONST_BITS;
-
- tmp10 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
- tmp11 = tmp1 + tmp3;
- tmp12 = tmp1 - tmp3;
-
- /* Odd part per figure 8; the matrix is unitary and hence its
- * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
- */
-
- tmp0 = (INT32) wsptr[7];
- tmp1 = (INT32) wsptr[5];
- tmp2 = (INT32) wsptr[3];
- tmp3 = (INT32) wsptr[1];
-
- z2 = tmp0 + tmp2;
- z3 = tmp1 + tmp3;
-
- z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
- z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
- z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
- z2 += z1;
- z3 += z1;
-
- z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
- tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
- tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
- tmp0 += z1 + z2;
- tmp3 += z1 + z3;
-
- z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
- tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
- tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
- tmp1 += z1 + z3;
- tmp2 += z1 + z2;
-
- /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += DCTSIZE; /* advance pointer to next row */
- }
+ /* Even part: reverse the even part of the forward DCT. */
+ /* The rotator is sqrt(2)*c(-6). */
+
+ z2 = (INT32) wsptr[2];
+ z3 = (INT32) wsptr[6];
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
+ tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
+ tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
+
+ /* Add fudge factor here for final descale. */
+ z2 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z3 = (INT32) wsptr[4];
+
+ tmp0 = (z2 + z3) << CONST_BITS;
+ tmp1 = (z2 - z3) << CONST_BITS;
+
+ tmp10 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+ tmp11 = tmp1 + tmp3;
+ tmp12 = tmp1 - tmp3;
+
+ /* Odd part per figure 8; the matrix is unitary and hence its
+ * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
+ */
+
+ tmp0 = (INT32) wsptr[7];
+ tmp1 = (INT32) wsptr[5];
+ tmp2 = (INT32) wsptr[3];
+ tmp3 = (INT32) wsptr[1];
+
+ z2 = tmp0 + tmp2;
+ z3 = tmp1 + tmp3;
+
+ z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
+ z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
+ z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
+ z2 += z1;
+ z3 += z1;
+
+ z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
+ tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
+ tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
+ tmp0 += z1 + z2;
+ tmp3 += z1 + z3;
+
+ z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
+ tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
+ tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
+ tmp1 += z1 + z3;
+ tmp2 += z1 + z2;
+
+ /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += DCTSIZE; /* advance pointer to next row */
+ }
}
#ifdef IDCT_SCALING_SUPPORTED
@@ -426,142 +426,142 @@ jpeg_idct_islow (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_7x7 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12, tmp13;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[7*7]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 7; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp13 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp13 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp13 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp10 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
- tmp11 = tmp10 + tmp12 + tmp13 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
- tmp0 = z1 + z3;
- z2 -= tmp0;
- tmp0 = MULTIPLY(tmp0, FIX(1.274162392)) + tmp13; /* c2 */
- tmp10 += tmp0 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
- tmp12 += tmp0 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
- tmp13 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
-
- tmp1 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
- tmp2 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
- tmp0 = tmp1 - tmp2;
- tmp1 += tmp2;
- tmp2 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
- tmp1 += tmp2;
- z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
- tmp0 += z2;
- tmp2 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
-
- /* Final output stage */
-
- wsptr[7*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[7*6] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[7*1] = (int) RIGHT_SHIFT(tmp11 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[7*5] = (int) RIGHT_SHIFT(tmp11 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[7*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[7*4] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
- wsptr[7*3] = (int) RIGHT_SHIFT(tmp13, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 7 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 7; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp13 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp13 <<= CONST_BITS;
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[4];
- z3 = (INT32) wsptr[6];
-
- tmp10 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
- tmp11 = tmp10 + tmp12 + tmp13 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
- tmp0 = z1 + z3;
- z2 -= tmp0;
- tmp0 = MULTIPLY(tmp0, FIX(1.274162392)) + tmp13; /* c2 */
- tmp10 += tmp0 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
- tmp12 += tmp0 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
- tmp13 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
-
- tmp1 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
- tmp2 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
- tmp0 = tmp1 - tmp2;
- tmp1 += tmp2;
- tmp2 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
- tmp1 += tmp2;
- z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
- tmp0 += z2;
- tmp2 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 7; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12, tmp13;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[7*7]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 7; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp13 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp13 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp13 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp10 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
+ tmp11 = tmp10 + tmp12 + tmp13 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
+ tmp0 = z1 + z3;
+ z2 -= tmp0;
+ tmp0 = MULTIPLY(tmp0, FIX(1.274162392)) + tmp13; /* c2 */
+ tmp10 += tmp0 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
+ tmp12 += tmp0 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
+ tmp13 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+
+ tmp1 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
+ tmp2 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
+ tmp0 = tmp1 - tmp2;
+ tmp1 += tmp2;
+ tmp2 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
+ tmp1 += tmp2;
+ z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
+ tmp0 += z2;
+ tmp2 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
+
+ /* Final output stage */
+
+ wsptr[7*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[7*6] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[7*1] = (int) RIGHT_SHIFT(tmp11 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[7*5] = (int) RIGHT_SHIFT(tmp11 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[7*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[7*4] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[7*3] = (int) RIGHT_SHIFT(tmp13, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 7 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 7; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp13 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp13 <<= CONST_BITS;
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[4];
+ z3 = (INT32) wsptr[6];
+
+ tmp10 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
+ tmp11 = tmp10 + tmp12 + tmp13 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
+ tmp0 = z1 + z3;
+ z2 -= tmp0;
+ tmp0 = MULTIPLY(tmp0, FIX(1.274162392)) + tmp13; /* c2 */
+ tmp10 += tmp0 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
+ tmp12 += tmp0 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
+ tmp13 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+
+ tmp1 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
+ tmp2 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
+ tmp0 = tmp1 - tmp2;
+ tmp1 += tmp2;
+ tmp2 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
+ tmp1 += tmp2;
+ z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
+ tmp0 += z2;
+ tmp2 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 7; /* advance pointer to next row */
+ }
}
@@ -575,114 +575,114 @@ jpeg_idct_7x7 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_6x6 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[6*6]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 6; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp0 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
- tmp1 = tmp0 + tmp10;
- tmp11 = RIGHT_SHIFT(tmp0 - tmp10 - tmp10, CONST_BITS-PASS1_BITS);
- tmp10 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
- tmp10 = tmp1 + tmp0;
- tmp12 = tmp1 - tmp0;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
- tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
- tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
- tmp1 = (z1 - z2 - z3) << PASS1_BITS;
-
- /* Final output stage */
-
- wsptr[6*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[6*5] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[6*1] = (int) (tmp11 + tmp1);
- wsptr[6*4] = (int) (tmp11 - tmp1);
- wsptr[6*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[6*3] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 6 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 6; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp0 <<= CONST_BITS;
- tmp2 = (INT32) wsptr[4];
- tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
- tmp1 = tmp0 + tmp10;
- tmp11 = tmp0 - tmp10 - tmp10;
- tmp10 = (INT32) wsptr[2];
- tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
- tmp10 = tmp1 + tmp0;
- tmp12 = tmp1 - tmp0;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
- tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
- tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
- tmp1 = (z1 - z2 - z3) << CONST_BITS;
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 6; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[6*6]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 6; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp0 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
+ tmp1 = tmp0 + tmp10;
+ tmp11 = RIGHT_SHIFT(tmp0 - tmp10 - tmp10, CONST_BITS-PASS1_BITS);
+ tmp10 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
+ tmp10 = tmp1 + tmp0;
+ tmp12 = tmp1 - tmp0;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
+ tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
+ tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
+ tmp1 = (z1 - z2 - z3) << PASS1_BITS;
+
+ /* Final output stage */
+
+ wsptr[6*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[6*5] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[6*1] = (int) (tmp11 + tmp1);
+ wsptr[6*4] = (int) (tmp11 - tmp1);
+ wsptr[6*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[6*3] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 6 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 6; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp0 <<= CONST_BITS;
+ tmp2 = (INT32) wsptr[4];
+ tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
+ tmp1 = tmp0 + tmp10;
+ tmp11 = tmp0 - tmp10 - tmp10;
+ tmp10 = (INT32) wsptr[2];
+ tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
+ tmp10 = tmp1 + tmp0;
+ tmp12 = tmp1 - tmp0;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
+ tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
+ tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
+ tmp1 = (z1 - z2 - z3) << CONST_BITS;
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 6; /* advance pointer to next row */
+ }
}
@@ -696,108 +696,108 @@ jpeg_idct_6x6 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_5x5 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp10, tmp11, tmp12;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[5*5]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 5; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp12 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp12 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp12 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp1 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z1 = MULTIPLY(tmp0 + tmp1, FIX(0.790569415)); /* (c2+c4)/2 */
- z2 = MULTIPLY(tmp0 - tmp1, FIX(0.353553391)); /* (c2-c4)/2 */
- z3 = tmp12 + z2;
- tmp10 = z3 + z1;
- tmp11 = z3 - z1;
- tmp12 -= z2 << 2;
-
- /* Odd part */
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
-
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
- tmp0 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
- tmp1 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
-
- /* Final output stage */
-
- wsptr[5*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[5*4] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[5*1] = (int) RIGHT_SHIFT(tmp11 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[5*3] = (int) RIGHT_SHIFT(tmp11 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[5*2] = (int) RIGHT_SHIFT(tmp12, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 5 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 5; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp12 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp12 <<= CONST_BITS;
- tmp0 = (INT32) wsptr[2];
- tmp1 = (INT32) wsptr[4];
- z1 = MULTIPLY(tmp0 + tmp1, FIX(0.790569415)); /* (c2+c4)/2 */
- z2 = MULTIPLY(tmp0 - tmp1, FIX(0.353553391)); /* (c2-c4)/2 */
- z3 = tmp12 + z2;
- tmp10 = z3 + z1;
- tmp11 = z3 - z1;
- tmp12 -= z2 << 2;
-
- /* Odd part */
-
- z2 = (INT32) wsptr[1];
- z3 = (INT32) wsptr[3];
-
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
- tmp0 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
- tmp1 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 5; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp10, tmp11, tmp12;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[5*5]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 5; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp12 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp12 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp12 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp1 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z1 = MULTIPLY(tmp0 + tmp1, FIX(0.790569415)); /* (c2+c4)/2 */
+ z2 = MULTIPLY(tmp0 - tmp1, FIX(0.353553391)); /* (c2-c4)/2 */
+ z3 = tmp12 + z2;
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z1;
+ tmp12 -= z2 << 2;
+
+ /* Odd part */
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
+ tmp0 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
+ tmp1 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
+
+ /* Final output stage */
+
+ wsptr[5*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[5*4] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[5*1] = (int) RIGHT_SHIFT(tmp11 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[5*3] = (int) RIGHT_SHIFT(tmp11 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[5*2] = (int) RIGHT_SHIFT(tmp12, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 5 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 5; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp12 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp12 <<= CONST_BITS;
+ tmp0 = (INT32) wsptr[2];
+ tmp1 = (INT32) wsptr[4];
+ z1 = MULTIPLY(tmp0 + tmp1, FIX(0.790569415)); /* (c2+c4)/2 */
+ z2 = MULTIPLY(tmp0 - tmp1, FIX(0.353553391)); /* (c2-c4)/2 */
+ z3 = tmp12 + z2;
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z1;
+ tmp12 -= z2 << 2;
+
+ /* Odd part */
+
+ z2 = (INT32) wsptr[1];
+ z3 = (INT32) wsptr[3];
+
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
+ tmp0 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
+ tmp1 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 5; /* advance pointer to next row */
+ }
}
@@ -811,98 +811,98 @@ jpeg_idct_5x5 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_4x4 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp2, tmp10, tmp12;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[4*4]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 4; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
-
- tmp10 = (tmp0 + tmp2) << PASS1_BITS;
- tmp12 = (tmp0 - tmp2) << PASS1_BITS;
-
- /* Odd part */
- /* Same rotation as in the even part of the 8x8 LL&M IDCT */
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp0 = RIGHT_SHIFT(z1 + MULTIPLY(z2, FIX_0_765366865), /* c2-c6 */
- CONST_BITS-PASS1_BITS);
- tmp2 = RIGHT_SHIFT(z1 - MULTIPLY(z3, FIX_1_847759065), /* c2+c6 */
- CONST_BITS-PASS1_BITS);
-
- /* Final output stage */
-
- wsptr[4*0] = (int) (tmp10 + tmp0);
- wsptr[4*3] = (int) (tmp10 - tmp0);
- wsptr[4*1] = (int) (tmp12 + tmp2);
- wsptr[4*2] = (int) (tmp12 - tmp2);
- }
-
- /* Pass 2: process 4 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 4; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp2 = (INT32) wsptr[2];
-
- tmp10 = (tmp0 + tmp2) << CONST_BITS;
- tmp12 = (tmp0 - tmp2) << CONST_BITS;
-
- /* Odd part */
- /* Same rotation as in the even part of the 8x8 LL&M IDCT */
-
- z2 = (INT32) wsptr[1];
- z3 = (INT32) wsptr[3];
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
- tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
- tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 4; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp2, tmp10, tmp12;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[4*4]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 4; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+
+ tmp10 = (tmp0 + tmp2) << PASS1_BITS;
+ tmp12 = (tmp0 - tmp2) << PASS1_BITS;
+
+ /* Odd part */
+ /* Same rotation as in the even part of the 8x8 LL&M IDCT */
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp0 = RIGHT_SHIFT(z1 + MULTIPLY(z2, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS-PASS1_BITS);
+ tmp2 = RIGHT_SHIFT(z1 - MULTIPLY(z3, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Final output stage */
+
+ wsptr[4*0] = (int) (tmp10 + tmp0);
+ wsptr[4*3] = (int) (tmp10 - tmp0);
+ wsptr[4*1] = (int) (tmp12 + tmp2);
+ wsptr[4*2] = (int) (tmp12 - tmp2);
+ }
+
+ /* Pass 2: process 4 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 4; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp2 = (INT32) wsptr[2];
+
+ tmp10 = (tmp0 + tmp2) << CONST_BITS;
+ tmp12 = (tmp0 - tmp2) << CONST_BITS;
+
+ /* Odd part */
+ /* Same rotation as in the even part of the 8x8 LL&M IDCT */
+
+ z2 = (INT32) wsptr[1];
+ z3 = (INT32) wsptr[3];
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
+ tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
+ tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 4; /* advance pointer to next row */
+ }
}
@@ -916,83 +916,83 @@ jpeg_idct_4x4 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_3x3 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp2, tmp10, tmp12;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[3*3]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 3; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp0 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
- tmp10 = tmp0 + tmp12;
- tmp2 = tmp0 - tmp12 - tmp12;
-
- /* Odd part */
-
- tmp12 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
-
- /* Final output stage */
-
- wsptr[3*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[3*2] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[3*1] = (int) RIGHT_SHIFT(tmp2, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 3 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 3; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp0 <<= CONST_BITS;
- tmp2 = (INT32) wsptr[2];
- tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
- tmp10 = tmp0 + tmp12;
- tmp2 = tmp0 - tmp12 - tmp12;
-
- /* Odd part */
-
- tmp12 = (INT32) wsptr[1];
- tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 3; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp2, tmp10, tmp12;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[3*3]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 3; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp0 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
+ tmp10 = tmp0 + tmp12;
+ tmp2 = tmp0 - tmp12 - tmp12;
+
+ /* Odd part */
+
+ tmp12 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
+
+ /* Final output stage */
+
+ wsptr[3*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[3*2] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[3*1] = (int) RIGHT_SHIFT(tmp2, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 3 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 3; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp0 <<= CONST_BITS;
+ tmp2 = (INT32) wsptr[2];
+ tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
+ tmp10 = tmp0 + tmp12;
+ tmp2 = tmp0 - tmp12 - tmp12;
+
+ /* Odd part */
+
+ tmp12 = (INT32) wsptr[1];
+ tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 3; /* advance pointer to next row */
+ }
}
@@ -1005,48 +1005,48 @@ jpeg_idct_3x3 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_2x2 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
- ISLOW_MULT_TYPE * quantptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- SHIFT_TEMPS
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5;
+ ISLOW_MULT_TYPE * quantptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ SHIFT_TEMPS
- /* Pass 1: process columns from input. */
+ /* Pass 1: process columns from input. */
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- /* Column 0 */
- tmp4 = DEQUANTIZE(coef_block[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp5 = DEQUANTIZE(coef_block[DCTSIZE*1], quantptr[DCTSIZE*1]);
- /* Add fudge factor here for final descale. */
- tmp4 += ONE << 2;
+ /* Column 0 */
+ tmp4 = DEQUANTIZE(coef_block[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp5 = DEQUANTIZE(coef_block[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ /* Add fudge factor here for final descale. */
+ tmp4 += ONE << 2;
- tmp0 = tmp4 + tmp5;
- tmp2 = tmp4 - tmp5;
+ tmp0 = tmp4 + tmp5;
+ tmp2 = tmp4 - tmp5;
- /* Column 1 */
- tmp4 = DEQUANTIZE(coef_block[DCTSIZE*0+1], quantptr[DCTSIZE*0+1]);
- tmp5 = DEQUANTIZE(coef_block[DCTSIZE*1+1], quantptr[DCTSIZE*1+1]);
+ /* Column 1 */
+ tmp4 = DEQUANTIZE(coef_block[DCTSIZE*0+1], quantptr[DCTSIZE*0+1]);
+ tmp5 = DEQUANTIZE(coef_block[DCTSIZE*1+1], quantptr[DCTSIZE*1+1]);
- tmp1 = tmp4 + tmp5;
- tmp3 = tmp4 - tmp5;
+ tmp1 = tmp4 + tmp5;
+ tmp3 = tmp4 - tmp5;
- /* Pass 2: process 2 rows, store into output array. */
+ /* Pass 2: process 2 rows, store into output array. */
- /* Row 0 */
- outptr = output_buf[0] + output_col;
+ /* Row 0 */
+ outptr = output_buf[0] + output_col;
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp0 + tmp1, 3) & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp0 - tmp1, 3) & RANGE_MASK];
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp0 + tmp1, 3) & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp0 - tmp1, 3) & RANGE_MASK];
- /* Row 1 */
- outptr = output_buf[1] + output_col;
+ /* Row 1 */
+ outptr = output_buf[1] + output_col;
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp2 + tmp3, 3) & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp2 - tmp3, 3) & RANGE_MASK];
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp2 + tmp3, 3) & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp2 - tmp3, 3) & RANGE_MASK];
}
@@ -1060,20 +1060,20 @@ jpeg_idct_2x2 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_1x1 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- int dcval;
- ISLOW_MULT_TYPE * quantptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- SHIFT_TEMPS
+ int dcval;
+ ISLOW_MULT_TYPE * quantptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ SHIFT_TEMPS
- /* 1x1 is trivial: just take the DC coefficient divided by 8. */
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- dcval = DEQUANTIZE(coef_block[0], quantptr[0]);
- dcval = (int) DESCALE((INT32) dcval, 3);
+ /* 1x1 is trivial: just take the DC coefficient divided by 8. */
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ dcval = DEQUANTIZE(coef_block[0], quantptr[0]);
+ dcval = (int) DESCALE((INT32) dcval, 3);
- output_buf[0][output_col] = range_limit[dcval & RANGE_MASK];
+ output_buf[0][output_col] = range_limit[dcval & RANGE_MASK];
}
@@ -1087,164 +1087,164 @@ jpeg_idct_1x1 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_9x9 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13, tmp14;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*9]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp0 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp3 = MULTIPLY(z3, FIX(0.707106781)); /* c6 */
- tmp1 = tmp0 + tmp3;
- tmp2 = tmp0 - tmp3 - tmp3;
-
- tmp0 = MULTIPLY(z1 - z2, FIX(0.707106781)); /* c6 */
- tmp11 = tmp2 + tmp0;
- tmp14 = tmp2 - tmp0 - tmp0;
-
- tmp0 = MULTIPLY(z1 + z2, FIX(1.328926049)); /* c2 */
- tmp2 = MULTIPLY(z1, FIX(1.083350441)); /* c4 */
- tmp3 = MULTIPLY(z2, FIX(0.245575608)); /* c8 */
-
- tmp10 = tmp1 + tmp0 - tmp3;
- tmp12 = tmp1 - tmp0 + tmp2;
- tmp13 = tmp1 - tmp2 + tmp3;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- z2 = MULTIPLY(z2, - FIX(1.224744871)); /* -c3 */
-
- tmp2 = MULTIPLY(z1 + z3, FIX(0.909038955)); /* c5 */
- tmp3 = MULTIPLY(z1 + z4, FIX(0.483689525)); /* c7 */
- tmp0 = tmp2 + tmp3 - z2;
- tmp1 = MULTIPLY(z3 - z4, FIX(1.392728481)); /* c1 */
- tmp2 += z2 - tmp1;
- tmp3 += z2 + tmp1;
- tmp1 = MULTIPLY(z1 - z3 - z4, FIX(1.224744871)); /* c3 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp11 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp11 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp13 + tmp3, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp13 - tmp3, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp14, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 9 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 9; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp0 <<= CONST_BITS;
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[4];
- z3 = (INT32) wsptr[6];
-
- tmp3 = MULTIPLY(z3, FIX(0.707106781)); /* c6 */
- tmp1 = tmp0 + tmp3;
- tmp2 = tmp0 - tmp3 - tmp3;
-
- tmp0 = MULTIPLY(z1 - z2, FIX(0.707106781)); /* c6 */
- tmp11 = tmp2 + tmp0;
- tmp14 = tmp2 - tmp0 - tmp0;
-
- tmp0 = MULTIPLY(z1 + z2, FIX(1.328926049)); /* c2 */
- tmp2 = MULTIPLY(z1, FIX(1.083350441)); /* c4 */
- tmp3 = MULTIPLY(z2, FIX(0.245575608)); /* c8 */
-
- tmp10 = tmp1 + tmp0 - tmp3;
- tmp12 = tmp1 - tmp0 + tmp2;
- tmp13 = tmp1 - tmp2 + tmp3;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
-
- z2 = MULTIPLY(z2, - FIX(1.224744871)); /* -c3 */
-
- tmp2 = MULTIPLY(z1 + z3, FIX(0.909038955)); /* c5 */
- tmp3 = MULTIPLY(z1 + z4, FIX(0.483689525)); /* c7 */
- tmp0 = tmp2 + tmp3 - z2;
- tmp1 = MULTIPLY(z3 - z4, FIX(1.392728481)); /* c1 */
- tmp2 += z2 - tmp1;
- tmp3 += z2 + tmp1;
- tmp1 = MULTIPLY(z1 - z3 - z4, FIX(1.224744871)); /* c3 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13, tmp14;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*9]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp0 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp3 = MULTIPLY(z3, FIX(0.707106781)); /* c6 */
+ tmp1 = tmp0 + tmp3;
+ tmp2 = tmp0 - tmp3 - tmp3;
+
+ tmp0 = MULTIPLY(z1 - z2, FIX(0.707106781)); /* c6 */
+ tmp11 = tmp2 + tmp0;
+ tmp14 = tmp2 - tmp0 - tmp0;
+
+ tmp0 = MULTIPLY(z1 + z2, FIX(1.328926049)); /* c2 */
+ tmp2 = MULTIPLY(z1, FIX(1.083350441)); /* c4 */
+ tmp3 = MULTIPLY(z2, FIX(0.245575608)); /* c8 */
+
+ tmp10 = tmp1 + tmp0 - tmp3;
+ tmp12 = tmp1 - tmp0 + tmp2;
+ tmp13 = tmp1 - tmp2 + tmp3;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ z2 = MULTIPLY(z2, - FIX(1.224744871)); /* -c3 */
+
+ tmp2 = MULTIPLY(z1 + z3, FIX(0.909038955)); /* c5 */
+ tmp3 = MULTIPLY(z1 + z4, FIX(0.483689525)); /* c7 */
+ tmp0 = tmp2 + tmp3 - z2;
+ tmp1 = MULTIPLY(z3 - z4, FIX(1.392728481)); /* c1 */
+ tmp2 += z2 - tmp1;
+ tmp3 += z2 + tmp1;
+ tmp1 = MULTIPLY(z1 - z3 - z4, FIX(1.224744871)); /* c3 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp11 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp11 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp13 + tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp13 - tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp14, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 9 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 9; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp0 <<= CONST_BITS;
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[4];
+ z3 = (INT32) wsptr[6];
+
+ tmp3 = MULTIPLY(z3, FIX(0.707106781)); /* c6 */
+ tmp1 = tmp0 + tmp3;
+ tmp2 = tmp0 - tmp3 - tmp3;
+
+ tmp0 = MULTIPLY(z1 - z2, FIX(0.707106781)); /* c6 */
+ tmp11 = tmp2 + tmp0;
+ tmp14 = tmp2 - tmp0 - tmp0;
+
+ tmp0 = MULTIPLY(z1 + z2, FIX(1.328926049)); /* c2 */
+ tmp2 = MULTIPLY(z1, FIX(1.083350441)); /* c4 */
+ tmp3 = MULTIPLY(z2, FIX(0.245575608)); /* c8 */
+
+ tmp10 = tmp1 + tmp0 - tmp3;
+ tmp12 = tmp1 - tmp0 + tmp2;
+ tmp13 = tmp1 - tmp2 + tmp3;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+
+ z2 = MULTIPLY(z2, - FIX(1.224744871)); /* -c3 */
+
+ tmp2 = MULTIPLY(z1 + z3, FIX(0.909038955)); /* c5 */
+ tmp3 = MULTIPLY(z1 + z4, FIX(0.483689525)); /* c7 */
+ tmp0 = tmp2 + tmp3 - z2;
+ tmp1 = MULTIPLY(z3 - z4, FIX(1.392728481)); /* c1 */
+ tmp2 += z2 - tmp1;
+ tmp3 += z2 + tmp1;
+ tmp1 = MULTIPLY(z1 - z3 - z4, FIX(1.224744871)); /* c3 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -1258,188 +1258,188 @@ jpeg_idct_9x9 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_10x10 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24;
- INT32 z1, z2, z3, z4, z5;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*10]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z3 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z3 += ONE << (CONST_BITS-PASS1_BITS-1);
- z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
- z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
- tmp10 = z3 + z1;
- tmp11 = z3 - z2;
-
- tmp22 = RIGHT_SHIFT(z3 - ((z1 - z2) << 1), /* c0 = (c4-c8)*2 */
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24;
+ INT32 z1, z2, z3, z4, z5;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*10]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z3 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z3 += ONE << (CONST_BITS-PASS1_BITS-1);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
+ z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z2;
+
+ tmp22 = RIGHT_SHIFT(z3 - ((z1 - z2) << 1), /* c0 = (c4-c8)*2 */
CONST_BITS-PASS1_BITS);
- z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
- tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
- tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
+ tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
+ tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
- tmp20 = tmp10 + tmp12;
- tmp24 = tmp10 - tmp12;
- tmp21 = tmp11 + tmp13;
- tmp23 = tmp11 - tmp13;
+ tmp20 = tmp10 + tmp12;
+ tmp24 = tmp10 - tmp12;
+ tmp21 = tmp11 + tmp13;
+ tmp23 = tmp11 - tmp13;
- /* Odd part */
+ /* Odd part */
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
- tmp11 = z2 + z4;
- tmp13 = z2 - z4;
+ tmp11 = z2 + z4;
+ tmp13 = z2 - z4;
- tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
- z5 = z3 << CONST_BITS;
+ tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
+ z5 = z3 << CONST_BITS;
- z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
- z4 = z5 + tmp12;
+ z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
+ z4 = z5 + tmp12;
- tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
- tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
+ tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
+ tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
- z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
- z4 = z5 - tmp12 - (tmp13 << (CONST_BITS - 1));
+ z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
+ z4 = z5 - tmp12 - (tmp13 << (CONST_BITS - 1));
- tmp12 = (z1 - tmp13 - z3) << PASS1_BITS;
-
- tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
- tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) (tmp22 + tmp12);
- wsptr[8*7] = (int) (tmp22 - tmp12);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 10 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 10; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z3 <<= CONST_BITS;
- z4 = (INT32) wsptr[4];
- z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
- z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
- tmp10 = z3 + z1;
- tmp11 = z3 - z2;
-
- tmp22 = z3 - ((z1 - z2) << 1); /* c0 = (c4-c8)*2 */
-
- z2 = (INT32) wsptr[2];
- z3 = (INT32) wsptr[6];
-
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
- tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
- tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
-
- tmp20 = tmp10 + tmp12;
- tmp24 = tmp10 - tmp12;
- tmp21 = tmp11 + tmp13;
- tmp23 = tmp11 - tmp13;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z3 <<= CONST_BITS;
- z4 = (INT32) wsptr[7];
-
- tmp11 = z2 + z4;
- tmp13 = z2 - z4;
-
- tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
-
- z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
- z4 = z3 + tmp12;
-
- tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
- tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
-
- z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
- z4 = z3 - tmp12 - (tmp13 << (CONST_BITS - 1));
-
- tmp12 = ((z1 - tmp13) << CONST_BITS) - z3;
-
- tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
- tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ tmp12 = (z1 - tmp13 - z3) << PASS1_BITS;
+
+ tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
+ tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) (tmp22 + tmp12);
+ wsptr[8*7] = (int) (tmp22 - tmp12);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 10 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 10; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z3 <<= CONST_BITS;
+ z4 = (INT32) wsptr[4];
+ z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
+ z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z2;
+
+ tmp22 = z3 - ((z1 - z2) << 1); /* c0 = (c4-c8)*2 */
+
+ z2 = (INT32) wsptr[2];
+ z3 = (INT32) wsptr[6];
+
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
+ tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
+ tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
+
+ tmp20 = tmp10 + tmp12;
+ tmp24 = tmp10 - tmp12;
+ tmp21 = tmp11 + tmp13;
+ tmp23 = tmp11 - tmp13;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z3 <<= CONST_BITS;
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = z2 + z4;
+ tmp13 = z2 - z4;
+
+ tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
+
+ z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
+ z4 = z3 + tmp12;
+
+ tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
+ tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
+
+ z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
+ z4 = z3 - tmp12 - (tmp13 << (CONST_BITS - 1));
+
+ tmp12 = ((z1 - tmp13) << CONST_BITS) - z3;
+
+ tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
+ tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -1453,187 +1453,187 @@ jpeg_idct_10x10 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_11x11 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*11]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp10 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp10 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp10 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp20 = MULTIPLY(z2 - z3, FIX(2.546640132)); /* c2+c4 */
- tmp23 = MULTIPLY(z2 - z1, FIX(0.430815045)); /* c2-c6 */
- z4 = z1 + z3;
- tmp24 = MULTIPLY(z4, - FIX(1.155664402)); /* -(c2-c10) */
- z4 -= z2;
- tmp25 = tmp10 + MULTIPLY(z4, FIX(1.356927976)); /* c2 */
- tmp21 = tmp20 + tmp23 + tmp25 -
- MULTIPLY(z2, FIX(1.821790775)); /* c2+c4+c10-c6 */
- tmp20 += tmp25 + MULTIPLY(z3, FIX(2.115825087)); /* c4+c6 */
- tmp23 += tmp25 - MULTIPLY(z1, FIX(1.513598477)); /* c6+c8 */
- tmp24 += tmp25;
- tmp22 = tmp24 - MULTIPLY(z3, FIX(0.788749120)); /* c8+c10 */
- tmp24 += MULTIPLY(z2, FIX(1.944413522)) - /* c2+c8 */
- MULTIPLY(z1, FIX(1.390975730)); /* c4+c10 */
- tmp25 = tmp10 - MULTIPLY(z4, FIX(1.414213562)); /* c0 */
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp11 = z1 + z2;
- tmp14 = MULTIPLY(tmp11 + z3 + z4, FIX(0.398430003)); /* c9 */
- tmp11 = MULTIPLY(tmp11, FIX(0.887983902)); /* c3-c9 */
- tmp12 = MULTIPLY(z1 + z3, FIX(0.670361295)); /* c5-c9 */
- tmp13 = tmp14 + MULTIPLY(z1 + z4, FIX(0.366151574)); /* c7-c9 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(z1, FIX(0.923107866)); /* c7+c5+c3-c1-2*c9 */
- z1 = tmp14 - MULTIPLY(z2 + z3, FIX(1.163011579)); /* c7+c9 */
- tmp11 += z1 + MULTIPLY(z2, FIX(2.073276588)); /* c1+c7+3*c9-c3 */
- tmp12 += z1 - MULTIPLY(z3, FIX(1.192193623)); /* c3+c5-c7-c9 */
- z1 = MULTIPLY(z2 + z4, - FIX(1.798248910)); /* -(c1+c9) */
- tmp11 += z1;
- tmp13 += z1 + MULTIPLY(z4, FIX(2.102458632)); /* c1+c5+c9-c7 */
- tmp14 += MULTIPLY(z2, - FIX(1.467221301)) + /* -(c5+c9) */
- MULTIPLY(z3, FIX(1.001388905)) - /* c1-c9 */
- MULTIPLY(z4, FIX(1.684843907)); /* c3+c9 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*10] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp25, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 11 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 11; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp10 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp10 <<= CONST_BITS;
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[4];
- z3 = (INT32) wsptr[6];
-
- tmp20 = MULTIPLY(z2 - z3, FIX(2.546640132)); /* c2+c4 */
- tmp23 = MULTIPLY(z2 - z1, FIX(0.430815045)); /* c2-c6 */
- z4 = z1 + z3;
- tmp24 = MULTIPLY(z4, - FIX(1.155664402)); /* -(c2-c10) */
- z4 -= z2;
- tmp25 = tmp10 + MULTIPLY(z4, FIX(1.356927976)); /* c2 */
- tmp21 = tmp20 + tmp23 + tmp25 -
- MULTIPLY(z2, FIX(1.821790775)); /* c2+c4+c10-c6 */
- tmp20 += tmp25 + MULTIPLY(z3, FIX(2.115825087)); /* c4+c6 */
- tmp23 += tmp25 - MULTIPLY(z1, FIX(1.513598477)); /* c6+c8 */
- tmp24 += tmp25;
- tmp22 = tmp24 - MULTIPLY(z3, FIX(0.788749120)); /* c8+c10 */
- tmp24 += MULTIPLY(z2, FIX(1.944413522)) - /* c2+c8 */
- MULTIPLY(z1, FIX(1.390975730)); /* c4+c10 */
- tmp25 = tmp10 - MULTIPLY(z4, FIX(1.414213562)); /* c0 */
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
-
- tmp11 = z1 + z2;
- tmp14 = MULTIPLY(tmp11 + z3 + z4, FIX(0.398430003)); /* c9 */
- tmp11 = MULTIPLY(tmp11, FIX(0.887983902)); /* c3-c9 */
- tmp12 = MULTIPLY(z1 + z3, FIX(0.670361295)); /* c5-c9 */
- tmp13 = tmp14 + MULTIPLY(z1 + z4, FIX(0.366151574)); /* c7-c9 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(z1, FIX(0.923107866)); /* c7+c5+c3-c1-2*c9 */
- z1 = tmp14 - MULTIPLY(z2 + z3, FIX(1.163011579)); /* c7+c9 */
- tmp11 += z1 + MULTIPLY(z2, FIX(2.073276588)); /* c1+c7+3*c9-c3 */
- tmp12 += z1 - MULTIPLY(z3, FIX(1.192193623)); /* c3+c5-c7-c9 */
- z1 = MULTIPLY(z2 + z4, - FIX(1.798248910)); /* -(c1+c9) */
- tmp11 += z1;
- tmp13 += z1 + MULTIPLY(z4, FIX(2.102458632)); /* c1+c5+c9-c7 */
- tmp14 += MULTIPLY(z2, - FIX(1.467221301)) + /* -(c5+c9) */
- MULTIPLY(z3, FIX(1.001388905)) - /* c1-c9 */
- MULTIPLY(z4, FIX(1.684843907)); /* c3+c9 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*11]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp10 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp10 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp10 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp20 = MULTIPLY(z2 - z3, FIX(2.546640132)); /* c2+c4 */
+ tmp23 = MULTIPLY(z2 - z1, FIX(0.430815045)); /* c2-c6 */
+ z4 = z1 + z3;
+ tmp24 = MULTIPLY(z4, - FIX(1.155664402)); /* -(c2-c10) */
+ z4 -= z2;
+ tmp25 = tmp10 + MULTIPLY(z4, FIX(1.356927976)); /* c2 */
+ tmp21 = tmp20 + tmp23 + tmp25 -
+ MULTIPLY(z2, FIX(1.821790775)); /* c2+c4+c10-c6 */
+ tmp20 += tmp25 + MULTIPLY(z3, FIX(2.115825087)); /* c4+c6 */
+ tmp23 += tmp25 - MULTIPLY(z1, FIX(1.513598477)); /* c6+c8 */
+ tmp24 += tmp25;
+ tmp22 = tmp24 - MULTIPLY(z3, FIX(0.788749120)); /* c8+c10 */
+ tmp24 += MULTIPLY(z2, FIX(1.944413522)) - /* c2+c8 */
+ MULTIPLY(z1, FIX(1.390975730)); /* c4+c10 */
+ tmp25 = tmp10 - MULTIPLY(z4, FIX(1.414213562)); /* c0 */
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp11 = z1 + z2;
+ tmp14 = MULTIPLY(tmp11 + z3 + z4, FIX(0.398430003)); /* c9 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.887983902)); /* c3-c9 */
+ tmp12 = MULTIPLY(z1 + z3, FIX(0.670361295)); /* c5-c9 */
+ tmp13 = tmp14 + MULTIPLY(z1 + z4, FIX(0.366151574)); /* c7-c9 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(z1, FIX(0.923107866)); /* c7+c5+c3-c1-2*c9 */
+ z1 = tmp14 - MULTIPLY(z2 + z3, FIX(1.163011579)); /* c7+c9 */
+ tmp11 += z1 + MULTIPLY(z2, FIX(2.073276588)); /* c1+c7+3*c9-c3 */
+ tmp12 += z1 - MULTIPLY(z3, FIX(1.192193623)); /* c3+c5-c7-c9 */
+ z1 = MULTIPLY(z2 + z4, - FIX(1.798248910)); /* -(c1+c9) */
+ tmp11 += z1;
+ tmp13 += z1 + MULTIPLY(z4, FIX(2.102458632)); /* c1+c5+c9-c7 */
+ tmp14 += MULTIPLY(z2, - FIX(1.467221301)) + /* -(c5+c9) */
+ MULTIPLY(z3, FIX(1.001388905)) - /* c1-c9 */
+ MULTIPLY(z4, FIX(1.684843907)); /* c3+c9 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*10] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp25, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 11 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 11; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp10 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp10 <<= CONST_BITS;
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[4];
+ z3 = (INT32) wsptr[6];
+
+ tmp20 = MULTIPLY(z2 - z3, FIX(2.546640132)); /* c2+c4 */
+ tmp23 = MULTIPLY(z2 - z1, FIX(0.430815045)); /* c2-c6 */
+ z4 = z1 + z3;
+ tmp24 = MULTIPLY(z4, - FIX(1.155664402)); /* -(c2-c10) */
+ z4 -= z2;
+ tmp25 = tmp10 + MULTIPLY(z4, FIX(1.356927976)); /* c2 */
+ tmp21 = tmp20 + tmp23 + tmp25 -
+ MULTIPLY(z2, FIX(1.821790775)); /* c2+c4+c10-c6 */
+ tmp20 += tmp25 + MULTIPLY(z3, FIX(2.115825087)); /* c4+c6 */
+ tmp23 += tmp25 - MULTIPLY(z1, FIX(1.513598477)); /* c6+c8 */
+ tmp24 += tmp25;
+ tmp22 = tmp24 - MULTIPLY(z3, FIX(0.788749120)); /* c8+c10 */
+ tmp24 += MULTIPLY(z2, FIX(1.944413522)) - /* c2+c8 */
+ MULTIPLY(z1, FIX(1.390975730)); /* c4+c10 */
+ tmp25 = tmp10 - MULTIPLY(z4, FIX(1.414213562)); /* c0 */
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = z1 + z2;
+ tmp14 = MULTIPLY(tmp11 + z3 + z4, FIX(0.398430003)); /* c9 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.887983902)); /* c3-c9 */
+ tmp12 = MULTIPLY(z1 + z3, FIX(0.670361295)); /* c5-c9 */
+ tmp13 = tmp14 + MULTIPLY(z1 + z4, FIX(0.366151574)); /* c7-c9 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(z1, FIX(0.923107866)); /* c7+c5+c3-c1-2*c9 */
+ z1 = tmp14 - MULTIPLY(z2 + z3, FIX(1.163011579)); /* c7+c9 */
+ tmp11 += z1 + MULTIPLY(z2, FIX(2.073276588)); /* c1+c7+3*c9-c3 */
+ tmp12 += z1 - MULTIPLY(z3, FIX(1.192193623)); /* c3+c5-c7-c9 */
+ z1 = MULTIPLY(z2 + z4, - FIX(1.798248910)); /* -(c1+c9) */
+ tmp11 += z1;
+ tmp13 += z1 + MULTIPLY(z4, FIX(2.102458632)); /* c1+c5+c9-c7 */
+ tmp14 += MULTIPLY(z2, - FIX(1.467221301)) + /* -(c5+c9) */
+ MULTIPLY(z3, FIX(1.001388905)) - /* c1-c9 */
+ MULTIPLY(z4, FIX(1.684843907)); /* c3+c9 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -1647,209 +1647,209 @@ jpeg_idct_11x11 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_12x12 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*12]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z3 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z3 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
-
- tmp10 = z3 + z4;
- tmp11 = z3 - z4;
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*12]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z3 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z3 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
+
+ tmp10 = z3 + z4;
+ tmp11 = z3 - z4;
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
- z1 <<= CONST_BITS;
- z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
- z2 <<= CONST_BITS;
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
+ z1 <<= CONST_BITS;
+ z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+ z2 <<= CONST_BITS;
- tmp12 = z1 - z2;
+ tmp12 = z1 - z2;
- tmp21 = z3 + tmp12;
- tmp24 = z3 - tmp12;
+ tmp21 = z3 + tmp12;
+ tmp24 = z3 - tmp12;
- tmp12 = z4 + z2;
+ tmp12 = z4 + z2;
- tmp20 = tmp10 + tmp12;
- tmp25 = tmp10 - tmp12;
+ tmp20 = tmp10 + tmp12;
+ tmp25 = tmp10 - tmp12;
- tmp12 = z4 - z1 - z2;
-
- tmp22 = tmp11 + tmp12;
- tmp23 = tmp11 - tmp12;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
- tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
-
- tmp10 = z1 + z3;
- tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
- tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
- tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
- tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
- tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
- tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
- tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
- MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
-
- z1 -= z4;
- z2 -= z3;
- z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
- tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
- tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*11] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*10] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 12 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 12; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z3 <<= CONST_BITS;
-
- z4 = (INT32) wsptr[4];
- z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
-
- tmp10 = z3 + z4;
- tmp11 = z3 - z4;
-
- z1 = (INT32) wsptr[2];
- z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
- z1 <<= CONST_BITS;
- z2 = (INT32) wsptr[6];
- z2 <<= CONST_BITS;
-
- tmp12 = z1 - z2;
-
- tmp21 = z3 + tmp12;
- tmp24 = z3 - tmp12;
-
- tmp12 = z4 + z2;
-
- tmp20 = tmp10 + tmp12;
- tmp25 = tmp10 - tmp12;
-
- tmp12 = z4 - z1 - z2;
-
- tmp22 = tmp11 + tmp12;
- tmp23 = tmp11 - tmp12;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
-
- tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
- tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
-
- tmp10 = z1 + z3;
- tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
- tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
- tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
- tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
- tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
- tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
- tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
- MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
-
- z1 -= z4;
- z2 -= z3;
- z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
- tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
- tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ tmp12 = z4 - z1 - z2;
+
+ tmp22 = tmp11 + tmp12;
+ tmp23 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
+ tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
+
+ tmp10 = z1 + z3;
+ tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
+ tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
+ tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
+ tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
+ tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
+ tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
+ tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
+ MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
+
+ z1 -= z4;
+ z2 -= z3;
+ z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
+ tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
+ tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*11] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*10] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 12 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 12; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z3 <<= CONST_BITS;
+
+ z4 = (INT32) wsptr[4];
+ z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
+
+ tmp10 = z3 + z4;
+ tmp11 = z3 - z4;
+
+ z1 = (INT32) wsptr[2];
+ z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
+ z1 <<= CONST_BITS;
+ z2 = (INT32) wsptr[6];
+ z2 <<= CONST_BITS;
+
+ tmp12 = z1 - z2;
+
+ tmp21 = z3 + tmp12;
+ tmp24 = z3 - tmp12;
+
+ tmp12 = z4 + z2;
+
+ tmp20 = tmp10 + tmp12;
+ tmp25 = tmp10 - tmp12;
+
+ tmp12 = z4 - z1 - z2;
+
+ tmp22 = tmp11 + tmp12;
+ tmp23 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
+ tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
+
+ tmp10 = z1 + z3;
+ tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
+ tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
+ tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
+ tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
+ tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
+ tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
+ tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
+ MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
+
+ z1 -= z4;
+ z2 -= z3;
+ z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
+ tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
+ tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -1863,221 +1863,221 @@ jpeg_idct_12x12 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_13x13 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*13]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z1 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp10 = z3 + z4;
- tmp11 = z3 - z4;
-
- tmp12 = MULTIPLY(tmp10, FIX(1.155388986)); /* (c4+c6)/2 */
- tmp13 = MULTIPLY(tmp11, FIX(0.096834934)) + z1; /* (c4-c6)/2 */
-
- tmp20 = MULTIPLY(z2, FIX(1.373119086)) + tmp12 + tmp13; /* c2 */
- tmp22 = MULTIPLY(z2, FIX(0.501487041)) - tmp12 + tmp13; /* c10 */
-
- tmp12 = MULTIPLY(tmp10, FIX(0.316450131)); /* (c8-c12)/2 */
- tmp13 = MULTIPLY(tmp11, FIX(0.486914739)) + z1; /* (c8+c12)/2 */
-
- tmp21 = MULTIPLY(z2, FIX(1.058554052)) - tmp12 + tmp13; /* c6 */
- tmp25 = MULTIPLY(z2, - FIX(1.252223920)) + tmp12 + tmp13; /* c4 */
-
- tmp12 = MULTIPLY(tmp10, FIX(0.435816023)); /* (c2-c10)/2 */
- tmp13 = MULTIPLY(tmp11, FIX(0.937303064)) - z1; /* (c2+c10)/2 */
-
- tmp23 = MULTIPLY(z2, - FIX(0.170464608)) - tmp12 - tmp13; /* c12 */
- tmp24 = MULTIPLY(z2, - FIX(0.803364869)) + tmp12 - tmp13; /* c8 */
-
- tmp26 = MULTIPLY(tmp11 - z2, FIX(1.414213562)) + z1; /* c0 */
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp11 = MULTIPLY(z1 + z2, FIX(1.322312651)); /* c3 */
- tmp12 = MULTIPLY(z1 + z3, FIX(1.163874945)); /* c5 */
- tmp15 = z1 + z4;
- tmp13 = MULTIPLY(tmp15, FIX(0.937797057)); /* c7 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(z1, FIX(2.020082300)); /* c7+c5+c3-c1 */
- tmp14 = MULTIPLY(z2 + z3, - FIX(0.338443458)); /* -c11 */
- tmp11 += tmp14 + MULTIPLY(z2, FIX(0.837223564)); /* c5+c9+c11-c3 */
- tmp12 += tmp14 - MULTIPLY(z3, FIX(1.572116027)); /* c1+c5-c9-c11 */
- tmp14 = MULTIPLY(z2 + z4, - FIX(1.163874945)); /* -c5 */
- tmp11 += tmp14;
- tmp13 += tmp14 + MULTIPLY(z4, FIX(2.205608352)); /* c3+c5+c9-c7 */
- tmp14 = MULTIPLY(z3 + z4, - FIX(0.657217813)); /* -c9 */
- tmp12 += tmp14;
- tmp13 += tmp14;
- tmp15 = MULTIPLY(tmp15, FIX(0.338443458)); /* c11 */
- tmp14 = tmp15 + MULTIPLY(z1, FIX(0.318774355)) - /* c9-c11 */
- MULTIPLY(z2, FIX(0.466105296)); /* c1-c7 */
- z1 = MULTIPLY(z3 - z2, FIX(0.937797057)); /* c7 */
- tmp14 += z1;
- tmp15 += z1 + MULTIPLY(z3, FIX(0.384515595)) - /* c3-c7 */
- MULTIPLY(z4, FIX(1.742345811)); /* c1+c11 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*12] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*11] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*10] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp26, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 13 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 13; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z1 <<= CONST_BITS;
-
- z2 = (INT32) wsptr[2];
- z3 = (INT32) wsptr[4];
- z4 = (INT32) wsptr[6];
-
- tmp10 = z3 + z4;
- tmp11 = z3 - z4;
-
- tmp12 = MULTIPLY(tmp10, FIX(1.155388986)); /* (c4+c6)/2 */
- tmp13 = MULTIPLY(tmp11, FIX(0.096834934)) + z1; /* (c4-c6)/2 */
-
- tmp20 = MULTIPLY(z2, FIX(1.373119086)) + tmp12 + tmp13; /* c2 */
- tmp22 = MULTIPLY(z2, FIX(0.501487041)) - tmp12 + tmp13; /* c10 */
-
- tmp12 = MULTIPLY(tmp10, FIX(0.316450131)); /* (c8-c12)/2 */
- tmp13 = MULTIPLY(tmp11, FIX(0.486914739)) + z1; /* (c8+c12)/2 */
-
- tmp21 = MULTIPLY(z2, FIX(1.058554052)) - tmp12 + tmp13; /* c6 */
- tmp25 = MULTIPLY(z2, - FIX(1.252223920)) + tmp12 + tmp13; /* c4 */
-
- tmp12 = MULTIPLY(tmp10, FIX(0.435816023)); /* (c2-c10)/2 */
- tmp13 = MULTIPLY(tmp11, FIX(0.937303064)) - z1; /* (c2+c10)/2 */
-
- tmp23 = MULTIPLY(z2, - FIX(0.170464608)) - tmp12 - tmp13; /* c12 */
- tmp24 = MULTIPLY(z2, - FIX(0.803364869)) + tmp12 - tmp13; /* c8 */
-
- tmp26 = MULTIPLY(tmp11 - z2, FIX(1.414213562)) + z1; /* c0 */
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
-
- tmp11 = MULTIPLY(z1 + z2, FIX(1.322312651)); /* c3 */
- tmp12 = MULTIPLY(z1 + z3, FIX(1.163874945)); /* c5 */
- tmp15 = z1 + z4;
- tmp13 = MULTIPLY(tmp15, FIX(0.937797057)); /* c7 */
- tmp10 = tmp11 + tmp12 + tmp13 -
- MULTIPLY(z1, FIX(2.020082300)); /* c7+c5+c3-c1 */
- tmp14 = MULTIPLY(z2 + z3, - FIX(0.338443458)); /* -c11 */
- tmp11 += tmp14 + MULTIPLY(z2, FIX(0.837223564)); /* c5+c9+c11-c3 */
- tmp12 += tmp14 - MULTIPLY(z3, FIX(1.572116027)); /* c1+c5-c9-c11 */
- tmp14 = MULTIPLY(z2 + z4, - FIX(1.163874945)); /* -c5 */
- tmp11 += tmp14;
- tmp13 += tmp14 + MULTIPLY(z4, FIX(2.205608352)); /* c3+c5+c9-c7 */
- tmp14 = MULTIPLY(z3 + z4, - FIX(0.657217813)); /* -c9 */
- tmp12 += tmp14;
- tmp13 += tmp14;
- tmp15 = MULTIPLY(tmp15, FIX(0.338443458)); /* c11 */
- tmp14 = tmp15 + MULTIPLY(z1, FIX(0.318774355)) - /* c9-c11 */
- MULTIPLY(z2, FIX(0.466105296)); /* c1-c7 */
- z1 = MULTIPLY(z3 - z2, FIX(0.937797057)); /* c7 */
- tmp14 += z1;
- tmp15 += z1 + MULTIPLY(z3, FIX(0.384515595)) - /* c3-c7 */
- MULTIPLY(z4, FIX(1.742345811)); /* c1+c11 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*13]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z1 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp10 = z3 + z4;
+ tmp11 = z3 - z4;
+
+ tmp12 = MULTIPLY(tmp10, FIX(1.155388986)); /* (c4+c6)/2 */
+ tmp13 = MULTIPLY(tmp11, FIX(0.096834934)) + z1; /* (c4-c6)/2 */
+
+ tmp20 = MULTIPLY(z2, FIX(1.373119086)) + tmp12 + tmp13; /* c2 */
+ tmp22 = MULTIPLY(z2, FIX(0.501487041)) - tmp12 + tmp13; /* c10 */
+
+ tmp12 = MULTIPLY(tmp10, FIX(0.316450131)); /* (c8-c12)/2 */
+ tmp13 = MULTIPLY(tmp11, FIX(0.486914739)) + z1; /* (c8+c12)/2 */
+
+ tmp21 = MULTIPLY(z2, FIX(1.058554052)) - tmp12 + tmp13; /* c6 */
+ tmp25 = MULTIPLY(z2, - FIX(1.252223920)) + tmp12 + tmp13; /* c4 */
+
+ tmp12 = MULTIPLY(tmp10, FIX(0.435816023)); /* (c2-c10)/2 */
+ tmp13 = MULTIPLY(tmp11, FIX(0.937303064)) - z1; /* (c2+c10)/2 */
+
+ tmp23 = MULTIPLY(z2, - FIX(0.170464608)) - tmp12 - tmp13; /* c12 */
+ tmp24 = MULTIPLY(z2, - FIX(0.803364869)) + tmp12 - tmp13; /* c8 */
+
+ tmp26 = MULTIPLY(tmp11 - z2, FIX(1.414213562)) + z1; /* c0 */
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp11 = MULTIPLY(z1 + z2, FIX(1.322312651)); /* c3 */
+ tmp12 = MULTIPLY(z1 + z3, FIX(1.163874945)); /* c5 */
+ tmp15 = z1 + z4;
+ tmp13 = MULTIPLY(tmp15, FIX(0.937797057)); /* c7 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(z1, FIX(2.020082300)); /* c7+c5+c3-c1 */
+ tmp14 = MULTIPLY(z2 + z3, - FIX(0.338443458)); /* -c11 */
+ tmp11 += tmp14 + MULTIPLY(z2, FIX(0.837223564)); /* c5+c9+c11-c3 */
+ tmp12 += tmp14 - MULTIPLY(z3, FIX(1.572116027)); /* c1+c5-c9-c11 */
+ tmp14 = MULTIPLY(z2 + z4, - FIX(1.163874945)); /* -c5 */
+ tmp11 += tmp14;
+ tmp13 += tmp14 + MULTIPLY(z4, FIX(2.205608352)); /* c3+c5+c9-c7 */
+ tmp14 = MULTIPLY(z3 + z4, - FIX(0.657217813)); /* -c9 */
+ tmp12 += tmp14;
+ tmp13 += tmp14;
+ tmp15 = MULTIPLY(tmp15, FIX(0.338443458)); /* c11 */
+ tmp14 = tmp15 + MULTIPLY(z1, FIX(0.318774355)) - /* c9-c11 */
+ MULTIPLY(z2, FIX(0.466105296)); /* c1-c7 */
+ z1 = MULTIPLY(z3 - z2, FIX(0.937797057)); /* c7 */
+ tmp14 += z1;
+ tmp15 += z1 + MULTIPLY(z3, FIX(0.384515595)) - /* c3-c7 */
+ MULTIPLY(z4, FIX(1.742345811)); /* c1+c11 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*12] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*11] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*10] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp26, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 13 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 13; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z1 <<= CONST_BITS;
+
+ z2 = (INT32) wsptr[2];
+ z3 = (INT32) wsptr[4];
+ z4 = (INT32) wsptr[6];
+
+ tmp10 = z3 + z4;
+ tmp11 = z3 - z4;
+
+ tmp12 = MULTIPLY(tmp10, FIX(1.155388986)); /* (c4+c6)/2 */
+ tmp13 = MULTIPLY(tmp11, FIX(0.096834934)) + z1; /* (c4-c6)/2 */
+
+ tmp20 = MULTIPLY(z2, FIX(1.373119086)) + tmp12 + tmp13; /* c2 */
+ tmp22 = MULTIPLY(z2, FIX(0.501487041)) - tmp12 + tmp13; /* c10 */
+
+ tmp12 = MULTIPLY(tmp10, FIX(0.316450131)); /* (c8-c12)/2 */
+ tmp13 = MULTIPLY(tmp11, FIX(0.486914739)) + z1; /* (c8+c12)/2 */
+
+ tmp21 = MULTIPLY(z2, FIX(1.058554052)) - tmp12 + tmp13; /* c6 */
+ tmp25 = MULTIPLY(z2, - FIX(1.252223920)) + tmp12 + tmp13; /* c4 */
+
+ tmp12 = MULTIPLY(tmp10, FIX(0.435816023)); /* (c2-c10)/2 */
+ tmp13 = MULTIPLY(tmp11, FIX(0.937303064)) - z1; /* (c2+c10)/2 */
+
+ tmp23 = MULTIPLY(z2, - FIX(0.170464608)) - tmp12 - tmp13; /* c12 */
+ tmp24 = MULTIPLY(z2, - FIX(0.803364869)) + tmp12 - tmp13; /* c8 */
+
+ tmp26 = MULTIPLY(tmp11 - z2, FIX(1.414213562)) + z1; /* c0 */
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = MULTIPLY(z1 + z2, FIX(1.322312651)); /* c3 */
+ tmp12 = MULTIPLY(z1 + z3, FIX(1.163874945)); /* c5 */
+ tmp15 = z1 + z4;
+ tmp13 = MULTIPLY(tmp15, FIX(0.937797057)); /* c7 */
+ tmp10 = tmp11 + tmp12 + tmp13 -
+ MULTIPLY(z1, FIX(2.020082300)); /* c7+c5+c3-c1 */
+ tmp14 = MULTIPLY(z2 + z3, - FIX(0.338443458)); /* -c11 */
+ tmp11 += tmp14 + MULTIPLY(z2, FIX(0.837223564)); /* c5+c9+c11-c3 */
+ tmp12 += tmp14 - MULTIPLY(z3, FIX(1.572116027)); /* c1+c5-c9-c11 */
+ tmp14 = MULTIPLY(z2 + z4, - FIX(1.163874945)); /* -c5 */
+ tmp11 += tmp14;
+ tmp13 += tmp14 + MULTIPLY(z4, FIX(2.205608352)); /* c3+c5+c9-c7 */
+ tmp14 = MULTIPLY(z3 + z4, - FIX(0.657217813)); /* -c9 */
+ tmp12 += tmp14;
+ tmp13 += tmp14;
+ tmp15 = MULTIPLY(tmp15, FIX(0.338443458)); /* c11 */
+ tmp14 = tmp15 + MULTIPLY(z1, FIX(0.318774355)) - /* c9-c11 */
+ MULTIPLY(z2, FIX(0.466105296)); /* c1-c7 */
+ z1 = MULTIPLY(z3 - z2, FIX(0.937797057)); /* c7 */
+ tmp14 += z1;
+ tmp15 += z1 + MULTIPLY(z3, FIX(0.384515595)) - /* c3-c7 */
+ MULTIPLY(z4, FIX(1.742345811)); /* c1+c11 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -2091,219 +2091,219 @@ jpeg_idct_13x13 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_14x14 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*14]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z1 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
- z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
- z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
- z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
-
- tmp10 = z1 + z2;
- tmp11 = z1 + z3;
- tmp12 = z1 - z4;
-
- tmp23 = RIGHT_SHIFT(z1 - ((z2 + z3 - z4) << 1), /* c0 = (c4+c12-c8)*2 */
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*14]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z1 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
+ z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
+ z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
+
+ tmp10 = z1 + z2;
+ tmp11 = z1 + z3;
+ tmp12 = z1 - z4;
+
+ tmp23 = RIGHT_SHIFT(z1 - ((z2 + z3 - z4) << 1), /* c0 = (c4+c12-c8)*2 */
CONST_BITS-PASS1_BITS);
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
-
- tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
- tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
- tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
- MULTIPLY(z2, FIX(1.378756276)); /* c2 */
-
- tmp20 = tmp10 + tmp13;
- tmp26 = tmp10 - tmp13;
- tmp21 = tmp11 + tmp14;
- tmp25 = tmp11 - tmp14;
- tmp22 = tmp12 + tmp15;
- tmp24 = tmp12 - tmp15;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
- tmp13 = z4 << CONST_BITS;
-
- tmp14 = z1 + z3;
- tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
- tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
- tmp10 = tmp11 + tmp12 + tmp13 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
- tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
- tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
- z1 -= z2;
- tmp15 = MULTIPLY(z1, FIX(0.467085129)) - tmp13; /* c11 */
- tmp16 += tmp15;
- z1 += z4;
- z4 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - tmp13; /* -c13 */
- tmp11 += z4 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
- tmp12 += z4 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
- z4 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
- tmp14 += z4 + tmp13 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
- tmp15 += z4 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
-
- tmp13 = (z1 - z3) << PASS1_BITS;
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*13] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*12] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*11] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) (tmp23 + tmp13);
- wsptr[8*10] = (int) (tmp23 - tmp13);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp16, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp26 - tmp16, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 14 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 14; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z1 <<= CONST_BITS;
- z4 = (INT32) wsptr[4];
- z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
- z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
- z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
-
- tmp10 = z1 + z2;
- tmp11 = z1 + z3;
- tmp12 = z1 - z4;
-
- tmp23 = z1 - ((z2 + z3 - z4) << 1); /* c0 = (c4+c12-c8)*2 */
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[6];
-
- z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
-
- tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
- tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
- tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
- MULTIPLY(z2, FIX(1.378756276)); /* c2 */
-
- tmp20 = tmp10 + tmp13;
- tmp26 = tmp10 - tmp13;
- tmp21 = tmp11 + tmp14;
- tmp25 = tmp11 - tmp14;
- tmp22 = tmp12 + tmp15;
- tmp24 = tmp12 - tmp15;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
- z4 <<= CONST_BITS;
-
- tmp14 = z1 + z3;
- tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
- tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
- tmp10 = tmp11 + tmp12 + z4 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
- tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
- tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
- z1 -= z2;
- tmp15 = MULTIPLY(z1, FIX(0.467085129)) - z4; /* c11 */
- tmp16 += tmp15;
- tmp13 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - z4; /* -c13 */
- tmp11 += tmp13 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
- tmp12 += tmp13 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
- tmp13 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
- tmp14 += tmp13 + z4 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
- tmp15 += tmp13 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
-
- tmp13 = ((z1 - z3) << CONST_BITS) + z4;
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp16,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp16,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
+
+ tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
+ tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
+ tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
+ MULTIPLY(z2, FIX(1.378756276)); /* c2 */
+
+ tmp20 = tmp10 + tmp13;
+ tmp26 = tmp10 - tmp13;
+ tmp21 = tmp11 + tmp14;
+ tmp25 = tmp11 - tmp14;
+ tmp22 = tmp12 + tmp15;
+ tmp24 = tmp12 - tmp15;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+ tmp13 = z4 << CONST_BITS;
+
+ tmp14 = z1 + z3;
+ tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
+ tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
+ tmp10 = tmp11 + tmp12 + tmp13 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
+ tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
+ tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
+ z1 -= z2;
+ tmp15 = MULTIPLY(z1, FIX(0.467085129)) - tmp13; /* c11 */
+ tmp16 += tmp15;
+ z1 += z4;
+ z4 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - tmp13; /* -c13 */
+ tmp11 += z4 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
+ tmp12 += z4 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
+ z4 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
+ tmp14 += z4 + tmp13 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
+ tmp15 += z4 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
+
+ tmp13 = (z1 - z3) << PASS1_BITS;
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*13] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*12] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*11] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) (tmp23 + tmp13);
+ wsptr[8*10] = (int) (tmp23 - tmp13);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp16, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp26 - tmp16, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 14 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 14; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z1 <<= CONST_BITS;
+ z4 = (INT32) wsptr[4];
+ z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
+ z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
+ z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
+
+ tmp10 = z1 + z2;
+ tmp11 = z1 + z3;
+ tmp12 = z1 - z4;
+
+ tmp23 = z1 - ((z2 + z3 - z4) << 1); /* c0 = (c4+c12-c8)*2 */
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[6];
+
+ z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
+
+ tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
+ tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
+ tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
+ MULTIPLY(z2, FIX(1.378756276)); /* c2 */
+
+ tmp20 = tmp10 + tmp13;
+ tmp26 = tmp10 - tmp13;
+ tmp21 = tmp11 + tmp14;
+ tmp25 = tmp11 - tmp14;
+ tmp22 = tmp12 + tmp15;
+ tmp24 = tmp12 - tmp15;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+ z4 <<= CONST_BITS;
+
+ tmp14 = z1 + z3;
+ tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
+ tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
+ tmp10 = tmp11 + tmp12 + z4 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
+ tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
+ tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
+ z1 -= z2;
+ tmp15 = MULTIPLY(z1, FIX(0.467085129)) - z4; /* c11 */
+ tmp16 += tmp15;
+ tmp13 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - z4; /* -c13 */
+ tmp11 += tmp13 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
+ tmp12 += tmp13 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
+ tmp13 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
+ tmp14 += tmp13 + z4 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
+ tmp15 += tmp13 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
+
+ tmp13 = ((z1 - z3) << CONST_BITS) + z4;
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp16,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp16,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -2317,235 +2317,235 @@ jpeg_idct_14x14 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_15x15 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*15]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z1 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp10 = MULTIPLY(z4, FIX(0.437016024)); /* c12 */
- tmp11 = MULTIPLY(z4, FIX(1.144122806)); /* c6 */
-
- tmp12 = z1 - tmp10;
- tmp13 = z1 + tmp11;
- z1 -= (tmp11 - tmp10) << 1; /* c0 = (c6-c12)*2 */
-
- z4 = z2 - z3;
- z3 += z2;
- tmp10 = MULTIPLY(z3, FIX(1.337628990)); /* (c2+c4)/2 */
- tmp11 = MULTIPLY(z4, FIX(0.045680613)); /* (c2-c4)/2 */
- z2 = MULTIPLY(z2, FIX(1.439773946)); /* c4+c14 */
-
- tmp20 = tmp13 + tmp10 + tmp11;
- tmp23 = tmp12 - tmp10 + tmp11 + z2;
-
- tmp10 = MULTIPLY(z3, FIX(0.547059574)); /* (c8+c14)/2 */
- tmp11 = MULTIPLY(z4, FIX(0.399234004)); /* (c8-c14)/2 */
-
- tmp25 = tmp13 - tmp10 - tmp11;
- tmp26 = tmp12 + tmp10 - tmp11 - z2;
-
- tmp10 = MULTIPLY(z3, FIX(0.790569415)); /* (c6+c12)/2 */
- tmp11 = MULTIPLY(z4, FIX(0.353553391)); /* (c6-c12)/2 */
-
- tmp21 = tmp12 + tmp10 + tmp11;
- tmp24 = tmp13 - tmp10 + tmp11;
- tmp11 += tmp11;
- tmp22 = z1 + tmp11; /* c10 = c6-c12 */
- tmp27 = z1 - tmp11 - tmp11; /* c0 = (c6-c12)*2 */
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z3 = MULTIPLY(z4, FIX(1.224744871)); /* c5 */
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp13 = z2 - z4;
- tmp15 = MULTIPLY(z1 + tmp13, FIX(0.831253876)); /* c9 */
- tmp11 = tmp15 + MULTIPLY(z1, FIX(0.513743148)); /* c3-c9 */
- tmp14 = tmp15 - MULTIPLY(tmp13, FIX(2.176250899)); /* c3+c9 */
-
- tmp13 = MULTIPLY(z2, - FIX(0.831253876)); /* -c9 */
- tmp15 = MULTIPLY(z2, - FIX(1.344997024)); /* -c3 */
- z2 = z1 - z4;
- tmp12 = z3 + MULTIPLY(z2, FIX(1.406466353)); /* c1 */
-
- tmp10 = tmp12 + MULTIPLY(z4, FIX(2.457431844)) - tmp15; /* c1+c7 */
- tmp16 = tmp12 - MULTIPLY(z1, FIX(1.112434820)) + tmp13; /* c1-c13 */
- tmp12 = MULTIPLY(z2, FIX(1.224744871)) - z3; /* c5 */
- z2 = MULTIPLY(z1 + z4, FIX(0.575212477)); /* c11 */
- tmp13 += z2 + MULTIPLY(z1, FIX(0.475753014)) - z3; /* c7-c11 */
- tmp15 += z2 - MULTIPLY(z4, FIX(0.869244010)) + z3; /* c11+c13 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*14] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*13] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*12] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*11] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*10] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp16, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp26 - tmp16, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp27, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 15 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 15; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z1 <<= CONST_BITS;
-
- z2 = (INT32) wsptr[2];
- z3 = (INT32) wsptr[4];
- z4 = (INT32) wsptr[6];
-
- tmp10 = MULTIPLY(z4, FIX(0.437016024)); /* c12 */
- tmp11 = MULTIPLY(z4, FIX(1.144122806)); /* c6 */
-
- tmp12 = z1 - tmp10;
- tmp13 = z1 + tmp11;
- z1 -= (tmp11 - tmp10) << 1; /* c0 = (c6-c12)*2 */
-
- z4 = z2 - z3;
- z3 += z2;
- tmp10 = MULTIPLY(z3, FIX(1.337628990)); /* (c2+c4)/2 */
- tmp11 = MULTIPLY(z4, FIX(0.045680613)); /* (c2-c4)/2 */
- z2 = MULTIPLY(z2, FIX(1.439773946)); /* c4+c14 */
-
- tmp20 = tmp13 + tmp10 + tmp11;
- tmp23 = tmp12 - tmp10 + tmp11 + z2;
-
- tmp10 = MULTIPLY(z3, FIX(0.547059574)); /* (c8+c14)/2 */
- tmp11 = MULTIPLY(z4, FIX(0.399234004)); /* (c8-c14)/2 */
-
- tmp25 = tmp13 - tmp10 - tmp11;
- tmp26 = tmp12 + tmp10 - tmp11 - z2;
-
- tmp10 = MULTIPLY(z3, FIX(0.790569415)); /* (c6+c12)/2 */
- tmp11 = MULTIPLY(z4, FIX(0.353553391)); /* (c6-c12)/2 */
-
- tmp21 = tmp12 + tmp10 + tmp11;
- tmp24 = tmp13 - tmp10 + tmp11;
- tmp11 += tmp11;
- tmp22 = z1 + tmp11; /* c10 = c6-c12 */
- tmp27 = z1 - tmp11 - tmp11; /* c0 = (c6-c12)*2 */
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z4 = (INT32) wsptr[5];
- z3 = MULTIPLY(z4, FIX(1.224744871)); /* c5 */
- z4 = (INT32) wsptr[7];
-
- tmp13 = z2 - z4;
- tmp15 = MULTIPLY(z1 + tmp13, FIX(0.831253876)); /* c9 */
- tmp11 = tmp15 + MULTIPLY(z1, FIX(0.513743148)); /* c3-c9 */
- tmp14 = tmp15 - MULTIPLY(tmp13, FIX(2.176250899)); /* c3+c9 */
-
- tmp13 = MULTIPLY(z2, - FIX(0.831253876)); /* -c9 */
- tmp15 = MULTIPLY(z2, - FIX(1.344997024)); /* -c3 */
- z2 = z1 - z4;
- tmp12 = z3 + MULTIPLY(z2, FIX(1.406466353)); /* c1 */
-
- tmp10 = tmp12 + MULTIPLY(z4, FIX(2.457431844)) - tmp15; /* c1+c7 */
- tmp16 = tmp12 - MULTIPLY(z1, FIX(1.112434820)) + tmp13; /* c1-c13 */
- tmp12 = MULTIPLY(z2, FIX(1.224744871)) - z3; /* c5 */
- z2 = MULTIPLY(z1 + z4, FIX(0.575212477)); /* c11 */
- tmp13 += z2 + MULTIPLY(z1, FIX(0.475753014)) - z3; /* c7-c11 */
- tmp15 += z2 - MULTIPLY(z4, FIX(0.869244010)) + z3; /* c11+c13 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[14] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp16,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp16,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp27,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*15]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z1 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp10 = MULTIPLY(z4, FIX(0.437016024)); /* c12 */
+ tmp11 = MULTIPLY(z4, FIX(1.144122806)); /* c6 */
+
+ tmp12 = z1 - tmp10;
+ tmp13 = z1 + tmp11;
+ z1 -= (tmp11 - tmp10) << 1; /* c0 = (c6-c12)*2 */
+
+ z4 = z2 - z3;
+ z3 += z2;
+ tmp10 = MULTIPLY(z3, FIX(1.337628990)); /* (c2+c4)/2 */
+ tmp11 = MULTIPLY(z4, FIX(0.045680613)); /* (c2-c4)/2 */
+ z2 = MULTIPLY(z2, FIX(1.439773946)); /* c4+c14 */
+
+ tmp20 = tmp13 + tmp10 + tmp11;
+ tmp23 = tmp12 - tmp10 + tmp11 + z2;
+
+ tmp10 = MULTIPLY(z3, FIX(0.547059574)); /* (c8+c14)/2 */
+ tmp11 = MULTIPLY(z4, FIX(0.399234004)); /* (c8-c14)/2 */
+
+ tmp25 = tmp13 - tmp10 - tmp11;
+ tmp26 = tmp12 + tmp10 - tmp11 - z2;
+
+ tmp10 = MULTIPLY(z3, FIX(0.790569415)); /* (c6+c12)/2 */
+ tmp11 = MULTIPLY(z4, FIX(0.353553391)); /* (c6-c12)/2 */
+
+ tmp21 = tmp12 + tmp10 + tmp11;
+ tmp24 = tmp13 - tmp10 + tmp11;
+ tmp11 += tmp11;
+ tmp22 = z1 + tmp11; /* c10 = c6-c12 */
+ tmp27 = z1 - tmp11 - tmp11; /* c0 = (c6-c12)*2 */
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z3 = MULTIPLY(z4, FIX(1.224744871)); /* c5 */
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp13 = z2 - z4;
+ tmp15 = MULTIPLY(z1 + tmp13, FIX(0.831253876)); /* c9 */
+ tmp11 = tmp15 + MULTIPLY(z1, FIX(0.513743148)); /* c3-c9 */
+ tmp14 = tmp15 - MULTIPLY(tmp13, FIX(2.176250899)); /* c3+c9 */
+
+ tmp13 = MULTIPLY(z2, - FIX(0.831253876)); /* -c9 */
+ tmp15 = MULTIPLY(z2, - FIX(1.344997024)); /* -c3 */
+ z2 = z1 - z4;
+ tmp12 = z3 + MULTIPLY(z2, FIX(1.406466353)); /* c1 */
+
+ tmp10 = tmp12 + MULTIPLY(z4, FIX(2.457431844)) - tmp15; /* c1+c7 */
+ tmp16 = tmp12 - MULTIPLY(z1, FIX(1.112434820)) + tmp13; /* c1-c13 */
+ tmp12 = MULTIPLY(z2, FIX(1.224744871)) - z3; /* c5 */
+ z2 = MULTIPLY(z1 + z4, FIX(0.575212477)); /* c11 */
+ tmp13 += z2 + MULTIPLY(z1, FIX(0.475753014)) - z3; /* c7-c11 */
+ tmp15 += z2 - MULTIPLY(z4, FIX(0.869244010)) + z3; /* c11+c13 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*14] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*13] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*12] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*11] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*10] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp16, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp26 - tmp16, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp27, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 15 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 15; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z1 <<= CONST_BITS;
+
+ z2 = (INT32) wsptr[2];
+ z3 = (INT32) wsptr[4];
+ z4 = (INT32) wsptr[6];
+
+ tmp10 = MULTIPLY(z4, FIX(0.437016024)); /* c12 */
+ tmp11 = MULTIPLY(z4, FIX(1.144122806)); /* c6 */
+
+ tmp12 = z1 - tmp10;
+ tmp13 = z1 + tmp11;
+ z1 -= (tmp11 - tmp10) << 1; /* c0 = (c6-c12)*2 */
+
+ z4 = z2 - z3;
+ z3 += z2;
+ tmp10 = MULTIPLY(z3, FIX(1.337628990)); /* (c2+c4)/2 */
+ tmp11 = MULTIPLY(z4, FIX(0.045680613)); /* (c2-c4)/2 */
+ z2 = MULTIPLY(z2, FIX(1.439773946)); /* c4+c14 */
+
+ tmp20 = tmp13 + tmp10 + tmp11;
+ tmp23 = tmp12 - tmp10 + tmp11 + z2;
+
+ tmp10 = MULTIPLY(z3, FIX(0.547059574)); /* (c8+c14)/2 */
+ tmp11 = MULTIPLY(z4, FIX(0.399234004)); /* (c8-c14)/2 */
+
+ tmp25 = tmp13 - tmp10 - tmp11;
+ tmp26 = tmp12 + tmp10 - tmp11 - z2;
+
+ tmp10 = MULTIPLY(z3, FIX(0.790569415)); /* (c6+c12)/2 */
+ tmp11 = MULTIPLY(z4, FIX(0.353553391)); /* (c6-c12)/2 */
+
+ tmp21 = tmp12 + tmp10 + tmp11;
+ tmp24 = tmp13 - tmp10 + tmp11;
+ tmp11 += tmp11;
+ tmp22 = z1 + tmp11; /* c10 = c6-c12 */
+ tmp27 = z1 - tmp11 - tmp11; /* c0 = (c6-c12)*2 */
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z4 = (INT32) wsptr[5];
+ z3 = MULTIPLY(z4, FIX(1.224744871)); /* c5 */
+ z4 = (INT32) wsptr[7];
+
+ tmp13 = z2 - z4;
+ tmp15 = MULTIPLY(z1 + tmp13, FIX(0.831253876)); /* c9 */
+ tmp11 = tmp15 + MULTIPLY(z1, FIX(0.513743148)); /* c3-c9 */
+ tmp14 = tmp15 - MULTIPLY(tmp13, FIX(2.176250899)); /* c3+c9 */
+
+ tmp13 = MULTIPLY(z2, - FIX(0.831253876)); /* -c9 */
+ tmp15 = MULTIPLY(z2, - FIX(1.344997024)); /* -c3 */
+ z2 = z1 - z4;
+ tmp12 = z3 + MULTIPLY(z2, FIX(1.406466353)); /* c1 */
+
+ tmp10 = tmp12 + MULTIPLY(z4, FIX(2.457431844)) - tmp15; /* c1+c7 */
+ tmp16 = tmp12 - MULTIPLY(z1, FIX(1.112434820)) + tmp13; /* c1-c13 */
+ tmp12 = MULTIPLY(z2, FIX(1.224744871)) - z3; /* c5 */
+ z2 = MULTIPLY(z1 + z4, FIX(0.575212477)); /* c11 */
+ tmp13 += z2 + MULTIPLY(z1, FIX(0.475753014)) - z3; /* c7-c11 */
+ tmp15 += z2 - MULTIPLY(z4, FIX(0.869244010)) + z3; /* c11+c13 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[14] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp16,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp16,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp27,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -2559,255 +2559,255 @@ jpeg_idct_15x15 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_16x16 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*16]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp0 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp0 += 1 << (CONST_BITS-PASS1_BITS-1);
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
- tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
- z3 = z1 - z2;
- z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
- z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
- tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
- tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
- tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
-
- tmp20 = tmp10 + tmp0;
- tmp27 = tmp10 - tmp0;
- tmp21 = tmp12 + tmp1;
- tmp26 = tmp12 - tmp1;
- tmp22 = tmp13 + tmp2;
- tmp25 = tmp13 - tmp2;
- tmp23 = tmp11 + tmp3;
- tmp24 = tmp11 - tmp3;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp11 = z1 + z3;
-
- tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
- tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
- tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
- tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
- tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
- tmp0 = tmp1 + tmp2 + tmp3 -
- MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
- tmp13 = tmp10 + tmp11 + tmp12 -
- MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
- z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
- tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
- tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
- z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
- tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
- tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
- z2 += z4;
- z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
- tmp1 += z1;
- tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
- z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
- tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
- tmp12 += z2;
- z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
- tmp2 += z2;
- tmp3 += z2;
- z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
- tmp10 += z2;
- tmp11 += z2;
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[8*15] = (int) RIGHT_SHIFT(tmp20 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[8*14] = (int) RIGHT_SHIFT(tmp21 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[8*13] = (int) RIGHT_SHIFT(tmp22 - tmp2, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp3, CONST_BITS-PASS1_BITS);
- wsptr[8*12] = (int) RIGHT_SHIFT(tmp23 - tmp3, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*11] = (int) RIGHT_SHIFT(tmp24 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*10] = (int) RIGHT_SHIFT(tmp25 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp26 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp27 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp27 - tmp13, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 16 rows from work array, store into output array. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 16; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp0 <<= CONST_BITS;
-
- z1 = (INT32) wsptr[4];
- tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
- tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[6];
- z3 = z1 - z2;
- z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
- z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
- tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
- tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
- tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
-
- tmp20 = tmp10 + tmp0;
- tmp27 = tmp10 - tmp0;
- tmp21 = tmp12 + tmp1;
- tmp26 = tmp12 - tmp1;
- tmp22 = tmp13 + tmp2;
- tmp25 = tmp13 - tmp2;
- tmp23 = tmp11 + tmp3;
- tmp24 = tmp11 - tmp3;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
-
- tmp11 = z1 + z3;
-
- tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
- tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
- tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
- tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
- tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
- tmp0 = tmp1 + tmp2 + tmp3 -
- MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
- tmp13 = tmp10 + tmp11 + tmp12 -
- MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
- z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
- tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
- tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
- z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
- tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
- tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
- z2 += z4;
- z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
- tmp1 += z1;
- tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
- z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
- tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
- tmp12 += z2;
- z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
- tmp2 += z2;
- tmp3 += z2;
- z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
- tmp10 += z2;
- tmp11 += z2;
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[15] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[14] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp27 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp27 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*16]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp0 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp0 += 1 << (CONST_BITS-PASS1_BITS-1);
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
+ tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+ z3 = z1 - z2;
+ z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
+ z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
+ tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
+ tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
+ tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
+
+ tmp20 = tmp10 + tmp0;
+ tmp27 = tmp10 - tmp0;
+ tmp21 = tmp12 + tmp1;
+ tmp26 = tmp12 - tmp1;
+ tmp22 = tmp13 + tmp2;
+ tmp25 = tmp13 - tmp2;
+ tmp23 = tmp11 + tmp3;
+ tmp24 = tmp11 - tmp3;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp11 = z1 + z3;
+
+ tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
+ tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
+ tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
+ tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
+ tmp0 = tmp1 + tmp2 + tmp3 -
+ MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
+ tmp13 = tmp10 + tmp11 + tmp12 -
+ MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
+ z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
+ tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
+ tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
+ z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
+ tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
+ tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
+ z2 += z4;
+ z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
+ tmp1 += z1;
+ tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
+ z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
+ tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
+ tmp12 += z2;
+ z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
+ tmp2 += z2;
+ tmp3 += z2;
+ z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
+ tmp10 += z2;
+ tmp11 += z2;
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[8*15] = (int) RIGHT_SHIFT(tmp20 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[8*14] = (int) RIGHT_SHIFT(tmp21 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[8*13] = (int) RIGHT_SHIFT(tmp22 - tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[8*12] = (int) RIGHT_SHIFT(tmp23 - tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*11] = (int) RIGHT_SHIFT(tmp24 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*10] = (int) RIGHT_SHIFT(tmp25 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp26 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp27 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp27 - tmp13, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 16 rows from work array, store into output array. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 16; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp0 <<= CONST_BITS;
+
+ z1 = (INT32) wsptr[4];
+ tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
+ tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[6];
+ z3 = z1 - z2;
+ z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
+ z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
+ tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
+ tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
+ tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
+
+ tmp20 = tmp10 + tmp0;
+ tmp27 = tmp10 - tmp0;
+ tmp21 = tmp12 + tmp1;
+ tmp26 = tmp12 - tmp1;
+ tmp22 = tmp13 + tmp2;
+ tmp25 = tmp13 - tmp2;
+ tmp23 = tmp11 + tmp3;
+ tmp24 = tmp11 - tmp3;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = z1 + z3;
+
+ tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
+ tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
+ tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
+ tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
+ tmp0 = tmp1 + tmp2 + tmp3 -
+ MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
+ tmp13 = tmp10 + tmp11 + tmp12 -
+ MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
+ z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
+ tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
+ tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
+ z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
+ tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
+ tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
+ z2 += z4;
+ z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
+ tmp1 += z1;
+ tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
+ z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
+ tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
+ tmp12 += z2;
+ z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
+ tmp2 += z2;
+ tmp3 += z2;
+ z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
+ tmp10 += z2;
+ tmp11 += z2;
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[15] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[14] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp27 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp27 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -2823,262 +2823,262 @@ jpeg_idct_16x8 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*8]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
- /* Note results are scaled up by sqrt(8) compared to a true IDCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = DCTSIZE; ctr > 0; ctr--) {
- /* Due to quantization, we will usually find that many of the input
- * coefficients are zero, especially the AC terms. We can exploit this
- * by short-circuiting the IDCT calculation for any column in which all
- * the AC terms are zero. In that case each output is equal to the
- * DC coefficient (with scale factor as needed).
- * With typical images and quantization tables, half or more of the
- * column DCT calculations can be simplified this way.
- */
-
- if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*8]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+ /* Note results are scaled up by sqrt(8) compared to a true IDCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = DCTSIZE; ctr > 0; ctr--) {
+ /* Due to quantization, we will usually find that many of the input
+ * coefficients are zero, especially the AC terms. We can exploit this
+ * by short-circuiting the IDCT calculation for any column in which all
+ * the AC terms are zero. In that case each output is equal to the
+ * DC coefficient (with scale factor as needed).
+ * With typical images and quantization tables, half or more of the
+ * column DCT calculations can be simplified this way.
+ */
+
+ if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
inptr[DCTSIZE*3] == 0 && inptr[DCTSIZE*4] == 0 &&
inptr[DCTSIZE*5] == 0 && inptr[DCTSIZE*6] == 0 &&
inptr[DCTSIZE*7] == 0) {
- /* AC terms all zero */
- int dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]) << PASS1_BITS;
-
- wsptr[DCTSIZE*0] = dcval;
- wsptr[DCTSIZE*1] = dcval;
- wsptr[DCTSIZE*2] = dcval;
- wsptr[DCTSIZE*3] = dcval;
- wsptr[DCTSIZE*4] = dcval;
- wsptr[DCTSIZE*5] = dcval;
- wsptr[DCTSIZE*6] = dcval;
- wsptr[DCTSIZE*7] = dcval;
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- continue;
- }
-
- /* Even part: reverse the even part of the forward DCT. */
- /* The rotator is sqrt(2)*c(-6). */
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
- tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
- tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z2 <<= CONST_BITS;
- z3 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z2 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- tmp0 = z2 + z3;
- tmp1 = z2 - z3;
-
- tmp10 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
- tmp11 = tmp1 + tmp3;
- tmp12 = tmp1 - tmp3;
-
- /* Odd part per figure 8; the matrix is unitary and hence its
- * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
- */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
- tmp1 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- tmp3 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
-
- z2 = tmp0 + tmp2;
- z3 = tmp1 + tmp3;
-
- z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
- z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
- z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
- z2 += z1;
- z3 += z1;
-
- z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
- tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
- tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
- tmp0 += z1 + z2;
- tmp3 += z1 + z3;
-
- z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
- tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
- tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
- tmp1 += z1 + z3;
- tmp2 += z1 + z2;
-
- /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
-
- wsptr[DCTSIZE*0] = (int) RIGHT_SHIFT(tmp10 + tmp3, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*7] = (int) RIGHT_SHIFT(tmp10 - tmp3, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*1] = (int) RIGHT_SHIFT(tmp11 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*6] = (int) RIGHT_SHIFT(tmp11 - tmp2, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*2] = (int) RIGHT_SHIFT(tmp12 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*5] = (int) RIGHT_SHIFT(tmp12 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*3] = (int) RIGHT_SHIFT(tmp13 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[DCTSIZE*4] = (int) RIGHT_SHIFT(tmp13 - tmp0, CONST_BITS-PASS1_BITS);
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- }
-
- /* Pass 2: process 8 rows from work array, store into output array.
- * 16-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/32).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp0 <<= CONST_BITS;
-
- z1 = (INT32) wsptr[4];
- tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
- tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[6];
- z3 = z1 - z2;
- z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
- z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
- tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
- tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
- tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
-
- tmp20 = tmp10 + tmp0;
- tmp27 = tmp10 - tmp0;
- tmp21 = tmp12 + tmp1;
- tmp26 = tmp12 - tmp1;
- tmp22 = tmp13 + tmp2;
- tmp25 = tmp13 - tmp2;
- tmp23 = tmp11 + tmp3;
- tmp24 = tmp11 - tmp3;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
-
- tmp11 = z1 + z3;
-
- tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
- tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
- tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
- tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
- tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
- tmp0 = tmp1 + tmp2 + tmp3 -
- MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
- tmp13 = tmp10 + tmp11 + tmp12 -
- MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
- z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
- tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
- tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
- z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
- tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
- tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
- z2 += z4;
- z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
- tmp1 += z1;
- tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
- z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
- tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
- tmp12 += z2;
- z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
- tmp2 += z2;
- tmp3 += z2;
- z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
- tmp10 += z2;
- tmp11 += z2;
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[15] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[14] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp27 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp27 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ /* AC terms all zero */
+ int dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]) << PASS1_BITS;
+
+ wsptr[DCTSIZE*0] = dcval;
+ wsptr[DCTSIZE*1] = dcval;
+ wsptr[DCTSIZE*2] = dcval;
+ wsptr[DCTSIZE*3] = dcval;
+ wsptr[DCTSIZE*4] = dcval;
+ wsptr[DCTSIZE*5] = dcval;
+ wsptr[DCTSIZE*6] = dcval;
+ wsptr[DCTSIZE*7] = dcval;
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ continue;
+ }
+
+ /* Even part: reverse the even part of the forward DCT. */
+ /* The rotator is sqrt(2)*c(-6). */
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
+ tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
+ tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z2 <<= CONST_BITS;
+ z3 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z2 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ tmp0 = z2 + z3;
+ tmp1 = z2 - z3;
+
+ tmp10 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+ tmp11 = tmp1 + tmp3;
+ tmp12 = tmp1 - tmp3;
+
+ /* Odd part per figure 8; the matrix is unitary and hence its
+ * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
+ */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+ tmp1 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ tmp3 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+
+ z2 = tmp0 + tmp2;
+ z3 = tmp1 + tmp3;
+
+ z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
+ z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
+ z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
+ z2 += z1;
+ z3 += z1;
+
+ z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
+ tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
+ tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
+ tmp0 += z1 + z2;
+ tmp3 += z1 + z3;
+
+ z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
+ tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
+ tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
+ tmp1 += z1 + z3;
+ tmp2 += z1 + z2;
+
+ /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
+
+ wsptr[DCTSIZE*0] = (int) RIGHT_SHIFT(tmp10 + tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*7] = (int) RIGHT_SHIFT(tmp10 - tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*1] = (int) RIGHT_SHIFT(tmp11 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*6] = (int) RIGHT_SHIFT(tmp11 - tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*2] = (int) RIGHT_SHIFT(tmp12 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*5] = (int) RIGHT_SHIFT(tmp12 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*3] = (int) RIGHT_SHIFT(tmp13 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[DCTSIZE*4] = (int) RIGHT_SHIFT(tmp13 - tmp0, CONST_BITS-PASS1_BITS);
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ }
+
+ /* Pass 2: process 8 rows from work array, store into output array.
+ * 16-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/32).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp0 <<= CONST_BITS;
+
+ z1 = (INT32) wsptr[4];
+ tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
+ tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[6];
+ z3 = z1 - z2;
+ z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
+ z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
+ tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
+ tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
+ tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
+
+ tmp20 = tmp10 + tmp0;
+ tmp27 = tmp10 - tmp0;
+ tmp21 = tmp12 + tmp1;
+ tmp26 = tmp12 - tmp1;
+ tmp22 = tmp13 + tmp2;
+ tmp25 = tmp13 - tmp2;
+ tmp23 = tmp11 + tmp3;
+ tmp24 = tmp11 - tmp3;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = z1 + z3;
+
+ tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
+ tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
+ tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
+ tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
+ tmp0 = tmp1 + tmp2 + tmp3 -
+ MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
+ tmp13 = tmp10 + tmp11 + tmp12 -
+ MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
+ z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
+ tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
+ tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
+ z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
+ tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
+ tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
+ z2 += z4;
+ z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
+ tmp1 += z1;
+ tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
+ z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
+ tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
+ tmp12 += z2;
+ z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
+ tmp2 += z2;
+ tmp3 += z2;
+ z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
+ tmp10 += z2;
+ tmp11 += z2;
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[15] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[14] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp27 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp27 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -3094,186 +3094,186 @@ jpeg_idct_14x7 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*7]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 7-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/14).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp23 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp23 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp23 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- tmp20 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
- tmp22 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
- tmp21 = tmp20 + tmp22 + tmp23 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
- tmp10 = z1 + z3;
- z2 -= tmp10;
- tmp10 = MULTIPLY(tmp10, FIX(1.274162392)) + tmp23; /* c2 */
- tmp20 += tmp10 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
- tmp22 += tmp10 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
- tmp23 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
-
- tmp11 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
- tmp10 = tmp11 - tmp12;
- tmp11 += tmp12;
- tmp12 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
- tmp11 += tmp12;
- z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
- tmp10 += z2;
- tmp12 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 7 rows from work array, store into output array.
- * 14-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/28).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 7; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z1 <<= CONST_BITS;
- z4 = (INT32) wsptr[4];
- z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
- z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
- z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
-
- tmp10 = z1 + z2;
- tmp11 = z1 + z3;
- tmp12 = z1 - z4;
-
- tmp23 = z1 - ((z2 + z3 - z4) << 1); /* c0 = (c4+c12-c8)*2 */
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[6];
-
- z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
-
- tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
- tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
- tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
- MULTIPLY(z2, FIX(1.378756276)); /* c2 */
-
- tmp20 = tmp10 + tmp13;
- tmp26 = tmp10 - tmp13;
- tmp21 = tmp11 + tmp14;
- tmp25 = tmp11 - tmp14;
- tmp22 = tmp12 + tmp15;
- tmp24 = tmp12 - tmp15;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
- z4 <<= CONST_BITS;
-
- tmp14 = z1 + z3;
- tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
- tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
- tmp10 = tmp11 + tmp12 + z4 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
- tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
- tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
- z1 -= z2;
- tmp15 = MULTIPLY(z1, FIX(0.467085129)) - z4; /* c11 */
- tmp16 += tmp15;
- tmp13 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - z4; /* -c13 */
- tmp11 += tmp13 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
- tmp12 += tmp13 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
- tmp13 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
- tmp14 += tmp13 + z4 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
- tmp15 += tmp13 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
-
- tmp13 = ((z1 - z3) << CONST_BITS) + z4;
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp16,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp16,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*7]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 7-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/14).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp23 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp23 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp23 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ tmp20 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
+ tmp22 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
+ tmp21 = tmp20 + tmp22 + tmp23 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
+ tmp10 = z1 + z3;
+ z2 -= tmp10;
+ tmp10 = MULTIPLY(tmp10, FIX(1.274162392)) + tmp23; /* c2 */
+ tmp20 += tmp10 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
+ tmp22 += tmp10 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
+ tmp23 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+
+ tmp11 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
+ tmp10 = tmp11 - tmp12;
+ tmp11 += tmp12;
+ tmp12 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
+ tmp11 += tmp12;
+ z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
+ tmp10 += z2;
+ tmp12 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 7 rows from work array, store into output array.
+ * 14-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/28).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 7; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z1 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z1 <<= CONST_BITS;
+ z4 = (INT32) wsptr[4];
+ z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
+ z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
+ z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
+
+ tmp10 = z1 + z2;
+ tmp11 = z1 + z3;
+ tmp12 = z1 - z4;
+
+ tmp23 = z1 - ((z2 + z3 - z4) << 1); /* c0 = (c4+c12-c8)*2 */
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[6];
+
+ z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
+
+ tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
+ tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
+ tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
+ MULTIPLY(z2, FIX(1.378756276)); /* c2 */
+
+ tmp20 = tmp10 + tmp13;
+ tmp26 = tmp10 - tmp13;
+ tmp21 = tmp11 + tmp14;
+ tmp25 = tmp11 - tmp14;
+ tmp22 = tmp12 + tmp15;
+ tmp24 = tmp12 - tmp15;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+ z4 <<= CONST_BITS;
+
+ tmp14 = z1 + z3;
+ tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
+ tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
+ tmp10 = tmp11 + tmp12 + z4 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
+ tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
+ tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
+ z1 -= z2;
+ tmp15 = MULTIPLY(z1, FIX(0.467085129)) - z4; /* c11 */
+ tmp16 += tmp15;
+ tmp13 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - z4; /* -c13 */
+ tmp11 += tmp13 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
+ tmp12 += tmp13 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
+ tmp13 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
+ tmp14 += tmp13 + z4 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
+ tmp15 += tmp13 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
+
+ tmp13 = ((z1 - z3) << CONST_BITS) + z4;
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[13] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[12] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp26 + tmp16,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp26 - tmp16,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -3289,167 +3289,167 @@ jpeg_idct_12x6 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*6]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp10 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp10 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp10 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp12 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- tmp20 = MULTIPLY(tmp12, FIX(0.707106781)); /* c4 */
- tmp11 = tmp10 + tmp20;
- tmp21 = RIGHT_SHIFT(tmp10 - tmp20 - tmp20, CONST_BITS-PASS1_BITS);
- tmp20 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp10 = MULTIPLY(tmp20, FIX(1.224744871)); /* c2 */
- tmp20 = tmp11 + tmp10;
- tmp22 = tmp11 - tmp10;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp11 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
- tmp10 = tmp11 + ((z1 + z2) << CONST_BITS);
- tmp12 = tmp11 + ((z3 - z2) << CONST_BITS);
- tmp11 = (z1 - z2 - z3) << PASS1_BITS;
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) (tmp21 + tmp11);
- wsptr[8*4] = (int) (tmp21 - tmp11);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 6 rows from work array, store into output array.
- * 12-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/24).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 6; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z3 <<= CONST_BITS;
-
- z4 = (INT32) wsptr[4];
- z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
-
- tmp10 = z3 + z4;
- tmp11 = z3 - z4;
-
- z1 = (INT32) wsptr[2];
- z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
- z1 <<= CONST_BITS;
- z2 = (INT32) wsptr[6];
- z2 <<= CONST_BITS;
-
- tmp12 = z1 - z2;
-
- tmp21 = z3 + tmp12;
- tmp24 = z3 - tmp12;
-
- tmp12 = z4 + z2;
-
- tmp20 = tmp10 + tmp12;
- tmp25 = tmp10 - tmp12;
-
- tmp12 = z4 - z1 - z2;
-
- tmp22 = tmp11 + tmp12;
- tmp23 = tmp11 - tmp12;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z4 = (INT32) wsptr[7];
-
- tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
- tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
-
- tmp10 = z1 + z3;
- tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
- tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
- tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
- tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
- tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
- tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
- tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
- MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
-
- z1 -= z4;
- z2 -= z3;
- z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
- tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
- tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*6]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp10 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp10 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp10 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp12 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ tmp20 = MULTIPLY(tmp12, FIX(0.707106781)); /* c4 */
+ tmp11 = tmp10 + tmp20;
+ tmp21 = RIGHT_SHIFT(tmp10 - tmp20 - tmp20, CONST_BITS-PASS1_BITS);
+ tmp20 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp10 = MULTIPLY(tmp20, FIX(1.224744871)); /* c2 */
+ tmp20 = tmp11 + tmp10;
+ tmp22 = tmp11 - tmp10;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp11 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
+ tmp10 = tmp11 + ((z1 + z2) << CONST_BITS);
+ tmp12 = tmp11 + ((z3 - z2) << CONST_BITS);
+ tmp11 = (z1 - z2 - z3) << PASS1_BITS;
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) (tmp21 + tmp11);
+ wsptr[8*4] = (int) (tmp21 - tmp11);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 6 rows from work array, store into output array.
+ * 12-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/24).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 6; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z3 <<= CONST_BITS;
+
+ z4 = (INT32) wsptr[4];
+ z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
+
+ tmp10 = z3 + z4;
+ tmp11 = z3 - z4;
+
+ z1 = (INT32) wsptr[2];
+ z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
+ z1 <<= CONST_BITS;
+ z2 = (INT32) wsptr[6];
+ z2 <<= CONST_BITS;
+
+ tmp12 = z1 - z2;
+
+ tmp21 = z3 + tmp12;
+ tmp24 = z3 - tmp12;
+
+ tmp12 = z4 + z2;
+
+ tmp20 = tmp10 + tmp12;
+ tmp25 = tmp10 - tmp12;
+
+ tmp12 = z4 - z1 - z2;
+
+ tmp22 = tmp11 + tmp12;
+ tmp23 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
+ tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
+
+ tmp10 = z1 + z3;
+ tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
+ tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
+ tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
+ tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
+ tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
+ tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
+ tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
+ MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
+
+ z1 -= z4;
+ z2 -= z3;
+ z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
+ tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
+ tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[11] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[10] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp25 + tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp25 - tmp15,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -3465,152 +3465,152 @@ jpeg_idct_10x5 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*5]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 5-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/10).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp12 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp12 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp12 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp13 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp14 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z1 = MULTIPLY(tmp13 + tmp14, FIX(0.790569415)); /* (c2+c4)/2 */
- z2 = MULTIPLY(tmp13 - tmp14, FIX(0.353553391)); /* (c2-c4)/2 */
- z3 = tmp12 + z2;
- tmp10 = z3 + z1;
- tmp11 = z3 - z1;
- tmp12 -= z2 << 2;
-
- /* Odd part */
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
-
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
- tmp13 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
- tmp14 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp10 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp10 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp11 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp11 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp12, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 5 rows from work array, store into output array.
- * 10-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/20).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 5; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z3 <<= CONST_BITS;
- z4 = (INT32) wsptr[4];
- z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
- z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
- tmp10 = z3 + z1;
- tmp11 = z3 - z2;
-
- tmp22 = z3 - ((z1 - z2) << 1); /* c0 = (c4-c8)*2 */
-
- z2 = (INT32) wsptr[2];
- z3 = (INT32) wsptr[6];
-
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
- tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
- tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
-
- tmp20 = tmp10 + tmp12;
- tmp24 = tmp10 - tmp12;
- tmp21 = tmp11 + tmp13;
- tmp23 = tmp11 - tmp13;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- z3 <<= CONST_BITS;
- z4 = (INT32) wsptr[7];
-
- tmp11 = z2 + z4;
- tmp13 = z2 - z4;
-
- tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
-
- z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
- z4 = z3 + tmp12;
-
- tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
- tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
-
- z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
- z4 = z3 - tmp12 - (tmp13 << (CONST_BITS - 1));
-
- tmp12 = ((z1 - tmp13) << CONST_BITS) - z3;
-
- tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
- tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 8; /* advance pointer to next row */
- }
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*5]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 5-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/10).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp12 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp12 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp12 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp13 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp14 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z1 = MULTIPLY(tmp13 + tmp14, FIX(0.790569415)); /* (c2+c4)/2 */
+ z2 = MULTIPLY(tmp13 - tmp14, FIX(0.353553391)); /* (c2-c4)/2 */
+ z3 = tmp12 + z2;
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z1;
+ tmp12 -= z2 << 2;
+
+ /* Odd part */
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
+ tmp13 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
+ tmp14 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp10 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp10 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp11 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp11 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp12, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 5 rows from work array, store into output array.
+ * 10-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/20).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 5; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ z3 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z3 <<= CONST_BITS;
+ z4 = (INT32) wsptr[4];
+ z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
+ z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z2;
+
+ tmp22 = z3 - ((z1 - z2) << 1); /* c0 = (c4-c8)*2 */
+
+ z2 = (INT32) wsptr[2];
+ z3 = (INT32) wsptr[6];
+
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
+ tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
+ tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
+
+ tmp20 = tmp10 + tmp12;
+ tmp24 = tmp10 - tmp12;
+ tmp21 = tmp11 + tmp13;
+ tmp23 = tmp11 - tmp13;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ z3 <<= CONST_BITS;
+ z4 = (INT32) wsptr[7];
+
+ tmp11 = z2 + z4;
+ tmp13 = z2 - z4;
+
+ tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
+
+ z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
+ z4 = z3 + tmp12;
+
+ tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
+ tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
+
+ z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
+ z4 = z3 - tmp12 - (tmp13 << (CONST_BITS - 1));
+
+ tmp12 = ((z1 - tmp13) << CONST_BITS) - z3;
+
+ tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
+ tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[9] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[8] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp23 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp24 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp24 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 8; /* advance pointer to next row */
+ }
}
@@ -3623,147 +3623,147 @@ jpeg_idct_10x5 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_8x4 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- INT32 tmp10, tmp11, tmp12, tmp13;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*4]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 4-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
-
- tmp10 = (tmp0 + tmp2) << PASS1_BITS;
- tmp12 = (tmp0 - tmp2) << PASS1_BITS;
-
- /* Odd part */
- /* Same rotation as in the even part of the 8x8 LL&M IDCT */
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp0 = RIGHT_SHIFT(z1 + MULTIPLY(z2, FIX_0_765366865), /* c2-c6 */
- CONST_BITS-PASS1_BITS);
- tmp2 = RIGHT_SHIFT(z1 - MULTIPLY(z3, FIX_1_847759065), /* c2+c6 */
- CONST_BITS-PASS1_BITS);
-
- /* Final output stage */
-
- wsptr[8*0] = (int) (tmp10 + tmp0);
- wsptr[8*3] = (int) (tmp10 - tmp0);
- wsptr[8*1] = (int) (tmp12 + tmp2);
- wsptr[8*2] = (int) (tmp12 - tmp2);
- }
-
- /* Pass 2: process rows from work array, store into output array. */
- /* Note that we must descale the results by a factor of 8 == 2**3, */
- /* and also undo the PASS1_BITS scaling. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 4; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part: reverse the even part of the forward DCT. */
- /* The rotator is sqrt(2)*c(-6). */
-
- z2 = (INT32) wsptr[2];
- z3 = (INT32) wsptr[6];
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
- tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
- tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
-
- /* Add fudge factor here for final descale. */
- z2 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z3 = (INT32) wsptr[4];
-
- tmp0 = (z2 + z3) << CONST_BITS;
- tmp1 = (z2 - z3) << CONST_BITS;
-
- tmp10 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
- tmp11 = tmp1 + tmp3;
- tmp12 = tmp1 - tmp3;
-
- /* Odd part per figure 8; the matrix is unitary and hence its
- * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
- */
-
- tmp0 = (INT32) wsptr[7];
- tmp1 = (INT32) wsptr[5];
- tmp2 = (INT32) wsptr[3];
- tmp3 = (INT32) wsptr[1];
-
- z2 = tmp0 + tmp2;
- z3 = tmp1 + tmp3;
-
- z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
- z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
- z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
- z2 += z1;
- z3 += z1;
-
- z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
- tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
- tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
- tmp0 += z1 + z2;
- tmp3 += z1 + z3;
-
- z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
- tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
- tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
- tmp1 += z1 + z3;
- tmp2 += z1 + z2;
-
- /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += DCTSIZE; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ INT32 tmp10, tmp11, tmp12, tmp13;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*4]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 4-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+
+ tmp10 = (tmp0 + tmp2) << PASS1_BITS;
+ tmp12 = (tmp0 - tmp2) << PASS1_BITS;
+
+ /* Odd part */
+ /* Same rotation as in the even part of the 8x8 LL&M IDCT */
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp0 = RIGHT_SHIFT(z1 + MULTIPLY(z2, FIX_0_765366865), /* c2-c6 */
+ CONST_BITS-PASS1_BITS);
+ tmp2 = RIGHT_SHIFT(z1 - MULTIPLY(z3, FIX_1_847759065), /* c2+c6 */
+ CONST_BITS-PASS1_BITS);
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) (tmp10 + tmp0);
+ wsptr[8*3] = (int) (tmp10 - tmp0);
+ wsptr[8*1] = (int) (tmp12 + tmp2);
+ wsptr[8*2] = (int) (tmp12 - tmp2);
+ }
+
+ /* Pass 2: process rows from work array, store into output array. */
+ /* Note that we must descale the results by a factor of 8 == 2**3, */
+ /* and also undo the PASS1_BITS scaling. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 4; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part: reverse the even part of the forward DCT. */
+ /* The rotator is sqrt(2)*c(-6). */
+
+ z2 = (INT32) wsptr[2];
+ z3 = (INT32) wsptr[6];
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
+ tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
+ tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
+
+ /* Add fudge factor here for final descale. */
+ z2 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z3 = (INT32) wsptr[4];
+
+ tmp0 = (z2 + z3) << CONST_BITS;
+ tmp1 = (z2 - z3) << CONST_BITS;
+
+ tmp10 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+ tmp11 = tmp1 + tmp3;
+ tmp12 = tmp1 - tmp3;
+
+ /* Odd part per figure 8; the matrix is unitary and hence its
+ * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
+ */
+
+ tmp0 = (INT32) wsptr[7];
+ tmp1 = (INT32) wsptr[5];
+ tmp2 = (INT32) wsptr[3];
+ tmp3 = (INT32) wsptr[1];
+
+ z2 = tmp0 + tmp2;
+ z3 = tmp1 + tmp3;
+
+ z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
+ z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
+ z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
+ z2 += z1;
+ z3 += z1;
+
+ z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
+ tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
+ tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
+ tmp0 += z1 + z2;
+ tmp3 += z1 + z3;
+
+ z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
+ tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
+ tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
+ tmp1 += z1 + z3;
+ tmp2 += z1 + z2;
+
+ /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += DCTSIZE; /* advance pointer to next row */
+ }
}
@@ -3776,104 +3776,104 @@ jpeg_idct_8x4 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_6x3 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[6*3]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 3-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/6).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 6; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp0 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
- tmp10 = tmp0 + tmp12;
- tmp2 = tmp0 - tmp12 - tmp12;
-
- /* Odd part */
-
- tmp12 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
-
- /* Final output stage */
-
- wsptr[6*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[6*2] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[6*1] = (int) RIGHT_SHIFT(tmp2, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 3 rows from work array, store into output array.
- * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 3; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp0 <<= CONST_BITS;
- tmp2 = (INT32) wsptr[4];
- tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
- tmp1 = tmp0 + tmp10;
- tmp11 = tmp0 - tmp10 - tmp10;
- tmp10 = (INT32) wsptr[2];
- tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
- tmp10 = tmp1 + tmp0;
- tmp12 = tmp1 - tmp0;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
- tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
- tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
- tmp1 = (z1 - z2 - z3) << CONST_BITS;
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 6; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[6*3]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 3-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/6).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 6; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp0 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
+ tmp10 = tmp0 + tmp12;
+ tmp2 = tmp0 - tmp12 - tmp12;
+
+ /* Odd part */
+
+ tmp12 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
+
+ /* Final output stage */
+
+ wsptr[6*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[6*2] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[6*1] = (int) RIGHT_SHIFT(tmp2, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 3 rows from work array, store into output array.
+ * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 3; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp0 <<= CONST_BITS;
+ tmp2 = (INT32) wsptr[4];
+ tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
+ tmp1 = tmp0 + tmp10;
+ tmp11 = tmp0 - tmp10 - tmp10;
+ tmp10 = (INT32) wsptr[2];
+ tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
+ tmp10 = tmp1 + tmp0;
+ tmp12 = tmp1 - tmp0;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
+ tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
+ tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
+ tmp1 = (z1 - z2 - z3) << CONST_BITS;
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 6; /* advance pointer to next row */
+ }
}
@@ -3886,84 +3886,84 @@ jpeg_idct_6x3 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_4x2 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp2, tmp10, tmp12;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- INT32 * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- INT32 workspace[4*2]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 4; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp10 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
-
- /* Odd part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
-
- /* Final output stage */
-
- wsptr[4*0] = tmp10 + tmp0;
- wsptr[4*1] = tmp10 - tmp0;
- }
-
- /* Pass 2: process 2 rows from work array, store into output array.
- * 4-point IDCT kernel,
- * cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point IDCT].
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 2; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = wsptr[0] + (ONE << 2);
- tmp2 = wsptr[2];
-
- tmp10 = (tmp0 + tmp2) << CONST_BITS;
- tmp12 = (tmp0 - tmp2) << CONST_BITS;
-
- /* Odd part */
- /* Same rotation as in the even part of the 8x8 LL&M IDCT */
-
- z2 = wsptr[1];
- z3 = wsptr[3];
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
- tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
- tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
- CONST_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
- CONST_BITS+3)
- & RANGE_MASK];
-
- wsptr += 4; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp2, tmp10, tmp12;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ INT32 * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ INT32 workspace[4*2]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 4; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp10 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+
+ /* Odd part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+
+ /* Final output stage */
+
+ wsptr[4*0] = tmp10 + tmp0;
+ wsptr[4*1] = tmp10 - tmp0;
+ }
+
+ /* Pass 2: process 2 rows from work array, store into output array.
+ * 4-point IDCT kernel,
+ * cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point IDCT].
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 2; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = wsptr[0] + (ONE << 2);
+ tmp2 = wsptr[2];
+
+ tmp10 = (tmp0 + tmp2) << CONST_BITS;
+ tmp12 = (tmp0 - tmp2) << CONST_BITS;
+
+ /* Odd part */
+ /* Same rotation as in the even part of the 8x8 LL&M IDCT */
+
+ z2 = wsptr[1];
+ z3 = wsptr[3];
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
+ tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
+ tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
+ CONST_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
+ CONST_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 4; /* advance pointer to next row */
+ }
}
@@ -3976,36 +3976,36 @@ jpeg_idct_4x2 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_2x1 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp10;
- ISLOW_MULT_TYPE * quantptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- SHIFT_TEMPS
+ INT32 tmp0, tmp10;
+ ISLOW_MULT_TYPE * quantptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ SHIFT_TEMPS
- /* Pass 1: empty. */
+ /* Pass 1: empty. */
- /* Pass 2: process 1 row from input, store into output array. */
+ /* Pass 2: process 1 row from input, store into output array. */
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- outptr = output_buf[0] + output_col;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ outptr = output_buf[0] + output_col;
- /* Even part */
+ /* Even part */
- tmp10 = DEQUANTIZE(coef_block[0], quantptr[0]);
- /* Add fudge factor here for final descale. */
- tmp10 += ONE << 2;
+ tmp10 = DEQUANTIZE(coef_block[0], quantptr[0]);
+ /* Add fudge factor here for final descale. */
+ tmp10 += ONE << 2;
- /* Odd part */
+ /* Odd part */
- tmp0 = DEQUANTIZE(coef_block[1], quantptr[1]);
+ tmp0 = DEQUANTIZE(coef_block[1], quantptr[1]);
- /* Final output stage */
+ /* Final output stage */
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0, 3) & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0, 3) & RANGE_MASK];
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0, 3) & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0, 3) & RANGE_MASK];
}
@@ -4021,209 +4021,209 @@ jpeg_idct_8x16 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[8*16]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 16-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/32).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp0 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
- tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
-
- tmp10 = tmp0 + tmp1;
- tmp11 = tmp0 - tmp1;
- tmp12 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
- z3 = z1 - z2;
- z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
- z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
-
- tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
- tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
- tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
- tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
-
- tmp20 = tmp10 + tmp0;
- tmp27 = tmp10 - tmp0;
- tmp21 = tmp12 + tmp1;
- tmp26 = tmp12 - tmp1;
- tmp22 = tmp13 + tmp2;
- tmp25 = tmp13 - tmp2;
- tmp23 = tmp11 + tmp3;
- tmp24 = tmp11 - tmp3;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp11 = z1 + z3;
-
- tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
- tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
- tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
- tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
- tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
- tmp0 = tmp1 + tmp2 + tmp3 -
- MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
- tmp13 = tmp10 + tmp11 + tmp12 -
- MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
- z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
- tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
- tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
- z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
- tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
- tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
- z2 += z4;
- z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
- tmp1 += z1;
- tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
- z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
- tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
- tmp12 += z2;
- z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
- tmp2 += z2;
- tmp3 += z2;
- z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
- tmp10 += z2;
- tmp11 += z2;
-
- /* Final output stage */
-
- wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[8*15] = (int) RIGHT_SHIFT(tmp20 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[8*14] = (int) RIGHT_SHIFT(tmp21 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[8*13] = (int) RIGHT_SHIFT(tmp22 - tmp2, CONST_BITS-PASS1_BITS);
- wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp3, CONST_BITS-PASS1_BITS);
- wsptr[8*12] = (int) RIGHT_SHIFT(tmp23 - tmp3, CONST_BITS-PASS1_BITS);
- wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*11] = (int) RIGHT_SHIFT(tmp24 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*10] = (int) RIGHT_SHIFT(tmp25 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*9] = (int) RIGHT_SHIFT(tmp26 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[8*7] = (int) RIGHT_SHIFT(tmp27 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[8*8] = (int) RIGHT_SHIFT(tmp27 - tmp13, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process rows from work array, store into output array. */
- /* Note that we must descale the results by a factor of 8 == 2**3, */
- /* and also undo the PASS1_BITS scaling. */
-
- wsptr = workspace;
- for (ctr = 0; ctr < 16; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part: reverse the even part of the forward DCT. */
- /* The rotator is sqrt(2)*c(-6). */
-
- z2 = (INT32) wsptr[2];
- z3 = (INT32) wsptr[6];
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
- tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
- tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
-
- /* Add fudge factor here for final descale. */
- z2 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- z3 = (INT32) wsptr[4];
-
- tmp0 = (z2 + z3) << CONST_BITS;
- tmp1 = (z2 - z3) << CONST_BITS;
-
- tmp10 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
- tmp11 = tmp1 + tmp3;
- tmp12 = tmp1 - tmp3;
-
- /* Odd part per figure 8; the matrix is unitary and hence its
- * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
- */
-
- tmp0 = (INT32) wsptr[7];
- tmp1 = (INT32) wsptr[5];
- tmp2 = (INT32) wsptr[3];
- tmp3 = (INT32) wsptr[1];
-
- z2 = tmp0 + tmp2;
- z3 = tmp1 + tmp3;
-
- z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
- z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
- z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
- z2 += z1;
- z3 += z1;
-
- z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
- tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
- tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
- tmp0 += z1 + z2;
- tmp3 += z1 + z3;
-
- z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
- tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
- tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
- tmp1 += z1 + z3;
- tmp2 += z1 + z2;
-
- /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp3,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp1,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += DCTSIZE; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp3, tmp10, tmp11, tmp12, tmp13;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26, tmp27;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[8*16]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 16-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/32).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp0 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ tmp1 = MULTIPLY(z1, FIX(1.306562965)); /* c4[16] = c2[8] */
+ tmp2 = MULTIPLY(z1, FIX_0_541196100); /* c12[16] = c6[8] */
+
+ tmp10 = tmp0 + tmp1;
+ tmp11 = tmp0 - tmp1;
+ tmp12 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+ z3 = z1 - z2;
+ z4 = MULTIPLY(z3, FIX(0.275899379)); /* c14[16] = c7[8] */
+ z3 = MULTIPLY(z3, FIX(1.387039845)); /* c2[16] = c1[8] */
+
+ tmp0 = z3 + MULTIPLY(z2, FIX_2_562915447); /* (c6+c2)[16] = (c3+c1)[8] */
+ tmp1 = z4 + MULTIPLY(z1, FIX_0_899976223); /* (c6-c14)[16] = (c3-c7)[8] */
+ tmp2 = z3 - MULTIPLY(z1, FIX(0.601344887)); /* (c2-c10)[16] = (c1-c5)[8] */
+ tmp3 = z4 - MULTIPLY(z2, FIX(0.509795579)); /* (c10-c14)[16] = (c5-c7)[8] */
+
+ tmp20 = tmp10 + tmp0;
+ tmp27 = tmp10 - tmp0;
+ tmp21 = tmp12 + tmp1;
+ tmp26 = tmp12 - tmp1;
+ tmp22 = tmp13 + tmp2;
+ tmp25 = tmp13 - tmp2;
+ tmp23 = tmp11 + tmp3;
+ tmp24 = tmp11 - tmp3;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp11 = z1 + z3;
+
+ tmp1 = MULTIPLY(z1 + z2, FIX(1.353318001)); /* c3 */
+ tmp2 = MULTIPLY(tmp11, FIX(1.247225013)); /* c5 */
+ tmp3 = MULTIPLY(z1 + z4, FIX(1.093201867)); /* c7 */
+ tmp10 = MULTIPLY(z1 - z4, FIX(0.897167586)); /* c9 */
+ tmp11 = MULTIPLY(tmp11, FIX(0.666655658)); /* c11 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.410524528)); /* c13 */
+ tmp0 = tmp1 + tmp2 + tmp3 -
+ MULTIPLY(z1, FIX(2.286341144)); /* c7+c5+c3-c1 */
+ tmp13 = tmp10 + tmp11 + tmp12 -
+ MULTIPLY(z1, FIX(1.835730603)); /* c9+c11+c13-c15 */
+ z1 = MULTIPLY(z2 + z3, FIX(0.138617169)); /* c15 */
+ tmp1 += z1 + MULTIPLY(z2, FIX(0.071888074)); /* c9+c11-c3-c15 */
+ tmp2 += z1 - MULTIPLY(z3, FIX(1.125726048)); /* c5+c7+c15-c3 */
+ z1 = MULTIPLY(z3 - z2, FIX(1.407403738)); /* c1 */
+ tmp11 += z1 - MULTIPLY(z3, FIX(0.766367282)); /* c1+c11-c9-c13 */
+ tmp12 += z1 + MULTIPLY(z2, FIX(1.971951411)); /* c1+c5+c13-c7 */
+ z2 += z4;
+ z1 = MULTIPLY(z2, - FIX(0.666655658)); /* -c11 */
+ tmp1 += z1;
+ tmp3 += z1 + MULTIPLY(z4, FIX(1.065388962)); /* c3+c11+c15-c7 */
+ z2 = MULTIPLY(z2, - FIX(1.247225013)); /* -c5 */
+ tmp10 += z2 + MULTIPLY(z4, FIX(3.141271809)); /* c1+c5+c9-c13 */
+ tmp12 += z2;
+ z2 = MULTIPLY(z3 + z4, - FIX(1.353318001)); /* -c3 */
+ tmp2 += z2;
+ tmp3 += z2;
+ z2 = MULTIPLY(z4 - z3, FIX(0.410524528)); /* c13 */
+ tmp10 += z2;
+ tmp11 += z2;
+
+ /* Final output stage */
+
+ wsptr[8*0] = (int) RIGHT_SHIFT(tmp20 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[8*15] = (int) RIGHT_SHIFT(tmp20 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[8*1] = (int) RIGHT_SHIFT(tmp21 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[8*14] = (int) RIGHT_SHIFT(tmp21 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[8*2] = (int) RIGHT_SHIFT(tmp22 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[8*13] = (int) RIGHT_SHIFT(tmp22 - tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[8*3] = (int) RIGHT_SHIFT(tmp23 + tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[8*12] = (int) RIGHT_SHIFT(tmp23 - tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[8*4] = (int) RIGHT_SHIFT(tmp24 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*11] = (int) RIGHT_SHIFT(tmp24 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[8*5] = (int) RIGHT_SHIFT(tmp25 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*10] = (int) RIGHT_SHIFT(tmp25 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[8*6] = (int) RIGHT_SHIFT(tmp26 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*9] = (int) RIGHT_SHIFT(tmp26 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[8*7] = (int) RIGHT_SHIFT(tmp27 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[8*8] = (int) RIGHT_SHIFT(tmp27 - tmp13, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process rows from work array, store into output array. */
+ /* Note that we must descale the results by a factor of 8 == 2**3, */
+ /* and also undo the PASS1_BITS scaling. */
+
+ wsptr = workspace;
+ for (ctr = 0; ctr < 16; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part: reverse the even part of the forward DCT. */
+ /* The rotator is sqrt(2)*c(-6). */
+
+ z2 = (INT32) wsptr[2];
+ z3 = (INT32) wsptr[6];
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
+ tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
+ tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
+
+ /* Add fudge factor here for final descale. */
+ z2 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ z3 = (INT32) wsptr[4];
+
+ tmp0 = (z2 + z3) << CONST_BITS;
+ tmp1 = (z2 - z3) << CONST_BITS;
+
+ tmp10 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+ tmp11 = tmp1 + tmp3;
+ tmp12 = tmp1 - tmp3;
+
+ /* Odd part per figure 8; the matrix is unitary and hence its
+ * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
+ */
+
+ tmp0 = (INT32) wsptr[7];
+ tmp1 = (INT32) wsptr[5];
+ tmp2 = (INT32) wsptr[3];
+ tmp3 = (INT32) wsptr[1];
+
+ z2 = tmp0 + tmp2;
+ z3 = tmp1 + tmp3;
+
+ z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
+ z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
+ z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
+ z2 += z1;
+ z3 += z1;
+
+ z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
+ tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
+ tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
+ tmp0 += z1 + z2;
+ tmp3 += z1 + z3;
+
+ z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
+ tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
+ tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
+ tmp1 += z1 + z3;
+ tmp2 += z1 + z2;
+
+ /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[7] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp3,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp1,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp13 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp13 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += DCTSIZE; /* advance pointer to next row */
+ }
}
@@ -4239,174 +4239,174 @@ jpeg_idct_7x14 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[7*14]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 14-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/28).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 7; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z1 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z1 += ONE << (CONST_BITS-PASS1_BITS-1);
- z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
- z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
- z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
-
- tmp10 = z1 + z2;
- tmp11 = z1 + z3;
- tmp12 = z1 - z4;
-
- tmp23 = RIGHT_SHIFT(z1 - ((z2 + z3 - z4) << 1), /* c0 = (c4+c12-c8)*2 */
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25, tmp26;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[7*14]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 14-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/28).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 7; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z1 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z1 += ONE << (CONST_BITS-PASS1_BITS-1);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z2 = MULTIPLY(z4, FIX(1.274162392)); /* c4 */
+ z3 = MULTIPLY(z4, FIX(0.314692123)); /* c12 */
+ z4 = MULTIPLY(z4, FIX(0.881747734)); /* c8 */
+
+ tmp10 = z1 + z2;
+ tmp11 = z1 + z3;
+ tmp12 = z1 - z4;
+
+ tmp23 = RIGHT_SHIFT(z1 - ((z2 + z3 - z4) << 1), /* c0 = (c4+c12-c8)*2 */
CONST_BITS-PASS1_BITS);
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
-
- tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
- tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
- tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
- MULTIPLY(z2, FIX(1.378756276)); /* c2 */
-
- tmp20 = tmp10 + tmp13;
- tmp26 = tmp10 - tmp13;
- tmp21 = tmp11 + tmp14;
- tmp25 = tmp11 - tmp14;
- tmp22 = tmp12 + tmp15;
- tmp24 = tmp12 - tmp15;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
- tmp13 = z4 << CONST_BITS;
-
- tmp14 = z1 + z3;
- tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
- tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
- tmp10 = tmp11 + tmp12 + tmp13 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
- tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
- tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
- z1 -= z2;
- tmp15 = MULTIPLY(z1, FIX(0.467085129)) - tmp13; /* c11 */
- tmp16 += tmp15;
- z1 += z4;
- z4 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - tmp13; /* -c13 */
- tmp11 += z4 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
- tmp12 += z4 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
- z4 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
- tmp14 += z4 + tmp13 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
- tmp15 += z4 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
-
- tmp13 = (z1 - z3) << PASS1_BITS;
-
- /* Final output stage */
-
- wsptr[7*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[7*13] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[7*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[7*12] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[7*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[7*11] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[7*3] = (int) (tmp23 + tmp13);
- wsptr[7*10] = (int) (tmp23 - tmp13);
- wsptr[7*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[7*9] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[7*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
- wsptr[7*8] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
- wsptr[7*6] = (int) RIGHT_SHIFT(tmp26 + tmp16, CONST_BITS-PASS1_BITS);
- wsptr[7*7] = (int) RIGHT_SHIFT(tmp26 - tmp16, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 14 rows from work array, store into output array.
- * 7-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/14).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 14; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp23 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp23 <<= CONST_BITS;
-
- z1 = (INT32) wsptr[2];
- z2 = (INT32) wsptr[4];
- z3 = (INT32) wsptr[6];
-
- tmp20 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
- tmp22 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
- tmp21 = tmp20 + tmp22 + tmp23 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
- tmp10 = z1 + z3;
- z2 -= tmp10;
- tmp10 = MULTIPLY(tmp10, FIX(1.274162392)) + tmp23; /* c2 */
- tmp20 += tmp10 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
- tmp22 += tmp10 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
- tmp23 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
-
- tmp11 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
- tmp12 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
- tmp10 = tmp11 - tmp12;
- tmp11 += tmp12;
- tmp12 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
- tmp11 += tmp12;
- z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
- tmp10 += z2;
- tmp12 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 7; /* advance pointer to next row */
- }
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ z3 = MULTIPLY(z1 + z2, FIX(1.105676686)); /* c6 */
+
+ tmp13 = z3 + MULTIPLY(z1, FIX(0.273079590)); /* c2-c6 */
+ tmp14 = z3 - MULTIPLY(z2, FIX(1.719280954)); /* c6+c10 */
+ tmp15 = MULTIPLY(z1, FIX(0.613604268)) - /* c10 */
+ MULTIPLY(z2, FIX(1.378756276)); /* c2 */
+
+ tmp20 = tmp10 + tmp13;
+ tmp26 = tmp10 - tmp13;
+ tmp21 = tmp11 + tmp14;
+ tmp25 = tmp11 - tmp14;
+ tmp22 = tmp12 + tmp15;
+ tmp24 = tmp12 - tmp15;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+ tmp13 = z4 << CONST_BITS;
+
+ tmp14 = z1 + z3;
+ tmp11 = MULTIPLY(z1 + z2, FIX(1.334852607)); /* c3 */
+ tmp12 = MULTIPLY(tmp14, FIX(1.197448846)); /* c5 */
+ tmp10 = tmp11 + tmp12 + tmp13 - MULTIPLY(z1, FIX(1.126980169)); /* c3+c5-c1 */
+ tmp14 = MULTIPLY(tmp14, FIX(0.752406978)); /* c9 */
+ tmp16 = tmp14 - MULTIPLY(z1, FIX(1.061150426)); /* c9+c11-c13 */
+ z1 -= z2;
+ tmp15 = MULTIPLY(z1, FIX(0.467085129)) - tmp13; /* c11 */
+ tmp16 += tmp15;
+ z1 += z4;
+ z4 = MULTIPLY(z2 + z3, - FIX(0.158341681)) - tmp13; /* -c13 */
+ tmp11 += z4 - MULTIPLY(z2, FIX(0.424103948)); /* c3-c9-c13 */
+ tmp12 += z4 - MULTIPLY(z3, FIX(2.373959773)); /* c3+c5-c13 */
+ z4 = MULTIPLY(z3 - z2, FIX(1.405321284)); /* c1 */
+ tmp14 += z4 + tmp13 - MULTIPLY(z3, FIX(1.6906431334)); /* c1+c9-c11 */
+ tmp15 += z4 + MULTIPLY(z2, FIX(0.674957567)); /* c1+c11-c5 */
+
+ tmp13 = (z1 - z3) << PASS1_BITS;
+
+ /* Final output stage */
+
+ wsptr[7*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[7*13] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[7*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[7*12] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[7*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[7*11] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[7*3] = (int) (tmp23 + tmp13);
+ wsptr[7*10] = (int) (tmp23 - tmp13);
+ wsptr[7*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[7*9] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[7*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[7*8] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[7*6] = (int) RIGHT_SHIFT(tmp26 + tmp16, CONST_BITS-PASS1_BITS);
+ wsptr[7*7] = (int) RIGHT_SHIFT(tmp26 - tmp16, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 14 rows from work array, store into output array.
+ * 7-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/14).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 14; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp23 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp23 <<= CONST_BITS;
+
+ z1 = (INT32) wsptr[2];
+ z2 = (INT32) wsptr[4];
+ z3 = (INT32) wsptr[6];
+
+ tmp20 = MULTIPLY(z2 - z3, FIX(0.881747734)); /* c4 */
+ tmp22 = MULTIPLY(z1 - z2, FIX(0.314692123)); /* c6 */
+ tmp21 = tmp20 + tmp22 + tmp23 - MULTIPLY(z2, FIX(1.841218003)); /* c2+c4-c6 */
+ tmp10 = z1 + z3;
+ z2 -= tmp10;
+ tmp10 = MULTIPLY(tmp10, FIX(1.274162392)) + tmp23; /* c2 */
+ tmp20 += tmp10 - MULTIPLY(z3, FIX(0.077722536)); /* c2-c4-c6 */
+ tmp22 += tmp10 - MULTIPLY(z1, FIX(2.470602249)); /* c2+c4+c6 */
+ tmp23 += MULTIPLY(z2, FIX(1.414213562)); /* c0 */
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+
+ tmp11 = MULTIPLY(z1 + z2, FIX(0.935414347)); /* (c3+c1-c5)/2 */
+ tmp12 = MULTIPLY(z1 - z2, FIX(0.170262339)); /* (c3+c5-c1)/2 */
+ tmp10 = tmp11 - tmp12;
+ tmp11 += tmp12;
+ tmp12 = MULTIPLY(z2 + z3, - FIX(1.378756276)); /* -c1 */
+ tmp11 += tmp12;
+ z2 = MULTIPLY(z1 + z3, FIX(0.613604268)); /* c5 */
+ tmp10 += z2;
+ tmp12 += z2 + MULTIPLY(z3, FIX(1.870828693)); /* c3+c1-c5 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[6] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp23,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 7; /* advance pointer to next row */
+ }
}
@@ -4422,155 +4422,155 @@ jpeg_idct_6x12 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
- INT32 z1, z2, z3, z4;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[6*12]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 12-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/24).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 6; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z3 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z3 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
-
- tmp10 = z3 + z4;
- tmp11 = z3 - z4;
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
- z1 <<= CONST_BITS;
- z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
- z2 <<= CONST_BITS;
-
- tmp12 = z1 - z2;
-
- tmp21 = z3 + tmp12;
- tmp24 = z3 - tmp12;
-
- tmp12 = z4 + z2;
-
- tmp20 = tmp10 + tmp12;
- tmp25 = tmp10 - tmp12;
-
- tmp12 = z4 - z1 - z2;
-
- tmp22 = tmp11 + tmp12;
- tmp23 = tmp11 - tmp12;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
- tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
-
- tmp10 = z1 + z3;
- tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
- tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
- tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
- tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
- tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
- tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
- tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
- MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
-
- z1 -= z4;
- z2 -= z3;
- z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
- tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
- tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
-
- /* Final output stage */
-
- wsptr[6*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[6*11] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[6*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[6*10] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[6*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
- wsptr[6*9] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
- wsptr[6*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[6*8] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[6*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[6*7] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- wsptr[6*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
- wsptr[6*6] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 12 rows from work array, store into output array.
- * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 12; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp10 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp10 <<= CONST_BITS;
- tmp12 = (INT32) wsptr[4];
- tmp20 = MULTIPLY(tmp12, FIX(0.707106781)); /* c4 */
- tmp11 = tmp10 + tmp20;
- tmp21 = tmp10 - tmp20 - tmp20;
- tmp20 = (INT32) wsptr[2];
- tmp10 = MULTIPLY(tmp20, FIX(1.224744871)); /* c2 */
- tmp20 = tmp11 + tmp10;
- tmp22 = tmp11 - tmp10;
-
- /* Odd part */
-
- z1 = (INT32) wsptr[1];
- z2 = (INT32) wsptr[3];
- z3 = (INT32) wsptr[5];
- tmp11 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
- tmp10 = tmp11 + ((z1 + z2) << CONST_BITS);
- tmp12 = tmp11 + ((z3 - z2) << CONST_BITS);
- tmp11 = (z1 - z2 - z3) << CONST_BITS;
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 6; /* advance pointer to next row */
- }
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14, tmp15;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24, tmp25;
+ INT32 z1, z2, z3, z4;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[6*12]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 12-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/24).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 6; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z3 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z3 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z4 = MULTIPLY(z4, FIX(1.224744871)); /* c4 */
+
+ tmp10 = z3 + z4;
+ tmp11 = z3 - z4;
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z4 = MULTIPLY(z1, FIX(1.366025404)); /* c2 */
+ z1 <<= CONST_BITS;
+ z2 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+ z2 <<= CONST_BITS;
+
+ tmp12 = z1 - z2;
+
+ tmp21 = z3 + tmp12;
+ tmp24 = z3 - tmp12;
+
+ tmp12 = z4 + z2;
+
+ tmp20 = tmp10 + tmp12;
+ tmp25 = tmp10 - tmp12;
+
+ tmp12 = z4 - z1 - z2;
+
+ tmp22 = tmp11 + tmp12;
+ tmp23 = tmp11 - tmp12;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp11 = MULTIPLY(z2, FIX(1.306562965)); /* c3 */
+ tmp14 = MULTIPLY(z2, - FIX_0_541196100); /* -c9 */
+
+ tmp10 = z1 + z3;
+ tmp15 = MULTIPLY(tmp10 + z4, FIX(0.860918669)); /* c7 */
+ tmp12 = tmp15 + MULTIPLY(tmp10, FIX(0.261052384)); /* c5-c7 */
+ tmp10 = tmp12 + tmp11 + MULTIPLY(z1, FIX(0.280143716)); /* c1-c5 */
+ tmp13 = MULTIPLY(z3 + z4, - FIX(1.045510580)); /* -(c7+c11) */
+ tmp12 += tmp13 + tmp14 - MULTIPLY(z3, FIX(1.478575242)); /* c1+c5-c7-c11 */
+ tmp13 += tmp15 - tmp11 + MULTIPLY(z4, FIX(1.586706681)); /* c1+c11 */
+ tmp15 += tmp14 - MULTIPLY(z1, FIX(0.676326758)) - /* c7-c11 */
+ MULTIPLY(z4, FIX(1.982889723)); /* c5+c7 */
+
+ z1 -= z4;
+ z2 -= z3;
+ z3 = MULTIPLY(z1 + z2, FIX_0_541196100); /* c9 */
+ tmp11 = z3 + MULTIPLY(z1, FIX_0_765366865); /* c3-c9 */
+ tmp14 = z3 - MULTIPLY(z2, FIX_1_847759065); /* c3+c9 */
+
+ /* Final output stage */
+
+ wsptr[6*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[6*11] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[6*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[6*10] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[6*2] = (int) RIGHT_SHIFT(tmp22 + tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[6*9] = (int) RIGHT_SHIFT(tmp22 - tmp12, CONST_BITS-PASS1_BITS);
+ wsptr[6*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[6*8] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[6*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[6*7] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[6*5] = (int) RIGHT_SHIFT(tmp25 + tmp15, CONST_BITS-PASS1_BITS);
+ wsptr[6*6] = (int) RIGHT_SHIFT(tmp25 - tmp15, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 12 rows from work array, store into output array.
+ * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 12; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp10 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp10 <<= CONST_BITS;
+ tmp12 = (INT32) wsptr[4];
+ tmp20 = MULTIPLY(tmp12, FIX(0.707106781)); /* c4 */
+ tmp11 = tmp10 + tmp20;
+ tmp21 = tmp10 - tmp20 - tmp20;
+ tmp20 = (INT32) wsptr[2];
+ tmp10 = MULTIPLY(tmp20, FIX(1.224744871)); /* c2 */
+ tmp20 = tmp11 + tmp10;
+ tmp22 = tmp11 - tmp10;
+
+ /* Odd part */
+
+ z1 = (INT32) wsptr[1];
+ z2 = (INT32) wsptr[3];
+ z3 = (INT32) wsptr[5];
+ tmp11 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
+ tmp10 = tmp11 + ((z1 + z2) << CONST_BITS);
+ tmp12 = tmp11 + ((z3 - z2) << CONST_BITS);
+ tmp11 = (z1 - z2 - z3) << CONST_BITS;
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp20 + tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[5] = range_limit[(int) RIGHT_SHIFT(tmp20 - tmp10,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp21 + tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp21 - tmp11,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp22 + tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp22 - tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 6; /* advance pointer to next row */
+ }
}
@@ -4586,143 +4586,143 @@ jpeg_idct_5x10 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
JCOEFPTR coef_block,
JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
- INT32 tmp20, tmp21, tmp22, tmp23, tmp24;
- INT32 z1, z2, z3, z4, z5;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[5*10]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 10-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/20).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 5; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z3 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z3 += ONE << (CONST_BITS-PASS1_BITS-1);
- z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
- z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
- tmp10 = z3 + z1;
- tmp11 = z3 - z2;
-
- tmp22 = RIGHT_SHIFT(z3 - ((z1 - z2) << 1), /* c0 = (c4-c8)*2 */
+ INT32 tmp10, tmp11, tmp12, tmp13, tmp14;
+ INT32 tmp20, tmp21, tmp22, tmp23, tmp24;
+ INT32 z1, z2, z3, z4, z5;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[5*10]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 10-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/20).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 5; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ z3 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z3 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z3 += ONE << (CONST_BITS-PASS1_BITS-1);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z1 = MULTIPLY(z4, FIX(1.144122806)); /* c4 */
+ z2 = MULTIPLY(z4, FIX(0.437016024)); /* c8 */
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z2;
+
+ tmp22 = RIGHT_SHIFT(z3 - ((z1 - z2) << 1), /* c0 = (c4-c8)*2 */
CONST_BITS-PASS1_BITS);
- z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
- tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
- tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
-
- tmp20 = tmp10 + tmp12;
- tmp24 = tmp10 - tmp12;
- tmp21 = tmp11 + tmp13;
- tmp23 = tmp11 - tmp13;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
-
- tmp11 = z2 + z4;
- tmp13 = z2 - z4;
-
- tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
- z5 = z3 << CONST_BITS;
-
- z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
- z4 = z5 + tmp12;
-
- tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
- tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
-
- z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
- z4 = z5 - tmp12 - (tmp13 << (CONST_BITS - 1));
-
- tmp12 = (z1 - tmp13 - z3) << PASS1_BITS;
-
- tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
- tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
-
- /* Final output stage */
-
- wsptr[5*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
- wsptr[5*9] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
- wsptr[5*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
- wsptr[5*8] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
- wsptr[5*2] = (int) (tmp22 + tmp12);
- wsptr[5*7] = (int) (tmp22 - tmp12);
- wsptr[5*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
- wsptr[5*6] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
- wsptr[5*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
- wsptr[5*5] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 10 rows from work array, store into output array.
- * 5-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/10).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 10; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp12 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp12 <<= CONST_BITS;
- tmp13 = (INT32) wsptr[2];
- tmp14 = (INT32) wsptr[4];
- z1 = MULTIPLY(tmp13 + tmp14, FIX(0.790569415)); /* (c2+c4)/2 */
- z2 = MULTIPLY(tmp13 - tmp14, FIX(0.353553391)); /* (c2-c4)/2 */
- z3 = tmp12 + z2;
- tmp10 = z3 + z1;
- tmp11 = z3 - z1;
- tmp12 -= z2 << 2;
-
- /* Odd part */
-
- z2 = (INT32) wsptr[1];
- z3 = (INT32) wsptr[3];
-
- z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
- tmp13 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
- tmp14 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp13,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp14,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 5; /* advance pointer to next row */
- }
+ z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c6 */
+ tmp12 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c2-c6 */
+ tmp13 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c2+c6 */
+
+ tmp20 = tmp10 + tmp12;
+ tmp24 = tmp10 - tmp12;
+ tmp21 = tmp11 + tmp13;
+ tmp23 = tmp11 - tmp13;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ z4 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+
+ tmp11 = z2 + z4;
+ tmp13 = z2 - z4;
+
+ tmp12 = MULTIPLY(tmp13, FIX(0.309016994)); /* (c3-c7)/2 */
+ z5 = z3 << CONST_BITS;
+
+ z2 = MULTIPLY(tmp11, FIX(0.951056516)); /* (c3+c7)/2 */
+ z4 = z5 + tmp12;
+
+ tmp10 = MULTIPLY(z1, FIX(1.396802247)) + z2 + z4; /* c1 */
+ tmp14 = MULTIPLY(z1, FIX(0.221231742)) - z2 + z4; /* c9 */
+
+ z2 = MULTIPLY(tmp11, FIX(0.587785252)); /* (c1-c9)/2 */
+ z4 = z5 - tmp12 - (tmp13 << (CONST_BITS - 1));
+
+ tmp12 = (z1 - tmp13 - z3) << PASS1_BITS;
+
+ tmp11 = MULTIPLY(z1, FIX(1.260073511)) - z2 - z4; /* c3 */
+ tmp13 = MULTIPLY(z1, FIX(0.642039522)) - z2 + z4; /* c7 */
+
+ /* Final output stage */
+
+ wsptr[5*0] = (int) RIGHT_SHIFT(tmp20 + tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[5*9] = (int) RIGHT_SHIFT(tmp20 - tmp10, CONST_BITS-PASS1_BITS);
+ wsptr[5*1] = (int) RIGHT_SHIFT(tmp21 + tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[5*8] = (int) RIGHT_SHIFT(tmp21 - tmp11, CONST_BITS-PASS1_BITS);
+ wsptr[5*2] = (int) (tmp22 + tmp12);
+ wsptr[5*7] = (int) (tmp22 - tmp12);
+ wsptr[5*3] = (int) RIGHT_SHIFT(tmp23 + tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[5*6] = (int) RIGHT_SHIFT(tmp23 - tmp13, CONST_BITS-PASS1_BITS);
+ wsptr[5*4] = (int) RIGHT_SHIFT(tmp24 + tmp14, CONST_BITS-PASS1_BITS);
+ wsptr[5*5] = (int) RIGHT_SHIFT(tmp24 - tmp14, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 10 rows from work array, store into output array.
+ * 5-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/10).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 10; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp12 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp12 <<= CONST_BITS;
+ tmp13 = (INT32) wsptr[2];
+ tmp14 = (INT32) wsptr[4];
+ z1 = MULTIPLY(tmp13 + tmp14, FIX(0.790569415)); /* (c2+c4)/2 */
+ z2 = MULTIPLY(tmp13 - tmp14, FIX(0.353553391)); /* (c2-c4)/2 */
+ z3 = tmp12 + z2;
+ tmp10 = z3 + z1;
+ tmp11 = z3 - z1;
+ tmp12 -= z2 << 2;
+
+ /* Odd part */
+
+ z2 = (INT32) wsptr[1];
+ z3 = (INT32) wsptr[3];
+
+ z1 = MULTIPLY(z2 + z3, FIX(0.831253876)); /* c3 */
+ tmp13 = z1 + MULTIPLY(z2, FIX(0.513743148)); /* c1-c3 */
+ tmp14 = z1 - MULTIPLY(z3, FIX(2.176250899)); /* c1+c3 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[4] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp13,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp11 + tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp11 - tmp14,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 5; /* advance pointer to next row */
+ }
}
@@ -4735,174 +4735,174 @@ jpeg_idct_5x10 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_4x8 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp3;
- INT32 tmp10, tmp11, tmp12, tmp13;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[4*8]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array. */
- /* Note results are scaled up by sqrt(8) compared to a true IDCT; */
- /* furthermore, we scale the results by 2**PASS1_BITS. */
-
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 4; ctr > 0; ctr--) {
- /* Due to quantization, we will usually find that many of the input
- * coefficients are zero, especially the AC terms. We can exploit this
- * by short-circuiting the IDCT calculation for any column in which all
- * the AC terms are zero. In that case each output is equal to the
- * DC coefficient (with scale factor as needed).
- * With typical images and quantization tables, half or more of the
- * column DCT calculations can be simplified this way.
- */
-
- if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
+ INT32 tmp0, tmp1, tmp2, tmp3;
+ INT32 tmp10, tmp11, tmp12, tmp13;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[4*8]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array. */
+ /* Note results are scaled up by sqrt(8) compared to a true IDCT; */
+ /* furthermore, we scale the results by 2**PASS1_BITS. */
+
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 4; ctr > 0; ctr--) {
+ /* Due to quantization, we will usually find that many of the input
+ * coefficients are zero, especially the AC terms. We can exploit this
+ * by short-circuiting the IDCT calculation for any column in which all
+ * the AC terms are zero. In that case each output is equal to the
+ * DC coefficient (with scale factor as needed).
+ * With typical images and quantization tables, half or more of the
+ * column DCT calculations can be simplified this way.
+ */
+
+ if (inptr[DCTSIZE*1] == 0 && inptr[DCTSIZE*2] == 0 &&
inptr[DCTSIZE*3] == 0 && inptr[DCTSIZE*4] == 0 &&
inptr[DCTSIZE*5] == 0 && inptr[DCTSIZE*6] == 0 &&
inptr[DCTSIZE*7] == 0) {
- /* AC terms all zero */
- int dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]) << PASS1_BITS;
-
- wsptr[4*0] = dcval;
- wsptr[4*1] = dcval;
- wsptr[4*2] = dcval;
- wsptr[4*3] = dcval;
- wsptr[4*4] = dcval;
- wsptr[4*5] = dcval;
- wsptr[4*6] = dcval;
- wsptr[4*7] = dcval;
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- continue;
- }
-
- /* Even part: reverse the even part of the forward DCT. */
- /* The rotator is sqrt(2)*c(-6). */
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
- tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
- tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
-
- z2 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- z2 <<= CONST_BITS;
- z3 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- z2 += ONE << (CONST_BITS-PASS1_BITS-1);
-
- tmp0 = z2 + z3;
- tmp1 = z2 - z3;
-
- tmp10 = tmp0 + tmp2;
- tmp13 = tmp0 - tmp2;
- tmp11 = tmp1 + tmp3;
- tmp12 = tmp1 - tmp3;
-
- /* Odd part per figure 8; the matrix is unitary and hence its
- * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
- */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
- tmp1 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- tmp3 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
-
- z2 = tmp0 + tmp2;
- z3 = tmp1 + tmp3;
-
- z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
- z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
- z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
- z2 += z1;
- z3 += z1;
-
- z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
- tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
- tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
- tmp0 += z1 + z2;
- tmp3 += z1 + z3;
-
- z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
- tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
- tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
- tmp1 += z1 + z3;
- tmp2 += z1 + z2;
-
- /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
-
- wsptr[4*0] = (int) RIGHT_SHIFT(tmp10 + tmp3, CONST_BITS-PASS1_BITS);
- wsptr[4*7] = (int) RIGHT_SHIFT(tmp10 - tmp3, CONST_BITS-PASS1_BITS);
- wsptr[4*1] = (int) RIGHT_SHIFT(tmp11 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[4*6] = (int) RIGHT_SHIFT(tmp11 - tmp2, CONST_BITS-PASS1_BITS);
- wsptr[4*2] = (int) RIGHT_SHIFT(tmp12 + tmp1, CONST_BITS-PASS1_BITS);
- wsptr[4*5] = (int) RIGHT_SHIFT(tmp12 - tmp1, CONST_BITS-PASS1_BITS);
- wsptr[4*3] = (int) RIGHT_SHIFT(tmp13 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[4*4] = (int) RIGHT_SHIFT(tmp13 - tmp0, CONST_BITS-PASS1_BITS);
-
- inptr++; /* advance pointers to next column */
- quantptr++;
- wsptr++;
- }
-
- /* Pass 2: process 8 rows from work array, store into output array.
- * 4-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 8; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp2 = (INT32) wsptr[2];
-
- tmp10 = (tmp0 + tmp2) << CONST_BITS;
- tmp12 = (tmp0 - tmp2) << CONST_BITS;
-
- /* Odd part */
- /* Same rotation as in the even part of the 8x8 LL&M IDCT */
-
- z2 = (INT32) wsptr[1];
- z3 = (INT32) wsptr[3];
-
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
- tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
- tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 4; /* advance pointer to next row */
- }
+ /* AC terms all zero */
+ int dcval = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]) << PASS1_BITS;
+
+ wsptr[4*0] = dcval;
+ wsptr[4*1] = dcval;
+ wsptr[4*2] = dcval;
+ wsptr[4*3] = dcval;
+ wsptr[4*4] = dcval;
+ wsptr[4*5] = dcval;
+ wsptr[4*6] = dcval;
+ wsptr[4*7] = dcval;
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ continue;
+ }
+
+ /* Even part: reverse the even part of the forward DCT. */
+ /* The rotator is sqrt(2)*c(-6). */
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*6], quantptr[DCTSIZE*6]);
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100);
+ tmp2 = z1 + MULTIPLY(z2, FIX_0_765366865);
+ tmp3 = z1 - MULTIPLY(z3, FIX_1_847759065);
+
+ z2 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ z2 <<= CONST_BITS;
+ z3 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ z2 += ONE << (CONST_BITS-PASS1_BITS-1);
+
+ tmp0 = z2 + z3;
+ tmp1 = z2 - z3;
+
+ tmp10 = tmp0 + tmp2;
+ tmp13 = tmp0 - tmp2;
+ tmp11 = tmp1 + tmp3;
+ tmp12 = tmp1 - tmp3;
+
+ /* Odd part per figure 8; the matrix is unitary and hence its
+ * transpose is its inverse. i0..i3 are y7,y5,y3,y1 respectively.
+ */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*7], quantptr[DCTSIZE*7]);
+ tmp1 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ tmp3 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+
+ z2 = tmp0 + tmp2;
+ z3 = tmp1 + tmp3;
+
+ z1 = MULTIPLY(z2 + z3, FIX_1_175875602); /* sqrt(2) * c3 */
+ z2 = MULTIPLY(z2, - FIX_1_961570560); /* sqrt(2) * (-c3-c5) */
+ z3 = MULTIPLY(z3, - FIX_0_390180644); /* sqrt(2) * (c5-c3) */
+ z2 += z1;
+ z3 += z1;
+
+ z1 = MULTIPLY(tmp0 + tmp3, - FIX_0_899976223); /* sqrt(2) * (c7-c3) */
+ tmp0 = MULTIPLY(tmp0, FIX_0_298631336); /* sqrt(2) * (-c1+c3+c5-c7) */
+ tmp3 = MULTIPLY(tmp3, FIX_1_501321110); /* sqrt(2) * ( c1+c3-c5-c7) */
+ tmp0 += z1 + z2;
+ tmp3 += z1 + z3;
+
+ z1 = MULTIPLY(tmp1 + tmp2, - FIX_2_562915447); /* sqrt(2) * (-c1-c3) */
+ tmp1 = MULTIPLY(tmp1, FIX_2_053119869); /* sqrt(2) * ( c1+c3-c5+c7) */
+ tmp2 = MULTIPLY(tmp2, FIX_3_072711026); /* sqrt(2) * ( c1+c3+c5-c7) */
+ tmp1 += z1 + z3;
+ tmp2 += z1 + z2;
+
+ /* Final output stage: inputs are tmp10..tmp13, tmp0..tmp3 */
+
+ wsptr[4*0] = (int) RIGHT_SHIFT(tmp10 + tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[4*7] = (int) RIGHT_SHIFT(tmp10 - tmp3, CONST_BITS-PASS1_BITS);
+ wsptr[4*1] = (int) RIGHT_SHIFT(tmp11 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[4*6] = (int) RIGHT_SHIFT(tmp11 - tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[4*2] = (int) RIGHT_SHIFT(tmp12 + tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[4*5] = (int) RIGHT_SHIFT(tmp12 - tmp1, CONST_BITS-PASS1_BITS);
+ wsptr[4*3] = (int) RIGHT_SHIFT(tmp13 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[4*4] = (int) RIGHT_SHIFT(tmp13 - tmp0, CONST_BITS-PASS1_BITS);
+
+ inptr++; /* advance pointers to next column */
+ quantptr++;
+ wsptr++;
+ }
+
+ /* Pass 2: process 8 rows from work array, store into output array.
+ * 4-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/16).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 8; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp2 = (INT32) wsptr[2];
+
+ tmp10 = (tmp0 + tmp2) << CONST_BITS;
+ tmp12 = (tmp0 - tmp2) << CONST_BITS;
+
+ /* Odd part */
+ /* Same rotation as in the even part of the 8x8 LL&M IDCT */
+
+ z2 = (INT32) wsptr[1];
+ z3 = (INT32) wsptr[3];
+
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
+ tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
+ tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[3] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp12 + tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp12 - tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 4; /* advance pointer to next row */
+ }
}
@@ -4915,98 +4915,98 @@ jpeg_idct_4x8 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_3x6 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- int * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- int workspace[3*6]; /* buffers data between passes */
- SHIFT_TEMPS
-
- /* Pass 1: process columns from input, store into work array.
- * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 3; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
-
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp0 <<= CONST_BITS;
- /* Add fudge factor here for final descale. */
- tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
- tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
- tmp1 = tmp0 + tmp10;
- tmp11 = RIGHT_SHIFT(tmp0 - tmp10 - tmp10, CONST_BITS-PASS1_BITS);
- tmp10 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
- tmp10 = tmp1 + tmp0;
- tmp12 = tmp1 - tmp0;
-
- /* Odd part */
-
- z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
- tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
- tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
- tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
- tmp1 = (z1 - z2 - z3) << PASS1_BITS;
-
- /* Final output stage */
-
- wsptr[3*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
- wsptr[3*5] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
- wsptr[3*1] = (int) (tmp11 + tmp1);
- wsptr[3*4] = (int) (tmp11 - tmp1);
- wsptr[3*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
- wsptr[3*3] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
- }
-
- /* Pass 2: process 6 rows from work array, store into output array.
- * 3-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/6).
- */
- wsptr = workspace;
- for (ctr = 0; ctr < 6; ctr++) {
- outptr = output_buf[ctr] + output_col;
-
- /* Even part */
-
- /* Add fudge factor here for final descale. */
- tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
- tmp0 <<= CONST_BITS;
- tmp2 = (INT32) wsptr[2];
- tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
- tmp10 = tmp0 + tmp12;
- tmp2 = tmp0 - tmp12 - tmp12;
-
- /* Odd part */
-
- tmp12 = (INT32) wsptr[1];
- tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
-
- /* Final output stage */
-
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp2,
- CONST_BITS+PASS1_BITS+3)
- & RANGE_MASK];
-
- wsptr += 3; /* advance pointer to next row */
- }
+ INT32 tmp0, tmp1, tmp2, tmp10, tmp11, tmp12;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ int * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ int workspace[3*6]; /* buffers data between passes */
+ SHIFT_TEMPS
+
+ /* Pass 1: process columns from input, store into work array.
+ * 6-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/12).
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 3; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
+
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp0 <<= CONST_BITS;
+ /* Add fudge factor here for final descale. */
+ tmp0 += ONE << (CONST_BITS-PASS1_BITS-1);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*4], quantptr[DCTSIZE*4]);
+ tmp10 = MULTIPLY(tmp2, FIX(0.707106781)); /* c4 */
+ tmp1 = tmp0 + tmp10;
+ tmp11 = RIGHT_SHIFT(tmp0 - tmp10 - tmp10, CONST_BITS-PASS1_BITS);
+ tmp10 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp0 = MULTIPLY(tmp10, FIX(1.224744871)); /* c2 */
+ tmp10 = tmp1 + tmp0;
+ tmp12 = tmp1 - tmp0;
+
+ /* Odd part */
+
+ z1 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*5], quantptr[DCTSIZE*5]);
+ tmp1 = MULTIPLY(z1 + z3, FIX(0.366025404)); /* c5 */
+ tmp0 = tmp1 + ((z1 + z2) << CONST_BITS);
+ tmp2 = tmp1 + ((z3 - z2) << CONST_BITS);
+ tmp1 = (z1 - z2 - z3) << PASS1_BITS;
+
+ /* Final output stage */
+
+ wsptr[3*0] = (int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[3*5] = (int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS-PASS1_BITS);
+ wsptr[3*1] = (int) (tmp11 + tmp1);
+ wsptr[3*4] = (int) (tmp11 - tmp1);
+ wsptr[3*2] = (int) RIGHT_SHIFT(tmp12 + tmp2, CONST_BITS-PASS1_BITS);
+ wsptr[3*3] = (int) RIGHT_SHIFT(tmp12 - tmp2, CONST_BITS-PASS1_BITS);
+ }
+
+ /* Pass 2: process 6 rows from work array, store into output array.
+ * 3-point IDCT kernel, cK represents sqrt(2) * cos(K*pi/6).
+ */
+ wsptr = workspace;
+ for (ctr = 0; ctr < 6; ctr++) {
+ outptr = output_buf[ctr] + output_col;
+
+ /* Even part */
+
+ /* Add fudge factor here for final descale. */
+ tmp0 = (INT32) wsptr[0] + (ONE << (PASS1_BITS+2));
+ tmp0 <<= CONST_BITS;
+ tmp2 = (INT32) wsptr[2];
+ tmp12 = MULTIPLY(tmp2, FIX(0.707106781)); /* c2 */
+ tmp10 = tmp0 + tmp12;
+ tmp2 = tmp0 - tmp12 - tmp12;
+
+ /* Odd part */
+
+ tmp12 = (INT32) wsptr[1];
+ tmp0 = MULTIPLY(tmp12, FIX(1.224744871)); /* c1 */
+
+ /* Final output stage */
+
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[2] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp2,
+ CONST_BITS+PASS1_BITS+3)
+ & RANGE_MASK];
+
+ wsptr += 3; /* advance pointer to next row */
+ }
}
@@ -5019,78 +5019,78 @@ jpeg_idct_3x6 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_2x4 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp2, tmp10, tmp12;
- INT32 z1, z2, z3;
- JCOEFPTR inptr;
- ISLOW_MULT_TYPE * quantptr;
- INT32 * wsptr;
- JSAMPROW outptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- int ctr;
- INT32 workspace[2*4]; /* buffers data between passes */
- SHIFT_TEMPS
+ INT32 tmp0, tmp2, tmp10, tmp12;
+ INT32 z1, z2, z3;
+ JCOEFPTR inptr;
+ ISLOW_MULT_TYPE * quantptr;
+ INT32 * wsptr;
+ JSAMPROW outptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ int ctr;
+ INT32 workspace[2*4]; /* buffers data between passes */
+ SHIFT_TEMPS
- /* Pass 1: process columns from input, store into work array.
- * 4-point IDCT kernel,
- * cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point IDCT].
- */
- inptr = coef_block;
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- wsptr = workspace;
- for (ctr = 0; ctr < 2; ctr++, inptr++, quantptr++, wsptr++) {
- /* Even part */
+ /* Pass 1: process columns from input, store into work array.
+ * 4-point IDCT kernel,
+ * cK represents sqrt(2) * cos(K*pi/16) [refers to 8-point IDCT].
+ */
+ inptr = coef_block;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 2; ctr++, inptr++, quantptr++, wsptr++) {
+ /* Even part */
- tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
- tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
+ tmp0 = DEQUANTIZE(inptr[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ tmp2 = DEQUANTIZE(inptr[DCTSIZE*2], quantptr[DCTSIZE*2]);
- tmp10 = (tmp0 + tmp2) << CONST_BITS;
- tmp12 = (tmp0 - tmp2) << CONST_BITS;
+ tmp10 = (tmp0 + tmp2) << CONST_BITS;
+ tmp12 = (tmp0 - tmp2) << CONST_BITS;
- /* Odd part */
- /* Same rotation as in the even part of the 8x8 LL&M IDCT */
+ /* Odd part */
+ /* Same rotation as in the even part of the 8x8 LL&M IDCT */
- z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
- z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
+ z2 = DEQUANTIZE(inptr[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ z3 = DEQUANTIZE(inptr[DCTSIZE*3], quantptr[DCTSIZE*3]);
- z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
- tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
- tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
+ z1 = MULTIPLY(z2 + z3, FIX_0_541196100); /* c6 */
+ tmp0 = z1 + MULTIPLY(z2, FIX_0_765366865); /* c2-c6 */
+ tmp2 = z1 - MULTIPLY(z3, FIX_1_847759065); /* c2+c6 */
- /* Final output stage */
+ /* Final output stage */
- wsptr[2*0] = tmp10 + tmp0;
- wsptr[2*3] = tmp10 - tmp0;
- wsptr[2*1] = tmp12 + tmp2;
- wsptr[2*2] = tmp12 - tmp2;
- }
+ wsptr[2*0] = tmp10 + tmp0;
+ wsptr[2*3] = tmp10 - tmp0;
+ wsptr[2*1] = tmp12 + tmp2;
+ wsptr[2*2] = tmp12 - tmp2;
+ }
- /* Pass 2: process 4 rows from work array, store into output array. */
+ /* Pass 2: process 4 rows from work array, store into output array. */
- wsptr = workspace;
- for (ctr = 0; ctr < 4; ctr++) {
- outptr = output_buf[ctr] + output_col;
+ wsptr = workspace;
+ for (ctr = 0; ctr < 4; ctr++) {
+ outptr = output_buf[ctr] + output_col;
- /* Even part */
+ /* Even part */
- /* Add fudge factor here for final descale. */
- tmp10 = wsptr[0] + (ONE << (CONST_BITS+2));
+ /* Add fudge factor here for final descale. */
+ tmp10 = wsptr[0] + (ONE << (CONST_BITS+2));
- /* Odd part */
+ /* Odd part */
- tmp0 = wsptr[1];
+ tmp0 = wsptr[1];
- /* Final output stage */
+ /* Final output stage */
- outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS+3)
- & RANGE_MASK];
- outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS+3)
- & RANGE_MASK];
+ outptr[0] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0, CONST_BITS+3)
+ & RANGE_MASK];
+ outptr[1] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0, CONST_BITS+3)
+ & RANGE_MASK];
- wsptr += 2; /* advance pointer to next row */
- }
+ wsptr += 2; /* advance pointer to next row */
+ }
}
@@ -5103,34 +5103,34 @@ jpeg_idct_2x4 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
GLOBAL(void)
jpeg_idct_1x2 (j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col)
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col)
{
- INT32 tmp0, tmp10;
- ISLOW_MULT_TYPE * quantptr;
- JSAMPLE *range_limit = IDCT_range_limit(cinfo);
- SHIFT_TEMPS
+ INT32 tmp0, tmp10;
+ ISLOW_MULT_TYPE * quantptr;
+ JSAMPLE *range_limit = IDCT_range_limit(cinfo);
+ SHIFT_TEMPS
- /* Process 1 column from input, store into output array. */
+ /* Process 1 column from input, store into output array. */
- quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
+ quantptr = (ISLOW_MULT_TYPE *) compptr->dct_table;
- /* Even part */
+ /* Even part */
- tmp10 = DEQUANTIZE(coef_block[DCTSIZE*0], quantptr[DCTSIZE*0]);
- /* Add fudge factor here for final descale. */
- tmp10 += ONE << 2;
+ tmp10 = DEQUANTIZE(coef_block[DCTSIZE*0], quantptr[DCTSIZE*0]);
+ /* Add fudge factor here for final descale. */
+ tmp10 += ONE << 2;
- /* Odd part */
+ /* Odd part */
- tmp0 = DEQUANTIZE(coef_block[DCTSIZE*1], quantptr[DCTSIZE*1]);
+ tmp0 = DEQUANTIZE(coef_block[DCTSIZE*1], quantptr[DCTSIZE*1]);
- /* Final output stage */
+ /* Final output stage */
- output_buf[0][output_col] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0, 3)
- & RANGE_MASK];
- output_buf[1][output_col] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0, 3)
- & RANGE_MASK];
+ output_buf[0][output_col] = range_limit[(int) RIGHT_SHIFT(tmp10 + tmp0, 3)
+ & RANGE_MASK];
+ output_buf[1][output_col] = range_limit[(int) RIGHT_SHIFT(tmp10 - tmp0, 3)
+ & RANGE_MASK];
}
#endif /* IDCT_SCALING_SUPPORTED */
diff --git a/src/lib/libjpeg/jinclude.h b/src/lib/libjpeg/jinclude.h
index 0a4f15146ae..10bde1e0dd0 100644
--- a/src/lib/libjpeg/jinclude.h
+++ b/src/lib/libjpeg/jinclude.h
@@ -17,8 +17,8 @@
/* Include auto-config file to find out which system include files we need. */
-#include "jconfig.h" /* auto configuration options */
-#define JCONFIG_INCLUDED /* so that jpeglib.h doesn't do it again */
+#include "jconfig.h" /* auto configuration options */
+#define JCONFIG_INCLUDED /* so that jpeglib.h doesn't do it again */
/*
* We need the NULL macro and size_t typedef.
@@ -58,14 +58,14 @@
#ifdef NEED_BSD_STRINGS
#include <strings.h>
-#define MEMZERO(target,size) bzero((void *)(target), (size_t)(size))
-#define MEMCOPY(dest,src,size) bcopy((const void *)(src), (void *)(dest), (size_t)(size))
+#define MEMZERO(target,size) bzero((void *)(target), (size_t)(size))
+#define MEMCOPY(dest,src,size) bcopy((const void *)(src), (void *)(dest), (size_t)(size))
#else /* not BSD, assume ANSI/SysV string lib */
#include <string.h>
-#define MEMZERO(target,size) memset((void *)(target), 0, (size_t)(size))
-#define MEMCOPY(dest,src,size) memcpy((void *)(dest), (const void *)(src), (size_t)(size))
+#define MEMZERO(target,size) memset((void *)(target), 0, (size_t)(size))
+#define MEMCOPY(dest,src,size) memcpy((void *)(dest), (const void *)(src), (size_t)(size))
#endif
@@ -77,7 +77,7 @@
* we always use this SIZEOF() macro in place of using sizeof() directly.
*/
-#define SIZEOF(object) ((size_t) sizeof(object))
+#define SIZEOF(object) ((size_t) sizeof(object))
/*
* The modules that use fread() and fwrite() always invoke them through
@@ -86,6 +86,6 @@
*/
#define JFREAD(file,buf,sizeofbuf) \
- ((size_t) fread((void *) (buf), (size_t) 1, (size_t) (sizeofbuf), (file)))
+ ((size_t) fread((void *) (buf), (size_t) 1, (size_t) (sizeofbuf), (file)))
#define JFWRITE(file,buf,sizeofbuf) \
- ((size_t) fwrite((const void *) (buf), (size_t) 1, (size_t) (sizeofbuf), (file)))
+ ((size_t) fwrite((const void *) (buf), (size_t) 1, (size_t) (sizeofbuf), (file)))
diff --git a/src/lib/libjpeg/jmemansi.c b/src/lib/libjpeg/jmemansi.c
index 2d93e496251..a5f58152b26 100644
--- a/src/lib/libjpeg/jmemansi.c
+++ b/src/lib/libjpeg/jmemansi.c
@@ -15,15 +15,15 @@
#define JPEG_INTERNALS
#include "jinclude.h"
#include "jpeglib.h"
-#include "jmemsys.h" /* import the system-dependent declarations */
+#include "jmemsys.h" /* import the system-dependent declarations */
-#ifndef HAVE_STDLIB_H /* <stdlib.h> should declare malloc(),free() */
+#ifndef HAVE_STDLIB_H /* <stdlib.h> should declare malloc(),free() */
extern void * malloc JPP((size_t size));
extern void free JPP((void *ptr));
#endif
-#ifndef SEEK_SET /* pre-ANSI systems may not define this; */
-#define SEEK_SET 0 /* if not, assume 0 is correct */
+#ifndef SEEK_SET /* pre-ANSI systems may not define this; */
+#define SEEK_SET 0 /* if not, assume 0 is correct */
#endif
@@ -35,13 +35,13 @@ extern void free JPP((void *ptr));
GLOBAL(void *)
jpeg_get_small (j_common_ptr cinfo, size_t sizeofobject)
{
- return (void *) malloc(sizeofobject);
+ return (void *) malloc(sizeofobject);
}
GLOBAL(void)
jpeg_free_small (j_common_ptr cinfo, void * object, size_t sizeofobject)
{
- free(object);
+ free(object);
}
@@ -55,13 +55,13 @@ jpeg_free_small (j_common_ptr cinfo, void * object, size_t sizeofobject)
GLOBAL(void FAR *)
jpeg_get_large (j_common_ptr cinfo, size_t sizeofobject)
{
- return (void FAR *) malloc(sizeofobject);
+ return (void FAR *) malloc(sizeofobject);
}
GLOBAL(void)
jpeg_free_large (j_common_ptr cinfo, void FAR * object, size_t sizeofobject)
{
- free(object);
+ free(object);
}
@@ -73,15 +73,15 @@ jpeg_free_large (j_common_ptr cinfo, void FAR * object, size_t sizeofobject)
* a slop factor of 5% or so.
*/
-#ifndef DEFAULT_MAX_MEM /* so can override from makefile */
-#define DEFAULT_MAX_MEM 1000000L /* default: one megabyte */
+#ifndef DEFAULT_MAX_MEM /* so can override from makefile */
+#define DEFAULT_MAX_MEM 1000000L /* default: one megabyte */
#endif
GLOBAL(long)
jpeg_mem_available (j_common_ptr cinfo, long min_bytes_needed,
- long max_bytes_needed, long already_allocated)
+ long max_bytes_needed, long already_allocated)
{
- return cinfo->mem->max_memory_to_use - already_allocated;
+ return cinfo->mem->max_memory_to_use - already_allocated;
}
@@ -95,37 +95,37 @@ jpeg_mem_available (j_common_ptr cinfo, long min_bytes_needed,
METHODDEF(void)
read_backing_store (j_common_ptr cinfo, backing_store_ptr info,
- void FAR * buffer_address,
- long file_offset, long byte_count)
+ void FAR * buffer_address,
+ long file_offset, long byte_count)
{
- if (fseek(info->temp_file, file_offset, SEEK_SET))
- ERREXIT(cinfo, JERR_TFILE_SEEK);
- if (JFREAD(info->temp_file, buffer_address, byte_count)
- != (size_t) byte_count)
- ERREXIT(cinfo, JERR_TFILE_READ);
+ if (fseek(info->temp_file, file_offset, SEEK_SET))
+ ERREXIT(cinfo, JERR_TFILE_SEEK);
+ if (JFREAD(info->temp_file, buffer_address, byte_count)
+ != (size_t) byte_count)
+ ERREXIT(cinfo, JERR_TFILE_READ);
}
METHODDEF(void)
write_backing_store (j_common_ptr cinfo, backing_store_ptr info,
- void FAR * buffer_address,
- long file_offset, long byte_count)
+ void FAR * buffer_address,
+ long file_offset, long byte_count)
{
- if (fseek(info->temp_file, file_offset, SEEK_SET))
- ERREXIT(cinfo, JERR_TFILE_SEEK);
- if (JFWRITE(info->temp_file, buffer_address, byte_count)
- != (size_t) byte_count)
- ERREXIT(cinfo, JERR_TFILE_WRITE);
+ if (fseek(info->temp_file, file_offset, SEEK_SET))
+ ERREXIT(cinfo, JERR_TFILE_SEEK);
+ if (JFWRITE(info->temp_file, buffer_address, byte_count)
+ != (size_t) byte_count)
+ ERREXIT(cinfo, JERR_TFILE_WRITE);
}
METHODDEF(void)
close_backing_store (j_common_ptr cinfo, backing_store_ptr info)
{
- fclose(info->temp_file);
- /* Since this implementation uses tmpfile() to create the file,
- * no explicit file deletion is needed.
- */
+ fclose(info->temp_file);
+ /* Since this implementation uses tmpfile() to create the file,
+ * no explicit file deletion is needed.
+ */
}
@@ -139,13 +139,13 @@ close_backing_store (j_common_ptr cinfo, backing_store_ptr info)
GLOBAL(void)
jpeg_open_backing_store (j_common_ptr cinfo, backing_store_ptr info,
- long total_bytes_needed)
+ long total_bytes_needed)
{
- if ((info->temp_file = tmpfile()) == NULL)
- ERREXITS(cinfo, JERR_TFILE_CREATE, "");
- info->read_backing_store = read_backing_store;
- info->write_backing_store = write_backing_store;
- info->close_backing_store = close_backing_store;
+ if ((info->temp_file = tmpfile()) == NULL)
+ ERREXITS(cinfo, JERR_TFILE_CREATE, "");
+ info->read_backing_store = read_backing_store;
+ info->write_backing_store = write_backing_store;
+ info->close_backing_store = close_backing_store;
}
@@ -157,11 +157,11 @@ jpeg_open_backing_store (j_common_ptr cinfo, backing_store_ptr info,
GLOBAL(long)
jpeg_mem_init (j_common_ptr cinfo)
{
- return DEFAULT_MAX_MEM; /* default for max_memory_to_use */
+ return DEFAULT_MAX_MEM; /* default for max_memory_to_use */
}
GLOBAL(void)
jpeg_mem_term (j_common_ptr cinfo)
{
- /* no work */
+ /* no work */
}
diff --git a/src/lib/libjpeg/jmemmgr.c b/src/lib/libjpeg/jmemmgr.c
index 06a4ad24c19..a50d30fa408 100644
--- a/src/lib/libjpeg/jmemmgr.c
+++ b/src/lib/libjpeg/jmemmgr.c
@@ -25,13 +25,13 @@
*/
#define JPEG_INTERNALS
-#define AM_MEMORY_MANAGER /* we define jvirt_Xarray_control structs */
+#define AM_MEMORY_MANAGER /* we define jvirt_Xarray_control structs */
#include "jinclude.h"
#include "jpeglib.h"
-#include "jmemsys.h" /* import the system-dependent declarations */
+#include "jmemsys.h" /* import the system-dependent declarations */
#ifndef NO_GETENV
-#ifndef HAVE_STDLIB_H /* <stdlib.h> should declare getenv() */
+#ifndef HAVE_STDLIB_H /* <stdlib.h> should declare getenv() */
extern char * getenv JPP((const char * name));
#endif
#endif
@@ -69,7 +69,7 @@ extern char * getenv JPP((const char * name));
* such a compiler.
*/
-#ifndef ALIGN_TYPE /* so can override from jconfig.h */
+#ifndef ALIGN_TYPE /* so can override from jconfig.h */
#define ALIGN_TYPE double
#endif
@@ -89,23 +89,23 @@ extern char * getenv JPP((const char * name));
typedef union small_pool_struct * small_pool_ptr;
typedef union small_pool_struct {
- struct {
- small_pool_ptr next; /* next in list of pools */
- size_t bytes_used; /* how many bytes already used within pool */
- size_t bytes_left; /* bytes still available in this pool */
- } hdr;
- ALIGN_TYPE dummy; /* included in union to ensure alignment */
+ struct {
+ small_pool_ptr next; /* next in list of pools */
+ size_t bytes_used; /* how many bytes already used within pool */
+ size_t bytes_left; /* bytes still available in this pool */
+ } hdr;
+ ALIGN_TYPE dummy; /* included in union to ensure alignment */
} small_pool_hdr;
typedef union large_pool_struct FAR * large_pool_ptr;
typedef union large_pool_struct {
- struct {
- large_pool_ptr next; /* next in list of pools */
- size_t bytes_used; /* how many bytes already used within pool */
- size_t bytes_left; /* bytes still available in this pool */
- } hdr;
- ALIGN_TYPE dummy; /* included in union to ensure alignment */
+ struct {
+ large_pool_ptr next; /* next in list of pools */
+ size_t bytes_used; /* how many bytes already used within pool */
+ size_t bytes_left; /* bytes still available in this pool */
+ } hdr;
+ ALIGN_TYPE dummy; /* included in union to ensure alignment */
} large_pool_hdr;
@@ -114,27 +114,27 @@ typedef union large_pool_struct {
*/
typedef struct {
- struct jpeg_memory_mgr pub; /* public fields */
-
- /* Each pool identifier (lifetime class) names a linked list of pools. */
- small_pool_ptr small_list[JPOOL_NUMPOOLS];
- large_pool_ptr large_list[JPOOL_NUMPOOLS];
-
- /* Since we only have one lifetime class of virtual arrays, only one
- * linked list is necessary (for each datatype). Note that the virtual
- * array control blocks being linked together are actually stored somewhere
- * in the small-pool list.
- */
- jvirt_sarray_ptr virt_sarray_list;
- jvirt_barray_ptr virt_barray_list;
-
- /* This counts total space obtained from jpeg_get_small/large */
- long total_space_allocated;
-
- /* alloc_sarray and alloc_barray set this value for use by virtual
- * array routines.
- */
- JDIMENSION last_rowsperchunk; /* from most recent alloc_sarray/barray */
+ struct jpeg_memory_mgr pub; /* public fields */
+
+ /* Each pool identifier (lifetime class) names a linked list of pools. */
+ small_pool_ptr small_list[JPOOL_NUMPOOLS];
+ large_pool_ptr large_list[JPOOL_NUMPOOLS];
+
+ /* Since we only have one lifetime class of virtual arrays, only one
+ * linked list is necessary (for each datatype). Note that the virtual
+ * array control blocks being linked together are actually stored somewhere
+ * in the small-pool list.
+ */
+ jvirt_sarray_ptr virt_sarray_list;
+ jvirt_barray_ptr virt_barray_list;
+
+ /* This counts total space obtained from jpeg_get_small/large */
+ long total_space_allocated;
+
+ /* alloc_sarray and alloc_barray set this value for use by virtual
+ * array routines.
+ */
+ JDIMENSION last_rowsperchunk; /* from most recent alloc_sarray/barray */
} my_memory_mgr;
typedef my_memory_mgr * my_mem_ptr;
@@ -148,66 +148,66 @@ typedef my_memory_mgr * my_mem_ptr;
*/
struct jvirt_sarray_control {
- JSAMPARRAY mem_buffer; /* => the in-memory buffer */
- JDIMENSION rows_in_array; /* total virtual array height */
- JDIMENSION samplesperrow; /* width of array (and of memory buffer) */
- JDIMENSION maxaccess; /* max rows accessed by access_virt_sarray */
- JDIMENSION rows_in_mem; /* height of memory buffer */
- JDIMENSION rowsperchunk; /* allocation chunk size in mem_buffer */
- JDIMENSION cur_start_row; /* first logical row # in the buffer */
- JDIMENSION first_undef_row; /* row # of first uninitialized row */
- boolean pre_zero; /* pre-zero mode requested? */
- boolean dirty; /* do current buffer contents need written? */
- boolean b_s_open; /* is backing-store data valid? */
- jvirt_sarray_ptr next; /* link to next virtual sarray control block */
- backing_store_info b_s_info; /* System-dependent control info */
+ JSAMPARRAY mem_buffer; /* => the in-memory buffer */
+ JDIMENSION rows_in_array; /* total virtual array height */
+ JDIMENSION samplesperrow; /* width of array (and of memory buffer) */
+ JDIMENSION maxaccess; /* max rows accessed by access_virt_sarray */
+ JDIMENSION rows_in_mem; /* height of memory buffer */
+ JDIMENSION rowsperchunk; /* allocation chunk size in mem_buffer */
+ JDIMENSION cur_start_row; /* first logical row # in the buffer */
+ JDIMENSION first_undef_row; /* row # of first uninitialized row */
+ boolean pre_zero; /* pre-zero mode requested? */
+ boolean dirty; /* do current buffer contents need written? */
+ boolean b_s_open; /* is backing-store data valid? */
+ jvirt_sarray_ptr next; /* link to next virtual sarray control block */
+ backing_store_info b_s_info; /* System-dependent control info */
};
struct jvirt_barray_control {
- JBLOCKARRAY mem_buffer; /* => the in-memory buffer */
- JDIMENSION rows_in_array; /* total virtual array height */
- JDIMENSION blocksperrow; /* width of array (and of memory buffer) */
- JDIMENSION maxaccess; /* max rows accessed by access_virt_barray */
- JDIMENSION rows_in_mem; /* height of memory buffer */
- JDIMENSION rowsperchunk; /* allocation chunk size in mem_buffer */
- JDIMENSION cur_start_row; /* first logical row # in the buffer */
- JDIMENSION first_undef_row; /* row # of first uninitialized row */
- boolean pre_zero; /* pre-zero mode requested? */
- boolean dirty; /* do current buffer contents need written? */
- boolean b_s_open; /* is backing-store data valid? */
- jvirt_barray_ptr next; /* link to next virtual barray control block */
- backing_store_info b_s_info; /* System-dependent control info */
+ JBLOCKARRAY mem_buffer; /* => the in-memory buffer */
+ JDIMENSION rows_in_array; /* total virtual array height */
+ JDIMENSION blocksperrow; /* width of array (and of memory buffer) */
+ JDIMENSION maxaccess; /* max rows accessed by access_virt_barray */
+ JDIMENSION rows_in_mem; /* height of memory buffer */
+ JDIMENSION rowsperchunk; /* allocation chunk size in mem_buffer */
+ JDIMENSION cur_start_row; /* first logical row # in the buffer */
+ JDIMENSION first_undef_row; /* row # of first uninitialized row */
+ boolean pre_zero; /* pre-zero mode requested? */
+ boolean dirty; /* do current buffer contents need written? */
+ boolean b_s_open; /* is backing-store data valid? */
+ jvirt_barray_ptr next; /* link to next virtual barray control block */
+ backing_store_info b_s_info; /* System-dependent control info */
};
-#ifdef MEM_STATS /* optional extra stuff for statistics */
+#ifdef MEM_STATS /* optional extra stuff for statistics */
LOCAL(void)
print_mem_stats (j_common_ptr cinfo, int pool_id)
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- small_pool_ptr shdr_ptr;
- large_pool_ptr lhdr_ptr;
-
- /* Since this is only a debugging stub, we can cheat a little by using
- * fprintf directly rather than going through the trace message code.
- * This is helpful because message parm array can't handle longs.
- */
- fprintf(stderr, "Freeing pool %d, total space = %ld\n",
- pool_id, mem->total_space_allocated);
-
- for (lhdr_ptr = mem->large_list[pool_id]; lhdr_ptr != NULL;
- lhdr_ptr = lhdr_ptr->hdr.next) {
- fprintf(stderr, " Large chunk used %ld\n",
- (long) lhdr_ptr->hdr.bytes_used);
- }
-
- for (shdr_ptr = mem->small_list[pool_id]; shdr_ptr != NULL;
- shdr_ptr = shdr_ptr->hdr.next) {
- fprintf(stderr, " Small chunk used %ld free %ld\n",
- (long) shdr_ptr->hdr.bytes_used,
- (long) shdr_ptr->hdr.bytes_left);
- }
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ small_pool_ptr shdr_ptr;
+ large_pool_ptr lhdr_ptr;
+
+ /* Since this is only a debugging stub, we can cheat a little by using
+ * fprintf directly rather than going through the trace message code.
+ * This is helpful because message parm array can't handle longs.
+ */
+ fprintf(stderr, "Freeing pool %d, total space = %ld\n",
+ pool_id, mem->total_space_allocated);
+
+ for (lhdr_ptr = mem->large_list[pool_id]; lhdr_ptr != NULL;
+ lhdr_ptr = lhdr_ptr->hdr.next) {
+ fprintf(stderr, " Large chunk used %ld\n",
+ (long) lhdr_ptr->hdr.bytes_used);
+ }
+
+ for (shdr_ptr = mem->small_list[pool_id]; shdr_ptr != NULL;
+ shdr_ptr = shdr_ptr->hdr.next) {
+ fprintf(stderr, " Small chunk used %ld free %ld\n",
+ (long) shdr_ptr->hdr.bytes_used,
+ (long) shdr_ptr->hdr.bytes_left);
+ }
}
#endif /* MEM_STATS */
@@ -219,9 +219,9 @@ out_of_memory (j_common_ptr cinfo, int which)
/* If we compiled MEM_STATS support, report alloc requests before dying */
{
#ifdef MEM_STATS
- cinfo->err->trace_level = 2; /* force self_destruct to report stats */
+ cinfo->err->trace_level = 2; /* force self_destruct to report stats */
#endif
- ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, which);
+ ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, which);
}
@@ -240,87 +240,87 @@ out_of_memory (j_common_ptr cinfo, int which)
static const size_t first_pool_slop[JPOOL_NUMPOOLS] =
{
- 1600, /* first PERMANENT pool */
- 16000 /* first IMAGE pool */
+ 1600, /* first PERMANENT pool */
+ 16000 /* first IMAGE pool */
};
static const size_t extra_pool_slop[JPOOL_NUMPOOLS] =
{
- 0, /* additional PERMANENT pools */
- 5000 /* additional IMAGE pools */
+ 0, /* additional PERMANENT pools */
+ 5000 /* additional IMAGE pools */
};
-#define MIN_SLOP 50 /* greater than 0 to avoid futile looping */
+#define MIN_SLOP 50 /* greater than 0 to avoid futile looping */
METHODDEF(void *)
alloc_small (j_common_ptr cinfo, int pool_id, size_t sizeofobject)
/* Allocate a "small" object */
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- small_pool_ptr hdr_ptr, prev_hdr_ptr;
- char * data_ptr;
- size_t odd_bytes, min_request, slop;
-
- /* Check for unsatisfiable request (do now to ensure no overflow below) */
- if (sizeofobject > (size_t) (MAX_ALLOC_CHUNK-SIZEOF(small_pool_hdr)))
- out_of_memory(cinfo, 1); /* request exceeds malloc's ability */
-
- /* Round up the requested size to a multiple of SIZEOF(ALIGN_TYPE) */
- odd_bytes = sizeofobject % SIZEOF(ALIGN_TYPE);
- if (odd_bytes > 0)
- sizeofobject += SIZEOF(ALIGN_TYPE) - odd_bytes;
-
- /* See if space is available in any existing pool */
- if (pool_id < 0 || pool_id >= JPOOL_NUMPOOLS)
- ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
- prev_hdr_ptr = NULL;
- hdr_ptr = mem->small_list[pool_id];
- while (hdr_ptr != NULL) {
- if (hdr_ptr->hdr.bytes_left >= sizeofobject)
- break; /* found pool with enough space */
- prev_hdr_ptr = hdr_ptr;
- hdr_ptr = hdr_ptr->hdr.next;
- }
-
- /* Time to make a new pool? */
- if (hdr_ptr == NULL) {
- /* min_request is what we need now, slop is what will be leftover */
- min_request = sizeofobject + SIZEOF(small_pool_hdr);
- if (prev_hdr_ptr == NULL) /* first pool in class? */
- slop = first_pool_slop[pool_id];
- else
- slop = extra_pool_slop[pool_id];
- /* Don't ask for more than MAX_ALLOC_CHUNK */
- if (slop > (size_t) (MAX_ALLOC_CHUNK-min_request))
- slop = (size_t) (MAX_ALLOC_CHUNK-min_request);
- /* Try to get space, if fail reduce slop and try again */
- for (;;) {
- hdr_ptr = (small_pool_ptr) jpeg_get_small(cinfo, min_request + slop);
- if (hdr_ptr != NULL)
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ small_pool_ptr hdr_ptr, prev_hdr_ptr;
+ char * data_ptr;
+ size_t odd_bytes, min_request, slop;
+
+ /* Check for unsatisfiable request (do now to ensure no overflow below) */
+ if (sizeofobject > (size_t) (MAX_ALLOC_CHUNK-SIZEOF(small_pool_hdr)))
+ out_of_memory(cinfo, 1); /* request exceeds malloc's ability */
+
+ /* Round up the requested size to a multiple of SIZEOF(ALIGN_TYPE) */
+ odd_bytes = sizeofobject % SIZEOF(ALIGN_TYPE);
+ if (odd_bytes > 0)
+ sizeofobject += SIZEOF(ALIGN_TYPE) - odd_bytes;
+
+ /* See if space is available in any existing pool */
+ if (pool_id < 0 || pool_id >= JPOOL_NUMPOOLS)
+ ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
+ prev_hdr_ptr = NULL;
+ hdr_ptr = mem->small_list[pool_id];
+ while (hdr_ptr != NULL) {
+ if (hdr_ptr->hdr.bytes_left >= sizeofobject)
+ break; /* found pool with enough space */
+ prev_hdr_ptr = hdr_ptr;
+ hdr_ptr = hdr_ptr->hdr.next;
+ }
+
+ /* Time to make a new pool? */
+ if (hdr_ptr == NULL) {
+ /* min_request is what we need now, slop is what will be leftover */
+ min_request = sizeofobject + SIZEOF(small_pool_hdr);
+ if (prev_hdr_ptr == NULL) /* first pool in class? */
+ slop = first_pool_slop[pool_id];
+ else
+ slop = extra_pool_slop[pool_id];
+ /* Don't ask for more than MAX_ALLOC_CHUNK */
+ if (slop > (size_t) (MAX_ALLOC_CHUNK-min_request))
+ slop = (size_t) (MAX_ALLOC_CHUNK-min_request);
+ /* Try to get space, if fail reduce slop and try again */
+ for (;;) {
+ hdr_ptr = (small_pool_ptr) jpeg_get_small(cinfo, min_request + slop);
+ if (hdr_ptr != NULL)
break;
- slop /= 2;
- if (slop < MIN_SLOP) /* give up when it gets real small */
+ slop /= 2;
+ if (slop < MIN_SLOP) /* give up when it gets real small */
out_of_memory(cinfo, 2); /* jpeg_get_small failed */
- }
- mem->total_space_allocated += min_request + slop;
- /* Success, initialize the new pool header and add to end of list */
- hdr_ptr->hdr.next = NULL;
- hdr_ptr->hdr.bytes_used = 0;
- hdr_ptr->hdr.bytes_left = sizeofobject + slop;
- if (prev_hdr_ptr == NULL) /* first pool in class? */
- mem->small_list[pool_id] = hdr_ptr;
- else
- prev_hdr_ptr->hdr.next = hdr_ptr;
- }
-
- /* OK, allocate the object from the current pool */
- data_ptr = (char *) (hdr_ptr + 1); /* point to first data byte in pool */
- data_ptr += hdr_ptr->hdr.bytes_used; /* point to place for object */
- hdr_ptr->hdr.bytes_used += sizeofobject;
- hdr_ptr->hdr.bytes_left -= sizeofobject;
-
- return (void *) data_ptr;
+ }
+ mem->total_space_allocated += min_request + slop;
+ /* Success, initialize the new pool header and add to end of list */
+ hdr_ptr->hdr.next = NULL;
+ hdr_ptr->hdr.bytes_used = 0;
+ hdr_ptr->hdr.bytes_left = sizeofobject + slop;
+ if (prev_hdr_ptr == NULL) /* first pool in class? */
+ mem->small_list[pool_id] = hdr_ptr;
+ else
+ prev_hdr_ptr->hdr.next = hdr_ptr;
+ }
+
+ /* OK, allocate the object from the current pool */
+ data_ptr = (char *) (hdr_ptr + 1); /* point to first data byte in pool */
+ data_ptr += hdr_ptr->hdr.bytes_used; /* point to place for object */
+ hdr_ptr->hdr.bytes_used += sizeofobject;
+ hdr_ptr->hdr.bytes_left -= sizeofobject;
+
+ return (void *) data_ptr;
}
@@ -342,39 +342,39 @@ METHODDEF(void FAR *)
alloc_large (j_common_ptr cinfo, int pool_id, size_t sizeofobject)
/* Allocate a "large" object */
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- large_pool_ptr hdr_ptr;
- size_t odd_bytes;
-
- /* Check for unsatisfiable request (do now to ensure no overflow below) */
- if (sizeofobject > (size_t) (MAX_ALLOC_CHUNK-SIZEOF(large_pool_hdr)))
- out_of_memory(cinfo, 3); /* request exceeds malloc's ability */
-
- /* Round up the requested size to a multiple of SIZEOF(ALIGN_TYPE) */
- odd_bytes = sizeofobject % SIZEOF(ALIGN_TYPE);
- if (odd_bytes > 0)
- sizeofobject += SIZEOF(ALIGN_TYPE) - odd_bytes;
-
- /* Always make a new pool */
- if (pool_id < 0 || pool_id >= JPOOL_NUMPOOLS)
- ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
-
- hdr_ptr = (large_pool_ptr) jpeg_get_large(cinfo, sizeofobject +
- SIZEOF(large_pool_hdr));
- if (hdr_ptr == NULL)
- out_of_memory(cinfo, 4); /* jpeg_get_large failed */
- mem->total_space_allocated += sizeofobject + SIZEOF(large_pool_hdr);
-
- /* Success, initialize the new pool header and add to list */
- hdr_ptr->hdr.next = mem->large_list[pool_id];
- /* We maintain space counts in each pool header for statistical purposes,
- * even though they are not needed for allocation.
- */
- hdr_ptr->hdr.bytes_used = sizeofobject;
- hdr_ptr->hdr.bytes_left = 0;
- mem->large_list[pool_id] = hdr_ptr;
-
- return (void FAR *) (hdr_ptr + 1); /* point to first data byte in pool */
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ large_pool_ptr hdr_ptr;
+ size_t odd_bytes;
+
+ /* Check for unsatisfiable request (do now to ensure no overflow below) */
+ if (sizeofobject > (size_t) (MAX_ALLOC_CHUNK-SIZEOF(large_pool_hdr)))
+ out_of_memory(cinfo, 3); /* request exceeds malloc's ability */
+
+ /* Round up the requested size to a multiple of SIZEOF(ALIGN_TYPE) */
+ odd_bytes = sizeofobject % SIZEOF(ALIGN_TYPE);
+ if (odd_bytes > 0)
+ sizeofobject += SIZEOF(ALIGN_TYPE) - odd_bytes;
+
+ /* Always make a new pool */
+ if (pool_id < 0 || pool_id >= JPOOL_NUMPOOLS)
+ ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
+
+ hdr_ptr = (large_pool_ptr) jpeg_get_large(cinfo, sizeofobject +
+ SIZEOF(large_pool_hdr));
+ if (hdr_ptr == NULL)
+ out_of_memory(cinfo, 4); /* jpeg_get_large failed */
+ mem->total_space_allocated += sizeofobject + SIZEOF(large_pool_hdr);
+
+ /* Success, initialize the new pool header and add to list */
+ hdr_ptr->hdr.next = mem->large_list[pool_id];
+ /* We maintain space counts in each pool header for statistical purposes,
+ * even though they are not needed for allocation.
+ */
+ hdr_ptr->hdr.bytes_used = sizeofobject;
+ hdr_ptr->hdr.bytes_left = 0;
+ mem->large_list[pool_id] = hdr_ptr;
+
+ return (void FAR *) (hdr_ptr + 1); /* point to first data byte in pool */
}
@@ -393,44 +393,44 @@ alloc_large (j_common_ptr cinfo, int pool_id, size_t sizeofobject)
METHODDEF(JSAMPARRAY)
alloc_sarray (j_common_ptr cinfo, int pool_id,
- JDIMENSION samplesperrow, JDIMENSION numrows)
+ JDIMENSION samplesperrow, JDIMENSION numrows)
/* Allocate a 2-D sample array */
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- JSAMPARRAY result;
- JSAMPROW workspace;
- JDIMENSION rowsperchunk, currow, i;
- long ltemp;
-
- /* Calculate max # of rows allowed in one allocation chunk */
- ltemp = (MAX_ALLOC_CHUNK-SIZEOF(large_pool_hdr)) /
- ((long) samplesperrow * SIZEOF(JSAMPLE));
- if (ltemp <= 0)
- ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
- if (ltemp < (long) numrows)
- rowsperchunk = (JDIMENSION) ltemp;
- else
- rowsperchunk = numrows;
- mem->last_rowsperchunk = rowsperchunk;
-
- /* Get space for row pointers (small object) */
- result = (JSAMPARRAY) alloc_small(cinfo, pool_id,
- (size_t) (numrows * SIZEOF(JSAMPROW)));
-
- /* Get the rows themselves (large objects) */
- currow = 0;
- while (currow < numrows) {
- rowsperchunk = MIN(rowsperchunk, numrows - currow);
- workspace = (JSAMPROW) alloc_large(cinfo, pool_id,
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ JSAMPARRAY result;
+ JSAMPROW workspace;
+ JDIMENSION rowsperchunk, currow, i;
+ long ltemp;
+
+ /* Calculate max # of rows allowed in one allocation chunk */
+ ltemp = (MAX_ALLOC_CHUNK-SIZEOF(large_pool_hdr)) /
+ ((long) samplesperrow * SIZEOF(JSAMPLE));
+ if (ltemp <= 0)
+ ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
+ if (ltemp < (long) numrows)
+ rowsperchunk = (JDIMENSION) ltemp;
+ else
+ rowsperchunk = numrows;
+ mem->last_rowsperchunk = rowsperchunk;
+
+ /* Get space for row pointers (small object) */
+ result = (JSAMPARRAY) alloc_small(cinfo, pool_id,
+ (size_t) (numrows * SIZEOF(JSAMPROW)));
+
+ /* Get the rows themselves (large objects) */
+ currow = 0;
+ while (currow < numrows) {
+ rowsperchunk = MIN(rowsperchunk, numrows - currow);
+ workspace = (JSAMPROW) alloc_large(cinfo, pool_id,
(size_t) ((size_t) rowsperchunk * (size_t) samplesperrow
- * SIZEOF(JSAMPLE)));
- for (i = rowsperchunk; i > 0; i--) {
- result[currow++] = workspace;
- workspace += samplesperrow;
- }
- }
-
- return result;
+ * SIZEOF(JSAMPLE)));
+ for (i = rowsperchunk; i > 0; i--) {
+ result[currow++] = workspace;
+ workspace += samplesperrow;
+ }
+ }
+
+ return result;
}
@@ -441,44 +441,44 @@ alloc_sarray (j_common_ptr cinfo, int pool_id,
METHODDEF(JBLOCKARRAY)
alloc_barray (j_common_ptr cinfo, int pool_id,
- JDIMENSION blocksperrow, JDIMENSION numrows)
+ JDIMENSION blocksperrow, JDIMENSION numrows)
/* Allocate a 2-D coefficient-block array */
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- JBLOCKARRAY result;
- JBLOCKROW workspace;
- JDIMENSION rowsperchunk, currow, i;
- long ltemp;
-
- /* Calculate max # of rows allowed in one allocation chunk */
- ltemp = (MAX_ALLOC_CHUNK-SIZEOF(large_pool_hdr)) /
- ((long) blocksperrow * SIZEOF(JBLOCK));
- if (ltemp <= 0)
- ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
- if (ltemp < (long) numrows)
- rowsperchunk = (JDIMENSION) ltemp;
- else
- rowsperchunk = numrows;
- mem->last_rowsperchunk = rowsperchunk;
-
- /* Get space for row pointers (small object) */
- result = (JBLOCKARRAY) alloc_small(cinfo, pool_id,
- (size_t) (numrows * SIZEOF(JBLOCKROW)));
-
- /* Get the rows themselves (large objects) */
- currow = 0;
- while (currow < numrows) {
- rowsperchunk = MIN(rowsperchunk, numrows - currow);
- workspace = (JBLOCKROW) alloc_large(cinfo, pool_id,
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ JBLOCKARRAY result;
+ JBLOCKROW workspace;
+ JDIMENSION rowsperchunk, currow, i;
+ long ltemp;
+
+ /* Calculate max # of rows allowed in one allocation chunk */
+ ltemp = (MAX_ALLOC_CHUNK-SIZEOF(large_pool_hdr)) /
+ ((long) blocksperrow * SIZEOF(JBLOCK));
+ if (ltemp <= 0)
+ ERREXIT(cinfo, JERR_WIDTH_OVERFLOW);
+ if (ltemp < (long) numrows)
+ rowsperchunk = (JDIMENSION) ltemp;
+ else
+ rowsperchunk = numrows;
+ mem->last_rowsperchunk = rowsperchunk;
+
+ /* Get space for row pointers (small object) */
+ result = (JBLOCKARRAY) alloc_small(cinfo, pool_id,
+ (size_t) (numrows * SIZEOF(JBLOCKROW)));
+
+ /* Get the rows themselves (large objects) */
+ currow = 0;
+ while (currow < numrows) {
+ rowsperchunk = MIN(rowsperchunk, numrows - currow);
+ workspace = (JBLOCKROW) alloc_large(cinfo, pool_id,
(size_t) ((size_t) rowsperchunk * (size_t) blocksperrow
- * SIZEOF(JBLOCK)));
- for (i = rowsperchunk; i > 0; i--) {
- result[currow++] = workspace;
- workspace += blocksperrow;
- }
- }
-
- return result;
+ * SIZEOF(JBLOCK)));
+ for (i = rowsperchunk; i > 0; i--) {
+ result[currow++] = workspace;
+ workspace += blocksperrow;
+ }
+ }
+
+ return result;
}
@@ -521,61 +521,61 @@ alloc_barray (j_common_ptr cinfo, int pool_id,
METHODDEF(jvirt_sarray_ptr)
request_virt_sarray (j_common_ptr cinfo, int pool_id, boolean pre_zero,
- JDIMENSION samplesperrow, JDIMENSION numrows,
- JDIMENSION maxaccess)
+ JDIMENSION samplesperrow, JDIMENSION numrows,
+ JDIMENSION maxaccess)
/* Request a virtual 2-D sample array */
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- jvirt_sarray_ptr result;
-
- /* Only IMAGE-lifetime virtual arrays are currently supported */
- if (pool_id != JPOOL_IMAGE)
- ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
-
- /* get control block */
- result = (jvirt_sarray_ptr) alloc_small(cinfo, pool_id,
- SIZEOF(struct jvirt_sarray_control));
-
- result->mem_buffer = NULL; /* marks array not yet realized */
- result->rows_in_array = numrows;
- result->samplesperrow = samplesperrow;
- result->maxaccess = maxaccess;
- result->pre_zero = pre_zero;
- result->b_s_open = FALSE; /* no associated backing-store object */
- result->next = mem->virt_sarray_list; /* add to list of virtual arrays */
- mem->virt_sarray_list = result;
-
- return result;
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ jvirt_sarray_ptr result;
+
+ /* Only IMAGE-lifetime virtual arrays are currently supported */
+ if (pool_id != JPOOL_IMAGE)
+ ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
+
+ /* get control block */
+ result = (jvirt_sarray_ptr) alloc_small(cinfo, pool_id,
+ SIZEOF(struct jvirt_sarray_control));
+
+ result->mem_buffer = NULL; /* marks array not yet realized */
+ result->rows_in_array = numrows;
+ result->samplesperrow = samplesperrow;
+ result->maxaccess = maxaccess;
+ result->pre_zero = pre_zero;
+ result->b_s_open = FALSE; /* no associated backing-store object */
+ result->next = mem->virt_sarray_list; /* add to list of virtual arrays */
+ mem->virt_sarray_list = result;
+
+ return result;
}
METHODDEF(jvirt_barray_ptr)
request_virt_barray (j_common_ptr cinfo, int pool_id, boolean pre_zero,
- JDIMENSION blocksperrow, JDIMENSION numrows,
- JDIMENSION maxaccess)
+ JDIMENSION blocksperrow, JDIMENSION numrows,
+ JDIMENSION maxaccess)
/* Request a virtual 2-D coefficient-block array */
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- jvirt_barray_ptr result;
-
- /* Only IMAGE-lifetime virtual arrays are currently supported */
- if (pool_id != JPOOL_IMAGE)
- ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
-
- /* get control block */
- result = (jvirt_barray_ptr) alloc_small(cinfo, pool_id,
- SIZEOF(struct jvirt_barray_control));
-
- result->mem_buffer = NULL; /* marks array not yet realized */
- result->rows_in_array = numrows;
- result->blocksperrow = blocksperrow;
- result->maxaccess = maxaccess;
- result->pre_zero = pre_zero;
- result->b_s_open = FALSE; /* no associated backing-store object */
- result->next = mem->virt_barray_list; /* add to list of virtual arrays */
- mem->virt_barray_list = result;
-
- return result;
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ jvirt_barray_ptr result;
+
+ /* Only IMAGE-lifetime virtual arrays are currently supported */
+ if (pool_id != JPOOL_IMAGE)
+ ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
+
+ /* get control block */
+ result = (jvirt_barray_ptr) alloc_small(cinfo, pool_id,
+ SIZEOF(struct jvirt_barray_control));
+
+ result->mem_buffer = NULL; /* marks array not yet realized */
+ result->rows_in_array = numrows;
+ result->blocksperrow = blocksperrow;
+ result->maxaccess = maxaccess;
+ result->pre_zero = pre_zero;
+ result->b_s_open = FALSE; /* no associated backing-store object */
+ result->next = mem->virt_barray_list; /* add to list of virtual arrays */
+ mem->virt_barray_list = result;
+
+ return result;
}
@@ -583,66 +583,66 @@ METHODDEF(void)
realize_virt_arrays (j_common_ptr cinfo)
/* Allocate the in-memory buffers for any unrealized virtual arrays */
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- long space_per_minheight, maximum_space, avail_mem;
- long minheights, max_minheights;
- jvirt_sarray_ptr sptr;
- jvirt_barray_ptr bptr;
-
- /* Compute the minimum space needed (maxaccess rows in each buffer)
- * and the maximum space needed (full image height in each buffer).
- * These may be of use to the system-dependent jpeg_mem_available routine.
- */
- space_per_minheight = 0;
- maximum_space = 0;
- for (sptr = mem->virt_sarray_list; sptr != NULL; sptr = sptr->next) {
- if (sptr->mem_buffer == NULL) { /* if not realized yet */
- space_per_minheight += (long) sptr->maxaccess *
- (long) sptr->samplesperrow * SIZEOF(JSAMPLE);
- maximum_space += (long) sptr->rows_in_array *
- (long) sptr->samplesperrow * SIZEOF(JSAMPLE);
- }
- }
- for (bptr = mem->virt_barray_list; bptr != NULL; bptr = bptr->next) {
- if (bptr->mem_buffer == NULL) { /* if not realized yet */
- space_per_minheight += (long) bptr->maxaccess *
- (long) bptr->blocksperrow * SIZEOF(JBLOCK);
- maximum_space += (long) bptr->rows_in_array *
- (long) bptr->blocksperrow * SIZEOF(JBLOCK);
- }
- }
-
- if (space_per_minheight <= 0)
- return; /* no unrealized arrays, no work */
-
- /* Determine amount of memory to actually use; this is system-dependent. */
- avail_mem = jpeg_mem_available(cinfo, space_per_minheight, maximum_space,
- mem->total_space_allocated);
-
- /* If the maximum space needed is available, make all the buffers full
- * height; otherwise parcel it out with the same number of minheights
- * in each buffer.
- */
- if (avail_mem >= maximum_space)
- max_minheights = 1000000000L;
- else {
- max_minheights = avail_mem / space_per_minheight;
- /* If there doesn't seem to be enough space, try to get the minimum
- * anyway. This allows a "stub" implementation of jpeg_mem_available().
- */
- if (max_minheights <= 0)
- max_minheights = 1;
- }
-
- /* Allocate the in-memory buffers and initialize backing store as needed. */
-
- for (sptr = mem->virt_sarray_list; sptr != NULL; sptr = sptr->next) {
- if (sptr->mem_buffer == NULL) { /* if not realized yet */
- minheights = ((long) sptr->rows_in_array - 1L) / sptr->maxaccess + 1L;
- if (minheights <= max_minheights) {
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ long space_per_minheight, maximum_space, avail_mem;
+ long minheights, max_minheights;
+ jvirt_sarray_ptr sptr;
+ jvirt_barray_ptr bptr;
+
+ /* Compute the minimum space needed (maxaccess rows in each buffer)
+ * and the maximum space needed (full image height in each buffer).
+ * These may be of use to the system-dependent jpeg_mem_available routine.
+ */
+ space_per_minheight = 0;
+ maximum_space = 0;
+ for (sptr = mem->virt_sarray_list; sptr != NULL; sptr = sptr->next) {
+ if (sptr->mem_buffer == NULL) { /* if not realized yet */
+ space_per_minheight += (long) sptr->maxaccess *
+ (long) sptr->samplesperrow * SIZEOF(JSAMPLE);
+ maximum_space += (long) sptr->rows_in_array *
+ (long) sptr->samplesperrow * SIZEOF(JSAMPLE);
+ }
+ }
+ for (bptr = mem->virt_barray_list; bptr != NULL; bptr = bptr->next) {
+ if (bptr->mem_buffer == NULL) { /* if not realized yet */
+ space_per_minheight += (long) bptr->maxaccess *
+ (long) bptr->blocksperrow * SIZEOF(JBLOCK);
+ maximum_space += (long) bptr->rows_in_array *
+ (long) bptr->blocksperrow * SIZEOF(JBLOCK);
+ }
+ }
+
+ if (space_per_minheight <= 0)
+ return; /* no unrealized arrays, no work */
+
+ /* Determine amount of memory to actually use; this is system-dependent. */
+ avail_mem = jpeg_mem_available(cinfo, space_per_minheight, maximum_space,
+ mem->total_space_allocated);
+
+ /* If the maximum space needed is available, make all the buffers full
+ * height; otherwise parcel it out with the same number of minheights
+ * in each buffer.
+ */
+ if (avail_mem >= maximum_space)
+ max_minheights = 1000000000L;
+ else {
+ max_minheights = avail_mem / space_per_minheight;
+ /* If there doesn't seem to be enough space, try to get the minimum
+ * anyway. This allows a "stub" implementation of jpeg_mem_available().
+ */
+ if (max_minheights <= 0)
+ max_minheights = 1;
+ }
+
+ /* Allocate the in-memory buffers and initialize backing store as needed. */
+
+ for (sptr = mem->virt_sarray_list; sptr != NULL; sptr = sptr->next) {
+ if (sptr->mem_buffer == NULL) { /* if not realized yet */
+ minheights = ((long) sptr->rows_in_array - 1L) / sptr->maxaccess + 1L;
+ if (minheights <= max_minheights) {
/* This buffer fits in memory */
sptr->rows_in_mem = sptr->rows_in_array;
- } else {
+ } else {
/* It doesn't fit in memory, create backing store. */
sptr->rows_in_mem = (JDIMENSION) (max_minheights * sptr->maxaccess);
jpeg_open_backing_store(cinfo, & sptr->b_s_info,
@@ -650,23 +650,23 @@ realize_virt_arrays (j_common_ptr cinfo)
(long) sptr->samplesperrow *
(long) SIZEOF(JSAMPLE));
sptr->b_s_open = TRUE;
- }
- sptr->mem_buffer = alloc_sarray(cinfo, JPOOL_IMAGE,
- sptr->samplesperrow, sptr->rows_in_mem);
- sptr->rowsperchunk = mem->last_rowsperchunk;
- sptr->cur_start_row = 0;
- sptr->first_undef_row = 0;
- sptr->dirty = FALSE;
- }
- }
-
- for (bptr = mem->virt_barray_list; bptr != NULL; bptr = bptr->next) {
- if (bptr->mem_buffer == NULL) { /* if not realized yet */
- minheights = ((long) bptr->rows_in_array - 1L) / bptr->maxaccess + 1L;
- if (minheights <= max_minheights) {
+ }
+ sptr->mem_buffer = alloc_sarray(cinfo, JPOOL_IMAGE,
+ sptr->samplesperrow, sptr->rows_in_mem);
+ sptr->rowsperchunk = mem->last_rowsperchunk;
+ sptr->cur_start_row = 0;
+ sptr->first_undef_row = 0;
+ sptr->dirty = FALSE;
+ }
+ }
+
+ for (bptr = mem->virt_barray_list; bptr != NULL; bptr = bptr->next) {
+ if (bptr->mem_buffer == NULL) { /* if not realized yet */
+ minheights = ((long) bptr->rows_in_array - 1L) / bptr->maxaccess + 1L;
+ if (minheights <= max_minheights) {
/* This buffer fits in memory */
bptr->rows_in_mem = bptr->rows_in_array;
- } else {
+ } else {
/* It doesn't fit in memory, create backing store. */
bptr->rows_in_mem = (JDIMENSION) (max_minheights * bptr->maxaccess);
jpeg_open_backing_store(cinfo, & bptr->b_s_info,
@@ -674,15 +674,15 @@ realize_virt_arrays (j_common_ptr cinfo)
(long) bptr->blocksperrow *
(long) SIZEOF(JBLOCK));
bptr->b_s_open = TRUE;
- }
- bptr->mem_buffer = alloc_barray(cinfo, JPOOL_IMAGE,
- bptr->blocksperrow, bptr->rows_in_mem);
- bptr->rowsperchunk = mem->last_rowsperchunk;
- bptr->cur_start_row = 0;
- bptr->first_undef_row = 0;
- bptr->dirty = FALSE;
- }
- }
+ }
+ bptr->mem_buffer = alloc_barray(cinfo, JPOOL_IMAGE,
+ bptr->blocksperrow, bptr->rows_in_mem);
+ bptr->rowsperchunk = mem->last_rowsperchunk;
+ bptr->cur_start_row = 0;
+ bptr->first_undef_row = 0;
+ bptr->dirty = FALSE;
+ }
+ }
}
@@ -690,32 +690,32 @@ LOCAL(void)
do_sarray_io (j_common_ptr cinfo, jvirt_sarray_ptr ptr, boolean writing)
/* Do backing store read or write of a virtual sample array */
{
- long bytesperrow, file_offset, byte_count, rows, thisrow, i;
-
- bytesperrow = (long) ptr->samplesperrow * SIZEOF(JSAMPLE);
- file_offset = ptr->cur_start_row * bytesperrow;
- /* Loop to read or write each allocation chunk in mem_buffer */
- for (i = 0; i < (long) ptr->rows_in_mem; i += ptr->rowsperchunk) {
- /* One chunk, but check for short chunk at end of buffer */
- rows = MIN((long) ptr->rowsperchunk, (long) ptr->rows_in_mem - i);
- /* Transfer no more than is currently defined */
- thisrow = (long) ptr->cur_start_row + i;
- rows = MIN(rows, (long) ptr->first_undef_row - thisrow);
- /* Transfer no more than fits in file */
- rows = MIN(rows, (long) ptr->rows_in_array - thisrow);
- if (rows <= 0) /* this chunk might be past end of file! */
- break;
- byte_count = rows * bytesperrow;
- if (writing)
- (*ptr->b_s_info.write_backing_store) (cinfo, & ptr->b_s_info,
- (void FAR *) ptr->mem_buffer[i],
- file_offset, byte_count);
- else
- (*ptr->b_s_info.read_backing_store) (cinfo, & ptr->b_s_info,
- (void FAR *) ptr->mem_buffer[i],
- file_offset, byte_count);
- file_offset += byte_count;
- }
+ long bytesperrow, file_offset, byte_count, rows, thisrow, i;
+
+ bytesperrow = (long) ptr->samplesperrow * SIZEOF(JSAMPLE);
+ file_offset = ptr->cur_start_row * bytesperrow;
+ /* Loop to read or write each allocation chunk in mem_buffer */
+ for (i = 0; i < (long) ptr->rows_in_mem; i += ptr->rowsperchunk) {
+ /* One chunk, but check for short chunk at end of buffer */
+ rows = MIN((long) ptr->rowsperchunk, (long) ptr->rows_in_mem - i);
+ /* Transfer no more than is currently defined */
+ thisrow = (long) ptr->cur_start_row + i;
+ rows = MIN(rows, (long) ptr->first_undef_row - thisrow);
+ /* Transfer no more than fits in file */
+ rows = MIN(rows, (long) ptr->rows_in_array - thisrow);
+ if (rows <= 0) /* this chunk might be past end of file! */
+ break;
+ byte_count = rows * bytesperrow;
+ if (writing)
+ (*ptr->b_s_info.write_backing_store) (cinfo, & ptr->b_s_info,
+ (void FAR *) ptr->mem_buffer[i],
+ file_offset, byte_count);
+ else
+ (*ptr->b_s_info.read_backing_store) (cinfo, & ptr->b_s_info,
+ (void FAR *) ptr->mem_buffer[i],
+ file_offset, byte_count);
+ file_offset += byte_count;
+ }
}
@@ -723,202 +723,202 @@ LOCAL(void)
do_barray_io (j_common_ptr cinfo, jvirt_barray_ptr ptr, boolean writing)
/* Do backing store read or write of a virtual coefficient-block array */
{
- long bytesperrow, file_offset, byte_count, rows, thisrow, i;
-
- bytesperrow = (long) ptr->blocksperrow * SIZEOF(JBLOCK);
- file_offset = ptr->cur_start_row * bytesperrow;
- /* Loop to read or write each allocation chunk in mem_buffer */
- for (i = 0; i < (long) ptr->rows_in_mem; i += ptr->rowsperchunk) {
- /* One chunk, but check for short chunk at end of buffer */
- rows = MIN((long) ptr->rowsperchunk, (long) ptr->rows_in_mem - i);
- /* Transfer no more than is currently defined */
- thisrow = (long) ptr->cur_start_row + i;
- rows = MIN(rows, (long) ptr->first_undef_row - thisrow);
- /* Transfer no more than fits in file */
- rows = MIN(rows, (long) ptr->rows_in_array - thisrow);
- if (rows <= 0) /* this chunk might be past end of file! */
- break;
- byte_count = rows * bytesperrow;
- if (writing)
- (*ptr->b_s_info.write_backing_store) (cinfo, & ptr->b_s_info,
- (void FAR *) ptr->mem_buffer[i],
- file_offset, byte_count);
- else
- (*ptr->b_s_info.read_backing_store) (cinfo, & ptr->b_s_info,
- (void FAR *) ptr->mem_buffer[i],
- file_offset, byte_count);
- file_offset += byte_count;
- }
+ long bytesperrow, file_offset, byte_count, rows, thisrow, i;
+
+ bytesperrow = (long) ptr->blocksperrow * SIZEOF(JBLOCK);
+ file_offset = ptr->cur_start_row * bytesperrow;
+ /* Loop to read or write each allocation chunk in mem_buffer */
+ for (i = 0; i < (long) ptr->rows_in_mem; i += ptr->rowsperchunk) {
+ /* One chunk, but check for short chunk at end of buffer */
+ rows = MIN((long) ptr->rowsperchunk, (long) ptr->rows_in_mem - i);
+ /* Transfer no more than is currently defined */
+ thisrow = (long) ptr->cur_start_row + i;
+ rows = MIN(rows, (long) ptr->first_undef_row - thisrow);
+ /* Transfer no more than fits in file */
+ rows = MIN(rows, (long) ptr->rows_in_array - thisrow);
+ if (rows <= 0) /* this chunk might be past end of file! */
+ break;
+ byte_count = rows * bytesperrow;
+ if (writing)
+ (*ptr->b_s_info.write_backing_store) (cinfo, & ptr->b_s_info,
+ (void FAR *) ptr->mem_buffer[i],
+ file_offset, byte_count);
+ else
+ (*ptr->b_s_info.read_backing_store) (cinfo, & ptr->b_s_info,
+ (void FAR *) ptr->mem_buffer[i],
+ file_offset, byte_count);
+ file_offset += byte_count;
+ }
}
METHODDEF(JSAMPARRAY)
access_virt_sarray (j_common_ptr cinfo, jvirt_sarray_ptr ptr,
- JDIMENSION start_row, JDIMENSION num_rows,
- boolean writable)
+ JDIMENSION start_row, JDIMENSION num_rows,
+ boolean writable)
/* Access the part of a virtual sample array starting at start_row */
/* and extending for num_rows rows. writable is true if */
/* caller intends to modify the accessed area. */
{
- JDIMENSION end_row = start_row + num_rows;
- JDIMENSION undef_row;
-
- /* debugging check */
- if (end_row > ptr->rows_in_array || num_rows > ptr->maxaccess ||
- ptr->mem_buffer == NULL)
- ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
-
- /* Make the desired part of the virtual array accessible */
- if (start_row < ptr->cur_start_row ||
- end_row > ptr->cur_start_row+ptr->rows_in_mem) {
- if (! ptr->b_s_open)
- ERREXIT(cinfo, JERR_VIRTUAL_BUG);
- /* Flush old buffer contents if necessary */
- if (ptr->dirty) {
- do_sarray_io(cinfo, ptr, TRUE);
- ptr->dirty = FALSE;
- }
- /* Decide what part of virtual array to access.
- * Algorithm: if target address > current window, assume forward scan,
- * load starting at target address. If target address < current window,
- * assume backward scan, load so that target area is top of window.
- * Note that when switching from forward write to forward read, will have
- * start_row = 0, so the limiting case applies and we load from 0 anyway.
- */
- if (start_row > ptr->cur_start_row) {
- ptr->cur_start_row = start_row;
- } else {
- /* use long arithmetic here to avoid overflow & unsigned problems */
- long ltemp;
-
- ltemp = (long) end_row - (long) ptr->rows_in_mem;
- if (ltemp < 0)
- ltemp = 0; /* don't fall off front end of file */
- ptr->cur_start_row = (JDIMENSION) ltemp;
- }
- /* Read in the selected part of the array.
- * During the initial write pass, we will do no actual read
- * because the selected part is all undefined.
- */
- do_sarray_io(cinfo, ptr, FALSE);
- }
- /* Ensure the accessed part of the array is defined; prezero if needed.
- * To improve locality of access, we only prezero the part of the array
- * that the caller is about to access, not the entire in-memory array.
- */
- if (ptr->first_undef_row < end_row) {
- if (ptr->first_undef_row < start_row) {
- if (writable) /* writer skipped over a section of array */
+ JDIMENSION end_row = start_row + num_rows;
+ JDIMENSION undef_row;
+
+ /* debugging check */
+ if (end_row > ptr->rows_in_array || num_rows > ptr->maxaccess ||
+ ptr->mem_buffer == NULL)
+ ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
+
+ /* Make the desired part of the virtual array accessible */
+ if (start_row < ptr->cur_start_row ||
+ end_row > ptr->cur_start_row+ptr->rows_in_mem) {
+ if (! ptr->b_s_open)
+ ERREXIT(cinfo, JERR_VIRTUAL_BUG);
+ /* Flush old buffer contents if necessary */
+ if (ptr->dirty) {
+ do_sarray_io(cinfo, ptr, TRUE);
+ ptr->dirty = FALSE;
+ }
+ /* Decide what part of virtual array to access.
+ * Algorithm: if target address > current window, assume forward scan,
+ * load starting at target address. If target address < current window,
+ * assume backward scan, load so that target area is top of window.
+ * Note that when switching from forward write to forward read, will have
+ * start_row = 0, so the limiting case applies and we load from 0 anyway.
+ */
+ if (start_row > ptr->cur_start_row) {
+ ptr->cur_start_row = start_row;
+ } else {
+ /* use long arithmetic here to avoid overflow & unsigned problems */
+ long ltemp;
+
+ ltemp = (long) end_row - (long) ptr->rows_in_mem;
+ if (ltemp < 0)
+ ltemp = 0; /* don't fall off front end of file */
+ ptr->cur_start_row = (JDIMENSION) ltemp;
+ }
+ /* Read in the selected part of the array.
+ * During the initial write pass, we will do no actual read
+ * because the selected part is all undefined.
+ */
+ do_sarray_io(cinfo, ptr, FALSE);
+ }
+ /* Ensure the accessed part of the array is defined; prezero if needed.
+ * To improve locality of access, we only prezero the part of the array
+ * that the caller is about to access, not the entire in-memory array.
+ */
+ if (ptr->first_undef_row < end_row) {
+ if (ptr->first_undef_row < start_row) {
+ if (writable) /* writer skipped over a section of array */
ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
- undef_row = start_row; /* but reader is allowed to read ahead */
- } else {
- undef_row = ptr->first_undef_row;
- }
- if (writable)
- ptr->first_undef_row = end_row;
- if (ptr->pre_zero) {
- size_t bytesperrow = (size_t) ptr->samplesperrow * SIZEOF(JSAMPLE);
- undef_row -= ptr->cur_start_row; /* make indexes relative to buffer */
- end_row -= ptr->cur_start_row;
- while (undef_row < end_row) {
+ undef_row = start_row; /* but reader is allowed to read ahead */
+ } else {
+ undef_row = ptr->first_undef_row;
+ }
+ if (writable)
+ ptr->first_undef_row = end_row;
+ if (ptr->pre_zero) {
+ size_t bytesperrow = (size_t) ptr->samplesperrow * SIZEOF(JSAMPLE);
+ undef_row -= ptr->cur_start_row; /* make indexes relative to buffer */
+ end_row -= ptr->cur_start_row;
+ while (undef_row < end_row) {
jzero_far((void FAR *) ptr->mem_buffer[undef_row], bytesperrow);
undef_row++;
- }
- } else {
- if (! writable) /* reader looking at undefined data */
+ }
+ } else {
+ if (! writable) /* reader looking at undefined data */
ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
- }
- }
- /* Flag the buffer dirty if caller will write in it */
- if (writable)
- ptr->dirty = TRUE;
- /* Return address of proper part of the buffer */
- return ptr->mem_buffer + (start_row - ptr->cur_start_row);
+ }
+ }
+ /* Flag the buffer dirty if caller will write in it */
+ if (writable)
+ ptr->dirty = TRUE;
+ /* Return address of proper part of the buffer */
+ return ptr->mem_buffer + (start_row - ptr->cur_start_row);
}
METHODDEF(JBLOCKARRAY)
access_virt_barray (j_common_ptr cinfo, jvirt_barray_ptr ptr,
- JDIMENSION start_row, JDIMENSION num_rows,
- boolean writable)
+ JDIMENSION start_row, JDIMENSION num_rows,
+ boolean writable)
/* Access the part of a virtual block array starting at start_row */
/* and extending for num_rows rows. writable is true if */
/* caller intends to modify the accessed area. */
{
- JDIMENSION end_row = start_row + num_rows;
- JDIMENSION undef_row;
-
- /* debugging check */
- if (end_row > ptr->rows_in_array || num_rows > ptr->maxaccess ||
- ptr->mem_buffer == NULL)
- ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
-
- /* Make the desired part of the virtual array accessible */
- if (start_row < ptr->cur_start_row ||
- end_row > ptr->cur_start_row+ptr->rows_in_mem) {
- if (! ptr->b_s_open)
- ERREXIT(cinfo, JERR_VIRTUAL_BUG);
- /* Flush old buffer contents if necessary */
- if (ptr->dirty) {
- do_barray_io(cinfo, ptr, TRUE);
- ptr->dirty = FALSE;
- }
- /* Decide what part of virtual array to access.
- * Algorithm: if target address > current window, assume forward scan,
- * load starting at target address. If target address < current window,
- * assume backward scan, load so that target area is top of window.
- * Note that when switching from forward write to forward read, will have
- * start_row = 0, so the limiting case applies and we load from 0 anyway.
- */
- if (start_row > ptr->cur_start_row) {
- ptr->cur_start_row = start_row;
- } else {
- /* use long arithmetic here to avoid overflow & unsigned problems */
- long ltemp;
-
- ltemp = (long) end_row - (long) ptr->rows_in_mem;
- if (ltemp < 0)
- ltemp = 0; /* don't fall off front end of file */
- ptr->cur_start_row = (JDIMENSION) ltemp;
- }
- /* Read in the selected part of the array.
- * During the initial write pass, we will do no actual read
- * because the selected part is all undefined.
- */
- do_barray_io(cinfo, ptr, FALSE);
- }
- /* Ensure the accessed part of the array is defined; prezero if needed.
- * To improve locality of access, we only prezero the part of the array
- * that the caller is about to access, not the entire in-memory array.
- */
- if (ptr->first_undef_row < end_row) {
- if (ptr->first_undef_row < start_row) {
- if (writable) /* writer skipped over a section of array */
+ JDIMENSION end_row = start_row + num_rows;
+ JDIMENSION undef_row;
+
+ /* debugging check */
+ if (end_row > ptr->rows_in_array || num_rows > ptr->maxaccess ||
+ ptr->mem_buffer == NULL)
+ ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
+
+ /* Make the desired part of the virtual array accessible */
+ if (start_row < ptr->cur_start_row ||
+ end_row > ptr->cur_start_row+ptr->rows_in_mem) {
+ if (! ptr->b_s_open)
+ ERREXIT(cinfo, JERR_VIRTUAL_BUG);
+ /* Flush old buffer contents if necessary */
+ if (ptr->dirty) {
+ do_barray_io(cinfo, ptr, TRUE);
+ ptr->dirty = FALSE;
+ }
+ /* Decide what part of virtual array to access.
+ * Algorithm: if target address > current window, assume forward scan,
+ * load starting at target address. If target address < current window,
+ * assume backward scan, load so that target area is top of window.
+ * Note that when switching from forward write to forward read, will have
+ * start_row = 0, so the limiting case applies and we load from 0 anyway.
+ */
+ if (start_row > ptr->cur_start_row) {
+ ptr->cur_start_row = start_row;
+ } else {
+ /* use long arithmetic here to avoid overflow & unsigned problems */
+ long ltemp;
+
+ ltemp = (long) end_row - (long) ptr->rows_in_mem;
+ if (ltemp < 0)
+ ltemp = 0; /* don't fall off front end of file */
+ ptr->cur_start_row = (JDIMENSION) ltemp;
+ }
+ /* Read in the selected part of the array.
+ * During the initial write pass, we will do no actual read
+ * because the selected part is all undefined.
+ */
+ do_barray_io(cinfo, ptr, FALSE);
+ }
+ /* Ensure the accessed part of the array is defined; prezero if needed.
+ * To improve locality of access, we only prezero the part of the array
+ * that the caller is about to access, not the entire in-memory array.
+ */
+ if (ptr->first_undef_row < end_row) {
+ if (ptr->first_undef_row < start_row) {
+ if (writable) /* writer skipped over a section of array */
ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
- undef_row = start_row; /* but reader is allowed to read ahead */
- } else {
- undef_row = ptr->first_undef_row;
- }
- if (writable)
- ptr->first_undef_row = end_row;
- if (ptr->pre_zero) {
- size_t bytesperrow = (size_t) ptr->blocksperrow * SIZEOF(JBLOCK);
- undef_row -= ptr->cur_start_row; /* make indexes relative to buffer */
- end_row -= ptr->cur_start_row;
- while (undef_row < end_row) {
+ undef_row = start_row; /* but reader is allowed to read ahead */
+ } else {
+ undef_row = ptr->first_undef_row;
+ }
+ if (writable)
+ ptr->first_undef_row = end_row;
+ if (ptr->pre_zero) {
+ size_t bytesperrow = (size_t) ptr->blocksperrow * SIZEOF(JBLOCK);
+ undef_row -= ptr->cur_start_row; /* make indexes relative to buffer */
+ end_row -= ptr->cur_start_row;
+ while (undef_row < end_row) {
jzero_far((void FAR *) ptr->mem_buffer[undef_row], bytesperrow);
undef_row++;
- }
- } else {
- if (! writable) /* reader looking at undefined data */
+ }
+ } else {
+ if (! writable) /* reader looking at undefined data */
ERREXIT(cinfo, JERR_BAD_VIRTUAL_ACCESS);
- }
- }
- /* Flag the buffer dirty if caller will write in it */
- if (writable)
- ptr->dirty = TRUE;
- /* Return address of proper part of the buffer */
- return ptr->mem_buffer + (start_row - ptr->cur_start_row);
+ }
+ }
+ /* Flag the buffer dirty if caller will write in it */
+ if (writable)
+ ptr->dirty = TRUE;
+ /* Return address of proper part of the buffer */
+ return ptr->mem_buffer + (start_row - ptr->cur_start_row);
}
@@ -929,67 +929,67 @@ access_virt_barray (j_common_ptr cinfo, jvirt_barray_ptr ptr,
METHODDEF(void)
free_pool (j_common_ptr cinfo, int pool_id)
{
- my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
- small_pool_ptr shdr_ptr;
- large_pool_ptr lhdr_ptr;
- size_t space_freed;
+ my_mem_ptr mem = (my_mem_ptr) cinfo->mem;
+ small_pool_ptr shdr_ptr;
+ large_pool_ptr lhdr_ptr;
+ size_t space_freed;
- if (pool_id < 0 || pool_id >= JPOOL_NUMPOOLS)
- ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
+ if (pool_id < 0 || pool_id >= JPOOL_NUMPOOLS)
+ ERREXIT1(cinfo, JERR_BAD_POOL_ID, pool_id); /* safety check */
#ifdef MEM_STATS
- if (cinfo->err->trace_level > 1)
- print_mem_stats(cinfo, pool_id); /* print pool's memory usage statistics */
+ if (cinfo->err->trace_level > 1)
+ print_mem_stats(cinfo, pool_id); /* print pool's memory usage statistics */
#endif
- /* If freeing IMAGE pool, close any virtual arrays first */
- if (pool_id == JPOOL_IMAGE) {
- jvirt_sarray_ptr sptr;
- jvirt_barray_ptr bptr;
+ /* If freeing IMAGE pool, close any virtual arrays first */
+ if (pool_id == JPOOL_IMAGE) {
+ jvirt_sarray_ptr sptr;
+ jvirt_barray_ptr bptr;
- for (sptr = mem->virt_sarray_list; sptr != NULL; sptr = sptr->next) {
- if (sptr->b_s_open) { /* there may be no backing store */
- sptr->b_s_open = FALSE; /* prevent recursive close if error */
+ for (sptr = mem->virt_sarray_list; sptr != NULL; sptr = sptr->next) {
+ if (sptr->b_s_open) { /* there may be no backing store */
+ sptr->b_s_open = FALSE; /* prevent recursive close if error */
(*sptr->b_s_info.close_backing_store) (cinfo, & sptr->b_s_info);
- }
- }
- mem->virt_sarray_list = NULL;
- for (bptr = mem->virt_barray_list; bptr != NULL; bptr = bptr->next) {
- if (bptr->b_s_open) { /* there may be no backing store */
- bptr->b_s_open = FALSE; /* prevent recursive close if error */
+ }
+ }
+ mem->virt_sarray_list = NULL;
+ for (bptr = mem->virt_barray_list; bptr != NULL; bptr = bptr->next) {
+ if (bptr->b_s_open) { /* there may be no backing store */
+ bptr->b_s_open = FALSE; /* prevent recursive close if error */
(*bptr->b_s_info.close_backing_store) (cinfo, & bptr->b_s_info);
- }
- }
- mem->virt_barray_list = NULL;
- }
-
- /* Release large objects */
- lhdr_ptr = mem->large_list[pool_id];
- mem->large_list[pool_id] = NULL;
-
- while (lhdr_ptr != NULL) {
- large_pool_ptr next_lhdr_ptr = lhdr_ptr->hdr.next;
- space_freed = lhdr_ptr->hdr.bytes_used +
- lhdr_ptr->hdr.bytes_left +
- SIZEOF(large_pool_hdr);
- jpeg_free_large(cinfo, (void FAR *) lhdr_ptr, space_freed);
- mem->total_space_allocated -= space_freed;
- lhdr_ptr = next_lhdr_ptr;
- }
-
- /* Release small objects */
- shdr_ptr = mem->small_list[pool_id];
- mem->small_list[pool_id] = NULL;
-
- while (shdr_ptr != NULL) {
- small_pool_ptr next_shdr_ptr = shdr_ptr->hdr.next;
- space_freed = shdr_ptr->hdr.bytes_used +
- shdr_ptr->hdr.bytes_left +
- SIZEOF(small_pool_hdr);
- jpeg_free_small(cinfo, (void *) shdr_ptr, space_freed);
- mem->total_space_allocated -= space_freed;
- shdr_ptr = next_shdr_ptr;
- }
+ }
+ }
+ mem->virt_barray_list = NULL;
+ }
+
+ /* Release large objects */
+ lhdr_ptr = mem->large_list[pool_id];
+ mem->large_list[pool_id] = NULL;
+
+ while (lhdr_ptr != NULL) {
+ large_pool_ptr next_lhdr_ptr = lhdr_ptr->hdr.next;
+ space_freed = lhdr_ptr->hdr.bytes_used +
+ lhdr_ptr->hdr.bytes_left +
+ SIZEOF(large_pool_hdr);
+ jpeg_free_large(cinfo, (void FAR *) lhdr_ptr, space_freed);
+ mem->total_space_allocated -= space_freed;
+ lhdr_ptr = next_lhdr_ptr;
+ }
+
+ /* Release small objects */
+ shdr_ptr = mem->small_list[pool_id];
+ mem->small_list[pool_id] = NULL;
+
+ while (shdr_ptr != NULL) {
+ small_pool_ptr next_shdr_ptr = shdr_ptr->hdr.next;
+ space_freed = shdr_ptr->hdr.bytes_used +
+ shdr_ptr->hdr.bytes_left +
+ SIZEOF(small_pool_hdr);
+ jpeg_free_small(cinfo, (void *) shdr_ptr, space_freed);
+ mem->total_space_allocated -= space_freed;
+ shdr_ptr = next_shdr_ptr;
+ }
}
@@ -1001,21 +1001,21 @@ free_pool (j_common_ptr cinfo, int pool_id)
METHODDEF(void)
self_destruct (j_common_ptr cinfo)
{
- int pool;
+ int pool;
- /* Close all backing store, release all memory.
- * Releasing pools in reverse order might help avoid fragmentation
- * with some (brain-damaged) malloc libraries.
- */
- for (pool = JPOOL_NUMPOOLS-1; pool >= JPOOL_PERMANENT; pool--) {
- free_pool(cinfo, pool);
- }
+ /* Close all backing store, release all memory.
+ * Releasing pools in reverse order might help avoid fragmentation
+ * with some (brain-damaged) malloc libraries.
+ */
+ for (pool = JPOOL_NUMPOOLS-1; pool >= JPOOL_PERMANENT; pool--) {
+ free_pool(cinfo, pool);
+ }
- /* Release the memory manager control block too. */
- jpeg_free_small(cinfo, (void *) cinfo->mem, SIZEOF(my_memory_mgr));
- cinfo->mem = NULL; /* ensures I will be called only once */
+ /* Release the memory manager control block too. */
+ jpeg_free_small(cinfo, (void *) cinfo->mem, SIZEOF(my_memory_mgr));
+ cinfo->mem = NULL; /* ensures I will be called only once */
- jpeg_mem_term(cinfo); /* system-dependent cleanup */
+ jpeg_mem_term(cinfo); /* system-dependent cleanup */
}
@@ -1027,92 +1027,92 @@ self_destruct (j_common_ptr cinfo)
GLOBAL(void)
jinit_memory_mgr (j_common_ptr cinfo)
{
- my_mem_ptr mem;
- long max_to_use;
- int pool;
- size_t test_mac;
-
- cinfo->mem = NULL; /* for safety if init fails */
-
- /* Check for configuration errors.
- * SIZEOF(ALIGN_TYPE) should be a power of 2; otherwise, it probably
- * doesn't reflect any real hardware alignment requirement.
- * The test is a little tricky: for X>0, X and X-1 have no one-bits
- * in common if and only if X is a power of 2, ie has only one one-bit.
- * Some compilers may give an "unreachable code" warning here; ignore it.
- */
- if ((SIZEOF(ALIGN_TYPE) & (SIZEOF(ALIGN_TYPE)-1)) != 0)
- ERREXIT(cinfo, JERR_BAD_ALIGN_TYPE);
- /* MAX_ALLOC_CHUNK must be representable as type size_t, and must be
- * a multiple of SIZEOF(ALIGN_TYPE).
- * Again, an "unreachable code" warning may be ignored here.
- * But a "constant too large" warning means you need to fix MAX_ALLOC_CHUNK.
- */
- test_mac = (size_t) MAX_ALLOC_CHUNK;
- if ((long) test_mac != MAX_ALLOC_CHUNK ||
- (MAX_ALLOC_CHUNK % SIZEOF(ALIGN_TYPE)) != 0)
- ERREXIT(cinfo, JERR_BAD_ALLOC_CHUNK);
-
- max_to_use = jpeg_mem_init(cinfo); /* system-dependent initialization */
-
- /* Attempt to allocate memory manager's control block */
- mem = (my_mem_ptr) jpeg_get_small(cinfo, SIZEOF(my_memory_mgr));
-
- if (mem == NULL) {
- jpeg_mem_term(cinfo); /* system-dependent cleanup */
- ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, 0);
- }
-
- /* OK, fill in the method pointers */
- mem->pub.alloc_small = alloc_small;
- mem->pub.alloc_large = alloc_large;
- mem->pub.alloc_sarray = alloc_sarray;
- mem->pub.alloc_barray = alloc_barray;
- mem->pub.request_virt_sarray = request_virt_sarray;
- mem->pub.request_virt_barray = request_virt_barray;
- mem->pub.realize_virt_arrays = realize_virt_arrays;
- mem->pub.access_virt_sarray = access_virt_sarray;
- mem->pub.access_virt_barray = access_virt_barray;
- mem->pub.free_pool = free_pool;
- mem->pub.self_destruct = self_destruct;
-
- /* Make MAX_ALLOC_CHUNK accessible to other modules */
- mem->pub.max_alloc_chunk = MAX_ALLOC_CHUNK;
-
- /* Initialize working state */
- mem->pub.max_memory_to_use = max_to_use;
-
- for (pool = JPOOL_NUMPOOLS-1; pool >= JPOOL_PERMANENT; pool--) {
- mem->small_list[pool] = NULL;
- mem->large_list[pool] = NULL;
- }
- mem->virt_sarray_list = NULL;
- mem->virt_barray_list = NULL;
-
- mem->total_space_allocated = SIZEOF(my_memory_mgr);
-
- /* Declare ourselves open for business */
- cinfo->mem = & mem->pub;
-
- /* Check for an environment variable JPEGMEM; if found, override the
- * default max_memory setting from jpeg_mem_init. Note that the
- * surrounding application may again override this value.
- * If your system doesn't support getenv(), define NO_GETENV to disable
- * this feature.
- */
+ my_mem_ptr mem;
+ long max_to_use;
+ int pool;
+ size_t test_mac;
+
+ cinfo->mem = NULL; /* for safety if init fails */
+
+ /* Check for configuration errors.
+ * SIZEOF(ALIGN_TYPE) should be a power of 2; otherwise, it probably
+ * doesn't reflect any real hardware alignment requirement.
+ * The test is a little tricky: for X>0, X and X-1 have no one-bits
+ * in common if and only if X is a power of 2, ie has only one one-bit.
+ * Some compilers may give an "unreachable code" warning here; ignore it.
+ */
+ if ((SIZEOF(ALIGN_TYPE) & (SIZEOF(ALIGN_TYPE)-1)) != 0)
+ ERREXIT(cinfo, JERR_BAD_ALIGN_TYPE);
+ /* MAX_ALLOC_CHUNK must be representable as type size_t, and must be
+ * a multiple of SIZEOF(ALIGN_TYPE).
+ * Again, an "unreachable code" warning may be ignored here.
+ * But a "constant too large" warning means you need to fix MAX_ALLOC_CHUNK.
+ */
+ test_mac = (size_t) MAX_ALLOC_CHUNK;
+ if ((long) test_mac != MAX_ALLOC_CHUNK ||
+ (MAX_ALLOC_CHUNK % SIZEOF(ALIGN_TYPE)) != 0)
+ ERREXIT(cinfo, JERR_BAD_ALLOC_CHUNK);
+
+ max_to_use = jpeg_mem_init(cinfo); /* system-dependent initialization */
+
+ /* Attempt to allocate memory manager's control block */
+ mem = (my_mem_ptr) jpeg_get_small(cinfo, SIZEOF(my_memory_mgr));
+
+ if (mem == NULL) {
+ jpeg_mem_term(cinfo); /* system-dependent cleanup */
+ ERREXIT1(cinfo, JERR_OUT_OF_MEMORY, 0);
+ }
+
+ /* OK, fill in the method pointers */
+ mem->pub.alloc_small = alloc_small;
+ mem->pub.alloc_large = alloc_large;
+ mem->pub.alloc_sarray = alloc_sarray;
+ mem->pub.alloc_barray = alloc_barray;
+ mem->pub.request_virt_sarray = request_virt_sarray;
+ mem->pub.request_virt_barray = request_virt_barray;
+ mem->pub.realize_virt_arrays = realize_virt_arrays;
+ mem->pub.access_virt_sarray = access_virt_sarray;
+ mem->pub.access_virt_barray = access_virt_barray;
+ mem->pub.free_pool = free_pool;
+ mem->pub.self_destruct = self_destruct;
+
+ /* Make MAX_ALLOC_CHUNK accessible to other modules */
+ mem->pub.max_alloc_chunk = MAX_ALLOC_CHUNK;
+
+ /* Initialize working state */
+ mem->pub.max_memory_to_use = max_to_use;
+
+ for (pool = JPOOL_NUMPOOLS-1; pool >= JPOOL_PERMANENT; pool--) {
+ mem->small_list[pool] = NULL;
+ mem->large_list[pool] = NULL;
+ }
+ mem->virt_sarray_list = NULL;
+ mem->virt_barray_list = NULL;
+
+ mem->total_space_allocated = SIZEOF(my_memory_mgr);
+
+ /* Declare ourselves open for business */
+ cinfo->mem = & mem->pub;
+
+ /* Check for an environment variable JPEGMEM; if found, override the
+ * default max_memory setting from jpeg_mem_init. Note that the
+ * surrounding application may again override this value.
+ * If your system doesn't support getenv(), define NO_GETENV to disable
+ * this feature.
+ */
#ifndef NO_GETENV
- { char * memenv;
+ { char * memenv;
- if ((memenv = getenv("JPEGMEM")) != NULL) {
- char ch = 'x';
+ if ((memenv = getenv("JPEGMEM")) != NULL) {
+ char ch = 'x';
- if (sscanf(memenv, "%ld%c", &max_to_use, &ch) > 0) {
+ if (sscanf(memenv, "%ld%c", &max_to_use, &ch) > 0) {
if (ch == 'm' || ch == 'M')
- max_to_use *= 1000L;
+ max_to_use *= 1000L;
mem->pub.max_memory_to_use = max_to_use * 1000L;
- }
- }
- }
+ }
+ }
+ }
#endif
}
diff --git a/src/lib/libjpeg/jmemsys.h b/src/lib/libjpeg/jmemsys.h
index 6c3c6d348f2..d7c4f54c3c3 100644
--- a/src/lib/libjpeg/jmemsys.h
+++ b/src/lib/libjpeg/jmemsys.h
@@ -22,14 +22,14 @@
/* Short forms of external names for systems with brain-damaged linkers. */
#ifdef NEED_SHORT_EXTERNAL_NAMES
-#define jpeg_get_small jGetSmall
-#define jpeg_free_small jFreeSmall
-#define jpeg_get_large jGetLarge
-#define jpeg_free_large jFreeLarge
-#define jpeg_mem_available jMemAvail
-#define jpeg_open_backing_store jOpenBackStore
-#define jpeg_mem_init jMemInit
-#define jpeg_mem_term jMemTerm
+#define jpeg_get_small jGetSmall
+#define jpeg_free_small jFreeSmall
+#define jpeg_get_large jGetLarge
+#define jpeg_free_large jFreeLarge
+#define jpeg_mem_available jMemAvail
+#define jpeg_open_backing_store jOpenBackStore
+#define jpeg_mem_init jMemInit
+#define jpeg_mem_term jMemTerm
#endif /* NEED_SHORT_EXTERNAL_NAMES */
@@ -46,7 +46,7 @@
EXTERN(void *) jpeg_get_small JPP((j_common_ptr cinfo, size_t sizeofobject));
EXTERN(void) jpeg_free_small JPP((j_common_ptr cinfo, void * object,
- size_t sizeofobject));
+ size_t sizeofobject));
/*
* These two functions are used to allocate and release large chunks of
@@ -58,9 +58,9 @@ EXTERN(void) jpeg_free_small JPP((j_common_ptr cinfo, void * object,
*/
EXTERN(void FAR *) jpeg_get_large JPP((j_common_ptr cinfo,
- size_t sizeofobject));
+ size_t sizeofobject));
EXTERN(void) jpeg_free_large JPP((j_common_ptr cinfo, void FAR * object,
- size_t sizeofobject));
+ size_t sizeofobject));
/*
* The macro MAX_ALLOC_CHUNK designates the maximum number of bytes that may
@@ -74,7 +74,7 @@ EXTERN(void) jpeg_free_large JPP((j_common_ptr cinfo, void FAR * object,
* size_t and will be a multiple of sizeof(align_type).
*/
-#ifndef MAX_ALLOC_CHUNK /* may be overridden in jconfig.h */
+#ifndef MAX_ALLOC_CHUNK /* may be overridden in jconfig.h */
#define MAX_ALLOC_CHUNK 1000000000L
#endif
@@ -101,9 +101,9 @@ EXTERN(void) jpeg_free_large JPP((j_common_ptr cinfo, void FAR * object,
*/
EXTERN(long) jpeg_mem_available JPP((j_common_ptr cinfo,
- long min_bytes_needed,
- long max_bytes_needed,
- long already_allocated));
+ long min_bytes_needed,
+ long max_bytes_needed,
+ long already_allocated));
/*
@@ -113,23 +113,23 @@ EXTERN(long) jpeg_mem_available JPP((j_common_ptr cinfo,
* are private to the system-dependent backing store routines.
*/
-#define TEMP_NAME_LENGTH 64 /* max length of a temporary file's name */
+#define TEMP_NAME_LENGTH 64 /* max length of a temporary file's name */
-#ifdef USE_MSDOS_MEMMGR /* DOS-specific junk */
+#ifdef USE_MSDOS_MEMMGR /* DOS-specific junk */
-typedef unsigned short XMSH; /* type of extended-memory handles */
-typedef unsigned short EMSH; /* type of expanded-memory handles */
+typedef unsigned short XMSH; /* type of extended-memory handles */
+typedef unsigned short EMSH; /* type of expanded-memory handles */
typedef union {
- short file_handle; /* DOS file handle if it's a temp file */
- XMSH xms_handle; /* handle if it's a chunk of XMS */
- EMSH ems_handle; /* handle if it's a chunk of EMS */
+ short file_handle; /* DOS file handle if it's a temp file */
+ XMSH xms_handle; /* handle if it's a chunk of XMS */
+ EMSH ems_handle; /* handle if it's a chunk of EMS */
} handle_union;
#endif /* USE_MSDOS_MEMMGR */
-#ifdef USE_MAC_MEMMGR /* Mac-specific junk */
+#ifdef USE_MAC_MEMMGR /* Mac-specific junk */
#include <Files.h>
#endif /* USE_MAC_MEMMGR */
@@ -137,33 +137,33 @@ typedef union {
typedef struct backing_store_struct * backing_store_ptr;
typedef struct backing_store_struct {
- /* Methods for reading/writing/closing this backing-store object */
- JMETHOD(void, read_backing_store, (j_common_ptr cinfo,
- backing_store_ptr info,
- void FAR * buffer_address,
- long file_offset, long byte_count));
- JMETHOD(void, write_backing_store, (j_common_ptr cinfo,
- backing_store_ptr info,
- void FAR * buffer_address,
- long file_offset, long byte_count));
- JMETHOD(void, close_backing_store, (j_common_ptr cinfo,
- backing_store_ptr info));
-
- /* Private fields for system-dependent backing-store management */
+ /* Methods for reading/writing/closing this backing-store object */
+ JMETHOD(void, read_backing_store, (j_common_ptr cinfo,
+ backing_store_ptr info,
+ void FAR * buffer_address,
+ long file_offset, long byte_count));
+ JMETHOD(void, write_backing_store, (j_common_ptr cinfo,
+ backing_store_ptr info,
+ void FAR * buffer_address,
+ long file_offset, long byte_count));
+ JMETHOD(void, close_backing_store, (j_common_ptr cinfo,
+ backing_store_ptr info));
+
+ /* Private fields for system-dependent backing-store management */
#ifdef USE_MSDOS_MEMMGR
- /* For the MS-DOS manager (jmemdos.c), we need: */
- handle_union handle; /* reference to backing-store storage object */
- char temp_name[TEMP_NAME_LENGTH]; /* name if it's a file */
+ /* For the MS-DOS manager (jmemdos.c), we need: */
+ handle_union handle; /* reference to backing-store storage object */
+ char temp_name[TEMP_NAME_LENGTH]; /* name if it's a file */
#else
#ifdef USE_MAC_MEMMGR
- /* For the Mac manager (jmemmac.c), we need: */
- short temp_file; /* file reference number to temp file */
- FSSpec tempSpec; /* the FSSpec for the temp file */
- char temp_name[TEMP_NAME_LENGTH]; /* name if it's a file */
+ /* For the Mac manager (jmemmac.c), we need: */
+ short temp_file; /* file reference number to temp file */
+ FSSpec tempSpec; /* the FSSpec for the temp file */
+ char temp_name[TEMP_NAME_LENGTH]; /* name if it's a file */
#else
- /* For a typical implementation with temp files, we need: */
- FILE * temp_file; /* stdio reference to temp file */
- char temp_name[TEMP_NAME_LENGTH]; /* name of temp file */
+ /* For a typical implementation with temp files, we need: */
+ FILE * temp_file; /* stdio reference to temp file */
+ char temp_name[TEMP_NAME_LENGTH]; /* name of temp file */
#endif
#endif
} backing_store_info;
@@ -178,8 +178,8 @@ typedef struct backing_store_struct {
*/
EXTERN(void) jpeg_open_backing_store JPP((j_common_ptr cinfo,
- backing_store_ptr info,
- long total_bytes_needed));
+ backing_store_ptr info,
+ long total_bytes_needed));
/*
diff --git a/src/lib/libjpeg/jmorecfg.h b/src/lib/libjpeg/jmorecfg.h
index d336e6c7c32..f4da3880bb2 100644
--- a/src/lib/libjpeg/jmorecfg.h
+++ b/src/lib/libjpeg/jmorecfg.h
@@ -21,7 +21,7 @@
* We do not support run-time selection of data precision, sorry.
*/
-#define BITS_IN_JSAMPLE 8 /* use 8 or 12 */
+#define BITS_IN_JSAMPLE 8 /* use 8 or 12 */
/*
@@ -33,7 +33,7 @@
* bytes of storage, whether actually used in an image or not.)
*/
-#define MAX_COMPONENTS 10 /* maximum number of image components */
+#define MAX_COMPONENTS 10 /* maximum number of image components */
/*
@@ -71,8 +71,8 @@ typedef char JSAMPLE;
#endif /* HAVE_UNSIGNED_CHAR */
-#define MAXJSAMPLE 255
-#define CENTERJSAMPLE 128
+#define MAXJSAMPLE 255
+#define CENTERJSAMPLE 128
#endif /* BITS_IN_JSAMPLE == 8 */
@@ -85,8 +85,8 @@ typedef char JSAMPLE;
typedef short JSAMPLE;
#define GETJSAMPLE(value) ((int) (value))
-#define MAXJSAMPLE 4095
-#define CENTERJSAMPLE 2048
+#define MAXJSAMPLE 4095
+#define CENTERJSAMPLE 2048
#endif /* BITS_IN_JSAMPLE == 12 */
@@ -152,16 +152,16 @@ typedef unsigned int UINT16;
/* INT16 must hold at least the values -32768..32767. */
-#ifndef XMD_H /* X11/xmd.h correctly defines INT16 */
+#ifndef XMD_H /* X11/xmd.h correctly defines INT16 */
typedef short INT16;
#endif
/* INT32 must hold at least signed 32-bit values. */
-#ifndef XMD_H /* X11/xmd.h correctly defines INT32 */
-#ifndef _BASETSD_H_ /* Microsoft defines it in basetsd.h */
-#ifndef _BASETSD_H /* MinGW is slightly different */
-#ifndef QGLOBAL_H /* Qt defines it in qglobal.h */
+#ifndef XMD_H /* X11/xmd.h correctly defines INT32 */
+#ifndef _BASETSD_H_ /* Microsoft defines it in basetsd.h */
+#ifndef _BASETSD_H /* MinGW is slightly different */
+#ifndef QGLOBAL_H /* Qt defines it in qglobal.h */
typedef int INT32;
#endif
#endif
@@ -188,13 +188,13 @@ typedef unsigned int JDIMENSION;
*/
/* a function called through method pointers: */
-#define METHODDEF(type) static type
+#define METHODDEF(type) static type
/* a function used only in its module: */
-#define LOCAL(type) static type
+#define LOCAL(type) static type
/* a function referenced thru EXTERNs: */
-#define GLOBAL(type) type
+#define GLOBAL(type) type
/* a reference to a GLOBAL function: */
-#define EXTERN(type) extern type
+#define EXTERN(type) extern type
/* This macro is used to declare a "method", that is, a function pointer.
@@ -235,11 +235,11 @@ typedef unsigned int JDIMENSION;
#ifndef HAVE_BOOLEAN
typedef int boolean;
#endif
-#ifndef FALSE /* in case these macros already exist */
-#define FALSE 0 /* values of boolean */
+#ifndef FALSE /* in case these macros already exist */
+#define FALSE 0 /* values of boolean */
#endif
#ifndef TRUE
-#define TRUE 1
+#define TRUE 1
#endif
@@ -267,17 +267,17 @@ typedef int boolean;
/* Capability options common to encoder and decoder: */
-#define DCT_ISLOW_SUPPORTED /* slow but accurate integer algorithm */
-#define DCT_IFAST_SUPPORTED /* faster, less accurate integer method */
-#define DCT_FLOAT_SUPPORTED /* floating-point: accurate, fast on fast HW */
+#define DCT_ISLOW_SUPPORTED /* slow but accurate integer algorithm */
+#define DCT_IFAST_SUPPORTED /* faster, less accurate integer method */
+#define DCT_FLOAT_SUPPORTED /* floating-point: accurate, fast on fast HW */
/* Encoder capability options: */
#define C_ARITH_CODING_SUPPORTED /* Arithmetic coding back end? */
#define C_MULTISCAN_FILES_SUPPORTED /* Multiple-scan JPEG files? */
-#define C_PROGRESSIVE_SUPPORTED /* Progressive JPEG? (Requires MULTISCAN)*/
-#define DCT_SCALING_SUPPORTED /* Input rescaling via DCT? (Requires DCT_ISLOW)*/
-#define ENTROPY_OPT_SUPPORTED /* Optimization of entropy coding parms? */
+#define C_PROGRESSIVE_SUPPORTED /* Progressive JPEG? (Requires MULTISCAN)*/
+#define DCT_SCALING_SUPPORTED /* Input rescaling via DCT? (Requires DCT_ISLOW)*/
+#define ENTROPY_OPT_SUPPORTED /* Optimization of entropy coding parms? */
/* Note: if you selected 12-bit data precision, it is dangerous to turn off
* ENTROPY_OPT_SUPPORTED. The standard Huffman tables are only good for 8-bit
* precision, so jchuff.c normally uses entropy optimization to compute
@@ -292,14 +292,14 @@ typedef int boolean;
#define D_ARITH_CODING_SUPPORTED /* Arithmetic coding back end? */
#define D_MULTISCAN_FILES_SUPPORTED /* Multiple-scan JPEG files? */
-#define D_PROGRESSIVE_SUPPORTED /* Progressive JPEG? (Requires MULTISCAN)*/
-#define IDCT_SCALING_SUPPORTED /* Output rescaling via IDCT? */
-#define SAVE_MARKERS_SUPPORTED /* jpeg_save_markers() needed? */
+#define D_PROGRESSIVE_SUPPORTED /* Progressive JPEG? (Requires MULTISCAN)*/
+#define IDCT_SCALING_SUPPORTED /* Output rescaling via IDCT? */
+#define SAVE_MARKERS_SUPPORTED /* jpeg_save_markers() needed? */
#define BLOCK_SMOOTHING_SUPPORTED /* Block smoothing? (Progressive only) */
#undef UPSAMPLE_SCALING_SUPPORTED /* Output rescaling at upsample stage? */
#define UPSAMPLE_MERGING_SUPPORTED /* Fast path for sloppy upsampling? */
-#define QUANT_1PASS_SUPPORTED /* 1-pass color quantization? */
-#define QUANT_2PASS_SUPPORTED /* 2-pass color quantization? */
+#define QUANT_1PASS_SUPPORTED /* 1-pass color quantization? */
+#define QUANT_2PASS_SUPPORTED /* 2-pass color quantization? */
/* more capability options later, no doubt */
@@ -319,10 +319,10 @@ typedef int boolean;
* can't use color quantization if you change that value.
*/
-#define RGB_RED 0 /* Offset of Red in an RGB scanline element */
-#define RGB_GREEN 1 /* Offset of Green */
-#define RGB_BLUE 2 /* Offset of Blue */
-#define RGB_PIXELSIZE 3 /* JSAMPLEs per RGB scanline element */
+#define RGB_RED 0 /* Offset of Red in an RGB scanline element */
+#define RGB_GREEN 1 /* Offset of Green */
+#define RGB_BLUE 2 /* Offset of Blue */
+#define RGB_PIXELSIZE 3 /* JSAMPLEs per RGB scanline element */
/* Definitions for speed-related optimizations. */
@@ -333,11 +333,11 @@ typedef int boolean;
*/
#ifndef INLINE
-#ifdef __GNUC__ /* for instance, GNU C knows about inline */
+#ifdef __GNUC__ /* for instance, GNU C knows about inline */
#define INLINE __inline__
#endif
#ifndef INLINE
-#define INLINE /* default is to define it as empty */
+#define INLINE /* default is to define it as empty */
#endif
#endif
@@ -348,7 +348,7 @@ typedef int boolean;
*/
#ifndef MULTIPLIER
-#define MULTIPLIER int /* type for fastest integer multiply */
+#define MULTIPLIER int /* type for fastest integer multiply */
#endif
diff --git a/src/lib/libjpeg/jpegint.h b/src/lib/libjpeg/jpegint.h
index 0c27a4e4a03..fce73ac149c 100644
--- a/src/lib/libjpeg/jpegint.h
+++ b/src/lib/libjpeg/jpegint.h
@@ -14,123 +14,123 @@
/* Declarations for both compression & decompression */
-typedef enum { /* Operating modes for buffer controllers */
- JBUF_PASS_THRU, /* Plain stripwise operation */
+typedef enum { /* Operating modes for buffer controllers */
+ JBUF_PASS_THRU, /* Plain stripwise operation */
/* Remaining modes require a full-image buffer to have been created */
- JBUF_SAVE_SOURCE, /* Run source subobject only, save output */
- JBUF_CRANK_DEST, /* Run dest subobject only, using saved data */
- JBUF_SAVE_AND_PASS /* Run both subobjects, save output */
+ JBUF_SAVE_SOURCE, /* Run source subobject only, save output */
+ JBUF_CRANK_DEST, /* Run dest subobject only, using saved data */
+ JBUF_SAVE_AND_PASS /* Run both subobjects, save output */
} J_BUF_MODE;
/* Values of global_state field (jdapi.c has some dependencies on ordering!) */
-#define CSTATE_START 100 /* after create_compress */
-#define CSTATE_SCANNING 101 /* start_compress done, write_scanlines OK */
-#define CSTATE_RAW_OK 102 /* start_compress done, write_raw_data OK */
-#define CSTATE_WRCOEFS 103 /* jpeg_write_coefficients done */
-#define DSTATE_START 200 /* after create_decompress */
-#define DSTATE_INHEADER 201 /* reading header markers, no SOS yet */
-#define DSTATE_READY 202 /* found SOS, ready for start_decompress */
-#define DSTATE_PRELOAD 203 /* reading multiscan file in start_decompress*/
-#define DSTATE_PRESCAN 204 /* performing dummy pass for 2-pass quant */
-#define DSTATE_SCANNING 205 /* start_decompress done, read_scanlines OK */
-#define DSTATE_RAW_OK 206 /* start_decompress done, read_raw_data OK */
-#define DSTATE_BUFIMAGE 207 /* expecting jpeg_start_output */
-#define DSTATE_BUFPOST 208 /* looking for SOS/EOI in jpeg_finish_output */
-#define DSTATE_RDCOEFS 209 /* reading file in jpeg_read_coefficients */
-#define DSTATE_STOPPING 210 /* looking for EOI in jpeg_finish_decompress */
+#define CSTATE_START 100 /* after create_compress */
+#define CSTATE_SCANNING 101 /* start_compress done, write_scanlines OK */
+#define CSTATE_RAW_OK 102 /* start_compress done, write_raw_data OK */
+#define CSTATE_WRCOEFS 103 /* jpeg_write_coefficients done */
+#define DSTATE_START 200 /* after create_decompress */
+#define DSTATE_INHEADER 201 /* reading header markers, no SOS yet */
+#define DSTATE_READY 202 /* found SOS, ready for start_decompress */
+#define DSTATE_PRELOAD 203 /* reading multiscan file in start_decompress*/
+#define DSTATE_PRESCAN 204 /* performing dummy pass for 2-pass quant */
+#define DSTATE_SCANNING 205 /* start_decompress done, read_scanlines OK */
+#define DSTATE_RAW_OK 206 /* start_decompress done, read_raw_data OK */
+#define DSTATE_BUFIMAGE 207 /* expecting jpeg_start_output */
+#define DSTATE_BUFPOST 208 /* looking for SOS/EOI in jpeg_finish_output */
+#define DSTATE_RDCOEFS 209 /* reading file in jpeg_read_coefficients */
+#define DSTATE_STOPPING 210 /* looking for EOI in jpeg_finish_decompress */
/* Declarations for compression modules */
/* Master control module */
struct jpeg_comp_master {
- JMETHOD(void, prepare_for_pass, (j_compress_ptr cinfo));
- JMETHOD(void, pass_startup, (j_compress_ptr cinfo));
- JMETHOD(void, finish_pass, (j_compress_ptr cinfo));
+ JMETHOD(void, prepare_for_pass, (j_compress_ptr cinfo));
+ JMETHOD(void, pass_startup, (j_compress_ptr cinfo));
+ JMETHOD(void, finish_pass, (j_compress_ptr cinfo));
- /* State variables made visible to other modules */
- boolean call_pass_startup; /* True if pass_startup must be called */
- boolean is_last_pass; /* True during last pass */
+ /* State variables made visible to other modules */
+ boolean call_pass_startup; /* True if pass_startup must be called */
+ boolean is_last_pass; /* True during last pass */
};
/* Main buffer control (downsampled-data buffer) */
struct jpeg_c_main_controller {
- JMETHOD(void, start_pass, (j_compress_ptr cinfo, J_BUF_MODE pass_mode));
- JMETHOD(void, process_data, (j_compress_ptr cinfo,
- JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
- JDIMENSION in_rows_avail));
+ JMETHOD(void, start_pass, (j_compress_ptr cinfo, J_BUF_MODE pass_mode));
+ JMETHOD(void, process_data, (j_compress_ptr cinfo,
+ JSAMPARRAY input_buf, JDIMENSION *in_row_ctr,
+ JDIMENSION in_rows_avail));
};
/* Compression preprocessing (downsampling input buffer control) */
struct jpeg_c_prep_controller {
- JMETHOD(void, start_pass, (j_compress_ptr cinfo, J_BUF_MODE pass_mode));
- JMETHOD(void, pre_process_data, (j_compress_ptr cinfo,
- JSAMPARRAY input_buf,
- JDIMENSION *in_row_ctr,
- JDIMENSION in_rows_avail,
- JSAMPIMAGE output_buf,
- JDIMENSION *out_row_group_ctr,
- JDIMENSION out_row_groups_avail));
+ JMETHOD(void, start_pass, (j_compress_ptr cinfo, J_BUF_MODE pass_mode));
+ JMETHOD(void, pre_process_data, (j_compress_ptr cinfo,
+ JSAMPARRAY input_buf,
+ JDIMENSION *in_row_ctr,
+ JDIMENSION in_rows_avail,
+ JSAMPIMAGE output_buf,
+ JDIMENSION *out_row_group_ctr,
+ JDIMENSION out_row_groups_avail));
};
/* Coefficient buffer control */
struct jpeg_c_coef_controller {
- JMETHOD(void, start_pass, (j_compress_ptr cinfo, J_BUF_MODE pass_mode));
- JMETHOD(boolean, compress_data, (j_compress_ptr cinfo,
- JSAMPIMAGE input_buf));
+ JMETHOD(void, start_pass, (j_compress_ptr cinfo, J_BUF_MODE pass_mode));
+ JMETHOD(boolean, compress_data, (j_compress_ptr cinfo,
+ JSAMPIMAGE input_buf));
};
/* Colorspace conversion */
struct jpeg_color_converter {
- JMETHOD(void, start_pass, (j_compress_ptr cinfo));
- JMETHOD(void, color_convert, (j_compress_ptr cinfo,
+ JMETHOD(void, start_pass, (j_compress_ptr cinfo));
+ JMETHOD(void, color_convert, (j_compress_ptr cinfo,
JSAMPARRAY input_buf, JSAMPIMAGE output_buf,
JDIMENSION output_row, int num_rows));
};
/* Downsampling */
struct jpeg_downsampler {
- JMETHOD(void, start_pass, (j_compress_ptr cinfo));
- JMETHOD(void, downsample, (j_compress_ptr cinfo,
- JSAMPIMAGE input_buf, JDIMENSION in_row_index,
- JSAMPIMAGE output_buf,
- JDIMENSION out_row_group_index));
+ JMETHOD(void, start_pass, (j_compress_ptr cinfo));
+ JMETHOD(void, downsample, (j_compress_ptr cinfo,
+ JSAMPIMAGE input_buf, JDIMENSION in_row_index,
+ JSAMPIMAGE output_buf,
+ JDIMENSION out_row_group_index));
- boolean need_context_rows; /* TRUE if need rows above & below */
+ boolean need_context_rows; /* TRUE if need rows above & below */
};
/* Forward DCT (also controls coefficient quantization) */
typedef JMETHOD(void, forward_DCT_ptr,
(j_compress_ptr cinfo, jpeg_component_info * compptr,
- JSAMPARRAY sample_data, JBLOCKROW coef_blocks,
- JDIMENSION start_row, JDIMENSION start_col,
- JDIMENSION num_blocks));
+ JSAMPARRAY sample_data, JBLOCKROW coef_blocks,
+ JDIMENSION start_row, JDIMENSION start_col,
+ JDIMENSION num_blocks));
struct jpeg_forward_dct {
- JMETHOD(void, start_pass, (j_compress_ptr cinfo));
- /* It is useful to allow each component to have a separate FDCT method. */
- forward_DCT_ptr forward_DCT[MAX_COMPONENTS];
+ JMETHOD(void, start_pass, (j_compress_ptr cinfo));
+ /* It is useful to allow each component to have a separate FDCT method. */
+ forward_DCT_ptr forward_DCT[MAX_COMPONENTS];
};
/* Entropy encoding */
struct jpeg_entropy_encoder {
- JMETHOD(void, start_pass, (j_compress_ptr cinfo, boolean gather_statistics));
- JMETHOD(boolean, encode_mcu, (j_compress_ptr cinfo, JBLOCKROW *MCU_data));
- JMETHOD(void, finish_pass, (j_compress_ptr cinfo));
+ JMETHOD(void, start_pass, (j_compress_ptr cinfo, boolean gather_statistics));
+ JMETHOD(boolean, encode_mcu, (j_compress_ptr cinfo, JBLOCKROW *MCU_data));
+ JMETHOD(void, finish_pass, (j_compress_ptr cinfo));
};
/* Marker writing */
struct jpeg_marker_writer {
- JMETHOD(void, write_file_header, (j_compress_ptr cinfo));
- JMETHOD(void, write_frame_header, (j_compress_ptr cinfo));
- JMETHOD(void, write_scan_header, (j_compress_ptr cinfo));
- JMETHOD(void, write_file_trailer, (j_compress_ptr cinfo));
- JMETHOD(void, write_tables_only, (j_compress_ptr cinfo));
- /* These routines are exported to allow insertion of extra markers */
- /* Probably only COM and APPn markers should be written this way */
- JMETHOD(void, write_marker_header, (j_compress_ptr cinfo, int marker,
- unsigned int datalen));
- JMETHOD(void, write_marker_byte, (j_compress_ptr cinfo, int val));
+ JMETHOD(void, write_file_header, (j_compress_ptr cinfo));
+ JMETHOD(void, write_frame_header, (j_compress_ptr cinfo));
+ JMETHOD(void, write_scan_header, (j_compress_ptr cinfo));
+ JMETHOD(void, write_file_trailer, (j_compress_ptr cinfo));
+ JMETHOD(void, write_tables_only, (j_compress_ptr cinfo));
+ /* These routines are exported to allow insertion of extra markers */
+ /* Probably only COM and APPn markers should be written this way */
+ JMETHOD(void, write_marker_header, (j_compress_ptr cinfo, int marker,
+ unsigned int datalen));
+ JMETHOD(void, write_marker_byte, (j_compress_ptr cinfo, int val));
};
@@ -138,134 +138,134 @@ struct jpeg_marker_writer {
/* Master control module */
struct jpeg_decomp_master {
- JMETHOD(void, prepare_for_output_pass, (j_decompress_ptr cinfo));
- JMETHOD(void, finish_output_pass, (j_decompress_ptr cinfo));
+ JMETHOD(void, prepare_for_output_pass, (j_decompress_ptr cinfo));
+ JMETHOD(void, finish_output_pass, (j_decompress_ptr cinfo));
- /* State variables made visible to other modules */
- boolean is_dummy_pass; /* True during 1st pass for 2-pass quant */
+ /* State variables made visible to other modules */
+ boolean is_dummy_pass; /* True during 1st pass for 2-pass quant */
};
/* Input control module */
struct jpeg_input_controller {
- JMETHOD(int, consume_input, (j_decompress_ptr cinfo));
- JMETHOD(void, reset_input_controller, (j_decompress_ptr cinfo));
- JMETHOD(void, start_input_pass, (j_decompress_ptr cinfo));
- JMETHOD(void, finish_input_pass, (j_decompress_ptr cinfo));
-
- /* State variables made visible to other modules */
- boolean has_multiple_scans; /* True if file has multiple scans */
- boolean eoi_reached; /* True when EOI has been consumed */
+ JMETHOD(int, consume_input, (j_decompress_ptr cinfo));
+ JMETHOD(void, reset_input_controller, (j_decompress_ptr cinfo));
+ JMETHOD(void, start_input_pass, (j_decompress_ptr cinfo));
+ JMETHOD(void, finish_input_pass, (j_decompress_ptr cinfo));
+
+ /* State variables made visible to other modules */
+ boolean has_multiple_scans; /* True if file has multiple scans */
+ boolean eoi_reached; /* True when EOI has been consumed */
};
/* Main buffer control (downsampled-data buffer) */
struct jpeg_d_main_controller {
- JMETHOD(void, start_pass, (j_decompress_ptr cinfo, J_BUF_MODE pass_mode));
- JMETHOD(void, process_data, (j_decompress_ptr cinfo,
- JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail));
+ JMETHOD(void, start_pass, (j_decompress_ptr cinfo, J_BUF_MODE pass_mode));
+ JMETHOD(void, process_data, (j_decompress_ptr cinfo,
+ JSAMPARRAY output_buf, JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail));
};
/* Coefficient buffer control */
struct jpeg_d_coef_controller {
- JMETHOD(void, start_input_pass, (j_decompress_ptr cinfo));
- JMETHOD(int, consume_data, (j_decompress_ptr cinfo));
- JMETHOD(void, start_output_pass, (j_decompress_ptr cinfo));
- JMETHOD(int, decompress_data, (j_decompress_ptr cinfo,
- JSAMPIMAGE output_buf));
- /* Pointer to array of coefficient virtual arrays, or NULL if none */
- jvirt_barray_ptr *coef_arrays;
+ JMETHOD(void, start_input_pass, (j_decompress_ptr cinfo));
+ JMETHOD(int, consume_data, (j_decompress_ptr cinfo));
+ JMETHOD(void, start_output_pass, (j_decompress_ptr cinfo));
+ JMETHOD(int, decompress_data, (j_decompress_ptr cinfo,
+ JSAMPIMAGE output_buf));
+ /* Pointer to array of coefficient virtual arrays, or NULL if none */
+ jvirt_barray_ptr *coef_arrays;
};
/* Decompression postprocessing (color quantization buffer control) */
struct jpeg_d_post_controller {
- JMETHOD(void, start_pass, (j_decompress_ptr cinfo, J_BUF_MODE pass_mode));
- JMETHOD(void, post_process_data, (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf,
- JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf,
- JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail));
+ JMETHOD(void, start_pass, (j_decompress_ptr cinfo, J_BUF_MODE pass_mode));
+ JMETHOD(void, post_process_data, (j_decompress_ptr cinfo,
+ JSAMPIMAGE input_buf,
+ JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf,
+ JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail));
};
/* Marker reading & parsing */
struct jpeg_marker_reader {
- JMETHOD(void, reset_marker_reader, (j_decompress_ptr cinfo));
- /* Read markers until SOS or EOI.
- * Returns same codes as are defined for jpeg_consume_input:
- * JPEG_SUSPENDED, JPEG_REACHED_SOS, or JPEG_REACHED_EOI.
- */
- JMETHOD(int, read_markers, (j_decompress_ptr cinfo));
- /* Read a restart marker --- exported for use by entropy decoder only */
- jpeg_marker_parser_method read_restart_marker;
-
- /* State of marker reader --- nominally internal, but applications
- * supplying COM or APPn handlers might like to know the state.
- */
- boolean saw_SOI; /* found SOI? */
- boolean saw_SOF; /* found SOF? */
- int next_restart_num; /* next restart number expected (0-7) */
- unsigned int discarded_bytes; /* # of bytes skipped looking for a marker */
+ JMETHOD(void, reset_marker_reader, (j_decompress_ptr cinfo));
+ /* Read markers until SOS or EOI.
+ * Returns same codes as are defined for jpeg_consume_input:
+ * JPEG_SUSPENDED, JPEG_REACHED_SOS, or JPEG_REACHED_EOI.
+ */
+ JMETHOD(int, read_markers, (j_decompress_ptr cinfo));
+ /* Read a restart marker --- exported for use by entropy decoder only */
+ jpeg_marker_parser_method read_restart_marker;
+
+ /* State of marker reader --- nominally internal, but applications
+ * supplying COM or APPn handlers might like to know the state.
+ */
+ boolean saw_SOI; /* found SOI? */
+ boolean saw_SOF; /* found SOF? */
+ int next_restart_num; /* next restart number expected (0-7) */
+ unsigned int discarded_bytes; /* # of bytes skipped looking for a marker */
};
/* Entropy decoding */
struct jpeg_entropy_decoder {
- JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
- JMETHOD(boolean, decode_mcu, (j_decompress_ptr cinfo,
+ JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
+ JMETHOD(boolean, decode_mcu, (j_decompress_ptr cinfo,
JBLOCKROW *MCU_data));
};
/* Inverse DCT (also performs dequantization) */
typedef JMETHOD(void, inverse_DCT_method_ptr,
(j_decompress_ptr cinfo, jpeg_component_info * compptr,
- JCOEFPTR coef_block,
- JSAMPARRAY output_buf, JDIMENSION output_col));
+ JCOEFPTR coef_block,
+ JSAMPARRAY output_buf, JDIMENSION output_col));
struct jpeg_inverse_dct {
- JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
- /* It is useful to allow each component to have a separate IDCT method. */
- inverse_DCT_method_ptr inverse_DCT[MAX_COMPONENTS];
+ JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
+ /* It is useful to allow each component to have a separate IDCT method. */
+ inverse_DCT_method_ptr inverse_DCT[MAX_COMPONENTS];
};
/* Upsampling (note that upsampler must also call color converter) */
struct jpeg_upsampler {
- JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
- JMETHOD(void, upsample, (j_decompress_ptr cinfo,
- JSAMPIMAGE input_buf,
- JDIMENSION *in_row_group_ctr,
- JDIMENSION in_row_groups_avail,
- JSAMPARRAY output_buf,
- JDIMENSION *out_row_ctr,
- JDIMENSION out_rows_avail));
-
- boolean need_context_rows; /* TRUE if need rows above & below */
+ JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
+ JMETHOD(void, upsample, (j_decompress_ptr cinfo,
+ JSAMPIMAGE input_buf,
+ JDIMENSION *in_row_group_ctr,
+ JDIMENSION in_row_groups_avail,
+ JSAMPARRAY output_buf,
+ JDIMENSION *out_row_ctr,
+ JDIMENSION out_rows_avail));
+
+ boolean need_context_rows; /* TRUE if need rows above & below */
};
/* Colorspace conversion */
struct jpeg_color_deconverter {
- JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
- JMETHOD(void, color_convert, (j_decompress_ptr cinfo,
+ JMETHOD(void, start_pass, (j_decompress_ptr cinfo));
+ JMETHOD(void, color_convert, (j_decompress_ptr cinfo,
JSAMPIMAGE input_buf, JDIMENSION input_row,
JSAMPARRAY output_buf, int num_rows));
};
/* Color quantization or color precision reduction */
struct jpeg_color_quantizer {
- JMETHOD(void, start_pass, (j_decompress_ptr cinfo, boolean is_pre_scan));
- JMETHOD(void, color_quantize, (j_decompress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPARRAY output_buf,
- int num_rows));
- JMETHOD(void, finish_pass, (j_decompress_ptr cinfo));
- JMETHOD(void, new_color_map, (j_decompress_ptr cinfo));
+ JMETHOD(void, start_pass, (j_decompress_ptr cinfo, boolean is_pre_scan));
+ JMETHOD(void, color_quantize, (j_decompress_ptr cinfo,
+ JSAMPARRAY input_buf, JSAMPARRAY output_buf,
+ int num_rows));
+ JMETHOD(void, finish_pass, (j_decompress_ptr cinfo));
+ JMETHOD(void, new_color_map, (j_decompress_ptr cinfo));
};
/* Miscellaneous useful macros */
#undef MAX
-#define MAX(a,b) ((a) > (b) ? (a) : (b))
+#define MAX(a,b) ((a) > (b) ? (a) : (b))
#undef MIN
-#define MIN(a,b) ((a) < (b) ? (a) : (b))
+#define MIN(a,b) ((a) < (b) ? (a) : (b))
/* We assume that right shift corresponds to signed division by 2 with
@@ -279,73 +279,73 @@ struct jpeg_color_quantizer {
*/
#ifdef RIGHT_SHIFT_IS_UNSIGNED
-#define SHIFT_TEMPS INT32 shift_temp;
+#define SHIFT_TEMPS INT32 shift_temp;
#define RIGHT_SHIFT(x,shft) \
((shift_temp = (x)) < 0 ? \
- (shift_temp >> (shft)) | ((~((INT32) 0)) << (32-(shft))) : \
- (shift_temp >> (shft)))
+ (shift_temp >> (shft)) | ((~((INT32) 0)) << (32-(shft))) : \
+ (shift_temp >> (shft)))
#else
#define SHIFT_TEMPS
-#define RIGHT_SHIFT(x,shft) ((x) >> (shft))
+#define RIGHT_SHIFT(x,shft) ((x) >> (shft))
#endif
/* Short forms of external names for systems with brain-damaged linkers. */
#ifdef NEED_SHORT_EXTERNAL_NAMES
-#define jinit_compress_master jICompress
-#define jinit_c_master_control jICMaster
-#define jinit_c_main_controller jICMainC
-#define jinit_c_prep_controller jICPrepC
-#define jinit_c_coef_controller jICCoefC
-#define jinit_color_converter jICColor
-#define jinit_downsampler jIDownsampler
-#define jinit_forward_dct jIFDCT
-#define jinit_huff_encoder jIHEncoder
-#define jinit_arith_encoder jIAEncoder
-#define jinit_marker_writer jIMWriter
-#define jinit_master_decompress jIDMaster
-#define jinit_d_main_controller jIDMainC
-#define jinit_d_coef_controller jIDCoefC
-#define jinit_d_post_controller jIDPostC
-#define jinit_input_controller jIInCtlr
-#define jinit_marker_reader jIMReader
-#define jinit_huff_decoder jIHDecoder
-#define jinit_arith_decoder jIADecoder
-#define jinit_inverse_dct jIIDCT
-#define jinit_upsampler jIUpsampler
-#define jinit_color_deconverter jIDColor
-#define jinit_1pass_quantizer jI1Quant
-#define jinit_2pass_quantizer jI2Quant
-#define jinit_merged_upsampler jIMUpsampler
-#define jinit_memory_mgr jIMemMgr
-#define jdiv_round_up jDivRound
-#define jround_up jRound
-#define jcopy_sample_rows jCopySamples
-#define jcopy_block_row jCopyBlocks
-#define jzero_far jZeroFar
-#define jpeg_zigzag_order jZIGTable
-#define jpeg_natural_order jZAGTable
-#define jpeg_natural_order7 jZAGTable7
-#define jpeg_natural_order6 jZAGTable6
-#define jpeg_natural_order5 jZAGTable5
-#define jpeg_natural_order4 jZAGTable4
-#define jpeg_natural_order3 jZAGTable3
-#define jpeg_natural_order2 jZAGTable2
-#define jpeg_aritab jAriTab
+#define jinit_compress_master jICompress
+#define jinit_c_master_control jICMaster
+#define jinit_c_main_controller jICMainC
+#define jinit_c_prep_controller jICPrepC
+#define jinit_c_coef_controller jICCoefC
+#define jinit_color_converter jICColor
+#define jinit_downsampler jIDownsampler
+#define jinit_forward_dct jIFDCT
+#define jinit_huff_encoder jIHEncoder
+#define jinit_arith_encoder jIAEncoder
+#define jinit_marker_writer jIMWriter
+#define jinit_master_decompress jIDMaster
+#define jinit_d_main_controller jIDMainC
+#define jinit_d_coef_controller jIDCoefC
+#define jinit_d_post_controller jIDPostC
+#define jinit_input_controller jIInCtlr
+#define jinit_marker_reader jIMReader
+#define jinit_huff_decoder jIHDecoder
+#define jinit_arith_decoder jIADecoder
+#define jinit_inverse_dct jIIDCT
+#define jinit_upsampler jIUpsampler
+#define jinit_color_deconverter jIDColor
+#define jinit_1pass_quantizer jI1Quant
+#define jinit_2pass_quantizer jI2Quant
+#define jinit_merged_upsampler jIMUpsampler
+#define jinit_memory_mgr jIMemMgr
+#define jdiv_round_up jDivRound
+#define jround_up jRound
+#define jcopy_sample_rows jCopySamples
+#define jcopy_block_row jCopyBlocks
+#define jzero_far jZeroFar
+#define jpeg_zigzag_order jZIGTable
+#define jpeg_natural_order jZAGTable
+#define jpeg_natural_order7 jZAGTable7
+#define jpeg_natural_order6 jZAGTable6
+#define jpeg_natural_order5 jZAGTable5
+#define jpeg_natural_order4 jZAGTable4
+#define jpeg_natural_order3 jZAGTable3
+#define jpeg_natural_order2 jZAGTable2
+#define jpeg_aritab jAriTab
#endif /* NEED_SHORT_EXTERNAL_NAMES */
/* Compression module initialization routines */
EXTERN(void) jinit_compress_master JPP((j_compress_ptr cinfo));
EXTERN(void) jinit_c_master_control JPP((j_compress_ptr cinfo,
- boolean transcode_only));
+ boolean transcode_only));
EXTERN(void) jinit_c_main_controller JPP((j_compress_ptr cinfo,
- boolean need_full_buffer));
+ boolean need_full_buffer));
EXTERN(void) jinit_c_prep_controller JPP((j_compress_ptr cinfo,
- boolean need_full_buffer));
+ boolean need_full_buffer));
EXTERN(void) jinit_c_coef_controller JPP((j_compress_ptr cinfo,
- boolean need_full_buffer));
+ boolean need_full_buffer));
EXTERN(void) jinit_color_converter JPP((j_compress_ptr cinfo));
EXTERN(void) jinit_downsampler JPP((j_compress_ptr cinfo));
EXTERN(void) jinit_forward_dct JPP((j_compress_ptr cinfo));
@@ -355,11 +355,11 @@ EXTERN(void) jinit_marker_writer JPP((j_compress_ptr cinfo));
/* Decompression module initialization routines */
EXTERN(void) jinit_master_decompress JPP((j_decompress_ptr cinfo));
EXTERN(void) jinit_d_main_controller JPP((j_decompress_ptr cinfo,
- boolean need_full_buffer));
+ boolean need_full_buffer));
EXTERN(void) jinit_d_coef_controller JPP((j_decompress_ptr cinfo,
- boolean need_full_buffer));
+ boolean need_full_buffer));
EXTERN(void) jinit_d_post_controller JPP((j_decompress_ptr cinfo,
- boolean need_full_buffer));
+ boolean need_full_buffer));
EXTERN(void) jinit_input_controller JPP((j_decompress_ptr cinfo));
EXTERN(void) jinit_marker_reader JPP((j_decompress_ptr cinfo));
EXTERN(void) jinit_huff_decoder JPP((j_decompress_ptr cinfo));
@@ -377,13 +377,13 @@ EXTERN(void) jinit_memory_mgr JPP((j_common_ptr cinfo));
EXTERN(long) jdiv_round_up JPP((long a, long b));
EXTERN(long) jround_up JPP((long a, long b));
EXTERN(void) jcopy_sample_rows JPP((JSAMPARRAY input_array, int source_row,
- JSAMPARRAY output_array, int dest_row,
- int num_rows, JDIMENSION num_cols));
+ JSAMPARRAY output_array, int dest_row,
+ int num_rows, JDIMENSION num_cols));
EXTERN(void) jcopy_block_row JPP((JBLOCKROW input_row, JBLOCKROW output_row,
- JDIMENSION num_blocks));
+ JDIMENSION num_blocks));
EXTERN(void) jzero_far JPP((void FAR * target, size_t bytestozero));
/* Constant tables in jutils.c */
-#if 0 /* This table is not actually needed in v6a */
+#if 0 /* This table is not actually needed in v6a */
extern const int jpeg_zigzag_order[]; /* natural coef order to zigzag order */
#endif
extern const int jpeg_natural_order[]; /* zigzag coef order to natural order */
@@ -400,7 +400,7 @@ extern const INT32 jpeg_aritab[];
/* Suppress undefined-structure complaints if necessary. */
#ifdef INCOMPLETE_TYPES_BROKEN
-#ifndef AM_MEMORY_MANAGER /* only jmemmgr.c defines these */
+#ifndef AM_MEMORY_MANAGER /* only jmemmgr.c defines these */
struct jvirt_sarray_control { long dummy; };
struct jvirt_barray_control { long dummy; };
#endif
diff --git a/src/lib/libjpeg/jpeglib.h b/src/lib/libjpeg/jpeglib.h
index ea9ac43796f..d7a6649752d 100644
--- a/src/lib/libjpeg/jpeglib.h
+++ b/src/lib/libjpeg/jpeglib.h
@@ -28,10 +28,10 @@
* manual configuration options that most people need not worry about.
*/
-#ifndef JCONFIG_INCLUDED /* in case jinclude.h already did */
-#include "jconfig.h" /* widely used configuration options */
+#ifndef JCONFIG_INCLUDED /* in case jinclude.h already did */
+#include "jconfig.h" /* widely used configuration options */
#endif
-#include "jmorecfg.h" /* seldom changed options */
+#include "jmorecfg.h" /* seldom changed options */
#ifdef __cplusplus
@@ -44,7 +44,7 @@ extern "C" {
* Might be useful for tests like "#if JPEG_LIB_VERSION >= 80".
*/
-#define JPEG_LIB_VERSION 80 /* Compatibility version 8.0 */
+#define JPEG_LIB_VERSION 80 /* Compatibility version 8.0 */
#define JPEG_LIB_VERSION_MAJOR 8
#define JPEG_LIB_VERSION_MINOR 3
@@ -54,13 +54,13 @@ extern "C" {
* if you want to be compatible.
*/
-#define DCTSIZE 8 /* The basic DCT block is 8x8 samples */
-#define DCTSIZE2 64 /* DCTSIZE squared; # of elements in a block */
-#define NUM_QUANT_TBLS 4 /* Quantization tables are numbered 0..3 */
-#define NUM_HUFF_TBLS 4 /* Huffman tables are numbered 0..3 */
-#define NUM_ARITH_TBLS 16 /* Arith-coding tables are numbered 0..15 */
-#define MAX_COMPS_IN_SCAN 4 /* JPEG limit on # of components in one scan */
-#define MAX_SAMP_FACTOR 4 /* JPEG limit on sampling factors */
+#define DCTSIZE 8 /* The basic DCT block is 8x8 samples */
+#define DCTSIZE2 64 /* DCTSIZE squared; # of elements in a block */
+#define NUM_QUANT_TBLS 4 /* Quantization tables are numbered 0..3 */
+#define NUM_HUFF_TBLS 4 /* Huffman tables are numbered 0..3 */
+#define NUM_ARITH_TBLS 16 /* Arith-coding tables are numbered 0..15 */
+#define MAX_COMPS_IN_SCAN 4 /* JPEG limit on # of components in one scan */
+#define MAX_SAMP_FACTOR 4 /* JPEG limit on sampling factors */
/* Unfortunately, some bozo at Adobe saw no reason to be bound by the standard;
* the PostScript DCT filter can emit files with many more than 10 blocks/MCU.
* If you happen to run across such a file, you can up D_MAX_BLOCKS_IN_MCU
@@ -79,16 +79,16 @@ extern "C" {
* but the pointer arrays can fit in near memory.
*/
-typedef JSAMPLE FAR *JSAMPROW; /* ptr to one image row of pixel samples. */
-typedef JSAMPROW *JSAMPARRAY; /* ptr to some rows (a 2-D sample array) */
-typedef JSAMPARRAY *JSAMPIMAGE; /* a 3-D sample array: top index is color */
+typedef JSAMPLE FAR *JSAMPROW; /* ptr to one image row of pixel samples. */
+typedef JSAMPROW *JSAMPARRAY; /* ptr to some rows (a 2-D sample array) */
+typedef JSAMPARRAY *JSAMPIMAGE; /* a 3-D sample array: top index is color */
-typedef JCOEF JBLOCK[DCTSIZE2]; /* one block of coefficients */
-typedef JBLOCK FAR *JBLOCKROW; /* pointer to one row of coefficient blocks */
-typedef JBLOCKROW *JBLOCKARRAY; /* a 2-D array of coefficient blocks */
-typedef JBLOCKARRAY *JBLOCKIMAGE; /* a 3-D array of coefficient blocks */
+typedef JCOEF JBLOCK[DCTSIZE2]; /* one block of coefficients */
+typedef JBLOCK FAR *JBLOCKROW; /* pointer to one row of coefficient blocks */
+typedef JBLOCKROW *JBLOCKARRAY; /* a 2-D array of coefficient blocks */
+typedef JBLOCKARRAY *JBLOCKIMAGE; /* a 3-D array of coefficient blocks */
-typedef JCOEF FAR *JCOEFPTR; /* useful in a couple of places */
+typedef JCOEF FAR *JCOEFPTR; /* useful in a couple of places */
/* Types for JPEG compression parameters and working tables. */
@@ -97,111 +97,111 @@ typedef JCOEF FAR *JCOEFPTR; /* useful in a couple of places */
/* DCT coefficient quantization tables. */
typedef struct {
- /* This array gives the coefficient quantizers in natural array order
- * (not the zigzag order in which they are stored in a JPEG DQT marker).
- * CAUTION: IJG versions prior to v6a kept this array in zigzag order.
- */
- UINT16 quantval[DCTSIZE2]; /* quantization step for each coefficient */
- /* This field is used only during compression. It's initialized FALSE when
- * the table is created, and set TRUE when it's been output to the file.
- * You could suppress output of a table by setting this to TRUE.
- * (See jpeg_suppress_tables for an example.)
- */
- boolean sent_table; /* TRUE when table has been output */
+ /* This array gives the coefficient quantizers in natural array order
+ * (not the zigzag order in which they are stored in a JPEG DQT marker).
+ * CAUTION: IJG versions prior to v6a kept this array in zigzag order.
+ */
+ UINT16 quantval[DCTSIZE2]; /* quantization step for each coefficient */
+ /* This field is used only during compression. It's initialized FALSE when
+ * the table is created, and set TRUE when it's been output to the file.
+ * You could suppress output of a table by setting this to TRUE.
+ * (See jpeg_suppress_tables for an example.)
+ */
+ boolean sent_table; /* TRUE when table has been output */
} JQUANT_TBL;
/* Huffman coding tables. */
typedef struct {
- /* These two fields directly represent the contents of a JPEG DHT marker */
- UINT8 bits[17]; /* bits[k] = # of symbols with codes of */
+ /* These two fields directly represent the contents of a JPEG DHT marker */
+ UINT8 bits[17]; /* bits[k] = # of symbols with codes of */
/* length k bits; bits[0] is unused */
- UINT8 huffval[256]; /* The symbols, in order of incr code length */
- /* This field is used only during compression. It's initialized FALSE when
- * the table is created, and set TRUE when it's been output to the file.
- * You could suppress output of a table by setting this to TRUE.
- * (See jpeg_suppress_tables for an example.)
- */
- boolean sent_table; /* TRUE when table has been output */
+ UINT8 huffval[256]; /* The symbols, in order of incr code length */
+ /* This field is used only during compression. It's initialized FALSE when
+ * the table is created, and set TRUE when it's been output to the file.
+ * You could suppress output of a table by setting this to TRUE.
+ * (See jpeg_suppress_tables for an example.)
+ */
+ boolean sent_table; /* TRUE when table has been output */
} JHUFF_TBL;
/* Basic info about one component (color channel). */
typedef struct {
- /* These values are fixed over the whole image. */
- /* For compression, they must be supplied by parameter setup; */
- /* for decompression, they are read from the SOF marker. */
- int component_id; /* identifier for this component (0..255) */
- int component_index; /* its index in SOF or cinfo->comp_info[] */
- int h_samp_factor; /* horizontal sampling factor (1..4) */
- int v_samp_factor; /* vertical sampling factor (1..4) */
- int quant_tbl_no; /* quantization table selector (0..3) */
- /* These values may vary between scans. */
- /* For compression, they must be supplied by parameter setup; */
- /* for decompression, they are read from the SOS marker. */
- /* The decompressor output side may not use these variables. */
- int dc_tbl_no; /* DC entropy table selector (0..3) */
- int ac_tbl_no; /* AC entropy table selector (0..3) */
-
- /* Remaining fields should be treated as private by applications. */
-
- /* These values are computed during compression or decompression startup: */
- /* Component's size in DCT blocks.
- * Any dummy blocks added to complete an MCU are not counted; therefore
- * these values do not depend on whether a scan is interleaved or not.
- */
- JDIMENSION width_in_blocks;
- JDIMENSION height_in_blocks;
- /* Size of a DCT block in samples,
- * reflecting any scaling we choose to apply during the DCT step.
- * Values from 1 to 16 are supported.
- * Note that different components may receive different DCT scalings.
- */
- int DCT_h_scaled_size;
- int DCT_v_scaled_size;
- /* The downsampled dimensions are the component's actual, unpadded number
- * of samples at the main buffer (preprocessing/compression interface);
- * DCT scaling is included, so
- * downsampled_width = ceil(image_width * Hi/Hmax * DCT_h_scaled_size/DCTSIZE)
- * and similarly for height.
- */
- JDIMENSION downsampled_width; /* actual width in samples */
- JDIMENSION downsampled_height; /* actual height in samples */
- /* This flag is used only for decompression. In cases where some of the
- * components will be ignored (eg grayscale output from YCbCr image),
- * we can skip most computations for the unused components.
- */
- boolean component_needed; /* do we need the value of this component? */
-
- /* These values are computed before starting a scan of the component. */
- /* The decompressor output side may not use these variables. */
- int MCU_width; /* number of blocks per MCU, horizontally */
- int MCU_height; /* number of blocks per MCU, vertically */
- int MCU_blocks; /* MCU_width * MCU_height */
- int MCU_sample_width; /* MCU width in samples: MCU_width * DCT_h_scaled_size */
- int last_col_width; /* # of non-dummy blocks across in last MCU */
- int last_row_height; /* # of non-dummy blocks down in last MCU */
-
- /* Saved quantization table for component; NULL if none yet saved.
- * See jdinput.c comments about the need for this information.
- * This field is currently used only for decompression.
- */
- JQUANT_TBL * quant_table;
-
- /* Private per-component storage for DCT or IDCT subsystem. */
- void * dct_table;
+ /* These values are fixed over the whole image. */
+ /* For compression, they must be supplied by parameter setup; */
+ /* for decompression, they are read from the SOF marker. */
+ int component_id; /* identifier for this component (0..255) */
+ int component_index; /* its index in SOF or cinfo->comp_info[] */
+ int h_samp_factor; /* horizontal sampling factor (1..4) */
+ int v_samp_factor; /* vertical sampling factor (1..4) */
+ int quant_tbl_no; /* quantization table selector (0..3) */
+ /* These values may vary between scans. */
+ /* For compression, they must be supplied by parameter setup; */
+ /* for decompression, they are read from the SOS marker. */
+ /* The decompressor output side may not use these variables. */
+ int dc_tbl_no; /* DC entropy table selector (0..3) */
+ int ac_tbl_no; /* AC entropy table selector (0..3) */
+
+ /* Remaining fields should be treated as private by applications. */
+
+ /* These values are computed during compression or decompression startup: */
+ /* Component's size in DCT blocks.
+ * Any dummy blocks added to complete an MCU are not counted; therefore
+ * these values do not depend on whether a scan is interleaved or not.
+ */
+ JDIMENSION width_in_blocks;
+ JDIMENSION height_in_blocks;
+ /* Size of a DCT block in samples,
+ * reflecting any scaling we choose to apply during the DCT step.
+ * Values from 1 to 16 are supported.
+ * Note that different components may receive different DCT scalings.
+ */
+ int DCT_h_scaled_size;
+ int DCT_v_scaled_size;
+ /* The downsampled dimensions are the component's actual, unpadded number
+ * of samples at the main buffer (preprocessing/compression interface);
+ * DCT scaling is included, so
+ * downsampled_width = ceil(image_width * Hi/Hmax * DCT_h_scaled_size/DCTSIZE)
+ * and similarly for height.
+ */
+ JDIMENSION downsampled_width; /* actual width in samples */
+ JDIMENSION downsampled_height; /* actual height in samples */
+ /* This flag is used only for decompression. In cases where some of the
+ * components will be ignored (eg grayscale output from YCbCr image),
+ * we can skip most computations for the unused components.
+ */
+ boolean component_needed; /* do we need the value of this component? */
+
+ /* These values are computed before starting a scan of the component. */
+ /* The decompressor output side may not use these variables. */
+ int MCU_width; /* number of blocks per MCU, horizontally */
+ int MCU_height; /* number of blocks per MCU, vertically */
+ int MCU_blocks; /* MCU_width * MCU_height */
+ int MCU_sample_width; /* MCU width in samples: MCU_width * DCT_h_scaled_size */
+ int last_col_width; /* # of non-dummy blocks across in last MCU */
+ int last_row_height; /* # of non-dummy blocks down in last MCU */
+
+ /* Saved quantization table for component; NULL if none yet saved.
+ * See jdinput.c comments about the need for this information.
+ * This field is currently used only for decompression.
+ */
+ JQUANT_TBL * quant_table;
+
+ /* Private per-component storage for DCT or IDCT subsystem. */
+ void * dct_table;
} jpeg_component_info;
/* The script for encoding a multiple-scan file is an array of these: */
typedef struct {
- int comps_in_scan; /* number of components encoded in this scan */
- int component_index[MAX_COMPS_IN_SCAN]; /* their SOF/comp_info[] indexes */
- int Ss, Se; /* progressive JPEG spectral selection parms */
- int Ah, Al; /* progressive JPEG successive approx. parms */
+ int comps_in_scan; /* number of components encoded in this scan */
+ int component_index[MAX_COMPS_IN_SCAN]; /* their SOF/comp_info[] indexes */
+ int Ss, Se; /* progressive JPEG spectral selection parms */
+ int Ah, Al; /* progressive JPEG successive approx. parms */
} jpeg_scan_info;
/* The decompressor can save APPn and COM markers in a list of these: */
@@ -209,69 +209,69 @@ typedef struct {
typedef struct jpeg_marker_struct FAR * jpeg_saved_marker_ptr;
struct jpeg_marker_struct {
- jpeg_saved_marker_ptr next; /* next in list, or NULL */
- UINT8 marker; /* marker code: JPEG_COM, or JPEG_APP0+n */
- unsigned int original_length; /* # bytes of data in the file */
- unsigned int data_length; /* # bytes of data saved at data[] */
- JOCTET FAR * data; /* the data contained in the marker */
- /* the marker length word is not counted in data_length or original_length */
+ jpeg_saved_marker_ptr next; /* next in list, or NULL */
+ UINT8 marker; /* marker code: JPEG_COM, or JPEG_APP0+n */
+ unsigned int original_length; /* # bytes of data in the file */
+ unsigned int data_length; /* # bytes of data saved at data[] */
+ JOCTET FAR * data; /* the data contained in the marker */
+ /* the marker length word is not counted in data_length or original_length */
};
/* Known color spaces. */
typedef enum {
- JCS_UNKNOWN, /* error/unspecified */
- JCS_GRAYSCALE, /* monochrome */
- JCS_RGB, /* red/green/blue */
- JCS_YCbCr, /* Y/Cb/Cr (also known as YUV) */
- JCS_CMYK, /* C/M/Y/K */
- JCS_YCCK /* Y/Cb/Cr/K */
+ JCS_UNKNOWN, /* error/unspecified */
+ JCS_GRAYSCALE, /* monochrome */
+ JCS_RGB, /* red/green/blue */
+ JCS_YCbCr, /* Y/Cb/Cr (also known as YUV) */
+ JCS_CMYK, /* C/M/Y/K */
+ JCS_YCCK /* Y/Cb/Cr/K */
} J_COLOR_SPACE;
/* DCT/IDCT algorithm options. */
typedef enum {
- JDCT_ISLOW, /* slow but accurate integer algorithm */
- JDCT_IFAST, /* faster, less accurate integer method */
- JDCT_FLOAT /* floating-point: accurate, fast on fast HW */
+ JDCT_ISLOW, /* slow but accurate integer algorithm */
+ JDCT_IFAST, /* faster, less accurate integer method */
+ JDCT_FLOAT /* floating-point: accurate, fast on fast HW */
} J_DCT_METHOD;
-#ifndef JDCT_DEFAULT /* may be overridden in jconfig.h */
+#ifndef JDCT_DEFAULT /* may be overridden in jconfig.h */
#define JDCT_DEFAULT JDCT_ISLOW
#endif
-#ifndef JDCT_FASTEST /* may be overridden in jconfig.h */
+#ifndef JDCT_FASTEST /* may be overridden in jconfig.h */
#define JDCT_FASTEST JDCT_IFAST
#endif
/* Dithering options for decompression. */
typedef enum {
- JDITHER_NONE, /* no dithering */
- JDITHER_ORDERED, /* simple ordered dither */
- JDITHER_FS /* Floyd-Steinberg error diffusion dither */
+ JDITHER_NONE, /* no dithering */
+ JDITHER_ORDERED, /* simple ordered dither */
+ JDITHER_FS /* Floyd-Steinberg error diffusion dither */
} J_DITHER_MODE;
/* Common fields between JPEG compression and decompression master structs. */
#define jpeg_common_fields \
- struct jpeg_error_mgr * err; /* Error handler module */\
- struct jpeg_memory_mgr * mem; /* Memory manager module */\
- struct jpeg_progress_mgr * progress; /* Progress monitor, or NULL if none */\
- void * client_data; /* Available for use by application */\
- boolean is_decompressor; /* So common code can tell which is which */\
- int global_state /* For checking call sequence validity */
+ struct jpeg_error_mgr * err; /* Error handler module */\
+ struct jpeg_memory_mgr * mem; /* Memory manager module */\
+ struct jpeg_progress_mgr * progress; /* Progress monitor, or NULL if none */\
+ void * client_data; /* Available for use by application */\
+ boolean is_decompressor; /* So common code can tell which is which */\
+ int global_state /* For checking call sequence validity */
/* Routines that are to be used by both halves of the library are declared
* to receive a pointer to this structure. There are no actual instances of
* jpeg_common_struct, only of jpeg_compress_struct and jpeg_decompress_struct.
*/
struct jpeg_common_struct {
- jpeg_common_fields; /* Fields common to both master struct types */
- /* Additional fields follow in an actual jpeg_compress_struct or
- * jpeg_decompress_struct. All three structs must agree on these
- * initial fields! (This would be a lot cleaner in C++.)
- */
+ jpeg_common_fields; /* Fields common to both master struct types */
+ /* Additional fields follow in an actual jpeg_compress_struct or
+ * jpeg_decompress_struct. All three structs must agree on these
+ * initial fields! (This would be a lot cleaner in C++.)
+ */
};
typedef struct jpeg_common_struct * j_common_ptr;
@@ -282,397 +282,397 @@ typedef struct jpeg_decompress_struct * j_decompress_ptr;
/* Master record for a compression instance */
struct jpeg_compress_struct {
- jpeg_common_fields; /* Fields shared with jpeg_decompress_struct */
-
- /* Destination for compressed data */
- struct jpeg_destination_mgr * dest;
-
- /* Description of source image --- these fields must be filled in by
- * outer application before starting compression. in_color_space must
- * be correct before you can even call jpeg_set_defaults().
- */
-
- JDIMENSION image_width; /* input image width */
- JDIMENSION image_height; /* input image height */
- int input_components; /* # of color components in input image */
- J_COLOR_SPACE in_color_space; /* colorspace of input image */
-
- double input_gamma; /* image gamma of input image */
-
- /* Compression parameters --- these fields must be set before calling
- * jpeg_start_compress(). We recommend calling jpeg_set_defaults() to
- * initialize everything to reasonable defaults, then changing anything
- * the application specifically wants to change. That way you won't get
- * burnt when new parameters are added. Also note that there are several
- * helper routines to simplify changing parameters.
- */
-
- unsigned int scale_num, scale_denom; /* fraction by which to scale image */
-
- JDIMENSION jpeg_width; /* scaled JPEG image width */
- JDIMENSION jpeg_height; /* scaled JPEG image height */
- /* Dimensions of actual JPEG image that will be written to file,
- * derived from input dimensions by scaling factors above.
- * These fields are computed by jpeg_start_compress().
- * You can also use jpeg_calc_jpeg_dimensions() to determine these values
- * in advance of calling jpeg_start_compress().
- */
-
- int data_precision; /* bits of precision in image data */
-
- int num_components; /* # of color components in JPEG image */
- J_COLOR_SPACE jpeg_color_space; /* colorspace of JPEG image */
-
- jpeg_component_info * comp_info;
- /* comp_info[i] describes component that appears i'th in SOF */
-
- JQUANT_TBL * quant_tbl_ptrs[NUM_QUANT_TBLS];
- int q_scale_factor[NUM_QUANT_TBLS];
- /* ptrs to coefficient quantization tables, or NULL if not defined,
- * and corresponding scale factors (percentage, initialized 100).
- */
-
- JHUFF_TBL * dc_huff_tbl_ptrs[NUM_HUFF_TBLS];
- JHUFF_TBL * ac_huff_tbl_ptrs[NUM_HUFF_TBLS];
- /* ptrs to Huffman coding tables, or NULL if not defined */
-
- UINT8 arith_dc_L[NUM_ARITH_TBLS]; /* L values for DC arith-coding tables */
- UINT8 arith_dc_U[NUM_ARITH_TBLS]; /* U values for DC arith-coding tables */
- UINT8 arith_ac_K[NUM_ARITH_TBLS]; /* Kx values for AC arith-coding tables */
-
- int num_scans; /* # of entries in scan_info array */
- const jpeg_scan_info * scan_info; /* script for multi-scan file, or NULL */
- /* The default value of scan_info is NULL, which causes a single-scan
- * sequential JPEG file to be emitted. To create a multi-scan file,
- * set num_scans and scan_info to point to an array of scan definitions.
- */
-
- boolean raw_data_in; /* TRUE=caller supplies downsampled data */
- boolean arith_code; /* TRUE=arithmetic coding, FALSE=Huffman */
- boolean optimize_coding; /* TRUE=optimize entropy encoding parms */
- boolean CCIR601_sampling; /* TRUE=first samples are cosited */
- boolean do_fancy_downsampling; /* TRUE=apply fancy downsampling */
- int smoothing_factor; /* 1..100, or 0 for no input smoothing */
- J_DCT_METHOD dct_method; /* DCT algorithm selector */
-
- /* The restart interval can be specified in absolute MCUs by setting
- * restart_interval, or in MCU rows by setting restart_in_rows
- * (in which case the correct restart_interval will be figured
- * for each scan).
- */
- unsigned int restart_interval; /* MCUs per restart, or 0 for no restart */
- int restart_in_rows; /* if > 0, MCU rows per restart interval */
-
- /* Parameters controlling emission of special markers. */
-
- boolean write_JFIF_header; /* should a JFIF marker be written? */
- UINT8 JFIF_major_version; /* What to write for the JFIF version number */
- UINT8 JFIF_minor_version;
- /* These three values are not used by the JPEG code, merely copied */
- /* into the JFIF APP0 marker. density_unit can be 0 for unknown, */
- /* 1 for dots/inch, or 2 for dots/cm. Note that the pixel aspect */
- /* ratio is defined by X_density/Y_density even when density_unit=0. */
- UINT8 density_unit; /* JFIF code for pixel size units */
- UINT16 X_density; /* Horizontal pixel density */
- UINT16 Y_density; /* Vertical pixel density */
- boolean write_Adobe_marker; /* should an Adobe marker be written? */
-
- /* State variable: index of next scanline to be written to
- * jpeg_write_scanlines(). Application may use this to control its
- * processing loop, e.g., "while (next_scanline < image_height)".
- */
-
- JDIMENSION next_scanline; /* 0 .. image_height-1 */
-
- /* Remaining fields are known throughout compressor, but generally
- * should not be touched by a surrounding application.
- */
-
- /*
- * These fields are computed during compression startup
- */
- boolean progressive_mode; /* TRUE if scan script uses progressive mode */
- int max_h_samp_factor; /* largest h_samp_factor */
- int max_v_samp_factor; /* largest v_samp_factor */
-
- int min_DCT_h_scaled_size; /* smallest DCT_h_scaled_size of any component */
- int min_DCT_v_scaled_size; /* smallest DCT_v_scaled_size of any component */
-
- JDIMENSION total_iMCU_rows; /* # of iMCU rows to be input to coef ctlr */
- /* The coefficient controller receives data in units of MCU rows as defined
- * for fully interleaved scans (whether the JPEG file is interleaved or not).
- * There are v_samp_factor * DCTSIZE sample rows of each component in an
- * "iMCU" (interleaved MCU) row.
- */
-
- /*
- * These fields are valid during any one scan.
- * They describe the components and MCUs actually appearing in the scan.
- */
- int comps_in_scan; /* # of JPEG components in this scan */
- jpeg_component_info * cur_comp_info[MAX_COMPS_IN_SCAN];
- /* *cur_comp_info[i] describes component that appears i'th in SOS */
-
- JDIMENSION MCUs_per_row; /* # of MCUs across the image */
- JDIMENSION MCU_rows_in_scan; /* # of MCU rows in the image */
-
- int blocks_in_MCU; /* # of DCT blocks per MCU */
- int MCU_membership[C_MAX_BLOCKS_IN_MCU];
- /* MCU_membership[i] is index in cur_comp_info of component owning */
- /* i'th block in an MCU */
-
- int Ss, Se, Ah, Al; /* progressive JPEG parameters for scan */
-
- int block_size; /* the basic DCT block size: 1..16 */
- const int * natural_order; /* natural-order position array */
- int lim_Se; /* min( Se, DCTSIZE2-1 ) */
-
- /*
- * Links to compression subobjects (methods and private variables of modules)
- */
- struct jpeg_comp_master * master;
- struct jpeg_c_main_controller * main;
- struct jpeg_c_prep_controller * prep;
- struct jpeg_c_coef_controller * coef;
- struct jpeg_marker_writer * marker;
- struct jpeg_color_converter * cconvert;
- struct jpeg_downsampler * downsample;
- struct jpeg_forward_dct * fdct;
- struct jpeg_entropy_encoder * entropy;
- jpeg_scan_info * script_space; /* workspace for jpeg_simple_progression */
- int script_space_size;
+ jpeg_common_fields; /* Fields shared with jpeg_decompress_struct */
+
+ /* Destination for compressed data */
+ struct jpeg_destination_mgr * dest;
+
+ /* Description of source image --- these fields must be filled in by
+ * outer application before starting compression. in_color_space must
+ * be correct before you can even call jpeg_set_defaults().
+ */
+
+ JDIMENSION image_width; /* input image width */
+ JDIMENSION image_height; /* input image height */
+ int input_components; /* # of color components in input image */
+ J_COLOR_SPACE in_color_space; /* colorspace of input image */
+
+ double input_gamma; /* image gamma of input image */
+
+ /* Compression parameters --- these fields must be set before calling
+ * jpeg_start_compress(). We recommend calling jpeg_set_defaults() to
+ * initialize everything to reasonable defaults, then changing anything
+ * the application specifically wants to change. That way you won't get
+ * burnt when new parameters are added. Also note that there are several
+ * helper routines to simplify changing parameters.
+ */
+
+ unsigned int scale_num, scale_denom; /* fraction by which to scale image */
+
+ JDIMENSION jpeg_width; /* scaled JPEG image width */
+ JDIMENSION jpeg_height; /* scaled JPEG image height */
+ /* Dimensions of actual JPEG image that will be written to file,
+ * derived from input dimensions by scaling factors above.
+ * These fields are computed by jpeg_start_compress().
+ * You can also use jpeg_calc_jpeg_dimensions() to determine these values
+ * in advance of calling jpeg_start_compress().
+ */
+
+ int data_precision; /* bits of precision in image data */
+
+ int num_components; /* # of color components in JPEG image */
+ J_COLOR_SPACE jpeg_color_space; /* colorspace of JPEG image */
+
+ jpeg_component_info * comp_info;
+ /* comp_info[i] describes component that appears i'th in SOF */
+
+ JQUANT_TBL * quant_tbl_ptrs[NUM_QUANT_TBLS];
+ int q_scale_factor[NUM_QUANT_TBLS];
+ /* ptrs to coefficient quantization tables, or NULL if not defined,
+ * and corresponding scale factors (percentage, initialized 100).
+ */
+
+ JHUFF_TBL * dc_huff_tbl_ptrs[NUM_HUFF_TBLS];
+ JHUFF_TBL * ac_huff_tbl_ptrs[NUM_HUFF_TBLS];
+ /* ptrs to Huffman coding tables, or NULL if not defined */
+
+ UINT8 arith_dc_L[NUM_ARITH_TBLS]; /* L values for DC arith-coding tables */
+ UINT8 arith_dc_U[NUM_ARITH_TBLS]; /* U values for DC arith-coding tables */
+ UINT8 arith_ac_K[NUM_ARITH_TBLS]; /* Kx values for AC arith-coding tables */
+
+ int num_scans; /* # of entries in scan_info array */
+ const jpeg_scan_info * scan_info; /* script for multi-scan file, or NULL */
+ /* The default value of scan_info is NULL, which causes a single-scan
+ * sequential JPEG file to be emitted. To create a multi-scan file,
+ * set num_scans and scan_info to point to an array of scan definitions.
+ */
+
+ boolean raw_data_in; /* TRUE=caller supplies downsampled data */
+ boolean arith_code; /* TRUE=arithmetic coding, FALSE=Huffman */
+ boolean optimize_coding; /* TRUE=optimize entropy encoding parms */
+ boolean CCIR601_sampling; /* TRUE=first samples are cosited */
+ boolean do_fancy_downsampling; /* TRUE=apply fancy downsampling */
+ int smoothing_factor; /* 1..100, or 0 for no input smoothing */
+ J_DCT_METHOD dct_method; /* DCT algorithm selector */
+
+ /* The restart interval can be specified in absolute MCUs by setting
+ * restart_interval, or in MCU rows by setting restart_in_rows
+ * (in which case the correct restart_interval will be figured
+ * for each scan).
+ */
+ unsigned int restart_interval; /* MCUs per restart, or 0 for no restart */
+ int restart_in_rows; /* if > 0, MCU rows per restart interval */
+
+ /* Parameters controlling emission of special markers. */
+
+ boolean write_JFIF_header; /* should a JFIF marker be written? */
+ UINT8 JFIF_major_version; /* What to write for the JFIF version number */
+ UINT8 JFIF_minor_version;
+ /* These three values are not used by the JPEG code, merely copied */
+ /* into the JFIF APP0 marker. density_unit can be 0 for unknown, */
+ /* 1 for dots/inch, or 2 for dots/cm. Note that the pixel aspect */
+ /* ratio is defined by X_density/Y_density even when density_unit=0. */
+ UINT8 density_unit; /* JFIF code for pixel size units */
+ UINT16 X_density; /* Horizontal pixel density */
+ UINT16 Y_density; /* Vertical pixel density */
+ boolean write_Adobe_marker; /* should an Adobe marker be written? */
+
+ /* State variable: index of next scanline to be written to
+ * jpeg_write_scanlines(). Application may use this to control its
+ * processing loop, e.g., "while (next_scanline < image_height)".
+ */
+
+ JDIMENSION next_scanline; /* 0 .. image_height-1 */
+
+ /* Remaining fields are known throughout compressor, but generally
+ * should not be touched by a surrounding application.
+ */
+
+ /*
+ * These fields are computed during compression startup
+ */
+ boolean progressive_mode; /* TRUE if scan script uses progressive mode */
+ int max_h_samp_factor; /* largest h_samp_factor */
+ int max_v_samp_factor; /* largest v_samp_factor */
+
+ int min_DCT_h_scaled_size; /* smallest DCT_h_scaled_size of any component */
+ int min_DCT_v_scaled_size; /* smallest DCT_v_scaled_size of any component */
+
+ JDIMENSION total_iMCU_rows; /* # of iMCU rows to be input to coef ctlr */
+ /* The coefficient controller receives data in units of MCU rows as defined
+ * for fully interleaved scans (whether the JPEG file is interleaved or not).
+ * There are v_samp_factor * DCTSIZE sample rows of each component in an
+ * "iMCU" (interleaved MCU) row.
+ */
+
+ /*
+ * These fields are valid during any one scan.
+ * They describe the components and MCUs actually appearing in the scan.
+ */
+ int comps_in_scan; /* # of JPEG components in this scan */
+ jpeg_component_info * cur_comp_info[MAX_COMPS_IN_SCAN];
+ /* *cur_comp_info[i] describes component that appears i'th in SOS */
+
+ JDIMENSION MCUs_per_row; /* # of MCUs across the image */
+ JDIMENSION MCU_rows_in_scan; /* # of MCU rows in the image */
+
+ int blocks_in_MCU; /* # of DCT blocks per MCU */
+ int MCU_membership[C_MAX_BLOCKS_IN_MCU];
+ /* MCU_membership[i] is index in cur_comp_info of component owning */
+ /* i'th block in an MCU */
+
+ int Ss, Se, Ah, Al; /* progressive JPEG parameters for scan */
+
+ int block_size; /* the basic DCT block size: 1..16 */
+ const int * natural_order; /* natural-order position array */
+ int lim_Se; /* min( Se, DCTSIZE2-1 ) */
+
+ /*
+ * Links to compression subobjects (methods and private variables of modules)
+ */
+ struct jpeg_comp_master * master;
+ struct jpeg_c_main_controller * main;
+ struct jpeg_c_prep_controller * prep;
+ struct jpeg_c_coef_controller * coef;
+ struct jpeg_marker_writer * marker;
+ struct jpeg_color_converter * cconvert;
+ struct jpeg_downsampler * downsample;
+ struct jpeg_forward_dct * fdct;
+ struct jpeg_entropy_encoder * entropy;
+ jpeg_scan_info * script_space; /* workspace for jpeg_simple_progression */
+ int script_space_size;
};
/* Master record for a decompression instance */
struct jpeg_decompress_struct {
- jpeg_common_fields; /* Fields shared with jpeg_compress_struct */
-
- /* Source of compressed data */
- struct jpeg_source_mgr * src;
-
- /* Basic description of image --- filled in by jpeg_read_header(). */
- /* Application may inspect these values to decide how to process image. */
-
- JDIMENSION image_width; /* nominal image width (from SOF marker) */
- JDIMENSION image_height; /* nominal image height */
- int num_components; /* # of color components in JPEG image */
- J_COLOR_SPACE jpeg_color_space; /* colorspace of JPEG image */
-
- /* Decompression processing parameters --- these fields must be set before
- * calling jpeg_start_decompress(). Note that jpeg_read_header() initializes
- * them to default values.
- */
-
- J_COLOR_SPACE out_color_space; /* colorspace for output */
-
- unsigned int scale_num, scale_denom; /* fraction by which to scale image */
-
- double output_gamma; /* image gamma wanted in output */
-
- boolean buffered_image; /* TRUE=multiple output passes */
- boolean raw_data_out; /* TRUE=downsampled data wanted */
-
- J_DCT_METHOD dct_method; /* IDCT algorithm selector */
- boolean do_fancy_upsampling; /* TRUE=apply fancy upsampling */
- boolean do_block_smoothing; /* TRUE=apply interblock smoothing */
-
- boolean quantize_colors; /* TRUE=colormapped output wanted */
- /* the following are ignored if not quantize_colors: */
- J_DITHER_MODE dither_mode; /* type of color dithering to use */
- boolean two_pass_quantize; /* TRUE=use two-pass color quantization */
- int desired_number_of_colors; /* max # colors to use in created colormap */
- /* these are significant only in buffered-image mode: */
- boolean enable_1pass_quant; /* enable future use of 1-pass quantizer */
- boolean enable_external_quant;/* enable future use of external colormap */
- boolean enable_2pass_quant; /* enable future use of 2-pass quantizer */
-
- /* Description of actual output image that will be returned to application.
- * These fields are computed by jpeg_start_decompress().
- * You can also use jpeg_calc_output_dimensions() to determine these values
- * in advance of calling jpeg_start_decompress().
- */
-
- JDIMENSION output_width; /* scaled image width */
- JDIMENSION output_height; /* scaled image height */
- int out_color_components; /* # of color components in out_color_space */
- int output_components; /* # of color components returned */
- /* output_components is 1 (a colormap index) when quantizing colors;
- * otherwise it equals out_color_components.
- */
- int rec_outbuf_height; /* min recommended height of scanline buffer */
- /* If the buffer passed to jpeg_read_scanlines() is less than this many rows
- * high, space and time will be wasted due to unnecessary data copying.
- * Usually rec_outbuf_height will be 1 or 2, at most 4.
- */
-
- /* When quantizing colors, the output colormap is described by these fields.
- * The application can supply a colormap by setting colormap non-NULL before
- * calling jpeg_start_decompress; otherwise a colormap is created during
- * jpeg_start_decompress or jpeg_start_output.
- * The map has out_color_components rows and actual_number_of_colors columns.
- */
- int actual_number_of_colors; /* number of entries in use */
- JSAMPARRAY colormap; /* The color map as a 2-D pixel array */
-
- /* State variables: these variables indicate the progress of decompression.
- * The application may examine these but must not modify them.
- */
-
- /* Row index of next scanline to be read from jpeg_read_scanlines().
- * Application may use this to control its processing loop, e.g.,
- * "while (output_scanline < output_height)".
- */
- JDIMENSION output_scanline; /* 0 .. output_height-1 */
-
- /* Current input scan number and number of iMCU rows completed in scan.
- * These indicate the progress of the decompressor input side.
- */
- int input_scan_number; /* Number of SOS markers seen so far */
- JDIMENSION input_iMCU_row; /* Number of iMCU rows completed */
-
- /* The "output scan number" is the notional scan being displayed by the
- * output side. The decompressor will not allow output scan/row number
- * to get ahead of input scan/row, but it can fall arbitrarily far behind.
- */
- int output_scan_number; /* Nominal scan number being displayed */
- JDIMENSION output_iMCU_row; /* Number of iMCU rows read */
-
- /* Current progression status. coef_bits[c][i] indicates the precision
- * with which component c's DCT coefficient i (in zigzag order) is known.
- * It is -1 when no data has yet been received, otherwise it is the point
- * transform (shift) value for the most recent scan of the coefficient
- * (thus, 0 at completion of the progression).
- * This pointer is NULL when reading a non-progressive file.
- */
- int (*coef_bits)[DCTSIZE2]; /* -1 or current Al value for each coef */
-
- /* Internal JPEG parameters --- the application usually need not look at
- * these fields. Note that the decompressor output side may not use
- * any parameters that can change between scans.
- */
-
- /* Quantization and Huffman tables are carried forward across input
- * datastreams when processing abbreviated JPEG datastreams.
- */
-
- JQUANT_TBL * quant_tbl_ptrs[NUM_QUANT_TBLS];
- /* ptrs to coefficient quantization tables, or NULL if not defined */
-
- JHUFF_TBL * dc_huff_tbl_ptrs[NUM_HUFF_TBLS];
- JHUFF_TBL * ac_huff_tbl_ptrs[NUM_HUFF_TBLS];
- /* ptrs to Huffman coding tables, or NULL if not defined */
-
- /* These parameters are never carried across datastreams, since they
- * are given in SOF/SOS markers or defined to be reset by SOI.
- */
-
- int data_precision; /* bits of precision in image data */
-
- jpeg_component_info * comp_info;
- /* comp_info[i] describes component that appears i'th in SOF */
-
- boolean is_baseline; /* TRUE if Baseline SOF0 encountered */
- boolean progressive_mode; /* TRUE if SOFn specifies progressive mode */
- boolean arith_code; /* TRUE=arithmetic coding, FALSE=Huffman */
-
- UINT8 arith_dc_L[NUM_ARITH_TBLS]; /* L values for DC arith-coding tables */
- UINT8 arith_dc_U[NUM_ARITH_TBLS]; /* U values for DC arith-coding tables */
- UINT8 arith_ac_K[NUM_ARITH_TBLS]; /* Kx values for AC arith-coding tables */
-
- unsigned int restart_interval; /* MCUs per restart interval, or 0 for no restart */
-
- /* These fields record data obtained from optional markers recognized by
- * the JPEG library.
- */
- boolean saw_JFIF_marker; /* TRUE iff a JFIF APP0 marker was found */
- /* Data copied from JFIF marker; only valid if saw_JFIF_marker is TRUE: */
- UINT8 JFIF_major_version; /* JFIF version number */
- UINT8 JFIF_minor_version;
- UINT8 density_unit; /* JFIF code for pixel size units */
- UINT16 X_density; /* Horizontal pixel density */
- UINT16 Y_density; /* Vertical pixel density */
- boolean saw_Adobe_marker; /* TRUE iff an Adobe APP14 marker was found */
- UINT8 Adobe_transform; /* Color transform code from Adobe marker */
-
- boolean CCIR601_sampling; /* TRUE=first samples are cosited */
-
- /* Aside from the specific data retained from APPn markers known to the
- * library, the uninterpreted contents of any or all APPn and COM markers
- * can be saved in a list for examination by the application.
- */
- jpeg_saved_marker_ptr marker_list; /* Head of list of saved markers */
-
- /* Remaining fields are known throughout decompressor, but generally
- * should not be touched by a surrounding application.
- */
-
- /*
- * These fields are computed during decompression startup
- */
- int max_h_samp_factor; /* largest h_samp_factor */
- int max_v_samp_factor; /* largest v_samp_factor */
-
- int min_DCT_h_scaled_size; /* smallest DCT_h_scaled_size of any component */
- int min_DCT_v_scaled_size; /* smallest DCT_v_scaled_size of any component */
-
- JDIMENSION total_iMCU_rows; /* # of iMCU rows in image */
- /* The coefficient controller's input and output progress is measured in
- * units of "iMCU" (interleaved MCU) rows. These are the same as MCU rows
- * in fully interleaved JPEG scans, but are used whether the scan is
- * interleaved or not. We define an iMCU row as v_samp_factor DCT block
- * rows of each component. Therefore, the IDCT output contains
- * v_samp_factor*DCT_v_scaled_size sample rows of a component per iMCU row.
- */
-
- JSAMPLE * sample_range_limit; /* table for fast range-limiting */
-
- /*
- * These fields are valid during any one scan.
- * They describe the components and MCUs actually appearing in the scan.
- * Note that the decompressor output side must not use these fields.
- */
- int comps_in_scan; /* # of JPEG components in this scan */
- jpeg_component_info * cur_comp_info[MAX_COMPS_IN_SCAN];
- /* *cur_comp_info[i] describes component that appears i'th in SOS */
-
- JDIMENSION MCUs_per_row; /* # of MCUs across the image */
- JDIMENSION MCU_rows_in_scan; /* # of MCU rows in the image */
-
- int blocks_in_MCU; /* # of DCT blocks per MCU */
- int MCU_membership[D_MAX_BLOCKS_IN_MCU];
- /* MCU_membership[i] is index in cur_comp_info of component owning */
- /* i'th block in an MCU */
-
- int Ss, Se, Ah, Al; /* progressive JPEG parameters for scan */
-
- /* These fields are derived from Se of first SOS marker.
- */
- int block_size; /* the basic DCT block size: 1..16 */
- const int * natural_order; /* natural-order position array for entropy decode */
- int lim_Se; /* min( Se, DCTSIZE2-1 ) for entropy decode */
-
- /* This field is shared between entropy decoder and marker parser.
- * It is either zero or the code of a JPEG marker that has been
- * read from the data source, but has not yet been processed.
- */
- int unread_marker;
-
- /*
- * Links to decompression subobjects (methods, private variables of modules)
- */
- struct jpeg_decomp_master * master;
- struct jpeg_d_main_controller * main;
- struct jpeg_d_coef_controller * coef;
- struct jpeg_d_post_controller * post;
- struct jpeg_input_controller * inputctl;
- struct jpeg_marker_reader * marker;
- struct jpeg_entropy_decoder * entropy;
- struct jpeg_inverse_dct * idct;
- struct jpeg_upsampler * upsample;
- struct jpeg_color_deconverter * cconvert;
- struct jpeg_color_quantizer * cquantize;
+ jpeg_common_fields; /* Fields shared with jpeg_compress_struct */
+
+ /* Source of compressed data */
+ struct jpeg_source_mgr * src;
+
+ /* Basic description of image --- filled in by jpeg_read_header(). */
+ /* Application may inspect these values to decide how to process image. */
+
+ JDIMENSION image_width; /* nominal image width (from SOF marker) */
+ JDIMENSION image_height; /* nominal image height */
+ int num_components; /* # of color components in JPEG image */
+ J_COLOR_SPACE jpeg_color_space; /* colorspace of JPEG image */
+
+ /* Decompression processing parameters --- these fields must be set before
+ * calling jpeg_start_decompress(). Note that jpeg_read_header() initializes
+ * them to default values.
+ */
+
+ J_COLOR_SPACE out_color_space; /* colorspace for output */
+
+ unsigned int scale_num, scale_denom; /* fraction by which to scale image */
+
+ double output_gamma; /* image gamma wanted in output */
+
+ boolean buffered_image; /* TRUE=multiple output passes */
+ boolean raw_data_out; /* TRUE=downsampled data wanted */
+
+ J_DCT_METHOD dct_method; /* IDCT algorithm selector */
+ boolean do_fancy_upsampling; /* TRUE=apply fancy upsampling */
+ boolean do_block_smoothing; /* TRUE=apply interblock smoothing */
+
+ boolean quantize_colors; /* TRUE=colormapped output wanted */
+ /* the following are ignored if not quantize_colors: */
+ J_DITHER_MODE dither_mode; /* type of color dithering to use */
+ boolean two_pass_quantize; /* TRUE=use two-pass color quantization */
+ int desired_number_of_colors; /* max # colors to use in created colormap */
+ /* these are significant only in buffered-image mode: */
+ boolean enable_1pass_quant; /* enable future use of 1-pass quantizer */
+ boolean enable_external_quant;/* enable future use of external colormap */
+ boolean enable_2pass_quant; /* enable future use of 2-pass quantizer */
+
+ /* Description of actual output image that will be returned to application.
+ * These fields are computed by jpeg_start_decompress().
+ * You can also use jpeg_calc_output_dimensions() to determine these values
+ * in advance of calling jpeg_start_decompress().
+ */
+
+ JDIMENSION output_width; /* scaled image width */
+ JDIMENSION output_height; /* scaled image height */
+ int out_color_components; /* # of color components in out_color_space */
+ int output_components; /* # of color components returned */
+ /* output_components is 1 (a colormap index) when quantizing colors;
+ * otherwise it equals out_color_components.
+ */
+ int rec_outbuf_height; /* min recommended height of scanline buffer */
+ /* If the buffer passed to jpeg_read_scanlines() is less than this many rows
+ * high, space and time will be wasted due to unnecessary data copying.
+ * Usually rec_outbuf_height will be 1 or 2, at most 4.
+ */
+
+ /* When quantizing colors, the output colormap is described by these fields.
+ * The application can supply a colormap by setting colormap non-NULL before
+ * calling jpeg_start_decompress; otherwise a colormap is created during
+ * jpeg_start_decompress or jpeg_start_output.
+ * The map has out_color_components rows and actual_number_of_colors columns.
+ */
+ int actual_number_of_colors; /* number of entries in use */
+ JSAMPARRAY colormap; /* The color map as a 2-D pixel array */
+
+ /* State variables: these variables indicate the progress of decompression.
+ * The application may examine these but must not modify them.
+ */
+
+ /* Row index of next scanline to be read from jpeg_read_scanlines().
+ * Application may use this to control its processing loop, e.g.,
+ * "while (output_scanline < output_height)".
+ */
+ JDIMENSION output_scanline; /* 0 .. output_height-1 */
+
+ /* Current input scan number and number of iMCU rows completed in scan.
+ * These indicate the progress of the decompressor input side.
+ */
+ int input_scan_number; /* Number of SOS markers seen so far */
+ JDIMENSION input_iMCU_row; /* Number of iMCU rows completed */
+
+ /* The "output scan number" is the notional scan being displayed by the
+ * output side. The decompressor will not allow output scan/row number
+ * to get ahead of input scan/row, but it can fall arbitrarily far behind.
+ */
+ int output_scan_number; /* Nominal scan number being displayed */
+ JDIMENSION output_iMCU_row; /* Number of iMCU rows read */
+
+ /* Current progression status. coef_bits[c][i] indicates the precision
+ * with which component c's DCT coefficient i (in zigzag order) is known.
+ * It is -1 when no data has yet been received, otherwise it is the point
+ * transform (shift) value for the most recent scan of the coefficient
+ * (thus, 0 at completion of the progression).
+ * This pointer is NULL when reading a non-progressive file.
+ */
+ int (*coef_bits)[DCTSIZE2]; /* -1 or current Al value for each coef */
+
+ /* Internal JPEG parameters --- the application usually need not look at
+ * these fields. Note that the decompressor output side may not use
+ * any parameters that can change between scans.
+ */
+
+ /* Quantization and Huffman tables are carried forward across input
+ * datastreams when processing abbreviated JPEG datastreams.
+ */
+
+ JQUANT_TBL * quant_tbl_ptrs[NUM_QUANT_TBLS];
+ /* ptrs to coefficient quantization tables, or NULL if not defined */
+
+ JHUFF_TBL * dc_huff_tbl_ptrs[NUM_HUFF_TBLS];
+ JHUFF_TBL * ac_huff_tbl_ptrs[NUM_HUFF_TBLS];
+ /* ptrs to Huffman coding tables, or NULL if not defined */
+
+ /* These parameters are never carried across datastreams, since they
+ * are given in SOF/SOS markers or defined to be reset by SOI.
+ */
+
+ int data_precision; /* bits of precision in image data */
+
+ jpeg_component_info * comp_info;
+ /* comp_info[i] describes component that appears i'th in SOF */
+
+ boolean is_baseline; /* TRUE if Baseline SOF0 encountered */
+ boolean progressive_mode; /* TRUE if SOFn specifies progressive mode */
+ boolean arith_code; /* TRUE=arithmetic coding, FALSE=Huffman */
+
+ UINT8 arith_dc_L[NUM_ARITH_TBLS]; /* L values for DC arith-coding tables */
+ UINT8 arith_dc_U[NUM_ARITH_TBLS]; /* U values for DC arith-coding tables */
+ UINT8 arith_ac_K[NUM_ARITH_TBLS]; /* Kx values for AC arith-coding tables */
+
+ unsigned int restart_interval; /* MCUs per restart interval, or 0 for no restart */
+
+ /* These fields record data obtained from optional markers recognized by
+ * the JPEG library.
+ */
+ boolean saw_JFIF_marker; /* TRUE iff a JFIF APP0 marker was found */
+ /* Data copied from JFIF marker; only valid if saw_JFIF_marker is TRUE: */
+ UINT8 JFIF_major_version; /* JFIF version number */
+ UINT8 JFIF_minor_version;
+ UINT8 density_unit; /* JFIF code for pixel size units */
+ UINT16 X_density; /* Horizontal pixel density */
+ UINT16 Y_density; /* Vertical pixel density */
+ boolean saw_Adobe_marker; /* TRUE iff an Adobe APP14 marker was found */
+ UINT8 Adobe_transform; /* Color transform code from Adobe marker */
+
+ boolean CCIR601_sampling; /* TRUE=first samples are cosited */
+
+ /* Aside from the specific data retained from APPn markers known to the
+ * library, the uninterpreted contents of any or all APPn and COM markers
+ * can be saved in a list for examination by the application.
+ */
+ jpeg_saved_marker_ptr marker_list; /* Head of list of saved markers */
+
+ /* Remaining fields are known throughout decompressor, but generally
+ * should not be touched by a surrounding application.
+ */
+
+ /*
+ * These fields are computed during decompression startup
+ */
+ int max_h_samp_factor; /* largest h_samp_factor */
+ int max_v_samp_factor; /* largest v_samp_factor */
+
+ int min_DCT_h_scaled_size; /* smallest DCT_h_scaled_size of any component */
+ int min_DCT_v_scaled_size; /* smallest DCT_v_scaled_size of any component */
+
+ JDIMENSION total_iMCU_rows; /* # of iMCU rows in image */
+ /* The coefficient controller's input and output progress is measured in
+ * units of "iMCU" (interleaved MCU) rows. These are the same as MCU rows
+ * in fully interleaved JPEG scans, but are used whether the scan is
+ * interleaved or not. We define an iMCU row as v_samp_factor DCT block
+ * rows of each component. Therefore, the IDCT output contains
+ * v_samp_factor*DCT_v_scaled_size sample rows of a component per iMCU row.
+ */
+
+ JSAMPLE * sample_range_limit; /* table for fast range-limiting */
+
+ /*
+ * These fields are valid during any one scan.
+ * They describe the components and MCUs actually appearing in the scan.
+ * Note that the decompressor output side must not use these fields.
+ */
+ int comps_in_scan; /* # of JPEG components in this scan */
+ jpeg_component_info * cur_comp_info[MAX_COMPS_IN_SCAN];
+ /* *cur_comp_info[i] describes component that appears i'th in SOS */
+
+ JDIMENSION MCUs_per_row; /* # of MCUs across the image */
+ JDIMENSION MCU_rows_in_scan; /* # of MCU rows in the image */
+
+ int blocks_in_MCU; /* # of DCT blocks per MCU */
+ int MCU_membership[D_MAX_BLOCKS_IN_MCU];
+ /* MCU_membership[i] is index in cur_comp_info of component owning */
+ /* i'th block in an MCU */
+
+ int Ss, Se, Ah, Al; /* progressive JPEG parameters for scan */
+
+ /* These fields are derived from Se of first SOS marker.
+ */
+ int block_size; /* the basic DCT block size: 1..16 */
+ const int * natural_order; /* natural-order position array for entropy decode */
+ int lim_Se; /* min( Se, DCTSIZE2-1 ) for entropy decode */
+
+ /* This field is shared between entropy decoder and marker parser.
+ * It is either zero or the code of a JPEG marker that has been
+ * read from the data source, but has not yet been processed.
+ */
+ int unread_marker;
+
+ /*
+ * Links to decompression subobjects (methods, private variables of modules)
+ */
+ struct jpeg_decomp_master * master;
+ struct jpeg_d_main_controller * main;
+ struct jpeg_d_coef_controller * coef;
+ struct jpeg_d_post_controller * post;
+ struct jpeg_input_controller * inputctl;
+ struct jpeg_marker_reader * marker;
+ struct jpeg_entropy_decoder * entropy;
+ struct jpeg_inverse_dct * idct;
+ struct jpeg_upsampler * upsample;
+ struct jpeg_color_deconverter * cconvert;
+ struct jpeg_color_quantizer * cquantize;
};
@@ -687,96 +687,96 @@ struct jpeg_decompress_struct {
/* Error handler object */
struct jpeg_error_mgr {
- /* Error exit handler: does not return to caller */
- JMETHOD(void, error_exit, (j_common_ptr cinfo));
- /* Conditionally emit a trace or warning message */
- JMETHOD(void, emit_message, (j_common_ptr cinfo, int msg_level));
- /* Routine that actually outputs a trace or error message */
- JMETHOD(void, output_message, (j_common_ptr cinfo));
- /* Format a message string for the most recent JPEG error or message */
- JMETHOD(void, format_message, (j_common_ptr cinfo, char * buffer));
-#define JMSG_LENGTH_MAX 200 /* recommended size of format_message buffer */
- /* Reset error state variables at start of a new image */
- JMETHOD(void, reset_error_mgr, (j_common_ptr cinfo));
-
- /* The message ID code and any parameters are saved here.
- * A message can have one string parameter or up to 8 int parameters.
- */
- int msg_code;
+ /* Error exit handler: does not return to caller */
+ JMETHOD(void, error_exit, (j_common_ptr cinfo));
+ /* Conditionally emit a trace or warning message */
+ JMETHOD(void, emit_message, (j_common_ptr cinfo, int msg_level));
+ /* Routine that actually outputs a trace or error message */
+ JMETHOD(void, output_message, (j_common_ptr cinfo));
+ /* Format a message string for the most recent JPEG error or message */
+ JMETHOD(void, format_message, (j_common_ptr cinfo, char * buffer));
+#define JMSG_LENGTH_MAX 200 /* recommended size of format_message buffer */
+ /* Reset error state variables at start of a new image */
+ JMETHOD(void, reset_error_mgr, (j_common_ptr cinfo));
+
+ /* The message ID code and any parameters are saved here.
+ * A message can have one string parameter or up to 8 int parameters.
+ */
+ int msg_code;
#define JMSG_STR_PARM_MAX 80
- union {
- int i[8];
- char s[JMSG_STR_PARM_MAX];
- } msg_parm;
-
- /* Standard state variables for error facility */
-
- int trace_level; /* max msg_level that will be displayed */
-
- /* For recoverable corrupt-data errors, we emit a warning message,
- * but keep going unless emit_message chooses to abort. emit_message
- * should count warnings in num_warnings. The surrounding application
- * can check for bad data by seeing if num_warnings is nonzero at the
- * end of processing.
- */
- long num_warnings; /* number of corrupt-data warnings */
-
- /* These fields point to the table(s) of error message strings.
- * An application can change the table pointer to switch to a different
- * message list (typically, to change the language in which errors are
- * reported). Some applications may wish to add additional error codes
- * that will be handled by the JPEG library error mechanism; the second
- * table pointer is used for this purpose.
- *
- * First table includes all errors generated by JPEG library itself.
- * Error code 0 is reserved for a "no such error string" message.
- */
- const char * const * jpeg_message_table; /* Library errors */
- int last_jpeg_message; /* Table contains strings 0..last_jpeg_message */
- /* Second table can be added by application (see cjpeg/djpeg for example).
- * It contains strings numbered first_addon_message..last_addon_message.
- */
- const char * const * addon_message_table; /* Non-library errors */
- int first_addon_message; /* code for first string in addon table */
- int last_addon_message; /* code for last string in addon table */
+ union {
+ int i[8];
+ char s[JMSG_STR_PARM_MAX];
+ } msg_parm;
+
+ /* Standard state variables for error facility */
+
+ int trace_level; /* max msg_level that will be displayed */
+
+ /* For recoverable corrupt-data errors, we emit a warning message,
+ * but keep going unless emit_message chooses to abort. emit_message
+ * should count warnings in num_warnings. The surrounding application
+ * can check for bad data by seeing if num_warnings is nonzero at the
+ * end of processing.
+ */
+ long num_warnings; /* number of corrupt-data warnings */
+
+ /* These fields point to the table(s) of error message strings.
+ * An application can change the table pointer to switch to a different
+ * message list (typically, to change the language in which errors are
+ * reported). Some applications may wish to add additional error codes
+ * that will be handled by the JPEG library error mechanism; the second
+ * table pointer is used for this purpose.
+ *
+ * First table includes all errors generated by JPEG library itself.
+ * Error code 0 is reserved for a "no such error string" message.
+ */
+ const char * const * jpeg_message_table; /* Library errors */
+ int last_jpeg_message; /* Table contains strings 0..last_jpeg_message */
+ /* Second table can be added by application (see cjpeg/djpeg for example).
+ * It contains strings numbered first_addon_message..last_addon_message.
+ */
+ const char * const * addon_message_table; /* Non-library errors */
+ int first_addon_message; /* code for first string in addon table */
+ int last_addon_message; /* code for last string in addon table */
};
/* Progress monitor object */
struct jpeg_progress_mgr {
- JMETHOD(void, progress_monitor, (j_common_ptr cinfo));
+ JMETHOD(void, progress_monitor, (j_common_ptr cinfo));
- long pass_counter; /* work units completed in this pass */
- long pass_limit; /* total number of work units in this pass */
- int completed_passes; /* passes completed so far */
- int total_passes; /* total number of passes expected */
+ long pass_counter; /* work units completed in this pass */
+ long pass_limit; /* total number of work units in this pass */
+ int completed_passes; /* passes completed so far */
+ int total_passes; /* total number of passes expected */
};
/* Data destination object for compression */
struct jpeg_destination_mgr {
- JOCTET * next_output_byte; /* => next byte to write in buffer */
- size_t free_in_buffer; /* # of byte spaces remaining in buffer */
+ JOCTET * next_output_byte; /* => next byte to write in buffer */
+ size_t free_in_buffer; /* # of byte spaces remaining in buffer */
- JMETHOD(void, init_destination, (j_compress_ptr cinfo));
- JMETHOD(boolean, empty_output_buffer, (j_compress_ptr cinfo));
- JMETHOD(void, term_destination, (j_compress_ptr cinfo));
+ JMETHOD(void, init_destination, (j_compress_ptr cinfo));
+ JMETHOD(boolean, empty_output_buffer, (j_compress_ptr cinfo));
+ JMETHOD(void, term_destination, (j_compress_ptr cinfo));
};
/* Data source object for decompression */
struct jpeg_source_mgr {
- const JOCTET * next_input_byte; /* => next byte to read from buffer */
- size_t bytes_in_buffer; /* # of bytes remaining in buffer */
-
- JMETHOD(void, init_source, (j_decompress_ptr cinfo));
- JMETHOD(boolean, fill_input_buffer, (j_decompress_ptr cinfo));
- JMETHOD(void, skip_input_data, (j_decompress_ptr cinfo, long num_bytes));
- JMETHOD(boolean, resync_to_restart, (j_decompress_ptr cinfo, int desired));
- JMETHOD(void, term_source, (j_decompress_ptr cinfo));
+ const JOCTET * next_input_byte; /* => next byte to read from buffer */
+ size_t bytes_in_buffer; /* # of bytes remaining in buffer */
+
+ JMETHOD(void, init_source, (j_decompress_ptr cinfo));
+ JMETHOD(boolean, fill_input_buffer, (j_decompress_ptr cinfo));
+ JMETHOD(void, skip_input_data, (j_decompress_ptr cinfo, long num_bytes));
+ JMETHOD(boolean, resync_to_restart, (j_decompress_ptr cinfo, int desired));
+ JMETHOD(void, term_source, (j_decompress_ptr cinfo));
};
@@ -791,61 +791,61 @@ struct jpeg_source_mgr {
* successful.
*/
-#define JPOOL_PERMANENT 0 /* lasts until master record is destroyed */
-#define JPOOL_IMAGE 1 /* lasts until done with image/datastream */
-#define JPOOL_NUMPOOLS 2
+#define JPOOL_PERMANENT 0 /* lasts until master record is destroyed */
+#define JPOOL_IMAGE 1 /* lasts until done with image/datastream */
+#define JPOOL_NUMPOOLS 2
typedef struct jvirt_sarray_control * jvirt_sarray_ptr;
typedef struct jvirt_barray_control * jvirt_barray_ptr;
struct jpeg_memory_mgr {
- /* Method pointers */
- JMETHOD(void *, alloc_small, (j_common_ptr cinfo, int pool_id,
+ /* Method pointers */
+ JMETHOD(void *, alloc_small, (j_common_ptr cinfo, int pool_id,
size_t sizeofobject));
- JMETHOD(void FAR *, alloc_large, (j_common_ptr cinfo, int pool_id,
- size_t sizeofobject));
- JMETHOD(JSAMPARRAY, alloc_sarray, (j_common_ptr cinfo, int pool_id,
- JDIMENSION samplesperrow,
- JDIMENSION numrows));
- JMETHOD(JBLOCKARRAY, alloc_barray, (j_common_ptr cinfo, int pool_id,
- JDIMENSION blocksperrow,
- JDIMENSION numrows));
- JMETHOD(jvirt_sarray_ptr, request_virt_sarray, (j_common_ptr cinfo,
- int pool_id,
- boolean pre_zero,
- JDIMENSION samplesperrow,
- JDIMENSION numrows,
- JDIMENSION maxaccess));
- JMETHOD(jvirt_barray_ptr, request_virt_barray, (j_common_ptr cinfo,
- int pool_id,
- boolean pre_zero,
- JDIMENSION blocksperrow,
- JDIMENSION numrows,
- JDIMENSION maxaccess));
- JMETHOD(void, realize_virt_arrays, (j_common_ptr cinfo));
- JMETHOD(JSAMPARRAY, access_virt_sarray, (j_common_ptr cinfo,
- jvirt_sarray_ptr ptr,
- JDIMENSION start_row,
- JDIMENSION num_rows,
- boolean writable));
- JMETHOD(JBLOCKARRAY, access_virt_barray, (j_common_ptr cinfo,
- jvirt_barray_ptr ptr,
- JDIMENSION start_row,
- JDIMENSION num_rows,
- boolean writable));
- JMETHOD(void, free_pool, (j_common_ptr cinfo, int pool_id));
- JMETHOD(void, self_destruct, (j_common_ptr cinfo));
-
- /* Limit on memory allocation for this JPEG object. (Note that this is
- * merely advisory, not a guaranteed maximum; it only affects the space
- * used for virtual-array buffers.) May be changed by outer application
- * after creating the JPEG object.
- */
- long max_memory_to_use;
-
- /* Maximum allocation request accepted by alloc_large. */
- long max_alloc_chunk;
+ JMETHOD(void FAR *, alloc_large, (j_common_ptr cinfo, int pool_id,
+ size_t sizeofobject));
+ JMETHOD(JSAMPARRAY, alloc_sarray, (j_common_ptr cinfo, int pool_id,
+ JDIMENSION samplesperrow,
+ JDIMENSION numrows));
+ JMETHOD(JBLOCKARRAY, alloc_barray, (j_common_ptr cinfo, int pool_id,
+ JDIMENSION blocksperrow,
+ JDIMENSION numrows));
+ JMETHOD(jvirt_sarray_ptr, request_virt_sarray, (j_common_ptr cinfo,
+ int pool_id,
+ boolean pre_zero,
+ JDIMENSION samplesperrow,
+ JDIMENSION numrows,
+ JDIMENSION maxaccess));
+ JMETHOD(jvirt_barray_ptr, request_virt_barray, (j_common_ptr cinfo,
+ int pool_id,
+ boolean pre_zero,
+ JDIMENSION blocksperrow,
+ JDIMENSION numrows,
+ JDIMENSION maxaccess));
+ JMETHOD(void, realize_virt_arrays, (j_common_ptr cinfo));
+ JMETHOD(JSAMPARRAY, access_virt_sarray, (j_common_ptr cinfo,
+ jvirt_sarray_ptr ptr,
+ JDIMENSION start_row,
+ JDIMENSION num_rows,
+ boolean writable));
+ JMETHOD(JBLOCKARRAY, access_virt_barray, (j_common_ptr cinfo,
+ jvirt_barray_ptr ptr,
+ JDIMENSION start_row,
+ JDIMENSION num_rows,
+ boolean writable));
+ JMETHOD(void, free_pool, (j_common_ptr cinfo, int pool_id));
+ JMETHOD(void, self_destruct, (j_common_ptr cinfo));
+
+ /* Limit on memory allocation for this JPEG object. (Note that this is
+ * merely advisory, not a guaranteed maximum; it only affects the space
+ * used for virtual-array buffers.) May be changed by outer application
+ * after creating the JPEG object.
+ */
+ long max_memory_to_use;
+
+ /* Maximum allocation request accepted by alloc_large. */
+ long max_alloc_chunk;
};
@@ -861,9 +861,9 @@ typedef JMETHOD(boolean, jpeg_marker_parser_method, (j_decompress_ptr cinfo));
*/
#ifdef HAVE_PROTOTYPES
-#define JPP(arglist) arglist
+#define JPP(arglist) arglist
#else
-#define JPP(arglist) ()
+#define JPP(arglist) ()
#endif
@@ -875,59 +875,59 @@ typedef JMETHOD(boolean, jpeg_marker_parser_method, (j_decompress_ptr cinfo));
*/
#ifdef NEED_SHORT_EXTERNAL_NAMES
-#define jpeg_std_error jStdError
-#define jpeg_CreateCompress jCreaCompress
-#define jpeg_CreateDecompress jCreaDecompress
-#define jpeg_destroy_compress jDestCompress
-#define jpeg_destroy_decompress jDestDecompress
-#define jpeg_stdio_dest jStdDest
-#define jpeg_stdio_src jStdSrc
-#define jpeg_mem_dest jMemDest
-#define jpeg_mem_src jMemSrc
-#define jpeg_set_defaults jSetDefaults
-#define jpeg_set_colorspace jSetColorspace
-#define jpeg_default_colorspace jDefColorspace
-#define jpeg_set_quality jSetQuality
-#define jpeg_set_linear_quality jSetLQuality
-#define jpeg_default_qtables jDefQTables
-#define jpeg_add_quant_table jAddQuantTable
-#define jpeg_quality_scaling jQualityScaling
-#define jpeg_simple_progression jSimProgress
-#define jpeg_suppress_tables jSuppressTables
-#define jpeg_alloc_quant_table jAlcQTable
-#define jpeg_alloc_huff_table jAlcHTable
-#define jpeg_start_compress jStrtCompress
-#define jpeg_write_scanlines jWrtScanlines
-#define jpeg_finish_compress jFinCompress
-#define jpeg_calc_jpeg_dimensions jCjpegDimensions
-#define jpeg_write_raw_data jWrtRawData
-#define jpeg_write_marker jWrtMarker
-#define jpeg_write_m_header jWrtMHeader
-#define jpeg_write_m_byte jWrtMByte
-#define jpeg_write_tables jWrtTables
-#define jpeg_read_header jReadHeader
-#define jpeg_start_decompress jStrtDecompress
-#define jpeg_read_scanlines jReadScanlines
-#define jpeg_finish_decompress jFinDecompress
-#define jpeg_read_raw_data jReadRawData
-#define jpeg_has_multiple_scans jHasMultScn
-#define jpeg_start_output jStrtOutput
-#define jpeg_finish_output jFinOutput
-#define jpeg_input_complete jInComplete
-#define jpeg_new_colormap jNewCMap
-#define jpeg_consume_input jConsumeInput
-#define jpeg_core_output_dimensions jCoreDimensions
-#define jpeg_calc_output_dimensions jCalcDimensions
-#define jpeg_save_markers jSaveMarkers
-#define jpeg_set_marker_processor jSetMarker
-#define jpeg_read_coefficients jReadCoefs
-#define jpeg_write_coefficients jWrtCoefs
-#define jpeg_copy_critical_parameters jCopyCrit
-#define jpeg_abort_compress jAbrtCompress
-#define jpeg_abort_decompress jAbrtDecompress
-#define jpeg_abort jAbort
-#define jpeg_destroy jDestroy
-#define jpeg_resync_to_restart jResyncRestart
+#define jpeg_std_error jStdError
+#define jpeg_CreateCompress jCreaCompress
+#define jpeg_CreateDecompress jCreaDecompress
+#define jpeg_destroy_compress jDestCompress
+#define jpeg_destroy_decompress jDestDecompress
+#define jpeg_stdio_dest jStdDest
+#define jpeg_stdio_src jStdSrc
+#define jpeg_mem_dest jMemDest
+#define jpeg_mem_src jMemSrc
+#define jpeg_set_defaults jSetDefaults
+#define jpeg_set_colorspace jSetColorspace
+#define jpeg_default_colorspace jDefColorspace
+#define jpeg_set_quality jSetQuality
+#define jpeg_set_linear_quality jSetLQuality
+#define jpeg_default_qtables jDefQTables
+#define jpeg_add_quant_table jAddQuantTable
+#define jpeg_quality_scaling jQualityScaling
+#define jpeg_simple_progression jSimProgress
+#define jpeg_suppress_tables jSuppressTables
+#define jpeg_alloc_quant_table jAlcQTable
+#define jpeg_alloc_huff_table jAlcHTable
+#define jpeg_start_compress jStrtCompress
+#define jpeg_write_scanlines jWrtScanlines
+#define jpeg_finish_compress jFinCompress
+#define jpeg_calc_jpeg_dimensions jCjpegDimensions
+#define jpeg_write_raw_data jWrtRawData
+#define jpeg_write_marker jWrtMarker
+#define jpeg_write_m_header jWrtMHeader
+#define jpeg_write_m_byte jWrtMByte
+#define jpeg_write_tables jWrtTables
+#define jpeg_read_header jReadHeader
+#define jpeg_start_decompress jStrtDecompress
+#define jpeg_read_scanlines jReadScanlines
+#define jpeg_finish_decompress jFinDecompress
+#define jpeg_read_raw_data jReadRawData
+#define jpeg_has_multiple_scans jHasMultScn
+#define jpeg_start_output jStrtOutput
+#define jpeg_finish_output jFinOutput
+#define jpeg_input_complete jInComplete
+#define jpeg_new_colormap jNewCMap
+#define jpeg_consume_input jConsumeInput
+#define jpeg_core_output_dimensions jCoreDimensions
+#define jpeg_calc_output_dimensions jCalcDimensions
+#define jpeg_save_markers jSaveMarkers
+#define jpeg_set_marker_processor jSetMarker
+#define jpeg_read_coefficients jReadCoefs
+#define jpeg_write_coefficients jWrtCoefs
+#define jpeg_copy_critical_parameters jCopyCrit
+#define jpeg_abort_compress jAbrtCompress
+#define jpeg_abort_decompress jAbrtDecompress
+#define jpeg_abort jAbort
+#define jpeg_destroy jDestroy
+#define jpeg_resync_to_restart jResyncRestart
#endif /* NEED_SHORT_EXTERNAL_NAMES */
@@ -943,13 +943,13 @@ EXTERN(struct jpeg_error_mgr *) jpeg_std_error
* NB: you must set up the error-manager BEFORE calling jpeg_create_xxx.
*/
#define jpeg_create_compress(cinfo) \
- jpeg_CreateCompress((cinfo), JPEG_LIB_VERSION, \
+ jpeg_CreateCompress((cinfo), JPEG_LIB_VERSION, \
(size_t) sizeof(struct jpeg_compress_struct))
#define jpeg_create_decompress(cinfo) \
- jpeg_CreateDecompress((cinfo), JPEG_LIB_VERSION, \
- (size_t) sizeof(struct jpeg_decompress_struct))
+ jpeg_CreateDecompress((cinfo), JPEG_LIB_VERSION, \
+ (size_t) sizeof(struct jpeg_decompress_struct))
EXTERN(void) jpeg_CreateCompress JPP((j_compress_ptr cinfo,
- int version, size_t structsize));
+ int version, size_t structsize));
EXTERN(void) jpeg_CreateDecompress JPP((j_decompress_ptr cinfo,
int version, size_t structsize));
/* Destruction of JPEG compression objects */
@@ -963,42 +963,42 @@ EXTERN(void) jpeg_stdio_src JPP((j_decompress_ptr cinfo, FILE * infile));
/* Data source and destination managers: memory buffers. */
EXTERN(void) jpeg_mem_dest JPP((j_compress_ptr cinfo,
- unsigned char ** outbuffer,
- unsigned long * outsize));
+ unsigned char ** outbuffer,
+ unsigned long * outsize));
EXTERN(void) jpeg_mem_src JPP((j_decompress_ptr cinfo,
- unsigned char * inbuffer,
- unsigned long insize));
+ unsigned char * inbuffer,
+ unsigned long insize));
/* Default parameter setup for compression */
EXTERN(void) jpeg_set_defaults JPP((j_compress_ptr cinfo));
/* Compression parameter setup aids */
EXTERN(void) jpeg_set_colorspace JPP((j_compress_ptr cinfo,
- J_COLOR_SPACE colorspace));
+ J_COLOR_SPACE colorspace));
EXTERN(void) jpeg_default_colorspace JPP((j_compress_ptr cinfo));
EXTERN(void) jpeg_set_quality JPP((j_compress_ptr cinfo, int quality,
- boolean force_baseline));
+ boolean force_baseline));
EXTERN(void) jpeg_set_linear_quality JPP((j_compress_ptr cinfo,
- int scale_factor,
- boolean force_baseline));
+ int scale_factor,
+ boolean force_baseline));
EXTERN(void) jpeg_default_qtables JPP((j_compress_ptr cinfo,
- boolean force_baseline));
+ boolean force_baseline));
EXTERN(void) jpeg_add_quant_table JPP((j_compress_ptr cinfo, int which_tbl,
- const unsigned int *basic_table,
- int scale_factor,
- boolean force_baseline));
+ const unsigned int *basic_table,
+ int scale_factor,
+ boolean force_baseline));
EXTERN(int) jpeg_quality_scaling JPP((int quality));
EXTERN(void) jpeg_simple_progression JPP((j_compress_ptr cinfo));
EXTERN(void) jpeg_suppress_tables JPP((j_compress_ptr cinfo,
- boolean suppress));
+ boolean suppress));
EXTERN(JQUANT_TBL *) jpeg_alloc_quant_table JPP((j_common_ptr cinfo));
EXTERN(JHUFF_TBL *) jpeg_alloc_huff_table JPP((j_common_ptr cinfo));
/* Main entry points for compression */
EXTERN(void) jpeg_start_compress JPP((j_compress_ptr cinfo,
- boolean write_all_tables));
+ boolean write_all_tables));
EXTERN(JDIMENSION) jpeg_write_scanlines JPP((j_compress_ptr cinfo,
- JSAMPARRAY scanlines,
- JDIMENSION num_lines));
+ JSAMPARRAY scanlines,
+ JDIMENSION num_lines));
EXTERN(void) jpeg_finish_compress JPP((j_compress_ptr cinfo));
/* Precalculate JPEG dimensions for current compression parameters. */
@@ -1006,13 +1006,13 @@ EXTERN(void) jpeg_calc_jpeg_dimensions JPP((j_compress_ptr cinfo));
/* Replaces jpeg_write_scanlines when writing raw downsampled data. */
EXTERN(JDIMENSION) jpeg_write_raw_data JPP((j_compress_ptr cinfo,
- JSAMPIMAGE data,
- JDIMENSION num_lines));
+ JSAMPIMAGE data,
+ JDIMENSION num_lines));
/* Write a special marker. See libjpeg.txt concerning safe usage. */
EXTERN(void) jpeg_write_marker
JPP((j_compress_ptr cinfo, int marker,
- const JOCTET * dataptr, unsigned int datalen));
+ const JOCTET * dataptr, unsigned int datalen));
/* Same, but piecemeal. */
EXTERN(void) jpeg_write_m_header
JPP((j_compress_ptr cinfo, int marker, unsigned int datalen));
@@ -1024,11 +1024,11 @@ EXTERN(void) jpeg_write_tables JPP((j_compress_ptr cinfo));
/* Decompression startup: read start of JPEG datastream to see what's there */
EXTERN(int) jpeg_read_header JPP((j_decompress_ptr cinfo,
- boolean require_image));
+ boolean require_image));
/* Return value is one of: */
-#define JPEG_SUSPENDED 0 /* Suspended due to lack of input data */
-#define JPEG_HEADER_OK 1 /* Found valid image datastream */
-#define JPEG_HEADER_TABLES_ONLY 2 /* Found valid table-specs-only datastream */
+#define JPEG_SUSPENDED 0 /* Suspended due to lack of input data */
+#define JPEG_HEADER_OK 1 /* Found valid image datastream */
+#define JPEG_HEADER_TABLES_ONLY 2 /* Found valid table-specs-only datastream */
/* If you pass require_image = TRUE (normal case), you need not check for
* a TABLES_ONLY return code; an abbreviated file will cause an error exit.
* JPEG_SUSPENDED is only possible if you use a data source module that can
@@ -1038,29 +1038,29 @@ EXTERN(int) jpeg_read_header JPP((j_decompress_ptr cinfo,
/* Main entry points for decompression */
EXTERN(boolean) jpeg_start_decompress JPP((j_decompress_ptr cinfo));
EXTERN(JDIMENSION) jpeg_read_scanlines JPP((j_decompress_ptr cinfo,
- JSAMPARRAY scanlines,
- JDIMENSION max_lines));
+ JSAMPARRAY scanlines,
+ JDIMENSION max_lines));
EXTERN(boolean) jpeg_finish_decompress JPP((j_decompress_ptr cinfo));
/* Replaces jpeg_read_scanlines when reading raw downsampled data. */
EXTERN(JDIMENSION) jpeg_read_raw_data JPP((j_decompress_ptr cinfo,
- JSAMPIMAGE data,
- JDIMENSION max_lines));
+ JSAMPIMAGE data,
+ JDIMENSION max_lines));
/* Additional entry points for buffered-image mode. */
EXTERN(boolean) jpeg_has_multiple_scans JPP((j_decompress_ptr cinfo));
EXTERN(boolean) jpeg_start_output JPP((j_decompress_ptr cinfo,
- int scan_number));
+ int scan_number));
EXTERN(boolean) jpeg_finish_output JPP((j_decompress_ptr cinfo));
EXTERN(boolean) jpeg_input_complete JPP((j_decompress_ptr cinfo));
EXTERN(void) jpeg_new_colormap JPP((j_decompress_ptr cinfo));
EXTERN(int) jpeg_consume_input JPP((j_decompress_ptr cinfo));
/* Return value is one of: */
/* #define JPEG_SUSPENDED 0 Suspended due to lack of input data */
-#define JPEG_REACHED_SOS 1 /* Reached start of new scan */
-#define JPEG_REACHED_EOI 2 /* Reached end of image */
-#define JPEG_ROW_COMPLETED 3 /* Completed one iMCU row */
-#define JPEG_SCAN_COMPLETED 4 /* Completed last iMCU row of a scan */
+#define JPEG_REACHED_SOS 1 /* Reached start of new scan */
+#define JPEG_REACHED_EOI 2 /* Reached end of image */
+#define JPEG_ROW_COMPLETED 3 /* Completed one iMCU row */
+#define JPEG_SCAN_COMPLETED 4 /* Completed last iMCU row of a scan */
/* Precalculate output dimensions for current decompression parameters. */
EXTERN(void) jpeg_core_output_dimensions JPP((j_decompress_ptr cinfo));
@@ -1069,17 +1069,17 @@ EXTERN(void) jpeg_calc_output_dimensions JPP((j_decompress_ptr cinfo));
/* Control saving of COM and APPn markers into marker_list. */
EXTERN(void) jpeg_save_markers
JPP((j_decompress_ptr cinfo, int marker_code,
- unsigned int length_limit));
+ unsigned int length_limit));
/* Install a special processing method for COM or APPn markers. */
EXTERN(void) jpeg_set_marker_processor
JPP((j_decompress_ptr cinfo, int marker_code,
- jpeg_marker_parser_method routine));
+ jpeg_marker_parser_method routine));
/* Read or write raw DCT coefficients --- useful for lossless transcoding. */
EXTERN(jvirt_barray_ptr *) jpeg_read_coefficients JPP((j_decompress_ptr cinfo));
EXTERN(void) jpeg_write_coefficients JPP((j_compress_ptr cinfo,
- jvirt_barray_ptr * coef_arrays));
+ jvirt_barray_ptr * coef_arrays));
EXTERN(void) jpeg_copy_critical_parameters JPP((j_decompress_ptr srcinfo,
j_compress_ptr dstinfo));
@@ -1100,17 +1100,17 @@ EXTERN(void) jpeg_destroy JPP((j_common_ptr cinfo));
/* Default restart-marker-resync procedure for use by data source modules */
EXTERN(boolean) jpeg_resync_to_restart JPP((j_decompress_ptr cinfo,
- int desired));
+ int desired));
/* These marker codes are exported since applications and data source modules
* are likely to want to use them.
*/
-#define JPEG_RST0 0xD0 /* RST0 marker code */
-#define JPEG_EOI 0xD9 /* EOI marker code */
-#define JPEG_APP0 0xE0 /* APP0 marker code */
-#define JPEG_COM 0xFE /* COM marker code */
+#define JPEG_RST0 0xD0 /* RST0 marker code */
+#define JPEG_EOI 0xD9 /* EOI marker code */
+#define JPEG_APP0 0xE0 /* APP0 marker code */
+#define JPEG_COM 0xFE /* COM marker code */
/* If we have a brain-damaged compiler that emits warnings (or worse, errors)
@@ -1119,7 +1119,7 @@ EXTERN(boolean) jpeg_resync_to_restart JPP((j_decompress_ptr cinfo,
*/
#ifdef INCOMPLETE_TYPES_BROKEN
-#ifndef JPEG_INTERNALS /* will be defined in jpegint.h */
+#ifndef JPEG_INTERNALS /* will be defined in jpegint.h */
struct jvirt_sarray_control { long dummy; };
struct jvirt_barray_control { long dummy; };
struct jpeg_comp_master { long dummy; };
@@ -1154,8 +1154,8 @@ struct jpeg_color_quantizer { long dummy; };
*/
#ifdef JPEG_INTERNALS
-#include "jpegint.h" /* fetch private declarations */
-#include "jerror.h" /* fetch error codes too */
+#include "jpegint.h" /* fetch private declarations */
+#include "jerror.h" /* fetch error codes too */
#endif
#ifdef __cplusplus
diff --git a/src/lib/libjpeg/jpegtran.c b/src/lib/libjpeg/jpegtran.c
index fb24a43e346..f68e529d318 100644
--- a/src/lib/libjpeg/jpegtran.c
+++ b/src/lib/libjpeg/jpegtran.c
@@ -11,17 +11,17 @@
* provides some lossless and sort-of-lossless transformations of JPEG data.
*/
-#include "cdjpeg.h" /* Common decls for cjpeg/djpeg applications */
-#include "transupp.h" /* Support routines for jpegtran */
-#include "jversion.h" /* for version message */
+#include "cdjpeg.h" /* Common decls for cjpeg/djpeg applications */
+#include "transupp.h" /* Support routines for jpegtran */
+#include "jversion.h" /* for version message */
-#ifdef USE_CCOMMAND /* command-line reader for Macintosh */
+#ifdef USE_CCOMMAND /* command-line reader for Macintosh */
#ifdef __MWERKS__
#include <SIOUX.h> /* Metrowerks needs this */
-#include <console.h> /* ... and this */
+#include <console.h> /* ... and this */
#endif
#ifdef THINK_C
-#include <console.h> /* Think declares it here */
+#include <console.h> /* Think declares it here */
#endif
#endif
@@ -35,10 +35,10 @@
*/
-static const char * progname; /* program name for error messages */
-static char * outfilename; /* for -outfile switch */
-static char * scaleoption; /* -scale switch */
-static JCOPY_OPTION copyoption; /* -copy switch */
+static const char * progname; /* program name for error messages */
+static char * outfilename; /* for -outfile switch */
+static char * scaleoption; /* -scale switch */
+static JCOPY_OPTION copyoption; /* -copy switch */
static jpeg_transform_info transformoption; /* image transformation options */
@@ -46,50 +46,50 @@ LOCAL(void)
usage (void)
/* complain about bad command line */
{
- fprintf(stderr, "usage: %s [switches] ", progname);
+ fprintf(stderr, "usage: %s [switches] ", progname);
#ifdef TWO_FILE_COMMANDLINE
- fprintf(stderr, "inputfile outputfile\n");
+ fprintf(stderr, "inputfile outputfile\n");
#else
- fprintf(stderr, "[inputfile]\n");
+ fprintf(stderr, "[inputfile]\n");
#endif
- fprintf(stderr, "Switches (names may be abbreviated):\n");
- fprintf(stderr, " -copy none Copy no extra markers from source file\n");
- fprintf(stderr, " -copy comments Copy only comment markers (default)\n");
- fprintf(stderr, " -copy all Copy all extra markers\n");
+ fprintf(stderr, "Switches (names may be abbreviated):\n");
+ fprintf(stderr, " -copy none Copy no extra markers from source file\n");
+ fprintf(stderr, " -copy comments Copy only comment markers (default)\n");
+ fprintf(stderr, " -copy all Copy all extra markers\n");
#ifdef ENTROPY_OPT_SUPPORTED
- fprintf(stderr, " -optimize Optimize Huffman table (smaller file, but slow compression)\n");
+ fprintf(stderr, " -optimize Optimize Huffman table (smaller file, but slow compression)\n");
#endif
#ifdef C_PROGRESSIVE_SUPPORTED
- fprintf(stderr, " -progressive Create progressive JPEG file\n");
+ fprintf(stderr, " -progressive Create progressive JPEG file\n");
#endif
- fprintf(stderr, "Switches for modifying the image:\n");
+ fprintf(stderr, "Switches for modifying the image:\n");
#if TRANSFORMS_SUPPORTED
- fprintf(stderr, " -crop WxH+X+Y Crop to a rectangular subarea\n");
- fprintf(stderr, " -grayscale Reduce to grayscale (omit color data)\n");
- fprintf(stderr, " -flip [horizontal|vertical] Mirror image (left-right or top-bottom)\n");
- fprintf(stderr, " -perfect Fail if there is non-transformable edge blocks\n");
- fprintf(stderr, " -rotate [90|180|270] Rotate image (degrees clockwise)\n");
+ fprintf(stderr, " -crop WxH+X+Y Crop to a rectangular subarea\n");
+ fprintf(stderr, " -grayscale Reduce to grayscale (omit color data)\n");
+ fprintf(stderr, " -flip [horizontal|vertical] Mirror image (left-right or top-bottom)\n");
+ fprintf(stderr, " -perfect Fail if there is non-transformable edge blocks\n");
+ fprintf(stderr, " -rotate [90|180|270] Rotate image (degrees clockwise)\n");
#endif
- fprintf(stderr, " -scale M/N Scale output image by fraction M/N, eg, 1/8\n");
+ fprintf(stderr, " -scale M/N Scale output image by fraction M/N, eg, 1/8\n");
#if TRANSFORMS_SUPPORTED
- fprintf(stderr, " -transpose Transpose image\n");
- fprintf(stderr, " -transverse Transverse transpose image\n");
- fprintf(stderr, " -trim Drop non-transformable edge blocks\n");
+ fprintf(stderr, " -transpose Transpose image\n");
+ fprintf(stderr, " -transverse Transverse transpose image\n");
+ fprintf(stderr, " -trim Drop non-transformable edge blocks\n");
#endif
- fprintf(stderr, "Switches for advanced users:\n");
- fprintf(stderr, " -restart N Set restart interval in rows, or in blocks with B\n");
- fprintf(stderr, " -maxmemory N Maximum memory to use (in kbytes)\n");
- fprintf(stderr, " -outfile name Specify name for output file\n");
- fprintf(stderr, " -verbose or -debug Emit debug output\n");
- fprintf(stderr, "Switches for wizards:\n");
+ fprintf(stderr, "Switches for advanced users:\n");
+ fprintf(stderr, " -restart N Set restart interval in rows, or in blocks with B\n");
+ fprintf(stderr, " -maxmemory N Maximum memory to use (in kbytes)\n");
+ fprintf(stderr, " -outfile name Specify name for output file\n");
+ fprintf(stderr, " -verbose or -debug Emit debug output\n");
+ fprintf(stderr, "Switches for wizards:\n");
#ifdef C_ARITH_CODING_SUPPORTED
- fprintf(stderr, " -arithmetic Use arithmetic coding\n");
+ fprintf(stderr, " -arithmetic Use arithmetic coding\n");
#endif
#ifdef C_MULTISCAN_FILES_SUPPORTED
- fprintf(stderr, " -scans file Create multi-scan JPEG per script file\n");
+ fprintf(stderr, " -scans file Create multi-scan JPEG per script file\n");
#endif
- exit(EXIT_FAILURE);
+ exit(EXIT_FAILURE);
}
@@ -100,18 +100,18 @@ select_transform (JXFORM_CODE transform)
*/
{
#if TRANSFORMS_SUPPORTED
- if (transformoption.transform == JXFORM_NONE ||
- transformoption.transform == transform) {
- transformoption.transform = transform;
- } else {
- fprintf(stderr, "%s: can only do one image transformation at a time\n",
- progname);
- usage();
- }
+ if (transformoption.transform == JXFORM_NONE ||
+ transformoption.transform == transform) {
+ transformoption.transform = transform;
+ } else {
+ fprintf(stderr, "%s: can only do one image transformation at a time\n",
+ progname);
+ usage();
+ }
#else
- fprintf(stderr, "%s: sorry, image transformation was not compiled\n",
- progname);
- exit(EXIT_FAILURE);
+ fprintf(stderr, "%s: sorry, image transformation was not compiled\n",
+ progname);
+ exit(EXIT_FAILURE);
#endif
}
@@ -128,236 +128,236 @@ parse_switches (j_compress_ptr cinfo, int argc, char **argv,
* processing.
*/
{
- int argn;
- char * arg;
- boolean simple_progressive;
- char * scansarg = NULL; /* saves -scans parm if any */
-
- /* Set up default JPEG parameters. */
- simple_progressive = FALSE;
- outfilename = NULL;
- scaleoption = NULL;
- copyoption = JCOPYOPT_DEFAULT;
- transformoption.transform = JXFORM_NONE;
- transformoption.perfect = FALSE;
- transformoption.trim = FALSE;
- transformoption.force_grayscale = FALSE;
- transformoption.crop = FALSE;
- cinfo->err->trace_level = 0;
-
- /* Scan command line options, adjust parameters */
-
- for (argn = 1; argn < argc; argn++) {
- arg = argv[argn];
- if (*arg != '-') {
- /* Not a switch, must be a file name argument */
- if (argn <= last_file_arg_seen) {
- outfilename = NULL; /* -outfile applies to just one input file */
- continue; /* ignore this name if previously processed */
- }
- break; /* else done parsing switches */
- }
- arg++; /* advance past switch marker character */
-
- if (keymatch(arg, "arithmetic", 1)) {
- /* Use arithmetic coding. */
+ int argn;
+ char * arg;
+ boolean simple_progressive;
+ char * scansarg = NULL; /* saves -scans parm if any */
+
+ /* Set up default JPEG parameters. */
+ simple_progressive = FALSE;
+ outfilename = NULL;
+ scaleoption = NULL;
+ copyoption = JCOPYOPT_DEFAULT;
+ transformoption.transform = JXFORM_NONE;
+ transformoption.perfect = FALSE;
+ transformoption.trim = FALSE;
+ transformoption.force_grayscale = FALSE;
+ transformoption.crop = FALSE;
+ cinfo->err->trace_level = 0;
+
+ /* Scan command line options, adjust parameters */
+
+ for (argn = 1; argn < argc; argn++) {
+ arg = argv[argn];
+ if (*arg != '-') {
+ /* Not a switch, must be a file name argument */
+ if (argn <= last_file_arg_seen) {
+ outfilename = NULL; /* -outfile applies to just one input file */
+ continue; /* ignore this name if previously processed */
+ }
+ break; /* else done parsing switches */
+ }
+ arg++; /* advance past switch marker character */
+
+ if (keymatch(arg, "arithmetic", 1)) {
+ /* Use arithmetic coding. */
#ifdef C_ARITH_CODING_SUPPORTED
- cinfo->arith_code = TRUE;
+ cinfo->arith_code = TRUE;
#else
- fprintf(stderr, "%s: sorry, arithmetic coding not supported\n",
- progname);
- exit(EXIT_FAILURE);
+ fprintf(stderr, "%s: sorry, arithmetic coding not supported\n",
+ progname);
+ exit(EXIT_FAILURE);
#endif
- } else if (keymatch(arg, "copy", 2)) {
- /* Select which extra markers to copy. */
- if (++argn >= argc) /* advance to next argument */
+ } else if (keymatch(arg, "copy", 2)) {
+ /* Select which extra markers to copy. */
+ if (++argn >= argc) /* advance to next argument */
usage();
- if (keymatch(argv[argn], "none", 1)) {
+ if (keymatch(argv[argn], "none", 1)) {
copyoption = JCOPYOPT_NONE;
- } else if (keymatch(argv[argn], "comments", 1)) {
+ } else if (keymatch(argv[argn], "comments", 1)) {
copyoption = JCOPYOPT_COMMENTS;
- } else if (keymatch(argv[argn], "all", 1)) {
+ } else if (keymatch(argv[argn], "all", 1)) {
copyoption = JCOPYOPT_ALL;
- } else
+ } else
usage();
- } else if (keymatch(arg, "crop", 2)) {
- /* Perform lossless cropping. */
+ } else if (keymatch(arg, "crop", 2)) {
+ /* Perform lossless cropping. */
#if TRANSFORMS_SUPPORTED
- if (++argn >= argc) /* advance to next argument */
+ if (++argn >= argc) /* advance to next argument */
usage();
- if (! jtransform_parse_crop_spec(&transformoption, argv[argn])) {
+ if (! jtransform_parse_crop_spec(&transformoption, argv[argn])) {
fprintf(stderr, "%s: bogus -crop argument '%s'\n",
progname, argv[argn]);
exit(EXIT_FAILURE);
- }
+ }
#else
- select_transform(JXFORM_NONE); /* force an error */
+ select_transform(JXFORM_NONE); /* force an error */
#endif
- } else if (keymatch(arg, "debug", 1) || keymatch(arg, "verbose", 1)) {
- /* Enable debug printouts. */
- /* On first -d, print version identification */
- static boolean printed_version = FALSE;
+ } else if (keymatch(arg, "debug", 1) || keymatch(arg, "verbose", 1)) {
+ /* Enable debug printouts. */
+ /* On first -d, print version identification */
+ static boolean printed_version = FALSE;
- if (! printed_version) {
+ if (! printed_version) {
fprintf(stderr, "Independent JPEG Group's JPEGTRAN, version %s\n%s\n",
JVERSION, JCOPYRIGHT);
printed_version = TRUE;
- }
- cinfo->err->trace_level++;
+ }
+ cinfo->err->trace_level++;
- } else if (keymatch(arg, "flip", 1)) {
- /* Mirror left-right or top-bottom. */
- if (++argn >= argc) /* advance to next argument */
+ } else if (keymatch(arg, "flip", 1)) {
+ /* Mirror left-right or top-bottom. */
+ if (++argn >= argc) /* advance to next argument */
usage();
- if (keymatch(argv[argn], "horizontal", 1))
+ if (keymatch(argv[argn], "horizontal", 1))
select_transform(JXFORM_FLIP_H);
- else if (keymatch(argv[argn], "vertical", 1))
+ else if (keymatch(argv[argn], "vertical", 1))
select_transform(JXFORM_FLIP_V);
- else
+ else
usage();
- } else if (keymatch(arg, "grayscale", 1) || keymatch(arg, "greyscale",1)) {
- /* Force to grayscale. */
+ } else if (keymatch(arg, "grayscale", 1) || keymatch(arg, "greyscale",1)) {
+ /* Force to grayscale. */
#if TRANSFORMS_SUPPORTED
- transformoption.force_grayscale = TRUE;
+ transformoption.force_grayscale = TRUE;
#else
- select_transform(JXFORM_NONE); /* force an error */
+ select_transform(JXFORM_NONE); /* force an error */
#endif
- } else if (keymatch(arg, "maxmemory", 3)) {
- /* Maximum memory in Kb (or Mb with 'm'). */
- long lval;
- char ch = 'x';
+ } else if (keymatch(arg, "maxmemory", 3)) {
+ /* Maximum memory in Kb (or Mb with 'm'). */
+ long lval;
+ char ch = 'x';
- if (++argn >= argc) /* advance to next argument */
+ if (++argn >= argc) /* advance to next argument */
usage();
- if (sscanf(argv[argn], "%ld%c", &lval, &ch) < 1)
+ if (sscanf(argv[argn], "%ld%c", &lval, &ch) < 1)
usage();
- if (ch == 'm' || ch == 'M')
+ if (ch == 'm' || ch == 'M')
lval *= 1000L;
- cinfo->mem->max_memory_to_use = lval * 1000L;
+ cinfo->mem->max_memory_to_use = lval * 1000L;
- } else if (keymatch(arg, "optimize", 1) || keymatch(arg, "optimise", 1)) {
- /* Enable entropy parm optimization. */
+ } else if (keymatch(arg, "optimize", 1) || keymatch(arg, "optimise", 1)) {
+ /* Enable entropy parm optimization. */
#ifdef ENTROPY_OPT_SUPPORTED
- cinfo->optimize_coding = TRUE;
+ cinfo->optimize_coding = TRUE;
#else
- fprintf(stderr, "%s: sorry, entropy optimization was not compiled\n",
- progname);
- exit(EXIT_FAILURE);
+ fprintf(stderr, "%s: sorry, entropy optimization was not compiled\n",
+ progname);
+ exit(EXIT_FAILURE);
#endif
- } else if (keymatch(arg, "outfile", 4)) {
- /* Set output file name. */
- if (++argn >= argc) /* advance to next argument */
+ } else if (keymatch(arg, "outfile", 4)) {
+ /* Set output file name. */
+ if (++argn >= argc) /* advance to next argument */
usage();
- outfilename = argv[argn]; /* save it away for later use */
+ outfilename = argv[argn]; /* save it away for later use */
- } else if (keymatch(arg, "perfect", 2)) {
- /* Fail if there is any partial edge MCUs that the transform can't
- * handle. */
- transformoption.perfect = TRUE;
+ } else if (keymatch(arg, "perfect", 2)) {
+ /* Fail if there is any partial edge MCUs that the transform can't
+ * handle. */
+ transformoption.perfect = TRUE;
- } else if (keymatch(arg, "progressive", 2)) {
- /* Select simple progressive mode. */
+ } else if (keymatch(arg, "progressive", 2)) {
+ /* Select simple progressive mode. */
#ifdef C_PROGRESSIVE_SUPPORTED
- simple_progressive = TRUE;
- /* We must postpone execution until num_components is known. */
+ simple_progressive = TRUE;
+ /* We must postpone execution until num_components is known. */
#else
- fprintf(stderr, "%s: sorry, progressive output was not compiled\n",
- progname);
- exit(EXIT_FAILURE);
+ fprintf(stderr, "%s: sorry, progressive output was not compiled\n",
+ progname);
+ exit(EXIT_FAILURE);
#endif
- } else if (keymatch(arg, "restart", 1)) {
- /* Restart interval in MCU rows (or in MCUs with 'b'). */
- long lval;
- char ch = 'x';
+ } else if (keymatch(arg, "restart", 1)) {
+ /* Restart interval in MCU rows (or in MCUs with 'b'). */
+ long lval;
+ char ch = 'x';
- if (++argn >= argc) /* advance to next argument */
+ if (++argn >= argc) /* advance to next argument */
usage();
- if (sscanf(argv[argn], "%ld%c", &lval, &ch) < 1)
+ if (sscanf(argv[argn], "%ld%c", &lval, &ch) < 1)
usage();
- if (lval < 0 || lval > 65535L)
+ if (lval < 0 || lval > 65535L)
usage();
- if (ch == 'b' || ch == 'B') {
+ if (ch == 'b' || ch == 'B') {
cinfo->restart_interval = (unsigned int) lval;
cinfo->restart_in_rows = 0; /* else prior '-restart n' overrides me */
- } else {
+ } else {
cinfo->restart_in_rows = (int) lval;
/* restart_interval will be computed during startup */
- }
+ }
- } else if (keymatch(arg, "rotate", 2)) {
- /* Rotate 90, 180, or 270 degrees (measured clockwise). */
- if (++argn >= argc) /* advance to next argument */
+ } else if (keymatch(arg, "rotate", 2)) {
+ /* Rotate 90, 180, or 270 degrees (measured clockwise). */
+ if (++argn >= argc) /* advance to next argument */
usage();
- if (keymatch(argv[argn], "90", 2))
+ if (keymatch(argv[argn], "90", 2))
select_transform(JXFORM_ROT_90);
- else if (keymatch(argv[argn], "180", 3))
+ else if (keymatch(argv[argn], "180", 3))
select_transform(JXFORM_ROT_180);
- else if (keymatch(argv[argn], "270", 3))
+ else if (keymatch(argv[argn], "270", 3))
select_transform(JXFORM_ROT_270);
- else
+ else
usage();
- } else if (keymatch(arg, "scale", 4)) {
- /* Scale the output image by a fraction M/N. */
- if (++argn >= argc) /* advance to next argument */
+ } else if (keymatch(arg, "scale", 4)) {
+ /* Scale the output image by a fraction M/N. */
+ if (++argn >= argc) /* advance to next argument */
usage();
- scaleoption = argv[argn];
- /* We must postpone processing until decompression startup. */
+ scaleoption = argv[argn];
+ /* We must postpone processing until decompression startup. */
- } else if (keymatch(arg, "scans", 1)) {
- /* Set scan script. */
+ } else if (keymatch(arg, "scans", 1)) {
+ /* Set scan script. */
#ifdef C_MULTISCAN_FILES_SUPPORTED
- if (++argn >= argc) /* advance to next argument */
+ if (++argn >= argc) /* advance to next argument */
usage();
- scansarg = argv[argn];
- /* We must postpone reading the file in case -progressive appears. */
+ scansarg = argv[argn];
+ /* We must postpone reading the file in case -progressive appears. */
#else
- fprintf(stderr, "%s: sorry, multi-scan output was not compiled\n",
- progname);
- exit(EXIT_FAILURE);
+ fprintf(stderr, "%s: sorry, multi-scan output was not compiled\n",
+ progname);
+ exit(EXIT_FAILURE);
#endif
- } else if (keymatch(arg, "transpose", 1)) {
- /* Transpose (across UL-to-LR axis). */
- select_transform(JXFORM_TRANSPOSE);
+ } else if (keymatch(arg, "transpose", 1)) {
+ /* Transpose (across UL-to-LR axis). */
+ select_transform(JXFORM_TRANSPOSE);
- } else if (keymatch(arg, "transverse", 6)) {
- /* Transverse transpose (across UR-to-LL axis). */
- select_transform(JXFORM_TRANSVERSE);
+ } else if (keymatch(arg, "transverse", 6)) {
+ /* Transverse transpose (across UR-to-LL axis). */
+ select_transform(JXFORM_TRANSVERSE);
- } else if (keymatch(arg, "trim", 3)) {
- /* Trim off any partial edge MCUs that the transform can't handle. */
- transformoption.trim = TRUE;
+ } else if (keymatch(arg, "trim", 3)) {
+ /* Trim off any partial edge MCUs that the transform can't handle. */
+ transformoption.trim = TRUE;
- } else {
- usage(); /* bogus switch */
- }
- }
+ } else {
+ usage(); /* bogus switch */
+ }
+ }
- /* Post-switch-scanning cleanup */
+ /* Post-switch-scanning cleanup */
- if (for_real) {
+ if (for_real) {
#ifdef C_PROGRESSIVE_SUPPORTED
- if (simple_progressive) /* process -progressive; -scans can override */
- jpeg_simple_progression(cinfo);
+ if (simple_progressive) /* process -progressive; -scans can override */
+ jpeg_simple_progression(cinfo);
#endif
#ifdef C_MULTISCAN_FILES_SUPPORTED
- if (scansarg != NULL) /* process -scans if it was present */
- if (! read_scan_script(cinfo, scansarg))
+ if (scansarg != NULL) /* process -scans if it was present */
+ if (! read_scan_script(cinfo, scansarg))
usage();
#endif
- }
+ }
- return argn; /* return index of next arg (file name) */
+ return argn; /* return index of next arg (file name) */
}
@@ -368,193 +368,193 @@ parse_switches (j_compress_ptr cinfo, int argc, char **argv,
int
main (int argc, char **argv)
{
- struct jpeg_decompress_struct srcinfo;
- struct jpeg_compress_struct dstinfo;
- struct jpeg_error_mgr jsrcerr, jdsterr;
+ struct jpeg_decompress_struct srcinfo;
+ struct jpeg_compress_struct dstinfo;
+ struct jpeg_error_mgr jsrcerr, jdsterr;
#ifdef PROGRESS_REPORT
- struct cdjpeg_progress_mgr progress;
+ struct cdjpeg_progress_mgr progress;
#endif
- jvirt_barray_ptr * src_coef_arrays;
- jvirt_barray_ptr * dst_coef_arrays;
- int file_index;
- /* We assume all-in-memory processing and can therefore use only a
- * single file pointer for sequential input and output operation.
- */
- FILE * fp;
-
- /* On Mac, fetch a command line. */
+ jvirt_barray_ptr * src_coef_arrays;
+ jvirt_barray_ptr * dst_coef_arrays;
+ int file_index;
+ /* We assume all-in-memory processing and can therefore use only a
+ * single file pointer for sequential input and output operation.
+ */
+ FILE * fp;
+
+ /* On Mac, fetch a command line. */
#ifdef USE_CCOMMAND
- argc = ccommand(&argv);
+ argc = ccommand(&argv);
#endif
- progname = argv[0];
- if (progname == NULL || progname[0] == 0)
- progname = "jpegtran"; /* in case C library doesn't provide it */
+ progname = argv[0];
+ if (progname == NULL || progname[0] == 0)
+ progname = "jpegtran"; /* in case C library doesn't provide it */
- /* Initialize the JPEG decompression object with default error handling. */
- srcinfo.err = jpeg_std_error(&jsrcerr);
- jpeg_create_decompress(&srcinfo);
- /* Initialize the JPEG compression object with default error handling. */
- dstinfo.err = jpeg_std_error(&jdsterr);
- jpeg_create_compress(&dstinfo);
+ /* Initialize the JPEG decompression object with default error handling. */
+ srcinfo.err = jpeg_std_error(&jsrcerr);
+ jpeg_create_decompress(&srcinfo);
+ /* Initialize the JPEG compression object with default error handling. */
+ dstinfo.err = jpeg_std_error(&jdsterr);
+ jpeg_create_compress(&dstinfo);
- /* Now safe to enable signal catcher.
- * Note: we assume only the decompression object will have virtual arrays.
- */
+ /* Now safe to enable signal catcher.
+ * Note: we assume only the decompression object will have virtual arrays.
+ */
#ifdef NEED_SIGNAL_CATCHER
- enable_signal_catcher((j_common_ptr) &srcinfo);
+ enable_signal_catcher((j_common_ptr) &srcinfo);
#endif
- /* Scan command line to find file names.
- * It is convenient to use just one switch-parsing routine, but the switch
- * values read here are mostly ignored; we will rescan the switches after
- * opening the input file. Also note that most of the switches affect the
- * destination JPEG object, so we parse into that and then copy over what
- * needs to affects the source too.
- */
+ /* Scan command line to find file names.
+ * It is convenient to use just one switch-parsing routine, but the switch
+ * values read here are mostly ignored; we will rescan the switches after
+ * opening the input file. Also note that most of the switches affect the
+ * destination JPEG object, so we parse into that and then copy over what
+ * needs to affects the source too.
+ */
- file_index = parse_switches(&dstinfo, argc, argv, 0, FALSE);
- jsrcerr.trace_level = jdsterr.trace_level;
- srcinfo.mem->max_memory_to_use = dstinfo.mem->max_memory_to_use;
+ file_index = parse_switches(&dstinfo, argc, argv, 0, FALSE);
+ jsrcerr.trace_level = jdsterr.trace_level;
+ srcinfo.mem->max_memory_to_use = dstinfo.mem->max_memory_to_use;
#ifdef TWO_FILE_COMMANDLINE
- /* Must have either -outfile switch or explicit output file name */
- if (outfilename == NULL) {
- if (file_index != argc-2) {
- fprintf(stderr, "%s: must name one input and one output file\n",
- progname);
- usage();
- }
- outfilename = argv[file_index+1];
- } else {
- if (file_index != argc-1) {
- fprintf(stderr, "%s: must name one input and one output file\n",
- progname);
- usage();
- }
- }
+ /* Must have either -outfile switch or explicit output file name */
+ if (outfilename == NULL) {
+ if (file_index != argc-2) {
+ fprintf(stderr, "%s: must name one input and one output file\n",
+ progname);
+ usage();
+ }
+ outfilename = argv[file_index+1];
+ } else {
+ if (file_index != argc-1) {
+ fprintf(stderr, "%s: must name one input and one output file\n",
+ progname);
+ usage();
+ }
+ }
#else
- /* Unix style: expect zero or one file name */
- if (file_index < argc-1) {
- fprintf(stderr, "%s: only one input file\n", progname);
- usage();
- }
+ /* Unix style: expect zero or one file name */
+ if (file_index < argc-1) {
+ fprintf(stderr, "%s: only one input file\n", progname);
+ usage();
+ }
#endif /* TWO_FILE_COMMANDLINE */
- /* Open the input file. */
- if (file_index < argc) {
- if ((fp = fopen(argv[file_index], READ_BINARY)) == NULL) {
- fprintf(stderr, "%s: can't open %s for reading\n", progname, argv[file_index]);
- exit(EXIT_FAILURE);
- }
- } else {
- /* default input file is stdin */
- fp = read_stdin();
- }
+ /* Open the input file. */
+ if (file_index < argc) {
+ if ((fp = fopen(argv[file_index], READ_BINARY)) == NULL) {
+ fprintf(stderr, "%s: can't open %s for reading\n", progname, argv[file_index]);
+ exit(EXIT_FAILURE);
+ }
+ } else {
+ /* default input file is stdin */
+ fp = read_stdin();
+ }
#ifdef PROGRESS_REPORT
- start_progress_monitor((j_common_ptr) &dstinfo, &progress);
+ start_progress_monitor((j_common_ptr) &dstinfo, &progress);
#endif
- /* Specify data source for decompression */
- jpeg_stdio_src(&srcinfo, fp);
+ /* Specify data source for decompression */
+ jpeg_stdio_src(&srcinfo, fp);
- /* Enable saving of extra markers that we want to copy */
- jcopy_markers_setup(&srcinfo, copyoption);
+ /* Enable saving of extra markers that we want to copy */
+ jcopy_markers_setup(&srcinfo, copyoption);
- /* Read file header */
- (void) jpeg_read_header(&srcinfo, TRUE);
+ /* Read file header */
+ (void) jpeg_read_header(&srcinfo, TRUE);
- /* Adjust default decompression parameters */
- if (scaleoption != NULL)
- if (sscanf(scaleoption, "%d/%d",
+ /* Adjust default decompression parameters */
+ if (scaleoption != NULL)
+ if (sscanf(scaleoption, "%d/%d",
&srcinfo.scale_num, &srcinfo.scale_denom) < 1)
- usage();
+ usage();
- /* Any space needed by a transform option must be requested before
- * jpeg_read_coefficients so that memory allocation will be done right.
- */
+ /* Any space needed by a transform option must be requested before
+ * jpeg_read_coefficients so that memory allocation will be done right.
+ */
#if TRANSFORMS_SUPPORTED
- /* Fail right away if -perfect is given and transformation is not perfect.
- */
- if (!jtransform_request_workspace(&srcinfo, &transformoption)) {
- fprintf(stderr, "%s: transformation is not perfect\n", progname);
- exit(EXIT_FAILURE);
- }
+ /* Fail right away if -perfect is given and transformation is not perfect.
+ */
+ if (!jtransform_request_workspace(&srcinfo, &transformoption)) {
+ fprintf(stderr, "%s: transformation is not perfect\n", progname);
+ exit(EXIT_FAILURE);
+ }
#endif
- /* Read source file as DCT coefficients */
- src_coef_arrays = jpeg_read_coefficients(&srcinfo);
+ /* Read source file as DCT coefficients */
+ src_coef_arrays = jpeg_read_coefficients(&srcinfo);
- /* Initialize destination compression parameters from source values */
- jpeg_copy_critical_parameters(&srcinfo, &dstinfo);
+ /* Initialize destination compression parameters from source values */
+ jpeg_copy_critical_parameters(&srcinfo, &dstinfo);
- /* Adjust destination parameters if required by transform options;
- * also find out which set of coefficient arrays will hold the output.
- */
+ /* Adjust destination parameters if required by transform options;
+ * also find out which set of coefficient arrays will hold the output.
+ */
#if TRANSFORMS_SUPPORTED
- dst_coef_arrays = jtransform_adjust_parameters(&srcinfo, &dstinfo,
- src_coef_arrays,
- &transformoption);
+ dst_coef_arrays = jtransform_adjust_parameters(&srcinfo, &dstinfo,
+ src_coef_arrays,
+ &transformoption);
#else
- dst_coef_arrays = src_coef_arrays;
+ dst_coef_arrays = src_coef_arrays;
#endif
- /* Close input file, if we opened it.
- * Note: we assume that jpeg_read_coefficients consumed all input
- * until JPEG_REACHED_EOI, and that jpeg_finish_decompress will
- * only consume more while (! cinfo->inputctl->eoi_reached).
- * We cannot call jpeg_finish_decompress here since we still need the
- * virtual arrays allocated from the source object for processing.
- */
- if (fp != stdin)
- fclose(fp);
-
- /* Open the output file. */
- if (outfilename != NULL) {
- if ((fp = fopen(outfilename, WRITE_BINARY)) == NULL) {
- fprintf(stderr, "%s: can't open %s for writing\n", progname, outfilename);
- exit(EXIT_FAILURE);
- }
- } else {
- /* default output file is stdout */
- fp = write_stdout();
- }
-
- /* Adjust default compression parameters by re-parsing the options */
- file_index = parse_switches(&dstinfo, argc, argv, 0, TRUE);
-
- /* Specify data destination for compression */
- jpeg_stdio_dest(&dstinfo, fp);
-
- /* Start compressor (note no image data is actually written here) */
- jpeg_write_coefficients(&dstinfo, dst_coef_arrays);
-
- /* Copy to the output file any extra markers that we want to preserve */
- jcopy_markers_execute(&srcinfo, &dstinfo, copyoption);
-
- /* Execute image transformation, if any */
+ /* Close input file, if we opened it.
+ * Note: we assume that jpeg_read_coefficients consumed all input
+ * until JPEG_REACHED_EOI, and that jpeg_finish_decompress will
+ * only consume more while (! cinfo->inputctl->eoi_reached).
+ * We cannot call jpeg_finish_decompress here since we still need the
+ * virtual arrays allocated from the source object for processing.
+ */
+ if (fp != stdin)
+ fclose(fp);
+
+ /* Open the output file. */
+ if (outfilename != NULL) {
+ if ((fp = fopen(outfilename, WRITE_BINARY)) == NULL) {
+ fprintf(stderr, "%s: can't open %s for writing\n", progname, outfilename);
+ exit(EXIT_FAILURE);
+ }
+ } else {
+ /* default output file is stdout */
+ fp = write_stdout();
+ }
+
+ /* Adjust default compression parameters by re-parsing the options */
+ file_index = parse_switches(&dstinfo, argc, argv, 0, TRUE);
+
+ /* Specify data destination for compression */
+ jpeg_stdio_dest(&dstinfo, fp);
+
+ /* Start compressor (note no image data is actually written here) */
+ jpeg_write_coefficients(&dstinfo, dst_coef_arrays);
+
+ /* Copy to the output file any extra markers that we want to preserve */
+ jcopy_markers_execute(&srcinfo, &dstinfo, copyoption);
+
+ /* Execute image transformation, if any */
#if TRANSFORMS_SUPPORTED
- jtransform_execute_transformation(&srcinfo, &dstinfo,
- src_coef_arrays,
- &transformoption);
+ jtransform_execute_transformation(&srcinfo, &dstinfo,
+ src_coef_arrays,
+ &transformoption);
#endif
- /* Finish compression and release memory */
- jpeg_finish_compress(&dstinfo);
- jpeg_destroy_compress(&dstinfo);
- (void) jpeg_finish_decompress(&srcinfo);
- jpeg_destroy_decompress(&srcinfo);
+ /* Finish compression and release memory */
+ jpeg_finish_compress(&dstinfo);
+ jpeg_destroy_compress(&dstinfo);
+ (void) jpeg_finish_decompress(&srcinfo);
+ jpeg_destroy_decompress(&srcinfo);
- /* Close output file, if we opened it */
- if (fp != stdout)
- fclose(fp);
+ /* Close output file, if we opened it */
+ if (fp != stdout)
+ fclose(fp);
#ifdef PROGRESS_REPORT
- end_progress_monitor((j_common_ptr) &dstinfo);
+ end_progress_monitor((j_common_ptr) &dstinfo);
#endif
- /* All done. */
- exit(jsrcerr.num_warnings + jdsterr.num_warnings ?EXIT_WARNING:EXIT_SUCCESS);
- return 0; /* suppress no-return-value warnings */
+ /* All done. */
+ exit(jsrcerr.num_warnings + jdsterr.num_warnings ?EXIT_WARNING:EXIT_SUCCESS);
+ return 0; /* suppress no-return-value warnings */
}
diff --git a/src/lib/libjpeg/jquant1.c b/src/lib/libjpeg/jquant1.c
index 40c4cf45f31..284e9e4740d 100644
--- a/src/lib/libjpeg/jquant1.c
+++ b/src/lib/libjpeg/jquant1.c
@@ -68,35 +68,35 @@
* table in both directions.
*/
-#define ODITHER_SIZE 16 /* dimension of dither matrix */
+#define ODITHER_SIZE 16 /* dimension of dither matrix */
/* NB: if ODITHER_SIZE is not a power of 2, ODITHER_MASK uses will break */
-#define ODITHER_CELLS (ODITHER_SIZE*ODITHER_SIZE) /* # cells in matrix */
+#define ODITHER_CELLS (ODITHER_SIZE*ODITHER_SIZE) /* # cells in matrix */
#define ODITHER_MASK (ODITHER_SIZE-1) /* mask for wrapping around counters */
typedef int ODITHER_MATRIX[ODITHER_SIZE][ODITHER_SIZE];
typedef int (*ODITHER_MATRIX_PTR)[ODITHER_SIZE];
static const UINT8 base_dither_matrix[ODITHER_SIZE][ODITHER_SIZE] = {
- /* Bayer's order-4 dither array. Generated by the code given in
- * Stephen Hawley's article "Ordered Dithering" in Graphics Gems I.
- * The values in this array must range from 0 to ODITHER_CELLS-1.
- */
- { 0,192, 48,240, 12,204, 60,252, 3,195, 51,243, 15,207, 63,255 },
- { 128, 64,176,112,140, 76,188,124,131, 67,179,115,143, 79,191,127 },
- { 32,224, 16,208, 44,236, 28,220, 35,227, 19,211, 47,239, 31,223 },
- { 160, 96,144, 80,172,108,156, 92,163, 99,147, 83,175,111,159, 95 },
- { 8,200, 56,248, 4,196, 52,244, 11,203, 59,251, 7,199, 55,247 },
- { 136, 72,184,120,132, 68,180,116,139, 75,187,123,135, 71,183,119 },
- { 40,232, 24,216, 36,228, 20,212, 43,235, 27,219, 39,231, 23,215 },
- { 168,104,152, 88,164,100,148, 84,171,107,155, 91,167,103,151, 87 },
- { 2,194, 50,242, 14,206, 62,254, 1,193, 49,241, 13,205, 61,253 },
- { 130, 66,178,114,142, 78,190,126,129, 65,177,113,141, 77,189,125 },
- { 34,226, 18,210, 46,238, 30,222, 33,225, 17,209, 45,237, 29,221 },
- { 162, 98,146, 82,174,110,158, 94,161, 97,145, 81,173,109,157, 93 },
- { 10,202, 58,250, 6,198, 54,246, 9,201, 57,249, 5,197, 53,245 },
- { 138, 74,186,122,134, 70,182,118,137, 73,185,121,133, 69,181,117 },
- { 42,234, 26,218, 38,230, 22,214, 41,233, 25,217, 37,229, 21,213 },
- { 170,106,154, 90,166,102,150, 86,169,105,153, 89,165,101,149, 85 }
+ /* Bayer's order-4 dither array. Generated by the code given in
+ * Stephen Hawley's article "Ordered Dithering" in Graphics Gems I.
+ * The values in this array must range from 0 to ODITHER_CELLS-1.
+ */
+ { 0,192, 48,240, 12,204, 60,252, 3,195, 51,243, 15,207, 63,255 },
+ { 128, 64,176,112,140, 76,188,124,131, 67,179,115,143, 79,191,127 },
+ { 32,224, 16,208, 44,236, 28,220, 35,227, 19,211, 47,239, 31,223 },
+ { 160, 96,144, 80,172,108,156, 92,163, 99,147, 83,175,111,159, 95 },
+ { 8,200, 56,248, 4,196, 52,244, 11,203, 59,251, 7,199, 55,247 },
+ { 136, 72,184,120,132, 68,180,116,139, 75,187,123,135, 71,183,119 },
+ { 40,232, 24,216, 36,228, 20,212, 43,235, 27,219, 39,231, 23,215 },
+ { 168,104,152, 88,164,100,148, 84,171,107,155, 91,167,103,151, 87 },
+ { 2,194, 50,242, 14,206, 62,254, 1,193, 49,241, 13,205, 61,253 },
+ { 130, 66,178,114,142, 78,190,126,129, 65,177,113,141, 77,189,125 },
+ { 34,226, 18,210, 46,238, 30,222, 33,225, 17,209, 45,237, 29,221 },
+ { 162, 98,146, 82,174,110,158, 94,161, 97,145, 81,173,109,157, 93 },
+ { 10,202, 58,250, 6,198, 54,246, 9,201, 57,249, 5,197, 53,245 },
+ { 138, 74,186,122,134, 70,182,118,137, 73,185,121,133, 69,181,117 },
+ { 42,234, 26,218, 38,230, 22,214, 41,233, 25,217, 37,229, 21,213 },
+ { 170,106,154, 90,166,102,150, 86,169,105,153, 89,165,101,149, 85 }
};
@@ -125,43 +125,43 @@ static const UINT8 base_dither_matrix[ODITHER_SIZE][ODITHER_SIZE] = {
*/
#if BITS_IN_JSAMPLE == 8
-typedef INT16 FSERROR; /* 16 bits should be enough */
-typedef int LOCFSERROR; /* use 'int' for calculation temps */
+typedef INT16 FSERROR; /* 16 bits should be enough */
+typedef int LOCFSERROR; /* use 'int' for calculation temps */
#else
-typedef INT32 FSERROR; /* may need more than 16 bits */
-typedef INT32 LOCFSERROR; /* be sure calculation temps are big enough */
+typedef INT32 FSERROR; /* may need more than 16 bits */
+typedef INT32 LOCFSERROR; /* be sure calculation temps are big enough */
#endif
-typedef FSERROR FAR *FSERRPTR; /* pointer to error array (in FAR storage!) */
+typedef FSERROR FAR *FSERRPTR; /* pointer to error array (in FAR storage!) */
/* Private subobject */
-#define MAX_Q_COMPS 4 /* max components I can handle */
+#define MAX_Q_COMPS 4 /* max components I can handle */
typedef struct {
- struct jpeg_color_quantizer pub; /* public fields */
+ struct jpeg_color_quantizer pub; /* public fields */
- /* Initially allocated colormap is saved here */
- JSAMPARRAY sv_colormap; /* The color map as a 2-D pixel array */
- int sv_actual; /* number of entries in use */
+ /* Initially allocated colormap is saved here */
+ JSAMPARRAY sv_colormap; /* The color map as a 2-D pixel array */
+ int sv_actual; /* number of entries in use */
- JSAMPARRAY colorindex; /* Precomputed mapping for speed */
- /* colorindex[i][j] = index of color closest to pixel value j in component i,
- * premultiplied as described above. Since colormap indexes must fit into
- * JSAMPLEs, the entries of this array will too.
- */
- boolean is_padded; /* is the colorindex padded for odither? */
+ JSAMPARRAY colorindex; /* Precomputed mapping for speed */
+ /* colorindex[i][j] = index of color closest to pixel value j in component i,
+ * premultiplied as described above. Since colormap indexes must fit into
+ * JSAMPLEs, the entries of this array will too.
+ */
+ boolean is_padded; /* is the colorindex padded for odither? */
- int Ncolors[MAX_Q_COMPS]; /* # of values alloced to each component */
+ int Ncolors[MAX_Q_COMPS]; /* # of values alloced to each component */
- /* Variables for ordered dithering */
- int row_index; /* cur row's vertical index in dither matrix */
- ODITHER_MATRIX_PTR odither[MAX_Q_COMPS]; /* one dither array per component */
+ /* Variables for ordered dithering */
+ int row_index; /* cur row's vertical index in dither matrix */
+ ODITHER_MATRIX_PTR odither[MAX_Q_COMPS]; /* one dither array per component */
- /* Variables for Floyd-Steinberg dithering */
- FSERRPTR fserrors[MAX_Q_COMPS]; /* accumulated errors */
- boolean on_odd_row; /* flag to remember which row we are on */
+ /* Variables for Floyd-Steinberg dithering */
+ FSERRPTR fserrors[MAX_Q_COMPS]; /* accumulated errors */
+ boolean on_odd_row; /* flag to remember which row we are on */
} my_cquantizer;
typedef my_cquantizer * my_cquantize_ptr;
@@ -188,56 +188,56 @@ select_ncolors (j_decompress_ptr cinfo, int Ncolors[])
/* and fill in Ncolors[] array to indicate choice. */
/* Return value is total number of colors (product of Ncolors[] values). */
{
- int nc = cinfo->out_color_components; /* number of color components */
- int max_colors = cinfo->desired_number_of_colors;
- int total_colors, iroot, i, j;
- boolean changed;
- long temp;
- static const int RGB_order[3] = { RGB_GREEN, RGB_RED, RGB_BLUE };
-
- /* We can allocate at least the nc'th root of max_colors per component. */
- /* Compute floor(nc'th root of max_colors). */
- iroot = 1;
- do {
- iroot++;
- temp = iroot; /* set temp = iroot ** nc */
- for (i = 1; i < nc; i++)
- temp *= iroot;
- } while (temp <= (long) max_colors); /* repeat till iroot exceeds root */
- iroot--; /* now iroot = floor(root) */
-
- /* Must have at least 2 color values per component */
- if (iroot < 2)
- ERREXIT1(cinfo, JERR_QUANT_FEW_COLORS, (int) temp);
-
- /* Initialize to iroot color values for each component */
- total_colors = 1;
- for (i = 0; i < nc; i++) {
- Ncolors[i] = iroot;
- total_colors *= iroot;
- }
- /* We may be able to increment the count for one or more components without
- * exceeding max_colors, though we know not all can be incremented.
- * Sometimes, the first component can be incremented more than once!
- * (Example: for 16 colors, we start at 2*2*2, go to 3*2*2, then 4*2*2.)
- * In RGB colorspace, try to increment G first, then R, then B.
- */
- do {
- changed = FALSE;
- for (i = 0; i < nc; i++) {
- j = (cinfo->out_color_space == JCS_RGB ? RGB_order[i] : i);
- /* calculate new total_colors if Ncolors[j] is incremented */
- temp = total_colors / Ncolors[j];
- temp *= Ncolors[j]+1; /* done in long arith to avoid oflo */
- if (temp > (long) max_colors)
- break; /* won't fit, done with this pass */
- Ncolors[j]++; /* OK, apply the increment */
- total_colors = (int) temp;
- changed = TRUE;
- }
- } while (changed);
-
- return total_colors;
+ int nc = cinfo->out_color_components; /* number of color components */
+ int max_colors = cinfo->desired_number_of_colors;
+ int total_colors, iroot, i, j;
+ boolean changed;
+ long temp;
+ static const int RGB_order[3] = { RGB_GREEN, RGB_RED, RGB_BLUE };
+
+ /* We can allocate at least the nc'th root of max_colors per component. */
+ /* Compute floor(nc'th root of max_colors). */
+ iroot = 1;
+ do {
+ iroot++;
+ temp = iroot; /* set temp = iroot ** nc */
+ for (i = 1; i < nc; i++)
+ temp *= iroot;
+ } while (temp <= (long) max_colors); /* repeat till iroot exceeds root */
+ iroot--; /* now iroot = floor(root) */
+
+ /* Must have at least 2 color values per component */
+ if (iroot < 2)
+ ERREXIT1(cinfo, JERR_QUANT_FEW_COLORS, (int) temp);
+
+ /* Initialize to iroot color values for each component */
+ total_colors = 1;
+ for (i = 0; i < nc; i++) {
+ Ncolors[i] = iroot;
+ total_colors *= iroot;
+ }
+ /* We may be able to increment the count for one or more components without
+ * exceeding max_colors, though we know not all can be incremented.
+ * Sometimes, the first component can be incremented more than once!
+ * (Example: for 16 colors, we start at 2*2*2, go to 3*2*2, then 4*2*2.)
+ * In RGB colorspace, try to increment G first, then R, then B.
+ */
+ do {
+ changed = FALSE;
+ for (i = 0; i < nc; i++) {
+ j = (cinfo->out_color_space == JCS_RGB ? RGB_order[i] : i);
+ /* calculate new total_colors if Ncolors[j] is incremented */
+ temp = total_colors / Ncolors[j];
+ temp *= Ncolors[j]+1; /* done in long arith to avoid oflo */
+ if (temp > (long) max_colors)
+ break; /* won't fit, done with this pass */
+ Ncolors[j]++; /* OK, apply the increment */
+ total_colors = (int) temp;
+ changed = TRUE;
+ }
+ } while (changed);
+
+ return total_colors;
}
@@ -246,12 +246,12 @@ output_value (j_decompress_ptr cinfo, int ci, int j, int maxj)
/* Return j'th output value, where j will range from 0 to maxj */
/* The output values must fall in 0..MAXJSAMPLE in increasing order */
{
- /* We always provide values 0 and MAXJSAMPLE for each component;
- * any additional values are equally spaced between these limits.
- * (Forcing the upper and lower values to the limits ensures that
- * dithering can't produce a color outside the selected gamut.)
- */
- return (int) (((INT32) j * MAXJSAMPLE + maxj/2) / maxj);
+ /* We always provide values 0 and MAXJSAMPLE for each component;
+ * any additional values are equally spaced between these limits.
+ * (Forcing the upper and lower values to the limits ensures that
+ * dithering can't produce a color outside the selected gamut.)
+ */
+ return (int) (((INT32) j * MAXJSAMPLE + maxj/2) / maxj);
}
@@ -260,8 +260,8 @@ largest_input_value (j_decompress_ptr cinfo, int ci, int j, int maxj)
/* Return largest input value that should map to j'th output value */
/* Must have largest(j=0) >= 0, and largest(j=maxj) >= MAXJSAMPLE */
{
- /* Breakpoints are halfway between values returned by output_value */
- return (int) (((INT32) (2*j + 1) * MAXJSAMPLE + maxj) / (2*maxj));
+ /* Breakpoints are halfway between values returned by output_value */
+ return (int) (((INT32) (2*j + 1) * MAXJSAMPLE + maxj) / (2*maxj));
}
@@ -272,56 +272,56 @@ largest_input_value (j_decompress_ptr cinfo, int ci, int j, int maxj)
LOCAL(void)
create_colormap (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- JSAMPARRAY colormap; /* Created colormap */
- int total_colors; /* Number of distinct output colors */
- int i,j,k, nci, blksize, blkdist, ptr, val;
-
- /* Select number of colors for each component */
- total_colors = select_ncolors(cinfo, cquantize->Ncolors);
-
- /* Report selected color counts */
- if (cinfo->out_color_components == 3)
- TRACEMS4(cinfo, 1, JTRC_QUANT_3_NCOLORS,
- total_colors, cquantize->Ncolors[0],
- cquantize->Ncolors[1], cquantize->Ncolors[2]);
- else
- TRACEMS1(cinfo, 1, JTRC_QUANT_NCOLORS, total_colors);
-
- /* Allocate and fill in the colormap. */
- /* The colors are ordered in the map in standard row-major order, */
- /* i.e. rightmost (highest-indexed) color changes most rapidly. */
-
- colormap = (*cinfo->mem->alloc_sarray)
- ((j_common_ptr) cinfo, JPOOL_IMAGE,
- (JDIMENSION) total_colors, (JDIMENSION) cinfo->out_color_components);
-
- /* blksize is number of adjacent repeated entries for a component */
- /* blkdist is distance between groups of identical entries for a component */
- blkdist = total_colors;
-
- for (i = 0; i < cinfo->out_color_components; i++) {
- /* fill in colormap entries for i'th color component */
- nci = cquantize->Ncolors[i]; /* # of distinct values for this color */
- blksize = blkdist / nci;
- for (j = 0; j < nci; j++) {
- /* Compute j'th output value (out of nci) for component */
- val = output_value(cinfo, i, j, nci-1);
- /* Fill in all colormap entries that have this value of this component */
- for (ptr = j * blksize; ptr < total_colors; ptr += blkdist) {
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ JSAMPARRAY colormap; /* Created colormap */
+ int total_colors; /* Number of distinct output colors */
+ int i,j,k, nci, blksize, blkdist, ptr, val;
+
+ /* Select number of colors for each component */
+ total_colors = select_ncolors(cinfo, cquantize->Ncolors);
+
+ /* Report selected color counts */
+ if (cinfo->out_color_components == 3)
+ TRACEMS4(cinfo, 1, JTRC_QUANT_3_NCOLORS,
+ total_colors, cquantize->Ncolors[0],
+ cquantize->Ncolors[1], cquantize->Ncolors[2]);
+ else
+ TRACEMS1(cinfo, 1, JTRC_QUANT_NCOLORS, total_colors);
+
+ /* Allocate and fill in the colormap. */
+ /* The colors are ordered in the map in standard row-major order, */
+ /* i.e. rightmost (highest-indexed) color changes most rapidly. */
+
+ colormap = (*cinfo->mem->alloc_sarray)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ (JDIMENSION) total_colors, (JDIMENSION) cinfo->out_color_components);
+
+ /* blksize is number of adjacent repeated entries for a component */
+ /* blkdist is distance between groups of identical entries for a component */
+ blkdist = total_colors;
+
+ for (i = 0; i < cinfo->out_color_components; i++) {
+ /* fill in colormap entries for i'th color component */
+ nci = cquantize->Ncolors[i]; /* # of distinct values for this color */
+ blksize = blkdist / nci;
+ for (j = 0; j < nci; j++) {
+ /* Compute j'th output value (out of nci) for component */
+ val = output_value(cinfo, i, j, nci-1);
+ /* Fill in all colormap entries that have this value of this component */
+ for (ptr = j * blksize; ptr < total_colors; ptr += blkdist) {
/* fill in blksize entries beginning at ptr */
for (k = 0; k < blksize; k++)
- colormap[i][ptr+k] = (JSAMPLE) val;
- }
- }
- blkdist = blksize; /* blksize of this color is blkdist of next */
- }
-
- /* Save the colormap in private storage,
- * where it will survive color quantization mode changes.
- */
- cquantize->sv_colormap = colormap;
- cquantize->sv_actual = total_colors;
+ colormap[i][ptr+k] = (JSAMPLE) val;
+ }
+ }
+ blkdist = blksize; /* blksize of this color is blkdist of next */
+ }
+
+ /* Save the colormap in private storage,
+ * where it will survive color quantization mode changes.
+ */
+ cquantize->sv_colormap = colormap;
+ cquantize->sv_actual = total_colors;
}
@@ -332,58 +332,58 @@ create_colormap (j_decompress_ptr cinfo)
LOCAL(void)
create_colorindex (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- JSAMPROW indexptr;
- int i,j,k, nci, blksize, val, pad;
-
- /* For ordered dither, we pad the color index tables by MAXJSAMPLE in
- * each direction (input index values can be -MAXJSAMPLE .. 2*MAXJSAMPLE).
- * This is not necessary in the other dithering modes. However, we
- * flag whether it was done in case user changes dithering mode.
- */
- if (cinfo->dither_mode == JDITHER_ORDERED) {
- pad = MAXJSAMPLE*2;
- cquantize->is_padded = TRUE;
- } else {
- pad = 0;
- cquantize->is_padded = FALSE;
- }
-
- cquantize->colorindex = (*cinfo->mem->alloc_sarray)
- ((j_common_ptr) cinfo, JPOOL_IMAGE,
- (JDIMENSION) (MAXJSAMPLE+1 + pad),
- (JDIMENSION) cinfo->out_color_components);
-
- /* blksize is number of adjacent repeated entries for a component */
- blksize = cquantize->sv_actual;
-
- for (i = 0; i < cinfo->out_color_components; i++) {
- /* fill in colorindex entries for i'th color component */
- nci = cquantize->Ncolors[i]; /* # of distinct values for this color */
- blksize = blksize / nci;
-
- /* adjust colorindex pointers to provide padding at negative indexes. */
- if (pad)
- cquantize->colorindex[i] += MAXJSAMPLE;
-
- /* in loop, val = index of current output value, */
- /* and k = largest j that maps to current val */
- indexptr = cquantize->colorindex[i];
- val = 0;
- k = largest_input_value(cinfo, i, 0, nci-1);
- for (j = 0; j <= MAXJSAMPLE; j++) {
- while (j > k) /* advance val if past boundary */
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ JSAMPROW indexptr;
+ int i,j,k, nci, blksize, val, pad;
+
+ /* For ordered dither, we pad the color index tables by MAXJSAMPLE in
+ * each direction (input index values can be -MAXJSAMPLE .. 2*MAXJSAMPLE).
+ * This is not necessary in the other dithering modes. However, we
+ * flag whether it was done in case user changes dithering mode.
+ */
+ if (cinfo->dither_mode == JDITHER_ORDERED) {
+ pad = MAXJSAMPLE*2;
+ cquantize->is_padded = TRUE;
+ } else {
+ pad = 0;
+ cquantize->is_padded = FALSE;
+ }
+
+ cquantize->colorindex = (*cinfo->mem->alloc_sarray)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ (JDIMENSION) (MAXJSAMPLE+1 + pad),
+ (JDIMENSION) cinfo->out_color_components);
+
+ /* blksize is number of adjacent repeated entries for a component */
+ blksize = cquantize->sv_actual;
+
+ for (i = 0; i < cinfo->out_color_components; i++) {
+ /* fill in colorindex entries for i'th color component */
+ nci = cquantize->Ncolors[i]; /* # of distinct values for this color */
+ blksize = blksize / nci;
+
+ /* adjust colorindex pointers to provide padding at negative indexes. */
+ if (pad)
+ cquantize->colorindex[i] += MAXJSAMPLE;
+
+ /* in loop, val = index of current output value, */
+ /* and k = largest j that maps to current val */
+ indexptr = cquantize->colorindex[i];
+ val = 0;
+ k = largest_input_value(cinfo, i, 0, nci-1);
+ for (j = 0; j <= MAXJSAMPLE; j++) {
+ while (j > k) /* advance val if past boundary */
k = largest_input_value(cinfo, i, ++val, nci-1);
- /* premultiply so that no multiplication needed in main processing */
- indexptr[j] = (JSAMPLE) (val * blksize);
- }
- /* Pad at both ends if necessary */
- if (pad)
- for (j = 1; j <= MAXJSAMPLE; j++) {
+ /* premultiply so that no multiplication needed in main processing */
+ indexptr[j] = (JSAMPLE) (val * blksize);
+ }
+ /* Pad at both ends if necessary */
+ if (pad)
+ for (j = 1; j <= MAXJSAMPLE; j++) {
indexptr[-j] = indexptr[0];
indexptr[MAXJSAMPLE+j] = indexptr[MAXJSAMPLE];
- }
- }
+ }
+ }
}
@@ -395,30 +395,30 @@ create_colorindex (j_decompress_ptr cinfo)
LOCAL(ODITHER_MATRIX_PTR)
make_odither_array (j_decompress_ptr cinfo, int ncolors)
{
- ODITHER_MATRIX_PTR odither;
- int j,k;
- INT32 num,den;
+ ODITHER_MATRIX_PTR odither;
+ int j,k;
+ INT32 num,den;
- odither = (ODITHER_MATRIX_PTR)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ odither = (ODITHER_MATRIX_PTR)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(ODITHER_MATRIX));
- /* The inter-value distance for this color is MAXJSAMPLE/(ncolors-1).
- * Hence the dither value for the matrix cell with fill order f
- * (f=0..N-1) should be (N-1-2*f)/(2*N) * MAXJSAMPLE/(ncolors-1).
- * On 16-bit-int machine, be careful to avoid overflow.
- */
- den = 2 * ODITHER_CELLS * ((INT32) (ncolors - 1));
- for (j = 0; j < ODITHER_SIZE; j++) {
- for (k = 0; k < ODITHER_SIZE; k++) {
- num = ((INT32) (ODITHER_CELLS-1 - 2*((int)base_dither_matrix[j][k])))
- * MAXJSAMPLE;
- /* Ensure round towards zero despite C's lack of consistency
- * about rounding negative values in integer division...
- */
- odither[j][k] = (int) (num<0 ? -((-num)/den) : num/den);
- }
- }
- return odither;
+ /* The inter-value distance for this color is MAXJSAMPLE/(ncolors-1).
+ * Hence the dither value for the matrix cell with fill order f
+ * (f=0..N-1) should be (N-1-2*f)/(2*N) * MAXJSAMPLE/(ncolors-1).
+ * On 16-bit-int machine, be careful to avoid overflow.
+ */
+ den = 2 * ODITHER_CELLS * ((INT32) (ncolors - 1));
+ for (j = 0; j < ODITHER_SIZE; j++) {
+ for (k = 0; k < ODITHER_SIZE; k++) {
+ num = ((INT32) (ODITHER_CELLS-1 - 2*((int)base_dither_matrix[j][k])))
+ * MAXJSAMPLE;
+ /* Ensure round towards zero despite C's lack of consistency
+ * about rounding negative values in integer division...
+ */
+ odither[j][k] = (int) (num<0 ? -((-num)/den) : num/den);
+ }
+ }
+ return odither;
}
@@ -431,23 +431,23 @@ make_odither_array (j_decompress_ptr cinfo, int ncolors)
LOCAL(void)
create_odither_tables (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- ODITHER_MATRIX_PTR odither;
- int i, j, nci;
-
- for (i = 0; i < cinfo->out_color_components; i++) {
- nci = cquantize->Ncolors[i]; /* # of distinct values for this color */
- odither = NULL; /* search for matching prior component */
- for (j = 0; j < i; j++) {
- if (nci == cquantize->Ncolors[j]) {
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ ODITHER_MATRIX_PTR odither;
+ int i, j, nci;
+
+ for (i = 0; i < cinfo->out_color_components; i++) {
+ nci = cquantize->Ncolors[i]; /* # of distinct values for this color */
+ odither = NULL; /* search for matching prior component */
+ for (j = 0; j < i; j++) {
+ if (nci == cquantize->Ncolors[j]) {
odither = cquantize->odither[j];
break;
- }
- }
- if (odither == NULL) /* need a new table? */
- odither = make_odither_array(cinfo, nci);
- cquantize->odither[i] = odither;
- }
+ }
+ }
+ if (odither == NULL) /* need a new table? */
+ odither = make_odither_array(cinfo, nci);
+ cquantize->odither[i] = odither;
+ }
}
@@ -460,220 +460,220 @@ color_quantize (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
JSAMPARRAY output_buf, int num_rows)
/* General case, no dithering */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- JSAMPARRAY colorindex = cquantize->colorindex;
- register int pixcode, ci;
- register JSAMPROW ptrin, ptrout;
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
- register int nc = cinfo->out_color_components;
-
- for (row = 0; row < num_rows; row++) {
- ptrin = input_buf[row];
- ptrout = output_buf[row];
- for (col = width; col > 0; col--) {
- pixcode = 0;
- for (ci = 0; ci < nc; ci++) {
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ JSAMPARRAY colorindex = cquantize->colorindex;
+ register int pixcode, ci;
+ register JSAMPROW ptrin, ptrout;
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+ register int nc = cinfo->out_color_components;
+
+ for (row = 0; row < num_rows; row++) {
+ ptrin = input_buf[row];
+ ptrout = output_buf[row];
+ for (col = width; col > 0; col--) {
+ pixcode = 0;
+ for (ci = 0; ci < nc; ci++) {
pixcode += GETJSAMPLE(colorindex[ci][GETJSAMPLE(*ptrin++)]);
- }
- *ptrout++ = (JSAMPLE) pixcode;
- }
- }
+ }
+ *ptrout++ = (JSAMPLE) pixcode;
+ }
+ }
}
METHODDEF(void)
color_quantize3 (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPARRAY output_buf, int num_rows)
/* Fast path for out_color_components==3, no dithering */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- register int pixcode;
- register JSAMPROW ptrin, ptrout;
- JSAMPROW colorindex0 = cquantize->colorindex[0];
- JSAMPROW colorindex1 = cquantize->colorindex[1];
- JSAMPROW colorindex2 = cquantize->colorindex[2];
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
-
- for (row = 0; row < num_rows; row++) {
- ptrin = input_buf[row];
- ptrout = output_buf[row];
- for (col = width; col > 0; col--) {
- pixcode = GETJSAMPLE(colorindex0[GETJSAMPLE(*ptrin++)]);
- pixcode += GETJSAMPLE(colorindex1[GETJSAMPLE(*ptrin++)]);
- pixcode += GETJSAMPLE(colorindex2[GETJSAMPLE(*ptrin++)]);
- *ptrout++ = (JSAMPLE) pixcode;
- }
- }
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ register int pixcode;
+ register JSAMPROW ptrin, ptrout;
+ JSAMPROW colorindex0 = cquantize->colorindex[0];
+ JSAMPROW colorindex1 = cquantize->colorindex[1];
+ JSAMPROW colorindex2 = cquantize->colorindex[2];
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+
+ for (row = 0; row < num_rows; row++) {
+ ptrin = input_buf[row];
+ ptrout = output_buf[row];
+ for (col = width; col > 0; col--) {
+ pixcode = GETJSAMPLE(colorindex0[GETJSAMPLE(*ptrin++)]);
+ pixcode += GETJSAMPLE(colorindex1[GETJSAMPLE(*ptrin++)]);
+ pixcode += GETJSAMPLE(colorindex2[GETJSAMPLE(*ptrin++)]);
+ *ptrout++ = (JSAMPLE) pixcode;
+ }
+ }
}
METHODDEF(void)
quantize_ord_dither (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPARRAY output_buf, int num_rows)
/* General case, with ordered dithering */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- register JSAMPROW input_ptr;
- register JSAMPROW output_ptr;
- JSAMPROW colorindex_ci;
- int * dither; /* points to active row of dither matrix */
- int row_index, col_index; /* current indexes into dither matrix */
- int nc = cinfo->out_color_components;
- int ci;
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
-
- for (row = 0; row < num_rows; row++) {
- /* Initialize output values to 0 so can process components separately */
- jzero_far((void FAR *) output_buf[row],
- (size_t) (width * SIZEOF(JSAMPLE)));
- row_index = cquantize->row_index;
- for (ci = 0; ci < nc; ci++) {
- input_ptr = input_buf[row] + ci;
- output_ptr = output_buf[row];
- colorindex_ci = cquantize->colorindex[ci];
- dither = cquantize->odither[ci][row_index];
- col_index = 0;
-
- for (col = width; col > 0; col--) {
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ register JSAMPROW input_ptr;
+ register JSAMPROW output_ptr;
+ JSAMPROW colorindex_ci;
+ int * dither; /* points to active row of dither matrix */
+ int row_index, col_index; /* current indexes into dither matrix */
+ int nc = cinfo->out_color_components;
+ int ci;
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+
+ for (row = 0; row < num_rows; row++) {
+ /* Initialize output values to 0 so can process components separately */
+ jzero_far((void FAR *) output_buf[row],
+ (size_t) (width * SIZEOF(JSAMPLE)));
+ row_index = cquantize->row_index;
+ for (ci = 0; ci < nc; ci++) {
+ input_ptr = input_buf[row] + ci;
+ output_ptr = output_buf[row];
+ colorindex_ci = cquantize->colorindex[ci];
+ dither = cquantize->odither[ci][row_index];
+ col_index = 0;
+
+ for (col = width; col > 0; col--) {
/* Form pixel value + dither, range-limit to 0..MAXJSAMPLE,
- * select output value, accumulate into output code for this pixel.
- * Range-limiting need not be done explicitly, as we have extended
- * the colorindex table to produce the right answers for out-of-range
- * inputs. The maximum dither is +- MAXJSAMPLE; this sets the
- * required amount of padding.
- */
+ * select output value, accumulate into output code for this pixel.
+ * Range-limiting need not be done explicitly, as we have extended
+ * the colorindex table to produce the right answers for out-of-range
+ * inputs. The maximum dither is +- MAXJSAMPLE; this sets the
+ * required amount of padding.
+ */
*output_ptr += colorindex_ci[GETJSAMPLE(*input_ptr)+dither[col_index]];
input_ptr += nc;
output_ptr++;
col_index = (col_index + 1) & ODITHER_MASK;
- }
- }
- /* Advance row index for next row */
- row_index = (row_index + 1) & ODITHER_MASK;
- cquantize->row_index = row_index;
- }
+ }
+ }
+ /* Advance row index for next row */
+ row_index = (row_index + 1) & ODITHER_MASK;
+ cquantize->row_index = row_index;
+ }
}
METHODDEF(void)
quantize3_ord_dither (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPARRAY output_buf, int num_rows)
/* Fast path for out_color_components==3, with ordered dithering */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- register int pixcode;
- register JSAMPROW input_ptr;
- register JSAMPROW output_ptr;
- JSAMPROW colorindex0 = cquantize->colorindex[0];
- JSAMPROW colorindex1 = cquantize->colorindex[1];
- JSAMPROW colorindex2 = cquantize->colorindex[2];
- int * dither0; /* points to active row of dither matrix */
- int * dither1;
- int * dither2;
- int row_index, col_index; /* current indexes into dither matrix */
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
-
- for (row = 0; row < num_rows; row++) {
- row_index = cquantize->row_index;
- input_ptr = input_buf[row];
- output_ptr = output_buf[row];
- dither0 = cquantize->odither[0][row_index];
- dither1 = cquantize->odither[1][row_index];
- dither2 = cquantize->odither[2][row_index];
- col_index = 0;
-
- for (col = width; col > 0; col--) {
- pixcode = GETJSAMPLE(colorindex0[GETJSAMPLE(*input_ptr++) +
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ register int pixcode;
+ register JSAMPROW input_ptr;
+ register JSAMPROW output_ptr;
+ JSAMPROW colorindex0 = cquantize->colorindex[0];
+ JSAMPROW colorindex1 = cquantize->colorindex[1];
+ JSAMPROW colorindex2 = cquantize->colorindex[2];
+ int * dither0; /* points to active row of dither matrix */
+ int * dither1;
+ int * dither2;
+ int row_index, col_index; /* current indexes into dither matrix */
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+
+ for (row = 0; row < num_rows; row++) {
+ row_index = cquantize->row_index;
+ input_ptr = input_buf[row];
+ output_ptr = output_buf[row];
+ dither0 = cquantize->odither[0][row_index];
+ dither1 = cquantize->odither[1][row_index];
+ dither2 = cquantize->odither[2][row_index];
+ col_index = 0;
+
+ for (col = width; col > 0; col--) {
+ pixcode = GETJSAMPLE(colorindex0[GETJSAMPLE(*input_ptr++) +
dither0[col_index]]);
- pixcode += GETJSAMPLE(colorindex1[GETJSAMPLE(*input_ptr++) +
+ pixcode += GETJSAMPLE(colorindex1[GETJSAMPLE(*input_ptr++) +
dither1[col_index]]);
- pixcode += GETJSAMPLE(colorindex2[GETJSAMPLE(*input_ptr++) +
+ pixcode += GETJSAMPLE(colorindex2[GETJSAMPLE(*input_ptr++) +
dither2[col_index]]);
- *output_ptr++ = (JSAMPLE) pixcode;
- col_index = (col_index + 1) & ODITHER_MASK;
- }
- row_index = (row_index + 1) & ODITHER_MASK;
- cquantize->row_index = row_index;
- }
+ *output_ptr++ = (JSAMPLE) pixcode;
+ col_index = (col_index + 1) & ODITHER_MASK;
+ }
+ row_index = (row_index + 1) & ODITHER_MASK;
+ cquantize->row_index = row_index;
+ }
}
METHODDEF(void)
quantize_fs_dither (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPARRAY output_buf, int num_rows)
/* General case, with Floyd-Steinberg dithering */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- register LOCFSERROR cur; /* current error or pixel value */
- LOCFSERROR belowerr; /* error for pixel below cur */
- LOCFSERROR bpreverr; /* error for below/prev col */
- LOCFSERROR bnexterr; /* error for below/next col */
- LOCFSERROR delta;
- register FSERRPTR errorptr; /* => fserrors[] at column before current */
- register JSAMPROW input_ptr;
- register JSAMPROW output_ptr;
- JSAMPROW colorindex_ci;
- JSAMPROW colormap_ci;
- int pixcode;
- int nc = cinfo->out_color_components;
- int dir; /* 1 for left-to-right, -1 for right-to-left */
- int dirnc; /* dir * nc */
- int ci;
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
- JSAMPLE *range_limit = cinfo->sample_range_limit;
- SHIFT_TEMPS
-
- for (row = 0; row < num_rows; row++) {
- /* Initialize output values to 0 so can process components separately */
- jzero_far((void FAR *) output_buf[row],
- (size_t) (width * SIZEOF(JSAMPLE)));
- for (ci = 0; ci < nc; ci++) {
- input_ptr = input_buf[row] + ci;
- output_ptr = output_buf[row];
- if (cquantize->on_odd_row) {
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ register LOCFSERROR cur; /* current error or pixel value */
+ LOCFSERROR belowerr; /* error for pixel below cur */
+ LOCFSERROR bpreverr; /* error for below/prev col */
+ LOCFSERROR bnexterr; /* error for below/next col */
+ LOCFSERROR delta;
+ register FSERRPTR errorptr; /* => fserrors[] at column before current */
+ register JSAMPROW input_ptr;
+ register JSAMPROW output_ptr;
+ JSAMPROW colorindex_ci;
+ JSAMPROW colormap_ci;
+ int pixcode;
+ int nc = cinfo->out_color_components;
+ int dir; /* 1 for left-to-right, -1 for right-to-left */
+ int dirnc; /* dir * nc */
+ int ci;
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+ JSAMPLE *range_limit = cinfo->sample_range_limit;
+ SHIFT_TEMPS
+
+ for (row = 0; row < num_rows; row++) {
+ /* Initialize output values to 0 so can process components separately */
+ jzero_far((void FAR *) output_buf[row],
+ (size_t) (width * SIZEOF(JSAMPLE)));
+ for (ci = 0; ci < nc; ci++) {
+ input_ptr = input_buf[row] + ci;
+ output_ptr = output_buf[row];
+ if (cquantize->on_odd_row) {
/* work right to left in this row */
input_ptr += (width-1) * nc; /* so point to rightmost pixel */
output_ptr += width-1;
dir = -1;
dirnc = -nc;
errorptr = cquantize->fserrors[ci] + (width+1); /* => entry after last column */
- } else {
+ } else {
/* work left to right in this row */
dir = 1;
dirnc = nc;
errorptr = cquantize->fserrors[ci]; /* => entry before first column */
- }
- colorindex_ci = cquantize->colorindex[ci];
- colormap_ci = cquantize->sv_colormap[ci];
- /* Preset error values: no error propagated to first pixel from left */
- cur = 0;
- /* and no error propagated to row below yet */
- belowerr = bpreverr = 0;
-
- for (col = width; col > 0; col--) {
+ }
+ colorindex_ci = cquantize->colorindex[ci];
+ colormap_ci = cquantize->sv_colormap[ci];
+ /* Preset error values: no error propagated to first pixel from left */
+ cur = 0;
+ /* and no error propagated to row below yet */
+ belowerr = bpreverr = 0;
+
+ for (col = width; col > 0; col--) {
/* cur holds the error propagated from the previous pixel on the
- * current line. Add the error propagated from the previous line
- * to form the complete error correction term for this pixel, and
- * round the error term (which is expressed * 16) to an integer.
- * RIGHT_SHIFT rounds towards minus infinity, so adding 8 is correct
- * for either sign of the error value.
- * Note: errorptr points to *previous* column's array entry.
- */
+ * current line. Add the error propagated from the previous line
+ * to form the complete error correction term for this pixel, and
+ * round the error term (which is expressed * 16) to an integer.
+ * RIGHT_SHIFT rounds towards minus infinity, so adding 8 is correct
+ * for either sign of the error value.
+ * Note: errorptr points to *previous* column's array entry.
+ */
cur = RIGHT_SHIFT(cur + errorptr[dir] + 8, 4);
/* Form pixel value + error, and range-limit to 0..MAXJSAMPLE.
- * The maximum error is +- MAXJSAMPLE; this sets the required size
- * of the range_limit array.
- */
+ * The maximum error is +- MAXJSAMPLE; this sets the required size
+ * of the range_limit array.
+ */
cur += GETJSAMPLE(*input_ptr);
cur = GETJSAMPLE(range_limit[cur]);
/* Select output value, accumulate into output code for this pixel */
@@ -684,33 +684,33 @@ quantize_fs_dither (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
/* pixel code, because the colormap is orthogonal. */
cur -= GETJSAMPLE(colormap_ci[pixcode]);
/* Compute error fractions to be propagated to adjacent pixels.
- * Add these into the running sums, and simultaneously shift the
- * next-line error sums left by 1 column.
- */
+ * Add these into the running sums, and simultaneously shift the
+ * next-line error sums left by 1 column.
+ */
bnexterr = cur;
delta = cur * 2;
- cur += delta; /* form error * 3 */
+ cur += delta; /* form error * 3 */
errorptr[0] = (FSERROR) (bpreverr + cur);
- cur += delta; /* form error * 5 */
+ cur += delta; /* form error * 5 */
bpreverr = belowerr + cur;
belowerr = bnexterr;
- cur += delta; /* form error * 7 */
+ cur += delta; /* form error * 7 */
/* At this point cur contains the 7/16 error value to be propagated
- * to the next pixel on the current line, and all the errors for the
- * next line have been shifted over. We are therefore ready to move on.
- */
- input_ptr += dirnc; /* advance input ptr to next column */
- output_ptr += dir; /* advance output ptr to next column */
- errorptr += dir; /* advance errorptr to current column */
- }
- /* Post-loop cleanup: we must unload the final error value into the
- * final fserrors[] entry. Note we need not unload belowerr because
- * it is for the dummy column before or after the actual array.
- */
- errorptr[0] = (FSERROR) bpreverr; /* unload prev err into array */
- }
- cquantize->on_odd_row = (cquantize->on_odd_row ? FALSE : TRUE);
- }
+ * to the next pixel on the current line, and all the errors for the
+ * next line have been shifted over. We are therefore ready to move on.
+ */
+ input_ptr += dirnc; /* advance input ptr to next column */
+ output_ptr += dir; /* advance output ptr to next column */
+ errorptr += dir; /* advance errorptr to current column */
+ }
+ /* Post-loop cleanup: we must unload the final error value into the
+ * final fserrors[] entry. Note we need not unload belowerr because
+ * it is for the dummy column before or after the actual array.
+ */
+ errorptr[0] = (FSERROR) bpreverr; /* unload prev err into array */
+ }
+ cquantize->on_odd_row = (cquantize->on_odd_row ? FALSE : TRUE);
+ }
}
@@ -721,15 +721,15 @@ quantize_fs_dither (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
LOCAL(void)
alloc_fs_workspace (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- size_t arraysize;
- int i;
-
- arraysize = (size_t) ((cinfo->output_width + 2) * SIZEOF(FSERROR));
- for (i = 0; i < cinfo->out_color_components; i++) {
- cquantize->fserrors[i] = (FSERRPTR)
- (*cinfo->mem->alloc_large)((j_common_ptr) cinfo, JPOOL_IMAGE, arraysize);
- }
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ size_t arraysize;
+ int i;
+
+ arraysize = (size_t) ((cinfo->output_width + 2) * SIZEOF(FSERROR));
+ for (i = 0; i < cinfo->out_color_components; i++) {
+ cquantize->fserrors[i] = (FSERRPTR)
+ (*cinfo->mem->alloc_large)((j_common_ptr) cinfo, JPOOL_IMAGE, arraysize);
+ }
}
@@ -740,53 +740,53 @@ alloc_fs_workspace (j_decompress_ptr cinfo)
METHODDEF(void)
start_pass_1_quant (j_decompress_ptr cinfo, boolean is_pre_scan)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- size_t arraysize;
- int i;
-
- /* Install my colormap. */
- cinfo->colormap = cquantize->sv_colormap;
- cinfo->actual_number_of_colors = cquantize->sv_actual;
-
- /* Initialize for desired dithering mode. */
- switch (cinfo->dither_mode) {
- case JDITHER_NONE:
- if (cinfo->out_color_components == 3)
- cquantize->pub.color_quantize = color_quantize3;
- else
- cquantize->pub.color_quantize = color_quantize;
- break;
- case JDITHER_ORDERED:
- if (cinfo->out_color_components == 3)
- cquantize->pub.color_quantize = quantize3_ord_dither;
- else
- cquantize->pub.color_quantize = quantize_ord_dither;
- cquantize->row_index = 0; /* initialize state for ordered dither */
- /* If user changed to ordered dither from another mode,
- * we must recreate the color index table with padding.
- * This will cost extra space, but probably isn't very likely.
- */
- if (! cquantize->is_padded)
- create_colorindex(cinfo);
- /* Create ordered-dither tables if we didn't already. */
- if (cquantize->odither[0] == NULL)
- create_odither_tables(cinfo);
- break;
- case JDITHER_FS:
- cquantize->pub.color_quantize = quantize_fs_dither;
- cquantize->on_odd_row = FALSE; /* initialize state for F-S dither */
- /* Allocate Floyd-Steinberg workspace if didn't already. */
- if (cquantize->fserrors[0] == NULL)
- alloc_fs_workspace(cinfo);
- /* Initialize the propagated errors to zero. */
- arraysize = (size_t) ((cinfo->output_width + 2) * SIZEOF(FSERROR));
- for (i = 0; i < cinfo->out_color_components; i++)
- jzero_far((void FAR *) cquantize->fserrors[i], arraysize);
- break;
- default:
- ERREXIT(cinfo, JERR_NOT_COMPILED);
- break;
- }
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ size_t arraysize;
+ int i;
+
+ /* Install my colormap. */
+ cinfo->colormap = cquantize->sv_colormap;
+ cinfo->actual_number_of_colors = cquantize->sv_actual;
+
+ /* Initialize for desired dithering mode. */
+ switch (cinfo->dither_mode) {
+ case JDITHER_NONE:
+ if (cinfo->out_color_components == 3)
+ cquantize->pub.color_quantize = color_quantize3;
+ else
+ cquantize->pub.color_quantize = color_quantize;
+ break;
+ case JDITHER_ORDERED:
+ if (cinfo->out_color_components == 3)
+ cquantize->pub.color_quantize = quantize3_ord_dither;
+ else
+ cquantize->pub.color_quantize = quantize_ord_dither;
+ cquantize->row_index = 0; /* initialize state for ordered dither */
+ /* If user changed to ordered dither from another mode,
+ * we must recreate the color index table with padding.
+ * This will cost extra space, but probably isn't very likely.
+ */
+ if (! cquantize->is_padded)
+ create_colorindex(cinfo);
+ /* Create ordered-dither tables if we didn't already. */
+ if (cquantize->odither[0] == NULL)
+ create_odither_tables(cinfo);
+ break;
+ case JDITHER_FS:
+ cquantize->pub.color_quantize = quantize_fs_dither;
+ cquantize->on_odd_row = FALSE; /* initialize state for F-S dither */
+ /* Allocate Floyd-Steinberg workspace if didn't already. */
+ if (cquantize->fserrors[0] == NULL)
+ alloc_fs_workspace(cinfo);
+ /* Initialize the propagated errors to zero. */
+ arraysize = (size_t) ((cinfo->output_width + 2) * SIZEOF(FSERROR));
+ for (i = 0; i < cinfo->out_color_components; i++)
+ jzero_far((void FAR *) cquantize->fserrors[i], arraysize);
+ break;
+ default:
+ ERREXIT(cinfo, JERR_NOT_COMPILED);
+ break;
+ }
}
@@ -797,7 +797,7 @@ start_pass_1_quant (j_decompress_ptr cinfo, boolean is_pre_scan)
METHODDEF(void)
finish_pass_1_quant (j_decompress_ptr cinfo)
{
- /* no work in 1-pass case */
+ /* no work in 1-pass case */
}
@@ -809,7 +809,7 @@ finish_pass_1_quant (j_decompress_ptr cinfo)
METHODDEF(void)
new_color_map_1_quant (j_decompress_ptr cinfo)
{
- ERREXIT(cinfo, JERR_MODE_CHANGE);
+ ERREXIT(cinfo, JERR_MODE_CHANGE);
}
@@ -820,37 +820,37 @@ new_color_map_1_quant (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_1pass_quantizer (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize;
+ my_cquantize_ptr cquantize;
- cquantize = (my_cquantize_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cquantize = (my_cquantize_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_cquantizer));
- cinfo->cquantize = (struct jpeg_color_quantizer *) cquantize;
- cquantize->pub.start_pass = start_pass_1_quant;
- cquantize->pub.finish_pass = finish_pass_1_quant;
- cquantize->pub.new_color_map = new_color_map_1_quant;
- cquantize->fserrors[0] = NULL; /* Flag FS workspace not allocated */
- cquantize->odither[0] = NULL; /* Also flag odither arrays not allocated */
-
- /* Make sure my internal arrays won't overflow */
- if (cinfo->out_color_components > MAX_Q_COMPS)
- ERREXIT1(cinfo, JERR_QUANT_COMPONENTS, MAX_Q_COMPS);
- /* Make sure colormap indexes can be represented by JSAMPLEs */
- if (cinfo->desired_number_of_colors > (MAXJSAMPLE+1))
- ERREXIT1(cinfo, JERR_QUANT_MANY_COLORS, MAXJSAMPLE+1);
-
- /* Create the colormap and color index table. */
- create_colormap(cinfo);
- create_colorindex(cinfo);
-
- /* Allocate Floyd-Steinberg workspace now if requested.
- * We do this now since it is FAR storage and may affect the memory
- * manager's space calculations. If the user changes to FS dither
- * mode in a later pass, we will allocate the space then, and will
- * possibly overrun the max_memory_to_use setting.
- */
- if (cinfo->dither_mode == JDITHER_FS)
- alloc_fs_workspace(cinfo);
+ cinfo->cquantize = (struct jpeg_color_quantizer *) cquantize;
+ cquantize->pub.start_pass = start_pass_1_quant;
+ cquantize->pub.finish_pass = finish_pass_1_quant;
+ cquantize->pub.new_color_map = new_color_map_1_quant;
+ cquantize->fserrors[0] = NULL; /* Flag FS workspace not allocated */
+ cquantize->odither[0] = NULL; /* Also flag odither arrays not allocated */
+
+ /* Make sure my internal arrays won't overflow */
+ if (cinfo->out_color_components > MAX_Q_COMPS)
+ ERREXIT1(cinfo, JERR_QUANT_COMPONENTS, MAX_Q_COMPS);
+ /* Make sure colormap indexes can be represented by JSAMPLEs */
+ if (cinfo->desired_number_of_colors > (MAXJSAMPLE+1))
+ ERREXIT1(cinfo, JERR_QUANT_MANY_COLORS, MAXJSAMPLE+1);
+
+ /* Create the colormap and color index table. */
+ create_colormap(cinfo);
+ create_colorindex(cinfo);
+
+ /* Allocate Floyd-Steinberg workspace now if requested.
+ * We do this now since it is FAR storage and may affect the memory
+ * manager's space calculations. If the user changes to FS dither
+ * mode in a later pass, we will allocate the space then, and will
+ * possibly overrun the max_memory_to_use setting.
+ */
+ if (cinfo->dither_mode == JDITHER_FS)
+ alloc_fs_workspace(cinfo);
}
#endif /* QUANT_1PASS_SUPPORTED */
diff --git a/src/lib/libjpeg/jquant2.c b/src/lib/libjpeg/jquant2.c
index abd0a3db9bd..68ab6a7c665 100644
--- a/src/lib/libjpeg/jquant2.c
+++ b/src/lib/libjpeg/jquant2.c
@@ -70,9 +70,9 @@
* probably need to change these scale factors.
*/
-#define R_SCALE 2 /* scale R distances by this much */
-#define G_SCALE 3 /* scale G distances by this much */
-#define B_SCALE 1 /* and B by this much */
+#define R_SCALE 2 /* scale R distances by this much */
+#define G_SCALE 3 /* scale G distances by this much */
+#define B_SCALE 1 /* and B by this much */
/* Relabel R/G/B as components 0/1/2, respecting the RGB ordering defined
* in jmorecfg.h. As the code stands, it will do the right thing for R,G,B
@@ -129,9 +129,9 @@
/* These will do the right thing for either R,G,B or B,G,R color order,
* but you may not like the results for other color orders.
*/
-#define HIST_C0_BITS 5 /* bits of precision in R/B histogram */
-#define HIST_C1_BITS 6 /* bits of precision in G histogram */
-#define HIST_C2_BITS 5 /* bits of precision in B/R histogram */
+#define HIST_C0_BITS 5 /* bits of precision in R/B histogram */
+#define HIST_C1_BITS 6 /* bits of precision in G histogram */
+#define HIST_C2_BITS 5 /* bits of precision in B/R histogram */
/* Number of elements along histogram axes. */
#define HIST_C0_ELEMS (1<<HIST_C0_BITS)
@@ -144,13 +144,13 @@
#define C2_SHIFT (BITS_IN_JSAMPLE-HIST_C2_BITS)
-typedef UINT16 histcell; /* histogram cell; prefer an unsigned type */
+typedef UINT16 histcell; /* histogram cell; prefer an unsigned type */
-typedef histcell FAR * histptr; /* for pointers to histogram cells */
+typedef histcell FAR * histptr; /* for pointers to histogram cells */
typedef histcell hist1d[HIST_C2_ELEMS]; /* typedefs for the array */
-typedef hist1d FAR * hist2d; /* type for the 2nd-level pointers */
-typedef hist2d * hist3d; /* type for top-level pointer */
+typedef hist1d FAR * hist2d; /* type for the 2nd-level pointers */
+typedef hist2d * hist3d; /* type for top-level pointer */
/* Declarations for Floyd-Steinberg dithering.
@@ -178,34 +178,34 @@ typedef hist2d * hist3d; /* type for top-level pointer */
*/
#if BITS_IN_JSAMPLE == 8
-typedef INT16 FSERROR; /* 16 bits should be enough */
-typedef int LOCFSERROR; /* use 'int' for calculation temps */
+typedef INT16 FSERROR; /* 16 bits should be enough */
+typedef int LOCFSERROR; /* use 'int' for calculation temps */
#else
-typedef INT32 FSERROR; /* may need more than 16 bits */
-typedef INT32 LOCFSERROR; /* be sure calculation temps are big enough */
+typedef INT32 FSERROR; /* may need more than 16 bits */
+typedef INT32 LOCFSERROR; /* be sure calculation temps are big enough */
#endif
-typedef FSERROR FAR *FSERRPTR; /* pointer to error array (in FAR storage!) */
+typedef FSERROR FAR *FSERRPTR; /* pointer to error array (in FAR storage!) */
/* Private subobject */
typedef struct {
- struct jpeg_color_quantizer pub; /* public fields */
+ struct jpeg_color_quantizer pub; /* public fields */
- /* Space for the eventually created colormap is stashed here */
- JSAMPARRAY sv_colormap; /* colormap allocated at init time */
- int desired; /* desired # of colors = size of colormap */
+ /* Space for the eventually created colormap is stashed here */
+ JSAMPARRAY sv_colormap; /* colormap allocated at init time */
+ int desired; /* desired # of colors = size of colormap */
- /* Variables for accumulating image statistics */
- hist3d histogram; /* pointer to the histogram */
+ /* Variables for accumulating image statistics */
+ hist3d histogram; /* pointer to the histogram */
- boolean needs_zeroed; /* TRUE if next pass must zero histogram */
+ boolean needs_zeroed; /* TRUE if next pass must zero histogram */
- /* Variables for Floyd-Steinberg dithering */
- FSERRPTR fserrors; /* accumulated errors */
- boolean on_odd_row; /* flag to remember which row we are on */
- int * error_limiter; /* table for clamping the applied error */
+ /* Variables for Floyd-Steinberg dithering */
+ FSERRPTR fserrors; /* accumulated errors */
+ boolean on_odd_row; /* flag to remember which row we are on */
+ int * error_limiter; /* table for clamping the applied error */
} my_cquantizer;
typedef my_cquantizer * my_cquantize_ptr;
@@ -222,29 +222,29 @@ typedef my_cquantizer * my_cquantize_ptr;
METHODDEF(void)
prescan_quantize (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
- JSAMPARRAY output_buf, int num_rows)
+ JSAMPARRAY output_buf, int num_rows)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- register JSAMPROW ptr;
- register histptr histp;
- register hist3d histogram = cquantize->histogram;
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
-
- for (row = 0; row < num_rows; row++) {
- ptr = input_buf[row];
- for (col = width; col > 0; col--) {
- /* get pixel value and index into the histogram */
- histp = & histogram[GETJSAMPLE(ptr[0]) >> C0_SHIFT]
- [GETJSAMPLE(ptr[1]) >> C1_SHIFT]
- [GETJSAMPLE(ptr[2]) >> C2_SHIFT];
- /* increment, check for overflow and undo increment if so. */
- if (++(*histp) <= 0)
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ register JSAMPROW ptr;
+ register histptr histp;
+ register hist3d histogram = cquantize->histogram;
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+
+ for (row = 0; row < num_rows; row++) {
+ ptr = input_buf[row];
+ for (col = width; col > 0; col--) {
+ /* get pixel value and index into the histogram */
+ histp = & histogram[GETJSAMPLE(ptr[0]) >> C0_SHIFT]
+ [GETJSAMPLE(ptr[1]) >> C1_SHIFT]
+ [GETJSAMPLE(ptr[2]) >> C2_SHIFT];
+ /* increment, check for overflow and undo increment if so. */
+ if (++(*histp) <= 0)
(*histp)--;
- ptr += 3;
- }
- }
+ ptr += 3;
+ }
+ }
}
@@ -256,14 +256,14 @@ prescan_quantize (j_decompress_ptr cinfo, JSAMPARRAY input_buf,
*/
typedef struct {
- /* The bounds of the box (inclusive); expressed as histogram indexes */
- int c0min, c0max;
- int c1min, c1max;
- int c2min, c2max;
- /* The volume (actually 2-norm) of the box */
- INT32 volume;
- /* The number of nonzero histogram cells within this box */
- long colorcount;
+ /* The bounds of the box (inclusive); expressed as histogram indexes */
+ int c0min, c0max;
+ int c1min, c1max;
+ int c2min, c2max;
+ /* The volume (actually 2-norm) of the box */
+ INT32 volume;
+ /* The number of nonzero histogram cells within this box */
+ long colorcount;
} box;
typedef box * boxptr;
@@ -274,18 +274,18 @@ find_biggest_color_pop (boxptr boxlist, int numboxes)
/* Find the splittable box with the largest color population */
/* Returns NULL if no splittable boxes remain */
{
- register boxptr boxp;
- register int i;
- register long maxc = 0;
- boxptr which = NULL;
-
- for (i = 0, boxp = boxlist; i < numboxes; i++, boxp++) {
- if (boxp->colorcount > maxc && boxp->volume > 0) {
- which = boxp;
- maxc = boxp->colorcount;
- }
- }
- return which;
+ register boxptr boxp;
+ register int i;
+ register long maxc = 0;
+ boxptr which = NULL;
+
+ for (i = 0, boxp = boxlist; i < numboxes; i++, boxp++) {
+ if (boxp->colorcount > maxc && boxp->volume > 0) {
+ which = boxp;
+ maxc = boxp->colorcount;
+ }
+ }
+ return which;
}
@@ -294,18 +294,18 @@ find_biggest_volume (boxptr boxlist, int numboxes)
/* Find the splittable box with the largest (scaled) volume */
/* Returns NULL if no splittable boxes remain */
{
- register boxptr boxp;
- register int i;
- register INT32 maxv = 0;
- boxptr which = NULL;
-
- for (i = 0, boxp = boxlist; i < numboxes; i++, boxp++) {
- if (boxp->volume > maxv) {
- which = boxp;
- maxv = boxp->volume;
- }
- }
- return which;
+ register boxptr boxp;
+ register int i;
+ register INT32 maxv = 0;
+ boxptr which = NULL;
+
+ for (i = 0, boxp = boxlist; i < numboxes; i++, boxp++) {
+ if (boxp->volume > maxv) {
+ which = boxp;
+ maxv = boxp->volume;
+ }
+ }
+ return which;
}
@@ -314,184 +314,184 @@ update_box (j_decompress_ptr cinfo, boxptr boxp)
/* Shrink the min/max bounds of a box to enclose only nonzero elements, */
/* and recompute its volume and population */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- hist3d histogram = cquantize->histogram;
- histptr histp;
- int c0,c1,c2;
- int c0min,c0max,c1min,c1max,c2min,c2max;
- INT32 dist0,dist1,dist2;
- long ccount;
-
- c0min = boxp->c0min; c0max = boxp->c0max;
- c1min = boxp->c1min; c1max = boxp->c1max;
- c2min = boxp->c2min; c2max = boxp->c2max;
-
- if (c0max > c0min)
- for (c0 = c0min; c0 <= c0max; c0++)
- for (c1 = c1min; c1 <= c1max; c1++) {
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ hist3d histogram = cquantize->histogram;
+ histptr histp;
+ int c0,c1,c2;
+ int c0min,c0max,c1min,c1max,c2min,c2max;
+ INT32 dist0,dist1,dist2;
+ long ccount;
+
+ c0min = boxp->c0min; c0max = boxp->c0max;
+ c1min = boxp->c1min; c1max = boxp->c1max;
+ c2min = boxp->c2min; c2max = boxp->c2max;
+
+ if (c0max > c0min)
+ for (c0 = c0min; c0 <= c0max; c0++)
+ for (c1 = c1min; c1 <= c1max; c1++) {
histp = & histogram[c0][c1][c2min];
for (c2 = c2min; c2 <= c2max; c2++)
- if (*histp++ != 0) {
- boxp->c0min = c0min = c0;
- goto have_c0min;
- }
- }
- have_c0min:
- if (c0max > c0min)
- for (c0 = c0max; c0 >= c0min; c0--)
- for (c1 = c1min; c1 <= c1max; c1++) {
+ if (*histp++ != 0) {
+ boxp->c0min = c0min = c0;
+ goto have_c0min;
+ }
+ }
+ have_c0min:
+ if (c0max > c0min)
+ for (c0 = c0max; c0 >= c0min; c0--)
+ for (c1 = c1min; c1 <= c1max; c1++) {
histp = & histogram[c0][c1][c2min];
for (c2 = c2min; c2 <= c2max; c2++)
- if (*histp++ != 0) {
- boxp->c0max = c0max = c0;
- goto have_c0max;
- }
- }
- have_c0max:
- if (c1max > c1min)
- for (c1 = c1min; c1 <= c1max; c1++)
- for (c0 = c0min; c0 <= c0max; c0++) {
+ if (*histp++ != 0) {
+ boxp->c0max = c0max = c0;
+ goto have_c0max;
+ }
+ }
+ have_c0max:
+ if (c1max > c1min)
+ for (c1 = c1min; c1 <= c1max; c1++)
+ for (c0 = c0min; c0 <= c0max; c0++) {
histp = & histogram[c0][c1][c2min];
for (c2 = c2min; c2 <= c2max; c2++)
- if (*histp++ != 0) {
- boxp->c1min = c1min = c1;
- goto have_c1min;
- }
- }
- have_c1min:
- if (c1max > c1min)
- for (c1 = c1max; c1 >= c1min; c1--)
- for (c0 = c0min; c0 <= c0max; c0++) {
+ if (*histp++ != 0) {
+ boxp->c1min = c1min = c1;
+ goto have_c1min;
+ }
+ }
+ have_c1min:
+ if (c1max > c1min)
+ for (c1 = c1max; c1 >= c1min; c1--)
+ for (c0 = c0min; c0 <= c0max; c0++) {
histp = & histogram[c0][c1][c2min];
for (c2 = c2min; c2 <= c2max; c2++)
- if (*histp++ != 0) {
- boxp->c1max = c1max = c1;
- goto have_c1max;
- }
- }
- have_c1max:
- if (c2max > c2min)
- for (c2 = c2min; c2 <= c2max; c2++)
- for (c0 = c0min; c0 <= c0max; c0++) {
+ if (*histp++ != 0) {
+ boxp->c1max = c1max = c1;
+ goto have_c1max;
+ }
+ }
+ have_c1max:
+ if (c2max > c2min)
+ for (c2 = c2min; c2 <= c2max; c2++)
+ for (c0 = c0min; c0 <= c0max; c0++) {
histp = & histogram[c0][c1min][c2];
for (c1 = c1min; c1 <= c1max; c1++, histp += HIST_C2_ELEMS)
- if (*histp != 0) {
- boxp->c2min = c2min = c2;
- goto have_c2min;
- }
- }
- have_c2min:
- if (c2max > c2min)
- for (c2 = c2max; c2 >= c2min; c2--)
- for (c0 = c0min; c0 <= c0max; c0++) {
+ if (*histp != 0) {
+ boxp->c2min = c2min = c2;
+ goto have_c2min;
+ }
+ }
+ have_c2min:
+ if (c2max > c2min)
+ for (c2 = c2max; c2 >= c2min; c2--)
+ for (c0 = c0min; c0 <= c0max; c0++) {
histp = & histogram[c0][c1min][c2];
for (c1 = c1min; c1 <= c1max; c1++, histp += HIST_C2_ELEMS)
- if (*histp != 0) {
- boxp->c2max = c2max = c2;
- goto have_c2max;
- }
- }
- have_c2max:
-
- /* Update box volume.
- * We use 2-norm rather than real volume here; this biases the method
- * against making long narrow boxes, and it has the side benefit that
- * a box is splittable iff norm > 0.
- * Since the differences are expressed in histogram-cell units,
- * we have to shift back to JSAMPLE units to get consistent distances;
- * after which, we scale according to the selected distance scale factors.
- */
- dist0 = ((c0max - c0min) << C0_SHIFT) * C0_SCALE;
- dist1 = ((c1max - c1min) << C1_SHIFT) * C1_SCALE;
- dist2 = ((c2max - c2min) << C2_SHIFT) * C2_SCALE;
- boxp->volume = dist0*dist0 + dist1*dist1 + dist2*dist2;
-
- /* Now scan remaining volume of box and compute population */
- ccount = 0;
- for (c0 = c0min; c0 <= c0max; c0++)
- for (c1 = c1min; c1 <= c1max; c1++) {
- histp = & histogram[c0][c1][c2min];
- for (c2 = c2min; c2 <= c2max; c2++, histp++)
+ if (*histp != 0) {
+ boxp->c2max = c2max = c2;
+ goto have_c2max;
+ }
+ }
+ have_c2max:
+
+ /* Update box volume.
+ * We use 2-norm rather than real volume here; this biases the method
+ * against making long narrow boxes, and it has the side benefit that
+ * a box is splittable iff norm > 0.
+ * Since the differences are expressed in histogram-cell units,
+ * we have to shift back to JSAMPLE units to get consistent distances;
+ * after which, we scale according to the selected distance scale factors.
+ */
+ dist0 = ((c0max - c0min) << C0_SHIFT) * C0_SCALE;
+ dist1 = ((c1max - c1min) << C1_SHIFT) * C1_SCALE;
+ dist2 = ((c2max - c2min) << C2_SHIFT) * C2_SCALE;
+ boxp->volume = dist0*dist0 + dist1*dist1 + dist2*dist2;
+
+ /* Now scan remaining volume of box and compute population */
+ ccount = 0;
+ for (c0 = c0min; c0 <= c0max; c0++)
+ for (c1 = c1min; c1 <= c1max; c1++) {
+ histp = & histogram[c0][c1][c2min];
+ for (c2 = c2min; c2 <= c2max; c2++, histp++)
if (*histp != 0) {
- ccount++;
+ ccount++;
+ }
}
- }
- boxp->colorcount = ccount;
+ boxp->colorcount = ccount;
}
LOCAL(int)
median_cut (j_decompress_ptr cinfo, boxptr boxlist, int numboxes,
- int desired_colors)
+ int desired_colors)
/* Repeatedly select and split the largest box until we have enough boxes */
{
- int n,lb;
- int c0,c1,c2,cmax;
- register boxptr b1,b2;
-
- while (numboxes < desired_colors) {
- /* Select box to split.
- * Current algorithm: by population for first half, then by volume.
- */
- if (numboxes*2 <= desired_colors) {
- b1 = find_biggest_color_pop(boxlist, numboxes);
- } else {
- b1 = find_biggest_volume(boxlist, numboxes);
- }
- if (b1 == NULL) /* no splittable boxes left! */
- break;
- b2 = &boxlist[numboxes]; /* where new box will go */
- /* Copy the color bounds to the new box. */
- b2->c0max = b1->c0max; b2->c1max = b1->c1max; b2->c2max = b1->c2max;
- b2->c0min = b1->c0min; b2->c1min = b1->c1min; b2->c2min = b1->c2min;
- /* Choose which axis to split the box on.
- * Current algorithm: longest scaled axis.
- * See notes in update_box about scaling distances.
- */
- c0 = ((b1->c0max - b1->c0min) << C0_SHIFT) * C0_SCALE;
- c1 = ((b1->c1max - b1->c1min) << C1_SHIFT) * C1_SCALE;
- c2 = ((b1->c2max - b1->c2min) << C2_SHIFT) * C2_SCALE;
- /* We want to break any ties in favor of green, then red, blue last.
- * This code does the right thing for R,G,B or B,G,R color orders only.
- */
+ int n,lb;
+ int c0,c1,c2,cmax;
+ register boxptr b1,b2;
+
+ while (numboxes < desired_colors) {
+ /* Select box to split.
+ * Current algorithm: by population for first half, then by volume.
+ */
+ if (numboxes*2 <= desired_colors) {
+ b1 = find_biggest_color_pop(boxlist, numboxes);
+ } else {
+ b1 = find_biggest_volume(boxlist, numboxes);
+ }
+ if (b1 == NULL) /* no splittable boxes left! */
+ break;
+ b2 = &boxlist[numboxes]; /* where new box will go */
+ /* Copy the color bounds to the new box. */
+ b2->c0max = b1->c0max; b2->c1max = b1->c1max; b2->c2max = b1->c2max;
+ b2->c0min = b1->c0min; b2->c1min = b1->c1min; b2->c2min = b1->c2min;
+ /* Choose which axis to split the box on.
+ * Current algorithm: longest scaled axis.
+ * See notes in update_box about scaling distances.
+ */
+ c0 = ((b1->c0max - b1->c0min) << C0_SHIFT) * C0_SCALE;
+ c1 = ((b1->c1max - b1->c1min) << C1_SHIFT) * C1_SCALE;
+ c2 = ((b1->c2max - b1->c2min) << C2_SHIFT) * C2_SCALE;
+ /* We want to break any ties in favor of green, then red, blue last.
+ * This code does the right thing for R,G,B or B,G,R color orders only.
+ */
#if RGB_RED == 0
- cmax = c1; n = 1;
- if (c0 > cmax) { cmax = c0; n = 0; }
- if (c2 > cmax) { n = 2; }
+ cmax = c1; n = 1;
+ if (c0 > cmax) { cmax = c0; n = 0; }
+ if (c2 > cmax) { n = 2; }
#else
- cmax = c1; n = 1;
- if (c2 > cmax) { cmax = c2; n = 2; }
- if (c0 > cmax) { n = 0; }
+ cmax = c1; n = 1;
+ if (c2 > cmax) { cmax = c2; n = 2; }
+ if (c0 > cmax) { n = 0; }
#endif
- /* Choose split point along selected axis, and update box bounds.
- * Current algorithm: split at halfway point.
- * (Since the box has been shrunk to minimum volume,
- * any split will produce two nonempty subboxes.)
- * Note that lb value is max for lower box, so must be < old max.
- */
- switch (n) {
- case 0:
- lb = (b1->c0max + b1->c0min) / 2;
- b1->c0max = lb;
- b2->c0min = lb+1;
- break;
- case 1:
- lb = (b1->c1max + b1->c1min) / 2;
- b1->c1max = lb;
- b2->c1min = lb+1;
- break;
- case 2:
- lb = (b1->c2max + b1->c2min) / 2;
- b1->c2max = lb;
- b2->c2min = lb+1;
- break;
- }
- /* Update stats for boxes */
- update_box(cinfo, b1);
- update_box(cinfo, b2);
- numboxes++;
- }
- return numboxes;
+ /* Choose split point along selected axis, and update box bounds.
+ * Current algorithm: split at halfway point.
+ * (Since the box has been shrunk to minimum volume,
+ * any split will produce two nonempty subboxes.)
+ * Note that lb value is max for lower box, so must be < old max.
+ */
+ switch (n) {
+ case 0:
+ lb = (b1->c0max + b1->c0min) / 2;
+ b1->c0max = lb;
+ b2->c0min = lb+1;
+ break;
+ case 1:
+ lb = (b1->c1max + b1->c1min) / 2;
+ b1->c1max = lb;
+ b2->c1min = lb+1;
+ break;
+ case 2:
+ lb = (b1->c2max + b1->c2min) / 2;
+ b1->c2max = lb;
+ b2->c2min = lb+1;
+ break;
+ }
+ /* Update stats for boxes */
+ update_box(cinfo, b1);
+ update_box(cinfo, b2);
+ numboxes++;
+ }
+ return numboxes;
}
@@ -499,39 +499,39 @@ LOCAL(void)
compute_color (j_decompress_ptr cinfo, boxptr boxp, int icolor)
/* Compute representative color for a box, put it in colormap[icolor] */
{
- /* Current algorithm: mean weighted by pixels (not colors) */
- /* Note it is important to get the rounding correct! */
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- hist3d histogram = cquantize->histogram;
- histptr histp;
- int c0,c1,c2;
- int c0min,c0max,c1min,c1max,c2min,c2max;
- long count;
- long total = 0;
- long c0total = 0;
- long c1total = 0;
- long c2total = 0;
-
- c0min = boxp->c0min; c0max = boxp->c0max;
- c1min = boxp->c1min; c1max = boxp->c1max;
- c2min = boxp->c2min; c2max = boxp->c2max;
-
- for (c0 = c0min; c0 <= c0max; c0++)
- for (c1 = c1min; c1 <= c1max; c1++) {
- histp = & histogram[c0][c1][c2min];
- for (c2 = c2min; c2 <= c2max; c2++) {
+ /* Current algorithm: mean weighted by pixels (not colors) */
+ /* Note it is important to get the rounding correct! */
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ hist3d histogram = cquantize->histogram;
+ histptr histp;
+ int c0,c1,c2;
+ int c0min,c0max,c1min,c1max,c2min,c2max;
+ long count;
+ long total = 0;
+ long c0total = 0;
+ long c1total = 0;
+ long c2total = 0;
+
+ c0min = boxp->c0min; c0max = boxp->c0max;
+ c1min = boxp->c1min; c1max = boxp->c1max;
+ c2min = boxp->c2min; c2max = boxp->c2max;
+
+ for (c0 = c0min; c0 <= c0max; c0++)
+ for (c1 = c1min; c1 <= c1max; c1++) {
+ histp = & histogram[c0][c1][c2min];
+ for (c2 = c2min; c2 <= c2max; c2++) {
if ((count = *histp++) != 0) {
- total += count;
- c0total += ((c0 << C0_SHIFT) + ((1<<C0_SHIFT)>>1)) * count;
- c1total += ((c1 << C1_SHIFT) + ((1<<C1_SHIFT)>>1)) * count;
- c2total += ((c2 << C2_SHIFT) + ((1<<C2_SHIFT)>>1)) * count;
+ total += count;
+ c0total += ((c0 << C0_SHIFT) + ((1<<C0_SHIFT)>>1)) * count;
+ c1total += ((c1 << C1_SHIFT) + ((1<<C1_SHIFT)>>1)) * count;
+ c2total += ((c2 << C2_SHIFT) + ((1<<C2_SHIFT)>>1)) * count;
+ }
+ }
}
- }
- }
- cinfo->colormap[0][icolor] = (JSAMPLE) ((c0total + (total>>1)) / total);
- cinfo->colormap[1][icolor] = (JSAMPLE) ((c1total + (total>>1)) / total);
- cinfo->colormap[2][icolor] = (JSAMPLE) ((c2total + (total>>1)) / total);
+ cinfo->colormap[0][icolor] = (JSAMPLE) ((c0total + (total>>1)) / total);
+ cinfo->colormap[1][icolor] = (JSAMPLE) ((c1total + (total>>1)) / total);
+ cinfo->colormap[2][icolor] = (JSAMPLE) ((c2total + (total>>1)) / total);
}
@@ -539,30 +539,30 @@ LOCAL(void)
select_colors (j_decompress_ptr cinfo, int desired_colors)
/* Master routine for color selection */
{
- boxptr boxlist;
- int numboxes;
- int i;
-
- /* Allocate workspace for box list */
- boxlist = (boxptr) (*cinfo->mem->alloc_small)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, desired_colors * SIZEOF(box));
- /* Initialize one box containing whole space */
- numboxes = 1;
- boxlist[0].c0min = 0;
- boxlist[0].c0max = MAXJSAMPLE >> C0_SHIFT;
- boxlist[0].c1min = 0;
- boxlist[0].c1max = MAXJSAMPLE >> C1_SHIFT;
- boxlist[0].c2min = 0;
- boxlist[0].c2max = MAXJSAMPLE >> C2_SHIFT;
- /* Shrink it to actually-used volume and set its statistics */
- update_box(cinfo, & boxlist[0]);
- /* Perform median-cut to produce final box list */
- numboxes = median_cut(cinfo, boxlist, numboxes, desired_colors);
- /* Compute the representative color for each box, fill colormap */
- for (i = 0; i < numboxes; i++)
- compute_color(cinfo, & boxlist[i], i);
- cinfo->actual_number_of_colors = numboxes;
- TRACEMS1(cinfo, 1, JTRC_QUANT_SELECTED, numboxes);
+ boxptr boxlist;
+ int numboxes;
+ int i;
+
+ /* Allocate workspace for box list */
+ boxlist = (boxptr) (*cinfo->mem->alloc_small)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, desired_colors * SIZEOF(box));
+ /* Initialize one box containing whole space */
+ numboxes = 1;
+ boxlist[0].c0min = 0;
+ boxlist[0].c0max = MAXJSAMPLE >> C0_SHIFT;
+ boxlist[0].c1min = 0;
+ boxlist[0].c1max = MAXJSAMPLE >> C1_SHIFT;
+ boxlist[0].c2min = 0;
+ boxlist[0].c2max = MAXJSAMPLE >> C2_SHIFT;
+ /* Shrink it to actually-used volume and set its statistics */
+ update_box(cinfo, & boxlist[0]);
+ /* Perform median-cut to produce final box list */
+ numboxes = median_cut(cinfo, boxlist, numboxes, desired_colors);
+ /* Compute the representative color for each box, fill colormap */
+ for (i = 0; i < numboxes; i++)
+ compute_color(cinfo, & boxlist[i], i);
+ cinfo->actual_number_of_colors = numboxes;
+ TRACEMS1(cinfo, 1, JTRC_QUANT_SELECTED, numboxes);
}
@@ -644,7 +644,7 @@ select_colors (j_decompress_ptr cinfo, int desired_colors)
LOCAL(int)
find_nearby_colors (j_decompress_ptr cinfo, int minc0, int minc1, int minc2,
- JSAMPLE colorlist[])
+ JSAMPLE colorlist[])
/* Locate the colormap entries close enough to an update box to be candidates
* for the nearest entry to some cell(s) in the update box. The update box
* is specified by the center coordinates of its first cell. The number of
@@ -654,126 +654,126 @@ find_nearby_colors (j_decompress_ptr cinfo, int minc0, int minc1, int minc2,
* the colors that need further consideration.
*/
{
- int numcolors = cinfo->actual_number_of_colors;
- int maxc0, maxc1, maxc2;
- int centerc0, centerc1, centerc2;
- int i, x, ncolors;
- INT32 minmaxdist, min_dist, max_dist, tdist;
- INT32 mindist[MAXNUMCOLORS]; /* min distance to colormap entry i */
-
- /* Compute true coordinates of update box's upper corner and center.
- * Actually we compute the coordinates of the center of the upper-corner
- * histogram cell, which are the upper bounds of the volume we care about.
- * Note that since ">>" rounds down, the "center" values may be closer to
- * min than to max; hence comparisons to them must be "<=", not "<".
- */
- maxc0 = minc0 + ((1 << BOX_C0_SHIFT) - (1 << C0_SHIFT));
- centerc0 = (minc0 + maxc0) >> 1;
- maxc1 = minc1 + ((1 << BOX_C1_SHIFT) - (1 << C1_SHIFT));
- centerc1 = (minc1 + maxc1) >> 1;
- maxc2 = minc2 + ((1 << BOX_C2_SHIFT) - (1 << C2_SHIFT));
- centerc2 = (minc2 + maxc2) >> 1;
-
- /* For each color in colormap, find:
- * 1. its minimum squared-distance to any point in the update box
- * (zero if color is within update box);
- * 2. its maximum squared-distance to any point in the update box.
- * Both of these can be found by considering only the corners of the box.
- * We save the minimum distance for each color in mindist[];
- * only the smallest maximum distance is of interest.
- */
- minmaxdist = 0x7FFFFFFFL;
-
- for (i = 0; i < numcolors; i++) {
- /* We compute the squared-c0-distance term, then add in the other two. */
- x = GETJSAMPLE(cinfo->colormap[0][i]);
- if (x < minc0) {
- tdist = (x - minc0) * C0_SCALE;
- min_dist = tdist*tdist;
- tdist = (x - maxc0) * C0_SCALE;
- max_dist = tdist*tdist;
- } else if (x > maxc0) {
- tdist = (x - maxc0) * C0_SCALE;
- min_dist = tdist*tdist;
- tdist = (x - minc0) * C0_SCALE;
- max_dist = tdist*tdist;
- } else {
- /* within cell range so no contribution to min_dist */
- min_dist = 0;
- if (x <= centerc0) {
+ int numcolors = cinfo->actual_number_of_colors;
+ int maxc0, maxc1, maxc2;
+ int centerc0, centerc1, centerc2;
+ int i, x, ncolors;
+ INT32 minmaxdist, min_dist, max_dist, tdist;
+ INT32 mindist[MAXNUMCOLORS]; /* min distance to colormap entry i */
+
+ /* Compute true coordinates of update box's upper corner and center.
+ * Actually we compute the coordinates of the center of the upper-corner
+ * histogram cell, which are the upper bounds of the volume we care about.
+ * Note that since ">>" rounds down, the "center" values may be closer to
+ * min than to max; hence comparisons to them must be "<=", not "<".
+ */
+ maxc0 = minc0 + ((1 << BOX_C0_SHIFT) - (1 << C0_SHIFT));
+ centerc0 = (minc0 + maxc0) >> 1;
+ maxc1 = minc1 + ((1 << BOX_C1_SHIFT) - (1 << C1_SHIFT));
+ centerc1 = (minc1 + maxc1) >> 1;
+ maxc2 = minc2 + ((1 << BOX_C2_SHIFT) - (1 << C2_SHIFT));
+ centerc2 = (minc2 + maxc2) >> 1;
+
+ /* For each color in colormap, find:
+ * 1. its minimum squared-distance to any point in the update box
+ * (zero if color is within update box);
+ * 2. its maximum squared-distance to any point in the update box.
+ * Both of these can be found by considering only the corners of the box.
+ * We save the minimum distance for each color in mindist[];
+ * only the smallest maximum distance is of interest.
+ */
+ minmaxdist = 0x7FFFFFFFL;
+
+ for (i = 0; i < numcolors; i++) {
+ /* We compute the squared-c0-distance term, then add in the other two. */
+ x = GETJSAMPLE(cinfo->colormap[0][i]);
+ if (x < minc0) {
+ tdist = (x - minc0) * C0_SCALE;
+ min_dist = tdist*tdist;
+ tdist = (x - maxc0) * C0_SCALE;
+ max_dist = tdist*tdist;
+ } else if (x > maxc0) {
+ tdist = (x - maxc0) * C0_SCALE;
+ min_dist = tdist*tdist;
+ tdist = (x - minc0) * C0_SCALE;
+ max_dist = tdist*tdist;
+ } else {
+ /* within cell range so no contribution to min_dist */
+ min_dist = 0;
+ if (x <= centerc0) {
tdist = (x - maxc0) * C0_SCALE;
max_dist = tdist*tdist;
- } else {
+ } else {
tdist = (x - minc0) * C0_SCALE;
max_dist = tdist*tdist;
- }
- }
-
- x = GETJSAMPLE(cinfo->colormap[1][i]);
- if (x < minc1) {
- tdist = (x - minc1) * C1_SCALE;
- min_dist += tdist*tdist;
- tdist = (x - maxc1) * C1_SCALE;
- max_dist += tdist*tdist;
- } else if (x > maxc1) {
- tdist = (x - maxc1) * C1_SCALE;
- min_dist += tdist*tdist;
- tdist = (x - minc1) * C1_SCALE;
- max_dist += tdist*tdist;
- } else {
- /* within cell range so no contribution to min_dist */
- if (x <= centerc1) {
+ }
+ }
+
+ x = GETJSAMPLE(cinfo->colormap[1][i]);
+ if (x < minc1) {
+ tdist = (x - minc1) * C1_SCALE;
+ min_dist += tdist*tdist;
+ tdist = (x - maxc1) * C1_SCALE;
+ max_dist += tdist*tdist;
+ } else if (x > maxc1) {
+ tdist = (x - maxc1) * C1_SCALE;
+ min_dist += tdist*tdist;
+ tdist = (x - minc1) * C1_SCALE;
+ max_dist += tdist*tdist;
+ } else {
+ /* within cell range so no contribution to min_dist */
+ if (x <= centerc1) {
tdist = (x - maxc1) * C1_SCALE;
max_dist += tdist*tdist;
- } else {
+ } else {
tdist = (x - minc1) * C1_SCALE;
max_dist += tdist*tdist;
- }
- }
-
- x = GETJSAMPLE(cinfo->colormap[2][i]);
- if (x < minc2) {
- tdist = (x - minc2) * C2_SCALE;
- min_dist += tdist*tdist;
- tdist = (x - maxc2) * C2_SCALE;
- max_dist += tdist*tdist;
- } else if (x > maxc2) {
- tdist = (x - maxc2) * C2_SCALE;
- min_dist += tdist*tdist;
- tdist = (x - minc2) * C2_SCALE;
- max_dist += tdist*tdist;
- } else {
- /* within cell range so no contribution to min_dist */
- if (x <= centerc2) {
+ }
+ }
+
+ x = GETJSAMPLE(cinfo->colormap[2][i]);
+ if (x < minc2) {
+ tdist = (x - minc2) * C2_SCALE;
+ min_dist += tdist*tdist;
+ tdist = (x - maxc2) * C2_SCALE;
+ max_dist += tdist*tdist;
+ } else if (x > maxc2) {
+ tdist = (x - maxc2) * C2_SCALE;
+ min_dist += tdist*tdist;
+ tdist = (x - minc2) * C2_SCALE;
+ max_dist += tdist*tdist;
+ } else {
+ /* within cell range so no contribution to min_dist */
+ if (x <= centerc2) {
tdist = (x - maxc2) * C2_SCALE;
max_dist += tdist*tdist;
- } else {
+ } else {
tdist = (x - minc2) * C2_SCALE;
max_dist += tdist*tdist;
- }
- }
-
- mindist[i] = min_dist; /* save away the results */
- if (max_dist < minmaxdist)
- minmaxdist = max_dist;
- }
-
- /* Now we know that no cell in the update box is more than minmaxdist
- * away from some colormap entry. Therefore, only colors that are
- * within minmaxdist of some part of the box need be considered.
- */
- ncolors = 0;
- for (i = 0; i < numcolors; i++) {
- if (mindist[i] <= minmaxdist)
- colorlist[ncolors++] = (JSAMPLE) i;
- }
- return ncolors;
+ }
+ }
+
+ mindist[i] = min_dist; /* save away the results */
+ if (max_dist < minmaxdist)
+ minmaxdist = max_dist;
+ }
+
+ /* Now we know that no cell in the update box is more than minmaxdist
+ * away from some colormap entry. Therefore, only colors that are
+ * within minmaxdist of some part of the box need be considered.
+ */
+ ncolors = 0;
+ for (i = 0; i < numcolors; i++) {
+ if (mindist[i] <= minmaxdist)
+ colorlist[ncolors++] = (JSAMPLE) i;
+ }
+ return ncolors;
}
LOCAL(void)
find_best_colors (j_decompress_ptr cinfo, int minc0, int minc1, int minc2,
- int numcolors, JSAMPLE colorlist[], JSAMPLE bestcolor[])
+ int numcolors, JSAMPLE colorlist[], JSAMPLE bestcolor[])
/* Find the closest colormap entry for each cell in the update box,
* given the list of candidate colors prepared by find_nearby_colors.
* Return the indexes of the closest entries in the bestcolor[] array.
@@ -781,73 +781,73 @@ find_best_colors (j_decompress_ptr cinfo, int minc0, int minc1, int minc2,
* find the distance from a colormap entry to successive cells in the box.
*/
{
- int ic0, ic1, ic2;
- int i, icolor;
- register INT32 * bptr; /* pointer into bestdist[] array */
- JSAMPLE * cptr; /* pointer into bestcolor[] array */
- INT32 dist0, dist1; /* initial distance values */
- register INT32 dist2; /* current distance in inner loop */
- INT32 xx0, xx1; /* distance increments */
- register INT32 xx2;
- INT32 inc0, inc1, inc2; /* initial values for increments */
- /* This array holds the distance to the nearest-so-far color for each cell */
- INT32 bestdist[BOX_C0_ELEMS * BOX_C1_ELEMS * BOX_C2_ELEMS];
-
- /* Initialize best-distance for each cell of the update box */
- bptr = bestdist;
- for (i = BOX_C0_ELEMS*BOX_C1_ELEMS*BOX_C2_ELEMS-1; i >= 0; i--)
- *bptr++ = 0x7FFFFFFFL;
-
- /* For each color selected by find_nearby_colors,
- * compute its distance to the center of each cell in the box.
- * If that's less than best-so-far, update best distance and color number.
- */
-
- /* Nominal steps between cell centers ("x" in Thomas article) */
+ int ic0, ic1, ic2;
+ int i, icolor;
+ register INT32 * bptr; /* pointer into bestdist[] array */
+ JSAMPLE * cptr; /* pointer into bestcolor[] array */
+ INT32 dist0, dist1; /* initial distance values */
+ register INT32 dist2; /* current distance in inner loop */
+ INT32 xx0, xx1; /* distance increments */
+ register INT32 xx2;
+ INT32 inc0, inc1, inc2; /* initial values for increments */
+ /* This array holds the distance to the nearest-so-far color for each cell */
+ INT32 bestdist[BOX_C0_ELEMS * BOX_C1_ELEMS * BOX_C2_ELEMS];
+
+ /* Initialize best-distance for each cell of the update box */
+ bptr = bestdist;
+ for (i = BOX_C0_ELEMS*BOX_C1_ELEMS*BOX_C2_ELEMS-1; i >= 0; i--)
+ *bptr++ = 0x7FFFFFFFL;
+
+ /* For each color selected by find_nearby_colors,
+ * compute its distance to the center of each cell in the box.
+ * If that's less than best-so-far, update best distance and color number.
+ */
+
+ /* Nominal steps between cell centers ("x" in Thomas article) */
#define STEP_C0 ((1 << C0_SHIFT) * C0_SCALE)
#define STEP_C1 ((1 << C1_SHIFT) * C1_SCALE)
#define STEP_C2 ((1 << C2_SHIFT) * C2_SCALE)
- for (i = 0; i < numcolors; i++) {
- icolor = GETJSAMPLE(colorlist[i]);
- /* Compute (square of) distance from minc0/c1/c2 to this color */
- inc0 = (minc0 - GETJSAMPLE(cinfo->colormap[0][icolor])) * C0_SCALE;
- dist0 = inc0*inc0;
- inc1 = (minc1 - GETJSAMPLE(cinfo->colormap[1][icolor])) * C1_SCALE;
- dist0 += inc1*inc1;
- inc2 = (minc2 - GETJSAMPLE(cinfo->colormap[2][icolor])) * C2_SCALE;
- dist0 += inc2*inc2;
- /* Form the initial difference increments */
- inc0 = inc0 * (2 * STEP_C0) + STEP_C0 * STEP_C0;
- inc1 = inc1 * (2 * STEP_C1) + STEP_C1 * STEP_C1;
- inc2 = inc2 * (2 * STEP_C2) + STEP_C2 * STEP_C2;
- /* Now loop over all cells in box, updating distance per Thomas method */
- bptr = bestdist;
- cptr = bestcolor;
- xx0 = inc0;
- for (ic0 = BOX_C0_ELEMS-1; ic0 >= 0; ic0--) {
- dist1 = dist0;
- xx1 = inc1;
- for (ic1 = BOX_C1_ELEMS-1; ic1 >= 0; ic1--) {
+ for (i = 0; i < numcolors; i++) {
+ icolor = GETJSAMPLE(colorlist[i]);
+ /* Compute (square of) distance from minc0/c1/c2 to this color */
+ inc0 = (minc0 - GETJSAMPLE(cinfo->colormap[0][icolor])) * C0_SCALE;
+ dist0 = inc0*inc0;
+ inc1 = (minc1 - GETJSAMPLE(cinfo->colormap[1][icolor])) * C1_SCALE;
+ dist0 += inc1*inc1;
+ inc2 = (minc2 - GETJSAMPLE(cinfo->colormap[2][icolor])) * C2_SCALE;
+ dist0 += inc2*inc2;
+ /* Form the initial difference increments */
+ inc0 = inc0 * (2 * STEP_C0) + STEP_C0 * STEP_C0;
+ inc1 = inc1 * (2 * STEP_C1) + STEP_C1 * STEP_C1;
+ inc2 = inc2 * (2 * STEP_C2) + STEP_C2 * STEP_C2;
+ /* Now loop over all cells in box, updating distance per Thomas method */
+ bptr = bestdist;
+ cptr = bestcolor;
+ xx0 = inc0;
+ for (ic0 = BOX_C0_ELEMS-1; ic0 >= 0; ic0--) {
+ dist1 = dist0;
+ xx1 = inc1;
+ for (ic1 = BOX_C1_ELEMS-1; ic1 >= 0; ic1--) {
dist2 = dist1;
xx2 = inc2;
for (ic2 = BOX_C2_ELEMS-1; ic2 >= 0; ic2--) {
- if (dist2 < *bptr) {
- *bptr = dist2;
- *cptr = (JSAMPLE) icolor;
- }
- dist2 += xx2;
- xx2 += 2 * STEP_C2 * STEP_C2;
- bptr++;
- cptr++;
+ if (dist2 < *bptr) {
+ *bptr = dist2;
+ *cptr = (JSAMPLE) icolor;
+ }
+ dist2 += xx2;
+ xx2 += 2 * STEP_C2 * STEP_C2;
+ bptr++;
+ cptr++;
}
dist1 += xx1;
xx1 += 2 * STEP_C1 * STEP_C1;
- }
- dist0 += xx0;
- xx0 += 2 * STEP_C0 * STEP_C0;
- }
- }
+ }
+ dist0 += xx0;
+ xx0 += 2 * STEP_C0 * STEP_C0;
+ }
+ }
}
@@ -857,53 +857,53 @@ fill_inverse_cmap (j_decompress_ptr cinfo, int c0, int c1, int c2)
/* histogram cell c0/c1/c2. (Only that one cell MUST be filled, but */
/* we can fill as many others as we wish.) */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- hist3d histogram = cquantize->histogram;
- int minc0, minc1, minc2; /* lower left corner of update box */
- int ic0, ic1, ic2;
- register JSAMPLE * cptr; /* pointer into bestcolor[] array */
- register histptr cachep; /* pointer into main cache array */
- /* This array lists the candidate colormap indexes. */
- JSAMPLE colorlist[MAXNUMCOLORS];
- int numcolors; /* number of candidate colors */
- /* This array holds the actually closest colormap index for each cell. */
- JSAMPLE bestcolor[BOX_C0_ELEMS * BOX_C1_ELEMS * BOX_C2_ELEMS];
-
- /* Convert cell coordinates to update box ID */
- c0 >>= BOX_C0_LOG;
- c1 >>= BOX_C1_LOG;
- c2 >>= BOX_C2_LOG;
-
- /* Compute true coordinates of update box's origin corner.
- * Actually we compute the coordinates of the center of the corner
- * histogram cell, which are the lower bounds of the volume we care about.
- */
- minc0 = (c0 << BOX_C0_SHIFT) + ((1 << C0_SHIFT) >> 1);
- minc1 = (c1 << BOX_C1_SHIFT) + ((1 << C1_SHIFT) >> 1);
- minc2 = (c2 << BOX_C2_SHIFT) + ((1 << C2_SHIFT) >> 1);
-
- /* Determine which colormap entries are close enough to be candidates
- * for the nearest entry to some cell in the update box.
- */
- numcolors = find_nearby_colors(cinfo, minc0, minc1, minc2, colorlist);
-
- /* Determine the actually nearest colors. */
- find_best_colors(cinfo, minc0, minc1, minc2, numcolors, colorlist,
- bestcolor);
-
- /* Save the best color numbers (plus 1) in the main cache array */
- c0 <<= BOX_C0_LOG; /* convert ID back to base cell indexes */
- c1 <<= BOX_C1_LOG;
- c2 <<= BOX_C2_LOG;
- cptr = bestcolor;
- for (ic0 = 0; ic0 < BOX_C0_ELEMS; ic0++) {
- for (ic1 = 0; ic1 < BOX_C1_ELEMS; ic1++) {
- cachep = & histogram[c0+ic0][c1+ic1][c2];
- for (ic2 = 0; ic2 < BOX_C2_ELEMS; ic2++) {
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ hist3d histogram = cquantize->histogram;
+ int minc0, minc1, minc2; /* lower left corner of update box */
+ int ic0, ic1, ic2;
+ register JSAMPLE * cptr; /* pointer into bestcolor[] array */
+ register histptr cachep; /* pointer into main cache array */
+ /* This array lists the candidate colormap indexes. */
+ JSAMPLE colorlist[MAXNUMCOLORS];
+ int numcolors; /* number of candidate colors */
+ /* This array holds the actually closest colormap index for each cell. */
+ JSAMPLE bestcolor[BOX_C0_ELEMS * BOX_C1_ELEMS * BOX_C2_ELEMS];
+
+ /* Convert cell coordinates to update box ID */
+ c0 >>= BOX_C0_LOG;
+ c1 >>= BOX_C1_LOG;
+ c2 >>= BOX_C2_LOG;
+
+ /* Compute true coordinates of update box's origin corner.
+ * Actually we compute the coordinates of the center of the corner
+ * histogram cell, which are the lower bounds of the volume we care about.
+ */
+ minc0 = (c0 << BOX_C0_SHIFT) + ((1 << C0_SHIFT) >> 1);
+ minc1 = (c1 << BOX_C1_SHIFT) + ((1 << C1_SHIFT) >> 1);
+ minc2 = (c2 << BOX_C2_SHIFT) + ((1 << C2_SHIFT) >> 1);
+
+ /* Determine which colormap entries are close enough to be candidates
+ * for the nearest entry to some cell in the update box.
+ */
+ numcolors = find_nearby_colors(cinfo, minc0, minc1, minc2, colorlist);
+
+ /* Determine the actually nearest colors. */
+ find_best_colors(cinfo, minc0, minc1, minc2, numcolors, colorlist,
+ bestcolor);
+
+ /* Save the best color numbers (plus 1) in the main cache array */
+ c0 <<= BOX_C0_LOG; /* convert ID back to base cell indexes */
+ c1 <<= BOX_C1_LOG;
+ c2 <<= BOX_C2_LOG;
+ cptr = bestcolor;
+ for (ic0 = 0; ic0 < BOX_C0_ELEMS; ic0++) {
+ for (ic1 = 0; ic1 < BOX_C1_ELEMS; ic1++) {
+ cachep = & histogram[c0+ic0][c1+ic1][c2];
+ for (ic2 = 0; ic2 < BOX_C2_ELEMS; ic2++) {
*cachep++ = (histcell) (GETJSAMPLE(*cptr++) + 1);
- }
- }
- }
+ }
+ }
+ }
}
@@ -913,177 +913,177 @@ fill_inverse_cmap (j_decompress_ptr cinfo, int c0, int c1, int c2)
METHODDEF(void)
pass2_no_dither (j_decompress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPARRAY output_buf, int num_rows)
+ JSAMPARRAY input_buf, JSAMPARRAY output_buf, int num_rows)
/* This version performs no dithering */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- hist3d histogram = cquantize->histogram;
- register JSAMPROW inptr, outptr;
- register histptr cachep;
- register int c0, c1, c2;
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
-
- for (row = 0; row < num_rows; row++) {
- inptr = input_buf[row];
- outptr = output_buf[row];
- for (col = width; col > 0; col--) {
- /* get pixel value and index into the cache */
- c0 = GETJSAMPLE(*inptr++) >> C0_SHIFT;
- c1 = GETJSAMPLE(*inptr++) >> C1_SHIFT;
- c2 = GETJSAMPLE(*inptr++) >> C2_SHIFT;
- cachep = & histogram[c0][c1][c2];
- /* If we have not seen this color before, find nearest colormap entry */
- /* and update the cache */
- if (*cachep == 0)
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ hist3d histogram = cquantize->histogram;
+ register JSAMPROW inptr, outptr;
+ register histptr cachep;
+ register int c0, c1, c2;
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+
+ for (row = 0; row < num_rows; row++) {
+ inptr = input_buf[row];
+ outptr = output_buf[row];
+ for (col = width; col > 0; col--) {
+ /* get pixel value and index into the cache */
+ c0 = GETJSAMPLE(*inptr++) >> C0_SHIFT;
+ c1 = GETJSAMPLE(*inptr++) >> C1_SHIFT;
+ c2 = GETJSAMPLE(*inptr++) >> C2_SHIFT;
+ cachep = & histogram[c0][c1][c2];
+ /* If we have not seen this color before, find nearest colormap entry */
+ /* and update the cache */
+ if (*cachep == 0)
fill_inverse_cmap(cinfo, c0,c1,c2);
- /* Now emit the colormap index for this cell */
- *outptr++ = (JSAMPLE) (*cachep - 1);
- }
- }
+ /* Now emit the colormap index for this cell */
+ *outptr++ = (JSAMPLE) (*cachep - 1);
+ }
+ }
}
METHODDEF(void)
pass2_fs_dither (j_decompress_ptr cinfo,
- JSAMPARRAY input_buf, JSAMPARRAY output_buf, int num_rows)
+ JSAMPARRAY input_buf, JSAMPARRAY output_buf, int num_rows)
/* This version performs Floyd-Steinberg dithering */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- hist3d histogram = cquantize->histogram;
- register LOCFSERROR cur0, cur1, cur2; /* current error or pixel value */
- LOCFSERROR belowerr0, belowerr1, belowerr2; /* error for pixel below cur */
- LOCFSERROR bpreverr0, bpreverr1, bpreverr2; /* error for below/prev col */
- register FSERRPTR errorptr; /* => fserrors[] at column before current */
- JSAMPROW inptr; /* => current input pixel */
- JSAMPROW outptr; /* => current output pixel */
- histptr cachep;
- int dir; /* +1 or -1 depending on direction */
- int dir3; /* 3*dir, for advancing inptr & errorptr */
- int row;
- JDIMENSION col;
- JDIMENSION width = cinfo->output_width;
- JSAMPLE *range_limit = cinfo->sample_range_limit;
- int *error_limit = cquantize->error_limiter;
- JSAMPROW colormap0 = cinfo->colormap[0];
- JSAMPROW colormap1 = cinfo->colormap[1];
- JSAMPROW colormap2 = cinfo->colormap[2];
- SHIFT_TEMPS
-
- for (row = 0; row < num_rows; row++) {
- inptr = input_buf[row];
- outptr = output_buf[row];
- if (cquantize->on_odd_row) {
- /* work right to left in this row */
- inptr += (width-1) * 3; /* so point to rightmost pixel */
- outptr += width-1;
- dir = -1;
- dir3 = -3;
- errorptr = cquantize->fserrors + (width+1)*3; /* => entry after last column */
- cquantize->on_odd_row = FALSE; /* flip for next time */
- } else {
- /* work left to right in this row */
- dir = 1;
- dir3 = 3;
- errorptr = cquantize->fserrors; /* => entry before first real column */
- cquantize->on_odd_row = TRUE; /* flip for next time */
- }
- /* Preset error values: no error propagated to first pixel from left */
- cur0 = cur1 = cur2 = 0;
- /* and no error propagated to row below yet */
- belowerr0 = belowerr1 = belowerr2 = 0;
- bpreverr0 = bpreverr1 = bpreverr2 = 0;
-
- for (col = width; col > 0; col--) {
- /* curN holds the error propagated from the previous pixel on the
- * current line. Add the error propagated from the previous line
- * to form the complete error correction term for this pixel, and
- * round the error term (which is expressed * 16) to an integer.
- * RIGHT_SHIFT rounds towards minus infinity, so adding 8 is correct
- * for either sign of the error value.
- * Note: errorptr points to *previous* column's array entry.
- */
- cur0 = RIGHT_SHIFT(cur0 + errorptr[dir3+0] + 8, 4);
- cur1 = RIGHT_SHIFT(cur1 + errorptr[dir3+1] + 8, 4);
- cur2 = RIGHT_SHIFT(cur2 + errorptr[dir3+2] + 8, 4);
- /* Limit the error using transfer function set by init_error_limit.
- * See comments with init_error_limit for rationale.
- */
- cur0 = error_limit[cur0];
- cur1 = error_limit[cur1];
- cur2 = error_limit[cur2];
- /* Form pixel value + error, and range-limit to 0..MAXJSAMPLE.
- * The maximum error is +- MAXJSAMPLE (or less with error limiting);
- * this sets the required size of the range_limit array.
- */
- cur0 += GETJSAMPLE(inptr[0]);
- cur1 += GETJSAMPLE(inptr[1]);
- cur2 += GETJSAMPLE(inptr[2]);
- cur0 = GETJSAMPLE(range_limit[cur0]);
- cur1 = GETJSAMPLE(range_limit[cur1]);
- cur2 = GETJSAMPLE(range_limit[cur2]);
- /* Index into the cache with adjusted pixel value */
- cachep = & histogram[cur0>>C0_SHIFT][cur1>>C1_SHIFT][cur2>>C2_SHIFT];
- /* If we have not seen this color before, find nearest colormap */
- /* entry and update the cache */
- if (*cachep == 0)
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ hist3d histogram = cquantize->histogram;
+ register LOCFSERROR cur0, cur1, cur2; /* current error or pixel value */
+ LOCFSERROR belowerr0, belowerr1, belowerr2; /* error for pixel below cur */
+ LOCFSERROR bpreverr0, bpreverr1, bpreverr2; /* error for below/prev col */
+ register FSERRPTR errorptr; /* => fserrors[] at column before current */
+ JSAMPROW inptr; /* => current input pixel */
+ JSAMPROW outptr; /* => current output pixel */
+ histptr cachep;
+ int dir; /* +1 or -1 depending on direction */
+ int dir3; /* 3*dir, for advancing inptr & errorptr */
+ int row;
+ JDIMENSION col;
+ JDIMENSION width = cinfo->output_width;
+ JSAMPLE *range_limit = cinfo->sample_range_limit;
+ int *error_limit = cquantize->error_limiter;
+ JSAMPROW colormap0 = cinfo->colormap[0];
+ JSAMPROW colormap1 = cinfo->colormap[1];
+ JSAMPROW colormap2 = cinfo->colormap[2];
+ SHIFT_TEMPS
+
+ for (row = 0; row < num_rows; row++) {
+ inptr = input_buf[row];
+ outptr = output_buf[row];
+ if (cquantize->on_odd_row) {
+ /* work right to left in this row */
+ inptr += (width-1) * 3; /* so point to rightmost pixel */
+ outptr += width-1;
+ dir = -1;
+ dir3 = -3;
+ errorptr = cquantize->fserrors + (width+1)*3; /* => entry after last column */
+ cquantize->on_odd_row = FALSE; /* flip for next time */
+ } else {
+ /* work left to right in this row */
+ dir = 1;
+ dir3 = 3;
+ errorptr = cquantize->fserrors; /* => entry before first real column */
+ cquantize->on_odd_row = TRUE; /* flip for next time */
+ }
+ /* Preset error values: no error propagated to first pixel from left */
+ cur0 = cur1 = cur2 = 0;
+ /* and no error propagated to row below yet */
+ belowerr0 = belowerr1 = belowerr2 = 0;
+ bpreverr0 = bpreverr1 = bpreverr2 = 0;
+
+ for (col = width; col > 0; col--) {
+ /* curN holds the error propagated from the previous pixel on the
+ * current line. Add the error propagated from the previous line
+ * to form the complete error correction term for this pixel, and
+ * round the error term (which is expressed * 16) to an integer.
+ * RIGHT_SHIFT rounds towards minus infinity, so adding 8 is correct
+ * for either sign of the error value.
+ * Note: errorptr points to *previous* column's array entry.
+ */
+ cur0 = RIGHT_SHIFT(cur0 + errorptr[dir3+0] + 8, 4);
+ cur1 = RIGHT_SHIFT(cur1 + errorptr[dir3+1] + 8, 4);
+ cur2 = RIGHT_SHIFT(cur2 + errorptr[dir3+2] + 8, 4);
+ /* Limit the error using transfer function set by init_error_limit.
+ * See comments with init_error_limit for rationale.
+ */
+ cur0 = error_limit[cur0];
+ cur1 = error_limit[cur1];
+ cur2 = error_limit[cur2];
+ /* Form pixel value + error, and range-limit to 0..MAXJSAMPLE.
+ * The maximum error is +- MAXJSAMPLE (or less with error limiting);
+ * this sets the required size of the range_limit array.
+ */
+ cur0 += GETJSAMPLE(inptr[0]);
+ cur1 += GETJSAMPLE(inptr[1]);
+ cur2 += GETJSAMPLE(inptr[2]);
+ cur0 = GETJSAMPLE(range_limit[cur0]);
+ cur1 = GETJSAMPLE(range_limit[cur1]);
+ cur2 = GETJSAMPLE(range_limit[cur2]);
+ /* Index into the cache with adjusted pixel value */
+ cachep = & histogram[cur0>>C0_SHIFT][cur1>>C1_SHIFT][cur2>>C2_SHIFT];
+ /* If we have not seen this color before, find nearest colormap */
+ /* entry and update the cache */
+ if (*cachep == 0)
fill_inverse_cmap(cinfo, cur0>>C0_SHIFT,cur1>>C1_SHIFT,cur2>>C2_SHIFT);
- /* Now emit the colormap index for this cell */
- { register int pixcode = *cachep - 1;
+ /* Now emit the colormap index for this cell */
+ { register int pixcode = *cachep - 1;
*outptr = (JSAMPLE) pixcode;
/* Compute representation error for this pixel */
cur0 -= GETJSAMPLE(colormap0[pixcode]);
cur1 -= GETJSAMPLE(colormap1[pixcode]);
cur2 -= GETJSAMPLE(colormap2[pixcode]);
- }
- /* Compute error fractions to be propagated to adjacent pixels.
- * Add these into the running sums, and simultaneously shift the
- * next-line error sums left by 1 column.
- */
- { register LOCFSERROR bnexterr, delta;
-
- bnexterr = cur0; /* Process component 0 */
+ }
+ /* Compute error fractions to be propagated to adjacent pixels.
+ * Add these into the running sums, and simultaneously shift the
+ * next-line error sums left by 1 column.
+ */
+ { register LOCFSERROR bnexterr, delta;
+
+ bnexterr = cur0; /* Process component 0 */
delta = cur0 * 2;
- cur0 += delta; /* form error * 3 */
+ cur0 += delta; /* form error * 3 */
errorptr[0] = (FSERROR) (bpreverr0 + cur0);
- cur0 += delta; /* form error * 5 */
+ cur0 += delta; /* form error * 5 */
bpreverr0 = belowerr0 + cur0;
belowerr0 = bnexterr;
- cur0 += delta; /* form error * 7 */
- bnexterr = cur1; /* Process component 1 */
+ cur0 += delta; /* form error * 7 */
+ bnexterr = cur1; /* Process component 1 */
delta = cur1 * 2;
- cur1 += delta; /* form error * 3 */
+ cur1 += delta; /* form error * 3 */
errorptr[1] = (FSERROR) (bpreverr1 + cur1);
- cur1 += delta; /* form error * 5 */
+ cur1 += delta; /* form error * 5 */
bpreverr1 = belowerr1 + cur1;
belowerr1 = bnexterr;
- cur1 += delta; /* form error * 7 */
- bnexterr = cur2; /* Process component 2 */
+ cur1 += delta; /* form error * 7 */
+ bnexterr = cur2; /* Process component 2 */
delta = cur2 * 2;
- cur2 += delta; /* form error * 3 */
+ cur2 += delta; /* form error * 3 */
errorptr[2] = (FSERROR) (bpreverr2 + cur2);
- cur2 += delta; /* form error * 5 */
+ cur2 += delta; /* form error * 5 */
bpreverr2 = belowerr2 + cur2;
belowerr2 = bnexterr;
- cur2 += delta; /* form error * 7 */
- }
- /* At this point curN contains the 7/16 error value to be propagated
- * to the next pixel on the current line, and all the errors for the
- * next line have been shifted over. We are therefore ready to move on.
- */
- inptr += dir3; /* Advance pixel pointers to next column */
- outptr += dir;
- errorptr += dir3; /* advance errorptr to current column */
- }
- /* Post-loop cleanup: we must unload the final error values into the
- * final fserrors[] entry. Note we need not unload belowerrN because
- * it is for the dummy column before or after the actual array.
- */
- errorptr[0] = (FSERROR) bpreverr0; /* unload prev errs into array */
- errorptr[1] = (FSERROR) bpreverr1;
- errorptr[2] = (FSERROR) bpreverr2;
- }
+ cur2 += delta; /* form error * 7 */
+ }
+ /* At this point curN contains the 7/16 error value to be propagated
+ * to the next pixel on the current line, and all the errors for the
+ * next line have been shifted over. We are therefore ready to move on.
+ */
+ inptr += dir3; /* Advance pixel pointers to next column */
+ outptr += dir;
+ errorptr += dir3; /* advance errorptr to current column */
+ }
+ /* Post-loop cleanup: we must unload the final error values into the
+ * final fserrors[] entry. Note we need not unload belowerrN because
+ * it is for the dummy column before or after the actual array.
+ */
+ errorptr[0] = (FSERROR) bpreverr0; /* unload prev errs into array */
+ errorptr[1] = (FSERROR) bpreverr1;
+ errorptr[2] = (FSERROR) bpreverr2;
+ }
}
@@ -1108,29 +1108,29 @@ LOCAL(void)
init_error_limit (j_decompress_ptr cinfo)
/* Allocate and fill in the error_limiter table */
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- int * table;
- int in, out;
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ int * table;
+ int in, out;
- table = (int *) (*cinfo->mem->alloc_small)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, (MAXJSAMPLE*2+1) * SIZEOF(int));
- table += MAXJSAMPLE; /* so can index -MAXJSAMPLE .. +MAXJSAMPLE */
- cquantize->error_limiter = table;
+ table = (int *) (*cinfo->mem->alloc_small)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, (MAXJSAMPLE*2+1) * SIZEOF(int));
+ table += MAXJSAMPLE; /* so can index -MAXJSAMPLE .. +MAXJSAMPLE */
+ cquantize->error_limiter = table;
#define STEPSIZE ((MAXJSAMPLE+1)/16)
- /* Map errors 1:1 up to +- MAXJSAMPLE/16 */
- out = 0;
- for (in = 0; in < STEPSIZE; in++, out++) {
- table[in] = out; table[-in] = -out;
- }
- /* Map errors 1:2 up to +- 3*MAXJSAMPLE/16 */
- for (; in < STEPSIZE*3; in++, out += (in&1) ? 0 : 1) {
- table[in] = out; table[-in] = -out;
- }
- /* Clamp the rest to final out value (which is (MAXJSAMPLE+1)/8) */
- for (; in <= MAXJSAMPLE; in++) {
- table[in] = out; table[-in] = -out;
- }
+ /* Map errors 1:1 up to +- MAXJSAMPLE/16 */
+ out = 0;
+ for (in = 0; in < STEPSIZE; in++, out++) {
+ table[in] = out; table[-in] = -out;
+ }
+ /* Map errors 1:2 up to +- 3*MAXJSAMPLE/16 */
+ for (; in < STEPSIZE*3; in++, out += (in&1) ? 0 : 1) {
+ table[in] = out; table[-in] = -out;
+ }
+ /* Clamp the rest to final out value (which is (MAXJSAMPLE+1)/8) */
+ for (; in <= MAXJSAMPLE; in++) {
+ table[in] = out; table[-in] = -out;
+ }
#undef STEPSIZE
}
@@ -1142,20 +1142,20 @@ init_error_limit (j_decompress_ptr cinfo)
METHODDEF(void)
finish_pass1 (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- /* Select the representative colors and fill in cinfo->colormap */
- cinfo->colormap = cquantize->sv_colormap;
- select_colors(cinfo, cquantize->desired);
- /* Force next pass to zero the color index table */
- cquantize->needs_zeroed = TRUE;
+ /* Select the representative colors and fill in cinfo->colormap */
+ cinfo->colormap = cquantize->sv_colormap;
+ select_colors(cinfo, cquantize->desired);
+ /* Force next pass to zero the color index table */
+ cquantize->needs_zeroed = TRUE;
}
METHODDEF(void)
finish_pass2 (j_decompress_ptr cinfo)
{
- /* no work */
+ /* no work */
}
@@ -1166,59 +1166,59 @@ finish_pass2 (j_decompress_ptr cinfo)
METHODDEF(void)
start_pass_2_quant (j_decompress_ptr cinfo, boolean is_pre_scan)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- hist3d histogram = cquantize->histogram;
- int i;
-
- /* Only F-S dithering or no dithering is supported. */
- /* If user asks for ordered dither, give him F-S. */
- if (cinfo->dither_mode != JDITHER_NONE)
- cinfo->dither_mode = JDITHER_FS;
-
- if (is_pre_scan) {
- /* Set up method pointers */
- cquantize->pub.color_quantize = prescan_quantize;
- cquantize->pub.finish_pass = finish_pass1;
- cquantize->needs_zeroed = TRUE; /* Always zero histogram */
- } else {
- /* Set up method pointers */
- if (cinfo->dither_mode == JDITHER_FS)
- cquantize->pub.color_quantize = pass2_fs_dither;
- else
- cquantize->pub.color_quantize = pass2_no_dither;
- cquantize->pub.finish_pass = finish_pass2;
-
- /* Make sure color count is acceptable */
- i = cinfo->actual_number_of_colors;
- if (i < 1)
- ERREXIT1(cinfo, JERR_QUANT_FEW_COLORS, 1);
- if (i > MAXNUMCOLORS)
- ERREXIT1(cinfo, JERR_QUANT_MANY_COLORS, MAXNUMCOLORS);
-
- if (cinfo->dither_mode == JDITHER_FS) {
- size_t arraysize = (size_t) ((cinfo->output_width + 2) *
- (3 * SIZEOF(FSERROR)));
- /* Allocate Floyd-Steinberg workspace if we didn't already. */
- if (cquantize->fserrors == NULL)
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ hist3d histogram = cquantize->histogram;
+ int i;
+
+ /* Only F-S dithering or no dithering is supported. */
+ /* If user asks for ordered dither, give him F-S. */
+ if (cinfo->dither_mode != JDITHER_NONE)
+ cinfo->dither_mode = JDITHER_FS;
+
+ if (is_pre_scan) {
+ /* Set up method pointers */
+ cquantize->pub.color_quantize = prescan_quantize;
+ cquantize->pub.finish_pass = finish_pass1;
+ cquantize->needs_zeroed = TRUE; /* Always zero histogram */
+ } else {
+ /* Set up method pointers */
+ if (cinfo->dither_mode == JDITHER_FS)
+ cquantize->pub.color_quantize = pass2_fs_dither;
+ else
+ cquantize->pub.color_quantize = pass2_no_dither;
+ cquantize->pub.finish_pass = finish_pass2;
+
+ /* Make sure color count is acceptable */
+ i = cinfo->actual_number_of_colors;
+ if (i < 1)
+ ERREXIT1(cinfo, JERR_QUANT_FEW_COLORS, 1);
+ if (i > MAXNUMCOLORS)
+ ERREXIT1(cinfo, JERR_QUANT_MANY_COLORS, MAXNUMCOLORS);
+
+ if (cinfo->dither_mode == JDITHER_FS) {
+ size_t arraysize = (size_t) ((cinfo->output_width + 2) *
+ (3 * SIZEOF(FSERROR)));
+ /* Allocate Floyd-Steinberg workspace if we didn't already. */
+ if (cquantize->fserrors == NULL)
cquantize->fserrors = (FSERRPTR) (*cinfo->mem->alloc_large)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, arraysize);
- /* Initialize the propagated errors to zero. */
- jzero_far((void FAR *) cquantize->fserrors, arraysize);
- /* Make the error-limit table if we didn't already. */
- if (cquantize->error_limiter == NULL)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, arraysize);
+ /* Initialize the propagated errors to zero. */
+ jzero_far((void FAR *) cquantize->fserrors, arraysize);
+ /* Make the error-limit table if we didn't already. */
+ if (cquantize->error_limiter == NULL)
init_error_limit(cinfo);
- cquantize->on_odd_row = FALSE;
- }
-
- }
- /* Zero the histogram or inverse color map, if necessary */
- if (cquantize->needs_zeroed) {
- for (i = 0; i < HIST_C0_ELEMS; i++) {
- jzero_far((void FAR *) histogram[i],
+ cquantize->on_odd_row = FALSE;
+ }
+
+ }
+ /* Zero the histogram or inverse color map, if necessary */
+ if (cquantize->needs_zeroed) {
+ for (i = 0; i < HIST_C0_ELEMS; i++) {
+ jzero_far((void FAR *) histogram[i],
HIST_C1_ELEMS*HIST_C2_ELEMS * SIZEOF(histcell));
- }
- cquantize->needs_zeroed = FALSE;
- }
+ }
+ cquantize->needs_zeroed = FALSE;
+ }
}
@@ -1229,10 +1229,10 @@ start_pass_2_quant (j_decompress_ptr cinfo, boolean is_pre_scan)
METHODDEF(void)
new_color_map_2_quant (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
+ my_cquantize_ptr cquantize = (my_cquantize_ptr) cinfo->cquantize;
- /* Reset the inverse color map */
- cquantize->needs_zeroed = TRUE;
+ /* Reset the inverse color map */
+ cquantize->needs_zeroed = TRUE;
}
@@ -1243,68 +1243,68 @@ new_color_map_2_quant (j_decompress_ptr cinfo)
GLOBAL(void)
jinit_2pass_quantizer (j_decompress_ptr cinfo)
{
- my_cquantize_ptr cquantize;
- int i;
+ my_cquantize_ptr cquantize;
+ int i;
- cquantize = (my_cquantize_ptr)
- (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ cquantize = (my_cquantize_ptr)
+ (*cinfo->mem->alloc_small) ((j_common_ptr) cinfo, JPOOL_IMAGE,
SIZEOF(my_cquantizer));
- cinfo->cquantize = (struct jpeg_color_quantizer *) cquantize;
- cquantize->pub.start_pass = start_pass_2_quant;
- cquantize->pub.new_color_map = new_color_map_2_quant;
- cquantize->fserrors = NULL; /* flag optional arrays not allocated */
- cquantize->error_limiter = NULL;
-
- /* Make sure jdmaster didn't give me a case I can't handle */
- if (cinfo->out_color_components != 3)
- ERREXIT(cinfo, JERR_NOTIMPL);
-
- /* Allocate the histogram/inverse colormap storage */
- cquantize->histogram = (hist3d) (*cinfo->mem->alloc_small)
- ((j_common_ptr) cinfo, JPOOL_IMAGE, HIST_C0_ELEMS * SIZEOF(hist2d));
- for (i = 0; i < HIST_C0_ELEMS; i++) {
- cquantize->histogram[i] = (hist2d) (*cinfo->mem->alloc_large)
- ((j_common_ptr) cinfo, JPOOL_IMAGE,
- HIST_C1_ELEMS*HIST_C2_ELEMS * SIZEOF(histcell));
- }
- cquantize->needs_zeroed = TRUE; /* histogram is garbage now */
-
- /* Allocate storage for the completed colormap, if required.
- * We do this now since it is FAR storage and may affect
- * the memory manager's space calculations.
- */
- if (cinfo->enable_2pass_quant) {
- /* Make sure color count is acceptable */
- int desired = cinfo->desired_number_of_colors;
- /* Lower bound on # of colors ... somewhat arbitrary as long as > 0 */
- if (desired < 8)
- ERREXIT1(cinfo, JERR_QUANT_FEW_COLORS, 8);
- /* Make sure colormap indexes can be represented by JSAMPLEs */
- if (desired > MAXNUMCOLORS)
- ERREXIT1(cinfo, JERR_QUANT_MANY_COLORS, MAXNUMCOLORS);
- cquantize->sv_colormap = (*cinfo->mem->alloc_sarray)
- ((j_common_ptr) cinfo,JPOOL_IMAGE, (JDIMENSION) desired, (JDIMENSION) 3);
- cquantize->desired = desired;
- } else
- cquantize->sv_colormap = NULL;
-
- /* Only F-S dithering or no dithering is supported. */
- /* If user asks for ordered dither, give him F-S. */
- if (cinfo->dither_mode != JDITHER_NONE)
- cinfo->dither_mode = JDITHER_FS;
-
- /* Allocate Floyd-Steinberg workspace if necessary.
- * This isn't really needed until pass 2, but again it is FAR storage.
- * Although we will cope with a later change in dither_mode,
- * we do not promise to honor max_memory_to_use if dither_mode changes.
- */
- if (cinfo->dither_mode == JDITHER_FS) {
- cquantize->fserrors = (FSERRPTR) (*cinfo->mem->alloc_large)
- ((j_common_ptr) cinfo, JPOOL_IMAGE,
- (size_t) ((cinfo->output_width + 2) * (3 * SIZEOF(FSERROR))));
- /* Might as well create the error-limiting table too. */
- init_error_limit(cinfo);
- }
+ cinfo->cquantize = (struct jpeg_color_quantizer *) cquantize;
+ cquantize->pub.start_pass = start_pass_2_quant;
+ cquantize->pub.new_color_map = new_color_map_2_quant;
+ cquantize->fserrors = NULL; /* flag optional arrays not allocated */
+ cquantize->error_limiter = NULL;
+
+ /* Make sure jdmaster didn't give me a case I can't handle */
+ if (cinfo->out_color_components != 3)
+ ERREXIT(cinfo, JERR_NOTIMPL);
+
+ /* Allocate the histogram/inverse colormap storage */
+ cquantize->histogram = (hist3d) (*cinfo->mem->alloc_small)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE, HIST_C0_ELEMS * SIZEOF(hist2d));
+ for (i = 0; i < HIST_C0_ELEMS; i++) {
+ cquantize->histogram[i] = (hist2d) (*cinfo->mem->alloc_large)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ HIST_C1_ELEMS*HIST_C2_ELEMS * SIZEOF(histcell));
+ }
+ cquantize->needs_zeroed = TRUE; /* histogram is garbage now */
+
+ /* Allocate storage for the completed colormap, if required.
+ * We do this now since it is FAR storage and may affect
+ * the memory manager's space calculations.
+ */
+ if (cinfo->enable_2pass_quant) {
+ /* Make sure color count is acceptable */
+ int desired = cinfo->desired_number_of_colors;
+ /* Lower bound on # of colors ... somewhat arbitrary as long as > 0 */
+ if (desired < 8)
+ ERREXIT1(cinfo, JERR_QUANT_FEW_COLORS, 8);
+ /* Make sure colormap indexes can be represented by JSAMPLEs */
+ if (desired > MAXNUMCOLORS)
+ ERREXIT1(cinfo, JERR_QUANT_MANY_COLORS, MAXNUMCOLORS);
+ cquantize->sv_colormap = (*cinfo->mem->alloc_sarray)
+ ((j_common_ptr) cinfo,JPOOL_IMAGE, (JDIMENSION) desired, (JDIMENSION) 3);
+ cquantize->desired = desired;
+ } else
+ cquantize->sv_colormap = NULL;
+
+ /* Only F-S dithering or no dithering is supported. */
+ /* If user asks for ordered dither, give him F-S. */
+ if (cinfo->dither_mode != JDITHER_NONE)
+ cinfo->dither_mode = JDITHER_FS;
+
+ /* Allocate Floyd-Steinberg workspace if necessary.
+ * This isn't really needed until pass 2, but again it is FAR storage.
+ * Although we will cope with a later change in dither_mode,
+ * we do not promise to honor max_memory_to_use if dither_mode changes.
+ */
+ if (cinfo->dither_mode == JDITHER_FS) {
+ cquantize->fserrors = (FSERRPTR) (*cinfo->mem->alloc_large)
+ ((j_common_ptr) cinfo, JPOOL_IMAGE,
+ (size_t) ((cinfo->output_width + 2) * (3 * SIZEOF(FSERROR))));
+ /* Might as well create the error-limiting table too. */
+ init_error_limit(cinfo);
+ }
}
#endif /* QUANT_2PASS_SUPPORTED */
diff --git a/src/lib/libjpeg/jutils.c b/src/lib/libjpeg/jutils.c
index 04351797cd7..f35082c5e7a 100644
--- a/src/lib/libjpeg/jutils.c
+++ b/src/lib/libjpeg/jutils.c
@@ -22,17 +22,17 @@
* of a DCT block read in natural order (left to right, top to bottom).
*/
-#if 0 /* This table is not actually needed in v6a */
+#if 0 /* This table is not actually needed in v6a */
const int jpeg_zigzag_order[DCTSIZE2] = {
- 0, 1, 5, 6, 14, 15, 27, 28,
- 2, 4, 7, 13, 16, 26, 29, 42,
- 3, 8, 12, 17, 25, 30, 41, 43,
- 9, 11, 18, 24, 31, 40, 44, 53,
- 10, 19, 23, 32, 39, 45, 52, 54,
- 20, 22, 33, 38, 46, 51, 55, 60,
- 21, 34, 37, 47, 50, 56, 59, 61,
- 35, 36, 48, 49, 57, 58, 62, 63
+ 0, 1, 5, 6, 14, 15, 27, 28,
+ 2, 4, 7, 13, 16, 26, 29, 42,
+ 3, 8, 12, 17, 25, 30, 41, 43,
+ 9, 11, 18, 24, 31, 40, 44, 53,
+ 10, 19, 23, 32, 39, 45, 52, 54,
+ 20, 22, 33, 38, 46, 51, 55, 60,
+ 21, 34, 37, 47, 50, 56, 59, 61,
+ 35, 36, 48, 49, 57, 58, 62, 63
};
#endif
@@ -52,67 +52,67 @@ const int jpeg_zigzag_order[DCTSIZE2] = {
*/
const int jpeg_natural_order[DCTSIZE2+16] = {
- 0, 1, 8, 16, 9, 2, 3, 10,
- 17, 24, 32, 25, 18, 11, 4, 5,
- 12, 19, 26, 33, 40, 48, 41, 34,
- 27, 20, 13, 6, 7, 14, 21, 28,
- 35, 42, 49, 56, 57, 50, 43, 36,
- 29, 22, 15, 23, 30, 37, 44, 51,
- 58, 59, 52, 45, 38, 31, 39, 46,
- 53, 60, 61, 54, 47, 55, 62, 63,
- 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
- 63, 63, 63, 63, 63, 63, 63, 63
+ 0, 1, 8, 16, 9, 2, 3, 10,
+ 17, 24, 32, 25, 18, 11, 4, 5,
+ 12, 19, 26, 33, 40, 48, 41, 34,
+ 27, 20, 13, 6, 7, 14, 21, 28,
+ 35, 42, 49, 56, 57, 50, 43, 36,
+ 29, 22, 15, 23, 30, 37, 44, 51,
+ 58, 59, 52, 45, 38, 31, 39, 46,
+ 53, 60, 61, 54, 47, 55, 62, 63,
+ 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
+ 63, 63, 63, 63, 63, 63, 63, 63
};
const int jpeg_natural_order7[7*7+16] = {
- 0, 1, 8, 16, 9, 2, 3, 10,
- 17, 24, 32, 25, 18, 11, 4, 5,
- 12, 19, 26, 33, 40, 48, 41, 34,
- 27, 20, 13, 6, 14, 21, 28, 35,
- 42, 49, 50, 43, 36, 29, 22, 30,
- 37, 44, 51, 52, 45, 38, 46, 53,
- 54,
- 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
- 63, 63, 63, 63, 63, 63, 63, 63
+ 0, 1, 8, 16, 9, 2, 3, 10,
+ 17, 24, 32, 25, 18, 11, 4, 5,
+ 12, 19, 26, 33, 40, 48, 41, 34,
+ 27, 20, 13, 6, 14, 21, 28, 35,
+ 42, 49, 50, 43, 36, 29, 22, 30,
+ 37, 44, 51, 52, 45, 38, 46, 53,
+ 54,
+ 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
+ 63, 63, 63, 63, 63, 63, 63, 63
};
const int jpeg_natural_order6[6*6+16] = {
- 0, 1, 8, 16, 9, 2, 3, 10,
- 17, 24, 32, 25, 18, 11, 4, 5,
- 12, 19, 26, 33, 40, 41, 34, 27,
- 20, 13, 21, 28, 35, 42, 43, 36,
- 29, 37, 44, 45,
- 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
- 63, 63, 63, 63, 63, 63, 63, 63
+ 0, 1, 8, 16, 9, 2, 3, 10,
+ 17, 24, 32, 25, 18, 11, 4, 5,
+ 12, 19, 26, 33, 40, 41, 34, 27,
+ 20, 13, 21, 28, 35, 42, 43, 36,
+ 29, 37, 44, 45,
+ 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
+ 63, 63, 63, 63, 63, 63, 63, 63
};
const int jpeg_natural_order5[5*5+16] = {
- 0, 1, 8, 16, 9, 2, 3, 10,
- 17, 24, 32, 25, 18, 11, 4, 12,
- 19, 26, 33, 34, 27, 20, 28, 35,
- 36,
- 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
- 63, 63, 63, 63, 63, 63, 63, 63
+ 0, 1, 8, 16, 9, 2, 3, 10,
+ 17, 24, 32, 25, 18, 11, 4, 12,
+ 19, 26, 33, 34, 27, 20, 28, 35,
+ 36,
+ 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
+ 63, 63, 63, 63, 63, 63, 63, 63
};
const int jpeg_natural_order4[4*4+16] = {
- 0, 1, 8, 16, 9, 2, 3, 10,
- 17, 24, 25, 18, 11, 19, 26, 27,
- 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
- 63, 63, 63, 63, 63, 63, 63, 63
+ 0, 1, 8, 16, 9, 2, 3, 10,
+ 17, 24, 25, 18, 11, 19, 26, 27,
+ 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
+ 63, 63, 63, 63, 63, 63, 63, 63
};
const int jpeg_natural_order3[3*3+16] = {
- 0, 1, 8, 16, 9, 2, 10, 17,
- 18,
- 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
- 63, 63, 63, 63, 63, 63, 63, 63
+ 0, 1, 8, 16, 9, 2, 10, 17,
+ 18,
+ 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
+ 63, 63, 63, 63, 63, 63, 63, 63
};
const int jpeg_natural_order2[2*2+16] = {
- 0, 1, 8, 9,
- 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
- 63, 63, 63, 63, 63, 63, 63, 63
+ 0, 1, 8, 9,
+ 63, 63, 63, 63, 63, 63, 63, 63, /* extra entries for safety in decoder */
+ 63, 63, 63, 63, 63, 63, 63, 63
};
@@ -125,7 +125,7 @@ jdiv_round_up (long a, long b)
/* Compute a/b rounded up to next integer, ie, ceil(a/b) */
/* Assumes a >= 0, b > 0 */
{
- return (a + b - 1L) / b;
+ return (a + b - 1L) / b;
}
@@ -134,8 +134,8 @@ jround_up (long a, long b)
/* Compute a rounded up to next multiple of b, ie, ceil(a/b)*b */
/* Assumes a >= 0, b > 0 */
{
- a += b - 1L;
- return a - (a % b);
+ a += b - 1L;
+ return a - (a % b);
}
@@ -148,67 +148,67 @@ jround_up (long a, long b)
* is not all that great, because these routines aren't very heavily used.)
*/
-#ifndef NEED_FAR_POINTERS /* normal case, same as regular macros */
-#define FMEMCOPY(dest,src,size) MEMCOPY(dest,src,size)
-#define FMEMZERO(target,size) MEMZERO(target,size)
-#else /* 80x86 case, define if we can */
+#ifndef NEED_FAR_POINTERS /* normal case, same as regular macros */
+#define FMEMCOPY(dest,src,size) MEMCOPY(dest,src,size)
+#define FMEMZERO(target,size) MEMZERO(target,size)
+#else /* 80x86 case, define if we can */
#ifdef USE_FMEM
-#define FMEMCOPY(dest,src,size) _fmemcpy((void FAR *)(dest), (const void FAR *)(src), (size_t)(size))
-#define FMEMZERO(target,size) _fmemset((void FAR *)(target), 0, (size_t)(size))
+#define FMEMCOPY(dest,src,size) _fmemcpy((void FAR *)(dest), (const void FAR *)(src), (size_t)(size))
+#define FMEMZERO(target,size) _fmemset((void FAR *)(target), 0, (size_t)(size))
#endif
#endif
GLOBAL(void)
jcopy_sample_rows (JSAMPARRAY input_array, int source_row,
- JSAMPARRAY output_array, int dest_row,
- int num_rows, JDIMENSION num_cols)
+ JSAMPARRAY output_array, int dest_row,
+ int num_rows, JDIMENSION num_cols)
/* Copy some rows of samples from one place to another.
* num_rows rows are copied from input_array[source_row++]
* to output_array[dest_row++]; these areas may overlap for duplication.
* The source and destination arrays must be at least as wide as num_cols.
*/
{
- register JSAMPROW inptr, outptr;
+ register JSAMPROW inptr, outptr;
#ifdef FMEMCOPY
- register size_t count = (size_t) (num_cols * SIZEOF(JSAMPLE));
+ register size_t count = (size_t) (num_cols * SIZEOF(JSAMPLE));
#else
- register JDIMENSION count;
+ register JDIMENSION count;
#endif
- register int row;
+ register int row;
- input_array += source_row;
- output_array += dest_row;
+ input_array += source_row;
+ output_array += dest_row;
- for (row = num_rows; row > 0; row--) {
- inptr = *input_array++;
- outptr = *output_array++;
+ for (row = num_rows; row > 0; row--) {
+ inptr = *input_array++;
+ outptr = *output_array++;
#ifdef FMEMCOPY
- FMEMCOPY(outptr, inptr, count);
+ FMEMCOPY(outptr, inptr, count);
#else
- for (count = num_cols; count > 0; count--)
- *outptr++ = *inptr++; /* needn't bother with GETJSAMPLE() here */
+ for (count = num_cols; count > 0; count--)
+ *outptr++ = *inptr++; /* needn't bother with GETJSAMPLE() here */
#endif
- }
+ }
}
GLOBAL(void)
jcopy_block_row (JBLOCKROW input_row, JBLOCKROW output_row,
- JDIMENSION num_blocks)
+ JDIMENSION num_blocks)
/* Copy a row of coefficient blocks from one place to another. */
{
#ifdef FMEMCOPY
- FMEMCOPY(output_row, input_row, num_blocks * (DCTSIZE2 * SIZEOF(JCOEF)));
+ FMEMCOPY(output_row, input_row, num_blocks * (DCTSIZE2 * SIZEOF(JCOEF)));
#else
- register JCOEFPTR inptr, outptr;
- register long count;
-
- inptr = (JCOEFPTR) input_row;
- outptr = (JCOEFPTR) output_row;
- for (count = (long) num_blocks * DCTSIZE2; count > 0; count--) {
- *outptr++ = *inptr++;
- }
+ register JCOEFPTR inptr, outptr;
+ register long count;
+
+ inptr = (JCOEFPTR) input_row;
+ outptr = (JCOEFPTR) output_row;
+ for (count = (long) num_blocks * DCTSIZE2; count > 0; count--) {
+ *outptr++ = *inptr++;
+ }
#endif
}
@@ -219,13 +219,13 @@ jzero_far (void FAR * target, size_t bytestozero)
/* This might be sample-array data, block-array data, or alloc_large data. */
{
#ifdef FMEMZERO
- FMEMZERO(target, bytestozero);
+ FMEMZERO(target, bytestozero);
#else
- register char FAR * ptr = (char FAR *) target;
- register size_t count;
+ register char FAR * ptr = (char FAR *) target;
+ register size_t count;
- for (count = bytestozero; count > 0; count--) {
- *ptr++ = 0;
- }
+ for (count = bytestozero; count > 0; count--) {
+ *ptr++ = 0;
+ }
#endif
}
diff --git a/src/lib/libjpeg/jversion.h b/src/lib/libjpeg/jversion.h
index e868538c884..805fc8da67f 100644
--- a/src/lib/libjpeg/jversion.h
+++ b/src/lib/libjpeg/jversion.h
@@ -9,6 +9,6 @@
*/
-#define JVERSION "8c 16-Jan-2011"
+#define JVERSION "8c 16-Jan-2011"
-#define JCOPYRIGHT "Copyright (C) 2011, Thomas G. Lane, Guido Vollbeding"
+#define JCOPYRIGHT "Copyright (C) 2011, Thomas G. Lane, Guido Vollbeding"
diff --git a/src/lib/portmidi/finddefault.c b/src/lib/portmidi/finddefault.c
index bc95a4001a6..f6169192109 100644
--- a/src/lib/portmidi/finddefault.c
+++ b/src/lib/portmidi/finddefault.c
@@ -24,34 +24,34 @@ PmDeviceID find_default_device(char *path, int input, PmDeviceID id)
returns matching device id if found, otherwise id
*/
{
- static char *pref_file = (char *)"com.apple.java.util.prefs.plist";
- char *pref_str = NULL;
- // read device preferences
- value_ptr prefs = bplist_read_user_pref(pref_file);
- if (prefs) {
- value_ptr pref_val = value_dict_lookup_using_path(prefs, path);
- if (pref_val) {
- pref_str = value_get_asciistring(pref_val);
- }
- }
- if (!pref_str) {
- bplist_free_data(); /* look elsewhere */
- prefs = bplist_read_system_pref(pref_file);
- if (prefs) {
- value_ptr pref_val = value_dict_lookup_using_path(prefs, path);
- if (pref_val) {
- pref_str = value_get_asciistring(pref_val);
- }
- }
- }
- if (pref_str) { /* search devices for match */
- int i = pm_find_default_device(pref_str, input);
- if (i != pmNoDevice) {
- id = i;
+ static char *pref_file = (char *)"com.apple.java.util.prefs.plist";
+ char *pref_str = NULL;
+ // read device preferences
+ value_ptr prefs = bplist_read_user_pref(pref_file);
+ if (prefs) {
+ value_ptr pref_val = value_dict_lookup_using_path(prefs, path);
+ if (pref_val) {
+ pref_str = value_get_asciistring(pref_val);
+ }
}
- }
- if (prefs) {
- bplist_free_data();
- }
- return id;
+ if (!pref_str) {
+ bplist_free_data(); /* look elsewhere */
+ prefs = bplist_read_system_pref(pref_file);
+ if (prefs) {
+ value_ptr pref_val = value_dict_lookup_using_path(prefs, path);
+ if (pref_val) {
+ pref_str = value_get_asciistring(pref_val);
+ }
+ }
+ }
+ if (pref_str) { /* search devices for match */
+ int i = pm_find_default_device(pref_str, input);
+ if (i != pmNoDevice) {
+ id = i;
+ }
+ }
+ if (prefs) {
+ bplist_free_data();
+ }
+ return id;
}
diff --git a/src/lib/portmidi/finddefaultlinux.c b/src/lib/portmidi/finddefaultlinux.c
index 8a92b6ebe0a..f381a5821dc 100644
--- a/src/lib/portmidi/finddefaultlinux.c
+++ b/src/lib/portmidi/finddefaultlinux.c
@@ -15,18 +15,18 @@ extern int pm_find_default_device(char *pattern, int is_input);
/* skip over spaces, return first non-space */
void skip_spaces(FILE *inf)
{
- char c;
- while (isspace(c = getc(inf))) ;
- ungetc(c, inf);
+ char c;
+ while (isspace(c = getc(inf))) ;
+ ungetc(c, inf);
}
/* trim leading spaces and match a string */
int match_string(FILE *inf, char *s)
{
- skip_spaces(inf);
- while (*s && *s == getc(inf)) s++;
- return (*s == 0);
-}
+ skip_spaces(inf);
+ while (*s && *s == getc(inf)) s++;
+ return (*s == 0);
+}
/* Parse preference files, find default device, search devices --
@@ -38,57 +38,57 @@ PmDeviceID find_default_device(char *path, int input, PmDeviceID id)
returns matching device id if found, otherwise id
*/
{
- static char *pref_2 = (char *)"/.java/.userPrefs/";
- static char *pref_3 = (char *)"prefs.xml";
- char *pref_1 = getenv("HOME");
- char *full_name, *path_ptr;
- FILE *inf;
- int c, i;
- if (!pref_1) goto nopref; // cannot find preference file
- // full_name will be larger than necessary
- full_name = malloc(strlen(pref_1) + strlen(pref_2) + strlen(pref_3) +
- strlen(path) + 2);
- strcpy(full_name, pref_1);
- strcat(full_name, pref_2);
- // copy all but last path segment to full_name
- if (*path == '/') path++; // skip initial slash in path
- path_ptr = strrchr(path, '/');
- if (path_ptr) { // copy up to slash after full_name
- path_ptr++;
- int offset = strlen(full_name);
- memcpy(full_name + offset, path, path_ptr - path);
- full_name[offset + path_ptr - path] = 0; // end of string
- } else {
- path_ptr = path;
- }
- strcat(full_name, pref_3);
- inf = fopen(full_name, "r");
- if (!inf) goto nopref; // cannot open preference file
- // We're not going to build or link in a full XML parser.
- // Instead, find the path string and quoute. Then, look for
- // "value", "=", quote. Then get string up to quote.
- while ((c = getc(inf)) != EOF) {
- char pref_str[STRING_MAX];
- if (c != '"') continue; // scan up to quote
- // look for quote string quote
- if (!match_string(inf, path_ptr)) continue; // path not found
- if (getc(inf) != '"') continue; // path not found, keep scanning
- if (!match_string(inf, (char *)"value")) goto nopref; // value not found
- if (!match_string(inf, (char *)"=")) goto nopref; // = not found
- if (!match_string(inf, (char *)"\"")) goto nopref; // quote not found
- // now read the value up to the close quote
- for (i = 0; i < STRING_MAX; i++) {
- if ((c = getc(inf)) == '"') break;
- pref_str[i] = c;
- }
- if (i == STRING_MAX) continue; // value too long, ignore
- pref_str[i] = 0;
- i = pm_find_default_device(pref_str, input);
- if (i != pmNoDevice) {
- id = i;
+ static char *pref_2 = (char *)"/.java/.userPrefs/";
+ static char *pref_3 = (char *)"prefs.xml";
+ char *pref_1 = getenv("HOME");
+ char *full_name, *path_ptr;
+ FILE *inf;
+ int c, i;
+ if (!pref_1) goto nopref; // cannot find preference file
+ // full_name will be larger than necessary
+ full_name = malloc(strlen(pref_1) + strlen(pref_2) + strlen(pref_3) +
+ strlen(path) + 2);
+ strcpy(full_name, pref_1);
+ strcat(full_name, pref_2);
+ // copy all but last path segment to full_name
+ if (*path == '/') path++; // skip initial slash in path
+ path_ptr = strrchr(path, '/');
+ if (path_ptr) { // copy up to slash after full_name
+ path_ptr++;
+ int offset = strlen(full_name);
+ memcpy(full_name + offset, path, path_ptr - path);
+ full_name[offset + path_ptr - path] = 0; // end of string
+ } else {
+ path_ptr = path;
+ }
+ strcat(full_name, pref_3);
+ inf = fopen(full_name, "r");
+ if (!inf) goto nopref; // cannot open preference file
+ // We're not going to build or link in a full XML parser.
+ // Instead, find the path string and quoute. Then, look for
+ // "value", "=", quote. Then get string up to quote.
+ while ((c = getc(inf)) != EOF) {
+ char pref_str[STRING_MAX];
+ if (c != '"') continue; // scan up to quote
+ // look for quote string quote
+ if (!match_string(inf, path_ptr)) continue; // path not found
+ if (getc(inf) != '"') continue; // path not found, keep scanning
+ if (!match_string(inf, (char *)"value")) goto nopref; // value not found
+ if (!match_string(inf, (char *)"=")) goto nopref; // = not found
+ if (!match_string(inf, (char *)"\"")) goto nopref; // quote not found
+ // now read the value up to the close quote
+ for (i = 0; i < STRING_MAX; i++) {
+ if ((c = getc(inf)) == '"') break;
+ pref_str[i] = c;
+ }
+ if (i == STRING_MAX) continue; // value too long, ignore
+ pref_str[i] = 0;
+ i = pm_find_default_device(pref_str, input);
+ if (i != pmNoDevice) {
+ id = i;
+ }
+ break;
}
- break;
- }
- nopref:
- return id;
+ nopref:
+ return id;
}
diff --git a/src/lib/portmidi/osxsupport.h b/src/lib/portmidi/osxsupport.h
index 7cbe1f5a4e8..7771868d12a 100644
--- a/src/lib/portmidi/osxsupport.h
+++ b/src/lib/portmidi/osxsupport.h
@@ -16,4 +16,3 @@ char *FindPrefsDir(void);
#endif
#endif
-
diff --git a/src/lib/portmidi/pminternal.h b/src/lib/portmidi/pminternal.h
index 6b6242026dd..343f6a57db9 100644
--- a/src/lib/portmidi/pminternal.h
+++ b/src/lib/portmidi/pminternal.h
@@ -30,51 +30,51 @@ void pm_free(void *ptr);
/* if an error occurs while opening or closing a midi stream, set these: */
extern int pm_hosterror;
extern char pm_hosterror_text[PM_HOST_ERROR_MSG_LEN];
-
+
struct pm_internal_struct;
/* these do not use PmInternal because it is not defined yet... */
-typedef PmError (*pm_write_short_fn)(struct pm_internal_struct *midi,
- PmEvent *buffer);
+typedef PmError (*pm_write_short_fn)(struct pm_internal_struct *midi,
+ PmEvent *buffer);
typedef PmError (*pm_begin_sysex_fn)(struct pm_internal_struct *midi,
- PmTimestamp timestamp);
+ PmTimestamp timestamp);
typedef PmError (*pm_end_sysex_fn)(struct pm_internal_struct *midi,
- PmTimestamp timestamp);
+ PmTimestamp timestamp);
typedef PmError (*pm_write_byte_fn)(struct pm_internal_struct *midi,
- unsigned char byte, PmTimestamp timestamp);
+ unsigned char byte, PmTimestamp timestamp);
typedef PmError (*pm_write_realtime_fn)(struct pm_internal_struct *midi,
- PmEvent *buffer);
+ PmEvent *buffer);
typedef PmError (*pm_write_flush_fn)(struct pm_internal_struct *midi,
- PmTimestamp timestamp);
+ PmTimestamp timestamp);
typedef PmTimestamp (*pm_synchronize_fn)(struct pm_internal_struct *midi);
/* pm_open_fn should clean up all memory and close the device if any part
of the open fails */
typedef PmError (*pm_open_fn)(struct pm_internal_struct *midi,
- void *driverInfo);
+ void *driverInfo);
typedef PmError (*pm_abort_fn)(struct pm_internal_struct *midi);
/* pm_close_fn should clean up all memory and close the device if any
part of the close fails. */
typedef PmError (*pm_close_fn)(struct pm_internal_struct *midi);
typedef PmError (*pm_poll_fn)(struct pm_internal_struct *midi);
typedef void (*pm_host_error_fn)(struct pm_internal_struct *midi, char * msg,
- unsigned int len);
+ unsigned int len);
typedef unsigned int (*pm_has_host_error_fn)(struct pm_internal_struct *midi);
typedef struct {
- pm_write_short_fn write_short; /* output short MIDI msg */
- pm_begin_sysex_fn begin_sysex; /* prepare to send a sysex message */
- pm_end_sysex_fn end_sysex; /* marks end of sysex message */
- pm_write_byte_fn write_byte; /* accumulate one more sysex byte */
- pm_write_realtime_fn write_realtime; /* send real-time message within sysex */
- pm_write_flush_fn write_flush; /* send any accumulated but unsent data */
- pm_synchronize_fn synchronize; /* synchronize portmidi time to stream time */
- pm_open_fn open; /* open MIDI device */
- pm_abort_fn abort; /* abort */
- pm_close_fn close; /* close device */
- pm_poll_fn poll; /* read pending midi events into portmidi buffer */
- pm_has_host_error_fn has_host_error; /* true when device has had host
+ pm_write_short_fn write_short; /* output short MIDI msg */
+ pm_begin_sysex_fn begin_sysex; /* prepare to send a sysex message */
+ pm_end_sysex_fn end_sysex; /* marks end of sysex message */
+ pm_write_byte_fn write_byte; /* accumulate one more sysex byte */
+ pm_write_realtime_fn write_realtime; /* send real-time message within sysex */
+ pm_write_flush_fn write_flush; /* send any accumulated but unsent data */
+ pm_synchronize_fn synchronize; /* synchronize portmidi time to stream time */
+ pm_open_fn open; /* open MIDI device */
+ pm_abort_fn abort; /* abort */
+ pm_close_fn close; /* close device */
+ pm_poll_fn poll; /* read pending midi events into portmidi buffer */
+ pm_has_host_error_fn has_host_error; /* true when device has had host
error message */
- pm_host_error_fn host_error; /* provide text readable host error message
+ pm_host_error_fn host_error; /* provide text readable host error message
for device (clears and resets) */
} pm_fns_node, *pm_fns_type;
@@ -83,12 +83,12 @@ typedef struct {
extern pm_fns_node pm_none_dictionary;
typedef struct {
- PmDeviceInfo pub; /* some portmidi state also saved in here (for autmatic
+ PmDeviceInfo pub; /* some portmidi state also saved in here (for autmatic
device closing (see PmDeviceInfo struct) */
- void *descriptor; /* ID number passed to win32 multimedia API open */
- void *internalDescriptor; /* points to PmInternal device, allows automatic
+ void *descriptor; /* ID number passed to win32 multimedia API open */
+ void *internalDescriptor; /* points to PmInternal device, allows automatic
device closing */
- pm_fns_type dictionary;
+ pm_fns_type dictionary;
} descriptor_node, *descriptor_type;
extern int pm_descriptor_max;
@@ -98,67 +98,67 @@ extern int pm_descriptor_index;
typedef uint32_t (*time_get_proc_type)(void *time_info);
typedef struct pm_internal_struct {
- int device_id; /* which device is open (index to descriptors) */
- short write_flag; /* MIDI_IN, or MIDI_OUT */
-
- PmTimeProcPtr time_proc; /* where to get the time */
- void *time_info; /* pass this to get_time() */
- int32_t buffer_len; /* how big is the buffer or queue? */
- PmQueue *queue;
-
- int32_t latency; /* time delay in ms between timestamps and actual output */
- /* set to zero to get immediate, simple blocking output */
- /* if latency is zero, timestamps will be ignored; */
- /* if midi input device, this field ignored */
-
- int sysex_in_progress; /* when sysex status is seen, this flag becomes
+ int device_id; /* which device is open (index to descriptors) */
+ short write_flag; /* MIDI_IN, or MIDI_OUT */
+
+ PmTimeProcPtr time_proc; /* where to get the time */
+ void *time_info; /* pass this to get_time() */
+ int32_t buffer_len; /* how big is the buffer or queue? */
+ PmQueue *queue;
+
+ int32_t latency; /* time delay in ms between timestamps and actual output */
+ /* set to zero to get immediate, simple blocking output */
+ /* if latency is zero, timestamps will be ignored; */
+ /* if midi input device, this field ignored */
+
+ int sysex_in_progress; /* when sysex status is seen, this flag becomes
* true until EOX is seen. When true, new data is appended to the
- * stream of outgoing bytes. When overflow occurs, sysex data is
+ * stream of outgoing bytes. When overflow occurs, sysex data is
* dropped (until an EOX or non-real-timei status byte is seen) so
- * that, if the overflow condition is cleared, we don't start
+ * that, if the overflow condition is cleared, we don't start
* sending data from the middle of a sysex message. If a sysex
* message is filtered, sysex_in_progress is false, causing the
* message to be dropped. */
- PmMessage sysex_message; /* buffer for 4 bytes of sysex data */
- int sysex_message_count; /* how many bytes in sysex_message so far */
-
- int32_t filters; /* flags that filter incoming message classes */
- int32_t channel_mask; /* filter incoming messages based on channel */
- PmTimestamp last_msg_time; /* timestamp of last message */
- PmTimestamp sync_time; /* time of last synchronization */
- PmTimestamp now; /* set by PmWrite to current time */
- int first_message; /* initially true, used to run first synchronization */
- pm_fns_type dictionary; /* implementation functions */
- void *descriptor; /* system-dependent state */
- /* the following are used to expedite sysex data */
- /* on windows, in debug mode, based on some profiling, these optimizations
- * cut the time to process sysex bytes from about 7.5 to 0.26 usec/byte,
- * but this does not count time in the driver, so I don't know if it is
- * important
- */
- unsigned char *fill_base; /* addr of ptr to sysex data */
- uint32_t *fill_offset_ptr; /* offset of next sysex byte */
- int32_t fill_length; /* how many sysex bytes to write */
+ PmMessage sysex_message; /* buffer for 4 bytes of sysex data */
+ int sysex_message_count; /* how many bytes in sysex_message so far */
+
+ int32_t filters; /* flags that filter incoming message classes */
+ int32_t channel_mask; /* filter incoming messages based on channel */
+ PmTimestamp last_msg_time; /* timestamp of last message */
+ PmTimestamp sync_time; /* time of last synchronization */
+ PmTimestamp now; /* set by PmWrite to current time */
+ int first_message; /* initially true, used to run first synchronization */
+ pm_fns_type dictionary; /* implementation functions */
+ void *descriptor; /* system-dependent state */
+ /* the following are used to expedite sysex data */
+ /* on windows, in debug mode, based on some profiling, these optimizations
+ * cut the time to process sysex bytes from about 7.5 to 0.26 usec/byte,
+ * but this does not count time in the driver, so I don't know if it is
+ * important
+ */
+ unsigned char *fill_base; /* addr of ptr to sysex data */
+ uint32_t *fill_offset_ptr; /* offset of next sysex byte */
+ int32_t fill_length; /* how many sysex bytes to write */
} PmInternal;
/* defined by system specific implementation, e.g. pmwinmm, used by PortMidi */
-void pm_init(void);
-void pm_term(void);
+void pm_init(void);
+void pm_term(void);
/* defined by portMidi, used by pmwinmm */
PmError none_write_short(PmInternal *midi, PmEvent *buffer);
-PmError none_write_byte(PmInternal *midi, unsigned char byte,
- PmTimestamp timestamp);
+PmError none_write_byte(PmInternal *midi, unsigned char byte,
+ PmTimestamp timestamp);
PmTimestamp none_synchronize(PmInternal *midi);
PmError pm_fail_fn(PmInternal *midi);
PmError pm_fail_timestamp_fn(PmInternal *midi, PmTimestamp timestamp);
PmError pm_success_fn(PmInternal *midi);
PmError pm_add_device(char *interf, char *name, int input, void *descriptor,
- pm_fns_type dictionary);
+ pm_fns_type dictionary);
uint32_t pm_read_bytes(PmInternal *midi, const unsigned char *data, int len,
- PmTimestamp timestamp);
+ PmTimestamp timestamp);
void pm_read_short(PmInternal *midi, PmEvent *event);
#define none_write_flush pm_fail_timestamp_fn
@@ -168,11 +168,10 @@ void pm_read_short(PmInternal *midi, PmEvent *event);
#define MIDI_REALTIME_MASK 0xf8
#define is_real_time(msg) \
- ((Pm_MessageStatus(msg) & MIDI_REALTIME_MASK) == MIDI_REALTIME_MASK)
+ ((Pm_MessageStatus(msg) & MIDI_REALTIME_MASK) == MIDI_REALTIME_MASK)
int pm_find_default_device(char *pattern, int is_input);
#ifdef __cplusplus
}
#endif
-
diff --git a/src/lib/portmidi/pmlinux.c b/src/lib/portmidi/pmlinux.c
index 4e2196294bb..2443917db04 100644
--- a/src/lib/portmidi/pmlinux.c
+++ b/src/lib/portmidi/pmlinux.c
@@ -16,11 +16,11 @@
#include "pminternal.h"
#ifdef PMALSA
- #include "pmlinuxalsa.h"
+ #include "pmlinuxalsa.h"
#endif
#ifdef PMNULL
- #include "pmlinuxnull.h"
+ #include "pmlinuxnull.h"
#endif
PmDeviceID pm_default_input_device_id = -1;
@@ -30,46 +30,45 @@ extern PmDeviceID find_default_device(char *path, int input, PmDeviceID id);
void pm_init()
{
- /* Note: it is not an error for PMALSA to fail to initialize.
- * It may be a design error that the client cannot query what subsystems
- * are working properly other than by looking at the list of available
- * devices.
- */
- #ifdef PMALSA
+ /* Note: it is not an error for PMALSA to fail to initialize.
+ * It may be a design error that the client cannot query what subsystems
+ * are working properly other than by looking at the list of available
+ * devices.
+ */
+ #ifdef PMALSA
pm_linuxalsa_init();
- #endif
- #ifdef PMNULL
- pm_linuxnull_init();
- #endif
- // this is set when we return to Pm_Initialize, but we need it
- // now in order to (successfully) call Pm_CountDevices()
- pm_initialized = TRUE;
- pm_default_input_device_id = find_default_device(
- (char *)"/PortMidi/PM_RECOMMENDED_INPUT_DEVICE", TRUE,
- pm_default_input_device_id);
- pm_default_output_device_id = find_default_device(
+ #endif
+ #ifdef PMNULL
+ pm_linuxnull_init();
+ #endif
+ // this is set when we return to Pm_Initialize, but we need it
+ // now in order to (successfully) call Pm_CountDevices()
+ pm_initialized = TRUE;
+ pm_default_input_device_id = find_default_device(
+ (char *)"/PortMidi/PM_RECOMMENDED_INPUT_DEVICE", TRUE,
+ pm_default_input_device_id);
+ pm_default_output_device_id = find_default_device(
(char *)"/PortMidi/PM_RECOMMENDED_OUTPUT_DEVICE", FALSE,
- pm_default_output_device_id);
+ pm_default_output_device_id);
}
void pm_term(void)
{
- #ifdef PMALSA
- pm_linuxalsa_term();
- #endif
+ #ifdef PMALSA
+ pm_linuxalsa_term();
+ #endif
}
-PmDeviceID Pm_GetDefaultInputDeviceID() {
- Pm_Initialize();
- return pm_default_input_device_id;
+PmDeviceID Pm_GetDefaultInputDeviceID() {
+ Pm_Initialize();
+ return pm_default_input_device_id;
}
-PmDeviceID Pm_GetDefaultOutputDeviceID() {
- Pm_Initialize();
- return pm_default_output_device_id;
+PmDeviceID Pm_GetDefaultOutputDeviceID() {
+ Pm_Initialize();
+ return pm_default_output_device_id;
}
void *pm_alloc(size_t s) { return malloc(s); }
void pm_free(void *ptr) { free(ptr); }
-
diff --git a/src/lib/portmidi/pmlinux.h b/src/lib/portmidi/pmlinux.h
index 4042cce8245..cc6c5ee5389 100644
--- a/src/lib/portmidi/pmlinux.h
+++ b/src/lib/portmidi/pmlinux.h
@@ -2,4 +2,3 @@
extern PmDeviceID pm_default_input_device_id;
extern PmDeviceID pm_default_output_device_id;
-
diff --git a/src/lib/portmidi/pmlinuxalsa.c b/src/lib/portmidi/pmlinuxalsa.c
index 1e69ea00e60..8d565deaac9 100644
--- a/src/lib/portmidi/pmlinuxalsa.c
+++ b/src/lib/portmidi/pmlinuxalsa.c
@@ -1,11 +1,11 @@
/*
* pmlinuxalsa.c -- system specific definitions
- *
+ *
* written by:
* Roger Dannenberg (port to Alsa 0.9.x)
* Clemens Ladisch (provided code examples and invaluable consulting)
* Jason Cohen, Rico Colon, Matt Filippone (Alsa 0.5.x implementation)
- */
+ */
#include "stdlib.h"
#include "portmidi.h"
@@ -49,17 +49,17 @@ typedef UINT32 FPTR;
extern pm_fns_node pm_linuxalsa_in_dictionary;
extern pm_fns_node pm_linuxalsa_out_dictionary;
-static snd_seq_t *seq = NULL; // all input comes here,
- // output queue allocated on seq
+static snd_seq_t *seq = NULL; // all input comes here,
+ // output queue allocated on seq
static int queue, queue_used; /* one for all ports, reference counted */
typedef struct alsa_descriptor_struct {
- int client;
- int port;
- int this_port;
- int in_sysex;
- snd_midi_event_t *parser;
- int error; /* host error code */
+ int client;
+ int port;
+ int this_port;
+ int in_sysex;
+ snd_midi_event_t *parser;
+ int error; /* host error code */
} alsa_descriptor_node, *alsa_descriptor_type;
@@ -67,324 +67,324 @@ typedef struct alsa_descriptor_struct {
/**/
static void get_alsa_error_text(char *msg, int len, int err)
{
- int errlen = strlen(snd_strerror(err));
- if (errlen < len) {
- strcpy(msg, snd_strerror(err));
- } else if (len > 20) {
- sprintf(msg, "Alsa error %d", err);
- } else if (len > 4) {
- strcpy(msg, "Alsa");
- } else {
- msg[0] = 0;
- }
+ int errlen = strlen(snd_strerror(err));
+ if (errlen < len) {
+ strcpy(msg, snd_strerror(err));
+ } else if (len > 20) {
+ sprintf(msg, "Alsa error %d", err);
+ } else if (len > 4) {
+ strcpy(msg, "Alsa");
+ } else {
+ msg[0] = 0;
+ }
}
/* queue is shared by both input and output, reference counted */
static PmError alsa_use_queue(void)
{
- if (queue_used == 0) {
- snd_seq_queue_tempo_t *tempo;
-
- queue = snd_seq_alloc_queue(seq);
- if (queue < 0) {
- pm_hosterror = queue;
- return pmHostError;
- }
- snd_seq_queue_tempo_alloca(&tempo);
- snd_seq_queue_tempo_set_tempo(tempo, 480000);
- snd_seq_queue_tempo_set_ppq(tempo, 480);
- pm_hosterror = snd_seq_set_queue_tempo(seq, queue, tempo);
- if (pm_hosterror < 0)
- return pmHostError;
-
- snd_seq_start_queue(seq, queue, NULL);
- snd_seq_drain_output(seq);
- }
- ++queue_used;
- return pmNoError;
+ if (queue_used == 0) {
+ snd_seq_queue_tempo_t *tempo;
+
+ queue = snd_seq_alloc_queue(seq);
+ if (queue < 0) {
+ pm_hosterror = queue;
+ return pmHostError;
+ }
+ snd_seq_queue_tempo_alloca(&tempo);
+ snd_seq_queue_tempo_set_tempo(tempo, 480000);
+ snd_seq_queue_tempo_set_ppq(tempo, 480);
+ pm_hosterror = snd_seq_set_queue_tempo(seq, queue, tempo);
+ if (pm_hosterror < 0)
+ return pmHostError;
+
+ snd_seq_start_queue(seq, queue, NULL);
+ snd_seq_drain_output(seq);
+ }
+ ++queue_used;
+ return pmNoError;
}
static void alsa_unuse_queue(void)
{
- if (--queue_used == 0) {
- snd_seq_stop_queue(seq, queue, NULL);
- snd_seq_drain_output(seq);
- snd_seq_free_queue(seq, queue);
- VERBOSE printf("queue freed\n");
- }
+ if (--queue_used == 0) {
+ snd_seq_stop_queue(seq, queue, NULL);
+ snd_seq_drain_output(seq);
+ snd_seq_free_queue(seq, queue);
+ VERBOSE printf("queue freed\n");
+ }
}
/* midi_message_length -- how many bytes in a message? */
static int midi_message_length(PmMessage message)
{
- message &= 0xff;
- if (message < 0x80) {
- return 0;
- } else if (message < 0xf0) {
- static const int length[] = {3, 3, 3, 3, 2, 2, 3};
- return length[(message - 0x80) >> 4];
- } else {
- static const int length[] = {
- -1, 2, 3, 2, 0, 0, 1, -1, 1, 0, 1, 1, 1, 0, 1, 1};
- return length[message - 0xf0];
- }
+ message &= 0xff;
+ if (message < 0x80) {
+ return 0;
+ } else if (message < 0xf0) {
+ static const int length[] = {3, 3, 3, 3, 2, 2, 3};
+ return length[(message - 0x80) >> 4];
+ } else {
+ static const int length[] = {
+ -1, 2, 3, 2, 0, 0, 1, -1, 1, 0, 1, 1, 1, 0, 1, 1};
+ return length[message - 0xf0];
+ }
}
-static PmError alsa_out_open(PmInternal *midi, void *driverInfo)
+static PmError alsa_out_open(PmInternal *midi, void *driverInfo)
{
- void *client_port = descriptors[midi->device_id].descriptor;
- alsa_descriptor_type desc = (alsa_descriptor_type)
- pm_alloc(sizeof(alsa_descriptor_node));
- snd_seq_port_info_t *info;
- int err;
-
- if (!desc) return pmInsufficientMemory;
-
- snd_seq_port_info_alloca(&info);
- snd_seq_port_info_set_port(info, midi->device_id);
- snd_seq_port_info_set_capability(info, SND_SEQ_PORT_CAP_WRITE |
- SND_SEQ_PORT_CAP_READ);
- snd_seq_port_info_set_type(info, SND_SEQ_PORT_TYPE_MIDI_GENERIC |
- SND_SEQ_PORT_TYPE_APPLICATION);
- snd_seq_port_info_set_port_specified(info, 1);
- err = snd_seq_create_port(seq, info);
- if (err < 0) goto free_desc;
-
- /* fill in fields of desc, which is passed to pm_write routines */
- midi->descriptor = desc;
- desc->client = GET_DESCRIPTOR_CLIENT(client_port);
- desc->port = GET_DESCRIPTOR_PORT(client_port);
- desc->this_port = midi->device_id;
- desc->in_sysex = 0;
-
- desc->error = 0;
-
- err = snd_midi_event_new(PM_DEFAULT_SYSEX_BUFFER_SIZE, &desc->parser);
- if (err < 0) goto free_this_port;
-
- if (midi->latency > 0) { /* must delay output using a queue */
- err = alsa_use_queue();
- if (err < 0) goto free_parser;
-
- err = snd_seq_connect_to(seq, desc->this_port, desc->client, desc->port);
- if (err < 0) goto unuse_queue; /* clean up and return on error */
- } else {
- err = snd_seq_connect_to(seq, desc->this_port, desc->client, desc->port);
- if (err < 0) goto free_parser; /* clean up and return on error */
- }
- return pmNoError;
-
- unuse_queue:
- alsa_unuse_queue();
- free_parser:
- snd_midi_event_free(desc->parser);
- free_this_port:
- snd_seq_delete_port(seq, desc->this_port);
- free_desc:
- pm_free(desc);
- pm_hosterror = err;
- if (err < 0) {
- get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN, err);
- }
- return pmHostError;
+ void *client_port = descriptors[midi->device_id].descriptor;
+ alsa_descriptor_type desc = (alsa_descriptor_type)
+ pm_alloc(sizeof(alsa_descriptor_node));
+ snd_seq_port_info_t *info;
+ int err;
+
+ if (!desc) return pmInsufficientMemory;
+
+ snd_seq_port_info_alloca(&info);
+ snd_seq_port_info_set_port(info, midi->device_id);
+ snd_seq_port_info_set_capability(info, SND_SEQ_PORT_CAP_WRITE |
+ SND_SEQ_PORT_CAP_READ);
+ snd_seq_port_info_set_type(info, SND_SEQ_PORT_TYPE_MIDI_GENERIC |
+ SND_SEQ_PORT_TYPE_APPLICATION);
+ snd_seq_port_info_set_port_specified(info, 1);
+ err = snd_seq_create_port(seq, info);
+ if (err < 0) goto free_desc;
+
+ /* fill in fields of desc, which is passed to pm_write routines */
+ midi->descriptor = desc;
+ desc->client = GET_DESCRIPTOR_CLIENT(client_port);
+ desc->port = GET_DESCRIPTOR_PORT(client_port);
+ desc->this_port = midi->device_id;
+ desc->in_sysex = 0;
+
+ desc->error = 0;
+
+ err = snd_midi_event_new(PM_DEFAULT_SYSEX_BUFFER_SIZE, &desc->parser);
+ if (err < 0) goto free_this_port;
+
+ if (midi->latency > 0) { /* must delay output using a queue */
+ err = alsa_use_queue();
+ if (err < 0) goto free_parser;
+
+ err = snd_seq_connect_to(seq, desc->this_port, desc->client, desc->port);
+ if (err < 0) goto unuse_queue; /* clean up and return on error */
+ } else {
+ err = snd_seq_connect_to(seq, desc->this_port, desc->client, desc->port);
+ if (err < 0) goto free_parser; /* clean up and return on error */
+ }
+ return pmNoError;
+
+ unuse_queue:
+ alsa_unuse_queue();
+ free_parser:
+ snd_midi_event_free(desc->parser);
+ free_this_port:
+ snd_seq_delete_port(seq, desc->this_port);
+ free_desc:
+ pm_free(desc);
+ pm_hosterror = err;
+ if (err < 0) {
+ get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN, err);
+ }
+ return pmHostError;
}
-
-static PmError alsa_write_byte(PmInternal *midi, unsigned char byte,
- PmTimestamp timestamp)
+
+static PmError alsa_write_byte(PmInternal *midi, unsigned char byte,
+ PmTimestamp timestamp)
{
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- snd_seq_event_t ev;
- int err;
-
- snd_seq_ev_clear(&ev);
- if (snd_midi_event_encode_byte(desc->parser, byte, &ev) == 1) {
- snd_seq_ev_set_dest(&ev, desc->client, desc->port);
- snd_seq_ev_set_source(&ev, desc->this_port);
- if (midi->latency > 0) {
- /* compute relative time of event = timestamp - now + latency */
- PmTimestamp now = (midi->time_proc ?
- midi->time_proc(midi->time_info) :
- Pt_Time());
- int when = timestamp;
- /* if timestamp is zero, send immediately */
- /* otherwise compute time delay and use delay if positive */
- if (when == 0) when = now;
- when = (when - now) + midi->latency;
- if (when < 0) when = 0;
- VERBOSE printf("timestamp %d now %d latency %d, ",
- (int) timestamp, (int) now, midi->latency);
- VERBOSE printf("scheduling event after %d\n", when);
- /* message is sent in relative ticks, where 1 tick = 1 ms */
- snd_seq_ev_schedule_tick(&ev, queue, 1, when);
- /* NOTE: for cases where the user does not supply a time function,
- we could optimize the code by not starting Pt_Time and using
- the alsa tick time instead. I didn't do this because it would
- entail changing the queue management to start the queue tick
- count when PortMidi is initialized and keep it running until
- PortMidi is terminated. (This should be simple, but it's not
- how the code works now.) -RBD */
- } else { /* send event out without queueing */
- VERBOSE printf("direct\n");
- /* ev.queue = SND_SEQ_QUEUE_DIRECT;
- ev.dest.client = SND_SEQ_ADDRESS_SUBSCRIBERS; */
- snd_seq_ev_set_direct(&ev);
- }
- VERBOSE printf("sending event\n");
- err = snd_seq_event_output(seq, &ev);
- if (err < 0) {
- desc->error = err;
- return pmHostError;
- }
- }
- return pmNoError;
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ snd_seq_event_t ev;
+ int err;
+
+ snd_seq_ev_clear(&ev);
+ if (snd_midi_event_encode_byte(desc->parser, byte, &ev) == 1) {
+ snd_seq_ev_set_dest(&ev, desc->client, desc->port);
+ snd_seq_ev_set_source(&ev, desc->this_port);
+ if (midi->latency > 0) {
+ /* compute relative time of event = timestamp - now + latency */
+ PmTimestamp now = (midi->time_proc ?
+ midi->time_proc(midi->time_info) :
+ Pt_Time());
+ int when = timestamp;
+ /* if timestamp is zero, send immediately */
+ /* otherwise compute time delay and use delay if positive */
+ if (when == 0) when = now;
+ when = (when - now) + midi->latency;
+ if (when < 0) when = 0;
+ VERBOSE printf("timestamp %d now %d latency %d, ",
+ (int) timestamp, (int) now, midi->latency);
+ VERBOSE printf("scheduling event after %d\n", when);
+ /* message is sent in relative ticks, where 1 tick = 1 ms */
+ snd_seq_ev_schedule_tick(&ev, queue, 1, when);
+ /* NOTE: for cases where the user does not supply a time function,
+ we could optimize the code by not starting Pt_Time and using
+ the alsa tick time instead. I didn't do this because it would
+ entail changing the queue management to start the queue tick
+ count when PortMidi is initialized and keep it running until
+ PortMidi is terminated. (This should be simple, but it's not
+ how the code works now.) -RBD */
+ } else { /* send event out without queueing */
+ VERBOSE printf("direct\n");
+ /* ev.queue = SND_SEQ_QUEUE_DIRECT;
+ ev.dest.client = SND_SEQ_ADDRESS_SUBSCRIBERS; */
+ snd_seq_ev_set_direct(&ev);
+ }
+ VERBOSE printf("sending event\n");
+ err = snd_seq_event_output(seq, &ev);
+ if (err < 0) {
+ desc->error = err;
+ return pmHostError;
+ }
+ }
+ return pmNoError;
}
static PmError alsa_out_close(PmInternal *midi)
{
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- if (!desc) return pmBadPtr;
-
- if ((pm_hosterror = snd_seq_disconnect_to(seq, desc->this_port,
- desc->client, desc->port))) {
- // if there's an error, try to delete the port anyway, but don't
- // change the pm_hosterror value so we retain the first error
- snd_seq_delete_port(seq, desc->this_port);
- } else { // if there's no error, delete the port and retain any error
- pm_hosterror = snd_seq_delete_port(seq, desc->this_port);
- }
- if (midi->latency > 0) alsa_unuse_queue();
- snd_midi_event_free(desc->parser);
- midi->descriptor = NULL; /* destroy the pointer to signify "closed" */
- pm_free(desc);
- if (pm_hosterror) {
- get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN,
- pm_hosterror);
- return pmHostError;
- }
- return pmNoError;
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ if (!desc) return pmBadPtr;
+
+ if ((pm_hosterror = snd_seq_disconnect_to(seq, desc->this_port,
+ desc->client, desc->port))) {
+ // if there's an error, try to delete the port anyway, but don't
+ // change the pm_hosterror value so we retain the first error
+ snd_seq_delete_port(seq, desc->this_port);
+ } else { // if there's no error, delete the port and retain any error
+ pm_hosterror = snd_seq_delete_port(seq, desc->this_port);
+ }
+ if (midi->latency > 0) alsa_unuse_queue();
+ snd_midi_event_free(desc->parser);
+ midi->descriptor = NULL; /* destroy the pointer to signify "closed" */
+ pm_free(desc);
+ if (pm_hosterror) {
+ get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN,
+ pm_hosterror);
+ return pmHostError;
+ }
+ return pmNoError;
}
static PmError alsa_in_open(PmInternal *midi, void *driverInfo)
{
- void *client_port = descriptors[midi->device_id].descriptor;
- alsa_descriptor_type desc = (alsa_descriptor_type)
- pm_alloc(sizeof(alsa_descriptor_node));
- snd_seq_port_info_t *info;
- snd_seq_port_subscribe_t *sub;
- snd_seq_addr_t addr;
- int err;
-
- if (!desc) return pmInsufficientMemory;
-
- err = alsa_use_queue();
- if (err < 0) goto free_desc;
-
- snd_seq_port_info_alloca(&info);
- snd_seq_port_info_set_port(info, midi->device_id);
- snd_seq_port_info_set_capability(info, SND_SEQ_PORT_CAP_WRITE |
- SND_SEQ_PORT_CAP_READ);
- snd_seq_port_info_set_type(info, SND_SEQ_PORT_TYPE_MIDI_GENERIC |
- SND_SEQ_PORT_TYPE_APPLICATION);
- snd_seq_port_info_set_port_specified(info, 1);
- err = snd_seq_create_port(seq, info);
- if (err < 0) goto free_queue;
-
- /* fill in fields of desc, which is passed to pm_write routines */
- midi->descriptor = desc;
- desc->client = GET_DESCRIPTOR_CLIENT(client_port);
- desc->port = GET_DESCRIPTOR_PORT(client_port);
- desc->this_port = midi->device_id;
- desc->in_sysex = 0;
-
- desc->error = 0;
-
- VERBOSE printf("snd_seq_connect_from: %d %d %d\n",
- desc->this_port, desc->client, desc->port);
- snd_seq_port_subscribe_alloca(&sub);
- addr.client = snd_seq_client_id(seq);
- addr.port = desc->this_port;
- snd_seq_port_subscribe_set_dest(sub, &addr);
- addr.client = desc->client;
- addr.port = desc->port;
- snd_seq_port_subscribe_set_sender(sub, &addr);
- snd_seq_port_subscribe_set_time_update(sub, 1);
- /* this doesn't seem to work: messages come in with real timestamps */
- snd_seq_port_subscribe_set_time_real(sub, 0);
- err = snd_seq_subscribe_port(seq, sub);
- /* err =
- snd_seq_connect_from(seq, desc->this_port, desc->client, desc->port); */
- if (err < 0) goto free_this_port; /* clean up and return on error */
- return pmNoError;
-
- free_this_port:
- snd_seq_delete_port(seq, desc->this_port);
- free_queue:
- alsa_unuse_queue();
- free_desc:
- pm_free(desc);
- pm_hosterror = err;
- if (err < 0) {
- get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN, err);
- }
- return pmHostError;
+ void *client_port = descriptors[midi->device_id].descriptor;
+ alsa_descriptor_type desc = (alsa_descriptor_type)
+ pm_alloc(sizeof(alsa_descriptor_node));
+ snd_seq_port_info_t *info;
+ snd_seq_port_subscribe_t *sub;
+ snd_seq_addr_t addr;
+ int err;
+
+ if (!desc) return pmInsufficientMemory;
+
+ err = alsa_use_queue();
+ if (err < 0) goto free_desc;
+
+ snd_seq_port_info_alloca(&info);
+ snd_seq_port_info_set_port(info, midi->device_id);
+ snd_seq_port_info_set_capability(info, SND_SEQ_PORT_CAP_WRITE |
+ SND_SEQ_PORT_CAP_READ);
+ snd_seq_port_info_set_type(info, SND_SEQ_PORT_TYPE_MIDI_GENERIC |
+ SND_SEQ_PORT_TYPE_APPLICATION);
+ snd_seq_port_info_set_port_specified(info, 1);
+ err = snd_seq_create_port(seq, info);
+ if (err < 0) goto free_queue;
+
+ /* fill in fields of desc, which is passed to pm_write routines */
+ midi->descriptor = desc;
+ desc->client = GET_DESCRIPTOR_CLIENT(client_port);
+ desc->port = GET_DESCRIPTOR_PORT(client_port);
+ desc->this_port = midi->device_id;
+ desc->in_sysex = 0;
+
+ desc->error = 0;
+
+ VERBOSE printf("snd_seq_connect_from: %d %d %d\n",
+ desc->this_port, desc->client, desc->port);
+ snd_seq_port_subscribe_alloca(&sub);
+ addr.client = snd_seq_client_id(seq);
+ addr.port = desc->this_port;
+ snd_seq_port_subscribe_set_dest(sub, &addr);
+ addr.client = desc->client;
+ addr.port = desc->port;
+ snd_seq_port_subscribe_set_sender(sub, &addr);
+ snd_seq_port_subscribe_set_time_update(sub, 1);
+ /* this doesn't seem to work: messages come in with real timestamps */
+ snd_seq_port_subscribe_set_time_real(sub, 0);
+ err = snd_seq_subscribe_port(seq, sub);
+ /* err =
+ snd_seq_connect_from(seq, desc->this_port, desc->client, desc->port); */
+ if (err < 0) goto free_this_port; /* clean up and return on error */
+ return pmNoError;
+
+ free_this_port:
+ snd_seq_delete_port(seq, desc->this_port);
+ free_queue:
+ alsa_unuse_queue();
+ free_desc:
+ pm_free(desc);
+ pm_hosterror = err;
+ if (err < 0) {
+ get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN, err);
+ }
+ return pmHostError;
}
static PmError alsa_in_close(PmInternal *midi)
{
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- if (!desc) return pmBadPtr;
- if ((pm_hosterror = snd_seq_disconnect_from(seq, desc->this_port,
- desc->client, desc->port))) {
- snd_seq_delete_port(seq, desc->this_port); /* try to close port */
- } else {
- pm_hosterror = snd_seq_delete_port(seq, desc->this_port);
- }
- alsa_unuse_queue();
- pm_free(desc);
- if (pm_hosterror) {
- get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN,
- pm_hosterror);
- return pmHostError;
- }
- return pmNoError;
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ if (!desc) return pmBadPtr;
+ if ((pm_hosterror = snd_seq_disconnect_from(seq, desc->this_port,
+ desc->client, desc->port))) {
+ snd_seq_delete_port(seq, desc->this_port); /* try to close port */
+ } else {
+ pm_hosterror = snd_seq_delete_port(seq, desc->this_port);
+ }
+ alsa_unuse_queue();
+ pm_free(desc);
+ if (pm_hosterror) {
+ get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN,
+ pm_hosterror);
+ return pmHostError;
+ }
+ return pmNoError;
}
-
+
static PmError alsa_abort(PmInternal *midi)
{
- /* NOTE: ALSA documentation is vague. This is supposed to
- * remove any pending output messages. If you can test and
- * confirm this code is correct, please update this comment. -RBD
- */
- /* Unfortunately, I can't even compile it -- my ALSA version
- * does not implement snd_seq_remove_events_t, so this does
- * not compile. I'll try again, but it looks like I'll need to
- * upgrade my entire Linux OS -RBD
- */
- /*
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- snd_seq_remove_events_t info;
- snd_seq_addr_t addr;
- addr.client = desc->client;
- addr.port = desc->port;
- snd_seq_remove_events_set_dest(&info, &addr);
- snd_seq_remove_events_set_condition(&info, SND_SEQ_REMOVE_DEST);
- pm_hosterror = snd_seq_remove_events(seq, &info);
- if (pm_hosterror) {
- get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN,
- pm_hosterror);
- return pmHostError;
- }
- */
- printf("WARNING: alsa_abort not implemented\n");
- return pmNoError;
+ /* NOTE: ALSA documentation is vague. This is supposed to
+ * remove any pending output messages. If you can test and
+ * confirm this code is correct, please update this comment. -RBD
+ */
+ /* Unfortunately, I can't even compile it -- my ALSA version
+ * does not implement snd_seq_remove_events_t, so this does
+ * not compile. I'll try again, but it looks like I'll need to
+ * upgrade my entire Linux OS -RBD
+ */
+ /*
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ snd_seq_remove_events_t info;
+ snd_seq_addr_t addr;
+ addr.client = desc->client;
+ addr.port = desc->port;
+ snd_seq_remove_events_set_dest(&info, &addr);
+ snd_seq_remove_events_set_condition(&info, SND_SEQ_REMOVE_DEST);
+ pm_hosterror = snd_seq_remove_events(seq, &info);
+ if (pm_hosterror) {
+ get_alsa_error_text(pm_hosterror_text, PM_HOST_ERROR_MSG_LEN,
+ pm_hosterror);
+ return pmHostError;
+ }
+ */
+ printf("WARNING: alsa_abort not implemented\n");
+ return pmNoError;
}
@@ -392,396 +392,396 @@ static PmError alsa_abort(PmInternal *midi)
This is old code here temporarily for reference
static PmError alsa_write(PmInternal *midi, PmEvent *buffer, int32_t length)
{
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- int i, bytes;
- unsigned char byte;
- PmMessage msg;
-
- desc->error = 0;
- for (; length > 0; length--, buffer++) {
- VERBOSE printf("message 0x%x\n", buffer->message);
- if (Pm_MessageStatus(buffer->message) == MIDI_SYSEX)
- desc->in_sysex = TRUE;
- if (desc->in_sysex) {
- msg = buffer->message;
- for (i = 0; i < 4; i++) {
- byte = msg; /* extract next byte to send */
- alsa_write_byte(midi, byte, buffer->timestamp);
- if (byte == MIDI_EOX) {
- desc->in_sysex = FALSE;
- break;
- }
- if (desc->error < 0) break;
- msg >>= 8; /* shift next byte into position */
- }
- } else {
- bytes = midi_message_length(buffer->message);
- msg = buffer->message;
- for (i = 0; i < bytes; i++) {
- byte = msg; /* extract next byte to send */
- VERBOSE printf("sending 0x%x\n", byte);
- alsa_write_byte(midi, byte, buffer->timestamp);
- if (desc->error < 0) break;
- msg >>= 8; /* shift next byte into position */
- }
- }
- }
- if (desc->error < 0) return pmHostError;
-
- VERBOSE printf("snd_seq_drain_output: 0x%x\n", (unsigned int) seq);
- desc->error = snd_seq_drain_output(seq);
- if (desc->error < 0) return pmHostError;
-
- desc->error = pmNoError;
- return pmNoError;
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ int i, bytes;
+ unsigned char byte;
+ PmMessage msg;
+
+ desc->error = 0;
+ for (; length > 0; length--, buffer++) {
+ VERBOSE printf("message 0x%x\n", buffer->message);
+ if (Pm_MessageStatus(buffer->message) == MIDI_SYSEX)
+ desc->in_sysex = TRUE;
+ if (desc->in_sysex) {
+ msg = buffer->message;
+ for (i = 0; i < 4; i++) {
+ byte = msg; /* extract next byte to send */
+ alsa_write_byte(midi, byte, buffer->timestamp);
+ if (byte == MIDI_EOX) {
+ desc->in_sysex = FALSE;
+ break;
+ }
+ if (desc->error < 0) break;
+ msg >>= 8; /* shift next byte into position */
+ }
+ } else {
+ bytes = midi_message_length(buffer->message);
+ msg = buffer->message;
+ for (i = 0; i < bytes; i++) {
+ byte = msg; /* extract next byte to send */
+ VERBOSE printf("sending 0x%x\n", byte);
+ alsa_write_byte(midi, byte, buffer->timestamp);
+ if (desc->error < 0) break;
+ msg >>= 8; /* shift next byte into position */
+ }
+ }
+ }
+ if (desc->error < 0) return pmHostError;
+
+ VERBOSE printf("snd_seq_drain_output: 0x%x\n", (unsigned int) seq);
+ desc->error = snd_seq_drain_output(seq);
+ if (desc->error < 0) return pmHostError;
+
+ desc->error = pmNoError;
+ return pmNoError;
}
#endif
static PmError alsa_write_flush(PmInternal *midi, PmTimestamp timestamp)
{
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- VERBOSE printf("snd_seq_drain_output: 0x%x\n", (unsigned int)(FPTR) seq);
- desc->error = snd_seq_drain_output(seq);
- if (desc->error < 0) return pmHostError;
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ VERBOSE printf("snd_seq_drain_output: 0x%x\n", (unsigned int)(FPTR) seq);
+ desc->error = snd_seq_drain_output(seq);
+ if (desc->error < 0) return pmHostError;
- desc->error = pmNoError;
- return pmNoError;
+ desc->error = pmNoError;
+ return pmNoError;
}
static PmError alsa_write_short(PmInternal *midi, PmEvent *event)
{
- int bytes = midi_message_length(event->message);
- PmMessage msg = event->message;
- int i;
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- for (i = 0; i < bytes; i++) {
- unsigned char byte = msg;
- VERBOSE printf("sending 0x%x\n", byte);
- alsa_write_byte(midi, byte, event->timestamp);
- if (desc->error < 0) break;
- msg >>= 8; /* shift next byte into position */
- }
- if (desc->error < 0) return pmHostError;
- desc->error = pmNoError;
- return pmNoError;
+ int bytes = midi_message_length(event->message);
+ PmMessage msg = event->message;
+ int i;
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ for (i = 0; i < bytes; i++) {
+ unsigned char byte = msg;
+ VERBOSE printf("sending 0x%x\n", byte);
+ alsa_write_byte(midi, byte, event->timestamp);
+ if (desc->error < 0) break;
+ msg >>= 8; /* shift next byte into position */
+ }
+ if (desc->error < 0) return pmHostError;
+ desc->error = pmNoError;
+ return pmNoError;
}
/* alsa_sysex -- implements begin_sysex and end_sysex */
PmError alsa_sysex(PmInternal *midi, PmTimestamp timestamp) {
- return pmNoError;
+ return pmNoError;
}
static PmTimestamp alsa_synchronize(PmInternal *midi)
{
- return 0; /* linux implementation does not use this synchronize function */
- /* Apparently, Alsa data is relative to the time you send it, and there
- is no reference. If this is true, this is a serious shortcoming of
- Alsa. If not true, then PortMidi has a serious shortcoming -- it
- should be scheduling relative to Alsa's time reference. */
+ return 0; /* linux implementation does not use this synchronize function */
+ /* Apparently, Alsa data is relative to the time you send it, and there
+ is no reference. If this is true, this is a serious shortcoming of
+ Alsa. If not true, then PortMidi has a serious shortcoming -- it
+ should be scheduling relative to Alsa's time reference. */
}
static void handle_event(snd_seq_event_t *ev)
{
- int device_id = ev->dest.port;
- PmInternal *midi = descriptors[device_id].internalDescriptor;
- PmEvent pm_ev;
- PmTimeProcPtr time_proc = midi->time_proc;
- PmTimestamp timestamp;
-
- /* time stamp should be in ticks, using our queue where 1 tick = 1ms */
- assert((ev->flags & SND_SEQ_TIME_STAMP_MASK) == SND_SEQ_TIME_STAMP_TICK);
-
- /* if no time_proc, just return "native" ticks (ms) */
- if (time_proc == NULL) {
- timestamp = ev->time.tick;
- } else { /* translate time to time_proc basis */
- snd_seq_queue_status_t *queue_status;
- snd_seq_queue_status_alloca(&queue_status);
- snd_seq_get_queue_status(seq, queue, queue_status);
- /* return (now - alsa_now) + alsa_timestamp */
- timestamp = (*time_proc)(midi->time_info) + ev->time.tick -
- snd_seq_queue_status_get_tick_time(queue_status);
- }
- pm_ev.timestamp = timestamp;
- switch (ev->type) {
- case SND_SEQ_EVENT_NOTEON:
- pm_ev.message = Pm_Message(0x90 | ev->data.note.channel,
- ev->data.note.note & 0x7f,
- ev->data.note.velocity & 0x7f);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_NOTEOFF:
- pm_ev.message = Pm_Message(0x80 | ev->data.note.channel,
- ev->data.note.note & 0x7f,
- ev->data.note.velocity & 0x7f);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_KEYPRESS:
- pm_ev.message = Pm_Message(0xa0 | ev->data.note.channel,
- ev->data.note.note & 0x7f,
- ev->data.note.velocity & 0x7f);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_CONTROLLER:
- pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
- ev->data.control.param & 0x7f,
- ev->data.control.value & 0x7f);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_PGMCHANGE:
- pm_ev.message = Pm_Message(0xc0 | ev->data.note.channel,
- ev->data.control.value & 0x7f, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_CHANPRESS:
- pm_ev.message = Pm_Message(0xd0 | ev->data.note.channel,
- ev->data.control.value & 0x7f, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_PITCHBEND:
- pm_ev.message = Pm_Message(0xe0 | ev->data.note.channel,
- (ev->data.control.value + 0x2000) & 0x7f,
- ((ev->data.control.value + 0x2000) >> 7) & 0x7f);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_CONTROL14:
- if (ev->data.control.param < 0x20) {
- pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
- ev->data.control.param,
- (ev->data.control.value >> 7) & 0x7f);
- pm_read_short(midi, &pm_ev);
- pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
- ev->data.control.param + 0x20,
- ev->data.control.value & 0x7f);
- pm_read_short(midi, &pm_ev);
- } else {
- pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
- ev->data.control.param & 0x7f,
- ev->data.control.value & 0x7f);
-
- pm_read_short(midi, &pm_ev);
- }
- break;
- case SND_SEQ_EVENT_SONGPOS:
- pm_ev.message = Pm_Message(0xf2,
- ev->data.control.value & 0x7f,
- (ev->data.control.value >> 7) & 0x7f);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_SONGSEL:
- pm_ev.message = Pm_Message(0xf3,
- ev->data.control.value & 0x7f, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_QFRAME:
- pm_ev.message = Pm_Message(0xf1,
- ev->data.control.value & 0x7f, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_START:
- pm_ev.message = Pm_Message(0xfa, 0, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_CONTINUE:
- pm_ev.message = Pm_Message(0xfb, 0, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_STOP:
- pm_ev.message = Pm_Message(0xfc, 0, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_CLOCK:
- pm_ev.message = Pm_Message(0xf8, 0, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_TUNE_REQUEST:
- pm_ev.message = Pm_Message(0xf6, 0, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_RESET:
- pm_ev.message = Pm_Message(0xff, 0, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_SENSING:
- pm_ev.message = Pm_Message(0xfe, 0, 0);
- pm_read_short(midi, &pm_ev);
- break;
- case SND_SEQ_EVENT_SYSEX: {
- const BYTE *ptr = (const BYTE *) ev->data.ext.ptr;
- /* assume there is one sysex byte to process */
- pm_read_bytes(midi, ptr, ev->data.ext.len, timestamp);
- break;
- }
- }
+ int device_id = ev->dest.port;
+ PmInternal *midi = descriptors[device_id].internalDescriptor;
+ PmEvent pm_ev;
+ PmTimeProcPtr time_proc = midi->time_proc;
+ PmTimestamp timestamp;
+
+ /* time stamp should be in ticks, using our queue where 1 tick = 1ms */
+ assert((ev->flags & SND_SEQ_TIME_STAMP_MASK) == SND_SEQ_TIME_STAMP_TICK);
+
+ /* if no time_proc, just return "native" ticks (ms) */
+ if (time_proc == NULL) {
+ timestamp = ev->time.tick;
+ } else { /* translate time to time_proc basis */
+ snd_seq_queue_status_t *queue_status;
+ snd_seq_queue_status_alloca(&queue_status);
+ snd_seq_get_queue_status(seq, queue, queue_status);
+ /* return (now - alsa_now) + alsa_timestamp */
+ timestamp = (*time_proc)(midi->time_info) + ev->time.tick -
+ snd_seq_queue_status_get_tick_time(queue_status);
+ }
+ pm_ev.timestamp = timestamp;
+ switch (ev->type) {
+ case SND_SEQ_EVENT_NOTEON:
+ pm_ev.message = Pm_Message(0x90 | ev->data.note.channel,
+ ev->data.note.note & 0x7f,
+ ev->data.note.velocity & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_NOTEOFF:
+ pm_ev.message = Pm_Message(0x80 | ev->data.note.channel,
+ ev->data.note.note & 0x7f,
+ ev->data.note.velocity & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_KEYPRESS:
+ pm_ev.message = Pm_Message(0xa0 | ev->data.note.channel,
+ ev->data.note.note & 0x7f,
+ ev->data.note.velocity & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_CONTROLLER:
+ pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
+ ev->data.control.param & 0x7f,
+ ev->data.control.value & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_PGMCHANGE:
+ pm_ev.message = Pm_Message(0xc0 | ev->data.note.channel,
+ ev->data.control.value & 0x7f, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_CHANPRESS:
+ pm_ev.message = Pm_Message(0xd0 | ev->data.note.channel,
+ ev->data.control.value & 0x7f, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_PITCHBEND:
+ pm_ev.message = Pm_Message(0xe0 | ev->data.note.channel,
+ (ev->data.control.value + 0x2000) & 0x7f,
+ ((ev->data.control.value + 0x2000) >> 7) & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_CONTROL14:
+ if (ev->data.control.param < 0x20) {
+ pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
+ ev->data.control.param,
+ (ev->data.control.value >> 7) & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
+ ev->data.control.param + 0x20,
+ ev->data.control.value & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ } else {
+ pm_ev.message = Pm_Message(0xb0 | ev->data.note.channel,
+ ev->data.control.param & 0x7f,
+ ev->data.control.value & 0x7f);
+
+ pm_read_short(midi, &pm_ev);
+ }
+ break;
+ case SND_SEQ_EVENT_SONGPOS:
+ pm_ev.message = Pm_Message(0xf2,
+ ev->data.control.value & 0x7f,
+ (ev->data.control.value >> 7) & 0x7f);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_SONGSEL:
+ pm_ev.message = Pm_Message(0xf3,
+ ev->data.control.value & 0x7f, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_QFRAME:
+ pm_ev.message = Pm_Message(0xf1,
+ ev->data.control.value & 0x7f, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_START:
+ pm_ev.message = Pm_Message(0xfa, 0, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_CONTINUE:
+ pm_ev.message = Pm_Message(0xfb, 0, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_STOP:
+ pm_ev.message = Pm_Message(0xfc, 0, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_CLOCK:
+ pm_ev.message = Pm_Message(0xf8, 0, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_TUNE_REQUEST:
+ pm_ev.message = Pm_Message(0xf6, 0, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_RESET:
+ pm_ev.message = Pm_Message(0xff, 0, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_SENSING:
+ pm_ev.message = Pm_Message(0xfe, 0, 0);
+ pm_read_short(midi, &pm_ev);
+ break;
+ case SND_SEQ_EVENT_SYSEX: {
+ const BYTE *ptr = (const BYTE *) ev->data.ext.ptr;
+ /* assume there is one sysex byte to process */
+ pm_read_bytes(midi, ptr, ev->data.ext.len, timestamp);
+ break;
+ }
+ }
}
static PmError alsa_poll(PmInternal *midi)
{
- snd_seq_event_t *ev;
- /* expensive check for input data, gets data from device: */
- while (snd_seq_event_input_pending(seq, TRUE) > 0) {
- /* cheap check on local input buffer */
- while (snd_seq_event_input_pending(seq, FALSE) > 0) {
- /* check for and ignore errors, e.g. input overflow */
- /* note: if there's overflow, this should be reported
- * all the way through to client. Since input from all
- * devices is merged, we need to find all input devices
- * and set all to the overflow state.
- * NOTE: this assumes every input is ALSA based.
- */
- int rslt = snd_seq_event_input(seq, &ev);
- if (rslt >= 0) {
- handle_event(ev);
- } else if (rslt == -ENOSPC) {
- int i;
- for (i = 0; i < pm_descriptor_index; i++) {
- if (descriptors[i].pub.input) {
- PmInternal *midi = (PmInternal *)
- descriptors[i].internalDescriptor;
- /* careful, device may not be open! */
- if (midi) Pm_SetOverflow(midi->queue);
- }
- }
- }
- }
- }
- return pmNoError;
+ snd_seq_event_t *ev;
+ /* expensive check for input data, gets data from device: */
+ while (snd_seq_event_input_pending(seq, TRUE) > 0) {
+ /* cheap check on local input buffer */
+ while (snd_seq_event_input_pending(seq, FALSE) > 0) {
+ /* check for and ignore errors, e.g. input overflow */
+ /* note: if there's overflow, this should be reported
+ * all the way through to client. Since input from all
+ * devices is merged, we need to find all input devices
+ * and set all to the overflow state.
+ * NOTE: this assumes every input is ALSA based.
+ */
+ int rslt = snd_seq_event_input(seq, &ev);
+ if (rslt >= 0) {
+ handle_event(ev);
+ } else if (rslt == -ENOSPC) {
+ int i;
+ for (i = 0; i < pm_descriptor_index; i++) {
+ if (descriptors[i].pub.input) {
+ PmInternal *midi = (PmInternal *)
+ descriptors[i].internalDescriptor;
+ /* careful, device may not be open! */
+ if (midi) Pm_SetOverflow(midi->queue);
+ }
+ }
+ }
+ }
+ }
+ return pmNoError;
}
static unsigned int alsa_has_host_error(PmInternal *midi)
{
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- return desc->error;
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ return desc->error;
}
static void alsa_get_host_error(PmInternal *midi, char *msg, unsigned int len)
{
- alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
- int err = (pm_hosterror || desc->error);
- get_alsa_error_text(msg, len, err);
+ alsa_descriptor_type desc = (alsa_descriptor_type) midi->descriptor;
+ int err = (pm_hosterror || desc->error);
+ get_alsa_error_text(msg, len, err);
}
pm_fns_node pm_linuxalsa_in_dictionary = {
- none_write_short,
- none_sysex,
- none_sysex,
- none_write_byte,
- none_write_short,
- none_write_flush,
- alsa_synchronize,
- alsa_in_open,
- alsa_abort,
- alsa_in_close,
- alsa_poll,
- alsa_has_host_error,
- alsa_get_host_error
+ none_write_short,
+ none_sysex,
+ none_sysex,
+ none_write_byte,
+ none_write_short,
+ none_write_flush,
+ alsa_synchronize,
+ alsa_in_open,
+ alsa_abort,
+ alsa_in_close,
+ alsa_poll,
+ alsa_has_host_error,
+ alsa_get_host_error
};
pm_fns_node pm_linuxalsa_out_dictionary = {
- alsa_write_short,
- alsa_sysex,
- alsa_sysex,
- alsa_write_byte,
- alsa_write_short, /* short realtime message */
- alsa_write_flush,
- alsa_synchronize,
- alsa_out_open,
- alsa_abort,
- alsa_out_close,
- none_poll,
- alsa_has_host_error,
- alsa_get_host_error
+ alsa_write_short,
+ alsa_sysex,
+ alsa_sysex,
+ alsa_write_byte,
+ alsa_write_short, /* short realtime message */
+ alsa_write_flush,
+ alsa_synchronize,
+ alsa_out_open,
+ alsa_abort,
+ alsa_out_close,
+ none_poll,
+ alsa_has_host_error,
+ alsa_get_host_error
};
-/* pm_strdup -- copy a string to the heap. Use this rather than strdup so
- * that we call pm_alloc, not malloc. This allows portmidi to avoid
+/* pm_strdup -- copy a string to the heap. Use this rather than strdup so
+ * that we call pm_alloc, not malloc. This allows portmidi to avoid
* malloc which might cause priority inversion. Probably ALSA is going
* to call malloc anyway, so this extra work here may be pointless.
*/
char *pm_strdup(const char *s)
{
- int len = strlen(s);
- char *dup = (char *) pm_alloc(len + 1);
- strcpy(dup, s);
- return dup;
+ int len = strlen(s);
+ char *dup = (char *) pm_alloc(len + 1);
+ strcpy(dup, s);
+ return dup;
}
PmError pm_linuxalsa_init( void )
{
- int err;
- snd_seq_client_info_t *cinfo;
- snd_seq_port_info_t *pinfo;
- unsigned int caps;
-
- /* Previously, the last parameter was SND_SEQ_NONBLOCK, but this
- * would cause messages to be dropped if the ALSA buffer fills up.
- * The correct behavior is for writes to block until there is
- * room to send all the data. The client should normally allocate
- * a large enough buffer to avoid blocking on output.
- * Now that blocking is enabled, the seq_event_input() will block
- * if there is no input data. This is not what we want, so must
- * call seq_event_input_pending() to avoid blocking.
- */
- err = snd_seq_open(&seq, "default", SND_SEQ_OPEN_DUPLEX, 0);
- if (err < 0) return err;
-
- snd_seq_client_info_alloca(&cinfo);
- snd_seq_port_info_alloca(&pinfo);
-
- snd_seq_client_info_set_client(cinfo, -1);
- while (snd_seq_query_next_client(seq, cinfo) == 0) {
- snd_seq_port_info_set_client(pinfo, snd_seq_client_info_get_client(cinfo));
- snd_seq_port_info_set_port(pinfo, -1);
- while (snd_seq_query_next_port(seq, pinfo) == 0) {
- if (snd_seq_port_info_get_client(pinfo) == SND_SEQ_CLIENT_SYSTEM)
- continue; /* ignore Timer and Announce ports on client 0 */
- caps = snd_seq_port_info_get_capability(pinfo);
- if (!(caps & (SND_SEQ_PORT_CAP_SUBS_READ | SND_SEQ_PORT_CAP_SUBS_WRITE)))
- continue; /* ignore if you cannot read or write port */
- if (caps & SND_SEQ_PORT_CAP_SUBS_WRITE) {
- if (pm_default_output_device_id == -1)
- pm_default_output_device_id = pm_descriptor_index;
- pm_add_device((char *)"ALSA",
- pm_strdup(snd_seq_port_info_get_name(pinfo)),
- FALSE,
- MAKE_DESCRIPTOR(snd_seq_port_info_get_client(pinfo),
- snd_seq_port_info_get_port(pinfo)),
- &pm_linuxalsa_out_dictionary);
- }
- if (caps & SND_SEQ_PORT_CAP_SUBS_READ) {
- if (pm_default_input_device_id == -1)
- pm_default_input_device_id = pm_descriptor_index;
- pm_add_device((char *)"ALSA",
- pm_strdup(snd_seq_port_info_get_name(pinfo)),
- TRUE,
- MAKE_DESCRIPTOR(snd_seq_port_info_get_client(pinfo),
- snd_seq_port_info_get_port(pinfo)),
- &pm_linuxalsa_in_dictionary);
- }
- }
- }
- return pmNoError;
+ int err;
+ snd_seq_client_info_t *cinfo;
+ snd_seq_port_info_t *pinfo;
+ unsigned int caps;
+
+ /* Previously, the last parameter was SND_SEQ_NONBLOCK, but this
+ * would cause messages to be dropped if the ALSA buffer fills up.
+ * The correct behavior is for writes to block until there is
+ * room to send all the data. The client should normally allocate
+ * a large enough buffer to avoid blocking on output.
+ * Now that blocking is enabled, the seq_event_input() will block
+ * if there is no input data. This is not what we want, so must
+ * call seq_event_input_pending() to avoid blocking.
+ */
+ err = snd_seq_open(&seq, "default", SND_SEQ_OPEN_DUPLEX, 0);
+ if (err < 0) return err;
+
+ snd_seq_client_info_alloca(&cinfo);
+ snd_seq_port_info_alloca(&pinfo);
+
+ snd_seq_client_info_set_client(cinfo, -1);
+ while (snd_seq_query_next_client(seq, cinfo) == 0) {
+ snd_seq_port_info_set_client(pinfo, snd_seq_client_info_get_client(cinfo));
+ snd_seq_port_info_set_port(pinfo, -1);
+ while (snd_seq_query_next_port(seq, pinfo) == 0) {
+ if (snd_seq_port_info_get_client(pinfo) == SND_SEQ_CLIENT_SYSTEM)
+ continue; /* ignore Timer and Announce ports on client 0 */
+ caps = snd_seq_port_info_get_capability(pinfo);
+ if (!(caps & (SND_SEQ_PORT_CAP_SUBS_READ | SND_SEQ_PORT_CAP_SUBS_WRITE)))
+ continue; /* ignore if you cannot read or write port */
+ if (caps & SND_SEQ_PORT_CAP_SUBS_WRITE) {
+ if (pm_default_output_device_id == -1)
+ pm_default_output_device_id = pm_descriptor_index;
+ pm_add_device((char *)"ALSA",
+ pm_strdup(snd_seq_port_info_get_name(pinfo)),
+ FALSE,
+ MAKE_DESCRIPTOR(snd_seq_port_info_get_client(pinfo),
+ snd_seq_port_info_get_port(pinfo)),
+ &pm_linuxalsa_out_dictionary);
+ }
+ if (caps & SND_SEQ_PORT_CAP_SUBS_READ) {
+ if (pm_default_input_device_id == -1)
+ pm_default_input_device_id = pm_descriptor_index;
+ pm_add_device((char *)"ALSA",
+ pm_strdup(snd_seq_port_info_get_name(pinfo)),
+ TRUE,
+ MAKE_DESCRIPTOR(snd_seq_port_info_get_client(pinfo),
+ snd_seq_port_info_get_port(pinfo)),
+ &pm_linuxalsa_in_dictionary);
+ }
+ }
+ }
+ return pmNoError;
}
-
+
void pm_linuxalsa_term(void)
{
- if (seq) {
- snd_seq_close(seq);
- pm_free(descriptors);
- descriptors = NULL;
- pm_descriptor_index = 0;
- pm_descriptor_max = 0;
- }
+ if (seq) {
+ snd_seq_close(seq);
+ pm_free(descriptors);
+ descriptors = NULL;
+ pm_descriptor_index = 0;
+ pm_descriptor_max = 0;
+ }
}
diff --git a/src/lib/portmidi/pmlinuxalsa.h b/src/lib/portmidi/pmlinuxalsa.h
index c16f61d391a..b6ac4fa686f 100644
--- a/src/lib/portmidi/pmlinuxalsa.h
+++ b/src/lib/portmidi/pmlinuxalsa.h
@@ -2,5 +2,3 @@
PmError pm_linuxalsa_init(void);
void pm_linuxalsa_term(void);
-
-
diff --git a/src/lib/portmidi/pmmac.c b/src/lib/portmidi/pmmac.c
index 427c0378ea3..5468b8d5596 100644
--- a/src/lib/portmidi/pmmac.c
+++ b/src/lib/portmidi/pmmac.c
@@ -1,7 +1,7 @@
/* pmmac.c -- PortMidi os-dependent code */
/* This file only needs to implement:
-pm_init(), which calls various routines to register the
+pm_init(), which calls various routines to register the
available midi devices,
Pm_GetDefaultInputDeviceID(), and
Pm_GetDefaultOutputDeviceID().
@@ -20,40 +20,38 @@ PmDeviceID pm_default_output_device_id = -1;
void pm_init()
{
- PmError err = pm_macosxcm_init();
- // this is set when we return to Pm_Initialize, but we need it
- // now in order to (successfully) call Pm_CountDevices()
- pm_initialized = TRUE;
- if (!err) {
- pm_default_input_device_id = find_default_device(
- (char *)"/PortMidi/PM_RECOMMENDED_INPUT_DEVICE", TRUE,
- pm_default_input_device_id);
- pm_default_output_device_id = find_default_device(
- (char *)"/PortMidi/PM_RECOMMENDED_OUTPUT_DEVICE", FALSE,
- pm_default_output_device_id);
- }
+ PmError err = pm_macosxcm_init();
+ // this is set when we return to Pm_Initialize, but we need it
+ // now in order to (successfully) call Pm_CountDevices()
+ pm_initialized = TRUE;
+ if (!err) {
+ pm_default_input_device_id = find_default_device(
+ (char *)"/PortMidi/PM_RECOMMENDED_INPUT_DEVICE", TRUE,
+ pm_default_input_device_id);
+ pm_default_output_device_id = find_default_device(
+ (char *)"/PortMidi/PM_RECOMMENDED_OUTPUT_DEVICE", FALSE,
+ pm_default_output_device_id);
+ }
}
void pm_term(void)
{
- pm_macosxcm_term();
+ pm_macosxcm_term();
}
PmDeviceID Pm_GetDefaultInputDeviceID()
{
- Pm_Initialize();
- return pm_default_input_device_id;
+ Pm_Initialize();
+ return pm_default_input_device_id;
}
PmDeviceID Pm_GetDefaultOutputDeviceID() {
- Pm_Initialize();
- return pm_default_output_device_id;
+ Pm_Initialize();
+ return pm_default_output_device_id;
}
void *pm_alloc(size_t s) { return malloc(s); }
void pm_free(void *ptr) { free(ptr); }
-
-
diff --git a/src/lib/portmidi/pmmac.h b/src/lib/portmidi/pmmac.h
index 6cc0392c3f4..6b64fff2a95 100644
--- a/src/lib/portmidi/pmmac.h
+++ b/src/lib/portmidi/pmmac.h
@@ -1,4 +1,4 @@
/* pmmac.h */
extern PmDeviceID pm_default_input_device_id;
-extern PmDeviceID pm_default_output_device_id; \ No newline at end of file
+extern PmDeviceID pm_default_output_device_id;
diff --git a/src/lib/portmidi/pmmacosxcm.c b/src/lib/portmidi/pmmacosxcm.c
index 71177dded11..f7dcff24665 100644
--- a/src/lib/portmidi/pmmacosxcm.c
+++ b/src/lib/portmidi/pmmacosxcm.c
@@ -1,13 +1,13 @@
/*
* Platform interface to the MacOS X CoreMIDI framework
- *
+ *
* Jon Parise <jparise at cmu.edu>
* and subsequent work by Andrew Zeldis and Zico Kolter
* and Roger B. Dannenberg
*
* $Id: pmmacosx.c,v 1.17 2002/01/27 02:40:40 jon Exp $
*/
-
+
/* Notes:
since the input and output streams are represented by MIDIEndpointRef
values and almost no other state, we store the MIDIEndpointRef on
@@ -16,7 +16,7 @@
the error text. We use a structure with two kinds of
host error: "error" and "callback_error". That way, asynchronous callbacks
do not interfere with other error information.
-
+
OS X does not seem to have an error-code-to-text function, so we will
just use text messages instead of error codes.
*/
@@ -45,21 +45,21 @@
#define MAX_BYTES_PER_S 14000
/* Apple reports that packets are dropped when the MIDI bytes/sec
- exceeds 15000. This is computed by "tracking the number of MIDI
+ exceeds 15000. This is computed by "tracking the number of MIDI
bytes scheduled into 1-second buckets over the last six seconds
- and averaging these counts."
+ and averaging these counts."
- This is apparently based on timestamps, not on real time, so
+ This is apparently based on timestamps, not on real time, so
we have to avoid constructing packets that schedule high speed
output even if the actual writes are delayed (which was my first
solution).
- The LIMIT_RATE symbol, if defined, enables code to modify
+ The LIMIT_RATE symbol, if defined, enables code to modify
timestamps as follows:
After each packet is formed, the next allowable timestamp is
computed as this_packet_time + this_packet_len * delay_per_byte
- This is the minimum timestamp allowed in the next packet.
+ This is the minimum timestamp allowed in the next packet.
Note that this distorts accurate timestamps somewhat.
*/
@@ -82,36 +82,36 @@
#define NULL_REF NULL
#endif
-static MIDIClientRef client = NULL_REF; /* Client handle to the MIDI server */
-static MIDIPortRef portIn = NULL_REF; /* Input port handle */
-static MIDIPortRef portOut = NULL_REF; /* Output port handle */
+static MIDIClientRef client = NULL_REF; /* Client handle to the MIDI server */
+static MIDIPortRef portIn = NULL_REF; /* Input port handle */
+static MIDIPortRef portOut = NULL_REF; /* Output port handle */
extern pm_fns_node pm_macosx_in_dictionary;
extern pm_fns_node pm_macosx_out_dictionary;
typedef struct midi_macosxcm_struct {
- PmTimestamp sync_time; /* when did we last determine delta? */
- UInt64 delta; /* difference between stream time and real time in ns */
- UInt64 last_time; /* last output time in host units*/
- int first_message; /* tells midi_write to sychronize timestamps */
- int sysex_mode; /* middle of sending sysex */
- uint32_t sysex_word; /* accumulate data when receiving sysex */
- uint32_t sysex_byte_count; /* count how many received */
- char error[PM_HOST_ERROR_MSG_LEN];
- char callback_error[PM_HOST_ERROR_MSG_LEN];
- Byte packetBuffer[PACKET_BUFFER_SIZE];
- MIDIPacketList *packetList; /* a pointer to packetBuffer */
- MIDIPacket *packet;
- Byte sysex_buffer[SYSEX_BUFFER_SIZE]; /* temp storage for sysex data */
- MIDITimeStamp sysex_timestamp; /* timestamp to use with sysex data */
- /* allow for running status (is running status possible here? -rbd): -cpr */
- unsigned char last_command;
- int32_t last_msg_length;
- /* limit midi data rate (a CoreMidi requirement): */
- UInt64 min_next_time; /* when can the next send take place? */
- int byte_count; /* how many bytes in the next packet list? */
- Float64 us_per_host_tick; /* host clock frequency, units of min_next_time */
- UInt64 host_ticks_per_byte; /* host clock units per byte at maximum rate */
+ PmTimestamp sync_time; /* when did we last determine delta? */
+ UInt64 delta; /* difference between stream time and real time in ns */
+ UInt64 last_time; /* last output time in host units*/
+ int first_message; /* tells midi_write to sychronize timestamps */
+ int sysex_mode; /* middle of sending sysex */
+ uint32_t sysex_word; /* accumulate data when receiving sysex */
+ uint32_t sysex_byte_count; /* count how many received */
+ char error[PM_HOST_ERROR_MSG_LEN];
+ char callback_error[PM_HOST_ERROR_MSG_LEN];
+ Byte packetBuffer[PACKET_BUFFER_SIZE];
+ MIDIPacketList *packetList; /* a pointer to packetBuffer */
+ MIDIPacket *packet;
+ Byte sysex_buffer[SYSEX_BUFFER_SIZE]; /* temp storage for sysex data */
+ MIDITimeStamp sysex_timestamp; /* timestamp to use with sysex data */
+ /* allow for running status (is running status possible here? -rbd): -cpr */
+ unsigned char last_command;
+ int32_t last_msg_length;
+ /* limit midi data rate (a CoreMidi requirement): */
+ UInt64 min_next_time; /* when can the next send take place? */
+ int byte_count; /* how many bytes in the next packet list? */
+ Float64 us_per_host_tick; /* host clock frequency, units of min_next_time */
+ UInt64 host_ticks_per_byte; /* host clock units per byte at maximum rate */
} midi_macosxcm_node, *midi_macosxcm_type;
/* private function declarations */
@@ -124,134 +124,134 @@ char* cm_get_full_endpoint_name(MIDIEndpointRef endpoint);
static int
midi_length(int32_t msg)
{
- int status, high, low;
- static int high_lengths[] = {
- 1, 1, 1, 1, 1, 1, 1, 1, /* 0x00 through 0x70 */
- 3, 3, 3, 3, 2, 2, 3, 1 /* 0x80 through 0xf0 */
- };
- static int low_lengths[] = {
- 1, 2, 3, 2, 1, 1, 1, 1, /* 0xf0 through 0xf8 */
- 1, 1, 1, 1, 1, 1, 1, 1 /* 0xf9 through 0xff */
- };
-
- status = msg & 0xFF;
- high = status >> 4;
- low = status & 15;
-
- return (high != 0xF) ? high_lengths[high] : low_lengths[low];
+ int status, high, low;
+ static int high_lengths[] = {
+ 1, 1, 1, 1, 1, 1, 1, 1, /* 0x00 through 0x70 */
+ 3, 3, 3, 3, 2, 2, 3, 1 /* 0x80 through 0xf0 */
+ };
+ static int low_lengths[] = {
+ 1, 2, 3, 2, 1, 1, 1, 1, /* 0xf0 through 0xf8 */
+ 1, 1, 1, 1, 1, 1, 1, 1 /* 0xf9 through 0xff */
+ };
+
+ status = msg & 0xFF;
+ high = status >> 4;
+ low = status & 15;
+
+ return (high != 0xF) ? high_lengths[high] : low_lengths[low];
}
static PmTimestamp midi_synchronize(PmInternal *midi)
{
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- UInt64 pm_stream_time_2 =
- AudioConvertHostTimeToNanos(AudioGetCurrentHostTime());
- PmTimestamp real_time;
- UInt64 pm_stream_time;
- /* if latency is zero and this is an output, there is no
- time reference and midi_synchronize should never be called */
- assert(midi->time_proc);
- assert(!(midi->write_flag && midi->latency == 0));
- do {
- /* read real_time between two reads of stream time */
- pm_stream_time = pm_stream_time_2;
- real_time = (*midi->time_proc)(midi->time_info);
- pm_stream_time_2 = AudioConvertHostTimeToNanos(AudioGetCurrentHostTime());
- /* repeat if more than 0.5 ms has elapsed */
- } while (pm_stream_time_2 > pm_stream_time + 500000);
- m->delta = pm_stream_time - ((UInt64) real_time * (UInt64) 1000000);
- m->sync_time = real_time;
- return real_time;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ UInt64 pm_stream_time_2 =
+ AudioConvertHostTimeToNanos(AudioGetCurrentHostTime());
+ PmTimestamp real_time;
+ UInt64 pm_stream_time;
+ /* if latency is zero and this is an output, there is no
+ time reference and midi_synchronize should never be called */
+ assert(midi->time_proc);
+ assert(!(midi->write_flag && midi->latency == 0));
+ do {
+ /* read real_time between two reads of stream time */
+ pm_stream_time = pm_stream_time_2;
+ real_time = (*midi->time_proc)(midi->time_info);
+ pm_stream_time_2 = AudioConvertHostTimeToNanos(AudioGetCurrentHostTime());
+ /* repeat if more than 0.5 ms has elapsed */
+ } while (pm_stream_time_2 > pm_stream_time + 500000);
+ m->delta = pm_stream_time - ((UInt64) real_time * (UInt64) 1000000);
+ m->sync_time = real_time;
+ return real_time;
}
static void
-process_packet(MIDIPacket *packet, PmEvent *event,
- PmInternal *midi, midi_macosxcm_type m)
+process_packet(MIDIPacket *packet, PmEvent *event,
+ PmInternal *midi, midi_macosxcm_type m)
{
- /* handle a packet of MIDI messages from CoreMIDI */
- /* there may be multiple short messages in one packet (!) */
- unsigned int remaining_length = packet->length;
- unsigned char *cur_packet_data = packet->data;
- while (remaining_length > 0) {
- if (cur_packet_data[0] == MIDI_SYSEX ||
- /* are we in the middle of a sysex message? */
- (m->last_command == 0 &&
- !(cur_packet_data[0] & MIDI_STATUS_MASK))) {
- m->last_command = 0; /* no running status */
- unsigned int amt = pm_read_bytes(midi, cur_packet_data,
- remaining_length,
- event->timestamp);
- remaining_length -= amt;
- cur_packet_data += amt;
- } else if (cur_packet_data[0] == MIDI_EOX) {
- /* this should never happen, because pm_read_bytes should
- * get and read all EOX bytes*/
- midi->sysex_in_progress = FALSE;
- m->last_command = 0;
- } else if (cur_packet_data[0] & MIDI_STATUS_MASK) {
- /* compute the length of the next (short) msg in packet */
- unsigned int cur_message_length = midi_length(cur_packet_data[0]);
- if (cur_message_length > remaining_length) {
+ /* handle a packet of MIDI messages from CoreMIDI */
+ /* there may be multiple short messages in one packet (!) */
+ unsigned int remaining_length = packet->length;
+ unsigned char *cur_packet_data = packet->data;
+ while (remaining_length > 0) {
+ if (cur_packet_data[0] == MIDI_SYSEX ||
+ /* are we in the middle of a sysex message? */
+ (m->last_command == 0 &&
+ !(cur_packet_data[0] & MIDI_STATUS_MASK))) {
+ m->last_command = 0; /* no running status */
+ unsigned int amt = pm_read_bytes(midi, cur_packet_data,
+ remaining_length,
+ event->timestamp);
+ remaining_length -= amt;
+ cur_packet_data += amt;
+ } else if (cur_packet_data[0] == MIDI_EOX) {
+ /* this should never happen, because pm_read_bytes should
+ * get and read all EOX bytes*/
+ midi->sysex_in_progress = FALSE;
+ m->last_command = 0;
+ } else if (cur_packet_data[0] & MIDI_STATUS_MASK) {
+ /* compute the length of the next (short) msg in packet */
+ unsigned int cur_message_length = midi_length(cur_packet_data[0]);
+ if (cur_message_length > remaining_length) {
#ifdef DEBUG
- printf("PortMidi debug msg: not enough data");
+ printf("PortMidi debug msg: not enough data");
#endif
/* since there's no more data, we're done */
return;
- }
- m->last_msg_length = cur_message_length;
- m->last_command = cur_packet_data[0];
- switch (cur_message_length) {
- case 1:
- event->message = Pm_Message(cur_packet_data[0], 0, 0);
- break;
- case 2:
- event->message = Pm_Message(cur_packet_data[0],
- cur_packet_data[1], 0);
+ }
+ m->last_msg_length = cur_message_length;
+ m->last_command = cur_packet_data[0];
+ switch (cur_message_length) {
+ case 1:
+ event->message = Pm_Message(cur_packet_data[0], 0, 0);
break;
- case 3:
- event->message = Pm_Message(cur_packet_data[0],
- cur_packet_data[1],
- cur_packet_data[2]);
+ case 2:
+ event->message = Pm_Message(cur_packet_data[0],
+ cur_packet_data[1], 0);
break;
- default:
- /* PortMIDI internal error; should never happen */
- assert(cur_message_length == 1);
- return; /* give up on packet if continued after assert */
- }
- pm_read_short(midi, event);
- remaining_length -= m->last_msg_length;
- cur_packet_data += m->last_msg_length;
+ case 3:
+ event->message = Pm_Message(cur_packet_data[0],
+ cur_packet_data[1],
+ cur_packet_data[2]);
+ break;
+ default:
+ /* PortMIDI internal error; should never happen */
+ assert(cur_message_length == 1);
+ return; /* give up on packet if continued after assert */
+ }
+ pm_read_short(midi, event);
+ remaining_length -= m->last_msg_length;
+ cur_packet_data += m->last_msg_length;
} else if (m->last_msg_length > remaining_length + 1) {
- /* we have running status, but not enough data */
+ /* we have running status, but not enough data */
#ifdef DEBUG
- printf("PortMidi debug msg: not enough data in CoreMIDI packet");
+ printf("PortMidi debug msg: not enough data in CoreMIDI packet");
#endif
- /* since there's no more data, we're done */
- return;
+ /* since there's no more data, we're done */
+ return;
} else { /* output message using running status */
- switch (m->last_msg_length) {
- case 1:
- event->message = Pm_Message(m->last_command, 0, 0);
+ switch (m->last_msg_length) {
+ case 1:
+ event->message = Pm_Message(m->last_command, 0, 0);
break;
- case 2:
- event->message = Pm_Message(m->last_command,
- cur_packet_data[0], 0);
+ case 2:
+ event->message = Pm_Message(m->last_command,
+ cur_packet_data[0], 0);
break;
- case 3:
- event->message = Pm_Message(m->last_command,
- cur_packet_data[0],
- cur_packet_data[1]);
+ case 3:
+ event->message = Pm_Message(m->last_command,
+ cur_packet_data[0],
+ cur_packet_data[1]);
break;
- default:
- /* last_msg_length is invalid -- internal PortMIDI error */
- assert(m->last_msg_length == 1);
- }
- pm_read_short(midi, event);
- remaining_length -= (m->last_msg_length - 1);
- cur_packet_data += (m->last_msg_length - 1);
- }
- }
+ default:
+ /* last_msg_length is invalid -- internal PortMIDI error */
+ assert(m->last_msg_length == 1);
+ }
+ pm_read_short(midi, event);
+ remaining_length -= (m->last_msg_length - 1);
+ cur_packet_data += (m->last_msg_length - 1);
+ }
+ }
}
@@ -260,446 +260,446 @@ process_packet(MIDIPacket *packet, PmEvent *event,
static void
readProc(const MIDIPacketList *newPackets, void *refCon, void *connRefCon)
{
- PmInternal *midi;
- midi_macosxcm_type m;
- PmEvent event;
- MIDIPacket *packet;
- unsigned int packetIndex;
- uint32_t now;
- unsigned int status;
-
+ PmInternal *midi;
+ midi_macosxcm_type m;
+ PmEvent event;
+ MIDIPacket *packet;
+ unsigned int packetIndex;
+ uint32_t now;
+ unsigned int status;
+
#ifdef CM_DEBUG
- printf("readProc: numPackets %d: ", newPackets->numPackets);
+ printf("readProc: numPackets %d: ", newPackets->numPackets);
#endif
- /* Retrieve the context for this connection */
- midi = (PmInternal *) connRefCon;
- m = (midi_macosxcm_type) midi->descriptor;
- assert(m);
-
- /* synchronize time references every 100ms */
- now = (*midi->time_proc)(midi->time_info);
- if (m->first_message || m->sync_time + 100 /*ms*/ < now) {
- /* time to resync */
- now = midi_synchronize(midi);
- m->first_message = FALSE;
- }
-
- packet = (MIDIPacket *) &newPackets->packet[0];
- /* printf("readproc packet status %x length %d\n", packet->data[0],
- packet->length); */
- for (packetIndex = 0; packetIndex < newPackets->numPackets; packetIndex++) {
- /* Set the timestamp and dispatch this message */
- event.timestamp = (PmTimestamp) /* explicit conversion */ (
- (AudioConvertHostTimeToNanos(packet->timeStamp) - m->delta) /
- (UInt64) 1000000);
- status = packet->data[0];
- /* process packet as sysex data if it begins with MIDI_SYSEX, or
- MIDI_EOX or non-status byte with no running status */
+ /* Retrieve the context for this connection */
+ midi = (PmInternal *) connRefCon;
+ m = (midi_macosxcm_type) midi->descriptor;
+ assert(m);
+
+ /* synchronize time references every 100ms */
+ now = (*midi->time_proc)(midi->time_info);
+ if (m->first_message || m->sync_time + 100 /*ms*/ < now) {
+ /* time to resync */
+ now = midi_synchronize(midi);
+ m->first_message = FALSE;
+ }
+
+ packet = (MIDIPacket *) &newPackets->packet[0];
+ /* printf("readproc packet status %x length %d\n", packet->data[0],
+ packet->length); */
+ for (packetIndex = 0; packetIndex < newPackets->numPackets; packetIndex++) {
+ /* Set the timestamp and dispatch this message */
+ event.timestamp = (PmTimestamp) /* explicit conversion */ (
+ (AudioConvertHostTimeToNanos(packet->timeStamp) - m->delta) /
+ (UInt64) 1000000);
+ status = packet->data[0];
+ /* process packet as sysex data if it begins with MIDI_SYSEX, or
+ MIDI_EOX or non-status byte with no running status */
#ifdef CM_DEBUG
- printf(" %d", packet->length);
+ printf(" %d", packet->length);
#endif
- if (status == MIDI_SYSEX || status == MIDI_EOX ||
- ((!(status & MIDI_STATUS_MASK)) && !m->last_command)) {
- /* previously was: !(status & MIDI_STATUS_MASK)) {
- * but this could mistake running status for sysex data
- */
- /* reset running status data -cpr */
- m->last_command = 0;
- m->last_msg_length = 0;
- /* printf("sysex packet length: %d\n", packet->length); */
- pm_read_bytes(midi, packet->data, packet->length, event.timestamp);
- } else {
- process_packet(packet, &event, midi, m);
- }
- packet = MIDIPacketNext(packet);
- }
+ if (status == MIDI_SYSEX || status == MIDI_EOX ||
+ ((!(status & MIDI_STATUS_MASK)) && !m->last_command)) {
+ /* previously was: !(status & MIDI_STATUS_MASK)) {
+ * but this could mistake running status for sysex data
+ */
+ /* reset running status data -cpr */
+ m->last_command = 0;
+ m->last_msg_length = 0;
+ /* printf("sysex packet length: %d\n", packet->length); */
+ pm_read_bytes(midi, packet->data, packet->length, event.timestamp);
+ } else {
+ process_packet(packet, &event, midi, m);
+ }
+ packet = MIDIPacketNext(packet);
+ }
#ifdef CM_DEBUG
- printf("\n");
+ printf("\n");
#endif
}
static PmError
midi_in_open(PmInternal *midi, void *driverInfo)
{
- MIDIEndpointRef endpoint;
- midi_macosxcm_type m;
- OSStatus macHostError;
-
- /* insure that we have a time_proc for timing */
- if (midi->time_proc == NULL) {
- if (!Pt_Started())
- Pt_Start(1, 0, 0);
- /* time_get does not take a parameter, so coerce */
- midi->time_proc = (PmTimeProcPtr) Pt_Time;
- }
- endpoint = (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
- if (endpoint == NULL_REF) {
- return pmInvalidDeviceId;
- }
-
- m = (midi_macosxcm_type) pm_alloc(sizeof(midi_macosxcm_node)); /* create */
- midi->descriptor = m;
- if (!m) {
- return pmInsufficientMemory;
- }
- m->error[0] = 0;
- m->callback_error[0] = 0;
- m->sync_time = 0;
- m->delta = 0;
- m->last_time = 0;
- m->first_message = TRUE;
- m->sysex_mode = FALSE;
- m->sysex_word = 0;
- m->sysex_byte_count = 0;
- m->packetList = NULL;
- m->packet = NULL;
- m->last_command = 0;
- m->last_msg_length = 0;
-
- macHostError = MIDIPortConnectSource(portIn, endpoint, midi);
- if (macHostError != noErr) {
- pm_hosterror = macHostError;
- sprintf(pm_hosterror_text,
- "Host error %ld: MIDIPortConnectSource() in midi_in_open()",
- (long) macHostError);
- midi->descriptor = NULL;
- pm_free(m);
- return pmHostError;
- }
-
- return pmNoError;
+ MIDIEndpointRef endpoint;
+ midi_macosxcm_type m;
+ OSStatus macHostError;
+
+ /* insure that we have a time_proc for timing */
+ if (midi->time_proc == NULL) {
+ if (!Pt_Started())
+ Pt_Start(1, 0, 0);
+ /* time_get does not take a parameter, so coerce */
+ midi->time_proc = (PmTimeProcPtr) Pt_Time;
+ }
+ endpoint = (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
+ if (endpoint == NULL_REF) {
+ return pmInvalidDeviceId;
+ }
+
+ m = (midi_macosxcm_type) pm_alloc(sizeof(midi_macosxcm_node)); /* create */
+ midi->descriptor = m;
+ if (!m) {
+ return pmInsufficientMemory;
+ }
+ m->error[0] = 0;
+ m->callback_error[0] = 0;
+ m->sync_time = 0;
+ m->delta = 0;
+ m->last_time = 0;
+ m->first_message = TRUE;
+ m->sysex_mode = FALSE;
+ m->sysex_word = 0;
+ m->sysex_byte_count = 0;
+ m->packetList = NULL;
+ m->packet = NULL;
+ m->last_command = 0;
+ m->last_msg_length = 0;
+
+ macHostError = MIDIPortConnectSource(portIn, endpoint, midi);
+ if (macHostError != noErr) {
+ pm_hosterror = macHostError;
+ sprintf(pm_hosterror_text,
+ "Host error %ld: MIDIPortConnectSource() in midi_in_open()",
+ (long) macHostError);
+ midi->descriptor = NULL;
+ pm_free(m);
+ return pmHostError;
+ }
+
+ return pmNoError;
}
static PmError
midi_in_close(PmInternal *midi)
{
- MIDIEndpointRef endpoint;
- OSStatus macHostError;
- PmError err = pmNoError;
-
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
-
- if (!m) return pmBadPtr;
-
- endpoint = (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
- if (endpoint == NULL_REF) {
- pm_hosterror = pmBadPtr;
- }
-
- /* shut off the incoming messages before freeing data structures */
- macHostError = MIDIPortDisconnectSource(portIn, endpoint);
- if (macHostError != noErr) {
- pm_hosterror = macHostError;
- sprintf(pm_hosterror_text,
- "Host error %ld: MIDIPortDisconnectSource() in midi_in_close()",
- (long) macHostError);
- err = pmHostError;
- }
-
- midi->descriptor = NULL;
- pm_free(midi->descriptor);
-
- return err;
+ MIDIEndpointRef endpoint;
+ OSStatus macHostError;
+ PmError err = pmNoError;
+
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+
+ if (!m) return pmBadPtr;
+
+ endpoint = (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
+ if (endpoint == NULL_REF) {
+ pm_hosterror = pmBadPtr;
+ }
+
+ /* shut off the incoming messages before freeing data structures */
+ macHostError = MIDIPortDisconnectSource(portIn, endpoint);
+ if (macHostError != noErr) {
+ pm_hosterror = macHostError;
+ sprintf(pm_hosterror_text,
+ "Host error %ld: MIDIPortDisconnectSource() in midi_in_close()",
+ (long) macHostError);
+ err = pmHostError;
+ }
+
+ midi->descriptor = NULL;
+ pm_free(midi->descriptor);
+
+ return err;
}
static PmError
midi_out_open(PmInternal *midi, void *driverInfo)
{
- midi_macosxcm_type m;
-
- m = (midi_macosxcm_type) pm_alloc(sizeof(midi_macosxcm_node)); /* create */
- midi->descriptor = m;
- if (!m) {
- return pmInsufficientMemory;
- }
- m->error[0] = 0;
- m->callback_error[0] = 0;
- m->sync_time = 0;
- m->delta = 0;
- m->last_time = 0;
- m->first_message = TRUE;
- m->sysex_mode = FALSE;
- m->sysex_word = 0;
- m->sysex_byte_count = 0;
- m->packetList = (MIDIPacketList *) m->packetBuffer;
- m->packet = NULL;
- m->last_command = 0;
- m->last_msg_length = 0;
- m->min_next_time = 0;
- m->byte_count = 0;
- m->us_per_host_tick = 1000000.0 / AudioGetHostClockFrequency();
- m->host_ticks_per_byte = (UInt64) (1000000.0 /
- (m->us_per_host_tick * MAX_BYTES_PER_S));
- return pmNoError;
+ midi_macosxcm_type m;
+
+ m = (midi_macosxcm_type) pm_alloc(sizeof(midi_macosxcm_node)); /* create */
+ midi->descriptor = m;
+ if (!m) {
+ return pmInsufficientMemory;
+ }
+ m->error[0] = 0;
+ m->callback_error[0] = 0;
+ m->sync_time = 0;
+ m->delta = 0;
+ m->last_time = 0;
+ m->first_message = TRUE;
+ m->sysex_mode = FALSE;
+ m->sysex_word = 0;
+ m->sysex_byte_count = 0;
+ m->packetList = (MIDIPacketList *) m->packetBuffer;
+ m->packet = NULL;
+ m->last_command = 0;
+ m->last_msg_length = 0;
+ m->min_next_time = 0;
+ m->byte_count = 0;
+ m->us_per_host_tick = 1000000.0 / AudioGetHostClockFrequency();
+ m->host_ticks_per_byte = (UInt64) (1000000.0 /
+ (m->us_per_host_tick * MAX_BYTES_PER_S));
+ return pmNoError;
}
static PmError
midi_out_close(PmInternal *midi)
{
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- if (!m) return pmBadPtr;
-
- midi->descriptor = NULL;
- pm_free(midi->descriptor);
-
- return pmNoError;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ if (!m) return pmBadPtr;
+
+ midi->descriptor = NULL;
+ pm_free(midi->descriptor);
+
+ return pmNoError;
}
static PmError
midi_abort(PmInternal *midi)
{
- PmError err = pmNoError;
- OSStatus macHostError;
- MIDIEndpointRef endpoint =
- (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
- macHostError = MIDIFlushOutput(endpoint);
- if (macHostError != noErr) {
- pm_hosterror = macHostError;
- sprintf(pm_hosterror_text,
- "Host error %ld: MIDIFlushOutput()", (long) macHostError);
- err = pmHostError;
- }
- return err;
+ PmError err = pmNoError;
+ OSStatus macHostError;
+ MIDIEndpointRef endpoint =
+ (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
+ macHostError = MIDIFlushOutput(endpoint);
+ if (macHostError != noErr) {
+ pm_hosterror = macHostError;
+ sprintf(pm_hosterror_text,
+ "Host error %ld: MIDIFlushOutput()", (long) macHostError);
+ err = pmHostError;
+ }
+ return err;
}
static PmError
midi_write_flush(PmInternal *midi, PmTimestamp timestamp)
{
- OSStatus macHostError;
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- MIDIEndpointRef endpoint =
- (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
- assert(m);
- assert(endpoint);
- if (m->packet != NULL) {
- /* out of space, send the buffer and start refilling it */
- /* before we can send, maybe delay to limit data rate. OS X allows
- * 15KB/s. */
- UInt64 now = AudioGetCurrentHostTime();
- if (now < m->min_next_time) {
- usleep((useconds_t)
- ((m->min_next_time - now) * m->us_per_host_tick));
- }
- macHostError = MIDISend(portOut, endpoint, m->packetList);
- m->packet = NULL; /* indicate no data in packetList now */
- m->min_next_time = now + m->byte_count * m->host_ticks_per_byte;
- m->byte_count = 0;
- if (macHostError != noErr) goto send_packet_error;
- }
- return pmNoError;
-
+ OSStatus macHostError;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ MIDIEndpointRef endpoint =
+ (MIDIEndpointRef) (long) descriptors[midi->device_id].descriptor;
+ assert(m);
+ assert(endpoint);
+ if (m->packet != NULL) {
+ /* out of space, send the buffer and start refilling it */
+ /* before we can send, maybe delay to limit data rate. OS X allows
+ * 15KB/s. */
+ UInt64 now = AudioGetCurrentHostTime();
+ if (now < m->min_next_time) {
+ usleep((useconds_t)
+ ((m->min_next_time - now) * m->us_per_host_tick));
+ }
+ macHostError = MIDISend(portOut, endpoint, m->packetList);
+ m->packet = NULL; /* indicate no data in packetList now */
+ m->min_next_time = now + m->byte_count * m->host_ticks_per_byte;
+ m->byte_count = 0;
+ if (macHostError != noErr) goto send_packet_error;
+ }
+ return pmNoError;
+
send_packet_error:
- pm_hosterror = macHostError;
- sprintf(pm_hosterror_text,
- "Host error %ld: MIDISend() in midi_write()",
- (long) macHostError);
- return pmHostError;
+ pm_hosterror = macHostError;
+ sprintf(pm_hosterror_text,
+ "Host error %ld: MIDISend() in midi_write()",
+ (long) macHostError);
+ return pmHostError;
}
static PmError
-send_packet(PmInternal *midi, Byte *message, unsigned int messageLength,
- MIDITimeStamp timestamp)
+send_packet(PmInternal *midi, Byte *message, unsigned int messageLength,
+ MIDITimeStamp timestamp)
{
- PmError err;
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- assert(m);
-
- /* printf("add %d to packet %p len %d\n", message[0], m->packet, messageLength); */
- m->packet = MIDIPacketListAdd(m->packetList, sizeof(m->packetBuffer),
- m->packet, timestamp, messageLength,
- message);
- m->byte_count += messageLength;
- if (m->packet == NULL) {
- /* out of space, send the buffer and start refilling it */
- /* make midi->packet non-null to fool midi_write_flush into sending */
- m->packet = (MIDIPacket *) 4;
- /* timestamp is 0 because midi_write_flush ignores timestamp since
- * timestamps are already in packets. The timestamp parameter is here
- * because other API's need it. midi_write_flush can be called
- * from system-independent code that must be cross-API.
- */
- if ((err = midi_write_flush(midi, 0)) != pmNoError) return err;
- m->packet = MIDIPacketListInit(m->packetList);
- assert(m->packet); /* if this fails, it's a programming error */
- m->packet = MIDIPacketListAdd(m->packetList, sizeof(m->packetBuffer),
- m->packet, timestamp, messageLength,
- message);
- assert(m->packet); /* can't run out of space on first message */
- }
- return pmNoError;
-}
+ PmError err;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ assert(m);
+
+ /* printf("add %d to packet %p len %d\n", message[0], m->packet, messageLength); */
+ m->packet = MIDIPacketListAdd(m->packetList, sizeof(m->packetBuffer),
+ m->packet, timestamp, messageLength,
+ message);
+ m->byte_count += messageLength;
+ if (m->packet == NULL) {
+ /* out of space, send the buffer and start refilling it */
+ /* make midi->packet non-null to fool midi_write_flush into sending */
+ m->packet = (MIDIPacket *) 4;
+ /* timestamp is 0 because midi_write_flush ignores timestamp since
+ * timestamps are already in packets. The timestamp parameter is here
+ * because other API's need it. midi_write_flush can be called
+ * from system-independent code that must be cross-API.
+ */
+ if ((err = midi_write_flush(midi, 0)) != pmNoError) return err;
+ m->packet = MIDIPacketListInit(m->packetList);
+ assert(m->packet); /* if this fails, it's a programming error */
+ m->packet = MIDIPacketListAdd(m->packetList, sizeof(m->packetBuffer),
+ m->packet, timestamp, messageLength,
+ message);
+ assert(m->packet); /* can't run out of space on first message */
+ }
+ return pmNoError;
+}
static PmError
midi_write_short(PmInternal *midi, PmEvent *event)
{
- PmTimestamp when = event->timestamp;
- PmMessage what = event->message;
- MIDITimeStamp timestamp;
- UInt64 when_ns;
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- Byte message[4];
- unsigned int messageLength;
-
- if (m->packet == NULL) {
- m->packet = MIDIPacketListInit(m->packetList);
- /* this can never fail, right? failure would indicate something
- unrecoverable */
- assert(m->packet);
- }
-
- /* compute timestamp */
- if (when == 0) when = midi->now;
- /* if latency == 0, midi->now is not valid. We will just set it to zero */
- if (midi->latency == 0) when = 0;
- when_ns = ((UInt64) (when + midi->latency) * (UInt64) 1000000) + m->delta;
- timestamp = (MIDITimeStamp) AudioConvertNanosToHostTime(when_ns);
-
- message[0] = Pm_MessageStatus(what);
- message[1] = Pm_MessageData1(what);
- message[2] = Pm_MessageData2(what);
- messageLength = midi_length(what);
-
- /* make sure we go foreward in time */
- if (timestamp < m->min_next_time) timestamp = m->min_next_time;
-
- #ifdef LIMIT_RATE
- if (timestamp < m->last_time)
- timestamp = m->last_time;
+ PmTimestamp when = event->timestamp;
+ PmMessage what = event->message;
+ MIDITimeStamp timestamp;
+ UInt64 when_ns;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ Byte message[4];
+ unsigned int messageLength;
+
+ if (m->packet == NULL) {
+ m->packet = MIDIPacketListInit(m->packetList);
+ /* this can never fail, right? failure would indicate something
+ unrecoverable */
+ assert(m->packet);
+ }
+
+ /* compute timestamp */
+ if (when == 0) when = midi->now;
+ /* if latency == 0, midi->now is not valid. We will just set it to zero */
+ if (midi->latency == 0) when = 0;
+ when_ns = ((UInt64) (when + midi->latency) * (UInt64) 1000000) + m->delta;
+ timestamp = (MIDITimeStamp) AudioConvertNanosToHostTime(when_ns);
+
+ message[0] = Pm_MessageStatus(what);
+ message[1] = Pm_MessageData1(what);
+ message[2] = Pm_MessageData2(what);
+ messageLength = midi_length(what);
+
+ /* make sure we go foreward in time */
+ if (timestamp < m->min_next_time) timestamp = m->min_next_time;
+
+ #ifdef LIMIT_RATE
+ if (timestamp < m->last_time)
+ timestamp = m->last_time;
m->last_time = timestamp + messageLength * m->host_ticks_per_byte;
- #endif
+ #endif
- /* Add this message to the packet list */
- return send_packet(midi, message, messageLength, timestamp);
+ /* Add this message to the packet list */
+ return send_packet(midi, message, messageLength, timestamp);
}
-static PmError
+static PmError
midi_begin_sysex(PmInternal *midi, PmTimestamp when)
{
- UInt64 when_ns;
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- assert(m);
- m->sysex_byte_count = 0;
-
- /* compute timestamp */
- if (when == 0) when = midi->now;
- /* if latency == 0, midi->now is not valid. We will just set it to zero */
- if (midi->latency == 0) when = 0;
- when_ns = ((UInt64) (when + midi->latency) * (UInt64) 1000000) + m->delta;
- m->sysex_timestamp = (MIDITimeStamp) AudioConvertNanosToHostTime(when_ns);
-
- if (m->packet == NULL) {
- m->packet = MIDIPacketListInit(m->packetList);
- /* this can never fail, right? failure would indicate something
- unrecoverable */
- assert(m->packet);
- }
- return pmNoError;
+ UInt64 when_ns;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ assert(m);
+ m->sysex_byte_count = 0;
+
+ /* compute timestamp */
+ if (when == 0) when = midi->now;
+ /* if latency == 0, midi->now is not valid. We will just set it to zero */
+ if (midi->latency == 0) when = 0;
+ when_ns = ((UInt64) (when + midi->latency) * (UInt64) 1000000) + m->delta;
+ m->sysex_timestamp = (MIDITimeStamp) AudioConvertNanosToHostTime(when_ns);
+
+ if (m->packet == NULL) {
+ m->packet = MIDIPacketListInit(m->packetList);
+ /* this can never fail, right? failure would indicate something
+ unrecoverable */
+ assert(m->packet);
+ }
+ return pmNoError;
}
static PmError
midi_end_sysex(PmInternal *midi, PmTimestamp when)
{
- PmError err;
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- assert(m);
-
- /* make sure we go foreward in time */
- if (m->sysex_timestamp < m->min_next_time)
- m->sysex_timestamp = m->min_next_time;
-
- #ifdef LIMIT_RATE
- if (m->sysex_timestamp < m->last_time)
- m->sysex_timestamp = m->last_time;
- m->last_time = m->sysex_timestamp + m->sysex_byte_count *
- m->host_ticks_per_byte;
- #endif
-
- /* now send what's in the buffer */
- err = send_packet(midi, m->sysex_buffer, m->sysex_byte_count,
- m->sysex_timestamp);
- m->sysex_byte_count = 0;
- if (err != pmNoError) {
- m->packet = NULL; /* flush everything in the packet list */
- return err;
- }
- return pmNoError;
+ PmError err;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ assert(m);
+
+ /* make sure we go foreward in time */
+ if (m->sysex_timestamp < m->min_next_time)
+ m->sysex_timestamp = m->min_next_time;
+
+ #ifdef LIMIT_RATE
+ if (m->sysex_timestamp < m->last_time)
+ m->sysex_timestamp = m->last_time;
+ m->last_time = m->sysex_timestamp + m->sysex_byte_count *
+ m->host_ticks_per_byte;
+ #endif
+
+ /* now send what's in the buffer */
+ err = send_packet(midi, m->sysex_buffer, m->sysex_byte_count,
+ m->sysex_timestamp);
+ m->sysex_byte_count = 0;
+ if (err != pmNoError) {
+ m->packet = NULL; /* flush everything in the packet list */
+ return err;
+ }
+ return pmNoError;
}
static PmError
midi_write_byte(PmInternal *midi, unsigned char byte, PmTimestamp timestamp)
{
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- assert(m);
- if (m->sysex_byte_count >= SYSEX_BUFFER_SIZE) {
- PmError err = midi_end_sysex(midi, timestamp);
- if (err != pmNoError) return err;
- }
- m->sysex_buffer[m->sysex_byte_count++] = byte;
- return pmNoError;
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ assert(m);
+ if (m->sysex_byte_count >= SYSEX_BUFFER_SIZE) {
+ PmError err = midi_end_sysex(midi, timestamp);
+ if (err != pmNoError) return err;
+ }
+ m->sysex_buffer[m->sysex_byte_count++] = byte;
+ return pmNoError;
}
static PmError
midi_write_realtime(PmInternal *midi, PmEvent *event)
{
- /* to send a realtime message during a sysex message, first
- flush all pending sysex bytes into packet list */
- PmError err = midi_end_sysex(midi, 0);
- if (err != pmNoError) return err;
- /* then we can just do a normal midi_write_short */
- return midi_write_short(midi, event);
+ /* to send a realtime message during a sysex message, first
+ flush all pending sysex bytes into packet list */
+ PmError err = midi_end_sysex(midi, 0);
+ if (err != pmNoError) return err;
+ /* then we can just do a normal midi_write_short */
+ return midi_write_short(midi, event);
}
static unsigned int midi_has_host_error(PmInternal *midi)
{
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- return (m->callback_error[0] != 0) || (m->error[0] != 0);
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ return (m->callback_error[0] != 0) || (m->error[0] != 0);
}
static void midi_get_host_error(PmInternal *midi, char *msg, unsigned int len)
{
- midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
- msg[0] = 0; /* initialize to empty string */
- if (m) { /* make sure there is an open device to examine */
- if (m->error[0]) {
- strncpy(msg, m->error, len);
- m->error[0] = 0; /* clear the error */
- } else if (m->callback_error[0]) {
- strncpy(msg, m->callback_error, len);
- m->callback_error[0] = 0; /* clear the error */
- }
- msg[len - 1] = 0; /* make sure string is terminated */
- }
+ midi_macosxcm_type m = (midi_macosxcm_type) midi->descriptor;
+ msg[0] = 0; /* initialize to empty string */
+ if (m) { /* make sure there is an open device to examine */
+ if (m->error[0]) {
+ strncpy(msg, m->error, len);
+ m->error[0] = 0; /* clear the error */
+ } else if (m->callback_error[0]) {
+ strncpy(msg, m->callback_error, len);
+ m->callback_error[0] = 0; /* clear the error */
+ }
+ msg[len - 1] = 0; /* make sure string is terminated */
+ }
}
MIDITimeStamp timestamp_pm_to_cm(PmTimestamp timestamp)
{
- UInt64 nanos;
- if (timestamp <= 0) {
- return (MIDITimeStamp)0;
- } else {
- nanos = (UInt64)timestamp * (UInt64)1000000;
- return (MIDITimeStamp)AudioConvertNanosToHostTime(nanos);
- }
+ UInt64 nanos;
+ if (timestamp <= 0) {
+ return (MIDITimeStamp)0;
+ } else {
+ nanos = (UInt64)timestamp * (UInt64)1000000;
+ return (MIDITimeStamp)AudioConvertNanosToHostTime(nanos);
+ }
}
PmTimestamp timestamp_cm_to_pm(MIDITimeStamp timestamp)
{
- UInt64 nanos;
- nanos = AudioConvertHostTimeToNanos(timestamp);
- return (PmTimestamp)(nanos / (UInt64)1000000);
+ UInt64 nanos;
+ nanos = AudioConvertHostTimeToNanos(timestamp);
+ return (PmTimestamp)(nanos / (UInt64)1000000);
}
@@ -710,70 +710,70 @@ PmTimestamp timestamp_cm_to_pm(MIDITimeStamp timestamp)
// The result should be released by the caller.
CFStringRef EndpointName(MIDIEndpointRef endpoint, bool isExternal)
{
- CFMutableStringRef result = CFStringCreateMutable(NULL, 0);
- CFStringRef str;
-
- // begin with the endpoint's name
- str = NULL;
- MIDIObjectGetStringProperty(endpoint, kMIDIPropertyName, &str);
- if (str != NULL) {
- CFStringAppend(result, str);
- CFRelease(str);
- }
-
- MIDIEntityRef entity = NULL_REF;
- MIDIEndpointGetEntity(endpoint, &entity);
- if (entity == NULL_REF)
- // probably virtual
- return result;
-
- if (CFStringGetLength(result) == 0) {
- // endpoint name has zero length -- try the entity
- str = NULL;
- MIDIObjectGetStringProperty(entity, kMIDIPropertyName, &str);
- if (str != NULL) {
- CFStringAppend(result, str);
- CFRelease(str);
- }
- }
- // now consider the device's name
- MIDIDeviceRef device = NULL_REF;
- MIDIEntityGetDevice(entity, &device);
- if (device == NULL_REF)
- return result;
-
- str = NULL;
- MIDIObjectGetStringProperty(device, kMIDIPropertyName, &str);
- if (CFStringGetLength(result) == 0) {
- CFRelease(result);
- return str;
- }
- if (str != NULL) {
- // if an external device has only one entity, throw away
- // the endpoint name and just use the device name
- if (isExternal && MIDIDeviceGetNumberOfEntities(device) < 2) {
- CFRelease(result);
- return str;
- } else {
- if (CFStringGetLength(str) == 0) {
- CFRelease(str);
- return result;
- }
- // does the entity name already start with the device name?
- // (some drivers do this though they shouldn't)
- // if so, do not prepend
- if (CFStringCompareWithOptions( result, /* endpoint name */
- str /* device name */,
- CFRangeMake(0, CFStringGetLength(str)), 0) != kCFCompareEqualTo) {
- // prepend the device name to the entity name
- if (CFStringGetLength(result) > 0)
- CFStringInsert(result, 0, CFSTR(" "));
- CFStringInsert(result, 0, str);
- }
- CFRelease(str);
- }
- }
- return result;
+ CFMutableStringRef result = CFStringCreateMutable(NULL, 0);
+ CFStringRef str;
+
+ // begin with the endpoint's name
+ str = NULL;
+ MIDIObjectGetStringProperty(endpoint, kMIDIPropertyName, &str);
+ if (str != NULL) {
+ CFStringAppend(result, str);
+ CFRelease(str);
+ }
+
+ MIDIEntityRef entity = NULL_REF;
+ MIDIEndpointGetEntity(endpoint, &entity);
+ if (entity == NULL_REF)
+ // probably virtual
+ return result;
+
+ if (CFStringGetLength(result) == 0) {
+ // endpoint name has zero length -- try the entity
+ str = NULL;
+ MIDIObjectGetStringProperty(entity, kMIDIPropertyName, &str);
+ if (str != NULL) {
+ CFStringAppend(result, str);
+ CFRelease(str);
+ }
+ }
+ // now consider the device's name
+ MIDIDeviceRef device = NULL_REF;
+ MIDIEntityGetDevice(entity, &device);
+ if (device == NULL_REF)
+ return result;
+
+ str = NULL;
+ MIDIObjectGetStringProperty(device, kMIDIPropertyName, &str);
+ if (CFStringGetLength(result) == 0) {
+ CFRelease(result);
+ return str;
+ }
+ if (str != NULL) {
+ // if an external device has only one entity, throw away
+ // the endpoint name and just use the device name
+ if (isExternal && MIDIDeviceGetNumberOfEntities(device) < 2) {
+ CFRelease(result);
+ return str;
+ } else {
+ if (CFStringGetLength(str) == 0) {
+ CFRelease(str);
+ return result;
+ }
+ // does the entity name already start with the device name?
+ // (some drivers do this though they shouldn't)
+ // if so, do not prepend
+ if (CFStringCompareWithOptions( result, /* endpoint name */
+ str /* device name */,
+ CFRangeMake(0, CFStringGetLength(str)), 0) != kCFCompareEqualTo) {
+ // prepend the device name to the entity name
+ if (CFStringGetLength(result) > 0)
+ CFStringInsert(result, 0, CFSTR(" "));
+ CFStringInsert(result, 0, str);
+ }
+ CFRelease(str);
+ }
+ }
+ return result;
}
@@ -781,230 +781,230 @@ CFStringRef EndpointName(MIDIEndpointRef endpoint, bool isExternal)
// The result should be released by the caller.
static CFStringRef ConnectedEndpointName(MIDIEndpointRef endpoint)
{
- CFMutableStringRef result = CFStringCreateMutable(NULL, 0);
- CFStringRef str;
- OSStatus err;
- long i;
-
- // Does the endpoint have connections?
- CFDataRef connections = NULL;
- long nConnected = 0;
- bool anyStrings = false;
- err = MIDIObjectGetDataProperty(endpoint, kMIDIPropertyConnectionUniqueID, &connections);
- if (connections != NULL) {
- // It has connections, follow them
- // Concatenate the names of all connected devices
- nConnected = CFDataGetLength(connections) / (int32_t) sizeof(MIDIUniqueID);
- if (nConnected) {
- const SInt32 *pid = (const SInt32 *)(CFDataGetBytePtr(connections));
- for (i = 0; i < nConnected; ++i, ++pid) {
- MIDIUniqueID id = EndianS32_BtoN(*pid);
- MIDIObjectRef connObject;
- MIDIObjectType connObjectType;
- err = MIDIObjectFindByUniqueID(id, &connObject, &connObjectType);
- if (err == noErr) {
- if (connObjectType == kMIDIObjectType_ExternalSource ||
- connObjectType == kMIDIObjectType_ExternalDestination) {
- // Connected to an external device's endpoint (10.3 and later).
- str = EndpointName((MIDIEndpointRef)(connObject), true);
- } else {
- // Connected to an external device (10.2) (or something else, catch-all)
- str = NULL;
- MIDIObjectGetStringProperty(connObject, kMIDIPropertyName, &str);
- }
- if (str != NULL) {
- if (anyStrings)
- CFStringAppend(result, CFSTR(", "));
- else anyStrings = true;
- CFStringAppend(result, str);
- CFRelease(str);
- }
- }
- }
- }
- CFRelease(connections);
- }
- if (anyStrings)
- return result;
-
- // Here, either the endpoint had no connections, or we failed to obtain names for any of them.
- return EndpointName(endpoint, false);
+ CFMutableStringRef result = CFStringCreateMutable(NULL, 0);
+ CFStringRef str;
+ OSStatus err;
+ long i;
+
+ // Does the endpoint have connections?
+ CFDataRef connections = NULL;
+ long nConnected = 0;
+ bool anyStrings = false;
+ err = MIDIObjectGetDataProperty(endpoint, kMIDIPropertyConnectionUniqueID, &connections);
+ if (connections != NULL) {
+ // It has connections, follow them
+ // Concatenate the names of all connected devices
+ nConnected = CFDataGetLength(connections) / (int32_t) sizeof(MIDIUniqueID);
+ if (nConnected) {
+ const SInt32 *pid = (const SInt32 *)(CFDataGetBytePtr(connections));
+ for (i = 0; i < nConnected; ++i, ++pid) {
+ MIDIUniqueID id = EndianS32_BtoN(*pid);
+ MIDIObjectRef connObject;
+ MIDIObjectType connObjectType;
+ err = MIDIObjectFindByUniqueID(id, &connObject, &connObjectType);
+ if (err == noErr) {
+ if (connObjectType == kMIDIObjectType_ExternalSource ||
+ connObjectType == kMIDIObjectType_ExternalDestination) {
+ // Connected to an external device's endpoint (10.3 and later).
+ str = EndpointName((MIDIEndpointRef)(connObject), true);
+ } else {
+ // Connected to an external device (10.2) (or something else, catch-all)
+ str = NULL;
+ MIDIObjectGetStringProperty(connObject, kMIDIPropertyName, &str);
+ }
+ if (str != NULL) {
+ if (anyStrings)
+ CFStringAppend(result, CFSTR(", "));
+ else anyStrings = true;
+ CFStringAppend(result, str);
+ CFRelease(str);
+ }
+ }
+ }
+ }
+ CFRelease(connections);
+ }
+ if (anyStrings)
+ return result;
+
+ // Here, either the endpoint had no connections, or we failed to obtain names for any of them.
+ return EndpointName(endpoint, false);
}
char* cm_get_full_endpoint_name(MIDIEndpointRef endpoint)
{
#ifdef OLDCODE
- MIDIEntityRef entity;
- MIDIDeviceRef device;
+ MIDIEntityRef entity;
+ MIDIDeviceRef device;
- CFStringRef endpointName = NULL;
- CFStringRef deviceName = NULL;
+ CFStringRef endpointName = NULL;
+ CFStringRef deviceName = NULL;
#endif
- CFStringRef fullName = NULL;
- CFStringEncoding defaultEncoding;
- char* newName;
+ CFStringRef fullName = NULL;
+ CFStringEncoding defaultEncoding;
+ char* newName;
+
+ /* get the default string encoding */
+ defaultEncoding = CFStringGetSystemEncoding();
- /* get the default string encoding */
- defaultEncoding = CFStringGetSystemEncoding();
+ fullName = ConnectedEndpointName(endpoint);
- fullName = ConnectedEndpointName(endpoint);
-
#ifdef OLDCODE
- /* get the entity and device info */
- MIDIEndpointGetEntity(endpoint, &entity);
- MIDIEntityGetDevice(entity, &device);
-
- /* create the nicely formated name */
- MIDIObjectGetStringProperty(endpoint, kMIDIPropertyName, &endpointName);
- MIDIObjectGetStringProperty(device, kMIDIPropertyName, &deviceName);
- if (deviceName != NULL) {
- fullName = CFStringCreateWithFormat(NULL, NULL, CFSTR("%@: %@"),
- deviceName, endpointName);
- } else {
- fullName = endpointName;
- }
-#endif
- /* copy the string into our buffer */
- newName = (char *) malloc(CFStringGetLength(fullName) + 1);
- CFStringGetCString(fullName, newName, CFStringGetLength(fullName) + 1,
- defaultEncoding);
-
- /* clean up */
+ /* get the entity and device info */
+ MIDIEndpointGetEntity(endpoint, &entity);
+ MIDIEntityGetDevice(entity, &device);
+
+ /* create the nicely formated name */
+ MIDIObjectGetStringProperty(endpoint, kMIDIPropertyName, &endpointName);
+ MIDIObjectGetStringProperty(device, kMIDIPropertyName, &deviceName);
+ if (deviceName != NULL) {
+ fullName = CFStringCreateWithFormat(NULL, NULL, CFSTR("%@: %@"),
+ deviceName, endpointName);
+ } else {
+ fullName = endpointName;
+ }
+#endif
+ /* copy the string into our buffer */
+ newName = (char *) malloc(CFStringGetLength(fullName) + 1);
+ CFStringGetCString(fullName, newName, CFStringGetLength(fullName) + 1,
+ defaultEncoding);
+
+ /* clean up */
#ifdef OLDCODE
- if (endpointName) CFRelease(endpointName);
- if (deviceName) CFRelease(deviceName);
+ if (endpointName) CFRelease(endpointName);
+ if (deviceName) CFRelease(deviceName);
#endif
- if (fullName) CFRelease(fullName);
+ if (fullName) CFRelease(fullName);
- return newName;
+ return newName;
}
-
+
pm_fns_node pm_macosx_in_dictionary = {
- none_write_short,
- none_sysex,
- none_sysex,
- none_write_byte,
- none_write_short,
- none_write_flush,
- none_synchronize,
- midi_in_open,
- midi_abort,
- midi_in_close,
- success_poll,
- midi_has_host_error,
- midi_get_host_error,
+ none_write_short,
+ none_sysex,
+ none_sysex,
+ none_write_byte,
+ none_write_short,
+ none_write_flush,
+ none_synchronize,
+ midi_in_open,
+ midi_abort,
+ midi_in_close,
+ success_poll,
+ midi_has_host_error,
+ midi_get_host_error,
};
pm_fns_node pm_macosx_out_dictionary = {
- midi_write_short,
- midi_begin_sysex,
- midi_end_sysex,
- midi_write_byte,
- midi_write_realtime,
- midi_write_flush,
- midi_synchronize,
- midi_out_open,
- midi_abort,
- midi_out_close,
- success_poll,
- midi_has_host_error,
- midi_get_host_error,
+ midi_write_short,
+ midi_begin_sysex,
+ midi_end_sysex,
+ midi_write_byte,
+ midi_write_realtime,
+ midi_write_flush,
+ midi_synchronize,
+ midi_out_open,
+ midi_abort,
+ midi_out_close,
+ success_poll,
+ midi_has_host_error,
+ midi_get_host_error,
};
PmError pm_macosxcm_init(void)
{
- ItemCount numInputs, numOutputs, numDevices;
- MIDIEndpointRef endpoint;
- int i;
- OSStatus macHostError;
- char *error_text;
-
- /* Determine the number of MIDI devices on the system */
- numDevices = MIDIGetNumberOfDevices();
- numInputs = MIDIGetNumberOfSources();
- numOutputs = MIDIGetNumberOfDestinations();
-
- /* Return prematurely if no devices exist on the system
- Note that this is not an error. There may be no devices.
- Pm_CountDevices() will return zero, which is correct and
- useful information
- */
- if (numDevices <= 0) {
- return pmNoError;
- }
-
-
- /* Initialize the client handle */
- macHostError = MIDIClientCreate(CFSTR("PortMidi"), NULL, NULL, &client);
- if (macHostError != noErr) {
- error_text = (char *)"MIDIClientCreate() in pm_macosxcm_init()";
- goto error_return;
- }
-
- /* Create the input port */
- macHostError = MIDIInputPortCreate(client, CFSTR("Input port"), readProc,
- NULL, &portIn);
- if (macHostError != noErr) {
- error_text = (char *)"MIDIInputPortCreate() in pm_macosxcm_init()";
- goto error_return;
- }
-
- /* Create the output port */
- macHostError = MIDIOutputPortCreate(client, CFSTR("Output port"), &portOut);
- if (macHostError != noErr) {
- error_text = (char *)"MIDIOutputPortCreate() in pm_macosxcm_init()";
- goto error_return;
- }
-
- /* Iterate over the MIDI input devices */
- for (i = 0; i < numInputs; i++) {
- endpoint = MIDIGetSource(i);
- if (endpoint == NULL_REF) {
- continue;
- }
-
- /* set the first input we see to the default */
- if (pm_default_input_device_id == -1)
- pm_default_input_device_id = pm_descriptor_index;
-
- /* Register this device with PortMidi */
- pm_add_device((char *)"CoreMIDI", cm_get_full_endpoint_name(endpoint),
- TRUE, (void *) (long) endpoint, &pm_macosx_in_dictionary);
- }
-
- /* Iterate over the MIDI output devices */
- for (i = 0; i < numOutputs; i++) {
- endpoint = MIDIGetDestination(i);
- if (endpoint == NULL_REF) {
- continue;
- }
-
- /* set the first output we see to the default */
- if (pm_default_output_device_id == -1)
- pm_default_output_device_id = pm_descriptor_index;
-
- /* Register this device with PortMidi */
- pm_add_device((char *)"CoreMIDI", cm_get_full_endpoint_name(endpoint),
- FALSE, (void *) (long) endpoint,
- &pm_macosx_out_dictionary);
- }
- return pmNoError;
-
+ ItemCount numInputs, numOutputs, numDevices;
+ MIDIEndpointRef endpoint;
+ int i;
+ OSStatus macHostError;
+ char *error_text;
+
+ /* Determine the number of MIDI devices on the system */
+ numDevices = MIDIGetNumberOfDevices();
+ numInputs = MIDIGetNumberOfSources();
+ numOutputs = MIDIGetNumberOfDestinations();
+
+ /* Return prematurely if no devices exist on the system
+ Note that this is not an error. There may be no devices.
+ Pm_CountDevices() will return zero, which is correct and
+ useful information
+ */
+ if (numDevices <= 0) {
+ return pmNoError;
+ }
+
+
+ /* Initialize the client handle */
+ macHostError = MIDIClientCreate(CFSTR("PortMidi"), NULL, NULL, &client);
+ if (macHostError != noErr) {
+ error_text = (char *)"MIDIClientCreate() in pm_macosxcm_init()";
+ goto error_return;
+ }
+
+ /* Create the input port */
+ macHostError = MIDIInputPortCreate(client, CFSTR("Input port"), readProc,
+ NULL, &portIn);
+ if (macHostError != noErr) {
+ error_text = (char *)"MIDIInputPortCreate() in pm_macosxcm_init()";
+ goto error_return;
+ }
+
+ /* Create the output port */
+ macHostError = MIDIOutputPortCreate(client, CFSTR("Output port"), &portOut);
+ if (macHostError != noErr) {
+ error_text = (char *)"MIDIOutputPortCreate() in pm_macosxcm_init()";
+ goto error_return;
+ }
+
+ /* Iterate over the MIDI input devices */
+ for (i = 0; i < numInputs; i++) {
+ endpoint = MIDIGetSource(i);
+ if (endpoint == NULL_REF) {
+ continue;
+ }
+
+ /* set the first input we see to the default */
+ if (pm_default_input_device_id == -1)
+ pm_default_input_device_id = pm_descriptor_index;
+
+ /* Register this device with PortMidi */
+ pm_add_device((char *)"CoreMIDI", cm_get_full_endpoint_name(endpoint),
+ TRUE, (void *) (long) endpoint, &pm_macosx_in_dictionary);
+ }
+
+ /* Iterate over the MIDI output devices */
+ for (i = 0; i < numOutputs; i++) {
+ endpoint = MIDIGetDestination(i);
+ if (endpoint == NULL_REF) {
+ continue;
+ }
+
+ /* set the first output we see to the default */
+ if (pm_default_output_device_id == -1)
+ pm_default_output_device_id = pm_descriptor_index;
+
+ /* Register this device with PortMidi */
+ pm_add_device((char *)"CoreMIDI", cm_get_full_endpoint_name(endpoint),
+ FALSE, (void *) (long) endpoint,
+ &pm_macosx_out_dictionary);
+ }
+ return pmNoError;
+
error_return:
- pm_hosterror = macHostError;
- sprintf(pm_hosterror_text, "Host error %ld: %s\n", (long) macHostError,
- error_text);
- pm_macosxcm_term(); /* clear out any opened ports */
- return pmHostError;
+ pm_hosterror = macHostError;
+ sprintf(pm_hosterror_text, "Host error %ld: %s\n", (long) macHostError,
+ error_text);
+ pm_macosxcm_term(); /* clear out any opened ports */
+ return pmHostError;
}
void pm_macosxcm_term(void)
{
- if (client != NULL_REF) MIDIClientDispose(client);
- if (portIn != NULL_REF) MIDIPortDispose(portIn);
- if (portOut != NULL_REF) MIDIPortDispose(portOut);
+ if (client != NULL_REF) MIDIClientDispose(client);
+ if (portIn != NULL_REF) MIDIPortDispose(portIn);
+ if (portOut != NULL_REF) MIDIPortDispose(portOut);
}
diff --git a/src/lib/portmidi/pmutil.c b/src/lib/portmidi/pmutil.c
index 7d0abe35337..0b00a35d8fb 100644
--- a/src/lib/portmidi/pmutil.c
+++ b/src/lib/portmidi/pmutil.c
@@ -18,267 +18,266 @@
#endif
typedef struct {
- long head;
- long tail;
- long len;
- long overflow;
- int32_t msg_size; /* number of int32_t in a message including extra word */
- int32_t peek_overflow;
- int32_t *buffer;
- int32_t *peek;
- int32_t peek_flag;
+ long head;
+ long tail;
+ long len;
+ long overflow;
+ int32_t msg_size; /* number of int32_t in a message including extra word */
+ int32_t peek_overflow;
+ int32_t *buffer;
+ int32_t *peek;
+ int32_t peek_flag;
} PmQueueRep;
PMEXPORT PmQueue *Pm_QueueCreate(long num_msgs, int32_t bytes_per_msg)
{
- int32_t int32s_per_msg =
- (int32_t) (((bytes_per_msg + sizeof(int32_t) - 1) &
- ~(sizeof(int32_t) - 1)) / sizeof(int32_t));
- PmQueueRep *queue = (PmQueueRep *) pm_alloc(sizeof(PmQueueRep));
- if (!queue) /* memory allocation failed */
- return NULL;
+ int32_t int32s_per_msg =
+ (int32_t) (((bytes_per_msg + sizeof(int32_t) - 1) &
+ ~(sizeof(int32_t) - 1)) / sizeof(int32_t));
+ PmQueueRep *queue = (PmQueueRep *) pm_alloc(sizeof(PmQueueRep));
+ if (!queue) /* memory allocation failed */
+ return NULL;
- /* need extra word per message for non-zero encoding */
- queue->len = num_msgs * (int32s_per_msg + 1);
- queue->buffer = (int32_t *) pm_alloc(queue->len * sizeof(int32_t));
- bzero(queue->buffer, queue->len * sizeof(int32_t));
- if (!queue->buffer) {
- pm_free(queue);
- return NULL;
- } else { /* allocate the "peek" buffer */
- queue->peek = (int32_t *) pm_alloc(int32s_per_msg * sizeof(int32_t));
- if (!queue->peek) {
- /* free everything allocated so far and return */
- pm_free(queue->buffer);
- pm_free(queue);
- return NULL;
- }
- }
- bzero(queue->buffer, queue->len * sizeof(int32_t));
- queue->head = 0;
- queue->tail = 0;
- /* msg_size is in words */
- queue->msg_size = int32s_per_msg + 1; /* note extra word is counted */
- queue->overflow = FALSE;
- queue->peek_overflow = FALSE;
- queue->peek_flag = FALSE;
- return queue;
+ /* need extra word per message for non-zero encoding */
+ queue->len = num_msgs * (int32s_per_msg + 1);
+ queue->buffer = (int32_t *) pm_alloc(queue->len * sizeof(int32_t));
+ bzero(queue->buffer, queue->len * sizeof(int32_t));
+ if (!queue->buffer) {
+ pm_free(queue);
+ return NULL;
+ } else { /* allocate the "peek" buffer */
+ queue->peek = (int32_t *) pm_alloc(int32s_per_msg * sizeof(int32_t));
+ if (!queue->peek) {
+ /* free everything allocated so far and return */
+ pm_free(queue->buffer);
+ pm_free(queue);
+ return NULL;
+ }
+ }
+ bzero(queue->buffer, queue->len * sizeof(int32_t));
+ queue->head = 0;
+ queue->tail = 0;
+ /* msg_size is in words */
+ queue->msg_size = int32s_per_msg + 1; /* note extra word is counted */
+ queue->overflow = FALSE;
+ queue->peek_overflow = FALSE;
+ queue->peek_flag = FALSE;
+ return queue;
}
PMEXPORT PmError Pm_QueueDestroy(PmQueue *q)
{
- PmQueueRep *queue = (PmQueueRep *) q;
-
- /* arg checking */
- if (!queue || !queue->buffer || !queue->peek)
- return pmBadPtr;
-
- pm_free(queue->peek);
- pm_free(queue->buffer);
- pm_free(queue);
- return pmNoError;
+ PmQueueRep *queue = (PmQueueRep *) q;
+
+ /* arg checking */
+ if (!queue || !queue->buffer || !queue->peek)
+ return pmBadPtr;
+
+ pm_free(queue->peek);
+ pm_free(queue->buffer);
+ pm_free(queue);
+ return pmNoError;
}
PMEXPORT PmError Pm_Dequeue(PmQueue *q, void *msg)
{
- long head;
- PmQueueRep *queue = (PmQueueRep *) q;
- int i;
- int32_t *msg_as_int32 = (int32_t *) msg;
+ long head;
+ PmQueueRep *queue = (PmQueueRep *) q;
+ int i;
+ int32_t *msg_as_int32 = (int32_t *) msg;
- /* arg checking */
- if (!queue)
- return pmBadPtr;
- /* a previous peek operation encountered an overflow, but the overflow
- * has not yet been reported to client, so do it now. No message is
- * returned, but on the next call, we will return the peek buffer.
- */
- if (queue->peek_overflow) {
- queue->peek_overflow = FALSE;
- return pmBufferOverflow;
- }
- if (queue->peek_flag) {
- memcpy(msg, queue->peek, (queue->msg_size - 1) * sizeof(int32_t));
- queue->peek_flag = FALSE;
- return pmGotData;
- }
+ /* arg checking */
+ if (!queue)
+ return pmBadPtr;
+ /* a previous peek operation encountered an overflow, but the overflow
+ * has not yet been reported to client, so do it now. No message is
+ * returned, but on the next call, we will return the peek buffer.
+ */
+ if (queue->peek_overflow) {
+ queue->peek_overflow = FALSE;
+ return pmBufferOverflow;
+ }
+ if (queue->peek_flag) {
+ memcpy(msg, queue->peek, (queue->msg_size - 1) * sizeof(int32_t));
+ queue->peek_flag = FALSE;
+ return pmGotData;
+ }
- head = queue->head;
- /* if writer overflows, it writes queue->overflow = tail+1 so that
- * when the reader gets to that position in the buffer, it can
- * return the overflow condition to the reader. The problem is that
- * at overflow, things have wrapped around, so tail == head, and the
- * reader will detect overflow immediately instead of waiting until
- * it reads everything in the buffer, wrapping around again to the
- * point where tail == head. So the condition also checks that
- * queue->buffer[head] is zero -- if so, then the buffer is now
- * empty, and we're at the point in the msg stream where overflow
- * occurred. It's time to signal overflow to the reader. If
- * queue->buffer[head] is non-zero, there's a message there and we
- * should read all the way around the buffer before signalling overflow.
- * There is a write-order dependency here, but to fail, the overflow
- * field would have to be written while an entire buffer full of
- * writes are still pending. I'm assuming out-of-order writes are
- * possible, but not that many.
- */
- if (queue->overflow == head + 1 && !queue->buffer[head]) {
- queue->overflow = 0; /* non-overflow condition */
- return pmBufferOverflow;
- }
+ head = queue->head;
+ /* if writer overflows, it writes queue->overflow = tail+1 so that
+ * when the reader gets to that position in the buffer, it can
+ * return the overflow condition to the reader. The problem is that
+ * at overflow, things have wrapped around, so tail == head, and the
+ * reader will detect overflow immediately instead of waiting until
+ * it reads everything in the buffer, wrapping around again to the
+ * point where tail == head. So the condition also checks that
+ * queue->buffer[head] is zero -- if so, then the buffer is now
+ * empty, and we're at the point in the msg stream where overflow
+ * occurred. It's time to signal overflow to the reader. If
+ * queue->buffer[head] is non-zero, there's a message there and we
+ * should read all the way around the buffer before signalling overflow.
+ * There is a write-order dependency here, but to fail, the overflow
+ * field would have to be written while an entire buffer full of
+ * writes are still pending. I'm assuming out-of-order writes are
+ * possible, but not that many.
+ */
+ if (queue->overflow == head + 1 && !queue->buffer[head]) {
+ queue->overflow = 0; /* non-overflow condition */
+ return pmBufferOverflow;
+ }
- /* test to see if there is data in the queue -- test from back
- * to front so if writer is simultaneously writing, we don't
- * waste time discovering the write is not finished
- */
- for (i = queue->msg_size - 1; i >= 0; i--) {
- if (!queue->buffer[head + i]) {
- return pmNoData;
- }
- }
- memcpy(msg, (char *) &queue->buffer[head + 1],
- sizeof(int32_t) * (queue->msg_size - 1));
- /* fix up zeros */
- i = queue->buffer[head];
- while (i < queue->msg_size) {
- int32_t j;
- i--; /* msg does not have extra word so shift down */
- j = msg_as_int32[i];
- msg_as_int32[i] = 0;
- i = j;
- }
- /* signal that data has been removed by zeroing: */
- bzero((char *) &queue->buffer[head], sizeof(int32_t) * queue->msg_size);
+ /* test to see if there is data in the queue -- test from back
+ * to front so if writer is simultaneously writing, we don't
+ * waste time discovering the write is not finished
+ */
+ for (i = queue->msg_size - 1; i >= 0; i--) {
+ if (!queue->buffer[head + i]) {
+ return pmNoData;
+ }
+ }
+ memcpy(msg, (char *) &queue->buffer[head + 1],
+ sizeof(int32_t) * (queue->msg_size - 1));
+ /* fix up zeros */
+ i = queue->buffer[head];
+ while (i < queue->msg_size) {
+ int32_t j;
+ i--; /* msg does not have extra word so shift down */
+ j = msg_as_int32[i];
+ msg_as_int32[i] = 0;
+ i = j;
+ }
+ /* signal that data has been removed by zeroing: */
+ bzero((char *) &queue->buffer[head], sizeof(int32_t) * queue->msg_size);
- /* update head */
- head += queue->msg_size;
- if (head == queue->len) head = 0;
- queue->head = head;
- return pmGotData; /* success */
+ /* update head */
+ head += queue->msg_size;
+ if (head == queue->len) head = 0;
+ queue->head = head;
+ return pmGotData; /* success */
}
PMEXPORT PmError Pm_SetOverflow(PmQueue *q)
{
- PmQueueRep *queue = (PmQueueRep *) q;
- long tail;
- /* arg checking */
- if (!queue)
- return pmBadPtr;
- /* no more enqueue until receiver acknowledges overflow */
- if (queue->overflow) return pmBufferOverflow;
- tail = queue->tail;
- queue->overflow = tail + 1;
- return pmBufferOverflow;
+ PmQueueRep *queue = (PmQueueRep *) q;
+ long tail;
+ /* arg checking */
+ if (!queue)
+ return pmBadPtr;
+ /* no more enqueue until receiver acknowledges overflow */
+ if (queue->overflow) return pmBufferOverflow;
+ tail = queue->tail;
+ queue->overflow = tail + 1;
+ return pmBufferOverflow;
}
PMEXPORT PmError Pm_Enqueue(PmQueue *q, void *msg)
{
- PmQueueRep *queue = (PmQueueRep *) q;
- long tail;
- int i;
- int32_t *src = (int32_t *) msg;
- int32_t *ptr;
- int32_t *dest;
- int rslt;
- if (!queue)
- return pmBadPtr;
- /* no more enqueue until receiver acknowledges overflow */
- if (queue->overflow) return pmBufferOverflow;
- rslt = Pm_QueueFull(q);
- /* already checked above: if (rslt == pmBadPtr) return rslt; */
- tail = queue->tail;
- if (rslt) {
- queue->overflow = tail + 1;
- return pmBufferOverflow;
- }
+ PmQueueRep *queue = (PmQueueRep *) q;
+ long tail;
+ int i;
+ int32_t *src = (int32_t *) msg;
+ int32_t *ptr;
+ int32_t *dest;
+ int rslt;
+ if (!queue)
+ return pmBadPtr;
+ /* no more enqueue until receiver acknowledges overflow */
+ if (queue->overflow) return pmBufferOverflow;
+ rslt = Pm_QueueFull(q);
+ /* already checked above: if (rslt == pmBadPtr) return rslt; */
+ tail = queue->tail;
+ if (rslt) {
+ queue->overflow = tail + 1;
+ return pmBufferOverflow;
+ }
- /* queue is has room for message, and overflow flag is cleared */
- ptr = &queue->buffer[tail];
- dest = ptr + 1;
- for (i = 1; i < queue->msg_size; i++) {
- int32_t j = src[i - 1];
- if (!j) {
- *ptr = i;
- ptr = dest;
- } else {
- *dest = j;
- }
- dest++;
- }
- *ptr = i;
- tail += queue->msg_size;
- if (tail == queue->len) tail = 0;
- queue->tail = tail;
- return pmNoError;
+ /* queue is has room for message, and overflow flag is cleared */
+ ptr = &queue->buffer[tail];
+ dest = ptr + 1;
+ for (i = 1; i < queue->msg_size; i++) {
+ int32_t j = src[i - 1];
+ if (!j) {
+ *ptr = i;
+ ptr = dest;
+ } else {
+ *dest = j;
+ }
+ dest++;
+ }
+ *ptr = i;
+ tail += queue->msg_size;
+ if (tail == queue->len) tail = 0;
+ queue->tail = tail;
+ return pmNoError;
}
PMEXPORT int Pm_QueueEmpty(PmQueue *q)
{
- PmQueueRep *queue = (PmQueueRep *) q;
- return (!queue) || /* null pointer -> return "empty" */
- (queue->buffer[queue->head] == 0 && !queue->peek_flag);
+ PmQueueRep *queue = (PmQueueRep *) q;
+ return (!queue) || /* null pointer -> return "empty" */
+ (queue->buffer[queue->head] == 0 && !queue->peek_flag);
}
PMEXPORT int Pm_QueueFull(PmQueue *q)
{
- long tail;
- int i;
- PmQueueRep *queue = (PmQueueRep *) q;
- /* arg checking */
- if (!queue)
- return pmBadPtr;
- tail = queue->tail;
- /* test to see if there is space in the queue */
- for (i = 0; i < queue->msg_size; i++) {
- if (queue->buffer[tail + i]) {
- return TRUE;
- }
- }
- return FALSE;
+ long tail;
+ int i;
+ PmQueueRep *queue = (PmQueueRep *) q;
+ /* arg checking */
+ if (!queue)
+ return pmBadPtr;
+ tail = queue->tail;
+ /* test to see if there is space in the queue */
+ for (i = 0; i < queue->msg_size; i++) {
+ if (queue->buffer[tail + i]) {
+ return TRUE;
+ }
+ }
+ return FALSE;
}
PMEXPORT void *Pm_QueuePeek(PmQueue *q)
{
- PmError rslt;
- int32_t temp;
- PmQueueRep *queue = (PmQueueRep *) q;
- /* arg checking */
- if (!queue)
- return NULL;
+ PmError rslt;
+ int32_t temp;
+ PmQueueRep *queue = (PmQueueRep *) q;
+ /* arg checking */
+ if (!queue)
+ return NULL;
- if (queue->peek_flag) {
- return queue->peek;
- }
- /* this is ugly: if peek_overflow is set, then Pm_Dequeue()
- * returns immediately with pmBufferOverflow, but here, we
- * want Pm_Dequeue() to really check for data. If data is
- * there, we can return it
- */
- temp = queue->peek_overflow;
- queue->peek_overflow = FALSE;
- rslt = Pm_Dequeue(q, queue->peek);
- queue->peek_overflow = temp;
+ if (queue->peek_flag) {
+ return queue->peek;
+ }
+ /* this is ugly: if peek_overflow is set, then Pm_Dequeue()
+ * returns immediately with pmBufferOverflow, but here, we
+ * want Pm_Dequeue() to really check for data. If data is
+ * there, we can return it
+ */
+ temp = queue->peek_overflow;
+ queue->peek_overflow = FALSE;
+ rslt = Pm_Dequeue(q, queue->peek);
+ queue->peek_overflow = temp;
- if (rslt == 1) {
- queue->peek_flag = TRUE;
- return queue->peek;
- } else if (rslt == pmBufferOverflow) {
- /* when overflow is indicated, the queue is empty and the
- * first message that was dropped by Enqueue (signalling
- * pmBufferOverflow to its caller) would have been the next
- * message in the queue. Pm_QueuePeek will return NULL, but
- * remember that an overflow occurred. (see Pm_Dequeue)
- */
- queue->peek_overflow = TRUE;
- }
- return NULL;
+ if (rslt == 1) {
+ queue->peek_flag = TRUE;
+ return queue->peek;
+ } else if (rslt == pmBufferOverflow) {
+ /* when overflow is indicated, the queue is empty and the
+ * first message that was dropped by Enqueue (signalling
+ * pmBufferOverflow to its caller) would have been the next
+ * message in the queue. Pm_QueuePeek will return NULL, but
+ * remember that an overflow occurred. (see Pm_Dequeue)
+ */
+ queue->peek_overflow = TRUE;
+ }
+ return NULL;
}
-
diff --git a/src/lib/portmidi/pmutil.h b/src/lib/portmidi/pmutil.h
index ef5ee4bf84a..88ebf145edc 100644
--- a/src/lib/portmidi/pmutil.h
+++ b/src/lib/portmidi/pmutil.h
@@ -1,5 +1,5 @@
-/* pmutil.h -- some helpful utilities for building midi
- applications that use PortMidi
+/* pmutil.h -- some helpful utilities for building midi
+ applications that use PortMidi
*/
#ifdef __cplusplus
@@ -17,18 +17,18 @@ typedef void PmQueue;
This queue implementation uses the "light pipe" algorithm which
operates correctly even with multi-processors and out-of-order
memory writes. (see Alexander Dokumentov, "Lock-free Interprocess
- Communication," Dr. Dobbs Portal, http://www.ddj.com/,
+ Communication," Dr. Dobbs Portal, http://www.ddj.com/,
articleID=189401457, June 15, 2006. This algorithm requires
that messages be translated to a form where no words contain
zeros. Each word becomes its own "data valid" tag. Because of
- this translation, we cannot return a pointer to data still in
- the queue when the "peek" method is called. Instead, a buffer
- is preallocated so that data can be copied there. Pm_QueuePeek()
- dequeues a message into this buffer and returns a pointer to
+ this translation, we cannot return a pointer to data still in
+ the queue when the "peek" method is called. Instead, a buffer
+ is preallocated so that data can be copied there. Pm_QueuePeek()
+ dequeues a message into this buffer and returns a pointer to
it. A subsequent Pm_Dequeue() will copy from this buffer.
This implementation does not try to keep reader/writer data in
- separate cache lines or prevent thrashing on cache lines.
+ separate cache lines or prevent thrashing on cache lines.
However, this algorithm differs by doing inserts/removals in
units of messages rather than units of machine words. Some
performance improvement might be obtained by not clearing data
@@ -40,20 +40,20 @@ typedef void PmQueue;
an overflow, the sender writes the current tail position to a field.
The receiver must acknowlege receipt by zeroing the field. The sender
will not send more until the field is zeroed.
-
+
Pm_QueueDestroy() destroys the queue and frees its storage.
*/
PMEXPORT PmQueue *Pm_QueueCreate(long num_msgs, int32_t bytes_per_msg);
PMEXPORT PmError Pm_QueueDestroy(PmQueue *queue);
-/*
+/*
Pm_Dequeue() removes one item from the queue, copying it into msg.
Returns 1 if successful, and 0 if the queue is empty.
Returns pmBufferOverflow if what would have been the next thing
in the queue was dropped due to overflow. (So when overflow occurs,
the receiver can receive a queue full of messages before getting the
- overflow report. This protocol ensures that the reader will be
+ overflow report. This protocol ensures that the reader will be
notified when data is lost due to overflow.
*/
PMEXPORT PmError Pm_Dequeue(PmQueue *queue, void *msg);
@@ -61,7 +61,7 @@ PMEXPORT PmError Pm_Dequeue(PmQueue *queue, void *msg);
/*
Pm_Enqueue() inserts one item into the queue, copying it from msg.
- Returns pmNoError if successful and pmBufferOverflow if the queue was
+ Returns pmNoError if successful and pmBufferOverflow if the queue was
already full. If pmBufferOverflow is returned, the overflow flag is set.
*/
PMEXPORT PmError Pm_Enqueue(PmQueue *queue, void *msg);
@@ -73,11 +73,11 @@ PMEXPORT PmError Pm_Enqueue(PmQueue *queue, void *msg);
Either condition may change immediately because a parallel
enqueue or dequeue operation could be in progress. Furthermore,
- Pm_QueueEmpty() is optimistic: it may say false, when due to
+ Pm_QueueEmpty() is optimistic: it may say false, when due to
out-of-order writes, the full message has not arrived. Therefore,
Pm_Dequeue() could still return 0 after Pm_QueueEmpty() returns
false. On the other hand, Pm_QueueFull() is pessimistic: if it
- returns false, then Pm_Enqueue() is guaranteed to succeed.
+ returns false, then Pm_Enqueue() is guaranteed to succeed.
Error conditions: Pm_QueueFull() returns pmBadPtr if queue is NULL.
Pm_QueueEmpty() returns FALSE if queue is NULL.
@@ -91,12 +91,12 @@ PMEXPORT int Pm_QueueEmpty(PmQueue *queue);
or NULL if the queue is empty. The item is not removed from the queue.
Pm_QueuePeek() will not indicate when an overflow occurs. If you want
to get and check pmBufferOverflow messages, use the return value of
- Pm_QueuePeek() *only* as an indication that you should call
+ Pm_QueuePeek() *only* as an indication that you should call
Pm_Dequeue(). At the point where a direct call to Pm_Dequeue() would
return pmBufferOverflow, Pm_QueuePeek() will return NULL but internally
clear the pmBufferOverflow flag, enabling Pm_Enqueue() to resume
enqueuing messages. A subsequent call to Pm_QueuePeek()
- will return a pointer to the first message *after* the overflow.
+ will return a pointer to the first message *after* the overflow.
Using this as an indication to call Pm_Dequeue(), the first call
to Pm_Dequeue() will return pmBufferOverflow. The second call will
return success, copying the same message pointed to by the previous
@@ -106,14 +106,14 @@ PMEXPORT int Pm_QueueEmpty(PmQueue *queue);
data to decide who should be called to receive it. (2) when you need
to know a message is ready but cannot accept the message.
- Note that Pm_QueuePeek() is not a fast check, so if possible, you
+ Note that Pm_QueuePeek() is not a fast check, so if possible, you
might as well just call Pm_Dequeue() and accept the data if it is there.
*/
PMEXPORT void *Pm_QueuePeek(PmQueue *queue);
/*
Pm_SetOverflow() allows the writer (enqueuer) to signal an overflow
- condition to the reader (dequeuer). E.g. when transfering data from
+ condition to the reader (dequeuer). E.g. when transfering data from
the OS to an application, if the OS indicates a buffer overrun,
Pm_SetOverflow() can be used to insure that the reader receives a
pmBufferOverflow result from Pm_Dequeue(). Returns pmBadPtr if queue
diff --git a/src/lib/portmidi/pmwin.c b/src/lib/portmidi/pmwin.c
index a57ed878df6..c797682269b 100644
--- a/src/lib/portmidi/pmwin.c
+++ b/src/lib/portmidi/pmwin.c
@@ -1,7 +1,7 @@
/* pmwin.c -- PortMidi os-dependent code */
/* This file only needs to implement:
- pm_init(), which calls various routines to register the
+ pm_init(), which calls various routines to register the
available midi devices,
Pm_GetDefaultInputDeviceID(), and
Pm_GetDefaultOutputDeviceID().
@@ -28,16 +28,16 @@
If DEBUG is on, we prompt for input to avoid losing error messages.
*/
static void pm_exit(void) {
- pm_term();
+ pm_term();
#ifdef DEBUG
#define STRING_MAX 80
- {
- char line[STRING_MAX];
- printf("Type ENTER...\n");
- /* note, w/o this prompting, client console application can not see one
- of its errors before closing. */
- fgets(line, STRING_MAX, stdin);
- }
+ {
+ char line[STRING_MAX];
+ printf("Type ENTER...\n");
+ /* note, w/o this prompting, client console application can not see one
+ of its errors before closing. */
+ fgets(line, STRING_MAX, stdin);
+ }
#endif
}
@@ -45,100 +45,98 @@ static void pm_exit(void) {
/* pm_init is the windows-dependent initialization.*/
void pm_init(void)
{
- atexit(pm_exit);
+ atexit(pm_exit);
#ifdef DEBUG
- printf("registered pm_exit with atexit()\n");
+ printf("registered pm_exit with atexit()\n");
#endif
- pm_winmm_init();
- /* initialize other APIs (DirectX?) here */
+ pm_winmm_init();
+ /* initialize other APIs (DirectX?) here */
}
void pm_term(void) {
- pm_winmm_term();
+ pm_winmm_term();
}
static PmDeviceID pm_get_default_device_id(int is_input, char *key) {
- HKEY hkey;
+ HKEY hkey;
#define PATTERN_MAX 256
- char pattern[PATTERN_MAX];
- DWORD pattern_max = PATTERN_MAX;
- DWORD dwType;
- /* Find first input or device -- this is the default. */
- PmDeviceID id = pmNoDevice;
- int i, j;
- Pm_Initialize(); /* make sure descriptors exist! */
- for (i = 0; i < pm_descriptor_index; i++) {
- if (descriptors[i].pub.input == is_input) {
- id = i;
- break;
- }
- }
- /* Look in registry for a default device name pattern. */
- if (RegOpenKeyExA(HKEY_CURRENT_USER, "Software", 0, KEY_READ, &hkey) !=
- ERROR_SUCCESS) {
- return id;
- }
- if (RegOpenKeyExA(hkey, "JavaSoft", 0, KEY_READ, &hkey) !=
- ERROR_SUCCESS) {
- return id;
- }
- if (RegOpenKeyExA(hkey, "Prefs", 0, KEY_READ, &hkey) !=
- ERROR_SUCCESS) {
- return id;
- }
- if (RegOpenKeyExA(hkey, "/Port/Midi", 0, KEY_READ, &hkey) !=
- ERROR_SUCCESS) {
- return id;
- }
- if (RegQueryValueExA(hkey, key, NULL, &dwType, (BYTE *)pattern, &pattern_max) !=
+ char pattern[PATTERN_MAX];
+ DWORD pattern_max = PATTERN_MAX;
+ DWORD dwType;
+ /* Find first input or device -- this is the default. */
+ PmDeviceID id = pmNoDevice;
+ int i, j;
+ Pm_Initialize(); /* make sure descriptors exist! */
+ for (i = 0; i < pm_descriptor_index; i++) {
+ if (descriptors[i].pub.input == is_input) {
+ id = i;
+ break;
+ }
+ }
+ /* Look in registry for a default device name pattern. */
+ if (RegOpenKeyExA(HKEY_CURRENT_USER, "Software", 0, KEY_READ, &hkey) !=
+ ERROR_SUCCESS) {
+ return id;
+ }
+ if (RegOpenKeyExA(hkey, "JavaSoft", 0, KEY_READ, &hkey) !=
+ ERROR_SUCCESS) {
+ return id;
+ }
+ if (RegOpenKeyExA(hkey, "Prefs", 0, KEY_READ, &hkey) !=
+ ERROR_SUCCESS) {
+ return id;
+ }
+ if (RegOpenKeyExA(hkey, "/Port/Midi", 0, KEY_READ, &hkey) !=
+ ERROR_SUCCESS) {
+ return id;
+ }
+ if (RegQueryValueExA(hkey, key, NULL, &dwType, (BYTE *)pattern, &pattern_max) !=
ERROR_SUCCESS) {
- return id;
- }
-
- /* decode pattern: upper case encoded with "/" prefix */
- i = j = 0;
- while (pattern[i]) {
- if (pattern[i] == '/' && pattern[i + 1]) {
- pattern[j++] = toupper(pattern[++i]);
+ return id;
+ }
+
+ /* decode pattern: upper case encoded with "/" prefix */
+ i = j = 0;
+ while (pattern[i]) {
+ if (pattern[i] == '/' && pattern[i + 1]) {
+ pattern[j++] = toupper(pattern[++i]);
} else {
- pattern[j++] = tolower(pattern[i]);
+ pattern[j++] = tolower(pattern[i]);
+ }
+ i++;
+ }
+ pattern[j] = 0; /* end of string */
+
+ /* now pattern is the string from the registry; search for match */
+ i = pm_find_default_device(pattern, is_input);
+ if (i != pmNoDevice) {
+ id = i;
}
- i++;
- }
- pattern[j] = 0; /* end of string */
-
- /* now pattern is the string from the registry; search for match */
- i = pm_find_default_device(pattern, is_input);
- if (i != pmNoDevice) {
- id = i;
- }
- return id;
+ return id;
}
PmDeviceID Pm_GetDefaultInputDeviceID() {
- return pm_get_default_device_id(TRUE,
- (char *)"/P/M_/R/E/C/O/M/M/E/N/D/E/D_/I/N/P/U/T_/D/E/V/I/C/E");
+ return pm_get_default_device_id(TRUE,
+ (char *)"/P/M_/R/E/C/O/M/M/E/N/D/E/D_/I/N/P/U/T_/D/E/V/I/C/E");
}
PmDeviceID Pm_GetDefaultOutputDeviceID() {
- return pm_get_default_device_id(FALSE,
- (char *)"/P/M_/R/E/C/O/M/M/E/N/D/E/D_/O/U/T/P/U/T_/D/E/V/I/C/E");
+ return pm_get_default_device_id(FALSE,
+ (char *)"/P/M_/R/E/C/O/M/M/E/N/D/E/D_/O/U/T/P/U/T_/D/E/V/I/C/E");
}
-#include "stdio.h"
+#include "stdio.h"
void *pm_alloc(size_t s) {
- return malloc(s);
+ return malloc(s);
}
-void pm_free(void *ptr) {
- free(ptr);
+void pm_free(void *ptr) {
+ free(ptr);
}
-
-
diff --git a/src/lib/portmidi/pmwinmm.c b/src/lib/portmidi/pmwinmm.c
index 9921b1af8e6..af3dad8f8eb 100644
--- a/src/lib/portmidi/pmwinmm.c
+++ b/src/lib/portmidi/pmwinmm.c
@@ -1,14 +1,14 @@
/* pmwinmm.c -- system specific definitions */
#ifdef _MSC_VER
- #pragma warning(disable: 4133) // stop warnings about implicit typecasts
+ #pragma warning(disable: 4133) // stop warnings about implicit typecasts
#endif
#ifndef _WIN32_WINNT
- /* without this define, InitializeCriticalSectionAndSpinCount is
- * undefined. This version level means "Windows 2000 and higher"
- */
- #define _WIN32_WINNT 0x0500
+ /* without this define, InitializeCriticalSectionAndSpinCount is
+ * undefined. This version level means "Windows 2000 and higher"
+ */
+ #define _WIN32_WINNT 0x0500
#endif
#undef UNICODE
#include "windows.h"
@@ -45,15 +45,15 @@ typedef UINT32 FPTR;
/* callback routines */
static void CALLBACK winmm_in_callback(HMIDIIN hMidiIn,
- WORD wMsg, DWORD dwInstance,
- DWORD dwParam1, DWORD dwParam2);
+ WORD wMsg, DWORD dwInstance,
+ DWORD dwParam1, DWORD dwParam2);
static void CALLBACK winmm_streamout_callback(HMIDIOUT hmo, UINT wMsg,
- DWORD dwInstance, DWORD dwParam1,
- DWORD dwParam2);
+ DWORD dwInstance, DWORD dwParam1,
+ DWORD dwParam2);
#ifdef USE_SYSEX_BUFFERS
static void CALLBACK winmm_out_callback(HMIDIOUT hmo, UINT wMsg,
- DWORD dwInstance, DWORD dwParam1,
- DWORD dwParam2);
+ DWORD dwInstance, DWORD dwParam1,
+ DWORD dwParam2);
#endif
extern pm_fns_node pm_winmm_in_dictionary;
@@ -65,8 +65,8 @@ static void winmm_out_delete(PmInternal *midi); /* forward reference */
A note about buffers: WinMM seems to hold onto buffers longer than
one would expect, e.g. when I tried using 2 small buffers to send
long sysex messages, at some point WinMM held both buffers. This problem
-was fixed by making buffers bigger. Therefore, it seems that there should
-be enough buffer space to hold a whole sysex message.
+was fixed by making buffers bigger. Therefore, it seems that there should
+be enough buffer space to hold a whole sysex message.
The bufferSize passed into Pm_OpenInput (passed into here as buffer_len)
will be used to estimate the largest sysex message (= buffer_len * 4 bytes).
@@ -78,7 +78,7 @@ the size of max_sysex_len, but each at least 256 bytes.
For stream output, there will already be enough space in very short
buffers, so use them, but make sure there are at least 16.
-For input, use many small buffers rather than 2 large ones so that when
+For input, use many small buffers rather than 2 large ones so that when
there are short sysex messages arriving frequently (as in control surfaces)
there will be more free buffers to fill. Use max_sysex_len / 64 buffers,
but at least 16, of size 64 bytes each.
@@ -125,39 +125,39 @@ UINT midi_num_outputs = 0;
/* per device info */
typedef struct midiwinmm_struct {
- union {
- HMIDISTRM stream; /* windows handle for stream */
- HMIDIOUT out; /* windows handle for out calls */
- HMIDIIN in; /* windows handle for in calls */
- } handle;
-
- /* midi output messages are sent in these buffers, which are allocated
- * in a round-robin fashion, using next_buffer as an index
- */
- LPMIDIHDR *buffers; /* pool of buffers for midi in or out data */
- int max_buffers; /* length of buffers array */
- int buffers_expanded; /* buffers array expanded for extra msgs? */
- int num_buffers; /* how many buffers allocated in buffers array */
- int next_buffer; /* index of next buffer to send */
- HANDLE buffer_signal; /* used to wait for buffer to become free */
+ union {
+ HMIDISTRM stream; /* windows handle for stream */
+ HMIDIOUT out; /* windows handle for out calls */
+ HMIDIIN in; /* windows handle for in calls */
+ } handle;
+
+ /* midi output messages are sent in these buffers, which are allocated
+ * in a round-robin fashion, using next_buffer as an index
+ */
+ LPMIDIHDR *buffers; /* pool of buffers for midi in or out data */
+ int max_buffers; /* length of buffers array */
+ int buffers_expanded; /* buffers array expanded for extra msgs? */
+ int num_buffers; /* how many buffers allocated in buffers array */
+ int next_buffer; /* index of next buffer to send */
+ HANDLE buffer_signal; /* used to wait for buffer to become free */
#ifdef USE_SYSEX_BUFFERS
- /* sysex buffers will be allocated only when
- * a sysex message is sent. The size of the buffer is fixed.
- */
- LPMIDIHDR sysex_buffers[NUM_SYSEX_BUFFERS]; /* pool of buffers for sysex data */
- int next_sysex_buffer; /* index of next sysexbuffer to send */
+ /* sysex buffers will be allocated only when
+ * a sysex message is sent. The size of the buffer is fixed.
+ */
+ LPMIDIHDR sysex_buffers[NUM_SYSEX_BUFFERS]; /* pool of buffers for sysex data */
+ int next_sysex_buffer; /* index of next sysexbuffer to send */
#endif
- unsigned long last_time; /* last output time */
- int first_message; /* flag: treat first message differently */
- int sysex_mode; /* middle of sending sysex */
- unsigned long sysex_word; /* accumulate data when receiving sysex */
- unsigned int sysex_byte_count; /* count how many received */
- LPMIDIHDR hdr; /* the message accumulating sysex to send */
- unsigned long sync_time; /* when did we last determine delta? */
- long delta; /* difference between stream time and
+ unsigned long last_time; /* last output time */
+ int first_message; /* flag: treat first message differently */
+ int sysex_mode; /* middle of sending sysex */
+ unsigned long sysex_word; /* accumulate data when receiving sysex */
+ unsigned int sysex_byte_count; /* count how many received */
+ LPMIDIHDR hdr; /* the message accumulating sysex to send */
+ unsigned long sync_time; /* when did we last determine delta? */
+ long delta; /* difference between stream time and
real time */
- int error; /* host error from doing port midi call */
- CRITICAL_SECTION lock; /* prevents reentrant callbacks (input only) */
+ int error; /* host error from doing port midi call */
+ CRITICAL_SECTION lock; /* prevents reentrant callbacks (input only) */
} midiwinmm_node, *midiwinmm_type;
@@ -168,86 +168,86 @@ general MIDI device queries
*/
static void pm_winmm_general_inputs(void)
{
- UINT i;
- WORD wRtn;
- midi_num_inputs = midiInGetNumDevs();
- midi_in_caps = (MIDIINCAPS *) pm_alloc(sizeof(MIDIINCAPS) *
- midi_num_inputs);
- if (midi_in_caps == NULL) {
- /* if you can't open a particular system-level midi interface
- * (such as winmm), we just consider that system or API to be
- * unavailable and move on without reporting an error.
- */
- return;
- }
-
- for (i = 0; i < midi_num_inputs; i++) {
- wRtn = midiInGetDevCaps(i, (LPMIDIINCAPS) & midi_in_caps[i],
- sizeof(MIDIINCAPS));
- if (wRtn == MMSYSERR_NOERROR) {
- /* ignore errors here -- if pm_descriptor_max is exceeded, some
- devices will not be accessible. */
- pm_add_device((char *)"MMSystem", midi_in_caps[i].szPname, TRUE,
- (void *)(FPTR)i,
- &pm_winmm_in_dictionary);
- }
- }
+ UINT i;
+ WORD wRtn;
+ midi_num_inputs = midiInGetNumDevs();
+ midi_in_caps = (MIDIINCAPS *) pm_alloc(sizeof(MIDIINCAPS) *
+ midi_num_inputs);
+ if (midi_in_caps == NULL) {
+ /* if you can't open a particular system-level midi interface
+ * (such as winmm), we just consider that system or API to be
+ * unavailable and move on without reporting an error.
+ */
+ return;
+ }
+
+ for (i = 0; i < midi_num_inputs; i++) {
+ wRtn = midiInGetDevCaps(i, (LPMIDIINCAPS) & midi_in_caps[i],
+ sizeof(MIDIINCAPS));
+ if (wRtn == MMSYSERR_NOERROR) {
+ /* ignore errors here -- if pm_descriptor_max is exceeded, some
+ devices will not be accessible. */
+ pm_add_device((char *)"MMSystem", midi_in_caps[i].szPname, TRUE,
+ (void *)(FPTR)i,
+ &pm_winmm_in_dictionary);
+ }
+ }
}
static void pm_winmm_mapper_input(void)
{
- WORD wRtn;
- /* Note: if MIDIMAPPER opened as input (documentation implies you
- can, but current system fails to retrieve input mapper
- capabilities) then you still should retrieve some formof
- setup info. */
- wRtn = midiInGetDevCaps((UINT) MIDIMAPPER,
- (LPMIDIINCAPS) & midi_in_mapper_caps,
- sizeof(MIDIINCAPS));
- if (wRtn == MMSYSERR_NOERROR) {
- pm_add_device((char *)"MMSystem", midi_in_mapper_caps.szPname, TRUE,
- (void *)(FPTR)MIDIMAPPER, &pm_winmm_in_dictionary);
- }
+ WORD wRtn;
+ /* Note: if MIDIMAPPER opened as input (documentation implies you
+ can, but current system fails to retrieve input mapper
+ capabilities) then you still should retrieve some formof
+ setup info. */
+ wRtn = midiInGetDevCaps((UINT) MIDIMAPPER,
+ (LPMIDIINCAPS) & midi_in_mapper_caps,
+ sizeof(MIDIINCAPS));
+ if (wRtn == MMSYSERR_NOERROR) {
+ pm_add_device((char *)"MMSystem", midi_in_mapper_caps.szPname, TRUE,
+ (void *)(FPTR)MIDIMAPPER, &pm_winmm_in_dictionary);
+ }
}
static void pm_winmm_general_outputs(void)
{
- UINT i;
- DWORD wRtn;
- midi_num_outputs = midiOutGetNumDevs();
- midi_out_caps = pm_alloc( sizeof(MIDIOUTCAPS) * midi_num_outputs );
-
- if (midi_out_caps == NULL) {
- /* no error is reported -- see pm_winmm_general_inputs */
- return ;
- }
-
- for (i = 0; i < midi_num_outputs; i++) {
- wRtn = midiOutGetDevCaps(i, (LPMIDIOUTCAPS) & midi_out_caps[i],
- sizeof(MIDIOUTCAPS));
- if (wRtn == MMSYSERR_NOERROR) {
- pm_add_device((char *)"MMSystem", midi_out_caps[i].szPname, FALSE,
- (void *)(FPTR)i,
- &pm_winmm_out_dictionary);
- }
- }
+ UINT i;
+ DWORD wRtn;
+ midi_num_outputs = midiOutGetNumDevs();
+ midi_out_caps = pm_alloc( sizeof(MIDIOUTCAPS) * midi_num_outputs );
+
+ if (midi_out_caps == NULL) {
+ /* no error is reported -- see pm_winmm_general_inputs */
+ return ;
+ }
+
+ for (i = 0; i < midi_num_outputs; i++) {
+ wRtn = midiOutGetDevCaps(i, (LPMIDIOUTCAPS) & midi_out_caps[i],
+ sizeof(MIDIOUTCAPS));
+ if (wRtn == MMSYSERR_NOERROR) {
+ pm_add_device((char *)"MMSystem", midi_out_caps[i].szPname, FALSE,
+ (void *)(FPTR)i,
+ &pm_winmm_out_dictionary);
+ }
+ }
}
static void pm_winmm_mapper_output(void)
{
- WORD wRtn;
- /* Note: if MIDIMAPPER opened as output (pseudo MIDI device
- maps device independent messages into device dependant ones,
- via NT midimapper program) you still should get some setup info */
- wRtn = midiOutGetDevCaps((UINT) MIDIMAPPER, (LPMIDIOUTCAPS)
- & midi_out_mapper_caps, sizeof(MIDIOUTCAPS));
- if (wRtn == MMSYSERR_NOERROR) {
- pm_add_device((char *)"MMSystem", midi_out_mapper_caps.szPname, FALSE,
- (void *)(FPTR)MIDIMAPPER, &pm_winmm_out_dictionary);
- }
+ WORD wRtn;
+ /* Note: if MIDIMAPPER opened as output (pseudo MIDI device
+ maps device independent messages into device dependant ones,
+ via NT midimapper program) you still should get some setup info */
+ wRtn = midiOutGetDevCaps((UINT) MIDIMAPPER, (LPMIDIOUTCAPS)
+ & midi_out_mapper_caps, sizeof(MIDIOUTCAPS));
+ if (wRtn == MMSYSERR_NOERROR) {
+ pm_add_device((char *)"MMSystem", midi_out_mapper_caps.szPname, FALSE,
+ (void *)(FPTR)MIDIMAPPER, &pm_winmm_out_dictionary);
+ }
}
@@ -258,8 +258,8 @@ host error handling
*/
static unsigned int winmm_has_host_error(PmInternal * midi)
{
- midiwinmm_type m = (midiwinmm_type)midi->descriptor;
- return m->error;
+ midiwinmm_type m = (midiwinmm_type)midi->descriptor;
+ return m->error;
}
@@ -269,43 +269,43 @@ static unsigned int winmm_has_host_error(PmInternal * midi)
*/
static int str_copy_len(char *dst, char *src, int len)
{
- strncpy(dst, src, len);
- /* just in case suffex is greater then len, terminate with zero */
- dst[len - 1] = 0;
- return strlen(dst);
+ strncpy(dst, src, len);
+ /* just in case suffex is greater then len, terminate with zero */
+ dst[len - 1] = 0;
+ return strlen(dst);
}
static void winmm_get_host_error(PmInternal * midi, char * msg, UINT len)
{
- /* precondition: midi != NULL */
- midiwinmm_node * m = (midiwinmm_node *) midi->descriptor;
- char *hdr1 = (char *)"Host error: ";
- //char *hdr2 = (char *)"Host callback error: ";
-
- msg[0] = 0; /* initialize result string to empty */
-
- if (descriptors[midi->device_id].pub.input) {
- /* input and output use different winmm API calls */
- if (m) { /* make sure there is an open device to examine */
- if (m->error != MMSYSERR_NOERROR) {
- int n = str_copy_len(msg, hdr1, len);
- /* read and record host error */
- midiInGetErrorText(m->error, msg + n, len - n);
- //assert(err == MMSYSERR_NOERROR);
- m->error = MMSYSERR_NOERROR;
- }
- }
- } else { /* output port */
- if (m) {
- if (m->error != MMSYSERR_NOERROR) {
- int n = str_copy_len(msg, hdr1, len);
- midiOutGetErrorText(m->error, msg + n, len - n);
- //assert(err == MMSYSERR_NOERROR);
- m->error = MMSYSERR_NOERROR;
- }
- }
- }
+ /* precondition: midi != NULL */
+ midiwinmm_node * m = (midiwinmm_node *) midi->descriptor;
+ char *hdr1 = (char *)"Host error: ";
+ //char *hdr2 = (char *)"Host callback error: ";
+
+ msg[0] = 0; /* initialize result string to empty */
+
+ if (descriptors[midi->device_id].pub.input) {
+ /* input and output use different winmm API calls */
+ if (m) { /* make sure there is an open device to examine */
+ if (m->error != MMSYSERR_NOERROR) {
+ int n = str_copy_len(msg, hdr1, len);
+ /* read and record host error */
+ midiInGetErrorText(m->error, msg + n, len - n);
+ //assert(err == MMSYSERR_NOERROR);
+ m->error = MMSYSERR_NOERROR;
+ }
+ }
+ } else { /* output port */
+ if (m) {
+ if (m->error != MMSYSERR_NOERROR) {
+ int n = str_copy_len(msg, hdr1, len);
+ midiOutGetErrorText(m->error, msg + n, len - n);
+ //assert(err == MMSYSERR_NOERROR);
+ m->error = MMSYSERR_NOERROR;
+ }
+ }
+ }
}
@@ -316,215 +316,215 @@ buffer handling
*/
static MIDIHDR *allocate_buffer(long data_size)
{
- LPMIDIHDR hdr = (LPMIDIHDR) pm_alloc(MIDIHDR_SYSEX_SIZE(data_size));
- MIDIEVENT *evt;
- if (!hdr) return NULL;
- evt = (MIDIEVENT *) (hdr + 1); /* place MIDIEVENT after header */
- hdr->lpData = (LPSTR) evt;
- hdr->dwBufferLength = MIDIHDR_SYSEX_BUFFER_LENGTH(data_size);
- hdr->dwBytesRecorded = 0;
- hdr->dwFlags = 0;
- hdr->dwUser = hdr->dwBufferLength;
- return hdr;
+ LPMIDIHDR hdr = (LPMIDIHDR) pm_alloc(MIDIHDR_SYSEX_SIZE(data_size));
+ MIDIEVENT *evt;
+ if (!hdr) return NULL;
+ evt = (MIDIEVENT *) (hdr + 1); /* place MIDIEVENT after header */
+ hdr->lpData = (LPSTR) evt;
+ hdr->dwBufferLength = MIDIHDR_SYSEX_BUFFER_LENGTH(data_size);
+ hdr->dwBytesRecorded = 0;
+ hdr->dwFlags = 0;
+ hdr->dwUser = hdr->dwBufferLength;
+ return hdr;
}
#ifdef USE_SYSEX_BUFFERS
static MIDIHDR *allocate_sysex_buffer(long data_size)
{
- /* we're actually allocating more than data_size because the buffer
- * will include the MIDIEVENT header in addition to the data
- */
- LPMIDIHDR hdr = (LPMIDIHDR) pm_alloc(MIDIHDR_SYSEX_SIZE(data_size));
- MIDIEVENT *evt;
- if (!hdr) return NULL;
- evt = (MIDIEVENT *) (hdr + 1); /* place MIDIEVENT after header */
- hdr->lpData = (LPSTR) evt;
- hdr->dwFlags = 0;
- hdr->dwUser = 0;
- return hdr;
+ /* we're actually allocating more than data_size because the buffer
+ * will include the MIDIEVENT header in addition to the data
+ */
+ LPMIDIHDR hdr = (LPMIDIHDR) pm_alloc(MIDIHDR_SYSEX_SIZE(data_size));
+ MIDIEVENT *evt;
+ if (!hdr) return NULL;
+ evt = (MIDIEVENT *) (hdr + 1); /* place MIDIEVENT after header */
+ hdr->lpData = (LPSTR) evt;
+ hdr->dwFlags = 0;
+ hdr->dwUser = 0;
+ return hdr;
}
#endif
static PmError allocate_buffers(midiwinmm_type m, long data_size, long count)
{
- int i;
- /* buffers is an array of count pointers to MIDIHDR/MIDIEVENT struct */
- m->num_buffers = 0; /* in case no memory can be allocated */
- m->buffers = (LPMIDIHDR *) pm_alloc(sizeof(LPMIDIHDR) * count);
- if (!m->buffers) return pmInsufficientMemory;
- m->max_buffers = count;
- for (i = 0; i < count; i++) {
- LPMIDIHDR hdr = allocate_buffer(data_size);
- if (!hdr) { /* free everything allocated so far and return */
- for (i = i - 1; i >= 0; i--) pm_free(m->buffers[i]);
- pm_free(m->buffers);
- m->max_buffers = 0;
- return pmInsufficientMemory;
- }
- m->buffers[i] = hdr; /* this may be NULL if allocation fails */
- }
- m->num_buffers = count;
- return pmNoError;
+ int i;
+ /* buffers is an array of count pointers to MIDIHDR/MIDIEVENT struct */
+ m->num_buffers = 0; /* in case no memory can be allocated */
+ m->buffers = (LPMIDIHDR *) pm_alloc(sizeof(LPMIDIHDR) * count);
+ if (!m->buffers) return pmInsufficientMemory;
+ m->max_buffers = count;
+ for (i = 0; i < count; i++) {
+ LPMIDIHDR hdr = allocate_buffer(data_size);
+ if (!hdr) { /* free everything allocated so far and return */
+ for (i = i - 1; i >= 0; i--) pm_free(m->buffers[i]);
+ pm_free(m->buffers);
+ m->max_buffers = 0;
+ return pmInsufficientMemory;
+ }
+ m->buffers[i] = hdr; /* this may be NULL if allocation fails */
+ }
+ m->num_buffers = count;
+ return pmNoError;
}
#ifdef USE_SYSEX_BUFFERS
static PmError allocate_sysex_buffers(midiwinmm_type m, long data_size)
{
- PmError rslt = pmNoError;
- /* sysex_buffers is an array of count pointers to MIDIHDR/MIDIEVENT struct */
- int i;
- for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
- LPMIDIHDR hdr = allocate_sysex_buffer(data_size);
-
- if (!hdr) rslt = pmInsufficientMemory;
- m->sysex_buffers[i] = hdr; /* this may be NULL if allocation fails */
- hdr->dwFlags = 0; /* mark as free */
- }
- return rslt;
+ PmError rslt = pmNoError;
+ /* sysex_buffers is an array of count pointers to MIDIHDR/MIDIEVENT struct */
+ int i;
+ for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
+ LPMIDIHDR hdr = allocate_sysex_buffer(data_size);
+
+ if (!hdr) rslt = pmInsufficientMemory;
+ m->sysex_buffers[i] = hdr; /* this may be NULL if allocation fails */
+ hdr->dwFlags = 0; /* mark as free */
+ }
+ return rslt;
}
#endif
#ifdef USE_SYSEX_BUFFERS
static LPMIDIHDR get_free_sysex_buffer(PmInternal *midi)
{
- LPMIDIHDR r = NULL;
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- if (!m->sysex_buffers[0]) {
- if (allocate_sysex_buffers(m, SYSEX_BYTES_PER_BUFFER)) {
- return NULL;
- }
- }
- /* busy wait until we find a free buffer */
- while (TRUE) {
- int i;
- for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
- /* cycle through buffers, modulo NUM_SYSEX_BUFFERS */
- m->next_sysex_buffer++;
- if (m->next_sysex_buffer >= NUM_SYSEX_BUFFERS) m->next_sysex_buffer = 0;
- r = m->sysex_buffers[m->next_sysex_buffer];
- if ((r->dwFlags & MHDR_PREPARED) == 0) goto found_sysex_buffer;
- }
- /* after scanning every buffer and not finding anything, block */
- if (WaitForSingleObject(m->buffer_signal, 1000) == WAIT_TIMEOUT) {
+ LPMIDIHDR r = NULL;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ if (!m->sysex_buffers[0]) {
+ if (allocate_sysex_buffers(m, SYSEX_BYTES_PER_BUFFER)) {
+ return NULL;
+ }
+ }
+ /* busy wait until we find a free buffer */
+ while (TRUE) {
+ int i;
+ for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
+ /* cycle through buffers, modulo NUM_SYSEX_BUFFERS */
+ m->next_sysex_buffer++;
+ if (m->next_sysex_buffer >= NUM_SYSEX_BUFFERS) m->next_sysex_buffer = 0;
+ r = m->sysex_buffers[m->next_sysex_buffer];
+ if ((r->dwFlags & MHDR_PREPARED) == 0) goto found_sysex_buffer;
+ }
+ /* after scanning every buffer and not finding anything, block */
+ if (WaitForSingleObject(m->buffer_signal, 1000) == WAIT_TIMEOUT) {
#ifdef DEBUG
- printf("PortMidi warning: get_free_sysex_buffer() wait timed out after 1000ms\n");
+ printf("PortMidi warning: get_free_sysex_buffer() wait timed out after 1000ms\n");
#endif
- }
- }
+ }
+ }
found_sysex_buffer:
- r->dwBytesRecorded = 0;
- r->dwBufferLength = 0; /* changed to correct value later */
- return r;
+ r->dwBytesRecorded = 0;
+ r->dwBufferLength = 0; /* changed to correct value later */
+ return r;
}
#endif
static LPMIDIHDR get_free_output_buffer(PmInternal *midi)
{
- LPMIDIHDR r = NULL;
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- while (TRUE) {
- int i;
- for (i = 0; i < m->num_buffers; i++) {
- /* cycle through buffers, modulo m->num_buffers */
- m->next_buffer++;
- if (m->next_buffer >= m->num_buffers) m->next_buffer = 0;
- r = m->buffers[m->next_buffer];
- if ((r->dwFlags & MHDR_PREPARED) == 0) goto found_buffer;
- }
- /* after scanning every buffer and not finding anything, block */
- if (WaitForSingleObject(m->buffer_signal, 1000) == WAIT_TIMEOUT) {
+ LPMIDIHDR r = NULL;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ while (TRUE) {
+ int i;
+ for (i = 0; i < m->num_buffers; i++) {
+ /* cycle through buffers, modulo m->num_buffers */
+ m->next_buffer++;
+ if (m->next_buffer >= m->num_buffers) m->next_buffer = 0;
+ r = m->buffers[m->next_buffer];
+ if ((r->dwFlags & MHDR_PREPARED) == 0) goto found_buffer;
+ }
+ /* after scanning every buffer and not finding anything, block */
+ if (WaitForSingleObject(m->buffer_signal, 1000) == WAIT_TIMEOUT) {
#ifdef DEBUG
- printf("PortMidi warning: get_free_output_buffer() wait timed out after 1000ms\n");
+ printf("PortMidi warning: get_free_output_buffer() wait timed out after 1000ms\n");
#endif
- /* if we're trying to send a sysex message, maybe the
- * message is too big and we need more message buffers.
- * Expand the buffer pool by 128KB using 1024-byte buffers.
- */
- /* first, expand the buffers array if necessary */
- if (!m->buffers_expanded) {
- LPMIDIHDR *new_buffers = (LPMIDIHDR *) pm_alloc(
- (m->num_buffers + NUM_EXPANSION_BUFFERS) *
- sizeof(LPMIDIHDR));
- /* if no memory, we could return a no-memory error, but user
- * probably will be unprepared to deal with it. Maybe the
- * MIDI driver is temporarily hung so we should just wait.
- * I don't know the right answer, but waiting is easier.
- */
- if (!new_buffers) continue;
- /* copy buffers to new_buffers and replace buffers */
- memcpy(new_buffers, m->buffers,
- m->num_buffers * sizeof(LPMIDIHDR));
- pm_free(m->buffers);
- m->buffers = new_buffers;
- m->max_buffers = m->num_buffers + NUM_EXPANSION_BUFFERS;
- m->buffers_expanded = TRUE;
- }
- /* next, add one buffer and return it */
- if (m->num_buffers < m->max_buffers) {
- r = allocate_buffer(EXPANSION_BUFFER_LEN);
- /* again, if there's no memory, we may not really be
- * dead -- maybe the system is temporarily hung and
- * we can just wait longer for a message buffer */
- if (!r) continue;
- m->buffers[m->num_buffers++] = r;
- goto found_buffer; /* break out of 2 loops */
- }
- /* else, we've allocated all NUM_EXPANSION_BUFFERS buffers,
- * and we have no free buffers to send. We'll just keep
- * polling to see if any buffers show up.
- */
- }
- }
+ /* if we're trying to send a sysex message, maybe the
+ * message is too big and we need more message buffers.
+ * Expand the buffer pool by 128KB using 1024-byte buffers.
+ */
+ /* first, expand the buffers array if necessary */
+ if (!m->buffers_expanded) {
+ LPMIDIHDR *new_buffers = (LPMIDIHDR *) pm_alloc(
+ (m->num_buffers + NUM_EXPANSION_BUFFERS) *
+ sizeof(LPMIDIHDR));
+ /* if no memory, we could return a no-memory error, but user
+ * probably will be unprepared to deal with it. Maybe the
+ * MIDI driver is temporarily hung so we should just wait.
+ * I don't know the right answer, but waiting is easier.
+ */
+ if (!new_buffers) continue;
+ /* copy buffers to new_buffers and replace buffers */
+ memcpy(new_buffers, m->buffers,
+ m->num_buffers * sizeof(LPMIDIHDR));
+ pm_free(m->buffers);
+ m->buffers = new_buffers;
+ m->max_buffers = m->num_buffers + NUM_EXPANSION_BUFFERS;
+ m->buffers_expanded = TRUE;
+ }
+ /* next, add one buffer and return it */
+ if (m->num_buffers < m->max_buffers) {
+ r = allocate_buffer(EXPANSION_BUFFER_LEN);
+ /* again, if there's no memory, we may not really be
+ * dead -- maybe the system is temporarily hung and
+ * we can just wait longer for a message buffer */
+ if (!r) continue;
+ m->buffers[m->num_buffers++] = r;
+ goto found_buffer; /* break out of 2 loops */
+ }
+ /* else, we've allocated all NUM_EXPANSION_BUFFERS buffers,
+ * and we have no free buffers to send. We'll just keep
+ * polling to see if any buffers show up.
+ */
+ }
+ }
found_buffer:
- r->dwBytesRecorded = 0;
- /* actual buffer length is saved in dwUser field */
- r->dwBufferLength = (DWORD) r->dwUser;
- return r;
+ r->dwBytesRecorded = 0;
+ /* actual buffer length is saved in dwUser field */
+ r->dwBufferLength = (DWORD) r->dwUser;
+ return r;
}
#ifdef EXPANDING_SYSEX_BUFFERS
note: this is not working code, but might be useful if you want
- to grow sysex buffers.
+ to grow sysex buffers.
static PmError resize_sysex_buffer(PmInternal *midi, long old_size, long new_size)
{
- LPMIDIHDR big;
- int i;
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- /* buffer must be smaller than 64k, but be also a multiple of 4 */
- if (new_size > 65520) {
- if (old_size >= 65520)
- return pmBufferMaxSize;
- else
- new_size = 65520;
- }
- /* allocate a bigger message */
- big = allocate_sysex_buffer(new_size);
- /* printf("expand to %d bytes\n", new_size);*/
- if (!big) return pmInsufficientMemory;
- m->error = midiOutPrepareHeader(m->handle.out, big, sizeof(MIDIHDR));
- if (m->error) {
- pm_free(big);
- return pmHostError;
- }
- /* make sure we're not going to overwrite any memory */
- assert(old_size <= new_size);
- memcpy(big->lpData, m->hdr->lpData, old_size);
- /* keep track of how many sysex bytes are in message so far */
- big->dwBytesRecorded = m->hdr->dwBytesRecorded;
- big->dwBufferLength = new_size;
- /* find which buffer this was, and replace it */
- for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
- if (m->sysex_buffers[i] == m->hdr) {
- m->sysex_buffers[i] = big;
- m->sysex_buffer_size[i] = new_size;
- pm_free(m->hdr);
- m->hdr = big;
- break;
- }
- }
- assert(i != NUM_SYSEX_BUFFERS);
-
- return pmNoError;
+ LPMIDIHDR big;
+ int i;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ /* buffer must be smaller than 64k, but be also a multiple of 4 */
+ if (new_size > 65520) {
+ if (old_size >= 65520)
+ return pmBufferMaxSize;
+ else
+ new_size = 65520;
+ }
+ /* allocate a bigger message */
+ big = allocate_sysex_buffer(new_size);
+ /* printf("expand to %d bytes\n", new_size);*/
+ if (!big) return pmInsufficientMemory;
+ m->error = midiOutPrepareHeader(m->handle.out, big, sizeof(MIDIHDR));
+ if (m->error) {
+ pm_free(big);
+ return pmHostError;
+ }
+ /* make sure we're not going to overwrite any memory */
+ assert(old_size <= new_size);
+ memcpy(big->lpData, m->hdr->lpData, old_size);
+ /* keep track of how many sysex bytes are in message so far */
+ big->dwBytesRecorded = m->hdr->dwBytesRecorded;
+ big->dwBufferLength = new_size;
+ /* find which buffer this was, and replace it */
+ for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
+ if (m->sysex_buffers[i] == m->hdr) {
+ m->sysex_buffers[i] = big;
+ m->sysex_buffer_size[i] = new_size;
+ pm_free(m->hdr);
+ m->hdr = big;
+ break;
+ }
+ }
+ assert(i != NUM_SYSEX_BUFFERS);
+
+ return pmNoError;
}
#endif
@@ -537,107 +537,107 @@ begin midi input implementation
static PmError allocate_input_buffer(HMIDIIN h, long buffer_len)
{
- LPMIDIHDR hdr = allocate_buffer(buffer_len);
- if (!hdr) return pmInsufficientMemory;
- pm_hosterror = midiInPrepareHeader(h, hdr, sizeof(MIDIHDR));
- if (pm_hosterror) {
- pm_free(hdr);
- return pm_hosterror;
- }
- pm_hosterror = midiInAddBuffer(h, hdr, sizeof(MIDIHDR));
- return pm_hosterror;
+ LPMIDIHDR hdr = allocate_buffer(buffer_len);
+ if (!hdr) return pmInsufficientMemory;
+ pm_hosterror = midiInPrepareHeader(h, hdr, sizeof(MIDIHDR));
+ if (pm_hosterror) {
+ pm_free(hdr);
+ return pm_hosterror;
+ }
+ pm_hosterror = midiInAddBuffer(h, hdr, sizeof(MIDIHDR));
+ return pm_hosterror;
}
static PmError winmm_in_open(PmInternal *midi, void *driverInfo)
{
- DWORD dwDevice;
- int i = midi->device_id;
- int max_sysex_len = midi->buffer_len * 4;
- int num_input_buffers = max_sysex_len / INPUT_SYSEX_LEN;
- midiwinmm_type m;
+ DWORD dwDevice;
+ int i = midi->device_id;
+ int max_sysex_len = midi->buffer_len * 4;
+ int num_input_buffers = max_sysex_len / INPUT_SYSEX_LEN;
+ midiwinmm_type m;
dwDevice = (DWORD)(FPTR)descriptors[i].descriptor;
- /* create system dependent device data */
- m = (midiwinmm_type) pm_alloc(sizeof(midiwinmm_node)); /* create */
- midi->descriptor = m;
- if (!m) goto no_memory;
- m->handle.in = NULL;
- m->buffers = NULL; /* not used for input */
- m->num_buffers = 0; /* not used for input */
- m->max_buffers = FALSE; /* not used for input */
- m->buffers_expanded = 0; /* not used for input */
- m->next_buffer = 0; /* not used for input */
- m->buffer_signal = 0; /* not used for input */
+ /* create system dependent device data */
+ m = (midiwinmm_type) pm_alloc(sizeof(midiwinmm_node)); /* create */
+ midi->descriptor = m;
+ if (!m) goto no_memory;
+ m->handle.in = NULL;
+ m->buffers = NULL; /* not used for input */
+ m->num_buffers = 0; /* not used for input */
+ m->max_buffers = FALSE; /* not used for input */
+ m->buffers_expanded = 0; /* not used for input */
+ m->next_buffer = 0; /* not used for input */
+ m->buffer_signal = 0; /* not used for input */
#ifdef USE_SYSEX_BUFFERS
- for (i = 0; i < NUM_SYSEX_BUFFERS; i++)
- m->sysex_buffers[i] = NULL; /* not used for input */
- m->next_sysex_buffer = 0; /* not used for input */
+ for (i = 0; i < NUM_SYSEX_BUFFERS; i++)
+ m->sysex_buffers[i] = NULL; /* not used for input */
+ m->next_sysex_buffer = 0; /* not used for input */
#endif
- m->last_time = 0;
- m->first_message = TRUE; /* not used for input */
- m->sysex_mode = FALSE;
- m->sysex_word = 0;
- m->sysex_byte_count = 0;
- m->hdr = NULL; /* not used for input */
- m->sync_time = 0;
- m->delta = 0;
- m->error = MMSYSERR_NOERROR;
- /* 4000 is based on Windows documentation -- that's the value used in the
- memory manager. It's small enough that it should not hurt performance even
- if it's not optimal.
- */
- InitializeCriticalSectionAndSpinCount(&m->lock, 4000);
- /* open device */
- pm_hosterror = midiInOpen(
- &(m->handle.in), /* input device handle */
- dwDevice, /* device ID */
- (DWORD_PTR) winmm_in_callback, /* callback address */
- (DWORD_PTR) midi, /* callback instance data */
- CALLBACK_FUNCTION); /* callback is a procedure */
- if (pm_hosterror) goto free_descriptor;
-
- if (num_input_buffers < MIN_INPUT_BUFFERS)
- num_input_buffers = MIN_INPUT_BUFFERS;
- for (i = 0; i < num_input_buffers; i++) {
- if (allocate_input_buffer(m->handle.in, INPUT_SYSEX_LEN)) {
- /* either pm_hosterror was set, or the proper return code
- is pmInsufficientMemory */
- goto close_device;
- }
- }
- /* start device */
- pm_hosterror = midiInStart(m->handle.in);
- if (pm_hosterror) goto reset_device;
- return pmNoError;
-
- /* undo steps leading up to the detected error */
+ m->last_time = 0;
+ m->first_message = TRUE; /* not used for input */
+ m->sysex_mode = FALSE;
+ m->sysex_word = 0;
+ m->sysex_byte_count = 0;
+ m->hdr = NULL; /* not used for input */
+ m->sync_time = 0;
+ m->delta = 0;
+ m->error = MMSYSERR_NOERROR;
+ /* 4000 is based on Windows documentation -- that's the value used in the
+ memory manager. It's small enough that it should not hurt performance even
+ if it's not optimal.
+ */
+ InitializeCriticalSectionAndSpinCount(&m->lock, 4000);
+ /* open device */
+ pm_hosterror = midiInOpen(
+ &(m->handle.in), /* input device handle */
+ dwDevice, /* device ID */
+ (DWORD_PTR) winmm_in_callback, /* callback address */
+ (DWORD_PTR) midi, /* callback instance data */
+ CALLBACK_FUNCTION); /* callback is a procedure */
+ if (pm_hosterror) goto free_descriptor;
+
+ if (num_input_buffers < MIN_INPUT_BUFFERS)
+ num_input_buffers = MIN_INPUT_BUFFERS;
+ for (i = 0; i < num_input_buffers; i++) {
+ if (allocate_input_buffer(m->handle.in, INPUT_SYSEX_LEN)) {
+ /* either pm_hosterror was set, or the proper return code
+ is pmInsufficientMemory */
+ goto close_device;
+ }
+ }
+ /* start device */
+ pm_hosterror = midiInStart(m->handle.in);
+ if (pm_hosterror) goto reset_device;
+ return pmNoError;
+
+ /* undo steps leading up to the detected error */
reset_device:
- /* ignore return code (we already have an error to report) */
- midiInReset(m->handle.in);
+ /* ignore return code (we already have an error to report) */
+ midiInReset(m->handle.in);
close_device:
- midiInClose(m->handle.in); /* ignore return code */
+ midiInClose(m->handle.in); /* ignore return code */
free_descriptor:
- midi->descriptor = NULL;
- pm_free(m);
+ midi->descriptor = NULL;
+ pm_free(m);
no_memory:
- if (pm_hosterror) {
- midiInGetErrorText(pm_hosterror, (char *) pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- //assert(err == MMSYSERR_NOERROR);
- return pmHostError;
- }
- /* if !pm_hosterror, then the error must be pmInsufficientMemory */
- return pmInsufficientMemory;
- /* note: if we return an error code, the device will be
- closed and memory will be freed. It's up to the caller
- to free the parameter midi */
+ if (pm_hosterror) {
+ midiInGetErrorText(pm_hosterror, (char *) pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ //assert(err == MMSYSERR_NOERROR);
+ return pmHostError;
+ }
+ /* if !pm_hosterror, then the error must be pmInsufficientMemory */
+ return pmInsufficientMemory;
+ /* note: if we return an error code, the device will be
+ closed and memory will be freed. It's up to the caller
+ to free the parameter midi */
}
static PmError winmm_in_poll(PmInternal *midi) {
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- return m->error;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ return m->error;
}
@@ -648,143 +648,143 @@ static PmError winmm_in_poll(PmInternal *midi) {
*/
static PmError winmm_in_close(PmInternal *midi)
{
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- if (!m) return pmBadPtr;
- /* device to close */
- if ((pm_hosterror = midiInStop(m->handle.in))) {
- midiInReset(m->handle.in); /* try to reset and close port */
- midiInClose(m->handle.in);
- } else if ((pm_hosterror = midiInReset(m->handle.in))) {
- midiInClose(m->handle.in); /* best effort to close midi port */
- } else {
- pm_hosterror = midiInClose(m->handle.in);
- }
- midi->descriptor = NULL;
- DeleteCriticalSection(&m->lock);
- pm_free(m); /* delete */
- if (pm_hosterror) {
- midiInGetErrorText(pm_hosterror, (char *) pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- //assert(err == MMSYSERR_NOERROR);
- return pmHostError;
- }
- return pmNoError;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ if (!m) return pmBadPtr;
+ /* device to close */
+ if ((pm_hosterror = midiInStop(m->handle.in))) {
+ midiInReset(m->handle.in); /* try to reset and close port */
+ midiInClose(m->handle.in);
+ } else if ((pm_hosterror = midiInReset(m->handle.in))) {
+ midiInClose(m->handle.in); /* best effort to close midi port */
+ } else {
+ pm_hosterror = midiInClose(m->handle.in);
+ }
+ midi->descriptor = NULL;
+ DeleteCriticalSection(&m->lock);
+ pm_free(m); /* delete */
+ if (pm_hosterror) {
+ midiInGetErrorText(pm_hosterror, (char *) pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ //assert(err == MMSYSERR_NOERROR);
+ return pmHostError;
+ }
+ return pmNoError;
}
/* Callback function executed via midiInput SW interrupt (via midiInOpen). */
static void FAR PASCAL winmm_in_callback(
- HMIDIIN hMidiIn, /* midiInput device Handle */
- WORD wMsg, /* midi msg */
- DWORD dwInstance, /* application data */
- DWORD dwParam1, /* MIDI data */
- DWORD dwParam2) /* device timestamp (wrt most recent midiInStart) */
+ HMIDIIN hMidiIn, /* midiInput device Handle */
+ WORD wMsg, /* midi msg */
+ DWORD dwInstance, /* application data */
+ DWORD dwParam1, /* MIDI data */
+ DWORD dwParam2) /* device timestamp (wrt most recent midiInStart) */
{
- //static int entry = 0;
+ //static int entry = 0;
PmInternal *midi = (PmInternal *)(FPTR) dwInstance;
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
-
- /* NOTE: we do not just EnterCriticalSection() here because an
- * MIM_CLOSE message arrives when the port is closed, but then
- * the m->lock has been destroyed.
- */
-
- switch (wMsg) {
- case MIM_DATA: {
- /* if this callback is reentered with data, we're in trouble.
- * It's hard to imagine that Microsoft would allow callbacks
- * to be reentrant -- isn't the model that this is like a
- * hardware interrupt? -- but I've seen reentrant behavior
- * using a debugger, so it happens.
- */
- //long new_driver_time;
- EnterCriticalSection(&m->lock);
-
- /* dwParam1 is MIDI data received, packed into DWORD w/ 1st byte of
- message LOB;
- dwParam2 is time message received by input device driver, specified
- in [ms] from when midiInStart called.
- each message is expanded to include the status byte */
-
- //new_driver_time = dwParam2;
-
- if ((dwParam1 & 0x80) == 0) {
- /* not a status byte -- ignore it. This happened running the
- sysex.c test under Win2K with MidiMan USB 1x1 interface,
- but I can't reproduce it. -RBD
- */
- /* printf("non-status byte found\n"); */
- } else { /* data to process */
- PmEvent event;
- if (midi->time_proc)
- dwParam2 = (*midi->time_proc)(midi->time_info);
- event.timestamp = dwParam2;
- event.message = dwParam1;
- pm_read_short(midi, &event);
- }
- LeaveCriticalSection(&m->lock);
- break;
- }
- case MIM_LONGDATA: {
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+
+ /* NOTE: we do not just EnterCriticalSection() here because an
+ * MIM_CLOSE message arrives when the port is closed, but then
+ * the m->lock has been destroyed.
+ */
+
+ switch (wMsg) {
+ case MIM_DATA: {
+ /* if this callback is reentered with data, we're in trouble.
+ * It's hard to imagine that Microsoft would allow callbacks
+ * to be reentrant -- isn't the model that this is like a
+ * hardware interrupt? -- but I've seen reentrant behavior
+ * using a debugger, so it happens.
+ */
+ //long new_driver_time;
+ EnterCriticalSection(&m->lock);
+
+ /* dwParam1 is MIDI data received, packed into DWORD w/ 1st byte of
+ message LOB;
+ dwParam2 is time message received by input device driver, specified
+ in [ms] from when midiInStart called.
+ each message is expanded to include the status byte */
+
+ //new_driver_time = dwParam2;
+
+ if ((dwParam1 & 0x80) == 0) {
+ /* not a status byte -- ignore it. This happened running the
+ sysex.c test under Win2K with MidiMan USB 1x1 interface,
+ but I can't reproduce it. -RBD
+ */
+ /* printf("non-status byte found\n"); */
+ } else { /* data to process */
+ PmEvent event;
+ if (midi->time_proc)
+ dwParam2 = (*midi->time_proc)(midi->time_info);
+ event.timestamp = dwParam2;
+ event.message = dwParam1;
+ pm_read_short(midi, &event);
+ }
+ LeaveCriticalSection(&m->lock);
+ break;
+ }
+ case MIM_LONGDATA: {
MIDIHDR *lpMidiHdr = (MIDIHDR *)(FPTR)dwParam1;
- unsigned char *data = (unsigned char *) lpMidiHdr->lpData;
- unsigned int processed = 0;
- int remaining = lpMidiHdr->dwBytesRecorded;
-
- EnterCriticalSection(&m->lock);
- /* printf("midi_in_callback -- lpMidiHdr %x, %d bytes, %2x...\n",
- lpMidiHdr, lpMidiHdr->dwBytesRecorded, *data); */
- if (midi->time_proc)
- dwParam2 = (*midi->time_proc)(midi->time_info);
- /* can there be more than one message in one buffer? */
- /* assume yes and iterate through them */
- while (remaining > 0) {
- unsigned int amt = pm_read_bytes(midi, data + processed,
- remaining, dwParam2);
- remaining -= amt;
- processed += amt;
- }
-
- /* when a device is closed, the pending MIM_LONGDATA buffers are
- returned to this callback with dwBytesRecorded == 0. In this
- case, we do not want to send them back to the interface (if
- we do, the interface will not close, and Windows OS may hang). */
- if (lpMidiHdr->dwBytesRecorded > 0) {
- //MMRESULT rslt;
- lpMidiHdr->dwBytesRecorded = 0;
- lpMidiHdr->dwFlags = 0;
-
- /* note: no error checking -- can this actually fail? */
- midiInPrepareHeader(hMidiIn, lpMidiHdr, sizeof(MIDIHDR));
- //assert(rslt == MMSYSERR_NOERROR);
- /* note: I don't think this can fail except possibly for
- * MMSYSERR_NOMEM, but the pain of reporting this
- * unlikely but probably catastrophic error does not seem
- * worth it.
- */
- midiInAddBuffer(hMidiIn, lpMidiHdr, sizeof(MIDIHDR));
- //assert(rslt == MMSYSERR_NOERROR);
- LeaveCriticalSection(&m->lock);
- } else {
- midiInUnprepareHeader(hMidiIn,lpMidiHdr,sizeof(MIDIHDR));
- LeaveCriticalSection(&m->lock);
- pm_free(lpMidiHdr);
- }
- break;
- }
- case MIM_OPEN:
- break;
- case MIM_CLOSE:
- break;
- case MIM_ERROR:
- /* printf("MIM_ERROR\n"); */
- break;
- case MIM_LONGERROR:
- /* printf("MIM_LONGERROR\n"); */
- break;
- default:
- break;
- }
+ unsigned char *data = (unsigned char *) lpMidiHdr->lpData;
+ unsigned int processed = 0;
+ int remaining = lpMidiHdr->dwBytesRecorded;
+
+ EnterCriticalSection(&m->lock);
+ /* printf("midi_in_callback -- lpMidiHdr %x, %d bytes, %2x...\n",
+ lpMidiHdr, lpMidiHdr->dwBytesRecorded, *data); */
+ if (midi->time_proc)
+ dwParam2 = (*midi->time_proc)(midi->time_info);
+ /* can there be more than one message in one buffer? */
+ /* assume yes and iterate through them */
+ while (remaining > 0) {
+ unsigned int amt = pm_read_bytes(midi, data + processed,
+ remaining, dwParam2);
+ remaining -= amt;
+ processed += amt;
+ }
+
+ /* when a device is closed, the pending MIM_LONGDATA buffers are
+ returned to this callback with dwBytesRecorded == 0. In this
+ case, we do not want to send them back to the interface (if
+ we do, the interface will not close, and Windows OS may hang). */
+ if (lpMidiHdr->dwBytesRecorded > 0) {
+ //MMRESULT rslt;
+ lpMidiHdr->dwBytesRecorded = 0;
+ lpMidiHdr->dwFlags = 0;
+
+ /* note: no error checking -- can this actually fail? */
+ midiInPrepareHeader(hMidiIn, lpMidiHdr, sizeof(MIDIHDR));
+ //assert(rslt == MMSYSERR_NOERROR);
+ /* note: I don't think this can fail except possibly for
+ * MMSYSERR_NOMEM, but the pain of reporting this
+ * unlikely but probably catastrophic error does not seem
+ * worth it.
+ */
+ midiInAddBuffer(hMidiIn, lpMidiHdr, sizeof(MIDIHDR));
+ //assert(rslt == MMSYSERR_NOERROR);
+ LeaveCriticalSection(&m->lock);
+ } else {
+ midiInUnprepareHeader(hMidiIn,lpMidiHdr,sizeof(MIDIHDR));
+ LeaveCriticalSection(&m->lock);
+ pm_free(lpMidiHdr);
+ }
+ break;
+ }
+ case MIM_OPEN:
+ break;
+ case MIM_CLOSE:
+ break;
+ case MIM_ERROR:
+ /* printf("MIM_ERROR\n"); */
+ break;
+ case MIM_LONGERROR:
+ /* printf("MIM_LONGERROR\n"); */
+ break;
+ default:
+ break;
+ }
}
/*
@@ -797,30 +797,30 @@ begin midi output implementation
/* add_to_buffer -- adds timestamped short msg to buffer, returns fullp */
static int add_to_buffer(midiwinmm_type m, LPMIDIHDR hdr,
- unsigned long delta, unsigned long msg)
+ unsigned long delta, unsigned long msg)
{
- unsigned long *ptr = (unsigned long *)
- (hdr->lpData + hdr->dwBytesRecorded);
- *ptr++ = delta; /* dwDeltaTime */
- *ptr++ = 0; /* dwStream */
- *ptr++ = msg; /* dwEvent */
- hdr->dwBytesRecorded += 3 * sizeof(long);
- /* if the addition of three more words (a message) would extend beyond
- the buffer length, then return TRUE (full)
- */
- return hdr->dwBytesRecorded + 3 * sizeof(long) > hdr->dwBufferLength;
+ unsigned long *ptr = (unsigned long *)
+ (hdr->lpData + hdr->dwBytesRecorded);
+ *ptr++ = delta; /* dwDeltaTime */
+ *ptr++ = 0; /* dwStream */
+ *ptr++ = msg; /* dwEvent */
+ hdr->dwBytesRecorded += 3 * sizeof(long);
+ /* if the addition of three more words (a message) would extend beyond
+ the buffer length, then return TRUE (full)
+ */
+ return hdr->dwBytesRecorded + 3 * sizeof(long) > hdr->dwBufferLength;
}
static PmTimestamp pm_time_get(midiwinmm_type m)
{
- MMTIME mmtime;
- //MMRESULT wRtn;
- mmtime.wType = TIME_TICKS;
- mmtime.u.ticks = 0;
- midiStreamPosition(m->handle.stream, &mmtime, sizeof(mmtime));
- //assert(wRtn == MMSYSERR_NOERROR);
- return mmtime.u.ticks;
+ MMTIME mmtime;
+ //MMRESULT wRtn;
+ mmtime.wType = TIME_TICKS;
+ mmtime.u.ticks = 0;
+ midiStreamPosition(m->handle.stream, &mmtime, sizeof(mmtime));
+ //assert(wRtn == MMSYSERR_NOERROR);
+ return mmtime.u.ticks;
}
@@ -829,78 +829,78 @@ static PmTimestamp pm_time_get(midiwinmm_type m)
static PmError winmm_out_open(PmInternal *midi, void *driverInfo)
{
- DWORD dwDevice;
- int i = midi->device_id;
- midiwinmm_type m;
- MIDIPROPTEMPO propdata;
- MIDIPROPTIMEDIV divdata;
- int max_sysex_len = midi->buffer_len * 4;
- int output_buffer_len;
- int num_buffers;
+ DWORD dwDevice;
+ int i = midi->device_id;
+ midiwinmm_type m;
+ MIDIPROPTEMPO propdata;
+ MIDIPROPTIMEDIV divdata;
+ int max_sysex_len = midi->buffer_len * 4;
+ int output_buffer_len;
+ int num_buffers;
dwDevice = (DWORD)(FPTR) descriptors[i].descriptor;
- /* create system dependent device data */
- m = (midiwinmm_type) pm_alloc(sizeof(midiwinmm_node)); /* create */
- midi->descriptor = m;
- if (!m) goto no_memory;
- m->handle.out = NULL;
- m->buffers = NULL;
- m->num_buffers = 0;
- m->max_buffers = 0;
- m->buffers_expanded = FALSE;
- m->next_buffer = 0;
+ /* create system dependent device data */
+ m = (midiwinmm_type) pm_alloc(sizeof(midiwinmm_node)); /* create */
+ midi->descriptor = m;
+ if (!m) goto no_memory;
+ m->handle.out = NULL;
+ m->buffers = NULL;
+ m->num_buffers = 0;
+ m->max_buffers = 0;
+ m->buffers_expanded = FALSE;
+ m->next_buffer = 0;
#ifdef USE_SYSEX_BUFFERS
- m->sysex_buffers[0] = NULL;
- m->sysex_buffers[1] = NULL;
- m->next_sysex_buffer = 0;
+ m->sysex_buffers[0] = NULL;
+ m->sysex_buffers[1] = NULL;
+ m->next_sysex_buffer = 0;
#endif
- m->last_time = 0;
- m->first_message = TRUE; /* we treat first message as special case */
- m->sysex_mode = FALSE;
- m->sysex_word = 0;
- m->sysex_byte_count = 0;
- m->hdr = NULL;
- m->sync_time = 0;
- m->delta = 0;
- m->error = MMSYSERR_NOERROR;
-
- /* create a signal */
- m->buffer_signal = CreateEvent(NULL, FALSE, FALSE, NULL);
-
- /* this should only fail when there are very serious problems */
- assert(m->buffer_signal);
-
- /* open device */
- if (midi->latency == 0) {
- /* use simple midi out calls */
- pm_hosterror = midiOutOpen(
- (LPHMIDIOUT) & m->handle.out, /* device Handle */
+ m->last_time = 0;
+ m->first_message = TRUE; /* we treat first message as special case */
+ m->sysex_mode = FALSE;
+ m->sysex_word = 0;
+ m->sysex_byte_count = 0;
+ m->hdr = NULL;
+ m->sync_time = 0;
+ m->delta = 0;
+ m->error = MMSYSERR_NOERROR;
+
+ /* create a signal */
+ m->buffer_signal = CreateEvent(NULL, FALSE, FALSE, NULL);
+
+ /* this should only fail when there are very serious problems */
+ assert(m->buffer_signal);
+
+ /* open device */
+ if (midi->latency == 0) {
+ /* use simple midi out calls */
+ pm_hosterror = midiOutOpen(
+ (LPHMIDIOUT) & m->handle.out, /* device Handle */
dwDevice, /* device ID */
/* note: same callback fn as for StreamOpen: */
(DWORD_PTR) winmm_streamout_callback, /* callback fn */
(DWORD_PTR) midi, /* callback instance data */
CALLBACK_FUNCTION); /* callback type */
- } else {
- /* use stream-based midi output (schedulable in future) */
- pm_hosterror = midiStreamOpen(
- &m->handle.stream, /* device Handle */
+ } else {
+ /* use stream-based midi output (schedulable in future) */
+ pm_hosterror = midiStreamOpen(
+ &m->handle.stream, /* device Handle */
(LPUINT) & dwDevice, /* device ID pointer */
1, /* reserved, must be 1 */
(DWORD_PTR) winmm_streamout_callback,
(DWORD_PTR) midi, /* callback instance data */
CALLBACK_FUNCTION);
- }
- if (pm_hosterror != MMSYSERR_NOERROR) {
- goto free_descriptor;
- }
-
- if (midi->latency == 0) {
- num_buffers = NUM_SIMPLE_SYSEX_BUFFERS;
- output_buffer_len = max_sysex_len / num_buffers;
- if (output_buffer_len < MIN_SIMPLE_SYSEX_LEN)
- output_buffer_len = MIN_SIMPLE_SYSEX_LEN;
- } else {
- //long dur = 0;
- //num_buffers = (int)(double)max((double)midi->buffer_len, (double)midi->latency / 2);
+ }
+ if (pm_hosterror != MMSYSERR_NOERROR) {
+ goto free_descriptor;
+ }
+
+ if (midi->latency == 0) {
+ num_buffers = NUM_SIMPLE_SYSEX_BUFFERS;
+ output_buffer_len = max_sysex_len / num_buffers;
+ if (output_buffer_len < MIN_SIMPLE_SYSEX_LEN)
+ output_buffer_len = MIN_SIMPLE_SYSEX_LEN;
+ } else {
+ //long dur = 0;
+ //num_buffers = (int)(double)max((double)midi->buffer_len, (double)midi->latency / 2);
if (midi->buffer_len > (midi->latency / 2))
{
num_buffers = midi->buffer_len;
@@ -910,49 +910,49 @@ static PmError winmm_out_open(PmInternal *midi, void *driverInfo)
num_buffers = (midi->latency / 2);
}
- if (num_buffers < MIN_STREAM_BUFFERS)
- num_buffers = MIN_STREAM_BUFFERS;
- output_buffer_len = STREAM_BUFFER_LEN;
-
- propdata.cbStruct = sizeof(MIDIPROPTEMPO);
- propdata.dwTempo = 480000; /* microseconds per quarter */
- pm_hosterror = midiStreamProperty(m->handle.stream,
- (LPBYTE) & propdata,
- MIDIPROP_SET | MIDIPROP_TEMPO);
- if (pm_hosterror) goto close_device;
-
- divdata.cbStruct = sizeof(MIDIPROPTEMPO);
- divdata.dwTimeDiv = 480; /* divisions per quarter */
- pm_hosterror = midiStreamProperty(m->handle.stream,
- (LPBYTE) & divdata,
- MIDIPROP_SET | MIDIPROP_TIMEDIV);
- if (pm_hosterror) goto close_device;
- }
- /* allocate buffers */
- if (allocate_buffers(m, output_buffer_len, num_buffers))
- goto free_buffers;
- /* start device */
- if (midi->latency != 0) {
- pm_hosterror = midiStreamRestart(m->handle.stream);
- if (pm_hosterror != MMSYSERR_NOERROR) goto free_buffers;
- }
- return pmNoError;
+ if (num_buffers < MIN_STREAM_BUFFERS)
+ num_buffers = MIN_STREAM_BUFFERS;
+ output_buffer_len = STREAM_BUFFER_LEN;
+
+ propdata.cbStruct = sizeof(MIDIPROPTEMPO);
+ propdata.dwTempo = 480000; /* microseconds per quarter */
+ pm_hosterror = midiStreamProperty(m->handle.stream,
+ (LPBYTE) & propdata,
+ MIDIPROP_SET | MIDIPROP_TEMPO);
+ if (pm_hosterror) goto close_device;
+
+ divdata.cbStruct = sizeof(MIDIPROPTEMPO);
+ divdata.dwTimeDiv = 480; /* divisions per quarter */
+ pm_hosterror = midiStreamProperty(m->handle.stream,
+ (LPBYTE) & divdata,
+ MIDIPROP_SET | MIDIPROP_TIMEDIV);
+ if (pm_hosterror) goto close_device;
+ }
+ /* allocate buffers */
+ if (allocate_buffers(m, output_buffer_len, num_buffers))
+ goto free_buffers;
+ /* start device */
+ if (midi->latency != 0) {
+ pm_hosterror = midiStreamRestart(m->handle.stream);
+ if (pm_hosterror != MMSYSERR_NOERROR) goto free_buffers;
+ }
+ return pmNoError;
free_buffers:
- /* buffers are freed below by winmm_out_delete */
+ /* buffers are freed below by winmm_out_delete */
close_device:
- midiOutClose(m->handle.out);
+ midiOutClose(m->handle.out);
free_descriptor:
- midi->descriptor = NULL;
- winmm_out_delete(midi); /* frees buffers and m */
+ midi->descriptor = NULL;
+ winmm_out_delete(midi); /* frees buffers and m */
no_memory:
- if (pm_hosterror) {
- midiOutGetErrorText(pm_hosterror, (char *) pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- //assert(err == MMSYSERR_NOERROR);
- return pmHostError;
- }
- return pmInsufficientMemory;
+ if (pm_hosterror) {
+ midiOutGetErrorText(pm_hosterror, (char *) pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ //assert(err == MMSYSERR_NOERROR);
+ return pmHostError;
+ }
+ return pmInsufficientMemory;
}
@@ -960,100 +960,100 @@ no_memory:
/**/
static void winmm_out_delete(PmInternal *midi)
{
- int i;
- /* delete system dependent device data */
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- if (m) {
- if (m->buffer_signal) {
- /* don't report errors -- better not to stop cleanup */
- CloseHandle(m->buffer_signal);
- }
- /* if using stream output, free buffers */
- for (i = 0; i < m->num_buffers; i++) {
- if (m->buffers[i]) pm_free(m->buffers[i]);
- }
- m->num_buffers = 0;
- pm_free(m->buffers);
- m->max_buffers = 0;
+ int i;
+ /* delete system dependent device data */
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ if (m) {
+ if (m->buffer_signal) {
+ /* don't report errors -- better not to stop cleanup */
+ CloseHandle(m->buffer_signal);
+ }
+ /* if using stream output, free buffers */
+ for (i = 0; i < m->num_buffers; i++) {
+ if (m->buffers[i]) pm_free(m->buffers[i]);
+ }
+ m->num_buffers = 0;
+ pm_free(m->buffers);
+ m->max_buffers = 0;
#ifdef USE_SYSEX_BUFFERS
- /* free sysex buffers */
- for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
- if (m->sysex_buffers[i]) pm_free(m->sysex_buffers[i]);
- }
+ /* free sysex buffers */
+ for (i = 0; i < NUM_SYSEX_BUFFERS; i++) {
+ if (m->sysex_buffers[i]) pm_free(m->sysex_buffers[i]);
+ }
#endif
- }
- midi->descriptor = NULL;
- pm_free(m); /* delete */
+ }
+ midi->descriptor = NULL;
+ pm_free(m); /* delete */
}
/* see comments for winmm_in_close */
static PmError winmm_out_close(PmInternal *midi)
{
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- if (m->handle.out) {
- /* device to close */
- if (midi->latency == 0) {
- pm_hosterror = midiOutClose(m->handle.out);
- } else {
- pm_hosterror = midiStreamClose(m->handle.stream);
- }
- /* regardless of outcome, free memory */
- winmm_out_delete(midi);
- }
- if (pm_hosterror) {
- midiOutGetErrorText(pm_hosterror,
- (char *) pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- //assert(err == MMSYSERR_NOERROR);
- return pmHostError;
- }
- return pmNoError;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ if (m->handle.out) {
+ /* device to close */
+ if (midi->latency == 0) {
+ pm_hosterror = midiOutClose(m->handle.out);
+ } else {
+ pm_hosterror = midiStreamClose(m->handle.stream);
+ }
+ /* regardless of outcome, free memory */
+ winmm_out_delete(midi);
+ }
+ if (pm_hosterror) {
+ midiOutGetErrorText(pm_hosterror,
+ (char *) pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ //assert(err == MMSYSERR_NOERROR);
+ return pmHostError;
+ }
+ return pmNoError;
}
static PmError winmm_out_abort(PmInternal *midi)
{
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- m->error = MMSYSERR_NOERROR;
-
- /* only stop output streams */
- if (midi->latency > 0) {
- m->error = midiStreamStop(m->handle.stream);
- }
- return m->error ? pmHostError : pmNoError;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ m->error = MMSYSERR_NOERROR;
+
+ /* only stop output streams */
+ if (midi->latency > 0) {
+ m->error = midiStreamStop(m->handle.stream);
+ }
+ return m->error ? pmHostError : pmNoError;
}
static PmError winmm_write_flush(PmInternal *midi, PmTimestamp timestamp)
{
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- assert(m);
- if (m->hdr) {
- m->error = midiOutPrepareHeader(m->handle.out, m->hdr,
- sizeof(MIDIHDR));
- if (m->error) {
- /* do not send message */
- } else if (midi->latency == 0) {
- /* As pointed out by Nigel Brown, 20Sep06, dwBytesRecorded
- * should be zero. This is set in get_free_sysex_buffer().
- * The msg length goes in dwBufferLength in spite of what
- * Microsoft documentation says (or doesn't say). */
- m->hdr->dwBufferLength = m->hdr->dwBytesRecorded;
- m->hdr->dwBytesRecorded = 0;
- m->error = midiOutLongMsg(m->handle.out, m->hdr, sizeof(MIDIHDR));
- } else {
- m->error = midiStreamOut(m->handle.stream, m->hdr,
- sizeof(MIDIHDR));
- }
- midi->fill_base = NULL;
- m->hdr = NULL;
- if (m->error) {
- m->hdr->dwFlags = 0; /* release the buffer */
- return pmHostError;
- }
- }
- return pmNoError;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ assert(m);
+ if (m->hdr) {
+ m->error = midiOutPrepareHeader(m->handle.out, m->hdr,
+ sizeof(MIDIHDR));
+ if (m->error) {
+ /* do not send message */
+ } else if (midi->latency == 0) {
+ /* As pointed out by Nigel Brown, 20Sep06, dwBytesRecorded
+ * should be zero. This is set in get_free_sysex_buffer().
+ * The msg length goes in dwBufferLength in spite of what
+ * Microsoft documentation says (or doesn't say). */
+ m->hdr->dwBufferLength = m->hdr->dwBytesRecorded;
+ m->hdr->dwBytesRecorded = 0;
+ m->error = midiOutLongMsg(m->handle.out, m->hdr, sizeof(MIDIHDR));
+ } else {
+ m->error = midiStreamOut(m->handle.stream, m->hdr,
+ sizeof(MIDIHDR));
+ }
+ midi->fill_base = NULL;
+ m->hdr = NULL;
+ if (m->error) {
+ m->hdr->dwFlags = 0; /* release the buffer */
+ return pmHostError;
+ }
+ }
+ return pmNoError;
}
@@ -1061,311 +1061,311 @@ static PmError winmm_write_flush(PmInternal *midi, PmTimestamp timestamp)
#ifdef GARBAGE
static PmError winmm_write_sysex_byte(PmInternal *midi, unsigned char byte)
{
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- unsigned char *msg_buffer;
-
- /* at the beginning of sysex, m->hdr is NULL */
- if (!m->hdr) { /* allocate a buffer if none allocated yet */
- m->hdr = get_free_output_buffer(midi);
- if (!m->hdr) return pmInsufficientMemory;
- m->sysex_byte_count = 0;
- }
- /* figure out where to write byte */
- msg_buffer = (unsigned char *) (m->hdr->lpData);
- assert(m->hdr->lpData == (char *) (m->hdr + 1));
-
- /* check for overflow */
- if (m->sysex_byte_count >= m->hdr->dwBufferLength) {
- /* allocate a bigger message -- double it every time */
- LPMIDIHDR big = allocate_buffer(m->sysex_byte_count * 2);
- /* printf("expand to %d bytes\n", m->sysex_byte_count * 2); */
- if (!big) return pmInsufficientMemory;
- m->error = midiOutPrepareHeader(m->handle.out, big,
- sizeof(MIDIHDR));
- if (m->error) {
- m->hdr = NULL;
- return pmHostError;
- }
- memcpy(big->lpData, msg_buffer, m->sysex_byte_count);
- msg_buffer = (unsigned char *) (big->lpData);
- if (m->buffers[0] == m->hdr) {
- m->buffers[0] = big;
- pm_free(m->hdr);
- /* printf("freed m->hdr\n"); */
- } else if (m->buffers[1] == m->hdr) {
- m->buffers[1] = big;
- pm_free(m->hdr);
- /* printf("freed m->hdr\n"); */
- }
- m->hdr = big;
- }
-
- /* append byte to message */
- msg_buffer[m->sysex_byte_count++] = byte;
-
- /* see if we have a complete message */
- if (byte == MIDI_EOX) {
- m->hdr->dwBytesRecorded = m->sysex_byte_count;
- /*
- { int i; int len = m->hdr->dwBytesRecorded;
- printf("OutLongMsg %d ", len);
- for (i = 0; i < len; i++) {
- printf("%2x ", msg_buffer[i]);
- }
- }
- */
- m->error = midiOutLongMsg(m->handle.out, m->hdr, sizeof(MIDIHDR));
- m->hdr = NULL; /* stop using this message buffer */
- if (m->error) return pmHostError;
- }
- return pmNoError;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ unsigned char *msg_buffer;
+
+ /* at the beginning of sysex, m->hdr is NULL */
+ if (!m->hdr) { /* allocate a buffer if none allocated yet */
+ m->hdr = get_free_output_buffer(midi);
+ if (!m->hdr) return pmInsufficientMemory;
+ m->sysex_byte_count = 0;
+ }
+ /* figure out where to write byte */
+ msg_buffer = (unsigned char *) (m->hdr->lpData);
+ assert(m->hdr->lpData == (char *) (m->hdr + 1));
+
+ /* check for overflow */
+ if (m->sysex_byte_count >= m->hdr->dwBufferLength) {
+ /* allocate a bigger message -- double it every time */
+ LPMIDIHDR big = allocate_buffer(m->sysex_byte_count * 2);
+ /* printf("expand to %d bytes\n", m->sysex_byte_count * 2); */
+ if (!big) return pmInsufficientMemory;
+ m->error = midiOutPrepareHeader(m->handle.out, big,
+ sizeof(MIDIHDR));
+ if (m->error) {
+ m->hdr = NULL;
+ return pmHostError;
+ }
+ memcpy(big->lpData, msg_buffer, m->sysex_byte_count);
+ msg_buffer = (unsigned char *) (big->lpData);
+ if (m->buffers[0] == m->hdr) {
+ m->buffers[0] = big;
+ pm_free(m->hdr);
+ /* printf("freed m->hdr\n"); */
+ } else if (m->buffers[1] == m->hdr) {
+ m->buffers[1] = big;
+ pm_free(m->hdr);
+ /* printf("freed m->hdr\n"); */
+ }
+ m->hdr = big;
+ }
+
+ /* append byte to message */
+ msg_buffer[m->sysex_byte_count++] = byte;
+
+ /* see if we have a complete message */
+ if (byte == MIDI_EOX) {
+ m->hdr->dwBytesRecorded = m->sysex_byte_count;
+ /*
+ { int i; int len = m->hdr->dwBytesRecorded;
+ printf("OutLongMsg %d ", len);
+ for (i = 0; i < len; i++) {
+ printf("%2x ", msg_buffer[i]);
+ }
+ }
+ */
+ m->error = midiOutLongMsg(m->handle.out, m->hdr, sizeof(MIDIHDR));
+ m->hdr = NULL; /* stop using this message buffer */
+ if (m->error) return pmHostError;
+ }
+ return pmNoError;
}
#endif
static PmError winmm_write_short(PmInternal *midi, PmEvent *event)
{
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- PmError rslt = pmNoError;
- assert(m);
-
- if (midi->latency == 0) { /* use midiOut interface, ignore timestamps */
- m->error = midiOutShortMsg(m->handle.out, event->message);
- if (m->error) rslt = pmHostError;
- } else { /* use midiStream interface -- pass data through buffers */
- unsigned long when = event->timestamp;
- unsigned long delta;
- int full;
- if (when == 0) when = midi->now;
- /* when is in real_time; translate to intended stream time */
- when = when + m->delta + midi->latency;
- /* make sure we don't go backward in time */
- if (when < m->last_time) when = m->last_time;
- delta = when - m->last_time;
- m->last_time = when;
- /* before we insert any data, we must have a buffer */
- if (m->hdr == NULL) {
- /* stream interface: buffers allocated when stream is opened */
- m->hdr = get_free_output_buffer(midi);
- }
- full = add_to_buffer(m, m->hdr, delta, event->message);
- if (full) rslt = winmm_write_flush(midi, when);
- }
- return rslt;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ PmError rslt = pmNoError;
+ assert(m);
+
+ if (midi->latency == 0) { /* use midiOut interface, ignore timestamps */
+ m->error = midiOutShortMsg(m->handle.out, event->message);
+ if (m->error) rslt = pmHostError;
+ } else { /* use midiStream interface -- pass data through buffers */
+ unsigned long when = event->timestamp;
+ unsigned long delta;
+ int full;
+ if (when == 0) when = midi->now;
+ /* when is in real_time; translate to intended stream time */
+ when = when + m->delta + midi->latency;
+ /* make sure we don't go backward in time */
+ if (when < m->last_time) when = m->last_time;
+ delta = when - m->last_time;
+ m->last_time = when;
+ /* before we insert any data, we must have a buffer */
+ if (m->hdr == NULL) {
+ /* stream interface: buffers allocated when stream is opened */
+ m->hdr = get_free_output_buffer(midi);
+ }
+ full = add_to_buffer(m, m->hdr, delta, event->message);
+ if (full) rslt = winmm_write_flush(midi, when);
+ }
+ return rslt;
}
#define winmm_begin_sysex winmm_write_flush
#ifndef winmm_begin_sysex
static PmError winmm_begin_sysex(PmInternal *midi, PmTimestamp timestamp)
{
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- PmError rslt = pmNoError;
-
- if (midi->latency == 0) {
- /* do nothing -- it's handled in winmm_write_byte */
- } else {
- /* sysex expects an empty sysex buffer, so send whatever is here */
- rslt = winmm_write_flush(midi);
- }
- return rslt;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ PmError rslt = pmNoError;
+
+ if (midi->latency == 0) {
+ /* do nothing -- it's handled in winmm_write_byte */
+ } else {
+ /* sysex expects an empty sysex buffer, so send whatever is here */
+ rslt = winmm_write_flush(midi);
+ }
+ return rslt;
}
#endif
static PmError winmm_end_sysex(PmInternal *midi, PmTimestamp timestamp)
{
- /* could check for callback_error here, but I haven't checked
- * what happens if we exit early and don't finish the sysex msg
- * and clean up
- */
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- PmError rslt = pmNoError;
- LPMIDIHDR hdr = m->hdr;
- if (!hdr) return rslt; /* something bad happened earlier,
- do not report an error because it would have been
+ /* could check for callback_error here, but I haven't checked
+ * what happens if we exit early and don't finish the sysex msg
+ * and clean up
+ */
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ PmError rslt = pmNoError;
+ LPMIDIHDR hdr = m->hdr;
+ if (!hdr) return rslt; /* something bad happened earlier,
+ do not report an error because it would have been
reported (at least) once already */
- /* a(n old) version of MIDI YOKE requires a zero byte after
- * the sysex message, but do not increment dwBytesRecorded: */
- hdr->lpData[hdr->dwBytesRecorded] = 0;
- if (midi->latency == 0) {
+ /* a(n old) version of MIDI YOKE requires a zero byte after
+ * the sysex message, but do not increment dwBytesRecorded: */
+ hdr->lpData[hdr->dwBytesRecorded] = 0;
+ if (midi->latency == 0) {
#ifdef DEBUG_PRINT_BEFORE_SENDING_SYSEX
- /* DEBUG CODE: */
- { int i; int len = m->hdr->dwBufferLength;
- printf("OutLongMsg %d ", len);
- for (i = 0; i < len; i++) {
- printf("%2x ", (unsigned char) (m->hdr->lpData[i]));
- }
- }
+ /* DEBUG CODE: */
+ { int i; int len = m->hdr->dwBufferLength;
+ printf("OutLongMsg %d ", len);
+ for (i = 0; i < len; i++) {
+ printf("%2x ", (unsigned char) (m->hdr->lpData[i]));
+ }
+ }
#endif
- } else {
- /* Using stream interface. There are accumulated bytes in m->hdr
- to send using midiStreamOut
- */
- /* add bytes recorded to MIDIEVENT length, but don't
- count the MIDIEVENT data (3 longs) */
- MIDIEVENT *evt = (MIDIEVENT *) (hdr->lpData);
- evt->dwEvent += hdr->dwBytesRecorded - 3 * sizeof(long);
- /* round up BytesRecorded to multiple of 4 */
- hdr->dwBytesRecorded = (hdr->dwBytesRecorded + 3) & ~3;
- }
- rslt = winmm_write_flush(midi, timestamp);
- return rslt;
+ } else {
+ /* Using stream interface. There are accumulated bytes in m->hdr
+ to send using midiStreamOut
+ */
+ /* add bytes recorded to MIDIEVENT length, but don't
+ count the MIDIEVENT data (3 longs) */
+ MIDIEVENT *evt = (MIDIEVENT *) (hdr->lpData);
+ evt->dwEvent += hdr->dwBytesRecorded - 3 * sizeof(long);
+ /* round up BytesRecorded to multiple of 4 */
+ hdr->dwBytesRecorded = (hdr->dwBytesRecorded + 3) & ~3;
+ }
+ rslt = winmm_write_flush(midi, timestamp);
+ return rslt;
}
static PmError winmm_write_byte(PmInternal *midi, unsigned char byte,
- PmTimestamp timestamp)
+ PmTimestamp timestamp)
{
- /* write a sysex byte */
- PmError rslt = pmNoError;
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- LPMIDIHDR hdr = m->hdr;
- unsigned char *msg_buffer;
- assert(m);
- if (!hdr) {
- m->hdr = hdr = get_free_output_buffer(midi);
- assert(hdr);
+ /* write a sysex byte */
+ PmError rslt = pmNoError;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ LPMIDIHDR hdr = m->hdr;
+ unsigned char *msg_buffer;
+ assert(m);
+ if (!hdr) {
+ m->hdr = hdr = get_free_output_buffer(midi);
+ assert(hdr);
midi->fill_base = (unsigned char *)(FPTR) m->hdr->lpData;
midi->fill_offset_ptr = (uint32_t *)&(hdr->dwBytesRecorded);
-
- /* when buffer fills, Pm_WriteSysEx will revert to calling
- * pmwin_write_byte, which expect to have space, so leave
- * one byte free for pmwin_write_byte. Leave another byte
- * of space for zero after message to make early version of
- * MIDI YOKE driver happy -- therefore dwBufferLength - 2 */
- midi->fill_length = hdr->dwBufferLength - 2;
- if (midi->latency != 0) {
- unsigned long when = (unsigned long) timestamp;
- unsigned long delta;
- unsigned long *ptr;
- if (when == 0) when = midi->now;
- /* when is in real_time; translate to intended stream time */
- when = when + m->delta + midi->latency;
- /* make sure we don't go backward in time */
- if (when < m->last_time) when = m->last_time;
- delta = when - m->last_time;
- m->last_time = when;
-
- ptr = (unsigned long *) hdr->lpData;
- *ptr++ = delta;
- *ptr++ = 0;
- *ptr = MEVT_F_LONG;
- hdr->dwBytesRecorded = 3 * sizeof(long);
- /* data will be added at an offset of dwBytesRecorded ... */
- }
- }
- /* add the data byte */
- msg_buffer = (unsigned char *) (hdr->lpData);
- msg_buffer[hdr->dwBytesRecorded++] = byte;
-
- /* see if buffer is full, leave one byte extra for pad */
- if (hdr->dwBytesRecorded >= hdr->dwBufferLength - 1) {
- /* write what we've got and continue */
- rslt = winmm_end_sysex(midi, timestamp);
- }
- return rslt;
+
+ /* when buffer fills, Pm_WriteSysEx will revert to calling
+ * pmwin_write_byte, which expect to have space, so leave
+ * one byte free for pmwin_write_byte. Leave another byte
+ * of space for zero after message to make early version of
+ * MIDI YOKE driver happy -- therefore dwBufferLength - 2 */
+ midi->fill_length = hdr->dwBufferLength - 2;
+ if (midi->latency != 0) {
+ unsigned long when = (unsigned long) timestamp;
+ unsigned long delta;
+ unsigned long *ptr;
+ if (when == 0) when = midi->now;
+ /* when is in real_time; translate to intended stream time */
+ when = when + m->delta + midi->latency;
+ /* make sure we don't go backward in time */
+ if (when < m->last_time) when = m->last_time;
+ delta = when - m->last_time;
+ m->last_time = when;
+
+ ptr = (unsigned long *) hdr->lpData;
+ *ptr++ = delta;
+ *ptr++ = 0;
+ *ptr = MEVT_F_LONG;
+ hdr->dwBytesRecorded = 3 * sizeof(long);
+ /* data will be added at an offset of dwBytesRecorded ... */
+ }
+ }
+ /* add the data byte */
+ msg_buffer = (unsigned char *) (hdr->lpData);
+ msg_buffer[hdr->dwBytesRecorded++] = byte;
+
+ /* see if buffer is full, leave one byte extra for pad */
+ if (hdr->dwBytesRecorded >= hdr->dwBufferLength - 1) {
+ /* write what we've got and continue */
+ rslt = winmm_end_sysex(midi, timestamp);
+ }
+ return rslt;
}
#ifdef EXPANDING_SYSEX_BUFFERS
note: this code is here as an aid in case you want sysex buffers
- to expand to hold large messages completely. If so, you
- will want to change SYSEX_BYTES_PER_BUFFER above to some
- variable that remembers the buffer size. A good place to
- put this value would be in the hdr->dwUser field.
+ to expand to hold large messages completely. If so, you
+ will want to change SYSEX_BYTES_PER_BUFFER above to some
+ variable that remembers the buffer size. A good place to
+ put this value would be in the hdr->dwUser field.
- rslt = resize_sysex_buffer(midi, m->sysex_byte_count,
- m->sysex_byte_count * 2);
+ rslt = resize_sysex_buffer(midi, m->sysex_byte_count,
+ m->sysex_byte_count * 2);
- if (rslt == pmBufferMaxSize) /* if the buffer can't be resized */
+ if (rslt == pmBufferMaxSize) /* if the buffer can't be resized */
#endif
#ifdef EXPANDING_SYSEX_BUFFERS
- int bytesRecorded = hdr->dwBytesRecorded; /* this field gets wiped out, so we'll save it */
- rslt = resize_sysex_buffer(midi, bytesRecorded, 2 * bytesRecorded);
- hdr->dwBytesRecorded = bytesRecorded;
+ int bytesRecorded = hdr->dwBytesRecorded; /* this field gets wiped out, so we'll save it */
+ rslt = resize_sysex_buffer(midi, bytesRecorded, 2 * bytesRecorded);
+ hdr->dwBytesRecorded = bytesRecorded;
- if (rslt == pmBufferMaxSize) /* if buffer can't be resized */
+ if (rslt == pmBufferMaxSize) /* if buffer can't be resized */
#endif
static PmTimestamp winmm_synchronize(PmInternal *midi)
{
- midiwinmm_type m;
- unsigned long pm_stream_time_2;
- unsigned long real_time;
- unsigned long pm_stream_time;
-
- /* only synchronize if we are using stream interface */
- if (midi->latency == 0) return 0;
-
- /* figure out the time */
- m = (midiwinmm_type) midi->descriptor;
- pm_stream_time_2 = pm_time_get(m);
-
- do {
- /* read real_time between two reads of stream time */
- pm_stream_time = pm_stream_time_2;
- real_time = (*midi->time_proc)(midi->time_info);
- pm_stream_time_2 = pm_time_get(m);
- /* repeat if more than 1ms elapsed */
- } while (pm_stream_time_2 > pm_stream_time + 1);
- m->delta = pm_stream_time - real_time;
- m->sync_time = real_time;
- return real_time;
+ midiwinmm_type m;
+ unsigned long pm_stream_time_2;
+ unsigned long real_time;
+ unsigned long pm_stream_time;
+
+ /* only synchronize if we are using stream interface */
+ if (midi->latency == 0) return 0;
+
+ /* figure out the time */
+ m = (midiwinmm_type) midi->descriptor;
+ pm_stream_time_2 = pm_time_get(m);
+
+ do {
+ /* read real_time between two reads of stream time */
+ pm_stream_time = pm_stream_time_2;
+ real_time = (*midi->time_proc)(midi->time_info);
+ pm_stream_time_2 = pm_time_get(m);
+ /* repeat if more than 1ms elapsed */
+ } while (pm_stream_time_2 > pm_stream_time + 1);
+ m->delta = pm_stream_time - real_time;
+ m->sync_time = real_time;
+ return real_time;
}
#ifdef USE_SYSEX_BUFFERS
/* winmm_out_callback -- recycle sysex buffers */
static void CALLBACK winmm_out_callback(HMIDIOUT hmo, UINT wMsg,
- DWORD dwInstance, DWORD dwParam1,
- DWORD dwParam2)
+ DWORD dwInstance, DWORD dwParam1,
+ DWORD dwParam2)
{
- PmInternal *midi = (PmInternal *) dwInstance;
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- LPMIDIHDR hdr = (LPMIDIHDR) dwParam1;
- int err = 0; /* set to 0 so that no buffer match will also be an error */
-
- /* Future optimization: eliminate UnprepareHeader calls -- they aren't
- necessary; however, this code uses the prepared-flag to indicate which
- buffers are free, so we need to do something to flag empty buffers if
- we leave them prepared
- */
- /*
- printf("out_callback: hdr %x, wMsg %x, MOM_DONE %x\n",
- hdr, wMsg, MOM_DONE);
- */
- if (wMsg == MOM_DONE) {
- MMRESULT ret = midiOutUnprepareHeader(m->handle.out, hdr,
- sizeof(MIDIHDR));
- assert(ret == MMSYSERR_NOERROR);
- }
- /* notify waiting sender that a buffer is available */
- err = SetEvent(m->buffer_signal);
- assert(err); /* false -> error */
+ PmInternal *midi = (PmInternal *) dwInstance;
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ LPMIDIHDR hdr = (LPMIDIHDR) dwParam1;
+ int err = 0; /* set to 0 so that no buffer match will also be an error */
+
+ /* Future optimization: eliminate UnprepareHeader calls -- they aren't
+ necessary; however, this code uses the prepared-flag to indicate which
+ buffers are free, so we need to do something to flag empty buffers if
+ we leave them prepared
+ */
+ /*
+ printf("out_callback: hdr %x, wMsg %x, MOM_DONE %x\n",
+ hdr, wMsg, MOM_DONE);
+ */
+ if (wMsg == MOM_DONE) {
+ MMRESULT ret = midiOutUnprepareHeader(m->handle.out, hdr,
+ sizeof(MIDIHDR));
+ assert(ret == MMSYSERR_NOERROR);
+ }
+ /* notify waiting sender that a buffer is available */
+ err = SetEvent(m->buffer_signal);
+ assert(err); /* false -> error */
}
#endif
/* winmm_streamout_callback -- unprepare (free) buffer header */
static void CALLBACK winmm_streamout_callback(HMIDIOUT hmo, UINT wMsg,
- DWORD dwInstance, DWORD dwParam1, DWORD dwParam2)
+ DWORD dwInstance, DWORD dwParam1, DWORD dwParam2)
{
PmInternal *midi = (PmInternal *)(FPTR) dwInstance;
LPMIDIHDR hdr = (LPMIDIHDR)(FPTR) dwParam1;
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- //int err;
-
- /* Even if an error is pending, I think we should unprepare msgs and
- signal their arrival
- */
- /* printf("streamout_callback: hdr %x, wMsg %x, MOM_DONE %x\n",
- hdr, wMsg, MOM_DONE); */
- if (wMsg == MOM_DONE) {
- midiOutUnprepareHeader(m->handle.out, hdr,
- sizeof(MIDIHDR));
- //assert(ret == MMSYSERR_NOERROR);
- }
- /* signal client in case it is blocked waiting for buffer */
- SetEvent(m->buffer_signal);
- //assert(err); /* false -> error */
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ //int err;
+
+ /* Even if an error is pending, I think we should unprepare msgs and
+ signal their arrival
+ */
+ /* printf("streamout_callback: hdr %x, wMsg %x, MOM_DONE %x\n",
+ hdr, wMsg, MOM_DONE); */
+ if (wMsg == MOM_DONE) {
+ midiOutUnprepareHeader(m->handle.out, hdr,
+ sizeof(MIDIHDR));
+ //assert(ret == MMSYSERR_NOERROR);
+ }
+ /* signal client in case it is blocked waiting for buffer */
+ SetEvent(m->buffer_signal);
+ //assert(err); /* false -> error */
}
@@ -1377,36 +1377,36 @@ begin exported functions
#define winmm_in_abort pm_fail_fn
pm_fns_node pm_winmm_in_dictionary = {
- none_write_short,
- none_sysex,
- none_sysex,
- none_write_byte,
- none_write_short,
- none_write_flush,
- winmm_synchronize,
- winmm_in_open,
- winmm_in_abort,
- winmm_in_close,
- winmm_in_poll,
- winmm_has_host_error,
- winmm_get_host_error
- };
+ none_write_short,
+ none_sysex,
+ none_sysex,
+ none_write_byte,
+ none_write_short,
+ none_write_flush,
+ winmm_synchronize,
+ winmm_in_open,
+ winmm_in_abort,
+ winmm_in_close,
+ winmm_in_poll,
+ winmm_has_host_error,
+ winmm_get_host_error
+ };
pm_fns_node pm_winmm_out_dictionary = {
- winmm_write_short,
- winmm_begin_sysex,
- winmm_end_sysex,
- winmm_write_byte,
- winmm_write_short, /* short realtime message */
- winmm_write_flush,
- winmm_synchronize,
- winmm_out_open,
- winmm_out_abort,
- winmm_out_close,
- none_poll,
- winmm_has_host_error,
- winmm_get_host_error
- };
+ winmm_write_short,
+ winmm_begin_sysex,
+ winmm_end_sysex,
+ winmm_write_byte,
+ winmm_write_short, /* short realtime message */
+ winmm_write_flush,
+ winmm_synchronize,
+ winmm_out_open,
+ winmm_out_abort,
+ winmm_out_close,
+ none_poll,
+ winmm_has_host_error,
+ winmm_get_host_error
+ };
/* initialize winmm interface. Note that if there is something wrong
@@ -1420,10 +1420,10 @@ pm_fns_node pm_winmm_out_dictionary = {
*/
void pm_winmm_init( void )
{
- pm_winmm_mapper_input();
- pm_winmm_mapper_output();
- pm_winmm_general_inputs();
- pm_winmm_general_outputs();
+ pm_winmm_mapper_input();
+ pm_winmm_mapper_output();
+ pm_winmm_general_inputs();
+ pm_winmm_general_outputs();
}
@@ -1433,50 +1433,50 @@ void pm_winmm_init( void )
*/
void pm_winmm_term( void )
{
- int i;
+ int i;
#ifdef DEBUG
- char msg[PM_HOST_ERROR_MSG_LEN];
+ char msg[PM_HOST_ERROR_MSG_LEN];
#endif
- //int doneAny = 0;
+ //int doneAny = 0;
#ifdef DEBUG
- printf("pm_winmm_term called\n");
+ printf("pm_winmm_term called\n");
#endif
- for (i = 0; i < pm_descriptor_index; i++) {
- PmInternal * midi = descriptors[i].internalDescriptor;
- if (midi) {
- midiwinmm_type m = (midiwinmm_type) midi->descriptor;
- if (m->handle.out) {
- /* close next open device*/
+ for (i = 0; i < pm_descriptor_index; i++) {
+ PmInternal * midi = descriptors[i].internalDescriptor;
+ if (midi) {
+ midiwinmm_type m = (midiwinmm_type) midi->descriptor;
+ if (m->handle.out) {
+ /* close next open device*/
#ifdef DEBUG
- if (doneAny == 0) {
- printf("begin closing open devices...\n");
- doneAny = 1;
- }
- /* report any host errors; this EXTEREMELY useful when
- trying to debug client app */
- if (winmm_has_host_error(midi)) {
- winmm_get_host_error(midi, msg, PM_HOST_ERROR_MSG_LEN);
- printf("%s\n", msg);
- }
+ if (doneAny == 0) {
+ printf("begin closing open devices...\n");
+ doneAny = 1;
+ }
+ /* report any host errors; this EXTEREMELY useful when
+ trying to debug client app */
+ if (winmm_has_host_error(midi)) {
+ winmm_get_host_error(midi, msg, PM_HOST_ERROR_MSG_LEN);
+ printf("%s\n", msg);
+ }
#endif
- /* close all open ports */
- (*midi->dictionary->close)(midi);
- }
- }
- }
- if (midi_in_caps) {
- pm_free(midi_in_caps);
- midi_in_caps = NULL;
- }
- if (midi_out_caps) {
- pm_free(midi_out_caps);
- midi_out_caps = NULL;
- }
+ /* close all open ports */
+ (*midi->dictionary->close)(midi);
+ }
+ }
+ }
+ if (midi_in_caps) {
+ pm_free(midi_in_caps);
+ midi_in_caps = NULL;
+ }
+ if (midi_out_caps) {
+ pm_free(midi_out_caps);
+ midi_out_caps = NULL;
+ }
#ifdef DEBUG
- if (doneAny) {
- printf("warning: devices were left open. They have been closed.\n");
- }
- printf("pm_winmm_term exiting\n");
+ if (doneAny) {
+ printf("warning: devices were left open. They have been closed.\n");
+ }
+ printf("pm_winmm_term exiting\n");
#endif
- pm_descriptor_index = 0;
+ pm_descriptor_index = 0;
}
diff --git a/src/lib/portmidi/pmwinmm.h b/src/lib/portmidi/pmwinmm.h
index 94742001bcd..05bf1fcd5ed 100644
--- a/src/lib/portmidi/pmwinmm.h
+++ b/src/lib/portmidi/pmwinmm.h
@@ -2,4 +2,3 @@
void pm_winmm_init( void );
void pm_winmm_term( void );
-
diff --git a/src/lib/portmidi/portmidi.c b/src/lib/portmidi/portmidi.c
index 2ed9171e781..a0226f67308 100644
--- a/src/lib/portmidi/portmidi.c
+++ b/src/lib/portmidi/portmidi.c
@@ -1,6 +1,6 @@
#ifdef _MSC_VER
- #pragma warning(disable: 4244) // stop warnings about downsize typecasts
- #pragma warning(disable: 4018) // stop warnings about signed/unsigned
+ #pragma warning(disable: 4244) // stop warnings about downsize typecasts
+ #pragma warning(disable: 4018) // stop warnings about signed/unsigned
#endif
#include "stdlib.h"
@@ -52,29 +52,29 @@ char pm_hosterror_text[PM_HOST_ERROR_MSG_LEN];
static void prompt_and_exit(void)
{
- char line[STRING_MAX];
- printf("type ENTER...");
- fgets(line, STRING_MAX, stdin);
- /* this will clean up open ports: */
- exit(-1);
+ char line[STRING_MAX];
+ printf("type ENTER...");
+ fgets(line, STRING_MAX, stdin);
+ /* this will clean up open ports: */
+ exit(-1);
}
static PmError pm_errmsg(PmError err)
{
- if (err == pmHostError) {
- /* it seems pointless to allocate memory and copy the string,
- * so I will do the work of Pm_GetHostErrorText directly
- */
- printf("PortMidi found host error...\n %s\n", pm_hosterror_text);
- pm_hosterror = FALSE;
- pm_hosterror_text[0] = 0; /* clear the message */
- prompt_and_exit();
- } else if (err < 0) {
- printf("PortMidi call failed...\n %s\n", Pm_GetErrorText(err));
- prompt_and_exit();
- }
- return err;
+ if (err == pmHostError) {
+ /* it seems pointless to allocate memory and copy the string,
+ * so I will do the work of Pm_GetHostErrorText directly
+ */
+ printf("PortMidi found host error...\n %s\n", pm_hosterror_text);
+ pm_hosterror = FALSE;
+ pm_hosterror_text[0] = 0; /* clear the message */
+ prompt_and_exit();
+ } else if (err < 0) {
+ printf("PortMidi call failed...\n %s\n", Pm_GetErrorText(err));
+ prompt_and_exit();
+ }
+ return err;
}
#else
#define pm_errmsg(err) err
@@ -90,80 +90,80 @@ int pm_descriptor_max = 0;
int pm_descriptor_index = 0;
descriptor_type descriptors = NULL;
-/* pm_add_device -- describe interface/device pair to library
+/* pm_add_device -- describe interface/device pair to library
*
- * This is called at intialization time, once for each
+ * This is called at intialization time, once for each
* interface (e.g. DirectSound) and device (e.g. SoundBlaster 1)
* The strings are retained but NOT COPIED, so do not destroy them!
*
* returns pmInvalidDeviceId if device memory is exceeded
* otherwise returns pmNoError
*/
-PmError pm_add_device(char *interf, char *name, int input,
- void *descriptor, pm_fns_type dictionary) {
- if (pm_descriptor_index >= pm_descriptor_max) {
- // expand descriptors
- descriptor_type new_descriptors = (descriptor_type)
- pm_alloc(sizeof(descriptor_node) * (pm_descriptor_max + 32));
- if (!new_descriptors) return pmInsufficientMemory;
- if (descriptors) {
- memcpy(new_descriptors, descriptors,
- sizeof(descriptor_node) * pm_descriptor_max);
- free(descriptors);
- }
- pm_descriptor_max += 32;
- descriptors = new_descriptors;
- }
- descriptors[pm_descriptor_index].pub.interf = interf;
- descriptors[pm_descriptor_index].pub.name = name;
- descriptors[pm_descriptor_index].pub.input = input;
- descriptors[pm_descriptor_index].pub.output = !input;
-
- /* default state: nothing to close (for automatic device closing) */
- descriptors[pm_descriptor_index].pub.opened = FALSE;
-
- /* ID number passed to win32 multimedia API open */
- descriptors[pm_descriptor_index].descriptor = descriptor;
-
- /* points to PmInternal, allows automatic device closing */
- descriptors[pm_descriptor_index].internalDescriptor = NULL;
-
- descriptors[pm_descriptor_index].dictionary = dictionary;
-
- pm_descriptor_index++;
-
- return pmNoError;
+PmError pm_add_device(char *interf, char *name, int input,
+ void *descriptor, pm_fns_type dictionary) {
+ if (pm_descriptor_index >= pm_descriptor_max) {
+ // expand descriptors
+ descriptor_type new_descriptors = (descriptor_type)
+ pm_alloc(sizeof(descriptor_node) * (pm_descriptor_max + 32));
+ if (!new_descriptors) return pmInsufficientMemory;
+ if (descriptors) {
+ memcpy(new_descriptors, descriptors,
+ sizeof(descriptor_node) * pm_descriptor_max);
+ free(descriptors);
+ }
+ pm_descriptor_max += 32;
+ descriptors = new_descriptors;
+ }
+ descriptors[pm_descriptor_index].pub.interf = interf;
+ descriptors[pm_descriptor_index].pub.name = name;
+ descriptors[pm_descriptor_index].pub.input = input;
+ descriptors[pm_descriptor_index].pub.output = !input;
+
+ /* default state: nothing to close (for automatic device closing) */
+ descriptors[pm_descriptor_index].pub.opened = FALSE;
+
+ /* ID number passed to win32 multimedia API open */
+ descriptors[pm_descriptor_index].descriptor = descriptor;
+
+ /* points to PmInternal, allows automatic device closing */
+ descriptors[pm_descriptor_index].internalDescriptor = NULL;
+
+ descriptors[pm_descriptor_index].dictionary = dictionary;
+
+ pm_descriptor_index++;
+
+ return pmNoError;
}
-/* utility to look up device, given a pattern,
+/* utility to look up device, given a pattern,
note: pattern is modified
*/
int pm_find_default_device(char *pattern, int is_input)
{
- int id = pmNoDevice;
- int i;
- /* first parse pattern into name, interf parts */
- char *interf_pref = (char *)""; /* initially assume it is not there */
- char *name_pref = strstr(pattern, ", ");
-
- if (name_pref) { /* found separator, adjust the pointer */
- interf_pref = pattern;
- name_pref[0] = 0;
- name_pref += 2;
- } else {
- name_pref = pattern; /* whole string is the name pattern */
- }
- for (i = 0; i < pm_descriptor_index; i++) {
- const PmDeviceInfo *info = Pm_GetDeviceInfo(i);
- if (info->input == is_input &&
- strstr(info->name, name_pref) &&
- strstr(info->interf, interf_pref)) {
- id = i;
- break;
- }
- }
- return id;
+ int id = pmNoDevice;
+ int i;
+ /* first parse pattern into name, interf parts */
+ char *interf_pref = (char *)""; /* initially assume it is not there */
+ char *name_pref = strstr(pattern, ", ");
+
+ if (name_pref) { /* found separator, adjust the pointer */
+ interf_pref = pattern;
+ name_pref[0] = 0;
+ name_pref += 2;
+ } else {
+ name_pref = pattern; /* whole string is the name pattern */
+ }
+ for (i = 0; i < pm_descriptor_index; i++) {
+ const PmDeviceInfo *info = Pm_GetDeviceInfo(i);
+ if (info->input == is_input &&
+ strstr(info->name, name_pref) &&
+ strstr(info->interf, interf_pref)) {
+ id = i;
+ break;
+ }
+ }
+ return id;
}
@@ -174,118 +174,118 @@ portmidi implementation
*/
PMEXPORT int Pm_CountDevices( void ) {
- Pm_Initialize();
- /* no error checking -- Pm_Initialize() does not fail */
- return pm_descriptor_index;
+ Pm_Initialize();
+ /* no error checking -- Pm_Initialize() does not fail */
+ return pm_descriptor_index;
}
PMEXPORT const PmDeviceInfo* Pm_GetDeviceInfo( PmDeviceID id ) {
- Pm_Initialize(); /* no error check needed */
- if (id >= 0 && id < pm_descriptor_index) {
- return &descriptors[id].pub;
- }
- return NULL;
+ Pm_Initialize(); /* no error check needed */
+ if (id >= 0 && id < pm_descriptor_index) {
+ return &descriptors[id].pub;
+ }
+ return NULL;
}
/* pm_success_fn -- "noop" function pointer */
PmError pm_success_fn(PmInternal *midi) {
- return pmNoError;
+ return pmNoError;
}
/* none_write -- returns an error if called */
PmError none_write_short(PmInternal *midi, PmEvent *buffer) {
- return pmBadPtr;
+ return pmBadPtr;
}
/* pm_fail_timestamp_fn -- placeholder for begin_sysex and flush */
PmError pm_fail_timestamp_fn(PmInternal *midi, PmTimestamp timestamp) {
- return pmBadPtr;
+ return pmBadPtr;
}
-PmError none_write_byte(PmInternal *midi, unsigned char byte,
- PmTimestamp timestamp) {
- return pmBadPtr;
+PmError none_write_byte(PmInternal *midi, unsigned char byte,
+ PmTimestamp timestamp) {
+ return pmBadPtr;
}
/* pm_fail_fn -- generic function, returns error if called */
PmError pm_fail_fn(PmInternal *midi) {
- return pmBadPtr;
+ return pmBadPtr;
}
static PmError none_open(PmInternal *midi, void *driverInfo) {
- return pmBadPtr;
+ return pmBadPtr;
}
static void none_get_host_error(PmInternal * midi, char * msg, unsigned int len) {
- *msg = 0; // empty string
+ *msg = 0; // empty string
}
static unsigned int none_has_host_error(PmInternal * midi) {
- return FALSE;
+ return FALSE;
}
PmTimestamp none_synchronize(PmInternal *midi) {
- return 0;
+ return 0;
}
#define none_abort pm_fail_fn
#define none_close pm_fail_fn
pm_fns_node pm_none_dictionary = {
- none_write_short,
- none_sysex,
- none_sysex,
- none_write_byte,
- none_write_short,
- none_write_flush,
- none_synchronize,
- none_open,
- none_abort,
- none_close,
- none_poll,
- none_has_host_error,
- none_get_host_error
+ none_write_short,
+ none_sysex,
+ none_sysex,
+ none_write_byte,
+ none_write_short,
+ none_write_flush,
+ none_synchronize,
+ none_open,
+ none_abort,
+ none_close,
+ none_poll,
+ none_has_host_error,
+ none_get_host_error
};
PMEXPORT const char *Pm_GetErrorText( PmError errnum ) {
- const char *msg;
-
- switch(errnum)
- {
- case pmNoError:
- msg = "";
- break;
- case pmHostError:
- msg = "PortMidi: `Host error'";
- break;
- case pmInvalidDeviceId:
- msg = "PortMidi: `Invalid device ID'";
- break;
- case pmInsufficientMemory:
- msg = "PortMidi: `Insufficient memory'";
- break;
- case pmBufferTooSmall:
- msg = "PortMidi: `Buffer too small'";
- break;
- case pmBadPtr:
- msg = "PortMidi: `Bad pointer'";
- break;
- case pmInternalError:
- msg = "PortMidi: `Internal PortMidi Error'";
- break;
- case pmBufferOverflow:
- msg = "PortMidi: `Buffer overflow'";
- break;
- case pmBadData:
- msg = "PortMidi: `Invalid MIDI message Data'";
- break;
- case pmBufferMaxSize:
- msg = "PortMidi: `Buffer cannot be made larger'";
- break;
- default:
- msg = "PortMidi: `Illegal error number'";
- break;
- }
- return msg;
+ const char *msg;
+
+ switch(errnum)
+ {
+ case pmNoError:
+ msg = "";
+ break;
+ case pmHostError:
+ msg = "PortMidi: `Host error'";
+ break;
+ case pmInvalidDeviceId:
+ msg = "PortMidi: `Invalid device ID'";
+ break;
+ case pmInsufficientMemory:
+ msg = "PortMidi: `Insufficient memory'";
+ break;
+ case pmBufferTooSmall:
+ msg = "PortMidi: `Buffer too small'";
+ break;
+ case pmBadPtr:
+ msg = "PortMidi: `Bad pointer'";
+ break;
+ case pmInternalError:
+ msg = "PortMidi: `Internal PortMidi Error'";
+ break;
+ case pmBufferOverflow:
+ msg = "PortMidi: `Buffer overflow'";
+ break;
+ case pmBadData:
+ msg = "PortMidi: `Invalid MIDI message Data'";
+ break;
+ case pmBufferMaxSize:
+ msg = "PortMidi: `Buffer cannot be made larger'";
+ break;
+ default:
+ msg = "PortMidi: `Illegal error number'";
+ break;
+ }
+ return msg;
}
@@ -293,60 +293,60 @@ PMEXPORT const char *Pm_GetErrorText( PmError errnum ) {
* The error will always be in the global pm_hosterror_text.
*/
PMEXPORT void Pm_GetHostErrorText(char * msg, unsigned int len) {
- assert(msg);
- assert(len > 0);
- if (pm_hosterror) {
- strncpy(msg, (char *) pm_hosterror_text, len);
- pm_hosterror = FALSE;
- pm_hosterror_text[0] = 0; /* clear the message; not necessary, but it
+ assert(msg);
+ assert(len > 0);
+ if (pm_hosterror) {
+ strncpy(msg, (char *) pm_hosterror_text, len);
+ pm_hosterror = FALSE;
+ pm_hosterror_text[0] = 0; /* clear the message; not necessary, but it
might help with debugging */
- msg[len - 1] = 0; /* make sure string is terminated */
- } else {
- msg[0] = 0; /* no string to return */
- }
+ msg[len - 1] = 0; /* make sure string is terminated */
+ } else {
+ msg[0] = 0; /* no string to return */
+ }
}
PMEXPORT int Pm_HasHostError(PortMidiStream * stream) {
- if (pm_hosterror) return TRUE;
- if (stream) {
- PmInternal * midi = (PmInternal *) stream;
- pm_hosterror = (*midi->dictionary->has_host_error)(midi);
- if (pm_hosterror) {
- midi->dictionary->host_error(midi, pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- /* now error message is global */
- return TRUE;
- }
- }
- return FALSE;
+ if (pm_hosterror) return TRUE;
+ if (stream) {
+ PmInternal * midi = (PmInternal *) stream;
+ pm_hosterror = (*midi->dictionary->has_host_error)(midi);
+ if (pm_hosterror) {
+ midi->dictionary->host_error(midi, pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ /* now error message is global */
+ return TRUE;
+ }
+ }
+ return FALSE;
}
PMEXPORT PmError Pm_Initialize( void ) {
- if (!pm_initialized) {
- pm_hosterror = FALSE;
- pm_hosterror_text[0] = 0; /* the null string */
- pm_init();
- pm_initialized = TRUE;
- }
- return pmNoError;
+ if (!pm_initialized) {
+ pm_hosterror = FALSE;
+ pm_hosterror_text[0] = 0; /* the null string */
+ pm_init();
+ pm_initialized = TRUE;
+ }
+ return pmNoError;
}
PMEXPORT PmError Pm_Terminate( void ) {
- if (pm_initialized) {
- pm_term();
- // if there are no devices, descriptors might still be NULL
- if (descriptors != NULL) {
- free(descriptors);
- descriptors = NULL;
- }
- pm_descriptor_index = 0;
- pm_descriptor_max = 0;
- pm_initialized = FALSE;
- }
- return pmNoError;
+ if (pm_initialized) {
+ pm_term();
+ // if there are no devices, descriptors might still be NULL
+ if (descriptors != NULL) {
+ free(descriptors);
+ descriptors = NULL;
+ }
+ pm_descriptor_index = 0;
+ pm_descriptor_max = 0;
+ pm_initialized = FALSE;
+ }
+ return pmNoError;
}
@@ -355,89 +355,89 @@ PMEXPORT PmError Pm_Terminate( void ) {
* returns number of messages actually read, or error code
*/
PMEXPORT int Pm_Read(PortMidiStream *stream, PmEvent *buffer, int32_t length) {
- PmInternal *midi = (PmInternal *) stream;
- int n = 0;
- PmError err = pmNoError;
- pm_hosterror = FALSE;
- /* arg checking */
- if(midi == NULL)
- err = pmBadPtr;
- else if(!descriptors[midi->device_id].pub.opened)
- err = pmBadPtr;
- else if(!descriptors[midi->device_id].pub.input)
- err = pmBadPtr;
- /* First poll for data in the buffer...
- * This either simply checks for data, or attempts first to fill the buffer
- * with data from the MIDI hardware; this depends on the implementation.
- * We could call Pm_Poll here, but that would redo a lot of redundant
- * parameter checking, so I copied some code from Pm_Poll to here: */
- else err = (*(midi->dictionary->poll))(midi);
-
- if (err != pmNoError) {
- if (err == pmHostError) {
- midi->dictionary->host_error(midi, pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- pm_hosterror = TRUE;
- }
- return pm_errmsg(err);
- }
-
- while (n < length) {
- PmError err = Pm_Dequeue(midi->queue, buffer++);
- if (err == pmBufferOverflow) {
- /* ignore the data we have retreived so far */
- return pm_errmsg(pmBufferOverflow);
- } else if (err == 0) { /* empty queue */
- break;
- }
- n++;
- }
- return n;
+ PmInternal *midi = (PmInternal *) stream;
+ int n = 0;
+ PmError err = pmNoError;
+ pm_hosterror = FALSE;
+ /* arg checking */
+ if(midi == NULL)
+ err = pmBadPtr;
+ else if(!descriptors[midi->device_id].pub.opened)
+ err = pmBadPtr;
+ else if(!descriptors[midi->device_id].pub.input)
+ err = pmBadPtr;
+ /* First poll for data in the buffer...
+ * This either simply checks for data, or attempts first to fill the buffer
+ * with data from the MIDI hardware; this depends on the implementation.
+ * We could call Pm_Poll here, but that would redo a lot of redundant
+ * parameter checking, so I copied some code from Pm_Poll to here: */
+ else err = (*(midi->dictionary->poll))(midi);
+
+ if (err != pmNoError) {
+ if (err == pmHostError) {
+ midi->dictionary->host_error(midi, pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ pm_hosterror = TRUE;
+ }
+ return pm_errmsg(err);
+ }
+
+ while (n < length) {
+ PmError err = Pm_Dequeue(midi->queue, buffer++);
+ if (err == pmBufferOverflow) {
+ /* ignore the data we have retreived so far */
+ return pm_errmsg(pmBufferOverflow);
+ } else if (err == 0) { /* empty queue */
+ break;
+ }
+ n++;
+ }
+ return n;
}
PMEXPORT PmError Pm_Poll( PortMidiStream *stream )
{
- PmInternal *midi = (PmInternal *) stream;
- PmError err;
-
- pm_hosterror = FALSE;
- /* arg checking */
- if(midi == NULL)
- err = pmBadPtr;
- else if (!descriptors[midi->device_id].pub.opened)
- err = pmBadPtr;
- else if (!descriptors[midi->device_id].pub.input)
- err = pmBadPtr;
- else
- err = (*(midi->dictionary->poll))(midi);
-
- if (err != pmNoError) {
- if (err == pmHostError) {
- midi->dictionary->host_error(midi, pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- pm_hosterror = TRUE;
- }
- return pm_errmsg(err);
- }
-
- return !Pm_QueueEmpty(midi->queue);
+ PmInternal *midi = (PmInternal *) stream;
+ PmError err;
+
+ pm_hosterror = FALSE;
+ /* arg checking */
+ if(midi == NULL)
+ err = pmBadPtr;
+ else if (!descriptors[midi->device_id].pub.opened)
+ err = pmBadPtr;
+ else if (!descriptors[midi->device_id].pub.input)
+ err = pmBadPtr;
+ else
+ err = (*(midi->dictionary->poll))(midi);
+
+ if (err != pmNoError) {
+ if (err == pmHostError) {
+ midi->dictionary->host_error(midi, pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ pm_hosterror = TRUE;
+ }
+ return pm_errmsg(err);
+ }
+
+ return !Pm_QueueEmpty(midi->queue);
}
/* this is called from Pm_Write and Pm_WriteSysEx to issue a
- * call to the system-dependent end_sysex function and handle
+ * call to the system-dependent end_sysex function and handle
* the error return
*/
static PmError pm_end_sysex(PmInternal *midi)
{
- PmError err = (*midi->dictionary->end_sysex)(midi, 0);
- midi->sysex_in_progress = FALSE;
- if (err == pmHostError) {
- midi->dictionary->host_error(midi, pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- pm_hosterror = TRUE;
- }
- return err;
+ PmError err = (*midi->dictionary->end_sysex)(midi, 0);
+ midi->sysex_in_progress = FALSE;
+ if (err == pmHostError) {
+ midi->dictionary->host_error(midi, pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ pm_hosterror = TRUE;
+ }
+ return err;
}
@@ -447,488 +447,488 @@ static PmError pm_end_sysex(PmInternal *midi)
PMEXPORT PmError Pm_Write( PortMidiStream *stream, PmEvent *buffer, int32_t length)
{
- PmInternal *midi = (PmInternal *) stream;
- PmError err = pmNoError;
- int i;
- int bits;
-
- pm_hosterror = FALSE;
- /* arg checking */
- if(midi == NULL)
- err = pmBadPtr;
- else if(!descriptors[midi->device_id].pub.opened)
- err = pmBadPtr;
- else if(!descriptors[midi->device_id].pub.output)
- err = pmBadPtr;
- else
- err = pmNoError;
-
- if (err != pmNoError) goto pm_write_error;
-
- if (midi->latency == 0) {
- midi->now = 0;
- } else {
- midi->now = (*(midi->time_proc))(midi->time_info);
- if (midi->first_message || midi->sync_time + 100 /*ms*/ < midi->now) {
- /* time to resync */
- midi->now = (*midi->dictionary->synchronize)(midi);
- midi->first_message = FALSE;
- }
- }
- /* error recovery: when a sysex is detected, we call
- * dictionary->begin_sysex() followed by calls to
- * dictionary->write_byte() and dictionary->write_realtime()
- * until an end-of-sysex is detected, when we call
- * dictionary->end_sysex(). After an error occurs,
- * Pm_Write() continues to call functions. For example,
- * it will continue to call write_byte() even after
- * an error sending a sysex message, and end_sysex() will be
- * called when an EOX or non-real-time status is found.
- * When errors are detected, Pm_Write() returns immediately,
- * so it is possible that this will drop data and leave
- * sysex messages in a partially transmitted state.
- */
- for (i = 0; i < length; i++) {
- uint32_t msg = buffer[i].message;
- bits = 0;
- /* is this a sysex message? */
- if (Pm_MessageStatus(msg) == MIDI_SYSEX) {
- if (midi->sysex_in_progress) {
- /* error: previous sysex was not terminated by EOX */
- midi->sysex_in_progress = FALSE;
- err = pmBadData;
- goto pm_write_error;
- }
- midi->sysex_in_progress = TRUE;
- if ((err = (*midi->dictionary->begin_sysex)(midi,
- buffer[i].timestamp)) != pmNoError)
- goto pm_write_error;
- if ((err = (*midi->dictionary->write_byte)(midi, MIDI_SYSEX,
- buffer[i].timestamp)) != pmNoError)
- goto pm_write_error;
- bits = 8;
- /* fall through to continue sysex processing */
- } else if ((msg & MIDI_STATUS_MASK) &&
- (Pm_MessageStatus(msg) != MIDI_EOX)) {
- /* a non-sysex message */
- if (midi->sysex_in_progress) {
- /* this should be a realtime message */
- if (is_real_time(msg)) {
- if ((err = (*midi->dictionary->write_realtime)(midi,
- &(buffer[i]))) != pmNoError)
- goto pm_write_error;
- } else {
- midi->sysex_in_progress = FALSE;
- err = pmBadData;
- /* ignore any error from this, because we already have one */
- /* pass 0 as timestamp -- it's ignored */
- (*midi->dictionary->end_sysex)(midi, 0);
- goto pm_write_error;
- }
- } else { /* regular short midi message */
- if ((err = (*midi->dictionary->write_short)(midi,
- &(buffer[i]))) != pmNoError)
- goto pm_write_error;
- continue;
- }
- }
- if (midi->sysex_in_progress) { /* send sysex bytes until EOX */
- /* see if we can accelerate data transfer */
- if (bits == 0 && midi->fill_base && /* 4 bytes to copy */
- (*midi->fill_offset_ptr) + 4 <= midi->fill_length &&
- (msg & 0x80808080) == 0) { /* all data */
- /* copy 4 bytes from msg to fill_base + fill_offset */
- unsigned char *ptr = midi->fill_base +
- *(midi->fill_offset_ptr);
- ptr[0] = msg; ptr[1] = msg >> 8;
- ptr[2] = msg >> 16; ptr[3] = msg >> 24;
- (*midi->fill_offset_ptr) += 4;
- continue;
- }
- /* no acceleration, so do byte-by-byte copying */
- while (bits < 32) {
- unsigned char midi_byte = (unsigned char) (msg >> bits);
- if ((err = (*midi->dictionary->write_byte)(midi, midi_byte,
- buffer[i].timestamp)) != pmNoError)
- goto pm_write_error;
- if (midi_byte == MIDI_EOX) {
- err = pm_end_sysex(midi);
- if (err != pmNoError) goto error_exit;
- break; /* from while loop */
- }
- bits += 8;
- }
- } else {
- /* not in sysex mode, but message did not start with status */
- err = pmBadData;
- goto pm_write_error;
- }
- }
- /* after all messages are processed, send the data */
- if (!midi->sysex_in_progress)
- err = (*midi->dictionary->write_flush)(midi, 0);
+ PmInternal *midi = (PmInternal *) stream;
+ PmError err = pmNoError;
+ int i;
+ int bits;
+
+ pm_hosterror = FALSE;
+ /* arg checking */
+ if(midi == NULL)
+ err = pmBadPtr;
+ else if(!descriptors[midi->device_id].pub.opened)
+ err = pmBadPtr;
+ else if(!descriptors[midi->device_id].pub.output)
+ err = pmBadPtr;
+ else
+ err = pmNoError;
+
+ if (err != pmNoError) goto pm_write_error;
+
+ if (midi->latency == 0) {
+ midi->now = 0;
+ } else {
+ midi->now = (*(midi->time_proc))(midi->time_info);
+ if (midi->first_message || midi->sync_time + 100 /*ms*/ < midi->now) {
+ /* time to resync */
+ midi->now = (*midi->dictionary->synchronize)(midi);
+ midi->first_message = FALSE;
+ }
+ }
+ /* error recovery: when a sysex is detected, we call
+ * dictionary->begin_sysex() followed by calls to
+ * dictionary->write_byte() and dictionary->write_realtime()
+ * until an end-of-sysex is detected, when we call
+ * dictionary->end_sysex(). After an error occurs,
+ * Pm_Write() continues to call functions. For example,
+ * it will continue to call write_byte() even after
+ * an error sending a sysex message, and end_sysex() will be
+ * called when an EOX or non-real-time status is found.
+ * When errors are detected, Pm_Write() returns immediately,
+ * so it is possible that this will drop data and leave
+ * sysex messages in a partially transmitted state.
+ */
+ for (i = 0; i < length; i++) {
+ uint32_t msg = buffer[i].message;
+ bits = 0;
+ /* is this a sysex message? */
+ if (Pm_MessageStatus(msg) == MIDI_SYSEX) {
+ if (midi->sysex_in_progress) {
+ /* error: previous sysex was not terminated by EOX */
+ midi->sysex_in_progress = FALSE;
+ err = pmBadData;
+ goto pm_write_error;
+ }
+ midi->sysex_in_progress = TRUE;
+ if ((err = (*midi->dictionary->begin_sysex)(midi,
+ buffer[i].timestamp)) != pmNoError)
+ goto pm_write_error;
+ if ((err = (*midi->dictionary->write_byte)(midi, MIDI_SYSEX,
+ buffer[i].timestamp)) != pmNoError)
+ goto pm_write_error;
+ bits = 8;
+ /* fall through to continue sysex processing */
+ } else if ((msg & MIDI_STATUS_MASK) &&
+ (Pm_MessageStatus(msg) != MIDI_EOX)) {
+ /* a non-sysex message */
+ if (midi->sysex_in_progress) {
+ /* this should be a realtime message */
+ if (is_real_time(msg)) {
+ if ((err = (*midi->dictionary->write_realtime)(midi,
+ &(buffer[i]))) != pmNoError)
+ goto pm_write_error;
+ } else {
+ midi->sysex_in_progress = FALSE;
+ err = pmBadData;
+ /* ignore any error from this, because we already have one */
+ /* pass 0 as timestamp -- it's ignored */
+ (*midi->dictionary->end_sysex)(midi, 0);
+ goto pm_write_error;
+ }
+ } else { /* regular short midi message */
+ if ((err = (*midi->dictionary->write_short)(midi,
+ &(buffer[i]))) != pmNoError)
+ goto pm_write_error;
+ continue;
+ }
+ }
+ if (midi->sysex_in_progress) { /* send sysex bytes until EOX */
+ /* see if we can accelerate data transfer */
+ if (bits == 0 && midi->fill_base && /* 4 bytes to copy */
+ (*midi->fill_offset_ptr) + 4 <= midi->fill_length &&
+ (msg & 0x80808080) == 0) { /* all data */
+ /* copy 4 bytes from msg to fill_base + fill_offset */
+ unsigned char *ptr = midi->fill_base +
+ *(midi->fill_offset_ptr);
+ ptr[0] = msg; ptr[1] = msg >> 8;
+ ptr[2] = msg >> 16; ptr[3] = msg >> 24;
+ (*midi->fill_offset_ptr) += 4;
+ continue;
+ }
+ /* no acceleration, so do byte-by-byte copying */
+ while (bits < 32) {
+ unsigned char midi_byte = (unsigned char) (msg >> bits);
+ if ((err = (*midi->dictionary->write_byte)(midi, midi_byte,
+ buffer[i].timestamp)) != pmNoError)
+ goto pm_write_error;
+ if (midi_byte == MIDI_EOX) {
+ err = pm_end_sysex(midi);
+ if (err != pmNoError) goto error_exit;
+ break; /* from while loop */
+ }
+ bits += 8;
+ }
+ } else {
+ /* not in sysex mode, but message did not start with status */
+ err = pmBadData;
+ goto pm_write_error;
+ }
+ }
+ /* after all messages are processed, send the data */
+ if (!midi->sysex_in_progress)
+ err = (*midi->dictionary->write_flush)(midi, 0);
pm_write_error:
- if (err == pmHostError) {
- midi->dictionary->host_error(midi, pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- pm_hosterror = TRUE;
- }
+ if (err == pmHostError) {
+ midi->dictionary->host_error(midi, pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ pm_hosterror = TRUE;
+ }
error_exit:
- return pm_errmsg(err);
+ return pm_errmsg(err);
}
PMEXPORT PmError Pm_WriteShort(PortMidiStream *stream, PmTimestamp when, PmMessage msg)
{
- PmEvent event;
-
- event.timestamp = when;
- event.message = msg;
- return Pm_Write(stream, &event, 1);
+ PmEvent event;
+
+ event.timestamp = when;
+ event.message = msg;
+ return Pm_Write(stream, &event, 1);
}
-PMEXPORT PmError Pm_WriteSysEx(PortMidiStream *stream, PmTimestamp when,
- unsigned char *msg)
+PMEXPORT PmError Pm_WriteSysEx(PortMidiStream *stream, PmTimestamp when,
+ unsigned char *msg)
{
- /* allocate buffer space for PM_DEFAULT_SYSEX_BUFFER_SIZE bytes */
- /* each PmEvent holds sizeof(PmMessage) bytes of sysex data */
- #define BUFLEN ((int) (PM_DEFAULT_SYSEX_BUFFER_SIZE / sizeof(PmMessage)))
- PmEvent buffer[BUFLEN];
- int buffer_size = 1; /* first time, send 1. After that, it's BUFLEN */
- PmInternal *midi = (PmInternal *) stream;
- /* the next byte in the buffer is represented by an index, bufx, and
- a shift in bits */
- int shift = 0;
- int bufx = 0;
- buffer[0].message = 0;
- buffer[0].timestamp = when;
-
- while (1) {
- /* insert next byte into buffer */
- buffer[bufx].message |= ((*msg) << shift);
- shift += 8;
- if (*msg++ == MIDI_EOX) break;
- if (shift == 32) {
- shift = 0;
- bufx++;
- if (bufx == buffer_size) {
- PmError err = Pm_Write(stream, buffer, buffer_size);
- /* note: Pm_Write has already called errmsg() */
- if (err) return err;
- /* prepare to fill another buffer */
- bufx = 0;
- buffer_size = BUFLEN;
- /* optimization: maybe we can just copy bytes */
- if (midi->fill_base) {
- PmError err;
- while (*(midi->fill_offset_ptr) < midi->fill_length) {
- midi->fill_base[(*midi->fill_offset_ptr)++] = *msg;
- if (*msg++ == MIDI_EOX) {
- err = pm_end_sysex(midi);
- if (err != pmNoError) return pm_errmsg(err);
- goto end_of_sysex;
- }
- }
- /* I thought that I could do a pm_Write here and
- * change this if to a loop, avoiding calls in Pm_Write
- * to the slower write_byte, but since
- * sysex_in_progress is true, this will not flush
- * the buffer, and we'll infinite loop: */
- /* err = Pm_Write(stream, buffer, 0);
- if (err) return err; */
- /* instead, the way this works is that Pm_Write calls
- * write_byte on 4 bytes. The first, since the buffer
- * is full, will flush the buffer and allocate a new
- * one. This primes the buffer so
- * that we can return to the loop above and fill it
- * efficiently without a lot of function calls.
- */
- buffer_size = 1; /* get another message started */
- }
- }
- buffer[bufx].message = 0;
- buffer[bufx].timestamp = when;
- }
- /* keep inserting bytes until you find MIDI_EOX */
- }
+ /* allocate buffer space for PM_DEFAULT_SYSEX_BUFFER_SIZE bytes */
+ /* each PmEvent holds sizeof(PmMessage) bytes of sysex data */
+ #define BUFLEN ((int) (PM_DEFAULT_SYSEX_BUFFER_SIZE / sizeof(PmMessage)))
+ PmEvent buffer[BUFLEN];
+ int buffer_size = 1; /* first time, send 1. After that, it's BUFLEN */
+ PmInternal *midi = (PmInternal *) stream;
+ /* the next byte in the buffer is represented by an index, bufx, and
+ a shift in bits */
+ int shift = 0;
+ int bufx = 0;
+ buffer[0].message = 0;
+ buffer[0].timestamp = when;
+
+ while (1) {
+ /* insert next byte into buffer */
+ buffer[bufx].message |= ((*msg) << shift);
+ shift += 8;
+ if (*msg++ == MIDI_EOX) break;
+ if (shift == 32) {
+ shift = 0;
+ bufx++;
+ if (bufx == buffer_size) {
+ PmError err = Pm_Write(stream, buffer, buffer_size);
+ /* note: Pm_Write has already called errmsg() */
+ if (err) return err;
+ /* prepare to fill another buffer */
+ bufx = 0;
+ buffer_size = BUFLEN;
+ /* optimization: maybe we can just copy bytes */
+ if (midi->fill_base) {
+ PmError err;
+ while (*(midi->fill_offset_ptr) < midi->fill_length) {
+ midi->fill_base[(*midi->fill_offset_ptr)++] = *msg;
+ if (*msg++ == MIDI_EOX) {
+ err = pm_end_sysex(midi);
+ if (err != pmNoError) return pm_errmsg(err);
+ goto end_of_sysex;
+ }
+ }
+ /* I thought that I could do a pm_Write here and
+ * change this if to a loop, avoiding calls in Pm_Write
+ * to the slower write_byte, but since
+ * sysex_in_progress is true, this will not flush
+ * the buffer, and we'll infinite loop: */
+ /* err = Pm_Write(stream, buffer, 0);
+ if (err) return err; */
+ /* instead, the way this works is that Pm_Write calls
+ * write_byte on 4 bytes. The first, since the buffer
+ * is full, will flush the buffer and allocate a new
+ * one. This primes the buffer so
+ * that we can return to the loop above and fill it
+ * efficiently without a lot of function calls.
+ */
+ buffer_size = 1; /* get another message started */
+ }
+ }
+ buffer[bufx].message = 0;
+ buffer[bufx].timestamp = when;
+ }
+ /* keep inserting bytes until you find MIDI_EOX */
+ }
end_of_sysex:
- /* we're finished sending full buffers, but there may
- * be a partial one left.
- */
- if (shift != 0) bufx++; /* add partial message to buffer len */
- if (bufx) { /* bufx is number of PmEvents to send from buffer */
- PmError err = Pm_Write(stream, buffer, bufx);
- if (err) return err;
- }
- return pmNoError;
+ /* we're finished sending full buffers, but there may
+ * be a partial one left.
+ */
+ if (shift != 0) bufx++; /* add partial message to buffer len */
+ if (bufx) { /* bufx is number of PmEvents to send from buffer */
+ PmError err = Pm_Write(stream, buffer, bufx);
+ if (err) return err;
+ }
+ return pmNoError;
}
PMEXPORT PmError Pm_OpenInput(PortMidiStream** stream,
- PmDeviceID inputDevice,
- void *inputDriverInfo,
- int32_t bufferSize,
- PmTimeProcPtr time_proc,
- void *time_info)
+ PmDeviceID inputDevice,
+ void *inputDriverInfo,
+ int32_t bufferSize,
+ PmTimeProcPtr time_proc,
+ void *time_info)
{
- PmInternal *midi;
- PmError err = pmNoError;
- pm_hosterror = FALSE;
- *stream = NULL;
-
- /* arg checking */
- if (inputDevice < 0 || inputDevice >= pm_descriptor_index)
- err = pmInvalidDeviceId;
- else if (!descriptors[inputDevice].pub.input)
- err = pmInvalidDeviceId;
- else if(descriptors[inputDevice].pub.opened)
- err = pmInvalidDeviceId;
-
- if (err != pmNoError)
- goto error_return;
-
- /* create portMidi internal data */
- midi = (PmInternal *) pm_alloc(sizeof(PmInternal));
- *stream = midi;
- if (!midi) {
- err = pmInsufficientMemory;
- goto error_return;
- }
- midi->device_id = inputDevice;
- midi->write_flag = FALSE;
- midi->time_proc = time_proc;
- midi->time_info = time_info;
- /* windows adds timestamps in the driver and these are more accurate than
- using a time_proc, so do not automatically provide a time proc. Non-win
- implementations may want to provide a default time_proc in their
- system-specific midi_out_open() method.
- */
- if (bufferSize <= 0) bufferSize = 256; /* default buffer size */
- midi->queue = Pm_QueueCreate(bufferSize, (int32_t) sizeof(PmEvent));
- if (!midi->queue) {
- /* free portMidi data */
- *stream = NULL;
- pm_free(midi);
- err = pmInsufficientMemory;
- goto error_return;
- }
- midi->buffer_len = bufferSize; /* portMidi input storage */
- midi->latency = 0; /* not used */
- midi->sysex_in_progress = FALSE;
- midi->sysex_message = 0;
- midi->sysex_message_count = 0;
- midi->filters = PM_FILT_ACTIVE;
- midi->channel_mask = 0xFFFF;
- midi->sync_time = 0;
- midi->first_message = TRUE;
- midi->dictionary = descriptors[inputDevice].dictionary;
- midi->fill_base = NULL;
- midi->fill_offset_ptr = NULL;
- midi->fill_length = 0;
- descriptors[inputDevice].internalDescriptor = midi;
- /* open system dependent input device */
- err = (*midi->dictionary->open)(midi, inputDriverInfo);
- if (err) {
- *stream = NULL;
- descriptors[inputDevice].internalDescriptor = NULL;
- /* free portMidi data */
- Pm_QueueDestroy(midi->queue);
- pm_free(midi);
- } else {
- /* portMidi input open successful */
- descriptors[inputDevice].pub.opened = TRUE;
- }
+ PmInternal *midi;
+ PmError err = pmNoError;
+ pm_hosterror = FALSE;
+ *stream = NULL;
+
+ /* arg checking */
+ if (inputDevice < 0 || inputDevice >= pm_descriptor_index)
+ err = pmInvalidDeviceId;
+ else if (!descriptors[inputDevice].pub.input)
+ err = pmInvalidDeviceId;
+ else if(descriptors[inputDevice].pub.opened)
+ err = pmInvalidDeviceId;
+
+ if (err != pmNoError)
+ goto error_return;
+
+ /* create portMidi internal data */
+ midi = (PmInternal *) pm_alloc(sizeof(PmInternal));
+ *stream = midi;
+ if (!midi) {
+ err = pmInsufficientMemory;
+ goto error_return;
+ }
+ midi->device_id = inputDevice;
+ midi->write_flag = FALSE;
+ midi->time_proc = time_proc;
+ midi->time_info = time_info;
+ /* windows adds timestamps in the driver and these are more accurate than
+ using a time_proc, so do not automatically provide a time proc. Non-win
+ implementations may want to provide a default time_proc in their
+ system-specific midi_out_open() method.
+ */
+ if (bufferSize <= 0) bufferSize = 256; /* default buffer size */
+ midi->queue = Pm_QueueCreate(bufferSize, (int32_t) sizeof(PmEvent));
+ if (!midi->queue) {
+ /* free portMidi data */
+ *stream = NULL;
+ pm_free(midi);
+ err = pmInsufficientMemory;
+ goto error_return;
+ }
+ midi->buffer_len = bufferSize; /* portMidi input storage */
+ midi->latency = 0; /* not used */
+ midi->sysex_in_progress = FALSE;
+ midi->sysex_message = 0;
+ midi->sysex_message_count = 0;
+ midi->filters = PM_FILT_ACTIVE;
+ midi->channel_mask = 0xFFFF;
+ midi->sync_time = 0;
+ midi->first_message = TRUE;
+ midi->dictionary = descriptors[inputDevice].dictionary;
+ midi->fill_base = NULL;
+ midi->fill_offset_ptr = NULL;
+ midi->fill_length = 0;
+ descriptors[inputDevice].internalDescriptor = midi;
+ /* open system dependent input device */
+ err = (*midi->dictionary->open)(midi, inputDriverInfo);
+ if (err) {
+ *stream = NULL;
+ descriptors[inputDevice].internalDescriptor = NULL;
+ /* free portMidi data */
+ Pm_QueueDestroy(midi->queue);
+ pm_free(midi);
+ } else {
+ /* portMidi input open successful */
+ descriptors[inputDevice].pub.opened = TRUE;
+ }
error_return:
- /* note: if there is a pmHostError, it is the responsibility
- * of the system-dependent code (*midi->dictionary->open)()
- * to set pm_hosterror and pm_hosterror_text
- */
- return pm_errmsg(err);
+ /* note: if there is a pmHostError, it is the responsibility
+ * of the system-dependent code (*midi->dictionary->open)()
+ * to set pm_hosterror and pm_hosterror_text
+ */
+ return pm_errmsg(err);
}
PMEXPORT PmError Pm_OpenOutput(PortMidiStream** stream,
- PmDeviceID outputDevice,
- void *outputDriverInfo,
- int32_t bufferSize,
- PmTimeProcPtr time_proc,
- void *time_info,
- int32_t latency )
+ PmDeviceID outputDevice,
+ void *outputDriverInfo,
+ int32_t bufferSize,
+ PmTimeProcPtr time_proc,
+ void *time_info,
+ int32_t latency )
{
- PmInternal *midi;
- PmError err = pmNoError;
- pm_hosterror = FALSE;
- *stream = NULL;
-
- /* arg checking */
- if (outputDevice < 0 || outputDevice >= pm_descriptor_index)
- err = pmInvalidDeviceId;
- else if (!descriptors[outputDevice].pub.output)
- err = pmInvalidDeviceId;
- else if (descriptors[outputDevice].pub.opened)
- err = pmInvalidDeviceId;
- if (err != pmNoError)
- goto error_return;
-
- /* create portMidi internal data */
- midi = (PmInternal *) pm_alloc(sizeof(PmInternal));
- *stream = midi;
- if (!midi) {
- err = pmInsufficientMemory;
- goto error_return;
- }
- midi->device_id = outputDevice;
- midi->write_flag = TRUE;
- midi->time_proc = time_proc;
- /* if latency > 0, we need a time reference. If none is provided,
- use PortTime library */
- if (time_proc == NULL && latency != 0) {
- if (!Pt_Started())
- Pt_Start(1, 0, 0);
- /* time_get does not take a parameter, so coerce */
- midi->time_proc = (PmTimeProcPtr) Pt_Time;
- }
- midi->time_info = time_info;
- midi->buffer_len = bufferSize;
- midi->queue = NULL; /* unused by output */
- /* if latency zero, output immediate (timestamps ignored) */
- /* if latency < 0, use 0 but don't return an error */
- if (latency < 0) latency = 0;
- midi->latency = latency;
- midi->sysex_in_progress = FALSE;
- midi->sysex_message = 0; /* unused by output */
- midi->sysex_message_count = 0; /* unused by output */
- midi->filters = 0; /* not used for output */
- midi->channel_mask = 0xFFFF;
- midi->sync_time = 0;
- midi->first_message = TRUE;
- midi->dictionary = descriptors[outputDevice].dictionary;
- midi->fill_base = NULL;
- midi->fill_offset_ptr = NULL;
- midi->fill_length = 0;
- descriptors[outputDevice].internalDescriptor = midi;
- /* open system dependent output device */
- err = (*midi->dictionary->open)(midi, outputDriverInfo);
- if (err) {
- *stream = NULL;
- descriptors[outputDevice].internalDescriptor = NULL;
- /* free portMidi data */
- pm_free(midi);
- } else {
- /* portMidi input open successful */
- descriptors[outputDevice].pub.opened = TRUE;
- }
+ PmInternal *midi;
+ PmError err = pmNoError;
+ pm_hosterror = FALSE;
+ *stream = NULL;
+
+ /* arg checking */
+ if (outputDevice < 0 || outputDevice >= pm_descriptor_index)
+ err = pmInvalidDeviceId;
+ else if (!descriptors[outputDevice].pub.output)
+ err = pmInvalidDeviceId;
+ else if (descriptors[outputDevice].pub.opened)
+ err = pmInvalidDeviceId;
+ if (err != pmNoError)
+ goto error_return;
+
+ /* create portMidi internal data */
+ midi = (PmInternal *) pm_alloc(sizeof(PmInternal));
+ *stream = midi;
+ if (!midi) {
+ err = pmInsufficientMemory;
+ goto error_return;
+ }
+ midi->device_id = outputDevice;
+ midi->write_flag = TRUE;
+ midi->time_proc = time_proc;
+ /* if latency > 0, we need a time reference. If none is provided,
+ use PortTime library */
+ if (time_proc == NULL && latency != 0) {
+ if (!Pt_Started())
+ Pt_Start(1, 0, 0);
+ /* time_get does not take a parameter, so coerce */
+ midi->time_proc = (PmTimeProcPtr) Pt_Time;
+ }
+ midi->time_info = time_info;
+ midi->buffer_len = bufferSize;
+ midi->queue = NULL; /* unused by output */
+ /* if latency zero, output immediate (timestamps ignored) */
+ /* if latency < 0, use 0 but don't return an error */
+ if (latency < 0) latency = 0;
+ midi->latency = latency;
+ midi->sysex_in_progress = FALSE;
+ midi->sysex_message = 0; /* unused by output */
+ midi->sysex_message_count = 0; /* unused by output */
+ midi->filters = 0; /* not used for output */
+ midi->channel_mask = 0xFFFF;
+ midi->sync_time = 0;
+ midi->first_message = TRUE;
+ midi->dictionary = descriptors[outputDevice].dictionary;
+ midi->fill_base = NULL;
+ midi->fill_offset_ptr = NULL;
+ midi->fill_length = 0;
+ descriptors[outputDevice].internalDescriptor = midi;
+ /* open system dependent output device */
+ err = (*midi->dictionary->open)(midi, outputDriverInfo);
+ if (err) {
+ *stream = NULL;
+ descriptors[outputDevice].internalDescriptor = NULL;
+ /* free portMidi data */
+ pm_free(midi);
+ } else {
+ /* portMidi input open successful */
+ descriptors[outputDevice].pub.opened = TRUE;
+ }
error_return:
- /* note: system-dependent code must set pm_hosterror and
- * pm_hosterror_text if a pmHostError occurs
- */
- return pm_errmsg(err);
+ /* note: system-dependent code must set pm_hosterror and
+ * pm_hosterror_text if a pmHostError occurs
+ */
+ return pm_errmsg(err);
}
PMEXPORT PmError Pm_SetChannelMask(PortMidiStream *stream, int mask)
{
- PmInternal *midi = (PmInternal *) stream;
- PmError err = pmNoError;
+ PmInternal *midi = (PmInternal *) stream;
+ PmError err = pmNoError;
- if (midi == NULL)
- err = pmBadPtr;
- else
- midi->channel_mask = mask;
+ if (midi == NULL)
+ err = pmBadPtr;
+ else
+ midi->channel_mask = mask;
- return pm_errmsg(err);
+ return pm_errmsg(err);
}
PMEXPORT PmError Pm_SetFilter(PortMidiStream *stream, int32_t filters) {
- PmInternal *midi = (PmInternal *) stream;
- PmError err = pmNoError;
-
- /* arg checking */
- if (midi == NULL)
- err = pmBadPtr;
- else if (!descriptors[midi->device_id].pub.opened)
- err = pmBadPtr;
- else
- midi->filters = filters;
- return pm_errmsg(err);
+ PmInternal *midi = (PmInternal *) stream;
+ PmError err = pmNoError;
+
+ /* arg checking */
+ if (midi == NULL)
+ err = pmBadPtr;
+ else if (!descriptors[midi->device_id].pub.opened)
+ err = pmBadPtr;
+ else
+ midi->filters = filters;
+ return pm_errmsg(err);
}
PMEXPORT PmError Pm_Close( PortMidiStream *stream ) {
- PmInternal *midi = (PmInternal *) stream;
- PmError err = pmNoError;
-
- pm_hosterror = FALSE;
- /* arg checking */
- if (midi == NULL) /* midi must point to something */
- err = pmBadPtr;
- /* if it is an open device, the device_id will be valid */
- else if (midi->device_id < 0 || midi->device_id >= pm_descriptor_index)
- err = pmBadPtr;
- /* and the device should be in the opened state */
- else if (!descriptors[midi->device_id].pub.opened)
- err = pmBadPtr;
-
- if (err != pmNoError)
- goto error_return;
-
- /* close the device */
- err = (*midi->dictionary->close)(midi);
- /* even if an error occurred, continue with cleanup */
- descriptors[midi->device_id].internalDescriptor = NULL;
- descriptors[midi->device_id].pub.opened = FALSE;
- if (midi->queue) Pm_QueueDestroy(midi->queue);
- pm_free(midi);
+ PmInternal *midi = (PmInternal *) stream;
+ PmError err = pmNoError;
+
+ pm_hosterror = FALSE;
+ /* arg checking */
+ if (midi == NULL) /* midi must point to something */
+ err = pmBadPtr;
+ /* if it is an open device, the device_id will be valid */
+ else if (midi->device_id < 0 || midi->device_id >= pm_descriptor_index)
+ err = pmBadPtr;
+ /* and the device should be in the opened state */
+ else if (!descriptors[midi->device_id].pub.opened)
+ err = pmBadPtr;
+
+ if (err != pmNoError)
+ goto error_return;
+
+ /* close the device */
+ err = (*midi->dictionary->close)(midi);
+ /* even if an error occurred, continue with cleanup */
+ descriptors[midi->device_id].internalDescriptor = NULL;
+ descriptors[midi->device_id].pub.opened = FALSE;
+ if (midi->queue) Pm_QueueDestroy(midi->queue);
+ pm_free(midi);
error_return:
- /* system dependent code must set pm_hosterror and
- * pm_hosterror_text if a pmHostError occurs.
- */
- return pm_errmsg(err);
+ /* system dependent code must set pm_hosterror and
+ * pm_hosterror_text if a pmHostError occurs.
+ */
+ return pm_errmsg(err);
}
PmError Pm_Synchronize( PortMidiStream* stream ) {
- PmInternal *midi = (PmInternal *) stream;
- PmError err = pmNoError;
- if (midi == NULL)
- err = pmBadPtr;
- else if (!descriptors[midi->device_id].pub.output)
- err = pmBadPtr;
- else if (!descriptors[midi->device_id].pub.opened)
- err = pmBadPtr;
- else
- midi->first_message = TRUE;
- return err;
+ PmInternal *midi = (PmInternal *) stream;
+ PmError err = pmNoError;
+ if (midi == NULL)
+ err = pmBadPtr;
+ else if (!descriptors[midi->device_id].pub.output)
+ err = pmBadPtr;
+ else if (!descriptors[midi->device_id].pub.opened)
+ err = pmBadPtr;
+ else
+ midi->first_message = TRUE;
+ return err;
}
PMEXPORT PmError Pm_Abort( PortMidiStream* stream ) {
- PmInternal *midi = (PmInternal *) stream;
- PmError err;
- /* arg checking */
- if (midi == NULL)
- err = pmBadPtr;
- else if (!descriptors[midi->device_id].pub.output)
- err = pmBadPtr;
- else if (!descriptors[midi->device_id].pub.opened)
- err = pmBadPtr;
- else
- err = (*midi->dictionary->abort)(midi);
-
- if (err == pmHostError) {
- midi->dictionary->host_error(midi, pm_hosterror_text,
- PM_HOST_ERROR_MSG_LEN);
- pm_hosterror = TRUE;
- }
- return pm_errmsg(err);
+ PmInternal *midi = (PmInternal *) stream;
+ PmError err;
+ /* arg checking */
+ if (midi == NULL)
+ err = pmBadPtr;
+ else if (!descriptors[midi->device_id].pub.output)
+ err = pmBadPtr;
+ else if (!descriptors[midi->device_id].pub.opened)
+ err = pmBadPtr;
+ else
+ err = (*midi->dictionary->abort)(midi);
+
+ if (err == pmHostError) {
+ midi->dictionary->host_error(midi, pm_hosterror_text,
+ PM_HOST_ERROR_MSG_LEN);
+ pm_hosterror = TRUE;
+ }
+ return pm_errmsg(err);
}
/* pm_channel_filtered returns non-zero if the channel mask is blocking the current channel */
#define pm_channel_filtered(status, mask) \
- ((((status) & 0xF0) != 0xF0) && (!(Pm_Channel((status) & 0x0F) & (mask))))
+ ((((status) & 0xF0) != 0xF0) && (!(Pm_Channel((status) & 0x0F) & (mask))))
/* The following two functions will checks to see if a MIDI message matches
@@ -941,7 +941,7 @@ PMEXPORT PmError Pm_Abort( PortMidiStream* stream ) {
Note that only realtime messages are checked here.
*/
#define pm_realtime_filtered(status, filters) \
- ((((status) & 0xF0) == 0xF0) && ((1 << ((status) & 0xF)) & (filters)))
+ ((((status) & 0xF0) == 0xF0) && ((1 << ((status) & 0xF)) & (filters)))
/*
return ((status == MIDI_ACTIVE) && (filters & PM_FILT_ACTIVE))
@@ -981,19 +981,19 @@ PMEXPORT PmError Pm_Abort( PortMidiStream* stream ) {
static void pm_flush_sysex(PmInternal *midi, PmTimestamp timestamp)
{
- PmEvent event;
-
- /* there may be nothing in the buffer */
- if (midi->sysex_message_count == 0) return; /* nothing to flush */
-
- event.message = midi->sysex_message;
- event.timestamp = timestamp;
- /* copied from pm_read_short, avoids filtering */
- if (Pm_Enqueue(midi->queue, &event) == pmBufferOverflow) {
- midi->sysex_in_progress = FALSE;
- }
- midi->sysex_message_count = 0;
- midi->sysex_message = 0;
+ PmEvent event;
+
+ /* there may be nothing in the buffer */
+ if (midi->sysex_message_count == 0) return; /* nothing to flush */
+
+ event.message = midi->sysex_message;
+ event.timestamp = timestamp;
+ /* copied from pm_read_short, avoids filtering */
+ if (Pm_Enqueue(midi->queue, &event) == pmBufferOverflow) {
+ midi->sysex_in_progress = FALSE;
+ }
+ midi->sysex_message_count = 0;
+ midi->sysex_message = 0;
}
@@ -1004,134 +1004,132 @@ static void pm_flush_sysex(PmInternal *midi, PmTimestamp timestamp)
1) all short input messages must be sent to pm_read_short, which
enqueues them to a FIFO for the application.
2) each buffer of sysex bytes should be reported by calling pm_read_bytes
- (which sets midi->sysex_in_progress). After the eox byte,
+ (which sets midi->sysex_in_progress). After the eox byte,
pm_read_bytes will clear sysex_in_progress
*/
-/* pm_read_short is the place where all input messages arrive from
+/* pm_read_short is the place where all input messages arrive from
system-dependent code such as pmwinmm.c. Here, the messages
- are entered into the PortMidi input buffer.
+ are entered into the PortMidi input buffer.
*/
void pm_read_short(PmInternal *midi, PmEvent *event)
-{
- int status;
- /* arg checking */
- assert(midi != NULL);
- /* midi filtering is applied here */
- status = Pm_MessageStatus(event->message);
- if (!pm_status_filtered(status, midi->filters)
- && (!is_real_time(status) ||
- !pm_realtime_filtered(status, midi->filters))
- && !pm_channel_filtered(status, midi->channel_mask)) {
- /* if sysex is in progress and we get a status byte, it had
- better be a realtime message or the starting SYSEX byte;
- otherwise, we exit the sysex_in_progress state
- */
- if (midi->sysex_in_progress && (status & MIDI_STATUS_MASK)) {
- /* two choices: real-time or not. If it's real-time, then
- * this should be delivered as a sysex byte because it is
- * embedded in a sysex message
- */
- if (is_real_time(status)) {
- midi->sysex_message |=
- (status << (8 * midi->sysex_message_count++));
- if (midi->sysex_message_count == 4) {
- pm_flush_sysex(midi, event->timestamp);
- }
- } else { /* otherwise, it's not real-time. This interrupts
+{
+ int status;
+ /* arg checking */
+ assert(midi != NULL);
+ /* midi filtering is applied here */
+ status = Pm_MessageStatus(event->message);
+ if (!pm_status_filtered(status, midi->filters)
+ && (!is_real_time(status) ||
+ !pm_realtime_filtered(status, midi->filters))
+ && !pm_channel_filtered(status, midi->channel_mask)) {
+ /* if sysex is in progress and we get a status byte, it had
+ better be a realtime message or the starting SYSEX byte;
+ otherwise, we exit the sysex_in_progress state
+ */
+ if (midi->sysex_in_progress && (status & MIDI_STATUS_MASK)) {
+ /* two choices: real-time or not. If it's real-time, then
+ * this should be delivered as a sysex byte because it is
+ * embedded in a sysex message
+ */
+ if (is_real_time(status)) {
+ midi->sysex_message |=
+ (status << (8 * midi->sysex_message_count++));
+ if (midi->sysex_message_count == 4) {
+ pm_flush_sysex(midi, event->timestamp);
+ }
+ } else { /* otherwise, it's not real-time. This interrupts
* a sysex message in progress */
- midi->sysex_in_progress = FALSE;
- }
- } else if (Pm_Enqueue(midi->queue, event) == pmBufferOverflow) {
- midi->sysex_in_progress = FALSE;
- }
- }
+ midi->sysex_in_progress = FALSE;
+ }
+ } else if (Pm_Enqueue(midi->queue, event) == pmBufferOverflow) {
+ midi->sysex_in_progress = FALSE;
+ }
+ }
}
/* pm_read_bytes -- read one (partial) sysex msg from MIDI data */
/*
* returns how many bytes processed
*/
-unsigned int pm_read_bytes(PmInternal *midi, const unsigned char *data,
- int len, PmTimestamp timestamp)
+unsigned int pm_read_bytes(PmInternal *midi, const unsigned char *data,
+ int len, PmTimestamp timestamp)
{
- int i = 0; /* index into data, must not be unsigned (!) */
- PmEvent event;
- event.timestamp = timestamp;
- assert(midi);
- /* note that since buffers may not have multiples of 4 bytes,
- * pm_read_bytes may be called in the middle of an outgoing
- * 4-byte PortMidi message. sysex_in_progress indicates that
- * a sysex has been sent but no eox.
- */
- if (len == 0) return 0; /* sanity check */
- if (!midi->sysex_in_progress) {
- while (i < len) { /* process all data */
- unsigned char byte = data[i++];
- if (byte == MIDI_SYSEX &&
- !pm_realtime_filtered(byte, midi->filters)) {
- midi->sysex_in_progress = TRUE;
- i--; /* back up so code below will get SYSEX byte */
- break; /* continue looping below to process msg */
- } else if (byte == MIDI_EOX) {
- midi->sysex_in_progress = FALSE;
- return i; /* done with one message */
- } else if (byte & MIDI_STATUS_MASK) {
- /* We're getting MIDI but no sysex in progress.
- * Either the SYSEX status byte was dropped or
- * the message was filtered. Drop the data, but
- * send any embedded realtime bytes.
- */
- /* assume that this is a real-time message:
- * it is an error to pass non-real-time messages
- * to pm_read_bytes
- */
- event.message = byte;
- pm_read_short(midi, &event);
- }
- } /* all bytes in the buffer are processed */
- }
- /* Now, i<len implies sysex_in_progress. If sysex_in_progress
- * becomes false in the loop, there must have been an overflow
- * and we can just drop all remaining bytes
- */
- while (i < len && midi->sysex_in_progress) {
- if (midi->sysex_message_count == 0 && i <= len - 4 &&
- ((event.message = (((PmMessage) data[i]) |
- (((PmMessage) data[i+1]) << 8) |
- (((PmMessage) data[i+2]) << 16) |
- (((PmMessage) data[i+3]) << 24))) &
- 0x80808080) == 0) { /* all data, no status */
- if (Pm_Enqueue(midi->queue, &event) == pmBufferOverflow) {
- midi->sysex_in_progress = FALSE;
- }
- i += 4;
- } else {
- while (i < len) {
- /* send one byte at a time */
- unsigned char byte = data[i++];
- if (is_real_time(byte) &&
- pm_realtime_filtered(byte, midi->filters)) {
- continue; /* real-time data is filtered, so omit */
- }
- midi->sysex_message |=
- (byte << (8 * midi->sysex_message_count++));
- if (byte == MIDI_EOX) {
- midi->sysex_in_progress = FALSE;
- pm_flush_sysex(midi, event.timestamp);
- return i;
- } else if (midi->sysex_message_count == 4) {
- pm_flush_sysex(midi, event.timestamp);
- /* after handling at least one non-data byte
- * and reaching a 4-byte message boundary,
- * resume trying to send 4 at a time in outer loop
- */
- break;
- }
- }
- }
- }
- return i;
+ int i = 0; /* index into data, must not be unsigned (!) */
+ PmEvent event;
+ event.timestamp = timestamp;
+ assert(midi);
+ /* note that since buffers may not have multiples of 4 bytes,
+ * pm_read_bytes may be called in the middle of an outgoing
+ * 4-byte PortMidi message. sysex_in_progress indicates that
+ * a sysex has been sent but no eox.
+ */
+ if (len == 0) return 0; /* sanity check */
+ if (!midi->sysex_in_progress) {
+ while (i < len) { /* process all data */
+ unsigned char byte = data[i++];
+ if (byte == MIDI_SYSEX &&
+ !pm_realtime_filtered(byte, midi->filters)) {
+ midi->sysex_in_progress = TRUE;
+ i--; /* back up so code below will get SYSEX byte */
+ break; /* continue looping below to process msg */
+ } else if (byte == MIDI_EOX) {
+ midi->sysex_in_progress = FALSE;
+ return i; /* done with one message */
+ } else if (byte & MIDI_STATUS_MASK) {
+ /* We're getting MIDI but no sysex in progress.
+ * Either the SYSEX status byte was dropped or
+ * the message was filtered. Drop the data, but
+ * send any embedded realtime bytes.
+ */
+ /* assume that this is a real-time message:
+ * it is an error to pass non-real-time messages
+ * to pm_read_bytes
+ */
+ event.message = byte;
+ pm_read_short(midi, &event);
+ }
+ } /* all bytes in the buffer are processed */
+ }
+ /* Now, i<len implies sysex_in_progress. If sysex_in_progress
+ * becomes false in the loop, there must have been an overflow
+ * and we can just drop all remaining bytes
+ */
+ while (i < len && midi->sysex_in_progress) {
+ if (midi->sysex_message_count == 0 && i <= len - 4 &&
+ ((event.message = (((PmMessage) data[i]) |
+ (((PmMessage) data[i+1]) << 8) |
+ (((PmMessage) data[i+2]) << 16) |
+ (((PmMessage) data[i+3]) << 24))) &
+ 0x80808080) == 0) { /* all data, no status */
+ if (Pm_Enqueue(midi->queue, &event) == pmBufferOverflow) {
+ midi->sysex_in_progress = FALSE;
+ }
+ i += 4;
+ } else {
+ while (i < len) {
+ /* send one byte at a time */
+ unsigned char byte = data[i++];
+ if (is_real_time(byte) &&
+ pm_realtime_filtered(byte, midi->filters)) {
+ continue; /* real-time data is filtered, so omit */
+ }
+ midi->sysex_message |=
+ (byte << (8 * midi->sysex_message_count++));
+ if (byte == MIDI_EOX) {
+ midi->sysex_in_progress = FALSE;
+ pm_flush_sysex(midi, event.timestamp);
+ return i;
+ } else if (midi->sysex_message_count == 4) {
+ pm_flush_sysex(midi, event.timestamp);
+ /* after handling at least one non-data byte
+ * and reaching a 4-byte message boundary,
+ * resume trying to send 4 at a time in outer loop
+ */
+ break;
+ }
+ }
+ }
+ }
+ return i;
}
-
-
diff --git a/src/lib/portmidi/portmidi.h b/src/lib/portmidi/portmidi.h
index c57432fae12..38773b31fe8 100644
--- a/src/lib/portmidi/portmidi.h
+++ b/src/lib/portmidi/portmidi.h
@@ -33,20 +33,20 @@ extern "C" {
*/
/*
- * The text above constitutes the entire PortMidi license; however,
+ * The text above constitutes the entire PortMidi license; however,
* the PortMusic community also makes the following non-binding requests:
*
* Any person wishing to distribute modifications to the Software is
* requested to send the modifications to the original developer so that
* they can be incorporated into the canonical version. It is also
- * requested that these non-binding requests be included along with the
+ * requested that these non-binding requests be included along with the
* license above.
*/
/* CHANGELOG FOR PORTMIDI
* (see ../CHANGELOG.txt)
*
- * NOTES ON HOST ERROR REPORTING:
+ * NOTES ON HOST ERROR REPORTING:
*
* PortMidi errors (of type PmError) are generic, system-independent errors.
* When an error does not map to one of the more specific PmErrors, the
@@ -54,27 +54,27 @@ extern "C" {
* retained a more specific system-dependent error code. The caller can
* get more information by calling Pm_HasHostError() to test if there is
* a pending host error, and Pm_GetHostErrorText() to get a text string
- * describing the error. Host errors are reported on a per-device basis
- * because only after you open a device does PortMidi have a place to
- * record the host error code. I.e. only
- * those routines that receive a (PortMidiStream *) argument check and
- * report errors. One exception to this is that Pm_OpenInput() and
+ * describing the error. Host errors are reported on a per-device basis
+ * because only after you open a device does PortMidi have a place to
+ * record the host error code. I.e. only
+ * those routines that receive a (PortMidiStream *) argument check and
+ * report errors. One exception to this is that Pm_OpenInput() and
* Pm_OpenOutput() can report errors even though when an error occurs,
* there is no PortMidiStream* to hold the error. Fortunately, both
* of these functions return any error immediately, so we do not really
* need per-device error memory. Instead, any host error code is stored
- * in a global, pmHostError is returned, and the user can call
+ * in a global, pmHostError is returned, and the user can call
* Pm_GetHostErrorText() to get the error message (and the invalid stream
- * parameter will be ignored.) The functions
+ * parameter will be ignored.) The functions
* pm_init and pm_term do not fail or raise
* errors. The job of pm_init is to locate all available devices so that
* the caller can get information via PmDeviceInfo(). If an error occurs,
* the device is simply not listed as available.
*
* Host errors come in two flavors:
- * a) host error
+ * a) host error
* b) host error during callback
- * These can occur w/midi input or output devices. (b) can only happen
+ * These can occur w/midi input or output devices. (b) can only happen
* asynchronously (during callback routines), whereas (a) only occurs while
* synchronously running PortMidi and any resulting system dependent calls.
* Both (a) and (b) are reported by the next read or write call. You can
@@ -84,7 +84,7 @@ extern "C" {
* NOTES ON COMPILE-TIME SWITCHES
*
* DEBUG assumes stdio and a console. Use this if you want automatic, simple
- * error reporting, e.g. for prototyping. If you are using MFC or some
+ * error reporting, e.g. for prototyping. If you are using MFC or some
* other graphical interface with no console, DEBUG probably should be
* undefined.
* PM_CHECK_ERRORS more-or-less takes over error checking for return values,
@@ -97,7 +97,7 @@ extern "C" {
#include <stdint.h>
#else
#ifndef INT32_DEFINED
-// rather than having users install a special .h file for windows,
+// rather than having users install a special .h file for windows,
// just put the required definitions inline here. porttime.h uses
// these too, so the definitions are (unfortunately) duplicated there
typedef int int32_t;
@@ -109,14 +109,14 @@ typedef unsigned int uint32_t;
//#ifdef _WINDLL
//#define PMEXPORT __declspec(dllexport)
//#else
-#define PMEXPORT
+#define PMEXPORT
//#endif
#ifndef FALSE
- #define FALSE 0
+ #define FALSE 0
#endif
#ifndef TRUE
- #define TRUE 1
+ #define TRUE 1
#endif
/* default size of buffers for sysex transmission: */
@@ -124,26 +124,26 @@ typedef unsigned int uint32_t;
/** List of portmidi errors.*/
typedef enum {
- pmNoError = 0,
- pmNoData = 0, /**< A "no error" return that also indicates no data avail. */
- pmGotData = 1, /**< A "no error" return that also indicates data available */
- pmHostError = -10000,
- pmInvalidDeviceId, /** out of range or
- * output device when input is requested or
+ pmNoError = 0,
+ pmNoData = 0, /**< A "no error" return that also indicates no data avail. */
+ pmGotData = 1, /**< A "no error" return that also indicates data available */
+ pmHostError = -10000,
+ pmInvalidDeviceId, /** out of range or
+ * output device when input is requested or
* input device when output is requested or
- * device is already opened
+ * device is already opened
*/
- pmInsufficientMemory,
- pmBufferTooSmall,
- pmBufferOverflow,
- pmBadPtr, /* PortMidiStream parameter is NULL or
+ pmInsufficientMemory,
+ pmBufferTooSmall,
+ pmBufferOverflow,
+ pmBadPtr, /* PortMidiStream parameter is NULL or
* stream is not opened or
* stream is output when input is required or
* stream is input when output is required */
- pmBadData, /** illegal midi data, e.g. missing EOX */
- pmInternalError,
- pmBufferMaxSize /** buffer is already as large as it can be */
- /* NOTE: If you add a new error type, be sure to update Pm_GetErrorText() */
+ pmBadData, /** illegal midi data, e.g. missing EOX */
+ pmInternalError,
+ pmBufferMaxSize /** buffer is already as large as it can be */
+ /* NOTE: If you add a new error type, be sure to update Pm_GetErrorText() */
} PmError;
/**
@@ -169,11 +169,11 @@ typedef void PortMidiStream;
asynchronously where the client does not
explicitly call a function, and therefore cannot receive an error code.
The client can test for a pending error using Pm_HasHostError(). If true,
- the error can be accessed and cleared by calling Pm_GetErrorText().
+ the error can be accessed and cleared by calling Pm_GetErrorText().
Errors are also cleared by calling other functions that can return
errors, e.g. Pm_OpenInput(), Pm_OpenOutput(), Pm_Read(), Pm_Write(). The
client does not need to call Pm_HasHostError(). Any pending error will be
- reported the next time the client performs an explicit function call on
+ reported the next time the client performs an explicit function call on
the stream, e.g. an input or output operation. Until the error is cleared,
no new error codes will be obtained, even for a different stream.
*/
@@ -181,19 +181,19 @@ PMEXPORT int Pm_HasHostError( PortMidiStream * stream );
/** Translate portmidi error number into human readable message.
- These strings are constants (set at compile time) so client has
+ These strings are constants (set at compile time) so client has
no need to allocate storage
*/
PMEXPORT const char *Pm_GetErrorText( PmError errnum );
/** Translate portmidi host error into human readable message.
These strings are computed at run time, so client has to allocate storage.
- After this routine executes, the host error is cleared.
+ After this routine executes, the host error is cleared.
*/
PMEXPORT void Pm_GetHostErrorText(char * msg, unsigned int len);
#define HDRLENGTH 50
-#define PM_HOST_ERROR_MSG_LEN 256u /* any host error msg will occupy less
+#define PM_HOST_ERROR_MSG_LEN 256u /* any host error msg will occupy less
than this number of characters */
/**
@@ -205,12 +205,12 @@ PMEXPORT void Pm_GetHostErrorText(char * msg, unsigned int len);
typedef int PmDeviceID;
#define pmNoDevice -1
typedef struct {
- int structVersion; /**< this internal structure version */
- const char *interf; /**< underlying MIDI API, e.g. MMSystem or DirectX */
- const char *name; /**< device name, e.g. USB MidiSport 1x1 */
- int input; /**< true iff input is available */
- int output; /**< true iff output is available */
- int opened; /**< used by generic PortMidi code to do error checking on arguments */
+ int structVersion; /**< this internal structure version */
+ const char *interf; /**< underlying MIDI API, e.g. MMSystem or DirectX */
+ const char *name; /**< device name, e.g. USB MidiSport 1x1 */
+ int input; /**< true iff input is available */
+ int output; /**< true iff output is available */
+ int opened; /**< used by generic PortMidi code to do error checking on arguments */
} PmDeviceInfo;
@@ -221,24 +221,24 @@ PMEXPORT int Pm_CountDevices( void );
Return the default device ID or pmNoDevice if there are no devices.
The result (but not pmNoDevice) can be passed to Pm_OpenMidi().
-
+
The default device can be specified using a small application
named pmdefaults that is part of the PortMidi distribution. This
program in turn uses the Java Preferences object created by
java.util.prefs.Preferences.userRoot().node("/PortMidi"); the
- preference is set by calling
+ preference is set by calling
prefs.put("PM_RECOMMENDED_OUTPUT_DEVICE", prefName);
or prefs.put("PM_RECOMMENDED_INPUT_DEVICE", prefName);
-
+
In the statements above, prefName is a string describing the
MIDI device in the form "interf, name" where interf identifies
the underlying software system or API used by PortMdi to access
- devices and name is the name of the device. These correspond to
+ devices and name is the name of the device. These correspond to
the interf and name fields of a PmDeviceInfo. (Currently supported
- interfaces are "MMSystem" for Win32, "ALSA" for Linux, and
+ interfaces are "MMSystem" for Win32, "ALSA" for Linux, and
"CoreMIDI" for OS X, so in fact, there is no choice of interface.)
- In "interf, name", the strings are actually substrings of
- the full interface and name strings. For example, the preference
+ In "interf, name", the strings are actually substrings of
+ the full interface and name strings. For example, the preference
"Core, Sport" will match a device with interface "CoreMIDI"
and name "In USB MidiSport 1x1". It will also match "CoreMIDI"
and "In USB MidiSport 2x2". The devices are enumerated in device
@@ -248,14 +248,14 @@ PMEXPORT int Pm_CountDevices( void );
the entire preference string is interpreted as a name, and the
interface part is the empty string, which matches anything.
- On the MAC, preferences are stored in
+ On the MAC, preferences are stored in
/Users/$NAME/Library/Preferences/com.apple.java.util.prefs.plist
which is a binary file. In addition to the pmdefaults program,
there are utilities that can read and edit this preference file.
- On the PC,
+ On the PC,
- On Linux,
+ On Linux,
*/
PMEXPORT PmDeviceID Pm_GetDefaultInputDeviceID( void );
@@ -271,7 +271,7 @@ typedef PmTimestamp (*PmTimeProcPtr)(void *time_info);
/** TRUE if t1 before t2 */
#define PmBefore(t1,t2) ((t1-t2) < 0)
-/**
+/**
\defgroup grp_device Input/Output Devices Handling
@{
*/
@@ -306,18 +306,18 @@ PMEXPORT const PmDeviceInfo* Pm_GetDeviceInfo( PmDeviceID id );
outputDriverInfo is never required for correct operation. If not used
outputDriverInfo should be NULL.
- For input, the buffersize specifies the number of input events to be
- buffered waiting to be read using Pm_Read(). For output, buffersize
- specifies the number of output events to be buffered waiting for output.
+ For input, the buffersize specifies the number of input events to be
+ buffered waiting to be read using Pm_Read(). For output, buffersize
+ specifies the number of output events to be buffered waiting for output.
(In some cases -- see below -- PortMidi does not buffer output at all
and merely passes data to a lower-level API, in which case buffersize
is ignored.)
-
- latency is the delay in milliseconds applied to timestamps to determine
- when the output should actually occur. (If latency is < 0, 0 is assumed.)
+
+ latency is the delay in milliseconds applied to timestamps to determine
+ when the output should actually occur. (If latency is < 0, 0 is assumed.)
If latency is zero, timestamps are ignored and all output is delivered
immediately. If latency is greater than zero, output is delayed until the
- message timestamp plus the latency. (NOTE: the time is measured relative
+ message timestamp plus the latency. (NOTE: the time is measured relative
to the time source indicated by time_proc. Timestamps are absolute,
not relative delays or offsets.) In some cases, PortMidi can obtain
better timing than your application by passing timestamps along to the
@@ -325,7 +325,7 @@ PMEXPORT const PmDeviceInfo* Pm_GetDeviceInfo( PmDeviceID id );
data to audio data by matching midi latency to the audio buffer latency.
time_proc is a pointer to a procedure that returns time in milliseconds. It
- may be NULL, in which case a default millisecond timebase (PortTime) is
+ may be NULL, in which case a default millisecond timebase (PortTime) is
used. If the application wants to use PortTime, it should start the timer
(call Pt_Start) before calling Pm_OpenInput or Pm_OpenOutput. If the
application tries to start the timer *after* Pm_OpenInput or Pm_OpenOutput,
@@ -351,20 +351,20 @@ PMEXPORT const PmDeviceInfo* Pm_GetDeviceInfo( PmDeviceID id );
*/
PMEXPORT PmError Pm_OpenInput( PortMidiStream** stream,
- PmDeviceID inputDevice,
- void *inputDriverInfo,
- int32_t bufferSize,
- PmTimeProcPtr time_proc,
- void *time_info );
+ PmDeviceID inputDevice,
+ void *inputDriverInfo,
+ int32_t bufferSize,
+ PmTimeProcPtr time_proc,
+ void *time_info );
PMEXPORT PmError Pm_OpenOutput( PortMidiStream** stream,
- PmDeviceID outputDevice,
- void *outputDriverInfo,
- int32_t bufferSize,
- PmTimeProcPtr time_proc,
- void *time_info,
- int32_t latency );
- /** @} */
+ PmDeviceID outputDevice,
+ void *outputDriverInfo,
+ int32_t bufferSize,
+ PmTimeProcPtr time_proc,
+ void *time_info,
+ int32_t latency );
+ /** @} */
/**
\defgroup grp_events_filters Events and Filters Handling
@@ -384,7 +384,7 @@ PMEXPORT PmError Pm_OpenOutput( PortMidiStream** stream,
Or you may be using a sequencer or drum-machine for MIDI clock information but want to
exclude any notes it may play.
*/
-
+
/* Filter bit-mask definitions */
/** filter active sensing messages (0xFE): */
#define PM_FILT_ACTIVE (1 << 0x0E)
@@ -404,7 +404,7 @@ PMEXPORT PmError Pm_OpenOutput( PortMidiStream** stream,
#define PM_FILT_RESET (1 << 0x0F)
/** filter all real-time messages */
#define PM_FILT_REALTIME (PM_FILT_ACTIVE | PM_FILT_SYSEX | PM_FILT_CLOCK | \
- PM_FILT_PLAY | PM_FILT_UNDEFINED | PM_FILT_RESET | PM_FILT_TICK)
+ PM_FILT_PLAY | PM_FILT_UNDEFINED | PM_FILT_RESET | PM_FILT_TICK)
/** filter note-on and note-off (0x90-0x9F and 0x80-0x8F */
#define PM_FILT_NOTE ((1 << 0x19) | (1 << 0x18))
/** filter channel aftertouch (most midi controllers use this) (0xD0-0xDF)*/
@@ -443,7 +443,7 @@ PMEXPORT PmError Pm_SetFilter( PortMidiStream* stream, int32_t filters );
Multiple channels should be OR'd together, like
Pm_SetChannelMask(Pm_Channel(10) | Pm_Channel(11))
- Note that channels are numbered 0 to 15 (not 1 to 16). Most
+ Note that channels are numbered 0 to 15 (not 1 to 16). Most
synthesizer and interfaces number channels starting at 1, but
PortMidi numbers channels starting at 0.
@@ -460,10 +460,10 @@ PMEXPORT PmError Pm_SetChannelMask(PortMidiStream *stream, int mask);
any time.
*/
PMEXPORT PmError Pm_Abort( PortMidiStream* stream );
-
+
/**
Pm_Close() closes a midi stream, flushing any pending buffers.
- (PortMidi attempts to close open streams when the application
+ (PortMidi attempts to close open streams when the application
exits -- this is particularly difficult under Windows.)
*/
PMEXPORT PmError Pm_Close( PortMidiStream* stream );
@@ -473,22 +473,22 @@ PMEXPORT PmError Pm_Close( PortMidiStream* stream );
time_proc passed when the stream was opened. Typically, this
is used when the stream must be opened before the time_proc
reference is actually advancing. In this case, message timing
- may be erratic, but since timestamps of zero mean
+ may be erratic, but since timestamps of zero mean
"send immediately," initialization messages with zero timestamps
can be written without a functioning time reference and without
problems. Before the first MIDI message with a non-zero
timestamp is written to the stream, the time reference must
begin to advance (for example, if the time_proc computes time
- based on audio samples, time might begin to advance when an
+ based on audio samples, time might begin to advance when an
audio stream becomes active). After time_proc return values
- become valid, and BEFORE writing the first non-zero timestamped
+ become valid, and BEFORE writing the first non-zero timestamped
MIDI message, call Pm_Synchronize() so that PortMidi can observe
the difference between the current time_proc value and its
- MIDI stream time.
-
- In the more normal case where time_proc
- values advance continuously, there is no need to call
- Pm_Synchronize. PortMidi will always synchronize at the
+ MIDI stream time.
+
+ In the more normal case where time_proc
+ values advance continuously, there is no need to call
+ Pm_Synchronize. PortMidi will always synchronize at the
first output message and periodically thereafter.
*/
PmError Pm_Synchronize( PortMidiStream* stream );
@@ -498,13 +498,13 @@ PmError Pm_Synchronize( PortMidiStream* stream );
Pm_Message() encodes a short Midi message into a 32-bit word. If data1
and/or data2 are not present, use zero.
- Pm_MessageStatus(), Pm_MessageData1(), and
+ Pm_MessageStatus(), Pm_MessageData1(), and
Pm_MessageData2() extract fields from a 32-bit midi message.
*/
#define Pm_Message(status, data1, data2) \
- ((((data2) << 16) & 0xFF0000) | \
- (((data1) << 8) & 0xFF00) | \
- ((status) & 0xFF))
+ ((((data2) << 16) & 0xFF0000) | \
+ (((data1) << 8) & 0xFF00) | \
+ ((status) & 0xFF))
#define Pm_MessageStatus(msg) ((msg) & 0xFF)
#define Pm_MessageData1(msg) (((msg) >> 8) & 0xFF)
#define Pm_MessageData2(msg) (((msg) >> 16) & 0xFF)
@@ -516,71 +516,71 @@ typedef int32_t PmMessage; /**< see PmEvent */
structure carrying 4 bytes of the message, i.e. only the first
PmEvent carries the status byte.
- Note that MIDI allows nested messages: the so-called "real-time" MIDI
- messages can be inserted into the MIDI byte stream at any location,
+ Note that MIDI allows nested messages: the so-called "real-time" MIDI
+ messages can be inserted into the MIDI byte stream at any location,
including within a sysex message. MIDI real-time messages are one-byte
- messages used mainly for timing (see the MIDI spec). PortMidi retains
- the order of non-real-time MIDI messages on both input and output, but
+ messages used mainly for timing (see the MIDI spec). PortMidi retains
+ the order of non-real-time MIDI messages on both input and output, but
it does not specify exactly how real-time messages are processed. This
- is particulary problematic for MIDI input, because the input parser
- must either prepare to buffer an unlimited number of sysex message
- bytes or to buffer an unlimited number of real-time messages that
+ is particulary problematic for MIDI input, because the input parser
+ must either prepare to buffer an unlimited number of sysex message
+ bytes or to buffer an unlimited number of real-time messages that
arrive embedded in a long sysex message. To simplify things, the input
- parser is allowed to pass real-time MIDI messages embedded within a
- sysex message, and it is up to the client to detect, process, and
+ parser is allowed to pass real-time MIDI messages embedded within a
+ sysex message, and it is up to the client to detect, process, and
remove these messages as they arrive.
When receiving sysex messages, the sysex message is terminated
by either an EOX status byte (anywhere in the 4 byte messages) or
by a non-real-time status byte in the low order byte of the message.
- If you get a non-real-time status byte but there was no EOX byte, it
+ If you get a non-real-time status byte but there was no EOX byte, it
means the sysex message was somehow truncated. This is not
considered an error; e.g., a missing EOX can result from the user
disconnecting a MIDI cable during sysex transmission.
- A real-time message can occur within a sysex message. A real-time
- message will always occupy a full PmEvent with the status byte in
+ A real-time message can occur within a sysex message. A real-time
+ message will always occupy a full PmEvent with the status byte in
the low-order byte of the PmEvent message field. (This implies that
the byte-order of sysex bytes and real-time message bytes may not
be preserved -- for example, if a real-time message arrives after
3 bytes of a sysex message, the real-time message will be delivered
first. The first word of the sysex message will be delivered only
after the 4th byte arrives, filling the 4-byte PmEvent message field.
-
+
The timestamp field is observed when the output port is opened with
a non-zero latency. A timestamp of zero means "use the current time",
which in turn means to deliver the message with a delay of
latency (the latency parameter used when opening the output port.)
- Do not expect PortMidi to sort data according to timestamps --
- messages should be sent in the correct order, and timestamps MUST
+ Do not expect PortMidi to sort data according to timestamps --
+ messages should be sent in the correct order, and timestamps MUST
be non-decreasing. See also "Example" for Pm_OpenOutput() above.
- A sysex message will generally fill many PmEvent structures. On
+ A sysex message will generally fill many PmEvent structures. On
output to a PortMidiStream with non-zero latency, the first timestamp
- on sysex message data will determine the time to begin sending the
- message. PortMidi implementations may ignore timestamps for the
- remainder of the sysex message.
-
- On input, the timestamp ideally denotes the arrival time of the
- status byte of the message. The first timestamp on sysex message
- data will be valid. Subsequent timestamps may denote
- when message bytes were actually received, or they may be simply
+ on sysex message data will determine the time to begin sending the
+ message. PortMidi implementations may ignore timestamps for the
+ remainder of the sysex message.
+
+ On input, the timestamp ideally denotes the arrival time of the
+ status byte of the message. The first timestamp on sysex message
+ data will be valid. Subsequent timestamps may denote
+ when message bytes were actually received, or they may be simply
copies of the first timestamp.
- Timestamps for nested messages: If a real-time message arrives in
- the middle of some other message, it is enqueued immediately with
- the timestamp corresponding to its arrival time. The interrupted
- non-real-time message or 4-byte packet of sysex data will be enqueued
+ Timestamps for nested messages: If a real-time message arrives in
+ the middle of some other message, it is enqueued immediately with
+ the timestamp corresponding to its arrival time. The interrupted
+ non-real-time message or 4-byte packet of sysex data will be enqueued
later. The timestamp of interrupted data will be equal to that of
the interrupting real-time message to insure that timestamps are
non-decreasing.
*/
typedef struct {
- PmMessage message;
- PmTimestamp timestamp;
+ PmMessage message;
+ PmTimestamp timestamp;
} PmEvent;
-/**
+/**
@}
*/
/** \defgroup grp_io Reading and Writing Midi Messages
@@ -588,19 +588,19 @@ typedef struct {
*/
/**
Pm_Read() retrieves midi data into a buffer, and returns the number
- of events read. Result is a non-negative number unless an error occurs,
+ of events read. Result is a non-negative number unless an error occurs,
in which case a PmError value will be returned.
Buffer Overflow
- The problem: if an input overflow occurs, data will be lost, ultimately
- because there is no flow control all the way back to the data source.
- When data is lost, the receiver should be notified and some sort of
- graceful recovery should take place, e.g. you shouldn't resume receiving
+ The problem: if an input overflow occurs, data will be lost, ultimately
+ because there is no flow control all the way back to the data source.
+ When data is lost, the receiver should be notified and some sort of
+ graceful recovery should take place, e.g. you shouldn't resume receiving
in the middle of a long sysex message.
- With a lock-free fifo, which is pretty much what we're stuck with to
- enable portability to the Mac, it's tricky for the producer and consumer
+ With a lock-free fifo, which is pretty much what we're stuck with to
+ enable portability to the Mac, it's tricky for the producer and consumer
to synchronously reset the buffer and resume normal operation.
Solution: the buffer managed by PortMidi will be flushed when an overflow
@@ -613,20 +613,20 @@ typedef struct {
PMEXPORT int Pm_Read( PortMidiStream *stream, PmEvent *buffer, int32_t length );
/**
- Pm_Poll() tests whether input is available,
+ Pm_Poll() tests whether input is available,
returning TRUE, FALSE, or an error value.
*/
PMEXPORT PmError Pm_Poll( PortMidiStream *stream);
-/**
+/**
Pm_Write() writes midi data from a buffer. This may contain:
- - short messages
- or
+ - short messages
+ or
- sysex messages that are converted into a sequence of PmEvent
structures, e.g. sending data from a file or forwarding them
from midi input.
- Use Pm_WriteSysEx() to write a sysex message stored as a contiguous
+ Use Pm_WriteSysEx() to write a sysex message stored as a contiguous
array of bytes.
Sysex data may contain embedded real-time messages.
@@ -635,7 +635,7 @@ PMEXPORT PmError Pm_Write( PortMidiStream *stream, PmEvent *buffer, int32_t leng
/**
Pm_WriteShort() writes a timestamped non-system-exclusive midi message.
- Messages are delivered in order as received, and timestamps must be
+ Messages are delivered in order as received, and timestamps must be
non-decreasing. (But timestamps are ignored if the stream was opened
with latency = 0.)
*/
diff --git a/src/lib/portmidi/porttime.h b/src/lib/portmidi/porttime.h
index f5ffd5c1f49..16946b223e7 100644
--- a/src/lib/portmidi/porttime.h
+++ b/src/lib/portmidi/porttime.h
@@ -9,7 +9,7 @@
#ifdef WIN32
#ifndef INT32_DEFINED
-// rather than having users install a special .h file for windows,
+// rather than having users install a special .h file for windows,
// just put the required definitions inline here. portmidi.h uses
// these too, so the definitions are (unfortunately) duplicated there
typedef int int32_t;
@@ -25,15 +25,15 @@ extern "C" {
#endif
#ifndef PMEXPORT
-#define PMEXPORT
+#define PMEXPORT
#endif
typedef enum {
- ptNoError = 0, /* success */
- ptHostError = -10000, /* a system-specific error occurred */
- ptAlreadyStarted, /* cannot start timer because it is already started */
- ptAlreadyStopped, /* cannot stop timer because it is already stopped */
- ptInsufficientMemory /* memory could not be allocated */
+ ptNoError = 0, /* success */
+ ptHostError = -10000, /* a system-specific error occurred */
+ ptAlreadyStarted, /* cannot start timer because it is already started */
+ ptAlreadyStopped, /* cannot stop timer because it is already stopped */
+ ptInsufficientMemory /* memory could not be allocated */
} PtError;
@@ -69,7 +69,7 @@ PMEXPORT PtError Pt_Stop(void);
*/
PMEXPORT int Pt_Started(void);
-/*
+/*
Pt_Time() returns the current time in ms.
*/
PMEXPORT PtTimestamp Pt_Time(void);
@@ -77,7 +77,7 @@ PMEXPORT PtTimestamp Pt_Time(void);
/*
Pt_Sleep() pauses, allowing other threads to run.
- duration is the length of the pause in ms. The true duration
+ duration is the length of the pause in ms. The true duration
of the pause may be rounded to the nearest or next clock tick
as determined by resolution in Pt_Start().
*/
diff --git a/src/lib/portmidi/ptlinux.c b/src/lib/portmidi/ptlinux.c
index 768dd4847f7..bbf2ab1907a 100644
--- a/src/lib/portmidi/ptlinux.c
+++ b/src/lib/portmidi/ptlinux.c
@@ -1,24 +1,24 @@
/* ptlinux.c -- portable timer implementation for linux */
-/* IMPLEMENTATION NOTES (by Mark Nelson):
+/* IMPLEMENTATION NOTES (by Mark Nelson):
Unlike Windows, Linux has no system call to request a periodic callback,
so if Pt_Start() receives a callback parameter, it must create a thread
that wakes up periodically and calls the provided callback function.
-If running as superuser, use setpriority() to renice thread to -20.
+If running as superuser, use setpriority() to renice thread to -20.
One could also set the timer thread to a real-time priority (SCHED_FIFO
-and SCHED_RR), but this is dangerous for This is necessary because
+and SCHED_RR), but this is dangerous for This is necessary because
if the callback hangs it'll never return. A more serious reason
-is that the current scheduler implementation busy-waits instead
-of sleeping when realtime threads request a sleep of <=2ms (as a way
-to get around the 10ms granularity), which means the thread would never
+is that the current scheduler implementation busy-waits instead
+of sleeping when realtime threads request a sleep of <=2ms (as a way
+to get around the 10ms granularity), which means the thread would never
let anyone else on the CPU.
CHANGE LOG
18-Jul-03 Roger Dannenberg -- Simplified code to set priority of timer
- thread. Simplified implementation notes.
+ thread. Simplified implementation notes.
*/
/* stdlib, stdio, unistd, and sys/types were added because they appeared
@@ -44,95 +44,92 @@ static int pt_thread_created = FALSE;
/* note that this is static data -- we only need one copy */
typedef struct {
- int id;
- int resolution;
- PtCallback *callback;
- void *userData;
+ int id;
+ int resolution;
+ PtCallback *callback;
+ void *userData;
} pt_callback_parameters;
static int pt_callback_proc_id = 0;
static void *Pt_CallbackProc(void *p)
{
- pt_callback_parameters *parameters = (pt_callback_parameters *) p;
- int mytime = 1;
- /* to kill a process, just increment the pt_callback_proc_id */
- /* printf("pt_callback_proc_id %d, id %d\n", pt_callback_proc_id,
- parameters->id); */
- if (geteuid() == 0) setpriority(PRIO_PROCESS, 0, -20);
- while (pt_callback_proc_id == parameters->id) {
- /* wait for a multiple of resolution ms */
- struct timeval timeout;
- int delay = mytime++ * parameters->resolution - Pt_Time();
- if (delay < 0) delay = 0;
- timeout.tv_sec = 0;
- timeout.tv_usec = delay * 1000;
- select(0, NULL, NULL, NULL, &timeout);
- (*(parameters->callback))(Pt_Time(), parameters->userData);
- }
- /* printf("Pt_CallbackProc exiting\n"); */
- // free(parameters);
- return NULL;
+ pt_callback_parameters *parameters = (pt_callback_parameters *) p;
+ int mytime = 1;
+ /* to kill a process, just increment the pt_callback_proc_id */
+ /* printf("pt_callback_proc_id %d, id %d\n", pt_callback_proc_id,
+ parameters->id); */
+ if (geteuid() == 0) setpriority(PRIO_PROCESS, 0, -20);
+ while (pt_callback_proc_id == parameters->id) {
+ /* wait for a multiple of resolution ms */
+ struct timeval timeout;
+ int delay = mytime++ * parameters->resolution - Pt_Time();
+ if (delay < 0) delay = 0;
+ timeout.tv_sec = 0;
+ timeout.tv_usec = delay * 1000;
+ select(0, NULL, NULL, NULL, &timeout);
+ (*(parameters->callback))(Pt_Time(), parameters->userData);
+ }
+ /* printf("Pt_CallbackProc exiting\n"); */
+ // free(parameters);
+ return NULL;
}
PtError Pt_Start(int resolution, PtCallback *callback, void *userData)
{
- if (time_started_flag) return ptNoError;
- ftime(&time_offset); /* need this set before process runs */
- if (callback) {
- int res;
- pt_callback_parameters *parms = (pt_callback_parameters *)
- malloc(sizeof(pt_callback_parameters));
- if (!parms) return ptInsufficientMemory;
- parms->id = pt_callback_proc_id;
- parms->resolution = resolution;
- parms->callback = callback;
- parms->userData = userData;
- res = pthread_create(&pt_thread_pid, NULL,
- Pt_CallbackProc, parms);
- if (res != 0) return ptHostError;
- pt_thread_created = TRUE;
- }
- time_started_flag = TRUE;
- return ptNoError;
+ if (time_started_flag) return ptNoError;
+ ftime(&time_offset); /* need this set before process runs */
+ if (callback) {
+ int res;
+ pt_callback_parameters *parms = (pt_callback_parameters *)
+ malloc(sizeof(pt_callback_parameters));
+ if (!parms) return ptInsufficientMemory;
+ parms->id = pt_callback_proc_id;
+ parms->resolution = resolution;
+ parms->callback = callback;
+ parms->userData = userData;
+ res = pthread_create(&pt_thread_pid, NULL,
+ Pt_CallbackProc, parms);
+ if (res != 0) return ptHostError;
+ pt_thread_created = TRUE;
+ }
+ time_started_flag = TRUE;
+ return ptNoError;
}
PtError Pt_Stop()
{
- /* printf("Pt_Stop called\n"); */
- pt_callback_proc_id++;
- if (pt_thread_created) {
- pthread_join(pt_thread_pid, NULL);
- pt_thread_created = FALSE;
- }
- time_started_flag = FALSE;
- return ptNoError;
+ /* printf("Pt_Stop called\n"); */
+ pt_callback_proc_id++;
+ if (pt_thread_created) {
+ pthread_join(pt_thread_pid, NULL);
+ pt_thread_created = FALSE;
+ }
+ time_started_flag = FALSE;
+ return ptNoError;
}
int Pt_Started()
{
- return time_started_flag;
+ return time_started_flag;
}
PtTimestamp Pt_Time()
{
- long seconds, milliseconds;
- struct timeb now;
- ftime(&now);
- seconds = now.time - time_offset.time;
- milliseconds = now.millitm - time_offset.millitm;
- return seconds * 1000 + milliseconds;
+ long seconds, milliseconds;
+ struct timeb now;
+ ftime(&now);
+ seconds = now.time - time_offset.time;
+ milliseconds = now.millitm - time_offset.millitm;
+ return seconds * 1000 + milliseconds;
}
void Pt_Sleep(int32_t duration)
{
- usleep(duration * 1000);
+ usleep(duration * 1000);
}
-
-
-
diff --git a/src/lib/portmidi/ptmacosx_cf.c b/src/lib/portmidi/ptmacosx_cf.c
index 3eb0de12f82..7848be5f0c5 100644
--- a/src/lib/portmidi/ptmacosx_cf.c
+++ b/src/lib/portmidi/ptmacosx_cf.c
@@ -20,121 +20,121 @@ static CFAbsoluteTime startTime = 0.0;
static CFRunLoopRef timerRunLoop;
typedef struct {
- int resolution;
- PtCallback *callback;
- void *userData;
+ int resolution;
+ PtCallback *callback;
+ void *userData;
} PtThreadParams;
void Pt_CFTimerCallback(CFRunLoopTimerRef timer, void *info)
{
- PtThreadParams *params = (PtThreadParams*)info;
- (*params->callback)(Pt_Time(), params->userData);
+ PtThreadParams *params = (PtThreadParams*)info;
+ (*params->callback)(Pt_Time(), params->userData);
}
static void* Pt_Thread(void *p)
{
- CFTimeInterval timerInterval;
- CFRunLoopTimerContext timerContext;
- CFRunLoopTimerRef timer;
- PtThreadParams *params = (PtThreadParams*)p;
- //CFTimeInterval timeout;
-
- /* raise the thread's priority */
- kern_return_t error;
- thread_extended_policy_data_t extendedPolicy;
- thread_precedence_policy_data_t precedencePolicy;
-
- extendedPolicy.timeshare = 0;
- error = thread_policy_set(mach_thread_self(), THREAD_EXTENDED_POLICY,
- (thread_policy_t)&extendedPolicy,
- THREAD_EXTENDED_POLICY_COUNT);
- if (error != KERN_SUCCESS) {
- mach_error("Couldn't set thread timeshare policy", error);
- }
-
- precedencePolicy.importance = THREAD_IMPORTANCE;
- error = thread_policy_set(mach_thread_self(), THREAD_PRECEDENCE_POLICY,
- (thread_policy_t)&precedencePolicy,
- THREAD_PRECEDENCE_POLICY_COUNT);
- if (error != KERN_SUCCESS) {
- mach_error("Couldn't set thread precedence policy", error);
- }
-
- /* set up the timer context */
- timerContext.version = 0;
- timerContext.info = params;
- timerContext.retain = NULL;
- timerContext.release = NULL;
- timerContext.copyDescription = NULL;
-
- /* create a new timer */
- timerInterval = (double)params->resolution / 1000.0;
- timer = CFRunLoopTimerCreate(NULL, startTime+timerInterval, timerInterval,
- 0, 0, Pt_CFTimerCallback, &timerContext);
-
- timerRunLoop = CFRunLoopGetCurrent();
- CFRunLoopAddTimer(timerRunLoop, timer, CFSTR("PtTimeMode"));
-
- /* run until we're told to stop by Pt_Stop() */
- CFRunLoopRunInMode(CFSTR("PtTimeMode"), LONG_TIME, false);
-
- CFRunLoopRemoveTimer(CFRunLoopGetCurrent(), timer, CFSTR("PtTimeMode"));
- CFRelease(timer);
- free(params);
-
- return NULL;
+ CFTimeInterval timerInterval;
+ CFRunLoopTimerContext timerContext;
+ CFRunLoopTimerRef timer;
+ PtThreadParams *params = (PtThreadParams*)p;
+ //CFTimeInterval timeout;
+
+ /* raise the thread's priority */
+ kern_return_t error;
+ thread_extended_policy_data_t extendedPolicy;
+ thread_precedence_policy_data_t precedencePolicy;
+
+ extendedPolicy.timeshare = 0;
+ error = thread_policy_set(mach_thread_self(), THREAD_EXTENDED_POLICY,
+ (thread_policy_t)&extendedPolicy,
+ THREAD_EXTENDED_POLICY_COUNT);
+ if (error != KERN_SUCCESS) {
+ mach_error("Couldn't set thread timeshare policy", error);
+ }
+
+ precedencePolicy.importance = THREAD_IMPORTANCE;
+ error = thread_policy_set(mach_thread_self(), THREAD_PRECEDENCE_POLICY,
+ (thread_policy_t)&precedencePolicy,
+ THREAD_PRECEDENCE_POLICY_COUNT);
+ if (error != KERN_SUCCESS) {
+ mach_error("Couldn't set thread precedence policy", error);
+ }
+
+ /* set up the timer context */
+ timerContext.version = 0;
+ timerContext.info = params;
+ timerContext.retain = NULL;
+ timerContext.release = NULL;
+ timerContext.copyDescription = NULL;
+
+ /* create a new timer */
+ timerInterval = (double)params->resolution / 1000.0;
+ timer = CFRunLoopTimerCreate(NULL, startTime+timerInterval, timerInterval,
+ 0, 0, Pt_CFTimerCallback, &timerContext);
+
+ timerRunLoop = CFRunLoopGetCurrent();
+ CFRunLoopAddTimer(timerRunLoop, timer, CFSTR("PtTimeMode"));
+
+ /* run until we're told to stop by Pt_Stop() */
+ CFRunLoopRunInMode(CFSTR("PtTimeMode"), LONG_TIME, false);
+
+ CFRunLoopRemoveTimer(CFRunLoopGetCurrent(), timer, CFSTR("PtTimeMode"));
+ CFRelease(timer);
+ free(params);
+
+ return NULL;
}
PtError Pt_Start(int resolution, PtCallback *callback, void *userData)
{
- PtThreadParams *params = (PtThreadParams*)malloc(sizeof(PtThreadParams));
- pthread_t pthread_id;
-
- printf("Pt_Start() called\n");
-
- // /* make sure we're not already playing */
- if (time_started_flag) return ptAlreadyStarted;
- startTime = CFAbsoluteTimeGetCurrent();
-
- if (callback) {
-
- params->resolution = resolution;
- params->callback = callback;
- params->userData = userData;
-
- pthread_create(&pthread_id, NULL, Pt_Thread, params);
- }
-
- time_started_flag = TRUE;
- return ptNoError;
+ PtThreadParams *params = (PtThreadParams*)malloc(sizeof(PtThreadParams));
+ pthread_t pthread_id;
+
+ printf("Pt_Start() called\n");
+
+ // /* make sure we're not already playing */
+ if (time_started_flag) return ptAlreadyStarted;
+ startTime = CFAbsoluteTimeGetCurrent();
+
+ if (callback) {
+
+ params->resolution = resolution;
+ params->callback = callback;
+ params->userData = userData;
+
+ pthread_create(&pthread_id, NULL, Pt_Thread, params);
+ }
+
+ time_started_flag = TRUE;
+ return ptNoError;
}
PtError Pt_Stop()
{
- printf("Pt_Stop called\n");
+ printf("Pt_Stop called\n");
- CFRunLoopStop(timerRunLoop);
- time_started_flag = FALSE;
- return ptNoError;
+ CFRunLoopStop(timerRunLoop);
+ time_started_flag = FALSE;
+ return ptNoError;
}
int Pt_Started()
{
- return time_started_flag;
+ return time_started_flag;
}
PtTimestamp Pt_Time()
{
- CFAbsoluteTime now = CFAbsoluteTimeGetCurrent();
- return (PtTimestamp) ((now - startTime) * 1000.0);
+ CFAbsoluteTime now = CFAbsoluteTimeGetCurrent();
+ return (PtTimestamp) ((now - startTime) * 1000.0);
}
void Pt_Sleep(int32_t duration)
{
- usleep(duration * 1000);
+ usleep(duration * 1000);
}
diff --git a/src/lib/portmidi/ptmacosx_mach.c b/src/lib/portmidi/ptmacosx_mach.c
index 81832602bf2..40cae5edf3d 100644
--- a/src/lib/portmidi/ptmacosx_mach.c
+++ b/src/lib/portmidi/ptmacosx_mach.c
@@ -25,109 +25,109 @@ static pthread_t pt_thread_pid;
/* note that this is static data -- we only need one copy */
typedef struct {
- int id;
- int resolution;
- PtCallback *callback;
- void *userData;
+ int id;
+ int resolution;
+ PtCallback *callback;
+ void *userData;
} pt_callback_parameters;
static int pt_callback_proc_id = 0;
static void *Pt_CallbackProc(void *p)
{
- pt_callback_parameters *parameters = (pt_callback_parameters *) p;
- int mytime = 1;
-
- kern_return_t error;
- thread_extended_policy_data_t extendedPolicy;
- thread_precedence_policy_data_t precedencePolicy;
-
- extendedPolicy.timeshare = 0;
- error = thread_policy_set(mach_thread_self(), THREAD_EXTENDED_POLICY,
- (thread_policy_t)&extendedPolicy,
- THREAD_EXTENDED_POLICY_COUNT);
- if (error != KERN_SUCCESS) {
- mach_error("Couldn't set thread timeshare policy", error);
- }
-
- precedencePolicy.importance = THREAD_IMPORTANCE;
- error = thread_policy_set(mach_thread_self(), THREAD_PRECEDENCE_POLICY,
- (thread_policy_t)&precedencePolicy,
- THREAD_PRECEDENCE_POLICY_COUNT);
- if (error != KERN_SUCCESS) {
- mach_error("Couldn't set thread precedence policy", error);
- }
-
-
- /* to kill a process, just increment the pt_callback_proc_id */
- /* printf("pt_callback_proc_id %d, id %d\n", pt_callback_proc_id, parameters->id); */
- while (pt_callback_proc_id == parameters->id) {
- /* wait for a multiple of resolution ms */
- UInt64 wait_time;
- int delay = mytime++ * parameters->resolution - Pt_Time();
+ pt_callback_parameters *parameters = (pt_callback_parameters *) p;
+ int mytime = 1;
+
+ kern_return_t error;
+ thread_extended_policy_data_t extendedPolicy;
+ thread_precedence_policy_data_t precedencePolicy;
+
+ extendedPolicy.timeshare = 0;
+ error = thread_policy_set(mach_thread_self(), THREAD_EXTENDED_POLICY,
+ (thread_policy_t)&extendedPolicy,
+ THREAD_EXTENDED_POLICY_COUNT);
+ if (error != KERN_SUCCESS) {
+ mach_error("Couldn't set thread timeshare policy", error);
+ }
+
+ precedencePolicy.importance = THREAD_IMPORTANCE;
+ error = thread_policy_set(mach_thread_self(), THREAD_PRECEDENCE_POLICY,
+ (thread_policy_t)&precedencePolicy,
+ THREAD_PRECEDENCE_POLICY_COUNT);
+ if (error != KERN_SUCCESS) {
+ mach_error("Couldn't set thread precedence policy", error);
+ }
+
+
+ /* to kill a process, just increment the pt_callback_proc_id */
+ /* printf("pt_callback_proc_id %d, id %d\n", pt_callback_proc_id, parameters->id); */
+ while (pt_callback_proc_id == parameters->id) {
+ /* wait for a multiple of resolution ms */
+ UInt64 wait_time;
+ int delay = mytime++ * parameters->resolution - Pt_Time();
PtTimestamp timestamp;
- if (delay < 0) delay = 0;
- wait_time = AudioConvertNanosToHostTime((UInt64)delay * NSEC_PER_MSEC);
- wait_time += AudioGetCurrentHostTime();
- error = mach_wait_until(wait_time);
+ if (delay < 0) delay = 0;
+ wait_time = AudioConvertNanosToHostTime((UInt64)delay * NSEC_PER_MSEC);
+ wait_time += AudioGetCurrentHostTime();
+ error = mach_wait_until(wait_time);
timestamp = Pt_Time();
- (*(parameters->callback))(timestamp, parameters->userData);
- }
- free(parameters);
- return NULL;
+ (*(parameters->callback))(timestamp, parameters->userData);
+ }
+ free(parameters);
+ return NULL;
}
PtError Pt_Start(int resolution, PtCallback *callback, void *userData)
{
- if (time_started_flag) return ptAlreadyStarted;
- start_time = AudioGetCurrentHostTime();
-
- if (callback) {
- int res;
- pt_callback_parameters *parms;
-
- parms = (pt_callback_parameters *) malloc(sizeof(pt_callback_parameters));
- if (!parms) return ptInsufficientMemory;
- parms->id = pt_callback_proc_id;
- parms->resolution = resolution;
- parms->callback = callback;
- parms->userData = userData;
- res = pthread_create(&pt_thread_pid, NULL, Pt_CallbackProc, parms);
- if (res != 0) return ptHostError;
- }
-
- time_started_flag = TRUE;
- return ptNoError;
+ if (time_started_flag) return ptAlreadyStarted;
+ start_time = AudioGetCurrentHostTime();
+
+ if (callback) {
+ int res;
+ pt_callback_parameters *parms;
+
+ parms = (pt_callback_parameters *) malloc(sizeof(pt_callback_parameters));
+ if (!parms) return ptInsufficientMemory;
+ parms->id = pt_callback_proc_id;
+ parms->resolution = resolution;
+ parms->callback = callback;
+ parms->userData = userData;
+ res = pthread_create(&pt_thread_pid, NULL, Pt_CallbackProc, parms);
+ if (res != 0) return ptHostError;
+ }
+
+ time_started_flag = TRUE;
+ return ptNoError;
}
PtError Pt_Stop()
{
- /* printf("Pt_Stop called\n"); */
- pt_callback_proc_id++;
- pthread_join(pt_thread_pid, NULL);
- time_started_flag = FALSE;
- return ptNoError;
+ /* printf("Pt_Stop called\n"); */
+ pt_callback_proc_id++;
+ pthread_join(pt_thread_pid, NULL);
+ time_started_flag = FALSE;
+ return ptNoError;
}
int Pt_Started()
{
- return time_started_flag;
+ return time_started_flag;
}
PtTimestamp Pt_Time()
{
- UInt64 clock_time, nsec_time;
- clock_time = AudioGetCurrentHostTime() - start_time;
- nsec_time = AudioConvertHostTimeToNanos(clock_time);
- return (PtTimestamp)(nsec_time / NSEC_PER_MSEC);
+ UInt64 clock_time, nsec_time;
+ clock_time = AudioGetCurrentHostTime() - start_time;
+ nsec_time = AudioConvertHostTimeToNanos(clock_time);
+ return (PtTimestamp)(nsec_time / NSEC_PER_MSEC);
}
void Pt_Sleep(int32_t duration)
{
- usleep(duration * 1000);
+ usleep(duration * 1000);
}
diff --git a/src/lib/portmidi/ptwinmm.c b/src/lib/portmidi/ptwinmm.c
index 17675bd6c6a..c3c5ee041d5 100644
--- a/src/lib/portmidi/ptwinmm.c
+++ b/src/lib/portmidi/ptwinmm.c
@@ -14,57 +14,57 @@ static long time_resolution;
static MMRESULT timer_id;
static PtCallback *time_callback;
-void CALLBACK winmm_time_callback(UINT uID, UINT uMsg, DWORD_PTR dwUser,
- DWORD_PTR dw1, DWORD_PTR dw2)
+void CALLBACK winmm_time_callback(UINT uID, UINT uMsg, DWORD_PTR dwUser,
+ DWORD_PTR dw1, DWORD_PTR dw2)
{
- (*time_callback)(Pt_Time(), (void *) dwUser);
+ (*time_callback)(Pt_Time(), (void *) dwUser);
}
-
+
PMEXPORT PtError Pt_Start(int resolution, PtCallback *callback, void *userData)
{
- if (time_started_flag) return ptAlreadyStarted;
- timeBeginPeriod(resolution);
- time_resolution = resolution;
- time_offset = timeGetTime();
- time_started_flag = TRUE;
- time_callback = callback;
- if (callback) {
- timer_id = timeSetEvent(resolution, 1, winmm_time_callback,
- (DWORD_PTR) userData, TIME_PERIODIC | TIME_CALLBACK_FUNCTION);
- if (!timer_id) return ptHostError;
- }
- return ptNoError;
+ if (time_started_flag) return ptAlreadyStarted;
+ timeBeginPeriod(resolution);
+ time_resolution = resolution;
+ time_offset = timeGetTime();
+ time_started_flag = TRUE;
+ time_callback = callback;
+ if (callback) {
+ timer_id = timeSetEvent(resolution, 1, winmm_time_callback,
+ (DWORD_PTR) userData, TIME_PERIODIC | TIME_CALLBACK_FUNCTION);
+ if (!timer_id) return ptHostError;
+ }
+ return ptNoError;
}
PMEXPORT PtError Pt_Stop()
{
- if (!time_started_flag) return ptAlreadyStopped;
- if (time_callback && timer_id) {
- timeKillEvent(timer_id);
- time_callback = NULL;
- timer_id = 0;
- }
- time_started_flag = FALSE;
- timeEndPeriod(time_resolution);
- return ptNoError;
+ if (!time_started_flag) return ptAlreadyStopped;
+ if (time_callback && timer_id) {
+ timeKillEvent(timer_id);
+ time_callback = NULL;
+ timer_id = 0;
+ }
+ time_started_flag = FALSE;
+ timeEndPeriod(time_resolution);
+ return ptNoError;
}
PMEXPORT int Pt_Started()
{
- return time_started_flag;
+ return time_started_flag;
}
PMEXPORT PtTimestamp Pt_Time()
{
- return timeGetTime() - time_offset;
+ return timeGetTime() - time_offset;
}
PMEXPORT void Pt_Sleep(int32_t duration)
{
- Sleep(duration);
+ Sleep(duration);
}
diff --git a/src/lib/portmidi/readbinaryplist.c b/src/lib/portmidi/readbinaryplist.c
index dad2ba75762..7adf031b95d 100644
--- a/src/lib/portmidi/readbinaryplist.c
+++ b/src/lib/portmidi/readbinaryplist.c
@@ -54,7 +54,7 @@ depth-first search to free nodes, you will free nodes twice. I decided
to allocate memory from blocks of 1024 bytes and keep the blocks in a
list associated with but private to this module. So the user should
access this module by calling:
- bplist_read_file() or bplist_read_user_pref() or
+ bplist_read_file() or bplist_read_user_pref() or
bplist_read_system_pref()
which returns a value. When you are done with the value, call
bplist_free_data()
@@ -91,33 +91,33 @@ memory requested or calls longjmp, so callers don't have to check.
/* there are 2 levels of error logging/printing:
* BPLIST_LOG and BPLIST_LOG_VERBOSE
* either or both can be set to non-zero to turn on
- * If BPLIST_LOG_VERBOSE is true, then BPLIST_LOG
+ * If BPLIST_LOG_VERBOSE is true, then BPLIST_LOG
* is also true.
- *
+ *
* In the code, logging is done by calling either
* bplist_log() or bplist_log_verbose(), which take
* parameters like printf but might be a no-op.
*/
-
+
#define BPLIST_LOG_VERBOSE 0
#define BPLIST_LOG 0
#if BPLIST_LOG_VERBOSE
- #ifndef BPLIST_LOG
- #define BPLIST_LOG 1
- #endif
+ #ifndef BPLIST_LOG
+ #define BPLIST_LOG 1
+ #endif
#endif
#if BPLIST_LOG
- #define bplist_log printf
+ #define bplist_log printf
#else
- #define bplist_log(...)
+ #define bplist_log(...)
#endif
#if BPLIST_LOG_VERBOSE
- #define bplist_log_verbose bplist_log
+ #define bplist_log_verbose bplist_log
#else
- #define bplist_log_verbose(...)
+ #define bplist_log_verbose(...)
#endif
@@ -133,54 +133,54 @@ static jmp_buf abort_parsing;
static void *allocate(size_t size)
{
- void *result;
- if (free_ptr + size > end_ptr) {
- size_t how_much = BLOCK_SIZE;
- // align everything to 8 bytes
- if (size > BLOCK_SIZE - ALIGNMENT) {
- how_much = size + ALIGNMENT;
- }
- result = malloc(how_much);
- if (result == NULL) {
- /* serious problem */
- longjmp(abort_parsing, 1);
- }
- *((void **)result) = block_list;
- block_list = result;
- free_ptr = ((char *) result) + ALIGNMENT;
- end_ptr = ((char *) result) + how_much;
- }
- // now, there is enough rooom at free_ptr
- result = free_ptr;
- free_ptr += size;
- return result;
+ void *result;
+ if (free_ptr + size > end_ptr) {
+ size_t how_much = BLOCK_SIZE;
+ // align everything to 8 bytes
+ if (size > BLOCK_SIZE - ALIGNMENT) {
+ how_much = size + ALIGNMENT;
+ }
+ result = malloc(how_much);
+ if (result == NULL) {
+ /* serious problem */
+ longjmp(abort_parsing, 1);
+ }
+ *((void **)result) = block_list;
+ block_list = result;
+ free_ptr = ((char *) result) + ALIGNMENT;
+ end_ptr = ((char *) result) + how_much;
+ }
+ // now, there is enough rooom at free_ptr
+ result = free_ptr;
+ free_ptr += size;
+ return result;
}
void bplist_free_data()
{
- while (block_list) {
- void *next = *(void **)block_list;
- free(block_list);
- block_list = next;
- }
- free_ptr = NULL;
- end_ptr = NULL;
+ while (block_list) {
+ void *next = *(void **)block_list;
+ free(block_list);
+ block_list = next;
+ }
+ free_ptr = NULL;
+ end_ptr = NULL;
}
// layout of trailer -- last 32 bytes in plist data
- uint8_t unused[6];
- uint8_t offset_int_size;
- uint8_t object_ref_size;
- uint64_t object_count;
- uint64_t top_level_object;
- uint64_t offset_table_offset;
+ uint8_t unused[6];
+ uint8_t offset_int_size;
+ uint8_t object_ref_size;
+ uint64_t object_count;
+ uint64_t top_level_object;
+ uint64_t offset_table_offset;
enum
{
- kHEADER_SIZE = 8,
- kTRAILER_SIZE = 32, //sizeof(bplist_trailer_node),
- kMINIMUM_SANE_SIZE = kHEADER_SIZE + kTRAILER_SIZE
+ kHEADER_SIZE = 8,
+ kTRAILER_SIZE = 32, //sizeof(bplist_trailer_node),
+ kMINIMUM_SANE_SIZE = kHEADER_SIZE + kTRAILER_SIZE
};
@@ -188,21 +188,21 @@ static const char kHEADER_BYTES[kHEADER_SIZE] = "bplist00";
// map from UID key to previously parsed value
typedef struct cache_struct {
- uint64_t key;
- value_ptr value;
- struct cache_struct *next;
+ uint64_t key;
+ value_ptr value;
+ struct cache_struct *next;
} cache_node, *cache_ptr;
typedef struct bplist_info
{
- uint64_t object_count;
- const uint8_t *data_bytes;
- uint64_t length;
- uint64_t offset_table_offset;
- uint8_t offset_int_size;
- uint8_t object_ref_size;
- cache_ptr cache;
+ uint64_t object_count;
+ const uint8_t *data_bytes;
+ uint64_t length;
+ uint64_t offset_table_offset;
+ uint8_t offset_int_size;
+ uint8_t object_ref_size;
+ cache_ptr cache;
} bplist_info_node, *bplist_info_ptr;
@@ -227,163 +227,163 @@ static value_ptr extract_dictionary(bplist_info_ptr bplist, uint64_t offset);
value_ptr value_create(void)
{
- value_ptr value = (value_ptr) allocate(sizeof(value_node));
- return value;
+ value_ptr value = (value_ptr) allocate(sizeof(value_node));
+ return value;
}
void value_set_integer(value_ptr v, int64_t i) {
- v->tag = kTAG_INT; v->integer = i;
+ v->tag = kTAG_INT; v->integer = i;
}
void value_set_real(value_ptr v, double d) {
- v->tag = kTAG_REAL; v->real = d;
+ v->tag = kTAG_REAL; v->real = d;
}
// d is seconds since 1 January 2001
void value_set_date(value_ptr v, double d) {
- v->tag = kTAG_DATE; v->real = d;
+ v->tag = kTAG_DATE; v->real = d;
}
void value_set_ascii_string(value_ptr v, const uint8_t *s, size_t len) {
- v->tag = kTAG_ASCIISTRING;
- v->string = (char *) allocate(len + 1);
- memcpy(v->string, s, len);
- v->string[len] = 0;
+ v->tag = kTAG_ASCIISTRING;
+ v->string = (char *) allocate(len + 1);
+ memcpy(v->string, s, len);
+ v->string[len] = 0;
}
void value_set_unicode_string(value_ptr v, const uint8_t *s, size_t len) {
- v->tag = kTAG_UNICODESTRING;
- v->string = (char *) allocate(len + 1);
- memcpy(v->string, s, len);
- v->string[len] = 0;
+ v->tag = kTAG_UNICODESTRING;
+ v->string = (char *) allocate(len + 1);
+ memcpy(v->string, s, len);
+ v->string[len] = 0;
}
void value_set_uid(value_ptr v, uint64_t uid)
{
- v->tag = kTAG_UID; v->uinteger = uid;
+ v->tag = kTAG_UID; v->uinteger = uid;
}
// v->data points to a pldata that points to the actual bytes
// the bytes are copied, so caller must free byte source (*data)
void value_set_data(value_ptr v, const uint8_t *data, size_t len) {
- v->tag = kTAG_DATA;
- pldata_ptr pldata = (pldata_ptr) allocate(sizeof(pldata_node));
- pldata->data = (uint8_t *) allocate(len);
- memcpy(pldata->data, data, len);
- pldata->len = len;
- v->data = pldata;
- printf("value at %p gets data at %p\n", v, pldata);
+ v->tag = kTAG_DATA;
+ pldata_ptr pldata = (pldata_ptr) allocate(sizeof(pldata_node));
+ pldata->data = (uint8_t *) allocate(len);
+ memcpy(pldata->data, data, len);
+ pldata->len = len;
+ v->data = pldata;
+ printf("value at %p gets data at %p\n", v, pldata);
}
// caller releases ownership of array to value_ptr v
void value_set_array(value_ptr v, value_ptr *array, size_t length) {
- array_ptr a = (array_ptr) allocate(sizeof(array_node));
- a->array = array;
- a->length = length;
- v->tag = kTAG_ARRAY;
- v->array = a;
+ array_ptr a = (array_ptr) allocate(sizeof(array_node));
+ a->array = array;
+ a->length = length;
+ v->tag = kTAG_ARRAY;
+ v->array = a;
}
// caller releases ownership of dict to value_ptr v
void value_set_dict(value_ptr v, dict_ptr dict) {
- v->tag = kTAG_DICTIONARY;
- v->dict = dict;
+ v->tag = kTAG_DICTIONARY;
+ v->dict = dict;
}
// look up an objectref in the cache, a ref->value_ptr mapping
value_ptr cache_lookup(cache_ptr cache, uint64_t ref)
{
- while (cache) {
- if (cache->key == ref) {
- return cache->value;
- }
- cache = cache->next;
- }
- return NULL;
+ while (cache) {
+ if (cache->key == ref) {
+ return cache->value;
+ }
+ cache = cache->next;
+ }
+ return NULL;
}
// insert an objectref and value in the cache
void cache_insert(cache_ptr *cache, uint64_t ref, value_ptr value)
{
- cache_ptr c = (cache_ptr) allocate(sizeof(cache_node));
- c->key = ref;
- c->value = value;
- c->next = *cache;
- *cache = c;
+ cache_ptr c = (cache_ptr) allocate(sizeof(cache_node));
+ c->key = ref;
+ c->value = value;
+ c->next = *cache;
+ *cache = c;
}
// insert an objectref and value in a dictionary
void dict_insert(dict_ptr *dict, value_ptr key, value_ptr value)
{
- dict_ptr d = (dict_ptr) allocate(sizeof(dict_node));
- d->key = key;
- d->value = value;
- d->next = *dict;
- *dict = d;
+ dict_ptr d = (dict_ptr) allocate(sizeof(dict_node));
+ d->key = key;
+ d->value = value;
+ d->next = *dict;
+ *dict = d;
}
BOOL is_binary_plist(pldata_ptr data)
{
- if (data->len < kMINIMUM_SANE_SIZE) return NO;
- return memcmp(data->data, kHEADER_BYTES, kHEADER_SIZE) == 0;
+ if (data->len < kMINIMUM_SANE_SIZE) return NO;
+ return memcmp(data->data, kHEADER_BYTES, kHEADER_SIZE) == 0;
}
value_ptr bplist_read_file(char *filename)
{
- struct stat stbuf;
- pldata_node pldata;
- FILE *file;
- size_t n;
- value_ptr value;
- int rslt = stat(filename, &stbuf);
- if (rslt) {
- #if BPLIST_LOG
- perror("in stat");
- #endif
- bplist_log("Could not stat %s, error %d\n", filename, rslt);
- return NULL;
- }
- // if file is >100MB, assume it is not a preferences file and give up
- if (stbuf.st_size > 100000000) {
- bplist_log("Large file %s encountered (%llu bytes) -- not read\n",
- filename, stbuf.st_size);
- return NULL;
- }
- pldata.len = (size_t) stbuf.st_size;
- // note: this is supposed to be malloc, not allocate. It is separate
- // from the graph structure, large, and easy to free right after
- // parsing.
- pldata.data = (uint8_t *) malloc(pldata.len);
- if (!pldata.data) {
- bplist_log("Could not allocate %lu bytes for %s\n",
- (unsigned long) pldata.len, filename);
- return NULL;
- }
- file = fopen(filename, "rb");
- if (!file) {
- bplist_log("Could not open %s\n", filename);
- return NULL;
- }
- n = fread(pldata.data, 1, pldata.len, file);
- if (n != pldata.len) {
- bplist_log("Error reading from %s\n", filename);
- return NULL;
- }
- value = bplist_read_pldata(&pldata);
- free(pldata.data);
- return value;
+ struct stat stbuf;
+ pldata_node pldata;
+ FILE *file;
+ size_t n;
+ value_ptr value;
+ int rslt = stat(filename, &stbuf);
+ if (rslt) {
+ #if BPLIST_LOG
+ perror("in stat");
+ #endif
+ bplist_log("Could not stat %s, error %d\n", filename, rslt);
+ return NULL;
+ }
+ // if file is >100MB, assume it is not a preferences file and give up
+ if (stbuf.st_size > 100000000) {
+ bplist_log("Large file %s encountered (%llu bytes) -- not read\n",
+ filename, stbuf.st_size);
+ return NULL;
+ }
+ pldata.len = (size_t) stbuf.st_size;
+ // note: this is supposed to be malloc, not allocate. It is separate
+ // from the graph structure, large, and easy to free right after
+ // parsing.
+ pldata.data = (uint8_t *) malloc(pldata.len);
+ if (!pldata.data) {
+ bplist_log("Could not allocate %lu bytes for %s\n",
+ (unsigned long) pldata.len, filename);
+ return NULL;
+ }
+ file = fopen(filename, "rb");
+ if (!file) {
+ bplist_log("Could not open %s\n", filename);
+ return NULL;
+ }
+ n = fread(pldata.data, 1, pldata.len, file);
+ if (n != pldata.len) {
+ bplist_log("Error reading from %s\n", filename);
+ return NULL;
+ }
+ value = bplist_read_pldata(&pldata);
+ free(pldata.data);
+ return value;
}
value_ptr bplist_read_pref(char *filename, OSType folder_type)
{
- char cstr[MAXPATHLEN];
+ char cstr[MAXPATHLEN];
char *foundstr;
memset(cstr, 0, MAXPATHLEN);
@@ -409,20 +409,20 @@ value_ptr bplist_read_pref(char *filename, OSType folder_type)
foundstr = NULL;
}
- strlcat(cstr, "/", MAXPATHLEN);
- strlcat(cstr, filename, MAXPATHLEN);
+ strlcat(cstr, "/", MAXPATHLEN);
+ strlcat(cstr, filename, MAXPATHLEN);
return bplist_read_file(cstr);
}
value_ptr bplist_read_system_pref(char *filename) {
- return bplist_read_pref(filename, kSystemPreferencesFolderType);
+ return bplist_read_pref(filename, kSystemPreferencesFolderType);
}
value_ptr bplist_read_user_pref(char *filename) {
- return bplist_read_pref(filename, kPreferencesFolderType);
+ return bplist_read_pref(filename, kPreferencesFolderType);
}
@@ -431,578 +431,578 @@ value_ptr bplist_read_user_pref(char *filename) {
//
uint64_t convert_uint64(uint8_t *ptr)
{
- uint64_t rslt = 0;
- int i;
- // shift in bytes, high-order first
- for (i = 0; i < sizeof(uint64_t); i++) {
- rslt <<= 8;
- rslt += ptr[i];
- }
- return rslt;
+ uint64_t rslt = 0;
+ int i;
+ // shift in bytes, high-order first
+ for (i = 0; i < sizeof(uint64_t); i++) {
+ rslt <<= 8;
+ rslt += ptr[i];
+ }
+ return rslt;
}
value_ptr bplist_read_pldata(pldata_ptr data)
{
- value_ptr result = NULL;
- bplist_info_node bplist;
- uint8_t *ptr;
- uint64_t top_level_object;
- int i;
-
- if (data == NULL) return NULL;
- if (!is_binary_plist(data)) {
- bplist_log("Bad binary plist: too short or invalid header.\n");
- return NULL;
- }
-
- // read trailer
- ptr = (uint8_t *) (data->data + data->len - kTRAILER_SIZE);
- bplist.offset_int_size = ptr[6];
- bplist.object_ref_size = ptr[7];
- bplist.object_count = convert_uint64(ptr + 8);
- top_level_object = convert_uint64(ptr + 16);
- bplist.offset_table_offset = convert_uint64(ptr + 24);
-
- // Basic sanity checks
- if (bplist.offset_int_size < 1 || bplist.offset_int_size > 8 ||
- bplist.object_ref_size < 1 || bplist.object_ref_size > 8 ||
- bplist.offset_table_offset < kHEADER_SIZE) {
- bplist_log("Bad binary plist: trailer declared insane.\n");
- return NULL;
- }
-
- // Ensure offset table is inside file
- uint64_t offsetTableSize = bplist.offset_int_size * bplist.object_count;
- if (offsetTableSize + bplist.offset_table_offset + kTRAILER_SIZE >
- data->len) {
- bplist_log("Bad binary plist: offset table overlaps end of container.\n");
- return NULL;
- }
-
- bplist.data_bytes = data->data;
- bplist.length = data->len;
- bplist.cache = NULL; /* dictionary is empty */
-
- bplist_log_verbose("Got a sane bplist with %llu items, offset_int_size: %u, object_ref_size: %u\n",
- bplist.object_count, bplist.offset_int_size,
- bplist.object_ref_size);
- /* at this point, we are ready to do some parsing which allocates
- memory for the result data structure. If memory allocation (using
- allocate fails, a longjmp will return to here and we simply give up
- */
- i = setjmp(abort_parsing);
- if (i == 0) {
- result = extract_object(&bplist, top_level_object);
- } else {
- bplist_log("allocate() failed to allocate memory. Giving up.\n");
- result = NULL;
- }
- if (!result) {
- bplist_free_data();
- }
- return result;
+ value_ptr result = NULL;
+ bplist_info_node bplist;
+ uint8_t *ptr;
+ uint64_t top_level_object;
+ int i;
+
+ if (data == NULL) return NULL;
+ if (!is_binary_plist(data)) {
+ bplist_log("Bad binary plist: too short or invalid header.\n");
+ return NULL;
+ }
+
+ // read trailer
+ ptr = (uint8_t *) (data->data + data->len - kTRAILER_SIZE);
+ bplist.offset_int_size = ptr[6];
+ bplist.object_ref_size = ptr[7];
+ bplist.object_count = convert_uint64(ptr + 8);
+ top_level_object = convert_uint64(ptr + 16);
+ bplist.offset_table_offset = convert_uint64(ptr + 24);
+
+ // Basic sanity checks
+ if (bplist.offset_int_size < 1 || bplist.offset_int_size > 8 ||
+ bplist.object_ref_size < 1 || bplist.object_ref_size > 8 ||
+ bplist.offset_table_offset < kHEADER_SIZE) {
+ bplist_log("Bad binary plist: trailer declared insane.\n");
+ return NULL;
+ }
+
+ // Ensure offset table is inside file
+ uint64_t offsetTableSize = bplist.offset_int_size * bplist.object_count;
+ if (offsetTableSize + bplist.offset_table_offset + kTRAILER_SIZE >
+ data->len) {
+ bplist_log("Bad binary plist: offset table overlaps end of container.\n");
+ return NULL;
+ }
+
+ bplist.data_bytes = data->data;
+ bplist.length = data->len;
+ bplist.cache = NULL; /* dictionary is empty */
+
+ bplist_log_verbose("Got a sane bplist with %llu items, offset_int_size: %u, object_ref_size: %u\n",
+ bplist.object_count, bplist.offset_int_size,
+ bplist.object_ref_size);
+ /* at this point, we are ready to do some parsing which allocates
+ memory for the result data structure. If memory allocation (using
+ allocate fails, a longjmp will return to here and we simply give up
+ */
+ i = setjmp(abort_parsing);
+ if (i == 0) {
+ result = extract_object(&bplist, top_level_object);
+ } else {
+ bplist_log("allocate() failed to allocate memory. Giving up.\n");
+ result = NULL;
+ }
+ if (!result) {
+ bplist_free_data();
+ }
+ return result;
}
static value_ptr extract_object(bplist_info_ptr bplist, uint64_t objectRef)
{
- uint64_t offset;
- value_ptr result = NULL;
- uint8_t objectTag;
-
- if (objectRef >= bplist->object_count) {
- // Out-of-range object reference.
- bplist_log("Bad binary plist: object index is out of range.\n");
- return NULL;
- }
-
- // Use cached object if it exists
- result = cache_lookup(bplist->cache, objectRef);
- if (result != NULL) return result;
-
- // Otherwise, find object in file.
- offset = read_offset(bplist, objectRef);
- if (offset > bplist->length) {
- // Out-of-range offset.
- bplist_log("Bad binary plist: object outside container.\n");
- return NULL;
- }
- objectTag = *(bplist->data_bytes + offset);
- switch (objectTag & 0xF0) {
- case kTAG_SIMPLE:
- result = extract_simple(bplist, offset);
- break;
-
- case kTAG_INT:
- result = extract_int(bplist, offset);
- break;
-
- case kTAG_REAL:
- result = extract_real(bplist, offset);
- break;
-
- case kTAG_DATE:
- result = extract_date(bplist, offset);
- break;
-
- case kTAG_DATA:
- result = extract_data(bplist, offset);
- break;
-
- case kTAG_ASCIISTRING:
- result = extract_ascii_string(bplist, offset);
- break;
-
- case kTAG_UNICODESTRING:
- result = extract_unicode_string(bplist, offset);
- break;
-
- case kTAG_UID:
- result = extract_uid(bplist, offset);
- break;
-
- case kTAG_ARRAY:
- result = extract_array(bplist, offset);
- break;
-
- case kTAG_DICTIONARY:
- result = extract_dictionary(bplist, offset);
- break;
-
- default:
- // Unknown tag.
- bplist_log("Bad binary plist: unknown tag 0x%X.\n",
- (objectTag & 0x0F) >> 4);
- result = NULL;
- }
-
- // Cache and return result.
- if (result != NULL)
- cache_insert(&bplist->cache, objectRef, result);
- return result;
+ uint64_t offset;
+ value_ptr result = NULL;
+ uint8_t objectTag;
+
+ if (objectRef >= bplist->object_count) {
+ // Out-of-range object reference.
+ bplist_log("Bad binary plist: object index is out of range.\n");
+ return NULL;
+ }
+
+ // Use cached object if it exists
+ result = cache_lookup(bplist->cache, objectRef);
+ if (result != NULL) return result;
+
+ // Otherwise, find object in file.
+ offset = read_offset(bplist, objectRef);
+ if (offset > bplist->length) {
+ // Out-of-range offset.
+ bplist_log("Bad binary plist: object outside container.\n");
+ return NULL;
+ }
+ objectTag = *(bplist->data_bytes + offset);
+ switch (objectTag & 0xF0) {
+ case kTAG_SIMPLE:
+ result = extract_simple(bplist, offset);
+ break;
+
+ case kTAG_INT:
+ result = extract_int(bplist, offset);
+ break;
+
+ case kTAG_REAL:
+ result = extract_real(bplist, offset);
+ break;
+
+ case kTAG_DATE:
+ result = extract_date(bplist, offset);
+ break;
+
+ case kTAG_DATA:
+ result = extract_data(bplist, offset);
+ break;
+
+ case kTAG_ASCIISTRING:
+ result = extract_ascii_string(bplist, offset);
+ break;
+
+ case kTAG_UNICODESTRING:
+ result = extract_unicode_string(bplist, offset);
+ break;
+
+ case kTAG_UID:
+ result = extract_uid(bplist, offset);
+ break;
+
+ case kTAG_ARRAY:
+ result = extract_array(bplist, offset);
+ break;
+
+ case kTAG_DICTIONARY:
+ result = extract_dictionary(bplist, offset);
+ break;
+
+ default:
+ // Unknown tag.
+ bplist_log("Bad binary plist: unknown tag 0x%X.\n",
+ (objectTag & 0x0F) >> 4);
+ result = NULL;
+ }
+
+ // Cache and return result.
+ if (result != NULL)
+ cache_insert(&bplist->cache, objectRef, result);
+ return result;
}
-static uint64_t read_sized_int(bplist_info_ptr bplist, uint64_t offset,
- uint8_t size)
+static uint64_t read_sized_int(bplist_info_ptr bplist, uint64_t offset,
+ uint8_t size)
{
- assert(bplist->data_bytes != NULL && size >= 1 && size <= 8 &&
- offset + size <= bplist->length);
-
- uint64_t result = 0;
- const uint8_t *byte = bplist->data_bytes + offset;
-
- do {
- // note that ints seem to be high-order first
- result = (result << 8) | *byte++;
- } while (--size);
-
- return result;
+ assert(bplist->data_bytes != NULL && size >= 1 && size <= 8 &&
+ offset + size <= bplist->length);
+
+ uint64_t result = 0;
+ const uint8_t *byte = bplist->data_bytes + offset;
+
+ do {
+ // note that ints seem to be high-order first
+ result = (result << 8) | *byte++;
+ } while (--size);
+
+ return result;
}
static uint64_t read_offset(bplist_info_ptr bplist, uint64_t index)
{
- assert(index < bplist->object_count);
-
- return read_sized_int(bplist,
- bplist->offset_table_offset + bplist->offset_int_size * index,
- bplist->offset_int_size);
+ assert(index < bplist->object_count);
+
+ return read_sized_int(bplist,
+ bplist->offset_table_offset + bplist->offset_int_size * index,
+ bplist->offset_int_size);
}
-static BOOL read_self_sized_int(bplist_info_ptr bplist, uint64_t offset,
- uint64_t *outValue, size_t *outSize)
+static BOOL read_self_sized_int(bplist_info_ptr bplist, uint64_t offset,
+ uint64_t *outValue, size_t *outSize)
{
- uint32_t size;
- int64_t value;
-
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
- size = 1 << (bplist->data_bytes[offset] & 0x0F);
- if (size > 8) {
- // Maximum allowable size in this implementation is 1<<3 = 8 bytes.
- // This also happens to be the biggest we can handle.
- return NO;
- }
-
- if (offset + 1 + size > bplist->length) {
- // Out of range.
- return NO;
- }
-
- value = read_sized_int(bplist, offset + 1, size);
-
- if (outValue != NULL) *outValue = value;
- if (outSize != NULL) *outSize = size + 1; // +1 for tag byte.
- return YES;
+ uint32_t size;
+ int64_t value;
+
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+ size = 1 << (bplist->data_bytes[offset] & 0x0F);
+ if (size > 8) {
+ // Maximum allowable size in this implementation is 1<<3 = 8 bytes.
+ // This also happens to be the biggest we can handle.
+ return NO;
+ }
+
+ if (offset + 1 + size > bplist->length) {
+ // Out of range.
+ return NO;
+ }
+
+ value = read_sized_int(bplist, offset + 1, size);
+
+ if (outValue != NULL) *outValue = value;
+ if (outSize != NULL) *outSize = size + 1; // +1 for tag byte.
+ return YES;
}
static value_ptr extract_simple(bplist_info_ptr bplist, uint64_t offset)
{
- assert(bplist->data_bytes != NULL && offset < bplist->length);
- value_ptr value = value_create();
-
- switch (bplist->data_bytes[offset]) {
- case kVALUE_NULL:
- value->tag = kVALUE_NULL;
- return value;
-
- case kVALUE_TRUE:
- value->tag = kVALUE_TRUE;
- return value;
-
- case kVALUE_FALSE:
- value->tag = kVALUE_FALSE;
- return value;
- }
-
- // Note: kVALUE_FILLER is treated as invalid, because it, er, is.
- bplist_log("Bad binary plist: invalid atom.\n");
- free(value);
- return NULL;
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+ value_ptr value = value_create();
+
+ switch (bplist->data_bytes[offset]) {
+ case kVALUE_NULL:
+ value->tag = kVALUE_NULL;
+ return value;
+
+ case kVALUE_TRUE:
+ value->tag = kVALUE_TRUE;
+ return value;
+
+ case kVALUE_FALSE:
+ value->tag = kVALUE_FALSE;
+ return value;
+ }
+
+ // Note: kVALUE_FILLER is treated as invalid, because it, er, is.
+ bplist_log("Bad binary plist: invalid atom.\n");
+ free(value);
+ return NULL;
}
static value_ptr extract_int(bplist_info_ptr bplist, uint64_t offset)
{
- value_ptr value = value_create();
- value->tag = kTAG_INT;
-
- if (!read_self_sized_int(bplist, offset, &value->uinteger, NULL)) {
- bplist_log("Bad binary plist: invalid integer object.\n");
- }
-
- /* NOTE: originally, I sign-extended here. This was the wrong thing; it
- turns out that negative ints are always stored as 64-bit, and smaller
- ints are unsigned.
- */
- return value;
+ value_ptr value = value_create();
+ value->tag = kTAG_INT;
+
+ if (!read_self_sized_int(bplist, offset, &value->uinteger, NULL)) {
+ bplist_log("Bad binary plist: invalid integer object.\n");
+ }
+
+ /* NOTE: originally, I sign-extended here. This was the wrong thing; it
+ turns out that negative ints are always stored as 64-bit, and smaller
+ ints are unsigned.
+ */
+ return value;
}
static value_ptr extract_real(bplist_info_ptr bplist, uint64_t offset)
{
- value_ptr value = value_create();
- uint32_t size;
-
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
- size = 1 << (bplist->data_bytes[offset] & 0x0F);
-
- // FIXME: what to do if faced with other sizes for float/double?
- assert (sizeof (float) == sizeof (uint32_t) &&
- sizeof (double) == sizeof (uint64_t));
-
- if (offset + 1 + size > bplist->length) {
- bplist_log("Bad binary plist: %s object overlaps end of container.\n",
- "floating-point number");
- free(value);
- return NULL;
- }
-
- if (size == sizeof (float)) {
- // cast is ok because we know size is 4 bytes
- uint32_t i = (uint32_t) read_sized_int(bplist, offset + 1, size);
- // Note that this handles byte swapping.
- value_set_real(value, *(float *)&i);
- return value;
- } else if (size == sizeof (double)) {
- uint64_t i = read_sized_int(bplist, offset + 1, size);
- // Note that this handles byte swapping.
- value_set_real(value, *(double *)&i);
- return value;
- } else {
- // Can't handle floats of other sizes.
- bplist_log("Bad binary plist: can't handle %u-byte float.\n", size);
- free(value);
- return NULL;
- }
+ value_ptr value = value_create();
+ uint32_t size;
+
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+ size = 1 << (bplist->data_bytes[offset] & 0x0F);
+
+ // FIXME: what to do if faced with other sizes for float/double?
+ assert (sizeof (float) == sizeof (uint32_t) &&
+ sizeof (double) == sizeof (uint64_t));
+
+ if (offset + 1 + size > bplist->length) {
+ bplist_log("Bad binary plist: %s object overlaps end of container.\n",
+ "floating-point number");
+ free(value);
+ return NULL;
+ }
+
+ if (size == sizeof (float)) {
+ // cast is ok because we know size is 4 bytes
+ uint32_t i = (uint32_t) read_sized_int(bplist, offset + 1, size);
+ // Note that this handles byte swapping.
+ value_set_real(value, *(float *)&i);
+ return value;
+ } else if (size == sizeof (double)) {
+ uint64_t i = read_sized_int(bplist, offset + 1, size);
+ // Note that this handles byte swapping.
+ value_set_real(value, *(double *)&i);
+ return value;
+ } else {
+ // Can't handle floats of other sizes.
+ bplist_log("Bad binary plist: can't handle %u-byte float.\n", size);
+ free(value);
+ return NULL;
+ }
}
static value_ptr extract_date(bplist_info_ptr bplist, uint64_t offset)
{
- value_ptr value;
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
- // Data has size code like int and real, but only 3 (meaning 8 bytes) is valid.
- if (bplist->data_bytes[offset] != kVALUE_FULLDATETAG) {
- bplist_log("Bad binary plist: invalid size for date object.\n");
- return NULL;
- }
-
- if (offset + 1 + sizeof (double) > bplist->length) {
- bplist_log("Bad binary plist: %s object overlaps end of container.\n",
- "date");
- return NULL;
- }
-
- // FIXME: what to do if faced with other sizes for double?
- assert (sizeof (double) == sizeof (uint64_t));
-
- uint64_t date = read_sized_int(bplist, offset + 1, sizeof(double));
- // Note that this handles byte swapping.
- value = value_create();
- value_set_date(value, *(double *)&date);
- return value;
+ value_ptr value;
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+ // Data has size code like int and real, but only 3 (meaning 8 bytes) is valid.
+ if (bplist->data_bytes[offset] != kVALUE_FULLDATETAG) {
+ bplist_log("Bad binary plist: invalid size for date object.\n");
+ return NULL;
+ }
+
+ if (offset + 1 + sizeof (double) > bplist->length) {
+ bplist_log("Bad binary plist: %s object overlaps end of container.\n",
+ "date");
+ return NULL;
+ }
+
+ // FIXME: what to do if faced with other sizes for double?
+ assert (sizeof (double) == sizeof (uint64_t));
+
+ uint64_t date = read_sized_int(bplist, offset + 1, sizeof(double));
+ // Note that this handles byte swapping.
+ value = value_create();
+ value_set_date(value, *(double *)&date);
+ return value;
}
-uint64_t bplist_get_a_size(bplist_info_ptr bplist,
- uint64_t *offset_ptr, char *msg)
+uint64_t bplist_get_a_size(bplist_info_ptr bplist,
+ uint64_t *offset_ptr, char *msg)
{
- uint64_t size = bplist->data_bytes[*offset_ptr] & 0x0F;
- (*offset_ptr)++;
- if (size == 0x0F) {
- // 0x0F means separate int size follows.
- // Smaller values are used for short data.
- size_t extra; // the length of the data size we are about to read
- if ((bplist->data_bytes[*offset_ptr] & 0xF0) != kTAG_INT) {
- // Bad data, mistagged size int
- bplist_log("Bad binary plist: %s object size is not tagged as int.\n",
- msg);
- return UINT64_MAX; // error
- }
-
- // read integer data as size, extra tells how many bytes to skip
- if (!read_self_sized_int(bplist, *offset_ptr, &size, &extra)) {
- bplist_log("Bad binary plist: invalid %s object size tag.\n",
- "data");
- return UINT64_MAX; // error
- }
- (*offset_ptr) += extra;
- }
-
- if (*offset_ptr + size > bplist->length) {
- bplist_log("Bad binary plist: %s object overlaps end of container.\n",
- "data");
- return UINT64_MAX; // error
- }
- return size;
+ uint64_t size = bplist->data_bytes[*offset_ptr] & 0x0F;
+ (*offset_ptr)++;
+ if (size == 0x0F) {
+ // 0x0F means separate int size follows.
+ // Smaller values are used for short data.
+ size_t extra; // the length of the data size we are about to read
+ if ((bplist->data_bytes[*offset_ptr] & 0xF0) != kTAG_INT) {
+ // Bad data, mistagged size int
+ bplist_log("Bad binary plist: %s object size is not tagged as int.\n",
+ msg);
+ return UINT64_MAX; // error
+ }
+
+ // read integer data as size, extra tells how many bytes to skip
+ if (!read_self_sized_int(bplist, *offset_ptr, &size, &extra)) {
+ bplist_log("Bad binary plist: invalid %s object size tag.\n",
+ "data");
+ return UINT64_MAX; // error
+ }
+ (*offset_ptr) += extra;
+ }
+
+ if (*offset_ptr + size > bplist->length) {
+ bplist_log("Bad binary plist: %s object overlaps end of container.\n",
+ "data");
+ return UINT64_MAX; // error
+ }
+ return size;
}
static value_ptr extract_data(bplist_info_ptr bplist, uint64_t offset)
{
- uint64_t size;
- value_ptr value;
-
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
- if ((size = bplist_get_a_size(bplist, &offset, (char *)"data")) == UINT64_MAX)
- return NULL;
-
- value = value_create();
- // cast is ok because we only allow files up to 100MB:
- value_set_data(value, bplist->data_bytes + (size_t) offset, (size_t) size);
- return value;
+ uint64_t size;
+ value_ptr value;
+
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+ if ((size = bplist_get_a_size(bplist, &offset, (char *)"data")) == UINT64_MAX)
+ return NULL;
+
+ value = value_create();
+ // cast is ok because we only allow files up to 100MB:
+ value_set_data(value, bplist->data_bytes + (size_t) offset, (size_t) size);
+ return value;
}
static value_ptr extract_ascii_string(bplist_info_ptr bplist, uint64_t offset)
{
- uint64_t size;
- value_ptr value; // return value
-
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
- if ((size = bplist_get_a_size(bplist, &offset, (char *)"ascii string")) ==
- UINT64_MAX)
- return NULL;
-
- value = value_create();
- // cast is ok because we only allow 100MB files
- value_set_ascii_string(value, bplist->data_bytes + (size_t) offset,
- (size_t) size);
- return value;
+ uint64_t size;
+ value_ptr value; // return value
+
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+ if ((size = bplist_get_a_size(bplist, &offset, (char *)"ascii string")) ==
+ UINT64_MAX)
+ return NULL;
+
+ value = value_create();
+ // cast is ok because we only allow 100MB files
+ value_set_ascii_string(value, bplist->data_bytes + (size_t) offset,
+ (size_t) size);
+ return value;
}
static value_ptr extract_unicode_string(bplist_info_ptr bplist, uint64_t offset)
{
- uint64_t size;
- value_ptr value;
-
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
- if ((size = bplist_get_a_size(bplist, &offset, (char *)"unicode string")) ==
- UINT64_MAX)
- return NULL;
-
- value = value_create();
- // cast is ok because we only allow 100MB files
- value_set_unicode_string(value, bplist->data_bytes + (size_t) offset,
- (size_t) size);
- return value;
+ uint64_t size;
+ value_ptr value;
+
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+ if ((size = bplist_get_a_size(bplist, &offset, (char *)"unicode string")) ==
+ UINT64_MAX)
+ return NULL;
+
+ value = value_create();
+ // cast is ok because we only allow 100MB files
+ value_set_unicode_string(value, bplist->data_bytes + (size_t) offset,
+ (size_t) size);
+ return value;
}
static value_ptr extract_uid(bplist_info_ptr bplist, uint64_t offset)
{
- /* UIDs are used by Cocoa's key-value coder.
- When writing other plist formats, they are expanded to dictionaries of
- the form <dict><key>CF$UID</key><integer>value</integer></dict>, so we
- do the same here on reading. This results in plists identical to what
- running plutil -convert xml1 gives us. However, this is not the same
- result as [Core]Foundation's plist parser, which extracts them as un-
- introspectable CF objects. In fact, it even seems to convert the CF$UID
- dictionaries from XML plists on the fly.
- */
-
- value_ptr value;
- uint64_t uid;
-
- if (!read_self_sized_int(bplist, offset, &uid, NULL)) {
- bplist_log("Bad binary plist: invalid UID object.\n");
- return NULL;
- }
-
- // assert(NO); // original code suggests using a string for a key
- // but our dictionaries all use big ints for keys, so I don't know
- // what to do here
-
- // In practice, I believe this code is never executed by PortMidi.
- // I changed it to do something and not raise compiler warnings, but
- // not sure what the code should do.
-
- value = value_create();
- value_set_uid(value, uid);
- // return [NSDictionary dictionaryWithObject:
- // [NSNumber numberWithUnsignedLongLong:value]
- // forKey:"CF$UID"];
- return value;
+ /* UIDs are used by Cocoa's key-value coder.
+ When writing other plist formats, they are expanded to dictionaries of
+ the form <dict><key>CF$UID</key><integer>value</integer></dict>, so we
+ do the same here on reading. This results in plists identical to what
+ running plutil -convert xml1 gives us. However, this is not the same
+ result as [Core]Foundation's plist parser, which extracts them as un-
+ introspectable CF objects. In fact, it even seems to convert the CF$UID
+ dictionaries from XML plists on the fly.
+ */
+
+ value_ptr value;
+ uint64_t uid;
+
+ if (!read_self_sized_int(bplist, offset, &uid, NULL)) {
+ bplist_log("Bad binary plist: invalid UID object.\n");
+ return NULL;
+ }
+
+ // assert(NO); // original code suggests using a string for a key
+ // but our dictionaries all use big ints for keys, so I don't know
+ // what to do here
+
+ // In practice, I believe this code is never executed by PortMidi.
+ // I changed it to do something and not raise compiler warnings, but
+ // not sure what the code should do.
+
+ value = value_create();
+ value_set_uid(value, uid);
+ // return [NSDictionary dictionaryWithObject:
+ // [NSNumber numberWithUnsignedLongLong:value]
+ // forKey:"CF$UID"];
+ return value;
}
static value_ptr extract_array(bplist_info_ptr bplist, uint64_t offset)
{
- uint64_t i, count;
- uint64_t size;
- uint64_t elementID;
- value_ptr element = NULL;
- value_ptr *array = NULL;
- value_ptr value = NULL;
- BOOL ok = YES;
-
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
- if ((count = bplist_get_a_size(bplist, &offset, (char *)"array")) == UINT64_MAX)
- return NULL;
-
- if (count > UINT64_MAX / bplist->object_ref_size - offset) {
- // Offset overflow.
- bplist_log("Bad binary plist: %s object overlaps end of container.\n",
- "array");
- return NULL;
- }
-
- size = bplist->object_ref_size * count;
- if (size + offset > bplist->length) {
- bplist_log("Bad binary plist: %s object overlaps end of container.\n",
- "array");
- return NULL;
- }
-
- // got count, the number of array elements
-
- value = value_create();
- assert(value);
-
- if (count == 0) {
- // count must be size_t or smaller because max file size is 100MB
- value_set_array(value, array, (size_t) count);
- return value;
- }
-
- array = allocate(sizeof(value_ptr) * (size_t) count);
-
- for (i = 0; i != count; ++i) {
- bplist_log_verbose("[%u]\n", i);
- elementID = read_sized_int(bplist, offset + i * bplist->object_ref_size,
- bplist->object_ref_size);
- element = extract_object(bplist, elementID);
- if (element != NULL) {
- array[i] = element;
- } else {
- ok = NO;
- break;
- }
- }
- if (ok) { // count is smaller than size_t max because of 100MB file limit
- value_set_array(value, array, (size_t) count);
- }
-
- return value;
+ uint64_t i, count;
+ uint64_t size;
+ uint64_t elementID;
+ value_ptr element = NULL;
+ value_ptr *array = NULL;
+ value_ptr value = NULL;
+ BOOL ok = YES;
+
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+ if ((count = bplist_get_a_size(bplist, &offset, (char *)"array")) == UINT64_MAX)
+ return NULL;
+
+ if (count > UINT64_MAX / bplist->object_ref_size - offset) {
+ // Offset overflow.
+ bplist_log("Bad binary plist: %s object overlaps end of container.\n",
+ "array");
+ return NULL;
+ }
+
+ size = bplist->object_ref_size * count;
+ if (size + offset > bplist->length) {
+ bplist_log("Bad binary plist: %s object overlaps end of container.\n",
+ "array");
+ return NULL;
+ }
+
+ // got count, the number of array elements
+
+ value = value_create();
+ assert(value);
+
+ if (count == 0) {
+ // count must be size_t or smaller because max file size is 100MB
+ value_set_array(value, array, (size_t) count);
+ return value;
+ }
+
+ array = allocate(sizeof(value_ptr) * (size_t) count);
+
+ for (i = 0; i != count; ++i) {
+ bplist_log_verbose("[%u]\n", i);
+ elementID = read_sized_int(bplist, offset + i * bplist->object_ref_size,
+ bplist->object_ref_size);
+ element = extract_object(bplist, elementID);
+ if (element != NULL) {
+ array[i] = element;
+ } else {
+ ok = NO;
+ break;
+ }
+ }
+ if (ok) { // count is smaller than size_t max because of 100MB file limit
+ value_set_array(value, array, (size_t) count);
+ }
+
+ return value;
}
static value_ptr extract_dictionary(bplist_info_ptr bplist, uint64_t offset)
{
- uint64_t i, count;
- uint64_t size;
- uint64_t elementID;
- value_ptr value = NULL;
- dict_ptr dict = NULL;
- BOOL ok = YES;
-
- assert(bplist->data_bytes != NULL && offset < bplist->length);
-
-
- if ((count = bplist_get_a_size(bplist, &offset, (char *)"array")) == UINT64_MAX)
- return NULL;
-
- if (count > UINT64_MAX / (bplist->object_ref_size * 2) - offset) {
- // Offset overflow.
- bplist_log("Bad binary plist: %s object overlaps end of container.\n",
- "dictionary");
- return NULL;
- }
-
- size = bplist->object_ref_size * count * 2;
- if (size + offset > bplist->length) {
- bplist_log("Bad binary plist: %s object overlaps end of container.\n",
- "dictionary");
- return NULL;
- }
-
- value = value_create();
- if (count == 0) {
- value_set_dict(value, NULL);
- return value;
- }
-
- for (i = 0; i != count; ++i) {
- value_ptr key;
- value_ptr val;
- elementID = read_sized_int(bplist, offset + i * bplist->object_ref_size,
- bplist->object_ref_size);
- key = extract_object(bplist, elementID);
- if (key != NULL) {
- bplist_log_verbose("key: %p\n", key);
- } else {
- ok = NO;
- break;
- }
-
- elementID = read_sized_int(bplist,
- offset + (i + count) * bplist->object_ref_size,
- bplist->object_ref_size);
- val = extract_object(bplist, elementID);
- if (val != NULL) {
- dict_insert(&dict, key, val);
- } else {
- ok = NO;
- break;
- }
- }
- if (ok) {
- value_set_dict(value, dict);
- }
-
- return value;
+ uint64_t i, count;
+ uint64_t size;
+ uint64_t elementID;
+ value_ptr value = NULL;
+ dict_ptr dict = NULL;
+ BOOL ok = YES;
+
+ assert(bplist->data_bytes != NULL && offset < bplist->length);
+
+
+ if ((count = bplist_get_a_size(bplist, &offset, (char *)"array")) == UINT64_MAX)
+ return NULL;
+
+ if (count > UINT64_MAX / (bplist->object_ref_size * 2) - offset) {
+ // Offset overflow.
+ bplist_log("Bad binary plist: %s object overlaps end of container.\n",
+ "dictionary");
+ return NULL;
+ }
+
+ size = bplist->object_ref_size * count * 2;
+ if (size + offset > bplist->length) {
+ bplist_log("Bad binary plist: %s object overlaps end of container.\n",
+ "dictionary");
+ return NULL;
+ }
+
+ value = value_create();
+ if (count == 0) {
+ value_set_dict(value, NULL);
+ return value;
+ }
+
+ for (i = 0; i != count; ++i) {
+ value_ptr key;
+ value_ptr val;
+ elementID = read_sized_int(bplist, offset + i * bplist->object_ref_size,
+ bplist->object_ref_size);
+ key = extract_object(bplist, elementID);
+ if (key != NULL) {
+ bplist_log_verbose("key: %p\n", key);
+ } else {
+ ok = NO;
+ break;
+ }
+
+ elementID = read_sized_int(bplist,
+ offset + (i + count) * bplist->object_ref_size,
+ bplist->object_ref_size);
+ val = extract_object(bplist, elementID);
+ if (val != NULL) {
+ dict_insert(&dict, key, val);
+ } else {
+ ok = NO;
+ break;
+ }
+ }
+ if (ok) {
+ value_set_dict(value, dict);
+ }
+
+ return value;
}
/*************** functions for accessing values ****************/
@@ -1010,122 +1010,120 @@ static value_ptr extract_dictionary(bplist_info_ptr bplist, uint64_t offset)
char *value_get_asciistring(value_ptr v)
{
- if (v->tag != kTAG_ASCIISTRING) return NULL;
- return v->string;
+ if (v->tag != kTAG_ASCIISTRING) return NULL;
+ return v->string;
}
value_ptr value_dict_lookup_using_string(value_ptr v, char *key)
{
- dict_ptr dict;
- if (v->tag != kTAG_DICTIONARY) return NULL; // not a dictionary
- dict = v->dict;
- /* search for key */
- while (dict) {
- if (dict->key && dict->key->tag == kTAG_ASCIISTRING &&
- strcmp(key, dict->key->string) == 0) { // found it
- return dict->value;
- }
- dict = dict->next;
- }
- return NULL; /* not found */
+ dict_ptr dict;
+ if (v->tag != kTAG_DICTIONARY) return NULL; // not a dictionary
+ dict = v->dict;
+ /* search for key */
+ while (dict) {
+ if (dict->key && dict->key->tag == kTAG_ASCIISTRING &&
+ strcmp(key, dict->key->string) == 0) { // found it
+ return dict->value;
+ }
+ dict = dict->next;
+ }
+ return NULL; /* not found */
}
value_ptr value_dict_lookup_using_path(value_ptr v, char *path)
{
- char key[MAX_KEY_SIZE];
- while (*path) { /* more to the path */
- int i = 0;
- while (i < MAX_KEY_SIZE - 1) {
- key[i] = *path++;
- if (key[i] == '/') { /* end of entry in path */
- key[i + 1] = 0;
- break;
- }
- if (!key[i]) {
- path--; /* back up to end of string char */
- break; /* this will cause outer loop to exit */
- }
- i++;
- }
- if (!v || v->tag != kTAG_DICTIONARY) return NULL;
- /* now, look up the key to get next value */
- v = value_dict_lookup_using_string(v, key);
- if (v == NULL) return NULL;
- }
- return v;
+ char key[MAX_KEY_SIZE];
+ while (*path) { /* more to the path */
+ int i = 0;
+ while (i < MAX_KEY_SIZE - 1) {
+ key[i] = *path++;
+ if (key[i] == '/') { /* end of entry in path */
+ key[i + 1] = 0;
+ break;
+ }
+ if (!key[i]) {
+ path--; /* back up to end of string char */
+ break; /* this will cause outer loop to exit */
+ }
+ i++;
+ }
+ if (!v || v->tag != kTAG_DICTIONARY) return NULL;
+ /* now, look up the key to get next value */
+ v = value_dict_lookup_using_string(v, key);
+ if (v == NULL) return NULL;
+ }
+ return v;
}
-
+
/*************** functions for debugging ***************/
void plist_print(value_ptr v)
{
- size_t i;
- int comma_needed;
- dict_ptr dict;
- if (!v) {
- printf("NULL");
- return;
- }
- switch (v->tag & 0xF0) {
- case kTAG_SIMPLE:
- switch (v->tag) {
- case kVALUE_NULL:
- printf("NULL@%p", v); break;
- case kVALUE_FALSE:
- printf("FALSE@%p", v); break;
- case kVALUE_TRUE:
- printf("TRUE@%p", v); break;
- default:
- printf("UNKNOWN tag=%x@%p", v->tag, v); break;
- }
- break;
- case kTAG_INT:
- printf("%lld@%p", v->integer, v); break;
- case kTAG_REAL:
- printf("%g@%p", v->real, v); break;
- case kTAG_DATE:
- printf("date:%g@%p", v->real, v); break;
- case kTAG_DATA:
- printf("data@%p->%p:[%p:", v, v->data, v->data->data);
- for (i = 0; i < v->data->len; i++) {
- printf(" %2x", v->data->data[i]);
- }
- printf("]"); break;
- case kTAG_ASCIISTRING:
- printf("%p:\"%s\"@%p", v->string, v->string, v); break;
- case kTAG_UNICODESTRING:
- printf("unicode:%p:\"%s\"@%p", v->string, v->string, v); break;
- case kTAG_UID:
- printf("UID:%llu@%p", v->uinteger, v); break;
- case kTAG_ARRAY:
- comma_needed = FALSE;
- printf("%p->%p:[%p:", v, v->array, v->array->array);
- for (i = 0; i < v->array->length; i++) {
- if (comma_needed) printf(", ");
- plist_print(v->array->array[i]);
- comma_needed = TRUE;
- }
- printf("]"); break;
- case kTAG_DICTIONARY:
- comma_needed = FALSE;
- printf("%p:[", v);
- dict = v->dict;
- while (dict) {
- if (comma_needed) printf(", ");
- printf("%p:", dict);
- plist_print(dict->key);
- printf("->");
- plist_print(dict->value);
- comma_needed = TRUE;
- dict = dict->next;
- }
- printf("]"); break;
- default:
- printf("UNKNOWN tag=%x", v->tag);
- break;
- }
+ size_t i;
+ int comma_needed;
+ dict_ptr dict;
+ if (!v) {
+ printf("NULL");
+ return;
+ }
+ switch (v->tag & 0xF0) {
+ case kTAG_SIMPLE:
+ switch (v->tag) {
+ case kVALUE_NULL:
+ printf("NULL@%p", v); break;
+ case kVALUE_FALSE:
+ printf("FALSE@%p", v); break;
+ case kVALUE_TRUE:
+ printf("TRUE@%p", v); break;
+ default:
+ printf("UNKNOWN tag=%x@%p", v->tag, v); break;
+ }
+ break;
+ case kTAG_INT:
+ printf("%lld@%p", v->integer, v); break;
+ case kTAG_REAL:
+ printf("%g@%p", v->real, v); break;
+ case kTAG_DATE:
+ printf("date:%g@%p", v->real, v); break;
+ case kTAG_DATA:
+ printf("data@%p->%p:[%p:", v, v->data, v->data->data);
+ for (i = 0; i < v->data->len; i++) {
+ printf(" %2x", v->data->data[i]);
+ }
+ printf("]"); break;
+ case kTAG_ASCIISTRING:
+ printf("%p:\"%s\"@%p", v->string, v->string, v); break;
+ case kTAG_UNICODESTRING:
+ printf("unicode:%p:\"%s\"@%p", v->string, v->string, v); break;
+ case kTAG_UID:
+ printf("UID:%llu@%p", v->uinteger, v); break;
+ case kTAG_ARRAY:
+ comma_needed = FALSE;
+ printf("%p->%p:[%p:", v, v->array, v->array->array);
+ for (i = 0; i < v->array->length; i++) {
+ if (comma_needed) printf(", ");
+ plist_print(v->array->array[i]);
+ comma_needed = TRUE;
+ }
+ printf("]"); break;
+ case kTAG_DICTIONARY:
+ comma_needed = FALSE;
+ printf("%p:[", v);
+ dict = v->dict;
+ while (dict) {
+ if (comma_needed) printf(", ");
+ printf("%p:", dict);
+ plist_print(dict->key);
+ printf("->");
+ plist_print(dict->value);
+ comma_needed = TRUE;
+ dict = dict->next;
+ }
+ printf("]"); break;
+ default:
+ printf("UNKNOWN tag=%x", v->tag);
+ break;
+ }
}
-
-
diff --git a/src/lib/portmidi/readbinaryplist.h b/src/lib/portmidi/readbinaryplist.h
index e82056a0b79..6fdb5fc935f 100644
--- a/src/lib/portmidi/readbinaryplist.h
+++ b/src/lib/portmidi/readbinaryplist.h
@@ -6,68 +6,68 @@
#include <stdint.h> /* for uint8_t ... */
#ifndef TRUE
- #define TRUE 1
- #define FALSE 0
+ #define TRUE 1
+ #define FALSE 0
#endif
#define MAX_KEY_SIZE 256
enum
{
- // Object tags (high nybble)
- kTAG_SIMPLE = 0x00, // Null, true, false, filler, or invalid
- kTAG_INT = 0x10,
- kTAG_REAL = 0x20,
- kTAG_DATE = 0x30,
- kTAG_DATA = 0x40,
- kTAG_ASCIISTRING = 0x50,
- kTAG_UNICODESTRING = 0x60,
- kTAG_UID = 0x80,
- kTAG_ARRAY = 0xA0,
- kTAG_DICTIONARY = 0xD0,
-
- // "simple" object values
- kVALUE_NULL = 0x00,
- kVALUE_FALSE = 0x08,
- kVALUE_TRUE = 0x09,
- kVALUE_FILLER = 0x0F,
-
- kVALUE_FULLDATETAG = 0x33 // Dates are tagged with a whole byte.
+ // Object tags (high nybble)
+ kTAG_SIMPLE = 0x00, // Null, true, false, filler, or invalid
+ kTAG_INT = 0x10,
+ kTAG_REAL = 0x20,
+ kTAG_DATE = 0x30,
+ kTAG_DATA = 0x40,
+ kTAG_ASCIISTRING = 0x50,
+ kTAG_UNICODESTRING = 0x60,
+ kTAG_UID = 0x80,
+ kTAG_ARRAY = 0xA0,
+ kTAG_DICTIONARY = 0xD0,
+
+ // "simple" object values
+ kVALUE_NULL = 0x00,
+ kVALUE_FALSE = 0x08,
+ kVALUE_TRUE = 0x09,
+ kVALUE_FILLER = 0x0F,
+
+ kVALUE_FULLDATETAG = 0x33 // Dates are tagged with a whole byte.
};
typedef struct pldata_struct {
- uint8_t *data;
- size_t len;
+ uint8_t *data;
+ size_t len;
} pldata_node, *pldata_ptr;
typedef struct array_struct {
- struct value_struct **array;
- uint64_t length;
+ struct value_struct **array;
+ uint64_t length;
} array_node, *array_ptr;
// a dict_node is a list of <key, value> pairs
typedef struct dict_struct {
- struct value_struct *key;
- struct value_struct *value;
- struct dict_struct *next;
+ struct value_struct *key;
+ struct value_struct *value;
+ struct dict_struct *next;
} dict_node, *dict_ptr;
// an value_node is a value with a tag telling the type
typedef struct value_struct {
- int tag;
- union {
- int64_t integer;
- uint64_t uinteger;
- double real;
- char *string;
- pldata_ptr data;
- array_ptr array;
- struct dict_struct *dict;
- };
+ int tag;
+ union {
+ int64_t integer;
+ uint64_t uinteger;
+ double real;
+ char *string;
+ pldata_ptr data;
+ array_ptr array;
+ struct dict_struct *dict;
+ };
} value_node, *value_ptr;
@@ -85,4 +85,3 @@ value_ptr value_dict_lookup_using_path(value_ptr v, char *path);
/*************** functions for debugging ***************/
void plist_print(value_ptr v);
-
diff --git a/src/lib/softfloat/fsincos.c b/src/lib/softfloat/fsincos.c
index fb148cc8fbe..84c67c47270 100755
--- a/src/lib/softfloat/fsincos.c
+++ b/src/lib/softfloat/fsincos.c
@@ -47,7 +47,7 @@ static const floatx80 floatx80_default_nan = packFloatx80(0, 0xffff, U64(0xfffff
INLINE bits64 extractFloatx80Frac( floatx80 a )
{
- return a.low;
+ return a.low;
}
@@ -59,7 +59,7 @@ INLINE bits64 extractFloatx80Frac( floatx80 a )
INLINE int32 extractFloatx80Exp( floatx80 a )
{
- return a.high & 0x7FFF;
+ return a.high & 0x7FFF;
}
@@ -71,7 +71,7 @@ INLINE int32 extractFloatx80Exp( floatx80 a )
INLINE flag extractFloatx80Sign( floatx80 a )
{
- return a.high>>15;
+ return a.high>>15;
}
@@ -83,12 +83,12 @@ INLINE flag extractFloatx80Sign( floatx80 a )
INLINE floatx80 propagateFloatx80NaNOneArg(floatx80 a)
{
- if (floatx80_is_signaling_nan(a))
- float_raise(float_flag_invalid);
+ if (floatx80_is_signaling_nan(a))
+ float_raise(float_flag_invalid);
- a.low |= U64(0xC000000000000000);
+ a.low |= U64(0xC000000000000000);
- return a;
+ return a;
}
/*----------------------------------------------------------------------------
@@ -100,62 +100,62 @@ INLINE floatx80 propagateFloatx80NaNOneArg(floatx80 a)
void normalizeFloatx80Subnormal(UINT64 aSig, INT32 *zExpPtr, UINT64 *zSigPtr)
{
- int shiftCount = countLeadingZeros64(aSig);
- *zSigPtr = aSig<<shiftCount;
- *zExpPtr = 1 - shiftCount;
+ int shiftCount = countLeadingZeros64(aSig);
+ *zSigPtr = aSig<<shiftCount;
+ *zExpPtr = 1 - shiftCount;
}
/* reduce trigonometric function argument using 128-bit precision
M_PI approximation */
static UINT64 argument_reduction_kernel(UINT64 aSig0, int Exp, UINT64 *zSig0, UINT64 *zSig1)
{
- UINT64 term0, term1, term2;
- UINT64 aSig1 = 0;
-
- shortShift128Left(aSig1, aSig0, Exp, &aSig1, &aSig0);
- UINT64 q = estimateDiv128To64(aSig1, aSig0, FLOAT_PI_HI);
- mul128By64To192(FLOAT_PI_HI, FLOAT_PI_LO, q, &term0, &term1, &term2);
- sub128(aSig1, aSig0, term0, term1, zSig1, zSig0);
- while ((INT64)(*zSig1) < 0) {
- --q;
- add192(*zSig1, *zSig0, term2, 0, FLOAT_PI_HI, FLOAT_PI_LO, zSig1, zSig0, &term2);
- }
- *zSig1 = term2;
- return q;
+ UINT64 term0, term1, term2;
+ UINT64 aSig1 = 0;
+
+ shortShift128Left(aSig1, aSig0, Exp, &aSig1, &aSig0);
+ UINT64 q = estimateDiv128To64(aSig1, aSig0, FLOAT_PI_HI);
+ mul128By64To192(FLOAT_PI_HI, FLOAT_PI_LO, q, &term0, &term1, &term2);
+ sub128(aSig1, aSig0, term0, term1, zSig1, zSig0);
+ while ((INT64)(*zSig1) < 0) {
+ --q;
+ add192(*zSig1, *zSig0, term2, 0, FLOAT_PI_HI, FLOAT_PI_LO, zSig1, zSig0, &term2);
+ }
+ *zSig1 = term2;
+ return q;
}
static int reduce_trig_arg(int expDiff, int &zSign, UINT64 &aSig0, UINT64 &aSig1)
{
- UINT64 term0, term1, q = 0;
-
- if (expDiff < 0) {
- shift128Right(aSig0, 0, 1, &aSig0, &aSig1);
- expDiff = 0;
- }
- if (expDiff > 0) {
- q = argument_reduction_kernel(aSig0, expDiff, &aSig0, &aSig1);
- }
- else {
- if (FLOAT_PI_HI <= aSig0) {
- aSig0 -= FLOAT_PI_HI;
- q = 1;
- }
- }
-
- shift128Right(FLOAT_PI_HI, FLOAT_PI_LO, 1, &term0, &term1);
- if (! lt128(aSig0, aSig1, term0, term1))
- {
- int lt = lt128(term0, term1, aSig0, aSig1);
- int eq = eq128(aSig0, aSig1, term0, term1);
-
- if ((eq && (q & 1)) || lt) {
- zSign = !zSign;
- ++q;
- }
- if (lt) sub128(FLOAT_PI_HI, FLOAT_PI_LO, aSig0, aSig1, &aSig0, &aSig1);
- }
-
- return (int)(q & 3);
+ UINT64 term0, term1, q = 0;
+
+ if (expDiff < 0) {
+ shift128Right(aSig0, 0, 1, &aSig0, &aSig1);
+ expDiff = 0;
+ }
+ if (expDiff > 0) {
+ q = argument_reduction_kernel(aSig0, expDiff, &aSig0, &aSig1);
+ }
+ else {
+ if (FLOAT_PI_HI <= aSig0) {
+ aSig0 -= FLOAT_PI_HI;
+ q = 1;
+ }
+ }
+
+ shift128Right(FLOAT_PI_HI, FLOAT_PI_LO, 1, &term0, &term1);
+ if (! lt128(aSig0, aSig1, term0, term1))
+ {
+ int lt = lt128(term0, term1, aSig0, aSig1);
+ int eq = eq128(aSig0, aSig1, term0, term1);
+
+ if ((eq && (q & 1)) || lt) {
+ zSign = !zSign;
+ ++q;
+ }
+ if (lt) sub128(FLOAT_PI_HI, FLOAT_PI_LO, aSig0, aSig1, &aSig0, &aSig1);
+ }
+
+ return (int)(q & 3);
}
#define SIN_ARR_SIZE 11
@@ -163,32 +163,32 @@ static int reduce_trig_arg(int expDiff, int &zSign, UINT64 &aSig0, UINT64 &aSig1
static float128 sin_arr[SIN_ARR_SIZE] =
{
- PACK_FLOAT_128(0x3fff000000000000, 0x0000000000000000), /* 1 */
- PACK_FLOAT_128(0xbffc555555555555, 0x5555555555555555), /* 3 */
- PACK_FLOAT_128(0x3ff8111111111111, 0x1111111111111111), /* 5 */
- PACK_FLOAT_128(0xbff2a01a01a01a01, 0xa01a01a01a01a01a), /* 7 */
- PACK_FLOAT_128(0x3fec71de3a556c73, 0x38faac1c88e50017), /* 9 */
- PACK_FLOAT_128(0xbfe5ae64567f544e, 0x38fe747e4b837dc7), /* 11 */
- PACK_FLOAT_128(0x3fde6124613a86d0, 0x97ca38331d23af68), /* 13 */
- PACK_FLOAT_128(0xbfd6ae7f3e733b81, 0xf11d8656b0ee8cb0), /* 15 */
- PACK_FLOAT_128(0x3fce952c77030ad4, 0xa6b2605197771b00), /* 17 */
- PACK_FLOAT_128(0xbfc62f49b4681415, 0x724ca1ec3b7b9675), /* 19 */
- PACK_FLOAT_128(0x3fbd71b8ef6dcf57, 0x18bef146fcee6e45) /* 21 */
+ PACK_FLOAT_128(0x3fff000000000000, 0x0000000000000000), /* 1 */
+ PACK_FLOAT_128(0xbffc555555555555, 0x5555555555555555), /* 3 */
+ PACK_FLOAT_128(0x3ff8111111111111, 0x1111111111111111), /* 5 */
+ PACK_FLOAT_128(0xbff2a01a01a01a01, 0xa01a01a01a01a01a), /* 7 */
+ PACK_FLOAT_128(0x3fec71de3a556c73, 0x38faac1c88e50017), /* 9 */
+ PACK_FLOAT_128(0xbfe5ae64567f544e, 0x38fe747e4b837dc7), /* 11 */
+ PACK_FLOAT_128(0x3fde6124613a86d0, 0x97ca38331d23af68), /* 13 */
+ PACK_FLOAT_128(0xbfd6ae7f3e733b81, 0xf11d8656b0ee8cb0), /* 15 */
+ PACK_FLOAT_128(0x3fce952c77030ad4, 0xa6b2605197771b00), /* 17 */
+ PACK_FLOAT_128(0xbfc62f49b4681415, 0x724ca1ec3b7b9675), /* 19 */
+ PACK_FLOAT_128(0x3fbd71b8ef6dcf57, 0x18bef146fcee6e45) /* 21 */
};
static float128 cos_arr[COS_ARR_SIZE] =
{
- PACK_FLOAT_128(0x3fff000000000000, 0x0000000000000000), /* 0 */
- PACK_FLOAT_128(0xbffe000000000000, 0x0000000000000000), /* 2 */
- PACK_FLOAT_128(0x3ffa555555555555, 0x5555555555555555), /* 4 */
- PACK_FLOAT_128(0xbff56c16c16c16c1, 0x6c16c16c16c16c17), /* 6 */
- PACK_FLOAT_128(0x3fefa01a01a01a01, 0xa01a01a01a01a01a), /* 8 */
- PACK_FLOAT_128(0xbfe927e4fb7789f5, 0xc72ef016d3ea6679), /* 10 */
- PACK_FLOAT_128(0x3fe21eed8eff8d89, 0x7b544da987acfe85), /* 12 */
- PACK_FLOAT_128(0xbfda93974a8c07c9, 0xd20badf145dfa3e5), /* 14 */
- PACK_FLOAT_128(0x3fd2ae7f3e733b81, 0xf11d8656b0ee8cb0), /* 16 */
- PACK_FLOAT_128(0xbfca6827863b97d9, 0x77bb004886a2c2ab), /* 18 */
- PACK_FLOAT_128(0x3fc1e542ba402022, 0x507a9cad2bf8f0bb) /* 20 */
+ PACK_FLOAT_128(0x3fff000000000000, 0x0000000000000000), /* 0 */
+ PACK_FLOAT_128(0xbffe000000000000, 0x0000000000000000), /* 2 */
+ PACK_FLOAT_128(0x3ffa555555555555, 0x5555555555555555), /* 4 */
+ PACK_FLOAT_128(0xbff56c16c16c16c1, 0x6c16c16c16c16c17), /* 6 */
+ PACK_FLOAT_128(0x3fefa01a01a01a01, 0xa01a01a01a01a01a), /* 8 */
+ PACK_FLOAT_128(0xbfe927e4fb7789f5, 0xc72ef016d3ea6679), /* 10 */
+ PACK_FLOAT_128(0x3fe21eed8eff8d89, 0x7b544da987acfe85), /* 12 */
+ PACK_FLOAT_128(0xbfda93974a8c07c9, 0xd20badf145dfa3e5), /* 14 */
+ PACK_FLOAT_128(0x3fd2ae7f3e733b81, 0xf11d8656b0ee8cb0), /* 16 */
+ PACK_FLOAT_128(0xbfca6827863b97d9, 0x77bb004886a2c2ab), /* 18 */
+ PACK_FLOAT_128(0x3fc1e542ba402022, 0x507a9cad2bf8f0bb) /* 20 */
};
extern float128 OddPoly (float128 x, float128 *arr, unsigned n);
@@ -196,27 +196,27 @@ extern float128 OddPoly (float128 x, float128 *arr, unsigned n);
/* 0 <= x <= pi/4 */
INLINE float128 poly_sin(float128 x)
{
- // 3 5 7 9 11 13 15
- // x x x x x x x
- // sin (x) ~ x - --- + --- - --- + --- - ---- + ---- - ---- =
- // 3! 5! 7! 9! 11! 13! 15!
- //
- // 2 4 6 8 10 12 14
- // x x x x x x x
- // = x * [ 1 - --- + --- - --- + --- - ---- + ---- - ---- ] =
- // 3! 5! 7! 9! 11! 13! 15!
- //
- // 3 3
- // -- 4k -- 4k+2
- // p(x) = > C * x > 0 q(x) = > C * x < 0
- // -- 2k -- 2k+1
- // k=0 k=0
- //
- // 2
- // sin(x) ~ x * [ p(x) + x * q(x) ]
- //
-
- return OddPoly(x, sin_arr, SIN_ARR_SIZE);
+ // 3 5 7 9 11 13 15
+ // x x x x x x x
+ // sin (x) ~ x - --- + --- - --- + --- - ---- + ---- - ---- =
+ // 3! 5! 7! 9! 11! 13! 15!
+ //
+ // 2 4 6 8 10 12 14
+ // x x x x x x x
+ // = x * [ 1 - --- + --- - --- + --- - ---- + ---- - ---- ] =
+ // 3! 5! 7! 9! 11! 13! 15!
+ //
+ // 3 3
+ // -- 4k -- 4k+2
+ // p(x) = > C * x > 0 q(x) = > C * x < 0
+ // -- 2k -- 2k+1
+ // k=0 k=0
+ //
+ // 2
+ // sin(x) ~ x * [ p(x) + x * q(x) ]
+ //
+
+ return OddPoly(x, sin_arr, SIN_ARR_SIZE);
}
extern float128 EvenPoly(float128 x, float128 *arr, unsigned n);
@@ -224,53 +224,53 @@ extern float128 EvenPoly(float128 x, float128 *arr, unsigned n);
/* 0 <= x <= pi/4 */
INLINE float128 poly_cos(float128 x)
{
- // 2 4 6 8 10 12 14
- // x x x x x x x
- // cos (x) ~ 1 - --- + --- - --- + --- - ---- + ---- - ----
- // 2! 4! 6! 8! 10! 12! 14!
- //
- // 3 3
- // -- 4k -- 4k+2
- // p(x) = > C * x > 0 q(x) = > C * x < 0
- // -- 2k -- 2k+1
- // k=0 k=0
- //
- // 2
- // cos(x) ~ [ p(x) + x * q(x) ]
- //
-
- return EvenPoly(x, cos_arr, COS_ARR_SIZE);
+ // 2 4 6 8 10 12 14
+ // x x x x x x x
+ // cos (x) ~ 1 - --- + --- - --- + --- - ---- + ---- - ----
+ // 2! 4! 6! 8! 10! 12! 14!
+ //
+ // 3 3
+ // -- 4k -- 4k+2
+ // p(x) = > C * x > 0 q(x) = > C * x < 0
+ // -- 2k -- 2k+1
+ // k=0 k=0
+ //
+ // 2
+ // cos(x) ~ [ p(x) + x * q(x) ]
+ //
+
+ return EvenPoly(x, cos_arr, COS_ARR_SIZE);
}
INLINE void sincos_invalid(floatx80 *sin_a, floatx80 *cos_a, floatx80 a)
{
- if (sin_a) *sin_a = a;
- if (cos_a) *cos_a = a;
+ if (sin_a) *sin_a = a;
+ if (cos_a) *cos_a = a;
}
INLINE void sincos_tiny_argument(floatx80 *sin_a, floatx80 *cos_a, floatx80 a)
{
- if (sin_a) *sin_a = a;
- if (cos_a) *cos_a = floatx80_one;
+ if (sin_a) *sin_a = a;
+ if (cos_a) *cos_a = floatx80_one;
}
static floatx80 sincos_approximation(int neg, float128 r, UINT64 quotient)
{
- if (quotient & 0x1) {
- r = poly_cos(r);
- neg = 0;
- } else {
- r = poly_sin(r);
- }
+ if (quotient & 0x1) {
+ r = poly_cos(r);
+ neg = 0;
+ } else {
+ r = poly_sin(r);
+ }
- floatx80 result = float128_to_floatx80(r);
- if (quotient & 0x2)
- neg = ! neg;
+ floatx80 result = float128_to_floatx80(r);
+ if (quotient & 0x2)
+ neg = ! neg;
- if (neg)
- result = floatx80_chs(result);
+ if (neg)
+ result = floatx80_chs(result);
- return result;
+ return result;
}
// =================================================
@@ -295,92 +295,92 @@ static floatx80 sincos_approximation(int neg, float128 r, UINT64 quotient)
int sf_fsincos(floatx80 a, floatx80 *sin_a, floatx80 *cos_a)
{
- UINT64 aSig0, aSig1 = 0;
- INT32 aExp, zExp, expDiff;
- int aSign, zSign;
- int q = 0;
-
- aSig0 = extractFloatx80Frac(a);
- aExp = extractFloatx80Exp(a);
- aSign = extractFloatx80Sign(a);
-
- /* invalid argument */
- if (aExp == 0x7FFF) {
- if ((UINT64) (aSig0<<1)) {
- sincos_invalid(sin_a, cos_a, propagateFloatx80NaNOneArg(a));
- return 0;
- }
-
- float_raise(float_flag_invalid);
- sincos_invalid(sin_a, cos_a, floatx80_default_nan);
- return 0;
- }
-
- if (aExp == 0) {
- if (aSig0 == 0) {
- sincos_tiny_argument(sin_a, cos_a, a);
- return 0;
- }
+ UINT64 aSig0, aSig1 = 0;
+ INT32 aExp, zExp, expDiff;
+ int aSign, zSign;
+ int q = 0;
+
+ aSig0 = extractFloatx80Frac(a);
+ aExp = extractFloatx80Exp(a);
+ aSign = extractFloatx80Sign(a);
+
+ /* invalid argument */
+ if (aExp == 0x7FFF) {
+ if ((UINT64) (aSig0<<1)) {
+ sincos_invalid(sin_a, cos_a, propagateFloatx80NaNOneArg(a));
+ return 0;
+ }
+
+ float_raise(float_flag_invalid);
+ sincos_invalid(sin_a, cos_a, floatx80_default_nan);
+ return 0;
+ }
+
+ if (aExp == 0) {
+ if (aSig0 == 0) {
+ sincos_tiny_argument(sin_a, cos_a, a);
+ return 0;
+ }
// float_raise(float_flag_denormal);
- /* handle pseudo denormals */
- if (! (aSig0 & U64(0x8000000000000000)))
- {
- float_raise(float_flag_inexact);
- if (sin_a)
- float_raise(float_flag_underflow);
- sincos_tiny_argument(sin_a, cos_a, a);
- return 0;
- }
-
- normalizeFloatx80Subnormal(aSig0, &aExp, &aSig0);
- }
-
- zSign = aSign;
- zExp = EXP_BIAS;
- expDiff = aExp - zExp;
-
- /* argument is out-of-range */
- if (expDiff >= 63)
- return -1;
-
- float_raise(float_flag_inexact);
-
- if (expDiff < -1) { // doesn't require reduction
- if (expDiff <= -68) {
- a = packFloatx80(aSign, aExp, aSig0);
- sincos_tiny_argument(sin_a, cos_a, a);
- return 0;
- }
- zExp = aExp;
- }
- else {
- q = reduce_trig_arg(expDiff, zSign, aSig0, aSig1);
- }
-
- /* **************************** */
- /* argument reduction completed */
- /* **************************** */
-
- /* using float128 for approximation */
- float128 r = normalizeRoundAndPackFloat128(0, zExp-0x10, aSig0, aSig1);
-
- if (aSign) q = -q;
- if (sin_a) *sin_a = sincos_approximation(zSign, r, q);
- if (cos_a) *cos_a = sincos_approximation(zSign, r, q+1);
-
- return 0;
+ /* handle pseudo denormals */
+ if (! (aSig0 & U64(0x8000000000000000)))
+ {
+ float_raise(float_flag_inexact);
+ if (sin_a)
+ float_raise(float_flag_underflow);
+ sincos_tiny_argument(sin_a, cos_a, a);
+ return 0;
+ }
+
+ normalizeFloatx80Subnormal(aSig0, &aExp, &aSig0);
+ }
+
+ zSign = aSign;
+ zExp = EXP_BIAS;
+ expDiff = aExp - zExp;
+
+ /* argument is out-of-range */
+ if (expDiff >= 63)
+ return -1;
+
+ float_raise(float_flag_inexact);
+
+ if (expDiff < -1) { // doesn't require reduction
+ if (expDiff <= -68) {
+ a = packFloatx80(aSign, aExp, aSig0);
+ sincos_tiny_argument(sin_a, cos_a, a);
+ return 0;
+ }
+ zExp = aExp;
+ }
+ else {
+ q = reduce_trig_arg(expDiff, zSign, aSig0, aSig1);
+ }
+
+ /* **************************** */
+ /* argument reduction completed */
+ /* **************************** */
+
+ /* using float128 for approximation */
+ float128 r = normalizeRoundAndPackFloat128(0, zExp-0x10, aSig0, aSig1);
+
+ if (aSign) q = -q;
+ if (sin_a) *sin_a = sincos_approximation(zSign, r, q);
+ if (cos_a) *cos_a = sincos_approximation(zSign, r, q+1);
+
+ return 0;
}
int floatx80_fsin(floatx80 &a)
{
- return sf_fsincos(a, &a, 0);
+ return sf_fsincos(a, &a, 0);
}
int floatx80_fcos(floatx80 &a)
{
- return sf_fsincos(a, 0, &a);
+ return sf_fsincos(a, 0, &a);
}
// =================================================
@@ -412,83 +412,83 @@ int floatx80_fcos(floatx80 &a)
int floatx80_ftan(floatx80 &a)
{
- UINT64 aSig0, aSig1 = 0;
- INT32 aExp, zExp, expDiff;
- int aSign, zSign;
- int q = 0;
-
- aSig0 = extractFloatx80Frac(a);
- aExp = extractFloatx80Exp(a);
- aSign = extractFloatx80Sign(a);
-
- /* invalid argument */
- if (aExp == 0x7FFF) {
- if ((UINT64) (aSig0<<1))
- {
- a = propagateFloatx80NaNOneArg(a);
- return 0;
- }
-
- float_raise(float_flag_invalid);
- a = floatx80_default_nan;
- return 0;
- }
-
- if (aExp == 0) {
- if (aSig0 == 0) return 0;
+ UINT64 aSig0, aSig1 = 0;
+ INT32 aExp, zExp, expDiff;
+ int aSign, zSign;
+ int q = 0;
+
+ aSig0 = extractFloatx80Frac(a);
+ aExp = extractFloatx80Exp(a);
+ aSign = extractFloatx80Sign(a);
+
+ /* invalid argument */
+ if (aExp == 0x7FFF) {
+ if ((UINT64) (aSig0<<1))
+ {
+ a = propagateFloatx80NaNOneArg(a);
+ return 0;
+ }
+
+ float_raise(float_flag_invalid);
+ a = floatx80_default_nan;
+ return 0;
+ }
+
+ if (aExp == 0) {
+ if (aSig0 == 0) return 0;
// float_raise(float_flag_denormal);
- /* handle pseudo denormals */
- if (! (aSig0 & U64(0x8000000000000000)))
- {
- float_raise(float_flag_inexact | float_flag_underflow);
- return 0;
- }
- normalizeFloatx80Subnormal(aSig0, &aExp, &aSig0);
- }
-
- zSign = aSign;
- zExp = EXP_BIAS;
- expDiff = aExp - zExp;
-
- /* argument is out-of-range */
- if (expDiff >= 63)
- return -1;
-
- float_raise(float_flag_inexact);
-
- if (expDiff < -1) { // doesn't require reduction
- if (expDiff <= -68) {
- a = packFloatx80(aSign, aExp, aSig0);
- return 0;
- }
- zExp = aExp;
- }
- else {
- q = reduce_trig_arg(expDiff, zSign, aSig0, aSig1);
- }
-
- /* **************************** */
- /* argument reduction completed */
- /* **************************** */
-
- /* using float128 for approximation */
- float128 r = normalizeRoundAndPackFloat128(0, zExp-0x10, aSig0, aSig1);
-
- float128 sin_r = poly_sin(r);
- float128 cos_r = poly_cos(r);
-
- if (q & 0x1) {
- r = float128_div(cos_r, sin_r);
- zSign = ! zSign;
- } else {
- r = float128_div(sin_r, cos_r);
- }
-
- a = float128_to_floatx80(r);
- if (zSign)
- a = floatx80_chs(a);
-
- return 0;
+ /* handle pseudo denormals */
+ if (! (aSig0 & U64(0x8000000000000000)))
+ {
+ float_raise(float_flag_inexact | float_flag_underflow);
+ return 0;
+ }
+ normalizeFloatx80Subnormal(aSig0, &aExp, &aSig0);
+ }
+
+ zSign = aSign;
+ zExp = EXP_BIAS;
+ expDiff = aExp - zExp;
+
+ /* argument is out-of-range */
+ if (expDiff >= 63)
+ return -1;
+
+ float_raise(float_flag_inexact);
+
+ if (expDiff < -1) { // doesn't require reduction
+ if (expDiff <= -68) {
+ a = packFloatx80(aSign, aExp, aSig0);
+ return 0;
+ }
+ zExp = aExp;
+ }
+ else {
+ q = reduce_trig_arg(expDiff, zSign, aSig0, aSig1);
+ }
+
+ /* **************************** */
+ /* argument reduction completed */
+ /* **************************** */
+
+ /* using float128 for approximation */
+ float128 r = normalizeRoundAndPackFloat128(0, zExp-0x10, aSig0, aSig1);
+
+ float128 sin_r = poly_sin(r);
+ float128 cos_r = poly_cos(r);
+
+ if (q & 0x1) {
+ r = float128_div(cos_r, sin_r);
+ zSign = ! zSign;
+ } else {
+ r = float128_div(sin_r, cos_r);
+ }
+
+ a = float128_to_floatx80(r);
+ if (zSign)
+ a = floatx80_chs(a);
+
+ return 0;
}
// 2 3 4 n
@@ -504,30 +504,30 @@ int floatx80_ftan(floatx80 &a)
float128 EvalPoly(float128 x, float128 *arr, unsigned n)
{
- float128 x2 = float128_mul(x, x);
- unsigned i;
-
- assert(n > 1);
-
- float128 r1 = arr[--n];
- i = n;
- while(i >= 2) {
- r1 = float128_mul(r1, x2);
- i -= 2;
- r1 = float128_add(r1, arr[i]);
- }
- if (i) r1 = float128_mul(r1, x);
-
- float128 r2 = arr[--n];
- i = n;
- while(i >= 2) {
- r2 = float128_mul(r2, x2);
- i -= 2;
- r2 = float128_add(r2, arr[i]);
- }
- if (i) r2 = float128_mul(r2, x);
-
- return float128_add(r1, r2);
+ float128 x2 = float128_mul(x, x);
+ unsigned i;
+
+ assert(n > 1);
+
+ float128 r1 = arr[--n];
+ i = n;
+ while(i >= 2) {
+ r1 = float128_mul(r1, x2);
+ i -= 2;
+ r1 = float128_add(r1, arr[i]);
+ }
+ if (i) r1 = float128_mul(r1, x);
+
+ float128 r2 = arr[--n];
+ i = n;
+ while(i >= 2) {
+ r2 = float128_mul(r2, x2);
+ i -= 2;
+ r2 = float128_add(r2, arr[i]);
+ }
+ if (i) r2 = float128_mul(r2, x);
+
+ return float128_add(r1, r2);
}
// 2 4 6 8 2n
@@ -544,7 +544,7 @@ float128 EvalPoly(float128 x, float128 *arr, unsigned n)
float128 EvenPoly(float128 x, float128 *arr, unsigned n)
{
- return EvalPoly(float128_mul(x, x), arr, n);
+ return EvalPoly(float128_mul(x, x), arr, n);
}
// 3 5 7 9 2n+1
@@ -564,6 +564,5 @@ float128 EvenPoly(float128 x, float128 *arr, unsigned n)
float128 OddPoly(float128 x, float128 *arr, unsigned n)
{
- return float128_mul(x, EvenPoly(x, arr, n));
+ return float128_mul(x, EvenPoly(x, arr, n));
}
-
diff --git a/src/lib/softfloat/fyl2x.c b/src/lib/softfloat/fyl2x.c
index fc41d125581..be5e134cc3b 100644
--- a/src/lib/softfloat/fyl2x.c
+++ b/src/lib/softfloat/fyl2x.c
@@ -53,7 +53,7 @@ static const floatx80 floatx80_default_nan = packFloatx80(0, 0xffff, U64(0xfffff
INLINE bits64 extractFloatx80Frac( floatx80 a )
{
- return a.low;
+ return a.low;
}
@@ -65,7 +65,7 @@ INLINE bits64 extractFloatx80Frac( floatx80 a )
INLINE int32 extractFloatx80Exp( floatx80 a )
{
- return a.high & 0x7FFF;
+ return a.high & 0x7FFF;
}
@@ -77,7 +77,7 @@ INLINE int32 extractFloatx80Exp( floatx80 a )
INLINE flag extractFloatx80Sign( floatx80 a )
{
- return a.high>>15;
+ return a.high>>15;
}
@@ -89,12 +89,12 @@ INLINE flag extractFloatx80Sign( floatx80 a )
INLINE floatx80 propagateFloatx80NaNOneArg(floatx80 a)
{
- if (floatx80_is_signaling_nan(a))
- float_raise(float_flag_invalid);
+ if (floatx80_is_signaling_nan(a))
+ float_raise(float_flag_invalid);
- a.low |= U64(0xC000000000000000);
+ a.low |= U64(0xC000000000000000);
- return a;
+ return a;
}
/*----------------------------------------------------------------------------
@@ -106,9 +106,9 @@ INLINE floatx80 propagateFloatx80NaNOneArg(floatx80 a)
INLINE void normalizeFloatx80Subnormal(UINT64 aSig, INT32 *zExpPtr, UINT64 *zSigPtr)
{
- int shiftCount = countLeadingZeros64(aSig);
- *zSigPtr = aSig<<shiftCount;
- *zExpPtr = 1 - shiftCount;
+ int shiftCount = countLeadingZeros64(aSig);
+ *zSigPtr = aSig<<shiftCount;
+ *zExpPtr = 1 - shiftCount;
}
@@ -119,7 +119,7 @@ INLINE void normalizeFloatx80Subnormal(UINT64 aSig, INT32 *zExpPtr, UINT64 *zSig
INLINE int floatx80_is_nan(floatx80 a)
{
- return ((a.high & 0x7FFF) == 0x7FFF) && (INT64) (a.low<<1);
+ return ((a.high & 0x7FFF) == 0x7FFF) && (INT64) (a.low<<1);
}
/*----------------------------------------------------------------------------
@@ -130,38 +130,38 @@ INLINE int floatx80_is_nan(floatx80 a)
static floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b)
{
- int aIsNaN = floatx80_is_nan(a);
- int aIsSignalingNaN = floatx80_is_signaling_nan(a);
- int bIsNaN = floatx80_is_nan(b);
- int bIsSignalingNaN = floatx80_is_signaling_nan(b);
- a.low |= U64(0xC000000000000000);
- b.low |= U64(0xC000000000000000);
- if (aIsSignalingNaN | bIsSignalingNaN) float_raise(float_flag_invalid);
- if (aIsSignalingNaN) {
- if (bIsSignalingNaN) goto returnLargerSignificand;
- return bIsNaN ? b : a;
- }
- else if (aIsNaN) {
- if (bIsSignalingNaN | ! bIsNaN) return a;
- returnLargerSignificand:
- if (a.low < b.low) return b;
- if (b.low < a.low) return a;
- return (a.high < b.high) ? a : b;
- }
- else {
- return b;
- }
+ int aIsNaN = floatx80_is_nan(a);
+ int aIsSignalingNaN = floatx80_is_signaling_nan(a);
+ int bIsNaN = floatx80_is_nan(b);
+ int bIsSignalingNaN = floatx80_is_signaling_nan(b);
+ a.low |= U64(0xC000000000000000);
+ b.low |= U64(0xC000000000000000);
+ if (aIsSignalingNaN | bIsSignalingNaN) float_raise(float_flag_invalid);
+ if (aIsSignalingNaN) {
+ if (bIsSignalingNaN) goto returnLargerSignificand;
+ return bIsNaN ? b : a;
+ }
+ else if (aIsNaN) {
+ if (bIsSignalingNaN | ! bIsNaN) return a;
+ returnLargerSignificand:
+ if (a.low < b.low) return b;
+ if (b.low < a.low) return a;
+ return (a.high < b.high) ? a : b;
+ }
+ else {
+ return b;
+ }
}
static const float128 float128_one =
- packFloat_128(U64(0x3fff000000000000), U64(0x0000000000000000));
+ packFloat_128(U64(0x3fff000000000000), U64(0x0000000000000000));
static const float128 float128_two =
- packFloat_128(U64(0x4000000000000000), U64(0x0000000000000000));
+ packFloat_128(U64(0x4000000000000000), U64(0x0000000000000000));
static const float128 float128_ln2inv2 =
- packFloat_128(U64(0x400071547652b82f), U64(0xe1777d0ffda0d23a));
+ packFloat_128(U64(0x400071547652b82f), U64(0xe1777d0ffda0d23a));
-#define SQRT2_HALF_SIG U64(0xb504f333f9de6484)
+#define SQRT2_HALF_SIG U64(0xb504f333f9de6484)
extern float128 OddPoly(float128 x, float128 *arr, unsigned n);
@@ -169,15 +169,15 @@ extern float128 OddPoly(float128 x, float128 *arr, unsigned n);
static float128 ln_arr[L2_ARR_SIZE] =
{
- PACK_FLOAT_128(0x3fff000000000000, 0x0000000000000000), /* 1 */
- PACK_FLOAT_128(0x3ffd555555555555, 0x5555555555555555), /* 3 */
- PACK_FLOAT_128(0x3ffc999999999999, 0x999999999999999a), /* 5 */
- PACK_FLOAT_128(0x3ffc249249249249, 0x2492492492492492), /* 7 */
- PACK_FLOAT_128(0x3ffbc71c71c71c71, 0xc71c71c71c71c71c), /* 9 */
- PACK_FLOAT_128(0x3ffb745d1745d174, 0x5d1745d1745d1746), /* 11 */
- PACK_FLOAT_128(0x3ffb3b13b13b13b1, 0x3b13b13b13b13b14), /* 13 */
- PACK_FLOAT_128(0x3ffb111111111111, 0x1111111111111111), /* 15 */
- PACK_FLOAT_128(0x3ffae1e1e1e1e1e1, 0xe1e1e1e1e1e1e1e2) /* 17 */
+ PACK_FLOAT_128(0x3fff000000000000, 0x0000000000000000), /* 1 */
+ PACK_FLOAT_128(0x3ffd555555555555, 0x5555555555555555), /* 3 */
+ PACK_FLOAT_128(0x3ffc999999999999, 0x999999999999999a), /* 5 */
+ PACK_FLOAT_128(0x3ffc249249249249, 0x2492492492492492), /* 7 */
+ PACK_FLOAT_128(0x3ffbc71c71c71c71, 0xc71c71c71c71c71c), /* 9 */
+ PACK_FLOAT_128(0x3ffb745d1745d174, 0x5d1745d1745d1746), /* 11 */
+ PACK_FLOAT_128(0x3ffb3b13b13b13b1, 0x3b13b13b13b13b14), /* 13 */
+ PACK_FLOAT_128(0x3ffb111111111111, 0x1111111111111111), /* 15 */
+ PACK_FLOAT_128(0x3ffae1e1e1e1e1e1, 0xe1e1e1e1e1e1e1e2) /* 17 */
};
static float128 poly_ln(float128 x1)
@@ -205,29 +205,29 @@ static float128 poly_ln(float128 x1)
// 1-u
//
*/
- return OddPoly(x1, ln_arr, L2_ARR_SIZE);
+ return OddPoly(x1, ln_arr, L2_ARR_SIZE);
}
/* required sqrt(2)/2 < x < sqrt(2) */
static float128 poly_l2(float128 x)
{
- /* using float128 for approximation */
- float128 x_p1 = float128_add(x, float128_one);
- float128 x_m1 = float128_sub(x, float128_one);
- x = float128_div(x_m1, x_p1);
- x = poly_ln(x);
- x = float128_mul(x, float128_ln2inv2);
- return x;
+ /* using float128 for approximation */
+ float128 x_p1 = float128_add(x, float128_one);
+ float128 x_m1 = float128_sub(x, float128_one);
+ x = float128_div(x_m1, x_p1);
+ x = poly_ln(x);
+ x = float128_mul(x, float128_ln2inv2);
+ return x;
}
static float128 poly_l2p1(float128 x)
{
- /* using float128 for approximation */
- float128 x_p2 = float128_add(x, float128_two);
- x = float128_div(x, x_p2);
- x = poly_ln(x);
- x = float128_mul(x, float128_ln2inv2);
- return x;
+ /* using float128 for approximation */
+ float128 x_p2 = float128_add(x, float128_two);
+ x = float128_div(x, x_p2);
+ x = poly_ln(x);
+ x = float128_mul(x, float128_ln2inv2);
+ return x;
}
// =================================================
@@ -257,88 +257,88 @@ static float128 poly_l2p1(float128 x)
static floatx80 fyl2x(floatx80 a, floatx80 b)
{
- UINT64 aSig = extractFloatx80Frac(a);
- INT32 aExp = extractFloatx80Exp(a);
- int aSign = extractFloatx80Sign(a);
- UINT64 bSig = extractFloatx80Frac(b);
- INT32 bExp = extractFloatx80Exp(b);
- int bSign = extractFloatx80Sign(b);
-
- int zSign = bSign ^ 1;
-
- if (aExp == 0x7FFF) {
- if ((UINT64) (aSig<<1)
- || ((bExp == 0x7FFF) && (UINT64) (bSig<<1)))
- {
- return propagateFloatx80NaN(a, b);
- }
- if (aSign)
- {
+ UINT64 aSig = extractFloatx80Frac(a);
+ INT32 aExp = extractFloatx80Exp(a);
+ int aSign = extractFloatx80Sign(a);
+ UINT64 bSig = extractFloatx80Frac(b);
+ INT32 bExp = extractFloatx80Exp(b);
+ int bSign = extractFloatx80Sign(b);
+
+ int zSign = bSign ^ 1;
+
+ if (aExp == 0x7FFF) {
+ if ((UINT64) (aSig<<1)
+ || ((bExp == 0x7FFF) && (UINT64) (bSig<<1)))
+ {
+ return propagateFloatx80NaN(a, b);
+ }
+ if (aSign)
+ {
invalid:
float_raise(float_flag_invalid);
return floatx80_default_nan;
- }
- else {
- if (bExp == 0) {
- if (bSig == 0) goto invalid;
- float_raise(float_flag_denormal);
- }
- return packFloatx80(bSign, 0x7FFF, U64(0x8000000000000000));
- }
- }
- if (bExp == 0x7FFF)
- {
- if ((UINT64) (bSig<<1)) return propagateFloatx80NaN(a, b);
- if (aSign && (UINT64)(aExp | aSig)) goto invalid;
- if (aSig && (aExp == 0))
- float_raise(float_flag_denormal);
- if (aExp < 0x3FFF) {
- return packFloatx80(zSign, 0x7FFF, U64(0x8000000000000000));
- }
- if (aExp == 0x3FFF && ((UINT64) (aSig<<1) == 0)) goto invalid;
- return packFloatx80(bSign, 0x7FFF, U64(0x8000000000000000));
- }
- if (aExp == 0) {
- if (aSig == 0) {
- if ((bExp | bSig) == 0) goto invalid;
- float_raise(float_flag_divbyzero);
- return packFloatx80(zSign, 0x7FFF, U64(0x8000000000000000));
- }
- if (aSign) goto invalid;
- float_raise(float_flag_denormal);
- normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
- }
- if (aSign) goto invalid;
- if (bExp == 0) {
- if (bSig == 0) {
- if (aExp < 0x3FFF) return packFloatx80(zSign, 0, 0);
- return packFloatx80(bSign, 0, 0);
- }
- float_raise(float_flag_denormal);
- normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
- }
- if (aExp == 0x3FFF && ((UINT64) (aSig<<1) == 0))
- return packFloatx80(bSign, 0, 0);
-
- float_raise(float_flag_inexact);
-
- int ExpDiff = aExp - 0x3FFF;
- aExp = 0;
- if (aSig >= SQRT2_HALF_SIG) {
- ExpDiff++;
- aExp--;
- }
-
- /* ******************************** */
- /* using float128 for approximation */
- /* ******************************** */
-
- UINT64 zSig0, zSig1;
- shift128Right(aSig<<1, 0, 16, &zSig0, &zSig1);
- float128 x = packFloat128(0, aExp+0x3FFF, zSig0, zSig1);
- x = poly_l2(x);
- x = float128_add(x, int64_to_float128((INT64) ExpDiff));
- return floatx80_mul(b, float128_to_floatx80(x));
+ }
+ else {
+ if (bExp == 0) {
+ if (bSig == 0) goto invalid;
+ float_raise(float_flag_denormal);
+ }
+ return packFloatx80(bSign, 0x7FFF, U64(0x8000000000000000));
+ }
+ }
+ if (bExp == 0x7FFF)
+ {
+ if ((UINT64) (bSig<<1)) return propagateFloatx80NaN(a, b);
+ if (aSign && (UINT64)(aExp | aSig)) goto invalid;
+ if (aSig && (aExp == 0))
+ float_raise(float_flag_denormal);
+ if (aExp < 0x3FFF) {
+ return packFloatx80(zSign, 0x7FFF, U64(0x8000000000000000));
+ }
+ if (aExp == 0x3FFF && ((UINT64) (aSig<<1) == 0)) goto invalid;
+ return packFloatx80(bSign, 0x7FFF, U64(0x8000000000000000));
+ }
+ if (aExp == 0) {
+ if (aSig == 0) {
+ if ((bExp | bSig) == 0) goto invalid;
+ float_raise(float_flag_divbyzero);
+ return packFloatx80(zSign, 0x7FFF, U64(0x8000000000000000));
+ }
+ if (aSign) goto invalid;
+ float_raise(float_flag_denormal);
+ normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
+ }
+ if (aSign) goto invalid;
+ if (bExp == 0) {
+ if (bSig == 0) {
+ if (aExp < 0x3FFF) return packFloatx80(zSign, 0, 0);
+ return packFloatx80(bSign, 0, 0);
+ }
+ float_raise(float_flag_denormal);
+ normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
+ }
+ if (aExp == 0x3FFF && ((UINT64) (aSig<<1) == 0))
+ return packFloatx80(bSign, 0, 0);
+
+ float_raise(float_flag_inexact);
+
+ int ExpDiff = aExp - 0x3FFF;
+ aExp = 0;
+ if (aSig >= SQRT2_HALF_SIG) {
+ ExpDiff++;
+ aExp--;
+ }
+
+ /* ******************************** */
+ /* using float128 for approximation */
+ /* ******************************** */
+
+ UINT64 zSig0, zSig1;
+ shift128Right(aSig<<1, 0, 16, &zSig0, &zSig1);
+ float128 x = packFloat128(0, aExp+0x3FFF, zSig0, zSig1);
+ x = poly_l2(x);
+ x = float128_add(x, int64_to_float128((INT64) ExpDiff));
+ return floatx80_mul(b, float128_to_floatx80(x));
}
// =================================================
@@ -368,123 +368,123 @@ invalid:
floatx80 fyl2xp1(floatx80 a, floatx80 b)
{
- INT32 aExp, bExp;
- UINT64 aSig, bSig, zSig0, zSig1, zSig2;
- int aSign, bSign;
-
- aSig = extractFloatx80Frac(a);
- aExp = extractFloatx80Exp(a);
- aSign = extractFloatx80Sign(a);
- bSig = extractFloatx80Frac(b);
- bExp = extractFloatx80Exp(b);
- bSign = extractFloatx80Sign(b);
- int zSign = aSign ^ bSign;
-
- if (aExp == 0x7FFF) {
- if ((UINT64) (aSig<<1)
- || ((bExp == 0x7FFF) && (UINT64) (bSig<<1)))
- {
- return propagateFloatx80NaN(a, b);
- }
- if (aSign)
- {
+ INT32 aExp, bExp;
+ UINT64 aSig, bSig, zSig0, zSig1, zSig2;
+ int aSign, bSign;
+
+ aSig = extractFloatx80Frac(a);
+ aExp = extractFloatx80Exp(a);
+ aSign = extractFloatx80Sign(a);
+ bSig = extractFloatx80Frac(b);
+ bExp = extractFloatx80Exp(b);
+ bSign = extractFloatx80Sign(b);
+ int zSign = aSign ^ bSign;
+
+ if (aExp == 0x7FFF) {
+ if ((UINT64) (aSig<<1)
+ || ((bExp == 0x7FFF) && (UINT64) (bSig<<1)))
+ {
+ return propagateFloatx80NaN(a, b);
+ }
+ if (aSign)
+ {
invalid:
float_raise(float_flag_invalid);
return floatx80_default_nan;
- }
- else {
- if (bExp == 0) {
- if (bSig == 0) goto invalid;
- float_raise(float_flag_denormal);
- }
- return packFloatx80(bSign, 0x7FFF, U64(0x8000000000000000));
- }
- }
- if (bExp == 0x7FFF)
- {
- if ((UINT64) (bSig<<1))
- return propagateFloatx80NaN(a, b);
-
- if (aExp == 0) {
- if (aSig == 0) goto invalid;
- float_raise(float_flag_denormal);
- }
-
- return packFloatx80(zSign, 0x7FFF, U64(0x8000000000000000));
- }
- if (aExp == 0) {
- if (aSig == 0) {
- if (bSig && (bExp == 0)) float_raise(float_flag_denormal);
- return packFloatx80(zSign, 0, 0);
- }
- float_raise(float_flag_denormal);
- normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
- }
- if (bExp == 0) {
- if (bSig == 0) return packFloatx80(zSign, 0, 0);
- float_raise(float_flag_denormal);
- normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
- }
-
- float_raise(float_flag_inexact);
-
- if (aSign && aExp >= 0x3FFF)
- return a;
-
- if (aExp >= 0x3FFC) // big argument
- {
- return fyl2x(floatx80_add(a, floatx80_one), b);
- }
-
- // handle tiny argument
- if (aExp < EXP_BIAS-70)
- {
- // first order approximation, return (a*b)/ln(2)
- INT32 zExp = aExp + FLOAT_LN2INV_EXP - 0x3FFE;
+ }
+ else {
+ if (bExp == 0) {
+ if (bSig == 0) goto invalid;
+ float_raise(float_flag_denormal);
+ }
+ return packFloatx80(bSign, 0x7FFF, U64(0x8000000000000000));
+ }
+ }
+ if (bExp == 0x7FFF)
+ {
+ if ((UINT64) (bSig<<1))
+ return propagateFloatx80NaN(a, b);
+
+ if (aExp == 0) {
+ if (aSig == 0) goto invalid;
+ float_raise(float_flag_denormal);
+ }
+
+ return packFloatx80(zSign, 0x7FFF, U64(0x8000000000000000));
+ }
+ if (aExp == 0) {
+ if (aSig == 0) {
+ if (bSig && (bExp == 0)) float_raise(float_flag_denormal);
+ return packFloatx80(zSign, 0, 0);
+ }
+ float_raise(float_flag_denormal);
+ normalizeFloatx80Subnormal(aSig, &aExp, &aSig);
+ }
+ if (bExp == 0) {
+ if (bSig == 0) return packFloatx80(zSign, 0, 0);
+ float_raise(float_flag_denormal);
+ normalizeFloatx80Subnormal(bSig, &bExp, &bSig);
+ }
+
+ float_raise(float_flag_inexact);
+
+ if (aSign && aExp >= 0x3FFF)
+ return a;
+
+ if (aExp >= 0x3FFC) // big argument
+ {
+ return fyl2x(floatx80_add(a, floatx80_one), b);
+ }
+
+ // handle tiny argument
+ if (aExp < EXP_BIAS-70)
+ {
+ // first order approximation, return (a*b)/ln(2)
+ INT32 zExp = aExp + FLOAT_LN2INV_EXP - 0x3FFE;
mul128By64To192(FLOAT_LN2INV_HI, FLOAT_LN2INV_LO, aSig, &zSig0, &zSig1, &zSig2);
- if (0 < (INT64) zSig0) {
- shortShift128Left(zSig0, zSig1, 1, &zSig0, &zSig1);
- --zExp;
- }
+ if (0 < (INT64) zSig0) {
+ shortShift128Left(zSig0, zSig1, 1, &zSig0, &zSig1);
+ --zExp;
+ }
- zExp = zExp + bExp - 0x3FFE;
+ zExp = zExp + bExp - 0x3FFE;
mul128By64To192(zSig0, zSig1, bSig, &zSig0, &zSig1, &zSig2);
- if (0 < (INT64) zSig0) {
- shortShift128Left(zSig0, zSig1, 1, &zSig0, &zSig1);
- --zExp;
- }
-
- return
- roundAndPackFloatx80(80, aSign ^ bSign, zExp, zSig0, zSig1);
- }
-
- /* ******************************** */
- /* using float128 for approximation */
- /* ******************************** */
-
- shift128Right(aSig<<1, 0, 16, &zSig0, &zSig1);
- float128 x = packFloat128(aSign, aExp, zSig0, zSig1);
- x = poly_l2p1(x);
- return floatx80_mul(b, float128_to_floatx80(x));
+ if (0 < (INT64) zSig0) {
+ shortShift128Left(zSig0, zSig1, 1, &zSig0, &zSig1);
+ --zExp;
+ }
+
+ return
+ roundAndPackFloatx80(80, aSign ^ bSign, zExp, zSig0, zSig1);
+ }
+
+ /* ******************************** */
+ /* using float128 for approximation */
+ /* ******************************** */
+
+ shift128Right(aSig<<1, 0, 16, &zSig0, &zSig1);
+ float128 x = packFloat128(aSign, aExp, zSig0, zSig1);
+ x = poly_l2p1(x);
+ return floatx80_mul(b, float128_to_floatx80(x));
}
floatx80 floatx80_flognp1(floatx80 a)
{
- return fyl2xp1(a, floatx80_ln_2);
+ return fyl2xp1(a, floatx80_ln_2);
}
floatx80 floatx80_flogn(floatx80 a)
{
- return fyl2x(a, floatx80_ln_2);
+ return fyl2x(a, floatx80_ln_2);
}
floatx80 floatx80_flog2(floatx80 a)
{
- return fyl2x(a, floatx80_one);
+ return fyl2x(a, floatx80_one);
}
floatx80 floatx80_flog10(floatx80 a)
{
- return fyl2x(a, floatx80_log10_2);
+ return fyl2x(a, floatx80_log10_2);
}
diff --git a/src/lib/softfloat/softfloat.c b/src/lib/softfloat/softfloat.c
index fe0137787bc..89a191aa681 100644
--- a/src/lib/softfloat/softfloat.c
+++ b/src/lib/softfloat/softfloat.c
@@ -67,39 +67,39 @@ int8 float_rounding_mode = float_round_nearest_even;
static int32 roundAndPackInt32( flag zSign, bits64 absZ )
{
- int8 roundingMode;
- flag roundNearestEven;
- int8 roundIncrement, roundBits;
- int32 z;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = ( roundingMode == float_round_nearest_even );
- roundIncrement = 0x40;
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- roundIncrement = 0;
- }
- else {
- roundIncrement = 0x7F;
- if ( zSign ) {
- if ( roundingMode == float_round_up ) roundIncrement = 0;
- }
- else {
- if ( roundingMode == float_round_down ) roundIncrement = 0;
- }
- }
- }
- roundBits = absZ & 0x7F;
- absZ = ( absZ + roundIncrement )>>7;
- absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
- z = absZ;
- if ( zSign ) z = - z;
- if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
- float_raise( float_flag_invalid );
- return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
- }
- if ( roundBits ) float_exception_flags |= float_flag_inexact;
- return z;
+ int8 roundingMode;
+ flag roundNearestEven;
+ int8 roundIncrement, roundBits;
+ int32 z;
+
+ roundingMode = float_rounding_mode;
+ roundNearestEven = ( roundingMode == float_round_nearest_even );
+ roundIncrement = 0x40;
+ if ( ! roundNearestEven ) {
+ if ( roundingMode == float_round_to_zero ) {
+ roundIncrement = 0;
+ }
+ else {
+ roundIncrement = 0x7F;
+ if ( zSign ) {
+ if ( roundingMode == float_round_up ) roundIncrement = 0;
+ }
+ else {
+ if ( roundingMode == float_round_down ) roundIncrement = 0;
+ }
+ }
+ }
+ roundBits = absZ & 0x7F;
+ absZ = ( absZ + roundIncrement )>>7;
+ absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
+ z = absZ;
+ if ( zSign ) z = - z;
+ if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {
+ float_raise( float_flag_invalid );
+ return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ }
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;
+ return z;
}
@@ -117,42 +117,42 @@ static int32 roundAndPackInt32( flag zSign, bits64 absZ )
static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 )
{
- int8 roundingMode;
- flag roundNearestEven, increment;
- int64 z;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = ( roundingMode == float_round_nearest_even );
- increment = ( (sbits64) absZ1 < 0 );
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- increment = 0;
- }
- else {
- if ( zSign ) {
- increment = ( roundingMode == float_round_down ) && absZ1;
- }
- else {
- increment = ( roundingMode == float_round_up ) && absZ1;
- }
- }
- }
- if ( increment ) {
- ++absZ0;
- if ( absZ0 == 0 ) goto overflow;
- absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven );
- }
- z = absZ0;
- if ( zSign ) z = - z;
- if ( z && ( ( z < 0 ) ^ zSign ) ) {
- overflow:
- float_raise( float_flag_invalid );
- return
- zSign ? (sbits64) LIT64( 0x8000000000000000 )
- : LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- if ( absZ1 ) float_exception_flags |= float_flag_inexact;
- return z;
+ int8 roundingMode;
+ flag roundNearestEven, increment;
+ int64 z;
+
+ roundingMode = float_rounding_mode;
+ roundNearestEven = ( roundingMode == float_round_nearest_even );
+ increment = ( (sbits64) absZ1 < 0 );
+ if ( ! roundNearestEven ) {
+ if ( roundingMode == float_round_to_zero ) {
+ increment = 0;
+ }
+ else {
+ if ( zSign ) {
+ increment = ( roundingMode == float_round_down ) && absZ1;
+ }
+ else {
+ increment = ( roundingMode == float_round_up ) && absZ1;
+ }
+ }
+ }
+ if ( increment ) {
+ ++absZ0;
+ if ( absZ0 == 0 ) goto overflow;
+ absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven );
+ }
+ z = absZ0;
+ if ( zSign ) z = - z;
+ if ( z && ( ( z < 0 ) ^ zSign ) ) {
+ overflow:
+ float_raise( float_flag_invalid );
+ return
+ zSign ? (sbits64) LIT64( 0x8000000000000000 )
+ : LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ if ( absZ1 ) float_exception_flags |= float_flag_inexact;
+ return z;
}
@@ -163,7 +163,7 @@ static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 )
INLINE bits32 extractFloat32Frac( float32 a )
{
- return a & 0x007FFFFF;
+ return a & 0x007FFFFF;
}
@@ -174,7 +174,7 @@ INLINE bits32 extractFloat32Frac( float32 a )
INLINE int16 extractFloat32Exp( float32 a )
{
- return ( a>>23 ) & 0xFF;
+ return ( a>>23 ) & 0xFF;
}
@@ -185,7 +185,7 @@ INLINE int16 extractFloat32Exp( float32 a )
INLINE flag extractFloat32Sign( float32 a )
{
- return a>>31;
+ return a>>31;
}
@@ -197,13 +197,13 @@ INLINE flag extractFloat32Sign( float32 a )
*----------------------------------------------------------------------------*/
static void
- normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )
+ normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )
{
- int8 shiftCount;
+ int8 shiftCount;
- shiftCount = countLeadingZeros32( aSig ) - 8;
- *zSigPtr = aSig<<shiftCount;
- *zExpPtr = 1 - shiftCount;
+ shiftCount = countLeadingZeros32( aSig ) - 8;
+ *zSigPtr = aSig<<shiftCount;
+ *zExpPtr = 1 - shiftCount;
}
@@ -221,7 +221,7 @@ static void
INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
{
- return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;
+ return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;
}
@@ -249,53 +249,53 @@ INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )
static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
{
- int8 roundingMode;
- flag roundNearestEven;
- int8 roundIncrement, roundBits;
- flag isTiny;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = ( roundingMode == float_round_nearest_even );
- roundIncrement = 0x40;
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- roundIncrement = 0;
- }
- else {
- roundIncrement = 0x7F;
- if ( zSign ) {
- if ( roundingMode == float_round_up ) roundIncrement = 0;
- }
- else {
- if ( roundingMode == float_round_down ) roundIncrement = 0;
- }
- }
- }
- roundBits = zSig & 0x7F;
- if ( 0xFD <= (bits16) zExp ) {
- if ( ( 0xFD < zExp )
- || ( ( zExp == 0xFD )
- && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
- ) {
- float_raise( float_flag_overflow | float_flag_inexact );
- return packFloat32( zSign, 0xFF, 0 ) - ( roundIncrement == 0 );
- }
- if ( zExp < 0 ) {
- isTiny =
- ( float_detect_tininess == float_tininess_before_rounding )
- || ( zExp < -1 )
- || ( zSig + roundIncrement < 0x80000000 );
- shift32RightJamming( zSig, - zExp, &zSig );
- zExp = 0;
- roundBits = zSig & 0x7F;
- if ( isTiny && roundBits ) float_raise( float_flag_underflow );
- }
- }
- if ( roundBits ) float_exception_flags |= float_flag_inexact;
- zSig = ( zSig + roundIncrement )>>7;
- zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
- if ( zSig == 0 ) zExp = 0;
- return packFloat32( zSign, zExp, zSig );
+ int8 roundingMode;
+ flag roundNearestEven;
+ int8 roundIncrement, roundBits;
+ flag isTiny;
+
+ roundingMode = float_rounding_mode;
+ roundNearestEven = ( roundingMode == float_round_nearest_even );
+ roundIncrement = 0x40;
+ if ( ! roundNearestEven ) {
+ if ( roundingMode == float_round_to_zero ) {
+ roundIncrement = 0;
+ }
+ else {
+ roundIncrement = 0x7F;
+ if ( zSign ) {
+ if ( roundingMode == float_round_up ) roundIncrement = 0;
+ }
+ else {
+ if ( roundingMode == float_round_down ) roundIncrement = 0;
+ }
+ }
+ }
+ roundBits = zSig & 0x7F;
+ if ( 0xFD <= (bits16) zExp ) {
+ if ( ( 0xFD < zExp )
+ || ( ( zExp == 0xFD )
+ && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )
+ ) {
+ float_raise( float_flag_overflow | float_flag_inexact );
+ return packFloat32( zSign, 0xFF, 0 ) - ( roundIncrement == 0 );
+ }
+ if ( zExp < 0 ) {
+ isTiny =
+ ( float_detect_tininess == float_tininess_before_rounding )
+ || ( zExp < -1 )
+ || ( zSig + roundIncrement < 0x80000000 );
+ shift32RightJamming( zSig, - zExp, &zSig );
+ zExp = 0;
+ roundBits = zSig & 0x7F;
+ if ( isTiny && roundBits ) float_raise( float_flag_underflow );
+ }
+ }
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;
+ zSig = ( zSig + roundIncrement )>>7;
+ zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );
+ if ( zSig == 0 ) zExp = 0;
+ return packFloat32( zSign, zExp, zSig );
}
@@ -309,12 +309,12 @@ static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
*----------------------------------------------------------------------------*/
static float32
- normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
+ normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )
{
- int8 shiftCount;
+ int8 shiftCount;
- shiftCount = countLeadingZeros32( zSig ) - 1;
- return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount );
+ shiftCount = countLeadingZeros32( zSig ) - 1;
+ return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount );
}
@@ -325,7 +325,7 @@ static float32
INLINE bits64 extractFloat64Frac( float64 a )
{
- return a & LIT64( 0x000FFFFFFFFFFFFF );
+ return a & LIT64( 0x000FFFFFFFFFFFFF );
}
@@ -336,7 +336,7 @@ INLINE bits64 extractFloat64Frac( float64 a )
INLINE int16 extractFloat64Exp( float64 a )
{
- return ( a>>52 ) & 0x7FF;
+ return ( a>>52 ) & 0x7FF;
}
@@ -347,7 +347,7 @@ INLINE int16 extractFloat64Exp( float64 a )
INLINE flag extractFloat64Sign( float64 a )
{
- return a>>63;
+ return a>>63;
}
@@ -359,13 +359,13 @@ INLINE flag extractFloat64Sign( float64 a )
*----------------------------------------------------------------------------*/
static void
- normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr )
+ normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr )
{
- int8 shiftCount;
+ int8 shiftCount;
- shiftCount = countLeadingZeros64( aSig ) - 11;
- *zSigPtr = aSig<<shiftCount;
- *zExpPtr = 1 - shiftCount;
+ shiftCount = countLeadingZeros64( aSig ) - 11;
+ *zSigPtr = aSig<<shiftCount;
+ *zExpPtr = 1 - shiftCount;
}
@@ -383,7 +383,7 @@ static void
INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
{
- return ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig;
+ return ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig;
}
@@ -411,53 +411,53 @@ INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )
static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
{
- int8 roundingMode;
- flag roundNearestEven;
- int16 roundIncrement, roundBits;
- flag isTiny;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = ( roundingMode == float_round_nearest_even );
- roundIncrement = 0x200;
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- roundIncrement = 0;
- }
- else {
- roundIncrement = 0x3FF;
- if ( zSign ) {
- if ( roundingMode == float_round_up ) roundIncrement = 0;
- }
- else {
- if ( roundingMode == float_round_down ) roundIncrement = 0;
- }
- }
- }
- roundBits = zSig & 0x3FF;
- if ( 0x7FD <= (bits16) zExp ) {
- if ( ( 0x7FD < zExp )
- || ( ( zExp == 0x7FD )
- && ( (sbits64) ( zSig + roundIncrement ) < 0 ) )
- ) {
- float_raise( float_flag_overflow | float_flag_inexact );
- return packFloat64( zSign, 0x7FF, 0 ) - ( roundIncrement == 0 );
- }
- if ( zExp < 0 ) {
- isTiny =
- ( float_detect_tininess == float_tininess_before_rounding )
- || ( zExp < -1 )
- || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
- shift64RightJamming( zSig, - zExp, &zSig );
- zExp = 0;
- roundBits = zSig & 0x3FF;
- if ( isTiny && roundBits ) float_raise( float_flag_underflow );
- }
- }
- if ( roundBits ) float_exception_flags |= float_flag_inexact;
- zSig = ( zSig + roundIncrement )>>10;
- zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
- if ( zSig == 0 ) zExp = 0;
- return packFloat64( zSign, zExp, zSig );
+ int8 roundingMode;
+ flag roundNearestEven;
+ int16 roundIncrement, roundBits;
+ flag isTiny;
+
+ roundingMode = float_rounding_mode;
+ roundNearestEven = ( roundingMode == float_round_nearest_even );
+ roundIncrement = 0x200;
+ if ( ! roundNearestEven ) {
+ if ( roundingMode == float_round_to_zero ) {
+ roundIncrement = 0;
+ }
+ else {
+ roundIncrement = 0x3FF;
+ if ( zSign ) {
+ if ( roundingMode == float_round_up ) roundIncrement = 0;
+ }
+ else {
+ if ( roundingMode == float_round_down ) roundIncrement = 0;
+ }
+ }
+ }
+ roundBits = zSig & 0x3FF;
+ if ( 0x7FD <= (bits16) zExp ) {
+ if ( ( 0x7FD < zExp )
+ || ( ( zExp == 0x7FD )
+ && ( (sbits64) ( zSig + roundIncrement ) < 0 ) )
+ ) {
+ float_raise( float_flag_overflow | float_flag_inexact );
+ return packFloat64( zSign, 0x7FF, 0 ) - ( roundIncrement == 0 );
+ }
+ if ( zExp < 0 ) {
+ isTiny =
+ ( float_detect_tininess == float_tininess_before_rounding )
+ || ( zExp < -1 )
+ || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );
+ shift64RightJamming( zSig, - zExp, &zSig );
+ zExp = 0;
+ roundBits = zSig & 0x3FF;
+ if ( isTiny && roundBits ) float_raise( float_flag_underflow );
+ }
+ }
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;
+ zSig = ( zSig + roundIncrement )>>10;
+ zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );
+ if ( zSig == 0 ) zExp = 0;
+ return packFloat64( zSign, zExp, zSig );
}
@@ -471,12 +471,12 @@ static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
*----------------------------------------------------------------------------*/
static float64
- normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
+ normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )
{
- int8 shiftCount;
+ int8 shiftCount;
- shiftCount = countLeadingZeros64( zSig ) - 1;
- return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount );
+ shiftCount = countLeadingZeros64( zSig ) - 1;
+ return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount );
}
@@ -490,13 +490,13 @@ static float64
*----------------------------------------------------------------------------*/
static void
- normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr )
+ normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr )
{
- int8 shiftCount;
+ int8 shiftCount;
- shiftCount = countLeadingZeros64( aSig );
- *zSigPtr = aSig<<shiftCount;
- *zExpPtr = 1 - shiftCount;
+ shiftCount = countLeadingZeros64( aSig );
+ *zSigPtr = aSig<<shiftCount;
+ *zExpPtr = 1 - shiftCount;
}
@@ -527,161 +527,161 @@ static void
// roundAndPackFloatx80 is now also used in fyl2x.c
/* static */ floatx80
- roundAndPackFloatx80(
- int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
- )
+ roundAndPackFloatx80(
+ int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
+ )
{
- int8 roundingMode;
- flag roundNearestEven, increment, isTiny;
- int64 roundIncrement, roundMask, roundBits;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = ( roundingMode == float_round_nearest_even );
- if ( roundingPrecision == 80 ) goto precision80;
- if ( roundingPrecision == 64 ) {
- roundIncrement = LIT64( 0x0000000000000400 );
- roundMask = LIT64( 0x00000000000007FF );
- }
- else if ( roundingPrecision == 32 ) {
- roundIncrement = LIT64( 0x0000008000000000 );
- roundMask = LIT64( 0x000000FFFFFFFFFF );
- }
- else {
- goto precision80;
- }
- zSig0 |= ( zSig1 != 0 );
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- roundIncrement = 0;
- }
- else {
- roundIncrement = roundMask;
- if ( zSign ) {
- if ( roundingMode == float_round_up ) roundIncrement = 0;
- }
- else {
- if ( roundingMode == float_round_down ) roundIncrement = 0;
- }
- }
- }
- roundBits = zSig0 & roundMask;
- if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
- if ( ( 0x7FFE < zExp )
- || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )
- ) {
- goto overflow;
- }
- if ( zExp <= 0 ) {
- isTiny =
- ( float_detect_tininess == float_tininess_before_rounding )
- || ( zExp < 0 )
- || ( zSig0 <= zSig0 + roundIncrement );
- shift64RightJamming( zSig0, 1 - zExp, &zSig0 );
- zExp = 0;
- roundBits = zSig0 & roundMask;
- if ( isTiny && roundBits ) float_raise( float_flag_underflow );
- if ( roundBits ) float_exception_flags |= float_flag_inexact;
- zSig0 += roundIncrement;
- if ( (sbits64) zSig0 < 0 ) zExp = 1;
- roundIncrement = roundMask + 1;
- if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
- roundMask |= roundIncrement;
- }
- zSig0 &= ~ roundMask;
- return packFloatx80( zSign, zExp, zSig0 );
- }
- }
- if ( roundBits ) float_exception_flags |= float_flag_inexact;
- zSig0 += roundIncrement;
- if ( zSig0 < roundIncrement ) {
- ++zExp;
- zSig0 = LIT64( 0x8000000000000000 );
- }
- roundIncrement = roundMask + 1;
- if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
- roundMask |= roundIncrement;
- }
- zSig0 &= ~ roundMask;
- if ( zSig0 == 0 ) zExp = 0;
- return packFloatx80( zSign, zExp, zSig0 );
- precision80:
- increment = ( (sbits64) zSig1 < 0 );
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- increment = 0;
- }
- else {
- if ( zSign ) {
- increment = ( roundingMode == float_round_down ) && zSig1;
- }
- else {
- increment = ( roundingMode == float_round_up ) && zSig1;
- }
- }
- }
- if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
- if ( ( 0x7FFE < zExp )
- || ( ( zExp == 0x7FFE )
- && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
- && increment
- )
- ) {
- roundMask = 0;
- overflow:
- float_raise( float_flag_overflow | float_flag_inexact );
- if ( ( roundingMode == float_round_to_zero )
- || ( zSign && ( roundingMode == float_round_up ) )
- || ( ! zSign && ( roundingMode == float_round_down ) )
- ) {
- return packFloatx80( zSign, 0x7FFE, ~ roundMask );
- }
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( zExp <= 0 ) {
- isTiny =
- ( float_detect_tininess == float_tininess_before_rounding )
- || ( zExp < 0 )
- || ! increment
- || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );
- shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
- zExp = 0;
- if ( isTiny && zSig1 ) float_raise( float_flag_underflow );
- if ( zSig1 ) float_exception_flags |= float_flag_inexact;
- if ( roundNearestEven ) {
- increment = ( (sbits64) zSig1 < 0 );
- }
- else {
- if ( zSign ) {
- increment = ( roundingMode == float_round_down ) && zSig1;
- }
- else {
- increment = ( roundingMode == float_round_up ) && zSig1;
- }
- }
- if ( increment ) {
- ++zSig0;
- zSig0 &=
- ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
- if ( (sbits64) zSig0 < 0 ) zExp = 1;
- }
- return packFloatx80( zSign, zExp, zSig0 );
- }
- }
- if ( zSig1 ) float_exception_flags |= float_flag_inexact;
- if ( increment ) {
- ++zSig0;
- if ( zSig0 == 0 ) {
- ++zExp;
- zSig0 = LIT64( 0x8000000000000000 );
- }
- else {
- zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
- }
- }
- else {
- if ( zSig0 == 0 ) zExp = 0;
- }
- return packFloatx80( zSign, zExp, zSig0 );
+ int8 roundingMode;
+ flag roundNearestEven, increment, isTiny;
+ int64 roundIncrement, roundMask, roundBits;
+
+ roundingMode = float_rounding_mode;
+ roundNearestEven = ( roundingMode == float_round_nearest_even );
+ if ( roundingPrecision == 80 ) goto precision80;
+ if ( roundingPrecision == 64 ) {
+ roundIncrement = LIT64( 0x0000000000000400 );
+ roundMask = LIT64( 0x00000000000007FF );
+ }
+ else if ( roundingPrecision == 32 ) {
+ roundIncrement = LIT64( 0x0000008000000000 );
+ roundMask = LIT64( 0x000000FFFFFFFFFF );
+ }
+ else {
+ goto precision80;
+ }
+ zSig0 |= ( zSig1 != 0 );
+ if ( ! roundNearestEven ) {
+ if ( roundingMode == float_round_to_zero ) {
+ roundIncrement = 0;
+ }
+ else {
+ roundIncrement = roundMask;
+ if ( zSign ) {
+ if ( roundingMode == float_round_up ) roundIncrement = 0;
+ }
+ else {
+ if ( roundingMode == float_round_down ) roundIncrement = 0;
+ }
+ }
+ }
+ roundBits = zSig0 & roundMask;
+ if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
+ if ( ( 0x7FFE < zExp )
+ || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )
+ ) {
+ goto overflow;
+ }
+ if ( zExp <= 0 ) {
+ isTiny =
+ ( float_detect_tininess == float_tininess_before_rounding )
+ || ( zExp < 0 )
+ || ( zSig0 <= zSig0 + roundIncrement );
+ shift64RightJamming( zSig0, 1 - zExp, &zSig0 );
+ zExp = 0;
+ roundBits = zSig0 & roundMask;
+ if ( isTiny && roundBits ) float_raise( float_flag_underflow );
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;
+ zSig0 += roundIncrement;
+ if ( (sbits64) zSig0 < 0 ) zExp = 1;
+ roundIncrement = roundMask + 1;
+ if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
+ roundMask |= roundIncrement;
+ }
+ zSig0 &= ~ roundMask;
+ return packFloatx80( zSign, zExp, zSig0 );
+ }
+ }
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;
+ zSig0 += roundIncrement;
+ if ( zSig0 < roundIncrement ) {
+ ++zExp;
+ zSig0 = LIT64( 0x8000000000000000 );
+ }
+ roundIncrement = roundMask + 1;
+ if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {
+ roundMask |= roundIncrement;
+ }
+ zSig0 &= ~ roundMask;
+ if ( zSig0 == 0 ) zExp = 0;
+ return packFloatx80( zSign, zExp, zSig0 );
+ precision80:
+ increment = ( (sbits64) zSig1 < 0 );
+ if ( ! roundNearestEven ) {
+ if ( roundingMode == float_round_to_zero ) {
+ increment = 0;
+ }
+ else {
+ if ( zSign ) {
+ increment = ( roundingMode == float_round_down ) && zSig1;
+ }
+ else {
+ increment = ( roundingMode == float_round_up ) && zSig1;
+ }
+ }
+ }
+ if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {
+ if ( ( 0x7FFE < zExp )
+ || ( ( zExp == 0x7FFE )
+ && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )
+ && increment
+ )
+ ) {
+ roundMask = 0;
+ overflow:
+ float_raise( float_flag_overflow | float_flag_inexact );
+ if ( ( roundingMode == float_round_to_zero )
+ || ( zSign && ( roundingMode == float_round_up ) )
+ || ( ! zSign && ( roundingMode == float_round_down ) )
+ ) {
+ return packFloatx80( zSign, 0x7FFE, ~ roundMask );
+ }
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( zExp <= 0 ) {
+ isTiny =
+ ( float_detect_tininess == float_tininess_before_rounding )
+ || ( zExp < 0 )
+ || ! increment
+ || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );
+ shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );
+ zExp = 0;
+ if ( isTiny && zSig1 ) float_raise( float_flag_underflow );
+ if ( zSig1 ) float_exception_flags |= float_flag_inexact;
+ if ( roundNearestEven ) {
+ increment = ( (sbits64) zSig1 < 0 );
+ }
+ else {
+ if ( zSign ) {
+ increment = ( roundingMode == float_round_down ) && zSig1;
+ }
+ else {
+ increment = ( roundingMode == float_round_up ) && zSig1;
+ }
+ }
+ if ( increment ) {
+ ++zSig0;
+ zSig0 &=
+ ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
+ if ( (sbits64) zSig0 < 0 ) zExp = 1;
+ }
+ return packFloatx80( zSign, zExp, zSig0 );
+ }
+ }
+ if ( zSig1 ) float_exception_flags |= float_flag_inexact;
+ if ( increment ) {
+ ++zSig0;
+ if ( zSig0 == 0 ) {
+ ++zExp;
+ zSig0 = LIT64( 0x8000000000000000 );
+ }
+ else {
+ zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );
+ }
+ }
+ else {
+ if ( zSig0 == 0 ) zExp = 0;
+ }
+ return packFloatx80( zSign, zExp, zSig0 );
}
@@ -695,22 +695,22 @@ static void
*----------------------------------------------------------------------------*/
static floatx80
- normalizeRoundAndPackFloatx80(
- int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
- )
+ normalizeRoundAndPackFloatx80(
+ int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1
+ )
{
- int8 shiftCount;
-
- if ( zSig0 == 0 ) {
- zSig0 = zSig1;
- zSig1 = 0;
- zExp -= 64;
- }
- shiftCount = countLeadingZeros64( zSig0 );
- shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
- zExp -= shiftCount;
- return
- roundAndPackFloatx80( roundingPrecision, zSign, zExp, zSig0, zSig1 );
+ int8 shiftCount;
+
+ if ( zSig0 == 0 ) {
+ zSig0 = zSig1;
+ zSig1 = 0;
+ zExp -= 64;
+ }
+ shiftCount = countLeadingZeros64( zSig0 );
+ shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
+ zExp -= shiftCount;
+ return
+ roundAndPackFloatx80( roundingPrecision, zSign, zExp, zSig0, zSig1 );
}
@@ -726,7 +726,7 @@ static floatx80
INLINE bits64 extractFloat128Frac1( float128 a )
{
- return a.low;
+ return a.low;
}
@@ -738,7 +738,7 @@ INLINE bits64 extractFloat128Frac1( float128 a )
INLINE bits64 extractFloat128Frac0( float128 a )
{
- return a.high & LIT64( 0x0000FFFFFFFFFFFF );
+ return a.high & LIT64( 0x0000FFFFFFFFFFFF );
}
@@ -750,7 +750,7 @@ INLINE bits64 extractFloat128Frac0( float128 a )
INLINE int32 extractFloat128Exp( float128 a )
{
- return ( a.high>>48 ) & 0x7FFF;
+ return ( a.high>>48 ) & 0x7FFF;
}
@@ -761,7 +761,7 @@ INLINE int32 extractFloat128Exp( float128 a )
INLINE flag extractFloat128Sign( float128 a )
{
- return a.high>>63;
+ return a.high>>63;
}
@@ -776,33 +776,33 @@ INLINE flag extractFloat128Sign( float128 a )
*----------------------------------------------------------------------------*/
static void
- normalizeFloat128Subnormal(
- bits64 aSig0,
- bits64 aSig1,
- int32 *zExpPtr,
- bits64 *zSig0Ptr,
- bits64 *zSig1Ptr
- )
+ normalizeFloat128Subnormal(
+ bits64 aSig0,
+ bits64 aSig1,
+ int32 *zExpPtr,
+ bits64 *zSig0Ptr,
+ bits64 *zSig1Ptr
+ )
{
- int8 shiftCount;
-
- if ( aSig0 == 0 ) {
- shiftCount = countLeadingZeros64( aSig1 ) - 15;
- if ( shiftCount < 0 ) {
- *zSig0Ptr = aSig1>>( - shiftCount );
- *zSig1Ptr = aSig1<<( shiftCount & 63 );
- }
- else {
- *zSig0Ptr = aSig1<<shiftCount;
- *zSig1Ptr = 0;
- }
- *zExpPtr = - shiftCount - 63;
- }
- else {
- shiftCount = countLeadingZeros64( aSig0 ) - 15;
- shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
- *zExpPtr = 1 - shiftCount;
- }
+ int8 shiftCount;
+
+ if ( aSig0 == 0 ) {
+ shiftCount = countLeadingZeros64( aSig1 ) - 15;
+ if ( shiftCount < 0 ) {
+ *zSig0Ptr = aSig1>>( - shiftCount );
+ *zSig1Ptr = aSig1<<( shiftCount & 63 );
+ }
+ else {
+ *zSig0Ptr = aSig1<<shiftCount;
+ *zSig1Ptr = 0;
+ }
+ *zExpPtr = - shiftCount - 63;
+ }
+ else {
+ shiftCount = countLeadingZeros64( aSig0 ) - 15;
+ shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );
+ *zExpPtr = 1 - shiftCount;
+ }
}
@@ -816,12 +816,12 @@ static void
float32 int32_to_float32( int32 a )
{
- flag zSign;
+ flag zSign;
- if ( a == 0 ) return 0;
- if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
- zSign = ( a < 0 );
- return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a );
+ if ( a == 0 ) return 0;
+ if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );
+ zSign = ( a < 0 );
+ return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a );
}
@@ -833,17 +833,17 @@ float32 int32_to_float32( int32 a )
float64 int32_to_float64( int32 a )
{
- flag zSign;
- uint32 absA;
- int8 shiftCount;
- bits64 zSig;
-
- if ( a == 0 ) return 0;
- zSign = ( a < 0 );
- absA = zSign ? - a : a;
- shiftCount = countLeadingZeros32( absA ) + 21;
- zSig = absA;
- return packFloat64( zSign, 0x432 - shiftCount, zSig<<shiftCount );
+ flag zSign;
+ uint32 absA;
+ int8 shiftCount;
+ bits64 zSig;
+
+ if ( a == 0 ) return 0;
+ zSign = ( a < 0 );
+ absA = zSign ? - a : a;
+ shiftCount = countLeadingZeros32( absA ) + 21;
+ zSig = absA;
+ return packFloat64( zSign, 0x432 - shiftCount, zSig<<shiftCount );
}
@@ -858,17 +858,17 @@ float64 int32_to_float64( int32 a )
floatx80 int32_to_floatx80( int32 a )
{
- flag zSign;
- uint32 absA;
- int8 shiftCount;
- bits64 zSig;
-
- if ( a == 0 ) return packFloatx80( 0, 0, 0 );
- zSign = ( a < 0 );
- absA = zSign ? - a : a;
- shiftCount = countLeadingZeros32( absA ) + 32;
- zSig = absA;
- return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );
+ flag zSign;
+ uint32 absA;
+ int8 shiftCount;
+ bits64 zSig;
+
+ if ( a == 0 ) return packFloatx80( 0, 0, 0 );
+ zSign = ( a < 0 );
+ absA = zSign ? - a : a;
+ shiftCount = countLeadingZeros32( absA ) + 32;
+ zSig = absA;
+ return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );
}
@@ -884,17 +884,17 @@ floatx80 int32_to_floatx80( int32 a )
float128 int32_to_float128( int32 a )
{
- flag zSign;
- uint32 absA;
- int8 shiftCount;
- bits64 zSig0;
-
- if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
- zSign = ( a < 0 );
- absA = zSign ? - a : a;
- shiftCount = countLeadingZeros32( absA ) + 17;
- zSig0 = absA;
- return packFloat128( zSign, 0x402E - shiftCount, zSig0<<shiftCount, 0 );
+ flag zSign;
+ uint32 absA;
+ int8 shiftCount;
+ bits64 zSig0;
+
+ if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
+ zSign = ( a < 0 );
+ absA = zSign ? - a : a;
+ shiftCount = countLeadingZeros32( absA ) + 17;
+ zSig0 = absA;
+ return packFloat128( zSign, 0x402E - shiftCount, zSig0<<shiftCount, 0 );
}
@@ -908,28 +908,28 @@ float128 int32_to_float128( int32 a )
float32 int64_to_float32( int64 a )
{
- flag zSign;
- uint64 absA;
- int8 shiftCount;
+ flag zSign;
+ uint64 absA;
+ int8 shiftCount;
// bits32 zSig;
- if ( a == 0 ) return 0;
- zSign = ( a < 0 );
- absA = zSign ? - a : a;
- shiftCount = countLeadingZeros64( absA ) - 40;
- if ( 0 <= shiftCount ) {
- return packFloat32( zSign, 0x95 - shiftCount, absA<<shiftCount );
- }
- else {
- shiftCount += 7;
- if ( shiftCount < 0 ) {
- shift64RightJamming( absA, - shiftCount, &absA );
- }
- else {
- absA <<= shiftCount;
- }
- return roundAndPackFloat32( zSign, 0x9C - shiftCount, absA );
- }
+ if ( a == 0 ) return 0;
+ zSign = ( a < 0 );
+ absA = zSign ? - a : a;
+ shiftCount = countLeadingZeros64( absA ) - 40;
+ if ( 0 <= shiftCount ) {
+ return packFloat32( zSign, 0x95 - shiftCount, absA<<shiftCount );
+ }
+ else {
+ shiftCount += 7;
+ if ( shiftCount < 0 ) {
+ shift64RightJamming( absA, - shiftCount, &absA );
+ }
+ else {
+ absA <<= shiftCount;
+ }
+ return roundAndPackFloat32( zSign, 0x9C - shiftCount, absA );
+ }
}
@@ -941,14 +941,14 @@ float32 int64_to_float32( int64 a )
float64 int64_to_float64( int64 a )
{
- flag zSign;
+ flag zSign;
- if ( a == 0 ) return 0;
- if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) {
- return packFloat64( 1, 0x43E, 0 );
- }
- zSign = ( a < 0 );
- return normalizeRoundAndPackFloat64( zSign, 0x43C, zSign ? - a : a );
+ if ( a == 0 ) return 0;
+ if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) {
+ return packFloat64( 1, 0x43E, 0 );
+ }
+ zSign = ( a < 0 );
+ return normalizeRoundAndPackFloat64( zSign, 0x43C, zSign ? - a : a );
}
@@ -963,15 +963,15 @@ float64 int64_to_float64( int64 a )
floatx80 int64_to_floatx80( int64 a )
{
- flag zSign;
- uint64 absA;
- int8 shiftCount;
+ flag zSign;
+ uint64 absA;
+ int8 shiftCount;
- if ( a == 0 ) return packFloatx80( 0, 0, 0 );
- zSign = ( a < 0 );
- absA = zSign ? - a : a;
- shiftCount = countLeadingZeros64( absA );
- return packFloatx80( zSign, 0x403E - shiftCount, absA<<shiftCount );
+ if ( a == 0 ) return packFloatx80( 0, 0, 0 );
+ zSign = ( a < 0 );
+ absA = zSign ? - a : a;
+ shiftCount = countLeadingZeros64( absA );
+ return packFloatx80( zSign, 0x403E - shiftCount, absA<<shiftCount );
}
@@ -987,28 +987,28 @@ floatx80 int64_to_floatx80( int64 a )
float128 int64_to_float128( int64 a )
{
- flag zSign;
- uint64 absA;
- int8 shiftCount;
- int32 zExp;
- bits64 zSig0, zSig1;
-
- if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
- zSign = ( a < 0 );
- absA = zSign ? - a : a;
- shiftCount = countLeadingZeros64( absA ) + 49;
- zExp = 0x406E - shiftCount;
- if ( 64 <= shiftCount ) {
- zSig1 = 0;
- zSig0 = absA;
- shiftCount -= 64;
- }
- else {
- zSig1 = absA;
- zSig0 = 0;
- }
- shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
- return packFloat128( zSign, zExp, zSig0, zSig1 );
+ flag zSign;
+ uint64 absA;
+ int8 shiftCount;
+ int32 zExp;
+ bits64 zSig0, zSig1;
+
+ if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );
+ zSign = ( a < 0 );
+ absA = zSign ? - a : a;
+ shiftCount = countLeadingZeros64( absA ) + 49;
+ zExp = 0x406E - shiftCount;
+ if ( 64 <= shiftCount ) {
+ zSig1 = 0;
+ zSig0 = absA;
+ shiftCount -= 64;
+ }
+ else {
+ zSig1 = absA;
+ zSig0 = 0;
+ }
+ shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
+ return packFloat128( zSign, zExp, zSig0, zSig1 );
}
@@ -1026,21 +1026,21 @@ float128 int64_to_float128( int64 a )
int32 float32_to_int32( float32 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- if ( ( aExp == 0xFF ) && aSig ) aSign = 0;
- if ( aExp ) aSig |= 0x00800000;
- shiftCount = 0xAF - aExp;
- aSig64 = aSig;
- aSig64 <<= 32;
- if ( 0 < shiftCount ) shift64RightJamming( aSig64, shiftCount, &aSig64 );
- return roundAndPackInt32( aSign, aSig64 );
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits32 aSig;
+ bits64 aSig64;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ if ( ( aExp == 0xFF ) && aSig ) aSign = 0;
+ if ( aExp ) aSig |= 0x00800000;
+ shiftCount = 0xAF - aExp;
+ aSig64 = aSig;
+ aSig64 <<= 32;
+ if ( 0 < shiftCount ) shift64RightJamming( aSig64, shiftCount, &aSig64 );
+ return roundAndPackInt32( aSign, aSig64 );
}
@@ -1056,33 +1056,33 @@ int32 float32_to_int32( float32 a )
int32 float32_to_int32_round_to_zero( float32 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig;
- int32 z;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- shiftCount = aExp - 0x9E;
- if ( 0 <= shiftCount ) {
- if ( a != 0xCF000000 ) {
- float_raise( float_flag_invalid );
- if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;
- }
- return (sbits32) 0x80000000;
- }
- else if ( aExp <= 0x7E ) {
- if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
- return 0;
- }
- aSig = ( aSig | 0x00800000 )<<8;
- z = aSig>>( - shiftCount );
- if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
- float_exception_flags |= float_flag_inexact;
- }
- if ( aSign ) z = - z;
- return z;
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits32 aSig;
+ int32 z;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ shiftCount = aExp - 0x9E;
+ if ( 0 <= shiftCount ) {
+ if ( a != 0xCF000000 ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;
+ }
+ return (sbits32) 0x80000000;
+ }
+ else if ( aExp <= 0x7E ) {
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
+ return 0;
+ }
+ aSig = ( aSig | 0x00800000 )<<8;
+ z = aSig>>( - shiftCount );
+ if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ if ( aSign ) z = - z;
+ return z;
}
@@ -1098,27 +1098,27 @@ int32 float32_to_int32_round_to_zero( float32 a )
int64 float32_to_int64( float32 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64, aSigExtra;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- shiftCount = 0xBE - aExp;
- if ( shiftCount < 0 ) {
- float_raise( float_flag_invalid );
- if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- if ( aExp ) aSig |= 0x00800000;
- aSig64 = aSig;
- aSig64 <<= 40;
- shift64ExtraRightJamming( aSig64, 0, shiftCount, &aSig64, &aSigExtra );
- return roundAndPackInt64( aSign, aSig64, aSigExtra );
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits32 aSig;
+ bits64 aSig64, aSigExtra;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ shiftCount = 0xBE - aExp;
+ if ( shiftCount < 0 ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ if ( aExp ) aSig |= 0x00800000;
+ aSig64 = aSig;
+ aSig64 <<= 40;
+ shift64ExtraRightJamming( aSig64, 0, shiftCount, &aSig64, &aSigExtra );
+ return roundAndPackInt64( aSign, aSig64, aSigExtra );
}
@@ -1134,37 +1134,37 @@ int64 float32_to_int64( float32 a )
int64 float32_to_int64_round_to_zero( float32 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits32 aSig;
- bits64 aSig64;
- int64 z;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- shiftCount = aExp - 0xBE;
- if ( 0 <= shiftCount ) {
- if ( a != 0xDF000000 ) {
- float_raise( float_flag_invalid );
- if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- else if ( aExp <= 0x7E ) {
- if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
- return 0;
- }
- aSig64 = aSig | 0x00800000;
- aSig64 <<= 40;
- z = aSig64>>( - shiftCount );
- if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) {
- float_exception_flags |= float_flag_inexact;
- }
- if ( aSign ) z = - z;
- return z;
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits32 aSig;
+ bits64 aSig64;
+ int64 z;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ shiftCount = aExp - 0xBE;
+ if ( 0 <= shiftCount ) {
+ if ( a != 0xDF000000 ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ else if ( aExp <= 0x7E ) {
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
+ return 0;
+ }
+ aSig64 = aSig | 0x00800000;
+ aSig64 <<= 40;
+ z = aSig64>>( - shiftCount );
+ if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ if ( aSign ) z = - z;
+ return z;
}
@@ -1177,23 +1177,23 @@ int64 float32_to_int64_round_to_zero( float32 a )
float64 float32_to_float64( float32 a )
{
- flag aSign;
- int16 aExp;
- bits32 aSig;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- if ( aExp == 0xFF ) {
- if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a ) );
- return packFloat64( aSign, 0x7FF, 0 );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat64( aSign, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- --aExp;
- }
- return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 );
+ flag aSign;
+ int16 aExp;
+ bits32 aSig;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ if ( aExp == 0xFF ) {
+ if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a ) );
+ return packFloat64( aSign, 0x7FF, 0 );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloat64( aSign, 0, 0 );
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );
+ --aExp;
+ }
+ return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 );
}
@@ -1208,23 +1208,23 @@ float64 float32_to_float64( float32 a )
floatx80 float32_to_floatx80( float32 a )
{
- flag aSign;
- int16 aExp;
- bits32 aSig;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- if ( aExp == 0xFF ) {
- if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a ) );
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- aSig |= 0x00800000;
- return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 );
+ flag aSign;
+ int16 aExp;
+ bits32 aSig;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ if ( aExp == 0xFF ) {
+ if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a ) );
+ return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );
+ }
+ aSig |= 0x00800000;
+ return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 );
}
@@ -1241,23 +1241,23 @@ floatx80 float32_to_floatx80( float32 a )
float128 float32_to_float128( float32 a )
{
- flag aSign;
- int16 aExp;
- bits32 aSig;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- if ( aExp == 0xFF ) {
- if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a ) );
- return packFloat128( aSign, 0x7FFF, 0, 0 );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- --aExp;
- }
- return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 );
+ flag aSign;
+ int16 aExp;
+ bits32 aSig;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ if ( aExp == 0xFF ) {
+ if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a ) );
+ return packFloat128( aSign, 0x7FFF, 0, 0 );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );
+ --aExp;
+ }
+ return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 );
}
@@ -1272,53 +1272,53 @@ float128 float32_to_float128( float32 a )
float32 float32_round_to_int( float32 a )
{
- flag aSign;
- int16 aExp;
- bits32 lastBitMask, roundBitsMask;
- int8 roundingMode;
- float32 z;
-
- aExp = extractFloat32Exp( a );
- if ( 0x96 <= aExp ) {
- if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {
- return propagateFloat32NaN( a, a );
- }
- return a;
- }
- if ( aExp <= 0x7E ) {
- if ( (bits32) ( a<<1 ) == 0 ) return a;
- float_exception_flags |= float_flag_inexact;
- aSign = extractFloat32Sign( a );
- switch ( float_rounding_mode ) {
- case float_round_nearest_even:
- if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {
- return packFloat32( aSign, 0x7F, 0 );
- }
- break;
- case float_round_down:
- return aSign ? 0xBF800000 : 0;
- case float_round_up:
- return aSign ? 0x80000000 : 0x3F800000;
- }
- return packFloat32( aSign, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x96 - aExp;
- roundBitsMask = lastBitMask - 1;
- z = a;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- z += lastBitMask>>1;
- if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloat32Sign( z ) ^ ( roundingMode == float_round_up ) ) {
- z += roundBitsMask;
- }
- }
- z &= ~ roundBitsMask;
- if ( z != a ) float_exception_flags |= float_flag_inexact;
- return z;
+ flag aSign;
+ int16 aExp;
+ bits32 lastBitMask, roundBitsMask;
+ int8 roundingMode;
+ float32 z;
+
+ aExp = extractFloat32Exp( a );
+ if ( 0x96 <= aExp ) {
+ if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {
+ return propagateFloat32NaN( a, a );
+ }
+ return a;
+ }
+ if ( aExp <= 0x7E ) {
+ if ( (bits32) ( a<<1 ) == 0 ) return a;
+ float_exception_flags |= float_flag_inexact;
+ aSign = extractFloat32Sign( a );
+ switch ( float_rounding_mode ) {
+ case float_round_nearest_even:
+ if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {
+ return packFloat32( aSign, 0x7F, 0 );
+ }
+ break;
+ case float_round_down:
+ return aSign ? 0xBF800000 : 0;
+ case float_round_up:
+ return aSign ? 0x80000000 : 0x3F800000;
+ }
+ return packFloat32( aSign, 0, 0 );
+ }
+ lastBitMask = 1;
+ lastBitMask <<= 0x96 - aExp;
+ roundBitsMask = lastBitMask - 1;
+ z = a;
+ roundingMode = float_rounding_mode;
+ if ( roundingMode == float_round_nearest_even ) {
+ z += lastBitMask>>1;
+ if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;
+ }
+ else if ( roundingMode != float_round_to_zero ) {
+ if ( extractFloat32Sign( z ) ^ ( roundingMode == float_round_up ) ) {
+ z += roundBitsMask;
+ }
+ }
+ z &= ~ roundBitsMask;
+ if ( z != a ) float_exception_flags |= float_flag_inexact;
+ return z;
}
@@ -1332,64 +1332,64 @@ float32 float32_round_to_int( float32 a )
static float32 addFloat32Sigs( float32 a, float32 b, flag zSign )
{
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
- int16 expDiff;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- expDiff = aExp - bExp;
- aSig <<= 6;
- bSig <<= 6;
- if ( 0 < expDiff ) {
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig |= 0x20000000;
- }
- shift32RightJamming( bSig, expDiff, &bSig );
- zExp = aExp;
- }
- else if ( expDiff < 0 ) {
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig |= 0x20000000;
- }
- shift32RightJamming( aSig, - expDiff, &aSig );
- zExp = bExp;
- }
- else {
- if ( aExp == 0xFF ) {
- if ( aSig | bSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( aExp == 0 ) return packFloat32( zSign, 0, ( aSig + bSig )>>6 );
- zSig = 0x40000000 + aSig + bSig;
- zExp = aExp;
- goto roundAndPack;
- }
- aSig |= 0x20000000;
- zSig = ( aSig + bSig )<<1;
- --zExp;
- if ( (sbits32) zSig < 0 ) {
- zSig = aSig + bSig;
- ++zExp;
- }
- roundAndPack:
- return roundAndPackFloat32( zSign, zExp, zSig );
+ int16 aExp, bExp, zExp;
+ bits32 aSig, bSig, zSig;
+ int16 expDiff;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ bSig = extractFloat32Frac( b );
+ bExp = extractFloat32Exp( b );
+ expDiff = aExp - bExp;
+ aSig <<= 6;
+ bSig <<= 6;
+ if ( 0 < expDiff ) {
+ if ( aExp == 0xFF ) {
+ if ( aSig ) return propagateFloat32NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ --expDiff;
+ }
+ else {
+ bSig |= 0x20000000;
+ }
+ shift32RightJamming( bSig, expDiff, &bSig );
+ zExp = aExp;
+ }
+ else if ( expDiff < 0 ) {
+ if ( bExp == 0xFF ) {
+ if ( bSig ) return propagateFloat32NaN( a, b );
+ return packFloat32( zSign, 0xFF, 0 );
+ }
+ if ( aExp == 0 ) {
+ ++expDiff;
+ }
+ else {
+ aSig |= 0x20000000;
+ }
+ shift32RightJamming( aSig, - expDiff, &aSig );
+ zExp = bExp;
+ }
+ else {
+ if ( aExp == 0xFF ) {
+ if ( aSig | bSig ) return propagateFloat32NaN( a, b );
+ return a;
+ }
+ if ( aExp == 0 ) return packFloat32( zSign, 0, ( aSig + bSig )>>6 );
+ zSig = 0x40000000 + aSig + bSig;
+ zExp = aExp;
+ goto roundAndPack;
+ }
+ aSig |= 0x20000000;
+ zSig = ( aSig + bSig )<<1;
+ --zExp;
+ if ( (sbits32) zSig < 0 ) {
+ zSig = aSig + bSig;
+ ++zExp;
+ }
+ roundAndPack:
+ return roundAndPackFloat32( zSign, zExp, zSig );
}
@@ -1403,68 +1403,68 @@ static float32 addFloat32Sigs( float32 a, float32 b, flag zSign )
static float32 subFloat32Sigs( float32 a, float32 b, flag zSign )
{
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
- int16 expDiff;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- expDiff = aExp - bExp;
- aSig <<= 7;
- bSig <<= 7;
- if ( 0 < expDiff ) goto aExpBigger;
- if ( expDiff < 0 ) goto bExpBigger;
- if ( aExp == 0xFF ) {
- if ( aSig | bSig ) return propagateFloat32NaN( a, b );
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( aExp == 0 ) {
- aExp = 1;
- bExp = 1;
- }
- if ( bSig < aSig ) goto aBigger;
- if ( aSig < bSig ) goto bBigger;
- return packFloat32( float_rounding_mode == float_round_down, 0, 0 );
- bExpBigger:
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return packFloat32( zSign ^ 1, 0xFF, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig |= 0x40000000;
- }
- shift32RightJamming( aSig, - expDiff, &aSig );
- bSig |= 0x40000000;
- bBigger:
- zSig = bSig - aSig;
- zExp = bExp;
- zSign ^= 1;
- goto normalizeRoundAndPack;
- aExpBigger:
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig |= 0x40000000;
- }
- shift32RightJamming( bSig, expDiff, &bSig );
- aSig |= 0x40000000;
- aBigger:
- zSig = aSig - bSig;
- zExp = aExp;
- normalizeRoundAndPack:
- --zExp;
- return normalizeRoundAndPackFloat32( zSign, zExp, zSig );
+ int16 aExp, bExp, zExp;
+ bits32 aSig, bSig, zSig;
+ int16 expDiff;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ bSig = extractFloat32Frac( b );
+ bExp = extractFloat32Exp( b );
+ expDiff = aExp - bExp;
+ aSig <<= 7;
+ bSig <<= 7;
+ if ( 0 < expDiff ) goto aExpBigger;
+ if ( expDiff < 0 ) goto bExpBigger;
+ if ( aExp == 0xFF ) {
+ if ( aSig | bSig ) return propagateFloat32NaN( a, b );
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ if ( aExp == 0 ) {
+ aExp = 1;
+ bExp = 1;
+ }
+ if ( bSig < aSig ) goto aBigger;
+ if ( aSig < bSig ) goto bBigger;
+ return packFloat32( float_rounding_mode == float_round_down, 0, 0 );
+ bExpBigger:
+ if ( bExp == 0xFF ) {
+ if ( bSig ) return propagateFloat32NaN( a, b );
+ return packFloat32( zSign ^ 1, 0xFF, 0 );
+ }
+ if ( aExp == 0 ) {
+ ++expDiff;
+ }
+ else {
+ aSig |= 0x40000000;
+ }
+ shift32RightJamming( aSig, - expDiff, &aSig );
+ bSig |= 0x40000000;
+ bBigger:
+ zSig = bSig - aSig;
+ zExp = bExp;
+ zSign ^= 1;
+ goto normalizeRoundAndPack;
+ aExpBigger:
+ if ( aExp == 0xFF ) {
+ if ( aSig ) return propagateFloat32NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ --expDiff;
+ }
+ else {
+ bSig |= 0x40000000;
+ }
+ shift32RightJamming( bSig, expDiff, &bSig );
+ aSig |= 0x40000000;
+ aBigger:
+ zSig = aSig - bSig;
+ zExp = aExp;
+ normalizeRoundAndPack:
+ --zExp;
+ return normalizeRoundAndPackFloat32( zSign, zExp, zSig );
}
@@ -1476,16 +1476,16 @@ static float32 subFloat32Sigs( float32 a, float32 b, flag zSign )
float32 float32_add( float32 a, float32 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign == bSign ) {
- return addFloat32Sigs( a, b, aSign );
- }
- else {
- return subFloat32Sigs( a, b, aSign );
- }
+ aSign = extractFloat32Sign( a );
+ bSign = extractFloat32Sign( b );
+ if ( aSign == bSign ) {
+ return addFloat32Sigs( a, b, aSign );
+ }
+ else {
+ return subFloat32Sigs( a, b, aSign );
+ }
}
@@ -1497,16 +1497,16 @@ float32 float32_add( float32 a, float32 b )
float32 float32_sub( float32 a, float32 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign == bSign ) {
- return subFloat32Sigs( a, b, aSign );
- }
- else {
- return addFloat32Sigs( a, b, aSign );
- }
+ aSign = extractFloat32Sign( a );
+ bSign = extractFloat32Sign( b );
+ if ( aSign == bSign ) {
+ return subFloat32Sigs( a, b, aSign );
+ }
+ else {
+ return addFloat32Sigs( a, b, aSign );
+ }
}
@@ -1518,55 +1518,55 @@ float32 float32_sub( float32 a, float32 b )
float32 float32_mul( float32 a, float32 b )
{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig;
- bits64 zSig64;
- bits32 zSig;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- bSign = extractFloat32Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0xFF ) {
- if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
- return propagateFloat32NaN( a, b );
- }
- if ( ( bExp | bSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- if ( ( aExp | aSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) return packFloat32( zSign, 0, 0 );
- normalizeFloat32Subnormal( bSig, &bExp, &bSig );
- }
- zExp = aExp + bExp - 0x7F;
- aSig = ( aSig | 0x00800000 )<<7;
- bSig = ( bSig | 0x00800000 )<<8;
- shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
- zSig = zSig64;
- if ( 0 <= (sbits32) ( zSig<<1 ) ) {
- zSig <<= 1;
- --zExp;
- }
- return roundAndPackFloat32( zSign, zExp, zSig );
+ flag aSign, bSign, zSign;
+ int16 aExp, bExp, zExp;
+ bits32 aSig, bSig;
+ bits64 zSig64;
+ bits32 zSig;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ bSig = extractFloat32Frac( b );
+ bExp = extractFloat32Exp( b );
+ bSign = extractFloat32Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0xFF ) {
+ if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
+ return propagateFloat32NaN( a, b );
+ }
+ if ( ( bExp | bSig ) == 0 ) {
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ return packFloat32( zSign, 0xFF, 0 );
+ }
+ if ( bExp == 0xFF ) {
+ if ( bSig ) return propagateFloat32NaN( a, b );
+ if ( ( aExp | aSig ) == 0 ) {
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ return packFloat32( zSign, 0xFF, 0 );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) return packFloat32( zSign, 0, 0 );
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );
+ }
+ zExp = aExp + bExp - 0x7F;
+ aSig = ( aSig | 0x00800000 )<<7;
+ bSig = ( bSig | 0x00800000 )<<8;
+ shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );
+ zSig = zSig64;
+ if ( 0 <= (sbits32) ( zSig<<1 ) ) {
+ zSig <<= 1;
+ --zExp;
+ }
+ return roundAndPackFloat32( zSign, zExp, zSig );
}
@@ -1578,57 +1578,57 @@ float32 float32_mul( float32 a, float32 b )
float32 float32_div( float32 a, float32 b )
{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits32 aSig, bSig, zSig;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
- bSign = extractFloat32Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, b );
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- return packFloat32( zSign, 0xFF, 0 );
- }
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return packFloat32( zSign, 0, 0 );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- if ( ( aExp | aSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- float_raise( float_flag_divbyzero );
- return packFloat32( zSign, 0xFF, 0 );
- }
- normalizeFloat32Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- zExp = aExp - bExp + 0x7D;
- aSig = ( aSig | 0x00800000 )<<7;
- bSig = ( bSig | 0x00800000 )<<8;
- if ( bSig <= ( aSig + aSig ) ) {
- aSig >>= 1;
- ++zExp;
- }
- zSig = ( ( (bits64) aSig )<<32 ) / bSig;
- if ( ( zSig & 0x3F ) == 0 ) {
- zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
- }
- return roundAndPackFloat32( zSign, zExp, zSig );
+ flag aSign, bSign, zSign;
+ int16 aExp, bExp, zExp;
+ bits32 aSig, bSig, zSig;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ bSig = extractFloat32Frac( b );
+ bExp = extractFloat32Exp( b );
+ bSign = extractFloat32Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0xFF ) {
+ if ( aSig ) return propagateFloat32NaN( a, b );
+ if ( bExp == 0xFF ) {
+ if ( bSig ) return propagateFloat32NaN( a, b );
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ return packFloat32( zSign, 0xFF, 0 );
+ }
+ if ( bExp == 0xFF ) {
+ if ( bSig ) return propagateFloat32NaN( a, b );
+ return packFloat32( zSign, 0, 0 );
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) {
+ if ( ( aExp | aSig ) == 0 ) {
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ float_raise( float_flag_divbyzero );
+ return packFloat32( zSign, 0xFF, 0 );
+ }
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );
+ }
+ zExp = aExp - bExp + 0x7D;
+ aSig = ( aSig | 0x00800000 )<<7;
+ bSig = ( bSig | 0x00800000 )<<8;
+ if ( bSig <= ( aSig + aSig ) ) {
+ aSig >>= 1;
+ ++zExp;
+ }
+ zSig = ( ( (bits64) aSig )<<32 ) / bSig;
+ if ( ( zSig & 0x3F ) == 0 ) {
+ zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );
+ }
+ return roundAndPackFloat32( zSign, zExp, zSig );
}
@@ -1640,95 +1640,95 @@ float32 float32_div( float32 a, float32 b )
float32 float32_rem( float32 a, float32 b )
{
- flag aSign, zSign;
- int16 aExp, bExp, expDiff;
- bits32 aSig, bSig;
- bits32 q;
- bits64 aSig64, bSig64, q64;
- bits32 alternateASig;
- sbits32 sigMean;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- bSig = extractFloat32Frac( b );
- bExp = extractFloat32Exp( b );
+ flag aSign, zSign;
+ int16 aExp, bExp, expDiff;
+ bits32 aSig, bSig;
+ bits32 q;
+ bits64 aSig64, bSig64, q64;
+ bits32 alternateASig;
+ sbits32 sigMean;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ bSig = extractFloat32Frac( b );
+ bExp = extractFloat32Exp( b );
// bSign = extractFloat32Sign( b );
- if ( aExp == 0xFF ) {
- if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
- return propagateFloat32NaN( a, b );
- }
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( bExp == 0xFF ) {
- if ( bSig ) return propagateFloat32NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- normalizeFloat32Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return a;
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- expDiff = aExp - bExp;
- aSig |= 0x00800000;
- bSig |= 0x00800000;
- if ( expDiff < 32 ) {
- aSig <<= 8;
- bSig <<= 8;
- if ( expDiff < 0 ) {
- if ( expDiff < -1 ) return a;
- aSig >>= 1;
- }
- q = ( bSig <= aSig );
- if ( q ) aSig -= bSig;
- if ( 0 < expDiff ) {
- q = ( ( (bits64) aSig )<<32 ) / bSig;
- q >>= 32 - expDiff;
- bSig >>= 2;
- aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
- }
- else {
- aSig >>= 2;
- bSig >>= 2;
- }
- }
- else {
- if ( bSig <= aSig ) aSig -= bSig;
- aSig64 = ( (bits64) aSig )<<40;
- bSig64 = ( (bits64) bSig )<<40;
- expDiff -= 64;
- while ( 0 < expDiff ) {
- q64 = estimateDiv128To64( aSig64, 0, bSig64 );
- q64 = ( 2 < q64 ) ? q64 - 2 : 0;
- aSig64 = - ( ( bSig * q64 )<<38 );
- expDiff -= 62;
- }
- expDiff += 64;
- q64 = estimateDiv128To64( aSig64, 0, bSig64 );
- q64 = ( 2 < q64 ) ? q64 - 2 : 0;
- q = q64>>( 64 - expDiff );
- bSig <<= 6;
- aSig = ( ( aSig64>>33 )<<( expDiff - 1 ) ) - bSig * q;
- }
- do {
- alternateASig = aSig;
- ++q;
- aSig -= bSig;
- } while ( 0 <= (sbits32) aSig );
- sigMean = aSig + alternateASig;
- if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
- aSig = alternateASig;
- }
- zSign = ( (sbits32) aSig < 0 );
- if ( zSign ) aSig = - aSig;
- return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig );
+ if ( aExp == 0xFF ) {
+ if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {
+ return propagateFloat32NaN( a, b );
+ }
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ if ( bExp == 0xFF ) {
+ if ( bSig ) return propagateFloat32NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) {
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return a;
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );
+ }
+ expDiff = aExp - bExp;
+ aSig |= 0x00800000;
+ bSig |= 0x00800000;
+ if ( expDiff < 32 ) {
+ aSig <<= 8;
+ bSig <<= 8;
+ if ( expDiff < 0 ) {
+ if ( expDiff < -1 ) return a;
+ aSig >>= 1;
+ }
+ q = ( bSig <= aSig );
+ if ( q ) aSig -= bSig;
+ if ( 0 < expDiff ) {
+ q = ( ( (bits64) aSig )<<32 ) / bSig;
+ q >>= 32 - expDiff;
+ bSig >>= 2;
+ aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
+ }
+ else {
+ aSig >>= 2;
+ bSig >>= 2;
+ }
+ }
+ else {
+ if ( bSig <= aSig ) aSig -= bSig;
+ aSig64 = ( (bits64) aSig )<<40;
+ bSig64 = ( (bits64) bSig )<<40;
+ expDiff -= 64;
+ while ( 0 < expDiff ) {
+ q64 = estimateDiv128To64( aSig64, 0, bSig64 );
+ q64 = ( 2 < q64 ) ? q64 - 2 : 0;
+ aSig64 = - ( ( bSig * q64 )<<38 );
+ expDiff -= 62;
+ }
+ expDiff += 64;
+ q64 = estimateDiv128To64( aSig64, 0, bSig64 );
+ q64 = ( 2 < q64 ) ? q64 - 2 : 0;
+ q = q64>>( 64 - expDiff );
+ bSig <<= 6;
+ aSig = ( ( aSig64>>33 )<<( expDiff - 1 ) ) - bSig * q;
+ }
+ do {
+ alternateASig = aSig;
+ ++q;
+ aSig -= bSig;
+ } while ( 0 <= (sbits32) aSig );
+ sigMean = aSig + alternateASig;
+ if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
+ aSig = alternateASig;
+ }
+ zSign = ( (sbits32) aSig < 0 );
+ if ( zSign ) aSig = - aSig;
+ return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig );
}
@@ -1740,49 +1740,49 @@ float32 float32_rem( float32 a, float32 b )
float32 float32_sqrt( float32 a )
{
- flag aSign;
- int16 aExp, zExp;
- bits32 aSig, zSig;
- bits64 rem, term;
-
- aSig = extractFloat32Frac( a );
- aExp = extractFloat32Exp( a );
- aSign = extractFloat32Sign( a );
- if ( aExp == 0xFF ) {
- if ( aSig ) return propagateFloat32NaN( a, 0 );
- if ( ! aSign ) return a;
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( aSign ) {
- if ( ( aExp | aSig ) == 0 ) return a;
- float_raise( float_flag_invalid );
- return float32_default_nan;
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return 0;
- normalizeFloat32Subnormal( aSig, &aExp, &aSig );
- }
- zExp = ( ( aExp - 0x7F )>>1 ) + 0x7E;
- aSig = ( aSig | 0x00800000 )<<8;
- zSig = estimateSqrt32( aExp, aSig ) + 2;
- if ( ( zSig & 0x7F ) <= 5 ) {
- if ( zSig < 2 ) {
- zSig = 0x7FFFFFFF;
- goto roundAndPack;
- }
- aSig >>= aExp & 1;
- term = ( (bits64) zSig ) * zSig;
- rem = ( ( (bits64) aSig )<<32 ) - term;
- while ( (sbits64) rem < 0 ) {
- --zSig;
- rem += ( ( (bits64) zSig )<<1 ) | 1;
- }
- zSig |= ( rem != 0 );
- }
- shift32RightJamming( zSig, 1, &zSig );
- roundAndPack:
- return roundAndPackFloat32( 0, zExp, zSig );
+ flag aSign;
+ int16 aExp, zExp;
+ bits32 aSig, zSig;
+ bits64 rem, term;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ if ( aExp == 0xFF ) {
+ if ( aSig ) return propagateFloat32NaN( a, 0 );
+ if ( ! aSign ) return a;
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ if ( aSign ) {
+ if ( ( aExp | aSig ) == 0 ) return a;
+ float_raise( float_flag_invalid );
+ return float32_default_nan;
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return 0;
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );
+ }
+ zExp = ( ( aExp - 0x7F )>>1 ) + 0x7E;
+ aSig = ( aSig | 0x00800000 )<<8;
+ zSig = estimateSqrt32( aExp, aSig ) + 2;
+ if ( ( zSig & 0x7F ) <= 5 ) {
+ if ( zSig < 2 ) {
+ zSig = 0x7FFFFFFF;
+ goto roundAndPack;
+ }
+ aSig >>= aExp & 1;
+ term = ( (bits64) zSig ) * zSig;
+ rem = ( ( (bits64) aSig )<<32 ) - term;
+ while ( (sbits64) rem < 0 ) {
+ --zSig;
+ rem += ( ( (bits64) zSig )<<1 ) | 1;
+ }
+ zSig |= ( rem != 0 );
+ }
+ shift32RightJamming( zSig, 1, &zSig );
+ roundAndPack:
+ return roundAndPackFloat32( 0, zExp, zSig );
}
@@ -1795,15 +1795,15 @@ float32 float32_sqrt( float32 a )
flag float32_eq( float32 a, float32 b )
{
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );
}
@@ -1816,18 +1816,18 @@ flag float32_eq( float32 a, float32 b )
flag float32_le( float32 a, float32 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );
- return ( a == b ) || ( aSign ^ ( a < b ) );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloat32Sign( a );
+ bSign = extractFloat32Sign( b );
+ if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );
+ return ( a == b ) || ( aSign ^ ( a < b ) );
}
@@ -1839,18 +1839,18 @@ flag float32_le( float32 a, float32 b )
flag float32_lt( float32 a, float32 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );
- return ( a != b ) && ( aSign ^ ( a < b ) );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloat32Sign( a );
+ bSign = extractFloat32Sign( b );
+ if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );
+ return ( a != b ) && ( aSign ^ ( a < b ) );
}
@@ -1864,13 +1864,13 @@ flag float32_lt( float32 a, float32 b )
flag float32_eq_signaling( float32 a, float32 b )
{
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );
}
@@ -1883,21 +1883,21 @@ flag float32_eq_signaling( float32 a, float32 b )
flag float32_le_quiet( float32 a, float32 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
// int16 aExp, bExp;
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );
- return ( a == b ) || ( aSign ^ ( a < b ) );
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloat32Sign( a );
+ bSign = extractFloat32Sign( b );
+ if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );
+ return ( a == b ) || ( aSign ^ ( a < b ) );
}
@@ -1910,20 +1910,20 @@ flag float32_le_quiet( float32 a, float32 b )
flag float32_lt_quiet( float32 a, float32 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
- || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
- ) {
- if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat32Sign( a );
- bSign = extractFloat32Sign( b );
- if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );
- return ( a != b ) && ( aSign ^ ( a < b ) );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )
+ ) {
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloat32Sign( a );
+ bSign = extractFloat32Sign( b );
+ if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );
+ return ( a != b ) && ( aSign ^ ( a < b ) );
}
@@ -1939,18 +1939,18 @@ flag float32_lt_quiet( float32 a, float32 b )
int32 float64_to_int32( float64 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits64 aSig;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;
- if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
- shiftCount = 0x42C - aExp;
- if ( 0 < shiftCount ) shift64RightJamming( aSig, shiftCount, &aSig );
- return roundAndPackInt32( aSign, aSig );
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits64 aSig;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;
+ if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
+ shiftCount = 0x42C - aExp;
+ if ( 0 < shiftCount ) shift64RightJamming( aSig, shiftCount, &aSig );
+ return roundAndPackInt32( aSign, aSig );
}
@@ -1966,37 +1966,37 @@ int32 float64_to_int32( float64 a )
int32 float64_to_int32_round_to_zero( float64 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits64 aSig, savedASig;
- int32 z;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( 0x41E < aExp ) {
- if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;
- goto invalid;
- }
- else if ( aExp < 0x3FF ) {
- if ( aExp || aSig ) float_exception_flags |= float_flag_inexact;
- return 0;
- }
- aSig |= LIT64( 0x0010000000000000 );
- shiftCount = 0x433 - aExp;
- savedASig = aSig;
- aSig >>= shiftCount;
- z = aSig;
- if ( aSign ) z = - z;
- if ( ( z < 0 ) ^ aSign ) {
- invalid:
- float_raise( float_flag_invalid );
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
- }
- if ( ( aSig<<shiftCount ) != savedASig ) {
- float_exception_flags |= float_flag_inexact;
- }
- return z;
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits64 aSig, savedASig;
+ int32 z;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( 0x41E < aExp ) {
+ if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;
+ goto invalid;
+ }
+ else if ( aExp < 0x3FF ) {
+ if ( aExp || aSig ) float_exception_flags |= float_flag_inexact;
+ return 0;
+ }
+ aSig |= LIT64( 0x0010000000000000 );
+ shiftCount = 0x433 - aExp;
+ savedASig = aSig;
+ aSig >>= shiftCount;
+ z = aSig;
+ if ( aSign ) z = - z;
+ if ( ( z < 0 ) ^ aSign ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ }
+ if ( ( aSig<<shiftCount ) != savedASig ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ return z;
}
@@ -2012,33 +2012,33 @@ int32 float64_to_int32_round_to_zero( float64 a )
int64 float64_to_int64( float64 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits64 aSig, aSigExtra;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
- shiftCount = 0x433 - aExp;
- if ( shiftCount <= 0 ) {
- if ( 0x43E < aExp ) {
- float_raise( float_flag_invalid );
- if ( ! aSign
- || ( ( aExp == 0x7FF )
- && ( aSig != LIT64( 0x0010000000000000 ) ) )
- ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- aSigExtra = 0;
- aSig <<= - shiftCount;
- }
- else {
- shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
- }
- return roundAndPackInt64( aSign, aSig, aSigExtra );
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits64 aSig, aSigExtra;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
+ shiftCount = 0x433 - aExp;
+ if ( shiftCount <= 0 ) {
+ if ( 0x43E < aExp ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign
+ || ( ( aExp == 0x7FF )
+ && ( aSig != LIT64( 0x0010000000000000 ) ) )
+ ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ aSigExtra = 0;
+ aSig <<= - shiftCount;
+ }
+ else {
+ shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
+ }
+ return roundAndPackInt64( aSign, aSig, aSigExtra );
}
@@ -2054,43 +2054,43 @@ int64 float64_to_int64( float64 a )
int64 float64_to_int64_round_to_zero( float64 a )
{
- flag aSign;
- int16 aExp, shiftCount;
- bits64 aSig;
- int64 z;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
- shiftCount = aExp - 0x433;
- if ( 0 <= shiftCount ) {
- if ( 0x43E <= aExp ) {
- if ( a != LIT64( 0xC3E0000000000000 ) ) {
- float_raise( float_flag_invalid );
- if ( ! aSign
- || ( ( aExp == 0x7FF )
- && ( aSig != LIT64( 0x0010000000000000 ) ) )
- ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- z = aSig<<shiftCount;
- }
- else {
- if ( aExp < 0x3FE ) {
- if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
- return 0;
- }
- z = aSig>>( - shiftCount );
- if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
- float_exception_flags |= float_flag_inexact;
- }
- }
- if ( aSign ) z = - z;
- return z;
+ flag aSign;
+ int16 aExp, shiftCount;
+ bits64 aSig;
+ int64 z;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( aExp ) aSig |= LIT64( 0x0010000000000000 );
+ shiftCount = aExp - 0x433;
+ if ( 0 <= shiftCount ) {
+ if ( 0x43E <= aExp ) {
+ if ( a != LIT64( 0xC3E0000000000000 ) ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign
+ || ( ( aExp == 0x7FF )
+ && ( aSig != LIT64( 0x0010000000000000 ) ) )
+ ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ z = aSig<<shiftCount;
+ }
+ else {
+ if ( aExp < 0x3FE ) {
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
+ return 0;
+ }
+ z = aSig>>( - shiftCount );
+ if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ }
+ if ( aSign ) z = - z;
+ return z;
}
@@ -2103,25 +2103,25 @@ int64 float64_to_int64_round_to_zero( float64 a )
float32 float64_to_float32( float64 a )
{
- flag aSign;
- int16 aExp;
- bits64 aSig;
- bits32 zSig;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp == 0x7FF ) {
- if ( aSig ) return commonNaNToFloat32( float64ToCommonNaN( a ) );
- return packFloat32( aSign, 0xFF, 0 );
- }
- shift64RightJamming( aSig, 22, &aSig );
- zSig = aSig;
- if ( aExp || zSig ) {
- zSig |= 0x40000000;
- aExp -= 0x381;
- }
- return roundAndPackFloat32( aSign, aExp, zSig );
+ flag aSign;
+ int16 aExp;
+ bits64 aSig;
+ bits32 zSig;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( aExp == 0x7FF ) {
+ if ( aSig ) return commonNaNToFloat32( float64ToCommonNaN( a ) );
+ return packFloat32( aSign, 0xFF, 0 );
+ }
+ shift64RightJamming( aSig, 22, &aSig );
+ zSig = aSig;
+ if ( aExp || zSig ) {
+ zSig |= 0x40000000;
+ aExp -= 0x381;
+ }
+ return roundAndPackFloat32( aSign, aExp, zSig );
}
@@ -2136,24 +2136,24 @@ float32 float64_to_float32( float64 a )
floatx80 float64_to_floatx80( float64 a )
{
- flag aSign;
- int16 aExp;
- bits64 aSig;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp == 0x7FF ) {
- if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a ) );
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
- normalizeFloat64Subnormal( aSig, &aExp, &aSig );
- }
- return
- packFloatx80(
- aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );
+ flag aSign;
+ int16 aExp;
+ bits64 aSig;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( aExp == 0x7FF ) {
+ if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a ) );
+ return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );
+ }
+ return
+ packFloatx80(
+ aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );
}
@@ -2170,24 +2170,24 @@ floatx80 float64_to_floatx80( float64 a )
float128 float64_to_float128( float64 a )
{
- flag aSign;
- int16 aExp;
- bits64 aSig, zSig0, zSig1;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp == 0x7FF ) {
- if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a ) );
- return packFloat128( aSign, 0x7FFF, 0, 0 );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
- normalizeFloat64Subnormal( aSig, &aExp, &aSig );
- --aExp;
- }
- shift128Right( aSig, 0, 4, &zSig0, &zSig1 );
- return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );
+ flag aSign;
+ int16 aExp;
+ bits64 aSig, zSig0, zSig1;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( aExp == 0x7FF ) {
+ if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a ) );
+ return packFloat128( aSign, 0x7FFF, 0, 0 );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );
+ --aExp;
+ }
+ shift128Right( aSig, 0, 4, &zSig0, &zSig1 );
+ return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );
}
@@ -2202,54 +2202,54 @@ float128 float64_to_float128( float64 a )
float64 float64_round_to_int( float64 a )
{
- flag aSign;
- int16 aExp;
- bits64 lastBitMask, roundBitsMask;
- int8 roundingMode;
- float64 z;
-
- aExp = extractFloat64Exp( a );
- if ( 0x433 <= aExp ) {
- if ( ( aExp == 0x7FF ) && extractFloat64Frac( a ) ) {
- return propagateFloat64NaN( a, a );
- }
- return a;
- }
- if ( aExp < 0x3FF ) {
- if ( (bits64) ( a<<1 ) == 0 ) return a;
- float_exception_flags |= float_flag_inexact;
- aSign = extractFloat64Sign( a );
- switch ( float_rounding_mode ) {
- case float_round_nearest_even:
- if ( ( aExp == 0x3FE ) && extractFloat64Frac( a ) ) {
- return packFloat64( aSign, 0x3FF, 0 );
- }
- break;
- case float_round_down:
- return aSign ? LIT64( 0xBFF0000000000000 ) : 0;
- case float_round_up:
- return
- aSign ? LIT64( 0x8000000000000000 ) : LIT64( 0x3FF0000000000000 );
- }
- return packFloat64( aSign, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x433 - aExp;
- roundBitsMask = lastBitMask - 1;
- z = a;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- z += lastBitMask>>1;
- if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloat64Sign( z ) ^ ( roundingMode == float_round_up ) ) {
- z += roundBitsMask;
- }
- }
- z &= ~ roundBitsMask;
- if ( z != a ) float_exception_flags |= float_flag_inexact;
- return z;
+ flag aSign;
+ int16 aExp;
+ bits64 lastBitMask, roundBitsMask;
+ int8 roundingMode;
+ float64 z;
+
+ aExp = extractFloat64Exp( a );
+ if ( 0x433 <= aExp ) {
+ if ( ( aExp == 0x7FF ) && extractFloat64Frac( a ) ) {
+ return propagateFloat64NaN( a, a );
+ }
+ return a;
+ }
+ if ( aExp < 0x3FF ) {
+ if ( (bits64) ( a<<1 ) == 0 ) return a;
+ float_exception_flags |= float_flag_inexact;
+ aSign = extractFloat64Sign( a );
+ switch ( float_rounding_mode ) {
+ case float_round_nearest_even:
+ if ( ( aExp == 0x3FE ) && extractFloat64Frac( a ) ) {
+ return packFloat64( aSign, 0x3FF, 0 );
+ }
+ break;
+ case float_round_down:
+ return aSign ? LIT64( 0xBFF0000000000000 ) : 0;
+ case float_round_up:
+ return
+ aSign ? LIT64( 0x8000000000000000 ) : LIT64( 0x3FF0000000000000 );
+ }
+ return packFloat64( aSign, 0, 0 );
+ }
+ lastBitMask = 1;
+ lastBitMask <<= 0x433 - aExp;
+ roundBitsMask = lastBitMask - 1;
+ z = a;
+ roundingMode = float_rounding_mode;
+ if ( roundingMode == float_round_nearest_even ) {
+ z += lastBitMask>>1;
+ if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;
+ }
+ else if ( roundingMode != float_round_to_zero ) {
+ if ( extractFloat64Sign( z ) ^ ( roundingMode == float_round_up ) ) {
+ z += roundBitsMask;
+ }
+ }
+ z &= ~ roundBitsMask;
+ if ( z != a ) float_exception_flags |= float_flag_inexact;
+ return z;
}
@@ -2263,64 +2263,64 @@ float64 float64_round_to_int( float64 a )
static float64 addFloat64Sigs( float64 a, float64 b, flag zSign )
{
- int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
- int16 expDiff;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- bSig = extractFloat64Frac( b );
- bExp = extractFloat64Exp( b );
- expDiff = aExp - bExp;
- aSig <<= 9;
- bSig <<= 9;
- if ( 0 < expDiff ) {
- if ( aExp == 0x7FF ) {
- if ( aSig ) return propagateFloat64NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig |= LIT64( 0x2000000000000000 );
- }
- shift64RightJamming( bSig, expDiff, &bSig );
- zExp = aExp;
- }
- else if ( expDiff < 0 ) {
- if ( bExp == 0x7FF ) {
- if ( bSig ) return propagateFloat64NaN( a, b );
- return packFloat64( zSign, 0x7FF, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig |= LIT64( 0x2000000000000000 );
- }
- shift64RightJamming( aSig, - expDiff, &aSig );
- zExp = bExp;
- }
- else {
- if ( aExp == 0x7FF ) {
- if ( aSig | bSig ) return propagateFloat64NaN( a, b );
- return a;
- }
- if ( aExp == 0 ) return packFloat64( zSign, 0, ( aSig + bSig )>>9 );
- zSig = LIT64( 0x4000000000000000 ) + aSig + bSig;
- zExp = aExp;
- goto roundAndPack;
- }
- aSig |= LIT64( 0x2000000000000000 );
- zSig = ( aSig + bSig )<<1;
- --zExp;
- if ( (sbits64) zSig < 0 ) {
- zSig = aSig + bSig;
- ++zExp;
- }
- roundAndPack:
- return roundAndPackFloat64( zSign, zExp, zSig );
+ int16 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig;
+ int16 expDiff;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ bSig = extractFloat64Frac( b );
+ bExp = extractFloat64Exp( b );
+ expDiff = aExp - bExp;
+ aSig <<= 9;
+ bSig <<= 9;
+ if ( 0 < expDiff ) {
+ if ( aExp == 0x7FF ) {
+ if ( aSig ) return propagateFloat64NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ --expDiff;
+ }
+ else {
+ bSig |= LIT64( 0x2000000000000000 );
+ }
+ shift64RightJamming( bSig, expDiff, &bSig );
+ zExp = aExp;
+ }
+ else if ( expDiff < 0 ) {
+ if ( bExp == 0x7FF ) {
+ if ( bSig ) return propagateFloat64NaN( a, b );
+ return packFloat64( zSign, 0x7FF, 0 );
+ }
+ if ( aExp == 0 ) {
+ ++expDiff;
+ }
+ else {
+ aSig |= LIT64( 0x2000000000000000 );
+ }
+ shift64RightJamming( aSig, - expDiff, &aSig );
+ zExp = bExp;
+ }
+ else {
+ if ( aExp == 0x7FF ) {
+ if ( aSig | bSig ) return propagateFloat64NaN( a, b );
+ return a;
+ }
+ if ( aExp == 0 ) return packFloat64( zSign, 0, ( aSig + bSig )>>9 );
+ zSig = LIT64( 0x4000000000000000 ) + aSig + bSig;
+ zExp = aExp;
+ goto roundAndPack;
+ }
+ aSig |= LIT64( 0x2000000000000000 );
+ zSig = ( aSig + bSig )<<1;
+ --zExp;
+ if ( (sbits64) zSig < 0 ) {
+ zSig = aSig + bSig;
+ ++zExp;
+ }
+ roundAndPack:
+ return roundAndPackFloat64( zSign, zExp, zSig );
}
@@ -2334,68 +2334,68 @@ static float64 addFloat64Sigs( float64 a, float64 b, flag zSign )
static float64 subFloat64Sigs( float64 a, float64 b, flag zSign )
{
- int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
- int16 expDiff;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- bSig = extractFloat64Frac( b );
- bExp = extractFloat64Exp( b );
- expDiff = aExp - bExp;
- aSig <<= 10;
- bSig <<= 10;
- if ( 0 < expDiff ) goto aExpBigger;
- if ( expDiff < 0 ) goto bExpBigger;
- if ( aExp == 0x7FF ) {
- if ( aSig | bSig ) return propagateFloat64NaN( a, b );
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- if ( aExp == 0 ) {
- aExp = 1;
- bExp = 1;
- }
- if ( bSig < aSig ) goto aBigger;
- if ( aSig < bSig ) goto bBigger;
- return packFloat64( float_rounding_mode == float_round_down, 0, 0 );
- bExpBigger:
- if ( bExp == 0x7FF ) {
- if ( bSig ) return propagateFloat64NaN( a, b );
- return packFloat64( zSign ^ 1, 0x7FF, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig |= LIT64( 0x4000000000000000 );
- }
- shift64RightJamming( aSig, - expDiff, &aSig );
- bSig |= LIT64( 0x4000000000000000 );
- bBigger:
- zSig = bSig - aSig;
- zExp = bExp;
- zSign ^= 1;
- goto normalizeRoundAndPack;
- aExpBigger:
- if ( aExp == 0x7FF ) {
- if ( aSig ) return propagateFloat64NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig |= LIT64( 0x4000000000000000 );
- }
- shift64RightJamming( bSig, expDiff, &bSig );
- aSig |= LIT64( 0x4000000000000000 );
- aBigger:
- zSig = aSig - bSig;
- zExp = aExp;
- normalizeRoundAndPack:
- --zExp;
- return normalizeRoundAndPackFloat64( zSign, zExp, zSig );
+ int16 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig;
+ int16 expDiff;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ bSig = extractFloat64Frac( b );
+ bExp = extractFloat64Exp( b );
+ expDiff = aExp - bExp;
+ aSig <<= 10;
+ bSig <<= 10;
+ if ( 0 < expDiff ) goto aExpBigger;
+ if ( expDiff < 0 ) goto bExpBigger;
+ if ( aExp == 0x7FF ) {
+ if ( aSig | bSig ) return propagateFloat64NaN( a, b );
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ if ( aExp == 0 ) {
+ aExp = 1;
+ bExp = 1;
+ }
+ if ( bSig < aSig ) goto aBigger;
+ if ( aSig < bSig ) goto bBigger;
+ return packFloat64( float_rounding_mode == float_round_down, 0, 0 );
+ bExpBigger:
+ if ( bExp == 0x7FF ) {
+ if ( bSig ) return propagateFloat64NaN( a, b );
+ return packFloat64( zSign ^ 1, 0x7FF, 0 );
+ }
+ if ( aExp == 0 ) {
+ ++expDiff;
+ }
+ else {
+ aSig |= LIT64( 0x4000000000000000 );
+ }
+ shift64RightJamming( aSig, - expDiff, &aSig );
+ bSig |= LIT64( 0x4000000000000000 );
+ bBigger:
+ zSig = bSig - aSig;
+ zExp = bExp;
+ zSign ^= 1;
+ goto normalizeRoundAndPack;
+ aExpBigger:
+ if ( aExp == 0x7FF ) {
+ if ( aSig ) return propagateFloat64NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ --expDiff;
+ }
+ else {
+ bSig |= LIT64( 0x4000000000000000 );
+ }
+ shift64RightJamming( bSig, expDiff, &bSig );
+ aSig |= LIT64( 0x4000000000000000 );
+ aBigger:
+ zSig = aSig - bSig;
+ zExp = aExp;
+ normalizeRoundAndPack:
+ --zExp;
+ return normalizeRoundAndPackFloat64( zSign, zExp, zSig );
}
@@ -2407,16 +2407,16 @@ static float64 subFloat64Sigs( float64 a, float64 b, flag zSign )
float64 float64_add( float64 a, float64 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign == bSign ) {
- return addFloat64Sigs( a, b, aSign );
- }
- else {
- return subFloat64Sigs( a, b, aSign );
- }
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if ( aSign == bSign ) {
+ return addFloat64Sigs( a, b, aSign );
+ }
+ else {
+ return subFloat64Sigs( a, b, aSign );
+ }
}
@@ -2428,16 +2428,16 @@ float64 float64_add( float64 a, float64 b )
float64 float64_sub( float64 a, float64 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign == bSign ) {
- return subFloat64Sigs( a, b, aSign );
- }
- else {
- return addFloat64Sigs( a, b, aSign );
- }
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if ( aSign == bSign ) {
+ return subFloat64Sigs( a, b, aSign );
+ }
+ else {
+ return addFloat64Sigs( a, b, aSign );
+ }
}
@@ -2449,53 +2449,53 @@ float64 float64_sub( float64 a, float64 b )
float64 float64_mul( float64 a, float64 b )
{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- bSig = extractFloat64Frac( b );
- bExp = extractFloat64Exp( b );
- bSign = extractFloat64Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FF ) {
- if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
- return propagateFloat64NaN( a, b );
- }
- if ( ( bExp | bSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- return packFloat64( zSign, 0x7FF, 0 );
- }
- if ( bExp == 0x7FF ) {
- if ( bSig ) return propagateFloat64NaN( a, b );
- if ( ( aExp | aSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- return packFloat64( zSign, 0x7FF, 0 );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat64( zSign, 0, 0 );
- normalizeFloat64Subnormal( aSig, &aExp, &aSig );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) return packFloat64( zSign, 0, 0 );
- normalizeFloat64Subnormal( bSig, &bExp, &bSig );
- }
- zExp = aExp + bExp - 0x3FF;
- aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<10;
- bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
- mul64To128( aSig, bSig, &zSig0, &zSig1 );
- zSig0 |= ( zSig1 != 0 );
- if ( 0 <= (sbits64) ( zSig0<<1 ) ) {
- zSig0 <<= 1;
- --zExp;
- }
- return roundAndPackFloat64( zSign, zExp, zSig0 );
+ flag aSign, bSign, zSign;
+ int16 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig0, zSig1;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ bSig = extractFloat64Frac( b );
+ bExp = extractFloat64Exp( b );
+ bSign = extractFloat64Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0x7FF ) {
+ if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
+ return propagateFloat64NaN( a, b );
+ }
+ if ( ( bExp | bSig ) == 0 ) {
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ return packFloat64( zSign, 0x7FF, 0 );
+ }
+ if ( bExp == 0x7FF ) {
+ if ( bSig ) return propagateFloat64NaN( a, b );
+ if ( ( aExp | aSig ) == 0 ) {
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ return packFloat64( zSign, 0x7FF, 0 );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloat64( zSign, 0, 0 );
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) return packFloat64( zSign, 0, 0 );
+ normalizeFloat64Subnormal( bSig, &bExp, &bSig );
+ }
+ zExp = aExp + bExp - 0x3FF;
+ aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<10;
+ bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
+ mul64To128( aSig, bSig, &zSig0, &zSig1 );
+ zSig0 |= ( zSig1 != 0 );
+ if ( 0 <= (sbits64) ( zSig0<<1 ) ) {
+ zSig0 <<= 1;
+ --zExp;
+ }
+ return roundAndPackFloat64( zSign, zExp, zSig0 );
}
@@ -2507,65 +2507,65 @@ float64 float64_mul( float64 a, float64 b )
float64 float64_div( float64 a, float64 b )
{
- flag aSign, bSign, zSign;
- int16 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig;
- bits64 rem0, rem1;
- bits64 term0, term1;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- bSig = extractFloat64Frac( b );
- bExp = extractFloat64Exp( b );
- bSign = extractFloat64Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FF ) {
- if ( aSig ) return propagateFloat64NaN( a, b );
- if ( bExp == 0x7FF ) {
- if ( bSig ) return propagateFloat64NaN( a, b );
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- return packFloat64( zSign, 0x7FF, 0 );
- }
- if ( bExp == 0x7FF ) {
- if ( bSig ) return propagateFloat64NaN( a, b );
- return packFloat64( zSign, 0, 0 );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- if ( ( aExp | aSig ) == 0 ) {
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- float_raise( float_flag_divbyzero );
- return packFloat64( zSign, 0x7FF, 0 );
- }
- normalizeFloat64Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloat64( zSign, 0, 0 );
- normalizeFloat64Subnormal( aSig, &aExp, &aSig );
- }
- zExp = aExp - bExp + 0x3FD;
- aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<10;
- bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
- if ( bSig <= ( aSig + aSig ) ) {
- aSig >>= 1;
- ++zExp;
- }
- zSig = estimateDiv128To64( aSig, 0, bSig );
- if ( ( zSig & 0x1FF ) <= 2 ) {
- mul64To128( bSig, zSig, &term0, &term1 );
- sub128( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
- --zSig;
- add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
- }
- zSig |= ( rem1 != 0 );
- }
- return roundAndPackFloat64( zSign, zExp, zSig );
+ flag aSign, bSign, zSign;
+ int16 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig;
+ bits64 rem0, rem1;
+ bits64 term0, term1;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ bSig = extractFloat64Frac( b );
+ bExp = extractFloat64Exp( b );
+ bSign = extractFloat64Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0x7FF ) {
+ if ( aSig ) return propagateFloat64NaN( a, b );
+ if ( bExp == 0x7FF ) {
+ if ( bSig ) return propagateFloat64NaN( a, b );
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ return packFloat64( zSign, 0x7FF, 0 );
+ }
+ if ( bExp == 0x7FF ) {
+ if ( bSig ) return propagateFloat64NaN( a, b );
+ return packFloat64( zSign, 0, 0 );
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) {
+ if ( ( aExp | aSig ) == 0 ) {
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ float_raise( float_flag_divbyzero );
+ return packFloat64( zSign, 0x7FF, 0 );
+ }
+ normalizeFloat64Subnormal( bSig, &bExp, &bSig );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloat64( zSign, 0, 0 );
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );
+ }
+ zExp = aExp - bExp + 0x3FD;
+ aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<10;
+ bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
+ if ( bSig <= ( aSig + aSig ) ) {
+ aSig >>= 1;
+ ++zExp;
+ }
+ zSig = estimateDiv128To64( aSig, 0, bSig );
+ if ( ( zSig & 0x1FF ) <= 2 ) {
+ mul64To128( bSig, zSig, &term0, &term1 );
+ sub128( aSig, 0, term0, term1, &rem0, &rem1 );
+ while ( (sbits64) rem0 < 0 ) {
+ --zSig;
+ add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
+ }
+ zSig |= ( rem1 != 0 );
+ }
+ return roundAndPackFloat64( zSign, zExp, zSig );
}
@@ -2577,80 +2577,80 @@ float64 float64_div( float64 a, float64 b )
float64 float64_rem( float64 a, float64 b )
{
- flag aSign, zSign;
- int16 aExp, bExp, expDiff;
- bits64 aSig, bSig;
- bits64 q, alternateASig;
- sbits64 sigMean;
-
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- bSig = extractFloat64Frac( b );
- bExp = extractFloat64Exp( b );
+ flag aSign, zSign;
+ int16 aExp, bExp, expDiff;
+ bits64 aSig, bSig;
+ bits64 q, alternateASig;
+ sbits64 sigMean;
+
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ bSig = extractFloat64Frac( b );
+ bExp = extractFloat64Exp( b );
// bSign = extractFloat64Sign( b );
- if ( aExp == 0x7FF ) {
- if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
- return propagateFloat64NaN( a, b );
- }
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- if ( bExp == 0x7FF ) {
- if ( bSig ) return propagateFloat64NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- normalizeFloat64Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return a;
- normalizeFloat64Subnormal( aSig, &aExp, &aSig );
- }
- expDiff = aExp - bExp;
- aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<11;
- bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
- if ( expDiff < 0 ) {
- if ( expDiff < -1 ) return a;
- aSig >>= 1;
- }
- q = ( bSig <= aSig );
- if ( q ) aSig -= bSig;
- expDiff -= 64;
- while ( 0 < expDiff ) {
- q = estimateDiv128To64( aSig, 0, bSig );
- q = ( 2 < q ) ? q - 2 : 0;
- aSig = - ( ( bSig>>2 ) * q );
- expDiff -= 62;
- }
- expDiff += 64;
- if ( 0 < expDiff ) {
- q = estimateDiv128To64( aSig, 0, bSig );
- q = ( 2 < q ) ? q - 2 : 0;
- q >>= 64 - expDiff;
- bSig >>= 2;
- aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
- }
- else {
- aSig >>= 2;
- bSig >>= 2;
- }
- do {
- alternateASig = aSig;
- ++q;
- aSig -= bSig;
- } while ( 0 <= (sbits64) aSig );
- sigMean = aSig + alternateASig;
- if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
- aSig = alternateASig;
- }
- zSign = ( (sbits64) aSig < 0 );
- if ( zSign ) aSig = - aSig;
- return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig );
+ if ( aExp == 0x7FF ) {
+ if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {
+ return propagateFloat64NaN( a, b );
+ }
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ if ( bExp == 0x7FF ) {
+ if ( bSig ) return propagateFloat64NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) {
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ normalizeFloat64Subnormal( bSig, &bExp, &bSig );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return a;
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );
+ }
+ expDiff = aExp - bExp;
+ aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<11;
+ bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;
+ if ( expDiff < 0 ) {
+ if ( expDiff < -1 ) return a;
+ aSig >>= 1;
+ }
+ q = ( bSig <= aSig );
+ if ( q ) aSig -= bSig;
+ expDiff -= 64;
+ while ( 0 < expDiff ) {
+ q = estimateDiv128To64( aSig, 0, bSig );
+ q = ( 2 < q ) ? q - 2 : 0;
+ aSig = - ( ( bSig>>2 ) * q );
+ expDiff -= 62;
+ }
+ expDiff += 64;
+ if ( 0 < expDiff ) {
+ q = estimateDiv128To64( aSig, 0, bSig );
+ q = ( 2 < q ) ? q - 2 : 0;
+ q >>= 64 - expDiff;
+ bSig >>= 2;
+ aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;
+ }
+ else {
+ aSig >>= 2;
+ bSig >>= 2;
+ }
+ do {
+ alternateASig = aSig;
+ ++q;
+ aSig -= bSig;
+ } while ( 0 <= (sbits64) aSig );
+ sigMean = aSig + alternateASig;
+ if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {
+ aSig = alternateASig;
+ }
+ zSign = ( (sbits64) aSig < 0 );
+ if ( zSign ) aSig = - aSig;
+ return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig );
}
@@ -2662,47 +2662,47 @@ float64 float64_rem( float64 a, float64 b )
float64 float64_sqrt( float64 a )
{
- flag aSign;
- int16 aExp, zExp;
- bits64 aSig, zSig, doubleZSig;
- bits64 rem0, rem1, term0, term1;
+ flag aSign;
+ int16 aExp, zExp;
+ bits64 aSig, zSig, doubleZSig;
+ bits64 rem0, rem1, term0, term1;
// float64 z;
- aSig = extractFloat64Frac( a );
- aExp = extractFloat64Exp( a );
- aSign = extractFloat64Sign( a );
- if ( aExp == 0x7FF ) {
- if ( aSig ) return propagateFloat64NaN( a, a );
- if ( ! aSign ) return a;
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- if ( aSign ) {
- if ( ( aExp | aSig ) == 0 ) return a;
- float_raise( float_flag_invalid );
- return float64_default_nan;
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return 0;
- normalizeFloat64Subnormal( aSig, &aExp, &aSig );
- }
- zExp = ( ( aExp - 0x3FF )>>1 ) + 0x3FE;
- aSig |= LIT64( 0x0010000000000000 );
- zSig = estimateSqrt32( aExp, aSig>>21 );
- aSig <<= 9 - ( aExp & 1 );
- zSig = estimateDiv128To64( aSig, 0, zSig<<32 ) + ( zSig<<30 );
- if ( ( zSig & 0x1FF ) <= 5 ) {
- doubleZSig = zSig<<1;
- mul64To128( zSig, zSig, &term0, &term1 );
- sub128( aSig, 0, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
- --zSig;
- doubleZSig -= 2;
- add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );
- }
- zSig |= ( ( rem0 | rem1 ) != 0 );
- }
- return roundAndPackFloat64( 0, zExp, zSig );
+ aSig = extractFloat64Frac( a );
+ aExp = extractFloat64Exp( a );
+ aSign = extractFloat64Sign( a );
+ if ( aExp == 0x7FF ) {
+ if ( aSig ) return propagateFloat64NaN( a, a );
+ if ( ! aSign ) return a;
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ if ( aSign ) {
+ if ( ( aExp | aSig ) == 0 ) return a;
+ float_raise( float_flag_invalid );
+ return float64_default_nan;
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return 0;
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );
+ }
+ zExp = ( ( aExp - 0x3FF )>>1 ) + 0x3FE;
+ aSig |= LIT64( 0x0010000000000000 );
+ zSig = estimateSqrt32( aExp, aSig>>21 );
+ aSig <<= 9 - ( aExp & 1 );
+ zSig = estimateDiv128To64( aSig, 0, zSig<<32 ) + ( zSig<<30 );
+ if ( ( zSig & 0x1FF ) <= 5 ) {
+ doubleZSig = zSig<<1;
+ mul64To128( zSig, zSig, &term0, &term1 );
+ sub128( aSig, 0, term0, term1, &rem0, &rem1 );
+ while ( (sbits64) rem0 < 0 ) {
+ --zSig;
+ doubleZSig -= 2;
+ add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );
+ }
+ zSig |= ( ( rem0 | rem1 ) != 0 );
+ }
+ return roundAndPackFloat64( 0, zExp, zSig );
}
@@ -2715,15 +2715,15 @@ float64 float64_sqrt( float64 a )
flag float64_eq( float64 a, float64 b )
{
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );
}
@@ -2736,18 +2736,18 @@ flag float64_eq( float64 a, float64 b )
flag float64_le( float64 a, float64 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );
- return ( a == b ) || ( aSign ^ ( a < b ) );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );
+ return ( a == b ) || ( aSign ^ ( a < b ) );
}
@@ -2759,18 +2759,18 @@ flag float64_le( float64 a, float64 b )
flag float64_lt( float64 a, float64 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );
- return ( a != b ) && ( aSign ^ ( a < b ) );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );
+ return ( a != b ) && ( aSign ^ ( a < b ) );
}
@@ -2784,13 +2784,13 @@ flag float64_lt( float64 a, float64 b )
flag float64_eq_signaling( float64 a, float64 b )
{
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );
}
@@ -2803,21 +2803,21 @@ flag float64_eq_signaling( float64 a, float64 b )
flag float64_le_quiet( float64 a, float64 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
// int16 aExp, bExp;
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );
- return ( a == b ) || ( aSign ^ ( a < b ) );
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );
+ return ( a == b ) || ( aSign ^ ( a < b ) );
}
@@ -2830,20 +2830,20 @@ flag float64_le_quiet( float64 a, float64 b )
flag float64_lt_quiet( float64 a, float64 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
- || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
- ) {
- if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat64Sign( a );
- bSign = extractFloat64Sign( b );
- if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );
- return ( a != b ) && ( aSign ^ ( a < b ) );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )
+ ) {
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloat64Sign( a );
+ bSign = extractFloat64Sign( b );
+ if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );
+ return ( a != b ) && ( aSign ^ ( a < b ) );
}
@@ -2861,18 +2861,18 @@ flag float64_lt_quiet( float64 a, float64 b )
int32 floatx80_to_int32( floatx80 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
- shiftCount = 0x4037 - aExp;
- if ( shiftCount <= 0 ) shiftCount = 1;
- shift64RightJamming( aSig, shiftCount, &aSig );
- return roundAndPackInt32( aSign, aSig );
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
+ shiftCount = 0x4037 - aExp;
+ if ( shiftCount <= 0 ) shiftCount = 1;
+ shift64RightJamming( aSig, shiftCount, &aSig );
+ return roundAndPackInt32( aSign, aSig );
}
@@ -2888,36 +2888,36 @@ int32 floatx80_to_int32( floatx80 a )
int32 floatx80_to_int32_round_to_zero( floatx80 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig, savedASig;
- int32 z;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- if ( 0x401E < aExp ) {
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
- goto invalid;
- }
- else if ( aExp < 0x3FFF ) {
- if ( aExp || aSig ) float_exception_flags |= float_flag_inexact;
- return 0;
- }
- shiftCount = 0x403E - aExp;
- savedASig = aSig;
- aSig >>= shiftCount;
- z = aSig;
- if ( aSign ) z = - z;
- if ( ( z < 0 ) ^ aSign ) {
- invalid:
- float_raise( float_flag_invalid );
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
- }
- if ( ( aSig<<shiftCount ) != savedASig ) {
- float_exception_flags |= float_flag_inexact;
- }
- return z;
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig, savedASig;
+ int32 z;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ if ( 0x401E < aExp ) {
+ if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;
+ goto invalid;
+ }
+ else if ( aExp < 0x3FFF ) {
+ if ( aExp || aSig ) float_exception_flags |= float_flag_inexact;
+ return 0;
+ }
+ shiftCount = 0x403E - aExp;
+ savedASig = aSig;
+ aSig >>= shiftCount;
+ z = aSig;
+ if ( aSign ) z = - z;
+ if ( ( z < 0 ) ^ aSign ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ }
+ if ( ( aSig<<shiftCount ) != savedASig ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ return z;
}
@@ -2933,31 +2933,31 @@ int32 floatx80_to_int32_round_to_zero( floatx80 a )
int64 floatx80_to_int64( floatx80 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig, aSigExtra;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- shiftCount = 0x403E - aExp;
- if ( shiftCount <= 0 ) {
- if ( shiftCount ) {
- float_raise( float_flag_invalid );
- if ( ! aSign
- || ( ( aExp == 0x7FFF )
- && ( aSig != LIT64( 0x8000000000000000 ) ) )
- ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- aSigExtra = 0;
- }
- else {
- shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
- }
- return roundAndPackInt64( aSign, aSig, aSigExtra );
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig, aSigExtra;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ shiftCount = 0x403E - aExp;
+ if ( shiftCount <= 0 ) {
+ if ( shiftCount ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign
+ || ( ( aExp == 0x7FFF )
+ && ( aSig != LIT64( 0x8000000000000000 ) ) )
+ ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ aSigExtra = 0;
+ }
+ else {
+ shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );
+ }
+ return roundAndPackInt64( aSign, aSig, aSigExtra );
}
@@ -2973,35 +2973,35 @@ int64 floatx80_to_int64( floatx80 a )
int64 floatx80_to_int64_round_to_zero( floatx80 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig;
- int64 z;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- shiftCount = aExp - 0x403E;
- if ( 0 <= shiftCount ) {
- aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );
- if ( ( a.high != 0xC03E ) || aSig ) {
- float_raise( float_flag_invalid );
- if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- else if ( aExp < 0x3FFF ) {
- if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
- return 0;
- }
- z = aSig>>( - shiftCount );
- if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
- float_exception_flags |= float_flag_inexact;
- }
- if ( aSign ) z = - z;
- return z;
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig;
+ int64 z;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ shiftCount = aExp - 0x403E;
+ if ( 0 <= shiftCount ) {
+ aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );
+ if ( ( a.high != 0xC03E ) || aSig ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ else if ( aExp < 0x3FFF ) {
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;
+ return 0;
+ }
+ z = aSig>>( - shiftCount );
+ if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ if ( aSign ) z = - z;
+ return z;
}
@@ -3014,22 +3014,22 @@ int64 floatx80_to_int64_round_to_zero( floatx80 a )
float32 floatx80_to_float32( floatx80 a )
{
- flag aSign;
- int32 aExp;
- bits64 aSig;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) {
- return commonNaNToFloat32( floatx80ToCommonNaN( a ) );
- }
- return packFloat32( aSign, 0xFF, 0 );
- }
- shift64RightJamming( aSig, 33, &aSig );
- if ( aExp || aSig ) aExp -= 0x3F81;
- return roundAndPackFloat32( aSign, aExp, aSig );
+ flag aSign;
+ int32 aExp;
+ bits64 aSig;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig<<1 ) ) {
+ return commonNaNToFloat32( floatx80ToCommonNaN( a ) );
+ }
+ return packFloat32( aSign, 0xFF, 0 );
+ }
+ shift64RightJamming( aSig, 33, &aSig );
+ if ( aExp || aSig ) aExp -= 0x3F81;
+ return roundAndPackFloat32( aSign, aExp, aSig );
}
@@ -3042,22 +3042,22 @@ float32 floatx80_to_float32( floatx80 a )
float64 floatx80_to_float64( floatx80 a )
{
- flag aSign;
- int32 aExp;
- bits64 aSig, zSig;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) {
- return commonNaNToFloat64( floatx80ToCommonNaN( a ) );
- }
- return packFloat64( aSign, 0x7FF, 0 );
- }
- shift64RightJamming( aSig, 1, &zSig );
- if ( aExp || aSig ) aExp -= 0x3C01;
- return roundAndPackFloat64( aSign, aExp, zSig );
+ flag aSign;
+ int32 aExp;
+ bits64 aSig, zSig;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig<<1 ) ) {
+ return commonNaNToFloat64( floatx80ToCommonNaN( a ) );
+ }
+ return packFloat64( aSign, 0x7FF, 0 );
+ }
+ shift64RightJamming( aSig, 1, &zSig );
+ if ( aExp || aSig ) aExp -= 0x3C01;
+ return roundAndPackFloat64( aSign, aExp, zSig );
}
@@ -3072,18 +3072,18 @@ float64 floatx80_to_float64( floatx80 a )
float128 floatx80_to_float128( floatx80 a )
{
- flag aSign;
- int16 aExp;
- bits64 aSig, zSig0, zSig1;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) {
- return commonNaNToFloat128( floatx80ToCommonNaN( a ) );
- }
- shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
- return packFloat128( aSign, aExp, zSig0, zSig1 );
+ flag aSign;
+ int16 aExp;
+ bits64 aSig, zSig0, zSig1;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) {
+ return commonNaNToFloat128( floatx80ToCommonNaN( a ) );
+ }
+ shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );
+ return packFloat128( aSign, aExp, zSig0, zSig1 );
}
@@ -3098,67 +3098,67 @@ float128 floatx80_to_float128( floatx80 a )
floatx80 floatx80_round_to_int( floatx80 a )
{
- flag aSign;
- int32 aExp;
- bits64 lastBitMask, roundBitsMask;
- int8 roundingMode;
- floatx80 z;
-
- aExp = extractFloatx80Exp( a );
- if ( 0x403E <= aExp ) {
- if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) {
- return propagateFloatx80NaN( a, a );
- }
- return a;
- }
- if ( aExp < 0x3FFF ) {
- if ( ( aExp == 0 )
- && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
- return a;
- }
- float_exception_flags |= float_flag_inexact;
- aSign = extractFloatx80Sign( a );
- switch ( float_rounding_mode ) {
- case float_round_nearest_even:
- if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 )
- ) {
- return
- packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
- }
- break;
- case float_round_down:
- return
- aSign ?
- packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 ) )
- : packFloatx80( 0, 0, 0 );
- case float_round_up:
- return
- aSign ? packFloatx80( 1, 0, 0 )
- : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) );
- }
- return packFloatx80( aSign, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x403E - aExp;
- roundBitsMask = lastBitMask - 1;
- z = a;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- z.low += lastBitMask>>1;
- if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloatx80Sign( z ) ^ ( roundingMode == float_round_up ) ) {
- z.low += roundBitsMask;
- }
- }
- z.low &= ~ roundBitsMask;
- if ( z.low == 0 ) {
- ++z.high;
- z.low = LIT64( 0x8000000000000000 );
- }
- if ( z.low != a.low ) float_exception_flags |= float_flag_inexact;
- return z;
+ flag aSign;
+ int32 aExp;
+ bits64 lastBitMask, roundBitsMask;
+ int8 roundingMode;
+ floatx80 z;
+
+ aExp = extractFloatx80Exp( a );
+ if ( 0x403E <= aExp ) {
+ if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) {
+ return propagateFloatx80NaN( a, a );
+ }
+ return a;
+ }
+ if ( aExp < 0x3FFF ) {
+ if ( ( aExp == 0 )
+ && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {
+ return a;
+ }
+ float_exception_flags |= float_flag_inexact;
+ aSign = extractFloatx80Sign( a );
+ switch ( float_rounding_mode ) {
+ case float_round_nearest_even:
+ if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 )
+ ) {
+ return
+ packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );
+ }
+ break;
+ case float_round_down:
+ return
+ aSign ?
+ packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 ) )
+ : packFloatx80( 0, 0, 0 );
+ case float_round_up:
+ return
+ aSign ? packFloatx80( 1, 0, 0 )
+ : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) );
+ }
+ return packFloatx80( aSign, 0, 0 );
+ }
+ lastBitMask = 1;
+ lastBitMask <<= 0x403E - aExp;
+ roundBitsMask = lastBitMask - 1;
+ z = a;
+ roundingMode = float_rounding_mode;
+ if ( roundingMode == float_round_nearest_even ) {
+ z.low += lastBitMask>>1;
+ if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
+ }
+ else if ( roundingMode != float_round_to_zero ) {
+ if ( extractFloatx80Sign( z ) ^ ( roundingMode == float_round_up ) ) {
+ z.low += roundBitsMask;
+ }
+ }
+ z.low &= ~ roundBitsMask;
+ if ( z.low == 0 ) {
+ ++z.high;
+ z.low = LIT64( 0x8000000000000000 );
+ }
+ if ( z.low != a.low ) float_exception_flags |= float_flag_inexact;
+ return z;
}
@@ -3172,59 +3172,59 @@ floatx80 floatx80_round_to_int( floatx80 a )
static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign )
{
- int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
- int32 expDiff;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- bSig = extractFloatx80Frac( b );
- bExp = extractFloatx80Exp( b );
- expDiff = aExp - bExp;
- if ( 0 < expDiff ) {
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) --expDiff;
- shift64ExtraRightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
- zExp = aExp;
- }
- else if ( expDiff < 0 ) {
- if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( aExp == 0 ) ++expDiff;
- shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
- zExp = bExp;
- }
- else {
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
- return propagateFloatx80NaN( a, b );
- }
- return a;
- }
- zSig1 = 0;
- zSig0 = aSig + bSig;
- if ( aExp == 0 ) {
- normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
- goto roundAndPack;
- }
- zExp = aExp;
- goto shiftRight1;
- }
- zSig0 = aSig + bSig;
- if ( (sbits64) zSig0 < 0 ) goto roundAndPack;
- shiftRight1:
- shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
- zSig0 |= LIT64( 0x8000000000000000 );
- ++zExp;
- roundAndPack:
- return
- roundAndPackFloatx80(
- floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
+ int32 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig0, zSig1;
+ int32 expDiff;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ bSig = extractFloatx80Frac( b );
+ bExp = extractFloatx80Exp( b );
+ expDiff = aExp - bExp;
+ if ( 0 < expDiff ) {
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) --expDiff;
+ shift64ExtraRightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
+ zExp = aExp;
+ }
+ else if ( expDiff < 0 ) {
+ if ( bExp == 0x7FFF ) {
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( aExp == 0 ) ++expDiff;
+ shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
+ zExp = bExp;
+ }
+ else {
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
+ return propagateFloatx80NaN( a, b );
+ }
+ return a;
+ }
+ zSig1 = 0;
+ zSig0 = aSig + bSig;
+ if ( aExp == 0 ) {
+ normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
+ goto roundAndPack;
+ }
+ zExp = aExp;
+ goto shiftRight1;
+ }
+ zSig0 = aSig + bSig;
+ if ( (sbits64) zSig0 < 0 ) goto roundAndPack;
+ shiftRight1:
+ shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );
+ zSig0 |= LIT64( 0x8000000000000000 );
+ ++zExp;
+ roundAndPack:
+ return
+ roundAndPackFloatx80(
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
}
@@ -3238,61 +3238,61 @@ static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign )
static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign )
{
- int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
- int32 expDiff;
- floatx80 z;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- bSig = extractFloatx80Frac( b );
- bExp = extractFloatx80Exp( b );
- expDiff = aExp - bExp;
- if ( 0 < expDiff ) goto aExpBigger;
- if ( expDiff < 0 ) goto bExpBigger;
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
- return propagateFloatx80NaN( a, b );
- }
- float_raise( float_flag_invalid );
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
- }
- if ( aExp == 0 ) {
- aExp = 1;
- bExp = 1;
- }
- zSig1 = 0;
- if ( bSig < aSig ) goto aBigger;
- if ( aSig < bSig ) goto bBigger;
- return packFloatx80( float_rounding_mode == float_round_down, 0, 0 );
- bExpBigger:
- if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
- return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( aExp == 0 ) ++expDiff;
- shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
- bBigger:
- sub128( bSig, 0, aSig, zSig1, &zSig0, &zSig1 );
- zExp = bExp;
- zSign ^= 1;
- goto normalizeRoundAndPack;
- aExpBigger:
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) --expDiff;
- shift128RightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
- aBigger:
- sub128( aSig, 0, bSig, zSig1, &zSig0, &zSig1 );
- zExp = aExp;
- normalizeRoundAndPack:
- return
- normalizeRoundAndPackFloatx80(
- floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
+ int32 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig0, zSig1;
+ int32 expDiff;
+ floatx80 z;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ bSig = extractFloatx80Frac( b );
+ bExp = extractFloatx80Exp( b );
+ expDiff = aExp - bExp;
+ if ( 0 < expDiff ) goto aExpBigger;
+ if ( expDiff < 0 ) goto bExpBigger;
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( ( aSig | bSig )<<1 ) ) {
+ return propagateFloatx80NaN( a, b );
+ }
+ float_raise( float_flag_invalid );
+ z.low = floatx80_default_nan_low;
+ z.high = floatx80_default_nan_high;
+ return z;
+ }
+ if ( aExp == 0 ) {
+ aExp = 1;
+ bExp = 1;
+ }
+ zSig1 = 0;
+ if ( bSig < aSig ) goto aBigger;
+ if ( aSig < bSig ) goto bBigger;
+ return packFloatx80( float_rounding_mode == float_round_down, 0, 0 );
+ bExpBigger:
+ if ( bExp == 0x7FFF ) {
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( aExp == 0 ) ++expDiff;
+ shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );
+ bBigger:
+ sub128( bSig, 0, aSig, zSig1, &zSig0, &zSig1 );
+ zExp = bExp;
+ zSign ^= 1;
+ goto normalizeRoundAndPack;
+ aExpBigger:
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) --expDiff;
+ shift128RightJamming( bSig, 0, expDiff, &bSig, &zSig1 );
+ aBigger:
+ sub128( aSig, 0, bSig, zSig1, &zSig0, &zSig1 );
+ zExp = aExp;
+ normalizeRoundAndPack:
+ return
+ normalizeRoundAndPackFloatx80(
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
}
@@ -3304,16 +3304,16 @@ static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign )
floatx80 floatx80_add( floatx80 a, floatx80 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign == bSign ) {
- return addFloatx80Sigs( a, b, aSign );
- }
- else {
- return subFloatx80Sigs( a, b, aSign );
- }
+ aSign = extractFloatx80Sign( a );
+ bSign = extractFloatx80Sign( b );
+ if ( aSign == bSign ) {
+ return addFloatx80Sigs( a, b, aSign );
+ }
+ else {
+ return subFloatx80Sigs( a, b, aSign );
+ }
}
@@ -3325,16 +3325,16 @@ floatx80 floatx80_add( floatx80 a, floatx80 b )
floatx80 floatx80_sub( floatx80 a, floatx80 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign == bSign ) {
- return subFloatx80Sigs( a, b, aSign );
- }
- else {
- return addFloatx80Sigs( a, b, aSign );
- }
+ aSign = extractFloatx80Sign( a );
+ bSign = extractFloatx80Sign( b );
+ if ( aSign == bSign ) {
+ return subFloatx80Sigs( a, b, aSign );
+ }
+ else {
+ return addFloatx80Sigs( a, b, aSign );
+ }
}
@@ -3346,54 +3346,54 @@ floatx80 floatx80_sub( floatx80 a, floatx80 b )
floatx80 floatx80_mul( floatx80 a, floatx80 b )
{
- flag aSign, bSign, zSign;
- int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
- floatx80 z;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- bSig = extractFloatx80Frac( b );
- bExp = extractFloatx80Exp( b );
- bSign = extractFloatx80Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 )
- || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
- return propagateFloatx80NaN( a, b );
- }
- if ( ( bExp | bSig ) == 0 ) goto invalid;
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
- if ( ( aExp | aSig ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
- }
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
- normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) return packFloatx80( zSign, 0, 0 );
- normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
- }
- zExp = aExp + bExp - 0x3FFE;
- mul64To128( aSig, bSig, &zSig0, &zSig1 );
- if ( 0 < (sbits64) zSig0 ) {
- shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );
- --zExp;
- }
- return
- roundAndPackFloatx80(
- floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
+ flag aSign, bSign, zSign;
+ int32 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig0, zSig1;
+ floatx80 z;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ bSig = extractFloatx80Frac( b );
+ bExp = extractFloatx80Exp( b );
+ bSign = extractFloatx80Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig<<1 )
+ || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
+ return propagateFloatx80NaN( a, b );
+ }
+ if ( ( bExp | bSig ) == 0 ) goto invalid;
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( bExp == 0x7FFF ) {
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ if ( ( aExp | aSig ) == 0 ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = floatx80_default_nan_low;
+ z.high = floatx80_default_nan_high;
+ return z;
+ }
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
+ normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) return packFloatx80( zSign, 0, 0 );
+ normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
+ }
+ zExp = aExp + bExp - 0x3FFE;
+ mul64To128( aSig, bSig, &zSig0, &zSig1 );
+ if ( 0 < (sbits64) zSig0 ) {
+ shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );
+ --zExp;
+ }
+ return
+ roundAndPackFloatx80(
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
}
@@ -3405,75 +3405,75 @@ floatx80 floatx80_mul( floatx80 a, floatx80 b )
floatx80 floatx80_div( floatx80 a, floatx80 b )
{
- flag aSign, bSign, zSign;
- int32 aExp, bExp, zExp;
- bits64 aSig, bSig, zSig0, zSig1;
- bits64 rem0, rem1, rem2, term0, term1, term2;
- floatx80 z;
-
- aSig = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- bSig = extractFloatx80Frac( b );
- bExp = extractFloatx80Exp( b );
- bSign = extractFloatx80Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );
- if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
- goto invalid;
- }
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
- return packFloatx80( zSign, 0, 0 );
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- if ( ( aExp | aSig ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
- }
- float_raise( float_flag_divbyzero );
- return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
- normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
- }
- zExp = aExp - bExp + 0x3FFE;
- rem1 = 0;
- if ( bSig <= aSig ) {
- shift128Right( aSig, 0, 1, &aSig, &rem1 );
- ++zExp;
- }
- zSig0 = estimateDiv128To64( aSig, rem1, bSig );
- mul64To128( bSig, zSig0, &term0, &term1 );
- sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
- --zSig0;
- add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
- }
- zSig1 = estimateDiv128To64( rem1, 0, bSig );
- if ( (bits64) ( zSig1<<1 ) <= 8 ) {
- mul64To128( bSig, zSig1, &term1, &term2 );
- sub128( rem1, 0, term1, term2, &rem1, &rem2 );
- while ( (sbits64) rem1 < 0 ) {
- --zSig1;
- add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
- }
- zSig1 |= ( ( rem1 | rem2 ) != 0 );
- }
- return
- roundAndPackFloatx80(
- floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
+ flag aSign, bSign, zSign;
+ int32 aExp, bExp, zExp;
+ bits64 aSig, bSig, zSig0, zSig1;
+ bits64 rem0, rem1, rem2, term0, term1, term2;
+ floatx80 z;
+
+ aSig = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ bSig = extractFloatx80Frac( b );
+ bExp = extractFloatx80Exp( b );
+ bSign = extractFloatx80Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ if ( bExp == 0x7FFF ) {
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ goto invalid;
+ }
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( bExp == 0x7FFF ) {
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ return packFloatx80( zSign, 0, 0 );
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) {
+ if ( ( aExp | aSig ) == 0 ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = floatx80_default_nan_low;
+ z.high = floatx80_default_nan_high;
+ return z;
+ }
+ float_raise( float_flag_divbyzero );
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
+ }
+ if ( aExp == 0 ) {
+ if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );
+ normalizeFloatx80Subnormal( aSig, &aExp, &aSig );
+ }
+ zExp = aExp - bExp + 0x3FFE;
+ rem1 = 0;
+ if ( bSig <= aSig ) {
+ shift128Right( aSig, 0, 1, &aSig, &rem1 );
+ ++zExp;
+ }
+ zSig0 = estimateDiv128To64( aSig, rem1, bSig );
+ mul64To128( bSig, zSig0, &term0, &term1 );
+ sub128( aSig, rem1, term0, term1, &rem0, &rem1 );
+ while ( (sbits64) rem0 < 0 ) {
+ --zSig0;
+ add128( rem0, rem1, 0, bSig, &rem0, &rem1 );
+ }
+ zSig1 = estimateDiv128To64( rem1, 0, bSig );
+ if ( (bits64) ( zSig1<<1 ) <= 8 ) {
+ mul64To128( bSig, zSig1, &term1, &term2 );
+ sub128( rem1, 0, term1, term2, &rem1, &rem2 );
+ while ( (sbits64) rem1 < 0 ) {
+ --zSig1;
+ add128( rem1, rem2, 0, bSig, &rem1, &rem2 );
+ }
+ zSig1 |= ( ( rem1 | rem2 ) != 0 );
+ }
+ return
+ roundAndPackFloatx80(
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );
}
@@ -3485,92 +3485,92 @@ floatx80 floatx80_div( floatx80 a, floatx80 b )
floatx80 floatx80_rem( floatx80 a, floatx80 b )
{
- flag aSign, zSign;
- int32 aExp, bExp, expDiff;
- bits64 aSig0, aSig1, bSig;
- bits64 q, term0, term1, alternateASig0, alternateASig1;
- floatx80 z;
-
- aSig0 = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- bSig = extractFloatx80Frac( b );
- bExp = extractFloatx80Exp( b );
+ flag aSign, zSign;
+ int32 aExp, bExp, expDiff;
+ bits64 aSig0, aSig1, bSig;
+ bits64 q, term0, term1, alternateASig0, alternateASig1;
+ floatx80 z;
+
+ aSig0 = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ bSig = extractFloatx80Frac( b );
+ bExp = extractFloatx80Exp( b );
// bSign = extractFloatx80Sign( b );
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig0<<1 )
- || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
- return propagateFloatx80NaN( a, b );
- }
- goto invalid;
- }
- if ( bExp == 0x7FFF ) {
- if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- if ( bSig == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
- }
- normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
- }
- if ( aExp == 0 ) {
- if ( (bits64) ( aSig0<<1 ) == 0 ) return a;
- normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
- }
- bSig |= LIT64( 0x8000000000000000 );
- zSign = aSign;
- expDiff = aExp - bExp;
- aSig1 = 0;
- if ( expDiff < 0 ) {
- if ( expDiff < -1 ) return a;
- shift128Right( aSig0, 0, 1, &aSig0, &aSig1 );
- expDiff = 0;
- }
- q = ( bSig <= aSig0 );
- if ( q ) aSig0 -= bSig;
- expDiff -= 64;
- while ( 0 < expDiff ) {
- q = estimateDiv128To64( aSig0, aSig1, bSig );
- q = ( 2 < q ) ? q - 2 : 0;
- mul64To128( bSig, q, &term0, &term1 );
- sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
- shortShift128Left( aSig0, aSig1, 62, &aSig0, &aSig1 );
- expDiff -= 62;
- }
- expDiff += 64;
- if ( 0 < expDiff ) {
- q = estimateDiv128To64( aSig0, aSig1, bSig );
- q = ( 2 < q ) ? q - 2 : 0;
- q >>= 64 - expDiff;
- mul64To128( bSig, q<<( 64 - expDiff ), &term0, &term1 );
- sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
- shortShift128Left( 0, bSig, 64 - expDiff, &term0, &term1 );
- while ( le128( term0, term1, aSig0, aSig1 ) ) {
- ++q;
- sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
- }
- }
- else {
- term1 = 0;
- term0 = bSig;
- }
- sub128( term0, term1, aSig0, aSig1, &alternateASig0, &alternateASig1 );
- if ( lt128( alternateASig0, alternateASig1, aSig0, aSig1 )
- || ( eq128( alternateASig0, alternateASig1, aSig0, aSig1 )
- && ( q & 1 ) )
- ) {
- aSig0 = alternateASig0;
- aSig1 = alternateASig1;
- zSign = ! zSign;
- }
- return
- normalizeRoundAndPackFloatx80(
- 80, zSign, bExp + expDiff, aSig0, aSig1 );
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig0<<1 )
+ || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {
+ return propagateFloatx80NaN( a, b );
+ }
+ goto invalid;
+ }
+ if ( bExp == 0x7FFF ) {
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ if ( bSig == 0 ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = floatx80_default_nan_low;
+ z.high = floatx80_default_nan_high;
+ return z;
+ }
+ normalizeFloatx80Subnormal( bSig, &bExp, &bSig );
+ }
+ if ( aExp == 0 ) {
+ if ( (bits64) ( aSig0<<1 ) == 0 ) return a;
+ normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
+ }
+ bSig |= LIT64( 0x8000000000000000 );
+ zSign = aSign;
+ expDiff = aExp - bExp;
+ aSig1 = 0;
+ if ( expDiff < 0 ) {
+ if ( expDiff < -1 ) return a;
+ shift128Right( aSig0, 0, 1, &aSig0, &aSig1 );
+ expDiff = 0;
+ }
+ q = ( bSig <= aSig0 );
+ if ( q ) aSig0 -= bSig;
+ expDiff -= 64;
+ while ( 0 < expDiff ) {
+ q = estimateDiv128To64( aSig0, aSig1, bSig );
+ q = ( 2 < q ) ? q - 2 : 0;
+ mul64To128( bSig, q, &term0, &term1 );
+ sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
+ shortShift128Left( aSig0, aSig1, 62, &aSig0, &aSig1 );
+ expDiff -= 62;
+ }
+ expDiff += 64;
+ if ( 0 < expDiff ) {
+ q = estimateDiv128To64( aSig0, aSig1, bSig );
+ q = ( 2 < q ) ? q - 2 : 0;
+ q >>= 64 - expDiff;
+ mul64To128( bSig, q<<( 64 - expDiff ), &term0, &term1 );
+ sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
+ shortShift128Left( 0, bSig, 64 - expDiff, &term0, &term1 );
+ while ( le128( term0, term1, aSig0, aSig1 ) ) {
+ ++q;
+ sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );
+ }
+ }
+ else {
+ term1 = 0;
+ term0 = bSig;
+ }
+ sub128( term0, term1, aSig0, aSig1, &alternateASig0, &alternateASig1 );
+ if ( lt128( alternateASig0, alternateASig1, aSig0, aSig1 )
+ || ( eq128( alternateASig0, alternateASig1, aSig0, aSig1 )
+ && ( q & 1 ) )
+ ) {
+ aSig0 = alternateASig0;
+ aSig1 = alternateASig1;
+ zSign = ! zSign;
+ }
+ return
+ normalizeRoundAndPackFloatx80(
+ 80, zSign, bExp + expDiff, aSig0, aSig1 );
}
@@ -3582,65 +3582,65 @@ floatx80 floatx80_rem( floatx80 a, floatx80 b )
floatx80 floatx80_sqrt( floatx80 a )
{
- flag aSign;
- int32 aExp, zExp;
- bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
- floatx80 z;
-
- aSig0 = extractFloatx80Frac( a );
- aExp = extractFloatx80Exp( a );
- aSign = extractFloatx80Sign( a );
- if ( aExp == 0x7FFF ) {
- if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a );
- if ( ! aSign ) return a;
- goto invalid;
- }
- if ( aSign ) {
- if ( ( aExp | aSig0 ) == 0 ) return a;
- invalid:
- float_raise( float_flag_invalid );
- z.low = floatx80_default_nan_low;
- z.high = floatx80_default_nan_high;
- return z;
- }
- if ( aExp == 0 ) {
- if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );
- normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
- }
- zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFF;
- zSig0 = estimateSqrt32( aExp, aSig0>>32 );
- shift128Right( aSig0, 0, 2 + ( aExp & 1 ), &aSig0, &aSig1 );
- zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
- doubleZSig0 = zSig0<<1;
- mul64To128( zSig0, zSig0, &term0, &term1 );
- sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
- --zSig0;
- doubleZSig0 -= 2;
- add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
- }
- zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
- if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <= 5 ) {
- if ( zSig1 == 0 ) zSig1 = 1;
- mul64To128( doubleZSig0, zSig1, &term1, &term2 );
- sub128( rem1, 0, term1, term2, &rem1, &rem2 );
- mul64To128( zSig1, zSig1, &term2, &term3 );
- sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
- --zSig1;
- shortShift128Left( 0, zSig1, 1, &term2, &term3 );
- term3 |= 1;
- term2 |= doubleZSig0;
- add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
- }
- zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
- }
- shortShift128Left( 0, zSig1, 1, &zSig0, &zSig1 );
- zSig0 |= doubleZSig0;
- return
- roundAndPackFloatx80(
- floatx80_rounding_precision, 0, zExp, zSig0, zSig1 );
+ flag aSign;
+ int32 aExp, zExp;
+ bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0;
+ bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ floatx80 z;
+
+ aSig0 = extractFloatx80Frac( a );
+ aExp = extractFloatx80Exp( a );
+ aSign = extractFloatx80Sign( a );
+ if ( aExp == 0x7FFF ) {
+ if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a );
+ if ( ! aSign ) return a;
+ goto invalid;
+ }
+ if ( aSign ) {
+ if ( ( aExp | aSig0 ) == 0 ) return a;
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = floatx80_default_nan_low;
+ z.high = floatx80_default_nan_high;
+ return z;
+ }
+ if ( aExp == 0 ) {
+ if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );
+ normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );
+ }
+ zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFF;
+ zSig0 = estimateSqrt32( aExp, aSig0>>32 );
+ shift128Right( aSig0, 0, 2 + ( aExp & 1 ), &aSig0, &aSig1 );
+ zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
+ doubleZSig0 = zSig0<<1;
+ mul64To128( zSig0, zSig0, &term0, &term1 );
+ sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
+ while ( (sbits64) rem0 < 0 ) {
+ --zSig0;
+ doubleZSig0 -= 2;
+ add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
+ }
+ zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
+ if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <= 5 ) {
+ if ( zSig1 == 0 ) zSig1 = 1;
+ mul64To128( doubleZSig0, zSig1, &term1, &term2 );
+ sub128( rem1, 0, term1, term2, &rem1, &rem2 );
+ mul64To128( zSig1, zSig1, &term2, &term3 );
+ sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
+ while ( (sbits64) rem1 < 0 ) {
+ --zSig1;
+ shortShift128Left( 0, zSig1, 1, &term2, &term3 );
+ term3 |= 1;
+ term2 |= doubleZSig0;
+ add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
+ }
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
+ }
+ shortShift128Left( 0, zSig1, 1, &zSig0, &zSig1 );
+ zSig0 |= doubleZSig0;
+ return
+ roundAndPackFloatx80(
+ floatx80_rounding_precision, 0, zExp, zSig0, zSig1 );
}
@@ -3654,23 +3654,23 @@ floatx80 floatx80_sqrt( floatx80 a )
flag floatx80_eq( floatx80 a, floatx80 b )
{
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- if ( floatx80_is_signaling_nan( a )
- || floatx80_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ if ( floatx80_is_signaling_nan( a )
+ || floatx80_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ return
+ ( a.low == b.low )
+ && ( ( a.high == b.high )
+ || ( ( a.low == 0 )
+ && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
+ );
}
@@ -3683,27 +3683,27 @@ flag floatx80_eq( floatx80 a, floatx80 b )
flag floatx80_le( floatx80 a, floatx80 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloatx80Sign( a );
+ bSign = extractFloatx80Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ == 0 );
+ }
+ return
+ aSign ? le128( b.high, b.low, a.high, a.low )
+ : le128( a.high, a.low, b.high, b.low );
}
@@ -3716,27 +3716,27 @@ flag floatx80_le( floatx80 a, floatx80 b )
flag floatx80_lt( floatx80 a, floatx80 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloatx80Sign( a );
+ bSign = extractFloatx80Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ != 0 );
+ }
+ return
+ aSign ? lt128( b.high, b.low, a.high, a.low )
+ : lt128( a.high, a.low, b.high, b.low );
}
@@ -3750,20 +3750,20 @@ flag floatx80_lt( floatx80 a, floatx80 b )
flag floatx80_eq_signaling( floatx80 a, floatx80 b )
{
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ return
+ ( a.low == b.low )
+ && ( ( a.high == b.high )
+ || ( ( a.low == 0 )
+ && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )
+ );
}
@@ -3776,30 +3776,30 @@ flag floatx80_eq_signaling( floatx80 a, floatx80 b )
flag floatx80_le_quiet( floatx80 a, floatx80 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- if ( floatx80_is_signaling_nan( a )
- || floatx80_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ if ( floatx80_is_signaling_nan( a )
+ || floatx80_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloatx80Sign( a );
+ bSign = extractFloatx80Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ == 0 );
+ }
+ return
+ aSign ? le128( b.high, b.low, a.high, a.low )
+ : le128( a.high, a.low, b.high, b.low );
}
@@ -3812,30 +3812,30 @@ flag floatx80_le_quiet( floatx80 a, floatx80 b )
flag floatx80_lt_quiet( floatx80 a, floatx80 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( a )<<1 ) )
- || ( ( extractFloatx80Exp( b ) == 0x7FFF )
- && (bits64) ( extractFloatx80Frac( b )<<1 ) )
- ) {
- if ( floatx80_is_signaling_nan( a )
- || floatx80_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloatx80Sign( a );
- bSign = extractFloatx80Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )
+ ) {
+ if ( floatx80_is_signaling_nan( a )
+ || floatx80_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloatx80Sign( a );
+ bSign = extractFloatx80Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ != 0 );
+ }
+ return
+ aSign ? lt128( b.high, b.low, a.high, a.low )
+ : lt128( a.high, a.low, b.high, b.low );
}
@@ -3855,20 +3855,20 @@ flag floatx80_lt_quiet( floatx80 a, floatx80 b )
int32 float128_to_int32( float128 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
- if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
- aSig0 |= ( aSig1 != 0 );
- shiftCount = 0x4028 - aExp;
- if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
- return roundAndPackInt32( aSign, aSig0 );
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig0, aSig1;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;
+ if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
+ aSig0 |= ( aSig1 != 0 );
+ shiftCount = 0x4028 - aExp;
+ if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );
+ return roundAndPackInt32( aSign, aSig0 );
}
@@ -3884,39 +3884,39 @@ int32 float128_to_int32( float128 a )
int32 float128_to_int32_round_to_zero( float128 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig0, aSig1, savedASig;
- int32 z;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- aSig0 |= ( aSig1 != 0 );
- if ( 0x401E < aExp ) {
- if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
- goto invalid;
- }
- else if ( aExp < 0x3FFF ) {
- if ( aExp || aSig0 ) float_exception_flags |= float_flag_inexact;
- return 0;
- }
- aSig0 |= LIT64( 0x0001000000000000 );
- shiftCount = 0x402F - aExp;
- savedASig = aSig0;
- aSig0 >>= shiftCount;
- z = aSig0;
- if ( aSign ) z = - z;
- if ( ( z < 0 ) ^ aSign ) {
- invalid:
- float_raise( float_flag_invalid );
- return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
- }
- if ( ( aSig0<<shiftCount ) != savedASig ) {
- float_exception_flags |= float_flag_inexact;
- }
- return z;
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig0, aSig1, savedASig;
+ int32 z;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ aSig0 |= ( aSig1 != 0 );
+ if ( 0x401E < aExp ) {
+ if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;
+ goto invalid;
+ }
+ else if ( aExp < 0x3FFF ) {
+ if ( aExp || aSig0 ) float_exception_flags |= float_flag_inexact;
+ return 0;
+ }
+ aSig0 |= LIT64( 0x0001000000000000 );
+ shiftCount = 0x402F - aExp;
+ savedASig = aSig0;
+ aSig0 >>= shiftCount;
+ z = aSig0;
+ if ( aSign ) z = - z;
+ if ( ( z < 0 ) ^ aSign ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;
+ }
+ if ( ( aSig0<<shiftCount ) != savedASig ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ return z;
}
@@ -3932,34 +3932,34 @@ int32 float128_to_int32_round_to_zero( float128 a )
int64 float128_to_int64( float128 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
- shiftCount = 0x402F - aExp;
- if ( shiftCount <= 0 ) {
- if ( 0x403E < aExp ) {
- float_raise( float_flag_invalid );
- if ( ! aSign
- || ( ( aExp == 0x7FFF )
- && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
- )
- ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
- }
- else {
- shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1 );
- }
- return roundAndPackInt64( aSign, aSig0, aSig1 );
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig0, aSig1;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
+ shiftCount = 0x402F - aExp;
+ if ( shiftCount <= 0 ) {
+ if ( 0x403E < aExp ) {
+ float_raise( float_flag_invalid );
+ if ( ! aSign
+ || ( ( aExp == 0x7FFF )
+ && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )
+ )
+ ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );
+ }
+ else {
+ shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1 );
+ }
+ return roundAndPackInt64( aSign, aSig0, aSig1 );
}
@@ -3975,52 +3975,52 @@ int64 float128_to_int64( float128 a )
int64 float128_to_int64_round_to_zero( float128 a )
{
- flag aSign;
- int32 aExp, shiftCount;
- bits64 aSig0, aSig1;
- int64 z;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
- shiftCount = aExp - 0x402F;
- if ( 0 < shiftCount ) {
- if ( 0x403E <= aExp ) {
- aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );
- if ( ( a.high == LIT64( 0xC03E000000000000 ) )
- && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {
- if ( aSig1 ) float_exception_flags |= float_flag_inexact;
- }
- else {
- float_raise( float_flag_invalid );
- if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {
- return LIT64( 0x7FFFFFFFFFFFFFFF );
- }
- }
- return (sbits64) LIT64( 0x8000000000000000 );
- }
- z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
- if ( (bits64) ( aSig1<<shiftCount ) ) {
- float_exception_flags |= float_flag_inexact;
- }
- }
- else {
- if ( aExp < 0x3FFF ) {
- if ( aExp | aSig0 | aSig1 ) {
- float_exception_flags |= float_flag_inexact;
- }
- return 0;
- }
- z = aSig0>>( - shiftCount );
- if ( aSig1
- || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) {
- float_exception_flags |= float_flag_inexact;
- }
- }
- if ( aSign ) z = - z;
- return z;
+ flag aSign;
+ int32 aExp, shiftCount;
+ bits64 aSig0, aSig1;
+ int64 z;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );
+ shiftCount = aExp - 0x402F;
+ if ( 0 < shiftCount ) {
+ if ( 0x403E <= aExp ) {
+ aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );
+ if ( ( a.high == LIT64( 0xC03E000000000000 ) )
+ && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {
+ if ( aSig1 ) float_exception_flags |= float_flag_inexact;
+ }
+ else {
+ float_raise( float_flag_invalid );
+ if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {
+ return LIT64( 0x7FFFFFFFFFFFFFFF );
+ }
+ }
+ return (sbits64) LIT64( 0x8000000000000000 );
+ }
+ z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );
+ if ( (bits64) ( aSig1<<shiftCount ) ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ }
+ else {
+ if ( aExp < 0x3FFF ) {
+ if ( aExp | aSig0 | aSig1 ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ return 0;
+ }
+ z = aSig0>>( - shiftCount );
+ if ( aSig1
+ || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ }
+ if ( aSign ) z = - z;
+ return z;
}
@@ -4033,29 +4033,29 @@ int64 float128_to_int64_round_to_zero( float128 a )
float32 float128_to_float32( float128 a )
{
- flag aSign;
- int32 aExp;
- bits64 aSig0, aSig1;
- bits32 zSig;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 ) {
- return commonNaNToFloat32( float128ToCommonNaN( a ) );
- }
- return packFloat32( aSign, 0xFF, 0 );
- }
- aSig0 |= ( aSig1 != 0 );
- shift64RightJamming( aSig0, 18, &aSig0 );
- zSig = aSig0;
- if ( aExp || zSig ) {
- zSig |= 0x40000000;
- aExp -= 0x3F81;
- }
- return roundAndPackFloat32( aSign, aExp, zSig );
+ flag aSign;
+ int32 aExp;
+ bits64 aSig0, aSig1;
+ bits32 zSig;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 ) {
+ return commonNaNToFloat32( float128ToCommonNaN( a ) );
+ }
+ return packFloat32( aSign, 0xFF, 0 );
+ }
+ aSig0 |= ( aSig1 != 0 );
+ shift64RightJamming( aSig0, 18, &aSig0 );
+ zSig = aSig0;
+ if ( aExp || zSig ) {
+ zSig |= 0x40000000;
+ aExp -= 0x3F81;
+ }
+ return roundAndPackFloat32( aSign, aExp, zSig );
}
@@ -4068,27 +4068,27 @@ float32 float128_to_float32( float128 a )
float64 float128_to_float64( float128 a )
{
- flag aSign;
- int32 aExp;
- bits64 aSig0, aSig1;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 ) {
- return commonNaNToFloat64( float128ToCommonNaN( a ) );
- }
- return packFloat64( aSign, 0x7FF, 0 );
- }
- shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
- aSig0 |= ( aSig1 != 0 );
- if ( aExp || aSig0 ) {
- aSig0 |= LIT64( 0x4000000000000000 );
- aExp -= 0x3C01;
- }
- return roundAndPackFloat64( aSign, aExp, aSig0 );
+ flag aSign;
+ int32 aExp;
+ bits64 aSig0, aSig1;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 ) {
+ return commonNaNToFloat64( float128ToCommonNaN( a ) );
+ }
+ return packFloat64( aSign, 0x7FF, 0 );
+ }
+ shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
+ aSig0 |= ( aSig1 != 0 );
+ if ( aExp || aSig0 ) {
+ aSig0 |= LIT64( 0x4000000000000000 );
+ aExp -= 0x3C01;
+ }
+ return roundAndPackFloat64( aSign, aExp, aSig0 );
}
@@ -4103,29 +4103,29 @@ float64 float128_to_float64( float128 a )
floatx80 float128_to_floatx80( float128 a )
{
- flag aSign;
- int32 aExp;
- bits64 aSig0, aSig1;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 ) {
- return commonNaNToFloatx80( float128ToCommonNaN( a ) );
- }
- return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
- normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- else {
- aSig0 |= LIT64( 0x0001000000000000 );
- }
- shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
- return roundAndPackFloatx80( 80, aSign, aExp, aSig0, aSig1 );
+ flag aSign;
+ int32 aExp;
+ bits64 aSig0, aSig1;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 ) {
+ return commonNaNToFloatx80( float128ToCommonNaN( a ) );
+ }
+ return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );
+ }
+ if ( aExp == 0 ) {
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
+ }
+ else {
+ aSig0 |= LIT64( 0x0001000000000000 );
+ }
+ shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );
+ return roundAndPackFloatx80( 80, aSign, aExp, aSig0, aSig1 );
}
@@ -4140,97 +4140,97 @@ floatx80 float128_to_floatx80( float128 a )
float128 float128_round_to_int( float128 a )
{
- flag aSign;
- int32 aExp;
- bits64 lastBitMask, roundBitsMask;
- int8 roundingMode;
- float128 z;
-
- aExp = extractFloat128Exp( a );
- if ( 0x402F <= aExp ) {
- if ( 0x406F <= aExp ) {
- if ( ( aExp == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )
- ) {
- return propagateFloat128NaN( a, a );
- }
- return a;
- }
- lastBitMask = 1;
- lastBitMask = ( lastBitMask<<( 0x406E - aExp ) )<<1;
- roundBitsMask = lastBitMask - 1;
- z = a;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- if ( lastBitMask ) {
- add128( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );
- if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
- }
- else {
- if ( (sbits64) z.low < 0 ) {
- ++z.high;
- if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1;
- }
- }
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloat128Sign( z )
- ^ ( roundingMode == float_round_up ) ) {
- add128( z.high, z.low, 0, roundBitsMask, &z.high, &z.low );
- }
- }
- z.low &= ~ roundBitsMask;
- }
- else {
- if ( aExp < 0x3FFF ) {
- if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
- float_exception_flags |= float_flag_inexact;
- aSign = extractFloat128Sign( a );
- switch ( float_rounding_mode ) {
- case float_round_nearest_even:
- if ( ( aExp == 0x3FFE )
- && ( extractFloat128Frac0( a )
- | extractFloat128Frac1( a ) )
- ) {
- return packFloat128( aSign, 0x3FFF, 0, 0 );
- }
- break;
- case float_round_down:
- return
- aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
- : packFloat128( 0, 0, 0, 0 );
- case float_round_up:
- return
- aSign ? packFloat128( 1, 0, 0, 0 )
- : packFloat128( 0, 0x3FFF, 0, 0 );
- }
- return packFloat128( aSign, 0, 0, 0 );
- }
- lastBitMask = 1;
- lastBitMask <<= 0x402F - aExp;
- roundBitsMask = lastBitMask - 1;
- z.low = 0;
- z.high = a.high;
- roundingMode = float_rounding_mode;
- if ( roundingMode == float_round_nearest_even ) {
- z.high += lastBitMask>>1;
- if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {
- z.high &= ~ lastBitMask;
- }
- }
- else if ( roundingMode != float_round_to_zero ) {
- if ( extractFloat128Sign( z )
- ^ ( roundingMode == float_round_up ) ) {
- z.high |= ( a.low != 0 );
- z.high += roundBitsMask;
- }
- }
- z.high &= ~ roundBitsMask;
- }
- if ( ( z.low != a.low ) || ( z.high != a.high ) ) {
- float_exception_flags |= float_flag_inexact;
- }
- return z;
+ flag aSign;
+ int32 aExp;
+ bits64 lastBitMask, roundBitsMask;
+ int8 roundingMode;
+ float128 z;
+
+ aExp = extractFloat128Exp( a );
+ if ( 0x402F <= aExp ) {
+ if ( 0x406F <= aExp ) {
+ if ( ( aExp == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )
+ ) {
+ return propagateFloat128NaN( a, a );
+ }
+ return a;
+ }
+ lastBitMask = 1;
+ lastBitMask = ( lastBitMask<<( 0x406E - aExp ) )<<1;
+ roundBitsMask = lastBitMask - 1;
+ z = a;
+ roundingMode = float_rounding_mode;
+ if ( roundingMode == float_round_nearest_even ) {
+ if ( lastBitMask ) {
+ add128( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );
+ if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;
+ }
+ else {
+ if ( (sbits64) z.low < 0 ) {
+ ++z.high;
+ if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1;
+ }
+ }
+ }
+ else if ( roundingMode != float_round_to_zero ) {
+ if ( extractFloat128Sign( z )
+ ^ ( roundingMode == float_round_up ) ) {
+ add128( z.high, z.low, 0, roundBitsMask, &z.high, &z.low );
+ }
+ }
+ z.low &= ~ roundBitsMask;
+ }
+ else {
+ if ( aExp < 0x3FFF ) {
+ if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a;
+ float_exception_flags |= float_flag_inexact;
+ aSign = extractFloat128Sign( a );
+ switch ( float_rounding_mode ) {
+ case float_round_nearest_even:
+ if ( ( aExp == 0x3FFE )
+ && ( extractFloat128Frac0( a )
+ | extractFloat128Frac1( a ) )
+ ) {
+ return packFloat128( aSign, 0x3FFF, 0, 0 );
+ }
+ break;
+ case float_round_down:
+ return
+ aSign ? packFloat128( 1, 0x3FFF, 0, 0 )
+ : packFloat128( 0, 0, 0, 0 );
+ case float_round_up:
+ return
+ aSign ? packFloat128( 1, 0, 0, 0 )
+ : packFloat128( 0, 0x3FFF, 0, 0 );
+ }
+ return packFloat128( aSign, 0, 0, 0 );
+ }
+ lastBitMask = 1;
+ lastBitMask <<= 0x402F - aExp;
+ roundBitsMask = lastBitMask - 1;
+ z.low = 0;
+ z.high = a.high;
+ roundingMode = float_rounding_mode;
+ if ( roundingMode == float_round_nearest_even ) {
+ z.high += lastBitMask>>1;
+ if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {
+ z.high &= ~ lastBitMask;
+ }
+ }
+ else if ( roundingMode != float_round_to_zero ) {
+ if ( extractFloat128Sign( z )
+ ^ ( roundingMode == float_round_up ) ) {
+ z.high |= ( a.low != 0 );
+ z.high += roundBitsMask;
+ }
+ }
+ z.high &= ~ roundBitsMask;
+ }
+ if ( ( z.low != a.low ) || ( z.high != a.high ) ) {
+ float_exception_flags |= float_flag_inexact;
+ }
+ return z;
}
@@ -4244,71 +4244,71 @@ float128 float128_round_to_int( float128 a )
static float128 addFloat128Sigs( float128 a, float128 b, flag zSign )
{
- int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
- int32 expDiff;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- bSig1 = extractFloat128Frac1( b );
- bSig0 = extractFloat128Frac0( b );
- bExp = extractFloat128Exp( b );
- expDiff = aExp - bExp;
- if ( 0 < expDiff ) {
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig0 |= LIT64( 0x0001000000000000 );
- }
- shift128ExtraRightJamming(
- bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
- zExp = aExp;
- }
- else if ( expDiff < 0 ) {
- if ( bExp == 0x7FFF ) {
- if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
- return packFloat128( zSign, 0x7FFF, 0, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig0 |= LIT64( 0x0001000000000000 );
- }
- shift128ExtraRightJamming(
- aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
- zExp = bExp;
- }
- else {
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
- return propagateFloat128NaN( a, b );
- }
- return a;
- }
- add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
- if ( aExp == 0 ) return packFloat128( zSign, 0, zSig0, zSig1 );
- zSig2 = 0;
- zSig0 |= LIT64( 0x0002000000000000 );
- zExp = aExp;
- goto shiftRight1;
- }
- aSig0 |= LIT64( 0x0001000000000000 );
- add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
- --zExp;
- if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;
- ++zExp;
- shiftRight1:
- shift128ExtraRightJamming(
- zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
- roundAndPack:
- return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
+ int32 aExp, bExp, zExp;
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
+ int32 expDiff;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ bSig1 = extractFloat128Frac1( b );
+ bSig0 = extractFloat128Frac0( b );
+ bExp = extractFloat128Exp( b );
+ expDiff = aExp - bExp;
+ if ( 0 < expDiff ) {
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ --expDiff;
+ }
+ else {
+ bSig0 |= LIT64( 0x0001000000000000 );
+ }
+ shift128ExtraRightJamming(
+ bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );
+ zExp = aExp;
+ }
+ else if ( expDiff < 0 ) {
+ if ( bExp == 0x7FFF ) {
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
+ return packFloat128( zSign, 0x7FFF, 0, 0 );
+ }
+ if ( aExp == 0 ) {
+ ++expDiff;
+ }
+ else {
+ aSig0 |= LIT64( 0x0001000000000000 );
+ }
+ shift128ExtraRightJamming(
+ aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );
+ zExp = bExp;
+ }
+ else {
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
+ return propagateFloat128NaN( a, b );
+ }
+ return a;
+ }
+ add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
+ if ( aExp == 0 ) return packFloat128( zSign, 0, zSig0, zSig1 );
+ zSig2 = 0;
+ zSig0 |= LIT64( 0x0002000000000000 );
+ zExp = aExp;
+ goto shiftRight1;
+ }
+ aSig0 |= LIT64( 0x0001000000000000 );
+ add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
+ --zExp;
+ if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;
+ ++zExp;
+ shiftRight1:
+ shift128ExtraRightJamming(
+ zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
+ roundAndPack:
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
}
@@ -4322,77 +4322,77 @@ static float128 addFloat128Sigs( float128 a, float128 b, flag zSign )
static float128 subFloat128Sigs( float128 a, float128 b, flag zSign )
{
- int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
- int32 expDiff;
- float128 z;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- bSig1 = extractFloat128Frac1( b );
- bSig0 = extractFloat128Frac0( b );
- bExp = extractFloat128Exp( b );
- expDiff = aExp - bExp;
- shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
- shortShift128Left( bSig0, bSig1, 14, &bSig0, &bSig1 );
- if ( 0 < expDiff ) goto aExpBigger;
- if ( expDiff < 0 ) goto bExpBigger;
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
- return propagateFloat128NaN( a, b );
- }
- float_raise( float_flag_invalid );
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
- }
- if ( aExp == 0 ) {
- aExp = 1;
- bExp = 1;
- }
- if ( bSig0 < aSig0 ) goto aBigger;
- if ( aSig0 < bSig0 ) goto bBigger;
- if ( bSig1 < aSig1 ) goto aBigger;
- if ( aSig1 < bSig1 ) goto bBigger;
- return packFloat128( float_rounding_mode == float_round_down, 0, 0, 0 );
- bExpBigger:
- if ( bExp == 0x7FFF ) {
- if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
- return packFloat128( zSign ^ 1, 0x7FFF, 0, 0 );
- }
- if ( aExp == 0 ) {
- ++expDiff;
- }
- else {
- aSig0 |= LIT64( 0x4000000000000000 );
- }
- shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
- bSig0 |= LIT64( 0x4000000000000000 );
- bBigger:
- sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
- zExp = bExp;
- zSign ^= 1;
- goto normalizeRoundAndPack;
- aExpBigger:
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- --expDiff;
- }
- else {
- bSig0 |= LIT64( 0x4000000000000000 );
- }
- shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
- aSig0 |= LIT64( 0x4000000000000000 );
- aBigger:
- sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
- zExp = aExp;
- normalizeRoundAndPack:
- --zExp;
- return normalizeRoundAndPackFloat128( zSign, zExp - 14, zSig0, zSig1 );
+ int32 aExp, bExp, zExp;
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;
+ int32 expDiff;
+ float128 z;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ bSig1 = extractFloat128Frac1( b );
+ bSig0 = extractFloat128Frac0( b );
+ bExp = extractFloat128Exp( b );
+ expDiff = aExp - bExp;
+ shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );
+ shortShift128Left( bSig0, bSig1, 14, &bSig0, &bSig1 );
+ if ( 0 < expDiff ) goto aExpBigger;
+ if ( expDiff < 0 ) goto bExpBigger;
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 | bSig0 | bSig1 ) {
+ return propagateFloat128NaN( a, b );
+ }
+ float_raise( float_flag_invalid );
+ z.low = float128_default_nan_low;
+ z.high = float128_default_nan_high;
+ return z;
+ }
+ if ( aExp == 0 ) {
+ aExp = 1;
+ bExp = 1;
+ }
+ if ( bSig0 < aSig0 ) goto aBigger;
+ if ( aSig0 < bSig0 ) goto bBigger;
+ if ( bSig1 < aSig1 ) goto aBigger;
+ if ( aSig1 < bSig1 ) goto bBigger;
+ return packFloat128( float_rounding_mode == float_round_down, 0, 0, 0 );
+ bExpBigger:
+ if ( bExp == 0x7FFF ) {
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
+ return packFloat128( zSign ^ 1, 0x7FFF, 0, 0 );
+ }
+ if ( aExp == 0 ) {
+ ++expDiff;
+ }
+ else {
+ aSig0 |= LIT64( 0x4000000000000000 );
+ }
+ shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
+ bSig0 |= LIT64( 0x4000000000000000 );
+ bBigger:
+ sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );
+ zExp = bExp;
+ zSign ^= 1;
+ goto normalizeRoundAndPack;
+ aExpBigger:
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ --expDiff;
+ }
+ else {
+ bSig0 |= LIT64( 0x4000000000000000 );
+ }
+ shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );
+ aSig0 |= LIT64( 0x4000000000000000 );
+ aBigger:
+ sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );
+ zExp = aExp;
+ normalizeRoundAndPack:
+ --zExp;
+ return normalizeRoundAndPackFloat128( zSign, zExp - 14, zSig0, zSig1 );
}
@@ -4404,16 +4404,16 @@ static float128 subFloat128Sigs( float128 a, float128 b, flag zSign )
float128 float128_add( float128 a, float128 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign == bSign ) {
- return addFloat128Sigs( a, b, aSign );
- }
- else {
- return subFloat128Sigs( a, b, aSign );
- }
+ aSign = extractFloat128Sign( a );
+ bSign = extractFloat128Sign( b );
+ if ( aSign == bSign ) {
+ return addFloat128Sigs( a, b, aSign );
+ }
+ else {
+ return subFloat128Sigs( a, b, aSign );
+ }
}
@@ -4425,16 +4425,16 @@ float128 float128_add( float128 a, float128 b )
float128 float128_sub( float128 a, float128 b )
{
- flag aSign, bSign;
+ flag aSign, bSign;
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign == bSign ) {
- return subFloat128Sigs( a, b, aSign );
- }
- else {
- return addFloat128Sigs( a, b, aSign );
- }
+ aSign = extractFloat128Sign( a );
+ bSign = extractFloat128Sign( b );
+ if ( aSign == bSign ) {
+ return subFloat128Sigs( a, b, aSign );
+ }
+ else {
+ return addFloat128Sigs( a, b, aSign );
+ }
}
@@ -4446,59 +4446,59 @@ float128 float128_sub( float128 a, float128 b )
float128 float128_mul( float128 a, float128 b )
{
- flag aSign, bSign, zSign;
- int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
- float128 z;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- bSig1 = extractFloat128Frac1( b );
- bSig0 = extractFloat128Frac0( b );
- bExp = extractFloat128Exp( b );
- bSign = extractFloat128Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FFF ) {
- if ( ( aSig0 | aSig1 )
- || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
- return propagateFloat128NaN( a, b );
- }
- if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;
- return packFloat128( zSign, 0x7FFF, 0, 0 );
- }
- if ( bExp == 0x7FFF ) {
- if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
- if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
- }
- return packFloat128( zSign, 0x7FFF, 0, 0 );
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
- normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- if ( bExp == 0 ) {
- if ( ( bSig0 | bSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
- normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
- }
- zExp = aExp + bExp - 0x4000;
- aSig0 |= LIT64( 0x0001000000000000 );
- shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );
- mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
- add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
- zSig2 |= ( zSig3 != 0 );
- if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {
- shift128ExtraRightJamming(
- zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
- ++zExp;
- }
- return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
+ flag aSign, bSign, zSign;
+ int32 aExp, bExp, zExp;
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;
+ float128 z;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ bSig1 = extractFloat128Frac1( b );
+ bSig0 = extractFloat128Frac0( b );
+ bExp = extractFloat128Exp( b );
+ bSign = extractFloat128Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0x7FFF ) {
+ if ( ( aSig0 | aSig1 )
+ || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
+ return propagateFloat128NaN( a, b );
+ }
+ if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;
+ return packFloat128( zSign, 0x7FFF, 0, 0 );
+ }
+ if ( bExp == 0x7FFF ) {
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = float128_default_nan_low;
+ z.high = float128_default_nan_high;
+ return z;
+ }
+ return packFloat128( zSign, 0x7FFF, 0, 0 );
+ }
+ if ( aExp == 0 ) {
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
+ }
+ if ( bExp == 0 ) {
+ if ( ( bSig0 | bSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
+ normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
+ }
+ zExp = aExp + bExp - 0x4000;
+ aSig0 |= LIT64( 0x0001000000000000 );
+ shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );
+ mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );
+ add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );
+ zSig2 |= ( zSig3 != 0 );
+ if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {
+ shift128ExtraRightJamming(
+ zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );
+ ++zExp;
+ }
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
}
@@ -4510,79 +4510,79 @@ float128 float128_mul( float128 a, float128 b )
float128 float128_div( float128 a, float128 b )
{
- flag aSign, bSign, zSign;
- int32 aExp, bExp, zExp;
- bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
- float128 z;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- bSig1 = extractFloat128Frac1( b );
- bSig0 = extractFloat128Frac0( b );
- bExp = extractFloat128Exp( b );
- bSign = extractFloat128Sign( b );
- zSign = aSign ^ bSign;
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
- if ( bExp == 0x7FFF ) {
- if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
- goto invalid;
- }
- return packFloat128( zSign, 0x7FFF, 0, 0 );
- }
- if ( bExp == 0x7FFF ) {
- if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
- return packFloat128( zSign, 0, 0, 0 );
- }
- if ( bExp == 0 ) {
- if ( ( bSig0 | bSig1 ) == 0 ) {
- if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
- }
- float_raise( float_flag_divbyzero );
- return packFloat128( zSign, 0x7FFF, 0, 0 );
- }
- normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
- normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- zExp = aExp - bExp + 0x3FFD;
- shortShift128Left(
- aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );
- shortShift128Left(
- bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
- if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {
- shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
- ++zExp;
- }
- zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
- mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
- sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
- while ( (sbits64) rem0 < 0 ) {
- --zSig0;
- add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
- }
- zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );
- if ( ( zSig1 & 0x3FFF ) <= 4 ) {
- mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
- sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
- --zSig1;
- add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
- }
- zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
- }
- shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );
- return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
+ flag aSign, bSign, zSign;
+ int32 aExp, bExp, zExp;
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;
+ bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ float128 z;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ bSig1 = extractFloat128Frac1( b );
+ bSig0 = extractFloat128Frac0( b );
+ bExp = extractFloat128Exp( b );
+ bSign = extractFloat128Sign( b );
+ zSign = aSign ^ bSign;
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );
+ if ( bExp == 0x7FFF ) {
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
+ goto invalid;
+ }
+ return packFloat128( zSign, 0x7FFF, 0, 0 );
+ }
+ if ( bExp == 0x7FFF ) {
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
+ return packFloat128( zSign, 0, 0, 0 );
+ }
+ if ( bExp == 0 ) {
+ if ( ( bSig0 | bSig1 ) == 0 ) {
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = float128_default_nan_low;
+ z.high = float128_default_nan_high;
+ return z;
+ }
+ float_raise( float_flag_divbyzero );
+ return packFloat128( zSign, 0x7FFF, 0, 0 );
+ }
+ normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
+ }
+ if ( aExp == 0 ) {
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
+ }
+ zExp = aExp - bExp + 0x3FFD;
+ shortShift128Left(
+ aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );
+ shortShift128Left(
+ bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
+ if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {
+ shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );
+ ++zExp;
+ }
+ zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );
+ mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );
+ sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );
+ while ( (sbits64) rem0 < 0 ) {
+ --zSig0;
+ add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );
+ }
+ zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );
+ if ( ( zSig1 & 0x3FFF ) <= 4 ) {
+ mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );
+ sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );
+ while ( (sbits64) rem1 < 0 ) {
+ --zSig1;
+ add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );
+ }
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
+ }
+ shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
}
@@ -4594,105 +4594,105 @@ float128 float128_div( float128 a, float128 b )
float128 float128_rem( float128 a, float128 b )
{
- flag aSign, zSign;
- int32 aExp, bExp, expDiff;
- bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
- bits64 allZero, alternateASig0, alternateASig1, sigMean1;
- sbits64 sigMean0;
- float128 z;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- bSig1 = extractFloat128Frac1( b );
- bSig0 = extractFloat128Frac0( b );
- bExp = extractFloat128Exp( b );
+ flag aSign, zSign;
+ int32 aExp, bExp, expDiff;
+ bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;
+ bits64 allZero, alternateASig0, alternateASig1, sigMean1;
+ sbits64 sigMean0;
+ float128 z;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ bSig1 = extractFloat128Frac1( b );
+ bSig0 = extractFloat128Frac0( b );
+ bExp = extractFloat128Exp( b );
// bSign = extractFloat128Sign( b );
- if ( aExp == 0x7FFF ) {
- if ( ( aSig0 | aSig1 )
- || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
- return propagateFloat128NaN( a, b );
- }
- goto invalid;
- }
- if ( bExp == 0x7FFF ) {
- if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
- return a;
- }
- if ( bExp == 0 ) {
- if ( ( bSig0 | bSig1 ) == 0 ) {
- invalid:
- float_raise( float_flag_invalid );
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
- }
- normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return a;
- normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- expDiff = aExp - bExp;
- if ( expDiff < -1 ) return a;
- shortShift128Left(
- aSig0 | LIT64( 0x0001000000000000 ),
- aSig1,
- 15 - ( expDiff < 0 ),
- &aSig0,
- &aSig1
- );
- shortShift128Left(
- bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
- q = le128( bSig0, bSig1, aSig0, aSig1 );
- if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
- expDiff -= 64;
- while ( 0 < expDiff ) {
- q = estimateDiv128To64( aSig0, aSig1, bSig0 );
- q = ( 4 < q ) ? q - 4 : 0;
- mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
- shortShift192Left( term0, term1, term2, 61, &term1, &term2, &allZero );
- shortShift128Left( aSig0, aSig1, 61, &aSig0, &allZero );
- sub128( aSig0, 0, term1, term2, &aSig0, &aSig1 );
- expDiff -= 61;
- }
- if ( -64 < expDiff ) {
- q = estimateDiv128To64( aSig0, aSig1, bSig0 );
- q = ( 4 < q ) ? q - 4 : 0;
- q >>= - expDiff;
- shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
- expDiff += 52;
- if ( expDiff < 0 ) {
- shift128Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
- }
- else {
- shortShift128Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );
- }
- mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
- sub128( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );
- }
- else {
- shift128Right( aSig0, aSig1, 12, &aSig0, &aSig1 );
- shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
- }
- do {
- alternateASig0 = aSig0;
- alternateASig1 = aSig1;
- ++q;
- sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
- } while ( 0 <= (sbits64) aSig0 );
- add128(
- aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0, &sigMean1 );
- if ( ( sigMean0 < 0 )
- || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
- aSig0 = alternateASig0;
- aSig1 = alternateASig1;
- }
- zSign = ( (sbits64) aSig0 < 0 );
- if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
- return
- normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 );
+ if ( aExp == 0x7FFF ) {
+ if ( ( aSig0 | aSig1 )
+ || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {
+ return propagateFloat128NaN( a, b );
+ }
+ goto invalid;
+ }
+ if ( bExp == 0x7FFF ) {
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );
+ return a;
+ }
+ if ( bExp == 0 ) {
+ if ( ( bSig0 | bSig1 ) == 0 ) {
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = float128_default_nan_low;
+ z.high = float128_default_nan_high;
+ return z;
+ }
+ normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );
+ }
+ if ( aExp == 0 ) {
+ if ( ( aSig0 | aSig1 ) == 0 ) return a;
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
+ }
+ expDiff = aExp - bExp;
+ if ( expDiff < -1 ) return a;
+ shortShift128Left(
+ aSig0 | LIT64( 0x0001000000000000 ),
+ aSig1,
+ 15 - ( expDiff < 0 ),
+ &aSig0,
+ &aSig1
+ );
+ shortShift128Left(
+ bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );
+ q = le128( bSig0, bSig1, aSig0, aSig1 );
+ if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
+ expDiff -= 64;
+ while ( 0 < expDiff ) {
+ q = estimateDiv128To64( aSig0, aSig1, bSig0 );
+ q = ( 4 < q ) ? q - 4 : 0;
+ mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
+ shortShift192Left( term0, term1, term2, 61, &term1, &term2, &allZero );
+ shortShift128Left( aSig0, aSig1, 61, &aSig0, &allZero );
+ sub128( aSig0, 0, term1, term2, &aSig0, &aSig1 );
+ expDiff -= 61;
+ }
+ if ( -64 < expDiff ) {
+ q = estimateDiv128To64( aSig0, aSig1, bSig0 );
+ q = ( 4 < q ) ? q - 4 : 0;
+ q >>= - expDiff;
+ shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
+ expDiff += 52;
+ if ( expDiff < 0 ) {
+ shift128Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );
+ }
+ else {
+ shortShift128Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );
+ }
+ mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );
+ sub128( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );
+ }
+ else {
+ shift128Right( aSig0, aSig1, 12, &aSig0, &aSig1 );
+ shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );
+ }
+ do {
+ alternateASig0 = aSig0;
+ alternateASig1 = aSig1;
+ ++q;
+ sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );
+ } while ( 0 <= (sbits64) aSig0 );
+ add128(
+ aSig0, aSig1, alternateASig0, alternateASig1, (bits64 *)&sigMean0, &sigMean1 );
+ if ( ( sigMean0 < 0 )
+ || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {
+ aSig0 = alternateASig0;
+ aSig1 = alternateASig1;
+ }
+ zSign = ( (sbits64) aSig0 < 0 );
+ if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );
+ return
+ normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 );
}
@@ -4704,64 +4704,64 @@ float128 float128_rem( float128 a, float128 b )
float128 float128_sqrt( float128 a )
{
- flag aSign;
- int32 aExp, zExp;
- bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
- bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
- float128 z;
-
- aSig1 = extractFloat128Frac1( a );
- aSig0 = extractFloat128Frac0( a );
- aExp = extractFloat128Exp( a );
- aSign = extractFloat128Sign( a );
- if ( aExp == 0x7FFF ) {
- if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, a );
- if ( ! aSign ) return a;
- goto invalid;
- }
- if ( aSign ) {
- if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
- invalid:
- float_raise( float_flag_invalid );
- z.low = float128_default_nan_low;
- z.high = float128_default_nan_high;
- return z;
- }
- if ( aExp == 0 ) {
- if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
- normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
- }
- zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
- aSig0 |= LIT64( 0x0001000000000000 );
- zSig0 = estimateSqrt32( aExp, aSig0>>17 );
- shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
- zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
- doubleZSig0 = zSig0<<1;
- mul64To128( zSig0, zSig0, &term0, &term1 );
- sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
- while ( (sbits64) rem0 < 0 ) {
- --zSig0;
- doubleZSig0 -= 2;
- add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
- }
- zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
- if ( ( zSig1 & 0x1FFF ) <= 5 ) {
- if ( zSig1 == 0 ) zSig1 = 1;
- mul64To128( doubleZSig0, zSig1, &term1, &term2 );
- sub128( rem1, 0, term1, term2, &rem1, &rem2 );
- mul64To128( zSig1, zSig1, &term2, &term3 );
- sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
- while ( (sbits64) rem1 < 0 ) {
- --zSig1;
- shortShift128Left( 0, zSig1, 1, &term2, &term3 );
- term3 |= 1;
- term2 |= doubleZSig0;
- add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
- }
- zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
- }
- shift128ExtraRightJamming( zSig0, zSig1, 0, 14, &zSig0, &zSig1, &zSig2 );
- return roundAndPackFloat128( 0, zExp, zSig0, zSig1, zSig2 );
+ flag aSign;
+ int32 aExp, zExp;
+ bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;
+ bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;
+ float128 z;
+
+ aSig1 = extractFloat128Frac1( a );
+ aSig0 = extractFloat128Frac0( a );
+ aExp = extractFloat128Exp( a );
+ aSign = extractFloat128Sign( a );
+ if ( aExp == 0x7FFF ) {
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, a );
+ if ( ! aSign ) return a;
+ goto invalid;
+ }
+ if ( aSign ) {
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;
+ invalid:
+ float_raise( float_flag_invalid );
+ z.low = float128_default_nan_low;
+ z.high = float128_default_nan_high;
+ return z;
+ }
+ if ( aExp == 0 ) {
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );
+ }
+ zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;
+ aSig0 |= LIT64( 0x0001000000000000 );
+ zSig0 = estimateSqrt32( aExp, aSig0>>17 );
+ shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );
+ zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );
+ doubleZSig0 = zSig0<<1;
+ mul64To128( zSig0, zSig0, &term0, &term1 );
+ sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );
+ while ( (sbits64) rem0 < 0 ) {
+ --zSig0;
+ doubleZSig0 -= 2;
+ add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );
+ }
+ zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );
+ if ( ( zSig1 & 0x1FFF ) <= 5 ) {
+ if ( zSig1 == 0 ) zSig1 = 1;
+ mul64To128( doubleZSig0, zSig1, &term1, &term2 );
+ sub128( rem1, 0, term1, term2, &rem1, &rem2 );
+ mul64To128( zSig1, zSig1, &term2, &term3 );
+ sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );
+ while ( (sbits64) rem1 < 0 ) {
+ --zSig1;
+ shortShift128Left( 0, zSig1, 1, &term2, &term3 );
+ term3 |= 1;
+ term2 |= doubleZSig0;
+ add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );
+ }
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );
+ }
+ shift128ExtraRightJamming( zSig0, zSig1, 0, 14, &zSig0, &zSig1, &zSig2 );
+ return roundAndPackFloat128( 0, zExp, zSig0, zSig1, zSig2 );
}
@@ -4774,23 +4774,23 @@ float128 float128_sqrt( float128 a )
flag float128_eq( float128 a, float128 b )
{
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- if ( float128_is_signaling_nan( a )
- || float128_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ if ( float128_is_signaling_nan( a )
+ || float128_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ return
+ ( a.low == b.low )
+ && ( ( a.high == b.high )
+ || ( ( a.low == 0 )
+ && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
+ );
}
@@ -4803,27 +4803,27 @@ flag float128_eq( float128 a, float128 b )
flag float128_le( float128 a, float128 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloat128Sign( a );
+ bSign = extractFloat128Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ == 0 );
+ }
+ return
+ aSign ? le128( b.high, b.low, a.high, a.low )
+ : le128( a.high, a.low, b.high, b.low );
}
@@ -4835,27 +4835,27 @@ flag float128_le( float128 a, float128 b )
flag float128_lt( float128 a, float128 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ aSign = extractFloat128Sign( a );
+ bSign = extractFloat128Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ != 0 );
+ }
+ return
+ aSign ? lt128( b.high, b.low, a.high, a.low )
+ : lt128( a.high, a.low, b.high, b.low );
}
@@ -4869,20 +4869,20 @@ flag float128_lt( float128 a, float128 b )
flag float128_eq_signaling( float128 a, float128 b )
{
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- float_raise( float_flag_invalid );
- return 0;
- }
- return
- ( a.low == b.low )
- && ( ( a.high == b.high )
- || ( ( a.low == 0 )
- && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
- );
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ float_raise( float_flag_invalid );
+ return 0;
+ }
+ return
+ ( a.low == b.low )
+ && ( ( a.high == b.high )
+ || ( ( a.low == 0 )
+ && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )
+ );
}
@@ -4895,30 +4895,30 @@ flag float128_eq_signaling( float128 a, float128 b )
flag float128_le_quiet( float128 a, float128 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- if ( float128_is_signaling_nan( a )
- || float128_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- == 0 );
- }
- return
- aSign ? le128( b.high, b.low, a.high, a.low )
- : le128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ if ( float128_is_signaling_nan( a )
+ || float128_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloat128Sign( a );
+ bSign = extractFloat128Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ == 0 );
+ }
+ return
+ aSign ? le128( b.high, b.low, a.high, a.low )
+ : le128( a.high, a.low, b.high, b.low );
}
@@ -4931,32 +4931,31 @@ flag float128_le_quiet( float128 a, float128 b )
flag float128_lt_quiet( float128 a, float128 b )
{
- flag aSign, bSign;
-
- if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
- && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
- || ( ( extractFloat128Exp( b ) == 0x7FFF )
- && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
- ) {
- if ( float128_is_signaling_nan( a )
- || float128_is_signaling_nan( b ) ) {
- float_raise( float_flag_invalid );
- }
- return 0;
- }
- aSign = extractFloat128Sign( a );
- bSign = extractFloat128Sign( b );
- if ( aSign != bSign ) {
- return
- aSign
- && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
- != 0 );
- }
- return
- aSign ? lt128( b.high, b.low, a.high, a.low )
- : lt128( a.high, a.low, b.high, b.low );
+ flag aSign, bSign;
+
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )
+ ) {
+ if ( float128_is_signaling_nan( a )
+ || float128_is_signaling_nan( b ) ) {
+ float_raise( float_flag_invalid );
+ }
+ return 0;
+ }
+ aSign = extractFloat128Sign( a );
+ bSign = extractFloat128Sign( b );
+ if ( aSign != bSign ) {
+ return
+ aSign
+ && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )
+ != 0 );
+ }
+ return
+ aSign ? lt128( b.high, b.low, a.high, a.low )
+ : lt128( a.high, a.low, b.high, b.low );
}
#endif
-
diff --git a/src/lib/softfloat/softfloat.h b/src/lib/softfloat/softfloat.h
index 9e664c85bc0..260c4810332 100644
--- a/src/lib/softfloat/softfloat.h
+++ b/src/lib/softfloat/softfloat.h
@@ -47,13 +47,13 @@ typedef bits32 float32;
typedef bits64 float64;
#ifdef FLOATX80
typedef struct {
- bits16 high;
- bits64 low;
+ bits16 high;
+ bits64 low;
} floatx80;
#endif
#ifdef FLOAT128
typedef struct {
- bits64 high, low;
+ bits64 high, low;
} float128;
#endif
@@ -69,8 +69,8 @@ typedef struct {
*----------------------------------------------------------------------------*/
extern int8 float_detect_tininess;
enum {
- float_tininess_after_rounding = 0,
- float_tininess_before_rounding = 1
+ float_tininess_after_rounding = 0,
+ float_tininess_before_rounding = 1
};
/*----------------------------------------------------------------------------
@@ -78,10 +78,10 @@ enum {
*----------------------------------------------------------------------------*/
extern int8 float_rounding_mode;
enum {
- float_round_nearest_even = 0,
- float_round_to_zero = 1,
- float_round_down = 2,
- float_round_up = 3
+ float_round_nearest_even = 0,
+ float_round_to_zero = 1,
+ float_round_down = 2,
+ float_round_up = 3
};
/*----------------------------------------------------------------------------
@@ -89,11 +89,11 @@ enum {
*----------------------------------------------------------------------------*/
extern int8 float_exception_flags;
enum {
- float_flag_inexact = 1,
- float_flag_underflow = 2,
- float_flag_overflow = 4,
- float_flag_divbyzero = 8,
- float_flag_invalid = 16
+ float_flag_inexact = 1,
+ float_flag_underflow = 2,
+ float_flag_overflow = 4,
+ float_flag_divbyzero = 8,
+ float_flag_invalid = 16
};
/*----------------------------------------------------------------------------
@@ -210,11 +210,11 @@ float128 floatx80_to_float128( floatx80 );
INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )
{
- floatx80 z;
+ floatx80 z;
- z.low = zSig;
- z.high = ( ( (bits16) zSign )<<15 ) + zExp;
- return z;
+ z.low = zSig;
+ z.high = ( ( (bits16) zSign )<<15 ) + zExp;
+ return z;
}
@@ -303,13 +303,13 @@ flag float128_is_signaling_nan( float128 );
*----------------------------------------------------------------------------*/
INLINE float128
- packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
+ packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
{
- float128 z;
+ float128 z;
- z.low = zSig1;
- z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
- return z;
+ z.low = zSig1;
+ z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;
+ return z;
}
@@ -335,92 +335,92 @@ INLINE float128
*----------------------------------------------------------------------------*/
INLINE float128
- roundAndPackFloat128(
- flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 )
+ roundAndPackFloat128(
+ flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 )
{
- int8 roundingMode;
- flag roundNearestEven, increment, isTiny;
-
- roundingMode = float_rounding_mode;
- roundNearestEven = ( roundingMode == float_round_nearest_even );
- increment = ( (sbits64) zSig2 < 0 );
- if ( ! roundNearestEven ) {
- if ( roundingMode == float_round_to_zero ) {
- increment = 0;
- }
- else {
- if ( zSign ) {
- increment = ( roundingMode == float_round_down ) && zSig2;
- }
- else {
- increment = ( roundingMode == float_round_up ) && zSig2;
- }
- }
- }
- if ( 0x7FFD <= (bits32) zExp ) {
- if ( ( 0x7FFD < zExp )
- || ( ( zExp == 0x7FFD )
- && eq128(
- LIT64( 0x0001FFFFFFFFFFFF ),
- LIT64( 0xFFFFFFFFFFFFFFFF ),
- zSig0,
- zSig1
- )
- && increment
- )
- ) {
- float_raise( float_flag_overflow | float_flag_inexact );
- if ( ( roundingMode == float_round_to_zero )
- || ( zSign && ( roundingMode == float_round_up ) )
- || ( ! zSign && ( roundingMode == float_round_down ) )
- ) {
- return
- packFloat128(
- zSign,
- 0x7FFE,
- LIT64( 0x0000FFFFFFFFFFFF ),
- LIT64( 0xFFFFFFFFFFFFFFFF )
- );
- }
- return packFloat128( zSign, 0x7FFF, 0, 0 );
- }
- if ( zExp < 0 ) {
- isTiny =
- ( float_detect_tininess == float_tininess_before_rounding )
- || ( zExp < -1 )
- || ! increment
- || lt128(
- zSig0,
- zSig1,
- LIT64( 0x0001FFFFFFFFFFFF ),
- LIT64( 0xFFFFFFFFFFFFFFFF )
- );
- shift128ExtraRightJamming(
- zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
- zExp = 0;
- if ( isTiny && zSig2 ) float_raise( float_flag_underflow );
- if ( roundNearestEven ) {
- increment = ( (sbits64) zSig2 < 0 );
- }
- else {
- if ( zSign ) {
- increment = ( roundingMode == float_round_down ) && zSig2;
- }
- else {
- increment = ( roundingMode == float_round_up ) && zSig2;
- }
- }
- }
- }
- if ( zSig2 ) float_exception_flags |= float_flag_inexact;
- if ( increment ) {
- add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
- zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
- }
- else {
- if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
- }
- return packFloat128( zSign, zExp, zSig0, zSig1 );
+ int8 roundingMode;
+ flag roundNearestEven, increment, isTiny;
+
+ roundingMode = float_rounding_mode;
+ roundNearestEven = ( roundingMode == float_round_nearest_even );
+ increment = ( (sbits64) zSig2 < 0 );
+ if ( ! roundNearestEven ) {
+ if ( roundingMode == float_round_to_zero ) {
+ increment = 0;
+ }
+ else {
+ if ( zSign ) {
+ increment = ( roundingMode == float_round_down ) && zSig2;
+ }
+ else {
+ increment = ( roundingMode == float_round_up ) && zSig2;
+ }
+ }
+ }
+ if ( 0x7FFD <= (bits32) zExp ) {
+ if ( ( 0x7FFD < zExp )
+ || ( ( zExp == 0x7FFD )
+ && eq128(
+ LIT64( 0x0001FFFFFFFFFFFF ),
+ LIT64( 0xFFFFFFFFFFFFFFFF ),
+ zSig0,
+ zSig1
+ )
+ && increment
+ )
+ ) {
+ float_raise( float_flag_overflow | float_flag_inexact );
+ if ( ( roundingMode == float_round_to_zero )
+ || ( zSign && ( roundingMode == float_round_up ) )
+ || ( ! zSign && ( roundingMode == float_round_down ) )
+ ) {
+ return
+ packFloat128(
+ zSign,
+ 0x7FFE,
+ LIT64( 0x0000FFFFFFFFFFFF ),
+ LIT64( 0xFFFFFFFFFFFFFFFF )
+ );
+ }
+ return packFloat128( zSign, 0x7FFF, 0, 0 );
+ }
+ if ( zExp < 0 ) {
+ isTiny =
+ ( float_detect_tininess == float_tininess_before_rounding )
+ || ( zExp < -1 )
+ || ! increment
+ || lt128(
+ zSig0,
+ zSig1,
+ LIT64( 0x0001FFFFFFFFFFFF ),
+ LIT64( 0xFFFFFFFFFFFFFFFF )
+ );
+ shift128ExtraRightJamming(
+ zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );
+ zExp = 0;
+ if ( isTiny && zSig2 ) float_raise( float_flag_underflow );
+ if ( roundNearestEven ) {
+ increment = ( (sbits64) zSig2 < 0 );
+ }
+ else {
+ if ( zSign ) {
+ increment = ( roundingMode == float_round_down ) && zSig2;
+ }
+ else {
+ increment = ( roundingMode == float_round_up ) && zSig2;
+ }
+ }
+ }
+ }
+ if ( zSig2 ) float_exception_flags |= float_flag_inexact;
+ if ( increment ) {
+ add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );
+ zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );
+ }
+ else {
+ if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;
+ }
+ return packFloat128( zSign, zExp, zSig0, zSig1 );
}
@@ -435,30 +435,29 @@ INLINE float128
*----------------------------------------------------------------------------*/
INLINE float128
- normalizeRoundAndPackFloat128(
- flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
+ normalizeRoundAndPackFloat128(
+ flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )
{
- int8 shiftCount;
- bits64 zSig2;
-
- if ( zSig0 == 0 ) {
- zSig0 = zSig1;
- zSig1 = 0;
- zExp -= 64;
- }
- shiftCount = countLeadingZeros64( zSig0 ) - 15;
- if ( 0 <= shiftCount ) {
- zSig2 = 0;
- shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
- }
- else {
- shift128ExtraRightJamming(
- zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
- }
- zExp -= shiftCount;
- return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
+ int8 shiftCount;
+ bits64 zSig2;
+
+ if ( zSig0 == 0 ) {
+ zSig0 = zSig1;
+ zSig1 = 0;
+ zExp -= 64;
+ }
+ shiftCount = countLeadingZeros64( zSig0 ) - 15;
+ if ( 0 <= shiftCount ) {
+ zSig2 = 0;
+ shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );
+ }
+ else {
+ shift128ExtraRightJamming(
+ zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );
+ }
+ zExp -= shiftCount;
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );
}
#endif
-
diff --git a/src/lib/util/astring.h b/src/lib/util/astring.h
index 763537241a1..7931075d1ea 100644
--- a/src/lib/util/astring.h
+++ b/src/lib/util/astring.h
@@ -180,10 +180,10 @@ private:
void normalize_substr(int &start, int &count, int length) const;
// internal state
- char * m_text;
- int m_alloclen;
- char m_smallbuf[64];
- int m_len;
+ char * m_text;
+ int m_alloclen;
+ char m_smallbuf[64];
+ int m_len;
};
diff --git a/src/lib/util/avhuff.h b/src/lib/util/avhuff.h
index d2662a89098..e1236a0708a 100644
--- a/src/lib/util/avhuff.h
+++ b/src/lib/util/avhuff.h
@@ -53,7 +53,7 @@
// CONSTANTS
//**************************************************************************
-#define AVHUFF_USE_FLAC (1)
+#define AVHUFF_USE_FLAC (1)
// errors
@@ -86,21 +86,21 @@ class avhuff_decompress_config
public:
avhuff_decompress_config()
: maxsamples(0),
- actsamples(NULL),
- maxmetalength(0),
- actmetalength(NULL),
- metadata(NULL)
+ actsamples(NULL),
+ maxmetalength(0),
+ actmetalength(NULL),
+ metadata(NULL)
{
memset(audio, 0, sizeof(audio));
}
- bitmap_yuy16 video; // pointer to video bitmap
- UINT32 maxsamples; // maximum number of samples per channel
- UINT32 * actsamples; // actual number of samples per channel
- INT16 * audio[16]; // pointer to individual audio channels
- UINT32 maxmetalength; // maximum length of metadata
- UINT32 * actmetalength; // actual length of metadata
- UINT8 * metadata; // pointer to metadata buffer
+ bitmap_yuy16 video; // pointer to video bitmap
+ UINT32 maxsamples; // maximum number of samples per channel
+ UINT32 * actsamples; // actual number of samples per channel
+ INT16 * audio[16]; // pointer to individual audio channels
+ UINT32 maxmetalength; // maximum length of metadata
+ UINT32 * actmetalength; // actual length of metadata
+ UINT8 * metadata; // pointer to metadata buffer
};
@@ -140,9 +140,9 @@ private:
private:
// internal state
- int m_rlecount;
- huffman_encoder<256 + 16> m_encoder;
- dynamic_array<UINT16> m_rlebuffer;
+ int m_rlecount;
+ huffman_encoder<256 + 16> m_encoder;
+ dynamic_array<UINT16> m_rlebuffer;
};
// internal helpers
@@ -151,17 +151,17 @@ private:
avhuff_error encode_video_lossless(const UINT8 *source, int width, int height, UINT8 *dest, UINT32 &complength);
// video encoding contexts
- deltarle_encoder m_ycontext;
- deltarle_encoder m_cbcontext;
- deltarle_encoder m_crcontext;
+ deltarle_encoder m_ycontext;
+ deltarle_encoder m_cbcontext;
+ deltarle_encoder m_crcontext;
// audio encoding contexts
- dynamic_buffer m_audiobuffer;
+ dynamic_buffer m_audiobuffer;
#if AVHUFF_USE_FLAC
- flac_encoder m_flac_encoder;
+ flac_encoder m_flac_encoder;
#else
- huffman_8bit_encoder m_audiohi_encoder;
- huffman_8bit_encoder m_audiolo_encoder;
+ huffman_8bit_encoder m_audiohi_encoder;
+ huffman_8bit_encoder m_audiolo_encoder;
#endif
};
@@ -200,9 +200,9 @@ private:
private:
// internal state
- int m_rlecount;
- UINT8 m_prevdata;
- huffman_decoder<256 + 16> m_decoder;
+ int m_rlecount;
+ UINT8 m_prevdata;
+ huffman_decoder<256 + 16> m_decoder;
};
@@ -212,18 +212,18 @@ private:
avhuff_error decode_video_lossless(int width, int height, const UINT8 *source, UINT32 complength, UINT8 *dest, UINT32 dstride, UINT32 dxor);
// internal state
- avhuff_decompress_config m_config;
+ avhuff_decompress_config m_config;
// video decoding contexts
- deltarle_decoder m_ycontext;
- deltarle_decoder m_cbcontext;
- deltarle_decoder m_crcontext;
+ deltarle_decoder m_ycontext;
+ deltarle_decoder m_cbcontext;
+ deltarle_decoder m_crcontext;
// audio decoding contexts
- huffman_8bit_decoder m_audiohi_decoder;
- huffman_8bit_decoder m_audiolo_decoder;
+ huffman_8bit_decoder m_audiohi_decoder;
+ huffman_8bit_decoder m_audiolo_decoder;
#if AVHUFF_USE_FLAC
- flac_decoder m_flac_decoder;
+ flac_decoder m_flac_decoder;
#endif
};
diff --git a/src/lib/util/aviio.c b/src/lib/util/aviio.c
index aec1a68b81a..16ec39e0cbb 100644
--- a/src/lib/util/aviio.c
+++ b/src/lib/util/aviio.c
@@ -46,60 +46,60 @@
CONSTANTS
***************************************************************************/
-#define FILETYPE_READ 1
-#define FILETYPE_CREATE 2
-
-#define MAX_RIFF_SIZE (2UL * 1024 * 1024 * 1024 - 1024) /* just under 2GB */
-#define MAX_AVI_SIZE_IN_GB (256)
-#define FOUR_GB ((UINT64)1 << 32)
-
-#define MAX_SOUND_CHANNELS 2
-#define SOUND_BUFFER_MSEC 2000 /* microseconds of sond buffering */
-
-#define CHUNKTYPE_RIFF AVI_FOURCC('R','I','F','F')
-#define CHUNKTYPE_LIST AVI_FOURCC('L','I','S','T')
-#define CHUNKTYPE_JUNK AVI_FOURCC('J','U','N','K')
-#define CHUNKTYPE_AVIH AVI_FOURCC('a','v','i','h')
-#define CHUNKTYPE_STRH AVI_FOURCC('s','t','r','h')
-#define CHUNKTYPE_STRF AVI_FOURCC('s','t','r','f')
-#define CHUNKTYPE_IDX1 AVI_FOURCC('i','d','x','1')
-#define CHUNKTYPE_INDX AVI_FOURCC('i','n','d','x')
-#define CHUNKTYPE_XXDB AVI_FOURCC(0x00,0x00,'d','b')
-#define CHUNKTYPE_XXDC AVI_FOURCC(0x00,0x00,'d','c')
-#define CHUNKTYPE_XXWB AVI_FOURCC(0x00,0x00,'w','b')
-#define CHUNKTYPE_IXXX AVI_FOURCC('i','x',0x00,0x00)
-#define CHUNKTYPE_XX_MASK AVI_FOURCC(0x00,0x00,0xff,0xff)
-
-#define LISTTYPE_AVI AVI_FOURCC('A','V','I',' ')
-#define LISTTYPE_AVIX AVI_FOURCC('A','V','I','X')
-#define LISTTYPE_HDRL AVI_FOURCC('h','d','r','l')
-#define LISTTYPE_STRL AVI_FOURCC('s','t','r','l')
-#define LISTTYPE_MOVI AVI_FOURCC('m','o','v','i')
-
-#define STREAMTYPE_VIDS AVI_FOURCC('v','i','d','s')
-#define STREAMTYPE_AUDS AVI_FOURCC('a','u','d','s')
-
-#define HANDLER_DIB AVI_FOURCC('D','I','B',' ')
-#define HANDLER_HFYU AVI_FOURCC('h','f','y','u')
+#define FILETYPE_READ 1
+#define FILETYPE_CREATE 2
+
+#define MAX_RIFF_SIZE (2UL * 1024 * 1024 * 1024 - 1024) /* just under 2GB */
+#define MAX_AVI_SIZE_IN_GB (256)
+#define FOUR_GB ((UINT64)1 << 32)
+
+#define MAX_SOUND_CHANNELS 2
+#define SOUND_BUFFER_MSEC 2000 /* microseconds of sond buffering */
+
+#define CHUNKTYPE_RIFF AVI_FOURCC('R','I','F','F')
+#define CHUNKTYPE_LIST AVI_FOURCC('L','I','S','T')
+#define CHUNKTYPE_JUNK AVI_FOURCC('J','U','N','K')
+#define CHUNKTYPE_AVIH AVI_FOURCC('a','v','i','h')
+#define CHUNKTYPE_STRH AVI_FOURCC('s','t','r','h')
+#define CHUNKTYPE_STRF AVI_FOURCC('s','t','r','f')
+#define CHUNKTYPE_IDX1 AVI_FOURCC('i','d','x','1')
+#define CHUNKTYPE_INDX AVI_FOURCC('i','n','d','x')
+#define CHUNKTYPE_XXDB AVI_FOURCC(0x00,0x00,'d','b')
+#define CHUNKTYPE_XXDC AVI_FOURCC(0x00,0x00,'d','c')
+#define CHUNKTYPE_XXWB AVI_FOURCC(0x00,0x00,'w','b')
+#define CHUNKTYPE_IXXX AVI_FOURCC('i','x',0x00,0x00)
+#define CHUNKTYPE_XX_MASK AVI_FOURCC(0x00,0x00,0xff,0xff)
+
+#define LISTTYPE_AVI AVI_FOURCC('A','V','I',' ')
+#define LISTTYPE_AVIX AVI_FOURCC('A','V','I','X')
+#define LISTTYPE_HDRL AVI_FOURCC('h','d','r','l')
+#define LISTTYPE_STRL AVI_FOURCC('s','t','r','l')
+#define LISTTYPE_MOVI AVI_FOURCC('m','o','v','i')
+
+#define STREAMTYPE_VIDS AVI_FOURCC('v','i','d','s')
+#define STREAMTYPE_AUDS AVI_FOURCC('a','u','d','s')
+
+#define HANDLER_DIB AVI_FOURCC('D','I','B',' ')
+#define HANDLER_HFYU AVI_FOURCC('h','f','y','u')
/* main AVI header files */
-#define AVIF_HASINDEX 0x00000010
-#define AVIF_MUSTUSEINDEX 0x00000020
-#define AVIF_ISINTERLEAVED 0x00000100
-#define AVIF_COPYRIGHTED 0x00010000
-#define AVIF_WASCAPTUREFILE 0x00020000
+#define AVIF_HASINDEX 0x00000010
+#define AVIF_MUSTUSEINDEX 0x00000020
+#define AVIF_ISINTERLEAVED 0x00000100
+#define AVIF_COPYRIGHTED 0x00010000
+#define AVIF_WASCAPTUREFILE 0x00020000
/* index definitions */
-#define AVI_INDEX_OF_INDEXES 0x00
-#define AVI_INDEX_OF_CHUNKS 0x01
-#define AVI_INDEX_IS_DATA 0x80
-#define AVI_INDEX_2FIELD 0x01
+#define AVI_INDEX_OF_INDEXES 0x00
+#define AVI_INDEX_OF_CHUNKS 0x01
+#define AVI_INDEX_IS_DATA 0x80
+#define AVI_INDEX_2FIELD 0x01
/* HuffYUV definitions */
-#define HUFFYUV_PREDICT_LEFT 0
+#define HUFFYUV_PREDICT_LEFT 0
#define HUFFYUV_PREDICT_GRADIENT 1
-#define HUFFYUV_PREDICT_MEDIAN 2
-#define HUFFYUV_PREDICT_DECORR 0x40
+#define HUFFYUV_PREDICT_MEDIAN 2
+#define HUFFYUV_PREDICT_DECORR 0x40
@@ -109,95 +109,95 @@
struct avi_chunk
{
- UINT64 offset; /* file offset of chunk header */
- UINT64 size; /* size of this chunk */
- UINT32 type; /* type of this chunk */
- UINT32 listtype; /* type of this list (if we are a list) */
+ UINT64 offset; /* file offset of chunk header */
+ UINT64 size; /* size of this chunk */
+ UINT32 type; /* type of this chunk */
+ UINT32 listtype; /* type of this list (if we are a list) */
};
struct avi_chunk_list
{
- UINT64 offset; /* offset in the file of header */
- UINT32 length; /* length of the chunk including header */
+ UINT64 offset; /* offset in the file of header */
+ UINT32 length; /* length of the chunk including header */
};
struct huffyuv_table
{
- UINT8 shift[256]; /* bit shift amounts */
- UINT32 bits[256]; /* bit match values */
- UINT32 mask[256]; /* bit mask values */
- UINT16 baselookup[65536]; /* base lookup table */
- UINT16 * extralookup; /* extra lookup tables */
+ UINT8 shift[256]; /* bit shift amounts */
+ UINT32 bits[256]; /* bit match values */
+ UINT32 mask[256]; /* bit mask values */
+ UINT16 baselookup[65536]; /* base lookup table */
+ UINT16 * extralookup; /* extra lookup tables */
};
struct huffyuv_data
{
- UINT8 predictor; /* predictor */
- huffyuv_table table[3]; /* array of tables */
+ UINT8 predictor; /* predictor */
+ huffyuv_table table[3]; /* array of tables */
};
struct avi_stream
{
- UINT32 type; /* subtype of stream */
- UINT32 format; /* format of stream data */
+ UINT32 type; /* subtype of stream */
+ UINT32 format; /* format of stream data */
- UINT32 rate; /* timescale for stream */
- UINT32 scale; /* duration of one sample in the stream */
- UINT32 samples; /* number of samples */
+ UINT32 rate; /* timescale for stream */
+ UINT32 scale; /* duration of one sample in the stream */
+ UINT32 samples; /* number of samples */
- avi_chunk_list * chunk; /* list of chunks */
- UINT32 chunks; /* chunks currently known */
- UINT32 chunksalloc; /* number of chunks allocated */
+ avi_chunk_list * chunk; /* list of chunks */
+ UINT32 chunks; /* chunks currently known */
+ UINT32 chunksalloc; /* number of chunks allocated */
- UINT32 width; /* width of video */
- UINT32 height; /* height of video */
- UINT32 depth; /* depth of video */
- UINT8 interlace; /* interlace parameters */
- huffyuv_data * huffyuv; /* huffyuv decompression data */
+ UINT32 width; /* width of video */
+ UINT32 height; /* height of video */
+ UINT32 depth; /* depth of video */
+ UINT8 interlace; /* interlace parameters */
+ huffyuv_data * huffyuv; /* huffyuv decompression data */
- UINT16 channels; /* audio channels */
- UINT16 samplebits; /* audio bits per sample */
- UINT32 samplerate; /* audio sample rate */
+ UINT16 channels; /* audio channels */
+ UINT16 samplebits; /* audio bits per sample */
+ UINT32 samplerate; /* audio sample rate */
/* only used when creating */
- UINT64 saved_strh_offset; /* writeoffset of strh chunk */
- UINT64 saved_indx_offset; /* writeoffset of indx chunk */
+ UINT64 saved_strh_offset; /* writeoffset of strh chunk */
+ UINT64 saved_indx_offset; /* writeoffset of indx chunk */
};
struct avi_file
{
/* shared data */
- osd_file * file; /* pointer to open file */
- int type; /* type of access (read/create) */
- avi_movie_info info; /* movie info structure */
- UINT8 * tempbuffer; /* temporary buffer */
- UINT32 tempbuffersize; /* size of the temporary buffer */
+ osd_file * file; /* pointer to open file */
+ int type; /* type of access (read/create) */
+ avi_movie_info info; /* movie info structure */
+ UINT8 * tempbuffer; /* temporary buffer */
+ UINT32 tempbuffersize; /* size of the temporary buffer */
/* only used when reading */
- int streams; /* number of streams */
- avi_stream * stream; /* allocated array of stream information */
- avi_chunk rootchunk; /* dummy root chunk that wraps the whole file */
+ int streams; /* number of streams */
+ avi_stream * stream; /* allocated array of stream information */
+ avi_chunk rootchunk; /* dummy root chunk that wraps the whole file */
/* only used when creating */
- UINT64 writeoffs; /* current file write offset */
- UINT64 riffbase; /* base of the current RIFF */
+ UINT64 writeoffs; /* current file write offset */
+ UINT64 riffbase; /* base of the current RIFF */
- avi_chunk chunkstack[8]; /* stack of chunks we are writing */
- int chunksp; /* stack pointer for the current chunk */
+ avi_chunk chunkstack[8]; /* stack of chunks we are writing */
+ int chunksp; /* stack pointer for the current chunk */
- UINT64 saved_movi_offset; /* writeoffset of movi list */
- UINT64 saved_avih_offset; /* writeoffset of avih chunk */
+ UINT64 saved_movi_offset; /* writeoffset of movi list */
+ UINT64 saved_avih_offset; /* writeoffset of avih chunk */
- INT16 * soundbuf; /* buffer for sound data */
- UINT32 soundbuf_samples; /* length of sound buffer in samples */
- UINT32 soundbuf_chansamples[MAX_SOUND_CHANNELS]; /* samples in buffer for each channel */
- UINT32 soundbuf_chunks; /* number of chunks completed so far */
- UINT32 soundbuf_frames; /* number of frames ahead of the video */
+ INT16 * soundbuf; /* buffer for sound data */
+ UINT32 soundbuf_samples; /* length of sound buffer in samples */
+ UINT32 soundbuf_chansamples[MAX_SOUND_CHANNELS]; /* samples in buffer for each channel */
+ UINT32 soundbuf_chunks; /* number of chunks completed so far */
+ UINT32 soundbuf_frames; /* number of frames ahead of the video */
};
@@ -294,9 +294,9 @@ INLINE UINT32 fetch_32bits(const UINT8 *data)
INLINE UINT64 fetch_64bits(const UINT8 *data)
{
return (UINT64)data[0] | ((UINT64)data[1] << 8) |
- ((UINT64)data[2] << 16) | ((UINT64)data[3] << 24) |
- ((UINT64)data[4] << 32) | ((UINT64)data[5] << 40) |
- ((UINT64)data[6] << 48) | ((UINT64)data[7] << 56);
+ ((UINT64)data[2] << 16) | ((UINT64)data[3] << 24) |
+ ((UINT64)data[4] << 32) | ((UINT64)data[5] << 40) |
+ ((UINT64)data[6] << 48) | ((UINT64)data[7] << 56);
}
@@ -740,24 +740,24 @@ const char *avi_error_string(avi_error err)
{
switch (err)
{
- case AVIERR_NONE: return "success";
- case AVIERR_END: return "hit end of file";
- case AVIERR_INVALID_DATA: return "invalid data";
- case AVIERR_NO_MEMORY: return "out of memory";
- case AVIERR_READ_ERROR: return "read error";
- case AVIERR_WRITE_ERROR: return "write error";
- case AVIERR_STACK_TOO_DEEP: return "stack overflow";
- case AVIERR_UNSUPPORTED_FEATURE: return "unsupported feature";
- case AVIERR_CANT_OPEN_FILE: return "unable to open file";
- case AVIERR_INCOMPATIBLE_AUDIO_STREAMS: return "found incompatible audio streams";
- case AVIERR_INVALID_SAMPLERATE: return "found invalid sample rate";
- case AVIERR_INVALID_STREAM: return "invalid stream";
- case AVIERR_INVALID_FRAME: return "invalid frame index";
- case AVIERR_INVALID_BITMAP: return "invalid bitmap";
- case AVIERR_UNSUPPORTED_VIDEO_FORMAT: return "unsupported video format";
- case AVIERR_UNSUPPORTED_AUDIO_FORMAT: return "unsupported audio format";
- case AVIERR_EXCEEDED_SOUND_BUFFER: return "sound buffer overflow";
- default: return "undocumented error";
+ case AVIERR_NONE: return "success";
+ case AVIERR_END: return "hit end of file";
+ case AVIERR_INVALID_DATA: return "invalid data";
+ case AVIERR_NO_MEMORY: return "out of memory";
+ case AVIERR_READ_ERROR: return "read error";
+ case AVIERR_WRITE_ERROR: return "write error";
+ case AVIERR_STACK_TOO_DEEP: return "stack overflow";
+ case AVIERR_UNSUPPORTED_FEATURE: return "unsupported feature";
+ case AVIERR_CANT_OPEN_FILE: return "unable to open file";
+ case AVIERR_INCOMPATIBLE_AUDIO_STREAMS: return "found incompatible audio streams";
+ case AVIERR_INVALID_SAMPLERATE: return "found invalid sample rate";
+ case AVIERR_INVALID_STREAM: return "invalid stream";
+ case AVIERR_INVALID_FRAME: return "invalid frame index";
+ case AVIERR_INVALID_BITMAP: return "invalid bitmap";
+ case AVIERR_UNSUPPORTED_VIDEO_FORMAT: return "unsupported video format";
+ case AVIERR_UNSUPPORTED_AUDIO_FORMAT: return "unsupported audio format";
+ case AVIERR_EXCEEDED_SOUND_BUFFER: return "sound buffer overflow";
+ default: return "undocumented error";
}
}
@@ -1571,7 +1571,7 @@ static avi_error parse_indx_chunk(avi_file *file, avi_stream *stream, avi_chunk
{
const UINT8 *base = &chunkdata[24 + entry * 4 * longs_per_entry];
UINT32 offset = fetch_32bits(&base[0]);
- UINT32 size = fetch_32bits(&base[4]) & 0x7fffffff; // bit 31 == NOT a keyframe
+ UINT32 size = fetch_32bits(&base[4]) & 0x7fffffff; // bit 31 == NOT a keyframe
/* set the info for this chunk and advance */
avierr = set_stream_chunk_info(stream, stream->chunks++, baseoffset + offset - 8, size + 8);
@@ -1746,7 +1746,7 @@ static avi_error chunk_write(avi_file *file, UINT32 type, const void *data, UINT
/* if we are getting too big, split the RIFF */
/* note that we ignore writes before the current RIFF base, as those are assumed to be
- overwrites of a chunk from the previous RIFF */
+ overwrites of a chunk from the previous RIFF */
if (file->writeoffs >= file->riffbase && file->writeoffs + length + idxreserve - file->riffbase >= MAX_RIFF_SIZE)
{
/* close the movi list */
@@ -1917,10 +1917,10 @@ static avi_error write_avih_chunk(avi_file *file, int initial_write)
put_32bits(&buffer[0], 1000000 * (INT64)video->scale / video->rate); /* dwMicroSecPerFrame */
put_32bits(&buffer[12], AVIF_HASINDEX | AVIF_ISINTERLEAVED); /* dwFlags */
- put_32bits(&buffer[16], video->samples); /* dwTotalFrames */
- put_32bits(&buffer[24], file->streams); /* dwStreams */
- put_32bits(&buffer[32], video->width); /* dwWidth */
- put_32bits(&buffer[36], video->height); /* dwHeight */
+ put_32bits(&buffer[16], video->samples); /* dwTotalFrames */
+ put_32bits(&buffer[24], file->streams); /* dwStreams */
+ put_32bits(&buffer[32], video->width); /* dwWidth */
+ put_32bits(&buffer[36], video->height); /* dwHeight */
/* (over)write the chunk */
return chunk_overwrite(file, CHUNKTYPE_AVIH, buffer, sizeof(buffer), &file->saved_avih_offset, initial_write);
@@ -1939,29 +1939,29 @@ static avi_error write_strh_chunk(avi_file *file, avi_stream *stream, int initia
/* reset the buffer */
memset(buffer, 0, sizeof(buffer));
- put_32bits(&buffer[0], stream->type); /* fccType */
- put_32bits(&buffer[20], stream->scale); /* dwScale */
- put_32bits(&buffer[24], stream->rate); /* dwRate */
- put_32bits(&buffer[32], stream->samples); /* dwLength */
- put_32bits(&buffer[40], 10000); /* dwQuality */
+ put_32bits(&buffer[0], stream->type); /* fccType */
+ put_32bits(&buffer[20], stream->scale); /* dwScale */
+ put_32bits(&buffer[24], stream->rate); /* dwRate */
+ put_32bits(&buffer[32], stream->samples); /* dwLength */
+ put_32bits(&buffer[40], 10000); /* dwQuality */
/* video-stream specific data */
if (stream->type == STREAMTYPE_VIDS)
{
- put_32bits(&buffer[4], /* fccHandler */
+ put_32bits(&buffer[4], /* fccHandler */
(stream->format == FORMAT_HFYU) ? HANDLER_HFYU : HANDLER_DIB);
- put_32bits(&buffer[36], /* dwSuggestedBufferSize */
+ put_32bits(&buffer[36], /* dwSuggestedBufferSize */
stream->width * stream->height * 4);
- put_16bits(&buffer[52], stream->width); /* rcFrame.right */
- put_16bits(&buffer[54], stream->height); /* rcFrame.bottom */
+ put_16bits(&buffer[52], stream->width); /* rcFrame.right */
+ put_16bits(&buffer[54], stream->height); /* rcFrame.bottom */
}
/* audio-stream specific data */
if (stream->type == STREAMTYPE_AUDS)
{
- put_32bits(&buffer[36], /* dwSuggestedBufferSize */
+ put_32bits(&buffer[36], /* dwSuggestedBufferSize */
stream->samplerate * stream->channels * (stream->samplebits / 8));
- put_32bits(&buffer[44], /* dwSampleSize */
+ put_32bits(&buffer[44], /* dwSampleSize */
stream->channels * (stream->samplebits / 8));
}
@@ -1985,13 +1985,13 @@ static avi_error write_strf_chunk(avi_file *file, avi_stream *stream)
/* reset the buffer */
memset(buffer, 0, sizeof(buffer));
- put_32bits(&buffer[0], sizeof(buffer)); /* biSize */
- put_32bits(&buffer[4], stream->width); /* biWidth */
- put_32bits(&buffer[8], stream->height); /* biHeight */
- put_16bits(&buffer[12], 1); /* biPlanes */
- put_16bits(&buffer[14], stream->depth); /* biBitCount */
- put_32bits(&buffer[16], stream->format); /* biCompression */
- put_32bits(&buffer[20], /* biSizeImage */
+ put_32bits(&buffer[0], sizeof(buffer)); /* biSize */
+ put_32bits(&buffer[4], stream->width); /* biWidth */
+ put_32bits(&buffer[8], stream->height); /* biHeight */
+ put_16bits(&buffer[12], 1); /* biPlanes */
+ put_16bits(&buffer[14], stream->depth); /* biBitCount */
+ put_32bits(&buffer[16], stream->format); /* biCompression */
+ put_32bits(&buffer[20], /* biSizeImage */
stream->width * stream->height * (stream->depth + 7) / 8);
/* write the chunk */
@@ -2006,14 +2006,14 @@ static avi_error write_strf_chunk(avi_file *file, avi_stream *stream)
/* reset the buffer */
memset(buffer, 0, sizeof(buffer));
- put_16bits(&buffer[0], 1); /* wFormatTag */
- put_16bits(&buffer[2], stream->channels); /* nChannels */
- put_32bits(&buffer[4], stream->samplerate); /* nSamplesPerSec */
- put_32bits(&buffer[8], /* nAvgBytesPerSec */
+ put_16bits(&buffer[0], 1); /* wFormatTag */
+ put_16bits(&buffer[2], stream->channels); /* nChannels */
+ put_32bits(&buffer[4], stream->samplerate); /* nSamplesPerSec */
+ put_32bits(&buffer[8], /* nAvgBytesPerSec */
stream->samplerate * stream->channels * (stream->samplebits / 8));
- put_16bits(&buffer[12], /* nBlockAlign */
+ put_16bits(&buffer[12], /* nBlockAlign */
stream->channels * (stream->samplebits / 8));
- put_16bits(&buffer[14], stream->samplebits); /* wBitsPerSample */
+ put_16bits(&buffer[14], stream->samplebits); /* wBitsPerSample */
/* write the chunk */
return chunk_write(file, CHUNKTYPE_STRF, buffer, sizeof(buffer));
@@ -2070,12 +2070,12 @@ static avi_error write_indx_chunk(avi_file *file, avi_stream *stream, int initia
memset(tempbuf, 0, 24 + 8 * chunks_this_index);
/* make a regular index */
- put_16bits(&tempbuf[0], 2); /* wLongsPerEntry */
- tempbuf[2] = 0; /* bIndexSubType */
- tempbuf[3] = AVI_INDEX_OF_CHUNKS; /* bIndexType */
- put_32bits(&tempbuf[4], chunks_this_index); /* nEntriesInUse */
- put_32bits(&tempbuf[8], chunkid); /* dwChunkId */
- put_64bits(&tempbuf[12], currentbase); /* qwBaseOffset */
+ put_16bits(&tempbuf[0], 2); /* wLongsPerEntry */
+ tempbuf[2] = 0; /* bIndexSubType */
+ tempbuf[3] = AVI_INDEX_OF_CHUNKS; /* bIndexType */
+ put_32bits(&tempbuf[4], chunks_this_index); /* nEntriesInUse */
+ put_32bits(&tempbuf[8], chunkid); /* dwChunkId */
+ put_64bits(&tempbuf[12], currentbase); /* qwBaseOffset */
/* now fill in the indexes */
chunks_this_index = 0;
@@ -2108,11 +2108,11 @@ static avi_error write_indx_chunk(avi_file *file, avi_stream *stream, int initia
/* build up the master index */
if (master_entries != 0)
{
- put_16bits(&buffer[0], 4); /* wLongsPerEntry */
- buffer[2] = 0; /* bIndexSubType */
- buffer[3] = AVI_INDEX_OF_INDEXES; /* bIndexType */
- put_32bits(&buffer[4], master_entries); /* nEntriesInUse */
- put_32bits(&buffer[8], chunkid); /* dwChunkId */
+ put_16bits(&buffer[0], 4); /* wLongsPerEntry */
+ buffer[2] = 0; /* bIndexSubType */
+ buffer[3] = AVI_INDEX_OF_INDEXES; /* bIndexType */
+ put_32bits(&buffer[4], master_entries); /* nEntriesInUse */
+ put_32bits(&buffer[8], chunkid); /* dwChunkId */
}
/* (over)write the chunk */
diff --git a/src/lib/util/aviio.h b/src/lib/util/aviio.h
index 6c07c9b2669..320e6855f4f 100644
--- a/src/lib/util/aviio.h
+++ b/src/lib/util/aviio.h
@@ -89,12 +89,12 @@ enum avi_datatype
MACROS
***************************************************************************/
-#define AVI_FOURCC(a,b,c,d) ((a) | ((b) << 8) | ((c) << 16) | ((d) << 24))
+#define AVI_FOURCC(a,b,c,d) ((a) | ((b) << 8) | ((c) << 16) | ((d) << 24))
-#define FORMAT_UYVY AVI_FOURCC('U','Y','V','Y')
-#define FORMAT_VYUY AVI_FOURCC('V','Y','U','Y')
-#define FORMAT_YUY2 AVI_FOURCC('Y','U','Y','2')
-#define FORMAT_HFYU AVI_FOURCC('H','F','Y','U')
+#define FORMAT_UYVY AVI_FOURCC('U','Y','V','Y')
+#define FORMAT_VYUY AVI_FOURCC('V','Y','U','Y')
+#define FORMAT_YUY2 AVI_FOURCC('Y','U','Y','2')
+#define FORMAT_HFYU AVI_FOURCC('H','F','Y','U')
@@ -107,21 +107,21 @@ struct avi_file;
struct avi_movie_info
{
- UINT32 video_format; /* format of video data */
- UINT32 video_timescale; /* timescale for video data */
- UINT32 video_sampletime; /* duration of a single video sample (frame) */
- UINT32 video_numsamples; /* total number of video samples */
- UINT32 video_width; /* width of the video */
- UINT32 video_height; /* height of the video */
- UINT32 video_depth; /* depth of the video */
-
- UINT32 audio_format; /* format of audio data */
- UINT32 audio_timescale; /* timescale for audio data */
- UINT32 audio_sampletime; /* duration of a single audio sample */
- UINT32 audio_numsamples; /* total number of audio samples */
- UINT32 audio_channels; /* number of audio channels */
- UINT32 audio_samplebits; /* number of bits per channel */
- UINT32 audio_samplerate; /* sample rate of audio */
+ UINT32 video_format; /* format of video data */
+ UINT32 video_timescale; /* timescale for video data */
+ UINT32 video_sampletime; /* duration of a single video sample (frame) */
+ UINT32 video_numsamples; /* total number of video samples */
+ UINT32 video_width; /* width of the video */
+ UINT32 video_height; /* height of the video */
+ UINT32 video_depth; /* depth of the video */
+
+ UINT32 audio_format; /* format of audio data */
+ UINT32 audio_timescale; /* timescale for audio data */
+ UINT32 audio_sampletime; /* duration of a single audio sample */
+ UINT32 audio_numsamples; /* total number of audio samples */
+ UINT32 audio_channels; /* number of audio channels */
+ UINT32 audio_samplebits; /* number of bits per channel */
+ UINT32 audio_samplerate; /* sample rate of audio */
};
diff --git a/src/lib/util/bitmap.c b/src/lib/util/bitmap.c
index e8dffaa6b58..6f86da6d048 100644
--- a/src/lib/util/bitmap.c
+++ b/src/lib/util/bitmap.c
@@ -94,10 +94,10 @@ inline void bitmap_t::compute_base(int xslop, int yslop)
bitmap_t::bitmap_t(bitmap_format format, int bpp, int width, int height, int xslop, int yslop)
: m_alloc(NULL),
- m_allocbytes(0),
- m_format(format),
- m_bpp(bpp),
- m_palette(NULL)
+ m_allocbytes(0),
+ m_format(format),
+ m_bpp(bpp),
+ m_palette(NULL)
{
// allocate intializes all other fields
allocate(width, height, xslop, yslop);
@@ -106,30 +106,30 @@ bitmap_t::bitmap_t(bitmap_format format, int bpp, int width, int height, int xsl
bitmap_t::bitmap_t(bitmap_format format, int bpp, void *base, int width, int height, int rowpixels)
: m_alloc(NULL),
- m_allocbytes(0),
- m_base(base),
- m_rowpixels(rowpixels),
- m_width(width),
- m_height(height),
- m_format(format),
- m_bpp(bpp),
- m_palette(NULL),
- m_cliprect(0, width - 1, 0, height - 1)
+ m_allocbytes(0),
+ m_base(base),
+ m_rowpixels(rowpixels),
+ m_width(width),
+ m_height(height),
+ m_format(format),
+ m_bpp(bpp),
+ m_palette(NULL),
+ m_cliprect(0, width - 1, 0, height - 1)
{
}
bitmap_t::bitmap_t(bitmap_format format, int bpp, bitmap_t &source, const rectangle &subrect)
: m_alloc(NULL),
- m_allocbytes(0),
- m_base(source.raw_pixptr(subrect.min_y, subrect.min_x)),
- m_rowpixels(source.m_rowpixels),
- m_width(subrect.width()),
- m_height(subrect.height()),
- m_format(format),
- m_bpp(bpp),
- m_palette(NULL),
- m_cliprect(0, subrect.width() - 1, 0, subrect.height() - 1)
+ m_allocbytes(0),
+ m_base(source.raw_pixptr(subrect.min_y, subrect.min_x)),
+ m_rowpixels(source.m_rowpixels),
+ m_width(subrect.width()),
+ m_height(subrect.height()),
+ m_format(format),
+ m_bpp(bpp),
+ m_palette(NULL),
+ m_cliprect(0, subrect.width() - 1, 0, subrect.height() - 1)
{
assert(format == source.m_format);
assert(bpp == source.m_bpp);
diff --git a/src/lib/util/bitmap.h b/src/lib/util/bitmap.h
index 0578ef43023..bf3ae10f454 100644
--- a/src/lib/util/bitmap.h
+++ b/src/lib/util/bitmap.h
@@ -54,14 +54,14 @@
// bitmap_format describes the various bitmap formats we use
enum bitmap_format
{
- BITMAP_FORMAT_INVALID = 0, // invalid forma
- BITMAP_FORMAT_IND8, // 8bpp indexed
- BITMAP_FORMAT_IND16, // 16bpp indexed
- BITMAP_FORMAT_IND32, // 32bpp indexed
- BITMAP_FORMAT_IND64, // 64bpp indexed
- BITMAP_FORMAT_RGB32, // 32bpp 8-8-8 RGB
- BITMAP_FORMAT_ARGB32, // 32bpp 8-8-8-8 ARGB
- BITMAP_FORMAT_YUY16, // 16bpp 8-8 Y/Cb, Y/Cr in sequence
+ BITMAP_FORMAT_INVALID = 0, // invalid forma
+ BITMAP_FORMAT_IND8, // 8bpp indexed
+ BITMAP_FORMAT_IND16, // 16bpp indexed
+ BITMAP_FORMAT_IND32, // 32bpp indexed
+ BITMAP_FORMAT_IND64, // 64bpp indexed
+ BITMAP_FORMAT_RGB32, // 32bpp 8-8-8 RGB
+ BITMAP_FORMAT_ARGB32, // 32bpp 8-8-8-8 ARGB
+ BITMAP_FORMAT_YUY16, // 16bpp 8-8 Y/Cb, Y/Cr in sequence
BITMAP_FORMAT_LAST
};
@@ -136,10 +136,10 @@ public:
void offsety(INT32 delta) { min_y += delta; max_y += delta; }
// internal state
- INT32 min_x; // minimum X, or left coordinate
- INT32 max_x; // maximum X, or right coordinate (inclusive)
- INT32 min_y; // minimum Y, or top coordinate
- INT32 max_y; // maximum Y, or bottom coordinate (inclusive)
+ INT32 min_x; // minimum X, or left coordinate
+ INT32 max_x; // maximum X, or right coordinate (inclusive)
+ INT32 min_y; // minimum Y, or top coordinate
+ INT32 max_y; // maximum Y, or bottom coordinate (inclusive)
};
@@ -205,16 +205,16 @@ private:
void compute_base(int xslop, int yslop);
// internal state
- UINT8 * m_alloc; // pointer to allocated pixel memory
- UINT32 m_allocbytes; // size of our allocation
- void * m_base; // pointer to pixel (0,0) (adjusted for padding)
- INT32 m_rowpixels; // pixels per row (including padding)
- INT32 m_width; // width of the bitmap
- INT32 m_height; // height of the bitmap
- bitmap_format m_format; // format of the bitmap
- UINT8 m_bpp; // bits per pixel
- palette_t * m_palette; // optional palette
- rectangle m_cliprect; // a clipping rectangle covering the full bitmap
+ UINT8 * m_alloc; // pointer to allocated pixel memory
+ UINT32 m_allocbytes; // size of our allocation
+ void * m_base; // pointer to pixel (0,0) (adjusted for padding)
+ INT32 m_rowpixels; // pixels per row (including padding)
+ INT32 m_width; // width of the bitmap
+ INT32 m_height; // height of the bitmap
+ bitmap_format m_format; // format of the bitmap
+ UINT8 m_bpp; // bits per pixel
+ palette_t * m_palette; // optional palette
+ rectangle m_cliprect; // a clipping rectangle covering the full bitmap
};
@@ -438,4 +438,4 @@ public:
};
-#endif // __BITMAP_H__
+#endif // __BITMAP_H__
diff --git a/src/lib/util/bitstream.h b/src/lib/util/bitstream.h
index 85c2e067c2f..5e77d91d73f 100644
--- a/src/lib/util/bitstream.h
+++ b/src/lib/util/bitstream.h
@@ -68,11 +68,11 @@ public:
private:
// internal state
- UINT32 m_buffer; // current bit accumulator
- int m_bits; // number of bits in the accumulator
- const UINT8 * m_read; // read pointer
- UINT32 m_doffset; // byte offset within the data
- UINT32 m_dlength; // length of the data
+ UINT32 m_buffer; // current bit accumulator
+ int m_bits; // number of bits in the accumulator
+ const UINT8 * m_read; // read pointer
+ UINT32 m_doffset; // byte offset within the data
+ UINT32 m_dlength; // length of the data
};
@@ -92,11 +92,11 @@ public:
private:
// internal state
- UINT32 m_buffer; // current bit accumulator
- int m_bits; // number of bits in the accumulator
- UINT8 * m_write; // write pointer
- UINT32 m_doffset; // byte offset within the data
- UINT32 m_dlength; // length of the data
+ UINT32 m_buffer; // current bit accumulator
+ int m_bits; // number of bits in the accumulator
+ UINT8 * m_write; // write pointer
+ UINT32 m_doffset; // byte offset within the data
+ UINT32 m_dlength; // length of the data
};
@@ -111,10 +111,10 @@ private:
inline bitstream_in::bitstream_in(const void *src, UINT32 srclength)
: m_buffer(0),
- m_bits(0),
- m_read(reinterpret_cast<const UINT8 *>(src)),
- m_doffset(0),
- m_dlength(srclength)
+ m_bits(0),
+ m_read(reinterpret_cast<const UINT8 *>(src)),
+ m_doffset(0),
+ m_dlength(srclength)
{
}
@@ -209,10 +209,10 @@ inline UINT32 bitstream_in::flush()
inline bitstream_out::bitstream_out(void *dest, UINT32 destlength)
: m_buffer(0),
- m_bits(0),
- m_write(reinterpret_cast<UINT8 *>(dest)),
- m_doffset(0),
- m_dlength(destlength)
+ m_bits(0),
+ m_write(reinterpret_cast<UINT8 *>(dest)),
+ m_doffset(0),
+ m_dlength(destlength)
{
}
diff --git a/src/lib/util/cdrom.c b/src/lib/util/cdrom.c
index d783c556503..fd178e05444 100644
--- a/src/lib/util/cdrom.c
+++ b/src/lib/util/cdrom.c
@@ -55,7 +55,7 @@
DEBUGGING
***************************************************************************/
-#define VERBOSE (0)
+#define VERBOSE (0)
#if VERBOSE
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
void CLIB_DECL logerror(const char *text,...);
@@ -69,18 +69,18 @@ void CLIB_DECL logerror(const char *text,...);
CONSTANTS
***************************************************************************/
-const int SYNC_OFFSET = 0x000; // offset within sector
-const int SYNC_NUM_BYTES = 12; // 12 bytes
+const int SYNC_OFFSET = 0x000; // offset within sector
+const int SYNC_NUM_BYTES = 12; // 12 bytes
-const int MODE_OFFSET = 0x00f; // offset within sector
+const int MODE_OFFSET = 0x00f; // offset within sector
-const int ECC_P_OFFSET = 0x81c; // offset within sector
-const int ECC_P_NUM_BYTES = 86; // 2 lots of 86
-const int ECC_P_COMP = 24; // 24 bytes each
+const int ECC_P_OFFSET = 0x81c; // offset within sector
+const int ECC_P_NUM_BYTES = 86; // 2 lots of 86
+const int ECC_P_COMP = 24; // 24 bytes each
const int ECC_Q_OFFSET = ECC_P_OFFSET + 2 * ECC_P_NUM_BYTES;
-const int ECC_Q_NUM_BYTES = 52; // 2 lots of 52
-const int ECC_Q_COMP = 43; // 43 bytes each
+const int ECC_Q_NUM_BYTES = 52; // 2 lots of 52
+const int ECC_Q_COMP = 43; // 43 bytes each
@@ -90,10 +90,10 @@ const int ECC_Q_COMP = 43; // 43 bytes each
struct cdrom_file
{
- chd_file * chd; /* CHD file */
- cdrom_toc cdtoc; /* TOC for the CD */
- chdcd_track_input_info track_info; /* track info */
- core_file * fhandle[CD_MAX_TRACKS];/* file handle */
+ chd_file * chd; /* CHD file */
+ cdrom_toc cdtoc; /* TOC for the CD */
+ chdcd_track_input_info track_info; /* track info */
+ core_file * fhandle[CD_MAX_TRACKS];/* file handle */
};
@@ -189,8 +189,8 @@ cdrom_file *cdrom_open(const char *inputfile)
}
}
/* calculate the starting frame for each track, keeping in mind that CHDMAN
- pads tracks out with extra frames to fit 4-frame size boundries
- */
+ pads tracks out with extra frames to fit 4-frame size boundries
+ */
physofs = logofs = 0;
for (i = 0; i < file->cdtoc.numtrks; i++)
{
@@ -213,10 +213,10 @@ cdrom_file *cdrom_open(const char *inputfile)
file->cdtoc.tracks[i].datasize,
file->cdtoc.tracks[i].subsize,
file->cdtoc.tracks[i].frames,
- file->cdtoc.tracks[i].extraframes,
- file->cdtoc.tracks[i].pregap,
+ file->cdtoc.tracks[i].extraframes,
+ file->cdtoc.tracks[i].pregap,
file->cdtoc.tracks[i].postgap,
- file->cdtoc.tracks[i].logframeofs,
+ file->cdtoc.tracks[i].logframeofs,
file->cdtoc.tracks[i].physframeofs,
file->cdtoc.tracks[i].chdframeofs));
}
@@ -270,8 +270,8 @@ cdrom_file *cdrom_open(chd_file *chd)
LOG(("CD has %d tracks\n", file->cdtoc.numtrks));
/* calculate the starting frame for each track, keeping in mind that CHDMAN
- pads tracks out with extra frames to fit 4-frame size boundries
- */
+ pads tracks out with extra frames to fit 4-frame size boundries
+ */
physofs = chdofs = logofs = 0;
for (i = 0; i < file->cdtoc.numtrks; i++)
{
@@ -296,10 +296,10 @@ cdrom_file *cdrom_open(chd_file *chd)
file->cdtoc.tracks[i].datasize,
file->cdtoc.tracks[i].subsize,
file->cdtoc.tracks[i].frames,
- file->cdtoc.tracks[i].extraframes,
- file->cdtoc.tracks[i].pregap,
+ file->cdtoc.tracks[i].extraframes,
+ file->cdtoc.tracks[i].pregap,
file->cdtoc.tracks[i].postgap,
- file->cdtoc.tracks[i].logframeofs,
+ file->cdtoc.tracks[i].logframeofs,
file->cdtoc.tracks[i].physframeofs,
file->cdtoc.tracks[i].chdframeofs));
}
@@ -419,7 +419,7 @@ UINT32 cdrom_read_data(cdrom_file *file, UINT32 lbasector, void *buffer, UINT32
bufptr[12] = msf>>16;
bufptr[13] = msf>>8;
bufptr[14] = msf&0xff;
- bufptr[15] = 1; // mode 1
+ bufptr[15] = 1; // mode 1
LOG(("CDROM: promotion of mode1/form1 sector to mode1 raw is not complete!\n"));
return (read_partial_sector(file, bufptr+16, chdsector, tracknum, 0, 2048) == CHDERR_NONE);
}
@@ -516,7 +516,7 @@ UINT32 cdrom_get_track_start(cdrom_file *file, UINT32 track)
/*-------------------------------------------------
cdrom_get_track_start_phys - get the
- physical frame number that a track starts at
+ physical frame number that a track starts at
-------------------------------------------------*/
UINT32 cdrom_get_track_start_phys(cdrom_file *file, UINT32 track)
@@ -561,10 +561,10 @@ int cdrom_get_adr_control(cdrom_file *file, int track)
if (track == 0xaa || file->cdtoc.tracks[track].trktype == CD_TRACK_AUDIO)
{
- return 0x10; // audio track, subchannel is position
+ return 0x10; // audio track, subchannel is position
}
- return 0x14; // data track, subchannel is position
+ return 0x14; // data track, subchannel is position
}
@@ -756,15 +756,15 @@ const char *cdrom_get_type_string(UINT32 trktype)
{
switch (trktype)
{
- case CD_TRACK_MODE1: return "MODE1";
- case CD_TRACK_MODE1_RAW: return "MODE1_RAW";
- case CD_TRACK_MODE2: return "MODE2";
- case CD_TRACK_MODE2_FORM1: return "MODE2_FORM1";
- case CD_TRACK_MODE2_FORM2: return "MODE2_FORM2";
- case CD_TRACK_MODE2_FORM_MIX: return "MODE2_FORM_MIX";
- case CD_TRACK_MODE2_RAW: return "MODE2_RAW";
- case CD_TRACK_AUDIO: return "AUDIO";
- default: return "UNKNOWN";
+ case CD_TRACK_MODE1: return "MODE1";
+ case CD_TRACK_MODE1_RAW: return "MODE1_RAW";
+ case CD_TRACK_MODE2: return "MODE2";
+ case CD_TRACK_MODE2_FORM1: return "MODE2_FORM1";
+ case CD_TRACK_MODE2_FORM2: return "MODE2_FORM2";
+ case CD_TRACK_MODE2_FORM_MIX: return "MODE2_FORM_MIX";
+ case CD_TRACK_MODE2_RAW: return "MODE2_RAW";
+ case CD_TRACK_AUDIO: return "AUDIO";
+ default: return "UNKNOWN";
}
}
@@ -778,9 +778,9 @@ const char *cdrom_get_subtype_string(UINT32 subtype)
{
switch (subtype)
{
- case CD_SUB_NORMAL: return "RW";
- case CD_SUB_RAW: return "RW_RAW";
- default: return "NONE";
+ case CD_SUB_NORMAL: return "RW";
+ case CD_SUB_RAW: return "RW_RAW";
+ default: return "NONE";
}
}
@@ -816,7 +816,7 @@ chd_error cdrom_parse_metadata(chd_file *chd, cdrom_toc *toc)
{
/* parse the metadata */
type[0] = subtype[0] = 0;
- pgtype[0] = pgsub[0] = 0;
+ pgtype[0] = pgsub[0] = 0;
if (sscanf(metadata, CDROM_TRACK_METADATA_FORMAT, &tracknum, type, subtype, &frames) != 4)
return CHDERR_INVALID_DATA;
if (tracknum == 0 || tracknum > CD_MAX_TRACKS)
@@ -827,36 +827,36 @@ chd_error cdrom_parse_metadata(chd_file *chd, cdrom_toc *toc)
{
err = chd->read_metadata(CDROM_TRACK_METADATA2_TAG, toc->numtrks, metadata);
if (err == CHDERR_NONE)
- {
- /* parse the metadata */
- type[0] = subtype[0] = 0;
- pregap = postgap = 0;
- if (sscanf(metadata, CDROM_TRACK_METADATA2_FORMAT, &tracknum, type, subtype, &frames, &pregap, pgtype, pgsub, &postgap) != 8)
- return CHDERR_INVALID_DATA;
- if (tracknum == 0 || tracknum > CD_MAX_TRACKS)
- return CHDERR_INVALID_DATA;
- track = &toc->tracks[tracknum - 1];
- }
- else
- {
- err = chd->read_metadata(GDROM_TRACK_METADATA_TAG, toc->numtrks, metadata);
-
- if (err == CHDERR_NONE)
- {
- /* parse the metadata */
- type[0] = subtype[0] = 0;
- pregap = postgap = 0;
- if (sscanf(metadata, GDROM_TRACK_METADATA_FORMAT, &tracknum, type, subtype, &frames, &padframes, &pregap, pgtype, pgsub, &postgap) != 9)
- return CHDERR_INVALID_DATA;
- if (tracknum == 0 || tracknum > CD_MAX_TRACKS)
- return CHDERR_INVALID_DATA;
- track = &toc->tracks[tracknum - 1];
- }
- else
- {
- break;
- }
- }
+ {
+ /* parse the metadata */
+ type[0] = subtype[0] = 0;
+ pregap = postgap = 0;
+ if (sscanf(metadata, CDROM_TRACK_METADATA2_FORMAT, &tracknum, type, subtype, &frames, &pregap, pgtype, pgsub, &postgap) != 8)
+ return CHDERR_INVALID_DATA;
+ if (tracknum == 0 || tracknum > CD_MAX_TRACKS)
+ return CHDERR_INVALID_DATA;
+ track = &toc->tracks[tracknum - 1];
+ }
+ else
+ {
+ err = chd->read_metadata(GDROM_TRACK_METADATA_TAG, toc->numtrks, metadata);
+
+ if (err == CHDERR_NONE)
+ {
+ /* parse the metadata */
+ type[0] = subtype[0] = 0;
+ pregap = postgap = 0;
+ if (sscanf(metadata, GDROM_TRACK_METADATA_FORMAT, &tracknum, type, subtype, &frames, &padframes, &pregap, pgtype, pgsub, &postgap) != 9)
+ return CHDERR_INVALID_DATA;
+ if (tracknum == 0 || tracknum > CD_MAX_TRACKS)
+ return CHDERR_INVALID_DATA;
+ track = &toc->tracks[tracknum - 1];
+ }
+ else
+ {
+ break;
+ }
+ }
}
/* extract the track type and determine the data size */
@@ -873,7 +873,7 @@ chd_error cdrom_parse_metadata(chd_file *chd, cdrom_toc *toc)
/* set the frames and extra frames data */
track->frames = frames;
- track->padframes = padframes;
+ track->padframes = padframes;
int padded = (frames + CD_TRACK_PADDING - 1) / CD_TRACK_PADDING;
track->extraframes = padded * CD_TRACK_PADDING - frames;
@@ -886,15 +886,15 @@ chd_error cdrom_parse_metadata(chd_file *chd, cdrom_toc *toc)
cdrom_convert_type_string_to_pregap_info(pgtype, track);
cdrom_convert_subtype_string_to_pregap_info(pgsub, track);
- /* set the postgap info */
- track->postgap = postgap;
+ /* set the postgap info */
+ track->postgap = postgap;
}
/* if we got any tracks this way, we're done */
if (toc->numtrks > 0)
return CHDERR_NONE;
- printf("toc->numtrks = %d?!\n", toc->numtrks);
+ printf("toc->numtrks = %d?!\n", toc->numtrks);
/* look for old-style metadata */
dynamic_buffer oldmetadata;
@@ -954,25 +954,25 @@ chd_error cdrom_write_metadata(chd_file *chd, const cdrom_toc *toc)
/* write the metadata */
for (i = 0; i < toc->numtrks; i++)
{
- astring metadata;
- if (!(toc->flags & CD_FLAG_GDROM))
- {
- metadata.format(CDROM_TRACK_METADATA2_FORMAT, i + 1, cdrom_get_type_string(toc->tracks[i].trktype),
- cdrom_get_subtype_string(toc->tracks[i].subtype), toc->tracks[i].frames, toc->tracks[i].pregap,
- cdrom_get_type_string(toc->tracks[i].pgtype), cdrom_get_subtype_string(toc->tracks[i].pgsub),
- toc->tracks[i].postgap);
-
- err = chd->write_metadata(CDROM_TRACK_METADATA2_TAG, i, metadata);
- }
- else
- {
- metadata.format(GDROM_TRACK_METADATA_FORMAT, i + 1, cdrom_get_type_string(toc->tracks[i].trktype),
- cdrom_get_subtype_string(toc->tracks[i].subtype), toc->tracks[i].frames, toc->tracks[i].padframes,
- toc->tracks[i].pregap, cdrom_get_type_string(toc->tracks[i].pgtype),
- cdrom_get_subtype_string(toc->tracks[i].pgsub), toc->tracks[i].postgap);
-
- err = chd->write_metadata(GDROM_TRACK_METADATA_TAG, i, metadata);
- }
+ astring metadata;
+ if (!(toc->flags & CD_FLAG_GDROM))
+ {
+ metadata.format(CDROM_TRACK_METADATA2_FORMAT, i + 1, cdrom_get_type_string(toc->tracks[i].trktype),
+ cdrom_get_subtype_string(toc->tracks[i].subtype), toc->tracks[i].frames, toc->tracks[i].pregap,
+ cdrom_get_type_string(toc->tracks[i].pgtype), cdrom_get_subtype_string(toc->tracks[i].pgsub),
+ toc->tracks[i].postgap);
+
+ err = chd->write_metadata(CDROM_TRACK_METADATA2_TAG, i, metadata);
+ }
+ else
+ {
+ metadata.format(GDROM_TRACK_METADATA_FORMAT, i + 1, cdrom_get_type_string(toc->tracks[i].trktype),
+ cdrom_get_subtype_string(toc->tracks[i].subtype), toc->tracks[i].frames, toc->tracks[i].padframes,
+ toc->tracks[i].pregap, cdrom_get_type_string(toc->tracks[i].pgtype),
+ cdrom_get_subtype_string(toc->tracks[i].pgsub), toc->tracks[i].postgap);
+
+ err = chd->write_metadata(GDROM_TRACK_METADATA_TAG, i, metadata);
+ }
if (err != CHDERR_NONE)
return err;
}
@@ -1211,11 +1211,11 @@ void ecc_compute_bytes(const UINT8 *sector, const UINT16 *row, int rowlen, UINT8
val1 = val2 = 0;
for (int component = 0; component < rowlen; component++)
{
- val1 ^= ecc_source_byte(sector, row[component]);
- val2 ^= ecc_source_byte(sector, row[component]);
- val1 = ecclow[val1];
- }
- val1 = ecchigh[ecclow[val1] ^ val2];
+ val1 ^= ecc_source_byte(sector, row[component]);
+ val2 ^= ecc_source_byte(sector, row[component]);
+ val1 = ecclow[val1];
+ }
+ val1 = ecchigh[ecclow[val1] ^ val2];
val2 ^= val1;
}
@@ -1231,16 +1231,16 @@ bool ecc_verify(const UINT8 *sector)
for (int byte = 0; byte < ECC_P_NUM_BYTES; byte++)
{
UINT8 val1, val2;
- ecc_compute_bytes(sector, poffsets[byte], ECC_P_COMP, val1, val2);
+ ecc_compute_bytes(sector, poffsets[byte], ECC_P_COMP, val1, val2);
if (sector[ECC_P_OFFSET + byte] != val1 || sector[ECC_P_OFFSET + ECC_P_NUM_BYTES + byte] != val2)
return false;
}
// then verify Q bytes
- for (int byte = 0; byte < ECC_Q_NUM_BYTES; byte++)
+ for (int byte = 0; byte < ECC_Q_NUM_BYTES; byte++)
{
UINT8 val1, val2;
- ecc_compute_bytes(sector, qoffsets[byte], ECC_Q_COMP, val1, val2);
+ ecc_compute_bytes(sector, qoffsets[byte], ECC_Q_COMP, val1, val2);
if (sector[ECC_Q_OFFSET + byte] != val1 || sector[ECC_Q_OFFSET + ECC_Q_NUM_BYTES + byte] != val2)
return false;
}
@@ -1257,11 +1257,11 @@ void ecc_generate(UINT8 *sector)
{
// first verify P bytes
for (int byte = 0; byte < ECC_P_NUM_BYTES; byte++)
- ecc_compute_bytes(sector, poffsets[byte], ECC_P_COMP, sector[ECC_P_OFFSET + byte], sector[ECC_P_OFFSET + ECC_P_NUM_BYTES + byte]);
+ ecc_compute_bytes(sector, poffsets[byte], ECC_P_COMP, sector[ECC_P_OFFSET + byte], sector[ECC_P_OFFSET + ECC_P_NUM_BYTES + byte]);
// then verify Q bytes
- for (int byte = 0; byte < ECC_Q_NUM_BYTES; byte++)
- ecc_compute_bytes(sector, qoffsets[byte], ECC_Q_COMP, sector[ECC_Q_OFFSET + byte], sector[ECC_Q_OFFSET + ECC_Q_NUM_BYTES + byte]);
+ for (int byte = 0; byte < ECC_Q_NUM_BYTES; byte++)
+ ecc_compute_bytes(sector, qoffsets[byte], ECC_Q_COMP, sector[ECC_Q_OFFSET + byte], sector[ECC_Q_OFFSET + ECC_Q_NUM_BYTES + byte]);
}
diff --git a/src/lib/util/cdrom.h b/src/lib/util/cdrom.h
index 8737df50fdf..f17280ba449 100644
--- a/src/lib/util/cdrom.h
+++ b/src/lib/util/cdrom.h
@@ -54,37 +54,37 @@
// tracks are padded to a multiple of this many frames
const UINT32 CD_TRACK_PADDING = 4;
-#define CD_MAX_TRACKS (99) /* AFAIK the theoretical limit */
-#define CD_MAX_SECTOR_DATA (2352)
-#define CD_MAX_SUBCODE_DATA (96)
+#define CD_MAX_TRACKS (99) /* AFAIK the theoretical limit */
+#define CD_MAX_SECTOR_DATA (2352)
+#define CD_MAX_SUBCODE_DATA (96)
-#define CD_FRAME_SIZE (CD_MAX_SECTOR_DATA + CD_MAX_SUBCODE_DATA)
-#define CD_FRAMES_PER_HUNK (8)
+#define CD_FRAME_SIZE (CD_MAX_SECTOR_DATA + CD_MAX_SUBCODE_DATA)
+#define CD_FRAMES_PER_HUNK (8)
-#define CD_METADATA_WORDS (1+(CD_MAX_TRACKS * 6))
+#define CD_METADATA_WORDS (1+(CD_MAX_TRACKS * 6))
enum
{
- CD_TRACK_MODE1 = 0, /* mode 1 2048 bytes/sector */
- CD_TRACK_MODE1_RAW, /* mode 1 2352 bytes/sector */
- CD_TRACK_MODE2, /* mode 2 2336 bytes/sector */
- CD_TRACK_MODE2_FORM1, /* mode 2 2048 bytes/sector */
- CD_TRACK_MODE2_FORM2, /* mode 2 2324 bytes/sector */
- CD_TRACK_MODE2_FORM_MIX, /* mode 2 2336 bytes/sector */
- CD_TRACK_MODE2_RAW, /* mode 2 2352 bytes / sector */
- CD_TRACK_AUDIO, /* redbook audio track 2352 bytes/sector (588 samples) */
-
- CD_TRACK_RAW_DONTCARE /* special flag for cdrom_read_data: just return me whatever is there */
+ CD_TRACK_MODE1 = 0, /* mode 1 2048 bytes/sector */
+ CD_TRACK_MODE1_RAW, /* mode 1 2352 bytes/sector */
+ CD_TRACK_MODE2, /* mode 2 2336 bytes/sector */
+ CD_TRACK_MODE2_FORM1, /* mode 2 2048 bytes/sector */
+ CD_TRACK_MODE2_FORM2, /* mode 2 2324 bytes/sector */
+ CD_TRACK_MODE2_FORM_MIX, /* mode 2 2336 bytes/sector */
+ CD_TRACK_MODE2_RAW, /* mode 2 2352 bytes / sector */
+ CD_TRACK_AUDIO, /* redbook audio track 2352 bytes/sector (588 samples) */
+
+ CD_TRACK_RAW_DONTCARE /* special flag for cdrom_read_data: just return me whatever is there */
};
enum
{
- CD_SUB_NORMAL = 0, /* "cooked" 96 bytes per sector */
- CD_SUB_RAW, /* raw uninterleaved 96 bytes per sector */
- CD_SUB_NONE /* no subcode data stored */
+ CD_SUB_NORMAL = 0, /* "cooked" 96 bytes per sector */
+ CD_SUB_RAW, /* raw uninterleaved 96 bytes per sector */
+ CD_SUB_NONE /* no subcode data stored */
};
-#define CD_FLAG_GDROM 0x00000001 // disc is a GD-ROM, all tracks should be stored with GD-ROM metadata
+#define CD_FLAG_GDROM 0x00000001 // disc is a GD-ROM, all tracks should be stored with GD-ROM metadata
/***************************************************************************
TYPE DEFINITIONS
@@ -95,33 +95,33 @@ struct cdrom_file;
struct cdrom_track_info
{
/* fields used by CHDMAN and in MAME */
- UINT32 trktype; /* track type */
- UINT32 subtype; /* subcode data type */
- UINT32 datasize; /* size of data in each sector of this track */
- UINT32 subsize; /* size of subchannel data in each sector of this track */
- UINT32 frames; /* number of frames in this track */
- UINT32 extraframes; /* number of "spillage" frames in this track */
- UINT32 pregap; /* number of pregap frames */
- UINT32 postgap; /* number of postgap frames */
- UINT32 pgtype; /* type of sectors in pregap */
- UINT32 pgsub; /* type of subchannel data in pregap */
- UINT32 pgdatasize; /* size of data in each sector of the pregap */
- UINT32 pgsubsize; /* size of subchannel data in each sector of the pregap */
+ UINT32 trktype; /* track type */
+ UINT32 subtype; /* subcode data type */
+ UINT32 datasize; /* size of data in each sector of this track */
+ UINT32 subsize; /* size of subchannel data in each sector of this track */
+ UINT32 frames; /* number of frames in this track */
+ UINT32 extraframes; /* number of "spillage" frames in this track */
+ UINT32 pregap; /* number of pregap frames */
+ UINT32 postgap; /* number of postgap frames */
+ UINT32 pgtype; /* type of sectors in pregap */
+ UINT32 pgsub; /* type of subchannel data in pregap */
+ UINT32 pgdatasize; /* size of data in each sector of the pregap */
+ UINT32 pgsubsize; /* size of subchannel data in each sector of the pregap */
/* fields used in CHDMAN only */
- UINT32 padframes; /* number of frames of padding to add to the end of the track; needed for GDI */
+ UINT32 padframes; /* number of frames of padding to add to the end of the track; needed for GDI */
/* fields used in MAME only */
- UINT32 logframeofs; /* logical frame offset: offset including pre/postgaps */
+ UINT32 logframeofs; /* logical frame offset: offset including pre/postgaps */
UINT32 physframeofs; /* physical frame offset: offset ignoring pre/postgaps */
- UINT32 chdframeofs; /* frame number this track starts at on the CHD */
+ UINT32 chdframeofs; /* frame number this track starts at on the CHD */
};
struct cdrom_toc
{
- UINT32 numtrks; /* number of tracks */
- UINT32 flags; /* see FLAG_ above */
+ UINT32 numtrks; /* number of tracks */
+ UINT32 flags; /* see FLAG_ above */
cdrom_track_info tracks[CD_MAX_TRACKS];
};
@@ -188,8 +188,8 @@ INLINE UINT32 lba_to_msf(UINT32 lba)
f = lba % 75;
return ((m / 10) << 20) | ((m % 10) << 16) |
- ((s / 10) << 12) | ((s % 10) << 8) |
- ((f / 10) << 4) | ((f % 10) << 0);
+ ((s / 10) << 12) | ((s % 10) << 8) |
+ ((f / 10) << 4) | ((f % 10) << 0);
}
// segacd needs it like this.. investigate
@@ -209,4 +209,4 @@ INLINE UINT32 lba_to_msf_alt(int lba)
-#endif // __CDROM_H__
+#endif // __CDROM_H__
diff --git a/src/lib/util/chd.c b/src/lib/util/chd.c
index 5c139a763c0..f47c471a0e3 100644
--- a/src/lib/util/chd.c
+++ b/src/lib/util/chd.c
@@ -61,45 +61,45 @@ const char *CDROM_TRACK_METADATA2_FORMAT = "TRACK:%d TYPE:%s SUBTYPE:%s FRAMES:%
const char *GDROM_TRACK_METADATA_FORMAT = "TRACK:%d TYPE:%s SUBTYPE:%s FRAMES:%d PAD:%d PREGAP:%d PGTYPE:%s PGSUB:%s POSTGAP:%d";
const char *AV_METADATA_FORMAT = "FPS:%d.%06d WIDTH:%d HEIGHT:%d INTERLACED:%d CHANNELS:%d SAMPLERATE:%d";
-static const UINT32 METADATA_HEADER_SIZE = 16; // metadata header size
+static const UINT32 METADATA_HEADER_SIZE = 16; // metadata header size
-static const UINT8 V34_MAP_ENTRY_FLAG_TYPE_MASK = 0x0f; // what type of hunk
-static const UINT8 V34_MAP_ENTRY_FLAG_NO_CRC = 0x10; // no CRC is present
+static const UINT8 V34_MAP_ENTRY_FLAG_TYPE_MASK = 0x0f; // what type of hunk
+static const UINT8 V34_MAP_ENTRY_FLAG_NO_CRC = 0x10; // no CRC is present
// V3-V4 entry types
enum
{
- V34_MAP_ENTRY_TYPE_INVALID = 0, // invalid type
- V34_MAP_ENTRY_TYPE_COMPRESSED = 1, // standard compression
- V34_MAP_ENTRY_TYPE_UNCOMPRESSED = 2, // uncompressed data
- V34_MAP_ENTRY_TYPE_MINI = 3, // mini: use offset as raw data
- V34_MAP_ENTRY_TYPE_SELF_HUNK = 4, // same as another hunk in this file
- V34_MAP_ENTRY_TYPE_PARENT_HUNK = 5, // same as a hunk in the parent file
- V34_MAP_ENTRY_TYPE_2ND_COMPRESSED = 6 // compressed with secondary algorithm (usually FLAC CDDA)
+ V34_MAP_ENTRY_TYPE_INVALID = 0, // invalid type
+ V34_MAP_ENTRY_TYPE_COMPRESSED = 1, // standard compression
+ V34_MAP_ENTRY_TYPE_UNCOMPRESSED = 2, // uncompressed data
+ V34_MAP_ENTRY_TYPE_MINI = 3, // mini: use offset as raw data
+ V34_MAP_ENTRY_TYPE_SELF_HUNK = 4, // same as another hunk in this file
+ V34_MAP_ENTRY_TYPE_PARENT_HUNK = 5, // same as a hunk in the parent file
+ V34_MAP_ENTRY_TYPE_2ND_COMPRESSED = 6 // compressed with secondary algorithm (usually FLAC CDDA)
};
// V5 compression types
enum
{
// these types are live when running
- COMPRESSION_TYPE_0 = 0, // codec #0
- COMPRESSION_TYPE_1 = 1, // codec #1
- COMPRESSION_TYPE_2 = 2, // codec #2
- COMPRESSION_TYPE_3 = 3, // codec #3
- COMPRESSION_NONE = 4, // no compression; implicit length = hunkbytes
- COMPRESSION_SELF = 5, // same as another block in this chd
- COMPRESSION_PARENT = 6, // same as a hunk's worth of units in the parent chd
+ COMPRESSION_TYPE_0 = 0, // codec #0
+ COMPRESSION_TYPE_1 = 1, // codec #1
+ COMPRESSION_TYPE_2 = 2, // codec #2
+ COMPRESSION_TYPE_3 = 3, // codec #3
+ COMPRESSION_NONE = 4, // no compression; implicit length = hunkbytes
+ COMPRESSION_SELF = 5, // same as another block in this chd
+ COMPRESSION_PARENT = 6, // same as a hunk's worth of units in the parent chd
// these additional pseudo-types are used for compressed encodings:
- COMPRESSION_RLE_SMALL, // start of small RLE run (4-bit length)
- COMPRESSION_RLE_LARGE, // start of large RLE run (8-bit length)
- COMPRESSION_SELF_0, // same as the last COMPRESSION_SELF block
- COMPRESSION_SELF_1, // same as the last COMPRESSION_SELF block + 1
- COMPRESSION_PARENT_SELF, // same block in the parent
- COMPRESSION_PARENT_0, // same as the last COMPRESSION_PARENT block
- COMPRESSION_PARENT_1 // same as the last COMPRESSION_PARENT block + 1
+ COMPRESSION_RLE_SMALL, // start of small RLE run (4-bit length)
+ COMPRESSION_RLE_LARGE, // start of large RLE run (8-bit length)
+ COMPRESSION_SELF_0, // same as the last COMPRESSION_SELF block
+ COMPRESSION_SELF_1, // same as the last COMPRESSION_SELF block + 1
+ COMPRESSION_PARENT_SELF, // same block in the parent
+ COMPRESSION_PARENT_0, // same as the last COMPRESSION_PARENT block
+ COMPRESSION_PARENT_1 // same as the last COMPRESSION_PARENT block + 1
};
@@ -113,12 +113,12 @@ enum
// description of where a metadata entry lives within the file
struct chd_file::metadata_entry
{
- UINT64 offset; // offset within the file of the header
- UINT64 next; // offset within the file of the next header
- UINT64 prev; // offset within the file of the previous header
- UINT32 length; // length of the metadata
- UINT32 metatag; // metadata tag
- UINT8 flags; // flag bits
+ UINT64 offset; // offset within the file of the header
+ UINT64 next; // offset within the file of the next header
+ UINT64 prev; // offset within the file of the previous header
+ UINT32 length; // length of the metadata
+ UINT32 metatag; // metadata tag
+ UINT8 flags; // flag bits
};
@@ -126,8 +126,8 @@ struct chd_file::metadata_entry
struct chd_file::metadata_hash
{
- UINT8 tag[4]; // tag of the metadata in big-endian
- sha1_t sha1; // hash data
+ UINT8 tag[4]; // tag of the metadata in big-endian
+ sha1_t sha1; // hash data
};
@@ -297,7 +297,7 @@ inline UINT8 chd_file::bits_for_value(UINT64 value)
chd_file::chd_file()
: m_file(NULL),
- m_owns_file(false)
+ m_owns_file(false)
{
// reset state
memset(m_decompressor, 0, sizeof(m_decompressor));
@@ -1382,39 +1382,39 @@ const char *chd_file::error_string(chd_error err)
{
switch (err)
{
- case CHDERR_NONE: return "no error";
- case CHDERR_NO_INTERFACE: return "no drive interface";
- case CHDERR_OUT_OF_MEMORY: return "out of memory";
- case CHDERR_NOT_OPEN: return "file not open";
- case CHDERR_ALREADY_OPEN: return "file already open";
- case CHDERR_INVALID_FILE: return "invalid file";
- case CHDERR_INVALID_PARAMETER: return "invalid parameter";
- case CHDERR_INVALID_DATA: return "invalid data";
- case CHDERR_FILE_NOT_FOUND: return "file not found";
- case CHDERR_REQUIRES_PARENT: return "requires parent";
- case CHDERR_FILE_NOT_WRITEABLE: return "file not writeable";
- case CHDERR_READ_ERROR: return "read error";
- case CHDERR_WRITE_ERROR: return "write error";
- case CHDERR_CODEC_ERROR: return "codec error";
- case CHDERR_INVALID_PARENT: return "invalid parent";
- case CHDERR_HUNK_OUT_OF_RANGE: return "hunk out of range";
- case CHDERR_DECOMPRESSION_ERROR: return "decompression error";
- case CHDERR_COMPRESSION_ERROR: return "compression error";
- case CHDERR_CANT_CREATE_FILE: return "can't create file";
- case CHDERR_CANT_VERIFY: return "can't verify file";
- case CHDERR_NOT_SUPPORTED: return "operation not supported";
- case CHDERR_METADATA_NOT_FOUND: return "can't find metadata";
- case CHDERR_INVALID_METADATA_SIZE: return "invalid metadata size";
- case CHDERR_UNSUPPORTED_VERSION: return "mismatched DIFF and CHD or unsupported CHD version";
- case CHDERR_VERIFY_INCOMPLETE: return "incomplete verify";
- case CHDERR_INVALID_METADATA: return "invalid metadata";
- case CHDERR_INVALID_STATE: return "invalid state";
- case CHDERR_OPERATION_PENDING: return "operation pending";
- case CHDERR_UNSUPPORTED_FORMAT: return "unsupported format";
- case CHDERR_UNKNOWN_COMPRESSION: return "unknown compression type";
- case CHDERR_WALKING_PARENT: return "currently examining parent";
- case CHDERR_COMPRESSING: return "currently compressing";
- default: return "undocumented error";
+ case CHDERR_NONE: return "no error";
+ case CHDERR_NO_INTERFACE: return "no drive interface";
+ case CHDERR_OUT_OF_MEMORY: return "out of memory";
+ case CHDERR_NOT_OPEN: return "file not open";
+ case CHDERR_ALREADY_OPEN: return "file already open";
+ case CHDERR_INVALID_FILE: return "invalid file";
+ case CHDERR_INVALID_PARAMETER: return "invalid parameter";
+ case CHDERR_INVALID_DATA: return "invalid data";
+ case CHDERR_FILE_NOT_FOUND: return "file not found";
+ case CHDERR_REQUIRES_PARENT: return "requires parent";
+ case CHDERR_FILE_NOT_WRITEABLE: return "file not writeable";
+ case CHDERR_READ_ERROR: return "read error";
+ case CHDERR_WRITE_ERROR: return "write error";
+ case CHDERR_CODEC_ERROR: return "codec error";
+ case CHDERR_INVALID_PARENT: return "invalid parent";
+ case CHDERR_HUNK_OUT_OF_RANGE: return "hunk out of range";
+ case CHDERR_DECOMPRESSION_ERROR: return "decompression error";
+ case CHDERR_COMPRESSION_ERROR: return "compression error";
+ case CHDERR_CANT_CREATE_FILE: return "can't create file";
+ case CHDERR_CANT_VERIFY: return "can't verify file";
+ case CHDERR_NOT_SUPPORTED: return "operation not supported";
+ case CHDERR_METADATA_NOT_FOUND: return "can't find metadata";
+ case CHDERR_INVALID_METADATA_SIZE: return "invalid metadata size";
+ case CHDERR_UNSUPPORTED_VERSION: return "mismatched DIFF and CHD or unsupported CHD version";
+ case CHDERR_VERIFY_INCOMPLETE: return "incomplete verify";
+ case CHDERR_INVALID_METADATA: return "invalid metadata";
+ case CHDERR_INVALID_STATE: return "invalid state";
+ case CHDERR_OPERATION_PENDING: return "operation pending";
+ case CHDERR_UNSUPPORTED_FORMAT: return "unsupported format";
+ case CHDERR_UNKNOWN_COMPRESSION: return "unknown compression type";
+ case CHDERR_WALKING_PARENT: return "currently examining parent";
+ case CHDERR_COMPRESSING: return "currently compressing";
+ default: return "undocumented error";
}
}
@@ -1474,10 +1474,10 @@ void chd_file::parse_v3_header(UINT8 *rawheader, sha1_t &parentsha1)
// determine compression
switch (be_read(&rawheader[20], 4))
{
- case 0: m_compression[0] = CHD_CODEC_NONE; break;
- case 1: m_compression[0] = CHD_CODEC_ZLIB; break;
- case 2: m_compression[0] = CHD_CODEC_ZLIB; break;
- case 3: m_compression[0] = CHD_CODEC_AVHUFF; break;
+ case 0: m_compression[0] = CHD_CODEC_NONE; break;
+ case 1: m_compression[0] = CHD_CODEC_ZLIB; break;
+ case 2: m_compression[0] = CHD_CODEC_ZLIB; break;
+ case 3: m_compression[0] = CHD_CODEC_AVHUFF; break;
default: throw CHDERR_UNKNOWN_COMPRESSION;
}
m_compression[1] = m_compression[2] = m_compression[3] = CHD_CODEC_NONE;
@@ -1527,10 +1527,10 @@ void chd_file::parse_v4_header(UINT8 *rawheader, sha1_t &parentsha1)
// determine compression
switch (be_read(&rawheader[20], 4))
{
- case 0: m_compression[0] = CHD_CODEC_NONE; break;
- case 1: m_compression[0] = CHD_CODEC_ZLIB; break;
- case 2: m_compression[0] = CHD_CODEC_ZLIB; break;
- case 3: m_compression[0] = CHD_CODEC_AVHUFF; break;
+ case 0: m_compression[0] = CHD_CODEC_NONE; break;
+ case 1: m_compression[0] = CHD_CODEC_ZLIB; break;
+ case 2: m_compression[0] = CHD_CODEC_ZLIB; break;
+ case 3: m_compression[0] = CHD_CODEC_AVHUFF; break;
default: throw CHDERR_UNKNOWN_COMPRESSION;
}
m_compression[1] = m_compression[2] = m_compression[3] = CHD_CODEC_NONE;
@@ -1787,7 +1787,7 @@ chd_error chd_file::compress_v5_map()
compressed[12] = lengthbits;
compressed[13] = selfbits;
compressed[14] = parentbits;
- compressed[15] = 0;
+ compressed[15] = 0;
// write the result
m_mapoffset = file_append(compressed, complen + 16);
@@ -2052,10 +2052,10 @@ chd_error chd_file::open_common(bool writeable)
sha1_t parentsha1 = sha1_t::null;
switch (m_version)
{
- case 3: parse_v3_header(rawheader, parentsha1); break;
- case 4: parse_v4_header(rawheader, parentsha1); break;
- case 5: parse_v5_header(rawheader, parentsha1); break;
- default: throw CHDERR_UNSUPPORTED_VERSION;
+ case 3: parse_v3_header(rawheader, parentsha1); break;
+ case 4: parse_v4_header(rawheader, parentsha1); break;
+ case 5: parse_v5_header(rawheader, parentsha1); break;
+ default: throw CHDERR_UNSUPPORTED_VERSION;
}
if (writeable && !m_allow_writes)
@@ -2335,14 +2335,14 @@ int CLIB_DECL chd_file::metadata_hash_compare(const void *elem1, const void *ele
chd_file_compressor::chd_file_compressor()
: m_walking_parent(false),
- m_total_in(0),
- m_total_out(0),
- m_read_queue(NULL),
- m_read_queue_offset(0),
- m_read_done_offset(0),
- m_read_error(false),
- m_work_queue(NULL),
- m_write_hunk(0)
+ m_total_in(0),
+ m_total_out(0),
+ m_read_queue(NULL),
+ m_read_queue_offset(0),
+ m_read_done_offset(0),
+ m_read_error(false),
+ m_work_queue(NULL),
+ m_write_hunk(0)
{
// zap arrays
memset(m_work_item, 0, sizeof(m_work_item));
diff --git a/src/lib/util/chd.h b/src/lib/util/chd.h
index 67585f2f2ce..f1faa713495 100644
--- a/src/lib/util/chd.h
+++ b/src/lib/util/chd.h
@@ -221,9 +221,9 @@
//**************************************************************************
// pseudo-codecs returned by hunk_info
-const chd_codec_type CHD_CODEC_SELF = 1; // copy of another hunk
-const chd_codec_type CHD_CODEC_PARENT = 2; // copy of a parent's hunk
-const chd_codec_type CHD_CODEC_MINI = 3; // legacy "mini" 8-byte repeat
+const chd_codec_type CHD_CODEC_SELF = 1; // copy of another hunk
+const chd_codec_type CHD_CODEC_PARENT = 2; // copy of a parent's hunk
+const chd_codec_type CHD_CODEC_MINI = 3; // legacy "mini" 8-byte repeat
// core types
typedef UINT32 chd_metadata_tag;
@@ -233,7 +233,7 @@ const chd_metadata_tag CHDMETATAG_WILDCARD = 0;
const UINT32 CHDMETAINDEX_APPEND = ~0;
// metadata flags
-const UINT8 CHD_MDFLAGS_CHECKSUM = 0x01; // indicates data is checksummed
+const UINT8 CHD_MDFLAGS_CHECKSUM = 0x01; // indicates data is checksummed
// standard hard disk metadata
const chd_metadata_tag HARD_DISK_METADATA_TAG = CHD_MAKE_TAG('G','D','D','D');
@@ -428,42 +428,42 @@ private:
static int CLIB_DECL metadata_hash_compare(const void *elem1, const void *elem2);
// file characteristics
- core_file * m_file; // handle to the open core file
- bool m_owns_file; // flag indicating if this file should be closed on chd_close()
- bool m_allow_reads; // permit reads from this CHD?
- bool m_allow_writes; // permit writes to this CHD?
+ core_file * m_file; // handle to the open core file
+ bool m_owns_file; // flag indicating if this file should be closed on chd_close()
+ bool m_allow_reads; // permit reads from this CHD?
+ bool m_allow_writes; // permit writes to this CHD?
// core parameters from the header
- UINT32 m_version; // version of the header
- UINT64 m_logicalbytes; // logical size of the raw CHD data in bytes
- UINT64 m_mapoffset; // offset of map
- UINT64 m_metaoffset; // offset to first metadata bit
- UINT32 m_hunkbytes; // size of each raw hunk in bytes
- UINT32 m_hunkcount; // number of hunks represented
- UINT32 m_unitbytes; // size of each unit in bytes
- UINT64 m_unitcount; // number of units represented
- chd_codec_type m_compression[4]; // array of compression types used
- chd_file * m_parent; // pointer to parent file, or NULL if none
- bool m_parent_missing; // are we missing our parent?
+ UINT32 m_version; // version of the header
+ UINT64 m_logicalbytes; // logical size of the raw CHD data in bytes
+ UINT64 m_mapoffset; // offset of map
+ UINT64 m_metaoffset; // offset to first metadata bit
+ UINT32 m_hunkbytes; // size of each raw hunk in bytes
+ UINT32 m_hunkcount; // number of hunks represented
+ UINT32 m_unitbytes; // size of each unit in bytes
+ UINT64 m_unitcount; // number of units represented
+ chd_codec_type m_compression[4]; // array of compression types used
+ chd_file * m_parent; // pointer to parent file, or NULL if none
+ bool m_parent_missing; // are we missing our parent?
// key offsets within the header
- UINT64 m_mapoffset_offset; // offset of map offset field
- UINT64 m_metaoffset_offset;// offset of metaoffset field
- UINT64 m_sha1_offset; // offset of SHA1 field
- UINT64 m_rawsha1_offset; // offset of raw SHA1 field
- UINT64 m_parentsha1_offset;// offset of paren SHA1 field
+ UINT64 m_mapoffset_offset; // offset of map offset field
+ UINT64 m_metaoffset_offset;// offset of metaoffset field
+ UINT64 m_sha1_offset; // offset of SHA1 field
+ UINT64 m_rawsha1_offset; // offset of raw SHA1 field
+ UINT64 m_parentsha1_offset;// offset of paren SHA1 field
// map information
- UINT32 m_mapentrybytes; // length of each entry in a map
- dynamic_buffer m_rawmap; // raw map data
+ UINT32 m_mapentrybytes; // length of each entry in a map
+ dynamic_buffer m_rawmap; // raw map data
// compression management
- chd_decompressor * m_decompressor[4]; // array of decompression codecs
- dynamic_buffer m_compressed; // temporary buffer for compressed data
+ chd_decompressor * m_decompressor[4]; // array of decompression codecs
+ dynamic_buffer m_compressed; // temporary buffer for compressed data
// caching
- dynamic_buffer m_cache; // single-hunk cache for partial reads/writes
- UINT32 m_cachehunk; // which hunk is in the cache?
+ dynamic_buffer m_cache; // single-hunk cache for partial reads/writes
+ UINT32 m_cachehunk; // which hunk is in the cache?
};
@@ -505,9 +505,9 @@ private:
// internal entry
struct entry_t
{
- entry_t * m_next; // next entry in list
- UINT64 m_itemnum; // item number
- sha1_t m_sha1; // SHA-1 of the block
+ entry_t * m_next; // next entry in list
+ UINT64 m_itemnum; // item number
+ sha1_t m_sha1; // SHA-1 of the block
};
// block of entries
@@ -516,14 +516,14 @@ private:
entry_block(entry_block *prev)
: m_next(prev), m_nextalloc(0) { }
- entry_block * m_next; // next block in list
- UINT32 m_nextalloc; // next to be allocated
- entry_t m_array[16384]; // array of entries
+ entry_block * m_next; // next block in list
+ UINT32 m_nextalloc; // next to be allocated
+ entry_t m_array[16384]; // array of entries
};
// internal state
- entry_t * m_map[65536]; // map, hashed by CRC-16
- entry_block * m_block_list; // list of allocated blocks
+ entry_t * m_map[65536]; // map, hashed by CRC-16
+ entry_block * m_block_list; // list of allocated blocks
};
// status of a given work item
@@ -538,23 +538,23 @@ private:
// a CRC-16/SHA-1 pair
struct hash_pair
{
- crc16_t m_crc16; // calculated CRC-16
- sha1_t m_sha1; // calculated SHA-1
+ crc16_t m_crc16; // calculated CRC-16
+ sha1_t m_sha1; // calculated SHA-1
};
// a single work item
struct work_item
{
- osd_work_item * m_osd; // OSD work item running on this block
- chd_file_compressor *m_compressor; // pointer back to the compressor
- volatile work_status m_status; // current status of this item
- UINT32 m_hunknum; // number of the hunk we're working on
- UINT8 * m_data; // pointer to the data we are working on
- UINT8 * m_compressed; // pointer to the compressed data
- UINT32 m_complen; // compressed data length
- INT8 m_compression; // type of compression used
- chd_compressor_group *m_codecs; // codec instance
- dynamic_array<hash_pair> m_hash; // array of hashes
+ osd_work_item * m_osd; // OSD work item running on this block
+ chd_file_compressor *m_compressor; // pointer back to the compressor
+ volatile work_status m_status; // current status of this item
+ UINT32 m_hunknum; // number of the hunk we're working on
+ UINT8 * m_data; // pointer to the data we are working on
+ UINT8 * m_compressed; // pointer to the compressed data
+ UINT32 m_complen; // compressed data length
+ INT8 m_compression; // type of compression used
+ chd_compressor_group *m_codecs; // codec instance
+ dynamic_array<hash_pair> m_hash; // array of hashes
};
// internal helpers
@@ -566,31 +566,31 @@ private:
void async_read();
// current compression status
- bool m_walking_parent; // are we building the parent map?
- UINT64 m_total_in; // total bytes in
- UINT64 m_total_out; // total bytes out
- sha1_creator m_compsha1; // running SHA-1 on raw data
+ bool m_walking_parent; // are we building the parent map?
+ UINT64 m_total_in; // total bytes in
+ UINT64 m_total_out; // total bytes out
+ sha1_creator m_compsha1; // running SHA-1 on raw data
// hash lookup maps
- hashmap m_parent_map; // hash map for parent
- hashmap m_current_map; // hash map for current
+ hashmap m_parent_map; // hash map for parent
+ hashmap m_current_map; // hash map for current
// read I/O thread
- osd_work_queue * m_read_queue; // work queue for reading
- UINT64 m_read_queue_offset;// next offset to enqueue
- UINT64 m_read_done_offset; // next offset that will complete
- bool m_read_error; // error during reading?
+ osd_work_queue * m_read_queue; // work queue for reading
+ UINT64 m_read_queue_offset;// next offset to enqueue
+ UINT64 m_read_done_offset; // next offset that will complete
+ bool m_read_error; // error during reading?
// work item thread
static const int WORK_BUFFER_HUNKS = 256;
- osd_work_queue * m_work_queue; // queue for doing work on other threads
- dynamic_buffer m_work_buffer; // buffer containing hunk data to work on
- dynamic_buffer m_compressed_buffer;// buffer containing compressed data
- work_item m_work_item[WORK_BUFFER_HUNKS]; // status of each hunk
- chd_compressor_group * m_codecs[WORK_MAX_THREADS]; // codecs to use
+ osd_work_queue * m_work_queue; // queue for doing work on other threads
+ dynamic_buffer m_work_buffer; // buffer containing hunk data to work on
+ dynamic_buffer m_compressed_buffer;// buffer containing compressed data
+ work_item m_work_item[WORK_BUFFER_HUNKS]; // status of each hunk
+ chd_compressor_group * m_codecs[WORK_MAX_THREADS]; // codecs to use
// output state
- UINT32 m_write_hunk; // next hunk to write
+ UINT32 m_write_hunk; // next hunk to write
};
diff --git a/src/lib/util/chdcd.c b/src/lib/util/chdcd.c
index 3a6c272a22a..87985287caf 100644
--- a/src/lib/util/chdcd.c
+++ b/src/lib/util/chdcd.c
@@ -426,7 +426,7 @@ chd_error chdcd_parse_nero(const char *tocfname, cdrom_toc &outtoc, chdcd_track_
UINT32 size, mode;
UINT64 index0, index1, track_end;
- fseek(infile, 12, SEEK_CUR); // skip ISRC code
+ fseek(infile, 12, SEEK_CUR); // skip ISRC code
size = read_uint16(infile);
mode = read_uint16(infile);
fseek(infile, 2, SEEK_CUR);
@@ -442,42 +442,42 @@ chd_error chdcd_parse_nero(const char *tocfname, cdrom_toc &outtoc, chdcd_track_
switch (mode)
{
- case 0x0000: // 2048 byte data
+ case 0x0000: // 2048 byte data
outtoc.tracks[track-1].trktype = CD_TRACK_MODE1;
outinfo.track[track-1].swap = false;
break;
- case 0x0300: // Mode 2 Form 1
+ case 0x0300: // Mode 2 Form 1
printf("ERROR: Mode 2 Form 1 tracks not supported\n");
fclose(infile);
return CHDERR_UNSUPPORTED_FORMAT;
- case 0x0500: // raw data
+ case 0x0500: // raw data
printf("ERROR: Raw data tracks not supported\n");
fclose(infile);
return CHDERR_UNSUPPORTED_FORMAT;
- case 0x0600: // 2352 byte mode 2 raw
+ case 0x0600: // 2352 byte mode 2 raw
outtoc.tracks[track-1].trktype = CD_TRACK_MODE2_RAW;
outinfo.track[track-1].swap = false;
break;
- case 0x0700: // 2352 byte audio
+ case 0x0700: // 2352 byte audio
outtoc.tracks[track-1].trktype = CD_TRACK_AUDIO;
outinfo.track[track-1].swap = true;
break;
- case 0x0f00: // raw data with sub-channel
+ case 0x0f00: // raw data with sub-channel
printf("ERROR: Raw data tracks with sub-channel not supported\n");
fclose(infile);
return CHDERR_UNSUPPORTED_FORMAT;
- case 0x1000: // audio with sub-channel
+ case 0x1000: // audio with sub-channel
printf("ERROR: Audio tracks with sub-channel not supported\n");
fclose(infile);
return CHDERR_UNSUPPORTED_FORMAT;
- case 0x1100: // raw Mode 2 Form 1 with sub-channel
+ case 0x1100: // raw Mode 2 Form 1 with sub-channel
printf("ERROR: Raw Mode 2 Form 1 tracks with sub-channel not supported\n");
fclose(infile);
return CHDERR_UNSUPPORTED_FORMAT;
@@ -609,7 +609,7 @@ static chd_error chdcd_parse_gdi(const char *tocfname, cdrom_toc &outtoc, chdcd_
memset(&outtoc, 0, sizeof(outtoc));
outinfo.reset();
- outtoc.flags = CD_FLAG_GDROM;
+ outtoc.flags = CD_FLAG_GDROM;
fgets(linebuffer,511,infile);
numtracks=atoi(linebuffer);
@@ -630,7 +630,7 @@ static chd_error chdcd_parse_gdi(const char *tocfname, cdrom_toc &outtoc, chdcd_
outinfo.track[trknum].swap=false;
outinfo.track[trknum].offset=0;
- outtoc.tracks[trknum].datasize = 0;
+ outtoc.tracks[trknum].datasize = 0;
outtoc.tracks[trknum].subtype = CD_SUB_NONE;
outtoc.tracks[trknum].subsize = 0;
@@ -688,12 +688,12 @@ static chd_error chdcd_parse_gdi(const char *tocfname, cdrom_toc &outtoc, chdcd_
}
}
- #if 0
+ #if 0
for(i=0; i < numtracks; i++)
- {
- printf("%s %d %d %d (true %d)\n", outinfo.track[i].fname.cstr(), outtoc.tracks[i].frames, outtoc.tracks[i].padframes, outtoc.tracks[i].physframeofs, outtoc.tracks[i].frames - outtoc.tracks[i].padframes);
- }
- #endif
+ {
+ printf("%s %d %d %d (true %d)\n", outinfo.track[i].fname.cstr(), outtoc.tracks[i].frames, outtoc.tracks[i].padframes, outtoc.tracks[i].physframeofs, outtoc.tracks[i].frames - outtoc.tracks[i].padframes);
+ }
+ #endif
/* close the input TOC */
fclose(infile);
@@ -822,7 +822,7 @@ chd_error chdcd_parse_cue(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i
cdrom_convert_subtype_string_to_track_info(token, &outtoc.tracks[trknum]);
}
- else if (!strcmp(token, "INDEX")) /* only in bin/cue files */
+ else if (!strcmp(token, "INDEX")) /* only in bin/cue files */
{
int idx, frames;
@@ -905,7 +905,7 @@ chd_error chdcd_parse_cue(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i
outinfo.track[trknum].offset = outinfo.track[trknum-1].offset + outtoc.tracks[trknum-1].frames * (outtoc.tracks[trknum-1].datasize + outtoc.tracks[trknum-1].subsize);
outtoc.tracks[trknum].frames = (tlen - outinfo.track[trknum].offset) / (outtoc.tracks[trknum].datasize + outtoc.tracks[trknum].subsize);
}
- else /* data files are different */
+ else /* data files are different */
{
tlen = get_file_size(outinfo.track[trknum].fname);
if (tlen == 0)
@@ -925,7 +925,7 @@ chd_error chdcd_parse_cue(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i
{
outtoc.tracks[trknum].frames = outinfo.track[trknum+1].idx1offs - outinfo.track[trknum].idx1offs;
- if (trknum == 0) // track 0 offset is 0
+ if (trknum == 0) // track 0 offset is 0
{
outinfo.track[trknum].offset = 0;
}
@@ -940,7 +940,7 @@ chd_error chdcd_parse_cue(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i
return CHDERR_INVALID_DATA;
}
}
- else /* data files are different */
+ else /* data files are different */
{
tlen = get_file_size(outinfo.track[trknum].fname);
if (tlen == 0)
@@ -969,13 +969,13 @@ chd_error chdcd_parse_toc(const char *tocfname, cdrom_toc &outtoc, chdcd_track_i
FILE *infile;
int i, trknum;
static char token[512];
- char tocftemp[512];
+ char tocftemp[512];
- strcpy(tocftemp, tocfname);
- for (i = 0; i < strlen(tocfname); i++)
- {
- tocftemp[i] = tolower(tocftemp[i]);
- }
+ strcpy(tocftemp, tocfname);
+ for (i = 0; i < strlen(tocfname); i++)
+ {
+ tocftemp[i] = tolower(tocftemp[i]);
+ }
if (strstr(tocftemp,".gdi"))
{
diff --git a/src/lib/util/chdcd.h b/src/lib/util/chdcd.h
index df799371603..d32fc6c0c73 100644
--- a/src/lib/util/chdcd.h
+++ b/src/lib/util/chdcd.h
@@ -19,9 +19,9 @@ struct chdcd_track_input_entry
chdcd_track_input_entry() { reset(); }
void reset() { fname.reset(); offset = idx0offs = idx1offs = 0; swap = false; }
- astring fname; // filename for each track
- UINT32 offset; // offset in the data file for each track
- bool swap; // data needs to be byte swapped
+ astring fname; // filename for each track
+ UINT32 offset; // offset in the data file for each track
+ bool swap; // data needs to be byte swapped
UINT32 idx0offs;
UINT32 idx1offs;
};
@@ -36,4 +36,4 @@ struct chdcd_track_input_info
chd_error chdcd_parse_toc(const char *tocfname, cdrom_toc &outtoc, chdcd_track_input_info &outinfo);
-#endif /* __CHDCD_H__ */
+#endif /* __CHDCD_H__ */
diff --git a/src/lib/util/chdcodec.c b/src/lib/util/chdcodec.c
index 1246791f89d..f3a3e13c0b3 100644
--- a/src/lib/util/chdcodec.c
+++ b/src/lib/util/chdcodec.c
@@ -79,7 +79,7 @@ private:
static void fast_free(voidpf opaque, voidpf address);
static const int MAX_ZLIB_ALLOCS = 64;
- UINT32 * m_allocptr[MAX_ZLIB_ALLOCS];
+ UINT32 * m_allocptr[MAX_ZLIB_ALLOCS];
};
@@ -98,8 +98,8 @@ public:
private:
// internal state
- z_stream m_deflater;
- chd_zlib_allocator m_allocator;
+ z_stream m_deflater;
+ chd_zlib_allocator m_allocator;
};
@@ -118,8 +118,8 @@ public:
private:
// internal state
- z_stream m_inflater;
- chd_zlib_allocator m_allocator;
+ z_stream m_inflater;
+ chd_zlib_allocator m_allocator;
};
@@ -139,7 +139,7 @@ private:
static void fast_free(void *p, void *address);
static const int MAX_LZMA_ALLOCS = 64;
- UINT32 * m_allocptr[MAX_LZMA_ALLOCS];
+ UINT32 * m_allocptr[MAX_LZMA_ALLOCS];
};
@@ -161,8 +161,8 @@ public:
private:
// internal state
- CLzmaEncProps m_props;
- chd_lzma_allocator m_allocator;
+ CLzmaEncProps m_props;
+ chd_lzma_allocator m_allocator;
};
@@ -181,8 +181,8 @@ public:
private:
// internal state
- CLzmaDec m_decoder;
- chd_lzma_allocator m_allocator;
+ CLzmaDec m_decoder;
+ chd_lzma_allocator m_allocator;
};
@@ -200,7 +200,7 @@ public:
private:
// internal state
- huffman_8bit_encoder m_encoder;
+ huffman_8bit_encoder m_encoder;
};
@@ -218,7 +218,7 @@ public:
private:
// internal state
- huffman_8bit_decoder m_decoder;
+ huffman_8bit_decoder m_decoder;
};
@@ -239,8 +239,8 @@ public:
private:
// internal state
- bool m_big_endian;
- flac_encoder m_encoder;
+ bool m_big_endian;
+ flac_encoder m_encoder;
};
@@ -258,8 +258,8 @@ public:
private:
// internal state
- bool m_big_endian;
- flac_decoder m_decoder;
+ bool m_big_endian;
+ flac_decoder m_decoder;
};
@@ -281,11 +281,11 @@ public:
private:
// internal state
- bool m_swap_endian;
- flac_encoder m_encoder;
- z_stream m_deflater;
- chd_zlib_allocator m_allocator;
- dynamic_buffer m_buffer;
+ bool m_swap_endian;
+ flac_encoder m_encoder;
+ z_stream m_deflater;
+ chd_zlib_allocator m_allocator;
+ dynamic_buffer m_buffer;
};
@@ -304,11 +304,11 @@ public:
private:
// internal state
- bool m_swap_endian;
- flac_decoder m_decoder;
- z_stream m_inflater;
- chd_zlib_allocator m_allocator;
- dynamic_buffer m_buffer;
+ bool m_swap_endian;
+ flac_decoder m_decoder;
+ z_stream m_inflater;
+ chd_zlib_allocator m_allocator;
+ dynamic_buffer m_buffer;
};
@@ -321,9 +321,9 @@ public:
// construction/destruction
chd_cd_compressor(chd_file &chd, UINT32 hunkbytes, bool lossy)
: chd_compressor(chd, hunkbytes, lossy),
- m_base_compressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SECTOR_DATA, lossy),
- m_subcode_compressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SUBCODE_DATA, lossy),
- m_buffer(hunkbytes + (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SUBCODE_DATA)
+ m_base_compressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SECTOR_DATA, lossy),
+ m_subcode_compressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SUBCODE_DATA, lossy),
+ m_buffer(hunkbytes + (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SUBCODE_DATA)
{
// make sure the CHD's hunk size is an even multiple of the frame size
if (hunkbytes % CD_FRAME_SIZE != 0)
@@ -375,9 +375,9 @@ public:
private:
// internal state
- _BaseCompressor m_base_compressor;
- _SubcodeCompressor m_subcode_compressor;
- dynamic_buffer m_buffer;
+ _BaseCompressor m_base_compressor;
+ _SubcodeCompressor m_subcode_compressor;
+ dynamic_buffer m_buffer;
};
@@ -390,9 +390,9 @@ public:
// construction/destruction
chd_cd_decompressor(chd_file &chd, UINT32 hunkbytes, bool lossy)
: chd_decompressor(chd, hunkbytes, lossy),
- m_base_decompressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SECTOR_DATA, lossy),
- m_subcode_decompressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SUBCODE_DATA, lossy),
- m_buffer(hunkbytes)
+ m_base_decompressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SECTOR_DATA, lossy),
+ m_subcode_decompressor(chd, (hunkbytes / CD_FRAME_SIZE) * CD_MAX_SUBCODE_DATA, lossy),
+ m_buffer(hunkbytes)
{
// make sure the CHD's hunk size is an even multiple of the frame size
if (hunkbytes % CD_FRAME_SIZE != 0)
@@ -435,9 +435,9 @@ public:
private:
// internal state
- _BaseDecompressor m_base_decompressor;
+ _BaseDecompressor m_base_decompressor;
_SubcodeDecompressor m_subcode_decompressor;
- dynamic_buffer m_buffer;
+ dynamic_buffer m_buffer;
};
@@ -458,8 +458,8 @@ private:
void postinit();
// internal state
- avhuff_encoder m_encoder;
- bool m_postinit;
+ avhuff_encoder m_encoder;
+ bool m_postinit;
};
@@ -478,7 +478,7 @@ public:
private:
// internal state
- avhuff_decoder m_decoder;
+ avhuff_decoder m_decoder;
};
@@ -491,18 +491,18 @@ private:
const chd_codec_list::codec_entry chd_codec_list::s_codec_list[] =
{
// general codecs
- { CHD_CODEC_ZLIB, false, "Deflate", &chd_codec_list::construct_compressor<chd_zlib_compressor>, &chd_codec_list::construct_decompressor<chd_zlib_decompressor> },
- { CHD_CODEC_LZMA, false, "LZMA", &chd_codec_list::construct_compressor<chd_lzma_compressor>, &chd_codec_list::construct_decompressor<chd_lzma_decompressor> },
- { CHD_CODEC_HUFFMAN, false, "Huffman", &chd_codec_list::construct_compressor<chd_huffman_compressor>, &chd_codec_list::construct_decompressor<chd_huffman_decompressor> },
- { CHD_CODEC_FLAC, false, "FLAC", &chd_codec_list::construct_compressor<chd_flac_compressor>, &chd_codec_list::construct_decompressor<chd_flac_decompressor> },
+ { CHD_CODEC_ZLIB, false, "Deflate", &chd_codec_list::construct_compressor<chd_zlib_compressor>, &chd_codec_list::construct_decompressor<chd_zlib_decompressor> },
+ { CHD_CODEC_LZMA, false, "LZMA", &chd_codec_list::construct_compressor<chd_lzma_compressor>, &chd_codec_list::construct_decompressor<chd_lzma_decompressor> },
+ { CHD_CODEC_HUFFMAN, false, "Huffman", &chd_codec_list::construct_compressor<chd_huffman_compressor>, &chd_codec_list::construct_decompressor<chd_huffman_decompressor> },
+ { CHD_CODEC_FLAC, false, "FLAC", &chd_codec_list::construct_compressor<chd_flac_compressor>, &chd_codec_list::construct_decompressor<chd_flac_decompressor> },
// general codecs with CD frontend
- { CHD_CODEC_CD_ZLIB, false, "CD Deflate", &chd_codec_list::construct_compressor<chd_cd_compressor<chd_zlib_compressor, chd_zlib_compressor> >, &chd_codec_list::construct_decompressor<chd_cd_decompressor<chd_zlib_decompressor, chd_zlib_decompressor> > },
- { CHD_CODEC_CD_LZMA, false, "CD LZMA", &chd_codec_list::construct_compressor<chd_cd_compressor<chd_lzma_compressor, chd_zlib_compressor> >, &chd_codec_list::construct_decompressor<chd_cd_decompressor<chd_lzma_decompressor, chd_zlib_decompressor> > },
- { CHD_CODEC_CD_FLAC, false, "CD FLAC", &chd_codec_list::construct_compressor<chd_cd_flac_compressor>, &chd_codec_list::construct_decompressor<chd_cd_flac_decompressor> },
+ { CHD_CODEC_CD_ZLIB, false, "CD Deflate", &chd_codec_list::construct_compressor<chd_cd_compressor<chd_zlib_compressor, chd_zlib_compressor> >, &chd_codec_list::construct_decompressor<chd_cd_decompressor<chd_zlib_decompressor, chd_zlib_decompressor> > },
+ { CHD_CODEC_CD_LZMA, false, "CD LZMA", &chd_codec_list::construct_compressor<chd_cd_compressor<chd_lzma_compressor, chd_zlib_compressor> >, &chd_codec_list::construct_decompressor<chd_cd_decompressor<chd_lzma_decompressor, chd_zlib_decompressor> > },
+ { CHD_CODEC_CD_FLAC, false, "CD FLAC", &chd_codec_list::construct_compressor<chd_cd_flac_compressor>, &chd_codec_list::construct_decompressor<chd_cd_flac_decompressor> },
// A/V codecs
- { CHD_CODEC_AVHUFF, false, "A/V Huffman", &chd_codec_list::construct_compressor<chd_avhuff_compressor>, &chd_codec_list::construct_decompressor<chd_avhuff_decompressor> },
+ { CHD_CODEC_AVHUFF, false, "A/V Huffman", &chd_codec_list::construct_compressor<chd_avhuff_compressor>, &chd_codec_list::construct_decompressor<chd_avhuff_decompressor> },
};
@@ -517,8 +517,8 @@ const chd_codec_list::codec_entry chd_codec_list::s_codec_list[] =
chd_codec::chd_codec(chd_file &chd, UINT32 hunkbytes, bool lossy)
: m_chd(chd),
- m_hunkbytes(hunkbytes),
- m_lossy(lossy)
+ m_hunkbytes(hunkbytes),
+ m_lossy(lossy)
{
}
@@ -643,9 +643,9 @@ const chd_codec_list::codec_entry *chd_codec_list::find_in_list(chd_codec_type t
chd_compressor_group::chd_compressor_group(chd_file &chd, UINT32 compressor_list[4])
: m_hunkbytes(chd.hunk_bytes()),
- m_compress_test(m_hunkbytes)
+ m_compress_test(m_hunkbytes)
#if CHDCODEC_VERIFY_COMPRESSION
- ,m_decompressed(m_hunkbytes)
+ ,m_decompressed(m_hunkbytes)
#endif
{
// verify the compression types and initialize the codecs
@@ -853,7 +853,7 @@ chd_zlib_compressor::chd_zlib_compressor(chd_file &chd, UINT32 hunkbytes, bool l
: chd_compressor(chd, hunkbytes, lossy)
{
// initialize the deflater
- m_deflater.next_in = (Bytef *)this; // bogus, but that's ok
+ m_deflater.next_in = (Bytef *)this; // bogus, but that's ok
m_deflater.avail_in = 0;
m_allocator.install(m_deflater);
int zerr = deflateInit2(&m_deflater, Z_BEST_COMPRESSION, Z_DEFLATED, -MAX_WBITS, 8, Z_DEFAULT_STRATEGY);
@@ -918,7 +918,7 @@ chd_zlib_decompressor::chd_zlib_decompressor(chd_file &chd, UINT32 hunkbytes, bo
: chd_decompressor(chd, hunkbytes, lossy)
{
// init the inflater
- m_inflater.next_in = (Bytef *)this; // bogus, but that's ok
+ m_inflater.next_in = (Bytef *)this; // bogus, but that's ok
m_inflater.avail_in = 0;
m_allocator.install(m_inflater);
int zerr = inflateInit2(&m_inflater, -MAX_WBITS);
@@ -1394,7 +1394,7 @@ void chd_flac_decompressor::decompress(const UINT8 *src, UINT32 complen, UINT8 *
chd_cd_flac_compressor::chd_cd_flac_compressor(chd_file &chd, UINT32 hunkbytes, bool lossy)
: chd_compressor(chd, hunkbytes, lossy),
- m_buffer(hunkbytes)
+ m_buffer(hunkbytes)
{
// make sure the CHD's hunk size is an even multiple of the frame size
if (hunkbytes % CD_FRAME_SIZE != 0)
@@ -1412,7 +1412,7 @@ chd_cd_flac_compressor::chd_cd_flac_compressor(chd_file &chd, UINT32 hunkbytes,
m_encoder.set_strip_metadata(true);
// initialize the deflater
- m_deflater.next_in = (Bytef *)this; // bogus, but that's ok
+ m_deflater.next_in = (Bytef *)this; // bogus, but that's ok
m_deflater.avail_in = 0;
m_allocator.install(m_deflater);
int zerr = deflateInit2(&m_deflater, Z_BEST_COMPRESSION, Z_DEFLATED, -MAX_WBITS, 8, Z_DEFAULT_STRATEGY);
@@ -1506,7 +1506,7 @@ UINT32 chd_cd_flac_compressor::blocksize(UINT32 bytes)
chd_cd_flac_decompressor::chd_cd_flac_decompressor(chd_file &chd, UINT32 hunkbytes, bool lossy)
: chd_decompressor(chd, hunkbytes, lossy),
- m_buffer(hunkbytes)
+ m_buffer(hunkbytes)
{
// make sure the CHD's hunk size is an even multiple of the frame size
if (hunkbytes % CD_FRAME_SIZE != 0)
@@ -1518,7 +1518,7 @@ chd_cd_flac_decompressor::chd_cd_flac_decompressor(chd_file &chd, UINT32 hunkbyt
m_swap_endian = (native_endian == 1);
// init the inflater
- m_inflater.next_in = (Bytef *)this; // bogus, but that's ok
+ m_inflater.next_in = (Bytef *)this; // bogus, but that's ok
m_inflater.avail_in = 0;
m_allocator.install(m_inflater);
int zerr = inflateInit2(&m_inflater, -MAX_WBITS);
@@ -1595,7 +1595,7 @@ void chd_cd_flac_decompressor::decompress(const UINT8 *src, UINT32 complen, UINT
chd_avhuff_compressor::chd_avhuff_compressor(chd_file &chd, UINT32 hunkbytes, bool lossy)
: chd_compressor(chd, hunkbytes, lossy),
- m_postinit(false)
+ m_postinit(false)
{
try
{
diff --git a/src/lib/util/chdcodec.h b/src/lib/util/chdcodec.h
index a8d6f5382e8..21def8a3337 100644
--- a/src/lib/util/chdcodec.h
+++ b/src/lib/util/chdcodec.h
@@ -52,7 +52,7 @@
// MACROS
//**************************************************************************
-#define CHD_MAKE_TAG(a,b,c,d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
+#define CHD_MAKE_TAG(a,b,c,d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
@@ -90,9 +90,9 @@ public:
private:
// internal state
- chd_file & m_chd;
- UINT32 m_hunkbytes;
- bool m_lossy;
+ chd_file & m_chd;
+ UINT32 m_hunkbytes;
+ bool m_lossy;
};
@@ -144,11 +144,11 @@ private:
// an entry in the list
struct codec_entry
{
- chd_codec_type m_type;
- bool m_lossy;
- const char * m_name;
- chd_compressor * (*m_construct_compressor)(chd_file &, UINT32, bool);
- chd_decompressor * (*m_construct_decompressor)(chd_file &, UINT32, bool);
+ chd_codec_type m_type;
+ bool m_lossy;
+ const char * m_name;
+ chd_compressor * (*m_construct_compressor)(chd_file &, UINT32, bool);
+ chd_decompressor * (*m_construct_decompressor)(chd_file &, UINT32, bool);
};
// internal helper functions
@@ -180,12 +180,12 @@ public:
private:
// internal state
- UINT32 m_hunkbytes; // number of bytes in a hunk
- chd_compressor * m_compressor[4]; // array of active codecs
- dynamic_buffer m_compress_test; // test buffer for compression
+ UINT32 m_hunkbytes; // number of bytes in a hunk
+ chd_compressor * m_compressor[4]; // array of active codecs
+ dynamic_buffer m_compress_test; // test buffer for compression
#if CHDCODEC_VERIFY_COMPRESSION
- chd_decompressor * m_decompressor[4]; // array of active codecs
- dynamic_buffer m_decompressed; // verification buffer
+ chd_decompressor * m_decompressor[4]; // array of active codecs
+ dynamic_buffer m_decompressed; // verification buffer
#endif
};
@@ -196,21 +196,21 @@ private:
//**************************************************************************
// currently-defined codecs
-const chd_codec_type CHD_CODEC_NONE = 0;
+const chd_codec_type CHD_CODEC_NONE = 0;
// general codecs
-const chd_codec_type CHD_CODEC_ZLIB = CHD_MAKE_TAG('z','l','i','b');
-const chd_codec_type CHD_CODEC_LZMA = CHD_MAKE_TAG('l','z','m','a');
-const chd_codec_type CHD_CODEC_HUFFMAN = CHD_MAKE_TAG('h','u','f','f');
-const chd_codec_type CHD_CODEC_FLAC = CHD_MAKE_TAG('f','l','a','c');
+const chd_codec_type CHD_CODEC_ZLIB = CHD_MAKE_TAG('z','l','i','b');
+const chd_codec_type CHD_CODEC_LZMA = CHD_MAKE_TAG('l','z','m','a');
+const chd_codec_type CHD_CODEC_HUFFMAN = CHD_MAKE_TAG('h','u','f','f');
+const chd_codec_type CHD_CODEC_FLAC = CHD_MAKE_TAG('f','l','a','c');
// general codecs with CD frontend
-const chd_codec_type CHD_CODEC_CD_ZLIB = CHD_MAKE_TAG('c','d','z','l');
-const chd_codec_type CHD_CODEC_CD_LZMA = CHD_MAKE_TAG('c','d','l','z');
-const chd_codec_type CHD_CODEC_CD_FLAC = CHD_MAKE_TAG('c','d','f','l');
+const chd_codec_type CHD_CODEC_CD_ZLIB = CHD_MAKE_TAG('c','d','z','l');
+const chd_codec_type CHD_CODEC_CD_LZMA = CHD_MAKE_TAG('c','d','l','z');
+const chd_codec_type CHD_CODEC_CD_FLAC = CHD_MAKE_TAG('c','d','f','l');
// A/V codecs
-const chd_codec_type CHD_CODEC_AVHUFF = CHD_MAKE_TAG('a','v','h','u');
+const chd_codec_type CHD_CODEC_AVHUFF = CHD_MAKE_TAG('a','v','h','u');
// A/V codec configuration parameters
enum
diff --git a/src/lib/util/corefile.c b/src/lib/util/corefile.c
index cf154c3c529..f09716dc26d 100644
--- a/src/lib/util/corefile.c
+++ b/src/lib/util/corefile.c
@@ -60,9 +60,9 @@
CONSTANTS
***************************************************************************/
-#define FILE_BUFFER_SIZE 512
+#define FILE_BUFFER_SIZE 512
-#define OPEN_FLAG_HAS_CRC 0x10000
+#define OPEN_FLAG_HAS_CRC 0x10000
@@ -72,40 +72,40 @@
enum text_file_type
{
- TFT_OSD = 0, /* OSD depdendent encoding format used when BOMs missing */
- TFT_UTF8, /* UTF-8 */
- TFT_UTF16BE, /* UTF-16 (big endian) */
- TFT_UTF16LE, /* UTF-16 (little endian) */
- TFT_UTF32BE, /* UTF-32 (UCS-4) (big endian) */
- TFT_UTF32LE /* UTF-32 (UCS-4) (little endian) */
+ TFT_OSD = 0, /* OSD depdendent encoding format used when BOMs missing */
+ TFT_UTF8, /* UTF-8 */
+ TFT_UTF16BE, /* UTF-16 (big endian) */
+ TFT_UTF16LE, /* UTF-16 (little endian) */
+ TFT_UTF32BE, /* UTF-32 (UCS-4) (big endian) */
+ TFT_UTF32LE /* UTF-32 (UCS-4) (little endian) */
};
struct zlib_data
{
- z_stream stream;
- UINT8 buffer[1024];
- UINT64 realoffset;
- UINT64 nextoffset;
+ z_stream stream;
+ UINT8 buffer[1024];
+ UINT64 realoffset;
+ UINT64 nextoffset;
};
struct core_file
{
- osd_file * file; /* OSD file handle */
- zlib_data * zdata; /* compression data */
- UINT32 openflags; /* flags we were opened with */
- UINT8 data_allocated; /* was the data allocated by us? */
- UINT8 * data; /* file data, if RAM-based */
- UINT64 offset; /* current file offset */
- UINT64 length; /* total file length */
- text_file_type text_type; /* text output format */
- char back_chars[UTF8_CHAR_MAX]; /* buffer to hold characters for ungetc */
- int back_char_head; /* head of ungetc buffer */
- int back_char_tail; /* tail of ungetc buffer */
- UINT64 bufferbase; /* base offset of internal buffer */
- UINT32 bufferbytes; /* bytes currently loaded into buffer */
- UINT8 buffer[FILE_BUFFER_SIZE]; /* buffer data */
+ osd_file * file; /* OSD file handle */
+ zlib_data * zdata; /* compression data */
+ UINT32 openflags; /* flags we were opened with */
+ UINT8 data_allocated; /* was the data allocated by us? */
+ UINT8 * data; /* file data, if RAM-based */
+ UINT64 offset; /* current file offset */
+ UINT64 length; /* total file length */
+ text_file_type text_type; /* text output format */
+ char back_chars[UTF8_CHAR_MAX]; /* buffer to hold characters for ungetc */
+ int back_char_head; /* head of ungetc buffer */
+ int back_char_tail; /* tail of ungetc buffer */
+ UINT64 bufferbase; /* base offset of internal buffer */
+ UINT32 bufferbytes; /* bytes currently loaded into buffer */
+ UINT8 buffer[FILE_BUFFER_SIZE]; /* buffer data */
};
@@ -847,11 +847,11 @@ int core_fputs(core_file *f, const char *s)
{
if (*s == '\n')
{
- if (CRLF == 1) /* CR only */
+ if (CRLF == 1) /* CR only */
*pconvbuf++ = 13;
- else if (CRLF == 2) /* LF only */
+ else if (CRLF == 2) /* LF only */
*pconvbuf++ = 10;
- else if (CRLF == 3) /* CR+LF */
+ else if (CRLF == 3) /* CR+LF */
{
*pconvbuf++ = 13;
*pconvbuf++ = 10;
@@ -1079,5 +1079,3 @@ static file_error osd_or_zlib_write(core_file *file, const void *buffer, UINT64
file->zdata->nextoffset += *actual;
return FILERR_NONE;
}
-
-
diff --git a/src/lib/util/corefile.h b/src/lib/util/corefile.h
index 79ec9518cac..c2790930675 100644
--- a/src/lib/util/corefile.h
+++ b/src/lib/util/corefile.h
@@ -53,12 +53,12 @@
ADDITIONAL OPEN FLAGS
***************************************************************************/
-#define OPEN_FLAG_NO_BOM 0x0100 /* don't output BOM */
+#define OPEN_FLAG_NO_BOM 0x0100 /* don't output BOM */
-#define FCOMPRESS_NONE 0 /* no compression */
-#define FCOMPRESS_MIN 1 /* minimal compression */
-#define FCOMPRESS_MEDIUM 6 /* standard compression */
-#define FCOMPRESS_MAX 9 /* maximum compression */
+#define FCOMPRESS_NONE 0 /* no compression */
+#define FCOMPRESS_MIN 1 /* minimal compression */
+#define FCOMPRESS_MEDIUM 6 /* standard compression */
+#define FCOMPRESS_MAX 9 /* maximum compression */
@@ -157,4 +157,4 @@ astring &core_filename_extract_base(astring &result, const char *name, bool stri
int core_filename_ends_with(const char *filename, const char *extension);
-#endif /* __COREFILE_H__ */
+#endif /* __COREFILE_H__ */
diff --git a/src/lib/util/coretmpl.h b/src/lib/util/coretmpl.h
index 30d181edae6..d922506439f 100644
--- a/src/lib/util/coretmpl.h
+++ b/src/lib/util/coretmpl.h
@@ -61,8 +61,8 @@ public:
// construction/destruction
dynamic_array(int initial = 0)
: m_array(NULL),
- m_count(0),
- m_allocated(0) { if (initial != 0) expand_internal(initial); m_count = initial; }
+ m_count(0),
+ m_allocated(0) { if (initial != 0) expand_internal(initial); m_count = initial; }
virtual ~dynamic_array() { reset(); }
// operators
@@ -94,9 +94,9 @@ private:
}
// internal state
- _ElementType * m_array; // allocated array
- int m_count; // number of objects accessed in the list
- int m_allocated; // amount of space allocated for the array
+ _ElementType * m_array; // allocated array
+ int m_count; // number of objects accessed in the list
+ int m_allocated; // amount of space allocated for the array
};
diff --git a/src/lib/util/flac.c b/src/lib/util/flac.c
index 817e39047d9..ee38d451f5c 100644
--- a/src/lib/util/flac.c
+++ b/src/lib/util/flac.c
@@ -305,12 +305,12 @@ FLAC__StreamEncoderWriteStatus flac_encoder::write_callback(const FLAC__byte buf
flac_decoder::flac_decoder()
: m_decoder(FLAC__stream_decoder_new()),
- m_file(NULL),
- m_compressed_offset(0),
- m_compressed_start(NULL),
- m_compressed_length(0),
- m_compressed2_start(NULL),
- m_compressed2_length(0)
+ m_file(NULL),
+ m_compressed_offset(0),
+ m_compressed_start(NULL),
+ m_compressed_length(0),
+ m_compressed2_start(NULL),
+ m_compressed2_length(0)
{
}
@@ -321,12 +321,12 @@ flac_decoder::flac_decoder()
flac_decoder::flac_decoder(const void *buffer, UINT32 length, const void *buffer2, UINT32 length2)
: m_decoder(FLAC__stream_decoder_new()),
- m_file(NULL),
- m_compressed_offset(0),
- m_compressed_start(reinterpret_cast<const FLAC__byte *>(buffer)),
- m_compressed_length(length),
- m_compressed2_start(reinterpret_cast<const FLAC__byte *>(buffer2)),
- m_compressed2_length(length2)
+ m_file(NULL),
+ m_compressed_offset(0),
+ m_compressed_start(reinterpret_cast<const FLAC__byte *>(buffer)),
+ m_compressed_length(length),
+ m_compressed2_start(reinterpret_cast<const FLAC__byte *>(buffer2)),
+ m_compressed2_length(length2)
{
reset();
}
@@ -338,12 +338,12 @@ flac_decoder::flac_decoder(const void *buffer, UINT32 length, const void *buffer
flac_decoder::flac_decoder(core_file &file)
: m_decoder(FLAC__stream_decoder_new()),
- m_file(&file),
- m_compressed_offset(0),
- m_compressed_start(NULL),
- m_compressed_length(0),
- m_compressed2_start(NULL),
- m_compressed2_length(0)
+ m_file(&file),
+ m_compressed_offset(0),
+ m_compressed_start(NULL),
+ m_compressed_length(0),
+ m_compressed2_start(NULL),
+ m_compressed2_length(0)
{
reset();
}
@@ -406,19 +406,19 @@ bool flac_decoder::reset(UINT32 sample_rate, UINT8 num_channels, UINT32 block_si
// modify the template header with our parameters
static const UINT8 s_header_template[0x2a] =
{
- 0x66, 0x4C, 0x61, 0x43, // +00: 'fLaC' stream header
- 0x80, // +04: metadata block type 0 (STREAMINFO),
+ 0x66, 0x4C, 0x61, 0x43, // +00: 'fLaC' stream header
+ 0x80, // +04: metadata block type 0 (STREAMINFO),
// flagged as last block
- 0x00, 0x00, 0x22, // +05: metadata block length = 0x22
- 0x00, 0x00, // +08: minimum block size
- 0x00, 0x00, // +0A: maximum block size
- 0x00, 0x00, 0x00, // +0C: minimum frame size (0 == unknown)
- 0x00, 0x00, 0x00, // +0F: maximum frame size (0 == unknown)
+ 0x00, 0x00, 0x22, // +05: metadata block length = 0x22
+ 0x00, 0x00, // +08: minimum block size
+ 0x00, 0x00, // +0A: maximum block size
+ 0x00, 0x00, 0x00, // +0C: minimum frame size (0 == unknown)
+ 0x00, 0x00, 0x00, // +0F: maximum frame size (0 == unknown)
0x0A, 0xC4, 0x42, 0xF0, 0x00, 0x00, 0x00, 0x00, // +12: sample rate (0x0ac44 == 44100),
// numchannels (2), sample bits (16),
// samples in stream (0 == unknown)
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // +1A: MD5 signature (0 == none)
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 //
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 //
// +2A: start of stream data
};
memcpy(m_custom_header, s_header_template, sizeof(s_header_template));
diff --git a/src/lib/util/flac.h b/src/lib/util/flac.h
index f379d52521f..888f4226636 100644
--- a/src/lib/util/flac.h
+++ b/src/lib/util/flac.h
@@ -96,21 +96,21 @@ private:
FLAC__StreamEncoderWriteStatus write_callback(const FLAC__byte buffer[], size_t bytes, unsigned samples, unsigned current_frame);
// internal state
- FLAC__StreamEncoder * m_encoder; // actual encoder
- core_file * m_file; // output file
- UINT32 m_compressed_offset; // current offset with the compressed stream
- FLAC__byte * m_compressed_start; // start of compressed data
- UINT32 m_compressed_length; // length of the compressed stream
+ FLAC__StreamEncoder * m_encoder; // actual encoder
+ core_file * m_file; // output file
+ UINT32 m_compressed_offset; // current offset with the compressed stream
+ FLAC__byte * m_compressed_start; // start of compressed data
+ UINT32 m_compressed_length; // length of the compressed stream
// parameters
- UINT32 m_sample_rate; // sample rate
- UINT8 m_channels; // number of channels
- UINT32 m_block_size; // block size
+ UINT32 m_sample_rate; // sample rate
+ UINT8 m_channels; // number of channels
+ UINT32 m_block_size; // block size
// header stripping
- bool m_strip_metadata; // strip the the metadata?
- UINT32 m_ignore_bytes; // how many bytes to ignore when writing
- bool m_found_audio; // have we hit the audio yet?
+ bool m_strip_metadata; // strip the the metadata?
+ UINT32 m_ignore_bytes; // how many bytes to ignore when writing
+ bool m_found_audio; // have we hit the audio yet?
};
@@ -157,21 +157,21 @@ private:
static void error_callback_static(const FLAC__StreamDecoder *decoder, FLAC__StreamDecoderErrorStatus status, void *client_data);
// output state
- FLAC__StreamDecoder * m_decoder; // actual encoder
- core_file * m_file; // output file
- UINT32 m_sample_rate; // decoded sample rate
- UINT8 m_channels; // decoded number of channels
- UINT8 m_bits_per_sample; // decoded bits per sample
- UINT32 m_compressed_offset; // current offset in compressed data
- const FLAC__byte * m_compressed_start; // start of compressed data
- UINT32 m_compressed_length; // length of compressed data
- const FLAC__byte * m_compressed2_start; // start of compressed data
- UINT32 m_compressed2_length; // length of compressed data
- INT16 * m_uncompressed_start[8];// pointer to start of uncompressed data (up to 8 streams)
- UINT32 m_uncompressed_offset; // current position in uncompressed data
- UINT32 m_uncompressed_length; // length of uncompressed data
- bool m_uncompressed_swap; // swap uncompressed sample data
- UINT8 m_custom_header[0x2a]; // custom header
+ FLAC__StreamDecoder * m_decoder; // actual encoder
+ core_file * m_file; // output file
+ UINT32 m_sample_rate; // decoded sample rate
+ UINT8 m_channels; // decoded number of channels
+ UINT8 m_bits_per_sample; // decoded bits per sample
+ UINT32 m_compressed_offset; // current offset in compressed data
+ const FLAC__byte * m_compressed_start; // start of compressed data
+ UINT32 m_compressed_length; // length of compressed data
+ const FLAC__byte * m_compressed2_start; // start of compressed data
+ UINT32 m_compressed2_length; // length of compressed data
+ INT16 * m_uncompressed_start[8];// pointer to start of uncompressed data (up to 8 streams)
+ UINT32 m_uncompressed_offset; // current position in uncompressed data
+ UINT32 m_uncompressed_length; // length of uncompressed data
+ bool m_uncompressed_swap; // swap uncompressed sample data
+ UINT8 m_custom_header[0x2a]; // custom header
};
diff --git a/src/lib/util/harddisk.c b/src/lib/util/harddisk.c
index 64af494405a..49c829f4214 100644
--- a/src/lib/util/harddisk.c
+++ b/src/lib/util/harddisk.c
@@ -48,8 +48,8 @@
struct hard_disk_file
{
- chd_file * chd; /* CHD file */
- hard_disk_info info; /* hard disk info */
+ chd_file * chd; /* CHD file */
+ hard_disk_info info; /* hard disk info */
};
diff --git a/src/lib/util/harddisk.h b/src/lib/util/harddisk.h
index 09351be9072..820a7a27e9e 100644
--- a/src/lib/util/harddisk.h
+++ b/src/lib/util/harddisk.h
@@ -54,10 +54,10 @@ struct hard_disk_file;
struct hard_disk_info
{
- UINT32 cylinders;
- UINT32 heads;
- UINT32 sectors;
- UINT32 sectorbytes;
+ UINT32 cylinders;
+ UINT32 heads;
+ UINT32 sectors;
+ UINT32 sectorbytes;
};
@@ -75,4 +75,4 @@ hard_disk_info *hard_disk_get_info(hard_disk_file *file);
UINT32 hard_disk_read(hard_disk_file *file, UINT32 lbasector, void *buffer);
UINT32 hard_disk_write(hard_disk_file *file, UINT32 lbasector, const void *buffer);
-#endif /* __HARDDISK_H__ */
+#endif /* __HARDDISK_H__ */
diff --git a/src/lib/util/hashing.c b/src/lib/util/hashing.c
index 618750b1946..6519dd40049 100644
--- a/src/lib/util/hashing.c
+++ b/src/lib/util/hashing.c
@@ -262,39 +262,39 @@ void crc16_creator::append(const void *data, UINT32 length)
{
static const UINT16 s_table[256] =
{
- 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
- 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
- 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
- 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
- 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
- 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
- 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
- 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
- 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
- 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
- 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
- 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
- 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
- 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
- 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
- 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
- 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
- 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
- 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
- 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
- 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
- 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
- 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
- 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
- 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
- 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
- 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
- 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
- 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
- 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
- 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
- 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
- };
+ 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+ 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+ 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+ 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+ 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+ 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+ 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+ 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+ 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+ 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+ 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+ 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+ 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+ 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+ 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+ 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+ 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+ 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+ 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+ 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+ 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+ 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+ 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+ 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+ 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+ 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+ 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+ 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+ 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+ 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+ 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+ 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+ };
const UINT8 *src = reinterpret_cast<const UINT8 *>(data);
diff --git a/src/lib/util/hashing.h b/src/lib/util/hashing.h
index cebaba95b18..6ab0b652af9 100644
--- a/src/lib/util/hashing.h
+++ b/src/lib/util/hashing.h
@@ -99,7 +99,7 @@ public:
protected:
// internal state
- struct sha1_ctx m_context; // internal context
+ struct sha1_ctx m_context; // internal context
};
@@ -149,7 +149,7 @@ public:
protected:
// internal state
- struct MD5Context m_context; // internal context
+ struct MD5Context m_context; // internal context
};
@@ -195,7 +195,7 @@ public:
protected:
// internal state
- crc32_t m_accum; // internal accumulator
+ crc32_t m_accum; // internal accumulator
};
@@ -241,7 +241,7 @@ public:
protected:
// internal state
- crc16_t m_accum; // internal accumulator
+ crc16_t m_accum; // internal accumulator
};
diff --git a/src/lib/util/huffman.c b/src/lib/util/huffman.c
index 60120bbdf32..d4bc29deec5 100644
--- a/src/lib/util/huffman.c
+++ b/src/lib/util/huffman.c
@@ -136,7 +136,7 @@
// MACROS
//**************************************************************************
-#define MAKE_LOOKUP(code,bits) (((code) << 5) | ((bits) & 0x1f))
+#define MAKE_LOOKUP(code,bits) (((code) << 5) | ((bits) & 0x1f))
@@ -151,12 +151,12 @@
huffman_context_base::huffman_context_base(int numcodes, int maxbits, lookup_value *lookup, UINT32 *histo, node_t *nodes)
: m_numcodes(numcodes),
- m_maxbits(maxbits),
- m_prevdata(0),
- m_rleremaining(0),
- m_lookup(lookup),
- m_datahisto(histo),
- m_huffnode(nodes)
+ m_maxbits(maxbits),
+ m_prevdata(0),
+ m_rleremaining(0),
+ m_lookup(lookup),
+ m_datahisto(histo),
+ m_huffnode(nodes)
{
// limit to 24 bits
if (maxbits > 24)
@@ -536,9 +536,9 @@ int CLIB_DECL huffman_context_base::tree_node_compare(const void *item1, const v
const node_t *node1 = *(const node_t **)item1;
const node_t *node2 = *(const node_t **)item2;
if (node2->m_weight != node1->m_weight)
- return node2->m_weight - node1->m_weight;
+ return node2->m_weight - node1->m_weight;
if (node2->m_bits - node1->m_bits == 0)
- fprintf(stderr, "identical node sort keys, should not happen!\n");
+ fprintf(stderr, "identical node sort keys, should not happen!\n");
return (int)node1->m_bits - (int)node2->m_bits;
}
diff --git a/src/lib/util/huffman.h b/src/lib/util/huffman.h
index 47525d82ed6..b0f24e62b58 100644
--- a/src/lib/util/huffman.h
+++ b/src/lib/util/huffman.h
@@ -78,11 +78,11 @@ protected:
// a node in the huffman tree
struct node_t
{
- node_t * m_parent; // pointer to parent node
- UINT32 m_count; // number of hits on this node
- UINT32 m_weight; // assigned weight of this node
- UINT32 m_bits; // bits used to encode the node
- UINT8 m_numbits; // number of bits needed for this node
+ node_t * m_parent; // pointer to parent node
+ UINT32 m_count; // number of hits on this node
+ UINT32 m_weight; // assigned weight of this node
+ UINT32 m_bits; // bits used to encode the node
+ UINT8 m_numbits; // number of bits needed for this node
};
// construction/destruction
@@ -108,13 +108,13 @@ protected:
protected:
// internal state
- UINT32 m_numcodes; // number of total codes being processed
- UINT8 m_maxbits; // maximum bits per code
- UINT8 m_prevdata; // value of the previous data (for delta-RLE encoding)
- int m_rleremaining; // number of RLE bytes remaining (for delta-RLE encoding)
- lookup_value * m_lookup; // pointer to the lookup table
- UINT32 * m_datahisto; // histogram of data values
- node_t * m_huffnode; // array of nodes
+ UINT32 m_numcodes; // number of total codes being processed
+ UINT8 m_maxbits; // maximum bits per code
+ UINT8 m_prevdata; // value of the previous data (for delta-RLE encoding)
+ int m_rleremaining; // number of RLE bytes remaining (for delta-RLE encoding)
+ lookup_value * m_lookup; // pointer to the lookup table
+ UINT32 * m_datahisto; // histogram of data values
+ node_t * m_huffnode; // array of nodes
};
@@ -141,8 +141,8 @@ public:
private:
// array versions of the info we need
- UINT32 m_datahisto_array[_NumCodes];
- node_t m_huffnode_array[_NumCodes * 2];
+ UINT32 m_datahisto_array[_NumCodes];
+ node_t m_huffnode_array[_NumCodes * 2];
};
@@ -166,8 +166,8 @@ public:
private:
// array versions of the info we need
- node_t m_huffnode_array[_NumCodes];
- lookup_value m_lookup_array[1 << _MaxBits];
+ node_t m_huffnode_array[_NumCodes];
+ lookup_value m_lookup_array[1 << _MaxBits];
};
diff --git a/src/lib/util/jedparse.c b/src/lib/util/jedparse.c
index e2eb36f7ea5..8e60d4d8ffd 100644
--- a/src/lib/util/jedparse.c
+++ b/src/lib/util/jedparse.c
@@ -57,7 +57,7 @@
DEBUGGING
***************************************************************************/
-#define LOG_PARSE 0
+#define LOG_PARSE 0
@@ -67,8 +67,8 @@
struct parse_info
{
- UINT16 checksum; /* checksum value */
- UINT32 explicit_numfuses; /* explicitly specified number of fuses */
+ UINT16 checksum; /* checksum value */
+ UINT32 explicit_numfuses; /* explicitly specified number of fuses */
};
@@ -459,4 +459,3 @@ size_t jedbin_output(const jed_data *data, void *result, size_t length)
/* return the final size */
return 4 + (data->numfuses + 7) / 8;
}
-
diff --git a/src/lib/util/jedparse.h b/src/lib/util/jedparse.h
index 05c9b61d510..4df071b058c 100644
--- a/src/lib/util/jedparse.h
+++ b/src/lib/util/jedparse.h
@@ -48,13 +48,13 @@
CONSTANTS
***************************************************************************/
-#define JED_MAX_FUSES (65536)
+#define JED_MAX_FUSES (65536)
/* error codes */
-#define JEDERR_NONE 0
-#define JEDERR_INVALID_DATA 1
-#define JEDERR_BAD_XMIT_SUM 2
-#define JEDERR_BAD_FUSE_SUM 3
+#define JEDERR_NONE 0
+#define JEDERR_INVALID_DATA 1
+#define JEDERR_BAD_XMIT_SUM 2
+#define JEDERR_BAD_FUSE_SUM 3
@@ -64,8 +64,8 @@
struct jed_data
{
- UINT32 numfuses; /* number of defined fuses */
- UINT8 fusemap[JED_MAX_FUSES / 8];/* array of bit-packed data */
+ UINT32 numfuses; /* number of defined fuses */
+ UINT8 fusemap[JED_MAX_FUSES / 8];/* array of bit-packed data */
};
@@ -113,4 +113,4 @@ INLINE void jed_set_fuse(jed_data *data, UINT32 fusenum, UINT8 value)
}
}
-#endif /* __JEDPARSE_H__ */
+#endif /* __JEDPARSE_H__ */
diff --git a/src/lib/util/md5.c b/src/lib/util/md5.c
index ba1406f6358..55ca7c70c1f 100644
--- a/src/lib/util/md5.c
+++ b/src/lib/util/md5.c
@@ -20,7 +20,7 @@
* Still in the public domain.
*/
-#include <string.h> /* for memcpy() */
+#include <string.h> /* for memcpy() */
#include "md5.h"
@@ -69,9 +69,9 @@ MD5Update(struct MD5Context *ctx, md5byte const *buf, unsigned len)
t = ctx->bytes[0];
if ((ctx->bytes[0] = t + len) < t)
- ctx->bytes[1]++; /* Carry from low to high */
+ ctx->bytes[1]++; /* Carry from low to high */
- t = 64 - (t & 0x3f); /* Space available in ctx->in (at least 1) */
+ t = 64 - (t & 0x3f); /* Space available in ctx->in (at least 1) */
if (t > len) {
memcpy((md5byte *)ctx->in + 64 - t, buf, len);
return;
@@ -103,7 +103,7 @@ MD5Update(struct MD5Context *ctx, md5byte const *buf, unsigned len)
void
MD5Final(md5byte digest[16], struct MD5Context *ctx)
{
- int count = ctx->bytes[0] & 0x3f; /* Number of bytes in ctx->in */
+ int count = ctx->bytes[0] & 0x3f; /* Number of bytes in ctx->in */
md5byte *p = (md5byte *)ctx->in + count;
/* Set the first char of padding to 0x80. There is always room. */
@@ -112,7 +112,7 @@ MD5Final(md5byte digest[16], struct MD5Context *ctx)
/* Bytes of padding needed to make 56 bytes (-8..55) */
count = 56 - 1 - count;
- if (count < 0) { /* Padding forces an extra block */
+ if (count < 0) { /* Padding forces an extra block */
memset(p, 0, count + 8);
byteSwap(ctx->in, 16);
MD5Transform(ctx->buf, ctx->in);
@@ -129,7 +129,7 @@ MD5Final(md5byte digest[16], struct MD5Context *ctx)
byteSwap(ctx->buf, 4);
memcpy(digest, ctx->buf, 16);
- memset(ctx, 0, sizeof(MD5Context)); /* In case it's sensitive */
+ memset(ctx, 0, sizeof(MD5Context)); /* In case it's sensitive */
}
#ifndef ASM_MD5
@@ -144,7 +144,7 @@ MD5Final(md5byte digest[16], struct MD5Context *ctx)
/* This is the central step in the MD5 algorithm. */
#define MD5STEP(f,w,x,y,z,in,s) \
- (w += f(x,y,z) + in, w = (w<<s | w>>(32-s)) + x)
+ (w += f(x,y,z) + in, w = (w<<s | w>>(32-s)) + x)
/*
* The core of the MD5 algorithm, this alters an existing MD5 hash to
@@ -236,4 +236,3 @@ MD5Transform(UWORD32 buf[4], UWORD32 const in[16])
}
#endif
-
diff --git a/src/lib/util/md5.h b/src/lib/util/md5.h
index 4a41494e718..5270f1b4f95 100644
--- a/src/lib/util/md5.h
+++ b/src/lib/util/md5.h
@@ -39,4 +39,3 @@ void MD5Final(unsigned char digest[16], struct MD5Context *context);
void MD5Transform(UWORD32 buf[4], UWORD32 const in[16]);
#endif /* !MD5_H */
-
diff --git a/src/lib/util/opresolv.c b/src/lib/util/opresolv.c
index d39bcc10c4e..4d093a955da 100644
--- a/src/lib/util/opresolv.c
+++ b/src/lib/util/opresolv.c
@@ -43,10 +43,10 @@ struct option_resolution
static optreserr_t resolve_single_param(const char *specification, int *param_value,
struct OptionRange *range, size_t range_count)
{
- int FLAG_IN_RANGE = 0x01;
- int FLAG_IN_DEFAULT = 0x02;
- int FLAG_DEFAULT_SPECIFIED = 0x04;
- int FLAG_HALF_RANGE = 0x08;
+ int FLAG_IN_RANGE = 0x01;
+ int FLAG_IN_DEFAULT = 0x02;
+ int FLAG_DEFAULT_SPECIFIED = 0x04;
+ int FLAG_HALF_RANGE = 0x08;
int last_value = 0;
int value = 0;
@@ -547,19 +547,18 @@ const char *option_resolution_error_string(optreserr_t err)
{
static const char *const errors[] =
{
- "The operation completed successfully", /* OPTIONRESOLUTION_ERROR_SUCCESS */
- "Out of memory", /* OPTIONRESOLUTION_ERROR_OUTOFMEMORY */
- "Parameter out of range", /* OPTIONRESOLUTION_ERROR_PARAMOUTOFRANGE */
- "Parameter not specified", /* OPTIONRESOLUTION_ERROR_PARAMNOTSPECIFIED */
- "Unknown parameter", /* OPTIONRESOLUTION_ERROR_PARAMNOTFOUND */
- "Parameter specified multiple times", /* OPTIONRESOLUTION_ERROR_PARAMALREADYSPECIFIED */
- "Invalid parameter", /* OPTIONRESOLUTION_ERROR_BADPARAM */
- "Syntax error", /* OPTIONRESOLUTION_ERROR_SYNTAX */
- "Internal error" /* OPTIONRESOLTUION_ERROR_INTERNAL */
+ "The operation completed successfully", /* OPTIONRESOLUTION_ERROR_SUCCESS */
+ "Out of memory", /* OPTIONRESOLUTION_ERROR_OUTOFMEMORY */
+ "Parameter out of range", /* OPTIONRESOLUTION_ERROR_PARAMOUTOFRANGE */
+ "Parameter not specified", /* OPTIONRESOLUTION_ERROR_PARAMNOTSPECIFIED */
+ "Unknown parameter", /* OPTIONRESOLUTION_ERROR_PARAMNOTFOUND */
+ "Parameter specified multiple times", /* OPTIONRESOLUTION_ERROR_PARAMALREADYSPECIFIED */
+ "Invalid parameter", /* OPTIONRESOLUTION_ERROR_BADPARAM */
+ "Syntax error", /* OPTIONRESOLUTION_ERROR_SYNTAX */
+ "Internal error" /* OPTIONRESOLTUION_ERROR_INTERNAL */
};
if ((err < 0) || (err >= ARRAY_LENGTH(errors)))
return NULL;
return errors[err];
}
-
diff --git a/src/lib/util/opresolv.h b/src/lib/util/opresolv.h
index 87066bb89af..3bd65801f24 100644
--- a/src/lib/util/opresolv.h
+++ b/src/lib/util/opresolv.h
@@ -65,28 +65,28 @@ struct option_guide
const char *display_name;
};
-#define OPTION_GUIDE_START(option_guide_) \
- const option_guide option_guide_[] = \
- { \
+#define OPTION_GUIDE_START(option_guide_) \
+ const option_guide option_guide_[] = \
+ { \
-#define OPTION_GUIDE_END \
- { OPTIONTYPE_END } \
- }; \
+#define OPTION_GUIDE_END \
+ { OPTIONTYPE_END } \
+ }; \
-#define OPTION_GUIDE_EXTERN(option_guide_) \
- extern const option_guide option_guide_[] \
+#define OPTION_GUIDE_EXTERN(option_guide_) \
+ extern const option_guide option_guide_[] \
-#define OPTION_INT(option_char, identifier, display_name) \
- { OPTIONTYPE_INT, (option_char), (identifier), (display_name) }, \
+#define OPTION_INT(option_char, identifier, display_name) \
+ { OPTIONTYPE_INT, (option_char), (identifier), (display_name) }, \
-#define OPTION_STRING(option_char, identifier, display_name) \
- { OPTIONTYPE_STRING, (option_char), (identifier), (display_name) }, \
+#define OPTION_STRING(option_char, identifier, display_name) \
+ { OPTIONTYPE_STRING, (option_char), (identifier), (display_name) }, \
-#define OPTION_ENUM_START(option_char, identifier, display_name) \
- { OPTIONTYPE_ENUM_BEGIN, (option_char), (identifier), (display_name) }, \
+#define OPTION_ENUM_START(option_char, identifier, display_name) \
+ { OPTIONTYPE_ENUM_BEGIN, (option_char), (identifier), (display_name) }, \
-#define OPTION_ENUM(value, identifier, display_name) \
- { OPTIONTYPE_ENUM_VALUE, (value), (identifier), (display_name) }, \
+#define OPTION_ENUM(value, identifier, display_name) \
+ { OPTIONTYPE_ENUM_VALUE, (value), (identifier), (display_name) }, \
#define OPTION_ENUM_END
@@ -156,4 +156,3 @@ int option_resolution_contains(const char *specification, int option_char);
const char *option_resolution_error_string(optreserr_t err);
#endif /* __OPRESOLV_H__ */
-
diff --git a/src/lib/util/options.c b/src/lib/util/options.c
index bd50ff45fdc..1182550fb36 100644
--- a/src/lib/util/options.c
+++ b/src/lib/util/options.c
@@ -81,11 +81,11 @@ const char *const core_options::s_option_unadorned[MAX_UNADORNED_OPTIONS] =
core_options::entry::entry(const options_entry &entrylist)
: m_next(NULL),
- m_flags(entrylist.flags),
- m_seqid(0),
- m_error_reported(false),
- m_priority(OPTION_PRIORITY_DEFAULT),
- m_description(entrylist.description)
+ m_flags(entrylist.flags),
+ m_seqid(0),
+ m_error_reported(false),
+ m_priority(OPTION_PRIORITY_DEFAULT),
+ m_description(entrylist.description)
{
// copy in the name(s) as appropriate
if (entrylist.name != NULL)
@@ -180,20 +180,20 @@ void core_options::entry::revert(int priority)
core_options::core_options()
: m_entrylist(NULL),
- m_entrylist_tailptr(&m_entrylist)
+ m_entrylist_tailptr(&m_entrylist)
{
}
core_options::core_options(const options_entry *entrylist)
: m_entrylist(NULL),
- m_entrylist_tailptr(&m_entrylist)
+ m_entrylist_tailptr(&m_entrylist)
{
add_entries(entrylist);
}
core_options::core_options(const options_entry *entrylist1, const options_entry *entrylist2)
: m_entrylist(NULL),
- m_entrylist_tailptr(&m_entrylist)
+ m_entrylist_tailptr(&m_entrylist)
{
add_entries(entrylist1);
add_entries(entrylist2);
@@ -201,7 +201,7 @@ core_options::core_options(const options_entry *entrylist1, const options_entry
core_options::core_options(const options_entry *entrylist1, const options_entry *entrylist2, const options_entry *entrylist3)
: m_entrylist(NULL),
- m_entrylist_tailptr(&m_entrylist)
+ m_entrylist_tailptr(&m_entrylist)
{
add_entries(entrylist1);
add_entries(entrylist2);
@@ -210,7 +210,7 @@ core_options::core_options(const options_entry *entrylist1, const options_entry
core_options::core_options(const core_options &src)
: m_entrylist(NULL),
- m_entrylist_tailptr(&m_entrylist)
+ m_entrylist_tailptr(&m_entrylist)
{
copyfrom(src);
}
diff --git a/src/lib/util/options.h b/src/lib/util/options.h
index 6a107cbfad4..8d8ea78a303 100644
--- a/src/lib/util/options.h
+++ b/src/lib/util/options.h
@@ -51,24 +51,24 @@
//**************************************************************************
// option types
-const UINT32 OPTION_TYPE_MASK = 0x0007; // up to 8 different types
+const UINT32 OPTION_TYPE_MASK = 0x0007; // up to 8 different types
enum
{
- OPTION_INVALID, // invalid
- OPTION_HEADER, // a header item
- OPTION_COMMAND, // a command
- OPTION_BOOLEAN, // boolean option
- OPTION_INTEGER, // integer option
- OPTION_FLOAT, // floating-point option
- OPTION_STRING // string option
+ OPTION_INVALID, // invalid
+ OPTION_HEADER, // a header item
+ OPTION_COMMAND, // a command
+ OPTION_BOOLEAN, // boolean option
+ OPTION_INTEGER, // integer option
+ OPTION_FLOAT, // floating-point option
+ OPTION_STRING // string option
};
// option priorities
-const int OPTION_PRIORITY_DEFAULT = 0; // defaults are at 0 priority
-const int OPTION_PRIORITY_LOW = 50; // low priority
-const int OPTION_PRIORITY_NORMAL = 100; // normal priority
-const int OPTION_PRIORITY_HIGH = 150; // high priority
-const int OPTION_PRIORITY_MAXIMUM = 255; // maximum priority
+const int OPTION_PRIORITY_DEFAULT = 0; // defaults are at 0 priority
+const int OPTION_PRIORITY_LOW = 50; // low priority
+const int OPTION_PRIORITY_NORMAL = 100; // normal priority
+const int OPTION_PRIORITY_HIGH = 150; // high priority
+const int OPTION_PRIORITY_MAXIMUM = 255; // maximum priority
@@ -79,10 +79,10 @@ const int OPTION_PRIORITY_MAXIMUM = 255; // maximum priority
// static structure describing a single option with its description and default value
struct options_entry
{
- const char * name; // name on the command line
- const char * defvalue; // default value of this argument
- UINT32 flags; // flags to describe the option
- const char * description; // description for -showusage
+ const char * name; // name on the command line
+ const char * defvalue; // default value of this argument
+ UINT32 flags; // flags to describe the option
+ const char * description; // description for -showusage
};
@@ -124,17 +124,17 @@ public:
private:
// internal state
- entry * m_next; // link to the next data
- UINT32 m_flags; // flags from the entry
- UINT32 m_seqid; // sequence ID; bumped on each change
- bool m_error_reported; // have we reported an error on this option yet?
- int m_priority; // priority of the data set
- const char * m_description; // description for this item
- astring m_name[4]; // up to 4 names for the item
- astring m_data; // data for this item
- astring m_defdata; // default data for this item
- astring m_minimum; // minimum value
- astring m_maximum; // maximum value
+ entry * m_next; // link to the next data
+ UINT32 m_flags; // flags from the entry
+ UINT32 m_seqid; // sequence ID; bumped on each change
+ bool m_error_reported; // have we reported an error on this option yet?
+ int m_priority; // priority of the data set
+ const char * m_description; // description for this item
+ astring m_name[4]; // up to 4 names for the item
+ astring m_data; // data for this item
+ astring m_defdata; // default data for this item
+ astring m_minimum; // minimum value
+ astring m_maximum; // maximum value
};
// construction/destruction
@@ -196,11 +196,11 @@ private:
bool validate_and_set_data(entry &curentry, const char *newdata, int priority, astring &error_string);
// internal state
- entry * m_entrylist; // head of list of entries
- entry ** m_entrylist_tailptr; // pointer to tail of entry list
- tagmap_t<entry *> m_entrymap; // map for fast lookup
- astring m_command; // command found
- static const char *const s_option_unadorned[]; // array of unadorned option "names"
+ entry * m_entrylist; // head of list of entries
+ entry ** m_entrylist_tailptr; // pointer to tail of entry list
+ tagmap_t<entry *> m_entrymap; // map for fast lookup
+ astring m_command; // command found
+ static const char *const s_option_unadorned[]; // array of unadorned option "names"
};
diff --git a/src/lib/util/palette.c b/src/lib/util/palette.c
index b44f0e8cdb1..86f783e23cb 100644
--- a/src/lib/util/palette.c
+++ b/src/lib/util/palette.c
@@ -50,43 +50,43 @@
/* object to track dirty states */
struct dirty_state
{
- UINT32 * dirty; /* bitmap of dirty entries */
- UINT32 mindirty; /* minimum dirty entry */
- UINT32 maxdirty; /* minimum dirty entry */
+ UINT32 * dirty; /* bitmap of dirty entries */
+ UINT32 mindirty; /* minimum dirty entry */
+ UINT32 maxdirty; /* minimum dirty entry */
};
/* a single palette client */
struct palette_client
{
- palette_client *next; /* pointer to next client */
- palette_t * palette; /* reference to the palette */
- dirty_state live; /* live dirty state */
- dirty_state previous; /* previous dirty state */
+ palette_client *next; /* pointer to next client */
+ palette_t * palette; /* reference to the palette */
+ dirty_state live; /* live dirty state */
+ dirty_state previous; /* previous dirty state */
};
/* a palette object */
struct palette_t
{
- UINT32 refcount; /* reference count on the palette */
- UINT32 numcolors; /* number of colors in the palette */
- UINT32 numgroups; /* number of groups in the palette */
+ UINT32 refcount; /* reference count on the palette */
+ UINT32 numcolors; /* number of colors in the palette */
+ UINT32 numgroups; /* number of groups in the palette */
- float brightness; /* overall brightness value */
- float contrast; /* overall contrast value */
- float gamma; /* overall gamma value */
- UINT8 gamma_map[256]; /* gamma map */
+ float brightness; /* overall brightness value */
+ float contrast; /* overall contrast value */
+ float gamma; /* overall gamma value */
+ UINT8 gamma_map[256]; /* gamma map */
- rgb_t * entry_color; /* array of raw colors */
- float * entry_contrast; /* contrast value for each entry */
- rgb_t * adjusted_color; /* array of adjusted colors */
- rgb_t * adjusted_rgb15; /* array of adjusted colors as RGB15 */
+ rgb_t * entry_color; /* array of raw colors */
+ float * entry_contrast; /* contrast value for each entry */
+ rgb_t * adjusted_color; /* array of adjusted colors */
+ rgb_t * adjusted_rgb15; /* array of adjusted colors as RGB15 */
- float * group_bright; /* brightness value for each group */
- float * group_contrast; /* contrast value for each group */
+ float * group_bright; /* brightness value for each group */
+ float * group_contrast; /* contrast value for each group */
- palette_client *client_list; /* list of clients for this palette */
+ palette_client *client_list; /* list of clients for this palette */
};
diff --git a/src/lib/util/palette.h b/src/lib/util/palette.h
index d54ee279fbf..7823d5a24c6 100644
--- a/src/lib/util/palette.h
+++ b/src/lib/util/palette.h
@@ -68,18 +68,18 @@ struct palette_client;
***************************************************************************/
/* macros to assemble rgb_t values */
-#define MAKE_ARGB(a,r,g,b) ((((rgb_t)(a) & 0xff) << 24) | (((rgb_t)(r) & 0xff) << 16) | (((rgb_t)(g) & 0xff) << 8) | ((rgb_t)(b) & 0xff))
-#define MAKE_RGB(r,g,b) (MAKE_ARGB(255,r,g,b))
+#define MAKE_ARGB(a,r,g,b) ((((rgb_t)(a) & 0xff) << 24) | (((rgb_t)(r) & 0xff) << 16) | (((rgb_t)(g) & 0xff) << 8) | ((rgb_t)(b) & 0xff))
+#define MAKE_RGB(r,g,b) (MAKE_ARGB(255,r,g,b))
/* macros to extract components from rgb_t values */
-#define RGB_ALPHA(rgb) (((rgb) >> 24) & 0xff)
-#define RGB_RED(rgb) (((rgb) >> 16) & 0xff)
-#define RGB_GREEN(rgb) (((rgb) >> 8) & 0xff)
-#define RGB_BLUE(rgb) ((rgb) & 0xff)
+#define RGB_ALPHA(rgb) (((rgb) >> 24) & 0xff)
+#define RGB_RED(rgb) (((rgb) >> 16) & 0xff)
+#define RGB_GREEN(rgb) (((rgb) >> 8) & 0xff)
+#define RGB_BLUE(rgb) ((rgb) & 0xff)
/* common colors */
-#define RGB_BLACK (MAKE_ARGB(255,0,0,0))
-#define RGB_WHITE (MAKE_ARGB(255,255,255,255))
+#define RGB_BLACK (MAKE_ARGB(255,0,0,0))
+#define RGB_WHITE (MAKE_ARGB(255,255,255,255))
@@ -369,4 +369,4 @@ inline rgb_t pal888(UINT32 data, UINT8 rshift, UINT8 gshift, UINT8 bshift)
}
-#endif /* __PALETTE_H__ */
+#endif /* __PALETTE_H__ */
diff --git a/src/lib/util/plaparse.c b/src/lib/util/plaparse.c
index c3a2261c564..e60c7344788 100644
--- a/src/lib/util/plaparse.c
+++ b/src/lib/util/plaparse.c
@@ -50,7 +50,7 @@
DEBUGGING
***************************************************************************/
-#define LOG_PARSE 0
+#define LOG_PARSE 0
@@ -60,9 +60,9 @@
struct parse_info
{
- UINT32 inputs;
- UINT32 outputs;
- UINT32 terms;
+ UINT32 inputs;
+ UINT32 outputs;
+ UINT32 terms;
};
diff --git a/src/lib/util/plaparse.h b/src/lib/util/plaparse.h
index 4d3f9c94a9f..7f313cd91b2 100644
--- a/src/lib/util/plaparse.h
+++ b/src/lib/util/plaparse.h
@@ -53,4 +53,4 @@ int pla_parse(const void *data, size_t length, jed_data *result);
-#endif /* __PLAPARSE_H__ */
+#endif /* __PLAPARSE_H__ */
diff --git a/src/lib/util/png.c b/src/lib/util/png.c
index 5bb930713a1..1ac14b96485 100644
--- a/src/lib/util/png.c
+++ b/src/lib/util/png.c
@@ -52,19 +52,19 @@
struct image_data_chunk
{
- image_data_chunk * next;
- int length;
- UINT8 * data;
+ image_data_chunk * next;
+ int length;
+ UINT8 * data;
};
struct png_private
{
- png_info * pnginfo;
- image_data_chunk * idata;
- image_data_chunk ** idata_next;
- UINT8 bpp;
- UINT32 rowbytes;
+ png_info * pnginfo;
+ image_data_chunk * idata;
+ image_data_chunk ** idata_next;
+ UINT8 bpp;
+ UINT32 rowbytes;
};
@@ -815,8 +815,8 @@ static png_error write_deflated_chunk(core_file *fp, UINT8 *data, UINT32 type, U
{
UINT64 lengthpos = core_ftell(fp);
UINT8 tempbuff[8192];
- UINT32 zlength = 0;
- z_stream stream;
+ UINT32 zlength = 0;
+ z_stream stream;
UINT32 crc;
int zerr;
@@ -833,9 +833,9 @@ static png_error write_deflated_chunk(core_file *fp, UINT8 *data, UINT32 type, U
memset(&stream, 0, sizeof(stream));
stream.next_in = data;
stream.avail_in = length;
- zerr = deflateInit(&stream, Z_DEFAULT_COMPRESSION);
- if (zerr != Z_OK)
- return PNGERR_COMPRESS_ERROR;
+ zerr = deflateInit(&stream, Z_DEFAULT_COMPRESSION);
+ if (zerr != Z_OK)
+ return PNGERR_COMPRESS_ERROR;
/* now loop until we run out of data */
for ( ; ; )
@@ -1138,7 +1138,7 @@ png_error mng_capture_start(core_file *fp, bitmap_t &bitmap, double rate)
put_32bit(mhdr + 8, rate);
put_32bit(mhdr + 24, 0x0041); /* Simplicity profile */
/* frame count and play time unspecified because
- we don't know at this stage */
+ we don't know at this stage */
error = write_chunk(fp, mhdr, MNG_CN_MHDR, 28);
if (error != PNGERR_NONE)
return error;
diff --git a/src/lib/util/png.h b/src/lib/util/png.h
index ce7b7f7e261..d196de37ebd 100644
--- a/src/lib/util/png.h
+++ b/src/lib/util/png.h
@@ -56,35 +56,35 @@
#define MNG_Signature "\x8A\x4D\x4E\x47\x0D\x0A\x1A\x0A"
/* Chunk names */
-#define PNG_CN_IHDR 0x49484452L
-#define PNG_CN_PLTE 0x504C5445L
-#define PNG_CN_IDAT 0x49444154L
-#define PNG_CN_IEND 0x49454E44L
-#define PNG_CN_gAMA 0x67414D41L
-#define PNG_CN_sBIT 0x73424954L
-#define PNG_CN_cHRM 0x6348524DL
-#define PNG_CN_tRNS 0x74524E53L
-#define PNG_CN_bKGD 0x624B4744L
-#define PNG_CN_hIST 0x68495354L
-#define PNG_CN_tEXt 0x74455874L
-#define PNG_CN_zTXt 0x7A545874L
-#define PNG_CN_pHYs 0x70485973L
-#define PNG_CN_oFFs 0x6F464673L
-#define PNG_CN_tIME 0x74494D45L
-#define PNG_CN_sCAL 0x7343414CL
+#define PNG_CN_IHDR 0x49484452L
+#define PNG_CN_PLTE 0x504C5445L
+#define PNG_CN_IDAT 0x49444154L
+#define PNG_CN_IEND 0x49454E44L
+#define PNG_CN_gAMA 0x67414D41L
+#define PNG_CN_sBIT 0x73424954L
+#define PNG_CN_cHRM 0x6348524DL
+#define PNG_CN_tRNS 0x74524E53L
+#define PNG_CN_bKGD 0x624B4744L
+#define PNG_CN_hIST 0x68495354L
+#define PNG_CN_tEXt 0x74455874L
+#define PNG_CN_zTXt 0x7A545874L
+#define PNG_CN_pHYs 0x70485973L
+#define PNG_CN_oFFs 0x6F464673L
+#define PNG_CN_tIME 0x74494D45L
+#define PNG_CN_sCAL 0x7343414CL
/* MNG Chunk names */
-#define MNG_CN_MHDR 0x4D484452L
-#define MNG_CN_MEND 0x4D454E44L
-#define MNG_CN_TERM 0x5445524DL
-#define MNG_CN_BACK 0x4241434BL
+#define MNG_CN_MHDR 0x4D484452L
+#define MNG_CN_MEND 0x4D454E44L
+#define MNG_CN_TERM 0x5445524DL
+#define MNG_CN_BACK 0x4241434BL
/* Prediction filters */
-#define PNG_PF_None 0
-#define PNG_PF_Sub 1
-#define PNG_PF_Up 2
-#define PNG_PF_Average 3
-#define PNG_PF_Paeth 4
+#define PNG_PF_None 0
+#define PNG_PF_Sub 1
+#define PNG_PF_Up 2
+#define PNG_PF_Average 3
+#define PNG_PF_Paeth 4
/* Error types */
enum png_error
@@ -110,34 +110,34 @@ enum png_error
struct png_text
{
- png_text * next;
- const char * keyword; /* this is allocated */
- const char * text; /* this points to a part of keyword */
+ png_text * next;
+ const char * keyword; /* this is allocated */
+ const char * text; /* this points to a part of keyword */
};
struct png_info
{
- UINT8 * image;
- UINT32 width, height;
- UINT32 xres, yres;
- rectangle screen;
- double xscale, yscale;
- double source_gamma;
- UINT32 resolution_unit;
- UINT8 bit_depth;
- UINT8 color_type;
- UINT8 compression_method;
- UINT8 filter_method;
- UINT8 interlace_method;
-
- UINT8 * palette;
- UINT32 num_palette;
-
- UINT8 * trans;
- UINT32 num_trans;
-
- png_text * textlist;
+ UINT8 * image;
+ UINT32 width, height;
+ UINT32 xres, yres;
+ rectangle screen;
+ double xscale, yscale;
+ double source_gamma;
+ UINT32 resolution_unit;
+ UINT8 bit_depth;
+ UINT8 color_type;
+ UINT8 compression_method;
+ UINT8 filter_method;
+ UINT8 interlace_method;
+
+ UINT8 * palette;
+ UINT32 num_palette;
+
+ UINT8 * trans;
+ UINT32 num_trans;
+
+ png_text * textlist;
};
@@ -159,4 +159,4 @@ png_error mng_capture_start(core_file *fp, bitmap_t &bitmap, double rate);
png_error mng_capture_frame(core_file *fp, png_info *info, bitmap_t &bitmap, int palette_length, const UINT32 *palette);
png_error mng_capture_stop(core_file *fp);
-#endif /* __PNG_H__ */
+#endif /* __PNG_H__ */
diff --git a/src/lib/util/pool.c b/src/lib/util/pool.c
index ab0c0ef3270..35c39ef0722 100644
--- a/src/lib/util/pool.c
+++ b/src/lib/util/pool.c
@@ -48,8 +48,8 @@
CONSTANTS
***************************************************************************/
-#define OBJECT_ENTRY_BLOCK 256
-#define POOL_HASH_SIZE 3797
+#define OBJECT_ENTRY_BLOCK 256
+#define POOL_HASH_SIZE 3797
@@ -60,24 +60,24 @@
/* an object type entry */
struct objtype_entry
{
- objtype_entry * next;
- UINT32 type;
- const char * friendly;
- void (*destructor)(void *, size_t);
+ objtype_entry * next;
+ UINT32 type;
+ const char * friendly;
+ void (*destructor)(void *, size_t);
};
/* an entry in a pool */
struct object_entry
{
- object_entry * next;
- object_entry * globalnext;
- object_entry * globalprev;
- objtype_entry * type;
- void * object;
- size_t size;
- const char * file;
- int line;
+ object_entry * next;
+ object_entry * globalnext;
+ object_entry * globalprev;
+ objtype_entry * type;
+ void * object;
+ size_t size;
+ const char * file;
+ int line;
};
@@ -85,28 +85,28 @@ struct object_entry
struct object_entry_block
{
object_entry_block *next;
- object_entry entry[OBJECT_ENTRY_BLOCK];
+ object_entry entry[OBJECT_ENTRY_BLOCK];
};
/* the object pool itself */
struct object_pool
{
- object_entry * hashtable[POOL_HASH_SIZE];
- object_entry * globallist;
- object_entry * freelist;
+ object_entry * hashtable[POOL_HASH_SIZE];
+ object_entry * globallist;
+ object_entry * freelist;
object_entry_block *blocklist;
- objtype_entry * typelist;
- void (*fail)(const char *message);
+ objtype_entry * typelist;
+ void (*fail)(const char *message);
};
/* an iterator over objects in a pool */
struct object_pool_iterator
{
- object_pool * pool;
- object_type type;
- object_entry * last;
+ object_pool * pool;
+ object_type type;
+ object_entry * last;
};
diff --git a/src/lib/util/pool.h b/src/lib/util/pool.h
index 77bf7456da4..d1948c9d317 100644
--- a/src/lib/util/pool.h
+++ b/src/lib/util/pool.h
@@ -48,16 +48,16 @@
***************************************************************************/
/* helper macros for memory pools that pass file/line number */
-#define pool_malloc_lib(pool, size) pool_malloc_file_line((pool), (size), __FILE__, __LINE__)
-#define pool_realloc_lib(pool, ptr, size) pool_realloc_file_line((pool), (ptr), (size), __FILE__, __LINE__)
-#define pool_strdup_lib(pool, size) pool_strdup_file_line((pool), (size), __FILE__, __LINE__)
+#define pool_malloc_lib(pool, size) pool_malloc_file_line((pool), (size), __FILE__, __LINE__)
+#define pool_realloc_lib(pool, ptr, size) pool_realloc_file_line((pool), (ptr), (size), __FILE__, __LINE__)
+#define pool_strdup_lib(pool, size) pool_strdup_file_line((pool), (size), __FILE__, __LINE__)
/* macro to define a 4-character type for a pool */
-#define OBJECT_TYPE(a,b,c,d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
+#define OBJECT_TYPE(a,b,c,d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))
/* built-in pool types */
-#define OBJTYPE_WILDCARD (0)
-#define OBJTYPE_MEMORY OBJECT_TYPE('m','e','m','o')
+#define OBJTYPE_WILDCARD (0)
+#define OBJTYPE_MEMORY OBJECT_TYPE('m','e','m','o')
diff --git a/src/lib/util/sha1.c b/src/lib/util/sha1.c
index edca0192103..0a3327d7fc0 100644
--- a/src/lib/util/sha1.c
+++ b/src/lib/util/sha1.c
@@ -97,8 +97,8 @@ static void WRITE_UINT32(unsigned char* data, UINT32 val)
for this information */
#define expand(W,i) ( W[ i & 15 ] = \
- ROTL( 1, ( W[ i & 15 ] ^ W[ (i - 14) & 15 ] ^ \
- W[ (i - 8) & 15 ] ^ W[ (i - 3) & 15 ] ) ) )
+ ROTL( 1, ( W[ i & 15 ] ^ W[ (i - 14) & 15 ] ^ \
+ W[ (i - 8) & 15 ] ^ W[ (i - 3) & 15 ] ) ) )
/* The prototype SHA sub-round. The fundamental sub-round is:
@@ -115,25 +115,25 @@ static void WRITE_UINT32(unsigned char* data, UINT32 val)
the next 20 values from the W[] array each time */
#define subRound(a, b, c, d, e, f, k, data) \
- ( e += ROTL( 5, a ) + f( b, c, d ) + k + data, b = ROTL( 30, b ) )
+ ( e += ROTL( 5, a ) + f( b, c, d ) + k + data, b = ROTL( 30, b ) )
/* Initialize the SHA values */
void
sha1_init(struct sha1_ctx *ctx)
{
- /* Set the h-vars to their initial values */
- ctx->digest[ 0 ] = h0init;
- ctx->digest[ 1 ] = h1init;
- ctx->digest[ 2 ] = h2init;
- ctx->digest[ 3 ] = h3init;
- ctx->digest[ 4 ] = h4init;
-
- /* Initialize bit count */
- ctx->count_low = ctx->count_high = 0;
-
- /* Initialize buffer */
- ctx->index = 0;
+ /* Set the h-vars to their initial values */
+ ctx->digest[ 0 ] = h0init;
+ ctx->digest[ 1 ] = h1init;
+ ctx->digest[ 2 ] = h2init;
+ ctx->digest[ 3 ] = h3init;
+ ctx->digest[ 4 ] = h4init;
+
+ /* Initialize bit count */
+ ctx->count_low = ctx->count_high = 0;
+
+ /* Initialize buffer */
+ ctx->index = 0;
}
/* Perform the SHA transformation. Note that this code, like MD5, seems to
@@ -146,156 +146,156 @@ sha1_init(struct sha1_ctx *ctx)
static void
sha1_transform(UINT32 *state, UINT32 *data)
{
- UINT32 A, B, C, D, E; /* Local vars */
-
- /* Set up first buffer and local data buffer */
- A = state[0];
- B = state[1];
- C = state[2];
- D = state[3];
- E = state[4];
-
- /* Heavy mangling, in 4 sub-rounds of 20 interations each. */
- subRound( A, B, C, D, E, f1, K1, data[ 0] );
- subRound( E, A, B, C, D, f1, K1, data[ 1] );
- subRound( D, E, A, B, C, f1, K1, data[ 2] );
- subRound( C, D, E, A, B, f1, K1, data[ 3] );
- subRound( B, C, D, E, A, f1, K1, data[ 4] );
- subRound( A, B, C, D, E, f1, K1, data[ 5] );
- subRound( E, A, B, C, D, f1, K1, data[ 6] );
- subRound( D, E, A, B, C, f1, K1, data[ 7] );
- subRound( C, D, E, A, B, f1, K1, data[ 8] );
- subRound( B, C, D, E, A, f1, K1, data[ 9] );
- subRound( A, B, C, D, E, f1, K1, data[10] );
- subRound( E, A, B, C, D, f1, K1, data[11] );
- subRound( D, E, A, B, C, f1, K1, data[12] );
- subRound( C, D, E, A, B, f1, K1, data[13] );
- subRound( B, C, D, E, A, f1, K1, data[14] );
- subRound( A, B, C, D, E, f1, K1, data[15] );
- subRound( E, A, B, C, D, f1, K1, expand( data, 16 ) );
- subRound( D, E, A, B, C, f1, K1, expand( data, 17 ) );
- subRound( C, D, E, A, B, f1, K1, expand( data, 18 ) );
- subRound( B, C, D, E, A, f1, K1, expand( data, 19 ) );
-
- subRound( A, B, C, D, E, f2, K2, expand( data, 20 ) );
- subRound( E, A, B, C, D, f2, K2, expand( data, 21 ) );
- subRound( D, E, A, B, C, f2, K2, expand( data, 22 ) );
- subRound( C, D, E, A, B, f2, K2, expand( data, 23 ) );
- subRound( B, C, D, E, A, f2, K2, expand( data, 24 ) );
- subRound( A, B, C, D, E, f2, K2, expand( data, 25 ) );
- subRound( E, A, B, C, D, f2, K2, expand( data, 26 ) );
- subRound( D, E, A, B, C, f2, K2, expand( data, 27 ) );
- subRound( C, D, E, A, B, f2, K2, expand( data, 28 ) );
- subRound( B, C, D, E, A, f2, K2, expand( data, 29 ) );
- subRound( A, B, C, D, E, f2, K2, expand( data, 30 ) );
- subRound( E, A, B, C, D, f2, K2, expand( data, 31 ) );
- subRound( D, E, A, B, C, f2, K2, expand( data, 32 ) );
- subRound( C, D, E, A, B, f2, K2, expand( data, 33 ) );
- subRound( B, C, D, E, A, f2, K2, expand( data, 34 ) );
- subRound( A, B, C, D, E, f2, K2, expand( data, 35 ) );
- subRound( E, A, B, C, D, f2, K2, expand( data, 36 ) );
- subRound( D, E, A, B, C, f2, K2, expand( data, 37 ) );
- subRound( C, D, E, A, B, f2, K2, expand( data, 38 ) );
- subRound( B, C, D, E, A, f2, K2, expand( data, 39 ) );
-
- subRound( A, B, C, D, E, f3, K3, expand( data, 40 ) );
- subRound( E, A, B, C, D, f3, K3, expand( data, 41 ) );
- subRound( D, E, A, B, C, f3, K3, expand( data, 42 ) );
- subRound( C, D, E, A, B, f3, K3, expand( data, 43 ) );
- subRound( B, C, D, E, A, f3, K3, expand( data, 44 ) );
- subRound( A, B, C, D, E, f3, K3, expand( data, 45 ) );
- subRound( E, A, B, C, D, f3, K3, expand( data, 46 ) );
- subRound( D, E, A, B, C, f3, K3, expand( data, 47 ) );
- subRound( C, D, E, A, B, f3, K3, expand( data, 48 ) );
- subRound( B, C, D, E, A, f3, K3, expand( data, 49 ) );
- subRound( A, B, C, D, E, f3, K3, expand( data, 50 ) );
- subRound( E, A, B, C, D, f3, K3, expand( data, 51 ) );
- subRound( D, E, A, B, C, f3, K3, expand( data, 52 ) );
- subRound( C, D, E, A, B, f3, K3, expand( data, 53 ) );
- subRound( B, C, D, E, A, f3, K3, expand( data, 54 ) );
- subRound( A, B, C, D, E, f3, K3, expand( data, 55 ) );
- subRound( E, A, B, C, D, f3, K3, expand( data, 56 ) );
- subRound( D, E, A, B, C, f3, K3, expand( data, 57 ) );
- subRound( C, D, E, A, B, f3, K3, expand( data, 58 ) );
- subRound( B, C, D, E, A, f3, K3, expand( data, 59 ) );
-
- subRound( A, B, C, D, E, f4, K4, expand( data, 60 ) );
- subRound( E, A, B, C, D, f4, K4, expand( data, 61 ) );
- subRound( D, E, A, B, C, f4, K4, expand( data, 62 ) );
- subRound( C, D, E, A, B, f4, K4, expand( data, 63 ) );
- subRound( B, C, D, E, A, f4, K4, expand( data, 64 ) );
- subRound( A, B, C, D, E, f4, K4, expand( data, 65 ) );
- subRound( E, A, B, C, D, f4, K4, expand( data, 66 ) );
- subRound( D, E, A, B, C, f4, K4, expand( data, 67 ) );
- subRound( C, D, E, A, B, f4, K4, expand( data, 68 ) );
- subRound( B, C, D, E, A, f4, K4, expand( data, 69 ) );
- subRound( A, B, C, D, E, f4, K4, expand( data, 70 ) );
- subRound( E, A, B, C, D, f4, K4, expand( data, 71 ) );
- subRound( D, E, A, B, C, f4, K4, expand( data, 72 ) );
- subRound( C, D, E, A, B, f4, K4, expand( data, 73 ) );
- subRound( B, C, D, E, A, f4, K4, expand( data, 74 ) );
- subRound( A, B, C, D, E, f4, K4, expand( data, 75 ) );
- subRound( E, A, B, C, D, f4, K4, expand( data, 76 ) );
- subRound( D, E, A, B, C, f4, K4, expand( data, 77 ) );
- subRound( C, D, E, A, B, f4, K4, expand( data, 78 ) );
- subRound( B, C, D, E, A, f4, K4, expand( data, 79 ) );
-
- /* Build message digest */
- state[0] += A;
- state[1] += B;
- state[2] += C;
- state[3] += D;
- state[4] += E;
+ UINT32 A, B, C, D, E; /* Local vars */
+
+ /* Set up first buffer and local data buffer */
+ A = state[0];
+ B = state[1];
+ C = state[2];
+ D = state[3];
+ E = state[4];
+
+ /* Heavy mangling, in 4 sub-rounds of 20 interations each. */
+ subRound( A, B, C, D, E, f1, K1, data[ 0] );
+ subRound( E, A, B, C, D, f1, K1, data[ 1] );
+ subRound( D, E, A, B, C, f1, K1, data[ 2] );
+ subRound( C, D, E, A, B, f1, K1, data[ 3] );
+ subRound( B, C, D, E, A, f1, K1, data[ 4] );
+ subRound( A, B, C, D, E, f1, K1, data[ 5] );
+ subRound( E, A, B, C, D, f1, K1, data[ 6] );
+ subRound( D, E, A, B, C, f1, K1, data[ 7] );
+ subRound( C, D, E, A, B, f1, K1, data[ 8] );
+ subRound( B, C, D, E, A, f1, K1, data[ 9] );
+ subRound( A, B, C, D, E, f1, K1, data[10] );
+ subRound( E, A, B, C, D, f1, K1, data[11] );
+ subRound( D, E, A, B, C, f1, K1, data[12] );
+ subRound( C, D, E, A, B, f1, K1, data[13] );
+ subRound( B, C, D, E, A, f1, K1, data[14] );
+ subRound( A, B, C, D, E, f1, K1, data[15] );
+ subRound( E, A, B, C, D, f1, K1, expand( data, 16 ) );
+ subRound( D, E, A, B, C, f1, K1, expand( data, 17 ) );
+ subRound( C, D, E, A, B, f1, K1, expand( data, 18 ) );
+ subRound( B, C, D, E, A, f1, K1, expand( data, 19 ) );
+
+ subRound( A, B, C, D, E, f2, K2, expand( data, 20 ) );
+ subRound( E, A, B, C, D, f2, K2, expand( data, 21 ) );
+ subRound( D, E, A, B, C, f2, K2, expand( data, 22 ) );
+ subRound( C, D, E, A, B, f2, K2, expand( data, 23 ) );
+ subRound( B, C, D, E, A, f2, K2, expand( data, 24 ) );
+ subRound( A, B, C, D, E, f2, K2, expand( data, 25 ) );
+ subRound( E, A, B, C, D, f2, K2, expand( data, 26 ) );
+ subRound( D, E, A, B, C, f2, K2, expand( data, 27 ) );
+ subRound( C, D, E, A, B, f2, K2, expand( data, 28 ) );
+ subRound( B, C, D, E, A, f2, K2, expand( data, 29 ) );
+ subRound( A, B, C, D, E, f2, K2, expand( data, 30 ) );
+ subRound( E, A, B, C, D, f2, K2, expand( data, 31 ) );
+ subRound( D, E, A, B, C, f2, K2, expand( data, 32 ) );
+ subRound( C, D, E, A, B, f2, K2, expand( data, 33 ) );
+ subRound( B, C, D, E, A, f2, K2, expand( data, 34 ) );
+ subRound( A, B, C, D, E, f2, K2, expand( data, 35 ) );
+ subRound( E, A, B, C, D, f2, K2, expand( data, 36 ) );
+ subRound( D, E, A, B, C, f2, K2, expand( data, 37 ) );
+ subRound( C, D, E, A, B, f2, K2, expand( data, 38 ) );
+ subRound( B, C, D, E, A, f2, K2, expand( data, 39 ) );
+
+ subRound( A, B, C, D, E, f3, K3, expand( data, 40 ) );
+ subRound( E, A, B, C, D, f3, K3, expand( data, 41 ) );
+ subRound( D, E, A, B, C, f3, K3, expand( data, 42 ) );
+ subRound( C, D, E, A, B, f3, K3, expand( data, 43 ) );
+ subRound( B, C, D, E, A, f3, K3, expand( data, 44 ) );
+ subRound( A, B, C, D, E, f3, K3, expand( data, 45 ) );
+ subRound( E, A, B, C, D, f3, K3, expand( data, 46 ) );
+ subRound( D, E, A, B, C, f3, K3, expand( data, 47 ) );
+ subRound( C, D, E, A, B, f3, K3, expand( data, 48 ) );
+ subRound( B, C, D, E, A, f3, K3, expand( data, 49 ) );
+ subRound( A, B, C, D, E, f3, K3, expand( data, 50 ) );
+ subRound( E, A, B, C, D, f3, K3, expand( data, 51 ) );
+ subRound( D, E, A, B, C, f3, K3, expand( data, 52 ) );
+ subRound( C, D, E, A, B, f3, K3, expand( data, 53 ) );
+ subRound( B, C, D, E, A, f3, K3, expand( data, 54 ) );
+ subRound( A, B, C, D, E, f3, K3, expand( data, 55 ) );
+ subRound( E, A, B, C, D, f3, K3, expand( data, 56 ) );
+ subRound( D, E, A, B, C, f3, K3, expand( data, 57 ) );
+ subRound( C, D, E, A, B, f3, K3, expand( data, 58 ) );
+ subRound( B, C, D, E, A, f3, K3, expand( data, 59 ) );
+
+ subRound( A, B, C, D, E, f4, K4, expand( data, 60 ) );
+ subRound( E, A, B, C, D, f4, K4, expand( data, 61 ) );
+ subRound( D, E, A, B, C, f4, K4, expand( data, 62 ) );
+ subRound( C, D, E, A, B, f4, K4, expand( data, 63 ) );
+ subRound( B, C, D, E, A, f4, K4, expand( data, 64 ) );
+ subRound( A, B, C, D, E, f4, K4, expand( data, 65 ) );
+ subRound( E, A, B, C, D, f4, K4, expand( data, 66 ) );
+ subRound( D, E, A, B, C, f4, K4, expand( data, 67 ) );
+ subRound( C, D, E, A, B, f4, K4, expand( data, 68 ) );
+ subRound( B, C, D, E, A, f4, K4, expand( data, 69 ) );
+ subRound( A, B, C, D, E, f4, K4, expand( data, 70 ) );
+ subRound( E, A, B, C, D, f4, K4, expand( data, 71 ) );
+ subRound( D, E, A, B, C, f4, K4, expand( data, 72 ) );
+ subRound( C, D, E, A, B, f4, K4, expand( data, 73 ) );
+ subRound( B, C, D, E, A, f4, K4, expand( data, 74 ) );
+ subRound( A, B, C, D, E, f4, K4, expand( data, 75 ) );
+ subRound( E, A, B, C, D, f4, K4, expand( data, 76 ) );
+ subRound( D, E, A, B, C, f4, K4, expand( data, 77 ) );
+ subRound( C, D, E, A, B, f4, K4, expand( data, 78 ) );
+ subRound( B, C, D, E, A, f4, K4, expand( data, 79 ) );
+
+ /* Build message digest */
+ state[0] += A;
+ state[1] += B;
+ state[2] += C;
+ state[3] += D;
+ state[4] += E;
}
static void
sha1_block(struct sha1_ctx *ctx, const UINT8 *block)
{
- UINT32 data[SHA1_DATA_LENGTH];
- int i;
+ UINT32 data[SHA1_DATA_LENGTH];
+ int i;
- /* Update block count */
- if (!++ctx->count_low)
- ++ctx->count_high;
+ /* Update block count */
+ if (!++ctx->count_low)
+ ++ctx->count_high;
- /* Endian independent conversion */
- for (i = 0; i<SHA1_DATA_LENGTH; i++, block += 4)
- data[i] = READ_UINT32(block);
+ /* Endian independent conversion */
+ for (i = 0; i<SHA1_DATA_LENGTH; i++, block += 4)
+ data[i] = READ_UINT32(block);
- sha1_transform(ctx->digest, data);
+ sha1_transform(ctx->digest, data);
}
void
sha1_update(struct sha1_ctx *ctx,
- unsigned length, const UINT8 *buffer)
+ unsigned length, const UINT8 *buffer)
{
- if (ctx->index)
- { /* Try to fill partial block */
- unsigned left = SHA1_DATA_SIZE - ctx->index;
- if (length < left)
+ if (ctx->index)
+ { /* Try to fill partial block */
+ unsigned left = SHA1_DATA_SIZE - ctx->index;
+ if (length < left)
{
- memcpy(ctx->block + ctx->index, buffer, length);
- ctx->index += length;
- return; /* Finished */
+ memcpy(ctx->block + ctx->index, buffer, length);
+ ctx->index += length;
+ return; /* Finished */
}
- else
+ else
{
- memcpy(ctx->block + ctx->index, buffer, left);
- sha1_block(ctx, ctx->block);
- buffer += left;
- length -= left;
+ memcpy(ctx->block + ctx->index, buffer, left);
+ sha1_block(ctx, ctx->block);
+ buffer += left;
+ length -= left;
}
- }
- while (length >= SHA1_DATA_SIZE)
- {
- sha1_block(ctx, buffer);
- buffer += SHA1_DATA_SIZE;
- length -= SHA1_DATA_SIZE;
- }
- ctx->index = length;
- if (length)
- /* Buffer leftovers */
- memcpy(ctx->block, buffer, length);
+ }
+ while (length >= SHA1_DATA_SIZE)
+ {
+ sha1_block(ctx, buffer);
+ buffer += SHA1_DATA_SIZE;
+ length -= SHA1_DATA_SIZE;
+ }
+ ctx->index = length;
+ if (length)
+ /* Buffer leftovers */
+ memcpy(ctx->block, buffer, length);
}
/* Final wrapup - pad to SHA1_DATA_SIZE-byte boundary with the bit pattern
@@ -304,84 +304,84 @@ sha1_update(struct sha1_ctx *ctx,
void
sha1_final(struct sha1_ctx *ctx)
{
- UINT32 data[SHA1_DATA_LENGTH];
- int i;
- int words;
+ UINT32 data[SHA1_DATA_LENGTH];
+ int i;
+ int words;
- i = ctx->index;
+ i = ctx->index;
- /* Set the first char of padding to 0x80. This is safe since there is
- always at least one byte free */
+ /* Set the first char of padding to 0x80. This is safe since there is
+ always at least one byte free */
- assert(i < SHA1_DATA_SIZE);
- ctx->block[i++] = 0x80;
+ assert(i < SHA1_DATA_SIZE);
+ ctx->block[i++] = 0x80;
- /* Fill rest of word */
- for( ; i & 3; i++)
- ctx->block[i] = 0;
+ /* Fill rest of word */
+ for( ; i & 3; i++)
+ ctx->block[i] = 0;
- /* i is now a multiple of the word size 4 */
- words = i >> 2;
- for (i = 0; i < words; i++)
- data[i] = READ_UINT32(ctx->block + 4*i);
+ /* i is now a multiple of the word size 4 */
+ words = i >> 2;
+ for (i = 0; i < words; i++)
+ data[i] = READ_UINT32(ctx->block + 4*i);
- if (words > (SHA1_DATA_LENGTH-2))
- { /* No room for length in this block. Process it and
+ if (words > (SHA1_DATA_LENGTH-2))
+ { /* No room for length in this block. Process it and
* pad with another one */
- for (i = words ; i < SHA1_DATA_LENGTH; i++)
+ for (i = words ; i < SHA1_DATA_LENGTH; i++)
data[i] = 0;
- sha1_transform(ctx->digest, data);
- for (i = 0; i < (SHA1_DATA_LENGTH-2); i++)
+ sha1_transform(ctx->digest, data);
+ for (i = 0; i < (SHA1_DATA_LENGTH-2); i++)
data[i] = 0;
- }
- else
- for (i = words ; i < SHA1_DATA_LENGTH - 2; i++)
- data[i] = 0;
-
- /* There are 512 = 2^9 bits in one block */
- data[SHA1_DATA_LENGTH-2] = (ctx->count_high << 9) | (ctx->count_low >> 23);
- data[SHA1_DATA_LENGTH-1] = (ctx->count_low << 9) | (ctx->index << 3);
- sha1_transform(ctx->digest, data);
+ }
+ else
+ for (i = words ; i < SHA1_DATA_LENGTH - 2; i++)
+ data[i] = 0;
+
+ /* There are 512 = 2^9 bits in one block */
+ data[SHA1_DATA_LENGTH-2] = (ctx->count_high << 9) | (ctx->count_low >> 23);
+ data[SHA1_DATA_LENGTH-1] = (ctx->count_low << 9) | (ctx->index << 3);
+ sha1_transform(ctx->digest, data);
}
void
sha1_digest(const struct sha1_ctx *ctx,
- unsigned length,
- UINT8 *digest)
+ unsigned length,
+ UINT8 *digest)
{
- unsigned i;
- unsigned words;
- unsigned leftover;
+ unsigned i;
+ unsigned words;
+ unsigned leftover;
- assert(length <= SHA1_DIGEST_SIZE);
+ assert(length <= SHA1_DIGEST_SIZE);
- words = length / 4;
- leftover = length % 4;
+ words = length / 4;
+ leftover = length % 4;
- for (i = 0; i < words; i++, digest += 4)
- WRITE_UINT32(digest, ctx->digest[i]);
+ for (i = 0; i < words; i++, digest += 4)
+ WRITE_UINT32(digest, ctx->digest[i]);
- if (leftover)
- {
- UINT32 word;
- unsigned j = leftover;
+ if (leftover)
+ {
+ UINT32 word;
+ unsigned j = leftover;
- assert(i < _SHA1_DIGEST_LENGTH);
+ assert(i < _SHA1_DIGEST_LENGTH);
- word = ctx->digest[i];
+ word = ctx->digest[i];
- switch (leftover)
+ switch (leftover)
{
default:
/* this is just here to keep the compiler happy; it can never happen */
case 3:
- digest[--j] = (word >> 8) & 0xff;
- /* Fall through */
+ digest[--j] = (word >> 8) & 0xff;
+ /* Fall through */
case 2:
- digest[--j] = (word >> 16) & 0xff;
- /* Fall through */
+ digest[--j] = (word >> 16) & 0xff;
+ /* Fall through */
case 1:
- digest[--j] = (word >> 24) & 0xff;
+ digest[--j] = (word >> 24) & 0xff;
+ }
}
- }
}
diff --git a/src/lib/util/sha1.h b/src/lib/util/sha1.h
index 028f3303cb1..dcec92e453d 100644
--- a/src/lib/util/sha1.h
+++ b/src/lib/util/sha1.h
@@ -36,10 +36,10 @@
struct sha1_ctx
{
- UINT32 digest[_SHA1_DIGEST_LENGTH]; /* Message digest */
- UINT32 count_low, count_high; /* 64-bit block count */
- UINT8 block[SHA1_DATA_SIZE]; /* SHA1 data buffer */
- unsigned int index; /* index into buffer */
+ UINT32 digest[_SHA1_DIGEST_LENGTH]; /* Message digest */
+ UINT32 count_low, count_high; /* 64-bit block count */
+ UINT8 block[SHA1_DATA_SIZE]; /* SHA1 data buffer */
+ unsigned int index; /* index into buffer */
};
void
@@ -47,15 +47,15 @@ sha1_init(struct sha1_ctx *ctx);
void
sha1_update(struct sha1_ctx *ctx,
- unsigned length,
- const UINT8 *data);
+ unsigned length,
+ const UINT8 *data);
void
sha1_final(struct sha1_ctx *ctx);
void
sha1_digest(const struct sha1_ctx *ctx,
- unsigned length,
- UINT8 *digest);
+ unsigned length,
+ UINT8 *digest);
#endif /* NETTLE_SHA1_H_INCLUDED */
diff --git a/src/lib/util/tagmap.h b/src/lib/util/tagmap.h
index 23fd72a5369..9fc7297f243 100644
--- a/src/lib/util/tagmap.h
+++ b/src/lib/util/tagmap.h
@@ -83,9 +83,9 @@ public:
// construction/destruction
entry_t(const char *tag, UINT32 fullhash, _ElementType object)
: m_next(NULL),
- m_fullhash(fullhash),
- m_tag(tag),
- m_object(object) { }
+ m_fullhash(fullhash),
+ m_tag(tag),
+ m_object(object) { }
// accessors
const astring &tag() const { return m_tag; }
@@ -100,10 +100,10 @@ public:
UINT32 fullhash() const { return m_fullhash; }
// internal state
- entry_t * m_next;
- UINT32 m_fullhash;
- astring m_tag;
- _ElementType m_object;
+ entry_t * m_next;
+ UINT32 m_fullhash;
+ astring m_tag;
+ _ElementType m_object;
};
// construction/destruction
@@ -204,7 +204,7 @@ private:
}
// internal state
- entry_t * m_table[_HashSize];
+ entry_t * m_table[_HashSize];
};
diff --git a/src/lib/util/un7z.c b/src/lib/util/un7z.c
index a391d0b82a2..d5fe9c3242e 100644
--- a/src/lib/util/un7z.c
+++ b/src/lib/util/un7z.c
@@ -103,7 +103,7 @@ WRes File_Read(CSzFile *p, void *data, size_t *size)
return 0;
// err =
- osd_read( p->_7z_osdfile, data, p->_7z_currfpos, originalSize, &read_length );
+ osd_read( p->_7z_osdfile, data, p->_7z_currfpos, originalSize, &read_length );
*size = read_length;
p->_7z_currfpos += read_length;
@@ -139,13 +139,13 @@ WRes File_GetLength(CSzFile *p, UInt64 *length)
static SRes FileSeqInStream_Read(void *pp, void *buf, size_t *size)
{
- CFileSeqInStream *p = (CFileSeqInStream *)pp;
- return File_Read(&p->file, buf, size) == 0 ? SZ_OK : SZ_ERROR_READ;
+ CFileSeqInStream *p = (CFileSeqInStream *)pp;
+ return File_Read(&p->file, buf, size) == 0 ? SZ_OK : SZ_ERROR_READ;
}
void FileSeqInStream_CreateVTable(CFileSeqInStream *p)
{
- p->s.Read = FileSeqInStream_Read;
+ p->s.Read = FileSeqInStream_Read;
}
@@ -173,14 +173,14 @@ void FileInStream_CreateVTable(CFileInStream *p)
static size_t FileOutStream_Write(void *pp, const void *data, size_t size)
{
- CFileOutStream *p = (CFileOutStream *)pp;
- File_Write(&p->file, data, &size);
- return size;
+ CFileOutStream *p = (CFileOutStream *)pp;
+ File_Write(&p->file, data, &size);
+ return size;
}
void FileOutStream_CreateVTable(CFileOutStream *p)
{
- p->s.Write = FileOutStream_Write;
+ p->s.Write = FileOutStream_Write;
}
/***************************************************************************
@@ -188,7 +188,7 @@ void FileOutStream_CreateVTable(CFileOutStream *p)
***************************************************************************/
/* number of open files to cache */
-#define _7Z_CACHE_SIZE 8
+#define _7Z_CACHE_SIZE 8
/***************************************************************************
@@ -513,5 +513,3 @@ static void free__7z_file(_7z_file *_7z)
free(_7z);
}
}
-
-
diff --git a/src/lib/util/un7z.h b/src/lib/util/un7z.h
index f80bc4b12ab..9f7618a982e 100644
--- a/src/lib/util/un7z.h
+++ b/src/lib/util/un7z.h
@@ -59,8 +59,8 @@ void SZipFreeTemp(void *p, void *address);
struct CSzFile
{
long _7z_currfpos;
- UINT64 _7z_length;
- osd_file * _7z_osdfile; /* OSD file handle */
+ UINT64 _7z_length;
+ osd_file * _7z_osdfile; /* OSD file handle */
};
@@ -121,11 +121,11 @@ enum _7z_error
/* describes an open _7Z file */
struct _7z_file
{
- const char * filename; /* copy of _7Z filename (for caching) */
+ const char * filename; /* copy of _7Z filename (for caching) */
- int curr_file_idx; /* current file index */
- UINT64 uncompressed_length; /* current file uncompressed length */
- UINT64 crc; /* current file crc */
+ int curr_file_idx; /* current file index */
+ UINT64 uncompressed_length; /* current file uncompressed length */
+ UINT64 crc; /* current file crc */
CFileInStream archiveStream;
CLookToRead lookStream;
@@ -169,4 +169,4 @@ int _7z_search_crc_match(_7z_file *new_7z, UINT32 crc, const char *search_filena
_7z_error _7z_file_decompress(_7z_file *_7z, void *buffer, UINT32 length);
-#endif /* __UN_7Z_H__ */
+#endif /* __UN_7Z_H__ */
diff --git a/src/lib/util/unicode.h b/src/lib/util/unicode.h
index e59c6fe862b..aa3d3900845 100644
--- a/src/lib/util/unicode.h
+++ b/src/lib/util/unicode.h
@@ -60,30 +60,30 @@
/* these defines specify the maximum size of different types of Unicode
* character encodings */
-#define UTF8_CHAR_MAX 6
-#define UTF16_CHAR_MAX 2
+#define UTF8_CHAR_MAX 6
+#define UTF16_CHAR_MAX 2
/* these are UTF-8 encoded strings for common characters */
-#define UTF8_NBSP "\xc2\xa0" /* non-breaking space */
-#define UTF8_MULTIPLY "\xc3\x97" /* multiplication symbol */
-#define UTF8_DEGREES "\xc2\xb0" /* degrees symbol */
+#define UTF8_NBSP "\xc2\xa0" /* non-breaking space */
+#define UTF8_MULTIPLY "\xc3\x97" /* multiplication symbol */
+#define UTF8_DEGREES "\xc2\xb0" /* degrees symbol */
-#define a_RING "\xc3\xa5" /* small a with a ring */
-#define a_UMLAUT "\xc3\xa4" /* small a with an umlaut */
-#define o_UMLAUT "\xc3\xb6" /* small o with an umlaut */
-#define u_UMLAUT "\xc3\xbc" /* small u with an umlaut */
-#define e_ACUTE "\xc3\xa9" /* small e with an acute */
+#define a_RING "\xc3\xa5" /* small a with a ring */
+#define a_UMLAUT "\xc3\xa4" /* small a with an umlaut */
+#define o_UMLAUT "\xc3\xb6" /* small o with an umlaut */
+#define u_UMLAUT "\xc3\xbc" /* small u with an umlaut */
+#define e_ACUTE "\xc3\xa9" /* small e with an acute */
-#define A_RING "\xc3\x85" /* capital A with a ring */
-#define A_UMLAUT "\xc3\x84" /* capital A with an umlaut */
-#define O_UMLAUT "\xc3\x96" /* capital O with an umlaut */
-#define U_UMLAUT "\xc3\x9c" /* capital U with an umlaut */
-#define E_ACUTE "\xc3\x89" /* capital E with an acute */
+#define A_RING "\xc3\x85" /* capital A with a ring */
+#define A_UMLAUT "\xc3\x84" /* capital A with an umlaut */
+#define O_UMLAUT "\xc3\x96" /* capital O with an umlaut */
+#define U_UMLAUT "\xc3\x9c" /* capital U with an umlaut */
+#define E_ACUTE "\xc3\x89" /* capital E with an acute */
-#define UTF8_LEFT "\xe2\x86\x90" /* cursor left */
-#define UTF8_RIGHT "\xe2\x86\x92" /* cursor right */
-#define UTF8_UP "\xe2\x86\x91" /* cursor up */
-#define UTF8_DOWN "\xe2\x86\x93" /* cursor down */
+#define UTF8_LEFT "\xe2\x86\x90" /* cursor left */
+#define UTF8_RIGHT "\xe2\x86\x92" /* cursor right */
+#define UTF8_UP "\xe2\x86\x91" /* cursor up */
+#define UTF8_DOWN "\xe2\x86\x93" /* cursor down */
@@ -124,15 +124,15 @@ int utf8_is_valid_string(const char *utf8string);
***************************************************************************/
#ifdef LSB_FIRST
-#define uchar_from_utf16be uchar_from_utf16f
-#define uchar_from_utf16le uchar_from_utf16
-#define utf16be_from_uchar utf16f_from_uchar
-#define utf16le_from_uchar utf16_from_uchar
+#define uchar_from_utf16be uchar_from_utf16f
+#define uchar_from_utf16le uchar_from_utf16
+#define utf16be_from_uchar utf16f_from_uchar
+#define utf16le_from_uchar utf16_from_uchar
#else
-#define uchar_from_utf16be uchar_from_utf16
-#define uchar_from_utf16le uchar_from_utf16f
-#define utf16be_from_uchar utf16_from_uchar
-#define utf16le_from_uchar utf16f_from_uchar
+#define uchar_from_utf16be uchar_from_utf16
+#define uchar_from_utf16le uchar_from_utf16f
+#define utf16be_from_uchar utf16_from_uchar
+#define utf16le_from_uchar utf16f_from_uchar
#endif
#endif /* UNICODE_H */
diff --git a/src/lib/util/unzip.c b/src/lib/util/unzip.c
index 847d7615659..ab0fc2dc304 100644
--- a/src/lib/util/unzip.c
+++ b/src/lib/util/unzip.c
@@ -51,54 +51,54 @@
***************************************************************************/
/* number of open files to cache */
-#define ZIP_CACHE_SIZE 8
+#define ZIP_CACHE_SIZE 8
/* offsets in end of central directory structure */
-#define ZIPESIG 0x00
-#define ZIPEDSK 0x04
-#define ZIPECEN 0x06
-#define ZIPENUM 0x08
-#define ZIPECENN 0x0a
-#define ZIPECSZ 0x0c
-#define ZIPEOFST 0x10
-#define ZIPECOML 0x14
-#define ZIPECOM 0x16
+#define ZIPESIG 0x00
+#define ZIPEDSK 0x04
+#define ZIPECEN 0x06
+#define ZIPENUM 0x08
+#define ZIPECENN 0x0a
+#define ZIPECSZ 0x0c
+#define ZIPEOFST 0x10
+#define ZIPECOML 0x14
+#define ZIPECOM 0x16
/* offsets in central directory entry structure */
-#define ZIPCENSIG 0x00
-#define ZIPCVER 0x04
-#define ZIPCOS 0x05
-#define ZIPCVXT 0x06
-#define ZIPCEXOS 0x07
-#define ZIPCFLG 0x08
-#define ZIPCMTHD 0x0a
-#define ZIPCTIM 0x0c
-#define ZIPCDAT 0x0e
-#define ZIPCCRC 0x10
-#define ZIPCSIZ 0x14
-#define ZIPCUNC 0x18
-#define ZIPCFNL 0x1c
-#define ZIPCXTL 0x1e
-#define ZIPCCML 0x20
-#define ZIPDSK 0x22
-#define ZIPINT 0x24
-#define ZIPEXT 0x26
-#define ZIPOFST 0x2a
-#define ZIPCFN 0x2e
+#define ZIPCENSIG 0x00
+#define ZIPCVER 0x04
+#define ZIPCOS 0x05
+#define ZIPCVXT 0x06
+#define ZIPCEXOS 0x07
+#define ZIPCFLG 0x08
+#define ZIPCMTHD 0x0a
+#define ZIPCTIM 0x0c
+#define ZIPCDAT 0x0e
+#define ZIPCCRC 0x10
+#define ZIPCSIZ 0x14
+#define ZIPCUNC 0x18
+#define ZIPCFNL 0x1c
+#define ZIPCXTL 0x1e
+#define ZIPCCML 0x20
+#define ZIPDSK 0x22
+#define ZIPINT 0x24
+#define ZIPEXT 0x26
+#define ZIPOFST 0x2a
+#define ZIPCFN 0x2e
/* offsets in local file header structure */
-#define ZIPLOCSIG 0x00
-#define ZIPVER 0x04
-#define ZIPGENFLG 0x06
-#define ZIPMTHD 0x08
-#define ZIPTIME 0x0a
-#define ZIPDATE 0x0c
-#define ZIPCRC 0x0e
-#define ZIPSIZE 0x12
-#define ZIPUNCMP 0x16
-#define ZIPFNLN 0x1a
-#define ZIPXTRALN 0x1c
-#define ZIPNAME 0x1e
+#define ZIPLOCSIG 0x00
+#define ZIPVER 0x04
+#define ZIPGENFLG 0x06
+#define ZIPMTHD 0x08
+#define ZIPTIME 0x0a
+#define ZIPDATE 0x0c
+#define ZIPCRC 0x0e
+#define ZIPSIZE 0x12
+#define ZIPUNCMP 0x16
+#define ZIPFNLN 0x1a
+#define ZIPXTRALN 0x1c
+#define ZIPNAME 0x1e
@@ -368,37 +368,37 @@ const zip_file_header *zip_file_next_file(zip_file *zip)
zip_error zip_file_decompress(zip_file *zip, void *buffer, UINT32 length)
{
- zip_error ziperr;
- UINT64 offset;
+ zip_error ziperr;
+ UINT64 offset;
- /* if we don't have enough buffer, error */
- if (length < zip->header.uncompressed_length)
- return ZIPERR_BUFFER_TOO_SMALL;
+ /* if we don't have enough buffer, error */
+ if (length < zip->header.uncompressed_length)
+ return ZIPERR_BUFFER_TOO_SMALL;
- /* make sure the info in the header aligns with what we know */
+ /* make sure the info in the header aligns with what we know */
if (zip->header.start_disk_number != zip->ecd.disk_number)
return ZIPERR_UNSUPPORTED;
- /* get the compressed data offset */
- ziperr = get_compressed_data_offset(zip, &offset);
- if (ziperr != ZIPERR_NONE)
- return ziperr;
+ /* get the compressed data offset */
+ ziperr = get_compressed_data_offset(zip, &offset);
+ if (ziperr != ZIPERR_NONE)
+ return ziperr;
- /* handle compression types */
- switch (zip->header.compression)
- {
- case 0:
- ziperr = decompress_data_type_0(zip, offset, buffer, length);
- break;
+ /* handle compression types */
+ switch (zip->header.compression)
+ {
+ case 0:
+ ziperr = decompress_data_type_0(zip, offset, buffer, length);
+ break;
case 8:
- ziperr = decompress_data_type_8(zip, offset, buffer, length);
- break;
+ ziperr = decompress_data_type_8(zip, offset, buffer, length);
+ break;
- default:
- ziperr = ZIPERR_UNSUPPORTED;
- break;
- }
+ default:
+ ziperr = ZIPERR_UNSUPPORTED;
+ break;
+ }
return ziperr;
}
@@ -573,36 +573,36 @@ static zip_error decompress_data_type_0(zip_file *zip, UINT64 offset, void *buff
static zip_error decompress_data_type_8(zip_file *zip, UINT64 offset, void *buffer, UINT32 length)
{
- UINT32 input_remaining = zip->header.compressed_length;
- UINT32 read_length;
- z_stream stream;
- int filerr;
- int zerr;
+ UINT32 input_remaining = zip->header.compressed_length;
+ UINT32 read_length;
+ z_stream stream;
+ int filerr;
+ int zerr;
/* make sure we don't need a newer mechanism */
if (zip->header.version_needed > 0x14)
return ZIPERR_UNSUPPORTED;
- /* reset the stream */
- memset(&stream, 0, sizeof(stream));
- stream.next_out = (Bytef *)buffer;
- stream.avail_out = length;
+ /* reset the stream */
+ memset(&stream, 0, sizeof(stream));
+ stream.next_out = (Bytef *)buffer;
+ stream.avail_out = length;
- /* initialize the decompressor */
- zerr = inflateInit2(&stream, -MAX_WBITS);
- if (zerr != Z_OK)
- return ZIPERR_DECOMPRESS_ERROR;
+ /* initialize the decompressor */
+ zerr = inflateInit2(&stream, -MAX_WBITS);
+ if (zerr != Z_OK)
+ return ZIPERR_DECOMPRESS_ERROR;
- /* loop until we're done */
- while (1)
+ /* loop until we're done */
+ while (1)
{
/* read in the next chunk of data */
filerr = osd_read(zip->file, zip->buffer, offset, MIN(input_remaining, sizeof(zip->buffer)), &read_length);
if (filerr != FILERR_NONE)
{
inflateEnd(&stream);
- return ZIPERR_FILE_ERROR;
- }
+ return ZIPERR_FILE_ERROR;
+ }
offset += read_length;
/* if we read nothing, but still have data left, the file is truncated */
@@ -622,15 +622,15 @@ static zip_error decompress_data_type_8(zip_file *zip, UINT64 offset, void *buff
stream.avail_in++;
/* now inflate */
- zerr = inflate(&stream, Z_NO_FLUSH);
- if (zerr == Z_STREAM_END)
+ zerr = inflate(&stream, Z_NO_FLUSH);
+ if (zerr == Z_STREAM_END)
break;
if (zerr != Z_OK)
{
inflateEnd(&stream);
return ZIPERR_DECOMPRESS_ERROR;
}
- }
+ }
/* finish decompression */
zerr = inflateEnd(&stream);
diff --git a/src/lib/util/unzip.h b/src/lib/util/unzip.h
index e199e1c3b74..ecdc0ea7f90 100644
--- a/src/lib/util/unzip.h
+++ b/src/lib/util/unzip.h
@@ -49,7 +49,7 @@
CONSTANTS
***************************************************************************/
-#define ZIP_DECOMPRESS_BUFSIZE 16384
+#define ZIP_DECOMPRESS_BUFSIZE 16384
/* Error types */
enum zip_error
@@ -74,63 +74,63 @@ enum zip_error
/* contains extracted file header information */
struct zip_file_header
{
- UINT32 signature; /* central file header signature */
- UINT16 version_created; /* version made by */
- UINT16 version_needed; /* version needed to extract */
- UINT16 bit_flag; /* general purpose bit flag */
- UINT16 compression; /* compression method */
- UINT16 file_time; /* last mod file time */
- UINT16 file_date; /* last mod file date */
- UINT32 crc; /* crc-32 */
- UINT32 compressed_length; /* compressed size */
- UINT32 uncompressed_length; /* uncompressed size */
- UINT16 filename_length; /* filename length */
- UINT16 extra_field_length; /* extra field length */
- UINT16 file_comment_length; /* file comment length */
- UINT16 start_disk_number; /* disk number start */
- UINT16 internal_attributes; /* internal file attributes */
- UINT32 external_attributes; /* external file attributes */
- UINT32 local_header_offset; /* relative offset of local header */
- const char * filename; /* filename */
-
- UINT8 * raw; /* pointer to the raw data */
- UINT32 rawlength; /* length of the raw data */
- UINT8 saved; /* saved byte from after filename */
+ UINT32 signature; /* central file header signature */
+ UINT16 version_created; /* version made by */
+ UINT16 version_needed; /* version needed to extract */
+ UINT16 bit_flag; /* general purpose bit flag */
+ UINT16 compression; /* compression method */
+ UINT16 file_time; /* last mod file time */
+ UINT16 file_date; /* last mod file date */
+ UINT32 crc; /* crc-32 */
+ UINT32 compressed_length; /* compressed size */
+ UINT32 uncompressed_length; /* uncompressed size */
+ UINT16 filename_length; /* filename length */
+ UINT16 extra_field_length; /* extra field length */
+ UINT16 file_comment_length; /* file comment length */
+ UINT16 start_disk_number; /* disk number start */
+ UINT16 internal_attributes; /* internal file attributes */
+ UINT32 external_attributes; /* external file attributes */
+ UINT32 local_header_offset; /* relative offset of local header */
+ const char * filename; /* filename */
+
+ UINT8 * raw; /* pointer to the raw data */
+ UINT32 rawlength; /* length of the raw data */
+ UINT8 saved; /* saved byte from after filename */
};
/* contains extracted end of central directory information */
struct zip_ecd
{
- UINT32 signature; /* end of central dir signature */
- UINT16 disk_number; /* number of this disk */
- UINT16 cd_start_disk_number; /* number of the disk with the start of the central directory */
- UINT16 cd_disk_entries; /* total number of entries in the central directory on this disk */
- UINT16 cd_total_entries; /* total number of entries in the central directory */
- UINT32 cd_size; /* size of the central directory */
- UINT32 cd_start_disk_offset; /* offset of start of central directory with respect to the starting disk number */
- UINT16 comment_length; /* .ZIP file comment length */
- const char * comment; /* .ZIP file comment */
-
- UINT8 * raw; /* pointer to the raw data */
- UINT32 rawlength; /* length of the raw data */
+ UINT32 signature; /* end of central dir signature */
+ UINT16 disk_number; /* number of this disk */
+ UINT16 cd_start_disk_number; /* number of the disk with the start of the central directory */
+ UINT16 cd_disk_entries; /* total number of entries in the central directory on this disk */
+ UINT16 cd_total_entries; /* total number of entries in the central directory */
+ UINT32 cd_size; /* size of the central directory */
+ UINT32 cd_start_disk_offset; /* offset of start of central directory with respect to the starting disk number */
+ UINT16 comment_length; /* .ZIP file comment length */
+ const char * comment; /* .ZIP file comment */
+
+ UINT8 * raw; /* pointer to the raw data */
+ UINT32 rawlength; /* length of the raw data */
};
/* describes an open ZIP file */
struct zip_file
{
- const char * filename; /* copy of ZIP filename (for caching) */
- osd_file * file; /* OSD file handle */
- UINT64 length; /* length of zip file */
+ const char * filename; /* copy of ZIP filename (for caching) */
+ osd_file * file; /* OSD file handle */
+ UINT64 length; /* length of zip file */
- zip_ecd ecd; /* end of central directory */
+ zip_ecd ecd; /* end of central directory */
- UINT8 * cd; /* central directory raw data */
- UINT32 cd_pos; /* position in central directory */
- zip_file_header header; /* current file header */
+ UINT8 * cd; /* central directory raw data */
+ UINT32 cd_pos; /* position in central directory */
+ zip_file_header header; /* current file header */
- UINT8 buffer[ZIP_DECOMPRESS_BUFSIZE]; /* buffer for decompression */
+ UINT8 buffer[ZIP_DECOMPRESS_BUFSIZE]; /* buffer for decompression */
};
@@ -164,4 +164,4 @@ const zip_file_header *zip_file_next_file(zip_file *zip);
zip_error zip_file_decompress(zip_file *zip, void *buffer, UINT32 length);
-#endif /* __UNZIP_H__ */
+#endif /* __UNZIP_H__ */
diff --git a/src/lib/util/vbiparse.c b/src/lib/util/vbiparse.c
index 89a800fb683..7f530fe9a92 100644
--- a/src/lib/util/vbiparse.c
+++ b/src/lib/util/vbiparse.c
@@ -47,7 +47,7 @@
DEBUGGING
***************************************************************************/
-#define PRINTF_WHITE_FLAG 0
+#define PRINTF_WHITE_FLAG 0
@@ -55,8 +55,8 @@
CONSTANTS
***************************************************************************/
-#define MAX_SOURCE_WIDTH 1024
-#define MAX_CLOCK_DIFF 3
+#define MAX_SOURCE_WIDTH 1024
+#define MAX_CLOCK_DIFF 3
@@ -249,19 +249,19 @@ int vbi_parse_white_flag(const UINT16 *source, int sourcewidth, int sourceshift)
}
/*
- At this point, there are two approaches that have been tried:
+ At this point, there are two approaches that have been tried:
- 1. Find the peak value and call it white if the peak is above
- the 90% line
+ 1. Find the peak value and call it white if the peak is above
+ the 90% line
- 2. Ignore the first and last 20% of the line and count how
- many pixels are above some threshold (75% line was used).
- Call it white if at least 80% of the pixels are above
- the threshold.
+ 2. Ignore the first and last 20% of the line and count how
+ many pixels are above some threshold (75% line was used).
+ Call it white if at least 80% of the pixels are above
+ the threshold.
- Both approaches agree 99% of the time, but the first tends to
- be more correct when there is a discrepancy.
- */
+ Both approaches agree 99% of the time, but the first tends to
+ be more correct when there is a discrepancy.
+ */
/* determine where the peak is */
peakval = 0;
@@ -403,4 +403,3 @@ void vbi_metadata_unpack(vbi_metadata *vbi, UINT32 *framenum, const UINT8 *sourc
vbi->line18 = (source[10] << 16) | (source[11] << 8) | source[12];
vbi->line1718 = (source[13] << 16) | (source[14] << 8) | source[15];
}
-
diff --git a/src/lib/util/vbiparse.h b/src/lib/util/vbiparse.h
index b2fb6739f04..1a822e6cd22 100644
--- a/src/lib/util/vbiparse.h
+++ b/src/lib/util/vbiparse.h
@@ -48,29 +48,29 @@
***************************************************************************/
/* size of packed VBI data */
-#define VBI_PACKED_BYTES 16
+#define VBI_PACKED_BYTES 16
/* these codes are full 24-bit codes with no parameter data */
-#define VBI_CODE_LEADIN 0x88ffff
-#define VBI_CODE_LEADOUT 0x80eeee
-#define VBI_CODE_STOP 0x82cfff
-#define VBI_CODE_CLV 0x87ffff
+#define VBI_CODE_LEADIN 0x88ffff
+#define VBI_CODE_LEADOUT 0x80eeee
+#define VBI_CODE_STOP 0x82cfff
+#define VBI_CODE_CLV 0x87ffff
/* these codes require a mask because some bits are parameters */
-#define VBI_MASK_CAV_PICTURE 0xf00000
-#define VBI_CODE_CAV_PICTURE 0xf00000
-#define VBI_MASK_CHAPTER 0xf00fff
-#define VBI_CODE_CHAPTER 0x800ddd
-#define VBI_MASK_CLV_TIME 0xf0ff00
-#define VBI_CODE_CLV_TIME 0xf0dd00
-#define VBI_MASK_STATUS_CX_ON 0xfff000
-#define VBI_CODE_STATUS_CX_ON 0x8dc000
-#define VBI_MASK_STATUS_CX_OFF 0xfff000
-#define VBI_CODE_STATUS_CX_OFF 0x8bc000
-#define VBI_MASK_USER 0xf0f000
-#define VBI_CODE_USER 0x80d000
-#define VBI_MASK_CLV_PICTURE 0xf0f000
-#define VBI_CODE_CLV_PICTURE 0x80e000
+#define VBI_MASK_CAV_PICTURE 0xf00000
+#define VBI_CODE_CAV_PICTURE 0xf00000
+#define VBI_MASK_CHAPTER 0xf00fff
+#define VBI_CODE_CHAPTER 0x800ddd
+#define VBI_MASK_CLV_TIME 0xf0ff00
+#define VBI_CODE_CLV_TIME 0xf0dd00
+#define VBI_MASK_STATUS_CX_ON 0xfff000
+#define VBI_CODE_STATUS_CX_ON 0x8dc000
+#define VBI_MASK_STATUS_CX_OFF 0xfff000
+#define VBI_CODE_STATUS_CX_OFF 0x8bc000
+#define VBI_MASK_USER 0xf0f000
+#define VBI_CODE_USER 0x80d000
+#define VBI_MASK_CLV_PICTURE 0xf0f000
+#define VBI_CODE_CLV_PICTURE 0x80e000
@@ -78,8 +78,8 @@
MACROS
***************************************************************************/
-#define VBI_CAV_PICTURE(x) (((((x) >> 16) & 0x07) * 10000) + ((((x) >> 12) & 0x0f) * 1000) + ((((x) >> 8) & 0x0f) * 100) + ((((x) >> 4) & 0x0f) * 10) + ((((x) >> 0) & 0x0f) * 1))
-#define VBI_CHAPTER(x) (((((x) >> 16) & 0x07) * 10) + ((((x) >> 12) & 0x0f) * 1))
+#define VBI_CAV_PICTURE(x) (((((x) >> 16) & 0x07) * 10000) + ((((x) >> 12) & 0x0f) * 1000) + ((((x) >> 8) & 0x0f) * 100) + ((((x) >> 4) & 0x0f) * 10) + ((((x) >> 0) & 0x0f) * 1))
+#define VBI_CHAPTER(x) (((((x) >> 16) & 0x07) * 10) + ((((x) >> 12) & 0x0f) * 1))
@@ -89,11 +89,11 @@
struct vbi_metadata
{
- UINT8 white; /* white flag: on or off */
- UINT32 line16; /* line 16 code */
- UINT32 line17; /* line 17 code */
- UINT32 line18; /* line 18 code */
- UINT32 line1718; /* most plausible value from lines 17/18 */
+ UINT8 white; /* white flag: on or off */
+ UINT32 line16; /* line 16 code */
+ UINT32 line17; /* line 17 code */
+ UINT32 line18; /* line 18 code */
+ UINT32 line1718; /* most plausible value from lines 17/18 */
};
diff --git a/src/lib/util/xmlfile.c b/src/lib/util/xmlfile.c
index 94abcd6a199..de544c5810a 100644
--- a/src/lib/util/xmlfile.c
+++ b/src/lib/util/xmlfile.c
@@ -46,7 +46,7 @@
CONSTANTS
***************************************************************************/
-#define TEMP_BUFFER_SIZE 4096
+#define TEMP_BUFFER_SIZE 4096
@@ -56,10 +56,10 @@
struct xml_parse_info
{
- XML_Parser parser;
- xml_data_node * rootnode;
- xml_data_node * curnode;
- UINT32 flags;
+ XML_Parser parser;
+ xml_data_node * rootnode;
+ xml_data_node * curnode;
+ UINT32 flags;
};
diff --git a/src/lib/util/xmlfile.h b/src/lib/util/xmlfile.h
index b422cb0ff07..1b466e8f3f4 100644
--- a/src/lib/util/xmlfile.h
+++ b/src/lib/util/xmlfile.h
@@ -77,40 +77,40 @@ struct XML_ParserStruct;
/* a node representing an attribute */
struct xml_attribute_node
{
- xml_attribute_node * next; /* pointer to next attribute node */
- const char * name; /* pointer to copy of tag name */
- const char * value; /* pointer to copy of value string */
+ xml_attribute_node * next; /* pointer to next attribute node */
+ const char * name; /* pointer to copy of tag name */
+ const char * value; /* pointer to copy of value string */
};
/* a node representing a data item and its relationships */
struct xml_data_node
{
- xml_data_node * next; /* pointer to next sibling node */
- xml_data_node * parent; /* pointer to parent node */
- xml_data_node * child; /* pointer to first child node */
- const char * name; /* pointer to copy of tag name */
- const char * value; /* pointer to copy of value string */
- xml_attribute_node * attribute; /* pointer to array of attribute nodes */
- int line; /* line number for this node's start */
+ xml_data_node * next; /* pointer to next sibling node */
+ xml_data_node * parent; /* pointer to parent node */
+ xml_data_node * child; /* pointer to first child node */
+ const char * name; /* pointer to copy of tag name */
+ const char * value; /* pointer to copy of value string */
+ xml_attribute_node * attribute; /* pointer to array of attribute nodes */
+ int line; /* line number for this node's start */
};
/* extended error information from parsing */
struct xml_parse_error
{
- const char * error_message;
- int error_line;
- int error_column;
+ const char * error_message;
+ int error_line;
+ int error_column;
};
/* parsing options */
struct xml_parse_options
{
- xml_parse_error * error;
- void (*init_parser)(struct XML_ParserStruct *parser);
- UINT32 flags;
+ xml_parse_error * error;
+ void (*init_parser)(struct XML_ParserStruct *parser);
+ UINT32 flags;
};
@@ -194,4 +194,4 @@ xml_attribute_node *xml_set_attribute_float(xml_data_node *node, const char *nam
/* normalize a string into something that can be written to an XML file */
const char *xml_normalize_string(const char *string);
-#endif /* __XMLFILE_H__ */
+#endif /* __XMLFILE_H__ */
diff --git a/src/lib/util/zippath.c b/src/lib/util/zippath.c
index 3f7d62ba2c3..c8c7fdee219 100644
--- a/src/lib/util/zippath.c
+++ b/src/lib/util/zippath.c
@@ -32,10 +32,10 @@ class zippath_directory
public:
zippath_directory()
: returned_parent(false),
- directory(NULL),
- called_zip_first(false),
- zipfile(NULL),
- returned_dirlist(NULL) { }
+ directory(NULL),
+ called_zip_first(false),
+ zipfile(NULL),
+ returned_dirlist(NULL) { }
/* common */
bool returned_parent;
@@ -481,9 +481,9 @@ static const zip_file_header *zippath_find_sub_path(zip_file *zipfile, const cha
i = 0;
j = 0;
last_char = '/';
- while(((c1 = next_path_char(header->filename, &i)) == (c2 = next_path_char(subpath, &j))) &&
- ( c1 != '\0' && c2 != '\0' ))
- last_char = c2;
+ while(((c1 = next_path_char(header->filename, &i)) == (c2 = next_path_char(subpath, &j))) &&
+ ( c1 != '\0' && c2 != '\0' ))
+ last_char = c2;
if (c2 == '\0')
diff --git a/src/lib/zlib/adler32.c b/src/lib/zlib/adler32.c
index 006d1e4cd9d..a4b116a3893 100644
--- a/src/lib/zlib/adler32.c
+++ b/src/lib/zlib/adler32.c
@@ -27,34 +27,34 @@ local uLong adler32_combine_ OF((uLong adler1, uLong adler2, z_off64_t len2));
/* note that this assumes BASE is 65521, where 65536 % 65521 == 15
(thank you to John Reiser for pointing this out) */
# define CHOP(a) \
- do { \
- unsigned long tmp = a >> 16; \
- a &= 0xffffUL; \
- a += (tmp << 4) - tmp; \
- } while (0)
+ do { \
+ unsigned long tmp = a >> 16; \
+ a &= 0xffffUL; \
+ a += (tmp << 4) - tmp; \
+ } while (0)
# define MOD28(a) \
- do { \
- CHOP(a); \
- if (a >= BASE) a -= BASE; \
- } while (0)
+ do { \
+ CHOP(a); \
+ if (a >= BASE) a -= BASE; \
+ } while (0)
# define MOD(a) \
- do { \
- CHOP(a); \
- MOD28(a); \
- } while (0)
+ do { \
+ CHOP(a); \
+ MOD28(a); \
+ } while (0)
# define MOD63(a) \
- do { /* this assumes a is not negative */ \
- z_off64_t tmp = a >> 32; \
- a &= 0xffffffffL; \
- a += (tmp << 8) - (tmp << 5) + tmp; \
- tmp = a >> 16; \
- a &= 0xffffL; \
- a += (tmp << 4) - tmp; \
- tmp = a >> 16; \
- a &= 0xffffL; \
- a += (tmp << 4) - tmp; \
- if (a >= BASE) a -= BASE; \
- } while (0)
+ do { /* this assumes a is not negative */ \
+ z_off64_t tmp = a >> 32; \
+ a &= 0xffffffffL; \
+ a += (tmp << 8) - (tmp << 5) + tmp; \
+ tmp = a >> 16; \
+ a &= 0xffffL; \
+ a += (tmp << 4) - tmp; \
+ tmp = a >> 16; \
+ a &= 0xffffL; \
+ a += (tmp << 4) - tmp; \
+ if (a >= BASE) a -= BASE; \
+ } while (0)
#else
# define MOD(a) a %= BASE
# define MOD28(a) a %= BASE
@@ -63,121 +63,121 @@ local uLong adler32_combine_ OF((uLong adler1, uLong adler2, z_off64_t len2));
/* ========================================================================= */
uLong ZEXPORT adler32(adler, buf, len)
- uLong adler;
- const Bytef *buf;
- uInt len;
+ uLong adler;
+ const Bytef *buf;
+ uInt len;
{
- unsigned long sum2;
- unsigned n;
-
- /* split Adler-32 into component sums */
- sum2 = (adler >> 16) & 0xffff;
- adler &= 0xffff;
-
- /* in case user likes doing a byte at a time, keep it fast */
- if (len == 1) {
- adler += buf[0];
- if (adler >= BASE)
- adler -= BASE;
- sum2 += adler;
- if (sum2 >= BASE)
- sum2 -= BASE;
- return adler | (sum2 << 16);
- }
-
- /* initial Adler-32 value (deferred check for len == 1 speed) */
- if (buf == Z_NULL)
- return 1L;
-
- /* in case short lengths are provided, keep it somewhat fast */
- if (len < 16) {
- while (len--) {
- adler += *buf++;
- sum2 += adler;
- }
- if (adler >= BASE)
- adler -= BASE;
- MOD28(sum2); /* only added so many BASE's */
- return adler | (sum2 << 16);
- }
-
- /* do length NMAX blocks -- requires just one modulo operation */
- while (len >= NMAX) {
- len -= NMAX;
- n = NMAX / 16; /* NMAX is divisible by 16 */
- do {
- DO16(buf); /* 16 sums unrolled */
- buf += 16;
- } while (--n);
- MOD(adler);
- MOD(sum2);
- }
-
- /* do remaining bytes (less than NMAX, still just one modulo) */
- if (len) { /* avoid modulos if none remaining */
- while (len >= 16) {
- len -= 16;
- DO16(buf);
- buf += 16;
- }
- while (len--) {
- adler += *buf++;
- sum2 += adler;
- }
- MOD(adler);
- MOD(sum2);
- }
-
- /* return recombined sums */
- return adler | (sum2 << 16);
+ unsigned long sum2;
+ unsigned n;
+
+ /* split Adler-32 into component sums */
+ sum2 = (adler >> 16) & 0xffff;
+ adler &= 0xffff;
+
+ /* in case user likes doing a byte at a time, keep it fast */
+ if (len == 1) {
+ adler += buf[0];
+ if (adler >= BASE)
+ adler -= BASE;
+ sum2 += adler;
+ if (sum2 >= BASE)
+ sum2 -= BASE;
+ return adler | (sum2 << 16);
+ }
+
+ /* initial Adler-32 value (deferred check for len == 1 speed) */
+ if (buf == Z_NULL)
+ return 1L;
+
+ /* in case short lengths are provided, keep it somewhat fast */
+ if (len < 16) {
+ while (len--) {
+ adler += *buf++;
+ sum2 += adler;
+ }
+ if (adler >= BASE)
+ adler -= BASE;
+ MOD28(sum2); /* only added so many BASE's */
+ return adler | (sum2 << 16);
+ }
+
+ /* do length NMAX blocks -- requires just one modulo operation */
+ while (len >= NMAX) {
+ len -= NMAX;
+ n = NMAX / 16; /* NMAX is divisible by 16 */
+ do {
+ DO16(buf); /* 16 sums unrolled */
+ buf += 16;
+ } while (--n);
+ MOD(adler);
+ MOD(sum2);
+ }
+
+ /* do remaining bytes (less than NMAX, still just one modulo) */
+ if (len) { /* avoid modulos if none remaining */
+ while (len >= 16) {
+ len -= 16;
+ DO16(buf);
+ buf += 16;
+ }
+ while (len--) {
+ adler += *buf++;
+ sum2 += adler;
+ }
+ MOD(adler);
+ MOD(sum2);
+ }
+
+ /* return recombined sums */
+ return adler | (sum2 << 16);
}
/* ========================================================================= */
local uLong adler32_combine_(adler1, adler2, len2)
- uLong adler1;
- uLong adler2;
- z_off64_t len2;
+ uLong adler1;
+ uLong adler2;
+ z_off64_t len2;
{
- unsigned long sum1;
- unsigned long sum2;
- unsigned rem;
-
- /* for negative len, return invalid adler32 as a clue for debugging */
- if (len2 < 0)
- return 0xffffffffUL;
-
- /* the derivation of this formula is left as an exercise for the reader */
- MOD63(len2); /* assumes len2 >= 0 */
- rem = (unsigned)len2;
- sum1 = adler1 & 0xffff;
- sum2 = rem * sum1;
- MOD(sum2);
- sum1 += (adler2 & 0xffff) + BASE - 1;
- sum2 += ((adler1 >> 16) & 0xffff) + ((adler2 >> 16) & 0xffff) + BASE - rem;
- if (sum1 >= BASE) sum1 -= BASE;
- if (sum1 >= BASE) sum1 -= BASE;
- if (sum2 >= (BASE << 1)) sum2 -= (BASE << 1);
- if (sum2 >= BASE) sum2 -= BASE;
- return sum1 | (sum2 << 16);
+ unsigned long sum1;
+ unsigned long sum2;
+ unsigned rem;
+
+ /* for negative len, return invalid adler32 as a clue for debugging */
+ if (len2 < 0)
+ return 0xffffffffUL;
+
+ /* the derivation of this formula is left as an exercise for the reader */
+ MOD63(len2); /* assumes len2 >= 0 */
+ rem = (unsigned)len2;
+ sum1 = adler1 & 0xffff;
+ sum2 = rem * sum1;
+ MOD(sum2);
+ sum1 += (adler2 & 0xffff) + BASE - 1;
+ sum2 += ((adler1 >> 16) & 0xffff) + ((adler2 >> 16) & 0xffff) + BASE - rem;
+ if (sum1 >= BASE) sum1 -= BASE;
+ if (sum1 >= BASE) sum1 -= BASE;
+ if (sum2 >= (BASE << 1)) sum2 -= (BASE << 1);
+ if (sum2 >= BASE) sum2 -= BASE;
+ return sum1 | (sum2 << 16);
}
/* ========================================================================= */
uLong ZEXPORT adler32_combine(adler1, adler2, len2)
- uLong adler1;
- uLong adler2;
- z_off_t len2;
+ uLong adler1;
+ uLong adler2;
+ z_off_t len2;
{
- return adler32_combine_(adler1, adler2, len2);
+ return adler32_combine_(adler1, adler2, len2);
}
#ifdef Z_LARGE64
uLong ZEXPORT adler32_combine64(adler1, adler2, len2)
- uLong adler1;
- uLong adler2;
- z_off64_t len2;
+ uLong adler1;
+ uLong adler2;
+ z_off64_t len2;
{
- return adler32_combine_(adler1, adler2, len2);
+ return adler32_combine_(adler1, adler2, len2);
}
#endif
diff --git a/src/lib/zlib/compress.c b/src/lib/zlib/compress.c
index ea4dfbe9d7b..213b5d2444f 100644
--- a/src/lib/zlib/compress.c
+++ b/src/lib/zlib/compress.c
@@ -20,52 +20,52 @@
Z_STREAM_ERROR if the level parameter is invalid.
*/
int ZEXPORT compress2 (dest, destLen, source, sourceLen, level)
- Bytef *dest;
- uLongf *destLen;
- const Bytef *source;
- uLong sourceLen;
- int level;
+ Bytef *dest;
+ uLongf *destLen;
+ const Bytef *source;
+ uLong sourceLen;
+ int level;
{
- z_stream stream;
- int err;
+ z_stream stream;
+ int err;
- stream.next_in = (Bytef*)source;
- stream.avail_in = (uInt)sourceLen;
+ stream.next_in = (Bytef*)source;
+ stream.avail_in = (uInt)sourceLen;
#ifdef MAXSEG_64K
- /* Check for source > 64K on 16-bit machine: */
- if ((uLong)stream.avail_in != sourceLen) return Z_BUF_ERROR;
+ /* Check for source > 64K on 16-bit machine: */
+ if ((uLong)stream.avail_in != sourceLen) return Z_BUF_ERROR;
#endif
- stream.next_out = dest;
- stream.avail_out = (uInt)*destLen;
- if ((uLong)stream.avail_out != *destLen) return Z_BUF_ERROR;
+ stream.next_out = dest;
+ stream.avail_out = (uInt)*destLen;
+ if ((uLong)stream.avail_out != *destLen) return Z_BUF_ERROR;
- stream.zalloc = (alloc_func)0;
- stream.zfree = (free_func)0;
- stream.opaque = (voidpf)0;
+ stream.zalloc = (alloc_func)0;
+ stream.zfree = (free_func)0;
+ stream.opaque = (voidpf)0;
- err = deflateInit(&stream, level);
- if (err != Z_OK) return err;
+ err = deflateInit(&stream, level);
+ if (err != Z_OK) return err;
- err = deflate(&stream, Z_FINISH);
- if (err != Z_STREAM_END) {
- deflateEnd(&stream);
- return err == Z_OK ? Z_BUF_ERROR : err;
- }
- *destLen = stream.total_out;
+ err = deflate(&stream, Z_FINISH);
+ if (err != Z_STREAM_END) {
+ deflateEnd(&stream);
+ return err == Z_OK ? Z_BUF_ERROR : err;
+ }
+ *destLen = stream.total_out;
- err = deflateEnd(&stream);
- return err;
+ err = deflateEnd(&stream);
+ return err;
}
/* ===========================================================================
*/
int ZEXPORT compress (dest, destLen, source, sourceLen)
- Bytef *dest;
- uLongf *destLen;
- const Bytef *source;
- uLong sourceLen;
+ Bytef *dest;
+ uLongf *destLen;
+ const Bytef *source;
+ uLong sourceLen;
{
- return compress2(dest, destLen, source, sourceLen, Z_DEFAULT_COMPRESSION);
+ return compress2(dest, destLen, source, sourceLen, Z_DEFAULT_COMPRESSION);
}
/* ===========================================================================
@@ -73,8 +73,8 @@ int ZEXPORT compress (dest, destLen, source, sourceLen)
this function needs to be updated.
*/
uLong ZEXPORT compressBound (sourceLen)
- uLong sourceLen;
+ uLong sourceLen;
{
- return sourceLen + (sourceLen >> 12) + (sourceLen >> 14) +
- (sourceLen >> 25) + 13;
+ return sourceLen + (sourceLen >> 12) + (sourceLen >> 14) +
+ (sourceLen >> 25) + 13;
}
diff --git a/src/lib/zlib/crc32.c b/src/lib/zlib/crc32.c
index 988ac6d4180..b6b09915adf 100644
--- a/src/lib/zlib/crc32.c
+++ b/src/lib/zlib/crc32.c
@@ -37,10 +37,10 @@
# define BYFOUR
#endif
#ifdef BYFOUR
- local unsigned long crc32_little OF((unsigned long,
- const unsigned char FAR *, unsigned));
- local unsigned long crc32_big OF((unsigned long,
- const unsigned char FAR *, unsigned));
+ local unsigned long crc32_little OF((unsigned long,
+ const unsigned char FAR *, unsigned));
+ local unsigned long crc32_big OF((unsigned long,
+ const unsigned char FAR *, unsigned));
# define TBLS 8
#else
# define TBLS 1
@@ -48,7 +48,7 @@
/* Local functions for crc concatenation */
local unsigned long gf2_matrix_times OF((unsigned long *mat,
- unsigned long vec));
+ unsigned long vec));
local void gf2_matrix_square OF((unsigned long *square, unsigned long *mat));
local uLong crc32_combine_ OF((uLong crc1, uLong crc2, z_off64_t len2));
@@ -59,7 +59,7 @@ local volatile int crc_table_empty = 1;
local z_crc_t FAR crc_table[TBLS][256];
local void make_crc_table OF((void));
#ifdef MAKECRCH
- local void write_table OF((FILE *, const z_crc_t FAR *));
+ local void write_table OF((FILE *, const z_crc_t FAR *));
#endif /* MAKECRCH */
/*
Generate tables for a byte-wise 32-bit CRC calculation on the polynomial:
@@ -89,91 +89,91 @@ local void make_crc_table OF((void));
*/
local void make_crc_table()
{
- z_crc_t c;
- int n, k;
- z_crc_t poly; /* polynomial exclusive-or pattern */
- /* terms of polynomial defining this crc (except x^32): */
- static volatile int first = 1; /* flag to limit concurrent making */
- static const unsigned char p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26};
-
- /* See if another task is already doing this (not thread-safe, but better
- than nothing -- significantly reduces duration of vulnerability in
- case the advice about DYNAMIC_CRC_TABLE is ignored) */
- if (first) {
- first = 0;
-
- /* make exclusive-or pattern from polynomial (0xedb88320UL) */
- poly = 0;
- for (n = 0; n < (int)(sizeof(p)/sizeof(unsigned char)); n++)
- poly |= (z_crc_t)1 << (31 - p[n]);
-
- /* generate a crc for every 8-bit value */
- for (n = 0; n < 256; n++) {
- c = (z_crc_t)n;
- for (k = 0; k < 8; k++)
- c = c & 1 ? poly ^ (c >> 1) : c >> 1;
- crc_table[0][n] = c;
- }
+ z_crc_t c;
+ int n, k;
+ z_crc_t poly; /* polynomial exclusive-or pattern */
+ /* terms of polynomial defining this crc (except x^32): */
+ static volatile int first = 1; /* flag to limit concurrent making */
+ static const unsigned char p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26};
+
+ /* See if another task is already doing this (not thread-safe, but better
+ than nothing -- significantly reduces duration of vulnerability in
+ case the advice about DYNAMIC_CRC_TABLE is ignored) */
+ if (first) {
+ first = 0;
+
+ /* make exclusive-or pattern from polynomial (0xedb88320UL) */
+ poly = 0;
+ for (n = 0; n < (int)(sizeof(p)/sizeof(unsigned char)); n++)
+ poly |= (z_crc_t)1 << (31 - p[n]);
+
+ /* generate a crc for every 8-bit value */
+ for (n = 0; n < 256; n++) {
+ c = (z_crc_t)n;
+ for (k = 0; k < 8; k++)
+ c = c & 1 ? poly ^ (c >> 1) : c >> 1;
+ crc_table[0][n] = c;
+ }
#ifdef BYFOUR
- /* generate crc for each value followed by one, two, and three zeros,
- and then the byte reversal of those as well as the first table */
- for (n = 0; n < 256; n++) {
- c = crc_table[0][n];
- crc_table[4][n] = ZSWAP32(c);
- for (k = 1; k < 4; k++) {
- c = crc_table[0][c & 0xff] ^ (c >> 8);
- crc_table[k][n] = c;
- crc_table[k + 4][n] = ZSWAP32(c);
- }
- }
+ /* generate crc for each value followed by one, two, and three zeros,
+ and then the byte reversal of those as well as the first table */
+ for (n = 0; n < 256; n++) {
+ c = crc_table[0][n];
+ crc_table[4][n] = ZSWAP32(c);
+ for (k = 1; k < 4; k++) {
+ c = crc_table[0][c & 0xff] ^ (c >> 8);
+ crc_table[k][n] = c;
+ crc_table[k + 4][n] = ZSWAP32(c);
+ }
+ }
#endif /* BYFOUR */
- crc_table_empty = 0;
- }
- else { /* not first */
- /* wait for the other guy to finish (not efficient, but rare) */
- while (crc_table_empty)
- ;
- }
+ crc_table_empty = 0;
+ }
+ else { /* not first */
+ /* wait for the other guy to finish (not efficient, but rare) */
+ while (crc_table_empty)
+ ;
+ }
#ifdef MAKECRCH
- /* write out CRC tables to crc32.h */
- {
- FILE *out;
-
- out = fopen("crc32.h", "w");
- if (out == NULL) return;
- fprintf(out, "/* crc32.h -- tables for rapid CRC calculation\n");
- fprintf(out, " * Generated automatically by crc32.c\n */\n\n");
- fprintf(out, "local const z_crc_t FAR ");
- fprintf(out, "crc_table[TBLS][256] =\n{\n {\n");
- write_table(out, crc_table[0]);
+ /* write out CRC tables to crc32.h */
+ {
+ FILE *out;
+
+ out = fopen("crc32.h", "w");
+ if (out == NULL) return;
+ fprintf(out, "/* crc32.h -- tables for rapid CRC calculation\n");
+ fprintf(out, " * Generated automatically by crc32.c\n */\n\n");
+ fprintf(out, "local const z_crc_t FAR ");
+ fprintf(out, "crc_table[TBLS][256] =\n{\n {\n");
+ write_table(out, crc_table[0]);
# ifdef BYFOUR
- fprintf(out, "#ifdef BYFOUR\n");
- for (k = 1; k < 8; k++) {
- fprintf(out, " },\n {\n");
- write_table(out, crc_table[k]);
- }
- fprintf(out, "#endif\n");
+ fprintf(out, "#ifdef BYFOUR\n");
+ for (k = 1; k < 8; k++) {
+ fprintf(out, " },\n {\n");
+ write_table(out, crc_table[k]);
+ }
+ fprintf(out, "#endif\n");
# endif /* BYFOUR */
- fprintf(out, " }\n};\n");
- fclose(out);
- }
+ fprintf(out, " }\n};\n");
+ fclose(out);
+ }
#endif /* MAKECRCH */
}
#ifdef MAKECRCH
local void write_table(out, table)
- FILE *out;
- const z_crc_t FAR *table;
+ FILE *out;
+ const z_crc_t FAR *table;
{
- int n;
+ int n;
- for (n = 0; n < 256; n++)
- fprintf(out, "%s0x%08lxUL%s", n % 5 ? "" : " ",
- (unsigned long)(table[n]),
- n == 255 ? "\n" : (n % 5 == 4 ? ",\n" : ", "));
+ for (n = 0; n < 256; n++)
+ fprintf(out, "%s0x%08lxUL%s", n % 5 ? "" : " ",
+ (unsigned long)(table[n]),
+ n == 255 ? "\n" : (n % 5 == 4 ? ",\n" : ", "));
}
#endif /* MAKECRCH */
@@ -190,10 +190,10 @@ local void write_table(out, table)
const z_crc_t FAR * ZEXPORT get_crc_table()
{
#ifdef DYNAMIC_CRC_TABLE
- if (crc_table_empty)
- make_crc_table();
+ if (crc_table_empty)
+ make_crc_table();
#endif /* DYNAMIC_CRC_TABLE */
- return (const z_crc_t FAR *)crc_table;
+ return (const z_crc_t FAR *)crc_table;
}
/* ========================================================================= */
@@ -202,121 +202,121 @@ const z_crc_t FAR * ZEXPORT get_crc_table()
/* ========================================================================= */
unsigned long ZEXPORT crc32(crc, buf, len)
- unsigned long crc;
- const unsigned char FAR *buf;
- uInt len;
+ unsigned long crc;
+ const unsigned char FAR *buf;
+ uInt len;
{
- if (buf == Z_NULL) return 0UL;
+ if (buf == Z_NULL) return 0UL;
#ifdef DYNAMIC_CRC_TABLE
- if (crc_table_empty)
- make_crc_table();
+ if (crc_table_empty)
+ make_crc_table();
#endif /* DYNAMIC_CRC_TABLE */
#ifdef BYFOUR
- if (sizeof(void *) == sizeof(ptrdiff_t)) {
- z_crc_t endian;
-
- endian = 1;
- if (*((unsigned char *)(&endian)))
- return crc32_little(crc, buf, len);
- else
- return crc32_big(crc, buf, len);
- }
+ if (sizeof(void *) == sizeof(ptrdiff_t)) {
+ z_crc_t endian;
+
+ endian = 1;
+ if (*((unsigned char *)(&endian)))
+ return crc32_little(crc, buf, len);
+ else
+ return crc32_big(crc, buf, len);
+ }
#endif /* BYFOUR */
- crc = crc ^ 0xffffffffUL;
- while (len >= 8) {
- DO8;
- len -= 8;
- }
- if (len) do {
- DO1;
- } while (--len);
- return crc ^ 0xffffffffUL;
+ crc = crc ^ 0xffffffffUL;
+ while (len >= 8) {
+ DO8;
+ len -= 8;
+ }
+ if (len) do {
+ DO1;
+ } while (--len);
+ return crc ^ 0xffffffffUL;
}
#ifdef BYFOUR
/* ========================================================================= */
#define DOLIT4 c ^= *buf4++; \
- c = crc_table[3][c & 0xff] ^ crc_table[2][(c >> 8) & 0xff] ^ \
- crc_table[1][(c >> 16) & 0xff] ^ crc_table[0][c >> 24]
+ c = crc_table[3][c & 0xff] ^ crc_table[2][(c >> 8) & 0xff] ^ \
+ crc_table[1][(c >> 16) & 0xff] ^ crc_table[0][c >> 24]
#define DOLIT32 DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4; DOLIT4
/* ========================================================================= */
local unsigned long crc32_little(crc, buf, len)
- unsigned long crc;
- const unsigned char FAR *buf;
- unsigned len;
+ unsigned long crc;
+ const unsigned char FAR *buf;
+ unsigned len;
{
- register z_crc_t c;
- register const z_crc_t FAR *buf4;
-
- c = (z_crc_t)crc;
- c = ~c;
- while (len && ((ptrdiff_t)buf & 3)) {
- c = crc_table[0][(c ^ *buf++) & 0xff] ^ (c >> 8);
- len--;
- }
-
- buf4 = (const z_crc_t FAR *)(const void FAR *)buf;
- while (len >= 32) {
- DOLIT32;
- len -= 32;
- }
- while (len >= 4) {
- DOLIT4;
- len -= 4;
- }
- buf = (const unsigned char FAR *)buf4;
-
- if (len) do {
- c = crc_table[0][(c ^ *buf++) & 0xff] ^ (c >> 8);
- } while (--len);
- c = ~c;
- return (unsigned long)c;
+ register z_crc_t c;
+ register const z_crc_t FAR *buf4;
+
+ c = (z_crc_t)crc;
+ c = ~c;
+ while (len && ((ptrdiff_t)buf & 3)) {
+ c = crc_table[0][(c ^ *buf++) & 0xff] ^ (c >> 8);
+ len--;
+ }
+
+ buf4 = (const z_crc_t FAR *)(const void FAR *)buf;
+ while (len >= 32) {
+ DOLIT32;
+ len -= 32;
+ }
+ while (len >= 4) {
+ DOLIT4;
+ len -= 4;
+ }
+ buf = (const unsigned char FAR *)buf4;
+
+ if (len) do {
+ c = crc_table[0][(c ^ *buf++) & 0xff] ^ (c >> 8);
+ } while (--len);
+ c = ~c;
+ return (unsigned long)c;
}
/* ========================================================================= */
#define DOBIG4 c ^= *++buf4; \
- c = crc_table[4][c & 0xff] ^ crc_table[5][(c >> 8) & 0xff] ^ \
- crc_table[6][(c >> 16) & 0xff] ^ crc_table[7][c >> 24]
+ c = crc_table[4][c & 0xff] ^ crc_table[5][(c >> 8) & 0xff] ^ \
+ crc_table[6][(c >> 16) & 0xff] ^ crc_table[7][c >> 24]
#define DOBIG32 DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4; DOBIG4
/* ========================================================================= */
local unsigned long crc32_big(crc, buf, len)
- unsigned long crc;
- const unsigned char FAR *buf;
- unsigned len;
+ unsigned long crc;
+ const unsigned char FAR *buf;
+ unsigned len;
{
- register z_crc_t c;
- register const z_crc_t FAR *buf4;
-
- c = ZSWAP32((z_crc_t)crc);
- c = ~c;
- while (len && ((ptrdiff_t)buf & 3)) {
- c = crc_table[4][(c >> 24) ^ *buf++] ^ (c << 8);
- len--;
- }
-
- buf4 = (const z_crc_t FAR *)(const void FAR *)buf;
- buf4--;
- while (len >= 32) {
- DOBIG32;
- len -= 32;
- }
- while (len >= 4) {
- DOBIG4;
- len -= 4;
- }
- buf4++;
- buf = (const unsigned char FAR *)buf4;
-
- if (len) do {
- c = crc_table[4][(c >> 24) ^ *buf++] ^ (c << 8);
- } while (--len);
- c = ~c;
- return (unsigned long)(ZSWAP32(c));
+ register z_crc_t c;
+ register const z_crc_t FAR *buf4;
+
+ c = ZSWAP32((z_crc_t)crc);
+ c = ~c;
+ while (len && ((ptrdiff_t)buf & 3)) {
+ c = crc_table[4][(c >> 24) ^ *buf++] ^ (c << 8);
+ len--;
+ }
+
+ buf4 = (const z_crc_t FAR *)(const void FAR *)buf;
+ buf4--;
+ while (len >= 32) {
+ DOBIG32;
+ len -= 32;
+ }
+ while (len >= 4) {
+ DOBIG4;
+ len -= 4;
+ }
+ buf4++;
+ buf = (const unsigned char FAR *)buf4;
+
+ if (len) do {
+ c = crc_table[4][(c >> 24) ^ *buf++] ^ (c << 8);
+ } while (--len);
+ c = ~c;
+ return (unsigned long)(ZSWAP32(c));
}
#endif /* BYFOUR */
@@ -325,105 +325,105 @@ local unsigned long crc32_big(crc, buf, len)
/* ========================================================================= */
local unsigned long gf2_matrix_times(mat, vec)
- unsigned long *mat;
- unsigned long vec;
+ unsigned long *mat;
+ unsigned long vec;
{
- unsigned long sum;
-
- sum = 0;
- while (vec) {
- if (vec & 1)
- sum ^= *mat;
- vec >>= 1;
- mat++;
- }
- return sum;
+ unsigned long sum;
+
+ sum = 0;
+ while (vec) {
+ if (vec & 1)
+ sum ^= *mat;
+ vec >>= 1;
+ mat++;
+ }
+ return sum;
}
/* ========================================================================= */
local void gf2_matrix_square(square, mat)
- unsigned long *square;
- unsigned long *mat;
+ unsigned long *square;
+ unsigned long *mat;
{
- int n;
+ int n;
- for (n = 0; n < GF2_DIM; n++)
- square[n] = gf2_matrix_times(mat, mat[n]);
+ for (n = 0; n < GF2_DIM; n++)
+ square[n] = gf2_matrix_times(mat, mat[n]);
}
/* ========================================================================= */
local uLong crc32_combine_(crc1, crc2, len2)
- uLong crc1;
- uLong crc2;
- z_off64_t len2;
+ uLong crc1;
+ uLong crc2;
+ z_off64_t len2;
{
- int n;
- unsigned long row;
- unsigned long even[GF2_DIM]; /* even-power-of-two zeros operator */
- unsigned long odd[GF2_DIM]; /* odd-power-of-two zeros operator */
-
- /* degenerate case (also disallow negative lengths) */
- if (len2 <= 0)
- return crc1;
-
- /* put operator for one zero bit in odd */
- odd[0] = 0xedb88320UL; /* CRC-32 polynomial */
- row = 1;
- for (n = 1; n < GF2_DIM; n++) {
- odd[n] = row;
- row <<= 1;
- }
-
- /* put operator for two zero bits in even */
- gf2_matrix_square(even, odd);
-
- /* put operator for four zero bits in odd */
- gf2_matrix_square(odd, even);
-
- /* apply len2 zeros to crc1 (first square will put the operator for one
- zero byte, eight zero bits, in even) */
- do {
- /* apply zeros operator for this bit of len2 */
- gf2_matrix_square(even, odd);
- if (len2 & 1)
- crc1 = gf2_matrix_times(even, crc1);
- len2 >>= 1;
-
- /* if no more bits set, then done */
- if (len2 == 0)
- break;
-
- /* another iteration of the loop with odd and even swapped */
- gf2_matrix_square(odd, even);
- if (len2 & 1)
- crc1 = gf2_matrix_times(odd, crc1);
- len2 >>= 1;
-
- /* if no more bits set, then done */
- } while (len2 != 0);
-
- /* return combined crc */
- crc1 ^= crc2;
- return crc1;
+ int n;
+ unsigned long row;
+ unsigned long even[GF2_DIM]; /* even-power-of-two zeros operator */
+ unsigned long odd[GF2_DIM]; /* odd-power-of-two zeros operator */
+
+ /* degenerate case (also disallow negative lengths) */
+ if (len2 <= 0)
+ return crc1;
+
+ /* put operator for one zero bit in odd */
+ odd[0] = 0xedb88320UL; /* CRC-32 polynomial */
+ row = 1;
+ for (n = 1; n < GF2_DIM; n++) {
+ odd[n] = row;
+ row <<= 1;
+ }
+
+ /* put operator for two zero bits in even */
+ gf2_matrix_square(even, odd);
+
+ /* put operator for four zero bits in odd */
+ gf2_matrix_square(odd, even);
+
+ /* apply len2 zeros to crc1 (first square will put the operator for one
+ zero byte, eight zero bits, in even) */
+ do {
+ /* apply zeros operator for this bit of len2 */
+ gf2_matrix_square(even, odd);
+ if (len2 & 1)
+ crc1 = gf2_matrix_times(even, crc1);
+ len2 >>= 1;
+
+ /* if no more bits set, then done */
+ if (len2 == 0)
+ break;
+
+ /* another iteration of the loop with odd and even swapped */
+ gf2_matrix_square(odd, even);
+ if (len2 & 1)
+ crc1 = gf2_matrix_times(odd, crc1);
+ len2 >>= 1;
+
+ /* if no more bits set, then done */
+ } while (len2 != 0);
+
+ /* return combined crc */
+ crc1 ^= crc2;
+ return crc1;
}
/* ========================================================================= */
uLong ZEXPORT crc32_combine(crc1, crc2, len2)
- uLong crc1;
- uLong crc2;
- z_off_t len2;
+ uLong crc1;
+ uLong crc2;
+ z_off_t len2;
{
- return crc32_combine_(crc1, crc2, len2);
+ return crc32_combine_(crc1, crc2, len2);
}
#ifdef Z_LARGE64
uLong ZEXPORT crc32_combine64(crc1, crc2, len2)
- uLong crc1;
- uLong crc2;
- z_off64_t len2;
+ uLong crc1;
+ uLong crc2;
+ z_off64_t len2;
{
- return crc32_combine_(crc1, crc2, len2);
+ return crc32_combine_(crc1, crc2, len2);
}
#endif
diff --git a/src/lib/zlib/crc32.h b/src/lib/zlib/crc32.h
index 9e0c7781025..0408f0be026 100644
--- a/src/lib/zlib/crc32.h
+++ b/src/lib/zlib/crc32.h
@@ -4,438 +4,438 @@
local const z_crc_t FAR crc_table[TBLS][256] =
{
- {
- 0x00000000UL, 0x77073096UL, 0xee0e612cUL, 0x990951baUL, 0x076dc419UL,
- 0x706af48fUL, 0xe963a535UL, 0x9e6495a3UL, 0x0edb8832UL, 0x79dcb8a4UL,
- 0xe0d5e91eUL, 0x97d2d988UL, 0x09b64c2bUL, 0x7eb17cbdUL, 0xe7b82d07UL,
- 0x90bf1d91UL, 0x1db71064UL, 0x6ab020f2UL, 0xf3b97148UL, 0x84be41deUL,
- 0x1adad47dUL, 0x6ddde4ebUL, 0xf4d4b551UL, 0x83d385c7UL, 0x136c9856UL,
- 0x646ba8c0UL, 0xfd62f97aUL, 0x8a65c9ecUL, 0x14015c4fUL, 0x63066cd9UL,
- 0xfa0f3d63UL, 0x8d080df5UL, 0x3b6e20c8UL, 0x4c69105eUL, 0xd56041e4UL,
- 0xa2677172UL, 0x3c03e4d1UL, 0x4b04d447UL, 0xd20d85fdUL, 0xa50ab56bUL,
- 0x35b5a8faUL, 0x42b2986cUL, 0xdbbbc9d6UL, 0xacbcf940UL, 0x32d86ce3UL,
- 0x45df5c75UL, 0xdcd60dcfUL, 0xabd13d59UL, 0x26d930acUL, 0x51de003aUL,
- 0xc8d75180UL, 0xbfd06116UL, 0x21b4f4b5UL, 0x56b3c423UL, 0xcfba9599UL,
- 0xb8bda50fUL, 0x2802b89eUL, 0x5f058808UL, 0xc60cd9b2UL, 0xb10be924UL,
- 0x2f6f7c87UL, 0x58684c11UL, 0xc1611dabUL, 0xb6662d3dUL, 0x76dc4190UL,
- 0x01db7106UL, 0x98d220bcUL, 0xefd5102aUL, 0x71b18589UL, 0x06b6b51fUL,
- 0x9fbfe4a5UL, 0xe8b8d433UL, 0x7807c9a2UL, 0x0f00f934UL, 0x9609a88eUL,
- 0xe10e9818UL, 0x7f6a0dbbUL, 0x086d3d2dUL, 0x91646c97UL, 0xe6635c01UL,
- 0x6b6b51f4UL, 0x1c6c6162UL, 0x856530d8UL, 0xf262004eUL, 0x6c0695edUL,
- 0x1b01a57bUL, 0x8208f4c1UL, 0xf50fc457UL, 0x65b0d9c6UL, 0x12b7e950UL,
- 0x8bbeb8eaUL, 0xfcb9887cUL, 0x62dd1ddfUL, 0x15da2d49UL, 0x8cd37cf3UL,
- 0xfbd44c65UL, 0x4db26158UL, 0x3ab551ceUL, 0xa3bc0074UL, 0xd4bb30e2UL,
- 0x4adfa541UL, 0x3dd895d7UL, 0xa4d1c46dUL, 0xd3d6f4fbUL, 0x4369e96aUL,
- 0x346ed9fcUL, 0xad678846UL, 0xda60b8d0UL, 0x44042d73UL, 0x33031de5UL,
- 0xaa0a4c5fUL, 0xdd0d7cc9UL, 0x5005713cUL, 0x270241aaUL, 0xbe0b1010UL,
- 0xc90c2086UL, 0x5768b525UL, 0x206f85b3UL, 0xb966d409UL, 0xce61e49fUL,
- 0x5edef90eUL, 0x29d9c998UL, 0xb0d09822UL, 0xc7d7a8b4UL, 0x59b33d17UL,
- 0x2eb40d81UL, 0xb7bd5c3bUL, 0xc0ba6cadUL, 0xedb88320UL, 0x9abfb3b6UL,
- 0x03b6e20cUL, 0x74b1d29aUL, 0xead54739UL, 0x9dd277afUL, 0x04db2615UL,
- 0x73dc1683UL, 0xe3630b12UL, 0x94643b84UL, 0x0d6d6a3eUL, 0x7a6a5aa8UL,
- 0xe40ecf0bUL, 0x9309ff9dUL, 0x0a00ae27UL, 0x7d079eb1UL, 0xf00f9344UL,
- 0x8708a3d2UL, 0x1e01f268UL, 0x6906c2feUL, 0xf762575dUL, 0x806567cbUL,
- 0x196c3671UL, 0x6e6b06e7UL, 0xfed41b76UL, 0x89d32be0UL, 0x10da7a5aUL,
- 0x67dd4accUL, 0xf9b9df6fUL, 0x8ebeeff9UL, 0x17b7be43UL, 0x60b08ed5UL,
- 0xd6d6a3e8UL, 0xa1d1937eUL, 0x38d8c2c4UL, 0x4fdff252UL, 0xd1bb67f1UL,
- 0xa6bc5767UL, 0x3fb506ddUL, 0x48b2364bUL, 0xd80d2bdaUL, 0xaf0a1b4cUL,
- 0x36034af6UL, 0x41047a60UL, 0xdf60efc3UL, 0xa867df55UL, 0x316e8eefUL,
- 0x4669be79UL, 0xcb61b38cUL, 0xbc66831aUL, 0x256fd2a0UL, 0x5268e236UL,
- 0xcc0c7795UL, 0xbb0b4703UL, 0x220216b9UL, 0x5505262fUL, 0xc5ba3bbeUL,
- 0xb2bd0b28UL, 0x2bb45a92UL, 0x5cb36a04UL, 0xc2d7ffa7UL, 0xb5d0cf31UL,
- 0x2cd99e8bUL, 0x5bdeae1dUL, 0x9b64c2b0UL, 0xec63f226UL, 0x756aa39cUL,
- 0x026d930aUL, 0x9c0906a9UL, 0xeb0e363fUL, 0x72076785UL, 0x05005713UL,
- 0x95bf4a82UL, 0xe2b87a14UL, 0x7bb12baeUL, 0x0cb61b38UL, 0x92d28e9bUL,
- 0xe5d5be0dUL, 0x7cdcefb7UL, 0x0bdbdf21UL, 0x86d3d2d4UL, 0xf1d4e242UL,
- 0x68ddb3f8UL, 0x1fda836eUL, 0x81be16cdUL, 0xf6b9265bUL, 0x6fb077e1UL,
- 0x18b74777UL, 0x88085ae6UL, 0xff0f6a70UL, 0x66063bcaUL, 0x11010b5cUL,
- 0x8f659effUL, 0xf862ae69UL, 0x616bffd3UL, 0x166ccf45UL, 0xa00ae278UL,
- 0xd70dd2eeUL, 0x4e048354UL, 0x3903b3c2UL, 0xa7672661UL, 0xd06016f7UL,
- 0x4969474dUL, 0x3e6e77dbUL, 0xaed16a4aUL, 0xd9d65adcUL, 0x40df0b66UL,
- 0x37d83bf0UL, 0xa9bcae53UL, 0xdebb9ec5UL, 0x47b2cf7fUL, 0x30b5ffe9UL,
- 0xbdbdf21cUL, 0xcabac28aUL, 0x53b39330UL, 0x24b4a3a6UL, 0xbad03605UL,
- 0xcdd70693UL, 0x54de5729UL, 0x23d967bfUL, 0xb3667a2eUL, 0xc4614ab8UL,
- 0x5d681b02UL, 0x2a6f2b94UL, 0xb40bbe37UL, 0xc30c8ea1UL, 0x5a05df1bUL,
- 0x2d02ef8dUL
+ {
+ 0x00000000UL, 0x77073096UL, 0xee0e612cUL, 0x990951baUL, 0x076dc419UL,
+ 0x706af48fUL, 0xe963a535UL, 0x9e6495a3UL, 0x0edb8832UL, 0x79dcb8a4UL,
+ 0xe0d5e91eUL, 0x97d2d988UL, 0x09b64c2bUL, 0x7eb17cbdUL, 0xe7b82d07UL,
+ 0x90bf1d91UL, 0x1db71064UL, 0x6ab020f2UL, 0xf3b97148UL, 0x84be41deUL,
+ 0x1adad47dUL, 0x6ddde4ebUL, 0xf4d4b551UL, 0x83d385c7UL, 0x136c9856UL,
+ 0x646ba8c0UL, 0xfd62f97aUL, 0x8a65c9ecUL, 0x14015c4fUL, 0x63066cd9UL,
+ 0xfa0f3d63UL, 0x8d080df5UL, 0x3b6e20c8UL, 0x4c69105eUL, 0xd56041e4UL,
+ 0xa2677172UL, 0x3c03e4d1UL, 0x4b04d447UL, 0xd20d85fdUL, 0xa50ab56bUL,
+ 0x35b5a8faUL, 0x42b2986cUL, 0xdbbbc9d6UL, 0xacbcf940UL, 0x32d86ce3UL,
+ 0x45df5c75UL, 0xdcd60dcfUL, 0xabd13d59UL, 0x26d930acUL, 0x51de003aUL,
+ 0xc8d75180UL, 0xbfd06116UL, 0x21b4f4b5UL, 0x56b3c423UL, 0xcfba9599UL,
+ 0xb8bda50fUL, 0x2802b89eUL, 0x5f058808UL, 0xc60cd9b2UL, 0xb10be924UL,
+ 0x2f6f7c87UL, 0x58684c11UL, 0xc1611dabUL, 0xb6662d3dUL, 0x76dc4190UL,
+ 0x01db7106UL, 0x98d220bcUL, 0xefd5102aUL, 0x71b18589UL, 0x06b6b51fUL,
+ 0x9fbfe4a5UL, 0xe8b8d433UL, 0x7807c9a2UL, 0x0f00f934UL, 0x9609a88eUL,
+ 0xe10e9818UL, 0x7f6a0dbbUL, 0x086d3d2dUL, 0x91646c97UL, 0xe6635c01UL,
+ 0x6b6b51f4UL, 0x1c6c6162UL, 0x856530d8UL, 0xf262004eUL, 0x6c0695edUL,
+ 0x1b01a57bUL, 0x8208f4c1UL, 0xf50fc457UL, 0x65b0d9c6UL, 0x12b7e950UL,
+ 0x8bbeb8eaUL, 0xfcb9887cUL, 0x62dd1ddfUL, 0x15da2d49UL, 0x8cd37cf3UL,
+ 0xfbd44c65UL, 0x4db26158UL, 0x3ab551ceUL, 0xa3bc0074UL, 0xd4bb30e2UL,
+ 0x4adfa541UL, 0x3dd895d7UL, 0xa4d1c46dUL, 0xd3d6f4fbUL, 0x4369e96aUL,
+ 0x346ed9fcUL, 0xad678846UL, 0xda60b8d0UL, 0x44042d73UL, 0x33031de5UL,
+ 0xaa0a4c5fUL, 0xdd0d7cc9UL, 0x5005713cUL, 0x270241aaUL, 0xbe0b1010UL,
+ 0xc90c2086UL, 0x5768b525UL, 0x206f85b3UL, 0xb966d409UL, 0xce61e49fUL,
+ 0x5edef90eUL, 0x29d9c998UL, 0xb0d09822UL, 0xc7d7a8b4UL, 0x59b33d17UL,
+ 0x2eb40d81UL, 0xb7bd5c3bUL, 0xc0ba6cadUL, 0xedb88320UL, 0x9abfb3b6UL,
+ 0x03b6e20cUL, 0x74b1d29aUL, 0xead54739UL, 0x9dd277afUL, 0x04db2615UL,
+ 0x73dc1683UL, 0xe3630b12UL, 0x94643b84UL, 0x0d6d6a3eUL, 0x7a6a5aa8UL,
+ 0xe40ecf0bUL, 0x9309ff9dUL, 0x0a00ae27UL, 0x7d079eb1UL, 0xf00f9344UL,
+ 0x8708a3d2UL, 0x1e01f268UL, 0x6906c2feUL, 0xf762575dUL, 0x806567cbUL,
+ 0x196c3671UL, 0x6e6b06e7UL, 0xfed41b76UL, 0x89d32be0UL, 0x10da7a5aUL,
+ 0x67dd4accUL, 0xf9b9df6fUL, 0x8ebeeff9UL, 0x17b7be43UL, 0x60b08ed5UL,
+ 0xd6d6a3e8UL, 0xa1d1937eUL, 0x38d8c2c4UL, 0x4fdff252UL, 0xd1bb67f1UL,
+ 0xa6bc5767UL, 0x3fb506ddUL, 0x48b2364bUL, 0xd80d2bdaUL, 0xaf0a1b4cUL,
+ 0x36034af6UL, 0x41047a60UL, 0xdf60efc3UL, 0xa867df55UL, 0x316e8eefUL,
+ 0x4669be79UL, 0xcb61b38cUL, 0xbc66831aUL, 0x256fd2a0UL, 0x5268e236UL,
+ 0xcc0c7795UL, 0xbb0b4703UL, 0x220216b9UL, 0x5505262fUL, 0xc5ba3bbeUL,
+ 0xb2bd0b28UL, 0x2bb45a92UL, 0x5cb36a04UL, 0xc2d7ffa7UL, 0xb5d0cf31UL,
+ 0x2cd99e8bUL, 0x5bdeae1dUL, 0x9b64c2b0UL, 0xec63f226UL, 0x756aa39cUL,
+ 0x026d930aUL, 0x9c0906a9UL, 0xeb0e363fUL, 0x72076785UL, 0x05005713UL,
+ 0x95bf4a82UL, 0xe2b87a14UL, 0x7bb12baeUL, 0x0cb61b38UL, 0x92d28e9bUL,
+ 0xe5d5be0dUL, 0x7cdcefb7UL, 0x0bdbdf21UL, 0x86d3d2d4UL, 0xf1d4e242UL,
+ 0x68ddb3f8UL, 0x1fda836eUL, 0x81be16cdUL, 0xf6b9265bUL, 0x6fb077e1UL,
+ 0x18b74777UL, 0x88085ae6UL, 0xff0f6a70UL, 0x66063bcaUL, 0x11010b5cUL,
+ 0x8f659effUL, 0xf862ae69UL, 0x616bffd3UL, 0x166ccf45UL, 0xa00ae278UL,
+ 0xd70dd2eeUL, 0x4e048354UL, 0x3903b3c2UL, 0xa7672661UL, 0xd06016f7UL,
+ 0x4969474dUL, 0x3e6e77dbUL, 0xaed16a4aUL, 0xd9d65adcUL, 0x40df0b66UL,
+ 0x37d83bf0UL, 0xa9bcae53UL, 0xdebb9ec5UL, 0x47b2cf7fUL, 0x30b5ffe9UL,
+ 0xbdbdf21cUL, 0xcabac28aUL, 0x53b39330UL, 0x24b4a3a6UL, 0xbad03605UL,
+ 0xcdd70693UL, 0x54de5729UL, 0x23d967bfUL, 0xb3667a2eUL, 0xc4614ab8UL,
+ 0x5d681b02UL, 0x2a6f2b94UL, 0xb40bbe37UL, 0xc30c8ea1UL, 0x5a05df1bUL,
+ 0x2d02ef8dUL
#ifdef BYFOUR
- },
- {
- 0x00000000UL, 0x191b3141UL, 0x32366282UL, 0x2b2d53c3UL, 0x646cc504UL,
- 0x7d77f445UL, 0x565aa786UL, 0x4f4196c7UL, 0xc8d98a08UL, 0xd1c2bb49UL,
- 0xfaefe88aUL, 0xe3f4d9cbUL, 0xacb54f0cUL, 0xb5ae7e4dUL, 0x9e832d8eUL,
- 0x87981ccfUL, 0x4ac21251UL, 0x53d92310UL, 0x78f470d3UL, 0x61ef4192UL,
- 0x2eaed755UL, 0x37b5e614UL, 0x1c98b5d7UL, 0x05838496UL, 0x821b9859UL,
- 0x9b00a918UL, 0xb02dfadbUL, 0xa936cb9aUL, 0xe6775d5dUL, 0xff6c6c1cUL,
- 0xd4413fdfUL, 0xcd5a0e9eUL, 0x958424a2UL, 0x8c9f15e3UL, 0xa7b24620UL,
- 0xbea97761UL, 0xf1e8e1a6UL, 0xe8f3d0e7UL, 0xc3de8324UL, 0xdac5b265UL,
- 0x5d5daeaaUL, 0x44469febUL, 0x6f6bcc28UL, 0x7670fd69UL, 0x39316baeUL,
- 0x202a5aefUL, 0x0b07092cUL, 0x121c386dUL, 0xdf4636f3UL, 0xc65d07b2UL,
- 0xed705471UL, 0xf46b6530UL, 0xbb2af3f7UL, 0xa231c2b6UL, 0x891c9175UL,
- 0x9007a034UL, 0x179fbcfbUL, 0x0e848dbaUL, 0x25a9de79UL, 0x3cb2ef38UL,
- 0x73f379ffUL, 0x6ae848beUL, 0x41c51b7dUL, 0x58de2a3cUL, 0xf0794f05UL,
- 0xe9627e44UL, 0xc24f2d87UL, 0xdb541cc6UL, 0x94158a01UL, 0x8d0ebb40UL,
- 0xa623e883UL, 0xbf38d9c2UL, 0x38a0c50dUL, 0x21bbf44cUL, 0x0a96a78fUL,
- 0x138d96ceUL, 0x5ccc0009UL, 0x45d73148UL, 0x6efa628bUL, 0x77e153caUL,
- 0xbabb5d54UL, 0xa3a06c15UL, 0x888d3fd6UL, 0x91960e97UL, 0xded79850UL,
- 0xc7cca911UL, 0xece1fad2UL, 0xf5facb93UL, 0x7262d75cUL, 0x6b79e61dUL,
- 0x4054b5deUL, 0x594f849fUL, 0x160e1258UL, 0x0f152319UL, 0x243870daUL,
- 0x3d23419bUL, 0x65fd6ba7UL, 0x7ce65ae6UL, 0x57cb0925UL, 0x4ed03864UL,
- 0x0191aea3UL, 0x188a9fe2UL, 0x33a7cc21UL, 0x2abcfd60UL, 0xad24e1afUL,
- 0xb43fd0eeUL, 0x9f12832dUL, 0x8609b26cUL, 0xc94824abUL, 0xd05315eaUL,
- 0xfb7e4629UL, 0xe2657768UL, 0x2f3f79f6UL, 0x362448b7UL, 0x1d091b74UL,
- 0x04122a35UL, 0x4b53bcf2UL, 0x52488db3UL, 0x7965de70UL, 0x607eef31UL,
- 0xe7e6f3feUL, 0xfefdc2bfUL, 0xd5d0917cUL, 0xcccba03dUL, 0x838a36faUL,
- 0x9a9107bbUL, 0xb1bc5478UL, 0xa8a76539UL, 0x3b83984bUL, 0x2298a90aUL,
- 0x09b5fac9UL, 0x10aecb88UL, 0x5fef5d4fUL, 0x46f46c0eUL, 0x6dd93fcdUL,
- 0x74c20e8cUL, 0xf35a1243UL, 0xea412302UL, 0xc16c70c1UL, 0xd8774180UL,
- 0x9736d747UL, 0x8e2de606UL, 0xa500b5c5UL, 0xbc1b8484UL, 0x71418a1aUL,
- 0x685abb5bUL, 0x4377e898UL, 0x5a6cd9d9UL, 0x152d4f1eUL, 0x0c367e5fUL,
- 0x271b2d9cUL, 0x3e001cddUL, 0xb9980012UL, 0xa0833153UL, 0x8bae6290UL,
- 0x92b553d1UL, 0xddf4c516UL, 0xc4eff457UL, 0xefc2a794UL, 0xf6d996d5UL,
- 0xae07bce9UL, 0xb71c8da8UL, 0x9c31de6bUL, 0x852aef2aUL, 0xca6b79edUL,
- 0xd37048acUL, 0xf85d1b6fUL, 0xe1462a2eUL, 0x66de36e1UL, 0x7fc507a0UL,
- 0x54e85463UL, 0x4df36522UL, 0x02b2f3e5UL, 0x1ba9c2a4UL, 0x30849167UL,
- 0x299fa026UL, 0xe4c5aeb8UL, 0xfdde9ff9UL, 0xd6f3cc3aUL, 0xcfe8fd7bUL,
- 0x80a96bbcUL, 0x99b25afdUL, 0xb29f093eUL, 0xab84387fUL, 0x2c1c24b0UL,
- 0x350715f1UL, 0x1e2a4632UL, 0x07317773UL, 0x4870e1b4UL, 0x516bd0f5UL,
- 0x7a468336UL, 0x635db277UL, 0xcbfad74eUL, 0xd2e1e60fUL, 0xf9ccb5ccUL,
- 0xe0d7848dUL, 0xaf96124aUL, 0xb68d230bUL, 0x9da070c8UL, 0x84bb4189UL,
- 0x03235d46UL, 0x1a386c07UL, 0x31153fc4UL, 0x280e0e85UL, 0x674f9842UL,
- 0x7e54a903UL, 0x5579fac0UL, 0x4c62cb81UL, 0x8138c51fUL, 0x9823f45eUL,
- 0xb30ea79dUL, 0xaa1596dcUL, 0xe554001bUL, 0xfc4f315aUL, 0xd7626299UL,
- 0xce7953d8UL, 0x49e14f17UL, 0x50fa7e56UL, 0x7bd72d95UL, 0x62cc1cd4UL,
- 0x2d8d8a13UL, 0x3496bb52UL, 0x1fbbe891UL, 0x06a0d9d0UL, 0x5e7ef3ecUL,
- 0x4765c2adUL, 0x6c48916eUL, 0x7553a02fUL, 0x3a1236e8UL, 0x230907a9UL,
- 0x0824546aUL, 0x113f652bUL, 0x96a779e4UL, 0x8fbc48a5UL, 0xa4911b66UL,
- 0xbd8a2a27UL, 0xf2cbbce0UL, 0xebd08da1UL, 0xc0fdde62UL, 0xd9e6ef23UL,
- 0x14bce1bdUL, 0x0da7d0fcUL, 0x268a833fUL, 0x3f91b27eUL, 0x70d024b9UL,
- 0x69cb15f8UL, 0x42e6463bUL, 0x5bfd777aUL, 0xdc656bb5UL, 0xc57e5af4UL,
- 0xee530937UL, 0xf7483876UL, 0xb809aeb1UL, 0xa1129ff0UL, 0x8a3fcc33UL,
- 0x9324fd72UL
- },
- {
- 0x00000000UL, 0x01c26a37UL, 0x0384d46eUL, 0x0246be59UL, 0x0709a8dcUL,
- 0x06cbc2ebUL, 0x048d7cb2UL, 0x054f1685UL, 0x0e1351b8UL, 0x0fd13b8fUL,
- 0x0d9785d6UL, 0x0c55efe1UL, 0x091af964UL, 0x08d89353UL, 0x0a9e2d0aUL,
- 0x0b5c473dUL, 0x1c26a370UL, 0x1de4c947UL, 0x1fa2771eUL, 0x1e601d29UL,
- 0x1b2f0bacUL, 0x1aed619bUL, 0x18abdfc2UL, 0x1969b5f5UL, 0x1235f2c8UL,
- 0x13f798ffUL, 0x11b126a6UL, 0x10734c91UL, 0x153c5a14UL, 0x14fe3023UL,
- 0x16b88e7aUL, 0x177ae44dUL, 0x384d46e0UL, 0x398f2cd7UL, 0x3bc9928eUL,
- 0x3a0bf8b9UL, 0x3f44ee3cUL, 0x3e86840bUL, 0x3cc03a52UL, 0x3d025065UL,
- 0x365e1758UL, 0x379c7d6fUL, 0x35dac336UL, 0x3418a901UL, 0x3157bf84UL,
- 0x3095d5b3UL, 0x32d36beaUL, 0x331101ddUL, 0x246be590UL, 0x25a98fa7UL,
- 0x27ef31feUL, 0x262d5bc9UL, 0x23624d4cUL, 0x22a0277bUL, 0x20e69922UL,
- 0x2124f315UL, 0x2a78b428UL, 0x2bbade1fUL, 0x29fc6046UL, 0x283e0a71UL,
- 0x2d711cf4UL, 0x2cb376c3UL, 0x2ef5c89aUL, 0x2f37a2adUL, 0x709a8dc0UL,
- 0x7158e7f7UL, 0x731e59aeUL, 0x72dc3399UL, 0x7793251cUL, 0x76514f2bUL,
- 0x7417f172UL, 0x75d59b45UL, 0x7e89dc78UL, 0x7f4bb64fUL, 0x7d0d0816UL,
- 0x7ccf6221UL, 0x798074a4UL, 0x78421e93UL, 0x7a04a0caUL, 0x7bc6cafdUL,
- 0x6cbc2eb0UL, 0x6d7e4487UL, 0x6f38fadeUL, 0x6efa90e9UL, 0x6bb5866cUL,
- 0x6a77ec5bUL, 0x68315202UL, 0x69f33835UL, 0x62af7f08UL, 0x636d153fUL,
- 0x612bab66UL, 0x60e9c151UL, 0x65a6d7d4UL, 0x6464bde3UL, 0x662203baUL,
- 0x67e0698dUL, 0x48d7cb20UL, 0x4915a117UL, 0x4b531f4eUL, 0x4a917579UL,
- 0x4fde63fcUL, 0x4e1c09cbUL, 0x4c5ab792UL, 0x4d98dda5UL, 0x46c49a98UL,
- 0x4706f0afUL, 0x45404ef6UL, 0x448224c1UL, 0x41cd3244UL, 0x400f5873UL,
- 0x4249e62aUL, 0x438b8c1dUL, 0x54f16850UL, 0x55330267UL, 0x5775bc3eUL,
- 0x56b7d609UL, 0x53f8c08cUL, 0x523aaabbUL, 0x507c14e2UL, 0x51be7ed5UL,
- 0x5ae239e8UL, 0x5b2053dfUL, 0x5966ed86UL, 0x58a487b1UL, 0x5deb9134UL,
- 0x5c29fb03UL, 0x5e6f455aUL, 0x5fad2f6dUL, 0xe1351b80UL, 0xe0f771b7UL,
- 0xe2b1cfeeUL, 0xe373a5d9UL, 0xe63cb35cUL, 0xe7fed96bUL, 0xe5b86732UL,
- 0xe47a0d05UL, 0xef264a38UL, 0xeee4200fUL, 0xeca29e56UL, 0xed60f461UL,
- 0xe82fe2e4UL, 0xe9ed88d3UL, 0xebab368aUL, 0xea695cbdUL, 0xfd13b8f0UL,
- 0xfcd1d2c7UL, 0xfe976c9eUL, 0xff5506a9UL, 0xfa1a102cUL, 0xfbd87a1bUL,
- 0xf99ec442UL, 0xf85cae75UL, 0xf300e948UL, 0xf2c2837fUL, 0xf0843d26UL,
- 0xf1465711UL, 0xf4094194UL, 0xf5cb2ba3UL, 0xf78d95faUL, 0xf64fffcdUL,
- 0xd9785d60UL, 0xd8ba3757UL, 0xdafc890eUL, 0xdb3ee339UL, 0xde71f5bcUL,
- 0xdfb39f8bUL, 0xddf521d2UL, 0xdc374be5UL, 0xd76b0cd8UL, 0xd6a966efUL,
- 0xd4efd8b6UL, 0xd52db281UL, 0xd062a404UL, 0xd1a0ce33UL, 0xd3e6706aUL,
- 0xd2241a5dUL, 0xc55efe10UL, 0xc49c9427UL, 0xc6da2a7eUL, 0xc7184049UL,
- 0xc25756ccUL, 0xc3953cfbUL, 0xc1d382a2UL, 0xc011e895UL, 0xcb4dafa8UL,
- 0xca8fc59fUL, 0xc8c97bc6UL, 0xc90b11f1UL, 0xcc440774UL, 0xcd866d43UL,
- 0xcfc0d31aUL, 0xce02b92dUL, 0x91af9640UL, 0x906dfc77UL, 0x922b422eUL,
- 0x93e92819UL, 0x96a63e9cUL, 0x976454abUL, 0x9522eaf2UL, 0x94e080c5UL,
- 0x9fbcc7f8UL, 0x9e7eadcfUL, 0x9c381396UL, 0x9dfa79a1UL, 0x98b56f24UL,
- 0x99770513UL, 0x9b31bb4aUL, 0x9af3d17dUL, 0x8d893530UL, 0x8c4b5f07UL,
- 0x8e0de15eUL, 0x8fcf8b69UL, 0x8a809decUL, 0x8b42f7dbUL, 0x89044982UL,
- 0x88c623b5UL, 0x839a6488UL, 0x82580ebfUL, 0x801eb0e6UL, 0x81dcdad1UL,
- 0x8493cc54UL, 0x8551a663UL, 0x8717183aUL, 0x86d5720dUL, 0xa9e2d0a0UL,
- 0xa820ba97UL, 0xaa6604ceUL, 0xaba46ef9UL, 0xaeeb787cUL, 0xaf29124bUL,
- 0xad6fac12UL, 0xacadc625UL, 0xa7f18118UL, 0xa633eb2fUL, 0xa4755576UL,
- 0xa5b73f41UL, 0xa0f829c4UL, 0xa13a43f3UL, 0xa37cfdaaUL, 0xa2be979dUL,
- 0xb5c473d0UL, 0xb40619e7UL, 0xb640a7beUL, 0xb782cd89UL, 0xb2cddb0cUL,
- 0xb30fb13bUL, 0xb1490f62UL, 0xb08b6555UL, 0xbbd72268UL, 0xba15485fUL,
- 0xb853f606UL, 0xb9919c31UL, 0xbcde8ab4UL, 0xbd1ce083UL, 0xbf5a5edaUL,
- 0xbe9834edUL
- },
- {
- 0x00000000UL, 0xb8bc6765UL, 0xaa09c88bUL, 0x12b5afeeUL, 0x8f629757UL,
- 0x37def032UL, 0x256b5fdcUL, 0x9dd738b9UL, 0xc5b428efUL, 0x7d084f8aUL,
- 0x6fbde064UL, 0xd7018701UL, 0x4ad6bfb8UL, 0xf26ad8ddUL, 0xe0df7733UL,
- 0x58631056UL, 0x5019579fUL, 0xe8a530faUL, 0xfa109f14UL, 0x42acf871UL,
- 0xdf7bc0c8UL, 0x67c7a7adUL, 0x75720843UL, 0xcdce6f26UL, 0x95ad7f70UL,
- 0x2d111815UL, 0x3fa4b7fbUL, 0x8718d09eUL, 0x1acfe827UL, 0xa2738f42UL,
- 0xb0c620acUL, 0x087a47c9UL, 0xa032af3eUL, 0x188ec85bUL, 0x0a3b67b5UL,
- 0xb28700d0UL, 0x2f503869UL, 0x97ec5f0cUL, 0x8559f0e2UL, 0x3de59787UL,
- 0x658687d1UL, 0xdd3ae0b4UL, 0xcf8f4f5aUL, 0x7733283fUL, 0xeae41086UL,
- 0x525877e3UL, 0x40edd80dUL, 0xf851bf68UL, 0xf02bf8a1UL, 0x48979fc4UL,
- 0x5a22302aUL, 0xe29e574fUL, 0x7f496ff6UL, 0xc7f50893UL, 0xd540a77dUL,
- 0x6dfcc018UL, 0x359fd04eUL, 0x8d23b72bUL, 0x9f9618c5UL, 0x272a7fa0UL,
- 0xbafd4719UL, 0x0241207cUL, 0x10f48f92UL, 0xa848e8f7UL, 0x9b14583dUL,
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- 0xbe7f07e1UL, 0x06c36084UL, 0x5ea070d2UL, 0xe61c17b7UL, 0xf4a9b859UL,
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+ 0x66ab2b61UL, 0x51c1e960UL, 0xd4d7a665UL, 0xe3bd6464UL, 0xba032266UL,
+ 0x8d69e067UL, 0x20cbd748UL, 0x17a11549UL, 0x4e1f534bUL, 0x7975914aUL,
+ 0xfc63de4fUL, 0xcb091c4eUL, 0x92b75a4cUL, 0xa5dd984dUL, 0x989ac446UL,
+ 0xaff00647UL, 0xf64e4045UL, 0xc1248244UL, 0x4432cd41UL, 0x73580f40UL,
+ 0x2ae64942UL, 0x1d8c8b43UL, 0x5068f154UL, 0x67023355UL, 0x3ebc7557UL,
+ 0x09d6b756UL, 0x8cc0f853UL, 0xbbaa3a52UL, 0xe2147c50UL, 0xd57ebe51UL,
+ 0xe839e25aUL, 0xdf53205bUL, 0x86ed6659UL, 0xb187a458UL, 0x3491eb5dUL,
+ 0x03fb295cUL, 0x5a456f5eUL, 0x6d2fad5fUL, 0x801b35e1UL, 0xb771f7e0UL,
+ 0xeecfb1e2UL, 0xd9a573e3UL, 0x5cb33ce6UL, 0x6bd9fee7UL, 0x3267b8e5UL,
+ 0x050d7ae4UL, 0x384a26efUL, 0x0f20e4eeUL, 0x569ea2ecUL, 0x61f460edUL,
+ 0xe4e22fe8UL, 0xd388ede9UL, 0x8a36abebUL, 0xbd5c69eaUL, 0xf0b813fdUL,
+ 0xc7d2d1fcUL, 0x9e6c97feUL, 0xa90655ffUL, 0x2c101afaUL, 0x1b7ad8fbUL,
+ 0x42c49ef9UL, 0x75ae5cf8UL, 0x48e900f3UL, 0x7f83c2f2UL, 0x263d84f0UL,
+ 0x115746f1UL, 0x944109f4UL, 0xa32bcbf5UL, 0xfa958df7UL, 0xcdff4ff6UL,
+ 0x605d78d9UL, 0x5737bad8UL, 0x0e89fcdaUL, 0x39e33edbUL, 0xbcf571deUL,
+ 0x8b9fb3dfUL, 0xd221f5ddUL, 0xe54b37dcUL, 0xd80c6bd7UL, 0xef66a9d6UL,
+ 0xb6d8efd4UL, 0x81b22dd5UL, 0x04a462d0UL, 0x33cea0d1UL, 0x6a70e6d3UL,
+ 0x5d1a24d2UL, 0x10fe5ec5UL, 0x27949cc4UL, 0x7e2adac6UL, 0x494018c7UL,
+ 0xcc5657c2UL, 0xfb3c95c3UL, 0xa282d3c1UL, 0x95e811c0UL, 0xa8af4dcbUL,
+ 0x9fc58fcaUL, 0xc67bc9c8UL, 0xf1110bc9UL, 0x740744ccUL, 0x436d86cdUL,
+ 0x1ad3c0cfUL, 0x2db902ceUL, 0x4096af91UL, 0x77fc6d90UL, 0x2e422b92UL,
+ 0x1928e993UL, 0x9c3ea696UL, 0xab546497UL, 0xf2ea2295UL, 0xc580e094UL,
+ 0xf8c7bc9fUL, 0xcfad7e9eUL, 0x9613389cUL, 0xa179fa9dUL, 0x246fb598UL,
+ 0x13057799UL, 0x4abb319bUL, 0x7dd1f39aUL, 0x3035898dUL, 0x075f4b8cUL,
+ 0x5ee10d8eUL, 0x698bcf8fUL, 0xec9d808aUL, 0xdbf7428bUL, 0x82490489UL,
+ 0xb523c688UL, 0x88649a83UL, 0xbf0e5882UL, 0xe6b01e80UL, 0xd1dadc81UL,
+ 0x54cc9384UL, 0x63a65185UL, 0x3a181787UL, 0x0d72d586UL, 0xa0d0e2a9UL,
+ 0x97ba20a8UL, 0xce0466aaUL, 0xf96ea4abUL, 0x7c78ebaeUL, 0x4b1229afUL,
+ 0x12ac6fadUL, 0x25c6adacUL, 0x1881f1a7UL, 0x2feb33a6UL, 0x765575a4UL,
+ 0x413fb7a5UL, 0xc429f8a0UL, 0xf3433aa1UL, 0xaafd7ca3UL, 0x9d97bea2UL,
+ 0xd073c4b5UL, 0xe71906b4UL, 0xbea740b6UL, 0x89cd82b7UL, 0x0cdbcdb2UL,
+ 0x3bb10fb3UL, 0x620f49b1UL, 0x55658bb0UL, 0x6822d7bbUL, 0x5f4815baUL,
+ 0x06f653b8UL, 0x319c91b9UL, 0xb48adebcUL, 0x83e01cbdUL, 0xda5e5abfUL,
+ 0xed3498beUL
+ },
+ {
+ 0x00000000UL, 0x6567bcb8UL, 0x8bc809aaUL, 0xeeafb512UL, 0x5797628fUL,
+ 0x32f0de37UL, 0xdc5f6b25UL, 0xb938d79dUL, 0xef28b4c5UL, 0x8a4f087dUL,
+ 0x64e0bd6fUL, 0x018701d7UL, 0xb8bfd64aUL, 0xddd86af2UL, 0x3377dfe0UL,
+ 0x56106358UL, 0x9f571950UL, 0xfa30a5e8UL, 0x149f10faUL, 0x71f8ac42UL,
+ 0xc8c07bdfUL, 0xada7c767UL, 0x43087275UL, 0x266fcecdUL, 0x707fad95UL,
+ 0x1518112dUL, 0xfbb7a43fUL, 0x9ed01887UL, 0x27e8cf1aUL, 0x428f73a2UL,
+ 0xac20c6b0UL, 0xc9477a08UL, 0x3eaf32a0UL, 0x5bc88e18UL, 0xb5673b0aUL,
+ 0xd00087b2UL, 0x6938502fUL, 0x0c5fec97UL, 0xe2f05985UL, 0x8797e53dUL,
+ 0xd1878665UL, 0xb4e03addUL, 0x5a4f8fcfUL, 0x3f283377UL, 0x8610e4eaUL,
+ 0xe3775852UL, 0x0dd8ed40UL, 0x68bf51f8UL, 0xa1f82bf0UL, 0xc49f9748UL,
+ 0x2a30225aUL, 0x4f579ee2UL, 0xf66f497fUL, 0x9308f5c7UL, 0x7da740d5UL,
+ 0x18c0fc6dUL, 0x4ed09f35UL, 0x2bb7238dUL, 0xc518969fUL, 0xa07f2a27UL,
+ 0x1947fdbaUL, 0x7c204102UL, 0x928ff410UL, 0xf7e848a8UL, 0x3d58149bUL,
+ 0x583fa823UL, 0xb6901d31UL, 0xd3f7a189UL, 0x6acf7614UL, 0x0fa8caacUL,
+ 0xe1077fbeUL, 0x8460c306UL, 0xd270a05eUL, 0xb7171ce6UL, 0x59b8a9f4UL,
+ 0x3cdf154cUL, 0x85e7c2d1UL, 0xe0807e69UL, 0x0e2fcb7bUL, 0x6b4877c3UL,
+ 0xa20f0dcbUL, 0xc768b173UL, 0x29c70461UL, 0x4ca0b8d9UL, 0xf5986f44UL,
+ 0x90ffd3fcUL, 0x7e5066eeUL, 0x1b37da56UL, 0x4d27b90eUL, 0x284005b6UL,
+ 0xc6efb0a4UL, 0xa3880c1cUL, 0x1ab0db81UL, 0x7fd76739UL, 0x9178d22bUL,
+ 0xf41f6e93UL, 0x03f7263bUL, 0x66909a83UL, 0x883f2f91UL, 0xed589329UL,
+ 0x546044b4UL, 0x3107f80cUL, 0xdfa84d1eUL, 0xbacff1a6UL, 0xecdf92feUL,
+ 0x89b82e46UL, 0x67179b54UL, 0x027027ecUL, 0xbb48f071UL, 0xde2f4cc9UL,
+ 0x3080f9dbUL, 0x55e74563UL, 0x9ca03f6bUL, 0xf9c783d3UL, 0x176836c1UL,
+ 0x720f8a79UL, 0xcb375de4UL, 0xae50e15cUL, 0x40ff544eUL, 0x2598e8f6UL,
+ 0x73888baeUL, 0x16ef3716UL, 0xf8408204UL, 0x9d273ebcUL, 0x241fe921UL,
+ 0x41785599UL, 0xafd7e08bUL, 0xcab05c33UL, 0x3bb659edUL, 0x5ed1e555UL,
+ 0xb07e5047UL, 0xd519ecffUL, 0x6c213b62UL, 0x094687daUL, 0xe7e932c8UL,
+ 0x828e8e70UL, 0xd49eed28UL, 0xb1f95190UL, 0x5f56e482UL, 0x3a31583aUL,
+ 0x83098fa7UL, 0xe66e331fUL, 0x08c1860dUL, 0x6da63ab5UL, 0xa4e140bdUL,
+ 0xc186fc05UL, 0x2f294917UL, 0x4a4ef5afUL, 0xf3762232UL, 0x96119e8aUL,
+ 0x78be2b98UL, 0x1dd99720UL, 0x4bc9f478UL, 0x2eae48c0UL, 0xc001fdd2UL,
+ 0xa566416aUL, 0x1c5e96f7UL, 0x79392a4fUL, 0x97969f5dUL, 0xf2f123e5UL,
+ 0x05196b4dUL, 0x607ed7f5UL, 0x8ed162e7UL, 0xebb6de5fUL, 0x528e09c2UL,
+ 0x37e9b57aUL, 0xd9460068UL, 0xbc21bcd0UL, 0xea31df88UL, 0x8f566330UL,
+ 0x61f9d622UL, 0x049e6a9aUL, 0xbda6bd07UL, 0xd8c101bfUL, 0x366eb4adUL,
+ 0x53090815UL, 0x9a4e721dUL, 0xff29cea5UL, 0x11867bb7UL, 0x74e1c70fUL,
+ 0xcdd91092UL, 0xa8beac2aUL, 0x46111938UL, 0x2376a580UL, 0x7566c6d8UL,
+ 0x10017a60UL, 0xfeaecf72UL, 0x9bc973caUL, 0x22f1a457UL, 0x479618efUL,
+ 0xa939adfdUL, 0xcc5e1145UL, 0x06ee4d76UL, 0x6389f1ceUL, 0x8d2644dcUL,
+ 0xe841f864UL, 0x51792ff9UL, 0x341e9341UL, 0xdab12653UL, 0xbfd69aebUL,
+ 0xe9c6f9b3UL, 0x8ca1450bUL, 0x620ef019UL, 0x07694ca1UL, 0xbe519b3cUL,
+ 0xdb362784UL, 0x35999296UL, 0x50fe2e2eUL, 0x99b95426UL, 0xfcdee89eUL,
+ 0x12715d8cUL, 0x7716e134UL, 0xce2e36a9UL, 0xab498a11UL, 0x45e63f03UL,
+ 0x208183bbUL, 0x7691e0e3UL, 0x13f65c5bUL, 0xfd59e949UL, 0x983e55f1UL,
+ 0x2106826cUL, 0x44613ed4UL, 0xaace8bc6UL, 0xcfa9377eUL, 0x38417fd6UL,
+ 0x5d26c36eUL, 0xb389767cUL, 0xd6eecac4UL, 0x6fd61d59UL, 0x0ab1a1e1UL,
+ 0xe41e14f3UL, 0x8179a84bUL, 0xd769cb13UL, 0xb20e77abUL, 0x5ca1c2b9UL,
+ 0x39c67e01UL, 0x80fea99cUL, 0xe5991524UL, 0x0b36a036UL, 0x6e511c8eUL,
+ 0xa7166686UL, 0xc271da3eUL, 0x2cde6f2cUL, 0x49b9d394UL, 0xf0810409UL,
+ 0x95e6b8b1UL, 0x7b490da3UL, 0x1e2eb11bUL, 0x483ed243UL, 0x2d596efbUL,
+ 0xc3f6dbe9UL, 0xa6916751UL, 0x1fa9b0ccUL, 0x7ace0c74UL, 0x9461b966UL,
+ 0xf10605deUL
#endif
- }
+ }
};
diff --git a/src/lib/zlib/deflate.c b/src/lib/zlib/deflate.c
index 9e4c2cbc8af..1bddc5cdb0d 100644
--- a/src/lib/zlib/deflate.c
+++ b/src/lib/zlib/deflate.c
@@ -52,7 +52,7 @@
#include "deflate.h"
const char deflate_copyright[] =
- " deflate 1.2.7 Copyright 1995-2012 Jean-loup Gailly and Mark Adler ";
+ " deflate 1.2.7 Copyright 1995-2012 Jean-loup Gailly and Mark Adler ";
/*
If you use the zlib library in a product, an acknowledgment is welcome
in the documentation of your product. If for some reason you cannot
@@ -64,10 +64,10 @@ const char deflate_copyright[] =
* Function prototypes.
*/
typedef enum {
- need_more, /* block not completed, need more input or more output */
- block_done, /* block flush performed */
- finish_started, /* finish started, need only more output at next deflate */
- finish_done /* finish done, accept no more input or output */
+ need_more, /* block not completed, need more input or more output */
+ block_done, /* block flush performed */
+ finish_started, /* finish started, need only more output at next deflate */
+ finish_done /* finish done, accept no more input or output */
} block_state;
typedef block_state (*compress_func) OF((deflate_state *s, int flush));
@@ -86,15 +86,15 @@ local void putShortMSB OF((deflate_state *s, uInt b));
local void flush_pending OF((z_streamp strm));
local int read_buf OF((z_streamp strm, Bytef *buf, unsigned size));
#ifdef ASMV
- void match_init OF((void)); /* asm code initialization */
- uInt longest_match OF((deflate_state *s, IPos cur_match));
+ void match_init OF((void)); /* asm code initialization */
+ uInt longest_match OF((deflate_state *s, IPos cur_match));
#else
local uInt longest_match OF((deflate_state *s, IPos cur_match));
#endif
#ifdef DEBUG
local void check_match OF((deflate_state *s, IPos start, IPos match,
- int length));
+ int length));
#endif
/* ===========================================================================
@@ -115,11 +115,11 @@ local void check_match OF((deflate_state *s, IPos start, IPos match,
* found for specific files.
*/
typedef struct config_s {
- ush good_length; /* reduce lazy search above this match length */
- ush max_lazy; /* do not perform lazy search above this match length */
- ush nice_length; /* quit search above this match length */
- ush max_chain;
- compress_func func;
+ ush good_length; /* reduce lazy search above this match length */
+ ush max_lazy; /* do not perform lazy search above this match length */
+ ush nice_length; /* quit search above this match length */
+ ush max_chain;
+ compress_func func;
} config;
#ifdef FASTEST
@@ -179,14 +179,14 @@ struct static_tree_desc_s {int dummy;}; /* for buggy compilers */
*/
#ifdef FASTEST
#define INSERT_STRING(s, str, match_head) \
- (UPDATE_HASH(s, s->ins_h, s->window[(str) + (MIN_MATCH-1)]), \
- match_head = s->head[s->ins_h], \
- s->head[s->ins_h] = (Pos)(str))
+ (UPDATE_HASH(s, s->ins_h, s->window[(str) + (MIN_MATCH-1)]), \
+ match_head = s->head[s->ins_h], \
+ s->head[s->ins_h] = (Pos)(str))
#else
#define INSERT_STRING(s, str, match_head) \
- (UPDATE_HASH(s, s->ins_h, s->window[(str) + (MIN_MATCH-1)]), \
- match_head = s->prev[(str) & s->w_mask] = s->head[s->ins_h], \
- s->head[s->ins_h] = (Pos)(str))
+ (UPDATE_HASH(s, s->ins_h, s->window[(str) + (MIN_MATCH-1)]), \
+ match_head = s->prev[(str) & s->w_mask] = s->head[s->ins_h], \
+ s->head[s->ins_h] = (Pos)(str))
#endif
/* ===========================================================================
@@ -194,354 +194,354 @@ struct static_tree_desc_s {int dummy;}; /* for buggy compilers */
* prev[] will be initialized on the fly.
*/
#define CLEAR_HASH(s) \
- s->head[s->hash_size-1] = NIL; \
- zmemzero((Bytef *)s->head, (unsigned)(s->hash_size-1)*sizeof(*s->head));
+ s->head[s->hash_size-1] = NIL; \
+ zmemzero((Bytef *)s->head, (unsigned)(s->hash_size-1)*sizeof(*s->head));
/* ========================================================================= */
int ZEXPORT deflateInit_(strm, level, version, stream_size)
- z_streamp strm;
- int level;
- const char *version;
- int stream_size;
+ z_streamp strm;
+ int level;
+ const char *version;
+ int stream_size;
{
- return deflateInit2_(strm, level, Z_DEFLATED, MAX_WBITS, DEF_MEM_LEVEL,
- Z_DEFAULT_STRATEGY, version, stream_size);
- /* To do: ignore strm->next_in if we use it as window */
+ return deflateInit2_(strm, level, Z_DEFLATED, MAX_WBITS, DEF_MEM_LEVEL,
+ Z_DEFAULT_STRATEGY, version, stream_size);
+ /* To do: ignore strm->next_in if we use it as window */
}
/* ========================================================================= */
int ZEXPORT deflateInit2_(strm, level, method, windowBits, memLevel, strategy,
- version, stream_size)
- z_streamp strm;
- int level;
- int method;
- int windowBits;
- int memLevel;
- int strategy;
- const char *version;
- int stream_size;
+ version, stream_size)
+ z_streamp strm;
+ int level;
+ int method;
+ int windowBits;
+ int memLevel;
+ int strategy;
+ const char *version;
+ int stream_size;
{
- deflate_state *s;
- int wrap = 1;
- static const char my_version[] = ZLIB_VERSION;
-
- ushf *overlay;
- /* We overlay pending_buf and d_buf+l_buf. This works since the average
- * output size for (length,distance) codes is <= 24 bits.
- */
-
- if (version == Z_NULL || version[0] != my_version[0] ||
- stream_size != sizeof(z_stream)) {
- return Z_VERSION_ERROR;
- }
- if (strm == Z_NULL) return Z_STREAM_ERROR;
-
- strm->msg = Z_NULL;
- if (strm->zalloc == (alloc_func)0) {
+ deflate_state *s;
+ int wrap = 1;
+ static const char my_version[] = ZLIB_VERSION;
+
+ ushf *overlay;
+ /* We overlay pending_buf and d_buf+l_buf. This works since the average
+ * output size for (length,distance) codes is <= 24 bits.
+ */
+
+ if (version == Z_NULL || version[0] != my_version[0] ||
+ stream_size != sizeof(z_stream)) {
+ return Z_VERSION_ERROR;
+ }
+ if (strm == Z_NULL) return Z_STREAM_ERROR;
+
+ strm->msg = Z_NULL;
+ if (strm->zalloc == (alloc_func)0) {
#ifdef Z_SOLO
- return Z_STREAM_ERROR;
+ return Z_STREAM_ERROR;
#else
- strm->zalloc = zcalloc;
- strm->opaque = (voidpf)0;
+ strm->zalloc = zcalloc;
+ strm->opaque = (voidpf)0;
#endif
- }
- if (strm->zfree == (free_func)0)
+ }
+ if (strm->zfree == (free_func)0)
#ifdef Z_SOLO
- return Z_STREAM_ERROR;
+ return Z_STREAM_ERROR;
#else
- strm->zfree = zcfree;
+ strm->zfree = zcfree;
#endif
#ifdef FASTEST
- if (level != 0) level = 1;
+ if (level != 0) level = 1;
#else
- if (level == Z_DEFAULT_COMPRESSION) level = 6;
+ if (level == Z_DEFAULT_COMPRESSION) level = 6;
#endif
- if (windowBits < 0) { /* suppress zlib wrapper */
- wrap = 0;
- windowBits = -windowBits;
- }
+ if (windowBits < 0) { /* suppress zlib wrapper */
+ wrap = 0;
+ windowBits = -windowBits;
+ }
#ifdef GZIP
- else if (windowBits > 15) {
- wrap = 2; /* write gzip wrapper instead */
- windowBits -= 16;
- }
+ else if (windowBits > 15) {
+ wrap = 2; /* write gzip wrapper instead */
+ windowBits -= 16;
+ }
#endif
- if (memLevel < 1 || memLevel > MAX_MEM_LEVEL || method != Z_DEFLATED ||
- windowBits < 8 || windowBits > 15 || level < 0 || level > 9 ||
- strategy < 0 || strategy > Z_FIXED) {
- return Z_STREAM_ERROR;
- }
- if (windowBits == 8) windowBits = 9; /* until 256-byte window bug fixed */
- s = (deflate_state *) ZALLOC(strm, 1, sizeof(deflate_state));
- if (s == Z_NULL) return Z_MEM_ERROR;
- strm->state = (struct internal_state FAR *)s;
- s->strm = strm;
-
- s->wrap = wrap;
- s->gzhead = Z_NULL;
- s->w_bits = windowBits;
- s->w_size = 1 << s->w_bits;
- s->w_mask = s->w_size - 1;
-
- s->hash_bits = memLevel + 7;
- s->hash_size = 1 << s->hash_bits;
- s->hash_mask = s->hash_size - 1;
- s->hash_shift = ((s->hash_bits+MIN_MATCH-1)/MIN_MATCH);
-
- s->window = (Bytef *) ZALLOC(strm, s->w_size, 2*sizeof(Byte));
- s->prev = (Posf *) ZALLOC(strm, s->w_size, sizeof(Pos));
- s->head = (Posf *) ZALLOC(strm, s->hash_size, sizeof(Pos));
-
- s->high_water = 0; /* nothing written to s->window yet */
-
- s->lit_bufsize = 1 << (memLevel + 6); /* 16K elements by default */
-
- overlay = (ushf *) ZALLOC(strm, s->lit_bufsize, sizeof(ush)+2);
- s->pending_buf = (uchf *) overlay;
- s->pending_buf_size = (ulg)s->lit_bufsize * (sizeof(ush)+2L);
-
- if (s->window == Z_NULL || s->prev == Z_NULL || s->head == Z_NULL ||
- s->pending_buf == Z_NULL) {
- s->status = FINISH_STATE;
- strm->msg = (char*)ERR_MSG(Z_MEM_ERROR);
- deflateEnd (strm);
- return Z_MEM_ERROR;
- }
- s->d_buf = overlay + s->lit_bufsize/sizeof(ush);
- s->l_buf = s->pending_buf + (1+sizeof(ush))*s->lit_bufsize;
-
- s->level = level;
- s->strategy = strategy;
- s->method = (Byte)method;
-
- return deflateReset(strm);
+ if (memLevel < 1 || memLevel > MAX_MEM_LEVEL || method != Z_DEFLATED ||
+ windowBits < 8 || windowBits > 15 || level < 0 || level > 9 ||
+ strategy < 0 || strategy > Z_FIXED) {
+ return Z_STREAM_ERROR;
+ }
+ if (windowBits == 8) windowBits = 9; /* until 256-byte window bug fixed */
+ s = (deflate_state *) ZALLOC(strm, 1, sizeof(deflate_state));
+ if (s == Z_NULL) return Z_MEM_ERROR;
+ strm->state = (struct internal_state FAR *)s;
+ s->strm = strm;
+
+ s->wrap = wrap;
+ s->gzhead = Z_NULL;
+ s->w_bits = windowBits;
+ s->w_size = 1 << s->w_bits;
+ s->w_mask = s->w_size - 1;
+
+ s->hash_bits = memLevel + 7;
+ s->hash_size = 1 << s->hash_bits;
+ s->hash_mask = s->hash_size - 1;
+ s->hash_shift = ((s->hash_bits+MIN_MATCH-1)/MIN_MATCH);
+
+ s->window = (Bytef *) ZALLOC(strm, s->w_size, 2*sizeof(Byte));
+ s->prev = (Posf *) ZALLOC(strm, s->w_size, sizeof(Pos));
+ s->head = (Posf *) ZALLOC(strm, s->hash_size, sizeof(Pos));
+
+ s->high_water = 0; /* nothing written to s->window yet */
+
+ s->lit_bufsize = 1 << (memLevel + 6); /* 16K elements by default */
+
+ overlay = (ushf *) ZALLOC(strm, s->lit_bufsize, sizeof(ush)+2);
+ s->pending_buf = (uchf *) overlay;
+ s->pending_buf_size = (ulg)s->lit_bufsize * (sizeof(ush)+2L);
+
+ if (s->window == Z_NULL || s->prev == Z_NULL || s->head == Z_NULL ||
+ s->pending_buf == Z_NULL) {
+ s->status = FINISH_STATE;
+ strm->msg = (char*)ERR_MSG(Z_MEM_ERROR);
+ deflateEnd (strm);
+ return Z_MEM_ERROR;
+ }
+ s->d_buf = overlay + s->lit_bufsize/sizeof(ush);
+ s->l_buf = s->pending_buf + (1+sizeof(ush))*s->lit_bufsize;
+
+ s->level = level;
+ s->strategy = strategy;
+ s->method = (Byte)method;
+
+ return deflateReset(strm);
}
/* ========================================================================= */
int ZEXPORT deflateSetDictionary (strm, dictionary, dictLength)
- z_streamp strm;
- const Bytef *dictionary;
- uInt dictLength;
+ z_streamp strm;
+ const Bytef *dictionary;
+ uInt dictLength;
{
- deflate_state *s;
- uInt str, n;
- int wrap;
- unsigned avail;
- unsigned char *next;
-
- if (strm == Z_NULL || strm->state == Z_NULL || dictionary == Z_NULL)
- return Z_STREAM_ERROR;
- s = strm->state;
- wrap = s->wrap;
- if (wrap == 2 || (wrap == 1 && s->status != INIT_STATE) || s->lookahead)
- return Z_STREAM_ERROR;
-
- /* when using zlib wrappers, compute Adler-32 for provided dictionary */
- if (wrap == 1)
- strm->adler = adler32(strm->adler, dictionary, dictLength);
- s->wrap = 0; /* avoid computing Adler-32 in read_buf */
-
- /* if dictionary would fill window, just replace the history */
- if (dictLength >= s->w_size) {
- if (wrap == 0) { /* already empty otherwise */
- CLEAR_HASH(s);
- s->strstart = 0;
- s->block_start = 0L;
- s->insert = 0;
- }
- dictionary += dictLength - s->w_size; /* use the tail */
- dictLength = s->w_size;
- }
-
- /* insert dictionary into window and hash */
- avail = strm->avail_in;
- next = strm->next_in;
- strm->avail_in = dictLength;
- strm->next_in = (Bytef *)dictionary;
- fill_window(s);
- while (s->lookahead >= MIN_MATCH) {
- str = s->strstart;
- n = s->lookahead - (MIN_MATCH-1);
- do {
- UPDATE_HASH(s, s->ins_h, s->window[str + MIN_MATCH-1]);
+ deflate_state *s;
+ uInt str, n;
+ int wrap;
+ unsigned avail;
+ unsigned char *next;
+
+ if (strm == Z_NULL || strm->state == Z_NULL || dictionary == Z_NULL)
+ return Z_STREAM_ERROR;
+ s = strm->state;
+ wrap = s->wrap;
+ if (wrap == 2 || (wrap == 1 && s->status != INIT_STATE) || s->lookahead)
+ return Z_STREAM_ERROR;
+
+ /* when using zlib wrappers, compute Adler-32 for provided dictionary */
+ if (wrap == 1)
+ strm->adler = adler32(strm->adler, dictionary, dictLength);
+ s->wrap = 0; /* avoid computing Adler-32 in read_buf */
+
+ /* if dictionary would fill window, just replace the history */
+ if (dictLength >= s->w_size) {
+ if (wrap == 0) { /* already empty otherwise */
+ CLEAR_HASH(s);
+ s->strstart = 0;
+ s->block_start = 0L;
+ s->insert = 0;
+ }
+ dictionary += dictLength - s->w_size; /* use the tail */
+ dictLength = s->w_size;
+ }
+
+ /* insert dictionary into window and hash */
+ avail = strm->avail_in;
+ next = strm->next_in;
+ strm->avail_in = dictLength;
+ strm->next_in = (Bytef *)dictionary;
+ fill_window(s);
+ while (s->lookahead >= MIN_MATCH) {
+ str = s->strstart;
+ n = s->lookahead - (MIN_MATCH-1);
+ do {
+ UPDATE_HASH(s, s->ins_h, s->window[str + MIN_MATCH-1]);
#ifndef FASTEST
- s->prev[str & s->w_mask] = s->head[s->ins_h];
+ s->prev[str & s->w_mask] = s->head[s->ins_h];
#endif
- s->head[s->ins_h] = (Pos)str;
- str++;
- } while (--n);
- s->strstart = str;
- s->lookahead = MIN_MATCH-1;
- fill_window(s);
- }
- s->strstart += s->lookahead;
- s->block_start = (long)s->strstart;
- s->insert = s->lookahead;
- s->lookahead = 0;
- s->match_length = s->prev_length = MIN_MATCH-1;
- s->match_available = 0;
- strm->next_in = next;
- strm->avail_in = avail;
- s->wrap = wrap;
- return Z_OK;
+ s->head[s->ins_h] = (Pos)str;
+ str++;
+ } while (--n);
+ s->strstart = str;
+ s->lookahead = MIN_MATCH-1;
+ fill_window(s);
+ }
+ s->strstart += s->lookahead;
+ s->block_start = (long)s->strstart;
+ s->insert = s->lookahead;
+ s->lookahead = 0;
+ s->match_length = s->prev_length = MIN_MATCH-1;
+ s->match_available = 0;
+ strm->next_in = next;
+ strm->avail_in = avail;
+ s->wrap = wrap;
+ return Z_OK;
}
/* ========================================================================= */
int ZEXPORT deflateResetKeep (strm)
- z_streamp strm;
+ z_streamp strm;
{
- deflate_state *s;
-
- if (strm == Z_NULL || strm->state == Z_NULL ||
- strm->zalloc == (alloc_func)0 || strm->zfree == (free_func)0) {
- return Z_STREAM_ERROR;
- }
-
- strm->total_in = strm->total_out = 0;
- strm->msg = Z_NULL; /* use zfree if we ever allocate msg dynamically */
- strm->data_type = Z_UNKNOWN;
-
- s = (deflate_state *)strm->state;
- s->pending = 0;
- s->pending_out = s->pending_buf;
-
- if (s->wrap < 0) {
- s->wrap = -s->wrap; /* was made negative by deflate(..., Z_FINISH); */
- }
- s->status = s->wrap ? INIT_STATE : BUSY_STATE;
- strm->adler =
+ deflate_state *s;
+
+ if (strm == Z_NULL || strm->state == Z_NULL ||
+ strm->zalloc == (alloc_func)0 || strm->zfree == (free_func)0) {
+ return Z_STREAM_ERROR;
+ }
+
+ strm->total_in = strm->total_out = 0;
+ strm->msg = Z_NULL; /* use zfree if we ever allocate msg dynamically */
+ strm->data_type = Z_UNKNOWN;
+
+ s = (deflate_state *)strm->state;
+ s->pending = 0;
+ s->pending_out = s->pending_buf;
+
+ if (s->wrap < 0) {
+ s->wrap = -s->wrap; /* was made negative by deflate(..., Z_FINISH); */
+ }
+ s->status = s->wrap ? INIT_STATE : BUSY_STATE;
+ strm->adler =
#ifdef GZIP
- s->wrap == 2 ? crc32(0L, Z_NULL, 0) :
+ s->wrap == 2 ? crc32(0L, Z_NULL, 0) :
#endif
- adler32(0L, Z_NULL, 0);
- s->last_flush = Z_NO_FLUSH;
+ adler32(0L, Z_NULL, 0);
+ s->last_flush = Z_NO_FLUSH;
- _tr_init(s);
+ _tr_init(s);
- return Z_OK;
+ return Z_OK;
}
/* ========================================================================= */
int ZEXPORT deflateReset (strm)
- z_streamp strm;
+ z_streamp strm;
{
- int ret;
+ int ret;
- ret = deflateResetKeep(strm);
- if (ret == Z_OK)
- lm_init(strm->state);
- return ret;
+ ret = deflateResetKeep(strm);
+ if (ret == Z_OK)
+ lm_init(strm->state);
+ return ret;
}
/* ========================================================================= */
int ZEXPORT deflateSetHeader (strm, head)
- z_streamp strm;
- gz_headerp head;
+ z_streamp strm;
+ gz_headerp head;
{
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- if (strm->state->wrap != 2) return Z_STREAM_ERROR;
- strm->state->gzhead = head;
- return Z_OK;
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ if (strm->state->wrap != 2) return Z_STREAM_ERROR;
+ strm->state->gzhead = head;
+ return Z_OK;
}
/* ========================================================================= */
int ZEXPORT deflatePending (strm, pending, bits)
- unsigned *pending;
- int *bits;
- z_streamp strm;
+ unsigned *pending;
+ int *bits;
+ z_streamp strm;
{
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- if (pending != Z_NULL)
- *pending = strm->state->pending;
- if (bits != Z_NULL)
- *bits = strm->state->bi_valid;
- return Z_OK;
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ if (pending != Z_NULL)
+ *pending = strm->state->pending;
+ if (bits != Z_NULL)
+ *bits = strm->state->bi_valid;
+ return Z_OK;
}
/* ========================================================================= */
int ZEXPORT deflatePrime (strm, bits, value)
- z_streamp strm;
- int bits;
- int value;
+ z_streamp strm;
+ int bits;
+ int value;
{
- deflate_state *s;
- int put;
-
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- s = strm->state;
- if ((Bytef *)(s->d_buf) < s->pending_out + ((Buf_size + 7) >> 3))
- return Z_BUF_ERROR;
- do {
- put = Buf_size - s->bi_valid;
- if (put > bits)
- put = bits;
- s->bi_buf |= (ush)((value & ((1 << put) - 1)) << s->bi_valid);
- s->bi_valid += put;
- _tr_flush_bits(s);
- value >>= put;
- bits -= put;
- } while (bits);
- return Z_OK;
+ deflate_state *s;
+ int put;
+
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ s = strm->state;
+ if ((Bytef *)(s->d_buf) < s->pending_out + ((Buf_size + 7) >> 3))
+ return Z_BUF_ERROR;
+ do {
+ put = Buf_size - s->bi_valid;
+ if (put > bits)
+ put = bits;
+ s->bi_buf |= (ush)((value & ((1 << put) - 1)) << s->bi_valid);
+ s->bi_valid += put;
+ _tr_flush_bits(s);
+ value >>= put;
+ bits -= put;
+ } while (bits);
+ return Z_OK;
}
/* ========================================================================= */
int ZEXPORT deflateParams(strm, level, strategy)
- z_streamp strm;
- int level;
- int strategy;
+ z_streamp strm;
+ int level;
+ int strategy;
{
- deflate_state *s;
- compress_func func;
- int err = Z_OK;
+ deflate_state *s;
+ compress_func func;
+ int err = Z_OK;
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- s = strm->state;
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ s = strm->state;
#ifdef FASTEST
- if (level != 0) level = 1;
+ if (level != 0) level = 1;
#else
- if (level == Z_DEFAULT_COMPRESSION) level = 6;
+ if (level == Z_DEFAULT_COMPRESSION) level = 6;
#endif
- if (level < 0 || level > 9 || strategy < 0 || strategy > Z_FIXED) {
- return Z_STREAM_ERROR;
- }
- func = configuration_table[s->level].func;
-
- if ((strategy != s->strategy || func != configuration_table[level].func) &&
- strm->total_in != 0) {
- /* Flush the last buffer: */
- err = deflate(strm, Z_BLOCK);
- }
- if (s->level != level) {
- s->level = level;
- s->max_lazy_match = configuration_table[level].max_lazy;
- s->good_match = configuration_table[level].good_length;
- s->nice_match = configuration_table[level].nice_length;
- s->max_chain_length = configuration_table[level].max_chain;
- }
- s->strategy = strategy;
- return err;
+ if (level < 0 || level > 9 || strategy < 0 || strategy > Z_FIXED) {
+ return Z_STREAM_ERROR;
+ }
+ func = configuration_table[s->level].func;
+
+ if ((strategy != s->strategy || func != configuration_table[level].func) &&
+ strm->total_in != 0) {
+ /* Flush the last buffer: */
+ err = deflate(strm, Z_BLOCK);
+ }
+ if (s->level != level) {
+ s->level = level;
+ s->max_lazy_match = configuration_table[level].max_lazy;
+ s->good_match = configuration_table[level].good_length;
+ s->nice_match = configuration_table[level].nice_length;
+ s->max_chain_length = configuration_table[level].max_chain;
+ }
+ s->strategy = strategy;
+ return err;
}
/* ========================================================================= */
int ZEXPORT deflateTune(strm, good_length, max_lazy, nice_length, max_chain)
- z_streamp strm;
- int good_length;
- int max_lazy;
- int nice_length;
- int max_chain;
+ z_streamp strm;
+ int good_length;
+ int max_lazy;
+ int nice_length;
+ int max_chain;
{
- deflate_state *s;
-
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- s = strm->state;
- s->good_match = good_length;
- s->max_lazy_match = max_lazy;
- s->nice_match = nice_length;
- s->max_chain_length = max_chain;
- return Z_OK;
+ deflate_state *s;
+
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ s = strm->state;
+ s->good_match = good_length;
+ s->max_lazy_match = max_lazy;
+ s->nice_match = nice_length;
+ s->max_chain_length = max_chain;
+ return Z_OK;
}
/* =========================================================================
@@ -562,60 +562,60 @@ int ZEXPORT deflateTune(strm, good_length, max_lazy, nice_length, max_chain)
* allocation.
*/
uLong ZEXPORT deflateBound(strm, sourceLen)
- z_streamp strm;
- uLong sourceLen;
+ z_streamp strm;
+ uLong sourceLen;
{
- deflate_state *s;
- uLong complen, wraplen;
- Bytef *str;
-
- /* conservative upper bound for compressed data */
- complen = sourceLen +
- ((sourceLen + 7) >> 3) + ((sourceLen + 63) >> 6) + 5;
-
- /* if can't get parameters, return conservative bound plus zlib wrapper */
- if (strm == Z_NULL || strm->state == Z_NULL)
- return complen + 6;
-
- /* compute wrapper length */
- s = strm->state;
- switch (s->wrap) {
- case 0: /* raw deflate */
- wraplen = 0;
- break;
- case 1: /* zlib wrapper */
- wraplen = 6 + (s->strstart ? 4 : 0);
- break;
- case 2: /* gzip wrapper */
- wraplen = 18;
- if (s->gzhead != Z_NULL) { /* user-supplied gzip header */
- if (s->gzhead->extra != Z_NULL)
- wraplen += 2 + s->gzhead->extra_len;
- str = s->gzhead->name;
- if (str != Z_NULL)
- do {
- wraplen++;
- } while (*str++);
- str = s->gzhead->comment;
- if (str != Z_NULL)
- do {
- wraplen++;
- } while (*str++);
- if (s->gzhead->hcrc)
- wraplen += 2;
- }
- break;
- default: /* for compiler happiness */
- wraplen = 6;
- }
-
- /* if not default parameters, return conservative bound */
- if (s->w_bits != 15 || s->hash_bits != 8 + 7)
- return complen + wraplen;
-
- /* default settings: return tight bound for that case */
- return sourceLen + (sourceLen >> 12) + (sourceLen >> 14) +
- (sourceLen >> 25) + 13 - 6 + wraplen;
+ deflate_state *s;
+ uLong complen, wraplen;
+ Bytef *str;
+
+ /* conservative upper bound for compressed data */
+ complen = sourceLen +
+ ((sourceLen + 7) >> 3) + ((sourceLen + 63) >> 6) + 5;
+
+ /* if can't get parameters, return conservative bound plus zlib wrapper */
+ if (strm == Z_NULL || strm->state == Z_NULL)
+ return complen + 6;
+
+ /* compute wrapper length */
+ s = strm->state;
+ switch (s->wrap) {
+ case 0: /* raw deflate */
+ wraplen = 0;
+ break;
+ case 1: /* zlib wrapper */
+ wraplen = 6 + (s->strstart ? 4 : 0);
+ break;
+ case 2: /* gzip wrapper */
+ wraplen = 18;
+ if (s->gzhead != Z_NULL) { /* user-supplied gzip header */
+ if (s->gzhead->extra != Z_NULL)
+ wraplen += 2 + s->gzhead->extra_len;
+ str = s->gzhead->name;
+ if (str != Z_NULL)
+ do {
+ wraplen++;
+ } while (*str++);
+ str = s->gzhead->comment;
+ if (str != Z_NULL)
+ do {
+ wraplen++;
+ } while (*str++);
+ if (s->gzhead->hcrc)
+ wraplen += 2;
+ }
+ break;
+ default: /* for compiler happiness */
+ wraplen = 6;
+ }
+
+ /* if not default parameters, return conservative bound */
+ if (s->w_bits != 15 || s->hash_bits != 8 + 7)
+ return complen + wraplen;
+
+ /* default settings: return tight bound for that case */
+ return sourceLen + (sourceLen >> 12) + (sourceLen >> 14) +
+ (sourceLen >> 25) + 13 - 6 + wraplen;
}
/* =========================================================================
@@ -624,11 +624,11 @@ uLong ZEXPORT deflateBound(strm, sourceLen)
* pending_buf.
*/
local void putShortMSB (s, b)
- deflate_state *s;
- uInt b;
+ deflate_state *s;
+ uInt b;
{
- put_byte(s, (Byte)(b >> 8));
- put_byte(s, (Byte)(b & 0xff));
+ put_byte(s, (Byte)(b >> 8));
+ put_byte(s, (Byte)(b & 0xff));
}
/* =========================================================================
@@ -638,370 +638,370 @@ local void putShortMSB (s, b)
* (See also read_buf()).
*/
local void flush_pending(strm)
- z_streamp strm;
+ z_streamp strm;
{
- unsigned len;
- deflate_state *s = strm->state;
-
- _tr_flush_bits(s);
- len = s->pending;
- if (len > strm->avail_out) len = strm->avail_out;
- if (len == 0) return;
-
- zmemcpy(strm->next_out, s->pending_out, len);
- strm->next_out += len;
- s->pending_out += len;
- strm->total_out += len;
- strm->avail_out -= len;
- s->pending -= len;
- if (s->pending == 0) {
- s->pending_out = s->pending_buf;
- }
+ unsigned len;
+ deflate_state *s = strm->state;
+
+ _tr_flush_bits(s);
+ len = s->pending;
+ if (len > strm->avail_out) len = strm->avail_out;
+ if (len == 0) return;
+
+ zmemcpy(strm->next_out, s->pending_out, len);
+ strm->next_out += len;
+ s->pending_out += len;
+ strm->total_out += len;
+ strm->avail_out -= len;
+ s->pending -= len;
+ if (s->pending == 0) {
+ s->pending_out = s->pending_buf;
+ }
}
/* ========================================================================= */
int ZEXPORT deflate (strm, flush)
- z_streamp strm;
- int flush;
+ z_streamp strm;
+ int flush;
{
- int old_flush; /* value of flush param for previous deflate call */
- deflate_state *s;
-
- if (strm == Z_NULL || strm->state == Z_NULL ||
- flush > Z_BLOCK || flush < 0) {
- return Z_STREAM_ERROR;
- }
- s = strm->state;
-
- if (strm->next_out == Z_NULL ||
- (strm->next_in == Z_NULL && strm->avail_in != 0) ||
- (s->status == FINISH_STATE && flush != Z_FINISH)) {
- ERR_RETURN(strm, Z_STREAM_ERROR);
- }
- if (strm->avail_out == 0) ERR_RETURN(strm, Z_BUF_ERROR);
-
- s->strm = strm; /* just in case */
- old_flush = s->last_flush;
- s->last_flush = flush;
-
- /* Write the header */
- if (s->status == INIT_STATE) {
+ int old_flush; /* value of flush param for previous deflate call */
+ deflate_state *s;
+
+ if (strm == Z_NULL || strm->state == Z_NULL ||
+ flush > Z_BLOCK || flush < 0) {
+ return Z_STREAM_ERROR;
+ }
+ s = strm->state;
+
+ if (strm->next_out == Z_NULL ||
+ (strm->next_in == Z_NULL && strm->avail_in != 0) ||
+ (s->status == FINISH_STATE && flush != Z_FINISH)) {
+ ERR_RETURN(strm, Z_STREAM_ERROR);
+ }
+ if (strm->avail_out == 0) ERR_RETURN(strm, Z_BUF_ERROR);
+
+ s->strm = strm; /* just in case */
+ old_flush = s->last_flush;
+ s->last_flush = flush;
+
+ /* Write the header */
+ if (s->status == INIT_STATE) {
#ifdef GZIP
- if (s->wrap == 2) {
- strm->adler = crc32(0L, Z_NULL, 0);
- put_byte(s, 31);
- put_byte(s, 139);
- put_byte(s, 8);
- if (s->gzhead == Z_NULL) {
- put_byte(s, 0);
- put_byte(s, 0);
- put_byte(s, 0);
- put_byte(s, 0);
- put_byte(s, 0);
- put_byte(s, s->level == 9 ? 2 :
- (s->strategy >= Z_HUFFMAN_ONLY || s->level < 2 ?
- 4 : 0));
- put_byte(s, OS_CODE);
- s->status = BUSY_STATE;
- }
- else {
- put_byte(s, (s->gzhead->text ? 1 : 0) +
- (s->gzhead->hcrc ? 2 : 0) +
- (s->gzhead->extra == Z_NULL ? 0 : 4) +
- (s->gzhead->name == Z_NULL ? 0 : 8) +
- (s->gzhead->comment == Z_NULL ? 0 : 16)
- );
- put_byte(s, (Byte)(s->gzhead->time & 0xff));
- put_byte(s, (Byte)((s->gzhead->time >> 8) & 0xff));
- put_byte(s, (Byte)((s->gzhead->time >> 16) & 0xff));
- put_byte(s, (Byte)((s->gzhead->time >> 24) & 0xff));
- put_byte(s, s->level == 9 ? 2 :
- (s->strategy >= Z_HUFFMAN_ONLY || s->level < 2 ?
- 4 : 0));
- put_byte(s, s->gzhead->os & 0xff);
- if (s->gzhead->extra != Z_NULL) {
- put_byte(s, s->gzhead->extra_len & 0xff);
- put_byte(s, (s->gzhead->extra_len >> 8) & 0xff);
- }
- if (s->gzhead->hcrc)
- strm->adler = crc32(strm->adler, s->pending_buf,
- s->pending);
- s->gzindex = 0;
- s->status = EXTRA_STATE;
- }
- }
- else
+ if (s->wrap == 2) {
+ strm->adler = crc32(0L, Z_NULL, 0);
+ put_byte(s, 31);
+ put_byte(s, 139);
+ put_byte(s, 8);
+ if (s->gzhead == Z_NULL) {
+ put_byte(s, 0);
+ put_byte(s, 0);
+ put_byte(s, 0);
+ put_byte(s, 0);
+ put_byte(s, 0);
+ put_byte(s, s->level == 9 ? 2 :
+ (s->strategy >= Z_HUFFMAN_ONLY || s->level < 2 ?
+ 4 : 0));
+ put_byte(s, OS_CODE);
+ s->status = BUSY_STATE;
+ }
+ else {
+ put_byte(s, (s->gzhead->text ? 1 : 0) +
+ (s->gzhead->hcrc ? 2 : 0) +
+ (s->gzhead->extra == Z_NULL ? 0 : 4) +
+ (s->gzhead->name == Z_NULL ? 0 : 8) +
+ (s->gzhead->comment == Z_NULL ? 0 : 16)
+ );
+ put_byte(s, (Byte)(s->gzhead->time & 0xff));
+ put_byte(s, (Byte)((s->gzhead->time >> 8) & 0xff));
+ put_byte(s, (Byte)((s->gzhead->time >> 16) & 0xff));
+ put_byte(s, (Byte)((s->gzhead->time >> 24) & 0xff));
+ put_byte(s, s->level == 9 ? 2 :
+ (s->strategy >= Z_HUFFMAN_ONLY || s->level < 2 ?
+ 4 : 0));
+ put_byte(s, s->gzhead->os & 0xff);
+ if (s->gzhead->extra != Z_NULL) {
+ put_byte(s, s->gzhead->extra_len & 0xff);
+ put_byte(s, (s->gzhead->extra_len >> 8) & 0xff);
+ }
+ if (s->gzhead->hcrc)
+ strm->adler = crc32(strm->adler, s->pending_buf,
+ s->pending);
+ s->gzindex = 0;
+ s->status = EXTRA_STATE;
+ }
+ }
+ else
#endif
- {
- uInt header = (Z_DEFLATED + ((s->w_bits-8)<<4)) << 8;
- uInt level_flags;
-
- if (s->strategy >= Z_HUFFMAN_ONLY || s->level < 2)
- level_flags = 0;
- else if (s->level < 6)
- level_flags = 1;
- else if (s->level == 6)
- level_flags = 2;
- else
- level_flags = 3;
- header |= (level_flags << 6);
- if (s->strstart != 0) header |= PRESET_DICT;
- header += 31 - (header % 31);
-
- s->status = BUSY_STATE;
- putShortMSB(s, header);
-
- /* Save the adler32 of the preset dictionary: */
- if (s->strstart != 0) {
- putShortMSB(s, (uInt)(strm->adler >> 16));
- putShortMSB(s, (uInt)(strm->adler & 0xffff));
- }
- strm->adler = adler32(0L, Z_NULL, 0);
- }
- }
+ {
+ uInt header = (Z_DEFLATED + ((s->w_bits-8)<<4)) << 8;
+ uInt level_flags;
+
+ if (s->strategy >= Z_HUFFMAN_ONLY || s->level < 2)
+ level_flags = 0;
+ else if (s->level < 6)
+ level_flags = 1;
+ else if (s->level == 6)
+ level_flags = 2;
+ else
+ level_flags = 3;
+ header |= (level_flags << 6);
+ if (s->strstart != 0) header |= PRESET_DICT;
+ header += 31 - (header % 31);
+
+ s->status = BUSY_STATE;
+ putShortMSB(s, header);
+
+ /* Save the adler32 of the preset dictionary: */
+ if (s->strstart != 0) {
+ putShortMSB(s, (uInt)(strm->adler >> 16));
+ putShortMSB(s, (uInt)(strm->adler & 0xffff));
+ }
+ strm->adler = adler32(0L, Z_NULL, 0);
+ }
+ }
#ifdef GZIP
- if (s->status == EXTRA_STATE) {
- if (s->gzhead->extra != Z_NULL) {
- uInt beg = s->pending; /* start of bytes to update crc */
-
- while (s->gzindex < (s->gzhead->extra_len & 0xffff)) {
- if (s->pending == s->pending_buf_size) {
- if (s->gzhead->hcrc && s->pending > beg)
- strm->adler = crc32(strm->adler, s->pending_buf + beg,
- s->pending - beg);
- flush_pending(strm);
- beg = s->pending;
- if (s->pending == s->pending_buf_size)
- break;
- }
- put_byte(s, s->gzhead->extra[s->gzindex]);
- s->gzindex++;
- }
- if (s->gzhead->hcrc && s->pending > beg)
- strm->adler = crc32(strm->adler, s->pending_buf + beg,
- s->pending - beg);
- if (s->gzindex == s->gzhead->extra_len) {
- s->gzindex = 0;
- s->status = NAME_STATE;
- }
- }
- else
- s->status = NAME_STATE;
- }
- if (s->status == NAME_STATE) {
- if (s->gzhead->name != Z_NULL) {
- uInt beg = s->pending; /* start of bytes to update crc */
- int val;
-
- do {
- if (s->pending == s->pending_buf_size) {
- if (s->gzhead->hcrc && s->pending > beg)
- strm->adler = crc32(strm->adler, s->pending_buf + beg,
- s->pending - beg);
- flush_pending(strm);
- beg = s->pending;
- if (s->pending == s->pending_buf_size) {
- val = 1;
- break;
- }
- }
- val = s->gzhead->name[s->gzindex++];
- put_byte(s, val);
- } while (val != 0);
- if (s->gzhead->hcrc && s->pending > beg)
- strm->adler = crc32(strm->adler, s->pending_buf + beg,
- s->pending - beg);
- if (val == 0) {
- s->gzindex = 0;
- s->status = COMMENT_STATE;
- }
- }
- else
- s->status = COMMENT_STATE;
- }
- if (s->status == COMMENT_STATE) {
- if (s->gzhead->comment != Z_NULL) {
- uInt beg = s->pending; /* start of bytes to update crc */
- int val;
-
- do {
- if (s->pending == s->pending_buf_size) {
- if (s->gzhead->hcrc && s->pending > beg)
- strm->adler = crc32(strm->adler, s->pending_buf + beg,
- s->pending - beg);
- flush_pending(strm);
- beg = s->pending;
- if (s->pending == s->pending_buf_size) {
- val = 1;
- break;
- }
- }
- val = s->gzhead->comment[s->gzindex++];
- put_byte(s, val);
- } while (val != 0);
- if (s->gzhead->hcrc && s->pending > beg)
- strm->adler = crc32(strm->adler, s->pending_buf + beg,
- s->pending - beg);
- if (val == 0)
- s->status = HCRC_STATE;
- }
- else
- s->status = HCRC_STATE;
- }
- if (s->status == HCRC_STATE) {
- if (s->gzhead->hcrc) {
- if (s->pending + 2 > s->pending_buf_size)
- flush_pending(strm);
- if (s->pending + 2 <= s->pending_buf_size) {
- put_byte(s, (Byte)(strm->adler & 0xff));
- put_byte(s, (Byte)((strm->adler >> 8) & 0xff));
- strm->adler = crc32(0L, Z_NULL, 0);
- s->status = BUSY_STATE;
- }
- }
- else
- s->status = BUSY_STATE;
- }
+ if (s->status == EXTRA_STATE) {
+ if (s->gzhead->extra != Z_NULL) {
+ uInt beg = s->pending; /* start of bytes to update crc */
+
+ while (s->gzindex < (s->gzhead->extra_len & 0xffff)) {
+ if (s->pending == s->pending_buf_size) {
+ if (s->gzhead->hcrc && s->pending > beg)
+ strm->adler = crc32(strm->adler, s->pending_buf + beg,
+ s->pending - beg);
+ flush_pending(strm);
+ beg = s->pending;
+ if (s->pending == s->pending_buf_size)
+ break;
+ }
+ put_byte(s, s->gzhead->extra[s->gzindex]);
+ s->gzindex++;
+ }
+ if (s->gzhead->hcrc && s->pending > beg)
+ strm->adler = crc32(strm->adler, s->pending_buf + beg,
+ s->pending - beg);
+ if (s->gzindex == s->gzhead->extra_len) {
+ s->gzindex = 0;
+ s->status = NAME_STATE;
+ }
+ }
+ else
+ s->status = NAME_STATE;
+ }
+ if (s->status == NAME_STATE) {
+ if (s->gzhead->name != Z_NULL) {
+ uInt beg = s->pending; /* start of bytes to update crc */
+ int val;
+
+ do {
+ if (s->pending == s->pending_buf_size) {
+ if (s->gzhead->hcrc && s->pending > beg)
+ strm->adler = crc32(strm->adler, s->pending_buf + beg,
+ s->pending - beg);
+ flush_pending(strm);
+ beg = s->pending;
+ if (s->pending == s->pending_buf_size) {
+ val = 1;
+ break;
+ }
+ }
+ val = s->gzhead->name[s->gzindex++];
+ put_byte(s, val);
+ } while (val != 0);
+ if (s->gzhead->hcrc && s->pending > beg)
+ strm->adler = crc32(strm->adler, s->pending_buf + beg,
+ s->pending - beg);
+ if (val == 0) {
+ s->gzindex = 0;
+ s->status = COMMENT_STATE;
+ }
+ }
+ else
+ s->status = COMMENT_STATE;
+ }
+ if (s->status == COMMENT_STATE) {
+ if (s->gzhead->comment != Z_NULL) {
+ uInt beg = s->pending; /* start of bytes to update crc */
+ int val;
+
+ do {
+ if (s->pending == s->pending_buf_size) {
+ if (s->gzhead->hcrc && s->pending > beg)
+ strm->adler = crc32(strm->adler, s->pending_buf + beg,
+ s->pending - beg);
+ flush_pending(strm);
+ beg = s->pending;
+ if (s->pending == s->pending_buf_size) {
+ val = 1;
+ break;
+ }
+ }
+ val = s->gzhead->comment[s->gzindex++];
+ put_byte(s, val);
+ } while (val != 0);
+ if (s->gzhead->hcrc && s->pending > beg)
+ strm->adler = crc32(strm->adler, s->pending_buf + beg,
+ s->pending - beg);
+ if (val == 0)
+ s->status = HCRC_STATE;
+ }
+ else
+ s->status = HCRC_STATE;
+ }
+ if (s->status == HCRC_STATE) {
+ if (s->gzhead->hcrc) {
+ if (s->pending + 2 > s->pending_buf_size)
+ flush_pending(strm);
+ if (s->pending + 2 <= s->pending_buf_size) {
+ put_byte(s, (Byte)(strm->adler & 0xff));
+ put_byte(s, (Byte)((strm->adler >> 8) & 0xff));
+ strm->adler = crc32(0L, Z_NULL, 0);
+ s->status = BUSY_STATE;
+ }
+ }
+ else
+ s->status = BUSY_STATE;
+ }
#endif
- /* Flush as much pending output as possible */
- if (s->pending != 0) {
- flush_pending(strm);
- if (strm->avail_out == 0) {
- /* Since avail_out is 0, deflate will be called again with
- * more output space, but possibly with both pending and
- * avail_in equal to zero. There won't be anything to do,
- * but this is not an error situation so make sure we
- * return OK instead of BUF_ERROR at next call of deflate:
- */
- s->last_flush = -1;
- return Z_OK;
- }
-
- /* Make sure there is something to do and avoid duplicate consecutive
- * flushes. For repeated and useless calls with Z_FINISH, we keep
- * returning Z_STREAM_END instead of Z_BUF_ERROR.
- */
- } else if (strm->avail_in == 0 && RANK(flush) <= RANK(old_flush) &&
- flush != Z_FINISH) {
- ERR_RETURN(strm, Z_BUF_ERROR);
- }
-
- /* User must not provide more input after the first FINISH: */
- if (s->status == FINISH_STATE && strm->avail_in != 0) {
- ERR_RETURN(strm, Z_BUF_ERROR);
- }
-
- /* Start a new block or continue the current one.
- */
- if (strm->avail_in != 0 || s->lookahead != 0 ||
- (flush != Z_NO_FLUSH && s->status != FINISH_STATE)) {
- block_state bstate;
-
- bstate = s->strategy == Z_HUFFMAN_ONLY ? deflate_huff(s, flush) :
- (s->strategy == Z_RLE ? deflate_rle(s, flush) :
- (*(configuration_table[s->level].func))(s, flush));
-
- if (bstate == finish_started || bstate == finish_done) {
- s->status = FINISH_STATE;
- }
- if (bstate == need_more || bstate == finish_started) {
- if (strm->avail_out == 0) {
- s->last_flush = -1; /* avoid BUF_ERROR next call, see above */
- }
- return Z_OK;
- /* If flush != Z_NO_FLUSH && avail_out == 0, the next call
- * of deflate should use the same flush parameter to make sure
- * that the flush is complete. So we don't have to output an
- * empty block here, this will be done at next call. This also
- * ensures that for a very small output buffer, we emit at most
- * one empty block.
- */
- }
- if (bstate == block_done) {
- if (flush == Z_PARTIAL_FLUSH) {
- _tr_align(s);
- } else if (flush != Z_BLOCK) { /* FULL_FLUSH or SYNC_FLUSH */
- _tr_stored_block(s, (char*)0, 0L, 0);
- /* For a full flush, this empty block will be recognized
- * as a special marker by inflate_sync().
- */
- if (flush == Z_FULL_FLUSH) {
- CLEAR_HASH(s); /* forget history */
- if (s->lookahead == 0) {
- s->strstart = 0;
- s->block_start = 0L;
- s->insert = 0;
- }
- }
- }
- flush_pending(strm);
- if (strm->avail_out == 0) {
- s->last_flush = -1; /* avoid BUF_ERROR at next call, see above */
- return Z_OK;
- }
- }
- }
- Assert(strm->avail_out > 0, "bug2");
-
- if (flush != Z_FINISH) return Z_OK;
- if (s->wrap <= 0) return Z_STREAM_END;
-
- /* Write the trailer */
+ /* Flush as much pending output as possible */
+ if (s->pending != 0) {
+ flush_pending(strm);
+ if (strm->avail_out == 0) {
+ /* Since avail_out is 0, deflate will be called again with
+ * more output space, but possibly with both pending and
+ * avail_in equal to zero. There won't be anything to do,
+ * but this is not an error situation so make sure we
+ * return OK instead of BUF_ERROR at next call of deflate:
+ */
+ s->last_flush = -1;
+ return Z_OK;
+ }
+
+ /* Make sure there is something to do and avoid duplicate consecutive
+ * flushes. For repeated and useless calls with Z_FINISH, we keep
+ * returning Z_STREAM_END instead of Z_BUF_ERROR.
+ */
+ } else if (strm->avail_in == 0 && RANK(flush) <= RANK(old_flush) &&
+ flush != Z_FINISH) {
+ ERR_RETURN(strm, Z_BUF_ERROR);
+ }
+
+ /* User must not provide more input after the first FINISH: */
+ if (s->status == FINISH_STATE && strm->avail_in != 0) {
+ ERR_RETURN(strm, Z_BUF_ERROR);
+ }
+
+ /* Start a new block or continue the current one.
+ */
+ if (strm->avail_in != 0 || s->lookahead != 0 ||
+ (flush != Z_NO_FLUSH && s->status != FINISH_STATE)) {
+ block_state bstate;
+
+ bstate = s->strategy == Z_HUFFMAN_ONLY ? deflate_huff(s, flush) :
+ (s->strategy == Z_RLE ? deflate_rle(s, flush) :
+ (*(configuration_table[s->level].func))(s, flush));
+
+ if (bstate == finish_started || bstate == finish_done) {
+ s->status = FINISH_STATE;
+ }
+ if (bstate == need_more || bstate == finish_started) {
+ if (strm->avail_out == 0) {
+ s->last_flush = -1; /* avoid BUF_ERROR next call, see above */
+ }
+ return Z_OK;
+ /* If flush != Z_NO_FLUSH && avail_out == 0, the next call
+ * of deflate should use the same flush parameter to make sure
+ * that the flush is complete. So we don't have to output an
+ * empty block here, this will be done at next call. This also
+ * ensures that for a very small output buffer, we emit at most
+ * one empty block.
+ */
+ }
+ if (bstate == block_done) {
+ if (flush == Z_PARTIAL_FLUSH) {
+ _tr_align(s);
+ } else if (flush != Z_BLOCK) { /* FULL_FLUSH or SYNC_FLUSH */
+ _tr_stored_block(s, (char*)0, 0L, 0);
+ /* For a full flush, this empty block will be recognized
+ * as a special marker by inflate_sync().
+ */
+ if (flush == Z_FULL_FLUSH) {
+ CLEAR_HASH(s); /* forget history */
+ if (s->lookahead == 0) {
+ s->strstart = 0;
+ s->block_start = 0L;
+ s->insert = 0;
+ }
+ }
+ }
+ flush_pending(strm);
+ if (strm->avail_out == 0) {
+ s->last_flush = -1; /* avoid BUF_ERROR at next call, see above */
+ return Z_OK;
+ }
+ }
+ }
+ Assert(strm->avail_out > 0, "bug2");
+
+ if (flush != Z_FINISH) return Z_OK;
+ if (s->wrap <= 0) return Z_STREAM_END;
+
+ /* Write the trailer */
#ifdef GZIP
- if (s->wrap == 2) {
- put_byte(s, (Byte)(strm->adler & 0xff));
- put_byte(s, (Byte)((strm->adler >> 8) & 0xff));
- put_byte(s, (Byte)((strm->adler >> 16) & 0xff));
- put_byte(s, (Byte)((strm->adler >> 24) & 0xff));
- put_byte(s, (Byte)(strm->total_in & 0xff));
- put_byte(s, (Byte)((strm->total_in >> 8) & 0xff));
- put_byte(s, (Byte)((strm->total_in >> 16) & 0xff));
- put_byte(s, (Byte)((strm->total_in >> 24) & 0xff));
- }
- else
+ if (s->wrap == 2) {
+ put_byte(s, (Byte)(strm->adler & 0xff));
+ put_byte(s, (Byte)((strm->adler >> 8) & 0xff));
+ put_byte(s, (Byte)((strm->adler >> 16) & 0xff));
+ put_byte(s, (Byte)((strm->adler >> 24) & 0xff));
+ put_byte(s, (Byte)(strm->total_in & 0xff));
+ put_byte(s, (Byte)((strm->total_in >> 8) & 0xff));
+ put_byte(s, (Byte)((strm->total_in >> 16) & 0xff));
+ put_byte(s, (Byte)((strm->total_in >> 24) & 0xff));
+ }
+ else
#endif
- {
- putShortMSB(s, (uInt)(strm->adler >> 16));
- putShortMSB(s, (uInt)(strm->adler & 0xffff));
- }
- flush_pending(strm);
- /* If avail_out is zero, the application will call deflate again
- * to flush the rest.
- */
- if (s->wrap > 0) s->wrap = -s->wrap; /* write the trailer only once! */
- return s->pending != 0 ? Z_OK : Z_STREAM_END;
+ {
+ putShortMSB(s, (uInt)(strm->adler >> 16));
+ putShortMSB(s, (uInt)(strm->adler & 0xffff));
+ }
+ flush_pending(strm);
+ /* If avail_out is zero, the application will call deflate again
+ * to flush the rest.
+ */
+ if (s->wrap > 0) s->wrap = -s->wrap; /* write the trailer only once! */
+ return s->pending != 0 ? Z_OK : Z_STREAM_END;
}
/* ========================================================================= */
int ZEXPORT deflateEnd (strm)
- z_streamp strm;
+ z_streamp strm;
{
- int status;
-
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
-
- status = strm->state->status;
- if (status != INIT_STATE &&
- status != EXTRA_STATE &&
- status != NAME_STATE &&
- status != COMMENT_STATE &&
- status != HCRC_STATE &&
- status != BUSY_STATE &&
- status != FINISH_STATE) {
- return Z_STREAM_ERROR;
- }
-
- /* Deallocate in reverse order of allocations: */
- TRY_FREE(strm, strm->state->pending_buf);
- TRY_FREE(strm, strm->state->head);
- TRY_FREE(strm, strm->state->prev);
- TRY_FREE(strm, strm->state->window);
-
- ZFREE(strm, strm->state);
- strm->state = Z_NULL;
-
- return status == BUSY_STATE ? Z_DATA_ERROR : Z_OK;
+ int status;
+
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+
+ status = strm->state->status;
+ if (status != INIT_STATE &&
+ status != EXTRA_STATE &&
+ status != NAME_STATE &&
+ status != COMMENT_STATE &&
+ status != HCRC_STATE &&
+ status != BUSY_STATE &&
+ status != FINISH_STATE) {
+ return Z_STREAM_ERROR;
+ }
+
+ /* Deallocate in reverse order of allocations: */
+ TRY_FREE(strm, strm->state->pending_buf);
+ TRY_FREE(strm, strm->state->head);
+ TRY_FREE(strm, strm->state->prev);
+ TRY_FREE(strm, strm->state->window);
+
+ ZFREE(strm, strm->state);
+ strm->state = Z_NULL;
+
+ return status == BUSY_STATE ? Z_DATA_ERROR : Z_OK;
}
/* =========================================================================
@@ -1010,57 +1010,57 @@ int ZEXPORT deflateEnd (strm)
* doesn't have enough memory anyway to duplicate compression states).
*/
int ZEXPORT deflateCopy (dest, source)
- z_streamp dest;
- z_streamp source;
+ z_streamp dest;
+ z_streamp source;
{
#ifdef MAXSEG_64K
- return Z_STREAM_ERROR;
+ return Z_STREAM_ERROR;
#else
- deflate_state *ds;
- deflate_state *ss;
- ushf *overlay;
-
-
- if (source == Z_NULL || dest == Z_NULL || source->state == Z_NULL) {
- return Z_STREAM_ERROR;
- }
-
- ss = source->state;
-
- zmemcpy((voidpf)dest, (voidpf)source, sizeof(z_stream));
-
- ds = (deflate_state *) ZALLOC(dest, 1, sizeof(deflate_state));
- if (ds == Z_NULL) return Z_MEM_ERROR;
- dest->state = (struct internal_state FAR *) ds;
- zmemcpy((voidpf)ds, (voidpf)ss, sizeof(deflate_state));
- ds->strm = dest;
-
- ds->window = (Bytef *) ZALLOC(dest, ds->w_size, 2*sizeof(Byte));
- ds->prev = (Posf *) ZALLOC(dest, ds->w_size, sizeof(Pos));
- ds->head = (Posf *) ZALLOC(dest, ds->hash_size, sizeof(Pos));
- overlay = (ushf *) ZALLOC(dest, ds->lit_bufsize, sizeof(ush)+2);
- ds->pending_buf = (uchf *) overlay;
-
- if (ds->window == Z_NULL || ds->prev == Z_NULL || ds->head == Z_NULL ||
- ds->pending_buf == Z_NULL) {
- deflateEnd (dest);
- return Z_MEM_ERROR;
- }
- /* following zmemcpy do not work for 16-bit MSDOS */
- zmemcpy(ds->window, ss->window, ds->w_size * 2 * sizeof(Byte));
- zmemcpy((voidpf)ds->prev, (voidpf)ss->prev, ds->w_size * sizeof(Pos));
- zmemcpy((voidpf)ds->head, (voidpf)ss->head, ds->hash_size * sizeof(Pos));
- zmemcpy(ds->pending_buf, ss->pending_buf, (uInt)ds->pending_buf_size);
-
- ds->pending_out = ds->pending_buf + (ss->pending_out - ss->pending_buf);
- ds->d_buf = overlay + ds->lit_bufsize/sizeof(ush);
- ds->l_buf = ds->pending_buf + (1+sizeof(ush))*ds->lit_bufsize;
-
- ds->l_desc.dyn_tree = ds->dyn_ltree;
- ds->d_desc.dyn_tree = ds->dyn_dtree;
- ds->bl_desc.dyn_tree = ds->bl_tree;
-
- return Z_OK;
+ deflate_state *ds;
+ deflate_state *ss;
+ ushf *overlay;
+
+
+ if (source == Z_NULL || dest == Z_NULL || source->state == Z_NULL) {
+ return Z_STREAM_ERROR;
+ }
+
+ ss = source->state;
+
+ zmemcpy((voidpf)dest, (voidpf)source, sizeof(z_stream));
+
+ ds = (deflate_state *) ZALLOC(dest, 1, sizeof(deflate_state));
+ if (ds == Z_NULL) return Z_MEM_ERROR;
+ dest->state = (struct internal_state FAR *) ds;
+ zmemcpy((voidpf)ds, (voidpf)ss, sizeof(deflate_state));
+ ds->strm = dest;
+
+ ds->window = (Bytef *) ZALLOC(dest, ds->w_size, 2*sizeof(Byte));
+ ds->prev = (Posf *) ZALLOC(dest, ds->w_size, sizeof(Pos));
+ ds->head = (Posf *) ZALLOC(dest, ds->hash_size, sizeof(Pos));
+ overlay = (ushf *) ZALLOC(dest, ds->lit_bufsize, sizeof(ush)+2);
+ ds->pending_buf = (uchf *) overlay;
+
+ if (ds->window == Z_NULL || ds->prev == Z_NULL || ds->head == Z_NULL ||
+ ds->pending_buf == Z_NULL) {
+ deflateEnd (dest);
+ return Z_MEM_ERROR;
+ }
+ /* following zmemcpy do not work for 16-bit MSDOS */
+ zmemcpy(ds->window, ss->window, ds->w_size * 2 * sizeof(Byte));
+ zmemcpy((voidpf)ds->prev, (voidpf)ss->prev, ds->w_size * sizeof(Pos));
+ zmemcpy((voidpf)ds->head, (voidpf)ss->head, ds->hash_size * sizeof(Pos));
+ zmemcpy(ds->pending_buf, ss->pending_buf, (uInt)ds->pending_buf_size);
+
+ ds->pending_out = ds->pending_buf + (ss->pending_out - ss->pending_buf);
+ ds->d_buf = overlay + ds->lit_bufsize/sizeof(ush);
+ ds->l_buf = ds->pending_buf + (1+sizeof(ush))*ds->lit_bufsize;
+
+ ds->l_desc.dyn_tree = ds->dyn_ltree;
+ ds->d_desc.dyn_tree = ds->dyn_dtree;
+ ds->bl_desc.dyn_tree = ds->bl_tree;
+
+ return Z_OK;
#endif /* MAXSEG_64K */
}
@@ -1072,59 +1072,59 @@ int ZEXPORT deflateCopy (dest, source)
* (See also flush_pending()).
*/
local int read_buf(strm, buf, size)
- z_streamp strm;
- Bytef *buf;
- unsigned size;
+ z_streamp strm;
+ Bytef *buf;
+ unsigned size;
{
- unsigned len = strm->avail_in;
+ unsigned len = strm->avail_in;
- if (len > size) len = size;
- if (len == 0) return 0;
+ if (len > size) len = size;
+ if (len == 0) return 0;
- strm->avail_in -= len;
+ strm->avail_in -= len;
- zmemcpy(buf, strm->next_in, len);
- if (strm->state->wrap == 1) {
- strm->adler = adler32(strm->adler, buf, len);
- }
+ zmemcpy(buf, strm->next_in, len);
+ if (strm->state->wrap == 1) {
+ strm->adler = adler32(strm->adler, buf, len);
+ }
#ifdef GZIP
- else if (strm->state->wrap == 2) {
- strm->adler = crc32(strm->adler, buf, len);
- }
+ else if (strm->state->wrap == 2) {
+ strm->adler = crc32(strm->adler, buf, len);
+ }
#endif
- strm->next_in += len;
- strm->total_in += len;
+ strm->next_in += len;
+ strm->total_in += len;
- return (int)len;
+ return (int)len;
}
/* ===========================================================================
* Initialize the "longest match" routines for a new zlib stream
*/
local void lm_init (s)
- deflate_state *s;
+ deflate_state *s;
{
- s->window_size = (ulg)2L*s->w_size;
-
- CLEAR_HASH(s);
-
- /* Set the default configuration parameters:
- */
- s->max_lazy_match = configuration_table[s->level].max_lazy;
- s->good_match = configuration_table[s->level].good_length;
- s->nice_match = configuration_table[s->level].nice_length;
- s->max_chain_length = configuration_table[s->level].max_chain;
-
- s->strstart = 0;
- s->block_start = 0L;
- s->lookahead = 0;
- s->insert = 0;
- s->match_length = s->prev_length = MIN_MATCH-1;
- s->match_available = 0;
- s->ins_h = 0;
+ s->window_size = (ulg)2L*s->w_size;
+
+ CLEAR_HASH(s);
+
+ /* Set the default configuration parameters:
+ */
+ s->max_lazy_match = configuration_table[s->level].max_lazy;
+ s->good_match = configuration_table[s->level].good_length;
+ s->nice_match = configuration_table[s->level].nice_length;
+ s->max_chain_length = configuration_table[s->level].max_chain;
+
+ s->strstart = 0;
+ s->block_start = 0L;
+ s->lookahead = 0;
+ s->insert = 0;
+ s->match_length = s->prev_length = MIN_MATCH-1;
+ s->match_available = 0;
+ s->ins_h = 0;
#ifndef FASTEST
#ifdef ASMV
- match_init(); /* initialize the asm code */
+ match_init(); /* initialize the asm code */
#endif
#endif
}
@@ -1144,146 +1144,146 @@ local void lm_init (s)
* match.S. The code will be functionally equivalent.
*/
local uInt longest_match(s, cur_match)
- deflate_state *s;
- IPos cur_match; /* current match */
+ deflate_state *s;
+ IPos cur_match; /* current match */
{
- unsigned chain_length = s->max_chain_length;/* max hash chain length */
- register Bytef *scan = s->window + s->strstart; /* current string */
- register Bytef *match; /* matched string */
- register int len; /* length of current match */
- int best_len = s->prev_length; /* best match length so far */
- int nice_match = s->nice_match; /* stop if match long enough */
- IPos limit = s->strstart > (IPos)MAX_DIST(s) ?
- s->strstart - (IPos)MAX_DIST(s) : NIL;
- /* Stop when cur_match becomes <= limit. To simplify the code,
- * we prevent matches with the string of window index 0.
- */
- Posf *prev = s->prev;
- uInt wmask = s->w_mask;
+ unsigned chain_length = s->max_chain_length;/* max hash chain length */
+ register Bytef *scan = s->window + s->strstart; /* current string */
+ register Bytef *match; /* matched string */
+ register int len; /* length of current match */
+ int best_len = s->prev_length; /* best match length so far */
+ int nice_match = s->nice_match; /* stop if match long enough */
+ IPos limit = s->strstart > (IPos)MAX_DIST(s) ?
+ s->strstart - (IPos)MAX_DIST(s) : NIL;
+ /* Stop when cur_match becomes <= limit. To simplify the code,
+ * we prevent matches with the string of window index 0.
+ */
+ Posf *prev = s->prev;
+ uInt wmask = s->w_mask;
#ifdef UNALIGNED_OK
- /* Compare two bytes at a time. Note: this is not always beneficial.
- * Try with and without -DUNALIGNED_OK to check.
- */
- register Bytef *strend = s->window + s->strstart + MAX_MATCH - 1;
- register ush scan_start = *(ushf*)scan;
- register ush scan_end = *(ushf*)(scan+best_len-1);
+ /* Compare two bytes at a time. Note: this is not always beneficial.
+ * Try with and without -DUNALIGNED_OK to check.
+ */
+ register Bytef *strend = s->window + s->strstart + MAX_MATCH - 1;
+ register ush scan_start = *(ushf*)scan;
+ register ush scan_end = *(ushf*)(scan+best_len-1);
#else
- register Bytef *strend = s->window + s->strstart + MAX_MATCH;
- register Byte scan_end1 = scan[best_len-1];
- register Byte scan_end = scan[best_len];
+ register Bytef *strend = s->window + s->strstart + MAX_MATCH;
+ register Byte scan_end1 = scan[best_len-1];
+ register Byte scan_end = scan[best_len];
#endif
- /* The code is optimized for HASH_BITS >= 8 and MAX_MATCH-2 multiple of 16.
- * It is easy to get rid of this optimization if necessary.
- */
- Assert(s->hash_bits >= 8 && MAX_MATCH == 258, "Code too clever");
-
- /* Do not waste too much time if we already have a good match: */
- if (s->prev_length >= s->good_match) {
- chain_length >>= 2;
- }
- /* Do not look for matches beyond the end of the input. This is necessary
- * to make deflate deterministic.
- */
- if ((uInt)nice_match > s->lookahead) nice_match = s->lookahead;
-
- Assert((ulg)s->strstart <= s->window_size-MIN_LOOKAHEAD, "need lookahead");
-
- do {
- Assert(cur_match < s->strstart, "no future");
- match = s->window + cur_match;
-
- /* Skip to next match if the match length cannot increase
- * or if the match length is less than 2. Note that the checks below
- * for insufficient lookahead only occur occasionally for performance
- * reasons. Therefore uninitialized memory will be accessed, and
- * conditional jumps will be made that depend on those values.
- * However the length of the match is limited to the lookahead, so
- * the output of deflate is not affected by the uninitialized values.
- */
+ /* The code is optimized for HASH_BITS >= 8 and MAX_MATCH-2 multiple of 16.
+ * It is easy to get rid of this optimization if necessary.
+ */
+ Assert(s->hash_bits >= 8 && MAX_MATCH == 258, "Code too clever");
+
+ /* Do not waste too much time if we already have a good match: */
+ if (s->prev_length >= s->good_match) {
+ chain_length >>= 2;
+ }
+ /* Do not look for matches beyond the end of the input. This is necessary
+ * to make deflate deterministic.
+ */
+ if ((uInt)nice_match > s->lookahead) nice_match = s->lookahead;
+
+ Assert((ulg)s->strstart <= s->window_size-MIN_LOOKAHEAD, "need lookahead");
+
+ do {
+ Assert(cur_match < s->strstart, "no future");
+ match = s->window + cur_match;
+
+ /* Skip to next match if the match length cannot increase
+ * or if the match length is less than 2. Note that the checks below
+ * for insufficient lookahead only occur occasionally for performance
+ * reasons. Therefore uninitialized memory will be accessed, and
+ * conditional jumps will be made that depend on those values.
+ * However the length of the match is limited to the lookahead, so
+ * the output of deflate is not affected by the uninitialized values.
+ */
#if (defined(UNALIGNED_OK) && MAX_MATCH == 258)
- /* This code assumes sizeof(unsigned short) == 2. Do not use
- * UNALIGNED_OK if your compiler uses a different size.
- */
- if (*(ushf*)(match+best_len-1) != scan_end ||
- *(ushf*)match != scan_start) continue;
-
- /* It is not necessary to compare scan[2] and match[2] since they are
- * always equal when the other bytes match, given that the hash keys
- * are equal and that HASH_BITS >= 8. Compare 2 bytes at a time at
- * strstart+3, +5, ... up to strstart+257. We check for insufficient
- * lookahead only every 4th comparison; the 128th check will be made
- * at strstart+257. If MAX_MATCH-2 is not a multiple of 8, it is
- * necessary to put more guard bytes at the end of the window, or
- * to check more often for insufficient lookahead.
- */
- Assert(scan[2] == match[2], "scan[2]?");
- scan++, match++;
- do {
- } while (*(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
- *(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
- *(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
- *(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
- scan < strend);
- /* The funny "do {}" generates better code on most compilers */
-
- /* Here, scan <= window+strstart+257 */
- Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan");
- if (*scan == *match) scan++;
-
- len = (MAX_MATCH - 1) - (int)(strend-scan);
- scan = strend - (MAX_MATCH-1);
+ /* This code assumes sizeof(unsigned short) == 2. Do not use
+ * UNALIGNED_OK if your compiler uses a different size.
+ */
+ if (*(ushf*)(match+best_len-1) != scan_end ||
+ *(ushf*)match != scan_start) continue;
+
+ /* It is not necessary to compare scan[2] and match[2] since they are
+ * always equal when the other bytes match, given that the hash keys
+ * are equal and that HASH_BITS >= 8. Compare 2 bytes at a time at
+ * strstart+3, +5, ... up to strstart+257. We check for insufficient
+ * lookahead only every 4th comparison; the 128th check will be made
+ * at strstart+257. If MAX_MATCH-2 is not a multiple of 8, it is
+ * necessary to put more guard bytes at the end of the window, or
+ * to check more often for insufficient lookahead.
+ */
+ Assert(scan[2] == match[2], "scan[2]?");
+ scan++, match++;
+ do {
+ } while (*(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
+ *(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
+ *(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
+ *(ushf*)(scan+=2) == *(ushf*)(match+=2) &&
+ scan < strend);
+ /* The funny "do {}" generates better code on most compilers */
+
+ /* Here, scan <= window+strstart+257 */
+ Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan");
+ if (*scan == *match) scan++;
+
+ len = (MAX_MATCH - 1) - (int)(strend-scan);
+ scan = strend - (MAX_MATCH-1);
#else /* UNALIGNED_OK */
- if (match[best_len] != scan_end ||
- match[best_len-1] != scan_end1 ||
- *match != *scan ||
- *++match != scan[1]) continue;
-
- /* The check at best_len-1 can be removed because it will be made
- * again later. (This heuristic is not always a win.)
- * It is not necessary to compare scan[2] and match[2] since they
- * are always equal when the other bytes match, given that
- * the hash keys are equal and that HASH_BITS >= 8.
- */
- scan += 2, match++;
- Assert(*scan == *match, "match[2]?");
-
- /* We check for insufficient lookahead only every 8th comparison;
- * the 256th check will be made at strstart+258.
- */
- do {
- } while (*++scan == *++match && *++scan == *++match &&
- *++scan == *++match && *++scan == *++match &&
- *++scan == *++match && *++scan == *++match &&
- *++scan == *++match && *++scan == *++match &&
- scan < strend);
-
- Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan");
-
- len = MAX_MATCH - (int)(strend - scan);
- scan = strend - MAX_MATCH;
+ if (match[best_len] != scan_end ||
+ match[best_len-1] != scan_end1 ||
+ *match != *scan ||
+ *++match != scan[1]) continue;
+
+ /* The check at best_len-1 can be removed because it will be made
+ * again later. (This heuristic is not always a win.)
+ * It is not necessary to compare scan[2] and match[2] since they
+ * are always equal when the other bytes match, given that
+ * the hash keys are equal and that HASH_BITS >= 8.
+ */
+ scan += 2, match++;
+ Assert(*scan == *match, "match[2]?");
+
+ /* We check for insufficient lookahead only every 8th comparison;
+ * the 256th check will be made at strstart+258.
+ */
+ do {
+ } while (*++scan == *++match && *++scan == *++match &&
+ *++scan == *++match && *++scan == *++match &&
+ *++scan == *++match && *++scan == *++match &&
+ *++scan == *++match && *++scan == *++match &&
+ scan < strend);
+
+ Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan");
+
+ len = MAX_MATCH - (int)(strend - scan);
+ scan = strend - MAX_MATCH;
#endif /* UNALIGNED_OK */
- if (len > best_len) {
- s->match_start = cur_match;
- best_len = len;
- if (len >= nice_match) break;
+ if (len > best_len) {
+ s->match_start = cur_match;
+ best_len = len;
+ if (len >= nice_match) break;
#ifdef UNALIGNED_OK
- scan_end = *(ushf*)(scan+best_len-1);
+ scan_end = *(ushf*)(scan+best_len-1);
#else
- scan_end1 = scan[best_len-1];
- scan_end = scan[best_len];
+ scan_end1 = scan[best_len-1];
+ scan_end = scan[best_len];
#endif
- }
- } while ((cur_match = prev[cur_match & wmask]) > limit
- && --chain_length != 0);
+ }
+ } while ((cur_match = prev[cur_match & wmask]) > limit
+ && --chain_length != 0);
- if ((uInt)best_len <= s->lookahead) return (uInt)best_len;
- return s->lookahead;
+ if ((uInt)best_len <= s->lookahead) return (uInt)best_len;
+ return s->lookahead;
}
#endif /* ASMV */
@@ -1293,56 +1293,56 @@ local uInt longest_match(s, cur_match)
* Optimized version for FASTEST only
*/
local uInt longest_match(s, cur_match)
- deflate_state *s;
- IPos cur_match; /* current match */
+ deflate_state *s;
+ IPos cur_match; /* current match */
{
- register Bytef *scan = s->window + s->strstart; /* current string */
- register Bytef *match; /* matched string */
- register int len; /* length of current match */
- register Bytef *strend = s->window + s->strstart + MAX_MATCH;
+ register Bytef *scan = s->window + s->strstart; /* current string */
+ register Bytef *match; /* matched string */
+ register int len; /* length of current match */
+ register Bytef *strend = s->window + s->strstart + MAX_MATCH;
- /* The code is optimized for HASH_BITS >= 8 and MAX_MATCH-2 multiple of 16.
- * It is easy to get rid of this optimization if necessary.
- */
- Assert(s->hash_bits >= 8 && MAX_MATCH == 258, "Code too clever");
+ /* The code is optimized for HASH_BITS >= 8 and MAX_MATCH-2 multiple of 16.
+ * It is easy to get rid of this optimization if necessary.
+ */
+ Assert(s->hash_bits >= 8 && MAX_MATCH == 258, "Code too clever");
- Assert((ulg)s->strstart <= s->window_size-MIN_LOOKAHEAD, "need lookahead");
+ Assert((ulg)s->strstart <= s->window_size-MIN_LOOKAHEAD, "need lookahead");
- Assert(cur_match < s->strstart, "no future");
+ Assert(cur_match < s->strstart, "no future");
- match = s->window + cur_match;
+ match = s->window + cur_match;
- /* Return failure if the match length is less than 2:
- */
- if (match[0] != scan[0] || match[1] != scan[1]) return MIN_MATCH-1;
+ /* Return failure if the match length is less than 2:
+ */
+ if (match[0] != scan[0] || match[1] != scan[1]) return MIN_MATCH-1;
- /* The check at best_len-1 can be removed because it will be made
- * again later. (This heuristic is not always a win.)
- * It is not necessary to compare scan[2] and match[2] since they
- * are always equal when the other bytes match, given that
- * the hash keys are equal and that HASH_BITS >= 8.
- */
- scan += 2, match += 2;
- Assert(*scan == *match, "match[2]?");
+ /* The check at best_len-1 can be removed because it will be made
+ * again later. (This heuristic is not always a win.)
+ * It is not necessary to compare scan[2] and match[2] since they
+ * are always equal when the other bytes match, given that
+ * the hash keys are equal and that HASH_BITS >= 8.
+ */
+ scan += 2, match += 2;
+ Assert(*scan == *match, "match[2]?");
- /* We check for insufficient lookahead only every 8th comparison;
- * the 256th check will be made at strstart+258.
- */
- do {
- } while (*++scan == *++match && *++scan == *++match &&
- *++scan == *++match && *++scan == *++match &&
- *++scan == *++match && *++scan == *++match &&
- *++scan == *++match && *++scan == *++match &&
- scan < strend);
+ /* We check for insufficient lookahead only every 8th comparison;
+ * the 256th check will be made at strstart+258.
+ */
+ do {
+ } while (*++scan == *++match && *++scan == *++match &&
+ *++scan == *++match && *++scan == *++match &&
+ *++scan == *++match && *++scan == *++match &&
+ *++scan == *++match && *++scan == *++match &&
+ scan < strend);
- Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan");
+ Assert(scan <= s->window+(unsigned)(s->window_size-1), "wild scan");
- len = MAX_MATCH - (int)(strend - scan);
+ len = MAX_MATCH - (int)(strend - scan);
- if (len < MIN_MATCH) return MIN_MATCH - 1;
+ if (len < MIN_MATCH) return MIN_MATCH - 1;
- s->match_start = cur_match;
- return (uInt)len <= s->lookahead ? (uInt)len : s->lookahead;
+ s->match_start = cur_match;
+ return (uInt)len <= s->lookahead ? (uInt)len : s->lookahead;
}
#endif /* FASTEST */
@@ -1352,24 +1352,24 @@ local uInt longest_match(s, cur_match)
* Check that the match at match_start is indeed a match.
*/
local void check_match(s, start, match, length)
- deflate_state *s;
- IPos start, match;
- int length;
+ deflate_state *s;
+ IPos start, match;
+ int length;
{
- /* check that the match is indeed a match */
- if (zmemcmp(s->window + match,
- s->window + start, length) != EQUAL) {
- fprintf(stderr, " start %u, match %u, length %d\n",
- start, match, length);
- do {
- fprintf(stderr, "%c%c", s->window[match++], s->window[start++]);
- } while (--length != 0);
- z_error("invalid match");
- }
- if (z_verbose > 1) {
- fprintf(stderr,"\\[%d,%d]", start-match, length);
- do { putc(s->window[start++], stderr); } while (--length != 0);
- }
+ /* check that the match is indeed a match */
+ if (zmemcmp(s->window + match,
+ s->window + start, length) != EQUAL) {
+ fprintf(stderr, " start %u, match %u, length %d\n",
+ start, match, length);
+ do {
+ fprintf(stderr, "%c%c", s->window[match++], s->window[start++]);
+ } while (--length != 0);
+ z_error("invalid match");
+ }
+ if (z_verbose > 1) {
+ fprintf(stderr,"\\[%d,%d]", start-match, length);
+ do { putc(s->window[start++], stderr); } while (--length != 0);
+ }
}
#else
# define check_match(s, start, match, length)
@@ -1386,147 +1386,147 @@ local void check_match(s, start, match, length)
* option -- not supported here).
*/
local void fill_window(s)
- deflate_state *s;
+ deflate_state *s;
{
- register unsigned n, m;
- register Posf *p;
- unsigned more; /* Amount of free space at the end of the window. */
- uInt wsize = s->w_size;
-
- Assert(s->lookahead < MIN_LOOKAHEAD, "already enough lookahead");
-
- do {
- more = (unsigned)(s->window_size -(ulg)s->lookahead -(ulg)s->strstart);
-
- /* Deal with !@#$% 64K limit: */
- if (sizeof(int) <= 2) {
- if (more == 0 && s->strstart == 0 && s->lookahead == 0) {
- more = wsize;
-
- } else if (more == (unsigned)(-1)) {
- /* Very unlikely, but possible on 16 bit machine if
- * strstart == 0 && lookahead == 1 (input done a byte at time)
- */
- more--;
- }
- }
-
- /* If the window is almost full and there is insufficient lookahead,
- * move the upper half to the lower one to make room in the upper half.
- */
- if (s->strstart >= wsize+MAX_DIST(s)) {
-
- zmemcpy(s->window, s->window+wsize, (unsigned)wsize);
- s->match_start -= wsize;
- s->strstart -= wsize; /* we now have strstart >= MAX_DIST */
- s->block_start -= (long) wsize;
-
- /* Slide the hash table (could be avoided with 32 bit values
- at the expense of memory usage). We slide even when level == 0
- to keep the hash table consistent if we switch back to level > 0
- later. (Using level 0 permanently is not an optimal usage of
- zlib, so we don't care about this pathological case.)
- */
- n = s->hash_size;
- p = &s->head[n];
- do {
- m = *--p;
- *p = (Pos)(m >= wsize ? m-wsize : NIL);
- } while (--n);
-
- n = wsize;
+ register unsigned n, m;
+ register Posf *p;
+ unsigned more; /* Amount of free space at the end of the window. */
+ uInt wsize = s->w_size;
+
+ Assert(s->lookahead < MIN_LOOKAHEAD, "already enough lookahead");
+
+ do {
+ more = (unsigned)(s->window_size -(ulg)s->lookahead -(ulg)s->strstart);
+
+ /* Deal with !@#$% 64K limit: */
+ if (sizeof(int) <= 2) {
+ if (more == 0 && s->strstart == 0 && s->lookahead == 0) {
+ more = wsize;
+
+ } else if (more == (unsigned)(-1)) {
+ /* Very unlikely, but possible on 16 bit machine if
+ * strstart == 0 && lookahead == 1 (input done a byte at time)
+ */
+ more--;
+ }
+ }
+
+ /* If the window is almost full and there is insufficient lookahead,
+ * move the upper half to the lower one to make room in the upper half.
+ */
+ if (s->strstart >= wsize+MAX_DIST(s)) {
+
+ zmemcpy(s->window, s->window+wsize, (unsigned)wsize);
+ s->match_start -= wsize;
+ s->strstart -= wsize; /* we now have strstart >= MAX_DIST */
+ s->block_start -= (long) wsize;
+
+ /* Slide the hash table (could be avoided with 32 bit values
+ at the expense of memory usage). We slide even when level == 0
+ to keep the hash table consistent if we switch back to level > 0
+ later. (Using level 0 permanently is not an optimal usage of
+ zlib, so we don't care about this pathological case.)
+ */
+ n = s->hash_size;
+ p = &s->head[n];
+ do {
+ m = *--p;
+ *p = (Pos)(m >= wsize ? m-wsize : NIL);
+ } while (--n);
+
+ n = wsize;
#ifndef FASTEST
- p = &s->prev[n];
- do {
- m = *--p;
- *p = (Pos)(m >= wsize ? m-wsize : NIL);
- /* If n is not on any hash chain, prev[n] is garbage but
- * its value will never be used.
- */
- } while (--n);
+ p = &s->prev[n];
+ do {
+ m = *--p;
+ *p = (Pos)(m >= wsize ? m-wsize : NIL);
+ /* If n is not on any hash chain, prev[n] is garbage but
+ * its value will never be used.
+ */
+ } while (--n);
#endif
- more += wsize;
- }
- if (s->strm->avail_in == 0) break;
-
- /* If there was no sliding:
- * strstart <= WSIZE+MAX_DIST-1 && lookahead <= MIN_LOOKAHEAD - 1 &&
- * more == window_size - lookahead - strstart
- * => more >= window_size - (MIN_LOOKAHEAD-1 + WSIZE + MAX_DIST-1)
- * => more >= window_size - 2*WSIZE + 2
- * In the BIG_MEM or MMAP case (not yet supported),
- * window_size == input_size + MIN_LOOKAHEAD &&
- * strstart + s->lookahead <= input_size => more >= MIN_LOOKAHEAD.
- * Otherwise, window_size == 2*WSIZE so more >= 2.
- * If there was sliding, more >= WSIZE. So in all cases, more >= 2.
- */
- Assert(more >= 2, "more < 2");
-
- n = read_buf(s->strm, s->window + s->strstart + s->lookahead, more);
- s->lookahead += n;
-
- /* Initialize the hash value now that we have some input: */
- if (s->lookahead + s->insert >= MIN_MATCH) {
- uInt str = s->strstart - s->insert;
- s->ins_h = s->window[str];
- UPDATE_HASH(s, s->ins_h, s->window[str + 1]);
+ more += wsize;
+ }
+ if (s->strm->avail_in == 0) break;
+
+ /* If there was no sliding:
+ * strstart <= WSIZE+MAX_DIST-1 && lookahead <= MIN_LOOKAHEAD - 1 &&
+ * more == window_size - lookahead - strstart
+ * => more >= window_size - (MIN_LOOKAHEAD-1 + WSIZE + MAX_DIST-1)
+ * => more >= window_size - 2*WSIZE + 2
+ * In the BIG_MEM or MMAP case (not yet supported),
+ * window_size == input_size + MIN_LOOKAHEAD &&
+ * strstart + s->lookahead <= input_size => more >= MIN_LOOKAHEAD.
+ * Otherwise, window_size == 2*WSIZE so more >= 2.
+ * If there was sliding, more >= WSIZE. So in all cases, more >= 2.
+ */
+ Assert(more >= 2, "more < 2");
+
+ n = read_buf(s->strm, s->window + s->strstart + s->lookahead, more);
+ s->lookahead += n;
+
+ /* Initialize the hash value now that we have some input: */
+ if (s->lookahead + s->insert >= MIN_MATCH) {
+ uInt str = s->strstart - s->insert;
+ s->ins_h = s->window[str];
+ UPDATE_HASH(s, s->ins_h, s->window[str + 1]);
#if MIN_MATCH != 3
- Call UPDATE_HASH() MIN_MATCH-3 more times
+ Call UPDATE_HASH() MIN_MATCH-3 more times
#endif
- while (s->insert) {
- UPDATE_HASH(s, s->ins_h, s->window[str + MIN_MATCH-1]);
+ while (s->insert) {
+ UPDATE_HASH(s, s->ins_h, s->window[str + MIN_MATCH-1]);
#ifndef FASTEST
- s->prev[str & s->w_mask] = s->head[s->ins_h];
+ s->prev[str & s->w_mask] = s->head[s->ins_h];
#endif
- s->head[s->ins_h] = (Pos)str;
- str++;
- s->insert--;
- if (s->lookahead + s->insert < MIN_MATCH)
- break;
- }
- }
- /* If the whole input has less than MIN_MATCH bytes, ins_h is garbage,
- * but this is not important since only literal bytes will be emitted.
- */
-
- } while (s->lookahead < MIN_LOOKAHEAD && s->strm->avail_in != 0);
-
- /* If the WIN_INIT bytes after the end of the current data have never been
- * written, then zero those bytes in order to avoid memory check reports of
- * the use of uninitialized (or uninitialised as Julian writes) bytes by
- * the longest match routines. Update the high water mark for the next
- * time through here. WIN_INIT is set to MAX_MATCH since the longest match
- * routines allow scanning to strstart + MAX_MATCH, ignoring lookahead.
- */
- if (s->high_water < s->window_size) {
- ulg curr = s->strstart + (ulg)(s->lookahead);
- ulg init;
-
- if (s->high_water < curr) {
- /* Previous high water mark below current data -- zero WIN_INIT
- * bytes or up to end of window, whichever is less.
- */
- init = s->window_size - curr;
- if (init > WIN_INIT)
- init = WIN_INIT;
- zmemzero(s->window + curr, (unsigned)init);
- s->high_water = curr + init;
- }
- else if (s->high_water < (ulg)curr + WIN_INIT) {
- /* High water mark at or above current data, but below current data
- * plus WIN_INIT -- zero out to current data plus WIN_INIT, or up
- * to end of window, whichever is less.
- */
- init = (ulg)curr + WIN_INIT - s->high_water;
- if (init > s->window_size - s->high_water)
- init = s->window_size - s->high_water;
- zmemzero(s->window + s->high_water, (unsigned)init);
- s->high_water += init;
- }
- }
-
- Assert((ulg)s->strstart <= s->window_size - MIN_LOOKAHEAD,
- "not enough room for search");
+ s->head[s->ins_h] = (Pos)str;
+ str++;
+ s->insert--;
+ if (s->lookahead + s->insert < MIN_MATCH)
+ break;
+ }
+ }
+ /* If the whole input has less than MIN_MATCH bytes, ins_h is garbage,
+ * but this is not important since only literal bytes will be emitted.
+ */
+
+ } while (s->lookahead < MIN_LOOKAHEAD && s->strm->avail_in != 0);
+
+ /* If the WIN_INIT bytes after the end of the current data have never been
+ * written, then zero those bytes in order to avoid memory check reports of
+ * the use of uninitialized (or uninitialised as Julian writes) bytes by
+ * the longest match routines. Update the high water mark for the next
+ * time through here. WIN_INIT is set to MAX_MATCH since the longest match
+ * routines allow scanning to strstart + MAX_MATCH, ignoring lookahead.
+ */
+ if (s->high_water < s->window_size) {
+ ulg curr = s->strstart + (ulg)(s->lookahead);
+ ulg init;
+
+ if (s->high_water < curr) {
+ /* Previous high water mark below current data -- zero WIN_INIT
+ * bytes or up to end of window, whichever is less.
+ */
+ init = s->window_size - curr;
+ if (init > WIN_INIT)
+ init = WIN_INIT;
+ zmemzero(s->window + curr, (unsigned)init);
+ s->high_water = curr + init;
+ }
+ else if (s->high_water < (ulg)curr + WIN_INIT) {
+ /* High water mark at or above current data, but below current data
+ * plus WIN_INIT -- zero out to current data plus WIN_INIT, or up
+ * to end of window, whichever is less.
+ */
+ init = (ulg)curr + WIN_INIT - s->high_water;
+ if (init > s->window_size - s->high_water)
+ init = s->window_size - s->high_water;
+ zmemzero(s->window + s->high_water, (unsigned)init);
+ s->high_water += init;
+ }
+ }
+
+ Assert((ulg)s->strstart <= s->window_size - MIN_LOOKAHEAD,
+ "not enough room for search");
}
/* ===========================================================================
@@ -1534,20 +1534,20 @@ local void fill_window(s)
* IN assertion: strstart is set to the end of the current match.
*/
#define FLUSH_BLOCK_ONLY(s, last) { \
- _tr_flush_block(s, (s->block_start >= 0L ? \
- (charf *)&s->window[(unsigned)s->block_start] : \
- (charf *)Z_NULL), \
- (ulg)((long)s->strstart - s->block_start), \
- (last)); \
- s->block_start = s->strstart; \
- flush_pending(s->strm); \
- Tracev((stderr,"[FLUSH]")); \
+ _tr_flush_block(s, (s->block_start >= 0L ? \
+ (charf *)&s->window[(unsigned)s->block_start] : \
+ (charf *)Z_NULL), \
+ (ulg)((long)s->strstart - s->block_start), \
+ (last)); \
+ s->block_start = s->strstart; \
+ flush_pending(s->strm); \
+ Tracev((stderr,"[FLUSH]")); \
}
/* Same but force premature exit if necessary. */
#define FLUSH_BLOCK(s, last) { \
- FLUSH_BLOCK_ONLY(s, last); \
- if (s->strm->avail_out == 0) return (last) ? finish_started : need_more; \
+ FLUSH_BLOCK_ONLY(s, last); \
+ if (s->strm->avail_out == 0) return (last) ? finish_started : need_more; \
}
/* ===========================================================================
@@ -1560,60 +1560,60 @@ local void fill_window(s)
* window to pending_buf.
*/
local block_state deflate_stored(s, flush)
- deflate_state *s;
- int flush;
+ deflate_state *s;
+ int flush;
{
- /* Stored blocks are limited to 0xffff bytes, pending_buf is limited
- * to pending_buf_size, and each stored block has a 5 byte header:
- */
- ulg max_block_size = 0xffff;
- ulg max_start;
-
- if (max_block_size > s->pending_buf_size - 5) {
- max_block_size = s->pending_buf_size - 5;
- }
-
- /* Copy as much as possible from input to output: */
- for (;;) {
- /* Fill the window as much as possible: */
- if (s->lookahead <= 1) {
-
- Assert(s->strstart < s->w_size+MAX_DIST(s) ||
- s->block_start >= (long)s->w_size, "slide too late");
-
- fill_window(s);
- if (s->lookahead == 0 && flush == Z_NO_FLUSH) return need_more;
-
- if (s->lookahead == 0) break; /* flush the current block */
- }
- Assert(s->block_start >= 0L, "block gone");
-
- s->strstart += s->lookahead;
- s->lookahead = 0;
-
- /* Emit a stored block if pending_buf will be full: */
- max_start = s->block_start + max_block_size;
- if (s->strstart == 0 || (ulg)s->strstart >= max_start) {
- /* strstart == 0 is possible when wraparound on 16-bit machine */
- s->lookahead = (uInt)(s->strstart - max_start);
- s->strstart = (uInt)max_start;
- FLUSH_BLOCK(s, 0);
- }
- /* Flush if we may have to slide, otherwise block_start may become
- * negative and the data will be gone:
- */
- if (s->strstart - (uInt)s->block_start >= MAX_DIST(s)) {
- FLUSH_BLOCK(s, 0);
- }
- }
- s->insert = 0;
- if (flush == Z_FINISH) {
- FLUSH_BLOCK(s, 1);
- return finish_done;
- }
- if ((long)s->strstart > s->block_start)
- FLUSH_BLOCK(s, 0);
- return block_done;
+ /* Stored blocks are limited to 0xffff bytes, pending_buf is limited
+ * to pending_buf_size, and each stored block has a 5 byte header:
+ */
+ ulg max_block_size = 0xffff;
+ ulg max_start;
+
+ if (max_block_size > s->pending_buf_size - 5) {
+ max_block_size = s->pending_buf_size - 5;
+ }
+
+ /* Copy as much as possible from input to output: */
+ for (;;) {
+ /* Fill the window as much as possible: */
+ if (s->lookahead <= 1) {
+
+ Assert(s->strstart < s->w_size+MAX_DIST(s) ||
+ s->block_start >= (long)s->w_size, "slide too late");
+
+ fill_window(s);
+ if (s->lookahead == 0 && flush == Z_NO_FLUSH) return need_more;
+
+ if (s->lookahead == 0) break; /* flush the current block */
+ }
+ Assert(s->block_start >= 0L, "block gone");
+
+ s->strstart += s->lookahead;
+ s->lookahead = 0;
+
+ /* Emit a stored block if pending_buf will be full: */
+ max_start = s->block_start + max_block_size;
+ if (s->strstart == 0 || (ulg)s->strstart >= max_start) {
+ /* strstart == 0 is possible when wraparound on 16-bit machine */
+ s->lookahead = (uInt)(s->strstart - max_start);
+ s->strstart = (uInt)max_start;
+ FLUSH_BLOCK(s, 0);
+ }
+ /* Flush if we may have to slide, otherwise block_start may become
+ * negative and the data will be gone:
+ */
+ if (s->strstart - (uInt)s->block_start >= MAX_DIST(s)) {
+ FLUSH_BLOCK(s, 0);
+ }
+ }
+ s->insert = 0;
+ if (flush == Z_FINISH) {
+ FLUSH_BLOCK(s, 1);
+ return finish_done;
+ }
+ if ((long)s->strstart > s->block_start)
+ FLUSH_BLOCK(s, 0);
+ return block_done;
}
/* ===========================================================================
@@ -1624,99 +1624,99 @@ local block_state deflate_stored(s, flush)
* matches. It is used only for the fast compression options.
*/
local block_state deflate_fast(s, flush)
- deflate_state *s;
- int flush;
+ deflate_state *s;
+ int flush;
{
- IPos hash_head; /* head of the hash chain */
- int bflush; /* set if current block must be flushed */
-
- for (;;) {
- /* Make sure that we always have enough lookahead, except
- * at the end of the input file. We need MAX_MATCH bytes
- * for the next match, plus MIN_MATCH bytes to insert the
- * string following the next match.
- */
- if (s->lookahead < MIN_LOOKAHEAD) {
- fill_window(s);
- if (s->lookahead < MIN_LOOKAHEAD && flush == Z_NO_FLUSH) {
- return need_more;
- }
- if (s->lookahead == 0) break; /* flush the current block */
- }
-
- /* Insert the string window[strstart .. strstart+2] in the
- * dictionary, and set hash_head to the head of the hash chain:
- */
- hash_head = NIL;
- if (s->lookahead >= MIN_MATCH) {
- INSERT_STRING(s, s->strstart, hash_head);
- }
-
- /* Find the longest match, discarding those <= prev_length.
- * At this point we have always match_length < MIN_MATCH
- */
- if (hash_head != NIL && s->strstart - hash_head <= MAX_DIST(s)) {
- /* To simplify the code, we prevent matches with the string
- * of window index 0 (in particular we have to avoid a match
- * of the string with itself at the start of the input file).
- */
- s->match_length = longest_match (s, hash_head);
- /* longest_match() sets match_start */
- }
- if (s->match_length >= MIN_MATCH) {
- check_match(s, s->strstart, s->match_start, s->match_length);
-
- _tr_tally_dist(s, s->strstart - s->match_start,
- s->match_length - MIN_MATCH, bflush);
-
- s->lookahead -= s->match_length;
-
- /* Insert new strings in the hash table only if the match length
- * is not too large. This saves time but degrades compression.
- */
+ IPos hash_head; /* head of the hash chain */
+ int bflush; /* set if current block must be flushed */
+
+ for (;;) {
+ /* Make sure that we always have enough lookahead, except
+ * at the end of the input file. We need MAX_MATCH bytes
+ * for the next match, plus MIN_MATCH bytes to insert the
+ * string following the next match.
+ */
+ if (s->lookahead < MIN_LOOKAHEAD) {
+ fill_window(s);
+ if (s->lookahead < MIN_LOOKAHEAD && flush == Z_NO_FLUSH) {
+ return need_more;
+ }
+ if (s->lookahead == 0) break; /* flush the current block */
+ }
+
+ /* Insert the string window[strstart .. strstart+2] in the
+ * dictionary, and set hash_head to the head of the hash chain:
+ */
+ hash_head = NIL;
+ if (s->lookahead >= MIN_MATCH) {
+ INSERT_STRING(s, s->strstart, hash_head);
+ }
+
+ /* Find the longest match, discarding those <= prev_length.
+ * At this point we have always match_length < MIN_MATCH
+ */
+ if (hash_head != NIL && s->strstart - hash_head <= MAX_DIST(s)) {
+ /* To simplify the code, we prevent matches with the string
+ * of window index 0 (in particular we have to avoid a match
+ * of the string with itself at the start of the input file).
+ */
+ s->match_length = longest_match (s, hash_head);
+ /* longest_match() sets match_start */
+ }
+ if (s->match_length >= MIN_MATCH) {
+ check_match(s, s->strstart, s->match_start, s->match_length);
+
+ _tr_tally_dist(s, s->strstart - s->match_start,
+ s->match_length - MIN_MATCH, bflush);
+
+ s->lookahead -= s->match_length;
+
+ /* Insert new strings in the hash table only if the match length
+ * is not too large. This saves time but degrades compression.
+ */
#ifndef FASTEST
- if (s->match_length <= s->max_insert_length &&
- s->lookahead >= MIN_MATCH) {
- s->match_length--; /* string at strstart already in table */
- do {
- s->strstart++;
- INSERT_STRING(s, s->strstart, hash_head);
- /* strstart never exceeds WSIZE-MAX_MATCH, so there are
- * always MIN_MATCH bytes ahead.
- */
- } while (--s->match_length != 0);
- s->strstart++;
- } else
+ if (s->match_length <= s->max_insert_length &&
+ s->lookahead >= MIN_MATCH) {
+ s->match_length--; /* string at strstart already in table */
+ do {
+ s->strstart++;
+ INSERT_STRING(s, s->strstart, hash_head);
+ /* strstart never exceeds WSIZE-MAX_MATCH, so there are
+ * always MIN_MATCH bytes ahead.
+ */
+ } while (--s->match_length != 0);
+ s->strstart++;
+ } else
#endif
- {
- s->strstart += s->match_length;
- s->match_length = 0;
- s->ins_h = s->window[s->strstart];
- UPDATE_HASH(s, s->ins_h, s->window[s->strstart+1]);
+ {
+ s->strstart += s->match_length;
+ s->match_length = 0;
+ s->ins_h = s->window[s->strstart];
+ UPDATE_HASH(s, s->ins_h, s->window[s->strstart+1]);
#if MIN_MATCH != 3
- Call UPDATE_HASH() MIN_MATCH-3 more times
+ Call UPDATE_HASH() MIN_MATCH-3 more times
#endif
- /* If lookahead < MIN_MATCH, ins_h is garbage, but it does not
- * matter since it will be recomputed at next deflate call.
- */
- }
- } else {
- /* No match, output a literal byte */
- Tracevv((stderr,"%c", s->window[s->strstart]));
- _tr_tally_lit (s, s->window[s->strstart], bflush);
- s->lookahead--;
- s->strstart++;
- }
- if (bflush) FLUSH_BLOCK(s, 0);
- }
- s->insert = s->strstart < MIN_MATCH-1 ? s->strstart : MIN_MATCH-1;
- if (flush == Z_FINISH) {
- FLUSH_BLOCK(s, 1);
- return finish_done;
- }
- if (s->last_lit)
- FLUSH_BLOCK(s, 0);
- return block_done;
+ /* If lookahead < MIN_MATCH, ins_h is garbage, but it does not
+ * matter since it will be recomputed at next deflate call.
+ */
+ }
+ } else {
+ /* No match, output a literal byte */
+ Tracevv((stderr,"%c", s->window[s->strstart]));
+ _tr_tally_lit (s, s->window[s->strstart], bflush);
+ s->lookahead--;
+ s->strstart++;
+ }
+ if (bflush) FLUSH_BLOCK(s, 0);
+ }
+ s->insert = s->strstart < MIN_MATCH-1 ? s->strstart : MIN_MATCH-1;
+ if (flush == Z_FINISH) {
+ FLUSH_BLOCK(s, 1);
+ return finish_done;
+ }
+ if (s->last_lit)
+ FLUSH_BLOCK(s, 0);
+ return block_done;
}
#ifndef FASTEST
@@ -1726,128 +1726,128 @@ local block_state deflate_fast(s, flush)
* no better match at the next window position.
*/
local block_state deflate_slow(s, flush)
- deflate_state *s;
- int flush;
+ deflate_state *s;
+ int flush;
{
- IPos hash_head; /* head of hash chain */
- int bflush; /* set if current block must be flushed */
-
- /* Process the input block. */
- for (;;) {
- /* Make sure that we always have enough lookahead, except
- * at the end of the input file. We need MAX_MATCH bytes
- * for the next match, plus MIN_MATCH bytes to insert the
- * string following the next match.
- */
- if (s->lookahead < MIN_LOOKAHEAD) {
- fill_window(s);
- if (s->lookahead < MIN_LOOKAHEAD && flush == Z_NO_FLUSH) {
- return need_more;
- }
- if (s->lookahead == 0) break; /* flush the current block */
- }
-
- /* Insert the string window[strstart .. strstart+2] in the
- * dictionary, and set hash_head to the head of the hash chain:
- */
- hash_head = NIL;
- if (s->lookahead >= MIN_MATCH) {
- INSERT_STRING(s, s->strstart, hash_head);
- }
-
- /* Find the longest match, discarding those <= prev_length.
- */
- s->prev_length = s->match_length, s->prev_match = s->match_start;
- s->match_length = MIN_MATCH-1;
-
- if (hash_head != NIL && s->prev_length < s->max_lazy_match &&
- s->strstart - hash_head <= MAX_DIST(s)) {
- /* To simplify the code, we prevent matches with the string
- * of window index 0 (in particular we have to avoid a match
- * of the string with itself at the start of the input file).
- */
- s->match_length = longest_match (s, hash_head);
- /* longest_match() sets match_start */
-
- if (s->match_length <= 5 && (s->strategy == Z_FILTERED
+ IPos hash_head; /* head of hash chain */
+ int bflush; /* set if current block must be flushed */
+
+ /* Process the input block. */
+ for (;;) {
+ /* Make sure that we always have enough lookahead, except
+ * at the end of the input file. We need MAX_MATCH bytes
+ * for the next match, plus MIN_MATCH bytes to insert the
+ * string following the next match.
+ */
+ if (s->lookahead < MIN_LOOKAHEAD) {
+ fill_window(s);
+ if (s->lookahead < MIN_LOOKAHEAD && flush == Z_NO_FLUSH) {
+ return need_more;
+ }
+ if (s->lookahead == 0) break; /* flush the current block */
+ }
+
+ /* Insert the string window[strstart .. strstart+2] in the
+ * dictionary, and set hash_head to the head of the hash chain:
+ */
+ hash_head = NIL;
+ if (s->lookahead >= MIN_MATCH) {
+ INSERT_STRING(s, s->strstart, hash_head);
+ }
+
+ /* Find the longest match, discarding those <= prev_length.
+ */
+ s->prev_length = s->match_length, s->prev_match = s->match_start;
+ s->match_length = MIN_MATCH-1;
+
+ if (hash_head != NIL && s->prev_length < s->max_lazy_match &&
+ s->strstart - hash_head <= MAX_DIST(s)) {
+ /* To simplify the code, we prevent matches with the string
+ * of window index 0 (in particular we have to avoid a match
+ * of the string with itself at the start of the input file).
+ */
+ s->match_length = longest_match (s, hash_head);
+ /* longest_match() sets match_start */
+
+ if (s->match_length <= 5 && (s->strategy == Z_FILTERED
#if TOO_FAR <= 32767
- || (s->match_length == MIN_MATCH &&
- s->strstart - s->match_start > TOO_FAR)
+ || (s->match_length == MIN_MATCH &&
+ s->strstart - s->match_start > TOO_FAR)
#endif
- )) {
-
- /* If prev_match is also MIN_MATCH, match_start is garbage
- * but we will ignore the current match anyway.
- */
- s->match_length = MIN_MATCH-1;
- }
- }
- /* If there was a match at the previous step and the current
- * match is not better, output the previous match:
- */
- if (s->prev_length >= MIN_MATCH && s->match_length <= s->prev_length) {
- uInt max_insert = s->strstart + s->lookahead - MIN_MATCH;
- /* Do not insert strings in hash table beyond this. */
-
- check_match(s, s->strstart-1, s->prev_match, s->prev_length);
-
- _tr_tally_dist(s, s->strstart -1 - s->prev_match,
- s->prev_length - MIN_MATCH, bflush);
-
- /* Insert in hash table all strings up to the end of the match.
- * strstart-1 and strstart are already inserted. If there is not
- * enough lookahead, the last two strings are not inserted in
- * the hash table.
- */
- s->lookahead -= s->prev_length-1;
- s->prev_length -= 2;
- do {
- if (++s->strstart <= max_insert) {
- INSERT_STRING(s, s->strstart, hash_head);
- }
- } while (--s->prev_length != 0);
- s->match_available = 0;
- s->match_length = MIN_MATCH-1;
- s->strstart++;
-
- if (bflush) FLUSH_BLOCK(s, 0);
-
- } else if (s->match_available) {
- /* If there was no match at the previous position, output a
- * single literal. If there was a match but the current match
- * is longer, truncate the previous match to a single literal.
- */
- Tracevv((stderr,"%c", s->window[s->strstart-1]));
- _tr_tally_lit(s, s->window[s->strstart-1], bflush);
- if (bflush) {
- FLUSH_BLOCK_ONLY(s, 0);
- }
- s->strstart++;
- s->lookahead--;
- if (s->strm->avail_out == 0) return need_more;
- } else {
- /* There is no previous match to compare with, wait for
- * the next step to decide.
- */
- s->match_available = 1;
- s->strstart++;
- s->lookahead--;
- }
- }
- Assert (flush != Z_NO_FLUSH, "no flush?");
- if (s->match_available) {
- Tracevv((stderr,"%c", s->window[s->strstart-1]));
- _tr_tally_lit(s, s->window[s->strstart-1], bflush);
- s->match_available = 0;
- }
- s->insert = s->strstart < MIN_MATCH-1 ? s->strstart : MIN_MATCH-1;
- if (flush == Z_FINISH) {
- FLUSH_BLOCK(s, 1);
- return finish_done;
- }
- if (s->last_lit)
- FLUSH_BLOCK(s, 0);
- return block_done;
+ )) {
+
+ /* If prev_match is also MIN_MATCH, match_start is garbage
+ * but we will ignore the current match anyway.
+ */
+ s->match_length = MIN_MATCH-1;
+ }
+ }
+ /* If there was a match at the previous step and the current
+ * match is not better, output the previous match:
+ */
+ if (s->prev_length >= MIN_MATCH && s->match_length <= s->prev_length) {
+ uInt max_insert = s->strstart + s->lookahead - MIN_MATCH;
+ /* Do not insert strings in hash table beyond this. */
+
+ check_match(s, s->strstart-1, s->prev_match, s->prev_length);
+
+ _tr_tally_dist(s, s->strstart -1 - s->prev_match,
+ s->prev_length - MIN_MATCH, bflush);
+
+ /* Insert in hash table all strings up to the end of the match.
+ * strstart-1 and strstart are already inserted. If there is not
+ * enough lookahead, the last two strings are not inserted in
+ * the hash table.
+ */
+ s->lookahead -= s->prev_length-1;
+ s->prev_length -= 2;
+ do {
+ if (++s->strstart <= max_insert) {
+ INSERT_STRING(s, s->strstart, hash_head);
+ }
+ } while (--s->prev_length != 0);
+ s->match_available = 0;
+ s->match_length = MIN_MATCH-1;
+ s->strstart++;
+
+ if (bflush) FLUSH_BLOCK(s, 0);
+
+ } else if (s->match_available) {
+ /* If there was no match at the previous position, output a
+ * single literal. If there was a match but the current match
+ * is longer, truncate the previous match to a single literal.
+ */
+ Tracevv((stderr,"%c", s->window[s->strstart-1]));
+ _tr_tally_lit(s, s->window[s->strstart-1], bflush);
+ if (bflush) {
+ FLUSH_BLOCK_ONLY(s, 0);
+ }
+ s->strstart++;
+ s->lookahead--;
+ if (s->strm->avail_out == 0) return need_more;
+ } else {
+ /* There is no previous match to compare with, wait for
+ * the next step to decide.
+ */
+ s->match_available = 1;
+ s->strstart++;
+ s->lookahead--;
+ }
+ }
+ Assert (flush != Z_NO_FLUSH, "no flush?");
+ if (s->match_available) {
+ Tracevv((stderr,"%c", s->window[s->strstart-1]));
+ _tr_tally_lit(s, s->window[s->strstart-1], bflush);
+ s->match_available = 0;
+ }
+ s->insert = s->strstart < MIN_MATCH-1 ? s->strstart : MIN_MATCH-1;
+ if (flush == Z_FINISH) {
+ FLUSH_BLOCK(s, 1);
+ return finish_done;
+ }
+ if (s->last_lit)
+ FLUSH_BLOCK(s, 0);
+ return block_done;
}
#endif /* FASTEST */
@@ -1857,72 +1857,72 @@ local block_state deflate_slow(s, flush)
* deflate switches away from Z_RLE.)
*/
local block_state deflate_rle(s, flush)
- deflate_state *s;
- int flush;
+ deflate_state *s;
+ int flush;
{
- int bflush; /* set if current block must be flushed */
- uInt prev; /* byte at distance one to match */
- Bytef *scan, *strend; /* scan goes up to strend for length of run */
-
- for (;;) {
- /* Make sure that we always have enough lookahead, except
- * at the end of the input file. We need MAX_MATCH bytes
- * for the longest run, plus one for the unrolled loop.
- */
- if (s->lookahead <= MAX_MATCH) {
- fill_window(s);
- if (s->lookahead <= MAX_MATCH && flush == Z_NO_FLUSH) {
- return need_more;
- }
- if (s->lookahead == 0) break; /* flush the current block */
- }
-
- /* See how many times the previous byte repeats */
- s->match_length = 0;
- if (s->lookahead >= MIN_MATCH && s->strstart > 0) {
- scan = s->window + s->strstart - 1;
- prev = *scan;
- if (prev == *++scan && prev == *++scan && prev == *++scan) {
- strend = s->window + s->strstart + MAX_MATCH;
- do {
- } while (prev == *++scan && prev == *++scan &&
- prev == *++scan && prev == *++scan &&
- prev == *++scan && prev == *++scan &&
- prev == *++scan && prev == *++scan &&
- scan < strend);
- s->match_length = MAX_MATCH - (int)(strend - scan);
- if (s->match_length > s->lookahead)
- s->match_length = s->lookahead;
- }
- Assert(scan <= s->window+(uInt)(s->window_size-1), "wild scan");
- }
-
- /* Emit match if have run of MIN_MATCH or longer, else emit literal */
- if (s->match_length >= MIN_MATCH) {
- check_match(s, s->strstart, s->strstart - 1, s->match_length);
-
- _tr_tally_dist(s, 1, s->match_length - MIN_MATCH, bflush);
-
- s->lookahead -= s->match_length;
- s->strstart += s->match_length;
- s->match_length = 0;
- } else {
- /* No match, output a literal byte */
- Tracevv((stderr,"%c", s->window[s->strstart]));
- _tr_tally_lit (s, s->window[s->strstart], bflush);
- s->lookahead--;
- s->strstart++;
- }
- if (bflush) FLUSH_BLOCK(s, 0);
- }
- s->insert = 0;
- if (flush == Z_FINISH) {
- FLUSH_BLOCK(s, 1);
- return finish_done;
- }
- if (s->last_lit)
- FLUSH_BLOCK(s, 0);
- return block_done;
+ int bflush; /* set if current block must be flushed */
+ uInt prev; /* byte at distance one to match */
+ Bytef *scan, *strend; /* scan goes up to strend for length of run */
+
+ for (;;) {
+ /* Make sure that we always have enough lookahead, except
+ * at the end of the input file. We need MAX_MATCH bytes
+ * for the longest run, plus one for the unrolled loop.
+ */
+ if (s->lookahead <= MAX_MATCH) {
+ fill_window(s);
+ if (s->lookahead <= MAX_MATCH && flush == Z_NO_FLUSH) {
+ return need_more;
+ }
+ if (s->lookahead == 0) break; /* flush the current block */
+ }
+
+ /* See how many times the previous byte repeats */
+ s->match_length = 0;
+ if (s->lookahead >= MIN_MATCH && s->strstart > 0) {
+ scan = s->window + s->strstart - 1;
+ prev = *scan;
+ if (prev == *++scan && prev == *++scan && prev == *++scan) {
+ strend = s->window + s->strstart + MAX_MATCH;
+ do {
+ } while (prev == *++scan && prev == *++scan &&
+ prev == *++scan && prev == *++scan &&
+ prev == *++scan && prev == *++scan &&
+ prev == *++scan && prev == *++scan &&
+ scan < strend);
+ s->match_length = MAX_MATCH - (int)(strend - scan);
+ if (s->match_length > s->lookahead)
+ s->match_length = s->lookahead;
+ }
+ Assert(scan <= s->window+(uInt)(s->window_size-1), "wild scan");
+ }
+
+ /* Emit match if have run of MIN_MATCH or longer, else emit literal */
+ if (s->match_length >= MIN_MATCH) {
+ check_match(s, s->strstart, s->strstart - 1, s->match_length);
+
+ _tr_tally_dist(s, 1, s->match_length - MIN_MATCH, bflush);
+
+ s->lookahead -= s->match_length;
+ s->strstart += s->match_length;
+ s->match_length = 0;
+ } else {
+ /* No match, output a literal byte */
+ Tracevv((stderr,"%c", s->window[s->strstart]));
+ _tr_tally_lit (s, s->window[s->strstart], bflush);
+ s->lookahead--;
+ s->strstart++;
+ }
+ if (bflush) FLUSH_BLOCK(s, 0);
+ }
+ s->insert = 0;
+ if (flush == Z_FINISH) {
+ FLUSH_BLOCK(s, 1);
+ return finish_done;
+ }
+ if (s->last_lit)
+ FLUSH_BLOCK(s, 0);
+ return block_done;
}
/* ===========================================================================
@@ -1930,36 +1930,36 @@ local block_state deflate_rle(s, flush)
* (It will be regenerated if this run of deflate switches away from Huffman.)
*/
local block_state deflate_huff(s, flush)
- deflate_state *s;
- int flush;
+ deflate_state *s;
+ int flush;
{
- int bflush; /* set if current block must be flushed */
-
- for (;;) {
- /* Make sure that we have a literal to write. */
- if (s->lookahead == 0) {
- fill_window(s);
- if (s->lookahead == 0) {
- if (flush == Z_NO_FLUSH)
- return need_more;
- break; /* flush the current block */
- }
- }
-
- /* Output a literal byte */
- s->match_length = 0;
- Tracevv((stderr,"%c", s->window[s->strstart]));
- _tr_tally_lit (s, s->window[s->strstart], bflush);
- s->lookahead--;
- s->strstart++;
- if (bflush) FLUSH_BLOCK(s, 0);
- }
- s->insert = 0;
- if (flush == Z_FINISH) {
- FLUSH_BLOCK(s, 1);
- return finish_done;
- }
- if (s->last_lit)
- FLUSH_BLOCK(s, 0);
- return block_done;
+ int bflush; /* set if current block must be flushed */
+
+ for (;;) {
+ /* Make sure that we have a literal to write. */
+ if (s->lookahead == 0) {
+ fill_window(s);
+ if (s->lookahead == 0) {
+ if (flush == Z_NO_FLUSH)
+ return need_more;
+ break; /* flush the current block */
+ }
+ }
+
+ /* Output a literal byte */
+ s->match_length = 0;
+ Tracevv((stderr,"%c", s->window[s->strstart]));
+ _tr_tally_lit (s, s->window[s->strstart], bflush);
+ s->lookahead--;
+ s->strstart++;
+ if (bflush) FLUSH_BLOCK(s, 0);
+ }
+ s->insert = 0;
+ if (flush == Z_FINISH) {
+ FLUSH_BLOCK(s, 1);
+ return finish_done;
+ }
+ if (s->last_lit)
+ FLUSH_BLOCK(s, 0);
+ return block_done;
}
diff --git a/src/lib/zlib/deflate.h b/src/lib/zlib/deflate.h
index fbac44d908e..4268aed349c 100644
--- a/src/lib/zlib/deflate.h
+++ b/src/lib/zlib/deflate.h
@@ -63,14 +63,14 @@
/* Data structure describing a single value and its code string. */
typedef struct ct_data_s {
- union {
- ush freq; /* frequency count */
- ush code; /* bit string */
- } fc;
- union {
- ush dad; /* father node in Huffman tree */
- ush len; /* length of bit string */
- } dl;
+ union {
+ ush freq; /* frequency count */
+ ush code; /* bit string */
+ } fc;
+ union {
+ ush dad; /* father node in Huffman tree */
+ ush len; /* length of bit string */
+ } dl;
} FAR ct_data;
#define Freq fc.freq
@@ -81,9 +81,9 @@ typedef struct ct_data_s {
typedef struct static_tree_desc_s static_tree_desc;
typedef struct tree_desc_s {
- ct_data *dyn_tree; /* the dynamic tree */
- int max_code; /* largest code with non zero frequency */
- static_tree_desc *stat_desc; /* the corresponding static tree */
+ ct_data *dyn_tree; /* the dynamic tree */
+ int max_code; /* largest code with non zero frequency */
+ static_tree_desc *stat_desc; /* the corresponding static tree */
} FAR tree_desc;
typedef ush Pos;
@@ -95,180 +95,180 @@ typedef unsigned IPos;
*/
typedef struct internal_state {
- z_streamp strm; /* pointer back to this zlib stream */
- int status; /* as the name implies */
- Bytef *pending_buf; /* output still pending */
- ulg pending_buf_size; /* size of pending_buf */
- Bytef *pending_out; /* next pending byte to output to the stream */
- uInt pending; /* nb of bytes in the pending buffer */
- int wrap; /* bit 0 true for zlib, bit 1 true for gzip */
- gz_headerp gzhead; /* gzip header information to write */
- uInt gzindex; /* where in extra, name, or comment */
- Byte method; /* STORED (for zip only) or DEFLATED */
- int last_flush; /* value of flush param for previous deflate call */
-
- /* used by deflate.c: */
-
- uInt w_size; /* LZ77 window size (32K by default) */
- uInt w_bits; /* log2(w_size) (8..16) */
- uInt w_mask; /* w_size - 1 */
-
- Bytef *window;
- /* Sliding window. Input bytes are read into the second half of the window,
- * and move to the first half later to keep a dictionary of at least wSize
- * bytes. With this organization, matches are limited to a distance of
- * wSize-MAX_MATCH bytes, but this ensures that IO is always
- * performed with a length multiple of the block size. Also, it limits
- * the window size to 64K, which is quite useful on MSDOS.
- * To do: use the user input buffer as sliding window.
- */
-
- ulg window_size;
- /* Actual size of window: 2*wSize, except when the user input buffer
- * is directly used as sliding window.
- */
-
- Posf *prev;
- /* Link to older string with same hash index. To limit the size of this
- * array to 64K, this link is maintained only for the last 32K strings.
- * An index in this array is thus a window index modulo 32K.
- */
-
- Posf *head; /* Heads of the hash chains or NIL. */
-
- uInt ins_h; /* hash index of string to be inserted */
- uInt hash_size; /* number of elements in hash table */
- uInt hash_bits; /* log2(hash_size) */
- uInt hash_mask; /* hash_size-1 */
-
- uInt hash_shift;
- /* Number of bits by which ins_h must be shifted at each input
- * step. It must be such that after MIN_MATCH steps, the oldest
- * byte no longer takes part in the hash key, that is:
- * hash_shift * MIN_MATCH >= hash_bits
- */
-
- long block_start;
- /* Window position at the beginning of the current output block. Gets
- * negative when the window is moved backwards.
- */
-
- uInt match_length; /* length of best match */
- IPos prev_match; /* previous match */
- int match_available; /* set if previous match exists */
- uInt strstart; /* start of string to insert */
- uInt match_start; /* start of matching string */
- uInt lookahead; /* number of valid bytes ahead in window */
-
- uInt prev_length;
- /* Length of the best match at previous step. Matches not greater than this
- * are discarded. This is used in the lazy match evaluation.
- */
-
- uInt max_chain_length;
- /* To speed up deflation, hash chains are never searched beyond this
- * length. A higher limit improves compression ratio but degrades the
- * speed.
- */
-
- uInt max_lazy_match;
- /* Attempt to find a better match only when the current match is strictly
- * smaller than this value. This mechanism is used only for compression
- * levels >= 4.
- */
+ z_streamp strm; /* pointer back to this zlib stream */
+ int status; /* as the name implies */
+ Bytef *pending_buf; /* output still pending */
+ ulg pending_buf_size; /* size of pending_buf */
+ Bytef *pending_out; /* next pending byte to output to the stream */
+ uInt pending; /* nb of bytes in the pending buffer */
+ int wrap; /* bit 0 true for zlib, bit 1 true for gzip */
+ gz_headerp gzhead; /* gzip header information to write */
+ uInt gzindex; /* where in extra, name, or comment */
+ Byte method; /* STORED (for zip only) or DEFLATED */
+ int last_flush; /* value of flush param for previous deflate call */
+
+ /* used by deflate.c: */
+
+ uInt w_size; /* LZ77 window size (32K by default) */
+ uInt w_bits; /* log2(w_size) (8..16) */
+ uInt w_mask; /* w_size - 1 */
+
+ Bytef *window;
+ /* Sliding window. Input bytes are read into the second half of the window,
+ * and move to the first half later to keep a dictionary of at least wSize
+ * bytes. With this organization, matches are limited to a distance of
+ * wSize-MAX_MATCH bytes, but this ensures that IO is always
+ * performed with a length multiple of the block size. Also, it limits
+ * the window size to 64K, which is quite useful on MSDOS.
+ * To do: use the user input buffer as sliding window.
+ */
+
+ ulg window_size;
+ /* Actual size of window: 2*wSize, except when the user input buffer
+ * is directly used as sliding window.
+ */
+
+ Posf *prev;
+ /* Link to older string with same hash index. To limit the size of this
+ * array to 64K, this link is maintained only for the last 32K strings.
+ * An index in this array is thus a window index modulo 32K.
+ */
+
+ Posf *head; /* Heads of the hash chains or NIL. */
+
+ uInt ins_h; /* hash index of string to be inserted */
+ uInt hash_size; /* number of elements in hash table */
+ uInt hash_bits; /* log2(hash_size) */
+ uInt hash_mask; /* hash_size-1 */
+
+ uInt hash_shift;
+ /* Number of bits by which ins_h must be shifted at each input
+ * step. It must be such that after MIN_MATCH steps, the oldest
+ * byte no longer takes part in the hash key, that is:
+ * hash_shift * MIN_MATCH >= hash_bits
+ */
+
+ long block_start;
+ /* Window position at the beginning of the current output block. Gets
+ * negative when the window is moved backwards.
+ */
+
+ uInt match_length; /* length of best match */
+ IPos prev_match; /* previous match */
+ int match_available; /* set if previous match exists */
+ uInt strstart; /* start of string to insert */
+ uInt match_start; /* start of matching string */
+ uInt lookahead; /* number of valid bytes ahead in window */
+
+ uInt prev_length;
+ /* Length of the best match at previous step. Matches not greater than this
+ * are discarded. This is used in the lazy match evaluation.
+ */
+
+ uInt max_chain_length;
+ /* To speed up deflation, hash chains are never searched beyond this
+ * length. A higher limit improves compression ratio but degrades the
+ * speed.
+ */
+
+ uInt max_lazy_match;
+ /* Attempt to find a better match only when the current match is strictly
+ * smaller than this value. This mechanism is used only for compression
+ * levels >= 4.
+ */
# define max_insert_length max_lazy_match
- /* Insert new strings in the hash table only if the match length is not
- * greater than this length. This saves time but degrades compression.
- * max_insert_length is used only for compression levels <= 3.
- */
-
- int level; /* compression level (1..9) */
- int strategy; /* favor or force Huffman coding*/
-
- uInt good_match;
- /* Use a faster search when the previous match is longer than this */
-
- int nice_match; /* Stop searching when current match exceeds this */
-
- /* used by trees.c: */
- /* Didn't use ct_data typedef below to suppress compiler warning */
- struct ct_data_s dyn_ltree[HEAP_SIZE]; /* literal and length tree */
- struct ct_data_s dyn_dtree[2*D_CODES+1]; /* distance tree */
- struct ct_data_s bl_tree[2*BL_CODES+1]; /* Huffman tree for bit lengths */
-
- struct tree_desc_s l_desc; /* desc. for literal tree */
- struct tree_desc_s d_desc; /* desc. for distance tree */
- struct tree_desc_s bl_desc; /* desc. for bit length tree */
-
- ush bl_count[MAX_BITS+1];
- /* number of codes at each bit length for an optimal tree */
-
- int heap[2*L_CODES+1]; /* heap used to build the Huffman trees */
- int heap_len; /* number of elements in the heap */
- int heap_max; /* element of largest frequency */
- /* The sons of heap[n] are heap[2*n] and heap[2*n+1]. heap[0] is not used.
- * The same heap array is used to build all trees.
- */
-
- uch depth[2*L_CODES+1];
- /* Depth of each subtree used as tie breaker for trees of equal frequency
- */
-
- uchf *l_buf; /* buffer for literals or lengths */
-
- uInt lit_bufsize;
- /* Size of match buffer for literals/lengths. There are 4 reasons for
- * limiting lit_bufsize to 64K:
- * - frequencies can be kept in 16 bit counters
- * - if compression is not successful for the first block, all input
- * data is still in the window so we can still emit a stored block even
- * when input comes from standard input. (This can also be done for
- * all blocks if lit_bufsize is not greater than 32K.)
- * - if compression is not successful for a file smaller than 64K, we can
- * even emit a stored file instead of a stored block (saving 5 bytes).
- * This is applicable only for zip (not gzip or zlib).
- * - creating new Huffman trees less frequently may not provide fast
- * adaptation to changes in the input data statistics. (Take for
- * example a binary file with poorly compressible code followed by
- * a highly compressible string table.) Smaller buffer sizes give
- * fast adaptation but have of course the overhead of transmitting
- * trees more frequently.
- * - I can't count above 4
- */
-
- uInt last_lit; /* running index in l_buf */
-
- ushf *d_buf;
- /* Buffer for distances. To simplify the code, d_buf and l_buf have
- * the same number of elements. To use different lengths, an extra flag
- * array would be necessary.
- */
-
- ulg opt_len; /* bit length of current block with optimal trees */
- ulg static_len; /* bit length of current block with static trees */
- uInt matches; /* number of string matches in current block */
- uInt insert; /* bytes at end of window left to insert */
+ /* Insert new strings in the hash table only if the match length is not
+ * greater than this length. This saves time but degrades compression.
+ * max_insert_length is used only for compression levels <= 3.
+ */
+
+ int level; /* compression level (1..9) */
+ int strategy; /* favor or force Huffman coding*/
+
+ uInt good_match;
+ /* Use a faster search when the previous match is longer than this */
+
+ int nice_match; /* Stop searching when current match exceeds this */
+
+ /* used by trees.c: */
+ /* Didn't use ct_data typedef below to suppress compiler warning */
+ struct ct_data_s dyn_ltree[HEAP_SIZE]; /* literal and length tree */
+ struct ct_data_s dyn_dtree[2*D_CODES+1]; /* distance tree */
+ struct ct_data_s bl_tree[2*BL_CODES+1]; /* Huffman tree for bit lengths */
+
+ struct tree_desc_s l_desc; /* desc. for literal tree */
+ struct tree_desc_s d_desc; /* desc. for distance tree */
+ struct tree_desc_s bl_desc; /* desc. for bit length tree */
+
+ ush bl_count[MAX_BITS+1];
+ /* number of codes at each bit length for an optimal tree */
+
+ int heap[2*L_CODES+1]; /* heap used to build the Huffman trees */
+ int heap_len; /* number of elements in the heap */
+ int heap_max; /* element of largest frequency */
+ /* The sons of heap[n] are heap[2*n] and heap[2*n+1]. heap[0] is not used.
+ * The same heap array is used to build all trees.
+ */
+
+ uch depth[2*L_CODES+1];
+ /* Depth of each subtree used as tie breaker for trees of equal frequency
+ */
+
+ uchf *l_buf; /* buffer for literals or lengths */
+
+ uInt lit_bufsize;
+ /* Size of match buffer for literals/lengths. There are 4 reasons for
+ * limiting lit_bufsize to 64K:
+ * - frequencies can be kept in 16 bit counters
+ * - if compression is not successful for the first block, all input
+ * data is still in the window so we can still emit a stored block even
+ * when input comes from standard input. (This can also be done for
+ * all blocks if lit_bufsize is not greater than 32K.)
+ * - if compression is not successful for a file smaller than 64K, we can
+ * even emit a stored file instead of a stored block (saving 5 bytes).
+ * This is applicable only for zip (not gzip or zlib).
+ * - creating new Huffman trees less frequently may not provide fast
+ * adaptation to changes in the input data statistics. (Take for
+ * example a binary file with poorly compressible code followed by
+ * a highly compressible string table.) Smaller buffer sizes give
+ * fast adaptation but have of course the overhead of transmitting
+ * trees more frequently.
+ * - I can't count above 4
+ */
+
+ uInt last_lit; /* running index in l_buf */
+
+ ushf *d_buf;
+ /* Buffer for distances. To simplify the code, d_buf and l_buf have
+ * the same number of elements. To use different lengths, an extra flag
+ * array would be necessary.
+ */
+
+ ulg opt_len; /* bit length of current block with optimal trees */
+ ulg static_len; /* bit length of current block with static trees */
+ uInt matches; /* number of string matches in current block */
+ uInt insert; /* bytes at end of window left to insert */
#ifdef DEBUG
- ulg compressed_len; /* total bit length of compressed file mod 2^32 */
- ulg bits_sent; /* bit length of compressed data sent mod 2^32 */
+ ulg compressed_len; /* total bit length of compressed file mod 2^32 */
+ ulg bits_sent; /* bit length of compressed data sent mod 2^32 */
#endif
- ush bi_buf;
- /* Output buffer. bits are inserted starting at the bottom (least
- * significant bits).
- */
- int bi_valid;
- /* Number of valid bits in bi_buf. All bits above the last valid bit
- * are always zero.
- */
-
- ulg high_water;
- /* High water mark offset in window for initialized bytes -- bytes above
- * this are set to zero in order to avoid memory check warnings when
- * longest match routines access bytes past the input. This is then
- * updated to the new high water mark.
- */
+ ush bi_buf;
+ /* Output buffer. bits are inserted starting at the bottom (least
+ * significant bits).
+ */
+ int bi_valid;
+ /* Number of valid bits in bi_buf. All bits above the last valid bit
+ * are always zero.
+ */
+
+ ulg high_water;
+ /* High water mark offset in window for initialized bytes -- bytes above
+ * this are set to zero in order to avoid memory check warnings when
+ * longest match routines access bytes past the input. This is then
+ * updated to the new high water mark.
+ */
} FAR deflate_state;
@@ -292,18 +292,18 @@ typedef struct internal_state {
/* Number of bytes after end of data in window to initialize in order to avoid
memory checker errors from longest match routines */
- /* in trees.c */
+ /* in trees.c */
void ZLIB_INTERNAL _tr_init OF((deflate_state *s));
int ZLIB_INTERNAL _tr_tally OF((deflate_state *s, unsigned dist, unsigned lc));
void ZLIB_INTERNAL _tr_flush_block OF((deflate_state *s, charf *buf,
- ulg stored_len, int last));
+ ulg stored_len, int last));
void ZLIB_INTERNAL _tr_flush_bits OF((deflate_state *s));
void ZLIB_INTERNAL _tr_align OF((deflate_state *s));
void ZLIB_INTERNAL _tr_stored_block OF((deflate_state *s, charf *buf,
- ulg stored_len, int last));
+ ulg stored_len, int last));
#define d_code(dist) \
- ((dist) < 256 ? _dist_code[dist] : _dist_code[256+((dist)>>7)])
+ ((dist) < 256 ? _dist_code[dist] : _dist_code[256+((dist)>>7)])
/* Mapping from a distance to a distance code. dist is the distance - 1 and
* must not have side effects. _dist_code[256] and _dist_code[257] are never
* used.
@@ -313,34 +313,34 @@ void ZLIB_INTERNAL _tr_stored_block OF((deflate_state *s, charf *buf,
/* Inline versions of _tr_tally for speed: */
#if defined(GEN_TREES_H) || !defined(STDC)
- extern uch ZLIB_INTERNAL _length_code[];
- extern uch ZLIB_INTERNAL _dist_code[];
+ extern uch ZLIB_INTERNAL _length_code[];
+ extern uch ZLIB_INTERNAL _dist_code[];
#else
- extern const uch ZLIB_INTERNAL _length_code[];
- extern const uch ZLIB_INTERNAL _dist_code[];
+ extern const uch ZLIB_INTERNAL _length_code[];
+ extern const uch ZLIB_INTERNAL _dist_code[];
#endif
# define _tr_tally_lit(s, c, flush) \
- { uch cc = (c); \
- s->d_buf[s->last_lit] = 0; \
- s->l_buf[s->last_lit++] = cc; \
- s->dyn_ltree[cc].Freq++; \
- flush = (s->last_lit == s->lit_bufsize-1); \
- }
+ { uch cc = (c); \
+ s->d_buf[s->last_lit] = 0; \
+ s->l_buf[s->last_lit++] = cc; \
+ s->dyn_ltree[cc].Freq++; \
+ flush = (s->last_lit == s->lit_bufsize-1); \
+ }
# define _tr_tally_dist(s, distance, length, flush) \
- { uch len = (length); \
- ush dist = (distance); \
- s->d_buf[s->last_lit] = dist; \
- s->l_buf[s->last_lit++] = len; \
- dist--; \
- s->dyn_ltree[_length_code[len]+LITERALS+1].Freq++; \
- s->dyn_dtree[d_code(dist)].Freq++; \
- flush = (s->last_lit == s->lit_bufsize-1); \
- }
+ { uch len = (length); \
+ ush dist = (distance); \
+ s->d_buf[s->last_lit] = dist; \
+ s->l_buf[s->last_lit++] = len; \
+ dist--; \
+ s->dyn_ltree[_length_code[len]+LITERALS+1].Freq++; \
+ s->dyn_dtree[d_code(dist)].Freq++; \
+ flush = (s->last_lit == s->lit_bufsize-1); \
+ }
#else
# define _tr_tally_lit(s, c, flush) flush = _tr_tally(s, 0, c)
# define _tr_tally_dist(s, distance, length, flush) \
- flush = _tr_tally(s, distance, length)
+ flush = _tr_tally(s, distance, length)
#endif
#endif /* DEFLATE_H */
diff --git a/src/lib/zlib/example.c b/src/lib/zlib/example.c
index f515a4853d6..7c0f645e3b2 100644
--- a/src/lib/zlib/example.c
+++ b/src/lib/zlib/example.c
@@ -20,10 +20,10 @@
#endif
#define CHECK_ERR(err, msg) { \
- if (err != Z_OK) { \
- fprintf(stderr, "%s error: %d\n", msg, err); \
- exit(1); \
- } \
+ if (err != Z_OK) { \
+ fprintf(stderr, "%s error: %d\n", msg, err); \
+ exit(1); \
+ } \
}
const char hello[] = "hello, hello!";
@@ -36,17 +36,17 @@ uLong dictId; /* Adler32 value of the dictionary */
void test_deflate OF((Byte *compr, uLong comprLen));
void test_inflate OF((Byte *compr, uLong comprLen,
- Byte *uncompr, uLong uncomprLen));
+ Byte *uncompr, uLong uncomprLen));
void test_large_deflate OF((Byte *compr, uLong comprLen,
- Byte *uncompr, uLong uncomprLen));
+ Byte *uncompr, uLong uncomprLen));
void test_large_inflate OF((Byte *compr, uLong comprLen,
- Byte *uncompr, uLong uncomprLen));
+ Byte *uncompr, uLong uncomprLen));
void test_flush OF((Byte *compr, uLong *comprLen));
void test_sync OF((Byte *compr, uLong comprLen,
- Byte *uncompr, uLong uncomprLen));
+ Byte *uncompr, uLong uncomprLen));
void test_dict_deflate OF((Byte *compr, uLong comprLen));
void test_dict_inflate OF((Byte *compr, uLong comprLen,
- Byte *uncompr, uLong uncomprLen));
+ Byte *uncompr, uLong uncomprLen));
int main OF((int argc, char *argv[]));
@@ -56,17 +56,17 @@ void *myalloc OF((void *, unsigned, unsigned));
void myfree OF((void *, void *));
void *myalloc(q, n, m)
- void *q;
- unsigned n, m;
+ void *q;
+ unsigned n, m;
{
- q = Z_NULL;
- return calloc(n, m);
+ q = Z_NULL;
+ return calloc(n, m);
}
void myfree(void *q, void *p)
{
- q = Z_NULL;
- free(p);
+ q = Z_NULL;
+ free(p);
}
static alloc_func zalloc = myalloc;
@@ -78,117 +78,117 @@ static alloc_func zalloc = (alloc_func)0;
static free_func zfree = (free_func)0;
void test_compress OF((Byte *compr, uLong comprLen,
- Byte *uncompr, uLong uncomprLen));
+ Byte *uncompr, uLong uncomprLen));
void test_gzio OF((const char *fname,
- Byte *uncompr, uLong uncomprLen));
+ Byte *uncompr, uLong uncomprLen));
/* ===========================================================================
* Test compress() and uncompress()
*/
void test_compress(compr, comprLen, uncompr, uncomprLen)
- Byte *compr, *uncompr;
- uLong comprLen, uncomprLen;
+ Byte *compr, *uncompr;
+ uLong comprLen, uncomprLen;
{
- int err;
- uLong len = (uLong)strlen(hello)+1;
+ int err;
+ uLong len = (uLong)strlen(hello)+1;
- err = compress(compr, &comprLen, (const Bytef*)hello, len);
- CHECK_ERR(err, "compress");
+ err = compress(compr, &comprLen, (const Bytef*)hello, len);
+ CHECK_ERR(err, "compress");
- strcpy((char*)uncompr, "garbage");
+ strcpy((char*)uncompr, "garbage");
- err = uncompress(uncompr, &uncomprLen, compr, comprLen);
- CHECK_ERR(err, "uncompress");
+ err = uncompress(uncompr, &uncomprLen, compr, comprLen);
+ CHECK_ERR(err, "uncompress");
- if (strcmp((char*)uncompr, hello)) {
- fprintf(stderr, "bad uncompress\n");
- exit(1);
- } else {
- printf("uncompress(): %s\n", (char *)uncompr);
- }
+ if (strcmp((char*)uncompr, hello)) {
+ fprintf(stderr, "bad uncompress\n");
+ exit(1);
+ } else {
+ printf("uncompress(): %s\n", (char *)uncompr);
+ }
}
/* ===========================================================================
* Test read/write of .gz files
*/
void test_gzio(fname, uncompr, uncomprLen)
- const char *fname; /* compressed file name */
- Byte *uncompr;
- uLong uncomprLen;
+ const char *fname; /* compressed file name */
+ Byte *uncompr;
+ uLong uncomprLen;
{
#ifdef NO_GZCOMPRESS
- fprintf(stderr, "NO_GZCOMPRESS -- gz* functions cannot compress\n");
+ fprintf(stderr, "NO_GZCOMPRESS -- gz* functions cannot compress\n");
#else
- int err;
- int len = (int)strlen(hello)+1;
- gzFile file;
- z_off_t pos;
-
- file = gzopen(fname, "wb");
- if (file == NULL) {
- fprintf(stderr, "gzopen error\n");
- exit(1);
- }
- gzputc(file, 'h');
- if (gzputs(file, "ello") != 4) {
- fprintf(stderr, "gzputs err: %s\n", gzerror(file, &err));
- exit(1);
- }
- if (gzprintf(file, ", %s!", "hello") != 8) {
- fprintf(stderr, "gzprintf err: %s\n", gzerror(file, &err));
- exit(1);
- }
- gzseek(file, 1L, SEEK_CUR); /* add one zero byte */
- gzclose(file);
-
- file = gzopen(fname, "rb");
- if (file == NULL) {
- fprintf(stderr, "gzopen error\n");
- exit(1);
- }
- strcpy((char*)uncompr, "garbage");
-
- if (gzread(file, uncompr, (unsigned)uncomprLen) != len) {
- fprintf(stderr, "gzread err: %s\n", gzerror(file, &err));
- exit(1);
- }
- if (strcmp((char*)uncompr, hello)) {
- fprintf(stderr, "bad gzread: %s\n", (char*)uncompr);
- exit(1);
- } else {
- printf("gzread(): %s\n", (char*)uncompr);
- }
-
- pos = gzseek(file, -8L, SEEK_CUR);
- if (pos != 6 || gztell(file) != pos) {
- fprintf(stderr, "gzseek error, pos=%ld, gztell=%ld\n",
- (long)pos, (long)gztell(file));
- exit(1);
- }
-
- if (gzgetc(file) != ' ') {
- fprintf(stderr, "gzgetc error\n");
- exit(1);
- }
-
- if (gzungetc(' ', file) != ' ') {
- fprintf(stderr, "gzungetc error\n");
- exit(1);
- }
-
- gzgets(file, (char*)uncompr, (int)uncomprLen);
- if (strlen((char*)uncompr) != 7) { /* " hello!" */
- fprintf(stderr, "gzgets err after gzseek: %s\n", gzerror(file, &err));
- exit(1);
- }
- if (strcmp((char*)uncompr, hello + 6)) {
- fprintf(stderr, "bad gzgets after gzseek\n");
- exit(1);
- } else {
- printf("gzgets() after gzseek: %s\n", (char*)uncompr);
- }
-
- gzclose(file);
+ int err;
+ int len = (int)strlen(hello)+1;
+ gzFile file;
+ z_off_t pos;
+
+ file = gzopen(fname, "wb");
+ if (file == NULL) {
+ fprintf(stderr, "gzopen error\n");
+ exit(1);
+ }
+ gzputc(file, 'h');
+ if (gzputs(file, "ello") != 4) {
+ fprintf(stderr, "gzputs err: %s\n", gzerror(file, &err));
+ exit(1);
+ }
+ if (gzprintf(file, ", %s!", "hello") != 8) {
+ fprintf(stderr, "gzprintf err: %s\n", gzerror(file, &err));
+ exit(1);
+ }
+ gzseek(file, 1L, SEEK_CUR); /* add one zero byte */
+ gzclose(file);
+
+ file = gzopen(fname, "rb");
+ if (file == NULL) {
+ fprintf(stderr, "gzopen error\n");
+ exit(1);
+ }
+ strcpy((char*)uncompr, "garbage");
+
+ if (gzread(file, uncompr, (unsigned)uncomprLen) != len) {
+ fprintf(stderr, "gzread err: %s\n", gzerror(file, &err));
+ exit(1);
+ }
+ if (strcmp((char*)uncompr, hello)) {
+ fprintf(stderr, "bad gzread: %s\n", (char*)uncompr);
+ exit(1);
+ } else {
+ printf("gzread(): %s\n", (char*)uncompr);
+ }
+
+ pos = gzseek(file, -8L, SEEK_CUR);
+ if (pos != 6 || gztell(file) != pos) {
+ fprintf(stderr, "gzseek error, pos=%ld, gztell=%ld\n",
+ (long)pos, (long)gztell(file));
+ exit(1);
+ }
+
+ if (gzgetc(file) != ' ') {
+ fprintf(stderr, "gzgetc error\n");
+ exit(1);
+ }
+
+ if (gzungetc(' ', file) != ' ') {
+ fprintf(stderr, "gzungetc error\n");
+ exit(1);
+ }
+
+ gzgets(file, (char*)uncompr, (int)uncomprLen);
+ if (strlen((char*)uncompr) != 7) { /* " hello!" */
+ fprintf(stderr, "gzgets err after gzseek: %s\n", gzerror(file, &err));
+ exit(1);
+ }
+ if (strcmp((char*)uncompr, hello + 6)) {
+ fprintf(stderr, "bad gzgets after gzseek\n");
+ exit(1);
+ } else {
+ printf("gzgets() after gzseek: %s\n", (char*)uncompr);
+ }
+
+ gzclose(file);
#endif
}
@@ -198,344 +198,344 @@ void test_gzio(fname, uncompr, uncomprLen)
* Test deflate() with small buffers
*/
void test_deflate(compr, comprLen)
- Byte *compr;
- uLong comprLen;
+ Byte *compr;
+ uLong comprLen;
{
- z_stream c_stream; /* compression stream */
- int err;
- uLong len = (uLong)strlen(hello)+1;
-
- c_stream.zalloc = zalloc;
- c_stream.zfree = zfree;
- c_stream.opaque = (voidpf)0;
-
- err = deflateInit(&c_stream, Z_DEFAULT_COMPRESSION);
- CHECK_ERR(err, "deflateInit");
-
- c_stream.next_in = (Bytef*)hello;
- c_stream.next_out = compr;
-
- while (c_stream.total_in != len && c_stream.total_out < comprLen) {
- c_stream.avail_in = c_stream.avail_out = 1; /* force small buffers */
- err = deflate(&c_stream, Z_NO_FLUSH);
- CHECK_ERR(err, "deflate");
- }
- /* Finish the stream, still forcing small buffers: */
- for (;;) {
- c_stream.avail_out = 1;
- err = deflate(&c_stream, Z_FINISH);
- if (err == Z_STREAM_END) break;
- CHECK_ERR(err, "deflate");
- }
-
- err = deflateEnd(&c_stream);
- CHECK_ERR(err, "deflateEnd");
+ z_stream c_stream; /* compression stream */
+ int err;
+ uLong len = (uLong)strlen(hello)+1;
+
+ c_stream.zalloc = zalloc;
+ c_stream.zfree = zfree;
+ c_stream.opaque = (voidpf)0;
+
+ err = deflateInit(&c_stream, Z_DEFAULT_COMPRESSION);
+ CHECK_ERR(err, "deflateInit");
+
+ c_stream.next_in = (Bytef*)hello;
+ c_stream.next_out = compr;
+
+ while (c_stream.total_in != len && c_stream.total_out < comprLen) {
+ c_stream.avail_in = c_stream.avail_out = 1; /* force small buffers */
+ err = deflate(&c_stream, Z_NO_FLUSH);
+ CHECK_ERR(err, "deflate");
+ }
+ /* Finish the stream, still forcing small buffers: */
+ for (;;) {
+ c_stream.avail_out = 1;
+ err = deflate(&c_stream, Z_FINISH);
+ if (err == Z_STREAM_END) break;
+ CHECK_ERR(err, "deflate");
+ }
+
+ err = deflateEnd(&c_stream);
+ CHECK_ERR(err, "deflateEnd");
}
/* ===========================================================================
* Test inflate() with small buffers
*/
void test_inflate(compr, comprLen, uncompr, uncomprLen)
- Byte *compr, *uncompr;
- uLong comprLen, uncomprLen;
+ Byte *compr, *uncompr;
+ uLong comprLen, uncomprLen;
{
- int err;
- z_stream d_stream; /* decompression stream */
-
- strcpy((char*)uncompr, "garbage");
-
- d_stream.zalloc = zalloc;
- d_stream.zfree = zfree;
- d_stream.opaque = (voidpf)0;
-
- d_stream.next_in = compr;
- d_stream.avail_in = 0;
- d_stream.next_out = uncompr;
-
- err = inflateInit(&d_stream);
- CHECK_ERR(err, "inflateInit");
-
- while (d_stream.total_out < uncomprLen && d_stream.total_in < comprLen) {
- d_stream.avail_in = d_stream.avail_out = 1; /* force small buffers */
- err = inflate(&d_stream, Z_NO_FLUSH);
- if (err == Z_STREAM_END) break;
- CHECK_ERR(err, "inflate");
- }
-
- err = inflateEnd(&d_stream);
- CHECK_ERR(err, "inflateEnd");
-
- if (strcmp((char*)uncompr, hello)) {
- fprintf(stderr, "bad inflate\n");
- exit(1);
- } else {
- printf("inflate(): %s\n", (char *)uncompr);
- }
+ int err;
+ z_stream d_stream; /* decompression stream */
+
+ strcpy((char*)uncompr, "garbage");
+
+ d_stream.zalloc = zalloc;
+ d_stream.zfree = zfree;
+ d_stream.opaque = (voidpf)0;
+
+ d_stream.next_in = compr;
+ d_stream.avail_in = 0;
+ d_stream.next_out = uncompr;
+
+ err = inflateInit(&d_stream);
+ CHECK_ERR(err, "inflateInit");
+
+ while (d_stream.total_out < uncomprLen && d_stream.total_in < comprLen) {
+ d_stream.avail_in = d_stream.avail_out = 1; /* force small buffers */
+ err = inflate(&d_stream, Z_NO_FLUSH);
+ if (err == Z_STREAM_END) break;
+ CHECK_ERR(err, "inflate");
+ }
+
+ err = inflateEnd(&d_stream);
+ CHECK_ERR(err, "inflateEnd");
+
+ if (strcmp((char*)uncompr, hello)) {
+ fprintf(stderr, "bad inflate\n");
+ exit(1);
+ } else {
+ printf("inflate(): %s\n", (char *)uncompr);
+ }
}
/* ===========================================================================
* Test deflate() with large buffers and dynamic change of compression level
*/
void test_large_deflate(compr, comprLen, uncompr, uncomprLen)
- Byte *compr, *uncompr;
- uLong comprLen, uncomprLen;
+ Byte *compr, *uncompr;
+ uLong comprLen, uncomprLen;
{
- z_stream c_stream; /* compression stream */
- int err;
-
- c_stream.zalloc = zalloc;
- c_stream.zfree = zfree;
- c_stream.opaque = (voidpf)0;
-
- err = deflateInit(&c_stream, Z_BEST_SPEED);
- CHECK_ERR(err, "deflateInit");
-
- c_stream.next_out = compr;
- c_stream.avail_out = (uInt)comprLen;
-
- /* At this point, uncompr is still mostly zeroes, so it should compress
- * very well:
- */
- c_stream.next_in = uncompr;
- c_stream.avail_in = (uInt)uncomprLen;
- err = deflate(&c_stream, Z_NO_FLUSH);
- CHECK_ERR(err, "deflate");
- if (c_stream.avail_in != 0) {
- fprintf(stderr, "deflate not greedy\n");
- exit(1);
- }
-
- /* Feed in already compressed data and switch to no compression: */
- deflateParams(&c_stream, Z_NO_COMPRESSION, Z_DEFAULT_STRATEGY);
- c_stream.next_in = compr;
- c_stream.avail_in = (uInt)comprLen/2;
- err = deflate(&c_stream, Z_NO_FLUSH);
- CHECK_ERR(err, "deflate");
-
- /* Switch back to compressing mode: */
- deflateParams(&c_stream, Z_BEST_COMPRESSION, Z_FILTERED);
- c_stream.next_in = uncompr;
- c_stream.avail_in = (uInt)uncomprLen;
- err = deflate(&c_stream, Z_NO_FLUSH);
- CHECK_ERR(err, "deflate");
-
- err = deflate(&c_stream, Z_FINISH);
- if (err != Z_STREAM_END) {
- fprintf(stderr, "deflate should report Z_STREAM_END\n");
- exit(1);
- }
- err = deflateEnd(&c_stream);
- CHECK_ERR(err, "deflateEnd");
+ z_stream c_stream; /* compression stream */
+ int err;
+
+ c_stream.zalloc = zalloc;
+ c_stream.zfree = zfree;
+ c_stream.opaque = (voidpf)0;
+
+ err = deflateInit(&c_stream, Z_BEST_SPEED);
+ CHECK_ERR(err, "deflateInit");
+
+ c_stream.next_out = compr;
+ c_stream.avail_out = (uInt)comprLen;
+
+ /* At this point, uncompr is still mostly zeroes, so it should compress
+ * very well:
+ */
+ c_stream.next_in = uncompr;
+ c_stream.avail_in = (uInt)uncomprLen;
+ err = deflate(&c_stream, Z_NO_FLUSH);
+ CHECK_ERR(err, "deflate");
+ if (c_stream.avail_in != 0) {
+ fprintf(stderr, "deflate not greedy\n");
+ exit(1);
+ }
+
+ /* Feed in already compressed data and switch to no compression: */
+ deflateParams(&c_stream, Z_NO_COMPRESSION, Z_DEFAULT_STRATEGY);
+ c_stream.next_in = compr;
+ c_stream.avail_in = (uInt)comprLen/2;
+ err = deflate(&c_stream, Z_NO_FLUSH);
+ CHECK_ERR(err, "deflate");
+
+ /* Switch back to compressing mode: */
+ deflateParams(&c_stream, Z_BEST_COMPRESSION, Z_FILTERED);
+ c_stream.next_in = uncompr;
+ c_stream.avail_in = (uInt)uncomprLen;
+ err = deflate(&c_stream, Z_NO_FLUSH);
+ CHECK_ERR(err, "deflate");
+
+ err = deflate(&c_stream, Z_FINISH);
+ if (err != Z_STREAM_END) {
+ fprintf(stderr, "deflate should report Z_STREAM_END\n");
+ exit(1);
+ }
+ err = deflateEnd(&c_stream);
+ CHECK_ERR(err, "deflateEnd");
}
/* ===========================================================================
* Test inflate() with large buffers
*/
void test_large_inflate(compr, comprLen, uncompr, uncomprLen)
- Byte *compr, *uncompr;
- uLong comprLen, uncomprLen;
+ Byte *compr, *uncompr;
+ uLong comprLen, uncomprLen;
{
- int err;
- z_stream d_stream; /* decompression stream */
-
- strcpy((char*)uncompr, "garbage");
-
- d_stream.zalloc = zalloc;
- d_stream.zfree = zfree;
- d_stream.opaque = (voidpf)0;
-
- d_stream.next_in = compr;
- d_stream.avail_in = (uInt)comprLen;
-
- err = inflateInit(&d_stream);
- CHECK_ERR(err, "inflateInit");
-
- for (;;) {
- d_stream.next_out = uncompr; /* discard the output */
- d_stream.avail_out = (uInt)uncomprLen;
- err = inflate(&d_stream, Z_NO_FLUSH);
- if (err == Z_STREAM_END) break;
- CHECK_ERR(err, "large inflate");
- }
-
- err = inflateEnd(&d_stream);
- CHECK_ERR(err, "inflateEnd");
-
- if (d_stream.total_out != 2*uncomprLen + comprLen/2) {
- fprintf(stderr, "bad large inflate: %ld\n", d_stream.total_out);
- exit(1);
- } else {
- printf("large_inflate(): OK\n");
- }
+ int err;
+ z_stream d_stream; /* decompression stream */
+
+ strcpy((char*)uncompr, "garbage");
+
+ d_stream.zalloc = zalloc;
+ d_stream.zfree = zfree;
+ d_stream.opaque = (voidpf)0;
+
+ d_stream.next_in = compr;
+ d_stream.avail_in = (uInt)comprLen;
+
+ err = inflateInit(&d_stream);
+ CHECK_ERR(err, "inflateInit");
+
+ for (;;) {
+ d_stream.next_out = uncompr; /* discard the output */
+ d_stream.avail_out = (uInt)uncomprLen;
+ err = inflate(&d_stream, Z_NO_FLUSH);
+ if (err == Z_STREAM_END) break;
+ CHECK_ERR(err, "large inflate");
+ }
+
+ err = inflateEnd(&d_stream);
+ CHECK_ERR(err, "inflateEnd");
+
+ if (d_stream.total_out != 2*uncomprLen + comprLen/2) {
+ fprintf(stderr, "bad large inflate: %ld\n", d_stream.total_out);
+ exit(1);
+ } else {
+ printf("large_inflate(): OK\n");
+ }
}
/* ===========================================================================
* Test deflate() with full flush
*/
void test_flush(compr, comprLen)
- Byte *compr;
- uLong *comprLen;
+ Byte *compr;
+ uLong *comprLen;
{
- z_stream c_stream; /* compression stream */
- int err;
- uInt len = (uInt)strlen(hello)+1;
-
- c_stream.zalloc = zalloc;
- c_stream.zfree = zfree;
- c_stream.opaque = (voidpf)0;
-
- err = deflateInit(&c_stream, Z_DEFAULT_COMPRESSION);
- CHECK_ERR(err, "deflateInit");
-
- c_stream.next_in = (Bytef*)hello;
- c_stream.next_out = compr;
- c_stream.avail_in = 3;
- c_stream.avail_out = (uInt)*comprLen;
- err = deflate(&c_stream, Z_FULL_FLUSH);
- CHECK_ERR(err, "deflate");
-
- compr[3]++; /* force an error in first compressed block */
- c_stream.avail_in = len - 3;
-
- err = deflate(&c_stream, Z_FINISH);
- if (err != Z_STREAM_END) {
- CHECK_ERR(err, "deflate");
- }
- err = deflateEnd(&c_stream);
- CHECK_ERR(err, "deflateEnd");
-
- *comprLen = c_stream.total_out;
+ z_stream c_stream; /* compression stream */
+ int err;
+ uInt len = (uInt)strlen(hello)+1;
+
+ c_stream.zalloc = zalloc;
+ c_stream.zfree = zfree;
+ c_stream.opaque = (voidpf)0;
+
+ err = deflateInit(&c_stream, Z_DEFAULT_COMPRESSION);
+ CHECK_ERR(err, "deflateInit");
+
+ c_stream.next_in = (Bytef*)hello;
+ c_stream.next_out = compr;
+ c_stream.avail_in = 3;
+ c_stream.avail_out = (uInt)*comprLen;
+ err = deflate(&c_stream, Z_FULL_FLUSH);
+ CHECK_ERR(err, "deflate");
+
+ compr[3]++; /* force an error in first compressed block */
+ c_stream.avail_in = len - 3;
+
+ err = deflate(&c_stream, Z_FINISH);
+ if (err != Z_STREAM_END) {
+ CHECK_ERR(err, "deflate");
+ }
+ err = deflateEnd(&c_stream);
+ CHECK_ERR(err, "deflateEnd");
+
+ *comprLen = c_stream.total_out;
}
/* ===========================================================================
* Test inflateSync()
*/
void test_sync(compr, comprLen, uncompr, uncomprLen)
- Byte *compr, *uncompr;
- uLong comprLen, uncomprLen;
+ Byte *compr, *uncompr;
+ uLong comprLen, uncomprLen;
{
- int err;
- z_stream d_stream; /* decompression stream */
+ int err;
+ z_stream d_stream; /* decompression stream */
- strcpy((char*)uncompr, "garbage");
+ strcpy((char*)uncompr, "garbage");
- d_stream.zalloc = zalloc;
- d_stream.zfree = zfree;
- d_stream.opaque = (voidpf)0;
+ d_stream.zalloc = zalloc;
+ d_stream.zfree = zfree;
+ d_stream.opaque = (voidpf)0;
- d_stream.next_in = compr;
- d_stream.avail_in = 2; /* just read the zlib header */
+ d_stream.next_in = compr;
+ d_stream.avail_in = 2; /* just read the zlib header */
- err = inflateInit(&d_stream);
- CHECK_ERR(err, "inflateInit");
+ err = inflateInit(&d_stream);
+ CHECK_ERR(err, "inflateInit");
- d_stream.next_out = uncompr;
- d_stream.avail_out = (uInt)uncomprLen;
+ d_stream.next_out = uncompr;
+ d_stream.avail_out = (uInt)uncomprLen;
- inflate(&d_stream, Z_NO_FLUSH);
- CHECK_ERR(err, "inflate");
+ inflate(&d_stream, Z_NO_FLUSH);
+ CHECK_ERR(err, "inflate");
- d_stream.avail_in = (uInt)comprLen-2; /* read all compressed data */
- err = inflateSync(&d_stream); /* but skip the damaged part */
- CHECK_ERR(err, "inflateSync");
+ d_stream.avail_in = (uInt)comprLen-2; /* read all compressed data */
+ err = inflateSync(&d_stream); /* but skip the damaged part */
+ CHECK_ERR(err, "inflateSync");
- err = inflate(&d_stream, Z_FINISH);
- if (err != Z_DATA_ERROR) {
- fprintf(stderr, "inflate should report DATA_ERROR\n");
- /* Because of incorrect adler32 */
- exit(1);
- }
- err = inflateEnd(&d_stream);
- CHECK_ERR(err, "inflateEnd");
+ err = inflate(&d_stream, Z_FINISH);
+ if (err != Z_DATA_ERROR) {
+ fprintf(stderr, "inflate should report DATA_ERROR\n");
+ /* Because of incorrect adler32 */
+ exit(1);
+ }
+ err = inflateEnd(&d_stream);
+ CHECK_ERR(err, "inflateEnd");
- printf("after inflateSync(): hel%s\n", (char *)uncompr);
+ printf("after inflateSync(): hel%s\n", (char *)uncompr);
}
/* ===========================================================================
* Test deflate() with preset dictionary
*/
void test_dict_deflate(compr, comprLen)
- Byte *compr;
- uLong comprLen;
+ Byte *compr;
+ uLong comprLen;
{
- z_stream c_stream; /* compression stream */
- int err;
-
- c_stream.zalloc = zalloc;
- c_stream.zfree = zfree;
- c_stream.opaque = (voidpf)0;
-
- err = deflateInit(&c_stream, Z_BEST_COMPRESSION);
- CHECK_ERR(err, "deflateInit");
-
- err = deflateSetDictionary(&c_stream,
- (const Bytef*)dictionary, (int)sizeof(dictionary));
- CHECK_ERR(err, "deflateSetDictionary");
-
- dictId = c_stream.adler;
- c_stream.next_out = compr;
- c_stream.avail_out = (uInt)comprLen;
-
- c_stream.next_in = (Bytef*)hello;
- c_stream.avail_in = (uInt)strlen(hello)+1;
-
- err = deflate(&c_stream, Z_FINISH);
- if (err != Z_STREAM_END) {
- fprintf(stderr, "deflate should report Z_STREAM_END\n");
- exit(1);
- }
- err = deflateEnd(&c_stream);
- CHECK_ERR(err, "deflateEnd");
+ z_stream c_stream; /* compression stream */
+ int err;
+
+ c_stream.zalloc = zalloc;
+ c_stream.zfree = zfree;
+ c_stream.opaque = (voidpf)0;
+
+ err = deflateInit(&c_stream, Z_BEST_COMPRESSION);
+ CHECK_ERR(err, "deflateInit");
+
+ err = deflateSetDictionary(&c_stream,
+ (const Bytef*)dictionary, (int)sizeof(dictionary));
+ CHECK_ERR(err, "deflateSetDictionary");
+
+ dictId = c_stream.adler;
+ c_stream.next_out = compr;
+ c_stream.avail_out = (uInt)comprLen;
+
+ c_stream.next_in = (Bytef*)hello;
+ c_stream.avail_in = (uInt)strlen(hello)+1;
+
+ err = deflate(&c_stream, Z_FINISH);
+ if (err != Z_STREAM_END) {
+ fprintf(stderr, "deflate should report Z_STREAM_END\n");
+ exit(1);
+ }
+ err = deflateEnd(&c_stream);
+ CHECK_ERR(err, "deflateEnd");
}
/* ===========================================================================
* Test inflate() with a preset dictionary
*/
void test_dict_inflate(compr, comprLen, uncompr, uncomprLen)
- Byte *compr, *uncompr;
- uLong comprLen, uncomprLen;
+ Byte *compr, *uncompr;
+ uLong comprLen, uncomprLen;
{
- int err;
- z_stream d_stream; /* decompression stream */
-
- strcpy((char*)uncompr, "garbage");
-
- d_stream.zalloc = zalloc;
- d_stream.zfree = zfree;
- d_stream.opaque = (voidpf)0;
-
- d_stream.next_in = compr;
- d_stream.avail_in = (uInt)comprLen;
-
- err = inflateInit(&d_stream);
- CHECK_ERR(err, "inflateInit");
-
- d_stream.next_out = uncompr;
- d_stream.avail_out = (uInt)uncomprLen;
-
- for (;;) {
- err = inflate(&d_stream, Z_NO_FLUSH);
- if (err == Z_STREAM_END) break;
- if (err == Z_NEED_DICT) {
- if (d_stream.adler != dictId) {
- fprintf(stderr, "unexpected dictionary");
- exit(1);
- }
- err = inflateSetDictionary(&d_stream, (const Bytef*)dictionary,
- (int)sizeof(dictionary));
- }
- CHECK_ERR(err, "inflate with dict");
- }
-
- err = inflateEnd(&d_stream);
- CHECK_ERR(err, "inflateEnd");
-
- if (strcmp((char*)uncompr, hello)) {
- fprintf(stderr, "bad inflate with dict\n");
- exit(1);
- } else {
- printf("inflate with dictionary: %s\n", (char *)uncompr);
- }
+ int err;
+ z_stream d_stream; /* decompression stream */
+
+ strcpy((char*)uncompr, "garbage");
+
+ d_stream.zalloc = zalloc;
+ d_stream.zfree = zfree;
+ d_stream.opaque = (voidpf)0;
+
+ d_stream.next_in = compr;
+ d_stream.avail_in = (uInt)comprLen;
+
+ err = inflateInit(&d_stream);
+ CHECK_ERR(err, "inflateInit");
+
+ d_stream.next_out = uncompr;
+ d_stream.avail_out = (uInt)uncomprLen;
+
+ for (;;) {
+ err = inflate(&d_stream, Z_NO_FLUSH);
+ if (err == Z_STREAM_END) break;
+ if (err == Z_NEED_DICT) {
+ if (d_stream.adler != dictId) {
+ fprintf(stderr, "unexpected dictionary");
+ exit(1);
+ }
+ err = inflateSetDictionary(&d_stream, (const Bytef*)dictionary,
+ (int)sizeof(dictionary));
+ }
+ CHECK_ERR(err, "inflate with dict");
+ }
+
+ err = inflateEnd(&d_stream);
+ CHECK_ERR(err, "inflateEnd");
+
+ if (strcmp((char*)uncompr, hello)) {
+ fprintf(stderr, "bad inflate with dict\n");
+ exit(1);
+ } else {
+ printf("inflate with dictionary: %s\n", (char *)uncompr);
+ }
}
/* ===========================================================================
@@ -543,59 +543,59 @@ void test_dict_inflate(compr, comprLen, uncompr, uncomprLen)
*/
int main(argc, argv)
- int argc;
- char *argv[];
+ int argc;
+ char *argv[];
{
- Byte *compr, *uncompr;
- uLong comprLen = 10000*sizeof(int); /* don't overflow on MSDOS */
- uLong uncomprLen = comprLen;
- static const char* myVersion = ZLIB_VERSION;
-
- if (zlibVersion()[0] != myVersion[0]) {
- fprintf(stderr, "incompatible zlib version\n");
- exit(1);
-
- } else if (strcmp(zlibVersion(), ZLIB_VERSION) != 0) {
- fprintf(stderr, "warning: different zlib version\n");
- }
-
- printf("zlib version %s = 0x%04x, compile flags = 0x%lx\n",
- ZLIB_VERSION, ZLIB_VERNUM, zlibCompileFlags());
-
- compr = (Byte*)calloc((uInt)comprLen, 1);
- uncompr = (Byte*)calloc((uInt)uncomprLen, 1);
- /* compr and uncompr are cleared to avoid reading uninitialized
- * data and to ensure that uncompr compresses well.
- */
- if (compr == Z_NULL || uncompr == Z_NULL) {
- printf("out of memory\n");
- exit(1);
- }
+ Byte *compr, *uncompr;
+ uLong comprLen = 10000*sizeof(int); /* don't overflow on MSDOS */
+ uLong uncomprLen = comprLen;
+ static const char* myVersion = ZLIB_VERSION;
+
+ if (zlibVersion()[0] != myVersion[0]) {
+ fprintf(stderr, "incompatible zlib version\n");
+ exit(1);
+
+ } else if (strcmp(zlibVersion(), ZLIB_VERSION) != 0) {
+ fprintf(stderr, "warning: different zlib version\n");
+ }
+
+ printf("zlib version %s = 0x%04x, compile flags = 0x%lx\n",
+ ZLIB_VERSION, ZLIB_VERNUM, zlibCompileFlags());
+
+ compr = (Byte*)calloc((uInt)comprLen, 1);
+ uncompr = (Byte*)calloc((uInt)uncomprLen, 1);
+ /* compr and uncompr are cleared to avoid reading uninitialized
+ * data and to ensure that uncompr compresses well.
+ */
+ if (compr == Z_NULL || uncompr == Z_NULL) {
+ printf("out of memory\n");
+ exit(1);
+ }
#ifdef Z_SOLO
- argc = strlen(argv[0]);
+ argc = strlen(argv[0]);
#else
- test_compress(compr, comprLen, uncompr, uncomprLen);
+ test_compress(compr, comprLen, uncompr, uncomprLen);
- test_gzio((argc > 1 ? argv[1] : TESTFILE),
- uncompr, uncomprLen);
+ test_gzio((argc > 1 ? argv[1] : TESTFILE),
+ uncompr, uncomprLen);
#endif
- test_deflate(compr, comprLen);
- test_inflate(compr, comprLen, uncompr, uncomprLen);
+ test_deflate(compr, comprLen);
+ test_inflate(compr, comprLen, uncompr, uncomprLen);
- test_large_deflate(compr, comprLen, uncompr, uncomprLen);
- test_large_inflate(compr, comprLen, uncompr, uncomprLen);
+ test_large_deflate(compr, comprLen, uncompr, uncomprLen);
+ test_large_inflate(compr, comprLen, uncompr, uncomprLen);
- test_flush(compr, &comprLen);
- test_sync(compr, comprLen, uncompr, uncomprLen);
- comprLen = uncomprLen;
+ test_flush(compr, &comprLen);
+ test_sync(compr, comprLen, uncompr, uncomprLen);
+ comprLen = uncomprLen;
- test_dict_deflate(compr, comprLen);
- test_dict_inflate(compr, comprLen, uncompr, uncomprLen);
+ test_dict_deflate(compr, comprLen);
+ test_dict_inflate(compr, comprLen, uncompr, uncomprLen);
- free(compr);
- free(uncompr);
+ free(compr);
+ free(uncompr);
- return 0;
+ return 0;
}
diff --git a/src/lib/zlib/gzclose.c b/src/lib/zlib/gzclose.c
index caeb99a3177..05c10c06547 100644
--- a/src/lib/zlib/gzclose.c
+++ b/src/lib/zlib/gzclose.c
@@ -9,17 +9,17 @@
That way the other gzclose functions can be used instead to avoid linking in
unneeded compression or decompression routines. */
int ZEXPORT gzclose(file)
- gzFile file;
+ gzFile file;
{
#ifndef NO_GZCOMPRESS
- gz_statep state;
+ gz_statep state;
- if (file == NULL)
- return Z_STREAM_ERROR;
- state = (gz_statep)file;
+ if (file == NULL)
+ return Z_STREAM_ERROR;
+ state = (gz_statep)file;
- return state->mode == GZ_READ ? gzclose_r(file) : gzclose_w(file);
+ return state->mode == GZ_READ ? gzclose_r(file) : gzclose_w(file);
#else
- return gzclose_r(file);
+ return gzclose_r(file);
#endif
}
diff --git a/src/lib/zlib/gzguts.h b/src/lib/zlib/gzguts.h
index ee3f281aa57..8e6137bec44 100644
--- a/src/lib/zlib/gzguts.h
+++ b/src/lib/zlib/gzguts.h
@@ -95,8 +95,8 @@
/* gz* functions always use library allocation functions */
#ifndef STDC
- extern voidp malloc OF((uInt size));
- extern void free OF((voidpf ptr));
+ extern voidp malloc OF((uInt size));
+ extern void free OF((voidpf ptr));
#endif
/* get errno and strerror definition */
@@ -114,10 +114,10 @@
/* provide prototypes for these when building zlib without LFS */
#if !defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0
- ZEXTERN gzFile ZEXPORT gzopen64 OF((const char *, const char *));
- ZEXTERN z_off64_t ZEXPORT gzseek64 OF((gzFile, z_off64_t, int));
- ZEXTERN z_off64_t ZEXPORT gztell64 OF((gzFile));
- ZEXTERN z_off64_t ZEXPORT gzoffset64 OF((gzFile));
+ ZEXTERN gzFile ZEXPORT gzopen64 OF((const char *, const char *));
+ ZEXTERN z_off64_t ZEXPORT gzseek64 OF((gzFile, z_off64_t, int));
+ ZEXTERN z_off64_t ZEXPORT gztell64 OF((gzFile));
+ ZEXTERN z_off64_t ZEXPORT gzoffset64 OF((gzFile));
#endif
/* default memLevel */
@@ -143,36 +143,36 @@
/* internal gzip file state data structure */
typedef struct {
- /* exposed contents for gzgetc() macro */
- struct gzFile_s x; /* "x" for exposed */
- /* x.have: number of bytes available at x.next */
- /* x.next: next output data to deliver or write */
- /* x.pos: current position in uncompressed data */
- /* used for both reading and writing */
- int mode; /* see gzip modes above */
- int fd; /* file descriptor */
- char *path; /* path or fd for error messages */
- unsigned size; /* buffer size, zero if not allocated yet */
- unsigned want; /* requested buffer size, default is GZBUFSIZE */
- unsigned char *in; /* input buffer */
- unsigned char *out; /* output buffer (double-sized when reading) */
- int direct; /* 0 if processing gzip, 1 if transparent */
- /* just for reading */
- int how; /* 0: get header, 1: copy, 2: decompress */
- z_off64_t start; /* where the gzip data started, for rewinding */
- int eof; /* true if end of input file reached */
- int past; /* true if read requested past end */
- /* just for writing */
- int level; /* compression level */
- int strategy; /* compression strategy */
- /* seek request */
- z_off64_t skip; /* amount to skip (already rewound if backwards) */
- int seek; /* true if seek request pending */
- /* error information */
- int err; /* error code */
- char *msg; /* error message */
- /* zlib inflate or deflate stream */
- z_stream strm; /* stream structure in-place (not a pointer) */
+ /* exposed contents for gzgetc() macro */
+ struct gzFile_s x; /* "x" for exposed */
+ /* x.have: number of bytes available at x.next */
+ /* x.next: next output data to deliver or write */
+ /* x.pos: current position in uncompressed data */
+ /* used for both reading and writing */
+ int mode; /* see gzip modes above */
+ int fd; /* file descriptor */
+ char *path; /* path or fd for error messages */
+ unsigned size; /* buffer size, zero if not allocated yet */
+ unsigned want; /* requested buffer size, default is GZBUFSIZE */
+ unsigned char *in; /* input buffer */
+ unsigned char *out; /* output buffer (double-sized when reading) */
+ int direct; /* 0 if processing gzip, 1 if transparent */
+ /* just for reading */
+ int how; /* 0: get header, 1: copy, 2: decompress */
+ z_off64_t start; /* where the gzip data started, for rewinding */
+ int eof; /* true if end of input file reached */
+ int past; /* true if read requested past end */
+ /* just for writing */
+ int level; /* compression level */
+ int strategy; /* compression strategy */
+ /* seek request */
+ z_off64_t skip; /* amount to skip (already rewound if backwards) */
+ int seek; /* true if seek request pending */
+ /* error information */
+ int err; /* error code */
+ char *msg; /* error message */
+ /* zlib inflate or deflate stream */
+ z_stream strm; /* stream structure in-place (not a pointer) */
} gz_state;
typedef gz_state FAR *gz_statep;
diff --git a/src/lib/zlib/gzlib.c b/src/lib/zlib/gzlib.c
index ca55c6ea926..9222f2135ba 100644
--- a/src/lib/zlib/gzlib.c
+++ b/src/lib/zlib/gzlib.c
@@ -31,528 +31,528 @@ local gzFile gz_open OF((const void *, int, const char *));
The gz_strwinerror function does not change the current setting of
GetLastError. */
char ZLIB_INTERNAL *gz_strwinerror (error)
- DWORD error;
+ DWORD error;
{
- static char buf[1024];
-
- wchar_t *msgbuf;
- DWORD lasterr = GetLastError();
- DWORD chars = FormatMessage(FORMAT_MESSAGE_FROM_SYSTEM
- | FORMAT_MESSAGE_ALLOCATE_BUFFER,
- NULL,
- error,
- 0, /* Default language */
- (LPVOID)&msgbuf,
- 0,
- NULL);
- if (chars != 0) {
- /* If there is an \r\n appended, zap it. */
- if (chars >= 2
- && msgbuf[chars - 2] == '\r' && msgbuf[chars - 1] == '\n') {
- chars -= 2;
- msgbuf[chars] = 0;
- }
-
- if (chars > sizeof (buf) - 1) {
- chars = sizeof (buf) - 1;
- msgbuf[chars] = 0;
- }
-
- wcstombs(buf, msgbuf, chars + 1);
- LocalFree(msgbuf);
- }
- else {
- sprintf(buf, "unknown win32 error (%ld)", error);
- }
-
- SetLastError(lasterr);
- return buf;
+ static char buf[1024];
+
+ wchar_t *msgbuf;
+ DWORD lasterr = GetLastError();
+ DWORD chars = FormatMessage(FORMAT_MESSAGE_FROM_SYSTEM
+ | FORMAT_MESSAGE_ALLOCATE_BUFFER,
+ NULL,
+ error,
+ 0, /* Default language */
+ (LPVOID)&msgbuf,
+ 0,
+ NULL);
+ if (chars != 0) {
+ /* If there is an \r\n appended, zap it. */
+ if (chars >= 2
+ && msgbuf[chars - 2] == '\r' && msgbuf[chars - 1] == '\n') {
+ chars -= 2;
+ msgbuf[chars] = 0;
+ }
+
+ if (chars > sizeof (buf) - 1) {
+ chars = sizeof (buf) - 1;
+ msgbuf[chars] = 0;
+ }
+
+ wcstombs(buf, msgbuf, chars + 1);
+ LocalFree(msgbuf);
+ }
+ else {
+ sprintf(buf, "unknown win32 error (%ld)", error);
+ }
+
+ SetLastError(lasterr);
+ return buf;
}
#endif /* UNDER_CE */
/* Reset gzip file state */
local void gz_reset(state)
- gz_statep state;
+ gz_statep state;
{
- state->x.have = 0; /* no output data available */
- if (state->mode == GZ_READ) { /* for reading ... */
- state->eof = 0; /* not at end of file */
- state->past = 0; /* have not read past end yet */
- state->how = LOOK; /* look for gzip header */
- }
- state->seek = 0; /* no seek request pending */
- gz_error(state, Z_OK, NULL); /* clear error */
- state->x.pos = 0; /* no uncompressed data yet */
- state->strm.avail_in = 0; /* no input data yet */
+ state->x.have = 0; /* no output data available */
+ if (state->mode == GZ_READ) { /* for reading ... */
+ state->eof = 0; /* not at end of file */
+ state->past = 0; /* have not read past end yet */
+ state->how = LOOK; /* look for gzip header */
+ }
+ state->seek = 0; /* no seek request pending */
+ gz_error(state, Z_OK, NULL); /* clear error */
+ state->x.pos = 0; /* no uncompressed data yet */
+ state->strm.avail_in = 0; /* no input data yet */
}
/* Open a gzip file either by name or file descriptor. */
local gzFile gz_open(path, fd, mode)
- const void *path;
- int fd;
- const char *mode;
+ const void *path;
+ int fd;
+ const char *mode;
{
- gz_statep state;
- size_t len;
- int oflag;
+ gz_statep state;
+ size_t len;
+ int oflag;
#ifdef O_CLOEXEC
- int cloexec = 0;
+ int cloexec = 0;
#endif
#ifdef O_EXCL
- int exclusive = 0;
+ int exclusive = 0;
#endif
- /* check input */
- if (path == NULL)
- return NULL;
-
- /* allocate gzFile structure to return */
- state = malloc(sizeof(gz_state));
- if (state == NULL)
- return NULL;
- state->size = 0; /* no buffers allocated yet */
- state->want = GZBUFSIZE; /* requested buffer size */
- state->msg = NULL; /* no error message yet */
-
- /* interpret mode */
- state->mode = GZ_NONE;
- state->level = Z_DEFAULT_COMPRESSION;
- state->strategy = Z_DEFAULT_STRATEGY;
- state->direct = 0;
- while (*mode) {
- if (*mode >= '0' && *mode <= '9')
- state->level = *mode - '0';
- else
- switch (*mode) {
- case 'r':
- state->mode = GZ_READ;
- break;
+ /* check input */
+ if (path == NULL)
+ return NULL;
+
+ /* allocate gzFile structure to return */
+ state = malloc(sizeof(gz_state));
+ if (state == NULL)
+ return NULL;
+ state->size = 0; /* no buffers allocated yet */
+ state->want = GZBUFSIZE; /* requested buffer size */
+ state->msg = NULL; /* no error message yet */
+
+ /* interpret mode */
+ state->mode = GZ_NONE;
+ state->level = Z_DEFAULT_COMPRESSION;
+ state->strategy = Z_DEFAULT_STRATEGY;
+ state->direct = 0;
+ while (*mode) {
+ if (*mode >= '0' && *mode <= '9')
+ state->level = *mode - '0';
+ else
+ switch (*mode) {
+ case 'r':
+ state->mode = GZ_READ;
+ break;
#ifndef NO_GZCOMPRESS
- case 'w':
- state->mode = GZ_WRITE;
- break;
- case 'a':
- state->mode = GZ_APPEND;
- break;
+ case 'w':
+ state->mode = GZ_WRITE;
+ break;
+ case 'a':
+ state->mode = GZ_APPEND;
+ break;
#endif
- case '+': /* can't read and write at the same time */
- free(state);
- return NULL;
- case 'b': /* ignore -- will request binary anyway */
- break;
+ case '+': /* can't read and write at the same time */
+ free(state);
+ return NULL;
+ case 'b': /* ignore -- will request binary anyway */
+ break;
#ifdef O_CLOEXEC
- case 'e':
- cloexec = 1;
- break;
+ case 'e':
+ cloexec = 1;
+ break;
#endif
#ifdef O_EXCL
- case 'x':
- exclusive = 1;
- break;
+ case 'x':
+ exclusive = 1;
+ break;
#endif
- case 'f':
- state->strategy = Z_FILTERED;
- break;
- case 'h':
- state->strategy = Z_HUFFMAN_ONLY;
- break;
- case 'R':
- state->strategy = Z_RLE;
- break;
- case 'F':
- state->strategy = Z_FIXED;
- case 'T':
- state->direct = 1;
- default: /* could consider as an error, but just ignore */
- ;
- }
- mode++;
- }
-
- /* must provide an "r", "w", or "a" */
- if (state->mode == GZ_NONE) {
- free(state);
- return NULL;
- }
-
- /* can't force transparent read */
- if (state->mode == GZ_READ) {
- if (state->direct) {
- free(state);
- return NULL;
- }
- state->direct = 1; /* for empty file */
- }
-
- /* save the path name for error messages */
+ case 'f':
+ state->strategy = Z_FILTERED;
+ break;
+ case 'h':
+ state->strategy = Z_HUFFMAN_ONLY;
+ break;
+ case 'R':
+ state->strategy = Z_RLE;
+ break;
+ case 'F':
+ state->strategy = Z_FIXED;
+ case 'T':
+ state->direct = 1;
+ default: /* could consider as an error, but just ignore */
+ ;
+ }
+ mode++;
+ }
+
+ /* must provide an "r", "w", or "a" */
+ if (state->mode == GZ_NONE) {
+ free(state);
+ return NULL;
+ }
+
+ /* can't force transparent read */
+ if (state->mode == GZ_READ) {
+ if (state->direct) {
+ free(state);
+ return NULL;
+ }
+ state->direct = 1; /* for empty file */
+ }
+
+ /* save the path name for error messages */
#ifdef _WIN32
- if (fd == -2) {
- len = wcstombs(NULL, path, 0);
- if (len == (size_t)-1)
- len = 0;
- }
- else
+ if (fd == -2) {
+ len = wcstombs(NULL, path, 0);
+ if (len == (size_t)-1)
+ len = 0;
+ }
+ else
#endif
- len = strlen(path);
- state->path = malloc(len + 1);
- if (state->path == NULL) {
- free(state);
- return NULL;
- }
+ len = strlen(path);
+ state->path = malloc(len + 1);
+ if (state->path == NULL) {
+ free(state);
+ return NULL;
+ }
#ifdef _WIN32
- if (fd == -2)
- if (len)
- wcstombs(state->path, path, len + 1);
- else
- *(state->path) = 0;
- else
+ if (fd == -2)
+ if (len)
+ wcstombs(state->path, path, len + 1);
+ else
+ *(state->path) = 0;
+ else
#endif
- strcpy(state->path, path);
+ strcpy(state->path, path);
- /* compute the flags for open() */
- oflag =
+ /* compute the flags for open() */
+ oflag =
#ifdef O_LARGEFILE
- O_LARGEFILE |
+ O_LARGEFILE |
#endif
#ifdef O_BINARY
- O_BINARY |
+ O_BINARY |
#endif
#ifdef O_CLOEXEC
- (cloexec ? O_CLOEXEC : 0) |
+ (cloexec ? O_CLOEXEC : 0) |
#endif
- (state->mode == GZ_READ ?
- O_RDONLY :
- (O_WRONLY | O_CREAT |
+ (state->mode == GZ_READ ?
+ O_RDONLY :
+ (O_WRONLY | O_CREAT |
#ifdef O_EXCL
- (exclusive ? O_EXCL : 0) |
+ (exclusive ? O_EXCL : 0) |
#endif
- (state->mode == GZ_WRITE ?
- O_TRUNC :
- O_APPEND)));
+ (state->mode == GZ_WRITE ?
+ O_TRUNC :
+ O_APPEND)));
- /* open the file with the appropriate flags (or just use fd) */
- state->fd = fd > -1 ? fd : (
+ /* open the file with the appropriate flags (or just use fd) */
+ state->fd = fd > -1 ? fd : (
#ifdef _WIN32
- fd == -2 ? _wopen(path, oflag, 0666) :
+ fd == -2 ? _wopen(path, oflag, 0666) :
#endif
- open(path, oflag, 0666));
- if (state->fd == -1) {
- free(state->path);
- free(state);
- return NULL;
- }
- if (state->mode == GZ_APPEND)
- state->mode = GZ_WRITE; /* simplify later checks */
-
- /* save the current position for rewinding (only if reading) */
- if (state->mode == GZ_READ) {
- state->start = LSEEK(state->fd, 0, SEEK_CUR);
- if (state->start == -1) state->start = 0;
- }
-
- /* initialize stream */
- gz_reset(state);
-
- /* return stream */
- return (gzFile)state;
+ open(path, oflag, 0666));
+ if (state->fd == -1) {
+ free(state->path);
+ free(state);
+ return NULL;
+ }
+ if (state->mode == GZ_APPEND)
+ state->mode = GZ_WRITE; /* simplify later checks */
+
+ /* save the current position for rewinding (only if reading) */
+ if (state->mode == GZ_READ) {
+ state->start = LSEEK(state->fd, 0, SEEK_CUR);
+ if (state->start == -1) state->start = 0;
+ }
+
+ /* initialize stream */
+ gz_reset(state);
+
+ /* return stream */
+ return (gzFile)state;
}
/* -- see zlib.h -- */
gzFile ZEXPORT gzopen(path, mode)
- const char *path;
- const char *mode;
+ const char *path;
+ const char *mode;
{
- return gz_open(path, -1, mode);
+ return gz_open(path, -1, mode);
}
/* -- see zlib.h -- */
gzFile ZEXPORT gzopen64(path, mode)
- const char *path;
- const char *mode;
+ const char *path;
+ const char *mode;
{
- return gz_open(path, -1, mode);
+ return gz_open(path, -1, mode);
}
/* -- see zlib.h -- */
gzFile ZEXPORT gzdopen(fd, mode)
- int fd;
- const char *mode;
+ int fd;
+ const char *mode;
{
- char *path; /* identifier for error messages */
- gzFile gz;
-
- if (fd == -1 || (path = malloc(7 + 3 * sizeof(int))) == NULL)
- return NULL;
- sprintf(path, "<fd:%d>", fd); /* for debugging */
- gz = gz_open(path, fd, mode);
- free(path);
- return gz;
+ char *path; /* identifier for error messages */
+ gzFile gz;
+
+ if (fd == -1 || (path = malloc(7 + 3 * sizeof(int))) == NULL)
+ return NULL;
+ sprintf(path, "<fd:%d>", fd); /* for debugging */
+ gz = gz_open(path, fd, mode);
+ free(path);
+ return gz;
}
/* -- see zlib.h -- */
#ifdef _WIN32
gzFile ZEXPORT gzopen_w(path, mode)
- const wchar_t *path;
- const char *mode;
+ const wchar_t *path;
+ const char *mode;
{
- return gz_open(path, -2, mode);
+ return gz_open(path, -2, mode);
}
#endif
/* -- see zlib.h -- */
int ZEXPORT gzbuffer(file, size)
- gzFile file;
- unsigned size;
+ gzFile file;
+ unsigned size;
{
- gz_statep state;
-
- /* get internal structure and check integrity */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- if (state->mode != GZ_READ && state->mode != GZ_WRITE)
- return -1;
-
- /* make sure we haven't already allocated memory */
- if (state->size != 0)
- return -1;
-
- /* check and set requested size */
- if (size < 2)
- size = 2; /* need two bytes to check magic header */
- state->want = size;
- return 0;
+ gz_statep state;
+
+ /* get internal structure and check integrity */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ if (state->mode != GZ_READ && state->mode != GZ_WRITE)
+ return -1;
+
+ /* make sure we haven't already allocated memory */
+ if (state->size != 0)
+ return -1;
+
+ /* check and set requested size */
+ if (size < 2)
+ size = 2; /* need two bytes to check magic header */
+ state->want = size;
+ return 0;
}
/* -- see zlib.h -- */
int ZEXPORT gzrewind(file)
- gzFile file;
+ gzFile file;
{
- gz_statep state;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
-
- /* check that we're reading and that there's no error */
- if (state->mode != GZ_READ ||
- (state->err != Z_OK && state->err != Z_BUF_ERROR))
- return -1;
-
- /* back up and start over */
- if (LSEEK(state->fd, state->start, SEEK_SET) == -1)
- return -1;
- gz_reset(state);
- return 0;
+ gz_statep state;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+
+ /* check that we're reading and that there's no error */
+ if (state->mode != GZ_READ ||
+ (state->err != Z_OK && state->err != Z_BUF_ERROR))
+ return -1;
+
+ /* back up and start over */
+ if (LSEEK(state->fd, state->start, SEEK_SET) == -1)
+ return -1;
+ gz_reset(state);
+ return 0;
}
/* -- see zlib.h -- */
z_off64_t ZEXPORT gzseek64(file, offset, whence)
- gzFile file;
- z_off64_t offset;
- int whence;
+ gzFile file;
+ z_off64_t offset;
+ int whence;
{
- unsigned n;
- z_off64_t ret;
- gz_statep state;
-
- /* get internal structure and check integrity */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- if (state->mode != GZ_READ && state->mode != GZ_WRITE)
- return -1;
-
- /* check that there's no error */
- if (state->err != Z_OK && state->err != Z_BUF_ERROR)
- return -1;
-
- /* can only seek from start or relative to current position */
- if (whence != SEEK_SET && whence != SEEK_CUR)
- return -1;
-
- /* normalize offset to a SEEK_CUR specification */
- if (whence == SEEK_SET)
- offset -= state->x.pos;
- else if (state->seek)
- offset += state->skip;
- state->seek = 0;
-
- /* if within raw area while reading, just go there */
- if (state->mode == GZ_READ && state->how == COPY &&
- state->x.pos + offset >= 0) {
- ret = LSEEK(state->fd, offset - state->x.have, SEEK_CUR);
- if (ret == -1)
- return -1;
- state->x.have = 0;
- state->eof = 0;
- state->past = 0;
- state->seek = 0;
- gz_error(state, Z_OK, NULL);
- state->strm.avail_in = 0;
- state->x.pos += offset;
- return state->x.pos;
- }
-
- /* calculate skip amount, rewinding if needed for back seek when reading */
- if (offset < 0) {
- if (state->mode != GZ_READ) /* writing -- can't go backwards */
- return -1;
- offset += state->x.pos;
- if (offset < 0) /* before start of file! */
- return -1;
- if (gzrewind(file) == -1) /* rewind, then skip to offset */
- return -1;
- }
-
- /* if reading, skip what's in output buffer (one less gzgetc() check) */
- if (state->mode == GZ_READ) {
- n = GT_OFF(state->x.have) || (z_off64_t)state->x.have > offset ?
- (unsigned)offset : state->x.have;
- state->x.have -= n;
- state->x.next += n;
- state->x.pos += n;
- offset -= n;
- }
-
- /* request skip (if not zero) */
- if (offset) {
- state->seek = 1;
- state->skip = offset;
- }
- return state->x.pos + offset;
+ unsigned n;
+ z_off64_t ret;
+ gz_statep state;
+
+ /* get internal structure and check integrity */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ if (state->mode != GZ_READ && state->mode != GZ_WRITE)
+ return -1;
+
+ /* check that there's no error */
+ if (state->err != Z_OK && state->err != Z_BUF_ERROR)
+ return -1;
+
+ /* can only seek from start or relative to current position */
+ if (whence != SEEK_SET && whence != SEEK_CUR)
+ return -1;
+
+ /* normalize offset to a SEEK_CUR specification */
+ if (whence == SEEK_SET)
+ offset -= state->x.pos;
+ else if (state->seek)
+ offset += state->skip;
+ state->seek = 0;
+
+ /* if within raw area while reading, just go there */
+ if (state->mode == GZ_READ && state->how == COPY &&
+ state->x.pos + offset >= 0) {
+ ret = LSEEK(state->fd, offset - state->x.have, SEEK_CUR);
+ if (ret == -1)
+ return -1;
+ state->x.have = 0;
+ state->eof = 0;
+ state->past = 0;
+ state->seek = 0;
+ gz_error(state, Z_OK, NULL);
+ state->strm.avail_in = 0;
+ state->x.pos += offset;
+ return state->x.pos;
+ }
+
+ /* calculate skip amount, rewinding if needed for back seek when reading */
+ if (offset < 0) {
+ if (state->mode != GZ_READ) /* writing -- can't go backwards */
+ return -1;
+ offset += state->x.pos;
+ if (offset < 0) /* before start of file! */
+ return -1;
+ if (gzrewind(file) == -1) /* rewind, then skip to offset */
+ return -1;
+ }
+
+ /* if reading, skip what's in output buffer (one less gzgetc() check) */
+ if (state->mode == GZ_READ) {
+ n = GT_OFF(state->x.have) || (z_off64_t)state->x.have > offset ?
+ (unsigned)offset : state->x.have;
+ state->x.have -= n;
+ state->x.next += n;
+ state->x.pos += n;
+ offset -= n;
+ }
+
+ /* request skip (if not zero) */
+ if (offset) {
+ state->seek = 1;
+ state->skip = offset;
+ }
+ return state->x.pos + offset;
}
/* -- see zlib.h -- */
z_off_t ZEXPORT gzseek(file, offset, whence)
- gzFile file;
- z_off_t offset;
- int whence;
+ gzFile file;
+ z_off_t offset;
+ int whence;
{
- z_off64_t ret;
+ z_off64_t ret;
- ret = gzseek64(file, (z_off64_t)offset, whence);
- return ret == (z_off_t)ret ? (z_off_t)ret : -1;
+ ret = gzseek64(file, (z_off64_t)offset, whence);
+ return ret == (z_off_t)ret ? (z_off_t)ret : -1;
}
/* -- see zlib.h -- */
z_off64_t ZEXPORT gztell64(file)
- gzFile file;
+ gzFile file;
{
- gz_statep state;
+ gz_statep state;
- /* get internal structure and check integrity */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- if (state->mode != GZ_READ && state->mode != GZ_WRITE)
- return -1;
+ /* get internal structure and check integrity */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ if (state->mode != GZ_READ && state->mode != GZ_WRITE)
+ return -1;
- /* return position */
- return state->x.pos + (state->seek ? state->skip : 0);
+ /* return position */
+ return state->x.pos + (state->seek ? state->skip : 0);
}
/* -- see zlib.h -- */
z_off_t ZEXPORT gztell(file)
- gzFile file;
+ gzFile file;
{
- z_off64_t ret;
+ z_off64_t ret;
- ret = gztell64(file);
- return ret == (z_off_t)ret ? (z_off_t)ret : -1;
+ ret = gztell64(file);
+ return ret == (z_off_t)ret ? (z_off_t)ret : -1;
}
/* -- see zlib.h -- */
z_off64_t ZEXPORT gzoffset64(file)
- gzFile file;
+ gzFile file;
{
- z_off64_t offset;
- gz_statep state;
-
- /* get internal structure and check integrity */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- if (state->mode != GZ_READ && state->mode != GZ_WRITE)
- return -1;
-
- /* compute and return effective offset in file */
- offset = LSEEK(state->fd, 0, SEEK_CUR);
- if (offset == -1)
- return -1;
- if (state->mode == GZ_READ) /* reading */
- offset -= state->strm.avail_in; /* don't count buffered input */
- return offset;
+ z_off64_t offset;
+ gz_statep state;
+
+ /* get internal structure and check integrity */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ if (state->mode != GZ_READ && state->mode != GZ_WRITE)
+ return -1;
+
+ /* compute and return effective offset in file */
+ offset = LSEEK(state->fd, 0, SEEK_CUR);
+ if (offset == -1)
+ return -1;
+ if (state->mode == GZ_READ) /* reading */
+ offset -= state->strm.avail_in; /* don't count buffered input */
+ return offset;
}
/* -- see zlib.h -- */
z_off_t ZEXPORT gzoffset(file)
- gzFile file;
+ gzFile file;
{
- z_off64_t ret;
+ z_off64_t ret;
- ret = gzoffset64(file);
- return ret == (z_off_t)ret ? (z_off_t)ret : -1;
+ ret = gzoffset64(file);
+ return ret == (z_off_t)ret ? (z_off_t)ret : -1;
}
/* -- see zlib.h -- */
int ZEXPORT gzeof(file)
- gzFile file;
+ gzFile file;
{
- gz_statep state;
+ gz_statep state;
- /* get internal structure and check integrity */
- if (file == NULL)
- return 0;
- state = (gz_statep)file;
- if (state->mode != GZ_READ && state->mode != GZ_WRITE)
- return 0;
+ /* get internal structure and check integrity */
+ if (file == NULL)
+ return 0;
+ state = (gz_statep)file;
+ if (state->mode != GZ_READ && state->mode != GZ_WRITE)
+ return 0;
- /* return end-of-file state */
- return state->mode == GZ_READ ? state->past : 0;
+ /* return end-of-file state */
+ return state->mode == GZ_READ ? state->past : 0;
}
/* -- see zlib.h -- */
const char * ZEXPORT gzerror(file, errnum)
- gzFile file;
- int *errnum;
+ gzFile file;
+ int *errnum;
{
- gz_statep state;
-
- /* get internal structure and check integrity */
- if (file == NULL)
- return NULL;
- state = (gz_statep)file;
- if (state->mode != GZ_READ && state->mode != GZ_WRITE)
- return NULL;
-
- /* return error information */
- if (errnum != NULL)
- *errnum = state->err;
- return state->msg == NULL ? "" : state->msg;
+ gz_statep state;
+
+ /* get internal structure and check integrity */
+ if (file == NULL)
+ return NULL;
+ state = (gz_statep)file;
+ if (state->mode != GZ_READ && state->mode != GZ_WRITE)
+ return NULL;
+
+ /* return error information */
+ if (errnum != NULL)
+ *errnum = state->err;
+ return state->msg == NULL ? "" : state->msg;
}
/* -- see zlib.h -- */
void ZEXPORT gzclearerr(file)
- gzFile file;
+ gzFile file;
{
- gz_statep state;
-
- /* get internal structure and check integrity */
- if (file == NULL)
- return;
- state = (gz_statep)file;
- if (state->mode != GZ_READ && state->mode != GZ_WRITE)
- return;
-
- /* clear error and end-of-file */
- if (state->mode == GZ_READ) {
- state->eof = 0;
- state->past = 0;
- }
- gz_error(state, Z_OK, NULL);
+ gz_statep state;
+
+ /* get internal structure and check integrity */
+ if (file == NULL)
+ return;
+ state = (gz_statep)file;
+ if (state->mode != GZ_READ && state->mode != GZ_WRITE)
+ return;
+
+ /* clear error and end-of-file */
+ if (state->mode == GZ_READ) {
+ state->eof = 0;
+ state->past = 0;
+ }
+ gz_error(state, Z_OK, NULL);
}
/* Create an error message in allocated memory and set state->err and
@@ -562,42 +562,42 @@ void ZEXPORT gzclearerr(file)
allocation failure constructing the error message, then convert the error to
out of memory. */
void ZLIB_INTERNAL gz_error(state, err, msg)
- gz_statep state;
- int err;
- const char *msg;
+ gz_statep state;
+ int err;
+ const char *msg;
{
- /* free previously allocated message and clear */
- if (state->msg != NULL) {
- if (state->err != Z_MEM_ERROR)
- free(state->msg);
- state->msg = NULL;
- }
-
- /* if fatal, set state->x.have to 0 so that the gzgetc() macro fails */
- if (err != Z_OK && err != Z_BUF_ERROR)
- state->x.have = 0;
-
- /* set error code, and if no message, then done */
- state->err = err;
- if (msg == NULL)
- return;
-
- /* for an out of memory error, save as static string */
- if (err == Z_MEM_ERROR) {
- state->msg = (char *)msg;
- return;
- }
-
- /* construct error message with path */
- if ((state->msg = malloc(strlen(state->path) + strlen(msg) + 3)) == NULL) {
- state->err = Z_MEM_ERROR;
- state->msg = (char *)"out of memory";
- return;
- }
- strcpy(state->msg, state->path);
- strcat(state->msg, ": ");
- strcat(state->msg, msg);
- return;
+ /* free previously allocated message and clear */
+ if (state->msg != NULL) {
+ if (state->err != Z_MEM_ERROR)
+ free(state->msg);
+ state->msg = NULL;
+ }
+
+ /* if fatal, set state->x.have to 0 so that the gzgetc() macro fails */
+ if (err != Z_OK && err != Z_BUF_ERROR)
+ state->x.have = 0;
+
+ /* set error code, and if no message, then done */
+ state->err = err;
+ if (msg == NULL)
+ return;
+
+ /* for an out of memory error, save as static string */
+ if (err == Z_MEM_ERROR) {
+ state->msg = (char *)msg;
+ return;
+ }
+
+ /* construct error message with path */
+ if ((state->msg = malloc(strlen(state->path) + strlen(msg) + 3)) == NULL) {
+ state->err = Z_MEM_ERROR;
+ state->msg = (char *)"out of memory";
+ return;
+ }
+ strcpy(state->msg, state->path);
+ strcat(state->msg, ": ");
+ strcat(state->msg, msg);
+ return;
}
#ifndef INT_MAX
@@ -607,14 +607,14 @@ void ZLIB_INTERNAL gz_error(state, err, msg)
otherwise we could just use ((unsigned)-1) >> 1 */
unsigned ZLIB_INTERNAL gz_intmax()
{
- unsigned p, q;
-
- p = 1;
- do {
- q = p;
- p <<= 1;
- p++;
- } while (p > q);
- return q >> 1;
+ unsigned p, q;
+
+ p = 1;
+ do {
+ q = p;
+ p <<= 1;
+ p++;
+ } while (p > q);
+ return q >> 1;
}
#endif
diff --git a/src/lib/zlib/gzread.c b/src/lib/zlib/gzread.c
index 3493d34d4ea..bdc2d93353f 100644
--- a/src/lib/zlib/gzread.c
+++ b/src/lib/zlib/gzread.c
@@ -18,27 +18,27 @@ local int gz_skip OF((gz_statep, z_off64_t));
This function needs to loop on read(), since read() is not guaranteed to
read the number of bytes requested, depending on the type of descriptor. */
local int gz_load(state, buf, len, have)
- gz_statep state;
- unsigned char *buf;
- unsigned len;
- unsigned *have;
+ gz_statep state;
+ unsigned char *buf;
+ unsigned len;
+ unsigned *have;
{
- int ret;
-
- *have = 0;
- do {
- ret = read(state->fd, buf + *have, len - *have);
- if (ret <= 0)
- break;
- *have += ret;
- } while (*have < len);
- if (ret < 0) {
- gz_error(state, Z_ERRNO, zstrerror());
- return -1;
- }
- if (ret == 0)
- state->eof = 1;
- return 0;
+ int ret;
+
+ *have = 0;
+ do {
+ ret = read(state->fd, buf + *have, len - *have);
+ if (ret <= 0)
+ break;
+ *have += ret;
+ } while (*have < len);
+ if (ret < 0) {
+ gz_error(state, Z_ERRNO, zstrerror());
+ return -1;
+ }
+ if (ret == 0)
+ state->eof = 1;
+ return 0;
}
/* Load up input buffer and set eof flag if last data loaded -- return -1 on
@@ -49,28 +49,28 @@ local int gz_load(state, buf, len, have)
the input buffer, and then the remainder of the buffer is loaded with the
available data from the input file. */
local int gz_avail(state)
- gz_statep state;
+ gz_statep state;
{
- unsigned got;
- z_streamp strm = &(state->strm);
-
- if (state->err != Z_OK && state->err != Z_BUF_ERROR)
- return -1;
- if (state->eof == 0) {
- if (strm->avail_in) { /* copy what's there to the start */
- unsigned char *p = state->in, *q = strm->next_in;
- unsigned n = strm->avail_in;
- do {
- *p++ = *q++;
- } while (--n);
- }
- if (gz_load(state, state->in + strm->avail_in,
- state->size - strm->avail_in, &got) == -1)
- return -1;
- strm->avail_in += got;
- strm->next_in = state->in;
- }
- return 0;
+ unsigned got;
+ z_streamp strm = &(state->strm);
+
+ if (state->err != Z_OK && state->err != Z_BUF_ERROR)
+ return -1;
+ if (state->eof == 0) {
+ if (strm->avail_in) { /* copy what's there to the start */
+ unsigned char *p = state->in, *q = strm->next_in;
+ unsigned n = strm->avail_in;
+ do {
+ *p++ = *q++;
+ } while (--n);
+ }
+ if (gz_load(state, state->in + strm->avail_in,
+ state->size - strm->avail_in, &got) == -1)
+ return -1;
+ strm->avail_in += got;
+ strm->next_in = state->in;
+ }
+ return 0;
}
/* Look for gzip header, set up for inflate or copy. state->x.have must be 0.
@@ -83,84 +83,84 @@ local int gz_avail(state)
a user buffer. If decompressing, the inflate state will be initialized.
gz_look() will return 0 on success or -1 on failure. */
local int gz_look(state)
- gz_statep state;
+ gz_statep state;
{
- z_streamp strm = &(state->strm);
-
- /* allocate read buffers and inflate memory */
- if (state->size == 0) {
- /* allocate buffers */
- state->in = malloc(state->want);
- state->out = malloc(state->want << 1);
- if (state->in == NULL || state->out == NULL) {
- if (state->out != NULL)
- free(state->out);
- if (state->in != NULL)
- free(state->in);
- gz_error(state, Z_MEM_ERROR, "out of memory");
- return -1;
- }
- state->size = state->want;
-
- /* allocate inflate memory */
- state->strm.zalloc = Z_NULL;
- state->strm.zfree = Z_NULL;
- state->strm.opaque = Z_NULL;
- state->strm.avail_in = 0;
- state->strm.next_in = Z_NULL;
- if (inflateInit2(&(state->strm), 15 + 16) != Z_OK) { /* gunzip */
- free(state->out);
- free(state->in);
- state->size = 0;
- gz_error(state, Z_MEM_ERROR, "out of memory");
- return -1;
- }
- }
-
- /* get at least the magic bytes in the input buffer */
- if (strm->avail_in < 2) {
- if (gz_avail(state) == -1)
- return -1;
- if (strm->avail_in == 0)
- return 0;
- }
-
- /* look for gzip magic bytes -- if there, do gzip decoding (note: there is
- a logical dilemma here when considering the case of a partially written
- gzip file, to wit, if a single 31 byte is written, then we cannot tell
- whether this is a single-byte file, or just a partially written gzip
- file -- for here we assume that if a gzip file is being written, then
- the header will be written in a single operation, so that reading a
- single byte is sufficient indication that it is not a gzip file) */
- if (strm->avail_in > 1 &&
- strm->next_in[0] == 31 && strm->next_in[1] == 139) {
- inflateReset(strm);
- state->how = GZIP;
- state->direct = 0;
- return 0;
- }
-
- /* no gzip header -- if we were decoding gzip before, then this is trailing
- garbage. Ignore the trailing garbage and finish. */
- if (state->direct == 0) {
- strm->avail_in = 0;
- state->eof = 1;
- state->x.have = 0;
- return 0;
- }
-
- /* doing raw i/o, copy any leftover input to output -- this assumes that
- the output buffer is larger than the input buffer, which also assures
- space for gzungetc() */
- state->x.next = state->out;
- if (strm->avail_in) {
- memcpy(state->x.next, strm->next_in, strm->avail_in);
- state->x.have = strm->avail_in;
- strm->avail_in = 0;
- }
- state->how = COPY;
- state->direct = 1;
- return 0;
+ z_streamp strm = &(state->strm);
+
+ /* allocate read buffers and inflate memory */
+ if (state->size == 0) {
+ /* allocate buffers */
+ state->in = malloc(state->want);
+ state->out = malloc(state->want << 1);
+ if (state->in == NULL || state->out == NULL) {
+ if (state->out != NULL)
+ free(state->out);
+ if (state->in != NULL)
+ free(state->in);
+ gz_error(state, Z_MEM_ERROR, "out of memory");
+ return -1;
+ }
+ state->size = state->want;
+
+ /* allocate inflate memory */
+ state->strm.zalloc = Z_NULL;
+ state->strm.zfree = Z_NULL;
+ state->strm.opaque = Z_NULL;
+ state->strm.avail_in = 0;
+ state->strm.next_in = Z_NULL;
+ if (inflateInit2(&(state->strm), 15 + 16) != Z_OK) { /* gunzip */
+ free(state->out);
+ free(state->in);
+ state->size = 0;
+ gz_error(state, Z_MEM_ERROR, "out of memory");
+ return -1;
+ }
+ }
+
+ /* get at least the magic bytes in the input buffer */
+ if (strm->avail_in < 2) {
+ if (gz_avail(state) == -1)
+ return -1;
+ if (strm->avail_in == 0)
+ return 0;
+ }
+
+ /* look for gzip magic bytes -- if there, do gzip decoding (note: there is
+ a logical dilemma here when considering the case of a partially written
+ gzip file, to wit, if a single 31 byte is written, then we cannot tell
+ whether this is a single-byte file, or just a partially written gzip
+ file -- for here we assume that if a gzip file is being written, then
+ the header will be written in a single operation, so that reading a
+ single byte is sufficient indication that it is not a gzip file) */
+ if (strm->avail_in > 1 &&
+ strm->next_in[0] == 31 && strm->next_in[1] == 139) {
+ inflateReset(strm);
+ state->how = GZIP;
+ state->direct = 0;
+ return 0;
+ }
+
+ /* no gzip header -- if we were decoding gzip before, then this is trailing
+ garbage. Ignore the trailing garbage and finish. */
+ if (state->direct == 0) {
+ strm->avail_in = 0;
+ state->eof = 1;
+ state->x.have = 0;
+ return 0;
+ }
+
+ /* doing raw i/o, copy any leftover input to output -- this assumes that
+ the output buffer is larger than the input buffer, which also assures
+ space for gzungetc() */
+ state->x.next = state->out;
+ if (strm->avail_in) {
+ memcpy(state->x.next, strm->next_in, strm->avail_in);
+ state->x.have = strm->avail_in;
+ strm->avail_in = 0;
+ }
+ state->how = COPY;
+ state->direct = 1;
+ return 0;
}
/* Decompress from input to the provided next_out and avail_out in the state.
@@ -169,51 +169,51 @@ local int gz_look(state)
the next gzip stream or raw data, once state->x.have is depleted. Returns 0
on success, -1 on failure. */
local int gz_decomp(state)
- gz_statep state;
+ gz_statep state;
{
- int ret = Z_OK;
- unsigned had;
- z_streamp strm = &(state->strm);
-
- /* fill output buffer up to end of deflate stream */
- had = strm->avail_out;
- do {
- /* get more input for inflate() */
- if (strm->avail_in == 0 && gz_avail(state) == -1)
- return -1;
- if (strm->avail_in == 0) {
- gz_error(state, Z_BUF_ERROR, "unexpected end of file");
- break;
- }
-
- /* decompress and handle errors */
- ret = inflate(strm, Z_NO_FLUSH);
- if (ret == Z_STREAM_ERROR || ret == Z_NEED_DICT) {
- gz_error(state, Z_STREAM_ERROR,
- "internal error: inflate stream corrupt");
- return -1;
- }
- if (ret == Z_MEM_ERROR) {
- gz_error(state, Z_MEM_ERROR, "out of memory");
- return -1;
- }
- if (ret == Z_DATA_ERROR) { /* deflate stream invalid */
- gz_error(state, Z_DATA_ERROR,
- strm->msg == NULL ? "compressed data error" : strm->msg);
- return -1;
- }
- } while (strm->avail_out && ret != Z_STREAM_END);
-
- /* update available output */
- state->x.have = had - strm->avail_out;
- state->x.next = strm->next_out - state->x.have;
-
- /* if the gzip stream completed successfully, look for another */
- if (ret == Z_STREAM_END)
- state->how = LOOK;
-
- /* good decompression */
- return 0;
+ int ret = Z_OK;
+ unsigned had;
+ z_streamp strm = &(state->strm);
+
+ /* fill output buffer up to end of deflate stream */
+ had = strm->avail_out;
+ do {
+ /* get more input for inflate() */
+ if (strm->avail_in == 0 && gz_avail(state) == -1)
+ return -1;
+ if (strm->avail_in == 0) {
+ gz_error(state, Z_BUF_ERROR, "unexpected end of file");
+ break;
+ }
+
+ /* decompress and handle errors */
+ ret = inflate(strm, Z_NO_FLUSH);
+ if (ret == Z_STREAM_ERROR || ret == Z_NEED_DICT) {
+ gz_error(state, Z_STREAM_ERROR,
+ "internal error: inflate stream corrupt");
+ return -1;
+ }
+ if (ret == Z_MEM_ERROR) {
+ gz_error(state, Z_MEM_ERROR, "out of memory");
+ return -1;
+ }
+ if (ret == Z_DATA_ERROR) { /* deflate stream invalid */
+ gz_error(state, Z_DATA_ERROR,
+ strm->msg == NULL ? "compressed data error" : strm->msg);
+ return -1;
+ }
+ } while (strm->avail_out && ret != Z_STREAM_END);
+
+ /* update available output */
+ state->x.have = had - strm->avail_out;
+ state->x.next = strm->next_out - state->x.have;
+
+ /* if the gzip stream completed successfully, look for another */
+ if (ret == Z_STREAM_END)
+ state->how = LOOK;
+
+ /* good decompression */
+ return 0;
}
/* Fetch data and put it in the output buffer. Assumes state->x.have is 0.
@@ -223,367 +223,367 @@ local int gz_decomp(state)
otherwise 0. gz_fetch() will leave state->how as COPY or GZIP unless the
end of the input file has been reached and all data has been processed. */
local int gz_fetch(state)
- gz_statep state;
+ gz_statep state;
{
- z_streamp strm = &(state->strm);
-
- do {
- switch(state->how) {
- case LOOK: /* -> LOOK, COPY (only if never GZIP), or GZIP */
- if (gz_look(state) == -1)
- return -1;
- if (state->how == LOOK)
- return 0;
- break;
- case COPY: /* -> COPY */
- if (gz_load(state, state->out, state->size << 1, &(state->x.have))
- == -1)
- return -1;
- state->x.next = state->out;
- return 0;
- case GZIP: /* -> GZIP or LOOK (if end of gzip stream) */
- strm->avail_out = state->size << 1;
- strm->next_out = state->out;
- if (gz_decomp(state) == -1)
- return -1;
- }
- } while (state->x.have == 0 && (!state->eof || strm->avail_in));
- return 0;
+ z_streamp strm = &(state->strm);
+
+ do {
+ switch(state->how) {
+ case LOOK: /* -> LOOK, COPY (only if never GZIP), or GZIP */
+ if (gz_look(state) == -1)
+ return -1;
+ if (state->how == LOOK)
+ return 0;
+ break;
+ case COPY: /* -> COPY */
+ if (gz_load(state, state->out, state->size << 1, &(state->x.have))
+ == -1)
+ return -1;
+ state->x.next = state->out;
+ return 0;
+ case GZIP: /* -> GZIP or LOOK (if end of gzip stream) */
+ strm->avail_out = state->size << 1;
+ strm->next_out = state->out;
+ if (gz_decomp(state) == -1)
+ return -1;
+ }
+ } while (state->x.have == 0 && (!state->eof || strm->avail_in));
+ return 0;
}
/* Skip len uncompressed bytes of output. Return -1 on error, 0 on success. */
local int gz_skip(state, len)
- gz_statep state;
- z_off64_t len;
+ gz_statep state;
+ z_off64_t len;
{
- unsigned n;
-
- /* skip over len bytes or reach end-of-file, whichever comes first */
- while (len)
- /* skip over whatever is in output buffer */
- if (state->x.have) {
- n = GT_OFF(state->x.have) || (z_off64_t)state->x.have > len ?
- (unsigned)len : state->x.have;
- state->x.have -= n;
- state->x.next += n;
- state->x.pos += n;
- len -= n;
- }
-
- /* output buffer empty -- return if we're at the end of the input */
- else if (state->eof && state->strm.avail_in == 0)
- break;
-
- /* need more data to skip -- load up output buffer */
- else {
- /* get more output, looking for header if required */
- if (gz_fetch(state) == -1)
- return -1;
- }
- return 0;
+ unsigned n;
+
+ /* skip over len bytes or reach end-of-file, whichever comes first */
+ while (len)
+ /* skip over whatever is in output buffer */
+ if (state->x.have) {
+ n = GT_OFF(state->x.have) || (z_off64_t)state->x.have > len ?
+ (unsigned)len : state->x.have;
+ state->x.have -= n;
+ state->x.next += n;
+ state->x.pos += n;
+ len -= n;
+ }
+
+ /* output buffer empty -- return if we're at the end of the input */
+ else if (state->eof && state->strm.avail_in == 0)
+ break;
+
+ /* need more data to skip -- load up output buffer */
+ else {
+ /* get more output, looking for header if required */
+ if (gz_fetch(state) == -1)
+ return -1;
+ }
+ return 0;
}
/* -- see zlib.h -- */
int ZEXPORT gzread(file, buf, len)
- gzFile file;
- voidp buf;
- unsigned len;
+ gzFile file;
+ voidp buf;
+ unsigned len;
{
- unsigned got, n;
- gz_statep state;
- z_streamp strm;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- strm = &(state->strm);
-
- /* check that we're reading and that there's no (serious) error */
- if (state->mode != GZ_READ ||
- (state->err != Z_OK && state->err != Z_BUF_ERROR))
- return -1;
-
- /* since an int is returned, make sure len fits in one, otherwise return
- with an error (this avoids the flaw in the interface) */
- if ((int)len < 0) {
- gz_error(state, Z_DATA_ERROR, "requested length does not fit in int");
- return -1;
- }
-
- /* if len is zero, avoid unnecessary operations */
- if (len == 0)
- return 0;
-
- /* process a skip request */
- if (state->seek) {
- state->seek = 0;
- if (gz_skip(state, state->skip) == -1)
- return -1;
- }
-
- /* get len bytes to buf, or less than len if at the end */
- got = 0;
- do {
- /* first just try copying data from the output buffer */
- if (state->x.have) {
- n = state->x.have > len ? len : state->x.have;
- memcpy(buf, state->x.next, n);
- state->x.next += n;
- state->x.have -= n;
- }
-
- /* output buffer empty -- return if we're at the end of the input */
- else if (state->eof && strm->avail_in == 0) {
- state->past = 1; /* tried to read past end */
- break;
- }
-
- /* need output data -- for small len or new stream load up our output
- buffer */
- else if (state->how == LOOK || len < (state->size << 1)) {
- /* get more output, looking for header if required */
- if (gz_fetch(state) == -1)
- return -1;
- continue; /* no progress yet -- go back to copy above */
- /* the copy above assures that we will leave with space in the
- output buffer, allowing at least one gzungetc() to succeed */
- }
-
- /* large len -- read directly into user buffer */
- else if (state->how == COPY) { /* read directly */
- if (gz_load(state, buf, len, &n) == -1)
- return -1;
- }
-
- /* large len -- decompress directly into user buffer */
- else { /* state->how == GZIP */
- strm->avail_out = len;
- strm->next_out = buf;
- if (gz_decomp(state) == -1)
- return -1;
- n = state->x.have;
- state->x.have = 0;
- }
-
- /* update progress */
- len -= n;
- buf = (char *)buf + n;
- got += n;
- state->x.pos += n;
- } while (len);
-
- /* return number of bytes read into user buffer (will fit in int) */
- return (int)got;
+ unsigned got, n;
+ gz_statep state;
+ z_streamp strm;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ strm = &(state->strm);
+
+ /* check that we're reading and that there's no (serious) error */
+ if (state->mode != GZ_READ ||
+ (state->err != Z_OK && state->err != Z_BUF_ERROR))
+ return -1;
+
+ /* since an int is returned, make sure len fits in one, otherwise return
+ with an error (this avoids the flaw in the interface) */
+ if ((int)len < 0) {
+ gz_error(state, Z_DATA_ERROR, "requested length does not fit in int");
+ return -1;
+ }
+
+ /* if len is zero, avoid unnecessary operations */
+ if (len == 0)
+ return 0;
+
+ /* process a skip request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_skip(state, state->skip) == -1)
+ return -1;
+ }
+
+ /* get len bytes to buf, or less than len if at the end */
+ got = 0;
+ do {
+ /* first just try copying data from the output buffer */
+ if (state->x.have) {
+ n = state->x.have > len ? len : state->x.have;
+ memcpy(buf, state->x.next, n);
+ state->x.next += n;
+ state->x.have -= n;
+ }
+
+ /* output buffer empty -- return if we're at the end of the input */
+ else if (state->eof && strm->avail_in == 0) {
+ state->past = 1; /* tried to read past end */
+ break;
+ }
+
+ /* need output data -- for small len or new stream load up our output
+ buffer */
+ else if (state->how == LOOK || len < (state->size << 1)) {
+ /* get more output, looking for header if required */
+ if (gz_fetch(state) == -1)
+ return -1;
+ continue; /* no progress yet -- go back to copy above */
+ /* the copy above assures that we will leave with space in the
+ output buffer, allowing at least one gzungetc() to succeed */
+ }
+
+ /* large len -- read directly into user buffer */
+ else if (state->how == COPY) { /* read directly */
+ if (gz_load(state, buf, len, &n) == -1)
+ return -1;
+ }
+
+ /* large len -- decompress directly into user buffer */
+ else { /* state->how == GZIP */
+ strm->avail_out = len;
+ strm->next_out = buf;
+ if (gz_decomp(state) == -1)
+ return -1;
+ n = state->x.have;
+ state->x.have = 0;
+ }
+
+ /* update progress */
+ len -= n;
+ buf = (char *)buf + n;
+ got += n;
+ state->x.pos += n;
+ } while (len);
+
+ /* return number of bytes read into user buffer (will fit in int) */
+ return (int)got;
}
/* -- see zlib.h -- */
#undef gzgetc
int ZEXPORT gzgetc(file)
- gzFile file;
+ gzFile file;
{
- int ret;
- unsigned char buf[1];
- gz_statep state;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
-
- /* check that we're reading and that there's no (serious) error */
- if (state->mode != GZ_READ ||
- (state->err != Z_OK && state->err != Z_BUF_ERROR))
- return -1;
-
- /* try output buffer (no need to check for skip request) */
- if (state->x.have) {
- state->x.have--;
- state->x.pos++;
- return *(state->x.next)++;
- }
-
- /* nothing there -- try gzread() */
- ret = gzread(file, buf, 1);
- return ret < 1 ? -1 : buf[0];
+ int ret;
+ unsigned char buf[1];
+ gz_statep state;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+
+ /* check that we're reading and that there's no (serious) error */
+ if (state->mode != GZ_READ ||
+ (state->err != Z_OK && state->err != Z_BUF_ERROR))
+ return -1;
+
+ /* try output buffer (no need to check for skip request) */
+ if (state->x.have) {
+ state->x.have--;
+ state->x.pos++;
+ return *(state->x.next)++;
+ }
+
+ /* nothing there -- try gzread() */
+ ret = gzread(file, buf, 1);
+ return ret < 1 ? -1 : buf[0];
}
int ZEXPORT gzgetc_(file)
gzFile file;
{
- return gzgetc(file);
+ return gzgetc(file);
}
/* -- see zlib.h -- */
int ZEXPORT gzungetc(c, file)
- int c;
- gzFile file;
+ int c;
+ gzFile file;
{
- gz_statep state;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
-
- /* check that we're reading and that there's no (serious) error */
- if (state->mode != GZ_READ ||
- (state->err != Z_OK && state->err != Z_BUF_ERROR))
- return -1;
-
- /* process a skip request */
- if (state->seek) {
- state->seek = 0;
- if (gz_skip(state, state->skip) == -1)
- return -1;
- }
-
- /* can't push EOF */
- if (c < 0)
- return -1;
-
- /* if output buffer empty, put byte at end (allows more pushing) */
- if (state->x.have == 0) {
- state->x.have = 1;
- state->x.next = state->out + (state->size << 1) - 1;
- state->x.next[0] = c;
- state->x.pos--;
- state->past = 0;
- return c;
- }
-
- /* if no room, give up (must have already done a gzungetc()) */
- if (state->x.have == (state->size << 1)) {
- gz_error(state, Z_DATA_ERROR, "out of room to push characters");
- return -1;
- }
-
- /* slide output data if needed and insert byte before existing data */
- if (state->x.next == state->out) {
- unsigned char *src = state->out + state->x.have;
- unsigned char *dest = state->out + (state->size << 1);
- while (src > state->out)
- *--dest = *--src;
- state->x.next = dest;
- }
- state->x.have++;
- state->x.next--;
- state->x.next[0] = c;
- state->x.pos--;
- state->past = 0;
- return c;
+ gz_statep state;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+
+ /* check that we're reading and that there's no (serious) error */
+ if (state->mode != GZ_READ ||
+ (state->err != Z_OK && state->err != Z_BUF_ERROR))
+ return -1;
+
+ /* process a skip request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_skip(state, state->skip) == -1)
+ return -1;
+ }
+
+ /* can't push EOF */
+ if (c < 0)
+ return -1;
+
+ /* if output buffer empty, put byte at end (allows more pushing) */
+ if (state->x.have == 0) {
+ state->x.have = 1;
+ state->x.next = state->out + (state->size << 1) - 1;
+ state->x.next[0] = c;
+ state->x.pos--;
+ state->past = 0;
+ return c;
+ }
+
+ /* if no room, give up (must have already done a gzungetc()) */
+ if (state->x.have == (state->size << 1)) {
+ gz_error(state, Z_DATA_ERROR, "out of room to push characters");
+ return -1;
+ }
+
+ /* slide output data if needed and insert byte before existing data */
+ if (state->x.next == state->out) {
+ unsigned char *src = state->out + state->x.have;
+ unsigned char *dest = state->out + (state->size << 1);
+ while (src > state->out)
+ *--dest = *--src;
+ state->x.next = dest;
+ }
+ state->x.have++;
+ state->x.next--;
+ state->x.next[0] = c;
+ state->x.pos--;
+ state->past = 0;
+ return c;
}
/* -- see zlib.h -- */
char * ZEXPORT gzgets(file, buf, len)
- gzFile file;
- char *buf;
- int len;
+ gzFile file;
+ char *buf;
+ int len;
{
- unsigned left, n;
- char *str;
- unsigned char *eol;
- gz_statep state;
-
- /* check parameters and get internal structure */
- if (file == NULL || buf == NULL || len < 1)
- return NULL;
- state = (gz_statep)file;
-
- /* check that we're reading and that there's no (serious) error */
- if (state->mode != GZ_READ ||
- (state->err != Z_OK && state->err != Z_BUF_ERROR))
- return NULL;
-
- /* process a skip request */
- if (state->seek) {
- state->seek = 0;
- if (gz_skip(state, state->skip) == -1)
- return NULL;
- }
-
- /* copy output bytes up to new line or len - 1, whichever comes first --
- append a terminating zero to the string (we don't check for a zero in
- the contents, let the user worry about that) */
- str = buf;
- left = (unsigned)len - 1;
- if (left) do {
- /* assure that something is in the output buffer */
- if (state->x.have == 0 && gz_fetch(state) == -1)
- return NULL; /* error */
- if (state->x.have == 0) { /* end of file */
- state->past = 1; /* read past end */
- break; /* return what we have */
- }
-
- /* look for end-of-line in current output buffer */
- n = state->x.have > left ? left : state->x.have;
- eol = memchr(state->x.next, '\n', n);
- if (eol != NULL)
- n = (unsigned)(eol - state->x.next) + 1;
-
- /* copy through end-of-line, or remainder if not found */
- memcpy(buf, state->x.next, n);
- state->x.have -= n;
- state->x.next += n;
- state->x.pos += n;
- left -= n;
- buf += n;
- } while (left && eol == NULL);
-
- /* return terminated string, or if nothing, end of file */
- if (buf == str)
- return NULL;
- buf[0] = 0;
- return str;
+ unsigned left, n;
+ char *str;
+ unsigned char *eol;
+ gz_statep state;
+
+ /* check parameters and get internal structure */
+ if (file == NULL || buf == NULL || len < 1)
+ return NULL;
+ state = (gz_statep)file;
+
+ /* check that we're reading and that there's no (serious) error */
+ if (state->mode != GZ_READ ||
+ (state->err != Z_OK && state->err != Z_BUF_ERROR))
+ return NULL;
+
+ /* process a skip request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_skip(state, state->skip) == -1)
+ return NULL;
+ }
+
+ /* copy output bytes up to new line or len - 1, whichever comes first --
+ append a terminating zero to the string (we don't check for a zero in
+ the contents, let the user worry about that) */
+ str = buf;
+ left = (unsigned)len - 1;
+ if (left) do {
+ /* assure that something is in the output buffer */
+ if (state->x.have == 0 && gz_fetch(state) == -1)
+ return NULL; /* error */
+ if (state->x.have == 0) { /* end of file */
+ state->past = 1; /* read past end */
+ break; /* return what we have */
+ }
+
+ /* look for end-of-line in current output buffer */
+ n = state->x.have > left ? left : state->x.have;
+ eol = memchr(state->x.next, '\n', n);
+ if (eol != NULL)
+ n = (unsigned)(eol - state->x.next) + 1;
+
+ /* copy through end-of-line, or remainder if not found */
+ memcpy(buf, state->x.next, n);
+ state->x.have -= n;
+ state->x.next += n;
+ state->x.pos += n;
+ left -= n;
+ buf += n;
+ } while (left && eol == NULL);
+
+ /* return terminated string, or if nothing, end of file */
+ if (buf == str)
+ return NULL;
+ buf[0] = 0;
+ return str;
}
/* -- see zlib.h -- */
int ZEXPORT gzdirect(file)
- gzFile file;
+ gzFile file;
{
- gz_statep state;
+ gz_statep state;
- /* get internal structure */
- if (file == NULL)
- return 0;
- state = (gz_statep)file;
+ /* get internal structure */
+ if (file == NULL)
+ return 0;
+ state = (gz_statep)file;
- /* if the state is not known, but we can find out, then do so (this is
- mainly for right after a gzopen() or gzdopen()) */
- if (state->mode == GZ_READ && state->how == LOOK && state->x.have == 0)
- (void)gz_look(state);
+ /* if the state is not known, but we can find out, then do so (this is
+ mainly for right after a gzopen() or gzdopen()) */
+ if (state->mode == GZ_READ && state->how == LOOK && state->x.have == 0)
+ (void)gz_look(state);
- /* return 1 if transparent, 0 if processing a gzip stream */
- return state->direct;
+ /* return 1 if transparent, 0 if processing a gzip stream */
+ return state->direct;
}
/* -- see zlib.h -- */
int ZEXPORT gzclose_r(file)
- gzFile file;
+ gzFile file;
{
- int ret, err;
- gz_statep state;
-
- /* get internal structure */
- if (file == NULL)
- return Z_STREAM_ERROR;
- state = (gz_statep)file;
-
- /* check that we're reading */
- if (state->mode != GZ_READ)
- return Z_STREAM_ERROR;
-
- /* free memory and close file */
- if (state->size) {
- inflateEnd(&(state->strm));
- free(state->out);
- free(state->in);
- }
- err = state->err == Z_BUF_ERROR ? Z_BUF_ERROR : Z_OK;
- gz_error(state, Z_OK, NULL);
- free(state->path);
- ret = close(state->fd);
- free(state);
- return ret ? Z_ERRNO : err;
+ int ret, err;
+ gz_statep state;
+
+ /* get internal structure */
+ if (file == NULL)
+ return Z_STREAM_ERROR;
+ state = (gz_statep)file;
+
+ /* check that we're reading */
+ if (state->mode != GZ_READ)
+ return Z_STREAM_ERROR;
+
+ /* free memory and close file */
+ if (state->size) {
+ inflateEnd(&(state->strm));
+ free(state->out);
+ free(state->in);
+ }
+ err = state->err == Z_BUF_ERROR ? Z_BUF_ERROR : Z_OK;
+ gz_error(state, Z_OK, NULL);
+ free(state->path);
+ ret = close(state->fd);
+ free(state);
+ return ret ? Z_ERRNO : err;
}
diff --git a/src/lib/zlib/gzwrite.c b/src/lib/zlib/gzwrite.c
index 27cb3428e32..a97703b7ba2 100644
--- a/src/lib/zlib/gzwrite.c
+++ b/src/lib/zlib/gzwrite.c
@@ -13,52 +13,52 @@ local int gz_zero OF((gz_statep, z_off64_t));
/* Initialize state for writing a gzip file. Mark initialization by setting
state->size to non-zero. Return -1 on failure or 0 on success. */
local int gz_init(state)
- gz_statep state;
+ gz_statep state;
{
- int ret;
- z_streamp strm = &(state->strm);
-
- /* allocate input buffer */
- state->in = malloc(state->want);
- if (state->in == NULL) {
- gz_error(state, Z_MEM_ERROR, "out of memory");
- return -1;
- }
-
- /* only need output buffer and deflate state if compressing */
- if (!state->direct) {
- /* allocate output buffer */
- state->out = malloc(state->want);
- if (state->out == NULL) {
- free(state->in);
- gz_error(state, Z_MEM_ERROR, "out of memory");
- return -1;
- }
-
- /* allocate deflate memory, set up for gzip compression */
- strm->zalloc = Z_NULL;
- strm->zfree = Z_NULL;
- strm->opaque = Z_NULL;
- ret = deflateInit2(strm, state->level, Z_DEFLATED,
- MAX_WBITS + 16, DEF_MEM_LEVEL, state->strategy);
- if (ret != Z_OK) {
- free(state->out);
- free(state->in);
- gz_error(state, Z_MEM_ERROR, "out of memory");
- return -1;
- }
- }
-
- /* mark state as initialized */
- state->size = state->want;
-
- /* initialize write buffer if compressing */
- if (!state->direct) {
- strm->avail_out = state->size;
- strm->next_out = state->out;
- state->x.next = strm->next_out;
- }
- return 0;
+ int ret;
+ z_streamp strm = &(state->strm);
+
+ /* allocate input buffer */
+ state->in = malloc(state->want);
+ if (state->in == NULL) {
+ gz_error(state, Z_MEM_ERROR, "out of memory");
+ return -1;
+ }
+
+ /* only need output buffer and deflate state if compressing */
+ if (!state->direct) {
+ /* allocate output buffer */
+ state->out = malloc(state->want);
+ if (state->out == NULL) {
+ free(state->in);
+ gz_error(state, Z_MEM_ERROR, "out of memory");
+ return -1;
+ }
+
+ /* allocate deflate memory, set up for gzip compression */
+ strm->zalloc = Z_NULL;
+ strm->zfree = Z_NULL;
+ strm->opaque = Z_NULL;
+ ret = deflateInit2(strm, state->level, Z_DEFLATED,
+ MAX_WBITS + 16, DEF_MEM_LEVEL, state->strategy);
+ if (ret != Z_OK) {
+ free(state->out);
+ free(state->in);
+ gz_error(state, Z_MEM_ERROR, "out of memory");
+ return -1;
+ }
+ }
+
+ /* mark state as initialized */
+ state->size = state->want;
+
+ /* initialize write buffer if compressing */
+ if (!state->direct) {
+ strm->avail_out = state->size;
+ strm->next_out = state->out;
+ state->x.next = strm->next_out;
+ }
+ return 0;
}
/* Compress whatever is at avail_in and next_in and write to the output file.
@@ -68,232 +68,232 @@ local int gz_init(state)
is true, then simply write to the output file without compressing, and
ignore flush. */
local int gz_comp(state, flush)
- gz_statep state;
- int flush;
+ gz_statep state;
+ int flush;
{
- int ret, got;
- unsigned have;
- z_streamp strm = &(state->strm);
-
- /* allocate memory if this is the first time through */
- if (state->size == 0 && gz_init(state) == -1)
- return -1;
-
- /* write directly if requested */
- if (state->direct) {
- got = write(state->fd, strm->next_in, strm->avail_in);
- if (got < 0 || (unsigned)got != strm->avail_in) {
- gz_error(state, Z_ERRNO, zstrerror());
- return -1;
- }
- strm->avail_in = 0;
- return 0;
- }
-
- /* run deflate() on provided input until it produces no more output */
- ret = Z_OK;
- do {
- /* write out current buffer contents if full, or if flushing, but if
- doing Z_FINISH then don't write until we get to Z_STREAM_END */
- if (strm->avail_out == 0 || (flush != Z_NO_FLUSH &&
- (flush != Z_FINISH || ret == Z_STREAM_END))) {
- have = (unsigned)(strm->next_out - state->x.next);
- if (have && ((got = write(state->fd, state->x.next, have)) < 0 ||
- (unsigned)got != have)) {
- gz_error(state, Z_ERRNO, zstrerror());
- return -1;
- }
- if (strm->avail_out == 0) {
- strm->avail_out = state->size;
- strm->next_out = state->out;
- }
- state->x.next = strm->next_out;
- }
-
- /* compress */
- have = strm->avail_out;
- ret = deflate(strm, flush);
- if (ret == Z_STREAM_ERROR) {
- gz_error(state, Z_STREAM_ERROR,
- "internal error: deflate stream corrupt");
- return -1;
- }
- have -= strm->avail_out;
- } while (have);
-
- /* if that completed a deflate stream, allow another to start */
- if (flush == Z_FINISH)
- deflateReset(strm);
-
- /* all done, no errors */
- return 0;
+ int ret, got;
+ unsigned have;
+ z_streamp strm = &(state->strm);
+
+ /* allocate memory if this is the first time through */
+ if (state->size == 0 && gz_init(state) == -1)
+ return -1;
+
+ /* write directly if requested */
+ if (state->direct) {
+ got = write(state->fd, strm->next_in, strm->avail_in);
+ if (got < 0 || (unsigned)got != strm->avail_in) {
+ gz_error(state, Z_ERRNO, zstrerror());
+ return -1;
+ }
+ strm->avail_in = 0;
+ return 0;
+ }
+
+ /* run deflate() on provided input until it produces no more output */
+ ret = Z_OK;
+ do {
+ /* write out current buffer contents if full, or if flushing, but if
+ doing Z_FINISH then don't write until we get to Z_STREAM_END */
+ if (strm->avail_out == 0 || (flush != Z_NO_FLUSH &&
+ (flush != Z_FINISH || ret == Z_STREAM_END))) {
+ have = (unsigned)(strm->next_out - state->x.next);
+ if (have && ((got = write(state->fd, state->x.next, have)) < 0 ||
+ (unsigned)got != have)) {
+ gz_error(state, Z_ERRNO, zstrerror());
+ return -1;
+ }
+ if (strm->avail_out == 0) {
+ strm->avail_out = state->size;
+ strm->next_out = state->out;
+ }
+ state->x.next = strm->next_out;
+ }
+
+ /* compress */
+ have = strm->avail_out;
+ ret = deflate(strm, flush);
+ if (ret == Z_STREAM_ERROR) {
+ gz_error(state, Z_STREAM_ERROR,
+ "internal error: deflate stream corrupt");
+ return -1;
+ }
+ have -= strm->avail_out;
+ } while (have);
+
+ /* if that completed a deflate stream, allow another to start */
+ if (flush == Z_FINISH)
+ deflateReset(strm);
+
+ /* all done, no errors */
+ return 0;
}
/* Compress len zeros to output. Return -1 on error, 0 on success. */
local int gz_zero(state, len)
- gz_statep state;
- z_off64_t len;
+ gz_statep state;
+ z_off64_t len;
{
- int first;
- unsigned n;
- z_streamp strm = &(state->strm);
-
- /* consume whatever's left in the input buffer */
- if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
- return -1;
-
- /* compress len zeros (len guaranteed > 0) */
- first = 1;
- while (len) {
- n = GT_OFF(state->size) || (z_off64_t)state->size > len ?
- (unsigned)len : state->size;
- if (first) {
- memset(state->in, 0, n);
- first = 0;
- }
- strm->avail_in = n;
- strm->next_in = state->in;
- state->x.pos += n;
- if (gz_comp(state, Z_NO_FLUSH) == -1)
- return -1;
- len -= n;
- }
- return 0;
+ int first;
+ unsigned n;
+ z_streamp strm = &(state->strm);
+
+ /* consume whatever's left in the input buffer */
+ if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
+ return -1;
+
+ /* compress len zeros (len guaranteed > 0) */
+ first = 1;
+ while (len) {
+ n = GT_OFF(state->size) || (z_off64_t)state->size > len ?
+ (unsigned)len : state->size;
+ if (first) {
+ memset(state->in, 0, n);
+ first = 0;
+ }
+ strm->avail_in = n;
+ strm->next_in = state->in;
+ state->x.pos += n;
+ if (gz_comp(state, Z_NO_FLUSH) == -1)
+ return -1;
+ len -= n;
+ }
+ return 0;
}
/* -- see zlib.h -- */
int ZEXPORT gzwrite(file, buf, len)
- gzFile file;
- voidpc buf;
- unsigned len;
+ gzFile file;
+ voidpc buf;
+ unsigned len;
{
- unsigned put = len;
- unsigned n;
- gz_statep state;
- z_streamp strm;
-
- /* get internal structure */
- if (file == NULL)
- return 0;
- state = (gz_statep)file;
- strm = &(state->strm);
-
- /* check that we're writing and that there's no error */
- if (state->mode != GZ_WRITE || state->err != Z_OK)
- return 0;
-
- /* since an int is returned, make sure len fits in one, otherwise return
- with an error (this avoids the flaw in the interface) */
- if ((int)len < 0) {
- gz_error(state, Z_DATA_ERROR, "requested length does not fit in int");
- return 0;
- }
-
- /* if len is zero, avoid unnecessary operations */
- if (len == 0)
- return 0;
-
- /* allocate memory if this is the first time through */
- if (state->size == 0 && gz_init(state) == -1)
- return 0;
-
- /* check for seek request */
- if (state->seek) {
- state->seek = 0;
- if (gz_zero(state, state->skip) == -1)
- return 0;
- }
-
- /* for small len, copy to input buffer, otherwise compress directly */
- if (len < state->size) {
- /* copy to input buffer, compress when full */
- do {
- if (strm->avail_in == 0)
- strm->next_in = state->in;
- n = state->size - strm->avail_in;
- if (n > len)
- n = len;
- memcpy(strm->next_in + strm->avail_in, buf, n);
- strm->avail_in += n;
- state->x.pos += n;
- buf = (char *)buf + n;
- len -= n;
- if (len && gz_comp(state, Z_NO_FLUSH) == -1)
- return 0;
- } while (len);
- }
- else {
- /* consume whatever's left in the input buffer */
- if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
- return 0;
-
- /* directly compress user buffer to file */
- strm->avail_in = len;
- strm->next_in = (voidp)buf;
- state->x.pos += len;
- if (gz_comp(state, Z_NO_FLUSH) == -1)
- return 0;
- }
-
- /* input was all buffered or compressed (put will fit in int) */
- return (int)put;
+ unsigned put = len;
+ unsigned n;
+ gz_statep state;
+ z_streamp strm;
+
+ /* get internal structure */
+ if (file == NULL)
+ return 0;
+ state = (gz_statep)file;
+ strm = &(state->strm);
+
+ /* check that we're writing and that there's no error */
+ if (state->mode != GZ_WRITE || state->err != Z_OK)
+ return 0;
+
+ /* since an int is returned, make sure len fits in one, otherwise return
+ with an error (this avoids the flaw in the interface) */
+ if ((int)len < 0) {
+ gz_error(state, Z_DATA_ERROR, "requested length does not fit in int");
+ return 0;
+ }
+
+ /* if len is zero, avoid unnecessary operations */
+ if (len == 0)
+ return 0;
+
+ /* allocate memory if this is the first time through */
+ if (state->size == 0 && gz_init(state) == -1)
+ return 0;
+
+ /* check for seek request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_zero(state, state->skip) == -1)
+ return 0;
+ }
+
+ /* for small len, copy to input buffer, otherwise compress directly */
+ if (len < state->size) {
+ /* copy to input buffer, compress when full */
+ do {
+ if (strm->avail_in == 0)
+ strm->next_in = state->in;
+ n = state->size - strm->avail_in;
+ if (n > len)
+ n = len;
+ memcpy(strm->next_in + strm->avail_in, buf, n);
+ strm->avail_in += n;
+ state->x.pos += n;
+ buf = (char *)buf + n;
+ len -= n;
+ if (len && gz_comp(state, Z_NO_FLUSH) == -1)
+ return 0;
+ } while (len);
+ }
+ else {
+ /* consume whatever's left in the input buffer */
+ if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
+ return 0;
+
+ /* directly compress user buffer to file */
+ strm->avail_in = len;
+ strm->next_in = (voidp)buf;
+ state->x.pos += len;
+ if (gz_comp(state, Z_NO_FLUSH) == -1)
+ return 0;
+ }
+
+ /* input was all buffered or compressed (put will fit in int) */
+ return (int)put;
}
/* -- see zlib.h -- */
int ZEXPORT gzputc(file, c)
- gzFile file;
- int c;
+ gzFile file;
+ int c;
{
- unsigned char buf[1];
- gz_statep state;
- z_streamp strm;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- strm = &(state->strm);
-
- /* check that we're writing and that there's no error */
- if (state->mode != GZ_WRITE || state->err != Z_OK)
- return -1;
-
- /* check for seek request */
- if (state->seek) {
- state->seek = 0;
- if (gz_zero(state, state->skip) == -1)
- return -1;
- }
-
- /* try writing to input buffer for speed (state->size == 0 if buffer not
- initialized) */
- if (strm->avail_in < state->size) {
- if (strm->avail_in == 0)
- strm->next_in = state->in;
- strm->next_in[strm->avail_in++] = c;
- state->x.pos++;
- return c & 0xff;
- }
-
- /* no room in buffer or not initialized, use gz_write() */
- buf[0] = c;
- if (gzwrite(file, buf, 1) != 1)
- return -1;
- return c & 0xff;
+ unsigned char buf[1];
+ gz_statep state;
+ z_streamp strm;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ strm = &(state->strm);
+
+ /* check that we're writing and that there's no error */
+ if (state->mode != GZ_WRITE || state->err != Z_OK)
+ return -1;
+
+ /* check for seek request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_zero(state, state->skip) == -1)
+ return -1;
+ }
+
+ /* try writing to input buffer for speed (state->size == 0 if buffer not
+ initialized) */
+ if (strm->avail_in < state->size) {
+ if (strm->avail_in == 0)
+ strm->next_in = state->in;
+ strm->next_in[strm->avail_in++] = c;
+ state->x.pos++;
+ return c & 0xff;
+ }
+
+ /* no room in buffer or not initialized, use gz_write() */
+ buf[0] = c;
+ if (gzwrite(file, buf, 1) != 1)
+ return -1;
+ return c & 0xff;
}
/* -- see zlib.h -- */
int ZEXPORT gzputs(file, str)
- gzFile file;
- const char *str;
+ gzFile file;
+ const char *str;
{
- int ret;
- unsigned len;
+ int ret;
+ unsigned len;
- /* write string */
- len = (unsigned)strlen(str);
- ret = gzwrite(file, str, len);
- return ret == 0 && len != 0 ? -1 : ret;
+ /* write string */
+ len = (unsigned)strlen(str);
+ ret = gzwrite(file, str, len);
+ return ret == 0 && len != 0 ? -1 : ret;
}
#if defined(STDC) || defined(Z_HAVE_STDARG_H)
@@ -302,264 +302,264 @@ int ZEXPORT gzputs(file, str)
/* -- see zlib.h -- */
int ZEXPORTVA gzprintf (gzFile file, const char *format, ...)
{
- int size, len;
- gz_statep state;
- z_streamp strm;
- va_list va;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- strm = &(state->strm);
-
- /* check that we're writing and that there's no error */
- if (state->mode != GZ_WRITE || state->err != Z_OK)
- return 0;
-
- /* make sure we have some buffer space */
- if (state->size == 0 && gz_init(state) == -1)
- return 0;
-
- /* check for seek request */
- if (state->seek) {
- state->seek = 0;
- if (gz_zero(state, state->skip) == -1)
- return 0;
- }
-
- /* consume whatever's left in the input buffer */
- if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
- return 0;
-
- /* do the printf() into the input buffer, put length in len */
- size = (int)(state->size);
- state->in[size - 1] = 0;
- va_start(va, format);
+ int size, len;
+ gz_statep state;
+ z_streamp strm;
+ va_list va;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ strm = &(state->strm);
+
+ /* check that we're writing and that there's no error */
+ if (state->mode != GZ_WRITE || state->err != Z_OK)
+ return 0;
+
+ /* make sure we have some buffer space */
+ if (state->size == 0 && gz_init(state) == -1)
+ return 0;
+
+ /* check for seek request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_zero(state, state->skip) == -1)
+ return 0;
+ }
+
+ /* consume whatever's left in the input buffer */
+ if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
+ return 0;
+
+ /* do the printf() into the input buffer, put length in len */
+ size = (int)(state->size);
+ state->in[size - 1] = 0;
+ va_start(va, format);
#ifdef NO_vsnprintf
# ifdef HAS_vsprintf_void
- (void)vsprintf((char *)(state->in), format, va);
- va_end(va);
- for (len = 0; len < size; len++)
- if (state->in[len] == 0) break;
+ (void)vsprintf((char *)(state->in), format, va);
+ va_end(va);
+ for (len = 0; len < size; len++)
+ if (state->in[len] == 0) break;
# else
- len = vsprintf((char *)(state->in), format, va);
- va_end(va);
+ len = vsprintf((char *)(state->in), format, va);
+ va_end(va);
# endif
#else
# ifdef HAS_vsnprintf_void
- (void)vsnprintf((char *)(state->in), size, format, va);
- va_end(va);
- len = strlen((char *)(state->in));
+ (void)vsnprintf((char *)(state->in), size, format, va);
+ va_end(va);
+ len = strlen((char *)(state->in));
# else
- len = vsnprintf((char *)(state->in), size, format, va);
- va_end(va);
+ len = vsnprintf((char *)(state->in), size, format, va);
+ va_end(va);
# endif
#endif
- /* check that printf() results fit in buffer */
- if (len <= 0 || len >= (int)size || state->in[size - 1] != 0)
- return 0;
+ /* check that printf() results fit in buffer */
+ if (len <= 0 || len >= (int)size || state->in[size - 1] != 0)
+ return 0;
- /* update buffer and position, defer compression until needed */
- strm->avail_in = (unsigned)len;
- strm->next_in = state->in;
- state->x.pos += len;
- return len;
+ /* update buffer and position, defer compression until needed */
+ strm->avail_in = (unsigned)len;
+ strm->next_in = state->in;
+ state->x.pos += len;
+ return len;
}
#else /* !STDC && !Z_HAVE_STDARG_H */
/* -- see zlib.h -- */
int ZEXPORTVA gzprintf (file, format, a1, a2, a3, a4, a5, a6, a7, a8, a9, a10,
- a11, a12, a13, a14, a15, a16, a17, a18, a19, a20)
- gzFile file;
- const char *format;
- int a1, a2, a3, a4, a5, a6, a7, a8, a9, a10,
- a11, a12, a13, a14, a15, a16, a17, a18, a19, a20;
+ a11, a12, a13, a14, a15, a16, a17, a18, a19, a20)
+ gzFile file;
+ const char *format;
+ int a1, a2, a3, a4, a5, a6, a7, a8, a9, a10,
+ a11, a12, a13, a14, a15, a16, a17, a18, a19, a20;
{
- int size, len;
- gz_statep state;
- z_streamp strm;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
- strm = &(state->strm);
-
- /* check that can really pass pointer in ints */
- if (sizeof(int) != sizeof(void *))
- return 0;
-
- /* check that we're writing and that there's no error */
- if (state->mode != GZ_WRITE || state->err != Z_OK)
- return 0;
-
- /* make sure we have some buffer space */
- if (state->size == 0 && gz_init(state) == -1)
- return 0;
-
- /* check for seek request */
- if (state->seek) {
- state->seek = 0;
- if (gz_zero(state, state->skip) == -1)
- return 0;
- }
-
- /* consume whatever's left in the input buffer */
- if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
- return 0;
-
- /* do the printf() into the input buffer, put length in len */
- size = (int)(state->size);
- state->in[size - 1] = 0;
+ int size, len;
+ gz_statep state;
+ z_streamp strm;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+ strm = &(state->strm);
+
+ /* check that can really pass pointer in ints */
+ if (sizeof(int) != sizeof(void *))
+ return 0;
+
+ /* check that we're writing and that there's no error */
+ if (state->mode != GZ_WRITE || state->err != Z_OK)
+ return 0;
+
+ /* make sure we have some buffer space */
+ if (state->size == 0 && gz_init(state) == -1)
+ return 0;
+
+ /* check for seek request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_zero(state, state->skip) == -1)
+ return 0;
+ }
+
+ /* consume whatever's left in the input buffer */
+ if (strm->avail_in && gz_comp(state, Z_NO_FLUSH) == -1)
+ return 0;
+
+ /* do the printf() into the input buffer, put length in len */
+ size = (int)(state->size);
+ state->in[size - 1] = 0;
#ifdef NO_snprintf
# ifdef HAS_sprintf_void
- sprintf((char *)(state->in), format, a1, a2, a3, a4, a5, a6, a7, a8,
- a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20);
- for (len = 0; len < size; len++)
- if (state->in[len] == 0) break;
+ sprintf((char *)(state->in), format, a1, a2, a3, a4, a5, a6, a7, a8,
+ a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20);
+ for (len = 0; len < size; len++)
+ if (state->in[len] == 0) break;
# else
- len = sprintf((char *)(state->in), format, a1, a2, a3, a4, a5, a6, a7, a8,
- a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20);
+ len = sprintf((char *)(state->in), format, a1, a2, a3, a4, a5, a6, a7, a8,
+ a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20);
# endif
#else
# ifdef HAS_snprintf_void
- snprintf((char *)(state->in), size, format, a1, a2, a3, a4, a5, a6, a7, a8,
- a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20);
- len = strlen((char *)(state->in));
+ snprintf((char *)(state->in), size, format, a1, a2, a3, a4, a5, a6, a7, a8,
+ a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20);
+ len = strlen((char *)(state->in));
# else
- len = snprintf((char *)(state->in), size, format, a1, a2, a3, a4, a5, a6,
- a7, a8, a9, a10, a11, a12, a13, a14, a15, a16, a17, a18,
- a19, a20);
+ len = snprintf((char *)(state->in), size, format, a1, a2, a3, a4, a5, a6,
+ a7, a8, a9, a10, a11, a12, a13, a14, a15, a16, a17, a18,
+ a19, a20);
# endif
#endif
- /* check that printf() results fit in buffer */
- if (len <= 0 || len >= (int)size || state->in[size - 1] != 0)
- return 0;
+ /* check that printf() results fit in buffer */
+ if (len <= 0 || len >= (int)size || state->in[size - 1] != 0)
+ return 0;
- /* update buffer and position, defer compression until needed */
- strm->avail_in = (unsigned)len;
- strm->next_in = state->in;
- state->x.pos += len;
- return len;
+ /* update buffer and position, defer compression until needed */
+ strm->avail_in = (unsigned)len;
+ strm->next_in = state->in;
+ state->x.pos += len;
+ return len;
}
#endif
/* -- see zlib.h -- */
int ZEXPORT gzflush(file, flush)
- gzFile file;
- int flush;
+ gzFile file;
+ int flush;
{
- gz_statep state;
-
- /* get internal structure */
- if (file == NULL)
- return -1;
- state = (gz_statep)file;
-
- /* check that we're writing and that there's no error */
- if (state->mode != GZ_WRITE || state->err != Z_OK)
- return Z_STREAM_ERROR;
-
- /* check flush parameter */
- if (flush < 0 || flush > Z_FINISH)
- return Z_STREAM_ERROR;
-
- /* check for seek request */
- if (state->seek) {
- state->seek = 0;
- if (gz_zero(state, state->skip) == -1)
- return -1;
- }
-
- /* compress remaining data with requested flush */
- gz_comp(state, flush);
- return state->err;
+ gz_statep state;
+
+ /* get internal structure */
+ if (file == NULL)
+ return -1;
+ state = (gz_statep)file;
+
+ /* check that we're writing and that there's no error */
+ if (state->mode != GZ_WRITE || state->err != Z_OK)
+ return Z_STREAM_ERROR;
+
+ /* check flush parameter */
+ if (flush < 0 || flush > Z_FINISH)
+ return Z_STREAM_ERROR;
+
+ /* check for seek request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_zero(state, state->skip) == -1)
+ return -1;
+ }
+
+ /* compress remaining data with requested flush */
+ gz_comp(state, flush);
+ return state->err;
}
/* -- see zlib.h -- */
int ZEXPORT gzsetparams(file, level, strategy)
- gzFile file;
- int level;
- int strategy;
+ gzFile file;
+ int level;
+ int strategy;
{
- gz_statep state;
- z_streamp strm;
-
- /* get internal structure */
- if (file == NULL)
- return Z_STREAM_ERROR;
- state = (gz_statep)file;
- strm = &(state->strm);
-
- /* check that we're writing and that there's no error */
- if (state->mode != GZ_WRITE || state->err != Z_OK)
- return Z_STREAM_ERROR;
-
- /* if no change is requested, then do nothing */
- if (level == state->level && strategy == state->strategy)
- return Z_OK;
-
- /* check for seek request */
- if (state->seek) {
- state->seek = 0;
- if (gz_zero(state, state->skip) == -1)
- return -1;
- }
-
- /* change compression parameters for subsequent input */
- if (state->size) {
- /* flush previous input with previous parameters before changing */
- if (strm->avail_in && gz_comp(state, Z_PARTIAL_FLUSH) == -1)
- return state->err;
- deflateParams(strm, level, strategy);
- }
- state->level = level;
- state->strategy = strategy;
- return Z_OK;
+ gz_statep state;
+ z_streamp strm;
+
+ /* get internal structure */
+ if (file == NULL)
+ return Z_STREAM_ERROR;
+ state = (gz_statep)file;
+ strm = &(state->strm);
+
+ /* check that we're writing and that there's no error */
+ if (state->mode != GZ_WRITE || state->err != Z_OK)
+ return Z_STREAM_ERROR;
+
+ /* if no change is requested, then do nothing */
+ if (level == state->level && strategy == state->strategy)
+ return Z_OK;
+
+ /* check for seek request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_zero(state, state->skip) == -1)
+ return -1;
+ }
+
+ /* change compression parameters for subsequent input */
+ if (state->size) {
+ /* flush previous input with previous parameters before changing */
+ if (strm->avail_in && gz_comp(state, Z_PARTIAL_FLUSH) == -1)
+ return state->err;
+ deflateParams(strm, level, strategy);
+ }
+ state->level = level;
+ state->strategy = strategy;
+ return Z_OK;
}
/* -- see zlib.h -- */
int ZEXPORT gzclose_w(file)
- gzFile file;
+ gzFile file;
{
- int ret = Z_OK;
- gz_statep state;
-
- /* get internal structure */
- if (file == NULL)
- return Z_STREAM_ERROR;
- state = (gz_statep)file;
-
- /* check that we're writing */
- if (state->mode != GZ_WRITE)
- return Z_STREAM_ERROR;
-
- /* check for seek request */
- if (state->seek) {
- state->seek = 0;
- if (gz_zero(state, state->skip) == -1)
- ret = state->err;
- }
-
- /* flush, free memory, and close file */
- if (state->size) {
- if (gz_comp(state, Z_FINISH) == -1)
- ret = state->err;
- if (!state->direct) {
- (void)deflateEnd(&(state->strm));
- free(state->out);
- }
- free(state->in);
- }
- gz_error(state, Z_OK, NULL);
- free(state->path);
- if (close(state->fd) == -1)
- ret = Z_ERRNO;
- free(state);
- return ret;
+ int ret = Z_OK;
+ gz_statep state;
+
+ /* get internal structure */
+ if (file == NULL)
+ return Z_STREAM_ERROR;
+ state = (gz_statep)file;
+
+ /* check that we're writing */
+ if (state->mode != GZ_WRITE)
+ return Z_STREAM_ERROR;
+
+ /* check for seek request */
+ if (state->seek) {
+ state->seek = 0;
+ if (gz_zero(state, state->skip) == -1)
+ ret = state->err;
+ }
+
+ /* flush, free memory, and close file */
+ if (state->size) {
+ if (gz_comp(state, Z_FINISH) == -1)
+ ret = state->err;
+ if (!state->direct) {
+ (void)deflateEnd(&(state->strm));
+ free(state->out);
+ }
+ free(state->in);
+ }
+ gz_error(state, Z_OK, NULL);
+ free(state->path);
+ if (close(state->fd) == -1)
+ ret = Z_ERRNO;
+ free(state);
+ return ret;
}
diff --git a/src/lib/zlib/infback.c b/src/lib/zlib/infback.c
index 981aff17c2d..6f8e004dd2d 100644
--- a/src/lib/zlib/infback.c
+++ b/src/lib/zlib/infback.c
@@ -32,41 +32,41 @@ unsigned char FAR *window;
const char *version;
int stream_size;
{
- struct inflate_state FAR *state;
-
- if (version == Z_NULL || version[0] != ZLIB_VERSION[0] ||
- stream_size != (int)(sizeof(z_stream)))
- return Z_VERSION_ERROR;
- if (strm == Z_NULL || window == Z_NULL ||
- windowBits < 8 || windowBits > 15)
- return Z_STREAM_ERROR;
- strm->msg = Z_NULL; /* in case we return an error */
- if (strm->zalloc == (alloc_func)0) {
+ struct inflate_state FAR *state;
+
+ if (version == Z_NULL || version[0] != ZLIB_VERSION[0] ||
+ stream_size != (int)(sizeof(z_stream)))
+ return Z_VERSION_ERROR;
+ if (strm == Z_NULL || window == Z_NULL ||
+ windowBits < 8 || windowBits > 15)
+ return Z_STREAM_ERROR;
+ strm->msg = Z_NULL; /* in case we return an error */
+ if (strm->zalloc == (alloc_func)0) {
#ifdef Z_SOLO
- return Z_STREAM_ERROR;
+ return Z_STREAM_ERROR;
#else
- strm->zalloc = zcalloc;
- strm->opaque = (voidpf)0;
+ strm->zalloc = zcalloc;
+ strm->opaque = (voidpf)0;
#endif
- }
- if (strm->zfree == (free_func)0)
+ }
+ if (strm->zfree == (free_func)0)
#ifdef Z_SOLO
- return Z_STREAM_ERROR;
+ return Z_STREAM_ERROR;
#else
- strm->zfree = zcfree;
+ strm->zfree = zcfree;
#endif
- state = (struct inflate_state FAR *)ZALLOC(strm, 1,
- sizeof(struct inflate_state));
- if (state == Z_NULL) return Z_MEM_ERROR;
- Tracev((stderr, "inflate: allocated\n"));
- strm->state = (struct internal_state FAR *)state;
- state->dmax = 32768U;
- state->wbits = windowBits;
- state->wsize = 1U << windowBits;
- state->window = window;
- state->wnext = 0;
- state->whave = 0;
- return Z_OK;
+ state = (struct inflate_state FAR *)ZALLOC(strm, 1,
+ sizeof(struct inflate_state));
+ if (state == Z_NULL) return Z_MEM_ERROR;
+ Tracev((stderr, "inflate: allocated\n"));
+ strm->state = (struct internal_state FAR *)state;
+ state->dmax = 32768U;
+ state->wbits = windowBits;
+ state->wsize = 1U << windowBits;
+ state->window = window;
+ state->wnext = 0;
+ state->whave = 0;
+ return Z_OK;
}
/*
@@ -83,142 +83,142 @@ local void fixedtables(state)
struct inflate_state FAR *state;
{
#ifdef BUILDFIXED
- static int virgin = 1;
- static code *lenfix, *distfix;
- static code fixed[544];
-
- /* build fixed huffman tables if first call (may not be thread safe) */
- if (virgin) {
- unsigned sym, bits;
- static code *next;
-
- /* literal/length table */
- sym = 0;
- while (sym < 144) state->lens[sym++] = 8;
- while (sym < 256) state->lens[sym++] = 9;
- while (sym < 280) state->lens[sym++] = 7;
- while (sym < 288) state->lens[sym++] = 8;
- next = fixed;
- lenfix = next;
- bits = 9;
- inflate_table(LENS, state->lens, 288, &(next), &(bits), state->work);
-
- /* distance table */
- sym = 0;
- while (sym < 32) state->lens[sym++] = 5;
- distfix = next;
- bits = 5;
- inflate_table(DISTS, state->lens, 32, &(next), &(bits), state->work);
-
- /* do this just once */
- virgin = 0;
- }
+ static int virgin = 1;
+ static code *lenfix, *distfix;
+ static code fixed[544];
+
+ /* build fixed huffman tables if first call (may not be thread safe) */
+ if (virgin) {
+ unsigned sym, bits;
+ static code *next;
+
+ /* literal/length table */
+ sym = 0;
+ while (sym < 144) state->lens[sym++] = 8;
+ while (sym < 256) state->lens[sym++] = 9;
+ while (sym < 280) state->lens[sym++] = 7;
+ while (sym < 288) state->lens[sym++] = 8;
+ next = fixed;
+ lenfix = next;
+ bits = 9;
+ inflate_table(LENS, state->lens, 288, &(next), &(bits), state->work);
+
+ /* distance table */
+ sym = 0;
+ while (sym < 32) state->lens[sym++] = 5;
+ distfix = next;
+ bits = 5;
+ inflate_table(DISTS, state->lens, 32, &(next), &(bits), state->work);
+
+ /* do this just once */
+ virgin = 0;
+ }
#else /* !BUILDFIXED */
# include "inffixed.h"
#endif /* BUILDFIXED */
- state->lencode = lenfix;
- state->lenbits = 9;
- state->distcode = distfix;
- state->distbits = 5;
+ state->lencode = lenfix;
+ state->lenbits = 9;
+ state->distcode = distfix;
+ state->distbits = 5;
}
/* Macros for inflateBack(): */
/* Load returned state from inflate_fast() */
#define LOAD() \
- do { \
- put = strm->next_out; \
- left = strm->avail_out; \
- next = strm->next_in; \
- have = strm->avail_in; \
- hold = state->hold; \
- bits = state->bits; \
- } while (0)
+ do { \
+ put = strm->next_out; \
+ left = strm->avail_out; \
+ next = strm->next_in; \
+ have = strm->avail_in; \
+ hold = state->hold; \
+ bits = state->bits; \
+ } while (0)
/* Set state from registers for inflate_fast() */
#define RESTORE() \
- do { \
- strm->next_out = put; \
- strm->avail_out = left; \
- strm->next_in = next; \
- strm->avail_in = have; \
- state->hold = hold; \
- state->bits = bits; \
- } while (0)
+ do { \
+ strm->next_out = put; \
+ strm->avail_out = left; \
+ strm->next_in = next; \
+ strm->avail_in = have; \
+ state->hold = hold; \
+ state->bits = bits; \
+ } while (0)
/* Clear the input bit accumulator */
#define INITBITS() \
- do { \
- hold = 0; \
- bits = 0; \
- } while (0)
+ do { \
+ hold = 0; \
+ bits = 0; \
+ } while (0)
/* Assure that some input is available. If input is requested, but denied,
then return a Z_BUF_ERROR from inflateBack(). */
#define PULL() \
- do { \
- if (have == 0) { \
- have = in(in_desc, &next); \
- if (have == 0) { \
- next = Z_NULL; \
- ret = Z_BUF_ERROR; \
- goto inf_leave; \
- } \
- } \
- } while (0)
+ do { \
+ if (have == 0) { \
+ have = in(in_desc, &next); \
+ if (have == 0) { \
+ next = Z_NULL; \
+ ret = Z_BUF_ERROR; \
+ goto inf_leave; \
+ } \
+ } \
+ } while (0)
/* Get a byte of input into the bit accumulator, or return from inflateBack()
with an error if there is no input available. */
#define PULLBYTE() \
- do { \
- PULL(); \
- have--; \
- hold += (unsigned long)(*next++) << bits; \
- bits += 8; \
- } while (0)
+ do { \
+ PULL(); \
+ have--; \
+ hold += (unsigned long)(*next++) << bits; \
+ bits += 8; \
+ } while (0)
/* Assure that there are at least n bits in the bit accumulator. If there is
not enough available input to do that, then return from inflateBack() with
an error. */
#define NEEDBITS(n) \
- do { \
- while (bits < (unsigned)(n)) \
- PULLBYTE(); \
- } while (0)
+ do { \
+ while (bits < (unsigned)(n)) \
+ PULLBYTE(); \
+ } while (0)
/* Return the low n bits of the bit accumulator (n < 16) */
#define BITS(n) \
- ((unsigned)hold & ((1U << (n)) - 1))
+ ((unsigned)hold & ((1U << (n)) - 1))
/* Remove n bits from the bit accumulator */
#define DROPBITS(n) \
- do { \
- hold >>= (n); \
- bits -= (unsigned)(n); \
- } while (0)
+ do { \
+ hold >>= (n); \
+ bits -= (unsigned)(n); \
+ } while (0)
/* Remove zero to seven bits as needed to go to a byte boundary */
#define BYTEBITS() \
- do { \
- hold >>= bits & 7; \
- bits -= bits & 7; \
- } while (0)
+ do { \
+ hold >>= bits & 7; \
+ bits -= bits & 7; \
+ } while (0)
/* Assure that some output space is available, by writing out the window
if it's full. If the write fails, return from inflateBack() with a
Z_BUF_ERROR. */
#define ROOM() \
- do { \
- if (left == 0) { \
- put = state->window; \
- left = state->wsize; \
- state->whave = left; \
- if (out(out_desc, put, left)) { \
- ret = Z_BUF_ERROR; \
- goto inf_leave; \
- } \
- } \
- } while (0)
+ do { \
+ if (left == 0) { \
+ put = state->window; \
+ left = state->wsize; \
+ state->whave = left; \
+ if (out(out_desc, put, left)) { \
+ ret = Z_BUF_ERROR; \
+ goto inf_leave; \
+ } \
+ } \
+ } while (0)
/*
strm provides the memory allocation functions and window buffer on input,
@@ -254,387 +254,387 @@ void FAR *in_desc;
out_func out;
void FAR *out_desc;
{
- struct inflate_state FAR *state;
- unsigned char FAR *next; /* next input */
- unsigned char FAR *put; /* next output */
- unsigned have, left; /* available input and output */
- unsigned long hold; /* bit buffer */
- unsigned bits; /* bits in bit buffer */
- unsigned copy; /* number of stored or match bytes to copy */
- unsigned char FAR *from; /* where to copy match bytes from */
- code here; /* current decoding table entry */
- code last; /* parent table entry */
- unsigned len; /* length to copy for repeats, bits to drop */
- int ret; /* return code */
- static const unsigned short order[19] = /* permutation of code lengths */
- {16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
-
- /* Check that the strm exists and that the state was initialized */
- if (strm == Z_NULL || strm->state == Z_NULL)
- return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
-
- /* Reset the state */
- strm->msg = Z_NULL;
- state->mode = TYPE;
- state->last = 0;
- state->whave = 0;
- next = strm->next_in;
- have = next != Z_NULL ? strm->avail_in : 0;
- hold = 0;
- bits = 0;
- put = state->window;
- left = state->wsize;
-
- /* Inflate until end of block marked as last */
- for (;;)
- switch (state->mode) {
- case TYPE:
- /* determine and dispatch block type */
- if (state->last) {
- BYTEBITS();
- state->mode = DONE;
- break;
- }
- NEEDBITS(3);
- state->last = BITS(1);
- DROPBITS(1);
- switch (BITS(2)) {
- case 0: /* stored block */
- Tracev((stderr, "inflate: stored block%s\n",
- state->last ? " (last)" : ""));
- state->mode = STORED;
- break;
- case 1: /* fixed block */
- fixedtables(state);
- Tracev((stderr, "inflate: fixed codes block%s\n",
- state->last ? " (last)" : ""));
- state->mode = LEN; /* decode codes */
- break;
- case 2: /* dynamic block */
- Tracev((stderr, "inflate: dynamic codes block%s\n",
- state->last ? " (last)" : ""));
- state->mode = TABLE;
- break;
- case 3:
- strm->msg = (char *)"invalid block type";
- state->mode = BAD;
- }
- DROPBITS(2);
- break;
-
- case STORED:
- /* get and verify stored block length */
- BYTEBITS(); /* go to byte boundary */
- NEEDBITS(32);
- if ((hold & 0xffff) != ((hold >> 16) ^ 0xffff)) {
- strm->msg = (char *)"invalid stored block lengths";
- state->mode = BAD;
- break;
- }
- state->length = (unsigned)hold & 0xffff;
- Tracev((stderr, "inflate: stored length %u\n",
- state->length));
- INITBITS();
-
- /* copy stored block from input to output */
- while (state->length != 0) {
- copy = state->length;
- PULL();
- ROOM();
- if (copy > have) copy = have;
- if (copy > left) copy = left;
- zmemcpy(put, next, copy);
- have -= copy;
- next += copy;
- left -= copy;
- put += copy;
- state->length -= copy;
- }
- Tracev((stderr, "inflate: stored end\n"));
- state->mode = TYPE;
- break;
-
- case TABLE:
- /* get dynamic table entries descriptor */
- NEEDBITS(14);
- state->nlen = BITS(5) + 257;
- DROPBITS(5);
- state->ndist = BITS(5) + 1;
- DROPBITS(5);
- state->ncode = BITS(4) + 4;
- DROPBITS(4);
+ struct inflate_state FAR *state;
+ unsigned char FAR *next; /* next input */
+ unsigned char FAR *put; /* next output */
+ unsigned have, left; /* available input and output */
+ unsigned long hold; /* bit buffer */
+ unsigned bits; /* bits in bit buffer */
+ unsigned copy; /* number of stored or match bytes to copy */
+ unsigned char FAR *from; /* where to copy match bytes from */
+ code here; /* current decoding table entry */
+ code last; /* parent table entry */
+ unsigned len; /* length to copy for repeats, bits to drop */
+ int ret; /* return code */
+ static const unsigned short order[19] = /* permutation of code lengths */
+ {16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
+
+ /* Check that the strm exists and that the state was initialized */
+ if (strm == Z_NULL || strm->state == Z_NULL)
+ return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+
+ /* Reset the state */
+ strm->msg = Z_NULL;
+ state->mode = TYPE;
+ state->last = 0;
+ state->whave = 0;
+ next = strm->next_in;
+ have = next != Z_NULL ? strm->avail_in : 0;
+ hold = 0;
+ bits = 0;
+ put = state->window;
+ left = state->wsize;
+
+ /* Inflate until end of block marked as last */
+ for (;;)
+ switch (state->mode) {
+ case TYPE:
+ /* determine and dispatch block type */
+ if (state->last) {
+ BYTEBITS();
+ state->mode = DONE;
+ break;
+ }
+ NEEDBITS(3);
+ state->last = BITS(1);
+ DROPBITS(1);
+ switch (BITS(2)) {
+ case 0: /* stored block */
+ Tracev((stderr, "inflate: stored block%s\n",
+ state->last ? " (last)" : ""));
+ state->mode = STORED;
+ break;
+ case 1: /* fixed block */
+ fixedtables(state);
+ Tracev((stderr, "inflate: fixed codes block%s\n",
+ state->last ? " (last)" : ""));
+ state->mode = LEN; /* decode codes */
+ break;
+ case 2: /* dynamic block */
+ Tracev((stderr, "inflate: dynamic codes block%s\n",
+ state->last ? " (last)" : ""));
+ state->mode = TABLE;
+ break;
+ case 3:
+ strm->msg = (char *)"invalid block type";
+ state->mode = BAD;
+ }
+ DROPBITS(2);
+ break;
+
+ case STORED:
+ /* get and verify stored block length */
+ BYTEBITS(); /* go to byte boundary */
+ NEEDBITS(32);
+ if ((hold & 0xffff) != ((hold >> 16) ^ 0xffff)) {
+ strm->msg = (char *)"invalid stored block lengths";
+ state->mode = BAD;
+ break;
+ }
+ state->length = (unsigned)hold & 0xffff;
+ Tracev((stderr, "inflate: stored length %u\n",
+ state->length));
+ INITBITS();
+
+ /* copy stored block from input to output */
+ while (state->length != 0) {
+ copy = state->length;
+ PULL();
+ ROOM();
+ if (copy > have) copy = have;
+ if (copy > left) copy = left;
+ zmemcpy(put, next, copy);
+ have -= copy;
+ next += copy;
+ left -= copy;
+ put += copy;
+ state->length -= copy;
+ }
+ Tracev((stderr, "inflate: stored end\n"));
+ state->mode = TYPE;
+ break;
+
+ case TABLE:
+ /* get dynamic table entries descriptor */
+ NEEDBITS(14);
+ state->nlen = BITS(5) + 257;
+ DROPBITS(5);
+ state->ndist = BITS(5) + 1;
+ DROPBITS(5);
+ state->ncode = BITS(4) + 4;
+ DROPBITS(4);
#ifndef PKZIP_BUG_WORKAROUND
- if (state->nlen > 286 || state->ndist > 30) {
- strm->msg = (char *)"too many length or distance symbols";
- state->mode = BAD;
- break;
- }
+ if (state->nlen > 286 || state->ndist > 30) {
+ strm->msg = (char *)"too many length or distance symbols";
+ state->mode = BAD;
+ break;
+ }
#endif
- Tracev((stderr, "inflate: table sizes ok\n"));
-
- /* get code length code lengths (not a typo) */
- state->have = 0;
- while (state->have < state->ncode) {
- NEEDBITS(3);
- state->lens[order[state->have++]] = (unsigned short)BITS(3);
- DROPBITS(3);
- }
- while (state->have < 19)
- state->lens[order[state->have++]] = 0;
- state->next = state->codes;
- state->lencode = (code const FAR *)(state->next);
- state->lenbits = 7;
- ret = inflate_table(CODES, state->lens, 19, &(state->next),
- &(state->lenbits), state->work);
- if (ret) {
- strm->msg = (char *)"invalid code lengths set";
- state->mode = BAD;
- break;
- }
- Tracev((stderr, "inflate: code lengths ok\n"));
-
- /* get length and distance code code lengths */
- state->have = 0;
- while (state->have < state->nlen + state->ndist) {
- for (;;) {
- here = state->lencode[BITS(state->lenbits)];
- if ((unsigned)(here.bits) <= bits) break;
- PULLBYTE();
- }
- if (here.val < 16) {
- DROPBITS(here.bits);
- state->lens[state->have++] = here.val;
- }
- else {
- if (here.val == 16) {
- NEEDBITS(here.bits + 2);
- DROPBITS(here.bits);
- if (state->have == 0) {
- strm->msg = (char *)"invalid bit length repeat";
- state->mode = BAD;
- break;
- }
- len = (unsigned)(state->lens[state->have - 1]);
- copy = 3 + BITS(2);
- DROPBITS(2);
- }
- else if (here.val == 17) {
- NEEDBITS(here.bits + 3);
- DROPBITS(here.bits);
- len = 0;
- copy = 3 + BITS(3);
- DROPBITS(3);
- }
- else {
- NEEDBITS(here.bits + 7);
- DROPBITS(here.bits);
- len = 0;
- copy = 11 + BITS(7);
- DROPBITS(7);
- }
- if (state->have + copy > state->nlen + state->ndist) {
- strm->msg = (char *)"invalid bit length repeat";
- state->mode = BAD;
- break;
- }
- while (copy--)
- state->lens[state->have++] = (unsigned short)len;
- }
- }
-
- /* handle error breaks in while */
- if (state->mode == BAD) break;
-
- /* check for end-of-block code (better have one) */
- if (state->lens[256] == 0) {
- strm->msg = (char *)"invalid code -- missing end-of-block";
- state->mode = BAD;
- break;
- }
-
- /* build code tables -- note: do not change the lenbits or distbits
- values here (9 and 6) without reading the comments in inftrees.h
- concerning the ENOUGH constants, which depend on those values */
- state->next = state->codes;
- state->lencode = (code const FAR *)(state->next);
- state->lenbits = 9;
- ret = inflate_table(LENS, state->lens, state->nlen, &(state->next),
- &(state->lenbits), state->work);
- if (ret) {
- strm->msg = (char *)"invalid literal/lengths set";
- state->mode = BAD;
- break;
- }
- state->distcode = (code const FAR *)(state->next);
- state->distbits = 6;
- ret = inflate_table(DISTS, state->lens + state->nlen, state->ndist,
- &(state->next), &(state->distbits), state->work);
- if (ret) {
- strm->msg = (char *)"invalid distances set";
- state->mode = BAD;
- break;
- }
- Tracev((stderr, "inflate: codes ok\n"));
- state->mode = LEN;
-
- case LEN:
- /* use inflate_fast() if we have enough input and output */
- if (have >= 6 && left >= 258) {
- RESTORE();
- if (state->whave < state->wsize)
- state->whave = state->wsize - left;
- inflate_fast(strm, state->wsize);
- LOAD();
- break;
- }
-
- /* get a literal, length, or end-of-block code */
- for (;;) {
- here = state->lencode[BITS(state->lenbits)];
- if ((unsigned)(here.bits) <= bits) break;
- PULLBYTE();
- }
- if (here.op && (here.op & 0xf0) == 0) {
- last = here;
- for (;;) {
- here = state->lencode[last.val +
- (BITS(last.bits + last.op) >> last.bits)];
- if ((unsigned)(last.bits + here.bits) <= bits) break;
- PULLBYTE();
- }
- DROPBITS(last.bits);
- }
- DROPBITS(here.bits);
- state->length = (unsigned)here.val;
-
- /* process literal */
- if (here.op == 0) {
- Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
- "inflate: literal '%c'\n" :
- "inflate: literal 0x%02x\n", here.val));
- ROOM();
- *put++ = (unsigned char)(state->length);
- left--;
- state->mode = LEN;
- break;
- }
-
- /* process end of block */
- if (here.op & 32) {
- Tracevv((stderr, "inflate: end of block\n"));
- state->mode = TYPE;
- break;
- }
-
- /* invalid code */
- if (here.op & 64) {
- strm->msg = (char *)"invalid literal/length code";
- state->mode = BAD;
- break;
- }
-
- /* length code -- get extra bits, if any */
- state->extra = (unsigned)(here.op) & 15;
- if (state->extra != 0) {
- NEEDBITS(state->extra);
- state->length += BITS(state->extra);
- DROPBITS(state->extra);
- }
- Tracevv((stderr, "inflate: length %u\n", state->length));
-
- /* get distance code */
- for (;;) {
- here = state->distcode[BITS(state->distbits)];
- if ((unsigned)(here.bits) <= bits) break;
- PULLBYTE();
- }
- if ((here.op & 0xf0) == 0) {
- last = here;
- for (;;) {
- here = state->distcode[last.val +
- (BITS(last.bits + last.op) >> last.bits)];
- if ((unsigned)(last.bits + here.bits) <= bits) break;
- PULLBYTE();
- }
- DROPBITS(last.bits);
- }
- DROPBITS(here.bits);
- if (here.op & 64) {
- strm->msg = (char *)"invalid distance code";
- state->mode = BAD;
- break;
- }
- state->offset = (unsigned)here.val;
-
- /* get distance extra bits, if any */
- state->extra = (unsigned)(here.op) & 15;
- if (state->extra != 0) {
- NEEDBITS(state->extra);
- state->offset += BITS(state->extra);
- DROPBITS(state->extra);
- }
- if (state->offset > state->wsize - (state->whave < state->wsize ?
- left : 0)) {
- strm->msg = (char *)"invalid distance too far back";
- state->mode = BAD;
- break;
- }
- Tracevv((stderr, "inflate: distance %u\n", state->offset));
-
- /* copy match from window to output */
- do {
- ROOM();
- copy = state->wsize - state->offset;
- if (copy < left) {
- from = put + copy;
- copy = left - copy;
- }
- else {
- from = put - state->offset;
- copy = left;
- }
- if (copy > state->length) copy = state->length;
- state->length -= copy;
- left -= copy;
- do {
- *put++ = *from++;
- } while (--copy);
- } while (state->length != 0);
- break;
-
- case DONE:
- /* inflate stream terminated properly -- write leftover output */
- ret = Z_STREAM_END;
- if (left < state->wsize) {
- if (out(out_desc, state->window, state->wsize - left))
- ret = Z_BUF_ERROR;
- }
- goto inf_leave;
-
- case BAD:
- ret = Z_DATA_ERROR;
- goto inf_leave;
-
- default: /* can't happen, but makes compilers happy */
- ret = Z_STREAM_ERROR;
- goto inf_leave;
- }
-
- /* Return unused input */
- inf_leave:
- strm->next_in = next;
- strm->avail_in = have;
- return ret;
+ Tracev((stderr, "inflate: table sizes ok\n"));
+
+ /* get code length code lengths (not a typo) */
+ state->have = 0;
+ while (state->have < state->ncode) {
+ NEEDBITS(3);
+ state->lens[order[state->have++]] = (unsigned short)BITS(3);
+ DROPBITS(3);
+ }
+ while (state->have < 19)
+ state->lens[order[state->have++]] = 0;
+ state->next = state->codes;
+ state->lencode = (code const FAR *)(state->next);
+ state->lenbits = 7;
+ ret = inflate_table(CODES, state->lens, 19, &(state->next),
+ &(state->lenbits), state->work);
+ if (ret) {
+ strm->msg = (char *)"invalid code lengths set";
+ state->mode = BAD;
+ break;
+ }
+ Tracev((stderr, "inflate: code lengths ok\n"));
+
+ /* get length and distance code code lengths */
+ state->have = 0;
+ while (state->have < state->nlen + state->ndist) {
+ for (;;) {
+ here = state->lencode[BITS(state->lenbits)];
+ if ((unsigned)(here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ if (here.val < 16) {
+ DROPBITS(here.bits);
+ state->lens[state->have++] = here.val;
+ }
+ else {
+ if (here.val == 16) {
+ NEEDBITS(here.bits + 2);
+ DROPBITS(here.bits);
+ if (state->have == 0) {
+ strm->msg = (char *)"invalid bit length repeat";
+ state->mode = BAD;
+ break;
+ }
+ len = (unsigned)(state->lens[state->have - 1]);
+ copy = 3 + BITS(2);
+ DROPBITS(2);
+ }
+ else if (here.val == 17) {
+ NEEDBITS(here.bits + 3);
+ DROPBITS(here.bits);
+ len = 0;
+ copy = 3 + BITS(3);
+ DROPBITS(3);
+ }
+ else {
+ NEEDBITS(here.bits + 7);
+ DROPBITS(here.bits);
+ len = 0;
+ copy = 11 + BITS(7);
+ DROPBITS(7);
+ }
+ if (state->have + copy > state->nlen + state->ndist) {
+ strm->msg = (char *)"invalid bit length repeat";
+ state->mode = BAD;
+ break;
+ }
+ while (copy--)
+ state->lens[state->have++] = (unsigned short)len;
+ }
+ }
+
+ /* handle error breaks in while */
+ if (state->mode == BAD) break;
+
+ /* check for end-of-block code (better have one) */
+ if (state->lens[256] == 0) {
+ strm->msg = (char *)"invalid code -- missing end-of-block";
+ state->mode = BAD;
+ break;
+ }
+
+ /* build code tables -- note: do not change the lenbits or distbits
+ values here (9 and 6) without reading the comments in inftrees.h
+ concerning the ENOUGH constants, which depend on those values */
+ state->next = state->codes;
+ state->lencode = (code const FAR *)(state->next);
+ state->lenbits = 9;
+ ret = inflate_table(LENS, state->lens, state->nlen, &(state->next),
+ &(state->lenbits), state->work);
+ if (ret) {
+ strm->msg = (char *)"invalid literal/lengths set";
+ state->mode = BAD;
+ break;
+ }
+ state->distcode = (code const FAR *)(state->next);
+ state->distbits = 6;
+ ret = inflate_table(DISTS, state->lens + state->nlen, state->ndist,
+ &(state->next), &(state->distbits), state->work);
+ if (ret) {
+ strm->msg = (char *)"invalid distances set";
+ state->mode = BAD;
+ break;
+ }
+ Tracev((stderr, "inflate: codes ok\n"));
+ state->mode = LEN;
+
+ case LEN:
+ /* use inflate_fast() if we have enough input and output */
+ if (have >= 6 && left >= 258) {
+ RESTORE();
+ if (state->whave < state->wsize)
+ state->whave = state->wsize - left;
+ inflate_fast(strm, state->wsize);
+ LOAD();
+ break;
+ }
+
+ /* get a literal, length, or end-of-block code */
+ for (;;) {
+ here = state->lencode[BITS(state->lenbits)];
+ if ((unsigned)(here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ if (here.op && (here.op & 0xf0) == 0) {
+ last = here;
+ for (;;) {
+ here = state->lencode[last.val +
+ (BITS(last.bits + last.op) >> last.bits)];
+ if ((unsigned)(last.bits + here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ DROPBITS(last.bits);
+ }
+ DROPBITS(here.bits);
+ state->length = (unsigned)here.val;
+
+ /* process literal */
+ if (here.op == 0) {
+ Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
+ "inflate: literal '%c'\n" :
+ "inflate: literal 0x%02x\n", here.val));
+ ROOM();
+ *put++ = (unsigned char)(state->length);
+ left--;
+ state->mode = LEN;
+ break;
+ }
+
+ /* process end of block */
+ if (here.op & 32) {
+ Tracevv((stderr, "inflate: end of block\n"));
+ state->mode = TYPE;
+ break;
+ }
+
+ /* invalid code */
+ if (here.op & 64) {
+ strm->msg = (char *)"invalid literal/length code";
+ state->mode = BAD;
+ break;
+ }
+
+ /* length code -- get extra bits, if any */
+ state->extra = (unsigned)(here.op) & 15;
+ if (state->extra != 0) {
+ NEEDBITS(state->extra);
+ state->length += BITS(state->extra);
+ DROPBITS(state->extra);
+ }
+ Tracevv((stderr, "inflate: length %u\n", state->length));
+
+ /* get distance code */
+ for (;;) {
+ here = state->distcode[BITS(state->distbits)];
+ if ((unsigned)(here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ if ((here.op & 0xf0) == 0) {
+ last = here;
+ for (;;) {
+ here = state->distcode[last.val +
+ (BITS(last.bits + last.op) >> last.bits)];
+ if ((unsigned)(last.bits + here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ DROPBITS(last.bits);
+ }
+ DROPBITS(here.bits);
+ if (here.op & 64) {
+ strm->msg = (char *)"invalid distance code";
+ state->mode = BAD;
+ break;
+ }
+ state->offset = (unsigned)here.val;
+
+ /* get distance extra bits, if any */
+ state->extra = (unsigned)(here.op) & 15;
+ if (state->extra != 0) {
+ NEEDBITS(state->extra);
+ state->offset += BITS(state->extra);
+ DROPBITS(state->extra);
+ }
+ if (state->offset > state->wsize - (state->whave < state->wsize ?
+ left : 0)) {
+ strm->msg = (char *)"invalid distance too far back";
+ state->mode = BAD;
+ break;
+ }
+ Tracevv((stderr, "inflate: distance %u\n", state->offset));
+
+ /* copy match from window to output */
+ do {
+ ROOM();
+ copy = state->wsize - state->offset;
+ if (copy < left) {
+ from = put + copy;
+ copy = left - copy;
+ }
+ else {
+ from = put - state->offset;
+ copy = left;
+ }
+ if (copy > state->length) copy = state->length;
+ state->length -= copy;
+ left -= copy;
+ do {
+ *put++ = *from++;
+ } while (--copy);
+ } while (state->length != 0);
+ break;
+
+ case DONE:
+ /* inflate stream terminated properly -- write leftover output */
+ ret = Z_STREAM_END;
+ if (left < state->wsize) {
+ if (out(out_desc, state->window, state->wsize - left))
+ ret = Z_BUF_ERROR;
+ }
+ goto inf_leave;
+
+ case BAD:
+ ret = Z_DATA_ERROR;
+ goto inf_leave;
+
+ default: /* can't happen, but makes compilers happy */
+ ret = Z_STREAM_ERROR;
+ goto inf_leave;
+ }
+
+ /* Return unused input */
+ inf_leave:
+ strm->next_in = next;
+ strm->avail_in = have;
+ return ret;
}
int ZEXPORT inflateBackEnd(strm)
z_streamp strm;
{
- if (strm == Z_NULL || strm->state == Z_NULL || strm->zfree == (free_func)0)
- return Z_STREAM_ERROR;
- ZFREE(strm, strm->state);
- strm->state = Z_NULL;
- Tracev((stderr, "inflate: end\n"));
- return Z_OK;
+ if (strm == Z_NULL || strm->state == Z_NULL || strm->zfree == (free_func)0)
+ return Z_STREAM_ERROR;
+ ZFREE(strm, strm->state);
+ strm->state = Z_NULL;
+ Tracev((stderr, "inflate: end\n"));
+ return Z_OK;
}
diff --git a/src/lib/zlib/inffast.c b/src/lib/zlib/inffast.c
index 2f1d60b43b8..7468663beb3 100644
--- a/src/lib/zlib/inffast.c
+++ b/src/lib/zlib/inffast.c
@@ -68,259 +68,259 @@ void ZLIB_INTERNAL inflate_fast(strm, start)
z_streamp strm;
unsigned start; /* inflate()'s starting value for strm->avail_out */
{
- struct inflate_state FAR *state;
- unsigned char FAR *in; /* local strm->next_in */
- unsigned char FAR *last; /* while in < last, enough input available */
- unsigned char FAR *out; /* local strm->next_out */
- unsigned char FAR *beg; /* inflate()'s initial strm->next_out */
- unsigned char FAR *end; /* while out < end, enough space available */
+ struct inflate_state FAR *state;
+ unsigned char FAR *in; /* local strm->next_in */
+ unsigned char FAR *last; /* while in < last, enough input available */
+ unsigned char FAR *out; /* local strm->next_out */
+ unsigned char FAR *beg; /* inflate()'s initial strm->next_out */
+ unsigned char FAR *end; /* while out < end, enough space available */
#ifdef INFLATE_STRICT
- unsigned dmax; /* maximum distance from zlib header */
+ unsigned dmax; /* maximum distance from zlib header */
#endif
- unsigned wsize; /* window size or zero if not using window */
- unsigned whave; /* valid bytes in the window */
- unsigned wnext; /* window write index */
- unsigned char FAR *window; /* allocated sliding window, if wsize != 0 */
- unsigned long hold; /* local strm->hold */
- unsigned bits; /* local strm->bits */
- code const FAR *lcode; /* local strm->lencode */
- code const FAR *dcode; /* local strm->distcode */
- unsigned lmask; /* mask for first level of length codes */
- unsigned dmask; /* mask for first level of distance codes */
- code here; /* retrieved table entry */
- unsigned op; /* code bits, operation, extra bits, or */
- /* window position, window bytes to copy */
- unsigned len; /* match length, unused bytes */
- unsigned dist; /* match distance */
- unsigned char FAR *from; /* where to copy match from */
+ unsigned wsize; /* window size or zero if not using window */
+ unsigned whave; /* valid bytes in the window */
+ unsigned wnext; /* window write index */
+ unsigned char FAR *window; /* allocated sliding window, if wsize != 0 */
+ unsigned long hold; /* local strm->hold */
+ unsigned bits; /* local strm->bits */
+ code const FAR *lcode; /* local strm->lencode */
+ code const FAR *dcode; /* local strm->distcode */
+ unsigned lmask; /* mask for first level of length codes */
+ unsigned dmask; /* mask for first level of distance codes */
+ code here; /* retrieved table entry */
+ unsigned op; /* code bits, operation, extra bits, or */
+ /* window position, window bytes to copy */
+ unsigned len; /* match length, unused bytes */
+ unsigned dist; /* match distance */
+ unsigned char FAR *from; /* where to copy match from */
- /* copy state to local variables */
- state = (struct inflate_state FAR *)strm->state;
- in = strm->next_in - OFF;
- last = in + (strm->avail_in - 5);
- out = strm->next_out - OFF;
- beg = out - (start - strm->avail_out);
- end = out + (strm->avail_out - 257);
+ /* copy state to local variables */
+ state = (struct inflate_state FAR *)strm->state;
+ in = strm->next_in - OFF;
+ last = in + (strm->avail_in - 5);
+ out = strm->next_out - OFF;
+ beg = out - (start - strm->avail_out);
+ end = out + (strm->avail_out - 257);
#ifdef INFLATE_STRICT
- dmax = state->dmax;
+ dmax = state->dmax;
#endif
- wsize = state->wsize;
- whave = state->whave;
- wnext = state->wnext;
- window = state->window;
- hold = state->hold;
- bits = state->bits;
- lcode = state->lencode;
- dcode = state->distcode;
- lmask = (1U << state->lenbits) - 1;
- dmask = (1U << state->distbits) - 1;
+ wsize = state->wsize;
+ whave = state->whave;
+ wnext = state->wnext;
+ window = state->window;
+ hold = state->hold;
+ bits = state->bits;
+ lcode = state->lencode;
+ dcode = state->distcode;
+ lmask = (1U << state->lenbits) - 1;
+ dmask = (1U << state->distbits) - 1;
- /* decode literals and length/distances until end-of-block or not enough
- input data or output space */
- do {
- if (bits < 15) {
- hold += (unsigned long)(PUP(in)) << bits;
- bits += 8;
- hold += (unsigned long)(PUP(in)) << bits;
- bits += 8;
- }
- here = lcode[hold & lmask];
- dolen:
- op = (unsigned)(here.bits);
- hold >>= op;
- bits -= op;
- op = (unsigned)(here.op);
- if (op == 0) { /* literal */
- Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
- "inflate: literal '%c'\n" :
- "inflate: literal 0x%02x\n", here.val));
- PUP(out) = (unsigned char)(here.val);
- }
- else if (op & 16) { /* length base */
- len = (unsigned)(here.val);
- op &= 15; /* number of extra bits */
- if (op) {
- if (bits < op) {
- hold += (unsigned long)(PUP(in)) << bits;
- bits += 8;
- }
- len += (unsigned)hold & ((1U << op) - 1);
- hold >>= op;
- bits -= op;
- }
- Tracevv((stderr, "inflate: length %u\n", len));
- if (bits < 15) {
- hold += (unsigned long)(PUP(in)) << bits;
- bits += 8;
- hold += (unsigned long)(PUP(in)) << bits;
- bits += 8;
- }
- here = dcode[hold & dmask];
- dodist:
- op = (unsigned)(here.bits);
- hold >>= op;
- bits -= op;
- op = (unsigned)(here.op);
- if (op & 16) { /* distance base */
- dist = (unsigned)(here.val);
- op &= 15; /* number of extra bits */
- if (bits < op) {
- hold += (unsigned long)(PUP(in)) << bits;
- bits += 8;
- if (bits < op) {
- hold += (unsigned long)(PUP(in)) << bits;
- bits += 8;
- }
- }
- dist += (unsigned)hold & ((1U << op) - 1);
+ /* decode literals and length/distances until end-of-block or not enough
+ input data or output space */
+ do {
+ if (bits < 15) {
+ hold += (unsigned long)(PUP(in)) << bits;
+ bits += 8;
+ hold += (unsigned long)(PUP(in)) << bits;
+ bits += 8;
+ }
+ here = lcode[hold & lmask];
+ dolen:
+ op = (unsigned)(here.bits);
+ hold >>= op;
+ bits -= op;
+ op = (unsigned)(here.op);
+ if (op == 0) { /* literal */
+ Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
+ "inflate: literal '%c'\n" :
+ "inflate: literal 0x%02x\n", here.val));
+ PUP(out) = (unsigned char)(here.val);
+ }
+ else if (op & 16) { /* length base */
+ len = (unsigned)(here.val);
+ op &= 15; /* number of extra bits */
+ if (op) {
+ if (bits < op) {
+ hold += (unsigned long)(PUP(in)) << bits;
+ bits += 8;
+ }
+ len += (unsigned)hold & ((1U << op) - 1);
+ hold >>= op;
+ bits -= op;
+ }
+ Tracevv((stderr, "inflate: length %u\n", len));
+ if (bits < 15) {
+ hold += (unsigned long)(PUP(in)) << bits;
+ bits += 8;
+ hold += (unsigned long)(PUP(in)) << bits;
+ bits += 8;
+ }
+ here = dcode[hold & dmask];
+ dodist:
+ op = (unsigned)(here.bits);
+ hold >>= op;
+ bits -= op;
+ op = (unsigned)(here.op);
+ if (op & 16) { /* distance base */
+ dist = (unsigned)(here.val);
+ op &= 15; /* number of extra bits */
+ if (bits < op) {
+ hold += (unsigned long)(PUP(in)) << bits;
+ bits += 8;
+ if (bits < op) {
+ hold += (unsigned long)(PUP(in)) << bits;
+ bits += 8;
+ }
+ }
+ dist += (unsigned)hold & ((1U << op) - 1);
#ifdef INFLATE_STRICT
- if (dist > dmax) {
- strm->msg = (char *)"invalid distance too far back";
- state->mode = BAD;
- break;
- }
+ if (dist > dmax) {
+ strm->msg = (char *)"invalid distance too far back";
+ state->mode = BAD;
+ break;
+ }
#endif
- hold >>= op;
- bits -= op;
- Tracevv((stderr, "inflate: distance %u\n", dist));
- op = (unsigned)(out - beg); /* max distance in output */
- if (dist > op) { /* see if copy from window */
- op = dist - op; /* distance back in window */
- if (op > whave) {
- if (state->sane) {
- strm->msg =
- (char *)"invalid distance too far back";
- state->mode = BAD;
- break;
- }
+ hold >>= op;
+ bits -= op;
+ Tracevv((stderr, "inflate: distance %u\n", dist));
+ op = (unsigned)(out - beg); /* max distance in output */
+ if (dist > op) { /* see if copy from window */
+ op = dist - op; /* distance back in window */
+ if (op > whave) {
+ if (state->sane) {
+ strm->msg =
+ (char *)"invalid distance too far back";
+ state->mode = BAD;
+ break;
+ }
#ifdef INFLATE_ALLOW_INVALID_DISTANCE_TOOFAR_ARRR
- if (len <= op - whave) {
- do {
- PUP(out) = 0;
- } while (--len);
- continue;
- }
- len -= op - whave;
- do {
- PUP(out) = 0;
- } while (--op > whave);
- if (op == 0) {
- from = out - dist;
- do {
- PUP(out) = PUP(from);
- } while (--len);
- continue;
- }
+ if (len <= op - whave) {
+ do {
+ PUP(out) = 0;
+ } while (--len);
+ continue;
+ }
+ len -= op - whave;
+ do {
+ PUP(out) = 0;
+ } while (--op > whave);
+ if (op == 0) {
+ from = out - dist;
+ do {
+ PUP(out) = PUP(from);
+ } while (--len);
+ continue;
+ }
#endif
- }
- from = window - OFF;
- if (wnext == 0) { /* very common case */
- from += wsize - op;
- if (op < len) { /* some from window */
- len -= op;
- do {
- PUP(out) = PUP(from);
- } while (--op);
- from = out - dist; /* rest from output */
- }
- }
- else if (wnext < op) { /* wrap around window */
- from += wsize + wnext - op;
- op -= wnext;
- if (op < len) { /* some from end of window */
- len -= op;
- do {
- PUP(out) = PUP(from);
- } while (--op);
- from = window - OFF;
- if (wnext < len) { /* some from start of window */
- op = wnext;
- len -= op;
- do {
- PUP(out) = PUP(from);
- } while (--op);
- from = out - dist; /* rest from output */
- }
- }
- }
- else { /* contiguous in window */
- from += wnext - op;
- if (op < len) { /* some from window */
- len -= op;
- do {
- PUP(out) = PUP(from);
- } while (--op);
- from = out - dist; /* rest from output */
- }
- }
- while (len > 2) {
- PUP(out) = PUP(from);
- PUP(out) = PUP(from);
- PUP(out) = PUP(from);
- len -= 3;
- }
- if (len) {
- PUP(out) = PUP(from);
- if (len > 1)
- PUP(out) = PUP(from);
- }
- }
- else {
- from = out - dist; /* copy direct from output */
- do { /* minimum length is three */
- PUP(out) = PUP(from);
- PUP(out) = PUP(from);
- PUP(out) = PUP(from);
- len -= 3;
- } while (len > 2);
- if (len) {
- PUP(out) = PUP(from);
- if (len > 1)
- PUP(out) = PUP(from);
- }
- }
- }
- else if ((op & 64) == 0) { /* 2nd level distance code */
- here = dcode[here.val + (hold & ((1U << op) - 1))];
- goto dodist;
- }
- else {
- strm->msg = (char *)"invalid distance code";
- state->mode = BAD;
- break;
- }
- }
- else if ((op & 64) == 0) { /* 2nd level length code */
- here = lcode[here.val + (hold & ((1U << op) - 1))];
- goto dolen;
- }
- else if (op & 32) { /* end-of-block */
- Tracevv((stderr, "inflate: end of block\n"));
- state->mode = TYPE;
- break;
- }
- else {
- strm->msg = (char *)"invalid literal/length code";
- state->mode = BAD;
- break;
- }
- } while (in < last && out < end);
+ }
+ from = window - OFF;
+ if (wnext == 0) { /* very common case */
+ from += wsize - op;
+ if (op < len) { /* some from window */
+ len -= op;
+ do {
+ PUP(out) = PUP(from);
+ } while (--op);
+ from = out - dist; /* rest from output */
+ }
+ }
+ else if (wnext < op) { /* wrap around window */
+ from += wsize + wnext - op;
+ op -= wnext;
+ if (op < len) { /* some from end of window */
+ len -= op;
+ do {
+ PUP(out) = PUP(from);
+ } while (--op);
+ from = window - OFF;
+ if (wnext < len) { /* some from start of window */
+ op = wnext;
+ len -= op;
+ do {
+ PUP(out) = PUP(from);
+ } while (--op);
+ from = out - dist; /* rest from output */
+ }
+ }
+ }
+ else { /* contiguous in window */
+ from += wnext - op;
+ if (op < len) { /* some from window */
+ len -= op;
+ do {
+ PUP(out) = PUP(from);
+ } while (--op);
+ from = out - dist; /* rest from output */
+ }
+ }
+ while (len > 2) {
+ PUP(out) = PUP(from);
+ PUP(out) = PUP(from);
+ PUP(out) = PUP(from);
+ len -= 3;
+ }
+ if (len) {
+ PUP(out) = PUP(from);
+ if (len > 1)
+ PUP(out) = PUP(from);
+ }
+ }
+ else {
+ from = out - dist; /* copy direct from output */
+ do { /* minimum length is three */
+ PUP(out) = PUP(from);
+ PUP(out) = PUP(from);
+ PUP(out) = PUP(from);
+ len -= 3;
+ } while (len > 2);
+ if (len) {
+ PUP(out) = PUP(from);
+ if (len > 1)
+ PUP(out) = PUP(from);
+ }
+ }
+ }
+ else if ((op & 64) == 0) { /* 2nd level distance code */
+ here = dcode[here.val + (hold & ((1U << op) - 1))];
+ goto dodist;
+ }
+ else {
+ strm->msg = (char *)"invalid distance code";
+ state->mode = BAD;
+ break;
+ }
+ }
+ else if ((op & 64) == 0) { /* 2nd level length code */
+ here = lcode[here.val + (hold & ((1U << op) - 1))];
+ goto dolen;
+ }
+ else if (op & 32) { /* end-of-block */
+ Tracevv((stderr, "inflate: end of block\n"));
+ state->mode = TYPE;
+ break;
+ }
+ else {
+ strm->msg = (char *)"invalid literal/length code";
+ state->mode = BAD;
+ break;
+ }
+ } while (in < last && out < end);
- /* return unused bytes (on entry, bits < 8, so in won't go too far back) */
- len = bits >> 3;
- in -= len;
- bits -= len << 3;
- hold &= (1U << bits) - 1;
+ /* return unused bytes (on entry, bits < 8, so in won't go too far back) */
+ len = bits >> 3;
+ in -= len;
+ bits -= len << 3;
+ hold &= (1U << bits) - 1;
- /* update state and return */
- strm->next_in = in + OFF;
- strm->next_out = out + OFF;
- strm->avail_in = (unsigned)(in < last ? 5 + (last - in) : 5 - (in - last));
- strm->avail_out = (unsigned)(out < end ?
- 257 + (end - out) : 257 - (out - end));
- state->hold = hold;
- state->bits = bits;
- return;
+ /* update state and return */
+ strm->next_in = in + OFF;
+ strm->next_out = out + OFF;
+ strm->avail_in = (unsigned)(in < last ? 5 + (last - in) : 5 - (in - last));
+ strm->avail_out = (unsigned)(out < end ?
+ 257 + (end - out) : 257 - (out - end));
+ state->hold = hold;
+ state->bits = bits;
+ return;
}
/*
diff --git a/src/lib/zlib/inffixed.h b/src/lib/zlib/inffixed.h
index d6283277694..1ed62d0a6ba 100644
--- a/src/lib/zlib/inffixed.h
+++ b/src/lib/zlib/inffixed.h
@@ -1,94 +1,94 @@
- /* inffixed.h -- table for decoding fixed codes
- * Generated automatically by makefixed().
- */
+ /* inffixed.h -- table for decoding fixed codes
+ * Generated automatically by makefixed().
+ */
- /* WARNING: this file should *not* be used by applications.
- It is part of the implementation of this library and is
- subject to change. Applications should only use zlib.h.
- */
+ /* WARNING: this file should *not* be used by applications.
+ It is part of the implementation of this library and is
+ subject to change. Applications should only use zlib.h.
+ */
- static const code lenfix[512] = {
- {96,7,0},{0,8,80},{0,8,16},{20,8,115},{18,7,31},{0,8,112},{0,8,48},
- {0,9,192},{16,7,10},{0,8,96},{0,8,32},{0,9,160},{0,8,0},{0,8,128},
- {0,8,64},{0,9,224},{16,7,6},{0,8,88},{0,8,24},{0,9,144},{19,7,59},
- {0,8,120},{0,8,56},{0,9,208},{17,7,17},{0,8,104},{0,8,40},{0,9,176},
- {0,8,8},{0,8,136},{0,8,72},{0,9,240},{16,7,4},{0,8,84},{0,8,20},
- {21,8,227},{19,7,43},{0,8,116},{0,8,52},{0,9,200},{17,7,13},{0,8,100},
- {0,8,36},{0,9,168},{0,8,4},{0,8,132},{0,8,68},{0,9,232},{16,7,8},
- {0,8,92},{0,8,28},{0,9,152},{20,7,83},{0,8,124},{0,8,60},{0,9,216},
- {18,7,23},{0,8,108},{0,8,44},{0,9,184},{0,8,12},{0,8,140},{0,8,76},
- {0,9,248},{16,7,3},{0,8,82},{0,8,18},{21,8,163},{19,7,35},{0,8,114},
- {0,8,50},{0,9,196},{17,7,11},{0,8,98},{0,8,34},{0,9,164},{0,8,2},
- {0,8,130},{0,8,66},{0,9,228},{16,7,7},{0,8,90},{0,8,26},{0,9,148},
- {20,7,67},{0,8,122},{0,8,58},{0,9,212},{18,7,19},{0,8,106},{0,8,42},
- {0,9,180},{0,8,10},{0,8,138},{0,8,74},{0,9,244},{16,7,5},{0,8,86},
- {0,8,22},{64,8,0},{19,7,51},{0,8,118},{0,8,54},{0,9,204},{17,7,15},
- {0,8,102},{0,8,38},{0,9,172},{0,8,6},{0,8,134},{0,8,70},{0,9,236},
- {16,7,9},{0,8,94},{0,8,30},{0,9,156},{20,7,99},{0,8,126},{0,8,62},
- {0,9,220},{18,7,27},{0,8,110},{0,8,46},{0,9,188},{0,8,14},{0,8,142},
- {0,8,78},{0,9,252},{96,7,0},{0,8,81},{0,8,17},{21,8,131},{18,7,31},
- {0,8,113},{0,8,49},{0,9,194},{16,7,10},{0,8,97},{0,8,33},{0,9,162},
- {0,8,1},{0,8,129},{0,8,65},{0,9,226},{16,7,6},{0,8,89},{0,8,25},
- {0,9,146},{19,7,59},{0,8,121},{0,8,57},{0,9,210},{17,7,17},{0,8,105},
- {0,8,41},{0,9,178},{0,8,9},{0,8,137},{0,8,73},{0,9,242},{16,7,4},
- {0,8,85},{0,8,21},{16,8,258},{19,7,43},{0,8,117},{0,8,53},{0,9,202},
- {17,7,13},{0,8,101},{0,8,37},{0,9,170},{0,8,5},{0,8,133},{0,8,69},
- {0,9,234},{16,7,8},{0,8,93},{0,8,29},{0,9,154},{20,7,83},{0,8,125},
- {0,8,61},{0,9,218},{18,7,23},{0,8,109},{0,8,45},{0,9,186},{0,8,13},
- {0,8,141},{0,8,77},{0,9,250},{16,7,3},{0,8,83},{0,8,19},{21,8,195},
- {19,7,35},{0,8,115},{0,8,51},{0,9,198},{17,7,11},{0,8,99},{0,8,35},
- {0,9,166},{0,8,3},{0,8,131},{0,8,67},{0,9,230},{16,7,7},{0,8,91},
- {0,8,27},{0,9,150},{20,7,67},{0,8,123},{0,8,59},{0,9,214},{18,7,19},
- {0,8,107},{0,8,43},{0,9,182},{0,8,11},{0,8,139},{0,8,75},{0,9,246},
- {16,7,5},{0,8,87},{0,8,23},{64,8,0},{19,7,51},{0,8,119},{0,8,55},
- {0,9,206},{17,7,15},{0,8,103},{0,8,39},{0,9,174},{0,8,7},{0,8,135},
- {0,8,71},{0,9,238},{16,7,9},{0,8,95},{0,8,31},{0,9,158},{20,7,99},
- {0,8,127},{0,8,63},{0,9,222},{18,7,27},{0,8,111},{0,8,47},{0,9,190},
- {0,8,15},{0,8,143},{0,8,79},{0,9,254},{96,7,0},{0,8,80},{0,8,16},
- {20,8,115},{18,7,31},{0,8,112},{0,8,48},{0,9,193},{16,7,10},{0,8,96},
- {0,8,32},{0,9,161},{0,8,0},{0,8,128},{0,8,64},{0,9,225},{16,7,6},
- {0,8,88},{0,8,24},{0,9,145},{19,7,59},{0,8,120},{0,8,56},{0,9,209},
- {17,7,17},{0,8,104},{0,8,40},{0,9,177},{0,8,8},{0,8,136},{0,8,72},
- {0,9,241},{16,7,4},{0,8,84},{0,8,20},{21,8,227},{19,7,43},{0,8,116},
- {0,8,52},{0,9,201},{17,7,13},{0,8,100},{0,8,36},{0,9,169},{0,8,4},
- {0,8,132},{0,8,68},{0,9,233},{16,7,8},{0,8,92},{0,8,28},{0,9,153},
- {20,7,83},{0,8,124},{0,8,60},{0,9,217},{18,7,23},{0,8,108},{0,8,44},
- {0,9,185},{0,8,12},{0,8,140},{0,8,76},{0,9,249},{16,7,3},{0,8,82},
- {0,8,18},{21,8,163},{19,7,35},{0,8,114},{0,8,50},{0,9,197},{17,7,11},
- {0,8,98},{0,8,34},{0,9,165},{0,8,2},{0,8,130},{0,8,66},{0,9,229},
- {16,7,7},{0,8,90},{0,8,26},{0,9,149},{20,7,67},{0,8,122},{0,8,58},
- {0,9,213},{18,7,19},{0,8,106},{0,8,42},{0,9,181},{0,8,10},{0,8,138},
- {0,8,74},{0,9,245},{16,7,5},{0,8,86},{0,8,22},{64,8,0},{19,7,51},
- {0,8,118},{0,8,54},{0,9,205},{17,7,15},{0,8,102},{0,8,38},{0,9,173},
- {0,8,6},{0,8,134},{0,8,70},{0,9,237},{16,7,9},{0,8,94},{0,8,30},
- {0,9,157},{20,7,99},{0,8,126},{0,8,62},{0,9,221},{18,7,27},{0,8,110},
- {0,8,46},{0,9,189},{0,8,14},{0,8,142},{0,8,78},{0,9,253},{96,7,0},
- {0,8,81},{0,8,17},{21,8,131},{18,7,31},{0,8,113},{0,8,49},{0,9,195},
- {16,7,10},{0,8,97},{0,8,33},{0,9,163},{0,8,1},{0,8,129},{0,8,65},
- {0,9,227},{16,7,6},{0,8,89},{0,8,25},{0,9,147},{19,7,59},{0,8,121},
- {0,8,57},{0,9,211},{17,7,17},{0,8,105},{0,8,41},{0,9,179},{0,8,9},
- {0,8,137},{0,8,73},{0,9,243},{16,7,4},{0,8,85},{0,8,21},{16,8,258},
- {19,7,43},{0,8,117},{0,8,53},{0,9,203},{17,7,13},{0,8,101},{0,8,37},
- {0,9,171},{0,8,5},{0,8,133},{0,8,69},{0,9,235},{16,7,8},{0,8,93},
- {0,8,29},{0,9,155},{20,7,83},{0,8,125},{0,8,61},{0,9,219},{18,7,23},
- {0,8,109},{0,8,45},{0,9,187},{0,8,13},{0,8,141},{0,8,77},{0,9,251},
- {16,7,3},{0,8,83},{0,8,19},{21,8,195},{19,7,35},{0,8,115},{0,8,51},
- {0,9,199},{17,7,11},{0,8,99},{0,8,35},{0,9,167},{0,8,3},{0,8,131},
- {0,8,67},{0,9,231},{16,7,7},{0,8,91},{0,8,27},{0,9,151},{20,7,67},
- {0,8,123},{0,8,59},{0,9,215},{18,7,19},{0,8,107},{0,8,43},{0,9,183},
- {0,8,11},{0,8,139},{0,8,75},{0,9,247},{16,7,5},{0,8,87},{0,8,23},
- {64,8,0},{19,7,51},{0,8,119},{0,8,55},{0,9,207},{17,7,15},{0,8,103},
- {0,8,39},{0,9,175},{0,8,7},{0,8,135},{0,8,71},{0,9,239},{16,7,9},
- {0,8,95},{0,8,31},{0,9,159},{20,7,99},{0,8,127},{0,8,63},{0,9,223},
- {18,7,27},{0,8,111},{0,8,47},{0,9,191},{0,8,15},{0,8,143},{0,8,79},
- {0,9,255}
- };
+ static const code lenfix[512] = {
+ {96,7,0},{0,8,80},{0,8,16},{20,8,115},{18,7,31},{0,8,112},{0,8,48},
+ {0,9,192},{16,7,10},{0,8,96},{0,8,32},{0,9,160},{0,8,0},{0,8,128},
+ {0,8,64},{0,9,224},{16,7,6},{0,8,88},{0,8,24},{0,9,144},{19,7,59},
+ {0,8,120},{0,8,56},{0,9,208},{17,7,17},{0,8,104},{0,8,40},{0,9,176},
+ {0,8,8},{0,8,136},{0,8,72},{0,9,240},{16,7,4},{0,8,84},{0,8,20},
+ {21,8,227},{19,7,43},{0,8,116},{0,8,52},{0,9,200},{17,7,13},{0,8,100},
+ {0,8,36},{0,9,168},{0,8,4},{0,8,132},{0,8,68},{0,9,232},{16,7,8},
+ {0,8,92},{0,8,28},{0,9,152},{20,7,83},{0,8,124},{0,8,60},{0,9,216},
+ {18,7,23},{0,8,108},{0,8,44},{0,9,184},{0,8,12},{0,8,140},{0,8,76},
+ {0,9,248},{16,7,3},{0,8,82},{0,8,18},{21,8,163},{19,7,35},{0,8,114},
+ {0,8,50},{0,9,196},{17,7,11},{0,8,98},{0,8,34},{0,9,164},{0,8,2},
+ {0,8,130},{0,8,66},{0,9,228},{16,7,7},{0,8,90},{0,8,26},{0,9,148},
+ {20,7,67},{0,8,122},{0,8,58},{0,9,212},{18,7,19},{0,8,106},{0,8,42},
+ {0,9,180},{0,8,10},{0,8,138},{0,8,74},{0,9,244},{16,7,5},{0,8,86},
+ {0,8,22},{64,8,0},{19,7,51},{0,8,118},{0,8,54},{0,9,204},{17,7,15},
+ {0,8,102},{0,8,38},{0,9,172},{0,8,6},{0,8,134},{0,8,70},{0,9,236},
+ {16,7,9},{0,8,94},{0,8,30},{0,9,156},{20,7,99},{0,8,126},{0,8,62},
+ {0,9,220},{18,7,27},{0,8,110},{0,8,46},{0,9,188},{0,8,14},{0,8,142},
+ {0,8,78},{0,9,252},{96,7,0},{0,8,81},{0,8,17},{21,8,131},{18,7,31},
+ {0,8,113},{0,8,49},{0,9,194},{16,7,10},{0,8,97},{0,8,33},{0,9,162},
+ {0,8,1},{0,8,129},{0,8,65},{0,9,226},{16,7,6},{0,8,89},{0,8,25},
+ {0,9,146},{19,7,59},{0,8,121},{0,8,57},{0,9,210},{17,7,17},{0,8,105},
+ {0,8,41},{0,9,178},{0,8,9},{0,8,137},{0,8,73},{0,9,242},{16,7,4},
+ {0,8,85},{0,8,21},{16,8,258},{19,7,43},{0,8,117},{0,8,53},{0,9,202},
+ {17,7,13},{0,8,101},{0,8,37},{0,9,170},{0,8,5},{0,8,133},{0,8,69},
+ {0,9,234},{16,7,8},{0,8,93},{0,8,29},{0,9,154},{20,7,83},{0,8,125},
+ {0,8,61},{0,9,218},{18,7,23},{0,8,109},{0,8,45},{0,9,186},{0,8,13},
+ {0,8,141},{0,8,77},{0,9,250},{16,7,3},{0,8,83},{0,8,19},{21,8,195},
+ {19,7,35},{0,8,115},{0,8,51},{0,9,198},{17,7,11},{0,8,99},{0,8,35},
+ {0,9,166},{0,8,3},{0,8,131},{0,8,67},{0,9,230},{16,7,7},{0,8,91},
+ {0,8,27},{0,9,150},{20,7,67},{0,8,123},{0,8,59},{0,9,214},{18,7,19},
+ {0,8,107},{0,8,43},{0,9,182},{0,8,11},{0,8,139},{0,8,75},{0,9,246},
+ {16,7,5},{0,8,87},{0,8,23},{64,8,0},{19,7,51},{0,8,119},{0,8,55},
+ {0,9,206},{17,7,15},{0,8,103},{0,8,39},{0,9,174},{0,8,7},{0,8,135},
+ {0,8,71},{0,9,238},{16,7,9},{0,8,95},{0,8,31},{0,9,158},{20,7,99},
+ {0,8,127},{0,8,63},{0,9,222},{18,7,27},{0,8,111},{0,8,47},{0,9,190},
+ {0,8,15},{0,8,143},{0,8,79},{0,9,254},{96,7,0},{0,8,80},{0,8,16},
+ {20,8,115},{18,7,31},{0,8,112},{0,8,48},{0,9,193},{16,7,10},{0,8,96},
+ {0,8,32},{0,9,161},{0,8,0},{0,8,128},{0,8,64},{0,9,225},{16,7,6},
+ {0,8,88},{0,8,24},{0,9,145},{19,7,59},{0,8,120},{0,8,56},{0,9,209},
+ {17,7,17},{0,8,104},{0,8,40},{0,9,177},{0,8,8},{0,8,136},{0,8,72},
+ {0,9,241},{16,7,4},{0,8,84},{0,8,20},{21,8,227},{19,7,43},{0,8,116},
+ {0,8,52},{0,9,201},{17,7,13},{0,8,100},{0,8,36},{0,9,169},{0,8,4},
+ {0,8,132},{0,8,68},{0,9,233},{16,7,8},{0,8,92},{0,8,28},{0,9,153},
+ {20,7,83},{0,8,124},{0,8,60},{0,9,217},{18,7,23},{0,8,108},{0,8,44},
+ {0,9,185},{0,8,12},{0,8,140},{0,8,76},{0,9,249},{16,7,3},{0,8,82},
+ {0,8,18},{21,8,163},{19,7,35},{0,8,114},{0,8,50},{0,9,197},{17,7,11},
+ {0,8,98},{0,8,34},{0,9,165},{0,8,2},{0,8,130},{0,8,66},{0,9,229},
+ {16,7,7},{0,8,90},{0,8,26},{0,9,149},{20,7,67},{0,8,122},{0,8,58},
+ {0,9,213},{18,7,19},{0,8,106},{0,8,42},{0,9,181},{0,8,10},{0,8,138},
+ {0,8,74},{0,9,245},{16,7,5},{0,8,86},{0,8,22},{64,8,0},{19,7,51},
+ {0,8,118},{0,8,54},{0,9,205},{17,7,15},{0,8,102},{0,8,38},{0,9,173},
+ {0,8,6},{0,8,134},{0,8,70},{0,9,237},{16,7,9},{0,8,94},{0,8,30},
+ {0,9,157},{20,7,99},{0,8,126},{0,8,62},{0,9,221},{18,7,27},{0,8,110},
+ {0,8,46},{0,9,189},{0,8,14},{0,8,142},{0,8,78},{0,9,253},{96,7,0},
+ {0,8,81},{0,8,17},{21,8,131},{18,7,31},{0,8,113},{0,8,49},{0,9,195},
+ {16,7,10},{0,8,97},{0,8,33},{0,9,163},{0,8,1},{0,8,129},{0,8,65},
+ {0,9,227},{16,7,6},{0,8,89},{0,8,25},{0,9,147},{19,7,59},{0,8,121},
+ {0,8,57},{0,9,211},{17,7,17},{0,8,105},{0,8,41},{0,9,179},{0,8,9},
+ {0,8,137},{0,8,73},{0,9,243},{16,7,4},{0,8,85},{0,8,21},{16,8,258},
+ {19,7,43},{0,8,117},{0,8,53},{0,9,203},{17,7,13},{0,8,101},{0,8,37},
+ {0,9,171},{0,8,5},{0,8,133},{0,8,69},{0,9,235},{16,7,8},{0,8,93},
+ {0,8,29},{0,9,155},{20,7,83},{0,8,125},{0,8,61},{0,9,219},{18,7,23},
+ {0,8,109},{0,8,45},{0,9,187},{0,8,13},{0,8,141},{0,8,77},{0,9,251},
+ {16,7,3},{0,8,83},{0,8,19},{21,8,195},{19,7,35},{0,8,115},{0,8,51},
+ {0,9,199},{17,7,11},{0,8,99},{0,8,35},{0,9,167},{0,8,3},{0,8,131},
+ {0,8,67},{0,9,231},{16,7,7},{0,8,91},{0,8,27},{0,9,151},{20,7,67},
+ {0,8,123},{0,8,59},{0,9,215},{18,7,19},{0,8,107},{0,8,43},{0,9,183},
+ {0,8,11},{0,8,139},{0,8,75},{0,9,247},{16,7,5},{0,8,87},{0,8,23},
+ {64,8,0},{19,7,51},{0,8,119},{0,8,55},{0,9,207},{17,7,15},{0,8,103},
+ {0,8,39},{0,9,175},{0,8,7},{0,8,135},{0,8,71},{0,9,239},{16,7,9},
+ {0,8,95},{0,8,31},{0,9,159},{20,7,99},{0,8,127},{0,8,63},{0,9,223},
+ {18,7,27},{0,8,111},{0,8,47},{0,9,191},{0,8,15},{0,8,143},{0,8,79},
+ {0,9,255}
+ };
- static const code distfix[32] = {
- {16,5,1},{23,5,257},{19,5,17},{27,5,4097},{17,5,5},{25,5,1025},
- {21,5,65},{29,5,16385},{16,5,3},{24,5,513},{20,5,33},{28,5,8193},
- {18,5,9},{26,5,2049},{22,5,129},{64,5,0},{16,5,2},{23,5,385},
- {19,5,25},{27,5,6145},{17,5,7},{25,5,1537},{21,5,97},{29,5,24577},
- {16,5,4},{24,5,769},{20,5,49},{28,5,12289},{18,5,13},{26,5,3073},
- {22,5,193},{64,5,0}
- };
+ static const code distfix[32] = {
+ {16,5,1},{23,5,257},{19,5,17},{27,5,4097},{17,5,5},{25,5,1025},
+ {21,5,65},{29,5,16385},{16,5,3},{24,5,513},{20,5,33},{28,5,8193},
+ {18,5,9},{26,5,2049},{22,5,129},{64,5,0},{16,5,2},{23,5,385},
+ {19,5,25},{27,5,6145},{17,5,7},{25,5,1537},{21,5,97},{29,5,24577},
+ {16,5,4},{24,5,769},{20,5,49},{28,5,12289},{18,5,13},{26,5,3073},
+ {22,5,193},{64,5,0}
+ };
diff --git a/src/lib/zlib/inflate.c b/src/lib/zlib/inflate.c
index 47418a1e1e1..f9d9ca4edfa 100644
--- a/src/lib/zlib/inflate.c
+++ b/src/lib/zlib/inflate.c
@@ -95,85 +95,85 @@
local void fixedtables OF((struct inflate_state FAR *state));
local int updatewindow OF((z_streamp strm, unsigned out));
#ifdef BUILDFIXED
- void makefixed OF((void));
+ void makefixed OF((void));
#endif
local unsigned syncsearch OF((unsigned FAR *have, unsigned char FAR *buf,
- unsigned len));
+ unsigned len));
int ZEXPORT inflateResetKeep(strm)
z_streamp strm;
{
- struct inflate_state FAR *state;
-
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- strm->total_in = strm->total_out = state->total = 0;
- strm->msg = Z_NULL;
- if (state->wrap) /* to support ill-conceived Java test suite */
- strm->adler = state->wrap & 1;
- state->mode = HEAD;
- state->last = 0;
- state->havedict = 0;
- state->dmax = 32768U;
- state->head = Z_NULL;
- state->hold = 0;
- state->bits = 0;
- state->lencode = state->distcode = state->next = state->codes;
- state->sane = 1;
- state->back = -1;
- Tracev((stderr, "inflate: reset\n"));
- return Z_OK;
+ struct inflate_state FAR *state;
+
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ strm->total_in = strm->total_out = state->total = 0;
+ strm->msg = Z_NULL;
+ if (state->wrap) /* to support ill-conceived Java test suite */
+ strm->adler = state->wrap & 1;
+ state->mode = HEAD;
+ state->last = 0;
+ state->havedict = 0;
+ state->dmax = 32768U;
+ state->head = Z_NULL;
+ state->hold = 0;
+ state->bits = 0;
+ state->lencode = state->distcode = state->next = state->codes;
+ state->sane = 1;
+ state->back = -1;
+ Tracev((stderr, "inflate: reset\n"));
+ return Z_OK;
}
int ZEXPORT inflateReset(strm)
z_streamp strm;
{
- struct inflate_state FAR *state;
-
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- state->wsize = 0;
- state->whave = 0;
- state->wnext = 0;
- return inflateResetKeep(strm);
+ struct inflate_state FAR *state;
+
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ state->wsize = 0;
+ state->whave = 0;
+ state->wnext = 0;
+ return inflateResetKeep(strm);
}
int ZEXPORT inflateReset2(strm, windowBits)
z_streamp strm;
int windowBits;
{
- int wrap;
- struct inflate_state FAR *state;
-
- /* get the state */
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
-
- /* extract wrap request from windowBits parameter */
- if (windowBits < 0) {
- wrap = 0;
- windowBits = -windowBits;
- }
- else {
- wrap = (windowBits >> 4) + 1;
+ int wrap;
+ struct inflate_state FAR *state;
+
+ /* get the state */
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+
+ /* extract wrap request from windowBits parameter */
+ if (windowBits < 0) {
+ wrap = 0;
+ windowBits = -windowBits;
+ }
+ else {
+ wrap = (windowBits >> 4) + 1;
#ifdef GUNZIP
- if (windowBits < 48)
- windowBits &= 15;
+ if (windowBits < 48)
+ windowBits &= 15;
#endif
- }
-
- /* set number of window bits, free window if different */
- if (windowBits && (windowBits < 8 || windowBits > 15))
- return Z_STREAM_ERROR;
- if (state->window != Z_NULL && state->wbits != (unsigned)windowBits) {
- ZFREE(strm, state->window);
- state->window = Z_NULL;
- }
-
- /* update state and reset the rest of it */
- state->wrap = wrap;
- state->wbits = (unsigned)windowBits;
- return inflateReset(strm);
+ }
+
+ /* set number of window bits, free window if different */
+ if (windowBits && (windowBits < 8 || windowBits > 15))
+ return Z_STREAM_ERROR;
+ if (state->window != Z_NULL && state->wbits != (unsigned)windowBits) {
+ ZFREE(strm, state->window);
+ state->window = Z_NULL;
+ }
+
+ /* update state and reset the rest of it */
+ state->wrap = wrap;
+ state->wbits = (unsigned)windowBits;
+ return inflateReset(strm);
}
int ZEXPORT inflateInit2_(strm, windowBits, version, stream_size)
@@ -182,40 +182,40 @@ int windowBits;
const char *version;
int stream_size;
{
- int ret;
- struct inflate_state FAR *state;
-
- if (version == Z_NULL || version[0] != ZLIB_VERSION[0] ||
- stream_size != (int)(sizeof(z_stream)))
- return Z_VERSION_ERROR;
- if (strm == Z_NULL) return Z_STREAM_ERROR;
- strm->msg = Z_NULL; /* in case we return an error */
- if (strm->zalloc == (alloc_func)0) {
+ int ret;
+ struct inflate_state FAR *state;
+
+ if (version == Z_NULL || version[0] != ZLIB_VERSION[0] ||
+ stream_size != (int)(sizeof(z_stream)))
+ return Z_VERSION_ERROR;
+ if (strm == Z_NULL) return Z_STREAM_ERROR;
+ strm->msg = Z_NULL; /* in case we return an error */
+ if (strm->zalloc == (alloc_func)0) {
#ifdef Z_SOLO
- return Z_STREAM_ERROR;
+ return Z_STREAM_ERROR;
#else
- strm->zalloc = zcalloc;
- strm->opaque = (voidpf)0;
+ strm->zalloc = zcalloc;
+ strm->opaque = (voidpf)0;
#endif
- }
- if (strm->zfree == (free_func)0)
+ }
+ if (strm->zfree == (free_func)0)
#ifdef Z_SOLO
- return Z_STREAM_ERROR;
+ return Z_STREAM_ERROR;
#else
- strm->zfree = zcfree;
+ strm->zfree = zcfree;
#endif
- state = (struct inflate_state FAR *)
- ZALLOC(strm, 1, sizeof(struct inflate_state));
- if (state == Z_NULL) return Z_MEM_ERROR;
- Tracev((stderr, "inflate: allocated\n"));
- strm->state = (struct internal_state FAR *)state;
- state->window = Z_NULL;
- ret = inflateReset2(strm, windowBits);
- if (ret != Z_OK) {
- ZFREE(strm, state);
- strm->state = Z_NULL;
- }
- return ret;
+ state = (struct inflate_state FAR *)
+ ZALLOC(strm, 1, sizeof(struct inflate_state));
+ if (state == Z_NULL) return Z_MEM_ERROR;
+ Tracev((stderr, "inflate: allocated\n"));
+ strm->state = (struct internal_state FAR *)state;
+ state->window = Z_NULL;
+ ret = inflateReset2(strm, windowBits);
+ if (ret != Z_OK) {
+ ZFREE(strm, state);
+ strm->state = Z_NULL;
+ }
+ return ret;
}
int ZEXPORT inflateInit_(strm, version, stream_size)
@@ -223,7 +223,7 @@ z_streamp strm;
const char *version;
int stream_size;
{
- return inflateInit2_(strm, DEF_WBITS, version, stream_size);
+ return inflateInit2_(strm, DEF_WBITS, version, stream_size);
}
int ZEXPORT inflatePrime(strm, bits, value)
@@ -231,20 +231,20 @@ z_streamp strm;
int bits;
int value;
{
- struct inflate_state FAR *state;
-
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- if (bits < 0) {
- state->hold = 0;
- state->bits = 0;
- return Z_OK;
- }
- if (bits > 16 || state->bits + bits > 32) return Z_STREAM_ERROR;
- value &= (1L << bits) - 1;
- state->hold += value << state->bits;
- state->bits += bits;
- return Z_OK;
+ struct inflate_state FAR *state;
+
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ if (bits < 0) {
+ state->hold = 0;
+ state->bits = 0;
+ return Z_OK;
+ }
+ if (bits > 16 || state->bits + bits > 32) return Z_STREAM_ERROR;
+ value &= (1L << bits) - 1;
+ state->hold += value << state->bits;
+ state->bits += bits;
+ return Z_OK;
}
/*
@@ -261,43 +261,43 @@ local void fixedtables(state)
struct inflate_state FAR *state;
{
#ifdef BUILDFIXED
- static int virgin = 1;
- static code *lenfix, *distfix;
- static code fixed[544];
-
- /* build fixed huffman tables if first call (may not be thread safe) */
- if (virgin) {
- unsigned sym, bits;
- static code *next;
-
- /* literal/length table */
- sym = 0;
- while (sym < 144) state->lens[sym++] = 8;
- while (sym < 256) state->lens[sym++] = 9;
- while (sym < 280) state->lens[sym++] = 7;
- while (sym < 288) state->lens[sym++] = 8;
- next = fixed;
- lenfix = next;
- bits = 9;
- inflate_table(LENS, state->lens, 288, &(next), &(bits), state->work);
-
- /* distance table */
- sym = 0;
- while (sym < 32) state->lens[sym++] = 5;
- distfix = next;
- bits = 5;
- inflate_table(DISTS, state->lens, 32, &(next), &(bits), state->work);
-
- /* do this just once */
- virgin = 0;
- }
+ static int virgin = 1;
+ static code *lenfix, *distfix;
+ static code fixed[544];
+
+ /* build fixed huffman tables if first call (may not be thread safe) */
+ if (virgin) {
+ unsigned sym, bits;
+ static code *next;
+
+ /* literal/length table */
+ sym = 0;
+ while (sym < 144) state->lens[sym++] = 8;
+ while (sym < 256) state->lens[sym++] = 9;
+ while (sym < 280) state->lens[sym++] = 7;
+ while (sym < 288) state->lens[sym++] = 8;
+ next = fixed;
+ lenfix = next;
+ bits = 9;
+ inflate_table(LENS, state->lens, 288, &(next), &(bits), state->work);
+
+ /* distance table */
+ sym = 0;
+ while (sym < 32) state->lens[sym++] = 5;
+ distfix = next;
+ bits = 5;
+ inflate_table(DISTS, state->lens, 32, &(next), &(bits), state->work);
+
+ /* do this just once */
+ virgin = 0;
+ }
#else /* !BUILDFIXED */
# include "inffixed.h"
#endif /* BUILDFIXED */
- state->lencode = lenfix;
- state->lenbits = 9;
- state->distcode = distfix;
- state->distbits = 5;
+ state->lencode = lenfix;
+ state->lenbits = 9;
+ state->distcode = distfix;
+ state->distbits = 5;
}
#ifdef MAKEFIXED
@@ -323,41 +323,41 @@ struct inflate_state FAR *state;
*/
void makefixed()
{
- unsigned low, size;
- struct inflate_state state;
-
- fixedtables(&state);
- puts(" /* inffixed.h -- table for decoding fixed codes");
- puts(" * Generated automatically by makefixed().");
- puts(" */");
- puts("");
- puts(" /* WARNING: this file should *not* be used by applications.");
- puts(" It is part of the implementation of this library and is");
- puts(" subject to change. Applications should only use zlib.h.");
- puts(" */");
- puts("");
- size = 1U << 9;
- printf(" static const code lenfix[%u] = {", size);
- low = 0;
- for (;;) {
- if ((low % 7) == 0) printf("\n ");
- printf("{%u,%u,%d}", (low & 127) == 99 ? 64 : state.lencode[low].op,
- state.lencode[low].bits, state.lencode[low].val);
- if (++low == size) break;
- putchar(',');
- }
- puts("\n };");
- size = 1U << 5;
- printf("\n static const code distfix[%u] = {", size);
- low = 0;
- for (;;) {
- if ((low % 6) == 0) printf("\n ");
- printf("{%u,%u,%d}", state.distcode[low].op, state.distcode[low].bits,
- state.distcode[low].val);
- if (++low == size) break;
- putchar(',');
- }
- puts("\n };");
+ unsigned low, size;
+ struct inflate_state state;
+
+ fixedtables(&state);
+ puts(" /* inffixed.h -- table for decoding fixed codes");
+ puts(" * Generated automatically by makefixed().");
+ puts(" */");
+ puts("");
+ puts(" /* WARNING: this file should *not* be used by applications.");
+ puts(" It is part of the implementation of this library and is");
+ puts(" subject to change. Applications should only use zlib.h.");
+ puts(" */");
+ puts("");
+ size = 1U << 9;
+ printf(" static const code lenfix[%u] = {", size);
+ low = 0;
+ for (;;) {
+ if ((low % 7) == 0) printf("\n ");
+ printf("{%u,%u,%d}", (low & 127) == 99 ? 64 : state.lencode[low].op,
+ state.lencode[low].bits, state.lencode[low].val);
+ if (++low == size) break;
+ putchar(',');
+ }
+ puts("\n };");
+ size = 1U << 5;
+ printf("\n static const code distfix[%u] = {", size);
+ low = 0;
+ for (;;) {
+ if ((low % 6) == 0) printf("\n ");
+ printf("{%u,%u,%d}", state.distcode[low].op, state.distcode[low].bits,
+ state.distcode[low].val);
+ if (++low == size) break;
+ putchar(',');
+ }
+ puts("\n };");
}
#endif /* MAKEFIXED */
@@ -379,50 +379,50 @@ local int updatewindow(strm, out)
z_streamp strm;
unsigned out;
{
- struct inflate_state FAR *state;
- unsigned copy, dist;
-
- state = (struct inflate_state FAR *)strm->state;
-
- /* if it hasn't been done already, allocate space for the window */
- if (state->window == Z_NULL) {
- state->window = (unsigned char FAR *)
- ZALLOC(strm, 1U << state->wbits,
- sizeof(unsigned char));
- if (state->window == Z_NULL) return 1;
- }
-
- /* if window not in use yet, initialize */
- if (state->wsize == 0) {
- state->wsize = 1U << state->wbits;
- state->wnext = 0;
- state->whave = 0;
- }
-
- /* copy state->wsize or less output bytes into the circular window */
- copy = out - strm->avail_out;
- if (copy >= state->wsize) {
- zmemcpy(state->window, strm->next_out - state->wsize, state->wsize);
- state->wnext = 0;
- state->whave = state->wsize;
- }
- else {
- dist = state->wsize - state->wnext;
- if (dist > copy) dist = copy;
- zmemcpy(state->window + state->wnext, strm->next_out - copy, dist);
- copy -= dist;
- if (copy) {
- zmemcpy(state->window, strm->next_out - copy, copy);
- state->wnext = copy;
- state->whave = state->wsize;
- }
- else {
- state->wnext += dist;
- if (state->wnext == state->wsize) state->wnext = 0;
- if (state->whave < state->wsize) state->whave += dist;
- }
- }
- return 0;
+ struct inflate_state FAR *state;
+ unsigned copy, dist;
+
+ state = (struct inflate_state FAR *)strm->state;
+
+ /* if it hasn't been done already, allocate space for the window */
+ if (state->window == Z_NULL) {
+ state->window = (unsigned char FAR *)
+ ZALLOC(strm, 1U << state->wbits,
+ sizeof(unsigned char));
+ if (state->window == Z_NULL) return 1;
+ }
+
+ /* if window not in use yet, initialize */
+ if (state->wsize == 0) {
+ state->wsize = 1U << state->wbits;
+ state->wnext = 0;
+ state->whave = 0;
+ }
+
+ /* copy state->wsize or less output bytes into the circular window */
+ copy = out - strm->avail_out;
+ if (copy >= state->wsize) {
+ zmemcpy(state->window, strm->next_out - state->wsize, state->wsize);
+ state->wnext = 0;
+ state->whave = state->wsize;
+ }
+ else {
+ dist = state->wsize - state->wnext;
+ if (dist > copy) dist = copy;
+ zmemcpy(state->window + state->wnext, strm->next_out - copy, dist);
+ copy -= dist;
+ if (copy) {
+ zmemcpy(state->window, strm->next_out - copy, copy);
+ state->wnext = copy;
+ state->whave = state->wsize;
+ }
+ else {
+ state->wnext += dist;
+ if (state->wnext == state->wsize) state->wnext = 0;
+ if (state->whave < state->wsize) state->whave += dist;
+ }
+ }
+ return 0;
}
/* Macros for inflate(): */
@@ -430,7 +430,7 @@ unsigned out;
/* check function to use adler32() for zlib or crc32() for gzip */
#ifdef GUNZIP
# define UPDATE(check, buf, len) \
- (state->flags ? crc32(check, buf, len) : adler32(check, buf, len))
+ (state->flags ? crc32(check, buf, len) : adler32(check, buf, len))
#else
# define UPDATE(check, buf, len) adler32(check, buf, len)
#endif
@@ -438,86 +438,86 @@ unsigned out;
/* check macros for header crc */
#ifdef GUNZIP
# define CRC2(check, word) \
- do { \
- hbuf[0] = (unsigned char)(word); \
- hbuf[1] = (unsigned char)((word) >> 8); \
- check = crc32(check, hbuf, 2); \
- } while (0)
+ do { \
+ hbuf[0] = (unsigned char)(word); \
+ hbuf[1] = (unsigned char)((word) >> 8); \
+ check = crc32(check, hbuf, 2); \
+ } while (0)
# define CRC4(check, word) \
- do { \
- hbuf[0] = (unsigned char)(word); \
- hbuf[1] = (unsigned char)((word) >> 8); \
- hbuf[2] = (unsigned char)((word) >> 16); \
- hbuf[3] = (unsigned char)((word) >> 24); \
- check = crc32(check, hbuf, 4); \
- } while (0)
+ do { \
+ hbuf[0] = (unsigned char)(word); \
+ hbuf[1] = (unsigned char)((word) >> 8); \
+ hbuf[2] = (unsigned char)((word) >> 16); \
+ hbuf[3] = (unsigned char)((word) >> 24); \
+ check = crc32(check, hbuf, 4); \
+ } while (0)
#endif
/* Load registers with state in inflate() for speed */
#define LOAD() \
- do { \
- put = strm->next_out; \
- left = strm->avail_out; \
- next = strm->next_in; \
- have = strm->avail_in; \
- hold = state->hold; \
- bits = state->bits; \
- } while (0)
+ do { \
+ put = strm->next_out; \
+ left = strm->avail_out; \
+ next = strm->next_in; \
+ have = strm->avail_in; \
+ hold = state->hold; \
+ bits = state->bits; \
+ } while (0)
/* Restore state from registers in inflate() */
#define RESTORE() \
- do { \
- strm->next_out = put; \
- strm->avail_out = left; \
- strm->next_in = next; \
- strm->avail_in = have; \
- state->hold = hold; \
- state->bits = bits; \
- } while (0)
+ do { \
+ strm->next_out = put; \
+ strm->avail_out = left; \
+ strm->next_in = next; \
+ strm->avail_in = have; \
+ state->hold = hold; \
+ state->bits = bits; \
+ } while (0)
/* Clear the input bit accumulator */
#define INITBITS() \
- do { \
- hold = 0; \
- bits = 0; \
- } while (0)
+ do { \
+ hold = 0; \
+ bits = 0; \
+ } while (0)
/* Get a byte of input into the bit accumulator, or return from inflate()
if there is no input available. */
#define PULLBYTE() \
- do { \
- if (have == 0) goto inf_leave; \
- have--; \
- hold += (unsigned long)(*next++) << bits; \
- bits += 8; \
- } while (0)
+ do { \
+ if (have == 0) goto inf_leave; \
+ have--; \
+ hold += (unsigned long)(*next++) << bits; \
+ bits += 8; \
+ } while (0)
/* Assure that there are at least n bits in the bit accumulator. If there is
not enough available input to do that, then return from inflate(). */
#define NEEDBITS(n) \
- do { \
- while (bits < (unsigned)(n)) \
- PULLBYTE(); \
- } while (0)
+ do { \
+ while (bits < (unsigned)(n)) \
+ PULLBYTE(); \
+ } while (0)
/* Return the low n bits of the bit accumulator (n < 16) */
#define BITS(n) \
- ((unsigned)hold & ((1U << (n)) - 1))
+ ((unsigned)hold & ((1U << (n)) - 1))
/* Remove n bits from the bit accumulator */
#define DROPBITS(n) \
- do { \
- hold >>= (n); \
- bits -= (unsigned)(n); \
- } while (0)
+ do { \
+ hold >>= (n); \
+ bits -= (unsigned)(n); \
+ } while (0)
/* Remove zero to seven bits as needed to go to a byte boundary */
#define BYTEBITS() \
- do { \
- hold >>= bits & 7; \
- bits -= bits & 7; \
- } while (0)
+ do { \
+ hold >>= bits & 7; \
+ bits -= bits & 7; \
+ } while (0)
/*
inflate() uses a state machine to process as much input data and generate as
@@ -605,663 +605,663 @@ int ZEXPORT inflate(strm, flush)
z_streamp strm;
int flush;
{
- struct inflate_state FAR *state;
- unsigned char FAR *next; /* next input */
- unsigned char FAR *put; /* next output */
- unsigned have, left; /* available input and output */
- unsigned long hold; /* bit buffer */
- unsigned bits; /* bits in bit buffer */
- unsigned in, out; /* save starting available input and output */
- unsigned copy; /* number of stored or match bytes to copy */
- unsigned char FAR *from; /* where to copy match bytes from */
- code here; /* current decoding table entry */
- code last; /* parent table entry */
- unsigned len; /* length to copy for repeats, bits to drop */
- int ret; /* return code */
+ struct inflate_state FAR *state;
+ unsigned char FAR *next; /* next input */
+ unsigned char FAR *put; /* next output */
+ unsigned have, left; /* available input and output */
+ unsigned long hold; /* bit buffer */
+ unsigned bits; /* bits in bit buffer */
+ unsigned in, out; /* save starting available input and output */
+ unsigned copy; /* number of stored or match bytes to copy */
+ unsigned char FAR *from; /* where to copy match bytes from */
+ code here; /* current decoding table entry */
+ code last; /* parent table entry */
+ unsigned len; /* length to copy for repeats, bits to drop */
+ int ret; /* return code */
#ifdef GUNZIP
- unsigned char hbuf[4]; /* buffer for gzip header crc calculation */
+ unsigned char hbuf[4]; /* buffer for gzip header crc calculation */
#endif
- static const unsigned short order[19] = /* permutation of code lengths */
- {16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
-
- if (strm == Z_NULL || strm->state == Z_NULL || strm->next_out == Z_NULL ||
- (strm->next_in == Z_NULL && strm->avail_in != 0))
- return Z_STREAM_ERROR;
-
- state = (struct inflate_state FAR *)strm->state;
- if (state->mode == TYPE) state->mode = TYPEDO; /* skip check */
- LOAD();
- in = have;
- out = left;
- ret = Z_OK;
- for (;;)
- switch (state->mode) {
- case HEAD:
- if (state->wrap == 0) {
- state->mode = TYPEDO;
- break;
- }
- NEEDBITS(16);
+ static const unsigned short order[19] = /* permutation of code lengths */
+ {16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15};
+
+ if (strm == Z_NULL || strm->state == Z_NULL || strm->next_out == Z_NULL ||
+ (strm->next_in == Z_NULL && strm->avail_in != 0))
+ return Z_STREAM_ERROR;
+
+ state = (struct inflate_state FAR *)strm->state;
+ if (state->mode == TYPE) state->mode = TYPEDO; /* skip check */
+ LOAD();
+ in = have;
+ out = left;
+ ret = Z_OK;
+ for (;;)
+ switch (state->mode) {
+ case HEAD:
+ if (state->wrap == 0) {
+ state->mode = TYPEDO;
+ break;
+ }
+ NEEDBITS(16);
#ifdef GUNZIP
- if ((state->wrap & 2) && hold == 0x8b1f) { /* gzip header */
- state->check = crc32(0L, Z_NULL, 0);
- CRC2(state->check, hold);
- INITBITS();
- state->mode = FLAGS;
- break;
- }
- state->flags = 0; /* expect zlib header */
- if (state->head != Z_NULL)
- state->head->done = -1;
- if (!(state->wrap & 1) || /* check if zlib header allowed */
+ if ((state->wrap & 2) && hold == 0x8b1f) { /* gzip header */
+ state->check = crc32(0L, Z_NULL, 0);
+ CRC2(state->check, hold);
+ INITBITS();
+ state->mode = FLAGS;
+ break;
+ }
+ state->flags = 0; /* expect zlib header */
+ if (state->head != Z_NULL)
+ state->head->done = -1;
+ if (!(state->wrap & 1) || /* check if zlib header allowed */
#else
- if (
+ if (
#endif
- ((BITS(8) << 8) + (hold >> 8)) % 31) {
- strm->msg = (char *)"incorrect header check";
- state->mode = BAD;
- break;
- }
- if (BITS(4) != Z_DEFLATED) {
- strm->msg = (char *)"unknown compression method";
- state->mode = BAD;
- break;
- }
- DROPBITS(4);
- len = BITS(4) + 8;
- if (state->wbits == 0)
- state->wbits = len;
- else if (len > state->wbits) {
- strm->msg = (char *)"invalid window size";
- state->mode = BAD;
- break;
- }
- state->dmax = 1U << len;
- Tracev((stderr, "inflate: zlib header ok\n"));
- strm->adler = state->check = adler32(0L, Z_NULL, 0);
- state->mode = hold & 0x200 ? DICTID : TYPE;
- INITBITS();
- break;
+ ((BITS(8) << 8) + (hold >> 8)) % 31) {
+ strm->msg = (char *)"incorrect header check";
+ state->mode = BAD;
+ break;
+ }
+ if (BITS(4) != Z_DEFLATED) {
+ strm->msg = (char *)"unknown compression method";
+ state->mode = BAD;
+ break;
+ }
+ DROPBITS(4);
+ len = BITS(4) + 8;
+ if (state->wbits == 0)
+ state->wbits = len;
+ else if (len > state->wbits) {
+ strm->msg = (char *)"invalid window size";
+ state->mode = BAD;
+ break;
+ }
+ state->dmax = 1U << len;
+ Tracev((stderr, "inflate: zlib header ok\n"));
+ strm->adler = state->check = adler32(0L, Z_NULL, 0);
+ state->mode = hold & 0x200 ? DICTID : TYPE;
+ INITBITS();
+ break;
#ifdef GUNZIP
- case FLAGS:
- NEEDBITS(16);
- state->flags = (int)(hold);
- if ((state->flags & 0xff) != Z_DEFLATED) {
- strm->msg = (char *)"unknown compression method";
- state->mode = BAD;
- break;
- }
- if (state->flags & 0xe000) {
- strm->msg = (char *)"unknown header flags set";
- state->mode = BAD;
- break;
- }
- if (state->head != Z_NULL)
- state->head->text = (int)((hold >> 8) & 1);
- if (state->flags & 0x0200) CRC2(state->check, hold);
- INITBITS();
- state->mode = TIME;
- case TIME:
- NEEDBITS(32);
- if (state->head != Z_NULL)
- state->head->time = hold;
- if (state->flags & 0x0200) CRC4(state->check, hold);
- INITBITS();
- state->mode = OS;
- case OS:
- NEEDBITS(16);
- if (state->head != Z_NULL) {
- state->head->xflags = (int)(hold & 0xff);
- state->head->os = (int)(hold >> 8);
- }
- if (state->flags & 0x0200) CRC2(state->check, hold);
- INITBITS();
- state->mode = EXLEN;
- case EXLEN:
- if (state->flags & 0x0400) {
- NEEDBITS(16);
- state->length = (unsigned)(hold);
- if (state->head != Z_NULL)
- state->head->extra_len = (unsigned)hold;
- if (state->flags & 0x0200) CRC2(state->check, hold);
- INITBITS();
- }
- else if (state->head != Z_NULL)
- state->head->extra = Z_NULL;
- state->mode = EXTRA;
- case EXTRA:
- if (state->flags & 0x0400) {
- copy = state->length;
- if (copy > have) copy = have;
- if (copy) {
- if (state->head != Z_NULL &&
- state->head->extra != Z_NULL) {
- len = state->head->extra_len - state->length;
- zmemcpy(state->head->extra + len, next,
- len + copy > state->head->extra_max ?
- state->head->extra_max - len : copy);
- }
- if (state->flags & 0x0200)
- state->check = crc32(state->check, next, copy);
- have -= copy;
- next += copy;
- state->length -= copy;
- }
- if (state->length) goto inf_leave;
- }
- state->length = 0;
- state->mode = NAME;
- case NAME:
- if (state->flags & 0x0800) {
- if (have == 0) goto inf_leave;
- copy = 0;
- do {
- len = (unsigned)(next[copy++]);
- if (state->head != Z_NULL &&
- state->head->name != Z_NULL &&
- state->length < state->head->name_max)
- state->head->name[state->length++] = len;
- } while (len && copy < have);
- if (state->flags & 0x0200)
- state->check = crc32(state->check, next, copy);
- have -= copy;
- next += copy;
- if (len) goto inf_leave;
- }
- else if (state->head != Z_NULL)
- state->head->name = Z_NULL;
- state->length = 0;
- state->mode = COMMENT;
- case COMMENT:
- if (state->flags & 0x1000) {
- if (have == 0) goto inf_leave;
- copy = 0;
- do {
- len = (unsigned)(next[copy++]);
- if (state->head != Z_NULL &&
- state->head->comment != Z_NULL &&
- state->length < state->head->comm_max)
- state->head->comment[state->length++] = len;
- } while (len && copy < have);
- if (state->flags & 0x0200)
- state->check = crc32(state->check, next, copy);
- have -= copy;
- next += copy;
- if (len) goto inf_leave;
- }
- else if (state->head != Z_NULL)
- state->head->comment = Z_NULL;
- state->mode = HCRC;
- case HCRC:
- if (state->flags & 0x0200) {
- NEEDBITS(16);
- if (hold != (state->check & 0xffff)) {
- strm->msg = (char *)"header crc mismatch";
- state->mode = BAD;
- break;
- }
- INITBITS();
- }
- if (state->head != Z_NULL) {
- state->head->hcrc = (int)((state->flags >> 9) & 1);
- state->head->done = 1;
- }
- strm->adler = state->check = crc32(0L, Z_NULL, 0);
- state->mode = TYPE;
- break;
+ case FLAGS:
+ NEEDBITS(16);
+ state->flags = (int)(hold);
+ if ((state->flags & 0xff) != Z_DEFLATED) {
+ strm->msg = (char *)"unknown compression method";
+ state->mode = BAD;
+ break;
+ }
+ if (state->flags & 0xe000) {
+ strm->msg = (char *)"unknown header flags set";
+ state->mode = BAD;
+ break;
+ }
+ if (state->head != Z_NULL)
+ state->head->text = (int)((hold >> 8) & 1);
+ if (state->flags & 0x0200) CRC2(state->check, hold);
+ INITBITS();
+ state->mode = TIME;
+ case TIME:
+ NEEDBITS(32);
+ if (state->head != Z_NULL)
+ state->head->time = hold;
+ if (state->flags & 0x0200) CRC4(state->check, hold);
+ INITBITS();
+ state->mode = OS;
+ case OS:
+ NEEDBITS(16);
+ if (state->head != Z_NULL) {
+ state->head->xflags = (int)(hold & 0xff);
+ state->head->os = (int)(hold >> 8);
+ }
+ if (state->flags & 0x0200) CRC2(state->check, hold);
+ INITBITS();
+ state->mode = EXLEN;
+ case EXLEN:
+ if (state->flags & 0x0400) {
+ NEEDBITS(16);
+ state->length = (unsigned)(hold);
+ if (state->head != Z_NULL)
+ state->head->extra_len = (unsigned)hold;
+ if (state->flags & 0x0200) CRC2(state->check, hold);
+ INITBITS();
+ }
+ else if (state->head != Z_NULL)
+ state->head->extra = Z_NULL;
+ state->mode = EXTRA;
+ case EXTRA:
+ if (state->flags & 0x0400) {
+ copy = state->length;
+ if (copy > have) copy = have;
+ if (copy) {
+ if (state->head != Z_NULL &&
+ state->head->extra != Z_NULL) {
+ len = state->head->extra_len - state->length;
+ zmemcpy(state->head->extra + len, next,
+ len + copy > state->head->extra_max ?
+ state->head->extra_max - len : copy);
+ }
+ if (state->flags & 0x0200)
+ state->check = crc32(state->check, next, copy);
+ have -= copy;
+ next += copy;
+ state->length -= copy;
+ }
+ if (state->length) goto inf_leave;
+ }
+ state->length = 0;
+ state->mode = NAME;
+ case NAME:
+ if (state->flags & 0x0800) {
+ if (have == 0) goto inf_leave;
+ copy = 0;
+ do {
+ len = (unsigned)(next[copy++]);
+ if (state->head != Z_NULL &&
+ state->head->name != Z_NULL &&
+ state->length < state->head->name_max)
+ state->head->name[state->length++] = len;
+ } while (len && copy < have);
+ if (state->flags & 0x0200)
+ state->check = crc32(state->check, next, copy);
+ have -= copy;
+ next += copy;
+ if (len) goto inf_leave;
+ }
+ else if (state->head != Z_NULL)
+ state->head->name = Z_NULL;
+ state->length = 0;
+ state->mode = COMMENT;
+ case COMMENT:
+ if (state->flags & 0x1000) {
+ if (have == 0) goto inf_leave;
+ copy = 0;
+ do {
+ len = (unsigned)(next[copy++]);
+ if (state->head != Z_NULL &&
+ state->head->comment != Z_NULL &&
+ state->length < state->head->comm_max)
+ state->head->comment[state->length++] = len;
+ } while (len && copy < have);
+ if (state->flags & 0x0200)
+ state->check = crc32(state->check, next, copy);
+ have -= copy;
+ next += copy;
+ if (len) goto inf_leave;
+ }
+ else if (state->head != Z_NULL)
+ state->head->comment = Z_NULL;
+ state->mode = HCRC;
+ case HCRC:
+ if (state->flags & 0x0200) {
+ NEEDBITS(16);
+ if (hold != (state->check & 0xffff)) {
+ strm->msg = (char *)"header crc mismatch";
+ state->mode = BAD;
+ break;
+ }
+ INITBITS();
+ }
+ if (state->head != Z_NULL) {
+ state->head->hcrc = (int)((state->flags >> 9) & 1);
+ state->head->done = 1;
+ }
+ strm->adler = state->check = crc32(0L, Z_NULL, 0);
+ state->mode = TYPE;
+ break;
#endif
- case DICTID:
- NEEDBITS(32);
- strm->adler = state->check = ZSWAP32(hold);
- INITBITS();
- state->mode = DICT;
- case DICT:
- if (state->havedict == 0) {
- RESTORE();
- return Z_NEED_DICT;
- }
- strm->adler = state->check = adler32(0L, Z_NULL, 0);
- state->mode = TYPE;
- case TYPE:
- if (flush == Z_BLOCK || flush == Z_TREES) goto inf_leave;
- case TYPEDO:
- if (state->last) {
- BYTEBITS();
- state->mode = CHECK;
- break;
- }
- NEEDBITS(3);
- state->last = BITS(1);
- DROPBITS(1);
- switch (BITS(2)) {
- case 0: /* stored block */
- Tracev((stderr, "inflate: stored block%s\n",
- state->last ? " (last)" : ""));
- state->mode = STORED;
- break;
- case 1: /* fixed block */
- fixedtables(state);
- Tracev((stderr, "inflate: fixed codes block%s\n",
- state->last ? " (last)" : ""));
- state->mode = LEN_; /* decode codes */
- if (flush == Z_TREES) {
- DROPBITS(2);
- goto inf_leave;
- }
- break;
- case 2: /* dynamic block */
- Tracev((stderr, "inflate: dynamic codes block%s\n",
- state->last ? " (last)" : ""));
- state->mode = TABLE;
- break;
- case 3:
- strm->msg = (char *)"invalid block type";
- state->mode = BAD;
- }
- DROPBITS(2);
- break;
- case STORED:
- BYTEBITS(); /* go to byte boundary */
- NEEDBITS(32);
- if ((hold & 0xffff) != ((hold >> 16) ^ 0xffff)) {
- strm->msg = (char *)"invalid stored block lengths";
- state->mode = BAD;
- break;
- }
- state->length = (unsigned)hold & 0xffff;
- Tracev((stderr, "inflate: stored length %u\n",
- state->length));
- INITBITS();
- state->mode = COPY_;
- if (flush == Z_TREES) goto inf_leave;
- case COPY_:
- state->mode = COPY;
- case COPY:
- copy = state->length;
- if (copy) {
- if (copy > have) copy = have;
- if (copy > left) copy = left;
- if (copy == 0) goto inf_leave;
- zmemcpy(put, next, copy);
- have -= copy;
- next += copy;
- left -= copy;
- put += copy;
- state->length -= copy;
- break;
- }
- Tracev((stderr, "inflate: stored end\n"));
- state->mode = TYPE;
- break;
- case TABLE:
- NEEDBITS(14);
- state->nlen = BITS(5) + 257;
- DROPBITS(5);
- state->ndist = BITS(5) + 1;
- DROPBITS(5);
- state->ncode = BITS(4) + 4;
- DROPBITS(4);
+ case DICTID:
+ NEEDBITS(32);
+ strm->adler = state->check = ZSWAP32(hold);
+ INITBITS();
+ state->mode = DICT;
+ case DICT:
+ if (state->havedict == 0) {
+ RESTORE();
+ return Z_NEED_DICT;
+ }
+ strm->adler = state->check = adler32(0L, Z_NULL, 0);
+ state->mode = TYPE;
+ case TYPE:
+ if (flush == Z_BLOCK || flush == Z_TREES) goto inf_leave;
+ case TYPEDO:
+ if (state->last) {
+ BYTEBITS();
+ state->mode = CHECK;
+ break;
+ }
+ NEEDBITS(3);
+ state->last = BITS(1);
+ DROPBITS(1);
+ switch (BITS(2)) {
+ case 0: /* stored block */
+ Tracev((stderr, "inflate: stored block%s\n",
+ state->last ? " (last)" : ""));
+ state->mode = STORED;
+ break;
+ case 1: /* fixed block */
+ fixedtables(state);
+ Tracev((stderr, "inflate: fixed codes block%s\n",
+ state->last ? " (last)" : ""));
+ state->mode = LEN_; /* decode codes */
+ if (flush == Z_TREES) {
+ DROPBITS(2);
+ goto inf_leave;
+ }
+ break;
+ case 2: /* dynamic block */
+ Tracev((stderr, "inflate: dynamic codes block%s\n",
+ state->last ? " (last)" : ""));
+ state->mode = TABLE;
+ break;
+ case 3:
+ strm->msg = (char *)"invalid block type";
+ state->mode = BAD;
+ }
+ DROPBITS(2);
+ break;
+ case STORED:
+ BYTEBITS(); /* go to byte boundary */
+ NEEDBITS(32);
+ if ((hold & 0xffff) != ((hold >> 16) ^ 0xffff)) {
+ strm->msg = (char *)"invalid stored block lengths";
+ state->mode = BAD;
+ break;
+ }
+ state->length = (unsigned)hold & 0xffff;
+ Tracev((stderr, "inflate: stored length %u\n",
+ state->length));
+ INITBITS();
+ state->mode = COPY_;
+ if (flush == Z_TREES) goto inf_leave;
+ case COPY_:
+ state->mode = COPY;
+ case COPY:
+ copy = state->length;
+ if (copy) {
+ if (copy > have) copy = have;
+ if (copy > left) copy = left;
+ if (copy == 0) goto inf_leave;
+ zmemcpy(put, next, copy);
+ have -= copy;
+ next += copy;
+ left -= copy;
+ put += copy;
+ state->length -= copy;
+ break;
+ }
+ Tracev((stderr, "inflate: stored end\n"));
+ state->mode = TYPE;
+ break;
+ case TABLE:
+ NEEDBITS(14);
+ state->nlen = BITS(5) + 257;
+ DROPBITS(5);
+ state->ndist = BITS(5) + 1;
+ DROPBITS(5);
+ state->ncode = BITS(4) + 4;
+ DROPBITS(4);
#ifndef PKZIP_BUG_WORKAROUND
- if (state->nlen > 286 || state->ndist > 30) {
- strm->msg = (char *)"too many length or distance symbols";
- state->mode = BAD;
- break;
- }
+ if (state->nlen > 286 || state->ndist > 30) {
+ strm->msg = (char *)"too many length or distance symbols";
+ state->mode = BAD;
+ break;
+ }
#endif
- Tracev((stderr, "inflate: table sizes ok\n"));
- state->have = 0;
- state->mode = LENLENS;
- case LENLENS:
- while (state->have < state->ncode) {
- NEEDBITS(3);
- state->lens[order[state->have++]] = (unsigned short)BITS(3);
- DROPBITS(3);
- }
- while (state->have < 19)
- state->lens[order[state->have++]] = 0;
- state->next = state->codes;
- state->lencode = (code const FAR *)(state->next);
- state->lenbits = 7;
- ret = inflate_table(CODES, state->lens, 19, &(state->next),
- &(state->lenbits), state->work);
- if (ret) {
- strm->msg = (char *)"invalid code lengths set";
- state->mode = BAD;
- break;
- }
- Tracev((stderr, "inflate: code lengths ok\n"));
- state->have = 0;
- state->mode = CODELENS;
- case CODELENS:
- while (state->have < state->nlen + state->ndist) {
- for (;;) {
- here = state->lencode[BITS(state->lenbits)];
- if ((unsigned)(here.bits) <= bits) break;
- PULLBYTE();
- }
- if (here.val < 16) {
- DROPBITS(here.bits);
- state->lens[state->have++] = here.val;
- }
- else {
- if (here.val == 16) {
- NEEDBITS(here.bits + 2);
- DROPBITS(here.bits);
- if (state->have == 0) {
- strm->msg = (char *)"invalid bit length repeat";
- state->mode = BAD;
- break;
- }
- len = state->lens[state->have - 1];
- copy = 3 + BITS(2);
- DROPBITS(2);
- }
- else if (here.val == 17) {
- NEEDBITS(here.bits + 3);
- DROPBITS(here.bits);
- len = 0;
- copy = 3 + BITS(3);
- DROPBITS(3);
- }
- else {
- NEEDBITS(here.bits + 7);
- DROPBITS(here.bits);
- len = 0;
- copy = 11 + BITS(7);
- DROPBITS(7);
- }
- if (state->have + copy > state->nlen + state->ndist) {
- strm->msg = (char *)"invalid bit length repeat";
- state->mode = BAD;
- break;
- }
- while (copy--)
- state->lens[state->have++] = (unsigned short)len;
- }
- }
-
- /* handle error breaks in while */
- if (state->mode == BAD) break;
-
- /* check for end-of-block code (better have one) */
- if (state->lens[256] == 0) {
- strm->msg = (char *)"invalid code -- missing end-of-block";
- state->mode = BAD;
- break;
- }
-
- /* build code tables -- note: do not change the lenbits or distbits
- values here (9 and 6) without reading the comments in inftrees.h
- concerning the ENOUGH constants, which depend on those values */
- state->next = state->codes;
- state->lencode = (code const FAR *)(state->next);
- state->lenbits = 9;
- ret = inflate_table(LENS, state->lens, state->nlen, &(state->next),
- &(state->lenbits), state->work);
- if (ret) {
- strm->msg = (char *)"invalid literal/lengths set";
- state->mode = BAD;
- break;
- }
- state->distcode = (code const FAR *)(state->next);
- state->distbits = 6;
- ret = inflate_table(DISTS, state->lens + state->nlen, state->ndist,
- &(state->next), &(state->distbits), state->work);
- if (ret) {
- strm->msg = (char *)"invalid distances set";
- state->mode = BAD;
- break;
- }
- Tracev((stderr, "inflate: codes ok\n"));
- state->mode = LEN_;
- if (flush == Z_TREES) goto inf_leave;
- case LEN_:
- state->mode = LEN;
- case LEN:
- if (have >= 6 && left >= 258) {
- RESTORE();
- inflate_fast(strm, out);
- LOAD();
- if (state->mode == TYPE)
- state->back = -1;
- break;
- }
- state->back = 0;
- for (;;) {
- here = state->lencode[BITS(state->lenbits)];
- if ((unsigned)(here.bits) <= bits) break;
- PULLBYTE();
- }
- if (here.op && (here.op & 0xf0) == 0) {
- last = here;
- for (;;) {
- here = state->lencode[last.val +
- (BITS(last.bits + last.op) >> last.bits)];
- if ((unsigned)(last.bits + here.bits) <= bits) break;
- PULLBYTE();
- }
- DROPBITS(last.bits);
- state->back += last.bits;
- }
- DROPBITS(here.bits);
- state->back += here.bits;
- state->length = (unsigned)here.val;
- if ((int)(here.op) == 0) {
- Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
- "inflate: literal '%c'\n" :
- "inflate: literal 0x%02x\n", here.val));
- state->mode = LIT;
- break;
- }
- if (here.op & 32) {
- Tracevv((stderr, "inflate: end of block\n"));
- state->back = -1;
- state->mode = TYPE;
- break;
- }
- if (here.op & 64) {
- strm->msg = (char *)"invalid literal/length code";
- state->mode = BAD;
- break;
- }
- state->extra = (unsigned)(here.op) & 15;
- state->mode = LENEXT;
- case LENEXT:
- if (state->extra) {
- NEEDBITS(state->extra);
- state->length += BITS(state->extra);
- DROPBITS(state->extra);
- state->back += state->extra;
- }
- Tracevv((stderr, "inflate: length %u\n", state->length));
- state->was = state->length;
- state->mode = DIST;
- case DIST:
- for (;;) {
- here = state->distcode[BITS(state->distbits)];
- if ((unsigned)(here.bits) <= bits) break;
- PULLBYTE();
- }
- if ((here.op & 0xf0) == 0) {
- last = here;
- for (;;) {
- here = state->distcode[last.val +
- (BITS(last.bits + last.op) >> last.bits)];
- if ((unsigned)(last.bits + here.bits) <= bits) break;
- PULLBYTE();
- }
- DROPBITS(last.bits);
- state->back += last.bits;
- }
- DROPBITS(here.bits);
- state->back += here.bits;
- if (here.op & 64) {
- strm->msg = (char *)"invalid distance code";
- state->mode = BAD;
- break;
- }
- state->offset = (unsigned)here.val;
- state->extra = (unsigned)(here.op) & 15;
- state->mode = DISTEXT;
- case DISTEXT:
- if (state->extra) {
- NEEDBITS(state->extra);
- state->offset += BITS(state->extra);
- DROPBITS(state->extra);
- state->back += state->extra;
- }
+ Tracev((stderr, "inflate: table sizes ok\n"));
+ state->have = 0;
+ state->mode = LENLENS;
+ case LENLENS:
+ while (state->have < state->ncode) {
+ NEEDBITS(3);
+ state->lens[order[state->have++]] = (unsigned short)BITS(3);
+ DROPBITS(3);
+ }
+ while (state->have < 19)
+ state->lens[order[state->have++]] = 0;
+ state->next = state->codes;
+ state->lencode = (code const FAR *)(state->next);
+ state->lenbits = 7;
+ ret = inflate_table(CODES, state->lens, 19, &(state->next),
+ &(state->lenbits), state->work);
+ if (ret) {
+ strm->msg = (char *)"invalid code lengths set";
+ state->mode = BAD;
+ break;
+ }
+ Tracev((stderr, "inflate: code lengths ok\n"));
+ state->have = 0;
+ state->mode = CODELENS;
+ case CODELENS:
+ while (state->have < state->nlen + state->ndist) {
+ for (;;) {
+ here = state->lencode[BITS(state->lenbits)];
+ if ((unsigned)(here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ if (here.val < 16) {
+ DROPBITS(here.bits);
+ state->lens[state->have++] = here.val;
+ }
+ else {
+ if (here.val == 16) {
+ NEEDBITS(here.bits + 2);
+ DROPBITS(here.bits);
+ if (state->have == 0) {
+ strm->msg = (char *)"invalid bit length repeat";
+ state->mode = BAD;
+ break;
+ }
+ len = state->lens[state->have - 1];
+ copy = 3 + BITS(2);
+ DROPBITS(2);
+ }
+ else if (here.val == 17) {
+ NEEDBITS(here.bits + 3);
+ DROPBITS(here.bits);
+ len = 0;
+ copy = 3 + BITS(3);
+ DROPBITS(3);
+ }
+ else {
+ NEEDBITS(here.bits + 7);
+ DROPBITS(here.bits);
+ len = 0;
+ copy = 11 + BITS(7);
+ DROPBITS(7);
+ }
+ if (state->have + copy > state->nlen + state->ndist) {
+ strm->msg = (char *)"invalid bit length repeat";
+ state->mode = BAD;
+ break;
+ }
+ while (copy--)
+ state->lens[state->have++] = (unsigned short)len;
+ }
+ }
+
+ /* handle error breaks in while */
+ if (state->mode == BAD) break;
+
+ /* check for end-of-block code (better have one) */
+ if (state->lens[256] == 0) {
+ strm->msg = (char *)"invalid code -- missing end-of-block";
+ state->mode = BAD;
+ break;
+ }
+
+ /* build code tables -- note: do not change the lenbits or distbits
+ values here (9 and 6) without reading the comments in inftrees.h
+ concerning the ENOUGH constants, which depend on those values */
+ state->next = state->codes;
+ state->lencode = (code const FAR *)(state->next);
+ state->lenbits = 9;
+ ret = inflate_table(LENS, state->lens, state->nlen, &(state->next),
+ &(state->lenbits), state->work);
+ if (ret) {
+ strm->msg = (char *)"invalid literal/lengths set";
+ state->mode = BAD;
+ break;
+ }
+ state->distcode = (code const FAR *)(state->next);
+ state->distbits = 6;
+ ret = inflate_table(DISTS, state->lens + state->nlen, state->ndist,
+ &(state->next), &(state->distbits), state->work);
+ if (ret) {
+ strm->msg = (char *)"invalid distances set";
+ state->mode = BAD;
+ break;
+ }
+ Tracev((stderr, "inflate: codes ok\n"));
+ state->mode = LEN_;
+ if (flush == Z_TREES) goto inf_leave;
+ case LEN_:
+ state->mode = LEN;
+ case LEN:
+ if (have >= 6 && left >= 258) {
+ RESTORE();
+ inflate_fast(strm, out);
+ LOAD();
+ if (state->mode == TYPE)
+ state->back = -1;
+ break;
+ }
+ state->back = 0;
+ for (;;) {
+ here = state->lencode[BITS(state->lenbits)];
+ if ((unsigned)(here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ if (here.op && (here.op & 0xf0) == 0) {
+ last = here;
+ for (;;) {
+ here = state->lencode[last.val +
+ (BITS(last.bits + last.op) >> last.bits)];
+ if ((unsigned)(last.bits + here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ DROPBITS(last.bits);
+ state->back += last.bits;
+ }
+ DROPBITS(here.bits);
+ state->back += here.bits;
+ state->length = (unsigned)here.val;
+ if ((int)(here.op) == 0) {
+ Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
+ "inflate: literal '%c'\n" :
+ "inflate: literal 0x%02x\n", here.val));
+ state->mode = LIT;
+ break;
+ }
+ if (here.op & 32) {
+ Tracevv((stderr, "inflate: end of block\n"));
+ state->back = -1;
+ state->mode = TYPE;
+ break;
+ }
+ if (here.op & 64) {
+ strm->msg = (char *)"invalid literal/length code";
+ state->mode = BAD;
+ break;
+ }
+ state->extra = (unsigned)(here.op) & 15;
+ state->mode = LENEXT;
+ case LENEXT:
+ if (state->extra) {
+ NEEDBITS(state->extra);
+ state->length += BITS(state->extra);
+ DROPBITS(state->extra);
+ state->back += state->extra;
+ }
+ Tracevv((stderr, "inflate: length %u\n", state->length));
+ state->was = state->length;
+ state->mode = DIST;
+ case DIST:
+ for (;;) {
+ here = state->distcode[BITS(state->distbits)];
+ if ((unsigned)(here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ if ((here.op & 0xf0) == 0) {
+ last = here;
+ for (;;) {
+ here = state->distcode[last.val +
+ (BITS(last.bits + last.op) >> last.bits)];
+ if ((unsigned)(last.bits + here.bits) <= bits) break;
+ PULLBYTE();
+ }
+ DROPBITS(last.bits);
+ state->back += last.bits;
+ }
+ DROPBITS(here.bits);
+ state->back += here.bits;
+ if (here.op & 64) {
+ strm->msg = (char *)"invalid distance code";
+ state->mode = BAD;
+ break;
+ }
+ state->offset = (unsigned)here.val;
+ state->extra = (unsigned)(here.op) & 15;
+ state->mode = DISTEXT;
+ case DISTEXT:
+ if (state->extra) {
+ NEEDBITS(state->extra);
+ state->offset += BITS(state->extra);
+ DROPBITS(state->extra);
+ state->back += state->extra;
+ }
#ifdef INFLATE_STRICT
- if (state->offset > state->dmax) {
- strm->msg = (char *)"invalid distance too far back";
- state->mode = BAD;
- break;
- }
+ if (state->offset > state->dmax) {
+ strm->msg = (char *)"invalid distance too far back";
+ state->mode = BAD;
+ break;
+ }
#endif
- Tracevv((stderr, "inflate: distance %u\n", state->offset));
- state->mode = MATCH;
- case MATCH:
- if (left == 0) goto inf_leave;
- copy = out - left;
- if (state->offset > copy) { /* copy from window */
- copy = state->offset - copy;
- if (copy > state->whave) {
- if (state->sane) {
- strm->msg = (char *)"invalid distance too far back";
- state->mode = BAD;
- break;
- }
+ Tracevv((stderr, "inflate: distance %u\n", state->offset));
+ state->mode = MATCH;
+ case MATCH:
+ if (left == 0) goto inf_leave;
+ copy = out - left;
+ if (state->offset > copy) { /* copy from window */
+ copy = state->offset - copy;
+ if (copy > state->whave) {
+ if (state->sane) {
+ strm->msg = (char *)"invalid distance too far back";
+ state->mode = BAD;
+ break;
+ }
#ifdef INFLATE_ALLOW_INVALID_DISTANCE_TOOFAR_ARRR
- Trace((stderr, "inflate.c too far\n"));
- copy -= state->whave;
- if (copy > state->length) copy = state->length;
- if (copy > left) copy = left;
- left -= copy;
- state->length -= copy;
- do {
- *put++ = 0;
- } while (--copy);
- if (state->length == 0) state->mode = LEN;
- break;
+ Trace((stderr, "inflate.c too far\n"));
+ copy -= state->whave;
+ if (copy > state->length) copy = state->length;
+ if (copy > left) copy = left;
+ left -= copy;
+ state->length -= copy;
+ do {
+ *put++ = 0;
+ } while (--copy);
+ if (state->length == 0) state->mode = LEN;
+ break;
#endif
- }
- if (copy > state->wnext) {
- copy -= state->wnext;
- from = state->window + (state->wsize - copy);
- }
- else
- from = state->window + (state->wnext - copy);
- if (copy > state->length) copy = state->length;
- }
- else { /* copy from output */
- from = put - state->offset;
- copy = state->length;
- }
- if (copy > left) copy = left;
- left -= copy;
- state->length -= copy;
- do {
- *put++ = *from++;
- } while (--copy);
- if (state->length == 0) state->mode = LEN;
- break;
- case LIT:
- if (left == 0) goto inf_leave;
- *put++ = (unsigned char)(state->length);
- left--;
- state->mode = LEN;
- break;
- case CHECK:
- if (state->wrap) {
- NEEDBITS(32);
- out -= left;
- strm->total_out += out;
- state->total += out;
- if (out)
- strm->adler = state->check =
- UPDATE(state->check, put - out, out);
- out = left;
- if ((
+ }
+ if (copy > state->wnext) {
+ copy -= state->wnext;
+ from = state->window + (state->wsize - copy);
+ }
+ else
+ from = state->window + (state->wnext - copy);
+ if (copy > state->length) copy = state->length;
+ }
+ else { /* copy from output */
+ from = put - state->offset;
+ copy = state->length;
+ }
+ if (copy > left) copy = left;
+ left -= copy;
+ state->length -= copy;
+ do {
+ *put++ = *from++;
+ } while (--copy);
+ if (state->length == 0) state->mode = LEN;
+ break;
+ case LIT:
+ if (left == 0) goto inf_leave;
+ *put++ = (unsigned char)(state->length);
+ left--;
+ state->mode = LEN;
+ break;
+ case CHECK:
+ if (state->wrap) {
+ NEEDBITS(32);
+ out -= left;
+ strm->total_out += out;
+ state->total += out;
+ if (out)
+ strm->adler = state->check =
+ UPDATE(state->check, put - out, out);
+ out = left;
+ if ((
#ifdef GUNZIP
- state->flags ? hold :
+ state->flags ? hold :
#endif
- ZSWAP32(hold)) != state->check) {
- strm->msg = (char *)"incorrect data check";
- state->mode = BAD;
- break;
- }
- INITBITS();
- Tracev((stderr, "inflate: check matches trailer\n"));
- }
+ ZSWAP32(hold)) != state->check) {
+ strm->msg = (char *)"incorrect data check";
+ state->mode = BAD;
+ break;
+ }
+ INITBITS();
+ Tracev((stderr, "inflate: check matches trailer\n"));
+ }
#ifdef GUNZIP
- state->mode = LENGTH;
- case LENGTH:
- if (state->wrap && state->flags) {
- NEEDBITS(32);
- if (hold != (state->total & 0xffffffffUL)) {
- strm->msg = (char *)"incorrect length check";
- state->mode = BAD;
- break;
- }
- INITBITS();
- Tracev((stderr, "inflate: length matches trailer\n"));
- }
+ state->mode = LENGTH;
+ case LENGTH:
+ if (state->wrap && state->flags) {
+ NEEDBITS(32);
+ if (hold != (state->total & 0xffffffffUL)) {
+ strm->msg = (char *)"incorrect length check";
+ state->mode = BAD;
+ break;
+ }
+ INITBITS();
+ Tracev((stderr, "inflate: length matches trailer\n"));
+ }
#endif
- state->mode = DONE;
- case DONE:
- ret = Z_STREAM_END;
- goto inf_leave;
- case BAD:
- ret = Z_DATA_ERROR;
- goto inf_leave;
- case MEM:
- return Z_MEM_ERROR;
- case SYNC:
- default:
- return Z_STREAM_ERROR;
- }
-
- /*
- Return from inflate(), updating the total counts and the check value.
- If there was no progress during the inflate() call, return a buffer
- error. Call updatewindow() to create and/or update the window state.
- Note: a memory error from inflate() is non-recoverable.
- */
- inf_leave:
- RESTORE();
- if (state->wsize || (out != strm->avail_out && state->mode < BAD &&
- (state->mode < CHECK || flush != Z_FINISH)))
- if (updatewindow(strm, out)) {
- state->mode = MEM;
- return Z_MEM_ERROR;
- }
- in -= strm->avail_in;
- out -= strm->avail_out;
- strm->total_in += in;
- strm->total_out += out;
- state->total += out;
- if (state->wrap && out)
- strm->adler = state->check =
- UPDATE(state->check, strm->next_out - out, out);
- strm->data_type = state->bits + (state->last ? 64 : 0) +
- (state->mode == TYPE ? 128 : 0) +
- (state->mode == LEN_ || state->mode == COPY_ ? 256 : 0);
- if (((in == 0 && out == 0) || flush == Z_FINISH) && ret == Z_OK)
- ret = Z_BUF_ERROR;
- return ret;
+ state->mode = DONE;
+ case DONE:
+ ret = Z_STREAM_END;
+ goto inf_leave;
+ case BAD:
+ ret = Z_DATA_ERROR;
+ goto inf_leave;
+ case MEM:
+ return Z_MEM_ERROR;
+ case SYNC:
+ default:
+ return Z_STREAM_ERROR;
+ }
+
+ /*
+ Return from inflate(), updating the total counts and the check value.
+ If there was no progress during the inflate() call, return a buffer
+ error. Call updatewindow() to create and/or update the window state.
+ Note: a memory error from inflate() is non-recoverable.
+ */
+ inf_leave:
+ RESTORE();
+ if (state->wsize || (out != strm->avail_out && state->mode < BAD &&
+ (state->mode < CHECK || flush != Z_FINISH)))
+ if (updatewindow(strm, out)) {
+ state->mode = MEM;
+ return Z_MEM_ERROR;
+ }
+ in -= strm->avail_in;
+ out -= strm->avail_out;
+ strm->total_in += in;
+ strm->total_out += out;
+ state->total += out;
+ if (state->wrap && out)
+ strm->adler = state->check =
+ UPDATE(state->check, strm->next_out - out, out);
+ strm->data_type = state->bits + (state->last ? 64 : 0) +
+ (state->mode == TYPE ? 128 : 0) +
+ (state->mode == LEN_ || state->mode == COPY_ ? 256 : 0);
+ if (((in == 0 && out == 0) || flush == Z_FINISH) && ret == Z_OK)
+ ret = Z_BUF_ERROR;
+ return ret;
}
int ZEXPORT inflateEnd(strm)
z_streamp strm;
{
- struct inflate_state FAR *state;
- if (strm == Z_NULL || strm->state == Z_NULL || strm->zfree == (free_func)0)
- return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- if (state->window != Z_NULL) ZFREE(strm, state->window);
- ZFREE(strm, strm->state);
- strm->state = Z_NULL;
- Tracev((stderr, "inflate: end\n"));
- return Z_OK;
+ struct inflate_state FAR *state;
+ if (strm == Z_NULL || strm->state == Z_NULL || strm->zfree == (free_func)0)
+ return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ if (state->window != Z_NULL) ZFREE(strm, state->window);
+ ZFREE(strm, strm->state);
+ strm->state = Z_NULL;
+ Tracev((stderr, "inflate: end\n"));
+ return Z_OK;
}
int ZEXPORT inflateSetDictionary(strm, dictionary, dictLength)
@@ -1269,59 +1269,59 @@ z_streamp strm;
const Bytef *dictionary;
uInt dictLength;
{
- struct inflate_state FAR *state;
- unsigned long dictid;
- unsigned char *next;
- unsigned avail;
- int ret;
-
- /* check state */
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- if (state->wrap != 0 && state->mode != DICT)
- return Z_STREAM_ERROR;
-
- /* check for correct dictionary identifier */
- if (state->mode == DICT) {
- dictid = adler32(0L, Z_NULL, 0);
- dictid = adler32(dictid, dictionary, dictLength);
- if (dictid != state->check)
- return Z_DATA_ERROR;
- }
-
- /* copy dictionary to window using updatewindow(), which will amend the
- existing dictionary if appropriate */
- next = strm->next_out;
- avail = strm->avail_out;
- strm->next_out = (Bytef *)dictionary + dictLength;
- strm->avail_out = 0;
- ret = updatewindow(strm, dictLength);
- strm->avail_out = avail;
- strm->next_out = next;
- if (ret) {
- state->mode = MEM;
- return Z_MEM_ERROR;
- }
- state->havedict = 1;
- Tracev((stderr, "inflate: dictionary set\n"));
- return Z_OK;
+ struct inflate_state FAR *state;
+ unsigned long dictid;
+ unsigned char *next;
+ unsigned avail;
+ int ret;
+
+ /* check state */
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ if (state->wrap != 0 && state->mode != DICT)
+ return Z_STREAM_ERROR;
+
+ /* check for correct dictionary identifier */
+ if (state->mode == DICT) {
+ dictid = adler32(0L, Z_NULL, 0);
+ dictid = adler32(dictid, dictionary, dictLength);
+ if (dictid != state->check)
+ return Z_DATA_ERROR;
+ }
+
+ /* copy dictionary to window using updatewindow(), which will amend the
+ existing dictionary if appropriate */
+ next = strm->next_out;
+ avail = strm->avail_out;
+ strm->next_out = (Bytef *)dictionary + dictLength;
+ strm->avail_out = 0;
+ ret = updatewindow(strm, dictLength);
+ strm->avail_out = avail;
+ strm->next_out = next;
+ if (ret) {
+ state->mode = MEM;
+ return Z_MEM_ERROR;
+ }
+ state->havedict = 1;
+ Tracev((stderr, "inflate: dictionary set\n"));
+ return Z_OK;
}
int ZEXPORT inflateGetHeader(strm, head)
z_streamp strm;
gz_headerp head;
{
- struct inflate_state FAR *state;
+ struct inflate_state FAR *state;
- /* check state */
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- if ((state->wrap & 2) == 0) return Z_STREAM_ERROR;
+ /* check state */
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ if ((state->wrap & 2) == 0) return Z_STREAM_ERROR;
- /* save header structure */
- state->head = head;
- head->done = 0;
- return Z_OK;
+ /* save header structure */
+ state->head = head;
+ head->done = 0;
+ return Z_OK;
}
/*
@@ -1340,65 +1340,65 @@ unsigned FAR *have;
unsigned char FAR *buf;
unsigned len;
{
- unsigned got;
- unsigned next;
-
- got = *have;
- next = 0;
- while (next < len && got < 4) {
- if ((int)(buf[next]) == (got < 2 ? 0 : 0xff))
- got++;
- else if (buf[next])
- got = 0;
- else
- got = 4 - got;
- next++;
- }
- *have = got;
- return next;
+ unsigned got;
+ unsigned next;
+
+ got = *have;
+ next = 0;
+ while (next < len && got < 4) {
+ if ((int)(buf[next]) == (got < 2 ? 0 : 0xff))
+ got++;
+ else if (buf[next])
+ got = 0;
+ else
+ got = 4 - got;
+ next++;
+ }
+ *have = got;
+ return next;
}
int ZEXPORT inflateSync(strm)
z_streamp strm;
{
- unsigned len; /* number of bytes to look at or looked at */
- unsigned long in, out; /* temporary to save total_in and total_out */
- unsigned char buf[4]; /* to restore bit buffer to byte string */
- struct inflate_state FAR *state;
-
- /* check parameters */
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- if (strm->avail_in == 0 && state->bits < 8) return Z_BUF_ERROR;
-
- /* if first time, start search in bit buffer */
- if (state->mode != SYNC) {
- state->mode = SYNC;
- state->hold <<= state->bits & 7;
- state->bits -= state->bits & 7;
- len = 0;
- while (state->bits >= 8) {
- buf[len++] = (unsigned char)(state->hold);
- state->hold >>= 8;
- state->bits -= 8;
- }
- state->have = 0;
- syncsearch(&(state->have), buf, len);
- }
-
- /* search available input */
- len = syncsearch(&(state->have), strm->next_in, strm->avail_in);
- strm->avail_in -= len;
- strm->next_in += len;
- strm->total_in += len;
-
- /* return no joy or set up to restart inflate() on a new block */
- if (state->have != 4) return Z_DATA_ERROR;
- in = strm->total_in; out = strm->total_out;
- inflateReset(strm);
- strm->total_in = in; strm->total_out = out;
- state->mode = TYPE;
- return Z_OK;
+ unsigned len; /* number of bytes to look at or looked at */
+ unsigned long in, out; /* temporary to save total_in and total_out */
+ unsigned char buf[4]; /* to restore bit buffer to byte string */
+ struct inflate_state FAR *state;
+
+ /* check parameters */
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ if (strm->avail_in == 0 && state->bits < 8) return Z_BUF_ERROR;
+
+ /* if first time, start search in bit buffer */
+ if (state->mode != SYNC) {
+ state->mode = SYNC;
+ state->hold <<= state->bits & 7;
+ state->bits -= state->bits & 7;
+ len = 0;
+ while (state->bits >= 8) {
+ buf[len++] = (unsigned char)(state->hold);
+ state->hold >>= 8;
+ state->bits -= 8;
+ }
+ state->have = 0;
+ syncsearch(&(state->have), buf, len);
+ }
+
+ /* search available input */
+ len = syncsearch(&(state->have), strm->next_in, strm->avail_in);
+ strm->avail_in -= len;
+ strm->next_in += len;
+ strm->total_in += len;
+
+ /* return no joy or set up to restart inflate() on a new block */
+ if (state->have != 4) return Z_DATA_ERROR;
+ in = strm->total_in; out = strm->total_out;
+ inflateReset(strm);
+ strm->total_in = in; strm->total_out = out;
+ state->mode = TYPE;
+ return Z_OK;
}
/*
@@ -1412,85 +1412,85 @@ z_streamp strm;
int ZEXPORT inflateSyncPoint(strm)
z_streamp strm;
{
- struct inflate_state FAR *state;
+ struct inflate_state FAR *state;
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- return state->mode == STORED && state->bits == 0;
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ return state->mode == STORED && state->bits == 0;
}
int ZEXPORT inflateCopy(dest, source)
z_streamp dest;
z_streamp source;
{
- struct inflate_state FAR *state;
- struct inflate_state FAR *copy;
- unsigned char FAR *window;
- unsigned wsize;
-
- /* check input */
- if (dest == Z_NULL || source == Z_NULL || source->state == Z_NULL ||
- source->zalloc == (alloc_func)0 || source->zfree == (free_func)0)
- return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)source->state;
-
- /* allocate space */
- copy = (struct inflate_state FAR *)
- ZALLOC(source, 1, sizeof(struct inflate_state));
- if (copy == Z_NULL) return Z_MEM_ERROR;
- window = Z_NULL;
- if (state->window != Z_NULL) {
- window = (unsigned char FAR *)
- ZALLOC(source, 1U << state->wbits, sizeof(unsigned char));
- if (window == Z_NULL) {
- ZFREE(source, copy);
- return Z_MEM_ERROR;
- }
- }
-
- /* copy state */
- zmemcpy((voidpf)dest, (voidpf)source, sizeof(z_stream));
- zmemcpy((voidpf)copy, (voidpf)state, sizeof(struct inflate_state));
- if (state->lencode >= state->codes &&
- state->lencode <= state->codes + ENOUGH - 1) {
- copy->lencode = copy->codes + (state->lencode - state->codes);
- copy->distcode = copy->codes + (state->distcode - state->codes);
- }
- copy->next = copy->codes + (state->next - state->codes);
- if (window != Z_NULL) {
- wsize = 1U << state->wbits;
- zmemcpy(window, state->window, wsize);
- }
- copy->window = window;
- dest->state = (struct internal_state FAR *)copy;
- return Z_OK;
+ struct inflate_state FAR *state;
+ struct inflate_state FAR *copy;
+ unsigned char FAR *window;
+ unsigned wsize;
+
+ /* check input */
+ if (dest == Z_NULL || source == Z_NULL || source->state == Z_NULL ||
+ source->zalloc == (alloc_func)0 || source->zfree == (free_func)0)
+ return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)source->state;
+
+ /* allocate space */
+ copy = (struct inflate_state FAR *)
+ ZALLOC(source, 1, sizeof(struct inflate_state));
+ if (copy == Z_NULL) return Z_MEM_ERROR;
+ window = Z_NULL;
+ if (state->window != Z_NULL) {
+ window = (unsigned char FAR *)
+ ZALLOC(source, 1U << state->wbits, sizeof(unsigned char));
+ if (window == Z_NULL) {
+ ZFREE(source, copy);
+ return Z_MEM_ERROR;
+ }
+ }
+
+ /* copy state */
+ zmemcpy((voidpf)dest, (voidpf)source, sizeof(z_stream));
+ zmemcpy((voidpf)copy, (voidpf)state, sizeof(struct inflate_state));
+ if (state->lencode >= state->codes &&
+ state->lencode <= state->codes + ENOUGH - 1) {
+ copy->lencode = copy->codes + (state->lencode - state->codes);
+ copy->distcode = copy->codes + (state->distcode - state->codes);
+ }
+ copy->next = copy->codes + (state->next - state->codes);
+ if (window != Z_NULL) {
+ wsize = 1U << state->wbits;
+ zmemcpy(window, state->window, wsize);
+ }
+ copy->window = window;
+ dest->state = (struct internal_state FAR *)copy;
+ return Z_OK;
}
int ZEXPORT inflateUndermine(strm, subvert)
z_streamp strm;
int subvert;
{
- struct inflate_state FAR *state;
+ struct inflate_state FAR *state;
- if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
- state = (struct inflate_state FAR *)strm->state;
- state->sane = !subvert;
+ if (strm == Z_NULL || strm->state == Z_NULL) return Z_STREAM_ERROR;
+ state = (struct inflate_state FAR *)strm->state;
+ state->sane = !subvert;
#ifdef INFLATE_ALLOW_INVALID_DISTANCE_TOOFAR_ARRR
- return Z_OK;
+ return Z_OK;
#else
- state->sane = 1;
- return Z_DATA_ERROR;
+ state->sane = 1;
+ return Z_DATA_ERROR;
#endif
}
long ZEXPORT inflateMark(strm)
z_streamp strm;
{
- struct inflate_state FAR *state;
+ struct inflate_state FAR *state;
- if (strm == Z_NULL || strm->state == Z_NULL) return -1L << 16;
- state = (struct inflate_state FAR *)strm->state;
- return ((long)(state->back) << 16) +
- (state->mode == COPY ? state->length :
- (state->mode == MATCH ? state->was - state->length : 0));
+ if (strm == Z_NULL || strm->state == Z_NULL) return -1L << 16;
+ state = (struct inflate_state FAR *)strm->state;
+ return ((long)(state->back) << 16) +
+ (state->mode == COPY ? state->length :
+ (state->mode == MATCH ? state->was - state->length : 0));
}
diff --git a/src/lib/zlib/inflate.h b/src/lib/zlib/inflate.h
index 95f4986d400..0da501e2ca4 100644
--- a/src/lib/zlib/inflate.h
+++ b/src/lib/zlib/inflate.h
@@ -18,38 +18,38 @@
/* Possible inflate modes between inflate() calls */
typedef enum {
- HEAD, /* i: waiting for magic header */
- FLAGS, /* i: waiting for method and flags (gzip) */
- TIME, /* i: waiting for modification time (gzip) */
- OS, /* i: waiting for extra flags and operating system (gzip) */
- EXLEN, /* i: waiting for extra length (gzip) */
- EXTRA, /* i: waiting for extra bytes (gzip) */
- NAME, /* i: waiting for end of file name (gzip) */
- COMMENT, /* i: waiting for end of comment (gzip) */
- HCRC, /* i: waiting for header crc (gzip) */
- DICTID, /* i: waiting for dictionary check value */
- DICT, /* waiting for inflateSetDictionary() call */
- TYPE, /* i: waiting for type bits, including last-flag bit */
- TYPEDO, /* i: same, but skip check to exit inflate on new block */
- STORED, /* i: waiting for stored size (length and complement) */
- COPY_, /* i/o: same as COPY below, but only first time in */
- COPY, /* i/o: waiting for input or output to copy stored block */
- TABLE, /* i: waiting for dynamic block table lengths */
- LENLENS, /* i: waiting for code length code lengths */
- CODELENS, /* i: waiting for length/lit and distance code lengths */
- LEN_, /* i: same as LEN below, but only first time in */
- LEN, /* i: waiting for length/lit/eob code */
- LENEXT, /* i: waiting for length extra bits */
- DIST, /* i: waiting for distance code */
- DISTEXT, /* i: waiting for distance extra bits */
- MATCH, /* o: waiting for output space to copy string */
- LIT, /* o: waiting for output space to write literal */
- CHECK, /* i: waiting for 32-bit check value */
- LENGTH, /* i: waiting for 32-bit length (gzip) */
- DONE, /* finished check, done -- remain here until reset */
- BAD, /* got a data error -- remain here until reset */
- MEM, /* got an inflate() memory error -- remain here until reset */
- SYNC /* looking for synchronization bytes to restart inflate() */
+ HEAD, /* i: waiting for magic header */
+ FLAGS, /* i: waiting for method and flags (gzip) */
+ TIME, /* i: waiting for modification time (gzip) */
+ OS, /* i: waiting for extra flags and operating system (gzip) */
+ EXLEN, /* i: waiting for extra length (gzip) */
+ EXTRA, /* i: waiting for extra bytes (gzip) */
+ NAME, /* i: waiting for end of file name (gzip) */
+ COMMENT, /* i: waiting for end of comment (gzip) */
+ HCRC, /* i: waiting for header crc (gzip) */
+ DICTID, /* i: waiting for dictionary check value */
+ DICT, /* waiting for inflateSetDictionary() call */
+ TYPE, /* i: waiting for type bits, including last-flag bit */
+ TYPEDO, /* i: same, but skip check to exit inflate on new block */
+ STORED, /* i: waiting for stored size (length and complement) */
+ COPY_, /* i/o: same as COPY below, but only first time in */
+ COPY, /* i/o: waiting for input or output to copy stored block */
+ TABLE, /* i: waiting for dynamic block table lengths */
+ LENLENS, /* i: waiting for code length code lengths */
+ CODELENS, /* i: waiting for length/lit and distance code lengths */
+ LEN_, /* i: same as LEN below, but only first time in */
+ LEN, /* i: waiting for length/lit/eob code */
+ LENEXT, /* i: waiting for length extra bits */
+ DIST, /* i: waiting for distance code */
+ DISTEXT, /* i: waiting for distance extra bits */
+ MATCH, /* o: waiting for output space to copy string */
+ LIT, /* o: waiting for output space to write literal */
+ CHECK, /* i: waiting for 32-bit check value */
+ LENGTH, /* i: waiting for 32-bit length (gzip) */
+ DONE, /* finished check, done -- remain here until reset */
+ BAD, /* got a data error -- remain here until reset */
+ MEM, /* got an inflate() memory error -- remain here until reset */
+ SYNC /* looking for synchronization bytes to restart inflate() */
} inflate_mode;
/*
@@ -79,44 +79,44 @@ typedef enum {
/* state maintained between inflate() calls. Approximately 10K bytes. */
struct inflate_state {
- inflate_mode mode; /* current inflate mode */
- int last; /* true if processing last block */
- int wrap; /* bit 0 true for zlib, bit 1 true for gzip */
- int havedict; /* true if dictionary provided */
- int flags; /* gzip header method and flags (0 if zlib) */
- unsigned dmax; /* zlib header max distance (INFLATE_STRICT) */
- unsigned long check; /* protected copy of check value */
- unsigned long total; /* protected copy of output count */
- gz_headerp head; /* where to save gzip header information */
- /* sliding window */
- unsigned wbits; /* log base 2 of requested window size */
- unsigned wsize; /* window size or zero if not using window */
- unsigned whave; /* valid bytes in the window */
- unsigned wnext; /* window write index */
- unsigned char FAR *window; /* allocated sliding window, if needed */
- /* bit accumulator */
- unsigned long hold; /* input bit accumulator */
- unsigned bits; /* number of bits in "in" */
- /* for string and stored block copying */
- unsigned length; /* literal or length of data to copy */
- unsigned offset; /* distance back to copy string from */
- /* for table and code decoding */
- unsigned extra; /* extra bits needed */
- /* fixed and dynamic code tables */
- code const FAR *lencode; /* starting table for length/literal codes */
- code const FAR *distcode; /* starting table for distance codes */
- unsigned lenbits; /* index bits for lencode */
- unsigned distbits; /* index bits for distcode */
- /* dynamic table building */
- unsigned ncode; /* number of code length code lengths */
- unsigned nlen; /* number of length code lengths */
- unsigned ndist; /* number of distance code lengths */
- unsigned have; /* number of code lengths in lens[] */
- code FAR *next; /* next available space in codes[] */
- unsigned short lens[320]; /* temporary storage for code lengths */
- unsigned short work[288]; /* work area for code table building */
- code codes[ENOUGH]; /* space for code tables */
- int sane; /* if false, allow invalid distance too far */
- int back; /* bits back of last unprocessed length/lit */
- unsigned was; /* initial length of match */
+ inflate_mode mode; /* current inflate mode */
+ int last; /* true if processing last block */
+ int wrap; /* bit 0 true for zlib, bit 1 true for gzip */
+ int havedict; /* true if dictionary provided */
+ int flags; /* gzip header method and flags (0 if zlib) */
+ unsigned dmax; /* zlib header max distance (INFLATE_STRICT) */
+ unsigned long check; /* protected copy of check value */
+ unsigned long total; /* protected copy of output count */
+ gz_headerp head; /* where to save gzip header information */
+ /* sliding window */
+ unsigned wbits; /* log base 2 of requested window size */
+ unsigned wsize; /* window size or zero if not using window */
+ unsigned whave; /* valid bytes in the window */
+ unsigned wnext; /* window write index */
+ unsigned char FAR *window; /* allocated sliding window, if needed */
+ /* bit accumulator */
+ unsigned long hold; /* input bit accumulator */
+ unsigned bits; /* number of bits in "in" */
+ /* for string and stored block copying */
+ unsigned length; /* literal or length of data to copy */
+ unsigned offset; /* distance back to copy string from */
+ /* for table and code decoding */
+ unsigned extra; /* extra bits needed */
+ /* fixed and dynamic code tables */
+ code const FAR *lencode; /* starting table for length/literal codes */
+ code const FAR *distcode; /* starting table for distance codes */
+ unsigned lenbits; /* index bits for lencode */
+ unsigned distbits; /* index bits for distcode */
+ /* dynamic table building */
+ unsigned ncode; /* number of code length code lengths */
+ unsigned nlen; /* number of length code lengths */
+ unsigned ndist; /* number of distance code lengths */
+ unsigned have; /* number of code lengths in lens[] */
+ code FAR *next; /* next available space in codes[] */
+ unsigned short lens[320]; /* temporary storage for code lengths */
+ unsigned short work[288]; /* work area for code table building */
+ code codes[ENOUGH]; /* space for code tables */
+ int sane; /* if false, allow invalid distance too far */
+ int back; /* bits back of last unprocessed length/lit */
+ unsigned was; /* initial length of match */
};
diff --git a/src/lib/zlib/inftrees.c b/src/lib/zlib/inftrees.c
index abcd7c45ed3..63a5dc537f6 100644
--- a/src/lib/zlib/inftrees.c
+++ b/src/lib/zlib/inftrees.c
@@ -9,7 +9,7 @@
#define MAXBITS 15
const char inflate_copyright[] =
- " inflate 1.2.7 Copyright 1995-2012 Mark Adler ";
+ " inflate 1.2.7 Copyright 1995-2012 Mark Adler ";
/*
If you use the zlib library in a product, an acknowledgment is welcome
in the documentation of your product. If for some reason you cannot
@@ -37,270 +37,270 @@ code FAR * FAR *table;
unsigned FAR *bits;
unsigned short FAR *work;
{
- unsigned len; /* a code's length in bits */
- unsigned sym; /* index of code symbols */
- unsigned min, max; /* minimum and maximum code lengths */
- unsigned root; /* number of index bits for root table */
- unsigned curr; /* number of index bits for current table */
- unsigned drop; /* code bits to drop for sub-table */
- int left; /* number of prefix codes available */
- unsigned used; /* code entries in table used */
- unsigned huff; /* Huffman code */
- unsigned incr; /* for incrementing code, index */
- unsigned fill; /* index for replicating entries */
- unsigned low; /* low bits for current root entry */
- unsigned mask; /* mask for low root bits */
- code here; /* table entry for duplication */
- code FAR *next; /* next available space in table */
- const unsigned short FAR *base; /* base value table to use */
- const unsigned short FAR *extra; /* extra bits table to use */
- int end; /* use base and extra for symbol > end */
- unsigned short count[MAXBITS+1]; /* number of codes of each length */
- unsigned short offs[MAXBITS+1]; /* offsets in table for each length */
- static const unsigned short lbase[31] = { /* Length codes 257..285 base */
- 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31,
- 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0};
- static const unsigned short lext[31] = { /* Length codes 257..285 extra */
- 16, 16, 16, 16, 16, 16, 16, 16, 17, 17, 17, 17, 18, 18, 18, 18,
- 19, 19, 19, 19, 20, 20, 20, 20, 21, 21, 21, 21, 16, 78, 68};
- static const unsigned short dbase[32] = { /* Distance codes 0..29 base */
- 1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
- 257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145,
- 8193, 12289, 16385, 24577, 0, 0};
- static const unsigned short dext[32] = { /* Distance codes 0..29 extra */
- 16, 16, 16, 16, 17, 17, 18, 18, 19, 19, 20, 20, 21, 21, 22, 22,
- 23, 23, 24, 24, 25, 25, 26, 26, 27, 27,
- 28, 28, 29, 29, 64, 64};
-
- /*
- Process a set of code lengths to create a canonical Huffman code. The
- code lengths are lens[0..codes-1]. Each length corresponds to the
- symbols 0..codes-1. The Huffman code is generated by first sorting the
- symbols by length from short to long, and retaining the symbol order
- for codes with equal lengths. Then the code starts with all zero bits
- for the first code of the shortest length, and the codes are integer
- increments for the same length, and zeros are appended as the length
- increases. For the deflate format, these bits are stored backwards
- from their more natural integer increment ordering, and so when the
- decoding tables are built in the large loop below, the integer codes
- are incremented backwards.
-
- This routine assumes, but does not check, that all of the entries in
- lens[] are in the range 0..MAXBITS. The caller must assure this.
- 1..MAXBITS is interpreted as that code length. zero means that that
- symbol does not occur in this code.
-
- The codes are sorted by computing a count of codes for each length,
- creating from that a table of starting indices for each length in the
- sorted table, and then entering the symbols in order in the sorted
- table. The sorted table is work[], with that space being provided by
- the caller.
-
- The length counts are used for other purposes as well, i.e. finding
- the minimum and maximum length codes, determining if there are any
- codes at all, checking for a valid set of lengths, and looking ahead
- at length counts to determine sub-table sizes when building the
- decoding tables.
- */
-
- /* accumulate lengths for codes (assumes lens[] all in 0..MAXBITS) */
- for (len = 0; len <= MAXBITS; len++)
- count[len] = 0;
- for (sym = 0; sym < codes; sym++)
- count[lens[sym]]++;
-
- /* bound code lengths, force root to be within code lengths */
- root = *bits;
- for (max = MAXBITS; max >= 1; max--)
- if (count[max] != 0) break;
- if (root > max) root = max;
- if (max == 0) { /* no symbols to code at all */
- here.op = (unsigned char)64; /* invalid code marker */
- here.bits = (unsigned char)1;
- here.val = (unsigned short)0;
- *(*table)++ = here; /* make a table to force an error */
- *(*table)++ = here;
- *bits = 1;
- return 0; /* no symbols, but wait for decoding to report error */
- }
- for (min = 1; min < max; min++)
- if (count[min] != 0) break;
- if (root < min) root = min;
-
- /* check for an over-subscribed or incomplete set of lengths */
- left = 1;
- for (len = 1; len <= MAXBITS; len++) {
- left <<= 1;
- left -= count[len];
- if (left < 0) return -1; /* over-subscribed */
- }
- if (left > 0 && (type == CODES || max != 1))
- return -1; /* incomplete set */
-
- /* generate offsets into symbol table for each length for sorting */
- offs[1] = 0;
- for (len = 1; len < MAXBITS; len++)
- offs[len + 1] = offs[len] + count[len];
-
- /* sort symbols by length, by symbol order within each length */
- for (sym = 0; sym < codes; sym++)
- if (lens[sym] != 0) work[offs[lens[sym]]++] = (unsigned short)sym;
-
- /*
- Create and fill in decoding tables. In this loop, the table being
- filled is at next and has curr index bits. The code being used is huff
- with length len. That code is converted to an index by dropping drop
- bits off of the bottom. For codes where len is less than drop + curr,
- those top drop + curr - len bits are incremented through all values to
- fill the table with replicated entries.
-
- root is the number of index bits for the root table. When len exceeds
- root, sub-tables are created pointed to by the root entry with an index
- of the low root bits of huff. This is saved in low to check for when a
- new sub-table should be started. drop is zero when the root table is
- being filled, and drop is root when sub-tables are being filled.
-
- When a new sub-table is needed, it is necessary to look ahead in the
- code lengths to determine what size sub-table is needed. The length
- counts are used for this, and so count[] is decremented as codes are
- entered in the tables.
-
- used keeps track of how many table entries have been allocated from the
- provided *table space. It is checked for LENS and DIST tables against
- the constants ENOUGH_LENS and ENOUGH_DISTS to guard against changes in
- the initial root table size constants. See the comments in inftrees.h
- for more information.
-
- sym increments through all symbols, and the loop terminates when
- all codes of length max, i.e. all codes, have been processed. This
- routine permits incomplete codes, so another loop after this one fills
- in the rest of the decoding tables with invalid code markers.
- */
-
- /* set up for code type */
- switch (type) {
- case CODES:
- base = extra = work; /* dummy value--not used */
- end = 19;
- break;
- case LENS:
- base = lbase;
- base -= 257;
- extra = lext;
- extra -= 257;
- end = 256;
- break;
- default: /* DISTS */
- base = dbase;
- extra = dext;
- end = -1;
- }
-
- /* initialize state for loop */
- huff = 0; /* starting code */
- sym = 0; /* starting code symbol */
- len = min; /* starting code length */
- next = *table; /* current table to fill in */
- curr = root; /* current table index bits */
- drop = 0; /* current bits to drop from code for index */
- low = (unsigned)(-1); /* trigger new sub-table when len > root */
- used = 1U << root; /* use root table entries */
- mask = used - 1; /* mask for comparing low */
-
- /* check available table space */
- if ((type == LENS && used >= ENOUGH_LENS) ||
- (type == DISTS && used >= ENOUGH_DISTS))
- return 1;
-
- /* process all codes and make table entries */
- for (;;) {
- /* create table entry */
- here.bits = (unsigned char)(len - drop);
- if ((int)(work[sym]) < end) {
- here.op = (unsigned char)0;
- here.val = work[sym];
- }
- else if ((int)(work[sym]) > end) {
- here.op = (unsigned char)(extra[work[sym]]);
- here.val = base[work[sym]];
- }
- else {
- here.op = (unsigned char)(32 + 64); /* end of block */
- here.val = 0;
- }
-
- /* replicate for those indices with low len bits equal to huff */
- incr = 1U << (len - drop);
- fill = 1U << curr;
- min = fill; /* save offset to next table */
- do {
- fill -= incr;
- next[(huff >> drop) + fill] = here;
- } while (fill != 0);
-
- /* backwards increment the len-bit code huff */
- incr = 1U << (len - 1);
- while (huff & incr)
- incr >>= 1;
- if (incr != 0) {
- huff &= incr - 1;
- huff += incr;
- }
- else
- huff = 0;
-
- /* go to next symbol, update count, len */
- sym++;
- if (--(count[len]) == 0) {
- if (len == max) break;
- len = lens[work[sym]];
- }
-
- /* create new sub-table if needed */
- if (len > root && (huff & mask) != low) {
- /* if first time, transition to sub-tables */
- if (drop == 0)
- drop = root;
-
- /* increment past last table */
- next += min; /* here min is 1 << curr */
-
- /* determine length of next table */
- curr = len - drop;
- left = (int)(1 << curr);
- while (curr + drop < max) {
- left -= count[curr + drop];
- if (left <= 0) break;
- curr++;
- left <<= 1;
- }
-
- /* check for enough space */
- used += 1U << curr;
- if ((type == LENS && used >= ENOUGH_LENS) ||
- (type == DISTS && used >= ENOUGH_DISTS))
- return 1;
-
- /* point entry in root table to sub-table */
- low = huff & mask;
- (*table)[low].op = (unsigned char)curr;
- (*table)[low].bits = (unsigned char)root;
- (*table)[low].val = (unsigned short)(next - *table);
- }
- }
-
- /* fill in remaining table entry if code is incomplete (guaranteed to have
- at most one remaining entry, since if the code is incomplete, the
- maximum code length that was allowed to get this far is one bit) */
- if (huff != 0) {
- here.op = (unsigned char)64; /* invalid code marker */
- here.bits = (unsigned char)(len - drop);
- here.val = (unsigned short)0;
- next[huff] = here;
- }
-
- /* set return parameters */
- *table += used;
- *bits = root;
- return 0;
+ unsigned len; /* a code's length in bits */
+ unsigned sym; /* index of code symbols */
+ unsigned min, max; /* minimum and maximum code lengths */
+ unsigned root; /* number of index bits for root table */
+ unsigned curr; /* number of index bits for current table */
+ unsigned drop; /* code bits to drop for sub-table */
+ int left; /* number of prefix codes available */
+ unsigned used; /* code entries in table used */
+ unsigned huff; /* Huffman code */
+ unsigned incr; /* for incrementing code, index */
+ unsigned fill; /* index for replicating entries */
+ unsigned low; /* low bits for current root entry */
+ unsigned mask; /* mask for low root bits */
+ code here; /* table entry for duplication */
+ code FAR *next; /* next available space in table */
+ const unsigned short FAR *base; /* base value table to use */
+ const unsigned short FAR *extra; /* extra bits table to use */
+ int end; /* use base and extra for symbol > end */
+ unsigned short count[MAXBITS+1]; /* number of codes of each length */
+ unsigned short offs[MAXBITS+1]; /* offsets in table for each length */
+ static const unsigned short lbase[31] = { /* Length codes 257..285 base */
+ 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31,
+ 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0};
+ static const unsigned short lext[31] = { /* Length codes 257..285 extra */
+ 16, 16, 16, 16, 16, 16, 16, 16, 17, 17, 17, 17, 18, 18, 18, 18,
+ 19, 19, 19, 19, 20, 20, 20, 20, 21, 21, 21, 21, 16, 78, 68};
+ static const unsigned short dbase[32] = { /* Distance codes 0..29 base */
+ 1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193,
+ 257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145,
+ 8193, 12289, 16385, 24577, 0, 0};
+ static const unsigned short dext[32] = { /* Distance codes 0..29 extra */
+ 16, 16, 16, 16, 17, 17, 18, 18, 19, 19, 20, 20, 21, 21, 22, 22,
+ 23, 23, 24, 24, 25, 25, 26, 26, 27, 27,
+ 28, 28, 29, 29, 64, 64};
+
+ /*
+ Process a set of code lengths to create a canonical Huffman code. The
+ code lengths are lens[0..codes-1]. Each length corresponds to the
+ symbols 0..codes-1. The Huffman code is generated by first sorting the
+ symbols by length from short to long, and retaining the symbol order
+ for codes with equal lengths. Then the code starts with all zero bits
+ for the first code of the shortest length, and the codes are integer
+ increments for the same length, and zeros are appended as the length
+ increases. For the deflate format, these bits are stored backwards
+ from their more natural integer increment ordering, and so when the
+ decoding tables are built in the large loop below, the integer codes
+ are incremented backwards.
+
+ This routine assumes, but does not check, that all of the entries in
+ lens[] are in the range 0..MAXBITS. The caller must assure this.
+ 1..MAXBITS is interpreted as that code length. zero means that that
+ symbol does not occur in this code.
+
+ The codes are sorted by computing a count of codes for each length,
+ creating from that a table of starting indices for each length in the
+ sorted table, and then entering the symbols in order in the sorted
+ table. The sorted table is work[], with that space being provided by
+ the caller.
+
+ The length counts are used for other purposes as well, i.e. finding
+ the minimum and maximum length codes, determining if there are any
+ codes at all, checking for a valid set of lengths, and looking ahead
+ at length counts to determine sub-table sizes when building the
+ decoding tables.
+ */
+
+ /* accumulate lengths for codes (assumes lens[] all in 0..MAXBITS) */
+ for (len = 0; len <= MAXBITS; len++)
+ count[len] = 0;
+ for (sym = 0; sym < codes; sym++)
+ count[lens[sym]]++;
+
+ /* bound code lengths, force root to be within code lengths */
+ root = *bits;
+ for (max = MAXBITS; max >= 1; max--)
+ if (count[max] != 0) break;
+ if (root > max) root = max;
+ if (max == 0) { /* no symbols to code at all */
+ here.op = (unsigned char)64; /* invalid code marker */
+ here.bits = (unsigned char)1;
+ here.val = (unsigned short)0;
+ *(*table)++ = here; /* make a table to force an error */
+ *(*table)++ = here;
+ *bits = 1;
+ return 0; /* no symbols, but wait for decoding to report error */
+ }
+ for (min = 1; min < max; min++)
+ if (count[min] != 0) break;
+ if (root < min) root = min;
+
+ /* check for an over-subscribed or incomplete set of lengths */
+ left = 1;
+ for (len = 1; len <= MAXBITS; len++) {
+ left <<= 1;
+ left -= count[len];
+ if (left < 0) return -1; /* over-subscribed */
+ }
+ if (left > 0 && (type == CODES || max != 1))
+ return -1; /* incomplete set */
+
+ /* generate offsets into symbol table for each length for sorting */
+ offs[1] = 0;
+ for (len = 1; len < MAXBITS; len++)
+ offs[len + 1] = offs[len] + count[len];
+
+ /* sort symbols by length, by symbol order within each length */
+ for (sym = 0; sym < codes; sym++)
+ if (lens[sym] != 0) work[offs[lens[sym]]++] = (unsigned short)sym;
+
+ /*
+ Create and fill in decoding tables. In this loop, the table being
+ filled is at next and has curr index bits. The code being used is huff
+ with length len. That code is converted to an index by dropping drop
+ bits off of the bottom. For codes where len is less than drop + curr,
+ those top drop + curr - len bits are incremented through all values to
+ fill the table with replicated entries.
+
+ root is the number of index bits for the root table. When len exceeds
+ root, sub-tables are created pointed to by the root entry with an index
+ of the low root bits of huff. This is saved in low to check for when a
+ new sub-table should be started. drop is zero when the root table is
+ being filled, and drop is root when sub-tables are being filled.
+
+ When a new sub-table is needed, it is necessary to look ahead in the
+ code lengths to determine what size sub-table is needed. The length
+ counts are used for this, and so count[] is decremented as codes are
+ entered in the tables.
+
+ used keeps track of how many table entries have been allocated from the
+ provided *table space. It is checked for LENS and DIST tables against
+ the constants ENOUGH_LENS and ENOUGH_DISTS to guard against changes in
+ the initial root table size constants. See the comments in inftrees.h
+ for more information.
+
+ sym increments through all symbols, and the loop terminates when
+ all codes of length max, i.e. all codes, have been processed. This
+ routine permits incomplete codes, so another loop after this one fills
+ in the rest of the decoding tables with invalid code markers.
+ */
+
+ /* set up for code type */
+ switch (type) {
+ case CODES:
+ base = extra = work; /* dummy value--not used */
+ end = 19;
+ break;
+ case LENS:
+ base = lbase;
+ base -= 257;
+ extra = lext;
+ extra -= 257;
+ end = 256;
+ break;
+ default: /* DISTS */
+ base = dbase;
+ extra = dext;
+ end = -1;
+ }
+
+ /* initialize state for loop */
+ huff = 0; /* starting code */
+ sym = 0; /* starting code symbol */
+ len = min; /* starting code length */
+ next = *table; /* current table to fill in */
+ curr = root; /* current table index bits */
+ drop = 0; /* current bits to drop from code for index */
+ low = (unsigned)(-1); /* trigger new sub-table when len > root */
+ used = 1U << root; /* use root table entries */
+ mask = used - 1; /* mask for comparing low */
+
+ /* check available table space */
+ if ((type == LENS && used >= ENOUGH_LENS) ||
+ (type == DISTS && used >= ENOUGH_DISTS))
+ return 1;
+
+ /* process all codes and make table entries */
+ for (;;) {
+ /* create table entry */
+ here.bits = (unsigned char)(len - drop);
+ if ((int)(work[sym]) < end) {
+ here.op = (unsigned char)0;
+ here.val = work[sym];
+ }
+ else if ((int)(work[sym]) > end) {
+ here.op = (unsigned char)(extra[work[sym]]);
+ here.val = base[work[sym]];
+ }
+ else {
+ here.op = (unsigned char)(32 + 64); /* end of block */
+ here.val = 0;
+ }
+
+ /* replicate for those indices with low len bits equal to huff */
+ incr = 1U << (len - drop);
+ fill = 1U << curr;
+ min = fill; /* save offset to next table */
+ do {
+ fill -= incr;
+ next[(huff >> drop) + fill] = here;
+ } while (fill != 0);
+
+ /* backwards increment the len-bit code huff */
+ incr = 1U << (len - 1);
+ while (huff & incr)
+ incr >>= 1;
+ if (incr != 0) {
+ huff &= incr - 1;
+ huff += incr;
+ }
+ else
+ huff = 0;
+
+ /* go to next symbol, update count, len */
+ sym++;
+ if (--(count[len]) == 0) {
+ if (len == max) break;
+ len = lens[work[sym]];
+ }
+
+ /* create new sub-table if needed */
+ if (len > root && (huff & mask) != low) {
+ /* if first time, transition to sub-tables */
+ if (drop == 0)
+ drop = root;
+
+ /* increment past last table */
+ next += min; /* here min is 1 << curr */
+
+ /* determine length of next table */
+ curr = len - drop;
+ left = (int)(1 << curr);
+ while (curr + drop < max) {
+ left -= count[curr + drop];
+ if (left <= 0) break;
+ curr++;
+ left <<= 1;
+ }
+
+ /* check for enough space */
+ used += 1U << curr;
+ if ((type == LENS && used >= ENOUGH_LENS) ||
+ (type == DISTS && used >= ENOUGH_DISTS))
+ return 1;
+
+ /* point entry in root table to sub-table */
+ low = huff & mask;
+ (*table)[low].op = (unsigned char)curr;
+ (*table)[low].bits = (unsigned char)root;
+ (*table)[low].val = (unsigned short)(next - *table);
+ }
+ }
+
+ /* fill in remaining table entry if code is incomplete (guaranteed to have
+ at most one remaining entry, since if the code is incomplete, the
+ maximum code length that was allowed to get this far is one bit) */
+ if (huff != 0) {
+ here.op = (unsigned char)64; /* invalid code marker */
+ here.bits = (unsigned char)(len - drop);
+ here.val = (unsigned short)0;
+ next[huff] = here;
+ }
+
+ /* set return parameters */
+ *table += used;
+ *bits = root;
+ return 0;
}
diff --git a/src/lib/zlib/inftrees.h b/src/lib/zlib/inftrees.h
index baa53a0b1a1..14cf2cf6105 100644
--- a/src/lib/zlib/inftrees.h
+++ b/src/lib/zlib/inftrees.h
@@ -22,9 +22,9 @@
of a literal, the base length or distance, or the offset from
the current table to the next table. Each entry is four bytes. */
typedef struct {
- unsigned char op; /* operation, extra bits, table bits */
- unsigned char bits; /* bits in this part of the code */
- unsigned short val; /* offset in table or code value */
+ unsigned char op; /* operation, extra bits, table bits */
+ unsigned char bits; /* bits in this part of the code */
+ unsigned short val; /* offset in table or code value */
} code;
/* op values as set by inflate_table():
@@ -52,11 +52,11 @@ typedef struct {
/* Type of code to build for inflate_table() */
typedef enum {
- CODES,
- LENS,
- DISTS
+ CODES,
+ LENS,
+ DISTS
} codetype;
int ZLIB_INTERNAL inflate_table OF((codetype type, unsigned short FAR *lens,
- unsigned codes, code FAR * FAR *table,
- unsigned FAR *bits, unsigned short FAR *work));
+ unsigned codes, code FAR * FAR *table,
+ unsigned FAR *bits, unsigned short FAR *work));
diff --git a/src/lib/zlib/minigzip.c b/src/lib/zlib/minigzip.c
index aa7ac7a0494..028a7be993f 100644
--- a/src/lib/zlib/minigzip.c
+++ b/src/lib/zlib/minigzip.c
@@ -55,7 +55,7 @@
#if !defined(Z_HAVE_UNISTD_H) && !defined(_LARGEFILE64_SOURCE)
#ifndef WIN32 /* unlink already in stdio.h for WIN32 */
- extern int unlink OF((const char *));
+ extern int unlink OF((const char *));
#endif
#endif
@@ -74,51 +74,51 @@
of GetLastError. */
static char *strwinerror (error)
- DWORD error;
+ DWORD error;
{
- static char buf[1024];
-
- wchar_t *msgbuf;
- DWORD lasterr = GetLastError();
- DWORD chars = FormatMessage(FORMAT_MESSAGE_FROM_SYSTEM
- | FORMAT_MESSAGE_ALLOCATE_BUFFER,
- NULL,
- error,
- 0, /* Default language */
- (LPVOID)&msgbuf,
- 0,
- NULL);
- if (chars != 0) {
- /* If there is an \r\n appended, zap it. */
- if (chars >= 2
- && msgbuf[chars - 2] == '\r' && msgbuf[chars - 1] == '\n') {
- chars -= 2;
- msgbuf[chars] = 0;
- }
-
- if (chars > sizeof (buf) - 1) {
- chars = sizeof (buf) - 1;
- msgbuf[chars] = 0;
- }
-
- wcstombs(buf, msgbuf, chars + 1);
- LocalFree(msgbuf);
- }
- else {
- sprintf(buf, "unknown win32 error (%ld)", error);
- }
-
- SetLastError(lasterr);
- return buf;
+ static char buf[1024];
+
+ wchar_t *msgbuf;
+ DWORD lasterr = GetLastError();
+ DWORD chars = FormatMessage(FORMAT_MESSAGE_FROM_SYSTEM
+ | FORMAT_MESSAGE_ALLOCATE_BUFFER,
+ NULL,
+ error,
+ 0, /* Default language */
+ (LPVOID)&msgbuf,
+ 0,
+ NULL);
+ if (chars != 0) {
+ /* If there is an \r\n appended, zap it. */
+ if (chars >= 2
+ && msgbuf[chars - 2] == '\r' && msgbuf[chars - 1] == '\n') {
+ chars -= 2;
+ msgbuf[chars] = 0;
+ }
+
+ if (chars > sizeof (buf) - 1) {
+ chars = sizeof (buf) - 1;
+ msgbuf[chars] = 0;
+ }
+
+ wcstombs(buf, msgbuf, chars + 1);
+ LocalFree(msgbuf);
+ }
+ else {
+ sprintf(buf, "unknown win32 error (%ld)", error);
+ }
+
+ SetLastError(lasterr);
+ return buf;
}
static void pwinerror (s)
- const char *s;
+ const char *s;
{
- if (s && *s)
- fprintf(stderr, "%s: %s\n", s, strwinerror(GetLastError ()));
- else
- fprintf(stderr, "%s\n", strwinerror(GetLastError ()));
+ if (s && *s)
+ fprintf(stderr, "%s: %s\n", s, strwinerror(GetLastError ()));
+ else
+ fprintf(stderr, "%s\n", strwinerror(GetLastError ()));
}
#endif /* UNDER_CE */
@@ -133,7 +133,7 @@ static void pwinerror (s)
#ifdef MAXSEG_64K
# define local static
- /* Needed for systems with limitation on stack size. */
+ /* Needed for systems with limitation on stack size. */
#else
# define local
#endif
@@ -149,26 +149,26 @@ void *myalloc OF((void *, unsigned, unsigned));
void myfree OF((void *, void *));
void *myalloc(q, n, m)
- void *q;
- unsigned n, m;
+ void *q;
+ unsigned n, m;
{
- q = Z_NULL;
- return calloc(n, m);
+ q = Z_NULL;
+ return calloc(n, m);
}
void myfree(q, p)
- void *q, *p;
+ void *q, *p;
{
- q = Z_NULL;
- free(p);
+ q = Z_NULL;
+ free(p);
}
typedef struct gzFile_s {
- FILE *file;
- int write;
- int err;
- char *msg;
- z_stream strm;
+ FILE *file;
+ int write;
+ int err;
+ char *msg;
+ z_stream strm;
} *gzFile;
gzFile gzopen OF((const char *, const char *));
@@ -179,152 +179,152 @@ gzFile gzopen(path, mode)
const char *path;
const char *mode;
{
- return gz_open(path, -1, mode);
+ return gz_open(path, -1, mode);
}
gzFile gzdopen(fd, mode)
int fd;
const char *mode;
{
- return gz_open(NULL, fd, mode);
+ return gz_open(NULL, fd, mode);
}
gzFile gz_open(path, fd, mode)
- const char *path;
- int fd;
- const char *mode;
+ const char *path;
+ int fd;
+ const char *mode;
{
- gzFile gz;
- int ret;
-
- gz = malloc(sizeof(struct gzFile_s));
- if (gz == NULL)
- return NULL;
- gz->write = strchr(mode, 'w') != NULL;
- gz->strm.zalloc = myalloc;
- gz->strm.zfree = myfree;
- gz->strm.opaque = Z_NULL;
- if (gz->write)
- ret = deflateInit2(&(gz->strm), -1, 8, 15 + 16, 8, 0);
- else {
- gz->strm.next_in = 0;
- gz->strm.avail_in = Z_NULL;
- ret = inflateInit2(&(gz->strm), 15 + 16);
- }
- if (ret != Z_OK) {
- free(gz);
- return NULL;
- }
- gz->file = path == NULL ? fdopen(fd, gz->write ? "wb" : "rb") :
- fopen(path, gz->write ? "wb" : "rb");
- if (gz->file == NULL) {
- gz->write ? deflateEnd(&(gz->strm)) : inflateEnd(&(gz->strm));
- free(gz);
- return NULL;
- }
- gz->err = 0;
- gz->msg = "";
- return gz;
+ gzFile gz;
+ int ret;
+
+ gz = malloc(sizeof(struct gzFile_s));
+ if (gz == NULL)
+ return NULL;
+ gz->write = strchr(mode, 'w') != NULL;
+ gz->strm.zalloc = myalloc;
+ gz->strm.zfree = myfree;
+ gz->strm.opaque = Z_NULL;
+ if (gz->write)
+ ret = deflateInit2(&(gz->strm), -1, 8, 15 + 16, 8, 0);
+ else {
+ gz->strm.next_in = 0;
+ gz->strm.avail_in = Z_NULL;
+ ret = inflateInit2(&(gz->strm), 15 + 16);
+ }
+ if (ret != Z_OK) {
+ free(gz);
+ return NULL;
+ }
+ gz->file = path == NULL ? fdopen(fd, gz->write ? "wb" : "rb") :
+ fopen(path, gz->write ? "wb" : "rb");
+ if (gz->file == NULL) {
+ gz->write ? deflateEnd(&(gz->strm)) : inflateEnd(&(gz->strm));
+ free(gz);
+ return NULL;
+ }
+ gz->err = 0;
+ gz->msg = "";
+ return gz;
}
int gzwrite OF((gzFile, const void *, unsigned));
int gzwrite(gz, buf, len)
- gzFile gz;
- const void *buf;
- unsigned len;
+ gzFile gz;
+ const void *buf;
+ unsigned len;
{
- z_stream *strm;
- unsigned char out[BUFLEN];
-
- if (gz == NULL || !gz->write)
- return 0;
- strm = &(gz->strm);
- strm->next_in = (void *)buf;
- strm->avail_in = len;
- do {
- strm->next_out = out;
- strm->avail_out = BUFLEN;
- (void)deflate(strm, Z_NO_FLUSH);
- fwrite(out, 1, BUFLEN - strm->avail_out, gz->file);
- } while (strm->avail_out == 0);
- return len;
+ z_stream *strm;
+ unsigned char out[BUFLEN];
+
+ if (gz == NULL || !gz->write)
+ return 0;
+ strm = &(gz->strm);
+ strm->next_in = (void *)buf;
+ strm->avail_in = len;
+ do {
+ strm->next_out = out;
+ strm->avail_out = BUFLEN;
+ (void)deflate(strm, Z_NO_FLUSH);
+ fwrite(out, 1, BUFLEN - strm->avail_out, gz->file);
+ } while (strm->avail_out == 0);
+ return len;
}
int gzread OF((gzFile, void *, unsigned));
int gzread(gz, buf, len)
- gzFile gz;
- void *buf;
- unsigned len;
+ gzFile gz;
+ void *buf;
+ unsigned len;
{
- int ret;
- unsigned got;
- unsigned char in[1];
- z_stream *strm;
-
- if (gz == NULL || gz->write)
- return 0;
- if (gz->err)
- return 0;
- strm = &(gz->strm);
- strm->next_out = (void *)buf;
- strm->avail_out = len;
- do {
- got = fread(in, 1, 1, gz->file);
- if (got == 0)
- break;
- strm->next_in = in;
- strm->avail_in = 1;
- ret = inflate(strm, Z_NO_FLUSH);
- if (ret == Z_DATA_ERROR) {
- gz->err = Z_DATA_ERROR;
- gz->msg = strm->msg;
- return 0;
- }
- if (ret == Z_STREAM_END)
- inflateReset(strm);
- } while (strm->avail_out);
- return len - strm->avail_out;
+ int ret;
+ unsigned got;
+ unsigned char in[1];
+ z_stream *strm;
+
+ if (gz == NULL || gz->write)
+ return 0;
+ if (gz->err)
+ return 0;
+ strm = &(gz->strm);
+ strm->next_out = (void *)buf;
+ strm->avail_out = len;
+ do {
+ got = fread(in, 1, 1, gz->file);
+ if (got == 0)
+ break;
+ strm->next_in = in;
+ strm->avail_in = 1;
+ ret = inflate(strm, Z_NO_FLUSH);
+ if (ret == Z_DATA_ERROR) {
+ gz->err = Z_DATA_ERROR;
+ gz->msg = strm->msg;
+ return 0;
+ }
+ if (ret == Z_STREAM_END)
+ inflateReset(strm);
+ } while (strm->avail_out);
+ return len - strm->avail_out;
}
int gzclose OF((gzFile));
int gzclose(gz)
- gzFile gz;
+ gzFile gz;
{
- z_stream *strm;
- unsigned char out[BUFLEN];
-
- if (gz == NULL)
- return Z_STREAM_ERROR;
- strm = &(gz->strm);
- if (gz->write) {
- strm->next_in = Z_NULL;
- strm->avail_in = 0;
- do {
- strm->next_out = out;
- strm->avail_out = BUFLEN;
- (void)deflate(strm, Z_FINISH);
- fwrite(out, 1, BUFLEN - strm->avail_out, gz->file);
- } while (strm->avail_out == 0);
- deflateEnd(strm);
- }
- else
- inflateEnd(strm);
- fclose(gz->file);
- free(gz);
- return Z_OK;
+ z_stream *strm;
+ unsigned char out[BUFLEN];
+
+ if (gz == NULL)
+ return Z_STREAM_ERROR;
+ strm = &(gz->strm);
+ if (gz->write) {
+ strm->next_in = Z_NULL;
+ strm->avail_in = 0;
+ do {
+ strm->next_out = out;
+ strm->avail_out = BUFLEN;
+ (void)deflate(strm, Z_FINISH);
+ fwrite(out, 1, BUFLEN - strm->avail_out, gz->file);
+ } while (strm->avail_out == 0);
+ deflateEnd(strm);
+ }
+ else
+ inflateEnd(strm);
+ fclose(gz->file);
+ free(gz);
+ return Z_OK;
}
const char *gzerror OF((gzFile, int *));
const char *gzerror(gz, err)
- gzFile gz;
- int *err;
+ gzFile gz;
+ int *err;
{
- *err = gz->err;
- return gz->msg;
+ *err = gz->err;
+ return gz->msg;
}
#endif
@@ -345,10 +345,10 @@ int main OF((int argc, char *argv[]));
* Display error message and exit
*/
void error(msg)
- const char *msg;
+ const char *msg;
{
- fprintf(stderr, "%s: %s\n", prog, msg);
- exit(1);
+ fprintf(stderr, "%s: %s\n", prog, msg);
+ exit(1);
}
/* ===========================================================================
@@ -356,31 +356,31 @@ void error(msg)
*/
void gz_compress(in, out)
- FILE *in;
- gzFile out;
+ FILE *in;
+ gzFile out;
{
- local char buf[BUFLEN];
- int len;
- int err;
+ local char buf[BUFLEN];
+ int len;
+ int err;
#ifdef USE_MMAP
- /* Try first compressing with mmap. If mmap fails (minigzip used in a
- * pipe), use the normal fread loop.
- */
- if (gz_compress_mmap(in, out) == Z_OK) return;
+ /* Try first compressing with mmap. If mmap fails (minigzip used in a
+ * pipe), use the normal fread loop.
+ */
+ if (gz_compress_mmap(in, out) == Z_OK) return;
#endif
- for (;;) {
- len = (int)fread(buf, 1, sizeof(buf), in);
- if (ferror(in)) {
- perror("fread");
- exit(1);
- }
- if (len == 0) break;
-
- if (gzwrite(out, buf, (unsigned)len) != len) error(gzerror(out, &err));
- }
- fclose(in);
- if (gzclose(out) != Z_OK) error("failed gzclose");
+ for (;;) {
+ len = (int)fread(buf, 1, sizeof(buf), in);
+ if (ferror(in)) {
+ perror("fread");
+ exit(1);
+ }
+ if (len == 0) break;
+
+ if (gzwrite(out, buf, (unsigned)len) != len) error(gzerror(out, &err));
+ }
+ fclose(in);
+ if (gzclose(out) != Z_OK) error("failed gzclose");
}
#ifdef USE_MMAP /* MMAP version, Miguel Albrecht <malbrech@eso.org> */
@@ -389,34 +389,34 @@ void gz_compress(in, out)
* if success, Z_ERRNO otherwise.
*/
int gz_compress_mmap(in, out)
- FILE *in;
- gzFile out;
+ FILE *in;
+ gzFile out;
{
- int len;
- int err;
- int ifd = fileno(in);
- caddr_t buf; /* mmap'ed buffer for the entire input file */
- off_t buf_len; /* length of the input file */
- struct stat sb;
-
- /* Determine the size of the file, needed for mmap: */
- if (fstat(ifd, &sb) < 0) return Z_ERRNO;
- buf_len = sb.st_size;
- if (buf_len <= 0) return Z_ERRNO;
-
- /* Now do the actual mmap: */
- buf = mmap((caddr_t) 0, buf_len, PROT_READ, MAP_SHARED, ifd, (off_t)0);
- if (buf == (caddr_t)(-1)) return Z_ERRNO;
-
- /* Compress the whole file at once: */
- len = gzwrite(out, (char *)buf, (unsigned)buf_len);
-
- if (len != (int)buf_len) error(gzerror(out, &err));
-
- munmap(buf, buf_len);
- fclose(in);
- if (gzclose(out) != Z_OK) error("failed gzclose");
- return Z_OK;
+ int len;
+ int err;
+ int ifd = fileno(in);
+ caddr_t buf; /* mmap'ed buffer for the entire input file */
+ off_t buf_len; /* length of the input file */
+ struct stat sb;
+
+ /* Determine the size of the file, needed for mmap: */
+ if (fstat(ifd, &sb) < 0) return Z_ERRNO;
+ buf_len = sb.st_size;
+ if (buf_len <= 0) return Z_ERRNO;
+
+ /* Now do the actual mmap: */
+ buf = mmap((caddr_t) 0, buf_len, PROT_READ, MAP_SHARED, ifd, (off_t)0);
+ if (buf == (caddr_t)(-1)) return Z_ERRNO;
+
+ /* Compress the whole file at once: */
+ len = gzwrite(out, (char *)buf, (unsigned)buf_len);
+
+ if (len != (int)buf_len) error(gzerror(out, &err));
+
+ munmap(buf, buf_len);
+ fclose(in);
+ if (gzclose(out) != Z_OK) error("failed gzclose");
+ return Z_OK;
}
#endif /* USE_MMAP */
@@ -424,25 +424,25 @@ int gz_compress_mmap(in, out)
* Uncompress input to output then close both files.
*/
void gz_uncompress(in, out)
- gzFile in;
- FILE *out;
+ gzFile in;
+ FILE *out;
{
- local char buf[BUFLEN];
- int len;
- int err;
-
- for (;;) {
- len = gzread(in, buf, sizeof(buf));
- if (len < 0) error (gzerror(in, &err));
- if (len == 0) break;
-
- if ((int)fwrite(buf, 1, (unsigned)len, out) != len) {
- error("failed fwrite");
- }
- }
- if (fclose(out)) error("failed fclose");
-
- if (gzclose(in) != Z_OK) error("failed gzclose");
+ local char buf[BUFLEN];
+ int len;
+ int err;
+
+ for (;;) {
+ len = gzread(in, buf, sizeof(buf));
+ if (len < 0) error (gzerror(in, &err));
+ if (len == 0) break;
+
+ if ((int)fwrite(buf, 1, (unsigned)len, out) != len) {
+ error("failed fwrite");
+ }
+ }
+ if (fclose(out)) error("failed fclose");
+
+ if (gzclose(in) != Z_OK) error("failed gzclose");
}
@@ -451,34 +451,34 @@ void gz_uncompress(in, out)
* original.
*/
void file_compress(file, mode)
- char *file;
- char *mode;
+ char *file;
+ char *mode;
{
- local char outfile[MAX_NAME_LEN];
- FILE *in;
- gzFile out;
-
- if (strlen(file) + strlen(GZ_SUFFIX) >= sizeof(outfile)) {
- fprintf(stderr, "%s: filename too long\n", prog);
- exit(1);
- }
-
- strcpy(outfile, file);
- strcat(outfile, GZ_SUFFIX);
-
- in = fopen(file, "rb");
- if (in == NULL) {
- perror(file);
- exit(1);
- }
- out = gzopen(outfile, mode);
- if (out == NULL) {
- fprintf(stderr, "%s: can't gzopen %s\n", prog, outfile);
- exit(1);
- }
- gz_compress(in, out);
-
- unlink(file);
+ local char outfile[MAX_NAME_LEN];
+ FILE *in;
+ gzFile out;
+
+ if (strlen(file) + strlen(GZ_SUFFIX) >= sizeof(outfile)) {
+ fprintf(stderr, "%s: filename too long\n", prog);
+ exit(1);
+ }
+
+ strcpy(outfile, file);
+ strcat(outfile, GZ_SUFFIX);
+
+ in = fopen(file, "rb");
+ if (in == NULL) {
+ perror(file);
+ exit(1);
+ }
+ out = gzopen(outfile, mode);
+ if (out == NULL) {
+ fprintf(stderr, "%s: can't gzopen %s\n", prog, outfile);
+ exit(1);
+ }
+ gz_compress(in, out);
+
+ unlink(file);
}
@@ -486,44 +486,44 @@ void file_compress(file, mode)
* Uncompress the given file and remove the original.
*/
void file_uncompress(file)
- char *file;
+ char *file;
{
- local char buf[MAX_NAME_LEN];
- char *infile, *outfile;
- FILE *out;
- gzFile in;
- size_t len = strlen(file);
-
- if (len + strlen(GZ_SUFFIX) >= sizeof(buf)) {
- fprintf(stderr, "%s: filename too long\n", prog);
- exit(1);
- }
-
- strcpy(buf, file);
-
- if (len > SUFFIX_LEN && strcmp(file+len-SUFFIX_LEN, GZ_SUFFIX) == 0) {
- infile = file;
- outfile = buf;
- outfile[len-3] = '\0';
- } else {
- outfile = file;
- infile = buf;
- strcat(infile, GZ_SUFFIX);
- }
- in = gzopen(infile, "rb");
- if (in == NULL) {
- fprintf(stderr, "%s: can't gzopen %s\n", prog, infile);
- exit(1);
- }
- out = fopen(outfile, "wb");
- if (out == NULL) {
- perror(file);
- exit(1);
- }
-
- gz_uncompress(in, out);
-
- unlink(infile);
+ local char buf[MAX_NAME_LEN];
+ char *infile, *outfile;
+ FILE *out;
+ gzFile in;
+ size_t len = strlen(file);
+
+ if (len + strlen(GZ_SUFFIX) >= sizeof(buf)) {
+ fprintf(stderr, "%s: filename too long\n", prog);
+ exit(1);
+ }
+
+ strcpy(buf, file);
+
+ if (len > SUFFIX_LEN && strcmp(file+len-SUFFIX_LEN, GZ_SUFFIX) == 0) {
+ infile = file;
+ outfile = buf;
+ outfile[len-3] = '\0';
+ } else {
+ outfile = file;
+ infile = buf;
+ strcat(infile, GZ_SUFFIX);
+ }
+ in = gzopen(infile, "rb");
+ if (in == NULL) {
+ fprintf(stderr, "%s: can't gzopen %s\n", prog, infile);
+ exit(1);
+ }
+ out = fopen(outfile, "wb");
+ if (out == NULL) {
+ perror(file);
+ exit(1);
+ }
+
+ gz_uncompress(in, out);
+
+ unlink(infile);
}
@@ -538,94 +538,94 @@ void file_uncompress(file)
*/
int main(argc, argv)
- int argc;
- char *argv[];
+ int argc;
+ char *argv[];
{
- int copyout = 0;
- int uncompr = 0;
- gzFile file;
- char *bname, outmode[20];
-
- strcpy(outmode, "wb6 ");
-
- prog = argv[0];
- bname = strrchr(argv[0], '/');
- if (bname)
- bname++;
- else
- bname = argv[0];
- argc--, argv++;
-
- if (!strcmp(bname, "gunzip"))
- uncompr = 1;
- else if (!strcmp(bname, "zcat"))
- copyout = uncompr = 1;
-
- while (argc > 0) {
- if (strcmp(*argv, "-c") == 0)
- copyout = 1;
- else if (strcmp(*argv, "-d") == 0)
- uncompr = 1;
- else if (strcmp(*argv, "-f") == 0)
- outmode[3] = 'f';
- else if (strcmp(*argv, "-h") == 0)
- outmode[3] = 'h';
- else if (strcmp(*argv, "-r") == 0)
- outmode[3] = 'R';
- else if ((*argv)[0] == '-' && (*argv)[1] >= '1' && (*argv)[1] <= '9' &&
- (*argv)[2] == 0)
- outmode[2] = (*argv)[1];
- else
- break;
- argc--, argv++;
- }
- if (outmode[3] == ' ')
- outmode[3] = 0;
- if (argc == 0) {
- SET_BINARY_MODE(stdin);
- SET_BINARY_MODE(stdout);
- if (uncompr) {
- file = gzdopen(fileno(stdin), "rb");
- if (file == NULL) error("can't gzdopen stdin");
- gz_uncompress(file, stdout);
- } else {
- file = gzdopen(fileno(stdout), outmode);
- if (file == NULL) error("can't gzdopen stdout");
- gz_compress(stdin, file);
- }
- } else {
- if (copyout) {
- SET_BINARY_MODE(stdout);
- }
- do {
- if (uncompr) {
- if (copyout) {
- file = gzopen(*argv, "rb");
- if (file == NULL)
- fprintf(stderr, "%s: can't gzopen %s\n", prog, *argv);
- else
- gz_uncompress(file, stdout);
- } else {
- file_uncompress(*argv);
- }
- } else {
- if (copyout) {
- FILE * in = fopen(*argv, "rb");
-
- if (in == NULL) {
- perror(*argv);
- } else {
- file = gzdopen(fileno(stdout), outmode);
- if (file == NULL) error("can't gzdopen stdout");
-
- gz_compress(in, file);
- }
-
- } else {
- file_compress(*argv, outmode);
- }
- }
- } while (argv++, --argc);
- }
- return 0;
+ int copyout = 0;
+ int uncompr = 0;
+ gzFile file;
+ char *bname, outmode[20];
+
+ strcpy(outmode, "wb6 ");
+
+ prog = argv[0];
+ bname = strrchr(argv[0], '/');
+ if (bname)
+ bname++;
+ else
+ bname = argv[0];
+ argc--, argv++;
+
+ if (!strcmp(bname, "gunzip"))
+ uncompr = 1;
+ else if (!strcmp(bname, "zcat"))
+ copyout = uncompr = 1;
+
+ while (argc > 0) {
+ if (strcmp(*argv, "-c") == 0)
+ copyout = 1;
+ else if (strcmp(*argv, "-d") == 0)
+ uncompr = 1;
+ else if (strcmp(*argv, "-f") == 0)
+ outmode[3] = 'f';
+ else if (strcmp(*argv, "-h") == 0)
+ outmode[3] = 'h';
+ else if (strcmp(*argv, "-r") == 0)
+ outmode[3] = 'R';
+ else if ((*argv)[0] == '-' && (*argv)[1] >= '1' && (*argv)[1] <= '9' &&
+ (*argv)[2] == 0)
+ outmode[2] = (*argv)[1];
+ else
+ break;
+ argc--, argv++;
+ }
+ if (outmode[3] == ' ')
+ outmode[3] = 0;
+ if (argc == 0) {
+ SET_BINARY_MODE(stdin);
+ SET_BINARY_MODE(stdout);
+ if (uncompr) {
+ file = gzdopen(fileno(stdin), "rb");
+ if (file == NULL) error("can't gzdopen stdin");
+ gz_uncompress(file, stdout);
+ } else {
+ file = gzdopen(fileno(stdout), outmode);
+ if (file == NULL) error("can't gzdopen stdout");
+ gz_compress(stdin, file);
+ }
+ } else {
+ if (copyout) {
+ SET_BINARY_MODE(stdout);
+ }
+ do {
+ if (uncompr) {
+ if (copyout) {
+ file = gzopen(*argv, "rb");
+ if (file == NULL)
+ fprintf(stderr, "%s: can't gzopen %s\n", prog, *argv);
+ else
+ gz_uncompress(file, stdout);
+ } else {
+ file_uncompress(*argv);
+ }
+ } else {
+ if (copyout) {
+ FILE * in = fopen(*argv, "rb");
+
+ if (in == NULL) {
+ perror(*argv);
+ } else {
+ file = gzdopen(fileno(stdout), outmode);
+ if (file == NULL) error("can't gzdopen stdout");
+
+ gz_compress(in, file);
+ }
+
+ } else {
+ file_compress(*argv, outmode);
+ }
+ }
+ } while (argv++, --argc);
+ }
+ return 0;
}
diff --git a/src/lib/zlib/trees.c b/src/lib/zlib/trees.c
index 8c32b214b1d..e0ed1641a70 100644
--- a/src/lib/zlib/trees.c
+++ b/src/lib/zlib/trees.c
@@ -60,16 +60,16 @@
/* repeat a zero length 11-138 times (7 bits of repeat count) */
local const int extra_lbits[LENGTH_CODES] /* extra bits for each length code */
- = {0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,3,3,3,3,4,4,4,4,5,5,5,5,0};
+ = {0,0,0,0,0,0,0,0,1,1,1,1,2,2,2,2,3,3,3,3,4,4,4,4,5,5,5,5,0};
local const int extra_dbits[D_CODES] /* extra bits for each distance code */
- = {0,0,0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9,10,10,11,11,12,12,13,13};
+ = {0,0,0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,8,8,9,9,10,10,11,11,12,12,13,13};
local const int extra_blbits[BL_CODES]/* extra bits for each bit length code */
- = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,3,7};
+ = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,2,3,7};
local const uch bl_order[BL_CODES]
- = {16,17,18,0,8,7,9,6,10,5,11,4,12,3,13,2,14,1,15};
+ = {16,17,18,0,8,7,9,6,10,5,11,4,12,3,13,2,14,1,15};
/* The lengths of the bit length codes are sent in order of decreasing
* probability, to avoid transmitting the lengths for unused bit length codes.
*/
@@ -115,11 +115,11 @@ local int base_dist[D_CODES];
#endif /* GEN_TREES_H */
struct static_tree_desc_s {
- const ct_data *static_tree; /* static tree or NULL */
- const intf *extra_bits; /* extra bits for each code or NULL */
- int extra_base; /* base index for extra_bits */
- int elems; /* max number of elements in the tree */
- int max_length; /* max bit length for the codes */
+ const ct_data *static_tree; /* static tree or NULL */
+ const intf *extra_bits; /* extra bits for each code or NULL */
+ int extra_base; /* base index for extra_bits */
+ int elems; /* max number of elements in the tree */
+ int max_length; /* max bit length for the codes */
};
local static_tree_desc static_l_desc =
@@ -145,15 +145,15 @@ local void scan_tree OF((deflate_state *s, ct_data *tree, int max_code));
local void send_tree OF((deflate_state *s, ct_data *tree, int max_code));
local int build_bl_tree OF((deflate_state *s));
local void send_all_trees OF((deflate_state *s, int lcodes, int dcodes,
- int blcodes));
+ int blcodes));
local void compress_block OF((deflate_state *s, ct_data *ltree,
- ct_data *dtree));
+ ct_data *dtree));
local int detect_data_type OF((deflate_state *s));
local unsigned bi_reverse OF((unsigned value, int length));
local void bi_windup OF((deflate_state *s));
local void bi_flush OF((deflate_state *s));
local void copy_block OF((deflate_state *s, charf *buf, unsigned len,
- int header));
+ int header));
#ifdef GEN_TREES_H
local void gen_trees_header OF((void));
@@ -161,12 +161,12 @@ local void gen_trees_header OF((void));
#ifndef DEBUG
# define send_code(s, c, tree) send_bits(s, tree[c].Code, tree[c].Len)
- /* Send a code of the given tree. c and tree must not have side effects */
+ /* Send a code of the given tree. c and tree must not have side effects */
#else /* DEBUG */
# define send_code(s, c, tree) \
- { if (z_verbose>2) fprintf(stderr,"\ncd %3d ",(c)); \
- send_bits(s, tree[c].Code, tree[c].Len); }
+ { if (z_verbose>2) fprintf(stderr,"\ncd %3d ",(c)); \
+ send_bits(s, tree[c].Code, tree[c].Len); }
#endif
/* ===========================================================================
@@ -174,8 +174,8 @@ local void gen_trees_header OF((void));
* IN assertion: there is enough room in pendingBuf.
*/
#define put_short(s, w) { \
- put_byte(s, (uch)((w) & 0xff)); \
- put_byte(s, (uch)((ush)(w) >> 8)); \
+ put_byte(s, (uch)((w) & 0xff)); \
+ put_byte(s, (uch)((ush)(w) >> 8)); \
}
/* ===========================================================================
@@ -186,42 +186,42 @@ local void gen_trees_header OF((void));
local void send_bits OF((deflate_state *s, int value, int length));
local void send_bits(s, value, length)
- deflate_state *s;
- int value; /* value to send */
- int length; /* number of bits */
+ deflate_state *s;
+ int value; /* value to send */
+ int length; /* number of bits */
{
- Tracevv((stderr," l %2d v %4x ", length, value));
- Assert(length > 0 && length <= 15, "invalid length");
- s->bits_sent += (ulg)length;
-
- /* If not enough room in bi_buf, use (valid) bits from bi_buf and
- * (16 - bi_valid) bits from value, leaving (width - (16-bi_valid))
- * unused bits in value.
- */
- if (s->bi_valid > (int)Buf_size - length) {
- s->bi_buf |= (ush)value << s->bi_valid;
- put_short(s, s->bi_buf);
- s->bi_buf = (ush)value >> (Buf_size - s->bi_valid);
- s->bi_valid += length - Buf_size;
- } else {
- s->bi_buf |= (ush)value << s->bi_valid;
- s->bi_valid += length;
- }
+ Tracevv((stderr," l %2d v %4x ", length, value));
+ Assert(length > 0 && length <= 15, "invalid length");
+ s->bits_sent += (ulg)length;
+
+ /* If not enough room in bi_buf, use (valid) bits from bi_buf and
+ * (16 - bi_valid) bits from value, leaving (width - (16-bi_valid))
+ * unused bits in value.
+ */
+ if (s->bi_valid > (int)Buf_size - length) {
+ s->bi_buf |= (ush)value << s->bi_valid;
+ put_short(s, s->bi_buf);
+ s->bi_buf = (ush)value >> (Buf_size - s->bi_valid);
+ s->bi_valid += length - Buf_size;
+ } else {
+ s->bi_buf |= (ush)value << s->bi_valid;
+ s->bi_valid += length;
+ }
}
#else /* !DEBUG */
#define send_bits(s, value, length) \
{ int len = length;\
- if (s->bi_valid > (int)Buf_size - len) {\
- int val = value;\
- s->bi_buf |= (ush)val << s->bi_valid;\
- put_short(s, s->bi_buf);\
- s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\
- s->bi_valid += len - Buf_size;\
- } else {\
- s->bi_buf |= (ush)(value) << s->bi_valid;\
- s->bi_valid += len;\
- }\
+ if (s->bi_valid > (int)Buf_size - len) {\
+ int val = value;\
+ s->bi_buf |= (ush)val << s->bi_valid;\
+ put_short(s, s->bi_buf);\
+ s->bi_buf = (ush)val >> (Buf_size - s->bi_valid);\
+ s->bi_valid += len - Buf_size;\
+ } else {\
+ s->bi_buf |= (ush)(value) << s->bi_valid;\
+ s->bi_valid += len;\
+ }\
}
#endif /* DEBUG */
@@ -234,81 +234,81 @@ local void send_bits(s, value, length)
local void tr_static_init()
{
#if defined(GEN_TREES_H) || !defined(STDC)
- static int static_init_done = 0;
- int n; /* iterates over tree elements */
- int bits; /* bit counter */
- int length; /* length value */
- int code; /* code value */
- int dist; /* distance index */
- ush bl_count[MAX_BITS+1];
- /* number of codes at each bit length for an optimal tree */
-
- if (static_init_done) return;
-
- /* For some embedded targets, global variables are not initialized: */
+ static int static_init_done = 0;
+ int n; /* iterates over tree elements */
+ int bits; /* bit counter */
+ int length; /* length value */
+ int code; /* code value */
+ int dist; /* distance index */
+ ush bl_count[MAX_BITS+1];
+ /* number of codes at each bit length for an optimal tree */
+
+ if (static_init_done) return;
+
+ /* For some embedded targets, global variables are not initialized: */
#ifdef NO_INIT_GLOBAL_POINTERS
- static_l_desc.static_tree = static_ltree;
- static_l_desc.extra_bits = extra_lbits;
- static_d_desc.static_tree = static_dtree;
- static_d_desc.extra_bits = extra_dbits;
- static_bl_desc.extra_bits = extra_blbits;
+ static_l_desc.static_tree = static_ltree;
+ static_l_desc.extra_bits = extra_lbits;
+ static_d_desc.static_tree = static_dtree;
+ static_d_desc.extra_bits = extra_dbits;
+ static_bl_desc.extra_bits = extra_blbits;
#endif
- /* Initialize the mapping length (0..255) -> length code (0..28) */
- length = 0;
- for (code = 0; code < LENGTH_CODES-1; code++) {
- base_length[code] = length;
- for (n = 0; n < (1<<extra_lbits[code]); n++) {
- _length_code[length++] = (uch)code;
- }
- }
- Assert (length == 256, "tr_static_init: length != 256");
- /* Note that the length 255 (match length 258) can be represented
- * in two different ways: code 284 + 5 bits or code 285, so we
- * overwrite length_code[255] to use the best encoding:
- */
- _length_code[length-1] = (uch)code;
-
- /* Initialize the mapping dist (0..32K) -> dist code (0..29) */
- dist = 0;
- for (code = 0 ; code < 16; code++) {
- base_dist[code] = dist;
- for (n = 0; n < (1<<extra_dbits[code]); n++) {
- _dist_code[dist++] = (uch)code;
- }
- }
- Assert (dist == 256, "tr_static_init: dist != 256");
- dist >>= 7; /* from now on, all distances are divided by 128 */
- for ( ; code < D_CODES; code++) {
- base_dist[code] = dist << 7;
- for (n = 0; n < (1<<(extra_dbits[code]-7)); n++) {
- _dist_code[256 + dist++] = (uch)code;
- }
- }
- Assert (dist == 256, "tr_static_init: 256+dist != 512");
-
- /* Construct the codes of the static literal tree */
- for (bits = 0; bits <= MAX_BITS; bits++) bl_count[bits] = 0;
- n = 0;
- while (n <= 143) static_ltree[n++].Len = 8, bl_count[8]++;
- while (n <= 255) static_ltree[n++].Len = 9, bl_count[9]++;
- while (n <= 279) static_ltree[n++].Len = 7, bl_count[7]++;
- while (n <= 287) static_ltree[n++].Len = 8, bl_count[8]++;
- /* Codes 286 and 287 do not exist, but we must include them in the
- * tree construction to get a canonical Huffman tree (longest code
- * all ones)
- */
- gen_codes((ct_data *)static_ltree, L_CODES+1, bl_count);
-
- /* The static distance tree is trivial: */
- for (n = 0; n < D_CODES; n++) {
- static_dtree[n].Len = 5;
- static_dtree[n].Code = bi_reverse((unsigned)n, 5);
- }
- static_init_done = 1;
+ /* Initialize the mapping length (0..255) -> length code (0..28) */
+ length = 0;
+ for (code = 0; code < LENGTH_CODES-1; code++) {
+ base_length[code] = length;
+ for (n = 0; n < (1<<extra_lbits[code]); n++) {
+ _length_code[length++] = (uch)code;
+ }
+ }
+ Assert (length == 256, "tr_static_init: length != 256");
+ /* Note that the length 255 (match length 258) can be represented
+ * in two different ways: code 284 + 5 bits or code 285, so we
+ * overwrite length_code[255] to use the best encoding:
+ */
+ _length_code[length-1] = (uch)code;
+
+ /* Initialize the mapping dist (0..32K) -> dist code (0..29) */
+ dist = 0;
+ for (code = 0 ; code < 16; code++) {
+ base_dist[code] = dist;
+ for (n = 0; n < (1<<extra_dbits[code]); n++) {
+ _dist_code[dist++] = (uch)code;
+ }
+ }
+ Assert (dist == 256, "tr_static_init: dist != 256");
+ dist >>= 7; /* from now on, all distances are divided by 128 */
+ for ( ; code < D_CODES; code++) {
+ base_dist[code] = dist << 7;
+ for (n = 0; n < (1<<(extra_dbits[code]-7)); n++) {
+ _dist_code[256 + dist++] = (uch)code;
+ }
+ }
+ Assert (dist == 256, "tr_static_init: 256+dist != 512");
+
+ /* Construct the codes of the static literal tree */
+ for (bits = 0; bits <= MAX_BITS; bits++) bl_count[bits] = 0;
+ n = 0;
+ while (n <= 143) static_ltree[n++].Len = 8, bl_count[8]++;
+ while (n <= 255) static_ltree[n++].Len = 9, bl_count[9]++;
+ while (n <= 279) static_ltree[n++].Len = 7, bl_count[7]++;
+ while (n <= 287) static_ltree[n++].Len = 8, bl_count[8]++;
+ /* Codes 286 and 287 do not exist, but we must include them in the
+ * tree construction to get a canonical Huffman tree (longest code
+ * all ones)
+ */
+ gen_codes((ct_data *)static_ltree, L_CODES+1, bl_count);
+
+ /* The static distance tree is trivial: */
+ for (n = 0; n < D_CODES; n++) {
+ static_dtree[n].Len = 5;
+ static_dtree[n].Code = bi_reverse((unsigned)n, 5);
+ }
+ static_init_done = 1;
# ifdef GEN_TREES_H
- gen_trees_header();
+ gen_trees_header();
# endif
#endif /* defined(GEN_TREES_H) || !defined(STDC) */
}
@@ -322,56 +322,56 @@ local void tr_static_init()
# endif
# define SEPARATOR(i, last, width) \
- ((i) == (last)? "\n};\n\n" : \
- ((i) % (width) == (width)-1 ? ",\n" : ", "))
+ ((i) == (last)? "\n};\n\n" : \
+ ((i) % (width) == (width)-1 ? ",\n" : ", "))
void gen_trees_header()
{
- FILE *header = fopen("trees.h", "w");
- int i;
-
- Assert (header != NULL, "Can't open trees.h");
- fprintf(header,
- "/* header created automatically with -DGEN_TREES_H */\n\n");
-
- fprintf(header, "local const ct_data static_ltree[L_CODES+2] = {\n");
- for (i = 0; i < L_CODES+2; i++) {
- fprintf(header, "{{%3u},{%3u}}%s", static_ltree[i].Code,
- static_ltree[i].Len, SEPARATOR(i, L_CODES+1, 5));
- }
-
- fprintf(header, "local const ct_data static_dtree[D_CODES] = {\n");
- for (i = 0; i < D_CODES; i++) {
- fprintf(header, "{{%2u},{%2u}}%s", static_dtree[i].Code,
- static_dtree[i].Len, SEPARATOR(i, D_CODES-1, 5));
- }
-
- fprintf(header, "const uch ZLIB_INTERNAL _dist_code[DIST_CODE_LEN] = {\n");
- for (i = 0; i < DIST_CODE_LEN; i++) {
- fprintf(header, "%2u%s", _dist_code[i],
- SEPARATOR(i, DIST_CODE_LEN-1, 20));
- }
-
- fprintf(header,
- "const uch ZLIB_INTERNAL _length_code[MAX_MATCH-MIN_MATCH+1]= {\n");
- for (i = 0; i < MAX_MATCH-MIN_MATCH+1; i++) {
- fprintf(header, "%2u%s", _length_code[i],
- SEPARATOR(i, MAX_MATCH-MIN_MATCH, 20));
- }
-
- fprintf(header, "local const int base_length[LENGTH_CODES] = {\n");
- for (i = 0; i < LENGTH_CODES; i++) {
- fprintf(header, "%1u%s", base_length[i],
- SEPARATOR(i, LENGTH_CODES-1, 20));
- }
-
- fprintf(header, "local const int base_dist[D_CODES] = {\n");
- for (i = 0; i < D_CODES; i++) {
- fprintf(header, "%5u%s", base_dist[i],
- SEPARATOR(i, D_CODES-1, 10));
- }
-
- fclose(header);
+ FILE *header = fopen("trees.h", "w");
+ int i;
+
+ Assert (header != NULL, "Can't open trees.h");
+ fprintf(header,
+ "/* header created automatically with -DGEN_TREES_H */\n\n");
+
+ fprintf(header, "local const ct_data static_ltree[L_CODES+2] = {\n");
+ for (i = 0; i < L_CODES+2; i++) {
+ fprintf(header, "{{%3u},{%3u}}%s", static_ltree[i].Code,
+ static_ltree[i].Len, SEPARATOR(i, L_CODES+1, 5));
+ }
+
+ fprintf(header, "local const ct_data static_dtree[D_CODES] = {\n");
+ for (i = 0; i < D_CODES; i++) {
+ fprintf(header, "{{%2u},{%2u}}%s", static_dtree[i].Code,
+ static_dtree[i].Len, SEPARATOR(i, D_CODES-1, 5));
+ }
+
+ fprintf(header, "const uch ZLIB_INTERNAL _dist_code[DIST_CODE_LEN] = {\n");
+ for (i = 0; i < DIST_CODE_LEN; i++) {
+ fprintf(header, "%2u%s", _dist_code[i],
+ SEPARATOR(i, DIST_CODE_LEN-1, 20));
+ }
+
+ fprintf(header,
+ "const uch ZLIB_INTERNAL _length_code[MAX_MATCH-MIN_MATCH+1]= {\n");
+ for (i = 0; i < MAX_MATCH-MIN_MATCH+1; i++) {
+ fprintf(header, "%2u%s", _length_code[i],
+ SEPARATOR(i, MAX_MATCH-MIN_MATCH, 20));
+ }
+
+ fprintf(header, "local const int base_length[LENGTH_CODES] = {\n");
+ for (i = 0; i < LENGTH_CODES; i++) {
+ fprintf(header, "%1u%s", base_length[i],
+ SEPARATOR(i, LENGTH_CODES-1, 20));
+ }
+
+ fprintf(header, "local const int base_dist[D_CODES] = {\n");
+ for (i = 0; i < D_CODES; i++) {
+ fprintf(header, "%5u%s", base_dist[i],
+ SEPARATOR(i, D_CODES-1, 10));
+ }
+
+ fclose(header);
}
#endif /* GEN_TREES_H */
@@ -379,46 +379,46 @@ void gen_trees_header()
* Initialize the tree data structures for a new zlib stream.
*/
void ZLIB_INTERNAL _tr_init(s)
- deflate_state *s;
+ deflate_state *s;
{
- tr_static_init();
+ tr_static_init();
- s->l_desc.dyn_tree = s->dyn_ltree;
- s->l_desc.stat_desc = &static_l_desc;
+ s->l_desc.dyn_tree = s->dyn_ltree;
+ s->l_desc.stat_desc = &static_l_desc;
- s->d_desc.dyn_tree = s->dyn_dtree;
- s->d_desc.stat_desc = &static_d_desc;
+ s->d_desc.dyn_tree = s->dyn_dtree;
+ s->d_desc.stat_desc = &static_d_desc;
- s->bl_desc.dyn_tree = s->bl_tree;
- s->bl_desc.stat_desc = &static_bl_desc;
+ s->bl_desc.dyn_tree = s->bl_tree;
+ s->bl_desc.stat_desc = &static_bl_desc;
- s->bi_buf = 0;
- s->bi_valid = 0;
+ s->bi_buf = 0;
+ s->bi_valid = 0;
#ifdef DEBUG
- s->compressed_len = 0L;
- s->bits_sent = 0L;
+ s->compressed_len = 0L;
+ s->bits_sent = 0L;
#endif
- /* Initialize the first block of the first file: */
- init_block(s);
+ /* Initialize the first block of the first file: */
+ init_block(s);
}
/* ===========================================================================
* Initialize a new block.
*/
local void init_block(s)
- deflate_state *s;
+ deflate_state *s;
{
- int n; /* iterates over tree elements */
+ int n; /* iterates over tree elements */
- /* Initialize the trees. */
- for (n = 0; n < L_CODES; n++) s->dyn_ltree[n].Freq = 0;
- for (n = 0; n < D_CODES; n++) s->dyn_dtree[n].Freq = 0;
- for (n = 0; n < BL_CODES; n++) s->bl_tree[n].Freq = 0;
+ /* Initialize the trees. */
+ for (n = 0; n < L_CODES; n++) s->dyn_ltree[n].Freq = 0;
+ for (n = 0; n < D_CODES; n++) s->dyn_dtree[n].Freq = 0;
+ for (n = 0; n < BL_CODES; n++) s->bl_tree[n].Freq = 0;
- s->dyn_ltree[END_BLOCK].Freq = 1;
- s->opt_len = s->static_len = 0L;
- s->last_lit = s->matches = 0;
+ s->dyn_ltree[END_BLOCK].Freq = 1;
+ s->opt_len = s->static_len = 0L;
+ s->last_lit = s->matches = 0;
}
#define SMALLEST 1
@@ -431,9 +431,9 @@ local void init_block(s)
*/
#define pqremove(s, tree, top) \
{\
- top = s->heap[SMALLEST]; \
- s->heap[SMALLEST] = s->heap[s->heap_len--]; \
- pqdownheap(s, tree, SMALLEST); \
+ top = s->heap[SMALLEST]; \
+ s->heap[SMALLEST] = s->heap[s->heap_len--]; \
+ pqdownheap(s, tree, SMALLEST); \
}
/* ===========================================================================
@@ -441,8 +441,8 @@ local void init_block(s)
* the subtrees have equal frequency. This minimizes the worst case length.
*/
#define smaller(tree, n, m, depth) \
- (tree[n].Freq < tree[m].Freq || \
- (tree[n].Freq == tree[m].Freq && depth[n] <= depth[m]))
+ (tree[n].Freq < tree[m].Freq || \
+ (tree[n].Freq == tree[m].Freq && depth[n] <= depth[m]))
/* ===========================================================================
* Restore the heap property by moving down the tree starting at node k,
@@ -451,28 +451,28 @@ local void init_block(s)
* two sons).
*/
local void pqdownheap(s, tree, k)
- deflate_state *s;
- ct_data *tree; /* the tree to restore */
- int k; /* node to move down */
+ deflate_state *s;
+ ct_data *tree; /* the tree to restore */
+ int k; /* node to move down */
{
- int v = s->heap[k];
- int j = k << 1; /* left son of k */
- while (j <= s->heap_len) {
- /* Set j to the smallest of the two sons: */
- if (j < s->heap_len &&
- smaller(tree, s->heap[j+1], s->heap[j], s->depth)) {
- j++;
- }
- /* Exit if v is smaller than both sons */
- if (smaller(tree, v, s->heap[j], s->depth)) break;
-
- /* Exchange v with the smallest son */
- s->heap[k] = s->heap[j]; k = j;
-
- /* And continue down the tree, setting j to the left son of k */
- j <<= 1;
- }
- s->heap[k] = v;
+ int v = s->heap[k];
+ int j = k << 1; /* left son of k */
+ while (j <= s->heap_len) {
+ /* Set j to the smallest of the two sons: */
+ if (j < s->heap_len &&
+ smaller(tree, s->heap[j+1], s->heap[j], s->depth)) {
+ j++;
+ }
+ /* Exit if v is smaller than both sons */
+ if (smaller(tree, v, s->heap[j], s->depth)) break;
+
+ /* Exchange v with the smallest son */
+ s->heap[k] = s->heap[j]; k = j;
+
+ /* And continue down the tree, setting j to the left son of k */
+ j <<= 1;
+ }
+ s->heap[k] = v;
}
/* ===========================================================================
@@ -486,82 +486,82 @@ local void pqdownheap(s, tree, k)
* not null.
*/
local void gen_bitlen(s, desc)
- deflate_state *s;
- tree_desc *desc; /* the tree descriptor */
+ deflate_state *s;
+ tree_desc *desc; /* the tree descriptor */
{
- ct_data *tree = desc->dyn_tree;
- int max_code = desc->max_code;
- const ct_data *stree = desc->stat_desc->static_tree;
- const intf *extra = desc->stat_desc->extra_bits;
- int base = desc->stat_desc->extra_base;
- int max_length = desc->stat_desc->max_length;
- int h; /* heap index */
- int n, m; /* iterate over the tree elements */
- int bits; /* bit length */
- int xbits; /* extra bits */
- ush f; /* frequency */
- int overflow = 0; /* number of elements with bit length too large */
-
- for (bits = 0; bits <= MAX_BITS; bits++) s->bl_count[bits] = 0;
-
- /* In a first pass, compute the optimal bit lengths (which may
- * overflow in the case of the bit length tree).
- */
- tree[s->heap[s->heap_max]].Len = 0; /* root of the heap */
-
- for (h = s->heap_max+1; h < HEAP_SIZE; h++) {
- n = s->heap[h];
- bits = tree[tree[n].Dad].Len + 1;
- if (bits > max_length) bits = max_length, overflow++;
- tree[n].Len = (ush)bits;
- /* We overwrite tree[n].Dad which is no longer needed */
-
- if (n > max_code) continue; /* not a leaf node */
-
- s->bl_count[bits]++;
- xbits = 0;
- if (n >= base) xbits = extra[n-base];
- f = tree[n].Freq;
- s->opt_len += (ulg)f * (bits + xbits);
- if (stree) s->static_len += (ulg)f * (stree[n].Len + xbits);
- }
- if (overflow == 0) return;
-
- Trace((stderr,"\nbit length overflow\n"));
- /* This happens for example on obj2 and pic of the Calgary corpus */
-
- /* Find the first bit length which could increase: */
- do {
- bits = max_length-1;
- while (s->bl_count[bits] == 0) bits--;
- s->bl_count[bits]--; /* move one leaf down the tree */
- s->bl_count[bits+1] += 2; /* move one overflow item as its brother */
- s->bl_count[max_length]--;
- /* The brother of the overflow item also moves one step up,
- * but this does not affect bl_count[max_length]
- */
- overflow -= 2;
- } while (overflow > 0);
-
- /* Now recompute all bit lengths, scanning in increasing frequency.
- * h is still equal to HEAP_SIZE. (It is simpler to reconstruct all
- * lengths instead of fixing only the wrong ones. This idea is taken
- * from 'ar' written by Haruhiko Okumura.)
- */
- for (bits = max_length; bits != 0; bits--) {
- n = s->bl_count[bits];
- while (n != 0) {
- m = s->heap[--h];
- if (m > max_code) continue;
- if ((unsigned) tree[m].Len != (unsigned) bits) {
- Trace((stderr,"code %d bits %d->%d\n", m, tree[m].Len, bits));
- s->opt_len += ((long)bits - (long)tree[m].Len)
- *(long)tree[m].Freq;
- tree[m].Len = (ush)bits;
- }
- n--;
- }
- }
+ ct_data *tree = desc->dyn_tree;
+ int max_code = desc->max_code;
+ const ct_data *stree = desc->stat_desc->static_tree;
+ const intf *extra = desc->stat_desc->extra_bits;
+ int base = desc->stat_desc->extra_base;
+ int max_length = desc->stat_desc->max_length;
+ int h; /* heap index */
+ int n, m; /* iterate over the tree elements */
+ int bits; /* bit length */
+ int xbits; /* extra bits */
+ ush f; /* frequency */
+ int overflow = 0; /* number of elements with bit length too large */
+
+ for (bits = 0; bits <= MAX_BITS; bits++) s->bl_count[bits] = 0;
+
+ /* In a first pass, compute the optimal bit lengths (which may
+ * overflow in the case of the bit length tree).
+ */
+ tree[s->heap[s->heap_max]].Len = 0; /* root of the heap */
+
+ for (h = s->heap_max+1; h < HEAP_SIZE; h++) {
+ n = s->heap[h];
+ bits = tree[tree[n].Dad].Len + 1;
+ if (bits > max_length) bits = max_length, overflow++;
+ tree[n].Len = (ush)bits;
+ /* We overwrite tree[n].Dad which is no longer needed */
+
+ if (n > max_code) continue; /* not a leaf node */
+
+ s->bl_count[bits]++;
+ xbits = 0;
+ if (n >= base) xbits = extra[n-base];
+ f = tree[n].Freq;
+ s->opt_len += (ulg)f * (bits + xbits);
+ if (stree) s->static_len += (ulg)f * (stree[n].Len + xbits);
+ }
+ if (overflow == 0) return;
+
+ Trace((stderr,"\nbit length overflow\n"));
+ /* This happens for example on obj2 and pic of the Calgary corpus */
+
+ /* Find the first bit length which could increase: */
+ do {
+ bits = max_length-1;
+ while (s->bl_count[bits] == 0) bits--;
+ s->bl_count[bits]--; /* move one leaf down the tree */
+ s->bl_count[bits+1] += 2; /* move one overflow item as its brother */
+ s->bl_count[max_length]--;
+ /* The brother of the overflow item also moves one step up,
+ * but this does not affect bl_count[max_length]
+ */
+ overflow -= 2;
+ } while (overflow > 0);
+
+ /* Now recompute all bit lengths, scanning in increasing frequency.
+ * h is still equal to HEAP_SIZE. (It is simpler to reconstruct all
+ * lengths instead of fixing only the wrong ones. This idea is taken
+ * from 'ar' written by Haruhiko Okumura.)
+ */
+ for (bits = max_length; bits != 0; bits--) {
+ n = s->bl_count[bits];
+ while (n != 0) {
+ m = s->heap[--h];
+ if (m > max_code) continue;
+ if ((unsigned) tree[m].Len != (unsigned) bits) {
+ Trace((stderr,"code %d bits %d->%d\n", m, tree[m].Len, bits));
+ s->opt_len += ((long)bits - (long)tree[m].Len)
+ *(long)tree[m].Freq;
+ tree[m].Len = (ush)bits;
+ }
+ n--;
+ }
+ }
}
/* ===========================================================================
@@ -573,37 +573,37 @@ local void gen_bitlen(s, desc)
* zero code length.
*/
local void gen_codes (tree, max_code, bl_count)
- ct_data *tree; /* the tree to decorate */
- int max_code; /* largest code with non zero frequency */
- ushf *bl_count; /* number of codes at each bit length */
+ ct_data *tree; /* the tree to decorate */
+ int max_code; /* largest code with non zero frequency */
+ ushf *bl_count; /* number of codes at each bit length */
{
- ush next_code[MAX_BITS+1]; /* next code value for each bit length */
- ush code = 0; /* running code value */
- int bits; /* bit index */
- int n; /* code index */
-
- /* The distribution counts are first used to generate the code values
- * without bit reversal.
- */
- for (bits = 1; bits <= MAX_BITS; bits++) {
- next_code[bits] = code = (code + bl_count[bits-1]) << 1;
- }
- /* Check that the bit counts in bl_count are consistent. The last code
- * must be all ones.
- */
- Assert (code + bl_count[MAX_BITS]-1 == (1<<MAX_BITS)-1,
- "inconsistent bit counts");
- Tracev((stderr,"\ngen_codes: max_code %d ", max_code));
-
- for (n = 0; n <= max_code; n++) {
- int len = tree[n].Len;
- if (len == 0) continue;
- /* Now reverse the bits */
- tree[n].Code = bi_reverse(next_code[len]++, len);
-
- Tracecv(tree != static_ltree, (stderr,"\nn %3d %c l %2d c %4x (%x) ",
- n, (isgraph(n) ? n : ' '), len, tree[n].Code, next_code[len]-1));
- }
+ ush next_code[MAX_BITS+1]; /* next code value for each bit length */
+ ush code = 0; /* running code value */
+ int bits; /* bit index */
+ int n; /* code index */
+
+ /* The distribution counts are first used to generate the code values
+ * without bit reversal.
+ */
+ for (bits = 1; bits <= MAX_BITS; bits++) {
+ next_code[bits] = code = (code + bl_count[bits-1]) << 1;
+ }
+ /* Check that the bit counts in bl_count are consistent. The last code
+ * must be all ones.
+ */
+ Assert (code + bl_count[MAX_BITS]-1 == (1<<MAX_BITS)-1,
+ "inconsistent bit counts");
+ Tracev((stderr,"\ngen_codes: max_code %d ", max_code));
+
+ for (n = 0; n <= max_code; n++) {
+ int len = tree[n].Len;
+ if (len == 0) continue;
+ /* Now reverse the bits */
+ tree[n].Code = bi_reverse(next_code[len]++, len);
+
+ Tracecv(tree != static_ltree, (stderr,"\nn %3d %c l %2d c %4x (%x) ",
+ n, (isgraph(n) ? n : ' '), len, tree[n].Code, next_code[len]-1));
+ }
}
/* ===========================================================================
@@ -615,87 +615,87 @@ local void gen_codes (tree, max_code, bl_count)
* also updated if stree is not null. The field max_code is set.
*/
local void build_tree(s, desc)
- deflate_state *s;
- tree_desc *desc; /* the tree descriptor */
+ deflate_state *s;
+ tree_desc *desc; /* the tree descriptor */
{
- ct_data *tree = desc->dyn_tree;
- const ct_data *stree = desc->stat_desc->static_tree;
- int elems = desc->stat_desc->elems;
- int n, m; /* iterate over heap elements */
- int max_code = -1; /* largest code with non zero frequency */
- int node; /* new node being created */
-
- /* Construct the initial heap, with least frequent element in
- * heap[SMALLEST]. The sons of heap[n] are heap[2*n] and heap[2*n+1].
- * heap[0] is not used.
- */
- s->heap_len = 0, s->heap_max = HEAP_SIZE;
-
- for (n = 0; n < elems; n++) {
- if (tree[n].Freq != 0) {
- s->heap[++(s->heap_len)] = max_code = n;
- s->depth[n] = 0;
- } else {
- tree[n].Len = 0;
- }
- }
-
- /* The pkzip format requires that at least one distance code exists,
- * and that at least one bit should be sent even if there is only one
- * possible code. So to avoid special checks later on we force at least
- * two codes of non zero frequency.
- */
- while (s->heap_len < 2) {
- node = s->heap[++(s->heap_len)] = (max_code < 2 ? ++max_code : 0);
- tree[node].Freq = 1;
- s->depth[node] = 0;
- s->opt_len--; if (stree) s->static_len -= stree[node].Len;
- /* node is 0 or 1 so it does not have extra bits */
- }
- desc->max_code = max_code;
-
- /* The elements heap[heap_len/2+1 .. heap_len] are leaves of the tree,
- * establish sub-heaps of increasing lengths:
- */
- for (n = s->heap_len/2; n >= 1; n--) pqdownheap(s, tree, n);
-
- /* Construct the Huffman tree by repeatedly combining the least two
- * frequent nodes.
- */
- node = elems; /* next internal node of the tree */
- do {
- pqremove(s, tree, n); /* n = node of least frequency */
- m = s->heap[SMALLEST]; /* m = node of next least frequency */
-
- s->heap[--(s->heap_max)] = n; /* keep the nodes sorted by frequency */
- s->heap[--(s->heap_max)] = m;
-
- /* Create a new node father of n and m */
- tree[node].Freq = tree[n].Freq + tree[m].Freq;
- s->depth[node] = (uch)((s->depth[n] >= s->depth[m] ?
- s->depth[n] : s->depth[m]) + 1);
- tree[n].Dad = tree[m].Dad = (ush)node;
+ ct_data *tree = desc->dyn_tree;
+ const ct_data *stree = desc->stat_desc->static_tree;
+ int elems = desc->stat_desc->elems;
+ int n, m; /* iterate over heap elements */
+ int max_code = -1; /* largest code with non zero frequency */
+ int node; /* new node being created */
+
+ /* Construct the initial heap, with least frequent element in
+ * heap[SMALLEST]. The sons of heap[n] are heap[2*n] and heap[2*n+1].
+ * heap[0] is not used.
+ */
+ s->heap_len = 0, s->heap_max = HEAP_SIZE;
+
+ for (n = 0; n < elems; n++) {
+ if (tree[n].Freq != 0) {
+ s->heap[++(s->heap_len)] = max_code = n;
+ s->depth[n] = 0;
+ } else {
+ tree[n].Len = 0;
+ }
+ }
+
+ /* The pkzip format requires that at least one distance code exists,
+ * and that at least one bit should be sent even if there is only one
+ * possible code. So to avoid special checks later on we force at least
+ * two codes of non zero frequency.
+ */
+ while (s->heap_len < 2) {
+ node = s->heap[++(s->heap_len)] = (max_code < 2 ? ++max_code : 0);
+ tree[node].Freq = 1;
+ s->depth[node] = 0;
+ s->opt_len--; if (stree) s->static_len -= stree[node].Len;
+ /* node is 0 or 1 so it does not have extra bits */
+ }
+ desc->max_code = max_code;
+
+ /* The elements heap[heap_len/2+1 .. heap_len] are leaves of the tree,
+ * establish sub-heaps of increasing lengths:
+ */
+ for (n = s->heap_len/2; n >= 1; n--) pqdownheap(s, tree, n);
+
+ /* Construct the Huffman tree by repeatedly combining the least two
+ * frequent nodes.
+ */
+ node = elems; /* next internal node of the tree */
+ do {
+ pqremove(s, tree, n); /* n = node of least frequency */
+ m = s->heap[SMALLEST]; /* m = node of next least frequency */
+
+ s->heap[--(s->heap_max)] = n; /* keep the nodes sorted by frequency */
+ s->heap[--(s->heap_max)] = m;
+
+ /* Create a new node father of n and m */
+ tree[node].Freq = tree[n].Freq + tree[m].Freq;
+ s->depth[node] = (uch)((s->depth[n] >= s->depth[m] ?
+ s->depth[n] : s->depth[m]) + 1);
+ tree[n].Dad = tree[m].Dad = (ush)node;
#ifdef DUMP_BL_TREE
- if (tree == s->bl_tree) {
- fprintf(stderr,"\nnode %d(%d), sons %d(%d) %d(%d)",
- node, tree[node].Freq, n, tree[n].Freq, m, tree[m].Freq);
- }
+ if (tree == s->bl_tree) {
+ fprintf(stderr,"\nnode %d(%d), sons %d(%d) %d(%d)",
+ node, tree[node].Freq, n, tree[n].Freq, m, tree[m].Freq);
+ }
#endif
- /* and insert the new node in the heap */
- s->heap[SMALLEST] = node++;
- pqdownheap(s, tree, SMALLEST);
+ /* and insert the new node in the heap */
+ s->heap[SMALLEST] = node++;
+ pqdownheap(s, tree, SMALLEST);
- } while (s->heap_len >= 2);
+ } while (s->heap_len >= 2);
- s->heap[--(s->heap_max)] = s->heap[SMALLEST];
+ s->heap[--(s->heap_max)] = s->heap[SMALLEST];
- /* At this point, the fields freq and dad are set. We can now
- * generate the bit lengths.
- */
- gen_bitlen(s, (tree_desc *)desc);
+ /* At this point, the fields freq and dad are set. We can now
+ * generate the bit lengths.
+ */
+ gen_bitlen(s, (tree_desc *)desc);
- /* The field len is now set, we can generate the bit codes */
- gen_codes ((ct_data *)tree, max_code, s->bl_count);
+ /* The field len is now set, we can generate the bit codes */
+ gen_codes ((ct_data *)tree, max_code, s->bl_count);
}
/* ===========================================================================
@@ -703,44 +703,44 @@ local void build_tree(s, desc)
* in the bit length tree.
*/
local void scan_tree (s, tree, max_code)
- deflate_state *s;
- ct_data *tree; /* the tree to be scanned */
- int max_code; /* and its largest code of non zero frequency */
+ deflate_state *s;
+ ct_data *tree; /* the tree to be scanned */
+ int max_code; /* and its largest code of non zero frequency */
{
- int n; /* iterates over all tree elements */
- int prevlen = -1; /* last emitted length */
- int curlen; /* length of current code */
- int nextlen = tree[0].Len; /* length of next code */
- int count = 0; /* repeat count of the current code */
- int max_count = 7; /* max repeat count */
- int min_count = 4; /* min repeat count */
-
- if (nextlen == 0) max_count = 138, min_count = 3;
- tree[max_code+1].Len = (ush)0xffff; /* guard */
-
- for (n = 0; n <= max_code; n++) {
- curlen = nextlen; nextlen = tree[n+1].Len;
- if (++count < max_count && curlen == nextlen) {
- continue;
- } else if (count < min_count) {
- s->bl_tree[curlen].Freq += count;
- } else if (curlen != 0) {
- if (curlen != prevlen) s->bl_tree[curlen].Freq++;
- s->bl_tree[REP_3_6].Freq++;
- } else if (count <= 10) {
- s->bl_tree[REPZ_3_10].Freq++;
- } else {
- s->bl_tree[REPZ_11_138].Freq++;
- }
- count = 0; prevlen = curlen;
- if (nextlen == 0) {
- max_count = 138, min_count = 3;
- } else if (curlen == nextlen) {
- max_count = 6, min_count = 3;
- } else {
- max_count = 7, min_count = 4;
- }
- }
+ int n; /* iterates over all tree elements */
+ int prevlen = -1; /* last emitted length */
+ int curlen; /* length of current code */
+ int nextlen = tree[0].Len; /* length of next code */
+ int count = 0; /* repeat count of the current code */
+ int max_count = 7; /* max repeat count */
+ int min_count = 4; /* min repeat count */
+
+ if (nextlen == 0) max_count = 138, min_count = 3;
+ tree[max_code+1].Len = (ush)0xffff; /* guard */
+
+ for (n = 0; n <= max_code; n++) {
+ curlen = nextlen; nextlen = tree[n+1].Len;
+ if (++count < max_count && curlen == nextlen) {
+ continue;
+ } else if (count < min_count) {
+ s->bl_tree[curlen].Freq += count;
+ } else if (curlen != 0) {
+ if (curlen != prevlen) s->bl_tree[curlen].Freq++;
+ s->bl_tree[REP_3_6].Freq++;
+ } else if (count <= 10) {
+ s->bl_tree[REPZ_3_10].Freq++;
+ } else {
+ s->bl_tree[REPZ_11_138].Freq++;
+ }
+ count = 0; prevlen = curlen;
+ if (nextlen == 0) {
+ max_count = 138, min_count = 3;
+ } else if (curlen == nextlen) {
+ max_count = 6, min_count = 3;
+ } else {
+ max_count = 7, min_count = 4;
+ }
+ }
}
/* ===========================================================================
@@ -748,50 +748,50 @@ local void scan_tree (s, tree, max_code)
* bl_tree.
*/
local void send_tree (s, tree, max_code)
- deflate_state *s;
- ct_data *tree; /* the tree to be scanned */
- int max_code; /* and its largest code of non zero frequency */
+ deflate_state *s;
+ ct_data *tree; /* the tree to be scanned */
+ int max_code; /* and its largest code of non zero frequency */
{
- int n; /* iterates over all tree elements */
- int prevlen = -1; /* last emitted length */
- int curlen; /* length of current code */
- int nextlen = tree[0].Len; /* length of next code */
- int count = 0; /* repeat count of the current code */
- int max_count = 7; /* max repeat count */
- int min_count = 4; /* min repeat count */
-
- /* tree[max_code+1].Len = -1; */ /* guard already set */
- if (nextlen == 0) max_count = 138, min_count = 3;
-
- for (n = 0; n <= max_code; n++) {
- curlen = nextlen; nextlen = tree[n+1].Len;
- if (++count < max_count && curlen == nextlen) {
- continue;
- } else if (count < min_count) {
- do { send_code(s, curlen, s->bl_tree); } while (--count != 0);
-
- } else if (curlen != 0) {
- if (curlen != prevlen) {
- send_code(s, curlen, s->bl_tree); count--;
- }
- Assert(count >= 3 && count <= 6, " 3_6?");
- send_code(s, REP_3_6, s->bl_tree); send_bits(s, count-3, 2);
-
- } else if (count <= 10) {
- send_code(s, REPZ_3_10, s->bl_tree); send_bits(s, count-3, 3);
-
- } else {
- send_code(s, REPZ_11_138, s->bl_tree); send_bits(s, count-11, 7);
- }
- count = 0; prevlen = curlen;
- if (nextlen == 0) {
- max_count = 138, min_count = 3;
- } else if (curlen == nextlen) {
- max_count = 6, min_count = 3;
- } else {
- max_count = 7, min_count = 4;
- }
- }
+ int n; /* iterates over all tree elements */
+ int prevlen = -1; /* last emitted length */
+ int curlen; /* length of current code */
+ int nextlen = tree[0].Len; /* length of next code */
+ int count = 0; /* repeat count of the current code */
+ int max_count = 7; /* max repeat count */
+ int min_count = 4; /* min repeat count */
+
+ /* tree[max_code+1].Len = -1; */ /* guard already set */
+ if (nextlen == 0) max_count = 138, min_count = 3;
+
+ for (n = 0; n <= max_code; n++) {
+ curlen = nextlen; nextlen = tree[n+1].Len;
+ if (++count < max_count && curlen == nextlen) {
+ continue;
+ } else if (count < min_count) {
+ do { send_code(s, curlen, s->bl_tree); } while (--count != 0);
+
+ } else if (curlen != 0) {
+ if (curlen != prevlen) {
+ send_code(s, curlen, s->bl_tree); count--;
+ }
+ Assert(count >= 3 && count <= 6, " 3_6?");
+ send_code(s, REP_3_6, s->bl_tree); send_bits(s, count-3, 2);
+
+ } else if (count <= 10) {
+ send_code(s, REPZ_3_10, s->bl_tree); send_bits(s, count-3, 3);
+
+ } else {
+ send_code(s, REPZ_11_138, s->bl_tree); send_bits(s, count-11, 7);
+ }
+ count = 0; prevlen = curlen;
+ if (nextlen == 0) {
+ max_count = 138, min_count = 3;
+ } else if (curlen == nextlen) {
+ max_count = 6, min_count = 3;
+ } else {
+ max_count = 7, min_count = 4;
+ }
+ }
}
/* ===========================================================================
@@ -799,33 +799,33 @@ local void send_tree (s, tree, max_code)
* bl_order of the last bit length code to send.
*/
local int build_bl_tree(s)
- deflate_state *s;
+ deflate_state *s;
{
- int max_blindex; /* index of last bit length code of non zero freq */
-
- /* Determine the bit length frequencies for literal and distance trees */
- scan_tree(s, (ct_data *)s->dyn_ltree, s->l_desc.max_code);
- scan_tree(s, (ct_data *)s->dyn_dtree, s->d_desc.max_code);
-
- /* Build the bit length tree: */
- build_tree(s, (tree_desc *)(&(s->bl_desc)));
- /* opt_len now includes the length of the tree representations, except
- * the lengths of the bit lengths codes and the 5+5+4 bits for the counts.
- */
-
- /* Determine the number of bit length codes to send. The pkzip format
- * requires that at least 4 bit length codes be sent. (appnote.txt says
- * 3 but the actual value used is 4.)
- */
- for (max_blindex = BL_CODES-1; max_blindex >= 3; max_blindex--) {
- if (s->bl_tree[bl_order[max_blindex]].Len != 0) break;
- }
- /* Update opt_len to include the bit length tree and counts */
- s->opt_len += 3*(max_blindex+1) + 5+5+4;
- Tracev((stderr, "\ndyn trees: dyn %ld, stat %ld",
- s->opt_len, s->static_len));
-
- return max_blindex;
+ int max_blindex; /* index of last bit length code of non zero freq */
+
+ /* Determine the bit length frequencies for literal and distance trees */
+ scan_tree(s, (ct_data *)s->dyn_ltree, s->l_desc.max_code);
+ scan_tree(s, (ct_data *)s->dyn_dtree, s->d_desc.max_code);
+
+ /* Build the bit length tree: */
+ build_tree(s, (tree_desc *)(&(s->bl_desc)));
+ /* opt_len now includes the length of the tree representations, except
+ * the lengths of the bit lengths codes and the 5+5+4 bits for the counts.
+ */
+
+ /* Determine the number of bit length codes to send. The pkzip format
+ * requires that at least 4 bit length codes be sent. (appnote.txt says
+ * 3 but the actual value used is 4.)
+ */
+ for (max_blindex = BL_CODES-1; max_blindex >= 3; max_blindex--) {
+ if (s->bl_tree[bl_order[max_blindex]].Len != 0) break;
+ }
+ /* Update opt_len to include the bit length tree and counts */
+ s->opt_len += 3*(max_blindex+1) + 5+5+4;
+ Tracev((stderr, "\ndyn trees: dyn %ld, stat %ld",
+ s->opt_len, s->static_len));
+
+ return max_blindex;
}
/* ===========================================================================
@@ -834,55 +834,55 @@ local int build_bl_tree(s)
* IN assertion: lcodes >= 257, dcodes >= 1, blcodes >= 4.
*/
local void send_all_trees(s, lcodes, dcodes, blcodes)
- deflate_state *s;
- int lcodes, dcodes, blcodes; /* number of codes for each tree */
+ deflate_state *s;
+ int lcodes, dcodes, blcodes; /* number of codes for each tree */
{
- int rank; /* index in bl_order */
-
- Assert (lcodes >= 257 && dcodes >= 1 && blcodes >= 4, "not enough codes");
- Assert (lcodes <= L_CODES && dcodes <= D_CODES && blcodes <= BL_CODES,
- "too many codes");
- Tracev((stderr, "\nbl counts: "));
- send_bits(s, lcodes-257, 5); /* not +255 as stated in appnote.txt */
- send_bits(s, dcodes-1, 5);
- send_bits(s, blcodes-4, 4); /* not -3 as stated in appnote.txt */
- for (rank = 0; rank < blcodes; rank++) {
- Tracev((stderr, "\nbl code %2d ", bl_order[rank]));
- send_bits(s, s->bl_tree[bl_order[rank]].Len, 3);
- }
- Tracev((stderr, "\nbl tree: sent %ld", s->bits_sent));
-
- send_tree(s, (ct_data *)s->dyn_ltree, lcodes-1); /* literal tree */
- Tracev((stderr, "\nlit tree: sent %ld", s->bits_sent));
-
- send_tree(s, (ct_data *)s->dyn_dtree, dcodes-1); /* distance tree */
- Tracev((stderr, "\ndist tree: sent %ld", s->bits_sent));
+ int rank; /* index in bl_order */
+
+ Assert (lcodes >= 257 && dcodes >= 1 && blcodes >= 4, "not enough codes");
+ Assert (lcodes <= L_CODES && dcodes <= D_CODES && blcodes <= BL_CODES,
+ "too many codes");
+ Tracev((stderr, "\nbl counts: "));
+ send_bits(s, lcodes-257, 5); /* not +255 as stated in appnote.txt */
+ send_bits(s, dcodes-1, 5);
+ send_bits(s, blcodes-4, 4); /* not -3 as stated in appnote.txt */
+ for (rank = 0; rank < blcodes; rank++) {
+ Tracev((stderr, "\nbl code %2d ", bl_order[rank]));
+ send_bits(s, s->bl_tree[bl_order[rank]].Len, 3);
+ }
+ Tracev((stderr, "\nbl tree: sent %ld", s->bits_sent));
+
+ send_tree(s, (ct_data *)s->dyn_ltree, lcodes-1); /* literal tree */
+ Tracev((stderr, "\nlit tree: sent %ld", s->bits_sent));
+
+ send_tree(s, (ct_data *)s->dyn_dtree, dcodes-1); /* distance tree */
+ Tracev((stderr, "\ndist tree: sent %ld", s->bits_sent));
}
/* ===========================================================================
* Send a stored block
*/
void ZLIB_INTERNAL _tr_stored_block(s, buf, stored_len, last)
- deflate_state *s;
- charf *buf; /* input block */
- ulg stored_len; /* length of input block */
- int last; /* one if this is the last block for a file */
+ deflate_state *s;
+ charf *buf; /* input block */
+ ulg stored_len; /* length of input block */
+ int last; /* one if this is the last block for a file */
{
- send_bits(s, (STORED_BLOCK<<1)+last, 3); /* send block type */
+ send_bits(s, (STORED_BLOCK<<1)+last, 3); /* send block type */
#ifdef DEBUG
- s->compressed_len = (s->compressed_len + 3 + 7) & (ulg)~7L;
- s->compressed_len += (stored_len + 4) << 3;
+ s->compressed_len = (s->compressed_len + 3 + 7) & (ulg)~7L;
+ s->compressed_len += (stored_len + 4) << 3;
#endif
- copy_block(s, buf, (unsigned)stored_len, 1); /* with header */
+ copy_block(s, buf, (unsigned)stored_len, 1); /* with header */
}
/* ===========================================================================
* Flush the bits in the bit buffer to pending output (leaves at most 7 bits)
*/
void ZLIB_INTERNAL _tr_flush_bits(s)
- deflate_state *s;
+ deflate_state *s;
{
- bi_flush(s);
+ bi_flush(s);
}
/* ===========================================================================
@@ -890,14 +890,14 @@ void ZLIB_INTERNAL _tr_flush_bits(s)
* This takes 10 bits, of which 7 may remain in the bit buffer.
*/
void ZLIB_INTERNAL _tr_align(s)
- deflate_state *s;
+ deflate_state *s;
{
- send_bits(s, STATIC_TREES<<1, 3);
- send_code(s, END_BLOCK, static_ltree);
+ send_bits(s, STATIC_TREES<<1, 3);
+ send_code(s, END_BLOCK, static_ltree);
#ifdef DEBUG
- s->compressed_len += 10L; /* 3 for block type, 7 for EOB */
+ s->compressed_len += 10L; /* 3 for block type, 7 for EOB */
#endif
- bi_flush(s);
+ bi_flush(s);
}
/* ===========================================================================
@@ -905,100 +905,100 @@ void ZLIB_INTERNAL _tr_align(s)
* trees or store, and output the encoded block to the zip file.
*/
void ZLIB_INTERNAL _tr_flush_block(s, buf, stored_len, last)
- deflate_state *s;
- charf *buf; /* input block, or NULL if too old */
- ulg stored_len; /* length of input block */
- int last; /* one if this is the last block for a file */
+ deflate_state *s;
+ charf *buf; /* input block, or NULL if too old */
+ ulg stored_len; /* length of input block */
+ int last; /* one if this is the last block for a file */
{
- ulg opt_lenb, static_lenb; /* opt_len and static_len in bytes */
- int max_blindex = 0; /* index of last bit length code of non zero freq */
+ ulg opt_lenb, static_lenb; /* opt_len and static_len in bytes */
+ int max_blindex = 0; /* index of last bit length code of non zero freq */
- /* Build the Huffman trees unless a stored block is forced */
- if (s->level > 0) {
+ /* Build the Huffman trees unless a stored block is forced */
+ if (s->level > 0) {
- /* Check if the file is binary or text */
- if (s->strm->data_type == Z_UNKNOWN)
- s->strm->data_type = detect_data_type(s);
+ /* Check if the file is binary or text */
+ if (s->strm->data_type == Z_UNKNOWN)
+ s->strm->data_type = detect_data_type(s);
- /* Construct the literal and distance trees */
- build_tree(s, (tree_desc *)(&(s->l_desc)));
- Tracev((stderr, "\nlit data: dyn %ld, stat %ld", s->opt_len,
- s->static_len));
+ /* Construct the literal and distance trees */
+ build_tree(s, (tree_desc *)(&(s->l_desc)));
+ Tracev((stderr, "\nlit data: dyn %ld, stat %ld", s->opt_len,
+ s->static_len));
- build_tree(s, (tree_desc *)(&(s->d_desc)));
- Tracev((stderr, "\ndist data: dyn %ld, stat %ld", s->opt_len,
- s->static_len));
- /* At this point, opt_len and static_len are the total bit lengths of
- * the compressed block data, excluding the tree representations.
- */
+ build_tree(s, (tree_desc *)(&(s->d_desc)));
+ Tracev((stderr, "\ndist data: dyn %ld, stat %ld", s->opt_len,
+ s->static_len));
+ /* At this point, opt_len and static_len are the total bit lengths of
+ * the compressed block data, excluding the tree representations.
+ */
- /* Build the bit length tree for the above two trees, and get the index
- * in bl_order of the last bit length code to send.
- */
- max_blindex = build_bl_tree(s);
+ /* Build the bit length tree for the above two trees, and get the index
+ * in bl_order of the last bit length code to send.
+ */
+ max_blindex = build_bl_tree(s);
- /* Determine the best encoding. Compute the block lengths in bytes. */
- opt_lenb = (s->opt_len+3+7)>>3;
- static_lenb = (s->static_len+3+7)>>3;
+ /* Determine the best encoding. Compute the block lengths in bytes. */
+ opt_lenb = (s->opt_len+3+7)>>3;
+ static_lenb = (s->static_len+3+7)>>3;
- Tracev((stderr, "\nopt %lu(%lu) stat %lu(%lu) stored %lu lit %u ",
- opt_lenb, s->opt_len, static_lenb, s->static_len, stored_len,
- s->last_lit));
+ Tracev((stderr, "\nopt %lu(%lu) stat %lu(%lu) stored %lu lit %u ",
+ opt_lenb, s->opt_len, static_lenb, s->static_len, stored_len,
+ s->last_lit));
- if (static_lenb <= opt_lenb) opt_lenb = static_lenb;
+ if (static_lenb <= opt_lenb) opt_lenb = static_lenb;
- } else {
- Assert(buf != (char*)0, "lost buf");
- opt_lenb = static_lenb = stored_len + 5; /* force a stored block */
- }
+ } else {
+ Assert(buf != (char*)0, "lost buf");
+ opt_lenb = static_lenb = stored_len + 5; /* force a stored block */
+ }
#ifdef FORCE_STORED
- if (buf != (char*)0) { /* force stored block */
+ if (buf != (char*)0) { /* force stored block */
#else
- if (stored_len+4 <= opt_lenb && buf != (char*)0) {
- /* 4: two words for the lengths */
+ if (stored_len+4 <= opt_lenb && buf != (char*)0) {
+ /* 4: two words for the lengths */
#endif
- /* The test buf != NULL is only necessary if LIT_BUFSIZE > WSIZE.
- * Otherwise we can't have processed more than WSIZE input bytes since
- * the last block flush, because compression would have been
- * successful. If LIT_BUFSIZE <= WSIZE, it is never too late to
- * transform a block into a stored block.
- */
- _tr_stored_block(s, buf, stored_len, last);
+ /* The test buf != NULL is only necessary if LIT_BUFSIZE > WSIZE.
+ * Otherwise we can't have processed more than WSIZE input bytes since
+ * the last block flush, because compression would have been
+ * successful. If LIT_BUFSIZE <= WSIZE, it is never too late to
+ * transform a block into a stored block.
+ */
+ _tr_stored_block(s, buf, stored_len, last);
#ifdef FORCE_STATIC
- } else if (static_lenb >= 0) { /* force static trees */
+ } else if (static_lenb >= 0) { /* force static trees */
#else
- } else if (s->strategy == Z_FIXED || static_lenb == opt_lenb) {
+ } else if (s->strategy == Z_FIXED || static_lenb == opt_lenb) {
#endif
- send_bits(s, (STATIC_TREES<<1)+last, 3);
- compress_block(s, (ct_data *)static_ltree, (ct_data *)static_dtree);
+ send_bits(s, (STATIC_TREES<<1)+last, 3);
+ compress_block(s, (ct_data *)static_ltree, (ct_data *)static_dtree);
#ifdef DEBUG
- s->compressed_len += 3 + s->static_len;
+ s->compressed_len += 3 + s->static_len;
#endif
- } else {
- send_bits(s, (DYN_TREES<<1)+last, 3);
- send_all_trees(s, s->l_desc.max_code+1, s->d_desc.max_code+1,
- max_blindex+1);
- compress_block(s, (ct_data *)s->dyn_ltree, (ct_data *)s->dyn_dtree);
+ } else {
+ send_bits(s, (DYN_TREES<<1)+last, 3);
+ send_all_trees(s, s->l_desc.max_code+1, s->d_desc.max_code+1,
+ max_blindex+1);
+ compress_block(s, (ct_data *)s->dyn_ltree, (ct_data *)s->dyn_dtree);
#ifdef DEBUG
- s->compressed_len += 3 + s->opt_len;
+ s->compressed_len += 3 + s->opt_len;
#endif
- }
- Assert (s->compressed_len == s->bits_sent, "bad compressed size");
- /* The above check is made mod 2^32, for files larger than 512 MB
- * and uLong implemented on 32 bits.
- */
- init_block(s);
-
- if (last) {
- bi_windup(s);
+ }
+ Assert (s->compressed_len == s->bits_sent, "bad compressed size");
+ /* The above check is made mod 2^32, for files larger than 512 MB
+ * and uLong implemented on 32 bits.
+ */
+ init_block(s);
+
+ if (last) {
+ bi_windup(s);
#ifdef DEBUG
- s->compressed_len += 7; /* align on byte boundary */
+ s->compressed_len += 7; /* align on byte boundary */
#endif
- }
- Tracev((stderr,"\ncomprlen %lu(%lu) ", s->compressed_len>>3,
- s->compressed_len-7*last));
+ }
+ Tracev((stderr,"\ncomprlen %lu(%lu) ", s->compressed_len>>3,
+ s->compressed_len-7*last));
}
/* ===========================================================================
@@ -1006,100 +1006,100 @@ void ZLIB_INTERNAL _tr_flush_block(s, buf, stored_len, last)
* the current block must be flushed.
*/
int ZLIB_INTERNAL _tr_tally (s, dist, lc)
- deflate_state *s;
- unsigned dist; /* distance of matched string */
- unsigned lc; /* match length-MIN_MATCH or unmatched char (if dist==0) */
+ deflate_state *s;
+ unsigned dist; /* distance of matched string */
+ unsigned lc; /* match length-MIN_MATCH or unmatched char (if dist==0) */
{
- s->d_buf[s->last_lit] = (ush)dist;
- s->l_buf[s->last_lit++] = (uch)lc;
- if (dist == 0) {
- /* lc is the unmatched char */
- s->dyn_ltree[lc].Freq++;
- } else {
- s->matches++;
- /* Here, lc is the match length - MIN_MATCH */
- dist--; /* dist = match distance - 1 */
- Assert((ush)dist < (ush)MAX_DIST(s) &&
- (ush)lc <= (ush)(MAX_MATCH-MIN_MATCH) &&
- (ush)d_code(dist) < (ush)D_CODES, "_tr_tally: bad match");
-
- s->dyn_ltree[_length_code[lc]+LITERALS+1].Freq++;
- s->dyn_dtree[d_code(dist)].Freq++;
- }
+ s->d_buf[s->last_lit] = (ush)dist;
+ s->l_buf[s->last_lit++] = (uch)lc;
+ if (dist == 0) {
+ /* lc is the unmatched char */
+ s->dyn_ltree[lc].Freq++;
+ } else {
+ s->matches++;
+ /* Here, lc is the match length - MIN_MATCH */
+ dist--; /* dist = match distance - 1 */
+ Assert((ush)dist < (ush)MAX_DIST(s) &&
+ (ush)lc <= (ush)(MAX_MATCH-MIN_MATCH) &&
+ (ush)d_code(dist) < (ush)D_CODES, "_tr_tally: bad match");
+
+ s->dyn_ltree[_length_code[lc]+LITERALS+1].Freq++;
+ s->dyn_dtree[d_code(dist)].Freq++;
+ }
#ifdef TRUNCATE_BLOCK
- /* Try to guess if it is profitable to stop the current block here */
- if ((s->last_lit & 0x1fff) == 0 && s->level > 2) {
- /* Compute an upper bound for the compressed length */
- ulg out_length = (ulg)s->last_lit*8L;
- ulg in_length = (ulg)((long)s->strstart - s->block_start);
- int dcode;
- for (dcode = 0; dcode < D_CODES; dcode++) {
- out_length += (ulg)s->dyn_dtree[dcode].Freq *
- (5L+extra_dbits[dcode]);
- }
- out_length >>= 3;
- Tracev((stderr,"\nlast_lit %u, in %ld, out ~%ld(%ld%%) ",
- s->last_lit, in_length, out_length,
- 100L - out_length*100L/in_length));
- if (s->matches < s->last_lit/2 && out_length < in_length/2) return 1;
- }
+ /* Try to guess if it is profitable to stop the current block here */
+ if ((s->last_lit & 0x1fff) == 0 && s->level > 2) {
+ /* Compute an upper bound for the compressed length */
+ ulg out_length = (ulg)s->last_lit*8L;
+ ulg in_length = (ulg)((long)s->strstart - s->block_start);
+ int dcode;
+ for (dcode = 0; dcode < D_CODES; dcode++) {
+ out_length += (ulg)s->dyn_dtree[dcode].Freq *
+ (5L+extra_dbits[dcode]);
+ }
+ out_length >>= 3;
+ Tracev((stderr,"\nlast_lit %u, in %ld, out ~%ld(%ld%%) ",
+ s->last_lit, in_length, out_length,
+ 100L - out_length*100L/in_length));
+ if (s->matches < s->last_lit/2 && out_length < in_length/2) return 1;
+ }
#endif
- return (s->last_lit == s->lit_bufsize-1);
- /* We avoid equality with lit_bufsize because of wraparound at 64K
- * on 16 bit machines and because stored blocks are restricted to
- * 64K-1 bytes.
- */
+ return (s->last_lit == s->lit_bufsize-1);
+ /* We avoid equality with lit_bufsize because of wraparound at 64K
+ * on 16 bit machines and because stored blocks are restricted to
+ * 64K-1 bytes.
+ */
}
/* ===========================================================================
* Send the block data compressed using the given Huffman trees
*/
local void compress_block(s, ltree, dtree)
- deflate_state *s;
- ct_data *ltree; /* literal tree */
- ct_data *dtree; /* distance tree */
+ deflate_state *s;
+ ct_data *ltree; /* literal tree */
+ ct_data *dtree; /* distance tree */
{
- unsigned dist; /* distance of matched string */
- int lc; /* match length or unmatched char (if dist == 0) */
- unsigned lx = 0; /* running index in l_buf */
- unsigned code; /* the code to send */
- int extra; /* number of extra bits to send */
-
- if (s->last_lit != 0) do {
- dist = s->d_buf[lx];
- lc = s->l_buf[lx++];
- if (dist == 0) {
- send_code(s, lc, ltree); /* send a literal byte */
- Tracecv(isgraph(lc), (stderr," '%c' ", lc));
- } else {
- /* Here, lc is the match length - MIN_MATCH */
- code = _length_code[lc];
- send_code(s, code+LITERALS+1, ltree); /* send the length code */
- extra = extra_lbits[code];
- if (extra != 0) {
- lc -= base_length[code];
- send_bits(s, lc, extra); /* send the extra length bits */
- }
- dist--; /* dist is now the match distance - 1 */
- code = d_code(dist);
- Assert (code < D_CODES, "bad d_code");
-
- send_code(s, code, dtree); /* send the distance code */
- extra = extra_dbits[code];
- if (extra != 0) {
- dist -= base_dist[code];
- send_bits(s, dist, extra); /* send the extra distance bits */
- }
- } /* literal or match pair ? */
-
- /* Check that the overlay between pending_buf and d_buf+l_buf is ok: */
- Assert((uInt)(s->pending) < s->lit_bufsize + 2*lx,
- "pendingBuf overflow");
-
- } while (lx < s->last_lit);
-
- send_code(s, END_BLOCK, ltree);
+ unsigned dist; /* distance of matched string */
+ int lc; /* match length or unmatched char (if dist == 0) */
+ unsigned lx = 0; /* running index in l_buf */
+ unsigned code; /* the code to send */
+ int extra; /* number of extra bits to send */
+
+ if (s->last_lit != 0) do {
+ dist = s->d_buf[lx];
+ lc = s->l_buf[lx++];
+ if (dist == 0) {
+ send_code(s, lc, ltree); /* send a literal byte */
+ Tracecv(isgraph(lc), (stderr," '%c' ", lc));
+ } else {
+ /* Here, lc is the match length - MIN_MATCH */
+ code = _length_code[lc];
+ send_code(s, code+LITERALS+1, ltree); /* send the length code */
+ extra = extra_lbits[code];
+ if (extra != 0) {
+ lc -= base_length[code];
+ send_bits(s, lc, extra); /* send the extra length bits */
+ }
+ dist--; /* dist is now the match distance - 1 */
+ code = d_code(dist);
+ Assert (code < D_CODES, "bad d_code");
+
+ send_code(s, code, dtree); /* send the distance code */
+ extra = extra_dbits[code];
+ if (extra != 0) {
+ dist -= base_dist[code];
+ send_bits(s, dist, extra); /* send the extra distance bits */
+ }
+ } /* literal or match pair ? */
+
+ /* Check that the overlay between pending_buf and d_buf+l_buf is ok: */
+ Assert((uInt)(s->pending) < s->lit_bufsize + 2*lx,
+ "pendingBuf overflow");
+
+ } while (lx < s->last_lit);
+
+ send_code(s, END_BLOCK, ltree);
}
/* ===========================================================================
@@ -1116,32 +1116,32 @@ local void compress_block(s, ltree, dtree)
* IN assertion: the fields Freq of dyn_ltree are set.
*/
local int detect_data_type(s)
- deflate_state *s;
+ deflate_state *s;
{
- /* black_mask is the bit mask of black-listed bytes
- * set bits 0..6, 14..25, and 28..31
- * 0xf3ffc07f = binary 11110011111111111100000001111111
- */
- unsigned long black_mask = 0xf3ffc07fUL;
- int n;
-
- /* Check for non-textual ("black-listed") bytes. */
- for (n = 0; n <= 31; n++, black_mask >>= 1)
- if ((black_mask & 1) && (s->dyn_ltree[n].Freq != 0))
- return Z_BINARY;
-
- /* Check for textual ("white-listed") bytes. */
- if (s->dyn_ltree[9].Freq != 0 || s->dyn_ltree[10].Freq != 0
- || s->dyn_ltree[13].Freq != 0)
- return Z_TEXT;
- for (n = 32; n < LITERALS; n++)
- if (s->dyn_ltree[n].Freq != 0)
- return Z_TEXT;
-
- /* There are no "black-listed" or "white-listed" bytes:
- * this stream either is empty or has tolerated ("gray-listed") bytes only.
- */
- return Z_BINARY;
+ /* black_mask is the bit mask of black-listed bytes
+ * set bits 0..6, 14..25, and 28..31
+ * 0xf3ffc07f = binary 11110011111111111100000001111111
+ */
+ unsigned long black_mask = 0xf3ffc07fUL;
+ int n;
+
+ /* Check for non-textual ("black-listed") bytes. */
+ for (n = 0; n <= 31; n++, black_mask >>= 1)
+ if ((black_mask & 1) && (s->dyn_ltree[n].Freq != 0))
+ return Z_BINARY;
+
+ /* Check for textual ("white-listed") bytes. */
+ if (s->dyn_ltree[9].Freq != 0 || s->dyn_ltree[10].Freq != 0
+ || s->dyn_ltree[13].Freq != 0)
+ return Z_TEXT;
+ for (n = 32; n < LITERALS; n++)
+ if (s->dyn_ltree[n].Freq != 0)
+ return Z_TEXT;
+
+ /* There are no "black-listed" or "white-listed" bytes:
+ * this stream either is empty or has tolerated ("gray-listed") bytes only.
+ */
+ return Z_BINARY;
}
/* ===========================================================================
@@ -1150,49 +1150,49 @@ local int detect_data_type(s)
* IN assertion: 1 <= len <= 15
*/
local unsigned bi_reverse(code, len)
- unsigned code; /* the value to invert */
- int len; /* its bit length */
+ unsigned code; /* the value to invert */
+ int len; /* its bit length */
{
- register unsigned res = 0;
- do {
- res |= code & 1;
- code >>= 1, res <<= 1;
- } while (--len > 0);
- return res >> 1;
+ register unsigned res = 0;
+ do {
+ res |= code & 1;
+ code >>= 1, res <<= 1;
+ } while (--len > 0);
+ return res >> 1;
}
/* ===========================================================================
* Flush the bit buffer, keeping at most 7 bits in it.
*/
local void bi_flush(s)
- deflate_state *s;
+ deflate_state *s;
{
- if (s->bi_valid == 16) {
- put_short(s, s->bi_buf);
- s->bi_buf = 0;
- s->bi_valid = 0;
- } else if (s->bi_valid >= 8) {
- put_byte(s, (Byte)s->bi_buf);
- s->bi_buf >>= 8;
- s->bi_valid -= 8;
- }
+ if (s->bi_valid == 16) {
+ put_short(s, s->bi_buf);
+ s->bi_buf = 0;
+ s->bi_valid = 0;
+ } else if (s->bi_valid >= 8) {
+ put_byte(s, (Byte)s->bi_buf);
+ s->bi_buf >>= 8;
+ s->bi_valid -= 8;
+ }
}
/* ===========================================================================
* Flush the bit buffer and align the output on a byte boundary
*/
local void bi_windup(s)
- deflate_state *s;
+ deflate_state *s;
{
- if (s->bi_valid > 8) {
- put_short(s, s->bi_buf);
- } else if (s->bi_valid > 0) {
- put_byte(s, (Byte)s->bi_buf);
- }
- s->bi_buf = 0;
- s->bi_valid = 0;
+ if (s->bi_valid > 8) {
+ put_short(s, s->bi_buf);
+ } else if (s->bi_valid > 0) {
+ put_byte(s, (Byte)s->bi_buf);
+ }
+ s->bi_buf = 0;
+ s->bi_valid = 0;
#ifdef DEBUG
- s->bits_sent = (s->bits_sent+7) & ~7;
+ s->bits_sent = (s->bits_sent+7) & ~7;
#endif
}
@@ -1201,24 +1201,24 @@ local void bi_windup(s)
* one's complement if requested.
*/
local void copy_block(s, buf, len, header)
- deflate_state *s;
- charf *buf; /* the input data */
- unsigned len; /* its length */
- int header; /* true if block header must be written */
+ deflate_state *s;
+ charf *buf; /* the input data */
+ unsigned len; /* its length */
+ int header; /* true if block header must be written */
{
- bi_windup(s); /* align on byte boundary */
+ bi_windup(s); /* align on byte boundary */
- if (header) {
- put_short(s, (ush)len);
- put_short(s, (ush)~len);
+ if (header) {
+ put_short(s, (ush)len);
+ put_short(s, (ush)~len);
#ifdef DEBUG
- s->bits_sent += 2*16;
+ s->bits_sent += 2*16;
#endif
- }
+ }
#ifdef DEBUG
- s->bits_sent += (ulg)len<<3;
+ s->bits_sent += (ulg)len<<3;
#endif
- while (len--) {
- put_byte(s, *buf++);
- }
+ while (len--) {
+ put_byte(s, *buf++);
+ }
}
diff --git a/src/lib/zlib/trees.h b/src/lib/zlib/trees.h
index d35639d82a2..70e9baf4f8b 100644
--- a/src/lib/zlib/trees.h
+++ b/src/lib/zlib/trees.h
@@ -71,8 +71,8 @@ local const ct_data static_dtree[D_CODES] = {
};
const uch ZLIB_INTERNAL _dist_code[DIST_CODE_LEN] = {
- 0, 1, 2, 3, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8,
- 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10,
+ 0, 1, 2, 3, 4, 4, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 8,
+ 8, 8, 8, 8, 9, 9, 9, 9, 9, 9, 9, 9, 10, 10, 10, 10, 10, 10, 10, 10,
10, 10, 10, 10, 10, 10, 10, 10, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11,
11, 11, 11, 11, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12,
12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 13, 13, 13, 13,
@@ -100,7 +100,7 @@ const uch ZLIB_INTERNAL _dist_code[DIST_CODE_LEN] = {
};
const uch ZLIB_INTERNAL _length_code[MAX_MATCH-MIN_MATCH+1]= {
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 12, 12,
13, 13, 13, 13, 14, 14, 14, 14, 15, 15, 15, 15, 16, 16, 16, 16, 16, 16, 16, 16,
17, 17, 17, 17, 17, 17, 17, 17, 18, 18, 18, 18, 18, 18, 18, 18, 19, 19, 19, 19,
19, 19, 19, 19, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20, 20,
@@ -121,8 +121,7 @@ local const int base_length[LENGTH_CODES] = {
};
local const int base_dist[D_CODES] = {
- 0, 1, 2, 3, 4, 6, 8, 12, 16, 24,
- 32, 48, 64, 96, 128, 192, 256, 384, 512, 768,
- 1024, 1536, 2048, 3072, 4096, 6144, 8192, 12288, 16384, 24576
+ 0, 1, 2, 3, 4, 6, 8, 12, 16, 24,
+ 32, 48, 64, 96, 128, 192, 256, 384, 512, 768,
+ 1024, 1536, 2048, 3072, 4096, 6144, 8192, 12288, 16384, 24576
};
-
diff --git a/src/lib/zlib/uncompr.c b/src/lib/zlib/uncompr.c
index ad98be3a5d8..eef137ebc70 100644
--- a/src/lib/zlib/uncompr.c
+++ b/src/lib/zlib/uncompr.c
@@ -22,38 +22,38 @@
buffer, or Z_DATA_ERROR if the input data was corrupted.
*/
int ZEXPORT uncompress (dest, destLen, source, sourceLen)
- Bytef *dest;
- uLongf *destLen;
- const Bytef *source;
- uLong sourceLen;
+ Bytef *dest;
+ uLongf *destLen;
+ const Bytef *source;
+ uLong sourceLen;
{
- z_stream stream;
- int err;
-
- stream.next_in = (Bytef*)source;
- stream.avail_in = (uInt)sourceLen;
- /* Check for source > 64K on 16-bit machine: */
- if ((uLong)stream.avail_in != sourceLen) return Z_BUF_ERROR;
-
- stream.next_out = dest;
- stream.avail_out = (uInt)*destLen;
- if ((uLong)stream.avail_out != *destLen) return Z_BUF_ERROR;
-
- stream.zalloc = (alloc_func)0;
- stream.zfree = (free_func)0;
-
- err = inflateInit(&stream);
- if (err != Z_OK) return err;
-
- err = inflate(&stream, Z_FINISH);
- if (err != Z_STREAM_END) {
- inflateEnd(&stream);
- if (err == Z_NEED_DICT || (err == Z_BUF_ERROR && stream.avail_in == 0))
- return Z_DATA_ERROR;
- return err;
- }
- *destLen = stream.total_out;
-
- err = inflateEnd(&stream);
- return err;
+ z_stream stream;
+ int err;
+
+ stream.next_in = (Bytef*)source;
+ stream.avail_in = (uInt)sourceLen;
+ /* Check for source > 64K on 16-bit machine: */
+ if ((uLong)stream.avail_in != sourceLen) return Z_BUF_ERROR;
+
+ stream.next_out = dest;
+ stream.avail_out = (uInt)*destLen;
+ if ((uLong)stream.avail_out != *destLen) return Z_BUF_ERROR;
+
+ stream.zalloc = (alloc_func)0;
+ stream.zfree = (free_func)0;
+
+ err = inflateInit(&stream);
+ if (err != Z_OK) return err;
+
+ err = inflate(&stream, Z_FINISH);
+ if (err != Z_STREAM_END) {
+ inflateEnd(&stream);
+ if (err == Z_NEED_DICT || (err == Z_BUF_ERROR && stream.avail_in == 0))
+ return Z_DATA_ERROR;
+ return err;
+ }
+ *destLen = stream.total_out;
+
+ err = inflateEnd(&stream);
+ return err;
}
diff --git a/src/lib/zlib/zconf.h b/src/lib/zlib/zconf.h
index 8a46a58b30c..7b33b6bd601 100644
--- a/src/lib/zlib/zconf.h
+++ b/src/lib/zlib/zconf.h
@@ -257,7 +257,7 @@
for small objects.
*/
- /* Type declarations */
+ /* Type declarations */
#ifndef OF /* function prototypes */
# ifdef STDC
@@ -283,7 +283,7 @@
*/
#ifdef SYS16BIT
# if defined(M_I86SM) || defined(M_I86MM)
- /* MSC small or medium model */
+ /* MSC small or medium model */
# define SMALL_MEDIUM
# ifdef _MSC_VER
# define FAR _far
@@ -292,7 +292,7 @@
# endif
# endif
# if (defined(__SMALL__) || defined(__MEDIUM__))
- /* Turbo C small or medium model */
+ /* Turbo C small or medium model */
# define SMALL_MEDIUM
# ifdef __BORLANDC__
# define FAR _far
@@ -303,9 +303,9 @@
#endif
#if defined(WINDOWS) || defined(WIN32)
- /* If building or using zlib as a DLL, define ZLIB_DLL.
- * This is not mandatory, but it offers a little performance increase.
- */
+ /* If building or using zlib as a DLL, define ZLIB_DLL.
+ * This is not mandatory, but it offers a little performance increase.
+ */
# ifdef ZLIB_DLL
# if defined(WIN32) && (!defined(__BORLANDC__) || (__BORLANDC__ >= 0x500))
# ifdef ZLIB_INTERNAL
@@ -315,17 +315,17 @@
# endif
# endif
# endif /* ZLIB_DLL */
- /* If building or using zlib with the WINAPI/WINAPIV calling convention,
- * define ZLIB_WINAPI.
- * Caution: the standard ZLIB1.DLL is NOT compiled using ZLIB_WINAPI.
- */
+ /* If building or using zlib with the WINAPI/WINAPIV calling convention,
+ * define ZLIB_WINAPI.
+ * Caution: the standard ZLIB1.DLL is NOT compiled using ZLIB_WINAPI.
+ */
# ifdef ZLIB_WINAPI
# ifdef FAR
# undef FAR
# endif
# include <windows.h>
- /* No need for _export, use ZLIB.DEF instead. */
- /* For complete Windows compatibility, use WINAPI, not __stdcall. */
+ /* No need for _export, use ZLIB.DEF instead. */
+ /* For complete Windows compatibility, use WINAPI, not __stdcall. */
# define ZEXPORT WINAPI
# ifdef WIN32
# define ZEXPORTVA WINAPIV
@@ -368,10 +368,10 @@ typedef unsigned int uInt; /* 16 bits or more */
typedef unsigned long uLong; /* 32 bits or more */
#ifdef SMALL_MEDIUM
- /* Borland C/C++ and some old MSC versions ignore FAR inside typedef */
+ /* Borland C/C++ and some old MSC versions ignore FAR inside typedef */
# define Bytef Byte FAR
#else
- typedef Byte FAR Bytef;
+ typedef Byte FAR Bytef;
#endif
typedef char FAR charf;
typedef int FAR intf;
@@ -379,13 +379,13 @@ typedef uInt FAR uIntf;
typedef uLong FAR uLongf;
#ifdef STDC
- typedef void const *voidpc;
- typedef void FAR *voidpf;
- typedef void *voidp;
+ typedef void const *voidpc;
+ typedef void FAR *voidpf;
+ typedef void *voidp;
#else
- typedef Byte const *voidpc;
- typedef Byte FAR *voidpf;
- typedef Byte *voidp;
+ typedef Byte const *voidpc;
+ typedef Byte FAR *voidpf;
+ typedef Byte *voidp;
#endif
/* ./configure may #define Z_U4 here */
@@ -406,9 +406,9 @@ typedef uLong FAR uLongf;
#endif
#ifdef Z_U4
- typedef Z_U4 z_crc_t;
+ typedef Z_U4 z_crc_t;
#else
- typedef unsigned long z_crc_t;
+ typedef unsigned long z_crc_t;
#endif
#ifdef HAVE_UNISTD_H /* may be set to #if 1 by ./configure */
@@ -488,19 +488,19 @@ typedef uLong FAR uLongf;
/* MVS linker does not support external names larger than 8 bytes */
#if defined(__MVS__)
- #pragma map(deflateInit_,"DEIN")
- #pragma map(deflateInit2_,"DEIN2")
- #pragma map(deflateEnd,"DEEND")
- #pragma map(deflateBound,"DEBND")
- #pragma map(inflateInit_,"ININ")
- #pragma map(inflateInit2_,"ININ2")
- #pragma map(inflateEnd,"INEND")
- #pragma map(inflateSync,"INSY")
- #pragma map(inflateSetDictionary,"INSEDI")
- #pragma map(compressBound,"CMBND")
- #pragma map(inflate_table,"INTABL")
- #pragma map(inflate_fast,"INFA")
- #pragma map(inflate_copyright,"INCOPY")
+ #pragma map(deflateInit_,"DEIN")
+ #pragma map(deflateInit2_,"DEIN2")
+ #pragma map(deflateEnd,"DEEND")
+ #pragma map(deflateBound,"DEBND")
+ #pragma map(inflateInit_,"ININ")
+ #pragma map(inflateInit2_,"ININ2")
+ #pragma map(inflateEnd,"INEND")
+ #pragma map(inflateSync,"INSY")
+ #pragma map(inflateSetDictionary,"INSEDI")
+ #pragma map(compressBound,"CMBND")
+ #pragma map(inflate_table,"INTABL")
+ #pragma map(inflate_fast,"INFA")
+ #pragma map(inflate_copyright,"INCOPY")
#endif
#endif /* ZCONF_H */
diff --git a/src/lib/zlib/zlib.h b/src/lib/zlib/zlib.h
index 3edf3acdb57..a4c0eb0b16a 100644
--- a/src/lib/zlib/zlib.h
+++ b/src/lib/zlib/zlib.h
@@ -83,24 +83,24 @@ typedef void (*free_func) OF((voidpf opaque, voidpf address));
struct internal_state;
typedef struct z_stream_s {
- z_const Bytef *next_in; /* next input byte */
- uInt avail_in; /* number of bytes available at next_in */
- uLong total_in; /* total number of input bytes read so far */
+ z_const Bytef *next_in; /* next input byte */
+ uInt avail_in; /* number of bytes available at next_in */
+ uLong total_in; /* total number of input bytes read so far */
- Bytef *next_out; /* next output byte should be put there */
- uInt avail_out; /* remaining free space at next_out */
- uLong total_out; /* total number of bytes output so far */
+ Bytef *next_out; /* next output byte should be put there */
+ uInt avail_out; /* remaining free space at next_out */
+ uLong total_out; /* total number of bytes output so far */
- z_const char *msg; /* last error message, NULL if no error */
- struct internal_state FAR *state; /* not visible by applications */
+ z_const char *msg; /* last error message, NULL if no error */
+ struct internal_state FAR *state; /* not visible by applications */
- alloc_func zalloc; /* used to allocate the internal state */
- free_func zfree; /* used to free the internal state */
- voidpf opaque; /* private data object passed to zalloc and zfree */
+ alloc_func zalloc; /* used to allocate the internal state */
+ free_func zfree; /* used to free the internal state */
+ voidpf opaque; /* private data object passed to zalloc and zfree */
- int data_type; /* best guess about the data type: binary or text */
- uLong adler; /* adler32 value of the uncompressed data */
- uLong reserved; /* reserved for future use */
+ int data_type; /* best guess about the data type: binary or text */
+ uLong adler; /* adler32 value of the uncompressed data */
+ uLong reserved; /* reserved for future use */
} z_stream;
typedef z_stream FAR *z_streamp;
@@ -110,19 +110,19 @@ typedef z_stream FAR *z_streamp;
for more details on the meanings of these fields.
*/
typedef struct gz_header_s {
- int text; /* true if compressed data believed to be text */
- uLong time; /* modification time */
- int xflags; /* extra flags (not used when writing a gzip file) */
- int os; /* operating system */
- Bytef *extra; /* pointer to extra field or Z_NULL if none */
- uInt extra_len; /* extra field length (valid if extra != Z_NULL) */
- uInt extra_max; /* space at extra (only when reading header) */
- Bytef *name; /* pointer to zero-terminated file name or Z_NULL */
- uInt name_max; /* space at name (only when reading header) */
- Bytef *comment; /* pointer to zero-terminated comment or Z_NULL */
- uInt comm_max; /* space at comment (only when reading header) */
- int hcrc; /* true if there was or will be a header crc */
- int done; /* true when done reading gzip header (not used
+ int text; /* true if compressed data believed to be text */
+ uLong time; /* modification time */
+ int xflags; /* extra flags (not used when writing a gzip file) */
+ int os; /* operating system */
+ Bytef *extra; /* pointer to extra field or Z_NULL if none */
+ uInt extra_len; /* extra field length (valid if extra != Z_NULL) */
+ uInt extra_max; /* space at extra (only when reading header) */
+ Bytef *name; /* pointer to zero-terminated file name or Z_NULL */
+ uInt name_max; /* space at name (only when reading header) */
+ Bytef *comment; /* pointer to zero-terminated comment or Z_NULL */
+ uInt comm_max; /* space at comment (only when reading header) */
+ int hcrc; /* true if there was or will be a header crc */
+ int done; /* true when done reading gzip header (not used
when writing a gzip file) */
} gz_header;
@@ -159,7 +159,7 @@ typedef gz_header FAR *gz_headerp;
if the decompressor wants to decompress everything in a single step).
*/
- /* constants */
+ /* constants */
#define Z_NO_FLUSH 0
#define Z_PARTIAL_FLUSH 1
@@ -211,7 +211,7 @@ typedef gz_header FAR *gz_headerp;
/* for compatibility with versions < 1.0.2 */
- /* basic functions */
+ /* basic functions */
ZEXTERN const char * ZEXPORT zlibVersion OF((void));
/* The application can compare zlibVersion and ZLIB_VERSION for consistency.
@@ -517,7 +517,7 @@ ZEXTERN int ZEXPORT inflateEnd OF((z_streamp strm));
*/
- /* Advanced functions */
+ /* Advanced functions */
/*
The following functions are needed only in some special applications.
@@ -585,8 +585,8 @@ ZEXTERN int ZEXPORT deflateInit2 OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT deflateSetDictionary OF((z_streamp strm,
- const Bytef *dictionary,
- uInt dictLength));
+ const Bytef *dictionary,
+ uInt dictLength));
/*
Initializes the compression dictionary from the given byte sequence
without producing any compressed output. When using the zlib format, this
@@ -629,7 +629,7 @@ ZEXTERN int ZEXPORT deflateSetDictionary OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT deflateCopy OF((z_streamp dest,
- z_streamp source));
+ z_streamp source));
/*
Sets the destination stream as a complete copy of the source stream.
@@ -658,8 +658,8 @@ ZEXTERN int ZEXPORT deflateReset OF((z_streamp strm));
*/
ZEXTERN int ZEXPORT deflateParams OF((z_streamp strm,
- int level,
- int strategy));
+ int level,
+ int strategy));
/*
Dynamically update the compression level and compression strategy. The
interpretation of level and strategy is as in deflateInit2. This can be
@@ -679,10 +679,10 @@ ZEXTERN int ZEXPORT deflateParams OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT deflateTune OF((z_streamp strm,
- int good_length,
- int max_lazy,
- int nice_length,
- int max_chain));
+ int good_length,
+ int max_lazy,
+ int nice_length,
+ int max_chain));
/*
Fine tune deflate's internal compression parameters. This should only be
used by someone who understands the algorithm used by zlib's deflate for
@@ -696,7 +696,7 @@ ZEXTERN int ZEXPORT deflateTune OF((z_streamp strm,
*/
ZEXTERN uLong ZEXPORT deflateBound OF((z_streamp strm,
- uLong sourceLen));
+ uLong sourceLen));
/*
deflateBound() returns an upper bound on the compressed size after
deflation of sourceLen bytes. It must be called after deflateInit() or
@@ -711,8 +711,8 @@ ZEXTERN uLong ZEXPORT deflateBound OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT deflatePending OF((z_streamp strm,
- unsigned *pending,
- int *bits));
+ unsigned *pending,
+ int *bits));
/*
deflatePending() returns the number of bytes and bits of output that have
been generated, but not yet provided in the available output. The bytes not
@@ -726,8 +726,8 @@ ZEXTERN int ZEXPORT deflatePending OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT deflatePrime OF((z_streamp strm,
- int bits,
- int value));
+ int bits,
+ int value));
/*
deflatePrime() inserts bits in the deflate output stream. The intent
is that this function is used to start off the deflate output with the bits
@@ -743,7 +743,7 @@ ZEXTERN int ZEXPORT deflatePrime OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT deflateSetHeader OF((z_streamp strm,
- gz_headerp head));
+ gz_headerp head));
/*
deflateSetHeader() provides gzip header information for when a gzip
stream is requested by deflateInit2(). deflateSetHeader() may be called
@@ -817,8 +817,8 @@ ZEXTERN int ZEXPORT inflateInit2 OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT inflateSetDictionary OF((z_streamp strm,
- const Bytef *dictionary,
- uInt dictLength));
+ const Bytef *dictionary,
+ uInt dictLength));
/*
Initializes the decompression dictionary from the given uncompressed byte
sequence. This function must be called immediately after a call of inflate,
@@ -859,7 +859,7 @@ ZEXTERN int ZEXPORT inflateSync OF((z_streamp strm));
*/
ZEXTERN int ZEXPORT inflateCopy OF((z_streamp dest,
- z_streamp source));
+ z_streamp source));
/*
Sets the destination stream as a complete copy of the source stream.
@@ -885,7 +885,7 @@ ZEXTERN int ZEXPORT inflateReset OF((z_streamp strm));
*/
ZEXTERN int ZEXPORT inflateReset2 OF((z_streamp strm,
- int windowBits));
+ int windowBits));
/*
This function is the same as inflateReset, but it also permits changing
the wrap and window size requests. The windowBits parameter is interpreted
@@ -897,8 +897,8 @@ ZEXTERN int ZEXPORT inflateReset2 OF((z_streamp strm,
*/
ZEXTERN int ZEXPORT inflatePrime OF((z_streamp strm,
- int bits,
- int value));
+ int bits,
+ int value));
/*
This function inserts bits in the inflate input stream. The intent is
that this function is used to start inflating at a bit position in the
@@ -946,7 +946,7 @@ ZEXTERN long ZEXPORT inflateMark OF((z_streamp strm));
*/
ZEXTERN int ZEXPORT inflateGetHeader OF((z_streamp strm,
- gz_headerp head));
+ gz_headerp head));
/*
inflateGetHeader() requests that gzip header information be stored in the
provided gz_header structure. inflateGetHeader() may be called after
@@ -1011,8 +1011,8 @@ typedef unsigned (*in_func) OF((void FAR *, unsigned char FAR * FAR *));
typedef int (*out_func) OF((void FAR *, unsigned char FAR *, unsigned));
ZEXTERN int ZEXPORT inflateBack OF((z_streamp strm,
- in_func in, void FAR *in_desc,
- out_func out, void FAR *out_desc));
+ in_func in, void FAR *in_desc,
+ out_func out, void FAR *out_desc));
/*
inflateBack() does a raw inflate with a single call using a call-back
interface for input and output. This is more efficient than inflate() for
@@ -1130,7 +1130,7 @@ ZEXTERN uLong ZEXPORT zlibCompileFlags OF((void));
#ifndef Z_SOLO
- /* utility functions */
+ /* utility functions */
/*
The following utility functions are implemented on top of the basic
@@ -1141,7 +1141,7 @@ ZEXTERN uLong ZEXPORT zlibCompileFlags OF((void));
*/
ZEXTERN int ZEXPORT compress OF((Bytef *dest, uLongf *destLen,
- const Bytef *source, uLong sourceLen));
+ const Bytef *source, uLong sourceLen));
/*
Compresses the source buffer into the destination buffer. sourceLen is
the byte length of the source buffer. Upon entry, destLen is the total size
@@ -1155,8 +1155,8 @@ ZEXTERN int ZEXPORT compress OF((Bytef *dest, uLongf *destLen,
*/
ZEXTERN int ZEXPORT compress2 OF((Bytef *dest, uLongf *destLen,
- const Bytef *source, uLong sourceLen,
- int level));
+ const Bytef *source, uLong sourceLen,
+ int level));
/*
Compresses the source buffer into the destination buffer. The level
parameter has the same meaning as in deflateInit. sourceLen is the byte
@@ -1178,7 +1178,7 @@ ZEXTERN uLong ZEXPORT compressBound OF((uLong sourceLen));
*/
ZEXTERN int ZEXPORT uncompress OF((Bytef *dest, uLongf *destLen,
- const Bytef *source, uLong sourceLen));
+ const Bytef *source, uLong sourceLen));
/*
Decompresses the source buffer into the destination buffer. sourceLen is
the byte length of the source buffer. Upon entry, destLen is the total size
@@ -1195,7 +1195,7 @@ ZEXTERN int ZEXPORT uncompress OF((Bytef *dest, uLongf *destLen,
buffer with the uncompressed data up to that point.
*/
- /* gzip file access functions */
+ /* gzip file access functions */
/*
This library supports reading and writing files in gzip (.gz) format with
@@ -1322,7 +1322,7 @@ ZEXTERN int ZEXPORT gzread OF((gzFile file, voidp buf, unsigned len));
*/
ZEXTERN int ZEXPORT gzwrite OF((gzFile file,
- voidpc buf, unsigned len));
+ voidpc buf, unsigned len));
/*
Writes the given number of uncompressed bytes into the compressed file.
gzwrite returns the number of uncompressed bytes written or 0 in case of
@@ -1541,7 +1541,7 @@ ZEXTERN void ZEXPORT gzclearerr OF((gzFile file));
#endif /* !Z_SOLO */
- /* checksum functions */
+ /* checksum functions */
/*
These functions are not related to compression but are exported
@@ -1608,38 +1608,38 @@ ZEXTERN uLong ZEXPORT crc32_combine OF((uLong crc1, uLong crc2, z_off_t len2));
*/
- /* various hacks, don't look :) */
+ /* various hacks, don't look :) */
/* deflateInit and inflateInit are macros to allow checking the zlib version
* and the compiler's view of z_stream:
*/
ZEXTERN int ZEXPORT deflateInit_ OF((z_streamp strm, int level,
- const char *version, int stream_size));
+ const char *version, int stream_size));
ZEXTERN int ZEXPORT inflateInit_ OF((z_streamp strm,
- const char *version, int stream_size));
+ const char *version, int stream_size));
ZEXTERN int ZEXPORT deflateInit2_ OF((z_streamp strm, int level, int method,
- int windowBits, int memLevel,
- int strategy, const char *version,
- int stream_size));
+ int windowBits, int memLevel,
+ int strategy, const char *version,
+ int stream_size));
ZEXTERN int ZEXPORT inflateInit2_ OF((z_streamp strm, int windowBits,
- const char *version, int stream_size));
+ const char *version, int stream_size));
ZEXTERN int ZEXPORT inflateBackInit_ OF((z_streamp strm, int windowBits,
- unsigned char FAR *window,
- const char *version,
- int stream_size));
+ unsigned char FAR *window,
+ const char *version,
+ int stream_size));
#define deflateInit(strm, level) \
- deflateInit_((strm), (level), ZLIB_VERSION, (int)sizeof(z_stream))
+ deflateInit_((strm), (level), ZLIB_VERSION, (int)sizeof(z_stream))
#define inflateInit(strm) \
- inflateInit_((strm), ZLIB_VERSION, (int)sizeof(z_stream))
+ inflateInit_((strm), ZLIB_VERSION, (int)sizeof(z_stream))
#define deflateInit2(strm, level, method, windowBits, memLevel, strategy) \
- deflateInit2_((strm),(level),(method),(windowBits),(memLevel),\
- (strategy), ZLIB_VERSION, (int)sizeof(z_stream))
+ deflateInit2_((strm),(level),(method),(windowBits),(memLevel),\
+ (strategy), ZLIB_VERSION, (int)sizeof(z_stream))
#define inflateInit2(strm, windowBits) \
- inflateInit2_((strm), (windowBits), ZLIB_VERSION, \
- (int)sizeof(z_stream))
+ inflateInit2_((strm), (windowBits), ZLIB_VERSION, \
+ (int)sizeof(z_stream))
#define inflateBackInit(strm, windowBits, window) \
- inflateBackInit_((strm), (windowBits), (window), \
- ZLIB_VERSION, (int)sizeof(z_stream))
+ inflateBackInit_((strm), (windowBits), (window), \
+ ZLIB_VERSION, (int)sizeof(z_stream))
#ifndef Z_SOLO
@@ -1651,18 +1651,18 @@ ZEXTERN int ZEXPORT inflateBackInit_ OF((z_streamp strm, int windowBits,
* only be used by the gzgetc() macro. You have been warned.
*/
struct gzFile_s {
- unsigned have;
- unsigned char *next;
- z_off64_t pos;
+ unsigned have;
+ unsigned char *next;
+ z_off64_t pos;
};
ZEXTERN int ZEXPORT gzgetc_ OF((gzFile file)); /* backward compatibility */
#ifdef Z_PREFIX_SET
# undef z_gzgetc
# define z_gzgetc(g) \
- ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : gzgetc(g))
+ ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : gzgetc(g))
#else
# define gzgetc(g) \
- ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : gzgetc(g))
+ ((g)->have ? ((g)->have--, (g)->pos++, *((g)->next)++) : gzgetc(g))
#endif
/* provide 64-bit offset functions if _LARGEFILE64_SOURCE defined, and/or
@@ -1672,12 +1672,12 @@ ZEXTERN int ZEXPORT gzgetc_ OF((gzFile file)); /* backward compatibility */
* without large file support, _LFS64_LARGEFILE must also be true
*/
#ifdef Z_LARGE64
- ZEXTERN gzFile ZEXPORT gzopen64 OF((const char *, const char *));
- ZEXTERN z_off64_t ZEXPORT gzseek64 OF((gzFile, z_off64_t, int));
- ZEXTERN z_off64_t ZEXPORT gztell64 OF((gzFile));
- ZEXTERN z_off64_t ZEXPORT gzoffset64 OF((gzFile));
- ZEXTERN uLong ZEXPORT adler32_combine64 OF((uLong, uLong, z_off64_t));
- ZEXTERN uLong ZEXPORT crc32_combine64 OF((uLong, uLong, z_off64_t));
+ ZEXTERN gzFile ZEXPORT gzopen64 OF((const char *, const char *));
+ ZEXTERN z_off64_t ZEXPORT gzseek64 OF((gzFile, z_off64_t, int));
+ ZEXTERN z_off64_t ZEXPORT gztell64 OF((gzFile));
+ ZEXTERN z_off64_t ZEXPORT gzoffset64 OF((gzFile));
+ ZEXTERN uLong ZEXPORT adler32_combine64 OF((uLong, uLong, z_off64_t));
+ ZEXTERN uLong ZEXPORT crc32_combine64 OF((uLong, uLong, z_off64_t));
#endif
#if !defined(ZLIB_INTERNAL) && defined(Z_WANT64)
@@ -1697,32 +1697,32 @@ ZEXTERN int ZEXPORT gzgetc_ OF((gzFile file)); /* backward compatibility */
# define crc32_combine crc32_combine64
# endif
# ifndef Z_LARGE64
- ZEXTERN gzFile ZEXPORT gzopen64 OF((const char *, const char *));
- ZEXTERN z_off_t ZEXPORT gzseek64 OF((gzFile, z_off_t, int));
- ZEXTERN z_off_t ZEXPORT gztell64 OF((gzFile));
- ZEXTERN z_off_t ZEXPORT gzoffset64 OF((gzFile));
- ZEXTERN uLong ZEXPORT adler32_combine64 OF((uLong, uLong, z_off_t));
- ZEXTERN uLong ZEXPORT crc32_combine64 OF((uLong, uLong, z_off_t));
+ ZEXTERN gzFile ZEXPORT gzopen64 OF((const char *, const char *));
+ ZEXTERN z_off_t ZEXPORT gzseek64 OF((gzFile, z_off_t, int));
+ ZEXTERN z_off_t ZEXPORT gztell64 OF((gzFile));
+ ZEXTERN z_off_t ZEXPORT gzoffset64 OF((gzFile));
+ ZEXTERN uLong ZEXPORT adler32_combine64 OF((uLong, uLong, z_off_t));
+ ZEXTERN uLong ZEXPORT crc32_combine64 OF((uLong, uLong, z_off_t));
# endif
#else
- ZEXTERN gzFile ZEXPORT gzopen OF((const char *, const char *));
- ZEXTERN z_off_t ZEXPORT gzseek OF((gzFile, z_off_t, int));
- ZEXTERN z_off_t ZEXPORT gztell OF((gzFile));
- ZEXTERN z_off_t ZEXPORT gzoffset OF((gzFile));
- ZEXTERN uLong ZEXPORT adler32_combine OF((uLong, uLong, z_off_t));
- ZEXTERN uLong ZEXPORT crc32_combine OF((uLong, uLong, z_off_t));
+ ZEXTERN gzFile ZEXPORT gzopen OF((const char *, const char *));
+ ZEXTERN z_off_t ZEXPORT gzseek OF((gzFile, z_off_t, int));
+ ZEXTERN z_off_t ZEXPORT gztell OF((gzFile));
+ ZEXTERN z_off_t ZEXPORT gzoffset OF((gzFile));
+ ZEXTERN uLong ZEXPORT adler32_combine OF((uLong, uLong, z_off_t));
+ ZEXTERN uLong ZEXPORT crc32_combine OF((uLong, uLong, z_off_t));
#endif
#else /* Z_SOLO */
- ZEXTERN uLong ZEXPORT adler32_combine OF((uLong, uLong, z_off_t));
- ZEXTERN uLong ZEXPORT crc32_combine OF((uLong, uLong, z_off_t));
+ ZEXTERN uLong ZEXPORT adler32_combine OF((uLong, uLong, z_off_t));
+ ZEXTERN uLong ZEXPORT crc32_combine OF((uLong, uLong, z_off_t));
#endif /* !Z_SOLO */
/* hack for buggy compilers */
#if !defined(ZUTIL_H) && !defined(NO_DUMMY_DECL)
- struct internal_state {int dummy;};
+ struct internal_state {int dummy;};
#endif
/* undocumented functions */
@@ -1734,7 +1734,7 @@ ZEXTERN int ZEXPORT inflateResetKeep OF((z_streamp));
ZEXTERN int ZEXPORT deflateResetKeep OF((z_streamp));
#if defined(_WIN32) && !defined(Z_SOLO)
ZEXTERN gzFile ZEXPORT gzopen_w OF((const wchar_t *path,
- const char *mode));
+ const char *mode));
#endif
#ifdef __cplusplus
diff --git a/src/lib/zlib/zutil.c b/src/lib/zlib/zutil.c
index 65e0d3b72b0..a412eeaa03c 100644
--- a/src/lib/zlib/zutil.c
+++ b/src/lib/zlib/zutil.c
@@ -29,90 +29,90 @@ const char * const z_errmsg[10] = {
const char * ZEXPORT zlibVersion()
{
- return ZLIB_VERSION;
+ return ZLIB_VERSION;
}
uLong ZEXPORT zlibCompileFlags()
{
- uLong flags;
-
- flags = 0;
- switch ((int)(sizeof(uInt))) {
- case 2: break;
- case 4: flags += 1; break;
- case 8: flags += 2; break;
- default: flags += 3;
- }
- switch ((int)(sizeof(uLong))) {
- case 2: break;
- case 4: flags += 1 << 2; break;
- case 8: flags += 2 << 2; break;
- default: flags += 3 << 2;
- }
- switch ((int)(sizeof(voidpf))) {
- case 2: break;
- case 4: flags += 1 << 4; break;
- case 8: flags += 2 << 4; break;
- default: flags += 3 << 4;
- }
- switch ((int)(sizeof(z_off_t))) {
- case 2: break;
- case 4: flags += 1 << 6; break;
- case 8: flags += 2 << 6; break;
- default: flags += 3 << 6;
- }
+ uLong flags;
+
+ flags = 0;
+ switch ((int)(sizeof(uInt))) {
+ case 2: break;
+ case 4: flags += 1; break;
+ case 8: flags += 2; break;
+ default: flags += 3;
+ }
+ switch ((int)(sizeof(uLong))) {
+ case 2: break;
+ case 4: flags += 1 << 2; break;
+ case 8: flags += 2 << 2; break;
+ default: flags += 3 << 2;
+ }
+ switch ((int)(sizeof(voidpf))) {
+ case 2: break;
+ case 4: flags += 1 << 4; break;
+ case 8: flags += 2 << 4; break;
+ default: flags += 3 << 4;
+ }
+ switch ((int)(sizeof(z_off_t))) {
+ case 2: break;
+ case 4: flags += 1 << 6; break;
+ case 8: flags += 2 << 6; break;
+ default: flags += 3 << 6;
+ }
#ifdef DEBUG
- flags += 1 << 8;
+ flags += 1 << 8;
#endif
#if defined(ASMV) || defined(ASMINF)
- flags += 1 << 9;
+ flags += 1 << 9;
#endif
#ifdef ZLIB_WINAPI
- flags += 1 << 10;
+ flags += 1 << 10;
#endif
#ifdef BUILDFIXED
- flags += 1 << 12;
+ flags += 1 << 12;
#endif
#ifdef DYNAMIC_CRC_TABLE
- flags += 1 << 13;
+ flags += 1 << 13;
#endif
#ifdef NO_GZCOMPRESS
- flags += 1L << 16;
+ flags += 1L << 16;
#endif
#ifdef NO_GZIP
- flags += 1L << 17;
+ flags += 1L << 17;
#endif
#ifdef PKZIP_BUG_WORKAROUND
- flags += 1L << 20;
+ flags += 1L << 20;
#endif
#ifdef FASTEST
- flags += 1L << 21;
+ flags += 1L << 21;
#endif
#if defined(STDC) || defined(Z_HAVE_STDARG_H)
# ifdef NO_vsnprintf
- flags += 1L << 25;
+ flags += 1L << 25;
# ifdef HAS_vsprintf_void
- flags += 1L << 26;
+ flags += 1L << 26;
# endif
# else
# ifdef HAS_vsnprintf_void
- flags += 1L << 26;
+ flags += 1L << 26;
# endif
# endif
#else
- flags += 1L << 24;
+ flags += 1L << 24;
# ifdef NO_snprintf
- flags += 1L << 25;
+ flags += 1L << 25;
# ifdef HAS_sprintf_void
- flags += 1L << 26;
+ flags += 1L << 26;
# endif
# else
# ifdef HAS_snprintf_void
- flags += 1L << 26;
+ flags += 1L << 26;
# endif
# endif
#endif
- return flags;
+ return flags;
}
#ifdef DEBUG
@@ -123,10 +123,10 @@ uLong ZEXPORT zlibCompileFlags()
int ZLIB_INTERNAL z_verbose = verbose;
void ZLIB_INTERNAL z_error (m)
- char *m;
+ char *m;
{
- fprintf(stderr, "%s\n", m);
- exit(1);
+ fprintf(stderr, "%s\n", m);
+ exit(1);
}
#endif
@@ -134,53 +134,53 @@ void ZLIB_INTERNAL z_error (m)
* uncompress()
*/
const char * ZEXPORT zError(err)
- int err;
+ int err;
{
- return ERR_MSG(err);
+ return ERR_MSG(err);
}
#if defined(_WIN32_WCE)
- /* The Microsoft C Run-Time Library for Windows CE doesn't have
- * errno. We define it as a global variable to simplify porting.
- * Its value is always 0 and should not be used.
- */
- int errno = 0;
+ /* The Microsoft C Run-Time Library for Windows CE doesn't have
+ * errno. We define it as a global variable to simplify porting.
+ * Its value is always 0 and should not be used.
+ */
+ int errno = 0;
#endif
#ifndef HAVE_MEMCPY
void ZLIB_INTERNAL zmemcpy(dest, source, len)
- Bytef* dest;
- const Bytef* source;
- uInt len;
+ Bytef* dest;
+ const Bytef* source;
+ uInt len;
{
- if (len == 0) return;
- do {
- *dest++ = *source++; /* ??? to be unrolled */
- } while (--len != 0);
+ if (len == 0) return;
+ do {
+ *dest++ = *source++; /* ??? to be unrolled */
+ } while (--len != 0);
}
int ZLIB_INTERNAL zmemcmp(s1, s2, len)
- const Bytef* s1;
- const Bytef* s2;
- uInt len;
+ const Bytef* s1;
+ const Bytef* s2;
+ uInt len;
{
- uInt j;
+ uInt j;
- for (j = 0; j < len; j++) {
- if (s1[j] != s2[j]) return 2*(s1[j] > s2[j])-1;
- }
- return 0;
+ for (j = 0; j < len; j++) {
+ if (s1[j] != s2[j]) return 2*(s1[j] > s2[j])-1;
+ }
+ return 0;
}
void ZLIB_INTERNAL zmemzero(dest, len)
- Bytef* dest;
- uInt len;
+ Bytef* dest;
+ uInt len;
{
- if (len == 0) return;
- do {
- *dest++ = 0; /* ??? to be unrolled */
- } while (--len != 0);
+ if (len == 0) return;
+ do {
+ *dest++ = 0; /* ??? to be unrolled */
+ } while (--len != 0);
}
#endif
@@ -205,8 +205,8 @@ void ZLIB_INTERNAL zmemzero(dest, len)
local int next_ptr = 0;
typedef struct ptr_table_s {
- voidpf org_ptr;
- voidpf new_ptr;
+ voidpf org_ptr;
+ voidpf new_ptr;
} ptr_table;
local ptr_table table[MAX_PTR];
@@ -219,48 +219,48 @@ local ptr_table table[MAX_PTR];
voidpf ZLIB_INTERNAL zcalloc (voidpf opaque, unsigned items, unsigned size)
{
- voidpf buf = opaque; /* just to make some compilers happy */
- ulg bsize = (ulg)items*size;
-
- /* If we allocate less than 65520 bytes, we assume that farmalloc
- * will return a usable pointer which doesn't have to be normalized.
- */
- if (bsize < 65520L) {
- buf = farmalloc(bsize);
- if (*(ush*)&buf != 0) return buf;
- } else {
- buf = farmalloc(bsize + 16L);
- }
- if (buf == NULL || next_ptr >= MAX_PTR) return NULL;
- table[next_ptr].org_ptr = buf;
-
- /* Normalize the pointer to seg:0 */
- *((ush*)&buf+1) += ((ush)((uch*)buf-0) + 15) >> 4;
- *(ush*)&buf = 0;
- table[next_ptr++].new_ptr = buf;
- return buf;
+ voidpf buf = opaque; /* just to make some compilers happy */
+ ulg bsize = (ulg)items*size;
+
+ /* If we allocate less than 65520 bytes, we assume that farmalloc
+ * will return a usable pointer which doesn't have to be normalized.
+ */
+ if (bsize < 65520L) {
+ buf = farmalloc(bsize);
+ if (*(ush*)&buf != 0) return buf;
+ } else {
+ buf = farmalloc(bsize + 16L);
+ }
+ if (buf == NULL || next_ptr >= MAX_PTR) return NULL;
+ table[next_ptr].org_ptr = buf;
+
+ /* Normalize the pointer to seg:0 */
+ *((ush*)&buf+1) += ((ush)((uch*)buf-0) + 15) >> 4;
+ *(ush*)&buf = 0;
+ table[next_ptr++].new_ptr = buf;
+ return buf;
}
void ZLIB_INTERNAL zcfree (voidpf opaque, voidpf ptr)
{
- int n;
- if (*(ush*)&ptr != 0) { /* object < 64K */
- farfree(ptr);
- return;
- }
- /* Find the original pointer */
- for (n = 0; n < next_ptr; n++) {
- if (ptr != table[n].new_ptr) continue;
-
- farfree(table[n].org_ptr);
- while (++n < next_ptr) {
- table[n-1] = table[n];
- }
- next_ptr--;
- return;
- }
- ptr = opaque; /* just to make some compilers happy */
- Assert(0, "zcfree: ptr not found");
+ int n;
+ if (*(ush*)&ptr != 0) { /* object < 64K */
+ farfree(ptr);
+ return;
+ }
+ /* Find the original pointer */
+ for (n = 0; n < next_ptr; n++) {
+ if (ptr != table[n].new_ptr) continue;
+
+ farfree(table[n].org_ptr);
+ while (++n < next_ptr) {
+ table[n-1] = table[n];
+ }
+ next_ptr--;
+ return;
+ }
+ ptr = opaque; /* just to make some compilers happy */
+ Assert(0, "zcfree: ptr not found");
}
#endif /* __TURBOC__ */
@@ -278,14 +278,14 @@ void ZLIB_INTERNAL zcfree (voidpf opaque, voidpf ptr)
voidpf ZLIB_INTERNAL zcalloc (voidpf opaque, uInt items, uInt size)
{
- if (opaque) opaque = 0; /* to make compiler happy */
- return _halloc((long)items, size);
+ if (opaque) opaque = 0; /* to make compiler happy */
+ return _halloc((long)items, size);
}
void ZLIB_INTERNAL zcfree (voidpf opaque, voidpf ptr)
{
- if (opaque) opaque = 0; /* to make compiler happy */
- _hfree(ptr);
+ if (opaque) opaque = 0; /* to make compiler happy */
+ _hfree(ptr);
}
#endif /* M_I86 */
@@ -302,21 +302,21 @@ extern void free OF((voidpf ptr));
#endif
voidpf ZLIB_INTERNAL zcalloc (opaque, items, size)
- voidpf opaque;
- unsigned items;
- unsigned size;
+ voidpf opaque;
+ unsigned items;
+ unsigned size;
{
- if (opaque) items += size - size; /* make compiler happy */
- return sizeof(uInt) > 2 ? (voidpf)malloc(items * size) :
- (voidpf)calloc(items, size);
+ if (opaque) items += size - size; /* make compiler happy */
+ return sizeof(uInt) > 2 ? (voidpf)malloc(items * size) :
+ (voidpf)calloc(items, size);
}
void ZLIB_INTERNAL zcfree (opaque, ptr)
- voidpf opaque;
- voidpf ptr;
+ voidpf opaque;
+ voidpf ptr;
{
- free(ptr);
- if (opaque) return; /* make compiler happy */
+ free(ptr);
+ if (opaque) return; /* make compiler happy */
}
#endif /* MY_ZCALLOC */
diff --git a/src/lib/zlib/zutil.h b/src/lib/zlib/zutil.h
index 4e3dcc6ae9f..72df5358db9 100644
--- a/src/lib/zlib/zutil.h
+++ b/src/lib/zlib/zutil.h
@@ -30,7 +30,7 @@
#endif
#ifdef Z_SOLO
- typedef long ptrdiff_t; /* guess -- will be caught if guess is wrong */
+ typedef long ptrdiff_t; /* guess -- will be caught if guess is wrong */
#endif
#ifndef local
@@ -50,10 +50,10 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
#define ERR_MSG(err) z_errmsg[Z_NEED_DICT-(err)]
#define ERR_RETURN(strm,err) \
- return (strm->msg = (char*)ERR_MSG(err), (err))
+ return (strm->msg = (char*)ERR_MSG(err), (err))
/* To be used only when the state is known to be valid */
- /* common constants */
+ /* common constants */
#ifndef DEF_WBITS
# define DEF_WBITS MAX_WBITS
@@ -78,16 +78,16 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
#define PRESET_DICT 0x20 /* preset dictionary flag in zlib header */
- /* target dependencies */
+ /* target dependencies */
#if defined(MSDOS) || (defined(WINDOWS) && !defined(WIN32))
# define OS_CODE 0x00
# ifndef Z_SOLO
# if defined(__TURBOC__) || defined(__BORLANDC__)
# if (__STDC__ == 1) && (defined(__LARGE__) || defined(__COMPACT__))
- /* Allow compilation with ANSI keywords only enabled */
- void _Cdecl farfree( void *block );
- void *_Cdecl farmalloc( unsigned long nbytes );
+ /* Allow compilation with ANSI keywords only enabled */
+ void _Cdecl farfree( void *block );
+ void *_Cdecl farmalloc( unsigned long nbytes );
# else
# include <alloc.h>
# endif
@@ -104,7 +104,7 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
#if defined(VAXC) || defined(VMS)
# define OS_CODE 0x02
# define F_OPEN(name, mode) \
- fopen((name), (mode), "mbc=60", "ctx=stm", "rfm=fix", "mrs=512")
+ fopen((name), (mode), "mbc=60", "ctx=stm", "rfm=fix", "mrs=512")
#endif
#if defined(ATARI) || defined(atarist)
@@ -153,7 +153,7 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
# if defined(_WIN32_WCE)
# define fdopen(fd,mode) NULL /* No fdopen() */
# ifndef _PTRDIFF_T_DEFINED
- typedef int ptrdiff_t;
+ typedef int ptrdiff_t;
# define _PTRDIFF_T_DEFINED
# endif
# else
@@ -162,18 +162,18 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
#endif
#if defined(__BORLANDC__) && !defined(MSDOS)
- #pragma warn -8004
- #pragma warn -8008
- #pragma warn -8066
+ #pragma warn -8004
+ #pragma warn -8008
+ #pragma warn -8066
#endif
/* provide prototypes for these when building zlib without LFS */
#if !defined(_WIN32) && (!defined(_LARGEFILE64_SOURCE) || _LFS64_LARGEFILE-0 == 0)
- ZEXTERN uLong ZEXPORT adler32_combine64 OF((uLong, uLong, z_off_t));
- ZEXTERN uLong ZEXPORT crc32_combine64 OF((uLong, uLong, z_off_t));
+ ZEXTERN uLong ZEXPORT adler32_combine64 OF((uLong, uLong, z_off_t));
+ ZEXTERN uLong ZEXPORT crc32_combine64 OF((uLong, uLong, z_off_t));
#endif
- /* common defaults */
+ /* common defaults */
#ifndef OS_CODE
# define OS_CODE 0x03 /* assume Unix */
@@ -183,16 +183,16 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
# define F_OPEN(name, mode) fopen((name), (mode))
#endif
- /* functions */
+ /* functions */
#if defined(pyr) || defined(Z_SOLO)
# define NO_MEMCPY
#endif
#if defined(SMALL_MEDIUM) && !defined(_MSC_VER) && !defined(__SC__)
- /* Use our own functions for small and medium model with MSC <= 5.0.
- * You may have to use the same strategy for Borland C (untested).
- * The __SC__ check is for Symantec.
- */
+ /* Use our own functions for small and medium model with MSC <= 5.0.
+ * You may have to use the same strategy for Borland C (untested).
+ * The __SC__ check is for Symantec.
+ */
# define NO_MEMCPY
#endif
#if defined(STDC) && !defined(HAVE_MEMCPY) && !defined(NO_MEMCPY)
@@ -209,16 +209,16 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
# define zmemzero(dest, len) memset(dest, 0, len)
# endif
#else
- void ZLIB_INTERNAL zmemcpy OF((Bytef* dest, const Bytef* source, uInt len));
- int ZLIB_INTERNAL zmemcmp OF((const Bytef* s1, const Bytef* s2, uInt len));
- void ZLIB_INTERNAL zmemzero OF((Bytef* dest, uInt len));
+ void ZLIB_INTERNAL zmemcpy OF((Bytef* dest, const Bytef* source, uInt len));
+ int ZLIB_INTERNAL zmemcmp OF((const Bytef* s1, const Bytef* s2, uInt len));
+ void ZLIB_INTERNAL zmemzero OF((Bytef* dest, uInt len));
#endif
/* Diagnostic functions */
#ifdef DEBUG
# include <stdio.h>
- extern int ZLIB_INTERNAL z_verbose;
- extern void ZLIB_INTERNAL z_error OF((char *m));
+ extern int ZLIB_INTERNAL z_verbose;
+ extern void ZLIB_INTERNAL z_error OF((char *m));
# define Assert(cond,msg) {if(!(cond)) z_error(msg);}
# define Trace(x) {if (z_verbose>=0) fprintf x ;}
# define Tracev(x) {if (z_verbose>0) fprintf x ;}
@@ -235,18 +235,18 @@ extern const char * const z_errmsg[10]; /* indexed by 2-zlib_error */
#endif
#ifndef Z_SOLO
- voidpf ZLIB_INTERNAL zcalloc OF((voidpf opaque, unsigned items,
- unsigned size));
- void ZLIB_INTERNAL zcfree OF((voidpf opaque, voidpf ptr));
+ voidpf ZLIB_INTERNAL zcalloc OF((voidpf opaque, unsigned items,
+ unsigned size));
+ void ZLIB_INTERNAL zcfree OF((voidpf opaque, voidpf ptr));
#endif
#define ZALLOC(strm, items, size) \
- (*((strm)->zalloc))((strm)->opaque, (items), (size))
+ (*((strm)->zalloc))((strm)->opaque, (items), (size))
#define ZFREE(strm, addr) (*((strm)->zfree))((strm)->opaque, (voidpf)(addr))
#define TRY_FREE(s, p) {if (p) ZFREE(s, p);}
/* Reverse the bytes in a 32-bit value */
#define ZSWAP32(q) ((((q) >> 24) & 0xff) + (((q) >> 8) & 0xff00) + \
- (((q) & 0xff00) << 8) + (((q) & 0xff) << 24))
+ (((q) & 0xff00) << 8) + (((q) & 0xff) << 24))
#endif /* ZUTIL_H */
diff --git a/src/mame/audio/8080bw.c b/src/mame/audio/8080bw.c
index a369e41ef1a..2c2ed5be752 100644
--- a/src/mame/audio/8080bw.c
+++ b/src/mame/audio/8080bw.c
@@ -35,12 +35,12 @@ WRITE8_MEMBER(_8080bw_state::invadpt2_sh_port_1_w)
{
UINT8 rising_bits = data & ~m_port_1_last_extra;
- sn76477_enable_w(m_sn, !(data & 0x01)); /* SAUCER SOUND */
+ sn76477_enable_w(m_sn, !(data & 0x01)); /* SAUCER SOUND */
- if (rising_bits & 0x02) m_samples->start(0, 0); /* MISSLE SOUND */
- if (rising_bits & 0x04) m_samples->start(1, 1); /* EXPLOSION */
- if (rising_bits & 0x08) m_samples->start(2, 2); /* INVADER HIT */
- if (rising_bits & 0x10) m_samples->start(5, 8); /* BONUS MISSILE BASE */
+ if (rising_bits & 0x02) m_samples->start(0, 0); /* MISSLE SOUND */
+ if (rising_bits & 0x04) m_samples->start(1, 1); /* EXPLOSION */
+ if (rising_bits & 0x08) m_samples->start(2, 2); /* INVADER HIT */
+ if (rising_bits & 0x10) m_samples->start(5, 8); /* BONUS MISSILE BASE */
m_screen_red = data & 0x04;
@@ -53,18 +53,18 @@ WRITE8_MEMBER(_8080bw_state::invadpt2_sh_port_2_w)
{
/* FLEET (movement)
- DO = 20K + 20K
- D1 = 68K
- D2 = 82K
- D3 = 100K */
+ DO = 20K + 20K
+ D1 = 68K
+ D2 = 82K
+ D3 = 100K */
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (rising_bits & 0x01) m_samples->start(4, 3); /* FLEET */
- if (rising_bits & 0x02) m_samples->start(4, 4); /* FLEET */
- if (rising_bits & 0x04) m_samples->start(4, 5); /* FLEET */
- if (rising_bits & 0x08) m_samples->start(4, 6); /* FLEET */
- if (rising_bits & 0x10) m_samples->start(3, 7); /* SAUCER HIT */
+ if (rising_bits & 0x01) m_samples->start(4, 3); /* FLEET */
+ if (rising_bits & 0x02) m_samples->start(4, 4); /* FLEET */
+ if (rising_bits & 0x04) m_samples->start(4, 5); /* FLEET */
+ if (rising_bits & 0x08) m_samples->start(4, 6); /* FLEET */
+ if (rising_bits & 0x10) m_samples->start(3, 7); /* SAUCER HIT */
m_flip_screen = BIT(data, 5) & ioport(CABINET_PORT_TAG)->read();
@@ -83,11 +83,11 @@ WRITE8_MEMBER(_8080bw_state::spacerng_sh_port_2_w)
{
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (rising_bits & 0x01) m_samples->start(4, 3); /* FLEET */
- if (rising_bits & 0x02) m_samples->start(4, 4); /* FLEET */
- if (rising_bits & 0x04) m_samples->start(4, 5); /* FLEET */
- if (rising_bits & 0x08) m_samples->start(4, 6); /* FLEET */
- if (rising_bits & 0x10) m_samples->start(3, 7); /* SAUCER HIT */
+ if (rising_bits & 0x01) m_samples->start(4, 3); /* FLEET */
+ if (rising_bits & 0x02) m_samples->start(4, 4); /* FLEET */
+ if (rising_bits & 0x04) m_samples->start(4, 5); /* FLEET */
+ if (rising_bits & 0x08) m_samples->start(4, 6); /* FLEET */
+ if (rising_bits & 0x10) m_samples->start(3, 7); /* SAUCER HIT */
m_flip_screen = BIT(~data, 5) & ioport(CABINET_PORT_TAG)->read();
@@ -104,13 +104,13 @@ WRITE8_MEMBER(_8080bw_state::spcewars_sh_port_w)
{
UINT8 rising_bits = data & ~m_port_1_last_extra;
- sn76477_enable_w(m_sn, !(data & 0x01)); /* Saucer Sound */
+ sn76477_enable_w(m_sn, !(data & 0x01)); /* Saucer Sound */
- if (rising_bits & 0x02) m_samples->start(0, 0); /* Shot Sound */
- if (rising_bits & 0x04) m_samples->start(1, 1); /* Base Hit */
- if (rising_bits & 0x08) m_samples->start(2, 2); /* Invader Hit */
+ if (rising_bits & 0x02) m_samples->start(0, 0); /* Shot Sound */
+ if (rising_bits & 0x04) m_samples->start(1, 1); /* Base Hit */
+ if (rising_bits & 0x08) m_samples->start(2, 2); /* Invader Hit */
- speaker_level_w(m_speaker, (data & 0x10) ? 1 : 0); /* Various bitstream tunes */
+ speaker_level_w(m_speaker, (data & 0x10) ? 1 : 0); /* Various bitstream tunes */
m_port_1_last_extra = data;
}
@@ -140,7 +140,7 @@ static const char *const lrescue_sample_names[] =
const samples_interface lrescue_samples_interface =
{
- 4, /* 4 channels */
+ 4, /* 4 channels */
lrescue_sample_names
};
@@ -148,11 +148,11 @@ WRITE8_MEMBER(_8080bw_state::lrescue_sh_port_1_w)
{
UINT8 rising_bits = data & ~m_port_1_last_extra;
- if (rising_bits & 0x01) m_samples->start(0, 3); /* Thrust */
- if (rising_bits & 0x02) m_samples->start(1, 2); /* Shot Sound */
- if (rising_bits & 0x04) m_samples->start(0, 1); /* Death */
- if (rising_bits & 0x08) m_samples->start(1, 0); /* Alien Hit */
- if (rising_bits & 0x10) m_samples->start(2, 5); /* Bonus Ship (not confirmed) */
+ if (rising_bits & 0x01) m_samples->start(0, 3); /* Thrust */
+ if (rising_bits & 0x02) m_samples->start(1, 2); /* Shot Sound */
+ if (rising_bits & 0x04) m_samples->start(0, 1); /* Death */
+ if (rising_bits & 0x08) m_samples->start(1, 0); /* Alien Hit */
+ if (rising_bits & 0x10) m_samples->start(2, 5); /* Bonus Ship (not confirmed) */
machine().sound().system_enable(data & 0x20);
@@ -165,14 +165,14 @@ WRITE8_MEMBER(_8080bw_state::lrescue_sh_port_2_w)
{
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (rising_bits & 0x01) m_samples->start(1, 8); /* Footstep high tone */
- if (rising_bits & 0x02) m_samples->start(1, 7); /* Footstep low tone */
- if (rising_bits & 0x04) m_samples->start(1, 4); /* Bonus when counting men saved */
+ if (rising_bits & 0x01) m_samples->start(1, 8); /* Footstep high tone */
+ if (rising_bits & 0x02) m_samples->start(1, 7); /* Footstep low tone */
+ if (rising_bits & 0x04) m_samples->start(1, 4); /* Bonus when counting men saved */
- speaker_level_w(m_speaker, (data & 0x08) ? 1 : 0); /* Bitstream tunes - endlevel and bonus1 */
+ speaker_level_w(m_speaker, (data & 0x08) ? 1 : 0); /* Bitstream tunes - endlevel and bonus1 */
- if (rising_bits & 0x10) m_samples->start(3, 6); /* Shooting Star and Rescue Ship sounds */
- if ((~data & 0x10) && (m_port_2_last_extra & 0x10)) m_samples->stop(3); /* This makes the rescue ship sound beep on and off */
+ if (rising_bits & 0x10) m_samples->start(3, 6); /* Shooting Star and Rescue Ship sounds */
+ if ((~data & 0x10) && (m_port_2_last_extra & 0x10)) m_samples->stop(3); /* This makes the rescue ship sound beep on and off */
m_flip_screen = BIT(data, 5) & ioport(CABINET_PORT_TAG)->read();
@@ -212,12 +212,12 @@ WRITE8_MEMBER(_8080bw_state::cosmo_sh_port_2_w)
static const discrete_dac_r1_ladder ballbomb_music_dac =
{3, {0, RES_K(47), RES_K(12)}, 0, 0, 0, CAP_U(0.1)};
-#define BALLBOMB_MUSIC_CLK (3993.6*2*2*2)
+#define BALLBOMB_MUSIC_CLK (3993.6*2*2*2)
/* Nodes - Inputs */
-#define BALLBOMB_MUSIC_DATA NODE_01
+#define BALLBOMB_MUSIC_DATA NODE_01
/* Nodes - Sounds */
-#define BALLBOMB_MUSIC NODE_11
+#define BALLBOMB_MUSIC NODE_11
DISCRETE_SOUND_START(ballbomb)
@@ -255,11 +255,11 @@ WRITE8_MEMBER(_8080bw_state::ballbomb_sh_port_1_w)
{
UINT8 rising_bits = data & ~m_port_1_last_extra;
- if (rising_bits & 0x01) m_samples->start(1, 2); /* Hit a balloon */
- if (rising_bits & 0x02) m_samples->start(2, 0); /* Shot Sound */
- if (rising_bits & 0x04) m_samples->start(2, 1); /* Base Hit */
- if (rising_bits & 0x08) m_samples->start(1, 7); /* Hit a Bomb */
- if (rising_bits & 0x10) m_samples->start(3, 8); /* Bonus Base at 1500 points */
+ if (rising_bits & 0x01) m_samples->start(1, 2); /* Hit a balloon */
+ if (rising_bits & 0x02) m_samples->start(2, 0); /* Shot Sound */
+ if (rising_bits & 0x04) m_samples->start(2, 1); /* Base Hit */
+ if (rising_bits & 0x08) m_samples->start(1, 7); /* Hit a Bomb */
+ if (rising_bits & 0x10) m_samples->start(3, 8); /* Bonus Base at 1500 points */
machine().sound().system_enable(data & 0x20);
@@ -272,9 +272,9 @@ WRITE8_MEMBER(_8080bw_state::ballbomb_sh_port_2_w)
{
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (data & 0x01) m_samples->start(0, 7); /* Indicates plane will drop bombs */
- if (data & 0x04) m_samples->start(0, 4); /* Plane is dropping new balloons at start of level */
- if (rising_bits & 0x10) m_samples->start(2, 2); /* Balloon hit and bomb drops */
+ if (data & 0x01) m_samples->start(0, 7); /* Indicates plane will drop bombs */
+ if (data & 0x04) m_samples->start(0, 4); /* Plane is dropping new balloons at start of level */
+ if (rising_bits & 0x10) m_samples->start(2, 2); /* Balloon hit and bomb drops */
m_flip_screen = BIT(data, 5) & ioport(CABINET_PORT_TAG)->read();
@@ -292,12 +292,12 @@ WRITE8_MEMBER(_8080bw_state::ballbomb_sh_port_2_w)
static const discrete_dac_r1_ladder indianbt_music_dac =
{3, {0, RES_K(47), RES_K(12)}, 0, 0, 0, CAP_U(0.1)};
-#define INDIANBT_MUSIC_CLK (7680.0*2*2*2)
+#define INDIANBT_MUSIC_CLK (7680.0*2*2*2)
/* Nodes - Inputs */
-#define INDIANBT_MUSIC_DATA NODE_01
+#define INDIANBT_MUSIC_DATA NODE_01
/* Nodes - Sounds */
-#define INDIANBT_MUSIC NODE_11
+#define INDIANBT_MUSIC NODE_11
DISCRETE_SOUND_START(indianbt)
@@ -331,10 +331,10 @@ WRITE8_MEMBER(_8080bw_state::indianbt_sh_port_1_w)
/* bit 4 occurs every 5.25 seconds during gameplay */
UINT8 rising_bits = data & ~m_port_1_last_extra;
- if (rising_bits & 0x01) m_samples->start(1, 7); /* Death */
- if (rising_bits & 0x02) m_samples->start(0, 1); /* Shot Sound */
- if (rising_bits & 0x04) m_samples->start(2, 3); /* Move */
- if (rising_bits & 0x08) m_samples->start(3, 2); /* Hit */
+ if (rising_bits & 0x01) m_samples->start(1, 7); /* Death */
+ if (rising_bits & 0x02) m_samples->start(0, 1); /* Shot Sound */
+ if (rising_bits & 0x04) m_samples->start(2, 3); /* Move */
+ if (rising_bits & 0x08) m_samples->start(3, 2); /* Hit */
machine().sound().system_enable(data & 0x20);
@@ -347,10 +347,10 @@ WRITE8_MEMBER(_8080bw_state::indianbt_sh_port_2_w)
{
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (rising_bits & 0x01) m_samples->start(4, 0); /* Bird dropped an egg, Lasso used */
- if (rising_bits & 0x02) m_samples->start(4, 2); /* Egg hatches, egg shot */
- if (rising_bits & 0x08) m_samples->start(5, 0); /* Grabber, Lasso caught something */
- if (rising_bits & 0x10) m_samples->start(3, 7); /* Lasso sound */
+ if (rising_bits & 0x01) m_samples->start(4, 0); /* Bird dropped an egg, Lasso used */
+ if (rising_bits & 0x02) m_samples->start(4, 2); /* Egg hatches, egg shot */
+ if (rising_bits & 0x08) m_samples->start(5, 0); /* Grabber, Lasso caught something */
+ if (rising_bits & 0x10) m_samples->start(3, 7); /* Lasso sound */
m_flip_screen = BIT(data, 5) & ioport(CABINET_PORT_TAG)->read();
@@ -376,16 +376,16 @@ WRITE8_MEMBER(_8080bw_state::indianbt_sh_port_3_w)
static const discrete_lfsr_desc polaris_lfsr={
DISC_CLK_IS_FREQ,
- 17, /* Bit Length */
- 0, /* Reset Value */
- 4, /* Use Bit 4 as XOR input 0 */
- 16, /* Use Bit 16 as XOR input 1 */
- DISC_LFSR_XOR, /* Feedback stage1 is XOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is not inverted */
- 12 /* Output bit */
+ 17, /* Bit Length */
+ 0, /* Reset Value */
+ 4, /* Use Bit 4 as XOR input 0 */
+ 16, /* Use Bit 16 as XOR input 1 */
+ DISC_LFSR_XOR, /* Feedback stage1 is XOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is not inverted */
+ 12 /* Output bit */
};
static const discrete_dac_r1_ladder polaris_music_dac =
@@ -438,14 +438,14 @@ static const discrete_op_amp_osc_info polaris_plane_vco_info =
static const discrete_mixer_desc polaris_mixer_vr1_desc =
{DISC_MIXER_IS_RESISTOR,
{RES_K(66), RES_K(43), RES_K(20), RES_K(43)},
- {0}, // no variable resistors
+ {0}, // no variable resistors
{CAP_U(1), CAP_U(1), CAP_U(1), CAP_U(1)},
0, RES_K(50), 0, 0, 0, 1};
static const discrete_mixer_desc polaris_mixer_vr2_desc =
{DISC_MIXER_IS_RESISTOR,
{RES_K(66), RES_K(110)},
- {0}, // no variable resistors
+ {0}, // no variable resistors
{CAP_U(1), CAP_U(1)},
0, RES_K(50), 0, 0, 0, 1};
@@ -455,37 +455,37 @@ static const discrete_mixer_desc polaris_mixer_vr2_desc =
static const discrete_mixer_desc polaris_mixer_vr4_desc =
{DISC_MIXER_IS_RESISTOR,
{RES_K(22), RES_K(20), RES_K(22), RES_K(22)},
- {0}, // no variable resistors
+ {0}, // no variable resistors
{0, CAP_U(1), 0, 0},
0, RES_K(50), 0, CAP_U(1), 0, 40000};
/* Nodes - Inputs */
-#define POLARIS_MUSIC_DATA NODE_01
-#define POLARIS_SX0_EN NODE_02
-#define POLARIS_SX1_EN NODE_03
-#define POLARIS_SX2_EN NODE_04
-#define POLARIS_SX3_EN NODE_05
-#define POLARIS_SX5_EN NODE_06
-#define POLARIS_SX6_EN NODE_07
-#define POLARIS_SX7_EN NODE_08
-#define POLARIS_SX9_EN NODE_09
-#define POLARIS_SX10_EN NODE_10
+#define POLARIS_MUSIC_DATA NODE_01
+#define POLARIS_SX0_EN NODE_02
+#define POLARIS_SX1_EN NODE_03
+#define POLARIS_SX2_EN NODE_04
+#define POLARIS_SX3_EN NODE_05
+#define POLARIS_SX5_EN NODE_06
+#define POLARIS_SX6_EN NODE_07
+#define POLARIS_SX7_EN NODE_08
+#define POLARIS_SX9_EN NODE_09
+#define POLARIS_SX10_EN NODE_10
/* Nodes - Sounds */
-#define POLARIS_MUSIC NODE_11
-#define POLARIS_NOISE_LO NODE_12
-#define POLARIS_NOISE_LO_FILT NODE_13
-#define POLARIS_NOISE_HI_FILT NODE_14
-#define POLARIS_SHOTSND NODE_15
-#define POLARIS_SHIP_HITSND NODE_16
-#define POLARIS_SHIPSND NODE_17
-#define POLARIS_EXPLOSIONSND NODE_18
-#define POLARIS_PLANESND NODE_19
-#define POLARIS_HITSND NODE_20
-#define POLARIS_SONARSND NODE_21
+#define POLARIS_MUSIC NODE_11
+#define POLARIS_NOISE_LO NODE_12
+#define POLARIS_NOISE_LO_FILT NODE_13
+#define POLARIS_NOISE_HI_FILT NODE_14
+#define POLARIS_SHOTSND NODE_15
+#define POLARIS_SHIP_HITSND NODE_16
+#define POLARIS_SHIPSND NODE_17
+#define POLARIS_EXPLOSIONSND NODE_18
+#define POLARIS_PLANESND NODE_19
+#define POLARIS_HITSND NODE_20
+#define POLARIS_SONARSND NODE_21
/* Nodes - Adjust */
-#define POLARIS_ADJ_VR1 NODE_23
-#define POLARIS_ADJ_VR2 NODE_24
-#define POLARIS_ADJ_VR3 NODE_25
+#define POLARIS_ADJ_VR1 NODE_23
+#define POLARIS_ADJ_VR2 NODE_24
+#define POLARIS_ADJ_VR3 NODE_25
DISCRETE_SOUND_START(polaris)
@@ -554,10 +554,10 @@ DISCRETE_SOUND_START(polaris)
* makes a one shot pulse of approx. 15ms to keep the noise working.
*
******************************************************************************/
- DISCRETE_SQUAREWFIX(NODE_40, 1, 60.0/16, 1, 50, 1.0/2, 0) // IC 5L, pin 6
- DISCRETE_COUNTER(NODE_41, 1, 0, NODE_40, 0, 31, 1, 0, DISC_CLK_ON_F_EDGE) // IC 5L & 5F
- DISCRETE_TRANSFORM2(NODE_42, NODE_41, 4, "01&") // IC 5L, pin 9
- DISCRETE_TRANSFORM2(NODE_43, NODE_41, 16, "01&!") // IC 5F, pin 8
+ DISCRETE_SQUAREWFIX(NODE_40, 1, 60.0/16, 1, 50, 1.0/2, 0) // IC 5L, pin 6
+ DISCRETE_COUNTER(NODE_41, 1, 0, NODE_40, 0, 31, 1, 0, DISC_CLK_ON_F_EDGE) // IC 5L & 5F
+ DISCRETE_TRANSFORM2(NODE_42, NODE_41, 4, "01&") // IC 5L, pin 9
+ DISCRETE_TRANSFORM2(NODE_43, NODE_41, 16, "01&!") // IC 5F, pin 8
DISCRETE_ONESHOT(NODE_44, NODE_43, 1, 0.0015, DISC_ONESHOT_REDGE | DISC_ONESHOT_NORETRIG | DISC_OUT_ACTIVE_HIGH)
DISCRETE_LOGIC_OR(NODE_45, NODE_42, POLARIS_SX3_EN)
@@ -580,7 +580,7 @@ DISCRETE_SOUND_START(polaris)
// Filtered Lo noise. 7K pin 5.
DISCRETE_OP_AMP_FILTER(POLARIS_NOISE_LO_FILT, 1, POLARIS_NOISE_LO, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_0 | DISC_OP_AMP_IS_NORTON, &polaris_nol_op_amp_filt_info)
- DISCRETE_LFSR_NOISE(NODE_50, 1, 1, 23396, (12.0 - OP_AMP_NORTON_VBE), NODE_44, (12.0 - OP_AMP_NORTON_VBE)/2, &polaris_lfsr) // 7K pin 10
+ DISCRETE_LFSR_NOISE(NODE_50, 1, 1, 23396, (12.0 - OP_AMP_NORTON_VBE), NODE_44, (12.0 - OP_AMP_NORTON_VBE)/2, &polaris_lfsr) // 7K pin 10
// Filtered Hi noise. 6B pin 10. - This does not really do much. Sample rates of 98k+ are needed for this high of filtering.
DISCRETE_OP_AMP_FILTER(POLARIS_NOISE_HI_FILT, 1, NODE_50, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_0 | DISC_OP_AMP_IS_NORTON, &polaris_noh_op_amp_filt_info)
@@ -745,51 +745,51 @@ WRITE8_MEMBER(_8080bw_state::polaris_sh_port_3_w)
*
* for 4V, it's double at 2294.12Hz
*/
-#define SCHASER_HSYNC 18352.94
-#define SCHASER_4V SCHASER_HSYNC /2 /4
-#define SCHASER_8V SCHASER_HSYNC /2 /8
+#define SCHASER_HSYNC 18352.94
+#define SCHASER_4V SCHASER_HSYNC /2 /4
+#define SCHASER_8V SCHASER_HSYNC /2 /8
const sn76477_interface schaser_sn76477_interface =
{
- RES_K( 47), /* 4 noise_res */
- RES_K(330), /* 5 filter_res */
- CAP_P(470), /* 6 filter_cap */
- RES_M(2.2), /* 7 decay_res */
- CAP_U(1.0), /* 8 attack_decay_cap */
- RES_K(4.7), /* 10 attack_res */
- 0, /* 11 amplitude_res (variable) */
- RES_K(33), /* 12 feedback_res */
- 0, /* 16 vco_voltage */
- CAP_U(0.1), /* 17 vco_cap */
- RES_K(39), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K(120), /* 20 slf_res */
- CAP_U(1.0), /* 21 slf_cap */
- CAP_U(0.1), /* 23 oneshot_cap */
+ RES_K( 47), /* 4 noise_res */
+ RES_K(330), /* 5 filter_res */
+ CAP_P(470), /* 6 filter_cap */
+ RES_M(2.2), /* 7 decay_res */
+ CAP_U(1.0), /* 8 attack_decay_cap */
+ RES_K(4.7), /* 10 attack_res */
+ 0, /* 11 amplitude_res (variable) */
+ RES_K(33), /* 12 feedback_res */
+ 0, /* 16 vco_voltage */
+ CAP_U(0.1), /* 17 vco_cap */
+ RES_K(39), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K(120), /* 20 slf_res */
+ CAP_U(1.0), /* 21 slf_cap */
+ CAP_U(0.1), /* 23 oneshot_cap */
RES_K(220), /* 24 oneshot_res */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
};
/* Nodes - Inputs */
-#define SCHASER_DOT_EN NODE_01
-#define SCHASER_DOT_SEL NODE_02
-#define SCHASER_EXP_STREAM NODE_03
-#define SCHASER_MUSIC_BIT NODE_04
-#define SCHASER_SND_EN NODE_05
+#define SCHASER_DOT_EN NODE_01
+#define SCHASER_DOT_SEL NODE_02
+#define SCHASER_EXP_STREAM NODE_03
+#define SCHASER_MUSIC_BIT NODE_04
+#define SCHASER_SND_EN NODE_05
/* Nodes - Adjusters */
-#define SCHASER_VR1 NODE_07
-#define SCHASER_VR2 NODE_08
-#define SCHASER_VR3 NODE_09
+#define SCHASER_VR1 NODE_07
+#define SCHASER_VR2 NODE_08
+#define SCHASER_VR3 NODE_09
/* Nodes - Sounds */
-#define SCHASER_DOT_SND NODE_10
-#define SCHASER_EXP_SND NODE_11
-#define SCHASER_MUSIC_SND NODE_12
+#define SCHASER_DOT_SND NODE_10
+#define SCHASER_EXP_SND NODE_11
+#define SCHASER_MUSIC_SND NODE_12
DISCRETE_SOUND_START(schaser)
/************************************************/
@@ -860,24 +860,24 @@ WRITE8_MEMBER(_8080bw_state::schaser_sh_port_1_w)
int effect;
/* bit 0 - Dot Sound Enable (SX0)
- bit 1 - Dot Sound Pitch (SX1)
- bit 2 - Effect Sound A (SX2)
- bit 3 - Effect Sound B (SX3)
- bit 4 - Effect Sound C (SX4)
- bit 5 - Explosion (SX5)
+ bit 1 - Dot Sound Pitch (SX1)
+ bit 2 - Effect Sound A (SX2)
+ bit 3 - Effect Sound B (SX3)
+ bit 4 - Effect Sound C (SX4)
+ bit 5 - Explosion (SX5)
- Note that the schematic has SX2 and SX4 the wrong way around.
- See MT 2662 for video proof. */
+ Note that the schematic has SX2 and SX4 the wrong way around.
+ See MT 2662 for video proof. */
discrete_sound_w(m_discrete, space, SCHASER_DOT_EN, data & 0x01);
discrete_sound_w(m_discrete, space, SCHASER_DOT_SEL, data & 0x02);
/* The effect is a variable rate 555 timer. A diode/resistor array is used to
- * select the frequency. Because of the diode voltage drop, we can not use the
- * standard 555 time formulas. Also, when effect=0, the charge resistor
- * is disconnected. This causes the charge on the cap to slowly bleed off, but
- * but the bleed time is so long, that we can just cheat and put the time on hold
- * when effect = 0. */
+ * select the frequency. Because of the diode voltage drop, we can not use the
+ * standard 555 time formulas. Also, when effect=0, the charge resistor
+ * is disconnected. This causes the charge on the cap to slowly bleed off, but
+ * but the bleed time is so long, that we can just cheat and put the time on hold
+ * when effect = 0. */
effect = (data >> 2) & 0x07;
if (m_schaser_last_effect != effect)
{
@@ -925,11 +925,11 @@ WRITE8_MEMBER(_8080bw_state::schaser_sh_port_1_w)
WRITE8_MEMBER(_8080bw_state::schaser_sh_port_2_w)
{
/* bit 0 - Music (DAC) (SX6)
- bit 1 - Sound Enable (SX7)
- bit 2 - Coin Lockout (SX8)
- bit 3 - Field Control A (SX9)
- bit 4 - Field Control B (SX10)
- bit 5 - Flip Screen */
+ bit 1 - Sound Enable (SX7)
+ bit 2 - Coin Lockout (SX8)
+ bit 3 - Field Control A (SX9)
+ bit 4 - Field Control B (SX10)
+ bit 5 - Flip Screen */
discrete_sound_w(m_discrete, space, SCHASER_MUSIC_BIT, BIT(data, 0));
@@ -1018,16 +1018,16 @@ WRITE8_MEMBER(_8080bw_state::invrvnge_sh_port_1_w)
WRITE8_MEMBER(_8080bw_state::invrvnge_sh_port_2_w)
{
/*
- 00 - normal play
- 0A, 0E - alternate during play/attract at about once per second (invrvngegw only) purpose unknown
- 01 - briefly at boot time
- 10 - different colour map (or screen red) when you die
- 20 - flip screen */
+ 00 - normal play
+ 0A, 0E - alternate during play/attract at about once per second (invrvngegw only) purpose unknown
+ 01 - briefly at boot time
+ 10 - different colour map (or screen red) when you die
+ 20 - flip screen */
m_screen_red = BIT(data, 4);
m_flip_screen = BIT(data, 5) & ioport(CABINET_PORT_TAG)->read();
- // no sound-related writes?
+ // no sound-related writes?
}
@@ -1042,9 +1042,9 @@ WRITE8_MEMBER(_8080bw_state::rollingc_sh_port_w)
{
UINT8 rising_bits = data & ~m_port_3_last_extra;
- if (rising_bits & 0x02) m_samples->start(4, 0); /* Steering */
- if (rising_bits & 0x04) m_samples->start(0, 1); /* Collision */
- if (rising_bits & 0x10) m_samples->start(1, 8); /* Computer car is starting to move */
+ if (rising_bits & 0x02) m_samples->start(4, 0); /* Steering */
+ if (rising_bits & 0x04) m_samples->start(0, 1); /* Collision */
+ if (rising_bits & 0x10) m_samples->start(1, 8); /* Computer car is starting to move */
m_port_3_last_extra = data;
}
@@ -1058,48 +1058,48 @@ WRITE8_MEMBER(_8080bw_state::rollingc_sh_port_w)
const sn76477_interface lupin3_sn76477_interface =
{
- 0, /* 4 noise_res (N/C) */
- 0, /* 5 filter_res (N/C) */
- 0, /* 6 filter_cap (N/C) */
- 0, /* 7 decay_res (N/C) */
- 0, /* 8 attack_decay_cap (N/C) */
+ 0, /* 4 noise_res (N/C) */
+ 0, /* 5 filter_res (N/C) */
+ 0, /* 6 filter_cap (N/C) */
+ 0, /* 7 decay_res (N/C) */
+ 0, /* 8 attack_decay_cap (N/C) */
RES_K(100), /* 10 attack_res */
- RES_K(56), /* 11 amplitude_res */
- RES_K(10), /* 12 feedback_res */
- 0, /* 16 vco_voltage (N/C) */
- CAP_U(0.1), /* 17 vco_cap */
- RES_K(8.2), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K(120), /* 20 slf_res */
- CAP_U(1.0), /* 21 slf_cap */
- 0, /* 23 oneshot_cap (N/C) */
- 0, /* 24 oneshot_res (N/C) */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(56), /* 11 amplitude_res */
+ RES_K(10), /* 12 feedback_res */
+ 0, /* 16 vco_voltage (N/C) */
+ CAP_U(0.1), /* 17 vco_cap */
+ RES_K(8.2), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K(120), /* 20 slf_res */
+ CAP_U(1.0), /* 21 slf_cap */
+ 0, /* 23 oneshot_cap (N/C) */
+ 0, /* 24 oneshot_res (N/C) */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
};
static const char *const lupin3_sample_names[] =
{
"*lupin3",
- "cap", /* go to jail */
- "bark", /* dog barking */
- "walk1", /* walk, get money */
- "walk2", /* walk, get money */
- "warp", /* translocate, deposit money */
- "extend", /* bonus man */
- "kick", /* lands on top of building, wife kicks man */
+ "cap", /* go to jail */
+ "bark", /* dog barking */
+ "walk1", /* walk, get money */
+ "walk2", /* walk, get money */
+ "warp", /* translocate, deposit money */
+ "extend", /* bonus man */
+ "kick", /* lands on top of building, wife kicks man */
0
};
const samples_interface lupin3_samples_interface =
{
- 4, /* 4 channels */
+ 4, /* 4 channels */
lupin3_sample_names
};
@@ -1115,15 +1115,15 @@ WRITE8_MEMBER(_8080bw_state::lupin3_sh_port_1_w)
if (rising_bits & 0x01)
{
- m_samples->start(0, lupin3_step); /* Walking, steal money */
+ m_samples->start(0, lupin3_step); /* Walking, steal money */
lupin3_step ^= 1;
}
- sn76477_enable_w(m_sn, data & 0x02 ? 0:1); /* Helicopter */
+ sn76477_enable_w(m_sn, data & 0x02 ? 0:1); /* Helicopter */
- if (rising_bits & 0x04) m_samples->start(1, 4); /* Translocate */
- if (rising_bits & 0x08) m_samples->start(0, 0); /* Jail */
- if (rising_bits & 0x10) m_samples->start(2, 5); /* Bonus Man */
+ if (rising_bits & 0x04) m_samples->start(1, 4); /* Translocate */
+ if (rising_bits & 0x08) m_samples->start(0, 0); /* Jail */
+ if (rising_bits & 0x10) m_samples->start(2, 5); /* Bonus Man */
//machine().sound().system_enable(data & 0x20);
@@ -1136,7 +1136,7 @@ WRITE8_MEMBER(_8080bw_state::lupin3_sh_port_2_w)
{
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (rising_bits & 0x01) m_samples->start(0, 6); /* Lands on top of building, wife kicks man */
+ if (rising_bits & 0x01) m_samples->start(0, 6); /* Lands on top of building, wife kicks man */
//if (rising_bits & 0x02) m_samples->start(3, 7); /* deposit money, start intermission, end game */
//if (rising_bits & 0x04) m_samples->start(4, 7); /* deposit money, start intermission, Slides down rope */
//if (rising_bits & 0x08) m_samples->start(5, 7); /* start intermission, end game */
@@ -1159,20 +1159,20 @@ WRITE8_MEMBER(_8080bw_state::lupin3_sh_port_2_w)
WRITE8_MEMBER(_8080bw_state::schasercv_sh_port_1_w)
{
/* bit 2 = 2nd speedup
- bit 3 = 1st speedup
- Death is a stream of ff's with some fe's thrown in */
+ bit 3 = 1st speedup
+ Death is a stream of ff's with some fe's thrown in */
UINT8 rising_bits = data & ~m_port_1_last_extra;
- if (rising_bits & 0x02) m_samples->start(1, 6); /* Ran over a dot */
- if (rising_bits & 0x10) m_samples->start(0, 1); /* Death */
+ if (rising_bits & 0x02) m_samples->start(1, 6); /* Ran over a dot */
+ if (rising_bits & 0x10) m_samples->start(0, 1); /* Death */
m_port_1_last_extra = data;
}
WRITE8_MEMBER(_8080bw_state::schasercv_sh_port_2_w)
{
- speaker_level_w(m_speaker, (data & 0x01) ? 1 : 0); /* End-of-Level */
+ speaker_level_w(m_speaker, (data & 0x01) ? 1 : 0); /* End-of-Level */
machine().sound().system_enable(data & 0x10);
@@ -1190,11 +1190,11 @@ WRITE8_MEMBER(_8080bw_state::yosakdon_sh_port_1_w)
{
UINT8 rising_bits = data & ~m_port_1_last_extra;
- if (rising_bits & 0x01) m_samples->start(0, 3); /* Game Over */
- if (rising_bits & 0x02) m_samples->start(2, 0); /* Bird dead */
- if (rising_bits & 0x04) m_samples->start(0, 1); /* Rifle being fired */
- if (rising_bits & 0x08) m_samples->start(1, 2); /* Man dead */
- if (rising_bits & 0x10) m_samples->start(5, 8); /* Bonus Man? */
+ if (rising_bits & 0x01) m_samples->start(0, 3); /* Game Over */
+ if (rising_bits & 0x02) m_samples->start(2, 0); /* Bird dead */
+ if (rising_bits & 0x04) m_samples->start(0, 1); /* Rifle being fired */
+ if (rising_bits & 0x08) m_samples->start(1, 2); /* Man dead */
+ if (rising_bits & 0x10) m_samples->start(5, 8); /* Bonus Man? */
machine().sound().system_enable(data & 0x20);
@@ -1205,12 +1205,12 @@ WRITE8_MEMBER(_8080bw_state::yosakdon_sh_port_2_w)
{
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (rising_bits & 0x01) m_samples->start(1, 6); /* Ready? , Game Over */
- if (rising_bits & 0x04) m_samples->start(3, 7); /* Big bird dead */
+ if (rising_bits & 0x01) m_samples->start(1, 6); /* Ready? , Game Over */
+ if (rising_bits & 0x04) m_samples->start(3, 7); /* Big bird dead */
- sn76477_enable_w(m_sn, data & 0x08 ? 0:1); /* Big bird */
+ sn76477_enable_w(m_sn, data & 0x08 ? 0:1); /* Big bird */
- if (rising_bits & 0x10) m_samples->start(2, 7); /* Game Over */
+ if (rising_bits & 0x10) m_samples->start(2, 7); /* Game Over */
m_flip_screen = BIT(data, 5) & ioport(CABINET_PORT_TAG)->read();
@@ -1229,10 +1229,10 @@ WRITE8_MEMBER(_8080bw_state::shuttlei_sh_port_1_w)
/* bit 3 is high while you are alive and playing */
UINT8 rising_bits = data & ~m_port_1_last_extra;
- if (rising_bits & 0x01) m_samples->start(4, 4); /* Fleet move */
- if (rising_bits & 0x02) m_samples->start(5, 8); /* Extra Tank */
+ if (rising_bits & 0x01) m_samples->start(4, 4); /* Fleet move */
+ if (rising_bits & 0x02) m_samples->start(5, 8); /* Extra Tank */
- sn76477_enable_w(m_sn, data & 0x04 ? 0:1); /* UFO */
+ sn76477_enable_w(m_sn, data & 0x04 ? 0:1); /* UFO */
m_port_1_last_extra = data;
}
@@ -1242,19 +1242,19 @@ WRITE8_MEMBER(_8080bw_state::shuttlei_sh_port_2_w)
switch (data)
{
case 0x23:
- m_samples->start(2, 2); /* Hit */
+ m_samples->start(2, 2); /* Hit */
break;
case 0x2b:
- m_samples->start(0, 0); /* Shoot */
+ m_samples->start(0, 0); /* Shoot */
break;
case 0xa3:
- m_samples->start(3, 7); /* Hit UFO */
+ m_samples->start(3, 7); /* Hit UFO */
break;
case 0xab:
- m_samples->start(1, 1); /* Death */
+ m_samples->start(1, 1); /* Death */
break;
}
}
@@ -1276,18 +1276,18 @@ WRITE8_MEMBER( _8080bw_state::darthvdr_08_w )
machine().sound().system_enable(data & 0x01);
- if (rising_bits & 0x02) m_samples->start(0, 0); /* Shoot */
- if (rising_bits & 0x04) m_samples->start(3, 7); /* Hit UFO */
- if (rising_bits & 0x10) m_samples->start(5, 8); /* Bonus */
+ if (rising_bits & 0x02) m_samples->start(0, 0); /* Shoot */
+ if (rising_bits & 0x04) m_samples->start(3, 7); /* Hit UFO */
+ if (rising_bits & 0x10) m_samples->start(5, 8); /* Bonus */
- sn76477_enable_w(m_sn, data & 0x20 ? 0:1); /* UFO */
+ sn76477_enable_w(m_sn, data & 0x20 ? 0:1); /* UFO */
- if (rising_bits & 0x40) m_samples->start(1, 1); /* Death */
- if (rising_bits & 0x80) m_samples->start(2, 2); /* Hit */
+ if (rising_bits & 0x40) m_samples->start(1, 1); /* Death */
+ if (rising_bits & 0x80) m_samples->start(2, 2); /* Hit */
if (rising_bits & 0x08)
{
- m_samples->start(4, m_fleet_step); /* Fleet move in 4 steps */
+ m_samples->start(4, m_fleet_step); /* Fleet move in 4 steps */
m_fleet_step++;
if (m_fleet_step > 6) m_fleet_step = 3;
}
@@ -1313,12 +1313,12 @@ WRITE8_MEMBER( _8080bw_state::darthvdr_08_w )
static const discrete_dac_r1_ladder galactic_music_dac =
{3, {0, RES_K(47), RES_K(12)}, 0, 0, 0, CAP_U(0.1)};
-#define GALACTIC_MUSIC_CLK (150000)
+#define GALACTIC_MUSIC_CLK (150000)
/* Nodes - Inputs */
-#define GALACTIC_MUSIC_DATA NODE_01
+#define GALACTIC_MUSIC_DATA NODE_01
/* Nodes - Sounds */
-#define GALACTIC_MUSIC NODE_11
+#define GALACTIC_MUSIC NODE_11
DISCRETE_SOUND_START(galactic)
@@ -1356,8 +1356,8 @@ WRITE8_MEMBER(_8080bw_state::galactic_sh_port_1_w)
{
UINT8 rising_bits = data & ~m_port_1_last_extra;
- if (rising_bits & 0x02) m_samples->start(2, 2); /* Killed an enemy */
- if (rising_bits & 0x04) m_samples->start(1, 1); /* Lost a life */
+ if (rising_bits & 0x02) m_samples->start(2, 2); /* Killed an enemy */
+ if (rising_bits & 0x04) m_samples->start(1, 1); /* Lost a life */
m_port_1_last_extra = data;
}
@@ -1367,11 +1367,9 @@ WRITE8_MEMBER(_8080bw_state::galactic_sh_port_2_w)
{
UINT8 rising_bits = data & ~m_port_2_last_extra;
- if (rising_bits & 0x10) m_samples->start(0, 0); /* Shoot */
+ if (rising_bits & 0x10) m_samples->start(0, 0); /* Shoot */
m_flip_screen = BIT(data, 5) & ioport(CABINET_PORT_TAG)->read();
m_port_2_last_extra = data;
}
-
-
diff --git a/src/mame/audio/amiga.c b/src/mame/audio/amiga.c
index 5b9d4d069fb..bd86a110e7a 100644
--- a/src/mame/audio/amiga.c
+++ b/src/mame/audio/amiga.c
@@ -30,7 +30,7 @@
*
*************************************/
-#define CLOCK_DIVIDER 16
+#define CLOCK_DIVIDER 16
@@ -42,30 +42,30 @@
struct audio_channel
{
- emu_timer * irq_timer;
- UINT32 curlocation;
- UINT16 curlength;
- UINT16 curticks;
- UINT8 index;
- UINT8 dmaenabled;
- UINT8 manualmode;
- INT8 latched;
+ emu_timer * irq_timer;
+ UINT32 curlocation;
+ UINT16 curlength;
+ UINT16 curticks;
+ UINT8 index;
+ UINT8 dmaenabled;
+ UINT8 manualmode;
+ INT8 latched;
};
struct amiga_audio
{
- audio_channel channel[4];
- sound_stream * stream;
+ audio_channel channel[4];
+ sound_stream * stream;
};
INLINE amiga_audio *get_safe_token( device_t *device )
{
- assert(device != NULL);
- assert(device->type() == AMIGA);
+ assert(device != NULL);
+ assert(device->type() == AMIGA);
- return (amiga_audio *)downcast<amiga_sound_device *>(device)->token();
+ return (amiga_audio *)downcast<amiga_sound_device *>(device)->token();
}
/*************************************
@@ -280,7 +280,7 @@ const device_type AMIGA = &device_creator<amiga_sound_device>;
amiga_sound_device::amiga_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, AMIGA, "Amiga Paula", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(amiga_audio);
}
@@ -313,5 +313,3 @@ void amiga_sound_device::sound_stream_update(sound_stream &stream, stream_sample
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/asteroid.c b/src/mame/audio/asteroid.c
index 1f1c00f10ab..5c386521e05 100644
--- a/src/mame/audio/asteroid.c
+++ b/src/mame/audio/asteroid.c
@@ -16,57 +16,57 @@
static const discrete_lfsr_desc asteroid_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 6, /* Use Bit 6 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 16 /* Output bit is feedback bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 6, /* Use Bit 6 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 16 /* Output bit is feedback bit */
};
static const discrete_dac_r1_ladder asteroid_thump_dac1 =
{
- 4, // size of ladder
+ 4, // size of ladder
{RES_K(220), RES_K(100), RES_K(47), RES_K(22)}, //R44-R47
4.3, // 5v - diode junction
RES_K(6.8), // R49
- RES_K(47), // R44
- CAP_U(0.01) // C27
+ RES_K(47), // R44
+ CAP_U(0.01) // C27
};
static const discrete_555_cc_desc asteroid_thump_555cc =
{
DISC_555_OUT_SQW | DISC_555_OUT_AC | DISCRETE_555_CC_TO_CAP,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.8 // VBE 2N3906 (Si)
+ 0.8 // VBE 2N3906 (Si)
};
-#define ASTEROID_SAUCER_SND_EN NODE_01
-#define ASTEROID_SAUCER_FIRE_EN NODE_02
-#define ASTEROID_SAUCER_SEL NODE_03
-#define ASTEROID_THRUST_EN NODE_04
-#define ASTEROID_SHIP_FIRE_EN NODE_05
-#define ASTEROID_LIFE_EN NODE_06
-#define ASTEROID_NOISE_RESET NODE_07
-
-#define ASTEROID_THUMP_EN NODE_08
-#define ASTEROID_THUMP_DATA NODE_09
-#define ASTEROID_EXPLODE_DATA NODE_10
-#define ASTEROID_EXPLODE_PITCH NODE_11
-
-#define ASTEROID_NOISE NODE_20
-#define ASTEROID_THUMP_SND NODE_21
-#define ASTEROID_SAUCER_SND NODE_22
-#define ASTEROID_LIFE_SND NODE_23
-#define ASTEROID_SAUCER_FIRE_SND NODE_24
-#define ASTEROID_SHIP_FIRE_SND NODE_25
-#define ASTEROID_EXPLODE_SND NODE_26
-#define ASTEROID_THRUST_SND NODE_27
+#define ASTEROID_SAUCER_SND_EN NODE_01
+#define ASTEROID_SAUCER_FIRE_EN NODE_02
+#define ASTEROID_SAUCER_SEL NODE_03
+#define ASTEROID_THRUST_EN NODE_04
+#define ASTEROID_SHIP_FIRE_EN NODE_05
+#define ASTEROID_LIFE_EN NODE_06
+#define ASTEROID_NOISE_RESET NODE_07
+
+#define ASTEROID_THUMP_EN NODE_08
+#define ASTEROID_THUMP_DATA NODE_09
+#define ASTEROID_EXPLODE_DATA NODE_10
+#define ASTEROID_EXPLODE_PITCH NODE_11
+
+#define ASTEROID_NOISE NODE_20
+#define ASTEROID_THUMP_SND NODE_21
+#define ASTEROID_SAUCER_SND NODE_22
+#define ASTEROID_LIFE_SND NODE_23
+#define ASTEROID_SAUCER_FIRE_SND NODE_24
+#define ASTEROID_SHIP_FIRE_SND NODE_25
+#define ASTEROID_EXPLODE_SND NODE_26
+#define ASTEROID_THRUST_SND NODE_27
DISCRETE_SOUND_START(asteroid)
/************************************************/
@@ -128,10 +128,10 @@ DISCRETE_SOUND_START(asteroid)
/* adder constants in the 2 lines below */
/************************************************/
// SAUCER_SEL = 1 - larger saucer
- DISCRETE_MULTADD(NODE_40, ASTEROID_SAUCER_SEL, -2.5, 8.25) // Saucer Warble rate (5.75 or 8.25Hz)
- DISCRETE_TRIANGLEWAVE(NODE_41, 1, NODE_40, 920.0, 920.0/2, 0) // (amount of warble)
+ DISCRETE_MULTADD(NODE_40, ASTEROID_SAUCER_SEL, -2.5, 8.25) // Saucer Warble rate (5.75 or 8.25Hz)
+ DISCRETE_TRIANGLEWAVE(NODE_41, 1, NODE_40, 920.0, 920.0/2, 0) // (amount of warble)
- DISCRETE_TRANSFORM4(NODE_42, ASTEROID_SAUCER_SEL, -250, NODE_41, 750, "01*2+3+") // Large saucer is 250hz lower
+ DISCRETE_TRANSFORM4(NODE_42, ASTEROID_SAUCER_SEL, -250, NODE_41, 750, "01*2+3+") // Large saucer is 250hz lower
DISCRETE_TRIANGLEWAVE(NODE_43, ASTEROID_SAUCER_SND_EN, NODE_42, 76.1, 0, 0)
DISCRETE_RCFILTER(ASTEROID_SAUCER_SND, NODE_43, 1, 1.0e-5)
@@ -141,10 +141,10 @@ DISCRETE_SOUND_START(asteroid)
/* based VCO where the frequency rapidly decays */
/* with time. */
/************************************************/
- DISCRETE_RAMP(NODE_50, ASTEROID_SHIP_FIRE_EN, ASTEROID_SHIP_FIRE_EN, (820.0-110.0)/0.28, 820.0, 110.0, 0) /* Decay - Freq */
- DISCRETE_RCDISC(NODE_51, ASTEROID_SHIP_FIRE_EN, 53.0-7.0, 2700.0*3, 1e-5) /* Decay - Amplitude */
- DISCRETE_ADDER2(NODE_52, 1, NODE_51, 7.0) /* Amplitude */
- DISCRETE_TRANSFORM3(NODE_53, 4500, NODE_50, 67, "01/2+") /* Duty */
+ DISCRETE_RAMP(NODE_50, ASTEROID_SHIP_FIRE_EN, ASTEROID_SHIP_FIRE_EN, (820.0-110.0)/0.28, 820.0, 110.0, 0) /* Decay - Freq */
+ DISCRETE_RCDISC(NODE_51, ASTEROID_SHIP_FIRE_EN, 53.0-7.0, 2700.0*3, 1e-5) /* Decay - Amplitude */
+ DISCRETE_ADDER2(NODE_52, 1, NODE_51, 7.0) /* Amplitude */
+ DISCRETE_TRANSFORM3(NODE_53, 4500, NODE_50, 67, "01/2+") /* Duty */
DISCRETE_SQUAREWAVE(NODE_54, ASTEROID_SHIP_FIRE_EN, NODE_50, NODE_52, NODE_53, 0, 0)
DISCRETE_RCFILTER(ASTEROID_SHIP_FIRE_SND, NODE_54, 1, 1.0e-5)
@@ -153,10 +153,10 @@ DISCRETE_SOUND_START(asteroid)
/* based VCO where the frequency rapidly decays */
/* with time. */
/************************************************/
- DISCRETE_RAMP(NODE_60, ASTEROID_SAUCER_FIRE_EN, ASTEROID_SAUCER_FIRE_EN, (830.0-630.0)/0.28, 830.0, 630.0, 0) /* Decay - Freq */
- DISCRETE_RCDISC(NODE_61, ASTEROID_SAUCER_FIRE_EN, 49.5-7.0, 10000.0*3, 1e-5) /* Decay - Amplitude */
- DISCRETE_ADDER2(NODE_62, 1, NODE_61, 7.0) /* Amplitude */
- DISCRETE_TRANSFORM3(NODE_63, 4500, NODE_60, 67, "01/2+") /* Duty */
+ DISCRETE_RAMP(NODE_60, ASTEROID_SAUCER_FIRE_EN, ASTEROID_SAUCER_FIRE_EN, (830.0-630.0)/0.28, 830.0, 630.0, 0) /* Decay - Freq */
+ DISCRETE_RCDISC(NODE_61, ASTEROID_SAUCER_FIRE_EN, 49.5-7.0, 10000.0*3, 1e-5) /* Decay - Amplitude */
+ DISCRETE_ADDER2(NODE_62, 1, NODE_61, 7.0) /* Amplitude */
+ DISCRETE_TRANSFORM3(NODE_63, 4500, NODE_60, 67, "01/2+") /* Duty */
DISCRETE_SQUAREWAVE(NODE_64, ASTEROID_SAUCER_FIRE_EN, NODE_60, NODE_62, NODE_63, 0, 0)
DISCRETE_RCFILTER(ASTEROID_SAUCER_FIRE_SND, NODE_64, 2, 1.0e-5)
@@ -190,9 +190,9 @@ DISCRETE_SOUND_START(asteroid)
/* the rising edge. So we won't add the extra */
/* nodes. */
/************************************************/
- DISCRETE_DIVIDE(NODE_80, 1, 12000, ASTEROID_EXPLODE_PITCH) /* Frequency */
- DISCRETE_DIVIDE(NODE_81, 1, 100, ASTEROID_EXPLODE_PITCH) /* Duty */
- DISCRETE_SQUAREWFIX(NODE_82, 1, NODE_80, 1.0, NODE_81, 1.0/2, 0) /* Pitch clock */
+ DISCRETE_DIVIDE(NODE_80, 1, 12000, ASTEROID_EXPLODE_PITCH) /* Frequency */
+ DISCRETE_DIVIDE(NODE_81, 1, 100, ASTEROID_EXPLODE_PITCH) /* Duty */
+ DISCRETE_SQUAREWFIX(NODE_82, 1, NODE_80, 1.0, NODE_81, 1.0/2, 0) /* Pitch clock */
DISCRETE_SAMPLHOLD(NODE_83, ASTEROID_NOISE, NODE_82, DISC_SAMPHOLD_REDGE)
DISCRETE_MULTIPLY(NODE_84, NODE_83, ASTEROID_EXPLODE_DATA)
DISCRETE_RCFILTER(ASTEROID_EXPLODE_SND, NODE_84, 3042, 1e-6)
@@ -210,7 +210,7 @@ DISCRETE_SOUND_START(asteroid)
DISCRETE_ADDER4(NODE_90, 1, ASTEROID_THUMP_SND, ASTEROID_SAUCER_SND, ASTEROID_SHIP_FIRE_SND, ASTEROID_SAUCER_FIRE_SND)
DISCRETE_ADDER4(NODE_91, 1, ASTEROID_THRUST_SND, ASTEROID_EXPLODE_SND, ASTEROID_LIFE_SND, NODE_90)
- DISCRETE_OUTPUT(NODE_91, 65534.0 / (131.6+76.1+49.5+53.0+1000.0+600.0)) // Take the output from the mixer
+ DISCRETE_OUTPUT(NODE_91, 65534.0 / (131.6+76.1+49.5+53.0+1000.0+600.0)) // Take the output from the mixer
DISCRETE_SOUND_END
@@ -261,9 +261,9 @@ DISCRETE_SOUND_START(astdelux)
/* the rising edge. So we won't add the extra */
/* nodes. */
/************************************************/
- DISCRETE_DIVIDE(NODE_80, 1, 12000, ASTEROID_EXPLODE_PITCH) /* Frequency */
- DISCRETE_DIVIDE(NODE_81, 1, 100, ASTEROID_EXPLODE_PITCH) /* Duty */
- DISCRETE_SQUAREWFIX(NODE_82, 1, NODE_80, 1.0, NODE_81, 1.0/2, 0) /* Pitch clock */
+ DISCRETE_DIVIDE(NODE_80, 1, 12000, ASTEROID_EXPLODE_PITCH) /* Frequency */
+ DISCRETE_DIVIDE(NODE_81, 1, 100, ASTEROID_EXPLODE_PITCH) /* Duty */
+ DISCRETE_SQUAREWFIX(NODE_82, 1, NODE_80, 1.0, NODE_81, 1.0/2, 0) /* Pitch clock */
DISCRETE_SAMPLHOLD(NODE_83, ASTEROID_NOISE, NODE_82, DISC_SAMPHOLD_REDGE)
DISCRETE_MULTIPLY(NODE_84, NODE_83, ASTEROID_EXPLODE_DATA)
DISCRETE_RCFILTER(ASTEROID_EXPLODE_SND, NODE_84, 3042, 1e-6)
@@ -274,13 +274,13 @@ DISCRETE_SOUND_START(astdelux)
/************************************************/
DISCRETE_ADDER2(NODE_90, 1, ASTEROID_THRUST_SND, ASTEROID_EXPLODE_SND)
- DISCRETE_OUTPUT(NODE_90, 65534.0/(1000+600)) // Take the output from the mixer
+ DISCRETE_OUTPUT(NODE_90, 65534.0/(1000+600)) // Take the output from the mixer
DISCRETE_SOUND_END
WRITE8_MEMBER(asteroid_state::asteroid_explode_w)
{
- discrete_sound_w(m_discrete,space,ASTEROID_EXPLODE_DATA,(data&0x3c)>>2); // Volume
+ discrete_sound_w(m_discrete,space,ASTEROID_EXPLODE_DATA,(data&0x3c)>>2); // Volume
/* We will modify the pitch data to send the divider value. */
switch ((data&0xc0))
{
diff --git a/src/mame/audio/astrof.c b/src/mame/audio/astrof.c
index 447e13a2df5..e00d242463d 100644
--- a/src/mame/audio/astrof.c
+++ b/src/mame/audio/astrof.c
@@ -16,20 +16,20 @@
*
*************************************/
-#define SAMPLE_FIRE 0
-#define SAMPLE_EKILLED 1
-#define SAMPLE_WAVE 2
+#define SAMPLE_FIRE 0
+#define SAMPLE_EKILLED 1
+#define SAMPLE_WAVE 2
#define SAMPLE_BOSSFIRE 6
-#define SAMPLE_FUEL 7
-#define SAMPLE_DEATH 8
-#define SAMPLE_BOSSHIT 9
+#define SAMPLE_FUEL 7
+#define SAMPLE_DEATH 8
+#define SAMPLE_BOSSHIT 9
#define SAMPLE_BOSSKILL 10
-#define CHANNEL_FIRE 0
+#define CHANNEL_FIRE 0
#define CHANNEL_EXPLOSION 1
#define CHANNEL_WAVE 2 /* background humm */
-#define CHANNEL_BOSSFIRE 2 /* there is no background humm on the boss level */
-#define CHANNEL_FUEL 3
+#define CHANNEL_BOSSFIRE 2 /* there is no background humm on the boss level */
+#define CHANNEL_FUEL 3
WRITE8_MEMBER(astrof_state::astrof_audio_1_w)
@@ -46,7 +46,7 @@ WRITE8_MEMBER(astrof_state::astrof_audio_1_w)
if (rising_bits & 0x04)
{
/* I *know* that the effect select port will be written shortly
- after this one, so this works */
+ after this one, so this works */
m_astrof_start_explosion = 1;
}
@@ -85,8 +85,8 @@ WRITE8_MEMBER(astrof_state::astrof_audio_2_w)
if (m_astrof_start_explosion)
{
/* this is really a compound effect, made up of I believe 3 sound
- effects, but since our sample contains them all, disable playing
- the other effects while the explosion is playing */
+ effects, but since our sample contains them all, disable playing
+ the other effects while the explosion is playing */
logerror("Explosion: %x\n", data);
if (data & 0x04)
@@ -141,7 +141,7 @@ static const char *const astrof_sample_names[] =
static const samples_interface astrof_samples_interface =
{
- 4, /* 4 channels */
+ 4, /* 4 channels */
astrof_sample_names
};
@@ -204,29 +204,29 @@ WRITE8_MEMBER(astrof_state::tomahawk_audio_w)
static const sn76477_interface tomahawk_sn76477_interface =
{
- 0, /* 4 noise_res (N/C) */
- 0, /* 5 filter_res (N/C) */
- 0, /* 6 filter_cap (N/C) */
- 0, /* 7 decay_res (N/C) */
- 0, /* 8 attack_decay_cap (N/C) */
- 0, /* 10 attack_res (N/C) */
- RES_K(47), /* 11 amplitude_res */
- RES_K(47), /* 12 feedback_res */
- 0, /* 16 vco_voltage (N/C) */
- CAP_U(0.033), /* 17 vco_cap */
- RES_K(33), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K(47), /* 20 slf_res */
- CAP_U(2.2), /* 21 slf_cap */
- 0, /* 23 oneshot_cap (N/C) */
- 0, /* 24 oneshot_res (N/C) */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 0, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ 0, /* 4 noise_res (N/C) */
+ 0, /* 5 filter_res (N/C) */
+ 0, /* 6 filter_cap (N/C) */
+ 0, /* 7 decay_res (N/C) */
+ 0, /* 8 attack_decay_cap (N/C) */
+ 0, /* 10 attack_res (N/C) */
+ RES_K(47), /* 11 amplitude_res */
+ RES_K(47), /* 12 feedback_res */
+ 0, /* 16 vco_voltage (N/C) */
+ CAP_U(0.033), /* 17 vco_cap */
+ RES_K(33), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K(47), /* 20 slf_res */
+ CAP_U(2.2), /* 21 slf_cap */
+ 0, /* 23 oneshot_cap (N/C) */
+ 0, /* 24 oneshot_res (N/C) */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 0, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
};
diff --git a/src/mame/audio/atarifb.c b/src/mame/audio/atarifb.c
index 05c508a8509..bafc66ad786 100644
--- a/src/mame/audio/atarifb.c
+++ b/src/mame/audio/atarifb.c
@@ -18,41 +18,41 @@
static const discrete_555_desc atarifbWhistl555 =
{
DISC_555_OUT_CAP | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_lfsr_desc atarifb_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 16 /* Output bit is feedback bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 16 /* Output bit is feedback bit */
};
static const discrete_dac_r1_ladder atarifb_crowd_r1_ladder =
{
4,
- {RES_K(390), RES_K(220), RES_K(100), RES_K(56)}, // r17, r16, r14, r15
- 0, 0, // no bias
- 0, // no rGnd
- CAP_U(0.1) // c32
+ {RES_K(390), RES_K(220), RES_K(100), RES_K(56)}, // r17, r16, r14, r15
+ 0, 0, // no bias
+ 0, // no rGnd
+ CAP_U(0.1) // c32
};
static const discrete_op_amp_filt_info atarifb_crowd_filt =
{
- 1.0/(1.0/RES_K(390) + 1.0/RES_K(220) + 1.0/RES_K(100) + 1.0/RES_K(56)), // r17, r16, r14, r15
+ 1.0/(1.0/RES_K(390) + 1.0/RES_K(220) + 1.0/RES_K(100) + 1.0/RES_K(56)), // r17, r16, r14, r15
0, 0, 0,
- RES_K(330), // r35
- CAP_U(.01), // c33
- CAP_U(.01), // c44
+ RES_K(330), // r35
+ CAP_U(.01), // c33
+ CAP_U(.01), // c44
0,
5, 12, 0
};
@@ -60,22 +60,22 @@ static const discrete_op_amp_filt_info atarifb_crowd_filt =
static const discrete_mixer_desc atarifb_mixer =
{
DISC_MIXER_IS_OP_AMP,
- {RES_K(47), RES_K(47), RES_K(220)}, // r71, r70, r73
- {0}, // no rNodes
- {CAP_U(.01), CAP_U(.01), CAP_U(.01)}, // c53, c52, c51
+ {RES_K(47), RES_K(47), RES_K(220)}, // r71, r70, r73
+ {0}, // no rNodes
+ {CAP_U(.01), CAP_U(.01), CAP_U(.01)}, // c53, c52, c51
0,
- RES_K(47), // r74
- CAP_U(.001), // c54
- CAP_U(0.1), // c57
+ RES_K(47), // r74
+ CAP_U(.001), // c54
+ CAP_U(0.1), // c57
5,
40000
};
/* Nodes - Sounds */
-#define ATARIFB_NOISE NODE_10
-#define ATARIFB_HIT_SND ATARIFB_HIT_EN
-#define ATARIFB_WHISTLE_SND NODE_12
-#define ATARIFB_CROWD_SND NODE_13
+#define ATARIFB_NOISE NODE_10
+#define ATARIFB_HIT_SND ATARIFB_HIT_EN
+#define ATARIFB_WHISTLE_SND NODE_12
+#define ATARIFB_CROWD_SND NODE_13
DISCRETE_SOUND_START(atarifb)
/************************************************/
@@ -95,7 +95,7 @@ DISCRETE_SOUND_START(atarifb)
/* LFSR clk = 256H = 15750.0Hz */
/************************************************/
DISCRETE_LFSR_NOISE(NODE_20, ATARIFB_NOISE_EN, ATARIFB_NOISE_EN, 15750.0, 1, 0, .5, &atarifb_lfsr)
- DISCRETE_SWITCH(NODE_21, 1, NODE_20, 0, ATARIFB_CROWD_DATA) // enable data, gate D8
+ DISCRETE_SWITCH(NODE_21, 1, NODE_20, 0, ATARIFB_CROWD_DATA) // enable data, gate D8
DISCRETE_DAC_R1(NODE_22, NODE_21, DEFAULT_TTL_V_LOGIC_1, &atarifb_crowd_r1_ladder)
DISCRETE_OP_AMP_FILTER(ATARIFB_CROWD_SND, 1, NODE_22, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &atarifb_crowd_filt)
@@ -106,9 +106,9 @@ DISCRETE_SOUND_START(atarifb)
/* -0.5V */
/************************************************/
DISCRETE_555_ASTABLE(NODE_30, ATARIFB_WHISTLE_EN,
- RES_K(2.2), RES_K(2.2), CAP_U(0.1), // r34, r33, c44
+ RES_K(2.2), RES_K(2.2), CAP_U(0.1), // r34, r33, c44
&atarifbWhistl555)
- DISCRETE_TRANSFORM3(ATARIFB_WHISTLE_SND, NODE_30, .5, 0, "01-P2>*") // Q10 drop
+ DISCRETE_TRANSFORM3(ATARIFB_WHISTLE_SND, NODE_30, .5, 0, "01-P2>*") // Q10 drop
/************************************************/
/* Mixing stage - A9 */
@@ -130,19 +130,19 @@ DISCRETE_SOUND_END
static const discrete_dac_r1_ladder abaseb_crowd_r1_ladder =
{
4,
- {RES_K(390), RES_K(220), RES_K(100), RES_K(56)}, // r17, r16, r14, r15
- 0, 0, // no bias
- RES_K(1), // r76
- 0 // no filter
+ {RES_K(390), RES_K(220), RES_K(100), RES_K(56)}, // r17, r16, r14, r15
+ 0, 0, // no bias
+ RES_K(1), // r76
+ 0 // no filter
};
static const discrete_op_amp_filt_info abaseb_crowd_filt =
{
- 1.0/(1.0/RES_K(390) + 1.0/RES_K(220) + 1.0/RES_K(100) + 1.0/RES_K(56) + 1.0/RES_K(1)), // r17, r16, r14, r15, r76
+ 1.0/(1.0/RES_K(390) + 1.0/RES_K(220) + 1.0/RES_K(100) + 1.0/RES_K(56) + 1.0/RES_K(1)), // r17, r16, r14, r15, r76
0, 0, 0,
- RES_K(470), // r35
- CAP_U(.01), // c33
- CAP_U(.022), // c44
+ RES_K(470), // r35
+ CAP_U(.01), // c33
+ CAP_U(.022), // c44
0,
5, 12, 0
};
@@ -150,22 +150,22 @@ static const discrete_op_amp_filt_info abaseb_crowd_filt =
static const discrete_mixer_desc abaseb_mixer =
{
DISC_MIXER_IS_OP_AMP,
- {RES_K(330), RES_K(220), RES_K(220)}, // r71, r70, r73
- {0}, // no rNodes
- {CAP_U(.01), CAP_U(.01), CAP_U(.01)}, // c53, c52, c51
+ {RES_K(330), RES_K(220), RES_K(220)}, // r71, r70, r73
+ {0}, // no rNodes
+ {CAP_U(.01), CAP_U(.01), CAP_U(.01)}, // c53, c52, c51
0,
- RES_K(47), // r74
- CAP_U(.001), // c54
- CAP_U(10), // c69
+ RES_K(47), // r74
+ CAP_U(.001), // c54
+ CAP_U(10), // c69
5,
25000
};
/* Nodes - Sounds */
-#define ABASEB_NOISE NODE_10
-#define ABASEB_HIT_SND ATARIFB_HIT_EN
-#define ABASEB_WHISTLE_SND NODE_12
-#define ABASEB_CROWD_SND NODE_13
+#define ABASEB_NOISE NODE_10
+#define ABASEB_HIT_SND ATARIFB_HIT_EN
+#define ABASEB_WHISTLE_SND NODE_12
+#define ABASEB_CROWD_SND NODE_13
DISCRETE_SOUND_START(abaseb)
/************************************************/
@@ -185,7 +185,7 @@ DISCRETE_SOUND_START(abaseb)
/* LFSR clk = 256H = 15750.0Hz */
/************************************************/
DISCRETE_LFSR_NOISE(NODE_20, ATARIFB_NOISE_EN, ATARIFB_NOISE_EN, 15750.0, 1, 0, .5, &atarifb_lfsr)
- DISCRETE_SWITCH(NODE_21, 1, NODE_20, 0, ATARIFB_CROWD_DATA) // enable data, gate D8
+ DISCRETE_SWITCH(NODE_21, 1, NODE_20, 0, ATARIFB_CROWD_DATA) // enable data, gate D8
DISCRETE_DAC_R1(NODE_22, NODE_21, DEFAULT_TTL_V_LOGIC_1, &abaseb_crowd_r1_ladder)
DISCRETE_OP_AMP_FILTER(ABASEB_CROWD_SND, 1, NODE_22, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &abaseb_crowd_filt)
@@ -196,9 +196,9 @@ DISCRETE_SOUND_START(abaseb)
/* -0.5V */
/************************************************/
DISCRETE_555_ASTABLE(NODE_30, ATARIFB_WHISTLE_EN,
- RES_K(2.2), RES_K(2.2), CAP_U(0.1), // r34, r33, c44
+ RES_K(2.2), RES_K(2.2), CAP_U(0.1), // r34, r33, c44
&atarifbWhistl555)
- DISCRETE_TRANSFORM3(ABASEB_WHISTLE_SND, NODE_30, .5, 0, "01-P2>*") // Q10 drop
+ DISCRETE_TRANSFORM3(ABASEB_WHISTLE_SND, NODE_30, .5, 0, "01-P2>*") // Q10 drop
/************************************************/
/* Mixing stage - A9 */
diff --git a/src/mame/audio/atarijsa.c b/src/mame/audio/atarijsa.c
index 646a9cdc794..9c3b7a8e52c 100644
--- a/src/mame/audio/atarijsa.c
+++ b/src/mame/audio/atarijsa.c
@@ -47,7 +47,7 @@ ALL: the LPF (low pass filter) bit which selectively places a lowpass filter in
#include "audio/atarijsa.h"
-#define JSA_MASTER_CLOCK XTAL_3_579545MHz
+#define JSA_MASTER_CLOCK XTAL_3_579545MHz
static UINT8 *bank_base;
@@ -208,25 +208,25 @@ static READ8_HANDLER( jsa1_io_r )
switch (offset & 0x206)
{
- case 0x000: /* n/c */
+ case 0x000: /* n/c */
logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
break;
- case 0x002: /* /RDP */
+ case 0x002: /* /RDP */
result = atarigen->m6502_sound_r(space, offset);
break;
- case 0x004: /* /RDIO */
+ case 0x004: /* /RDIO */
/*
- 0x80 = self test
- 0x40 = NMI line state (active low)
- 0x20 = sound output full
- 0x10 = TMS5220 ready (active low)
- 0x08 = +5V
- 0x04 = +5V
- 0x02 = coin 2
- 0x01 = coin 1
- */
+ 0x80 = self test
+ 0x40 = NMI line state (active low)
+ 0x20 = sound output full
+ 0x10 = TMS5220 ready (active low)
+ 0x08 = +5V
+ 0x04 = +5V
+ 0x02 = coin 2
+ 0x01 = coin 1
+ */
result = space.machine().root_device().ioport("JSAI")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
@@ -237,14 +237,14 @@ static READ8_HANDLER( jsa1_io_r )
result &= ~0x10;
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
atarigen->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /VOICE */
- case 0x202: /* /WRP */
- case 0x204: /* /WRIO */
- case 0x206: /* /MIX */
+ case 0x200: /* /VOICE */
+ case 0x202: /* /WRP */
+ case 0x204: /* /WRIO */
+ case 0x206: /* /MIX */
logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
break;
}
@@ -257,35 +257,35 @@ static WRITE8_HANDLER( jsa1_io_w )
{
switch (offset & 0x206)
{
- case 0x000: /* n/c */
- case 0x002: /* /RDP */
- case 0x004: /* /RDIO */
+ case 0x000: /* n/c */
+ case 0x002: /* /RDP */
+ case 0x004: /* /RDIO */
logerror("atarijsa: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
space.machine().driver_data<atarigen_state>()->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /VOICE */
+ case 0x200: /* /VOICE */
if (tms5220 != NULL)
tms5220_data_w(tms5220, space, 0, data);
break;
- case 0x202: /* /WRP */
+ case 0x202: /* /WRP */
space.machine().driver_data<atarigen_state>()->m6502_sound_w(space, offset, data);
break;
- case 0x204: /* WRIO */
+ case 0x204: /* WRIO */
/*
- 0xc0 = bank address
- 0x20 = coin counter 2
- 0x10 = coin counter 1
- 0x08 = squeak (tweaks the 5220 frequency)
- 0x04 = TMS5220 reset (actually the read strobe) (active low)
- 0x02 = TMS5220 write strobe (active low)
- 0x01 = YM2151 reset (active low)
- */
+ 0xc0 = bank address
+ 0x20 = coin counter 2
+ 0x10 = coin counter 1
+ 0x08 = squeak (tweaks the 5220 frequency)
+ 0x04 = TMS5220 reset (actually the read strobe) (active low)
+ 0x02 = TMS5220 write strobe (active low)
+ 0x01 = YM2151 reset (active low)
+ */
/* handle TMS5220 I/O */
if (tms5220 != NULL)
@@ -308,13 +308,13 @@ static WRITE8_HANDLER( jsa1_io_w )
memcpy(bank_base, &bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
break;
- case 0x206: /* MIX */
+ case 0x206: /* MIX */
/*
- 0xc0 = TMS5220 volume (0-3)
- 0x30 = POKEY volume (0-3)
- 0x0e = YM2151 volume (0-7)
- 0x01 = low-pass filter enable
- */
+ 0xc0 = TMS5220 volume (0-3)
+ 0x30 = POKEY volume (0-3)
+ 0x0e = YM2151 volume (0-7)
+ 0x01 = low-pass filter enable
+ */
tms5220_volume = ((data >> 6) & 3) * 100 / 3;
pokey_volume = ((data >> 4) & 3) * 100 / 3;
ym2151_volume = ((data >> 1) & 7) * 100 / 7;
@@ -338,42 +338,42 @@ static READ8_HANDLER( jsa2_io_r )
switch (offset & 0x206)
{
- case 0x000: /* /RDV */
+ case 0x000: /* /RDV */
if (oki6295 != NULL)
result = oki6295->read(space, offset);
else
logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
break;
- case 0x002: /* /RDP */
+ case 0x002: /* /RDP */
result = atarigen->m6502_sound_r(space, offset);
break;
- case 0x004: /* /RDIO */
+ case 0x004: /* /RDIO */
/*
- 0x80 = self test
- 0x40 = NMI line state (active low)
- 0x20 = sound output full
- 0x10 = +5V
- 0x08 = +5V
- 0x04 = +5V
- 0x02 = coin 2
- 0x01 = coin 1
- */
+ 0x80 = self test
+ 0x40 = NMI line state (active low)
+ 0x20 = sound output full
+ 0x10 = +5V
+ 0x08 = +5V
+ 0x04 = +5V
+ 0x02 = coin 2
+ 0x01 = coin 1
+ */
result = space.machine().root_device().ioport("JSAII")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x80;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
atarigen->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /WRV */
- case 0x202: /* /WRP */
- case 0x204: /* /WRIO */
- case 0x206: /* /MIX */
+ case 0x200: /* /WRV */
+ case 0x202: /* /WRP */
+ case 0x204: /* /WRIO */
+ case 0x206: /* /MIX */
logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
break;
}
@@ -386,37 +386,37 @@ static WRITE8_HANDLER( jsa2_io_w )
{
switch (offset & 0x206)
{
- case 0x000: /* /RDV */
- case 0x002: /* /RDP */
- case 0x004: /* /RDIO */
+ case 0x000: /* /RDV */
+ case 0x002: /* /RDP */
+ case 0x004: /* /RDIO */
logerror("atarijsa: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
space.machine().driver_data<atarigen_state>()->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /WRV */
+ case 0x200: /* /WRV */
if (oki6295 != NULL)
oki6295->write(space, offset, data);
else
logerror("atarijsa: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
break;
- case 0x202: /* /WRP */
+ case 0x202: /* /WRP */
space.machine().driver_data<atarigen_state>()->m6502_sound_w(space, offset, data);
break;
- case 0x204: /* /WRIO */
+ case 0x204: /* /WRIO */
/*
- 0xc0 = bank address
- 0x20 = coin counter 2
- 0x10 = coin counter 1
- 0x08 = voice frequency (tweaks the OKI6295 frequency)
- 0x04 = OKI6295 reset (active low)
- 0x02 = n/c
- 0x01 = YM2151 reset (active low)
- */
+ 0xc0 = bank address
+ 0x20 = coin counter 2
+ 0x10 = coin counter 1
+ 0x08 = voice frequency (tweaks the OKI6295 frequency)
+ 0x04 = OKI6295 reset (active low)
+ 0x02 = n/c
+ 0x01 = YM2151 reset (active low)
+ */
/* reset the YM2151 if needed */
if ((data&1) == 0) space.machine().device("ymsnd")->reset();
@@ -433,14 +433,14 @@ static WRITE8_HANDLER( jsa2_io_w )
oki6295->set_pin7(data & 8);
break;
- case 0x206: /* /MIX */
+ case 0x206: /* /MIX */
/*
- 0xc0 = n/c
- 0x20 = low-pass filter enable
- 0x10 = n/c
- 0x0e = YM2151 volume (0-7)
- 0x01 = OKI6295 volume (0-1)
- */
+ 0xc0 = n/c
+ 0x20 = low-pass filter enable
+ 0x10 = n/c
+ 0x0e = YM2151 volume (0-7)
+ 0x01 = OKI6295 volume (0-1)
+ */
ym2151_volume = ((data >> 1) & 7) * 100 / 7;
oki6295_volume = 50 + (data & 1) * 50;
update_all_volumes(space.machine());
@@ -463,40 +463,40 @@ static READ8_HANDLER( jsa3_io_r )
switch (offset & 0x206)
{
- case 0x000: /* /RDV */
+ case 0x000: /* /RDV */
if (oki6295 != NULL)
result = oki6295->read(space, offset);
break;
- case 0x002: /* /RDP */
+ case 0x002: /* /RDP */
result = atarigen->m6502_sound_r(space, offset);
break;
- case 0x004: /* /RDIO */
+ case 0x004: /* /RDIO */
/*
- 0x80 = self test (active high)
- 0x40 = NMI line state (active high)
- 0x20 = sound output full (active high)
- 0x10 = self test (active high)
- 0x08 = service (active high)
- 0x04 = tilt (active high)
- 0x02 = coin L (active high)
- 0x01 = coin R (active high)
- */
+ 0x80 = self test (active high)
+ 0x40 = NMI line state (active high)
+ 0x20 = sound output full (active high)
+ 0x10 = self test (active high)
+ 0x08 = service (active high)
+ 0x04 = tilt (active high)
+ 0x02 = coin L (active high)
+ 0x01 = coin R (active high)
+ */
result = space.machine().root_device().ioport("JSAIII")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
atarigen->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /WRV */
- case 0x202: /* /WRP */
- case 0x204: /* /WRIO */
- case 0x206: /* /MIX */
+ case 0x200: /* /WRV */
+ case 0x202: /* /WRP */
+ case 0x204: /* /WRIO */
+ case 0x206: /* /MIX */
logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
break;
}
@@ -509,39 +509,39 @@ static WRITE8_HANDLER( jsa3_io_w )
{
switch (offset & 0x206)
{
- case 0x000: /* /RDV */
+ case 0x000: /* /RDV */
overall_volume = data * 100 / 127;
update_all_volumes(space.machine());
break;
- case 0x002: /* /RDP */
- case 0x004: /* /RDIO */
+ case 0x002: /* /RDP */
+ case 0x004: /* /RDIO */
logerror("atarijsa: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
space.machine().driver_data<atarigen_state>()->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /WRV */
+ case 0x200: /* /WRV */
if (oki6295 != NULL)
oki6295->write(space, offset, data);
break;
- case 0x202: /* /WRP */
+ case 0x202: /* /WRP */
space.machine().driver_data<atarigen_state>()->m6502_sound_w(space, offset, data);
break;
- case 0x204: /* /WRIO */
+ case 0x204: /* /WRIO */
/*
- 0xc0 = bank address
- 0x20 = coin counter 2
- 0x10 = coin counter 1
- 0x08 = voice frequency (tweaks the OKI6295 frequency)
- 0x04 = OKI6295 reset (active low)
- 0x02 = OKI6295 bank bit 0
- 0x01 = YM2151 reset (active low)
- */
+ 0xc0 = bank address
+ 0x20 = coin counter 2
+ 0x10 = coin counter 1
+ 0x08 = voice frequency (tweaks the OKI6295 frequency)
+ 0x04 = OKI6295 reset (active low)
+ 0x02 = OKI6295 bank bit 0
+ 0x01 = YM2151 reset (active low)
+ */
/* reset the YM2151 if needed */
if ((data&1) == 0) space.machine().device("ymsnd")->reset();
@@ -561,14 +561,14 @@ static WRITE8_HANDLER( jsa3_io_w )
if (oki6295 != NULL) oki6295->set_pin7(data & 8);
break;
- case 0x206: /* /MIX */
+ case 0x206: /* /MIX */
/*
- 0xc0 = n/c
- 0x20 = low-pass filter enable
- 0x10 = OKI6295 bank bit 1
- 0x0e = YM2151 volume (0-7)
- 0x01 = OKI6295 volume (0-1)
- */
+ 0xc0 = n/c
+ 0x20 = low-pass filter enable
+ 0x10 = OKI6295 bank bit 1
+ 0x0e = YM2151 volume (0-7)
+ 0x01 = OKI6295 volume (0-1)
+ */
/* update the OKI bank */
if (oki6295 != NULL)
@@ -597,40 +597,40 @@ static READ8_HANDLER( jsa3s_io_r )
switch (offset & 0x206)
{
- case 0x000: /* /RDV */
+ case 0x000: /* /RDV */
if (oki6295_l != NULL)
result = ((offset & 1) ? oki6295_r : oki6295_l)->read(space, offset);
break;
- case 0x002: /* /RDP */
+ case 0x002: /* /RDP */
result = atarigen->m6502_sound_r(space, offset);
break;
- case 0x004: /* /RDIO */
+ case 0x004: /* /RDIO */
/*
- 0x80 = self test (active high)
- 0x40 = NMI line state (active high)
- 0x20 = sound output full (active high)
- 0x10 = self test (active high)
- 0x08 = service (active high)
- 0x04 = tilt (active high)
- 0x02 = coin L (active high)
- 0x01 = coin R (active high)
- */
+ 0x80 = self test (active high)
+ 0x40 = NMI line state (active high)
+ 0x20 = sound output full (active high)
+ 0x10 = self test (active high)
+ 0x08 = service (active high)
+ 0x04 = tilt (active high)
+ 0x02 = coin L (active high)
+ 0x01 = coin R (active high)
+ */
result = space.machine().root_device().ioport("JSAIII")->read();
if (!(space.machine().root_device().ioport(test_port)->read() & test_mask)) result ^= 0x90;
if (atarigen->m_cpu_to_sound_ready) result ^= 0x40;
if (atarigen->m_sound_to_cpu_ready) result ^= 0x20;
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
atarigen->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /WRV */
- case 0x202: /* /WRP */
- case 0x204: /* /WRIO */
- case 0x206: /* /MIX */
+ case 0x200: /* /WRV */
+ case 0x202: /* /WRP */
+ case 0x204: /* /WRIO */
+ case 0x206: /* /MIX */
logerror("atarijsa: Unknown read at %04X\n", offset & 0x206);
break;
}
@@ -643,39 +643,39 @@ static WRITE8_HANDLER( jsa3s_io_w )
{
switch (offset & 0x206)
{
- case 0x000: /* /RDV */
+ case 0x000: /* /RDV */
overall_volume = data * 100 / 127;
update_all_volumes(space.machine());
break;
- case 0x002: /* /RDP */
- case 0x004: /* /RDIO */
+ case 0x002: /* /RDP */
+ case 0x004: /* /RDIO */
logerror("atarijsa: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
space.machine().driver_data<atarigen_state>()->m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /WRV */
+ case 0x200: /* /WRV */
if (oki6295_l != NULL)
((offset & 1) ? oki6295_r : oki6295_l)->write(space, 0, data);
break;
- case 0x202: /* /WRP */
+ case 0x202: /* /WRP */
space.machine().driver_data<atarigen_state>()->m6502_sound_w(space, offset, data);
break;
- case 0x204: /* /WRIO */
+ case 0x204: /* /WRIO */
/*
- 0xc0 = bank address
- 0x20 = coin counter 2
- 0x10 = coin counter 1
- 0x08 = voice frequency (tweaks the OKI6295 frequency)
- 0x04 = OKI6295 reset (active low)
- 0x02 = left OKI6295 bank bit 0
- 0x01 = YM2151 reset (active low)
- */
+ 0xc0 = bank address
+ 0x20 = coin counter 2
+ 0x10 = coin counter 1
+ 0x08 = voice frequency (tweaks the OKI6295 frequency)
+ 0x04 = OKI6295 reset (active low)
+ 0x02 = left OKI6295 bank bit 0
+ 0x01 = YM2151 reset (active low)
+ */
/* reset the YM2151 if needed */
if ((data&1) == 0) space.machine().device("ymsnd")->reset();
@@ -695,14 +695,14 @@ static WRITE8_HANDLER( jsa3s_io_w )
oki6295_r->set_pin7(data & 8);
break;
- case 0x206: /* /MIX */
+ case 0x206: /* /MIX */
/*
- 0xc0 = right OKI6295 bank bits 0-1
- 0x20 = low-pass filter enable
- 0x10 = left OKI6295 bank bit 1
- 0x0e = YM2151 volume (0-7)
- 0x01 = OKI6295 volume (0-1)
- */
+ 0xc0 = right OKI6295 bank bits 0-1
+ 0x20 = low-pass filter enable
+ 0x10 = left OKI6295 bank bit 1
+ 0x0e = YM2151 volume (0-7)
+ 0x01 = OKI6295 volume (0-1)
+ */
/* update the OKI bank */
space.machine().root_device().membank("bank12")->set_entry((space.machine().root_device().membank("bank12")->entry() & 1) | ((data >> 3) & 2));
@@ -938,10 +938,10 @@ INPUT_PORTS_START( atarijsa_i )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* speech chip ready */
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) /* output buffer full */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* input buffer full */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* speech chip ready */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) /* output buffer full */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* input buffer full */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
INPUT_PORTS_END
INPUT_PORTS_START( atarijsa_ii )
@@ -951,9 +951,9 @@ INPUT_PORTS_START( atarijsa_ii )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) /* output buffer full */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* input buffer full */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) /* output buffer full */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* input buffer full */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
INPUT_PORTS_END
INPUT_PORTS_START( atarijsa_iii )
@@ -962,8 +962,8 @@ INPUT_PORTS_START( atarijsa_iii )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_TILT )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE )
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) /* output buffer full */
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) /* input buffer full */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) /* output buffer full */
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) /* input buffer full */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* self test */
INPUT_PORTS_END
diff --git a/src/mame/audio/avalnche.c b/src/mame/audio/avalnche.c
index fea25c7b0b7..c9527e150e9 100644
--- a/src/mame/audio/avalnche.c
+++ b/src/mame/audio/avalnche.c
@@ -9,11 +9,11 @@
/* Avalanche Discrete Sound Input Nodes */
-#define AVALNCHE_AUD0_EN NODE_01
-#define AVALNCHE_AUD1_EN NODE_02
-#define AVALNCHE_AUD2_EN NODE_03
-#define AVALNCHE_SOUNDLVL_DATA NODE_04
-#define AVALNCHE_ATTRACT_EN NODE_05
+#define AVALNCHE_AUD0_EN NODE_01
+#define AVALNCHE_AUD1_EN NODE_02
+#define AVALNCHE_AUD2_EN NODE_03
+#define AVALNCHE_SOUNDLVL_DATA NODE_04
+#define AVALNCHE_ATTRACT_EN NODE_05
/***************************************************************************
@@ -36,15 +36,15 @@ WRITE8_MEMBER(avalnche_state::avalnche_audio_w)
switch (offset & 0x07)
{
- case 0x00: /* AUD0 */
+ case 0x00: /* AUD0 */
discrete_sound_w(m_discrete, space, AVALNCHE_AUD0_EN, bit);
break;
- case 0x01: /* AUD1 */
+ case 0x01: /* AUD1 */
discrete_sound_w(m_discrete, space, AVALNCHE_AUD1_EN, bit);
break;
- case 0x02: /* AUD2 */
+ case 0x02: /* AUD2 */
default:
discrete_sound_w(m_discrete, space, AVALNCHE_AUD2_EN, bit);
break;
@@ -58,23 +58,23 @@ WRITE8_MEMBER(avalnche_state::avalnche_audio_w)
static const discrete_lfsr_desc avalnche_lfsr={
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 15 /* Output bit */
};
/* Nodes - Sounds */
-#define AVALNCHE_NOISE NODE_10
-#define AVALNCHE_AUD1_SND NODE_11
-#define AVALNCHE_AUD2_SND NODE_12
-#define AVALNCHE_SOUNDLVL_AUD0_SND NODE_13
+#define AVALNCHE_NOISE NODE_10
+#define AVALNCHE_AUD1_SND NODE_11
+#define AVALNCHE_AUD2_SND NODE_12
+#define AVALNCHE_SOUNDLVL_AUD0_SND NODE_13
DISCRETE_SOUND_START(avalnche)
/************************************************/
@@ -102,7 +102,7 @@ DISCRETE_SOUND_START(avalnche)
/* Aud1 = 32V = HSYNC/64 = 15750/64 */
/* Aud2 = 8V = HSYNC/16 = 15750/16 */
/************************************************/
- DISCRETE_SQUAREWFIX(NODE_20, AVALNCHE_AUD0_EN, 15750.0/4, 725.6, 50.0, 0, 0.0) // Aud0
+ DISCRETE_SQUAREWFIX(NODE_20, AVALNCHE_AUD0_EN, 15750.0/4, 725.6, 50.0, 0, 0.0) // Aud0
DISCRETE_SQUAREWFIX(AVALNCHE_AUD1_SND, AVALNCHE_AUD1_EN, 15750.0/64, 750.2, 50.0, 0, 0.0)
DISCRETE_SQUAREWFIX(AVALNCHE_AUD2_SND, AVALNCHE_AUD2_EN, 15750.0/16, 750.2, 50.0, 0, 0.0)
@@ -131,5 +131,5 @@ DISCRETE_SOUND_END
WRITE8_MEMBER(avalnche_state::catch_audio_w)
{
/* Different from avalnche, it plays a sound (offset 0/1/2) on data bit 0 rising edge.
- There's no indication that the game silences sound, it's probably done automatically. */
+ There's no indication that the game silences sound, it's probably done automatically. */
}
diff --git a/src/mame/audio/aztarac.c b/src/mame/audio/aztarac.c
index be011372708..a6af93ab736 100644
--- a/src/mame/audio/aztarac.c
+++ b/src/mame/audio/aztarac.c
@@ -11,7 +11,7 @@
READ16_MEMBER(aztarac_state::aztarac_sound_r)
{
- return m_sound_status & 0x01;
+ return m_sound_status & 0x01;
}
WRITE16_MEMBER(aztarac_state::aztarac_sound_w)
@@ -28,25 +28,25 @@ WRITE16_MEMBER(aztarac_state::aztarac_sound_w)
READ8_MEMBER(aztarac_state::aztarac_snd_command_r)
{
- m_sound_status |= 0x01;
- m_sound_status &= ~0x20;
- return soundlatch_byte_r(space,offset);
+ m_sound_status |= 0x01;
+ m_sound_status &= ~0x20;
+ return soundlatch_byte_r(space,offset);
}
READ8_MEMBER(aztarac_state::aztarac_snd_status_r)
{
- return m_sound_status & ~0x01;
+ return m_sound_status & ~0x01;
}
WRITE8_MEMBER(aztarac_state::aztarac_snd_status_w)
{
- m_sound_status &= ~0x10;
+ m_sound_status &= ~0x10;
}
INTERRUPT_GEN_MEMBER(aztarac_state::aztarac_snd_timed_irq)
{
- m_sound_status ^= 0x10;
+ m_sound_status ^= 0x10;
- if (m_sound_status & 0x10)
- device.execute().set_input_line(0,HOLD_LINE);
+ if (m_sound_status & 0x10)
+ device.execute().set_input_line(0,HOLD_LINE);
}
diff --git a/src/mame/audio/beezer.c b/src/mame/audio/beezer.c
index 69a5326f5d2..0b8cce14277 100644
--- a/src/mame/audio/beezer.c
+++ b/src/mame/audio/beezer.c
@@ -62,9 +62,9 @@
*
*************************************/
-#define CRYSTAL_OSC (XTAL_12MHz)
-#define SH6840_CLOCK (CRYSTAL_OSC / 12)
-#define MULTIPLEX_FREQ (SH6840_CLOCK / 16)
+#define CRYSTAL_OSC (XTAL_12MHz)
+#define SH6840_CLOCK (CRYSTAL_OSC / 12)
+#define MULTIPLEX_FREQ (SH6840_CLOCK / 16)
/*************************************
*
@@ -75,12 +75,12 @@
/* 6840 variables */
struct sh6840_timer_channel
{
- UINT8 cr;
- UINT8 state;
- UINT8 leftovers;
- UINT16 timer;
- UINT32 clocks;
- UINT8 int_flag;
+ UINT8 cr;
+ UINT8 state;
+ UINT8 leftovers;
+ UINT16 timer;
+ UINT32 clocks;
+ UINT8 int_flag;
union
{
#ifdef LSB_FIRST
@@ -217,7 +217,7 @@ INLINE int sh6840_update_noise(beezer_sound_state *state, int clocks)
{
state->m_sh6840_LFSR_clocks = 0;
/* shift the LFSR. finally or in the result and see if we've
- * had a 0->1 transition */
+ * had a 0->1 transition */
newxor = (((state->m_sh6840_LFSR&0x10000)?1:0) ^ ((state->m_sh6840_LFSR&0x2000)?1:0))?1:0;
state->m_sh6840_LFSR <<= 1;
state->m_sh6840_LFSR |= newxor;
@@ -353,11 +353,11 @@ static STREAM_UPDATE( beezer_stream_update )
/* stash */
/* each sample feeds an xor bit on the sign bit of a sign-magnitude (NOT 2'S COMPLEMENT)
- * DAC. This requires some rather convoluted processing:
- * samplex*0x80 brings the sample to the sign bit
- * state->m_sh6840_volume[x]&0x80 pulls the sign bit from the dac sample
- * state->m_sh6840_volume[x]&0x7F pulls the magnitude from the dac sample
- */
+ * DAC. This requires some rather convoluted processing:
+ * samplex*0x80 brings the sample to the sign bit
+ * state->m_sh6840_volume[x]&0x80 pulls the sign bit from the dac sample
+ * state->m_sh6840_volume[x]&0x7F pulls the magnitude from the dac sample
+ */
sample += (((sample0*0x80)^(state->m_sh6840_volume[0]&0x80))?-1:1)*(state->m_sh6840_volume[0]&0x7F);
sample += (((sample1*0x80)^(state->m_sh6840_volume[1]&0x80))?-1:1)*(state->m_sh6840_volume[1]&0x7F);
sample += (((sample2*0x80)^(state->m_sh6840_volume[2]&0x80))?-1:1)*(state->m_sh6840_volume[2]&0x7F);
@@ -398,7 +398,7 @@ const device_type BEEZER = &device_creator<beezer_sound_device>;
beezer_sound_device::beezer_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, BEEZER, "beezer SFX", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(beezer_sound_state);
}
@@ -602,4 +602,3 @@ WRITE8_DEVICE_HANDLER( beezer_sfxctrl_w )
state->m_stream->update();
state->m_sh6840_volume[offset] = data;
}
-
diff --git a/src/mame/audio/blockade.c b/src/mame/audio/blockade.c
index 70728f0169a..ce99a62e228 100644
--- a/src/mame/audio/blockade.c
+++ b/src/mame/audio/blockade.c
@@ -11,8 +11,8 @@
* along with proper mixing and volume control
*/
-#define BLOCKADE_NOTE_DATA NODE_01
-#define BLOCKADE_NOTE NODE_02
+#define BLOCKADE_NOTE_DATA NODE_01
+#define BLOCKADE_NOTE NODE_02
DISCRETE_SOUND_START(blockade)
DISCRETE_INPUT_DATA (BLOCKADE_NOTE_DATA)
@@ -65,6 +65,6 @@ static const char *const blockade_sample_names[] =
const samples_interface blockade_samples_interface =
{
- 1, /* 1 channel */
+ 1, /* 1 channel */
blockade_sample_names
};
diff --git a/src/mame/audio/bsktball.c b/src/mame/audio/bsktball.c
index e667254424f..eec803e4bed 100644
--- a/src/mame/audio/bsktball.c
+++ b/src/mame/audio/bsktball.c
@@ -12,13 +12,13 @@ Sound handlers
***************************************************************************/
WRITE8_MEMBER(bsktball_state::bsktball_bounce_w)
{
- discrete_sound_w(m_discrete, space, BSKTBALL_CROWD_DATA, data & 0x0f); // Crowd
- discrete_sound_w(m_discrete, space, BSKTBALL_BOUNCE_EN, data & 0x10); // Bounce
+ discrete_sound_w(m_discrete, space, BSKTBALL_CROWD_DATA, data & 0x0f); // Crowd
+ discrete_sound_w(m_discrete, space, BSKTBALL_BOUNCE_EN, data & 0x10); // Bounce
}
WRITE8_MEMBER(bsktball_state::bsktball_note_w)
{
- discrete_sound_w(m_discrete, space, BSKTBALL_NOTE_DATA, data); // Note
+ discrete_sound_w(m_discrete, space, BSKTBALL_NOTE_DATA, data); // Note
}
WRITE8_MEMBER(bsktball_state::bsktball_noise_reset_w)
@@ -34,34 +34,34 @@ WRITE8_MEMBER(bsktball_state::bsktball_noise_reset_w)
static const discrete_lfsr_desc bsktball_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 15 /* Output bit */
};
static const discrete_dac_r1_ladder bsktball_crowd_r1_ladder =
{
4,
- {RES_K(390), RES_K(220), RES_K(100), RES_K(56)}, // r55, r54, r53, r52
- 0, 0, // no bias
- RES_K(1), // r21
- CAP_U(0.1) // c32
+ {RES_K(390), RES_K(220), RES_K(100), RES_K(56)}, // r55, r54, r53, r52
+ 0, 0, // no bias
+ RES_K(1), // r21
+ CAP_U(0.1) // c32
};
static const discrete_op_amp_filt_info bsktball_crowd_filt =
{
- 1.0/(1.0/RES_K(390) + 1.0/RES_K(220) + 1.0/RES_K(100) + 1.0/RES_K(56) + 1.0/RES_K(1)), // r55, r54, r53, r52, r21
+ 1.0/(1.0/RES_K(390) + 1.0/RES_K(220) + 1.0/RES_K(100) + 1.0/RES_K(56) + 1.0/RES_K(1)), // r55, r54, r53, r52, r21
0, 0, 0,
- RES_K(330), // r58
- CAP_U(.01), // c55
- CAP_U(.022), // c56
+ RES_K(330), // r58
+ CAP_U(.01), // c55
+ CAP_U(.022), // c56
0,
5, 12, 0
};
@@ -69,25 +69,25 @@ static const discrete_op_amp_filt_info bsktball_crowd_filt =
static const discrete_mixer_desc bsktball_mixer =
{
DISC_MIXER_IS_OP_AMP,
- {RES_K(47), RES_K(47), RES_K(220)}, // r56, r57, r60
- {0}, // no rNodes
- {CAP_U(.01), CAP_U(.01), CAP_U(.01)}, // c53, c54, c57
+ {RES_K(47), RES_K(47), RES_K(220)}, // r56, r57, r60
+ {0}, // no rNodes
+ {CAP_U(.01), CAP_U(.01), CAP_U(.01)}, // c53, c54, c57
0,
- RES_K(47), // r61
- CAP_U(.001), // c58
+ RES_K(47), // r61
+ CAP_U(.001), // c58
CAP_U(1),
5,
7500
};
-#define BSKTBALL_32H 12096000.0/4/32
-#define BSKTBALL_256H 12096000.0/768
+#define BSKTBALL_32H 12096000.0/4/32
+#define BSKTBALL_256H 12096000.0/768
/* Nodes - Sounds */
-#define BSKTBALL_NOISE NODE_10
-#define BSKTBALL_BOUNCE_SND BSKTBALL_BOUNCE_EN
-#define BSKTBALL_NOTE_SND NODE_12
-#define BSKTBALL_CROWD_SND NODE_13
+#define BSKTBALL_NOISE NODE_10
+#define BSKTBALL_BOUNCE_SND BSKTBALL_BOUNCE_EN
+#define BSKTBALL_NOTE_SND NODE_12
+#define BSKTBALL_CROWD_SND NODE_13
DISCRETE_SOUND_START(bsktball)
/************************************************/
@@ -106,7 +106,7 @@ DISCRETE_SOUND_START(bsktball)
/* LFSR clk = 256H = 15750.0Hz */
/************************************************/
DISCRETE_LFSR_NOISE(BSKTBALL_NOISE, BSKTBALL_NOISE_EN, BSKTBALL_NOISE_EN, BSKTBALL_256H, 1, 0, .5, &bsktball_lfsr)
- DISCRETE_SWITCH(NODE_20, 1, BSKTBALL_NOISE, 0, BSKTBALL_CROWD_DATA) // enable data, gate D11
+ DISCRETE_SWITCH(NODE_20, 1, BSKTBALL_NOISE, 0, BSKTBALL_CROWD_DATA) // enable data, gate D11
DISCRETE_DAC_R1(NODE_21, NODE_20, DEFAULT_TTL_V_LOGIC_1, &bsktball_crowd_r1_ladder)
DISCRETE_OP_AMP_FILTER(BSKTBALL_CROWD_SND, 1, NODE_21, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &bsktball_crowd_filt)
diff --git a/src/mame/audio/bwidow.c b/src/mame/audio/bwidow.c
index c035cc5241a..28878a56041 100644
--- a/src/mame/audio/bwidow.c
+++ b/src/mame/audio/bwidow.c
@@ -35,57 +35,57 @@ static const pokey_interface pokey_interface_2 =
*
*************************************/
-#define BW_R43 RES_M(1)
-#define BW_R44 RES_M(1)
-#define BW_R45 RES_K(100)
-#define BW_R46 RES_K(22)
-#define BW_R47 RES_K(1)
-#define BW_R48 RES_M(1)
-#define BW_R49 RES_K(3.9)
-#define BW_R51 RES_K(1)
-#define BW_R52 RES_K(3.9)
-
-#define BW_C27 CAP_P(100)
-#define BW_C28 CAP_P(1)
-#define BW_C30 CAP_U(0.22)
-#define BW_C31 CAP_U(0.015)
-#define BW_C32 CAP_U(0.015)
-#define BW_C33 CAP_U(0.22)
+#define BW_R43 RES_M(1)
+#define BW_R44 RES_M(1)
+#define BW_R45 RES_K(100)
+#define BW_R46 RES_K(22)
+#define BW_R47 RES_K(1)
+#define BW_R48 RES_M(1)
+#define BW_R49 RES_K(3.9)
+#define BW_R51 RES_K(1)
+#define BW_R52 RES_K(3.9)
+
+#define BW_C27 CAP_P(100)
+#define BW_C28 CAP_P(1)
+#define BW_C30 CAP_U(0.22)
+#define BW_C31 CAP_U(0.015)
+#define BW_C32 CAP_U(0.015)
+#define BW_C33 CAP_U(0.22)
static discrete_op_amp_filt_info stage1_bwidow_info = {
- BW_R45, 0, 0, 0, /* r1 .. r4 */
- BW_R43, /* rF */
- BW_C27, /* C1 */
- BW_C30, /* C2 */
- 0, /* C3 */
- 0.0, /* vRef */
- 15.0, /* vP */
- -15.0, /* vN */
+ BW_R45, 0, 0, 0, /* r1 .. r4 */
+ BW_R43, /* rF */
+ BW_C27, /* C1 */
+ BW_C30, /* C2 */
+ 0, /* C3 */
+ 0.0, /* vRef */
+ 15.0, /* vP */
+ -15.0, /* vN */
};
static discrete_op_amp_filt_info stage2_bwidow_info = {
- BW_R48, 0, 0, 0, /* r1 .. r4 */
- BW_R44, /* rF */
- BW_C28, /* C1 */ /* on schematic, not on parts list, gravitar retrofit manual says not needed - so what? */
- 0, /* C2 */
- 0, /* C3 */
- 0.0, /* vRef */
- 15.0, /* vP */
- -15.0, /* vN */
+ BW_R48, 0, 0, 0, /* r1 .. r4 */
+ BW_R44, /* rF */
+ BW_C28, /* C1 */ /* on schematic, not on parts list, gravitar retrofit manual says not needed - so what? */
+ 0, /* C2 */
+ 0, /* C3 */
+ 0.0, /* vRef */
+ 15.0, /* vP */
+ -15.0, /* vN */
};
static discrete_mixer_desc bwidow_mixer = {
- DISC_MIXER_IS_OP_AMP, /* type */
- { BW_R49, BW_R46 }, /* r{} */
- {}, /* r_node */
- { BW_C33, 0 }, /* c{} */
- 0, /* rI */
- BW_R52, /* rF */
- 0, /* cF */
- 0, /* cAmp */
- 0, /* vRef */
- 1.0 /* gain */
+ DISC_MIXER_IS_OP_AMP, /* type */
+ { BW_R49, BW_R46 }, /* r{} */
+ {}, /* r_node */
+ { BW_C33, 0 }, /* c{} */
+ 0, /* rI */
+ BW_R52, /* rF */
+ 0, /* cF */
+ 0, /* cAmp */
+ 0, /* vRef */
+ 1.0 /* gain */
};
static DISCRETE_SOUND_START(bwidow)
@@ -95,8 +95,8 @@ static DISCRETE_SOUND_START(bwidow)
/************************************************/
/* Convert Pokey output to 5V Signal */
- DISCRETE_INPUTX_STREAM(NODE_100, 0, 5.0 / 32768, 5.0) /* Add VRef again */
- DISCRETE_INPUTX_STREAM(NODE_110, 1, 5.0 / 32768, 5.0) /* Add VRef again */
+ DISCRETE_INPUTX_STREAM(NODE_100, 0, 5.0 / 32768, 5.0) /* Add VRef again */
+ DISCRETE_INPUTX_STREAM(NODE_110, 1, 5.0 / 32768, 5.0) /* Add VRef again */
DISCRETE_OP_AMP_FILTER(NODE_120, 1, NODE_110, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1, &stage1_bwidow_info)
DISCRETE_OP_AMP_FILTER(NODE_130, 1, NODE_120, 0, DISC_OP_AMP_FILTER_IS_LOW_PASS_1, &stage2_bwidow_info)
@@ -106,44 +106,44 @@ static DISCRETE_SOUND_START(bwidow)
DISCRETE_SOUND_END
-#define GRAV_C34 CAP_U(0.22)
-#define GRAV_R46 RES_K(10)
-#define GRAV_C27 CAP_N(1)
+#define GRAV_C34 CAP_U(0.22)
+#define GRAV_R46 RES_K(10)
+#define GRAV_C27 CAP_N(1)
static discrete_op_amp_filt_info stage1_gravitar_info = {
- BW_R45, 0, 0, 0, /* r1 .. r4 */
- BW_R43, /* rF */
- GRAV_C27, /* C1 */
- BW_C30, /* C2 */
- 0, /* C3 */
- 0.0, /* vRef */
- 15.0, /* vP */
- -15.0, /* vN */
+ BW_R45, 0, 0, 0, /* r1 .. r4 */
+ BW_R43, /* rF */
+ GRAV_C27, /* C1 */
+ BW_C30, /* C2 */
+ 0, /* C3 */
+ 0.0, /* vRef */
+ 15.0, /* vP */
+ -15.0, /* vN */
};
/* same as bwidow, already in for possible changes to C28 */
static discrete_op_amp_filt_info stage2_gravitar_info = {
- BW_R48, 0, 0, 0, /* r1 .. r4 */
- BW_R44, /* rF */
- BW_C28, /* C1 */ /* on schematic, not on parts list, gravitar retrofit manual says not needed - so what? */
- 0, /* C2 */
- 0, /* C3 */
- 0.0, /* vRef */
- 15.0, /* vP */
- -15.0, /* vN */
+ BW_R48, 0, 0, 0, /* r1 .. r4 */
+ BW_R44, /* rF */
+ BW_C28, /* C1 */ /* on schematic, not on parts list, gravitar retrofit manual says not needed - so what? */
+ 0, /* C2 */
+ 0, /* C3 */
+ 0.0, /* vRef */
+ 15.0, /* vP */
+ -15.0, /* vN */
};
static discrete_mixer_desc gravitar_mixer = {
- DISC_MIXER_IS_OP_AMP, /* type */
- { BW_R49, GRAV_R46 }, /* r{} */
- {}, /* r_node */
- { BW_C33, 0 }, /* c{} */
- 0, /* rI */
- BW_R52, /* rF */
- 0, /* cF */
- 0, /* cAmp */
- 0, /* vRef */
- 1.0 /* gain */
+ DISC_MIXER_IS_OP_AMP, /* type */
+ { BW_R49, GRAV_R46 }, /* r{} */
+ {}, /* r_node */
+ { BW_C33, 0 }, /* c{} */
+ 0, /* rI */
+ BW_R52, /* rF */
+ 0, /* cF */
+ 0, /* cAmp */
+ 0, /* vRef */
+ 1.0 /* gain */
};
@@ -154,8 +154,8 @@ static DISCRETE_SOUND_START(gravitar)
/************************************************/
/* Convert Pokey output to 5V Signal */
- DISCRETE_INPUTX_STREAM(NODE_100, 0, 5.0 / 32768, 5.0) /* Add VRef again */
- DISCRETE_INPUTX_STREAM(NODE_110, 1, 5.0 / 32768, 5.0) /* Add VRef again */
+ DISCRETE_INPUTX_STREAM(NODE_100, 0, 5.0 / 32768, 5.0) /* Add VRef again */
+ DISCRETE_INPUTX_STREAM(NODE_110, 1, 5.0 / 32768, 5.0) /* Add VRef again */
DISCRETE_OP_AMP_FILTER(NODE_120, 1, NODE_110, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1, &stage1_gravitar_info)
DISCRETE_OP_AMP_FILTER(NODE_130, 1, NODE_120, 0, DISC_OP_AMP_FILTER_IS_LOW_PASS_1, &stage2_gravitar_info)
@@ -190,9 +190,8 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( gravitar_audio )
MCFG_SOUND_MODIFY("pokey1")
- MCFG_POKEY_OUTPUT_OPAMP_LOW_PASS(BW_R51, GRAV_C34, 5.0) /* BW_C31 ignored */
+ MCFG_POKEY_OUTPUT_OPAMP_LOW_PASS(BW_R51, GRAV_C34, 5.0) /* BW_C31 ignored */
MCFG_SOUND_MODIFY("discrete")
MCFG_SOUND_CONFIG_DISCRETE(gravitar)
MACHINE_CONFIG_END
-
diff --git a/src/mame/audio/bzone.c b/src/mame/audio/bzone.c
index 759a790b81a..1d814b44b0f 100644
--- a/src/mame/audio/bzone.c
+++ b/src/mame/audio/bzone.c
@@ -29,9 +29,9 @@ D0 explosion enable gates a noise generator
* This allows for the user to easily adjust the sound into the clipping
* range so it sounds more like a real cabinet.
*/
-#define BZ_FINAL_GAIN 2
+#define BZ_FINAL_GAIN 2
-#define BZ_NOISE_CLOCK 12000
+#define BZ_NOISE_CLOCK 12000
#define TTL_OUT 3.4
@@ -42,65 +42,65 @@ D0 explosion enable gates a noise generator
*************************************/
/* Discrete Sound Input Nodes */
-#define BZ_INPUT NODE_01 /* at M2 LS273 */
-#define BZ_INP_EXPLO NODE_10_00
-#define BZ_INP_EXPLOLS NODE_10_01
-#define BZ_INP_SHELL NODE_10_02
-#define BZ_INP_SHELLLS NODE_10_03
-#define BZ_INP_ENGREV NODE_10_04
-#define BZ_INP_SOUNDEN NODE_10_05
-#define BZ_INP_STARTLED NODE_10_06
-#define BZ_INP_MOTEN NODE_10_07
+#define BZ_INPUT NODE_01 /* at M2 LS273 */
+#define BZ_INP_EXPLO NODE_10_00
+#define BZ_INP_EXPLOLS NODE_10_01
+#define BZ_INP_SHELL NODE_10_02
+#define BZ_INP_SHELLLS NODE_10_03
+#define BZ_INP_ENGREV NODE_10_04
+#define BZ_INP_SOUNDEN NODE_10_05
+#define BZ_INP_STARTLED NODE_10_06
+#define BZ_INP_MOTEN NODE_10_07
/* Adjusters */
-#define BZ_R11_POT NODE_11
+#define BZ_R11_POT NODE_11
/* Discrete Sound Output Nodes */
-#define BZ_NOISE NODE_20
-#define BZ_SHELL_SND NODE_21
-#define BZ_EXPLOSION_SND NODE_22
-#define BZ_ENGINE_SND NODE_23
-#define BZ_POKEY_SND NODE_24
+#define BZ_NOISE NODE_20
+#define BZ_SHELL_SND NODE_21
+#define BZ_EXPLOSION_SND NODE_22
+#define BZ_ENGINE_SND NODE_23
+#define BZ_POKEY_SND NODE_24
/* Parts List - Resistors */
-#define BZ_R5 RES_K(1)
-#define BZ_R6 RES_K(4.7)
-#define BZ_R7 RES_K(1)
-#define BZ_R8 RES_K(100)
-#define BZ_R9 RES_K(22)
-#define BZ_R10 RES_K(100)
-#define BZ_R11 RES_K(250)
-#define BZ_R12 RES_K(33)
-#define BZ_R13 RES_K(10)
-#define BZ_R14 RES_K(22)
-#define BZ_R15 RES_K(1)
-#define BZ_R16 RES_K(1)
-#define BZ_R17 RES_K(22)
-#define BZ_R18 RES_K(10)
-#define BZ_R19 RES_K(33)
-#define BZ_R20 RES_K(33)
-#define BZ_R21 RES_K(33)
-#define BZ_R25 RES_K(100)
-#define BZ_R26 RES_K(33)
-#define BZ_R27 RES_K(330)
-#define BZ_R28 RES_K(100)
-#define BZ_R29 RES_K(22)
-#define BZ_R30 RES_K(10)
-#define BZ_R31 RES_K(100)
-#define BZ_R32 RES_K(330)
-#define BZ_R33 RES_K(330)
-#define BZ_R34 RES_K(33)
-#define BZ_R35 RES_K(33)
+#define BZ_R5 RES_K(1)
+#define BZ_R6 RES_K(4.7)
+#define BZ_R7 RES_K(1)
+#define BZ_R8 RES_K(100)
+#define BZ_R9 RES_K(22)
+#define BZ_R10 RES_K(100)
+#define BZ_R11 RES_K(250)
+#define BZ_R12 RES_K(33)
+#define BZ_R13 RES_K(10)
+#define BZ_R14 RES_K(22)
+#define BZ_R15 RES_K(1)
+#define BZ_R16 RES_K(1)
+#define BZ_R17 RES_K(22)
+#define BZ_R18 RES_K(10)
+#define BZ_R19 RES_K(33)
+#define BZ_R20 RES_K(33)
+#define BZ_R21 RES_K(33)
+#define BZ_R25 RES_K(100)
+#define BZ_R26 RES_K(33)
+#define BZ_R27 RES_K(330)
+#define BZ_R28 RES_K(100)
+#define BZ_R29 RES_K(22)
+#define BZ_R30 RES_K(10)
+#define BZ_R31 RES_K(100)
+#define BZ_R32 RES_K(330)
+#define BZ_R33 RES_K(330)
+#define BZ_R34 RES_K(33)
+#define BZ_R35 RES_K(33)
/* Parts List - Capacitors */
-#define BZ_C9 CAP_U(4.7)
-#define BZ_C11 CAP_U(0.015)
-#define BZ_C13 CAP_U(10)
-#define BZ_C14 CAP_U(10)
-#define BZ_C20 CAP_U(0.1)
-#define BZ_C21 CAP_U(0.0047)
-#define BZ_C22 CAP_U(0.0047)
-#define BZ_C29 CAP_U(0.47)
+#define BZ_C9 CAP_U(4.7)
+#define BZ_C11 CAP_U(0.015)
+#define BZ_C13 CAP_U(10)
+#define BZ_C14 CAP_U(10)
+#define BZ_C20 CAP_U(0.1)
+#define BZ_C21 CAP_U(0.0047)
+#define BZ_C22 CAP_U(0.0047)
+#define BZ_C29 CAP_U(0.47)
/*************************************
*
@@ -112,52 +112,52 @@ D0 explosion enable gates a noise generator
static const discrete_lfsr_desc bzone_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 3, /* Use Bit 10 (QC of second LS164) as F0 input 0 */
- 14, /* Use Bit 23 (QH of third LS164) as F0 input 1 */
- DISC_LFSR_XOR, /* F0 is XOR */
- DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
- DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 3, /* Use Bit 10 (QC of second LS164) as F0 input 0 */
+ 14, /* Use Bit 23 (QH of third LS164) as F0 input 1 */
+ DISC_LFSR_XOR, /* F0 is XOR */
+ DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
+ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
DISC_LFSR_FLAG_OUTPUT_SR_SN1, /* output the complete shift register to sub node 1*/
- 15 /* Output bit */
+ 15 /* Output bit */
};
static const discrete_op_amp_filt_info bzone_explo_0 =
{
- BZ_R18 + BZ_R19, 0, 0, 0, /* r1, r2, r3, r4 */
- BZ_R33, /* rF */
- BZ_C22, 0, 0, /* c1, c2, c3 */
- 0, /* vRef - not used */
- 22, 0 /* vP, vN */
+ BZ_R18 + BZ_R19, 0, 0, 0, /* r1, r2, r3, r4 */
+ BZ_R33, /* rF */
+ BZ_C22, 0, 0, /* c1, c2, c3 */
+ 0, /* vRef - not used */
+ 22, 0 /* vP, vN */
};
static const discrete_op_amp_filt_info bzone_explo_1 =
{
- BZ_R18, 0, 0, 0, /* r1, r2, r3, r4 */
- BZ_R33, /* rF */
- BZ_C22, 0, 0, /* c1, c2, c3 */
- 0, /* vRef - not used */
- 22, 0 /* vP, vN */
+ BZ_R18, 0, 0, 0, /* r1, r2, r3, r4 */
+ BZ_R33, /* rF */
+ BZ_C22, 0, 0, /* c1, c2, c3 */
+ 0, /* vRef - not used */
+ 22, 0 /* vP, vN */
};
static const discrete_op_amp_filt_info bzone_shell_0 =
{
- BZ_R13 + BZ_R12, 0, 0, 0, /* r1, r2, r3, r4 */
- BZ_R32, /* rF */
- BZ_C21, 0, 0, /* c1, c2, c3 */
- 0, /* vRef - not used */
- 22, 0 /* vP, vN */
+ BZ_R13 + BZ_R12, 0, 0, 0, /* r1, r2, r3, r4 */
+ BZ_R32, /* rF */
+ BZ_C21, 0, 0, /* c1, c2, c3 */
+ 0, /* vRef - not used */
+ 22, 0 /* vP, vN */
};
static const discrete_op_amp_filt_info bzone_shell_1 =
{
- BZ_R13, 0, 0, 0, /* r1, r2, r3, r4 */
- BZ_R32, /* rF */
- BZ_C21, 0, 0, /* c1, c2, c3 */
- 0, /* vRef - not used */
- 22, 0 /* vP, vN */
+ BZ_R13, 0, 0, 0, /* r1, r2, r3, r4 */
+ BZ_R32, /* rF */
+ BZ_C21, 0, 0, /* c1, c2, c3 */
+ 0, /* vRef - not used */
+ 22, 0 /* vP, vN */
};
static const discrete_555_desc bzone_vco_desc =
@@ -177,7 +177,7 @@ static const discrete_mixer_desc bzone_eng_mixer_desc =
0, 0,
BZ_C29,
0, /* no out cap */
- 0, TTL_OUT /* inputs are logic */
+ 0, TTL_OUT /* inputs are logic */
};
static const discrete_mixer_desc bzone_final_mixer_desc =
@@ -216,30 +216,30 @@ static const discrete_mixer_desc bzone_final_mixer_desc =
* gnd
*
************************************************************************/
-#define BZONE_CUSTOM_FILTER__IN0 DISCRETE_INPUT(0)
-#define BZONE_CUSTOM_FILTER__IN1 DISCRETE_INPUT(1)
-#define BZONE_CUSTOM_FILTER__R1 DISCRETE_INPUT(2)
-#define BZONE_CUSTOM_FILTER__R2 DISCRETE_INPUT(3)
-#define BZONE_CUSTOM_FILTER__R3 DISCRETE_INPUT(4)
-#define BZONE_CUSTOM_FILTER__R4 DISCRETE_INPUT(5)
-#define BZONE_CUSTOM_FILTER__R5 DISCRETE_INPUT(6)
-#define BZONE_CUSTOM_FILTER__C DISCRETE_INPUT(7)
-#define BZONE_CUSTOM_FILTER__VP DISCRETE_INPUT(8)
-
-#define CD4066_R_ON 270
+#define BZONE_CUSTOM_FILTER__IN0 DISCRETE_INPUT(0)
+#define BZONE_CUSTOM_FILTER__IN1 DISCRETE_INPUT(1)
+#define BZONE_CUSTOM_FILTER__R1 DISCRETE_INPUT(2)
+#define BZONE_CUSTOM_FILTER__R2 DISCRETE_INPUT(3)
+#define BZONE_CUSTOM_FILTER__R3 DISCRETE_INPUT(4)
+#define BZONE_CUSTOM_FILTER__R4 DISCRETE_INPUT(5)
+#define BZONE_CUSTOM_FILTER__R5 DISCRETE_INPUT(6)
+#define BZONE_CUSTOM_FILTER__C DISCRETE_INPUT(7)
+#define BZONE_CUSTOM_FILTER__VP DISCRETE_INPUT(8)
+
+#define CD4066_R_ON 270
DISCRETE_CLASS_STEP_RESET(bzone_custom_filter, 1,
- double m_v_in1_gain;
- double m_v_p;
- double m_exponent;
- double m_gain[2];
+ double m_v_in1_gain;
+ double m_v_p;
+ double m_exponent;
+ double m_gain[2];
double m_out_v;
);
DISCRETE_STEP(bzone_custom_filter)
{
- int in0 = (BZONE_CUSTOM_FILTER__IN0 == 0) ? 0 : 1;
- double v;
+ int in0 = (BZONE_CUSTOM_FILTER__IN0 == 0) ? 0 : 1;
+ double v;
if (BZONE_CUSTOM_FILTER__IN1 > 0)
v = 0;
@@ -277,7 +277,7 @@ static DISCRETE_SOUND_START(bzone)
/************************************************/
DISCRETE_INPUT_DATA(BZ_INPUT)
/* decode the bits */
- DISCRETE_BITS_DECODE(NODE_10, BZ_INPUT, 0, 7, 1) /* IC M2, bits 0 - 7 */
+ DISCRETE_BITS_DECODE(NODE_10, BZ_INPUT, 0, 7, 1) /* IC M2, bits 0 - 7 */
/* the pot is 250K, but we will use a smaller range to get a better adjustment range */
DISCRETE_ADJUSTMENT(BZ_R11_POT, RES_K(75), RES_K(10), DISC_LINADJ, "R11")
@@ -288,77 +288,77 @@ static DISCRETE_SOUND_START(bzone)
/************************************************/
/* 12Khz clock is divided by two by B4 74LS109 */
- DISCRETE_LFSR_NOISE(BZ_NOISE, /* IC H4, pin 13 */
+ DISCRETE_LFSR_NOISE(BZ_NOISE, /* IC H4, pin 13 */
1, 1, BZ_NOISE_CLOCK / 2, 1.0, 0, 0.5, &bzone_lfsr)
/* divide by 2 */
- DISCRETE_COUNTER(NODE_31, /* IC J5, pin 8 */
+ DISCRETE_COUNTER(NODE_31, /* IC J5, pin 8 */
1, 0, BZ_NOISE, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
- DISCRETE_BITS_DECODE(NODE_32, NODE_SUB(BZ_NOISE, 1), 11, 14, 1) /* IC H4, pins 6, 10, 11, 12 */
- DISCRETE_LOGIC_NAND4(NODE_33, /* IC J4, pin 8 */
- NODE_32_00, NODE_32_01, NODE_32_02, NODE_32_03) /* LSFR bits 11-14 */
+ DISCRETE_BITS_DECODE(NODE_32, NODE_SUB(BZ_NOISE, 1), 11, 14, 1) /* IC H4, pins 6, 10, 11, 12 */
+ DISCRETE_LOGIC_NAND4(NODE_33, /* IC J4, pin 8 */
+ NODE_32_00, NODE_32_01, NODE_32_02, NODE_32_03) /* LSFR bits 11-14 */
/* divide by 2 */
- DISCRETE_COUNTER(NODE_34, /* IC J5, pin 6 */
+ DISCRETE_COUNTER(NODE_34, /* IC J5, pin 6 */
1, 0, NODE_33, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE)
/************************************************/
/* Shell */
/************************************************/
- DISCRETE_RC_CIRCUIT_1(NODE_40, /* IC J3, pin 9 */
- BZ_INP_SHELL, NODE_31, /* INP0, INP1 */
+ DISCRETE_RC_CIRCUIT_1(NODE_40, /* IC J3, pin 9 */
+ BZ_INP_SHELL, NODE_31, /* INP0, INP1 */
BZ_R14 + BZ_R15, BZ_C9)
- DISCRETE_CUSTOM9(BZ_SHELL_SND, bzone_custom_filter, /* IC K5, pin 1 */
- BZ_INP_EXPLOLS, NODE_40, /* IN0, IN1 */
+ DISCRETE_CUSTOM9(BZ_SHELL_SND, bzone_custom_filter, /* IC K5, pin 1 */
+ BZ_INP_EXPLOLS, NODE_40, /* IN0, IN1 */
BZ_R12, BZ_R13, BZ_R14, BZ_R15, BZ_R32,
BZ_C21,
- 22, /* B+ of op-amp */
+ 22, /* B+ of op-amp */
NULL)
/************************************************/
/* Explosion */
/************************************************/
- DISCRETE_RC_CIRCUIT_1(NODE_50, /* IC J3, pin 3 */
- BZ_INP_EXPLO, NODE_34, /* INP0, INP1 */
+ DISCRETE_RC_CIRCUIT_1(NODE_50, /* IC J3, pin 3 */
+ BZ_INP_EXPLO, NODE_34, /* INP0, INP1 */
BZ_R17 + BZ_R16, BZ_C14)
- DISCRETE_CUSTOM9(BZ_EXPLOSION_SND, bzone_custom_filter, /* IC K5, pin 1 */
- BZ_INP_EXPLOLS, NODE_50, /* IN0, IN1 */
+ DISCRETE_CUSTOM9(BZ_EXPLOSION_SND, bzone_custom_filter, /* IC K5, pin 1 */
+ BZ_INP_EXPLOLS, NODE_50, /* IN0, IN1 */
BZ_R19, BZ_R18, BZ_R17, BZ_R16, BZ_R33,
BZ_C22,
- 22, /* B+ of op-amp */
+ 22, /* B+ of op-amp */
NULL)
/************************************************/
/* Engine */
/************************************************/
- DISCRETE_SWITCH(NODE_61, /* effect of IC L4, pin 2 */
- 1, BZ_INP_ENGREV, /* ENAB, SWITCH */
- 5.0 * RES_VOLTAGE_DIVIDER(BZ_R7, BZ_R6), /* INP0 */
- 5.0 * RES_VOLTAGE_DIVIDER(BZ_R7, RES_2_PARALLEL(CD4066_R_ON + BZ_R5, BZ_R6))) /* INP1 */
+ DISCRETE_SWITCH(NODE_61, /* effect of IC L4, pin 2 */
+ 1, BZ_INP_ENGREV, /* ENAB, SWITCH */
+ 5.0 * RES_VOLTAGE_DIVIDER(BZ_R7, BZ_R6), /* INP0 */
+ 5.0 * RES_VOLTAGE_DIVIDER(BZ_R7, RES_2_PARALLEL(CD4066_R_ON + BZ_R5, BZ_R6))) /* INP1 */
/* R5, R6, R7 all affect the following circuit charge discharge rates */
/* they are not emulated as their effect is less the the 5% component tolerance */
- DISCRETE_RCDISC3(NODE_62, /* IC K5, pin 7 */
+ DISCRETE_RCDISC3(NODE_62, /* IC K5, pin 7 */
1, NODE_61, BZ_R8, BZ_R9, BZ_C13, -0.5)
- DISCRETE_555_ASTABLE_CV(NODE_63, /* IC F3, pin 3 */
- 1, /* RESET */
+ DISCRETE_555_ASTABLE_CV(NODE_63, /* IC F3, pin 3 */
+ 1, /* RESET */
BZ_R10, BZ_R11_POT, BZ_C11,
- NODE_62, /* CV - IC F3, pin 5 */
+ NODE_62, /* CV - IC F3, pin 5 */
&bzone_vco_desc)
DISCRETE_LOGIC_INVERT(NODE_64, BZ_INP_MOTEN)
- DISCRETE_COUNTER(NODE_65, /* IC F4 */
- 1, NODE_64, NODE_63, /* ENAB, RESET, CLK */
- 4, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */
- DISCRETE_TRANSFORM2(NODE_66, NODE_65, 7, "01>") /* QD - IC F4, pin 11 */
- DISCRETE_TRANSFORM2(NODE_67, NODE_65, 15, "01=") /* Ripple - IC F4, pin 15 */
-
- DISCRETE_COUNTER(NODE_68, /* IC F5 */
- 1, NODE_64, NODE_63, /* ENAB, RESET, CLK */
- 6, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */
- DISCRETE_TRANSFORM2(NODE_69, NODE_68, 7, "01>") /* QD - IC F5, pin 11 */
- DISCRETE_TRANSFORM2(NODE_70, NODE_68, 15, "01=") /* Ripple - IC F5, pin 15 */
+ DISCRETE_COUNTER(NODE_65, /* IC F4 */
+ 1, NODE_64, NODE_63, /* ENAB, RESET, CLK */
+ 4, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */
+ DISCRETE_TRANSFORM2(NODE_66, NODE_65, 7, "01>") /* QD - IC F4, pin 11 */
+ DISCRETE_TRANSFORM2(NODE_67, NODE_65, 15, "01=") /* Ripple - IC F4, pin 15 */
+
+ DISCRETE_COUNTER(NODE_68, /* IC F5 */
+ 1, NODE_64, NODE_63, /* ENAB, RESET, CLK */
+ 6, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* MIN, MAX, DIR, INIT, CLKTYPE */
+ DISCRETE_TRANSFORM2(NODE_69, NODE_68, 7, "01>") /* QD - IC F5, pin 11 */
+ DISCRETE_TRANSFORM2(NODE_70, NODE_68, 15, "01=") /* Ripple - IC F5, pin 15 */
DISCRETE_MIXER4(BZ_ENGINE_SND, 1, NODE_66, NODE_67, NODE_69, NODE_70, &bzone_eng_mixer_desc)
@@ -366,9 +366,9 @@ static DISCRETE_SOUND_START(bzone)
/* FINAL MIX */
/************************************************/
/* We won't bother emulating the final gain of op-amp IC K5, pin 14.
- * This signal never reaches a value where it clips, so we will
- * just output the final 16-bit level.
- */
+ * This signal never reaches a value where it clips, so we will
+ * just output the final 16-bit level.
+ */
/* Convert Pokey output to 5V Signal */
DISCRETE_INPUTX_STREAM(BZ_POKEY_SND, 0, 5.0 / 32768, 0)
diff --git a/src/mame/audio/cage.c b/src/mame/audio/cage.c
index 2aac2c3059d..c7fcbc3f628 100644
--- a/src/mame/audio/cage.c
+++ b/src/mame/audio/cage.c
@@ -5,8 +5,8 @@
****************************************************************************/
-#define LOG_COMM (0)
-#define LOG_32031_IOPORTS (0)
+#define LOG_COMM (0)
+#define LOG_32031_IOPORTS (0)
#include "emu.h"
@@ -22,8 +22,8 @@
*
*************************************/
-#define DAC_BUFFER_CHANNELS 4
-#define STACK_SOUND_BUFSIZE (1024)
+#define DAC_BUFFER_CHANNELS 4
+#define STACK_SOUND_BUFSIZE (1024)
@@ -71,27 +71,27 @@ static cage_t cage;
*
*************************************/
-#define DMA_GLOBAL_CTL 0x00
-#define DMA_SOURCE_ADDR 0x04
-#define DMA_DEST_ADDR 0x06
-#define DMA_TRANSFER_COUNT 0x08
-
-#define TIMER0_GLOBAL_CTL 0x20
-#define TIMER0_COUNTER 0x24
-#define TIMER0_PERIOD 0x28
-
-#define TIMER1_GLOBAL_CTL 0x30
-#define TIMER1_COUNTER 0x34
-#define TIMER1_PERIOD 0x38
-
-#define SPORT_GLOBAL_CTL 0x40
-#define SPORT_TX_CTL 0x42
-#define SPORT_RX_CTL 0x43
-#define SPORT_TIMER_CTL 0x44
-#define SPORT_TIMER_COUNTER 0x45
-#define SPORT_TIMER_PERIOD 0x46
-#define SPORT_DATA_TX 0x48
-#define SPORT_DATA_RX 0x4c
+#define DMA_GLOBAL_CTL 0x00
+#define DMA_SOURCE_ADDR 0x04
+#define DMA_DEST_ADDR 0x06
+#define DMA_TRANSFER_COUNT 0x08
+
+#define TIMER0_GLOBAL_CTL 0x20
+#define TIMER0_COUNTER 0x24
+#define TIMER0_PERIOD 0x28
+
+#define TIMER1_GLOBAL_CTL 0x30
+#define TIMER1_COUNTER 0x34
+#define TIMER1_PERIOD 0x38
+
+#define SPORT_GLOBAL_CTL 0x40
+#define SPORT_TX_CTL 0x42
+#define SPORT_RX_CTL 0x43
+#define SPORT_TIMER_CTL 0x44
+#define SPORT_TIMER_COUNTER 0x45
+#define SPORT_TIMER_PERIOD 0x46
+#define SPORT_DATA_TX 0x48
+#define SPORT_DATA_RX 0x4c
static const char *const register_names[] =
{
diff --git a/src/mame/audio/cage.h b/src/mame/audio/cage.h
index 0c1dd7a9f0c..f3e26961adf 100644
--- a/src/mame/audio/cage.h
+++ b/src/mame/audio/cage.h
@@ -4,8 +4,8 @@
****************************************************************************/
-#define CAGE_IRQ_REASON_DATA_READY (1)
-#define CAGE_IRQ_REASON_BUFFER_EMPTY (2)
+#define CAGE_IRQ_REASON_DATA_READY (1)
+#define CAGE_IRQ_REASON_BUFFER_EMPTY (2)
MACHINE_CONFIG_EXTERN( cage );
MACHINE_CONFIG_EXTERN( cage_seattle );
diff --git a/src/mame/audio/canyon.c b/src/mame/audio/canyon.c
index f3e663a4a51..e7834699aac 100644
--- a/src/mame/audio/canyon.c
+++ b/src/mame/audio/canyon.c
@@ -45,7 +45,7 @@ WRITE8_MEMBER(canyon_state::canyon_whistle_w)
static const discrete_555_desc canyonWhistl555 =
{
DISC_555_OUT_CAP | DISC_555_OUT_AC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
@@ -65,12 +65,12 @@ static const discrete_lfsr_desc canyon_lfsr =
};
/* Nodes - Sounds */
-#define CANYON_MOTORSND1 NODE_10
-#define CANYON_MOTORSND2 NODE_11
-#define CANYON_EXPLODESND NODE_12
-#define CANYON_WHISTLESND1 NODE_13
-#define CANYON_WHISTLESND2 NODE_14
-#define CANYON_NOISE NODE_15
+#define CANYON_MOTORSND1 NODE_10
+#define CANYON_MOTORSND2 NODE_11
+#define CANYON_EXPLODESND NODE_12
+#define CANYON_WHISTLESND1 NODE_13
+#define CANYON_WHISTLESND2 NODE_14
+#define CANYON_NOISE NODE_15
DISCRETE_SOUND_START(canyon)
/************************************************/
@@ -126,15 +126,15 @@ DISCRETE_SOUND_START(canyon)
DISCRETE_ADJUSTMENT(NODE_21, (214.0-27.0)/12/15, (4416.0-27.0)/12/15, DISC_LOGADJ, "MOTOR1")
DISCRETE_MULTIPLY(NODE_22, NODE_20, NODE_21)
- DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6) /* F1 = /12*2 = /6 */
+ DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6) /* F1 = /12*2 = /6 */
DISCRETE_SQUAREWAVE(NODE_24, 1, NODE_23, (142.9/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_25, NODE_24, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_26, NODE_22, 3, 27.0/4) /* F2 = /12*3 = /4 */
+ DISCRETE_MULTADD(NODE_26, NODE_22, 3, 27.0/4) /* F2 = /12*3 = /4 */
DISCRETE_SQUAREWAVE(NODE_27, 1, NODE_26, (142.9/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_28, NODE_27, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_29, NODE_22, 4, 27.0/3) /* F3 = /12*4 = /3 */
+ DISCRETE_MULTADD(NODE_29, NODE_22, 4, 27.0/3) /* F3 = /12*4 = /3 */
DISCRETE_SQUAREWAVE(NODE_30, 1, NODE_29, (142.9/3), 100.0/3, 0, 360.0/3)
DISCRETE_RCFILTER(NODE_31, NODE_30, 10000, 1e-7)
@@ -149,15 +149,15 @@ DISCRETE_SOUND_START(canyon)
DISCRETE_ADJUSTMENT(NODE_41, (214.0-27.0)/12/15, (4416.0-27.0)/12/15, DISC_LOGADJ, "MOTOR2")
DISCRETE_MULTIPLY(NODE_42, NODE_40, NODE_41)
- DISCRETE_MULTADD(NODE_43, NODE_42, 2, 27.0/6) /* F1 = /12*2 = /6 */
+ DISCRETE_MULTADD(NODE_43, NODE_42, 2, 27.0/6) /* F1 = /12*2 = /6 */
DISCRETE_SQUAREWAVE(NODE_44, 1, NODE_43, (142.9/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_45, NODE_44, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_46, NODE_42, 3, 27.0/4) /* F2 = /12*3 = /4 */
+ DISCRETE_MULTADD(NODE_46, NODE_42, 3, 27.0/4) /* F2 = /12*3 = /4 */
DISCRETE_SQUAREWAVE(NODE_47, 1, NODE_46, (142.9/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_48, NODE_47, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_49, NODE_42, 4, 27.0/3) /* F3 = /12*4 = /3 */
+ DISCRETE_MULTADD(NODE_49, NODE_42, 4, 27.0/3) /* F3 = /12*4 = /3 */
DISCRETE_SQUAREWAVE(NODE_50, 1, NODE_49, (142.9/3), 100.0/3, 0, 360.0/3)
DISCRETE_RCFILTER(NODE_51, NODE_50, 10000, 1e-7)
@@ -187,15 +187,15 @@ DISCRETE_SOUND_START(canyon)
/* frequency, then decays at the rate set by */
/* a 68k resistor and 22uf capacitor. */
/************************************************/
- DISCRETE_ADJUSTMENT(NODE_70, 50000, 100000, DISC_LINADJ, "WHISTLE1") /* R59 */
+ DISCRETE_ADJUSTMENT(NODE_70, 50000, 100000, DISC_LINADJ, "WHISTLE1") /* R59 */
DISCRETE_MULTADD(NODE_71, CANYON_WHISTLE1_EN, 3.05-0.33, 0.33)
- DISCRETE_RCDISC2(NODE_72, CANYON_WHISTLE1_EN, NODE_71, 1.0, NODE_71, 68000.0, 2.2e-5) /* CV */
+ DISCRETE_RCDISC2(NODE_72, CANYON_WHISTLE1_EN, NODE_71, 1.0, NODE_71, 68000.0, 2.2e-5) /* CV */
DISCRETE_555_ASTABLE_CV(NODE_73, CANYON_WHISTLE1_EN, 33000, NODE_70, 1e-8, NODE_72, &canyonWhistl555)
DISCRETE_MULTIPLY(CANYON_WHISTLESND1, NODE_73, 519.4/3.3)
- DISCRETE_ADJUSTMENT(NODE_75, 50000, 100000, DISC_LINADJ, "WHISTLE2") /* R69 */
+ DISCRETE_ADJUSTMENT(NODE_75, 50000, 100000, DISC_LINADJ, "WHISTLE2") /* R69 */
DISCRETE_MULTADD(NODE_76, CANYON_WHISTLE2_EN, 3.05-0.33, 0.33)
- DISCRETE_RCDISC2(NODE_77, CANYON_WHISTLE2_EN, NODE_76, 1.0, NODE_76, 68000.0, 2.2e-5) /* CV */
+ DISCRETE_RCDISC2(NODE_77, CANYON_WHISTLE2_EN, NODE_76, 1.0, NODE_76, 68000.0, 2.2e-5) /* CV */
DISCRETE_555_ASTABLE_CV(NODE_78, CANYON_WHISTLE2_EN, 33000, NODE_75, 1e-8, NODE_77, &canyonWhistl555)
DISCRETE_MULTIPLY(CANYON_WHISTLESND2, NODE_78, 519.4/3.3)
diff --git a/src/mame/audio/carnival.c b/src/mame/audio/carnival.c
index ddd355fcbaf..72ba1b91086 100644
--- a/src/mame/audio/carnival.c
+++ b/src/mame/audio/carnival.c
@@ -43,7 +43,7 @@
#include "includes/vicdual.h"
-#define PSG_CLOCK (3579545 / 3) /* Hz */
+#define PSG_CLOCK (3579545 / 3) /* Hz */
/* output port 0x01 definitions - sound effect drive outputs */
diff --git a/src/mame/audio/cchasm.c b/src/mame/audio/cchasm.c
index 06e50e4a18c..b3bc60fb538 100644
--- a/src/mame/audio/cchasm.c
+++ b/src/mame/audio/cchasm.c
@@ -119,9 +119,9 @@ WRITE_LINE_MEMBER(cchasm_state::ctc_timer_2_w)
Z80CTC_INTERFACE( cchasm_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), /* interrupt handler */
- DEVCB_NULL, /* ZC/TO0 callback */
- DEVCB_DRIVER_LINE_MEMBER(cchasm_state,ctc_timer_1_w), /* ZC/TO1 callback */
- DEVCB_DRIVER_LINE_MEMBER(cchasm_state,ctc_timer_2_w) /* ZC/TO2 callback */
+ DEVCB_NULL, /* ZC/TO0 callback */
+ DEVCB_DRIVER_LINE_MEMBER(cchasm_state,ctc_timer_1_w), /* ZC/TO1 callback */
+ DEVCB_DRIVER_LINE_MEMBER(cchasm_state,ctc_timer_2_w) /* ZC/TO2 callback */
};
SOUND_START( cchasm )
diff --git a/src/mame/audio/cclimber.c b/src/mame/audio/cclimber.c
index 9551ec3745e..2f8c2bbbd74 100644
--- a/src/mame/audio/cclimber.c
+++ b/src/mame/audio/cclimber.c
@@ -7,10 +7,10 @@
/* macro to convert 4-bit unsigned samples to 16-bit signed samples */
#define SAMPLE_CONV4(a) (0x1111*((a&0x0f))-0x8000)
-#define SND_CLOCK 3072000 /* 3.072 MHz */
+#define SND_CLOCK 3072000 /* 3.072 MHz */
-static INT16 *samplebuf; /* buffer to decode samples at run time */
+static INT16 *samplebuf; /* buffer to decode samples at run time */
static SAMPLES_START( cclimber_sh_start )
@@ -66,7 +66,7 @@ WRITE8_HANDLER( cclimber_sample_rate_w )
WRITE8_HANDLER( cclimber_sample_volume_w )
{
- sample_volume = data & 0x1f; /* range 0-31 */
+ sample_volume = data & 0x1f; /* range 0-31 */
}
WRITE8_HANDLER( cclimber_sample_trigger_w )
diff --git a/src/mame/audio/cinemat.c b/src/mame/audio/cinemat.c
index e1114112e22..4c260906275 100644
--- a/src/mame/audio/cinemat.c
+++ b/src/mame/audio/cinemat.c
@@ -32,17 +32,17 @@
*
*************************************/
-#define RISING_EDGE(bit, changed, val) (((changed) & (bit)) && ((val) & (bit)))
-#define FALLING_EDGE(bit, changed, val) (((changed) & (bit)) && !((val) & (bit)))
+#define RISING_EDGE(bit, changed, val) (((changed) & (bit)) && ((val) & (bit)))
+#define FALLING_EDGE(bit, changed, val) (((changed) & (bit)) && !((val) & (bit)))
-#define SOUNDVAL_RISING_EDGE(bit) RISING_EDGE(bit, bits_changed, sound_val)
-#define SOUNDVAL_FALLING_EDGE(bit) FALLING_EDGE(bit, bits_changed, sound_val)
+#define SOUNDVAL_RISING_EDGE(bit) RISING_EDGE(bit, bits_changed, sound_val)
+#define SOUNDVAL_FALLING_EDGE(bit) FALLING_EDGE(bit, bits_changed, sound_val)
-#define SHIFTREG_RISING_EDGE(bit) RISING_EDGE(bit, (state->m_last_shift ^ state->m_current_shift), state->m_current_shift)
-#define SHIFTREG_FALLING_EDGE(bit) FALLING_EDGE(bit, (state->m_last_shift ^ state->m_current_shift), state->m_current_shift)
+#define SHIFTREG_RISING_EDGE(bit) RISING_EDGE(bit, (state->m_last_shift ^ state->m_current_shift), state->m_current_shift)
+#define SHIFTREG_FALLING_EDGE(bit) FALLING_EDGE(bit, (state->m_last_shift ^ state->m_current_shift), state->m_current_shift)
-#define SHIFTREG2_RISING_EDGE(bit) RISING_EDGE(bit, (state->m_last_shift2 ^ state->m_current_shift), state->m_current_shift)
-#define SHIFTREG2_FALLING_EDGE(bit) FALLING_EDGE(bit, (state->m_last_shift2 ^ state->m_current_shift), state->m_current_shift)
+#define SHIFTREG2_RISING_EDGE(bit) RISING_EDGE(bit, (state->m_last_shift2 ^ state->m_current_shift), state->m_current_shift)
+#define SHIFTREG2_FALLING_EDGE(bit) FALLING_EDGE(bit, (state->m_last_shift2 ^ state->m_current_shift), state->m_current_shift)
/*************************************
@@ -74,17 +74,17 @@ WRITE8_MEMBER(cinemat_state::cinemat_sound_control_w)
static SOUND_START( generic )
{
cinemat_state *state = machine.driver_data<cinemat_state>();
- /* register for save states */
- state_save_register_global(machine, state->m_sound_control);
- state_save_register_global(machine, state->m_current_shift);
- state_save_register_global(machine, state->m_last_shift);
- state_save_register_global(machine, state->m_last_shift2);
- state_save_register_global(machine, state->m_current_pitch);
- state_save_register_global(machine, state->m_last_frame);
- state_save_register_global_array(machine, state->m_sound_fifo);
- state_save_register_global(machine, state->m_sound_fifo_in);
- state_save_register_global(machine, state->m_sound_fifo_out);
- state_save_register_global(machine, state->m_last_portb_write);
+ /* register for save states */
+ state_save_register_global(machine, state->m_sound_control);
+ state_save_register_global(machine, state->m_current_shift);
+ state_save_register_global(machine, state->m_last_shift);
+ state_save_register_global(machine, state->m_last_shift2);
+ state_save_register_global(machine, state->m_current_pitch);
+ state_save_register_global(machine, state->m_last_frame);
+ state_save_register_global_array(machine, state->m_sound_fifo);
+ state_save_register_global(machine, state->m_sound_fifo_in);
+ state_save_register_global(machine, state->m_sound_fifo_out);
+ state_save_register_global(machine, state->m_last_portb_write);
}
@@ -99,15 +99,15 @@ static void generic_init(running_machine &machine, void (*callback)(running_mach
state->m_sound_control = 0x9f;
/* reset shift register values */
- state->m_current_shift = 0xffff;
- state->m_last_shift = 0xffff;
- state->m_last_shift2 = 0xffff;
+ state->m_current_shift = 0xffff;
+ state->m_last_shift = 0xffff;
+ state->m_last_shift2 = 0xffff;
/* reset frame counters */
- state->m_last_frame = 0;
+ state->m_last_frame = 0;
/* reset Star Castle pitch */
- state->m_current_pitch = 0x10000;
+ state->m_current_pitch = 0x10000;
}
@@ -129,7 +129,7 @@ static const char *const spacewar_sample_names[] =
"pop",
"explode2",
"fire2",
- 0
+ 0
};
static const samples_interface spacewar_samples_interface =
@@ -164,10 +164,10 @@ static void spacewar_sound_w(running_machine &machine, UINT8 sound_val, UINT8 bi
/* Mute - 0=off, 1=on */
if (SOUNDVAL_FALLING_EDGE(0x10))
- samples->start(2, 2, true); /* play idle sound */
+ samples->start(2, 2, true); /* play idle sound */
if (SOUNDVAL_RISING_EDGE(0x10))
{
- int i;
+ int i;
/* turn off all but the idle sound */
for (i = 0; i < 5; i++)
@@ -208,7 +208,7 @@ static const char *const barrier_sample_names[] =
"playrdie",
"playmove",
"enemmove",
- 0
+ 0
};
static const samples_interface barrier_samples_interface =
@@ -261,7 +261,7 @@ static const char *const speedfrk_sample_names[] =
{
"*speedfrk",
"offroad",
- NULL
+ NULL
};
static const samples_interface speedfrk_samples_interface =
@@ -291,8 +291,8 @@ static void speedfrk_sound_w(running_machine &machine, UINT8 sound_val, UINT8 bi
if (SOUNDVAL_FALLING_EDGE(0x10))
samples->stop(0);
- /* start LED is controlled by bit 0x02 */
- set_led_status(machine, 0, ~sound_val & 0x02);
+ /* start LED is controlled by bit 0x02 */
+ set_led_status(machine, 0, ~sound_val & 0x02);
}
static SOUND_RESET( speedfrk )
@@ -327,7 +327,7 @@ static const char *const starhawk_sample_names[] =
"k",
"master",
"kexit",
- NULL
+ NULL
};
static const samples_interface starhawk_samples_interface =
@@ -403,7 +403,7 @@ static const char *const sundance_sample_names[] =
"ping1",
"ping2",
"hatch",
- 0
+ 0
};
static const samples_interface sundance_samples_interface =
@@ -473,7 +473,7 @@ static const char *const tailg_sample_names[] =
"shield",
"bounce",
"hypersp",
- NULL
+ NULL
};
static const samples_interface tailg_samples_interface =
@@ -562,7 +562,7 @@ static const char *const warrior_sample_names[] =
"killed",
"fall",
"appear",
- NULL
+ NULL
};
static const samples_interface warrior_samples_interface =
@@ -626,14 +626,14 @@ MACHINE_CONFIG_END
static const char *const armora_sample_names[] =
{
"*armora",
- "loexp",
- "jeepfire",
+ "loexp",
+ "jeepfire",
"hiexp",
"tankfire",
"tankeng",
"beep",
"chopper",
- NULL
+ NULL
};
static const samples_interface armora_samples_interface =
@@ -725,7 +725,7 @@ static const char *const ripoff_sample_names[] =
"bonuslvl",
"eattack",
"shipfire",
- "efire",
+ "efire",
"explosn",
"bg1",
"bg2",
@@ -735,7 +735,7 @@ static const char *const ripoff_sample_names[] =
"bg6",
"bg7",
"bg8",
- NULL
+ NULL
};
static const samples_interface ripoff_samples_interface =
@@ -823,7 +823,7 @@ static const char *const starcas_sample_names[] =
"lexplode",
"sexplode",
"pfire",
- 0
+ 0
};
static const samples_interface starcas_samples_interface =
@@ -873,18 +873,18 @@ static void starcas_sound_w(running_machine &machine, UINT8 sound_val, UINT8 bit
/* latch the drone pitch */
target_pitch = (state->m_current_shift & 7) + ((state->m_current_shift & 2) << 2);
- target_pitch = 0x5800 + (target_pitch << 12);
-
- /* once per frame slide the pitch toward the target */
- if (machine.primary_screen->frame_number() > state->m_last_frame)
- {
- if (state->m_current_pitch > target_pitch)
- state->m_current_pitch -= 225;
- if (state->m_current_pitch < target_pitch)
- state->m_current_pitch += 150;
- samples->set_frequency(4, state->m_current_pitch);
- state->m_last_frame = machine.primary_screen->frame_number();
- }
+ target_pitch = 0x5800 + (target_pitch << 12);
+
+ /* once per frame slide the pitch toward the target */
+ if (machine.primary_screen->frame_number() > state->m_last_frame)
+ {
+ if (state->m_current_pitch > target_pitch)
+ state->m_current_pitch -= 225;
+ if (state->m_current_pitch < target_pitch)
+ state->m_current_pitch += 150;
+ samples->set_frequency(4, state->m_current_pitch);
+ state->m_last_frame = machine.primary_screen->frame_number();
+ }
/* remember the previous value */
state->m_last_shift = state->m_current_shift;
@@ -929,15 +929,15 @@ MACHINE_CONFIG_END
static const char *const solarq_sample_names[] =
{
"*solarq",
- "bigexpl",
+ "bigexpl",
"smexpl",
"lthrust",
"slaser",
"pickup",
"nuke2",
"nuke1",
- "music",
- NULL
+ "music",
+ NULL
};
static const samples_interface solarq_samples_interface =
@@ -980,18 +980,18 @@ static void solarq_sound_w(running_machine &machine, UINT8 sound_val, UINT8 bits
state->m_target_volume = 0;
/* ramp the thrust volume */
- if (samples->playing(2) && machine.primary_screen->frame_number() > state->m_last_frame)
- {
- if (state->m_current_volume > state->m_target_volume)
- state->m_current_volume -= 0.078f;
- if (state->m_current_volume < state->m_target_volume)
- state->m_current_volume += 0.078f;
- if (state->m_current_volume > 0)
- samples->set_volume(2, state->m_current_volume);
- else
- samples->stop(2);
- state->m_last_frame = machine.primary_screen->frame_number();
- }
+ if (samples->playing(2) && machine.primary_screen->frame_number() > state->m_last_frame)
+ {
+ if (state->m_current_volume > state->m_target_volume)
+ state->m_current_volume -= 0.078f;
+ if (state->m_current_volume < state->m_target_volume)
+ state->m_current_volume += 0.078f;
+ if (state->m_current_volume > 0)
+ samples->set_volume(2, state->m_current_volume);
+ else
+ samples->stop(2);
+ state->m_last_frame = machine.primary_screen->frame_number();
+ }
/* fire - falling edge */
if (SHIFTREG_FALLING_EDGE(0x10))
@@ -1036,7 +1036,7 @@ static void solarq_sound_w(running_machine &machine, UINT8 sound_val, UINT8 bits
/* remember the previous value */
state->m_last_shift2 = state->m_current_shift;
- }
+ }
}
static SOUND_RESET( solarq )
@@ -1065,19 +1065,19 @@ MACHINE_CONFIG_END
static const char *const boxingb_sample_names[] =
{
"*boxingb",
- "softexpl",
+ "softexpl",
"loudexpl",
"chirp",
"eggcrack",
"bugpusha",
"bugpushb",
"bugdie",
- "beetle",
- "music",
- "cannon",
- "bounce",
- "bell",
- NULL
+ "beetle",
+ "music",
+ "cannon",
+ "bounce",
+ "bell",
+ NULL
};
static const samples_interface boxingb_samples_interface =
@@ -1158,13 +1158,13 @@ static void boxingb_sound_w(running_machine &machine, UINT8 sound_val, UINT8 bit
vol = (~state->m_current_shift >> 12) & 3;
samples->set_volume(8, vol / 3.0);
- /* cannon - falling edge */
- if (SHIFTREG2_RISING_EDGE(0x4000))
- samples->start(9, 9);
+ /* cannon - falling edge */
+ if (SHIFTREG2_RISING_EDGE(0x4000))
+ samples->start(9, 9);
/* remember the previous value */
state->m_last_shift2 = state->m_current_shift;
- }
+ }
/* bounce - rising edge */
if (SOUNDVAL_RISING_EDGE(0x04))
@@ -1209,7 +1209,7 @@ static const char *const wotw_sample_names[] =
"lexplode",
"sexplode",
"pfire",
- 0
+ 0
};
static const samples_interface wotw_samples_interface =
@@ -1259,18 +1259,18 @@ static void wotw_sound_w(running_machine &machine, UINT8 sound_val, UINT8 bits_c
/* latch the drone pitch */
target_pitch = (state->m_current_shift & 7) + ((state->m_current_shift & 2) << 2);
- target_pitch = 0x10000 + (target_pitch << 12);
-
- /* once per frame slide the pitch toward the target */
- if (machine.primary_screen->frame_number() > state->m_last_frame)
- {
- if (state->m_current_pitch > target_pitch)
- state->m_current_pitch -= 300;
- if (state->m_current_pitch < target_pitch)
- state->m_current_pitch += 200;
- samples->set_frequency(4, state->m_current_pitch);
- state->m_last_frame = machine.primary_screen->frame_number();
- }
+ target_pitch = 0x10000 + (target_pitch << 12);
+
+ /* once per frame slide the pitch toward the target */
+ if (machine.primary_screen->frame_number() > state->m_last_frame)
+ {
+ if (state->m_current_pitch > target_pitch)
+ state->m_current_pitch -= 300;
+ if (state->m_current_pitch < target_pitch)
+ state->m_current_pitch += 200;
+ samples->set_frequency(4, state->m_current_pitch);
+ state->m_last_frame = machine.primary_screen->frame_number();
+ }
/* remember the previous value */
state->m_last_shift = state->m_current_shift;
@@ -1394,8 +1394,8 @@ static Z80CTC_INTERFACE( demon_z80ctc_interface )
{
DEVCB_CPU_INPUT_LINE("audiocpu", INPUT_LINE_IRQ0), /* interrupt handler */
DEVCB_NULL, /* ZC/TO0 callback */
- DEVCB_NULL, /* ZC/TO1 callback */
- DEVCB_NULL /* ZC/TO2 callback */
+ DEVCB_NULL, /* ZC/TO1 callback */
+ DEVCB_NULL /* ZC/TO2 callback */
};
diff --git a/src/mame/audio/circus.c b/src/mame/audio/circus.c
index fd37e080afd..dd07884e1d9 100644
--- a/src/mame/audio/circus.c
+++ b/src/mame/audio/circus.c
@@ -13,7 +13,7 @@ static const char *const circus_sample_names[] =
const samples_interface circus_samples_interface =
{
- 3, /* 3 channels */
+ 3, /* 3 channels */
circus_sample_names
};
@@ -26,7 +26,7 @@ static const char *const crash_sample_names[] =
const samples_interface crash_samples_interface =
{
- 1, /* 1 channel */
+ 1, /* 1 channel */
crash_sample_names
};
@@ -42,7 +42,7 @@ static const char *const ripcord_sample_names[] =
const samples_interface ripcord_samples_interface =
{
- 4, /* 4 channels */
+ 4, /* 4 channels */
ripcord_sample_names
};
@@ -59,14 +59,14 @@ static const char *const robotbwl_sample_names[] =
const samples_interface robotbwl_samples_interface =
{
- 5, /* 5 channels */
+ 5, /* 5 channels */
robotbwl_sample_names
};
/* Nodes - Inputs */
-#define CIRCUS_MUSIC_BIT NODE_01
+#define CIRCUS_MUSIC_BIT NODE_01
/* Nodes - Sounds */
-#define CIRCUS_MUSIC_SND NODE_10
+#define CIRCUS_MUSIC_SND NODE_10
DISCRETE_SOUND_START(circus)
/************************************************/
@@ -77,7 +77,7 @@ DISCRETE_SOUND_START(circus)
/************************************************/
/* Music is just a 1 bit DAC */
/************************************************/
- DISCRETE_CRFILTER(CIRCUS_MUSIC_SND, CIRCUS_MUSIC_BIT, RES_K(50), CAP_U(.1)) /* 50K is just an average value */
+ DISCRETE_CRFILTER(CIRCUS_MUSIC_SND, CIRCUS_MUSIC_BIT, RES_K(50), CAP_U(.1)) /* 50K is just an average value */
DISCRETE_OUTPUT(CIRCUS_MUSIC_SND, 1)
DISCRETE_SOUND_END
@@ -94,26 +94,26 @@ static const discrete_mixer_desc crash_mixer =
static const discrete_555_desc crash_beeper_555m =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC | DISC_555_TRIGGER_IS_LOGIC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_555_desc crash_beeper_555a =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
/* Nodes - Inputs */
-#define CRASH_MUSIC_BIT NODE_01
-#define CRASH_BEEPER_EN NODE_02
+#define CRASH_MUSIC_BIT NODE_01
+#define CRASH_BEEPER_EN NODE_02
/* Nodes - Adjusters */
-#define CRASH_R63 NODE_10
-#define CRASH_R39 NODE_11
+#define CRASH_R63 NODE_10
+#define CRASH_R39 NODE_11
/* Nodes - Sounds */
-#define CRASH_MUSIC_SND NODE_20
-#define CRASH_BEEPER_SND NODE_21
+#define CRASH_MUSIC_SND NODE_20
+#define CRASH_BEEPER_SND NODE_21
DISCRETE_SOUND_START(crash)
/************************************************/
@@ -146,9 +146,9 @@ DISCRETE_SOUND_START(crash)
DISCRETE_SOUND_END
/* Nodes - Inputs */
-#define ROBOTBWL_MUSIC_BIT NODE_01
+#define ROBOTBWL_MUSIC_BIT NODE_01
/* Nodes - Sounds */
-#define ROBOTBWL_MUSIC_SND NODE_10
+#define ROBOTBWL_MUSIC_SND NODE_10
DISCRETE_SOUND_START(robotbwl)
/************************************************/
@@ -179,8 +179,8 @@ WRITE8_MEMBER(circus_state::circus_clown_z_w)
/* Bits 4-6 enable/disable trigger different events */
switch (m_game_id)
{
- case 1: /* circus */
- case 4: /* ripcord */
+ case 1: /* circus */
+ case 4: /* ripcord */
switch ((data & 0x70) >> 4)
{
case 0 : /* All Off */
@@ -216,28 +216,28 @@ WRITE8_MEMBER(circus_state::circus_clown_z_w)
}
break;
- case 2: /* robotbwl */
- discrete_sound_w(m_discrete, space, ROBOTBWL_MUSIC_BIT, data & 0x08); /* Footsteps */
+ case 2: /* robotbwl */
+ discrete_sound_w(m_discrete, space, ROBOTBWL_MUSIC_BIT, data & 0x08); /* Footsteps */
- if (data & 0x40) /* Hit */
+ if (data & 0x40) /* Hit */
m_samples->start(0, 0);
- if (data & 0x20) /* Roll */
+ if (data & 0x20) /* Roll */
m_samples->start(1, 1);
- if (data & 0x10) /* Ball Drop */
+ if (data & 0x10) /* Ball Drop */
m_samples->start(2, 2);
- if (data & 0x02) /* Demerit */
+ if (data & 0x02) /* Demerit */
m_samples->start(3, 3);
- if (data & 0x01) /* Reward */
+ if (data & 0x01) /* Reward */
m_samples->start(4, 4);
// if (data & 0x04) /* Invert */
break;
- case 3: /* crash */
+ case 3: /* crash */
/* Only the crash can be done with a sample */
switch ((data & 0x70) >> 4)
{
diff --git a/src/mame/audio/cliffhgr.c b/src/mame/audio/cliffhgr.c
index 6be5869eda8..d7063ab1166 100644
--- a/src/mame/audio/cliffhgr.c
+++ b/src/mame/audio/cliffhgr.c
@@ -1,13 +1,13 @@
#include "emu.h"
#include "sound/discrete.h"
-#define CLIFF_ENABLE_SND_1 NODE_01
-#define CLIFF_ENABLE_SND_2 NODE_02
+#define CLIFF_ENABLE_SND_1 NODE_01
+#define CLIFF_ENABLE_SND_2 NODE_02
static const discrete_555_desc desc_cliffhgr_555 =
{
DISC_555_OUT_ENERGY | DISC_555_OUT_DC,
- 5, /* B+ voltage of 555 */
+ 5, /* B+ voltage of 555 */
DEFAULT_555_VALUES
};
diff --git a/src/mame/audio/copsnrob.c b/src/mame/audio/copsnrob.c
index 9bef723a5fd..7ded86937aa 100644
--- a/src/mame/audio/copsnrob.c
+++ b/src/mame/audio/copsnrob.c
@@ -8,111 +8,111 @@
/* Discrete Sound Input Nodes */
-#define COPSNROB_MOTOR0_INV NODE_01
-#define COPSNROB_MOTOR1_INV NODE_02
-#define COPSNROB_MOTOR2_INV NODE_03
-#define COPSNROB_MOTOR3_INV NODE_04
-#define COPSNROB_ZINGS_INV NODE_05
-#define COPSNROB_FIRES_INV NODE_06
-#define COPSNROB_CRASH_INV NODE_07
-#define COPSNROB_SCREECH_INV NODE_08
-#define COPSNROB_AUDIO_ENABLE NODE_09
+#define COPSNROB_MOTOR0_INV NODE_01
+#define COPSNROB_MOTOR1_INV NODE_02
+#define COPSNROB_MOTOR2_INV NODE_03
+#define COPSNROB_MOTOR3_INV NODE_04
+#define COPSNROB_ZINGS_INV NODE_05
+#define COPSNROB_FIRES_INV NODE_06
+#define COPSNROB_CRASH_INV NODE_07
+#define COPSNROB_SCREECH_INV NODE_08
+#define COPSNROB_AUDIO_ENABLE NODE_09
/* Discrete Sound Output Nodes */
-#define COPSNROB_MOTOR0_SND NODE_11
-#define COPSNROB_MOTOR1_SND NODE_12
-#define COPSNROB_MOTOR2_SND NODE_13
-#define COPSNROB_MOTOR3_SND NODE_14
-#define COPSNROB_FZ_SND NODE_15
-#define COPSNROB_CRASH_SND NODE_16
-#define COPSNROB_SCREECH_SND NODE_17
-#define COPSNROB_NOISE_1 NODE_18
-#define COPSNROB_NOISE_2 NODE_18_01
+#define COPSNROB_MOTOR0_SND NODE_11
+#define COPSNROB_MOTOR1_SND NODE_12
+#define COPSNROB_MOTOR2_SND NODE_13
+#define COPSNROB_MOTOR3_SND NODE_14
+#define COPSNROB_FZ_SND NODE_15
+#define COPSNROB_CRASH_SND NODE_16
+#define COPSNROB_SCREECH_SND NODE_17
+#define COPSNROB_NOISE_1 NODE_18
+#define COPSNROB_NOISE_2 NODE_18_01
/* Parts List - Resistors */
-#define COPSNROB_R16 RES_K(10)
-#define COPSNROB_R18 RES_K(100)
-#define COPSNROB_R19 RES_K(100)
-#define COPSNROB_R20 RES_K(100)
-#define COPSNROB_R21 RES_K(47)
-#define COPSNROB_R25 RES_K(47)
-#define COPSNROB_R26 RES_K(150)
-#define COPSNROB_R27 RES_K(22)
-#define COPSNROB_R28 RES_K(18)
-#define COPSNROB_R33 RES_K(10)
-#define COPSNROB_R35 RES_K(10)
-#define COPSNROB_R36 RES_K(15)
-#define COPSNROB_R37 RES_K(4.7)
-#define COPSNROB_R38 RES_K(15)
-#define COPSNROB_R39 RES_K(10)
-#define COPSNROB_R41 RES_K(33)
-#define COPSNROB_R42 RES_K(33)
-#define COPSNROB_R47 RES_K(10)
-#define COPSNROB_R48 RES_K(1)
-#define COPSNROB_R49 RES_K(47)
-#define COPSNROB_R50 RES_K(47)
-#define COPSNROB_R53 RES_K(47)
-#define COPSNROB_R54 RES_K(22)
-#define COPSNROB_R55 RES_K(47)
-#define COPSNROB_R56 RES_K(470)
-#define COPSNROB_R57 RES_K(820)
-#define COPSNROB_R58 RES_K(68)
-#define COPSNROB_R59 RES_K(1)
-#define COPSNROB_R64 RES_K(47)
-#define COPSNROB_R65 RES_K(4.7)
-#define COPSNROB_R66 RES_K(1.5)
-#define COPSNROB_R69 RES_K(330)
-#define COPSNROB_R70 RES_K(330)
-#define COPSNROB_R71 RES_K(100)
-#define COPSNROB_R72 RES_K(100)
-#define COPSNROB_R73 RES_K(47)
-#define COPSNROB_R74 RES_K(1)
-#define COPSNROB_R75 RES_K(1)
-#define COPSNROB_R76 RES_K(12)
-#define COPSNROB_R77 RES_K(33)
-#define COPSNROB_R78 RES_K(100)
-#define COPSNROB_R79 RES_K(2.2)
-#define COPSNROB_R80 RES_K(1)
-#define COPSNROB_R81 RES_K(8.2)
-#define COPSNROB_R82 RES_K(3.9)
-#define COPSNROB_R83 RES_K(27)
-#define COPSNROB_R84 RES_K(15)
-#define COPSNROB_R85 (330)
-#define COPSNROB_R86 RES_K(330)
-#define COPSNROB_R87 (820)
-#define COPSNROB_R88 RES_K(1)
-#define COPSNROB_R89 RES_K(1)
-#define COPSNROB_R92 RES_K(100)
-#define COPSNROB_R93 RES_K(100)
-#define COPSNROB_R94 RES_K(10)
+#define COPSNROB_R16 RES_K(10)
+#define COPSNROB_R18 RES_K(100)
+#define COPSNROB_R19 RES_K(100)
+#define COPSNROB_R20 RES_K(100)
+#define COPSNROB_R21 RES_K(47)
+#define COPSNROB_R25 RES_K(47)
+#define COPSNROB_R26 RES_K(150)
+#define COPSNROB_R27 RES_K(22)
+#define COPSNROB_R28 RES_K(18)
+#define COPSNROB_R33 RES_K(10)
+#define COPSNROB_R35 RES_K(10)
+#define COPSNROB_R36 RES_K(15)
+#define COPSNROB_R37 RES_K(4.7)
+#define COPSNROB_R38 RES_K(15)
+#define COPSNROB_R39 RES_K(10)
+#define COPSNROB_R41 RES_K(33)
+#define COPSNROB_R42 RES_K(33)
+#define COPSNROB_R47 RES_K(10)
+#define COPSNROB_R48 RES_K(1)
+#define COPSNROB_R49 RES_K(47)
+#define COPSNROB_R50 RES_K(47)
+#define COPSNROB_R53 RES_K(47)
+#define COPSNROB_R54 RES_K(22)
+#define COPSNROB_R55 RES_K(47)
+#define COPSNROB_R56 RES_K(470)
+#define COPSNROB_R57 RES_K(820)
+#define COPSNROB_R58 RES_K(68)
+#define COPSNROB_R59 RES_K(1)
+#define COPSNROB_R64 RES_K(47)
+#define COPSNROB_R65 RES_K(4.7)
+#define COPSNROB_R66 RES_K(1.5)
+#define COPSNROB_R69 RES_K(330)
+#define COPSNROB_R70 RES_K(330)
+#define COPSNROB_R71 RES_K(100)
+#define COPSNROB_R72 RES_K(100)
+#define COPSNROB_R73 RES_K(47)
+#define COPSNROB_R74 RES_K(1)
+#define COPSNROB_R75 RES_K(1)
+#define COPSNROB_R76 RES_K(12)
+#define COPSNROB_R77 RES_K(33)
+#define COPSNROB_R78 RES_K(100)
+#define COPSNROB_R79 RES_K(2.2)
+#define COPSNROB_R80 RES_K(1)
+#define COPSNROB_R81 RES_K(8.2)
+#define COPSNROB_R82 RES_K(3.9)
+#define COPSNROB_R83 RES_K(27)
+#define COPSNROB_R84 RES_K(15)
+#define COPSNROB_R85 (330)
+#define COPSNROB_R86 RES_K(330)
+#define COPSNROB_R87 (820)
+#define COPSNROB_R88 RES_K(1)
+#define COPSNROB_R89 RES_K(1)
+#define COPSNROB_R92 RES_K(100)
+#define COPSNROB_R93 RES_K(100)
+#define COPSNROB_R94 RES_K(10)
/* Parts List - Capacitors */
-#define COPSNROB_C3 CAP_U(100)
-#define COPSNROB_C12 CAP_U(0.1)
-#define COPSNROB_C13 CAP_U(0.1)
-#define COPSNROB_C17 CAP_U(0.001)
-#define COPSNROB_C19 CAP_U(10)
-#define COPSNROB_C20 CAP_U(0.01)
-#define COPSNROB_C23 CAP_U(0.1)
-#define COPSNROB_C24 CAP_U(0.22)
-#define COPSNROB_C28 CAP_U(1)
-#define COPSNROB_C30 CAP_U(0.01)
-#define COPSNROB_C31 CAP_U(0.1)
-#define COPSNROB_C32 CAP_U(5)
-#define COPSNROB_C33 CAP_U(10)
-#define COPSNROB_C36 CAP_U(100)
-#define COPSNROB_C39 CAP_U(0.1)
-#define COPSNROB_C37 CAP_U(0.1)
-#define COPSNROB_C40 CAP_U(0.1)
-#define COPSNROB_C41 CAP_U(0.03)
-#define COPSNROB_C42 CAP_U(0.047)
-#define COPSNROB_C43 CAP_U(0.047)
-#define COPSNROB_C55 CAP_U(0.1)
-#define COPSNROB_C58 CAP_U(0.1)
-#define COPSNROB_C59 CAP_U(0.1)
+#define COPSNROB_C3 CAP_U(100)
+#define COPSNROB_C12 CAP_U(0.1)
+#define COPSNROB_C13 CAP_U(0.1)
+#define COPSNROB_C17 CAP_U(0.001)
+#define COPSNROB_C19 CAP_U(10)
+#define COPSNROB_C20 CAP_U(0.01)
+#define COPSNROB_C23 CAP_U(0.1)
+#define COPSNROB_C24 CAP_U(0.22)
+#define COPSNROB_C28 CAP_U(1)
+#define COPSNROB_C30 CAP_U(0.01)
+#define COPSNROB_C31 CAP_U(0.1)
+#define COPSNROB_C32 CAP_U(5)
+#define COPSNROB_C33 CAP_U(10)
+#define COPSNROB_C36 CAP_U(100)
+#define COPSNROB_C39 CAP_U(0.1)
+#define COPSNROB_C37 CAP_U(0.1)
+#define COPSNROB_C40 CAP_U(0.1)
+#define COPSNROB_C41 CAP_U(0.03)
+#define COPSNROB_C42 CAP_U(0.047)
+#define COPSNROB_C43 CAP_U(0.047)
+#define COPSNROB_C55 CAP_U(0.1)
+#define COPSNROB_C58 CAP_U(0.1)
+#define COPSNROB_C59 CAP_U(0.1)
/* Timing values */
-#define COPSNROB_2V (15750/2/2) /* has to be verified */
+#define COPSNROB_2V (15750/2/2) /* has to be verified */
static const discrete_555_desc copsnrob_motor23_555_1 =
@@ -129,100 +129,100 @@ static const discrete_555_desc copsnrob_motor23_555_2 =
static const discrete_op_amp_filt_info copsnrob_motor23_filter =
{
- COPSNROB_R28, 0, COPSNROB_R87, 0, COPSNROB_R86, /* r1, r2, r3, r4, rF */
- COPSNROB_C42, COPSNROB_C43, 0, /* c1, c2, c3 */
- 5.0 * RES_VOLTAGE_DIVIDER(COPSNROB_R88, COPSNROB_R89), 5, 0 /* vRef, vP, vN */
+ COPSNROB_R28, 0, COPSNROB_R87, 0, COPSNROB_R86, /* r1, r2, r3, r4, rF */
+ COPSNROB_C42, COPSNROB_C43, 0, /* c1, c2, c3 */
+ 5.0 * RES_VOLTAGE_DIVIDER(COPSNROB_R88, COPSNROB_R89), 5, 0 /* vRef, vP, vN */
};
static const discrete_dac_r1_ladder copsnrob_crash_dac =
{
- 4, /* ladderLength */
+ 4, /* ladderLength */
{COPSNROB_R81, COPSNROB_R82, COPSNROB_R79, COPSNROB_R80},
- 0, 0, 0, COPSNROB_C58 /* vBias, rBias, rGnd, cFilter */
+ 0, 0, 0, COPSNROB_C58 /* vBias, rBias, rGnd, cFilter */
};
static const discrete_mixer_desc copsnrob_final_mixer01 =
{
DISC_MIXER_IS_RESISTOR,
{COPSNROB_R21, COPSNROB_R25, COPSNROB_R33, COPSNROB_R70, COPSNROB_R71},
- {0}, {0}, 0, COPSNROB_R35, 0, COPSNROB_C59, /* r_node{}, c{}, rI, rF, cF, cAmp */
- 0, 1 /* vRef, gain */
+ {0}, {0}, 0, COPSNROB_R35, 0, COPSNROB_C59, /* r_node{}, c{}, rI, rF, cF, cAmp */
+ 0, 1 /* vRef, gain */
};
static const discrete_dac_r1_ladder copsnrob_motor01_cc_dac =
{
- 1, /* ladderLength */
+ 1, /* ladderLength */
{COPSNROB_R56},
- 5.0 - 0.5, COPSNROB_R58, COPSNROB_R57, COPSNROB_C33 /* vBias; rBias; rGnd; cFilter */
+ 5.0 - 0.5, COPSNROB_R58, COPSNROB_R57, COPSNROB_C33 /* vBias; rBias; rGnd; cFilter */
};
static const discrete_dac_r1_ladder copsnrob_motor01_out_dac =
{
- 4, /* ladderLength */
+ 4, /* ladderLength */
{COPSNROB_R20, COPSNROB_R18, 0, COPSNROB_R19},
- 0, 0, 0, COPSNROB_C12 /* vBias; rBias; rGnd; cFilter */
+ 0, 0, 0, COPSNROB_C12 /* vBias; rBias; rGnd; cFilter */
};
static const discrete_mixer_desc copsnrob_final_mixer23 =
{
DISC_MIXER_IS_RESISTOR,
{COPSNROB_R93, COPSNROB_R92, COPSNROB_R72, COPSNROB_R69, COPSNROB_R16},
- {0}, {0}, 0, COPSNROB_R94, 0, COPSNROB_C55, /* r_node{}, c{}, rI, rF, cF, cAmp */
- 0, 1 /* vRef, gain */
+ {0}, {0}, 0, COPSNROB_R94, 0, COPSNROB_C55, /* r_node{}, c{}, rI, rF, cF, cAmp */
+ 0, 1 /* vRef, gain */
};
static const discrete_dac_r1_ladder copsnrob_motor23_cv_dac =
{
- 1, /* ladderLength */
+ 1, /* ladderLength */
{COPSNROB_R65},
- 5, RES_K(5), RES_K(10), COPSNROB_C36 /* vBias; rBias; rGnd; cFilter */
+ 5, RES_K(5), RES_K(10), COPSNROB_C36 /* vBias; rBias; rGnd; cFilter */
};
static const discrete_555_cc_desc copsnrob_motor01_555cc =
{
DISC_555_OUT_COUNT_R | DISCRETE_555_CC_TO_DISCHARGE_PIN,
- 5, /* v_pos */
+ 5, /* v_pos */
DEFAULT_555_CC_SOURCE,
- 1, /* v_out_high - ignored */
- 0.6 /* v_cc_junction */
+ 1, /* v_out_high - ignored */
+ 0.6 /* v_cc_junction */
};
-#define COPSNROB_MOTOR01_BASE_NODE NODE_20
-#define COPSNROB_MOTOR23_BASE_NODE NODE_30
-#define COPSNROB_NODE(_base, _num, _offset) NODE_RELATIVE(_base, _num * 100 + _offset)
-#define COPSNROB_MOTOR01_NODE(_num, _offset) COPSNROB_NODE(COPSNROB_MOTOR01_BASE_NODE, _num, _offset)
-#define COPSNROB_MOTOR23_NODE(_num, _offset) COPSNROB_NODE(COPSNROB_MOTOR23_BASE_NODE, _num, _offset)
+#define COPSNROB_MOTOR01_BASE_NODE NODE_20
+#define COPSNROB_MOTOR23_BASE_NODE NODE_30
+#define COPSNROB_NODE(_base, _num, _offset) NODE_RELATIVE(_base, _num * 100 + _offset)
+#define COPSNROB_MOTOR01_NODE(_num, _offset) COPSNROB_NODE(COPSNROB_MOTOR01_BASE_NODE, _num, _offset)
+#define COPSNROB_MOTOR23_NODE(_num, _offset) COPSNROB_NODE(COPSNROB_MOTOR23_BASE_NODE, _num, _offset)
/************************************************
* MOTOR0/1 Definition Start
************************************************/
-#define COPSNROB_MOTOR01(_output, _input, _num) \
- /* simulate the RC connected to the transistor with a DAC */ \
- DISCRETE_DAC_R1(COPSNROB_MOTOR01_NODE(_num, 0), \
- _input, 4.2, &copsnrob_motor01_cc_dac) /* DATA; VDATA - TTL with light load */ \
- DISCRETE_555_CC(COPSNROB_MOTOR01_NODE(_num, 1), /* IC F2, pin 10 from IC F3, pin 9 */ \
- 1, /* RESET - IC F3, pin 10 */ \
- COPSNROB_MOTOR01_NODE(_num, 0), /* VIN */ \
- COPSNROB_R53, COPSNROB_C20, 0, 0, COPSNROB_R39, /* R; C; RBIAS; RGND; RDIS */ \
- &copsnrob_motor01_555cc) \
- /* IC D2, pin 12 and IC E3, pin 5 make a /4 counter */ \
- DISCRETE_COUNTER(COPSNROB_MOTOR01_NODE(_num, 2), /* IC E3, pin 5 */ \
- 1, 0, /* ENAB; RESET */ \
- COPSNROB_MOTOR01_NODE(_num, 1), /* IC D2, pin 1 */ \
- 0, 3, DISC_COUNT_UP, 0, DISC_CLK_BY_COUNT) /* MIN; MAX; DIR; INIT0; CLKTYPE */ \
- DISCRETE_COUNTER_7492(COPSNROB_MOTOR01_NODE(_num, 3), /* IC E3, pins 11, 9, & 8 */\
- 1, 0, /* ENAB; RESET */ \
- COPSNROB_MOTOR01_NODE(_num, 1), /* IC E3, pin 14 */ \
- DISC_CLK_BY_COUNT) /* CLKTYPE */ \
- DISCRETE_TRANSFORM3(COPSNROB_MOTOR01_NODE(_num, 4), \
- COPSNROB_MOTOR01_NODE(_num, 2), /* INP0 */ \
- COPSNROB_MOTOR01_NODE(_num, 3), 2, /* INP1, INP2 */ \
- "02&2/12*+") /* get bits ready for DAC */\
- DISCRETE_DAC_R1(_output, \
- COPSNROB_MOTOR01_NODE(_num, 4), 4.2, &copsnrob_motor01_out_dac) /* DATA; VDATA - TTL with light load */
+#define COPSNROB_MOTOR01(_output, _input, _num) \
+ /* simulate the RC connected to the transistor with a DAC */ \
+ DISCRETE_DAC_R1(COPSNROB_MOTOR01_NODE(_num, 0), \
+ _input, 4.2, &copsnrob_motor01_cc_dac) /* DATA; VDATA - TTL with light load */ \
+ DISCRETE_555_CC(COPSNROB_MOTOR01_NODE(_num, 1), /* IC F2, pin 10 from IC F3, pin 9 */ \
+ 1, /* RESET - IC F3, pin 10 */ \
+ COPSNROB_MOTOR01_NODE(_num, 0), /* VIN */ \
+ COPSNROB_R53, COPSNROB_C20, 0, 0, COPSNROB_R39, /* R; C; RBIAS; RGND; RDIS */ \
+ &copsnrob_motor01_555cc) \
+ /* IC D2, pin 12 and IC E3, pin 5 make a /4 counter */ \
+ DISCRETE_COUNTER(COPSNROB_MOTOR01_NODE(_num, 2), /* IC E3, pin 5 */ \
+ 1, 0, /* ENAB; RESET */ \
+ COPSNROB_MOTOR01_NODE(_num, 1), /* IC D2, pin 1 */ \
+ 0, 3, DISC_COUNT_UP, 0, DISC_CLK_BY_COUNT) /* MIN; MAX; DIR; INIT0; CLKTYPE */ \
+ DISCRETE_COUNTER_7492(COPSNROB_MOTOR01_NODE(_num, 3), /* IC E3, pins 11, 9, & 8 */\
+ 1, 0, /* ENAB; RESET */ \
+ COPSNROB_MOTOR01_NODE(_num, 1), /* IC E3, pin 14 */ \
+ DISC_CLK_BY_COUNT) /* CLKTYPE */ \
+ DISCRETE_TRANSFORM3(COPSNROB_MOTOR01_NODE(_num, 4), \
+ COPSNROB_MOTOR01_NODE(_num, 2), /* INP0 */ \
+ COPSNROB_MOTOR01_NODE(_num, 3), 2, /* INP1, INP2 */ \
+ "02&2/12*+") /* get bits ready for DAC */\
+ DISCRETE_DAC_R1(_output, \
+ COPSNROB_MOTOR01_NODE(_num, 4), 4.2, &copsnrob_motor01_out_dac) /* DATA; VDATA - TTL with light load */
/************************************************
* MOTOR0/1 Definition Start
@@ -232,27 +232,27 @@ static const discrete_555_cc_desc copsnrob_motor01_555cc =
/************************************************
* MOTOR2/3 Definition Start
************************************************/
-#define COPSNROB_MOTOR23(_output, _input, _num) \
- /* simulate the RC connected to the 555 CV pin with a DAC */ \
- DISCRETE_DAC_R1(COPSNROB_MOTOR23_NODE(_num, 0), \
- _input, 4.2, &copsnrob_motor23_cv_dac) /* DATA; VDATA - TTL with light load */ \
- DISCRETE_555_ASTABLE_CV(COPSNROB_MOTOR23_NODE(_num, 1), /* IC J2, pin 5 */ \
- 1, /* RESET */ \
- COPSNROB_R64, COPSNROB_R42, COPSNROB_C24, \
- COPSNROB_MOTOR23_NODE(_num, 0), /* CTRLV - IC J2, pin 3 */ \
- &copsnrob_motor23_555_1) \
- DISCRETE_CRFILTER_VREF(COPSNROB_MOTOR23_NODE(_num, 2), \
- COPSNROB_MOTOR23_NODE(_num, 1), /* IN0 */ \
- RES_3_PARALLEL(COPSNROB_R27, RES_K(10), RES_K(5)), COPSNROB_C17, /* R is in parallel with 555 internal R */ \
- 5.0 * RES_VOLTAGE_DIVIDER(RES_2_PARALLEL(COPSNROB_R27, RES_K(10)), RES_K(5))) /* VREF */ \
- DISCRETE_555_MSTABLE(COPSNROB_MOTOR23_NODE(_num, 3), /* IC J3, pin 9 */ \
- 1, /* RESET */ \
- COPSNROB_MOTOR23_NODE(_num, 2), /* IC J3, pin 8 */ \
- COPSNROB_R41, COPSNROB_C23, \
- &copsnrob_motor23_555_2) \
- DISCRETE_OP_AMP_FILTER(_output, /* IC L4, pin 7 */ \
- 1, /* ENAB */ \
- COPSNROB_MOTOR23_NODE(_num, 3), 0, /* INP0; INP1 */ \
+#define COPSNROB_MOTOR23(_output, _input, _num) \
+ /* simulate the RC connected to the 555 CV pin with a DAC */ \
+ DISCRETE_DAC_R1(COPSNROB_MOTOR23_NODE(_num, 0), \
+ _input, 4.2, &copsnrob_motor23_cv_dac) /* DATA; VDATA - TTL with light load */ \
+ DISCRETE_555_ASTABLE_CV(COPSNROB_MOTOR23_NODE(_num, 1), /* IC J2, pin 5 */ \
+ 1, /* RESET */ \
+ COPSNROB_R64, COPSNROB_R42, COPSNROB_C24, \
+ COPSNROB_MOTOR23_NODE(_num, 0), /* CTRLV - IC J2, pin 3 */ \
+ &copsnrob_motor23_555_1) \
+ DISCRETE_CRFILTER_VREF(COPSNROB_MOTOR23_NODE(_num, 2), \
+ COPSNROB_MOTOR23_NODE(_num, 1), /* IN0 */ \
+ RES_3_PARALLEL(COPSNROB_R27, RES_K(10), RES_K(5)), COPSNROB_C17, /* R is in parallel with 555 internal R */ \
+ 5.0 * RES_VOLTAGE_DIVIDER(RES_2_PARALLEL(COPSNROB_R27, RES_K(10)), RES_K(5))) /* VREF */ \
+ DISCRETE_555_MSTABLE(COPSNROB_MOTOR23_NODE(_num, 3), /* IC J3, pin 9 */ \
+ 1, /* RESET */ \
+ COPSNROB_MOTOR23_NODE(_num, 2), /* IC J3, pin 8 */ \
+ COPSNROB_R41, COPSNROB_C23, \
+ &copsnrob_motor23_555_2) \
+ DISCRETE_OP_AMP_FILTER(_output, /* IC L4, pin 7 */ \
+ 1, /* ENAB */ \
+ COPSNROB_MOTOR23_NODE(_num, 3), 0, /* INP0; INP1 */ \
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &copsnrob_motor23_filter)
/************************************************
* MOTOR2/3 Definition End
@@ -263,36 +263,36 @@ static const discrete_555_cc_desc copsnrob_motor01_555cc =
* CUSTOM_NOISE Definition Start
* - output is energy
************************************************/
-#define COPSNROB_CUSTOM_NOISE__FREQ DISCRETE_INPUT(0)
+#define COPSNROB_CUSTOM_NOISE__FREQ DISCRETE_INPUT(0)
DISCRETE_CLASS_STEP_RESET(copsnrob_custom_noise, 2,
- int m_flip_flop;
- int m_noise1_had_xtime;
- int m_noise2_had_xtime;
- UINT8 m_high_byte;
- UINT8 m_low_byte;
- double m_t_used;
- double m_t1;
+ int m_flip_flop;
+ int m_noise1_had_xtime;
+ int m_noise2_had_xtime;
+ UINT8 m_high_byte;
+ UINT8 m_low_byte;
+ double m_t_used;
+ double m_t1;
);
-#define COPSNROB_CUSTOM_NOISE_HIGH 4.2
+#define COPSNROB_CUSTOM_NOISE_HIGH 4.2
DISCRETE_STEP(copsnrob_custom_noise)
{
- double t_used = m_t_used;
- double t1 = m_t1;
- double x_time = 0;
- UINT8 low_byte = m_low_byte;
- UINT8 high_byte = m_high_byte;
- UINT8 xnor_out; /* IC F2, pin 2 */
- int last_noise1_bit = (low_byte >> 4) & 0x01;
- int last_noise2_bit = (low_byte >> 5) & 0x01;
+ double t_used = m_t_used;
+ double t1 = m_t1;
+ double x_time = 0;
+ UINT8 low_byte = m_low_byte;
+ UINT8 high_byte = m_high_byte;
+ UINT8 xnor_out; /* IC F2, pin 2 */
+ int last_noise1_bit = (low_byte >> 4) & 0x01;
+ int last_noise2_bit = (low_byte >> 5) & 0x01;
t_used += this->sample_time();
/* This clock will never run faster then the sample rate,
- * so we do not bother to check.
- */
+ * so we do not bother to check.
+ */
if (t_used > t1)
{
/* calculate the overshoot time */
@@ -307,7 +307,7 @@ DISCRETE_STEP(copsnrob_custom_noise)
xnor_out = (((low_byte >> 6) & 0x01) ^ (high_byte & 0x01)) ^ 0x01;
low_byte = (low_byte << 1) | ((high_byte >> 7) & 0x01);
high_byte = (high_byte << 1) | xnor_out;
- if (high_byte == 0xff) /* IC H1, pin 8 */
+ if (high_byte == 0xff) /* IC H1, pin 8 */
high_byte = 0;
m_low_byte = low_byte;
m_high_byte = high_byte;
@@ -367,33 +367,33 @@ DISCRETE_RESET(copsnrob_custom_noise)
* CUSTOM_ZINGS_555_MONOSTABLE Definition Start
* - output is energy
************************************************/
-#define COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__TRIG DISCRETE_INPUT(0)
-#define COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__R DISCRETE_INPUT(1)
-#define COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__C DISCRETE_INPUT(2)
+#define COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__TRIG DISCRETE_INPUT(0)
+#define COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__R DISCRETE_INPUT(1)
+#define COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__C DISCRETE_INPUT(2)
DISCRETE_CLASS_STEP_RESET(copsnrob_zings_555_monostable, 1,
- double m_rc;
- double m_exponent;
- double m_v_cap;
- int m_flip_flop;
+ double m_rc;
+ double m_exponent;
+ double m_v_cap;
+ int m_flip_flop;
);
DISCRETE_STEP(copsnrob_zings_555_monostable)
{
const double v_threshold = 5.0 * 2 / 3;
- const double v_out_high = 5.0 - 0.5; /* light load */
+ const double v_out_high = 5.0 - 0.5; /* light load */
- int ff_set = COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__TRIG < (5.0 / 3) ? 1 : 0;
- int flip_flop = m_flip_flop;
- double v_cap = m_v_cap;
- double x_time = 0;
+ int ff_set = COPSNROB_CUSTOM_ZINGS_555_MONOSTABLE__TRIG < (5.0 / 3) ? 1 : 0;
+ int flip_flop = m_flip_flop;
+ double v_cap = m_v_cap;
+ double x_time = 0;
/* From testing a real IC */
/* Trigger going low overides everything. It forces the FF/Output high.
- * If Threshold is high, the output will still go high as long as trigger is low.
- * The output will then go low when trigger rises above it's 1/3VCC value.
- * If threshold is below it's 2/3VCC value, the output will remain high.
- */
+ * If Threshold is high, the output will still go high as long as trigger is low.
+ * The output will then go low when trigger rises above it's 1/3VCC value.
+ * If threshold is below it's 2/3VCC value, the output will remain high.
+ */
if (ff_set)
{
flip_flop = 1;
@@ -402,7 +402,7 @@ DISCRETE_STEP(copsnrob_zings_555_monostable)
if (flip_flop)
{
- double v_diff = v_out_high - v_cap;
+ double v_diff = v_out_high - v_cap;
/* charge */
v_cap += v_diff * m_exponent;
@@ -460,33 +460,33 @@ DISCRETE_RESET(copsnrob_zings_555_monostable)
* CUSTOM_ZINGS_555_ASTABLE Definition Start
* - output is energy
************************************************/
-#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__RESET DISCRETE_INPUT(0)
-#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__R1 DISCRETE_INPUT(1)
-#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__R2 DISCRETE_INPUT(2)
-#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__C1 DISCRETE_INPUT(3)
-#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__C2 DISCRETE_INPUT(4)
+#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__RESET DISCRETE_INPUT(0)
+#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__R1 DISCRETE_INPUT(1)
+#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__R2 DISCRETE_INPUT(2)
+#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__C1 DISCRETE_INPUT(3)
+#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__C2 DISCRETE_INPUT(4)
-#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__HIGH 4.5
+#define COPSNROB_CUSTOM_ZINGS_555_ASTABLE__HIGH 4.5
DISCRETE_CLASS_STEP_RESET(copsnrob_zings_555_astable, 1,
- double m_r2c2;
- double m_r_total_cv;
- double m_exponent1;
- double m_exponent2;
- double m_v_cap1;
- double m_v_cap2;
- int m_flip_flop;
+ double m_r2c2;
+ double m_r_total_cv;
+ double m_exponent1;
+ double m_exponent2;
+ double m_v_cap1;
+ double m_v_cap2;
+ int m_flip_flop;
);
DISCRETE_STEP(copsnrob_zings_555_astable)
{
- double v_trigger, v_threshold;
- double v1 = COPSNROB_CUSTOM_ZINGS_555_ASTABLE__RESET;
- double v_cap1 = m_v_cap1;
- double v_cap2 = m_v_cap2;
- double dt = 0;
- int reset_active = (v1 < 0.7) ? 1 : 0;
- int flip_flop = m_flip_flop;
+ double v_trigger, v_threshold;
+ double v1 = COPSNROB_CUSTOM_ZINGS_555_ASTABLE__RESET;
+ double v_cap1 = m_v_cap1;
+ double v_cap2 = m_v_cap2;
+ double dt = 0;
+ int reset_active = (v1 < 0.7) ? 1 : 0;
+ int flip_flop = m_flip_flop;
/* calculate voltage at CV pin */
/* start by adding currents */
@@ -527,9 +527,9 @@ DISCRETE_STEP(copsnrob_zings_555_astable)
v_trigger = v_cap1 / 3;
/* This oscillator will never create a frequency greater then 1/2 the sample rate,
- * so we won't worry about missing samples */
+ * so we won't worry about missing samples */
/* No need to optimize the charge circuit. It always charges/discharges to a voltage
- * greater then it will ever reach. */
+ * greater then it will ever reach. */
if (flip_flop)
{
/* charge */
@@ -579,7 +579,7 @@ DISCRETE_RESET(copsnrob_zings_555_astable)
m_exponent2 = RC_CHARGE_EXP(m_r2c2);
m_v_cap1 = 0;
m_flip_flop = 0;
- m_v_cap2 = 0.0; /* charge on C2 */
+ m_v_cap2 = 0.0; /* charge on C2 */
}
@@ -591,8 +591,8 @@ DISCRETE_RESET(copsnrob_zings_555_astable)
DISCRETE_SOUND_START(copsnrob)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(COPSNROB_MOTOR0_INV)
DISCRETE_INPUT_LOGIC(COPSNROB_MOTOR1_INV)
DISCRETE_INPUT_LOGIC(COPSNROB_MOTOR2_INV)
@@ -600,89 +600,89 @@ DISCRETE_SOUND_START(copsnrob)
/* !! DISABLED UNTIL ADDRESS IS FOUND !! */
// DISCRETE_INPUTX_LOGIC(COPSNROB_ZINGS_INV, 4, 0, 0)
// DISCRETE_INPUT_LOGIC(COPSNROB_FIRES_INV)
- DISCRETE_INPUT_NOT(COPSNROB_CRASH_INV) /* inverted for counter use */
+ DISCRETE_INPUT_NOT(COPSNROB_CRASH_INV) /* inverted for counter use */
DISCRETE_INPUT_LOGIC(COPSNROB_SCREECH_INV)
- DISCRETE_INPUT_NOT(COPSNROB_AUDIO_ENABLE) /* IC A1, pins 2 & 12 */
+ DISCRETE_INPUT_NOT(COPSNROB_AUDIO_ENABLE) /* IC A1, pins 2 & 12 */
/* These inputs are disabled until their address triggers are determined.
* Then these constants can be removed.
*/
- DISCRETE_CONSTANT(COPSNROB_ZINGS_INV, 4) /* data bit will be normally high, when it goes low it triggers the one-shot which has a minimum on time of 0.2s */
- DISCRETE_CONSTANT(COPSNROB_FIRES_INV, 4) /* data bit will be normally high */
+ DISCRETE_CONSTANT(COPSNROB_ZINGS_INV, 4) /* data bit will be normally high, when it goes low it triggers the one-shot which has a minimum on time of 0.2s */
+ DISCRETE_CONSTANT(COPSNROB_FIRES_INV, 4) /* data bit will be normally high */
/************************************************
- * MOTOR0/1
- ************************************************/
+ * MOTOR0/1
+ ************************************************/
COPSNROB_MOTOR01(COPSNROB_MOTOR0_SND, COPSNROB_MOTOR0_INV, 0)
COPSNROB_MOTOR01(COPSNROB_MOTOR1_SND, COPSNROB_MOTOR1_INV, 1)
/************************************************
- * MOTOR2/3
- ************************************************/
+ * MOTOR2/3
+ ************************************************/
COPSNROB_MOTOR23(COPSNROB_MOTOR2_SND, COPSNROB_MOTOR2_INV, 0)
COPSNROB_MOTOR23(COPSNROB_MOTOR3_SND, COPSNROB_MOTOR3_INV, 1)
/************************************************
- * CRASH
- ************************************************/
- DISCRETE_CUSTOM1(COPSNROB_NOISE_1, copsnrob_custom_noise, /* IC J2, pin 10 */
- COPSNROB_2V, /* CLK */
+ * CRASH
+ ************************************************/
+ DISCRETE_CUSTOM1(COPSNROB_NOISE_1, copsnrob_custom_noise, /* IC J2, pin 10 */
+ COPSNROB_2V, /* CLK */
NULL)
/* COPSNROB_NOISE_2 derived from sub out of above custom module - IC J2, pin 11 */
/* We use the measured 555 timer frequency (IC M3) for speed */
- DISCRETE_COUNTER(NODE_40, /* IC L2 */
- NODE_41, /* ENAB - IC L2, pin 14 */
- COPSNROB_CRASH_INV, /* RESET - IC L2, pin 11 */
- 92, /* IC L2, pin 4 - freq measured */
- 0, 15, DISC_COUNT_DOWN, 15, DISC_CLK_IS_FREQ) /* MIN; MAX; DIR; INIT0; CLKTYPE */
- DISCRETE_TRANSFORM2(NODE_41, /* IC M2, pin 3 - goes high at count 0 */
- NODE_40, 0, "01=!") /* -we will invert it for use by the counter module */
- DISCRETE_SWITCH(NODE_42, /* IC L3 */
- 1, COPSNROB_NOISE_2, 0, NODE_40) /* ENAB; SWITCH; INP0; INP1 */
+ DISCRETE_COUNTER(NODE_40, /* IC L2 */
+ NODE_41, /* ENAB - IC L2, pin 14 */
+ COPSNROB_CRASH_INV, /* RESET - IC L2, pin 11 */
+ 92, /* IC L2, pin 4 - freq measured */
+ 0, 15, DISC_COUNT_DOWN, 15, DISC_CLK_IS_FREQ) /* MIN; MAX; DIR; INIT0; CLKTYPE */
+ DISCRETE_TRANSFORM2(NODE_41, /* IC M2, pin 3 - goes high at count 0 */
+ NODE_40, 0, "01=!") /* -we will invert it for use by the counter module */
+ DISCRETE_SWITCH(NODE_42, /* IC L3 */
+ 1, COPSNROB_NOISE_2, 0, NODE_40) /* ENAB; SWITCH; INP0; INP1 */
DISCRETE_DAC_R1(COPSNROB_CRASH_SND,
- NODE_42, 3.8, /* DATA; VDATA */
+ NODE_42, 3.8, /* DATA; VDATA */
&copsnrob_crash_dac)
/************************************************
- * SCREECH
- ************************************************/
- DISCRETE_CONSTANT(COPSNROB_SCREECH_SND, 0)
+ * SCREECH
+ ************************************************/
+ DISCRETE_CONSTANT(COPSNROB_SCREECH_SND, 0)
/************************************************
- * FZ (Fires, Zings)
- ************************************************/
- DISCRETE_CUSTOM3(NODE_60, copsnrob_zings_555_monostable, /* IC D3, pin 5 */
+ * FZ (Fires, Zings)
+ ************************************************/
+ DISCRETE_CUSTOM3(NODE_60, copsnrob_zings_555_monostable, /* IC D3, pin 5 */
/* We can ignore R47 & R48 */
- COPSNROB_ZINGS_INV, /* IC D3, pin 6 */
+ COPSNROB_ZINGS_INV, /* IC D3, pin 6 */
COPSNROB_R38, COPSNROB_C19,
NULL)
- DISCRETE_CUSTOM5(NODE_61, copsnrob_zings_555_astable, /* IC D3, pin 8 & 12 */
- NODE_60, /* IC D3, pin 10 */
+ DISCRETE_CUSTOM5(NODE_61, copsnrob_zings_555_astable, /* IC D3, pin 8 & 12 */
+ NODE_60, /* IC D3, pin 10 */
COPSNROB_R36, COPSNROB_R37,
COPSNROB_C3, COPSNROB_C13,
NULL)
/* FIX - do a better implemetation of IC L4 */
- DISCRETE_CRFILTER_VREF(NODE_62, /* IC L4, pin 9 */
- NODE_61, /* IN0 */
+ DISCRETE_CRFILTER_VREF(NODE_62, /* IC L4, pin 9 */
+ NODE_61, /* IN0 */
COPSNROB_R26, COPSNROB_C39,
- 5.0 * RES_VOLTAGE_DIVIDER(COPSNROB_R74, COPSNROB_R75)) /* VREF */
- DISCRETE_GAIN(COPSNROB_FZ_SND, /* IC L4, pin 8 */
+ 5.0 * RES_VOLTAGE_DIVIDER(COPSNROB_R74, COPSNROB_R75)) /* VREF */
+ DISCRETE_GAIN(COPSNROB_FZ_SND, /* IC L4, pin 8 */
NODE_62,
COPSNROB_R73 / COPSNROB_R26)
/************************************************
- * MIXER
- ************************************************/
- DISCRETE_MIXER5(NODE_90, /* IC B3, pin 3 */
- COPSNROB_AUDIO_ENABLE, /* ENAB */
+ * MIXER
+ ************************************************/
+ DISCRETE_MIXER5(NODE_90, /* IC B3, pin 3 */
+ COPSNROB_AUDIO_ENABLE, /* ENAB */
COPSNROB_MOTOR1_SND, COPSNROB_MOTOR0_SND, COPSNROB_FZ_SND, COPSNROB_SCREECH_SND, COPSNROB_CRASH_SND,
&copsnrob_final_mixer01)
- DISCRETE_MIXER5(NODE_91, /* IC P3, pin 3 */
- COPSNROB_AUDIO_ENABLE, /* ENAB */
+ DISCRETE_MIXER5(NODE_91, /* IC P3, pin 3 */
+ COPSNROB_AUDIO_ENABLE, /* ENAB */
COPSNROB_MOTOR3_SND, COPSNROB_MOTOR2_SND, COPSNROB_CRASH_SND, COPSNROB_SCREECH_SND, COPSNROB_FZ_SND,
&copsnrob_final_mixer23)
- DISCRETE_OUTPUT(NODE_90, 32767.0*3.5)
- DISCRETE_OUTPUT(NODE_91, 32767.0*3.5)
+ DISCRETE_OUTPUT(NODE_90, 32767.0*3.5)
+ DISCRETE_OUTPUT(NODE_91, 32767.0*3.5)
DISCRETE_SOUND_END
diff --git a/src/mame/audio/cps3.c b/src/mame/audio/cps3.c
index 38b8b4396f5..6515abad135 100644
--- a/src/mame/audio/cps3.c
+++ b/src/mame/audio/cps3.c
@@ -6,7 +6,7 @@
#include "emu.h"
#include "includes/cps3.h"
-#define CPS3_VOICES 16
+#define CPS3_VOICES 16
struct cps3_voice
{
@@ -20,7 +20,7 @@ struct cps3_sound_state
sound_stream *m_stream;
cps3_voice m_voice[CPS3_VOICES];
UINT16 m_key;
- INT8* m_base;
+ INT8* m_base;
};
INLINE cps3_sound_state *get_safe_token(device_t *device)
@@ -173,7 +173,7 @@ const device_type CPS3 = &device_creator<cps3_sound_device>;
cps3_sound_device::cps3_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, CPS3, "CPS3 Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(cps3_sound_state);
}
@@ -206,5 +206,3 @@ void cps3_sound_device::sound_stream_update(sound_stream &stream, stream_sample_
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/crbaloon.c b/src/mame/audio/crbaloon.c
index f5397435557..04dfd18f0e6 100644
--- a/src/mame/audio/crbaloon.c
+++ b/src/mame/audio/crbaloon.c
@@ -13,20 +13,20 @@
/* timing sources */
-#define CRBALOON_16H (CRBALOON_MASTER_XTAL/2/2/16)
+#define CRBALOON_16H (CRBALOON_MASTER_XTAL/2/2/16)
/* enables */
-#define CRBALOON_LAUGH_EN NODE_01
-#define CRBALOON_MUSIC_EN NODE_02
-#define CRBALOON_MUSIC_DATA NODE_03
+#define CRBALOON_LAUGH_EN NODE_01
+#define CRBALOON_MUSIC_EN NODE_02
+#define CRBALOON_MUSIC_DATA NODE_03
/* nodes - adjusters */
-#define CRBALOON_VR2 NODE_05
-#define CRBALOON_VR3 NODE_06
+#define CRBALOON_VR2 NODE_05
+#define CRBALOON_VR3 NODE_06
/* nodes - sounds */
-#define CRBALOON_LAUGH_SND NODE_80
-#define CRBALOON_MUSIC_SND NODE_81
+#define CRBALOON_LAUGH_SND NODE_80
+#define CRBALOON_MUSIC_SND NODE_81
@@ -51,8 +51,8 @@ void crbaloon_audio_set_explosion_enable(device_t *sn, int enabled)
void crbaloon_audio_set_breath_enable(device_t *sn, int enabled)
{
/* changes slf_res to 10k (middle of two 10k resistors)
- it also puts a tantal capacitor against GND on the output,
- but this section of the schematics is not readable. */
+ it also puts a tantal capacitor against GND on the output,
+ but this section of the schematics is not readable. */
sn76477_slf_res_w(sn, enabled ? RES_K(10) : RES_K(20) );
}
@@ -74,7 +74,7 @@ WRITE8_MEMBER(crbaloon_state::crbaloon_audio_set_laugh_enable)
static const discrete_555_desc desc_crbaloon_laugh_osc =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
@@ -91,8 +91,8 @@ static const discrete_dac_r1_ladder desc_crbaloon_music_dac =
static DISCRETE_SOUND_START(crbaloon)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(CRBALOON_LAUGH_EN)
DISCRETE_INPUT_LOGIC(CRBALOON_MUSIC_EN)
DISCRETE_INPUT_DATA (CRBALOON_MUSIC_DATA)
@@ -101,9 +101,9 @@ static DISCRETE_SOUND_START(crbaloon)
DISCRETE_ADJUSTMENT(CRBALOON_VR3, 0, 1, DISC_LINADJ, "VR3")
/************************************************
- * Laugh is a VCO modulated by a constant
- * square wave.
- ************************************************/
+ * Laugh is a VCO modulated by a constant
+ * square wave.
+ ************************************************/
DISCRETE_555_ASTABLE(NODE_10, 1, RES_K(10), RES_K(100), CAP_U(1), &desc_crbaloon_laugh_osc)
DISCRETE_CRFILTER_VREF(NODE_11, NODE_10,
1.0/(1.0/RES_K(5) + 1.0/RES_K(10) + 1.0/RES_K(100)), // 5k & 10k are 555 internal
@@ -115,9 +115,9 @@ static DISCRETE_SOUND_START(crbaloon)
DISCRETE_CRFILTER(CRBALOON_LAUGH_SND, NODE_13, RES_K(20), CAP_U(1))
/************************************************
- * Music Generator is amplitude modulated by a
- * linear ramp.
- ************************************************/
+ * Music Generator is amplitude modulated by a
+ * linear ramp.
+ ************************************************/
/* TO BE FIXED - needs proper modulation */
DISCRETE_NOTE(NODE_20, 1, CRBALOON_16H / 2, CRBALOON_MUSIC_DATA, 255, 7, DISC_CLK_IS_FREQ)
DISCRETE_DAC_R1(NODE_21, NODE_20, DEFAULT_TTL_V_LOGIC_1, &desc_crbaloon_music_dac)
@@ -127,8 +127,8 @@ static DISCRETE_SOUND_START(crbaloon)
DISCRETE_CRFILTER(CRBALOON_MUSIC_SND, NODE_23, RES_K(50), CAP_U(1))
/************************************************
- * Final mix and output.
- ************************************************/
+ * Final mix and output.
+ ************************************************/
DISCRETE_ADDER2(NODE_90, 1, CRBALOON_LAUGH_SND, CRBALOON_MUSIC_SND)
DISCRETE_CRFILTER(NODE_91, NODE_90, RES_K(100), CAP_U(1))
@@ -140,29 +140,29 @@ DISCRETE_SOUND_END
static const sn76477_interface crbaloon_sn76477_interface =
{
- RES_K( 47), /* 4 noise_res */
- RES_K(330), /* 5 filter_res */
- CAP_P(470), /* 6 filter_cap */
- RES_K(220), /* 7 decay_res */
- CAP_U(1.0), /* 8 attack_decay_cap */
- RES_K(4.7), /* 10 attack_res */
- RES_M( 1), /* 11 amplitude_res */
- RES_K(200), /* 12 feedback_res */
- 5.0, /* 16 vco_voltage */
- CAP_P(470), /* 17 vco_cap */
- RES_K(330), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K( 20), /* 20 slf_res (variable) */
- CAP_P(420), /* 21 slf_cap */
- CAP_U(1.0), /* 23 oneshot_cap */
- RES_K( 47), /* 24 oneshot_res */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B (variable) */
- 1, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 0 /* 9 enable (variable) */
+ RES_K( 47), /* 4 noise_res */
+ RES_K(330), /* 5 filter_res */
+ CAP_P(470), /* 6 filter_cap */
+ RES_K(220), /* 7 decay_res */
+ CAP_U(1.0), /* 8 attack_decay_cap */
+ RES_K(4.7), /* 10 attack_res */
+ RES_M( 1), /* 11 amplitude_res */
+ RES_K(200), /* 12 feedback_res */
+ 5.0, /* 16 vco_voltage */
+ CAP_P(470), /* 17 vco_cap */
+ RES_K(330), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K( 20), /* 20 slf_res (variable) */
+ CAP_P(420), /* 21 slf_cap */
+ CAP_U(1.0), /* 23 oneshot_cap */
+ RES_K( 47), /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B (variable) */
+ 1, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 0 /* 9 enable (variable) */
};
diff --git a/src/mame/audio/dcs.c b/src/mame/audio/dcs.c
index d2f4a7add30..cc71ea8baf3 100644
--- a/src/mame/audio/dcs.c
+++ b/src/mame/audio/dcs.c
@@ -156,11 +156,11 @@
#include "machine/midwayic.h"
-#define LOG_DCS_TRANSFERS (0)
-#define LOG_DCS_IO (0)
-#define LOG_BUFFER_FILLING (0)
+#define LOG_DCS_TRANSFERS (0)
+#define LOG_DCS_IO (0)
+#define LOG_BUFFER_FILLING (0)
-#define ENABLE_HLE_TRANSFERS (1)
+#define ENABLE_HLE_TRANSFERS (1)
@@ -170,91 +170,91 @@
*
*************************************/
-#define LCTRL_OUTPUT_EMPTY 0x400
-#define LCTRL_INPUT_EMPTY 0x800
+#define LCTRL_OUTPUT_EMPTY 0x400
+#define LCTRL_INPUT_EMPTY 0x800
-#define IS_OUTPUT_EMPTY() (dcs.latch_control & LCTRL_OUTPUT_EMPTY)
-#define IS_OUTPUT_FULL() (!(dcs.latch_control & LCTRL_OUTPUT_EMPTY))
-#define SET_OUTPUT_EMPTY() (dcs.latch_control |= LCTRL_OUTPUT_EMPTY)
-#define SET_OUTPUT_FULL() (dcs.latch_control &= ~LCTRL_OUTPUT_EMPTY)
+#define IS_OUTPUT_EMPTY() (dcs.latch_control & LCTRL_OUTPUT_EMPTY)
+#define IS_OUTPUT_FULL() (!(dcs.latch_control & LCTRL_OUTPUT_EMPTY))
+#define SET_OUTPUT_EMPTY() (dcs.latch_control |= LCTRL_OUTPUT_EMPTY)
+#define SET_OUTPUT_FULL() (dcs.latch_control &= ~LCTRL_OUTPUT_EMPTY)
-#define IS_INPUT_EMPTY() (dcs.latch_control & LCTRL_INPUT_EMPTY)
-#define IS_INPUT_FULL() (!(dcs.latch_control & LCTRL_INPUT_EMPTY))
-#define SET_INPUT_EMPTY() (dcs.latch_control |= LCTRL_INPUT_EMPTY)
-#define SET_INPUT_FULL() (dcs.latch_control &= ~LCTRL_INPUT_EMPTY)
+#define IS_INPUT_EMPTY() (dcs.latch_control & LCTRL_INPUT_EMPTY)
+#define IS_INPUT_FULL() (!(dcs.latch_control & LCTRL_INPUT_EMPTY))
+#define SET_INPUT_EMPTY() (dcs.latch_control |= LCTRL_INPUT_EMPTY)
+#define SET_INPUT_FULL() (dcs.latch_control &= ~LCTRL_INPUT_EMPTY)
/* These are the some of the control register, we dont use them all */
enum
{
- IDMA_CONTROL_REG = 0, /* 3fe0 */
- BDMA_INT_ADDR_REG, /* 3fe1 */
- BDMA_EXT_ADDR_REG, /* 3fe2 */
- BDMA_CONTROL_REG, /* 3fe3 */
- BDMA_WORD_COUNT_REG, /* 3fe4 */
- PROG_FLAG_DATA_REG, /* 3fe5 */
- PROG_FLAG_CONTROL_REG, /* 3fe6 */
-
- S1_AUTOBUF_REG = 15, /* 3fef */
- S1_RFSDIV_REG, /* 3ff0 */
- S1_SCLKDIV_REG, /* 3ff1 */
- S1_CONTROL_REG, /* 3ff2 */
- S0_AUTOBUF_REG, /* 3ff3 */
- S0_RFSDIV_REG, /* 3ff4 */
- S0_SCLKDIV_REG, /* 3ff5 */
- S0_CONTROL_REG, /* 3ff6 */
- S0_MCTXLO_REG, /* 3ff7 */
- S0_MCTXHI_REG, /* 3ff8 */
- S0_MCRXLO_REG, /* 3ff9 */
- S0_MCRXHI_REG, /* 3ffa */
- TIMER_SCALE_REG, /* 3ffb */
- TIMER_COUNT_REG, /* 3ffc */
- TIMER_PERIOD_REG, /* 3ffd */
- WAITSTATES_REG, /* 3ffe */
- SYSCONTROL_REG /* 3fff */
+ IDMA_CONTROL_REG = 0, /* 3fe0 */
+ BDMA_INT_ADDR_REG, /* 3fe1 */
+ BDMA_EXT_ADDR_REG, /* 3fe2 */
+ BDMA_CONTROL_REG, /* 3fe3 */
+ BDMA_WORD_COUNT_REG, /* 3fe4 */
+ PROG_FLAG_DATA_REG, /* 3fe5 */
+ PROG_FLAG_CONTROL_REG, /* 3fe6 */
+
+ S1_AUTOBUF_REG = 15, /* 3fef */
+ S1_RFSDIV_REG, /* 3ff0 */
+ S1_SCLKDIV_REG, /* 3ff1 */
+ S1_CONTROL_REG, /* 3ff2 */
+ S0_AUTOBUF_REG, /* 3ff3 */
+ S0_RFSDIV_REG, /* 3ff4 */
+ S0_SCLKDIV_REG, /* 3ff5 */
+ S0_CONTROL_REG, /* 3ff6 */
+ S0_MCTXLO_REG, /* 3ff7 */
+ S0_MCTXHI_REG, /* 3ff8 */
+ S0_MCRXLO_REG, /* 3ff9 */
+ S0_MCRXHI_REG, /* 3ffa */
+ TIMER_SCALE_REG, /* 3ffb */
+ TIMER_COUNT_REG, /* 3ffc */
+ TIMER_PERIOD_REG, /* 3ffd */
+ WAITSTATES_REG, /* 3ffe */
+ SYSCONTROL_REG /* 3fff */
};
/* these macros are used to reference the SDRC ASIC */
-#define SDRC_ROM_ST ((dcs.sdrc.reg[0] >> 0) & 3) /* 0=0000, 1=3000, 2=3400, 3=none */
-#define SDRC_ROM_SZ ((dcs.sdrc.reg[0] >> 4) & 1) /* 0=4k, 1=1k */
-#define SDRC_ROM_MS ((dcs.sdrc.reg[0] >> 5) & 1) /* 0=/BMS, 1=/DMS */
-#define SDRC_ROM_PG ((dcs.sdrc.reg[0] >> 7) & 7)
-#define SDRC_SM_EN ((dcs.sdrc.reg[0] >> 11) & 1)
-#define SDRC_SM_BK ((dcs.sdrc.reg[0] >> 12) & 1)
-#define SDRC_SMODE ((dcs.sdrc.reg[0] >> 13) & 7)
-
-#define SDRC_DM_ST ((dcs.sdrc.reg[1] >> 0) & 3) /* 0=none, 1=0000, 2=3000, 3=3400 */
-#define SDRC_DM_REF ((dcs.sdrc.reg[1] >> 4) & 3)
-#define SDRC_DM_3WS ((dcs.sdrc.reg[1] >> 7) & 1)
-#define SDRC_TFS_INV ((dcs.sdrc.reg[1] >> 8) & 1)
-#define SDRC_RES_TFS ((dcs.sdrc.reg[1] >> 10) & 3)
-#define SDRC_LED ((dcs.sdrc.reg[1] >> 13) & 1)
-#define SDRC_MUTE ((dcs.sdrc.reg[1] >> 14) & 1)
-#define SDRC_AREF_ACT ((dcs.sdrc.reg[1] >> 15) & 1)
-
-#define SDRC_DM_PG ((dcs.sdrc.reg[2] >> 0) & 0x7ff)
-#define SDRC_EPM_PG ((dcs.sdrc.reg[2] >> 0) & 0x1fff)
+#define SDRC_ROM_ST ((dcs.sdrc.reg[0] >> 0) & 3) /* 0=0000, 1=3000, 2=3400, 3=none */
+#define SDRC_ROM_SZ ((dcs.sdrc.reg[0] >> 4) & 1) /* 0=4k, 1=1k */
+#define SDRC_ROM_MS ((dcs.sdrc.reg[0] >> 5) & 1) /* 0=/BMS, 1=/DMS */
+#define SDRC_ROM_PG ((dcs.sdrc.reg[0] >> 7) & 7)
+#define SDRC_SM_EN ((dcs.sdrc.reg[0] >> 11) & 1)
+#define SDRC_SM_BK ((dcs.sdrc.reg[0] >> 12) & 1)
+#define SDRC_SMODE ((dcs.sdrc.reg[0] >> 13) & 7)
+
+#define SDRC_DM_ST ((dcs.sdrc.reg[1] >> 0) & 3) /* 0=none, 1=0000, 2=3000, 3=3400 */
+#define SDRC_DM_REF ((dcs.sdrc.reg[1] >> 4) & 3)
+#define SDRC_DM_3WS ((dcs.sdrc.reg[1] >> 7) & 1)
+#define SDRC_TFS_INV ((dcs.sdrc.reg[1] >> 8) & 1)
+#define SDRC_RES_TFS ((dcs.sdrc.reg[1] >> 10) & 3)
+#define SDRC_LED ((dcs.sdrc.reg[1] >> 13) & 1)
+#define SDRC_MUTE ((dcs.sdrc.reg[1] >> 14) & 1)
+#define SDRC_AREF_ACT ((dcs.sdrc.reg[1] >> 15) & 1)
+
+#define SDRC_DM_PG ((dcs.sdrc.reg[2] >> 0) & 0x7ff)
+#define SDRC_EPM_PG ((dcs.sdrc.reg[2] >> 0) & 0x1fff)
/* these macros are used to reference the DSIO ASIC */
-#define DSIO_EMPTY_FIFO ((dcs.dsio.reg[1] >> 0) & 1)
-#define DSIO_CUR_OUTPUT ((dcs.dsio.reg[1] >> 4) & 1)
-#define DSIO_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1)
-#define DSIO_LED ((dcs.dsio.reg[1] >> 13) & 1)
-#define DSIO_MUTE ((dcs.dsio.reg[1] >> 14) & 1)
+#define DSIO_EMPTY_FIFO ((dcs.dsio.reg[1] >> 0) & 1)
+#define DSIO_CUR_OUTPUT ((dcs.dsio.reg[1] >> 4) & 1)
+#define DSIO_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1)
+#define DSIO_LED ((dcs.dsio.reg[1] >> 13) & 1)
+#define DSIO_MUTE ((dcs.dsio.reg[1] >> 14) & 1)
-#define DSIO_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff)
+#define DSIO_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff)
/* these macros are used to reference the DENVER ASIC */
-#define DENV_DSP_SPEED ((dcs.dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
-#define DENV_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1)
-#define DENV_CHANNELS ((dcs.dsio.reg[1] >> 11) & 3) /* 0=2ch, 1=4ch, 2=6ch */
-#define DENV_LED ((dcs.dsio.reg[1] >> 13) & 1)
-#define DENV_MUTE ((dcs.dsio.reg[1] >> 14) & 1)
+#define DENV_DSP_SPEED ((dcs.dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
+#define DENV_RES_TFS ((dcs.dsio.reg[1] >> 10) & 1)
+#define DENV_CHANNELS ((dcs.dsio.reg[1] >> 11) & 3) /* 0=2ch, 1=4ch, 2=6ch */
+#define DENV_LED ((dcs.dsio.reg[1] >> 13) & 1)
+#define DENV_MUTE ((dcs.dsio.reg[1] >> 14) & 1)
-#define DENV_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff)
+#define DENV_DM_PG ((dcs.dsio.reg[2] >> 0) & 0x7ff)
@@ -266,31 +266,31 @@ enum
struct sdrc_state
{
- UINT16 reg[4];
- UINT8 seed;
+ UINT16 reg[4];
+ UINT8 seed;
};
struct dsio_state
{
- UINT16 reg[4];
- UINT8 start_on_next_write;
- UINT16 channelbits;
+ UINT16 reg[4];
+ UINT8 start_on_next_write;
+ UINT16 channelbits;
};
struct hle_transfer_state
{
- UINT8 hle_enabled;
- INT32 dcs_state;
- INT32 state;
- INT32 start;
- INT32 stop;
- INT32 type;
- INT32 temp;
- INT32 writes_left;
- UINT16 sum;
- INT32 fifo_entries;
+ UINT8 hle_enabled;
+ INT32 dcs_state;
+ INT32 state;
+ INT32 start;
+ INT32 stop;
+ INT32 type;
+ INT32 temp;
+ INT32 writes_left;
+ UINT16 sum;
+ INT32 fifo_entries;
timer_device *watchdog;
};
@@ -300,53 +300,53 @@ struct dcs_state
adsp21xx_device *cpu;
address_space *program;
address_space *data;
- UINT8 rev;
- offs_t polling_offset;
- UINT32 polling_count;
+ UINT8 rev;
+ offs_t polling_offset;
+ UINT32 polling_count;
/* sound output */
- UINT8 channels;
- UINT16 size;
- UINT16 incs;
+ UINT8 channels;
+ UINT16 size;
+ UINT16 incs;
dmadac_sound_device *dmadac[6];
timer_device *reg_timer;
timer_device *sport_timer;
timer_device *internal_timer;
- INT32 ireg;
- UINT16 ireg_base;
- UINT16 control_regs[32];
+ INT32 ireg;
+ UINT16 ireg_base;
+ UINT16 control_regs[32];
/* memory access/booting */
- UINT16 * bootrom;
- UINT32 bootrom_words;
- UINT16 * sounddata;
- UINT32 sounddata_words;
- UINT32 sounddata_banks;
- UINT16 sounddata_bank;
+ UINT16 * bootrom;
+ UINT32 bootrom_words;
+ UINT16 * sounddata;
+ UINT32 sounddata_words;
+ UINT32 sounddata_banks;
+ UINT16 sounddata_bank;
/* I/O with the host */
- UINT8 auto_ack;
- UINT16 latch_control;
- UINT16 input_data;
- UINT16 output_data;
- UINT16 output_control;
- UINT64 output_control_cycles;
- UINT8 last_output_full;
- UINT8 last_input_empty;
- UINT16 progflags;
- void (*output_full_cb)(running_machine &, int);
- void (*input_empty_cb)(running_machine &, int);
- UINT16 (*fifo_data_r)(device_t *device);
- UINT16 (*fifo_status_r)(device_t *device);
+ UINT8 auto_ack;
+ UINT16 latch_control;
+ UINT16 input_data;
+ UINT16 output_data;
+ UINT16 output_control;
+ UINT64 output_control_cycles;
+ UINT8 last_output_full;
+ UINT8 last_input_empty;
+ UINT16 progflags;
+ void (*output_full_cb)(running_machine &, int);
+ void (*input_empty_cb)(running_machine &, int);
+ UINT16 (*fifo_data_r)(device_t *device);
+ UINT16 (*fifo_status_r)(device_t *device);
/* timers */
- UINT8 timer_enable;
- UINT8 timer_ignore;
- UINT64 timer_start_cycles;
- UINT32 timer_start_count;
- UINT32 timer_scale;
- UINT32 timer_period;
- UINT32 timers_fired;
+ UINT8 timer_enable;
+ UINT8 timer_ignore;
+ UINT64 timer_start_cycles;
+ UINT32 timer_start_count;
+ UINT32 timer_scale;
+ UINT32 timer_period;
+ UINT32 timers_fired;
UINT16 *sram;
UINT16 *polling_base;
@@ -449,9 +449,9 @@ static ADDRESS_MAP_START( dcs_2k_uart_data_map, AS_DATA, 16, driver_device )
AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_READWRITE_LEGACY(dcs_dataram_r, dcs_dataram_w)
AM_RANGE(0x2000, 0x2fff) AM_ROMBANK("databank")
AM_RANGE(0x3000, 0x33ff) AM_WRITE_LEGACY(dcs_data_bank_select_w)
- AM_RANGE(0x3400, 0x3402) AM_NOP /* UART (ignored) */
+ AM_RANGE(0x3400, 0x3402) AM_NOP /* UART (ignored) */
AM_RANGE(0x3403, 0x3403) AM_READWRITE_LEGACY(input_latch_r, output_latch_w)
- AM_RANGE(0x3404, 0x3405) AM_NOP /* UART (ignored) */
+ AM_RANGE(0x3404, 0x3405) AM_NOP /* UART (ignored) */
AM_RANGE(0x3800, 0x39ff) AM_RAM
AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE_LEGACY(adsp_control_r, adsp_control_w)
ADDRESS_MAP_END
@@ -483,12 +483,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs2_2115_program_map, AS_PROGRAM, 32, driver_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint")
+ AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
static ADDRESS_MAP_START( dcs2_2104_program_map, AS_PROGRAM, 32, driver_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x01ff) AM_RAM AM_SHARE("dcsint")
+ AM_RANGE(0x0000, 0x01ff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
@@ -526,7 +526,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dsio_program_map, AS_PROGRAM, 32, driver_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint")
+ AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
@@ -558,7 +558,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( denver_program_map, AS_PROGRAM, 32, driver_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint")
+ AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("dcsint")
ADDRESS_MAP_END
@@ -590,9 +590,9 @@ ADDRESS_MAP_END
static const adsp21xx_config adsp_config =
{
- NULL, /* callback for serial receive */
- sound_tx_callback, /* callback for serial transmit */
- timer_enable_callback /* callback for timer fired */
+ NULL, /* callback for serial receive */
+ sound_tx_callback, /* callback for serial transmit */
+ timer_enable_callback /* callback for timer fired */
};
@@ -1204,35 +1204,35 @@ static READ16_HANDLER( sdrc_r )
switch (SDRC_SMODE)
{
default:
- case 0: /* no-op */
+ case 0: /* no-op */
result = 0x5a81;
break;
- case 1: /* write seed */
+ case 1: /* write seed */
result = 0x5aa4;
break;
- case 2: /* read data */
+ case 2: /* read data */
result = 0x5a00 | ((sdrc.seed & 0x3f) << 1);
break;
- case 3: /* shift left */
+ case 3: /* shift left */
result = 0x5ab9;
break;
- case 4: /* add */
+ case 4: /* add */
result = 0x5a03;
break;
- case 5: /* xor */
+ case 5: /* xor */
result = 0x5a69;
break;
- case 6: /* prg */
+ case 6: /* prg */
result = 0x5a20;
break;
- case 7: /* invert */
+ case 7: /* invert */
result = 0x5aff;
break;
}
@@ -1277,31 +1277,31 @@ static WRITE16_HANDLER( sdrc_w )
case 3:
switch (SDRC_SMODE)
{
- case 0: /* no-op */
- case 2: /* read data */
+ case 0: /* no-op */
+ case 2: /* read data */
break;
- case 1: /* write seed */
+ case 1: /* write seed */
sdrc.seed = data & 0xff;
break;
- case 3: /* shift left */
+ case 3: /* shift left */
sdrc.seed = (sdrc.seed << 1) | 1;
break;
- case 4: /* add */
+ case 4: /* add */
sdrc.seed += sdrc.seed >> 1;
break;
- case 5: /* xor */
+ case 5: /* xor */
sdrc.seed ^= (sdrc.seed << 1) | 1;
break;
- case 6: /* prg */
+ case 6: /* prg */
sdrc.seed = (((sdrc.seed << 7) ^ (sdrc.seed << 5) ^ (sdrc.seed << 4) ^ (sdrc.seed << 3)) & 0x80) | (sdrc.seed >> 1);
break;
- case 7: /* invert */
+ case 7: /* invert */
sdrc.seed = ~sdrc.seed;
break;
}
@@ -1784,11 +1784,11 @@ static void reset_timer(running_machine &machine)
{
/* Road Burners: @ 28: JMP $0032 18032F, same code at $32 */
- if (dcs.program->read_dword(0x18*4) == 0x0c0030 && /* ENA SEC_REG */
- dcs.program->read_dword(0x19*4) == 0x804828 && /* SI = DM($0482) */
- dcs.program->read_dword(0x1a*4) == 0x904828 && /* DM($0482) = SI */
- dcs.program->read_dword(0x1b*4) == 0x0C0020 && /* DIS SEC_REG */
- dcs.program->read_dword(0x1c*4) == 0x0A001F) /* RTI */
+ if (dcs.program->read_dword(0x18*4) == 0x0c0030 && /* ENA SEC_REG */
+ dcs.program->read_dword(0x19*4) == 0x804828 && /* SI = DM($0482) */
+ dcs.program->read_dword(0x1a*4) == 0x904828 && /* DM($0482) = SI */
+ dcs.program->read_dword(0x1b*4) == 0x0C0020 && /* DIS SEC_REG */
+ dcs.program->read_dword(0x1c*4) == 0x0A001F) /* RTI */
{
dcs.timer_ignore = TRUE;
}
@@ -2029,8 +2029,8 @@ static void sound_tx_callback(adsp21xx_device &device, int port, INT32 data)
if (dcs.control_regs[S1_AUTOBUF_REG] & 0x0002) /* bit 1 */
{
/* get the autobuffer registers */
- int mreg, lreg;
- UINT16 source;
+ int mreg, lreg;
+ UINT16 source;
dcs.ireg = (dcs.control_regs[S1_AUTOBUF_REG] >> 9) & 7;
mreg = (dcs.control_regs[S1_AUTOBUF_REG] >> 7) & 3;
diff --git a/src/mame/audio/decobsmt.c b/src/mame/audio/decobsmt.c
index aa6e8a5918e..c5673bb7024 100644
--- a/src/mame/audio/decobsmt.c
+++ b/src/mame/audio/decobsmt.c
@@ -10,8 +10,8 @@
#include "emu.h"
#include "audio/decobsmt.h"
-#define M6809_TAG "soundcpu"
-#define BSMT_TAG "bsmt"
+#define M6809_TAG "soundcpu"
+#define BSMT_TAG "bsmt"
static ADDRESS_MAP_START( decobsmt_map, AS_PROGRAM, 8, decobsmt_device )
AM_RANGE(0x0000, 0x1fff) AM_RAM
@@ -39,11 +39,11 @@ static void bsmt_ready_callback(bsmt2000_device &device)
}
MACHINE_CONFIG_FRAGMENT( decobsmt )
- MCFG_CPU_ADD(M6809_TAG, M6809, (3579580/2))
+ MCFG_CPU_ADD(M6809_TAG, M6809, (3579580/2))
MCFG_CPU_PROGRAM_MAP(decobsmt_map)
MCFG_CPU_PERIODIC_INT(decobsmt_firq_interrupt, 489) /* Fixed FIRQ of 489Hz as measured on real (pinball) machine */
- MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
+ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
MCFG_BSMT2000_ADD(BSMT_TAG, 24000000)
MCFG_DEVICE_ADDRESS_MAP(AS_0, bsmt_map)
MCFG_BSMT2000_READY_CALLBACK(bsmt_ready_callback)
@@ -77,7 +77,7 @@ machine_config_constructor decobsmt_device::device_mconfig_additions() const
//-------------------------------------------------
decobsmt_device::decobsmt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
- device_t(mconfig, DECOBSMT, "Data East/Sega/Stern BSMT2000 Sound Board", tag, owner, clock),
+ device_t(mconfig, DECOBSMT, "Data East/Sega/Stern BSMT2000 Sound Board", tag, owner, clock),
m_ourcpu(*this, M6809_TAG),
m_bsmt(*this, BSMT_TAG)
{
@@ -139,6 +139,5 @@ WRITE8_MEMBER(decobsmt_device::bsmt_comms_w)
WRITE_LINE_MEMBER(decobsmt_device::bsmt_reset_line)
{
- m_ourcpu->set_input_line(INPUT_LINE_RESET, state);
+ m_ourcpu->set_input_line(INPUT_LINE_RESET, state);
}
-
diff --git a/src/mame/audio/decobsmt.h b/src/mame/audio/decobsmt.h
index ab6aadd2947..773397f2b60 100644
--- a/src/mame/audio/decobsmt.h
+++ b/src/mame/audio/decobsmt.h
@@ -10,7 +10,7 @@
#define DECOBSMT_TAG "decobsmt"
#define MCFG_DECOBSMT_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, DECOBSMT, 0)
+ MCFG_DEVICE_ADD(_tag, DECOBSMT, 0)
//**************************************************************************
// TYPE DEFINITIONS
@@ -19,33 +19,33 @@
class decobsmt_device : public device_t
{
public:
- // construction/destruction
- decobsmt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ decobsmt_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
- DECLARE_WRITE8_MEMBER(bsmt_reset_w);
- DECLARE_READ8_MEMBER(bsmt_status_r);
- DECLARE_WRITE8_MEMBER(bsmt0_w);
- DECLARE_WRITE8_MEMBER(bsmt1_w);
- DECLARE_READ8_MEMBER(bsmt_comms_r);
- DECLARE_WRITE8_MEMBER(bsmt_comms_w);
+ DECLARE_WRITE8_MEMBER(bsmt_reset_w);
+ DECLARE_READ8_MEMBER(bsmt_status_r);
+ DECLARE_WRITE8_MEMBER(bsmt0_w);
+ DECLARE_WRITE8_MEMBER(bsmt1_w);
+ DECLARE_READ8_MEMBER(bsmt_comms_r);
+ DECLARE_WRITE8_MEMBER(bsmt_comms_w);
- DECLARE_WRITE_LINE_MEMBER(bsmt_reset_line);
+ DECLARE_WRITE_LINE_MEMBER(bsmt_reset_line);
- required_device<cpu_device> m_ourcpu;
- required_device<bsmt2000_device> m_bsmt;
+ required_device<cpu_device> m_ourcpu;
+ required_device<bsmt2000_device> m_bsmt;
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
private:
- UINT8 m_bsmt_latch;
- UINT8 m_bsmt_reset;
- UINT8 m_bsmt_comms;
+ UINT8 m_bsmt_latch;
+ UINT8 m_bsmt_reset;
+ UINT8 m_bsmt_comms;
};
diff --git a/src/mame/audio/dkong.c b/src/mame/audio/dkong.c
index 629f63a336f..105f2cfd906 100644
--- a/src/mame/audio/dkong.c
+++ b/src/mame/audio/dkong.c
@@ -17,9 +17,9 @@
****************************************************************/
/* Set to 1 to disable DAC and post-mixer filters */
-#define DK_NO_FILTERS (0)
+#define DK_NO_FILTERS (0)
/* Set to 1 to use faster custom mixer */
-#define DK_USE_CUSTOM (1)
+#define DK_USE_CUSTOM (1)
/* Issue surrounded by this define need to be analyzed and
* reviewed at a later time.
@@ -30,7 +30,7 @@
*/
/* FIXME: Review at a later time */
-#define DK_REVIEW (1)
+#define DK_REVIEW (1)
/****************************************************************
@@ -41,47 +41,47 @@
/* Discrete sound inputs */
-#define DS_SOUND0_INV NODE_01
-#define DS_SOUND1_INV NODE_02
-#define DS_SOUND2_INV NODE_03
-#define DS_SOUND6_INV NODE_04
-#define DS_SOUND7_INV NODE_05
-#define DS_SOUND9_INV NODE_06
-#define DS_DAC NODE_07
-#define DS_DISCHARGE_INV NODE_08
-
-#define DS_SOUND0 NODE_208
-#define DS_SOUND1 NODE_209
-#define DS_SOUND6 NODE_210
-#define DS_SOUND7 NODE_211
-#define DS_SOUND9 NODE_212
-
-#define DS_ADJ_DAC NODE_240
-
-#define DS_OUT_SOUND0 NODE_241
-#define DS_OUT_SOUND1 NODE_242
-#define DS_OUT_SOUND2 NODE_243
-#define DS_OUT_SOUND6 NODE_247
-#define DS_OUT_SOUND7 NODE_248
-#define DS_OUT_SOUND9 NODE_249
-#define DS_OUT_DAC NODE_250
+#define DS_SOUND0_INV NODE_01
+#define DS_SOUND1_INV NODE_02
+#define DS_SOUND2_INV NODE_03
+#define DS_SOUND6_INV NODE_04
+#define DS_SOUND7_INV NODE_05
+#define DS_SOUND9_INV NODE_06
+#define DS_DAC NODE_07
+#define DS_DISCHARGE_INV NODE_08
+
+#define DS_SOUND0 NODE_208
+#define DS_SOUND1 NODE_209
+#define DS_SOUND6 NODE_210
+#define DS_SOUND7 NODE_211
+#define DS_SOUND9 NODE_212
+
+#define DS_ADJ_DAC NODE_240
+
+#define DS_OUT_SOUND0 NODE_241
+#define DS_OUT_SOUND1 NODE_242
+#define DS_OUT_SOUND2 NODE_243
+#define DS_OUT_SOUND6 NODE_247
+#define DS_OUT_SOUND7 NODE_248
+#define DS_OUT_SOUND9 NODE_249
+#define DS_OUT_DAC NODE_250
/* Input definitions for write handlers */
-#define DS_SOUND0_INP DS_SOUND0_INV
-#define DS_SOUND1_INP DS_SOUND1_INV
-#define DS_SOUND2_INP DS_SOUND2_INV
-#define DS_SOUND6_INP DS_SOUND6_INV
-#define DS_SOUND7_INP DS_SOUND7_INV
-#define DS_SOUND9_INP DS_SOUND9_INV
+#define DS_SOUND0_INP DS_SOUND0_INV
+#define DS_SOUND1_INP DS_SOUND1_INV
+#define DS_SOUND2_INP DS_SOUND2_INV
+#define DS_SOUND6_INP DS_SOUND6_INV
+#define DS_SOUND7_INP DS_SOUND7_INV
+#define DS_SOUND9_INP DS_SOUND9_INV
/* General defines */
-#define DK_1N5553_V 0.4 /* from datasheet at 1mA */
-#define DK_SUP_V 5.0
-#define NE555_INTERNAL_R RES_K(5)
+#define DK_1N5553_V 0.4 /* from datasheet at 1mA */
+#define DK_SUP_V 5.0
+#define NE555_INTERNAL_R RES_K(5)
-#define R_SERIES(R1,R2) ((R1)+(R2))
+#define R_SERIES(R1,R2) ((R1)+(R2))
/****************************************************************
*
@@ -99,68 +99,68 @@
/* Resistors */
-#define DK_R1 RES_K(47)
-#define DK_R2 RES_K(47)
-#define DK_R3 RES_K(5.1)
-#define DK_R4 RES_K(2)
-#define DK_R5 750
-#define DK_R6 RES_K(4.7)
-#define DK_R7 RES_K(10)
-#define DK_R8 RES_K(100)
-#define DK_R9 RES_K(10)
-#define DK_R10 RES_K(10)
-#define DK_R14 RES_K(47)
-
-#define DK_R15 RES_K(5.6)
-#define DK_R16 RES_K(5.6)
-#define DK_R17 RES_K(10)
-#define DK_R18 RES_K(4.7)
-#define DK_R20 RES_K(10)
-#define DK_R21 RES_K(5.6)
-#define DK_R22 RES_K(5.6)
-#define DK_R24 RES_K(47)
-#define DK_R25 RES_K(5.1)
-#define DK_R26 RES_K(2)
-#define DK_R27 150
-#define DK_R28 RES_K(4.7)
-#define DK_R29 RES_K(10)
-#define DK_R30 RES_K(100)
-#define DK_R31 RES_K(10)
-#define DK_R32 RES_K(10)
-#define DK_R35 RES_K(1)
-#define DK_R36 RES_K(1)
-#define DK_R38 RES_K(18)
-#define DK_R39 RES_M(3.3)
-#define DK_R49 RES_K(1.2)
-#define DK_R44 RES_K(1.2)
-#define DK_R45 RES_K(10)
-#define DK_R46 RES_K(12)
-#define DK_R47 RES_K(4.3)
-#define DK_R48 RES_K(43)
-#define DK_R50 RES_K(10)
-#define DK_R51 RES_K(10)
+#define DK_R1 RES_K(47)
+#define DK_R2 RES_K(47)
+#define DK_R3 RES_K(5.1)
+#define DK_R4 RES_K(2)
+#define DK_R5 750
+#define DK_R6 RES_K(4.7)
+#define DK_R7 RES_K(10)
+#define DK_R8 RES_K(100)
+#define DK_R9 RES_K(10)
+#define DK_R10 RES_K(10)
+#define DK_R14 RES_K(47)
+
+#define DK_R15 RES_K(5.6)
+#define DK_R16 RES_K(5.6)
+#define DK_R17 RES_K(10)
+#define DK_R18 RES_K(4.7)
+#define DK_R20 RES_K(10)
+#define DK_R21 RES_K(5.6)
+#define DK_R22 RES_K(5.6)
+#define DK_R24 RES_K(47)
+#define DK_R25 RES_K(5.1)
+#define DK_R26 RES_K(2)
+#define DK_R27 150
+#define DK_R28 RES_K(4.7)
+#define DK_R29 RES_K(10)
+#define DK_R30 RES_K(100)
+#define DK_R31 RES_K(10)
+#define DK_R32 RES_K(10)
+#define DK_R35 RES_K(1)
+#define DK_R36 RES_K(1)
+#define DK_R38 RES_K(18)
+#define DK_R39 RES_M(3.3)
+#define DK_R49 RES_K(1.2)
+#define DK_R44 RES_K(1.2)
+#define DK_R45 RES_K(10)
+#define DK_R46 RES_K(12)
+#define DK_R47 RES_K(4.3)
+#define DK_R48 RES_K(43)
+#define DK_R50 RES_K(10)
+#define DK_R51 RES_K(10)
/* Capacitors */
-#define DK_C8 CAP_U(220)
-#define DK_C12 CAP_U(1)
-#define DK_C13 CAP_U(33)
-#define DK_C16 CAP_U(1)
-#define DK_C17 CAP_U(4.7)
-#define DK_C18 CAP_U(1)
-#define DK_C19 CAP_U(1)
-#define DK_C20 CAP_U(3.3)
-#define DK_C21 CAP_U(1)
-
-#define DK_C23 CAP_U(4.7)
-#define DK_C24 CAP_U(10)
-#define DK_C25 CAP_U(3.3)
-#define DK_C26 CAP_U(3.3)
-#define DK_C29 CAP_U(3.3)
-#define DK_C30 CAP_U(10)
-#define DK_C32 CAP_U(10)
-#define DK_C34 CAP_N(10)
-#define DK_C159 CAP_N(100)
+#define DK_C8 CAP_U(220)
+#define DK_C12 CAP_U(1)
+#define DK_C13 CAP_U(33)
+#define DK_C16 CAP_U(1)
+#define DK_C17 CAP_U(4.7)
+#define DK_C18 CAP_U(1)
+#define DK_C19 CAP_U(1)
+#define DK_C20 CAP_U(3.3)
+#define DK_C21 CAP_U(1)
+
+#define DK_C23 CAP_U(4.7)
+#define DK_C24 CAP_U(10)
+#define DK_C25 CAP_U(3.3)
+#define DK_C26 CAP_U(3.3)
+#define DK_C29 CAP_U(3.3)
+#define DK_C30 CAP_U(10)
+#define DK_C32 CAP_U(10)
+#define DK_C34 CAP_N(10)
+#define DK_C159 CAP_N(100)
/*
@@ -172,16 +172,16 @@
static const discrete_lfsr_desc dkong_lfsr =
{
DISC_CLK_IS_FREQ,
- 24, /* Bit Length */
- 0, /* Reset Value */
- 10, /* Use Bit 10 (QC of second LS164) as F0 input 0 */
- 23, /* Use Bit 23 (QH of third LS164) as F0 input 1 */
- DISC_LFSR_XOR, /* F0 is XOR */
- DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
- DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
+ 24, /* Bit Length */
+ 0, /* Reset Value */
+ 10, /* Use Bit 10 (QC of second LS164) as F0 input 0 */
+ 23, /* Use Bit 23 (QH of third LS164) as F0 input 1 */
+ DISC_LFSR_XOR, /* F0 is XOR */
+ DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
+ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
DISC_LFSR_FLAG_OUTPUT_F0, /* Output is result of F0 */
- 0 /* Output bit */
+ 0 /* Output bit */
};
static const double dkong_diode_mix_table[2] = {DK_1N5553_V, DK_1N5553_V * 2};
@@ -285,14 +285,14 @@ static const discrete_op_amp_filt_info dkong_sallen_key_info =
* Gnd Gnd
*
************************************************************************/
-#define DKONG_CUSTOM_IN1 DISCRETE_INPUT(0)
-#define DKONG_CUSTOM_IN2 DISCRETE_INPUT(1)
-#define DKONG_CUSTOM_R1 DISCRETE_INPUT(2)
-#define DKONG_CUSTOM_R2 DISCRETE_INPUT(3)
-#define DKONG_CUSTOM_R3 DISCRETE_INPUT(4)
-#define DKONG_CUSTOM_R4 DISCRETE_INPUT(5)
-#define DKONG_CUSTOM_C DISCRETE_INPUT(6)
-#define DKONG_CUSTOM_V DISCRETE_INPUT(7)
+#define DKONG_CUSTOM_IN1 DISCRETE_INPUT(0)
+#define DKONG_CUSTOM_IN2 DISCRETE_INPUT(1)
+#define DKONG_CUSTOM_R1 DISCRETE_INPUT(2)
+#define DKONG_CUSTOM_R2 DISCRETE_INPUT(3)
+#define DKONG_CUSTOM_R3 DISCRETE_INPUT(4)
+#define DKONG_CUSTOM_R4 DISCRETE_INPUT(5)
+#define DKONG_CUSTOM_C DISCRETE_INPUT(6)
+#define DKONG_CUSTOM_V DISCRETE_INPUT(7)
DISCRETE_CLASS_STEP_RESET(dkong_custom_mixer, 1,
double m_i_in1[2];
@@ -304,10 +304,10 @@ DISCRETE_CLASS_STEP_RESET(dkong_custom_mixer, 1,
DISCRETE_STEP( dkong_custom_mixer )
{
- int in_1 = (int)DKONG_CUSTOM_IN1;
+ int in_1 = (int)DKONG_CUSTOM_IN1;
/* start of with 555 current */
- double i_total = DKONG_CUSTOM_V / RES_K(5);
+ double i_total = DKONG_CUSTOM_V / RES_K(5);
/* add in current from In1 */
i_total += m_i_in1[in_1];
/* add in current from In2 */
@@ -318,7 +318,7 @@ DISCRETE_STEP( dkong_custom_mixer )
set_output(0, m_out_v);
}
-#define NE555_CV_R RES_2_PARALLEL(RES_K(5), RES_K(10))
+#define NE555_CV_R RES_2_PARALLEL(RES_K(5), RES_K(10))
DISCRETE_RESET( dkong_custom_mixer )
{
@@ -349,8 +349,8 @@ static DISCRETE_SOUND_START(dkong2b)
/* DISCRETE_INPUT_DATA */
DISCRETE_INPUT_NOT(DS_SOUND2_INV)
- DISCRETE_INPUT_NOT(DS_SOUND1_INV) /* IC 6J, pin 12 */
- DISCRETE_INPUT_NOT(DS_SOUND0_INV) /* IC 6J, pin 2 */
+ DISCRETE_INPUT_NOT(DS_SOUND1_INV) /* IC 6J, pin 12 */
+ DISCRETE_INPUT_NOT(DS_SOUND0_INV) /* IC 6J, pin 2 */
DISCRETE_INPUT_NOT(DS_DISCHARGE_INV)
//DISCRETE_INPUT_DATA(DS_DAC)
@@ -360,7 +360,7 @@ static DISCRETE_SOUND_START(dkong2b)
/* Noise */
DISCRETE_TASK_START(1)
DISCRETE_LFSR_NOISE(NODE_11, 1, 1, CLOCK_2VF, 1.0, 0, 0.5, &dkong_lfsr)
- DISCRETE_COUNTER(NODE_12, 1, 0, NODE_11, 0, 7, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
+ DISCRETE_COUNTER(NODE_12, 1, 0, NODE_11, 0, 7, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
DISCRETE_TRANSFORM3(NODE_13,NODE_12,3,DK_SUP_V,"01>2*")
/* Stomp */
@@ -452,13 +452,13 @@ static DISCRETE_SOUND_START(dkong2b)
DISCRETE_TRANSFORM4(NODE_71, DS_DAC, DK_SUP_V/256.0, NODE_70, DS_DISCHARGE_INV, "01*3!2+*")
/* following the DAC are two opamps. The first is a current-to-voltage changer
- * for the DAC08 which delivers a variable output current.
- *
- * The second one is a Sallen Key filter ...
- * http://www.t-linespeakers.org/tech/filters/Sallen-Key.html
- * f = w / 2 / pi = 1 / ( 2 * pi * 5.6k*sqrt(22n*10n)) = 1916 Hz
- * Q = 1/2 * sqrt(22n/10n)= 0.74
- */
+ * for the DAC08 which delivers a variable output current.
+ *
+ * The second one is a Sallen Key filter ...
+ * http://www.t-linespeakers.org/tech/filters/Sallen-Key.html
+ * f = w / 2 / pi = 1 / ( 2 * pi * 5.6k*sqrt(22n*10n)) = 1916 Hz
+ * Q = 1/2 * sqrt(22n/10n)= 0.74
+ */
DISCRETE_SALLEN_KEY_FILTER(NODE_73, 1, NODE_71, DISC_SALLEN_KEY_LOW_PASS, &dkong_sallen_key_info)
/* Adjustment VR2 */
@@ -502,82 +502,82 @@ DISCRETE_SOUND_END
*
****************************************************************/
-#define RS_R1 RES_K(10)
-#define RS_R2 RES_K(10)
-#define RS_R3 RES_K(5.1)
-#define RS_R4 RES_K(2)
-#define RS_R5 750
-#define RS_R6 RES_K(4.7)
-#define RS_R7 RES_K(10)
-#define RS_R8 RES_K(100)
-#define RS_R9 RES_K(10)
-#define RS_R14 RES_K(10)
-#define RS_R15 RES_K(5.6) /* ???? */
-#define RS_R16 RES_K(5.6)
-#define RS_R18 RES_K(4.7)
-#define RS_R22 RES_K(5.6)
-#define RS_R23 RES_K(5.6)
-#define RS_R25 RES_K(10)
-#define RS_R26 RES_K(5.1)
-#define RS_R27 RES_K(2) /* 10k in schematics - but will oscillate */
-#define RS_R28 150
-#define RS_R29 RES_K(4.7)
-#define RS_R30 RES_K(10)
-#define RS_R31 RES_K(100)
-#define RS_R32 RES_K(10)
-#define RS_R37 RES_K(1)
-#define RS_R38 RES_K(1)
-#define RS_R39 RES_K(1)
-#define RS_R40 RES_K(10)
-#define RS_R42 RES_K(10)
-#define RS_R43 RES_K(5.1)
-#define RS_R44 RES_K(3.9)
-#define RS_R46 RES_K(1)
-#define RS_R48 RES_K(18)
-#define RS_R49 RES_M(3.3)
-#define RS_R54 RES_K(1.2)
-#define RS_R55 RES_K(10)
-#define RS_R56 RES_K(12)
-#define RS_R57 RES_K(4.3) /* ??? 43 */
-#define RS_R58 RES_K(43)
-#define RS_R59 RES_K(1.2)
-#define RS_R60 RES_K(10)
-#define RS_R61 RES_K(20)
-#define RS_R62 RES_K(2)
-#define RS_R63 130
-
-#define RS_R_NN01 RES_K(10)
-#define RS_R_NN02 RES_K(10)
-
-#define RS_C5 CAP_U(220)
-#define RS_C18 CAP_U(1)
-#define RS_C19 CAP_U(22)
-#define RS_C20 CAP_U(1)
-#define RS_C22 CAP_U(47)
-#define RS_C29 CAP_U(1)
-#define RS_C30 CAP_U(10)
-#define RS_C31 CAP_U(1)
-#define RS_C33 CAP_U(4.7)
-#define RS_C38 CAP_N(10)
-#define RS_C40 CAP_U(10)
-#define RS_C45 CAP_U(22)
-#define RS_C46 CAP_U(1)
-#define RS_C47 CAP_U(22)
-#define RS_C48 CAP_N(33)
-#define RS_C49 CAP_N(10)
-#define RS_C50 CAP_U(3.3)
-#define RS_C51 CAP_U(3.3)
-#define RS_C53 CAP_U(3.3)
-#define RS_C54 CAP_U(1)
-
-#define RS_VR2 RES_K(10)
-#define RS_C2 CAP_U(1)
+#define RS_R1 RES_K(10)
+#define RS_R2 RES_K(10)
+#define RS_R3 RES_K(5.1)
+#define RS_R4 RES_K(2)
+#define RS_R5 750
+#define RS_R6 RES_K(4.7)
+#define RS_R7 RES_K(10)
+#define RS_R8 RES_K(100)
+#define RS_R9 RES_K(10)
+#define RS_R14 RES_K(10)
+#define RS_R15 RES_K(5.6) /* ???? */
+#define RS_R16 RES_K(5.6)
+#define RS_R18 RES_K(4.7)
+#define RS_R22 RES_K(5.6)
+#define RS_R23 RES_K(5.6)
+#define RS_R25 RES_K(10)
+#define RS_R26 RES_K(5.1)
+#define RS_R27 RES_K(2) /* 10k in schematics - but will oscillate */
+#define RS_R28 150
+#define RS_R29 RES_K(4.7)
+#define RS_R30 RES_K(10)
+#define RS_R31 RES_K(100)
+#define RS_R32 RES_K(10)
+#define RS_R37 RES_K(1)
+#define RS_R38 RES_K(1)
+#define RS_R39 RES_K(1)
+#define RS_R40 RES_K(10)
+#define RS_R42 RES_K(10)
+#define RS_R43 RES_K(5.1)
+#define RS_R44 RES_K(3.9)
+#define RS_R46 RES_K(1)
+#define RS_R48 RES_K(18)
+#define RS_R49 RES_M(3.3)
+#define RS_R54 RES_K(1.2)
+#define RS_R55 RES_K(10)
+#define RS_R56 RES_K(12)
+#define RS_R57 RES_K(4.3) /* ??? 43 */
+#define RS_R58 RES_K(43)
+#define RS_R59 RES_K(1.2)
+#define RS_R60 RES_K(10)
+#define RS_R61 RES_K(20)
+#define RS_R62 RES_K(2)
+#define RS_R63 130
+
+#define RS_R_NN01 RES_K(10)
+#define RS_R_NN02 RES_K(10)
+
+#define RS_C5 CAP_U(220)
+#define RS_C18 CAP_U(1)
+#define RS_C19 CAP_U(22)
+#define RS_C20 CAP_U(1)
+#define RS_C22 CAP_U(47)
+#define RS_C29 CAP_U(1)
+#define RS_C30 CAP_U(10)
+#define RS_C31 CAP_U(1)
+#define RS_C33 CAP_U(4.7)
+#define RS_C38 CAP_N(10)
+#define RS_C40 CAP_U(10)
+#define RS_C45 CAP_U(22)
+#define RS_C46 CAP_U(1)
+#define RS_C47 CAP_U(22)
+#define RS_C48 CAP_N(33)
+#define RS_C49 CAP_N(10)
+#define RS_C50 CAP_U(3.3)
+#define RS_C51 CAP_U(3.3)
+#define RS_C53 CAP_U(3.3)
+#define RS_C54 CAP_U(1)
+
+#define RS_VR2 RES_K(10)
+#define RS_C2 CAP_U(1)
static const discrete_mixer_desc radarscp_mixer_desc =
{DISC_MIXER_IS_RESISTOR,
{RS_R14, RS_R25, RS_R2, RS_R42, RS_R1},
- {0,0,0,0,0}, /* no variable resistors */
+ {0,0,0,0,0}, /* no variable resistors */
{0,0,0,0,0}, /* no node capacitors */
0, RS_VR2,
0,
@@ -597,7 +597,7 @@ static const discrete_mixer_desc radarscp_mixer_desc_0 =
static const discrete_mixer_desc radarscp_mixer_desc_7 =
{DISC_MIXER_IS_RESISTOR,
{RS_R63+RS_R59, NE555_INTERNAL_R,RES_2_PARALLEL(2*NE555_INTERNAL_R,RS_R60)},
- {0,0,0}, /* no variable resistors */
+ {0,0,0}, /* no variable resistors */
{0,0,0}, /* no node capacitors */
0, 0,
RS_C50,
@@ -653,7 +653,7 @@ static DISCRETE_SOUND_START(radarscp)
DISCRETE_LFSR_NOISE(NODE_11, 1, 1, CLOCK_2VF, 1.0, 0, 0.5, &dkong_lfsr)
/* Clear (1) from SOUND6 */
- DISCRETE_COUNTER(NODE_12, 1, DS_SOUND6_INV, NODE_11, 0, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
+ DISCRETE_COUNTER(NODE_12, 1, DS_SOUND6_INV, NODE_11, 0, 15, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) /* LS161, IC 3J */
DISCRETE_TRANSFORM3(NODE_13,NODE_12,0x04,DK_SUP_V,"01&1=2*") /*QC => SND02 */
DISCRETE_TRANSFORM3(NODE_14,NODE_12,0x02,DK_SUP_V,"01&1=2*") /*QB => SND01 */
@@ -726,13 +726,13 @@ static DISCRETE_SOUND_START(radarscp)
DISCRETE_TRANSFORM4(NODE_171, DS_DAC, DK_SUP_V/256.0, NODE_170, DS_DISCHARGE_INV, "01*3!2+*")
/* following the DAC are two opamps. The first is a current-to-voltage changer
- * for the DAC08 which delivers a variable output current.
- *
- * The second one is a Sallen Key filter ...
- * http://www.t-linespeakers.org/tech/filters/Sallen-Key.html
- * f = w / 2 / pi = 1 / ( 2 * pi * 5.6k*sqrt(22n*10n)) = 1916 Hz
- * Q = 1/2 * sqrt(22n/10n)= 0.74
- */
+ * for the DAC08 which delivers a variable output current.
+ *
+ * The second one is a Sallen Key filter ...
+ * http://www.t-linespeakers.org/tech/filters/Sallen-Key.html
+ * f = w / 2 / pi = 1 / ( 2 * pi * 5.6k*sqrt(22n*10n)) = 1916 Hz
+ * Q = 1/2 * sqrt(22n/10n)= 0.74
+ */
DISCRETE_SALLEN_KEY_FILTER(NODE_173, 1, NODE_171, DISC_SALLEN_KEY_LOW_PASS, &dkong_sallen_key_info)
/* Adjustment VR3 */
@@ -758,57 +758,57 @@ DISCRETE_SOUND_END
*
****************************************************************/
-#define JR_R2 120
-#define JR_R3 RES_K(100)
-#define JR_R4 RES_K(47)
-#define JR_R5 RES_K(150)
-#define JR_R6 RES_K(20)
-#define JR_R8 RES_K(47)
-#define JR_R9 RES_K(47)
-#define JR_R10 RES_K(10)
-#define JR_R11 RES_K(20)
-#define JR_R12 RES_K(10)
-#define JR_R13 RES_K(47)
-#define JR_R14 RES_K(30)
-#define JR_R17 RES_K(47)
-#define JR_R18 RES_K(100)
-#define JR_R19 (100)
-#define JR_R20 RES_K(10)
-#define JR_R24 RES_K(4.7)
-#define JR_R25 RES_K(47)
-#define JR_R27 RES_K(10)
-#define JR_R28 RES_K(100)
-#define JR_R33 RES_K(1)
-#define JR_R34 RES_K(1)
-#define JR_R35 RES_K(1)
-
-
-#define JR_C13 CAP_U(4.7)
-#define JR_C14 CAP_U(4.7)
-#define JR_C15 CAP_U(22)
-#define JR_C16 CAP_U(3.3)
-#define JR_C17 CAP_U(3.3)
-#define JR_C18 CAP_N(22)
-#define JR_C19 CAP_N(4.7)
-#define JR_C20 CAP_U(0.12)
-#define JR_C21 CAP_N(56)
-#define JR_C22 CAP_N(220)
-#define JR_C23 CAP_U(0.47)
-#define JR_C24 CAP_U(47)
-#define JR_C25 CAP_U(1)
-#define JR_C26 CAP_U(47)
-#define JR_C27 CAP_U(22)
-#define JR_C28 CAP_U(10)
-#define JR_C29 CAP_U(10)
-#define JR_C30 CAP_U(0.47)
-#define JR_C32 CAP_U(10)
-#define JR_C37 CAP_U(0.12)
-#define JR_C39 CAP_U(0.47)
-#define JR_C161 CAP_U(1)
-#define JR_C155 CAP_U(0.01)
-
-#define TTL_HIGH (4)
-#define GND (0)
+#define JR_R2 120
+#define JR_R3 RES_K(100)
+#define JR_R4 RES_K(47)
+#define JR_R5 RES_K(150)
+#define JR_R6 RES_K(20)
+#define JR_R8 RES_K(47)
+#define JR_R9 RES_K(47)
+#define JR_R10 RES_K(10)
+#define JR_R11 RES_K(20)
+#define JR_R12 RES_K(10)
+#define JR_R13 RES_K(47)
+#define JR_R14 RES_K(30)
+#define JR_R17 RES_K(47)
+#define JR_R18 RES_K(100)
+#define JR_R19 (100)
+#define JR_R20 RES_K(10)
+#define JR_R24 RES_K(4.7)
+#define JR_R25 RES_K(47)
+#define JR_R27 RES_K(10)
+#define JR_R28 RES_K(100)
+#define JR_R33 RES_K(1)
+#define JR_R34 RES_K(1)
+#define JR_R35 RES_K(1)
+
+
+#define JR_C13 CAP_U(4.7)
+#define JR_C14 CAP_U(4.7)
+#define JR_C15 CAP_U(22)
+#define JR_C16 CAP_U(3.3)
+#define JR_C17 CAP_U(3.3)
+#define JR_C18 CAP_N(22)
+#define JR_C19 CAP_N(4.7)
+#define JR_C20 CAP_U(0.12)
+#define JR_C21 CAP_N(56)
+#define JR_C22 CAP_N(220)
+#define JR_C23 CAP_U(0.47)
+#define JR_C24 CAP_U(47)
+#define JR_C25 CAP_U(1)
+#define JR_C26 CAP_U(47)
+#define JR_C27 CAP_U(22)
+#define JR_C28 CAP_U(10)
+#define JR_C29 CAP_U(10)
+#define JR_C30 CAP_U(0.47)
+#define JR_C32 CAP_U(10)
+#define JR_C37 CAP_U(0.12)
+#define JR_C39 CAP_U(0.47)
+#define JR_C161 CAP_U(1)
+#define JR_C155 CAP_U(0.01)
+
+#define TTL_HIGH (4)
+#define GND (0)
/* KT = 0.25 for diode circuit, 0.33 else */
@@ -821,36 +821,36 @@ DISCRETE_SOUND_END
static const discrete_mixer_desc dkongjr_mixer_desc =
{DISC_MIXER_IS_RESISTOR,
{JR_R5, JR_R3, JR_R6, JR_R4, JR_R25},
- {0,0,0,0,0}, /* no variable resistors */
- {0,0,0,0,0}, /* no node capacitors */
+ {0,0,0,0,0}, /* no variable resistors */
+ {0,0,0,0,0}, /* no node capacitors */
0, 0,
- JR_C155, /* cF */
- JR_C161, /* cAmp */
+ JR_C155, /* cF */
+ JR_C161, /* cAmp */
0, 1};
static const discrete_mixer_desc dkongjr_s1_mixer_desc =
{
DISC_MIXER_IS_RESISTOR,
{JR_R13, JR_R12},
- {0}, {0}, 0, 0, JR_C24, 0, 0, 1 /* r_node{}, c{}, rI, rF, cF, cAmp, vRef, gain */
+ {0}, {0}, 0, 0, JR_C24, 0, 0, 1 /* r_node{}, c{}, rI, rF, cF, cAmp, vRef, gain */
};
static const discrete_lfsr_desc dkongjr_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 2, /* Use Bit 2 (QC of first LS164) as F0 input 0 */
- 15, /* Use Bit 15 (QH of secong LS164) as F0 input 1 */
- DISC_LFSR_XOR, /* F0 is XOR */
- DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
- DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 2, /* Use Bit 2 (QC of first LS164) as F0 input 0 */
+ 15, /* Use Bit 15 (QH of secong LS164) as F0 input 1 */
+ DISC_LFSR_XOR, /* F0 is XOR */
+ DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
+ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
DISC_LFSR_FLAG_OUTPUT_F0 | DISC_LFSR_FLAG_OUT_INVERT, /* Output is result of F0 */
- 0 /* Output bit */
+ 0 /* Output bit */
};
-#define DS_SOUND9_EN DS_SOUND9_INV
+#define DS_SOUND9_EN DS_SOUND9_INV
static DISCRETE_SOUND_START(dkongjr)
@@ -859,213 +859,213 @@ static DISCRETE_SOUND_START(dkongjr)
/************************************************/
/* DISCRETE_INPUT_DATA */
- DISCRETE_INPUT_NOT(DS_SOUND0_INV) /* IC 6J, pin 2 */
- DISCRETE_INPUT_NOT(DS_SOUND1_INV) /* IC 6J, pin 12 */
- DISCRETE_INPUT_NOT(DS_SOUND2_INV) /* IC 6J, pin 4 */
- DISCRETE_INPUT_NOT(DS_SOUND6_INV) /* unused */
- DISCRETE_INPUT_NOT(DS_SOUND7_INV) /* IC 5J, pin 12 */
- DISCRETE_INPUT_LOGIC(DS_SOUND9_EN) /* IC 7N pin 10 from IC 5J, pin 4 */
- DISCRETE_INPUT_NOT(DS_DISCHARGE_INV) /* IC 7H, pin 38 */
+ DISCRETE_INPUT_NOT(DS_SOUND0_INV) /* IC 6J, pin 2 */
+ DISCRETE_INPUT_NOT(DS_SOUND1_INV) /* IC 6J, pin 12 */
+ DISCRETE_INPUT_NOT(DS_SOUND2_INV) /* IC 6J, pin 4 */
+ DISCRETE_INPUT_NOT(DS_SOUND6_INV) /* unused */
+ DISCRETE_INPUT_NOT(DS_SOUND7_INV) /* IC 5J, pin 12 */
+ DISCRETE_INPUT_LOGIC(DS_SOUND9_EN) /* IC 7N pin 10 from IC 5J, pin 4 */
+ DISCRETE_INPUT_NOT(DS_DISCHARGE_INV) /* IC 7H, pin 38 */
/************************************************
- * SOUND0 - walking
- ************************************************/
+ * SOUND0 - walking
+ ************************************************/
DISCRETE_TASK_START(1)
- DISCRETE_COUNTER(NODE_100, /* IC 6L */
- 1, 0, /* ENAB; RESET */
- NODE_118, /* CLK - IC 6L, pin 10 */
+ DISCRETE_COUNTER(NODE_100, /* IC 6L */
+ 1, 0, /* ENAB; RESET */
+ NODE_118, /* CLK - IC 6L, pin 10 */
0, 0x3FFF, DISC_COUNT_UP, 0, DISC_CLK_BY_COUNT | DISC_OUT_HAS_XTIME)
- DISCRETE_BIT_DECODE(NODE_101, /* IC 6L, pin 6 */
- NODE_100, 6, 0) /* output x_time logic */
- DISCRETE_BIT_DECODE(NODE_102, /* IC 6L, pin 7 */
- NODE_100, 3, 0) /* output x_time logic */
- DISCRETE_BIT_DECODE(NODE_103, /* IC 6L, pin 2 */
- NODE_100, 12, 0) /* output x_time logic */
- DISCRETE_BIT_DECODE(NODE_104, /* IC 6L, pin 1 */
- NODE_100, 11, 0) /* output x_time logic */
+ DISCRETE_BIT_DECODE(NODE_101, /* IC 6L, pin 6 */
+ NODE_100, 6, 0) /* output x_time logic */
+ DISCRETE_BIT_DECODE(NODE_102, /* IC 6L, pin 7 */
+ NODE_100, 3, 0) /* output x_time logic */
+ DISCRETE_BIT_DECODE(NODE_103, /* IC 6L, pin 2 */
+ NODE_100, 12, 0) /* output x_time logic */
+ DISCRETE_BIT_DECODE(NODE_104, /* IC 6L, pin 1 */
+ NODE_100, 11, 0) /* output x_time logic */
/* LS157 Switches - IC 6K */
- DISCRETE_SWITCH(NODE_106, /* IC 6K, pin 7 */
- 1, DS_SOUND7_INV, /* ENAB; IC 6K, pin 1 */
- NODE_101, NODE_102) /* IC 6K, pin 5; pin 6 */
- DISCRETE_SWITCH(NODE_107, /* IC 6K, pin 9 */
- 1, DS_SOUND7_INV, /* ENAB; IC 6K, pin 1 */
- NODE_103, NODE_104) /* IC 6K, pin 11; pin 10 */
-
- DISCRETE_LS123(NODE_110, /* IC 4K, pin 5 */
- DS_SOUND0_INV, /* IC 4K, pin 10 */
+ DISCRETE_SWITCH(NODE_106, /* IC 6K, pin 7 */
+ 1, DS_SOUND7_INV, /* ENAB; IC 6K, pin 1 */
+ NODE_101, NODE_102) /* IC 6K, pin 5; pin 6 */
+ DISCRETE_SWITCH(NODE_107, /* IC 6K, pin 9 */
+ 1, DS_SOUND7_INV, /* ENAB; IC 6K, pin 1 */
+ NODE_103, NODE_104) /* IC 6K, pin 11; pin 10 */
+
+ DISCRETE_LS123(NODE_110, /* IC 4K, pin 5 */
+ DS_SOUND0_INV, /* IC 4K, pin 10 */
JR_R8, JR_C14)
- DISCRETE_SWITCH(NODE_111, /* IC 4F, pin 10 (inverter) */
- 1, NODE_110, /* ENAB; IC 4F, pin 11 */
- 4.14, 0.151) /* INP0; INP1 (measured) */
+ DISCRETE_SWITCH(NODE_111, /* IC 4F, pin 10 (inverter) */
+ 1, NODE_110, /* ENAB; IC 4F, pin 11 */
+ 4.14, 0.151) /* INP0; INP1 (measured) */
/* Breadboarded measurements IC 5K, pin 7
- D.R. Oct 2010
- V Hz
- 0.151 3139
- 0.25 2883
- 0.5 2820
- 0.75 3336
- 1 3805
- 2 6498
- 3 9796
- 4 13440
- 4.14 13980
- */
-
- DISCRETE_74LS624(NODE_113, /* IC 5K, pin 7 */
- 1, /* ENAB */
- NODE_111, DK_SUP_V, /* VMOD - IC 5K, pin 2; VRNG */
- JR_C18, JR_R10, JR_C17, JR_R33, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ D.R. Oct 2010
+ V Hz
+ 0.151 3139
+ 0.25 2883
+ 0.5 2820
+ 0.75 3336
+ 1 3805
+ 2 6498
+ 3 9796
+ 4 13440
+ 4.14 13980
+ */
+
+ DISCRETE_74LS624(NODE_113, /* IC 5K, pin 7 */
+ 1, /* ENAB */
+ NODE_111, DK_SUP_V, /* VMOD - IC 5K, pin 2; VRNG */
+ JR_C18, JR_R10, JR_C17, JR_R33, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_SWITCH(NODE_105, /* IC 6K, pin 4 */
- 1, /* ENAB */
- DS_SOUND7_INV, /* SWITCH, IC 6K, pin 1 */
- GND, NODE_113) /* IC 6K, pin 2; pin 3 */
+ DISCRETE_SWITCH(NODE_105, /* IC 6K, pin 4 */
+ 1, /* ENAB */
+ DS_SOUND7_INV, /* SWITCH, IC 6K, pin 1 */
+ GND, NODE_113) /* IC 6K, pin 2; pin 3 */
- DISCRETE_XTIME_XOR(NODE_115, /* IC 6N, pin 3 */
- NODE_105, NODE_106, /* IC 6N, pin 1; pin 2 */
- 0, 0) /* use x_time logic */
+ DISCRETE_XTIME_XOR(NODE_115, /* IC 6N, pin 3 */
+ NODE_105, NODE_106, /* IC 6N, pin 1; pin 2 */
+ 0, 0) /* use x_time logic */
- DISCRETE_XTIME_INVERTER(NODE_116, /* IC 5J, pin 8 */
- NODE_107, /* IC 5J, pin 9 */
- 0.135, 4.15) /* measured Low/High */
+ DISCRETE_XTIME_INVERTER(NODE_116, /* IC 5J, pin 8 */
+ NODE_107, /* IC 5J, pin 9 */
+ 0.135, 4.15) /* measured Low/High */
/* Breadboarded measurements IC 5K, pin 10
- D.R. Oct 2010
- V Hz
- 0.135 14450 - measured 74LS04 low
- 0.25 13320
- 0.5 12980
- 0.75 15150
- 1 17270
- 2 28230
- 3 41910
- 4 56950
- 4.15 59400 - measured 74LS04 high
- */
-
- DISCRETE_74LS624(NODE_118, /* IC 5K, pin 10 */
- 1, /* ENAB */
- NODE_116, DK_SUP_V, /* VMOD - IC 5K, pin 1; VRNG */
- JR_C19, JR_R11, JR_C16, JR_R33, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ D.R. Oct 2010
+ V Hz
+ 0.135 14450 - measured 74LS04 low
+ 0.25 13320
+ 0.5 12980
+ 0.75 15150
+ 1 17270
+ 2 28230
+ 3 41910
+ 4 56950
+ 4.15 59400 - measured 74LS04 high
+ */
+
+ DISCRETE_74LS624(NODE_118, /* IC 5K, pin 10 */
+ 1, /* ENAB */
+ NODE_116, DK_SUP_V, /* VMOD - IC 5K, pin 1; VRNG */
+ JR_C19, JR_R11, JR_C16, JR_R33, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_COUNT_F_X)
- DISCRETE_SWITCH(NODE_119, 1, NODE_110, 0, 1) /* convert from voltage to x_time logic */
- DISCRETE_XTIME_NAND(DS_OUT_SOUND0, /* IC 5N, pin 11 */
- NODE_119, NODE_115, /* IC 5N, pin 13; pin 12 */
- 0.2, 4.9) /* LOW; HIGH (1k pullup to 5V) */
+ DISCRETE_SWITCH(NODE_119, 1, NODE_110, 0, 1) /* convert from voltage to x_time logic */
+ DISCRETE_XTIME_NAND(DS_OUT_SOUND0, /* IC 5N, pin 11 */
+ NODE_119, NODE_115, /* IC 5N, pin 13; pin 12 */
+ 0.2, 4.9) /* LOW; HIGH (1k pullup to 5V) */
DISCRETE_TASK_END()
/************************************************
- * SOUND1 - Jump
- ************************************************/
+ * SOUND1 - Jump
+ ************************************************/
DISCRETE_TASK_START(2)
/* needs NODE_104 from TASK(1) ready */
- DISCRETE_LS123(NODE_10, /* IC 4K, pin 13 */
- DS_SOUND1_INV, /* IC 4K, pin 8 */
+ DISCRETE_LS123(NODE_10, /* IC 4K, pin 13 */
+ DS_SOUND1_INV, /* IC 4K, pin 8 */
JR_R9, JR_C15)
- DISCRETE_SWITCH(NODE_11, /* IC 7N, pin 6 */
- 1, NODE_10, /* ENAB; SWITCH - IC 7N, pin 5 */
- 0.151, 4.14) /* measured Low/High */
- DISCRETE_XTIME_INVERTER(NODE_12, /* IC 7N, pin 4 */
- NODE_104, /* IC 7N, pin 3 */
- 0.151, 4.14) /* measured Low/High */
+ DISCRETE_SWITCH(NODE_11, /* IC 7N, pin 6 */
+ 1, NODE_10, /* ENAB; SWITCH - IC 7N, pin 5 */
+ 0.151, 4.14) /* measured Low/High */
+ DISCRETE_XTIME_INVERTER(NODE_12, /* IC 7N, pin 4 */
+ NODE_104, /* IC 7N, pin 3 */
+ 0.151, 4.14) /* measured Low/High */
DISCRETE_MIXER2(NODE_13, 1, NODE_11, NODE_12, &dkongjr_s1_mixer_desc)
/* Breadboarded measurements IC 8L, pin 10
- D.R. Oct 2010
- V Hz
- 0.151 313
- 0.25 288
- 0.5 275
- 0.75 324
- 1 370
- 2 635
- 3 965
- 4 1325
- 4.14 1378
- */
-
- DISCRETE_74LS624(NODE_14, /* IC 8L, pin 10 */
- 1, /* ENAB */
- NODE_13, DK_SUP_V, /* VMOD - IC 8L, pin 1, VRNG */
+ D.R. Oct 2010
+ V Hz
+ 0.151 313
+ 0.25 288
+ 0.5 275
+ 0.75 324
+ 1 370
+ 2 635
+ 3 965
+ 4 1325
+ 4.14 1378
+ */
+
+ DISCRETE_74LS624(NODE_14, /* IC 8L, pin 10 */
+ 1, /* ENAB */
+ NODE_13, DK_SUP_V, /* VMOD - IC 8L, pin 1, VRNG */
/* C_FREQ_IN is taken care of by the NODE_13 mixer */
- JR_C22, RES_2_PARALLEL(JR_R13, JR_R12), 0, JR_R35, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ JR_C22, RES_2_PARALLEL(JR_R13, JR_R12), 0, JR_R35, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_ENERGY)
- DISCRETE_LOGIC_INVERT(NODE_15, NODE_10) /* fake invert for NODE_16 */
- DISCRETE_RCDISC_MODULATED(NODE_16, /* Q3, collector */
+ DISCRETE_LOGIC_INVERT(NODE_15, NODE_10) /* fake invert for NODE_16 */
+ DISCRETE_RCDISC_MODULATED(NODE_16, /* Q3, collector */
NODE_15, NODE_14, 120, JR_R27, RES_K(0.001), JR_R28, JR_C28, DK_SUP_V)
/* The following circuit does not match 100%, however works.
- * To be exact, we need a C-R-C-R circuit, we actually do not have.
- */
+ * To be exact, we need a C-R-C-R circuit, we actually do not have.
+ */
DISCRETE_CRFILTER_VREF(NODE_17, NODE_16, JR_R4, JR_C23, 2.5)
DISCRETE_RCFILTER(DS_OUT_SOUND1, NODE_17, JR_R19, JR_C21)
DISCRETE_TASK_END()
/************************************************
- * SOUND2 - climbing
- ************************************************/
+ * SOUND2 - climbing
+ ************************************************/
DISCRETE_TASK_START(1)
/* the noise source clock is a 74LS629 IC 7P, pin 10.
- * using JR_C20 as the timing cap, with Freq Control tied to 0V
- * and Range tied to 5V. This creates a fixed frequency of 710Hz.
- * So for speed, I breadboarded and measured the frequency.
- * Oct 2009, D.R.
- */
- DISCRETE_LFSR_NOISE(NODE_21, 1, 1, 710, 1.0, 0, 0.5, &dkongjr_lfsr) /* IC 3J & 4J */
- DISCRETE_LS123_INV(NODE_25, /* IC 8N, pin 13 (fake inverted for use by NODE_26) */
- DS_SOUND2_INV, /* IC 8N, pin 8 */
+ * using JR_C20 as the timing cap, with Freq Control tied to 0V
+ * and Range tied to 5V. This creates a fixed frequency of 710Hz.
+ * So for speed, I breadboarded and measured the frequency.
+ * Oct 2009, D.R.
+ */
+ DISCRETE_LFSR_NOISE(NODE_21, 1, 1, 710, 1.0, 0, 0.5, &dkongjr_lfsr) /* IC 3J & 4J */
+ DISCRETE_LS123_INV(NODE_25, /* IC 8N, pin 13 (fake inverted for use by NODE_26) */
+ DS_SOUND2_INV, /* IC 8N, pin 8 */
JR_R17, JR_C27)
- DISCRETE_RCDISC_MODULATED(NODE_26, /* Q2, collector */
+ DISCRETE_RCDISC_MODULATED(NODE_26, /* Q2, collector */
NODE_25, NODE_21, 120, JR_R24, RES_K(0.001), JR_R18, JR_C29, DK_SUP_V)
/* The following circuit does not match 100%, however works.
- * To be exact, we need a C-R-C-R circuit, we actually do not have.
- */
+ * To be exact, we need a C-R-C-R circuit, we actually do not have.
+ */
DISCRETE_CRFILTER_VREF(NODE_27, NODE_26, JR_R6, JR_C30, 2.5)
DISCRETE_RCFILTER(DS_OUT_SOUND2, NODE_27, JR_R2, JR_C25)
DISCRETE_TASK_END()
/************************************************
- * SOUND9 - Falling
- ************************************************/
+ * SOUND9 - Falling
+ ************************************************/
DISCRETE_TASK_START(1)
- DISCRETE_XTIME_INVERTER(NODE_90, /* IC 7N, pin 8 */
- DS_SOUND9_EN, /* IC 7N, pin 9 */
- 0.134, 4.16) /* measured Low/High */
+ DISCRETE_XTIME_INVERTER(NODE_90, /* IC 7N, pin 8 */
+ DS_SOUND9_EN, /* IC 7N, pin 9 */
+ 0.134, 4.16) /* measured Low/High */
/* Breadboarded measurements IC 7P, pin 7
- D.R. Oct 2010
- V Hz
- 0.134 570
- 0.25 538
- 0.5 489
- 0.75 560
- 1 636
- 2 1003
- 3 1484
- 4 2016
- 4.16 2111
- */
- DISCRETE_74LS624(NODE_91, /* IC 7P, pin 7 */
- 1, /* ENAB */
- NODE_90, DK_SUP_V, /* VMOD - IC 7P, pin 2, VRNG */
- JR_C37, JR_R14, JR_C26, JR_R34, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ D.R. Oct 2010
+ V Hz
+ 0.134 570
+ 0.25 538
+ 0.5 489
+ 0.75 560
+ 1 636
+ 2 1003
+ 3 1484
+ 4 2016
+ 4.16 2111
+ */
+ DISCRETE_74LS624(NODE_91, /* IC 7P, pin 7 */
+ 1, /* ENAB */
+ NODE_90, DK_SUP_V, /* VMOD - IC 7P, pin 2, VRNG */
+ JR_C37, JR_R14, JR_C26, JR_R34, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_XTIME_NAND(DS_OUT_SOUND9, /* IC 5N, pin 8 */
- DS_SOUND9_EN, /* IC 5N, pin 9 */
- NODE_91, /* IC 5N, pin 10 */
- 0.2, 4.9) /* LOW, HIGH (1k pullup to 5V) */
+ DISCRETE_XTIME_NAND(DS_OUT_SOUND9, /* IC 5N, pin 8 */
+ DS_SOUND9_EN, /* IC 5N, pin 9 */
+ NODE_91, /* IC 5N, pin 10 */
+ 0.2, 4.9) /* LOW, HIGH (1k pullup to 5V) */
DISCRETE_TASK_END()
/************************************************
- * DAC
- ************************************************/
+ * DAC
+ ************************************************/
DISCRETE_TASK_START(1)
DISCRETE_INPUT_BUFFER(DS_DAC, 0)
@@ -1074,33 +1074,33 @@ DISCRETE_TASK_START(1)
DISCRETE_TRANSFORM4(NODE_171, DS_DAC, DK_SUP_V/256.0, NODE_170, DS_DISCHARGE_INV, "01*3!2+*")
/* following the DAC are two opamps. The first is a current-to-voltage changer
- * for the DAC08 which delivers a variable output current.
- *
- * The second one is a Sallen Key filter ...
- * http://www.t-linespeakers.org/tech/filters/Sallen-Key.html
- * f = w / 2 / pi = 1 / ( 2 * pi * 5.6k*sqrt(22n*10n)) = 1916 Hz
- * Q = 1/2 * sqrt(22n/10n)= 0.74
- */
+ * for the DAC08 which delivers a variable output current.
+ *
+ * The second one is a Sallen Key filter ...
+ * http://www.t-linespeakers.org/tech/filters/Sallen-Key.html
+ * f = w / 2 / pi = 1 / ( 2 * pi * 5.6k*sqrt(22n*10n)) = 1916 Hz
+ * Q = 1/2 * sqrt(22n/10n)= 0.74
+ */
DISCRETE_SALLEN_KEY_FILTER(DS_OUT_DAC, 1, NODE_171, DISC_SALLEN_KEY_LOW_PASS, &dkong_sallen_key_info)
DISCRETE_TASK_END()
/************************************************
- * Amplifier
- ************************************************/
+ * Amplifier
+ ************************************************/
DISCRETE_TASK_START(3)
DISCRETE_MIXER5(NODE_288, 1, DS_OUT_SOUND9, DS_OUT_SOUND0, DS_OUT_SOUND2, DS_OUT_SOUND1, DS_OUT_DAC, &dkongjr_mixer_desc)
/* Amplifier: internal amplifier
- * Just a 1:n amplifier without filters - just the output filter
- */
+ * Just a 1:n amplifier without filters - just the output filter
+ */
DISCRETE_CRFILTER(NODE_295, NODE_288, 1000, JR_C13)
/* approx -1.805V to 2.0V when playing, but turn on sound peaks at 2.36V */
/* we will set the full wav range to 1.18V which will cause clipping on the turn on
- * sound and explosions. The real game would do this when the volume is turned up too.
- * Reducing MAME's master volume to 50% will provide full unclipped volume.
- */
+ * sound and explosions. The real game would do this when the volume is turned up too.
+ * Reducing MAME's master volume to 50% will provide full unclipped volume.
+ */
DISCRETE_OUTPUT(NODE_295, 32767.0/1.18)
DISCRETE_TASK_END()
@@ -1230,16 +1230,16 @@ WRITE8_MEMBER(dkong_state::M58817_command_w)
WRITE8_MEMBER(dkong_state::dkong_voice_w)
{
/* only provided for documentation purposes
- * not actually used
- */
+ * not actually used
+ */
logerror("dkong_speech_w: 0x%02x\n", data);
}
READ8_MEMBER(dkong_state::dkong_voice_status_r)
{
/* only provided for documentation purposes
- * not actually used
- */
+ * not actually used
+ */
return 0;
}
@@ -1292,9 +1292,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dkong_sound_io_map, AS_IO, 8, dkong_state )
AM_RANGE(0x00, 0xFF) AM_READ(dkong_tune_r)
- AM_WRITE(dkong_voice_w)
+ AM_WRITE(dkong_voice_w)
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(dkong_tune_r)
- AM_WRITE(dkong_voice_w)
+ AM_WRITE(dkong_voice_w)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(dkong_p1_w) /* only write to dac */
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_LATCH8_READWRITE("virtual_p2")
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_LATCH8_READBIT("ls259.6h", 5)
@@ -1313,7 +1313,7 @@ static ADDRESS_MAP_START( radarscp1_sound_io_map, AS_IO, 8, dkong_state )
AM_RANGE(0x00, 0x00) AM_MIRROR(0xff) AM_DEVREAD_LEGACY("ls175.3d", latch8_r)
AM_RANGE(0x00, 0xff) AM_WRITE(dkong_p1_w) /* DAC here */
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_LATCH8_READ("virtual_p1")
- AM_WRITE(M58817_command_w)
+ AM_WRITE(M58817_command_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_LATCH8_WRITE("virtual_p2")
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_LATCH8_READBIT("ls259.6h", 5)
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_LATCH8_READBIT("ls259.6h", 4)
@@ -1321,7 +1321,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dkong3_sound1_map, AS_PROGRAM, 8, dkong_state )
AM_RANGE(0x0000, 0x01ff) AM_RAM
- AM_RANGE(0x4016, 0x4016) AM_LATCH8_READ("latch1") /* overwrite default */
+ AM_RANGE(0x4016, 0x4016) AM_LATCH8_READ("latch1") /* overwrite default */
AM_RANGE(0x4017, 0x4017) AM_LATCH8_READ("latch2")
AM_RANGE(0x4000, 0x4017) AM_DEVREAD_LEGACY("nes1", nes_psg_r)
AM_RANGE(0x4000, 0x4017) AM_DEVWRITE_LEGACY("nes1", nes_psg_w)
@@ -1330,7 +1330,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( dkong3_sound2_map, AS_PROGRAM, 8, dkong_state )
AM_RANGE(0x0000, 0x01ff) AM_RAM
- AM_RANGE(0x4016, 0x4016) AM_LATCH8_READ("latch3") /* overwrite default */
+ AM_RANGE(0x4016, 0x4016) AM_LATCH8_READ("latch3") /* overwrite default */
AM_RANGE(0x4000, 0x4017) AM_DEVREAD_LEGACY("nes2", nes_psg_r)
AM_RANGE(0x4000, 0x4017) AM_DEVWRITE_LEGACY("nes2", nes_psg_w)
AM_RANGE(0xe000, 0xffff) AM_ROM
@@ -1379,14 +1379,14 @@ MACHINE_CONFIG_FRAGMENT( dkong2b_audio )
MCFG_LATCH8_DISCRETE_NODE("discrete", 7, DS_SOUND7_INP)
/* If P2.Bit7 -> is apparently an external signal decay or other output control
- * If P2.Bit6 -> activates the external compressed sample ROM (not radarscp1)
- * If P2.Bit5 -> Signal ANSN ==> Grid enable (radarscp1)
- * If P2.Bit4 -> status code to main cpu
- * P2.Bit2-0 -> select the 256 byte bank for external ROM
- */
-
- MCFG_LATCH8_ADD( "virtual_p2" ) /* virtual latch for port B */
- MCFG_LATCH8_INVERT( 0x20 ) /* signal is inverted */
+ * If P2.Bit6 -> activates the external compressed sample ROM (not radarscp1)
+ * If P2.Bit5 -> Signal ANSN ==> Grid enable (radarscp1)
+ * If P2.Bit4 -> status code to main cpu
+ * P2.Bit2-0 -> select the 256 byte bank for external ROM
+ */
+
+ MCFG_LATCH8_ADD( "virtual_p2" ) /* virtual latch for port B */
+ MCFG_LATCH8_INVERT( 0x20 ) /* signal is inverted */
MCFG_LATCH8_DEVREAD(5, "ls259.6h", latch8_r, 3)
MCFG_LATCH8_DISCRETE_NODE("discrete", 7, DS_DISCHARGE_INV)
@@ -1412,8 +1412,8 @@ MACHINE_CONFIG_DERIVED( radarscp1_audio, radarscp_audio )
MCFG_CPU_IO_MAP(radarscp1_sound_io_map)
/* virtual_p2 is not read -see memory map-, all bits are output bits */
- MCFG_LATCH8_ADD( "virtual_p1" ) /* virtual latch for port A */
- MCFG_LATCH8_INVERT( 0x80 ) /* signal is inverted */
+ MCFG_LATCH8_ADD( "virtual_p1" ) /* virtual latch for port A */
+ MCFG_LATCH8_INVERT( 0x80 ) /* signal is inverted */
MCFG_LATCH8_DEVREAD(7, "ls259.6h", latch8_r, 3)
MCFG_LATCH8_DEVREAD(6, "tms", m58817_status_r, 0)
@@ -1444,8 +1444,8 @@ MACHINE_CONFIG_FRAGMENT( dkongjr_audio )
MCFG_LATCH8_ADD( "ls259.4h")
- MCFG_LATCH8_ADD( "virtual_p2" ) /* virtual latch for port B */
- MCFG_LATCH8_INVERT( 0x70 ) /* all signals are inverted */
+ MCFG_LATCH8_ADD( "virtual_p2" ) /* virtual latch for port B */
+ MCFG_LATCH8_INVERT( 0x70 ) /* all signals are inverted */
MCFG_LATCH8_DEVREAD(6, "ls259.4h", latch8_r, 1)
MCFG_LATCH8_DEVREAD(5, "ls259.6h", latch8_r, 3)
MCFG_LATCH8_DEVREAD(4, "ls259.6h", latch8_r, 6)
@@ -1487,5 +1487,3 @@ MACHINE_CONFIG_FRAGMENT( dkong3_audio )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_CONFIG_END
-
-
diff --git a/src/mame/audio/dragrace.c b/src/mame/audio/dragrace.c
index 4494cdca723..ed3d9dd7723 100644
--- a/src/mame/audio/dragrace.c
+++ b/src/mame/audio/dragrace.c
@@ -14,29 +14,29 @@
static const discrete_lfsr_desc dragrace_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 15 /* Output bit */
};
/* Nodes - Sounds */
-#define DRAGRACE_NOISE NODE_10
-#define DRAGRACE_SCREECH1_SND NODE_11
-#define DRAGRACE_SCREECH2_SND NODE_12
-#define DRAGRACE_LOTONE_SND NODE_13
-#define DRAGRACE_HITONE_SND NODE_14
-#define DRAGRACE_TONE_SND NODE_15
-#define DRAGRACE_EXPLODE1_SND NODE_16
-#define DRAGRACE_EXPLODE2_SND NODE_17
-#define DRAGRACE_MOTOR1_SND NODE_18
-#define DRAGRACE_MOTOR2_SND NODE_19
+#define DRAGRACE_NOISE NODE_10
+#define DRAGRACE_SCREECH1_SND NODE_11
+#define DRAGRACE_SCREECH2_SND NODE_12
+#define DRAGRACE_LOTONE_SND NODE_13
+#define DRAGRACE_HITONE_SND NODE_14
+#define DRAGRACE_TONE_SND NODE_15
+#define DRAGRACE_EXPLODE1_SND NODE_16
+#define DRAGRACE_EXPLODE2_SND NODE_17
+#define DRAGRACE_MOTOR1_SND NODE_18
+#define DRAGRACE_MOTOR2_SND NODE_19
DISCRETE_SOUND_START(dragrace)
/************************************************/
@@ -95,15 +95,15 @@ DISCRETE_SOUND_START(dragrace)
DISCRETE_ADJUSTMENT(NODE_21, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR1")
DISCRETE_MULTIPLY(NODE_22, NODE_20, NODE_21)
- DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6) /* F1 = /12*2 = /6 */
+ DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6) /* F1 = /12*2 = /6 */
DISCRETE_SQUAREWAVE(NODE_24, 1, NODE_23, (581.6/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_25, NODE_24, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_26, NODE_22, 3, 27.0/4) /* F2 = /12*3 = /4 */
+ DISCRETE_MULTADD(NODE_26, NODE_22, 3, 27.0/4) /* F2 = /12*3 = /4 */
DISCRETE_SQUAREWAVE(NODE_27, 1, NODE_26, (581.6/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_28, NODE_27, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_29, NODE_22, 4, 27.0/3) /* F3 = /12*4 = /3 */
+ DISCRETE_MULTADD(NODE_29, NODE_22, 4, 27.0/3) /* F3 = /12*4 = /3 */
DISCRETE_SQUAREWAVE(NODE_30, 1, NODE_29, (581.6/3), 100.0/3, 0, 360.0/3)
DISCRETE_RCFILTER(NODE_31, NODE_30, 10000, 1e-7)
@@ -118,15 +118,15 @@ DISCRETE_SOUND_START(dragrace)
DISCRETE_ADJUSTMENT(NODE_41, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR2")
DISCRETE_MULTIPLY(NODE_42, NODE_40, NODE_41)
- DISCRETE_MULTADD(NODE_43, NODE_42, 2, 27.0/6) /* F1 = /12*2 = /6 */
+ DISCRETE_MULTADD(NODE_43, NODE_42, 2, 27.0/6) /* F1 = /12*2 = /6 */
DISCRETE_SQUAREWAVE(NODE_44, 1, NODE_43, (581.6/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_45, NODE_44, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_46, NODE_42, 3, 27.0/4) /* F2 = /12*3 = /4 */
+ DISCRETE_MULTADD(NODE_46, NODE_42, 3, 27.0/4) /* F2 = /12*3 = /4 */
DISCRETE_SQUAREWAVE(NODE_47, 1, NODE_46, (581.6/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_48, NODE_47, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_49, NODE_42, 4, 27.0/3) /* F3 = /12*4 = /3 */
+ DISCRETE_MULTADD(NODE_49, NODE_42, 4, 27.0/3) /* F3 = /12*4 = /3 */
DISCRETE_SQUAREWAVE(NODE_50, 1, NODE_49, (581.6/3), 100.0/3, 0, 360.0/3)
DISCRETE_RCFILTER(NODE_51, NODE_50, 10000, 1e-7)
diff --git a/src/mame/audio/dsbz80.c b/src/mame/audio/dsbz80.c
index ec0ecf72cd9..58130ca9c2d 100644
--- a/src/mame/audio/dsbz80.c
+++ b/src/mame/audio/dsbz80.c
@@ -10,29 +10,29 @@
#include "emu.h"
#include "audio/dsbz80.h"
-#define Z80_TAG "mpegcpu"
-#define YMZ770_TAG "ymz770"
+#define Z80_TAG "mpegcpu"
+#define YMZ770_TAG "ymz770"
static ADDRESS_MAP_START( dsbz80_map, AS_PROGRAM, 8, dsbz80_device )
AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION(":mpegcpu", 0)
- AM_RANGE(0x8000, 0xffff) AM_RAM
+ AM_RANGE(0x8000, 0xffff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( dsbz80io_map, AS_IO, 8, dsbz80_device )
- AM_RANGE(0xe0, 0xe0) AM_MIRROR(0xff00) AM_WRITE(mpeg_trigger_w)
- AM_RANGE(0xe2, 0xe4) AM_MIRROR(0xff00) AM_READWRITE(mpeg_pos_r, mpeg_start_w)
- AM_RANGE(0xe5, 0xe7) AM_MIRROR(0xff00) AM_WRITE(mpeg_end_w)
- AM_RANGE(0xe8, 0xe8) AM_MIRROR(0xff00) AM_WRITE(mpeg_volume_w)
- AM_RANGE(0xe9, 0xe9) AM_MIRROR(0xff00) AM_WRITE(mpeg_stereo_w)
- AM_RANGE(0xf0, 0xf0) AM_MIRROR(0xff00) AM_READ(latch_r)
- AM_RANGE(0xf1, 0xf1) AM_MIRROR(0xff00) AM_READ(status_r)
+ AM_RANGE(0xe0, 0xe0) AM_MIRROR(0xff00) AM_WRITE(mpeg_trigger_w)
+ AM_RANGE(0xe2, 0xe4) AM_MIRROR(0xff00) AM_READWRITE(mpeg_pos_r, mpeg_start_w)
+ AM_RANGE(0xe5, 0xe7) AM_MIRROR(0xff00) AM_WRITE(mpeg_end_w)
+ AM_RANGE(0xe8, 0xe8) AM_MIRROR(0xff00) AM_WRITE(mpeg_volume_w)
+ AM_RANGE(0xe9, 0xe9) AM_MIRROR(0xff00) AM_WRITE(mpeg_stereo_w)
+ AM_RANGE(0xf0, 0xf0) AM_MIRROR(0xff00) AM_READ(latch_r)
+ AM_RANGE(0xf1, 0xf1) AM_MIRROR(0xff00) AM_READ(status_r)
ADDRESS_MAP_END
MACHINE_CONFIG_FRAGMENT( dsbz80 )
- MCFG_CPU_ADD(Z80_TAG, Z80, 4000000) /* unknown clock, but probably pretty slow considering the z80 does like nothing */
+ MCFG_CPU_ADD(Z80_TAG, Z80, 4000000) /* unknown clock, but probably pretty slow considering the z80 does like nothing */
MCFG_CPU_PROGRAM_MAP(dsbz80_map)
- MCFG_CPU_IO_MAP(dsbz80io_map)
+ MCFG_CPU_IO_MAP(dsbz80io_map)
MACHINE_CONFIG_END
//**************************************************************************
@@ -61,7 +61,7 @@ machine_config_constructor dsbz80_device::device_mconfig_additions() const
//-------------------------------------------------
dsbz80_device::dsbz80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
- device_t(mconfig, DSBZ80, "Sega Z80-based Digital Sound Board", tag, owner, clock),
+ device_t(mconfig, DSBZ80, "Sega Z80-based Digital Sound Board", tag, owner, clock),
device_sound_interface(mconfig, *this),
m_ourcpu(*this, Z80_TAG)
{
@@ -86,7 +86,7 @@ void dsbz80_device::device_reset()
{
m_dsb_latch = 0;
status = 1;
- start = end = 0;
+ start = end = 0;
audio_pos = audio_avail = 0;
memset(audio_buf, 0, sizeof(audio_buf));
mp_state = 0;
@@ -95,33 +95,33 @@ void dsbz80_device::device_reset()
WRITE8_MEMBER(dsbz80_device::latch_w)
{
m_ourcpu->set_input_line(INPUT_LINE_IRQ0, ASSERT_LINE);
- m_dsb_latch = data;
- status |= 2;
-// printf("%02x to DSB latch\n", data);
+ m_dsb_latch = data;
+ status |= 2;
+// printf("%02x to DSB latch\n", data);
}
READ8_MEMBER(dsbz80_device::latch_r)
{
m_ourcpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
-// printf("DSB Z80 read %02x\n", m_dsb_latch);
+// printf("DSB Z80 read %02x\n", m_dsb_latch);
status &= ~2;
- return m_dsb_latch;
+ return m_dsb_latch;
}
WRITE8_MEMBER(dsbz80_device::mpeg_trigger_w)
{
mp_state = data;
- if (data == 0) // stop
+ if (data == 0) // stop
{
mp_state = 0;
audio_pos = audio_avail = 0;
}
- else if (data == 1) // play without loop
+ else if (data == 1) // play without loop
{
mp_pos = mp_start*8;
}
- else if (data == 2) // play with loop
+ else if (data == 2) // play with loop
{
mp_pos = mp_start*8;
}
@@ -148,7 +148,7 @@ READ8_MEMBER(dsbz80_device::mpeg_pos_r)
get latched. When the current stream ends, the MPEG hardware starts playing
immediately from the latched start and end position. In this way, the Z80
enforces looping where appropriate and multi-part songs in other cases
- (song #16 is a good example)
+ (song #16 is a good example)
*/
WRITE8_MEMBER(dsbz80_device::mpeg_start_w)
@@ -177,11 +177,11 @@ WRITE8_MEMBER(dsbz80_device::mpeg_start_w)
// SWA: if loop end is zero, it means "keep previous end marker"
if (lp_end == 0)
{
-// MPEG_Set_Loop(ROM + lp_start, mp_end-lp_start);
+// MPEG_Set_Loop(ROM + lp_start, mp_end-lp_start);
}
else
{
-// MPEG_Set_Loop(ROM + lp_start, lp_end-lp_start);
+// MPEG_Set_Loop(ROM + lp_start, lp_end-lp_start);
}
}
break;
@@ -211,7 +211,7 @@ WRITE8_MEMBER(dsbz80_device::mpeg_end_w)
else
{
lp_end = end;
-// MPEG_Set_Loop(ROM + lp_start, lp_end-lp_start);
+// MPEG_Set_Loop(ROM + lp_start, lp_end-lp_start);
}
break;
}
@@ -224,7 +224,7 @@ WRITE8_MEMBER(dsbz80_device::mpeg_volume_w)
WRITE8_MEMBER(dsbz80_device::mpeg_stereo_w)
{
- mp_pan = data & 3; // 0 = stereo, 1 = left on both channels, 2 = right on both channels
+ mp_pan = data & 3; // 0 = stereo, 1 = left on both channels, 2 = right on both channels
}
READ8_MEMBER(dsbz80_device::status_r)
@@ -247,17 +247,17 @@ void dsbz80_device::sound_stream_update(sound_stream &stream, stream_sample_t **
{
switch (mp_pan)
{
- case 0: // stereo
+ case 0: // stereo
*out_l++ = audio_buf[audio_pos*2];
*out_r++ = audio_buf[audio_pos*2+1];
break;
- case 1: // left only
+ case 1: // left only
*out_l++ = audio_buf[audio_pos*2];
*out_r++ = audio_buf[audio_pos*2];
break;
- case 2: // right only
+ case 2: // right only
*out_l++ = audio_buf[audio_pos*2+1];
*out_r++ = audio_buf[audio_pos*2+1];
break;
@@ -280,21 +280,21 @@ void dsbz80_device::sound_stream_update(sound_stream &stream, stream_sample_t **
}
break;
- }
- else
+ }
+ else
{
int sample_rate, channel_count;
bool ok = decoder->decode_buffer(mp_pos, mp_end*8, audio_buf, audio_avail, sample_rate, channel_count);
- if (ok)
+ if (ok)
{
audio_pos = 0;
- }
- else
+ }
+ else
{
- if(mp_state == 2)
+ if(mp_state == 2)
{
- if (mp_pos == lp_start*8)
+ if (mp_pos == lp_start*8)
{
// We're looping on un-decodable crap, abort abort abort
mp_state = 0;
@@ -305,7 +305,7 @@ void dsbz80_device::sound_stream_update(sound_stream &stream, stream_sample_t **
{
mp_end = lp_end;
}
- }
+ }
else
{
mp_state = 0;
@@ -314,4 +314,3 @@ void dsbz80_device::sound_stream_update(sound_stream &stream, stream_sample_t **
}
}
}
-
diff --git a/src/mame/audio/dsbz80.h b/src/mame/audio/dsbz80.h
index 47560e63870..5e9a2d222de 100644
--- a/src/mame/audio/dsbz80.h
+++ b/src/mame/audio/dsbz80.h
@@ -10,7 +10,7 @@
#define DSBZ80_TAG "dsbz80"
#define MCFG_DSBZ80_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, DSBZ80, 0)
+ MCFG_DEVICE_ADD(_tag, DSBZ80, 0)
//**************************************************************************
// TYPE DEFINITIONS
@@ -19,40 +19,40 @@
class dsbz80_device : public device_t, public device_sound_interface
{
public:
- // construction/destruction
- dsbz80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ dsbz80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- // optional information overrides
- virtual machine_config_constructor device_mconfig_additions() const;
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const;
- DECLARE_WRITE8_MEMBER(latch_w);
+ DECLARE_WRITE8_MEMBER(latch_w);
- required_device<cpu_device> m_ourcpu;
+ required_device<cpu_device> m_ourcpu;
- DECLARE_WRITE8_MEMBER(mpeg_trigger_w);
- DECLARE_WRITE8_MEMBER(mpeg_start_w);
- DECLARE_WRITE8_MEMBER(mpeg_end_w);
- DECLARE_WRITE8_MEMBER(mpeg_volume_w);
- DECLARE_WRITE8_MEMBER(mpeg_stereo_w);
- DECLARE_READ8_MEMBER(mpeg_pos_r);
- DECLARE_READ8_MEMBER(latch_r);
- DECLARE_READ8_MEMBER(status_r);
+ DECLARE_WRITE8_MEMBER(mpeg_trigger_w);
+ DECLARE_WRITE8_MEMBER(mpeg_start_w);
+ DECLARE_WRITE8_MEMBER(mpeg_end_w);
+ DECLARE_WRITE8_MEMBER(mpeg_volume_w);
+ DECLARE_WRITE8_MEMBER(mpeg_stereo_w);
+ DECLARE_READ8_MEMBER(mpeg_pos_r);
+ DECLARE_READ8_MEMBER(latch_r);
+ DECLARE_READ8_MEMBER(status_r);
protected:
- // device-level overrides
- virtual void device_start();
- virtual void device_reset();
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
private:
mpeg_audio *decoder;
INT16 audio_buf[1152*2];
- UINT8 m_dsb_latch;
- UINT32 mp_start, mp_end, mp_vol, mp_pan, mp_state, lp_start, lp_end, start, end;
+ UINT8 m_dsb_latch;
+ UINT32 mp_start, mp_end, mp_vol, mp_pan, mp_state, lp_start, lp_end, start, end;
int mp_pos, audio_pos, audio_avail;
- int status;
- int getbit();
+ int status;
+ int getbit();
};
diff --git a/src/mame/audio/exidy.c b/src/mame/audio/exidy.c
index 56b0913ad2a..1bdc4ccf2e1 100644
--- a/src/mame/audio/exidy.c
+++ b/src/mame/audio/exidy.c
@@ -22,13 +22,13 @@
*
*************************************/
-#define CRYSTAL_OSC (XTAL_3_579545MHz)
-#define SH8253_CLOCK (CRYSTAL_OSC / 2)
-#define SH6840_CLOCK (CRYSTAL_OSC / 4)
-#define SH6532_CLOCK (CRYSTAL_OSC / 4)
-#define CVSD_CLOCK (1.0 / (0.693 * (RES_K(2.4) + 2.0 * RES_K(20)) * CAP_P(2200)))
-#define CVSD_Z80_CLOCK (CRYSTAL_OSC / 2)
-#define BASE_VOLUME (32767 / 6)
+#define CRYSTAL_OSC (XTAL_3_579545MHz)
+#define SH8253_CLOCK (CRYSTAL_OSC / 2)
+#define SH6840_CLOCK (CRYSTAL_OSC / 4)
+#define SH6532_CLOCK (CRYSTAL_OSC / 4)
+#define CVSD_CLOCK (1.0 / (0.693 * (RES_K(2.4) + 2.0 * RES_K(20)) * CAP_P(2200)))
+#define CVSD_Z80_CLOCK (CRYSTAL_OSC / 2)
+#define BASE_VOLUME (32767 / 6)
enum
{
@@ -48,11 +48,11 @@ enum
/* 6840 variables */
struct sh6840_timer_channel
{
- UINT8 cr;
- UINT8 state;
- UINT8 leftovers;
- UINT16 timer;
- UINT32 clocks;
+ UINT8 cr;
+ UINT8 state;
+ UINT8 leftovers;
+ UINT16 timer;
+ UINT32 clocks;
union
{
#ifdef LSB_FIRST
@@ -66,11 +66,11 @@ struct sh6840_timer_channel
struct sh8253_timer_channel
{
- UINT8 clstate;
- UINT8 enable;
- UINT16 count;
- UINT32 step;
- UINT32 fraction;
+ UINT8 clstate;
+ UINT8 enable;
+ UINT16 count;
+ UINT32 step;
+ UINT32 fraction;
};
struct exidy_sound_state
@@ -110,7 +110,7 @@ struct exidy_sound_state
sound_stream *m_stream;
double m_freq_to_step;
- UINT8 m_victory_sound_response_ack_clk; /* 7474 @ F4 */
+ UINT8 m_victory_sound_response_ack_clk; /* 7474 @ F4 */
};
@@ -207,10 +207,10 @@ INLINE int sh6840_update_noise(exidy_sound_state *state, int clocks)
for (i = 0; i < clocks; i++)
{
/* shift the LFSR. its a LOOOONG LFSR, so we need
- * four longs to hold it all!
- * first we grab new sample, then shift the high bits,
- * then the low ones; finally or in the result and see if we've
- * had a 0->1 transition */
+ * four longs to hold it all!
+ * first we grab new sample, then shift the high bits,
+ * then the low ones; finally or in the result and see if we've
+ * had a 0->1 transition */
newxor = (state->m_sh6840_LFSR_3 ^ state->m_sh6840_LFSR_2) >> 31; /* high bits of 3 and 2 xored is new xor */
state->m_sh6840_LFSR_3 <<= 1;
state->m_sh6840_LFSR_3 |= state->m_sh6840_LFSR_2 >> 31;
@@ -422,14 +422,14 @@ const device_type EXIDY = &device_creator<exidy_sound_device>;
exidy_sound_device::exidy_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, EXIDY, "Exidy SFX", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(exidy_sound_state);
}
exidy_sound_device::exidy_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(exidy_sound_state);
}
@@ -576,11 +576,11 @@ static READ8_DEVICE_HANDLER( r6532_portb_r )
static const riot6532_interface r6532_interface =
{
- DEVCB_DEVICE_HANDLER("custom", r6532_porta_r), /* port A read handler */
- DEVCB_DEVICE_HANDLER("custom", r6532_portb_r), /* port B read handler */
- DEVCB_DEVICE_HANDLER("custom", r6532_porta_w), /* port A write handler */
- DEVCB_DEVICE_HANDLER("custom", r6532_portb_w), /* port B write handler */
- DEVCB_DEVICE_LINE("custom", r6532_irq) /* IRQ callback */
+ DEVCB_DEVICE_HANDLER("custom", r6532_porta_r), /* port A read handler */
+ DEVCB_DEVICE_HANDLER("custom", r6532_portb_r), /* port B read handler */
+ DEVCB_DEVICE_HANDLER("custom", r6532_porta_w), /* port A write handler */
+ DEVCB_DEVICE_HANDLER("custom", r6532_portb_w), /* port B write handler */
+ DEVCB_DEVICE_LINE("custom", r6532_irq) /* IRQ callback */
};
@@ -804,35 +804,35 @@ static WRITE8_DEVICE_HANDLER( exidy_sound_filter_w )
static const pia6821_interface venture_pia0_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DEVICE_MEMBER("pia1", pia6821_device, portb_w), /* port A out */
- DEVCB_DEVICE_MEMBER("pia1", pia6821_device, porta_w), /* port B out */
- DEVCB_DEVICE_LINE_MEMBER("pia1", pia6821_device, cb1_w), /* line CA2 out */
- DEVCB_DEVICE_LINE_MEMBER("pia1", pia6821_device, ca1_w), /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_NULL, /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DEVICE_MEMBER("pia1", pia6821_device, portb_w), /* port A out */
+ DEVCB_DEVICE_MEMBER("pia1", pia6821_device, porta_w), /* port B out */
+ DEVCB_DEVICE_LINE_MEMBER("pia1", pia6821_device, cb1_w), /* line CA2 out */
+ DEVCB_DEVICE_LINE_MEMBER("pia1", pia6821_device, ca1_w), /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
static const pia6821_interface venture_pia1_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DEVICE_MEMBER("pia0", pia6821_device, portb_w), /* port A out */
- DEVCB_DEVICE_MEMBER("pia0", pia6821_device, porta_w), /* port B out */
- DEVCB_DEVICE_LINE_MEMBER("pia0", pia6821_device, cb1_w), /* line CA2 out */
- DEVCB_DEVICE_LINE_MEMBER("pia0", pia6821_device, ca1_w), /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_DEVICE_LINE("custom", update_irq_state) /* IRQB */
+ DEVCB_NULL, /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DEVICE_MEMBER("pia0", pia6821_device, portb_w), /* port A out */
+ DEVCB_DEVICE_MEMBER("pia0", pia6821_device, porta_w), /* port B out */
+ DEVCB_DEVICE_LINE_MEMBER("pia0", pia6821_device, cb1_w), /* line CA2 out */
+ DEVCB_DEVICE_LINE_MEMBER("pia0", pia6821_device, ca1_w), /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_DEVICE_LINE("custom", update_irq_state) /* IRQB */
};
@@ -1032,8 +1032,8 @@ MACHINE_CONFIG_END
*
*************************************/
-#define VICTORY_AUDIO_CPU_CLOCK (XTAL_3_579545MHz / 4)
-#define VICTORY_LOG_SOUND 0
+#define VICTORY_AUDIO_CPU_CLOCK (XTAL_3_579545MHz / 4)
+#define VICTORY_LOG_SOUND 0
@@ -1103,18 +1103,18 @@ static WRITE8_DEVICE_HANDLER( victory_main_ack_w )
static const pia6821_interface victory_pia1_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_NULL, /* port B out */
- DEVCB_DEVICE_HANDLER("custom", victory_sound_irq_clear_w), /* line CA2 out */
- DEVCB_DEVICE_HANDLER("custom", victory_main_ack_w), /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_DEVICE_LINE("custom", update_irq_state) /* IRQB */
+ DEVCB_NULL, /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_NULL, /* port B out */
+ DEVCB_DEVICE_HANDLER("custom", victory_sound_irq_clear_w), /* line CA2 out */
+ DEVCB_DEVICE_HANDLER("custom", victory_main_ack_w), /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_DEVICE_LINE("custom", update_irq_state) /* IRQB */
};
@@ -1145,7 +1145,7 @@ static DEVICE_RESET( victory_sound )
pia1->cb1_w(1);
/* these two lines shouldn't be needed, but it avoids the log entry
- as the sound CPU checks port A before the main CPU ever writes to it */
+ as the sound CPU checks port A before the main CPU ever writes to it */
pia1->set_a_input(0, 0);
pia1->ca1_w(1);
}
diff --git a/src/mame/audio/exidy.h b/src/mame/audio/exidy.h
index 622cecae63e..2631f97112b 100644
--- a/src/mame/audio/exidy.h
+++ b/src/mame/audio/exidy.h
@@ -1,5 +1,5 @@
class exidy_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
exidy_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/mame/audio/exidy440.c b/src/mame/audio/exidy440.c
index 62479ec9fda..9b06ba33650 100644
--- a/src/mame/audio/exidy440.c
+++ b/src/mame/audio/exidy440.c
@@ -12,29 +12,29 @@
#include "audio/exidy440.h"
-#define SOUND_LOG 0
-#define FADE_TO_ZERO 1
+#define SOUND_LOG 0
+#define FADE_TO_ZERO 1
-#define EXIDY440_AUDIO_CLOCK (XTAL_12_9792MHz / 16)
-#define EXIDY440_MC3418_CLOCK (EXIDY440_AUDIO_CLOCK / 16)
-#define EXIDY440_MC3417_CLOCK (EXIDY440_AUDIO_CLOCK / 32)
+#define EXIDY440_AUDIO_CLOCK (XTAL_12_9792MHz / 16)
+#define EXIDY440_MC3418_CLOCK (EXIDY440_AUDIO_CLOCK / 16)
+#define EXIDY440_MC3417_CLOCK (EXIDY440_AUDIO_CLOCK / 32)
/* internal caching */
-#define MAX_CACHE_ENTRIES 1024 /* maximum separate samples we expect to ever see */
-#define SAMPLE_BUFFER_LENGTH 1024 /* size of temporary decode buffer on the stack */
+#define MAX_CACHE_ENTRIES 1024 /* maximum separate samples we expect to ever see */
+#define SAMPLE_BUFFER_LENGTH 1024 /* size of temporary decode buffer on the stack */
/* FIR digital filter parameters */
-#define FIR_HISTORY_LENGTH 57 /* number of FIR coefficients */
+#define FIR_HISTORY_LENGTH 57 /* number of FIR coefficients */
/* CVSD decoding parameters */
-#define INTEGRATOR_LEAK_TC (10e3 * 0.1e-6)
-#define FILTER_DECAY_TC ((18e3 + 3.3e3) * 0.33e-6)
-#define FILTER_CHARGE_TC (18e3 * 0.33e-6)
-#define FILTER_MIN 0.0416
-#define FILTER_MAX 1.0954
-#define SAMPLE_GAIN 10000.0
+#define INTEGRATOR_LEAK_TC (10e3 * 0.1e-6)
+#define FILTER_DECAY_TC ((18e3 + 3.3e3) * 0.33e-6)
+#define FILTER_CHARGE_TC (18e3 * 0.33e-6)
+#define FILTER_MIN 0.0416
+#define FILTER_MAX 1.0954
+#define SAMPLE_GAIN 10000.0
/* channel_data structure holds info about each 6844 DMA channel */
@@ -105,8 +105,8 @@ struct exidy440_audio_state
/* constant channel parameters */
static const int channel_bits[4] =
{
- 4, 4, /* channels 0 and 1 are MC3418s, 4-bit CVSD */
- 3, 3 /* channels 2 and 3 are MC3417s, 3-bit CVSD */
+ 4, 4, /* channels 0 and 1 are MC3418s, 4-bit CVSD */
+ 3, 3 /* channels 2 and 3 are MC3417s, 3-bit CVSD */
};
@@ -125,7 +125,7 @@ static void fir_filter(device_t *device, INT32 *input, INT16 *output, int count)
class exidy440_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
exidy440_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -158,9 +158,9 @@ extern const device_type EXIDY440;
INLINE exidy440_audio_state *get_safe_token(device_t *device)
{
assert(device != NULL);
- assert(device->type() == EXIDY440);
+ assert(device->type() == EXIDY440);
- return (exidy440_audio_state *)downcast<exidy440_sound_device *>(device)->token();
+ return (exidy440_audio_state *)downcast<exidy440_sound_device *>(device)->token();
}
static DEVICE_START( exidy440_sound )
@@ -543,9 +543,9 @@ static READ8_DEVICE_HANDLER( m6844_r )
/* update the global DMA end flag */
state->m6844_interrupt &= ~0x80;
state->m6844_interrupt |= (m6844_channel[0].control & 0x80) |
- (m6844_channel[1].control & 0x80) |
- (m6844_channel[2].control & 0x80) |
- (m6844_channel[3].control & 0x80);
+ (m6844_channel[1].control & 0x80) |
+ (m6844_channel[2].control & 0x80) |
+ (m6844_channel[3].control & 0x80);
result = state->m6844_interrupt;
break;
@@ -993,7 +993,7 @@ const device_type EXIDY440 = &device_creator<exidy440_sound_device>;
exidy440_sound_device::exidy440_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, EXIDY440, "Exidy 440 CVSD", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(exidy440_audio_state);
}
diff --git a/src/mame/audio/firetrk.c b/src/mame/audio/firetrk.c
index a8caeef5eda..d0cda3aa275 100644
--- a/src/mame/audio/firetrk.c
+++ b/src/mame/audio/firetrk.c
@@ -62,11 +62,11 @@ WRITE8_MEMBER(firetrk_state::firetrk_xtndply_w)
}
-#define FIRETRUCK_HSYNC 15750.0 /* not checked */
-#define FIRETRUCK_1V FIRETRUCK_HSYNC/2
-#define FIRETRUCK_2V FIRETRUCK_1V/2
-#define FIRETRUCK_8V FIRETRUCK_1V/8
-#define FIRETRUCK_64V FIRETRUCK_1V/64
+#define FIRETRUCK_HSYNC 15750.0 /* not checked */
+#define FIRETRUCK_1V FIRETRUCK_HSYNC/2
+#define FIRETRUCK_2V FIRETRUCK_1V/2
+#define FIRETRUCK_8V FIRETRUCK_1V/8
+#define FIRETRUCK_64V FIRETRUCK_1V/64
/************************************************************************/
/* firetrk Sound System Analog emulation by K.Wilkins Feb 2001 */
@@ -77,78 +77,78 @@ WRITE8_MEMBER(firetrk_state::firetrk_xtndply_w)
static const discrete_lfsr_desc firetrk_lfsr={
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is not inverted */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is not inverted */
+ 15 /* Output bit */
};
static const discrete_dac_r1_ladder firetrk_motor_v_dac =
{
- 4, // size of ladder
- {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R24, R23, R22, R21
- 4.4, // 5V - diode junction (0.6V)
- RES_K(68), // R25
- 0, // no rGnd
- CAP_U(10) // C24
+ 4, // size of ladder
+ {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R24, R23, R22, R21
+ 4.4, // 5V - diode junction (0.6V)
+ RES_K(68), // R25
+ 0, // no rGnd
+ CAP_U(10) // C24
};
static const discrete_555_cc_desc firetrk_motor_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q2 junction voltage
+ 0.7 // Q2 junction voltage
};
static const discrete_dac_r1_ladder firetrk_motor_out_dac =
{
- 4, // size of ladder
- {RES_K(10), 0,0, RES_K(10)}, // R74, -, -, R73
+ 4, // size of ladder
+ {RES_K(10), 0,0, RES_K(10)}, // R74, -, -, R73
DEFAULT_TTL_V_LOGIC_1,
- 0, // no rBias
- 0, // no rGnd
- CAP_U(0.1) // C43
+ 0, // no rBias
+ 0, // no rGnd
+ CAP_U(0.1) // C43
};
static const discrete_dac_r1_ladder firetrk_siren_cv_dac =
{
- 4, // size of ladder
- {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R46, R47, R45, R48
- 5, // 5V
- RES_K(100), // R49
- RES_K(390), // R44
- CAP_U(10) // C30
+ 4, // size of ladder
+ {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R46, R47, R45, R48
+ 5, // 5V
+ RES_K(100), // R49
+ RES_K(390), // R44
+ CAP_U(10) // C30
};
static const discrete_555_desc firetrk_siren_555 =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_dac_r1_ladder firetrk_bang_dac =
{
- 4, // size of ladder
- {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1), 0,0,0,0}, // R37, R35, R36, R34
- 0, // no vBias
- 0, // no rBias
- 0, // no rGnd
- 0 // no smoothing cap
+ 4, // size of ladder
+ {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1), 0,0,0,0}, // R37, R35, R36, R34
+ 0, // no vBias
+ 0, // no rBias
+ 0, // no rGnd
+ 0 // no smoothing cap
};
static const discrete_schmitt_osc_desc firetrk_screech_osc =
{
- RES_K(2.2), // R29
- 330, // R16
- CAP_U(2.2), // C8
+ RES_K(2.2), // R29
+ 330, // R16
+ CAP_U(2.2), // C8
DEFAULT_74LS14_VALUES,
DISC_SCHMITT_OSC_IN_IS_LOGIC | DISC_SCHMITT_OSC_ENAB_IS_NOR
};
@@ -157,26 +157,26 @@ static const discrete_mixer_desc firetrk_mixer =
{
DISC_MIXER_IS_OP_AMP,
{RES_K(4.7), RES_K(22), RES_K(31.333), RES_K(33), RES_K(10.5456), RES_K(32), RES_K(150)}, // R54, R55, R72||(R70+R71), R53, R56 + R37||R35||R36||R34, R58 + R73||R74, R52
- {0}, // No variable resistor nodes
+ {0}, // No variable resistor nodes
{CAP_U(0.22), CAP_U(0.22), CAP_U(0.01), CAP_U(0.22), CAP_U(0.22), 0, CAP_U(0.22)}, // C34, C32, C44, C35, C33, NA, C31
- 0, // No rI
- RES_K(22), // R43
- 0, // No Filter
- CAP_U(10), // C12
- 5.0 * 820 / (270 + 820), // vBias = 5V * R51/(R41+R51)
- 3400 // final gain
+ 0, // No rI
+ RES_K(22), // R43
+ 0, // No Filter
+ CAP_U(10), // C12
+ 5.0 * 820 / (270 + 820), // vBias = 5V * R51/(R41+R51)
+ 3400 // final gain
};
-#define FIRETRUCK_ATTRACT_INV NODE_09
+#define FIRETRUCK_ATTRACT_INV NODE_09
/* Nodes - Sounds */
-#define FIRETRUCK_NOISE NODE_11
-#define FIRETRUCK_MOTORSND NODE_12
-#define FIRETRUCK_HORNSND NODE_13
-#define FIRETRUCK_SIRENSND NODE_14
-#define FIRETRUCK_BANGSND NODE_15
-#define FIRETRUCK_SCREECHSND NODE_16
-#define FIRETRUCK_BELLSND NODE_17
-#define FIRETRUCK_XTNDPLYSND NODE_18
+#define FIRETRUCK_NOISE NODE_11
+#define FIRETRUCK_MOTORSND NODE_12
+#define FIRETRUCK_HORNSND NODE_13
+#define FIRETRUCK_SIRENSND NODE_14
+#define FIRETRUCK_BANGSND NODE_15
+#define FIRETRUCK_SCREECHSND NODE_16
+#define FIRETRUCK_BELLSND NODE_17
+#define FIRETRUCK_XTNDPLYSND NODE_18
DISCRETE_SOUND_START(firetrk)
/************************************************/
@@ -201,26 +201,26 @@ DISCRETE_SOUND_START(firetrk)
/* summed as the output of the circuit. */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
- RES_K(260), // R26 + R27 @ max
- RES_K(10), // R26 + R27 @ min
+ RES_K(260), // R26 + R27 @ max
+ RES_K(10), // R26 + R27 @ min
DISC_LOGADJ, "R27")
- DISCRETE_DAC_R1(NODE_21, // base of Q1
- FIRETRUCK_MOTOR_DATA, // IC F8, pins 2,5,6,9
+ DISCRETE_DAC_R1(NODE_21, // base of Q1
+ FIRETRUCK_MOTOR_DATA, // IC F8, pins 2,5,6,9
DEFAULT_TTL_V_LOGIC_1,
&firetrk_motor_v_dac)
- DISCRETE_555_CC(NODE_22, 1, // IC B9 pin 3, always enabled
- NODE_21, // vIn
- NODE_20, // current adjust
- CAP_U(0.01), // C25
- RES_M(1), 0, 0, // R28, no rGnd, no rDis
+ DISCRETE_555_CC(NODE_22, 1, // IC B9 pin 3, always enabled
+ NODE_21, // vIn
+ NODE_20, // current adjust
+ CAP_U(0.01), // C25
+ RES_M(1), 0, 0, // R28, no rGnd, no rDis
&firetrk_motor_vco)
- DISCRETE_COUNTER_7492(NODE_23, 1, FIRETRUCK_ATTRACT_EN, // IC A9, QB-QD
- NODE_22, DISC_CLK_ON_F_EDGE) // from IC B9, pin 3
- DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC A9, pin 8
- DISCRETE_COUNTER(NODE_25, 1, FIRETRUCK_ATTRACT_EN, // IC A9, pin 12
- NODE_24, // from IC A9, pin 8
+ DISCRETE_COUNTER_7492(NODE_23, 1, FIRETRUCK_ATTRACT_EN, // IC A9, QB-QD
+ NODE_22, DISC_CLK_ON_F_EDGE) // from IC B9, pin 3
+ DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC A9, pin 8
+ DISCRETE_COUNTER(NODE_25, 1, FIRETRUCK_ATTRACT_EN, // IC A9, pin 12
+ NODE_24, // from IC A9, pin 8
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
- DISCRETE_TRANSFORM3(NODE_26, NODE_23, 2, NODE_25, "01*2+") // Mix QA and QB-D together
+ DISCRETE_TRANSFORM3(NODE_26, NODE_23, 2, NODE_25, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(FIRETRUCK_MOTORSND, NODE_26,
DEFAULT_TTL_V_LOGIC_1,
&firetrk_motor_out_dac)
@@ -240,15 +240,15 @@ DISCRETE_SOUND_START(firetrk)
/* 0000 = 666Hz with 35% duty cycle */
/* 1111 = 526Hz with 63% duty cycle */
/************************************************/
- DISCRETE_DAC_R1(NODE_40, // IC E9, pin 7
- FIRETRUCK_SIREN_DATA, // IC F8, pins 15,16,12,19
+ DISCRETE_DAC_R1(NODE_40, // IC E9, pin 7
+ FIRETRUCK_SIREN_DATA, // IC F8, pins 15,16,12,19
DEFAULT_TTL_V_LOGIC_1,
&firetrk_siren_cv_dac)
DISCRETE_555_ASTABLE_CV(FIRETRUCK_SIRENSND, FIRETRUCK_ATTRACT_INV,
- RES_K(2.2), // R60
- RES_K(10), // R59
- CAP_U(0.1), // C37
- NODE_40, // CV is straight from DAC because op-amp E9 is just x1 buffer
+ RES_K(2.2), // R60
+ RES_K(10), // R59
+ CAP_U(0.1), // C37
+ NODE_40, // CV is straight from DAC because op-amp E9 is just x1 buffer
&firetrk_siren_555)
/************************************************/
@@ -262,10 +262,10 @@ DISCRETE_SOUND_START(firetrk)
/************************************************/
DISCRETE_LFSR_NOISE(FIRETRUCK_NOISE, FIRETRUCK_ATTRACT_INV, FIRETRUCK_ATTRACT_INV, FIRETRUCK_2V, 1.0, 0, 0.5, &firetrk_lfsr)
- DISCRETE_SWITCH(NODE_50, 1, FIRETRUCK_NOISE, 0, // Enable gate K9
- FIRETRUCK_CRASH_DATA) // IC K9, pins 3,6,11,8
- DISCRETE_DAC_R1(FIRETRUCK_BANGSND, // Bang
- NODE_50, // from enable gates K9
+ DISCRETE_SWITCH(NODE_50, 1, FIRETRUCK_NOISE, 0, // Enable gate K9
+ FIRETRUCK_CRASH_DATA) // IC K9, pins 3,6,11,8
+ DISCRETE_DAC_R1(FIRETRUCK_BANGSND, // Bang
+ NODE_50, // from enable gates K9
DEFAULT_TTL_V_LOGIC_1,
&firetrk_bang_dac)
@@ -281,17 +281,17 @@ DISCRETE_SOUND_START(firetrk)
/* counter. */
/************************************************/
DISCRETE_RCDISC2(NODE_70, FIRETRUCK_BELL_EN,
- 4.4, 10, // Q3 instantally charges C42
- 0, RES_K(33), // discharges through R66
- CAP_U(10)) // C42
+ 4.4, 10, // Q3 instantally charges C42
+ 0, RES_K(33), // discharges through R66
+ CAP_U(10)) // C42
DISCRETE_TRANSFORM2(NODE_71, NODE_70,
- 5.0 * 680 / (RES_K(10) + 680), // vRef = 5V * R64 / (R65 + R64)
- "01<") // Output is low until vIn drops below vRef
- DISCRETE_COUNTER(NODE_72, 1, NODE_71, FIRETRUCK_HSYNC, 0, 15, 1, 0, DISC_CLK_IS_FREQ) // IC B10
+ 5.0 * 680 / (RES_K(10) + 680), // vRef = 5V * R64 / (R65 + R64)
+ "01<") // Output is low until vIn drops below vRef
+ DISCRETE_COUNTER(NODE_72, 1, NODE_71, FIRETRUCK_HSYNC, 0, 15, 1, 0, DISC_CLK_IS_FREQ) // IC B10
DISCRETE_TRANSFORM4(FIRETRUCK_BELLSND, NODE_72,
- 8, // count 0-7 allow cap voltage to output. 8-15 ground output.
- NODE_70, // scale logic to cap voltage
- RES_K(47) / (RES_K(47) + RES_K(47) + RES_K(47)), // to drop voltage per divider R72 / (R70+R71+R72)
+ 8, // count 0-7 allow cap voltage to output. 8-15 ground output.
+ NODE_70, // scale logic to cap voltage
+ RES_K(47) / (RES_K(47) + RES_K(47) + RES_K(47)), // to drop voltage per divider R72 / (R70+R71+R72)
"01<2*3*")
/************************************************/
@@ -317,47 +317,47 @@ DISCRETE_SOUND_END
static const discrete_dac_r1_ladder superbug_motor_v_dac =
{
- 4, // size of ladder
- {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R8, R9, R6, R7
- 4.4, // 5V - diode junction (0.6V)
- RES_K(68), // R10
- 0, // no rGnd
- CAP_U(10) // C20
+ 4, // size of ladder
+ {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R8, R9, R6, R7
+ 4.4, // 5V - diode junction (0.6V)
+ RES_K(68), // R10
+ 0, // no rGnd
+ CAP_U(10) // C20
};
static const discrete_555_cc_desc superbug_motor_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q1 junction voltage
+ 0.7 // Q1 junction voltage
};
static const discrete_dac_r1_ladder superbug_motor_out_dac =
{
- 4, // size of ladder
- {RES_K(10), 0,0, RES_K(10)}, // R34, -, -, R32
+ 4, // size of ladder
+ {RES_K(10), 0,0, RES_K(10)}, // R34, -, -, R32
DEFAULT_TTL_V_LOGIC_1,
- 0, // no rBias
- 0, // no rGnd
- CAP_U(0.1) // C26
+ 0, // no rBias
+ 0, // no rGnd
+ CAP_U(0.1) // C26
};
static const discrete_dac_r1_ladder superbug_bang_dac =
{
- 4, // size of ladder
- {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1), 0,0,0,0}, // R28, R28, R27, R26
- 0, // no vBias
- 0, // no rBias
- 0, // no rGnd
- CAP_U(0.1) // C25
+ 4, // size of ladder
+ {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1), 0,0,0,0}, // R28, R28, R27, R26
+ 0, // no vBias
+ 0, // no rBias
+ 0, // no rGnd
+ CAP_U(0.1) // C25
};
static const discrete_schmitt_osc_desc superbug_screech_osc =
{
- RES_K(2.2), // R30
- 330, // R52
- CAP_U(2.2), // C27
+ RES_K(2.2), // R30
+ 330, // R52
+ CAP_U(2.2), // C27
DEFAULT_7414_VALUES,
DISC_SCHMITT_OSC_IN_IS_LOGIC | DISC_SCHMITT_OSC_ENAB_IS_NOR
};
@@ -366,24 +366,24 @@ static const discrete_mixer_desc superbug_mixer =
{
DISC_MIXER_IS_RESISTOR,
{RES_K(15), RES_K(10.5456), RES_K(33), RES_K(4.7)}, // R54, R55, R72||(R70+R71), R53, R56 + R37||R35||R36||R34, R58 + R73||R74, R52
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- RES_K(5), // R63
- 0, // No Filter
- CAP_U(0.1), // C35
- 0, // not used in resistor network
- 33000 // final gain
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ RES_K(5), // R63
+ 0, // No Filter
+ CAP_U(0.1), // C35
+ 0, // not used in resistor network
+ 33000 // final gain
};
/* Nodes - Inputs */
-#define SUPERBUG_ATTRACT_INV NODE_09
+#define SUPERBUG_ATTRACT_INV NODE_09
/* Nodes - Sounds */
-#define SUPERBUG_NOISE NODE_10
-#define SUPERBUG_MOTORSND NODE_11
-#define SUPERBUG_BANGSND NODE_12
-#define SUPERBUG_SCREECHSND NODE_13
-#define SUPERBUG_ASRSND NODE_14
+#define SUPERBUG_NOISE NODE_10
+#define SUPERBUG_MOTORSND NODE_11
+#define SUPERBUG_BANGSND NODE_12
+#define SUPERBUG_SCREECHSND NODE_13
+#define SUPERBUG_ASRSND NODE_14
DISCRETE_SOUND_START(superbug)
/************************************************/
@@ -404,28 +404,28 @@ DISCRETE_SOUND_START(superbug)
/* drive a modulo 12 counter. */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
- RES_K(260), // R12 + R62 @ max
- RES_K(10), // R12 + R62 @ min
+ RES_K(260), // R12 + R62 @ max
+ RES_K(10), // R12 + R62 @ min
DISC_LOGADJ, "R62")
- DISCRETE_DAC_R1(NODE_21, // base of Q1
- SUPERBUG_SPEED_DATA, // IC B5, pins 3, 14, 6, 11
+ DISCRETE_DAC_R1(NODE_21, // base of Q1
+ SUPERBUG_SPEED_DATA, // IC B5, pins 3, 14, 6, 11
DEFAULT_TTL_V_LOGIC_1,
&superbug_motor_v_dac)
- DISCRETE_555_CC(NODE_22, 1, // IC A6 pin 3, always enabled
- NODE_21, // vIn
- NODE_20, // current adjust
- CAP_U(0.01), // C21
- RES_M(3.3), 0, 0, // R11, no rGnd, no rDis
+ DISCRETE_555_CC(NODE_22, 1, // IC A6 pin 3, always enabled
+ NODE_21, // vIn
+ NODE_20, // current adjust
+ CAP_U(0.01), // C21
+ RES_M(3.3), 0, 0, // R11, no rGnd, no rDis
&superbug_motor_vco)
- DISCRETE_COUNTER_7492(NODE_23, 1, SUPERBUG_ATTRACT_EN, // IC A7, QB-QD
- NODE_22, DISC_CLK_ON_F_EDGE) // from IC A6, pin 3
- DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC A7, pin 8-QD
- DISCRETE_TRANSFORM2(NODE_25, NODE_23, 0x01, "01&") // IC A7, pin 11-QB
- DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 8
- DISCRETE_COUNTER(NODE_27, 1, SUPERBUG_ATTRACT_EN, // IC A7, pin 12-QA
- NODE_26, // from IC A9, pin 8
+ DISCRETE_COUNTER_7492(NODE_23, 1, SUPERBUG_ATTRACT_EN, // IC A7, QB-QD
+ NODE_22, DISC_CLK_ON_F_EDGE) // from IC A6, pin 3
+ DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC A7, pin 8-QD
+ DISCRETE_TRANSFORM2(NODE_25, NODE_23, 0x01, "01&") // IC A7, pin 11-QB
+ DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 8
+ DISCRETE_COUNTER(NODE_27, 1, SUPERBUG_ATTRACT_EN, // IC A7, pin 12-QA
+ NODE_26, // from IC A9, pin 8
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
- DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
+ DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(SUPERBUG_MOTORSND, NODE_28,
DEFAULT_TTL_V_LOGIC_1,
&superbug_motor_out_dac)
@@ -439,12 +439,12 @@ DISCRETE_SOUND_START(superbug)
/* Output is binary weighted with 4 bits of */
/* crash volume. */
/************************************************/
- DISCRETE_LFSR_NOISE(SUPERBUG_NOISE, SUPERBUG_ATTRACT_INV, SUPERBUG_ATTRACT_INV, FIRETRUCK_2V, 1.0, 0, 0.5, &firetrk_lfsr) // Same as firetrk
+ DISCRETE_LFSR_NOISE(SUPERBUG_NOISE, SUPERBUG_ATTRACT_INV, SUPERBUG_ATTRACT_INV, FIRETRUCK_2V, 1.0, 0, 0.5, &firetrk_lfsr) // Same as firetrk
- DISCRETE_SWITCH(NODE_40, 1, SUPERBUG_NOISE, 0, // Enable gate C8
- SUPERBUG_CRASH_DATA) // IC D8, pins 3,14,6,11
- DISCRETE_DAC_R1(SUPERBUG_BANGSND, // Bang
- NODE_40, // from enable gates C8
+ DISCRETE_SWITCH(NODE_40, 1, SUPERBUG_NOISE, 0, // Enable gate C8
+ SUPERBUG_CRASH_DATA) // IC D8, pins 3,14,6,11
+ DISCRETE_DAC_R1(SUPERBUG_BANGSND, // Bang
+ NODE_40, // from enable gates C8
DEFAULT_TTL_V_LOGIC_1,
&superbug_bang_dac)
@@ -477,68 +477,68 @@ DISCRETE_SOUND_END
/* Both cars use same parts for v_dac, vco and out_dac */
static const discrete_dac_r1_ladder montecar_motor_v_dac =
{
- 4, // size of ladder
- {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R44, R43, R46, R45
- 4.4, // 5V - diode junction (0.6V)
- RES_K(68), // R80
- 0, // no rGnd
- CAP_U(4.7) // C77
+ 4, // size of ladder
+ {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220), 0,0,0,0}, // R44, R43, R46, R45
+ 4.4, // 5V - diode junction (0.6V)
+ RES_K(68), // R80
+ 0, // no rGnd
+ CAP_U(4.7) // C77
};
static const discrete_555_cc_desc montecar_motor_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q1 junction voltage
+ 0.7 // Q1 junction voltage
};
static const discrete_dac_r1_ladder montecar_motor_out_dac =
{
- 4, // size of ladder
- {RES_K(10), RES_K(10), 0, RES_K(10)}, // R31, R30, -, R29
+ 4, // size of ladder
+ {RES_K(10), RES_K(10), 0, RES_K(10)}, // R31, R30, -, R29
DEFAULT_TTL_V_LOGIC_1,
- 0, // no rBias
- 0, // no rGnd
- CAP_U(0.1) // C53
+ 0, // no rBias
+ 0, // no rGnd
+ CAP_U(0.1) // C53
};
static const discrete_comp_adder_table montecar_drone_vol_res =
{
DISC_COMP_P_RESISTOR,
- 0, // no default
- 4, // # of resistors
- {RES_K(100.25), RES_K(47.25), RES_K(22.25), RES_K(10.25), 0,0,0,0} // R105, R104, R103, R102 (250 added to all for 4066 resistance)
+ 0, // no default
+ 4, // # of resistors
+ {RES_K(100.25), RES_K(47.25), RES_K(22.25), RES_K(10.25), 0,0,0,0} // R105, R104, R103, R102 (250 added to all for 4066 resistance)
};
static const discrete_dac_r1_ladder montecar_bang_dac =
{
- 4, // size of ladder
- {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1), 0,0,0,0}, // R39, R42, R41, R40
- 0, // no vBias
- 0, // no rBias
- 0, // no rGnd
- 0 // no cSmoothing
+ 4, // size of ladder
+ {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1), 0,0,0,0}, // R39, R42, R41, R40
+ 0, // no vBias
+ 0, // no rBias
+ 0, // no rGnd
+ 0 // no cSmoothing
};
static const discrete_op_amp_filt_info montecar_bang_filt =
{
- 1.0/(1.0/RES_K(8.2) + 1.0/RES_K(3.9) + 1.0/RES_K(2.2) + 1.0/RES_K(1)) + RES_K(3.3), // R39, R42, R41, R40, r82
+ 1.0/(1.0/RES_K(8.2) + 1.0/RES_K(3.9) + 1.0/RES_K(2.2) + 1.0/RES_K(1)) + RES_K(3.3), // R39, R42, R41, R40, r82
0,
- 680, // R83
+ 680, // R83
0,
- RES_K(330), // r84
- CAP_U(.1), // c79
- CAP_U(.1), // c78
+ RES_K(330), // r84
+ CAP_U(.1), // c79
+ CAP_U(.1), // c78
0,
5, 12, 0
};
static const discrete_schmitt_osc_desc montecar_screech_osc =
{
- RES_K(2.2), // R54
- 330, // R53
- CAP_U(2.2), // C57
+ RES_K(2.2), // R54
+ 330, // R53
+ CAP_U(2.2), // C57
DEFAULT_74LS14_VALUES,
DISC_SCHMITT_OSC_IN_IS_LOGIC | DISC_SCHMITT_OSC_ENAB_IS_NOR
};
@@ -547,31 +547,31 @@ static const discrete_mixer_desc montecar_mixer =
{
DISC_MIXER_IS_OP_AMP,
{RES_K(15), RES_K(33), RES_K(10), RES_K(10), RES_K(13.3333)}, // R93, R97, R96, variable , R95 + R31||R30||R29
- {0,0,0,NODE_30,0}, // Only drone has variable node
- {CAP_U(0.22), CAP_U(0.22), CAP_U(0.22), CAP_U(1), CAP_U(1)}, // C83, C84, C85, C88, C47
- RES_K(27), // R92
- RES_K(82), // R98
- 0, // No Filter
- CAP_U(0.22), // C6
- 5, // vRef
- 5000 // final gain
+ {0,0,0,NODE_30,0}, // Only drone has variable node
+ {CAP_U(0.22), CAP_U(0.22), CAP_U(0.22), CAP_U(1), CAP_U(1)}, // C83, C84, C85, C88, C47
+ RES_K(27), // R92
+ RES_K(82), // R98
+ 0, // No Filter
+ CAP_U(0.22), // C6
+ 5, // vRef
+ 5000 // final gain
};
-#define MONTECAR_ATTRACT_EN NODE_09
+#define MONTECAR_ATTRACT_EN NODE_09
/* Nodes - Sounds */
-#define MONTECAR_NOISE NODE_15
-#define MONTECAR_MOTORSND NODE_10 // MotorAud1
-#define MONTECAR_BEEPSND NODE_11
-#define MONTECAR_DRONE_MOTORSND NODE_12 // MotorAud2
-#define MONTECAR_BANGSND NODE_13
-#define MONTECAR_SCREECHSND NODE_14
+#define MONTECAR_NOISE NODE_15
+#define MONTECAR_MOTORSND NODE_10 // MotorAud1
+#define MONTECAR_BEEPSND NODE_11
+#define MONTECAR_DRONE_MOTORSND NODE_12 // MotorAud2
+#define MONTECAR_BANGSND NODE_13
+#define MONTECAR_SCREECHSND NODE_14
DISCRETE_SOUND_START(montecar)
/************************************************/
/* Input register mapping for montecar */
/************************************************/
- DISCRETE_INPUT_DATA (MONTECAR_MOTOR_DATA) // Motor 1-4
- DISCRETE_INPUT_DATA (MONTECAR_DRONE_MOTOR_DATA) // Motor 5-8
+ DISCRETE_INPUT_DATA (MONTECAR_MOTOR_DATA) // Motor 1-4
+ DISCRETE_INPUT_DATA (MONTECAR_DRONE_MOTOR_DATA) // Motor 5-8
DISCRETE_INPUTX_DATA(MONTECAR_CRASH_DATA, -1, 0x0f, 0)
DISCRETE_INPUT_LOGIC(MONTECAR_SKID_EN )
DISCRETE_INPUT_DATA (MONTECAR_DRONE_LOUD_DATA)
@@ -588,28 +588,28 @@ DISCRETE_SOUND_START(montecar)
/* summed as the output of the circuit. */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
- RES_K(260), // R87 + R89 @ max
- RES_K(10), // R87 + R89 @ min
+ RES_K(260), // R87 + R89 @ max
+ RES_K(10), // R87 + R89 @ min
DISC_LOGADJ, "R89")
- DISCRETE_DAC_R1(NODE_21, // base of Q7
- MONTECAR_MOTOR_DATA, // IC H8, pins 5, 2, 9, 6
+ DISCRETE_DAC_R1(NODE_21, // base of Q7
+ MONTECAR_MOTOR_DATA, // IC H8, pins 5, 2, 9, 6
DEFAULT_TTL_V_LOGIC_1,
&montecar_motor_v_dac)
- DISCRETE_555_CC(NODE_22, 1, // IC C9 pin 9
- NODE_21, // vIn
- NODE_20, // current adjust
- CAP_U(0.01), // C81
- RES_M(1), 0, 0, // R86, no rGnd, no rDis
+ DISCRETE_555_CC(NODE_22, 1, // IC C9 pin 9
+ NODE_21, // vIn
+ NODE_20, // current adjust
+ CAP_U(0.01), // C81
+ RES_M(1), 0, 0, // R86, no rGnd, no rDis
&montecar_motor_vco)
- DISCRETE_COUNTER_7492(NODE_23, 1, MONTECAR_ATTRACT_EN, // IC B/C9, QB-QD
- NODE_22, DISC_CLK_ON_F_EDGE) // from IC C9, pin 9
- DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC B/C9, pin 8-QD
- DISCRETE_TRANSFORM2(NODE_25, NODE_23, 0x01, "01&") // IC B/C9, pin 11-QB
- DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 11
- DISCRETE_COUNTER(NODE_27, 1, MONTECAR_ATTRACT_EN, // IC B/C9, pin 12-QA
- NODE_26, // from IC A9, pin 11
+ DISCRETE_COUNTER_7492(NODE_23, 1, MONTECAR_ATTRACT_EN, // IC B/C9, QB-QD
+ NODE_22, DISC_CLK_ON_F_EDGE) // from IC C9, pin 9
+ DISCRETE_TRANSFORM2(NODE_24, NODE_23, 0x04, "01&") // IC B/C9, pin 8-QD
+ DISCRETE_TRANSFORM2(NODE_25, NODE_23, 0x01, "01&") // IC B/C9, pin 11-QB
+ DISCRETE_LOGIC_XOR(NODE_26, NODE_24, NODE_25) // Gate A9, pin 11
+ DISCRETE_COUNTER(NODE_27, 1, MONTECAR_ATTRACT_EN, // IC B/C9, pin 12-QA
+ NODE_26, // from IC A9, pin 11
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
- DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
+ DISCRETE_TRANSFORM3(NODE_28, NODE_23, 2, NODE_27, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(MONTECAR_MOTORSND, NODE_28,
DEFAULT_TTL_V_LOGIC_1,
&montecar_motor_out_dac)
@@ -620,31 +620,31 @@ DISCRETE_SOUND_START(montecar)
/* Also I shifted the frequencies up for it to */
/* sound different from the player's car. */
/************************************************/
- DISCRETE_COMP_ADDER(NODE_30, MONTECAR_DRONE_LOUD_DATA, &montecar_drone_vol_res) // make sure to change the node value in the mixer table if you change this node number
+ DISCRETE_COMP_ADDER(NODE_30, MONTECAR_DRONE_LOUD_DATA, &montecar_drone_vol_res) // make sure to change the node value in the mixer table if you change this node number
DISCRETE_ADJUSTMENT(NODE_40,
- RES_K(260), // R85 + R88 @ max
- RES_K(10), // R85 + R88 @ min
+ RES_K(260), // R85 + R88 @ max
+ RES_K(10), // R85 + R88 @ min
DISC_LOGADJ, "R88")
- DISCRETE_DAC_R1(NODE_41, // base of Q7
- MONTECAR_DRONE_MOTOR_DATA, // IC H8, pins 19, 16, 12, 15
+ DISCRETE_DAC_R1(NODE_41, // base of Q7
+ MONTECAR_DRONE_MOTOR_DATA, // IC H8, pins 19, 16, 12, 15
DEFAULT_TTL_V_LOGIC_1,
&montecar_motor_v_dac)
- DISCRETE_555_CC(NODE_42, 1, // IC C9 pin 5
- NODE_41, // vIn
- NODE_40, // current adjust
- CAP_U(0.01), // C80
- RES_M(1), 0, 0, // R81, no rGnd, no rDis
+ DISCRETE_555_CC(NODE_42, 1, // IC C9 pin 5
+ NODE_41, // vIn
+ NODE_40, // current adjust
+ CAP_U(0.01), // C80
+ RES_M(1), 0, 0, // R81, no rGnd, no rDis
&montecar_motor_vco)
- DISCRETE_COUNTER_7492(NODE_43, 1, MONTECAR_ATTRACT_EN, // IC A/B9, QB-QD
- NODE_42, DISC_CLK_ON_F_EDGE) // from IC C9, pin 5
- DISCRETE_TRANSFORM2(NODE_44, NODE_43, 0x04, "01&") // IC A/B9, pin 8-QD
- DISCRETE_TRANSFORM2(NODE_45, NODE_43, 0x01, "01&") // IC A/B9, pin 11-QB
- DISCRETE_LOGIC_XOR(NODE_46, NODE_44, NODE_45) // Gate A9, pin 6
- DISCRETE_COUNTER(NODE_47, 1, MONTECAR_ATTRACT_EN, // IC A/B9, pin 12-QA
- NODE_46, // from IC A9, pin 6
+ DISCRETE_COUNTER_7492(NODE_43, 1, MONTECAR_ATTRACT_EN, // IC A/B9, QB-QD
+ NODE_42, DISC_CLK_ON_F_EDGE) // from IC C9, pin 5
+ DISCRETE_TRANSFORM2(NODE_44, NODE_43, 0x04, "01&") // IC A/B9, pin 8-QD
+ DISCRETE_TRANSFORM2(NODE_45, NODE_43, 0x01, "01&") // IC A/B9, pin 11-QB
+ DISCRETE_LOGIC_XOR(NODE_46, NODE_44, NODE_45) // Gate A9, pin 6
+ DISCRETE_COUNTER(NODE_47, 1, MONTECAR_ATTRACT_EN, // IC A/B9, pin 12-QA
+ NODE_46, // from IC A9, pin 6
0, 1, 1, 0, DISC_CLK_ON_F_EDGE)
- DISCRETE_TRANSFORM3(NODE_48, NODE_43, 2, NODE_47, "01*2+") // Mix QA and QB-D together
+ DISCRETE_TRANSFORM3(NODE_48, NODE_43, 2, NODE_47, "01*2+") // Mix QA and QB-D together
DISCRETE_DAC_R1(MONTECAR_DRONE_MOTORSND, NODE_48,
DEFAULT_TTL_V_LOGIC_1,
&montecar_motor_out_dac)
@@ -658,12 +658,12 @@ DISCRETE_SOUND_START(montecar)
/* Output is binary weighted with 4 bits of */
/* crash volume. */
/************************************************/
- DISCRETE_LFSR_NOISE(MONTECAR_NOISE, MONTECAR_ATTRACT_INV, MONTECAR_ATTRACT_INV,FIRETRUCK_2V , 1.0, 0, 0.5, &firetrk_lfsr) // Same as firetrk
+ DISCRETE_LFSR_NOISE(MONTECAR_NOISE, MONTECAR_ATTRACT_INV, MONTECAR_ATTRACT_INV,FIRETRUCK_2V , 1.0, 0, 0.5, &firetrk_lfsr) // Same as firetrk
- DISCRETE_SWITCH(NODE_50, 1, MONTECAR_NOISE, 0, // Enable gate A9
- MONTECAR_CRASH_DATA) // IC J8, pins 3,6,11,14
- DISCRETE_DAC_R1(NODE_51, // Bang
- NODE_50, // from enable gates A9
+ DISCRETE_SWITCH(NODE_50, 1, MONTECAR_NOISE, 0, // Enable gate A9
+ MONTECAR_CRASH_DATA) // IC J8, pins 3,6,11,14
+ DISCRETE_DAC_R1(NODE_51, // Bang
+ NODE_50, // from enable gates A9
DEFAULT_TTL_V_LOGIC_1,
&montecar_bang_dac)
DISCRETE_OP_AMP_FILTER(MONTECAR_BANGSND, 1, NODE_51, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &montecar_bang_filt)
diff --git a/src/mame/audio/flower.c b/src/mame/audio/flower.c
index 480553ecc93..5b043cb0038 100644
--- a/src/mame/audio/flower.c
+++ b/src/mame/audio/flower.c
@@ -13,10 +13,10 @@ TODO:
#include "emu.h"
#include "includes/flower.h"
-#define FLOWER_VERBOSE 0 // show register writes
+#define FLOWER_VERBOSE 0 // show register writes
-#define MIXER_SAMPLERATE 48000 /* ? (native freq is probably in the MHz range) */
-#define MIXER_DEFGAIN 48
+#define MIXER_SAMPLERATE 48000 /* ? (native freq is probably in the MHz range) */
+#define MIXER_DEFGAIN 48
/* this structure defines the parameters for a channel */
@@ -358,7 +358,7 @@ const device_type FLOWER = &device_creator<flower_sound_device>;
flower_sound_device::flower_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, FLOWER, "Flower Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(flower_sound_state);
}
@@ -400,5 +400,3 @@ void flower_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/galaga.c b/src/mame/audio/galaga.c
index 0293e2f56f5..8a6a93e99ee 100644
--- a/src/mame/audio/galaga.c
+++ b/src/mame/audio/galaga.c
@@ -18,32 +18,32 @@
*************************************/
/* nodes - sounds */
-#define BOSCO_CHANL1_SND NODE_11
-#define BOSCO_CHANL2_SND NODE_12
-#define BOSCO_CHANL3_SND NODE_13
-#define BOSCO_CHANL4_SND NODE_14
+#define BOSCO_CHANL1_SND NODE_11
+#define BOSCO_CHANL2_SND NODE_12
+#define BOSCO_CHANL3_SND NODE_13
+#define BOSCO_CHANL4_SND NODE_14
#define BOSCO_54XX_DAC_R (1.0 / (1.0 / RES_K(47) + 1.0 / RES_K(22) + 1.0 / RES_K(10) + 1.0 / RES_K(4.7)))
static const discrete_dac_r1_ladder bosco_54xx_dac =
{
- 4, /* number of DAC bits */
+ 4, /* number of DAC bits */
/* 54XX_0 54XX_1 54XX_2 */
- { RES_K(47), /* R28, R32, R46 */
- RES_K(22), /* R27, R31, R45 */
- RES_K(10), /* R26, R30, R44 */
- RES_K(4.7)}, /* R25, R29, R43 */
- 0, 0, 0, 0 /* nothing extra */
+ { RES_K(47), /* R28, R32, R46 */
+ RES_K(22), /* R27, R31, R45 */
+ RES_K(10), /* R26, R30, R44 */
+ RES_K(4.7)}, /* R25, R29, R43 */
+ 0, 0, 0, 0 /* nothing extra */
};
#define BOSCO_52XX_DAC_R (1.0 / (1.0 / RES_K(100) + 1.0 / RES_K(47) + 1.0 / RES_K(22) + 1.0 / RES_K(10)))
static const discrete_dac_r1_ladder bosco_52xx_dac =
{
- 4, /* number of DAC bits */
- { RES_K(100), /* R14 */
- RES_K(47), /* R13 */
- RES_K(22), /* R12 */
- RES_K(10)}, /* R11 */
- 0, 0, 0, 0 /* nothing extra */
+ 4, /* number of DAC bits */
+ { RES_K(100), /* R14 */
+ RES_K(47), /* R13 */
+ RES_K(22), /* R12 */
+ RES_K(10)}, /* R11 */
+ 0, 0, 0, 0 /* nothing extra */
};
/* R39 R38 R39 */
@@ -51,167 +51,167 @@ static const discrete_dac_r1_ladder bosco_52xx_dac =
static const discrete_op_amp_filt_info bosco_chanl1_filt =
{
- BOSCO_54XX_DAC_R + RES_K(100), /* R24 */
- 0, /* no second input */
- RES_K(22), /* R23 */
- 0, /* not used */
- RES_K(220), /* R22 */
- CAP_U(0.001), /* C31 */
- CAP_U(0.001), /* C30 */
- 0, /* not used */
- BOSCO_VREF, /* vRef */
- 5, /* vP */
- 0 /* vN */
+ BOSCO_54XX_DAC_R + RES_K(100), /* R24 */
+ 0, /* no second input */
+ RES_K(22), /* R23 */
+ 0, /* not used */
+ RES_K(220), /* R22 */
+ CAP_U(0.001), /* C31 */
+ CAP_U(0.001), /* C30 */
+ 0, /* not used */
+ BOSCO_VREF, /* vRef */
+ 5, /* vP */
+ 0 /* vN */
};
static const discrete_op_amp_filt_info bosco_chanl2_filt =
{
- BOSCO_54XX_DAC_R + RES_K(47), /* R33 */
- 0, /* no second input */
- RES_K(10), /* R34 */
- 0, /* not used */
- RES_K(150), /* R35 */
- CAP_U(0.01), /* C29 */
- CAP_U(0.01), /* C28 */
- 0, /* not used */
- BOSCO_VREF, /* vRef */
- 5, /* vP */
- 0 /* vN */
+ BOSCO_54XX_DAC_R + RES_K(47), /* R33 */
+ 0, /* no second input */
+ RES_K(10), /* R34 */
+ 0, /* not used */
+ RES_K(150), /* R35 */
+ CAP_U(0.01), /* C29 */
+ CAP_U(0.01), /* C28 */
+ 0, /* not used */
+ BOSCO_VREF, /* vRef */
+ 5, /* vP */
+ 0 /* vN */
};
static const discrete_op_amp_filt_info bosco_chanl3_filt =
{
- BOSCO_54XX_DAC_R + RES_K(150), /* R42 */
- 0, /* no second input */
- RES_K(22), /* R41 */
- 0, /* not used */
- RES_K(470), /* R40 */
- CAP_U(0.01), /* C27 */
- CAP_U(0.01), /* C26 */
- 0, /* not used */
- BOSCO_VREF, /* vRef */
- 5, /* vP */
- 0 /* vN */
+ BOSCO_54XX_DAC_R + RES_K(150), /* R42 */
+ 0, /* no second input */
+ RES_K(22), /* R41 */
+ 0, /* not used */
+ RES_K(470), /* R40 */
+ CAP_U(0.01), /* C27 */
+ CAP_U(0.01), /* C26 */
+ 0, /* not used */
+ BOSCO_VREF, /* vRef */
+ 5, /* vP */
+ 0 /* vN */
};
static const discrete_mixer_desc bosco_filter_mixer =
{
DISC_MIXER_IS_OP_AMP,
- { RES_K(33), /* R21 */
- RES_K(33), /* R36 */
- RES_K(10)}, /* R37 */
- {0}, /* no rNode{} */
- {0}, /* no c{} */
- 0, /* no rI */
- RES_K(3.3), /* R20 */
- 0, /* no cF */
- 0, /* no cAmp */
- BOSCO_VREF, /* vRef */
- 1, /* gain */
+ { RES_K(33), /* R21 */
+ RES_K(33), /* R36 */
+ RES_K(10)}, /* R37 */
+ {0}, /* no rNode{} */
+ {0}, /* no c{} */
+ 0, /* no rI */
+ RES_K(3.3), /* R20 */
+ 0, /* no cF */
+ 0, /* no cAmp */
+ BOSCO_VREF, /* vRef */
+ 1, /* gain */
};
static const discrete_mixer_desc bosco_final_mixer =
{
DISC_MIXER_IS_RESISTOR,
- { RES_K(10), /* R51 */
- RES_K(10)}, /* R55 */
- {0}, /* no rNode{} */
- {0}, /* no c{} */
- 0, /* no rI */
- RES_K(1), /* VR1 */
- 0, /* no cF */
- CAP_U(0.1), /* C18 */
- 0, /* vRef */
- 462000 /* gain */
+ { RES_K(10), /* R51 */
+ RES_K(10)}, /* R55 */
+ {0}, /* no rNode{} */
+ {0}, /* no c{} */
+ 0, /* no rI */
+ RES_K(1), /* VR1 */
+ 0, /* no cF */
+ CAP_U(0.1), /* C18 */
+ 0, /* vRef */
+ 462000 /* gain */
};
DISCRETE_SOUND_START(bosco)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_DATA(NAMCO_54XX_0_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_54XX_1_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_54XX_2_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_52XX_P_DATA(NODE_04))
/************************************************
- * CHANL1 sound
- ************************************************/
+ * CHANL1 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_20,
NAMCO_54XX_2_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&bosco_54xx_dac)
DISCRETE_OP_AMP_FILTER(BOSCO_CHANL1_SND,
- 1, /* ENAB */
- NODE_20, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_20, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &bosco_chanl1_filt)
/************************************************
- * CHANL2 sound
- ************************************************/
+ * CHANL2 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_30,
NAMCO_54XX_1_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&bosco_54xx_dac)
DISCRETE_OP_AMP_FILTER(BOSCO_CHANL2_SND,
- 1, /* ENAB */
- NODE_30, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_30, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &bosco_chanl2_filt)
/************************************************
- * CHANL3 sound
- ************************************************/
+ * CHANL3 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_40,
NAMCO_54XX_0_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&bosco_54xx_dac)
DISCRETE_OP_AMP_FILTER(BOSCO_CHANL3_SND,
- 1, /* ENAB */
- NODE_40, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_40, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &bosco_chanl3_filt)
/************************************************
- * CHANL4 sound
- ************************************************/
+ * CHANL4 sound
+ ************************************************/
/* this circuit was simulated in SPICE and an equivalent filter circuit generated */
DISCRETE_DAC_R1(NODE_50,
NAMCO_52XX_P_DATA(NODE_04),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&bosco_52xx_dac)
DISCRETE_FILTER2(NODE_51,
- 1, /* ENAB */
- NODE_50, /* INP0 */
- 80, /* FREQ */
- 1.0 / 0.3, /* DAMP */
+ 1, /* ENAB */
+ NODE_50, /* INP0 */
+ 80, /* FREQ */
+ 1.0 / 0.3, /* DAMP */
DISC_FILTER_HIGHPASS)
DISCRETE_FILTER2(NODE_52,
- 1, /* ENAB */
- NODE_51, /* INP0 */
- 2400, /* FREQ */
- 1.0 / 0.9, /* DAMP */
+ 1, /* ENAB */
+ NODE_51, /* INP0 */
+ 2400, /* FREQ */
+ 1.0 / 0.9, /* DAMP */
DISC_FILTER_LOWPASS)
DISCRETE_GAIN(BOSCO_CHANL4_SND,
- NODE_52, /* IN0 */
- 0.25 /* overall filter GAIN */)
+ NODE_52, /* IN0 */
+ 0.25 /* overall filter GAIN */)
/************************************************
- * Output
- ************************************************/
+ * Output
+ ************************************************/
DISCRETE_MIXER3(NODE_90,
- 1, /* ENAB */
- BOSCO_CHANL1_SND, /* IN0 */
- BOSCO_CHANL2_SND, /* IN1 */
- BOSCO_CHANL3_SND, /* IN2 */
- &bosco_filter_mixer /* INFO */)
+ 1, /* ENAB */
+ BOSCO_CHANL1_SND, /* IN0 */
+ BOSCO_CHANL2_SND, /* IN1 */
+ BOSCO_CHANL3_SND, /* IN2 */
+ &bosco_filter_mixer /* INFO */)
DISCRETE_MIXER2(NODE_91,
- 1, /* ENAB */
- NODE_90, /* IN0 */
- BOSCO_CHANL4_SND, /* IN1 */
- &bosco_final_mixer /* INFO */)
+ 1, /* ENAB */
+ NODE_90, /* IN0 */
+ BOSCO_CHANL4_SND, /* IN1 */
+ &bosco_final_mixer /* INFO */)
DISCRETE_OUTPUT(NODE_91, 1)
DISCRETE_SOUND_END
@@ -226,20 +226,20 @@ DISCRETE_SOUND_END
*************************************/
/* nodes - sounds */
-#define GALAGA_CHANL1_SND NODE_11
-#define GALAGA_CHANL2_SND NODE_12
-#define GALAGA_CHANL3_SND NODE_13
+#define GALAGA_CHANL1_SND NODE_11
+#define GALAGA_CHANL2_SND NODE_12
+#define GALAGA_CHANL3_SND NODE_13
#define GALAGA_54XX_DAC_R (1.0 / (1.0 / RES_K(47) + 1.0 / RES_K(22) + 1.0 / RES_K(10) + 1.0 / RES_K(4.7)))
static const discrete_dac_r1_ladder galaga_54xx_dac =
{
- 4, /* number of DAC bits */
+ 4, /* number of DAC bits */
{ RES_K(47),
- RES_K(22),
- RES_K(10),
- RES_K(4.7)},
- 0, 0, 0, 0 /* nothing extra */
+ RES_K(22),
+ RES_K(10),
+ RES_K(4.7)},
+ 0, 0, 0, 0 /* nothing extra */
};
#define GALAGA_VREF (5.0 * (RES_K(2.2) / (RES_K(3.3) + RES_K(2.2))))
@@ -247,120 +247,120 @@ static const discrete_dac_r1_ladder galaga_54xx_dac =
static const discrete_op_amp_filt_info galaga_chanl1_filt =
{
GALAGA_54XX_DAC_R + RES_K(100),
- 0, /* no second input */
+ 0, /* no second input */
RES_K(22),
- 0, /* not used */
+ 0, /* not used */
RES_K(220),
CAP_U(0.001),
CAP_U(0.001),
- 0, /* not used */
- GALAGA_VREF, /* vRef */
- 5, /* vP */
- 0, /* vN */
+ 0, /* not used */
+ GALAGA_VREF, /* vRef */
+ 5, /* vP */
+ 0, /* vN */
};
static const discrete_op_amp_filt_info galaga_chanl2_filt =
{
GALAGA_54XX_DAC_R + RES_K(47),
- 0, /* no second input */
+ 0, /* no second input */
RES_K(10),
- 0, /* not used */
+ 0, /* not used */
RES_K(150),
CAP_U(0.01),
CAP_U(0.01),
- 0, /* not used */
- GALAGA_VREF, /* vRef */
- 5, /* vP */
- 0, /* vN */
+ 0, /* not used */
+ GALAGA_VREF, /* vRef */
+ 5, /* vP */
+ 0, /* vN */
};
static const discrete_op_amp_filt_info galaga_chanl3_filt =
{
GALAGA_54XX_DAC_R + RES_K(150),
- 0, /* no second input */
+ 0, /* no second input */
RES_K(22),
- 0, /* not used */
+ 0, /* not used */
RES_K(470),
CAP_U(0.01),
CAP_U(0.01),
- 0, /* not used */
- GALAGA_VREF, /* vRef */
- 5, /* vP */
- 0, /* vN */
+ 0, /* not used */
+ GALAGA_VREF, /* vRef */
+ 5, /* vP */
+ 0, /* vN */
};
static const discrete_mixer_desc galaga_final_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(33),
- RES_K(33),
- RES_K(10)},
- {0}, /* no rNode{} */
- {0}, /* no c{} */
- 0, /* no rI */
+ RES_K(33),
+ RES_K(10)},
+ {0}, /* no rNode{} */
+ {0}, /* no c{} */
+ 0, /* no rI */
RES_K(3.3),
- 0, /* no cF */
+ 0, /* no cF */
CAP_U(0.1),
- GALAGA_VREF, /* vRef */
- 40800, /* gain */
+ GALAGA_VREF, /* vRef */
+ 40800, /* gain */
};
DISCRETE_SOUND_START(galaga)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_DATA(NAMCO_54XX_0_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_54XX_1_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_54XX_2_DATA(NODE_01))
/************************************************
- * CHANL1 sound
- ************************************************/
+ * CHANL1 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_20,
NAMCO_54XX_2_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&galaga_54xx_dac)
DISCRETE_OP_AMP_FILTER(GALAGA_CHANL1_SND,
- 1, /* ENAB */
- NODE_20, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_20, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &galaga_chanl1_filt)
/************************************************
- * CHANL2 sound
- ************************************************/
+ * CHANL2 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_30,
NAMCO_54XX_1_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&galaga_54xx_dac)
DISCRETE_OP_AMP_FILTER(GALAGA_CHANL2_SND,
- 1, /* ENAB */
- NODE_30, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_30, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &galaga_chanl2_filt)
/************************************************
- * CHANL3 sound
- ************************************************/
+ * CHANL3 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_40,
NAMCO_54XX_0_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&galaga_54xx_dac)
DISCRETE_OP_AMP_FILTER(GALAGA_CHANL3_SND,
- 1, /* ENAB */
- NODE_40, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_40, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &galaga_chanl3_filt)
/************************************************
- * Output
- ************************************************/
+ * Output
+ ************************************************/
DISCRETE_MIXER3(NODE_90,
- 1, /* ENAB */
- GALAGA_CHANL1_SND, /* IN0 */
- GALAGA_CHANL2_SND, /* IN1 */
- GALAGA_CHANL3_SND, /* IN2 */
- &galaga_final_mixer /* INFO */)
+ 1, /* ENAB */
+ GALAGA_CHANL1_SND, /* IN0 */
+ GALAGA_CHANL2_SND, /* IN1 */
+ GALAGA_CHANL3_SND, /* IN2 */
+ &galaga_final_mixer /* INFO */)
DISCRETE_OUTPUT(NODE_90, 1)
DISCRETE_SOUND_END
diff --git a/src/mame/audio/galaxian.c b/src/mame/audio/galaxian.c
index f7c6bea24da..7a61a0768c1 100644
--- a/src/mame/audio/galaxian.c
+++ b/src/mame/audio/galaxian.c
@@ -30,95 +30,95 @@ TODO:
*
*************************************/
-#define XTAL 18432000
+#define XTAL 18432000
-#define SOUND_CLOCK (XTAL/6/2) /* 1.536 MHz */
-#define RNG_RATE (XTAL/3*2) /* RNG clock is XTAL/3*2 see Aaron's note in video/galaxian.c */
+#define SOUND_CLOCK (XTAL/6/2) /* 1.536 MHz */
+#define RNG_RATE (XTAL/3*2) /* RNG clock is XTAL/3*2 see Aaron's note in video/galaxian.c */
/* 74LS259 */
-#define GAL_INP_BG_DAC NODE_10 /* at 9M Q4 to Q7 in schematics */
+#define GAL_INP_BG_DAC NODE_10 /* at 9M Q4 to Q7 in schematics */
-#define GAL_INP_FS1 NODE_20 /* FS1 9L Q0 */
-#define GAL_INP_FS2 NODE_21 /* FS2 9L Q1 */
-#define GAL_INP_FS3 NODE_22 /* FS3 9L Q2 */
-#define GAL_INP_HIT NODE_23 /* HIT 9L Q3 */
+#define GAL_INP_FS1 NODE_20 /* FS1 9L Q0 */
+#define GAL_INP_FS2 NODE_21 /* FS2 9L Q1 */
+#define GAL_INP_FS3 NODE_22 /* FS3 9L Q2 */
+#define GAL_INP_HIT NODE_23 /* HIT 9L Q3 */
//#define GAL_9L_Q4 NODE_24
-#define GAL_INP_FIRE NODE_25 /* FIRE 9L Q5 */
-#define GAL_INP_VOL1 NODE_26 /* VOL1 9L Q6 */
-#define GAL_INP_VOL2 NODE_27 /* VOL2 9L Q7 */
-
-#define GAL_INP_PITCH NODE_28 /* at 6T in schematics */
-
-#define TTL_OUT (4.0)
-
-#define GAL_R15 RES_K(100)
-#define GAL_R16 RES_K(220)
-#define GAL_R17 RES_K(470)
-#define GAL_R18 RES_K(1000)
-#define GAL_R19 RES_K(330)
-
-#define GAL_R20 RES_K(15)
-#define GAL_R21 RES_K(100)
-#define GAL_R22 RES_K(100)
-#define GAL_R23 RES_K(470)
-#define GAL_R24 RES_K(10)
-#define GAL_R25 RES_K(100)
-#define GAL_R26 RES_K(330)
-#define GAL_R27 RES_K(10)
-#define GAL_R28 RES_K(100)
-#define GAL_R29 RES_K(220)
-
-#define GAL_R30 RES_K(10)
-#define GAL_R31 RES_K(47)
-#define GAL_R32 RES_K(47)
-#define GAL_R33 RES_K(10)
+#define GAL_INP_FIRE NODE_25 /* FIRE 9L Q5 */
+#define GAL_INP_VOL1 NODE_26 /* VOL1 9L Q6 */
+#define GAL_INP_VOL2 NODE_27 /* VOL2 9L Q7 */
+
+#define GAL_INP_PITCH NODE_28 /* at 6T in schematics */
+
+#define TTL_OUT (4.0)
+
+#define GAL_R15 RES_K(100)
+#define GAL_R16 RES_K(220)
+#define GAL_R17 RES_K(470)
+#define GAL_R18 RES_K(1000)
+#define GAL_R19 RES_K(330)
+
+#define GAL_R20 RES_K(15)
+#define GAL_R21 RES_K(100)
+#define GAL_R22 RES_K(100)
+#define GAL_R23 RES_K(470)
+#define GAL_R24 RES_K(10)
+#define GAL_R25 RES_K(100)
+#define GAL_R26 RES_K(330)
+#define GAL_R27 RES_K(10)
+#define GAL_R28 RES_K(100)
+#define GAL_R29 RES_K(220)
+
+#define GAL_R30 RES_K(10)
+#define GAL_R31 RES_K(47)
+#define GAL_R32 RES_K(47)
+#define GAL_R33 RES_K(10)
/*
* R34 is given twice on galaxian board and both times as 5.1k. On moon cresta
* it is only listed once and given as 15k. This is more in line with recordings
*/
-#define GAL_R34 RES_K(5.1)
-#define MCRST_R34 RES_K(15)
+#define GAL_R34 RES_K(5.1)
+#define MCRST_R34 RES_K(15)
-#define GAL_R35 RES_K(150)
-#define GAL_R36 RES_K(22)
-#define GAL_R37 RES_K(470)
-#define GAL_R38 RES_K(33)
-#define GAL_R39 RES_K(22)
+#define GAL_R35 RES_K(150)
+#define GAL_R36 RES_K(22)
+#define GAL_R37 RES_K(470)
+#define GAL_R38 RES_K(33)
+#define GAL_R39 RES_K(22)
/* The hit sound is too low compared with recordings
* There may be an issue with the op-amp band filter
*/
-#define GAL_R40 (RES_K(2.2)*0.6) /* Volume adjust */
-#define GAL_R41 RES_K(100)
-#define GAL_R43 RES_K(2.2)
-#define GAL_R44 RES_K(10)
-#define GAL_R45 RES_K(22)
-#define GAL_R46 RES_K(10)
-#define GAL_R47 RES_K(2.2)
-#define GAL_R48 RES_K(2.2)
-#define GAL_R49 RES_K(10)
-
-#define GAL_R50 RES_K(22)
-#define GAL_R51 RES_K(33)
-#define GAL_R52 RES_K(15)
-
-#define GAL_R91 RES_K(10)
-
-#define GAL_C15 CAP_U(1)
-#define GAL_C17 CAP_U(0.01)
-#define GAL_C18 CAP_U(0.01)
-#define GAL_C19 CAP_U(0.01)
-
-#define GAL_C20 CAP_U(0.1)
-#define GAL_C21 CAP_U(2.2)
-#define GAL_C22 CAP_U(0.01)
-#define GAL_C23 CAP_U(0.01)
-#define GAL_C25 CAP_U(1)
-#define GAL_C26 CAP_U(0.01)
-#define GAL_C27 CAP_U(0.01)
-#define GAL_C28 CAP_U(47)
-
-#define GAL_C46 CAP_U(0.1)
+#define GAL_R40 (RES_K(2.2)*0.6) /* Volume adjust */
+#define GAL_R41 RES_K(100)
+#define GAL_R43 RES_K(2.2)
+#define GAL_R44 RES_K(10)
+#define GAL_R45 RES_K(22)
+#define GAL_R46 RES_K(10)
+#define GAL_R47 RES_K(2.2)
+#define GAL_R48 RES_K(2.2)
+#define GAL_R49 RES_K(10)
+
+#define GAL_R50 RES_K(22)
+#define GAL_R51 RES_K(33)
+#define GAL_R52 RES_K(15)
+
+#define GAL_R91 RES_K(10)
+
+#define GAL_C15 CAP_U(1)
+#define GAL_C17 CAP_U(0.01)
+#define GAL_C18 CAP_U(0.01)
+#define GAL_C19 CAP_U(0.01)
+
+#define GAL_C20 CAP_U(0.1)
+#define GAL_C21 CAP_U(2.2)
+#define GAL_C22 CAP_U(0.01)
+#define GAL_C23 CAP_U(0.01)
+#define GAL_C25 CAP_U(1)
+#define GAL_C26 CAP_U(0.01)
+#define GAL_C27 CAP_U(0.01)
+#define GAL_C28 CAP_U(47)
+
+#define GAL_C46 CAP_U(0.1)
/*************************************
@@ -130,20 +130,20 @@ TODO:
static const discrete_dac_r1_ladder galaxian_bck_dac =
{
- 4, // size of ladder
+ 4, // size of ladder
{GAL_R18, GAL_R17, GAL_R16, GAL_R15, 0,0,0,0},
- 4.4, // 5V - diode junction (0.6V)
- GAL_R20, // rBIAS
- GAL_R19, // rGnd
- 0 // no C
+ 4.4, // 5V - diode junction (0.6V)
+ GAL_R20, // rBIAS
+ GAL_R19, // rGnd
+ 0 // no C
};
static const discrete_555_cc_desc galaxian_bck_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_CAP,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q2 junction voltage
+ 0.7 // Q2 junction voltage
};
static const discrete_555_desc galaxian_555_vco_desc =
@@ -151,7 +151,7 @@ static const discrete_555_desc galaxian_555_vco_desc =
DISC_555_OUT_ENERGY | DISC_555_OUT_DC,
5.0,
DEFAULT_555_CHARGE,
- (5.0 - 0.5) // 10k means no real load
+ (5.0 - 0.5) // 10k means no real load
};
static const discrete_555_desc galaxian_555_fire_vco_desc =
@@ -177,22 +177,22 @@ static const discrete_mixer_desc galaxian_bck_mixer_desc =
static const discrete_lfsr_desc galaxian_lfsr =
{
DISC_CLK_IS_FREQ,
- 17, /* Bit Length */
- 0, /* Reset Value */
- 4, /* Use Bit 10 (QC of second LS164) as F0 input 0 */
- 16, /* Use Bit 23 (QH of third LS164) as F0 input 1 */
- DISC_LFSR_XOR_INV_IN1, /* F0 is XOR */
- DISC_LFSR_IN0, /* F1 is inverted F0*/
- DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
+ 17, /* Bit Length */
+ 0, /* Reset Value */
+ 4, /* Use Bit 10 (QC of second LS164) as F0 input 0 */
+ 16, /* Use Bit 23 (QH of third LS164) as F0 input 1 */
+ DISC_LFSR_XOR_INV_IN1, /* F0 is XOR */
+ DISC_LFSR_IN0, /* F1 is inverted F0*/
+ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
DISC_LFSR_FLAG_OUTPUT_F0, /* Output is result of F0 */
- 0 /* Output bit */
+ 0 /* Output bit */
};
static const discrete_mixer_desc galaxian_mixerpre_desc =
{
DISC_MIXER_IS_RESISTOR,
- {GAL_R51, 0, GAL_R50, 0, GAL_R34}, /* A, C, C, D */
+ {GAL_R51, 0, GAL_R50, 0, GAL_R34}, /* A, C, C, D */
{0, GAL_INP_VOL1, 0, GAL_INP_VOL2, 0},
{0,0,0,0,0},
0, 0,
@@ -204,7 +204,7 @@ static const discrete_mixer_desc galaxian_mixerpre_desc =
static const discrete_mixer_desc galaxian_mixer_desc =
{
DISC_MIXER_IS_RESISTOR,
- {GAL_R34, GAL_R40, GAL_R43}, /* A, C, C, D */
+ {GAL_R34, GAL_R40, GAL_R43}, /* A, C, C, D */
{0, 0, 0},
{0,0,GAL_C26},
0, GAL_R91,
@@ -218,7 +218,7 @@ static const discrete_mixer_desc galaxian_mixer_desc =
static const discrete_mixer_desc mooncrst_mixer_desc =
{
DISC_MIXER_IS_RESISTOR,
- {GAL_R51, 0, GAL_R50, 0, MCRST_R34, GAL_R40, GAL_R43}, /* A, C, C, D */
+ {GAL_R51, 0, GAL_R50, 0, MCRST_R34, GAL_R40, GAL_R43}, /* A, C, C, D */
{0, GAL_INP_VOL1, 0, GAL_INP_VOL2, 0, 0, 0},
{0,0,0,0,0,0,GAL_C26},
0, 0*GAL_R91,
@@ -270,14 +270,14 @@ static DISCRETE_SOUND_START(galaxian)
DISCRETE_TASK_START(0)
- /************************************************/
+ /************************************************/
/* NOISE */
/************************************************/
- /* since only a sample of the LFSR is latched @V2 we let the lfsr
- * run at a lower speed
- */
- DISCRETE_LFSR_NOISE(NODE_150, 1, 1, RNG_RATE/100, 1.0, 0, 0.5, &galaxian_lfsr)
+ /* since only a sample of the LFSR is latched @V2 we let the lfsr
+ * run at a lower speed
+ */
+ DISCRETE_LFSR_NOISE(NODE_150, 1, 1, RNG_RATE/100, 1.0, 0, 0.5, &galaxian_lfsr)
DISCRETE_SQUAREWFIX(NODE_151,1,60*264/2,1.0,50,0.5,0) /* 2V signal */
DISCRETE_LOGIC_DFLIPFLOP(NODE_152,1,1,NODE_151,NODE_150)
DISCRETE_TASK_END()
@@ -307,31 +307,31 @@ static DISCRETE_SOUND_START(galaxian)
/************************************************/
/* two cascaded LS164 which are reset to pitch latch value,
- * thus generating SOUND_CLOCK / (256 - pitch_clock) signal
- *
- * One possibility to implement this is
- * DISCRETE_TRANSFORM3(NODE_130, SOUND_CLOCK, 256, GAL_INP_PITCH, "012-/")
- * DISCRETE_COUNTER(NODE_132, 1, 0, NODE_130, 0, 15, DISC_COUNT_UP, 0, DISC_CLK_IS_FREQ)
- * but there is a native choice:
- */
- DISCRETE_NOTE(NODE_132, 1, SOUND_CLOCK, GAL_INP_PITCH, 255, 15, DISC_CLK_IS_FREQ)
-
- /* from the 74393 (counter 2 above) only QA, QC, QD are used.
- * We decode three here and use SUB_NODE(133,x) below to access.
- */
- DISCRETE_BITS_DECODE(NODE_133, NODE_132, 0, 3, TTL_OUT) /* QA-QD 74393 */
-
- /* End of this task */
- DISCRETE_TASK_END()
-
- DISCRETE_TASK_START(1)
-
- /************************************************/
+ * thus generating SOUND_CLOCK / (256 - pitch_clock) signal
+ *
+ * One possibility to implement this is
+ * DISCRETE_TRANSFORM3(NODE_130, SOUND_CLOCK, 256, GAL_INP_PITCH, "012-/")
+ * DISCRETE_COUNTER(NODE_132, 1, 0, NODE_130, 0, 15, DISC_COUNT_UP, 0, DISC_CLK_IS_FREQ)
+ * but there is a native choice:
+ */
+ DISCRETE_NOTE(NODE_132, 1, SOUND_CLOCK, GAL_INP_PITCH, 255, 15, DISC_CLK_IS_FREQ)
+
+ /* from the 74393 (counter 2 above) only QA, QC, QD are used.
+ * We decode three here and use SUB_NODE(133,x) below to access.
+ */
+ DISCRETE_BITS_DECODE(NODE_133, NODE_132, 0, 3, TTL_OUT) /* QA-QD 74393 */
+
+ /* End of this task */
+ DISCRETE_TASK_END()
+
+ DISCRETE_TASK_START(1)
+
+ /************************************************/
/* HIT */
/************************************************/
/* Not 100% correct - switching causes high impedance input for node_157
- * this is not emulated */
+ * this is not emulated */
DISCRETE_RCDISC5(NODE_155, NODE_152, GAL_INP_HIT, (GAL_R35 + GAL_R36), GAL_C21)
DISCRETE_OP_AMP_FILTER(NODE_157, 1, NODE_155, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &galaxian_bandpass_desc)
DISCRETE_TASK_END()
@@ -449,25 +449,25 @@ WRITE8_DEVICE_HANDLER( galaxian_sound_w )
data &= 0x01;
switch (offset & 7)
{
- case 0: /* FS1 (controls 555 timer at 8R) */
- case 1: /* FS2 (controls 555 timer at 8S) */
- case 2: /* FS3 (controls 555 timer at 8T) */
+ case 0: /* FS1 (controls 555 timer at 8R) */
+ case 1: /* FS2 (controls 555 timer at 8S) */
+ case 2: /* FS3 (controls 555 timer at 8T) */
galaxian_background_enable_w(device, space, offset, data);
break;
- case 3: /* HIT */
+ case 3: /* HIT */
galaxian_noise_enable_w(device, space, 0, data);
break;
- case 4: /* n/c */
+ case 4: /* n/c */
break;
- case 5: /* FIRE */
+ case 5: /* FIRE */
galaxian_shoot_enable_w(device, space, 0, data);
break;
- case 6: /* VOL1 */
- case 7: /* VOL2 */
+ case 6: /* VOL1 */
+ case 7: /* VOL2 */
galaxian_vol_w(device, space, offset & 1, data);
break;
}
diff --git a/src/mame/audio/galaxian.h b/src/mame/audio/galaxian.h
index be423de6a3b..2e10d36a2c4 100644
--- a/src/mame/audio/galaxian.h
+++ b/src/mame/audio/galaxian.h
@@ -1,4 +1,4 @@
-#define GAL_AUDIO "discrete"
+#define GAL_AUDIO "discrete"
MACHINE_CONFIG_EXTERN( mooncrst_audio );
MACHINE_CONFIG_EXTERN( galaxian_audio );
@@ -10,4 +10,3 @@ DECLARE_WRITE8_DEVICE_HANDLER( galaxian_noise_enable_w );
DECLARE_WRITE8_DEVICE_HANDLER( galaxian_background_enable_w );
DECLARE_WRITE8_DEVICE_HANDLER( galaxian_shoot_enable_w );
DECLARE_WRITE8_DEVICE_HANDLER( galaxian_lfo_freq_w );
-
diff --git a/src/mame/audio/geebee.c b/src/mame/audio/geebee.c
index a30cb82cc94..59a51e537a1 100644
--- a/src/mame/audio/geebee.c
+++ b/src/mame/audio/geebee.c
@@ -50,28 +50,28 @@ WRITE8_DEVICE_HANDLER( geebee_sound_w )
if( state->m_sound_latch & 8 )
{
/*
- * R24 is 10k, Rb is 0, C57 is 1uF
- * charge time t1 = 0.693 * (R24 + Rb) * C57 -> 0.22176s
- * discharge time t2 = 0.693 * (Rb) * C57 -> 0
- * Then C33 is only charged via D6 (1N914), not discharged!
- * Decay:
- * discharge C33 (1uF) through R50 (22k) -> 0.14058s
- */
+ * R24 is 10k, Rb is 0, C57 is 1uF
+ * charge time t1 = 0.693 * (R24 + Rb) * C57 -> 0.22176s
+ * discharge time t2 = 0.693 * (Rb) * C57 -> 0
+ * Then C33 is only charged via D6 (1N914), not discharged!
+ * Decay:
+ * discharge C33 (1uF) through R50 (22k) -> 0.14058s
+ */
attotime period = attotime::from_hz(32768) * 14058 / 100000;
state->m_volume_timer->adjust(period, 0, period);
}
else
{
/*
- * discharge only after R49 (100k) in the amplifier section,
- * so the volume shouldn't very fast and only when the signal
- * is gated through 6N (4066).
- * I can only guess here that the decay should be slower,
- * maybe half as fast?
- */
+ * discharge only after R49 (100k) in the amplifier section,
+ * so the volume shouldn't very fast and only when the signal
+ * is gated through 6N (4066).
+ * I can only guess here that the decay should be slower,
+ * maybe half as fast?
+ */
attotime period = attotime::from_hz(32768) * 29060 / 100000;
state->m_volume_timer->adjust(period, 0, period);
- }
+ }
}
static STREAM_UPDATE( geebee_sound_update )
@@ -147,7 +147,7 @@ const device_type GEEBEE = &device_creator<geebee_sound_device>;
geebee_sound_device::geebee_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, GEEBEE, "Gee Bee Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(geebee_sound_state);
}
@@ -180,5 +180,3 @@ void geebee_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/gomoku.c b/src/mame/audio/gomoku.c
index d940fef71ff..fae7483f4e2 100644
--- a/src/mame/audio/gomoku.c
+++ b/src/mame/audio/gomoku.c
@@ -261,9 +261,9 @@ WRITE8_DEVICE_HANDLER( gomoku_sound2_w )
// oneshot frequency is hand tune...
if ((state->m_soundregs2[0x1d] & 0x0f) < 0x0c)
- voice->frequency = 3000 / 16; // ichi, ni, san, yon, go
+ voice->frequency = 3000 / 16; // ichi, ni, san, yon, go
else
- voice->frequency = 8000 / 16; // shoot
+ voice->frequency = 8000 / 16; // shoot
voice->volume = 8;
voice->counter = 0;
@@ -280,7 +280,7 @@ const device_type GOMOKU = &device_creator<gomoku_sound_device>;
gomoku_sound_device::gomoku_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, GOMOKU, "Gomoku Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(gomoku_sound_state);
}
@@ -313,5 +313,3 @@ void gomoku_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/gorf.c b/src/mame/audio/gorf.c
index 584cea59eb8..d8946f3f066 100644
--- a/src/mame/audio/gorf.c
+++ b/src/mame/audio/gorf.c
@@ -30,49 +30,49 @@ gorf_sh_ update- Null
static const char *const PhonemeTable[65] =
{
- "EH3","EH2","EH1","PA0","DT" ,"A1" ,"A2" ,"ZH",
- "AH2","I3" ,"I2" ,"I1" ,"M" ,"N" ,"B" ,"V",
- "CH" ,"SH" ,"Z" ,"AW1","NG" ,"AH1","OO1","OO",
- "L" ,"K" ,"J" ,"H" ,"G" ,"F" ,"D" ,"S",
- "A" ,"AY" ,"Y1" ,"UH3","AH" ,"P" ,"O" ,"I",
- "U" ,"Y" ,"T" ,"R" ,"E" ,"W" ,"AE" ,"AE1",
- "AW2","UH2","UH1","UH" ,"O2" ,"O1" ,"IU" ,"U1",
- "THV","TH" ,"ER" ,"EH" ,"E1" ,"AW" ,"PA1","STOP",
- 0
+ "EH3","EH2","EH1","PA0","DT" ,"A1" ,"A2" ,"ZH",
+ "AH2","I3" ,"I2" ,"I1" ,"M" ,"N" ,"B" ,"V",
+ "CH" ,"SH" ,"Z" ,"AW1","NG" ,"AH1","OO1","OO",
+ "L" ,"K" ,"J" ,"H" ,"G" ,"F" ,"D" ,"S",
+ "A" ,"AY" ,"Y1" ,"UH3","AH" ,"P" ,"O" ,"I",
+ "U" ,"Y" ,"T" ,"R" ,"E" ,"W" ,"AE" ,"AE1",
+ "AW2","UH2","UH1","UH" ,"O2" ,"O1" ,"IU" ,"U1",
+ "THV","TH" ,"ER" ,"EH" ,"E1" ,"AW" ,"PA1","STOP",
+ 0
};
static const char *const GorfWordTable[] =
{
- "A2AYY1","A2E1","UH1GEH1I3N","AE1EH2M","AEM",
- "AE1EH3ND","UH1NAH2I1YLA2SHUH2N","AH2NUHTHER","AH1NUHTHVRR",
- "AH1R","UHR","UH1VEH1EH3NNDJER","BAEEH3D","BAEEH1D","BE",
- "BEH3EH1N","buht","BUH1DTTEH2NN","KUHDEH2T",
- "KAE1NUH1T","KAE1EH3PTI3N",
- "KRAH2UH3NI3KUH3O2LZ","KO1UH3I3E1N","KO1UH3I3E1NS",
- "KERNAH2L","KAH1NCHEHSNEHS","DE1FEH1NDER",
- "DE1STRO1I1Y","DE1STRO1I1Y1D",
- "DU1UM","DRAW1S","EHMPAH2I3YR","EHND",
- "EH1NEH1MY","EH1SKA1E1P","FLEHGSHIP",
- "FOR","GUH1LAEKTI1K",
- "DJEH2NERUH3L","GDTO1O1RRFF","GDTO1RFYA2N","GDTO1RFE1EH2N","GDTO1RFYA2NS",
- "HAH1HAH1HAH1HAH1","hahaher.wav","HUHRDER",
- "HAE1EH3V","HI1TI1NG","AH1I1Y", "AH1I1Y1","I1MPAH1SI1BL",
- "IN*","INSERT","I1S","LI1V","LAWNG","MEE1T","MUU1V",
- "MAH2I1Y","MAH2I3Y","NIR","NEHKST","NUH3AH2YS","NO",
- "NAH1O1U1W","PA1","PLA1AYER","PRE1PAE1ER","PRI1SI3NEH3RS",
- "PRUH2MOTEH3D","POO1IUSH","RO1U1BAH1T","RO1U1BAH1TS",
- "RO1U1BAH1UH3TS","SEK", "SHIP","SHAH1UH3T","SUHM","SPA2I3YS","PA0",
- "SERVAH2I1Y1VUH3L","TAK","THVUH","THVUH1",
- "THUH","TAH1EH3YM","TU","TIUU1",
- "UH2NBE1AYTUH3BUH3L",
- "WORAYY1EH3R","WORAYY1EH3RS","WI1L",
- "Y1I3U1","YIUU1U1","YI1U1U1","Y1IUU1U1","Y1I1U1U1","YOR","YU1O1RSEH1LF","s.wav",
- "FO1R","FO2R","WIL","GDTO1RVYA2N",
-
- "KO1UH3I3AYNN",
- "UH1TAEEH3K","BAH2I3Y1T","KAH1NKER","DYVAH1U1ER","DUHST","GAE1LUH1KSY","GAH1EH3T",
- "PAH1I1R","TRAH2I1Y","SU1PRE1N","AWL","HA2AYL",
- "EH1MPAH1I1R",
+ "A2AYY1","A2E1","UH1GEH1I3N","AE1EH2M","AEM",
+ "AE1EH3ND","UH1NAH2I1YLA2SHUH2N","AH2NUHTHER","AH1NUHTHVRR",
+ "AH1R","UHR","UH1VEH1EH3NNDJER","BAEEH3D","BAEEH1D","BE",
+ "BEH3EH1N","buht","BUH1DTTEH2NN","KUHDEH2T",
+ "KAE1NUH1T","KAE1EH3PTI3N",
+ "KRAH2UH3NI3KUH3O2LZ","KO1UH3I3E1N","KO1UH3I3E1NS",
+ "KERNAH2L","KAH1NCHEHSNEHS","DE1FEH1NDER",
+ "DE1STRO1I1Y","DE1STRO1I1Y1D",
+ "DU1UM","DRAW1S","EHMPAH2I3YR","EHND",
+ "EH1NEH1MY","EH1SKA1E1P","FLEHGSHIP",
+ "FOR","GUH1LAEKTI1K",
+ "DJEH2NERUH3L","GDTO1O1RRFF","GDTO1RFYA2N","GDTO1RFE1EH2N","GDTO1RFYA2NS",
+ "HAH1HAH1HAH1HAH1","hahaher.wav","HUHRDER",
+ "HAE1EH3V","HI1TI1NG","AH1I1Y", "AH1I1Y1","I1MPAH1SI1BL",
+ "IN*","INSERT","I1S","LI1V","LAWNG","MEE1T","MUU1V",
+ "MAH2I1Y","MAH2I3Y","NIR","NEHKST","NUH3AH2YS","NO",
+ "NAH1O1U1W","PA1","PLA1AYER","PRE1PAE1ER","PRI1SI3NEH3RS",
+ "PRUH2MOTEH3D","POO1IUSH","RO1U1BAH1T","RO1U1BAH1TS",
+ "RO1U1BAH1UH3TS","SEK", "SHIP","SHAH1UH3T","SUHM","SPA2I3YS","PA0",
+ "SERVAH2I1Y1VUH3L","TAK","THVUH","THVUH1",
+ "THUH","TAH1EH3YM","TU","TIUU1",
+ "UH2NBE1AYTUH3BUH3L",
+ "WORAYY1EH3R","WORAYY1EH3RS","WI1L",
+ "Y1I3U1","YIUU1U1","YI1U1U1","Y1IUU1U1","Y1I1U1U1","YOR","YU1O1RSEH1LF","s.wav",
+ "FO1R","FO2R","WIL","GDTO1RVYA2N",
+
+ "KO1UH3I3AYNN",
+ "UH1TAEEH3K","BAH2I3Y1T","KAH1NKER","DYVAH1U1ER","DUHST","GAE1LUH1KSY","GAH1EH3T",
+ "PAH1I1R","TRAH2I1Y","SU1PRE1N","AWL","HA2AYL",
+ "EH1MPAH1I1R",
0
};
@@ -80,33 +80,33 @@ static const char *const GorfWordTable[] =
const char *const gorf_sample_names[] =
{
- "*gorf","a","a","again","am","am","and","anhilatn",
- "another","another","are","are",
- "avenger","bad","bad","be",
- "been","but","button","cadet",
- "cannot","captain","chronicl","coin","coins","colonel",
- "consciou","defender","destroy","destroyd",
- "doom","draws","empire","end",
- "enemy","escape","flagship","for","galactic",
- "general","gorf","gorphian","gorphian","gorphins",
- "hahahahu","hahaher","harder","have",
- "hitting","i","i","impossib","in","insert",
- "is","live","long","meet","move",
- "my","my",
- "near","next","nice","no",
- "now","pause","player","prepare","prisonrs",
- "promoted","push","robot","robots","robots",
- "seek","ship","shot","some","space","spause",
- "survival","take","the","the","the","time",
- "to","to","unbeatab",
- "warrior","warriors","will",
- "you","you","you","you","your","your","yourself",
- "s","for","for","will","gorph",
+ "*gorf","a","a","again","am","am","and","anhilatn",
+ "another","another","are","are",
+ "avenger","bad","bad","be",
+ "been","but","button","cadet",
+ "cannot","captain","chronicl","coin","coins","colonel",
+ "consciou","defender","destroy","destroyd",
+ "doom","draws","empire","end",
+ "enemy","escape","flagship","for","galactic",
+ "general","gorf","gorphian","gorphian","gorphins",
+ "hahahahu","hahaher","harder","have",
+ "hitting","i","i","impossib","in","insert",
+ "is","live","long","meet","move",
+ "my","my",
+ "near","next","nice","no",
+ "now","pause","player","prepare","prisonrs",
+ "promoted","push","robot","robots","robots",
+ "seek","ship","shot","some","space","spause",
+ "survival","take","the","the","the","time",
+ "to","to","unbeatab",
+ "warrior","warriors","will",
+ "you","you","you","you","your","your","yourself",
+ "s","for","for","will","gorph",
// Missing Samples
- "coin", "attack","bite","conquer","devour","dust",
- "galaxy","got","power","try","supreme","all",
- "hail","emperor",
- 0
+ "coin", "attack","bite","conquer","devour","dust",
+ "galaxy","got","power","try","supreme","all",
+ "hail","emperor",
+ 0
};
@@ -130,33 +130,33 @@ READ8_HANDLER( gorf_speech_r )
if(Phoneme==63) {
samples->stop(0);
if (strlen(state->m_totalword)>2) logerror("Clearing sample %s\n",state->m_totalword);
- state->m_totalword[0] = 0; /* Clear the total word stack */
+ state->m_totalword[0] = 0; /* Clear the total word stack */
return data;
}
/* Phoneme to word translation */
if (*(state->m_totalword) == 0) {
- strcpy(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
+ strcpy(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
if (state->m_plural != 0) {
logerror("found a possible plural at %d\n",state->m_plural-1);
- if (!strcmp("S",state->m_totalword)) { /* Plural check */
- samples->start(0, num_samples-2); /* play the sample at position of word */
+ if (!strcmp("S",state->m_totalword)) { /* Plural check */
+ samples->start(0, num_samples-2); /* play the sample at position of word */
samples->set_frequency(0, 11025); /* play at correct rate */
- state->m_totalword[0] = 0; /* Clear the total word stack */
- state->m_oldword[0] = 0; /* Clear the total word stack */
+ state->m_totalword[0] = 0; /* Clear the total word stack */
+ state->m_oldword[0] = 0; /* Clear the total word stack */
return data;
} else {
state->m_plural=0;
}
}
} else
- strcat(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
+ strcat(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
logerror("Total word = %s\n",state->m_totalword);
for (i=0; GorfWordTable[i]; i++) {
- if (!strcmp(GorfWordTable[i],state->m_totalword)) { /* Scan the word (sample) table for the complete word */
+ if (!strcmp(GorfWordTable[i],state->m_totalword)) { /* Scan the word (sample) table for the complete word */
if ((!strcmp("GDTO1RFYA2N",state->m_totalword)) || (!strcmp("RO1U1BAH1T",state->m_totalword)) || (!strcmp("KO1UH3I3E1N",state->m_totalword)) || (!strcmp("WORAYY1EH3R",state->m_totalword)) || (!strcmp("IN",state->m_totalword)) ) { /* May be state->m_plural */
state->m_plural=i+1;
strcpy(state->m_oldword,state->m_totalword);
@@ -164,10 +164,10 @@ READ8_HANDLER( gorf_speech_r )
} else {
state->m_plural=0;
}
- samples->start(0, i); /* play the sample at position of word */
+ samples->start(0, i); /* play the sample at position of word */
samples->set_frequency(0, 11025); /* play at correct rate */
logerror("Playing sample %d",i);
- state->m_totalword[0] = 0; /* Clear the total word stack */
+ state->m_totalword[0] = 0; /* Clear the total word stack */
return data;
}
}
@@ -178,7 +178,7 @@ READ8_HANDLER( gorf_speech_r )
#endif
/* Note : We should really also use volume in this as well as frequency */
- return data; /* Return nicely */
+ return data; /* Return nicely */
}
diff --git a/src/mame/audio/gottlieb.c b/src/mame/audio/gottlieb.c
index 67415c56e1c..880f4e24ccb 100644
--- a/src/mame/audio/gottlieb.c
+++ b/src/mame/audio/gottlieb.c
@@ -43,9 +43,9 @@
#include "includes/gottlieb.h"
-#define SOUND1_CLOCK XTAL_3_579545MHz
-#define SOUND2_CLOCK XTAL_4MHz
-#define SOUND2_SPEECH_CLOCK XTAL_3_12MHz
+#define SOUND1_CLOCK XTAL_3_579545MHz
+#define SOUND2_CLOCK XTAL_4MHz
+#define SOUND2_SPEECH_CLOCK XTAL_3_12MHz
//**************************************************************************
@@ -162,15 +162,15 @@ logerror("Votrax: intonation %d, phoneme %02x %s\n",data >> 6,data & 0x3f,Phonem
mame_printf_debug("Votrax played '%s'\n", phonemes);
- if (strcmp(phonemes, "[0] HEH3LOOW AH1EH3I3YMTERI2NDAHN") == 0) /* Q-Bert & Tylz - Hello, I am turned on */
- m_samples->start(0, 42);
- else if (strcmp(phonemes, "[0]BAH1EH1Y") == 0) /* Q-Bert - Bye, bye */
+ if (strcmp(phonemes, "[0] HEH3LOOW AH1EH3I3YMTERI2NDAHN") == 0) /* Q-Bert & Tylz - Hello, I am turned on */
+ m_samples->start(0, 42);
+ else if (strcmp(phonemes, "[0]BAH1EH1Y") == 0) /* Q-Bert - Bye, bye */
m_samples->start(0, 43);
- else if (strcmp(phonemes, "[0]A2YHT LEH2FTTH") == 0) /* Reactor - Eight left */
+ else if (strcmp(phonemes, "[0]A2YHT LEH2FTTH") == 0) /* Reactor - Eight left */
m_samples->start(0, 0);
- else if (strcmp(phonemes, "[0]SI3KS DTYN LEH2FTTH") == 0) /* Reactor - Sixteen left */
+ else if (strcmp(phonemes, "[0]SI3KS DTYN LEH2FTTH") == 0) /* Reactor - Sixteen left */
m_samples->start(0, 1);
- else if (strcmp(phonemes, "[0]WO2RNYNG KO2R UH1NSDTABUH1L") == 0) /* Reactor - Warning core unstable */
+ else if (strcmp(phonemes, "[0]WO2RNYNG KO2R UH1NSDTABUH1L") == 0) /* Reactor - Warning core unstable */
m_samples->start(0, 5);
else if (strcmp(phonemes, "[0]CHAMBERR AE1EH2KTI1VA1I3DTEH1DT ") == 0) /* Reactor - Chamber activated */
m_samples->start(0, 7);
@@ -206,7 +206,7 @@ static const char *const reactor_sample_names[] =
"fx_39j", /* "45000" */
"fx_39k", /* "50000" */
"fx_39l", /* "55000" */
- 0 /* end of array */
+ 0 /* end of array */
};
static const char *const qbert_sample_names[] =
@@ -256,18 +256,18 @@ static const char *const qbert_sample_names[] =
"fx_23", /* O1 with varying voice clock */
"fx_28",
"fx_36",
- 0 /* end of array */
+ 0 /* end of array */
};
static const samples_interface reactor_samples_interface =
{
- 1, /* one channel */
+ 1, /* one channel */
reactor_sample_names
};
static const samples_interface qbert_samples_interface =
{
- 1, /* one channel */
+ 1, /* one channel */
qbert_sample_names
};
@@ -310,12 +310,12 @@ static const char *const qbert_knocker_names[] =
{
"*qbert",
"knocker",
- 0 /* end of array */
+ 0 /* end of array */
};
static const samples_interface qbert_knocker_interface =
{
- 1, /* one channel */
+ 1, /* one channel */
qbert_knocker_names
};
@@ -338,36 +338,36 @@ MACHINE_CONFIG_END
gottlieb_sound_r1_device::gottlieb_sound_r1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, GOTTLIEB_SOUND_REV1, "Gottlieb Sound rev. 1", "gotsndr1", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_audiocpu(*this, "audiocpu"),
- m_riot(*this, "riot"),
- m_dac(*this, "dac"),
- m_votrax(*this, "votrax"),
- m_populate_votrax(false),
- m_last_speech_clock(0)
+ device_mixer_interface(mconfig, *this),
+ m_audiocpu(*this, "audiocpu"),
+ m_riot(*this, "riot"),
+ m_dac(*this, "dac"),
+ m_votrax(*this, "votrax"),
+ m_populate_votrax(false),
+ m_last_speech_clock(0)
#if USE_FAKE_VOTRAX
- , m_samples(*this, ":samples"),
- m_score_sample(0),
- m_random_offset(0),
- m_votrax_queuepos(0)
+ , m_samples(*this, ":samples"),
+ m_score_sample(0),
+ m_random_offset(0),
+ m_votrax_queuepos(0)
#endif
{
}
gottlieb_sound_r1_device::gottlieb_sound_r1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, bool populate_votrax)
: device_t(mconfig, GOTTLIEB_SOUND_REV1, "Gottlieb Sound rev. 1", "gotsndr1", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_audiocpu(*this, "audiocpu"),
- m_riot(*this, "riot"),
- m_dac(*this, "dac"),
- m_votrax(*this, "votrax"),
- m_populate_votrax(populate_votrax),
- m_last_speech_clock(0)
+ device_mixer_interface(mconfig, *this),
+ m_audiocpu(*this, "audiocpu"),
+ m_riot(*this, "riot"),
+ m_dac(*this, "dac"),
+ m_votrax(*this, "votrax"),
+ m_populate_votrax(populate_votrax),
+ m_last_speech_clock(0)
#if USE_FAKE_VOTRAX
- , m_samples(*this, ":samples"),
- m_score_sample(0),
- m_random_offset(0),
- m_votrax_queuepos(0)
+ , m_samples(*this, ":samples"),
+ m_score_sample(0),
+ m_random_offset(0),
+ m_votrax_queuepos(0)
#endif
{
}
@@ -512,7 +512,7 @@ ADDRESS_MAP_END
MACHINE_CONFIG_FRAGMENT( gottlieb_sound_r1 )
// audio CPU
- MCFG_CPU_ADD("audiocpu", M6502, SOUND1_CLOCK/4) // the board can be set to /2 as well
+ MCFG_CPU_ADD("audiocpu", M6502, SOUND1_CLOCK/4) // the board can be set to /2 as well
MCFG_CPU_PROGRAM_MAP(gottlieb_sound_r1_map)
// I/O configuration
@@ -544,7 +544,7 @@ INPUT_PORTS_START( gottlieb_sound_r1 )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SB1:1" )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SB1:4" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SB1:3" )
- PORT_DIPNAME( 0x40, 0x40, "Sound Test" ) PORT_DIPLOCATION("SB1:2")
+ PORT_DIPNAME( 0x40, 0x40, "Sound Test" ) PORT_DIPLOCATION("SB1:2")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, 0x80, IPT_SPECIAL )
@@ -637,23 +637,23 @@ ioport_constructor gottlieb_sound_r1_with_votrax_device::device_input_ports() co
gottlieb_sound_r2_device::gottlieb_sound_r2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, GOTTLIEB_SOUND_REV2, "Gottlieb Sound rev. 2", "gotsndr2", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_audiocpu(*this, "audiocpu"),
- m_speechcpu(*this, "speechcpu"),
- m_dac(*this, "dac"),
- m_ay1(*this, "ay1"),
- m_ay2(*this, "ay2"),
- m_sp0250(*this, "spsnd"),
- m_cobram3_mod(false),
- m_nmi_timer(NULL),
- m_nmi_state(0),
- m_audiocpu_latch(0),
- m_speechcpu_latch(0),
- m_speech_control(0),
- m_last_command(0),
- m_psg_latch(0),
- m_psg_data_latch(0),
- m_sp0250_latch(0)
+ device_mixer_interface(mconfig, *this),
+ m_audiocpu(*this, "audiocpu"),
+ m_speechcpu(*this, "speechcpu"),
+ m_dac(*this, "dac"),
+ m_ay1(*this, "ay1"),
+ m_ay2(*this, "ay2"),
+ m_sp0250(*this, "spsnd"),
+ m_cobram3_mod(false),
+ m_nmi_timer(NULL),
+ m_nmi_state(0),
+ m_audiocpu_latch(0),
+ m_speechcpu_latch(0),
+ m_speech_control(0),
+ m_last_command(0),
+ m_psg_latch(0),
+ m_psg_data_latch(0),
+ m_sp0250_latch(0)
{
}
@@ -783,7 +783,7 @@ CUSTOM_INPUT_MEMBER( gottlieb_sound_r2_device::speech_drq_custom_r )
WRITE8_MEMBER( gottlieb_sound_r2_device::dac_w )
{
// dual DAC; the first DAC serves as the reference voltage for the
- // second, effectively scaling the output
+ // second, effectively scaling the output
m_dac_data[offset] = data;
m_dac->write_unsigned16(m_dac_data[0] * m_dac_data[1]);
}
@@ -935,7 +935,7 @@ INPUT_PORTS_START( gottlieb_sound_r2 )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SB2:4")
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SB2:5")
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SB2:6")
- PORT_DIPNAME( 0x40, 0x40, "Sound Test" ) PORT_DIPLOCATION("SB2:7")
+ PORT_DIPNAME( 0x40, 0x40, "Sound Test" ) PORT_DIPLOCATION("SB2:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, gottlieb_sound_r2_device, speech_drq_custom_r, NULL)
diff --git a/src/mame/audio/gotya.c b/src/mame/audio/gotya.c
index 01b55428e4a..63cbfcd10b1 100644
--- a/src/mame/audio/gotya.c
+++ b/src/mame/audio/gotya.c
@@ -27,7 +27,7 @@ static const struct gotya_sample gotya_samples[] =
{ 0x10, 3, 0 },
{ 0x11, 3, 0 },
- { 0x12, 0, 0 }, /* this should stop the main tune */
+ { 0x12, 0, 0 }, /* this should stop the main tune */
{ 0x13, 3, 0 },
{ 0x14, 3, 0 },
{ 0x15, 3, 0 },
@@ -36,7 +36,7 @@ static const struct gotya_sample gotya_samples[] =
{ 0x18, 3, 0 },
{ 0x19, 3, 0 },
{ 0x1a, 3, 0 },
- { -1, 0, 0 } /* end of array */
+ { -1, 0, 0 } /* end of array */
};
WRITE8_MEMBER(gotya_state::gotya_soundlatch_w)
diff --git a/src/mame/audio/grchamp.c b/src/mame/audio/grchamp.c
index afe875788c0..236ae9d447d 100644
--- a/src/mame/audio/grchamp.c
+++ b/src/mame/audio/grchamp.c
@@ -14,22 +14,22 @@
static const discrete_dac_r1_ladder grchamp_sound_dac1 =
{
- 8, // size of ladder
+ 8, // size of ladder
{RES_K(680), RES_K(330), RES_K(150), RES_K(82), RES_K(39), RES_K(20), RES_K(10), RES_K(4.7)},
0,
- 0, // no rBias
- 0, // no rGnd
- 0 // no cap
+ 0, // no rBias
+ 0, // no rGnd
+ 0 // no cap
};
static const discrete_dac_r1_ladder grchamp_sound_dac2 =
{
- 8, // size of ladder
+ 8, // size of ladder
{RES_K(680), RES_K(330), RES_K(150), RES_K(82), RES_K(39), RES_K(20), RES_K(10), RES_K(4.7)},
0,
- 0, // no rBias
- 0, // no rGnd
- 0 // no cap
+ 0, // no rBias
+ 0, // no rGnd
+ 0 // no cap
};
/* Nodes - Sounds */
@@ -43,7 +43,7 @@ DISCRETE_SOUND_START(grchamp)
DISCRETE_INPUT_LOGIC(GRCHAMP_ENGINE_CS_EN)
DISCRETE_INPUT_DATA (GRCHAMP_SIFT_DATA)
DISCRETE_INPUT_DATA (GRCHAMP_ATTACK_UP_DATA)
- DISCRETE_INPUT_NOT (GRCHAMP_IDLING_EN)
+ DISCRETE_INPUT_NOT (GRCHAMP_IDLING_EN)
DISCRETE_INPUT_LOGIC(GRCHAMP_FOG_EN)
DISCRETE_INPUT_DATA (GRCHAMP_PLAYER_SPEED_DATA)
DISCRETE_INPUT_DATA (GRCHAMP_ATTACK_SPEED_DATA)
@@ -54,9 +54,8 @@ DISCRETE_SOUND_START(grchamp)
DISCRETE_DAC_R1(NODE_21, GRCHAMP_B_DATA, DEFAULT_TTL_V_LOGIC_1, &grchamp_sound_dac2)
- DISCRETE_ADDER4(NODE_89, 1, 0, NODE_20, NODE_21, 0)
+ DISCRETE_ADDER4(NODE_89, 1, 0, NODE_20, NODE_21, 0)
DISCRETE_OUTPUT(NODE_89, 5000)
DISCRETE_SOUND_END
-
diff --git a/src/mame/audio/gridlee.c b/src/mame/audio/gridlee.c
index f06536e6aed..22cb4fbe98c 100644
--- a/src/mame/audio/gridlee.c
+++ b/src/mame/audio/gridlee.c
@@ -183,7 +183,7 @@ const device_type GRIDLEE = &device_creator<gridlee_sound_device>;
gridlee_sound_device::gridlee_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, GRIDLEE, "Gridlee Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(gridlee_sound_state);
}
@@ -216,5 +216,3 @@ void gridlee_sound_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/harddriv.c b/src/mame/audio/harddriv.c
index ef64ca14307..3e982887641 100644
--- a/src/mame/audio/harddriv.c
+++ b/src/mame/audio/harddriv.c
@@ -11,8 +11,8 @@
#include "includes/harddriv.h"
-#define BIO_FREQUENCY (1000000 / 50)
-#define CYCLES_PER_BIO (5000000 / BIO_FREQUENCY)
+#define BIO_FREQUENCY (1000000 / 50)
+#define CYCLES_PER_BIO (5000000 / BIO_FREQUENCY)
/*************************************
@@ -165,33 +165,33 @@ WRITE16_MEMBER(harddriv_state::hdsnd68k_latches_w)
offset &= 7;
switch (offset)
{
- case 0: /* SPWR - 5220 write strobe */
+ case 0: /* SPWR - 5220 write strobe */
/* data == 0 means high, 1 means low */
logerror("%06X:SPWR=%d\n", space.device().safe_pcbase(), data);
break;
- case 1: /* SPRES - 5220 hard reset */
+ case 1: /* SPRES - 5220 hard reset */
/* data == 0 means low, 1 means high */
logerror("%06X:SPRES=%d\n", space.device().safe_pcbase(), data);
break;
- case 2: /* SPRATE */
+ case 2: /* SPRATE */
/* data == 0 means 8kHz, 1 means 10kHz */
logerror("%06X:SPRATE=%d\n", space.device().safe_pcbase(), data);
break;
- case 3: /* CRAMEN */
+ case 3: /* CRAMEN */
/* data == 0 means disable 68k access to COM320, 1 means enable */
m_cramen = data;
break;
- case 4: /* RES320 */
+ case 4: /* RES320 */
logerror("%06X:RES320=%d\n", space.device().safe_pcbase(), data);
if (m_sounddsp != NULL)
m_sounddsp->set_input_line(INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
break;
- case 7: /* LED */
+ case 7: /* LED */
break;
}
}
diff --git a/src/mame/audio/hitme.c b/src/mame/audio/hitme.c
index a4e6bc5e97e..e0f7dd1af65 100644
--- a/src/mame/audio/hitme.c
+++ b/src/mame/audio/hitme.c
@@ -11,7 +11,7 @@
static const discrete_555_desc desc_hitme_555 =
{
DISC_555_OUT_ENERGY | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
@@ -19,18 +19,18 @@ static const discrete_comp_adder_table desc_hitme_adder =
{
DISC_COMP_P_CAPACITOR, 0, 5,
{
- 0.100e-6, // C19
- 0.022e-6, // C18
- 0.033e-6, // C17
- 0.010e-6, // C16
- 0.005e-6 // C15
+ 0.100e-6, // C19
+ 0.022e-6, // C18
+ 0.033e-6, // C17
+ 0.010e-6, // C16
+ 0.005e-6 // C15
}
};
/* Nodes - Adjustment */
-#define HITME_GAME_SPEED NODE_05
+#define HITME_GAME_SPEED NODE_05
/* Nodes - Sounds */
-#define HITME_FINAL_SND NODE_90
+#define HITME_FINAL_SND NODE_90
DISCRETE_SOUND_START(hitme)
@@ -45,25 +45,25 @@ DISCRETE_SOUND_START(hitme)
DISCRETE_ADJUSTMENT(HITME_GAME_SPEED,0.0,25000.0,DISC_LINADJ,"R3")
/* The clock for the main downcounter is a "404", or LS123 retriggerable multivibrator.
- * It is clocked by IPH2 (8.945MHz/16 = 559kHz), then triggers a pulse which is adjustable
- * via the resistor R3. When the pulse is finished, it immediately retriggers itself to
- * form a clock. The length of the clock pulse is 0.45*R*C, where R is the variable R3
- * resistor value, and C is 6.8uF. Thus the frequency of the resulting wave is
- * 1.0/(0.45*R*C). We compute that frequency and use a standard 50% duty cycle square wave.
- * This is because the "off time" of the clock is very small (559kHz), and we will miss
- * edges if we model it perfectly accurately. */
+ * It is clocked by IPH2 (8.945MHz/16 = 559kHz), then triggers a pulse which is adjustable
+ * via the resistor R3. When the pulse is finished, it immediately retriggers itself to
+ * form a clock. The length of the clock pulse is 0.45*R*C, where R is the variable R3
+ * resistor value, and C is 6.8uF. Thus the frequency of the resulting wave is
+ * 1.0/(0.45*R*C). We compute that frequency and use a standard 50% duty cycle square wave.
+ * This is because the "off time" of the clock is very small (559kHz), and we will miss
+ * edges if we model it perfectly accurately. */
DISCRETE_TRANSFORM3(NODE_16,1,0.45*6.8e-6,HITME_GAME_SPEED,"012*/")
DISCRETE_SQUAREWAVE(NODE_17,1,NODE_16,1,50,0.5,0)
/* There are 2 cascaded 4-bit downcounters (2R = low, 2P = high), effectively
- * making an 8-bit downcounter, clocked by the clock from the 404 chip.
- * The initial count is latched by writing OUT0. */
+ * making an 8-bit downcounter, clocked by the clock from the 404 chip.
+ * The initial count is latched by writing OUT0. */
DISCRETE_COUNTER(NODE_20,1,HITME_OUT0,NODE_17,0,255,0,HITME_DOWNCOUNT_VAL,DISC_CLK_ON_F_EDGE)
/* When the counter rolls over from 0->255, we clock a D-type flipflop at 2N. */
DISCRETE_TRANSFORM2(NODE_21,NODE_20,255,"01=!")
/* This flipflop represents the latch at 1L. It is clocked when OUT1 is written and latches
- * the value from the processor. When the downcounter above rolls over, it clears the latch. */
+ * the value from the processor. When the downcounter above rolls over, it clears the latch. */
DISCRETE_LOGIC_DFLIPFLOP(NODE_22,NODE_21,1,HITME_OUT1,HITME_ENABLE_VAL)
/* The output of the latch goes through a series of various capacitors in parallel. */
diff --git a/src/mame/audio/hyprolyb.c b/src/mame/audio/hyprolyb.c
index e62a35c1b81..806a36e8e03 100644
--- a/src/mame/audio/hyprolyb.c
+++ b/src/mame/audio/hyprolyb.c
@@ -7,7 +7,7 @@ struct hyprolyb_adpcm_state
{
device_t *m_msm;
address_space *m_space;
- UINT8 m_adpcm_ready; // only bootlegs
+ UINT8 m_adpcm_ready; // only bootlegs
UINT8 m_adpcm_busy;
UINT8 m_vck_ready;
};
@@ -26,7 +26,7 @@ static DEVICE_START( hyprolyb_adpcm )
state->m_space = &device->machine().device("audiocpu")->memory().space(AS_PROGRAM);
state->m_msm = device->machine().device("msm");
- device->save_item(NAME(state->m_adpcm_ready)); // only bootlegs
+ device->save_item(NAME(state->m_adpcm_ready)); // only bootlegs
device->save_item(NAME(state->m_adpcm_busy));
device->save_item(NAME(state->m_vck_ready));
}
@@ -120,12 +120,12 @@ static void adpcm_vck_callback( device_t *device )
static const msm5205_interface hyprolyb_msm5205_config =
{
- adpcm_vck_callback, /* VCK function */
- MSM5205_S96_4B /* 4 kHz */
+ adpcm_vck_callback, /* VCK function */
+ MSM5205_S96_4B /* 4 kHz */
};
MACHINE_CONFIG_FRAGMENT( hyprolyb_adpcm )
- MCFG_CPU_ADD("adpcm", M6802, XTAL_14_31818MHz/8) /* unknown clock */
+ MCFG_CPU_ADD("adpcm", M6802, XTAL_14_31818MHz/8) /* unknown clock */
MCFG_CPU_PROGRAM_MAP(hyprolyb_adpcm_map)
MCFG_SOUND_ADD("hyprolyb_adpcm", HYPROLYB_ADPCM, 0)
@@ -139,7 +139,7 @@ const device_type HYPROLYB_ADPCM = &device_creator<hyprolyb_adpcm_device>;
hyprolyb_adpcm_device::hyprolyb_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, HYPROLYB_ADPCM, "Hyper Olympics Audio", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(hyprolyb_adpcm_state);
}
@@ -181,5 +181,3 @@ void hyprolyb_adpcm_device::sound_stream_update(sound_stream &stream, stream_sam
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/hyprolyb.h b/src/mame/audio/hyprolyb.h
index d2145720d7b..c998552cc95 100644
--- a/src/mame/audio/hyprolyb.h
+++ b/src/mame/audio/hyprolyb.h
@@ -4,7 +4,7 @@ DECLARE_READ8_DEVICE_HANDLER( hyprolyb_adpcm_busy_r );
MACHINE_CONFIG_EXTERN( hyprolyb_adpcm );
class hyprolyb_adpcm_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
hyprolyb_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -26,4 +26,3 @@ private:
};
extern const device_type HYPROLYB_ADPCM;
-
diff --git a/src/mame/audio/invinco.c b/src/mame/audio/invinco.c
index e73c0bc309f..302988e2598 100644
--- a/src/mame/audio/invinco.c
+++ b/src/mame/audio/invinco.c
@@ -7,12 +7,12 @@
#include "includes/vicdual.h"
/* output port 0x02 definitions - sound effect drive outputs */
-#define OUT_PORT_2_SAUCER 0x04
-#define OUT_PORT_2_MOVE1 0x08
-#define OUT_PORT_2_MOVE2 0x10
-#define OUT_PORT_2_FIRE 0x20
-#define OUT_PORT_2_INVHIT 0x40
-#define OUT_PORT_2_SHIPHIT 0x80
+#define OUT_PORT_2_SAUCER 0x04
+#define OUT_PORT_2_MOVE1 0x08
+#define OUT_PORT_2_MOVE2 0x10
+#define OUT_PORT_2_FIRE 0x20
+#define OUT_PORT_2_INVHIT 0x40
+#define OUT_PORT_2_SHIPHIT 0x80
#define PLAY(samp,id,loop) samp->start( id, id, loop )
@@ -29,8 +29,8 @@ static const char *const invinco_sample_names[] =
"fire",
"invhit",
"shiphit",
- "move3", /* currently not used */
- "move4", /* currently not used */
+ "move3", /* currently not used */
+ "move4", /* currently not used */
0
};
diff --git a/src/mame/audio/irem.c b/src/mame/audio/irem.c
index 318e685e9bb..740a3dab482 100644
--- a/src/mame/audio/irem.c
+++ b/src/mame/audio/irem.c
@@ -155,7 +155,7 @@ static WRITE8_DEVICE_HANDLER( ay8910_0_portb_w )
/* bits 2-4 select MSM5205 clock & 3b/4b playback mode */
msm5205_playmode_w(state->m_adpcm1, (data >> 2) & 7);
if (state->m_adpcm2 != NULL)
- msm5205_playmode_w(state->m_adpcm2, ((data >> 2) & 4) | 3); /* always in slave mode */
+ msm5205_playmode_w(state->m_adpcm2, ((data >> 2) & 4) | 3); /* always in slave mode */
/* bits 0 and 1 reset the two chips */
msm5205_reset_w(state->m_adpcm1, data & 1);
@@ -268,14 +268,14 @@ static const ay8910_interface irem_ay8910_interface_2 =
static const msm5205_interface irem_msm5205_interface_1 =
{
- adpcm_int, /* interrupt function */
- MSM5205_S96_4B /* default to 4KHz, but can be changed at run time */
+ adpcm_int, /* interrupt function */
+ MSM5205_S96_4B /* default to 4KHz, but can be changed at run time */
};
static const msm5205_interface irem_msm5205_interface_2 =
{
- 0, /* interrupt function */
- MSM5205_SEX_4B /* default to 4KHz, but can be changed at run time, slave */
+ 0, /* interrupt function */
+ MSM5205_SEX_4B /* default to 4KHz, but can be changed at run time, slave */
};
/*
@@ -289,24 +289,24 @@ static const msm5205_interface irem_msm5205_interface_2 =
* I did my test to verify against pcb pictures of "tropical angel"
*/
-#define M52_R9 560
-#define M52_R10 330
-#define M52_R12 RES_K(10)
-#define M52_R13 RES_K(10)
-#define M52_R14 RES_K(10)
-#define M52_R15 RES_K(2.2) /* schematics RES_K(22) , althought 10-Yard states 2.2 */
-#define M52_R19 RES_K(10)
-#define M52_R22 RES_K(47)
-#define M52_R23 RES_K(2.2)
-#define M52_R25 RES_K(10)
-#define M52_VR1 RES_K(50)
-
-#define M52_C28 CAP_U(1)
-#define M52_C30 CAP_U(0.022)
-#define M52_C32 CAP_U(0.022)
-#define M52_C35 CAP_U(47)
-#define M52_C37 CAP_U(0.1)
-#define M52_C38 CAP_U(0.0068)
+#define M52_R9 560
+#define M52_R10 330
+#define M52_R12 RES_K(10)
+#define M52_R13 RES_K(10)
+#define M52_R14 RES_K(10)
+#define M52_R15 RES_K(2.2) /* schematics RES_K(22) , althought 10-Yard states 2.2 */
+#define M52_R19 RES_K(10)
+#define M52_R22 RES_K(47)
+#define M52_R23 RES_K(2.2)
+#define M52_R25 RES_K(10)
+#define M52_VR1 RES_K(50)
+
+#define M52_C28 CAP_U(1)
+#define M52_C30 CAP_U(0.022)
+#define M52_C32 CAP_U(0.022)
+#define M52_C35 CAP_U(47)
+#define M52_C37 CAP_U(0.1)
+#define M52_C38 CAP_U(0.0068)
/*
* C35 is disabled, the mixer would just deliver
@@ -318,26 +318,26 @@ static const msm5205_interface irem_msm5205_interface_2 =
static const discrete_mixer_desc m52_sound_c_stage1 =
{DISC_MIXER_IS_RESISTOR,
{M52_R19, M52_R22, M52_R23 },
- { 0, 0, 0 }, /* variable resistors */
- {M52_C37, 0, 0 }, /* node capacitors */
- 0, 0, /* rI, rF */
- M52_C35*0, /* cF */
- 0, /* cAmp */
+ { 0, 0, 0 }, /* variable resistors */
+ {M52_C37, 0, 0 }, /* node capacitors */
+ 0, 0, /* rI, rF */
+ M52_C35*0, /* cF */
+ 0, /* cAmp */
0, 1};
static const discrete_op_amp_filt_info m52_sound_c_sallen_key =
{ M52_R13, M52_R14, 0, 0, 0,
- M52_C32, M52_C38, 0
+ M52_C32, M52_C38, 0
};
static const discrete_mixer_desc m52_sound_c_mix1 =
{DISC_MIXER_IS_RESISTOR,
{M52_R25, M52_R15 },
- { 0, 0 }, /* variable resistors */
+ { 0, 0 }, /* variable resistors */
{ 0, 0 }, /* node capacitors */
- 0, M52_VR1, /* rI, rF */
- 0, /* cF */
- CAP_U(1), /* cAmp */
+ 0, M52_VR1, /* rI, rF */
+ 0, /* cF */
+ CAP_U(1), /* cAmp */
0, 1};
static DISCRETE_SOUND_START( m52_sound_c )
@@ -470,7 +470,7 @@ MACHINE_CONFIG_FRAGMENT( m52_sound_c_audio )
MACHINE_CONFIG_END
-MACHINE_CONFIG_DERIVED( m52_large_audio, irem_audio_base ) /* 10 yard fight */
+MACHINE_CONFIG_DERIVED( m52_large_audio, irem_audio_base ) /* 10 yard fight */
/* basic machine hardware */
MCFG_CPU_MODIFY("iremsound")
@@ -489,7 +489,7 @@ const device_type IREM_AUDIO = &device_creator<irem_audio_device>;
irem_audio_device::irem_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, IREM_AUDIO, "Irem Audio", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(irem_audio_state);
}
@@ -522,5 +522,3 @@ void irem_audio_device::sound_stream_update(sound_stream &stream, stream_sample_
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/irem.h b/src/mame/audio/irem.h
index ad51aad5761..ecdb9bed840 100644
--- a/src/mame/audio/irem.h
+++ b/src/mame/audio/irem.h
@@ -5,7 +5,7 @@ MACHINE_CONFIG_EXTERN( m52_large_audio );
MACHINE_CONFIG_EXTERN( m62_audio );
class irem_audio_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
irem_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -26,4 +26,3 @@ private:
};
extern const device_type IREM_AUDIO;
-
diff --git a/src/mame/audio/jaguar.c b/src/mame/audio/jaguar.c
index 48def4cd270..a6170ef020b 100644
--- a/src/mame/audio/jaguar.c
+++ b/src/mame/audio/jaguar.c
@@ -150,11 +150,11 @@
/* Jerry registers */
enum
{
- JPIT1, DSP0, JPIT2, DSP1,
- JPIT3, DSP2, JPIT4, DSP3,
- CLK1, CLK2, CLK3,
+ JPIT1, DSP0, JPIT2, DSP1,
+ JPIT3, DSP2, JPIT4, DSP3,
+ CLK1, CLK2, CLK3,
JINTCTRL = 0x20/2,
- ASIDATA = 0x30/2, ASICTRL, ASICLK,
+ ASIDATA = 0x30/2, ASICTRL, ASICLK,
DSP_REGS
};
diff --git a/src/mame/audio/leland.c b/src/mame/audio/leland.c
index 3e9507812b4..7a6ebbe476c 100644
--- a/src/mame/audio/leland.c
+++ b/src/mame/audio/leland.c
@@ -85,94 +85,94 @@
#include "sound/dac.h"
-#define OUTPUT_RATE 50000
+#define OUTPUT_RATE 50000
-#define DAC_BUFFER_SIZE 1024
-#define DAC_BUFFER_SIZE_MASK (DAC_BUFFER_SIZE - 1)
+#define DAC_BUFFER_SIZE 1024
+#define DAC_BUFFER_SIZE_MASK (DAC_BUFFER_SIZE - 1)
-#define LOG_INTERRUPTS 0
-#define LOG_DMA 0
-#define LOG_SHORTAGES 0
-#define LOG_TIMER 0
-#define LOG_COMM 0
-#define LOG_PORTS 0
-#define LOG_DAC 0
-#define LOG_EXTERN 0
-#define LOG_PIT 0
+#define LOG_INTERRUPTS 0
+#define LOG_DMA 0
+#define LOG_SHORTAGES 0
+#define LOG_TIMER 0
+#define LOG_COMM 0
+#define LOG_PORTS 0
+#define LOG_DAC 0
+#define LOG_EXTERN 0
+#define LOG_PIT 0
/* according to the Intel manual, external interrupts are not latched */
/* however, I cannot get this system to work without latching them */
-#define LATCH_INTS 1
+#define LATCH_INTS 1
-#define DAC_VOLUME_SCALE 4
+#define DAC_VOLUME_SCALE 4
struct mem_state
{
- UINT16 lower;
- UINT16 upper;
- UINT16 middle;
- UINT16 middle_size;
- UINT16 peripheral;
+ UINT16 lower;
+ UINT16 upper;
+ UINT16 middle;
+ UINT16 middle_size;
+ UINT16 peripheral;
};
struct timer_state
{
- UINT16 control;
- UINT16 maxA;
- UINT16 maxB;
- UINT16 count;
+ UINT16 control;
+ UINT16 maxA;
+ UINT16 maxB;
+ UINT16 count;
emu_timer *int_timer;
emu_timer *time_timer;
- UINT8 time_timer_active;
+ UINT8 time_timer_active;
attotime last_time;
};
struct dma_state
{
- UINT32 source;
- UINT32 dest;
- UINT16 count;
- UINT16 control;
- UINT8 finished;
+ UINT32 source;
+ UINT32 dest;
+ UINT16 count;
+ UINT16 control;
+ UINT8 finished;
emu_timer *finish_timer;
};
struct intr_state
{
- UINT8 pending;
- UINT16 ack_mask;
- UINT16 priority_mask;
- UINT16 in_service;
- UINT16 request;
- UINT16 status;
- UINT16 poll_status;
- UINT16 timer;
- UINT16 dma[2];
- UINT16 ext[4];
+ UINT8 pending;
+ UINT16 ack_mask;
+ UINT16 priority_mask;
+ UINT16 in_service;
+ UINT16 request;
+ UINT16 status;
+ UINT16 poll_status;
+ UINT16 timer;
+ UINT16 dma[2];
+ UINT16 ext[4];
};
struct i80186_state
{
device_t *cpu;
- struct timer_state timer[3];
- struct dma_state dma[2];
- struct intr_state intr;
- struct mem_state mem;
+ struct timer_state timer[3];
+ struct dma_state dma[2];
+ struct intr_state intr;
+ struct mem_state mem;
};
struct dac_state
{
- INT16 value;
- INT16 volume;
- UINT32 frequency;
- UINT32 step;
- UINT32 fraction;
+ INT16 value;
+ INT16 volume;
+ UINT32 frequency;
+ UINT32 step;
+ UINT32 fraction;
- INT16 buffer[DAC_BUFFER_SIZE];
- UINT32 bufin;
- UINT32 bufout;
- UINT32 buftarget;
+ INT16 buffer[DAC_BUFFER_SIZE];
+ UINT32 bufin;
+ UINT32 bufout;
+ UINT32 buftarget;
};
struct counter_state
@@ -574,14 +574,14 @@ const device_type LELAND = &device_creator<leland_sound_device>;
leland_sound_device::leland_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, LELAND, "Leland DAC", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(leland_sound_state);
}
leland_sound_device::leland_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(leland_sound_state);
}
@@ -727,14 +727,14 @@ static void leland_80186_reset(device_t *device)
state->m_i80186.dma[1].finish_timer = oldstate.dma[1].finish_timer;
/* reset the interrupt state */
- state->m_i80186.intr.priority_mask = 0x0007;
- state->m_i80186.intr.timer = 0x000f;
- state->m_i80186.intr.dma[0] = 0x000f;
- state->m_i80186.intr.dma[1] = 0x000f;
- state->m_i80186.intr.ext[0] = 0x000f;
- state->m_i80186.intr.ext[1] = 0x000f;
- state->m_i80186.intr.ext[2] = 0x000f;
- state->m_i80186.intr.ext[3] = 0x000f;
+ state->m_i80186.intr.priority_mask = 0x0007;
+ state->m_i80186.intr.timer = 0x000f;
+ state->m_i80186.intr.dma[0] = 0x000f;
+ state->m_i80186.intr.dma[1] = 0x000f;
+ state->m_i80186.intr.ext[0] = 0x000f;
+ state->m_i80186.intr.ext[1] = 0x000f;
+ state->m_i80186.intr.ext[2] = 0x000f;
+ state->m_i80186.intr.ext[3] = 0x000f;
/* reset the DAC and counter states as well */
memset(&state->m_dac, 0, sizeof(state->m_dac));
@@ -791,9 +791,9 @@ static IRQ_CALLBACK( int_callback )
{
switch (state->m_i80186.intr.poll_status & 0x1f)
{
- case 0x08: state->m_i80186.intr.status &= ~0x01; break;
- case 0x12: state->m_i80186.intr.status &= ~0x02; break;
- case 0x13: state->m_i80186.intr.status &= ~0x04; break;
+ case 0x08: state->m_i80186.intr.status &= ~0x01; break;
+ case 0x12: state->m_i80186.intr.status &= ~0x02; break;
+ case 0x13: state->m_i80186.intr.status &= ~0x04; break;
}
}
state->m_i80186.intr.ack_mask = 0;
@@ -905,16 +905,16 @@ static void handle_eoi(device_t *device, int data)
/* turn off the appropriate in-service bit */
switch (data & 0x1f)
{
- case 0x08: state->m_i80186.intr.in_service &= ~0x01; break;
- case 0x12: state->m_i80186.intr.in_service &= ~0x01; break;
- case 0x13: state->m_i80186.intr.in_service &= ~0x01; break;
- case 0x0a: state->m_i80186.intr.in_service &= ~0x04; break;
- case 0x0b: state->m_i80186.intr.in_service &= ~0x08; break;
- case 0x0c: state->m_i80186.intr.in_service &= ~0x10; break;
- case 0x0d: state->m_i80186.intr.in_service &= ~0x20; break;
- case 0x0e: state->m_i80186.intr.in_service &= ~0x40; break;
- case 0x0f: state->m_i80186.intr.in_service &= ~0x80; break;
- default: logerror("%s:ERROR - 80186 EOI with unknown vector %02X\n", machine.describe_context(), data & 0x1f);
+ case 0x08: state->m_i80186.intr.in_service &= ~0x01; break;
+ case 0x12: state->m_i80186.intr.in_service &= ~0x01; break;
+ case 0x13: state->m_i80186.intr.in_service &= ~0x01; break;
+ case 0x0a: state->m_i80186.intr.in_service &= ~0x04; break;
+ case 0x0b: state->m_i80186.intr.in_service &= ~0x08; break;
+ case 0x0c: state->m_i80186.intr.in_service &= ~0x10; break;
+ case 0x0d: state->m_i80186.intr.in_service &= ~0x20; break;
+ case 0x0e: state->m_i80186.intr.in_service &= ~0x40; break;
+ case 0x0f: state->m_i80186.intr.in_service &= ~0x80; break;
+ default: logerror("%s:ERROR - 80186 EOI with unknown vector %02X\n", machine.describe_context(), data & 0x1f);
}
if (LOG_INTERRUPTS) logerror("(%f) **** Got EOI for vector %02X\n", machine.time().as_double(), data & 0x1f);
}
@@ -1932,11 +1932,11 @@ static TIMER_CALLBACK( delayed_response_r )
int oldaf = master->state_int(Z80_AF);
/* This is pretty cheesy, but necessary. Since the CPUs run in round-robin order,
- synchronizing on the write to this register from the slave side does nothing.
- In order to make sure the master CPU get the real response, we synchronize on
- the read. However, the value we returned the first time around may not be
- accurate, so after the system has synced up, we go back into the master CPUs
- state and put the proper value into the A register. */
+ synchronizing on the write to this register from the slave side does nothing.
+ In order to make sure the master CPU get the real response, we synchronize on
+ the read. However, the value we returned the first time around may not be
+ accurate, so after the system has synced up, we go back into the master CPUs
+ state and put the proper value into the A register. */
if (pc == checkpc)
{
if (LOG_COMM) logerror("(Updated sound response latch to %02X)\n", state->m_sound_response);
@@ -2251,7 +2251,7 @@ static WRITE16_DEVICE_HANDLER( peripheral_w )
dac_10bit_w(device, space, offset, data, mem_mask);
break;
- case 5: /* Ataxx/WSF/Indy Heat only */
+ case 5: /* Ataxx/WSF/Indy Heat only */
ataxx_dac_control(device, space, offset, data, mem_mask);
break;
@@ -2272,7 +2272,7 @@ static WRITE16_DEVICE_HANDLER( peripheral_w )
WRITE8_DEVICE_HANDLER( ataxx_80186_control_w )
{
/* compute the bit-shuffled variants of the bits and then write them */
- int modified = ((data & 0x01) << 7) |
+ int modified = ((data & 0x01) << 7) |
((data & 0x02) << 5) |
((data & 0x04) << 3) |
((data & 0x08) << 1);
diff --git a/src/mame/audio/llander.c b/src/mame/audio/llander.c
index a4c2b119bef..d3277876410 100644
--- a/src/mame/audio/llander.c
+++ b/src/mame/audio/llander.c
@@ -12,30 +12,30 @@
/* Lunar Lander Sound System Analog emulation by K.Wilkins Nov 2000 */
/* Questions/Suggestions to mame@dysfunction.demon.co.uk */
/************************************************************************/
-#define LLANDER_TONE3K_EN NODE_01
-#define LLANDER_TONE6K_EN NODE_02
-#define LLANDER_THRUST_DATA NODE_03
-#define LLANDER_EXPLOD_EN NODE_04
-#define LLANDER_NOISE_RESET NODE_05
+#define LLANDER_TONE3K_EN NODE_01
+#define LLANDER_TONE6K_EN NODE_02
+#define LLANDER_THRUST_DATA NODE_03
+#define LLANDER_EXPLOD_EN NODE_04
+#define LLANDER_NOISE_RESET NODE_05
-#define LLANDER_NOISE NODE_10
-#define LLANDER_TONE_3K_SND NODE_11
-#define LLANDER_TONE_6K_SND NODE_12
-#define LLANDER_THRUST_EXPLOD_SND NODE_13
+#define LLANDER_NOISE NODE_10
+#define LLANDER_TONE_3K_SND NODE_11
+#define LLANDER_TONE_6K_SND NODE_12
+#define LLANDER_THRUST_EXPLOD_SND NODE_13
static const discrete_lfsr_desc llander_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 6, /* Use Bit 6 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is inverted XOR */
- DISC_LFSR_IN0, /* Feedback stage2 is just stage 1 output external feed not used */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output not inverted */
- 14 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 6, /* Use Bit 6 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is inverted XOR */
+ DISC_LFSR_IN0, /* Feedback stage2 is just stage 1 output external feed not used */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output not inverted */
+ 14 /* Output bit */
};
DISCRETE_SOUND_START(llander)
@@ -58,39 +58,38 @@ DISCRETE_SOUND_START(llander)
DISCRETE_INPUT_LOGIC(LLANDER_EXPLOD_EN)
DISCRETE_INPUT_PULSE(LLANDER_NOISE_RESET, 1)
- DISCRETE_LFSR_NOISE(NODE_20, 1, LLANDER_NOISE_RESET, 12000, 1, 0, 0, &llander_lfsr) // 12KHz Noise source for thrust
+ DISCRETE_LFSR_NOISE(NODE_20, 1, LLANDER_NOISE_RESET, 12000, 1, 0, 0, &llander_lfsr) // 12KHz Noise source for thrust
DISCRETE_RCFILTER(LLANDER_NOISE, NODE_20, 2247, 1e-6)
- DISCRETE_SQUAREWFIX(LLANDER_TONE_3K_SND, LLANDER_TONE3K_EN, 3000, 9.2, 50, 0, 0) // 3KHz
+ DISCRETE_SQUAREWFIX(LLANDER_TONE_3K_SND, LLANDER_TONE3K_EN, 3000, 9.2, 50, 0, 0) // 3KHz
- DISCRETE_SQUAREWFIX(LLANDER_TONE_6K_SND, LLANDER_TONE6K_EN, 6000, 9.2, 50, 0, 0) // 6KHz
+ DISCRETE_SQUAREWFIX(LLANDER_TONE_6K_SND, LLANDER_TONE6K_EN, 6000, 9.2, 50, 0, 0) // 6KHz
- DISCRETE_MULTIPLY(NODE_30, LLANDER_NOISE, LLANDER_THRUST_DATA) // Mix in 12KHz Noise source for thrust
+ DISCRETE_MULTIPLY(NODE_30, LLANDER_NOISE, LLANDER_THRUST_DATA) // Mix in 12KHz Noise source for thrust
/* TBD - replace this line with a Sallen-Key Bandpass macro */
DISCRETE_FILTER2(NODE_31, 1, NODE_30, 89.5, (1.0 / 7.6), DISC_FILTER_BANDPASS)
- DISCRETE_MULTIPLY(NODE_32, NODE_30, 1000.0/600.0) // Explode adds original noise source onto filtered source
+ DISCRETE_MULTIPLY(NODE_32, NODE_30, 1000.0/600.0) // Explode adds original noise source onto filtered source
DISCRETE_ONOFF(NODE_33, LLANDER_EXPLOD_EN, NODE_32)
DISCRETE_ADDER2(NODE_34, 1, NODE_31, NODE_33)
/* TBD - replace this line with a Active Lowpass macro */
DISCRETE_FILTER1(LLANDER_THRUST_EXPLOD_SND, 1, NODE_34, 560, DISC_FILTER_LOWPASS)
- DISCRETE_ADDER3(NODE_90, 1, LLANDER_TONE_3K_SND, LLANDER_TONE_6K_SND, LLANDER_THRUST_EXPLOD_SND) // Mix all four sound sources
+ DISCRETE_ADDER3(NODE_90, 1, LLANDER_TONE_3K_SND, LLANDER_TONE_6K_SND, LLANDER_THRUST_EXPLOD_SND) // Mix all four sound sources
DISCRETE_GAIN(NODE_91, NODE_90, 65534.0/(9.2+9.2+600+1000))
- DISCRETE_OUTPUT(NODE_90, 65534.0/(9.2+9.2+600+1000)) // Take the output from the mixer
+ DISCRETE_OUTPUT(NODE_90, 65534.0/(9.2+9.2+600+1000)) // Take the output from the mixer
DISCRETE_SOUND_END
WRITE8_MEMBER(asteroid_state::llander_snd_reset_w)
{
/* Resets the LFSR that is used for the white noise generator */
- discrete_sound_w(m_discrete, space, LLANDER_NOISE_RESET, 0); /* Reset */
+ discrete_sound_w(m_discrete, space, LLANDER_NOISE_RESET, 0); /* Reset */
}
WRITE8_MEMBER(asteroid_state::llander_sounds_w)
{
- discrete_sound_w(m_discrete, space, LLANDER_THRUST_DATA, data & 0x07); /* Thrust volume */
- discrete_sound_w(m_discrete, space, LLANDER_TONE3K_EN, data & 0x10); /* Tone 3KHz enable */
- discrete_sound_w(m_discrete, space, LLANDER_TONE6K_EN, data & 0x20); /* Tone 6KHz enable */
- discrete_sound_w(m_discrete, space, LLANDER_EXPLOD_EN, data & 0x08); /* Explosion */
+ discrete_sound_w(m_discrete, space, LLANDER_THRUST_DATA, data & 0x07); /* Thrust volume */
+ discrete_sound_w(m_discrete, space, LLANDER_TONE3K_EN, data & 0x10); /* Tone 3KHz enable */
+ discrete_sound_w(m_discrete, space, LLANDER_TONE6K_EN, data & 0x20); /* Tone 6KHz enable */
+ discrete_sound_w(m_discrete, space, LLANDER_EXPLOD_EN, data & 0x08); /* Explosion */
}
-
diff --git a/src/mame/audio/m72.c b/src/mame/audio/m72.c
index ebd31f52a53..b22972bf7af 100644
--- a/src/mame/audio/m72.c
+++ b/src/mame/audio/m72.c
@@ -225,7 +225,7 @@ WRITE8_DEVICE_HANDLER( poundfor_sample_addr_w )
m72_audio_state *state = get_safe_token(device);
/* poundfor writes both sample start and sample END - a first for Irem...
- we don't handle the end written here, 00 marks the sample end as usual. */
+ we don't handle the end written here, 00 marks the sample end as usual. */
if (offset > 1) return;
state->sample_addr >>= 4;
@@ -257,7 +257,7 @@ const device_type M72 = &device_creator<m72_audio_device>;
m72_audio_device::m72_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, M72, "M72 Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(m72_audio_state);
}
@@ -299,5 +299,3 @@ void m72_audio_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/m72.h b/src/mame/audio/m72.h
index 009902e1ccb..d04640fe3ec 100644
--- a/src/mame/audio/m72.h
+++ b/src/mame/audio/m72.h
@@ -19,7 +19,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( rtype2_sample_addr_w );
DECLARE_WRITE8_DEVICE_HANDLER( poundfor_sample_addr_w );
class m72_audio_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
m72_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -41,4 +41,3 @@ private:
};
extern const device_type M72;
-
diff --git a/src/mame/audio/m79amb.c b/src/mame/audio/m79amb.c
index cf2a27dcc74..8100e2732b2 100644
--- a/src/mame/audio/m79amb.c
+++ b/src/mame/audio/m79amb.c
@@ -7,109 +7,109 @@
#include "includes/m79amb.h"
#include "sound/discrete.h"
-#define TIME_OF_9602(r, c) (0.34 * (r) * (c) * (1.0 + 1.0 / (r)))
-#define TIME_OF_9602_WITH_DIODE(r, c) (0.3 * (r) * (c))
+#define TIME_OF_9602(r, c) (0.34 * (r) * (c) * (1.0 + 1.0 / (r)))
+#define TIME_OF_9602_WITH_DIODE(r, c) (0.3 * (r) * (c))
/* Discrete Sound Input Nodes */
-#define M79AMB_BOOM_EN NODE_01
-#define M79AMB_THUD_EN NODE_02
-#define M79AMB_SHOT_EN NODE_03
-#define M79AMB_MC_REV_EN NODE_04
-#define M79AMB_MC_CONTROL_EN NODE_05
-#define M79AMB_TANK_TRUCK_JEEP_EN NODE_06
-#define M79AMB_WHISTLE_A_EN NODE_07
-#define M79AMB_WHISTLE_B_EN NODE_08
+#define M79AMB_BOOM_EN NODE_01
+#define M79AMB_THUD_EN NODE_02
+#define M79AMB_SHOT_EN NODE_03
+#define M79AMB_MC_REV_EN NODE_04
+#define M79AMB_MC_CONTROL_EN NODE_05
+#define M79AMB_TANK_TRUCK_JEEP_EN NODE_06
+#define M79AMB_WHISTLE_A_EN NODE_07
+#define M79AMB_WHISTLE_B_EN NODE_08
/* Discrete Sound Output Nodes */
-#define M79AMB_BOOM_SND NODE_11
-#define M79AMB_THUD_SND NODE_12
-#define M79AMB_SHOT_SND NODE_13
-#define M79AMB_MC_SND NODE_14
-#define M79AMB_TANK_TRUCK_JEEP_SND NODE_15
-#define M79AMB_WHISTLE_A_SND NODE_16
-#define M79AMB_WHISTLE_B_SND NODE_17
+#define M79AMB_BOOM_SND NODE_11
+#define M79AMB_THUD_SND NODE_12
+#define M79AMB_SHOT_SND NODE_13
+#define M79AMB_MC_SND NODE_14
+#define M79AMB_TANK_TRUCK_JEEP_SND NODE_15
+#define M79AMB_WHISTLE_A_SND NODE_16
+#define M79AMB_WHISTLE_B_SND NODE_17
/* Parts List - Resistors */
-#define M79AMB_R2 RES_K(5.6)
-#define M79AMB_R6 220
-#define M79AMB_R9 RES_K(4.7)
-#define M79AMB_R10 RES_K(2.2)
-#define M79AMB_R12 RES_K(5.6)
-#define M79AMB_R16 330
-#define M79AMB_R19 RES_K(4.7)
-#define M79AMB_R20 RES_K(2.2)
-#define M79AMB_R22 RES_K(3.3)
-#define M79AMB_R26 100
-#define M79AMB_R29 RES_K(4.7)
-#define M79AMB_R30 RES_K(1.5)
-#define M79AMB_R35 RES_K(470)
-#define M79AMB_R36 RES_K(39)
-#define M79AMB_R37 RES_K(82)
-#define M79AMB_R38 100
-#define M79AMB_R39 RES_K(10)
-#define M79AMB_R41 RES_K(2.2)
-#define M79AMB_R42 RES_K(10)
-#define M79AMB_R43 220
-#define M79AMB_R44 RES_K(39)
-#define M79AMB_R45 RES_K(82)
-#define M79AMB_R46 RES_K(10)
-#define M79AMB_R48 RES_K(2.2)
-#define M79AMB_R49 RES_K(1)
-#define M79AMB_R51 RES_K(39)
-#define M79AMB_R52 RES_K(82)
-#define M79AMB_R53 100
-#define M79AMB_R54 RES_K(10)
-#define M79AMB_R57 RES_K(2.2)
-#define M79AMB_R58 RES_K(2.2)
-#define M79AMB_R59 RES_K(1)
-#define M79AMB_R61 RES_K(39)
-#define M79AMB_R62 RES_K(82)
-#define M79AMB_R63 100
-#define M79AMB_R64 RES_K(10)
-#define M79AMB_R67 RES_K(2.2)
-#define M79AMB_R68 RES_K(2.2)
-#define M79AMB_R69 RES_K(1)
-#define M79AMB_R76 RES_K(2.7)
-#define M79AMB_R77 RES_K(47)
-#define M79AMB_R78 RES_K(47)
-#define M79AMB_R79 RES_K(15)
-#define M79AMB_R80 RES_K(22)
-#define M79AMB_R81 RES_K(100)
-#define M79AMB_R82 RES_K(100)
-#define M79AMB_R83 RES_K(3.3)
-#define M79AMB_R84 RES_K(50)
-#define M79AMB_R86 470
+#define M79AMB_R2 RES_K(5.6)
+#define M79AMB_R6 220
+#define M79AMB_R9 RES_K(4.7)
+#define M79AMB_R10 RES_K(2.2)
+#define M79AMB_R12 RES_K(5.6)
+#define M79AMB_R16 330
+#define M79AMB_R19 RES_K(4.7)
+#define M79AMB_R20 RES_K(2.2)
+#define M79AMB_R22 RES_K(3.3)
+#define M79AMB_R26 100
+#define M79AMB_R29 RES_K(4.7)
+#define M79AMB_R30 RES_K(1.5)
+#define M79AMB_R35 RES_K(470)
+#define M79AMB_R36 RES_K(39)
+#define M79AMB_R37 RES_K(82)
+#define M79AMB_R38 100
+#define M79AMB_R39 RES_K(10)
+#define M79AMB_R41 RES_K(2.2)
+#define M79AMB_R42 RES_K(10)
+#define M79AMB_R43 220
+#define M79AMB_R44 RES_K(39)
+#define M79AMB_R45 RES_K(82)
+#define M79AMB_R46 RES_K(10)
+#define M79AMB_R48 RES_K(2.2)
+#define M79AMB_R49 RES_K(1)
+#define M79AMB_R51 RES_K(39)
+#define M79AMB_R52 RES_K(82)
+#define M79AMB_R53 100
+#define M79AMB_R54 RES_K(10)
+#define M79AMB_R57 RES_K(2.2)
+#define M79AMB_R58 RES_K(2.2)
+#define M79AMB_R59 RES_K(1)
+#define M79AMB_R61 RES_K(39)
+#define M79AMB_R62 RES_K(82)
+#define M79AMB_R63 100
+#define M79AMB_R64 RES_K(10)
+#define M79AMB_R67 RES_K(2.2)
+#define M79AMB_R68 RES_K(2.2)
+#define M79AMB_R69 RES_K(1)
+#define M79AMB_R76 RES_K(2.7)
+#define M79AMB_R77 RES_K(47)
+#define M79AMB_R78 RES_K(47)
+#define M79AMB_R79 RES_K(15)
+#define M79AMB_R80 RES_K(22)
+#define M79AMB_R81 RES_K(100)
+#define M79AMB_R82 RES_K(100)
+#define M79AMB_R83 RES_K(3.3)
+#define M79AMB_R84 RES_K(50)
+#define M79AMB_R86 470
/* Parts List - Capacitors */
-#define M79AMB_C2 CAP_U(39)
-#define M79AMB_C3 CAP_U(22)
-#define M79AMB_C6 CAP_U(0.1)
-#define M79AMB_C8 CAP_U(39)
-#define M79AMB_C9 CAP_U(22)
-#define M79AMB_C12 CAP_U(0.1)
-#define M79AMB_C14 CAP_U(4.7)
-#define M79AMB_C15 CAP_U(3.3)
-#define M79AMB_C18 CAP_U(0.1)
-#define M79AMB_C20 CAP_U(2.2)
-#define M79AMB_C21 CAP_U(1)
-#define M79AMB_C22 CAP_U(22)
-#define M79AMB_C23 CAP_U(0.01)
-#define M79AMB_C25 CAP_U(2.2)
-#define M79AMB_C26 CAP_U(22)
-#define M79AMB_C27 CAP_U(0.47)
-#define M79AMB_C28 CAP_U(0.1)
-#define M79AMB_C29 CAP_U(22)
-#define M79AMB_C30 CAP_U(0.03)
-#define M79AMB_C31 CAP_U(0.1)
-#define M79AMB_C32 CAP_U(0.1)
-#define M79AMB_C33 CAP_U(22)
-#define M79AMB_C34 CAP_U(0.03)
-#define M79AMB_C35 CAP_U(0.1)
-#define M79AMB_C36 CAP_U(0.1)
-#define M79AMB_C37 CAP_P(500)
-#define M79AMB_C41 CAP_U(0.1)
-#define M79AMB_C42 CAP_U(15)
+#define M79AMB_C2 CAP_U(39)
+#define M79AMB_C3 CAP_U(22)
+#define M79AMB_C6 CAP_U(0.1)
+#define M79AMB_C8 CAP_U(39)
+#define M79AMB_C9 CAP_U(22)
+#define M79AMB_C12 CAP_U(0.1)
+#define M79AMB_C14 CAP_U(4.7)
+#define M79AMB_C15 CAP_U(3.3)
+#define M79AMB_C18 CAP_U(0.1)
+#define M79AMB_C20 CAP_U(2.2)
+#define M79AMB_C21 CAP_U(1)
+#define M79AMB_C22 CAP_U(22)
+#define M79AMB_C23 CAP_U(0.01)
+#define M79AMB_C25 CAP_U(2.2)
+#define M79AMB_C26 CAP_U(22)
+#define M79AMB_C27 CAP_U(0.47)
+#define M79AMB_C28 CAP_U(0.1)
+#define M79AMB_C29 CAP_U(22)
+#define M79AMB_C30 CAP_U(0.03)
+#define M79AMB_C31 CAP_U(0.1)
+#define M79AMB_C32 CAP_U(0.1)
+#define M79AMB_C33 CAP_U(22)
+#define M79AMB_C34 CAP_U(0.03)
+#define M79AMB_C35 CAP_U(0.1)
+#define M79AMB_C36 CAP_U(0.1)
+#define M79AMB_C37 CAP_P(500)
+#define M79AMB_C41 CAP_U(0.1)
+#define M79AMB_C42 CAP_U(15)
static const discrete_mixer_desc m79amb_final_mix =
@@ -124,20 +124,20 @@ static const discrete_mixer_desc m79amb_final_mix =
M79AMB_R81 + RES_2_PARALLEL(M79AMB_R59, M79AMB_R57 + M79AMB_R58),
M79AMB_R82 + RES_2_PARALLEL(M79AMB_R69, M79AMB_R67 + M79AMB_R68)
},
- {0}, /* no r_nodes */
+ {0}, /* no r_nodes */
{M79AMB_C6, M79AMB_C12, M79AMB_C18, M79AMB_C23, M79AMB_C28, M79AMB_C32, M79AMB_C36},
0,
M79AMB_R83 + M79AMB_R84,
M79AMB_C37,
M79AMB_C42,
0,
- 1 /* gain */
+ 1 /* gain */
};
DISCRETE_SOUND_START( m79amb )
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_PULSE(M79AMB_BOOM_EN, 0)
DISCRETE_INPUT_PULSE(M79AMB_THUD_EN, 0)
DISCRETE_INPUT_PULSE(M79AMB_SHOT_EN, 0)
@@ -150,87 +150,87 @@ DISCRETE_SOUND_START( m79amb )
/* Boom, Thud, Shot sounds need more accurate emulation */
/************************************************
- * Boom
- ************************************************/
+ * Boom
+ ************************************************/
DISCRETE_ONESHOT(NODE_20,
- M79AMB_BOOM_EN, /* TRIG */
- 1, /* AMPL */
+ M79AMB_BOOM_EN, /* TRIG */
+ 1, /* AMPL */
TIME_OF_9602_WITH_DIODE(M79AMB_R2, M79AMB_C2),
DISC_ONESHOT_REDGE | DISC_ONESHOT_RETRIG | DISC_OUT_ACTIVE_HIGH)
DISCRETE_RCDISC2(NODE_21,
- NODE_20, /* Q1 base */
- 0, /* Q1 off, C3 discharges */
- M79AMB_R9 + M79AMB_R10, /* discharges through amp/filter circuit */
- 12, /* Q1 on, C3 charges */
- M79AMB_R6, /* Q2 on */
- M79AMB_C3) /* controls amplitude */
+ NODE_20, /* Q1 base */
+ 0, /* Q1 off, C3 discharges */
+ M79AMB_R9 + M79AMB_R10, /* discharges through amp/filter circuit */
+ 12, /* Q1 on, C3 charges */
+ M79AMB_R6, /* Q2 on */
+ M79AMB_C3) /* controls amplitude */
DISCRETE_NOISE(M79AMB_BOOM_SND,
- 1, /* ENAB */
- 800, /* FREQ - Guess*/
- NODE_21, /* AMP */
- 0) /* BIAS - fake AC is fine*/
+ 1, /* ENAB */
+ 800, /* FREQ - Guess*/
+ NODE_21, /* AMP */
+ 0) /* BIAS - fake AC is fine*/
/************************************************
- * Thud
- ************************************************/
+ * Thud
+ ************************************************/
DISCRETE_ONESHOT(NODE_30,
- M79AMB_THUD_EN, /* TRIG */
- 1, /* AMPL */
+ M79AMB_THUD_EN, /* TRIG */
+ 1, /* AMPL */
TIME_OF_9602_WITH_DIODE(M79AMB_R12, M79AMB_C8),
DISC_ONESHOT_REDGE | DISC_ONESHOT_RETRIG | DISC_OUT_ACTIVE_HIGH)
DISCRETE_RCDISC2(NODE_31,
- NODE_30, /* Q4 base */
- 0, /* Q4 off, C9 discharges */
- M79AMB_R19 + M79AMB_R20, /* discharges through amp/filter circuit */
- 12, /* Q4 on, C9 charges */
- M79AMB_R16, /* Q5 on */
- M79AMB_C9) /* controls amplitude */
+ NODE_30, /* Q4 base */
+ 0, /* Q4 off, C9 discharges */
+ M79AMB_R19 + M79AMB_R20, /* discharges through amp/filter circuit */
+ 12, /* Q4 on, C9 charges */
+ M79AMB_R16, /* Q5 on */
+ M79AMB_C9) /* controls amplitude */
DISCRETE_NOISE(M79AMB_THUD_SND,
- 1, /* ENAB */
- 500, /* FREQ - Guess*/
- NODE_31, /* AMP */
- 0) /* BIAS - fake AC is fine*/
+ 1, /* ENAB */
+ 500, /* FREQ - Guess*/
+ NODE_31, /* AMP */
+ 0) /* BIAS - fake AC is fine*/
/************************************************
- * Shot
- ************************************************/
+ * Shot
+ ************************************************/
DISCRETE_ONESHOT(NODE_40,
- M79AMB_SHOT_EN, /* TRIG */
- 1, /* AMPL */
+ M79AMB_SHOT_EN, /* TRIG */
+ 1, /* AMPL */
TIME_OF_9602_WITH_DIODE(M79AMB_R22, M79AMB_C14),
DISC_ONESHOT_REDGE | DISC_ONESHOT_RETRIG | DISC_OUT_ACTIVE_HIGH)
DISCRETE_RCDISC2(NODE_41,
- NODE_40, /* Q7 base */
- 0, /* Q7 off, C15 discharges */
- M79AMB_R29 + M79AMB_R30, /* discharges through amp/filter circuit */
- 12, /* Q7 on, C15 charges */
- M79AMB_R26, /* Q8 on */
- M79AMB_C15) /* controls amplitude */
+ NODE_40, /* Q7 base */
+ 0, /* Q7 off, C15 discharges */
+ M79AMB_R29 + M79AMB_R30, /* discharges through amp/filter circuit */
+ 12, /* Q7 on, C15 charges */
+ M79AMB_R26, /* Q8 on */
+ M79AMB_C15) /* controls amplitude */
DISCRETE_NOISE(M79AMB_SHOT_SND,
- 1, /* ENAB */
- 1000, /* FREQ - Guess*/
- NODE_41, /* AMP */
- 0) /* BIAS - fake AC is fine*/
+ 1, /* ENAB */
+ 1000, /* FREQ - Guess*/
+ NODE_41, /* AMP */
+ 0) /* BIAS - fake AC is fine*/
/************************************************
- * MC
- ************************************************/
+ * MC
+ ************************************************/
/* not the best implementation of the pin 5 charge circuit, but it is within tolerance */
DISCRETE_RCDISC2(NODE_50,
M79AMB_MC_REV_EN,
/* R35 can be ignored on discharge */
- RES_VOLTAGE_DIVIDER(M79AMB_R36 + M79AMB_R37, M79AMB_R38) * 12, /* Q12 on */
- RES_2_PARALLEL(M79AMB_R36 + M79AMB_R37, M79AMB_R38), /* Q12 on */
- 12.0 * RES_VOLTAGE_DIVIDER(M79AMB_R36, M79AMB_R35), /* Q12 off */
- RES_2_PARALLEL(M79AMB_R36, M79AMB_R35) + M79AMB_R37, /* Q12 off */
+ RES_VOLTAGE_DIVIDER(M79AMB_R36 + M79AMB_R37, M79AMB_R38) * 12, /* Q12 on */
+ RES_2_PARALLEL(M79AMB_R36 + M79AMB_R37, M79AMB_R38), /* Q12 on */
+ 12.0 * RES_VOLTAGE_DIVIDER(M79AMB_R36, M79AMB_R35), /* Q12 off */
+ RES_2_PARALLEL(M79AMB_R36, M79AMB_R35) + M79AMB_R37, /* Q12 off */
M79AMB_C20)
/* cap charge to B+ ratio changes voltage on pin 5 */
/* (iR36 + iR35 + iR37) * R36||R35||R37 where iR35 = 0/R35 = 0 */
DISCRETE_TRANSFORM4(NODE_51, 12.0 / M79AMB_R36, NODE_50, M79AMB_R37, RES_3_PARALLEL(M79AMB_R36, M79AMB_R35, M79AMB_R37), "012/+3*")
- DISCRETE_566(NODE_52, /* IC U3, pin 4 */
- NODE_51, /* IC U3, pin 5 */
+ DISCRETE_566(NODE_52, /* IC U3, pin 4 */
+ NODE_51, /* IC U3, pin 5 */
M79AMB_R39, M79AMB_C21,
- 12, 0, 12, /* VPOS,VNEG,VCHARGE */
+ 12, 0, 12, /* VPOS,VNEG,VCHARGE */
DISC_566_OUT_DC | DISC_566_OUT_TRIANGLE)
DISCRETE_CRFILTER(NODE_53,
NODE_52, M79AMB_R41 + M79AMB_R42 + M79AMB_R43, M79AMB_C22)
@@ -238,15 +238,15 @@ DISCRETE_SOUND_START( m79amb )
DISCRETE_GAIN(M79AMB_MC_SND, NODE_54, RES_VOLTAGE_DIVIDER(M79AMB_R41 + M79AMB_R42, 2200))//M79AMB_R43))
/************************************************
- * Tank, Truck, Jeep
- ************************************************/
- DISCRETE_566(NODE_60, /* IC U4, pin 4 */
- 12.0 * RES_VOLTAGE_DIVIDER(M79AMB_R44, M79AMB_R45), /* IC U5, pin 5 */
+ * Tank, Truck, Jeep
+ ************************************************/
+ DISCRETE_566(NODE_60, /* IC U4, pin 4 */
+ 12.0 * RES_VOLTAGE_DIVIDER(M79AMB_R44, M79AMB_R45), /* IC U5, pin 5 */
M79AMB_R46, M79AMB_C25,
- 12, 0, 12, /* VPOS,VNEG,VCHARGE */
+ 12, 0, 12, /* VPOS,VNEG,VCHARGE */
DISC_566_OUT_DC | DISC_566_OUT_TRIANGLE)
DISCRETE_ONOFF(NODE_61,
- M79AMB_TANK_TRUCK_JEEP_EN, /* Q16, Q17 */
+ M79AMB_TANK_TRUCK_JEEP_EN, /* Q16, Q17 */
NODE_60)
DISCRETE_CRFILTER(NODE_62,
NODE_61, M79AMB_R48 + M79AMB_R49, M79AMB_C26)
@@ -255,20 +255,20 @@ DISCRETE_SOUND_START( m79amb )
NODE_63, RES_2_PARALLEL(M79AMB_R48, M79AMB_R49), M79AMB_C27)
/************************************************
- * Whisle A
- ************************************************/
+ * Whisle A
+ ************************************************/
DISCRETE_RCDISC2(NODE_70,
M79AMB_WHISTLE_A_EN,
- RES_VOLTAGE_DIVIDER(M79AMB_R51 + M79AMB_R52, M79AMB_R53) * 12, /* Q15 on */
- RES_2_PARALLEL(M79AMB_R53, M79AMB_R51 + M79AMB_R52), /* Q15 on */
- 12, M79AMB_R51 + M79AMB_R52, /* Q15 off */
+ RES_VOLTAGE_DIVIDER(M79AMB_R51 + M79AMB_R52, M79AMB_R53) * 12, /* Q15 on */
+ RES_2_PARALLEL(M79AMB_R53, M79AMB_R51 + M79AMB_R52), /* Q15 on */
+ 12, M79AMB_R51 + M79AMB_R52, /* Q15 off */
M79AMB_C29)
/* cap charge to B+ ratio changes voltage on pin 5 */
DISCRETE_TRANSFORM3(NODE_71, 12, NODE_70, RES_VOLTAGE_DIVIDER(M79AMB_R51, M79AMB_R52), "01-2*1+")
- DISCRETE_566(NODE_72, /* IC U5, pin 4 */
- NODE_71, /* IC U5, pin 5 */
+ DISCRETE_566(NODE_72, /* IC U5, pin 4 */
+ NODE_71, /* IC U5, pin 5 */
M79AMB_R54, M79AMB_C30,
- 12, 0, 12, /* VPOS,VNEG,VCHARGE */
+ 12, 0, 12, /* VPOS,VNEG,VCHARGE */
DISC_566_OUT_DC | DISC_566_OUT_TRIANGLE)
DISCRETE_CRFILTER(NODE_73,
NODE_72, M79AMB_R57 + M79AMB_R58 + M79AMB_R59, M79AMB_C31)
@@ -276,20 +276,20 @@ DISCRETE_SOUND_START( m79amb )
DISCRETE_GAIN(M79AMB_WHISTLE_A_SND, NODE_74, RES_VOLTAGE_DIVIDER(M79AMB_R57 + M79AMB_R58, M79AMB_R59))
/************************************************
- * Whisle B
- ************************************************/
+ * Whisle B
+ ************************************************/
DISCRETE_RCDISC2(NODE_80,
M79AMB_WHISTLE_B_EN,
- RES_VOLTAGE_DIVIDER(M79AMB_R61 + M79AMB_R62, M79AMB_R63) * 12, /* Q18 on */
- RES_2_PARALLEL(M79AMB_R63, M79AMB_R61 + M79AMB_R62), /* Q18 on */
- 12, M79AMB_R61 + M79AMB_R62, /* Q18 off */
+ RES_VOLTAGE_DIVIDER(M79AMB_R61 + M79AMB_R62, M79AMB_R63) * 12, /* Q18 on */
+ RES_2_PARALLEL(M79AMB_R63, M79AMB_R61 + M79AMB_R62), /* Q18 on */
+ 12, M79AMB_R61 + M79AMB_R62, /* Q18 off */
M79AMB_C33)
/* cap charge to B+ ratio changes voltage on pin 5 */
DISCRETE_TRANSFORM3(NODE_81, 12, NODE_80, RES_VOLTAGE_DIVIDER(M79AMB_R61, M79AMB_R62), "01-2*1+")
- DISCRETE_566(NODE_82, /* IC U5, pin 4 */
- NODE_81, /* IC U5, pin 5 */
+ DISCRETE_566(NODE_82, /* IC U5, pin 4 */
+ NODE_81, /* IC U5, pin 5 */
M79AMB_R64, M79AMB_C34,
- 12, 0, 12, /* VPOS,VNEG,VCHARGE */
+ 12, 0, 12, /* VPOS,VNEG,VCHARGE */
DISC_566_OUT_DC | DISC_566_OUT_TRIANGLE)
DISCRETE_CRFILTER(NODE_83,
NODE_82, M79AMB_R67 + M79AMB_R68 + M79AMB_R69, M79AMB_C35)
@@ -297,10 +297,10 @@ DISCRETE_SOUND_START( m79amb )
DISCRETE_GAIN(M79AMB_WHISTLE_B_SND, NODE_84, RES_VOLTAGE_DIVIDER(M79AMB_R67 + M79AMB_R68, M79AMB_R69))
/************************************************
- * Mixer
- ************************************************/
- DISCRETE_MIXER7(NODE_90, /* IC U7, pin 6 */
- 1, /* ENAB */
+ * Mixer
+ ************************************************/
+ DISCRETE_MIXER7(NODE_90, /* IC U7, pin 6 */
+ 1, /* ENAB */
M79AMB_BOOM_SND,
M79AMB_THUD_SND,
M79AMB_SHOT_SND,
diff --git a/src/mame/audio/madalien.c b/src/mame/audio/madalien.c
index 45997f39bff..c64180a17d4 100644
--- a/src/mame/audio/madalien.c
+++ b/src/mame/audio/madalien.c
@@ -10,23 +10,23 @@
/* Discrete Sound Input Nodes */
/* see also "madalien.h" */
-#define MADALIEN_8910_PORTA_1 NODE_03
-#define MADALIEN_8910_PORTA_2 NODE_04
-#define MADALIEN_8910_PORTA_3 NODE_05
-#define MADALIEN_8910_PORTA_4 NODE_06
-#define MADALIEN_8910_PORTA_5 NODE_07
-#define MADALIEN_8910_PORTA_6 NODE_08
-#define MADALIEN_8910_PORTA_8 NODE_09
+#define MADALIEN_8910_PORTA_1 NODE_03
+#define MADALIEN_8910_PORTA_2 NODE_04
+#define MADALIEN_8910_PORTA_3 NODE_05
+#define MADALIEN_8910_PORTA_4 NODE_06
+#define MADALIEN_8910_PORTA_5 NODE_07
+#define MADALIEN_8910_PORTA_6 NODE_08
+#define MADALIEN_8910_PORTA_8 NODE_09
-#define MADALIEN_8910_PORTB_1 NODE_10
-#define MADALIEN_8910_PORTB_23 NODE_11
-#define MADALIEN_8910_PORTB_45 NODE_12
-#define MADALIEN_8910_PORTB_6 NODE_13
-#define MADALIEN_8910_PORTB_7 NODE_14
+#define MADALIEN_8910_PORTB_1 NODE_10
+#define MADALIEN_8910_PORTB_23 NODE_11
+#define MADALIEN_8910_PORTB_45 NODE_12
+#define MADALIEN_8910_PORTB_6 NODE_13
+#define MADALIEN_8910_PORTB_7 NODE_14
-#define MADALIEN_8910_PSG_A NODE_15
-#define MADALIEN_8910_PSG_B NODE_16
-#define MADALIEN_8910_PSG_C NODE_17
+#define MADALIEN_8910_PSG_A NODE_15
+#define MADALIEN_8910_PSG_B NODE_16
+#define MADALIEN_8910_PSG_C NODE_17
static const discrete_op_amp_filt_info madalien_psg_a_filter =
@@ -50,7 +50,7 @@ static const discrete_555_desc madalien_555_1f =
{
// the 555 will clock a 74161, which counts on rising edges
DISC_555_TRIGGER_IS_LOGIC | DISC_555_OUT_DC | DISC_555_OUT_COUNT_R_X,
- 5.0-.5, // B+ voltage of 555 - diode drop
+ 5.0-.5, // B+ voltage of 555 - diode drop
DEFAULT_555_VALUES
};
@@ -58,14 +58,14 @@ static const discrete_555_desc madalien_555_1c =
{
// the 555 will clock a 74161, which counts on rising edges
DISC_555_TRIGGER_IS_LOGIC | DISC_555_OUT_DC | DISC_555_OUT_COUNT_R_X,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_555_desc madalien_555_1l =
{
DISC_555_TRIGGER_IS_LOGIC | DISC_555_OUT_DC | DISC_555_OUT_CAP,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
@@ -121,19 +121,19 @@ static const discrete_mixer_desc madalien_final_mix =
{0}, 0,
RES_K(100),
0, CAP_U(1), 0,
- 32768.0/DEFAULT_TTL_V_LOGIC_1 // final gain
+ 32768.0/DEFAULT_TTL_V_LOGIC_1 // final gain
};
DISCRETE_SOUND_START( madalien )
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_DATA(MADALIEN_8910_PORTA)
DISCRETE_INPUT_DATA(MADALIEN_8910_PORTB)
/************************************************
- * Convert to individual bits
- ************************************************/
+ * Convert to individual bits
+ ************************************************/
// Port A is used to turn filtering on/off.
// 1 - player shot, siren, music
// turn bit into 4066 Ron value of 270 ohms @ 5V
@@ -165,16 +165,16 @@ DISCRETE_SOUND_START( madalien )
DISCRETE_TRANSFORM3(MADALIEN_8910_PORTB_7, MADALIEN_8910_PORTB, 0x40, (DEFAULT_TTL_V_LOGIC_1 - 1) / 0x40, "01&2*")
/************************************************
- * PSG input streams
- ************************************************/
+ * PSG input streams
+ ************************************************/
// AY-3-8910 PSG have a 1Vpp level
DISCRETE_INPUTX_STREAM(MADALIEN_8910_PSG_A, 0, 2.0/32768, .250)
DISCRETE_INPUTX_STREAM(MADALIEN_8910_PSG_B, 1, 2.0/32768, .250)
DISCRETE_INPUTX_STREAM(MADALIEN_8910_PSG_C, 2, 2.0/32768, .250)
/************************************************
- * AY-3-8910 filtering
- ************************************************/
+ * AY-3-8910 filtering
+ ************************************************/
// top op-amp
DISCRETE_ONOFF(NODE_20, MADALIEN_8910_PORTA_2, MADALIEN_8910_PSG_A)
DISCRETE_OP_AMP_FILTER(NODE_21, 1, NODE_20, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &madalien_psg_a_filter)
@@ -196,10 +196,10 @@ DISCRETE_SOUND_START( madalien )
DISCRETE_MIXER3(NODE_48, 1, NODE_21, NODE_33, NODE_41, &madalien_psg_mix)
/************************************************
- * Player motor
- ************************************************/
- DISCRETE_555_ASTABLE(NODE_50, // cap is buffered by op-amp 2D.
- 1, // always enabled
+ * Player motor
+ ************************************************/
+ DISCRETE_555_ASTABLE(NODE_50, // cap is buffered by op-amp 2D.
+ 1, // always enabled
RES_K(4.7),
RES_K(22),
CAP_U(2.2),
@@ -207,51 +207,51 @@ DISCRETE_SOUND_START( madalien )
// The speed frequencies seem strange but the components have been GuruVerified
// There is not much change in selected frequency. 99Hz, 110.6Hz, 124Hz
DISCRETE_COMP_ADDER(NODE_51, MADALIEN_8910_PORTB_45, &madalien_555_1f_r_select)
- DISCRETE_555_ASTABLE_CV(NODE_52, // IC 1F pin 3 out
- MADALIEN_8910_PORTB_45, // enabled by gate O2 pin 13
+ DISCRETE_555_ASTABLE_CV(NODE_52, // IC 1F pin 3 out
+ MADALIEN_8910_PORTB_45, // enabled by gate O2 pin 13
NODE_51,
- RES_K(10), // per actual board
+ RES_K(10), // per actual board
CAP_U(.22),
- NODE_50, // IC 1F pin 5 in
+ NODE_50, // IC 1F pin 5 in
&madalien_555_1f)
// convert reset to active high for module use
DISCRETE_LOGIC_INVERT(NODE_53, MADALIEN_8910_PORTB_45)
DISCRETE_COUNTER(NODE_54, 1,
- NODE_53, // pin 7 in
- NODE_52, // pin 1 in
- 0, 15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
+ NODE_53, // pin 7 in
+ NODE_52, // pin 1 in
+ 0, 15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
DISCRETE_DAC_R1(NODE_55, NODE_54, DEFAULT_TTL_V_LOGIC_1, &madalien_effect1a_dac)
DISCRETE_DAC_R1(NODE_56, NODE_54, DEFAULT_TTL_V_LOGIC_1, &madalien_effect1b_dac)
DISCRETE_RCFILTER(NODE_57, NODE_56, RES_K(22)/2 + RES_K(22), CAP_U(.033))
DISCRETE_COMP_ADDER(NODE_59, MADALIEN_8910_PORTB_23, &madalien_effect_1b_vol_r)
/************************************************
- * Enemy motor
- ************************************************/
+ * Enemy motor
+ ************************************************/
DISCRETE_CRFILTER(NODE_60, MADALIEN_8910_PORTB_7, RES_K(100), CAP_U(4.7))
// 2 diodes clamp it positive.
DISCRETE_CLAMP(NODE_62, NODE_60, 0, 12)
// the 0.047uF cap to ground just removes real world spikes.
// it does not have to be simulated.
DISCRETE_MIXER2(NODE_64, 1, NODE_62, 5, &madalien_555_1c_cv)
- DISCRETE_555_ASTABLE_CV(NODE_65, // IC 1C pin 3 out
+ DISCRETE_555_ASTABLE_CV(NODE_65, // IC 1C pin 3 out
MADALIEN_8910_PORTB_6,
RES_K(47),
RES_K(22),
CAP_U(.033),
- NODE_64, // IC 1C pin 5 in
+ NODE_64, // IC 1C pin 5 in
&madalien_555_1c)
// convert reset to active high for module use
DISCRETE_LOGIC_INVERT(NODE_66, MADALIEN_8910_PORTB_6)
DISCRETE_COUNTER(NODE_67, 1,
- NODE_66, // pin 7 in
- NODE_65, // pin 1 in
- 0, 15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
+ NODE_66, // pin 7 in
+ NODE_65, // pin 1 in
+ 0, 15, 1, 0, DISC_CLK_BY_COUNT) // 4-bit binary up counter
DISCRETE_DAC_R1(NODE_68, NODE_67, DEFAULT_TTL_V_LOGIC_1, &madalien_effect2_dac)
/************************************************
- * Mixer
- ************************************************/
+ * Mixer
+ ************************************************/
DISCRETE_MIXER7(NODE_90, 1, MADALIEN_8910_PSG_A, NODE_48, MADALIEN_8910_PSG_B, MADALIEN_8910_PSG_C, NODE_56, NODE_57, NODE_68, &madalien_final_mix)
DISCRETE_OUTPUT(NODE_90, 1.1)
diff --git a/src/mame/audio/mario.c b/src/mame/audio/mario.c
index ba4499224d0..b8daf3c973e 100644
--- a/src/mame/audio/mario.c
+++ b/src/mame/audio/mario.c
@@ -15,9 +15,9 @@
/* FIXME: Capacitor aging - only in for calibration now */
/* Adjustments are needed to bring this close to recordings */
-#define RUN_VCO_VOLTAGE (0.0) /* 5 in schematics */
+#define RUN_VCO_VOLTAGE (0.0) /* 5 in schematics */
-#define USE_8039 (0) /* set to 1 to try 8039 hack */
+#define USE_8039 (0) /* set to 1 to try 8039 hack */
#define ACTIVELOW_PORT_BIT(P,A,D) ((P & (~(1 << A))) | ((D ^ 1) << A))
#define ACTIVEHIGH_PORT_BIT(P,A,D) ((P & (~(1 << A))) | (D << A))
@@ -46,31 +46,31 @@
/* Discrete sound inputs */
-#define DS_SOUND0_INV NODE_01
-#define DS_SOUND1_INV NODE_02
-#define DS_SOUND7_INV NODE_05
-#define DS_DAC NODE_07
+#define DS_SOUND0_INV NODE_01
+#define DS_SOUND1_INV NODE_02
+#define DS_SOUND7_INV NODE_05
+#define DS_DAC NODE_07
-#define DS_SOUND0 NODE_208
-#define DS_SOUND1 NODE_209
-#define DS_SOUND7 NODE_212
+#define DS_SOUND0 NODE_208
+#define DS_SOUND1 NODE_209
+#define DS_SOUND7 NODE_212
-#define DS_OUT_SOUND0 NODE_241
-#define DS_OUT_SOUND1 NODE_242
-#define DS_OUT_SOUND7 NODE_248
-#define DS_OUT_DAC NODE_250
+#define DS_OUT_SOUND0 NODE_241
+#define DS_OUT_SOUND1 NODE_242
+#define DS_OUT_SOUND7 NODE_248
+#define DS_OUT_DAC NODE_250
/* Input definitions for write handlers */
-#define DS_SOUND0_INP DS_SOUND0_INV
-#define DS_SOUND1_INP DS_SOUND1_INV
-#define DS_SOUND7_INP DS_SOUND7_INV
+#define DS_SOUND0_INP DS_SOUND0_INV
+#define DS_SOUND1_INP DS_SOUND1_INV
+#define DS_SOUND7_INP DS_SOUND7_INV
/* General defines */
-#define VSS 5.0
-#define TTL_HIGH 4.0
-#define GND 0.0
+#define VSS 5.0
+#define TTL_HIGH 4.0
+#define GND 0.0
/****************************************************************
*
@@ -79,41 +79,41 @@
* Parts verified against a real TMA1-04-CPU Board.
****************************************************************/
-#define MR_R6 RES_K(4.7) /* verified */
-#define MR_R7 RES_K(4.7) /* verified */
-#define MR_R17 RES_K(27) /* 20 according to parts list */
+#define MR_R6 RES_K(4.7) /* verified */
+#define MR_R7 RES_K(4.7) /* verified */
+#define MR_R17 RES_K(27) /* 20 according to parts list */
/* 27 verified, 30K in schematics */
-#define MR_R18 RES_K(27) /* 20 according to parts list */
+#define MR_R18 RES_K(27) /* 20 according to parts list */
/* 27 verified, 30K in schematics */
-#define MR_R19 RES_K(22) /* verified */
-#define MR_R20 RES_K(22) /* verified */
-#define MR_R34 RES_M(2) /* */
-#define MR_R35 RES_M(1) /* */
-#define MR_R36 RES_M(1.8) /* */
-#define MR_R40 RES_K(22) /* verified */
-#define MR_R41 RES_K(100) /* verified */
-#define MR_R42 RES_K(43) /* verified */
-#define MR_R43 RES_K(100) /* verified */
-#define MR_R61 RES_K(47) /* verified */
-#define MR_R64 RES_K(20) /* verified */
-#define MR_R65 RES_K(10) /* verified */
-
-#define MR_C3 CAP_U(10) /* verified */
-#define MR_C4 CAP_U(4.7) /* verified */
-#define MR_C5 CAP_N(39) /* verified */
-#define MR_C6 CAP_N(3.9) /* verified */
-#define MR_C14 CAP_U(4.7) /* verified */
-#define MR_C15 CAP_U(4.7) /* verified */
-#define MR_C16 CAP_N(6.8) /* verified */
-#define MR_C17 CAP_N(22) /* verified */
-#define MR_C30 CAP_P(100) /* verified */
-#define MR_C31 CAP_U(0.022) /* verified */
-#define MR_C32 CAP_U(1) /* verified */
-#define MR_C39 CAP_N(4.7) /* verified */
-#define MR_C40 CAP_N(22) /* verified */
-#define MR_C41 CAP_U(4.7) /* verified */
-#define MR_C43 CAP_U(3.3) /* verified */
-#define MR_C44 CAP_U(3.3) /* verified */
+#define MR_R19 RES_K(22) /* verified */
+#define MR_R20 RES_K(22) /* verified */
+#define MR_R34 RES_M(2) /* */
+#define MR_R35 RES_M(1) /* */
+#define MR_R36 RES_M(1.8) /* */
+#define MR_R40 RES_K(22) /* verified */
+#define MR_R41 RES_K(100) /* verified */
+#define MR_R42 RES_K(43) /* verified */
+#define MR_R43 RES_K(100) /* verified */
+#define MR_R61 RES_K(47) /* verified */
+#define MR_R64 RES_K(20) /* verified */
+#define MR_R65 RES_K(10) /* verified */
+
+#define MR_C3 CAP_U(10) /* verified */
+#define MR_C4 CAP_U(4.7) /* verified */
+#define MR_C5 CAP_N(39) /* verified */
+#define MR_C6 CAP_N(3.9) /* verified */
+#define MR_C14 CAP_U(4.7) /* verified */
+#define MR_C15 CAP_U(4.7) /* verified */
+#define MR_C16 CAP_N(6.8) /* verified */
+#define MR_C17 CAP_N(22) /* verified */
+#define MR_C30 CAP_P(100) /* verified */
+#define MR_C31 CAP_U(0.022) /* verified */
+#define MR_C32 CAP_U(1) /* verified */
+#define MR_C39 CAP_N(4.7) /* verified */
+#define MR_C40 CAP_N(22) /* verified */
+#define MR_C41 CAP_U(4.7) /* verified */
+#define MR_C43 CAP_U(3.3) /* verified */
+#define MR_C44 CAP_U(3.3) /* verified */
#define MR_MIXER_RPAR RES_4_PARALLEL(MR_R20, MR_R19, MR_R41, MR_R40)
@@ -129,36 +129,36 @@
static const discrete_op_amp_info mario_dac_amp =
{
DISC_OP_AMP_IS_NORTON,
- MR_R34, MR_R36, 0, MR_R35, 0, /* r1, r2, r3, r4, c */
- 0, 5 /* vN, vP */
+ MR_R34, MR_R36, 0, MR_R35, 0, /* r1, r2, r3, r4, c */
+ 0, 5 /* vN, vP */
};
static const discrete_mixer_desc mario_mixer =
{
DISC_MIXER_IS_RESISTOR,
{MR_R20, MR_R19, MR_R41, MR_R40},
- {0}, {0}, 0, 0, MR_C31, MR_C32, 0, 1 /* r_node{}, c{}, rI, rF, cF, cAmp, vRef, gain*/
+ {0}, {0}, 0, 0, MR_C31, MR_C32, 0, 1 /* r_node{}, c{}, rI, rF, cF, cAmp, vRef, gain*/
};
-#define LS629_FREQ_R_IN RES_K(90)
+#define LS629_FREQ_R_IN RES_K(90)
static DISCRETE_SOUND_START(mario)
/************************************************
- * Input register mapping for mario
- ************************************************/
+ * Input register mapping for mario
+ ************************************************/
/* DISCRETE_INPUT_DATA */
- DISCRETE_INPUT_NOT(DS_SOUND7_INV) /* IC 7L, pin 8 */
+ DISCRETE_INPUT_NOT(DS_SOUND7_INV) /* IC 7L, pin 8 */
/************************************************
- * SOUND0
- ************************************************/
+ * SOUND0
+ ************************************************/
- DISCRETE_TASK_START(1)
- DISCRETE_INPUT_PULSE(DS_SOUND0_INV, 1) /* IC 4C, pin 15 */
- DISCRETE_LS123(NODE_10, /* IC 2H, pin 13 */
- DS_SOUND0_INV, /* IC 2H, pin 2 */
+ DISCRETE_TASK_START(1)
+ DISCRETE_INPUT_PULSE(DS_SOUND0_INV, 1) /* IC 4C, pin 15 */
+ DISCRETE_LS123(NODE_10, /* IC 2H, pin 13 */
+ DS_SOUND0_INV, /* IC 2H, pin 2 */
MR_R17, MR_C14)
/* Breadboarded measurements IC 1J, pin 10
@@ -188,39 +188,39 @@ static DISCRETE_SOUND_START(mario)
*/
/* covert logic to measured voltage */
- DISCRETE_XTIME_BUFFER(NODE_11, /* IC 1H, pin 10 */
- NODE_10, /* IC 1H, pin 11 */
- 0.115, 4.0) /* measured Low/High */
+ DISCRETE_XTIME_BUFFER(NODE_11, /* IC 1H, pin 10 */
+ NODE_10, /* IC 1H, pin 11 */
+ 0.115, 4.0) /* measured Low/High */
/* work out cap charge of RC in parallel with 2 74LS629s */
DISCRETE_RCFILTER(NODE_12, NODE_11, RES_3_PARALLEL(MR_R6, LS629_FREQ_R_IN, LS629_FREQ_R_IN), MR_C3 )
/* work out voltage drop of RC in parallel with 2 74LS629s */
DISCRETE_GAIN(NODE_13, NODE_12, RES_VOLTAGE_DIVIDER(MR_R6, RES_2_PARALLEL(LS629_FREQ_R_IN, LS629_FREQ_R_IN)))
- DISCRETE_74LS624(NODE_14, /* IC 1J, pin 10 */
- 1, /* ENAB */
- NODE_13, 5, /* VMOD - IC 1J, pin 1; VRNG */
- MR_C6, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ DISCRETE_74LS624(NODE_14, /* IC 1J, pin 10 */
+ 1, /* ENAB */
+ NODE_13, 5, /* VMOD - IC 1J, pin 1; VRNG */
+ MR_C6, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_74LS624(NODE_15, /* IC 2J, pin 10 */
- 1, /* ENAB */
- NODE_13, 5, /* VMOD - IC 2J, pin 1; VRNG */
- MR_C17, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ DISCRETE_74LS624(NODE_15, /* IC 2J, pin 10 */
+ 1, /* ENAB */
+ NODE_13, 5, /* VMOD - IC 2J, pin 1; VRNG */
+ MR_C17, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_XTIME_XOR(NODE_16, /* IC IC 1K, pin 6 */
- NODE_14, NODE_15, /* IC 1K, pin 5; pin 4 */
- 0, 0) /* use x_time logic */
- DISCRETE_XTIME_AND(DS_OUT_SOUND0, /* IC 2K, pin 6 */
- NODE_10, NODE_16, /* IC 2K, pin 5; pin 4 */
- 0.066, 3.8) /* LOW; HIGH (varies due to load 3.7 - 4.4) */
+ DISCRETE_XTIME_XOR(NODE_16, /* IC IC 1K, pin 6 */
+ NODE_14, NODE_15, /* IC 1K, pin 5; pin 4 */
+ 0, 0) /* use x_time logic */
+ DISCRETE_XTIME_AND(DS_OUT_SOUND0, /* IC 2K, pin 6 */
+ NODE_10, NODE_16, /* IC 2K, pin 5; pin 4 */
+ 0.066, 3.8) /* LOW; HIGH (varies due to load 3.7 - 4.4) */
DISCRETE_TASK_END()
/************************************************
- * SOUND1
- ************************************************/
+ * SOUND1
+ ************************************************/
DISCRETE_TASK_START(1)
- DISCRETE_INPUT_PULSE(DS_SOUND1_INV, 1) /* IC 4C, pin 14 */
- DISCRETE_LS123(NODE_20, /* IC 2H, pin 5 */
- DS_SOUND1_INV, /* IC 2H, pin 10 */
+ DISCRETE_INPUT_PULSE(DS_SOUND1_INV, 1) /* IC 4C, pin 14 */
+ DISCRETE_LS123(NODE_20, /* IC 2H, pin 5 */
+ DS_SOUND1_INV, /* IC 2H, pin 10 */
MR_R18, MR_C15)
/* Breadboarded measurements IC 1J, pin 7
@@ -250,51 +250,51 @@ static DISCRETE_SOUND_START(mario)
*/
/* covert logic to measured voltage */
- DISCRETE_XTIME_BUFFER(NODE_21, /* IC 1H, pin 8 */
- NODE_20, /* IC 1H, pin 9 */
- 0.115, 4.0) /* measured Low/High */
+ DISCRETE_XTIME_BUFFER(NODE_21, /* IC 1H, pin 8 */
+ NODE_20, /* IC 1H, pin 9 */
+ 0.115, 4.0) /* measured Low/High */
/* work out cap charge of RC in parallel with 2 74LS629s */
DISCRETE_RCFILTER(NODE_22, NODE_21, RES_3_PARALLEL(MR_R7, LS629_FREQ_R_IN, LS629_FREQ_R_IN), MR_C4 )
/* work out voltage drop of RC in parallel with 2 74LS629s */
DISCRETE_GAIN(NODE_23, NODE_22, RES_VOLTAGE_DIVIDER(MR_R7, RES_2_PARALLEL(LS629_FREQ_R_IN, LS629_FREQ_R_IN)))
- DISCRETE_74LS624(NODE_24, /* IC 1J, pin 7 */
- 1, /* ENAB */
- NODE_23, 5, /* VMOD, VRNG */
- MR_C5, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ DISCRETE_74LS624(NODE_24, /* IC 1J, pin 7 */
+ 1, /* ENAB */
+ NODE_23, 5, /* VMOD, VRNG */
+ MR_C5, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_74LS624(NODE_25, /* IC 2J, pin 7 */
- 1, /* ENAB */
- NODE_23, 5, /* VMOD, VRNG */
- MR_C16, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ DISCRETE_74LS624(NODE_25, /* IC 2J, pin 7 */
+ 1, /* ENAB */
+ NODE_23, 5, /* VMOD, VRNG */
+ MR_C16, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_XTIME_XOR(NODE_26, /* IC IC 1K, pin 3 */
- NODE_24, NODE_25, /* IC 1K, pin 1; pin 2 */
- 0, 0) /* use x_time logic */
- DISCRETE_XTIME_AND(DS_OUT_SOUND1, /* IC 2K, pin 3 */
- NODE_20, NODE_26, /* IC 2K, pin 2; pin 1 */
- 0.066, 3.8) /* LOW; HIGH (varies due to load 3.7 - 4.4) */
+ DISCRETE_XTIME_XOR(NODE_26, /* IC IC 1K, pin 3 */
+ NODE_24, NODE_25, /* IC 1K, pin 1; pin 2 */
+ 0, 0) /* use x_time logic */
+ DISCRETE_XTIME_AND(DS_OUT_SOUND1, /* IC 2K, pin 3 */
+ NODE_20, NODE_26, /* IC 2K, pin 2; pin 1 */
+ 0.066, 3.8) /* LOW; HIGH (varies due to load 3.7 - 4.4) */
DISCRETE_TASK_END()
/************************************************
- * SOUND7
- ************************************************/
+ * SOUND7
+ ************************************************/
DISCRETE_TASK_START(1)
- DISCRETE_COUNTER(NODE_100, /* IC 3H */
- 1, 0, /* ENAB; RESET */
- NODE_118, /* CLK - IC 3H, pin 10 */
+ DISCRETE_COUNTER(NODE_100, /* IC 3H */
+ 1, 0, /* ENAB; RESET */
+ NODE_118, /* CLK - IC 3H, pin 10 */
0, 0x3FFF, DISC_COUNT_UP, 0, DISC_CLK_BY_COUNT | DISC_OUT_HAS_XTIME)
- DISCRETE_BIT_DECODE(NODE_102, /* IC 3H, pin 7 */
- NODE_100, 3, 0) /* output x_time logic */
- DISCRETE_BIT_DECODE(NODE_104, /* IC 3H, pin 1 */
- NODE_100, 11, 0) /* output x_time logic */
+ DISCRETE_BIT_DECODE(NODE_102, /* IC 3H, pin 7 */
+ NODE_100, 3, 0) /* output x_time logic */
+ DISCRETE_BIT_DECODE(NODE_104, /* IC 3H, pin 1 */
+ NODE_100, 11, 0) /* output x_time logic */
- DISCRETE_LS123(NODE_110, /* IC 4L, pin 13 */
- DS_SOUND7_INV, /* IC 4L, pin 2 */
+ DISCRETE_LS123(NODE_110, /* IC 4L, pin 13 */
+ DS_SOUND7_INV, /* IC 4L, pin 2 */
MR_R61, MR_C41)
- DISCRETE_XTIME_INVERTER(NODE_111, /* IC 4J, pin 8 */
- NODE_110, /* IC 4J, pin 9 */
- 0.151, 4.14) /* measured Low/High */
+ DISCRETE_XTIME_INVERTER(NODE_111, /* IC 4J, pin 8 */
+ NODE_110, /* IC 4J, pin 9 */
+ 0.151, 4.14) /* measured Low/High */
/* Breadboarded measurements IC 4K, pin 10
D.R. Oct 2010
@@ -310,15 +310,15 @@ static DISCRETE_SOUND_START(mario)
4.14 13980
*/
- DISCRETE_74LS624(NODE_113, /* IC 4K, pin 10 */
- 1, /* ENAB */
- NODE_111, 5, /* VMOD - IC 4K, pin 1; VRNG */
- MR_C40, MR_R65, MR_C44, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ DISCRETE_74LS624(NODE_113, /* IC 4K, pin 10 */
+ 1, /* ENAB */
+ NODE_111, 5, /* VMOD - IC 4K, pin 1; VRNG */
+ MR_C40, MR_R65, MR_C44, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_XTIME_XOR(NODE_115, /* IC 6N, pin 3 */
- NODE_113, NODE_102, /* IC 6N, pin 1; pin 2 */
- 0, 0) /* use x_time logic */
+ DISCRETE_XTIME_XOR(NODE_115, /* IC 6N, pin 3 */
+ NODE_113, NODE_102, /* IC 6N, pin 1; pin 2 */
+ 0, 0) /* use x_time logic */
/* Breadboarded measurements IC 4K, pin 7
D.R. Oct 2010
@@ -334,57 +334,57 @@ static DISCRETE_SOUND_START(mario)
4.15 59400
*/
- DISCRETE_XTIME_INVERTER(NODE_117, /* IC 4J, pin 4 */
- NODE_104, /* IC 4J, pin 3 */
- 0.135, 4.15) /* measured Low/High */
- DISCRETE_74LS624(NODE_118, /* IC 4K, pin 7 */
- 1, /* ENAB */
- NODE_117, 5, /* VMOD - IC 4K, pin 2; VRNG */
- MR_C39, MR_R64, MR_C43, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
+ DISCRETE_XTIME_INVERTER(NODE_117, /* IC 4J, pin 4 */
+ NODE_104, /* IC 4J, pin 3 */
+ 0.135, 4.15) /* measured Low/High */
+ DISCRETE_74LS624(NODE_118, /* IC 4K, pin 7 */
+ 1, /* ENAB */
+ NODE_117, 5, /* VMOD - IC 4K, pin 2; VRNG */
+ MR_C39, MR_R64, MR_C43, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
DISC_LS624_OUT_LOGIC_X)
- DISCRETE_XTIME_AND(DS_OUT_SOUND7, /* IC 2K, pin 11 */
- NODE_110, NODE_115, /* IC 2K, pin 12; pin 13 */
- 0.066, 4.07) /* LOW; HIGH (varies due to load 4.07 is lowest) */
+ DISCRETE_XTIME_AND(DS_OUT_SOUND7, /* IC 2K, pin 11 */
+ NODE_110, NODE_115, /* IC 2K, pin 12; pin 13 */
+ 0.066, 4.07) /* LOW; HIGH (varies due to load 4.07 is lowest) */
DISCRETE_TASK_END()
/************************************************
- * DAC
- ************************************************/
+ * DAC
+ ************************************************/
/* following the resistor DAC are two opamps. The first is a 1:1 amplifier, the second
- * is a filter circuit. Simulation in LTSPICE shows, that the following is equivalent:
- */
+ * is a filter circuit. Simulation in LTSPICE shows, that the following is equivalent:
+ */
DISCRETE_TASK_START(1)
DISCRETE_INPUT_BUFFER(DS_DAC, 0)
- DISCRETE_MULTIPLY(NODE_170, DS_DAC, TTL_HIGH / 256.0) /* MXR1 */
+ DISCRETE_MULTIPLY(NODE_170, DS_DAC, TTL_HIGH / 256.0) /* MXR1 */
/* this stage reduces the gain of the DAC by 50%, so yes the volume is much lower then the walk sound */
- DISCRETE_OP_AMP(NODE_171, /* IC 3M, pin 5 */
- 1, /* ENAB */
- NODE_170, 5, /* IN0 - IC 3M, pin 6; IN1 - IC 3M, pin 1 */
+ DISCRETE_OP_AMP(NODE_171, /* IC 3M, pin 5 */
+ 1, /* ENAB */
+ NODE_170, 5, /* IN0 - IC 3M, pin 6; IN1 - IC 3M, pin 1 */
&mario_dac_amp)
/* This provides a close simulation of the IC 3M, pin 10 filter circuit */
/* The Measured and SPICEd low freq gain is 1, it then has a high frequency
- * drop close to the following RC filter. */
+ * drop close to the following RC filter. */
DISCRETE_RCFILTER_VREF(DS_OUT_DAC, NODE_171, RES_K(750), CAP_P(180), 2.5)
DISCRETE_TASK_END()
/************************************************
- * MIXER
- ************************************************/
+ * MIXER
+ ************************************************/
DISCRETE_TASK_START(2)
DISCRETE_MIXER4(NODE_297,
- 1, /* ENAB */
+ 1, /* ENAB */
DS_OUT_SOUND0, DS_OUT_SOUND1, DS_OUT_SOUND7, DS_OUT_DAC,
&mario_mixer)
/* approx -0.625V to 0.980V when playing, but turn on sound peaks at 2.38V */
/* we will set the full wav range to 1.19V which will cause clipping on the turn on
- * sound. The real game would do this when the volume is turned up too.
- * Reducing MAME's master volume to 50% will provide full unclipped volume.
- */
+ * sound. The real game would do this when the volume is turned up too.
+ * Reducing MAME's master volume to 50% will provide full unclipped volume.
+ */
DISCRETE_OUTPUT(NODE_297, 32767.0/1.19)
DISCRETE_TASK_END()
@@ -398,7 +398,7 @@ DISCRETE_SOUND_END
static void set_ea(address_space &space, int ea)
{
- mario_state *state = space.machine().driver_data<mario_state>();
+ mario_state *state = space.machine().driver_data<mario_state>();
//printf("ea: %d\n", ea);
//machine.device("audiocpu")->execute().set_input_line(MCS48_INPUT_EA, (ea) ? ASSERT_LINE : CLEAR_LINE);
if (state->m_eabank != NULL)
@@ -413,7 +413,7 @@ static void set_ea(address_space &space, int ea)
static SOUND_START( mario )
{
- mario_state *state = machine.driver_data<mario_state>();
+ mario_state *state = machine.driver_data<mario_state>();
device_t *audiocpu = machine.device("audiocpu");
#if USE_8039
UINT8 *SND = state->memregion("audiocpu")->base();
@@ -427,23 +427,23 @@ static SOUND_START( mario )
state->m_eabank = "bank1";
audiocpu->memory().space(AS_PROGRAM).install_read_bank(0x000, 0x7ff, "bank1");
state->membank("bank1")->configure_entry(0, state->memregion("audiocpu")->base());
- state->membank("bank1")->configure_entry(1, state->memregion("audiocpu")->base() + 0x1000);
+ state->membank("bank1")->configure_entry(1, state->memregion("audiocpu")->base() + 0x1000);
}
- state->save_item(NAME(state->m_last));
+ state->save_item(NAME(state->m_last));
state->save_item(NAME(state->m_portT));
}
static SOUND_RESET( mario )
{
- mario_state *state = machine.driver_data<mario_state>();
+ mario_state *state = machine.driver_data<mario_state>();
address_space &space = machine.device("audiocpu")->memory().space(AS_PROGRAM);
#if USE_8039
- set_ea(machine, 1);
+ set_ea(machine, 1);
#endif
- /* FIXME: convert to latch8 */
+ /* FIXME: convert to latch8 */
state->soundlatch_clear_byte_w(space, 0, 0);
state->soundlatch2_clear_byte_w(space, 0, 0);
state->soundlatch3_clear_byte_w(space, 0, 0);
@@ -504,7 +504,7 @@ WRITE8_MEMBER(mario_state::mario_sh_p1_w)
WRITE8_MEMBER(mario_state::mario_sh_p2_w)
{
- mario_state *state = machine().driver_data<mario_state>();
+ mario_state *state = machine().driver_data<mario_state>();
I8035_P2_W(space, data);
}
@@ -652,7 +652,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( masao_audio )
- MCFG_CPU_ADD("audiocpu", Z80, 24576000/16) /* ???? */
+ MCFG_CPU_ADD("audiocpu", Z80, 24576000/16) /* ???? */
MCFG_CPU_PROGRAM_MAP(masao_sound_map)
MCFG_SOUND_START(mario)
@@ -665,4 +665,3 @@ MACHINE_CONFIG_FRAGMENT( masao_audio )
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_CONFIG_END
-
diff --git a/src/mame/audio/meadows.c b/src/mame/audio/meadows.c
index 89f947cd6b9..4a5ed0eaa07 100644
--- a/src/mame/audio/meadows.c
+++ b/src/mame/audio/meadows.c
@@ -14,11 +14,11 @@
-#define BASE_CLOCK 5000000
+#define BASE_CLOCK 5000000
#define BASE_CTR1 (BASE_CLOCK / 256)
-#define BASE_CTR2 (BASE_CLOCK / 32)
+#define BASE_CTR2 (BASE_CLOCK / 32)
-#define DIV2OR4_CTR2 0x01
+#define DIV2OR4_CTR2 0x01
#define ENABLE_CTR2 0x02
#define ENABLE_DAC 0x04
#define ENABLE_CTR1 0x08
@@ -116,5 +116,3 @@ void meadows_sh_dac_w(running_machine &machine, int data)
else
machine.device<dac_device>("dac")->write_unsigned8(0);
}
-
-
diff --git a/src/mame/audio/micro3d.c b/src/mame/audio/micro3d.c
index 87e1007c126..8c5994151c1 100644
--- a/src/mame/audio/micro3d.c
+++ b/src/mame/audio/micro3d.c
@@ -11,7 +11,7 @@
#include "includes/micro3d.h"
-#define MM5837_CLOCK 100000
+#define MM5837_CLOCK 100000
/*************************************
@@ -22,8 +22,8 @@
struct biquad
{
- double a0, a1, a2; /* Numerator coefficients */
- double b0, b1, b2; /* Denominator coefficients */
+ double a0, a1, a2; /* Numerator coefficients */
+ double b0, b1, b2; /* Denominator coefficients */
};
struct lp_filter
@@ -36,8 +36,8 @@ struct lp_filter
struct filter_state
{
- double capval;
- double exponent;
+ double capval;
+ double exponent;
};
struct noise_state
@@ -54,14 +54,14 @@ struct noise_state
UINT8 dac[4];
};
- float gain;
- UINT32 noise_shift;
- UINT8 noise_value;
- UINT8 noise_subcount;
+ float gain;
+ UINT32 noise_shift;
+ UINT8 noise_value;
+ UINT8 noise_subcount;
- filter_state noise_filters[4];
- lp_filter filter;
- sound_stream *stream;
+ filter_state noise_filters[4];
+ lp_filter filter;
+ sound_stream *stream;
};
@@ -133,8 +133,8 @@ static void prewarp(double *a0, double *a1, double *a2,double fc, double fs)
}
static void bilinear(double a0, double a1, double a2,
- double b0, double b1, double b2,
- double *k, double fs, float *coef)
+ double b0, double b1, double b2,
+ double *k, double fs, float *coef)
{
double ad, bd;
@@ -387,9 +387,9 @@ READ8_MEMBER(micro3d_state::micro3d_sound_io_r)
{
switch (offset)
{
- case 0x01: return (m_sound_port_latch[offset] & 0x7f) | ioport("SOUND_SW")->read();
- case 0x03: return (m_sound_port_latch[offset] & 0xf7) | (upd7759_busy_r(machine().device("upd7759")) ? 0x08 : 0);
- default: return 0;
+ case 0x01: return (m_sound_port_latch[offset] & 0x7f) | ioport("SOUND_SW")->read();
+ case 0x03: return (m_sound_port_latch[offset] & 0xf7) | (upd7759_busy_r(machine().device("upd7759")) ? 0x08 : 0);
+ default: return 0;
}
}
@@ -406,7 +406,7 @@ const device_type MICRO3D = &device_creator<micro3d_sound_device>;
micro3d_sound_device::micro3d_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MICRO3D, "Microprose Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(noise_state);
}
@@ -448,5 +448,3 @@ void micro3d_sound_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/midway.c b/src/mame/audio/midway.c
index cf3339c0ab9..9fefc9d39a0 100644
--- a/src/mame/audio/midway.c
+++ b/src/mame/audio/midway.c
@@ -48,11 +48,11 @@
// CONSTANTS
//**************************************************************************
-#define SSIO_CLOCK XTAL_16MHz
-#define CSDELUXE_CLOCK XTAL_16MHz
-#define SOUNDSGOOD_CLOCK XTAL_16MHz
-#define TURBOCS_CLOCK XTAL_8MHz
-#define SQUAWKTALK_CLOCK XTAL_3_579545MHz
+#define SSIO_CLOCK XTAL_16MHz
+#define CSDELUXE_CLOCK XTAL_16MHz
+#define SOUNDSGOOD_CLOCK XTAL_16MHz
+#define TURBOCS_CLOCK XTAL_8MHz
+#define SQUAWKTALK_CLOCK XTAL_3_579545MHz
@@ -78,13 +78,13 @@ extern const device_type MIDWAY_SQUAWK_N_TALK = &device_creator<midway_squawk_n_
midway_ssio_device::midway_ssio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MIDWAY_SSIO, "Midway SSIO Sound Board", "midssio", tag, owner, clock),
- device_mixer_interface(mconfig, *this, 2),
- m_cpu(*this, "cpu"),
- m_ay0(*this, "ay0"),
- m_ay1(*this, "ay1"),
- m_status(0),
- m_14024_count(0),
- m_mute(0)
+ device_mixer_interface(mconfig, *this, 2),
+ m_cpu(*this, "cpu"),
+ m_ay0(*this, "ay0"),
+ m_ay1(*this, "ay1"),
+ m_status(0),
+ m_14024_count(0),
+ m_mute(0)
{
memset(m_data, 0, sizeof(m_data));
memset(m_overall, 0, sizeof(m_overall));
@@ -147,7 +147,7 @@ READ8_MEMBER(midway_ssio_device::ioport_read)
UINT8 result = ioport(port[offset])->read_safe(0xff);
if (!m_custom_input[offset].isnull())
result = (result & ~m_custom_input_mask[offset]) |
- (m_custom_input[offset](space, offset, 0xff) & m_custom_input_mask[offset]);
+ (m_custom_input[offset](space, offset, 0xff) & m_custom_input_mask[offset]);
return result;
}
@@ -264,17 +264,17 @@ void midway_ssio_device::compute_ay8910_modulation()
INTERRUPT_GEN_MEMBER(midway_ssio_device::clock_14024)
{
//
- // /SINT is generated as follows:
- //
- // Starts with a 16MHz oscillator
- // /2 via 7474 flip-flop @ F11
- // /16 via 74161 binary counter @ E11
- // /10 via 74190 decade counter @ D11
- //
- // Bit 3 of the decade counter clocks a 14024 7-bit async counter @ C12.
- // This routine is called to clock this 7-bit counter.
- // Bit 6 of the output is inverted and connected to /SINT.
- //
+ // /SINT is generated as follows:
+ //
+ // Starts with a 16MHz oscillator
+ // /2 via 7474 flip-flop @ F11
+ // /16 via 74161 binary counter @ E11
+ // /10 via 74190 decade counter @ D11
+ //
+ // Bit 3 of the decade counter clocks a 14024 7-bit async counter @ C12.
+ // This routine is called to clock this 7-bit counter.
+ // Bit 6 of the output is inverted and connected to /SINT.
+ //
m_14024_count = (m_14024_count + 1) & 0x7f;
// if the low 5 bits clocked to 0, bit 6 has changed state
@@ -423,9 +423,9 @@ static ADDRESS_MAP_START( ssio_map, AS_PROGRAM, 8, midway_ssio_device )
AM_RANGE(0xb001, 0xb001) AM_MIRROR(0x0ffc) AM_DEVREAD_LEGACY("ay1", ay8910_r)
AM_RANGE(0xb002, 0xb002) AM_MIRROR(0x0ffc) AM_DEVWRITE_LEGACY("ay1", ay8910_data_w)
AM_RANGE(0xc000, 0xcfff) AM_READNOP AM_WRITE(status_w)
- AM_RANGE(0xd000, 0xdfff) AM_WRITENOP // low bit controls yellow LED
+ AM_RANGE(0xd000, 0xdfff) AM_WRITENOP // low bit controls yellow LED
AM_RANGE(0xe000, 0xefff) AM_READ(irq_clear)
- AM_RANGE(0xf000, 0xffff) AM_READ_PORT("DIP") // 6 DIP switches
+ AM_RANGE(0xf000, 0xffff) AM_READ_PORT("DIP") // 6 DIP switches
ADDRESS_MAP_END
@@ -454,7 +454,7 @@ MACHINE_CONFIG_END
ROM_START( midway_ssio )
ROM_REGION( 0x0020, "proms", 0 )
- ROM_LOAD( "82s123.12d", 0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) ) /* from shollow, assuming it's the same */
+ ROM_LOAD( "82s123.12d", 0x0000, 0x0020, CRC(e1281ee9) SHA1(9ac9b01d24affc0ee9227a4364c4fd8f8290343a) ) /* from shollow, assuming it's the same */
ROM_END
@@ -542,12 +542,12 @@ void midway_ssio_device::device_timer(emu_timer &timer, device_timer_id id, int
midway_chip_squeak_deluxe_device::midway_chip_squeak_deluxe_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MIDWAY_CHIP_SQUEAK_DELUXE, "Midway Chip Squeak Deluxe Sound Board", "midcsd", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_cpu(*this, "cpu"),
- m_pia(*this, "pia"),
- m_dac(*this, "dac"),
- m_status(0),
- m_dacval(0)
+ device_mixer_interface(mconfig, *this),
+ m_cpu(*this, "cpu"),
+ m_pia(*this, "pia"),
+ m_dac(*this, "dac"),
+ m_status(0),
+ m_dacval(0)
{
}
@@ -670,18 +670,18 @@ ADDRESS_MAP_END
static const pia6821_interface csdeluxe_pia_intf =
{
- DEVCB_NULL, // port A in
- DEVCB_NULL, // port B in
- DEVCB_NULL, // line CA1 in
- DEVCB_NULL, // line CB1 in
- DEVCB_NULL, // line CA2 in
- DEVCB_NULL, // line CB2 in
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, porta_w), // port A out
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, portb_w), // port B out
- DEVCB_NULL, // line CA2 out
- DEVCB_NULL, // port CB2 out
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, irq_w), // IRQA
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, irq_w) // IRQB
+ DEVCB_NULL, // port A in
+ DEVCB_NULL, // port B in
+ DEVCB_NULL, // line CA1 in
+ DEVCB_NULL, // line CB1 in
+ DEVCB_NULL, // line CA2 in
+ DEVCB_NULL, // line CB2 in
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, porta_w), // port A out
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, portb_w), // port B out
+ DEVCB_NULL, // line CA2 out
+ DEVCB_NULL, // port CB2 out
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, irq_w), // IRQA
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_chip_squeak_deluxe_device, irq_w) // IRQB
};
@@ -757,12 +757,12 @@ void midway_chip_squeak_deluxe_device::device_timer(emu_timer &timer, device_tim
midway_sounds_good_device::midway_sounds_good_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MIDWAY_SOUNDS_GOOD, "Midway Sounds Good Sound Board", "midsg", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_cpu(*this, "cpu"),
- m_pia(*this, "pia"),
- m_dac(*this, "dac"),
- m_status(0),
- m_dacval(0)
+ device_mixer_interface(mconfig, *this),
+ m_cpu(*this, "cpu"),
+ m_pia(*this, "pia"),
+ m_dac(*this, "dac"),
+ m_status(0),
+ m_dacval(0)
{
}
@@ -857,18 +857,18 @@ ADDRESS_MAP_END
static const pia6821_interface soundsgood_pia_intf =
{
- DEVCB_NULL, // port A in
- DEVCB_NULL, // port B in
- DEVCB_NULL, // line CA1 in
- DEVCB_NULL, // line CB1 in
- DEVCB_NULL, // line CA2 in
- DEVCB_NULL, // line CB2 in
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, porta_w), // port A out
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, portb_w), // port B out
- DEVCB_NULL, // line CA2 out
- DEVCB_NULL, // port CB2 out
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, irq_w), // IRQA
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, irq_w) // IRQB
+ DEVCB_NULL, // port A in
+ DEVCB_NULL, // port B in
+ DEVCB_NULL, // line CA1 in
+ DEVCB_NULL, // line CB1 in
+ DEVCB_NULL, // line CA2 in
+ DEVCB_NULL, // line CB2 in
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, porta_w), // port A out
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, portb_w), // port B out
+ DEVCB_NULL, // line CA2 out
+ DEVCB_NULL, // port CB2 out
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, irq_w), // IRQA
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_sounds_good_device, irq_w) // IRQB
};
@@ -944,12 +944,12 @@ void midway_sounds_good_device::device_timer(emu_timer &timer, device_timer_id i
midway_turbo_chip_squeak_device::midway_turbo_chip_squeak_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MIDWAY_TURBO_CHIP_SQUEAK, "Midway Turbo Chip Squeak Sound Board", "midtcs", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_cpu(*this, "cpu"),
- m_pia(*this, "pia"),
- m_dac(*this, "dac"),
- m_status(0),
- m_dacval(0)
+ device_mixer_interface(mconfig, *this),
+ m_cpu(*this, "cpu"),
+ m_pia(*this, "pia"),
+ m_dac(*this, "dac"),
+ m_status(0),
+ m_dacval(0)
{
}
@@ -1038,18 +1038,18 @@ ADDRESS_MAP_END
static const pia6821_interface turbocs_pia_intf =
{
- DEVCB_NULL, // port A in
- DEVCB_NULL, // port B in
- DEVCB_NULL, // line CA1 in
- DEVCB_NULL, // line CB1 in
- DEVCB_NULL, // line CA2 in
- DEVCB_NULL, // line CB2 in
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, porta_w), // port A out
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, portb_w), // port B out
- DEVCB_NULL, // line CA2 out
- DEVCB_NULL, // port CB2 out
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, irq_w), // IRQA
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, irq_w) // IRQB
+ DEVCB_NULL, // port A in
+ DEVCB_NULL, // port B in
+ DEVCB_NULL, // line CA1 in
+ DEVCB_NULL, // line CB1 in
+ DEVCB_NULL, // line CA2 in
+ DEVCB_NULL, // line CB2 in
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, porta_w), // port A out
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, portb_w), // port B out
+ DEVCB_NULL, // line CA2 out
+ DEVCB_NULL, // port CB2 out
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, irq_w), // IRQA
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_turbo_chip_squeak_device, irq_w) // IRQB
};
@@ -1124,13 +1124,13 @@ void midway_turbo_chip_squeak_device::device_timer(emu_timer &timer, device_time
midway_squawk_n_talk_device::midway_squawk_n_talk_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, MIDWAY_SQUAWK_N_TALK, "Midway Squawk 'n' Talk Sound Board", "midsnt", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_cpu(*this, "cpu"),
- m_pia0(*this, "pia0"),
- m_pia1(*this, "pia1"),
- m_tms5200(*this, "tms5200"),
- m_tms_command(0),
- m_tms_strobes(0)
+ device_mixer_interface(mconfig, *this),
+ m_cpu(*this, "cpu"),
+ m_pia0(*this, "pia0"),
+ m_pia1(*this, "pia1"),
+ m_tms5200(*this, "tms5200"),
+ m_tms_command(0),
+ m_tms_strobes(0)
{
}
@@ -1240,7 +1240,7 @@ WRITE_LINE_MEMBER(midway_squawk_n_talk_device::irq_w)
// address map below
static ADDRESS_MAP_START( squawkntalk_map, AS_PROGRAM, 8, midway_squawk_n_talk_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x007f) AM_RAM // internal RAM
+ AM_RANGE(0x0000, 0x007f) AM_RAM // internal RAM
AM_RANGE(0x0080, 0x0083) AM_MIRROR(0x4f6c) AM_DEVREADWRITE("pia0", pia6821_device, read, write)
AM_RANGE(0x0090, 0x0093) AM_MIRROR(0x4f6c) AM_DEVREADWRITE("pia1", pia6821_device, read, write)
AM_RANGE(0x1000, 0x1fff) AM_MIRROR(0x4000) AM_WRITE(dac_w)
@@ -1252,7 +1252,7 @@ ADDRESS_MAP_END
#ifdef UNUSED_FUNCTION
static ADDRESS_MAP_START( squawkntalk_alt_map, AS_PROGRAM, 8, midway_squawk_n_talk_device )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x0000, 0x007f) AM_RAM // internal RAM
+ AM_RANGE(0x0000, 0x007f) AM_RAM // internal RAM
AM_RANGE(0x0080, 0x0083) AM_MIRROR(0x676c) AM_DEVREADWRITE("pia0", pia6821_device, read, write)
AM_RANGE(0x0090, 0x0093) AM_MIRROR(0x676c) AM_DEVREADWRITE("pia1", pia6821_device, read, write)
AM_RANGE(0x0800, 0x0fff) AM_MIRROR(0x6000) AM_WRITE(dac_w)
@@ -1267,34 +1267,34 @@ ADDRESS_MAP_END
static const pia6821_interface squawkntalk_pia0_intf =
{
- DEVCB_NULL, // port A in
- DEVCB_NULL, // port B in
- DEVCB_NULL, // line CA1 in
- DEVCB_NULL, // line CB1 in
- DEVCB_NULL, // line CA2 in
- DEVCB_NULL, // line CB2 in
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, porta1_w), // port A out
- DEVCB_NULL, // port B out
- DEVCB_NULL, // line CA2 out
- DEVCB_NULL, // port CB2 out
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w), // IRQA
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w) // IRQB
+ DEVCB_NULL, // port A in
+ DEVCB_NULL, // port B in
+ DEVCB_NULL, // line CA1 in
+ DEVCB_NULL, // line CB1 in
+ DEVCB_NULL, // line CA2 in
+ DEVCB_NULL, // line CB2 in
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, porta1_w), // port A out
+ DEVCB_NULL, // port B out
+ DEVCB_NULL, // line CA2 out
+ DEVCB_NULL, // port CB2 out
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w), // IRQA
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w) // IRQB
};
static const pia6821_interface squawkntalk_pia1_intf =
{
- DEVCB_NULL, // port A in
- DEVCB_NULL, // port B in
- DEVCB_NULL, // line CA1 in
- DEVCB_NULL, // line CB1 in
- DEVCB_NULL, // line CA2 in
- DEVCB_NULL, // line CB2 in
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, porta2_w), // port A out
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, portb2_w), // port B out
- DEVCB_NULL, // line CA2 out
- DEVCB_NULL, // port CB2 out
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w), // IRQA
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w) // IRQB
+ DEVCB_NULL, // port A in
+ DEVCB_NULL, // port B in
+ DEVCB_NULL, // line CA1 in
+ DEVCB_NULL, // line CB1 in
+ DEVCB_NULL, // line CA2 in
+ DEVCB_NULL, // line CB2 in
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, porta2_w), // port A out
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, portb2_w), // port B out
+ DEVCB_NULL, // line CA2 out
+ DEVCB_NULL, // port CB2 out
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w), // IRQA
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, midway_squawk_n_talk_device, irq_w) // IRQB
};
diff --git a/src/mame/audio/midway.h b/src/mame/audio/midway.h
index 60e10fc0308..7d6e90dcb41 100644
--- a/src/mame/audio/midway.h
+++ b/src/mame/audio/midway.h
@@ -91,7 +91,7 @@ extern const device_type MIDWAY_SQUAWK_N_TALK;
// ======================> midway_ssio_device
-class midway_ssio_device : public device_t,
+class midway_ssio_device : public device_t,
public device_mixer_interface
{
public:
@@ -157,7 +157,7 @@ private:
// ======================> midway_chip_squeak_deluxe_device
-class midway_chip_squeak_deluxe_device : public device_t,
+class midway_chip_squeak_deluxe_device : public device_t,
public device_mixer_interface
{
public:
@@ -197,7 +197,7 @@ private:
// ======================> midway_sounds_good_device
-class midway_sounds_good_device : public device_t,
+class midway_sounds_good_device : public device_t,
public device_mixer_interface
{
public:
@@ -235,7 +235,7 @@ private:
// ======================> midway_turbo_chip_squeak_device
-class midway_turbo_chip_squeak_device : public device_t,
+class midway_turbo_chip_squeak_device : public device_t,
public device_mixer_interface
{
public:
@@ -273,7 +273,7 @@ private:
// ======================> midway_squawk_n_talk_device
-class midway_squawk_n_talk_device : public device_t,
+class midway_squawk_n_talk_device : public device_t,
public device_mixer_interface
{
public:
diff --git a/src/mame/audio/mw8080bw.c b/src/mame/audio/mw8080bw.c
index 7955279bf35..0690e566a1a 100644
--- a/src/mame/audio/mw8080bw.c
+++ b/src/mame/audio/mw8080bw.c
@@ -56,24 +56,24 @@ static SOUND_START( samples )
/* most common values based on clowns schematic */
static const discrete_op_amp_tvca_info midway_music_tvca_info =
{
- RES_M(3.3), /* r502 */
- RES_K(10) + RES_K(680), /* r505 + r506 */
+ RES_M(3.3), /* r502 */
+ RES_K(10) + RES_K(680), /* r505 + r506 */
0,
- RES_K(680), /* r503 */
- RES_K(10), /* r500 */
+ RES_K(680), /* r503 */
+ RES_K(10), /* r500 */
0,
- RES_K(680), /* r501 */
+ RES_K(680), /* r501 */
0,
0,
0,
0,
- CAP_U(.001), /* c500 */
+ CAP_U(.001), /* c500 */
0,
0, 0,
- 12, /* v1 */
- 0, /* v2 */
- 0, /* v3 */
- 12, /* vP */
+ 12, /* v1 */
+ 0, /* v2 */
+ 0, /* v3 */
+ 12, /* vP */
DISC_OP_AMP_TRIGGER_FUNCTION_TRG0,
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_TRG1,
@@ -112,18 +112,18 @@ WRITE8_MEMBER(mw8080bw_state::midway_tone_generator_hi_w)
static const discrete_lfsr_desc midway_lfsr =
{
DISC_CLK_IS_FREQ,
- 17, /* bit length */
+ 17, /* bit length */
/* the RC network fed into pin 4, has the effect
- of presetting all bits high at power up */
- 0x1ffff, /* reset value */
- 4, /* use bit 4 as XOR input 0 */
- 16, /* use bit 16 as XOR input 1 */
- DISC_LFSR_XOR, /* feedback stage1 is XOR */
- DISC_LFSR_OR, /* feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* feedback stage3 replaces the shifted register contents */
- 0x000001, /* everything is shifted into the first bit only */
- 0, /* output is not inverted */
- 12 /* output bit */
+ of presetting all bits high at power up */
+ 0x1ffff, /* reset value */
+ 4, /* use bit 4 as XOR input 0 */
+ 16, /* use bit 16 as XOR input 1 */
+ DISC_LFSR_XOR, /* feedback stage1 is XOR */
+ DISC_LFSR_OR, /* feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* feedback stage3 replaces the shifted register contents */
+ 0x000001, /* everything is shifted into the first bit only */
+ 0, /* output is not inverted */
+ 12 /* output bit */
};
@@ -148,7 +148,7 @@ static const char *const seawolf_sample_names[] =
static const samples_interface seawolf_samples_interface =
{
- 5, /* 5 channels */
+ 5, /* 5 channels */
seawolf_sample_names
};
@@ -207,7 +207,7 @@ static const char *const gunfight_sample_names[] =
static const samples_interface gunfight_samples_interface =
{
- 1, /* 1 channel */
+ 1, /* 1 channel */
gunfight_sample_names
};
@@ -290,26 +290,26 @@ WRITE8_MEMBER(mw8080bw_state::gunfight_audio_w)
static DISCRETE_SOUND_START(tornbase)
/* the 3 enable lines coming out of the 74175 flip-flop at G5 */
- DISCRETE_INPUT_LOGIC(TORNBASE_TONE_240_EN) /* pin 2 */
- DISCRETE_INPUT_LOGIC(TORNBASE_TONE_960_EN) /* pin 7 */
- DISCRETE_INPUT_LOGIC(TORNBASE_TONE_120_EN) /* pin 5 */
+ DISCRETE_INPUT_LOGIC(TORNBASE_TONE_240_EN) /* pin 2 */
+ DISCRETE_INPUT_LOGIC(TORNBASE_TONE_960_EN) /* pin 7 */
+ DISCRETE_INPUT_LOGIC(TORNBASE_TONE_120_EN) /* pin 5 */
/* 3 different freq square waves (240, 960 and 120Hz).
- Originates from the CPU board via an edge connector.
- The wave is in the 0/+1 range */
- DISCRETE_SQUAREWFIX(TORNBASE_SQUAREW_240, 1, 240, 1.0, 50.0, 1.0/2, 0) /* pin X */
- DISCRETE_SQUAREWFIX(TORNBASE_SQUAREW_960, 1, 960, 1.0, 50.0, 1.0/2, 0) /* pin Y */
- DISCRETE_SQUAREWFIX(TORNBASE_SQUAREW_120, 1, 120, 1.0, 50.0, 1.0/2, 0) /* pin V */
+ Originates from the CPU board via an edge connector.
+ The wave is in the 0/+1 range */
+ DISCRETE_SQUAREWFIX(TORNBASE_SQUAREW_240, 1, 240, 1.0, 50.0, 1.0/2, 0) /* pin X */
+ DISCRETE_SQUAREWFIX(TORNBASE_SQUAREW_960, 1, 960, 1.0, 50.0, 1.0/2, 0) /* pin Y */
+ DISCRETE_SQUAREWFIX(TORNBASE_SQUAREW_120, 1, 120, 1.0, 50.0, 1.0/2, 0) /* pin V */
/* 7403 O/C NAND gate at G6. 3 of the 4 gates used with their outputs tied together */
- DISCRETE_LOGIC_NAND(TORNBASE_TONE_240_SND, TORNBASE_SQUAREW_240, TORNBASE_TONE_240_EN) /* pins 4,5,6 */
- DISCRETE_LOGIC_NAND(TORNBASE_TONE_960_SND, TORNBASE_SQUAREW_960, TORNBASE_TONE_960_EN) /* pins 2,1,3 */
- DISCRETE_LOGIC_NAND(TORNBASE_TONE_120_SND, TORNBASE_SQUAREW_120, TORNBASE_TONE_120_EN) /* pins 13,12,11 */
+ DISCRETE_LOGIC_NAND(TORNBASE_TONE_240_SND, TORNBASE_SQUAREW_240, TORNBASE_TONE_240_EN) /* pins 4,5,6 */
+ DISCRETE_LOGIC_NAND(TORNBASE_TONE_960_SND, TORNBASE_SQUAREW_960, TORNBASE_TONE_960_EN) /* pins 2,1,3 */
+ DISCRETE_LOGIC_NAND(TORNBASE_TONE_120_SND, TORNBASE_SQUAREW_120, TORNBASE_TONE_120_EN) /* pins 13,12,11 */
DISCRETE_LOGIC_AND3(TORNBASE_TONE_SND, TORNBASE_TONE_240_SND, TORNBASE_TONE_960_SND, TORNBASE_TONE_120_SND)
/* 47K resistor (R601) and 0.047uF capacitor (C601)
- There is also a 50K pot acting as a volume control, but we output at
- the maximum volume as MAME has its own volume adjustment */
+ There is also a 50K pot acting as a volume control, but we output at
+ the maximum volume as MAME has its own volume adjustment */
DISCRETE_CRFILTER(TORNBASE_TONE_SND_FILT, TORNBASE_TONE_SND, RES_K(47), CAP_U(0.047))
/* amplify for output */
@@ -370,7 +370,7 @@ MACHINE_CONFIG_END
WRITE8_MEMBER(mw8080bw_state::zzzap_audio_1_w)
{
/* set ENGINE SOUND FREQ(data & 0x0f) the value written is
- the gas pedal position */
+ the gas pedal position */
/* if (data & 0x10) enable HI SHIFT engine sound modifier */
@@ -389,8 +389,8 @@ WRITE8_MEMBER(mw8080bw_state::zzzap_audio_2_w)
/* if (data & 0x04) enable CR 1 (screeching sound) */
/* if (data & 0x08) enable NOISE CR 2 (happens only after the car blows up, but
- before it appears again, not sure what
- it is supposed to sound like) */
+ before it appears again, not sure what
+ it is supposed to sound like) */
coin_counter_w(machine(), 0, (data >> 5) & 0x01);
@@ -429,7 +429,7 @@ WRITE8_MEMBER(mw8080bw_state::zzzap_audio_2_w)
static const discrete_555_desc maze_555_F2 =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC | DISC_555_TRIGGER_IS_LOGIC | DISC_555_TRIGGER_DISCHARGES_CAP,
- 5, /* B+ voltage of 555 */
+ 5, /* B+ voltage of 555 */
DEFAULT_555_VALUES
};
@@ -442,123 +442,123 @@ static const double maze_74147_table[] =
static const discrete_comp_adder_table maze_r305_306_308 =
{
- DISC_COMP_P_RESISTOR, /* type of circuit */
- RES_K(100), /* R308 */
- 2, /* length */
- { RES_M(1.5), /* R304 */
- RES_K(820) } /* R304 */
+ DISC_COMP_P_RESISTOR, /* type of circuit */
+ RES_K(100), /* R308 */
+ 2, /* length */
+ { RES_M(1.5), /* R304 */
+ RES_K(820) } /* R304 */
};
static const discrete_comp_adder_table maze_r303_309 =
{
- DISC_COMP_P_RESISTOR, /* type of circuit */
- RES_K(330), /* R309 */
- 1, /* length */
- { RES_M(1) } /* R303 */
+ DISC_COMP_P_RESISTOR, /* type of circuit */
+ RES_K(330), /* R309 */
+ 1, /* length */
+ { RES_M(1) } /* R303 */
};
static const discrete_op_amp_osc_info maze_op_amp_osc =
{
- DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
- RES_M(1), /* R306 */
- RES_K(430), /* R307 */
- MAZE_R305_306_308, /* R304, R305, R308 switchable circuit */
- MAZE_R303_309, /* R303, R309 switchable circuit */
- RES_K(330), /* R310 */
- 0, 0, 0, /* not used */
- CAP_P(3300), /* C300 */
- 5 /* vP */
+ DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
+ RES_M(1), /* R306 */
+ RES_K(430), /* R307 */
+ MAZE_R305_306_308, /* R304, R305, R308 switchable circuit */
+ MAZE_R303_309, /* R303, R309 switchable circuit */
+ RES_K(330), /* R310 */
+ 0, 0, 0, /* not used */
+ CAP_P(3300), /* C300 */
+ 5 /* vP */
};
static DISCRETE_SOUND_START(maze)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_DATA (MAZE_P1_DATA)
DISCRETE_INPUT_DATA (MAZE_P2_DATA)
DISCRETE_INPUT_LOGIC(MAZE_TONE_TIMING)
DISCRETE_INPUT_LOGIC(MAZE_COIN)
- DISCRETE_INPUT_LOGIC(MAZE_JOYSTICK_IN_USE) /* IC D2, pin 8 */
+ DISCRETE_INPUT_LOGIC(MAZE_JOYSTICK_IN_USE) /* IC D2, pin 8 */
/* The following circuits control when audio is heard. */
/* Basically there is sound for 30s after a coin is inserted. */
/* This time is extended whenever a control is pressed. */
/* After the 30s has expired, there is no sound until the next coin is inserted. */
/* There is also sound for the first 30s after power up even without a coin. */
- DISCRETE_LOGIC_INVERT(NODE_20, /* IC E2, pin 8 */
- MAZE_JOYSTICK_IN_USE) /* IN0 */
- DISCRETE_555_MSTABLE(MAZE_GAME_OVER, /* IC F2, pin 3 */
- 1, /* RESET */
- NODE_20, /* TRIG */
- RES_K(270), /* R203 */
- CAP_U(100), /* C204 */
+ DISCRETE_LOGIC_INVERT(NODE_20, /* IC E2, pin 8 */
+ MAZE_JOYSTICK_IN_USE) /* IN0 */
+ DISCRETE_555_MSTABLE(MAZE_GAME_OVER, /* IC F2, pin 3 */
+ 1, /* RESET */
+ NODE_20, /* TRIG */
+ RES_K(270), /* R203 */
+ CAP_U(100), /* C204 */
&maze_555_F2)
DISCRETE_LOGIC_JKFLIPFLOP(MAZE_AUDIO_ENABLE,/* IC F1, pin 5 */
- MAZE_COIN, /* RESET */
- 1, /* SET */
- MAZE_GAME_OVER, /* CLK */
- 1, /* J */
- 0) /* K */
- DISCRETE_LOGIC_INVERT(MAZE_TONE_ENABLE, /* IC F1, pin 6 */
- MAZE_AUDIO_ENABLE) /* IN0 */
+ MAZE_COIN, /* RESET */
+ 1, /* SET */
+ MAZE_GAME_OVER, /* CLK */
+ 1, /* J */
+ 0) /* K */
+ DISCRETE_LOGIC_INVERT(MAZE_TONE_ENABLE, /* IC F1, pin 6 */
+ MAZE_AUDIO_ENABLE) /* IN0 */
DISCRETE_LOGIC_AND3(NODE_21,
- MAZE_JOYSTICK_IN_USE, /* INP0 */
- MAZE_TONE_ENABLE, /* INP1 */
- MAZE_TONE_TIMING) /* INP2 */
+ MAZE_JOYSTICK_IN_USE, /* INP0 */
+ MAZE_TONE_ENABLE, /* INP1 */
+ MAZE_TONE_TIMING) /* INP2 */
/* The following circuits use the control info to generate a tone. */
- DISCRETE_LOGIC_JKFLIPFLOP(MAZE_PLAYER_SEL, /* IC C1, pin 3 */
- 1, /* RESET */
- 1, /* SET */
- MAZE_TONE_TIMING, /* CLK */
- 1, /* J */
- 1) /* K */
- DISCRETE_MULTIPLEX2(NODE_31, /* IC D1 */
- MAZE_PLAYER_SEL, /* ADDR */
- MAZE_P1_DATA, /* INP0 */
- MAZE_P2_DATA) /* INP1 */
- DISCRETE_LOOKUP_TABLE(NODE_32, /* IC E1 */
- NODE_31, /* ADDR */
- 16, /* SIZE */
+ DISCRETE_LOGIC_JKFLIPFLOP(MAZE_PLAYER_SEL, /* IC C1, pin 3 */
+ 1, /* RESET */
+ 1, /* SET */
+ MAZE_TONE_TIMING, /* CLK */
+ 1, /* J */
+ 1) /* K */
+ DISCRETE_MULTIPLEX2(NODE_31, /* IC D1 */
+ MAZE_PLAYER_SEL, /* ADDR */
+ MAZE_P1_DATA, /* INP0 */
+ MAZE_P2_DATA) /* INP1 */
+ DISCRETE_LOOKUP_TABLE(NODE_32, /* IC E1 */
+ NODE_31, /* ADDR */
+ 16, /* SIZE */
&maze_74147_table)
- DISCRETE_COMP_ADDER(MAZE_R305_306_308, /* value of selected parallel circuit R305, R306, R308 */
- NODE_32, /* DATA */
+ DISCRETE_COMP_ADDER(MAZE_R305_306_308, /* value of selected parallel circuit R305, R306, R308 */
+ NODE_32, /* DATA */
&maze_r305_306_308)
- DISCRETE_COMP_ADDER(MAZE_R303_309, /* value of selected parallel circuit R303, R309 */
- MAZE_PLAYER_SEL, /* DATA */
+ DISCRETE_COMP_ADDER(MAZE_R303_309, /* value of selected parallel circuit R303, R309 */
+ MAZE_PLAYER_SEL, /* DATA */
&maze_r303_309)
- DISCRETE_OP_AMP_OSCILLATOR(NODE_36, /* IC J1, pin 4 */
- 1, /* ENAB */
+ DISCRETE_OP_AMP_OSCILLATOR(NODE_36, /* IC J1, pin 4 */
+ 1, /* ENAB */
&maze_op_amp_osc)
/* The following circuits remove DC poping noises when the tone is switched in/out. */
DISCRETE_CRFILTER_VREF(NODE_40,
- NODE_36, /* IN0 */
- RES_K(250), /* R311, R312, R402, R403 in parallel */
- CAP_U(0.1), /* c301 */
- 2.5) /* center voltage of R311, R312 */
- DISCRETE_SWITCH(NODE_41, /* IC H3, pin 10 */
- 1, /* ENAB */
- NODE_21, /* switch */
- 2.5, /* INP0 - center voltage of R402, R403 */
- NODE_40) /* INP1 */
+ NODE_36, /* IN0 */
+ RES_K(250), /* R311, R312, R402, R403 in parallel */
+ CAP_U(0.1), /* c301 */
+ 2.5) /* center voltage of R311, R312 */
+ DISCRETE_SWITCH(NODE_41, /* IC H3, pin 10 */
+ 1, /* ENAB */
+ NODE_21, /* switch */
+ 2.5, /* INP0 - center voltage of R402, R403 */
+ NODE_40) /* INP1 */
DISCRETE_CRFILTER(NODE_42,
- NODE_41, /* IN0 */
- RES_K(56 + 390), /* R404 + R405 */
- CAP_P(0.01) ) /* C401 */
+ NODE_41, /* IN0 */
+ RES_K(56 + 390), /* R404 + R405 */
+ CAP_P(0.01) ) /* C401 */
DISCRETE_RCFILTER(NODE_43,
- NODE_42, /* IN0 */
- RES_K(56), /* R404 */
- CAP_P(4700) ) /* C400 */
- DISCRETE_SWITCH(MAZE_SND, /* H3 saturates op-amp J3 when enabled, disabling audio */
- 1, /* ENAB */
- MAZE_AUDIO_ENABLE, /* SWITCH */
- NODE_43, /* INP0 */
- 0) /* INP1 */
+ NODE_42, /* IN0 */
+ RES_K(56), /* R404 */
+ CAP_P(4700) ) /* C400 */
+ DISCRETE_SWITCH(MAZE_SND, /* H3 saturates op-amp J3 when enabled, disabling audio */
+ 1, /* ENAB */
+ MAZE_AUDIO_ENABLE, /* SWITCH */
+ NODE_43, /* INP0 */
+ 0) /* INP1 */
DISCRETE_OUTPUT(MAZE_SND, 96200)
DISCRETE_SOUND_END
@@ -710,7 +710,7 @@ static const discrete_mixer_desc boothill_l_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(12) + RES_K(68) + RES_K(33),
- RES_K(12) + RES_K(100) + RES_K(33) },
+ RES_K(12) + RES_K(100) + RES_K(33) },
{ 0 },
{ 0 },
0,
@@ -718,7 +718,7 @@ static const discrete_mixer_desc boothill_l_mixer =
0,
CAP_U(0.1),
0,
- 7200 /* final gain */
+ 7200 /* final gain */
};
@@ -726,26 +726,26 @@ static const discrete_mixer_desc boothill_r_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(12) + RES_K(68) + RES_K(33),
- RES_K(12) + RES_K(100) + RES_K(33),
- RES_K(33) },
+ RES_K(12) + RES_K(100) + RES_K(33),
+ RES_K(33) },
{ 0,
- 0,
- BOOTHILL_MUSIC_ADJ },
+ 0,
+ BOOTHILL_MUSIC_ADJ },
{ 0 },
0,
RES_K(100),
0,
CAP_U(0.1),
0,
- 7200 /* final gain */
+ 7200 /* final gain */
};
static DISCRETE_SOUND_START(boothill)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(BOOTHILL_GAME_ON_EN)
DISCRETE_INPUT_LOGIC(BOOTHILL_LEFT_SHOT_EN)
DISCRETE_INPUT_LOGIC(BOOTHILL_RIGHT_SHOT_EN)
@@ -753,18 +753,18 @@ static DISCRETE_SOUND_START(boothill)
DISCRETE_INPUT_LOGIC(BOOTHILL_RIGHT_HIT_EN)
/* The low value of the pot is set to 75000. A real 1M pot will never go to 0 anyways.
- This will give the control more apparent volume range.
- The music way overpowers the rest of the sounds anyways. */
+ This will give the control more apparent volume range.
+ The music way overpowers the rest of the sounds anyways. */
DISCRETE_ADJUSTMENT(BOOTHILL_MUSIC_ADJ, RES_M(1), 75000, DISC_LOGADJ, "MUSIC_ADJ")
/************************************************
- * Tone generator
- ************************************************/
+ * Tone generator
+ ************************************************/
MIDWAY_TONE_GENERATOR(boothill_tone_tvca_info)
/************************************************
- * Shot sounds
- ************************************************/
+ * Shot sounds
+ ************************************************/
/* Noise clock was breadboarded and measured at 7700Hz */
DISCRETE_LFSR_NOISE(BOOTHILL_NOISE, 1, 1, 7700, 12.0, 0, 12.0/2, &midway_lfsr)
@@ -777,8 +777,8 @@ static DISCRETE_SOUND_START(boothill)
DISCRETE_RCFILTER(BOOTHILL_R_SHOT_SND, NODE_36, RES_K(12) + RES_K(68), CAP_U(.0033))
/************************************************
- * Hit sounds
- ************************************************/
+ * Hit sounds
+ ************************************************/
DISCRETE_OP_AMP_TRIG_VCA(NODE_40, BOOTHILL_LEFT_HIT_EN, 0, 0, BOOTHILL_NOISE, 0, &boothill_hit_tvca_info)
DISCRETE_RCFILTER(NODE_41, NODE_40, RES_K(12), CAP_U(.033))
DISCRETE_RCFILTER(BOOTHILL_L_HIT_SND, NODE_41, RES_K(12) + RES_K(100), CAP_U(.0033))
@@ -788,17 +788,17 @@ static DISCRETE_SOUND_START(boothill)
DISCRETE_RCFILTER(BOOTHILL_R_HIT_SND, NODE_46, RES_K(12) + RES_K(100), CAP_U(.0022))
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
/* There is a 1uF cap on the input to the amp that I was too lazy to simulate.
- * It is just a DC blocking cap needed by the Norton amp. Doing the extra
- * work to simulate it is not going to make a difference to the waveform
- * or to how it sounds. Also I use a regular amp in place of the Norton
- * for the same reasons. Ease of coding/simulation. */
+ * It is just a DC blocking cap needed by the Norton amp. Doing the extra
+ * work to simulate it is not going to make a difference to the waveform
+ * or to how it sounds. Also I use a regular amp in place of the Norton
+ * for the same reasons. Ease of coding/simulation. */
/* The schematics show the Hit sounds as shown.
- * This makes the death of the enemy sound on the players side.
- * This should be verified. */
+ * This makes the death of the enemy sound on the players side.
+ * This should be verified. */
DISCRETE_MIXER2(NODE_91, BOOTHILL_GAME_ON_EN, BOOTHILL_L_SHOT_SND, BOOTHILL_L_HIT_SND, &boothill_l_mixer)
@@ -867,89 +867,89 @@ WRITE8_MEMBER(mw8080bw_state::boothill_audio_w)
static const discrete_comp_adder_table checkmat_r401_402_400 =
{
- DISC_COMP_P_RESISTOR, /* type of circuit */
- RES_K(100), /* R401 */
- 2, /* length */
- { RES_M(1.5), /* R402 */
- RES_K(820) } /* R400 */
+ DISC_COMP_P_RESISTOR, /* type of circuit */
+ RES_K(100), /* R401 */
+ 2, /* length */
+ { RES_M(1.5), /* R402 */
+ RES_K(820) } /* R400 */
};
static const discrete_comp_adder_table checkmat_r407_406_410 =
{
- DISC_COMP_P_RESISTOR, /* type of circuit */
- RES_K(330), /* R407 */
- 2, /* length */
- { RES_M(1), /* R406 */
- RES_K(510) } /* R410 */
+ DISC_COMP_P_RESISTOR, /* type of circuit */
+ RES_K(330), /* R407 */
+ 2, /* length */
+ { RES_M(1), /* R406 */
+ RES_K(510) } /* R410 */
};
static const discrete_op_amp_osc_info checkmat_op_amp_osc =
{
- DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
- RES_M(1), /* R403 */
- RES_K(430), /* R405 */
- CHECKMAT_R401_402_400, /* R401, R402, R400 switchable circuit */
- CHECKMAT_R407_406_410, /* R407, R406, R410 switchable circuit */
- RES_K(330), /* R404 */
- 0, 0, 0, /* not used */
- CAP_P(3300), /* C400 */
- 5 /* vP */
+ DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
+ RES_M(1), /* R403 */
+ RES_K(430), /* R405 */
+ CHECKMAT_R401_402_400, /* R401, R402, R400 switchable circuit */
+ CHECKMAT_R407_406_410, /* R407, R406, R410 switchable circuit */
+ RES_K(330), /* R404 */
+ 0, 0, 0, /* not used */
+ CAP_P(3300), /* C400 */
+ 5 /* vP */
};
static const discrete_op_amp_tvca_info checkmat_op_amp_tvca =
{
- RES_M(1.2), /* R302 */
- RES_M(1), /* R305 */
- 0, /* r3 - not used */
- RES_M(1.2), /* R304 */
- RES_K(1), /* M4 */
- 0, /* r6 - not used */
- RES_M(1), /* R303 */
- 0, /* r8 - not used */
- 0, /* r9 - not used */
- 0, /* r10 - not used */
- 0, /* r11 - not used */
- CAP_U(1), /* C300 */
- 0, /* c2 - not used */
- 0, 0, /* c3, c4 - not used */
- 5, /* v1 */
- 0, /* v2 */
- 0, /* v3 */
- 5, /* vP */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f0 - not used */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f1 - not used */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f3 - not used */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f4 - not used */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f5 - not used */
+ RES_M(1.2), /* R302 */
+ RES_M(1), /* R305 */
+ 0, /* r3 - not used */
+ RES_M(1.2), /* R304 */
+ RES_K(1), /* M4 */
+ 0, /* r6 - not used */
+ RES_M(1), /* R303 */
+ 0, /* r8 - not used */
+ 0, /* r9 - not used */
+ 0, /* r10 - not used */
+ 0, /* r11 - not used */
+ CAP_U(1), /* C300 */
+ 0, /* c2 - not used */
+ 0, 0, /* c3, c4 - not used */
+ 5, /* v1 */
+ 0, /* v2 */
+ 0, /* v3 */
+ 5, /* vP */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f0 - not used */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f1 - not used */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f3 - not used */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f4 - not used */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* f5 - not used */
};
static const discrete_mixer_desc checkmat_mixer =
{
- DISC_MIXER_IS_OP_AMP, /* type */
- { RES_K(100), /* R308 - VERIFY - can't read schematic */
- RES_K(56 + 47) }, /* R412 + R408 */
- { CHECKMAT_R309, /* R309 */
- CHECKMAT_R411}, /* R411 */
- { CAP_U(10), /* C305 */
- CAP_U(0.01) }, /* C401 */
- 0, /* rI - not used */
- RES_K(100), /* R507 */
- 0, /* cF - not used */
- CAP_U(1), /* C505 */
- 0, /* vRef - GND */
- 1 /* gain */
+ DISC_MIXER_IS_OP_AMP, /* type */
+ { RES_K(100), /* R308 - VERIFY - can't read schematic */
+ RES_K(56 + 47) }, /* R412 + R408 */
+ { CHECKMAT_R309, /* R309 */
+ CHECKMAT_R411}, /* R411 */
+ { CAP_U(10), /* C305 */
+ CAP_U(0.01) }, /* C401 */
+ 0, /* rI - not used */
+ RES_K(100), /* R507 */
+ 0, /* cF - not used */
+ CAP_U(1), /* C505 */
+ 0, /* vRef - GND */
+ 1 /* gain */
};
static DISCRETE_SOUND_START(checkmat)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(CHECKMAT_BOOM_EN)
DISCRETE_INPUT_LOGIC(CHECKMAT_TONE_EN)
DISCRETE_INPUT_DATA (CHECKMAT_TONE_DATA_45)
@@ -963,79 +963,79 @@ static DISCRETE_SOUND_START(checkmat)
DISCRETE_ADJUSTMENT(CHECKMAT_R411, RES_M(1), 1000, DISC_LOGADJ, "R411")
/************************************************
- * Boom Sound
- *
- * The zener diode noise source is hard to
- * emulate. Guess for now.
- ************************************************/
+ * Boom Sound
+ *
+ * The zener diode noise source is hard to
+ * emulate. Guess for now.
+ ************************************************/
/* FIX - find noise freq and amplitude */
DISCRETE_NOISE(NODE_20,
- 1, /* ENAB */
- 1500, /* FREQ */
- 2, /* AMP */
- 0) /* BIAS */
+ 1, /* ENAB */
+ 1500, /* FREQ */
+ 2, /* AMP */
+ 0) /* BIAS */
DISCRETE_OP_AMP_TRIG_VCA(NODE_21,
- CHECKMAT_BOOM_EN, /* TRG0 */
- 0, /* TRG1 - not used */
- 0, /* TRG2 - not used */
- NODE_20, /* IN0 */
- 0, /* IN1 - not used */
+ CHECKMAT_BOOM_EN, /* TRG0 */
+ 0, /* TRG1 - not used */
+ 0, /* TRG2 - not used */
+ NODE_20, /* IN0 */
+ 0, /* IN1 - not used */
&checkmat_op_amp_tvca)
/* The next 5 modules emulate the filter. */
DISCRETE_FILTER2(NODE_23,
- 1, /* ENAB */
- NODE_21, /* INP0 */
- 35, /* FREQ */
- 1.0 / 8, /* DAMP */
+ 1, /* ENAB */
+ NODE_21, /* INP0 */
+ 35, /* FREQ */
+ 1.0 / 8, /* DAMP */
DISC_FILTER_BANDPASS)
DISCRETE_GAIN(NODE_24,
- NODE_23, /* IN0 */
- 15) /* GAIN */
- DISCRETE_CLAMP(CHECKMAT_BOOM_SND, /* IC Q2/3, pin 10 */
- NODE_24, /* IN0 */
- 0 - 6, /* MIN */
+ NODE_23, /* IN0 */
+ 15) /* GAIN */
+ DISCRETE_CLAMP(CHECKMAT_BOOM_SND, /* IC Q2/3, pin 10 */
+ NODE_24, /* IN0 */
+ 0 - 6, /* MIN */
12.0 - OP_AMP_NORTON_VBE -6)/* MAX */
/************************************************
- * Tone generator
- ************************************************/
- DISCRETE_COMP_ADDER(CHECKMAT_R401_402_400, /* value of selected parallel circuit R401, R402, R400 */
- CHECKMAT_TONE_DATA_45, /* DATA */
+ * Tone generator
+ ************************************************/
+ DISCRETE_COMP_ADDER(CHECKMAT_R401_402_400, /* value of selected parallel circuit R401, R402, R400 */
+ CHECKMAT_TONE_DATA_45, /* DATA */
&checkmat_r401_402_400)
- DISCRETE_COMP_ADDER(CHECKMAT_R407_406_410, /* value of selected parallel circuit R407, R406, R410 */
- CHECKMAT_TONE_DATA_67, /* DATA */
+ DISCRETE_COMP_ADDER(CHECKMAT_R407_406_410, /* value of selected parallel circuit R407, R406, R410 */
+ CHECKMAT_TONE_DATA_67, /* DATA */
&checkmat_r407_406_410)
- DISCRETE_OP_AMP_OSCILLATOR(NODE_30, /* IC N3/4, pin 4 */
- 1, /* ENAB */
+ DISCRETE_OP_AMP_OSCILLATOR(NODE_30, /* IC N3/4, pin 4 */
+ 1, /* ENAB */
&checkmat_op_amp_osc)
/* The following circuits remove DC poping noises when the tone is switched in/out. */
DISCRETE_CRFILTER_VREF(NODE_31,
- NODE_30, /* IN0 */
- RES_K(250), /* R409, R415, R414, R413 in parallel */
- CAP_U(0.1), /* c401 */
- 2.5) /* center voltage of R409, R415 */
- DISCRETE_SWITCH(NODE_32, /* IC R3/4, pin 9 */
- 1, /* ENAB */
- CHECKMAT_TONE_EN, /* switch */
- 2.5, /* INP0 - center voltage of R413, R414 */
- NODE_31) /* INP1 */
+ NODE_30, /* IN0 */
+ RES_K(250), /* R409, R415, R414, R413 in parallel */
+ CAP_U(0.1), /* c401 */
+ 2.5) /* center voltage of R409, R415 */
+ DISCRETE_SWITCH(NODE_32, /* IC R3/4, pin 9 */
+ 1, /* ENAB */
+ CHECKMAT_TONE_EN, /* switch */
+ 2.5, /* INP0 - center voltage of R413, R414 */
+ NODE_31) /* INP1 */
DISCRETE_CRFILTER(NODE_33,
- NODE_32, /* IN0 */
- RES_K(56 + 47 + 200), /* R412 + R408 + part of R411 */
- CAP_P(0.01) ) /* C404 */
+ NODE_32, /* IN0 */
+ RES_K(56 + 47 + 200), /* R412 + R408 + part of R411 */
+ CAP_P(0.01) ) /* C404 */
DISCRETE_RCFILTER(CHECKMAT_TONE_SND,
- NODE_33, /* IN0 */
- RES_K(56), /* R412 */
- CAP_P(4700) ) /* C403 */
+ NODE_33, /* IN0 */
+ RES_K(56), /* R412 */
+ CAP_P(4700) ) /* C403 */
/************************************************
- * Final mix and output
- ************************************************/
+ * Final mix and output
+ ************************************************/
DISCRETE_MIXER2(CHECKMAT_FINAL_SND,
- 1, /* ENAB */
- CHECKMAT_BOOM_SND, /* IN0 */
- CHECKMAT_TONE_SND, /* IN1 */
+ 1, /* ENAB */
+ CHECKMAT_BOOM_SND, /* IN0 */
+ CHECKMAT_TONE_SND, /* IN1 */
&checkmat_mixer)
DISCRETE_OUTPUT(CHECKMAT_FINAL_SND, 300000)
DISCRETE_SOUND_END
@@ -1111,10 +1111,10 @@ static const discrete_op_amp_tvca_info desertgu_rifle_shot_tvca_info =
CAP_U(0.47),
0,
0, 0,
- 12, /* v1 */
- 0, /* v2 */
- 0, /* v3 */
- 12, /* vP */
+ 12, /* v1 */
+ 0, /* v2 */
+ 0, /* v3 */
+ 12, /* vP */
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_TRG0,
@@ -1128,8 +1128,8 @@ static const discrete_mixer_desc desertgu_filter_mixer =
{
DISC_MIXER_IS_RESISTOR,
{ RES_K(2),
- RES_K(27),
- RES_K(2) + RES_K(1) },
+ RES_K(27),
+ RES_K(2) + RES_K(1) },
{ 0 },
{ 0 },
0,
@@ -1161,34 +1161,34 @@ static const discrete_mixer_desc desertgu_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(12) + RES_K(68) + RES_K(30),
- RES_K(56),
- RES_K(180),
- RES_K(47),
- RES_K(30) },
+ RES_K(56),
+ RES_K(180),
+ RES_K(47),
+ RES_K(30) },
{ 0,
- 0,
- 0,
- 0,
- DESERTGU_MUSIC_ADJ },
+ 0,
+ 0,
+ 0,
+ DESERTGU_MUSIC_ADJ },
{ CAP_U(0.1),
- CAP_U(0.1),
- CAP_U(0.1),
- CAP_U(0.1),
- CAP_U(0.1) },
+ CAP_U(0.1),
+ CAP_U(0.1),
+ CAP_U(0.1),
+ CAP_U(0.1) },
0,
RES_K(100),
0,
CAP_U(0.1),
0,
- 6000 /* final gain */
+ 6000 /* final gain */
};
static DISCRETE_SOUND_START(desertgu)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(DESERTGU_GAME_ON_EN)
DISCRETE_INPUT_LOGIC(DESERTGU_RIFLE_SHOT_EN)
DISCRETE_INPUT_LOGIC(DESERTGU_BOTTLE_HIT_EN)
@@ -1203,13 +1203,13 @@ static DISCRETE_SOUND_START(desertgu)
DISCRETE_ADJUSTMENT(DESERTGU_MUSIC_ADJ, RES_M(1), 75000, DISC_LOGADJ, "MUSIC_ADJ")
/************************************************
- * Tone generator
- ************************************************/
+ * Tone generator
+ ************************************************/
MIDWAY_TONE_GENERATOR(midway_music_tvca_info)
/************************************************
- * Rifle shot sound
- ************************************************/
+ * Rifle shot sound
+ ************************************************/
/* Noise clock was breadboarded and measured at 7515Hz */
DISCRETE_LFSR_NOISE(DESERTGU_NOISE, 1, 1, 7515, 12.0, 0, 12.0/2, &midway_lfsr)
@@ -1218,34 +1218,34 @@ static DISCRETE_SOUND_START(desertgu)
DISCRETE_CRFILTER(DESERTGU_RIFLE_SHOT_SND, NODE_31, RES_K(12) + RES_K(68), CAP_U(.0022))
/************************************************
- * Bottle hit sound
- ************************************************/
+ * Bottle hit sound
+ ************************************************/
DISCRETE_CONSTANT(DESERTGU_BOTTLE_HIT_SND, 0) /* placeholder for incomplete sound */
/************************************************
- * Road Runner hit sound
- ************************************************/
+ * Road Runner hit sound
+ ************************************************/
DISCRETE_CONSTANT(DESERTGU_ROAD_RUNNER_HIT_SND, 0) /* placeholder for incomplete sound */
/************************************************
- * Creature hit sound
- ************************************************/
+ * Creature hit sound
+ ************************************************/
DISCRETE_CONSTANT(DESERTGU_CREATURE_HIT_SND, 0) /* placeholder for incomplete sound */
/************************************************
- * Beep-Beep sound
- ************************************************/
+ * Beep-Beep sound
+ ************************************************/
DISCRETE_CONSTANT(DESERTGU_ROADRUNNER_BEEP_BEEP_SND, 0) /* placeholder for incomplete sound */
/************************************************
- * Mix and filter
- ************************************************/
+ * Mix and filter
+ ************************************************/
DISCRETE_MIXER3(NODE_80, 1, DESERTGU_BOTTLE_HIT_SND, DESERTGU_ROADRUNNER_BEEP_BEEP_SND, DESERTGU_TRIGGER_CLICK_SND, &desertgu_filter_mixer)
DISCRETE_OP_AMP_FILTER(NODE_81, 1, NODE_80, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1, &desertgu_filter)
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
DISCRETE_MIXER5(NODE_91, DESERTGU_GAME_ON_EN, DESERTGU_RIFLE_SHOT_SND, DESERTGU_ROAD_RUNNER_HIT_SND, DESERTGU_CREATURE_HIT_SND, NODE_81, MIDWAY_TONE_SND, &desertgu_mixer)
DISCRETE_OUTPUT(NODE_91, 1)
@@ -1323,18 +1323,18 @@ WRITE8_MEMBER(mw8080bw_state::desertgu_audio_2_w)
static const discrete_lfsr_desc dplay_lfsr =
{
DISC_CLK_IS_FREQ,
- 17, /* bit length */
+ 17, /* bit length */
/* the RC network fed into pin 4, has the effect
- of presetting all bits high at power up */
- 0x1ffff, /* reset value */
- 4, /* use bit 4 as XOR input 0 */
- 16, /* use bit 16 as XOR input 1 */
- DISC_LFSR_XOR, /* feedback stage1 is XOR */
- DISC_LFSR_OR, /* feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* feedback stage3 replaces the shifted register contents */
- 0x000001, /* everything is shifted into the first bit only */
- 0, /* output is not inverted */
- 8 /* output bit */
+ of presetting all bits high at power up */
+ 0x1ffff, /* reset value */
+ 4, /* use bit 4 as XOR input 0 */
+ 16, /* use bit 16 as XOR input 1 */
+ DISC_LFSR_XOR, /* feedback stage1 is XOR */
+ DISC_LFSR_OR, /* feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* feedback stage3 replaces the shifted register contents */
+ 0x000001, /* everything is shifted into the first bit only */
+ 0, /* output is not inverted */
+ 8 /* output bit */
};
@@ -1355,17 +1355,17 @@ static const discrete_integrate_info dplay_siren_integrate_info =
static const discrete_op_amp_osc_info dplay_siren_osc =
{
- DISC_OP_AMP_OSCILLATOR_VCO_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
- RES_K(390), /* r1 */
- RES_M(5.6), /* r2 */
- RES_M(1), /* r3 */
- RES_M(1.5), /* r4 */
- RES_M(3.3), /* r5 */
- RES_K(56), /* r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_U(0.0022), /* c */
- 12 /* vP */
+ DISC_OP_AMP_OSCILLATOR_VCO_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
+ RES_K(390), /* r1 */
+ RES_M(5.6), /* r2 */
+ RES_M(1), /* r3 */
+ RES_M(1.5), /* r4 */
+ RES_M(3.3), /* r5 */
+ RES_K(56), /* r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_U(0.0022), /* c */
+ 12 /* vP */
};
static const discrete_integrate_info dplay_whistle_integrate_info =
@@ -1385,17 +1385,17 @@ static const discrete_integrate_info dplay_whistle_integrate_info =
static const discrete_op_amp_osc_info dplay_whistle_osc =
{
- DISC_OP_AMP_OSCILLATOR_VCO_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
- RES_K(510), /* r1 */
- RES_M(5.6), /* r2 */
- RES_M(1), /* r3 */
- RES_M(1.5), /* r4 */
- RES_M(3.3), /* r5 */
- RES_K(300), /* r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_P(220), /* c */
- 12 /* vP */
+ DISC_OP_AMP_OSCILLATOR_VCO_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW, /* type */
+ RES_K(510), /* r1 */
+ RES_M(5.6), /* r2 */
+ RES_M(1), /* r3 */
+ RES_M(1.5), /* r4 */
+ RES_M(3.3), /* r5 */
+ RES_K(300), /* r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_P(220), /* c */
+ 12 /* vP */
};
@@ -1434,30 +1434,30 @@ static const discrete_mixer_desc dplay_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(68),
- RES_K(68),
- RES_K(68),
- RES_K(18),
- RES_K(68) },
+ RES_K(68),
+ RES_K(68),
+ RES_K(18),
+ RES_K(68) },
{ 0,
- 0,
- 0,
- 0,
- DPLAY_MUSIC_ADJ },
+ 0,
+ 0,
+ 0,
+ DPLAY_MUSIC_ADJ },
{ CAP_U(0.1),
- CAP_U(0.1),
- CAP_U(0.1),
- CAP_U(0.1),
- CAP_U(0.1) }
+ CAP_U(0.1),
+ CAP_U(0.1),
+ CAP_U(0.1),
+ CAP_U(0.1) }
, 0, RES_K(100), 0, CAP_U(0.1), 0,
- 2000 /* final gain */
+ 2000 /* final gain */
};
static DISCRETE_SOUND_START(dplay)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC (DPLAY_GAME_ON_EN)
DISCRETE_INPUT_LOGIC (DPLAY_TONE_ON_EN)
DISCRETE_INPUTX_LOGIC(DPLAY_SIREN_EN, 5, 0, 0)
@@ -1470,38 +1470,38 @@ static DISCRETE_SOUND_START(dplay)
DISCRETE_ADJUSTMENT(DPLAY_MUSIC_ADJ, RES_M(1), 1000, DISC_LOGADJ, "MUSIC_ADJ")
/************************************************
- * Music and Tone Generator
- ************************************************/
+ * Music and Tone Generator
+ ************************************************/
MIDWAY_TONE_GENERATOR(midway_music_tvca_info)
DISCRETE_OP_AMP_TRIG_VCA(DPLAY_TONE_SND, MIDWAY_TONE_BEFORE_AMP_SND, DPLAY_TONE_ON_EN, 0, 12, 0, &midway_music_tvca_info)
/************************************************
- * Siren
- ************************************************/
+ * Siren
+ ************************************************/
DISCRETE_INTEGRATE(NODE_30,
- DPLAY_SIREN_EN, /* TRG0 */
- 0 , /* TRG1 */
+ DPLAY_SIREN_EN, /* TRG0 */
+ 0 , /* TRG1 */
&dplay_siren_integrate_info)
DISCRETE_OP_AMP_VCO1(DPLAY_SIREN_SND,
- 1, /* ENAB */
- NODE_30, /* VMOD1 */
+ 1, /* ENAB */
+ NODE_30, /* VMOD1 */
&dplay_siren_osc)
/************************************************
- * Whistle
- ************************************************/
+ * Whistle
+ ************************************************/
DISCRETE_INTEGRATE(NODE_40,
- DPLAY_WHISTLE_EN, /* TRG0 */
- 0 , /* TRG1 */
+ DPLAY_WHISTLE_EN, /* TRG0 */
+ 0 , /* TRG1 */
&dplay_whistle_integrate_info)
DISCRETE_OP_AMP_VCO1(DPLAY_WHISTLE_SND,
- 1, /* ENAB */
- NODE_40, /* VMOD1 */
+ 1, /* ENAB */
+ NODE_40, /* VMOD1 */
&dplay_whistle_osc)
/************************************************ * Cheer
- ************************************************/ /* Noise clock was
+ ************************************************/ /* Noise clock was
breadboarded and measured at 7700Hz */ DISCRETE_LFSR_NOISE(DPLAY_NOISE, 1,
1, 7700, 12.0, 0, 12.0/2, &dplay_lfsr)
@@ -1510,8 +1510,8 @@ static DISCRETE_SOUND_START(dplay)
DISCRETE_OP_AMP_FILTER(DPLAY_CHEER_SND, 1, NODE_51, 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &dplay_cheer_filter)
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
DISCRETE_MIXER5(NODE_91, DPLAY_GAME_ON_EN, DPLAY_TONE_SND, DPLAY_SIREN_SND, DPLAY_WHISTLE_SND, DPLAY_CHEER_SND, MIDWAY_TONE_SND, &dplay_mixer)
DISCRETE_OUTPUT(NODE_91, 1)
@@ -1554,15 +1554,15 @@ WRITE8_MEMBER(mw8080bw_state::dplay_audio_w)
static const char *const gmissile_sample_names[] =
{
"*gmissile",
- "1", /* missle */
- "2", /* explosion */
+ "1", /* missle */
+ "2", /* explosion */
0
};
static const samples_interface gmissile_samples_interface =
{
- 1, /* 1 channel */
+ 1, /* 1 channel */
gmissile_sample_names
};
@@ -1583,8 +1583,8 @@ MACHINE_CONFIG_END
WRITE8_MEMBER(mw8080bw_state::gmissile_audio_1_w)
{
/* note that the schematics shows the left and right explosions
- reversed (D5=R, D7=L), but the software confirms that
- ours is right */
+ reversed (D5=R, D7=L), but the software confirms that
+ ours is right */
UINT8 rising_bits = data & ~m_port_1_last;
@@ -1650,15 +1650,15 @@ WRITE8_MEMBER(mw8080bw_state::gmissile_audio_3_w)
static const char *const m4_sample_names[] =
{
"*m4",
- "1", /* missle */
- "2", /* explosion */
+ "1", /* missle */
+ "2", /* explosion */
0
};
static const samples_interface m4_samples_interface =
{
- 2, /* 2 channels */
+ 2, /* 2 channels */
m4_sample_names
};
@@ -1717,10 +1717,10 @@ WRITE8_MEMBER(mw8080bw_state::m4_audio_2_w)
/* if (data & 0x08) enable RIGHT TANK MOTOR sound (goes to right speaker) */
/* if (data & 0x10) enable sound that is playing while the right plane is
- flying. Circuit not named on schematics (goes to left speaker) */
+ flying. Circuit not named on schematics (goes to left speaker) */
/* if (data & 0x20) enable sound that is playing while the left plane is
- flying. Circuit not named on schematics (goes to right speaker) */
+ flying. Circuit not named on schematics (goes to right speaker) */
/* D6 and D7 are not connected */
@@ -1756,25 +1756,25 @@ WRITE8_MEMBER(mw8080bw_state::m4_audio_2_w)
static const discrete_op_amp_tvca_info clowns_pop_tvca_info =
{
- RES_M(2.7), /* r304 */
- RES_K(680), /* r303 */
+ RES_M(2.7), /* r304 */
+ RES_K(680), /* r303 */
0,
- RES_K(680), /* r305 */
- RES_K(1), /* j3 */
+ RES_K(680), /* r305 */
+ RES_K(1), /* j3 */
0,
- RES_K(470), /* r300 */
- RES_K(1), /* j3 */
- RES_K(510), /* r301 */
- RES_K(1), /* j3 */
- RES_K(680), /* r302 */
- CAP_U(.015), /* c300 */
- CAP_U(.1), /* c301 */
- CAP_U(.082), /* c302 */
- 0, /* no c4 */
- 5, /* v1 */
- 5, /* v2 */
- 5, /* v3 */
- 12, /* vP */
+ RES_K(470), /* r300 */
+ RES_K(1), /* j3 */
+ RES_K(510), /* r301 */
+ RES_K(1), /* j3 */
+ RES_K(680), /* r302 */
+ CAP_U(.015), /* c300 */
+ CAP_U(.1), /* c301 */
+ CAP_U(.082), /* c302 */
+ 0, /* no c4 */
+ 5, /* v1 */
+ 5, /* v2 */
+ 5, /* v3 */
+ 12, /* vP */
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_TRG0,
@@ -1787,36 +1787,36 @@ static const discrete_op_amp_tvca_info clowns_pop_tvca_info =
static const discrete_op_amp_osc_info clowns_sb_hit_osc_info =
{
DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW,
- RES_K(820), /* r200 */
- RES_K(33), /* r203 */
- RES_K(150), /* r201 */
- RES_K(240), /* r204 */
- RES_M(1), /* r202 */
+ RES_K(820), /* r200 */
+ RES_K(33), /* r203 */
+ RES_K(150), /* r201 */
+ RES_K(240), /* r204 */
+ RES_M(1), /* r202 */
0,
0,
0,
- CAP_U(0.01), /* c200 */
+ CAP_U(0.01), /* c200 */
12
};
static const discrete_op_amp_tvca_info clowns_sb_hit_tvca_info =
{
- RES_M(2.7), /* r207 */
- RES_K(680), /* r205 */
+ RES_M(2.7), /* r207 */
+ RES_K(680), /* r205 */
0,
- RES_K(680), /* r208 */
- RES_K(1), /* j3 */
+ RES_K(680), /* r208 */
+ RES_K(1), /* j3 */
0,
- RES_K(680), /* r206 */
+ RES_K(680), /* r206 */
0,0,0,0,
- CAP_U(1), /* c201 */
+ CAP_U(1), /* c201 */
0,
0, 0,
- 5, /* v1 */
- 0, /* v2 */
- 0, /* v3 */
- 12, /* vP */
+ 5, /* v1 */
+ 0, /* v2 */
+ 0, /* v3 */
+ 12, /* vP */
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_TRG0,
@@ -1830,17 +1830,17 @@ static const discrete_mixer_desc clowns_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(10),
- RES_K(10),
- RES_K(10) + 1.0 / (1.0 / RES_K(15) + 1.0 / RES_K(39)),
- RES_K(1) },
+ RES_K(10),
+ RES_K(10) + 1.0 / (1.0 / RES_K(15) + 1.0 / RES_K(39)),
+ RES_K(1) },
{ 0,
- 0,
- 0,
- CLOWNS_R507_POT },
+ 0,
+ 0,
+ CLOWNS_R507_POT },
{ 0,
- CAP_U(0.022),
- 0,
- 0 },
+ CAP_U(0.022),
+ 0,
+ 0 },
0,
RES_K(100),
0,
@@ -1853,8 +1853,8 @@ static const discrete_mixer_desc clowns_mixer =
static DISCRETE_SOUND_START(clowns)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(CLOWNS_POP_BOTTOM_EN)
DISCRETE_INPUT_LOGIC(CLOWNS_POP_MIDDLE_EN)
DISCRETE_INPUT_LOGIC(CLOWNS_POP_TOP_EN)
@@ -1867,14 +1867,14 @@ static DISCRETE_SOUND_START(clowns)
DISCRETE_ADJUSTMENT(CLOWNS_R507_POT, RES_M(1), 7000, DISC_LOGADJ, "R507")
/************************************************
- * Tone generator
- ************************************************/
+ * Tone generator
+ ************************************************/
MIDWAY_TONE_GENERATOR(midway_music_tvca_info)
/************************************************
- * Balloon hit sounds
- * The LFSR is the same as boothill
- ************************************************/
+ * Balloon hit sounds
+ * The LFSR is the same as boothill
+ ************************************************/
/* Noise clock was breadboarded and measured at 7700Hz */
DISCRETE_LFSR_NOISE(CLOWNS_NOISE, 1, 1, 7700, 12.0, 0, 12.0/2, &midway_lfsr)
@@ -1884,8 +1884,8 @@ static DISCRETE_SOUND_START(clowns)
DISCRETE_GAIN(CLOWNS_POP_SND, NODE_32, RES_K(39)/(RES_K(15) + RES_K(39)))
/************************************************
- * Springboard hit
- ************************************************/
+ * Springboard hit
+ ************************************************/
DISCRETE_OP_AMP_OSCILLATOR(NODE_40, 1, &clowns_sb_hit_osc_info)
DISCRETE_OP_AMP_TRIG_VCA(NODE_41, CLOWNS_SPRINGBOARD_HIT_EN, 0, 0, NODE_40, 0, &clowns_sb_hit_tvca_info)
/* The rest of the circuit is a filter. The frequency response was calculated with SPICE. */
@@ -1894,13 +1894,13 @@ static DISCRETE_SOUND_START(clowns)
DISCRETE_GAIN(CLOWNS_SB_HIT_SND, NODE_42, 0.5)
/************************************************
- * Springboard miss - INCOMPLETE
- ************************************************/
+ * Springboard miss - INCOMPLETE
+ ************************************************/
DISCRETE_CONSTANT(CLOWNS_SB_MISS_SND, 0) /* Placeholder for incomplete sound */
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
DISCRETE_MIXER4(NODE_91, 1, CLOWNS_SB_HIT_SND, CLOWNS_SB_MISS_SND, CLOWNS_POP_SND, MIDWAY_TONE_SND, &clowns_mixer)
DISCRETE_OUTPUT(NODE_91, 11000)
@@ -1916,7 +1916,7 @@ static const char *const clowns_sample_names[] =
static const samples_interface clowns_samples_interface =
{
- 1, /* 1 channel */
+ 1, /* 1 channel */
clowns_sample_names
};
@@ -1976,7 +1976,7 @@ WRITE8_MEMBER(mw8080bw_state::clowns_audio_2_w)
*
*************************************/
- /* Discrete Sound Input Nodes */
+ /* Discrete Sound Input Nodes */
#define SPACWALK_TARGET_HIT_BOTTOM_EN NODE_01
#define SPACWALK_TARGET_HIT_MIDDLE_EN NODE_02
#define SPACWALK_TARGET_HIT_TOP_EN NODE_03
@@ -1997,77 +1997,77 @@ WRITE8_MEMBER(mw8080bw_state::clowns_audio_2_w)
#define SPACWALK_R507_POT NODE_19
/* Parts List - Resistors */
-#define SPACWALK_R200 RES_K(820)
-#define SPACWALK_R201 RES_K(150)
-#define SPACWALK_R202 RES_M(1)
-#define SPACWALK_R203 RES_K(82)
-#define SPACWALK_R204 RES_K(240)
-#define SPACWALK_R205 RES_K(220)
-#define SPACWALK_R206 RES_K(120)
-#define SPACWALK_R207 RES_M(1)
-#define SPACWALK_R208 RES_K(300)
-#define SPACWALK_R210 RES_K(56)
-#define SPACWALK_R211 RES_K(100)
-#define SPACWALK_R213 RES_K(300)
-#define SPACWALK_R214 RES_K(27)
-#define SPACWALK_R215 RES_K(51)
-#define SPACWALK_R216 RES_K(30)
-#define SPACWALK_R300 RES_K(270)
-#define SPACWALK_R301 RES_K(300)
-#define SPACWALK_R302 RES_K(330)
-#define SPACWALK_R303 RES_K(680)
-#define SPACWALK_R304 RES_M(1)
-#define SPACWALK_R305 RES_K(3680)
-#define SPACWALK_R307 RES_K(20)
-#define SPACWALK_R308 RES_K(20) /* not labeled but it's beside R307 */
-#define SPACWALK_R400 RES_K(1)
-#define SPACWALK_R401 RES_K(200)
-#define SPACWALK_R403 RES_K(51)
-#define SPACWALK_R404 RES_K(220)
-#define SPACWALK_R406 RES_M(1)
-#define SPACWALK_R407 RES_K(820)
-#define SPACWALK_R410 RES_K(47)
-#define SPACWALK_R411 RES_K(300)
-#define SPACWALK_R412 RES_K(330)
-#define SPACWALK_R413 RES_M(1)
-#define SPACWALK_R414 RES_M(1)
-#define SPACWALK_R416 RES_M(4.7)
-#define SPACWALK_R417 RES_K(10)
-#define SPACWALK_R418 RES_K(100)
-#define SPACWALK_R419 RES_K(2.7)
-#define SPACWALK_R420 RES_K(20)
-#define SPACWALK_R421 RES_K(11)
-#define SPACWALK_R422 RES_K(75)
-#define SPACWALK_R507 RES_M(1)
-#define SPACWALK_RJ3 RES_K(1)
+#define SPACWALK_R200 RES_K(820)
+#define SPACWALK_R201 RES_K(150)
+#define SPACWALK_R202 RES_M(1)
+#define SPACWALK_R203 RES_K(82)
+#define SPACWALK_R204 RES_K(240)
+#define SPACWALK_R205 RES_K(220)
+#define SPACWALK_R206 RES_K(120)
+#define SPACWALK_R207 RES_M(1)
+#define SPACWALK_R208 RES_K(300)
+#define SPACWALK_R210 RES_K(56)
+#define SPACWALK_R211 RES_K(100)
+#define SPACWALK_R213 RES_K(300)
+#define SPACWALK_R214 RES_K(27)
+#define SPACWALK_R215 RES_K(51)
+#define SPACWALK_R216 RES_K(30)
+#define SPACWALK_R300 RES_K(270)
+#define SPACWALK_R301 RES_K(300)
+#define SPACWALK_R302 RES_K(330)
+#define SPACWALK_R303 RES_K(680)
+#define SPACWALK_R304 RES_M(1)
+#define SPACWALK_R305 RES_K(3680)
+#define SPACWALK_R307 RES_K(20)
+#define SPACWALK_R308 RES_K(20) /* not labeled but it's beside R307 */
+#define SPACWALK_R400 RES_K(1)
+#define SPACWALK_R401 RES_K(200)
+#define SPACWALK_R403 RES_K(51)
+#define SPACWALK_R404 RES_K(220)
+#define SPACWALK_R406 RES_M(1)
+#define SPACWALK_R407 RES_K(820)
+#define SPACWALK_R410 RES_K(47)
+#define SPACWALK_R411 RES_K(300)
+#define SPACWALK_R412 RES_K(330)
+#define SPACWALK_R413 RES_M(1)
+#define SPACWALK_R414 RES_M(1)
+#define SPACWALK_R416 RES_M(4.7)
+#define SPACWALK_R417 RES_K(10)
+#define SPACWALK_R418 RES_K(100)
+#define SPACWALK_R419 RES_K(2.7)
+#define SPACWALK_R420 RES_K(20)
+#define SPACWALK_R421 RES_K(11)
+#define SPACWALK_R422 RES_K(75)
+#define SPACWALK_R507 RES_M(1)
+#define SPACWALK_RJ3 RES_K(1)
/* Parts List - Capacitors */
-#define SPACWALK_C200 CAP_U(0.0022)
-#define SPACWALK_C201 CAP_U(3.3)
-#define SPACWALK_C203 CAP_U(0.0033)
-#define SPACWALK_C204 CAP_U(0.0033)
-#define SPACWALK_C300 CAP_U(2.2)
-#define SPACWALK_C301 CAP_U(2.2)
-#define SPACWALK_C302 CAP_U(2.2)
-#define SPACWALK_C303 CAP_U(0.0047)
-#define SPACWALK_C304 CAP_U(0.0047) /* not labeled but it's beside C303 */
-#define SPACWALK_C401 CAP_U(1)
-#define SPACWALK_C402 CAP_U(0.68)
-#define SPACWALK_C403 CAP_U(0.0022)
-#define SPACWALK_C451 CAP_U(0.001)
-#define SPACWALK_C452 CAP_U(0.001)
-#define SPACWALK_C453 CAP_U(0.001)
-#define SPACWALK_C602 CAP_U(1)
+#define SPACWALK_C200 CAP_U(0.0022)
+#define SPACWALK_C201 CAP_U(3.3)
+#define SPACWALK_C203 CAP_U(0.0033)
+#define SPACWALK_C204 CAP_U(0.0033)
+#define SPACWALK_C300 CAP_U(2.2)
+#define SPACWALK_C301 CAP_U(2.2)
+#define SPACWALK_C302 CAP_U(2.2)
+#define SPACWALK_C303 CAP_U(0.0047)
+#define SPACWALK_C304 CAP_U(0.0047) /* not labeled but it's beside C303 */
+#define SPACWALK_C401 CAP_U(1)
+#define SPACWALK_C402 CAP_U(0.68)
+#define SPACWALK_C403 CAP_U(0.0022)
+#define SPACWALK_C451 CAP_U(0.001)
+#define SPACWALK_C452 CAP_U(0.001)
+#define SPACWALK_C453 CAP_U(0.001)
+#define SPACWALK_C602 CAP_U(1)
static const discrete_op_amp_tvca_info spacwalk_hit_tvca_info =
{
- SPACWALK_R304, SPACWALK_R303, 0, SPACWALK_R305, /* r1, r2, r3, r4 */
- SPACWALK_RJ3, 0, SPACWALK_R300, /* r5, r6, r7 */
- SPACWALK_RJ3, SPACWALK_R301, /* r8, r9 */
- SPACWALK_RJ3, SPACWALK_R302, /* r10, r11 */
- SPACWALK_C300, SPACWALK_C301, SPACWALK_C302, 0, /* c1, c2, c3, c4 */
- 5, 5, 5, 12, /* v1, v2, v3, vP */
+ SPACWALK_R304, SPACWALK_R303, 0, SPACWALK_R305, /* r1, r2, r3, r4 */
+ SPACWALK_RJ3, 0, SPACWALK_R300, /* r5, r6, r7 */
+ SPACWALK_RJ3, SPACWALK_R301, /* r8, r9 */
+ SPACWALK_RJ3, SPACWALK_R302, /* r10, r11 */
+ SPACWALK_C300, SPACWALK_C301, SPACWALK_C302, 0, /* c1, c2, c3, c4 */
+ 5, 5, 5, 12, /* v1, v2, v3, vP */
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_TRG0,
@@ -2079,18 +2079,18 @@ static const discrete_op_amp_tvca_info spacwalk_hit_tvca_info =
static const discrete_op_amp_osc_info spacwalk_sb_hit_vco =
{
DISC_OP_AMP_OSCILLATOR_VCO_3 | DISC_OP_AMP_IS_NORTON,
- RES_K(330 + 150 + 30), SPACWALK_R203, SPACWALK_R201, SPACWALK_R204, /* r1, r2, r3, r4 */
- SPACWALK_R202, 0, SPACWALK_R200, 0, /* r5, r6, r7, r8*/
- SPACWALK_C200, 12 /* c, vP*/
+ RES_K(330 + 150 + 30), SPACWALK_R203, SPACWALK_R201, SPACWALK_R204, /* r1, r2, r3, r4 */
+ SPACWALK_R202, 0, SPACWALK_R200, 0, /* r5, r6, r7, r8*/
+ SPACWALK_C200, 12 /* c, vP*/
};
static const discrete_op_amp_tvca_info spacwalk_sb_hit_tvca_info =
{
- SPACWALK_R207, SPACWALK_R205, 0, SPACWALK_R208, /* r1, r2, r3, r4 */
- SPACWALK_RJ3, 0, SPACWALK_R206, /* r5, r6, r7 */
- 0, 0, 0, 0 , /* r8, r9, r10, r11 */
- SPACWALK_C201, 0, 0, 0, /* c1, c2, c3, c4 */
- 5, 0, 0, 12, /* v1, v2, v3, vP */
+ SPACWALK_R207, SPACWALK_R205, 0, SPACWALK_R208, /* r1, r2, r3, r4 */
+ SPACWALK_RJ3, 0, SPACWALK_R206, /* r5, r6, r7 */
+ 0, 0, 0, 0 , /* r8, r9, r10, r11 */
+ SPACWALK_C201, 0, 0, 0, /* c1, c2, c3, c4 */
+ 5, 0, 0, 12, /* v1, v2, v3, vP */
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_NONE,
DISC_OP_AMP_TRIGGER_FUNCTION_TRG0,
@@ -2102,54 +2102,54 @@ static const discrete_op_amp_tvca_info spacwalk_sb_hit_tvca_info =
static const discrete_integrate_info spacwalk_sb_miss_integrate =
{
DISC_INTEGRATE_OP_AMP_1 | DISC_OP_AMP_IS_NORTON,
- SPACWALK_R406, SPACWALK_R401, 0, SPACWALK_C402, /* r1, r2, r3, c */
- 12, 12, /* v1, vP */
- 0, 0, 0 /* f0, f1, f2 */
+ SPACWALK_R406, SPACWALK_R401, 0, SPACWALK_C402, /* r1, r2, r3, c */
+ 12, 12, /* v1, vP */
+ 0, 0, 0 /* f0, f1, f2 */
};
static const discrete_op_amp_osc_info spacwalk_sb_miss_vco =
{
DISC_OP_AMP_OSCILLATOR_VCO_3 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW,
- SPACWALK_R407, SPACWALK_R412, SPACWALK_R410, SPACWALK_R411, SPACWALK_R413, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- SPACWALK_C403, 12 /* c, vP */
+ SPACWALK_R407, SPACWALK_R412, SPACWALK_R410, SPACWALK_R411, SPACWALK_R413, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ SPACWALK_C403, 12 /* c, vP */
};
static const discrete_op_amp_filt_info spacwalk_sb_miss_filter =
{
/* we use r1, not r2 because vref is taken into acount by the CRFILTER */
- SPACWALK_R417, 0, SPACWALK_R414, 0, SPACWALK_R416, /* r1, r2, r3, r4, rF */
- SPACWALK_C451, SPACWALK_C452, 0, /* c1, c2, c3 */
- 0, 12, 0 /* vRef, vP, vN */
+ SPACWALK_R417, 0, SPACWALK_R414, 0, SPACWALK_R416, /* r1, r2, r3, r4, rF */
+ SPACWALK_C451, SPACWALK_C452, 0, /* c1, c2, c3 */
+ 0, 12, 0 /* vRef, vP, vN */
};
static const discrete_op_amp_info spacwalk_sb_miss_amp =
{
DISC_OP_AMP_IS_NORTON,
- SPACWALK_R418, SPACWALK_R404, 0, SPACWALK_R403, /* r1, r2, r3, r4 */
- 0, /* c */
- 0, 12, /* vN, vP */
+ SPACWALK_R418, SPACWALK_R404, 0, SPACWALK_R403, /* r1, r2, r3, r4 */
+ 0, /* c */
+ 0, 12, /* vN, vP */
};
static const discrete_op_amp_osc_info spacwalk_spaceship_osc =
{
DISC_OP_AMP_OSCILLATOR_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- RES_K(75), RES_M(1), RES_M(6.8), RES_M(2.4), 0, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- CAP_U(2.2), 12 /* c, vP */
+ RES_K(75), RES_M(1), RES_M(6.8), RES_M(2.4), 0, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ CAP_U(2.2), 12 /* c, vP */
};
static const discrete_op_amp_osc_info spacwalk_spaceship_vco =
{
DISC_OP_AMP_OSCILLATOR_VCO_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- RES_K(680), RES_K(300), RES_K(100), RES_K(150), RES_K(120), 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- CAP_U(0.0012), 12 /* c, vP */
+ RES_K(680), RES_K(300), RES_K(100), RES_K(150), RES_K(120), 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ CAP_U(0.0012), 12 /* c, vP */
};
static const discrete_mixer_desc spacwalk_mixer =
{
DISC_MIXER_IS_RESISTOR,
{SPACWALK_R422, SPACWALK_R422, RES_K(39 + 10 + 1), SPACWALK_R421, SPACWALK_R420, SPACWALK_R419},
- {0, 0, 0, 0, 0, SPACWALK_R507_POT}, /* r_nodes */
- {0}, 0, 0, 0, SPACWALK_C602, 0, 1 /* c, rI, rF, cF, cAmp, vRef, gain */
+ {0, 0, 0, 0, 0, SPACWALK_R507_POT}, /* r_nodes */
+ {0}, 0, 0, 0, SPACWALK_C602, 0, 1 /* c, rI, rF, cF, cAmp, vRef, gain */
};
@@ -2158,35 +2158,35 @@ static const discrete_mixer_desc spacwalk_mixer =
************************************************/
#define SPACWALK_SPRINGBOARD_HIT_CIRCUIT(_num) \
DISCRETE_RCFILTER(NODE_RELATIVE(NODE_29, _num), \
- SPACWALK_NOISE, /* IN0 */ \
+ SPACWALK_NOISE, /* IN0 */ \
RES_K(330), CAP_U(.1)) \
DISCRETE_RCFILTER(NODE_RELATIVE(NODE_31, _num), \
- NODE_RELATIVE(NODE_29, _num), /* IN0 */ \
+ NODE_RELATIVE(NODE_29, _num), /* IN0 */ \
RES_K(330) + RES_K(150), CAP_U(.1)) \
-DISCRETE_OP_AMP_VCO1(NODE_RELATIVE(NODE_33, _num), /* IC M2-3, pin 5 */ \
- 1, /* ENAB */ \
- NODE_RELATIVE(NODE_31, _num), /* VMOD1 */ \
+DISCRETE_OP_AMP_VCO1(NODE_RELATIVE(NODE_33, _num), /* IC M2-3, pin 5 */ \
+ 1, /* ENAB */ \
+ NODE_RELATIVE(NODE_31, _num), /* VMOD1 */ \
&spacwalk_sb_hit_vco) \
-DISCRETE_OP_AMP_TRIG_VCA(NODE_RELATIVE(NODE_35, _num), /* IC M2-3, pin 9 */ \
- NODE_RELATIVE(SPACWALK_SPRINGBOARD_HIT1_EN, _num - 1), 0, 0, /* TRG0, TRG1, TRG2 */ \
- NODE_RELATIVE(NODE_33, _num), 0, /* IN0, IN1 */ \
+DISCRETE_OP_AMP_TRIG_VCA(NODE_RELATIVE(NODE_35, _num), /* IC M2-3, pin 9 */ \
+ NODE_RELATIVE(SPACWALK_SPRINGBOARD_HIT1_EN, _num - 1), 0, 0, /* TRG0, TRG1, TRG2 */ \
+ NODE_RELATIVE(NODE_33, _num), 0, /* IN0, IN1 */ \
&spacwalk_sb_hit_tvca_info) \
/* Wrong values. Untested */ \
/* The rest of the circuit is a filter. */ \
DISCRETE_FILTER2(NODE_RELATIVE(NODE_37, _num), \
- 1, /* ENAB */ \
- NODE_RELATIVE(NODE_35, _num), /* INP0 */ \
- 2000.0 - _num * 500, 1.0/.8, /* FREQ, DAMP */ \
+ 1, /* ENAB */ \
+ NODE_RELATIVE(NODE_35, _num), /* INP0 */ \
+ 2000.0 - _num * 500, 1.0/.8, /* FREQ, DAMP */ \
DISC_FILTER_LOWPASS) \
/* The filter has a gain of 0.5 */ \
DISCRETE_GAIN(NODE_RELATIVE(SPACWALK_SPRINGBOARD_HIT1_SND, _num - 1), \
NODE_RELATIVE(NODE_37, _num), 0.5)
- static DISCRETE_SOUND_START(spacwalk)
+ static DISCRETE_SOUND_START(spacwalk)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(SPACWALK_TARGET_HIT_BOTTOM_EN)
DISCRETE_INPUT_LOGIC(SPACWALK_TARGET_HIT_MIDDLE_EN)
DISCRETE_INPUT_LOGIC(SPACWALK_TARGET_HIT_TOP_EN)
@@ -2201,87 +2201,87 @@ DISCRETE_GAIN(NODE_RELATIVE(SPACWALK_SPRINGBOARD_HIT1_SND, _num - 1),
DISCRETE_ADJUSTMENT(SPACWALK_R507_POT, SPACWALK_R507, 7000, DISC_LOGADJ, "R507")
/************************************************
- * Tone generator
- ************************************************/
+ * Tone generator
+ ************************************************/
MIDWAY_TONE_GENERATOR(midway_music_tvca_info)
/************************************************
- * Target hit sounds
- * The LFSR is the same as boothill
- ************************************************/
+ * Target hit sounds
+ * The LFSR is the same as boothill
+ ************************************************/
/* Noise clock was breadboarded and measured at 7700Hz */
- DISCRETE_LFSR_NOISE(SPACWALK_NOISE, /* IC L4, pin 10 */
- 1, 1, /* ENAB, RESET */
- 7700, 12.0, 0, 12.0/2, &midway_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
+ DISCRETE_LFSR_NOISE(SPACWALK_NOISE, /* IC L4, pin 10 */
+ 1, 1, /* ENAB, RESET */
+ 7700, 12.0, 0, 12.0/2, &midway_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
- DISCRETE_OP_AMP_TRIG_VCA(NODE_20, /* IC K3, pin 9 */
+ DISCRETE_OP_AMP_TRIG_VCA(NODE_20, /* IC K3, pin 9 */
SPACWALK_TARGET_HIT_TOP_EN, SPACWALK_TARGET_HIT_MIDDLE_EN, SPACWALK_TARGET_HIT_BOTTOM_EN,
- SPACWALK_NOISE, 0, /* IN0, IN1 */
+ SPACWALK_NOISE, 0, /* IN0, IN1 */
&spacwalk_hit_tvca_info)
DISCRETE_RCFILTER(NODE_21,
- NODE_20, /* IN0 */
+ NODE_20, /* IN0 */
SPACWALK_R307, SPACWALK_C303)
DISCRETE_RCFILTER(SPACWALK_TARGET_HIT_SND,
- NODE_21, /* IN0 */
+ NODE_21, /* IN0 */
SPACWALK_R307 + SPACWALK_R308, SPACWALK_C304)
/************************************************
- * Springboard hit sounds
- ************************************************/
+ * Springboard hit sounds
+ ************************************************/
/* Nodes 30 - 40 */
SPACWALK_SPRINGBOARD_HIT_CIRCUIT(1)
SPACWALK_SPRINGBOARD_HIT_CIRCUIT(2)
/************************************************
- * Springboard miss sound
- ************************************************/
- DISCRETE_RCDISC2(NODE_50, /* voltage on C401 */
- SPACWALK_SPRINGBOARD_MISS_EN, /* SWITCH */
- OP_AMP_NORTON_VBE, RES_2_PARALLEL(SPACWALK_R401, SPACWALK_R407), /* INP0,RVAL0 */
- 12.0 - .5, SPACWALK_R400, /* INP1,RVAL1 */
+ * Springboard miss sound
+ ************************************************/
+ DISCRETE_RCDISC2(NODE_50, /* voltage on C401 */
+ SPACWALK_SPRINGBOARD_MISS_EN, /* SWITCH */
+ OP_AMP_NORTON_VBE, RES_2_PARALLEL(SPACWALK_R401, SPACWALK_R407), /* INP0,RVAL0 */
+ 12.0 - .5, SPACWALK_R400, /* INP1,RVAL1 */
SPACWALK_C401)
- DISCRETE_INTEGRATE(NODE_51, /* IC K4, pin 9 */
- NODE_50, 0, /* TRG0,TRG1*/
+ DISCRETE_INTEGRATE(NODE_51, /* IC K4, pin 9 */
+ NODE_50, 0, /* TRG0,TRG1*/
&spacwalk_sb_miss_integrate)
- DISCRETE_OP_AMP_VCO1(NODE_52, /* IC K4, pin 5 */
- 1, /* ENAB */
- NODE_50, /* VMOD1 */
+ DISCRETE_OP_AMP_VCO1(NODE_52, /* IC K4, pin 5 */
+ 1, /* ENAB */
+ NODE_50, /* VMOD1 */
&spacwalk_sb_miss_vco)
DISCRETE_CRFILTER(NODE_53,
- NODE_52, /* IN0 */
+ NODE_52, /* IN0 */
SPACWALK_R417, SPACWALK_C453)
/* this filter type probably does not work right. I need to test it. */
- DISCRETE_OP_AMP_FILTER(NODE_54, /* IC K3, pin 5 */
- 1, /* ENAB */
- NODE_53, 0, /* INP0,INP1 */
+ DISCRETE_OP_AMP_FILTER(NODE_54, /* IC K3, pin 5 */
+ 1, /* ENAB */
+ NODE_53, 0, /* INP0,INP1 */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M | DISC_OP_AMP_IS_NORTON, &spacwalk_sb_miss_filter)
- DISCRETE_OP_AMP(SPACWALK_SPRINGBOARD_MISS_SND, /* IC K4, pin 10 */
- 1, /* ENAB */
- NODE_54, NODE_51, /* IN0,IN1 */
+ DISCRETE_OP_AMP(SPACWALK_SPRINGBOARD_MISS_SND, /* IC K4, pin 10 */
+ 1, /* ENAB */
+ NODE_54, NODE_51, /* IN0,IN1 */
&spacwalk_sb_miss_amp)
/************************************************
- * Space ship sound
- ************************************************/
- DISCRETE_OP_AMP_OSCILLATOR(NODE_60, /* voltage on 2.2uF cap near IC JK-2 */
- 1, /* ENAB */
+ * Space ship sound
+ ************************************************/
+ DISCRETE_OP_AMP_OSCILLATOR(NODE_60, /* voltage on 2.2uF cap near IC JK-2 */
+ 1, /* ENAB */
&spacwalk_spaceship_osc)
- DISCRETE_OP_AMP_VCO1(NODE_61, /* IC JK-2, pin 5 */
- SPACWALK_SPACE_SHIP_EN, /* ENAB */
- NODE_60, /* VMOD1*/
+ DISCRETE_OP_AMP_VCO1(NODE_61, /* IC JK-2, pin 5 */
+ SPACWALK_SPACE_SHIP_EN, /* ENAB */
+ NODE_60, /* VMOD1*/
&spacwalk_spaceship_vco)
DISCRETE_RCFILTER(NODE_62,
- NODE_61, /* IN0 */
+ NODE_61, /* IN0 */
RES_K(1), CAP_U(0.15))
DISCRETE_RCFILTER(SPACWALK_SPACE_SHIP_SND,
- NODE_62, /* IN0 */
+ NODE_62, /* IN0 */
RES_K(1) + RES_K(10), CAP_U(0.015))
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
DISCRETE_MIXER6(NODE_90,
- 1, /* ENAB */
+ 1, /* ENAB */
SPACWALK_SPRINGBOARD_HIT1_SND,
SPACWALK_SPRINGBOARD_HIT2_SND,
SPACWALK_SPACE_SHIP_SND,
@@ -2337,7 +2337,7 @@ WRITE8_MEMBER(mw8080bw_state::spacwalk_audio_2_w)
*
*************************************/
- /* Discrete Sound Input Nodes */
+ /* Discrete Sound Input Nodes */
#define SHUFFLE_ROLLING_1_EN NODE_01
#define SHUFFLE_ROLLING_2_EN NODE_02
#define SHUFFLE_ROLLING_3_EN NODE_03
@@ -2353,99 +2353,99 @@ WRITE8_MEMBER(mw8080bw_state::spacwalk_audio_2_w)
#define SHUFFLE_CLICK_SND NODE_14
/* Parts List - Resistors */
-#define SHUFFLE_R300 RES_K(33)
-#define SHUFFLE_R400 RES_K(200)
-#define SHUFFLE_R401 RES_K(3)
-#define SHUFFLE_R402 RES_K(5.6)
-#define SHUFFLE_R403 RES_K(5.6)
-#define SHUFFLE_R404 RES_M(1)
-#define SHUFFLE_R406 RES_K(300)
-#define SHUFFLE_R407 RES_K(680)
-#define SHUFFLE_R408 RES_K(680)
-#define SHUFFLE_R409 RES_K(680)
-#define SHUFFLE_R410 RES_K(680)
-#define SHUFFLE_R411 RES_K(680)
-#define SHUFFLE_R412 RES_M(2.7)
-#define SHUFFLE_R500 RES_K(300)
-#define SHUFFLE_R503 RES_M(2.7)
-#define SHUFFLE_R504 RES_K(680)
-#define SHUFFLE_R505 RES_K(680)
-#define SHUFFLE_R506 RES_K(100)
-#define SHUFFLE_R507 RES_K(47)
-#define SHUFFLE_R508 RES_K(47)
-#define SHUFFLE_R509 RES_K(100)
-#define SHUFFLE_R511 RES_M(2)
-#define SHUFFLE_R512 RES_M(5.6)
-#define SHUFFLE_R513 RES_K(680)
-#define SHUFFLE_R514 RES_M(1.5)
-#define SHUFFLE_R515 RES_M(1)
-#define SHUFFLE_R516 RES_K(510)
+#define SHUFFLE_R300 RES_K(33)
+#define SHUFFLE_R400 RES_K(200)
+#define SHUFFLE_R401 RES_K(3)
+#define SHUFFLE_R402 RES_K(5.6)
+#define SHUFFLE_R403 RES_K(5.6)
+#define SHUFFLE_R404 RES_M(1)
+#define SHUFFLE_R406 RES_K(300)
+#define SHUFFLE_R407 RES_K(680)
+#define SHUFFLE_R408 RES_K(680)
+#define SHUFFLE_R409 RES_K(680)
+#define SHUFFLE_R410 RES_K(680)
+#define SHUFFLE_R411 RES_K(680)
+#define SHUFFLE_R412 RES_M(2.7)
+#define SHUFFLE_R500 RES_K(300)
+#define SHUFFLE_R503 RES_M(2.7)
+#define SHUFFLE_R504 RES_K(680)
+#define SHUFFLE_R505 RES_K(680)
+#define SHUFFLE_R506 RES_K(100)
+#define SHUFFLE_R507 RES_K(47)
+#define SHUFFLE_R508 RES_K(47)
+#define SHUFFLE_R509 RES_K(100)
+#define SHUFFLE_R511 RES_M(2)
+#define SHUFFLE_R512 RES_M(5.6)
+#define SHUFFLE_R513 RES_K(680)
+#define SHUFFLE_R514 RES_M(1.5)
+#define SHUFFLE_R515 RES_M(1)
+#define SHUFFLE_R516 RES_K(510)
/* Parts List - Capacitors */
-#define SHUFFLE_C300 CAP_U(0.1)
-#define SHUFFLE_C400 CAP_U(0.1)
-#define SHUFFLE_C401 CAP_U(1)
-#define SHUFFLE_C402 CAP_U(1)
-#define SHUFFLE_C403 CAP_U(1)
-#define SHUFFLE_C404 CAP_U(0.1)
-#define SHUFFLE_C405 CAP_U(0.1)
-#define SHUFFLE_C500 CAP_U(0.1)
-#define SHUFFLE_C503 CAP_U(0.0022)
-#define SHUFFLE_C504 CAP_U(0.0022)
-#define SHUFFLE_C505 CAP_U(0.33)
-#define SHUFFLE_C506 CAP_U(1)
-#define SHUFFLE_C507 CAP_U(1)
-#define SHUFFLE_C508 CAP_U(1)
+#define SHUFFLE_C300 CAP_U(0.1)
+#define SHUFFLE_C400 CAP_U(0.1)
+#define SHUFFLE_C401 CAP_U(1)
+#define SHUFFLE_C402 CAP_U(1)
+#define SHUFFLE_C403 CAP_U(1)
+#define SHUFFLE_C404 CAP_U(0.1)
+#define SHUFFLE_C405 CAP_U(0.1)
+#define SHUFFLE_C500 CAP_U(0.1)
+#define SHUFFLE_C503 CAP_U(0.0022)
+#define SHUFFLE_C504 CAP_U(0.0022)
+#define SHUFFLE_C505 CAP_U(0.33)
+#define SHUFFLE_C506 CAP_U(1)
+#define SHUFFLE_C507 CAP_U(1)
+#define SHUFFLE_C508 CAP_U(1)
static const discrete_op_amp_tvca_info shuffle_rolling_tvca =
{
- SHUFFLE_R512, 0, 0, SHUFFLE_R511, /* r1, r2, r3, r4 */
- RES_K(10), 0, SHUFFLE_R516, /* r5, r6, r7 */
- RES_K(10), SHUFFLE_R515, /* r8, r9 */
- RES_K(10), SHUFFLE_R514, /* r10, r11 */
- SHUFFLE_C508, SHUFFLE_C507, SHUFFLE_C506, SHUFFLE_C505, /* c1, c2, c3, c4 */
- 12, 12, 12, 12, /* v1, v2, v3, vP */
- 0, 0, DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, 0, /* f0, f1, f2, f3 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG1, /* f4 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG2 /* f5 */
+ SHUFFLE_R512, 0, 0, SHUFFLE_R511, /* r1, r2, r3, r4 */
+ RES_K(10), 0, SHUFFLE_R516, /* r5, r6, r7 */
+ RES_K(10), SHUFFLE_R515, /* r8, r9 */
+ RES_K(10), SHUFFLE_R514, /* r10, r11 */
+ SHUFFLE_C508, SHUFFLE_C507, SHUFFLE_C506, SHUFFLE_C505, /* c1, c2, c3, c4 */
+ 12, 12, 12, 12, /* v1, v2, v3, vP */
+ 0, 0, DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, 0, /* f0, f1, f2, f3 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG1, /* f4 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG2 /* f5 */
};
static const discrete_op_amp_info shuffle_rolling_amp =
{
DISC_OP_AMP_IS_NORTON,
- SHUFFLE_R513, SHUFFLE_R505, SHUFFLE_R503, SHUFFLE_R504, /* r1, r2, r3, r4 */
- 0, /* c */
- 0, 12, /* vN, vP */
+ SHUFFLE_R513, SHUFFLE_R505, SHUFFLE_R503, SHUFFLE_R504, /* r1, r2, r3, r4 */
+ 0, /* c */
+ 0, 12, /* vN, vP */
};
static const discrete_op_amp_tvca_info shuffle_foul_tvca =
{
- SHUFFLE_R412, SHUFFLE_R411, 0, SHUFFLE_R408, /* r1, r2, r3, r4 */
- RES_K(1), 0, SHUFFLE_R406, /* r5, r6, r7 */
- 0, 0, 0, 0, /* r8, r9, r10, r11 */
- SHUFFLE_C404, 0, 0, 0, /* c1, c2, c3, c4 */
- 5, 0, 0, 12, /* v1, v2, v3, vP */
- 0, 0, DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, 0, 0, 0 /* f0, f1, f2, f3, f4, f5 */
+ SHUFFLE_R412, SHUFFLE_R411, 0, SHUFFLE_R408, /* r1, r2, r3, r4 */
+ RES_K(1), 0, SHUFFLE_R406, /* r5, r6, r7 */
+ 0, 0, 0, 0, /* r8, r9, r10, r11 */
+ SHUFFLE_C404, 0, 0, 0, /* c1, c2, c3, c4 */
+ 5, 0, 0, 12, /* v1, v2, v3, vP */
+ 0, 0, DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, 0, 0, 0 /* f0, f1, f2, f3, f4, f5 */
};
static const discrete_op_amp_tvca_info shuffle_rollover_tvca =
{
- SHUFFLE_R404, SHUFFLE_R410, 0, SHUFFLE_R407, /* r1, r2, r3, r4 */
- RES_K(10), 0, SHUFFLE_R409, /* r5, r6, r7 */
- 0, 0, 0, 0, /* r8, r9, r10, r11 */
- SHUFFLE_C405, 0, 0, 0, /* c1, c2, c3, c4 */
- 12, 0, 0, 12, /* v1, v2, v3, vP */
- 0, 0, DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, 0, 0, 0 /* f0, f1, f2, f3, f4, f5 */
+ SHUFFLE_R404, SHUFFLE_R410, 0, SHUFFLE_R407, /* r1, r2, r3, r4 */
+ RES_K(10), 0, SHUFFLE_R409, /* r5, r6, r7 */
+ 0, 0, 0, 0, /* r8, r9, r10, r11 */
+ SHUFFLE_C405, 0, 0, 0, /* c1, c2, c3, c4 */
+ 12, 0, 0, 12, /* v1, v2, v3, vP */
+ 0, 0, DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, 0, 0, 0 /* f0, f1, f2, f3, f4, f5 */
};
static const discrete_mixer_desc shuffle_mixer =
{
DISC_MIXER_IS_RESISTOR,
{SHUFFLE_R500, SHUFFLE_R400, SHUFFLE_R403 + SHUFFLE_R402 + SHUFFLE_R401, SHUFFLE_R300},
- {0}, /* r_nodes */
+ {0}, /* r_nodes */
{SHUFFLE_C500, SHUFFLE_C400, SHUFFLE_C401, SHUFFLE_C300},
- 0, 0, 0, 0, 0 ,1 /* rI, rF, cF, cAmp, vRef, gain */
+ 0, 0, 0, 0, 0 ,1 /* rI, rF, cF, cAmp, vRef, gain */
};
@@ -2458,61 +2458,61 @@ static DISCRETE_SOUND_START(shuffle)
DISCRETE_INPUTX_LOGIC(SHUFFLE_CLICK_EN, 11.5, 0, 0)
/* Noise clock was breadboarded and measured at 1210Hz */
- DISCRETE_LFSR_NOISE(SHUFFLE_NOISE, /* IC N5, pin 10 */
- 1, 1, /* ENAB, RESET */
- 1210, 12.0, 0, 12.0 / 2, &midway_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
+ DISCRETE_LFSR_NOISE(SHUFFLE_NOISE, /* IC N5, pin 10 */
+ 1, 1, /* ENAB, RESET */
+ 1210, 12.0, 0, 12.0 / 2, &midway_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
/************************************************
- * Shuffle rolling
- ************************************************/
- DISCRETE_OP_AMP_TRIG_VCA(NODE_20, /* IC P3-4, pin 5 */
- SHUFFLE_ROLLING_1_EN, SHUFFLE_ROLLING_2_EN, SHUFFLE_ROLLING_3_EN, /* TRG0,TRG1,TRG2 */
- 0, 0, /*IN0,IN1 */
+ * Shuffle rolling
+ ************************************************/
+ DISCRETE_OP_AMP_TRIG_VCA(NODE_20, /* IC P3-4, pin 5 */
+ SHUFFLE_ROLLING_1_EN, SHUFFLE_ROLLING_2_EN, SHUFFLE_ROLLING_3_EN, /* TRG0,TRG1,TRG2 */
+ 0, 0, /*IN0,IN1 */
&shuffle_rolling_tvca)
- DISCRETE_OP_AMP(NODE_21, /* IC P3-4, pin 4 */
- 1, /* ENAB */
- SHUFFLE_NOISE, NODE_20, /* IN0,IN1 */
+ DISCRETE_OP_AMP(NODE_21, /* IC P3-4, pin 4 */
+ 1, /* ENAB */
+ SHUFFLE_NOISE, NODE_20, /* IN0,IN1 */
&shuffle_rolling_amp)
/* filter not accurate */
DISCRETE_FILTER1(NODE_22, 1, NODE_21, 800, DISC_FILTER_LOWPASS)
DISCRETE_GAIN(SHUFFLE_ROLLING_SND, NODE_22, .2)
/************************************************
- * Foul
- ************************************************/
- DISCRETE_SQUAREWFIX(NODE_30, /* Connected to edge connector V - 120Hz */
- 1, 120, DEFAULT_TTL_V_LOGIC_1, 50, DEFAULT_TTL_V_LOGIC_1 / 2, 0) /* ENAB,FREQ,AMP,DUTY,BIAS,PHASE */
- DISCRETE_OP_AMP_TRIG_VCA(SHUFFLE_FOUL_SND, /* IC M3-4, pin 5 */
- SHUFFLE_FOUL_EN, 0, 0, /* TRG0,TRG1,TRG2 */
- NODE_30, 0, /*IN0,IN1 */
+ * Foul
+ ************************************************/
+ DISCRETE_SQUAREWFIX(NODE_30, /* Connected to edge connector V - 120Hz */
+ 1, 120, DEFAULT_TTL_V_LOGIC_1, 50, DEFAULT_TTL_V_LOGIC_1 / 2, 0) /* ENAB,FREQ,AMP,DUTY,BIAS,PHASE */
+ DISCRETE_OP_AMP_TRIG_VCA(SHUFFLE_FOUL_SND, /* IC M3-4, pin 5 */
+ SHUFFLE_FOUL_EN, 0, 0, /* TRG0,TRG1,TRG2 */
+ NODE_30, 0, /*IN0,IN1 */
&shuffle_foul_tvca)
/************************************************
- * Shuffle rollover
- ************************************************/
- DISCRETE_OP_AMP_TRIG_VCA(NODE_40, /* IC M3-4, pin 4 */
- SHUFFLE_ROLLOVER_EN, 0, 0, /* TRG0,TRG1,TRG2 */
- SHUFFLE_NOISE, 0, /*IN0,IN1 */
+ * Shuffle rollover
+ ************************************************/
+ DISCRETE_OP_AMP_TRIG_VCA(NODE_40, /* IC M3-4, pin 4 */
+ SHUFFLE_ROLLOVER_EN, 0, 0, /* TRG0,TRG1,TRG2 */
+ SHUFFLE_NOISE, 0, /*IN0,IN1 */
&shuffle_rollover_tvca)
DISCRETE_RCFILTER(NODE_41,
- NODE_40, /* IN0 */
+ NODE_40, /* IN0 */
SHUFFLE_R403, SHUFFLE_C403)
DISCRETE_RCFILTER(SHUFFLE_ROLLOVER_SND,
- NODE_41, /* IN0 */
+ NODE_41, /* IN0 */
SHUFFLE_R403 + SHUFFLE_R402, SHUFFLE_C402)
/************************************************
- * Click
- ************************************************/
+ * Click
+ ************************************************/
/* filter not accurate */
DISCRETE_FILTER1(NODE_50, 1, SHUFFLE_CLICK_EN, 300, DISC_FILTER_LOWPASS)
DISCRETE_GAIN(SHUFFLE_CLICK_SND, NODE_50, .3)
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
DISCRETE_MIXER4(NODE_90,
- 1, /* ENAB */
+ 1, /* ENAB */
SHUFFLE_ROLLING_SND,
SHUFFLE_FOUL_SND,
SHUFFLE_ROLLOVER_SND,
@@ -2618,7 +2618,7 @@ static const discrete_mixer_desc dogpatch_l_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(12) + RES_K(68) + RES_K(33),
- RES_K(33) },
+ RES_K(33) },
{ 0 },
{ 0 },
0,
@@ -2626,7 +2626,7 @@ static const discrete_mixer_desc dogpatch_l_mixer =
0,
CAP_U(0.1),
0,
- 1 /* final gain */
+ 1 /* final gain */
};
@@ -2634,8 +2634,8 @@ static const discrete_mixer_desc dogpatch_r_mixer =
{
DISC_MIXER_IS_OP_AMP,
{ RES_K(12) + RES_K(68) + RES_K(33),
- RES_K(33),
- RES_K(510) + RES_K(33) },
+ RES_K(33),
+ RES_K(510) + RES_K(33) },
{ 0 },
{ 0 },
0,
@@ -2643,30 +2643,30 @@ static const discrete_mixer_desc dogpatch_r_mixer =
0,
CAP_U(0.1),
0,
- 1 /* final gain */
+ 1 /* final gain */
};
static DISCRETE_SOUND_START(dogpatch)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(DOGPATCH_GAME_ON_EN)
DISCRETE_INPUT_LOGIC(DOGPATCH_LEFT_SHOT_EN)
DISCRETE_INPUT_LOGIC(DOGPATCH_RIGHT_SHOT_EN)
DISCRETE_INPUT_LOGIC(DOGPATCH_HIT_EN)
/************************************************
- * Tone generator
- ************************************************/
+ * Tone generator
+ ************************************************/
MIDWAY_TONE_GENERATOR(midway_music_tvca_info)
/* Noise clock was breadboarded and measured at 7700Hz */
DISCRETE_LFSR_NOISE(DOGPATCH_NOISE, 1, 1, 7700, 12.0, 0, 12.0/2, &midway_lfsr)
/************************************************
- * Shot sounds
- ************************************************/
+ * Shot sounds
+ ************************************************/
DISCRETE_OP_AMP_TRIG_VCA(NODE_20, DOGPATCH_LEFT_SHOT_EN, 0, 0, DOGPATCH_NOISE, 0, &dogpatch_shot_tvca_info)
DISCRETE_RCFILTER(NODE_21, NODE_20, RES_K(12), CAP_U(.01))
DISCRETE_RCFILTER(DOGPATCH_L_SHOT_SND, NODE_21, RES_K(12) + RES_K(68), CAP_U(.0022))
@@ -2676,19 +2676,19 @@ static DISCRETE_SOUND_START(dogpatch)
DISCRETE_RCFILTER(DOGPATCH_R_SHOT_SND, NODE_31, RES_K(12) + RES_K(68), CAP_U(.0033))
/************************************************
- * Target hit sounds
- ************************************************/
+ * Target hit sounds
+ ************************************************/
DISCRETE_CONSTANT(DOGPATCH_L_HIT_SND, 0)
DISCRETE_CONSTANT(DOGPATCH_R_HIT_SND, 0)
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
/* There is a 1uF cap on the input to the amp that I was too lazy to simulate.
- * It is just a DC blocking cap needed by the Norton amp. Doing the extra
- * work to simulate it is not going to make a difference to the waveform
- * or to how it sounds. Also I use a regular amp in place of the Norton
- * for the same reasons. Ease of coding/simulation. */
+ * It is just a DC blocking cap needed by the Norton amp. Doing the extra
+ * work to simulate it is not going to make a difference to the waveform
+ * or to how it sounds. Also I use a regular amp in place of the Norton
+ * for the same reasons. Ease of coding/simulation. */
DISCRETE_MIXER2(NODE_91, DOGPATCH_GAME_ON_EN, DOGPATCH_L_SHOT_SND, DOGPATCH_L_HIT_SND, &dogpatch_l_mixer)
@@ -2739,29 +2739,29 @@ WRITE8_MEMBER(mw8080bw_state::dogpatch_audio_w)
static const sn76477_interface spcenctr_sn76477_interface =
{
- 0, /* 4 noise_res (N/C) */
- 0, /* 5 filter_res (N/C) */
- 0, /* 6 filter_cap (N/C) */
- 0, /* 7 decay_res (N/C) */
- 0, /* 8 attack_decay_cap (N/C) */
- RES_K(100), /* 10 attack_res */
- RES_K(56), /* 11 amplitude_res */
- RES_K(10), /* 12 feedback_res */
- 0, /* 16 vco_voltage (N/C) */
- CAP_U(0.047), /* 17 vco_cap */
- RES_K(56), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K(150), /* 20 slf_res */
- CAP_U(1.0), /* 21 slf_cap */
- 0, /* 23 oneshot_cap (N/C) */
- 0, /* 24 oneshot_res (N/C) */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ 0, /* 4 noise_res (N/C) */
+ 0, /* 5 filter_res (N/C) */
+ 0, /* 6 filter_cap (N/C) */
+ 0, /* 7 decay_res (N/C) */
+ 0, /* 8 attack_decay_cap (N/C) */
+ RES_K(100), /* 10 attack_res */
+ RES_K(56), /* 11 amplitude_res */
+ RES_K(10), /* 12 feedback_res */
+ 0, /* 16 vco_voltage (N/C) */
+ CAP_U(0.047), /* 17 vco_cap */
+ RES_K(56), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K(150), /* 20 slf_res */
+ CAP_U(1.0), /* 21 slf_cap */
+ 0, /* 23 oneshot_cap (N/C) */
+ 0, /* 24 oneshot_res (N/C) */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
};
@@ -2788,245 +2788,245 @@ static const sn76477_interface spcenctr_sn76477_interface =
static const discrete_op_amp_info spcenctr_enemy_ship_shot_op_amp_E1 =
{
DISC_OP_AMP_IS_NORTON,
- 0, /* no r1 */
- RES_K(510), /* R100 */
- RES_M(2.2), /* R101 */
- RES_M(2.2), /* R102 */
- CAP_U(0.1), /* C100 */
- 0, /* vN */
- 12 /* vP */
+ 0, /* no r1 */
+ RES_K(510), /* R100 */
+ RES_M(2.2), /* R101 */
+ RES_M(2.2), /* R102 */
+ CAP_U(0.1), /* C100 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_osc_info spcenctr_enemy_ship_shot_op_amp_osc =
{
DISC_OP_AMP_OSCILLATOR_VCO_3 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW,
- RES_K(560), /* R103 */
- RES_K(7.5), /* R118 */
- RES_K(22), /* R104 */
- RES_K(47), /* R106 */
- RES_K(100), /* R105 */
- 0, /* no r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_U(0.0022), /* C101 */
- 12, /* vP */
+ RES_K(560), /* R103 */
+ RES_K(7.5), /* R118 */
+ RES_K(22), /* R104 */
+ RES_K(47), /* R106 */
+ RES_K(100), /* R105 */
+ 0, /* no r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_U(0.0022), /* C101 */
+ 12, /* vP */
};
static const discrete_op_amp_info spcenctr_enemy_ship_shot_op_amp_D1 =
{
DISC_OP_AMP_IS_NORTON,
- RES_K(100), /* R107 */
- RES_K(100), /* R109 */
- RES_M(2.7), /* R108 */
- RES_K(100), /* R110 */
- 0, /* no c */
- 0, /* vN */
- 12 /* vP */
+ RES_K(100), /* R107 */
+ RES_K(100), /* R109 */
+ RES_M(2.7), /* R108 */
+ RES_K(100), /* R110 */
+ 0, /* no c */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_filt_info spcenctr_enemy_ship_shot_filt =
{
- RES_K(100), /* R112 */
- RES_K(10), /* R113 */
- RES_M(4.3), /* r3 */
- 0, /* no r4 */
- RES_M(2.2), /* R114 */
- CAP_U(0.001), /* c1 */
- CAP_U(0.001), /* c2 */
- 0, /* no c3 */
- 0, /* vRef */
- 12, /* vP */
- 0 /* vN */
+ RES_K(100), /* R112 */
+ RES_K(10), /* R113 */
+ RES_M(4.3), /* r3 */
+ 0, /* no r4 */
+ RES_M(2.2), /* R114 */
+ CAP_U(0.001), /* c1 */
+ CAP_U(0.001), /* c2 */
+ 0, /* no c3 */
+ 0, /* vRef */
+ 12, /* vP */
+ 0 /* vN */
};
static const discrete_op_amp_1sht_info spcenctr_player_shot_1sht =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- RES_M(4.7), /* R500 */
- RES_K(100), /* R502 */
- RES_M(1), /* R501 */
- RES_M(1), /* R503 */
- RES_M(2.2), /* R504 */
- CAP_U(1), /* C500 */
- CAP_P(470), /* C501 */
- 0, /* vN */
- 12 /* vP */
+ RES_M(4.7), /* R500 */
+ RES_K(100), /* R502 */
+ RES_M(1), /* R501 */
+ RES_M(1), /* R503 */
+ RES_M(2.2), /* R504 */
+ CAP_U(1), /* C500 */
+ CAP_P(470), /* C501 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_info spcenctr_player_shot_op_amp_E1 =
{
DISC_OP_AMP_IS_NORTON,
- 0, /* no r1 */
- RES_K(10), /* R505 */
- RES_M(1.5), /* R506 */
- 0, /* no r4 */
- CAP_U(0.22), /* C502 */
- 0, /* vN */
- 12 /* vP */
+ 0, /* no r1 */
+ RES_K(10), /* R505 */
+ RES_M(1.5), /* R506 */
+ 0, /* no r4 */
+ CAP_U(0.22), /* C502 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_osc_info spcenctr_player_shot_op_amp_osc =
{
DISC_OP_AMP_OSCILLATOR_VCO_3 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW,
- 1.0 / (1.0 / RES_M(1) + 1.0 / RES_K(330)) + RES_M(1.5), /* R507||R509 + R508 */
- RES_M(1), /* R513 */
- RES_K(560), /* R512 */
- RES_M(2.7), /* R516 */
- RES_M(1), /* R515 */
- RES_M(4.7), /* R510 */
- RES_M(3.3), /* R511 */
- 0, /* no r8 */
- CAP_P(330), /* C504 */
- 12, /* vP */
+ 1.0 / (1.0 / RES_M(1) + 1.0 / RES_K(330)) + RES_M(1.5), /* R507||R509 + R508 */
+ RES_M(1), /* R513 */
+ RES_K(560), /* R512 */
+ RES_M(2.7), /* R516 */
+ RES_M(1), /* R515 */
+ RES_M(4.7), /* R510 */
+ RES_M(3.3), /* R511 */
+ 0, /* no r8 */
+ CAP_P(330), /* C504 */
+ 12, /* vP */
};
static const discrete_op_amp_info spcenctr_player_shot_op_amp_C1 =
{
DISC_OP_AMP_IS_NORTON,
- RES_K(560), /* R517 */
- RES_K(470), /* R514 */
- RES_M(2.7), /* R518 */
- RES_K(560), /* R524 */
- 0, /* no c */
- 0, /* vN */
- 12 /* vP */
+ RES_K(560), /* R517 */
+ RES_K(470), /* R514 */
+ RES_M(2.7), /* R518 */
+ RES_K(560), /* R524 */
+ 0, /* no c */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_tvca_info spcenctr_player_shot_tvca =
{
- RES_M(2.7), /* R522 */
- RES_K(560), /* R521 */
- 0, /* no r3 */
- RES_K(560), /* R560 */
- RES_K(1), /* R42 */
- 0, /* no r6 */
- RES_K(560), /* R523 */
- 0, /* no r8 */
- 0, /* no r9 */
- 0, /* no r10 */
- 0, /* no r11 */
- CAP_U(1), /* C506 */
- 0, /* no c2 */
- 0, 0, /* no c3, c4 */
- 12, /* v1 */
- 0, /* no v2 */
- 0, /* no v3 */
- 12, /* vP */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
+ RES_M(2.7), /* R522 */
+ RES_K(560), /* R521 */
+ 0, /* no r3 */
+ RES_K(560), /* R560 */
+ RES_K(1), /* R42 */
+ 0, /* no r6 */
+ RES_K(560), /* R523 */
+ 0, /* no r8 */
+ 0, /* no r9 */
+ 0, /* no r10 */
+ 0, /* no r11 */
+ CAP_U(1), /* C506 */
+ 0, /* no c2 */
+ 0, 0, /* no c3, c4 */
+ 12, /* v1 */
+ 0, /* no v2 */
+ 0, /* no v3 */
+ 12, /* vP */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
};
static const discrete_op_amp_tvca_info spcenctr_crash_tvca =
{
- RES_M(2.7), /* R302 */
- RES_K(470), /* R300 */
- 0, /* no r3 */
- RES_K(470), /* R303 */
- RES_K(1), /* R56 */
- 0, /* no r6 */
- RES_K(470), /* R301 */
- 0, /* no r8 */
- 0, /* no r9 */
- 0, /* no r10 */
- 0, /* no r11 */
- CAP_U(2.2), /* C304 */
- 0, /* no c2 */
- 0, 0, /* no c3, c4 */
- 5, /* v1 */
- 0, /* no v2 */
- 0, /* no v3 */
- 12, /* vP */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
+ RES_M(2.7), /* R302 */
+ RES_K(470), /* R300 */
+ 0, /* no r3 */
+ RES_K(470), /* R303 */
+ RES_K(1), /* R56 */
+ 0, /* no r6 */
+ RES_K(470), /* R301 */
+ 0, /* no r8 */
+ 0, /* no r9 */
+ 0, /* no r10 */
+ 0, /* no r11 */
+ CAP_U(2.2), /* C304 */
+ 0, /* no c2 */
+ 0, 0, /* no c3, c4 */
+ 5, /* v1 */
+ 0, /* no v2 */
+ 0, /* no v3 */
+ 12, /* vP */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
};
static const discrete_op_amp_tvca_info spcenctr_explosion_tvca =
{
- RES_M(2.7), /* R402 */
- RES_K(680), /* R400 */
- 0, /* no r3 */
- RES_K(680), /* R403 */
- RES_K(1), /* R41 */
- 0, /* no r6 */
- RES_K(680), /* R401 */
- 0, /* no r8 */
- 0, /* no r9 */
- 0, /* no r10 */
- 0, /* no r11 */
- CAP_U(2.2), /* C400 */
- 0, /* no c2 */
- 0, 0, /* no c3, c4 */
- 12, /* v1 */
- 0, /* no v2 */
- 0, /* no v3 */
- 12, /* vP */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
+ RES_M(2.7), /* R402 */
+ RES_K(680), /* R400 */
+ 0, /* no r3 */
+ RES_K(680), /* R403 */
+ RES_K(1), /* R41 */
+ 0, /* no r6 */
+ RES_K(680), /* R401 */
+ 0, /* no r8 */
+ 0, /* no r9 */
+ 0, /* no r10 */
+ 0, /* no r11 */
+ CAP_U(2.2), /* C400 */
+ 0, /* no c2 */
+ 0, 0, /* no c3, c4 */
+ 12, /* v1 */
+ 0, /* no v2 */
+ 0, /* no v3 */
+ 12, /* vP */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
};
static const discrete_555_desc spcenctr_555_bonus =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5, /* B+ voltage of 555 */
+ 5, /* B+ voltage of 555 */
DEFAULT_555_VALUES
};
static const discrete_mixer_desc spcenctr_mixer =
{
- DISC_MIXER_IS_RESISTOR, /* type */
- { RES_K(15), /* R117 */
- RES_K(15), /* R526 */
- RES_K(22), /* R211 */
- RES_K(3.6), /* R309 */
- RES_K(1.8) + RES_K(3.6) + RES_K(4.7), /* R405 + R406 + R407 */
- RES_K(27), /* R715 */
- RES_K(27)}, /* R51 */
- {0}, /* no rNode{} */
+ DISC_MIXER_IS_RESISTOR, /* type */
+ { RES_K(15), /* R117 */
+ RES_K(15), /* R526 */
+ RES_K(22), /* R211 */
+ RES_K(3.6), /* R309 */
+ RES_K(1.8) + RES_K(3.6) + RES_K(4.7), /* R405 + R406 + R407 */
+ RES_K(27), /* R715 */
+ RES_K(27)}, /* R51 */
+ {0}, /* no rNode{} */
{ 0,
- CAP_U(0.001), /* C505 */
- CAP_U(0.1), /* C202 */
- CAP_U(1), /* C303 */
- 0,
- 0,
- CAP_U(10)}, /* C16 */
- 0, /* no rI */
- 0, /* no rF */
- 0, /* no cF */
- CAP_U(1), /* C900 */
- 0, /* vRef = ground */
- 1 /* gain */
+ CAP_U(0.001), /* C505 */
+ CAP_U(0.1), /* C202 */
+ CAP_U(1), /* C303 */
+ 0,
+ 0,
+ CAP_U(10)}, /* C16 */
+ 0, /* no rI */
+ 0, /* no rF */
+ 0, /* no cF */
+ CAP_U(1), /* C900 */
+ 0, /* vRef = ground */
+ 1 /* gain */
};
static DISCRETE_SOUND_START(spcenctr)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUTX_LOGIC(SPCENCTR_ENEMY_SHIP_SHOT_EN, 12, 0, 0)
DISCRETE_INPUTX_LOGIC(SPCENCTR_PLAYER_SHOT_EN, 12, 0, 0)
DISCRETE_INPUT_LOGIC (SPCENCTR_SCREECH_EN)
@@ -3037,198 +3037,198 @@ static DISCRETE_SOUND_START(spcenctr)
/************************************************
- * Noise Generator
- ************************************************/
+ * Noise Generator
+ ************************************************/
/* Noise clock was breadboarded and measured at 7515 */
- DISCRETE_LFSR_NOISE(SPCENCTR_NOISE, /* IC A0, pin 10 */
- 1, /* ENAB */
- 1, /* no RESET */
- 7515, /* CLK in Hz */
- 12, /* p-p AMPL */
- 0, /* no FEED input */
- 12.0/2, /* dc BIAS */
+ DISCRETE_LFSR_NOISE(SPCENCTR_NOISE, /* IC A0, pin 10 */
+ 1, /* ENAB */
+ 1, /* no RESET */
+ 7515, /* CLK in Hz */
+ 12, /* p-p AMPL */
+ 0, /* no FEED input */
+ 12.0/2, /* dc BIAS */
&midway_lfsr)
/************************************************
- * Enemy Ship Shot
- ************************************************/
- DISCRETE_OP_AMP(NODE_20, /* IC E1, pin 10 */
- 1, /* ENAB */
- 0, /* no IN0 */
- SPCENCTR_ENEMY_SHIP_SHOT_EN, /* IN1 */
+ * Enemy Ship Shot
+ ************************************************/
+ DISCRETE_OP_AMP(NODE_20, /* IC E1, pin 10 */
+ 1, /* ENAB */
+ 0, /* no IN0 */
+ SPCENCTR_ENEMY_SHIP_SHOT_EN, /* IN1 */
&spcenctr_enemy_ship_shot_op_amp_E1)
- DISCRETE_OP_AMP_VCO1(NODE_21, /* IC D1, pin 5 */
- 1, /* ENAB */
- NODE_20, /* VMOD1 */
+ DISCRETE_OP_AMP_VCO1(NODE_21, /* IC D1, pin 5 */
+ 1, /* ENAB */
+ NODE_20, /* VMOD1 */
&spcenctr_enemy_ship_shot_op_amp_osc)
- DISCRETE_OP_AMP(NODE_22, /* IC D1, pin 9 */
- 1, /* ENAB */
- NODE_21, /* IN0 */
- NODE_20, /* IN1 */
+ DISCRETE_OP_AMP(NODE_22, /* IC D1, pin 9 */
+ 1, /* ENAB */
+ NODE_21, /* IN0 */
+ NODE_20, /* IN1 */
&spcenctr_enemy_ship_shot_op_amp_D1)
- DISCRETE_OP_AMP_FILTER(NODE_23, /* IC D1, pin 10 */
- 1, /* ENAB */
- NODE_22, /* INP0 */
- 0, /* no INP1 */
+ DISCRETE_OP_AMP_FILTER(NODE_23, /* IC D1, pin 10 */
+ 1, /* ENAB */
+ NODE_22, /* INP0 */
+ 0, /* no INP1 */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M | DISC_OP_AMP_IS_NORTON,
&spcenctr_enemy_ship_shot_filt)
DISCRETE_CRFILTER(SPCENCTR_ENEMY_SHIP_SHOT_SND,
- NODE_23, /* IN0 */
- RES_K(1.8), /* R116 */
- CAP_U(0.1) ) /* C104 */
+ NODE_23, /* IN0 */
+ RES_K(1.8), /* R116 */
+ CAP_U(0.1) ) /* C104 */
/************************************************
- * Player Shot
- ************************************************/
- DISCRETE_OP_AMP_ONESHOT(NODE_30, /* IC E1, pin 4 */
- SPCENCTR_PLAYER_SHOT_EN, /* TRIG */
- &spcenctr_player_shot_1sht) /* breadboarded and scoped at 325mS */
- DISCRETE_OP_AMP(NODE_31, /* IC E1, pin 5 */
- 1, /* ENAB */
- 0, /* no IN0 */
- NODE_30, /* IN1 */
+ * Player Shot
+ ************************************************/
+ DISCRETE_OP_AMP_ONESHOT(NODE_30, /* IC E1, pin 4 */
+ SPCENCTR_PLAYER_SHOT_EN, /* TRIG */
+ &spcenctr_player_shot_1sht) /* breadboarded and scoped at 325mS */
+ DISCRETE_OP_AMP(NODE_31, /* IC E1, pin 5 */
+ 1, /* ENAB */
+ 0, /* no IN0 */
+ NODE_30, /* IN1 */
&spcenctr_player_shot_op_amp_E1)
/* next 2 modules simulate the D502 voltage drop */
DISCRETE_ADDER2(NODE_32,
- 1, /* ENAB */
- NODE_31, /* IN0 */
- -0.5) /* IN1 */
+ 1, /* ENAB */
+ NODE_31, /* IN0 */
+ -0.5) /* IN1 */
DISCRETE_CLAMP(NODE_33,
- NODE_32, /* IN0 */
- 0, /* MIN */
- 12) /* MAX */
+ NODE_32, /* IN0 */
+ 0, /* MIN */
+ 12) /* MAX */
DISCRETE_CRFILTER(NODE_34,
- SPCENCTR_NOISE, /* IN0 */
- RES_M(1) + RES_K(330), /* R507, R509 */
- CAP_U(0.1) ) /* C503 */
+ SPCENCTR_NOISE, /* IN0 */
+ RES_M(1) + RES_K(330), /* R507, R509 */
+ CAP_U(0.1) ) /* C503 */
DISCRETE_GAIN(NODE_35,
- NODE_34, /* IN0 */
- RES_K(330)/(RES_M(1) + RES_K(330))) /* GAIN - R507 : R509 */
- DISCRETE_OP_AMP_VCO2(NODE_36, /* IC C1, pin 4 */
- 1, /* ENAB */
- NODE_35, /* VMOD1 */
- NODE_33, /* VMOD2 */
+ NODE_34, /* IN0 */
+ RES_K(330)/(RES_M(1) + RES_K(330))) /* GAIN - R507 : R509 */
+ DISCRETE_OP_AMP_VCO2(NODE_36, /* IC C1, pin 4 */
+ 1, /* ENAB */
+ NODE_35, /* VMOD1 */
+ NODE_33, /* VMOD2 */
&spcenctr_player_shot_op_amp_osc)
- DISCRETE_OP_AMP(NODE_37, /* IC C1, pin 9 */
- 1, /* ENAB */
- NODE_36, /* IN0 */
- NODE_33, /* IN1 */
+ DISCRETE_OP_AMP(NODE_37, /* IC C1, pin 9 */
+ 1, /* ENAB */
+ NODE_36, /* IN0 */
+ NODE_33, /* IN1 */
&spcenctr_player_shot_op_amp_C1)
- DISCRETE_OP_AMP_TRIG_VCA(SPCENCTR_PLAYER_SHOT_SND, /* IC C1, pin 10 */
- SPCENCTR_PLAYER_SHOT_EN, /* TRG0 */
- 0, /* no TRG1 */
- 0, /* no TRG2 */
- NODE_37, /* IN0 */
- 0, /* no IN1 */
+ DISCRETE_OP_AMP_TRIG_VCA(SPCENCTR_PLAYER_SHOT_SND, /* IC C1, pin 10 */
+ SPCENCTR_PLAYER_SHOT_EN, /* TRG0 */
+ 0, /* no TRG1 */
+ 0, /* no TRG2 */
+ NODE_37, /* IN0 */
+ 0, /* no IN1 */
&spcenctr_player_shot_tvca)
/************************************************
- *Screech - unemulated
- ************************************************/
+ *Screech - unemulated
+ ************************************************/
DISCRETE_CONSTANT(SPCENCTR_SCREECH_SND, 0)
/************************************************
- * Crash
- ************************************************/
- DISCRETE_OP_AMP_TRIG_VCA(NODE_60, /* IC C2, pin 4 */
- SPCENCTR_CRASH_EN, /* TRG0 */
- 0, /* no TRG1 */
- 0, /* no TRG2 */
- SPCENCTR_NOISE, /* IN0 */
- 0, /* no IN1 */
+ * Crash
+ ************************************************/
+ DISCRETE_OP_AMP_TRIG_VCA(NODE_60, /* IC C2, pin 4 */
+ SPCENCTR_CRASH_EN, /* TRG0 */
+ 0, /* no TRG1 */
+ 0, /* no TRG2 */
+ SPCENCTR_NOISE, /* IN0 */
+ 0, /* no IN1 */
&spcenctr_crash_tvca)
/* The next 5 modules emulate the filter. */
/* The DC level was breadboarded and the frequency response was SPICEd */
- DISCRETE_ADDER2(NODE_61, /* center on filter DC level */
- 1, /* ENAB */
- NODE_60, /* IN0 */
- -6.8) /* IN1 */
+ DISCRETE_ADDER2(NODE_61, /* center on filter DC level */
+ 1, /* ENAB */
+ NODE_60, /* IN0 */
+ -6.8) /* IN1 */
DISCRETE_FILTER2(NODE_62,
- 1, /* ENAB */
- NODE_61, /* INP0 */
- 130, /* FREQ */
- 1.0 / 8, /* DAMP */
+ 1, /* ENAB */
+ NODE_61, /* INP0 */
+ 130, /* FREQ */
+ 1.0 / 8, /* DAMP */
DISC_FILTER_BANDPASS)
DISCRETE_GAIN(NODE_63,
- NODE_62, /* IN0 */
- 6) /* GAIN */
- DISCRETE_ADDER2(NODE_64, /* center on filter DC level */
- 1, /* ENAB */
- NODE_63, /* IN0 */
- 6.8) /* IN1 */
- DISCRETE_CLAMP(SPCENCTR_CRASH_SND, /* IC C2, pin 5 */
- NODE_64, /* IN0 */
- 0, /* MIN */
- 12.0 - OP_AMP_NORTON_VBE) /* MAX */
+ NODE_62, /* IN0 */
+ 6) /* GAIN */
+ DISCRETE_ADDER2(NODE_64, /* center on filter DC level */
+ 1, /* ENAB */
+ NODE_63, /* IN0 */
+ 6.8) /* IN1 */
+ DISCRETE_CLAMP(SPCENCTR_CRASH_SND, /* IC C2, pin 5 */
+ NODE_64, /* IN0 */
+ 0, /* MIN */
+ 12.0 - OP_AMP_NORTON_VBE) /* MAX */
/************************************************
- * Explosion
- ************************************************/
- DISCRETE_OP_AMP_TRIG_VCA(NODE_70, /* IC D2, pin 10 */
- SPCENCTR_EXPLOSION_EN, /* TRG0 */
- 0, /* no TRG1 */
- 0, /* no TRG2 */
- SPCENCTR_NOISE, /* IN0 */
- 0, /* no IN1 */
+ * Explosion
+ ************************************************/
+ DISCRETE_OP_AMP_TRIG_VCA(NODE_70, /* IC D2, pin 10 */
+ SPCENCTR_EXPLOSION_EN, /* TRG0 */
+ 0, /* no TRG1 */
+ 0, /* no TRG2 */
+ SPCENCTR_NOISE, /* IN0 */
+ 0, /* no IN1 */
&spcenctr_explosion_tvca)
DISCRETE_RCFILTER(NODE_71,
- NODE_70, /* IN0 */
- RES_K(1.8), /* R405 */
- CAP_U(0.22) ) /* C401 */
+ NODE_70, /* IN0 */
+ RES_K(1.8), /* R405 */
+ CAP_U(0.22) ) /* C401 */
DISCRETE_RCFILTER(SPCENCTR_EXPLOSION_SND,
- NODE_71, /* IN0 */
- RES_K(1.8) + RES_K(3.6), /* R405 + R406 */
- CAP_U(0.22) ) /* C402 */
+ NODE_71, /* IN0 */
+ RES_K(1.8) + RES_K(3.6), /* R405 + R406 */
+ CAP_U(0.22) ) /* C402 */
/************************************************
- *Bonus
- ************************************************/
- DISCRETE_555_ASTABLE(NODE_80, /* pin 5 */
+ *Bonus
+ ************************************************/
+ DISCRETE_555_ASTABLE(NODE_80, /* pin 5 */
/* the pin 4 reset is not connected in schematic, but should be */
- SPCENCTR_BONUS_EN, /* RESET */
- RES_K(1), /* R710 */
- RES_K(27), /* R711 */
- CAP_U(0.047), /* C710 */
+ SPCENCTR_BONUS_EN, /* RESET */
+ RES_K(1), /* R710 */
+ RES_K(27), /* R711 */
+ CAP_U(0.047), /* C710 */
&spcenctr_555_bonus)
- DISCRETE_555_ASTABLE(NODE_81, /* pin 9 */
- SPCENCTR_BONUS_EN, /* RESET pin 10 */
- RES_K(100), /* R713 */
- RES_K(47), /* R714 */
- CAP_U(1), /* C713 */
+ DISCRETE_555_ASTABLE(NODE_81, /* pin 9 */
+ SPCENCTR_BONUS_EN, /* RESET pin 10 */
+ RES_K(100), /* R713 */
+ RES_K(47), /* R714 */
+ CAP_U(1), /* C713 */
&spcenctr_555_bonus)
- DISCRETE_LOGIC_AND3(NODE_82, /* IC C-D, pin 6 */
- NODE_80, /* INP0 */
- NODE_81, /* INP1 */
- SPCENCTR_BONUS_EN) /* INP2 */
- DISCRETE_GAIN(SPCENCTR_BONUS_SND, /* adjust from logic to TTL voltage level */
- NODE_82, /* IN0 */
- DEFAULT_TTL_V_LOGIC_1) /* GAIN */
+ DISCRETE_LOGIC_AND3(NODE_82, /* IC C-D, pin 6 */
+ NODE_80, /* INP0 */
+ NODE_81, /* INP1 */
+ SPCENCTR_BONUS_EN) /* INP2 */
+ DISCRETE_GAIN(SPCENCTR_BONUS_SND, /* adjust from logic to TTL voltage level */
+ NODE_82, /* IN0 */
+ DEFAULT_TTL_V_LOGIC_1) /* GAIN */
/************************************************
- *Wind - unemulated
- ************************************************/
+ *Wind - unemulated
+ ************************************************/
DISCRETE_CONSTANT(SPCENCTR_WIND_SND, 0)
/************************************************
- * Final mix
- ************************************************/
+ * Final mix
+ ************************************************/
DISCRETE_MIXER7(NODE_91,
- 1, /* ENAB */
- SPCENCTR_ENEMY_SHIP_SHOT_SND, /* IN0 */
- SPCENCTR_PLAYER_SHOT_SND, /* IN1 */
- SPCENCTR_SCREECH_SND, /* IN2 */
- SPCENCTR_CRASH_SND, /* IN3 */
- SPCENCTR_EXPLOSION_SND, /* IN4 */
- SPCENCTR_BONUS_SND, /* IN5 */
- SPCENCTR_WIND_SND, /* IN6 */
+ 1, /* ENAB */
+ SPCENCTR_ENEMY_SHIP_SHOT_SND, /* IN0 */
+ SPCENCTR_PLAYER_SHOT_SND, /* IN1 */
+ SPCENCTR_SCREECH_SND, /* IN2 */
+ SPCENCTR_CRASH_SND, /* IN3 */
+ SPCENCTR_EXPLOSION_SND, /* IN4 */
+ SPCENCTR_BONUS_SND, /* IN5 */
+ SPCENCTR_WIND_SND, /* IN6 */
&spcenctr_mixer)
DISCRETE_OUTPUT(NODE_91, 20000)
@@ -3254,7 +3254,7 @@ WRITE8_MEMBER(mw8080bw_state::spcenctr_audio_1_w)
machine().sound().system_enable((data >> 0) & 0x01);
/* D1 is marked as 'OPTIONAL SWITCH VIDEO FOR COCKTAIL',
- but it is never set by the software */
+ but it is never set by the software */
discrete_sound_w(m_discrete, space, SPCENCTR_CRASH_EN, (data >> 2) & 0x01);
@@ -3290,7 +3290,7 @@ WRITE8_MEMBER(mw8080bw_state::spcenctr_audio_3_w)
discrete_sound_w(m_discrete, space, SPCENCTR_BONUS_EN, (data >> 4) & 0x01);
- sn76477_enable_w(m_sn, (data >> 5) & 0x01); /* saucer sound */
+ sn76477_enable_w(m_sn, (data >> 5) & 0x01); /* saucer sound */
/* D6 and D7 are not connected */
}
@@ -3306,15 +3306,15 @@ WRITE8_MEMBER(mw8080bw_state::spcenctr_audio_3_w)
static const char *const phantom2_sample_names[] =
{
"*phantom2",
- "1", /* shot */
- "2", /* explosion */
+ "1", /* shot */
+ "2", /* explosion */
0
};
static const samples_interface phantom2_samples_interface =
{
- 2, /* 2 channels */
+ 2, /* 2 channels */
phantom2_sample_names
};
@@ -3386,62 +3386,62 @@ WRITE8_MEMBER(mw8080bw_state::phantom2_audio_2_w)
static const discrete_op_amp_tvca_info bowler_fowl_tvca =
{
- RES_M(2.7), /* R1103 */
- RES_K(680), /* R1102 */
- 0, /* no r3 */
- RES_K(680), /* R1104 */
- RES_K(1), /* SIP */
- 0, /* no r6 */
- RES_K(300), /* R1101 */
- 0, /* no r8 */
- 0, /* no r9 */
- 0, /* no r10 */
- 0, /* no r11 */
- CAP_U(0.1), /* C1050 */
- 0, /* no c2 */
- 0, 0, /* no c3, c4 */
- 5, /* v1 */
- 0, /* no v2 */
- 0, /* no v3 */
- 12, /* vP */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
+ RES_M(2.7), /* R1103 */
+ RES_K(680), /* R1102 */
+ 0, /* no r3 */
+ RES_K(680), /* R1104 */
+ RES_K(1), /* SIP */
+ 0, /* no r6 */
+ RES_K(300), /* R1101 */
+ 0, /* no r8 */
+ 0, /* no r9 */
+ 0, /* no r10 */
+ 0, /* no r11 */
+ CAP_U(0.1), /* C1050 */
+ 0, /* no c2 */
+ 0, 0, /* no c3, c4 */
+ 5, /* v1 */
+ 0, /* no v2 */
+ 0, /* no v3 */
+ 12, /* vP */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
};
static DISCRETE_SOUND_START(bowler)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(BOWLER_FOWL_EN)
/************************************************
- * Explosion
- ************************************************/
+ * Explosion
+ ************************************************/
DISCRETE_SQUAREWFIX(NODE_20,
- 1, /* ENAB */
- 180, /* FREQ */
- DEFAULT_TTL_V_LOGIC_1, /* p-p AMP */
- 50, /* DUTY */
- DEFAULT_TTL_V_LOGIC_1 / 2, /* dc BIAS */
- 0) /* PHASE */
- DISCRETE_OP_AMP_TRIG_VCA(NODE_21, /* IC P3, pin 9 */
- BOWLER_FOWL_EN, /* TRG0 */
- 0, /* no TRG1 */
- 0, /* no TRG2 */
- NODE_20, /* IN0 */
- 0, /* no IN1 */
+ 1, /* ENAB */
+ 180, /* FREQ */
+ DEFAULT_TTL_V_LOGIC_1, /* p-p AMP */
+ 50, /* DUTY */
+ DEFAULT_TTL_V_LOGIC_1 / 2, /* dc BIAS */
+ 0) /* PHASE */
+ DISCRETE_OP_AMP_TRIG_VCA(NODE_21, /* IC P3, pin 9 */
+ BOWLER_FOWL_EN, /* TRG0 */
+ 0, /* no TRG1 */
+ 0, /* no TRG2 */
+ NODE_20, /* IN0 */
+ 0, /* no IN1 */
&bowler_fowl_tvca)
DISCRETE_CRFILTER(BOWLER_FOWL_SND,
- NODE_21, /* IN0 */
- RES_K(68), /* R1120 */
- CAP_U(0.1) ) /* C1048 */
+ NODE_21, /* IN0 */
+ RES_K(68), /* R1120 */
+ CAP_U(0.1) ) /* C1048 */
DISCRETE_OUTPUT(BOWLER_FOWL_SND, 10000)
DISCRETE_SOUND_END
@@ -3467,8 +3467,8 @@ WRITE8_MEMBER(mw8080bw_state::bowler_audio_1_w)
discrete_sound_w(m_discrete, space, BOWLER_FOWL_EN, (data >> 3) & 0x01);
/* D4 - appears to be a screen flip, but it's
- shown unconnected on the schematics for both the
- upright and cocktail PCB's */
+ shown unconnected on the schematics for both the
+ upright and cocktail PCB's */
/* D5 - triggered on a 'strike', sound circuit not labeled */
@@ -3479,10 +3479,10 @@ WRITE8_MEMBER(mw8080bw_state::bowler_audio_1_w)
WRITE8_MEMBER(mw8080bw_state::bowler_audio_2_w)
{
/* set BALL ROLLING SOUND FREQ(data & 0x0f)
- 0, if no rolling, 0x08 used during ball return */
+ 0, if no rolling, 0x08 used during ball return */
/* D4 - triggered when the ball crosses the foul line,
- sound circuit not labeled */
+ sound circuit not labeled */
/* D5 - triggered on a 'spare', sound circuit not labeled */
@@ -3493,21 +3493,21 @@ WRITE8_MEMBER(mw8080bw_state::bowler_audio_2_w)
WRITE8_MEMBER(mw8080bw_state::bowler_audio_3_w)
{
/* regardless of the data, enable BALL HITS PIN 1 sound
- (top circuit on the schematics) */
+ (top circuit on the schematics) */
}
WRITE8_MEMBER(mw8080bw_state::bowler_audio_4_w)
{
/* regardless of the data, enable BALL HITS PIN 2 sound
- (bottom circuit on the schematics) */
+ (bottom circuit on the schematics) */
}
WRITE8_MEMBER(mw8080bw_state::bowler_audio_5_w)
{
/* not sure, appears to me trigerred alongside the two
- BALL HITS PIN sounds */
+ BALL HITS PIN sounds */
}
@@ -3520,8 +3520,8 @@ WRITE8_MEMBER(mw8080bw_state::bowler_audio_6_w)
/* D6 and D7 are not connected */
/* D1, D2, D4 and D5 have something to do with a chime circuit.
- D1 and D4 are HI when a 'strike' happens, and D2 and D5 are
- HI on a 'spare' */
+ D1 and D4 are HI when a 'strike' happens, and D2 and D5 are
+ HI on a 'spare' */
}
@@ -3547,29 +3547,29 @@ WRITE8_MEMBER(mw8080bw_state::bowler_audio_6_w)
static const sn76477_interface invaders_sn76477_interface =
{
- 0, /* 4 noise_res (N/C) */
- 0, /* 5 filter_res (N/C) */
- 0, /* 6 filter_cap (N/C) */
- 0, /* 7 decay_res (N/C) */
- 0, /* 8 attack_decay_cap (N/C) */
+ 0, /* 4 noise_res (N/C) */
+ 0, /* 5 filter_res (N/C) */
+ 0, /* 6 filter_cap (N/C) */
+ 0, /* 7 decay_res (N/C) */
+ 0, /* 8 attack_decay_cap (N/C) */
RES_K(100), /* 10 attack_res */
- RES_K(56), /* 11 amplitude_res */
- RES_K(10), /* 12 feedback_res */
- 0, /* 16 vco_voltage (N/C) */
- CAP_U(0.1), /* 17 vco_cap */
- RES_K(8.2), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K(120), /* 20 slf_res */
- CAP_U(1.0), /* 21 slf_cap */
- 0, /* 23 oneshot_cap (N/C) */
- 0, /* 24 oneshot_res (N/C) */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(56), /* 11 amplitude_res */
+ RES_K(10), /* 12 feedback_res */
+ 0, /* 16 vco_voltage (N/C) */
+ CAP_U(0.1), /* 17 vco_cap */
+ RES_K(8.2), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K(120), /* 20 slf_res */
+ CAP_U(1.0), /* 21 slf_cap */
+ 0, /* 23 oneshot_cap (N/C) */
+ 0, /* 24 oneshot_res (N/C) */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
};
@@ -3577,22 +3577,22 @@ static const sn76477_interface invaders_sn76477_interface =
static const char *const invaders_sample_names[] =
{
"*invaders",
- "1", /* shot/missle */
- "2", /* base hit/explosion */
- "3", /* invader hit */
- "4", /* fleet move 1 */
- "5", /* fleet move 2 */
- "6", /* fleet move 3 */
- "7", /* fleet move 4 */
- "8", /* UFO/saucer hit */
- "9", /* bonus base */
+ "1", /* shot/missle */
+ "2", /* base hit/explosion */
+ "3", /* invader hit */
+ "4", /* fleet move 1 */
+ "5", /* fleet move 2 */
+ "6", /* fleet move 3 */
+ "7", /* fleet move 4 */
+ "8", /* UFO/saucer hit */
+ "9", /* bonus base */
0
};
static const samples_interface invaders_samples_interface =
{
- 6, /* 6 channels */
+ 6, /* 6 channels */
invaders_sample_names
};
@@ -3633,69 +3633,69 @@ MACHINE_CONFIG_END
static const discrete_op_amp_info invaders_saucer_hit_op_amp_B3_9 =
{
DISC_OP_AMP_IS_NORTON,
- 0, /* no r1 */
- RES_K(100), /* R72 */
- RES_M(1), /* R71 */
- 0, /* no r4 */
- CAP_U(1), /* C23 */
- 0, /* vN */
- 12 /* vP */
+ 0, /* no r1 */
+ RES_K(100), /* R72 */
+ RES_M(1), /* R71 */
+ 0, /* no r4 */
+ CAP_U(1), /* C23 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_osc_info invaders_saucer_hit_osc =
{
DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- RES_M(1), /* R70 */
- RES_K(470), /* R64 */
- RES_K(100), /* R61 */
- RES_K(120), /* R63 */
- RES_M(1), /* R62 */
- 0, /* no r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_U(0.1), /* C21 */
- 12, /* vP */
+ RES_M(1), /* R70 */
+ RES_K(470), /* R64 */
+ RES_K(100), /* R61 */
+ RES_K(120), /* R63 */
+ RES_M(1), /* R62 */
+ 0, /* no r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_U(0.1), /* C21 */
+ 12, /* vP */
};
static const discrete_op_amp_osc_info invaders_saucer_hit_vco =
{
DISC_OP_AMP_OSCILLATOR_VCO_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW,
- RES_M(1), /* R65 */
- RES_K(470), /* R66 */
- RES_K(680), /* R67 */
- RES_M(1), /* R69*/
- RES_M(1), /* R68 */
- 0, /* no r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_P(470), /* C22 */
- 12, /* vP */
+ RES_M(1), /* R65 */
+ RES_K(470), /* R66 */
+ RES_K(680), /* R67 */
+ RES_M(1), /* R69*/
+ RES_M(1), /* R68 */
+ 0, /* no r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_P(470), /* C22 */
+ 12, /* vP */
};
static const discrete_op_amp_info invaders_saucer_hit_op_amp_B3_10 =
{
DISC_OP_AMP_IS_NORTON,
- RES_K(680), /* R73 */
- RES_K(680), /* R77 */
- RES_M(2.7), /* R74 */
- RES_K(680), /* R75 */
- 0, /* no c */
- 0, /* vN */
- 12 /* vP */
+ RES_K(680), /* R73 */
+ RES_K(680), /* R77 */
+ RES_M(2.7), /* R74 */
+ RES_K(680), /* R75 */
+ 0, /* no c */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_comp_adder_table invaders_thump_resistors =
{
DISC_COMP_P_RESISTOR,
- 0, /* no cDefault */
- 4, /* length */
- { RES_K(20) + RES_K(20), /* R126 + R127 */
- RES_K(68), /* R128 */
- RES_K(82), /* R129 */
- RES_K(100) } /* R130 */
+ 0, /* no cDefault */
+ 4, /* length */
+ { RES_K(20) + RES_K(20), /* R126 + R127 */
+ RES_K(68), /* R128 */
+ RES_K(82), /* R129 */
+ RES_K(100) } /* R130 */
};
@@ -3703,15 +3703,15 @@ static const discrete_555_desc invaders_thump_555 =
{
DISC_555_OUT_ENERGY | DISC_555_OUT_DC,
5,
- 5.0 - 0.6, /* 5V - diode drop */
- DEFAULT_TTL_V_LOGIC_1 /* Output of F3 7411 buffer */
+ 5.0 - 0.6, /* 5V - diode drop */
+ DEFAULT_TTL_V_LOGIC_1 /* Output of F3 7411 buffer */
};
static const discrete_555_desc invaders_bonus_555 =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5.0, /* 5V */
+ 5.0, /* 5V */
DEFAULT_555_VALUES
};
@@ -3719,436 +3719,436 @@ static const discrete_555_desc invaders_bonus_555 =
static const discrete_op_amp_1sht_info invaders_invader_hit_1sht =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- RES_M(4.7), /* R49 */
- RES_K(100), /* R51 */
- RES_M(1), /* R48 */
- RES_M(1), /* R50 */
- RES_M(2.2), /* R52 */
- CAP_U(0.1), /* C18 */
- CAP_P(470), /* C20 */
- 0, /* vN */
- 12 /* vP */
+ RES_M(4.7), /* R49 */
+ RES_K(100), /* R51 */
+ RES_M(1), /* R48 */
+ RES_M(1), /* R50 */
+ RES_M(2.2), /* R52 */
+ CAP_U(0.1), /* C18 */
+ CAP_P(470), /* C20 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_info invaders_invader_hit_op_amp_D3_10 =
{
DISC_OP_AMP_IS_NORTON,
- 0, /* no r1 */
- RES_K(10), /* R53 */
- RES_M(1), /* R137 */
- 0, /* no r4 */
- CAP_U(0.47), /* C19 */
- 0, /* vN */
- 12 /* vP */
+ 0, /* no r1 */
+ RES_K(10), /* R53 */
+ RES_M(1), /* R137 */
+ 0, /* no r4 */
+ CAP_U(0.47), /* C19 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_osc_info invaders_invader_hit_osc =
{
DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- RES_M(1), /* R37 */
- RES_K(10), /* R41 */
- RES_K(100), /* R38 */
- RES_K(120), /* R40 */
- RES_M(1), /* R39 */
- 0, /* no r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_U(0.1), /* C16 */
- 12, /* vP */
+ RES_M(1), /* R37 */
+ RES_K(10), /* R41 */
+ RES_K(100), /* R38 */
+ RES_K(120), /* R40 */
+ RES_M(1), /* R39 */
+ 0, /* no r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_U(0.1), /* C16 */
+ 12, /* vP */
};
static const discrete_op_amp_osc_info invaders_invader_hit_vco =
{
DISC_OP_AMP_OSCILLATOR_VCO_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- RES_M(1), /* R42 */
- RES_K(470), /* R43 */
- RES_K(680), /* R44 */
- RES_M(1), /* R46 */
- RES_M(1), /* R45 */
- 0, /* no r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_P(330), /* C16 */
- 12, /* vP */
+ RES_M(1), /* R42 */
+ RES_K(470), /* R43 */
+ RES_K(680), /* R44 */
+ RES_M(1), /* R46 */
+ RES_M(1), /* R45 */
+ 0, /* no r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_P(330), /* C16 */
+ 12, /* vP */
};
static const discrete_op_amp_info invaders_invader_hit_op_amp_D3_4 =
{
DISC_OP_AMP_IS_NORTON,
- RES_K(470), /* R55 */
- RES_K(680), /* R54 */
- RES_M(2.7), /* R56 */
- RES_K(680), /* R57 */
- 0, /* no c */
- 0, /* vN */
- 12 /* vP */
+ RES_K(470), /* R55 */
+ RES_K(680), /* R54 */
+ RES_M(2.7), /* R56 */
+ RES_K(680), /* R57 */
+ 0, /* no c */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_1sht_info invaders_explosion_1sht =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- RES_M(4.7), /* R90 */
- RES_K(100), /* R88 */
- RES_M(1), /* R91 */
- RES_M(1), /* R89 */
- RES_M(2.2), /* R92 */
- CAP_U(2.2), /* C24 */
- CAP_P(470), /* C25 */
- 0, /* vN */
- 12 /* vP */
+ RES_M(4.7), /* R90 */
+ RES_K(100), /* R88 */
+ RES_M(1), /* R91 */
+ RES_M(1), /* R89 */
+ RES_M(2.2), /* R92 */
+ CAP_U(2.2), /* C24 */
+ CAP_P(470), /* C25 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_tvca_info invaders_explosion_tvca =
{
- RES_M(2.7), /* R80 */
- RES_K(680), /* R79 */
- 0, /* no r3 */
- RES_K(680), /* R82 */
- RES_K(10), /* R93 */
- 0, /* no r6 */
- RES_K(680), /* R83 */
- 0, /* no r8 */
- 0, /* no r9 */
- 0, /* no r10 */
- 0, /* no r11 */
- CAP_U(1), /* C26 */
- 0, /* no c2 */
- 0, 0, /* no c3, c4 */
- 12.0 - OP_AMP_NORTON_VBE, /* v1 */
- 0, /* no v2 */
- 0, /* no v3 */
- 12, /* vP */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
+ RES_M(2.7), /* R80 */
+ RES_K(680), /* R79 */
+ 0, /* no r3 */
+ RES_K(680), /* R82 */
+ RES_K(10), /* R93 */
+ 0, /* no r6 */
+ RES_K(680), /* R83 */
+ 0, /* no r8 */
+ 0, /* no r9 */
+ 0, /* no r10 */
+ 0, /* no r11 */
+ CAP_U(1), /* C26 */
+ 0, /* no c2 */
+ 0, 0, /* no c3, c4 */
+ 12.0 - OP_AMP_NORTON_VBE, /* v1 */
+ 0, /* no v2 */
+ 0, /* no v3 */
+ 12, /* vP */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
};
static const discrete_op_amp_1sht_info invaders_missle_1sht =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- RES_M(4.7), /* R32 */
- RES_K(100), /* R30 */
- RES_M(1), /* R31 */
- RES_M(1), /* R33 */
- RES_M(2.2), /* R34 */
- CAP_U(1), /* C12 */
- CAP_P(470), /* C15 */
- 0, /* vN */
- 12 /* vP */
+ RES_M(4.7), /* R32 */
+ RES_K(100), /* R30 */
+ RES_M(1), /* R31 */
+ RES_M(1), /* R33 */
+ RES_M(2.2), /* R34 */
+ CAP_U(1), /* C12 */
+ CAP_P(470), /* C15 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_info invaders_missle_op_amp_B3 =
{
DISC_OP_AMP_IS_NORTON,
- 0, /* no r1 */
- RES_K(10), /* R35 */
- RES_M(1.5), /* R36 */
- 0, /* no r4 */
- CAP_U(0.22), /* C13 */
- 0, /* vN */
- 12 /* vP */
+ 0, /* no r1 */
+ RES_K(10), /* R35 */
+ RES_M(1.5), /* R36 */
+ 0, /* no r4 */
+ CAP_U(0.22), /* C13 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_osc_info invaders_missle_op_amp_osc =
{
DISC_OP_AMP_OSCILLATOR_VCO_3 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW,
- 1.0 / (1.0 / RES_M(1) + 1.0 / RES_K(330)) + RES_M(1.5), /* R29||R11 + R12 */
- RES_M(1), /* R16 */
- RES_K(560), /* R17 */
- RES_M(2.2), /* R19 */
- RES_M(1), /* R16 */
- RES_M(4.7), /* R14 */
- RES_M(3.3), /* R13 */
- 0, /* no r8 */
- CAP_P(330), /* C58 */
- 12, /* vP */
+ 1.0 / (1.0 / RES_M(1) + 1.0 / RES_K(330)) + RES_M(1.5), /* R29||R11 + R12 */
+ RES_M(1), /* R16 */
+ RES_K(560), /* R17 */
+ RES_M(2.2), /* R19 */
+ RES_M(1), /* R16 */
+ RES_M(4.7), /* R14 */
+ RES_M(3.3), /* R13 */
+ 0, /* no r8 */
+ CAP_P(330), /* C58 */
+ 12, /* vP */
};
static const discrete_op_amp_info invaders_missle_op_amp_A3 =
{
DISC_OP_AMP_IS_NORTON,
- RES_K(560), /* R22 */
- RES_K(470), /* R15 */
- RES_M(2.7), /* R20 */
- RES_K(560), /* R21 */
- 0, /* no c */
- 0, /* vN */
- 12 /* vP */
+ RES_K(560), /* R22 */
+ RES_K(470), /* R15 */
+ RES_M(2.7), /* R20 */
+ RES_K(560), /* R21 */
+ 0, /* no c */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_tvca_info invaders_missle_tvca =
{
- RES_M(2.7), /* R25 */
- RES_K(560), /* R23 */
- 0, /* no r3 */
- RES_K(560), /* R26 */
- RES_K(1), /* */
- 0, /* no r6 */
- RES_K(560), /* R60 */
- 0, /* no r8 */
- 0, /* no r9 */
- 0, /* no r10 */
- 0, /* no r11 */
- CAP_U(0.1), /* C14 */
- 0, /* no c2 */
- 0, 0, /* no c3, c4 */
- 5, /* v1 */
- 0, /* no v2 */
- 0, /* no v3 */
- 12, /* vP */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
- DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
- DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
+ RES_M(2.7), /* R25 */
+ RES_K(560), /* R23 */
+ 0, /* no r3 */
+ RES_K(560), /* R26 */
+ RES_K(1), /* */
+ 0, /* no r6 */
+ RES_K(560), /* R60 */
+ 0, /* no r8 */
+ 0, /* no r9 */
+ 0, /* no r10 */
+ 0, /* no r11 */
+ CAP_U(0.1), /* C14 */
+ 0, /* no c2 */
+ 0, 0, /* no c3, c4 */
+ 5, /* v1 */
+ 0, /* no v2 */
+ 0, /* no v3 */
+ 12, /* vP */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f0 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f1 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_TRG0, /* f2 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f3 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE, /* no f4 */
+ DISC_OP_AMP_TRIGGER_FUNCTION_NONE /* no f5 */
};
static const discrete_mixer_desc invaders_mixer =
{
- DISC_MIXER_IS_OP_AMP, /* type */
- { RES_K(200), /* R78 */
- RES_K(10) + 100 + 100, /* R134 + R133 + R132 */
- RES_K(150), /* R136 */
- RES_K(200), /* R59 */
- RES_K(2) + RES_K(6.8) + RES_K(5.6), /* R86 + R85 + R84 */
- RES_K(150) }, /* R28 */
- {0}, /* no rNode{} */
+ DISC_MIXER_IS_OP_AMP, /* type */
+ { RES_K(200), /* R78 */
+ RES_K(10) + 100 + 100, /* R134 + R133 + R132 */
+ RES_K(150), /* R136 */
+ RES_K(200), /* R59 */
+ RES_K(2) + RES_K(6.8) + RES_K(5.6), /* R86 + R85 + R84 */
+ RES_K(150) }, /* R28 */
+ {0}, /* no rNode{} */
{ 0,
- 0,
- 0,
- 0,
- 0,
- CAP_U(0.001) }, /* C11 */
- 0, /* no rI */
- RES_K(100), /* R105 */
- 0, /* no cF */
- CAP_U(0.1), /* C45 */
- 0, /* vRef = ground */
- 1 /* gain */
+ 0,
+ 0,
+ 0,
+ 0,
+ CAP_U(0.001) }, /* C11 */
+ 0, /* no rI */
+ RES_K(100), /* R105 */
+ 0, /* no cF */
+ CAP_U(0.1), /* C45 */
+ 0, /* vRef = ground */
+ 1 /* gain */
};
/* sound board 1 or 2, for multi-board games */
-#define INVADERS_NODE(_node, _board) (NODE(_node + ((_board - 1) * 100)))
+#define INVADERS_NODE(_node, _board) (NODE(_node + ((_board - 1) * 100)))
/************************************************
* Noise Generator
************************************************/
/* Noise clock was breadboarded and measured at 7515 */
-#define INVADERS_NOISE_GENERATOR \
- DISCRETE_LFSR_NOISE(INVADERS_NOISE, /* IC N5, pin 10 */ \
- 1, /* ENAB */ \
- 1, /* no RESET */ \
- 7515, /* CLK in Hz */ \
- 12, /* p-p AMPL */ \
- 0, /* no FEED input */ \
- 12.0/2, /* dc BIAS */ \
+#define INVADERS_NOISE_GENERATOR \
+ DISCRETE_LFSR_NOISE(INVADERS_NOISE, /* IC N5, pin 10 */ \
+ 1, /* ENAB */ \
+ 1, /* no RESET */ \
+ 7515, /* CLK in Hz */ \
+ 12, /* p-p AMPL */ \
+ 0, /* no FEED input */ \
+ 12.0/2, /* dc BIAS */ \
&midway_lfsr)
/************************************************
* Saucer Hit
************************************************/
-#define INVADERS_SAUCER_HIT(_board) \
- DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_SAUCER_HIT_EN, _board), 12, 0, 0) \
- DISCRETE_OP_AMP(INVADERS_NODE(20, _board), /* IC B3, pin 9 */ \
- 1, /* ENAB */ \
- 0, /* no IN0 */ \
- INVADERS_NODE(INVADERS_SAUCER_HIT_EN, _board), /* IN1 */ \
+#define INVADERS_SAUCER_HIT(_board) \
+ DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_SAUCER_HIT_EN, _board), 12, 0, 0) \
+ DISCRETE_OP_AMP(INVADERS_NODE(20, _board), /* IC B3, pin 9 */ \
+ 1, /* ENAB */ \
+ 0, /* no IN0 */ \
+ INVADERS_NODE(INVADERS_SAUCER_HIT_EN, _board), /* IN1 */ \
&invaders_saucer_hit_op_amp_B3_9) \
- DISCRETE_OP_AMP_OSCILLATOR(INVADERS_NODE(21, _board), /* IC A4, pin 5 */ \
- 1, /* ENAB */ \
- &invaders_saucer_hit_osc) \
- DISCRETE_OP_AMP_VCO1(INVADERS_NODE(22, _board), /* IC A4, pin 9 */ \
- 1, /* ENAB */ \
- INVADERS_NODE(21, _board), /* VMOD1 */ \
- &invaders_saucer_hit_vco) \
- DISCRETE_OP_AMP(INVADERS_NODE(INVADERS_SAUCER_HIT_SND, _board), /* IC B3, pin 10 */ \
- 1, /* ENAB */ \
- INVADERS_NODE(22, _board), /* IN0 */ \
- INVADERS_NODE(20, _board), /* IN1 */ \
+ DISCRETE_OP_AMP_OSCILLATOR(INVADERS_NODE(21, _board), /* IC A4, pin 5 */ \
+ 1, /* ENAB */ \
+ &invaders_saucer_hit_osc) \
+ DISCRETE_OP_AMP_VCO1(INVADERS_NODE(22, _board), /* IC A4, pin 9 */ \
+ 1, /* ENAB */ \
+ INVADERS_NODE(21, _board), /* VMOD1 */ \
+ &invaders_saucer_hit_vco) \
+ DISCRETE_OP_AMP(INVADERS_NODE(INVADERS_SAUCER_HIT_SND, _board), /* IC B3, pin 10 */ \
+ 1, /* ENAB */ \
+ INVADERS_NODE(22, _board), /* IN0 */ \
+ INVADERS_NODE(20, _board), /* IN1 */ \
&invaders_saucer_hit_op_amp_B3_10)
/************************************************
* Fleet movement
************************************************/
-#define INVADERS_FLEET(_board) \
- DISCRETE_INPUT_DATA (INVADERS_NODE(INVADERS_FLEET_DATA, _board)) \
+#define INVADERS_FLEET(_board) \
+ DISCRETE_INPUT_DATA (INVADERS_NODE(INVADERS_FLEET_DATA, _board)) \
DISCRETE_COMP_ADDER(INVADERS_NODE(30, _board), \
- INVADERS_NODE(INVADERS_FLEET_DATA, _board), /* DATA */ \
+ INVADERS_NODE(INVADERS_FLEET_DATA, _board), /* DATA */ \
&invaders_thump_resistors) \
- DISCRETE_555_ASTABLE(INVADERS_NODE(31, _board), /* IC F3, pin 6 */ \
- 1, /* RESET */ \
- INVADERS_NODE(30, _board), /* R1 */ \
- RES_K(75), /* R131 */ \
- CAP_U(0.1), /* C29 */ \
+ DISCRETE_555_ASTABLE(INVADERS_NODE(31, _board), /* IC F3, pin 6 */ \
+ 1, /* RESET */ \
+ INVADERS_NODE(30, _board), /* R1 */ \
+ RES_K(75), /* R131 */ \
+ CAP_U(0.1), /* C29 */ \
&invaders_thump_555) \
DISCRETE_RCFILTER(INVADERS_NODE(32, _board), \
- INVADERS_NODE(31, _board), /* IN0 */ \
- 100, /* R132 */ \
- CAP_U(4.7) ) /* C31 */ \
+ INVADERS_NODE(31, _board), /* IN0 */ \
+ 100, /* R132 */ \
+ CAP_U(4.7) ) /* C31 */ \
DISCRETE_RCFILTER(INVADERS_NODE(INVADERS_FLEET_SND, _board), \
- INVADERS_NODE(32, _board), /* IN0 */ \
- 100 + 100, /* R132 + R133 */ \
- CAP_U(10) ) /* C32 */
+ INVADERS_NODE(32, _board), /* IN0 */ \
+ 100 + 100, /* R132 + R133 */ \
+ CAP_U(10) ) /* C32 */
/************************************************
* Bonus Missle Base
************************************************/
-#define INVADERS_BONUS_MISSLE_BASE(_board) \
- DISCRETE_INPUT_LOGIC (INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, _board)) \
- DISCRETE_555_ASTABLE(INVADERS_NODE(40, _board), /* IC F4, pin 9 */ \
+#define INVADERS_BONUS_MISSLE_BASE(_board) \
+ DISCRETE_INPUT_LOGIC (INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, _board)) \
+ DISCRETE_555_ASTABLE(INVADERS_NODE(40, _board), /* IC F4, pin 9 */ \
INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, _board),/* RESET */ \
- RES_K(100), /* R94 */ \
- RES_K(47), /* R95 */ \
- CAP_U(1), /* C34 */ \
- &invaders_bonus_555) \
- DISCRETE_SQUAREWFIX(INVADERS_NODE(41, _board), \
- 1, /* ENAB */ \
- 480, /* FREQ */ \
- 1, /* AMP */ \
- 50, /* DUTY */ \
- 1.0/2, /* BIAS */ \
- 0) /* PHASE */ \
- DISCRETE_LOGIC_AND3(INVADERS_NODE(42, _board), /* IC F3, pin 12 */ \
+ RES_K(100), /* R94 */ \
+ RES_K(47), /* R95 */ \
+ CAP_U(1), /* C34 */ \
+ &invaders_bonus_555) \
+ DISCRETE_SQUAREWFIX(INVADERS_NODE(41, _board), \
+ 1, /* ENAB */ \
+ 480, /* FREQ */ \
+ 1, /* AMP */ \
+ 50, /* DUTY */ \
+ 1.0/2, /* BIAS */ \
+ 0) /* PHASE */ \
+ DISCRETE_LOGIC_AND3(INVADERS_NODE(42, _board), /* IC F3, pin 12 */ \
INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, _board),/* INP0 */ \
- INVADERS_NODE(41, _board), /* INP1 */ \
- INVADERS_NODE(40, _board) ) /* INP2 */ \
+ INVADERS_NODE(41, _board), /* INP1 */ \
+ INVADERS_NODE(40, _board) ) /* INP2 */ \
DISCRETE_GAIN(INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_SND, _board),/* adjust from logic to TTL voltage level */\
- INVADERS_NODE(42, _board), /* IN0 */ \
- DEFAULT_TTL_V_LOGIC_1) /* GAIN */
+ INVADERS_NODE(42, _board), /* IN0 */ \
+ DEFAULT_TTL_V_LOGIC_1) /* GAIN */
/************************************************
* Invader Hit
************************************************/
-#define INVADERS_INVADER_HIT(_board, _type) \
- DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_INVADER_HIT_EN, _board), 5, 0, 0) \
- DISCRETE_OP_AMP_ONESHOT(INVADERS_NODE(50, _board), /* IC D3, pin 9 */ \
- INVADERS_NODE(INVADERS_INVADER_HIT_EN, _board), /* TRIG */ \
+#define INVADERS_INVADER_HIT(_board, _type) \
+ DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_INVADER_HIT_EN, _board), 5, 0, 0) \
+ DISCRETE_OP_AMP_ONESHOT(INVADERS_NODE(50, _board), /* IC D3, pin 9 */ \
+ INVADERS_NODE(INVADERS_INVADER_HIT_EN, _board), /* TRIG */ \
&_type##_invader_hit_1sht) \
- DISCRETE_OP_AMP(INVADERS_NODE(51, _board), /* IC D3, pin 10 */ \
- 1, /* ENAB */ \
- 0, /* no IN0 */ \
- INVADERS_NODE(50, _board), /* IN1 */ \
+ DISCRETE_OP_AMP(INVADERS_NODE(51, _board), /* IC D3, pin 10 */ \
+ 1, /* ENAB */ \
+ 0, /* no IN0 */ \
+ INVADERS_NODE(50, _board), /* IN1 */ \
&invaders_invader_hit_op_amp_D3_10) \
- DISCRETE_OP_AMP_OSCILLATOR(INVADERS_NODE(52, _board), /* IC B4, pin 5 */ \
- 1, /* ENAB */ \
+ DISCRETE_OP_AMP_OSCILLATOR(INVADERS_NODE(52, _board), /* IC B4, pin 5 */ \
+ 1, /* ENAB */ \
&_type##_invader_hit_osc) \
- DISCRETE_OP_AMP_VCO1(INVADERS_NODE(53, _board), /* IC B4, pin 4 */ \
- 1, /* ENAB */ \
- INVADERS_NODE(52, _board), /* VMOD1 */ \
+ DISCRETE_OP_AMP_VCO1(INVADERS_NODE(53, _board), /* IC B4, pin 4 */ \
+ 1, /* ENAB */ \
+ INVADERS_NODE(52, _board), /* VMOD1 */ \
&invaders_invader_hit_vco) \
- DISCRETE_OP_AMP(INVADERS_NODE(INVADERS_INVADER_HIT_SND, _board), /* IC D3, pin 4 */ \
- 1, /* ENAB */ \
- INVADERS_NODE(53, _board), /* IN0 */ \
- INVADERS_NODE(51, _board), /* IN1 */ \
+ DISCRETE_OP_AMP(INVADERS_NODE(INVADERS_INVADER_HIT_SND, _board), /* IC D3, pin 4 */ \
+ 1, /* ENAB */ \
+ INVADERS_NODE(53, _board), /* IN0 */ \
+ INVADERS_NODE(51, _board), /* IN1 */ \
&invaders_invader_hit_op_amp_D3_4)
/************************************************
* Explosion
************************************************/
-#define INVADERS_EXPLOSION(_board) \
- DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_EXPLOSION_EN, _board), 5, 0, 0) \
- DISCRETE_OP_AMP_ONESHOT(INVADERS_NODE(60, _board), /* IC D2, pin 10 */ \
- INVADERS_NODE(INVADERS_EXPLOSION_EN, _board), /* TRIG */ \
+#define INVADERS_EXPLOSION(_board) \
+ DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_EXPLOSION_EN, _board), 5, 0, 0) \
+ DISCRETE_OP_AMP_ONESHOT(INVADERS_NODE(60, _board), /* IC D2, pin 10 */ \
+ INVADERS_NODE(INVADERS_EXPLOSION_EN, _board), /* TRIG */ \
&invaders_explosion_1sht) \
- DISCRETE_OP_AMP_TRIG_VCA(INVADERS_NODE(61, _board), /* IC D2, pin 4 */ \
- INVADERS_NODE(60, _board), /* TRG0 */ \
- 0, /* no TRG1 */ \
- 0, /* no TRG2 */ \
- INVADERS_NOISE, /* IN0 */ \
- 0, /* no IN1 */ \
+ DISCRETE_OP_AMP_TRIG_VCA(INVADERS_NODE(61, _board), /* IC D2, pin 4 */ \
+ INVADERS_NODE(60, _board), /* TRG0 */ \
+ 0, /* no TRG1 */ \
+ 0, /* no TRG2 */ \
+ INVADERS_NOISE, /* IN0 */ \
+ 0, /* no IN1 */ \
&invaders_explosion_tvca) \
DISCRETE_RCFILTER(INVADERS_NODE(62, _board), \
- INVADERS_NODE(61, _board), /* IN0 */ \
- RES_K(5.6), /* R84 */ \
- CAP_U(0.1) ) /* C27 */ \
+ INVADERS_NODE(61, _board), /* IN0 */ \
+ RES_K(5.6), /* R84 */ \
+ CAP_U(0.1) ) /* C27 */ \
DISCRETE_RCFILTER(INVADERS_NODE(INVADERS_EXPLOSION_SND, _board), \
- INVADERS_NODE(62, _board), /* IN0 */ \
- RES_K(5.6) + RES_K(6.8), /* R84 + R85 */ \
- CAP_U(0.1) ) /* C28 */
+ INVADERS_NODE(62, _board), /* IN0 */ \
+ RES_K(5.6) + RES_K(6.8), /* R84 + R85 */ \
+ CAP_U(0.1) ) /* C28 */
/************************************************
* Missle Sound
************************************************/
-#define INVADERS_MISSILE(_board, _type) \
- DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_MISSILE_EN, _board), 5, 0, 0) \
- DISCRETE_OP_AMP_ONESHOT(INVADERS_NODE(70, _board), /* IC B3, pin 4 */ \
- INVADERS_NODE(INVADERS_MISSILE_EN, _board), /* TRIG */ \
- &_type##_missle_1sht) \
- DISCRETE_OP_AMP(INVADERS_NODE(71, _board), /* IC B3, pin 5 */ \
- 1, /* ENAB */ \
- 0, /* no IN0 */ \
- INVADERS_NODE(70, _board), /* IN1 */ \
- &invaders_missle_op_amp_B3) \
- /* next 2 modules simulate the D1 voltage drop */ \
- DISCRETE_ADDER2(INVADERS_NODE(72, _board), \
- 1, /* ENAB */ \
- INVADERS_NODE(71, _board), /* IN0 */ \
- -0.5) /* IN1 */ \
- DISCRETE_CLAMP(INVADERS_NODE(73, _board), \
- INVADERS_NODE(72, _board), /* IN0 */ \
- 0, /* MIN */ \
- 12) /* MAX */ \
- DISCRETE_CRFILTER(INVADERS_NODE(74, _board), \
- INVADERS_NOISE, /* IN0 */ \
- RES_M(1) + RES_K(330), /* R29, R11 */ \
- CAP_U(0.1) ) /* C57 */ \
- DISCRETE_GAIN(INVADERS_NODE(75, _board), \
- INVADERS_NODE(74, _board), /* IN0 */ \
- RES_K(330)/(RES_M(1) + RES_K(330))) /* GAIN - R29 : R11 */ \
- DISCRETE_OP_AMP_VCO2(INVADERS_NODE(76, _board), /* IC C1, pin 4 */ \
- 1, /* ENAB */ \
- INVADERS_NODE(75, _board), /* VMOD1 */ \
- INVADERS_NODE(73, _board), /* VMOD2 */ \
- &invaders_missle_op_amp_osc) \
- DISCRETE_OP_AMP(INVADERS_NODE(77, _board), /* IC A3, pin 9 */ \
- 1, /* ENAB */ \
- INVADERS_NODE(76, _board), /* IN0 */ \
- INVADERS_NODE(73, _board), /* IN1 */ \
- &invaders_missle_op_amp_A3) \
- DISCRETE_OP_AMP_TRIG_VCA(INVADERS_NODE(INVADERS_MISSILE_SND, _board), /* IC A3, pin 10 */ \
- INVADERS_NODE(INVADERS_MISSILE_EN, _board), /* TRG0 */ \
- 0, /* no TRG1 */ \
- 0, /* no TRG2 */ \
- INVADERS_NODE(77, _board), /* IN0 */ \
- 0, /* no IN1 */ \
+#define INVADERS_MISSILE(_board, _type) \
+ DISCRETE_INPUTX_LOGIC(INVADERS_NODE(INVADERS_MISSILE_EN, _board), 5, 0, 0) \
+ DISCRETE_OP_AMP_ONESHOT(INVADERS_NODE(70, _board), /* IC B3, pin 4 */ \
+ INVADERS_NODE(INVADERS_MISSILE_EN, _board), /* TRIG */ \
+ &_type##_missle_1sht) \
+ DISCRETE_OP_AMP(INVADERS_NODE(71, _board), /* IC B3, pin 5 */ \
+ 1, /* ENAB */ \
+ 0, /* no IN0 */ \
+ INVADERS_NODE(70, _board), /* IN1 */ \
+ &invaders_missle_op_amp_B3) \
+ /* next 2 modules simulate the D1 voltage drop */ \
+ DISCRETE_ADDER2(INVADERS_NODE(72, _board), \
+ 1, /* ENAB */ \
+ INVADERS_NODE(71, _board), /* IN0 */ \
+ -0.5) /* IN1 */ \
+ DISCRETE_CLAMP(INVADERS_NODE(73, _board), \
+ INVADERS_NODE(72, _board), /* IN0 */ \
+ 0, /* MIN */ \
+ 12) /* MAX */ \
+ DISCRETE_CRFILTER(INVADERS_NODE(74, _board), \
+ INVADERS_NOISE, /* IN0 */ \
+ RES_M(1) + RES_K(330), /* R29, R11 */ \
+ CAP_U(0.1) ) /* C57 */ \
+ DISCRETE_GAIN(INVADERS_NODE(75, _board), \
+ INVADERS_NODE(74, _board), /* IN0 */ \
+ RES_K(330)/(RES_M(1) + RES_K(330))) /* GAIN - R29 : R11 */ \
+ DISCRETE_OP_AMP_VCO2(INVADERS_NODE(76, _board), /* IC C1, pin 4 */ \
+ 1, /* ENAB */ \
+ INVADERS_NODE(75, _board), /* VMOD1 */ \
+ INVADERS_NODE(73, _board), /* VMOD2 */ \
+ &invaders_missle_op_amp_osc) \
+ DISCRETE_OP_AMP(INVADERS_NODE(77, _board), /* IC A3, pin 9 */ \
+ 1, /* ENAB */ \
+ INVADERS_NODE(76, _board), /* IN0 */ \
+ INVADERS_NODE(73, _board), /* IN1 */ \
+ &invaders_missle_op_amp_A3) \
+ DISCRETE_OP_AMP_TRIG_VCA(INVADERS_NODE(INVADERS_MISSILE_SND, _board), /* IC A3, pin 10 */ \
+ INVADERS_NODE(INVADERS_MISSILE_EN, _board), /* TRG0 */ \
+ 0, /* no TRG1 */ \
+ 0, /* no TRG2 */ \
+ INVADERS_NODE(77, _board), /* IN0 */ \
+ 0, /* no IN1 */ \
&invaders_missle_tvca)
/************************************************
* Final mix
************************************************/
-#define INVADERS_MIXER(_board, _type) \
+#define INVADERS_MIXER(_board, _type) \
DISCRETE_MIXER6(INVADERS_NODE(90, _board), \
- 1, /* ENAB */ \
- INVADERS_NODE(INVADERS_SAUCER_HIT_SND, _board), /* IN0 */ \
- INVADERS_NODE(INVADERS_FLEET_SND, _board), /* IN1 */ \
- INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_SND, _board), /* IN2 */ \
- INVADERS_NODE(INVADERS_INVADER_HIT_SND, _board), /* IN3 */ \
- INVADERS_NODE(INVADERS_EXPLOSION_SND, _board), /* IN4 */ \
- INVADERS_NODE(INVADERS_MISSILE_SND, _board), /* IN5 */ \
+ 1, /* ENAB */ \
+ INVADERS_NODE(INVADERS_SAUCER_HIT_SND, _board), /* IN0 */ \
+ INVADERS_NODE(INVADERS_FLEET_SND, _board), /* IN1 */ \
+ INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_SND, _board), /* IN2 */ \
+ INVADERS_NODE(INVADERS_INVADER_HIT_SND, _board), /* IN3 */ \
+ INVADERS_NODE(INVADERS_EXPLOSION_SND, _board), /* IN4 */ \
+ INVADERS_NODE(INVADERS_MISSILE_SND, _board), /* IN5 */ \
&_type##_mixer) \
DISCRETE_OUTPUT(INVADERS_NODE(90, _board), 2500)
@@ -4182,7 +4182,7 @@ MACHINE_CONFIG_END
WRITE8_MEMBER(mw8080bw_state::invaders_audio_1_w)
{
- sn76477_enable_w(m_sn, (~data >> 0) & 0x01); /* saucer sound */
+ sn76477_enable_w(m_sn, (~data >> 0) & 0x01); /* saucer sound */
discrete_sound_w(m_discrete, space, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
discrete_sound_w(m_discrete, space, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
@@ -4238,221 +4238,221 @@ WRITE8_MEMBER(mw8080bw_state::invaders_audio_2_w)
#define BLUESHRK_SHOT_SND NODE_16
/* Parts List - Resistors */
-#define BLUESHRK_R300 RES_M(1)
-#define BLUESHRK_R301 RES_K(100)
-#define BLUESHRK_R302 RES_M(1)
-#define BLUESHRK_R303 RES_K(33)
-#define BLUESHRK_R304 RES_K(120)
-#define BLUESHRK_R305 RES_M(1)
-#define BLUESHRK_R306 RES_K(470)
-#define BLUESHRK_R307 RES_K(680)
-#define BLUESHRK_R308 RES_M(1)
-#define BLUESHRK_R309 RES_M(1)
-#define BLUESHRK_R310 RES_K(680)
-#define BLUESHRK_R311 RES_K(1)
-#define BLUESHRK_R312 RES_K(100)
-#define BLUESHRK_R313 RES_M(1)
-#define BLUESHRK_R314 RES_M(1)
-#define BLUESHRK_R315 RES_M(4.7)
-#define BLUESHRK_R316 RES_M(2.2)
-#define BLUESHRK_R317 RES_K(10)
-#define BLUESHRK_R318 RES_M(1)
-#define BLUESHRK_R319 RES_K(680)
-#define BLUESHRK_R320 RES_M(2.7)
-#define BLUESHRK_R321 RES_K(680)
-#define BLUESHRK_R324 RES_K(750)
-#define BLUESHRK_R520 RES_K(510)
-#define BLUESHRK_R521 RES_K(22)
-#define BLUESHRK_R529 RES_K(33)
-#define BLUESHRK_R601 RES_K(47)
-#define BLUESHRK_R602 RES_K(22)
-#define BLUESHRK_R603 RES_K(39)
-#define BLUESHRK_R604 RES_K(1)
-#define BLUESHRK_R605 RES_M(1)
-#define BLUESHRK_R700 RES_K(68)
-#define BLUESHRK_R701 RES_K(470)
-#define BLUESHRK_R702 RES_M(1.2)
-#define BLUESHRK_R703 RES_M(1.5)
-#define BLUESHRK_R704 RES_K(22)
-#define BLUESHRK_R705 RES_K(100)
-#define BLUESHRK_R706 RES_K(470)
-#define BLUESHRK_R707 RES_M(1.2)
-#define BLUESHRK_R708 RES_M(1.5)
-#define BLUESHRK_R709 RES_K(22)
-#define BLUESHRK_R710 RES_K(470)
-#define BLUESHRK_R711 RES_K(39)
-#define BLUESHRK_R712 RES_M(1.2)
-#define BLUESHRK_R713 RES_M(1.5)
-#define BLUESHRK_R714 RES_K(22)
-#define BLUESHRK_R715 RES_K(47)
-#define BLUESHRK_R716 RES_K(75)
-#define BLUESHRK_R717 RES_M(1.5)
-#define BLUESHRK_R718 RES_M(2.2)
-#define BLUESHRK_R719 RES_K(560)
-#define BLUESHRK_R720 RES_M(1.5)
-#define BLUESHRK_R721 RES_M(2.2)
-#define BLUESHRK_R722 RES_M(2.2)
-#define BLUESHRK_R723 RES_K(560)
-#define BLUESHRK_R724 RES_K(12)
-#define BLUESHRK_R725 RES_K(68)
-#define BLUESHRK_R726 RES_K(330)
-#define BLUESHRK_R727 RES_M(2.2)
-#define BLUESHRK_R728 RES_M(1)
-#define BLUESHRK_R730 RES_K(56)
-#define BLUESHRK_R1000 RES_K(1)
+#define BLUESHRK_R300 RES_M(1)
+#define BLUESHRK_R301 RES_K(100)
+#define BLUESHRK_R302 RES_M(1)
+#define BLUESHRK_R303 RES_K(33)
+#define BLUESHRK_R304 RES_K(120)
+#define BLUESHRK_R305 RES_M(1)
+#define BLUESHRK_R306 RES_K(470)
+#define BLUESHRK_R307 RES_K(680)
+#define BLUESHRK_R308 RES_M(1)
+#define BLUESHRK_R309 RES_M(1)
+#define BLUESHRK_R310 RES_K(680)
+#define BLUESHRK_R311 RES_K(1)
+#define BLUESHRK_R312 RES_K(100)
+#define BLUESHRK_R313 RES_M(1)
+#define BLUESHRK_R314 RES_M(1)
+#define BLUESHRK_R315 RES_M(4.7)
+#define BLUESHRK_R316 RES_M(2.2)
+#define BLUESHRK_R317 RES_K(10)
+#define BLUESHRK_R318 RES_M(1)
+#define BLUESHRK_R319 RES_K(680)
+#define BLUESHRK_R320 RES_M(2.7)
+#define BLUESHRK_R321 RES_K(680)
+#define BLUESHRK_R324 RES_K(750)
+#define BLUESHRK_R520 RES_K(510)
+#define BLUESHRK_R521 RES_K(22)
+#define BLUESHRK_R529 RES_K(33)
+#define BLUESHRK_R601 RES_K(47)
+#define BLUESHRK_R602 RES_K(22)
+#define BLUESHRK_R603 RES_K(39)
+#define BLUESHRK_R604 RES_K(1)
+#define BLUESHRK_R605 RES_M(1)
+#define BLUESHRK_R700 RES_K(68)
+#define BLUESHRK_R701 RES_K(470)
+#define BLUESHRK_R702 RES_M(1.2)
+#define BLUESHRK_R703 RES_M(1.5)
+#define BLUESHRK_R704 RES_K(22)
+#define BLUESHRK_R705 RES_K(100)
+#define BLUESHRK_R706 RES_K(470)
+#define BLUESHRK_R707 RES_M(1.2)
+#define BLUESHRK_R708 RES_M(1.5)
+#define BLUESHRK_R709 RES_K(22)
+#define BLUESHRK_R710 RES_K(470)
+#define BLUESHRK_R711 RES_K(39)
+#define BLUESHRK_R712 RES_M(1.2)
+#define BLUESHRK_R713 RES_M(1.5)
+#define BLUESHRK_R714 RES_K(22)
+#define BLUESHRK_R715 RES_K(47)
+#define BLUESHRK_R716 RES_K(75)
+#define BLUESHRK_R717 RES_M(1.5)
+#define BLUESHRK_R718 RES_M(2.2)
+#define BLUESHRK_R719 RES_K(560)
+#define BLUESHRK_R720 RES_M(1.5)
+#define BLUESHRK_R721 RES_M(2.2)
+#define BLUESHRK_R722 RES_M(2.2)
+#define BLUESHRK_R723 RES_K(560)
+#define BLUESHRK_R724 RES_K(12)
+#define BLUESHRK_R725 RES_K(68)
+#define BLUESHRK_R726 RES_K(330)
+#define BLUESHRK_R727 RES_M(2.2)
+#define BLUESHRK_R728 RES_M(1)
+#define BLUESHRK_R730 RES_K(56)
+#define BLUESHRK_R1000 RES_K(1)
/* Parts List - Capacitors */
-#define BLUESHRK_C300 CAP_U(0.1)
-#define BLUESHRK_C301 CAP_P(470)
-#define BLUESHRK_C302 CAP_P(470)
-#define BLUESHRK_C303 CAP_U(0.47)
-#define BLUESHRK_C304 CAP_U(1)
-#define BLUESHRK_C305 CAP_U(1)
-#define BLUESHRK_C508 CAP_U(1)
-#define BLUESHRK_C600 CAP_U(2.2)
-#define BLUESHRK_C602 CAP_U(0.022)
-#define BLUESHRK_C603 CAP_U(0.01)
-#define BLUESHRK_C604 CAP_U(0.015)
-#define BLUESHRK_C606 CAP_U(1)
-#define BLUESHRK_C700 CAP_U(22)
-#define BLUESHRK_C701 CAP_U(22)
-#define BLUESHRK_C702 CAP_U(10)
-#define BLUESHRK_C703 CAP_U(0.033)
-#define BLUESHRK_C704 CAP_U(0.015)
-#define BLUESHRK_C705 CAP_U(0.015)
-#define BLUESHRK_C706 CAP_U(0.033)
-#define BLUESHRK_C707 CAP_U(2.2)
-#define BLUESHRK_C708 CAP_U(1)
-#define BLUESHRK_C900 CAP_U(10)
+#define BLUESHRK_C300 CAP_U(0.1)
+#define BLUESHRK_C301 CAP_P(470)
+#define BLUESHRK_C302 CAP_P(470)
+#define BLUESHRK_C303 CAP_U(0.47)
+#define BLUESHRK_C304 CAP_U(1)
+#define BLUESHRK_C305 CAP_U(1)
+#define BLUESHRK_C508 CAP_U(1)
+#define BLUESHRK_C600 CAP_U(2.2)
+#define BLUESHRK_C602 CAP_U(0.022)
+#define BLUESHRK_C603 CAP_U(0.01)
+#define BLUESHRK_C604 CAP_U(0.015)
+#define BLUESHRK_C606 CAP_U(1)
+#define BLUESHRK_C700 CAP_U(22)
+#define BLUESHRK_C701 CAP_U(22)
+#define BLUESHRK_C702 CAP_U(10)
+#define BLUESHRK_C703 CAP_U(0.033)
+#define BLUESHRK_C704 CAP_U(0.015)
+#define BLUESHRK_C705 CAP_U(0.015)
+#define BLUESHRK_C706 CAP_U(0.033)
+#define BLUESHRK_C707 CAP_U(2.2)
+#define BLUESHRK_C708 CAP_U(1)
+#define BLUESHRK_C900 CAP_U(10)
static const discrete_op_amp_osc_info blueshrk_octopus_osc =
{
DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- BLUESHRK_R300, BLUESHRK_R303, BLUESHRK_R301, BLUESHRK_R304, BLUESHRK_R302, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- BLUESHRK_C300, 12 /*c, vP */
+ BLUESHRK_R300, BLUESHRK_R303, BLUESHRK_R301, BLUESHRK_R304, BLUESHRK_R302, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ BLUESHRK_C300, 12 /*c, vP */
};
static const discrete_op_amp_osc_info blueshrk_octopus_vco =
{
DISC_OP_AMP_OSCILLATOR_VCO_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_SQW,
- BLUESHRK_R305, BLUESHRK_R306, BLUESHRK_R307, BLUESHRK_R309, BLUESHRK_R308, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- BLUESHRK_C301, 12 /*c, vP */
+ BLUESHRK_R305, BLUESHRK_R306, BLUESHRK_R307, BLUESHRK_R309, BLUESHRK_R308, 0, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ BLUESHRK_C301, 12 /*c, vP */
};
static const discrete_op_amp_1sht_info blueshrk_octopus_oneshot =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- BLUESHRK_R315, BLUESHRK_R312, BLUESHRK_R314, BLUESHRK_R313, BLUESHRK_R316, /* r1, r2, r3, r4, r5 */
- BLUESHRK_C303, BLUESHRK_C302, /* c1, c2 */
- 0, 12 /* vN, vP */
+ BLUESHRK_R315, BLUESHRK_R312, BLUESHRK_R314, BLUESHRK_R313, BLUESHRK_R316, /* r1, r2, r3, r4, r5 */
+ BLUESHRK_C303, BLUESHRK_C302, /* c1, c2 */
+ 0, 12 /* vN, vP */
};
static const discrete_integrate_info blueshrk_octopus_integrate =
{
DISC_INTEGRATE_OP_AMP_1 | DISC_OP_AMP_IS_NORTON,
- BLUESHRK_R318, BLUESHRK_R317, 0, BLUESHRK_C304, /* r1, r2, r3, c */
- 12, 12, /* v1, vP */
- 0, 0, 0 /* f0, f1, f2 */
+ BLUESHRK_R318, BLUESHRK_R317, 0, BLUESHRK_C304, /* r1, r2, r3, c */
+ 12, 12, /* v1, vP */
+ 0, 0, 0 /* f0, f1, f2 */
};
static const discrete_op_amp_info blueshrk_octopus_amp =
{
DISC_OP_AMP_IS_NORTON,
- BLUESHRK_R310, BLUESHRK_R319, BLUESHRK_R320, BLUESHRK_R321, /* r1, r2, r3, r4 */
- 0, 0, 12 /* c, vN, vP */
+ BLUESHRK_R310, BLUESHRK_R319, BLUESHRK_R320, BLUESHRK_R321, /* r1, r2, r3, r4 */
+ 0, 0, 12 /* c, vN, vP */
};
static const discrete_lfsr_desc blueshrk_lfsr =
{
DISC_CLK_IS_FREQ,
- 17, /* bit length */
+ 17, /* bit length */
/* the RC network fed into pin 4, has the effect
- of presetting all bits high at power up */
- 0x1ffff, /* reset value */
- 4, /* use bit 4 as XOR input 0 */
- 16, /* use bit 16 as XOR input 1 */
- DISC_LFSR_XOR, /* feedback stage1 is XOR */
- DISC_LFSR_OR, /* feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* feedback stage3 replaces the shifted register contents */
- 0x000001, /* everything is shifted into the first bit only */
- DISC_LFSR_FLAG_OUTPUT_SR_SN1, /* output is not inverted */
- 12 /* output bit */
+ of presetting all bits high at power up */
+ 0x1ffff, /* reset value */
+ 4, /* use bit 4 as XOR input 0 */
+ 16, /* use bit 16 as XOR input 1 */
+ DISC_LFSR_XOR, /* feedback stage1 is XOR */
+ DISC_LFSR_OR, /* feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* feedback stage3 replaces the shifted register contents */
+ 0x000001, /* everything is shifted into the first bit only */
+ DISC_LFSR_FLAG_OUTPUT_SR_SN1, /* output is not inverted */
+ 12 /* output bit */
};
static const discrete_555_desc blueshrk_555_H1B =
{
DISC_555_OUT_ENERGY | DISC_555_OUT_DC,
- 5, /* B+ voltage of 555 */
+ 5, /* B+ voltage of 555 */
DEFAULT_555_CHARGE,
- 12 /* the OC buffer H2 converts the output voltage to 12V. */
+ 12 /* the OC buffer H2 converts the output voltage to 12V. */
};
static const discrete_op_amp_osc_info blueshrk_shark_osc1 =
{
DISC_OP_AMP_OSCILLATOR_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_ENERGY,
- 0, BLUESHRK_R701, BLUESHRK_R703, BLUESHRK_R702, 0, BLUESHRK_R700, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- BLUESHRK_C700, 12 /*c, vP */
+ 0, BLUESHRK_R701, BLUESHRK_R703, BLUESHRK_R702, 0, BLUESHRK_R700, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ BLUESHRK_C700, 12 /*c, vP */
};
static const discrete_op_amp_osc_info blueshrk_shark_osc2 =
{
DISC_OP_AMP_OSCILLATOR_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_ENERGY,
- 0, BLUESHRK_R706, BLUESHRK_R708, BLUESHRK_R707, 0, BLUESHRK_R705, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- BLUESHRK_C700, 12 /*c, vP */
+ 0, BLUESHRK_R706, BLUESHRK_R708, BLUESHRK_R707, 0, BLUESHRK_R705, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ BLUESHRK_C700, 12 /*c, vP */
};
static const discrete_op_amp_osc_info blueshrk_shark_osc3 =
{
DISC_OP_AMP_OSCILLATOR_2 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_ENERGY,
- 0, BLUESHRK_R711, BLUESHRK_R713, BLUESHRK_R712, 0, BLUESHRK_R710, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
- BLUESHRK_C700, 12 /*c, vP */
+ 0, BLUESHRK_R711, BLUESHRK_R713, BLUESHRK_R712, 0, BLUESHRK_R710, 0, 0, /* r1, r2, r3, r4, r5, r6, r7, r8 */
+ BLUESHRK_C700, 12 /*c, vP */
};
static const discrete_mixer_desc blueshrk_shark_mixer =
{
DISC_MIXER_IS_RESISTOR,
{BLUESHRK_R704, BLUESHRK_R709, BLUESHRK_R714},
- {0}, {0}, 0, 0, 0, 0, 0, 1 /* r_node, c, rI, rF, cF, cAmp, vRef, gain */
+ {0}, {0}, 0, 0, 0, 0, 0, 1 /* r_node, c, rI, rF, cF, cAmp, vRef, gain */
};
static const discrete_op_amp_info blueshrk_shark_amp_m3 =
{
DISC_OP_AMP_IS_NORTON,
- 0, BLUESHRK_R715 + RES_3_PARALLEL(BLUESHRK_R704, BLUESHRK_R709, BLUESHRK_R714), BLUESHRK_R716, 0, /* r1, r2, r3, r4 */
- 0, 0, 12 /* c, vN, vP */
+ 0, BLUESHRK_R715 + RES_3_PARALLEL(BLUESHRK_R704, BLUESHRK_R709, BLUESHRK_R714), BLUESHRK_R716, 0, /* r1, r2, r3, r4 */
+ 0, 0, 12 /* c, vN, vP */
};
static const discrete_op_amp_osc_info blueshrk_shark_vco =
{
DISC_OP_AMP_OSCILLATOR_VCO_3 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_ENERGY,
- BLUESHRK_R717, BLUESHRK_R722, BLUESHRK_R719, BLUESHRK_R721, BLUESHRK_R720, /* r1, r2, r3, r4, r5 */
- 0, 0, BLUESHRK_R718, /* r6, r7, r8 */
- BLUESHRK_C703, 12 /*c, vP */
+ BLUESHRK_R717, BLUESHRK_R722, BLUESHRK_R719, BLUESHRK_R721, BLUESHRK_R720, /* r1, r2, r3, r4, r5 */
+ 0, 0, BLUESHRK_R718, /* r6, r7, r8 */
+ BLUESHRK_C703, 12 /*c, vP */
};
static const discrete_op_amp_info blueshrk_shark_amp_k3 =
{
DISC_OP_AMP_IS_NORTON,
- BLUESHRK_R724 + BLUESHRK_R725 + BLUESHRK_R726, /* r1 */
- BLUESHRK_R723 , BLUESHRK_R727, BLUESHRK_R728, /* r2, r3, r4 */
- 0, 0, 12 /* c, vN, vP */
+ BLUESHRK_R724 + BLUESHRK_R725 + BLUESHRK_R726, /* r1 */
+ BLUESHRK_R723 , BLUESHRK_R727, BLUESHRK_R728, /* r2, r3, r4 */
+ 0, 0, 12 /* c, vN, vP */
};
static const discrete_mixer_desc blueshrk_mixer =
{
DISC_MIXER_IS_RESISTOR,
{BLUESHRK_R324, RES_2_PARALLEL(BLUESHRK_R520, BLUESHRK_R521) + BLUESHRK_R529, BLUESHRK_R604 + BLUESHRK_R605, BLUESHRK_R730},
- {0}, /* r_node */
+ {0}, /* r_node */
{BLUESHRK_C305, BLUESHRK_C508, BLUESHRK_C606, BLUESHRK_C708},
- 0, 0, 0, BLUESHRK_C900, 0, 1 /* rI, rF, cF, cAmp, vRef, gain */
+ 0, 0, 0, BLUESHRK_C900, 0, 1 /* rI, rF, cF, cAmp, vRef, gain */
};
static DISCRETE_SOUND_START(blueshrk)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUTX_LOGIC(BLUESHRK_OCTOPUS_EN, 12, 0, 0)
DISCRETE_INPUT_LOGIC(BLUESHRK_HIT_EN)
DISCRETE_INPUT_LOGIC(BLUESHRK_SHARK_EN)
@@ -4460,108 +4460,108 @@ static DISCRETE_SOUND_START(blueshrk)
DISCRETE_INPUT_LOGIC(BLUESHRK_GAME_ON_EN)
/************************************************
- * Octopus sound
- ************************************************/
- DISCRETE_OP_AMP_OSCILLATOR(NODE_20, /* IC M5, pin 5 */
- 1, /* ENAB */
+ * Octopus sound
+ ************************************************/
+ DISCRETE_OP_AMP_OSCILLATOR(NODE_20, /* IC M5, pin 5 */
+ 1, /* ENAB */
&blueshrk_octopus_osc)
- DISCRETE_OP_AMP_VCO1(NODE_21, /* IC M5, pin 10 */
- 1, /* ENAB */
- NODE_20, /* VMOD1 */
+ DISCRETE_OP_AMP_VCO1(NODE_21, /* IC M5, pin 10 */
+ 1, /* ENAB */
+ NODE_20, /* VMOD1 */
&blueshrk_octopus_vco)
- DISCRETE_OP_AMP_ONESHOT(NODE_22, /* IC J5, pin 10 */
+ DISCRETE_OP_AMP_ONESHOT(NODE_22, /* IC J5, pin 10 */
BLUESHRK_OCTOPUS_EN, &blueshrk_octopus_oneshot)
- DISCRETE_INTEGRATE(NODE_23, /* IC J5, pin 5 */
- NODE_22, 0, /* TRG0,TRG1 */
+ DISCRETE_INTEGRATE(NODE_23, /* IC J5, pin 5 */
+ NODE_22, 0, /* TRG0,TRG1 */
&blueshrk_octopus_integrate)
- DISCRETE_OP_AMP(BLUESHRK_OCTOPUS_SND, /* IC J5, pin 4 */
- 1, /* ENAB */
- NODE_21, NODE_23, /* IN0,IN1 */
+ DISCRETE_OP_AMP(BLUESHRK_OCTOPUS_SND, /* IC J5, pin 4 */
+ 1, /* ENAB */
+ NODE_21, NODE_23, /* IN0,IN1 */
&blueshrk_octopus_amp)
/************************************************
- * Noise
- ************************************************/
+ * Noise
+ ************************************************/
/* Noise clock was breadboarded and measured at 7700Hz */
- DISCRETE_LFSR_NOISE(BLUESHRK_NOISE_1, /* IC N5, pin 10 (NODE_11) */
- 1, 1, /* ENAB, RESET */
- 7700, 12.0, 0, 12.0 / 2, &blueshrk_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
- DISCRETE_BIT_DECODE(BLUESHRK_NOISE_2, /* IC N5, pin 13 */
- NODE_SUB(BLUESHRK_NOISE_1, 1), 8, 12) /* INP,BIT_N,VOUT */
+ DISCRETE_LFSR_NOISE(BLUESHRK_NOISE_1, /* IC N5, pin 10 (NODE_11) */
+ 1, 1, /* ENAB, RESET */
+ 7700, 12.0, 0, 12.0 / 2, &blueshrk_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
+ DISCRETE_BIT_DECODE(BLUESHRK_NOISE_2, /* IC N5, pin 13 */
+ NODE_SUB(BLUESHRK_NOISE_1, 1), 8, 12) /* INP,BIT_N,VOUT */
/************************************************
- * Shot sound
- ************************************************/
- DISCRETE_CONSTANT(BLUESHRK_SHOT_SND, 0) /* placeholder for incomplete sound */
+ * Shot sound
+ ************************************************/
+ DISCRETE_CONSTANT(BLUESHRK_SHOT_SND, 0) /* placeholder for incomplete sound */
/************************************************
- * Hit sound
- ************************************************/
- DISCRETE_COUNTER(NODE_40, /* IC H3, pin 5 */
- 1, BLUESHRK_HIT_EN, /* ENAB,RESET */
- FREQ_OF_555(BLUESHRK_R601, 0, BLUESHRK_C600), /* CLK - IC H1, pin 9 */
- 0,1, DISC_COUNT_UP, 0, /* MIN,MAX,DIR,INIT0 */
+ * Hit sound
+ ************************************************/
+ DISCRETE_COUNTER(NODE_40, /* IC H3, pin 5 */
+ 1, BLUESHRK_HIT_EN, /* ENAB,RESET */
+ FREQ_OF_555(BLUESHRK_R601, 0, BLUESHRK_C600), /* CLK - IC H1, pin 9 */
+ 0,1, DISC_COUNT_UP, 0, /* MIN,MAX,DIR,INIT0 */
DISC_CLK_IS_FREQ)
- DISCRETE_SWITCH(NODE_41, /* value of toggled caps */
- 1, /* ENAB */
- NODE_40, /* SWITCH */
- BLUESHRK_C602 + BLUESHRK_C603, /* INP0 - IC H3, pin 5 low */
- BLUESHRK_C604) /* INP1 - IC H3, pin 6 low */
- DISCRETE_555_ASTABLE(BLUESHRK_HIT_SND, /* IC H2, pin 2 */
- BLUESHRK_HIT_EN, /* RESET */
- BLUESHRK_R602, BLUESHRK_R603, NODE_41, /* R1,R2,C */
+ DISCRETE_SWITCH(NODE_41, /* value of toggled caps */
+ 1, /* ENAB */
+ NODE_40, /* SWITCH */
+ BLUESHRK_C602 + BLUESHRK_C603, /* INP0 - IC H3, pin 5 low */
+ BLUESHRK_C604) /* INP1 - IC H3, pin 6 low */
+ DISCRETE_555_ASTABLE(BLUESHRK_HIT_SND, /* IC H2, pin 2 */
+ BLUESHRK_HIT_EN, /* RESET */
+ BLUESHRK_R602, BLUESHRK_R603, NODE_41, /* R1,R2,C */
&blueshrk_555_H1B)
/************************************************
- * Shark sound
- ************************************************/
- DISCRETE_OP_AMP_OSCILLATOR(NODE_50, /* IC M3, pin 4 */
- 1, /* ENAB */
+ * Shark sound
+ ************************************************/
+ DISCRETE_OP_AMP_OSCILLATOR(NODE_50, /* IC M3, pin 4 */
+ 1, /* ENAB */
&blueshrk_shark_osc1)
- DISCRETE_OP_AMP_OSCILLATOR(NODE_51, /* IC M3, pin 5 */
- 1, /* ENAB */
+ DISCRETE_OP_AMP_OSCILLATOR(NODE_51, /* IC M3, pin 5 */
+ 1, /* ENAB */
&blueshrk_shark_osc2)
- DISCRETE_OP_AMP_OSCILLATOR(NODE_52, /* IC M3, pin 9 */
- 1, /* ENAB */
+ DISCRETE_OP_AMP_OSCILLATOR(NODE_52, /* IC M3, pin 9 */
+ 1, /* ENAB */
&blueshrk_shark_osc3)
DISCRETE_MIXER3(NODE_53,
- 1, /* ENAB */
+ 1, /* ENAB */
NODE_50, NODE_51, NODE_52, &blueshrk_shark_mixer)
/* threshold detector */
/* if any of the above oscillators are low, then the output is low */
- DISCRETE_OP_AMP(NODE_54, /* IC M3, pin 10 */
- 1, /* ENAB */
- 0, NODE_53, /* IN0,IN1 */
+ DISCRETE_OP_AMP(NODE_54, /* IC M3, pin 10 */
+ 1, /* ENAB */
+ 0, NODE_53, /* IN0,IN1 */
&blueshrk_shark_amp_m3)
- DISCRETE_ADDER2(NODE_55, /* diode drops voltage */
- 1, NODE_54, -0.7) /* ENAB,IN0,IN1 */
- DISCRETE_CLAMP(NODE_56, NODE_55, 0, 12) /* IN0,MIN,MAX */
+ DISCRETE_ADDER2(NODE_55, /* diode drops voltage */
+ 1, NODE_54, -0.7) /* ENAB,IN0,IN1 */
+ DISCRETE_CLAMP(NODE_56, NODE_55, 0, 12) /* IN0,MIN,MAX */
/* VCO disabled if any of the above oscillators or enable are low */
- DISCRETE_OP_AMP_VCO1(NODE_57, /* IC K3, pin 5 */
- BLUESHRK_SHARK_EN, NODE_56, /* ENAB,VMOD1 */
+ DISCRETE_OP_AMP_VCO1(NODE_57, /* IC K3, pin 5 */
+ BLUESHRK_SHARK_EN, NODE_56, /* ENAB,VMOD1 */
&blueshrk_shark_vco)
DISCRETE_RCFILTER(NODE_58,
- BLUESHRK_NOISE_1, /* IN0 */
+ BLUESHRK_NOISE_1, /* IN0 */
BLUESHRK_R724, BLUESHRK_C704)
DISCRETE_RCFILTER(NODE_59,
- NODE_58, /* IN0 */
+ NODE_58, /* IN0 */
BLUESHRK_R724 + BLUESHRK_R725, BLUESHRK_C704)
DISCRETE_RCFILTER(NODE_60,
- NODE_59, /* IN0 */
+ NODE_59, /* IN0 */
BLUESHRK_R724 + BLUESHRK_R725 + BLUESHRK_R726, BLUESHRK_C704)
- DISCRETE_OP_AMP(NODE_61, /* IC K3, pin 10 */
- 1, /* ENAB */
- NODE_60, NODE_57, /* IN0,IN1 */
+ DISCRETE_OP_AMP(NODE_61, /* IC K3, pin 10 */
+ 1, /* ENAB */
+ NODE_60, NODE_57, /* IN0,IN1 */
&blueshrk_shark_amp_k3)
/* the opamp output is connected directly to a capacitor */
/* we will simulate this using a 1 ohm resistor */
DISCRETE_RCFILTER(BLUESHRK_SHARK_SND,
- NODE_61, /* IN0 */
+ NODE_61, /* IN0 */
1, BLUESHRK_C707)
/************************************************
- * Combine all sound sources.
- ************************************************/
+ * Combine all sound sources.
+ ************************************************/
DISCRETE_MIXER4(NODE_91,
BLUESHRK_GAME_ON_EN,
BLUESHRK_OCTOPUS_SND,
@@ -4593,7 +4593,7 @@ WRITE8_MEMBER(mw8080bw_state::blueshrk_audio_w)
discrete_sound_w(m_discrete, space, BLUESHRK_SHARK_EN, (data >> 3) & 0x01);
/* if (data & 0x10) enable KILLED DIVER sound, this circuit
- doesn't appear to be on the schematics */
+ doesn't appear to be on the schematics */
discrete_sound_w(m_discrete, space, BLUESHRK_OCTOPUS_EN, (data >> 5) & 0x01);
@@ -4610,159 +4610,159 @@ WRITE8_MEMBER(mw8080bw_state::blueshrk_audio_w)
static const sn76477_interface invad2ct_p1_sn76477_interface =
{
- 0, /* 4 noise_res (N/C) */
- 0, /* 5 filter_res (N/C) */
- 0, /* 6 filter_cap (N/C) */
- 0, /* 7 decay_res (N/C) */
- 0, /* 8 attack_decay_cap (N/C) */
+ 0, /* 4 noise_res (N/C) */
+ 0, /* 5 filter_res (N/C) */
+ 0, /* 6 filter_cap (N/C) */
+ 0, /* 7 decay_res (N/C) */
+ 0, /* 8 attack_decay_cap (N/C) */
RES_K(100), /* 10 attack_res */
- RES_K(56), /* 11 amplitude_res */
- RES_K(10), /* 12 feedback_res */
- 0, /* 16 vco_voltage (N/C) */
- CAP_U(0.1), /* 17 vco_cap */
- RES_K(8.2), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K(120), /* 20 slf_res */
- CAP_U(1.0), /* 21 slf_cap */
- 0, /* 23 oneshot_cap (N/C) */
- 0, /* 24 oneshot_res (N/C) */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(56), /* 11 amplitude_res */
+ RES_K(10), /* 12 feedback_res */
+ 0, /* 16 vco_voltage (N/C) */
+ CAP_U(0.1), /* 17 vco_cap */
+ RES_K(8.2), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K(120), /* 20 slf_res */
+ CAP_U(1.0), /* 21 slf_cap */
+ 0, /* 23 oneshot_cap (N/C) */
+ 0, /* 24 oneshot_res (N/C) */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
};
static const sn76477_interface invad2ct_p2_sn76477_interface =
{
- 0, /* 4 noise_res (N/C) */
- 0, /* 5 filter_res (N/C) */
- 0, /* 6 filter_cap (N/C) */
- 0, /* 7 decay_res (N/C) */
- 0, /* 8 attack_decay_cap (N/C) */
+ 0, /* 4 noise_res (N/C) */
+ 0, /* 5 filter_res (N/C) */
+ 0, /* 6 filter_cap (N/C) */
+ 0, /* 7 decay_res (N/C) */
+ 0, /* 8 attack_decay_cap (N/C) */
RES_K(100), /* 10 attack_res */
- RES_K(56), /* 11 amplitude_res */
- RES_K(10), /* 12 feedback_res */
- 0, /* 16 vco_voltage (N/C) */
+ RES_K(56), /* 11 amplitude_res */
+ RES_K(10), /* 12 feedback_res */
+ 0, /* 16 vco_voltage (N/C) */
CAP_U(0.047), /* 17 vco_cap */
- RES_K(39), /* 18 vco_res */
- 5.0, /* 19 pitch_voltage */
- RES_K(120), /* 20 slf_res */
- CAP_U(1.0), /* 21 slf_cap */
- 0, /* 23 oneshot_cap (N/C) */
- 0, /* 24 oneshot_res (N/C) */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(39), /* 18 vco_res */
+ 5.0, /* 19 pitch_voltage */
+ RES_K(120), /* 20 slf_res */
+ CAP_U(1.0), /* 21 slf_cap */
+ 0, /* 23 oneshot_cap (N/C) */
+ 0, /* 24 oneshot_res (N/C) */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
};
static const discrete_op_amp_1sht_info invad2ct_invader_hit_1sht =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- RES_M(4.7), /* R49 */
- RES_K(100), /* R51 */
- RES_M(1), /* R48 */
- RES_M(1), /* R50 */
- RES_M(2.2), /* R52 */
- CAP_U(0.22), /* C18 */
- CAP_P(470), /* C20 */
- 0, /* vN */
- 12 /* vP */
+ RES_M(4.7), /* R49 */
+ RES_K(100), /* R51 */
+ RES_M(1), /* R48 */
+ RES_M(1), /* R50 */
+ RES_M(2.2), /* R52 */
+ CAP_U(0.22), /* C18 */
+ CAP_P(470), /* C20 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_osc_info invad2ct_invader_hit_osc =
{
DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- RES_M(1), /* R37 */
- RES_K(10), /* R41 */
- RES_K(100), /* R38 */
- RES_K(120), /* R40 */
- RES_M(1), /* R39 */
- 0, /* no r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_U(0.22), /* C16 */
- 12, /* vP */
+ RES_M(1), /* R37 */
+ RES_K(10), /* R41 */
+ RES_K(100), /* R38 */
+ RES_K(120), /* R40 */
+ RES_M(1), /* R39 */
+ 0, /* no r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_U(0.22), /* C16 */
+ 12, /* vP */
};
static const discrete_op_amp_1sht_info invad2ct_brd2_invader_hit_1sht =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- RES_M(4.7), /* R49 */
- RES_K(100), /* R51 */
- RES_M(1), /* R48 */
- RES_M(1), /* R50 */
- RES_M(2.2), /* R52 */
- CAP_U(1), /* C18 */
- CAP_P(470), /* C20 */
- 0, /* vN */
- 12 /* vP */
+ RES_M(4.7), /* R49 */
+ RES_K(100), /* R51 */
+ RES_M(1), /* R48 */
+ RES_M(1), /* R50 */
+ RES_M(2.2), /* R52 */
+ CAP_U(1), /* C18 */
+ CAP_P(470), /* C20 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_op_amp_osc_info invad2ct_brd2_invader_hit_osc =
{
DISC_OP_AMP_OSCILLATOR_1 | DISC_OP_AMP_IS_NORTON | DISC_OP_AMP_OSCILLATOR_OUT_CAP,
- RES_M(1), /* R37 */
- RES_K(10), /* R41 */
- RES_K(100), /* R38 */
- RES_K(120), /* R40 */
- RES_M(1), /* R39 */
- 0, /* no r6 */
- 0, /* no r7 */
- 0, /* no r8 */
- CAP_U(0.1), /* C16 */
- 12, /* vP */
+ RES_M(1), /* R37 */
+ RES_K(10), /* R41 */
+ RES_K(100), /* R38 */
+ RES_K(120), /* R40 */
+ RES_M(1), /* R39 */
+ 0, /* no r6 */
+ 0, /* no r7 */
+ 0, /* no r8 */
+ CAP_U(0.1), /* C16 */
+ 12, /* vP */
};
static const discrete_op_amp_1sht_info invad2ct_missle_1sht =
{
DISC_OP_AMP_1SHT_1 | DISC_OP_AMP_IS_NORTON,
- RES_M(4.7), /* R32 */
- RES_K(100), /* R30 */
- RES_M(1), /* R31 */
- RES_M(1), /* R33 */
- RES_M(2.2), /* R34 */
- CAP_U(0.22), /* C12 */
- CAP_P(470), /* C15 */
- 0, /* vN */
- 12 /* vP */
+ RES_M(4.7), /* R32 */
+ RES_K(100), /* R30 */
+ RES_M(1), /* R31 */
+ RES_M(1), /* R33 */
+ RES_M(2.2), /* R34 */
+ CAP_U(0.22), /* C12 */
+ CAP_P(470), /* C15 */
+ 0, /* vN */
+ 12 /* vP */
};
static const discrete_mixer_desc invad2ct_mixer =
{
- DISC_MIXER_IS_OP_AMP, /* type */
- { RES_K(100), /* R78 */
- RES_K(15) + 100 + 100, /* R134 + R133 + R132 */
- RES_K(150), /* R136 */
- RES_K(150), /* R59 */
- RES_K(10) + RES_K(6.8) + RES_K(5.6), /* R86 + R85 + R84 */
- RES_K(150) }, /* R28 */
- {0}, /* no rNode{} */
+ DISC_MIXER_IS_OP_AMP, /* type */
+ { RES_K(100), /* R78 */
+ RES_K(15) + 100 + 100, /* R134 + R133 + R132 */
+ RES_K(150), /* R136 */
+ RES_K(150), /* R59 */
+ RES_K(10) + RES_K(6.8) + RES_K(5.6), /* R86 + R85 + R84 */
+ RES_K(150) }, /* R28 */
+ {0}, /* no rNode{} */
{ 0,
- 0,
- 0,
- 0,
- 0,
- CAP_U(0.001) }, /* C11 */
- 0, /* no rI */
- RES_K(100), /* R105 */
- 0, /* no cF */
- CAP_U(0.1), /* C45 */
- 0, /* vRef = ground */
- 1 /* gain */
+ 0,
+ 0,
+ 0,
+ 0,
+ CAP_U(0.001) }, /* C11 */
+ 0, /* no rI */
+ RES_K(100), /* R105 */
+ 0, /* no cF */
+ CAP_U(0.1), /* C45 */
+ 0, /* vRef = ground */
+ 1 /* gain */
};
@@ -4813,7 +4813,7 @@ MACHINE_CONFIG_END
WRITE8_MEMBER(mw8080bw_state::invad2ct_audio_1_w)
{
- sn76477_enable_w(m_sn1, (~data >> 0) & 0x01); /* saucer sound */
+ sn76477_enable_w(m_sn1, (~data >> 0) & 0x01); /* saucer sound */
discrete_sound_w(m_discrete, space, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
discrete_sound_w(m_discrete, space, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
@@ -4838,7 +4838,7 @@ WRITE8_MEMBER(mw8080bw_state::invad2ct_audio_2_w)
WRITE8_MEMBER(mw8080bw_state::invad2ct_audio_3_w)
{
- sn76477_enable_w(m_sn2, (~data >> 0) & 0x01); /* saucer sound */
+ sn76477_enable_w(m_sn2, (~data >> 0) & 0x01); /* saucer sound */
discrete_sound_w(m_discrete, space, INVADERS_NODE(INVADERS_MISSILE_EN, 2), data & 0x02);
discrete_sound_w(m_discrete, space, INVADERS_NODE(INVADERS_EXPLOSION_EN, 2), data & 0x04);
diff --git a/src/mame/audio/n8080.c b/src/mame/audio/n8080.c
index 6819514c113..aa402816502 100644
--- a/src/mame/audio/n8080.c
+++ b/src/mame/audio/n8080.c
@@ -31,13 +31,13 @@ static const sn76477_interface sheriff_sn76477_interface =
CAP_N(47) , /* 21 */
CAP_N(47) , /* 23 */
RES_K(560) , /* 24 */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable */
};
@@ -59,13 +59,13 @@ static const sn76477_interface spacefev_sn76477_interface =
CAP_N(47) , /* 21 */
CAP_N(47) , /* 23 */
RES_K(820) , /* 24 */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 0, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 0, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable */
};
diff --git a/src/mame/audio/namco52.c b/src/mame/audio/namco52.c
index 62debf8e664..69f243b86c9 100644
--- a/src/mame/audio/namco52.c
+++ b/src/mame/audio/namco52.c
@@ -152,7 +152,7 @@ WRITE8_DEVICE_HANDLER( namco_52xx_write )
// asserted for one clock cycle ~= 21us.
/* the 52xx uses TSTI to check for an interrupt; it also may be handling
- a timer interrupt, so we need to ensure the IRQ line is held long enough */
+ a timer interrupt, so we need to ensure the IRQ line is held long enough */
space.machine().scheduler().timer_set(attotime::from_usec(5*21), FUNC(namco_52xx_irq_clear), 0, (void *)device);
}
@@ -182,7 +182,7 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( namco_52xx )
- MCFG_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,1)) /* parent clock, internally divided by 6 */
+ MCFG_CPU_ADD("mcu", MB8843, DERIVED_CLOCK(1,1)) /* parent clock, internally divided by 6 */
MCFG_CPU_IO_MAP(namco_52xx_map_io)
MACHINE_CONFIG_END
@@ -270,5 +270,3 @@ const rom_entry *namco_52xx_device::device_rom_region() const
{
return ROM_NAME(namco_52xx );
}
-
-
diff --git a/src/mame/audio/namco52.h b/src/mame/audio/namco52.h
index a338de3bc82..12d05d03189 100644
--- a/src/mame/audio/namco52.h
+++ b/src/mame/audio/namco52.h
@@ -8,11 +8,11 @@
struct namco_52xx_interface
{
- const char * discrete; /* name of the discrete sound device */
- int firstnode; /* index of the first node */
- attoseconds_t extclock; /* external clock period */
- devcb_read8 romread; /* ROM read handler */
- devcb_read8 si; /* SI (pin 6) read handler */
+ const char * discrete; /* name of the discrete sound device */
+ int firstnode; /* index of the first node */
+ attoseconds_t extclock; /* external clock period */
+ devcb_read8 romread; /* ROM read handler */
+ devcb_read8 si; /* SI (pin 6) read handler */
};
@@ -48,7 +48,7 @@ extern const device_type NAMCO_52XX;
/* discrete nodes */
-#define NAMCO_52XX_P_DATA(base) (base)
+#define NAMCO_52XX_P_DATA(base) (base)
-#endif /* NAMCO52_H */
+#endif /* NAMCO52_H */
diff --git a/src/mame/audio/namco54.c b/src/mame/audio/namco54.c
index 5b056d80697..7aa3cc1aa36 100644
--- a/src/mame/audio/namco54.c
+++ b/src/mame/audio/namco54.c
@@ -146,7 +146,7 @@ ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( namco_54xx )
- MCFG_CPU_ADD("mcu", MB8844, DERIVED_CLOCK(1,1)) /* parent clock, internally divided by 6 */
+ MCFG_CPU_ADD("mcu", MB8844, DERIVED_CLOCK(1,1)) /* parent clock, internally divided by 6 */
MCFG_CPU_IO_MAP(namco_54xx_map_io)
MACHINE_CONFIG_END
@@ -226,5 +226,3 @@ const rom_entry *namco_54xx_device::device_rom_region() const
{
return ROM_NAME(namco_54xx );
}
-
-
diff --git a/src/mame/audio/namco54.h b/src/mame/audio/namco54.h
index 17039a473e5..8a8c549c478 100644
--- a/src/mame/audio/namco54.h
+++ b/src/mame/audio/namco54.h
@@ -7,8 +7,8 @@
struct namco_54xx_config
{
- const char *discrete; /* name of the discrete sound device */
- int firstnode; /* index of the first node */
+ const char *discrete; /* name of the discrete sound device */
+ int firstnode; /* index of the first node */
};
@@ -44,10 +44,10 @@ extern const device_type NAMCO_54XX;
/* discrete nodes */
-#define NAMCO_54XX_0_DATA(base) (NODE_RELATIVE(base, 0))
-#define NAMCO_54XX_1_DATA(base) (NODE_RELATIVE(base, 1))
-#define NAMCO_54XX_2_DATA(base) (NODE_RELATIVE(base, 2))
-#define NAMCO_54XX_P_DATA(base) (NODE_RELATIVE(base, 3))
+#define NAMCO_54XX_0_DATA(base) (NODE_RELATIVE(base, 0))
+#define NAMCO_54XX_1_DATA(base) (NODE_RELATIVE(base, 1))
+#define NAMCO_54XX_2_DATA(base) (NODE_RELATIVE(base, 2))
+#define NAMCO_54XX_P_DATA(base) (NODE_RELATIVE(base, 3))
-#endif /* NAMCO54_H */
+#endif /* NAMCO54_H */
diff --git a/src/mame/audio/nitedrvr.c b/src/mame/audio/nitedrvr.c
index 7537b2cb9bd..0ebd0a5c5de 100644
--- a/src/mame/audio/nitedrvr.c
+++ b/src/mame/audio/nitedrvr.c
@@ -13,24 +13,24 @@
static const discrete_lfsr_desc nitedrvr_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 15 /* Output bit */
};
/* Nodes - Sounds */
-#define NITEDRVR_NOISE NODE_10
-#define NITEDRVR_BANG_SND NODE_11
-#define NITEDRVR_MOTOR_SND NODE_12
-#define NITEDRVR_SCREECH1_SND NODE_13
-#define NITEDRVR_SCREECH2_SND NODE_14
+#define NITEDRVR_NOISE NODE_10
+#define NITEDRVR_BANG_SND NODE_11
+#define NITEDRVR_MOTOR_SND NODE_12
+#define NITEDRVR_SCREECH1_SND NODE_13
+#define NITEDRVR_SCREECH2_SND NODE_14
DISCRETE_SOUND_START(nitedrvr)
/************************************************/
@@ -83,15 +83,15 @@ DISCRETE_SOUND_START(nitedrvr)
DISCRETE_ADJUSTMENT(NODE_21, (214.0-27.0)/12/31, (4416.0-27.0)/12/31, DISC_LOGADJ, "MOTOR")
DISCRETE_MULTIPLY(NODE_22, NODE_20, NODE_21)
- DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6) /* F1 = /12*2 = /6 */
+ DISCRETE_MULTADD(NODE_23, NODE_22, 2, 27.0/6) /* F1 = /12*2 = /6 */
DISCRETE_SQUAREWAVE(NODE_24, 1, NODE_23, (786.7/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_25, NODE_24, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_26, NODE_22, 3, 27.0/4) /* F2 = /12*3 = /4 */
+ DISCRETE_MULTADD(NODE_26, NODE_22, 3, 27.0/4) /* F2 = /12*3 = /4 */
DISCRETE_SQUAREWAVE(NODE_27, 1, NODE_26, (786.7/3), 50.0, 0, 0)
DISCRETE_RCFILTER(NODE_28, NODE_27, 10000, 1e-7)
- DISCRETE_MULTADD(NODE_29, NODE_22, 4, 27.0/3) /* F3 = /12*4 = /3 */
+ DISCRETE_MULTADD(NODE_29, NODE_22, 4, 27.0/3) /* F3 = /12*4 = /3 */
DISCRETE_SQUAREWAVE(NODE_30, 1, NODE_29, (786.7/3), 100.0/3, 0, 360.0/3)
DISCRETE_RCFILTER(NODE_31, NODE_30, 10000, 1e-7)
@@ -131,8 +131,8 @@ DISCRETE_SOUND_START(nitedrvr)
DISCRETE_MULTADD(NODE_72, NODE_71, 940.0-630.0, ((940.0-630.0)/2)+630.0)
DISCRETE_SQUAREWAVE(NITEDRVR_SCREECH1_SND, NITEDRVR_SKID1_EN, NODE_72, 226.9, 31.5, 0, 0.0)
- DISCRETE_MULTADD(NODE_75, NODE_71, 1380.0-626.0, 626.0+((1380.0-626.0)/2)) /* Frequency */
- DISCRETE_MULTADD(NODE_76, NODE_71, 32.0-13.0, 13.0+((32.0-13.0)/2)) /* Duty */
+ DISCRETE_MULTADD(NODE_75, NODE_71, 1380.0-626.0, 626.0+((1380.0-626.0)/2)) /* Frequency */
+ DISCRETE_MULTADD(NODE_76, NODE_71, 32.0-13.0, 13.0+((32.0-13.0)/2)) /* Duty */
DISCRETE_SQUAREWAVE(NITEDRVR_SCREECH2_SND, NITEDRVR_SKID2_EN, NODE_75, 226.9, NODE_76, 0, 0.0)
/************************************************/
diff --git a/src/mame/audio/norautp.c b/src/mame/audio/norautp.c
index 9e6f7a20308..1545739ff97 100644
--- a/src/mame/audio/norautp.c
+++ b/src/mame/audio/norautp.c
@@ -14,12 +14,12 @@
static const discrete_555_desc desc_norautp_555 =
{
DISC_555_OUT_ENERGY | DISC_555_OUT_AC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
-#define NORAUTP_SOUND_CIRCUIT(_name, _r1, _r2, _c1, _c2, _c3, _c4) \
+#define NORAUTP_SOUND_CIRCUIT(_name, _r1, _r2, _c1, _c2, _c3, _c4) \
static const discrete_comp_adder_table desc_##_name##_caps = \
{ \
DISC_COMP_P_CAPACITOR, _c4, 3, \
@@ -27,22 +27,22 @@ static const discrete_comp_adder_table desc_##_name##_caps = \
_c3, _c2, _c1 \
} \
}; \
- \
+ \
DISCRETE_SOUND_START( _name ) \
/************************************************ \
- * Input register mapping \
- ************************************************/ \
+ * Input register mapping \
+ ************************************************/ \
DISCRETE_INPUT_LOGIC(NORAUTP_SND_EN) \
DISCRETE_INPUT_DATA (NORAUTP_FREQ_DATA) \
- \
+ \
/************************************************ \
- * Tone Generator \
- ************************************************/ \
+ * Tone Generator \
+ ************************************************/ \
DISCRETE_COMP_ADDER(NODE_20, NORAUTP_FREQ_DATA, &desc_##_name##_caps) \
DISCRETE_555_ASTABLE(NODE_21, \
- NORAUTP_SND_EN, /* RESET */ \
- _r2, _r1, NODE_20, &desc_norautp_555) \
- \
+ NORAUTP_SND_EN, /* RESET */ \
+ _r2, _r1, NODE_20, &desc_norautp_555) \
+ \
DISCRETE_OUTPUT(NODE_21, 65000.0/3.8) \
DISCRETE_SOUND_END
@@ -50,14 +50,14 @@ DISCRETE_SOUND_END
/***** Noraut Poker *****/
/* Parts List - Resistors */
-#define NORAUTP_R1 RES_K(120)
-#define NORAUTP_R2 RES_K(2.2)
+#define NORAUTP_R1 RES_K(120)
+#define NORAUTP_R2 RES_K(2.2)
/* Parts List - Capacitors */
-#define NORAUTP_C1 CAP_U(.01)
-#define NORAUTP_C2 CAP_U(.022)
-#define NORAUTP_C3 CAP_U(.047)
-#define NORAUTP_C4 CAP_U(.01)
+#define NORAUTP_C1 CAP_U(.01)
+#define NORAUTP_C2 CAP_U(.022)
+#define NORAUTP_C3 CAP_U(.047)
+#define NORAUTP_C4 CAP_U(.01)
NORAUTP_SOUND_CIRCUIT(norautp,
NORAUTP_R1, NORAUTP_R2,
@@ -67,14 +67,14 @@ NORAUTP_SOUND_CIRCUIT(norautp,
/***** Draw Poker HI-LO *****/
/* Parts List - Resistors */
-#define DPHL_R1 RES_K(120)
-#define DPHL_R2 RES_K(1)
+#define DPHL_R1 RES_K(120)
+#define DPHL_R2 RES_K(1)
/* Parts List - Capacitors */
-#define DPHL_C1 CAP_U(.01)
-#define DPHL_C2 CAP_U(.022)
-#define DPHL_C3 CAP_U(.05)
-#define DPHL_C4 CAP_U(.01)
+#define DPHL_C1 CAP_U(.01)
+#define DPHL_C2 CAP_U(.022)
+#define DPHL_C3 CAP_U(.05)
+#define DPHL_C4 CAP_U(.01)
NORAUTP_SOUND_CIRCUIT(dphl,
DPHL_R1, DPHL_R2,
@@ -84,14 +84,14 @@ NORAUTP_SOUND_CIRCUIT(dphl,
/***** Kimble Double HI-LO *****/
/* Parts List - Resistors */
-#define KIMBLE_R1 RES_K(100)
-#define KIMBLE_R2 RES_K(1)
+#define KIMBLE_R1 RES_K(100)
+#define KIMBLE_R2 RES_K(1)
/* Parts List - Capacitors */
-#define KIMBLE_C1 CAP_U(.01)
-#define KIMBLE_C2 CAP_U(.022)
-#define KIMBLE_C3 CAP_U(.047)
-#define KIMBLE_C4 CAP_U(.01)
+#define KIMBLE_C1 CAP_U(.01)
+#define KIMBLE_C2 CAP_U(.022)
+#define KIMBLE_C3 CAP_U(.047)
+#define KIMBLE_C4 CAP_U(.01)
NORAUTP_SOUND_CIRCUIT(kimble,
KIMBLE_R1, KIMBLE_R2,
diff --git a/src/mame/audio/orbit.c b/src/mame/audio/orbit.c
index 96229386e9c..04bd7f60b83 100644
--- a/src/mame/audio/orbit.c
+++ b/src/mame/audio/orbit.c
@@ -43,25 +43,25 @@ WRITE8_MEMBER(orbit_state::orbit_noise_rst_w)
static const discrete_lfsr_desc orbit_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 15 /* Output bit */
};
/* Nodes - Sounds */
-#define ORBIT_NOISE NODE_10
-#define ORBIT_NOISE1_SND NODE_11
-#define ORBIT_NOISE2_SND NODE_12
-#define ORBIT_ANOTE1_SND NODE_13
-#define ORBIT_ANOTE2_SND NODE_14
-#define ORBIT_WARNING_SND NODE_15
+#define ORBIT_NOISE NODE_10
+#define ORBIT_NOISE1_SND NODE_11
+#define ORBIT_NOISE2_SND NODE_12
+#define ORBIT_ANOTE1_SND NODE_13
+#define ORBIT_ANOTE2_SND NODE_14
+#define ORBIT_WARNING_SND NODE_15
DISCRETE_SOUND_START(orbit)
/************************************************/
@@ -114,10 +114,10 @@ DISCRETE_SOUND_START(orbit)
/* When there is no music, the game sets the */
/* oscillator to 0Hz. (NOTELD = FF) */
/************************************************/
- DISCRETE_ADDER2(NODE_30, 1, ORBIT_NOTE_FREQ, 1) /* To get values of 1 - 256 */
+ DISCRETE_ADDER2(NODE_30, 1, ORBIT_NOTE_FREQ, 1) /* To get values of 1 - 256 */
DISCRETE_DIVIDE(NODE_31, 1, 12096000.0/256/2, NODE_30)
- DISCRETE_SQUAREWAVE(ORBIT_ANOTE1_SND, ORBIT_NOTE_FREQ, NODE_31, ORBIT_ANOTE1_AMP, 50.0, 0, 0.0) /* NOTE=FF Disables audio */
- DISCRETE_SQUAREWAVE(ORBIT_ANOTE2_SND, ORBIT_NOTE_FREQ, NODE_31, ORBIT_ANOTE2_AMP, 50.0, 0, 0.0) /* NOTE=FF Disables audio */
+ DISCRETE_SQUAREWAVE(ORBIT_ANOTE1_SND, ORBIT_NOTE_FREQ, NODE_31, ORBIT_ANOTE1_AMP, 50.0, 0, 0.0) /* NOTE=FF Disables audio */
+ DISCRETE_SQUAREWAVE(ORBIT_ANOTE2_SND, ORBIT_NOTE_FREQ, NODE_31, ORBIT_ANOTE2_AMP, 50.0, 0, 0.0) /* NOTE=FF Disables audio */
/************************************************/
/* Final mix and output. */
diff --git a/src/mame/audio/phoenix.c b/src/mame/audio/phoenix.c
index 1cfdcef015b..c3c1f2381a5 100644
--- a/src/mame/audio/phoenix.c
+++ b/src/mame/audio/phoenix.c
@@ -43,7 +43,7 @@
****************************************************************************/
#define VMIN 0
-#define VMAX 32767
+#define VMAX 32767
struct c_state
{
@@ -62,12 +62,12 @@ struct n_state
struct phoenix_sound_state
{
- struct c_state m_c24_state;
- struct c_state m_c25_state;
- struct n_state m_noise_state;
- UINT8 m_sound_latch_a;
- sound_stream * m_channel;
- UINT32 * m_poly18;
+ struct c_state m_c24_state;
+ struct c_state m_c25_state;
+ struct n_state m_noise_state;
+ UINT8 m_sound_latch_a;
+ sound_stream * m_channel;
+ UINT32 * m_poly18;
device_t *m_discrete;
device_t *m_tms;
};
@@ -83,11 +83,11 @@ INLINE phoenix_sound_state *get_safe_token( device_t *device )
INLINE int update_c24(phoenix_sound_state *state, int samplerate)
{
/*
- * Noise frequency control (Port B):
- * Bit 6 lo charges C24 (6.8u) via R51 (330) and when
- * bit 6 is hi, C24 is discharged through R52 (20k)
- * in approx. 20000 * 6.8e-6 = 0.136 seconds
- */
+ * Noise frequency control (Port B):
+ * Bit 6 lo charges C24 (6.8u) via R51 (330) and when
+ * bit 6 is hi, C24 is discharged through R52 (20k)
+ * in approx. 20000 * 6.8e-6 = 0.136 seconds
+ */
#define C24 6.8e-6
#define R49 1000
#define R51 330
@@ -129,10 +129,10 @@ INLINE int update_c24(phoenix_sound_state *state, int samplerate)
INLINE int update_c25(phoenix_sound_state *state, int samplerate)
{
/*
- * Bit 7 hi charges C25 (6.8u) over a R50 (1k) and R53 (330) and when
- * bit 7 is lo, C25 is discharged through R54 (47k)
- * in about 47000 * 6.8e-6 = 0.3196 seconds
- */
+ * Bit 7 hi charges C25 (6.8u) over a R50 (1k) and R53 (330) and when
+ * bit 7 is lo, C25 is discharged through R54 (47k)
+ * in about 47000 * 6.8e-6 = 0.3196 seconds
+ */
#define C25 6.8e-6
#define R50 1000
#define R53 330
@@ -180,10 +180,10 @@ INLINE int noise(phoenix_sound_state *state, int samplerate)
n_state *noise_state = &state->m_noise_state;
/*
- * The voltage levels are added and control I(CE) of transistor TR1
- * (NPN) which then controls the noise clock frequency (linearily?).
- * level = voltage at the output of the op-amp controlling the noise rate.
- */
+ * The voltage levels are added and control I(CE) of transistor TR1
+ * (NPN) which then controls the noise clock frequency (linearily?).
+ * level = voltage at the output of the op-amp controlling the noise rate.
+ */
if( vc24 < vc25 )
level = vc24 + (vc25 - vc24) / 2;
else
@@ -191,12 +191,12 @@ INLINE int noise(phoenix_sound_state *state, int samplerate)
frequency = 588 + 6325 * level / 32768;
- /*
- * NE555: Ra=47k, Rb=1k, C=0.05uF
- * minfreq = 1.44 / ((47000+2*1000) * 0.05e-6) = approx. 588 Hz
- * R71 (2700 Ohms) parallel to R73 (47k Ohms) = approx. 2553 Ohms
- * maxfreq = 1.44 / ((2553+2*1000) * 0.05e-6) = approx. 6325 Hz
- */
+ /*
+ * NE555: Ra=47k, Rb=1k, C=0.05uF
+ * minfreq = 1.44 / ((47000+2*1000) * 0.05e-6) = approx. 588 Hz
+ * R71 (2700 Ohms) parallel to R73 (47k Ohms) = approx. 2553 Ohms
+ * maxfreq = 1.44 / ((2553+2*1000) * 0.05e-6) = approx. 6325 Hz
+ */
noise_state->counter -= frequency;
if( noise_state->counter <= 0 )
{
@@ -247,92 +247,92 @@ static STREAM_UPDATE( phoenix_sound_update )
static const discrete_555_desc phoenix_effect1_555 =
{
DISC_555_OUT_COUNT_F_X,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_555_desc phoenix_effect2_555 =
{
DISC_555_OUT_ENERGY,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_CHARGE,
- 4.0 // loaded output voltage
+ 4.0 // loaded output voltage
};
static const discrete_comp_adder_table phoenix_effect2_cap_sel =
{
DISC_COMP_P_CAPACITOR,
- CAP_U(0.01), // C18
+ CAP_U(0.01), // C18
2,
- {CAP_U(0.47), CAP_U(1)} // C16, C17
+ {CAP_U(0.47), CAP_U(1)} // C16, C17
};
static const discrete_mixer_desc phoenix_effect2_mixer1 =
{
DISC_MIXER_IS_RESISTOR,
- {RES_K(10), RES_K(5.1) + RES_K(5.1), RES_K(5)}, // R42, R45+R46, internal 555 R
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- RES_K(10), // internal 555
- 0,0, // No Filter
- 0, // not used in resistor network
- 1 // final gain
+ {RES_K(10), RES_K(5.1) + RES_K(5.1), RES_K(5)}, // R42, R45+R46, internal 555 R
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ RES_K(10), // internal 555
+ 0,0, // No Filter
+ 0, // not used in resistor network
+ 1 // final gain
};
static const discrete_mixer_desc phoenix_effect2_mixer2 =
{
DISC_MIXER_IS_RESISTOR,
- {RES_K(5.1), RES_K(5.1)}, // R45, R46
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- 0, // No rF
- 0,0, // No Filter
- 0, // not used in resistor network
- 1 // final gain
+ {RES_K(5.1), RES_K(5.1)}, // R45, R46
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ 0, // No rF
+ 0,0, // No Filter
+ 0, // not used in resistor network
+ 1 // final gain
};
static const discrete_mixer_desc phoenix_effect2_mixer3 =
{
DISC_MIXER_IS_RESISTOR,
- {RES_K(10), RES_K(5.1), RES_K(5)}, // R42, R46, internal 555 R
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- RES_K(10), // internal 555
- 0,0, // No Filter
- 0, // not used in resistor network
- 1 // final gain
+ {RES_K(10), RES_K(5.1), RES_K(5)}, // R42, R46, internal 555 R
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ RES_K(10), // internal 555
+ 0,0, // No Filter
+ 0, // not used in resistor network
+ 1 // final gain
};
static const discrete_mixer_desc phoenix_mixer =
{
DISC_MIXER_IS_RESISTOR,
- {RES_K(10+47), RES_K(10+20), RES_K(20), RES_K(20)}, // R19+R21, R38+R47, R67, R68
- {0}, // No variable resistor nodes
- {CAP_U(10), CAP_U(10), CAP_U(.1), CAP_U(10)}, // C6, C31, C29, C30
- 0, // No rI
- RES_K(10), // VR1
- 0, // No Filter
- CAP_U(10), // C32
- 0, // not used in resistor network
- 40000 // final gain
+ {RES_K(10+47), RES_K(10+20), RES_K(20), RES_K(20)}, // R19+R21, R38+R47, R67, R68
+ {0}, // No variable resistor nodes
+ {CAP_U(10), CAP_U(10), CAP_U(.1), CAP_U(10)}, // C6, C31, C29, C30
+ 0, // No rI
+ RES_K(10), // VR1
+ 0, // No Filter
+ CAP_U(10), // C32
+ 0, // not used in resistor network
+ 40000 // final gain
};
/* Nodes - Inputs */
-#define PHOENIX_EFFECT_1_DATA NODE_01
-#define PHOENIX_EFFECT_1_FREQ NODE_02
-#define PHOENIX_EFFECT_1_FILT NODE_03
-#define PHOENIX_EFFECT_2_DATA NODE_04
-#define PHOENIX_EFFECT_2_FREQ NODE_05
-#define PHOENIX_EFFECT_3_EN NODE_06
-#define PHOENIX_EFFECT_4_EN NODE_07
+#define PHOENIX_EFFECT_1_DATA NODE_01
+#define PHOENIX_EFFECT_1_FREQ NODE_02
+#define PHOENIX_EFFECT_1_FILT NODE_03
+#define PHOENIX_EFFECT_2_DATA NODE_04
+#define PHOENIX_EFFECT_2_FREQ NODE_05
+#define PHOENIX_EFFECT_3_EN NODE_06
+#define PHOENIX_EFFECT_4_EN NODE_07
/* Nodes - Sounds */
-#define PHOENIX_EFFECT_1_SND NODE_10
-#define PHOENIX_EFFECT_2_SND NODE_11
-#define PHOENIX_EFFECT_3_SND 0
-#define PHOENIX_EFFECT_4_SND 0
+#define PHOENIX_EFFECT_1_SND NODE_10
+#define PHOENIX_EFFECT_2_SND NODE_11
+#define PHOENIX_EFFECT_3_SND 0
+#define PHOENIX_EFFECT_4_SND 0
DISCRETE_SOUND_START(phoenix)
@@ -353,134 +353,134 @@ DISCRETE_SOUND_START(phoenix)
/* - level 5 spaceship */
/************************************************/
/* R22 has been confirmed on real boards as 470 ohm, not 47k in schematics */
- DISCRETE_RCDISC4(NODE_20, /* IC52 output pin 7 */
- 1, /* ENAB */
- PHOENIX_EFFECT_1_FREQ, /* Input to O.C. inverter */
- 470, /* R22 */
- RES_K(100), /* R23 */
- RES_K(33), /* R24 */
- CAP_U(6.8), /* C7 */
- 12, /* 12V supply */
- 1) /* Circuit type 1 */
- DISCRETE_555_ASTABLE_CV(NODE_21, /* IC20 pin 6 */
- 1, /* ENAB */
- RES_K(47), /* R25 */
- RES_K(47), /* R26 */
- CAP_U(.001), /* C8 */
- NODE_20, /* IC48 pin 5 input */
+ DISCRETE_RCDISC4(NODE_20, /* IC52 output pin 7 */
+ 1, /* ENAB */
+ PHOENIX_EFFECT_1_FREQ, /* Input to O.C. inverter */
+ 470, /* R22 */
+ RES_K(100), /* R23 */
+ RES_K(33), /* R24 */
+ CAP_U(6.8), /* C7 */
+ 12, /* 12V supply */
+ 1) /* Circuit type 1 */
+ DISCRETE_555_ASTABLE_CV(NODE_21, /* IC20 pin 6 */
+ 1, /* ENAB */
+ RES_K(47), /* R25 */
+ RES_K(47), /* R26 */
+ CAP_U(.001), /* C8 */
+ NODE_20, /* IC48 pin 5 input */
&phoenix_effect1_555)
/* LS163 counts rising edge, but the LS14 inverts that */
- DISCRETE_NOTE(NODE_22, /* IC21 pin 5 output */
- 1, /* ENAB */
- NODE_21, /* IC13 pin 2 clock input */
- PHOENIX_EFFECT_1_DATA, /* Pre-load data */
- 0x0f, /* Maximum count of first counter 0-15 (IC13) */
- 1, /* Maximum count of second counter 0-1 (IC21) */
- DISC_CLK_BY_COUNT | DISC_OUT_IS_ENERGY) /* Module is clocked externally and we anti-alias output */
+ DISCRETE_NOTE(NODE_22, /* IC21 pin 5 output */
+ 1, /* ENAB */
+ NODE_21, /* IC13 pin 2 clock input */
+ PHOENIX_EFFECT_1_DATA, /* Pre-load data */
+ 0x0f, /* Maximum count of first counter 0-15 (IC13) */
+ 1, /* Maximum count of second counter 0-1 (IC21) */
+ DISC_CLK_BY_COUNT | DISC_OUT_IS_ENERGY) /* Module is clocked externally and we anti-alias output */
/* When FILT is enabled, the effect is filtered.
- * While the R20 does decrease the amplitude a little, its main purpose
- * is to discharge C5 when the filter is disabled. */
+ * While the R20 does decrease the amplitude a little, its main purpose
+ * is to discharge C5 when the filter is disabled. */
DISCRETE_SWITCH(NODE_23,
- 1, /* ENAB */
+ 1, /* ENAB */
PHOENIX_EFFECT_1_FILT,
DEFAULT_TTL_V_LOGIC_1,
- DEFAULT_TTL_V_LOGIC_1 * RES_K(100) / (RES_K(10) + RES_K(100))) /* R20, R19 */
+ DEFAULT_TTL_V_LOGIC_1 * RES_K(100) / (RES_K(10) + RES_K(100))) /* R20, R19 */
DISCRETE_MULTIPLY(NODE_24,
- NODE_22,
- NODE_23)
+ NODE_22,
+ NODE_23)
DISCRETE_RCFILTER(NODE_25,
- NODE_24,
- 1.0/(1.0/RES_K(10) + 1.0/RES_K(100)), /* R19, R20 */
- CAP_U(.047)) /* C5 */
+ NODE_24,
+ 1.0/(1.0/RES_K(10) + 1.0/RES_K(100)), /* R19, R20 */
+ CAP_U(.047)) /* C5 */
DISCRETE_SWITCH(PHOENIX_EFFECT_1_SND,
- 1, /* ENAB */
+ 1, /* ENAB */
PHOENIX_EFFECT_1_FILT,
- NODE_24, /* non-filtered */
- NODE_25) /* filtered */
+ NODE_24, /* non-filtered */
+ NODE_25) /* filtered */
/************************************************/
/* Effect 2 */
/* - bird flying, bird/phoenix/spaceship hit */
/* - phoenix wing hit */
/************************************************/
- DISCRETE_COMP_ADDER(NODE_30, /* total capacitance of selected capacitors */
- PHOENIX_EFFECT_2_FREQ, /* passed selection bits */
+ DISCRETE_COMP_ADDER(NODE_30, /* total capacitance of selected capacitors */
+ PHOENIX_EFFECT_2_FREQ, /* passed selection bits */
&phoenix_effect2_cap_sel)
/* Part of the frequency select also effects the gain */
- DISCRETE_TRANSFORM2(NODE_31, /* 0/1 state of PHOENIX_EFFECT_2_FREQ high bit */
+ DISCRETE_TRANSFORM2(NODE_31, /* 0/1 state of PHOENIX_EFFECT_2_FREQ high bit */
PHOENIX_EFFECT_2_FREQ, 2, "01&1/") // get bit 0x02
- DISCRETE_SWITCH(NODE_32, /* voltage level */
- 1, /* ENAB */
- NODE_31, /* PHOENIX_EFFECT_2_FREQ high bit determines voltage level */
+ DISCRETE_SWITCH(NODE_32, /* voltage level */
+ 1, /* ENAB */
+ NODE_31, /* PHOENIX_EFFECT_2_FREQ high bit determines voltage level */
DEFAULT_TTL_V_LOGIC_1,
DEFAULT_TTL_V_LOGIC_1 / 2)
- DISCRETE_555_ASTABLE(NODE_33, /* pin 3 output of IC44 */
- 1, /* ENAB */
- RES_K(47), /* R40 */
- RES_K(100), /* R41 */
- NODE_30, /* C16, C17, C18 combined */
- &phoenix_effect2_555)
+ DISCRETE_555_ASTABLE(NODE_33, /* pin 3 output of IC44 */
+ 1, /* ENAB */
+ RES_K(47), /* R40 */
+ RES_K(100), /* R41 */
+ NODE_30, /* C16, C17, C18 combined */
+ &phoenix_effect2_555)
/* C20 has been confirmed on real boards as 1uF, not 10uF in schematics */
- DISCRETE_555_ASTABLE(NODE_34, /* pin 3 output of IC51 */
- 1, /* ENAB */
- RES_K(510), /* R23 */
- RES_K(510), /* R24 */
- CAP_U(1), /* C20 */
- &phoenix_effect2_555)
+ DISCRETE_555_ASTABLE(NODE_34, /* pin 3 output of IC51 */
+ 1, /* ENAB */
+ RES_K(510), /* R23 */
+ RES_K(510), /* R24 */
+ CAP_U(1), /* C20 */
+ &phoenix_effect2_555)
/* R45 & R46 have been confirmed on real boards as 5.1k, not 51k in schematics */
/* We need to work backwards here and calculate the voltage at the junction of R42 & R46 */
/* If you remove C22 from the real PCB, you can WAVELOG NODE_35 with a gain of 1000 and compare
- * it against the junction of R42 & R46 on a real PCB. */
- DISCRETE_MIXER3(NODE_35, /* Voltage at junction of R42 & R46 with C22 removed */
- 1, /* ENAB */
- NODE_33, /* output from IC44 */
- NODE_34, /* output from IC51 */
- 5, /* B+ connected internally to pin 5 of 555 */
+ * it against the junction of R42 & R46 on a real PCB. */
+ DISCRETE_MIXER3(NODE_35, /* Voltage at junction of R42 & R46 with C22 removed */
+ 1, /* ENAB */
+ NODE_33, /* output from IC44 */
+ NODE_34, /* output from IC51 */
+ 5, /* B+ connected internally to pin 5 of 555 */
&phoenix_effect2_mixer1)
/* Then calculate the voltage going to C22 */
/* If you remove C22 from the real PCB, you can WAVELOG NODE_36 with a gain of 1000 and compare
- * it against the junction of R45 & R46 on a real PCB. */
- DISCRETE_MIXER2(NODE_36, /* Voltage at junction of R45 & R46 with C22 removed */
- 1, /* ENAB */
- NODE_34, /* pin 3 output of IC51 */
- NODE_35, /* Voltage at junction of R42 & R46 with C22 removed */
+ * it against the junction of R45 & R46 on a real PCB. */
+ DISCRETE_MIXER2(NODE_36, /* Voltage at junction of R45 & R46 with C22 removed */
+ 1, /* ENAB */
+ NODE_34, /* pin 3 output of IC51 */
+ NODE_35, /* Voltage at junction of R42 & R46 with C22 removed */
&phoenix_effect2_mixer2)
/* C22 charging is R45 in parallel with R46, R42 and the 555 CV internal resistance */
DISCRETE_RCFILTER(NODE_37,
- NODE_36,
- 1.0/ (1.0/RES_K(5.1) + (1.0/(RES_K(5.1) + 1.0/(1.0/RES_K(10) + 1.0/RES_K(5) + 1.0/RES_K(10)) ))),
- CAP_U(100)) /* R45, R46, R42, internal 555 Rs, C22 */
+ NODE_36,
+ 1.0/ (1.0/RES_K(5.1) + (1.0/(RES_K(5.1) + 1.0/(1.0/RES_K(10) + 1.0/RES_K(5) + 1.0/RES_K(10)) ))),
+ CAP_U(100)) /* R45, R46, R42, internal 555 Rs, C22 */
/* Now mix from C22 on */
/* You can WAVELOG NODE_38 with a gain of 1000 and compare it against IC50 pin 5 on a real PCB. */
- DISCRETE_MIXER3(NODE_38, /* control voltage to pin 5 of IC50 */
- 1, /* ENAB */
- NODE_33, /* pin 3 output of IC44 */
- NODE_37, /* voltage on C22 */
- 5, /* IC50 internally connected to B+ */
+ DISCRETE_MIXER3(NODE_38, /* control voltage to pin 5 of IC50 */
+ 1, /* ENAB */
+ NODE_33, /* pin 3 output of IC44 */
+ NODE_37, /* voltage on C22 */
+ 5, /* IC50 internally connected to B+ */
&phoenix_effect2_mixer3)
- DISCRETE_555_ASTABLE_CV(NODE_39, /* IC20 pin 8 output */
- 1, /* ENAB */
- RES_K(20), /* R47 */
- RES_K(20), /* R48 */
- CAP_U(0.001), /* C23 */
- NODE_38, /* IC50 pin 5 input */
+ DISCRETE_555_ASTABLE_CV(NODE_39, /* IC20 pin 8 output */
+ 1, /* ENAB */
+ RES_K(20), /* R47 */
+ RES_K(20), /* R48 */
+ CAP_U(0.001), /* C23 */
+ NODE_38, /* IC50 pin 5 input */
&phoenix_effect1_555)
- DISCRETE_NOTE(NODE_40, /* IC21 pin 9 output */
- 1, /* ENAB */
- NODE_39, /* IC14 pin 2 clock input */
- PHOENIX_EFFECT_2_DATA, /* Pre-load data */
- 0x0f, /* Maximum count of first counter 0-15 (IC14) */
- 1, /* Maximum count of second counter 0-1 (IC21) */
- DISC_CLK_BY_COUNT | DISC_OUT_IS_ENERGY)
+ DISCRETE_NOTE(NODE_40, /* IC21 pin 9 output */
+ 1, /* ENAB */
+ NODE_39, /* IC14 pin 2 clock input */
+ PHOENIX_EFFECT_2_DATA, /* Pre-load data */
+ 0x0f, /* Maximum count of first counter 0-15 (IC14) */
+ 1, /* Maximum count of second counter 0-1 (IC21) */
+ DISC_CLK_BY_COUNT | DISC_OUT_IS_ENERGY)
DISCRETE_MULTIPLY(PHOENIX_EFFECT_2_SND,
- NODE_40, /* IC21 pin 9 output */
- NODE_32) /* voltage level selected by high bit of PHOENIX_EFFECT_2_FREQ */
+ NODE_40, /* IC21 pin 9 output */
+ NODE_32) /* voltage level selected by high bit of PHOENIX_EFFECT_2_FREQ */
/************************************************/
/* Combine all sound sources. */
/************************************************/
DISCRETE_MIXER4(NODE_90,
- 1, /* ENAB */
+ 1, /* ENAB */
PHOENIX_EFFECT_1_SND,
PHOENIX_EFFECT_2_SND,
PHOENIX_EFFECT_3_SND,
@@ -574,7 +574,7 @@ const device_type PHOENIX = &device_creator<phoenix_sound_device>;
phoenix_sound_device::phoenix_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, PHOENIX, "Phoenix Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(phoenix_sound_state);
}
@@ -607,5 +607,3 @@ void phoenix_sound_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/pleiads.c b/src/mame/audio/pleiads.c
index 1ea38250e8d..c47960faeca 100644
--- a/src/mame/audio/pleiads.c
+++ b/src/mame/audio/pleiads.c
@@ -10,8 +10,8 @@
#include "sound/tms36xx.h"
#include "audio/pleiads.h"
-#define VMIN 0
-#define VMAX 32767
+#define VMIN 0
+#define VMAX 32767
/* fixed 8kHz clock */
#define TONE1_CLOCK 8000
@@ -45,7 +45,7 @@ struct pleiads_sound_state
int m_sound_latch_a;
int m_sound_latch_b;
- int m_sound_latch_c; /* part of the videoreg_w latch */
+ int m_sound_latch_c; /* part of the videoreg_w latch */
UINT32 *m_poly18;
int m_polybit;
@@ -292,9 +292,9 @@ INLINE int tone4(pleiads_sound_state *state, int samplerate)
int sum;
/* Two resistors divide the output voltage of the op-amp between
- * polybit = 0: 0V and level: x * opamp_resistor / (opamp_resistor + polybit_resistor)
- * polybit = 1: level and 5V: x * polybit_resistor / (opamp_resistor + polybit_resistor)
- */
+ * polybit = 0: 0V and level: x * opamp_resistor / (opamp_resistor + polybit_resistor)
+ * polybit = 1: level and 5V: x * polybit_resistor / (opamp_resistor + polybit_resistor)
+ */
if (state->m_polybit)
level = level + (VMAX - level) * state->m_opamp_resistor / (state->m_opamp_resistor + state->m_polybit_resistor);
else
@@ -310,7 +310,7 @@ INLINE int tone4(pleiads_sound_state *state, int samplerate)
/* mix the two signals */
sum = vpc5 * state->m_pa5_resistor / (state->m_pa5_resistor + state->m_pc5_resistor) +
- vpa5 * state->m_pc5_resistor / (state->m_pa5_resistor + state->m_pc5_resistor);
+ vpa5 * state->m_pc5_resistor / (state->m_pa5_resistor + state->m_pc5_resistor);
return (state->m_tone4.output) ? sum : -sum;
}
@@ -364,9 +364,9 @@ INLINE int noise(pleiads_sound_state *state, int samplerate)
int sum = 0;
/*
- * bit 4 of latch A: noise counter rate modulation?
- * CV2 input of lower 556 is connected via 2k resistor
- */
+ * bit 4 of latch A: noise counter rate modulation?
+ * CV2 input of lower 556 is connected via 2k resistor
+ */
if ( state->m_sound_latch_a & 0x10 )
state->m_noise.counter -= state->m_noise.freq * 2 / 3; /* ????? */
else
@@ -381,12 +381,12 @@ INLINE int noise(pleiads_sound_state *state, int samplerate)
}
/* The polynome output bit is used to gate bits 6 + 7 of
- * sound latch A through the upper half of a 4066 chip.
- * Bit 6 is sweeping a capacitor between 0V and 4.7V
- * while bit 7 is connected directly to the 4066.
- * Both outputs are then filtered, bit 7 even twice,
- * but it's beyond me what the filters there are doing...
- */
+ * sound latch A through the upper half of a 4066 chip.
+ * Bit 6 is sweeping a capacitor between 0V and 4.7V
+ * while bit 7 is connected directly to the 4066.
+ * Both outputs are then filtered, bit 7 even twice,
+ * but it's beyond me what the filters there are doing...
+ */
if (state->m_polybit)
{
sum += c_pa6_level;
@@ -436,10 +436,10 @@ WRITE8_DEVICE_HANDLER( pleiads_sound_control_b_w )
pleiads_sound_state *state = get_safe_token(device);
/*
- * pitch selects one of 4 possible clock inputs
- * (actually 3, because IC2 and IC3 are tied together)
- * write note value to TMS3615; voice b1 & b2
- */
+ * pitch selects one of 4 possible clock inputs
+ * (actually 3, because IC2 and IC3 are tied together)
+ * write note value to TMS3615; voice b1 & b2
+ */
int note = data & 15;
int pitch = (data >> 6) & 3;
@@ -449,7 +449,7 @@ WRITE8_DEVICE_HANDLER( pleiads_sound_control_b_w )
logerror("pleiads_sound_control_b_w $%02x\n", data);
if (pitch == 3)
- pitch = 2; /* 2 and 3 are the same */
+ pitch = 2; /* 2 and 3 are the same */
tms36xx_note_w(state->m_tms, pitch, note);
@@ -503,8 +503,8 @@ static DEVICE_START( pleiads_sound )
pleiads_sound_state *state = get_safe_token(device);
/* The real values are _unknown_!
- * I took the ones from Naughty Boy / Pop Flamer
- */
+ * I took the ones from Naughty Boy / Pop Flamer
+ */
/* charge 10u?? (C??) through 330K?? (R??) -> 3.3s */
state->m_pa5.charge_time = 3.3;
@@ -518,16 +518,16 @@ static DEVICE_START( pleiads_sound )
/* discharge 2.2uF?? through 10k?? -> 0.22s */
state->m_pa6.discharge_time = 0.022;
- /* 10k and 10uF */
+ /* 10k and 10uF */
state->m_pb4.charge_time = 0.1;
state->m_pb4.discharge_time = 0.1;
/* charge C49 (22u?) via R47 (2k?) and R48 (1k)
- * time constant (1000+2000) * 22e-6 = 0.066s */
+ * time constant (1000+2000) * 22e-6 = 0.066s */
state->m_pc4.charge_time = 0.066;
/* discharge C49 (22u?) via R48 (1k) and diode D1
- * time constant 1000 * 22e-6 = 0.022s */
+ * time constant 1000 * 22e-6 = 0.022s */
state->m_pc4.discharge_time = 0.022;
/* charge 10u?? through 330 -> 0.0033s */
@@ -547,7 +547,7 @@ static DEVICE_START( pleiads_sound )
state->m_tone3.max_freq = 582;
/* lower 556 upper half: Ra=33k??, Rb=100k??, C=0.0047uF??
- freq = 1.44 / ((33000+2*100000) * 0.0047e-6) = approx. 1315 Hz */
+ freq = 1.44 / ((33000+2*100000) * 0.0047e-6) = approx. 1315 Hz */
state->m_tone4.max_freq = 1315;
/* how to divide the V/C voltage for tone #4 */
@@ -555,8 +555,8 @@ static DEVICE_START( pleiads_sound )
state->m_opamp_resistor = 20;
/* lower 556 lower half: Ra=100k??, Rb=1k??, C=0.01uF??
- freq = 1.44 / ((100000+2*1000) * 0.01e-6) = approx. 1412 Hz */
- state->m_noise.freq = 1412; /* higher noise rate than popflame/naughtyb??? */
+ freq = 1.44 / ((100000+2*1000) * 0.01e-6) = approx. 1412 Hz */
+ state->m_noise.freq = 1412; /* higher noise rate than popflame/naughtyb??? */
DEVICE_START_CALL(common_sh_start);
}
@@ -582,11 +582,11 @@ static DEVICE_START( naughtyb_sound )
state->m_pb4.discharge_time = 0.1;
/* charge 10uF? (C??) via 3k?? (R??) and 2k?? (R28?)
- * time constant (3000+2000) * 10e-6 = 0.05s */
+ * time constant (3000+2000) * 10e-6 = 0.05s */
state->m_pc4.charge_time = 0.05 * 10;
/* discharge 10uF? (C??) via 2k?? R28?? and diode D?
- * time constant 2000 * 10e-6 = 0.02s */
+ * time constant 2000 * 10e-6 = 0.02s */
state->m_pc4.discharge_time = 0.02 * 10;
/* charge 10u through 330 -> 0.0033s */
@@ -606,7 +606,7 @@ static DEVICE_START( naughtyb_sound )
state->m_tone3.max_freq = 322;
/* lower 556 upper half: Ra=33k, Rb=100k, C=0.0047uF
- freq = 1.44 / ((33000+2*100000) * 0.0047e-6) = approx. 1315 Hz */
+ freq = 1.44 / ((33000+2*100000) * 0.0047e-6) = approx. 1315 Hz */
state->m_tone4.max_freq = 1315;
/* how to divide the V/C voltage for tone #4 */
@@ -614,7 +614,7 @@ static DEVICE_START( naughtyb_sound )
state->m_opamp_resistor = 20;
/* lower 556 lower half: Ra=200k, Rb=1k, C=0.01uF
- freq = 1.44 / ((200000+2*1000) * 0.01e-6) = approx. 713 Hz */
+ freq = 1.44 / ((200000+2*1000) * 0.01e-6) = approx. 713 Hz */
state->m_noise.freq = 713;
DEVICE_START_CALL(common_sh_start);
@@ -636,16 +636,16 @@ static DEVICE_START( popflame_sound )
/* discharge 2.2uF through 10K -> 0.022s */
state->m_pa6.discharge_time = 0.022;
- /* 2k and 10uF */
+ /* 2k and 10uF */
state->m_pb4.charge_time = 0.02;
state->m_pb4.discharge_time = 0.02;
/* charge 2.2uF (C49?) via R47 (100) and R48 (1k)
- * time constant (100+1000) * 2.2e-6 = 0.00242 */
+ * time constant (100+1000) * 2.2e-6 = 0.00242 */
state->m_pc4.charge_time = 0.000242;
/* discharge 2.2uF (C49?) via R48 (1k) and diode D1
- * time constant 1000 * 22e-6 = 0.0022s */
+ * time constant 1000 * 22e-6 = 0.0022s */
state->m_pc4.discharge_time = 0.00022;
/* charge 22u (C52 in Pop Flamer) through 10k -> 0.22s */
@@ -665,7 +665,7 @@ static DEVICE_START( popflame_sound )
state->m_tone3.max_freq = 1108;
/* lower 556 upper half: Ra=33k, Rb=100k, C=0.0047uF
- freq = 1.44 / ((33000+2*100000) * 0.0047e-6) = approx. 1315 Hz */
+ freq = 1.44 / ((33000+2*100000) * 0.0047e-6) = approx. 1315 Hz */
state->m_tone4.max_freq = 1315;
/* how to divide the V/C voltage for tone #4 */
@@ -673,7 +673,7 @@ static DEVICE_START( popflame_sound )
state->m_opamp_resistor = 20;
/* lower 556 lower half: Ra=200k, Rb=1k, C=0.01uF
- freq = 1.44 / ((200000+2*1000) * 0.01e-6) = approx. 713 Hz */
+ freq = 1.44 / ((200000+2*1000) * 0.01e-6) = approx. 713 Hz */
state->m_noise.freq = 713;
DEVICE_START_CALL(common_sh_start);
@@ -683,14 +683,14 @@ const device_type PLEIADS = &device_creator<pleiads_sound_device>;
pleiads_sound_device::pleiads_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, PLEIADS, "Pleiads Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(pleiads_sound_state);
}
pleiads_sound_device::pleiads_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(pleiads_sound_state);
}
@@ -797,5 +797,3 @@ void popflame_sound_device::sound_stream_update(sound_stream &stream, stream_sam
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/pleiads.h b/src/mame/audio/pleiads.h
index 6c173920e74..492cd12b3bc 100644
--- a/src/mame/audio/pleiads.h
+++ b/src/mame/audio/pleiads.h
@@ -3,7 +3,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( pleiads_sound_control_b_w );
DECLARE_WRITE8_DEVICE_HANDLER( pleiads_sound_control_c_w );
class pleiads_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
pleiads_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -59,4 +59,3 @@ private:
};
extern const device_type POPFLAME;
-
diff --git a/src/mame/audio/polepos.c b/src/mame/audio/polepos.c
index 421508cab6e..ced9d354089 100644
--- a/src/mame/audio/polepos.c
+++ b/src/mame/audio/polepos.c
@@ -9,15 +9,15 @@
#include "namco54.h"
#include "includes/polepos.h"
-#define OUTPUT_RATE 24000
+#define OUTPUT_RATE 24000
-#define POLEPOS_R166 1000.0
-#define POLEPOS_R167 2200.0
-#define POLEPOS_R168 4700.0
+#define POLEPOS_R166 1000.0
+#define POLEPOS_R167 2200.0
+#define POLEPOS_R168 4700.0
/* resistor values when shorted by 4066 running at 5V */
-#define POLEPOS_R166_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250)
-#define POLEPOS_R167_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250)
-#define POLEPOS_R168_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250)
+#define POLEPOS_R166_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250)
+#define POLEPOS_R167_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250)
+#define POLEPOS_R168_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250)
struct polepos_sound_state
{
@@ -93,13 +93,13 @@ static STREAM_UPDATE( engine_sound_update )
{
filter2_step(&state->m_filter_engine[loop]);
/* The op-amp powered @ 5V will clip to 0V & 3.5V.
- * Adjusted to vRef of 2V, we will clip as follows: */
+ * Adjusted to vRef of 2V, we will clip as follows: */
if (state->m_filter_engine[loop].y0 > 1.5) state->m_filter_engine[loop].y0 = 1.5;
if (state->m_filter_engine[loop].y0 < -2) state->m_filter_engine[loop].y0 = -2;
i_total += state->m_filter_engine[loop].y0 / r_filt_out[loop];
}
- i_total *= r_filt_total * 32000/2; /* now contains voltage adjusted by final gain */
+ i_total *= r_filt_total * 32000/2; /* now contains voltage adjusted by final gain */
*buffer++ = (int)i_total;
state->m_current_position += step;
@@ -122,7 +122,7 @@ static DEVICE_START( polepos_sound )
filter_opamp_m_bandpass_setup(device, RES_K(150), RES_K(22), RES_K(330), CAP_U(.0047), CAP_U(.0047),
&state->m_filter_engine[1]);
/* Filter 3 is a little different. Because of the input capacitor, it is
- * a high pass filter. */
+ * a high pass filter. */
filter2_setup(device, FILTER_HIGHPASS, 950, Q_TO_DAMP(.707), 1,
&state->m_filter_engine[2]);
}
@@ -170,32 +170,32 @@ WRITE8_DEVICE_HANDLER( polepos_engine_sound_msb_w )
*************************************/
/* nodes - sounds */
-#define POLEPOS_CHANL1_SND NODE_11
-#define POLEPOS_CHANL2_SND NODE_12
-#define POLEPOS_CHANL3_SND NODE_13
-#define POLEPOS_CHANL4_SND NODE_14
+#define POLEPOS_CHANL1_SND NODE_11
+#define POLEPOS_CHANL2_SND NODE_12
+#define POLEPOS_CHANL3_SND NODE_13
+#define POLEPOS_CHANL4_SND NODE_14
#define POLEPOS_54XX_DAC_R (1.0 / (1.0 / RES_K(47) + 1.0 / RES_K(22) + 1.0 / RES_K(10) + 1.0 / RES_K(4.7)))
static const discrete_dac_r1_ladder polepos_54xx_dac =
{
- 4, /* number of DAC bits */
+ 4, /* number of DAC bits */
/* 54XX_0 54XX_1 54XX_2 */
- { RES_K(47), /* R124, R136, R152 */
- RES_K(22), /* R120, R132, R142 */
- RES_K(10), /* R119, R131, R138 */
- RES_K(4.7)}, /* R118, R126, R103 */
- 0, 0, 0, 0 /* nothing extra */
+ { RES_K(47), /* R124, R136, R152 */
+ RES_K(22), /* R120, R132, R142 */
+ RES_K(10), /* R119, R131, R138 */
+ RES_K(4.7)}, /* R118, R126, R103 */
+ 0, 0, 0, 0 /* nothing extra */
};
#define POLEPOS_52XX_DAC_R (1.0 / (1.0 / RES_K(100) + 1.0 / RES_K(47) + 1.0 / RES_K(22) + 1.0 / RES_K(10)))
static const discrete_dac_r1_ladder polepos_52xx_dac =
{
- 4, /* number of DAC bits */
- { RES_K(100), /* R160 */
- RES_K(47), /* R159 */
- RES_K(22), /* R155 */
- RES_K(10)}, /* R154 */
- 0, 0, 0, 0 /* nothing extra */
+ 4, /* number of DAC bits */
+ { RES_K(100), /* R160 */
+ RES_K(47), /* R159 */
+ RES_K(22), /* R155 */
+ RES_K(10)}, /* R154 */
+ 0, 0, 0, 0 /* nothing extra */
};
/* R117 R116 R117 */
@@ -203,146 +203,146 @@ static const discrete_dac_r1_ladder polepos_52xx_dac =
static const discrete_op_amp_filt_info polepos_chanl1_filt =
{
- POLEPOS_54XX_DAC_R + RES_K(22), /* R121 */
- 0, /* no second input */
- RES_K(12), /* R125 */
- 0, /* not used */
- RES_K(120), /* R122 */
- CAP_U(0.0022), /* C27 */
- CAP_U(0.0022), /* C28 */
- 0, /* not used */
- POLEPOS_VREF, /* vRef */
- 5, /* vP */
- 0 /* vN */
+ POLEPOS_54XX_DAC_R + RES_K(22), /* R121 */
+ 0, /* no second input */
+ RES_K(12), /* R125 */
+ 0, /* not used */
+ RES_K(120), /* R122 */
+ CAP_U(0.0022), /* C27 */
+ CAP_U(0.0022), /* C28 */
+ 0, /* not used */
+ POLEPOS_VREF, /* vRef */
+ 5, /* vP */
+ 0 /* vN */
};
static const discrete_op_amp_filt_info polepos_chanl2_filt =
{
- POLEPOS_54XX_DAC_R + RES_K(15), /* R133 */
- 0, /* no second input */
- RES_K(15), /* R137 */
- 0, /* not used */
- RES_K(120), /* R134 */
- CAP_U(0.022), /* C29 */
- CAP_U(0.022), /* C30 */
- 0, /* not used */
- POLEPOS_VREF, /* vRef */
- 5, /* vP */
- 0 /* vN */
+ POLEPOS_54XX_DAC_R + RES_K(15), /* R133 */
+ 0, /* no second input */
+ RES_K(15), /* R137 */
+ 0, /* not used */
+ RES_K(120), /* R134 */
+ CAP_U(0.022), /* C29 */
+ CAP_U(0.022), /* C30 */
+ 0, /* not used */
+ POLEPOS_VREF, /* vRef */
+ 5, /* vP */
+ 0 /* vN */
};
static const discrete_op_amp_filt_info polepos_chanl3_filt =
{
- POLEPOS_54XX_DAC_R + RES_K(22), /* R139 */
- 0, /* no second input */
- RES_K(22), /* R143 */
- 0, /* not used */
- RES_K(180), /* R140 */
- CAP_U(0.047), /* C33 */
- CAP_U(0.047), /* C34 */
- 0, /* not used */
- POLEPOS_VREF, /* vRef */
- 5, /* vP */
- 0 /* vN */
+ POLEPOS_54XX_DAC_R + RES_K(22), /* R139 */
+ 0, /* no second input */
+ RES_K(22), /* R143 */
+ 0, /* not used */
+ RES_K(180), /* R140 */
+ CAP_U(0.047), /* C33 */
+ CAP_U(0.047), /* C34 */
+ 0, /* not used */
+ POLEPOS_VREF, /* vRef */
+ 5, /* vP */
+ 0 /* vN */
};
DISCRETE_SOUND_START(polepos)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_DATA(NAMCO_54XX_0_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_54XX_1_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_54XX_2_DATA(NODE_01))
DISCRETE_INPUT_DATA(NAMCO_52XX_P_DATA(NODE_04))
/************************************************
- * CHANL1 sound
- ************************************************/
+ * CHANL1 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_20,
NAMCO_54XX_2_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&polepos_54xx_dac)
DISCRETE_OP_AMP_FILTER(NODE_21,
- 1, /* ENAB */
- NODE_20, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_20, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &polepos_chanl1_filt)
/* fake it so 0 is now vRef */
DISCRETE_ADDER2(POLEPOS_CHANL1_SND,
- 1, /* ENAB */
+ 1, /* ENAB */
NODE_21, -POLEPOS_VREF)
/************************************************
- * CHANL2 sound
- ************************************************/
+ * CHANL2 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_30,
NAMCO_54XX_1_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&polepos_54xx_dac)
DISCRETE_OP_AMP_FILTER(NODE_31,
- 1, /* ENAB */
- NODE_30, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_30, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &polepos_chanl2_filt)
/* fake it so 0 is now vRef */
DISCRETE_ADDER2(POLEPOS_CHANL2_SND,
- 1, /* ENAB */
+ 1, /* ENAB */
NODE_31, -POLEPOS_VREF)
/************************************************
- * CHANL3 sound
- ************************************************/
+ * CHANL3 sound
+ ************************************************/
DISCRETE_DAC_R1(NODE_40,
NAMCO_54XX_0_DATA(NODE_01),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&polepos_54xx_dac)
DISCRETE_OP_AMP_FILTER(NODE_41,
- 1, /* ENAB */
- NODE_40, /* INP0 */
- 0, /* INP1 - not used */
+ 1, /* ENAB */
+ NODE_40, /* INP0 */
+ 0, /* INP1 - not used */
DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &polepos_chanl3_filt)
/* fake it so 0 is now vRef */
DISCRETE_ADDER2(POLEPOS_CHANL3_SND,
- 1, /* ENAB */
+ 1, /* ENAB */
NODE_41, -POLEPOS_VREF)
/************************************************
- * CHANL4 sound
- ************************************************/
+ * CHANL4 sound
+ ************************************************/
/* this circuit was simulated in SPICE and an equivalent filter circuit generated */
DISCRETE_DAC_R1(NODE_50,
NAMCO_52XX_P_DATA(NODE_04),
- 4, /* 4V - unmeasured*/
+ 4, /* 4V - unmeasured*/
&polepos_52xx_dac)
/* fake it so 0 is now vRef */
DISCRETE_ADDER2(NODE_51,
- 1, /* ENAB */
+ 1, /* ENAB */
NODE_50, -POLEPOS_VREF)
DISCRETE_FILTER2(NODE_52,
- 1, /* ENAB */
- NODE_51, /* INP0 */
- 100, /* FREQ */
- 1.0 / 0.3, /* DAMP */
+ 1, /* ENAB */
+ NODE_51, /* INP0 */
+ 100, /* FREQ */
+ 1.0 / 0.3, /* DAMP */
DISC_FILTER_HIGHPASS)
DISCRETE_FILTER2(NODE_53,
- 1, /* ENAB */
- NODE_52, /* INP0 */
- 1200, /* FREQ */
- 1.0 / 0.8, /* DAMP */
+ 1, /* ENAB */
+ NODE_52, /* INP0 */
+ 1200, /* FREQ */
+ 1.0 / 0.8, /* DAMP */
DISC_FILTER_LOWPASS)
DISCRETE_GAIN(NODE_54,
- NODE_53, /* IN0 */
- 0.5 /* overall filter GAIN */)
+ NODE_53, /* IN0 */
+ 0.5 /* overall filter GAIN */)
/* clamp to the maximum of the op-amp shifted by vRef */
DISCRETE_CLAMP(POLEPOS_CHANL4_SND,
- NODE_54, /* IN0 */
- 0, /* MIN */
- 5.0 - OP_AMP_VP_RAIL_OFFSET - POLEPOS_VREF) /* MAX */
+ NODE_54, /* IN0 */
+ 0, /* MIN */
+ 5.0 - OP_AMP_VP_RAIL_OFFSET - POLEPOS_VREF) /* MAX */
/************************************************
- * Output
- ************************************************/
+ * Output
+ ************************************************/
DISCRETE_OUTPUT(POLEPOS_CHANL1_SND, 32767/2)
DISCRETE_OUTPUT(POLEPOS_CHANL2_SND, 32767/2)
DISCRETE_OUTPUT(POLEPOS_CHANL3_SND, 32767/2)
@@ -354,7 +354,7 @@ const device_type POLEPOS = &device_creator<polepos_sound_device>;
polepos_sound_device::polepos_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, POLEPOS, "Pole Position Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(polepos_sound_state);
}
@@ -396,5 +396,3 @@ void polepos_sound_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/poolshrk.c b/src/mame/audio/poolshrk.c
index e8128659b65..d743632cda9 100644
--- a/src/mame/audio/poolshrk.c
+++ b/src/mame/audio/poolshrk.c
@@ -13,45 +13,45 @@
/************************************************************************/
static const discrete_dac_r1_ladder poolshrk_score_v_dac =
{
- 4, // size of ladder
- {220000, 470000, 1000000, 2200000, 0,0,0,0}, // R57 - R60
- 5, // vBias
- 100000, // R61
- 1500000, // R100
- 1.e-5 // C13
+ 4, // size of ladder
+ {220000, 470000, 1000000, 2200000, 0,0,0,0}, // R57 - R60
+ 5, // vBias
+ 100000, // R61
+ 1500000, // R100
+ 1.e-5 // C13
};
static const discrete_555_cc_desc poolshrk_score_vco =
{
DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q3 junction voltage
+ 0.7 // Q3 junction voltage
};
static const discrete_mixer_desc poolshrk_mixer =
{
DISC_MIXER_IS_RESISTOR,
- {330000, 330000, 330000, 82000 + 470}, // R77, R75, R74, R76 + R53
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- 1000, // R78
- 0, // No filtering
- 1e-7, // C21
- 0, // vBias not used for resistor network
+ {330000, 330000, 330000, 82000 + 470}, // R77, R75, R74, R76 + R53
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ 1000, // R78
+ 0, // No filtering
+ 1e-7, // C21
+ 0, // vBias not used for resistor network
1000000
};
/* Nodes - Inputs */
-#define POOLSHRK_BUMP_EN NODE_01
-#define POOLSHRK_CLICK_EN NODE_02
-#define POOLSHRK_SCORE_EN NODE_03
+#define POOLSHRK_BUMP_EN NODE_01
+#define POOLSHRK_CLICK_EN NODE_02
+#define POOLSHRK_SCORE_EN NODE_03
/* Nodes - Sounds */
-#define POOLSHRK_BUMP_SND NODE_10
-#define POOLSHRK_SCRATCH_SND NODE_11
-#define POOLSHRK_CLICK_SND NODE_12
-#define POOLSHRK_SCORE_SND NODE_13
+#define POOLSHRK_BUMP_SND NODE_10
+#define POOLSHRK_SCRATCH_SND NODE_11
+#define POOLSHRK_CLICK_SND NODE_12
+#define POOLSHRK_SCORE_SND NODE_13
DISCRETE_SOUND_START(poolshrk)
/************************************************/
@@ -73,8 +73,8 @@ DISCRETE_SOUND_START(poolshrk)
/************************************************/
/* Bump is just a triggered 128V signal */
/************************************************/
- DISCRETE_SQUAREWFIX(NODE_20, POOLSHRK_BUMP_EN, 15750.0/2.0/128.0, 3.4, 50.0, 3.4/2, 0.0) // 128V signal 3.4V
- DISCRETE_RCFILTER(POOLSHRK_BUMP_SND, NODE_20, 470, 4.7e-6) // Filtered by R53/C14
+ DISCRETE_SQUAREWFIX(NODE_20, POOLSHRK_BUMP_EN, 15750.0/2.0/128.0, 3.4, 50.0, 3.4/2, 0.0) // 128V signal 3.4V
+ DISCRETE_RCFILTER(POOLSHRK_BUMP_SND, NODE_20, 470, 4.7e-6) // Filtered by R53/C14
/************************************************/
/* Score is a triggered 0-15 count of the */
@@ -88,40 +88,40 @@ DISCRETE_SOUND_START(poolshrk)
/* not oscillate. */
/* This should also happen on the original PCB. */
/************************************************/
- DISCRETE_COUNTER(NODE_30, // Counter E8 (9316 is a 74161)
- NODE_31, // Clock enabled by F8, pin 13
- POOLSHRK_SCORE_EN, // Reset/triggered by score
- 15750.0/2.0/64.0, // 64V signal
- 0, 15, 1, // 4 bit binary up counter
- 0, DISC_CLK_IS_FREQ) // Cleared to 0
- DISCRETE_TRANSFORM2(NODE_31, NODE_30, 15, "01=!") // TC output of E8, pin 15. (inverted)
-
- DISCRETE_DAC_R1(NODE_32, // Base of Q3
- NODE_30, // IC E8, Q0-Q3
- 3.4, // TTL ON level = 3.4V
+ DISCRETE_COUNTER(NODE_30, // Counter E8 (9316 is a 74161)
+ NODE_31, // Clock enabled by F8, pin 13
+ POOLSHRK_SCORE_EN, // Reset/triggered by score
+ 15750.0/2.0/64.0, // 64V signal
+ 0, 15, 1, // 4 bit binary up counter
+ 0, DISC_CLK_IS_FREQ) // Cleared to 0
+ DISCRETE_TRANSFORM2(NODE_31, NODE_30, 15, "01=!") // TC output of E8, pin 15. (inverted)
+
+ DISCRETE_DAC_R1(NODE_32, // Base of Q3
+ NODE_30, // IC E8, Q0-Q3
+ 3.4, // TTL ON level = 3.4V
&poolshrk_score_v_dac)
- DISCRETE_555_CC(NODE_33, // IC C9, pin 3
- NODE_31, // reset by IC C9, pin 4
- NODE_32, // vIn from R-ladder
- 10000, // R73
- 1.e-8, // C16
- 0, 0, 0, // No rBias, rGnd or rDischarge
+ DISCRETE_555_CC(NODE_33, // IC C9, pin 3
+ NODE_31, // reset by IC C9, pin 4
+ NODE_32, // vIn from R-ladder
+ 10000, // R73
+ 1.e-8, // C16
+ 0, 0, 0, // No rBias, rGnd or rDischarge
&poolshrk_score_vco)
- DISCRETE_COUNTER(NODE_34, 1, 0, // IC D9, pin 9
- NODE_33, // from IC C9, pin 3
- 0, 1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
+ DISCRETE_COUNTER(NODE_34, 1, 0, // IC D9, pin 9
+ NODE_33, // from IC C9, pin 3
+ 0, 1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
DISCRETE_GAIN(POOLSHRK_SCORE_SND, NODE_34, 3.4)
/*
- * The TC output of E8 is sent to a one shot made up by
- * C12/R62. Clamped by CR16. Shaped to square by L9.
- * This causes click to be triggered at the end of score.
- */
- DISCRETE_ONESHOT(NODE_39, // buffer L9 pin 12
- NODE_31, // from TC pin 15 of E8
- 1, 0, // output 0/1 for the minimum sample period
- DISC_ONESHOT_FEDGE | DISC_ONESHOT_NORETRIG | DISC_OUT_ACTIVE_HIGH) // Real circuit is rising edge but we will take into account that we are using an inverted signal in the code
+ * The TC output of E8 is sent to a one shot made up by
+ * C12/R62. Clamped by CR16. Shaped to square by L9.
+ * This causes click to be triggered at the end of score.
+ */
+ DISCRETE_ONESHOT(NODE_39, // buffer L9 pin 12
+ NODE_31, // from TC pin 15 of E8
+ 1, 0, // output 0/1 for the minimum sample period
+ DISC_ONESHOT_FEDGE | DISC_ONESHOT_NORETRIG | DISC_OUT_ACTIVE_HIGH) // Real circuit is rising edge but we will take into account that we are using an inverted signal in the code
/************************************************/
/* Click is a triggered 0-15 count of the */
@@ -131,15 +131,15 @@ DISCRETE_SOUND_START(poolshrk)
/* not at TC, so the click is counted once. */
/* This should also happen on the original PCB. */
/************************************************/
- DISCRETE_LOGIC_OR(NODE_40, POOLSHRK_CLICK_EN , NODE_39) // gate K9, pin 11
- DISCRETE_COUNTER(NODE_41, // Counter J9 (9316 is a 74161)
- NODE_42, // Clock enabled by F8, pin 1
- NODE_40, // Reset/triggered by K9, pin 11
- 15750.0/2.0/2.0, // 2V signal
- 0, 15, 1, // 4 bit binary up counter
- 0, DISC_CLK_IS_FREQ) // Cleared to 0
- DISCRETE_TRANSFORM2(NODE_42, NODE_41, 15, "01=!") // TC output of J9, pin 15. Modified to function as F8 clock enable
- DISCRETE_TRANSFORM3(POOLSHRK_CLICK_SND, NODE_41, 1, 3.4, "01&2*") // Q0 output of J9, pin 14. Set to proper amplitude
+ DISCRETE_LOGIC_OR(NODE_40, POOLSHRK_CLICK_EN , NODE_39) // gate K9, pin 11
+ DISCRETE_COUNTER(NODE_41, // Counter J9 (9316 is a 74161)
+ NODE_42, // Clock enabled by F8, pin 1
+ NODE_40, // Reset/triggered by K9, pin 11
+ 15750.0/2.0/2.0, // 2V signal
+ 0, 15, 1, // 4 bit binary up counter
+ 0, DISC_CLK_IS_FREQ) // Cleared to 0
+ DISCRETE_TRANSFORM2(NODE_42, NODE_41, 15, "01=!") // TC output of J9, pin 15. Modified to function as F8 clock enable
+ DISCRETE_TRANSFORM3(POOLSHRK_CLICK_SND, NODE_41, 1, 3.4, "01&2*") // Q0 output of J9, pin 14. Set to proper amplitude
/************************************************/
/* Final mix and output. */
diff --git a/src/mame/audio/pulsar.c b/src/mame/audio/pulsar.c
index 0703a6003ec..6fb84b306ef 100644
--- a/src/mame/audio/pulsar.c
+++ b/src/mame/audio/pulsar.c
@@ -11,21 +11,21 @@
/* output port 0x01 definitions - sound effect drive outputs */
-#define OUT_PORT_1_CLANG 0x01
-#define OUT_PORT_1_KEY 0x02
-#define OUT_PORT_1_ALIENHIT 0x04
-#define OUT_PORT_1_PHIT 0x08
-#define OUT_PORT_1_ASHOOT 0x10
-#define OUT_PORT_1_PSHOOT 0x20
-#define OUT_PORT_1_BONUS 0x40
-#define OUT_PORT_1_HBEAT_RATE 0x80 /* currently not used */
+#define OUT_PORT_1_CLANG 0x01
+#define OUT_PORT_1_KEY 0x02
+#define OUT_PORT_1_ALIENHIT 0x04
+#define OUT_PORT_1_PHIT 0x08
+#define OUT_PORT_1_ASHOOT 0x10
+#define OUT_PORT_1_PSHOOT 0x20
+#define OUT_PORT_1_BONUS 0x40
+#define OUT_PORT_1_HBEAT_RATE 0x80 /* currently not used */
/* output port 0x02 definitions - sound effect drive outputs */
-#define OUT_PORT_2_SIZZLE 0x01
-#define OUT_PORT_2_GATE 0x02
-#define OUT_PORT_2_BIRTH 0x04
-#define OUT_PORT_2_HBEAT 0x08
-#define OUT_PORT_2_MOVMAZE 0x10
+#define OUT_PORT_2_SIZZLE 0x01
+#define OUT_PORT_2_GATE 0x02
+#define OUT_PORT_2_BIRTH 0x04
+#define OUT_PORT_2_HBEAT 0x08
+#define OUT_PORT_2_MOVMAZE 0x10
#define PLAY(samp,id,loop) samp->start( id, id, loop )
diff --git a/src/mame/audio/qix.c b/src/mame/audio/qix.c
index bda78f5edca..1f41f14e134 100644
--- a/src/mame/audio/qix.c
+++ b/src/mame/audio/qix.c
@@ -12,10 +12,10 @@
#include "sound/discrete.h"
/* Discrete Sound Input Nodes */
-#define QIX_DAC_DATA NODE_01
-#define QIX_VOL_DATA NODE_02
-#define QIX_VOL_DATA_L NODE_03
-#define QIX_VOL_DATA_R NODE_04
+#define QIX_DAC_DATA NODE_01
+#define QIX_VOL_DATA NODE_02
+#define QIX_VOL_DATA_L NODE_03
+#define QIX_VOL_DATA_R NODE_04
@@ -172,66 +172,66 @@ ADDRESS_MAP_END
static const pia6821_interface qixsnd_pia_0_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DRIVER_MEMBER(qix_state,sync_sndpia1_porta_w), /* port A out */
- DEVCB_DRIVER_MEMBER(qix_state,qix_vol_w), /* port B out */
- DEVCB_DEVICE_LINE_MEMBER("sndpia1", pia6821_device, ca1_w), /* line CA2 out */
- DEVCB_DRIVER_MEMBER(qix_state,qix_flip_screen_w), /* port CB2 out */
- DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint), /* IRQA */
- DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint) /* IRQB */
+ DEVCB_NULL, /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DRIVER_MEMBER(qix_state,sync_sndpia1_porta_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(qix_state,qix_vol_w), /* port B out */
+ DEVCB_DEVICE_LINE_MEMBER("sndpia1", pia6821_device, ca1_w), /* line CA2 out */
+ DEVCB_DRIVER_MEMBER(qix_state,qix_flip_screen_w), /* port CB2 out */
+ DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint), /* IRQA */
+ DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint) /* IRQB */
};
static const pia6821_interface qixsnd_pia_1_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DEVICE_MEMBER("sndpia0", pia6821_device, porta_w), /* port A out */
- DEVCB_DRIVER_MEMBER(qix_state,qix_dac_w), /* port B out */
- DEVCB_DEVICE_LINE_MEMBER("sndpia0", pia6821_device, ca1_w), /* line CA2 out */
- DEVCB_NULL, /* line CB2 out */
- DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_sint), /* IRQA */
- DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_sint) /* IRQB */
+ DEVCB_NULL, /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DEVICE_MEMBER("sndpia0", pia6821_device, porta_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(qix_state,qix_dac_w), /* port B out */
+ DEVCB_DEVICE_LINE_MEMBER("sndpia0", pia6821_device, ca1_w), /* line CA2 out */
+ DEVCB_NULL, /* line CB2 out */
+ DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_sint), /* IRQA */
+ DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_sint) /* IRQB */
};
static const pia6821_interface qixsnd_pia_2_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* port A out */
- DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* port B out */
- DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* line CA2 out */
- DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* line CB2 out */
+ DEVCB_NULL, /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* port B out */
+ DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* line CA2 out */
+ DEVCB_DRIVER_MEMBER(qix_state,sndpia_2_warning_w), /* line CB2 out */
DEVCB_NULL,
DEVCB_NULL
};
static const pia6821_interface slithersnd_pia_0_intf =
{
- DEVCB_INPUT_PORT("P2"), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_DRIVER_MEMBER(qix_state,slither_coinctl_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_DRIVER_MEMBER(qix_state,qix_flip_screen_w), /* port CB2 out */
- DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint), /* IRQA */
- DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint) /* IRQB */
+ DEVCB_INPUT_PORT("P2"), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_DRIVER_MEMBER(qix_state,slither_coinctl_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_DRIVER_MEMBER(qix_state,qix_flip_screen_w), /* port CB2 out */
+ DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint), /* IRQA */
+ DEVCB_DRIVER_LINE_MEMBER(qix_state,qix_pia_dint) /* IRQB */
};
@@ -241,7 +241,7 @@ static const pia6821_interface slithersnd_pia_0_intf =
static const sn76496_config psg_intf =
{
- DEVCB_NULL
+ DEVCB_NULL
};
@@ -252,7 +252,7 @@ static const sn76496_config psg_intf =
*************************************/
MACHINE_CONFIG_FRAGMENT( qix_audio )
- MCFG_CPU_ADD("audiocpu", M6802, SOUND_CLOCK_OSC/2) /* 0.92 MHz */
+ MCFG_CPU_ADD("audiocpu", M6802, SOUND_CLOCK_OSC/2) /* 0.92 MHz */
MCFG_CPU_PROGRAM_MAP(audio_map)
MCFG_PIA6821_ADD("sndpia0", qixsnd_pia_0_intf)
diff --git a/src/mame/audio/redalert.c b/src/mame/audio/redalert.c
index 8056984d3d7..67b17114af8 100644
--- a/src/mame/audio/redalert.c
+++ b/src/mame/audio/redalert.c
@@ -19,18 +19,18 @@
-#define REDALERT_AUDIO_PCB_CLOCK (XTAL_12_5MHz)
-#define REDALERT_AUDIO_CPU_CLOCK (REDALERT_AUDIO_PCB_CLOCK / 12)
-#define REDALERT_AY8910_CLOCK (REDALERT_AUDIO_PCB_CLOCK / 6)
-#define REDALERT_AUDIO_CPU_IRQ_FREQ (1000000000 / PERIOD_OF_555_ASTABLE_NSEC(RES_K(120), RES_K(2.7), CAP_U(0.01)))
+#define REDALERT_AUDIO_PCB_CLOCK (XTAL_12_5MHz)
+#define REDALERT_AUDIO_CPU_CLOCK (REDALERT_AUDIO_PCB_CLOCK / 12)
+#define REDALERT_AY8910_CLOCK (REDALERT_AUDIO_PCB_CLOCK / 6)
+#define REDALERT_AUDIO_CPU_IRQ_FREQ (1000000000 / PERIOD_OF_555_ASTABLE_NSEC(RES_K(120), RES_K(2.7), CAP_U(0.01)))
-#define REDALERT_VOICE_PCB_CLOCK (XTAL_6MHz)
-#define REDALERT_VOICE_CPU_CLOCK (REDALERT_VOICE_PCB_CLOCK)
-#define REDALERT_HC55516_CLOCK (REDALERT_VOICE_PCB_CLOCK / 256)
+#define REDALERT_VOICE_PCB_CLOCK (XTAL_6MHz)
+#define REDALERT_VOICE_CPU_CLOCK (REDALERT_VOICE_PCB_CLOCK)
+#define REDALERT_HC55516_CLOCK (REDALERT_VOICE_PCB_CLOCK / 256)
-#define DEMONEYE_AUDIO_PCB_CLOCK (XTAL_3_579545MHz)
-#define DEMONEYE_AUDIO_CPU_CLOCK (DEMONEYE_AUDIO_PCB_CLOCK / 4) /* what's the real divisor? */
-#define DEMONEYE_AY8910_CLOCK (DEMONEYE_AUDIO_PCB_CLOCK / 2) /* what's the real divisor? */
+#define DEMONEYE_AUDIO_PCB_CLOCK (XTAL_3_579545MHz)
+#define DEMONEYE_AUDIO_CPU_CLOCK (DEMONEYE_AUDIO_PCB_CLOCK / 4) /* what's the real divisor? */
+#define DEMONEYE_AY8910_CLOCK (DEMONEYE_AUDIO_PCB_CLOCK / 2) /* what's the real divisor? */
@@ -43,13 +43,13 @@
WRITE8_MEMBER(redalert_state::redalert_analog_w)
{
/* this port triggers analog sounds
- D0 = Formation Aircraft?
- D1 = Dive bombers?
- D2 = Helicopters?
- D3 = Launcher firing?
- D4 = Explosion #1?
- D5 = Explosion #2?
- D6 = Explosion #3? */
+ D0 = Formation Aircraft?
+ D1 = Dive bombers?
+ D2 = Helicopters?
+ D3 = Launcher firing?
+ D4 = Explosion #1?
+ D5 = Explosion #2?
+ D6 = Explosion #3? */
logerror("Analog: %02X\n",data);
}
@@ -68,7 +68,7 @@ WRITE8_MEMBER(redalert_state::redalert_audio_command_w)
soundlatch_byte_w(space, 0, data);
/* D7 is also connected to the NMI input of the CPU -
- the NMI is actually toggled by a 74121 */
+ the NMI is actually toggled by a 74121 */
if ((data & 0x80) == 0x00)
machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
@@ -117,9 +117,9 @@ static const ay8910_interface redalert_ay8910_interface =
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
DEVCB_DRIVER_MEMBER(driver_device, soundlatch_byte_r),
- DEVCB_NULL, /* port A/B read */
+ DEVCB_NULL, /* port A/B read */
DEVCB_NULL,
- DEVCB_DRIVER_MEMBER(redalert_state,redalert_analog_w) /* port A/B write */
+ DEVCB_DRIVER_MEMBER(redalert_state,redalert_analog_w) /* port A/B write */
};
@@ -173,10 +173,10 @@ READ_LINE_MEMBER(redalert_state::sid_callback)
static I8085_CONFIG( redalert_voice_i8085_config )
{
- DEVCB_NULL, /* STATUS changed callback */
- DEVCB_NULL, /* INTE changed callback */
- DEVCB_DRIVER_LINE_MEMBER(redalert_state,sid_callback), /* SID changed callback (8085A only) */
- DEVCB_DRIVER_LINE_MEMBER(redalert_state,sod_callback) /* SOD changed callback (8085A only) */
+ DEVCB_NULL, /* STATUS changed callback */
+ DEVCB_NULL, /* INTE changed callback */
+ DEVCB_DRIVER_LINE_MEMBER(redalert_state,sid_callback), /* SID changed callback (8085A only) */
+ DEVCB_DRIVER_LINE_MEMBER(redalert_state,sod_callback) /* SOD changed callback (8085A only) */
};
@@ -352,26 +352,26 @@ static const ay8910_interface demoneye_ay8910_interface =
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
DEVCB_DRIVER_MEMBER(driver_device, soundlatch_byte_r),
- DEVCB_NULL, /* port A/B read */
+ DEVCB_NULL, /* port A/B read */
DEVCB_NULL,
- DEVCB_NULL /* port A/B write */
+ DEVCB_NULL /* port A/B write */
};
static const pia6821_interface demoneye_pia_intf =
{
- DEVCB_DRIVER_MEMBER(redalert_state,demoneye_ay8910_latch_2_r), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DRIVER_MEMBER(redalert_state,demoneye_ay8910_data_w), /* port A out */
- DEVCB_DRIVER_MEMBER(redalert_state,demoneye_ay8910_latch_1_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_DRIVER_MEMBER(redalert_state,demoneye_ay8910_latch_2_r), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DRIVER_MEMBER(redalert_state,demoneye_ay8910_data_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(redalert_state,demoneye_ay8910_latch_1_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
diff --git a/src/mame/audio/redbaron.c b/src/mame/audio/redbaron.c
index 5bbf69e5796..af44e8bea58 100644
--- a/src/mame/audio/redbaron.c
+++ b/src/mame/audio/redbaron.c
@@ -18,7 +18,7 @@
#include "includes/bzone.h"
#include "sound/pokey.h"
-#define OUTPUT_RATE (48000)
+#define OUTPUT_RATE (48000)
struct redbaron_sound_state
{
@@ -112,9 +112,9 @@ static STREAM_UPDATE( redbaron_sound_update )
{
if( state->m_shot_amp > 0 )
{
- /* discharge C32 (0.1u) through R26 (33k) + R27 (15k)
- * 0.68 * C32 * (R26 + R27) = 3264us
- */
+ /* discharge C32 (0.1u) through R26 (33k) + R27 (15k)
+ * 0.68 * C32 * (R26 + R27) = 3264us
+ */
// #define C32_DISCHARGE_TIME (int)(32767 / 0.003264);
/* I think this is to short. Is C32 really 1u? */
#define C32_DISCHARGE_TIME (int)(32767 / 0.03264);
@@ -138,8 +138,8 @@ static STREAM_UPDATE( redbaron_sound_update )
if( state->m_squeal_amp < 32767 )
{
/* charge C5 (22u) over R3 (68k) and CR1 (1N914)
- * time = 0.68 * C5 * R3 = 1017280us
- */
+ * time = 0.68 * C5 * R3 = 1017280us
+ */
#define C5_CHARGE_TIME (int)(32767 / 1.01728);
state->m_squeal_amp_counter -= C5_CHARGE_TIME;
while( state->m_squeal_amp_counter <= 0 )
@@ -153,10 +153,10 @@ static STREAM_UPDATE( redbaron_sound_update )
if( state->m_squeal_out )
{
/* NE555 setup as pulse position modulator
- * C = 0.01u, Ra = 33k, Rb = 47k
- * frequency = 1.44 / ((33k + 2*47k) * 0.01u) = 1134Hz
- * modulated by squeal_amp
- */
+ * C = 0.01u, Ra = 33k, Rb = 47k
+ * frequency = 1.44 / ((33k + 2*47k) * 0.01u) = 1134Hz
+ * modulated by squeal_amp
+ */
state->m_squeal_off_counter -= (1134 + 1134 * state->m_squeal_amp / 32767) / 3;
while( state->m_squeal_off_counter <= 0 )
{
@@ -229,7 +229,7 @@ const device_type REDBARON = &device_creator<redbaron_sound_device>;
redbaron_sound_device::redbaron_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, REDBARON, "Red Baron Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(redbaron_sound_state);
}
@@ -262,5 +262,3 @@ void redbaron_sound_device::sound_stream_update(sound_stream &stream, stream_sam
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/scramble.c b/src/mame/audio/scramble.c
index cfd49bab18b..09aadfb4e50 100644
--- a/src/mame/audio/scramble.c
+++ b/src/mame/audio/scramble.c
@@ -19,7 +19,7 @@
#include "sound/ay8910.h"
#include "includes/scramble.h"
-#define AD2083_TMS5110_CLOCK XTAL_640kHz
+#define AD2083_TMS5110_CLOCK XTAL_640kHz
/* The timer clock in Scramble which feeds the upper 4 bits of */
/* AY-3-8910 port A is based on the same clock */
@@ -101,8 +101,8 @@ static IRQ_CALLBACK(scramble_sh_irq_callback)
ttl7474_device *target = device->machine().device<ttl7474_device>("konami_7474");
/* interrupt acknowledge clears the flip-flop --
- we need to pulse the CLR line because MAME's core never clears this
- line, only asserts it */
+ we need to pulse the CLR line because MAME's core never clears this
+ line, only asserts it */
target->clear_w(0);
target->clear_w(1);
@@ -137,9 +137,9 @@ static void filter_w(device_t *device, int data)
C = 0;
if (data & 1)
- C += 220000; /* 220000pF = 0.220uF */
+ C += 220000; /* 220000pF = 0.220uF */
if (data & 2)
- C += 47000; /* 47000pF = 0.047uF */
+ C += 47000; /* 47000pF = 0.047uF */
if (device != NULL)
filter_rc_set_RC(device,FLT_RC_LOWPASS,1000,5100,0,CAP_P(C));
}
@@ -323,38 +323,38 @@ static SOUND_START( ad2083 )
static const tmsprom_interface prom_intf =
{
- "5110ctrl", /* prom memory region - sound region is automatically assigned */
- 0x1000, /* individual rom_size */
- 1, /* bit # of pdc line */
+ "5110ctrl", /* prom memory region - sound region is automatically assigned */
+ 0x1000, /* individual rom_size */
+ 1, /* bit # of pdc line */
/* virtual bit 8: constant 0, virtual bit 9:constant 1 */
- 8, /* bit # of ctl1 line */
- 2, /* bit # of ctl2 line */
- 8, /* bit # of ctl4 line */
- 2, /* bit # of ctl8 line */
- 6, /* bit # of rom reset */
- 7, /* bit # of stop */
- DEVCB_DEVICE_LINE("tms", tms5110_pdc_w), /* tms pdc func */
- DEVCB_DEVICE_HANDLER("tms", tms5110_ctl_w) /* tms ctl func */
+ 8, /* bit # of ctl1 line */
+ 2, /* bit # of ctl2 line */
+ 8, /* bit # of ctl4 line */
+ 2, /* bit # of ctl8 line */
+ 6, /* bit # of rom reset */
+ 7, /* bit # of stop */
+ DEVCB_DEVICE_LINE("tms", tms5110_pdc_w), /* tms pdc func */
+ DEVCB_DEVICE_HANDLER("tms", tms5110_ctl_w) /* tms ctl func */
};
static const tms5110_interface ad2083_tms5110_interface =
{
/* legacy interface */
- NULL, /* function to be called when chip requests another bit */
- NULL, /* speech ROM load address callback */
+ NULL, /* function to be called when chip requests another bit */
+ NULL, /* speech ROM load address callback */
/* new rom controller interface */
- DEVCB_DEVICE_LINE("tmsprom", tmsprom_m0_w), /* the M0 line */
- DEVCB_NULL, /* the M1 line */
- DEVCB_NULL, /* Write to ADD1,2,4,8 - 4 address bits */
- DEVCB_DEVICE_LINE("tmsprom", tmsprom_data_r), /* Read one bit from ADD8/Data - voice data */
- DEVCB_NULL /* rom clock - Only used to drive the data lines */
+ DEVCB_DEVICE_LINE("tmsprom", tmsprom_m0_w), /* the M0 line */
+ DEVCB_NULL, /* the M1 line */
+ DEVCB_NULL, /* Write to ADD1,2,4,8 - 4 address bits */
+ DEVCB_DEVICE_LINE("tmsprom", tmsprom_data_r), /* Read one bit from ADD8/Data - voice data */
+ DEVCB_NULL /* rom clock - Only used to drive the data lines */
};
MACHINE_CONFIG_FRAGMENT( ad2083_audio )
- MCFG_CPU_ADD("audiocpu", Z80, 14318000/8) /* 1.78975 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80, 14318000/8) /* 1.78975 MHz */
MCFG_CPU_PROGRAM_MAP(ad2083_sound_map)
MCFG_CPU_IO_MAP(ad2083_sound_io_map)
diff --git a/src/mame/audio/segag80r.c b/src/mame/audio/segag80r.c
index 43c751f1883..4aae2c39ac5 100644
--- a/src/mame/audio/segag80r.c
+++ b/src/mame/audio/segag80r.c
@@ -24,11 +24,11 @@
*
*************************************/
-#define SEGA005_555_TIMER_FREQ (1.44 / ((15000 + 2 * 4700) * 1.5e-6))
-#define SEGA005_COUNTER_FREQ (100000) /* unknown, just a guess */
+#define SEGA005_555_TIMER_FREQ (1.44 / ((15000 + 2 * 4700) * 1.5e-6))
+#define SEGA005_COUNTER_FREQ (100000) /* unknown, just a guess */
class sega005_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
sega005_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -49,7 +49,7 @@ const device_type SEGA005 = &device_creator<sega005_sound_device>;
sega005_sound_device::sega005_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEGA005, "005 Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
}
@@ -211,22 +211,22 @@ static SOUND_START( astrob );
static const char *const astrob_sample_names[] =
{
"*astrob",
- "invadr1", /* 0 */
- "winvadr1", /* 1 */
- "invadr2", /* 2 */
- "winvadr2", /* 3 */
- "invadr3", /* 4 */
- "winvadr3", /* 5 */
- "invadr4", /* 6 */
- "winvadr4", /* 7 */
- "asteroid", /* 8 */
- "refuel", /* 9 */
- "pbullet", /* 10 */
- "ebullet", /* 11 */
- "eexplode", /* 12 */
- "pexplode", /* 13 */
- "deedle", /* 14 */
- "sonar", /* 15 */
+ "invadr1", /* 0 */
+ "winvadr1", /* 1 */
+ "invadr2", /* 2 */
+ "winvadr2", /* 3 */
+ "invadr3", /* 4 */
+ "winvadr3", /* 5 */
+ "invadr4", /* 6 */
+ "winvadr4", /* 7 */
+ "asteroid", /* 8 */
+ "refuel", /* 9 */
+ "pbullet", /* 10 */
+ "ebullet", /* 11 */
+ "eexplode", /* 12 */
+ "pexplode", /* 13 */
+ "deedle", /* 14 */
+ "sonar", /* 15 */
0
};
@@ -435,13 +435,13 @@ static TIMER_CALLBACK( sega005_auto_timer );
static const char *const sega005_sample_names[] =
{
"*005",
- "lexplode", /* 0 */
- "sexplode", /* 1 */
- "dropbomb", /* 2 */
- "shoot", /* 3 */
- "missile", /* 4 */
- "helicopt", /* 5 */
- "whistle", /* 6 */
+ "lexplode", /* 0 */
+ "sexplode", /* 1 */
+ "dropbomb", /* 2 */
+ "shoot", /* 3 */
+ "missile", /* 4 */
+ "helicopt", /* 5 */
+ "whistle", /* 6 */
0
};
@@ -455,12 +455,12 @@ static const samples_interface sega005_samples_interface =
static I8255A_INTERFACE( ppi8255_005_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(segag80r_state,sega005_sound_a_w), /* Port A write */
- DEVCB_NULL, /* Port B read */
- DEVCB_DRIVER_MEMBER(segag80r_state,sega005_sound_b_w), /* Port B write */
- DEVCB_NULL, /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(segag80r_state,sega005_sound_a_w), /* Port A write */
+ DEVCB_NULL, /* Port B read */
+ DEVCB_DRIVER_MEMBER(segag80r_state,sega005_sound_b_w), /* Port B write */
+ DEVCB_NULL, /* Port C read */
+ DEVCB_NULL /* Port C write */
};
@@ -565,11 +565,11 @@ INLINE void sega005_update_sound_data(running_machine &machine)
WRITE8_MEMBER(segag80r_state::sega005_sound_b_w)
{
/*
- D6: manual timer clock (0->1)
- D5: 0 = manual timer, 1 = auto timer
- D4: 1 = hold/reset address counter to 0
- D3-D0: upper 4 bits of ROM address
- */
+ D6: manual timer clock (0->1)
+ D5: 0 = manual timer, 1 = auto timer
+ D4: 1 = hold/reset address counter to 0
+ D3-D0: upper 4 bits of ROM address
+ */
UINT8 diff = data ^ m_sound_state[1];
m_sound_state[1] = data;
@@ -669,17 +669,17 @@ static SOUND_START( spaceod );
static const char *const spaceod_sample_names[] =
{
"*spaceod",
- "fire", /* 0 */
- "bomb", /* 1 */
- "eexplode", /* 2 */
- "pexplode", /* 3 */
- "warp", /* 4 */
- "birth", /* 5 */
- "scoreup", /* 6 */
- "ssound", /* 7 */
- "accel", /* 8 */
- "damaged", /* 9 */
- "erocket", /* 10 */
+ "fire", /* 0 */
+ "bomb", /* 1 */
+ "eexplode", /* 2 */
+ "pexplode", /* 3 */
+ "warp", /* 4 */
+ "birth", /* 5 */
+ "scoreup", /* 6 */
+ "ssound", /* 7 */
+ "accel", /* 8 */
+ "damaged", /* 9 */
+ "erocket", /* 10 */
0
};
@@ -840,12 +840,12 @@ ADDRESS_MAP_END
static I8255A_INTERFACE( monsterb_ppi_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(segag80r_state,monsterb_sound_a_w), /* Port A write */
- DEVCB_NULL, /* Port B read */
- DEVCB_DRIVER_MEMBER(segag80r_state,monsterb_sound_b_w), /* Port B write */
- DEVCB_DRIVER_MEMBER(segag80r_state,n7751_status_r), /* Port C read */
- DEVCB_DRIVER_MEMBER(segag80r_state,n7751_command_w) /* Port C write */
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(segag80r_state,monsterb_sound_a_w), /* Port A write */
+ DEVCB_NULL, /* Port B read */
+ DEVCB_DRIVER_MEMBER(segag80r_state,monsterb_sound_b_w), /* Port B write */
+ DEVCB_DRIVER_MEMBER(segag80r_state,n7751_status_r), /* Port C read */
+ DEVCB_DRIVER_MEMBER(segag80r_state,n7751_command_w) /* Port C write */
};
@@ -931,7 +931,7 @@ WRITE8_MEMBER(segag80r_state::monsterb_sound_b_w)
/* DIVE: channel 1 */
if ((diff & 0x02) && !(data & 0x02)) samples->start(1, 1);
- /* TODO: D7 on Port B might affect TMS3617 output (mute?) */
+ /* TODO: D7 on Port B might affect TMS3617 output (mute?) */
}
@@ -951,11 +951,11 @@ READ8_MEMBER(segag80r_state::n7751_status_r)
WRITE8_MEMBER(segag80r_state::n7751_command_w)
{
/*
- Z80 7751 control port
+ Z80 7751 control port
- D0-D2 = connected to 7751 port C
- D3 = /INT line
- */
+ D0-D2 = connected to 7751 port C
+ D3 = /INT line
+ */
m_n7751_command = data & 0x07;
machine().device("audiocpu")->execute().set_input_line(0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(100));
diff --git a/src/mame/audio/segag80v.c b/src/mame/audio/segag80v.c
index f16afd90045..1468e04ed71 100644
--- a/src/mame/audio/segag80v.c
+++ b/src/mame/audio/segag80v.c
@@ -204,22 +204,22 @@ WRITE8_MEMBER(segag80v_state::zektor1_sh_w)
/* Play fireball sample */
if (data & 0x02)
- samples->start(0, 0);
+ samples->start(0, 0);
/* Play explosion samples */
if (data & 0x04)
- samples->start(1, 10);
+ samples->start(1, 10);
if (data & 0x08)
- samples->start(1, 9);
+ samples->start(1, 9);
if (data & 0x10)
- samples->start(1, 8);
+ samples->start(1, 8);
/* Play bounce sample */
if (data & 0x20)
{
- if (samples->playing(2))
- samples->stop(2);
- samples->start(2, 1);
+ if (samples->playing(2))
+ samples->stop(2);
+ samples->start(2, 1);
}
/* Play lazer sample */
@@ -227,7 +227,7 @@ WRITE8_MEMBER(segag80v_state::zektor1_sh_w)
{
if (samples->playing(3))
samples->stop(3);
- samples->start(3, 5);
+ samples->start(3, 5);
}
}
@@ -238,23 +238,23 @@ WRITE8_MEMBER(segag80v_state::zektor2_sh_w)
/* Play thrust sample */
if (data & 0x0f)
- samples->start(4, 6);
+ samples->start(4, 6);
else
samples->stop(4);
/* Play skitter sample */
if (data & 0x10)
- samples->start(5, 2);
+ samples->start(5, 2);
/* Play eliminator sample */
if (data & 0x20)
- samples->start(6, 3);
+ samples->start(6, 3);
/* Play electron samples */
if (data & 0x40)
- samples->start(7, 40);
+ samples->start(7, 40);
if (data & 0x80)
- samples->start(7, 41);
+ samples->start(7, 41);
}
@@ -330,4 +330,3 @@ WRITE8_MEMBER(segag80v_state::spacfury2_sh_w)
samples->start(0, 7);
}
-
diff --git a/src/mame/audio/segasnd.c b/src/mame/audio/segasnd.c
index 7de521c7202..e31f2559c0c 100644
--- a/src/mame/audio/segasnd.c
+++ b/src/mame/audio/segasnd.c
@@ -22,15 +22,15 @@
CONSTANTS
***************************************************************************/
-#define SPEECH_MASTER_CLOCK 3120000
+#define SPEECH_MASTER_CLOCK 3120000
-#define USB_MASTER_CLOCK 6000000
-#define USB_2MHZ_CLOCK (USB_MASTER_CLOCK/3)
-#define USB_PCS_CLOCK (USB_2MHZ_CLOCK/2)
-#define USB_GOS_CLOCK (USB_2MHZ_CLOCK/16/4)
-#define MM5837_CLOCK 100000
+#define USB_MASTER_CLOCK 6000000
+#define USB_2MHZ_CLOCK (USB_MASTER_CLOCK/3)
+#define USB_PCS_CLOCK (USB_2MHZ_CLOCK/2)
+#define USB_GOS_CLOCK (USB_2MHZ_CLOCK/16/4)
+#define MM5837_CLOCK 100000
-#define SAMPLE_RATE (USB_2MHZ_CLOCK/8)
+#define SAMPLE_RATE (USB_2MHZ_CLOCK/8)
@@ -40,60 +40,60 @@
struct filter_state
{
- double capval; /* current capacitor value */
- double exponent; /* constant exponent */
+ double capval; /* current capacitor value */
+ double exponent; /* constant exponent */
};
struct timer8253_channel
{
- UINT8 holding; /* holding until counts written? */
- UINT8 latchmode; /* latching mode */
- UINT8 latchtoggle; /* latching state */
- UINT8 clockmode; /* clocking mode */
- UINT8 bcdmode; /* BCD mode? */
- UINT8 output; /* current output value */
- UINT8 lastgate; /* previous gate value */
- UINT8 gate; /* current gate value */
- UINT8 subcount; /* subcount (2MHz clocks per input clock) */
- UINT16 count; /* initial count */
- UINT16 remain; /* current down counter value */
+ UINT8 holding; /* holding until counts written? */
+ UINT8 latchmode; /* latching mode */
+ UINT8 latchtoggle; /* latching state */
+ UINT8 clockmode; /* clocking mode */
+ UINT8 bcdmode; /* BCD mode? */
+ UINT8 output; /* current output value */
+ UINT8 lastgate; /* previous gate value */
+ UINT8 gate; /* current gate value */
+ UINT8 subcount; /* subcount (2MHz clocks per input clock) */
+ UINT16 count; /* initial count */
+ UINT16 remain; /* current down counter value */
};
struct timer8253
{
- timer8253_channel chan[3]; /* three channels' worth of information */
- double env[3]; /* envelope value for each channel */
- filter_state chan_filter[2]; /* filter states for the first two channels */
- filter_state gate1; /* first RC filter state */
- filter_state gate2; /* second RC filter state */
- UINT8 config; /* configuration for this timer */
+ timer8253_channel chan[3]; /* three channels' worth of information */
+ double env[3]; /* envelope value for each channel */
+ filter_state chan_filter[2]; /* filter states for the first two channels */
+ filter_state gate1; /* first RC filter state */
+ filter_state gate2; /* second RC filter state */
+ UINT8 config; /* configuration for this timer */
};
struct usb_state
{
- sound_stream * stream; /* output stream */
- device_t *cpu; /* CPU index of the 8035 */
+ sound_stream * stream; /* output stream */
+ device_t *cpu; /* CPU index of the 8035 */
device_t *maincpu;
- UINT8 in_latch; /* input latch */
- UINT8 out_latch; /* output latch */
- UINT8 last_p2_value; /* current P2 output value */
- UINT8 * program_ram; /* pointer to program RAM */
- UINT8 * work_ram; /* pointer to work RAM */
- UINT8 work_ram_bank; /* currently selected work RAM bank */
- UINT8 t1_clock; /* T1 clock value */
- UINT8 t1_clock_mask; /* T1 clock mask (configured via jumpers) */
- timer8253 timer_group[3]; /* 3 groups of timers */
- UINT8 timer_mode[3]; /* mode control for each group */
- UINT32 noise_shift;
- UINT8 noise_state;
- UINT8 noise_subcount;
- double gate_rc1_exp[2];
- double gate_rc2_exp[2];
- filter_state final_filter;
- filter_state noise_filters[5];
+ UINT8 in_latch; /* input latch */
+ UINT8 out_latch; /* output latch */
+ UINT8 last_p2_value; /* current P2 output value */
+ UINT8 * program_ram; /* pointer to program RAM */
+ UINT8 * work_ram; /* pointer to work RAM */
+ UINT8 work_ram_bank; /* currently selected work RAM bank */
+ UINT8 t1_clock; /* T1 clock value */
+ UINT8 t1_clock_mask; /* T1 clock mask (configured via jumpers) */
+ timer8253 timer_group[3]; /* 3 groups of timers */
+ UINT8 timer_mode[3]; /* mode control for each group */
+ UINT32 noise_shift;
+ UINT8 noise_state;
+ UINT8 noise_subcount;
+ double gate_rc1_exp[2];
+ double gate_rc2_exp[2];
+ filter_state final_filter;
+ filter_state noise_filters[5];
};
/* SP0250-based speech board */
@@ -137,7 +137,7 @@ INLINE double step_cr_filter(filter_state *state, double input)
***************************************************************************/
class speech_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
speech_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -180,7 +180,7 @@ const device_type SEGASPEECH = &device_creator<speech_sound_device>;
speech_sound_device::speech_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEGASPEECH, "Sega Speech Sound Board", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(speech_state);
}
@@ -370,7 +370,7 @@ static const struct sp0250_interface sp0250_interface =
MACHINE_CONFIG_FRAGMENT( sega_speech_board )
/* CPU for the speech board */
- MCFG_CPU_ADD("audiocpu", I8035, SPEECH_MASTER_CLOCK) /* divide by 15 in CPU */
+ MCFG_CPU_ADD("audiocpu", I8035, SPEECH_MASTER_CLOCK) /* divide by 15 in CPU */
MCFG_CPU_PROGRAM_MAP(speech_map)
MCFG_CPU_IO_MAP(speech_portmap)
@@ -388,7 +388,7 @@ MACHINE_CONFIG_END
***************************************************************************/
class usb_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -642,13 +642,13 @@ static STREAM_UPDATE( usb_stream_update )
/*----------------
- Noise Source
- ----------------
+ Noise Source
+ ----------------
- RC
- MM5837 ---> FILTER ---> CR FILTER ---> 3.2x AMP ---> NOISE
- LADDER
- */
+ RC
+ MM5837 ---> FILTER ---> CR FILTER ---> 3.2x AMP ---> NOISE
+ LADDER
+ */
/* update the noise source */
for (step = USB_2MHZ_CLOCK / SAMPLE_RATE; step >= usb->noise_subcount; step -= usb->noise_subcount)
@@ -679,12 +679,12 @@ static STREAM_UPDATE( usb_stream_update )
/*-------------
- Channel 0
- -------------
+ Channel 0
+ -------------
- 8253 CR AD7524
- OUT0 ---> FILTER ---> BUFFER---> VRef ---> 100k ---> mix
- */
+ 8253 CR AD7524
+ OUT0 ---> FILTER ---> BUFFER---> VRef ---> 100k ---> mix
+ */
/* channel 0 clocks with the PCS clock */
for (step = USB_2MHZ_CLOCK / SAMPLE_RATE; step >= g->chan[0].subcount; step -= g->chan[0].subcount)
@@ -700,12 +700,12 @@ static STREAM_UPDATE( usb_stream_update )
/*-------------
- Channel 1
- -------------
+ Channel 1
+ -------------
- 8253 CR AD7524
- OUT1 ---> FILTER ---> BUFFER---> VRef ---> 100k ---> mix
- */
+ 8253 CR AD7524
+ OUT1 ---> FILTER ---> BUFFER---> VRef ---> 100k ---> mix
+ */
/* channel 1 clocks with the PCS clock */
for (step = USB_2MHZ_CLOCK / SAMPLE_RATE; step >= g->chan[1].subcount; step -= g->chan[1].subcount)
@@ -721,21 +721,21 @@ static STREAM_UPDATE( usb_stream_update )
/*-------------
- Channel 2
- -------------
+ Channel 2
+ -------------
- If timer_mode == 0:
+ If timer_mode == 0:
- SWITCHED AD7524
- NOISE ---> RC ---> 1.56x AMP ---> INVERTER ---> VRef ---> 33k ---> mix
- FILTERS
+ SWITCHED AD7524
+ NOISE ---> RC ---> 1.56x AMP ---> INVERTER ---> VRef ---> 33k ---> mix
+ FILTERS
- If timer mode == 1:
+ If timer mode == 1:
- AD7524 SWITCHED
- NOISE ---> INVERTER ---> VRef ---> 33k ---> mix ---> INVERTER ---> RC ---> 1.56x AMP ---> finalmix
- FILTERS
- */
+ AD7524 SWITCHED
+ NOISE ---> INVERTER ---> VRef ---> 33k ---> mix ---> INVERTER ---> RC ---> 1.56x AMP ---> finalmix
+ FILTERS
+ */
/* channel 2 clocks with the 2MHZ clock and triggers with the GOS clock */
for (step = 0; step < USB_2MHZ_CLOCK / SAMPLE_RATE; step++)
@@ -771,15 +771,15 @@ static STREAM_UPDATE( usb_stream_update )
/*-------------
- Final mix
- -------------
+ Final mix
+ -------------
- INPUTS
- EQUAL ---> 1.2x INVERTER ---> CR FILTER ---> out
- WEIGHT
+ INPUTS
+ EQUAL ---> 1.2x INVERTER ---> CR FILTER ---> out
+ WEIGHT
- */
- *dest++ = 4000 * step_cr_filter(&usb->final_filter, sample);
+ */
+ *dest++ = 4000 * step_cr_filter(&usb->final_filter, sample);
}
}
@@ -883,7 +883,7 @@ const device_type SEGAUSB = &device_creator<usb_sound_device>;
usb_sound_device::usb_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEGAUSB, "Sega Universal Sound Board", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(usb_state);
}
@@ -956,17 +956,17 @@ static void timer_w(usb_state *usb, int which, UINT8 offset, UINT8 data)
/* based on the latching mode */
switch (ch->latchmode)
{
- case 1: /* low word only */
+ case 1: /* low word only */
ch->count = data;
ch->holding = FALSE;
break;
- case 2: /* high word only */
+ case 2: /* high word only */
ch->count = data << 8;
ch->holding = FALSE;
break;
- case 3: /* low word followed by high word */
+ case 3: /* low word followed by high word */
if (ch->latchtoggle == 0)
{
ch->count = (ch->count & 0xff00) | (data & 0x00ff);
@@ -1044,27 +1044,27 @@ static WRITE8_DEVICE_HANDLER( usb_workram_w )
/* writes to the low 32 bytes go to various controls */
switch (offset & ~3)
{
- case 0x00: /* CTC0 */
+ case 0x00: /* CTC0 */
timer_w(usb, 0, offset & 3, data);
break;
- case 0x04: /* ENV0 */
+ case 0x04: /* ENV0 */
env_w(usb, 0, offset & 3, data);
break;
- case 0x08: /* CTC1 */
+ case 0x08: /* CTC1 */
timer_w(usb, 1, offset & 3, data);
break;
- case 0x0c: /* ENV1 */
+ case 0x0c: /* ENV1 */
env_w(usb, 1, offset & 3, data);
break;
- case 0x10: /* CTC2 */
+ case 0x10: /* CTC2 */
timer_w(usb, 2, offset & 3, data);
break;
- case 0x14: /* ENV2 */
+ case 0x14: /* ENV2 */
env_w(usb, 2, offset & 3, data);
break;
}
@@ -1106,7 +1106,7 @@ ADDRESS_MAP_END
MACHINE_CONFIG_FRAGMENT( sega_universal_sound_board )
/* CPU for the usb board */
- MCFG_CPU_ADD("usbcpu", I8035, USB_MASTER_CLOCK) /* divide by 15 in CPU */
+ MCFG_CPU_ADD("usbcpu", I8035, USB_MASTER_CLOCK) /* divide by 15 in CPU */
MCFG_CPU_PROGRAM_MAP(usb_map)
MCFG_CPU_IO_MAP(usb_portmap)
diff --git a/src/mame/audio/seibu.c b/src/mame/audio/seibu.c
index 31e83bb2c3c..04f7ab680ca 100644
--- a/src/mame/audio/seibu.c
+++ b/src/mame/audio/seibu.c
@@ -287,9 +287,9 @@ static void update_irq_lines(running_machine &machine, int param)
break;
}
- if ((irq1 & irq2) == 0xff) /* no IRQs pending */
+ if ((irq1 & irq2) == 0xff) /* no IRQs pending */
sound_cpu->execute().set_input_line(0,CLEAR_LINE);
- else /* IRQ pending */
+ else /* IRQ pending */
sound_cpu->execute().set_input_line_and_vector(0,ASSERT_LINE,irq1 & irq2);
}
@@ -600,7 +600,7 @@ const device_type SEIBU_ADPCM = &device_creator<seibu_adpcm_device>;
seibu_adpcm_device::seibu_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SEIBU_ADPCM, "Seibu ADPCM", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(seibu_adpcm_state);
}
@@ -633,5 +633,3 @@ void seibu_adpcm_device::sound_stream_update(sound_stream &stream, stream_sample
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/seibu.h b/src/mame/audio/seibu.h
index aa55cc12275..2894ecee996 100644
--- a/src/mame/audio/seibu.h
+++ b/src/mame/audio/seibu.h
@@ -64,7 +64,7 @@ DECLARE_WRITE8_DEVICE_HANDLER( seibu_adpcm_adr_w );
DECLARE_WRITE8_DEVICE_HANDLER( seibu_adpcm_ctl_w );
class seibu_adpcm_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
seibu_adpcm_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -92,7 +92,7 @@ extern const ym2203_interface seibu_ym2203_interface;
struct seibu_adpcm_interface
{
- const char *rom_region;
+ const char *rom_region;
};
extern const seibu_adpcm_interface seibu_adpcm1_intf;
@@ -100,123 +100,122 @@ extern const seibu_adpcm_interface seibu_adpcm2_intf;
/**************************************************************************/
-#define SEIBU_COIN_INPUTS \
- PORT_START("COIN") \
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(4) \
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(4) \
+#define SEIBU_COIN_INPUTS \
+ PORT_START("COIN") \
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(4) \
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(4) \
PORT_BIT( 0xfc, IP_ACTIVE_HIGH, IPT_UNUSED )
-#define SEIBU_COIN_INPUTS_INVERT \
- PORT_START("COIN") \
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(4) \
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(4) \
+#define SEIBU_COIN_INPUTS_INVERT \
+ PORT_START("COIN") \
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(4) \
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(4) \
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
-#define SEIBU_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu_sound_map) \
+#define SEIBU_SOUND_SYSTEM_CPU(freq) \
+ MCFG_CPU_ADD("audiocpu", Z80, freq) \
+ MCFG_CPU_PROGRAM_MAP(seibu_sound_map) \
-#define SEIBU2_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu2_sound_map) \
+#define SEIBU2_SOUND_SYSTEM_CPU(freq) \
+ MCFG_CPU_ADD("audiocpu", Z80, freq) \
+ MCFG_CPU_PROGRAM_MAP(seibu2_sound_map) \
-#define SEIBU2_AIRRAID_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu2_airraid_sound_map) \
+#define SEIBU2_AIRRAID_SOUND_SYSTEM_CPU(freq) \
+ MCFG_CPU_ADD("audiocpu", Z80, freq) \
+ MCFG_CPU_PROGRAM_MAP(seibu2_airraid_sound_map) \
-#define SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu2_raiden2_sound_map) \
+#define SEIBU2_RAIDEN2_SOUND_SYSTEM_CPU(freq) \
+ MCFG_CPU_ADD("audiocpu", Z80, freq) \
+ MCFG_CPU_PROGRAM_MAP(seibu2_raiden2_sound_map) \
-#define SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu_newzeroteam_sound_map) \
+#define SEIBU_NEWZEROTEAM_SOUND_SYSTEM_CPU(freq) \
+ MCFG_CPU_ADD("audiocpu", Z80, freq) \
+ MCFG_CPU_PROGRAM_MAP(seibu_newzeroteam_sound_map) \
-#define SEIBU3_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu3_sound_map) \
+#define SEIBU3_SOUND_SYSTEM_CPU(freq) \
+ MCFG_CPU_ADD("audiocpu", Z80, freq) \
+ MCFG_CPU_PROGRAM_MAP(seibu3_sound_map) \
-#define SEIBU3A_SOUND_SYSTEM_CPU(freq) \
- MCFG_CPU_ADD("audiocpu", Z80, freq) \
- MCFG_CPU_PROGRAM_MAP(seibu3_adpcm_sound_map) \
+#define SEIBU3A_SOUND_SYSTEM_CPU(freq) \
+ MCFG_CPU_ADD("audiocpu", Z80, freq) \
+ MCFG_CPU_PROGRAM_MAP(seibu3_adpcm_sound_map) \
-#define SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(freq1,freq2) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
+#define SEIBU_SOUND_SYSTEM_YM3812_INTERFACE(freq1,freq2) \
+ MCFG_SPEAKER_STANDARD_MONO("mono") \
\
- MCFG_SOUND_ADD("ymsnd", YM3812, freq1) \
- MCFG_SOUND_CONFIG(seibu_ym3812_interface) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
+ MCFG_SOUND_ADD("ymsnd", YM3812, freq1) \
+ MCFG_SOUND_CONFIG(seibu_ym3812_interface) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
\
- MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_LOW) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
+ MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_LOW) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
-#define SEIBU_SOUND_SYSTEM_YM3812_RAIDEN_INTERFACE(freq1,freq2) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
+#define SEIBU_SOUND_SYSTEM_YM3812_RAIDEN_INTERFACE(freq1,freq2) \
+ MCFG_SPEAKER_STANDARD_MONO("mono") \
\
- MCFG_SOUND_ADD("ymsnd", YM3812, freq1) \
- MCFG_SOUND_CONFIG(seibu_ym3812_interface) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
+ MCFG_SOUND_ADD("ymsnd", YM3812, freq1) \
+ MCFG_SOUND_CONFIG(seibu_ym3812_interface) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
\
- MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_HIGH) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
+ MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_HIGH) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0) \
-#define SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(freq1,freq2) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
+#define SEIBU_SOUND_SYSTEM_YM2151_INTERFACE(freq1,freq2) \
+ MCFG_SPEAKER_STANDARD_MONO("mono") \
\
- MCFG_YM2151_ADD("ymsnd", freq1) \
+ MCFG_YM2151_ADD("ymsnd", freq1) \
MCFG_YM2151_IRQ_HANDLER(WRITELINE(driver_device, member_wrapper_line<seibu_ym2151_irqhandler>)) \
- MCFG_SOUND_ROUTE(0, "mono", 0.50) \
- MCFG_SOUND_ROUTE(1, "mono", 0.50) \
+ MCFG_SOUND_ROUTE(0, "mono", 0.50) \
+ MCFG_SOUND_ROUTE(1, "mono", 0.50) \
\
- MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_LOW) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
+ MCFG_OKIM6295_ADD("oki", freq2, OKIM6295_PIN7_LOW) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
-#define SEIBU_AIRRAID_SOUND_SYSTEM_YM2151_INTERFACE(freq1) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
+#define SEIBU_AIRRAID_SOUND_SYSTEM_YM2151_INTERFACE(freq1) \
+ MCFG_SPEAKER_STANDARD_MONO("mono") \
\
- MCFG_YM2151_ADD("ymsnd", freq1) \
+ MCFG_YM2151_ADD("ymsnd", freq1) \
MCFG_YM2151_IRQ_HANDLER(WRITELINE(driver_device, member_wrapper_line<seibu_ym2151_irqhandler>)) \
- MCFG_SOUND_ROUTE(0, "mono", 0.50) \
- MCFG_SOUND_ROUTE(1, "mono", 0.50) \
+ MCFG_SOUND_ROUTE(0, "mono", 0.50) \
+ MCFG_SOUND_ROUTE(1, "mono", 0.50) \
\
-#define SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(freq1,freq2,regiona, regionb) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
+#define SEIBU_SOUND_SYSTEM_YM2151_RAIDEN2_INTERFACE(freq1,freq2,regiona, regionb) \
+ MCFG_SPEAKER_STANDARD_MONO("mono") \
\
- MCFG_YM2151_ADD("ymsnd", freq1) \
+ MCFG_YM2151_ADD("ymsnd", freq1) \
MCFG_YM2151_IRQ_HANDLER(WRITELINE(driver_device, member_wrapper_line<seibu_ym2151_irqhandler>)) \
- MCFG_SOUND_ROUTE(0, "mono", 0.50) \
- MCFG_SOUND_ROUTE(1, "mono", 0.50) \
+ MCFG_SOUND_ROUTE(0, "mono", 0.50) \
+ MCFG_SOUND_ROUTE(1, "mono", 0.50) \
\
- MCFG_OKIM6295_ADD("oki1", freq2, OKIM6295_PIN7_HIGH) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
+ MCFG_OKIM6295_ADD("oki1", freq2, OKIM6295_PIN7_HIGH) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
\
- MCFG_OKIM6295_ADD("oki2", freq2, OKIM6295_PIN7_HIGH) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
+ MCFG_OKIM6295_ADD("oki2", freq2, OKIM6295_PIN7_HIGH) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
-#define SEIBU_SOUND_SYSTEM_YM2203_INTERFACE(freq) \
- MCFG_SPEAKER_STANDARD_MONO("mono") \
+#define SEIBU_SOUND_SYSTEM_YM2203_INTERFACE(freq) \
+ MCFG_SPEAKER_STANDARD_MONO("mono") \
\
- MCFG_SOUND_ADD("ym1", YM2203, freq) \
- MCFG_SOUND_CONFIG(seibu_ym2203_interface) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15) \
+ MCFG_SOUND_ADD("ym1", YM2203, freq) \
+ MCFG_SOUND_CONFIG(seibu_ym2203_interface) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15) \
\
- MCFG_SOUND_ADD("ym2", YM2203, freq) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15) \
+ MCFG_SOUND_ADD("ym2", YM2203, freq) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15) \
-#define SEIBU_SOUND_SYSTEM_ADPCM_INTERFACE \
- MCFG_SOUND_ADD("adpcm1", SEIBU_ADPCM, 8000) \
- MCFG_SOUND_CONFIG(seibu_adpcm1_intf) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
+#define SEIBU_SOUND_SYSTEM_ADPCM_INTERFACE \
+ MCFG_SOUND_ADD("adpcm1", SEIBU_ADPCM, 8000) \
+ MCFG_SOUND_CONFIG(seibu_adpcm1_intf) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
\
- MCFG_SOUND_ADD("adpcm2", SEIBU_ADPCM, 8000) \
- MCFG_SOUND_CONFIG(seibu_adpcm2_intf) \
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
+ MCFG_SOUND_ADD("adpcm2", SEIBU_ADPCM, 8000) \
+ MCFG_SOUND_CONFIG(seibu_adpcm2_intf) \
+ MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40) \
/**************************************************************************/
-
diff --git a/src/mame/audio/senjyo.c b/src/mame/audio/senjyo.c
index c26cbe31043..358178838f1 100644
--- a/src/mame/audio/senjyo.c
+++ b/src/mame/audio/senjyo.c
@@ -33,9 +33,9 @@ Z80PIO_INTERFACE( senjyo_pio_intf )
Z80CTC_INTERFACE( senjyo_ctc_intf )
{
DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
- DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg1), /* ZC/TO0 callback */
- DEVCB_NULL, /* ZC/TO1 callback */
- DEVCB_DRIVER_LINE_MEMBER(senjyo_state, sound_line_clock) /* ZC/TO2 callback */
+ DEVCB_DEVICE_LINE_MEMBER("z80ctc", z80ctc_device, trg1), /* ZC/TO0 callback */
+ DEVCB_NULL, /* ZC/TO1 callback */
+ DEVCB_DRIVER_LINE_MEMBER(senjyo_state, sound_line_clock) /* ZC/TO2 callback */
};
WRITE_LINE_MEMBER(senjyo_state::sound_line_clock)
diff --git a/src/mame/audio/skydiver.c b/src/mame/audio/skydiver.c
index 14b46b8cb72..6090095fcc6 100644
--- a/src/mame/audio/skydiver.c
+++ b/src/mame/audio/skydiver.c
@@ -16,30 +16,30 @@
static const discrete_555_desc skydiverWhistl555 =
{
DISC_555_OUT_SQW | DISC_555_OUT_AC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_lfsr_desc skydiver_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- DISC_LFSR_FLAG_OUT_INVERT, /* Output is inverted, Active Low Reset */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ DISC_LFSR_FLAG_OUT_INVERT, /* Output is inverted, Active Low Reset */
+ 15 /* Output bit */
};
/* Nodes - Sounds */
-#define SKYDIVER_NOTE_SND NODE_11
-#define SKYDIVER_NOISE_SND NODE_12
-#define SKYDIVER_WHISTLE1_SND NODE_13
-#define SKYDIVER_WHISTLE2_SND NODE_14
+#define SKYDIVER_NOTE_SND NODE_11
+#define SKYDIVER_NOISE_SND NODE_12
+#define SKYDIVER_WHISTLE1_SND NODE_13
+#define SKYDIVER_WHISTLE2_SND NODE_14
DISCRETE_SOUND_START(skydiver)
/************************************************/
@@ -100,7 +100,7 @@ DISCRETE_SOUND_START(skydiver)
DISCRETE_DIVIDE(NODE_20, SKYDIVER_RANGE_DATA, 12096000.0 /2.0 / 2.0, SKYDIVER_RANGE_DATA)
DISCRETE_ADDER2(NODE_21, 1, SKYDIVER_NOTE_DATA, 1)
// We will disable the divide if SKYDIVER_NOTE_DATA = 0
- DISCRETE_DIVIDE(NODE_22, SKYDIVER_NOTE_DATA, NODE_20, NODE_21) // freq
+ DISCRETE_DIVIDE(NODE_22, SKYDIVER_NOTE_DATA, NODE_20, NODE_21) // freq
DISCRETE_SQUAREWAVE(SKYDIVER_NOTE_SND, SKYDIVER_RANGE3_EN, NODE_22, 1000.0, 50.0, 0, 0.0)
/************************************************/
@@ -123,17 +123,17 @@ DISCRETE_SOUND_START(skydiver)
/* frequency, then decays at the rate set by */
/* a 68k resistor and 22uf capacitor. */
/************************************************/
- DISCRETE_ADJUSTMENT(NODE_30, 250000, 50000, DISC_LINADJ, "WHISTLE1") /* R66 */
+ DISCRETE_ADJUSTMENT(NODE_30, 250000, 50000, DISC_LINADJ, "WHISTLE1") /* R66 */
DISCRETE_MULTADD(NODE_31, SKYDIVER_WHISTLE1_EN, 3.05-0.33, 0.33)
- DISCRETE_RCDISC2(NODE_32, SKYDIVER_WHISTLE1_EN, NODE_31, 1.0, NODE_31, 68000.0, 2.2e-5) /* CV */
- DISCRETE_SWITCH(NODE_33, 1, SKYDIVER_OCT1_EN, 1e-8, 1e-8 + 3.3e-9) /* Cap C73 & C58 */
+ DISCRETE_RCDISC2(NODE_32, SKYDIVER_WHISTLE1_EN, NODE_31, 1.0, NODE_31, 68000.0, 2.2e-5) /* CV */
+ DISCRETE_SWITCH(NODE_33, 1, SKYDIVER_OCT1_EN, 1e-8, 1e-8 + 3.3e-9) /* Cap C73 & C58 */
DISCRETE_555_ASTABLE_CV(NODE_34, SKYDIVER_WHISTLE1_EN, 100000, NODE_30, NODE_33, NODE_32, &skydiverWhistl555)
DISCRETE_MULTIPLY(SKYDIVER_WHISTLE1_SND, NODE_34, 228.5/3.3)
- DISCRETE_ADJUSTMENT(NODE_35, 250000, 50000, DISC_LINADJ, "WHISTLE2") /* R65 */
+ DISCRETE_ADJUSTMENT(NODE_35, 250000, 50000, DISC_LINADJ, "WHISTLE2") /* R65 */
DISCRETE_MULTADD(NODE_36, SKYDIVER_WHISTLE2_EN, 3.05-0.33, 0.33)
- DISCRETE_RCDISC2(NODE_37, SKYDIVER_WHISTLE2_EN, NODE_36, 1.0, NODE_36, 68000.0, 2.2e-5) /* CV */
- DISCRETE_SWITCH(NODE_38, 1, SKYDIVER_OCT2_EN, 1e-8, 1e-8 + 3.3e-9) /* Cap C72 & C59 */
+ DISCRETE_RCDISC2(NODE_37, SKYDIVER_WHISTLE2_EN, NODE_36, 1.0, NODE_36, 68000.0, 2.2e-5) /* CV */
+ DISCRETE_SWITCH(NODE_38, 1, SKYDIVER_OCT2_EN, 1e-8, 1e-8 + 3.3e-9) /* Cap C72 & C59 */
DISCRETE_555_ASTABLE_CV(NODE_39, SKYDIVER_WHISTLE2_EN, 100000, NODE_35, NODE_38, NODE_37, &skydiverWhistl555)
DISCRETE_MULTIPLY(SKYDIVER_WHISTLE2_SND, NODE_39, 228.5/3.3)
diff --git a/src/mame/audio/skyraid.c b/src/mame/audio/skyraid.c
index bba258f9747..51b2735f754 100644
--- a/src/mame/audio/skyraid.c
+++ b/src/mame/audio/skyraid.c
@@ -8,96 +8,96 @@
/* Discrete Sound Input Nodes */
-#define SKYRAID_PLANE_SWEEP_EN NODE_01
-#define SKYRAID_MISSILE_EN NODE_02
-#define SKYRAID_EXPLOSION_EN NODE_03
-#define SKYRAID_PLANE_ON_EN NODE_04
-#define SKYRAID_PLANE_ON__IC_E8 SKYRAID_PLANE_ON_EN
-#define SKYRAID_ATTRACT_EN NODE_05
+#define SKYRAID_PLANE_SWEEP_EN NODE_01
+#define SKYRAID_MISSILE_EN NODE_02
+#define SKYRAID_EXPLOSION_EN NODE_03
+#define SKYRAID_PLANE_ON_EN NODE_04
+#define SKYRAID_PLANE_ON__IC_E8 SKYRAID_PLANE_ON_EN
+#define SKYRAID_ATTRACT_EN NODE_05
/* Discrete Sound Output Nodes */
-#define SKYRAID_NOISE NODE_10
-#define SKYRAID_EXPLOSION_SND NODE_11
-#define SKYRAID_JET_A_SND NODE_12
-#define SKYRAID_JET_B_SND NODE_13
-#define SKYRAID_MSL_A_SND NODE_14
-#define SKYRAID_MSL_B_SND NODE_15
-#define SKYRAID_PLANE_SND NODE_16
+#define SKYRAID_NOISE NODE_10
+#define SKYRAID_EXPLOSION_SND NODE_11
+#define SKYRAID_JET_A_SND NODE_12
+#define SKYRAID_JET_B_SND NODE_13
+#define SKYRAID_MSL_A_SND NODE_14
+#define SKYRAID_MSL_B_SND NODE_15
+#define SKYRAID_PLANE_SND NODE_16
/* Parts List - Resistors */
-#define SKYRAID_R12 RES_K(1)
-#define SKYRAID_R13 RES_K(10)
-#define SKYRAID_R14 RES_K(100)
-#define SKYRAID_R16 RES_K(10)
-#define SKYRAID_R18 RES_K(10)
-#define SKYRAID_R19 RES_K(10)
-#define SKYRAID_R20 RES_K(47)
-#define SKYRAID_R24 RES_M(10)
-#define SKYRAID_R25 RES_M(3.9)
-#define SKYRAID_R27 RES_M(1.5)
-#define SKYRAID_R28 RES_M(1.5)
-#define SKYRAID_R29 RES_M(4.7)
-#define SKYRAID_R30 RES_M(1)
-#define SKYRAID_R31 RES_M(1)
-#define SKYRAID_R32 RES_M(4.7)
-#define SKYRAID_R84 RES_K(22)
-#define SKYRAID_R85 RES_K(100)
-#define SKYRAID_R86 820
-#define SKYRAID_R110 RES_K(330)
-#define SKYRAID_R118 RES_K(470)
-#define SKYRAID_R119 RES_K(10)
-#define SKYRAID_R120 RES_K(220)
-#define SKYRAID_R121 RES_K(1)
-#define SKYRAID_R122 RES_K(150)
+#define SKYRAID_R12 RES_K(1)
+#define SKYRAID_R13 RES_K(10)
+#define SKYRAID_R14 RES_K(100)
+#define SKYRAID_R16 RES_K(10)
+#define SKYRAID_R18 RES_K(10)
+#define SKYRAID_R19 RES_K(10)
+#define SKYRAID_R20 RES_K(47)
+#define SKYRAID_R24 RES_M(10)
+#define SKYRAID_R25 RES_M(3.9)
+#define SKYRAID_R27 RES_M(1.5)
+#define SKYRAID_R28 RES_M(1.5)
+#define SKYRAID_R29 RES_M(4.7)
+#define SKYRAID_R30 RES_M(1)
+#define SKYRAID_R31 RES_M(1)
+#define SKYRAID_R32 RES_M(4.7)
+#define SKYRAID_R84 RES_K(22)
+#define SKYRAID_R85 RES_K(100)
+#define SKYRAID_R86 820
+#define SKYRAID_R110 RES_K(330)
+#define SKYRAID_R118 RES_K(470)
+#define SKYRAID_R119 RES_K(10)
+#define SKYRAID_R120 RES_K(220)
+#define SKYRAID_R121 RES_K(1)
+#define SKYRAID_R122 RES_K(150)
/* Parts List - Capacitors */
-#define SKYRAID_C44 CAP_U(4.7)
-#define SKYRAID_C45 CAP_U(.0047)
-#define SKYRAID_C46 CAP_U(.001)
-#define SKYRAID_C48 CAP_U(.0047)
-#define SKYRAID_C49 CAP_U(.1)
-#define SKYRAID_C50 CAP_U(.001)
-#define SKYRAID_C51 CAP_U(.01)
-#define SKYRAID_C68 CAP_U(10)
-#define SKYRAID_C85 CAP_U(.068)
-#define SKYRAID_C86 CAP_U(.1)
-#define SKYRAID_C93 CAP_U(.1)
+#define SKYRAID_C44 CAP_U(4.7)
+#define SKYRAID_C45 CAP_U(.0047)
+#define SKYRAID_C46 CAP_U(.001)
+#define SKYRAID_C48 CAP_U(.0047)
+#define SKYRAID_C49 CAP_U(.1)
+#define SKYRAID_C50 CAP_U(.001)
+#define SKYRAID_C51 CAP_U(.01)
+#define SKYRAID_C68 CAP_U(10)
+#define SKYRAID_C85 CAP_U(.068)
+#define SKYRAID_C86 CAP_U(.1)
+#define SKYRAID_C93 CAP_U(.1)
static const discrete_lfsr_desc skyraid_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- DISC_LFSR_FLAG_RESET_TYPE_H, /* Output is not inverted */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ DISC_LFSR_FLAG_RESET_TYPE_H, /* Output is not inverted */
+ 15 /* Output bit */
};
static const discrete_op_amp_filt_info skyraid_explosion_filter =
{
- SKYRAID_R85, 0, SKYRAID_R86, 0, SKYRAID_R110, /* r1, r2, r3, r4, rF*/
- SKYRAID_C85, SKYRAID_C86, 0, /* c1, c2, c3 */
- 0, 12, -5, /* vRef, vP, vN */
+ SKYRAID_R85, 0, SKYRAID_R86, 0, SKYRAID_R110, /* r1, r2, r3, r4, rF*/
+ SKYRAID_C85, SKYRAID_C86, 0, /* c1, c2, c3 */
+ 0, 12, -5, /* vRef, vP, vN */
};
static const discrete_dac_r1_ladder skyraid_plane_dac =
{
2, {SKYRAID_R28, SKYRAID_R27},
- 0, 0, 0, 0 /* no vBias, rBias, rGnd, cFilter */
+ 0, 0, 0, 0 /* no vBias, rBias, rGnd, cFilter */
};
static const discrete_mixer_desc skyraid_mixer =
{
DISC_MIXER_IS_RESISTOR,
{SKYRAID_R120, SKYRAID_R32, SKYRAID_R29, SKYRAID_R30, SKYRAID_R31, RES_2_PARALLEL(SKYRAID_R28, SKYRAID_R27)},
- {0, 0, 0, 0, 0, SKYRAID_PLANE_ON__IC_E8}, /* r_nodes */
- {0}, 0, 0, 0, 0, 0, 1 /* no c, rI, rF, cF, cAmp, vRef, gain */
+ {0, 0, 0, 0, 0, SKYRAID_PLANE_ON__IC_E8}, /* r_nodes */
+ {0}, 0, 0, 0, 0, 0, 1 /* no c, rI, rF, cF, cAmp, vRef, gain */
};
@@ -135,11 +135,11 @@ static const discrete_mixer_desc skyraid_mixer =
* |/
*
************************************************************************/
-#define SKYRAID_MISSLE_CUSTOM_IN1 DISCRETE_INPUT(0)
-#define SKYRAID_MISSLE_CUSTOM_R1 DISCRETE_INPUT(1)
-#define SKYRAID_MISSLE_CUSTOM_R2 DISCRETE_INPUT(2)
-#define SKYRAID_MISSLE_CUSTOM_R3 DISCRETE_INPUT(3)
-#define SKYRAID_MISSLE_CUSTOM_C DISCRETE_INPUT(4)
+#define SKYRAID_MISSLE_CUSTOM_IN1 DISCRETE_INPUT(0)
+#define SKYRAID_MISSLE_CUSTOM_R1 DISCRETE_INPUT(1)
+#define SKYRAID_MISSLE_CUSTOM_R2 DISCRETE_INPUT(2)
+#define SKYRAID_MISSLE_CUSTOM_R3 DISCRETE_INPUT(3)
+#define SKYRAID_MISSLE_CUSTOM_C DISCRETE_INPUT(4)
DISCRETE_CLASS_STEP_RESET(skyraid_missle_custom_charge, 2,
double m_v_charge[2];
@@ -148,7 +148,7 @@ DISCRETE_CLASS_STEP_RESET(skyraid_missle_custom_charge, 2,
);
/* the high charge is clamped by the diode to 0.7V above the 5V line */
-#define SKYRAID_MISSLE_CHARGE_PLUS (5.0 + 0.7)
+#define SKYRAID_MISSLE_CHARGE_PLUS (5.0 + 0.7)
DISCRETE_STEP( skyraid_missle_custom_charge )
{
@@ -184,8 +184,8 @@ DISCRETE_RESET( skyraid_missle_custom_charge )
DISCRETE_SOUND_START( skyraid )
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
/* convert the PLANE_SWEEP line to voltage*/
DISCRETE_INPUTX_LOGIC(SKYRAID_PLANE_SWEEP_EN, DEFAULT_TTL_V_LOGIC_1 * RES_VOLTAGE_DIVIDER(SKYRAID_R25, SKYRAID_R24), 0, 0)
DISCRETE_INPUT_LOGIC(SKYRAID_MISSILE_EN)
@@ -195,76 +195,76 @@ DISCRETE_SOUND_START( skyraid )
DISCRETE_INPUT_LOGIC(SKYRAID_ATTRACT_EN)
/************************************************
- * Noise Generator, Explosion sound
- ************************************************/
+ * Noise Generator, Explosion sound
+ ************************************************/
/* Note: the noise reset is not emulated 100% accurate */
/* According to the schematics, Attract only clears the lower 8 bits. */
/* I may modify the noise module in the future to properly emulate this, */
/* but you will never hear the difference. */
/* It only wrong for 8 cycles of the 555 while no sound is being generated. */
- DISCRETE_LFSR_NOISE(SKYRAID_NOISE, /* IC F7, pin 13 */
- 1, /* ENAB */
- SKYRAID_ATTRACT_EN, /* RESET */
- 1.49 / ((SKYRAID_R20 + 2 * SKYRAID_R19) * SKYRAID_C51), /* CLK - 555 astable source */
- 1, 0, 0.5, &skyraid_lfsr) /* AMPL, FEED, BIAS */
+ DISCRETE_LFSR_NOISE(SKYRAID_NOISE, /* IC F7, pin 13 */
+ 1, /* ENAB */
+ SKYRAID_ATTRACT_EN, /* RESET */
+ 1.49 / ((SKYRAID_R20 + 2 * SKYRAID_R19) * SKYRAID_C51), /* CLK - 555 astable source */
+ 1, 0, 0.5, &skyraid_lfsr) /* AMPL, FEED, BIAS */
DISCRETE_LOGIC_NOR(NODE_20, SKYRAID_EXPLOSION_EN, SKYRAID_NOISE)
DISCRETE_RC_CIRCUIT_1(NODE_21,
- SKYRAID_EXPLOSION_EN, NODE_20, /* INP0, INP1 */
+ SKYRAID_EXPLOSION_EN, NODE_20, /* INP0, INP1 */
RES_2_PARALLEL(SKYRAID_R84, SKYRAID_R85 + SKYRAID_R86), SKYRAID_C68)
DISCRETE_OP_AMP_FILTER(NODE_22,
- 1, /* ENAB */
- NODE_21, 0, /* INP0, INP1 */
- DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &skyraid_explosion_filter) /* TYPE,INFO */
+ 1, /* ENAB */
+ NODE_21, 0, /* INP0, INP1 */
+ DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &skyraid_explosion_filter) /* TYPE,INFO */
/* IC E10, pin 14 gain and clipping */
DISCRETE_GAIN(NODE_23, NODE_22, SKYRAID_R119 / SKYRAID_R121 + 1)
DISCRETE_CLAMP(SKYRAID_EXPLOSION_SND, NODE_23, -5, 12.0 - 1.5)
/************************************************
- * Jet, Plane sound
- ************************************************/
- DISCRETE_RCFILTER(NODE_30, /* IC J6, pin 5 */
- SKYRAID_PLANE_SWEEP_EN, /* IN0 */
+ * Jet, Plane sound
+ ************************************************/
+ DISCRETE_RCFILTER(NODE_30, /* IC J6, pin 5 */
+ SKYRAID_PLANE_SWEEP_EN, /* IN0 */
RES_2_PARALLEL(SKYRAID_R25, SKYRAID_R24), SKYRAID_C49)
- DISCRETE_566(NODE_31, /* IC J6, pin 3 */
- NODE_30, /* VMOD */
+ DISCRETE_566(NODE_31, /* IC J6, pin 3 */
+ NODE_30, /* VMOD */
SKYRAID_R18, SKYRAID_C48,
- 5, -5, 5, /* VPOS,VNEG,VCHARGE */
+ 5, -5, 5, /* VPOS,VNEG,VCHARGE */
DISC_566_OUT_COUNT_R)
- DISCRETE_LOGIC_SHIFT(NODE_32, /* IC H7, J7 output */
- SKYRAID_NOISE, /* IC H7, J7 pins 1 & 2 */
- 1, NODE_31, 16, /* RESET, CLK, SIZE */
+ DISCRETE_LOGIC_SHIFT(NODE_32, /* IC H7, J7 output */
+ SKYRAID_NOISE, /* IC H7, J7 pins 1 & 2 */
+ 1, NODE_31, 16, /* RESET, CLK, SIZE */
DISC_LOGIC_SHIFT__RESET_L | DISC_LOGIC_SHIFT__LEFT | DISC_CLK_BY_COUNT)
/* move bits together for ease of use */
DISCRETE_TRANSFORM4(NODE_33, NODE_32, 1, 1 << 14, 2, "01&02/3&|")
DISCRETE_DAC_R1(SKYRAID_PLANE_SND,
- NODE_33, /* DATA */
+ NODE_33, /* DATA */
DEFAULT_TTL_V_LOGIC_1, &skyraid_plane_dac)
- DISCRETE_BIT_DECODE(SKYRAID_JET_A_SND, NODE_32, 0, DEFAULT_TTL_V_LOGIC_1) /* IC H7, pin 3 */
- DISCRETE_BIT_DECODE(SKYRAID_JET_B_SND, NODE_32, 15, DEFAULT_TTL_V_LOGIC_1) /* IC J7, pin 13 */
+ DISCRETE_BIT_DECODE(SKYRAID_JET_A_SND, NODE_32, 0, DEFAULT_TTL_V_LOGIC_1) /* IC H7, pin 3 */
+ DISCRETE_BIT_DECODE(SKYRAID_JET_B_SND, NODE_32, 15, DEFAULT_TTL_V_LOGIC_1) /* IC J7, pin 13 */
/************************************************
- * Missle sound
- ************************************************/
+ * Missle sound
+ ************************************************/
DISCRETE_CUSTOM5(NODE_40, skyraid_missle_custom_charge, SKYRAID_MISSILE_EN, SKYRAID_R12, SKYRAID_R14, SKYRAID_R13, SKYRAID_C44, NULL)
- DISCRETE_566(NODE_41, /* IC K6, pin 3 */
- NODE_40, /* VMOD */
+ DISCRETE_566(NODE_41, /* IC K6, pin 3 */
+ NODE_40, /* VMOD */
SKYRAID_R16, SKYRAID_C45,
- 5, -5, SKYRAID_MISSLE_CHARGE_PLUS, /* VPOS,VNEG,VCHARGE */
+ 5, -5, SKYRAID_MISSLE_CHARGE_PLUS, /* VPOS,VNEG,VCHARGE */
DISC_566_OUT_COUNT_R)
- DISCRETE_LOGIC_SHIFT(NODE_42, /* IC K7, L7 output */
- SKYRAID_NOISE, /* IC K7, L7 pins 1 & 2 */
- 1, NODE_41, 16, /* RESET, CLK, SIZE */
+ DISCRETE_LOGIC_SHIFT(NODE_42, /* IC K7, L7 output */
+ SKYRAID_NOISE, /* IC K7, L7 pins 1 & 2 */
+ 1, NODE_41, 16, /* RESET, CLK, SIZE */
DISC_LOGIC_SHIFT__RESET_L | DISC_LOGIC_SHIFT__LEFT | DISC_CLK_BY_COUNT)
- DISCRETE_BIT_DECODE(SKYRAID_MSL_A_SND, NODE_42, 0, DEFAULT_TTL_V_LOGIC_1) /* IC K7, pin 3 */
- DISCRETE_BIT_DECODE(SKYRAID_MSL_B_SND, NODE_42, 15, DEFAULT_TTL_V_LOGIC_1) /* IC L7, pin 13 */
+ DISCRETE_BIT_DECODE(SKYRAID_MSL_A_SND, NODE_42, 0, DEFAULT_TTL_V_LOGIC_1) /* IC K7, pin 3 */
+ DISCRETE_BIT_DECODE(SKYRAID_MSL_B_SND, NODE_42, 15, DEFAULT_TTL_V_LOGIC_1) /* IC L7, pin 13 */
/************************************************
- * Final Mix
- ************************************************/
+ * Final Mix
+ ************************************************/
DISCRETE_LOGIC_INVERT(NODE_91, SKYRAID_ATTRACT_EN)
DISCRETE_MIXER6(NODE_92,
- NODE_91, /* ENAB */
+ NODE_91, /* ENAB */
SKYRAID_EXPLOSION_SND,
SKYRAID_JET_A_SND,
SKYRAID_JET_B_SND,
@@ -273,7 +273,7 @@ DISCRETE_SOUND_START( skyraid )
SKYRAID_PLANE_SND,
&skyraid_mixer)
DISCRETE_CRFILTER(NODE_93,
- NODE_92, /* IN0 */
+ NODE_92, /* IN0 */
SKYRAID_R122 + RES_6_PARALLEL(SKYRAID_R120, SKYRAID_R32, SKYRAID_R29, SKYRAID_R30, SKYRAID_R31, RES_2_PARALLEL(SKYRAID_R27, SKYRAID_R28)),
SKYRAID_C93)
/* IC E10, pin 1 gain and clipping */
diff --git a/src/mame/audio/snes_snd.c b/src/mame/audio/snes_snd.c
index 98a5efe33fe..fba9c9cbd48 100644
--- a/src/mame/audio/snes_snd.c
+++ b/src/mame/audio/snes_snd.c
@@ -134,17 +134,17 @@ static const int mask = 0xFF;
The counter starts at 30720 (0x7800). */
static const int CNT_INIT = 0x7800;
static const int ENVCNT[0x20]
- = {
- 0x0000, 0x000F, 0x0014, 0x0018, 0x001E, 0x0028, 0x0030, 0x003C,
- 0x0050, 0x0060, 0x0078, 0x00A0, 0x00C0, 0x00F0, 0x0140, 0x0180,
- 0x01E0, 0x0280, 0x0300, 0x03C0, 0x0500, 0x0600, 0x0780, 0x0A00,
- 0x0C00, 0x0F00, 0x1400, 0x1800, 0x1E00, 0x2800, 0x3C00, 0x7800
- };
+ = {
+ 0x0000, 0x000F, 0x0014, 0x0018, 0x001E, 0x0028, 0x0030, 0x003C,
+ 0x0050, 0x0060, 0x0078, 0x00A0, 0x00C0, 0x00F0, 0x0140, 0x0180,
+ 0x01E0, 0x0280, 0x0300, 0x03C0, 0x0500, 0x0600, 0x0780, 0x0A00,
+ 0x0C00, 0x0F00, 0x1400, 0x1800, 0x1E00, 0x2800, 0x3C00, 0x7800
+ };
/* Make reading the ADSR code easier */
-#define SL( v ) (spc700->dsp_regs[((v) << 4) + 6] >> 5) /* Returns SUSTAIN level */
-#define SR( v ) (spc700->dsp_regs[((v) << 4) + 6] & 0x1f) /* Returns SUSTAIN rate */
+#define SL( v ) (spc700->dsp_regs[((v) << 4) + 6] >> 5) /* Returns SUSTAIN level */
+#define SR( v ) (spc700->dsp_regs[((v) << 4) + 6] & 0x1f) /* Returns SUSTAIN rate */
/* Handle endianness */
#define LEtoME16( x ) LITTLE_ENDIANIZE_INT16(x)
@@ -199,11 +199,11 @@ struct snes_sound_state
{
UINT8 *ram;
sound_stream *channel;
- UINT8 dsp_regs[256]; /* DSP registers */
- UINT8 ipl_region[64]; /* SPC top 64 bytes */
+ UINT8 dsp_regs[256]; /* DSP registers */
+ UINT8 ipl_region[64]; /* SPC top 64 bytes */
int keyed_on;
- int keys; /* 8-bits for 8 voices */
+ int keys; /* 8-bits for 8 voices */
voice_state_type voice_state[8];
/* Noise stuff */
@@ -224,8 +224,8 @@ struct snes_sound_state
UINT16 counter[3];
/* IO ports */
- UINT8 port_in[4]; /* SPC input ports */
- UINT8 port_out[4]; /* SPC output ports */
+ UINT8 port_in[4]; /* SPC input ports */
+ UINT8 port_out[4]; /* SPC output ports */
};
/*****************************************************************************
@@ -320,10 +320,10 @@ static void dsp_update( device_t *device, short *sound_ptr )
dsp_reset(device);
/* Here we check for keys on/off. Docs say that successive writes to KON/KOF
- must be separated by at least 2 Ts periods or risk being neglected.
- Therefore DSP only looks at these during an update, and not at the time of
- the write. Only need to do this once however, since the regs haven't
- changed over the whole period we need to catch up with. */
+ must be separated by at least 2 Ts periods or risk being neglected.
+ Therefore DSP only looks at these during an update, and not at the time of
+ the write. Only need to do this once however, since the regs haven't
+ changed over the whole period we need to catch up with. */
#ifdef DBG_KEY
spc700->dsp_regs[0x4c] &= mask;
#endif
@@ -332,8 +332,8 @@ static void dsp_update( device_t *device, short *sound_ptr )
spc700->dsp_regs[0x7c] &= ~spc700->dsp_regs[0x4c];
/* Question: what is the expected behavior when pitch modulation is enabled on
- voice 0? Jurassic Park 2 does this. For now, using outx of zero for first
- voice. */
+ voice 0? Jurassic Park 2 does this. For now, using outx of zero for first
+ voice. */
outx = 0;
/* Same table for noise and envelope */
@@ -377,10 +377,10 @@ static void dsp_update( device_t *device, short *sound_ptr )
vp->mixfrac = 3 * 4096;
/* NOTE: Real SNES does *not* appear to initialize the envelope
- counter to anything in particular. The first cycle always seems to
- come at a random time sooner than expected; as yet, I have been
- unable to find any pattern. I doubt it will matter though, so
- we'll go ahead and do the full time for now. */
+ counter to anything in particular. The first cycle always seems to
+ come at a random time sooner than expected; as yet, I have been
+ unable to find any pattern. I doubt it will matter though, so
+ we'll go ahead and do the full time for now. */
vp->envcnt = CNT_INIT;
vp->envstate = ATTACK;
}
@@ -419,7 +419,7 @@ static void dsp_update( device_t *device, short *sound_ptr )
#ifndef NO_PMOD
/* Pitch mod uses OUTX from last voice for this one. Luckily we haven't
- modified OUTX since it was used for last voice. */
+ modified OUTX since it was used for last voice. */
if (spc700->dsp_regs[0x2d] & m)
{
#ifdef DBG_PMOD
@@ -436,18 +436,18 @@ static void dsp_update( device_t *device, short *sound_ptr )
for ( ; vp->mixfrac >= 0; vp->mixfrac -= 4096)
{
/* This part performs the BRR decode 'on-the-fly'. This is more
- correct than the old way, which could be fooled if the data and/or
- the loop point changed while the sample was playing, or if the BRR
- decode didn't produce the same result every loop because of the
- filters. The event interface still has no chance of keeping up
- with those kinds of tricks, though. */
+ correct than the old way, which could be fooled if the data and/or
+ the loop point changed while the sample was playing, or if the BRR
+ decode didn't produce the same result every loop because of the
+ filters. The event interface still has no chance of keeping up
+ with those kinds of tricks, though. */
if (!vp->header_cnt)
{
if (vp->end & 1)
{
/* Docs say ENDX bit is set when decode of block with source
- end flag set is done. Does this apply to looping samples?
- Some info I've seen suggests yes. */
+ end flag set is done. Does this apply to looping samples?
+ Some info I've seen suggests yes. */
spc700->dsp_regs[0x7c] |= m;
if (vp->end & 2)
{
@@ -507,10 +507,10 @@ static void dsp_update( device_t *device, short *sound_ptr )
#endif
/* For invalid ranges (D,E,F): if the nybble is negative, the result
- is F000. If positive, 0000. Nothing else like previous range,
- etc. seems to have any effect. If range is valid, do the shift
- normally. Note these are both shifted right once to do the filters
- properly, but the output will be shifted back again at the end. */
+ is F000. If positive, 0000. Nothing else like previous range,
+ etc. seems to have any effect. If range is valid, do the shift
+ normally. Note these are both shifted right once to do the filters
+ properly, but the output will be shifted back again at the end. */
if (vp->range <= 0xc)
{
outx = (outx << vp->range) >> 1;
@@ -581,19 +581,19 @@ static void dsp_update( device_t *device, short *sound_ptr )
else
{
/* Perform 4-Point Gaussian interpolation. Take an approximation of a
- Gaussian bell-curve, and move it through the sample data at a rate
- determined by the pitch. The sample output at any given time is
- the sum of the products of each input sample point with the value
- of the bell-curve corresponding to that point. */
+ Gaussian bell-curve, and move it through the sample data at a rate
+ determined by the pitch. The sample output at any given time is
+ the sum of the products of each input sample point with the value
+ of the bell-curve corresponding to that point. */
vl = vp->mixfrac >> 4;
vr = ((G4[-vl-1] * vp->sampbuf[vp->sampptr]) >> 11 ) & ~1;
vr += ((G3[-vl] * vp->sampbuf[(vp->sampptr + 1) & 3]) >> 11) & ~1;
vr += ((G2[vl] * vp->sampbuf[(vp->sampptr + 2) & 3]) >> 11 ) & ~1;
/* This is to do the wrapping properly. Based on my tests with the
- SNES, it appears clipping is done only if it is the fourth addition
- that would cause a wrap. If it has already wrapped before the
- fourth addition, it is not clipped. */
+ SNES, it appears clipping is done only if it is the fourth addition
+ that would cause a wrap. If it has already wrapped before the
+ fourth addition, it is not clipped. */
vr = (signed short)vr;
vr += ((G1[vl] * vp->sampbuf[(vp->sampptr + 3) & 3]) >> 11) & ~1;
@@ -643,7 +643,7 @@ static void dsp_update( device_t *device, short *sound_ptr )
#ifndef NO_ECHO
/* Perform echo. First, read mem at current location, and put those samples
- into the FIR filter queue. */
+ into the FIR filter queue. */
#ifdef DBG_ECHO
logerror("Echo delay=%dms, feedback=%d%%\n", spc700->dsp_regs[0x7d] * 16,
((signed char)spc700->dsp_regs[0x0d] * 100) / 0x7f);
@@ -744,7 +744,7 @@ static void dsp_update( device_t *device, short *sound_ptr )
else
{
if (outl > 32767)
- *sound_ptr = 32767;
+ *sound_ptr = 32767;
else if (outl < -32768)
*sound_ptr = -32768;
else
@@ -753,7 +753,7 @@ static void dsp_update( device_t *device, short *sound_ptr )
sound_ptr++;
if (outr > 32767)
- *sound_ptr = 32767;
+ *sound_ptr = 32767;
else if (outr < -32768)
*sound_ptr = -32768;
else
@@ -785,11 +785,11 @@ static int advance_envelope( device_t *device, int v )
if (spc700->voice_state[v].envstate == RELEASE)
{
/* Docs: "When in the state of "key off". the "click" sound is prevented
- by the addition of the fixed value 1/256" WTF??? Alright, I'm going
- to choose to interpret that this way: When a note is keyed off, start
- the RELEASE state, which subtracts 1/256th each sample period (32kHz).
- Note there's no need for a count because it always happens every
- update. */
+ by the addition of the fixed value 1/256" WTF??? Alright, I'm going
+ to choose to interpret that this way: When a note is keyed off, start
+ the RELEASE state, which subtracts 1/256th each sample period (32kHz).
+ Note there's no need for a count because it always happens every
+ update. */
envx -= 0x8; /* 0x8 / 0x800 = 1/256th */
if (envx <= 0)
{
@@ -817,11 +817,11 @@ static int advance_envelope( device_t *device, int v )
{
case ATTACK:
/* Docs are very confusing. "AR is multiplied by the fixed value
- 1/64..." I believe it means to add 1/64th to ENVX once every
- time ATTACK is updated, and that's what I'm going to implement. */
+ 1/64..." I believe it means to add 1/64th to ENVX once every
+ time ATTACK is updated, and that's what I'm going to implement. */
t = adsr1 & 0x0f;
- if (t == 0x0f)
+ if (t == 0x0f)
{
#ifdef DBG_ENV
logerror("ENV voice %d: instant attack\n", v);
@@ -855,8 +855,8 @@ static int advance_envelope( device_t *device, int v )
case DECAY:
/* Docs: "DR... [is multiplied] by the fixed value 1-1/256."
- Well, at least that makes some sense. Multiplying ENVX by
- 255/256 every time DECAY is updated. */
+ Well, at least that makes some sense. Multiplying ENVX by
+ 255/256 every time DECAY is updated. */
cnt -= ENVCNT[((adsr1 >> 3) & 0x0e) + 0x10];
if (cnt <= 0)
@@ -877,7 +877,7 @@ static int advance_envelope( device_t *device, int v )
case SUSTAIN:
/* Docs: "SR [is multiplied] by the fixed value 1-1/256."
- Multiplying ENVX by 255/256 every time SUSTAIN is updated. */
+ Multiplying ENVX by 255/256 every time SUSTAIN is updated. */
#ifdef DBG_ENV
if (ENVCNT[SR(v)] == 0)
logerror("ENV voice %d: envx=%03X, state=SUSTAIN, zero rate\n", v, envx);
@@ -906,14 +906,14 @@ static int advance_envelope( device_t *device, int v )
else
{
/* GAIN mode is set
- Note: if the game switches between ADSR and GAIN modes partway
- through, should the count be reset, or should it continue from
- where it was? Does the DSP actually watch for that bit to
- change, or does it just go along with whatever it sees when it
- performs the update? I'm going to assume the latter and not
- update the count, unless I see a game that obviously wants the
- other behavior. The effect would be pretty subtle, in any case.
- */
+ Note: if the game switches between ADSR and GAIN modes partway
+ through, should the count be reset, or should it continue from
+ where it was? Does the DSP actually watch for that bit to
+ change, or does it just go along with whatever it sees when it
+ performs the update? I'm going to assume the latter and not
+ update the count, unless I see a game that obviously wants the
+ other behavior. The effect would be pretty subtle, in any case.
+ */
t = spc700->dsp_regs[(v << 4) + 7];
if (t < 0x80)
@@ -987,7 +987,7 @@ static int advance_envelope( device_t *device, int v )
case 7:
/* Docs: "Increase (bent line): Addition of the constant
- 1/64 up to .75 of the constaint <sic> 1/256 from .75 to 1." */
+ 1/64 up to .75 of the constaint <sic> 1/256 from .75 to 1." */
cnt -= ENVCNT[t & 0x1f];
if (cnt > 0)
@@ -1111,32 +1111,32 @@ READ8_DEVICE_HANDLER( spc_io_r )
{
snes_sound_state *spc700 = get_safe_token(device);
- switch (offset) /* Offset is from 0x00f0 */
+ switch (offset) /* Offset is from 0x00f0 */
{
case 0x0: //FIXME: Super Bomberman PBW reads from there, is it really write-only?
return 0;
case 0x1:
return 0; //Super Kick Boxing reads port 1 and wants it to be zero.
- case 0x2: /* Register address */
+ case 0x2: /* Register address */
return spc700->ram[0xf2];
- case 0x3: /* Register data */
+ case 0x3: /* Register data */
return snes_dsp_io_r(device, space, spc700->ram[0xf2]);
- case 0x4: /* Port 0 */
- case 0x5: /* Port 1 */
- case 0x6: /* Port 2 */
- case 0x7: /* Port 3 */
+ case 0x4: /* Port 0 */
+ case 0x5: /* Port 1 */
+ case 0x6: /* Port 2 */
+ case 0x7: /* Port 3 */
// mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, space.device().safe_pc());
return spc700->port_in[offset - 4];
case 0x8: //normal RAM, can be read even if the ram disabled flag ($f0 bit 1) is active
case 0x9:
return spc700->ram[0xf0 + offset];
- case 0xa: /* Timer 0 */
- case 0xb: /* Timer 1 */
- case 0xc: /* Timer 2 */
+ case 0xa: /* Timer 0 */
+ case 0xb: /* Timer 1 */
+ case 0xc: /* Timer 2 */
break;
- case 0xd: /* Counter 0 */
- case 0xe: /* Counter 1 */
- case 0xf: /* Counter 2 */
+ case 0xd: /* Counter 0 */
+ case 0xe: /* Counter 1 */
+ case 0xf: /* Counter 2 */
{
UINT8 value = spc700->ram[0xf0 + offset] & 0x0f;
spc700->ram[0xf0 + offset] = 0;
@@ -1152,12 +1152,12 @@ WRITE8_DEVICE_HANDLER( spc_io_w )
snes_sound_state *spc700 = get_safe_token(device);
int i;
- switch (offset) /* Offset is from 0x00f0 */
+ switch (offset) /* Offset is from 0x00f0 */
{
case 0x0:
printf("Warning: write to SOUND TEST register with data %02x!\n", data);
break;
- case 0x1: /* Control */
+ case 0x1: /* Control */
for (i = 0; i < 3; i++)
{
if (BIT(data, i) && !spc700->enabled[i])
@@ -1184,29 +1184,29 @@ WRITE8_DEVICE_HANDLER( spc_io_w )
/* bit 7 = IPL ROM enable */
break;
- case 0x2: /* Register address */
+ case 0x2: /* Register address */
break;
- case 0x3: /* Register data - 0x80-0xff is a read-only mirror of 0x00-0x7f */
+ case 0x3: /* Register data - 0x80-0xff is a read-only mirror of 0x00-0x7f */
if (!(spc700->ram[0xf2] & 0x80))
snes_dsp_io_w(device, space, spc700->ram[0xf2] & 0x7f, data);
break;
- case 0x4: /* Port 0 */
- case 0x5: /* Port 1 */
- case 0x6: /* Port 2 */
- case 0x7: /* Port 3 */
+ case 0x4: /* Port 0 */
+ case 0x5: /* Port 1 */
+ case 0x6: /* Port 2 */
+ case 0x7: /* Port 3 */
// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, space.device().safe_pc());
spc700->port_out[offset - 4] = data;
space.machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
break;
- case 0xa: /* Timer 0 */
- case 0xb: /* Timer 1 */
- case 0xc: /* Timer 2 */
+ case 0xa: /* Timer 0 */
+ case 0xb: /* Timer 1 */
+ case 0xc: /* Timer 2 */
if (data == 0)
data = 255;
break;
- case 0xd: /* Counter 0 */
- case 0xe: /* Counter 1 */
- case 0xf: /* Counter 2 */
+ case 0xd: /* Counter 0 */
+ case 0xe: /* Counter 1 */
+ case 0xf: /* Counter 2 */
return;
}
@@ -1364,7 +1364,7 @@ const device_type SNES = &device_creator<snes_sound_device>;
snes_sound_device::snes_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SNES, "SNES Custom DSP (SPC700)", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(snes_sound_state);
}
@@ -1406,5 +1406,3 @@ void snes_sound_device::sound_stream_update(sound_stream &stream, stream_sample_
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/snes_snd.h b/src/mame/audio/snes_snd.h
index 9a10ac49f02..7f6dbd4b116 100644
--- a/src/mame/audio/snes_snd.h
+++ b/src/mame/audio/snes_snd.h
@@ -17,7 +17,7 @@
***************************************************************************/
class snes_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
snes_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/mame/audio/snk6502.c b/src/mame/audio/snk6502.c
index 6f91a28fa29..970b5329127 100644
--- a/src/mame/audio/snk6502.c
+++ b/src/mame/audio/snk6502.c
@@ -18,27 +18,27 @@
#ifndef M_LN2
-#define M_LN2 0.69314718055994530942
+#define M_LN2 0.69314718055994530942
#endif
-#define TONE_VOLUME 50
-#define CHANNELS 3
+#define TONE_VOLUME 50
+#define CHANNELS 3
-#define SAMPLE_RATE (48000)
-#define FRAC_BITS 16
-#define FRAC_ONE (1 << FRAC_BITS)
-#define FRAC_MASK (FRAC_ONE - 1)
+#define SAMPLE_RATE (48000)
+#define FRAC_BITS 16
+#define FRAC_ONE (1 << FRAC_BITS)
+#define FRAC_MASK (FRAC_ONE - 1)
struct TONE
{
- int mute;
- int offset;
- int base;
- int mask;
- INT32 sample_rate;
- INT32 sample_step;
- INT32 sample_cur;
- INT16 form[16];
+ int mute;
+ int offset;
+ int base;
+ int mask;
+ INT32 sample_rate;
+ INT32 sample_step;
+ INT32 sample_cur;
+ INT16 form[16];
};
struct snk6502_sound_state
@@ -74,7 +74,7 @@ static const char *const sasuke_sample_names[] =
const samples_interface sasuke_samples_interface =
{
- 4, /* 4 channels */
+ 4, /* 4 channels */
sasuke_sample_names
};
@@ -109,7 +109,7 @@ static const char *const vanguard_sample_names[] =
const samples_interface vanguard_samples_interface =
{
- 3, /* 3 channel */
+ 3, /* 3 channel */
vanguard_sample_names
};
@@ -136,212 +136,212 @@ static const char *const fantasy_sample_names[] =
const samples_interface fantasy_samples_interface =
{
- 1, /* 1 channel */
+ 1, /* 1 channel */
fantasy_sample_names
};
const sn76477_interface sasuke_sn76477_intf_1 =
{
- RES_K(470), /* 4 noise_res */
- RES_K(150), /* 5 filter_res */
- CAP_P(4700), /* 6 filter_cap */
- RES_K(22), /* 7 decay_res */
- CAP_U(10), /* 8 attack_decay_cap */
- RES_K(10), /* 10 attack_res */
- RES_K(100), /* 11 amplitude_res */
- RES_K(47), /* 12 feedback_res */
- 0 /* NC */, /* 16 vco_voltage */
- 0 /* NC */, /* 17 vco_cap */
- 0 /* NC */, /* 18 vco_res */
- 0 /* NC */, /* 19 pitch_voltage */
- RES_K(10), /* 20 slf_res */
- 0 /* NC */, /* 21 slf_cap */
- CAP_U(2.2), /* 23 oneshot_cap */
- RES_K(100), /* 24 oneshot_res */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 1, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(470), /* 4 noise_res */
+ RES_K(150), /* 5 filter_res */
+ CAP_P(4700), /* 6 filter_cap */
+ RES_K(22), /* 7 decay_res */
+ CAP_U(10), /* 8 attack_decay_cap */
+ RES_K(10), /* 10 attack_res */
+ RES_K(100), /* 11 amplitude_res */
+ RES_K(47), /* 12 feedback_res */
+ 0 /* NC */, /* 16 vco_voltage */
+ 0 /* NC */, /* 17 vco_cap */
+ 0 /* NC */, /* 18 vco_res */
+ 0 /* NC */, /* 19 pitch_voltage */
+ RES_K(10), /* 20 slf_res */
+ 0 /* NC */, /* 21 slf_cap */
+ CAP_U(2.2), /* 23 oneshot_cap */
+ RES_K(100), /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 1, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
// ic48 GND: 2,22,26,27,28 +5V: 1,15,25
};
const sn76477_interface sasuke_sn76477_intf_2 =
{
- RES_K(340), /* 4 noise_res */
- RES_K(47), /* 5 filter_res */
- CAP_P(100), /* 6 filter_cap */
- RES_K(470), /* 7 decay_res */
- CAP_U(4.7), /* 8 attack_decay_cap */
- RES_K(10), /* 10 attack_res */
- RES_K(100), /* 11 amplitude_res */
- RES_K(47), /* 12 feedback_res */
- 0 /* NC */, /* 16 vco_voltage */
- CAP_P(220), /* 17 vco_cap */
- RES_K(1000), /* 18 vco_res */
- 0 /* NC */, /* 19 pitch_voltage */
- RES_K(220), /* 20 slf_res */
- 0 /* NC */, /* 21 slf_cap */
- CAP_U(22), /* 23 oneshot_cap */
- RES_K(47), /* 24 oneshot_res */
- 1, /* 22 vco */
- 0, /* 26 mixer A */
- 1, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 1, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(340), /* 4 noise_res */
+ RES_K(47), /* 5 filter_res */
+ CAP_P(100), /* 6 filter_cap */
+ RES_K(470), /* 7 decay_res */
+ CAP_U(4.7), /* 8 attack_decay_cap */
+ RES_K(10), /* 10 attack_res */
+ RES_K(100), /* 11 amplitude_res */
+ RES_K(47), /* 12 feedback_res */
+ 0 /* NC */, /* 16 vco_voltage */
+ CAP_P(220), /* 17 vco_cap */
+ RES_K(1000), /* 18 vco_res */
+ 0 /* NC */, /* 19 pitch_voltage */
+ RES_K(220), /* 20 slf_res */
+ 0 /* NC */, /* 21 slf_cap */
+ CAP_U(22), /* 23 oneshot_cap */
+ RES_K(47), /* 24 oneshot_res */
+ 1, /* 22 vco */
+ 0, /* 26 mixer A */
+ 1, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 1, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
// ic51 GND: 2,26,27 +5V: 1,15,22,25,28
};
const sn76477_interface sasuke_sn76477_intf_3 =
{
- RES_K(330), /* 4 noise_res */
- RES_K(47), /* 5 filter_res */
- CAP_P(100), /* 6 filter_cap */
- RES_K(1), /* 7 decay_res */
- 0 /* NC */, /* 8 attack_decay_cap */
- RES_K(1), /* 10 attack_res */
- RES_K(100), /* 11 amplitude_res */
- RES_K(47), /* 12 feedback_res */
- 0 /* NC */, /* 16 vco_voltage */
- CAP_P(1000), /* 17 vco_cap */
- RES_K(1000), /* 18 vco_res */
- 0 /* NC */, /* 19 pitch_voltage */
- RES_K(10), /* 20 slf_res */
- CAP_U(1), /* 21 slf_cap */
- CAP_U(2.2), /* 23 oneshot_cap */
- RES_K(150), /* 24 oneshot_res */
- 0, /* 22 vco */
- 1, /* 26 mixer A */
- 1, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 0, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(330), /* 4 noise_res */
+ RES_K(47), /* 5 filter_res */
+ CAP_P(100), /* 6 filter_cap */
+ RES_K(1), /* 7 decay_res */
+ 0 /* NC */, /* 8 attack_decay_cap */
+ RES_K(1), /* 10 attack_res */
+ RES_K(100), /* 11 amplitude_res */
+ RES_K(47), /* 12 feedback_res */
+ 0 /* NC */, /* 16 vco_voltage */
+ CAP_P(1000), /* 17 vco_cap */
+ RES_K(1000), /* 18 vco_res */
+ 0 /* NC */, /* 19 pitch_voltage */
+ RES_K(10), /* 20 slf_res */
+ CAP_U(1), /* 21 slf_cap */
+ CAP_U(2.2), /* 23 oneshot_cap */
+ RES_K(150), /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 1, /* 26 mixer A */
+ 1, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 0, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
// ic52 GND: 2,22,27,28 +5V: 1,15,25,26
};
const sn76477_interface satansat_sn76477_intf =
{
- RES_K(470), /* 4 noise_res */
- RES_M(1.5), /* 5 filter_res */
- CAP_P(220), /* 6 filter_cap */
- 0, /* 7 decay_res */
- 0, /* 8 attack_decay_cap */
- 0, /* 10 attack_res */
- RES_K(47), /* 11 amplitude_res */
- RES_K(47), /* 12 feedback_res */
- 0, /* 16 vco_voltage */
- 0, /* 17 vco_cap */
- 0, /* 18 vco_res */
- 0, /* 19 pitch_voltage */
- 0, /* 20 slf_res */
- 0, /* 21 slf_cap */
- 0, /* 23 oneshot_cap */
- 0, /* 24 oneshot_res */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 1, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 1, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(470), /* 4 noise_res */
+ RES_M(1.5), /* 5 filter_res */
+ CAP_P(220), /* 6 filter_cap */
+ 0, /* 7 decay_res */
+ 0, /* 8 attack_decay_cap */
+ 0, /* 10 attack_res */
+ RES_K(47), /* 11 amplitude_res */
+ RES_K(47), /* 12 feedback_res */
+ 0, /* 16 vco_voltage */
+ 0, /* 17 vco_cap */
+ 0, /* 18 vco_res */
+ 0, /* 19 pitch_voltage */
+ 0, /* 20 slf_res */
+ 0, /* 21 slf_cap */
+ 0, /* 23 oneshot_cap */
+ 0, /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 1, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 1, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
// ??? GND: 2,26,27 +5V: 15,25
};
const sn76477_interface vanguard_sn76477_intf_1 =
{
- RES_K(470), /* 4 noise_res */
- RES_M(1.5), /* 5 filter_res */
- CAP_P(220), /* 6 filter_cap */
- 0, /* 7 decay_res */
- 0, /* 8 attack_decay_cap */
- 0, /* 10 attack_res */
- RES_K(47), /* 11 amplitude_res */
- RES_K(4.7), /* 12 feedback_res */
- 0, /* 16 vco_voltage */
- 0, /* 17 vco_cap */
- 0, /* 18 vco_res */
- 0, /* 19 pitch_voltage */
- 0, /* 20 slf_res */
- 0, /* 21 slf_cap */
- 0, /* 23 oneshot_cap */
- 0, /* 24 oneshot_res */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 1, /* 25 mixer B */
- 0, /* 27 mixer C */
- 1, /* 1 envelope 1 */
- 1, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(470), /* 4 noise_res */
+ RES_M(1.5), /* 5 filter_res */
+ CAP_P(220), /* 6 filter_cap */
+ 0, /* 7 decay_res */
+ 0, /* 8 attack_decay_cap */
+ 0, /* 10 attack_res */
+ RES_K(47), /* 11 amplitude_res */
+ RES_K(4.7), /* 12 feedback_res */
+ 0, /* 16 vco_voltage */
+ 0, /* 17 vco_cap */
+ 0, /* 18 vco_res */
+ 0, /* 19 pitch_voltage */
+ 0, /* 20 slf_res */
+ 0, /* 21 slf_cap */
+ 0, /* 23 oneshot_cap */
+ 0, /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 1, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 1, /* 1 envelope 1 */
+ 1, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
// SHOT A GND: 2,9,26,27 +5V: 15,25
};
const sn76477_interface vanguard_sn76477_intf_2 =
{
- RES_K(10), /* 4 noise_res */
- RES_K(30), /* 5 filter_res */
- 0, /* 6 filter_cap */
- 0, /* 7 decay_res */
- 0, /* 8 attack_decay_cap */
- 0, /* 10 attack_res */
- RES_K(47), /* 11 amplitude_res */
- RES_K(4.7), /* 12 feedback_res */
- 0, /* 16 vco_voltage */
- 0, /* 17 vco_cap */
- 0, /* 18 vco_res */
- 0, /* 19 pitch_voltage */
- 0, /* 20 slf_res */
- 0, /* 21 slf_cap */
- 0, /* 23 oneshot_cap */
- 0, /* 24 oneshot_res */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 1, /* 25 mixer B */
- 0, /* 27 mixer C */
- 0, /* 1 envelope 1 */
- 1, /* 28 envelope 2 */
- 1 /* 9 enable (variable) */
+ RES_K(10), /* 4 noise_res */
+ RES_K(30), /* 5 filter_res */
+ 0, /* 6 filter_cap */
+ 0, /* 7 decay_res */
+ 0, /* 8 attack_decay_cap */
+ 0, /* 10 attack_res */
+ RES_K(47), /* 11 amplitude_res */
+ RES_K(4.7), /* 12 feedback_res */
+ 0, /* 16 vco_voltage */
+ 0, /* 17 vco_cap */
+ 0, /* 18 vco_res */
+ 0, /* 19 pitch_voltage */
+ 0, /* 20 slf_res */
+ 0, /* 21 slf_cap */
+ 0, /* 23 oneshot_cap */
+ 0, /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 1, /* 25 mixer B */
+ 0, /* 27 mixer C */
+ 0, /* 1 envelope 1 */
+ 1, /* 28 envelope 2 */
+ 1 /* 9 enable (variable) */
// SHOT B GND: 1,2,26,27 +5V: 15,25,28
};
const sn76477_interface fantasy_sn76477_intf =
{
- RES_K(470), /* 4 noise_res */
- RES_M(1.5), /* 5 filter_res */
- CAP_P(220), /* 6 filter_cap */
- 0, /* 7 decay_res */
- 0, /* 8 attack_decay_cap */
- 0, /* 10 attack_res */
- RES_K(470), /* 11 amplitude_res */
- RES_K(4.7), /* 12 feedback_res */
- 0, /* 16 vco_voltage */
- 0, /* 17 vco_cap */
- 0, /* 18 vco_res */
- 0, /* 19 pitch_voltage */
- 0, /* 20 slf_res */
- 0, /* 21 slf_cap */
- 0, /* 23 oneshot_cap */
- 0, /* 24 oneshot_res */
- 0, /* 22 vco */
- 0, /* 26 mixer A */
- 1, /* 25 mixer B */
- 0, /* 27 mixer C */
+ RES_K(470), /* 4 noise_res */
+ RES_M(1.5), /* 5 filter_res */
+ CAP_P(220), /* 6 filter_cap */
+ 0, /* 7 decay_res */
+ 0, /* 8 attack_decay_cap */
+ 0, /* 10 attack_res */
+ RES_K(470), /* 11 amplitude_res */
+ RES_K(4.7), /* 12 feedback_res */
+ 0, /* 16 vco_voltage */
+ 0, /* 17 vco_cap */
+ 0, /* 18 vco_res */
+ 0, /* 19 pitch_voltage */
+ 0, /* 20 slf_res */
+ 0, /* 21 slf_cap */
+ 0, /* 23 oneshot_cap */
+ 0, /* 24 oneshot_res */
+ 0, /* 22 vco */
+ 0, /* 26 mixer A */
+ 1, /* 25 mixer B */
+ 0, /* 27 mixer C */
/* schematic does not show pin 1 grounded, but it must be. */
/* otherwise it is using the VCO for the envelope, but the VCO is not hooked up */
- 0, /* 1 envelope 1 */
- 1, /* 28 envelope 2 */
- 0 /* 9 enable (variable) */
+ 0, /* 1 envelope 1 */
+ 1, /* 28 envelope 2 */
+ 0 /* 9 enable (variable) */
// BOMB GND: 2,9,26,27 +5V: 15,25
};
@@ -357,9 +357,9 @@ static const discrete_op_amp_filt_info fantasy_filter =
RES_K(10.5), 0, RES_K(33), 0, RES_K(470), CAP_U(.01), CAP_U(.01), 0, 0, 12, -12
};
-#define FANTASY_BOMB_EN NODE_01
-#define FANTASY_NOISE_STREAM_IN NODE_02
-#define FANTASY_NOISE_LOGIC NODE_03
+#define FANTASY_BOMB_EN NODE_01
+#define FANTASY_NOISE_STREAM_IN NODE_02
+#define FANTASY_NOISE_LOGIC NODE_03
DISCRETE_SOUND_START( fantasy )
@@ -430,7 +430,7 @@ static STREAM_UPDATE( snk6502_tone_update )
/* interpolate */
data += ((INT32)prev * (FRAC_ONE - (cur_pos & FRAC_MASK))
- + (INT32)cur * (cur_pos & FRAC_MASK)) >> FRAC_BITS;
+ + (INT32)cur * (cur_pos & FRAC_MASK)) >> FRAC_BITS;
voice->sample_cur = cur_pos;
}
@@ -685,17 +685,17 @@ WRITE8_HANDLER( sasuke_sound_w )
{
case 0:
/*
- bit description
-
- 0 hit (ic52)
- 1 boss start (ic51)
- 2 shot
- 3 boss attack (ic48?)
- 4 ??
- 5
- 6
- 7 reset counter
- */
+ bit description
+
+ 0 hit (ic52)
+ 1 boss start (ic51)
+ 2 shot
+ 3 boss attack (ic48?)
+ 4 ??
+ 5
+ 6
+ 7 reset counter
+ */
if ((~data & 0x01) && (state->m_LastPort1 & 0x01))
samples->start(0, 0);
@@ -720,17 +720,17 @@ WRITE8_HANDLER( sasuke_sound_w )
case 1:
/*
- bit description
-
- 0
- 1 wave form
- 2 wave form
- 3 wave form
- 4 MUSIC A8
- 5 MUSIC A9
- 6 MUSIC A10
- 7
- */
+ bit description
+
+ 0
+ 1 wave form
+ 2 wave form
+ 3 wave form
+ 4 MUSIC A8
+ 5 MUSIC A9
+ 6 MUSIC A10
+ 7
+ */
/* select tune in ROM based on sound command byte */
tone_channels[0].base = 0x0000 + ((data & 0x70) << 4);
@@ -755,9 +755,9 @@ WRITE8_HANDLER( satansat_sound_w )
{
case 0:
/*
- bit description
+ bit description
- */
+ */
/* bit 0 = analog sound trigger */
@@ -783,9 +783,9 @@ WRITE8_HANDLER( satansat_sound_w )
break;
case 1:
/*
- bit description
+ bit description
- */
+ */
/* select tune in ROM based on sound command byte */
tone_channels[0].base = 0x0000 + ((data & 0x0e) << 7);
@@ -822,17 +822,17 @@ WRITE8_HANDLER( vanguard_sound_w )
{
case 0:
/*
- bit description
-
- 0 MUSIC A10
- 1 MUSIC A9
- 2 MUSIC A8
- 3 LS05 PORT 1
- 4 LS04 PORT 2
- 5 SHOT A
- 6 SHOT B
- 7 BOMB
- */
+ bit description
+
+ 0 MUSIC A10
+ 1 MUSIC A9
+ 2 MUSIC A8
+ 3 LS05 PORT 1
+ 4 LS04 PORT 2
+ 5 SHOT A
+ 6 SHOT B
+ 7 BOMB
+ */
/* select musical tune in ROM based on sound command byte */
tone_channels[0].base = ((data & 0x07) << 8);
@@ -869,17 +869,17 @@ WRITE8_HANDLER( vanguard_sound_w )
break;
case 1:
/*
- bit description
-
- 0 MUSIC A10
- 1 MUSIC A9
- 2 MUSIC A8
- 3 LS04 PORT 3
- 4 EXTP A (HD38880 external pitch control A)
- 5 EXTP B (HD38880 external pitch control B)
- 6
- 7
- */
+ bit description
+
+ 0 MUSIC A10
+ 1 MUSIC A9
+ 2 MUSIC A8
+ 3 LS04 PORT 3
+ 4 EXTP A (HD38880 external pitch control A)
+ 5 EXTP B (HD38880 external pitch control B)
+ 6
+ 7
+ */
/* select tune in ROM based on sound command byte */
tone_channels[1].base = 0x0800 + ((data & 0x07) << 8);
@@ -895,17 +895,17 @@ WRITE8_HANDLER( vanguard_sound_w )
break;
case 2:
/*
- bit description
-
- 0 AS 1 (sound0 waveform)
- 1 AS 2 (sound0 waveform)
- 2 AS 4 (sound0 waveform)
- 3 AS 3 (sound0 waveform)
- 4 AS 5 (sound1 waveform)
- 5 AS 6 (sound1 waveform)
- 6 AS 7 (sound1 waveform)
- 7 AS 8 (sound1 waveform)
- */
+ bit description
+
+ 0 AS 1 (sound0 waveform)
+ 1 AS 2 (sound0 waveform)
+ 2 AS 4 (sound0 waveform)
+ 3 AS 3 (sound0 waveform)
+ 4 AS 5 (sound1 waveform)
+ 5 AS 6 (sound1 waveform)
+ 6 AS 7 (sound1 waveform)
+ 7 AS 8 (sound1 waveform)
+ */
build_waveform(state, 0, (data & 0x3) | ((data & 4) << 1) | ((data & 8) >> 1));
build_waveform(state, 1, data >> 4);
@@ -922,17 +922,17 @@ WRITE8_HANDLER( fantasy_sound_w )
{
case 0:
/*
- bit description
-
- 0 MUSIC A10
- 1 MUSIC A9
- 2 MUSIC A8
- 3 LS04 PART 1
- 4 LS04 PART 2
- 5
- 6
- 7 BOMB
- */
+ bit description
+
+ 0 MUSIC A10
+ 1 MUSIC A9
+ 2 MUSIC A8
+ 3 LS04 PART 1
+ 4 LS04 PART 2
+ 5
+ 6
+ 7 BOMB
+ */
/* select musical tune in ROM based on sound command byte */
tone_channels[0].base = 0x0000 + ((data & 0x07) << 8);
@@ -963,17 +963,17 @@ WRITE8_HANDLER( fantasy_sound_w )
break;
case 1:
/*
- bit description
-
- 0 MUSIC A10
- 1 MUSIC A9
- 2 MUSIC A8
- 3 LS04 PART 3
- 4 EXT PA (HD38880 external pitch control A)
- 5 EXT PB (HD38880 external pitch control B)
- 6
- 7
- */
+ bit description
+
+ 0 MUSIC A10
+ 1 MUSIC A9
+ 2 MUSIC A8
+ 3 LS04 PART 3
+ 4 EXT PA (HD38880 external pitch control A)
+ 5 EXT PB (HD38880 external pitch control B)
+ 6
+ 7
+ */
/* select tune in ROM based on sound command byte */
tone_channels[1].base = 0x0800 + ((data & 0x07) << 8);
@@ -989,34 +989,34 @@ WRITE8_HANDLER( fantasy_sound_w )
break;
case 2:
/*
- bit description
-
- 0 AS 1 (sound0 waveform)
- 1 AS 3 (sound0 waveform)
- 2 AS 2 (sound0 waveform)
- 3 AS 4 (sound0 waveform)
- 4 AS 5 (sound1 waveform)
- 5 AS 6 (sound1 waveform)
- 6 AS 7 (sound1 waveform)
- 7 AS 8 (sound1 waveform)
- */
+ bit description
+
+ 0 AS 1 (sound0 waveform)
+ 1 AS 3 (sound0 waveform)
+ 2 AS 2 (sound0 waveform)
+ 3 AS 4 (sound0 waveform)
+ 4 AS 5 (sound1 waveform)
+ 5 AS 6 (sound1 waveform)
+ 6 AS 7 (sound1 waveform)
+ 7 AS 8 (sound1 waveform)
+ */
build_waveform(state, 0, (data & 0x9) | ((data & 2) << 1) | ((data & 4) >> 1));
build_waveform(state, 1, data >> 4);
break;
case 3:
/*
- bit description
-
- 0 BC 1
- 1 BC 2
- 2 BC 3
- 3 MUSIC A10
- 4 MUSIC A9
- 5 MUSIC A8
- 6
- 7 INV
- */
+ bit description
+
+ 0 BC 1
+ 1 BC 2
+ 2 BC 3
+ 3 MUSIC A10
+ 4 MUSIC A9
+ 5 MUSIC A8
+ 6
+ 7 INV
+ */
/* select tune in ROM based on sound command byte */
tone_channels[2].base = 0x1000 + ((data & 0x70) << 4);
@@ -1037,35 +1037,35 @@ WRITE8_HANDLER( fantasy_sound_w )
/* HD38880 command */
-#define HD38880_ADSET 2
-#define HD38880_READ 3
-#define HD38880_INT1 4
-#define HD38880_INT2 6
-#define HD38880_SYSPD 8
-#define HD38880_STOP 10
-#define HD38880_CONDT 11
-#define HD38880_START 12
-#define HD38880_SSTART 14
+#define HD38880_ADSET 2
+#define HD38880_READ 3
+#define HD38880_INT1 4
+#define HD38880_INT2 6
+#define HD38880_SYSPD 8
+#define HD38880_STOP 10
+#define HD38880_CONDT 11
+#define HD38880_START 12
+#define HD38880_SSTART 14
/* HD38880 control bits */
-#define HD38880_CTP 0x10
-#define HD38880_CMV 0x20
-#define HD68880_SYBS 0x0f
+#define HD38880_CTP 0x10
+#define HD38880_CMV 0x20
+#define HD68880_SYBS 0x0f
static void snk6502_speech_w(running_machine &machine, UINT8 data, const UINT16 *table, int start)
{
/*
- bit description
- 0 SYBS1
- 1 SYBS2
- 2 SYBS3
- 3 SYBS4
- 4 CTP
- 5 CMV
- 6
- 7
- */
+ bit description
+ 0 SYBS1
+ 1 SYBS2
+ 2 SYBS3
+ 3 SYBS4
+ 4 CTP
+ 5 CMV
+ 6
+ 7
+ */
device_t *device = machine.device("snk6502");
snk6502_sound_state *state = get_safe_token(device);
@@ -1253,7 +1253,7 @@ const device_type SNK6502 = &device_creator<snk6502_sound_device>;
snk6502_sound_device::snk6502_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, SNK6502, "snk6502 Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(snk6502_sound_state);
}
@@ -1286,5 +1286,3 @@ void snk6502_sound_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/spacefb.c b/src/mame/audio/spacefb.c
index 5bde6881024..bd54890c551 100644
--- a/src/mame/audio/spacefb.c
+++ b/src/mame/audio/spacefb.c
@@ -42,13 +42,13 @@ WRITE8_MEMBER(spacefb_state::spacefb_port_1_w)
if (!(data & 0x40) && (m_sound_latch & 0x40)) samples->start(1,1);
/*
- * Explosion Noise
- *
- * Actual sample has a bit of attack at the start, but these doesn't seem to be an easy way
- * to play the attack part, then loop the middle bit until the sample is turned off
- * Fortunately it seems like the recorded sample of the &spaceship death is the longest the sample plays for.
- * We loop it just in case it runs out
- */
+ * Explosion Noise
+ *
+ * Actual sample has a bit of attack at the start, but these doesn't seem to be an easy way
+ * to play the attack part, then loop the middle bit until the sample is turned off
+ * Fortunately it seems like the recorded sample of the &spaceship death is the longest the sample plays for.
+ * We loop it just in case it runs out
+ */
if ((data & 0x80) != (m_sound_latch & 0x80))
{
if (data & 0x80)
diff --git a/src/mame/audio/spiders.c b/src/mame/audio/spiders.c
index 0a3e8c89d29..be8d760f9cf 100644
--- a/src/mame/audio/spiders.c
+++ b/src/mame/audio/spiders.c
@@ -34,56 +34,56 @@ To Do: add filters
static const discrete_dac_r1_ladder spiders_sound_dac =
{
- 4, // size of ladder
+ 4, // size of ladder
{RES_K(68), RES_K(47), RES_K(33), RES_K(33)}, // R21, R31, R30, R50
DEFAULT_TTL_V_LOGIC_1,
- 0, // no rBias
- 0, // no rGnd
- 0 // no cap
+ 0, // no rBias
+ 0, // no rGnd
+ 0 // no cap
};
/* The noice generator consists of two LS164 plus a LS74, so the lenght is 8+8+1 */
static const discrete_lfsr_desc spiders_lfsr =
{
DISC_CLK_IS_FREQ,
- 17, /* Bit Length */
- 0, /* Reset Value */
- 4, /* Use Bit 4 (QE of first LS164) as F0 input 0 */
- 16, /* Use Bit 16 (LS74) as F0 input 1 */
+ 17, /* Bit Length */
+ 0, /* Reset Value */
+ 4, /* Use Bit 4 (QE of first LS164) as F0 input 0 */
+ 16, /* Use Bit 16 (LS74) as F0 input 1 */
DISC_LFSR_XOR_INV_IN1,/* F0 is XOR with input 1 inverted */
- DISC_LFSR_IN0, /* F1 is 1*F0*/
- DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 1, /* Output is inverted Q of LS74*/
- 16 /* Output bit */
+ DISC_LFSR_IN0, /* F1 is 1*F0*/
+ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 1, /* Output is inverted Q of LS74*/
+ 16 /* Output bit */
};
static const discrete_dac_r1_ladder spiders_fire_dac =
{
1,
- {RES_K(10)}, // R29
- 5, // 555 Vcc
- RES_K(5), // 555 internal
- RES_K(10), // 555 internal
- CAP_N(100) // C100
+ {RES_K(10)}, // R29
+ 5, // 555 Vcc
+ RES_K(5), // 555 internal
+ RES_K(10), // 555 internal
+ CAP_N(100) // C100
};
static const discrete_dac_r1_ladder spiders_web_exp_dac =
{
1,
- {RES_K(10)}, // R44
- 5, // 555 Vcc
- RES_K((5*2.2)/(5+2.2)), // 555 internal (5k) // R49 (2.2k)
- RES_K(10), // 555 internal
- CAP_U(0.01) // C25
+ {RES_K(10)}, // R44
+ 5, // 555 Vcc
+ RES_K((5*2.2)/(5+2.2)), // 555 internal (5k) // R49 (2.2k)
+ RES_K(10), // 555 internal
+ CAP_U(0.01) // C25
};
// IC 10
static const discrete_555_desc spiders_fire_555a =
{
- DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ DISC_555_OUT_SQW | DISC_555_OUT_DC,
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
@@ -91,7 +91,7 @@ static const discrete_555_desc spiders_fire_555a =
static const discrete_555_desc spiders_super_web_555a =
{
DISC_555_OUT_CAP | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
@@ -99,9 +99,9 @@ static const discrete_555_desc spiders_super_web_555a =
/* Nodes - Sounds */
#define SPIDERS_WEB_SOUND NODE_08
-#define SPIDERS_NOISE NODE_09
-#define SPIDERS_FIRE NODE_10
-#define SPIDERS_EXPL NODE_11
+#define SPIDERS_NOISE NODE_09
+#define SPIDERS_FIRE NODE_10
+#define SPIDERS_EXPL NODE_11
#define SPIDERS_SW_EXPL NODE_12
#define SPIDERS_SW NODE_13
#define SPIDERS_X NODE_14
@@ -114,22 +114,22 @@ static DISCRETE_SOUND_START(spiders)
DISCRETE_INPUT_DATA (SPIDERS_WEB_SOUND_DATA)
DISCRETE_INPUT_DATA (SPIDER_WEB_SOUND_MOD_DATA)
- DISCRETE_INPUT_LOGIC(SPIDERS_FIRE_EN)
+ DISCRETE_INPUT_LOGIC(SPIDERS_FIRE_EN)
DISCRETE_INPUT_LOGIC(SPIDERS_EXP_EN)
DISCRETE_INPUT_LOGIC(SPIDERS_SUPER_WEB_EXPL_EN)
DISCRETE_INPUT_LOGIC(SPIDERS_SUPER_WEB_EN)
- DISCRETE_INPUT_LOGIC(SPIDERS_X_EN)
+ DISCRETE_INPUT_LOGIC(SPIDERS_X_EN)
/* Web sound */
DISCRETE_NOTE(NODE_20, 1, SPIDERS_SOUND_CLK/8, SPIDERS_WEB_SOUND_DATA, 255, 15, DISC_CLK_IS_FREQ)
- DISCRETE_TRANSFORM2(NODE_21, NODE_20, SPIDER_WEB_SOUND_MOD_DATA, "01&")
+ DISCRETE_TRANSFORM2(NODE_21, NODE_20, SPIDER_WEB_SOUND_MOD_DATA, "01&")
DISCRETE_DAC_R1(NODE_22, NODE_21, DEFAULT_TTL_V_LOGIC_1, &spiders_sound_dac)
/* Noise */
/* LFSR NOISE Should be 3 MHz, but setting it to 6KHz should make no difference (except wasting less CPU cycles) since we sample it
- at 3.75 kHz */
+ at 3.75 kHz */
DISCRETE_LFSR_NOISE(NODE_30, 1, 1, SPIDERS_SOUND_CLK/(1000), 1, 0, 0.5, &spiders_lfsr)
- DISCRETE_SQUAREWFIX(NODE_31, 1, SPIDERS_SOUND_CLK/(10*10*16),1, 50.0, 0.5, 0) /* 3.75 kHz */
+ DISCRETE_SQUAREWFIX(NODE_31, 1, SPIDERS_SOUND_CLK/(10*10*16),1, 50.0, 0.5, 0) /* 3.75 kHz */
DISCRETE_SAMPLHOLD(NODE_32,NODE_30,NODE_31,DISC_SAMPHOLD_REDGE)
/* Fire */
@@ -146,22 +146,22 @@ static DISCRETE_SOUND_START(spiders)
/* Explosion */
DISCRETE_MULTIPLY(NODE_50, DEFAULT_TTL_V_LOGIC_1, SPIDERS_EXP_EN)
- DISCRETE_RCDISC5(NODE_51, 1, NODE_50, RES_M(1),CAP_U(0.47)) //R51, C8
+ DISCRETE_RCDISC5(NODE_51, 1, NODE_50, RES_M(1),CAP_U(0.47)) //R51, C8
DISCRETE_MULTIPLY(NODE_52, DEFAULT_TTL_V_LOGIC_1, NODE_32) // Noise 0/1 -> TTL
- DISCRETE_ASWITCH(NODE_53, NODE_52, NODE_51, DISC_CD4066_THRESHOLD)
+ DISCRETE_ASWITCH(NODE_53, NODE_52, NODE_51, DISC_CD4066_THRESHOLD)
/*Super web explosion*/
- DISCRETE_DAC_R1(NODE_60, NODE_32, DEFAULT_TTL_V_LOGIC_1, &spiders_web_exp_dac)
+ DISCRETE_DAC_R1(NODE_60, NODE_32, DEFAULT_TTL_V_LOGIC_1, &spiders_web_exp_dac)
DISCRETE_555_ASTABLE_CV(NODE_61, 1, RES_K(10), RES_K(22), CAP_N(22), NODE_60, &spiders_fire_555a) //R48, R47, C24
DISCRETE_MULTIPLY(NODE_62, DEFAULT_TTL_V_LOGIC_1, SPIDERS_SUPER_WEB_EXPL_EN)
- DISCRETE_RCDISC5(NODE_63, 1, NODE_62, RES_M(1),CAP_U(0.47)) //R9, C9
+ DISCRETE_RCDISC5(NODE_63, 1, NODE_62, RES_M(1),CAP_U(0.47)) //R9, C9
DISCRETE_ASWITCH(NODE_64, NODE_61, NODE_63, DISC_CD4066_THRESHOLD)
/*Super web */
DISCRETE_555_ASTABLE_CV(NODE_70, 1, RES_K(330), 0, CAP_U(1), -1, &spiders_super_web_555a) //R46, C23
- DISCRETE_MULTIPLY(NODE_71, 57/47, NODE_70) // R27, R28
+ DISCRETE_MULTIPLY(NODE_71, 57/47, NODE_70) // R27, R28
DISCRETE_555_ASTABLE_CV(NODE_72, SPIDERS_SUPER_WEB_EN, RES_K(100), RES_K(330), CAP_U(0.01), NODE_71, &spiders_super_web_555a) //R22, R33, C16
- DISCRETE_555_ASTABLE_CV(NODE_73, SPIDERS_X_EN, RES_K(100), RES_K(470), CAP_N(47), NODE_71, &spiders_super_web_555a) // R23, R32, C15
+ DISCRETE_555_ASTABLE_CV(NODE_73, SPIDERS_X_EN, RES_K(100), RES_K(470), CAP_N(47), NODE_71, &spiders_super_web_555a) // R23, R32, C15
DISCRETE_ADDER4(NODE_89, 1, NODE_22, NODE_46, NODE_53, NODE_64)
DISCRETE_ADDER3(NODE_90, 1, NODE_72, NODE_73, NODE_89)
diff --git a/src/mame/audio/sprint2.c b/src/mame/audio/sprint2.c
index de5b1256bfa..fb031f21698 100644
--- a/src/mame/audio/sprint2.c
+++ b/src/mame/audio/sprint2.c
@@ -29,47 +29,47 @@ static const discrete_lfsr_desc sprint2_lfsr =
static const discrete_dac_r1_ladder sprint2_motor_v_dac =
{
- 4, // size of ladder
- {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220)}, // R5, R6, R7, R8
- 4.4, // 5V minus diode junction (0.6V)
- RES_K(68), // R9
- 0, // no rGnd
- CAP_U(10) // C17
+ 4, // size of ladder
+ {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220)}, // R5, R6, R7, R8
+ 4.4, // 5V minus diode junction (0.6V)
+ RES_K(68), // R9
+ 0, // no rGnd
+ CAP_U(10) // C17
};
static const discrete_555_cc_desc sprint2_motor_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // VBE 2N3644 (Si)
+ 0.7 // VBE 2N3644 (Si)
};
static const discrete_dac_r1_ladder sprint2_motor_out_dac =
{
- 4, // size of ladder
+ 4, // size of ladder
{RES_K(10), RES_K(10), 0, RES_K(10)}, // R42, R43, -, R44
DEFAULT_TTL_V_LOGIC_1,
- 0, // no rBias
- 0, // no rGnd
- CAP_U(0.1) // C36
+ 0, // no rBias
+ 0, // no rGnd
+ CAP_U(0.1) // C36
};
static const discrete_dac_r1_ladder sprint2_crash_dac =
{
- 4, // size of ladder
- {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1)}, // R27, R25, R26, R24
- 0, // no vBias
- 0, // no rBias
- 0, // no rGnd
+ 4, // size of ladder
+ {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1)}, // R27, R25, R26, R24
+ 0, // no vBias
+ 0, // no rBias
+ 0, // no rGnd
CAP_U(0.1) // C69
};
static const discrete_schmitt_osc_desc sprint2_screech_osc =
{
- RES_K(1), // R19
- 100, // R16
- CAP_U(10), // C8
+ RES_K(1), // R19
+ 100, // R16
+ CAP_U(10), // C8
DEFAULT_7414_VALUES,
DISC_SCHMITT_OSC_IN_IS_LOGIC | DISC_SCHMITT_OSC_ENAB_IS_AND
};
@@ -77,28 +77,28 @@ static const discrete_schmitt_osc_desc sprint2_screech_osc =
static const discrete_mixer_desc sprint2_mixer =
{
DISC_MIXER_IS_RESISTOR,
- {RES_K(13.3333), RES_K(10.5456), RES_K(33)}, // R61 + motor, R60 + bang, R62
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- RES_K(5), // R63
- 0, // No Filter
- CAP_U(0.1), // C35
- 0, // not used in resistor network
- 30000 // final gain
+ {RES_K(13.3333), RES_K(10.5456), RES_K(33)}, // R61 + motor, R60 + bang, R62
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ RES_K(5), // R63
+ 0, // No Filter
+ CAP_U(0.1), // C35
+ 0, // not used in resistor network
+ 30000 // final gain
};
/* Nodes - Sounds */
-#define SPRINT2_MOTORSND1 NODE_10
-#define SPRINT2_MOTORSND2 NODE_11
-#define SPRINT2_CRASHSND NODE_12
-#define SPRINT2_SKIDSND1 NODE_13
-#define SPRINT2_SKIDSND2 NODE_14
-#define SPRINT2_NOISE NODE_15
+#define SPRINT2_MOTORSND1 NODE_10
+#define SPRINT2_MOTORSND2 NODE_11
+#define SPRINT2_CRASHSND NODE_12
+#define SPRINT2_SKIDSND1 NODE_13
+#define SPRINT2_SKIDSND2 NODE_14
+#define SPRINT2_NOISE NODE_15
-#define SPRINT2_HSYNC 15750.0
-#define SPRINT2_1V SPRINT2_HSYNC/2
-#define SPRINT2_2V SPRINT2_1V/2
+#define SPRINT2_HSYNC 15750.0
+#define SPRINT2_1V SPRINT2_HSYNC/2
+#define SPRINT2_2V SPRINT2_1V/2
DISCRETE_SOUND_START(sprint2)
@@ -122,8 +122,8 @@ DISCRETE_SOUND_START(sprint2)
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
- RES_K(260), // R21 + R23 @ max
- RES_K(10), // R21 + R23 @ min
+ RES_K(260), // R21 + R23 @ max
+ RES_K(10), // R21 + R23 @ min
DISC_LOGADJ, "MOTOR1")
DISCRETE_DAC_R1(NODE_21,
@@ -134,8 +134,8 @@ DISCRETE_SOUND_START(sprint2)
DISCRETE_555_CC(NODE_22, 1,
NODE_21,
NODE_20,
- CAP_U(0.01), // C22
- RES_M(3.3), 0, 0, // R22
+ CAP_U(0.01), // C22
+ RES_M(3.3), 0, 0, // R22
&sprint2_motor_vco)
/* QB-D of 7492 */
@@ -160,8 +160,8 @@ DISCRETE_SOUND_START(sprint2)
/* Car2 motor sound */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_40,
- RES_K(260), // R21 + R23 @ max
- RES_K(10), // R21 + R23 @ min
+ RES_K(260), // R21 + R23 @ max
+ RES_K(10), // R21 + R23 @ min
DISC_LOGADJ, "MOTOR2")
DISCRETE_DAC_R1(NODE_41,
@@ -245,8 +245,8 @@ DISCRETE_SOUND_START(sprint1)
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
- RES_K(260), // R21 + R23 @ max
- RES_K(10), // R21 + R23 @ min
+ RES_K(260), // R21 + R23 @ max
+ RES_K(10), // R21 + R23 @ min
DISC_LOGADJ, "MOTOR")
DISCRETE_DAC_R1(NODE_21,
@@ -257,8 +257,8 @@ DISCRETE_SOUND_START(sprint1)
DISCRETE_555_CC(NODE_22, 1,
NODE_21,
NODE_20,
- CAP_U(0.01), // C22
- RES_M(3.3), 0, 0, // R22
+ CAP_U(0.01), // C22
+ RES_M(3.3), 0, 0, // R22
&sprint2_motor_vco)
/* QB-D of 7492 */
@@ -316,61 +316,61 @@ DISCRETE_SOUND_END
static const discrete_dac_r1_ladder dominos_tone_vco_dac =
{
4,
- {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220)}, // R5, R6, R7, R8
- 4.4, // 5V - diode junction (0.6V)
- RES_K(68), // R9
- RES_K(470), // R87
- CAP_U(.1) // C17
+ {RES_M(2.2), RES_M(1), RES_K(470), RES_K(220)}, // R5, R6, R7, R8
+ 4.4, // 5V - diode junction (0.6V)
+ RES_K(68), // R9
+ RES_K(470), // R87
+ CAP_U(.1) // C17
};
static const discrete_555_cc_desc dominos_tone_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q1 junction voltage
+ 0.7 // Q1 junction voltage
};
static const discrete_dac_r1_ladder dominos_tone_dac =
{
4,
- {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1)}, // R27, R24, R25, R26
+ {RES_K(8.2), RES_K(3.9), RES_K(2.2), RES_K(1)}, // R27, R24, R25, R26
0, 0, 0,
- CAP_U(.1) // C69
+ CAP_U(.1) // C69
};
static const discrete_mixer_desc dominos_mixer =
{
DISC_MIXER_IS_RESISTOR,
{RES_K(33), RES_K(10)+ 1.0/(1.0/RES_K(8.2) + 1.0/RES_K(3.9) + 1.0/RES_K(2.2) + 1.0/RES_K(1))}, // R62, R60 + R27||R24||R25||R26
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- RES_K(5), // R66
- CAP_U(0.1), // C71
- CAP_U(0.1), // C54
- 0, // not used in resistor network
- 40000 // final gain
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ RES_K(5), // R66
+ CAP_U(0.1), // C71
+ CAP_U(0.1), // C54
+ 0, // not used in resistor network
+ 40000 // final gain
};
/* Nodes - Sounds */
-#define DOMINOS_TONE_SND NODE_10
-#define DOMINOS_TOPPLE_SND NODE_11
+#define DOMINOS_TONE_SND NODE_10
+#define DOMINOS_TOPPLE_SND NODE_11
/* Nodes - Adjusters */
-#define DOMINOS_R23 NODE_15
+#define DOMINOS_R23 NODE_15
DISCRETE_SOUND_START(dominos)
/************************************************/
/* Input register mapping for dominos */
/************************************************/
DISCRETE_INPUT_LOGIC(DOMINOS_TUMBLE_EN)
- DISCRETE_INPUTX_DATA(DOMINOS_FREQ_DATA, -1, 0x0f, 0) // IC D4
- DISCRETE_INPUT_DATA (DOMINOS_AMP_DATA) // IC C4
+ DISCRETE_INPUTX_DATA(DOMINOS_FREQ_DATA, -1, 0x0f, 0) // IC D4
+ DISCRETE_INPUT_DATA (DOMINOS_AMP_DATA) // IC C4
DISCRETE_INPUT_LOGIC(DOMINOS_ATTRACT_EN)
DISCRETE_ADJUSTMENT(DOMINOS_R23,
- RES_K(60), // R21 + R23 @ max
- RES_K(10), // R21 + R23 @ min
+ RES_K(60), // R21 + R23 @ max
+ RES_K(10), // R21 + R23 @ min
DISC_LINADJ, "R23")
/************************************************/
@@ -378,11 +378,11 @@ DISCRETE_SOUND_START(dominos)
/************************************************/
DISCRETE_DAC_R1(NODE_20, DOMINOS_FREQ_DATA, DEFAULT_TTL_V_LOGIC_1, &dominos_tone_vco_dac)
DISCRETE_555_CC(NODE_21, 1, NODE_20, DOMINOS_R23, CAP_U(.01), 0, 0, 0, &dominos_tone_vco)
- DISCRETE_COUNTER_7492(NODE_22, 1, DOMINOS_ATTRACT_EN, // IC D8, QB-QD
- NODE_21, DISC_CLK_ON_F_EDGE) // from IC D7/8, pin 3
- DISCRETE_TRANSFORM2(NODE_23, NODE_22, 0x01, "01&") // IC D8, pin 11-QB
- DISCRETE_SWITCH(NODE_24, 1, NODE_23, 0, // Enable gate C5
- DOMINOS_AMP_DATA) // IC C4
+ DISCRETE_COUNTER_7492(NODE_22, 1, DOMINOS_ATTRACT_EN, // IC D8, QB-QD
+ NODE_21, DISC_CLK_ON_F_EDGE) // from IC D7/8, pin 3
+ DISCRETE_TRANSFORM2(NODE_23, NODE_22, 0x01, "01&") // IC D8, pin 11-QB
+ DISCRETE_SWITCH(NODE_24, 1, NODE_23, 0, // Enable gate C5
+ DOMINOS_AMP_DATA) // IC C4
DISCRETE_DAC_R1(DOMINOS_TONE_SND, NODE_24, DEFAULT_TTL_V_LOGIC_1, &dominos_tone_dac)
/************************************************/
diff --git a/src/mame/audio/sprint4.c b/src/mame/audio/sprint4.c
index 4c2797bab62..756c752f3c2 100644
--- a/src/mame/audio/sprint4.c
+++ b/src/mame/audio/sprint4.c
@@ -16,7 +16,7 @@
* Mar 2007, D.R.
************************************************************************/
-#define SPRINT4_2V (15750.0/4)
+#define SPRINT4_2V (15750.0/4)
static const discrete_lfsr_desc sprint4_lfsr =
{
@@ -36,65 +36,65 @@ static const discrete_lfsr_desc sprint4_lfsr =
static const discrete_dac_r1_ladder sprint4_motor_freq_DAC =
{
- 4, /* size */
- { RES_M(2.2), /* R20 */
- RES_M(1), /* R23 */
- RES_K(470), /* R22 */
- RES_K(220) }, /* R21 */
- 5.0 - 0.6, /* 5V - CR1 junction voltage */
- RES_K(68), /* R24 */
- 0, /* no rGnd */
- CAP_U(2.2) /* C28 */
+ 4, /* size */
+ { RES_M(2.2), /* R20 */
+ RES_M(1), /* R23 */
+ RES_K(470), /* R22 */
+ RES_K(220) }, /* R21 */
+ 5.0 - 0.6, /* 5V - CR1 junction voltage */
+ RES_K(68), /* R24 */
+ 0, /* no rGnd */
+ CAP_U(2.2) /* C28 */
};
-#define SPRINT4_MOTOR_OUT_RES (1.0 / (1.0 / RES_K(10) + 1.0 / RES_K(10) + 1.0 / RES_K(10)))
+#define SPRINT4_MOTOR_OUT_RES (1.0 / (1.0 / RES_K(10) + 1.0 / RES_K(10) + 1.0 / RES_K(10)))
static const discrete_dac_r1_ladder sprint4_motor_out_DAC =
{
- 4, /* size */
- { RES_K(10), /* R76 */
- 0, /* not connected */
- RES_K(10), /* R77 */
- RES_K(10) }, /* R75 */
- 0, /* no vBias */
- 0, /* no rBias */
- 0, /* no rGnd */
- CAP_U(0.1) /* C47 */
+ 4, /* size */
+ { RES_K(10), /* R76 */
+ 0, /* not connected */
+ RES_K(10), /* R77 */
+ RES_K(10) }, /* R75 */
+ 0, /* no vBias */
+ 0, /* no rBias */
+ 0, /* no rGnd */
+ CAP_U(0.1) /* C47 */
};
-#define SPRINT4_BANG_RES (1.0 / (1.0 / RES_K(8.2) + 1.0 / RES_K(3.9) + 1.0 / RES_K(2.2) + 1.0 / RES_K(1)))
+#define SPRINT4_BANG_RES (1.0 / (1.0 / RES_K(8.2) + 1.0 / RES_K(3.9) + 1.0 / RES_K(2.2) + 1.0 / RES_K(1)))
static const discrete_dac_r1_ladder sprint4_bang_DAC =
{
- 4, /* size */
- { RES_K(8.2), /* R19 */
- RES_K(3.9), /* R18 */
- RES_K(2.2), /* R17 */
- RES_K(1) }, /* R16 */
- 0, /* no vBias */
- 0, /* no rBias */
- 0, /* no rGnd */
- CAP_U(0.1) /* C32 */
+ 4, /* size */
+ { RES_K(8.2), /* R19 */
+ RES_K(3.9), /* R18 */
+ RES_K(2.2), /* R17 */
+ RES_K(1) }, /* R16 */
+ 0, /* no vBias */
+ 0, /* no rBias */
+ 0, /* no rGnd */
+ CAP_U(0.1) /* C32 */
};
static const discrete_555_cc_desc sprint4_motor_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q1 junction voltage
+ 0.7 // Q1 junction voltage
};
/* this will make 4 slightly different screech circuits due to part tolerance */
/* otherwise they would all sound identical */
-#define SPRINT4_SCREECH_CIRCUIT(_plr) \
+#define SPRINT4_SCREECH_CIRCUIT(_plr) \
static const discrete_schmitt_osc_desc sprint4_screech_osc_##_plr = \
{ \
- RES_K(1), /* R65 */ \
- 100, /* R64 */ \
- CAP_U(10) + CAP_U((_plr-2) * .2), /* C44 */ \
+ RES_K(1), /* R65 */ \
+ 100, /* R64 */ \
+ CAP_U(10) + CAP_U((_plr-2) * .2), /* C44 */ \
DEFAULT_7414_VALUES, \
DISC_SCHMITT_OSC_IN_IS_LOGIC | DISC_SCHMITT_OSC_ENAB_IS_AND \
};
@@ -107,37 +107,37 @@ SPRINT4_SCREECH_CIRCUIT(4)
static const discrete_mixer_desc sprint4_mixer =
{
DISC_MIXER_IS_RESISTOR,
- { RES_K(10) + SPRINT4_MOTOR_OUT_RES, /* R105 */
- RES_K(10) + SPRINT4_MOTOR_OUT_RES, /* R106 */
- RES_K(10) + SPRINT4_BANG_RES, /* R104 */
- RES_K(47), /* R102 */
- RES_K(47) }, /* R103 */
- { 0 }, /* no rNode{} */
- { 0 }, /* no c{} */
- 0, /* no rI */
- RES_K(5), /* R109 */
- 0, /* no cF */
- CAP_U(0.1), /* C51 */
- 0, /* vRef = Gnd */
- 1 /* gain */
+ { RES_K(10) + SPRINT4_MOTOR_OUT_RES, /* R105 */
+ RES_K(10) + SPRINT4_MOTOR_OUT_RES, /* R106 */
+ RES_K(10) + SPRINT4_BANG_RES, /* R104 */
+ RES_K(47), /* R102 */
+ RES_K(47) }, /* R103 */
+ { 0 }, /* no rNode{} */
+ { 0 }, /* no c{} */
+ 0, /* no rI */
+ RES_K(5), /* R109 */
+ 0, /* no cF */
+ CAP_U(0.1), /* C51 */
+ 0, /* vRef = Gnd */
+ 1 /* gain */
};
/* discrete sound output nodes */
-#define SPRINT4_MOTOR_SND_1 NODE_11
-#define SPRINT4_MOTOR_SND_2 NODE_12
-#define SPRINT4_MOTOR_SND_3 NODE_13
-#define SPRINT4_MOTOR_SND_4 NODE_14
-#define SPRINT4_SCREECH_SND_1 NODE_15
-#define SPRINT4_SCREECH_SND_2 NODE_16
-#define SPRINT4_SCREECH_SND_3 NODE_17
-#define SPRINT4_SCREECH_SND_4 NODE_18
-#define SPRINT4_BANG_SND NODE_19
-#define SPRINT4_NOISE NODE_20
-#define SPRINT4_FINAL_MIX_1_2 NODE_21
-#define SPRINT4_FINAL_MIX_3_4 NODE_22
-
-#define SPRINT4_ATTRACT_INV NODE_23
+#define SPRINT4_MOTOR_SND_1 NODE_11
+#define SPRINT4_MOTOR_SND_2 NODE_12
+#define SPRINT4_MOTOR_SND_3 NODE_13
+#define SPRINT4_MOTOR_SND_4 NODE_14
+#define SPRINT4_SCREECH_SND_1 NODE_15
+#define SPRINT4_SCREECH_SND_2 NODE_16
+#define SPRINT4_SCREECH_SND_3 NODE_17
+#define SPRINT4_SCREECH_SND_4 NODE_18
+#define SPRINT4_BANG_SND NODE_19
+#define SPRINT4_NOISE NODE_20
+#define SPRINT4_FINAL_MIX_1_2 NODE_21
+#define SPRINT4_FINAL_MIX_3_4 NODE_22
+
+#define SPRINT4_ATTRACT_INV NODE_23
/* setup the attract input and it's inverse */
@@ -147,16 +147,16 @@ static const discrete_mixer_desc sprint4_mixer =
/* port tags used for the discrete adjusters */
-#define SPRINT4_MOTOR_TAG_1 "MOTOR1"
-#define SPRINT4_MOTOR_TAG_2 "MOTOR2"
-#define SPRINT4_MOTOR_TAG_3 "MOTOR3"
-#define SPRINT4_MOTOR_TAG_4 "MOTOR4"
+#define SPRINT4_MOTOR_TAG_1 "MOTOR1"
+#define SPRINT4_MOTOR_TAG_2 "MOTOR2"
+#define SPRINT4_MOTOR_TAG_3 "MOTOR3"
+#define SPRINT4_MOTOR_TAG_4 "MOTOR4"
/* used to offset the motor nodes based on the player so the nodes do not overlap */
/* _plr must be 1, 2, 3, or 4 */
/* so it uses NODES_30 to NODE_69 */
-#define SPRINT4_PLAYER_MOTOR_NODE(_node, _plr) NODE(20 + 10 * _plr + _node)
+#define SPRINT4_PLAYER_MOTOR_NODE(_node, _plr) NODE(20 + 10 * _plr + _node)
/************************************************
@@ -165,76 +165,76 @@ static const discrete_mixer_desc sprint4_mixer =
* complete motor effects for each player
* _plr must be 1, 2, 3, or 4
************************************************/
-#define SPRINT4_PLAYER_MOTOR(_plr) \
+#define SPRINT4_PLAYER_MOTOR(_plr) \
DISCRETE_INPUTX_DATA(SPRINT4_MOTOR_DATA_##_plr, \
- -1, 0x0f, 0) /* latch IC D8 inverts the data */ \
+ -1, 0x0f, 0) /* latch IC D8 inverts the data */ \
DISCRETE_DAC_R1(SPRINT4_PLAYER_MOTOR_NODE(1, _plr), \
- SPRINT4_MOTOR_DATA_##_plr, /* DATA */ \
- DEFAULT_TTL_V_LOGIC_1, /* VDATA */ \
- &sprint4_motor_freq_DAC) /* LADDER */ \
+ SPRINT4_MOTOR_DATA_##_plr, /* DATA */ \
+ DEFAULT_TTL_V_LOGIC_1, /* VDATA */ \
+ &sprint4_motor_freq_DAC) /* LADDER */ \
DISCRETE_ADJUSTMENT(SPRINT4_PLAYER_MOTOR_NODE(2, _plr), \
- RES_K(10) + RES_K(250), /* MIN */ \
- RES_K(10), /* MAX */ \
- DISC_LOGADJ, /* LOGLIN */ \
- SPRINT4_MOTOR_TAG_##_plr) /* PORT TAG */ \
- DISCRETE_555_CC(SPRINT4_PLAYER_MOTOR_NODE(3, _plr), /* IC D8, pin 3 */ \
- 1, /* RESET */ \
- SPRINT4_PLAYER_MOTOR_NODE(1, _plr), /* VIN */ \
- SPRINT4_PLAYER_MOTOR_NODE(2, _plr), /* R */ \
- CAP_U(0.01), /* C34 */ \
- RES_M(3.3), /* R42 */ \
- 0, /* no RGND */ \
- 0, /* no RDIS */ \
- &sprint4_motor_vco) /* OPTIONS */ \
- DISCRETE_COUNTER_7492(SPRINT4_PLAYER_MOTOR_NODE(4, _plr), /* IC D9, pins 11,9,8 */ \
- 1, /* ENAB */ \
- SPRINT4_ATTRACT_EN, /* RESET */ \
- SPRINT4_PLAYER_MOTOR_NODE(3, _plr), /* CLK */ \
- DISC_CLK_ON_F_EDGE) \
- DISCRETE_TRANSFORM3(SPRINT4_PLAYER_MOTOR_NODE(5, _plr), /* IC B10, pin 3 */ \
- SPRINT4_PLAYER_MOTOR_NODE(4, _plr), /* INP0 */ \
- 0x01, /* INP1 */ \
- 0x04, /* INP2 */ \
- "01&02&2/^") /* XOR QA and QC */ \
- DISCRETE_COUNTER(SPRINT4_PLAYER_MOTOR_NODE(6, _plr), /* IC D9, pin 12 */ \
- 1, /* ENAB */ \
- SPRINT4_ATTRACT_EN, /* RESET */ \
- SPRINT4_PLAYER_MOTOR_NODE(5, _plr), /* CLK */ \
- 0, 1, /* MIN, MAX */ \
- DISC_COUNT_UP, /* DIR */ \
- 0, /* INIT0 */ \
- DISC_CLK_ON_F_EDGE) /* CLKTYPE */ \
- DISCRETE_TRANSFORM3(SPRINT4_PLAYER_MOTOR_NODE(7, _plr), /* */ \
- SPRINT4_PLAYER_MOTOR_NODE(4, _plr), /* INP0 */ \
- SPRINT4_PLAYER_MOTOR_NODE(6, _plr), /* INP1 */ \
- 0x08, /* INP2 */ \
- "012*+") /* join 7492 bits together */ \
- DISCRETE_DAC_R1(SPRINT4_MOTOR_SND_##_plr, \
- SPRINT4_PLAYER_MOTOR_NODE(7, _plr), /* DATA */ \
- DEFAULT_TTL_V_LOGIC_1, /* VDATA */ \
- &sprint4_motor_out_DAC) /* LADDER */
+ RES_K(10) + RES_K(250), /* MIN */ \
+ RES_K(10), /* MAX */ \
+ DISC_LOGADJ, /* LOGLIN */ \
+ SPRINT4_MOTOR_TAG_##_plr) /* PORT TAG */ \
+ DISCRETE_555_CC(SPRINT4_PLAYER_MOTOR_NODE(3, _plr), /* IC D8, pin 3 */ \
+ 1, /* RESET */ \
+ SPRINT4_PLAYER_MOTOR_NODE(1, _plr), /* VIN */ \
+ SPRINT4_PLAYER_MOTOR_NODE(2, _plr), /* R */ \
+ CAP_U(0.01), /* C34 */ \
+ RES_M(3.3), /* R42 */ \
+ 0, /* no RGND */ \
+ 0, /* no RDIS */ \
+ &sprint4_motor_vco) /* OPTIONS */ \
+ DISCRETE_COUNTER_7492(SPRINT4_PLAYER_MOTOR_NODE(4, _plr), /* IC D9, pins 11,9,8 */ \
+ 1, /* ENAB */ \
+ SPRINT4_ATTRACT_EN, /* RESET */ \
+ SPRINT4_PLAYER_MOTOR_NODE(3, _plr), /* CLK */ \
+ DISC_CLK_ON_F_EDGE) \
+ DISCRETE_TRANSFORM3(SPRINT4_PLAYER_MOTOR_NODE(5, _plr), /* IC B10, pin 3 */ \
+ SPRINT4_PLAYER_MOTOR_NODE(4, _plr), /* INP0 */ \
+ 0x01, /* INP1 */ \
+ 0x04, /* INP2 */ \
+ "01&02&2/^") /* XOR QA and QC */ \
+ DISCRETE_COUNTER(SPRINT4_PLAYER_MOTOR_NODE(6, _plr), /* IC D9, pin 12 */ \
+ 1, /* ENAB */ \
+ SPRINT4_ATTRACT_EN, /* RESET */ \
+ SPRINT4_PLAYER_MOTOR_NODE(5, _plr), /* CLK */ \
+ 0, 1, /* MIN, MAX */ \
+ DISC_COUNT_UP, /* DIR */ \
+ 0, /* INIT0 */ \
+ DISC_CLK_ON_F_EDGE) /* CLKTYPE */ \
+ DISCRETE_TRANSFORM3(SPRINT4_PLAYER_MOTOR_NODE(7, _plr), /* */ \
+ SPRINT4_PLAYER_MOTOR_NODE(4, _plr), /* INP0 */ \
+ SPRINT4_PLAYER_MOTOR_NODE(6, _plr), /* INP1 */ \
+ 0x08, /* INP2 */ \
+ "012*+") /* join 7492 bits together */ \
+ DISCRETE_DAC_R1(SPRINT4_MOTOR_SND_##_plr, \
+ SPRINT4_PLAYER_MOTOR_NODE(7, _plr), /* DATA */ \
+ DEFAULT_TTL_V_LOGIC_1, /* VDATA */ \
+ &sprint4_motor_out_DAC) /* LADDER */
/************************************************
* Bang sound
************************************************/
-#define SPRINT4_BANG \
+#define SPRINT4_BANG \
DISCRETE_LFSR_NOISE(SPRINT4_NOISE, \
- 1, /* ENAB */ \
- SPRINT4_ATTRACT_INV, /* RESET */ \
- SPRINT4_2V, /* CLK */ \
- 1, /* AMPL */ \
- 0, /* FEED */ \
- 1.0/2, /* BIAS */ \
- &sprint4_lfsr) /* LFSRTB */ \
- DISCRETE_INPUT_DATA(SPRINT4_BANG_DATA) \
- DISCRETE_ONOFF(NODE_70, /* IC F7 */ \
- SPRINT4_NOISE, /* ENAB */ \
- SPRINT4_BANG_DATA) /* INP0 */ \
+ 1, /* ENAB */ \
+ SPRINT4_ATTRACT_INV, /* RESET */ \
+ SPRINT4_2V, /* CLK */ \
+ 1, /* AMPL */ \
+ 0, /* FEED */ \
+ 1.0/2, /* BIAS */ \
+ &sprint4_lfsr) /* LFSRTB */ \
+ DISCRETE_INPUT_DATA(SPRINT4_BANG_DATA) \
+ DISCRETE_ONOFF(NODE_70, /* IC F7 */ \
+ SPRINT4_NOISE, /* ENAB */ \
+ SPRINT4_BANG_DATA) /* INP0 */ \
DISCRETE_DAC_R1(SPRINT4_BANG_SND, \
- NODE_70, /* DATA */ \
- DEFAULT_TTL_V_LOGIC_1, /* VDATA */ \
- &sprint4_bang_DAC) /* LADDER */
+ NODE_70, /* DATA */ \
+ DEFAULT_TTL_V_LOGIC_1, /* VDATA */ \
+ &sprint4_bang_DAC) /* LADDER */
/************************************************
@@ -245,13 +245,13 @@ static const discrete_mixer_desc sprint4_mixer =
* it uses the bang noise source.
* _plr must be 1, 2, 3, or 4
************************************************/
-#define SPRINT4_PLAYER_SCREECH(_plr) \
- DISCRETE_INPUT_LOGIC(SPRINT4_SCREECH_EN_##_plr) \
- DISCRETE_SCHMITT_OSCILLATOR(SPRINT4_SCREECH_SND_##_plr, \
- SPRINT4_SCREECH_EN_##_plr, /* ENAB */ \
- SPRINT4_NOISE, /* INP0 */ \
- DEFAULT_TTL_V_LOGIC_1, /* AMPL */ \
- &sprint4_screech_osc_##_plr) /* TABLE */
+#define SPRINT4_PLAYER_SCREECH(_plr) \
+ DISCRETE_INPUT_LOGIC(SPRINT4_SCREECH_EN_##_plr) \
+ DISCRETE_SCHMITT_OSCILLATOR(SPRINT4_SCREECH_SND_##_plr, \
+ SPRINT4_SCREECH_EN_##_plr, /* ENAB */ \
+ SPRINT4_NOISE, /* INP0 */ \
+ DEFAULT_TTL_V_LOGIC_1, /* AMPL */ \
+ &sprint4_screech_osc_##_plr) /* TABLE */
/************************************************
@@ -260,15 +260,15 @@ static const discrete_mixer_desc sprint4_mixer =
* or
* _plr_a must be 3 and _plr_b must be 4
************************************************/
-#define SPRINT4_MIXER(_plr_a, _plr_b, _gain) \
+#define SPRINT4_MIXER(_plr_a, _plr_b, _gain) \
DISCRETE_MIXER5(SPRINT4_FINAL_MIX_##_plr_a##_##_plr_b, \
- 1, /* ENAB */ \
- SPRINT4_MOTOR_SND_##_plr_a, /* IN0 */ \
- SPRINT4_MOTOR_SND_##_plr_b, /* IN1 */ \
- SPRINT4_BANG_SND, /* IN2 */ \
- SPRINT4_SCREECH_SND_##_plr_a, /* IN3 */ \
- SPRINT4_SCREECH_SND_##_plr_b, /* IN4 */ \
- &sprint4_mixer) /* INFO */ \
+ 1, /* ENAB */ \
+ SPRINT4_MOTOR_SND_##_plr_a, /* IN0 */ \
+ SPRINT4_MOTOR_SND_##_plr_b, /* IN1 */ \
+ SPRINT4_BANG_SND, /* IN2 */ \
+ SPRINT4_SCREECH_SND_##_plr_a, /* IN3 */ \
+ SPRINT4_SCREECH_SND_##_plr_b, /* IN4 */ \
+ &sprint4_mixer) /* INFO */ \
DISCRETE_OUTPUT(SPRINT4_FINAL_MIX_##_plr_a##_##_plr_b, _gain)
@@ -299,4 +299,3 @@ DISCRETE_SOUND_START(ultratnk)
SPRINT4_PLAYER_SCREECH(2)
SPRINT4_MIXER(1, 2, 30000)
DISCRETE_SOUND_END
-
diff --git a/src/mame/audio/sprint4.h b/src/mame/audio/sprint4.h
index 4dcc389a3c6..4e3a862f28c 100644
--- a/src/mame/audio/sprint4.h
+++ b/src/mame/audio/sprint4.h
@@ -7,23 +7,23 @@ Atari Sprint 4 + Ultra Tank Audio
#include "sound/discrete.h"
/* discrete sound input nodes */
-#define SPRINT4_MOTOR_DATA_1 NODE_01
-#define SPRINT4_MOTOR_DATA_2 NODE_02
-#define SPRINT4_MOTOR_DATA_3 NODE_03
-#define SPRINT4_MOTOR_DATA_4 NODE_04
-#define SPRINT4_SCREECH_EN_1 NODE_05
-#define SPRINT4_SCREECH_EN_2 NODE_06
-#define SPRINT4_SCREECH_EN_3 NODE_07
-#define SPRINT4_SCREECH_EN_4 NODE_08
-#define SPRINT4_BANG_DATA NODE_09
-#define SPRINT4_ATTRACT_EN NODE_10
+#define SPRINT4_MOTOR_DATA_1 NODE_01
+#define SPRINT4_MOTOR_DATA_2 NODE_02
+#define SPRINT4_MOTOR_DATA_3 NODE_03
+#define SPRINT4_MOTOR_DATA_4 NODE_04
+#define SPRINT4_SCREECH_EN_1 NODE_05
+#define SPRINT4_SCREECH_EN_2 NODE_06
+#define SPRINT4_SCREECH_EN_3 NODE_07
+#define SPRINT4_SCREECH_EN_4 NODE_08
+#define SPRINT4_BANG_DATA NODE_09
+#define SPRINT4_ATTRACT_EN NODE_10
-#define ULTRATNK_MOTOR_DATA_1 SPRINT4_MOTOR_DATA_1
-#define ULTRATNK_MOTOR_DATA_2 SPRINT4_MOTOR_DATA_2
-#define ULTRATNK_FIRE_EN_1 SPRINT4_SCREECH_EN_1
-#define ULTRATNK_FIRE_EN_2 SPRINT4_SCREECH_EN_2
-#define ULTRATNK_EXPLOSION_DATA SPRINT4_BANG_DATA
-#define ULTRATNK_ATTRACT_EN SPRINT4_ATTRACT_EN
+#define ULTRATNK_MOTOR_DATA_1 SPRINT4_MOTOR_DATA_1
+#define ULTRATNK_MOTOR_DATA_2 SPRINT4_MOTOR_DATA_2
+#define ULTRATNK_FIRE_EN_1 SPRINT4_SCREECH_EN_1
+#define ULTRATNK_FIRE_EN_2 SPRINT4_SCREECH_EN_2
+#define ULTRATNK_EXPLOSION_DATA SPRINT4_BANG_DATA
+#define ULTRATNK_ATTRACT_EN SPRINT4_ATTRACT_EN
/*----------- defined in audio/sprint4.c -----------*/
diff --git a/src/mame/audio/sprint8.c b/src/mame/audio/sprint8.c
index 06900a09800..37ade932db0 100644
--- a/src/mame/audio/sprint8.c
+++ b/src/mame/audio/sprint8.c
@@ -8,97 +8,97 @@
/* Discrete Sound Input Nodes */
-#define SPRINT8_CRASH_EN NODE_01
-#define SPRINT8_SCREECH_EN NODE_02
-#define SPRINT8_ATTRACT_EN NODE_03
-#define SPRINT8_MOTOR1_EN NODE_04
-#define SPRINT8_MOTOR2_EN NODE_05
-#define SPRINT8_MOTOR3_EN NODE_06
-#define SPRINT8_MOTOR4_EN NODE_07
-#define SPRINT8_MOTOR5_EN NODE_08
-#define SPRINT8_MOTOR6_EN NODE_09
-#define SPRINT8_MOTOR7_EN NODE_10
-#define SPRINT8_MOTOR8_EN NODE_11
+#define SPRINT8_CRASH_EN NODE_01
+#define SPRINT8_SCREECH_EN NODE_02
+#define SPRINT8_ATTRACT_EN NODE_03
+#define SPRINT8_MOTOR1_EN NODE_04
+#define SPRINT8_MOTOR2_EN NODE_05
+#define SPRINT8_MOTOR3_EN NODE_06
+#define SPRINT8_MOTOR4_EN NODE_07
+#define SPRINT8_MOTOR5_EN NODE_08
+#define SPRINT8_MOTOR6_EN NODE_09
+#define SPRINT8_MOTOR7_EN NODE_10
+#define SPRINT8_MOTOR8_EN NODE_11
/* Discrete Sound Output Nodes */
-#define SPRINT8_NOISE NODE_12
-#define SPRINT8_MOTOR1_SND NODE_13
-#define SPRINT8_MOTOR2_SND NODE_14
-#define SPRINT8_MOTOR3_SND NODE_15
-#define SPRINT8_MOTOR4_SND NODE_16
-#define SPRINT8_MOTOR5_SND NODE_17
-#define SPRINT8_MOTOR6_SND NODE_18
-#define SPRINT8_MOTOR7_SND NODE_19
-#define SPRINT8_MOTOR8_SND NODE_20
-#define SPRINT8_CRASH_SCREECH_SND NODE_21
-#define SPRINT8_AUDIO_1_2 NODE_22
-#define SPRINT8_AUDIO_3_7 NODE_23
-#define SPRINT8_AUDIO_5_6 NODE_24
-#define SPRINT8_AUDIO_4_8 NODE_25
+#define SPRINT8_NOISE NODE_12
+#define SPRINT8_MOTOR1_SND NODE_13
+#define SPRINT8_MOTOR2_SND NODE_14
+#define SPRINT8_MOTOR3_SND NODE_15
+#define SPRINT8_MOTOR4_SND NODE_16
+#define SPRINT8_MOTOR5_SND NODE_17
+#define SPRINT8_MOTOR6_SND NODE_18
+#define SPRINT8_MOTOR7_SND NODE_19
+#define SPRINT8_MOTOR8_SND NODE_20
+#define SPRINT8_CRASH_SCREECH_SND NODE_21
+#define SPRINT8_AUDIO_1_2 NODE_22
+#define SPRINT8_AUDIO_3_7 NODE_23
+#define SPRINT8_AUDIO_5_6 NODE_24
+#define SPRINT8_AUDIO_4_8 NODE_25
/* Adjusters */
-#define SPRINT8_R132_POT NODE_29
+#define SPRINT8_R132_POT NODE_29
/* Parts List - Resistors */
-#define SPRINT8_R1 RES_K(47)
-#define SPRINT8_R3 RES_K(47)
-#define SPRINT8_R4 RES_K(47)
-#define SPRINT8_R19 RES_K(1)
-#define SPRINT8_R20 RES_K(1)
-#define SPRINT8_R27 RES_K(18)
-#define SPRINT8_R28 820
-#define SPRINT8_R29 RES_K(330)
-#define SPRINT8_R39 RES_K(120)
-#define SPRINT8_R40 RES_K(22)
-#define SPRINT8_R41 RES_K(150)
-#define SPRINT8_R89 RES_K(22)
-#define SPRINT8_R91 RES_K(47)
-#define SPRINT8_R93 RES_K(2.2)
-#define SPRINT8_R96 RES_K(47)
-#define SPRINT8_R97 RES_K(2.2)
-#define SPRINT8_R99 RES_K(27)
-#define SPRINT8_R100 RES_K(1)
-#define SPRINT8_R101 RES_K(2.2)
-#define SPRINT8_R132 RES_K(100)
-#define SPRINT8_R145 RES_K(3.3)
-#define SPRINT8_R146 RES_K(7.5)
-#define SPRINT8_R147 100
-#define SPRINT8_R148 RES_K(1)
-#define SPRINT8_R149 RES_K(22)
+#define SPRINT8_R1 RES_K(47)
+#define SPRINT8_R3 RES_K(47)
+#define SPRINT8_R4 RES_K(47)
+#define SPRINT8_R19 RES_K(1)
+#define SPRINT8_R20 RES_K(1)
+#define SPRINT8_R27 RES_K(18)
+#define SPRINT8_R28 820
+#define SPRINT8_R29 RES_K(330)
+#define SPRINT8_R39 RES_K(120)
+#define SPRINT8_R40 RES_K(22)
+#define SPRINT8_R41 RES_K(150)
+#define SPRINT8_R89 RES_K(22)
+#define SPRINT8_R91 RES_K(47)
+#define SPRINT8_R93 RES_K(2.2)
+#define SPRINT8_R96 RES_K(47)
+#define SPRINT8_R97 RES_K(2.2)
+#define SPRINT8_R99 RES_K(27)
+#define SPRINT8_R100 RES_K(1)
+#define SPRINT8_R101 RES_K(2.2)
+#define SPRINT8_R132 RES_K(100)
+#define SPRINT8_R145 RES_K(3.3)
+#define SPRINT8_R146 RES_K(7.5)
+#define SPRINT8_R147 100
+#define SPRINT8_R148 RES_K(1)
+#define SPRINT8_R149 RES_K(22)
/* Parts List - Capacitors */
-#define SPRINT8_C8 CAP_U(.01)
-#define SPRINT8_C17 CAP_U(.001)
-#define SPRINT8_C18 CAP_U(.047)
-#define SPRINT8_C19 CAP_U(.047)
-#define SPRINT8_C26 CAP_U(100)
-#define SPRINT8_C27 CAP_U(.22)
-#define SPRINT8_C28 CAP_U(.1)
-#define SPRINT8_C59 CAP_U(.1)
-#define SPRINT8_C63 CAP_U(.1)
-#define SPRINT8_C64 CAP_U(.1)
-#define SPRINT8_C89 CAP_U(.1)
-#define SPRINT8_C90 CAP_U(.1)
-
-#define SPRINT8_HSYNC 15750.0 /* not checked */
-#define SPRINT8_1V SPRINT8_HSYNC/2
-#define SPRINT8_2V SPRINT8_1V/2
+#define SPRINT8_C8 CAP_U(.01)
+#define SPRINT8_C17 CAP_U(.001)
+#define SPRINT8_C18 CAP_U(.047)
+#define SPRINT8_C19 CAP_U(.047)
+#define SPRINT8_C26 CAP_U(100)
+#define SPRINT8_C27 CAP_U(.22)
+#define SPRINT8_C28 CAP_U(.1)
+#define SPRINT8_C59 CAP_U(.1)
+#define SPRINT8_C63 CAP_U(.1)
+#define SPRINT8_C64 CAP_U(.1)
+#define SPRINT8_C89 CAP_U(.1)
+#define SPRINT8_C90 CAP_U(.1)
+
+#define SPRINT8_HSYNC 15750.0 /* not checked */
+#define SPRINT8_1V SPRINT8_HSYNC/2
+#define SPRINT8_2V SPRINT8_1V/2
static const discrete_lfsr_desc sprint8_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 10, /* Use Bit 10 as XOR input 0 */
- 15, /* Use Bit 15 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- DISC_LFSR_FLAG_RESET_TYPE_L, /* Output is not inverted */
- 12 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 10, /* Use Bit 10 as XOR input 0 */
+ 15, /* Use Bit 15 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ DISC_LFSR_FLAG_RESET_TYPE_L, /* Output is not inverted */
+ 12 /* Output bit */
};
static const discrete_555_desc sprint8_crash_555a_desc =
@@ -110,9 +110,9 @@ static const discrete_555_desc sprint8_crash_555a_desc =
static const discrete_integrate_info sprint8_crash_integrate =
{
DISC_INTEGRATE_OP_AMP_1,
- SPRINT8_R99, SPRINT8_R97, SPRINT8_R96, SPRINT8_C59, /*r1, r2, r3, c, */
- 5, 5, /* v1, vP*/
- 0, 0, 0 /* no functions */
+ SPRINT8_R99, SPRINT8_R97, SPRINT8_R96, SPRINT8_C59, /*r1, r2, r3, c, */
+ 5, 5, /* v1, vP*/
+ 0, 0, 0 /* no functions */
};
static const discrete_555_desc sprint8_motor_555a_desc =
@@ -129,24 +129,24 @@ static const discrete_555_desc sprint8_motor_555m_desc =
static const discrete_op_amp_filt_info sprint8_motor_filter =
{
- SPRINT8_R27, 0, SPRINT8_R28 + RES_2_PARALLEL(SPRINT8_R19, SPRINT8_R20), 0, SPRINT8_R29, /* r1, r2, r3, r4, rF, */
- SPRINT8_C18, SPRINT8_C19, 0, /* c1, c2, c3, */
- 5.0 * RES_VOLTAGE_DIVIDER(SPRINT8_R19, SPRINT8_R20), 5, 0 /* vRef, vP, vN */
+ SPRINT8_R27, 0, SPRINT8_R28 + RES_2_PARALLEL(SPRINT8_R19, SPRINT8_R20), 0, SPRINT8_R29, /* r1, r2, r3, r4, rF, */
+ SPRINT8_C18, SPRINT8_C19, 0, /* c1, c2, c3, */
+ 5.0 * RES_VOLTAGE_DIVIDER(SPRINT8_R19, SPRINT8_R20), 5, 0 /* vRef, vP, vN */
};
static const discrete_mixer_desc sprint8_crash_screech_mixer =
{
DISC_MIXER_IS_RESISTOR,
{SPRINT8_R149, SPRINT8_R91},
- {0, NODE_80}, /* R93 switched in/out of circuit */
- {0}, 0, 0, SPRINT8_C64, 0, 0, 1 /* c, rI, rF, cF, cAmp, vRef, gain */
+ {0, NODE_80}, /* R93 switched in/out of circuit */
+ {0}, 0, 0, SPRINT8_C64, 0, 0, 1 /* c, rI, rF, cF, cAmp, vRef, gain */
};
static const discrete_mixer_desc sprint8_mixer =
{
DISC_MIXER_IS_RESISTOR,
{SPRINT8_R1 + SPRINT8_R100, SPRINT8_R3, SPRINT8_R4},
- {0}, {0}, 0, 0, 0, SPRINT8_C8, 0, 1 /* r_nodes, c, rI, rF, cF, cAmp, vRef, gain */
+ {0}, {0}, 0, 0, 0, SPRINT8_C8, 0, 1 /* r_nodes, c, rI, rF, cF, cAmp, vRef, gain */
};
@@ -157,9 +157,9 @@ static const discrete_mixer_desc sprint8_mixer =
* This pulse is passed through C17 and pulled up with R40. This pulse is too fast to emulate so
* we will just tell the monostable it was triggered once and ignore C17/R40.
*/
-#define SPRINT8_MOTOR_CIRCUIT(_car) \
-DISCRETE_RCFILTER(NODE_RELATIVE(NODE_30, _car - 1), NODE_RELATIVE(SPRINT8_MOTOR1_EN, _car - 1), SPRINT8_R89, SPRINT8_C26) \
-DISCRETE_ADDER2(NODE_RELATIVE(NODE_40, _car - 1), 1, NODE_RELATIVE(NODE_30, _car - 1), 0.7) /* add Q21 shift */ \
+#define SPRINT8_MOTOR_CIRCUIT(_car) \
+DISCRETE_RCFILTER(NODE_RELATIVE(NODE_30, _car - 1), NODE_RELATIVE(SPRINT8_MOTOR1_EN, _car - 1), SPRINT8_R89, SPRINT8_C26) \
+DISCRETE_ADDER2(NODE_RELATIVE(NODE_40, _car - 1), 1, NODE_RELATIVE(NODE_30, _car - 1), 0.7) /* add Q21 shift */ \
DISCRETE_555_ASTABLE_CV(NODE_RELATIVE(NODE_50, _car - 1), 1, SPRINT8_R39, 0, SPRINT8_C27, NODE_RELATIVE(NODE_40, _car - 1), &sprint8_motor_555a_desc) \
DISCRETE_555_MSTABLE(NODE_RELATIVE(NODE_60, _car - 1), 1, NODE_RELATIVE(NODE_50, _car - 1), SPRINT8_R41, SPRINT8_C28, &sprint8_motor_555m_desc) \
DISCRETE_OP_AMP_FILTER(NODE_RELATIVE(SPRINT8_MOTOR1_SND, _car - 1), 1, NODE_RELATIVE(NODE_60, _car - 1), 0, DISC_OP_AMP_FILTER_IS_BAND_PASS_1M, &sprint8_motor_filter)
@@ -167,8 +167,8 @@ DISCRETE_OP_AMP_FILTER(NODE_RELATIVE(SPRINT8_MOTOR1_SND, _car - 1), 1, NODE_RELA
DISCRETE_SOUND_START( sprint8 )
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(SPRINT8_CRASH_EN)
DISCRETE_INPUT_NOT (SPRINT8_SCREECH_EN)
DISCRETE_INPUT_NOT (SPRINT8_ATTRACT_EN)
@@ -185,58 +185,58 @@ DISCRETE_SOUND_START( sprint8 )
DISCRETE_ADJUSTMENT(SPRINT8_R132_POT, 0, SPRINT8_R132, DISC_LINADJ, "R132")
/************************************************
- * Noise Generator, Crash, Screech
- ************************************************/
+ * Noise Generator, Crash, Screech
+ ************************************************/
/* Address line A2 is used to XOR the feedback bits.
- * This can not easily be implemented, so I just set the
- * feedback as XNOR. */
- DISCRETE_LFSR_NOISE(SPRINT8_NOISE, /* IC F7, pin 13 */
- 1, /* ENAB */
- SPRINT8_ATTRACT_EN, /* RESET */
- SPRINT8_2V, 1, 0, 0.5, &sprint8_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
+ * This can not easily be implemented, so I just set the
+ * feedback as XNOR. */
+ DISCRETE_LFSR_NOISE(SPRINT8_NOISE, /* IC F7, pin 13 */
+ 1, /* ENAB */
+ SPRINT8_ATTRACT_EN, /* RESET */
+ SPRINT8_2V, 1, 0, 0.5, &sprint8_lfsr) /* CLK,AMPL,FEED,BIAS,LFSRTB */
DISCRETE_TASK_END()
DISCRETE_TASK_START(1)
DISCRETE_GAIN(NODE_70, SPRINT8_NOISE, DEFAULT_TTL_V_LOGIC_1 * RES_VOLTAGE_DIVIDER(SPRINT8_R148, SPRINT8_R147))
DISCRETE_CRFILTER_VREF(NODE_71,
- NODE_70, /* IN0 */
+ NODE_70, /* IN0 */
RES_2_PARALLEL(SPRINT8_R148, SPRINT8_R147) + RES_2_PARALLEL(RES_K(5), RES_K(10)),
SPRINT8_C90,
- 5.0 * RES_VOLTAGE_DIVIDER(RES_K(5), RES_K(10))) /* ref to 555 CV pin */
+ 5.0 * RES_VOLTAGE_DIVIDER(RES_K(5), RES_K(10))) /* ref to 555 CV pin */
DISCRETE_555_ASTABLE_CV(NODE_72,
- SPRINT8_SCREECH_EN, /* RESET */
+ SPRINT8_SCREECH_EN, /* RESET */
SPRINT8_R145, SPRINT8_R146, SPRINT8_C89,
- NODE_71, /* CTRLV */
+ NODE_71, /* CTRLV */
&sprint8_crash_555a_desc)
DISCRETE_INTEGRATE(NODE_73, SPRINT8_CRASH_EN, 0, &sprint8_crash_integrate)
DISCRETE_SWITCH(NODE_80,
- 1, /* ENAB */
- SPRINT8_NOISE, /* SWITCH */
- SPRINT8_R93, 1) /* INP0,INP1*/
- DISCRETE_SWITCH(NODE_74, /* effect of Q20 */
- 1, /* ENAB */
- SPRINT8_NOISE, /* SWITCH */
- NODE_73, 0) /* INP0,INP1*/
+ 1, /* ENAB */
+ SPRINT8_NOISE, /* SWITCH */
+ SPRINT8_R93, 1) /* INP0,INP1*/
+ DISCRETE_SWITCH(NODE_74, /* effect of Q20 */
+ 1, /* ENAB */
+ SPRINT8_NOISE, /* SWITCH */
+ NODE_73, 0) /* INP0,INP1*/
DISCRETE_MIXER2(NODE_75,
- 1, /* ENAB */
+ 1, /* ENAB */
NODE_72,
NODE_74,
&sprint8_crash_screech_mixer)
DISCRETE_CRFILTER_VREF(NODE_76,
- NODE_75, /* IN0 */
+ NODE_75, /* IN0 */
SPRINT8_R93 + SPRINT8_R91, SPRINT8_C63,
- 5) /* VREF */
+ 5) /* VREF */
/* IC E5, pin 14 gain. Does not simulate minor DC offset caused by R93. */
DISCRETE_TRANSFORM5(NODE_77, NODE_76, 5, SPRINT8_R132_POT, SPRINT8_R101, 1, "01-23/4+*1+")
DISCRETE_CLAMP(SPRINT8_CRASH_SCREECH_SND, NODE_77, 0, 15.0 - 1.5)
DISCRETE_TASK_END()
/************************************************
- * Car Motor
- ************************************************/
+ * Car Motor
+ ************************************************/
DISCRETE_TASK_START(1)
SPRINT8_MOTOR_CIRCUIT(1)
SPRINT8_MOTOR_CIRCUIT(2)
@@ -258,29 +258,29 @@ DISCRETE_SOUND_START( sprint8 )
DISCRETE_TASK_END()
/************************************************
- * Final Mix
- ************************************************/
+ * Final Mix
+ ************************************************/
DISCRETE_TASK_START(2)
DISCRETE_MIXER3(SPRINT8_AUDIO_1_2,
- SPRINT8_ATTRACT_EN, /* ENAB */
+ SPRINT8_ATTRACT_EN, /* ENAB */
SPRINT8_CRASH_SCREECH_SND,
SPRINT8_MOTOR1_SND,
SPRINT8_MOTOR2_SND,
&sprint8_mixer)
DISCRETE_MIXER3(SPRINT8_AUDIO_3_7,
- SPRINT8_ATTRACT_EN, /* ENAB */
+ SPRINT8_ATTRACT_EN, /* ENAB */
SPRINT8_CRASH_SCREECH_SND,
SPRINT8_MOTOR3_SND,
SPRINT8_MOTOR7_SND,
&sprint8_mixer)
DISCRETE_MIXER3(SPRINT8_AUDIO_5_6,
- SPRINT8_ATTRACT_EN, /* ENAB */
+ SPRINT8_ATTRACT_EN, /* ENAB */
SPRINT8_CRASH_SCREECH_SND,
SPRINT8_MOTOR5_SND,
SPRINT8_MOTOR6_SND,
&sprint8_mixer)
DISCRETE_MIXER3(SPRINT8_AUDIO_4_8,
- SPRINT8_ATTRACT_EN, /* ENAB */
+ SPRINT8_ATTRACT_EN, /* ENAB */
SPRINT8_CRASH_SCREECH_SND,
SPRINT8_MOTOR4_SND,
SPRINT8_MOTOR8_SND,
diff --git a/src/mame/audio/starshp1.c b/src/mame/audio/starshp1.c
index 55538402757..7d55483f926 100644
--- a/src/mame/audio/starshp1.c
+++ b/src/mame/audio/starshp1.c
@@ -9,92 +9,92 @@
/* voltage out for each 1/256 step of MC1408 circuit */
-#define MC1408_DAC(v_ref, r, rf) ((double)v_ref / (double)r * (double)rf / 256.0)
+#define MC1408_DAC(v_ref, r, rf) ((double)v_ref / (double)r * (double)rf / 256.0)
-#define OP_AMP_NON_INVERT_GAIN(ri, rf) ((double)rf / (double)ri + 1)
+#define OP_AMP_NON_INVERT_GAIN(ri, rf) ((double)rf / (double)ri + 1)
/* Discrete Sound Input Nodes */
/* see "starshp1.h" */
/* Nodes - Sounds */
-#define STARSHP1_PHASOR_SND NODE_13
-#define STARSHP1_NOISE_SND NODE_14
-#define STARSHP1_MOTOR_SND NODE_15
-#define STARSHP1_SL1_SND NODE_16
-#define STARSHP1_SL2_SND NODE_17
+#define STARSHP1_PHASOR_SND NODE_13
+#define STARSHP1_NOISE_SND NODE_14
+#define STARSHP1_MOTOR_SND NODE_15
+#define STARSHP1_SL1_SND NODE_16
+#define STARSHP1_SL2_SND NODE_17
/* Timing signals */
-#define STARSHP1_HSYNC 15750 /* per manual */
-#define STARSHP1_S1V STARSHP1_HSYNC / 2
-#define STARSHP1_S128V STARSHP1_S1V / 128
+#define STARSHP1_HSYNC 15750 /* per manual */
+#define STARSHP1_S1V STARSHP1_HSYNC / 2
+#define STARSHP1_S128V STARSHP1_S1V / 128
/* R/C values */
-#define STARSHP1_R4 RES_K(1)
-#define STARSHP1_R54 RES_K(47)
-#define STARSHP1_R55 RES_K(22)
-#define STARSHP1_R58 RES_K(1)
-#define STARSHP1_R59 RES_K(1)
-#define STARSHP1_R60 RES_K(6.8)
-#define STARSHP1_R61 RES_K(10)
-#define STARSHP1_R62 750
-#define STARSHP1_R63 RES_K(22)
-#define STARSHP1_R64 RES_K(10)
-#define STARSHP1_R65 RES_K(3.3)
-#define STARSHP1_R66 RES_K(33)
-#define STARSHP1_R67 RES_K(1)
-#define STARSHP1_R68 RES_K(3.3)
-#define STARSHP1_R69 RES_K(330)
-#define STARSHP1_R70 RES_K(10)
-#define STARSHP1_R71 RES_K(6.8)
-#define STARSHP1_R72 RES_K(47)
-#define STARSHP1_R74 RES_K(100)
-#define STARSHP1_R75 RES_K(47)
-#define STARSHP1_R76 RES_K(5)
-#define STARSHP1_R123 RES_K(1)
-#define STARSHP1_R124 RES_K(1)
-#define STARSHP1_R126 RES_K(1)
-#define STARSHP1_R151 RES_K(10)
-#define STARSHP1_R152 RES_K(1.5)
-#define STARSHP1_C34 CAP_U(0.1)
-#define STARSHP1_C36 CAP_U(2.2)
-#define STARSHP1_C45 CAP_U(0.1)
-#define STARSHP1_C46 CAP_U(0.1)
-#define STARSHP1_C47 CAP_U(0.015)
-#define STARSHP1_C59 CAP_U(0.22)
-#define STARSHP1_C61 CAP_U(0.01)
-#define STARSHP1_C63 CAP_U(0.1)
-#define STARSHP1_C78 CAP_U(0.1)
+#define STARSHP1_R4 RES_K(1)
+#define STARSHP1_R54 RES_K(47)
+#define STARSHP1_R55 RES_K(22)
+#define STARSHP1_R58 RES_K(1)
+#define STARSHP1_R59 RES_K(1)
+#define STARSHP1_R60 RES_K(6.8)
+#define STARSHP1_R61 RES_K(10)
+#define STARSHP1_R62 750
+#define STARSHP1_R63 RES_K(22)
+#define STARSHP1_R64 RES_K(10)
+#define STARSHP1_R65 RES_K(3.3)
+#define STARSHP1_R66 RES_K(33)
+#define STARSHP1_R67 RES_K(1)
+#define STARSHP1_R68 RES_K(3.3)
+#define STARSHP1_R69 RES_K(330)
+#define STARSHP1_R70 RES_K(10)
+#define STARSHP1_R71 RES_K(6.8)
+#define STARSHP1_R72 RES_K(47)
+#define STARSHP1_R74 RES_K(100)
+#define STARSHP1_R75 RES_K(47)
+#define STARSHP1_R76 RES_K(5)
+#define STARSHP1_R123 RES_K(1)
+#define STARSHP1_R124 RES_K(1)
+#define STARSHP1_R126 RES_K(1)
+#define STARSHP1_R151 RES_K(10)
+#define STARSHP1_R152 RES_K(1.5)
+#define STARSHP1_C34 CAP_U(0.1)
+#define STARSHP1_C36 CAP_U(2.2)
+#define STARSHP1_C45 CAP_U(0.1)
+#define STARSHP1_C46 CAP_U(0.1)
+#define STARSHP1_C47 CAP_U(0.015)
+#define STARSHP1_C59 CAP_U(0.22)
+#define STARSHP1_C61 CAP_U(0.01)
+#define STARSHP1_C63 CAP_U(0.1)
+#define STARSHP1_C78 CAP_U(0.1)
/* Convert DAC value to voltage out at IC E10, pin 4 */
-#define STARSHP1_MC1408_GAIN MC1408_DAC(5.0, STARSHP1_R4, STARSHP1_R62)
+#define STARSHP1_MC1408_GAIN MC1408_DAC(5.0, STARSHP1_R4, STARSHP1_R62)
/* Gain at IC E10, pin 12 */
-#define STARSHP1_TONE_PITCH_GAIN OP_AMP_NON_INVERT_GAIN(STARSHP1_R63, STARSHP1_R64)
+#define STARSHP1_TONE_PITCH_GAIN OP_AMP_NON_INVERT_GAIN(STARSHP1_R63, STARSHP1_R64)
-#define STARSHP1_NOISE_AMPLITUDE_GAIN RES_VOLTAGE_DIVIDER(STARSHP1_R124, STARSHP1_R123)
+#define STARSHP1_NOISE_AMPLITUDE_GAIN RES_VOLTAGE_DIVIDER(STARSHP1_R124, STARSHP1_R123)
/* tweak to apply compensation filter at pin 6 */
-#define STARSHP1_FAKE_MC3340_COMPENSATION_R RES_K(6.2)
+#define STARSHP1_FAKE_MC3340_COMPENSATION_R RES_K(6.2)
/* Discrete info structures */
static const discrete_lfsr_desc starshp1_lfsr={
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 13, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is not inverted */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 13, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is not inverted */
+ 15 /* Output bit */
};
static const discrete_555_desc starshp1_556_c10 =
{
DISC_555_OUT_ENERGY,
- 5, /* B+ voltage of 555 */
+ 5, /* B+ voltage of 555 */
DEFAULT_555_VALUES
};
@@ -123,30 +123,30 @@ static const discrete_mixer_desc starshp1_555_b10_mix_r =
static const discrete_555_desc starshp1_555_b10 =
{
DISC_555_OUT_ENERGY,
- 5, /* B+ voltage of 555 */
- NODE_50, /* charge voltage */
- DEFAULT_TTL_V_LOGIC_1 /* cheat and use and anti-alias IC A10 level */
+ 5, /* B+ voltage of 555 */
+ NODE_50, /* charge voltage */
+ DEFAULT_TTL_V_LOGIC_1 /* cheat and use and anti-alias IC A10 level */
};
static const discrete_mixer_desc starshp1_final_mix =
{
DISC_MIXER_IS_RESISTOR,
{STARSHP1_R66, STARSHP1_R126, STARSHP1_R59 + STARSHP1_R60, STARSHP1_R74, STARSHP1_R75},
- {0}, /* no resistor nodes */
+ {0}, /* no resistor nodes */
{0, STARSHP1_C78, 0, 0, 0},
0,
STARSHP1_R76,
- 0, /* no cF */
+ 0, /* no cF */
STARSHP1_C63,
- 0, /* vRef */
- 1 /* gain */
+ 0, /* vRef */
+ 1 /* gain */
};
DISCRETE_SOUND_START( starshp1 )
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
// DISCRETE_INPUTX_DATA(STARSHP1_NOISE_AMPLITUDE, STARSHP1_MC1408_GAIN * STARSHP1_NOISE_AMPLITUDE_GAIN, 0, 0)
/* Fake the MC1408, no where near correct */
DISCRETE_INPUTX_DATA(STARSHP1_NOISE_AMPLITUDE, -4.0/255, 4, 0)
@@ -158,131 +158,131 @@ DISCRETE_SOUND_START( starshp1 )
DISCRETE_INPUT_LOGIC(STARSHP1_KICKER)
DISCRETE_INPUT_LOGIC(STARSHP1_PHASOR_ON)
DISCRETE_INPUT_NOT (STARSHP1_MOLVL)
- DISCRETE_INPUT_NOT (STARSHP1_ATTRACT) /* Inverted by Q9 */
+ DISCRETE_INPUT_NOT (STARSHP1_ATTRACT) /* Inverted by Q9 */
/************************************************
- * Noise
- ************************************************/
- DISCRETE_LFSR_NOISE(NODE_20, /* IC B9, pin 13 */
- 1, /* ENAB */
- STARSHP1_KICKER, /* IC B9 & C9, pin 9 */
- STARSHP1_S1V, /* IC B9 & C9, pin 8 */
- 1, /* 1 p/p */
- 0, /* no feed */
- 1.0 / 2, /* shift to 0/1 */
+ * Noise
+ ************************************************/
+ DISCRETE_LFSR_NOISE(NODE_20, /* IC B9, pin 13 */
+ 1, /* ENAB */
+ STARSHP1_KICKER, /* IC B9 & C9, pin 9 */
+ STARSHP1_S1V, /* IC B9 & C9, pin 8 */
+ 1, /* 1 p/p */
+ 0, /* no feed */
+ 1.0 / 2, /* shift to 0/1 */
&starshp1_lfsr)
/* calculate noise level */
- DISCRETE_SWITCH( NODE_21, /* voltage at R151 & R152 junction */
+ DISCRETE_SWITCH( NODE_21, /* voltage at R151 & R152 junction */
NODE_20,
STARSHP1_NOISE_FREQ,
DEFAULT_TTL_V_LOGIC_1 * RES_VOLTAGE_DIVIDER(STARSHP1_R151, STARSHP1_R152),
DEFAULT_TTL_V_LOGIC_1)
/* fake MC3340 */
- DISCRETE_MULTIPLY( NODE_22,
+ DISCRETE_MULTIPLY( NODE_22,
NODE_21,
STARSHP1_NOISE_AMPLITUDE)
- DISCRETE_RCFILTER( NODE_23,
+ DISCRETE_RCFILTER( NODE_23,
NODE_22,
STARSHP1_FAKE_MC3340_COMPENSATION_R,
STARSHP1_C61)
/* when NOISE_FREQ is high (NOISE_FREQ_INV is low), C59 is in circuit */
- DISCRETE_RCFILTER( NODE_24,
+ DISCRETE_RCFILTER( NODE_24,
NODE_22,
STARSHP1_FAKE_MC3340_COMPENSATION_R,
STARSHP1_C61 + STARSHP1_C59)
- DISCRETE_SWITCH( STARSHP1_NOISE_SND,
- 1, /* ENAB */
+ DISCRETE_SWITCH( STARSHP1_NOISE_SND,
+ 1, /* ENAB */
STARSHP1_NOISE_FREQ,
NODE_23,
NODE_24)
/************************************************
- * Phasor
- ************************************************/
- DISCRETE_555_ASTABLE(NODE_30, /* IC C10, pin 9 */
- STARSHP1_PHASOR_ON, /* RESET */
+ * Phasor
+ ************************************************/
+ DISCRETE_555_ASTABLE(NODE_30, /* IC C10, pin 9 */
+ STARSHP1_PHASOR_ON, /* RESET */
STARSHP1_R70,
STARSHP1_R69,
STARSHP1_C46,
&starshp1_556_c10)
/* compensate for internal 555 CV resistors */
- DISCRETE_MIXER2( NODE_31,
- 1, /* ENAB */
- NODE_30, /* IC C10, pin 9 */
- 5, /* 555 B+ */
+ DISCRETE_MIXER2( NODE_31,
+ 1, /* ENAB */
+ NODE_30, /* IC C10, pin 9 */
+ 5, /* 555 B+ */
&starshp1_556_c10_cv)
- DISCRETE_555_ASTABLE_CV(STARSHP1_PHASOR_SND, /* IC C10, pin 5 */
- STARSHP1_PHASOR_ON, /* RESET */
+ DISCRETE_555_ASTABLE_CV(STARSHP1_PHASOR_SND, /* IC C10, pin 5 */
+ STARSHP1_PHASOR_ON, /* RESET */
STARSHP1_R68,
STARSHP1_R67,
STARSHP1_C45,
- NODE_31, /* IC C10, pin 3 */
+ NODE_31, /* IC C10, pin 3 */
&starshp1_556_c10)
/************************************************
- * Motor
- ************************************************/
- DISCRETE_SQUAREWFIX(NODE_40, /* S128V signal */
- 1, /* ENAB */
+ * Motor
+ ************************************************/
+ DISCRETE_SQUAREWFIX(NODE_40, /* S128V signal */
+ 1, /* ENAB */
STARSHP1_S128V,
DEFAULT_TTL_V_LOGIC_1,
- 50, /* DUTY */
- DEFAULT_TTL_V_LOGIC_1 / 2, /* BIAS */
- 0) /* PHASE */
- DISCRETE_MIXER2( NODE_41, /* voltage at R54 & R55 junction */
- 1, /* ENAB */
- NODE_40, /* IC E10, pin 12 */
- 5, /* 5V to R55 */
+ 50, /* DUTY */
+ DEFAULT_TTL_V_LOGIC_1 / 2, /* BIAS */
+ 0) /* PHASE */
+ DISCRETE_MIXER2( NODE_41, /* voltage at R54 & R55 junction */
+ 1, /* ENAB */
+ NODE_40, /* IC E10, pin 12 */
+ 5, /* 5V to R55 */
&starshp1_566_a9_mix_r)
- DISCRETE_566( NODE_42, /* IC A9, pin 4 */
- STARSHP1_MOTOR_SPEED, /* IC A9, pin 5 */
+ DISCRETE_566( NODE_42, /* IC A9, pin 4 */
+ STARSHP1_MOTOR_SPEED, /* IC A9, pin 5 */
RES_2_PARALLEL(STARSHP1_R54, STARSHP1_R55),
STARSHP1_C34,
- 5, -10, NODE_41, /* VPOS,VNEG,VCHARGE */
+ 5, -10, NODE_41, /* VPOS,VNEG,VCHARGE */
DISC_566_OUT_DC | DISC_566_OUT_TRIANGLE)
DISCRETE_SWITCH(NODE_43,
- 1, /* ENAB */
- STARSHP1_MOLVL, /* SWITCH */
+ 1, /* ENAB */
+ STARSHP1_MOLVL, /* SWITCH */
STARSHP1_R59 + RES_2_PARALLEL(STARSHP1_R58, STARSHP1_R60 + STARSHP1_R76),
STARSHP1_R59 + STARSHP1_R60 + STARSHP1_R76)
DISCRETE_CRFILTER(NODE_44,
- NODE_42, /* IN0 */
- NODE_43, /* RVAL*/
+ NODE_42, /* IN0 */
+ NODE_43, /* RVAL*/
STARSHP1_C36)
- DISCRETE_SWITCH(NODE_45, /* gain affect of voltage divider */
- 1, /* ENAB */
- STARSHP1_MOLVL, /* SWITCH */
+ DISCRETE_SWITCH(NODE_45, /* gain affect of voltage divider */
+ 1, /* ENAB */
+ STARSHP1_MOLVL, /* SWITCH */
RES_VOLTAGE_DIVIDER(STARSHP1_R59, STARSHP1_R58), 1)
- DISCRETE_MULTIPLY( STARSHP1_MOTOR_SND,
+ DISCRETE_MULTIPLY( STARSHP1_MOTOR_SND,
NODE_44,
NODE_45)
/************************************************
- * SL1, SL2
- ************************************************/
- DISCRETE_MIXER2( NODE_50, /* voltage at R65 & R71 junction */
- 1, /* ENAB */
- STARSHP1_TONE_PITCH, /* IC E10, pin 12 */
- 10, /* 10V to R71 */
+ * SL1, SL2
+ ************************************************/
+ DISCRETE_MIXER2( NODE_50, /* voltage at R65 & R71 junction */
+ 1, /* ENAB */
+ STARSHP1_TONE_PITCH, /* IC E10, pin 12 */
+ 10, /* 10V to R71 */
&starshp1_555_b10_mix_r)
- DISCRETE_555_ASTABLE(NODE_51, /* IC B10, pin 3 */
- 1, /* RESET */
+ DISCRETE_555_ASTABLE(NODE_51, /* IC B10, pin 3 */
+ 1, /* RESET */
RES_2_PARALLEL(STARSHP1_R65, STARSHP1_R71),
STARSHP1_R72,
STARSHP1_C47,
&starshp1_555_b10)
/* use switch instead of logic AND, so we can switch between
- * 0V and the anti-aliased TTL level out that we set NODE_51 to. */
- DISCRETE_ONOFF( STARSHP1_SL1_SND, /* IC A10, pin 11 */
+ * 0V and the anti-aliased TTL level out that we set NODE_51 to. */
+ DISCRETE_ONOFF( STARSHP1_SL1_SND, /* IC A10, pin 11 */
STARSHP1_SL1, NODE_51)
- DISCRETE_ONOFF( STARSHP1_SL2_SND, /* IC A10, pin 8 */
+ DISCRETE_ONOFF( STARSHP1_SL2_SND, /* IC A10, pin 8 */
STARSHP1_SL2, NODE_51)
/************************************************
- * Mixing and output
- ************************************************/
- DISCRETE_MIXER5( NODE_90,
- STARSHP1_ATTRACT, /* ENAB */
+ * Mixing and output
+ ************************************************/
+ DISCRETE_MIXER5( NODE_90,
+ STARSHP1_ATTRACT, /* ENAB */
STARSHP1_PHASOR_SND,
STARSHP1_NOISE_SND,
STARSHP1_MOTOR_SND,
diff --git a/src/mame/audio/starwars.c b/src/mame/audio/starwars.c
index 54c5d1e3583..936dd7410f8 100644
--- a/src/mame/audio/starwars.c
+++ b/src/mame/audio/starwars.c
@@ -120,7 +120,7 @@ READ8_MEMBER(starwars_state::starwars_main_read_r)
READ8_MEMBER(starwars_state::starwars_main_ready_flag_r)
{
- return riot6532_porta_in_get(m_riot) & 0xc0; /* only upper two flag bits mapped */
+ return riot6532_porta_in_get(m_riot) & 0xc0; /* only upper two flag bits mapped */
}
static TIMER_CALLBACK( main_callback )
diff --git a/src/mame/audio/subs.c b/src/mame/audio/subs.c
index b996bbbb097..f4c81105bf3 100644
--- a/src/mame/audio/subs.c
+++ b/src/mame/audio/subs.c
@@ -46,25 +46,25 @@ WRITE8_MEMBER(subs_state::subs_noise_reset_w)
static const discrete_lfsr_desc subs_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 13, /* Use Bit 13 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output is already inverted by XNOR */
- 13 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 13, /* Use Bit 13 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output is already inverted by XNOR */
+ 13 /* Output bit */
};
/* Nodes - Sounds */
-#define SUBS_NOISE NODE_10
-#define SUBS_SONAR1_SND NODE_11
-#define SUBS_SONAR2_SND NODE_12
-#define SUBS_LAUNCH_SND NODE_13
-#define SUBS_CRASH_SND NODE_14
-#define SUBS_EXPLODE_SND NODE_15
+#define SUBS_NOISE NODE_10
+#define SUBS_SONAR1_SND NODE_11
+#define SUBS_SONAR2_SND NODE_12
+#define SUBS_LAUNCH_SND NODE_13
+#define SUBS_CRASH_SND NODE_14
+#define SUBS_EXPLODE_SND NODE_15
DISCRETE_SOUND_START(subs)
/************************************************/
@@ -108,7 +108,7 @@ DISCRETE_SOUND_START(subs)
/* controls the amplitude. */
/* 8V = Hsync/2/8 = 15750/2/8 */
/************************************************/
- DISCRETE_SQUAREWFIX(NODE_20, 1, 15750.0/2/8, 1.0, 50, 1.0/2, 0) /* Resample freq. */
+ DISCRETE_SQUAREWFIX(NODE_20, 1, 15750.0/2/8, 1.0, 50, 1.0/2, 0) /* Resample freq. */
DISCRETE_SAMPLHOLD(NODE_21, SUBS_NOISE, NODE_20, DISC_SAMPHOLD_REDGE)
DISCRETE_MULTIPLY(NODE_22, NODE_21, SUBS_CRASH_DATA)
DISCRETE_ONOFF(SUBS_CRASH_SND, SUBS_CRASH_EN, NODE_22)
@@ -123,12 +123,12 @@ DISCRETE_SOUND_START(subs)
/************************************************/
/* Not sure how the sonar works yet. */
/************************************************/
- DISCRETE_RCDISC2(NODE_40, SUBS_SONAR1_EN, SUBS_SONAR1_EN, 680000.0, SUBS_SONAR1_EN, 1000.0, 1e-6) /* Decay envelope */
+ DISCRETE_RCDISC2(NODE_40, SUBS_SONAR1_EN, SUBS_SONAR1_EN, 680000.0, SUBS_SONAR1_EN, 1000.0, 1e-6) /* Decay envelope */
DISCRETE_ADDER2(NODE_41, 1, NODE_40, 800)
DISCRETE_LOGIC_AND(NODE_42, SUBS_SONAR1_EN, SUBS_NOISE)
DISCRETE_TRIANGLEWAVE(SUBS_SONAR1_SND, NODE_42, NODE_41, 320.8, 0.0, 0)
- DISCRETE_RCDISC2(NODE_50, SUBS_SONAR2_EN, SUBS_SONAR2_EN, 18600.0, SUBS_SONAR2_EN, 20.0, 4.7e-6) /* Decay envelope */
+ DISCRETE_RCDISC2(NODE_50, SUBS_SONAR2_EN, SUBS_SONAR2_EN, 18600.0, SUBS_SONAR2_EN, 20.0, 4.7e-6) /* Decay envelope */
DISCRETE_ADDER2(NODE_51, 1, NODE_50, 800)
DISCRETE_LOGIC_AND(NODE_52, SUBS_SONAR2_EN, SUBS_NOISE)
DISCRETE_TRIANGLEWAVE(SUBS_SONAR2_SND, NODE_52, NODE_51, 320.8, 0.0, 0)
diff --git a/src/mame/audio/suna8.c b/src/mame/audio/suna8.c
index 5e2355967de..68175fbea8c 100644
--- a/src/mame/audio/suna8.c
+++ b/src/mame/audio/suna8.c
@@ -16,7 +16,7 @@ SAMPLES_START( suna8_sh_start )
suna8_state *state = device.machine().driver_data<suna8_state>();
running_machine &machine = device.machine();
- int i, len = state->memregion("samples")->bytes() * 2; // 2 samples per byte
+ int i, len = state->memregion("samples")->bytes() * 2; // 2 samples per byte
UINT8 *ROM = state->memregion("samples")->base();
state->m_samplebuf = auto_alloc_array(machine, INT16, len);
@@ -62,7 +62,7 @@ WRITE8_MEMBER(suna8_state::suna8_play_samples_w)
{
play_sample((m_sample & 3) + 7);
}
- else if ( ~data & 0x40 ) // sparkman, second sample rom
+ else if ( ~data & 0x40 ) // sparkman, second sample rom
{
play_sample(m_sample + 0x10);
}
@@ -73,7 +73,7 @@ WRITE8_MEMBER(suna8_state::rranger_play_samples_w)
{
if (data)
{
- if (( m_sample != 0 ) && ( ~data & 0x30 )) // don't play sample zero when those bits are active
+ if (( m_sample != 0 ) && ( ~data & 0x30 )) // don't play sample zero when those bits are active
{
play_sample(m_sample);
}
diff --git a/src/mame/audio/t5182.c b/src/mame/audio/t5182.c
index 59a7e277a75..94aebba811d 100644
--- a/src/mame/audio/t5182.c
+++ b/src/mame/audio/t5182.c
@@ -196,7 +196,7 @@ static TIMER_CALLBACK( setirq_callback )
break;
case CPU_ASSERT:
- irqstate |= 2; // also used by t5182_sharedram_semaphore_main_r
+ irqstate |= 2; // also used by t5182_sharedram_semaphore_main_r
break;
case CPU_CLEAR:
@@ -209,9 +209,9 @@ static TIMER_CALLBACK( setirq_callback )
if (cpu == NULL)
return;
- if (irqstate == 0) /* no IRQs pending */
+ if (irqstate == 0) /* no IRQs pending */
cpu->execute().set_input_line(0,CLEAR_LINE);
- else /* IRQ pending */
+ else /* IRQ pending */
cpu->execute().set_input_line(0,ASSERT_LINE);
}
@@ -295,10 +295,10 @@ static READ8_HANDLER(t5182_sharedram_semaphore_main_r)
// A0XX
// rest unused
ADDRESS_MAP_START( t5182_map, AS_PROGRAM, 8, driver_device )
- AM_RANGE(0x0000, 0x1fff) AM_ROM // internal ROM
- AM_RANGE(0x2000, 0x27ff) AM_RAM AM_MIRROR(0x1800) // internal RAM
+ AM_RANGE(0x0000, 0x1fff) AM_ROM // internal ROM
+ AM_RANGE(0x2000, 0x27ff) AM_RAM AM_MIRROR(0x1800) // internal RAM
AM_RANGE(0x4000, 0x40ff) AM_RAM AM_MIRROR(0x3F00) AM_SHARE("t5182_sharedram") // 2016 with four 74ls245s, one each for main and t5182 address and data. pins 23, 22, 20, 19, 18 are all tied low so only 256 bytes are usable
- AM_RANGE(0x8000, 0xffff) AM_ROM // external ROM
+ AM_RANGE(0x8000, 0xffff) AM_ROM // external ROM
ADDRESS_MAP_END
diff --git a/src/mame/audio/taito_en.c b/src/mame/audio/taito_en.c
index 3c706bf3861..cce6dfaaa9d 100644
--- a/src/mame/audio/taito_en.c
+++ b/src/mame/audio/taito_en.c
@@ -22,12 +22,12 @@
*************************************/
static UINT16 es5510_dsp_ram[0x200];
-static UINT32 es5510_gpr[0xc0];
+static UINT32 es5510_gpr[0xc0];
static UINT32 es5510_dram[1<<24];
static UINT32 es5510_dol_latch;
static UINT32 es5510_dil_latch;
static UINT32 es5510_dadr_latch;
-static UINT32 es5510_gpr_latch;
+static UINT32 es5510_gpr_latch;
static UINT8 es5510_ram_sel;
static UINT32 *snd_shared_ram;
@@ -208,7 +208,7 @@ static ADDRESS_MAP_START( en_sound_map, AS_PROGRAM, 16, driver_device )
AM_RANGE(0xc00000, 0xc1ffff) AM_ROMBANK("bank1")
AM_RANGE(0xc20000, 0xc3ffff) AM_ROMBANK("bank2")
AM_RANGE(0xc40000, 0xc7ffff) AM_ROMBANK("bank3")
- AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_SHARE("share1") // mirror
+ AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_SHARE("share1") // mirror
ADDRESS_MAP_END
@@ -297,13 +297,13 @@ static void taito_en_duart_irq_handler(device_t *device, int state, UINT8 vector
static const duart68681_config taito_en_duart68681_config =
{
taito_en_duart_irq_handler,
- NULL, /* tx callback */
- NULL, /* input port read */
- NULL, /* output port write */
- XTAL_16MHz/2/8, /* IP2/RxCB clock */
- XTAL_16MHz/2/16, /* IP3/TxCA clock */
- XTAL_16MHz/2/16, /* IP4/RxCA clock */
- XTAL_16MHz/2/8, /* IP5/TxCB clock */
+ NULL, /* tx callback */
+ NULL, /* input port read */
+ NULL, /* output port write */
+ XTAL_16MHz/2/8, /* IP2/RxCB clock */
+ XTAL_16MHz/2/16, /* IP3/TxCA clock */
+ XTAL_16MHz/2/16, /* IP4/RxCA clock */
+ XTAL_16MHz/2/8, /* IP5/TxCB clock */
};
static const mb87078_interface taito_en_mb87078_intf =
@@ -313,9 +313,9 @@ static const mb87078_interface taito_en_mb87078_intf =
static const es5505_interface es5505_taito_en_config =
{
- "ensoniq.0", /* Bank 0: Unused by F3 games? */
- "ensoniq.0", /* Bank 1: All games seem to use this */
- NULL /* IRQ */
+ "ensoniq.0", /* Bank 0: Unused by F3 games? */
+ "ensoniq.0", /* Bank 1: All games seem to use this */
+ NULL /* IRQ */
};
diff --git a/src/mame/audio/taito_zm.c b/src/mame/audio/taito_zm.c
index f5a242d6b20..a98befce1da 100644
--- a/src/mame/audio/taito_zm.c
+++ b/src/mame/audio/taito_zm.c
@@ -19,8 +19,8 @@ static ADDRESS_MAP_START(taitozoom_map, AS_PROGRAM, 16, driver_device )
AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("mn10200", 0)
AM_RANGE(0x400000, 0x40ffff) AM_RAM
AM_RANGE(0x800000, 0x800fff) AM_DEVREADWRITE_LEGACY("zsg2", zsg2_r, zsg2_w)
- AM_RANGE(0xe00000, 0xe000ff) AM_RAM // main CPU comms (1fbe0xxx on FX-1B main CPU, banked with eeprom - raystorm writes command at PC=80015240)
- AM_RANGE(0xc00000, 0xc00001) AM_RAM // TMS57002 comms
+ AM_RANGE(0xe00000, 0xe000ff) AM_RAM // main CPU comms (1fbe0xxx on FX-1B main CPU, banked with eeprom - raystorm writes command at PC=80015240)
+ AM_RANGE(0xc00000, 0xc00001) AM_RAM // TMS57002 comms
ADDRESS_MAP_END
static UINT8 tms_ctrl;
@@ -47,7 +47,7 @@ ADDRESS_MAP_END
static const zsg2_interface zsg2_taito_config =
{
- "zsg2" /* sample region */
+ "zsg2" /* sample region */
};
MACHINE_CONFIG_FRAGMENT( taito_zoom_sound )
diff --git a/src/mame/audio/taitosnd.c b/src/mame/audio/taitosnd.c
index bfd3de5a818..948044fa054 100644
--- a/src/mame/audio/taitosnd.c
+++ b/src/mame/audio/taitosnd.c
@@ -25,8 +25,8 @@ struct tc0140syt_state
UINT8 nmi_enabled; /* 1 if slave cpu has nmi's enabled */
UINT8 nmi_req; /* 1 if slave cpu has a pending nmi */
- device_t *mastercpu; /* this is the maincpu */
- device_t *slavecpu; /* this is the audiocpu */
+ device_t *mastercpu; /* this is the maincpu */
+ device_t *slavecpu; /* this is the audiocpu */
};
/*****************************************************************************
@@ -80,35 +80,35 @@ WRITE8_DEVICE_HANDLER( tc0140syt_comm_w )
{
tc0140syt_state *tc0140syt = get_safe_token(device);
- data &= 0x0f; /*this is important, otherwise ballbros won't work*/
+ data &= 0x0f; /*this is important, otherwise ballbros won't work*/
switch (tc0140syt->mainmode)
{
- case 0x00: // mode #0
+ case 0x00: // mode #0
tc0140syt->slavedata[tc0140syt->mainmode ++] = data;
//logerror("taitosnd: Master cpu written port 0, data %01x\n", data);
break;
- case 0x01: // mode #1
+ case 0x01: // mode #1
tc0140syt->slavedata[tc0140syt->mainmode ++] = data;
tc0140syt->status |= TC0140SYT_PORT01_FULL;
tc0140syt->nmi_req = 1;
//logerror("taitosnd: Master cpu sends 0/1 : %01x%01x\n", tc0140syt->slavedata[1], tc0140syt->slavedata[0]);
- break;
+ break;
- case 0x02: // mode #2
+ case 0x02: // mode #2
tc0140syt->slavedata[tc0140syt->mainmode ++] = data;
//logerror("taitosnd: Master cpu written port 2, data %01\n", data);
break;
- case 0x03: // mode #3
+ case 0x03: // mode #3
tc0140syt->slavedata[tc0140syt->mainmode ++] = data;
tc0140syt->status |= TC0140SYT_PORT23_FULL;
tc0140syt->nmi_req = 1;
//logerror("taitosnd: Master cpu sends 2/3 : %01x%01x\n", tc0140syt->slavedata[3], tc0140syt->slavedata[2]);
break;
- case 0x04: // port status
+ case 0x04: // port status
//logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, space.device().safe_pc() );
/* this does a hi-lo transition to reset the sound cpu */
if (data)
@@ -133,25 +133,25 @@ READ8_DEVICE_HANDLER( tc0140syt_comm_r )
switch( tc0140syt->mainmode )
{
- case 0x00: // mode #0
+ case 0x00: // mode #0
//logerror("taitosnd: Master cpu read portdata %01x\n", tc0140syt->masterdata[0]);
return tc0140syt->masterdata[tc0140syt->mainmode ++];
- case 0x01: // mode #1
+ case 0x01: // mode #1
//logerror("taitosnd: Master cpu receives 0/1 : %01x%01x\n", tc0140syt->masterdata[1], tc0140syt->masterdata[0]);
tc0140syt->status &= ~TC0140SYT_PORT01_FULL_MASTER;
return tc0140syt->masterdata[tc0140syt->mainmode ++];
- case 0x02: // mode #2
+ case 0x02: // mode #2
//logerror("taitosnd: Master cpu read masterdata %01x\n", tc0140syt->masterdata[2]);
return tc0140syt->masterdata[tc0140syt->mainmode ++];
- case 0x03: // mode #3
+ case 0x03: // mode #3
//logerror("taitosnd: Master cpu receives 2/3 : %01x%01x\n", tc0140syt->masterdata[3], tc0140syt->masterdata[2]);
tc0140syt->status &= ~TC0140SYT_PORT23_FULL_MASTER;
return tc0140syt->masterdata[tc0140syt->mainmode ++];
- case 0x04: // port status
+ case 0x04: // port status
//logerror("tc0140syt : Master cpu read status : %02x\n", tc0140syt->status);
return tc0140syt->status;
@@ -181,40 +181,40 @@ WRITE8_DEVICE_HANDLER( tc0140syt_slave_comm_w )
data &= 0x0f;
switch (tc0140syt->submode)
{
- case 0x00: // mode #0
+ case 0x00: // mode #0
tc0140syt->masterdata[tc0140syt->submode ++] = data;
//logerror("taitosnd: Slave cpu written port 0, data %01x\n", data);
break;
- case 0x01: // mode #1
+ case 0x01: // mode #1
tc0140syt->masterdata[tc0140syt->submode ++] = data;
tc0140syt->status |= TC0140SYT_PORT01_FULL_MASTER;
//logerror("taitosnd: Slave cpu sends 0/1 : %01x%01x\n" , tc0140syt->masterdata[1] , tc0140syt->masterdata[0]);
tc0140syt->slavecpu->execute().spin(); /* writing should take longer than emulated, so spin */
break;
- case 0x02: // mode #2
+ case 0x02: // mode #2
//logerror("taitosnd: Slave cpu written port 2, data %01x\n", data);
tc0140syt->masterdata[tc0140syt->submode ++] = data;
break;
- case 0x03: // mode #3
+ case 0x03: // mode #3
tc0140syt->masterdata[tc0140syt->submode ++] = data;
tc0140syt->status |= TC0140SYT_PORT23_FULL_MASTER;
//logerror("taitosnd: Slave cpu sends 2/3 : %01x%01x\n" , tc0140syt->masterdata[3] , tc0140syt->masterdata[2]);
tc0140syt->slavecpu->execute().spin(); /* writing should take longer than emulated, so spin */
break;
- case 0x04: // port status
+ case 0x04: // port status
//tc0140syt->status = TC0140SYT_SET_OK;
//logerror("tc0140syt : Slave cpu status ok.\n");
break;
- case 0x05: // nmi disable
+ case 0x05: // nmi disable
tc0140syt->nmi_enabled = 0;
break;
- case 0x06: // nmi enable
+ case 0x06: // nmi enable
tc0140syt->nmi_enabled = 1;
break;
@@ -234,29 +234,29 @@ READ8_DEVICE_HANDLER( tc0140syt_slave_comm_r )
switch ( tc0140syt->submode )
{
- case 0x00: // mode #0
+ case 0x00: // mode #0
//logerror("taitosnd: Slave cpu read slavedata %01x\n", tc0140syt->slavedata[0]);
res = tc0140syt->slavedata[tc0140syt->submode ++];
break;
- case 0x01: // mode #1
+ case 0x01: // mode #1
//logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],space.device().safe_pc());
tc0140syt->status &= ~TC0140SYT_PORT01_FULL;
res = tc0140syt->slavedata[tc0140syt->submode ++];
break;
- case 0x02: // mode #2
+ case 0x02: // mode #2
//logerror("taitosnd: Slave cpu read slavedata %01x\n", tc0140syt->slavedata[2]);
res = tc0140syt->slavedata[tc0140syt->submode ++];
break;
- case 0x03: // mode #3
+ case 0x03: // mode #3
//logerror("taitosnd: Slave cpu receives 2/3 : %01x%01x\n", tc0140syt->slavedata[3] , tc0140syt->slavedata[2]);
tc0140syt->status &= ~TC0140SYT_PORT23_FULL;
res = tc0140syt->slavedata[tc0140syt->submode ++];
break;
- case 0x04: // port status
+ case 0x04: // port status
//logerror("tc0140syt : Slave cpu read status : %02x\n", tc0140syt->status);
res = tc0140syt->status;
break;
@@ -347,5 +347,3 @@ void tc0140syt_device::device_reset()
{
DEVICE_RESET_NAME( tc0140syt )(this);
}
-
-
diff --git a/src/mame/audio/tank8.c b/src/mame/audio/tank8.c
index a64b1dd0b4b..eb49a59f431 100644
--- a/src/mame/audio/tank8.c
+++ b/src/mame/audio/tank8.c
@@ -16,27 +16,27 @@
static const discrete_lfsr_desc tank8_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 10, /* Use Bit 10 as F0 input 0 */
- 15, /* Use Bit 15 as F0 input 1 */
- DISC_LFSR_XOR, /* F0 is XOR */
- DISC_LFSR_XOR, /* F1 is F0 XOR with external feed. External feed is (address line) A2 */
- DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 1, /* Output is inverted by Q20 */
- 12 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 10, /* Use Bit 10 as F0 input 0 */
+ 15, /* Use Bit 15 as F0 input 1 */
+ DISC_LFSR_XOR, /* F0 is XOR */
+ DISC_LFSR_XOR, /* F1 is F0 XOR with external feed. External feed is (address line) A2 */
+ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 1, /* Output is inverted by Q20 */
+ 12 /* Output bit */
};
static const discrete_integrate_info tank8_op1_integrate_info =
{
DISC_INTEGRATE_OP_AMP_1,
- RES_K(27), /* R98 */
- RES_K(2.2), /* R97 */
- RES_K(47), /* R96 */
- CAP_U(0.22), /* C60 */
+ RES_K(27), /* R98 */
+ RES_K(2.2), /* R97 */
+ RES_K(47), /* R96 */
+ CAP_U(0.22), /* C60 */
5,
- 12, // B+ is 12V, not 15V shown in the schematic.
+ 12, // B+ is 12V, not 15V shown in the schematic.
0,
0,
0,
@@ -45,12 +45,12 @@ static const discrete_integrate_info tank8_op1_integrate_info =
static const discrete_integrate_info tank8_op2_integrate_info =
{
DISC_INTEGRATE_OP_AMP_1,
- RES_K(27), /* R99 */
- RES_K(2.2), /* R97 */
- RES_K(47), /* R96 */
- CAP_U(0.1), /* C59 */
+ RES_K(27), /* R99 */
+ RES_K(2.2), /* R97 */
+ RES_K(47), /* R96 */
+ CAP_U(0.1), /* C59 */
5,
- 12, // B+ is 12V, not 15V shown in the schematic.
+ 12, // B+ is 12V, not 15V shown in the schematic.
0,
0,
0,
@@ -59,27 +59,27 @@ static const discrete_integrate_info tank8_op2_integrate_info =
static const discrete_555_desc tank8_555_a =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_555_desc tank8_555_m =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC | DISC_555_TRIGGER_IS_VOLTAGE,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_op_amp_filt_info tank8_filt =
{
- RES_K(18), // R56
+ RES_K(18), // R56
0,
- RES_K(0.820), //R57
+ RES_K(0.820), //R57
0,
- RES_K(330), //R58
- CAP_U(.047), //C42
- CAP_U(.047), //C43
+ RES_K(330), //R58
+ CAP_U(.047), //C42
+ CAP_U(.047), //C43
0,
2.5,
5, /* VCC */
@@ -89,25 +89,25 @@ static const discrete_op_amp_filt_info tank8_filt =
static const discrete_dac_r1_ladder tank8_dac =
{
1,
- {RES_K(4.7)}, // R89
- 5, // 555 Vcc
- RES_K(5), // 555 internal
- RES_K(10), // 555 internal
- CAP_U(100) // C26
+ {RES_K(4.7)}, // R89
+ 5, // 555 Vcc
+ RES_K(5), // 555 internal
+ RES_K(10), // 555 internal
+ CAP_U(100) // C26
};
/* Nodes - Sounds */
-#define TANK8_MOTOR1 NODE_15
-#define TANK8_MOTOR2 NODE_16
-#define TANK8_MOTOR3 NODE_17
-#define TANK8_MOTOR4 NODE_18
-#define TANK8_MOTOR5 NODE_19
-#define TANK8_MOTOR6 NODE_20
-#define TANK8_MOTOR7 NODE_21
-#define TANK8_MOTOR8 NODE_22
-#define TANK8_CRASHEXPL NODE_23
+#define TANK8_MOTOR1 NODE_15
+#define TANK8_MOTOR2 NODE_16
+#define TANK8_MOTOR3 NODE_17
+#define TANK8_MOTOR4 NODE_18
+#define TANK8_MOTOR5 NODE_19
+#define TANK8_MOTOR6 NODE_20
+#define TANK8_MOTOR7 NODE_21
+#define TANK8_MOTOR8 NODE_22
+#define TANK8_CRASHEXPL NODE_23
#define TANK8_BUGLE NODE_24
-#define TANK8_FINAL_MIX NODE_25
+#define TANK8_FINAL_MIX NODE_25
#define TANK8_A2_LINE NODE_26
@@ -222,7 +222,7 @@ DISCRETE_SOUND_START(tank8)
/* = 15750/4 */
/************************************************/
/* The A2 address line is also mixed in to the noise generator,
- * but that is currently not implemented. */
+ * but that is currently not implemented. */
DISCRETE_CONSTANT(TANK8_A2_LINE,1)
DISCRETE_LFSR_NOISE(NODE_120, TANK8_ATTRACT_EN, TANK8_ATTRACT_EN, 15750.0/4, 1, TANK8_A2_LINE, 0, &tank8_lfsr)
@@ -248,8 +248,8 @@ DISCRETE_SOUND_START(tank8)
DISCRETE_MULTIPLY(NODE_126, NODE_120, NODE_125 )
DISCRETE_RCFILTER(NODE_127, NODE_126, RES_K(47), CAP_U(0.1))
DISCRETE_ADJUSTMENT(NODE_128,
- 1.0, // min gain of E5
- 1.0 + 100.0/22, // max gain of E5 = 1 + r132/r101
+ 1.0, // min gain of E5
+ 1.0 + 100.0/22, // max gain of E5 = 1 + r132/r101
DISC_LINADJ, "CRASH")
DISCRETE_MULTIPLY(NODE_129, NODE_127, NODE_128 )
DISCRETE_CLAMP(TANK8_CRASHEXPL, NODE_129, -(12.0 - OP_AMP_VP_RAIL_OFFSET)/2, (12.0 - OP_AMP_VP_RAIL_OFFSET)/2)
diff --git a/src/mame/audio/targ.c b/src/mame/audio/targ.c
index 216dcc165b4..e191ea4c814 100644
--- a/src/mame/audio/targ.c
+++ b/src/mame/audio/targ.c
@@ -18,8 +18,8 @@
-#define SPECTAR_MAXFREQ 525000
-#define TARG_MAXFREQ 125000
+#define SPECTAR_MAXFREQ 525000
+#define TARG_MAXFREQ 125000
static int max_freq;
@@ -34,7 +34,7 @@ static UINT8 tone_pointer;
static const INT16 sine_wave[32] =
{
- 0x0f0f, 0x0f0f, 0x0f0f, 0x0606, 0x0606, 0x0909, 0x0909, 0x0606, 0x0606, 0x0909, 0x0606, 0x0d0d, 0x0f0f, 0x0f0f, 0x0d0d, 0x0000,
+ 0x0f0f, 0x0f0f, 0x0f0f, 0x0606, 0x0606, 0x0909, 0x0909, 0x0606, 0x0606, 0x0909, 0x0606, 0x0d0d, 0x0f0f, 0x0f0f, 0x0d0d, 0x0000,
-0x191a, -0x2122, -0x1e1f, -0x191a, -0x1314, -0x191a, -0x1819, -0x1819, -0x1819, -0x1314, -0x1314, -0x1314, -0x1819, -0x1e1f, -0x1e1f, -0x1819
};
@@ -182,7 +182,7 @@ static SAMPLES_START( targ_audio_start )
static const samples_interface spectar_samples_interface =
{
- 4, /* number of channel */
+ 4, /* number of channel */
sample_names,
spectar_audio_start
};
@@ -190,7 +190,7 @@ static const samples_interface spectar_samples_interface =
static const samples_interface targ_samples_interface =
{
- 4, /* number of channel */
+ 4, /* number of channel */
sample_names,
targ_audio_start
};
diff --git a/src/mame/audio/tiamc1.c b/src/mame/audio/tiamc1.c
index 80b10bb3623..31d5b4195c1 100644
--- a/src/mame/audio/tiamc1.c
+++ b/src/mame/audio/tiamc1.c
@@ -63,10 +63,10 @@ struct tiamc1_sound_state
};
-#define T8253_CHAN0 0
-#define T8253_CHAN1 1
-#define T8253_CHAN2 2
-#define T8253_CWORD 3
+#define T8253_CHAN0 0
+#define T8253_CHAN1 1
+#define T8253_CHAN2 2
+#define T8253_CWORD 3
INLINE tiamc1_sound_state *get_safe_token(device_t *device)
@@ -333,7 +333,7 @@ const device_type TIAMC1 = &device_creator<tiamc1_sound_device>;
tiamc1_sound_device::tiamc1_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TIAMC1, "TIA-MC1 Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tiamc1_sound_state);
}
@@ -366,5 +366,3 @@ void tiamc1_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/timeplt.c b/src/mame/audio/timeplt.c
index 406b6b3fc84..7c54c76000b 100644
--- a/src/mame/audio/timeplt.c
+++ b/src/mame/audio/timeplt.c
@@ -114,9 +114,9 @@ static void filter_w( device_t *device, int data )
int C = 0;
if (data & 1)
- C += 220000; /* 220000pF = 0.220uF */
+ C += 220000; /* 220000pF = 0.220uF */
if (data & 2)
- C += 47000; /* 47000pF = 0.047uF */
+ C += 47000; /* 47000pF = 0.047uF */
filter_rc_set_RC(device, FLT_RC_LOWPASS, 1000, 5100, 0, CAP_P(C));
}
@@ -264,7 +264,7 @@ const device_type TIMEPLT_AUDIO = &device_creator<timeplt_audio_device>;
timeplt_audio_device::timeplt_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TIMEPLT_AUDIO, "Time Pilot Audio", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(timeplt_audio_state);
}
@@ -297,5 +297,3 @@ void timeplt_audio_device::sound_stream_update(sound_stream &stream, stream_samp
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/timeplt.h b/src/mame/audio/timeplt.h
index 2c6385bbe7e..7836d453c11 100644
--- a/src/mame/audio/timeplt.h
+++ b/src/mame/audio/timeplt.h
@@ -4,7 +4,7 @@ MACHINE_CONFIG_EXTERN( timeplt_sound );
MACHINE_CONFIG_EXTERN( locomotn_sound );
class timeplt_audio_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
timeplt_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -25,4 +25,3 @@ private:
};
extern const device_type TIMEPLT_AUDIO;
-
diff --git a/src/mame/audio/trackfld.c b/src/mame/audio/trackfld.c
index b475e321b19..5a58b3bd95d 100644
--- a/src/mame/audio/trackfld.c
+++ b/src/mame/audio/trackfld.c
@@ -164,7 +164,7 @@ const device_type TRACKFLD_AUDIO = &device_creator<trackfld_audio_device>;
trackfld_audio_device::trackfld_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TRACKFLD_AUDIO, "Track And Field Audio", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(trackfld_audio_state);
}
@@ -206,5 +206,3 @@ void trackfld_audio_device::sound_stream_update(sound_stream &stream, stream_sam
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/trackfld.h b/src/mame/audio/trackfld.h
index f950ec4cb2e..8455c0463b1 100644
--- a/src/mame/audio/trackfld.h
+++ b/src/mame/audio/trackfld.h
@@ -8,7 +8,7 @@ DECLARE_WRITE8_HANDLER( konami_SN76496_latch_w );
DECLARE_WRITE8_DEVICE_HANDLER( konami_SN76496_w );
class trackfld_audio_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
trackfld_audio_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
@@ -30,4 +30,3 @@ private:
};
extern const device_type TRACKFLD_AUDIO;
-
diff --git a/src/mame/audio/triplhnt.c b/src/mame/audio/triplhnt.c
index 198cb5aea2a..665d8973162 100644
--- a/src/mame/audio/triplhnt.c
+++ b/src/mame/audio/triplhnt.c
@@ -18,7 +18,7 @@ static const char *const triplhnt_sample_names[] =
const samples_interface triplhnt_samples_interface =
{
- 2, /* 2 channels */
+ 2, /* 2 channels */
triplhnt_sample_names
};
@@ -30,85 +30,85 @@ const samples_interface triplhnt_samples_interface =
static const discrete_lfsr_desc triplhnt_lfsr =
{
DISC_CLK_IS_FREQ,
- 16, /* Bit Length */
- 0, /* Reset Value */
- 0, /* Use Bit 0 as XOR input 0 */
- 14, /* Use Bit 14 as XOR input 1 */
- DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
- DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
- DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Output not inverted */
- 15 /* Output bit */
+ 16, /* Bit Length */
+ 0, /* Reset Value */
+ 0, /* Use Bit 0 as XOR input 0 */
+ 14, /* Use Bit 14 as XOR input 1 */
+ DISC_LFSR_XNOR, /* Feedback stage1 is XNOR */
+ DISC_LFSR_OR, /* Feedback stage2 is just stage 1 output OR with external feed */
+ DISC_LFSR_REPLACE, /* Feedback stage3 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Output not inverted */
+ 15 /* Output bit */
};
static const discrete_dac_r1_ladder triplhnt_bear_roar_v_dac =
{
- 4, // size of ladder
- {1000000, 470000, 220000, 2200000}, // R47, R50, R48, R51
- 5, // vBias
- 68000, // R44
- 0, // no rGnd
- 0 // no smoothing cap
+ 4, // size of ladder
+ {1000000, 470000, 220000, 2200000}, // R47, R50, R48, R51
+ 5, // vBias
+ 68000, // R44
+ 0, // no rGnd
+ 0 // no smoothing cap
};
static const discrete_dac_r1_ladder triplhnt_bear_roar_out_dac =
{
- 3, // size of ladder
- {100000, 33000, 100000}, // R56, R58, R57
- 0, // no vBias
- 0, // no rBias
- 0, // no rGnd
- 0 // no smoothing cap
+ 3, // size of ladder
+ {100000, 33000, 100000}, // R56, R58, R57
+ 0, // no vBias
+ 0, // no rBias
+ 0, // no rGnd
+ 0 // no smoothing cap
};
static const discrete_dac_r1_ladder triplhnt_shot_dac =
{
- 4, // size of ladder
- {8200, 3900, 2200, 1000}, // R53, R54, R55, R52
- 0, // no vBias
- 0, // no rBias
- 0, // no rGnd
- 0 // no smoothing cap
+ 4, // size of ladder
+ {8200, 3900, 2200, 1000}, // R53, R54, R55, R52
+ 0, // no vBias
+ 0, // no rBias
+ 0, // no rGnd
+ 0 // no smoothing cap
};
static const discrete_555_cc_desc triplhnt_bear_roar_vco =
{
DISC_555_OUT_DC | DISC_555_OUT_SQW,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.7 // Q2 junction voltage
+ 0.7 // Q2 junction voltage
};
static const discrete_schmitt_osc_desc triplhnt_screech_osc =
{
- 2200, // R84
- 330, // R85
- 1.e-6, // C59
+ 2200, // R84
+ 330, // R85
+ 1.e-6, // C59
DEFAULT_7414_VALUES,
- 1 // invert output using 7400 gate E7
+ 1 // invert output using 7400 gate E7
};
static const discrete_mixer_desc triplhnt_mixer =
{
DISC_MIXER_IS_RESISTOR,
- {3300 + 19879.5, 47000, 27000 + 545.6}, // R59 + (R56||R57||R58), R60 + (R52||R53||R54||R55), R61
- {0}, // No variable resistor nodes
- {0}, // No caps
- 0, // No rI
- 1000, // R78
- 1e-7, // C72
- 1e-7, // C44
- 0, // vBias not used for resistor network
+ {3300 + 19879.5, 47000, 27000 + 545.6}, // R59 + (R56||R57||R58), R60 + (R52||R53||R54||R55), R61
+ {0}, // No variable resistor nodes
+ {0}, // No caps
+ 0, // No rI
+ 1000, // R78
+ 1e-7, // C72
+ 1e-7, // C44
+ 0, // vBias not used for resistor network
245000
};
/* Nodes - Sounds */
-#define TRIPLHNT_NOISE NODE_10
-#define TRIPLHNT_BEAR_ROAR_SND NODE_11
-#define TRIPLHNT_SHOT_SND NODE_12
-#define TRIPLHNT_SCREECH_SND NODE_13
-#define POOLSHRK_SCORE_SND NODE_14
+#define TRIPLHNT_NOISE NODE_10
+#define TRIPLHNT_BEAR_ROAR_SND NODE_11
+#define TRIPLHNT_SHOT_SND NODE_12
+#define TRIPLHNT_SCREECH_SND NODE_13
+#define POOLSHRK_SCORE_SND NODE_14
DISCRETE_SOUND_START(triplhnt)
/************************************************/
@@ -122,39 +122,39 @@ DISCRETE_SOUND_START(triplhnt)
DISCRETE_INPUT_NOT (TRIPLHNT_LAMP_EN)
/************************************************/
- DISCRETE_LFSR_NOISE(TRIPLHNT_NOISE, // Output A7 pin 13
- TRIPLHNT_LAMP_EN, TRIPLHNT_LAMP_EN, // From gate A8 pin 10
- 12096000.0/2/256, // 256H signal
+ DISCRETE_LFSR_NOISE(TRIPLHNT_NOISE, // Output A7 pin 13
+ TRIPLHNT_LAMP_EN, TRIPLHNT_LAMP_EN, // From gate A8 pin 10
+ 12096000.0/2/256, // 256H signal
DEFAULT_TTL_V_LOGIC_1, 0, DEFAULT_TTL_V_LOGIC_1/2, &triplhnt_lfsr)
/************************************************/
/* Bear Roar is a VCO with noise mixed in. */
/************************************************/
DISCRETE_ADJUSTMENT(NODE_20,
- 10000, // R86 + R88 @ 0
- 260000, // R86 + R88 @ max
+ 10000, // R86 + R88 @ 0
+ 260000, // R86 + R88 @ max
DISC_LOGADJ, "BEAR")
- DISCRETE_DAC_R1(NODE_21, // base of Q2
- TRIPLHNT_BEAR_ROAR_DATA, // IC B10, Q0-Q3
- DEFAULT_TTL_V_LOGIC_1, // TTL ON level
+ DISCRETE_DAC_R1(NODE_21, // base of Q2
+ TRIPLHNT_BEAR_ROAR_DATA, // IC B10, Q0-Q3
+ DEFAULT_TTL_V_LOGIC_1, // TTL ON level
&triplhnt_bear_roar_v_dac)
- DISCRETE_555_CC(NODE_22, 1, // IC C11 pin 3, always enabled
- NODE_21, // vIn
- NODE_20, // current adjust
- 1.e-8, // C58
- 0, 390000, 0, // no rBias, R87, no rDis
+ DISCRETE_555_CC(NODE_22, 1, // IC C11 pin 3, always enabled
+ NODE_21, // vIn
+ NODE_20, // current adjust
+ 1.e-8, // C58
+ 0, 390000, 0, // no rBias, R87, no rDis
&triplhnt_bear_roar_vco)
- DISCRETE_COUNTER(NODE_23, 1, TRIPLHNT_BEAR_EN, // IC B6, QB-QD
- NODE_22, // from IC C11, pin 3
- 0, 5, 1, 0, DISC_CLK_ON_R_EDGE) // /6 counter on rising edge
- DISCRETE_TRANSFORM2(NODE_24, NODE_23, 2, "01>") // IC B6, pin 8
- DISCRETE_LOGIC_INVERT(NODE_25, NODE_22) // IC D9, pin 3
- DISCRETE_LOGIC_NAND(NODE_26, NODE_25, TRIPLHNT_NOISE) // IC D9, pin 11
- DISCRETE_LOGIC_XOR(NODE_27, NODE_24, NODE_26) // IC B8, pin 6
- DISCRETE_COUNTER(NODE_28, 1, TRIPLHNT_BEAR_EN, // IC B6, pin 12
- NODE_27, // from IC B8, pin 6
- 0, 1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
- DISCRETE_TRANSFORM5(NODE_29, NODE_24, NODE_28, NODE_26, 2, 4, "13*24*+0+") // Mix the mess together in binary
+ DISCRETE_COUNTER(NODE_23, 1, TRIPLHNT_BEAR_EN, // IC B6, QB-QD
+ NODE_22, // from IC C11, pin 3
+ 0, 5, 1, 0, DISC_CLK_ON_R_EDGE) // /6 counter on rising edge
+ DISCRETE_TRANSFORM2(NODE_24, NODE_23, 2, "01>") // IC B6, pin 8
+ DISCRETE_LOGIC_INVERT(NODE_25, NODE_22) // IC D9, pin 3
+ DISCRETE_LOGIC_NAND(NODE_26, NODE_25, TRIPLHNT_NOISE) // IC D9, pin 11
+ DISCRETE_LOGIC_XOR(NODE_27, NODE_24, NODE_26) // IC B8, pin 6
+ DISCRETE_COUNTER(NODE_28, 1, TRIPLHNT_BEAR_EN, // IC B6, pin 12
+ NODE_27, // from IC B8, pin 6
+ 0, 1, 1, 0, DISC_CLK_ON_R_EDGE) // /2 counter on rising edge
+ DISCRETE_TRANSFORM5(NODE_29, NODE_24, NODE_28, NODE_26, 2, 4, "13*24*+0+") // Mix the mess together in binary
DISCRETE_DAC_R1(TRIPLHNT_BEAR_ROAR_SND, NODE_29,
DEFAULT_TTL_V_LOGIC_1,
&triplhnt_bear_roar_out_dac)
@@ -163,8 +163,8 @@ DISCRETE_SOUND_START(triplhnt)
/* Shot is just the noise amplitude modulated */
/* by an R1 DAC. */
/************************************************/
- DISCRETE_SWITCH(NODE_40, 1, // Gate A9, pins 6, 8, 11, 3
- TRIPLHNT_NOISE, // noise enables the data which is then inverted
+ DISCRETE_SWITCH(NODE_40, 1, // Gate A9, pins 6, 8, 11, 3
+ TRIPLHNT_NOISE, // noise enables the data which is then inverted
1, TRIPLHNT_SHOT_DATA)
DISCRETE_DAC_R1(TRIPLHNT_SHOT_SND,
NODE_40,
diff --git a/src/mame/audio/turbo.c b/src/mame/audio/turbo.c
index 7a40f1dc302..c7a02dfe105 100644
--- a/src/mame/audio/turbo.c
+++ b/src/mame/audio/turbo.c
@@ -171,15 +171,15 @@ WRITE8_MEMBER(turbo_state::turbo_sound_c_w)
static const char *const turbo_sample_names[] =
{
"*turbo",
- "01", /* 0: Trig1 */
- "02", /* 1: Trig2 */
- "03", /* 2: Trig3 */
- "04", /* 3: Trig4 */
- "05", /* 4: Screech */
- "06", /* 5: Crash */
- "skidding", /* 6: Spin */
- "idle", /* 7: Idle */
- "ambulanc", /* 8: Ambulance */
+ "01", /* 0: Trig1 */
+ "02", /* 1: Trig2 */
+ "03", /* 2: Trig3 */
+ "04", /* 3: Trig4 */
+ "05", /* 4: Screech */
+ "06", /* 5: Crash */
+ "skidding", /* 6: Spin */
+ "idle", /* 7: Idle */
+ "ambulanc", /* 8: Ambulance */
0
};
@@ -194,10 +194,10 @@ static const samples_interface turbo_samples_interface =
MACHINE_CONFIG_FRAGMENT( turbo_samples )
/* this is the cockpit speaker configuration */
- MCFG_SPEAKER_ADD("fspeaker", 0.0, 0.0, 1.0) /* front */
- MCFG_SPEAKER_ADD("bspeaker", 0.0, 0.0, -0.5) /* back */
- MCFG_SPEAKER_ADD("lspeaker", -0.2, 0.0, 1.0) /* left */
- MCFG_SPEAKER_ADD("rspeaker", 0.2, 0.0, 1.0) /* right */
+ MCFG_SPEAKER_ADD("fspeaker", 0.0, 0.0, 1.0) /* front */
+ MCFG_SPEAKER_ADD("bspeaker", 0.0, 0.0, -0.5) /* back */
+ MCFG_SPEAKER_ADD("lspeaker", -0.2, 0.0, 1.0) /* left */
+ MCFG_SPEAKER_ADD("rspeaker", 0.2, 0.0, 1.0) /* right */
MCFG_SAMPLES_ADD("samples", turbo_samples_interface)
@@ -575,17 +575,17 @@ WRITE8_MEMBER(turbo_state::buckrog_sound_b_w)
static const char *const buckrog_sample_names[]=
{
"*buckrog",
- "alarm0", /* 0 */
- "alarm1", /* 1 */
- "alarm2", /* 2 */
- "alarm3", /* 3 */
- "exp", /* 4 */
- "fire", /* 5 */
- "rebound", /* 6 */
- "hit", /* 7 */
- "shipsnd1", /* 8 */
- "shipsnd2", /* 9 */
- "shipsnd3", /* 10 */
+ "alarm0", /* 0 */
+ "alarm1", /* 1 */
+ "alarm2", /* 2 */
+ "alarm3", /* 3 */
+ "exp", /* 4 */
+ "fire", /* 5 */
+ "rebound", /* 6 */
+ "hit", /* 7 */
+ "shipsnd1", /* 8 */
+ "shipsnd2", /* 9 */
+ "shipsnd3", /* 10 */
0
};
@@ -614,26 +614,26 @@ MACHINE_CONFIG_END
#if (DISCRETE_TEST)
/* Nodes - Inputs */
-#define TURBO_CRASH_EN NODE_01
-#define TURBO_TRIG1_INV NODE_02
-#define TURBO_TRIG2_INV NODE_03
-#define TURBO_TRIG3_INV NODE_04
-#define TURBO_TRIG4_INV NODE_05
-#define TURBO_SLIP_EN NODE_06
-#define TURBO_CRASHL_EN NODE_07
-#define TURBO_ACC_VAL NODE_08
-#define TURBO_AMBU_EN NODE_09
-#define TURBO_SPIN_EN NODE_10
-#define TURBO_OSEL_VAL NODE_11
-#define TURBO_BSEL_VAL NODE_12
+#define TURBO_CRASH_EN NODE_01
+#define TURBO_TRIG1_INV NODE_02
+#define TURBO_TRIG2_INV NODE_03
+#define TURBO_TRIG3_INV NODE_04
+#define TURBO_TRIG4_INV NODE_05
+#define TURBO_SLIP_EN NODE_06
+#define TURBO_CRASHL_EN NODE_07
+#define TURBO_ACC_VAL NODE_08
+#define TURBO_AMBU_EN NODE_09
+#define TURBO_SPIN_EN NODE_10
+#define TURBO_OSEL_VAL NODE_11
+#define TURBO_BSEL_VAL NODE_12
/* Nodes - Sounds */
-#define FIRETRUCK_NOISE NODE_20
+#define FIRETRUCK_NOISE NODE_20
static const discrete_555_desc turbo_alarm_555 =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 5, // B+ voltage of 555
+ 5, // B+ voltage of 555
DEFAULT_555_VALUES,
};
@@ -642,18 +642,18 @@ DISCRETE_SOUND_START(turbo)
/* Input register mapping for turbo */
/************************************************/
/* NODE ADDR MASK GAIN OFFSET INIT */
- DISCRETE_INPUT(TURBO_CRASH_EN ,0x00,0x001f, 0.0)
- DISCRETE_INPUT(TURBO_TRIG1_INV ,0x01,0x001f, 1.0)
- DISCRETE_INPUT(TURBO_TRIG2_INV ,0x02,0x001f, 1.0)
- DISCRETE_INPUT(TURBO_TRIG3_INV ,0x03,0x001f, 1.0)
- DISCRETE_INPUT(TURBO_TRIG4_INV ,0x04,0x001f, 1.0)
- DISCRETE_INPUT(TURBO_SLIP_EN ,0x05,0x001f, 0.0)
- DISCRETE_INPUT(TURBO_CRASHL_EN ,0x06,0x001f, 0.0)
- DISCRETE_INPUT(TURBO_ACC_VAL ,0x07,0x001f, 0.0)
- DISCRETE_INPUT(TURBO_AMBU_EN ,0x08,0x001f, 0.0)
- DISCRETE_INPUT(TURBO_SPIN_EN ,0x09,0x001f, 0.0)
- DISCRETE_INPUT(TURBO_OSEL_VAL ,0x0a,0x001f, 0.0)
- DISCRETE_INPUT(TURBO_BSEL_VAL ,0x0b,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_CRASH_EN ,0x00,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_TRIG1_INV ,0x01,0x001f, 1.0)
+ DISCRETE_INPUT(TURBO_TRIG2_INV ,0x02,0x001f, 1.0)
+ DISCRETE_INPUT(TURBO_TRIG3_INV ,0x03,0x001f, 1.0)
+ DISCRETE_INPUT(TURBO_TRIG4_INV ,0x04,0x001f, 1.0)
+ DISCRETE_INPUT(TURBO_SLIP_EN ,0x05,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_CRASHL_EN ,0x06,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_ACC_VAL ,0x07,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_AMBU_EN ,0x08,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_SPIN_EN ,0x09,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_OSEL_VAL ,0x0a,0x001f, 0.0)
+ DISCRETE_INPUT(TURBO_BSEL_VAL ,0x0b,0x001f, 0.0)
/************************************************/
/* Alarm sounds */
diff --git a/src/mame/audio/tx1.c b/src/mame/audio/tx1.c
index 97e11229a36..170a1f23a5e 100644
--- a/src/mame/audio/tx1.c
+++ b/src/mame/audio/tx1.c
@@ -120,16 +120,16 @@ READ8_DEVICE_HANDLER( tx1_pit8253_r )
*************************************/
/* RC oscillator: 1785Hz */
-#define TX1_NOISE_CLOCK (1/(1000.0e-12 * 560000.0))
-#define TX1_PIT_CLOCK (TX1_PIXEL_CLOCK / 16)
-#define TX1_FRAC 30
+#define TX1_NOISE_CLOCK (1/(1000.0e-12 * 560000.0))
+#define TX1_PIT_CLOCK (TX1_PIXEL_CLOCK / 16)
+#define TX1_FRAC 30
-#define TX1_SHUNT (250.0)
-#define TX1_R0 (180000.0 + TX1_SHUNT)
-#define TX1_R1 (56000.0 + TX1_SHUNT)
-#define TX1_R2 (22000.0 + TX1_SHUNT)
-#define TX1_R (100000.0 + TX1_SHUNT)
-#define TX1_RI (180000.0)
+#define TX1_SHUNT (250.0)
+#define TX1_R0 (180000.0 + TX1_SHUNT)
+#define TX1_R1 (56000.0 + TX1_SHUNT)
+#define TX1_R2 (22000.0 + TX1_SHUNT)
+#define TX1_R (100000.0 + TX1_SHUNT)
+#define TX1_RI (180000.0)
static const double tx1_engine_gains[16] =
{
@@ -306,7 +306,7 @@ static DEVICE_START( tx1_sound )
state->m_freq_to_step = (double)(1 << TX1_FRAC) / (double)machine.sample_rate();
/* Compute the engine resistor weights */
- compute_resistor_weights(0, 10000, -1.0,
+ compute_resistor_weights(0, 10000, -1.0,
4, &r0[0], state->m_weights0, 0, 0,
3, &r1[0], state->m_weights1, 0, 0,
3, &r2[0], state->m_weights2, 0, 0);
@@ -325,19 +325,19 @@ static DEVICE_RESET( tx1_sound )
*
*************************************/
-#define BUGGYBOY_PIT_CLOCK (BUGGYBOY_ZCLK / 8)
-#define BUGGYBOY_NOISE_CLOCK (BUGGYBOY_PIT_CLOCK / 4)
+#define BUGGYBOY_PIT_CLOCK (BUGGYBOY_ZCLK / 8)
+#define BUGGYBOY_NOISE_CLOCK (BUGGYBOY_PIT_CLOCK / 4)
-#define BUGGYBOY_R1 47000.0
-#define BUGGYBOY_R2 22000.0
-#define BUGGYBOY_R3 10000.0
-#define BUGGYBOY_R4 5600.0
-#define BUGGYBOY_SHUNT 250.0
+#define BUGGYBOY_R1 47000.0
+#define BUGGYBOY_R2 22000.0
+#define BUGGYBOY_R3 10000.0
+#define BUGGYBOY_R4 5600.0
+#define BUGGYBOY_SHUNT 250.0
-#define BUGGYBOY_R1S (1.0/(1.0/BUGGYBOY_R1 + 1.0/BUGGYBOY_SHUNT))
-#define BUGGYBOY_R2S (1.0/(1.0/BUGGYBOY_R2 + 1.0/BUGGYBOY_SHUNT))
-#define BUGGYBOY_R3S (1.0/(1.0/BUGGYBOY_R3 + 1.0/BUGGYBOY_SHUNT))
-#define BUGGYBOY_R4S (1.0/(1.0/BUGGYBOY_R4 + 1.0/BUGGYBOY_SHUNT))
+#define BUGGYBOY_R1S (1.0/(1.0/BUGGYBOY_R1 + 1.0/BUGGYBOY_SHUNT))
+#define BUGGYBOY_R2S (1.0/(1.0/BUGGYBOY_R2 + 1.0/BUGGYBOY_SHUNT))
+#define BUGGYBOY_R3S (1.0/(1.0/BUGGYBOY_R3 + 1.0/BUGGYBOY_SHUNT))
+#define BUGGYBOY_R4S (1.0/(1.0/BUGGYBOY_R4 + 1.0/BUGGYBOY_SHUNT))
static const double bb_engine_gains[16] =
{
@@ -432,10 +432,10 @@ WRITE8_DEVICE_HANDLER( bb_ym2_b_w )
}
/*
- Until we support > 2 speakers, double the gain of the front speakers
+ Until we support > 2 speakers, double the gain of the front speakers
- TODO: We do support more than 2 speakers but the output is downmixed to stereo.
- */
+ TODO: We do support more than 2 speakers but the output is downmixed to stereo.
+ */
/* Rear left speaker */
device_sound_interface *sound;
@@ -546,8 +546,8 @@ static DEVICE_START( buggyboy_sound )
0x0, 0x1, 0xe, 0xf, 0x8, 0x9, 0x6, 0x7, 0xc, 0xd, 0xe, 0xf, 0x4, 0x5, 0x6, 0x7
};
- compute_resistor_weights(0, 16384, -1.0,
- 4, &resistors[0], aweights, 0, 0,
+ compute_resistor_weights(0, 16384, -1.0,
+ 4, &resistors[0], aweights, 0, 0,
0, 0, 0, 0, 0,
0, 0, 0, 0, 0 );
@@ -622,14 +622,14 @@ const device_type TX1 = &device_creator<tx1_sound_device>;
tx1_sound_device::tx1_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, TX1, "TX-1 Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tx1_sound_state);
}
tx1_sound_device::tx1_sound_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, type, name, tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(tx1_sound_state);
}
@@ -670,5 +670,3 @@ void tx1_sound_device::sound_stream_update(sound_stream &stream, stream_sample_t
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/vicdual.c b/src/mame/audio/vicdual.c
index 196046e8fba..f5f7a4a8542 100644
--- a/src/mame/audio/vicdual.c
+++ b/src/mame/audio/vicdual.c
@@ -19,36 +19,36 @@ static emu_timer *frogs_croak_timer;
/* Discrete Sound Input Nodes */
-#define FROGS_FLY_EN NODE_01
-#define FROGS_JUMP_EN NODE_03
-#define FROGS_HOP_EN NODE_04
-#define FROGS_TONGUE_EN NODE_05
-#define FROGS_CAPTURE_EN NODE_06
-#define FROGS_SPLASH_EN NODE_08
+#define FROGS_FLY_EN NODE_01
+#define FROGS_JUMP_EN NODE_03
+#define FROGS_HOP_EN NODE_04
+#define FROGS_TONGUE_EN NODE_05
+#define FROGS_CAPTURE_EN NODE_06
+#define FROGS_SPLASH_EN NODE_08
/* Nodes - Sounds */
-#define FROGS_BUZZZ_SND NODE_11
-#define FROGS_BOING_SND NODE_13
-#define FROGS_HOP_SND NODE_14
-#define FROGS_ZIP_SND NODE_15
-#define FROGS_CROAK_SND NODE_16
-#define FROGS_SPLASH_SND NODE_18
+#define FROGS_BUZZZ_SND NODE_11
+#define FROGS_BOING_SND NODE_13
+#define FROGS_HOP_SND NODE_14
+#define FROGS_ZIP_SND NODE_15
+#define FROGS_CROAK_SND NODE_16
+#define FROGS_SPLASH_SND NODE_18
/* VRs */
-#define FROGS_R93 NODE_25
+#define FROGS_R93 NODE_25
static const discrete_555_desc frogsZip555m =
{
DISC_555_OUT_CAP | DISC_555_OUT_DC | DISC_555_TRIGGER_IS_LOGIC,
- 12, // B+ voltage of 555
+ 12, // B+ voltage of 555
DEFAULT_555_VALUES
};
static const discrete_555_cc_desc frogsZip555cc =
{
DISC_555_OUT_CAP | DISC_555_OUT_DC,
- 12, // B+ voltage of 555
+ 12, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.6 // Q13 Vbe
+ 0.6 // Q13 Vbe
};
static const discrete_mixer_desc frogsMixer =
@@ -62,10 +62,10 @@ static const discrete_mixer_desc frogsMixer =
static DISCRETE_SOUND_START(frogs)
/************************************************
- * Input register mapping for frogs
- *
- * All inputs are inverted by initial transistor.
- ************************************************/
+ * Input register mapping for frogs
+ *
+ * All inputs are inverted by initial transistor.
+ ************************************************/
DISCRETE_INPUT_LOGIC(FROGS_FLY_EN)
DISCRETE_INPUT_NOT(FROGS_JUMP_EN)
DISCRETE_INPUT_NOT(FROGS_HOP_EN)
@@ -78,18 +78,18 @@ static DISCRETE_SOUND_START(frogs)
DISCRETE_555_MSTABLE(NODE_30, 1, FROGS_TONGUE_EN, RES_K(100), CAP_U(1), &frogsZip555m)
/* Q11 & Q12 transform the voltage from the oneshot U4, to what is
- * needed by the 555CC circuit. Vin to R29 must be > 1V for things
- * to change. <=1 then The Vout of this circuit is 12V.
- * The Current through R28 equals current through R51. iR28 = iR51
- * So when Vin>.5, iR51 = (Vin-.5)/39k. =0 when Vin<=.5
- * So the voltage drop across R28 is vR28 = iR51 * 22k.
- * Finally the Vout = 12 - vR28.
- * Note this formula only works when Vin < 39/(22+39)*12V+1.
- * Which it always is, due to the 555 clamping to 12V*2/3.
- * The Zip effect is hard to emulate 100% due to loading effects
- * of the output stage on the charge stage. So I added some values
- * to get a similar waveshape to the breadboarded circuit.
- */
+ * needed by the 555CC circuit. Vin to R29 must be > 1V for things
+ * to change. <=1 then The Vout of this circuit is 12V.
+ * The Current through R28 equals current through R51. iR28 = iR51
+ * So when Vin>.5, iR51 = (Vin-.5)/39k. =0 when Vin<=.5
+ * So the voltage drop across R28 is vR28 = iR51 * 22k.
+ * Finally the Vout = 12 - vR28.
+ * Note this formula only works when Vin < 39/(22+39)*12V+1.
+ * Which it always is, due to the 555 clamping to 12V*2/3.
+ * The Zip effect is hard to emulate 100% due to loading effects
+ * of the output stage on the charge stage. So I added some values
+ * to get a similar waveshape to the breadboarded circuit.
+ */
DISCRETE_TRANSFORM5(NODE_31, 12, NODE_30, .5, RES_K(22)/RES_K(39), 0, "012-P4>*3*-")
DISCRETE_555_CC(NODE_32, 1, NODE_31, RES_K(1.1), CAP_U(0.14), 0, RES_K(100), 500, &frogsZip555cc)
@@ -114,7 +114,7 @@ static const char *const frogs_sample_names[] =
static const samples_interface frogs_samples_interface =
{
- 5, /* 5 channels */
+ 5, /* 5 channels */
frogs_sample_names
};
@@ -161,11 +161,11 @@ WRITE8_HANDLER( frogs_audio_w )
// discrete_sound_w(discrete, space, FROGS_SPLASH_EN, data & 0x80);
if (data & 0x01)
- samples->start(3, 3); // Hop
+ samples->start(3, 3); // Hop
if (data & 0x02)
- samples->start(0, 0); // Boing
+ samples->start(0, 0); // Boing
if (new_croak)
- samples->start(2, 2); // Croak
+ samples->start(2, 2); // Croak
else
{
if (last_croak)
@@ -177,23 +177,23 @@ WRITE8_HANDLER( frogs_audio_w )
if (new_buzzz)
{
/* The Buzzz sound starts off a little louder in volume then
- * settles down to a steady buzzz. Whenever the trigger goes
- * low, the sound is disabled. If it then goes high, the buzzz
- * then starts off louder again. The games does this every time
- * the fly moves.
- * So I made the sample start with the louder effect and then play
- * for 12 seconds. A fly should move before this. If not the
- * sample loops, adding the loud part as if the fly moved.
- * This is obviously incorrect, but a fly never stands still for
- * 12 seconds.
- */
+ * settles down to a steady buzzz. Whenever the trigger goes
+ * low, the sound is disabled. If it then goes high, the buzzz
+ * then starts off louder again. The games does this every time
+ * the fly moves.
+ * So I made the sample start with the louder effect and then play
+ * for 12 seconds. A fly should move before this. If not the
+ * sample loops, adding the loud part as if the fly moved.
+ * This is obviously incorrect, but a fly never stands still for
+ * 12 seconds.
+ */
if (!last_buzzz)
- samples->start(1, 1, true); // Buzzz
+ samples->start(1, 1, true); // Buzzz
}
else
samples->stop(1);
if (data & 0x80)
- samples->start(4, 4); // Splash
+ samples->start(4, 4); // Splash
last_croak = new_croak;
last_buzzz = new_buzzz;
@@ -206,31 +206,31 @@ WRITE8_HANDLER( frogs_audio_w )
* July 2007, couriersud
************************************************************************/
-#define HEADON_HISPEED_CC_EN NODE_01
-#define HEADON_HISPEED_PC_EN NODE_02
-#define HEADON_CAR_ON_EN NODE_03
-#define HEADON_CRASH_EN NODE_04
-#define HEADON_SCREECH1_EN NODE_05
-#define HEADON_SCREECH2_EN NODE_06
-#define HEADON_BONUS_EN NODE_07
+#define HEADON_HISPEED_CC_EN NODE_01
+#define HEADON_HISPEED_PC_EN NODE_02
+#define HEADON_CAR_ON_EN NODE_03
+#define HEADON_CRASH_EN NODE_04
+#define HEADON_SCREECH1_EN NODE_05
+#define HEADON_SCREECH2_EN NODE_06
+#define HEADON_BONUS_EN NODE_07
-#define HEADON_COMP_CAR_OUT NODE_200
-#define HEADON_PLAYER_CAR_OUT NODE_201
-#define HEADON_CRASH_OUT NODE_202
-#define HEADON_SCREECH1_OUT NODE_203
-#define HEADON_SCREECH2_OUT NODE_204
-#define HEADON_BONUS_OUT NODE_205
+#define HEADON_COMP_CAR_OUT NODE_200
+#define HEADON_PLAYER_CAR_OUT NODE_201
+#define HEADON_CRASH_OUT NODE_202
+#define HEADON_SCREECH1_OUT NODE_203
+#define HEADON_SCREECH2_OUT NODE_204
+#define HEADON_BONUS_OUT NODE_205
static const discrete_mixer_desc headon_mixer =
{
DISC_MIXER_IS_RESISTOR,
{RES_K(130), RES_K(130), RES_K(100), RES_K(100), RES_K(100), RES_K(10)}, // 130 = 390/3, Bonus Res is dummy
- {0,0,0,0,0}, // no variable resistors
+ {0,0,0,0,0}, // no variable resistors
{0,0,0,0,CAP_N(470),0},
0, RES_K(100),
0,
- CAP_U(1), // not in schematics, used to suppress DC
+ CAP_U(1), // not in schematics, used to suppress DC
0, 1
};
@@ -238,11 +238,11 @@ static const discrete_mixer_desc headon_crash_mixer =
{
DISC_MIXER_IS_OP_AMP,
{RES_K(50), RES_K(10)}, // Resistors, in fact variable resistors (100k)
- {0,0,0,0,0}, // no variable resistors
+ {0,0,0,0,0}, // no variable resistors
{CAP_N(100),CAP_U(1)},
0, RES_K(100),
0,
- CAP_U(1)*0, // not in schematics, used to suppress DC
+ CAP_U(1)*0, // not in schematics, used to suppress DC
0, 1
};
@@ -277,9 +277,9 @@ static const discrete_555_desc headon_555_crash =
static const discrete_555_cc_desc headon_555cc =
{
DISC_555_OUT_SQW | DISC_555_OUT_DC,
- 12, // B+ voltage of 555
+ 12, // B+ voltage of 555
DEFAULT_555_VALUES,
- 0.6 // Q16, Q10 Vbe
+ 0.6 // Q16, Q10 Vbe
};
@@ -304,16 +304,16 @@ static const discrete_555_cc_desc headon_555cc =
static const discrete_lfsr_desc mm5837_lfsr =
{
DISC_CLK_IS_FREQ,
- 17, /* Bit Length */
- 0, /* Reset Value */
- 13, /* Use Bit 14 as F0 input 0 */
- 16, /* Use Bit 17 as F0 input 1 */
- DISC_LFSR_XOR, /* F0 is XOR */
- DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
- DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
- 0x000001, /* Everything is shifted into the first bit only */
- 0, /* Flags */
- 16 /* Output bit */
+ 17, /* Bit Length */
+ 0, /* Reset Value */
+ 13, /* Use Bit 14 as F0 input 0 */
+ 16, /* Use Bit 17 as F0 input 1 */
+ DISC_LFSR_XOR, /* F0 is XOR */
+ DISC_LFSR_NOT_IN0, /* F1 is inverted F0*/
+ DISC_LFSR_REPLACE, /* F2 replaces the shifted register contents */
+ 0x000001, /* Everything is shifted into the first bit only */
+ 0, /* Flags */
+ 16 /* Output bit */
};
static const discrete_op_amp_filt_info headon_sallen_key_info =
@@ -324,9 +324,9 @@ static const discrete_op_amp_filt_info headon_sallen_key_info =
static DISCRETE_SOUND_START(headon)
/************************************************
- * Input register mapping for headon
- *
- ************************************************/
+ * Input register mapping for headon
+ *
+ ************************************************/
DISCRETE_INPUT_LOGIC(HEADON_HISPEED_CC_EN)
DISCRETE_INPUT_LOGIC(HEADON_HISPEED_PC_EN)
DISCRETE_INPUT_LOGIC(HEADON_CAR_ON_EN)
@@ -336,88 +336,88 @@ static DISCRETE_SOUND_START(headon)
DISCRETE_INPUT_LOGIC(HEADON_BONUS_EN)
/************************************************
- * CAR Sound generation Player Car
- * The ramp values are taken from a
- * SWITCHER CAD III simulation of the
- * respective circuit. Using ramps may not be
- * 100% accurate but comes very close.
- ************************************************/
+ * CAR Sound generation Player Car
+ * The ramp values are taken from a
+ * SWITCHER CAD III simulation of the
+ * respective circuit. Using ramps may not be
+ * 100% accurate but comes very close.
+ ************************************************/
DISCRETE_RAMP(NODE_20, 1, HEADON_CAR_ON_EN, (12-10.8)/7, 12, 10.8, 12)
DISCRETE_RAMP(NODE_21, 1, HEADON_HISPEED_PC_EN, 2.0 / 0.8, 0, -2, 0)
DISCRETE_ADDER2(NODE_22, 1, NODE_20, NODE_21)
-#define HO_R56 RES_K(10)
-#define HO_R72 RES_K(1)
-#define HO_C31 CAP_N(100)
+#define HO_R56 RES_K(10)
+#define HO_R72 RES_K(1)
+#define HO_C31 CAP_N(100)
DISCRETE_555_CC(NODE_25, HEADON_CAR_ON_EN, NODE_22, HO_R56, HO_C31, 0, 0, HO_R72, &headon_555cc)
- DISCRETE_COUNTER(NODE_26, 1, 0, NODE_25, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
- DISCRETE_COUNTER(NODE_27, 1, 0, NODE_25, 0, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
- DISCRETE_COUNTER(NODE_28, 1, 0, NODE_25, 0, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
+ DISCRETE_COUNTER(NODE_26, 1, 0, NODE_25, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
+ DISCRETE_COUNTER(NODE_27, 1, 0, NODE_25, 0, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
+ DISCRETE_COUNTER(NODE_28, 1, 0, NODE_25, 0, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
DISCRETE_TRANSFORM5(NODE_29,NODE_26,NODE_27,NODE_28,1,2,"13>24=+0+")
DISCRETE_MULTIPLY(HEADON_PLAYER_CAR_OUT, NODE_29, 12 / 3)
/************************************************
- * CAR Sound generation Computer Car
- ************************************************/
+ * CAR Sound generation Computer Car
+ ************************************************/
DISCRETE_RAMP(NODE_30, 1, HEADON_CAR_ON_EN, (12-10.8)/7, 12, 10.8, 12)
DISCRETE_RAMP(NODE_31, 1, HEADON_HISPEED_CC_EN, 2.0 / 0.8, 0, -2, 0)
DISCRETE_ADDER2(NODE_32, 1, NODE_30, NODE_31)
-#define HO_R43 RES_K(10)
-#define HO_R35 RES_K(1)
-#define HO_C20 CAP_N(100)
+#define HO_R43 RES_K(10)
+#define HO_R35 RES_K(1)
+#define HO_C20 CAP_N(100)
DISCRETE_555_CC(NODE_35, HEADON_CAR_ON_EN, NODE_32, HO_R43, HO_C20, 0, 0, HO_R35, &headon_555cc)
- DISCRETE_COUNTER(NODE_36, 1, 0, NODE_35, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
- DISCRETE_COUNTER(NODE_37, 1, 0, NODE_35, 0, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
- DISCRETE_COUNTER(NODE_38, 1, 0, NODE_35, 0, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
+ DISCRETE_COUNTER(NODE_36, 1, 0, NODE_35, 0, 1, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 2
+ DISCRETE_COUNTER(NODE_37, 1, 0, NODE_35, 0, 3, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 4
+ DISCRETE_COUNTER(NODE_38, 1, 0, NODE_35, 0, 2, DISC_COUNT_UP, 0, DISC_CLK_ON_R_EDGE) //divide by 3
DISCRETE_TRANSFORM5(NODE_39,NODE_36,NODE_37,NODE_38,1,2,"13>24=+0+")
DISCRETE_MULTIPLY(HEADON_COMP_CAR_OUT, NODE_39, 12 / 3)
/************************************************
- * Screech #1
- ************************************************/
+ * Screech #1
+ ************************************************/
DISCRETE_MULTIPLY(NODE_50,HEADON_SCREECH1_EN,12)
DISCRETE_LFSR_NOISE(NODE_51, 1, 1, MM5837_CLOCK_12V, 12.0, 0, 6.0, &mm5837_lfsr)
DISCRETE_INVERTER_OSC(HEADON_SCREECH1_OUT,NODE_50,NODE_51,RES_K(10),RES_K(100),CAP_N(47),RES_K(10),&headon_inverter_osc_1)
/************************************************
- * Screech #2
- ************************************************/
+ * Screech #2
+ ************************************************/
DISCRETE_MULTIPLY(NODE_60,HEADON_SCREECH2_EN,12)
DISCRETE_INVERTER_OSC(HEADON_SCREECH2_OUT,NODE_60,NODE_51,RES_K(10),RES_K(100),CAP_N(57),RES_K(10),&headon_inverter_osc_1)
/************************************************
- * Bonus
- ************************************************/
+ * Bonus
+ ************************************************/
DISCRETE_LOGIC_INVERT(NODE_70, HEADON_BONUS_EN)
DISCRETE_MULTIPLY(NODE_71,NODE_70,12)
DISCRETE_INVERTER_OSC(NODE_73,NODE_71,0,RES_K(22),RES_M(1),CAP_N(470),RES_M(10),&headon_inverter_osc_2)
/* FIXME: the following is a bit of a hack
- * The NE555 is operating at a frequency of 400Hz
- * The output of the oscillator is connectred through a 150K resistor to
- * the discharge pin.
- * The simulation gives a frequency of roughly 600Hz if the osc output is high.
- * This is equivalent to R1 being 47k || 150k = 35K
- * The simulation gives a frequency of roughly 375Hz if the osc output is low.
- * This is not emulated exactly. We will just use 200k for R1.
- *
- */
+ * The NE555 is operating at a frequency of 400Hz
+ * The output of the oscillator is connectred through a 150K resistor to
+ * the discharge pin.
+ * The simulation gives a frequency of roughly 600Hz if the osc output is high.
+ * This is equivalent to R1 being 47k || 150k = 35K
+ * The simulation gives a frequency of roughly 375Hz if the osc output is low.
+ * This is not emulated exactly. We will just use 200k for R1.
+ *
+ */
DISCRETE_TRANSFORM3(NODE_74,NODE_73,200000,165000,"102*-")
DISCRETE_555_ASTABLE(NODE_75, 1, NODE_74, RES_K(100), CAP_N(10), &headon_555_bonus)
DISCRETE_MULTIPLY(HEADON_BONUS_OUT,NODE_75,HEADON_BONUS_EN)
/************************************************
- * Crash
- * FIXME: Just a prototype several filter missing
- ************************************************/
+ * Crash
+ * FIXME: Just a prototype several filter missing
+ ************************************************/
DISCRETE_LOGIC_INVERT(NODE_80, HEADON_CRASH_EN)
DISCRETE_555_MSTABLE(NODE_81, 1, NODE_80, RES_K(470), CAP_U(1), &headon_555_crash)
@@ -442,8 +442,8 @@ static DISCRETE_SOUND_START(headon)
DISCRETE_TRANSFORM2(HEADON_CRASH_OUT, NODE_95, 12, "01/")
/************************************************
- * Mixer Stage
- ************************************************/
+ * Mixer Stage
+ ************************************************/
DISCRETE_MIXER6(NODE_210, 1, HEADON_PLAYER_CAR_OUT, HEADON_COMP_CAR_OUT,
HEADON_SCREECH1_OUT, HEADON_SCREECH2_OUT,
@@ -499,29 +499,29 @@ WRITE8_HANDLER( invho2_audio_w )
/* Discrete Sound Input Nodes */
-#define BRDRLINE_GUN_TRG_EN NODE_01
-#define BRDRLINE_JEEP_ON_EN NODE_02
-#define BRDRLINE_POINT_TRG_EN NODE_03
-#define BRDRLINE_HIT_TRG_EN NODE_04
-#define BRDRLINE_ANIMAL_TRG_EN NODE_05
-#define BRDRLINE_EMAR_TRG_EN NODE_06
-#define BRDRLINE_WALK_TRG_EN NODE_07
-#define BRDRLINE_CRY_TRG_EN NODE_08
+#define BRDRLINE_GUN_TRG_EN NODE_01
+#define BRDRLINE_JEEP_ON_EN NODE_02
+#define BRDRLINE_POINT_TRG_EN NODE_03
+#define BRDRLINE_HIT_TRG_EN NODE_04
+#define BRDRLINE_ANIMAL_TRG_EN NODE_05
+#define BRDRLINE_EMAR_TRG_EN NODE_06
+#define BRDRLINE_WALK_TRG_EN NODE_07
+#define BRDRLINE_CRY_TRG_EN NODE_08
/* Nodes - Sounds */
-#define BRDRLINE_GUN_TRG_SND NODE_91
-#define BRDRLINE_JEEP_ON_SND NODE_92
-#define BRDRLINE_POINT_TRG_SND NODE_93
-#define BRDRLINE_HIT_TRG_SND NODE_94
-#define BRDRLINE_ANIMAL_TRG_SND NODE_95
-#define BRDRLINE_EMAR_TRG_SND NODE_96
-#define BRDRLINE_WALK_TRG_SND NODE_97
-#define BRDRLINE_CRY_TRG_SND NODE_98
+#define BRDRLINE_GUN_TRG_SND NODE_91
+#define BRDRLINE_JEEP_ON_SND NODE_92
+#define BRDRLINE_POINT_TRG_SND NODE_93
+#define BRDRLINE_HIT_TRG_SND NODE_94
+#define BRDRLINE_ANIMAL_TRG_SND NODE_95
+#define BRDRLINE_EMAR_TRG_SND NODE_96
+#define BRDRLINE_WALK_TRG_SND NODE_97
+#define BRDRLINE_CRY_TRG_SND NODE_98
DISCRETE_SOUND_START(brdrline)
/************************************************
- * Input register mapping
- ************************************************/
+ * Input register mapping
+ ************************************************/
DISCRETE_INPUT_LOGIC(BRDRLINE_GUN_TRG_EN)
DISCRETE_INPUT_LOGIC(BRDRLINE_JEEP_ON_EN)
DISCRETE_INPUT_LOGIC(BRDRLINE_POINT_TRG_EN)
@@ -532,24 +532,24 @@ DISCRETE_SOUND_START(brdrline)
DISCRETE_INPUT_LOGIC(BRDRLINE_CRY_TRG_EN)
/************************************************
- * GUN TRG
- ************************************************/
+ * GUN TRG
+ ************************************************/
DISCRETE_LFSR_NOISE(NODE_10, 1, 1,CLK,AMPL,FEED,BIAS,LFSRTB)
DISCRETE_MIXER2(NODE_11, 1, NODE_10,IN1,INFO)
DISCRETE_FILTER2(NODE_12, 1, NODE_11,FREQ,DAMP,TYPE)
DISCRETE_ONESHOT(NODE_13, BRDRLINE_GUN_TRG_EN, DEFAULT_TTL_V_LOGIC_1,
- TIME_OF_74LS123(RES_K(47), CAP_U(1)), // R155, C73
+ TIME_OF_74LS123(RES_K(47), CAP_U(1)), // R155, C73
DISC_ONESHOT_FEDGE | DISC_ONESHOT_RETRIG | DISC_OUT_ACTIVE_LOW)
DISCRETE_RCDISC4(NODE_14, 1, NODE_13,RVAL0,RVAL1,RVAL2,CVAL,VP,TYPE)
DISCRETE_VCA(BRDRLINE_GUN_TRG_SND, 1, NODE_12, NODE_14,TYPE)
/************************************************
- * JEEP ON
- ************************************************/
+ * JEEP ON
+ ************************************************/
DISCRETE_555_ASTABLE(NODE_20, BRDRLINE_JEEP_ON_EN,
- RES_K(1), // R150
- RES_K(33), // R153
- CAP_U(.1), // C72
+ RES_K(1), // R150
+ RES_K(33), // R153
+ CAP_U(.1), // C72
OPTIONS)
DISCRETE_COUNTER(NODE_21, 1, 1, NODE_20,MIN,MAX,DIR,INIT0, DISC_CLK_BY_COUNT)
DISCRETE_COUNTER(NODE_22, 1, 1, NODE_20,MIN,MAX,DIR,INIT0, DISC_CLK_BY_COUNT)
@@ -557,32 +557,32 @@ DISCRETE_SOUND_START(brdrline)
DISCRETE_DAC_R1(NODE,DATA,VDATA,LADDER)
/************************************************
- * POINT TRG
- ************************************************/
+ * POINT TRG
+ ************************************************/
/************************************************
- * HIT TRG
- ************************************************/
+ * HIT TRG
+ ************************************************/
/************************************************
- * ANIMAL TRG
- ************************************************/
+ * ANIMAL TRG
+ ************************************************/
/************************************************
- * EMAR TRG
- ************************************************/
+ * EMAR TRG
+ ************************************************/
/************************************************
- * WALK TRG
- ************************************************/
+ * WALK TRG
+ ************************************************/
/************************************************
- * CRY TRG
- ************************************************/
+ * CRY TRG
+ ************************************************/
/************************************************
- * Mixer
- ************************************************/
+ * Mixer
+ ************************************************/
DISCRETE_OUTPUT(NODE_90, 1)
diff --git a/src/mame/audio/videopin.c b/src/mame/audio/videopin.c
index 91380cd0e40..0a19ee13107 100644
--- a/src/mame/audio/videopin.c
+++ b/src/mame/audio/videopin.c
@@ -14,9 +14,9 @@
/************************************************************************/
/* Nodes - Sounds */
-#define VIDEOPIN_VOL_SND NODE_10
-#define VIDEOPIN_BELL_SND NODE_11
-#define VIDEOPIN_BONG_SND NODE_12
+#define VIDEOPIN_VOL_SND NODE_10
+#define VIDEOPIN_BELL_SND NODE_11
+#define VIDEOPIN_BONG_SND NODE_12
DISCRETE_SOUND_START(videopin)
/************************************************/
@@ -71,7 +71,7 @@ DISCRETE_SOUND_START(videopin)
DISCRETE_DIVIDE(NODE_20, VIDEOPIN_OCTAVE_DATA, 12096000.0 /3.0 / 2.0, VIDEOPIN_OCTAVE_DATA)
DISCRETE_ADDER2(NODE_21, 1, VIDEOPIN_NOTE_DATA, 1)
// We will disable the divide if VIDEOPIN_NOTE_DATA = 0
- DISCRETE_DIVIDE(NODE_22, VIDEOPIN_NOTE_DATA, NODE_20, NODE_21) // freq
+ DISCRETE_DIVIDE(NODE_22, VIDEOPIN_NOTE_DATA, NODE_20, NODE_21) // freq
DISCRETE_SQUAREWAVE(VIDEOPIN_VOL_SND, VIDEOPIN_OCTAVE_DATA, NODE_22, VIDEOPIN_VOL_DATA, 50.0, 0, 0.0)
/************************************************/
diff --git a/src/mame/audio/warpwarp.c b/src/mame/audio/warpwarp.c
index a0095c32453..62367457f2f 100644
--- a/src/mame/audio/warpwarp.c
+++ b/src/mame/audio/warpwarp.c
@@ -10,7 +10,7 @@
#include "emu.h"
#include "includes/warpwarp.h"
-#define CLOCK_16H (18432000/3/2/16)
+#define CLOCK_16H (18432000/3/2/16)
#define CLOCK_1V (18432000/3/2/384)
struct warpwarp_sound_state
@@ -63,26 +63,26 @@ WRITE8_DEVICE_HANDLER( warpwarp_sound_w )
if( state->m_sound_latch & 8 )
{
/*
- * R85(?) is 10k, Rb is 0, C92 is 1uF
- * charge time t1 = 0.693 * (R24 + Rb) * C57 -> 0.22176s
- * discharge time t2 = 0.693 * (Rb) * C57 -> 0
- * C90(?) is only charged via D17 (1N914), no discharge!
- * Decay:
- * discharge C90(?) (1uF) through R13||R14 (22k||47k)
- * 0.639 * 15k * 1uF -> 0.9585s
- */
+ * R85(?) is 10k, Rb is 0, C92 is 1uF
+ * charge time t1 = 0.693 * (R24 + Rb) * C57 -> 0.22176s
+ * discharge time t2 = 0.693 * (Rb) * C57 -> 0
+ * C90(?) is only charged via D17 (1N914), no discharge!
+ * Decay:
+ * discharge C90(?) (1uF) through R13||R14 (22k||47k)
+ * 0.639 * 15k * 1uF -> 0.9585s
+ */
attotime period = attotime::from_hz(32768) * 95850 / 100000;
state->m_sound_volume_timer->adjust(period, 0, period);
}
else
{
/*
- * discharge only after R93 (100k) and through the 10k
- * potentiometerin the amplifier section.
- * 0.639 * 110k * 1uF -> 7.0290s
- * ...but this is not very realistic for the game sound :(
- * maybe there _is_ a discharge through the diode D17?
- */
+ * discharge only after R93 (100k) and through the 10k
+ * potentiometerin the amplifier section.
+ * 0.639 * 110k * 1uF -> 7.0290s
+ * ...but this is not very realistic for the game sound :(
+ * maybe there _is_ a discharge through the diode D17?
+ */
//attotime period = attotime::from_hz(32768) * 702900 / 100000;
attotime period = attotime::from_hz(32768) * 191700 / 100000;
state->m_sound_volume_timer->adjust(period, 0, period);
@@ -114,25 +114,25 @@ WRITE8_DEVICE_HANDLER( warpwarp_music2_w )
if( state->m_music2_latch & 0x10 )
{
/*
- * Ra (R83?) is 10k, Rb is 0, C92 is 1uF
- * charge time t1 = 0.693 * (Ra + Rb) * C -> 0.22176s
- * discharge time is (nearly) zero, because Rb is zero
- * C95(?) is only charged via D17, not discharged!
- * Decay:
- * discharge C95(?) (10uF) through R13||R14 (22k||47k)
- * 0.639 * 15k * 10uF -> 9.585s
- * ...I'm sure this is off by one number of magnitude :/
- */
+ * Ra (R83?) is 10k, Rb is 0, C92 is 1uF
+ * charge time t1 = 0.693 * (Ra + Rb) * C -> 0.22176s
+ * discharge time is (nearly) zero, because Rb is zero
+ * C95(?) is only charged via D17, not discharged!
+ * Decay:
+ * discharge C95(?) (10uF) through R13||R14 (22k||47k)
+ * 0.639 * 15k * 10uF -> 9.585s
+ * ...I'm sure this is off by one number of magnitude :/
+ */
attotime period = attotime::from_hz(32768) * 95850 / 100000;
state->m_music_volume_timer->adjust(period, 0, period);
}
else
{
/*
- * discharge through R14 (47k),
- * discharge C95(?) (10uF) through R14 (47k)
- * 0.639 * 47k * 10uF -> 30.033s
- */
+ * discharge through R14 (47k),
+ * discharge C95(?) (10uF) through R14 (47k)
+ * 0.639 * 47k * 10uF -> 30.033s
+ */
//attotime period = attotime::from_hz(32768) * 3003300 / 100000;
attotime period = attotime::from_hz(32768) * 300330 / 100000;
state->m_music_volume_timer->adjust(period, 0, period);
@@ -150,18 +150,18 @@ static STREAM_UPDATE( warpwarp_sound_update )
*buffer++ = (state->m_sound_signal + state->m_music_signal) / 2;
/*
- * The music signal is selected at a rate of 2H (1.536MHz) from the
- * four bits of a 4 bit binary counter which is clocked with 16H,
- * which is 192kHz, and is divided by 4 times (64 - music1_latch).
- * 0 = 256 steps -> 750 Hz
- * 1 = 252 steps -> 761.9 Hz
- * ...
- * 32 = 128 steps -> 1500 Hz
- * ...
- * 48 = 64 steps -> 3000 Hz
- * ...
- * 63 = 4 steps -> 48 kHz
- */
+ * The music signal is selected at a rate of 2H (1.536MHz) from the
+ * four bits of a 4 bit binary counter which is clocked with 16H,
+ * which is 192kHz, and is divided by 4 times (64 - music1_latch).
+ * 0 = 256 steps -> 750 Hz
+ * 1 = 252 steps -> 761.9 Hz
+ * ...
+ * 32 = 128 steps -> 1500 Hz
+ * ...
+ * 48 = 64 steps -> 3000 Hz
+ * ...
+ * 63 = 4 steps -> 48 kHz
+ */
state->m_mcarry -= CLOCK_16H / (4 * (64 - state->m_music1_latch));
while( state->m_mcarry < 0 )
{
@@ -245,7 +245,7 @@ const device_type WARPWARP = &device_creator<warpwarp_sound_device>;
warpwarp_sound_device::warpwarp_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, WARPWARP, "Warp Warp Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(warpwarp_sound_state);
}
@@ -278,5 +278,3 @@ void warpwarp_sound_device::sound_stream_update(sound_stream &stream, stream_sam
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/williams.c b/src/mame/audio/williams.c
index 4b275592247..b9a9ab5c1c0 100644
--- a/src/mame/audio/williams.c
+++ b/src/mame/audio/williams.c
@@ -69,14 +69,14 @@
#include "sound/dac.h"
-#define NARC_MASTER_CLOCK XTAL_8MHz
-#define NARC_FM_CLOCK XTAL_3_579545MHz
+#define NARC_MASTER_CLOCK XTAL_8MHz
+#define NARC_FM_CLOCK XTAL_3_579545MHz
-#define CVSD_MASTER_CLOCK XTAL_8MHz
-#define CVSD_FM_CLOCK XTAL_3_579545MHz
+#define CVSD_MASTER_CLOCK XTAL_8MHz
+#define CVSD_FM_CLOCK XTAL_3_579545MHz
-#define ADPCM_MASTER_CLOCK XTAL_8MHz
-#define ADPCM_FM_CLOCK XTAL_3_579545MHz
+#define ADPCM_MASTER_CLOCK XTAL_8MHz
+#define ADPCM_FM_CLOCK XTAL_3_579545MHz
@@ -100,11 +100,11 @@ extern const device_type WILLIAMS_ADPCM_SOUND = &device_creator<williams_adpcm_s
williams_cvsd_sound_device::williams_cvsd_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, WILLIAMS_CVSD_SOUND, "Williams CVSD Sound Board", "wmscvsd", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_cpu(*this, "cpu"),
- m_pia(*this, "pia"),
- m_hc55516(*this, "cvsd"),
- m_talkback(0)
+ device_mixer_interface(mconfig, *this),
+ m_cpu(*this, "cpu"),
+ m_pia(*this, "pia"),
+ m_hc55516(*this, "cvsd"),
+ m_talkback(0)
{
}
@@ -237,18 +237,18 @@ ADDRESS_MAP_END
static const pia6821_interface cvsd_pia_intf =
{
- DEVCB_NULL, // port A in
- DEVCB_NULL, // port B in
- DEVCB_NULL, // line CA1 in
- DEVCB_NULL, // line CB1 in
- DEVCB_NULL, // line CA2 in
- DEVCB_NULL, // line CB2 in
- DEVCB_DEVICE_MEMBER("dac", dac_device, write_unsigned8), // port A out
- DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, williams_cvsd_sound_device, talkback_w), // port B out
- DEVCB_NULL, // line CA2 out
- DEVCB_NULL, // port CB2 out
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, williams_cvsd_sound_device, pia_irqa), // IRQA
- DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, williams_cvsd_sound_device, pia_irqb) // IRQB
+ DEVCB_NULL, // port A in
+ DEVCB_NULL, // port B in
+ DEVCB_NULL, // line CA1 in
+ DEVCB_NULL, // line CB1 in
+ DEVCB_NULL, // line CA2 in
+ DEVCB_NULL, // line CB2 in
+ DEVCB_DEVICE_MEMBER("dac", dac_device, write_unsigned8), // port A out
+ DEVCB_DEVICE_MEMBER(DEVICE_SELF_OWNER, williams_cvsd_sound_device, talkback_w), // port B out
+ DEVCB_NULL, // line CA2 out
+ DEVCB_NULL, // port CB2 out
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, williams_cvsd_sound_device, pia_irqa), // IRQA
+ DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, williams_cvsd_sound_device, pia_irqb) // IRQB
};
@@ -296,10 +296,10 @@ void williams_cvsd_sound_device::device_start()
for (int bank = 0; bank < 16; bank++)
{
//
- // D0/D1 -> selects: 0=U4 1=U19 2=U20 3=n/c
- // D2 -> A15
- // D3 -> A16
- //
+ // D0/D1 -> selects: 0=U4 1=U19 2=U20 3=n/c
+ // D2 -> A15
+ // D3 -> A16
+ //
offs_t offset = 0x8000 * ((bank >> 2) & 3) + 0x20000 * (bank & 3);
membank("rombank")->configure_entry(bank, &rom[0x10000 + offset]);
}
@@ -350,15 +350,15 @@ void williams_cvsd_sound_device::device_timer(emu_timer &timer, device_timer_id
williams_narc_sound_device::williams_narc_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, WILLIAMS_NARC_SOUND, "Williams NARC Sound Board", "wmsnarc", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_cpu0(*this, "cpu0"),
- m_cpu1(*this, "cpu1"),
- m_hc55516(*this, "cvsd"),
- m_latch(0),
- m_latch2(0),
- m_talkback(0),
- m_audio_sync(0),
- m_sound_int_state(0)
+ device_mixer_interface(mconfig, *this),
+ m_cpu0(*this, "cpu0"),
+ m_cpu1(*this, "cpu1"),
+ m_hc55516(*this, "cvsd"),
+ m_latch(0),
+ m_latch2(0),
+ m_talkback(0),
+ m_audio_sync(0),
+ m_sound_int_state(0)
{
}
@@ -634,10 +634,10 @@ void williams_narc_sound_device::device_start()
for (int bank = 0; bank < 16; bank++)
{
//
- // D0 -> A15
- // D1/D2 -> selects: 0=n/c 1=U3 2=U4 3=U5
- // D3 -> A16
- //
+ // D0 -> A15
+ // D1/D2 -> selects: 0=n/c 1=U3 2=U4 3=U5
+ // D3 -> A16
+ //
offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3);
membank("masterbank")->configure_entry(bank, &rom[0x10000 + offset]);
}
@@ -648,10 +648,10 @@ void williams_narc_sound_device::device_start()
for (int bank = 0; bank < 16; bank++)
{
//
- // D0 -> A15
- // D1/D2 -> selects: 0=U35 1=U36 2=U37 3=U38
- // D3 -> A16
- //
+ // D0 -> A15
+ // D1/D2 -> selects: 0=U35 1=U36 2=U37 3=U38
+ // D3 -> A16
+ //
offs_t offset = 0x8000 * (bank & 1) + 0x10000 * ((bank >> 3) & 1) + 0x20000 * ((bank >> 1) & 3);
membank("slavebank")->configure_entry(bank, &rom[0x10000 + offset]);
}
@@ -723,11 +723,11 @@ void williams_narc_sound_device::device_timer(emu_timer &timer, device_timer_id
williams_adpcm_sound_device::williams_adpcm_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, WILLIAMS_ADPCM_SOUND, "Williams ADPCM Sound Board", "wmsadpcm", tag, owner, clock),
- device_mixer_interface(mconfig, *this),
- m_cpu(*this, "cpu"),
- m_latch(0),
- m_talkback(0),
- m_sound_int_state(0)
+ device_mixer_interface(mconfig, *this),
+ m_cpu(*this, "cpu"),
+ m_latch(0),
+ m_talkback(0),
+ m_sound_int_state(0)
{
}
@@ -805,7 +805,7 @@ READ8_MEMBER(williams_adpcm_sound_device::command_r)
m_cpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
// don't clear the external IRQ state for a short while; this allows the
- // self-tests to pass
+ // self-tests to pass
timer_set(attotime::from_usec(10), TID_IRQ_CLEAR);
return m_latch;
}
diff --git a/src/mame/audio/williams.h b/src/mame/audio/williams.h
index c74b6ae30a7..a6629fe498d 100644
--- a/src/mame/audio/williams.h
+++ b/src/mame/audio/williams.h
@@ -78,7 +78,7 @@ extern const device_type WILLIAMS_ADPCM_SOUND;
// ======================> williams_cvsd_sound_device
-class williams_cvsd_sound_device : public device_t,
+class williams_cvsd_sound_device : public device_t,
public device_mixer_interface
{
public:
@@ -118,7 +118,7 @@ private:
// ======================> williams_narc_sound_device
-class williams_narc_sound_device : public device_t,
+class williams_narc_sound_device : public device_t,
public device_mixer_interface
{
public:
@@ -176,7 +176,7 @@ private:
// ======================> williams_adpcm_sound_device
-class williams_adpcm_sound_device : public device_t,
+class williams_adpcm_sound_device : public device_t,
public device_mixer_interface
{
public:
@@ -218,5 +218,3 @@ private:
UINT8 m_talkback;
UINT8 m_sound_int_state;
};
-
-
diff --git a/src/mame/audio/wiping.c b/src/mame/audio/wiping.c
index ac04144598a..754892afbb8 100644
--- a/src/mame/audio/wiping.c
+++ b/src/mame/audio/wiping.c
@@ -263,7 +263,7 @@ const device_type WIPING = &device_creator<wiping_sound_device>;
wiping_sound_device::wiping_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, WIPING, "Wiping Custom", tag, owner, clock),
- device_sound_interface(mconfig, *this)
+ device_sound_interface(mconfig, *this)
{
m_token = global_alloc_clear(wiping_sound_state);
}
@@ -296,5 +296,3 @@ void wiping_sound_device::sound_stream_update(sound_stream &stream, stream_sampl
// should never get here
fatalerror("sound_stream_update called; not applicable to legacy sound devices\n");
}
-
-
diff --git a/src/mame/audio/wiping.h b/src/mame/audio/wiping.h
index eb559c61aa2..687592b2484 100644
--- a/src/mame/audio/wiping.h
+++ b/src/mame/audio/wiping.h
@@ -1,5 +1,5 @@
class wiping_sound_device : public device_t,
- public device_sound_interface
+ public device_sound_interface
{
public:
wiping_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
diff --git a/src/mame/audio/wow.c b/src/mame/audio/wow.c
index 7d0355b9cf4..742ce2c9a15 100644
--- a/src/mame/audio/wow.c
+++ b/src/mame/audio/wow.c
@@ -31,15 +31,15 @@ wow_sh_ update- Null
static const char *const PhonemeTable[65] =
{
- "EH3","EH2","EH1","PA0","DT" ,"A1" ,"A2" ,"ZH",
- "AH2","I3" ,"I2" ,"I1" ,"M" ,"N" ,"B" ,"V",
- "CH" ,"SH" ,"Z" ,"AW1","NG" ,"AH1","OO1","OO",
- "L" ,"K" ,"J" ,"H" ,"G" ,"F" ,"D" ,"S",
- "A" ,"AY" ,"Y1" ,"UH3","AH" ,"P" ,"O" ,"I",
- "U" ,"Y" ,"T" ,"R" ,"E" ,"W" ,"AE" ,"AE1",
- "AW2","UH2","UH1","UH" ,"O2" ,"O1" ,"IU" ,"U1",
- "THV","TH" ,"ER" ,"EH" ,"E1" ,"AW" ,"PA1","STOP",
- 0
+ "EH3","EH2","EH1","PA0","DT" ,"A1" ,"A2" ,"ZH",
+ "AH2","I3" ,"I2" ,"I1" ,"M" ,"N" ,"B" ,"V",
+ "CH" ,"SH" ,"Z" ,"AW1","NG" ,"AH1","OO1","OO",
+ "L" ,"K" ,"J" ,"H" ,"G" ,"F" ,"D" ,"S",
+ "A" ,"AY" ,"Y1" ,"UH3","AH" ,"P" ,"O" ,"I",
+ "U" ,"Y" ,"T" ,"R" ,"E" ,"W" ,"AE" ,"AE1",
+ "AW2","UH2","UH1","UH" ,"O2" ,"O1" ,"IU" ,"U1",
+ "THV","TH" ,"ER" ,"EH" ,"E1" ,"AW" ,"PA1","STOP",
+ 0
};
/* Missing samples : ready, from, one, bite, youl, explode, if, myself, back,
@@ -121,47 +121,47 @@ READ8_HANDLER( wow_speech_r )
if(Phoneme==63) {
samples->stop(0);
//logerror("Clearing sample %s\n",state->m_totalword);
- state->m_totalword[0] = 0; /* Clear the total word stack */
+ state->m_totalword[0] = 0; /* Clear the total word stack */
return data;
}
- if (Phoneme==3) /* We know PA0 is never part of a word */
- state->m_totalword[0] = 0; /* Clear the total word stack */
+ if (Phoneme==3) /* We know PA0 is never part of a word */
+ state->m_totalword[0] = 0; /* Clear the total word stack */
/* Phoneme to word translation */
if (*(state->m_totalword) == 0) {
- strcpy(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
+ strcpy(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
if (state->m_plural != 0) {
//logerror("found a possible plural at %d\n",state->m_plural-1);
- if (!strcmp("S",state->m_totalword)) { /* Plural check */
- samples->start(0, num_samples-2); /* play the sample at position of word */
+ if (!strcmp("S",state->m_totalword)) { /* Plural check */
+ samples->start(0, num_samples-2); /* play the sample at position of word */
samples->set_frequency(0, 11025); /* play at correct rate */
- state->m_totalword[0] = 0; /* Clear the total word stack */
- state->m_oldword[0] = 0; /* Clear the total word stack */
+ state->m_totalword[0] = 0; /* Clear the total word stack */
+ state->m_oldword[0] = 0; /* Clear the total word stack */
return data;
} else {
- state->m_plural=0;
+ state->m_plural=0;
}
}
} else
- strcat(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
+ strcat(state->m_totalword,PhonemeTable[Phoneme]); /* Copy over the first phoneme */
//logerror("Total word = %s\n",state->m_totalword);
for (i=0; wowWordTable[i]; i++) {
- if (!strcmp(wowWordTable[i],state->m_totalword)) { /* Scan the word (sample) table for the complete word */
+ if (!strcmp(wowWordTable[i],state->m_totalword)) { /* Scan the word (sample) table for the complete word */
/* WOW has Dungeon */
- if ((!strcmp("GDTO1RFYA2N",state->m_totalword)) || (!strcmp("RO1U1BAH1T",state->m_totalword)) || (!strcmp("KO1UH3I3E1N",state->m_totalword))) { /* May be plural */
+ if ((!strcmp("GDTO1RFYA2N",state->m_totalword)) || (!strcmp("RO1U1BAH1T",state->m_totalword)) || (!strcmp("KO1UH3I3E1N",state->m_totalword))) { /* May be plural */
state->m_plural=i+1;
strcpy(state->m_oldword,state->m_totalword);
//logerror("Storing sample position %d and copying string %s\n",state->m_plural,state->m_oldword);
} else {
state->m_plural=0;
}
- samples->start(0, i); /* play the sample at position of word */
+ samples->start(0, i); /* play the sample at position of word */
samples->set_frequency(0, 11025); /* play at correct rate */
//logerror("Playing sample %d\n",i);
- state->m_totalword[0] = 0; /* Clear the total word stack */
+ state->m_totalword[0] = 0; /* Clear the total word stack */
return data;
}
}
@@ -172,7 +172,7 @@ READ8_HANDLER( wow_speech_r )
#endif
/* Note : We should really also use volume in this as well as frequency */
- return data; /* Return nicely */
+ return data; /* Return nicely */
}
diff --git a/src/mame/audio/zaxxon.c b/src/mame/audio/zaxxon.c
index dae483102a1..95dc64f6d72 100644
--- a/src/mame/audio/zaxxon.c
+++ b/src/mame/audio/zaxxon.c
@@ -189,18 +189,18 @@ WRITE8_MEMBER(zaxxon_state::zaxxon_sound_c_w)
static const char *const congo_sample_names[] =
{
"*congo",
- "gorilla", /* 0 */
- "bass", /* 1 */
- "congal", /* 2 */
- "congah", /* 3 */
- "rim", /* 4 */
+ "gorilla", /* 0 */
+ "bass", /* 1 */
+ "congal", /* 2 */
+ "congah", /* 3 */
+ "rim", /* 4 */
0
};
static const samples_interface congo_samples_interface =
{
- 5, /* 5 channels */
+ 5, /* 5 channels */
congo_sample_names
};
diff --git a/src/mame/drivers/1942.c b/src/mame/drivers/1942.c
index 897096443f4..9e16fb8b78b 100644
--- a/src/mame/drivers/1942.c
+++ b/src/mame/drivers/1942.c
@@ -59,9 +59,9 @@ correctly.
***************************************************************************/
-#define MAIN_CPU_CLOCK (XTAL_12MHz/3) /* 12MHz is the only OSC on the PCB */
-#define SOUND_CPU_CLOCK (XTAL_12MHz/4) /* 12MHz is the only OSC on the PCB */
-#define AUDIO_CLOCK (XTAL_12MHz/8) /* 12MHz is the only OSC on the PCB */
+#define MAIN_CPU_CLOCK (XTAL_12MHz/3) /* 12MHz is the only OSC on the PCB */
+#define SOUND_CPU_CLOCK (XTAL_12MHz/4) /* 12MHz is the only OSC on the PCB */
+#define AUDIO_CLOCK (XTAL_12MHz/8) /* 12MHz is the only OSC on the PCB */
#include "emu.h"
#include "cpu/z80/z80.h"
@@ -79,10 +79,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(_1942_state::c1942_scanline)
int scanline = param;
if(scanline == 240) // vblank-out irq
- machine().device("maincpu")->execute().set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* RST 10h - vblank */
+ machine().device("maincpu")->execute().set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* RST 10h - vblank */
if(scanline == 0) // unknown irq event, presumably vblank-in or a periodic one (writes to the soundlatch and drives freeze dip-switch)
- machine().device("maincpu")->execute().set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* RST 08h */
+ machine().device("maincpu")->execute().set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* RST 08h */
}
@@ -143,7 +143,7 @@ static INPUT_PORTS_START( 1942 )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSWA")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:8,7,6")
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:8,7,6")
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
@@ -152,22 +152,22 @@ static INPUT_PORTS_START( 1942 )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:5")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:5")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x08, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWA:4,3")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWA:4,3")
PORT_DIPSETTING( 0x30, "20K 80K 80K+" )
PORT_DIPSETTING( 0x20, "20K 100K 100K+" )
PORT_DIPSETTING( 0x10, "30K 80K 80K+" )
PORT_DIPSETTING( 0x00, "30K 100K 100K+" )
- PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWA:2,1")
+ PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWA:2,1")
PORT_DIPSETTING( 0x80, "1" )
PORT_DIPSETTING( 0x40, "2" )
PORT_DIPSETTING( 0xc0, "3" )
PORT_DIPSETTING( 0x00, "5" )
PORT_START("DSWB")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:8,7,6")
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:8,7,6")
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
@@ -177,15 +177,15 @@ static INPUT_PORTS_START( 1942 )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
PORT_SERVICE_DIPLOC(0x08, IP_ACTIVE_LOW, "SWB:5" )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWB:4")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWB:4")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:3,2")
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:3,2")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x60, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
- PORT_DIPNAME( 0x80, 0x80, "Screen Stop" ) PORT_DIPLOCATION("SWB:1")
+ PORT_DIPNAME( 0x80, 0x80, "Screen Stop" ) PORT_DIPLOCATION("SWB:1")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -256,11 +256,11 @@ void _1942_state::machine_reset()
static MACHINE_CONFIG_START( 1942, _1942_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, MAIN_CPU_CLOCK) /* 4 MHz ??? */
+ MCFG_CPU_ADD("maincpu", Z80, MAIN_CPU_CLOCK) /* 4 MHz ??? */
MCFG_CPU_PROGRAM_MAP(c1942_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", _1942_state, c1942_scanline, "screen", 0, 1)
- MCFG_CPU_ADD("audiocpu", Z80, SOUND_CPU_CLOCK) /* 3 MHz ??? */
+ MCFG_CPU_ADD("audiocpu", Z80, SOUND_CPU_CLOCK) /* 3 MHz ??? */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(_1942_state, irq0_line_hold, 4*60)
@@ -280,9 +280,9 @@ static MACHINE_CONFIG_START( 1942, _1942_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay1", AY8910, AUDIO_CLOCK) /* 1.5 MHz */
+ MCFG_SOUND_ADD("ay1", AY8910, AUDIO_CLOCK) /* 1.5 MHz */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
- MCFG_SOUND_ADD("ay2", AY8910, AUDIO_CLOCK) /* 1.5 MHz */
+ MCFG_SOUND_ADD("ay2", AY8910, AUDIO_CLOCK) /* 1.5 MHz */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_CONFIG_END
@@ -295,7 +295,7 @@ MACHINE_CONFIG_END
***************************************************************************/
ROM_START( 1942 )
- ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
+ ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
ROM_LOAD( "srb-03.m3", 0x00000, 0x4000, CRC(d9dafcc3) SHA1(a089a9bc55fb7d6d0ac53f91b258396d5d62677a) )
ROM_LOAD( "srb-04.m4", 0x04000, 0x4000, CRC(da0cf924) SHA1(856fbb302c9a4ec7850a26ab23dab8467f79bba4) )
ROM_LOAD( "srb-05.m5", 0x10000, 0x4000, CRC(d102911c) SHA1(35ba1d82bd901940f61d8619273463d02fc0a952) )
@@ -306,10 +306,10 @@ ROM_START( 1942 )
ROM_LOAD( "sr-01.c11", 0x0000, 0x4000, CRC(bd87f06b) SHA1(821f85cf157f81117eeaba0c3cf0337eac357e58) )
ROM_REGION( 0x2000, "gfx1", 0 )
- ROM_LOAD( "sr-02.f2", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
+ ROM_LOAD( "sr-02.f2", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
ROM_REGION( 0xc000, "gfx2", 0 )
- ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
+ ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
ROM_LOAD( "sr-09.a2", 0x2000, 0x2000, CRC(999cf6e0) SHA1(5b8b685038ec98b781908b92eb7fb9506db68544) )
ROM_LOAD( "sr-10.a3", 0x4000, 0x2000, CRC(8edb273a) SHA1(85fdd4c690ed31e6396e3c16aa02140ee7ea2d61) )
ROM_LOAD( "sr-11.a4", 0x6000, 0x2000, CRC(3a2726c3) SHA1(187c92ef591febdcbd1d42ab850e0cbb62c00873) )
@@ -317,26 +317,26 @@ ROM_START( 1942 )
ROM_LOAD( "sr-13.a6", 0xa000, 0x2000, CRC(658f02c4) SHA1(f087d69e49e38cf3107350cde18fcf85a8fa04f0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
+ ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
ROM_LOAD( "sr-15.l2", 0x04000, 0x4000, CRC(f89287aa) SHA1(136fff6d2a4f48a488fc7c620213761459c3ada0) )
ROM_LOAD( "sr-16.n1", 0x08000, 0x4000, CRC(024418f8) SHA1(145b8d5d6c8654cd090955a98f6dd8c8dbafe7c1) )
ROM_LOAD( "sr-17.n2", 0x0c000, 0x4000, CRC(e2c7e489) SHA1(d4b5d575c021f58f6966df189df94e08c5b3621c) )
ROM_REGION( 0x0a00, "proms", 0 )
- ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
- ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
- ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
- ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
- ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
- ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
- ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
+ ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
+ ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
+ ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
+ ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
+ ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
+ ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
+ ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
ROM_END
ROM_START( 1942a )
- ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
+ ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
ROM_LOAD( "sra-03.m3", 0x00000, 0x4000, CRC(40201bab) SHA1(4886c07a4602223c21419118e10aadce9c99fa5a) )
ROM_LOAD( "sr-04.m4", 0x04000, 0x4000, CRC(a60ac644) SHA1(f37862db3cf5e6cc9ab3276f3bc45fd629fd70dd) )
ROM_LOAD( "sr-05.m5", 0x10000, 0x4000, CRC(835f7b24) SHA1(24b66827f08c43fbf5b9517d638acdfc38e1b1e7) )
@@ -347,10 +347,10 @@ ROM_START( 1942a )
ROM_LOAD( "sr-01.c11", 0x0000, 0x4000, CRC(bd87f06b) SHA1(821f85cf157f81117eeaba0c3cf0337eac357e58) )
ROM_REGION( 0x2000, "gfx1", 0 )
- ROM_LOAD( "sr-02.f2", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
+ ROM_LOAD( "sr-02.f2", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
ROM_REGION( 0xc000, "gfx2", 0 )
- ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
+ ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
ROM_LOAD( "sr-09.a2", 0x2000, 0x2000, CRC(999cf6e0) SHA1(5b8b685038ec98b781908b92eb7fb9506db68544) )
ROM_LOAD( "sr-10.a3", 0x4000, 0x2000, CRC(8edb273a) SHA1(85fdd4c690ed31e6396e3c16aa02140ee7ea2d61) )
ROM_LOAD( "sr-11.a4", 0x6000, 0x2000, CRC(3a2726c3) SHA1(187c92ef591febdcbd1d42ab850e0cbb62c00873) )
@@ -358,27 +358,27 @@ ROM_START( 1942a )
ROM_LOAD( "sr-13.a6", 0xa000, 0x2000, CRC(658f02c4) SHA1(f087d69e49e38cf3107350cde18fcf85a8fa04f0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
+ ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
ROM_LOAD( "sr-15.l2", 0x04000, 0x4000, CRC(f89287aa) SHA1(136fff6d2a4f48a488fc7c620213761459c3ada0) )
ROM_LOAD( "sr-16.n1", 0x08000, 0x4000, CRC(024418f8) SHA1(145b8d5d6c8654cd090955a98f6dd8c8dbafe7c1) )
ROM_LOAD( "sr-17.n2", 0x0c000, 0x4000, CRC(e2c7e489) SHA1(d4b5d575c021f58f6966df189df94e08c5b3621c) )
ROM_REGION( 0x0a00, "proms", 0 )
- ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
- ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
- ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
- ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
- ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
- ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
- ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
+ ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
+ ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
+ ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
+ ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
+ ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
+ ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
+ ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
ROM_END
/* this is the same as the 1942a set, but with a different rom arrangement (larger roms), it appears to be a common bootleg */
ROM_START( 1942abl )
- ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
+ ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
ROM_LOAD( "3.bin", 0x00000, 0x8000, CRC(f3184f5a) SHA1(a566c344ee1f63580d41aca95ece9ad1f7a135d2) )
ROM_LOAD( "5.bin", 0x10000, 0x4000, CRC(835f7b24) SHA1(24b66827f08c43fbf5b9517d638acdfc38e1b1e7) )
ROM_LOAD( "7.bin", 0x14000, 0x8000, CRC(2f456c6e) SHA1(b728c72f97ccdb57a4aac53ef7ca3f4516fc2ecb) )
@@ -387,35 +387,35 @@ ROM_START( 1942abl )
ROM_LOAD( "1.bin", 0x0000, 0x4000, CRC(bd87f06b) SHA1(821f85cf157f81117eeaba0c3cf0337eac357e58) )
ROM_REGION( 0x2000, "gfx1", 0 )
- ROM_LOAD( "2.bin", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
+ ROM_LOAD( "2.bin", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
ROM_REGION( 0xc000, "gfx2", 0 )
- ROM_LOAD( "9.bin", 0x0000, 0x4000, CRC(60329fa4) SHA1(8f66c283c992a6bc676f5f0f739b7e9d07bbf9ee) ) /* tiles */
+ ROM_LOAD( "9.bin", 0x0000, 0x4000, CRC(60329fa4) SHA1(8f66c283c992a6bc676f5f0f739b7e9d07bbf9ee) ) /* tiles */
ROM_LOAD( "11.bin", 0x4000, 0x4000, CRC(66bac116) SHA1(ce21a693ad8d7592d21e05d0cb9eabb36e7e8fef) )
ROM_LOAD( "13.bin", 0x8000, 0x4000, CRC(623fcec1) SHA1(b3eea37d705e3871dc94e4cf6f2aacc6fbd09216) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "14.bin", 0x04000, 0x4000, CRC(df2345ef) SHA1(3776edebda7bc9c72117f4b764f3bdaec0a632b4) ) /* sprites */
+ ROM_LOAD( "14.bin", 0x04000, 0x4000, CRC(df2345ef) SHA1(3776edebda7bc9c72117f4b764f3bdaec0a632b4) ) /* sprites */
ROM_CONTINUE(0x0000,0x4000)
ROM_LOAD( "16.bin", 0x0c000, 0x4000, CRC(c106b1ed) SHA1(a16520752fb02e403c93975ecf12b75854d58d69) )
ROM_CONTINUE(0x8000,0x4000)
// proms not in the set, assumed to be the same
ROM_REGION( 0x0a00, "proms", 0 )
- ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
- ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
- ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
- ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
- ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
- ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
- ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
+ ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
+ ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
+ ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
+ ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
+ ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
+ ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
+ ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
ROM_END
ROM_START( 1942b )
- ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
+ ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
ROM_LOAD( "sr-03.m3", 0x00000, 0x4000, CRC(612975f2) SHA1(f3744335862dd4c53925cc32792badd4a378c837) )
ROM_LOAD( "sr-04.m4", 0x04000, 0x4000, CRC(a60ac644) SHA1(f37862db3cf5e6cc9ab3276f3bc45fd629fd70dd) )
ROM_LOAD( "sr-05.m5", 0x10000, 0x4000, CRC(835f7b24) SHA1(24b66827f08c43fbf5b9517d638acdfc38e1b1e7) )
@@ -426,10 +426,10 @@ ROM_START( 1942b )
ROM_LOAD( "sr-01.c11", 0x0000, 0x4000, CRC(bd87f06b) SHA1(821f85cf157f81117eeaba0c3cf0337eac357e58) )
ROM_REGION( 0x2000, "gfx1", 0 )
- ROM_LOAD( "sr-02.f2", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
+ ROM_LOAD( "sr-02.f2", 0x0000, 0x2000, CRC(6ebca191) SHA1(0dbddadde54a0ab66994c4a8726be05c6ca88a0e) ) /* characters */
ROM_REGION( 0xc000, "gfx2", 0 )
- ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
+ ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
ROM_LOAD( "sr-09.a2", 0x2000, 0x2000, CRC(999cf6e0) SHA1(5b8b685038ec98b781908b92eb7fb9506db68544) )
ROM_LOAD( "sr-10.a3", 0x4000, 0x2000, CRC(8edb273a) SHA1(85fdd4c690ed31e6396e3c16aa02140ee7ea2d61) )
ROM_LOAD( "sr-11.a4", 0x6000, 0x2000, CRC(3a2726c3) SHA1(187c92ef591febdcbd1d42ab850e0cbb62c00873) )
@@ -437,40 +437,40 @@ ROM_START( 1942b )
ROM_LOAD( "sr-13.a6", 0xa000, 0x2000, CRC(658f02c4) SHA1(f087d69e49e38cf3107350cde18fcf85a8fa04f0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
+ ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
ROM_LOAD( "sr-15.l2", 0x04000, 0x4000, CRC(f89287aa) SHA1(136fff6d2a4f48a488fc7c620213761459c3ada0) )
ROM_LOAD( "sr-16.n1", 0x08000, 0x4000, CRC(024418f8) SHA1(145b8d5d6c8654cd090955a98f6dd8c8dbafe7c1) )
ROM_LOAD( "sr-17.n2", 0x0c000, 0x4000, CRC(e2c7e489) SHA1(d4b5d575c021f58f6966df189df94e08c5b3621c) )
ROM_REGION( 0x0a00, "proms", 0 )
- ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
- ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
- ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
- ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
- ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
- ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
- ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
+ ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
+ ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
+ ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
+ ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
+ ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
+ ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
+ ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
ROM_END
ROM_START( 1942w )
- ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
+ ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 3*16k for the banked ROMs images */
ROM_LOAD( "sw-03.m3", 0x00000, 0x4000, CRC(afd79770) SHA1(74c7a887fe3d4abfce1dcfec4c75b21ab81adc8c) )
ROM_LOAD( "sw-04.m4", 0x04000, 0x4000, CRC(933d9910) SHA1(9c73ef880f56e30a865be959f8bbdbe79c7ef8e2) )
ROM_LOAD( "sw-05.m5", 0x10000, 0x4000, CRC(e9a71bb6) SHA1(1f0d52c9282d15f9e4898b3b144ece25d345b71f) )
- ROM_LOAD( "sw-06.m6", 0x14000, 0x2000, CRC(466f8248) SHA1(2ccc8fc59962d3001fbc10e8d2f20a254a74f251) ) /* matches srb-06.m6 from 1942 (Revision B) */
+ ROM_LOAD( "sw-06.m6", 0x14000, 0x2000, CRC(466f8248) SHA1(2ccc8fc59962d3001fbc10e8d2f20a254a74f251) ) /* matches srb-06.m6 from 1942 (Revision B) */
ROM_LOAD( "sw-07.m7", 0x18000, 0x4000, CRC(ec41655e) SHA1(dbe4bb11f2e88574cb43ba5cd216354c3b7f69a6) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "sr-01.c11", 0x0000, 0x4000, CRC(bd87f06b) SHA1(821f85cf157f81117eeaba0c3cf0337eac357e58) )
ROM_REGION( 0x2000, "gfx1", 0 )
- ROM_LOAD( "sw-02.f2", 0x0000, 0x2000, CRC(f8e9ada2) SHA1(028f554e70425c53faa30a6fe1c45cc16724560a) ) /* characters */
+ ROM_LOAD( "sw-02.f2", 0x0000, 0x2000, CRC(f8e9ada2) SHA1(028f554e70425c53faa30a6fe1c45cc16724560a) ) /* characters */
ROM_REGION( 0xc000, "gfx2", 0 )
- ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
+ ROM_LOAD( "sr-08.a1", 0x0000, 0x2000, CRC(3884d9eb) SHA1(5cbd9215fa5ba5a61208b383700adc4428521aed) ) /* tiles */
ROM_LOAD( "sr-09.a2", 0x2000, 0x2000, CRC(999cf6e0) SHA1(5b8b685038ec98b781908b92eb7fb9506db68544) )
ROM_LOAD( "sr-10.a3", 0x4000, 0x2000, CRC(8edb273a) SHA1(85fdd4c690ed31e6396e3c16aa02140ee7ea2d61) )
ROM_LOAD( "sr-11.a4", 0x6000, 0x2000, CRC(3a2726c3) SHA1(187c92ef591febdcbd1d42ab850e0cbb62c00873) )
@@ -478,22 +478,22 @@ ROM_START( 1942w )
ROM_LOAD( "sr-13.a6", 0xa000, 0x2000, CRC(658f02c4) SHA1(f087d69e49e38cf3107350cde18fcf85a8fa04f0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
+ ROM_LOAD( "sr-14.l1", 0x00000, 0x4000, CRC(2528bec6) SHA1(29f7719f18faad6bd1ec6735cc24e69168361470) ) /* sprites */
ROM_LOAD( "sr-15.l2", 0x04000, 0x4000, CRC(f89287aa) SHA1(136fff6d2a4f48a488fc7c620213761459c3ada0) )
ROM_LOAD( "sr-16.n1", 0x08000, 0x4000, CRC(024418f8) SHA1(145b8d5d6c8654cd090955a98f6dd8c8dbafe7c1) )
ROM_LOAD( "sr-17.n2", 0x0c000, 0x4000, CRC(e2c7e489) SHA1(d4b5d575c021f58f6966df189df94e08c5b3621c) )
ROM_REGION( 0x0a00, "proms", 0 )
- ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
- ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
- ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
- ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
- ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
- ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
- ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
- ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
+ ROM_LOAD( "sb-5.e8", 0x0000, 0x0100, CRC(93ab8153) SHA1(a792f24e5c0c3c4a6b436102e7a98199f878ece1) ) /* red component */
+ ROM_LOAD( "sb-6.e9", 0x0100, 0x0100, CRC(8ab44f7d) SHA1(f74680a6a987d74b3acb32e6396f20e127874149) ) /* green component */
+ ROM_LOAD( "sb-7.e10", 0x0200, 0x0100, CRC(f4ade9a4) SHA1(62ad31d31d183cce213b03168daa035083b2f28e) ) /* blue component */
+ ROM_LOAD( "sb-0.f1", 0x0300, 0x0100, CRC(6047d91b) SHA1(1ce025f9524c1033e48c5294ee7d360f8bfebe8d) ) /* char lookup table */
+ ROM_LOAD( "sb-4.d6", 0x0400, 0x0100, CRC(4858968d) SHA1(20b5dbcaa1a4081b3139e7e2332d8fe3c9e55ed6) ) /* tile lookup table */
+ ROM_LOAD( "sb-8.k3", 0x0500, 0x0100, CRC(f6fad943) SHA1(b0a24ea7805272e8ebf72a99b08907bc00d5f82f) ) /* sprite lookup table */
+ ROM_LOAD( "sb-2.d1", 0x0600, 0x0100, CRC(8bb8b3df) SHA1(49de2819c4c92057fedcb20425282515d85829aa) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-3.d2", 0x0700, 0x0100, CRC(3b0c99af) SHA1(38f30ac1e48632634e409f328ee3051b987de7ad) ) /* tile palette selector? (not used) */
+ ROM_LOAD( "sb-1.k6", 0x0800, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "sb-9.m11", 0x0900, 0x0100, CRC(4921635c) SHA1(aee37d6cdc36acf0f11ff5f93e7b16e4b12f6c39) ) /* video timing? (not used) */
ROM_END
diff --git a/src/mame/drivers/1943.c b/src/mame/drivers/1943.c
index 358d3157a8d..2a86459df1e 100644
--- a/src/mame/drivers/1943.c
+++ b/src/mame/drivers/1943.c
@@ -39,9 +39,9 @@
READ8_MEMBER(_1943_state::c1943_protection_r)
{
/*
- This is a protection check. The game crashes (thru a jump to 0x8000)
- if a read from this address doesn't return the value it expects.
- */
+ This is a protection check. The game crashes (thru a jump to 0x8000)
+ if a read from this address doesn't return the value it expects.
+ */
int data = space.device().state().state_int(Z80_BC) >> 8;
// logerror("protection read, PC: %04x Result:%02x\n", space.device().safe_pc(), data);
@@ -60,7 +60,7 @@ static ADDRESS_MAP_START( c1943_map, AS_PROGRAM, 8, _1943_state )
AM_RANGE(0xc004, 0xc004) AM_READ_PORT("DSWB")
AM_RANGE(0xc007, 0xc007) AM_READ(c1943_protection_r)
AM_RANGE(0xc800, 0xc800) AM_WRITE(soundlatch_byte_w)
- AM_RANGE(0xc804, 0xc804) AM_WRITE(c1943_c804_w) // ROM bank switch, screen flip
+ AM_RANGE(0xc804, 0xc804) AM_WRITE(c1943_c804_w) // ROM bank switch, screen flip
AM_RANGE(0xc806, 0xc806) AM_WRITE(watchdog_reset_w)
AM_RANGE(0xc807, 0xc807) AM_WRITENOP // ???
AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(c1943_videoram_w) AM_SHARE("videoram")
@@ -68,7 +68,7 @@ static ADDRESS_MAP_START( c1943_map, AS_PROGRAM, 8, _1943_state )
AM_RANGE(0xd800, 0xd801) AM_RAM AM_SHARE("scrollx")
AM_RANGE(0xd802, 0xd802) AM_RAM AM_SHARE("scrolly")
AM_RANGE(0xd803, 0xd804) AM_RAM AM_SHARE("bgscrollx")
- AM_RANGE(0xd806, 0xd806) AM_WRITE(c1943_d806_w) // sprites, bg1, bg2 enable
+ AM_RANGE(0xd806, 0xd806) AM_WRITE(c1943_d806_w) // sprites, bg1, bg2 enable
AM_RANGE(0xd808, 0xd808) AM_WRITENOP // ???
AM_RANGE(0xd868, 0xd868) AM_WRITENOP // ???
AM_RANGE(0xd888, 0xd888) AM_WRITENOP // ???
@@ -92,7 +92,7 @@ static INPUT_PORTS_START( 1943 )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SPECIAL ) // VBLANK
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SPECIAL ) // VBLANK
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
@@ -116,7 +116,7 @@ static INPUT_PORTS_START( 1943 )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSWA")
- PORT_DIPNAME( 0x0f, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:5,6,7,8")
+ PORT_DIPNAME( 0x0f, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:5,6,7,8")
PORT_DIPSETTING( 0x0f, "1 (Easy)" )
PORT_DIPSETTING( 0x0e, "2" )
PORT_DIPSETTING( 0x0d, "3" )
@@ -133,19 +133,19 @@ static INPUT_PORTS_START( 1943 )
PORT_DIPSETTING( 0x02, "14" )
PORT_DIPSETTING( 0x01, "15" )
PORT_DIPSETTING( 0x00, "16 (Difficult)" )
- PORT_DIPNAME( 0x10, 0x10, "2 Player Game" ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x10, 0x10, "2 Player Game" ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x00, "1 Credit/2 Players" )
PORT_DIPSETTING( 0x10, "2 Credits/2 Players" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:3")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:3")
PORT_DIPSETTING( 0x20, DEF_STR( Upright ))
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ))
- PORT_DIPNAME( 0x40, 0x40, "Screen Stop" ) PORT_DIPLOCATION("SWA:2")
+ PORT_DIPNAME( 0x40, 0x40, "Screen Stop" ) PORT_DIPLOCATION("SWA:2")
PORT_DIPSETTING( 0x40, DEF_STR( Off ))
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_SERVICE_DIPLOC(0x80, IP_ACTIVE_LOW, "SWA:1" )
PORT_START("DSWB")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWB:6,7,8")
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWB:6,7,8")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ))
PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
@@ -154,7 +154,7 @@ static INPUT_PORTS_START( 1943 )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_5C ) )
- PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:3,4,5")
+ PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:3,4,5")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ))
PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
@@ -163,10 +163,10 @@ static INPUT_PORTS_START( 1943 )
PORT_DIPSETTING( 0x28, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_5C ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWB:2")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWB:2")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:1")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:1")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
INPUT_PORTS_END
@@ -175,13 +175,13 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 characters */
- 2048, /* 2048 characters */
- 2, /* 2 bits per pixel */
+ 8,8, /* 8*8 characters */
+ 2048, /* 2048 characters */
+ 2, /* 2 bits per pixel */
{ 4, 0 },
{ 0, 1, 2, 3, 8+0, 8+1, 8+2, 8+3 },
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
- 16*8 /* every char takes 16 consecutive bytes */
+ 16*8 /* every char takes 16 consecutive bytes */
};
static const gfx_layout tilelayout =
@@ -198,7 +198,7 @@ static const gfx_layout tilelayout =
8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16, 15*16,
16*16, 17*16, 18*16, 19*16, 20*16, 21*16, 22*16, 23*16,
24*16, 25*16, 26*16, 27*16, 28*16, 29*16, 30*16, 31*16 },
- 256*8 /* every tile takes 256 consecutive bytes */
+ 256*8 /* every tile takes 256 consecutive bytes */
};
static const gfx_layout bgtilelayout =
@@ -215,20 +215,20 @@ static const gfx_layout bgtilelayout =
8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16, 15*16,
16*16, 17*16, 18*16, 19*16, 20*16, 21*16, 22*16, 23*16,
24*16, 25*16, 26*16, 27*16, 28*16, 29*16, 30*16, 31*16 },
- 256*8 /* every tile takes 256 consecutive bytes */
+ 256*8 /* every tile takes 256 consecutive bytes */
};
static const gfx_layout spritelayout =
{
- 16,16, /* 16*16 sprites */
- 2048, /* 2048 sprites */
+ 16,16, /* 16*16 sprites */
+ 2048, /* 2048 sprites */
4, /* 4 bits per pixel */
{ 2048*64*8+4, 2048*64*8+0, 4, 0 },
{ 0, 1, 2, 3, 8+0, 8+1, 8+2, 8+3,
32*8+0, 32*8+1, 32*8+2, 32*8+3, 33*8+0, 33*8+1, 33*8+2, 33*8+3 },
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16,
8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16, 15*16 },
- 64*8 /* every sprite takes 64 consecutive bytes */
+ 64*8 /* every sprite takes 64 consecutive bytes */
};
/* Graphics Decode Info */
@@ -255,11 +255,11 @@ void _1943_state::machine_reset()
static MACHINE_CONFIG_START( 1943, _1943_state )
// basic machine hardware
- MCFG_CPU_ADD("maincpu", Z80, XTAL_24MHz/4) /* verified on pcb */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_24MHz/4) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(c1943_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", _1943_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/8) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/8) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(_1943_state, irq0_line_hold, 4*60)
@@ -279,13 +279,13 @@ static MACHINE_CONFIG_START( 1943, _1943_state )
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ym1", YM2203, XTAL_24MHz/16) /* verified on pcb */
+ MCFG_SOUND_ADD("ym1", YM2203, XTAL_24MHz/16) /* verified on pcb */
MCFG_SOUND_ROUTE(0, "mono", 0.15)
MCFG_SOUND_ROUTE(1, "mono", 0.15)
MCFG_SOUND_ROUTE(2, "mono", 0.15)
MCFG_SOUND_ROUTE(3, "mono", 0.10)
- MCFG_SOUND_ADD("ym2", YM2203, XTAL_24MHz/16) /* verified on pcb */
+ MCFG_SOUND_ADD("ym2", YM2203, XTAL_24MHz/16) /* verified on pcb */
MCFG_SOUND_ROUTE(0, "mono", 0.15)
MCFG_SOUND_ROUTE(1, "mono", 0.15)
MCFG_SOUND_ROUTE(2, "mono", 0.15)
@@ -295,7 +295,7 @@ MACHINE_CONFIG_END
/* ROMs */
ROM_START( 1943 )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
ROM_LOAD( "bme01.12d", 0x00000, 0x08000, BAD_DUMP CRC(55fd447e) SHA1(f9125745ce85282aa487f744cbf509f335dc3e85) ) /* This rom was hacked, we need a dump of an original */
ROM_LOAD( "bme02.13d", 0x10000, 0x10000, CRC(073fc57c) SHA1(6824fa387badd3c420f5c9e2b68159ac8a3aaec7) )
ROM_LOAD( "bme03.14d", 0x20000, 0x10000, CRC(835822c2) SHA1(2c2fad13f062069efa7721abb9d807fb5a7625b4) ) /* These 3 roms have a BLUE stripe on them */
@@ -307,10 +307,10 @@ ROM_START( 1943 )
ROM_LOAD( "bm.7k", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped */
ROM_REGION( 0x8000, "gfx1", 0 )
- ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
+ ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
+ ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
ROM_LOAD( "bm16.11f", 0x08000, 0x8000, CRC(23c908c2) SHA1(42b83ff5781be9181802a21ff1b23c17ab1bc5a2) )
ROM_LOAD( "bm17.12f", 0x10000, 0x8000, CRC(46bcdd07) SHA1(38feda668be25d1adc04aa36afc73b07c1545f89) )
ROM_LOAD( "bm18.14f", 0x18000, 0x8000, CRC(e6ae7ba0) SHA1(959c306dc28b9be2adc54b3d46312d26764c7b8b) )
@@ -320,11 +320,11 @@ ROM_START( 1943 )
ROM_LOAD( "bm22.14j", 0x38000, 0x8000, CRC(04f3c274) SHA1(932780c04abe285e1ec67b726b145175f73eafe0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
+ ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
ROM_LOAD( "bm25.14l", 0x08000, 0x8000, CRC(092cf9c1) SHA1(19fe3c714b1d52cbb21dea25cdee5af841f525db) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
+ ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
ROM_LOAD( "bm07.11a", 0x08000, 0x8000, CRC(d78f7197) SHA1(6367c7e80e80d4a0d33d7840b5c843c63c80123e) )
ROM_LOAD( "bm08.12a", 0x10000, 0x8000, CRC(1a626608) SHA1(755c27a07728fd686168e9d9e4dee3d8f274892a) )
ROM_LOAD( "bm09.14a", 0x18000, 0x8000, CRC(92408400) SHA1(3ab299bad1ba115efead53ebd92254abe7a092ba) )
@@ -333,27 +333,27 @@ ROM_START( 1943 )
ROM_LOAD( "bm12.12c", 0x30000, 0x8000, CRC(5e7efdb7) SHA1(fef271a38dc1a9e45a0c6e27e28e713c77c8f8c9) )
ROM_LOAD( "bm13.14c", 0x38000, 0x8000, CRC(1143829a) SHA1(2b3a65e354a205c05a87f783e9938b64bc62396f) )
- ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
- ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
- ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
+ ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
+ ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
+ ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
ROM_REGION( 0x0c00, "proms", 0 )
- ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
- ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
- ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
- ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
- ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
- ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
- ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
- ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
- ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
- ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
- ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
- ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
+ ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
+ ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
+ ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
+ ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
+ ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
+ ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
+ ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
+ ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
+ ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
+ ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
+ ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( 1943u )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
ROM_LOAD( "bmu01c.12d", 0x00000, 0x08000, CRC(c686cc5c) SHA1(5efb2d9df737564d599f71b71a6438f7624b27c3) )
ROM_LOAD( "bmu02c.13d", 0x10000, 0x10000, CRC(d8880a41) SHA1(2f9b6a3922efa05eed66c63284bace5f337304ac) )
ROM_LOAD( "bmu03c.14d", 0x20000, 0x10000, CRC(3f0ee26c) SHA1(8da74fe91a6be3f23fc625f2a433f1f79c424994) ) /* These 3 roms have a RED stripe on them */
@@ -365,10 +365,10 @@ ROM_START( 1943u )
ROM_LOAD( "bm.7k", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped */
ROM_REGION( 0x8000, "gfx1", 0 )
- ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
+ ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
+ ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
ROM_LOAD( "bm16.11f", 0x08000, 0x8000, CRC(23c908c2) SHA1(42b83ff5781be9181802a21ff1b23c17ab1bc5a2) )
ROM_LOAD( "bm17.12f", 0x10000, 0x8000, CRC(46bcdd07) SHA1(38feda668be25d1adc04aa36afc73b07c1545f89) )
ROM_LOAD( "bm18.14f", 0x18000, 0x8000, CRC(e6ae7ba0) SHA1(959c306dc28b9be2adc54b3d46312d26764c7b8b) )
@@ -378,11 +378,11 @@ ROM_START( 1943u )
ROM_LOAD( "bm22.14j", 0x38000, 0x8000, CRC(04f3c274) SHA1(932780c04abe285e1ec67b726b145175f73eafe0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
+ ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
ROM_LOAD( "bm25.14l", 0x08000, 0x8000, CRC(092cf9c1) SHA1(19fe3c714b1d52cbb21dea25cdee5af841f525db) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
+ ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
ROM_LOAD( "bm07.11a", 0x08000, 0x8000, CRC(d78f7197) SHA1(6367c7e80e80d4a0d33d7840b5c843c63c80123e) )
ROM_LOAD( "bm08.12a", 0x10000, 0x8000, CRC(1a626608) SHA1(755c27a07728fd686168e9d9e4dee3d8f274892a) )
ROM_LOAD( "bm09.14a", 0x18000, 0x8000, CRC(92408400) SHA1(3ab299bad1ba115efead53ebd92254abe7a092ba) )
@@ -391,27 +391,27 @@ ROM_START( 1943u )
ROM_LOAD( "bm12.12c", 0x30000, 0x8000, CRC(5e7efdb7) SHA1(fef271a38dc1a9e45a0c6e27e28e713c77c8f8c9) )
ROM_LOAD( "bm13.14c", 0x38000, 0x8000, CRC(1143829a) SHA1(2b3a65e354a205c05a87f783e9938b64bc62396f) )
- ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
- ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
- ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
+ ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
+ ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
+ ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
ROM_REGION( 0x0c00, "proms", 0 )
- ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
- ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
- ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
- ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
- ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
- ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
- ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
- ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
- ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
- ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
- ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
- ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
+ ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
+ ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
+ ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
+ ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
+ ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
+ ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
+ ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
+ ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
+ ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
+ ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
+ ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( 1943j )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
ROM_LOAD( "bm01b.12d", 0x00000, 0x08000, CRC(363f9f3d) SHA1(06fbdf1fa2304a000bcb0a151b2ef4be8b291b0b) ) /* "B" stamped in red ink */
ROM_LOAD( "bm02b.13d", 0x10000, 0x10000, CRC(7f0d7edc) SHA1(ef4aa067a1f55fead821097af215711be0a87075) )
ROM_LOAD( "bm03b.14d", 0x20000, 0x10000, CRC(7093da2a) SHA1(27456593e47d69506a27804e32088b15c1f7d767) )
@@ -423,10 +423,10 @@ ROM_START( 1943j )
ROM_LOAD( "bm.7k", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped */
ROM_REGION( 0x8000, "gfx1", 0 )
- ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
+ ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
+ ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
ROM_LOAD( "bm16.11f", 0x08000, 0x8000, CRC(23c908c2) SHA1(42b83ff5781be9181802a21ff1b23c17ab1bc5a2) )
ROM_LOAD( "bm17.12f", 0x10000, 0x8000, CRC(46bcdd07) SHA1(38feda668be25d1adc04aa36afc73b07c1545f89) )
ROM_LOAD( "bm18.14f", 0x18000, 0x8000, CRC(e6ae7ba0) SHA1(959c306dc28b9be2adc54b3d46312d26764c7b8b) )
@@ -436,11 +436,11 @@ ROM_START( 1943j )
ROM_LOAD( "bm22.14j", 0x38000, 0x8000, CRC(04f3c274) SHA1(932780c04abe285e1ec67b726b145175f73eafe0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
+ ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
ROM_LOAD( "bm25.14l", 0x08000, 0x8000, CRC(092cf9c1) SHA1(19fe3c714b1d52cbb21dea25cdee5af841f525db) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
+ ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
ROM_LOAD( "bm07.11a", 0x08000, 0x8000, CRC(d78f7197) SHA1(6367c7e80e80d4a0d33d7840b5c843c63c80123e) )
ROM_LOAD( "bm08.12a", 0x10000, 0x8000, CRC(1a626608) SHA1(755c27a07728fd686168e9d9e4dee3d8f274892a) )
ROM_LOAD( "bm09.14a", 0x18000, 0x8000, CRC(92408400) SHA1(3ab299bad1ba115efead53ebd92254abe7a092ba) )
@@ -449,27 +449,27 @@ ROM_START( 1943j )
ROM_LOAD( "bm12.12c", 0x30000, 0x8000, CRC(5e7efdb7) SHA1(fef271a38dc1a9e45a0c6e27e28e713c77c8f8c9) )
ROM_LOAD( "bm13.14c", 0x38000, 0x8000, CRC(1143829a) SHA1(2b3a65e354a205c05a87f783e9938b64bc62396f) )
- ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
- ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
- ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
+ ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
+ ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
+ ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
ROM_REGION( 0x0c00, "proms", 0 )
- ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
- ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
- ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
- ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
- ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
- ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
- ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
- ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
- ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
- ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
- ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
- ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
+ ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
+ ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
+ ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
+ ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
+ ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
+ ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
+ ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
+ ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
+ ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
+ ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
+ ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( 1943ja )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
ROM_LOAD( "bm01.12d", 0x00000, 0x08000, CRC(f6935937) SHA1(6fe8885d734447c2a667cf80dd545200aad6c767) ) /* Rom labels/names + revision needs to be verified */
ROM_LOAD( "bm02.13d", 0x10000, 0x10000, CRC(af971575) SHA1(af1d8ce73e8671b7b41248ce6486c9b5aaf6a233) )
ROM_LOAD( "bm03.14d", 0x20000, 0x10000, CRC(300ec713) SHA1(f66d2356b413a418c887b4085a5315475c7a8bba) )
@@ -481,10 +481,10 @@ ROM_START( 1943ja )
ROM_LOAD( "bm.7k", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped */
ROM_REGION( 0x8000, "gfx1", 0 )
- ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
+ ROM_LOAD( "bm05.4k", 0x00000, 0x8000, CRC(46cb9d3d) SHA1(96fd0e714b91fe13a2ca0d185ada9e4b4baa0c0b) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
+ ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
ROM_LOAD( "bm16.11f", 0x08000, 0x8000, CRC(23c908c2) SHA1(42b83ff5781be9181802a21ff1b23c17ab1bc5a2) )
ROM_LOAD( "bm17.12f", 0x10000, 0x8000, CRC(46bcdd07) SHA1(38feda668be25d1adc04aa36afc73b07c1545f89) )
ROM_LOAD( "bm18.14f", 0x18000, 0x8000, CRC(e6ae7ba0) SHA1(959c306dc28b9be2adc54b3d46312d26764c7b8b) )
@@ -494,11 +494,11 @@ ROM_START( 1943ja )
ROM_LOAD( "bm22.14j", 0x38000, 0x8000, CRC(04f3c274) SHA1(932780c04abe285e1ec67b726b145175f73eafe0) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
+ ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
ROM_LOAD( "bm25.14l", 0x08000, 0x8000, CRC(092cf9c1) SHA1(19fe3c714b1d52cbb21dea25cdee5af841f525db) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
+ ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
ROM_LOAD( "bm07.11a", 0x08000, 0x8000, CRC(d78f7197) SHA1(6367c7e80e80d4a0d33d7840b5c843c63c80123e) )
ROM_LOAD( "bm08.12a", 0x10000, 0x8000, CRC(1a626608) SHA1(755c27a07728fd686168e9d9e4dee3d8f274892a) )
ROM_LOAD( "bm09.14a", 0x18000, 0x8000, CRC(92408400) SHA1(3ab299bad1ba115efead53ebd92254abe7a092ba) )
@@ -507,27 +507,27 @@ ROM_START( 1943ja )
ROM_LOAD( "bm12.12c", 0x30000, 0x8000, CRC(5e7efdb7) SHA1(fef271a38dc1a9e45a0c6e27e28e713c77c8f8c9) )
ROM_LOAD( "bm13.14c", 0x38000, 0x8000, CRC(1143829a) SHA1(2b3a65e354a205c05a87f783e9938b64bc62396f) )
- ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
- ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
- ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
+ ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
+ ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
+ ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
ROM_REGION( 0x0c00, "proms", 0 )
- ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
- ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
- ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
- ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
- ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
- ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
- ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
- ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
- ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
- ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
- ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
- ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
+ ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
+ ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
+ ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
+ ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
+ ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
+ ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
+ ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
+ ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
+ ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
+ ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
+ ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( 1943kai )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
ROM_LOAD( "bmk01.12d", 0x00000, 0x08000, CRC(7d2211db) SHA1(b02a0b3daf7e1e224b7cad8fbe93439bd5ec9f0b) )
ROM_LOAD( "bmk02.13d", 0x10000, 0x10000, CRC(2ebbc8c5) SHA1(3be5ad061411642723e3f2bcb7b3c3caa11ee15f) )
ROM_LOAD( "bmk03.14d", 0x20000, 0x10000, CRC(475a6ac5) SHA1(fa07a855ba9173b6f81641c806ec7d938b0c282e) )
@@ -539,10 +539,10 @@ ROM_START( 1943kai )
ROM_LOAD( "bm.7k", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped */
ROM_REGION( 0x8000, "gfx1", 0 )
- ROM_LOAD( "bmk05.4k", 0x00000, 0x8000, CRC(884a8692) SHA1(027aa8c868dc07ccd9e27705031107881aef4b91) ) /* characters */
+ ROM_LOAD( "bmk05.4k", 0x00000, 0x8000, CRC(884a8692) SHA1(027aa8c868dc07ccd9e27705031107881aef4b91) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 ) /* Yes, BM15 & BM19 are NOT BMK */
- ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
+ ROM_LOAD( "bm15.10f", 0x00000, 0x8000, CRC(6b1a0443) SHA1(32337c840ccd6815fd5844c194365c58d708f6dc) ) /* bg tiles */
ROM_LOAD( "bmk16.11f", 0x08000, 0x8000, CRC(9416fe0d) SHA1(92fbc8fffa4497747ab80abe20eef361f6525114) )
ROM_LOAD( "bmk17.12f", 0x10000, 0x8000, CRC(3d5acab9) SHA1(887d45b648fda952ae2137579f383ab8ede1facd) )
ROM_LOAD( "bmk18.14f", 0x18000, 0x8000, CRC(7b62da1d) SHA1(1926109a2ab2f550ca87b0d2af73abd2b4a7498d) )
@@ -552,11 +552,11 @@ ROM_START( 1943kai )
ROM_LOAD( "bmk22.14j", 0x38000, 0x8000, CRC(d5ef8a0e) SHA1(2e42b1fbbfe823a33740a56d1334657db56d24d2) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "bmk24.14k", 0x00000, 0x8000, CRC(bf186ef2) SHA1(cacbb8a61f8a64c3ba4ffde5ca6f07fe120b9a7e) ) /* fg tiles */
+ ROM_LOAD( "bmk24.14k", 0x00000, 0x8000, CRC(bf186ef2) SHA1(cacbb8a61f8a64c3ba4ffde5ca6f07fe120b9a7e) ) /* fg tiles */
ROM_LOAD( "bmk25.14l", 0x08000, 0x8000, CRC(a755faf1) SHA1(8ee286d6ad7454ae34971f5891ddba4b76c244b0) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "bmk06.10a", 0x00000, 0x8000, CRC(5f7e38b3) SHA1(33f69ebe91a0ee45d9107171fed26da475aaab3a) ) /* sprites */
+ ROM_LOAD( "bmk06.10a", 0x00000, 0x8000, CRC(5f7e38b3) SHA1(33f69ebe91a0ee45d9107171fed26da475aaab3a) ) /* sprites */
ROM_LOAD( "bmk07.11a", 0x08000, 0x8000, CRC(ff3751fd) SHA1(bc942ddd46e7b147115e8ac22d24c2d018a7c373) )
ROM_LOAD( "bmk08.12a", 0x10000, 0x8000, CRC(159d51bd) SHA1(746aa49b18aff0eaf2fb875c573d455416d45a1d) )
ROM_LOAD( "bmk09.14a", 0x18000, 0x8000, CRC(8683e3d2) SHA1(591dc4811b226fe11cd5441ecb51aa3e95e68ac5) )
@@ -565,28 +565,28 @@ ROM_START( 1943kai )
ROM_LOAD( "bmk12.12c", 0x30000, 0x8000, CRC(0f50c001) SHA1(0e6367d3f0ba39a00ee0fa6e42ae9d43d12da23d) )
ROM_LOAD( "bmk13.14c", 0x38000, 0x8000, CRC(fd1acf8e) SHA1(88477ff1e5fbbca251d8cd4f241b42618ba64a80) )
- ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
- ROM_LOAD( "bmk14.5f", 0x0000, 0x8000, CRC(cf0f5a53) SHA1(dc50f3f937f52910dbd0cedbc232acfed0aa6a42) ) /* front background */
- ROM_LOAD( "bmk23.8k", 0x8000, 0x8000, CRC(17f77ef9) SHA1(8ebb4b440042436ec2db52bad808cced832db77c) ) /* back background */
+ ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
+ ROM_LOAD( "bmk14.5f", 0x0000, 0x8000, CRC(cf0f5a53) SHA1(dc50f3f937f52910dbd0cedbc232acfed0aa6a42) ) /* front background */
+ ROM_LOAD( "bmk23.8k", 0x8000, 0x8000, CRC(17f77ef9) SHA1(8ebb4b440042436ec2db52bad808cced832db77c) ) /* back background */
ROM_REGION( 0x0c00, "proms", 0 )
- ROM_LOAD( "bmk1.12a", 0x0000, 0x0100, CRC(e001ea33) SHA1(4204bdf87820ac84bab2a1b5571a2ee28c4cdfc5) ) /* red component */
- ROM_LOAD( "bmk2.13a", 0x0100, 0x0100, CRC(af34d91a) SHA1(94bc6514c980fdd1cb013ff0819d6f32464c581c) ) /* green component */
- ROM_LOAD( "bmk3.14a", 0x0200, 0x0100, CRC(43e9f6ef) SHA1(e1f58368fe0bd9b53f6c286ce5009b218a5197dc) ) /* blue component */
- ROM_LOAD( "bmk5.7f", 0x0300, 0x0100, CRC(41878934) SHA1(8f28210ab1d409c89600169a136b74a706001cdf) ) /* char lookup table */
- ROM_LOAD( "bmk10.7l", 0x0400, 0x0100, CRC(de44b748) SHA1(0694fb19d98ccda728424436fc7350da7b5bd05e) ) /* foreground lookup table */
- ROM_LOAD( "bmk9.6l", 0x0500, 0x0100, CRC(59ea57c0) SHA1(f961c7e9981cc819c2adf4efdc977841d284a3a2) ) /* foreground palette bank */
- ROM_LOAD( "bmk12.12m", 0x0600, 0x0100, CRC(8765f8b0) SHA1(f32bab8e3587434b864fe97da9423f2335ccba2e) ) /* background lookup table */
- ROM_LOAD( "bmk11.12l", 0x0700, 0x0100, CRC(87a8854e) SHA1(0cbc601b736d566d625867d65e0f7b2abb535c65) ) /* background palette bank */
- ROM_LOAD( "bmk8.8c", 0x0800, 0x0100, CRC(dad17e2d) SHA1(fdb18ddc7574153bb7e27ba08b04b9dc87061c02) ) /* sprite lookup table */
- ROM_LOAD( "bmk7.7c", 0x0900, 0x0100, CRC(76307f8d) SHA1(8d655e2a5c50541795316d924b2f18b55f4b9571) ) /* sprite palette bank */
- ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
- ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "bmk1.12a", 0x0000, 0x0100, CRC(e001ea33) SHA1(4204bdf87820ac84bab2a1b5571a2ee28c4cdfc5) ) /* red component */
+ ROM_LOAD( "bmk2.13a", 0x0100, 0x0100, CRC(af34d91a) SHA1(94bc6514c980fdd1cb013ff0819d6f32464c581c) ) /* green component */
+ ROM_LOAD( "bmk3.14a", 0x0200, 0x0100, CRC(43e9f6ef) SHA1(e1f58368fe0bd9b53f6c286ce5009b218a5197dc) ) /* blue component */
+ ROM_LOAD( "bmk5.7f", 0x0300, 0x0100, CRC(41878934) SHA1(8f28210ab1d409c89600169a136b74a706001cdf) ) /* char lookup table */
+ ROM_LOAD( "bmk10.7l", 0x0400, 0x0100, CRC(de44b748) SHA1(0694fb19d98ccda728424436fc7350da7b5bd05e) ) /* foreground lookup table */
+ ROM_LOAD( "bmk9.6l", 0x0500, 0x0100, CRC(59ea57c0) SHA1(f961c7e9981cc819c2adf4efdc977841d284a3a2) ) /* foreground palette bank */
+ ROM_LOAD( "bmk12.12m", 0x0600, 0x0100, CRC(8765f8b0) SHA1(f32bab8e3587434b864fe97da9423f2335ccba2e) ) /* background lookup table */
+ ROM_LOAD( "bmk11.12l", 0x0700, 0x0100, CRC(87a8854e) SHA1(0cbc601b736d566d625867d65e0f7b2abb535c65) ) /* background palette bank */
+ ROM_LOAD( "bmk8.8c", 0x0800, 0x0100, CRC(dad17e2d) SHA1(fdb18ddc7574153bb7e27ba08b04b9dc87061c02) ) /* sprite lookup table */
+ ROM_LOAD( "bmk7.7c", 0x0900, 0x0100, CRC(76307f8d) SHA1(8d655e2a5c50541795316d924b2f18b55f4b9571) ) /* sprite palette bank */
+ ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
+ ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( 1943b )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* 64k for code + 128k for the banked ROMs images */
ROM_LOAD( "1.12d", 0x00000, 0x08000, CRC(9a2d70ab) SHA1(6f84e906656f132ffcb63022f6d067580d261431) ) // protection patched out, disclaimer patched out
ROM_LOAD( "bm02.13d", 0x10000, 0x10000, CRC(af971575) SHA1(af1d8ce73e8671b7b41248ce6486c9b5aaf6a233) )
ROM_LOAD( "bm03.14d", 0x20000, 0x10000, CRC(300ec713) SHA1(f66d2356b413a418c887b4085a5315475c7a8bba) )
@@ -595,20 +595,20 @@ ROM_START( 1943b )
ROM_LOAD( "bm04.5h", 0x00000, 0x8000, CRC(ee2bd2d7) SHA1(4d2d019a9f8452fbbb247e893280568a2e86073e) )
ROM_REGION( 0x8000, "gfx1", 0 ) // logo replaced
- ROM_LOAD( "4.5h", 0x00000, 0x8000, CRC(0aba2096) SHA1(4833ad9f747b529ce92c4993388ab3516f8df4ed) ) /* characters */
+ ROM_LOAD( "4.5h", 0x00000, 0x8000, CRC(0aba2096) SHA1(4833ad9f747b529ce92c4993388ab3516f8df4ed) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 ) // same data, double size roms
- ROM_LOAD( "15.12f", 0x00000, 0x10000, CRC(622b4fba) SHA1(181d7b0a1ca0cfcc3bd71f0b97dc80f7ff27a9c6) ) /* bg tiles */
+ ROM_LOAD( "15.12f", 0x00000, 0x10000, CRC(622b4fba) SHA1(181d7b0a1ca0cfcc3bd71f0b97dc80f7ff27a9c6) ) /* bg tiles */
ROM_LOAD( "16.14f", 0x10000, 0x10000, CRC(25471a8d) SHA1(a3930dea9b64e84ade78dae4a631ebb7e9741954) )
ROM_LOAD( "17.12j", 0x20000, 0x10000, CRC(9da79653) SHA1(b9852c476110db3f654152ca85265d184a1a816e) )
ROM_LOAD( "18.14j", 0x30000, 0x10000, CRC(1f3aced8) SHA1(14ae016279628732b397db9a526bfda7ede0be5a) )
ROM_REGION( 0x10000, "gfx3", 0 ) // same
- ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
+ ROM_LOAD( "bm24.14k", 0x00000, 0x8000, CRC(11134036) SHA1(88da112ab9fc7e0d8f0e901f273715b950ae588c) ) /* fg tiles */
ROM_LOAD( "bm25.14l", 0x08000, 0x8000, CRC(092cf9c1) SHA1(19fe3c714b1d52cbb21dea25cdee5af841f525db) )
ROM_REGION( 0x40000, "gfx4", 0 ) // same
- ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
+ ROM_LOAD( "bm06.10a", 0x00000, 0x8000, CRC(97acc8af) SHA1(c9fa07cb61f6905408b355edabfe453fb652ff0d) ) /* sprites */
ROM_LOAD( "bm07.11a", 0x08000, 0x8000, CRC(d78f7197) SHA1(6367c7e80e80d4a0d33d7840b5c843c63c80123e) )
ROM_LOAD( "bm08.12a", 0x10000, 0x8000, CRC(1a626608) SHA1(755c27a07728fd686168e9d9e4dee3d8f274892a) )
ROM_LOAD( "bm09.14a", 0x18000, 0x8000, CRC(92408400) SHA1(3ab299bad1ba115efead53ebd92254abe7a092ba) )
@@ -617,23 +617,23 @@ ROM_START( 1943b )
ROM_LOAD( "bm12.12c", 0x30000, 0x8000, CRC(5e7efdb7) SHA1(fef271a38dc1a9e45a0c6e27e28e713c77c8f8c9) )
ROM_LOAD( "bm13.14c", 0x38000, 0x8000, CRC(1143829a) SHA1(2b3a65e354a205c05a87f783e9938b64bc62396f) )
- ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
- ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
- ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
+ ROM_REGION( 0x10000, "gfx5", 0 ) /* tilemaps */
+ ROM_LOAD( "bm14.5f", 0x0000, 0x8000, CRC(4d3c6401) SHA1(ce4f6dbf8fa030ad45cbb5afd58df27fed2d4618) ) /* front background */
+ ROM_LOAD( "bm23.8k", 0x8000, 0x8000, CRC(a52aecbd) SHA1(45b0283d84d394c16c35802463ca95d70d1062d4) ) /* back background */
ROM_REGION( 0x0c00, "proms", 0 )
- ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
- ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
- ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
- ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
- ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
- ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
- ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
- ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
- ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
- ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
- ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
- ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "bm1.12a", 0x0000, 0x0100, CRC(74421f18) SHA1(5b8b59f6f4e5ad358611de50608f47f41a5b0e51) ) /* red component */
+ ROM_LOAD( "bm2.13a", 0x0100, 0x0100, CRC(ac27541f) SHA1(1796c4c9041dfe28e6319576f21df1dbcb8d12bf) ) /* green component */
+ ROM_LOAD( "bm3.14a", 0x0200, 0x0100, CRC(251fb6ff) SHA1(d1118159b3d429d841e4efa938728ebedadd7ec5) ) /* blue component */
+ ROM_LOAD( "bm5.7f", 0x0300, 0x0100, CRC(206713d0) SHA1(fa609f6d675af18c379838583505724d28bcff0e) ) /* char lookup table */
+ ROM_LOAD( "bm10.7l", 0x0400, 0x0100, CRC(33c2491c) SHA1(13da924e4b182759c4aae49034f3a7cbe556ea65) ) /* foreground lookup table */
+ ROM_LOAD( "bm9.6l", 0x0500, 0x0100, CRC(aeea4af7) SHA1(98f4570ee061e9aa58d8ed2d2f8ae59ce2ec5795) ) /* foreground palette bank */
+ ROM_LOAD( "bm12.12m", 0x0600, 0x0100, CRC(c18aa136) SHA1(684f04d9a5b94ae1db5fb95763e65271f4cf8e01) ) /* background lookup table */
+ ROM_LOAD( "bm11.12l", 0x0700, 0x0100, CRC(405aae37) SHA1(94a06f81b775c4e49d57d42fc064d3072a253bbd) ) /* background palette bank */
+ ROM_LOAD( "bm8.8c", 0x0800, 0x0100, CRC(c2010a9e) SHA1(be9852500209066e2f0ff2770e0c217d1636a0b5) ) /* sprite lookup table */
+ ROM_LOAD( "bm7.7c", 0x0900, 0x0100, CRC(b56f30c3) SHA1(9f5e6db464d21457a33ec8bdfdff069632b791db) ) /* sprite palette bank */
+ ROM_LOAD( "bm4.12c", 0x0a00, 0x0100, CRC(91a8a2e1) SHA1(9583c87eff876f04bc2ccf7218cd8081f1bcdb94) ) /* priority encoder / palette selector (not used) */
+ ROM_LOAD( "bm6.4b", 0x0b00, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
diff --git a/src/mame/drivers/1945kiii.c b/src/mame/drivers/1945kiii.c
index d345f33ef39..068a3b4ddf8 100644
--- a/src/mame/drivers/1945kiii.c
+++ b/src/mame/drivers/1945kiii.c
@@ -44,7 +44,7 @@ Notes:
#include "cpu/m68000/m68000.h"
#include "sound/okim6295.h"
-#define MASTER_CLOCK XTAL_16MHz
+#define MASTER_CLOCK XTAL_16MHz
class k3_state : public driver_device
@@ -52,8 +52,8 @@ class k3_state : public driver_device
public:
k3_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_oki1(*this, "oki1"),
- m_oki2(*this, "oki2") ,
+ m_oki1(*this, "oki1"),
+ m_oki2(*this, "oki2") ,
m_spriteram_1(*this, "spritera1"),
m_spriteram_2(*this, "spritera2"),
m_bgram(*this, "bgram"){ }
@@ -149,12 +149,12 @@ WRITE16_MEMBER(k3_state::k3_soundbanks_w)
}
static ADDRESS_MAP_START( k3_map, AS_PROGRAM, 16, k3_state )
- AM_RANGE(0x0009ce, 0x0009cf) AM_WRITENOP // bug in code? (clean up log)
- AM_RANGE(0x0009d2, 0x0009d3) AM_WRITENOP // bug in code? (clean up log)
+ AM_RANGE(0x0009ce, 0x0009cf) AM_WRITENOP // bug in code? (clean up log)
+ AM_RANGE(0x0009d2, 0x0009d3) AM_WRITENOP // bug in code? (clean up log)
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // Main Ram
- AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram") // palette
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // Main Ram
+ AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram") // palette
AM_RANGE(0x240000, 0x240fff) AM_RAM AM_SHARE("spritera1")
AM_RANGE(0x280000, 0x280fff) AM_RAM AM_SHARE("spritera2")
AM_RANGE(0x2c0000, 0x2c0fff) AM_RAM_WRITE(k3_bgram_w) AM_SHARE("bgram")
@@ -166,7 +166,7 @@ static ADDRESS_MAP_START( k3_map, AS_PROGRAM, 16, k3_state )
AM_RANGE(0x480000, 0x480001) AM_READ_PORT("DSW")
AM_RANGE(0x4c0000, 0x4c0001) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0xff00)
AM_RANGE(0x500000, 0x500001) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0xff00)
- AM_RANGE(0x8c0000, 0x8cffff) AM_RAM // not used?
+ AM_RANGE(0x8c0000, 0x8cffff) AM_RAM // not used?
ADDRESS_MAP_END
static INPUT_PORTS_START( k3 )
@@ -193,10 +193,10 @@ static INPUT_PORTS_START( k3 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Are these used at all? */
+ PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Are these used at all? */
PORT_START("DSW")
- PORT_DIPNAME( 0x007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
+ PORT_DIPNAME( 0x007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
PORT_DIPSETTING( 0x0002, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0001, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0005, DEF_STR( 3C_1C ) )
@@ -205,21 +205,21 @@ static INPUT_PORTS_START( k3 )
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x0003, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0018, 0x0008, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5")
+ PORT_DIPNAME( 0x0018, 0x0008, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5")
PORT_DIPSETTING( 0x0000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0008, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0010, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0018, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x0060, 0x0060, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:6,7")
+ PORT_DIPNAME( 0x0060, 0x0060, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:6,7")
PORT_DIPSETTING( 0x0040, "2" )
PORT_DIPSETTING( 0x0060, "3" )
PORT_DIPSETTING( 0x0020, "4" )
PORT_DIPSETTING( 0x0000, "5" )
PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:8" )
- PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
PORT_DIPSETTING( 0x0200, DEF_STR( Yes ) )
PORT_DIPUNKNOWN_DIPLOC( 0x0400, 0x0400, "SW2:3" )
@@ -239,7 +239,7 @@ static const gfx_layout k3_layout =
{ 0,1,2,3,4,5,6,7 },
{ 0,8,16,24,32,40,48,56, 64, 72, 80, 88, 96, 104, 112, 120 },
{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128,
- 8*128, 9*128,10*128,11*128,12*128,13*128,14*128,15*128 },
+ 8*128, 9*128,10*128,11*128,12*128,13*128,14*128,15*128 },
16*128
};
diff --git a/src/mame/drivers/20pacgal.c b/src/mame/drivers/20pacgal.c
index 5aecb79152b..1d4a32d7114 100644
--- a/src/mame/drivers/20pacgal.c
+++ b/src/mame/drivers/20pacgal.c
@@ -95,9 +95,9 @@ Graphics: CY37256P160-83AC x 2 (Ultra37000 CPLD family - 160 pin TQFP, 256 Macro
*
*************************************/
-#define MASTER_CLOCK (XTAL_73_728MHz)
-#define MAIN_CPU_CLOCK (MASTER_CLOCK / 4) /* divider is either 3 or 4 */
-#define NAMCO_AUDIO_CLOCK (MASTER_CLOCK / 4 / 6 / 32)
+#define MASTER_CLOCK (XTAL_73_728MHz)
+#define MAIN_CPU_CLOCK (MASTER_CLOCK / 4) /* divider is either 3 or 4 */
+#define NAMCO_AUDIO_CLOCK (MASTER_CLOCK / 4 / 6 / 32)
@@ -129,8 +129,8 @@ WRITE8_MEMBER(_20pacgal_state::timer_pulse_w)
static const namco_interface namco_config =
{
- 3, /* number of voices */
- 0 /* stereo */
+ 3, /* number of voices */
+ 0 /* stereo */
};
@@ -233,8 +233,8 @@ static ADDRESS_MAP_START( 20pacgal_map, AS_PROGRAM, 8, _20pacgal_state )
AM_RANGE(0x44800, 0x45eff) AM_RAM
AM_RANGE(0x45f00, 0x45fff) AM_DEVWRITE_LEGACY("namco", namcos1_cus30_w)
AM_RANGE(0x46000, 0x46fff) AM_WRITEONLY AM_SHARE("char_gfx_ram")
- AM_RANGE(0x47100, 0x47100) AM_RAM /* leftover from original Galaga code */
- AM_RANGE(0x48000, 0x49fff) AM_READ_BANK("bank1") AM_WRITE(ram_48000_w) /* this should be a mirror of 08000-09ffff */
+ AM_RANGE(0x47100, 0x47100) AM_RAM /* leftover from original Galaga code */
+ AM_RANGE(0x48000, 0x49fff) AM_READ_BANK("bank1") AM_WRITE(ram_48000_w) /* this should be a mirror of 08000-09ffff */
AM_RANGE(0x4c000, 0x4dfff) AM_WRITE(sprite_gfx_w)
AM_RANGE(0x4e000, 0x4e17f) AM_WRITE(sprite_ram_w)
AM_RANGE(0x4e180, 0x4feff) AM_WRITENOP
@@ -251,20 +251,20 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( 20pacgal_io_map, AS_IO, 8, _20pacgal_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x3f) AM_NOP /* Z180 internal registers */
- AM_RANGE(0x40, 0x7f) AM_NOP /* Z180 internal registers */
+ AM_RANGE(0x00, 0x3f) AM_NOP /* Z180 internal registers */
+ AM_RANGE(0x40, 0x7f) AM_NOP /* Z180 internal registers */
AM_RANGE(0x80, 0x80) AM_READ_PORT("P1")
AM_RANGE(0x81, 0x81) AM_READ_PORT("P2")
AM_RANGE(0x82, 0x82) AM_READ_PORT("SERVICE")
AM_RANGE(0x80, 0x80) AM_WRITE(watchdog_reset_w)
- AM_RANGE(0x81, 0x81) AM_WRITE(timer_pulse_w) /* ??? pulsed by the timer irq */
+ AM_RANGE(0x81, 0x81) AM_WRITE(timer_pulse_w) /* ??? pulsed by the timer irq */
AM_RANGE(0x82, 0x82) AM_WRITE(irqack_w)
- AM_RANGE(0x84, 0x84) AM_NOP /* ?? */
- AM_RANGE(0x85, 0x86) AM_WRITEONLY AM_SHARE("stars_seed") /* stars: rng seed (lo/hi) */
+ AM_RANGE(0x84, 0x84) AM_NOP /* ?? */
+ AM_RANGE(0x85, 0x86) AM_WRITEONLY AM_SHARE("stars_seed") /* stars: rng seed (lo/hi) */
AM_RANGE(0x87, 0x87) AM_READ_PORT("EEPROMIN") AM_WRITE_PORT("EEPROMOUT")
AM_RANGE(0x88, 0x88) AM_WRITE(ram_bank_select_w)
AM_RANGE(0x89, 0x89) AM_DEVWRITE("dac", dac_device, write_signed8)
- AM_RANGE(0x8a, 0x8a) AM_WRITEONLY AM_SHARE("stars_ctrl") /* stars: bits 3-4 = active set; bit 5 = enable */
+ AM_RANGE(0x8a, 0x8a) AM_WRITEONLY AM_SHARE("stars_ctrl") /* stars: bits 3-4 = active set; bit 5 = enable */
AM_RANGE(0x8b, 0x8b) AM_WRITEONLY AM_SHARE("flip")
AM_RANGE(0x8f, 0x8f) AM_WRITE(_20pacgal_coin_counter_w)
ADDRESS_MAP_END
@@ -309,12 +309,12 @@ static INPUT_PORTS_START( 20pacgal )
PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
PORT_START( "EEPROMIN" )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit) /* bit 7 is EEPROM data */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit) /* bit 7 is EEPROM data */
PORT_START( "EEPROMOUT" )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_device, set_cs_line) /* bit 5 is cs (active low) */
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_device, set_clock_line) /* bit 6 is clock (active high) */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_device, write_bit) /* bit 7 is data */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_device, set_cs_line) /* bit 5 is cs (active low) */
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_device, set_clock_line) /* bit 6 is clock (active high) */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OUTPUT ) PORT_WRITE_LINE_DEVICE_MEMBER("eeprom", eeprom_device, write_bit) /* bit 7 is data */
INPUT_PORTS_END
@@ -410,7 +410,7 @@ ROM_START( 25pacman ) /* Revision 2.00 */
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "pacman_25th_rev2.0.u13", 0x00000, 0x40000, CRC(99a52784) SHA1(6222c2eb686e65ba23ca376ff4392be1bc826a03) ) /* Label printed Rev 2.0, program says Rev 2.00 */
- ROM_REGION( 0x8000, "proms", 0 ) /* palette */
+ ROM_REGION( 0x8000, "proms", 0 ) /* palette */
ROM_LOAD( "pacman_25th.u14", 0x0000, 0x8000, CRC(c19d9ad0) SHA1(002581fbc2c32cdf7cfb0b0f64061591a462ec14) ) /* Same as the MS. Pacman / Galaga graphics rom */
ROM_END
@@ -422,7 +422,7 @@ ROM_START( 20pacgal ) /* Version 1.08 */
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "ms_pac-galaga_v1.08.u13", 0x00000, 0x40000, CRC(2ea16809) SHA1(27f041bdbb590917e9dcb70c21aa6b6d6c9f04fb) ) /* Also found labeled as "V1.08 HO" */
- ROM_REGION( 0x8000, "proms", 0 ) /* palette */
+ ROM_REGION( 0x8000, "proms", 0 ) /* palette */
ROM_LOAD( "ms_pac-galaga.u14", 0x0000, 0x8000, CRC(c19d9ad0) SHA1(002581fbc2c32cdf7cfb0b0f64061591a462ec14) )
ROM_END
@@ -430,7 +430,7 @@ ROM_START( 20pacgalr4 ) /* Version 1.04 */
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "ms_pac-galaga_v1.04.u13", 0x00000, 0x40000, CRC(6c474d2d) SHA1(5a150fc9d2ed0e908385b9f9d532aa33cf80dba4) )
- ROM_REGION( 0x8000, "proms", 0 ) /* palette */
+ ROM_REGION( 0x8000, "proms", 0 ) /* palette */
ROM_LOAD( "ms_pac-galaga.u14", 0x0000, 0x8000, CRC(c19d9ad0) SHA1(002581fbc2c32cdf7cfb0b0f64061591a462ec14) )
ROM_END
@@ -438,7 +438,7 @@ ROM_START( 20pacgalr3 ) /* Version 1.03 */
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "ms_pac-galaga_v1.03.u13", 0x00000, 0x40000, CRC(e13dce63) SHA1(c8943f082883c423210fc3c97323222afb00f0a2) )
- ROM_REGION( 0x8000, "proms", 0 ) /* palette */
+ ROM_REGION( 0x8000, "proms", 0 ) /* palette */
ROM_LOAD( "ms_pac-galaga.u14", 0x0000, 0x8000, CRC(c19d9ad0) SHA1(002581fbc2c32cdf7cfb0b0f64061591a462ec14) )
ROM_END
@@ -446,7 +446,7 @@ ROM_START( 20pacgalr2 ) /* Version 1.02 */
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "ms_pac-galaga_v1.02.u13", 0x00000, 0x40000, CRC(b939f805) SHA1(5fe9470601156dfc2d339c94fd8f0aa4db197760) )
- ROM_REGION( 0x8000, "proms", 0 ) /* palette */
+ ROM_REGION( 0x8000, "proms", 0 ) /* palette */
ROM_LOAD( "ms_pac-galaga.u14", 0x0000, 0x8000, CRC(c19d9ad0) SHA1(002581fbc2c32cdf7cfb0b0f64061591a462ec14) )
ROM_END
@@ -454,7 +454,7 @@ ROM_START( 20pacgalr1 ) /* Version 1.01 */
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "ms_pac-galaga_v1.01.u13", 0x00000, 0x40000, CRC(77159582) SHA1(c05e005a941cbdc806dcd76b315069362c792a72) )
- ROM_REGION( 0x8000, "proms", 0 ) /* palette */
+ ROM_REGION( 0x8000, "proms", 0 ) /* palette */
ROM_LOAD( "ms_pac-galaga.u14", 0x0000, 0x8000, CRC(c19d9ad0) SHA1(002581fbc2c32cdf7cfb0b0f64061591a462ec14) )
ROM_END
@@ -462,7 +462,7 @@ ROM_START( 20pacgalr0 ) /* Version 1.00 */
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD( "ms_pac-galaga_v1.0.u13", 0x00000, 0x40000, CRC(3c92a269) SHA1(a616d912393f4e49b95231d72eec48567f46fc00) ) /* Label printed V1.0, program says v1.00 */
- ROM_REGION( 0x8000, "proms", 0 ) /* palette */
+ ROM_REGION( 0x8000, "proms", 0 ) /* palette */
ROM_LOAD( "ms_pac-galaga.u14", 0x0000, 0x8000, CRC(c19d9ad0) SHA1(002581fbc2c32cdf7cfb0b0f64061591a462ec14) )
ROM_END
diff --git a/src/mame/drivers/2mindril.c b/src/mame/drivers/2mindril.c
index 6f929afcda7..605acaee421 100644
--- a/src/mame/drivers/2mindril.c
+++ b/src/mame/drivers/2mindril.c
@@ -43,15 +43,15 @@ class _2mindril_state : public taito_f3_state
public:
_2mindril_state(const machine_config &mconfig, device_type type, const char *tag)
: taito_f3_state(mconfig, type, tag),
- m_iodata(*this, "iodata") { }
+ m_iodata(*this, "iodata") { }
/* memory pointers */
required_shared_ptr<UINT16> m_iodata;
/* input-related */
UINT16 m_defender_sensor;
- UINT16 m_shutter_sensor;
- UINT16 irq_reg;
+ UINT16 m_shutter_sensor;
+ UINT16 irq_reg;
/* devices */
cpu_device *m_maincpu;
@@ -77,7 +77,7 @@ READ16_MEMBER(_2mindril_state::drill_io_r)
// if (offset * 2 == 0x4)
/*popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x", space.device().safe_pc(), m_iodata[0/2], m_iodata[2/2], m_iodata[4/2], m_iodata[6/2],
- m_iodata[8/2], m_iodata[0xa/2], m_iodata[0xc/2], m_iodata[0xe/2]);*/
+ m_iodata[8/2], m_iodata[0xa/2], m_iodata[0xc/2], m_iodata[0xe/2]);*/
switch(offset)
{
@@ -185,11 +185,11 @@ WRITE16_MEMBER(_2mindril_state::drill_irq_w)
{
/*
- (note: could rather be irq mask)
- ---- ---- ---x ---- irq lv 5 ack, 0->1 latch
- ---- ---- ---- x--- irq lv 4 ack, 0->1 latch
- ---- ---- -??- -??? connected to the other levels?
- */
+ (note: could rather be irq mask)
+ ---- ---- ---x ---- irq lv 5 ack, 0->1 latch
+ ---- ---- ---- x--- irq lv 4 ack, 0->1 latch
+ ---- ---- -??- -??? connected to the other levels?
+ */
if(((irq_reg & 8) == 0) && data & 8)
machine().device("maincpu")->execute().set_input_line(4, CLEAR_LINE);
@@ -345,7 +345,7 @@ static const gfx_layout charlayout =
256,
4,
{ 0,1,2,3 },
- { 20, 16, 28, 24, 4, 0, 12, 8 },
+ { 20, 16, 28, 24, 4, 0, 12, 8 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
32*8
};
@@ -356,7 +356,7 @@ static const gfx_layout pivotlayout =
2048,
4,
{ 0,1,2,3 },
- { 20, 16, 28, 24, 4, 0, 12, 8 },
+ { 20, 16, 28, 24, 4, 0, 12, 8 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
32*8
};
@@ -365,7 +365,7 @@ static const gfx_layout spriteram_layout =
{
16,16,
RGN_FRAC(1,2),
- 6, /* Palettes have 4 bpp indexes despite up to 6 bpp data */
+ 6, /* Palettes have 4 bpp indexes despite up to 6 bpp data */
{ RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+1, 0, 1, 2, 3 },
{
4, 0, 12, 8,
@@ -374,29 +374,29 @@ static const gfx_layout spriteram_layout =
48+4, 48+0, 48+12, 48+8 },
{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
- 128*8 /* every sprite takes 128 consecutive bytes */
+ 128*8 /* every sprite takes 128 consecutive bytes */
};
static const gfx_layout tile_layout =
{
16,16,
RGN_FRAC(1,2),
- 6, /* Palettes have 4 bpp indexes despite up to 6 bpp data */
+ 6, /* Palettes have 4 bpp indexes despite up to 6 bpp data */
{ RGN_FRAC(1,2)+2, RGN_FRAC(1,2)+3, 0, 1, 2, 3 },
{
4, 0, 16+4, 16+0,
- 8+4, 8+0, 24+4, 24+0,
+ 8+4, 8+0, 24+4, 24+0,
32+4, 32+0, 48+4, 48+0,
- 40+4, 40+0, 56+4, 56+0,
+ 40+4, 40+0, 56+4, 56+0,
},
{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
- 128*8 /* every sprite takes 128 consecutive bytes */
+ 128*8 /* every sprite takes 128 consecutive bytes */
};
static GFXDECODE_START( 2mindril )
GFXDECODE_ENTRY( NULL, 0x000000, charlayout, 0x0000, 0x0400>>4 ) /* Dynamically modified */
- GFXDECODE_ENTRY( "gfx2", 0x000000, tile_layout, 0x0000, 0x2000>>4 ) /* Tiles area */
+ GFXDECODE_ENTRY( "gfx2", 0x000000, tile_layout, 0x0000, 0x2000>>4 ) /* Tiles area */
GFXDECODE_ENTRY( "gfx1", 0x000000, spriteram_layout, 0x1000, 0x1000>>4 ) /* Sprites area */
GFXDECODE_ENTRY( NULL, 0x000000, pivotlayout, 0x0000, 0x400>>4 ) /* Dynamically modified */
GFXDECODE_END
@@ -505,17 +505,17 @@ void _2mindril_state::tile_decode()
/* Setup ROM formats:
- Some games will only use 4 or 5 bpp sprites, and some only use 4 bpp tiles,
- I don't believe this is software or prom controlled but simply the unused data lines
- are tied low on the game board if unused. This is backed up by the fact the palette
- indices are always related to 4 bpp data, even in 6 bpp games.
+ Some games will only use 4 or 5 bpp sprites, and some only use 4 bpp tiles,
+ I don't believe this is software or prom controlled but simply the unused data lines
+ are tied low on the game board if unused. This is backed up by the fact the palette
+ indices are always related to 4 bpp data, even in 6 bpp games.
- Most (all?) games with 5bpp tiles have the sixth bit set. Also, in Arabian Magic
- sprites 1200-120f contain 6bpp data which is probably bogus.
- VIDEO_START( f3 ) clears the fifth and sixth bit of the decoded graphics according
- to the bit depth specified in f3_config_table.
+ Most (all?) games with 5bpp tiles have the sixth bit set. Also, in Arabian Magic
+ sprites 1200-120f contain 6bpp data which is probably bogus.
+ VIDEO_START( f3 ) clears the fifth and sixth bit of the decoded graphics according
+ to the bit depth specified in f3_config_table.
- */
+ */
offset = size/2;
for (i = size/2+size/4; i<size; i+=2)
diff --git a/src/mame/drivers/30test.c b/src/mame/drivers/30test.c
index 62aba6d8d06..c3a94a06455 100644
--- a/src/mame/drivers/30test.c
+++ b/src/mame/drivers/30test.c
@@ -136,7 +136,7 @@ static ADDRESS_MAP_START( namco_30test_map, AS_PROGRAM, 8, namco_30test_state )
AM_RANGE(0x007e, 0x007e) AM_READWRITE(hc11_okibank_r,hc11_okibank_w)
AM_RANGE(0x0040, 0x007f) AM_RAM // more internal I/O, HC11 change pending
AM_RANGE(0x0080, 0x037f) AM_RAM // internal RAM
- AM_RANGE(0x0d80, 0x0dbf) AM_RAM // EEPROM read-back data goes there
+ AM_RANGE(0x0d80, 0x0dbf) AM_RAM // EEPROM read-back data goes there
AM_RANGE(0x2000, 0x2000) AM_DEVREADWRITE("oki", okim6295_device, read, write)
/* 0x401e-0x401f: time */
AM_RANGE(0x4000, 0x401f) AM_WRITE(namco_30test_led_w) // 7-seg leds
@@ -234,7 +234,7 @@ void namco_30test_state::machine_reset()
static const hc11_config namco_30test_config =
{
- 0, //has extended internal I/O
+ 0, //has extended internal I/O
768, //internal RAM size
0x00 //registers are at 0-0x100
};
diff --git a/src/mame/drivers/39in1.c b/src/mame/drivers/39in1.c
index bf642756700..4cbd268cc85 100644
--- a/src/mame/drivers/39in1.c
+++ b/src/mame/drivers/39in1.c
@@ -169,7 +169,7 @@ WRITE32_MEMBER(_39in1_state::pxa255_i2s_w)
count--;
sprintf(filename, "39in1_%04d.raw", count);
audio_dump = fopen(filename, "wb");
- }
+ }
#endif
switch(PXA255_I2S_BASE_ADDR | (offset << 2))
{
@@ -384,7 +384,7 @@ TIMER_CALLBACK_MEMBER(_39in1_state::pxa255_dma_dma_end)
dma_regs->dcsr[param] |= PXA255_DCSR_ENDINTR;
}
if(!(dma_regs->ddadr[param] & PXA255_DDADR_STOP) &&
- (dma_regs->dcsr[param] & PXA255_DCSR_RUN))
+ (dma_regs->dcsr[param] & PXA255_DCSR_RUN))
{
if(dma_regs->dcsr[param] & PXA255_DCSR_RUN)
{
@@ -410,49 +410,49 @@ READ32_MEMBER(_39in1_state::pxa255_dma_r)
switch(PXA255_DMA_BASE_ADDR | (offset << 2))
{
- case PXA255_DCSR0: case PXA255_DCSR1: case PXA255_DCSR2: case PXA255_DCSR3:
- case PXA255_DCSR4: case PXA255_DCSR5: case PXA255_DCSR6: case PXA255_DCSR7:
- case PXA255_DCSR8: case PXA255_DCSR9: case PXA255_DCSR10: case PXA255_DCSR11:
- case PXA255_DCSR12: case PXA255_DCSR13: case PXA255_DCSR14: case PXA255_DCSR15:
+ case PXA255_DCSR0: case PXA255_DCSR1: case PXA255_DCSR2: case PXA255_DCSR3:
+ case PXA255_DCSR4: case PXA255_DCSR5: case PXA255_DCSR6: case PXA255_DCSR7:
+ case PXA255_DCSR8: case PXA255_DCSR9: case PXA255_DCSR10: case PXA255_DCSR11:
+ case PXA255_DCSR12: case PXA255_DCSR13: case PXA255_DCSR14: case PXA255_DCSR15:
verboselog( machine(), 4, "pxa255_dma_r: DMA Channel Control/Status Register %d: %08x & %08x\n", offset, dma_regs->dcsr[offset], mem_mask );
return dma_regs->dcsr[offset];
case PXA255_DINT:
if (0) verboselog( machine(), 3, "pxa255_dma_r: DMA Interrupt Register: %08x & %08x\n", dma_regs->dint, mem_mask );
return dma_regs->dint;
- case PXA255_DRCMR0: case PXA255_DRCMR1: case PXA255_DRCMR2: case PXA255_DRCMR3:
- case PXA255_DRCMR4: case PXA255_DRCMR5: case PXA255_DRCMR6: case PXA255_DRCMR7:
- case PXA255_DRCMR8: case PXA255_DRCMR9: case PXA255_DRCMR10: case PXA255_DRCMR11:
- case PXA255_DRCMR12: case PXA255_DRCMR13: case PXA255_DRCMR14: case PXA255_DRCMR15:
- case PXA255_DRCMR16: case PXA255_DRCMR17: case PXA255_DRCMR18: case PXA255_DRCMR19:
- case PXA255_DRCMR20: case PXA255_DRCMR21: case PXA255_DRCMR22: case PXA255_DRCMR23:
- case PXA255_DRCMR24: case PXA255_DRCMR25: case PXA255_DRCMR26: case PXA255_DRCMR27:
- case PXA255_DRCMR28: case PXA255_DRCMR29: case PXA255_DRCMR30: case PXA255_DRCMR31:
- case PXA255_DRCMR32: case PXA255_DRCMR33: case PXA255_DRCMR34: case PXA255_DRCMR35:
- case PXA255_DRCMR36: case PXA255_DRCMR37: case PXA255_DRCMR38: case PXA255_DRCMR39:
+ case PXA255_DRCMR0: case PXA255_DRCMR1: case PXA255_DRCMR2: case PXA255_DRCMR3:
+ case PXA255_DRCMR4: case PXA255_DRCMR5: case PXA255_DRCMR6: case PXA255_DRCMR7:
+ case PXA255_DRCMR8: case PXA255_DRCMR9: case PXA255_DRCMR10: case PXA255_DRCMR11:
+ case PXA255_DRCMR12: case PXA255_DRCMR13: case PXA255_DRCMR14: case PXA255_DRCMR15:
+ case PXA255_DRCMR16: case PXA255_DRCMR17: case PXA255_DRCMR18: case PXA255_DRCMR19:
+ case PXA255_DRCMR20: case PXA255_DRCMR21: case PXA255_DRCMR22: case PXA255_DRCMR23:
+ case PXA255_DRCMR24: case PXA255_DRCMR25: case PXA255_DRCMR26: case PXA255_DRCMR27:
+ case PXA255_DRCMR28: case PXA255_DRCMR29: case PXA255_DRCMR30: case PXA255_DRCMR31:
+ case PXA255_DRCMR32: case PXA255_DRCMR33: case PXA255_DRCMR34: case PXA255_DRCMR35:
+ case PXA255_DRCMR36: case PXA255_DRCMR37: case PXA255_DRCMR38: case PXA255_DRCMR39:
verboselog( machine(), 3, "pxa255_dma_r: DMA Request to Channel Map Register %d: %08x & %08x\n", offset - (0x100 >> 2), 0, mem_mask );
return dma_regs->drcmr[offset - (0x100 >> 2)];
- case PXA255_DDADR0: case PXA255_DDADR1: case PXA255_DDADR2: case PXA255_DDADR3:
- case PXA255_DDADR4: case PXA255_DDADR5: case PXA255_DDADR6: case PXA255_DDADR7:
- case PXA255_DDADR8: case PXA255_DDADR9: case PXA255_DDADR10: case PXA255_DDADR11:
- case PXA255_DDADR12: case PXA255_DDADR13: case PXA255_DDADR14: case PXA255_DDADR15:
+ case PXA255_DDADR0: case PXA255_DDADR1: case PXA255_DDADR2: case PXA255_DDADR3:
+ case PXA255_DDADR4: case PXA255_DDADR5: case PXA255_DDADR6: case PXA255_DDADR7:
+ case PXA255_DDADR8: case PXA255_DDADR9: case PXA255_DDADR10: case PXA255_DDADR11:
+ case PXA255_DDADR12: case PXA255_DDADR13: case PXA255_DDADR14: case PXA255_DDADR15:
verboselog( machine(), 3, "pxa255_dma_r: DMA Descriptor Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask );
return dma_regs->ddadr[(offset - (0x200 >> 2)) >> 2];
- case PXA255_DSADR0: case PXA255_DSADR1: case PXA255_DSADR2: case PXA255_DSADR3:
- case PXA255_DSADR4: case PXA255_DSADR5: case PXA255_DSADR6: case PXA255_DSADR7:
- case PXA255_DSADR8: case PXA255_DSADR9: case PXA255_DSADR10: case PXA255_DSADR11:
- case PXA255_DSADR12: case PXA255_DSADR13: case PXA255_DSADR14: case PXA255_DSADR15:
+ case PXA255_DSADR0: case PXA255_DSADR1: case PXA255_DSADR2: case PXA255_DSADR3:
+ case PXA255_DSADR4: case PXA255_DSADR5: case PXA255_DSADR6: case PXA255_DSADR7:
+ case PXA255_DSADR8: case PXA255_DSADR9: case PXA255_DSADR10: case PXA255_DSADR11:
+ case PXA255_DSADR12: case PXA255_DSADR13: case PXA255_DSADR14: case PXA255_DSADR15:
verboselog( machine(), 3, "pxa255_dma_r: DMA Source Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask );
return dma_regs->dsadr[(offset - (0x200 >> 2)) >> 2];
- case PXA255_DTADR0: case PXA255_DTADR1: case PXA255_DTADR2: case PXA255_DTADR3:
- case PXA255_DTADR4: case PXA255_DTADR5: case PXA255_DTADR6: case PXA255_DTADR7:
- case PXA255_DTADR8: case PXA255_DTADR9: case PXA255_DTADR10: case PXA255_DTADR11:
- case PXA255_DTADR12: case PXA255_DTADR13: case PXA255_DTADR14: case PXA255_DTADR15:
+ case PXA255_DTADR0: case PXA255_DTADR1: case PXA255_DTADR2: case PXA255_DTADR3:
+ case PXA255_DTADR4: case PXA255_DTADR5: case PXA255_DTADR6: case PXA255_DTADR7:
+ case PXA255_DTADR8: case PXA255_DTADR9: case PXA255_DTADR10: case PXA255_DTADR11:
+ case PXA255_DTADR12: case PXA255_DTADR13: case PXA255_DTADR14: case PXA255_DTADR15:
verboselog( machine(), 3, "pxa255_dma_r: DMA Target Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask );
return dma_regs->dtadr[(offset - (0x200 >> 2)) >> 2];
- case PXA255_DCMD0: case PXA255_DCMD1: case PXA255_DCMD2: case PXA255_DCMD3:
- case PXA255_DCMD4: case PXA255_DCMD5: case PXA255_DCMD6: case PXA255_DCMD7:
- case PXA255_DCMD8: case PXA255_DCMD9: case PXA255_DCMD10: case PXA255_DCMD11:
- case PXA255_DCMD12: case PXA255_DCMD13: case PXA255_DCMD14: case PXA255_DCMD15:
+ case PXA255_DCMD0: case PXA255_DCMD1: case PXA255_DCMD2: case PXA255_DCMD3:
+ case PXA255_DCMD4: case PXA255_DCMD5: case PXA255_DCMD6: case PXA255_DCMD7:
+ case PXA255_DCMD8: case PXA255_DCMD9: case PXA255_DCMD10: case PXA255_DCMD11:
+ case PXA255_DCMD12: case PXA255_DCMD13: case PXA255_DCMD14: case PXA255_DCMD15:
verboselog( machine(), 3, "pxa255_dma_r: DMA Command Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask );
return dma_regs->dcmd[(offset - (0x200 >> 2)) >> 2];
default:
@@ -468,10 +468,10 @@ WRITE32_MEMBER(_39in1_state::pxa255_dma_w)
switch(PXA255_DMA_BASE_ADDR | (offset << 2))
{
- case PXA255_DCSR0: case PXA255_DCSR1: case PXA255_DCSR2: case PXA255_DCSR3:
- case PXA255_DCSR4: case PXA255_DCSR5: case PXA255_DCSR6: case PXA255_DCSR7:
- case PXA255_DCSR8: case PXA255_DCSR9: case PXA255_DCSR10: case PXA255_DCSR11:
- case PXA255_DCSR12: case PXA255_DCSR13: case PXA255_DCSR14: case PXA255_DCSR15:
+ case PXA255_DCSR0: case PXA255_DCSR1: case PXA255_DCSR2: case PXA255_DCSR3:
+ case PXA255_DCSR4: case PXA255_DCSR5: case PXA255_DCSR6: case PXA255_DCSR7:
+ case PXA255_DCSR8: case PXA255_DCSR9: case PXA255_DCSR10: case PXA255_DCSR11:
+ case PXA255_DCSR12: case PXA255_DCSR13: case PXA255_DCSR14: case PXA255_DCSR15:
if (0) verboselog( machine(), 3, "pxa255_dma_w: DMA Channel Control/Status Register %d: %08x & %08x\n", offset, data, mem_mask );
dma_regs->dcsr[offset] &= ~(data & 0x00000007);
dma_regs->dcsr[offset] &= ~0x60000000;
@@ -498,44 +498,44 @@ WRITE32_MEMBER(_39in1_state::pxa255_dma_w)
verboselog( machine(), 3, "pxa255_dma_w: DMA Interrupt Register: %08x & %08x\n", data, mem_mask );
dma_regs->dint &= ~data;
break;
- case PXA255_DRCMR0: case PXA255_DRCMR1: case PXA255_DRCMR2: case PXA255_DRCMR3:
- case PXA255_DRCMR4: case PXA255_DRCMR5: case PXA255_DRCMR6: case PXA255_DRCMR7:
- case PXA255_DRCMR8: case PXA255_DRCMR9: case PXA255_DRCMR10: case PXA255_DRCMR11:
- case PXA255_DRCMR12: case PXA255_DRCMR13: case PXA255_DRCMR14: case PXA255_DRCMR15:
- case PXA255_DRCMR16: case PXA255_DRCMR17: case PXA255_DRCMR18: case PXA255_DRCMR19:
- case PXA255_DRCMR20: case PXA255_DRCMR21: case PXA255_DRCMR22: case PXA255_DRCMR23:
- case PXA255_DRCMR24: case PXA255_DRCMR25: case PXA255_DRCMR26: case PXA255_DRCMR27:
- case PXA255_DRCMR28: case PXA255_DRCMR29: case PXA255_DRCMR30: case PXA255_DRCMR31:
- case PXA255_DRCMR32: case PXA255_DRCMR33: case PXA255_DRCMR34: case PXA255_DRCMR35:
- case PXA255_DRCMR36: case PXA255_DRCMR37: case PXA255_DRCMR38: case PXA255_DRCMR39:
+ case PXA255_DRCMR0: case PXA255_DRCMR1: case PXA255_DRCMR2: case PXA255_DRCMR3:
+ case PXA255_DRCMR4: case PXA255_DRCMR5: case PXA255_DRCMR6: case PXA255_DRCMR7:
+ case PXA255_DRCMR8: case PXA255_DRCMR9: case PXA255_DRCMR10: case PXA255_DRCMR11:
+ case PXA255_DRCMR12: case PXA255_DRCMR13: case PXA255_DRCMR14: case PXA255_DRCMR15:
+ case PXA255_DRCMR16: case PXA255_DRCMR17: case PXA255_DRCMR18: case PXA255_DRCMR19:
+ case PXA255_DRCMR20: case PXA255_DRCMR21: case PXA255_DRCMR22: case PXA255_DRCMR23:
+ case PXA255_DRCMR24: case PXA255_DRCMR25: case PXA255_DRCMR26: case PXA255_DRCMR27:
+ case PXA255_DRCMR28: case PXA255_DRCMR29: case PXA255_DRCMR30: case PXA255_DRCMR31:
+ case PXA255_DRCMR32: case PXA255_DRCMR33: case PXA255_DRCMR34: case PXA255_DRCMR35:
+ case PXA255_DRCMR36: case PXA255_DRCMR37: case PXA255_DRCMR38: case PXA255_DRCMR39:
verboselog( machine(), 3, "pxa255_dma_w: DMA Request to Channel Map Register %d: %08x & %08x\n", offset - (0x100 >> 2), data, mem_mask );
dma_regs->drcmr[offset - (0x100 >> 2)] = data & 0x0000008f;
break;
- case PXA255_DDADR0: case PXA255_DDADR1: case PXA255_DDADR2: case PXA255_DDADR3:
- case PXA255_DDADR4: case PXA255_DDADR5: case PXA255_DDADR6: case PXA255_DDADR7:
- case PXA255_DDADR8: case PXA255_DDADR9: case PXA255_DDADR10: case PXA255_DDADR11:
- case PXA255_DDADR12: case PXA255_DDADR13: case PXA255_DDADR14: case PXA255_DDADR15:
+ case PXA255_DDADR0: case PXA255_DDADR1: case PXA255_DDADR2: case PXA255_DDADR3:
+ case PXA255_DDADR4: case PXA255_DDADR5: case PXA255_DDADR6: case PXA255_DDADR7:
+ case PXA255_DDADR8: case PXA255_DDADR9: case PXA255_DDADR10: case PXA255_DDADR11:
+ case PXA255_DDADR12: case PXA255_DDADR13: case PXA255_DDADR14: case PXA255_DDADR15:
verboselog( machine(), 3, "pxa255_dma_w: DMA Descriptor Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask );
dma_regs->ddadr[(offset - (0x200 >> 2)) >> 2] = data & 0xfffffff1;
break;
- case PXA255_DSADR0: case PXA255_DSADR1: case PXA255_DSADR2: case PXA255_DSADR3:
- case PXA255_DSADR4: case PXA255_DSADR5: case PXA255_DSADR6: case PXA255_DSADR7:
- case PXA255_DSADR8: case PXA255_DSADR9: case PXA255_DSADR10: case PXA255_DSADR11:
- case PXA255_DSADR12: case PXA255_DSADR13: case PXA255_DSADR14: case PXA255_DSADR15:
+ case PXA255_DSADR0: case PXA255_DSADR1: case PXA255_DSADR2: case PXA255_DSADR3:
+ case PXA255_DSADR4: case PXA255_DSADR5: case PXA255_DSADR6: case PXA255_DSADR7:
+ case PXA255_DSADR8: case PXA255_DSADR9: case PXA255_DSADR10: case PXA255_DSADR11:
+ case PXA255_DSADR12: case PXA255_DSADR13: case PXA255_DSADR14: case PXA255_DSADR15:
verboselog( machine(), 3, "pxa255_dma_w: DMA Source Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask );
dma_regs->dsadr[(offset - (0x200 >> 2)) >> 2] = data & 0xfffffffc;
break;
- case PXA255_DTADR0: case PXA255_DTADR1: case PXA255_DTADR2: case PXA255_DTADR3:
- case PXA255_DTADR4: case PXA255_DTADR5: case PXA255_DTADR6: case PXA255_DTADR7:
- case PXA255_DTADR8: case PXA255_DTADR9: case PXA255_DTADR10: case PXA255_DTADR11:
- case PXA255_DTADR12: case PXA255_DTADR13: case PXA255_DTADR14: case PXA255_DTADR15:
+ case PXA255_DTADR0: case PXA255_DTADR1: case PXA255_DTADR2: case PXA255_DTADR3:
+ case PXA255_DTADR4: case PXA255_DTADR5: case PXA255_DTADR6: case PXA255_DTADR7:
+ case PXA255_DTADR8: case PXA255_DTADR9: case PXA255_DTADR10: case PXA255_DTADR11:
+ case PXA255_DTADR12: case PXA255_DTADR13: case PXA255_DTADR14: case PXA255_DTADR15:
verboselog( machine(), 3, "pxa255_dma_w: DMA Target Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask );
dma_regs->dtadr[(offset - (0x200 >> 2)) >> 2] = data & 0xfffffffc;
break;
- case PXA255_DCMD0: case PXA255_DCMD1: case PXA255_DCMD2: case PXA255_DCMD3:
- case PXA255_DCMD4: case PXA255_DCMD5: case PXA255_DCMD6: case PXA255_DCMD7:
- case PXA255_DCMD8: case PXA255_DCMD9: case PXA255_DCMD10: case PXA255_DCMD11:
- case PXA255_DCMD12: case PXA255_DCMD13: case PXA255_DCMD14: case PXA255_DCMD15:
+ case PXA255_DCMD0: case PXA255_DCMD1: case PXA255_DCMD2: case PXA255_DCMD3:
+ case PXA255_DCMD4: case PXA255_DCMD5: case PXA255_DCMD6: case PXA255_DCMD7:
+ case PXA255_DCMD8: case PXA255_DCMD9: case PXA255_DCMD10: case PXA255_DCMD11:
+ case PXA255_DCMD12: case PXA255_DCMD13: case PXA255_DCMD14: case PXA255_DCMD15:
verboselog( machine(), 3, "pxa255_dma_w: DMA Command Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask );
dma_regs->dcmd[(offset - (0x200 >> 2)) >> 2] = data & 0xf067dfff;
break;
@@ -808,8 +808,8 @@ READ32_MEMBER(_39in1_state::pxa255_gpio_r)
verboselog( machine(), 3, "pxa255_gpio_r: *Not Yet Implemented* GPIO Pin-Level Register 1: %08x & %08x\n", gpio_regs->gplr1, mem_mask );
return 0xff9fffff;
/*
- 0x200000 = flip screen
- */
+ 0x200000 = flip screen
+ */
case PXA255_GPLR2:
verboselog( machine(), 3, "pxa255_gpio_r: *Not Yet Implemented* GPIO Pin-Level Register 2: %08x & %08x\n", gpio_regs->gplr2, mem_mask );
return gpio_regs->gplr2;
@@ -1061,8 +1061,8 @@ void _39in1_state::pxa255_lcd_irq_check()
PXA255_LCD_Regs *lcd_regs = &m_lcd_regs;
if(((lcd_regs->lcsr & PXA255_LCSR_BS) != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_BM) == 0) ||
- ((lcd_regs->lcsr & PXA255_LCSR_EOF) != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_EFM) == 0) ||
- ((lcd_regs->lcsr & PXA255_LCSR_SOF) != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_SFM) == 0))
+ ((lcd_regs->lcsr & PXA255_LCSR_EOF) != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_EFM) == 0) ||
+ ((lcd_regs->lcsr & PXA255_LCSR_SOF) != 0 && (lcd_regs->lccr0 & PXA255_LCCR0_SFM) == 0))
{
pxa255_set_irq_line(PXA255_INT_LCD, 1);
}
@@ -1163,58 +1163,58 @@ READ32_MEMBER(_39in1_state::pxa255_lcd_r)
switch(PXA255_LCD_BASE_ADDR | (offset << 2))
{
- case PXA255_LCCR0: // 0x44000000
+ case PXA255_LCCR0: // 0x44000000
verboselog( machine(), 3, "pxa255_lcd_r: LCD Control 0: %08x & %08x\n", lcd_regs->lccr0, mem_mask );
return lcd_regs->lccr0;
- case PXA255_LCCR1: // 0x44000004
+ case PXA255_LCCR1: // 0x44000004
verboselog( machine(), 3, "pxa255_lcd_r: LCD Control 1: %08x & %08x\n", lcd_regs->lccr1, mem_mask );
return lcd_regs->lccr1;
- case PXA255_LCCR2: // 0x44000008
+ case PXA255_LCCR2: // 0x44000008
verboselog( machine(), 3, "pxa255_lcd_r: LCD Control 2: %08x & %08x\n", lcd_regs->lccr2, mem_mask );
return lcd_regs->lccr2;
- case PXA255_LCCR3: // 0x4400000c
+ case PXA255_LCCR3: // 0x4400000c
verboselog( machine(), 3, "pxa255_lcd_r: LCD Control 3: %08x & %08x\n", lcd_regs->lccr3, mem_mask );
return lcd_regs->lccr3;
- case PXA255_FBR0: // 0x44000020
+ case PXA255_FBR0: // 0x44000020
verboselog( machine(), 4, "pxa255_lcd_r: LCD Frame Branch Register 0: %08x & %08x\n", lcd_regs->fbr[0], mem_mask );
return lcd_regs->fbr[0];
- case PXA255_FBR1: // 0x44000024
+ case PXA255_FBR1: // 0x44000024
verboselog( machine(), 3, "pxa255_lcd_r: LCD Frame Branch Register 1: %08x & %08x\n", lcd_regs->fbr[1], mem_mask );
return lcd_regs->fbr[1];
- case PXA255_LCSR: // 0x44000038
+ case PXA255_LCSR: // 0x44000038
verboselog( machine(), 4, "pxa255_lcd_r: LCD Status Register: %08x & %08x\n", lcd_regs->lcsr, mem_mask );
return lcd_regs->lcsr;
- case PXA255_LIIDR: // 0x4400003c
+ case PXA255_LIIDR: // 0x4400003c
verboselog( machine(), 3, "pxa255_lcd_r: LCD Interrupt ID Register: %08x & %08x\n", lcd_regs->liidr, mem_mask );
return lcd_regs->liidr;
- case PXA255_TRGBR: // 0x44000040
+ case PXA255_TRGBR: // 0x44000040
verboselog( machine(), 3, "pxa255_lcd_r: TMED RGB Seed Register: %08x & %08x\n", lcd_regs->trgbr, mem_mask );
return lcd_regs->trgbr;
- case PXA255_TCR: // 0x44000044
+ case PXA255_TCR: // 0x44000044
verboselog( machine(), 3, "pxa255_lcd_r: TMED RGB Seed Register: %08x & %08x\n", lcd_regs->tcr, mem_mask );
return lcd_regs->tcr;
- case PXA255_FDADR0: // 0x44000200
+ case PXA255_FDADR0: // 0x44000200
if (0) verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Frame Descriptor Address Register 0: %08x & %08x\n", lcd_regs->dma[0].fdadr, mem_mask );
return lcd_regs->dma[0].fdadr;
- case PXA255_FSADR0: // 0x44000204
+ case PXA255_FSADR0: // 0x44000204
verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Frame Source Address Register 0: %08x & %08x\n", lcd_regs->dma[0].fsadr, mem_mask );
return lcd_regs->dma[0].fsadr;
- case PXA255_FIDR0: // 0x44000208
+ case PXA255_FIDR0: // 0x44000208
verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Frame ID Register 0: %08x & %08x\n", lcd_regs->dma[0].fidr, mem_mask );
return lcd_regs->dma[0].fidr;
- case PXA255_LDCMD0: // 0x4400020c
+ case PXA255_LDCMD0: // 0x4400020c
if (0) verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Command Register 0: %08x & %08x\n", lcd_regs->dma[0].ldcmd & 0xfff00000, mem_mask );
return lcd_regs->dma[0].ldcmd & 0xfff00000;
- case PXA255_FDADR1: // 0x44000210
+ case PXA255_FDADR1: // 0x44000210
verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Frame Descriptor Address Register 1: %08x & %08x\n", lcd_regs->dma[1].fdadr, mem_mask );
return lcd_regs->dma[1].fdadr;
- case PXA255_FSADR1: // 0x44000214
+ case PXA255_FSADR1: // 0x44000214
verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Frame Source Address Register 1: %08x & %08x\n", lcd_regs->dma[1].fsadr, mem_mask );
return lcd_regs->dma[1].fsadr;
- case PXA255_FIDR1: // 0x44000218
+ case PXA255_FIDR1: // 0x44000218
verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Frame ID Register 1: %08x & %08x\n", lcd_regs->dma[1].fidr, mem_mask );
return lcd_regs->dma[1].fidr;
- case PXA255_LDCMD1: // 0x4400021c
+ case PXA255_LDCMD1: // 0x4400021c
verboselog( machine(), 3, "pxa255_lcd_r: LCD DMA Command Register 1: %08x & %08x\n", lcd_regs->dma[1].ldcmd & 0xfff00000, mem_mask );
return lcd_regs->dma[1].ldcmd & 0xfff00000;
default:
@@ -1230,23 +1230,23 @@ WRITE32_MEMBER(_39in1_state::pxa255_lcd_w)
switch(PXA255_LCD_BASE_ADDR | (offset << 2))
{
- case PXA255_LCCR0: // 0x44000000
+ case PXA255_LCCR0: // 0x44000000
verboselog( machine(), 3, "pxa255_lcd_w: LCD Control 0: %08x & %08x\n", data, mem_mask );
lcd_regs->lccr0 = data & 0x00fffeff;
break;
- case PXA255_LCCR1: // 0x44000004
+ case PXA255_LCCR1: // 0x44000004
verboselog( machine(), 3, "pxa255_lcd_w: LCD Control 1: %08x & %08x\n", data, mem_mask );
lcd_regs->lccr1 = data;
break;
- case PXA255_LCCR2: // 0x44000008
+ case PXA255_LCCR2: // 0x44000008
verboselog( machine(), 3, "pxa255_lcd_w: LCD Control 2: %08x & %08x\n", data, mem_mask );
lcd_regs->lccr2 = data;
break;
- case PXA255_LCCR3: // 0x4400000c
+ case PXA255_LCCR3: // 0x4400000c
verboselog( machine(), 3, "pxa255_lcd_w: LCD Control 3: %08x & %08x\n", data, mem_mask );
lcd_regs->lccr3 = data;
break;
- case PXA255_FBR0: // 0x44000020
+ case PXA255_FBR0: // 0x44000020
verboselog( machine(), 4l, "pxa255_lcd_w: LCD Frame Branch Register 0: %08x & %08x\n", data, mem_mask );
lcd_regs->fbr[0] = data & 0xfffffff3;
if(!lcd_regs->dma[0].eof->enabled())
@@ -1256,7 +1256,7 @@ WRITE32_MEMBER(_39in1_state::pxa255_lcd_w)
pxa255_lcd_irq_check();
}
break;
- case PXA255_FBR1: // 0x44000024
+ case PXA255_FBR1: // 0x44000024
verboselog( machine(), 3, "pxa255_lcd_w: LCD Frame Branch Register 1: %08x & %08x\n", data, mem_mask );
lcd_regs->fbr[1] = data & 0xfffffff3;
if(!lcd_regs->dma[1].eof->enabled())
@@ -1266,23 +1266,23 @@ WRITE32_MEMBER(_39in1_state::pxa255_lcd_w)
pxa255_lcd_irq_check();
}
break;
- case PXA255_LCSR: // 0x44000038
+ case PXA255_LCSR: // 0x44000038
verboselog( machine(), 4, "pxa255_lcd_w: LCD Controller Status Register: %08x & %08x\n", data, mem_mask );
lcd_regs->lcsr &= ~data;
pxa255_lcd_irq_check();
break;
- case PXA255_LIIDR: // 0x4400003c
+ case PXA255_LIIDR: // 0x4400003c
verboselog( machine(), 3, "pxa255_lcd_w: LCD Controller Interrupt ID Register: %08x & %08x\n", data, mem_mask );
break;
- case PXA255_TRGBR: // 0x44000040
+ case PXA255_TRGBR: // 0x44000040
verboselog( machine(), 3, "pxa255_lcd_w: TMED RGB Seed Register: %08x & %08x\n", data, mem_mask );
lcd_regs->trgbr = data & 0x00ffffff;
break;
- case PXA255_TCR: // 0x44000044
+ case PXA255_TCR: // 0x44000044
verboselog( machine(), 3, "pxa255_lcd_w: TMED Control Register: %08x & %08x\n", data, mem_mask );
lcd_regs->tcr = data & 0x00004fff;
break;
- case PXA255_FDADR0: // 0x44000200
+ case PXA255_FDADR0: // 0x44000200
verboselog( machine(), 4, "pxa255_lcd_w: LCD DMA Frame Descriptor Address Register 0: %08x & %08x\n", data, mem_mask );
if(!lcd_regs->dma[0].eof->enabled())
{
@@ -1294,16 +1294,16 @@ WRITE32_MEMBER(_39in1_state::pxa255_lcd_w)
lcd_regs->fbr[0] |= data & 0xfffffff0;
}
break;
- case PXA255_FSADR0: // 0x44000204
+ case PXA255_FSADR0: // 0x44000204
verboselog( machine(), 4, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame Source Address Register 0: %08x & %08x\n", data, mem_mask );
break;
- case PXA255_FIDR0: // 0x44000208
+ case PXA255_FIDR0: // 0x44000208
verboselog( machine(), 4, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame ID Register 0: %08x & %08x\n", data, mem_mask );
break;
- case PXA255_LDCMD0: // 0x4400020c
+ case PXA255_LDCMD0: // 0x4400020c
verboselog( machine(), 4, "pxa255_lcd_w: (Invalid Write) LCD DMA Command Register 0: %08x & %08x\n", data, mem_mask );
break;
- case PXA255_FDADR1: // 0x44000210
+ case PXA255_FDADR1: // 0x44000210
verboselog( machine(), 4, "pxa255_lcd_w: LCD DMA Frame Descriptor Address Register 1: %08x & %08x\n", data, mem_mask );
if(!lcd_regs->dma[1].eof->enabled())
{
@@ -1315,13 +1315,13 @@ WRITE32_MEMBER(_39in1_state::pxa255_lcd_w)
lcd_regs->fbr[1] |= data & 0xfffffff0;
}
break;
- case PXA255_FSADR1: // 0x44000214
+ case PXA255_FSADR1: // 0x44000214
verboselog( machine(), 4, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame Source Address Register 1: %08x & %08x\n", data, mem_mask );
break;
- case PXA255_FIDR1: // 0x44000218
+ case PXA255_FIDR1: // 0x44000218
verboselog( machine(), 4, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame ID Register 1: %08x & %08x\n", data, mem_mask );
break;
- case PXA255_LDCMD1: // 0x4400021c
+ case PXA255_LDCMD1: // 0x4400021c
verboselog( machine(), 4, "pxa255_lcd_w: (Invalid Write) LCD DMA Command Register 1: %08x & %08x\n", data, mem_mask );
break;
default:
@@ -1353,7 +1353,7 @@ READ32_MEMBER(_39in1_state::cpld_r)
if (space.device().safe_pc() == 0x3f04)
{
- return 0xf0; // any non-zero value works here
+ return 0xf0; // any non-zero value works here
}
else if (space.device().safe_pc() == 0xe3af4)
{
@@ -1380,7 +1380,7 @@ READ32_MEMBER(_39in1_state::cpld_r)
default: printf("State 1 unknown offset %x\n", offset); break;
}
}
- else if (m_state == 2) // 29c0: 53 ac 0c 2b a2 07 e6 be 31
+ else if (m_state == 2) // 29c0: 53 ac 0c 2b a2 07 e6 be 31
{
UINT32 seed = m_seed;
UINT32 magic = m_magic;
diff --git a/src/mame/drivers/3do.c b/src/mame/drivers/3do.c
index eecce6e5635..d629660b989 100644
--- a/src/mame/drivers/3do.c
+++ b/src/mame/drivers/3do.c
@@ -99,21 +99,21 @@ Part list of Goldstar 3DO Interactive Multiplayer
-#define X2_CLOCK_PAL 59000000
-#define X2_CLOCK_NTSC 49090000
-#define X601_CLOCK XTAL_16_9344MHz
+#define X2_CLOCK_PAL 59000000
+#define X2_CLOCK_NTSC 49090000
+#define X601_CLOCK XTAL_16_9344MHz
static ADDRESS_MAP_START( 3do_mem, AS_PROGRAM, 32, _3do_state )
- AM_RANGE(0x00000000, 0x001FFFFF) AM_RAMBANK("bank1") AM_SHARE("dram") /* DRAM */
- AM_RANGE(0x00200000, 0x003FFFFF) AM_RAM AM_SHARE("vram") /* VRAM */
- AM_RANGE(0x03000000, 0x030FFFFF) AM_ROMBANK("bank2") /* BIOS */
- AM_RANGE(0x03100000, 0x0313FFFF) AM_RAM /* Brooktree? */
- AM_RANGE(0x03140000, 0x0315FFFF) AM_READWRITE8(_3do_nvarea_r, _3do_nvarea_w, 0x000000ff) /* NVRAM */
- AM_RANGE(0x03180000, 0x031BFFFF) AM_READWRITE(_3do_slow2_r, _3do_slow2_w) /* Slow bus - additional expansion */
- AM_RANGE(0x03200000, 0x0320FFFF) AM_READWRITE(_3do_svf_r, _3do_svf_w) /* special vram access1 */
- AM_RANGE(0x03300000, 0x033FFFFF) AM_READWRITE(_3do_madam_r, _3do_madam_w) /* address decoder */
- AM_RANGE(0x03400000, 0x034FFFFF) AM_READWRITE(_3do_clio_r, _3do_clio_w) /* io controller */
+ AM_RANGE(0x00000000, 0x001FFFFF) AM_RAMBANK("bank1") AM_SHARE("dram") /* DRAM */
+ AM_RANGE(0x00200000, 0x003FFFFF) AM_RAM AM_SHARE("vram") /* VRAM */
+ AM_RANGE(0x03000000, 0x030FFFFF) AM_ROMBANK("bank2") /* BIOS */
+ AM_RANGE(0x03100000, 0x0313FFFF) AM_RAM /* Brooktree? */
+ AM_RANGE(0x03140000, 0x0315FFFF) AM_READWRITE8(_3do_nvarea_r, _3do_nvarea_w, 0x000000ff) /* NVRAM */
+ AM_RANGE(0x03180000, 0x031BFFFF) AM_READWRITE(_3do_slow2_r, _3do_slow2_w) /* Slow bus - additional expansion */
+ AM_RANGE(0x03200000, 0x0320FFFF) AM_READWRITE(_3do_svf_r, _3do_svf_w) /* special vram access1 */
+ AM_RANGE(0x03300000, 0x033FFFFF) AM_READWRITE(_3do_madam_r, _3do_madam_w) /* address decoder */
+ AM_RANGE(0x03400000, 0x034FFFFF) AM_READWRITE(_3do_clio_r, _3do_clio_w) /* io controller */
ADDRESS_MAP_END
@@ -243,20 +243,20 @@ ROM_START(3dobios)
ROM_END
ROM_START(3do_pal)
- ROM_REGION32_BE( 0x200000, "user1", 0 )
- ROM_SYSTEM_BIOS( 0, "panafz10", "Panasonic FZ-10 R.E.A.L. 3DO Interactive Multiplayer" )
- ROMX_LOAD( "panafz10.bin", 0x000000, 0x100000, CRC(58242cee) SHA1(3c912300775d1ad730dc35757e279c274c0acaad), ROM_BIOS(1) )
- ROM_SYSTEM_BIOS( 1, "goldstar", "Goldstar 3DO Interactive Multiplayer v1.01m" )
- ROMX_LOAD( "goldstar.bin", 0x000000, 0x100000, CRC(b6f5028b) SHA1(c4a2e5336f77fb5f743de1eea2cda43675ee2de7), ROM_BIOS(2) )
- ROM_SYSTEM_BIOS( 2, "panafz1", "Panasonic FZ-1 R.E.A.L. 3DO Interactive Multiplayer" )
- ROMX_LOAD( "panafz1.bin", 0x000000, 0x100000, CRC(c8c8ff89) SHA1(34bf189111295f74d7b7dfc1f304d98b8d36325a), ROM_BIOS(3) )
+ ROM_REGION32_BE( 0x200000, "user1", 0 )
+ ROM_SYSTEM_BIOS( 0, "panafz10", "Panasonic FZ-10 R.E.A.L. 3DO Interactive Multiplayer" )
+ ROMX_LOAD( "panafz10.bin", 0x000000, 0x100000, CRC(58242cee) SHA1(3c912300775d1ad730dc35757e279c274c0acaad), ROM_BIOS(1) )
+ ROM_SYSTEM_BIOS( 1, "goldstar", "Goldstar 3DO Interactive Multiplayer v1.01m" )
+ ROMX_LOAD( "goldstar.bin", 0x000000, 0x100000, CRC(b6f5028b) SHA1(c4a2e5336f77fb5f743de1eea2cda43675ee2de7), ROM_BIOS(2) )
+ ROM_SYSTEM_BIOS( 2, "panafz1", "Panasonic FZ-1 R.E.A.L. 3DO Interactive Multiplayer" )
+ ROMX_LOAD( "panafz1.bin", 0x000000, 0x100000, CRC(c8c8ff89) SHA1(34bf189111295f74d7b7dfc1f304d98b8d36325a), ROM_BIOS(3) )
ROM_END
ROM_START(orbatak)
NTSC_BIOS
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "orbatak", 0, SHA1(25cb3b889cf09dbe5faf2b0ca4aae5e03453da00) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "orbatak", 0, SHA1(25cb3b889cf09dbe5faf2b0ca4aae5e03453da00) )
ROM_END
/***************************************************************************
@@ -266,8 +266,8 @@ ROM_END
***************************************************************************/
/* YEAR NAME PARENT COMPAT MACHINE INPUT INIT COMPANY FULLNAME FLAGS */
-CONS( 1991, 3do, 0, 0, 3do, 3do, driver_device, 0, "3DO", "3DO (NTSC)", GAME_NOT_WORKING | GAME_NO_SOUND )
-CONS( 1991, 3do_pal, 3do, 0, 3do_pal, 3do, driver_device, 0, "3DO", "3DO (PAL)", GAME_NOT_WORKING | GAME_NO_SOUND )
+CONS( 1991, 3do, 0, 0, 3do, 3do, driver_device, 0, "3DO", "3DO (NTSC)", GAME_NOT_WORKING | GAME_NO_SOUND )
+CONS( 1991, 3do_pal, 3do, 0, 3do_pal, 3do, driver_device, 0, "3DO", "3DO (PAL)", GAME_NOT_WORKING | GAME_NO_SOUND )
GAME( 1991, 3dobios, 0, 3do, 3do, driver_device, 0, ROT0, "3DO", "3DO Bios", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IS_BIOS_ROOT )
GAME( 199?, orbatak, 3dobios,3do, 3do, driver_device, 0, ROT0, "<unknown>", "Orbatak (prototype)", GAME_NOT_WORKING | GAME_NO_SOUND )
diff --git a/src/mame/drivers/3x3puzzl.c b/src/mame/drivers/3x3puzzl.c
index f82ff787d21..858930198a1 100644
--- a/src/mame/drivers/3x3puzzl.c
+++ b/src/mame/drivers/3x3puzzl.c
@@ -36,11 +36,11 @@ class _3x3puzzle_state : public driver_device
public:
_3x3puzzle_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_videoram1(*this, "videoram1"),
- m_videoram2(*this, "videoram2"),
- m_videoram3(*this, "videoram3"),
- m_maincpu(*this, "maincpu"),
- m_oki(*this, "oki")
+ m_videoram1(*this, "videoram1"),
+ m_videoram2(*this, "videoram2"),
+ m_videoram3(*this, "videoram3"),
+ m_maincpu(*this, "maincpu"),
+ m_oki(*this, "oki")
{ }
/* memory pointers */
@@ -57,8 +57,8 @@ public:
/* video-related */
tilemap_t *m_tilemap1;
- tilemap_t *m_tilemap2;
- tilemap_t *m_tilemap3;
+ tilemap_t *m_tilemap2;
+ tilemap_t *m_tilemap3;
DECLARE_WRITE16_MEMBER(videoram1_w);
TILE_GET_INFO_MEMBER(get_tile1_info);
@@ -226,53 +226,53 @@ static INPUT_PORTS_START( _3x3puzzle )
PORT_START("VBLANK")
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_START("DSW01")
- PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_START("DSW01")
+ PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Coinage ) )
PORT_DIPSETTING( 0x0300, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0200, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0100, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
PORT_DIPNAME( 0x0400, 0x0000, DEF_STR( Demo_Sounds ) )
- PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x1800, 0x1800, DEF_STR( Difficulty ) )
PORT_DIPSETTING( 0x1800, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x1000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0800, DEF_STR( Easiest ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, "Free Play / Debug mode" )
- PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x4000, 0x4000, "Free Play / Debug mode" )
+ PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unused ) )
+ PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
static const gfx_layout tiles16x16x8_layout =
@@ -348,7 +348,7 @@ MACHINE_CONFIG_END
***************************************************************************/
ROM_START( 3x3puzzl )
- ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "1.bin", 0x000000, 0x20000, CRC(e9c39ee7) SHA1(8557eeaff33ac8e11fd545482bd9e48f9a58eba3) )
ROM_LOAD16_BYTE( "2.bin", 0x000001, 0x20000, CRC(524963be) SHA1(05428ccc823c35b6c4d182a1dff1c9aa6b71e616) )
@@ -375,7 +375,7 @@ ROM_START( 3x3puzzl )
ROM_END
ROM_START( 3x3puzzla )
- ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "1a.bin", 0x000000, 0x20000, CRC(425c5896) SHA1(78d709b729f160b1e20a61a795361113dbb4fb52) )
ROM_LOAD16_BYTE( "2a.bin", 0x000001, 0x20000, CRC(4db710b7) SHA1(df7a3496aac9cfdaee4fd504d88772b07a8fdb2b) )
diff --git a/src/mame/drivers/40love.c b/src/mame/drivers/40love.c
index 3e0662168b3..4ead185ce2c 100644
--- a/src/mame/drivers/40love.c
+++ b/src/mame/drivers/40love.c
@@ -584,7 +584,7 @@ DRIVER_INIT_MEMBER(fortyl_state,40love)
#if 0
/* character ROM hack
- to show a white line on the opponent side */
+ to show a white line on the opponent side */
UINT8 *ROM = memregion("gfx2")->base();
int adr = 0x10 * 0x022b;
@@ -623,11 +623,11 @@ WRITE8_MEMBER(fortyl_state::to_main_w)
static ADDRESS_MAP_START( 40love_map, AS_PROGRAM, 8, fortyl_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
- AM_RANGE(0x8000, 0x87ff) AM_RAM /* M5517P on main board */
+ AM_RANGE(0x8000, 0x87ff) AM_RAM /* M5517P on main board */
AM_RANGE(0x8800, 0x8800) AM_DEVREADWRITE_LEGACY("bmcu", buggychl_mcu_r, buggychl_mcu_w)
- AM_RANGE(0x8801, 0x8801) AM_DEVREAD_LEGACY("bmcu", buggychl_mcu_status_r) AM_WRITE(pix1_mcu_w) //pixel layer related
+ AM_RANGE(0x8801, 0x8801) AM_DEVREAD_LEGACY("bmcu", buggychl_mcu_status_r) AM_WRITE(pix1_mcu_w) //pixel layer related
AM_RANGE(0x8802, 0x8802) AM_WRITE(bank_select_w)
- AM_RANGE(0x8803, 0x8803) AM_READWRITE(pix2_r, pix2_w) //pixel layer related
+ AM_RANGE(0x8803, 0x8803) AM_READWRITE(pix2_r, pix2_w) //pixel layer related
AM_RANGE(0x8804, 0x8804) AM_READWRITE(from_snd_r, sound_command_w)
AM_RANGE(0x8805, 0x8805) AM_READ(snd_flag_r) AM_WRITENOP /*sound_reset*/ //????
AM_RANGE(0x8807, 0x8807) AM_READNOP /* unknown */
@@ -637,10 +637,10 @@ static ADDRESS_MAP_START( 40love_map, AS_PROGRAM, 8, fortyl_state )
AM_RANGE(0x880b, 0x880b) AM_READ_PORT("P2")
AM_RANGE(0x880c, 0x880c) AM_READ_PORT("DSW1") AM_WRITE(fortyl_pixram_sel_w) /* pixram bank select */
AM_RANGE(0x880d, 0x880d) AM_READ_PORT("DSW2") AM_WRITENOP /* unknown */
- AM_RANGE(0x9000, 0x97ff) AM_READWRITE(fortyl_bg_videoram_r, fortyl_bg_videoram_w) AM_SHARE("videoram") /* #1 M5517P on video board */
- AM_RANGE(0x9800, 0x983f) AM_RAM AM_SHARE("video_ctrl") /* video control area */
- AM_RANGE(0x9840, 0x987f) AM_RAM AM_SHARE("spriteram") /* sprites part 1 */
- AM_RANGE(0x9880, 0x98bf) AM_READWRITE(fortyl_bg_colorram_r, fortyl_bg_colorram_w) AM_SHARE("colorram") /* background attributes (2 bytes per line) */
+ AM_RANGE(0x9000, 0x97ff) AM_READWRITE(fortyl_bg_videoram_r, fortyl_bg_videoram_w) AM_SHARE("videoram") /* #1 M5517P on video board */
+ AM_RANGE(0x9800, 0x983f) AM_RAM AM_SHARE("video_ctrl") /* video control area */
+ AM_RANGE(0x9840, 0x987f) AM_RAM AM_SHARE("spriteram") /* sprites part 1 */
+ AM_RANGE(0x9880, 0x98bf) AM_READWRITE(fortyl_bg_colorram_r, fortyl_bg_colorram_w) AM_SHARE("colorram") /* background attributes (2 bytes per line) */
AM_RANGE(0x98c0, 0x98ff) AM_RAM AM_SHARE("spriteram2")/* sprites part 2 */
AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xffff) AM_READWRITE(fortyl_pixram_r, fortyl_pixram_w) /* banked pixel layer */
@@ -651,11 +651,11 @@ static ADDRESS_MAP_START( undoukai_map, AS_PROGRAM, 8, fortyl_state )
AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1")
AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_SHARE("mcu_ram") /* M5517P on main board */
AM_RANGE(0xa800, 0xa800) AM_READWRITE(undoukai_mcu_r, undoukai_mcu_w)
- AM_RANGE(0xa801, 0xa801) AM_READWRITE(undoukai_mcu_status_r, pix1_w) //pixel layer related
+ AM_RANGE(0xa801, 0xa801) AM_READWRITE(undoukai_mcu_status_r, pix1_w) //pixel layer related
AM_RANGE(0xa802, 0xa802) AM_WRITE(bank_select_w)
- AM_RANGE(0xa803, 0xa803) AM_READWRITE(pix2_r, pix2_w) //pixel layer related
+ AM_RANGE(0xa803, 0xa803) AM_READWRITE(pix2_r, pix2_w) //pixel layer related
AM_RANGE(0xa804, 0xa804) AM_READWRITE(from_snd_r, sound_command_w)
- AM_RANGE(0xa805, 0xa805) AM_READ(snd_flag_r) AM_WRITENOP /*sound_reset*/ //????
+ AM_RANGE(0xa805, 0xa805) AM_READ(snd_flag_r) AM_WRITENOP /*sound_reset*/ //????
AM_RANGE(0xa807, 0xa807) AM_READNOP AM_WRITENOP /* unknown */
AM_RANGE(0xa808, 0xa808) AM_READ_PORT("DSW3")
AM_RANGE(0xa809, 0xa809) AM_READ_PORT("P1")
@@ -663,10 +663,10 @@ static ADDRESS_MAP_START( undoukai_map, AS_PROGRAM, 8, fortyl_state )
AM_RANGE(0xa80b, 0xa80b) AM_READ_PORT("P2")
AM_RANGE(0xa80c, 0xa80c) AM_READ_PORT("DSW1") AM_WRITE(fortyl_pixram_sel_w) /* pixram bank select */
AM_RANGE(0xa80d, 0xa80d) AM_READ_PORT("DSW2") AM_WRITENOP /* unknown */
- AM_RANGE(0xb000, 0xb7ff) AM_READWRITE(fortyl_bg_videoram_r, fortyl_bg_videoram_w) AM_SHARE("videoram") /* #1 M5517P on video board */
- AM_RANGE(0xb800, 0xb83f) AM_RAM AM_SHARE("video_ctrl") /* video control area */
- AM_RANGE(0xb840, 0xb87f) AM_RAM AM_SHARE("spriteram") /* sprites part 1 */
- AM_RANGE(0xb880, 0xb8bf) AM_READWRITE(fortyl_bg_colorram_r, fortyl_bg_colorram_w) AM_SHARE("colorram") /* background attributes (2 bytes per line) */
+ AM_RANGE(0xb000, 0xb7ff) AM_READWRITE(fortyl_bg_videoram_r, fortyl_bg_videoram_w) AM_SHARE("videoram") /* #1 M5517P on video board */
+ AM_RANGE(0xb800, 0xb83f) AM_RAM AM_SHARE("video_ctrl") /* video control area */
+ AM_RANGE(0xb840, 0xb87f) AM_RAM AM_SHARE("spriteram") /* sprites part 1 */
+ AM_RANGE(0xb880, 0xb8bf) AM_READWRITE(fortyl_bg_colorram_r, fortyl_bg_colorram_w) AM_SHARE("colorram") /* background attributes (2 bytes per line) */
AM_RANGE(0xb8e0, 0xb8ff) AM_RAM AM_SHARE("spriteram2") /* sprites part 2 */
AM_RANGE(0xc000, 0xffff) AM_READWRITE(fortyl_pixram_r, fortyl_pixram_w)
ADDRESS_MAP_END
@@ -675,9 +675,9 @@ MACHINE_RESET_MEMBER(fortyl_state,ta7630)
{
int i;
- double db = 0.0;
- double db_step = 1.50; /* 1.50 dB step (at least, maybe more) */
- double db_step_inc = 0.125;
+ double db = 0.0;
+ double db_step = 1.50; /* 1.50 dB step (at least, maybe more) */
+ double db_step_inc = 0.125;
for (i = 0; i < 16; i++)
{
double max = 100.0 / pow(10.0, db/20.0);
@@ -688,7 +688,7 @@ MACHINE_RESET_MEMBER(fortyl_state,ta7630)
}
/* for (i = 0; i < 8; i++)
- logerror("SOUND Chan#%i name=%s\n", i, mixer_get_name(i) ); */
+ logerror("SOUND Chan#%i name=%s\n", i, mixer_get_name(i) ); */
/*
channels 0-2 AY#0
channels 3,4 MSM5232 group1,group2
@@ -704,10 +704,10 @@ WRITE8_MEMBER(fortyl_state::sound_control_0_w)
/* this definitely controls main melody voice on 2'-1 and 4'-1 outputs */
device_sound_interface *sound;
device->interface(sound);
- sound->set_output_gain(0, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
- sound->set_output_gain(1, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
- sound->set_output_gain(2, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
- sound->set_output_gain(3, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
+ sound->set_output_gain(0, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
+ sound->set_output_gain(1, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
+ sound->set_output_gain(2, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
+ sound->set_output_gain(3, m_vol_ctrl[(m_snd_ctrl0 >> 4) & 15] / 100.0); /* group1 from msm5232 */
}
WRITE8_MEMBER(fortyl_state::sound_control_1_w)
@@ -717,10 +717,10 @@ WRITE8_MEMBER(fortyl_state::sound_control_1_w)
// popmessage("SND1 0=%02x 1=%02x 2=%02x 3=%02x", m_snd_ctrl0, m_snd_ctrl1, m_snd_ctrl2, m_snd_ctrl3);
device_sound_interface *sound;
device->interface(sound);
- sound->set_output_gain(4, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
- sound->set_output_gain(5, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
- sound->set_output_gain(6, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
- sound->set_output_gain(7, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
+ sound->set_output_gain(4, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
+ sound->set_output_gain(5, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
+ sound->set_output_gain(6, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
+ sound->set_output_gain(7, m_vol_ctrl[(m_snd_ctrl1 >> 4) & 15] / 100.0); /* group2 from msm5232 */
}
WRITE8_MEMBER(fortyl_state::sound_control_2_w)
@@ -733,7 +733,7 @@ WRITE8_MEMBER(fortyl_state::sound_control_2_w)
device_sound_interface *sound;
device->interface(sound);
for (i = 0; i < 3; i++)
- sound->set_output_gain(i, m_vol_ctrl[(m_snd_ctrl2 >> 4) & 15] / 100.0); /* ym2149f all */
+ sound->set_output_gain(i, m_vol_ctrl[(m_snd_ctrl2 >> 4) & 15] / 100.0); /* ym2149f all */
}
WRITE8_MEMBER(fortyl_state::sound_control_3_w)/* unknown */
@@ -752,7 +752,7 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, fortyl_state )
AM_RANGE(0xd800, 0xd800) AM_READ(soundlatch_byte_r) AM_WRITE(to_main_w)
AM_RANGE(0xda00, 0xda00) AM_READNOP AM_WRITE(nmi_enable_w) /* unknown read */
AM_RANGE(0xdc00, 0xdc00) AM_WRITE(nmi_disable_w)
- AM_RANGE(0xde00, 0xde00) AM_READNOP AM_DEVWRITE("dac", dac_device, write_signed8) /* signed 8-bit DAC - unknown read */
+ AM_RANGE(0xde00, 0xde00) AM_READNOP AM_DEVWRITE("dac", dac_device, write_signed8) /* signed 8-bit DAC - unknown read */
AM_RANGE(0xe000, 0xefff) AM_ROM /* space for diagnostics ROM */
ADDRESS_MAP_END
@@ -761,24 +761,24 @@ static INPUT_PORTS_START( 40love )
PORT_START("DSW1")
PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW1:1" )
PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW1:2" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4,5")
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4,5")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x18, "3" )
PORT_DIPSETTING( 0x10, "5" )
PORT_DIPSETTING( 0x08, "6" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW1:6" )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
PORT_START("DSW2") /* All OK */
- PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:1,2,3,4")
+ PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:1,2,3,4")
PORT_DIPSETTING( 0x0f, DEF_STR( 9C_1C ) )
PORT_DIPSETTING( 0x0e, DEF_STR( 8C_1C ) )
PORT_DIPSETTING( 0x0d, DEF_STR( 7C_1C ) )
@@ -795,7 +795,7 @@ static INPUT_PORTS_START( 40love )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_7C ) )
PORT_DIPSETTING( 0x07, DEF_STR( 1C_8C ) )
- PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:5,6,7,8")
+ PORT_DIPNAME( 0xf0, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:5,6,7,8")
PORT_DIPSETTING( 0xf0, DEF_STR( 9C_1C ) )
PORT_DIPSETTING( 0xe0, DEF_STR( 8C_1C ) )
PORT_DIPSETTING( 0xd0, DEF_STR( 7C_1C ) )
@@ -818,22 +818,22 @@ static INPUT_PORTS_START( 40love )
PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW3:2" )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW3:3" )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW3:4" )
- PORT_DIPNAME( 0x10, 0x10, "Coinage Display" ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, "Coinage Display" ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "Year Display" ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, "Year Display" ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Player Always Wins (Cheat)") PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, "Player Always Wins (Cheat)") PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Coin Slots" ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, "Coin Slots" ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x80, "2" )
PORT_START("SYSTEM")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
PORT_BIT( 0x04, IP_ACTIVE_HIGH,IPT_COIN1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH,IPT_COIN2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
@@ -848,7 +848,7 @@ static INPUT_PORTS_START( 40love )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) // ?
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) // ?
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 )
PORT_START("P2")
@@ -858,7 +858,7 @@ static INPUT_PORTS_START( 40love )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL // ?
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL // ?
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_COCKTAIL
INPUT_PORTS_END
@@ -866,34 +866,34 @@ static INPUT_PORTS_START( undoukai )
PORT_INCLUDE( 40love )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "4 (Hard)" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x03, "1 (Easy)" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, "1" )
PORT_DIPSETTING( 0x00, "2" )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x10, DEF_STR( None ) )
PORT_DIPSETTING( 0x00, "100000 200000" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Players ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Players ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x20, "1 Or 2" )
PORT_DIPSETTING( 0x00, "1 To 4" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_MODIFY("DSW3") /* & START */
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_START1 )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, "Freeze" ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, "Freeze" ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "No Qualify (Cheat)") PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, "No Qualify (Cheat)") PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -967,7 +967,7 @@ static const ay8910_interface ay8910_config =
static const msm5232_interface msm5232_config =
{
- { 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6 }, /* 1.0 uF capacitors (verified on real PCB) */
+ { 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6 }, /* 1.0 uF capacitors (verified on real PCB) */
DEVCB_NULL
};
@@ -1063,13 +1063,13 @@ static MACHINE_CONFIG_START( 40love, fortyl_state )
MCFG_CPU_ADD("audiocpu",Z80,8000000/2) /* OK */
MCFG_CPU_PROGRAM_MAP(sound_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(fortyl_state, irq0_line_hold, 2*60) /* source/number of IRQs is unknown */
+ MCFG_CPU_PERIODIC_INT_DRIVER(fortyl_state, irq0_line_hold, 2*60) /* source/number of IRQs is unknown */
MCFG_CPU_ADD("mcu",M68705,18432000/6) /* OK */
MCFG_CPU_PROGRAM_MAP(buggychl_mcu_map)
MCFG_DEVICE_ADD("bmcu", BUGGYCHL_MCU, 0)
- MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* high interleave to ensure proper synchronization of CPUs */
+ MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* high interleave to ensure proper synchronization of CPUs */
MCFG_MACHINE_START_OVERRIDE(fortyl_state,40love)
MCFG_MACHINE_RESET_OVERRIDE(fortyl_state,40love)
@@ -1094,14 +1094,14 @@ static MACHINE_CONFIG_START( 40love, fortyl_state )
MCFG_SOUND_ADD("msm", MSM5232, 8000000/4)
MCFG_SOUND_CONFIG(msm5232_config)
- MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
- MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
- MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
- MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
- MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
- MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
- MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
- MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
+ MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
+ MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
+ MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
+ MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
+ MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
+ MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
+ MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
+ MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
// pin 1 SOLO 8' not mapped
// pin 2 SOLO 16' not mapped
// pin 22 Noise Output not mapped
@@ -1119,14 +1119,14 @@ static MACHINE_CONFIG_START( undoukai, fortyl_state )
MCFG_CPU_ADD("audiocpu",Z80,8000000/2)
MCFG_CPU_PROGRAM_MAP(sound_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(fortyl_state, irq0_line_hold, 2*60) /* source/number of IRQs is unknown */
+ MCFG_CPU_PERIODIC_INT_DRIVER(fortyl_state, irq0_line_hold, 2*60) /* source/number of IRQs is unknown */
// MCFG_CPU_ADD("mcu",M68705,18432000/6)
// MCFG_CPU_PROGRAM_MAP(buggychl_mcu_map)
// MCFG_DEVICE_ADD("bmcu", BUGGYCHL_MCU, 0)
MCFG_MACHINE_START_OVERRIDE(fortyl_state,undoukai)
- MCFG_MACHINE_RESET_OVERRIDE(fortyl_state,undoukai) /* init machine */
+ MCFG_MACHINE_RESET_OVERRIDE(fortyl_state,undoukai) /* init machine */
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -1149,14 +1149,14 @@ static MACHINE_CONFIG_START( undoukai, fortyl_state )
MCFG_SOUND_ADD("msm", MSM5232, 8000000/4)
MCFG_SOUND_CONFIG(msm5232_config)
- MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
- MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
- MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
- MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
- MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
- MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
- MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
- MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
+ MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
+ MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
+ MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
+ MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
+ MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
+ MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
+ MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
+ MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
// pin 1 SOLO 8' not mapped
// pin 2 SOLO 16' not mapped
// pin 22 Noise Output not mapped
@@ -1173,8 +1173,8 @@ ROM_START( 40love )
ROM_LOAD( "a30-20.ic2", 0x02000, 0x2000, CRC(a7b4f2cc) SHA1(67f570874fa0feb21f2a9a0712fadf78ebaad91c) )
ROM_LOAD( "a30-21.ic3", 0x04000, 0x2000, CRC(49a372e8) SHA1(7c15fac65369d2e90b432c0f5c8e1d7295c379d1) )
ROM_LOAD( "a30-22.ic4", 0x06000, 0x2000, CRC(0c06d2b3) SHA1(e5b0c8e57b0a6d131496e168023e12bacc17e93e) )
- ROM_LOAD( "a30-23.ic5", 0x10000, 0x2000, CRC(6dcd186e) SHA1(c8d88a2f35ba77ea822bdd8133033c8eb0bb5f72) ) /* banked at 0xa000 */
- ROM_LOAD( "a30-24.ic6", 0x12000, 0x2000, CRC(590c20c8) SHA1(93689d6a299dfbe33ffec42d13378091d8589b34) ) /* banked at 0xa000 */
+ ROM_LOAD( "a30-23.ic5", 0x10000, 0x2000, CRC(6dcd186e) SHA1(c8d88a2f35ba77ea822bdd8133033c8eb0bb5f72) ) /* banked at 0xa000 */
+ ROM_LOAD( "a30-24.ic6", 0x12000, 0x2000, CRC(590c20c8) SHA1(93689d6a299dfbe33ffec42d13378091d8589b34) ) /* banked at 0xa000 */
ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 sound CPU */
ROM_LOAD( "a30-08.u08", 0x0000, 0x2000, CRC(2fc42ee1) SHA1(b56e5f9acbcdc476252e188f41ad7249dba6f8e1) )
@@ -1184,12 +1184,12 @@ ROM_START( 40love )
ROM_LOAD( "a30-12.u38", 0x8000, 0x2000, CRC(f7afd475) SHA1(dd09d5ca7fec5e0454f9efb8ebc722561010f124) )
ROM_LOAD( "a30-13.u39", 0xa000, 0x2000, CRC(e806630f) SHA1(09022aae88ea0171a0aacf3260fa3a95e8faeb21) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a30-14" , 0x0000, 0x0800, CRC(c4690279) SHA1(60bc77e03b9be434bb97a374a2fedeb8d049a660) )
ROM_REGION( 0x8000, "gfx1", 0 )
ROM_LOAD( "a30-25.u22", 0x0000, 0x2000, CRC(15e594cf) SHA1(d2d506a55f6ac2c191e5d5b3127021cde366c71c) )
- ROM_LOAD( "a30-26.u23", 0x2000, 0x2000, BAD_DUMP CRC(3a45a205) SHA1(0939ecaabbb9be2a0719ef252e3f244299734ba6) ) /* this actually seems good, but we need to find another one to verify */
+ ROM_LOAD( "a30-26.u23", 0x2000, 0x2000, BAD_DUMP CRC(3a45a205) SHA1(0939ecaabbb9be2a0719ef252e3f244299734ba6) ) /* this actually seems good, but we need to find another one to verify */
ROM_LOAD( "a30-27.u24", 0x4000, 0x2000, CRC(57c67f6f) SHA1(293e5bfa7c859886abd70f78fe2e4b13a3fce3f5) )
ROM_LOAD( "a30-28.u25", 0x6000, 0x2000, CRC(d581d067) SHA1(ce132cf2503917f0846b838c6ce4ad4183181bf9) )
@@ -1200,10 +1200,10 @@ ROM_START( 40love )
ROM_LOAD( "a30-32.u65", 0x6000, 0x2000, CRC(0434655b) SHA1(261c5e60e830967564c053dc1d40fbf1e7194fc8) )
ROM_REGION( 0x1000, "proms", 0 )
- ROM_LOAD( "a30-15.u03", 0x0000, 0x0400, CRC(55e38cc7) SHA1(823a6d7f29eadf5d12702d782d4297b0d4c65a0e) ) /* red */
- ROM_LOAD( "a30-16.u01", 0x0400, 0x0400, CRC(13997e20) SHA1(9fae1cf633409a88263dc66a17b1c2eeccd05f4f) ) /* green */
- ROM_LOAD( "a30-17.u02", 0x0800, 0x0400, CRC(5031f2f3) SHA1(1836d82fdc9f39cb318a791af2a935c27baabfd7) ) /* blue */
- ROM_LOAD( "a30-18.u13", 0x0c00, 0x0400, CRC(78697c0f) SHA1(31382ed4c0d44024f7f57a9de6407527f4d5b0d1) ) /* ??? */
+ ROM_LOAD( "a30-15.u03", 0x0000, 0x0400, CRC(55e38cc7) SHA1(823a6d7f29eadf5d12702d782d4297b0d4c65a0e) ) /* red */
+ ROM_LOAD( "a30-16.u01", 0x0400, 0x0400, CRC(13997e20) SHA1(9fae1cf633409a88263dc66a17b1c2eeccd05f4f) ) /* green */
+ ROM_LOAD( "a30-17.u02", 0x0800, 0x0400, CRC(5031f2f3) SHA1(1836d82fdc9f39cb318a791af2a935c27baabfd7) ) /* blue */
+ ROM_LOAD( "a30-18.u13", 0x0c00, 0x0400, CRC(78697c0f) SHA1(31382ed4c0d44024f7f57a9de6407527f4d5b0d1) ) /* ??? */
ROM_END
@@ -1225,7 +1225,7 @@ ROM_START( fieldday )
ROM_LOAD( "a17_28.bin", 0x8000, 0x2000, CRC(1a4d1dae) SHA1(fbc3c55ad9f15ead432c136eec648fe22e523ea7) )
ROM_LOAD( "a17_29.bin", 0xa000, 0x2000, CRC(3c540007) SHA1(549e7ff260214c538913ff548dcb088987845911) )
- ROM_REGION( 0x0800, "cpu2", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "cpu2", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a17_14.bin", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x8000, "gfx1", 0 )
@@ -1242,10 +1242,10 @@ ROM_START( fieldday )
ROM_LOAD( "a23_12.bin", 0x6000, 0x2000, CRC(86da42d2) SHA1(aa79cd954c96217ca2daf37addac168f8cca24f9) )
ROM_REGION( 0x1000, "proms", 0 )
- ROM_LOAD( "a17-15.10v", 0x0000, 0x0400, CRC(9df472b7) SHA1(0cd9dd735238daf8e8228ba9481df57fb8925328) ) /* red */
- ROM_LOAD( "a17-16.8v", 0x0400, 0x0400, CRC(3bf1ff5f) SHA1(a0453851aefa9acdba4a86aaca8c442cb8550987) ) /* green */
- ROM_LOAD( "a17-17.9v", 0x0800, 0x0400, CRC(c42ae956) SHA1(057ce3783305c98622f7dfc0ee7d4882137a2ef8) ) /* blue */
- ROM_LOAD( "a17-18.23v", 0x0c00, 0x0400, CRC(3023a1da) SHA1(08ce4c6e99d04b358d66f0588852311d07183619) ) /* ??? */
+ ROM_LOAD( "a17-15.10v", 0x0000, 0x0400, CRC(9df472b7) SHA1(0cd9dd735238daf8e8228ba9481df57fb8925328) ) /* red */
+ ROM_LOAD( "a17-16.8v", 0x0400, 0x0400, CRC(3bf1ff5f) SHA1(a0453851aefa9acdba4a86aaca8c442cb8550987) ) /* green */
+ ROM_LOAD( "a17-17.9v", 0x0800, 0x0400, CRC(c42ae956) SHA1(057ce3783305c98622f7dfc0ee7d4882137a2ef8) ) /* blue */
+ ROM_LOAD( "a17-18.23v", 0x0c00, 0x0400, CRC(3023a1da) SHA1(08ce4c6e99d04b358d66f0588852311d07183619) ) /* ??? */
ROM_END
ROM_START( undoukai )
@@ -1263,7 +1263,7 @@ ROM_START( undoukai )
ROM_LOAD( "a17-12.38s", 0x8000, 0x2000, CRC(cb7e6dcd) SHA1(5286c6d340c1d465caebae5dd7e3d4ff8b7f8f5e) )
ROM_LOAD( "a17-13.39s", 0xa000, 0x2000, CRC(0a40930e) SHA1(8c4b9fa0aed67a3e269c2136ef81791fc8acd1da) )
- ROM_REGION( 0x0800, "cpu2", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "cpu2", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a17-14.41c", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x8000, "gfx1", 0 )
@@ -1275,10 +1275,10 @@ ROM_START( undoukai )
ROM_LOAD( "a17-07.60v", 0x4000, 0x4000, CRC(7a4b4238) SHA1(8e58803645e61a7144a659d403f318a8899d36e2) )
ROM_REGION( 0x1000, "proms", 0 )
- ROM_LOAD( "a17-15.10v", 0x0000, 0x0400, CRC(9df472b7) SHA1(0cd9dd735238daf8e8228ba9481df57fb8925328) ) /* red */
- ROM_LOAD( "a17-16.8v", 0x0400, 0x0400, CRC(3bf1ff5f) SHA1(a0453851aefa9acdba4a86aaca8c442cb8550987) ) /* green */
- ROM_LOAD( "a17-17.9v", 0x0800, 0x0400, CRC(c42ae956) SHA1(057ce3783305c98622f7dfc0ee7d4882137a2ef8) ) /* blue */
- ROM_LOAD( "a17-18.23v", 0x0c00, 0x0400, CRC(3023a1da) SHA1(08ce4c6e99d04b358d66f0588852311d07183619) ) /* ??? */
+ ROM_LOAD( "a17-15.10v", 0x0000, 0x0400, CRC(9df472b7) SHA1(0cd9dd735238daf8e8228ba9481df57fb8925328) ) /* red */
+ ROM_LOAD( "a17-16.8v", 0x0400, 0x0400, CRC(3bf1ff5f) SHA1(a0453851aefa9acdba4a86aaca8c442cb8550987) ) /* green */
+ ROM_LOAD( "a17-17.9v", 0x0800, 0x0400, CRC(c42ae956) SHA1(057ce3783305c98622f7dfc0ee7d4882137a2ef8) ) /* blue */
+ ROM_LOAD( "a17-18.23v", 0x0c00, 0x0400, CRC(3023a1da) SHA1(08ce4c6e99d04b358d66f0588852311d07183619) ) /* ??? */
ROM_END
GAME( 1984, 40love, 0, 40love, 40love, fortyl_state, 40love, ROT0, "Taito Corporation", "Forty-Love", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS )
diff --git a/src/mame/drivers/4enraya.c b/src/mame/drivers/4enraya.c
index 3abedc5f7bd..b2b917aea3b 100644
--- a/src/mame/drivers/4enraya.c
+++ b/src/mame/drivers/4enraya.c
@@ -174,24 +174,24 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( 4enraya )
PORT_START("DSW")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, "Pieces" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x04, "Pieces" ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x04, "30" )
PORT_DIPSETTING( 0x00, "16" )
- PORT_DIPNAME( 0x08, 0x08, "Speed" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x08, "Speed" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, "Slow" )
PORT_DIPSETTING( 0x00, "Fast" )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:7,8")
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
@@ -200,12 +200,12 @@ static INPUT_PORTS_START( 4enraya )
PORT_START("INPUTS")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(1)
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Down") // "drop" ("down")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Down") // "drop" ("down")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Down") // "drop" ("down")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Down") // "drop" ("down")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(1)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Shot") // "fire" ("shot")
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Shot") // "fire" ("shot")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Shot") // "fire" ("shot")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Shot") // "fire" ("shot")
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -368,7 +368,7 @@ ROM_START( 4enraya )
ROM_LOAD( "3.bin", 0x4000, 0x2000, CRC(f6940836) SHA1(afde21ffa0c141cf73243e50da62ecfd474aaac2) )
ROM_REGION( 0x0020, "pal_prom", 0 )
- ROM_LOAD( "1.bpr", 0x0000, 0x0020, CRC(dcbd2352) SHA1(ce72e84129ed1b455aaf648e1dfaa4333e7e7628) ) /* system control: used for memory mapping */
+ ROM_LOAD( "1.bpr", 0x0000, 0x0020, CRC(dcbd2352) SHA1(ce72e84129ed1b455aaf648e1dfaa4333e7e7628) ) /* system control: used for memory mapping */
ROM_END
diff --git a/src/mame/drivers/4roses.c b/src/mame/drivers/4roses.c
index 4daaffdc4b5..36161a2d6ee 100644
--- a/src/mame/drivers/4roses.c
+++ b/src/mame/drivers/4roses.c
@@ -170,7 +170,7 @@
***********************************************************************************/
-#define MASTER_CLOCK XTAL_16MHz
+#define MASTER_CLOCK XTAL_16MHz
#include "emu.h"
#include "cpu/m6502/m65c02.h"
@@ -201,7 +201,7 @@ public:
*************************/
static ADDRESS_MAP_START( 4roses_map, AS_PROGRAM, 8, _4roses_state )
- AM_RANGE(0x0000, 0x07ff) AM_RAM // AM_SHARE("nvram")
+ AM_RANGE(0x0000, 0x07ff) AM_RAM // AM_SHARE("nvram")
AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_SHARE("colorram")
AM_RANGE(0x8000, 0xffff) AM_ROM
@@ -286,7 +286,7 @@ static INPUT_PORTS_START( 4roses )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW2") /* this bank is x4 DIP switches */
+ PORT_START("SW2") /* this bank is x4 DIP switches */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -351,10 +351,10 @@ static const ay8910_interface ay8910_intf =
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
- DEVCB_NULL, /* portA in */
- DEVCB_NULL, /* portB in */
- DEVCB_NULL, /* portA out */
- DEVCB_NULL /* portB out */
+ DEVCB_NULL, /* portA in */
+ DEVCB_NULL, /* portB in */
+ DEVCB_NULL, /* portA out */
+ DEVCB_NULL /* portB out */
};
@@ -364,16 +364,16 @@ static const ay8910_interface ay8910_intf =
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
@@ -383,7 +383,7 @@ static const mc6845_interface mc6845_intf =
static MACHINE_CONFIG_START( 4roses, _4roses_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M65C02, MASTER_CLOCK/8) /* 2MHz, guess */
+ MCFG_CPU_ADD("maincpu", M65C02, MASTER_CLOCK/8) /* 2MHz, guess */
MCFG_CPU_PROGRAM_MAP(4roses_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", _4roses_state, nmi_line_pulse)
@@ -394,8 +394,8 @@ static MACHINE_CONFIG_START( 4roses, _4roses_state )
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
- MCFG_SCREEN_SIZE((124+1)*4, (30+1)*8) /* guess. taken from funworld games */
- MCFG_SCREEN_VISIBLE_AREA(0*4, 96*4-1, 0*8, 29*8-1) /* guess. taken from funworld games */
+ MCFG_SCREEN_SIZE((124+1)*4, (30+1)*8) /* guess. taken from funworld games */
+ MCFG_SCREEN_VISIBLE_AREA(0*4, 96*4-1, 0*8, 29*8-1) /* guess. taken from funworld games */
MCFG_SCREEN_UPDATE_DRIVER(_4roses_state, screen_update_funworld)
MCFG_GFXDECODE(4roses)
@@ -409,7 +409,7 @@ static MACHINE_CONFIG_START( 4roses, _4roses_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay8910", AY8910, MASTER_CLOCK/8) /* 2MHz, guess */
+ MCFG_SOUND_ADD("ay8910", AY8910, MASTER_CLOCK/8) /* 2MHz, guess */
MCFG_SOUND_CONFIG(ay8910_intf)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 2.5)
MACHINE_CONFIG_END
@@ -420,36 +420,36 @@ MACHINE_CONFIG_END
*************************/
ROM_START( 4roses )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "4.10.u32", 0x00000, 0x10000, CRC(e94440e9) SHA1(b2f81ba79f1f40ed35e45fd80c17eb8529ccdb4c) )
- ROM_REGION( 0x0400, "mcu", 0 ) /* protected... no dump available */
+ ROM_REGION( 0x0400, "mcu", 0 ) /* protected... no dump available */
ROM_LOAD( "ep87c750ebpn_no_dump.u41", 0x0000, 0x0400, NO_DUMP )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD( "30.u17", 0x00000, 0x80000, CRC(daefacc2) SHA1(5896e9da06fde39770fcdc585881b8c689b34369) )
ROM_REGION( 0x18000, "proms", 0 )
- ROM_LOAD( "20.u43", 0x00000, 0x08000, CRC(f206b4d3) SHA1(dfee226a9e01ddacf09995ec4e027b0ed4dffe7e) )
- ROM_LOAD( "10.u39", 0x08000, 0x10000, CRC(87dcf9c5) SHA1(b289527b8d9db1e91adf85b53233415c6969f4d4) )
+ ROM_LOAD( "20.u43", 0x00000, 0x08000, CRC(f206b4d3) SHA1(dfee226a9e01ddacf09995ec4e027b0ed4dffe7e) )
+ ROM_LOAD( "10.u39", 0x08000, 0x10000, CRC(87dcf9c5) SHA1(b289527b8d9db1e91adf85b53233415c6969f4d4) )
ROM_REGION( 0x02dd, "plds", 0 )
ROM_LOAD( "palce22v10h.u29", 0x0000, 0x02dd, BAD_DUMP CRC(5c4e9024) SHA1(e9d1e4df3d79c21f4ce053a84bb7b7a43d650f91) )
ROM_END
ROM_START( 4rosesa )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "4.u15", 0x00000, 0x10000, CRC(66bb5b67) SHA1(438371c3918f0a285cb19caa650739df9fb24800) )
- ROM_REGION( 0x0400, "mcu", 0 ) /* protected... no dump available */
+ ROM_REGION( 0x0400, "mcu", 0 ) /* protected... no dump available */
ROM_LOAD( "ep87c750ebpn_no_dump.u41", 0x0000, 0x0400, NO_DUMP )
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD( "30.u17", 0x00000, 0x80000, CRC(daefacc2) SHA1(5896e9da06fde39770fcdc585881b8c689b34369) )
ROM_REGION( 0x20000, "proms", 0 )
- ROM_LOAD( "20.ub5", 0x00000, 0x10000, CRC(01cc8b15) SHA1(f8e1fa7c0a4ae35debf8eecde31471049308cd60) )
- ROM_LOAD( "10.ua5", 0x10000, 0x10000, CRC(87dcf9c5) SHA1(b289527b8d9db1e91adf85b53233415c6969f4d4) )
+ ROM_LOAD( "20.ub5", 0x00000, 0x10000, CRC(01cc8b15) SHA1(f8e1fa7c0a4ae35debf8eecde31471049308cd60) )
+ ROM_LOAD( "10.ua5", 0x10000, 0x10000, CRC(87dcf9c5) SHA1(b289527b8d9db1e91adf85b53233415c6969f4d4) )
ROM_REGION( 0x02dd, "plds", 0 )
ROM_LOAD( "palce22v10h.u29", 0x0000, 0x02dd, BAD_DUMP CRC(5c4e9024) SHA1(e9d1e4df3d79c21f4ce053a84bb7b7a43d650f91) )
diff --git a/src/mame/drivers/5clown.c b/src/mame/drivers/5clown.c
index bb0396e8288..269cc8fce36 100644
--- a/src/mame/drivers/5clown.c
+++ b/src/mame/drivers/5clown.c
@@ -440,7 +440,7 @@
*******************************************************************************/
-#define MASTER_CLOCK XTAL_10MHz
+#define MASTER_CLOCK XTAL_10MHz
#include "emu.h"
#include "cpu/m6502/m6502.h"
@@ -524,9 +524,9 @@ TILE_GET_INFO_MEMBER(_5clown_state::get_fclown_tile_info)
*/
int attr = m_colorram[tile_index];
- int code = ((attr & 0x01) << 8) | ((attr & 0x40) << 2) | m_videoram[tile_index]; /* bit 8 for extended char set */
- int bank = (attr & 0x02) >> 1; /* bit 1 switch the gfx banks */
- int color = (attr & 0x3c) >> 2 | ((attr & 0x80) >> 3); /* bits 2-3-4-5-7 for color */
+ int code = ((attr & 0x01) << 8) | ((attr & 0x40) << 2) | m_videoram[tile_index]; /* bit 8 for extended char set */
+ int bank = (attr & 0x02) >> 1; /* bit 1 switch the gfx banks */
+ int color = (attr & 0x3c) >> 2 | ((attr & 0x80) >> 3); /* bits 2-3-4-5-7 for color */
SET_TILE_INFO_MEMBER(bank, code, color, 0);
}
@@ -566,8 +566,8 @@ void _5clown_state::palette_init()
int bit0, bit1, bit2, bit3, r, g, b, bk;
/* background killer */
- bit3 = (color_prom[i] >> 3) & 0x01;
- bk = bit3;
+ bit3 = (color_prom[i] >> 3) & 0x01;
+ bk = bit3;
/* red component */
bit0 = (color_prom[i] >> 0) & 0x01;
@@ -597,7 +597,7 @@ void _5clown_state::palette_init()
*/
READ8_MEMBER(_5clown_state::mux_port_r)
{
- switch( m_mux_data & 0xf0 ) /* bits 4-7 */
+ switch( m_mux_data & 0xf0 ) /* bits 4-7 */
{
case 0x10: return ioport("IN0-0")->read();
case 0x20: return ioport("IN0-1")->read();
@@ -611,7 +611,7 @@ READ8_MEMBER(_5clown_state::mux_port_r)
WRITE8_MEMBER(_5clown_state::mux_w)
{
- m_mux_data = data ^ 0xff; /* Inverted */
+ m_mux_data = data ^ 0xff; /* Inverted */
}
@@ -626,10 +626,10 @@ WRITE8_MEMBER(_5clown_state::counters_w)
-x-- ---- Unknown (increments at start).
x--- ---- Unknown (increments at start).
*/
- coin_counter_w(machine(), 0, data & 0x10); /* Key In */
- coin_counter_w(machine(), 1, data & 0x20); /* Payout */
- coin_counter_w(machine(), 2, data & 0x40); /* unknown */
- coin_counter_w(machine(), 3, data & 0x80); /* unknown */
+ coin_counter_w(machine(), 0, data & 0x10); /* Key In */
+ coin_counter_w(machine(), 1, data & 0x20); /* Payout */
+ coin_counter_w(machine(), 2, data & 0x40); /* unknown */
+ coin_counter_w(machine(), 3, data & 0x80); /* unknown */
}
@@ -638,7 +638,7 @@ WRITE8_MEMBER(_5clown_state::trigsnd_w)
{
/************ Interrupts trigger **************
- Writes 0x07 & 0x0F each time a sound is triggered through $D800 */
+ Writes 0x07 & 0x0F each time a sound is triggered through $D800 */
if ( (data & 0x0f) == 0x07 )
{
@@ -661,7 +661,7 @@ READ8_MEMBER(_5clown_state::pia0_b_r)
READ8_MEMBER(_5clown_state::pia1_b_r)
{
/* constantly read the port */
- return 0x00; /* bit 2 shouldn't be active to allow work the key out system */
+ return 0x00; /* bit 2 shouldn't be active to allow work the key out system */
}
@@ -733,18 +733,18 @@ static ADDRESS_MAP_START( fclown_map, AS_PROGRAM, 8, _5clown_state )
AM_RANGE(0x0801, 0x0801) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w)
AM_RANGE(0x0844, 0x0847) AM_DEVREADWRITE("pia0", pia6821_device, read, write)
AM_RANGE(0x0848, 0x084b) AM_DEVREADWRITE("pia1", pia6821_device, read, write)
- AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(fclown_videoram_w) AM_SHARE("videoram") /* Init'ed at $2042 */
- AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(fclown_colorram_w) AM_SHARE("colorram") /* Init'ed at $2054 */
- AM_RANGE(0x2000, 0x7fff) AM_ROM /* ROM space */
+ AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(fclown_videoram_w) AM_SHARE("videoram") /* Init'ed at $2042 */
+ AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(fclown_colorram_w) AM_SHARE("colorram") /* Init'ed at $2054 */
+ AM_RANGE(0x2000, 0x7fff) AM_ROM /* ROM space */
AM_RANGE(0xc048, 0xc048) AM_WRITE(cpu_c048_w )
AM_RANGE(0xd800, 0xd800) AM_WRITE(cpu_d800_w )
- AM_RANGE(0xc400, 0xc400) AM_READ_PORT("SW1") /* DIP Switches bank */
- AM_RANGE(0xcc00, 0xcc00) AM_READ_PORT("SW2") /* DIP Switches bank */
- AM_RANGE(0xd400, 0xd400) AM_READ_PORT("SW3") /* Second DIP Switches bank */
+ AM_RANGE(0xc400, 0xc400) AM_READ_PORT("SW1") /* DIP Switches bank */
+ AM_RANGE(0xcc00, 0xcc00) AM_READ_PORT("SW2") /* DIP Switches bank */
+ AM_RANGE(0xd400, 0xd400) AM_READ_PORT("SW3") /* Second DIP Switches bank */
- AM_RANGE(0xe000, 0xffff) AM_ROM /* ROM space */
+ AM_RANGE(0xe000, 0xffff) AM_ROM /* ROM space */
ADDRESS_MAP_END
/*
@@ -809,7 +809,7 @@ static ADDRESS_MAP_START( fcaudio_map, AS_PROGRAM, 8, _5clown_state )
AM_RANGE(0x0c04, 0x0c04) AM_DEVWRITE("oki6295", okim6295_device, write)
AM_RANGE(0x0c06, 0x0c06) AM_DEVREAD("oki6295", okim6295_device, read)
AM_RANGE(0x0e06, 0x0e06) AM_READ(snd_e06_r)
- AM_RANGE(0xe000, 0xffff) AM_ROM /* ROM space */
+ AM_RANGE(0xe000, 0xffff) AM_ROM /* ROM space */
ADDRESS_MAP_END
@@ -821,10 +821,10 @@ static INPUT_PORTS_START( fclown )
/* Multiplexed - 4x5bits */
PORT_START("IN0-0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_BET )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Record")
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Record")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Start")
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* cancel */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Start")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* cancel */
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -832,9 +832,9 @@ static INPUT_PORTS_START( fclown )
PORT_START("IN0-1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_NAME("Collect")
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big")
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) PORT_NAME("Collect")
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -850,10 +850,10 @@ static INPUT_PORTS_START( fclown )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN0-3")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Setting") PORT_CODE(KEYCODE_9)
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Setting") PORT_CODE(KEYCODE_9)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Coin In")
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Coin In")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -901,7 +901,7 @@ static INPUT_PORTS_START( fclown )
PORT_DIPNAME( 0x08, 0x08, "SW2-08 (CC00)" )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x00, "SW2-10 (CC00) System Boot" ) /* Should be turned ON to boot */
+ PORT_DIPNAME( 0x10, 0x00, "SW2-10 (CC00) System Boot" ) /* Should be turned ON to boot */
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x00, "Key In (value)" )
@@ -915,26 +915,26 @@ static INPUT_PORTS_START( fclown )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("SW3")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x18, 0x10, "Min/Max Bet" ) PORT_DIPLOCATION("SW3:4,5") /* Always 1-40 on screen */
+ PORT_DIPNAME( 0x18, 0x10, "Min/Max Bet" ) PORT_DIPLOCATION("SW3:4,5") /* Always 1-40 on screen */
PORT_DIPSETTING( 0x00, "Min:10; Max:80" )
PORT_DIPSETTING( 0x08, "Min:10; Max:50" )
PORT_DIPSETTING( 0x10, "Min:05; Max:40" )
PORT_DIPSETTING( 0x18, "Min:05; Max:10" )
- PORT_DIPNAME( 0x60, 0x40, "Key In (screen)" ) PORT_DIPLOCATION("SW3:6,7") /* Only on screen */
+ PORT_DIPNAME( 0x60, 0x40, "Key In (screen)" ) PORT_DIPLOCATION("SW3:6,7") /* Only on screen */
PORT_DIPSETTING( 0x60, "20" )
PORT_DIPSETTING( 0x40, "100" )
PORT_DIPSETTING( 0x20, "120" )
PORT_DIPSETTING( 0x00, "130" )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -944,16 +944,16 @@ static INPUT_PORTS_START( fclown )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_DIPNAME( 0x10, 0x00, "Jacks or Better" ) PORT_DIPLOCATION("SW4:1")
+ PORT_DIPNAME( 0x10, 0x00, "Jacks or Better" ) PORT_DIPLOCATION("SW4:1")
PORT_DIPSETTING( 0x10, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW4:2")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW4:2")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "Payout Mode" ) PORT_DIPLOCATION("SW4:3")
+ PORT_DIPNAME( 0x40, 0x00, "Payout Mode" ) PORT_DIPLOCATION("SW4:3")
PORT_DIPSETTING( 0x40, "Manual" )
PORT_DIPSETTING( 0x00, "Auto" )
- PORT_DIPNAME( 0x80, 0x80, "Coin In" ) PORT_DIPLOCATION("SW4:4")
+ PORT_DIPNAME( 0x80, 0x80, "Coin In" ) PORT_DIPLOCATION("SW4:4")
PORT_DIPSETTING( 0x80, "x10" )
PORT_DIPSETTING( 0x00, "x5" )
INPUT_PORTS_END
@@ -991,16 +991,16 @@ GFXDECODE_END
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
@@ -1010,34 +1010,34 @@ static const mc6845_interface mc6845_intf =
static const pia6821_interface fclown_pia0_intf =
{
- DEVCB_DRIVER_MEMBER(_5clown_state,mux_port_r), /* Port A IN Multiplexed Ports read */
- DEVCB_DRIVER_MEMBER(_5clown_state,pia0_b_r), /* Port B IN unknown (used) */
- DEVCB_NULL, /* Line CA1 IN */
- DEVCB_NULL, /* Line CB1 IN */
- DEVCB_NULL, /* Line CA2 IN */
- DEVCB_NULL, /* Line CA2 IN */
- DEVCB_NULL, /* Port A OUT NULL */
- DEVCB_DRIVER_MEMBER(_5clown_state,counters_w), /* Port B OUT Counters */
- DEVCB_NULL, /* Line CA2 OUT */
- DEVCB_NULL, /* Line CB2 OUT */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_DRIVER_MEMBER(_5clown_state,mux_port_r), /* Port A IN Multiplexed Ports read */
+ DEVCB_DRIVER_MEMBER(_5clown_state,pia0_b_r), /* Port B IN unknown (used) */
+ DEVCB_NULL, /* Line CA1 IN */
+ DEVCB_NULL, /* Line CB1 IN */
+ DEVCB_NULL, /* Line CA2 IN */
+ DEVCB_NULL, /* Line CA2 IN */
+ DEVCB_NULL, /* Port A OUT NULL */
+ DEVCB_DRIVER_MEMBER(_5clown_state,counters_w), /* Port B OUT Counters */
+ DEVCB_NULL, /* Line CA2 OUT */
+ DEVCB_NULL, /* Line CB2 OUT */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
static const pia6821_interface fclown_pia1_intf =
{
- DEVCB_INPUT_PORT("SW4"), /* Port A IN 4th DIP Switchs bank */
- DEVCB_DRIVER_MEMBER(_5clown_state,pia1_b_r), /* Port B IN Check bit 2 to allow key out system to work */
- DEVCB_NULL, /* Line CA1 IN */
- DEVCB_NULL, /* Line CB1 IN */
- DEVCB_NULL, /* Line CA2 IN */
- DEVCB_NULL, /* Line CB2 IN */
- DEVCB_DRIVER_MEMBER(_5clown_state,trigsnd_w), /* Port A OUT Trigger the audio CPU interrupts */
- DEVCB_DRIVER_MEMBER(_5clown_state,mux_w), /* Port B OUT Multiplexed Ports selector */
- DEVCB_NULL, /* Line CA2 OUT */
- DEVCB_NULL, /* Line CB2 OUT */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_INPUT_PORT("SW4"), /* Port A IN 4th DIP Switchs bank */
+ DEVCB_DRIVER_MEMBER(_5clown_state,pia1_b_r), /* Port B IN Check bit 2 to allow key out system to work */
+ DEVCB_NULL, /* Line CA1 IN */
+ DEVCB_NULL, /* Line CB1 IN */
+ DEVCB_NULL, /* Line CA2 IN */
+ DEVCB_NULL, /* Line CB2 IN */
+ DEVCB_DRIVER_MEMBER(_5clown_state,trigsnd_w), /* Port A OUT Trigger the audio CPU interrupts */
+ DEVCB_DRIVER_MEMBER(_5clown_state,mux_w), /* Port B OUT Multiplexed Ports selector */
+ DEVCB_NULL, /* Line CA2 OUT */
+ DEVCB_NULL, /* Line CB2 OUT */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
@@ -1063,11 +1063,11 @@ static const ay8910_interface ay8910_config =
static MACHINE_CONFIG_START( fclown, _5clown_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK/8) /* guess, seems ok */
+ MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK/8) /* guess, seems ok */
MCFG_CPU_PROGRAM_MAP(fclown_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", _5clown_state, nmi_line_pulse)
- MCFG_CPU_ADD("audiocpu", M6502, MASTER_CLOCK/8) /* guess, seems ok */
+ MCFG_CPU_ADD("audiocpu", M6502, MASTER_CLOCK/8) /* guess, seems ok */
MCFG_CPU_PROGRAM_MAP(fcaudio_map)
MCFG_NVRAM_ADD_0FILL("nvram")
@@ -1092,11 +1092,11 @@ static MACHINE_CONFIG_START( fclown, _5clown_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay8910", AY8910, MASTER_CLOCK/8) /* guess, seems ok */
+ MCFG_SOUND_ADD("ay8910", AY8910, MASTER_CLOCK/8) /* guess, seems ok */
MCFG_SOUND_CONFIG(ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
- MCFG_OKIM6295_ADD("oki6295", MASTER_CLOCK/12, OKIM6295_PIN7_LOW) /* guess, seems ok; pin7 guessed, seems ok */
+ MCFG_OKIM6295_ADD("oki6295", MASTER_CLOCK/12, OKIM6295_PIN7_LOW) /* guess, seems ok; pin7 guessed, seems ok */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.20)
MACHINE_CONFIG_END
@@ -1108,94 +1108,94 @@ MACHINE_CONFIG_END
ROM_START( 5clown )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "4.u2", 0x2000, 0x8000, CRC(96e3e8ab) SHA1(fec20b9a8bde5306162f8288cdc9580f445cadf5) )
- ROM_COPY( "maincpu", 0x2000, 0x8000, 0x8000 )
+ ROM_LOAD( "4.u2", 0x2000, 0x8000, CRC(96e3e8ab) SHA1(fec20b9a8bde5306162f8288cdc9580f445cadf5) )
+ ROM_COPY( "maincpu", 0x2000, 0x8000, 0x8000 )
ROM_REGION( 0x8000, "gfxbanks", 0 )
- ROM_LOAD( "7.u34", 0x0000, 0x8000, CRC(64c9f4ee) SHA1(6e695feee826e319f84d91f6bbf7cfacd443fc8f) )
+ ROM_LOAD( "7.u34", 0x0000, 0x8000, CRC(64c9f4ee) SHA1(6e695feee826e319f84d91f6bbf7cfacd443fc8f) )
ROM_REGION( 0x10000, "audiocpu", 0 )
- ROM_LOAD( "9.u35", 0xe000, 0x2000, CRC(7e3c3af5) SHA1(ebc09da981dbdf4eac90bcf982e5bc8ede47e81a) )
+ ROM_LOAD( "9.u35", 0xe000, 0x2000, CRC(7e3c3af5) SHA1(ebc09da981dbdf4eac90bcf982e5bc8ede47e81a) )
ROM_REGION( 0x40000, "oki6295", 0 )
- ROM_LOAD( "8.u50", 0x0000, 0x10000, CRC(e1e37180) SHA1(e162abcb01952e26deee74ece5719239961e1b69) )
+ ROM_LOAD( "8.u50", 0x0000, 0x10000, CRC(e1e37180) SHA1(e162abcb01952e26deee74ece5719239961e1b69) )
ROM_REGION( 0x3000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the remaining bitplanes */
- ROM_COPY( "gfxbanks", 0x7000, 0x2000, 0x1000 )
+ ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the remaining bitplanes */
+ ROM_COPY( "gfxbanks", 0x7000, 0x2000, 0x1000 )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_COPY( "gfxbanks", 0x6000, 0x0000, 0x1000 )
- ROM_COPY( "gfxbanks", 0x5000, 0x1000, 0x1000 )
- ROM_COPY( "gfxbanks", 0x4000, 0x2000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x6000, 0x0000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x5000, 0x1000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x4000, 0x2000, 0x1000 )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "dm74s287an.u32", 0x0000, 0x0100, CRC(2d207266) SHA1(374b4830a0a8ed3001cf0df16daa8dffee503cbe) )
+ ROM_LOAD( "dm74s287an.u32", 0x0000, 0x0100, CRC(2d207266) SHA1(374b4830a0a8ed3001cf0df16daa8dffee503cbe) )
ROM_END
ROM_START( 5clowna )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "6.u2", 0x2000, 0x2000, BAD_DUMP CRC(15ecca37) SHA1(d8d0a43f559168cccc3a46418557ccfc30c8108e) )
- ROM_LOAD( "5.u2", 0x4000, 0x2000, BAD_DUMP CRC(2e962007) SHA1(86599ba5030068c08ff5a19ada7250c410b2ba35) )
- ROM_LOAD( "7.u2", 0xe000, 0x2000, BAD_DUMP CRC(308c4771) SHA1(f6ee402c120ff16601347cc994a45a7092511050) )
+ ROM_LOAD( "6.u2", 0x2000, 0x2000, BAD_DUMP CRC(15ecca37) SHA1(d8d0a43f559168cccc3a46418557ccfc30c8108e) )
+ ROM_LOAD( "5.u2", 0x4000, 0x2000, BAD_DUMP CRC(2e962007) SHA1(86599ba5030068c08ff5a19ada7250c410b2ba35) )
+ ROM_LOAD( "7.u2", 0xe000, 0x2000, BAD_DUMP CRC(308c4771) SHA1(f6ee402c120ff16601347cc994a45a7092511050) )
ROM_REGION( 0x8000, "gfxbanks", 0 )
- ROM_LOAD( "7.u34", 0x0000, 0x8000, CRC(64c9f4ee) SHA1(6e695feee826e319f84d91f6bbf7cfacd443fc8f) )
+ ROM_LOAD( "7.u34", 0x0000, 0x8000, CRC(64c9f4ee) SHA1(6e695feee826e319f84d91f6bbf7cfacd443fc8f) )
ROM_REGION( 0x10000, "audiocpu", 0 )
- ROM_LOAD( "9.u35", 0xe000, 0x2000, CRC(7e3c3af5) SHA1(ebc09da981dbdf4eac90bcf982e5bc8ede47e81a) )
+ ROM_LOAD( "9.u35", 0xe000, 0x2000, CRC(7e3c3af5) SHA1(ebc09da981dbdf4eac90bcf982e5bc8ede47e81a) )
ROM_REGION( 0x40000, "oki6295", 0 )
- ROM_LOAD( "8.u50", 0x0000, 0x10000, CRC(e1e37180) SHA1(e162abcb01952e26deee74ece5719239961e1b69) )
+ ROM_LOAD( "8.u50", 0x0000, 0x10000, CRC(e1e37180) SHA1(e162abcb01952e26deee74ece5719239961e1b69) )
ROM_REGION( 0x3000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the remaining bitplanes */
- ROM_COPY( "gfxbanks", 0x7000, 0x2000, 0x1000 )
+ ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the remaining bitplanes */
+ ROM_COPY( "gfxbanks", 0x7000, 0x2000, 0x1000 )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_COPY( "gfxbanks", 0x6000, 0x0000, 0x1000 )
- ROM_COPY( "gfxbanks", 0x5000, 0x1000, 0x1000 )
- ROM_COPY( "gfxbanks", 0x4000, 0x2000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x6000, 0x0000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x5000, 0x1000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x4000, 0x2000, 0x1000 )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "dm74s287an.u32", 0x0000, 0x0100, CRC(2d207266) SHA1(374b4830a0a8ed3001cf0df16daa8dffee503cbe) )
+ ROM_LOAD( "dm74s287an.u32", 0x0000, 0x0100, CRC(2d207266) SHA1(374b4830a0a8ed3001cf0df16daa8dffee503cbe) )
ROM_END
ROM_START( 5clownsp )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "five_clown_sp.u2", 0x2000, 0x8000, CRC(fa18090d) SHA1(47feb5dbc77ae8621fc35b707c24d64a95227a39) )
- ROM_COPY( "maincpu", 0x2000, 0x8000, 0x8000 )
+ ROM_LOAD( "five_clown_sp.u2", 0x2000, 0x8000, CRC(fa18090d) SHA1(47feb5dbc77ae8621fc35b707c24d64a95227a39) )
+ ROM_COPY( "maincpu", 0x2000, 0x8000, 0x8000 )
ROM_REGION( 0x8000, "gfxbanks", 0 )
- ROM_LOAD( "7.u34", 0x0000, 0x8000, CRC(64c9f4ee) SHA1(6e695feee826e319f84d91f6bbf7cfacd443fc8f) )
+ ROM_LOAD( "7.u34", 0x0000, 0x8000, CRC(64c9f4ee) SHA1(6e695feee826e319f84d91f6bbf7cfacd443fc8f) )
ROM_REGION( 0x10000, "audiocpu", 0 )
- ROM_LOAD( "9.u35", 0xe000, 0x2000, CRC(7e3c3af5) SHA1(ebc09da981dbdf4eac90bcf982e5bc8ede47e81a) )
+ ROM_LOAD( "9.u35", 0xe000, 0x2000, CRC(7e3c3af5) SHA1(ebc09da981dbdf4eac90bcf982e5bc8ede47e81a) )
ROM_REGION( 0x40000, "oki6295", 0 )
- ROM_LOAD( "8.u50", 0x0000, 0x10000, CRC(e1e37180) SHA1(e162abcb01952e26deee74ece5719239961e1b69) )
+ ROM_LOAD( "8.u50", 0x0000, 0x10000, CRC(e1e37180) SHA1(e162abcb01952e26deee74ece5719239961e1b69) )
ROM_REGION( 0x3000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the remaining bitplanes */
- ROM_COPY( "gfxbanks", 0x7000, 0x2000, 0x1000 )
+ ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the remaining bitplanes */
+ ROM_COPY( "gfxbanks", 0x7000, 0x2000, 0x1000 )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_COPY( "gfxbanks", 0x6000, 0x0000, 0x1000 )
- ROM_COPY( "gfxbanks", 0x5000, 0x1000, 0x1000 )
- ROM_COPY( "gfxbanks", 0x4000, 0x2000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x6000, 0x0000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x5000, 0x1000, 0x1000 )
+ ROM_COPY( "gfxbanks", 0x4000, 0x2000, 0x1000 )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "dm74s287an.u32", 0x0000, 0x0100, CRC(2d207266) SHA1(374b4830a0a8ed3001cf0df16daa8dffee503cbe) )
+ ROM_LOAD( "dm74s287an.u32", 0x0000, 0x0100, CRC(2d207266) SHA1(374b4830a0a8ed3001cf0df16daa8dffee503cbe) )
ROM_END
@@ -1206,52 +1206,52 @@ ROM_END
DRIVER_INIT_MEMBER(_5clown_state,fclown)
{
- /* Decrypting main program */
+ /* Decrypting main program */
int x;
UINT8 *src = memregion( "maincpu" )->base();
for (x = 0x0000; x < 0x10000; x++)
{
- src[x] = src[x] ^ 0x20; /* Decrypting byte */
+ src[x] = src[x] ^ 0x20; /* Decrypting byte */
}
- /* Decrypting GFX by segments */
+ /* Decrypting GFX by segments */
UINT8 *gfx1_src = machine().root_device().memregion( "gfx1" )->base();
UINT8 *gfx2_src = machine().root_device().memregion( "gfx2" )->base();
for (x = 0x2000; x < 0x3000; x++)
{
- gfx1_src[x] = gfx1_src[x] ^ 0x22; /* Decrypting bulk GFX segment 7000-7fff */
+ gfx1_src[x] = gfx1_src[x] ^ 0x22; /* Decrypting bulk GFX segment 7000-7fff */
}
for (x = 0x0000; x < 0x1000; x++)
{
- gfx2_src[x] = gfx2_src[x] ^ 0x3f; /* Decrypting bulk GFX segment 6000-6fff */
+ gfx2_src[x] = gfx2_src[x] ^ 0x3f; /* Decrypting bulk GFX segment 6000-6fff */
}
for (x = 0x2000; x < 0x3000; x++)
{
- gfx2_src[x] = gfx2_src[x] ^ 0x22; /* Decrypting bulk GFX segment 4000-4fff */
+ gfx2_src[x] = gfx2_src[x] ^ 0x22; /* Decrypting bulk GFX segment 4000-4fff */
}
- /* Decrypting sound samples */
+ /* Decrypting sound samples */
UINT8 *samples_src = machine().root_device().memregion( "oki6295" )->base();
for (x = 0x0000; x < 0x10000; x++)
{
- if (samples_src[x] & 0x02) /* If bit 1 is active... */
+ if (samples_src[x] & 0x02) /* If bit 1 is active... */
{
- samples_src[x] = samples_src[x] ^ 0x02; /* Then bit 1 XOR'ed */
+ samples_src[x] = samples_src[x] ^ 0x02; /* Then bit 1 XOR'ed */
}
else
{
- samples_src[x] = samples_src[x] ^ 0x12; /* Otherwise bit 1 & 5 XOR'ed */
+ samples_src[x] = samples_src[x] ^ 0x12; /* Otherwise bit 1 & 5 XOR'ed */
}
}
diff --git a/src/mame/drivers/8080bw.c b/src/mame/drivers/8080bw.c
index 549f3f1495d..4085ac7ce95 100644
--- a/src/mame/drivers/8080bw.c
+++ b/src/mame/drivers/8080bw.c
@@ -226,19 +226,19 @@ static INPUT_PORTS_START( sicv )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_START("IN2")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_TILT ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_TILT ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, "1000" )
PORT_DIPSETTING( 0x00, "1500" )
/* SW1:5,6,7: In OFF, PL2 can have no control of joystick, going auto left/right and other problems like no laser gun.
- Be sure these are always ON */
+ Be sure these are always ON */
PORT_BIT( 0x70, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mw8080bw_state,invaders_in2_control_r, NULL) PORT_DIPLOCATION("SW1:5,6,7") /* Labeled as "FACTORY" */
- PORT_DIPNAME( 0x80, 0x00, "Coin Info" ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, "Coin Info" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -299,16 +299,16 @@ static INPUT_PORTS_START( alieninv )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN2")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x01, "3" )
- PORT_DIPNAME( 0x02, 0x02, "Pence Coinage" ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x02, 0x02, "Pence Coinage" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_DIPLOCATION("SW1:3") /* Pence Coin */
- PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW1:4" ) /* Not bonus */
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_DIPLOCATION("SW1:3") /* Pence Coin */
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW1:4" ) /* Not bonus */
PORT_BIT( 0x70, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, mw8080bw_state,invaders_in2_control_r, NULL) PORT_DIPLOCATION("SW1:5,6,7")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, "2C/1C 50p/3C (+ Bonus Life)" )
PORT_DIPSETTING( 0x80, "1C/1C 50p/5C" )
@@ -455,11 +455,11 @@ static INPUT_PORTS_START( spcewars )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x00, "SW1:2" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, "1500" )
PORT_DIPSETTING( 0x08, "2000" )
INPUT_PORTS_END
@@ -512,7 +512,7 @@ static INPUT_PORTS_START( astropal )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x03, "5" )
- PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED ) /* never read */
+ PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED ) /* never read */
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
@@ -582,7 +582,7 @@ static INPUT_PORTS_START( cosmo )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x00, "SW1:2" )
@@ -622,15 +622,15 @@ static INPUT_PORTS_START( searthin )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x01, "3" )
- PORT_DIPNAME( 0x02, 0x02, "Pence Coinage" ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x02, 0x02, "Pence Coinage" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_DIPLOCATION("SW1:3") /* Pence Coin */
- PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW1:4" ) /* Not bonus */
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_DIPLOCATION("SW1:3") /* Pence Coin */
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW1:4" ) /* Not bonus */
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, "2C/1C 50p/3C (+ Bonus Life)" )
PORT_DIPSETTING( 0x80, "1C/1C 50p/5C" )
INPUT_PORTS_END
@@ -647,7 +647,7 @@ static INPUT_PORTS_START( sinvzen )
PORT_INCLUDE( sicv )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
INPUT_PORTS_END
@@ -665,7 +665,7 @@ static INPUT_PORTS_START( spaceat2 )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x00, "SW1:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "SW1:6" )
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x00, "SW1:7" )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
@@ -729,7 +729,7 @@ static INPUT_PORTS_START( spacecom )
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xfe, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // unused?
- PORT_START(CABINET_PORT_TAG) /* Dummy port for cocktail mode */
+ PORT_START(CABINET_PORT_TAG) /* Dummy port for cocktail mode */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
@@ -810,7 +810,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( invrvnge )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x02, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x04, DEF_STR( Harder ) )
@@ -819,7 +819,7 @@ static INPUT_PORTS_START( invrvnge )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_DIPNAME( 0x80, 0x80, "Fuel Destroyed by Comet" ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x80, 0x80, "Fuel Destroyed by Comet" ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x80, "6" )
@@ -834,19 +834,19 @@ static INPUT_PORTS_START( invrvnge )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("IN2")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_TILT )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, "1500" )
PORT_DIPSETTING( 0x08, "2000" )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) // 1 play 10p, 2 play 20p, 6 play 50p
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) // 1 play 20p, 2 play 40p, 3 play 50p
@@ -913,19 +913,19 @@ static INPUT_PORTS_START( spclaser )
// ROM disassembly doesn't show any dipswitch reads on portmapped I/O, maybe the manual is for a different ROM set? (that we don't have the dump for)
#if 0
// these are the settings according to Gameplan Intruder manual
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW1:3" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, "1000" )
PORT_DIPSETTING( 0x00, "1500" )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_DIPNAME( 0x80, 0x80, "Display Coinage" ) PORT_DIPLOCATION("SW:8")
+ PORT_DIPNAME( 0x80, 0x80, "Display Coinage" ) PORT_DIPLOCATION("SW:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
#endif
@@ -938,7 +938,7 @@ static INPUT_PORTS_START( spclaser )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
- PORT_DIPNAME( 0x80, 0x00, DEF_STR(Coinage) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR(Coinage) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, "1 Coin/1 Or 2 Players" )
PORT_DIPSETTING( 0x80, "1 Coin/1 Player 2 Coins/2 Players" ) /* Irrelevant, causes bugs */
@@ -965,16 +965,16 @@ static INPUT_PORTS_START( galxwars )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x03, "5" )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:3" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, "3000" )
PORT_DIPSETTING( 0x08, "5000" )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
INPUT_PORTS_END
@@ -982,11 +982,11 @@ INPUT_PORTS_END
static ADDRESS_MAP_START( starw1_io_map, AS_IO, 8, _8080bw_state )
AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
- AM_RANGE(0x03, 0x03) AM_WRITENOP /* writes 9B at boot */
+ AM_RANGE(0x03, 0x03) AM_WRITENOP /* writes 9B at boot */
AM_RANGE(0x04, 0x04) AM_WRITE(invadpt2_sh_port_1_w)
AM_RANGE(0x05, 0x05) AM_WRITE(invadpt2_sh_port_2_w)
AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
- AM_RANGE(0x07, 0x07) AM_WRITENOP /* writes 89 at boot */
+ AM_RANGE(0x07, 0x07) AM_WRITENOP /* writes 89 at boot */
ADDRESS_MAP_END
static MACHINE_CONFIG_DERIVED_CLASS( starw1, invadpt2, _8080bw_state )
@@ -1068,21 +1068,21 @@ static INPUT_PORTS_START( cosmicmo )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x03, "5" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, "1500" )
PORT_DIPSETTING( 0x08, "2500" )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
@@ -1148,17 +1148,17 @@ static INPUT_PORTS_START( invasion )
PORT_MODIFY("IN2")
/* SW1:5-8 Unused according to manual. */
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4,3") /* Default is OFF, OFF (6) */
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4,3") /* Default is OFF, OFF (6) */
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:8" ) /* Default OFF */
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:2") /* Default is ON (2500) */
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:8" ) /* Default OFF */
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:2") /* Default is ON (2500) */
PORT_DIPSETTING( 0x08, "1500" )
PORT_DIPSETTING( 0x00, "2500" )
/* SW1:5,6,7 Default ON */
- PORT_DIPNAME( 0x80, 0x80, "Laser Bonus Info" ) PORT_DIPLOCATION("SW1:1") /* Default is OFF (Info on) */
+ PORT_DIPNAME( 0x80, 0x80, "Laser Bonus Info" ) PORT_DIPLOCATION("SW1:1") /* Default is OFF (Info on) */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1180,7 +1180,7 @@ static INPUT_PORTS_START( superinv )
PORT_MODIFY("IN2")
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:3" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, "1500" )
PORT_DIPSETTING( 0x00, "2500" )
PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x00, "SW1:8" )
@@ -1281,7 +1281,7 @@ static INPUT_PORTS_START( schaser )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_DIPNAME( 0x60, 0x00, "Hard Starting Level" ) PORT_DIPLOCATION("SW1:5,7")
+ PORT_DIPNAME( 0x60, 0x00, "Hard Starting Level" ) PORT_DIPLOCATION("SW1:5,7")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x40, "5" )
@@ -1298,20 +1298,20 @@ static INPUT_PORTS_START( schaser )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 )
- PORT_START("IN2") // port 2
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_START("IN2") // port 2
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:3" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
// Name Reset - if name of high scorer was rude, owner can press this button
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Name Reset") PORT_CODE(KEYCODE_F1)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_TILT )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
@@ -1342,7 +1342,7 @@ MACHINE_RESET_MEMBER(_8080bw_state,schaser)
static MACHINE_CONFIG_DERIVED_CLASS( schaser, mw8080bw_root, _8080bw_state )
/* basic machine hardware */
- MCFG_CPU_REPLACE("maincpu",I8080,1996800) /* 19.968MHz / 10 */
+ MCFG_CPU_REPLACE("maincpu",I8080,1996800) /* 19.968MHz / 10 */
MCFG_CPU_PROGRAM_MAP(schaser_map)
MCFG_CPU_IO_MAP(schaser_io_map)
MCFG_WATCHDOG_VBLANK_INIT(255)
@@ -1419,17 +1419,17 @@ static INPUT_PORTS_START( schasercv )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_START("IN2")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:2")
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:3")
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:2")
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_DIPLOCATION("SW1:5")
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:6")
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:7")
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_DIPLOCATION("SW1:5")
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:6")
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2) PORT_DIPLOCATION("SW1:7")
PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x00, "SW1:8" )
/* Dummy port for cocktail mode */
@@ -1585,15 +1585,15 @@ static INPUT_PORTS_START( lupin3 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_START("IN2")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x08, 0x00, "Bags To Collect" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, "Bags To Collect" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, "2" )
PORT_DIPSETTING( 0x00, "8" )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW1:5" )
@@ -1612,7 +1612,7 @@ static INPUT_PORTS_START( lupin3a )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* something has to do with sound */
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x10, DEF_STR( Japanese ) )
INPUT_PORTS_END
@@ -1688,7 +1688,7 @@ INTERRUPT_GEN_MEMBER(_8080bw_state::polaris_interrupt)
{
m_polaris_cloud_speed++;
- if (m_polaris_cloud_speed >= 4) /* every 4 frames - this was verified against real machine */
+ if (m_polaris_cloud_speed >= 4) /* every 4 frames - this was verified against real machine */
{
m_polaris_cloud_speed = 0;
m_polaris_cloud_pos++;
@@ -1749,20 +1749,20 @@ static INPUT_PORTS_START( polaris )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
PORT_START("IN2")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x08, 0x00, "Invincible Test" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, "Invincible Test" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
/* The Demo Sounds dip switch does function.
- It allows the sonar sounds to play in demo mode. */
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
+ It allows the sonar sounds to play in demo mode. */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW1:6" )
@@ -1784,7 +1784,7 @@ INPUT_PORTS_END
static MACHINE_CONFIG_DERIVED_CLASS( polaris, mw8080bw_root, _8080bw_state )
/* basic machine hardware */
- MCFG_CPU_REPLACE("maincpu",I8080,1996800) /* 19.968MHz / 10 */
+ MCFG_CPU_REPLACE("maincpu",I8080,1996800) /* 19.968MHz / 10 */
MCFG_CPU_PROGRAM_MAP(schaser_map)
MCFG_CPU_IO_MAP(polaris_io_map)
MCFG_WATCHDOG_VBLANK_INIT(255)
@@ -1821,16 +1821,16 @@ static INPUT_PORTS_START( ozmawars )
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x03, 0x00, "Energy" ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, "Energy" ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "15000" )
PORT_DIPSETTING( 0x01, "20000" )
PORT_DIPSETTING( 0x02, "25000" )
PORT_DIPSETTING( 0x03, "35000" )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:3" )
- PORT_DIPNAME( 0x08, 0x00, "Bonus Energy" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, "Bonus Energy" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, "15000" )
PORT_DIPSETTING( 0x08, "10000" )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
INPUT_PORTS_END
@@ -1859,7 +1859,7 @@ static INPUT_PORTS_START( sinvemag )
PORT_MODIFY("IN2")
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW1:3" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, "2000" )
PORT_DIPSETTING( 0x00, "3000" )
INPUT_PORTS_END
@@ -2068,8 +2068,8 @@ READ8_MEMBER(_8080bw_state::indianbt_r)
{
switch(space.device().safe_pc())
{
- case 0x5fed: return 0x10;
- case 0x5ffc: return 0;
+ case 0x5fed: return 0x10;
+ case 0x5ffc: return 0;
}
logerror("unknown port 0 read @ %x\n",space.device().safe_pc());
return machine().rand();
@@ -2119,7 +2119,7 @@ MACHINE_CONFIG_END
WRITE8_MEMBER(_8080bw_state::steelwkr_sh_port_3_w)
{
- coin_lockout_global_w(machine(), !(~data & 0x03)); /* possibly */
+ coin_lockout_global_w(machine(), !(~data & 0x03)); /* possibly */
}
static ADDRESS_MAP_START( steelwkr_io_map, AS_IO, 8, _8080bw_state )
@@ -2145,12 +2145,12 @@ static INPUT_PORTS_START( steelwkr )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_START("IN2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x01, "2" )
PORT_DIPSETTING( 0x02, "3" )
PORT_DIPSETTING( 0x03, "4" )
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_TILT ) PORT_DIPLOCATION("SW1:3")
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_TILT ) PORT_DIPLOCATION("SW1:3")
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW1:4" )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
@@ -2308,10 +2308,10 @@ READ8_MEMBER(_8080bw_state::shuttlei_ff_r)
WRITE8_MEMBER(_8080bw_state::shuttlei_ff_w)
{
- /* bit 0 goes high when first coin inserted
- bit 1 also goes high when subsequent coins are inserted
- These may be for indicator lamps under the start buttons.
- bit 2 goes high while player 2 is playing */
+ /* bit 0 goes high when first coin inserted
+ bit 1 also goes high when subsequent coins are inserted
+ These may be for indicator lamps under the start buttons.
+ bit 2 goes high while player 2 is playing */
m_flip_screen = BIT(data, 2) & BIT(ioport(CABINET_PORT_TAG)->read(), 0);
}
@@ -2512,19 +2512,19 @@ static INPUT_PORTS_START( vortex )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("IN2")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_1C ) )
INPUT_PORTS_END
@@ -2560,16 +2560,16 @@ DRIVER_INIT_MEMBER(_8080bw_state,vortex)
{
UINT32 addr = x;
/*
- A15 A14 A13 A0 A3 A9
- 0 0 0 I I I
- 0 0 1 I I I
- 0 1 0 N N N
- 0 1 1 N I I
- 1 0 0 N I I
- 1 0 1 N I I
- 1 1 0 N I I
- 1 1 1 N I I
- */
+ A15 A14 A13 A0 A3 A9
+ 0 0 0 I I I
+ 0 0 1 I I I
+ 0 1 0 N N N
+ 0 1 1 N I I
+ 1 0 0 N I I
+ 1 0 1 N I I
+ 1 1 0 N I I
+ 1 1 1 N I I
+ */
switch (x&0xE000) // inputs are A13 A14 A15
{
case 0x0000: case 0x2000: // A0 A3 A9
@@ -2582,14 +2582,14 @@ DRIVER_INIT_MEMBER(_8080bw_state,vortex)
addr ^= 0x0208;
break;
/*
- case 0x0000: case 0x2000: // A0 A3 A9
- addr ^= 0x0001;
- break;
- case 0x4000:
- addr ^= 0x0208;
- break;
- case 0x6000: case 0x8000: case 0xa000: case 0xc000: case 0xe000:
- break;*/
+ case 0x0000: case 0x2000: // A0 A3 A9
+ addr ^= 0x0001;
+ break;
+ case 0x4000:
+ addr ^= 0x0208;
+ break;
+ case 0x6000: case 0x8000: case 0xa000: case 0xc000: case 0xe000:
+ break;*/
}
buf1[addr] = rom[x];
}
@@ -2742,23 +2742,23 @@ INPUT_CHANGED_MEMBER(_8080bw_state::claybust_gun_trigger)
if (newval)
{
/*
- The game registers a valid shot after the gun trigger is pressed, and IN1 d0 is high.
- It latches the gun position and then compares it with VRAM contents: 1 byte/8 pixels, 0 means miss.
- IN1 d0 probably indicates if the latch is ready or not (glitches happen otherwise)
-
- in $06
- cpi $04
- rc
- mov h,a
- in $02
- mov l,a
- lxi d,$1ffe <-- this is where the +2 comes from
- dad d
- out $00
- mov a,m
- ana a
- rz
- */
+ The game registers a valid shot after the gun trigger is pressed, and IN1 d0 is high.
+ It latches the gun position and then compares it with VRAM contents: 1 byte/8 pixels, 0 means miss.
+ IN1 d0 probably indicates if the latch is ready or not (glitches happen otherwise)
+
+ in $06
+ cpi $04
+ rc
+ mov h,a
+ in $02
+ mov l,a
+ lxi d,$1ffe <-- this is where the +2 comes from
+ dad d
+ out $00
+ mov a,m
+ ana a
+ rz
+ */
UINT8 gunx = ioport("GUNX")->read_safe(0x00);
UINT8 guny = ioport("GUNY")->read_safe(0x20);
m_claybust_gun_pos = ((gunx >> 3) | (guny << 5)) + 2;
@@ -2795,7 +2795,7 @@ static INPUT_PORTS_START( claybust )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
// switch is 6-pos, but DNS06:5 and DNS06:6 are not connected
- PORT_DIPNAME( 0x10, 0x10, "Shots" ) PORT_DIPLOCATION("DNS06:1")
+ PORT_DIPNAME( 0x10, 0x10, "Shots" ) PORT_DIPLOCATION("DNS06:1")
PORT_DIPSETTING( 0x10, "4" )
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "DNS06:2" )
@@ -2814,10 +2814,10 @@ static INPUT_PORTS_START( gunchamp )
PORT_MODIFY("IN1")
// switch is 6-pos, but DNS06:5 and DNS06:6 are not connected
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DNS06:1")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DNS06:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0xe0, 0x40, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DNS06:2,3,4")
+ PORT_DIPNAME( 0xe0, 0x40, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DNS06:2,3,4")
PORT_DIPSETTING( 0xa0, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0xe0, DEF_STR( 2C_1C ) )
@@ -3242,7 +3242,7 @@ ROM_START( sicv )
ROM_LOAD( "cv19.34", 0x1000, 0x0800, CRC(d202b41c) SHA1(868fe938ef768655c894ec95b7d9a81bf21f69ca) )
ROM_LOAD( "cv20.33", 0x1800, 0x0800, CRC(c74ee7b6) SHA1(4f52db274a2d4433ab67c099ee805e8eb8516c0f) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "cv01.1", 0x0000, 0x0400, CRC(037e16ac) SHA1(d585030aaff428330c91ae94d7cd5c96ebdd67dd) )
ROM_LOAD( "cv02.2", 0x0400, 0x0400, CRC(8263da38) SHA1(2e7c769d129e6f8a1a31eba1e02777bb94ac32b2) )
ROM_END
@@ -3256,7 +3256,7 @@ ROM_START( sisv )
ROM_LOAD( "sv09.42", 0x1800, 0x0400, CRC(cd80b13f) SHA1(0f4b9537b99fe3cdeebe525efb1869a1be0bc704) )
ROM_LOAD( "sv06.41", 0x1c00, 0x0400, CRC(2c68e0b4) SHA1(a5e5357120102ad32792bf3ef6362f45b7ba7070) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "cv01(__sisv).1", 0x0000, 0x0400, CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "cv02(__sisv).2", 0x0400, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
ROM_END
@@ -3270,7 +3270,7 @@ ROM_START( sisv2 )
ROM_LOAD( "sv13.42", 0x1800, 0x0400, CRC(a9011634) SHA1(1f1369ecb02078042cfdf17a497b8dda6dd23793) )
ROM_LOAD( "sv14.41", 0x1c00, 0x0400, CRC(58730370) SHA1(13dc806bcecd2d6089a85dd710ac2869413f7475) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "cv01(__sisv).1", 0x0000, 0x0400, CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "cv02(__sisv).2", 0x0400, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
ROM_END
@@ -3282,7 +3282,7 @@ ROM_START( spacerng )
ROM_LOAD( "sr3.u34", 0x1000, 0x0800, CRC(edc28ba9) SHA1(c96668f709d3fa0b97a6b118614e9c139f8f54cc) )
ROM_LOAD( "sr4.u33", 0x1800, 0x0800, CRC(a95f559f) SHA1(f597c7af96a9d039fd8e54d976d68a065f6bf0c8) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
/* !! not dumped yet, these were taken from sisv */
ROM_LOAD( "cv01(__sisv).1", 0x0000, 0x0400, BAD_DUMP CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "cv02(__sisv).2", 0x0400, 0x0400, BAD_DUMP CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
@@ -3356,7 +3356,7 @@ ROM_START( invadpt2 )
ROM_LOAD( "pv04", 0x1800, 0x0800, CRC(8f0e62e0) SHA1(a967b155f15f8432222fcc78b23121b00c405c5c) )
ROM_LOAD( "pv05", 0x4000, 0x0800, CRC(19b505e9) SHA1(6a31a37586782ce421a7d2cffd8f958c00b7b415) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "pv06.1", 0x0000, 0x0400, CRC(a732810b) SHA1(a5fabffa73ca740909e23b9530936f9274dff356) )
ROM_LOAD( "pv07.2", 0x0400, 0x0400, CRC(2c5b91cb) SHA1(7fa4d4aef85473b1b4f18734230c164e72be44e7) )
ROM_END
@@ -3385,7 +3385,7 @@ ROM_START( invadpt2br )
ROM_LOAD( "br_pv04", 0x1800, 0x0800, CRC(b0626aff) SHA1(b7de6c21030732bd0479228f057ca4c87b913b0a) )
ROM_LOAD( "br_pv05", 0x4000, 0x0800, CRC(84c70bb8) SHA1(75fef3ee6da3e7e01a257629016bc10a23691d62) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (taken from parent set) */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (taken from parent set) */
ROM_LOAD( "pv06.1", 0x0000, 0x0400, CRC(a732810b) SHA1(a5fabffa73ca740909e23b9530936f9274dff356) )
ROM_LOAD( "pv07.2", 0x0400, 0x0400, CRC(2c5b91cb) SHA1(7fa4d4aef85473b1b4f18734230c164e72be44e7) )
ROM_END
@@ -3424,7 +3424,7 @@ ROM_START( moonbase )
ROM_LOAD( "ze3-9.e5", 0x4000, 0x0400, CRC(2dd5adfa) SHA1(62cb98cad1e48de0e0cbf30392d35834b38dadbd) )
ROM_LOAD( "ze3-10.f5", 0x4400, 0x0400, CRC(1e7c22a4) SHA1(b34173375494ffbf5400dd4014a683a9807f4f08) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "cv02.h7", 0x0000, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) ) /* NEC B406 or compatible BPROM, like the 82S137 */
ROM_LOAD( "cv01.g7", 0x0400, 0x0400, CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) ) /* NEC B406 or compatible BPROM, like the 82S137 */
ROM_END
@@ -3442,7 +3442,7 @@ ROM_START( moonbasea )
ROM_LOAD( "ze3-9.e5", 0x4000, 0x0400, CRC(2dd5adfa) SHA1(62cb98cad1e48de0e0cbf30392d35834b38dadbd) )
ROM_LOAD( "ze3-10.f5", 0x4400, 0x0400, CRC(1e7c22a4) SHA1(b34173375494ffbf5400dd4014a683a9807f4f08) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "cv02.h7", 0x0000, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) ) /* NEC B406 or compatible BPROM, like the 82S137 */
ROM_LOAD( "cv01.g7", 0x0400, 0x0400, CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) ) /* NEC B406 or compatible BPROM, like the 82S137 */
ROM_END
@@ -3531,7 +3531,7 @@ ROM_START( spclaser )
ROM_LOAD( "la03", 0x1000, 0x0800, CRC(1083e9cc) SHA1(7ad45c6230c9e02fcf51e3414c15e2237eebbd7a) )
ROM_LOAD( "la04", 0x1800, 0x0800, CRC(5116b234) SHA1(b165b2574cbcb26a5bb43f91df5f8be5f111f486) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
/* !! not dumped yet, these were taken from sisv/intruder */
ROM_LOAD( "01.1", 0x0000, 0x0400, BAD_DUMP CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "02.2", 0x0400, 0x0400, BAD_DUMP CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
@@ -3544,7 +3544,7 @@ ROM_START( intruder )
ROM_LOAD( "la03-1.34", 0x1000, 0x0800, CRC(278ef9cf) SHA1(74a9c1d3500ea28e50d07363a547c381999c84fa) )
ROM_LOAD( "la04-1.33", 0x1800, 0x0800, CRC(5116b234) SHA1(b165b2574cbcb26a5bb43f91df5f8be5f111f486) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "01.1", 0x0000, 0x0400, CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "02.2", 0x0400, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
ROM_END
@@ -3556,7 +3556,7 @@ ROM_START( laser )
ROM_LOAD( "3.u34", 0x1000, 0x0800, CRC(ed79000b) SHA1(bfe0407e833ce61aa909f5f1f93c3fc1d46605e9) )
ROM_LOAD( "4.u33", 0x1800, 0x0800, CRC(10a160a1) SHA1(e2d4208af11b65fc42d2856e57ee3c196f89d360) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
/* !! not dumped yet, these were taken from intruder */
ROM_LOAD( "01.1", 0x0000, 0x0400, BAD_DUMP CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "02.2", 0x0400, 0x0400, BAD_DUMP CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
@@ -3569,7 +3569,7 @@ ROM_START( spcewarl )
ROM_LOAD( "spcewarl.3", 0x1000, 0x0800, CRC(7820df3a) SHA1(53315857f4282c68624b338b068d80ee6828af4c) )
ROM_LOAD( "spcewarl.4", 0x1800, 0x0800, CRC(adc05b8d) SHA1(c4acf75537c0662a4785d5d6a90643239a54bf43) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
/* !! not dumped yet, these were taken from intruder */
ROM_LOAD( "01.1", 0x0000, 0x0400, BAD_DUMP CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "02.2", 0x0400, 0x0400, BAD_DUMP CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
@@ -3584,7 +3584,7 @@ ROM_START( galxwars )
ROM_LOAD( "univgw1.4", 0x4000, 0x0400, CRC(0871156e) SHA1(3726d0bfe153a0afc62ea56737662074986064b0) )
ROM_LOAD( "univgw2.5", 0x4400, 0x0400, CRC(6036d7bf) SHA1(36c2ad2ffdb47bbecc40fd67ced6ab51a5cd2f3e) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
/* !! not dumped yet, these were taken from sisv/intruder */
/* Or are colormaps generated by a group of TTLs, similar to dai3wksi? */
ROM_LOAD( "01.1", 0x0000, 0x0400, BAD_DUMP CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
@@ -3596,7 +3596,7 @@ ROM_START( galxwars2 )
ROM_LOAD( "3192.h6", 0x0000, 0x1000, CRC(bde6860b) SHA1(e04b8add32d8f7ea588fae6d6a387f1d40495f1b) )
ROM_LOAD( "3193.h7", 0x4000, 0x1000, CRC(a17cd507) SHA1(554ab0e8bdc0e7af4a30b0ddc8aa053c8e70255c) ) /* 2nd half unused */
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
/* !! not dumped yet, these were taken from sisv/intruder */
/* Or are colormaps generated by a group of TTLs, similar to dai3wksi? */
ROM_LOAD( "01.1", 0x0000, 0x0400, BAD_DUMP CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
@@ -3612,7 +3612,7 @@ ROM_START( galxwarst )
ROM_LOAD( "galxwars.4", 0x4000, 0x0400, CRC(ae4fe8fb) SHA1(494f44167dc84e4515b769c12f6e24419461dce4) )
ROM_LOAD( "galxwars.5", 0x4400, 0x0400, CRC(37708a35) SHA1(df6fd521ddfa146ef93e390e47741bdbfda1e7ba) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
/* !! not dumped yet, these were taken from sisv/intruder */
/* Or are colormaps generated by a group of TTLs, similar to dai3wksi? */
ROM_LOAD( "01.1", 0x0000, 0x0400, BAD_DUMP CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
@@ -3638,7 +3638,7 @@ ROM_START( starw1 )
ROM_LOAD( "gc.81", 0x1800, 0x0400, CRC(246621ef) SHA1(bddc5253f735fa81266d725a24b1c14faabe0c6a) )
ROM_LOAD( "gc.82", 0x1c00, 0x0400, CRC(19bd32ee) SHA1(a1718a6a6300c3d7df469793cb0d590c4a966aff) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "cv01", 0x0000, 0x0400, CRC(8d892ef3) SHA1(c471dd6197a3c779d89c33fcb425cf3bbdf4fc15) )
ROM_IGNORE( 0x0400 )
ROM_LOAD( "cv02", 0x0400, 0x0400, CRC(b44ddde8) SHA1(8793f370526c072e645d8d0b9794b1b64a7701ef) )
@@ -3654,9 +3654,9 @@ ROM_START( lrescue )
ROM_LOAD( "lrescue.5", 0x4000, 0x0800, CRC(58fde8bc) SHA1(663665ac5254204c1eba18357d9867034eae55eb) )
ROM_LOAD( "lrescue.6", 0x4800, 0x0800, CRC(bfb0f65d) SHA1(ea0943d764a16094b6e2289f62ef117c9f838c98) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color map */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color map */
ROM_LOAD( "7643-1.cpu", 0x0000, 0x0400, CRC(8b2e38de) SHA1(d6a757be31c3a179d31bd3709e71f9e38ec632e9) )
- ROM_RELOAD( 0x0400, 0x0400 )
+ ROM_RELOAD( 0x0400, 0x0400 )
ROM_END
/*
@@ -3741,7 +3741,7 @@ ROM_START( mlander )
ROM_LOAD( "ml5.u32", 0x4000, 0x0800, CRC(88291fa2) SHA1(40c4eb51f75b5ca81a62121231d22b9f48d0f628) )
ROM_LOAD( "ml6.u31", 0x4800, 0x0800, CRC(bfb0f65d) SHA1(ea0943d764a16094b6e2289f62ef117c9f838c98) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color map */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color map */
ROM_LOAD( "01.bin", 0x0000, 0x0400, CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "02.bin", 0x0400, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
ROM_END
@@ -3755,9 +3755,9 @@ ROM_START( grescue )
ROM_LOAD( "grescue.5", 0x4000, 0x0800, CRC(a419a4d6) SHA1(8eeeb31cbebffc98d2c6c5b964f9b320fcf303d2) )
ROM_LOAD( "lrescue.6", 0x4800, 0x0800, CRC(bfb0f65d) SHA1(ea0943d764a16094b6e2289f62ef117c9f838c98) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color map */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color map */
ROM_LOAD( "7643-1.cpu", 0x0000, 0x0400, CRC(8b2e38de) SHA1(d6a757be31c3a179d31bd3709e71f9e38ec632e9) )
- ROM_RELOAD( 0x0400, 0x0400 )
+ ROM_RELOAD( 0x0400, 0x0400 )
ROM_END
ROM_START( desterth )
@@ -3770,9 +3770,9 @@ ROM_START( desterth )
ROM_LOAD( "31_c.bin", 0x4800, 0x0800, CRC(ab019c30) SHA1(33931510a722168bcf7c30d22eac9345576b6631) )
ROM_LOAD( "42_b.bin", 0x5000, 0x0800, CRC(ed9dbac6) SHA1(4553f445ac32ebb1be490b02df4924f76557e8f9) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color map */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color map */
ROM_LOAD( "7643-1.cpu", 0x0000, 0x0400, CRC(8b2e38de) SHA1(d6a757be31c3a179d31bd3709e71f9e38ec632e9) )
- ROM_RELOAD( 0x0400, 0x0400 )
+ ROM_RELOAD( 0x0400, 0x0400 )
ROM_END
ROM_START( lrescuem )
@@ -3790,7 +3790,7 @@ ROM_START( lrescuem )
ROM_LOAD( "58.ic38", 0x4800, 0x0400, CRC(1b7a5644) SHA1(d26530ea11ada86f7c99b11d6faf4416a8f5a9eb) )
ROM_LOAD( "59.ic37", 0x4c00, 0x0400, CRC(c342b907) SHA1(327da029420c4eedabc2a0534199a008a3f341b8) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 - these don't really fit this game, but were on the PCB */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 - these don't really fit this game, but were on the PCB */
ROM_LOAD( "cv01-7643.2c", 0x0000, 0x0400, CRC(aac24f34) SHA1(ad110e776547fb48baac568bb50d61854537ca34) )
ROM_LOAD( "cv02-7643.1c", 0x0400, 0x0400, CRC(2bdf83a0) SHA1(01ffbd43964c41987e7d44816271308f9a70802b) )
ROM_END
@@ -3822,7 +3822,7 @@ ROM_START( cosmo )
ROM_LOAD( "6.31", 0x4800, 0x0800, CRC(b037f6c4) SHA1(b9a42948052b8cda8d2e4575e59909589f4e7a8d) )
ROM_LOAD( "7.42", 0x5000, 0x0800, CRC(c3831ea2) SHA1(8c67ef0312656ef0eeff34b8463376c736bd8ea1) )
- ROM_REGION( 0x1000, "proms", 0 ) /* color map */
+ ROM_REGION( 0x1000, "proms", 0 ) /* color map */
ROM_LOAD( "n-1.7d", 0x0800, 0x0800, CRC(bd8576f1) SHA1(aa5fe0a4d024f21a3bca7a6b3f5022779af6f3f4) )
ROM_LOAD( "n-2.6e", 0x0000, 0x0800, CRC(48f1ade5) SHA1(a1b45f82f3649cde8ae6a2ef494a3a6cdb5e65d0) )
ROM_END
@@ -4021,7 +4021,7 @@ ROM_START( schaser )
ROM_LOAD( "rt21.bin", 0x4000, 0x0400, CRC(b368ac98) SHA1(6860efe0496955db67611183be0efecda92c9c98) )
ROM_LOAD( "rt22.bin", 0x4400, 0x0400, CRC(6e060dfb) SHA1(614e2ecf676c3ea2f9ea869125cfffef2f713684) )
- ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
+ ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
ROM_LOAD( "rt06.ic2", 0x0000, 0x0400, CRC(950cf973) SHA1(d22df09b325835a0057ccd0d54f827b374254ac6) )
ROM_END
@@ -4033,7 +4033,7 @@ ROM_START( schasera )
ROM_LOAD( "rt19.bin", 0x1800, 0x0800, CRC(c0adab87) SHA1(4bb8e4ccfb5eaa052584555bfa03fecf19ab8a29) )
ROM_LOAD( "rt21.bin", 0x4000, 0x0800, CRC(a3b31070) SHA1(af0108e1446a2be66cfc00d0b837fa91ab882441) )
- ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
+ ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
ROM_LOAD( "rt06.ic2", 0x0000, 0x0400, CRC(950cf973) SHA1(d22df09b325835a0057ccd0d54f827b374254ac6) )
ROM_END
@@ -4045,7 +4045,7 @@ ROM_START( schaserb )
ROM_LOAD( "rt36.bin", 0x1800, 0x0800, CRC(521ec25e) SHA1(ce53e882c11a4c36f3edc3b389d3f5ad0e0ec151) )
ROM_LOAD( "rt37.bin", 0x4000, 0x0800, CRC(44f65f19) SHA1(ee97d7987f54c9c26f5a20c72bdae04c46f94dc4) )
- ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
+ ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
ROM_LOAD( "rt06.ic2", 0x0000, 0x0400, CRC(950cf973) SHA1(d22df09b325835a0057ccd0d54f827b374254ac6) )
ROM_END
@@ -4060,18 +4060,18 @@ ROM_END
ROM_START( schasercv )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "1", 0x0000, 0x0400, CRC(bec2b16b) SHA1(c62210ecb64d7c38e5b63481d7fe04eb59bb1068) )
- ROM_LOAD( "2", 0x0400, 0x0400, CRC(9d25e608) SHA1(4cc52a93a3ab96a0ec1d07593e17832fa59b30a1) )
- ROM_LOAD( "3", 0x0800, 0x0400, CRC(113d0635) SHA1(ab5e98d0b5fc37d7d69bb5c541681a0f66460440) )
- ROM_LOAD( "4", 0x0c00, 0x0400, CRC(f3a43c8d) SHA1(29a7a8b7d1de763a255cfec79157fd95e7bff551) )
- ROM_LOAD( "5", 0x1000, 0x0400, CRC(47c84f23) SHA1(61b475fa92b8335f8edd3a128d8ac8561658e464) )
- ROM_LOAD( "6", 0x1400, 0x0400, CRC(02ff2199) SHA1(e12c235b2064cb4bb426145172e523256e3c6358) )
- ROM_LOAD( "7", 0x1800, 0x0400, CRC(87d06b88) SHA1(2d743161f85e47cb8ee2a600cbee790b1ad7ad99) )
- ROM_LOAD( "8", 0x1c00, 0x0400, CRC(6dfaad08) SHA1(2184c4e2f4b6bffdc4fe13e178134331fcd43253) )
- ROM_LOAD( "9", 0x4000, 0x0400, CRC(3d1a2ae3) SHA1(672ad6590aebdfebc2748455fa638107f3934c41) )
- ROM_LOAD( "10", 0x4400, 0x0400, CRC(037edb99) SHA1(f2fc5e61f962666e7f6bb81753ac24ea0b97e581) )
-
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (not used, but they were on the board) */
+ ROM_LOAD( "1", 0x0000, 0x0400, CRC(bec2b16b) SHA1(c62210ecb64d7c38e5b63481d7fe04eb59bb1068) )
+ ROM_LOAD( "2", 0x0400, 0x0400, CRC(9d25e608) SHA1(4cc52a93a3ab96a0ec1d07593e17832fa59b30a1) )
+ ROM_LOAD( "3", 0x0800, 0x0400, CRC(113d0635) SHA1(ab5e98d0b5fc37d7d69bb5c541681a0f66460440) )
+ ROM_LOAD( "4", 0x0c00, 0x0400, CRC(f3a43c8d) SHA1(29a7a8b7d1de763a255cfec79157fd95e7bff551) )
+ ROM_LOAD( "5", 0x1000, 0x0400, CRC(47c84f23) SHA1(61b475fa92b8335f8edd3a128d8ac8561658e464) )
+ ROM_LOAD( "6", 0x1400, 0x0400, CRC(02ff2199) SHA1(e12c235b2064cb4bb426145172e523256e3c6358) )
+ ROM_LOAD( "7", 0x1800, 0x0400, CRC(87d06b88) SHA1(2d743161f85e47cb8ee2a600cbee790b1ad7ad99) )
+ ROM_LOAD( "8", 0x1c00, 0x0400, CRC(6dfaad08) SHA1(2184c4e2f4b6bffdc4fe13e178134331fcd43253) )
+ ROM_LOAD( "9", 0x4000, 0x0400, CRC(3d1a2ae3) SHA1(672ad6590aebdfebc2748455fa638107f3934c41) )
+ ROM_LOAD( "10", 0x4400, 0x0400, CRC(037edb99) SHA1(f2fc5e61f962666e7f6bb81753ac24ea0b97e581) )
+
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (not used, but they were on the board) */
ROM_LOAD( "cv01", 0x0000, 0x0400, CRC(037e16ac) SHA1(d585030aaff428330c91ae94d7cd5c96ebdd67dd) )
ROM_LOAD( "cv02", 0x0400, 0x0400, CRC(8263da38) SHA1(2e7c769d129e6f8a1a31eba1e02777bb94ac32b2) )
ROM_END
@@ -4085,7 +4085,7 @@ ROM_START( lupin3 )
ROM_LOAD( "lp05.32", 0x4000, 0x0800, CRC(f5c2faf4) SHA1(8d056f8c630e4659c02dd5da759dd497e4734292) )
ROM_LOAD( "lp06.31", 0x4800, 0x0800, CRC(66289ab2) SHA1(fc9b4a7b7a08d43f34beaf1a8e68ed0ff6148534) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color map */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color map */
ROM_LOAD( "lp08.1", 0x0000, 0x0400, CRC(33dbd03a) SHA1(1e0ae1cad1e9a90642886ae2ef726d3f383dd6cf) )
ROM_LOAD( "lp09.2", 0x0400, 0x0400, CRC(9eaee652) SHA1(a4d2d8282ba825f3a8c0cc9bca16e1d36a0d0796) )
ROM_END
@@ -4111,10 +4111,10 @@ ROM_START( polaris )
ROM_LOAD( "ps10.38", 0x4800, 0x0800, CRC(3df77bac) SHA1(b3275c34b8d42df83df2c404c5b7d220aae651fa) )
ROM_LOAD( "ps26", 0x5000, 0x0800, CRC(9d5c3d50) SHA1(a6acf9ca6e807625156cb1759269014d5830a44f) )
- ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
+ ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
ROM_LOAD( "ps08.1b", 0x0000, 0x0400, CRC(164aa05d) SHA1(41c699ce45c76a60c71294f25d8df6c6e6c1280a) ) /* NEC B406 or compatible BPROM (82S137) */
- ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
+ ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
ROM_LOAD( "ps07.2c", 0x0000, 0x0100, CRC(2953253b) SHA1(2fb851bc9652ca4e51d473b484ede6dab05f1b51) ) /* MB7052 or compatible BPROM (82S129) */
ROM_END
@@ -4127,10 +4127,10 @@ ROM_START( polarisa )
ROM_LOAD( "ps05.32", 0x4000, 0x0800, CRC(772e31f3) SHA1(fa0b866b6df1a9217e286ca880b3bb3fb0644bf3) )
ROM_LOAD( "ps10.38", 0x4800, 0x0800, CRC(3df77bac) SHA1(b3275c34b8d42df83df2c404c5b7d220aae651fa) )
- ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
+ ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
ROM_LOAD( "ps08.1b", 0x0000, 0x0400, CRC(164aa05d) SHA1(41c699ce45c76a60c71294f25d8df6c6e6c1280a) ) /* NEC B406 or compatible BPROM (82S137) */
- ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
+ ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
ROM_LOAD( "ps07.2c", 0x0000, 0x0100, CRC(2953253b) SHA1(2fb851bc9652ca4e51d473b484ede6dab05f1b51) ) /* MB7052 or compatible BPROM (82S129) */
ROM_END
@@ -4144,10 +4144,10 @@ ROM_START( polariso )
ROM_LOAD( "ps05.32", 0x4000, 0x0800, CRC(772e31f3) SHA1(fa0b866b6df1a9217e286ca880b3bb3fb0644bf3) )
ROM_LOAD( "ps06.38", 0x4800, 0x0800, CRC(f577cb72) SHA1(7a931b5ebaf0d6941191f21afb9ed670d0251e07) )
- ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
+ ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
ROM_LOAD( "ps08.1b", 0x0000, 0x0400, CRC(164aa05d) SHA1(41c699ce45c76a60c71294f25d8df6c6e6c1280a) ) /* NEC B406 or compatible BPROM (82S137) */
- ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
+ ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
ROM_LOAD( "ps07.2c", 0x0000, 0x0100, CRC(2953253b) SHA1(2fb851bc9652ca4e51d473b484ede6dab05f1b51) ) /* MB7052 or compatible BPROM (82S129) */
ROM_END
@@ -4161,10 +4161,10 @@ ROM_START( polarisbr ) /* aka Polaris II on flyers? */
ROM_LOAD( "6", 0x4800, 0x0800, CRC(3df77bac) SHA1(b3275c34b8d42df83df2c404c5b7d220aae651fa) )
ROM_LOAD( "7", 0x5000, 0x0800, CRC(0d811b92) SHA1(09af62997e1e0da0525ab4f6ced775d3673d8f35) )
- ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
+ ROM_REGION( 0x0400, "proms", 0 ) /* background color map */
ROM_LOAD( "ps08.1b", 0x0000, 0x0400, CRC(164aa05d) SHA1(41c699ce45c76a60c71294f25d8df6c6e6c1280a) ) /* NEC B406 or compatible BPROM (82S137) */
- ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
+ ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics */
ROM_LOAD( "ps07.2c", 0x0000, 0x0100, CRC(2953253b) SHA1(2fb851bc9652ca4e51d473b484ede6dab05f1b51) ) /* MB7052 or compatible BPROM (82S129) */
ROM_END
@@ -4225,29 +4225,29 @@ ROM_START( ballbomb )
ROM_LOAD( "tn04", 0x1800, 0x0800, CRC(d0689a22) SHA1(1f6b258431b7eb878853ff979e4d97a05fb6b797) )
ROM_LOAD( "tn05-1", 0x4000, 0x0800, CRC(5d5e94f1) SHA1(b9f8ba38161ef4f0940c274e9d93fed4bb7db017) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "tn06", 0x0000, 0x0400, CRC(7ec554c4) SHA1(b638605ba2043fdca4c5e18755fa5fa81ed3db07) )
ROM_LOAD( "tn07", 0x0400, 0x0400, CRC(deb0ac82) SHA1(839581c4e58cb7b0c2c14cf4f239220017cc26eb) )
- ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics (missing) */
+ ROM_REGION( 0x0100, "user1", 0 ) /* cloud graphics (missing) */
ROM_LOAD( "mb7052.2c", 0x0000, 0x0100, NO_DUMP )
ROM_END
ROM_START( yosakdon )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "yd1.bin", 0x0000, 0x0400, CRC(607899c9) SHA1(219c0c99894715818606fba49cc75517f6f43e0c) )
- ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) )
- ROM_LOAD( "yd3.bin", 0x0800, 0x0400, CRC(c5af6d52) SHA1(c40af79fe060562c64fc316881b7d0348e11ee3f) )
- ROM_LOAD( "yd4.bin", 0x0c00, 0x0400, CRC(dca8064f) SHA1(77a58137cc7f0b5fbe0e9e8deb9c5be88b1ebbcf) )
- ROM_LOAD( "yd5.bin", 0x1400, 0x0400, CRC(38804ff1) SHA1(9b7527b9d2b106355f0c8df46666b1e3f286b2e3) )
- ROM_LOAD( "yd6.bin", 0x1800, 0x0400, CRC(988d2362) SHA1(deaf864b4e287cbc2585c2a11343b1ae82e15463) )
- ROM_LOAD( "yd7.bin", 0x1c00, 0x0400, CRC(2744e68b) SHA1(5ad5a7a615d36f57b6d560425e035c15e25e9005) )
+ ROM_LOAD( "yd1.bin", 0x0000, 0x0400, CRC(607899c9) SHA1(219c0c99894715818606fba49cc75517f6f43e0c) )
+ ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) )
+ ROM_LOAD( "yd3.bin", 0x0800, 0x0400, CRC(c5af6d52) SHA1(c40af79fe060562c64fc316881b7d0348e11ee3f) )
+ ROM_LOAD( "yd4.bin", 0x0c00, 0x0400, CRC(dca8064f) SHA1(77a58137cc7f0b5fbe0e9e8deb9c5be88b1ebbcf) )
+ ROM_LOAD( "yd5.bin", 0x1400, 0x0400, CRC(38804ff1) SHA1(9b7527b9d2b106355f0c8df46666b1e3f286b2e3) )
+ ROM_LOAD( "yd6.bin", 0x1800, 0x0400, CRC(988d2362) SHA1(deaf864b4e287cbc2585c2a11343b1ae82e15463) )
+ ROM_LOAD( "yd7.bin", 0x1c00, 0x0400, CRC(2744e68b) SHA1(5ad5a7a615d36f57b6d560425e035c15e25e9005) )
ROM_END
ROM_START( yosakdona )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "yosaku1", 0x0000, 0x0400, CRC(d132f4f0) SHA1(373c7ea1bd6debcb3dad5881793b8c31dc7a01e6) )
- ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) )
+ ROM_LOAD( "yd2.bin", 0x0400, 0x0400, CRC(78336df4) SHA1(b0b6254568d191d2d0b9c9280a3ccf2417ef3f38) )
ROM_LOAD( "yosaku3", 0x0800, 0x0400, CRC(b1a0b3eb) SHA1(4eb80668920b45dc6216424f8ca53d753a35f4f1) )
ROM_LOAD( "yosaku4", 0x0c00, 0x0400, CRC(c06c225e) SHA1(2699e3c13b09b6de16bd3ca3ca2e9d7a91b7e268) )
ROM_LOAD( "yosaku5", 0x1400, 0x0400, CRC(ae422a43) SHA1(5219680f9d6c5d984b29167f85106fa375856121) )
@@ -4266,7 +4266,7 @@ ROM_START( indianbt )
ROM_LOAD( "7.42", 0x5000, 0x0800, CRC(7060ba0b) SHA1(366ce02b7b0a3391afef23b8b41cd98a91034830) )
ROM_LOAD( "8.41", 0x5800, 0x0800, CRC(eaccfc0a) SHA1(c6c2d702243bdd1d2ad5fbaaceadb5a5798577bc) )
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 */
ROM_LOAD( "mb7054.1", 0x0000, 0x0400, CRC(4acf4db3) SHA1(842a6c9f91806b424b7cc437670b4fe0bd57dff1) )
ROM_LOAD( "mb7054.2", 0x0400, 0x0400, CRC(62cb3419) SHA1(3df65062945589f1df37359dbd3e30ae4b23f469) )
ROM_END
@@ -4321,16 +4321,16 @@ ROM_END
ROM_START( steelwkr )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "1.36", 0x0000, 0x0400, CRC(5d78873a) SHA1(293cbc067937668148181453877239cb5ed57600) )
- ROM_LOAD( "2.35", 0x0400, 0x0400, CRC(99cd70c6) SHA1(a08bf4db6b39d22dfcf052cc6603aab041db0208) )
- ROM_LOAD( "3.34", 0x0800, 0x0400, CRC(18103b67) SHA1(45929ea56ab15769fc68873570aab3d403e8e913) )
- ROM_LOAD( "4.33", 0x0c00, 0x0400, CRC(c413ae82) SHA1(302b933b45b2aaa515434b5268fd74aec4160e3f) )
- ROM_LOAD( "5.32", 0x1000, 0x0400, CRC(ca7b07b5) SHA1(cbea221c4daf84825f99bbef6d731fc2ef88feeb) )
- ROM_LOAD( "6.31", 0x1400, 0x0400, CRC(f8181fa0) SHA1(a907611529a1500a2ae118e834c2d4b6d11974f1) )
- ROM_LOAD( "7.42", 0x1800, 0x0400, CRC(a35f113e) SHA1(53073037db55c14055810c0bee7b85eb75bbaa72) )
- ROM_LOAD( "8.41", 0x1c00, 0x0400, CRC(af208370) SHA1(ccbd002accda26cc0a02987d9801a47e5f49921a) )
-
- ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (not used, but they were on the board) */
+ ROM_LOAD( "1.36", 0x0000, 0x0400, CRC(5d78873a) SHA1(293cbc067937668148181453877239cb5ed57600) )
+ ROM_LOAD( "2.35", 0x0400, 0x0400, CRC(99cd70c6) SHA1(a08bf4db6b39d22dfcf052cc6603aab041db0208) )
+ ROM_LOAD( "3.34", 0x0800, 0x0400, CRC(18103b67) SHA1(45929ea56ab15769fc68873570aab3d403e8e913) )
+ ROM_LOAD( "4.33", 0x0c00, 0x0400, CRC(c413ae82) SHA1(302b933b45b2aaa515434b5268fd74aec4160e3f) )
+ ROM_LOAD( "5.32", 0x1000, 0x0400, CRC(ca7b07b5) SHA1(cbea221c4daf84825f99bbef6d731fc2ef88feeb) )
+ ROM_LOAD( "6.31", 0x1400, 0x0400, CRC(f8181fa0) SHA1(a907611529a1500a2ae118e834c2d4b6d11974f1) )
+ ROM_LOAD( "7.42", 0x1800, 0x0400, CRC(a35f113e) SHA1(53073037db55c14055810c0bee7b85eb75bbaa72) )
+ ROM_LOAD( "8.41", 0x1c00, 0x0400, CRC(af208370) SHA1(ccbd002accda26cc0a02987d9801a47e5f49921a) )
+
+ ROM_REGION( 0x0800, "proms", 0 ) /* color maps player 1/player 2 (not used, but they were on the board) */
ROM_LOAD( "la05.1", 0x0000, 0x0400, CRC(98f31392) SHA1(ccdd1bd2ddd24bd6b1f8255a87e138f937eaf5b4) )
ROM_LOAD( "la06.2", 0x0400, 0x0400, CRC(98f31392) SHA1(ccdd1bd2ddd24bd6b1f8255a87e138f937eaf5b4) )
ROM_END
@@ -4424,7 +4424,7 @@ GAME( 1980, polaris, 0, polaris, polaris, driver_device, 0, ROT270
GAME( 1980, polarisa, polaris, polaris, polaris, driver_device, 0, ROT270, "Taito", "Polaris (First revision)", GAME_SUPPORTS_SAVE )
GAME( 1980, polariso, polaris, polaris, polaris, driver_device, 0, ROT270, "Taito", "Polaris (Original version)", GAME_SUPPORTS_SAVE )
GAME( 1981, polarisbr, polaris, polaris, polaris, driver_device, 0, ROT270, "Taito do Brasil", "Polaris (Brazil)", GAME_SUPPORTS_SAVE )
-GAME( 1980, ballbomb, 0, ballbomb, ballbomb, driver_device, 0, ROT270, "Taito", "Balloon Bomber", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) /* missing clouds */
+GAME( 1980, ballbomb, 0, ballbomb, ballbomb, driver_device, 0, ROT270, "Taito", "Balloon Bomber", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS ) /* missing clouds */
GAME( 1980, indianbt, 0, indianbt, indianbt, driver_device, 0, ROT270, "Taito", "Indian Battle", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
GAME( 1980, steelwkr, 0, steelwkr, steelwkr, driver_device, 0, ROT0 , "Taito", "Steel Worker", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND )
GAMEL(1980?,galactic, 0, galactic, galactic, driver_device, 0, ROT270, "Taito do Brasil", "Galactica - Batalha Espacial", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND, layout_galactic )
diff --git a/src/mame/drivers/88games.c b/src/mame/drivers/88games.c
index 630d58259fb..9496bd2526b 100644
--- a/src/mame/drivers/88games.c
+++ b/src/mame/drivers/88games.c
@@ -127,7 +127,7 @@ WRITE8_MEMBER(_88games_state::k052109_051960_w)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, _88games_state )
AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE("banked_rom") /* banked ROM + palette RAM */
- AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_byte_be_w) AM_SHARE("paletteram_1000") /* banked ROM + palette RAM */
+ AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_byte_be_w) AM_SHARE("paletteram_1000") /* banked ROM + palette RAM */
AM_RANGE(0x2000, 0x2fff) AM_RAM
AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x3800, 0x3fff) AM_READWRITE(bankedram_r, bankedram_w) AM_SHARE("ram")
@@ -168,14 +168,14 @@ static INPUT_PORTS_START( 88games )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "World Records" ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x20, 0x20, "World Records" ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x20, "Don't Erase" )
PORT_DIPSETTING( 0x00, "Erase on Reset" )
PORT_SERVICE_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW3:3" )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4") // Listed in the manual as "continue"
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4") // Listed in the manual as "continue"
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -200,7 +200,7 @@ static INPUT_PORTS_START( 88games )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START4 )
PORT_START("DSW1")
- PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
+ PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
@@ -217,7 +217,7 @@ static INPUT_PORTS_START( 88games )
PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
+ PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
@@ -238,19 +238,19 @@ static INPUT_PORTS_START( 88games )
PORT_START("DSW2")
PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:1" )
- PORT_DIPNAME( 0x06, 0x02, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:2,3")
+ PORT_DIPNAME( 0x06, 0x02, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:2,3")
PORT_DIPSETTING( 0x06, DEF_STR( Cocktail ) )
PORT_DIPSETTING( 0x04, "Cocktail (A)" )
PORT_DIPSETTING( 0x02, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, "Upright (D)" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" )
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -424,7 +424,7 @@ ROM_START( 88games )
ROM_LOAD( "861d01.d9", 0x00000, 0x08000, CRC(0ff1dec0) SHA1(749dc98f8740beee1383f85effc9336081315f4b) )
ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "861a08.a", 0x000000, 0x10000, CRC(77a00dd6) SHA1(e3667839f8ae3699236da3e312c20d571db38670) ) /* characters */
+ ROM_LOAD16_BYTE( "861a08.a", 0x000000, 0x10000, CRC(77a00dd6) SHA1(e3667839f8ae3699236da3e312c20d571db38670) ) /* characters */
ROM_LOAD16_BYTE( "861a08.c", 0x000001, 0x10000, CRC(b422edfc) SHA1(b3842c8dc60975cc71812df098f29b4571b18120) )
ROM_LOAD16_BYTE( "861a08.b", 0x020000, 0x10000, CRC(28a8304f) SHA1(6b4037eff6d209fec29d05f1071ed3bf9c2bd098) )
ROM_LOAD16_BYTE( "861a08.d", 0x020001, 0x10000, CRC(e01a3802) SHA1(3fb5fe512c2497160a66e9de0cd45c38dfe46410) )
@@ -434,7 +434,7 @@ ROM_START( 88games )
ROM_LOAD16_BYTE( "861a09.d", 0x060001, 0x10000, CRC(2bb3282c) SHA1(6ca54948a02c91543b7e595641b0edc2564f83ff) )
ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "861a05.a", 0x000000, 0x10000, CRC(cedc19d0) SHA1(6eb2a292d574dee06e214e61c0e08fa233ac68e8) ) /* sprites */
+ ROM_LOAD16_BYTE( "861a05.a", 0x000000, 0x10000, CRC(cedc19d0) SHA1(6eb2a292d574dee06e214e61c0e08fa233ac68e8) ) /* sprites */
ROM_LOAD16_BYTE( "861a05.e", 0x000001, 0x10000, CRC(725af3fc) SHA1(98ac364db4b2c5682a299f4d2a288ebc8a303b1f) )
ROM_LOAD16_BYTE( "861a05.b", 0x020000, 0x10000, CRC(db2a8808) SHA1(dad6b127761889aac198014139cc524a4cea32e7) )
ROM_LOAD16_BYTE( "861a05.f", 0x020001, 0x10000, CRC(32d830ca) SHA1(a3f10720151f538cf1bec5953a4212bc96ba42fe) )
@@ -452,13 +452,13 @@ ROM_START( 88games )
ROM_LOAD16_BYTE( "861a06.h", 0x0e0001, 0x10000, CRC(d906b79b) SHA1(905814ce708d80fd4d1a398f60faa0bc680fccaf) )
ROM_REGION( 0x040000, "gfx3", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD( "861a04.a", 0x000000, 0x10000, CRC(092a8b15) SHA1(d98a81bfa4bba73805f0236f8a80da130fcb378d) ) /* zoom/rotate */
+ ROM_LOAD( "861a04.a", 0x000000, 0x10000, CRC(092a8b15) SHA1(d98a81bfa4bba73805f0236f8a80da130fcb378d) ) /* zoom/rotate */
ROM_LOAD( "861a04.b", 0x010000, 0x10000, CRC(75744b56) SHA1(5133d8f6622796ed6b9e6a0d0f1df28f00331fc7) )
ROM_LOAD( "861a04.c", 0x020000, 0x10000, CRC(a00021c5) SHA1(f73f88af33387d73b4262e8652507e699926fabe) )
ROM_LOAD( "861a04.d", 0x030000, 0x10000, CRC(d208304c) SHA1(77dd31163c8431416ab0593f084719c914222912) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "861.g3", 0x0000, 0x0100, CRC(429785db) SHA1(d27e8e180f19d2b160f18c79520a77182a62218c) ) /* priority encoder (not used) */
+ ROM_LOAD( "861.g3", 0x0000, 0x0100, CRC(429785db) SHA1(d27e8e180f19d2b160f18c79520a77182a62218c) ) /* priority encoder (not used) */
ROM_REGION( 0x20000, "upd1", 0 ) /* samples for UPD7759 #0 */
ROM_LOAD( "861a07.a", 0x000000, 0x10000, CRC(5d035d69) SHA1(9df63e004a4f52768331dfb3c3889301ac174ea1) )
@@ -478,7 +478,7 @@ ROM_START( konami88 )
ROM_LOAD( "861d01.d9", 0x00000, 0x08000, CRC(0ff1dec0) SHA1(749dc98f8740beee1383f85effc9336081315f4b) )
ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "861a08.a", 0x000000, 0x10000, CRC(77a00dd6) SHA1(e3667839f8ae3699236da3e312c20d571db38670) ) /* characters */
+ ROM_LOAD16_BYTE( "861a08.a", 0x000000, 0x10000, CRC(77a00dd6) SHA1(e3667839f8ae3699236da3e312c20d571db38670) ) /* characters */
ROM_LOAD16_BYTE( "861a08.c", 0x000001, 0x10000, CRC(b422edfc) SHA1(b3842c8dc60975cc71812df098f29b4571b18120) )
ROM_LOAD16_BYTE( "861a08.b", 0x020000, 0x10000, CRC(28a8304f) SHA1(6b4037eff6d209fec29d05f1071ed3bf9c2bd098) )
ROM_LOAD16_BYTE( "861a08.d", 0x020001, 0x10000, CRC(e01a3802) SHA1(3fb5fe512c2497160a66e9de0cd45c38dfe46410) )
@@ -488,7 +488,7 @@ ROM_START( konami88 )
ROM_LOAD16_BYTE( "861a09.d", 0x060001, 0x10000, CRC(2bb3282c) SHA1(6ca54948a02c91543b7e595641b0edc2564f83ff) )
ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "861a05.a", 0x000000, 0x10000, CRC(cedc19d0) SHA1(6eb2a292d574dee06e214e61c0e08fa233ac68e8) ) /* sprites */
+ ROM_LOAD16_BYTE( "861a05.a", 0x000000, 0x10000, CRC(cedc19d0) SHA1(6eb2a292d574dee06e214e61c0e08fa233ac68e8) ) /* sprites */
ROM_LOAD16_BYTE( "861a05.e", 0x000001, 0x10000, CRC(725af3fc) SHA1(98ac364db4b2c5682a299f4d2a288ebc8a303b1f) )
ROM_LOAD16_BYTE( "861a05.b", 0x020000, 0x10000, CRC(db2a8808) SHA1(dad6b127761889aac198014139cc524a4cea32e7) )
ROM_LOAD16_BYTE( "861a05.f", 0x020001, 0x10000, CRC(32d830ca) SHA1(a3f10720151f538cf1bec5953a4212bc96ba42fe) )
@@ -506,13 +506,13 @@ ROM_START( konami88 )
ROM_LOAD16_BYTE( "861a06.h", 0x0e0001, 0x10000, CRC(d906b79b) SHA1(905814ce708d80fd4d1a398f60faa0bc680fccaf) )
ROM_REGION( 0x040000, "gfx3", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD( "861a04.a", 0x000000, 0x10000, CRC(092a8b15) SHA1(d98a81bfa4bba73805f0236f8a80da130fcb378d) ) /* zoom/rotate */
+ ROM_LOAD( "861a04.a", 0x000000, 0x10000, CRC(092a8b15) SHA1(d98a81bfa4bba73805f0236f8a80da130fcb378d) ) /* zoom/rotate */
ROM_LOAD( "861a04.b", 0x010000, 0x10000, CRC(75744b56) SHA1(5133d8f6622796ed6b9e6a0d0f1df28f00331fc7) )
ROM_LOAD( "861a04.c", 0x020000, 0x10000, CRC(a00021c5) SHA1(f73f88af33387d73b4262e8652507e699926fabe) )
ROM_LOAD( "861a04.d", 0x030000, 0x10000, CRC(d208304c) SHA1(77dd31163c8431416ab0593f084719c914222912) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "861.g3", 0x0000, 0x0100, CRC(429785db) SHA1(d27e8e180f19d2b160f18c79520a77182a62218c) ) /* priority encoder (not used) */
+ ROM_LOAD( "861.g3", 0x0000, 0x0100, CRC(429785db) SHA1(d27e8e180f19d2b160f18c79520a77182a62218c) ) /* priority encoder (not used) */
ROM_REGION( 0x20000, "upd1", 0 ) /* samples for UPD7759 #0 */
ROM_LOAD( "861a07.a", 0x000000, 0x10000, CRC(5d035d69) SHA1(9df63e004a4f52768331dfb3c3889301ac174ea1) )
@@ -532,7 +532,7 @@ ROM_START( hypsptsp )
ROM_LOAD( "861d01.d9", 0x00000, 0x08000, CRC(0ff1dec0) SHA1(749dc98f8740beee1383f85effc9336081315f4b) )
ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "861a08.a", 0x000000, 0x10000, CRC(77a00dd6) SHA1(e3667839f8ae3699236da3e312c20d571db38670) ) /* characters */
+ ROM_LOAD16_BYTE( "861a08.a", 0x000000, 0x10000, CRC(77a00dd6) SHA1(e3667839f8ae3699236da3e312c20d571db38670) ) /* characters */
ROM_LOAD16_BYTE( "861a08.c", 0x000001, 0x10000, CRC(b422edfc) SHA1(b3842c8dc60975cc71812df098f29b4571b18120) )
ROM_LOAD16_BYTE( "861a08.b", 0x020000, 0x10000, CRC(28a8304f) SHA1(6b4037eff6d209fec29d05f1071ed3bf9c2bd098) )
ROM_LOAD16_BYTE( "861a08.d", 0x020001, 0x10000, CRC(e01a3802) SHA1(3fb5fe512c2497160a66e9de0cd45c38dfe46410) )
@@ -542,7 +542,7 @@ ROM_START( hypsptsp )
ROM_LOAD16_BYTE( "861a09.d", 0x060001, 0x10000, CRC(2bb3282c) SHA1(6ca54948a02c91543b7e595641b0edc2564f83ff) )
ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "861a05.a", 0x000000, 0x10000, CRC(cedc19d0) SHA1(6eb2a292d574dee06e214e61c0e08fa233ac68e8) ) /* sprites */
+ ROM_LOAD16_BYTE( "861a05.a", 0x000000, 0x10000, CRC(cedc19d0) SHA1(6eb2a292d574dee06e214e61c0e08fa233ac68e8) ) /* sprites */
ROM_LOAD16_BYTE( "861a05.e", 0x000001, 0x10000, CRC(725af3fc) SHA1(98ac364db4b2c5682a299f4d2a288ebc8a303b1f) )
ROM_LOAD16_BYTE( "861a05.b", 0x020000, 0x10000, CRC(db2a8808) SHA1(dad6b127761889aac198014139cc524a4cea32e7) )
ROM_LOAD16_BYTE( "861a05.f", 0x020001, 0x10000, CRC(32d830ca) SHA1(a3f10720151f538cf1bec5953a4212bc96ba42fe) )
@@ -560,13 +560,13 @@ ROM_START( hypsptsp )
ROM_LOAD16_BYTE( "861a06.h", 0x0e0001, 0x10000, CRC(d906b79b) SHA1(905814ce708d80fd4d1a398f60faa0bc680fccaf) )
ROM_REGION( 0x040000, "gfx3", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD( "861a04.a", 0x000000, 0x10000, CRC(092a8b15) SHA1(d98a81bfa4bba73805f0236f8a80da130fcb378d) ) /* zoom/rotate */
+ ROM_LOAD( "861a04.a", 0x000000, 0x10000, CRC(092a8b15) SHA1(d98a81bfa4bba73805f0236f8a80da130fcb378d) ) /* zoom/rotate */
ROM_LOAD( "861a04.b", 0x010000, 0x10000, CRC(75744b56) SHA1(5133d8f6622796ed6b9e6a0d0f1df28f00331fc7) )
ROM_LOAD( "861a04.c", 0x020000, 0x10000, CRC(a00021c5) SHA1(f73f88af33387d73b4262e8652507e699926fabe) )
ROM_LOAD( "861a04.d", 0x030000, 0x10000, CRC(d208304c) SHA1(77dd31163c8431416ab0593f084719c914222912) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "861.g3", 0x0000, 0x0100, CRC(429785db) SHA1(d27e8e180f19d2b160f18c79520a77182a62218c) ) /* priority encoder (not used) */
+ ROM_LOAD( "861.g3", 0x0000, 0x0100, CRC(429785db) SHA1(d27e8e180f19d2b160f18c79520a77182a62218c) ) /* priority encoder (not used) */
ROM_REGION( 0x20000, "upd1", 0 ) /* samples for UPD7759 #0 */
ROM_LOAD( "861a07.a", 0x000000, 0x10000, CRC(5d035d69) SHA1(9df63e004a4f52768331dfb3c3889301ac174ea1) )
diff --git a/src/mame/drivers/ace.c b/src/mame/drivers/ace.c
index dbd509ecdec..bd56b36ae2e 100644
--- a/src/mame/drivers/ace.c
+++ b/src/mame/drivers/ace.c
@@ -169,9 +169,9 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, aceal_state )
AM_RANGE(0x0000, 0x09ff) AM_ROM
- AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(ace_scoreram_w) AM_SHARE("scoreram") /* 2x2101 */
- AM_RANGE(0x8300, 0x83ff) AM_RAM AM_SHARE("ram2") /* 2x2101 */
- AM_RANGE(0x8000, 0x80ff) AM_RAM_WRITE(ace_characterram_w) AM_SHARE("characterram") /* 3x3101 (3bits: 0, 1, 2) */
+ AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(ace_scoreram_w) AM_SHARE("scoreram") /* 2x2101 */
+ AM_RANGE(0x8300, 0x83ff) AM_RAM AM_SHARE("ram2") /* 2x2101 */
+ AM_RANGE(0x8000, 0x80ff) AM_RAM_WRITE(ace_characterram_w) AM_SHARE("characterram") /* 3x3101 (3bits: 0, 1, 2) */
AM_RANGE(0xc000, 0xc005) AM_WRITE(ace_objpos_w)
@@ -214,102 +214,102 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( ace )
- PORT_START("c008") /* player thrust */
+ PORT_START("c008") /* player thrust */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_2WAY PORT_PLAYER(1) PORT_NAME("P1 Thrust")
- PORT_START("c009") /* player slowdown */
+ PORT_START("c009") /* player slowdown */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_2WAY PORT_PLAYER(1) PORT_NAME("P1 Slowdown")
- PORT_START("c00a") /* player left */
+ PORT_START("c00a") /* player left */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(1)
- PORT_START("c00b") /* player right */
+ PORT_START("c00b") /* player right */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(1)
- PORT_START("c00c") /* player fire */
+ PORT_START("c00c") /* player fire */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Fire")
- PORT_START("c00d") /* enemy thrust */
+ PORT_START("c00d") /* enemy thrust */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_2WAY PORT_PLAYER(2) PORT_NAME("P2 Thrust")
- PORT_START("c00e") /* enemy slowdown */
+ PORT_START("c00e") /* enemy slowdown */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_2WAY PORT_PLAYER(2) PORT_NAME("P2 Slowdown")
- PORT_START("c00f") /* enemy left */
+ PORT_START("c00f") /* enemy left */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
- PORT_START("c010") /* enemy right */
+ PORT_START("c010") /* enemy right */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
- PORT_START("c011") /* enemy fire */
+ PORT_START("c011") /* enemy fire */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Fire")
//c012
- PORT_START("c014") /* VBLANK??? */
+ PORT_START("c014") /* VBLANK??? */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_START("c015") /* coin input */
+ PORT_START("c015") /* coin input */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
- PORT_START("c016") /* game start */
+ PORT_START("c016") /* game start */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 16,16, /* 16*16 chars */
- 8, /* 8 characters */
- 1, /* 1 bit per pixel */
- { 4 }, /* character rom is 512x4 bits (3622 type)*/
+ 16,16, /* 16*16 chars */
+ 8, /* 8 characters */
+ 1, /* 1 bit per pixel */
+ { 4 }, /* character rom is 512x4 bits (3622 type)*/
{ 0, 1, 2, 3, 8+0, 8+1, 8+2, 8+3, 16+0, 16+1, 16+2, 16+3, 24+0, 24+1, 24+2, 24+3 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, 8*32, 9*32, 10*32, 11*32, 12*32, 13*32, 14*32, 15*32 },
- 64*8 /* every char takes 64 consecutive bytes */
+ 64*8 /* every char takes 64 consecutive bytes */
};
static const gfx_layout charlayout0 =
{
- 16,16, /* 16*16 chars */
- 1, /* 1 characters */
- 1, /* 1 bit per pixel */
- { 7 }, /* bit 0 in character ram */
+ 16,16, /* 16*16 chars */
+ 1, /* 1 characters */
+ 1, /* 1 bit per pixel */
+ { 7 }, /* bit 0 in character ram */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128, 8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 },
- 256*8 /* every char takes 256 consecutive bytes */
+ 256*8 /* every char takes 256 consecutive bytes */
};
static const gfx_layout charlayout1 =
{
- 16,16, /* 16*16 chars */
- 1, /* 1 characters */
- 1, /* 1 bit per pixel */
- { 6 }, /* bit 1 in character ram */
+ 16,16, /* 16*16 chars */
+ 1, /* 1 characters */
+ 1, /* 1 bit per pixel */
+ { 6 }, /* bit 1 in character ram */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128, 8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 },
- 256*8 /* every char takes 256 consecutive bytes */
+ 256*8 /* every char takes 256 consecutive bytes */
};
static const gfx_layout charlayout2 =
{
- 16,16, /* 16*16 chars */
- 1, /* 1 characters */
- 1, /* 1 bit per pixel */
- { 5 }, /* bit 2 in character ram */
+ 16,16, /* 16*16 chars */
+ 1, /* 1 characters */
+ 1, /* 1 bit per pixel */
+ { 5 }, /* bit 2 in character ram */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
{ 0*128, 1*128, 2*128, 3*128, 4*128, 5*128, 6*128, 7*128, 8*128, 9*128, 10*128, 11*128, 12*128, 13*128, 14*128, 15*128 },
- 256*8 /* every char takes 256 consecutive bytes */
+ 256*8 /* every char takes 256 consecutive bytes */
};
static const gfx_layout scorelayout =
{
- 16,16, /* 16*16 chars */
- 8, /* 8 characters */
- 1, /* 1 bit per pixel */
- { 0 }, /* */
+ 16,16, /* 16*16 chars */
+ 8, /* 8 characters */
+ 1, /* 1 bit per pixel */
+ { 0 }, /* */
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16, 8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16, 15*16 },
- 32*8 /* every char takes 32 consecutive bytes */
+ 32*8 /* every char takes 32 consecutive bytes */
};
static GFXDECODE_START( ace )
@@ -345,7 +345,7 @@ void aceal_state::machine_reset()
static MACHINE_CONFIG_START( ace, aceal_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", I8080, MASTER_CLOCK/9) /* 2 MHz ? */
+ MCFG_CPU_ADD("maincpu", I8080, MASTER_CLOCK/9) /* 2 MHz ? */
MCFG_CPU_PROGRAM_MAP(main_map)
/* video hardware */
@@ -372,15 +372,15 @@ MACHINE_CONFIG_END
ROM_START( ace )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "ace.a1", 0x0000, 0x0200, CRC(16811834) SHA1(5502812dd161908eea3fa8851d7e5c1e22b0f8ff) )
- ROM_LOAD( "ace.a2", 0x0200, 0x0200, CRC(f9eae80e) SHA1(8865b86c7b5d57c76312c16f8a614bf35ffaf532) )
- ROM_LOAD( "ace.a3", 0x0400, 0x0200, CRC(c5c63b8c) SHA1(2079dd12ff0c4aafec19aeb9baa70fc9b6788356) )
- ROM_LOAD( "ace.a4", 0x0600, 0x0200, CRC(ea4503aa) SHA1(fea610124b9f7ea18d29b4e4599253ba1ee067e1) )
- ROM_LOAD( "ace.a5", 0x0800, 0x0200, CRC(623c58e7) SHA1(a92418bc323a1ae76eae8e094e4d6ebd1e8da14e) )
+ ROM_LOAD( "ace.a1", 0x0000, 0x0200, CRC(16811834) SHA1(5502812dd161908eea3fa8851d7e5c1e22b0f8ff) )
+ ROM_LOAD( "ace.a2", 0x0200, 0x0200, CRC(f9eae80e) SHA1(8865b86c7b5d57c76312c16f8a614bf35ffaf532) )
+ ROM_LOAD( "ace.a3", 0x0400, 0x0200, CRC(c5c63b8c) SHA1(2079dd12ff0c4aafec19aeb9baa70fc9b6788356) )
+ ROM_LOAD( "ace.a4", 0x0600, 0x0200, CRC(ea4503aa) SHA1(fea610124b9f7ea18d29b4e4599253ba1ee067e1) )
+ ROM_LOAD( "ace.a5", 0x0800, 0x0200, CRC(623c58e7) SHA1(a92418bc323a1ae76eae8e094e4d6ebd1e8da14e) )
/* not used - I couldn't guess when this should be displayed */
ROM_REGION( 0x0200, "gfx1", 0 )
- ROM_LOAD( "ace.k4", 0x0000, 0x0200, CRC(daa05ec6) SHA1(8b71ffb802293dc93f6b492ff128a704e676a5fd) )
+ ROM_LOAD( "ace.k4", 0x0000, 0x0200, CRC(daa05ec6) SHA1(8b71ffb802293dc93f6b492ff128a704e676a5fd) )
ROM_END
diff --git a/src/mame/drivers/acefruit.c b/src/mame/drivers/acefruit.c
index afe5802162e..37c53c9bdb7 100644
--- a/src/mame/drivers/acefruit.c
+++ b/src/mame/drivers/acefruit.c
@@ -314,14 +314,14 @@ static ADDRESS_MAP_START( acefruit_io, AS_IO, 8, acefruit_state )
ADDRESS_MAP_END
static INPUT_PORTS_START( sidewndr )
- PORT_START("IN0") // 0
+ PORT_START("IN0") // 0
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME( "Stop Nudge/Nudge Up or Down" )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME( "Gamble" )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) /* "Cash in" */
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") /* active low or high?? */
PORT_BIT( 0xd8, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN1") // 1
+ PORT_START("IN1") // 1
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME( "Sidewind" )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME( "Collect" )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) /* "Cash in" */
@@ -330,21 +330,21 @@ static INPUT_PORTS_START( sidewndr )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN2") // 2
+ PORT_START("IN2") // 2
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME( "Cancel/Clear" )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME( "Refill" ) PORT_TOGGLE
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) /* "Token in" - also "Refill" when "Refill" mode ON */
PORT_BIT( 0x08, 0x00, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, acefruit_state,sidewndr_payout_r, (void *)0x01)
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN3") // 3
+ PORT_START("IN3") // 3
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME( "Hold/Nudge 1" )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME( "Accountancy System" ) PORT_TOGGLE
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN4 ) /* "50P in" */
PORT_BIT( 0x08, 0x00, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, acefruit_state,sidewndr_payout_r, (void *)0x02)
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN4") // 4
+ PORT_START("IN4") // 4
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME( "Hold/Nudge 2" )
PORT_DIPNAME( 0x02, 0x00, "Allow Clear Data" ) /* in "Accountancy System" mode */
PORT_DIPSETTING( 0x02, DEF_STR( No ) )
@@ -357,31 +357,31 @@ static INPUT_PORTS_START( sidewndr )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN5") // 5
+ PORT_START("IN5") // 5
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME( "Hold/Nudge 3" )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME( "Test Program" ) PORT_TOGGLE
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN6") // 6
+ PORT_START("IN6") // 6
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME( "Hold/Nudge 4" )
/* I don't know exactly what this bit is supposed to do :(
- I only found that when bit is LOW, no data is updated
- (check "Accountancy System" mode). And when you switch
- it from LOW to HIGH, previous saved values are back
- (check for example the number of credits). */
+ I only found that when bit is LOW, no data is updated
+ (check "Accountancy System" mode). And when you switch
+ it from LOW to HIGH, previous saved values are back
+ (check for example the number of credits). */
PORT_DIPNAME( 0x02, 0x02, "Save Data" ) /* code at 0x1773 */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN7") // 7
+ PORT_START("IN7") // 7
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) /* next in "Accountancy System" mode */
PORT_DIPNAME( 0x02, 0x00, "Clear Credits on Reset" ) /* also affects rolls */
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("PAYOUT") // fake port to handle settings via multiple input ports
+ PORT_START("PAYOUT") // fake port to handle settings via multiple input ports
PORT_DIPNAME( 0x03, 0x00, "Payout %" )
PORT_DIPSETTING( 0x00, "74%" )
PORT_DIPSETTING( 0x02, "78%" )
@@ -408,19 +408,19 @@ static INPUT_PORTS_START( spellbnd )
PORT_MODIFY("IN4")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME( "Clear Data" ) /* in "Accountancy System" mode */
- /* Similar to 'sidewndr' but different addresses */
+ /* Similar to 'sidewndr' but different addresses */
PORT_DIPNAME( 0x04, 0x04, "Lamp 11 always ON" ) /* code at 0x072a - write lamp status at 0x00ff */
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
- /* Similar to 'sidewndr' but different addresses */
+ /* Similar to 'sidewndr' but different addresses */
PORT_DIPNAME( 0x08, 0x00, "Sounds" ) /* data in 0x2088 and 0x2089 - out sound at 0x012d */
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_MODIFY("IN6")
/* I don't know exactly what this bit is supposed to do :(
- I only found that when bit is LOW, no data is updated
- (check "Accountancy System" mode). */
+ I only found that when bit is LOW, no data is updated
+ (check "Accountancy System" mode). */
PORT_DIPNAME( 0x02, 0x02, "Save Data" ) /* code at 0x0763 (similar to 'sidewndr') and 0x18db */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
@@ -434,14 +434,14 @@ INPUT_PORTS_END
/* I've only mapped the known inputs after comparison with 'spellbnd' and the ones known to do something */
static INPUT_PORTS_START( starspnr )
- PORT_START("IN0") // 0
+ PORT_START("IN0") // 0
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME( "Gamble" )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
/* tested at 0xef77 after IN5 bit 1 and before IN2 bit 2 - after coins are tested - table at 0xefa5 (3 bytes) */
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") /* active low or high?? */
- PORT_START("IN1") // 1
+ PORT_START("IN1") // 1
/* tested at 0xe77c - call from 0x012c */
/* tested at 0xeffb after IN6 bit 2 - invalid code after 0xf000 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -450,7 +450,7 @@ static INPUT_PORTS_START( starspnr )
/* tested at 0xeed7 with IN1 bit 3 - before coins are tested - table at 0xef55 (4 * 3 bytes) */
PORT_BIT( 0x08, 0x00, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, acefruit_state,starspnr_coinage_r, (void *)0x08) /* to be confirmed */
- PORT_START("IN2") // 2
+ PORT_START("IN2") // 2
/* tested at 0xe83c */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
/* tested at 0xe5ab - after "Collect" and "Gamble" buttons */
@@ -462,7 +462,7 @@ static INPUT_PORTS_START( starspnr )
/* tested at 0x1b0f */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN3") // 3
+ PORT_START("IN3") // 3
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME( "Hold 1" )
/* tested at 0xe8ea and 0xecbe */
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -471,7 +471,7 @@ static INPUT_PORTS_START( starspnr )
/* tested at 0x0178 */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN4") // 4
+ PORT_START("IN4") // 4
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME( "Hold 2" )
/* tested at 0x064e */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -480,7 +480,7 @@ static INPUT_PORTS_START( starspnr )
/* tested at 0xeed7 with IN1 bit 3 - before coins are tested - table at 0xef55 (4 * 3 bytes) */
PORT_BIT( 0x08, 0x00, IPT_SPECIAL) PORT_CUSTOM_MEMBER(DEVICE_SELF, acefruit_state,starspnr_coinage_r, (void *)0x04) /* to be confirmed */
- PORT_START("IN5") // 5
+ PORT_START("IN5") // 5
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME( "Hold 3" )
/* tested at 0xef68 before IN1 bit 3 and before IN2 bit 2 - after coins are tested - table at 0xefa2 (3 bytes) */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -491,7 +491,7 @@ static INPUT_PORTS_START( starspnr )
/* tested at 0xe312 and 0xe377 */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN6") // 6
+ PORT_START("IN6") // 6
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME( "Hold 4" )
/* tested at 0xee42, 0xee5e and 0xeff5 before IN1 bit 0 - invalid code after 0xf000 */
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -500,7 +500,7 @@ static INPUT_PORTS_START( starspnr )
/* tested at 0xe8dd and 0xec1c */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN7") // 7
+ PORT_START("IN7") // 7
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
PORT_DIPNAME( 0x02, 0x00, "Clear Credits on Reset" )
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
@@ -512,7 +512,7 @@ static INPUT_PORTS_START( starspnr )
/* tested at 0xec2a */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("COINAGE") // fake port to handle settings via multiple input ports
+ PORT_START("COINAGE") // fake port to handle settings via multiple input ports
PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_4C ) )
@@ -524,7 +524,7 @@ static INPUT_PORTS_START( starspnr )
PORT_DIPSETTING( 0x08, "1 Coin/10 Credits" )
PORT_DIPSETTING( 0x0c, "1 Coin/25 Credits" )
- PORT_START("PAYOUT") // fake port to handle settings via multiple input ports
+ PORT_START("PAYOUT") // fake port to handle settings via multiple input ports
PORT_DIPNAME( 0x07, 0x07, "Payout %" )
PORT_DIPSETTING( 0x00, "30%" )
PORT_DIPSETTING( 0x01, "40%" )
@@ -623,7 +623,7 @@ ROM_START( sidewndr )
ROM_LOAD( "2_h11.bin", 0x001000, 0x000800, CRC(e2932643) SHA1(e1c0cd5d0cd332519432cbefa8718362a6cd1ccc) )
ROM_LOAD( "2_h12.bin", 0x001800, 0x000800, CRC(26af0b1f) SHA1(36f0e54982688b9d5a24a6986a847ac69ee0a355) )
- ROM_REGION( 0x2000, "gfx1", 0 ) /* 8k for graphics */
+ ROM_REGION( 0x2000, "gfx1", 0 ) /* 8k for graphics */
ROM_LOAD( "2_h05.bin", 0x000000, 0x000800, CRC(64b64cff) SHA1(c11f2bd2af68ae7f104b711deb7f6509fdbaeb8f) )
ROM_LOAD( "2_h06.bin", 0x000800, 0x000800, CRC(6b96a586) SHA1(6d5ab8fefe37ca4dbc5057ebf31f12b33dbdf5c0) )
ROM_LOAD( "2_h07.bin", 0x001000, 0x000800, CRC(3a8e68a2) SHA1(2ffe07360f57f0f11ecf326f00905747d9b66811) )
@@ -637,7 +637,7 @@ ROM_START( spellbnd )
ROM_LOAD( "h11.bin", 0x001000, 0x000800, CRC(7375166c) SHA1(f05b01941423fd36e0a5d3aa913a594e4e7aa5d4) )
ROM_LOAD( "h12.bin", 0x001800, 0x000800, CRC(4546c68c) SHA1(92104e2005fc772ea9f70451d9d674f95d3f0ba9) )
- ROM_REGION( 0x2000, "gfx1", 0 ) /* 8k for graphics */
+ ROM_REGION( 0x2000, "gfx1", 0 ) /* 8k for graphics */
ROM_LOAD( "h5.bin", 0x000000, 0x000800, CRC(198da32c) SHA1(bf6c4ddcda0503095d310e08057dd88154952ef4) )
ROM_LOAD( "h6.bin", 0x000800, 0x000800, CRC(e777130f) SHA1(3421c6f399e5ec749f1908f6b4ebff7761c6c5d9) )
ROM_LOAD( "h7.bin", 0x001000, 0x000800, CRC(bfed5b8f) SHA1(f95074e8809297eec67da9d7e33ae1dd1c5eabc0) )
@@ -741,8 +741,7 @@ ROM_END
GAMEL( 1981?, sidewndr, 0, acefruit, sidewndr, acefruit_state, sidewndr, ROT270, "ACE", "Sidewinder", GAME_IMPERFECT_GRAPHICS | GAME_NO_SOUND, layout_sidewndr )
-GAMEL( 1981?, spellbnd, 0, acefruit, spellbnd, driver_device, 0, ROT270, "ACE", "Spellbound", GAME_IMPERFECT_GRAPHICS | GAME_NO_SOUND, layout_sidewndr )
+GAMEL( 1981?, spellbnd, 0, acefruit, spellbnd, driver_device, 0, ROT270, "ACE", "Spellbound", GAME_IMPERFECT_GRAPHICS | GAME_NO_SOUND, layout_sidewndr )
GAME ( 1982?, starspnr, 0, acefruit, starspnr, driver_device, 0, ROT270, "ACE", "Starspinner (Dutch/Nederlands)", GAME_NOT_WORKING | GAME_NO_SOUND )
GAME ( 1982?, acefruit, 0, acefruit, spellbnd, driver_device, 0, ROT270, "ACE", "Silhouette", GAME_NOT_WORKING | GAME_NO_SOUND ) // inputs and video in bonus game need fixing on this one
// not dumped: Magnum?
-
diff --git a/src/mame/drivers/aces1.c b/src/mame/drivers/aces1.c
index f8681f04ade..fe4de8caf40 100644
--- a/src/mame/drivers/aces1.c
+++ b/src/mame/drivers/aces1.c
@@ -36,7 +36,7 @@ class aces1_state : public driver_device
public:
aces1_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
int m_input_strobe;
int m_lamp_strobe;
@@ -257,34 +257,34 @@ INPUT_PORTS_END
// 0xafb0 IC24 - lamps, 7segs
static I8255A_INTERFACE( ppi8255_ic24_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic24_intf_write_a), /* Port A write */ // 7segs
- DEVCB_NULL, /* Port B read */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic24_intf_write_b), /* Port B write */ // lamps
- DEVCB_NULL, /* Port C read */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic24_intf_write_c) /* Port C write */ // strobe
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic24_intf_write_a), /* Port A write */ // 7segs
+ DEVCB_NULL, /* Port B read */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic24_intf_write_b), /* Port B write */ // lamps
+ DEVCB_NULL, /* Port C read */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic24_intf_write_c) /* Port C write */ // strobe
};
// 0xafd0 IC25 - lamps, meters, reel comms (writes)
static I8255A_INTERFACE( ppi8255_ic25_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic25_intf_write_a), /* Port A write */ // extra lamps
- DEVCB_NULL, /* Port B read */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic25_intf_write_b), /* Port B write */ // meters, extra lamp select
- DEVCB_NULL, /* Port C read */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic25_intf_write_c) /* Port C write */ // reel write, extra lamp strobe
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic25_intf_write_a), /* Port A write */ // extra lamps
+ DEVCB_NULL, /* Port B read */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic25_intf_write_b), /* Port B write */ // meters, extra lamp select
+ DEVCB_NULL, /* Port C read */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic25_intf_write_c) /* Port C write */ // reel write, extra lamp strobe
};
// 0xafe0 IC37 - doors, coins, reel optics (reads)
static I8255A_INTERFACE( ppi8255_ic37_intf )
{
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic37_intf_read_a), /* Port A read */ // doors + coins
- DEVCB_NULL, /* Port A write */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic37_intf_read_b), /* Port B read */ // switches
- DEVCB_NULL, /* Port B write */
- DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic37_intf_read_c), /* Port C read */ // reel optics
- DEVCB_NULL /* Port C write */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic37_intf_read_a), /* Port A read */ // doors + coins
+ DEVCB_NULL, /* Port A write */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic37_intf_read_b), /* Port B read */ // switches
+ DEVCB_NULL, /* Port B write */
+ DEVCB_DRIVER_MEMBER(aces1_state,ppi8255_ic37_intf_read_c), /* Port C read */ // reel optics
+ DEVCB_NULL /* Port C write */
};
// 0xadf0 - Dips, Sound
@@ -687,50 +687,50 @@ DRIVER_INIT_MEMBER(aces1_state,aces1)
{
}
-GAME( 199?, ac1clbmn ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Money (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1gogld ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Go For Gold (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1hotpf ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Hot Profit (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1pster ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Pound Sterling (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1pstrt ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Pcp", "Pound Stretcher (Pcp) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1primt ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Primetime (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1taklv ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Take It Or Leave It (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1clbmn ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Money (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1gogld ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Go For Gold (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1hotpf ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Hot Profit (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1pster ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Pound Sterling (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1pstrt ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Pcp", "Pound Stretcher (Pcp) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1primt ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Primetime (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1taklv ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Take It Or Leave It (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
//GAME( 199?, ac1cshtw ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Cash Towers (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL ) // same ROM as above, original machine apparently plays the same, reskinned machine?
-GAME( 199?, ac1bbclb ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Big Break Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1bbclba ,ac1bbclb ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Big Break Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1clbsv ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Sovereign (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1clbxt ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Xtra (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1clbxta ,ac1clbxt ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Xtra (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1piaca ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Casino (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL ) // Same ROMs were in 'Play It Again Deluxe'
-GAME( 199?, ac1piacl ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1piacla ,ac1piacl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1piaclb ,ac1piacl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1piaclc ,ac1piacl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1prmcl ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1prmcla ,ac1prmcl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1prmclb ,ac1prmcl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1prmclc ,ac1prmcl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1rundx ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Runner Deluxe Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1rundxa ,ac1rundx ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Runner Deluxe Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1totb ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Top Of The Bill (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1shid ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Super Hi De Hi (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, ac1shida ,ac1shid ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Super Hi De Hi (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1dbldx ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Double Deluxe (Pcp) (ACESYS1)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1nudbk ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1nudbka ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1nudbkb ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1nudbkc ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1nudbkd ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1sstrk ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Starstruck (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1sstrka ,ac1sstrk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Starstruck (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1sstrkb ,ac1sstrk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Starstruck (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1xpres ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Xpress (Pcp) (ACESYS1)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1roll ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Roll Up (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1rolla ,ac1roll ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Roll Up (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1rollb ,ac1roll ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Roll Up (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1bluec ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1blueca ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1bluecb ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1bluecc ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1bluecd ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, ac1hideh ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Ace", "Hi De Hi Deluxe (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL ) // was in Hi De Hi (Ace) (sp.ACE) set
-GAME(199?, ac1hideha ,sp_hideh ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Ace", "Hi De Hi Deluxe (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 199?, ac1bbclb ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Big Break Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1bbclba ,ac1bbclb ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Big Break Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1clbsv ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Sovereign (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1clbxt ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Xtra (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1clbxta ,ac1clbxt ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Club Xtra (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1piaca ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Casino (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL ) // Same ROMs were in 'Play It Again Deluxe'
+GAME( 199?, ac1piacl ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1piacla ,ac1piacl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1piaclb ,ac1piacl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1piaclc ,ac1piacl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Play It Again Club (Ace) (ACESYS1) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1prmcl ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1prmcla ,ac1prmcl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1prmclb ,ac1prmcl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1prmclc ,ac1prmcl ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Premier Club (Ace) (ACESYS1) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1rundx ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Runner Deluxe Club (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1rundxa ,ac1rundx ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Runner Deluxe Club (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1totb ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Top Of The Bill (Ace) (ACESYS1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1shid ,0 ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Super Hi De Hi (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, ac1shida ,ac1shid ,aces1 ,aces1 , aces1_state,aces1 ,ROT0 ,"Ace", "Super Hi De Hi (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1dbldx ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Double Deluxe (Pcp) (ACESYS1)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1nudbk ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1nudbka ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1nudbkb ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1nudbkc ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1nudbkd ,ac1nudbk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Nudge Break (Pcp) (ACESYS1) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1sstrk ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Starstruck (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1sstrka ,ac1sstrk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Starstruck (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1sstrkb ,ac1sstrk ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Starstruck (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1xpres ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Xpress (Pcp) (ACESYS1)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1roll ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Roll Up (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1rolla ,ac1roll ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Roll Up (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1rollb ,ac1roll ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Roll Up (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1bluec ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1blueca ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1bluecb ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1bluecc ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1bluecd ,ac1bluec ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Pcp", "Blue Chip (Pcp) (ACESYS1) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, ac1hideh ,0 ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Ace", "Hi De Hi Deluxe (Ace) (ACESYS1) (set 1)",GAME_IS_SKELETON_MECHANICAL ) // was in Hi De Hi (Ace) (sp.ACE) set
+GAME(199?, ac1hideha ,sp_hideh ,aces1 ,aces1 , aces1_state,aces1, ROT0, "Ace", "Hi De Hi Deluxe (Ace) (ACESYS1) (set 2)",GAME_IS_SKELETON_MECHANICAL ) // ^^
diff --git a/src/mame/drivers/acesp.c b/src/mame/drivers/acesp.c
index 985ccf50573..8581e4f2c1b 100644
--- a/src/mame/drivers/acesp.c
+++ b/src/mame/drivers/acesp.c
@@ -23,7 +23,7 @@ class ace_sp_state : public driver_device
public:
ace_sp_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -69,18 +69,18 @@ ADDRESS_MAP_END
const pia6821_interface ace_sp_pia0_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_NULL, /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_NULL, /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_NULL, /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
@@ -268,7 +268,7 @@ ROM_END
#define SP_CRIME_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_crime )
@@ -336,7 +336,7 @@ ROM_START( sp_crimeh )
ROM_END
#define SP_EMMRD_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
ROM_LOAD( "edsnd1.bin", 0x0000, 0x80000, CRC(e91382d7) SHA1(499a0606e9bbabcf207c8778323899b7b81ae372) ) \
ROM_LOAD( "edsnd2.bin", 0x80000, 0x80000, CRC(0e103080) SHA1(2dcfcb35d04f34e4bc6da32f2d23bd8685654f8e) ) \
@@ -439,7 +439,7 @@ ROM_START( sp_emmrdo )
ROM_END
#define SP_WOOLP_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -558,7 +558,7 @@ ROM_START( sp_woolpo )
ROM_END
#define SP_ZIGZAG_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -661,7 +661,7 @@ ROM_START( sp_zigzgm )
ROM_END
#define SP_GOLDM_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
ROM_LOAD( "gmilesnd1.bin", 0x0000, 0x80000, CRC(cb1d49a2) SHA1(ed212041017cf1305821a5d99c48723d06c16f0f) ) \
ROM_LOAD( "gmilesnd2.bin", 0x80000, 0x80000, CRC(a58e01a9) SHA1(5cdeb10c451eaf93cc4d6a0208408b00f134f8f4) ) \
@@ -888,7 +888,7 @@ ROM_END
#define SP_GNAT_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -1007,7 +1007,7 @@ ROM_END
#define SP_GPRIX_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_gprix )
@@ -1074,7 +1074,7 @@ ROM_START( sp_gprixh )
ROM_END
#define SP_HIDEH_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -1200,7 +1200,7 @@ ROM_END
#define SP_HIFLY_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -1324,7 +1324,7 @@ ROM_START( sp_hiflyp )
ROM_END
#define SP_JURAS_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
ROM_LOAD( "jt8_snd1.bin", 0x0000, 0x80000, CRC(54f02e21) SHA1(1f2142e3cad828f3f07b729ad8394392c3a5ef46) ) \
ROM_LOAD( "jt8_snd2.bin", 0x80000, 0x80000, CRC(6ae75d87) SHA1(f6a73c26f7715b2a2d69b05d7729571b05b2fdaa) ) \
@@ -1337,7 +1337,7 @@ ROM_START( sp_juras )
ROM_END
#define SP_OPENB_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -1412,7 +1412,7 @@ ROM_START( sp_openbi )
ROM_END
#define SP_PAYRS_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -1484,7 +1484,7 @@ ROM_END
#define SP_PLAYA_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_playa )
@@ -1559,7 +1559,7 @@ ROM_START( sp_playai )
ROM_END
#define SP_SPELL_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
ROM_LOAD( "spellboundsnd1.bin", 0x0000, 0x80000, CRC(ab462981) SHA1(a88728eb8c5dbf114007551c7b5d4eb06cc7eb0b) ) \
ROM_LOAD( "spellboundsnd2.bin", 0x80000, 0x80000, CRC(9ada4413) SHA1(2dc9b42cdd3a64b5e5d3eab0d68b109258d12eda) ) \
@@ -1634,7 +1634,7 @@ ROM_END
#define SP_SWOP_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -1787,7 +1787,7 @@ ROM_START( sp_timemk )
ROM_END
#define SP_TZ_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2021,7 +2021,7 @@ ROM_END
#define SP_BEAU_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2091,7 +2091,7 @@ ROM_END
#define SP_BIGBD_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_bigbd )
@@ -2111,7 +2111,7 @@ ROM_END
#define SP_BRKBK_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2152,7 +2152,7 @@ ROM_END
#define SP_CAMEL_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2272,7 +2272,7 @@ ROM_END
#define SP_CLBNA_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2294,7 +2294,7 @@ ROM_END
#define SP_CODER_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2358,7 +2358,7 @@ ROM_END
#define SP_CRISS_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2421,7 +2421,7 @@ ROM_END
#define SP_DAYTR_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2457,7 +2457,7 @@ ROM_END
#define SP_DONKY_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2520,7 +2520,7 @@ ROM_END
#define SP_DYOUR_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2533,7 +2533,7 @@ ROM_END
#define SP_FESTI_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2544,7 +2544,7 @@ ROM_START( sp_festi )
ROM_END
#define SP_BEAU2_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2600,7 +2600,7 @@ ROM_END
#define SP_GHOST_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2747,7 +2747,7 @@ ROM_END
#define SP_GLOBE_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2809,7 +2809,7 @@ ROM_END
#define SP_GOL_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_gol )
@@ -2820,7 +2820,7 @@ ROM_END
#define SP_GOLDA_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2842,7 +2842,7 @@ ROM_END
#define SP_GOLDS_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -2911,7 +2911,7 @@ ROM_END
#define SP_GOLDT_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_goldt )
@@ -2923,7 +2923,7 @@ ROM_END
#define SP_HERE_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_here )
@@ -2984,7 +2984,7 @@ ROM_END
#define SP_HOLID_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_holid )
@@ -3003,7 +3003,7 @@ ROM_END
#define SP_LOTTO_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_lotto )
@@ -3014,7 +3014,7 @@ ROM_END
#define SP_MAGMO_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3055,7 +3055,7 @@ ROM_END
#define SP_MEGMO_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3118,7 +3118,7 @@ ROM_END
#define SP_MONMA_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3161,7 +3161,7 @@ ROM_END
#define SP_MONMO_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3224,7 +3224,7 @@ ROM_END
#define SP_NUDEX_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3245,7 +3245,7 @@ ROM_END
#define SP_ONBOX_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3355,7 +3355,7 @@ ROM_END
#define SP_PISTE_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3481,7 +3481,7 @@ ROM_END
#define SP_POUND_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3661,7 +3661,7 @@ ROM_START( sp_poundbwbg )
ROM_END
#define SP_PRZNA_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3723,7 +3723,7 @@ ROM_END
#define SP_ROAD_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_road )
@@ -3734,7 +3734,7 @@ ROM_START( sp_road )
ROM_END
#define SP_SKYLM_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_skylm )
@@ -3753,7 +3753,7 @@ ROM_END
#define SP_TKPIK_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3807,7 +3807,7 @@ ROM_START( sp_tkpikf )
ROM_END
#define SP_CARRY_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_carry )
@@ -3827,7 +3827,7 @@ ROM_END
#define SP_FRONT_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3841,7 +3841,7 @@ ROM_END
/* Crystal games below, these have Crystal encryption, and appear to be running on sp.ace HW, possible the sound systems are different too. */
#define SP_ATW_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* actually I think this rom is just a bad dump, there is a rom which is the same in the JPM HW set, */ \
/* but twice the size. Also this isn't an oki rom! */ \
ROM_LOAD( "atw80snd.bin", 0x0000, 0x020000, CRC(b002e11c) SHA1(f7133f4bb8c31feaad0a7b9ee88749f9b7877575) ) \
@@ -3853,7 +3853,7 @@ ROM_START( sp_atw )
ROM_END
#define SP_FIVE_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3871,7 +3871,7 @@ ROM_END
#define SP_CRUN_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3894,7 +3894,7 @@ ROM_START( sp_crunb )
ROM_END
#define SP_ROOF_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
ROM_START( sp_roof )
@@ -3912,7 +3912,7 @@ ROM_START( sp_roofa )
ROM_END
#define SP_CPAL_SOUND \
- ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
+ ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 ) \
/* not used, or missing? */ \
@@ -3935,562 +3935,559 @@ DRIVER_INIT_MEMBER(ace_sp_state,ace_sp)
}
-GAME( 199?, sp_cbowl ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowla ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlb ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlc ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowld ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowle ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlf ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlg ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlh ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowli ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlj ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlk ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowll ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlm ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowln ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlo ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlp ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlq ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlr ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowls ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlt ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 21)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cbowlu ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 22)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_crime ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimea ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimeb ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimec ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimed ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimee ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimef ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimeg ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crimeh ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowl ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowla ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlb ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlc ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowld ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowle ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlf ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlg ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlh ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowli ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlj ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlk ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowll ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlm ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowln ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlo ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlp ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlq ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlr ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowls ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlt ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 21)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cbowlu ,sp_cbowl ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Cash Bowl (Ace) (sp.ACE) (set 22)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_crime ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimea ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimeb ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimec ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimed ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimee ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimef ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimeg ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crimeh ,sp_crime ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Crime Watch (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
// seems to be very closely related to Woolpack, looks like the same basic game with different strings, these have "GO TO EMMERDALE"
-GAME( 1995, sp_emmrd ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrda ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdb ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdc ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdd ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrde ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdf ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdg ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdh ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdi ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdj ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdk ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdn ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_emmrdo ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrd ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrda ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdb ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdc ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdd ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrde ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdf ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdg ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdh ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdi ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdj ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdk ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdn ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_emmrdo ,sp_emmrd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Emmerdale (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
// seems to be very closely related to Emmerdale, looks like the same basic game with different strings, these have "GO T' WOOLPACK"
-GAME( 1995, sp_woolp ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpa ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpb ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpc ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpd ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpe ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpf ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
-GAME( 1995, sp_woolpg ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
-GAME( 1995, sp_woolph ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
-GAME( 1995, sp_woolpi ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
-GAME( 1995, sp_woolpj ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpk ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpl ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpm ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpn ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 1995, sp_woolpo ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolp ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpa ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpb ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpc ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpd ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpe ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpf ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
+GAME( 1995, sp_woolpg ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
+GAME( 1995, sp_woolph ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
+GAME( 1995, sp_woolpi ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
+GAME( 1995, sp_woolpj ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpk ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpl ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpm ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpn ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1995, sp_woolpo ,sp_woolp ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Woolpack (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
// this has 'Emmerdale' padding, but seems to be a unique game, contains "ZIGZAG" strings
-GAME( 199?, sp_zigzg ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzga ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgb ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgc ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgd ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzge ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgf ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgg ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgh ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgi ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgj ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgk ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgl ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_zigzgm ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzg ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzga ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgb ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgc ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgd ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzge ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgf ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgg ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgh ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgi ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgj ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgk ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgl ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_zigzgm ,sp_zigzg ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Zig Zag (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
// some of these have additional Whitbread copyright, many appear to be 'Golden Mile Showcase', several have a 'Golden Mile Prize' padding instead of the regular
-GAME( 199?, sp_goldm ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldma ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmb ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmc ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmd ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldme ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmf ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmg ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmh ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmi ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmj ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmk ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldml ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmm ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmn ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmo ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmp ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmq ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmr ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldms ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmt ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 21)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmu ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 22)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmv ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 23)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmw ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 24)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmx ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 25)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmy ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 26)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldmz ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 27)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldm0 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 28)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldm1 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 29)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldm2 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 30)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldm3 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 31)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldm ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldma ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmb ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmc ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmd ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldme ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmf ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmg ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmh ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmi ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmj ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmk ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldml ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmm ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmn ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmo ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmp ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmq ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmr ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldms ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmt ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 21)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmu ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 22)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmv ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 23)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmw ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 24)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmx ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 25)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmy ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 26)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldmz ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 27)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldm0 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 28)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldm1 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 29)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldm2 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 30)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldm3 ,sp_goldm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Mile (Ace) (sp.ACE) (set 31)",GAME_IS_SKELETON_MECHANICAL )
// one of the types here have blanked out padding, possibly a BWB re-release?
-GAME( 199?, sp_gnat ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnata ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatb ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatc ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatd ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnate ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatf ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatg ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnath ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnati ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatj ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatk ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatl ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatm ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnatn ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gnato ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnat ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnata ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatb ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatc ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatd ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnate ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatf ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatg ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnath ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnati ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatj ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatk ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatl ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatm ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnatn ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gnato ,sp_gnat ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand National (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
// seems to be a variation on Grand National (prize cabinet?)
-GAME( 199?, sp_przna ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_prznaa ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_prznab ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_prznac ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_prznad ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_prznae ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_prznaf ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_prznag ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_gprix ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixa ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixb ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixc ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixd ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixe ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixf ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixg ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_gprixh ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_hideh ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hideha ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehb ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehc ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehd ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehe ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehf ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehg ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehh ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehi ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehj ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehk ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehl ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehm ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehn ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hideho ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hidehp ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_hifly ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflya ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyb ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyc ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyd ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflye ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyf ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyg ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyh ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyi ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyj ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyk ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyl ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflym ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyn ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyo ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hiflyp ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_juras ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Jurassic Trail (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_openb ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openba ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbb ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbc ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbd ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbe ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbf ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbg ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbh ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_openbi ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_payrs ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrsa ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrsb ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrsc ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrsd ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrse ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrsf ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrsg ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_payrsh ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_playa ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_playaa ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_playab ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
-GAME( 199?, sp_playac ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
-GAME( 199?, sp_playad ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
-GAME( 199?, sp_playae ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
-GAME( 199?, sp_playaf ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
-GAME( 199?, sp_playag ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
-GAME( 199?, sp_playah ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
-GAME( 199?, sp_playai ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
-
-GAME( 199?, sp_spell ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spella ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spellb ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spellc ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spelld ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spelle ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spellf ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spellg ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spelli ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_spellj ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_swop ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_swopa ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_swopb ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_swopc ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_swopd ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_swope ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_swopf ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_swopg ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_timem ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timema ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemb ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemc ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemd ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timeme ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemf ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemg ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemh ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemi ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemj ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_timemk ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_tz ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tza ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzb ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzc ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzd ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tze ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzf ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzg ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzh ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzbwb ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Twilight Zone (Ace/Bwb) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_tzfe ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfea ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfeb ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfec ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfed ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfee ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfef ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfeg ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfeh ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfei ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfej ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfek ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfel ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfem ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfen ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfeo ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfep ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfeq ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfer ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfes ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfet ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 21)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tzfeu ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 22)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_beau ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beaua ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beaub ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beauc ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beaud ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beaue ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beauf ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beaug ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beauh ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_bigbd ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Big Break Deluxe Club (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_bigbda ,sp_bigbd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Big Break Deluxe Club (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_brkbk ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_brkbka ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_brkbkb ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_brkbkc ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_brkbkd ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_camel ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camela ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelb ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelc ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cameld ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camele ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelf ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelg ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelh ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cameli ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelj ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelk ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camell ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelm ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_cameln ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_camelo ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_clbna ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Club National (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_clbnaa ,sp_clbna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Club National (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_coder ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_codera ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_coderb ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_coderc ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_coderd ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_codere ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_coderf ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_coderg ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_criss ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crissa ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crissb ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crissc ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crissd ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crisse ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crissf ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_crissg ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_daytr ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_daytra ,sp_daytr ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_daytrb ,sp_daytr ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_daytrc ,sp_daytr ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_donky ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_donkya ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_donkyb ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_donkyc ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_donkyd ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_donkye ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_donkyf ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_donkyg ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_dyour ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Double Your Money (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_festi ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Festival (Spanish) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_beau2 ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beau2a ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beau2b ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beau2c ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beau2d ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beau2e ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_beau2f ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_ghost ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghosta ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostb ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostc ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostd ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghoste ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostf ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostg ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghosth ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghosti ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostj ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostk ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostl ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostm ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostn ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghosto ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostp ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostq ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghostr ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_ghosts ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_globe ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_globea ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_globeb ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_globec ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_globed ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_globee ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_globef ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_globeg ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_gol ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Gol (Spanish) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_golda ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Arrow Club (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldaa ,sp_golda ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Arrow Club (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_przna ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_prznaa ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_prznab ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_prznac ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_prznad ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_prznae ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_prznaf ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_prznag ,sp_przna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Prize National (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_gprix ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixa ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixb ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixc ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixd ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixe ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixf ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixg ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_gprixh ,sp_gprix ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Grand Prix (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_hideh ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hideha ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehb ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehc ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehd ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehe ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehf ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehg ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehh ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehi ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehj ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehk ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehl ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehm ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehn ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hideho ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hidehp ,sp_hideh ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi De Hi (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_hifly ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflya ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyb ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyc ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyd ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflye ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyf ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyg ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyh ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyi ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyj ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyk ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyl ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflym ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyn ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyo ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hiflyp ,sp_hifly ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Hi Flyer (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_juras ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Jurassic Trail (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_openb ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openba ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbb ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbc ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbd ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbe ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbf ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbg ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbh ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_openbi ,sp_openb ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Open The Box (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_payrs ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrsa ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrsb ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrsc ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrsd ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrse ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrsf ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrsg ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_payrsh ,sp_payrs ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Payrise (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_playa ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_playaa ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_playab ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
+GAME( 199?, sp_playac ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL ) // incomplete
+GAME( 199?, sp_playad ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
+GAME( 199?, sp_playae ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
+GAME( 199?, sp_playaf ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
+GAME( 199?, sp_playag ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
+GAME( 199?, sp_playah ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
+GAME( 199?, sp_playai ,sp_playa ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Play It Again (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL ) // possible bad pairing
+
+GAME( 199?, sp_spell ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spella ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spellb ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spellc ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spelld ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spelle ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spellf ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spellg ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spelli ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_spellj ,sp_spell ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Spellbound (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_swop ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_swopa ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_swopb ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_swopc ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_swopd ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_swope ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_swopf ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_swopg ,sp_swop ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Swop Shop (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_timem ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timema ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemb ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemc ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemd ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timeme ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemf ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemg ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemh ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemi ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemj ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_timemk ,sp_timem ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Time Machine (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_tz ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tza ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzb ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzc ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzd ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tze ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzf ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzg ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzh ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzbwb ,sp_tz ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Twilight Zone (Ace/Bwb) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_tzfe ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfea ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfeb ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfec ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfed ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfee ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfef ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfeg ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfeh ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfei ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfej ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfek ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfel ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfem ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfen ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfeo ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfep ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfeq ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfer ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfes ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfet ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 21)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tzfeu ,sp_tzfe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Twilight Zone - Further Encounters (Ace) (sp.ACE) (set 22)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_beau ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beaua ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beaub ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beauc ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beaud ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beaue ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beauf ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beaug ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beauh ,sp_beau ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Beau Peep (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_bigbd ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Big Break Deluxe Club (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_bigbda ,sp_bigbd ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Big Break Deluxe Club (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_brkbk ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_brkbka ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_brkbkb ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_brkbkc ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_brkbkd ,sp_brkbk ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Break The Bank (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_camel ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camela ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelb ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelc ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cameld ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camele ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelf ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelg ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelh ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cameli ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelj ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelk ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camell ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelm ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cameln ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_camelo ,sp_camel ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Camelot (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_clbna ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Club National (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_clbnaa ,sp_clbna ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Club National (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_coder ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_codera ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_coderb ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_coderc ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_coderd ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_codere ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_coderf ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_coderg ,sp_coder ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Code Red (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_criss ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crissa ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crissb ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crissc ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crissd ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crisse ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crissf ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_crissg ,sp_criss ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Criss Cross Cash (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_daytr ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_daytra ,sp_daytr ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_daytrb ,sp_daytr ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_daytrc ,sp_daytr ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Daytripper (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_donky ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_donkya ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_donkyb ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_donkyc ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_donkyd ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_donkye ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_donkyf ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_donkyg ,sp_donky ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Donkey Derby (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_dyour ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Double Your Money (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_festi ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Festival (Spanish) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_beau2 ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beau2a ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beau2b ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beau2c ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beau2d ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beau2e ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_beau2f ,sp_beau2 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Further Adventures Of Beau Peep (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_ghost ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghosta ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostb ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostc ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostd ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghoste ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostf ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostg ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghosth ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghosti ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostj ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostk ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostl ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostm ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostn ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghosto ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostp ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostq ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 18)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghostr ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 19)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_ghosts ,sp_ghost ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Ghost Trapper (Ace) (sp.ACE) (set 20)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_globe ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_globea ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_globeb ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_globec ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_globed ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_globee ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_globef ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_globeg ,sp_globe ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Globe Trotter (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_gol ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Gol (Spanish) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_golda ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Arrow Club (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldaa ,sp_golda ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Arrow Club (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
// These contain lots of 'Golden Streak' strings, as well as 'Have you got the Golden Touch?' strings
-GAME( 199?, sp_golds ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldsa ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldsb ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldsc ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldsd ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldse ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldsf ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldsg ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_goldsh ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_golds ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldsa ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldsb ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldsc ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldsd ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldse ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldsf ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldsg ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldsh ,sp_golds ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
// Very similar to above, but many of the 'Golden Streak' strings have been changed to Golden Touch, header still says Golden Streak tho
-GAME( 199?, sp_goldt ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Golden Touch) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_here ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_herea ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hereb ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_herec ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hered ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_heree ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_heref ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_hereg ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_holid ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Holiday Club (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_holida ,sp_holid ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Holiday Club (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_lotto ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Lotto (Spanish) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_magmo ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_magmoa ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_magmob ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_magmoc ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_magmod ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_megmo ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_megmoa ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_megmob ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_megmoc ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_megmod ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_megmoe ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_megmof ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_megmog ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_monma ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmaa ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmab ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmac ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmad ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_monmo ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmoa ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmob ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmoc ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmod ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmoe ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmof ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_monmog ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_nudex ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Nudge Explosion (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_nudexa ,sp_nudex ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Nudge Explosion (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_onbox ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxa ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxb ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxc ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxd ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxe ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxf ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxg ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxh ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxi ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxj ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxk ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxl ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxm ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_onboxn ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_piste ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistea ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pisteb ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistec ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pisted ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistee ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistef ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pisteg ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pisteh ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistei ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistej ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistek ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistel ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistem ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pisten ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pisteo ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pistep ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_pound ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pounda ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundb ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundc ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundd ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_pounde ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundf ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundg ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundh ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundi ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundj ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundk ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundl ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundm ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundn ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundo ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundp ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwb ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwba ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwbb ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwbc ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwbd ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwbe ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwbf ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_poundbwbg ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_road ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Road To Hell (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL ) // incomplete program
-
-GAME( 199?, sp_skylm ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Sky's The Limit Club, The (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_skylma ,sp_skylm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Sky's The Limit Club, The (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_tkpik ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tkpika ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tkpikb ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tkpikc ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tkpikd ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tkpike ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_tkpikf ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_goldt ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Golden Streak (Golden Touch) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_here ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_herea ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hereb ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_herec ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hered ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_heree ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_heref ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_hereg ,sp_here ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Here We Go (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_holid ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Holiday Club (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_holida ,sp_holid ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Holiday Club (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_lotto ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Lotto (Spanish) (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_magmo ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_magmoa ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_magmob ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_magmoc ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_magmod ,sp_magmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Magic Money (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_megmo ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_megmoa ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_megmob ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_megmoc ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_megmod ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_megmoe ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_megmof ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_megmog ,sp_megmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Mega Money (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_monma ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmaa ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmab ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmac ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmad ,sp_monma ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Magic (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_monmo ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmoa ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmob ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmoc ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmod ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmoe ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmof ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_monmog ,sp_monmo ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Money Mountain (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_nudex ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Nudge Explosion (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_nudexa ,sp_nudex ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Nudge Explosion (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_onbox ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxa ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxb ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxc ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxd ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxe ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxf ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxg ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxh ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxi ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxj ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxk ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxl ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxm ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_onboxn ,sp_onbox ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Box (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_piste ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistea ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pisteb ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistec ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pisted ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistee ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistef ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pisteg ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pisteh ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistei ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistej ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistek ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistel ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistem ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pisten ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pisteo ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pistep ,sp_piste ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "On The Piste (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_pound ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pounda ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundb ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundc ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundd ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_pounde ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundf ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundg ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundh ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 9)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundi ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 10)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundj ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 11)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundk ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 12)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundl ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 13)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundm ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 14)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundn ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 15)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundo ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 16)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundp ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Pound For Pound (Ace) (sp.ACE) (set 17)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwb ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwba ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwbb ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwbc ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwbd ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwbe ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwbf ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_poundbwbg ,sp_pound ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace / Bwb", "Pound For Pound (Ace/Bwb) (sp.ACE) (set 8)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_road ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Road To Hell (Ace) (sp.ACE)",GAME_IS_SKELETON_MECHANICAL ) // incomplete program
+
+GAME( 199?, sp_skylm ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Sky's The Limit Club, The (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_skylma ,sp_skylm ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Sky's The Limit Club, The (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+
+GAME( 199?, sp_tkpik ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tkpika ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tkpikb ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tkpikc ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 4)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tkpikd ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 5)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tkpike ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 6)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_tkpikf ,sp_tkpik ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Take Your Pick (Ace) (sp.ACE) (set 7)",GAME_IS_SKELETON_MECHANICAL )
// not sure.. looks like 6303 code to me
-GAME( 199?, sp_carry ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Pcp", "Carry On (Pcp) (sp.ACE?) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_carrya ,sp_carry ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Pcp", "Carry On (Pcp) (sp.ACE?) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_carry ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Pcp", "Carry On (Pcp) (sp.ACE?) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_carrya ,sp_carry ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Pcp", "Carry On (Pcp) (sp.ACE?) (set 2)",GAME_IS_SKELETON_MECHANICAL )
// not sure.. looks like 6303 code to me
-GAME( 199?, sp_front ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Bwb", "Final Frontier (Bwb) (sp.ACE?)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_front ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Bwb", "Final Frontier (Bwb) (sp.ACE?)",GAME_IS_SKELETON_MECHANICAL )
// not sure.. looks like 6303 code to me
-GAME(199?, sp_atw ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp, ROT0, "Crystal","Around The World In Eighty Days (Crystal) (sp.ACE?)",GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, sp_atw ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp, ROT0, "Crystal","Around The World In Eighty Days (Crystal) (sp.ACE?)",GAME_IS_SKELETON_MECHANICAL )
// not sure.. looks like 6303 code to me
-GAME(199?, sp_five ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Fiver Fever (Crystal) (sp.ACE?) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, sp_fivea ,sp_five ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Fiver Fever (Crystal) (sp.ACE?) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, sp_five ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Fiver Fever (Crystal) (sp.ACE?) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, sp_fivea ,sp_five ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Fiver Fever (Crystal) (sp.ACE?) (set 2)",GAME_IS_SKELETON_MECHANICAL )
// not sure.. looks like 6303 code to me
-GAME(199?, sp_crun ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Cash Run (Crystal) (sp.ACE?) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, sp_cruna ,sp_crun ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Cash Run (Crystal) (sp.ACE?) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-GAME(199?, sp_crunb ,sp_crun ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Cash Run (Crystal) (sp.ACE?) (set 3)",GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, sp_crun ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Cash Run (Crystal) (sp.ACE?) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, sp_cruna ,sp_crun ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Cash Run (Crystal) (sp.ACE?) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME(199?, sp_crunb ,sp_crun ,ace_sp ,ace_sp , ace_sp_state,ace_cr, ROT0, "Crystal","Cash Run (Crystal) (sp.ACE?) (set 3)",GAME_IS_SKELETON_MECHANICAL )
// incomplete dump (was mixed with the IMPACT rebuild)
-GAME( 199?, sp_roof ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Thru' The Roof (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
-GAME( 199?, sp_roofa ,sp_roof ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Thru' The Roof (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
-
-GAME( 199?, sp_cpal ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Caesars Palace (Ace) (sp.ACE?)",GAME_IS_SKELETON_MECHANICAL ) // was in an IMPACT set, might be a different game but CPU seems correct for here
-
-
+GAME( 199?, sp_roof ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Thru' The Roof (Ace) (sp.ACE) (set 1)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_roofa ,sp_roof ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Thru' The Roof (Ace) (sp.ACE) (set 2)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 199?, sp_cpal ,0 ,ace_sp ,ace_sp , ace_sp_state,ace_sp ,ROT0 ,"Ace", "Caesars Palace (Ace) (sp.ACE?)",GAME_IS_SKELETON_MECHANICAL ) // was in an IMPACT set, might be a different game but CPU seems correct for here
diff --git a/src/mame/drivers/acommand.c b/src/mame/drivers/acommand.c
index 79fe32d867f..f6c8ccf549c 100644
--- a/src/mame/drivers/acommand.c
+++ b/src/mame/drivers/acommand.c
@@ -141,9 +141,9 @@ void acommand_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
int w = (spriteram16[offs+0] & 0x0f);
int h = ((spriteram16[offs+0] & 0xf0) >> 4);
int sy = (spriteram16[offs+4] & 0x0ff) - ((h+1)*0x10);
-/**/ int pri = spriteram16[offs+5];
-/**/ int flipy = ((spriteram16[offs+1] & 0x0200) >> 9);
-/**/ int flipx = ((spriteram16[offs+1] & 0x0100) >> 8);
+/**/ int pri = spriteram16[offs+5];
+/**/ int flipy = ((spriteram16[offs+1] & 0x0200) >> 9);
+/**/ int flipx = ((spriteram16[offs+1] & 0x0100) >> 8);
int xx,yy,x;
int delta = 16;
@@ -195,8 +195,8 @@ void acommand_state::video_start()
}
-#define LED_ON 0x01c00
-#define LED_OFF 0x00000
+#define LED_ON 0x01c00
+#define LED_OFF 0x00000
/*
a
---
@@ -313,17 +313,17 @@ READ16_MEMBER(acommand_state::ac_devices_r)
{
case 0x0008/2:
/*
- --x- ---- ---- ---- Ticket Dispenser - 2
- ---x ---- ---- ---- Ticket Dispenser - 1
- ---- -x-- ---- ---- Right Gun HIT
- ---- ---x ---- ---- Left Gun HIT
- ---- ---- --x- ---- Service Mode (Toggle)
- ---- ---- ---x ---- Service Coin
- ---- ---- ---- x--- COIN2
- ---- ---- ---- -x-- COIN1
- ---- ---- ---- --x- (Activate Test)
- ---- ---- ---- ---x (Advance through Tests)
- */
+ --x- ---- ---- ---- Ticket Dispenser - 2
+ ---x ---- ---- ---- Ticket Dispenser - 1
+ ---- -x-- ---- ---- Right Gun HIT
+ ---- ---x ---- ---- Left Gun HIT
+ ---- ---- --x- ---- Service Mode (Toggle)
+ ---- ---- ---x ---- Service Coin
+ ---- ---- ---- x--- COIN2
+ ---- ---- ---- -x-- COIN1
+ ---- ---- ---- --x- (Activate Test)
+ ---- ---- ---- ---x (Advance through Tests)
+ */
return ioport("IN0")->read();
case 0x0014/2:
case 0x0016/2:
@@ -333,20 +333,20 @@ READ16_MEMBER(acommand_state::ac_devices_r)
return machine().device<okim6295_device>("oki2")->read(space,0);
case 0x0040/2:
/*
- "Upper switch / Under Switch"
- xx-x ---- xx-x xx-x
- -x-- ---- ---- ---- Catch Switch - 3
- --x- ---- ---- ---- Lower Switch - 3
- ---x ---- ---- ---- Upper Switch - 3
- ---- -x-- ---- ---- Catch Switch - 2
- ---- --x- ---- ---- Lower Switch - 2
- ---- ---x ---- ---- Upper Switch - 2
- ---- ---- -x-- ---- Catch Switch - 1
- ---- ---- --x- ---- Lower Switch - 1 (active high)
- ---- ---- ---x ---- Upper Switch - 1 (active low)
- ---- ---- ---- --xx Boss Door - Motor
- */
- //22dc8
+ "Upper switch / Under Switch"
+ xx-x ---- xx-x xx-x
+ -x-- ---- ---- ---- Catch Switch - 3
+ --x- ---- ---- ---- Lower Switch - 3
+ ---x ---- ---- ---- Upper Switch - 3
+ ---- -x-- ---- ---- Catch Switch - 2
+ ---- --x- ---- ---- Lower Switch - 2
+ ---- ---x ---- ---- Upper Switch - 2
+ ---- ---- -x-- ---- Catch Switch - 1
+ ---- ---- --x- ---- Lower Switch - 1 (active high)
+ ---- ---- ---x ---- Upper Switch - 1 (active low)
+ ---- ---- ---- --xx Boss Door - Motor
+ */
+ //22dc8
{
m_ufo_sw1 = m_ac_devram[offset] & 3;
if(m_ac_devram[offset] & 0x10)
@@ -371,11 +371,11 @@ READ16_MEMBER(acommand_state::ac_devices_r)
}
case 0x0044/2:
/*
- ---- ---- --x- ---- Lower Switch - 5
- ---- ---- ---x ---- Upper Switch - 5
- ---- ---- ---- --x- Lower Switch - 4 (active high)
- ---- ---- ---- ---x Upper Switch - 4 (active low)
- */
+ ---- ---- --x- ---- Lower Switch - 5
+ ---- ---- ---x ---- Upper Switch - 5
+ ---- ---- ---- --x- Lower Switch - 4 (active high)
+ ---- ---- ---- ---x Upper Switch - 4 (active low)
+ */
{
m_ufo_sw2 = 0;
if(m_ac_devram[offset] & 0x01)
@@ -392,9 +392,9 @@ READ16_MEMBER(acommand_state::ac_devices_r)
return m_ac_devram[offset];
case 0x005c/2:
/*
- xxxx xxxx ---- ---- DIPSW4
- ---- ---- xxxx xxxx DIPSW3
- */
+ xxxx xxxx ---- ---- DIPSW4
+ ---- ---- xxxx xxxx DIPSW3
+ */
return ioport("IN1")->read();
}
return m_ac_devram[offset];
@@ -473,11 +473,11 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( acommand )
PORT_START("IN0")
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SERVICE1 )
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN1 )
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 )
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW )
PORT_DIPNAME( 0x0040, 0x0040, "IN0" )
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
@@ -485,11 +485,11 @@ static INPUT_PORTS_START( acommand )
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 )
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
+ PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
@@ -656,10 +656,10 @@ ROM_START( acommand )
ROM_LOAD16_BYTE( "jalgp7.bin", 0x300000, 0x080000, CRC(44b71098) SHA1(a6ec2573f9a266d4f8f315f6e99b12525011f512) )
ROM_LOAD16_BYTE( "jalgp8.bin", 0x300001, 0x080000, CRC(ce0b7838) SHA1(46e34971cb62565a3948d8c0a18086648c32e13b) )
- ROM_REGION( 0x100000, "oki1", 0 ) /* M6295 samples */
+ ROM_REGION( 0x100000, "oki1", 0 ) /* M6295 samples */
ROM_LOAD( "jalcf2.bin", 0x000000, 0x100000, CRC(b982fd97) SHA1(35ee5b1b9be762ccfefda24d73e329ceea876deb) )
- ROM_REGION( 0x100000, "oki2", 0 ) /* M6295 samples */
+ ROM_REGION( 0x100000, "oki2", 0 ) /* M6295 samples */
ROM_LOAD( "jalcf1.bin", 0x000000, 0x100000, CRC(24af21d3) SHA1(f68ab81a6c833b57ae9eef916a1c8578f3d893dd) )
ROM_REGION( 0x100000, "user1", 0 ) /* ? these two below are identical*/
diff --git a/src/mame/drivers/actfancr.c b/src/mame/drivers/actfancr.c
index 5e26cd7d3c9..381c09aed71 100644
--- a/src/mame/drivers/actfancr.c
+++ b/src/mame/drivers/actfancr.c
@@ -47,7 +47,7 @@ READ8_MEMBER(actfancr_state::triothep_control_r)
case 1: return ioport("P2")->read();
case 2: return ioport("DSW1")->read();
case 3: return ioport("DSW2")->read();
- case 4: return ioport("SYSTEM")->read(); /* VBL */
+ case 4: return ioport("SYSTEM")->read(); /* VBL */
}
return 0xff;
@@ -87,7 +87,7 @@ static ADDRESS_MAP_START( actfan_map, AS_PROGRAM, 8, actfancr_state )
AM_RANGE(0x130001, 0x130001) AM_READ_PORT("P2")
AM_RANGE(0x130002, 0x130002) AM_READ_PORT("DSW1")
AM_RANGE(0x130003, 0x130003) AM_READ_PORT("DSW2")
- AM_RANGE(0x140000, 0x140001) AM_READ_PORT("SYSTEM") /* VBL */
+ AM_RANGE(0x140000, 0x140001) AM_READ_PORT("SYSTEM") /* VBL */
AM_RANGE(0x150000, 0x150001) AM_WRITE(actfancr_sound_w)
AM_RANGE(0x1f0000, 0x1f3fff) AM_RAM AM_SHARE("main_ram") /* Main ram */
ADDRESS_MAP_END
@@ -157,44 +157,44 @@ static INPUT_PORTS_START( actfancr )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "100 (Cheat)")
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x04, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x20, "800000" )
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
static INPUT_PORTS_START( triothep )
@@ -207,59 +207,59 @@ static INPUT_PORTS_START( triothep )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x00, "8" )
PORT_DIPSETTING( 0x01, "10" )
PORT_DIPSETTING( 0x03, "12" )
PORT_DIPSETTING( 0x02, "14" )
- PORT_DIPNAME( 0x0c, 0x0c, "Difficulty (Time)" ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, "Difficulty (Time)" ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x08, "Easy (130)" )
PORT_DIPSETTING( 0x0c, "Normal (100)" )
PORT_DIPSETTING( 0x04, "Hard (70)" )
PORT_DIPSETTING( 0x00, "Hardest (60)" )
- PORT_DIPNAME( 0x10, 0x10, "Bonus Lives" ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, "Bonus Lives" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x10, "3" )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
INPUT_PORTS_END
/******************************************************************************/
static const gfx_layout chars =
{
- 8,8, /* 8*8 chars */
+ 8,8, /* 8*8 chars */
4096,
- 4, /* 4 bits per pixel */
+ 4, /* 4 bits per pixel */
{ 0x08000*8, 0x18000*8, 0x00000*8, 0x10000*8 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout tiles =
{
- 16,16, /* 16*16 sprites */
+ 16,16, /* 16*16 sprites */
2048,
4,
- { 0, 0x10000*8, 0x20000*8,0x30000*8 }, /* plane offset */
+ { 0, 0x10000*8, 0x20000*8,0x30000*8 }, /* plane offset */
{ 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7,
0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static const gfx_layout sprites =
{
- 16,16, /* 16*16 sprites */
+ 16,16, /* 16*16 sprites */
2048+1024,
4,
- { 0, 0x18000*8, 0x30000*8, 0x48000*8 }, /* plane offset */
+ { 0, 0x18000*8, 0x30000*8, 0x48000*8 }, /* plane offset */
{ 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7,
0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static GFXDECODE_START( actfan )
diff --git a/src/mame/drivers/adp.c b/src/mame/drivers/adp.c
index c94a671e084..ad35aa455c3 100644
--- a/src/mame/drivers/adp.c
+++ b/src/mame/drivers/adp.c
@@ -157,8 +157,8 @@ class adp_state : public driver_device
public:
adp_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_h63484(*this, "h63484"),
- m_microtouch(*this, "microtouch")
+ m_h63484(*this, "h63484"),
+ m_microtouch(*this, "microtouch")
{ }
required_device<h63484_device> m_h63484;
@@ -235,7 +235,7 @@ if (!machine().input().code_pressed(KEYCODE_O)) // debug: toggle window
int h = hd63484_regs_r(m_hd63484, 0x96/2, 0xffff) & 0x0fff;
int sx = ((hd63484_regs_r(m_hd63484, 0x92/2, 0xffff) >> 8) - (hd63484_regs_r(m_hd63484, 0x84/2, 0xffff) >> 8)) * 2 * 2;
int w = (hd63484_regs_r(m_hd63484, 0x92/2, 0xffff) & 0xff) * 2;
- if (sx < 0) sx = 0; // not sure about this (shangha2 title screen)
+ if (sx < 0) sx = 0; // not sure about this (shangha2 title screen)
b = (((hd63484_regs_r(m_hd63484, 0xdc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(m_hd63484, 0xde/2, 0xffff));
@@ -312,13 +312,13 @@ MACHINE_START_MEMBER(adp_state,skattv)
#if 0
/*
- ACRTC memory:
+ ACRTC memory:
- 00000-3ffff = RAM
- 40000-7ffff = ROM
- 80000-bffff = unused
- c0000-fffff = unused
- */
+ 00000-3ffff = RAM
+ 40000-7ffff = ROM
+ 80000-bffff = unused
+ c0000-fffff = unused
+ */
// hack to handle acrt rom
{
@@ -355,31 +355,31 @@ static const duart68681_config skattv_duart68681_config =
PALETTE_INIT_MEMBER(adp_state,adp)
{
- int i;
+ int i;
- for (i = 0; i < machine().total_colors(); i++)
- {
- int bit0, bit1, bit2, r, g, b;
-
-
- // red component
- bit0 = (i >> 0) & 0x01;
- bit1 = (i >> 3) & 0x01;
- bit2 = (i >> 0) & 0x01;
- r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
- // green component
- bit0 = (i >> 1) & 0x01;
- bit1 = (i >> 3) & 0x01;
- bit2 = (i >> 1) & 0x01;
- g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
- // blue component
- bit0 = (i >> 2) & 0x01;
- bit1 = (i >> 3) & 0x01;
- bit2 = (i >> 2) & 0x01;
- b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
-
- palette_set_color(machine(), i, MAKE_RGB(r,g,b));
- }
+ for (i = 0; i < machine().total_colors(); i++)
+ {
+ int bit0, bit1, bit2, r, g, b;
+
+
+ // red component
+ bit0 = (i >> 0) & 0x01;
+ bit1 = (i >> 3) & 0x01;
+ bit2 = (i >> 0) & 0x01;
+ r = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
+ // green component
+ bit0 = (i >> 1) & 0x01;
+ bit1 = (i >> 3) & 0x01;
+ bit2 = (i >> 1) & 0x01;
+ g = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
+ // blue component
+ bit0 = (i >> 2) & 0x01;
+ bit1 = (i >> 3) & 0x01;
+ bit2 = (i >> 2) & 0x01;
+ b = 0x21 * bit0 + 0x47 * bit1 + 0x97 * bit2;
+
+ palette_set_color(machine(), i, MAKE_RGB(r,g,b));
+ }
}
READ16_MEMBER(adp_state::test_r)
diff --git a/src/mame/drivers/aeroboto.c b/src/mame/drivers/aeroboto.c
index f701c52f00f..689daedc589 100644
--- a/src/mame/drivers/aeroboto.c
+++ b/src/mame/drivers/aeroboto.c
@@ -70,26 +70,26 @@ WRITE8_MEMBER(aeroboto_state::aeroboto_1a2_w)
}
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, aeroboto_state )
- AM_RANGE(0x01a2, 0x01a2) AM_WRITE(aeroboto_1a2_w) // affects IRQ line (more protection?)
- AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("mainram") // main RAM
- AM_RANGE(0x0800, 0x08ff) AM_RAM // tile color buffer; copied to 0x2000
- AM_RANGE(0x0900, 0x09ff) AM_WRITEONLY // a backup of default tile colors
- AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(aeroboto_videoram_w) AM_SHARE("videoram") // tile RAM
- AM_RANGE(0x1800, 0x183f) AM_RAM AM_SHARE("hscroll") // horizontal scroll regs
- AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(aeroboto_tilecolor_w) AM_SHARE("tilecolor") // tile color RAM
- AM_RANGE(0x1840, 0x27ff) AM_WRITENOP // cleared during custom LSI test
- AM_RANGE(0x2800, 0x28ff) AM_RAM AM_SHARE("spriteram") // sprite RAM
- AM_RANGE(0x2900, 0x2fff) AM_WRITENOP // cleared along with sprite RAM
- AM_RANGE(0x2973, 0x2973) AM_READ(aeroboto_2973_r) // protection read
+ AM_RANGE(0x01a2, 0x01a2) AM_WRITE(aeroboto_1a2_w) // affects IRQ line (more protection?)
+ AM_RANGE(0x0000, 0x07ff) AM_RAM AM_SHARE("mainram") // main RAM
+ AM_RANGE(0x0800, 0x08ff) AM_RAM // tile color buffer; copied to 0x2000
+ AM_RANGE(0x0900, 0x09ff) AM_WRITEONLY // a backup of default tile colors
+ AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(aeroboto_videoram_w) AM_SHARE("videoram") // tile RAM
+ AM_RANGE(0x1800, 0x183f) AM_RAM AM_SHARE("hscroll") // horizontal scroll regs
+ AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(aeroboto_tilecolor_w) AM_SHARE("tilecolor") // tile color RAM
+ AM_RANGE(0x1840, 0x27ff) AM_WRITENOP // cleared during custom LSI test
+ AM_RANGE(0x2800, 0x28ff) AM_RAM AM_SHARE("spriteram") // sprite RAM
+ AM_RANGE(0x2900, 0x2fff) AM_WRITENOP // cleared along with sprite RAM
+ AM_RANGE(0x2973, 0x2973) AM_READ(aeroboto_2973_r) // protection read
AM_RANGE(0x3000, 0x3000) AM_READWRITE(aeroboto_in0_r, aeroboto_3000_w)
AM_RANGE(0x3001, 0x3001) AM_READ_PORT("DSW1") AM_WRITE(soundlatch_byte_w)
AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW2") AM_WRITE(soundlatch2_byte_w)
AM_RANGE(0x3003, 0x3003) AM_WRITEONLY AM_SHARE("vscroll")
AM_RANGE(0x3004, 0x3004) AM_READ(aeroboto_201_r) AM_WRITEONLY AM_SHARE("starx")
- AM_RANGE(0x3005, 0x3005) AM_WRITEONLY AM_SHARE("stary") // usable but probably wrong
+ AM_RANGE(0x3005, 0x3005) AM_WRITEONLY AM_SHARE("stary") // usable but probably wrong
AM_RANGE(0x3006, 0x3006) AM_WRITEONLY AM_SHARE("bgcolor")
- AM_RANGE(0x3800, 0x3800) AM_READ(aeroboto_irq_ack_r) // watchdog or IRQ ack
- AM_RANGE(0x4000, 0xffff) AM_ROM // main ROM
+ AM_RANGE(0x3800, 0x3800) AM_READ(aeroboto_irq_ack_r) // watchdog or IRQ ack
+ AM_RANGE(0x4000, 0xffff) AM_ROM // main ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, aeroboto_state )
@@ -125,30 +125,30 @@ static INPUT_PORTS_START( formatz )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "Infinite (Cheat)")
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0c, "30000" )
PORT_DIPSETTING( 0x08, "40000" )
PORT_DIPSETTING( 0x04, "70000" )
PORT_DIPSETTING( 0x00, "100000" )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW1:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW1:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
/* The last dip switch is directly connected to the video hardware and
- flips the screen. The program instead sees the coin input, which must
- stay low for exactly 2 frames to be consistently recognized. */
+ flips the screen. The program instead sees the coin input, which must
+ stay low for exactly 2 frames to be consistently recognized. */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) PORT_DIPLOCATION("SW1:8") /* "Screen Inversion" */
PORT_START("DSW2")
- PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:1,2,3")
+ PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:1,2,3")
PORT_DIPSETTING( 0x07, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
@@ -157,14 +157,14 @@ static INPUT_PORTS_START( formatz )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0x18, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPNAME( 0x18, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x10, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x18, DEF_STR( Hard ) )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW2:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW2:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -200,7 +200,7 @@ static const gfx_layout spritelayout =
{ RGN_FRAC(2,3), RGN_FRAC(1,3), RGN_FRAC(0,3) },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
16*8
};
diff --git a/src/mame/drivers/aerofgt.c b/src/mame/drivers/aerofgt.c
index 910bbbc0401..c63e2985cd7 100644
--- a/src/mame/drivers/aerofgt.c
+++ b/src/mame/drivers/aerofgt.c
@@ -139,11 +139,11 @@ WRITE8_MEMBER(aerofgt_state::aerfboot_okim6295_banking_w)
static ADDRESS_MAP_START( pspikes_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0xff8000, 0xff8fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0xffc000, 0xffc3ff) AM_WRITEONLY AM_SHARE("spriteram3")
- AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
+ AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(pspikes_palette_bank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
@@ -153,13 +153,13 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( pspikesb_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0xc04000, 0xc04001) AM_WRITENOP
AM_RANGE(0xff8000, 0xff8fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0xffc000, 0xffcbff) AM_RAM AM_SHARE("spriteram3")
AM_RANGE(0xffd200, 0xffd201) AM_WRITE(pspikesb_gfxbank_w)
- AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
+ AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0")
AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1")
@@ -170,7 +170,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( spikes91_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0xc04000, 0xc04001) AM_WRITENOP
AM_RANGE(0xff8000, 0xff8fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
@@ -179,7 +179,7 @@ static ADDRESS_MAP_START( spikes91_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0xffc000, 0xffcfff) AM_RAM AM_SHARE("spriteram3")
//AM_RANGE(0xffd200, 0xffd201) AM_WRITE(pspikesb_gfxbank_w)
- AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
+ AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0")
AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
@@ -190,11 +190,11 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( pspikesc_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0xff8000, 0xff8fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0xffc000, 0xffcbff) AM_RAM AM_SHARE("spriteram3")
- AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
+ AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(pspikes_palette_bank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
@@ -210,8 +210,8 @@ static ADDRESS_MAP_START( karatblz_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x082000, 0x083fff) AM_RAM_WRITE(aerofgt_bg2videoram_w) AM_SHARE("bg2videoram")
AM_RANGE(0x0a0000, 0x0affff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0x0b0000, 0x0bffff) AM_RAM AM_SHARE("spriteram2")
- AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
- AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
+ AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
+ AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_SHARE("spriteram3")
AM_RANGE(0x0fe000, 0x0fe7ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0x0ff000, 0x0ff001) AM_READ_PORT("IN0")
@@ -228,9 +228,9 @@ static ADDRESS_MAP_START( spinlbrk_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(aerofgt_bg2videoram_w) AM_SHARE("bg2videoram")
- AM_RANGE(0xff8000, 0xffbfff) AM_RAM /* work RAM */
+ AM_RANGE(0xff8000, 0xffbfff) AM_RAM /* work RAM */
AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_SHARE("spriteram3")
- AM_RANGE(0xffd000, 0xffd1ff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
+ AM_RANGE(0xffd000, 0xffd1ff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffe7ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(spinlbrk_gfxbank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(aerofgt_bg2scrollx_w)
@@ -241,14 +241,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( turbofrc_map, AS_PROGRAM, 16, aerofgt_state )
ADDRESS_MAP_GLOBAL_MASK(0xfffff)
AM_RANGE(0x000000, 0x0bffff) AM_ROM
- AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
+ AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
AM_RANGE(0x0d0000, 0x0d1fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0x0d2000, 0x0d3fff) AM_RAM_WRITE(aerofgt_bg2videoram_w) AM_SHARE("bg2videoram")
AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0x0e4000, 0x0e7fff) AM_RAM AM_SHARE("spriteram2")
- AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
+ AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_SHARE("spriteram3")
- AM_RANGE(0x0fd000, 0x0fdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
+ AM_RANGE(0x0fd000, 0x0fdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
AM_RANGE(0x0fe000, 0x0fe7ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0x0ff000, 0x0ff001) AM_READ_PORT("IN0")
AM_RANGE(0x0ff002, 0x0ff003) AM_READ_PORT("IN1") AM_WRITE(aerofgt_bg1scrolly_w)
@@ -256,18 +256,18 @@ static ADDRESS_MAP_START( turbofrc_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x0ff006, 0x0ff007) AM_READ(pending_command_r) AM_WRITE(aerofgt_bg2scrolly_w)
AM_RANGE(0x0ff008, 0x0ff009) AM_READ_PORT("IN2")
AM_RANGE(0x0ff008, 0x0ff00b) AM_WRITE(turbofrc_gfxbank_w)
- AM_RANGE(0x0ff00c, 0x0ff00d) AM_WRITENOP /* related to bg2 (written together with the scroll registers) */
+ AM_RANGE(0x0ff00c, 0x0ff00d) AM_WRITENOP /* related to bg2 (written together with the scroll registers) */
AM_RANGE(0x0ff00e, 0x0ff00f) AM_WRITE(turbofrc_sound_command_w)
ADDRESS_MAP_END
static ADDRESS_MAP_START( aerofgtb_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
- AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
+ AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
AM_RANGE(0x0d0000, 0x0d1fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0x0d2000, 0x0d3fff) AM_RAM_WRITE(aerofgt_bg2videoram_w) AM_SHARE("bg2videoram")
AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0x0e4000, 0x0e7fff) AM_RAM AM_SHARE("spriteram2")
- AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
+ AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_SHARE("spriteram3")
AM_RANGE(0x0fd000, 0x0fd7ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0x0fe000, 0x0fe001) AM_READ_PORT("IN0")
@@ -277,23 +277,23 @@ static ADDRESS_MAP_START( aerofgtb_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x0fe008, 0x0fe009) AM_READ_PORT("DSW2")
AM_RANGE(0x0fe008, 0x0fe00b) AM_WRITE(turbofrc_gfxbank_w)
AM_RANGE(0x0fe00e, 0x0fe00f) AM_WRITE(turbofrc_sound_command_w)
- AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
+ AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
ADDRESS_MAP_END
static ADDRESS_MAP_START( aerofgt_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
AM_RANGE(0x1a0000, 0x1a07ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
- AM_RANGE(0x1b0000, 0x1b07ff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
- AM_RANGE(0x1b0800, 0x1b0801) AM_NOP /* ??? */
- AM_RANGE(0x1b0ff0, 0x1b0fff) AM_RAM /* stack area during boot */
+ AM_RANGE(0x1b0000, 0x1b07ff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
+ AM_RANGE(0x1b0800, 0x1b0801) AM_NOP /* ??? */
+ AM_RANGE(0x1b0ff0, 0x1b0fff) AM_RAM /* stack area during boot */
AM_RANGE(0x1b2000, 0x1b3fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0x1b4000, 0x1b5fff) AM_RAM_WRITE(aerofgt_bg2videoram_w) AM_SHARE("bg2videoram")
AM_RANGE(0x1c0000, 0x1c7fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0x1d0000, 0x1d1fff) AM_RAM AM_SHARE("spriteram3")
- AM_RANGE(0xfef000, 0xffefff) AM_RAM /* work RAM */
+ AM_RANGE(0xfef000, 0xffefff) AM_RAM /* work RAM */
AM_RANGE(0xffff80, 0xffff87) AM_WRITE(aerofgt_gfxbank_w)
- AM_RANGE(0xffff88, 0xffff89) AM_WRITE(aerofgt_bg1scrolly_w) /* + something else in the top byte */
- AM_RANGE(0xffff90, 0xffff91) AM_WRITE(aerofgt_bg2scrolly_w) /* + something else in the top byte */
+ AM_RANGE(0xffff88, 0xffff89) AM_WRITE(aerofgt_bg1scrolly_w) /* + something else in the top byte */
+ AM_RANGE(0xffff90, 0xffff91) AM_WRITE(aerofgt_bg2scrolly_w) /* + something else in the top byte */
AM_RANGE(0xffffa0, 0xffffa1) AM_READ_PORT("P1")
AM_RANGE(0xffffa2, 0xffffa3) AM_READ_PORT("P2")
AM_RANGE(0xffffa4, 0xffffa5) AM_READ_PORT("SYSTEM")
@@ -306,12 +306,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( aerfboot_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
- AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
+ AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
AM_RANGE(0x0d0000, 0x0d1fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0x0d2000, 0x0d3fff) AM_RAM_WRITE(aerofgt_bg2videoram_w) AM_SHARE("bg2videoram")
AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0x0e4000, 0x0e7fff) AM_RAM AM_SHARE("spriteram2")
- AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
+ AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM //AM_SHARE("spriteram3")
AM_RANGE(0x0fd000, 0x0fd7ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0x0fe000, 0x0fe001) AM_READ_PORT("IN0")
@@ -327,7 +327,7 @@ static ADDRESS_MAP_START( aerfboot_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x0fe012, 0x0fe013) AM_WRITENOP
AM_RANGE(0x0fe400, 0x0fe401) AM_WRITENOP
AM_RANGE(0x0fe402, 0x0fe403) AM_WRITENOP
- AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
+ AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
AM_RANGE(0x100000, 0x107fff) AM_WRITENOP
AM_RANGE(0x108000, 0x10bfff) AM_RAM AM_SHARE("spriteram3")
AM_RANGE(0x10c000, 0x117fff) AM_WRITENOP
@@ -335,12 +335,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( aerfboo2_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
- AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
+ AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* work RAM */
AM_RANGE(0x0d0000, 0x0d1fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0x0d2000, 0x0d3fff) AM_RAM_WRITE(aerofgt_bg2videoram_w) AM_SHARE("bg2videoram")
AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0x0e4000, 0x0e7fff) AM_RAM AM_SHARE("spriteram2")
- AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
+ AM_RANGE(0x0f8000, 0x0fbfff) AM_RAM /* work RAM */
AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_SHARE("spriteram3")
AM_RANGE(0x0fd000, 0x0fd7ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0x0fe000, 0x0fe001) AM_READ_PORT("IN0")
@@ -358,17 +358,17 @@ static ADDRESS_MAP_START( aerfboo2_map, AS_PROGRAM, 16, aerofgt_state )
// AM_RANGE(0x0fe012, 0x0fe013) AM_WRITE(aerfboot_soundlatch_w)
AM_RANGE(0x0fe400, 0x0fe401) AM_WRITENOP // data for a crtc?
AM_RANGE(0x0fe402, 0x0fe403) AM_WRITENOP // address for a crtc?
- AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
+ AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
ADDRESS_MAP_END
static ADDRESS_MAP_START( wbbc97_map, AS_PROGRAM, 16, aerofgt_state )
AM_RANGE(0x000000, 0x3fffff) AM_ROM
- AM_RANGE(0x500000, 0x50ffff) AM_RAM /* work RAM */
+ AM_RANGE(0x500000, 0x50ffff) AM_RAM /* work RAM */
AM_RANGE(0x600000, 0x605fff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0xa00000, 0xa3ffff) AM_RAM AM_SHARE("bitmapram")
AM_RANGE(0xff8000, 0xff8fff) AM_RAM_WRITE(aerofgt_bg1videoram_w) AM_SHARE("bg1videoram")
AM_RANGE(0xffc000, 0xffc3ff) AM_WRITEONLY AM_SHARE("spriteram3")
- AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
+ AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_word_w) AM_SHARE("paletteram")
AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(pspikes_palette_bank_w)
AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
@@ -445,45 +445,45 @@ static INPUT_PORTS_START( pspikes )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW")
- PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x0001, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0002, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0004, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0008, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x000c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
- PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0010, "SW1:5" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x0020, 0x0020, "SW1:6" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0010, "SW1:5" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x0020, 0x0020, "SW1:6" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
/* According to Super Volley '91 PCB Infos, here DSW2 starts */
PORT_SERVICE_DIPLOC( 0x0100, IP_ACTIVE_LOW, "SW2:1" )
- PORT_DIPNAME( 0x0600, 0x0600, "1 Player Starting Score" ) PORT_DIPLOCATION("SW2:2,3")
+ PORT_DIPNAME( 0x0600, 0x0600, "1 Player Starting Score" ) PORT_DIPLOCATION("SW2:2,3")
PORT_DIPSETTING( 0x0600, "12-12" )
PORT_DIPSETTING( 0x0400, "11-11" )
PORT_DIPSETTING( 0x0200, "11-12" )
PORT_DIPSETTING( 0x0000, "10-12" )
- PORT_DIPNAME( 0x1800, 0x1800, "2 Players Starting Score" ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPNAME( 0x1800, 0x1800, "2 Players Starting Score" ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x1800, "9-9" )
PORT_DIPSETTING( 0x1000, "7-7" )
PORT_DIPSETTING( 0x0800, "5-5" )
PORT_DIPSETTING( 0x0000, "0-0" )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x2000, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hard ) )
/* When the players continue, only half of the time in SW2:7 is added */
- PORT_DIPNAME( 0x4000, 0x4000, "2 Players Time Per Credit" ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x4000, 0x4000, "2 Players Time Per Credit" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, "3 min" )
PORT_DIPSETTING( 0x0000, "2 min" )
/* The next one is reported as 'Must be off' in Super Volley '91 PCB Infos */
- PORT_DIPNAME( 0x8000, 0x8000, "Debug" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x8000, 0x8000, "Debug" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
@@ -519,41 +519,41 @@ static INPUT_PORTS_START( pspikesb )
PORT_START("DSW")
/* Dips bank 1 */
- PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x0001, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0002, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0004, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0008, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x000c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0010, "SW1:5" )
PORT_DIPUNUSED_DIPLOC( 0x0020, 0x0020, "SW1:6" )
- PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW1:8" )
/* Dips bank 2 */
PORT_DIPUNUSED_DIPLOC( 0x0100, 0x0100, "SW2:1" )
- PORT_DIPNAME( 0x0600, 0x0600, "1 Player Starting Score" ) PORT_DIPLOCATION("SW2:2,3")
+ PORT_DIPNAME( 0x0600, 0x0600, "1 Player Starting Score" ) PORT_DIPLOCATION("SW2:2,3")
PORT_DIPSETTING( 0x0600, "12-12" )
PORT_DIPSETTING( 0x0400, "11-11" )
PORT_DIPSETTING( 0x0200, "11-12" )
PORT_DIPSETTING( 0x0000, "10-12" )
- PORT_DIPNAME( 0x1800, 0x1800, "2 Players Starting Score" ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPNAME( 0x1800, 0x1800, "2 Players Starting Score" ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x1800, "9-9" )
PORT_DIPSETTING( 0x1000, "7-7" )
PORT_DIPSETTING( 0x0800, "5-5" )
PORT_DIPSETTING( 0x0000, "0-0" )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x2000, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x4000, 0x4000, "2 Players Time Per Credit" ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x4000, 0x4000, "2 Players Time Per Credit" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, "3 min" )
PORT_DIPSETTING( 0x0000, "2 min" )
- PORT_DIPNAME( 0x8000, 0x8000, "Debug" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x8000, 0x8000, "Debug" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
@@ -562,7 +562,7 @@ static INPUT_PORTS_START( pspikesc )
PORT_INCLUDE( pspikes )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Region ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Region ) ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x0030, DEF_STR( China ) )
PORT_DIPSETTING( 0x0020, DEF_STR( Taiwan ) )
PORT_DIPSETTING( 0x0010, DEF_STR( Hong_Kong ) )
@@ -628,7 +628,7 @@ static INPUT_PORTS_START( karatblz )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(4)
PORT_START("DSW")
- PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2, 3 and 4 */
+ PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2, 3 and 4 */
PORT_DIPSETTING( 0x0004, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0005, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0006, DEF_STR( 2C_1C ) )
@@ -637,46 +637,46 @@ static INPUT_PORTS_START( karatblz )
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x0001, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0008, 0x0008, "Continue Coin" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x0008, 0x0008, "Continue Coin" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x0008, "Start 1 Coin/Continue 1 Coin" )
PORT_DIPSETTING( 0x0000, "Start 2 Coin/Continue 1 Coin" )
- PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x0000, "1" )
PORT_DIPSETTING( 0x0010, "2" )
- PORT_DIPNAME( 0x0060, 0x0060, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6,7") /* Game Type */
- PORT_DIPSETTING( 0x0060, "2 Players" ) /* 1 Unit / 2 Players */
- PORT_DIPSETTING( 0x0040, "3 Players" ) /* 1 Unit / 3 Players */
- PORT_DIPSETTING( 0x0020, "4 Players" ) /* 1 Unit / 4 Players */
- PORT_DIPSETTING( 0x0000, "4 Players (Team)" ) /* 2 Units / 4 Players */
+ PORT_DIPNAME( 0x0060, 0x0060, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6,7") /* Game Type */
+ PORT_DIPSETTING( 0x0060, "2 Players" ) /* 1 Unit / 2 Players */
+ PORT_DIPSETTING( 0x0040, "3 Players" ) /* 1 Unit / 3 Players */
+ PORT_DIPSETTING( 0x0020, "4 Players" ) /* 1 Unit / 4 Players */
+ PORT_DIPSETTING( 0x0000, "4 Players (Team)" ) /* 2 Units / 4 Players */
/* With 4 player (Team) selected and Same Coin Slot:
- Coin A & B credit together for use by _only_ player 1 or player 2
- Coin C & D credit together for use by _only_ player 3 or player 4
- Otherwise with Individual selected, everyone is separate */
- PORT_DIPNAME( 0x0080, 0x0080, "Coin Slot" ) PORT_DIPLOCATION("SW1:8")
+ Coin A & B credit together for use by _only_ player 1 or player 2
+ Coin C & D credit together for use by _only_ player 3 or player 4
+ Otherwise with Individual selected, everyone is separate */
+ PORT_DIPNAME( 0x0080, 0x0080, "Coin Slot" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x0080, "Same" )
PORT_DIPSETTING( 0x0000, "Individual" )
/* According to Turbo Force manual, here DSW2 starts */
PORT_SERVICE_DIPLOC( 0x0100, IP_ACTIVE_LOW, "SW2:1" )
/* Default is DEF_STR( Hard ) */
- PORT_DIPNAME( 0x0600, 0x0200, "Number of Enemies" ) PORT_DIPLOCATION("SW2:2,3")
+ PORT_DIPNAME( 0x0600, 0x0200, "Number of Enemies" ) PORT_DIPLOCATION("SW2:2,3")
PORT_DIPSETTING( 0x0400, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0600, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0200, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
/* Default is DEF_STR( Hard ) */
- PORT_DIPNAME( 0x1800, 0x0800, "Strength of Enemies" ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPNAME( 0x1800, 0x0800, "Strength of Enemies" ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x1000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x1800, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0800, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
/* Listed in manual as N.C. (aka No Connection) */
- PORT_DIPNAME( 0x2000, 0x2000, "Freeze" ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x2000, 0x2000, "Freeze" ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x4000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
@@ -711,9 +711,9 @@ static INPUT_PORTS_START( spinlbrk )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW")
- PORT_DIPNAME( 0x000f, 0x000f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
- PORT_DIPSETTING( 0x000f, "1 Credit 1 Health Pack" ) /* I chose "Health Packs" as the actual value can change */
- PORT_DIPSETTING( 0x000e, "1 Credit 2 Health Packs" ) /* via dipswitch 2-7 (0x4000) see below */
+ PORT_DIPNAME( 0x000f, 0x000f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
+ PORT_DIPSETTING( 0x000f, "1 Credit 1 Health Pack" ) /* I chose "Health Packs" as the actual value can change */
+ PORT_DIPSETTING( 0x000e, "1 Credit 2 Health Packs" ) /* via dipswitch 2-7 (0x4000) see below */
PORT_DIPSETTING( 0x000d, "1 Credit 3 Health Packs" )
PORT_DIPSETTING( 0x000c, "1 Credit 4 Health Packs" )
PORT_DIPSETTING( 0x000b, "1 Credit 5 Health Packs" )
@@ -729,13 +729,13 @@ static INPUT_PORTS_START( spinlbrk )
PORT_DIPSETTING( 0x0001, "1-1-1-1C 1-1-1-2 HPs" )
PORT_DIPSETTING( 0x0000, "1-1C 1-2 HPs" )
/* The last 5 Coin/Credit selections are cycles:
- Example: 0x0004 = 2-1-1C 1-1-1 HPs:
- 2 Credits for the 1st Health Pack, 1 Credit for the 2nd Health Pack, 1 Credit
- for the 3rd Health Pack... Then back to 2 Credits again for 1 HP, then 1 credit
- and 1 credit.... on and on. With all Coin/Credit dips set to on, it's 1 Health
- Pack for odd credits, 2 Health Packs for even credits :p
- */
- PORT_DIPNAME( 0x00f0, 0x00f0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
+ Example: 0x0004 = 2-1-1C 1-1-1 HPs:
+ 2 Credits for the 1st Health Pack, 1 Credit for the 2nd Health Pack, 1 Credit
+ for the 3rd Health Pack... Then back to 2 Credits again for 1 HP, then 1 credit
+ and 1 credit.... on and on. With all Coin/Credit dips set to on, it's 1 Health
+ Pack for odd credits, 2 Health Packs for even credits :p
+ */
+ PORT_DIPNAME( 0x00f0, 0x00f0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
PORT_DIPSETTING( 0x00f0, "1 Credit 1 Health Pack" )
PORT_DIPSETTING( 0x00e0, "1 Credit 2 Health Packs" )
PORT_DIPSETTING( 0x00d0, "1 Credit 3 Health Packs" )
@@ -754,26 +754,26 @@ static INPUT_PORTS_START( spinlbrk )
PORT_DIPSETTING( 0x0000, "1-1C 1-2 HPs" )
/* According to Spinal Breakers manual, here DSW2 starts */
/* Default in US manual is DEF_STR( Hardest ) */
- PORT_DIPNAME( 0x0300, 0x0000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x0300, 0x0000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x0300, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0200, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0100, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x0400, 0x0400, "Credits For Extra Hitpoints" ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x0400, 0x0400, "Credits For Extra Hitpoints" ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
- PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x1000, 0x1000, "Lever Type" ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x1000, 0x1000, "Lever Type" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x1000, "Digital" )
- PORT_DIPSETTING( 0x0000, "Analog" ) /* This setting causes lever error??? */
+ PORT_DIPSETTING( 0x0000, "Analog" ) /* This setting causes lever error??? */
PORT_SERVICE_DIPLOC( 0x2000, IP_ACTIVE_LOW, "SW2:6" )
- PORT_DIPNAME( 0x4000, 0x4000, "Health Pack" ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x4000, 0x4000, "Health Pack" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, "32 Hitpoints" )
PORT_DIPSETTING( 0x0000, "40 Hitpoints" )
/* Default in US manual is "5 points" */
- PORT_DIPNAME( 0x8000, 0x0000, "Life Restoration" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x8000, 0x0000, "Life Restoration" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x8000, "10 Points" )
PORT_DIPSETTING( 0x0000, "5 Points" )
INPUT_PORTS_END
@@ -782,7 +782,7 @@ static INPUT_PORTS_START( spinlbrku )
PORT_INCLUDE(spinlbrk)
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x4000, 0x4000, "Health Pack" ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x4000, 0x4000, "Health Pack" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, "20 Hitpoints" )
PORT_DIPSETTING( 0x0000, "32 Hitpoints" )
INPUT_PORTS_END
@@ -796,12 +796,12 @@ static INPUT_PORTS_START( turbofrc )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* COIN1 in service */
+ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* COIN1 in service */
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE ) /* "TEST" */
+ PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE ) /* "TEST" */
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -814,7 +814,7 @@ static INPUT_PORTS_START( turbofrc )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* START1 */
+ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* START1 */
PORT_START("IN2")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(3)
@@ -827,7 +827,7 @@ static INPUT_PORTS_START( turbofrc )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START3 )
PORT_START("DSW")
- PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2 and 3 */
+ PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3") /* It affects Coin 1, 2 and 3 */
PORT_DIPSETTING( 0x0004, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0005, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0006, DEF_STR( 2C_1C ) )
@@ -836,24 +836,24 @@ static INPUT_PORTS_START( turbofrc )
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x0001, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0008, 0x0008, "Continue Coin" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x0008, 0x0008, "Continue Coin" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x0008, "Start 1 Coin/Continue 1 Coin" )
PORT_DIPSETTING( 0x0000, "Start 2 Coin/Continue 1 Coin" )
- PORT_DIPNAME( 0x0010, 0x0000, "Coin Slot" ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x0010, 0x0000, "Coin Slot" ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x0010, "Same" )
PORT_DIPSETTING( 0x0000, "Individual" )
- PORT_DIPNAME( 0x0020, 0x0000, "Play Mode" ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x0020, 0x0000, "Play Mode" ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x0020, "2 Players" )
PORT_DIPSETTING( 0x0000, "3 Players" )
- PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:8" )
/* According to Turbo Force manual, here DSW2 starts */
- PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0e00, 0x0800, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:2,3,4")
+ PORT_DIPNAME( 0x0e00, 0x0800, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:2,3,4")
PORT_DIPSETTING( 0x0e00, "1 (Easiest)")
PORT_DIPSETTING( 0x0c00, "2" )
PORT_DIPSETTING( 0x0a00, "3" )
@@ -862,15 +862,15 @@ static INPUT_PORTS_START( turbofrc )
PORT_DIPSETTING( 0x0400, "6" )
PORT_DIPSETTING( 0x0200, "7" )
PORT_DIPSETTING( 0x0000, "8 (Hardest)" )
- PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x0000, "2" )
PORT_DIPSETTING( 0x1000, "3" )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x2000, "200000" )
PORT_DIPSETTING( 0x0000, "300000" )
/* The following 2 are listed in Turbo Force manual as N.C. (aka No Connection) and "Should be kept on OFF" */
- PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW2:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
static INPUT_PORTS_START( aerofgtb )
@@ -905,10 +905,10 @@ static INPUT_PORTS_START( aerofgtb )
PORT_START("DSW1")
/* Dips bank 1 */
/* "Free Play mode: Have SW1:1-8 ON." */
- PORT_DIPNAME( 0x0001, 0x0001, "Coin Slot" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0001, 0x0001, "Coin Slot" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0001, "Same" )
PORT_DIPSETTING( 0x0000, "Individual" )
- PORT_DIPNAME( 0x000e, 0x000e, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:2,3,4")
+ PORT_DIPNAME( 0x000e, 0x000e, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:2,3,4")
PORT_DIPSETTING( 0x000a, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x000c, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x000e, DEF_STR( 1C_1C ) )
@@ -917,7 +917,7 @@ static INPUT_PORTS_START( aerofgtb )
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0070, 0x0070, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7")
+ PORT_DIPNAME( 0x0070, 0x0070, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7")
PORT_DIPSETTING( 0x0050, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0060, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0070, DEF_STR( 1C_1C ) )
@@ -926,35 +926,35 @@ static INPUT_PORTS_START( aerofgtb )
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0080, 0x0080, "Continue Coin" ) PORT_DIPLOCATION("SW1:8") /* "When ON SW1:2-7 are disabled." */
+ PORT_DIPNAME( 0x0080, 0x0080, "Continue Coin" ) PORT_DIPLOCATION("SW1:8") /* "When ON SW1:2-7 are disabled." */
PORT_DIPSETTING( 0x0080, "Start 1 Coin/Continue 1 Coin" )
PORT_DIPSETTING( 0x0000, "Start 2 Coin/Continue 1 Coin" )
/* Dips bank 2 */
- PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x0200, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x0800, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0400, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x3000, 0x3000, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x2000, "1" )
PORT_DIPSETTING( 0x1000, "2" )
PORT_DIPSETTING( 0x3000, "3" )
PORT_DIPSETTING( 0x0000, "4" )
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, "200000" )
PORT_DIPSETTING( 0x0000, "300000" )
PORT_SERVICE( 0x8000, IP_ACTIVE_LOW )
/* Dips bank 3 (not documented) */
PORT_START("DSW2")
- PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Region ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Region ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x0000, DEF_STR( Japan ) )
PORT_DIPSETTING( 0x0001, DEF_STR( Taiwan ) )
/* TODO: there are others in the table at 11910 */
@@ -994,10 +994,10 @@ static INPUT_PORTS_START( aerofgt )
PORT_START("DSW1")
/* "Free Play mode: Have SW1:1-8 ON." */
- PORT_DIPNAME( 0x0001, 0x0001, "Coin Slot" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0001, 0x0001, "Coin Slot" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0001, "Same" )
PORT_DIPSETTING( 0x0000, "Individual" )
- PORT_DIPNAME( 0x000e, 0x000e, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:2,3,4")
+ PORT_DIPNAME( 0x000e, 0x000e, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:2,3,4")
PORT_DIPSETTING( 0x000a, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x000c, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x000e, DEF_STR( 1C_1C ) )
@@ -1006,7 +1006,7 @@ static INPUT_PORTS_START( aerofgt )
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0070, 0x0070, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7")
+ PORT_DIPNAME( 0x0070, 0x0070, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7")
PORT_DIPSETTING( 0x0050, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0060, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0070, DEF_STR( 1C_1C ) )
@@ -1015,28 +1015,28 @@ static INPUT_PORTS_START( aerofgt )
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0080, 0x0080, "Continue Coin" ) PORT_DIPLOCATION("SW1:8") /* "When ON, SW1:2-7 are disabled." */
+ PORT_DIPNAME( 0x0080, 0x0080, "Continue Coin" ) PORT_DIPLOCATION("SW1:8") /* "When ON, SW1:2-7 are disabled." */
PORT_DIPSETTING( 0x0080, "Start 1 Coin/Continue 1 Coin" )
PORT_DIPSETTING( 0x0000, "Start 2 Coin/Continue 1 Coin" )
PORT_START("DSW2")
- PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x0008, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x000c, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0004, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x0020, "1" )
PORT_DIPSETTING( 0x0010, "2" )
PORT_DIPSETTING( 0x0030, "3" )
PORT_DIPSETTING( 0x0000, "4" )
- PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x0040, "200000" )
PORT_DIPSETTING( 0x0000, "300000" )
PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW2:8" )
@@ -1221,18 +1221,18 @@ static const gfx_layout wbbc97_spritelayout =
};
static GFXDECODE_START( pspikes )
- GFXDECODE_ENTRY( "gfx1", 0, pspikes_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
- GFXDECODE_ENTRY( "gfx2", 0, pspikes_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
+ GFXDECODE_ENTRY( "gfx1", 0, pspikes_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
+ GFXDECODE_ENTRY( "gfx2", 0, pspikes_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
GFXDECODE_END
static GFXDECODE_START( pspikesb )
- GFXDECODE_ENTRY( "gfx1", 0, pspikesb_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
- GFXDECODE_ENTRY( "gfx2", 0, pspikesb_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
+ GFXDECODE_ENTRY( "gfx1", 0, pspikesb_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
+ GFXDECODE_ENTRY( "gfx2", 0, pspikesb_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
GFXDECODE_END
static GFXDECODE_START( spikes91 )
- GFXDECODE_ENTRY( "gfx1", 0, pspikesb_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
- GFXDECODE_ENTRY( "gfx2", 0, spikes91_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
+ GFXDECODE_ENTRY( "gfx1", 0, pspikesb_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
+ GFXDECODE_ENTRY( "gfx2", 0, spikes91_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
GFXDECODE_END
@@ -1271,8 +1271,8 @@ static GFXDECODE_START( aerfboo2 )
GFXDECODE_END
static GFXDECODE_START( wbbc97 )
- GFXDECODE_ENTRY( "gfx1", 0, pspikes_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
- GFXDECODE_ENTRY( "gfx2", 0, wbbc97_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
+ GFXDECODE_ENTRY( "gfx1", 0, pspikes_charlayout, 0, 64 ) /* colors 0-1023 in 8 banks */
+ GFXDECODE_ENTRY( "gfx2", 0, wbbc97_spritelayout, 1024, 64 ) /* colors 1024-2047 in 4 banks */
GFXDECODE_END
static void irqhandler( device_t *device, int irq )
@@ -1288,7 +1288,7 @@ static const ym2610_interface ym2610_config =
static const ym3812_interface ym3812_config =
{
- irqhandler /* IRQ Line */
+ irqhandler /* IRQ Line */
};
@@ -1317,7 +1317,7 @@ MACHINE_RESET_MEMBER(aerofgt_state,aerofgt)
{
MACHINE_RESET_CALL_MEMBER(common);
- machine().root_device().membank("bank1")->set_entry(0); /* needed by spinlbrk */
+ machine().root_device().membank("bank1")->set_entry(0); /* needed by spinlbrk */
}
static MACHINE_CONFIG_START( pspikes, aerofgt_state )
@@ -1367,7 +1367,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( spikes91, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(spikes91_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* all irq vectors are the same */
@@ -1391,17 +1391,17 @@ static MACHINE_CONFIG_START( spikes91, aerofgt_state )
/* sound hardware */
/* the sound hardware is completely different on this:
- 1x YM2151 (sound)(ic150)
- 1x OKI M5205 (sound)(ic145)
- 2x LM324N (sound)(ic152, ic153)
- */
+ 1x YM2151 (sound)(ic150)
+ 1x OKI M5205 (sound)(ic145)
+ 2x LM324N (sound)(ic152, ic153)
+ */
MACHINE_CONFIG_END
static MACHINE_CONFIG_START( pspikesb, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(pspikesb_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* all irq vectors are the same */
@@ -1431,7 +1431,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( pspikesc, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(pspikesc_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* all irq vectors are the same */
@@ -1465,7 +1465,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( karatblz, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(karatblz_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)
@@ -1511,11 +1511,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( spinlbrk, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,XTAL_20MHz/2) /* verified on pcb */
+ MCFG_CPU_ADD("maincpu",M68000,XTAL_20MHz/2) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(spinlbrk_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* there are vectors for 3 and 4 too */
- MCFG_CPU_ADD("audiocpu",Z80,XTAL_20MHz/4) /* 5mhz verified on pcb */
+ MCFG_CPU_ADD("audiocpu",Z80,XTAL_20MHz/4) /* 5mhz verified on pcb */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(turbofrc_sound_portmap)
/* IRQs are triggered by the YM2610 */
@@ -1547,7 +1547,7 @@ static MACHINE_CONFIG_START( spinlbrk, aerofgt_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
- MCFG_SOUND_ADD("ymsnd", YM2610, XTAL_8MHz) /* verified on pcb */
+ MCFG_SOUND_ADD("ymsnd", YM2610, XTAL_8MHz) /* verified on pcb */
MCFG_SOUND_CONFIG(ym2610_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 0.25)
MCFG_SOUND_ROUTE(0, "rspeaker", 0.25)
@@ -1558,11 +1558,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( turbofrc, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,XTAL_20MHz/2) /* verified on pcb */
+ MCFG_CPU_ADD("maincpu",M68000,XTAL_20MHz/2) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(turbofrc_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* all irq vectors are the same */
- MCFG_CPU_ADD("audiocpu",Z80,XTAL_5MHz) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu",Z80,XTAL_5MHz) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(turbofrc_sound_portmap)
/* IRQs are triggered by the YM2610 */
@@ -1593,7 +1593,7 @@ static MACHINE_CONFIG_START( turbofrc, aerofgt_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
- MCFG_SOUND_ADD("ymsnd", YM2610, XTAL_8MHz) /* verified on pcb */
+ MCFG_SOUND_ADD("ymsnd", YM2610, XTAL_8MHz) /* verified on pcb */
MCFG_SOUND_CONFIG(ym2610_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 0.25)
MCFG_SOUND_ROUTE(0, "rspeaker", 0.25)
@@ -1604,7 +1604,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( aerofgtb, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(aerofgtb_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* all irq vectors are the same */
@@ -1651,7 +1651,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( aerofgt, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,XTAL_20MHz/2) /* verified on pcb */
+ MCFG_CPU_ADD("maincpu",M68000,XTAL_20MHz/2) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(aerofgt_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* all irq vectors are the same */
@@ -1684,7 +1684,7 @@ static MACHINE_CONFIG_START( aerofgt, aerofgt_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
- MCFG_SOUND_ADD("ymsnd", YM2610, XTAL_8MHz) /* verified on pcb */
+ MCFG_SOUND_ADD("ymsnd", YM2610, XTAL_8MHz) /* verified on pcb */
MCFG_SOUND_CONFIG(ym2610_config)
MCFG_SOUND_ROUTE(0, "lspeaker", 0.25)
MCFG_SOUND_ROUTE(0, "rspeaker", 0.25)
@@ -1695,7 +1695,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( aerfboot, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(aerfboot_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)
@@ -1729,7 +1729,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( aerfboo2, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(aerfboo2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq2_line_hold)
@@ -1760,7 +1760,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( wbbc97, aerofgt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
+ MCFG_CPU_ADD("maincpu",M68000,20000000/2) /* 10 MHz (?) */
MCFG_CPU_PROGRAM_MAP(wbbc97_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aerofgt_state, irq1_line_hold)/* all irq vectors are the same */
@@ -1807,10 +1807,10 @@ MACHINE_CONFIG_END
***************************************************************************/
ROM_START( pspikes )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "pspikes2.bin", 0x00000, 0x40000, CRC(ec0c070e) SHA1(4ddcc184e835a2f9d15f01aaa03734fd75fe797e) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "19", 0x00000, 0x20000, CRC(7e8ed6e5) SHA1(eeb1a1e1989fad8fc1e741928422efaec0598868) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -1832,10 +1832,10 @@ ROM_START( pspikes )
ROM_END
ROM_START( pspikesk )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "20", 0x00000, 0x40000, CRC(75cdcee2) SHA1(272a08c46c1d0989f9fbb156e28e6a7ffa9c0a53) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "19", 0x00000, 0x20000, CRC(7e8ed6e5) SHA1(eeb1a1e1989fad8fc1e741928422efaec0598868) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -1858,10 +1858,10 @@ ROM_START( pspikesk )
ROM_END
ROM_START( svolly91 )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "u11.jpn", 0x00000, 0x40000, CRC(ea2e4c82) SHA1(f9cf9122499d9b1e54221fb8b6ef9c12004ca85e) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "19", 0x00000, 0x20000, CRC(7e8ed6e5) SHA1(eeb1a1e1989fad8fc1e741928422efaec0598868) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -1880,7 +1880,7 @@ ROM_START( svolly91 )
ROM_END
ROM_START( pspikesb )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "2.ic63", 0x00000, 0x20000, CRC(d25e184c) SHA1(89ad275b03d909a7d16d2927df3ddf12301e4c60) )
ROM_LOAD16_BYTE( "3.ic62", 0x00001, 0x20000, CRC(5add1a34) SHA1(e166d5c76f2f087254f2af442f49251a9885f5bc) )
@@ -1963,7 +1963,7 @@ original game
*/
ROM_START( spikes91 )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "7.ic2", 0x00001, 0x20000, CRC(41e38d7e) SHA1(d0c226a8b61a2311c781ed5747d78b8dbddbc7ef) )
ROM_LOAD16_BYTE( "8.ic3", 0x00000, 0x20000, CRC(9c488daa) SHA1(8336fec855786c6cc6a836d86b74e130d60013b7) )
@@ -1994,7 +1994,7 @@ ROM_END
/* this is a bootleg / chinese hack of power spikes */
ROM_START( pspikesc )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "27c010.1", 0x00000, 0x20000, CRC(06a6ed73) SHA1(05bffe8766131a8729115244ed499ecdd872962a) )
ROM_LOAD16_BYTE( "27c010.2", 0x00001, 0x20000, CRC(ff31474e) SHA1(f21d44c15aeffd19e8c7fac49d6b9b239bd41c1b) )
@@ -2022,13 +2022,13 @@ ROM_START( pspikesc )
ROM_END
ROM_START( spinlbrk )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "ic98", 0x00000, 0x10000, CRC(36c2bf70) SHA1(f627d0e7dad1760bcc95af4a6346050a1a277048) )
ROM_LOAD16_BYTE( "ic104", 0x00001, 0x10000, CRC(34a7e158) SHA1(5884570c1be38bfedffca3fd38089d0ae3391d4f) )
ROM_LOAD16_BYTE( "ic93", 0x20000, 0x10000, CRC(726f4683) SHA1(65aff0548333571d47a96d4bf5a7857f12399cc7) )
ROM_LOAD16_BYTE( "ic94", 0x20001, 0x10000, CRC(c4385e03) SHA1(6683eed812fa8a5430125b14e8647f8e9024bbdd) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "ic117", 0x00000, 0x08000, CRC(625ada41) SHA1(2dd0674c68ea382431115c155afbf880f5b9deb2) )
ROM_LOAD( "ic118", 0x10000, 0x10000, CRC(1025f024) SHA1(3e497c74c950d2cd2a0931cf2ae9b0124d11ca6a) )
@@ -2039,7 +2039,7 @@ ROM_START( spinlbrk )
ROM_REGION( 0x200000, "gfx2", 0 )
ROM_LOAD( "ic17", 0x000000, 0x80000, CRC(a63d5a55) SHA1(a942651a206a2abe4f60f0717e1d5d8e89b993d4) )
ROM_LOAD( "ic11", 0x080000, 0x80000, CRC(7dcc913d) SHA1(527bae5020581d1ac322ea25c8e0994d54bbc051) )
- ROM_LOAD( "ic16", 0x100000, 0x80000, CRC(0d84af7f) SHA1(07356ee61c84c4c4ccb49c8dfe8c468990580041) ) //FIRST AND SECOND HALF IDENTICAL
+ ROM_LOAD( "ic16", 0x100000, 0x80000, CRC(0d84af7f) SHA1(07356ee61c84c4c4ccb49c8dfe8c468990580041) ) //FIRST AND SECOND HALF IDENTICAL
ROM_REGION( 0x100000, "gfx3", 0 )
ROM_LOAD( "ic12", 0x000000, 0x80000, CRC(d63fac4e) SHA1(bb96d2e41334d136b9208dbe7e88a45e3bbc6542) )
@@ -2051,7 +2051,7 @@ ROM_START( spinlbrk )
ROM_LOAD( "ic35", 0x100000, 0x80000, CRC(eba8e1a3) SHA1(976ef30437df9aba6fa6d5cd11728476f34eb05b) )
ROM_LOAD( "ic40", 0x180000, 0x80000, CRC(5ef5aa7e) SHA1(8d4b0f2348c536c6781c8ba25722301673aca289) )
- ROM_REGION16_BE( 0x24000, "gfx5", 0 ) /* hardcoded sprite maps */
+ ROM_REGION16_BE( 0x24000, "gfx5", 0 ) /* hardcoded sprite maps */
ROM_LOAD16_BYTE( "ic19", 0x00000, 0x10000, CRC(db24eeaa) SHA1(300dd1ce81dd258b265bc3a64b8542ed152ed2cf) )
ROM_LOAD16_BYTE( "ic13", 0x00001, 0x10000, CRC(97025bf4) SHA1(0519f0c94f3d417bf8ff0124a3a137035a4013dc) )
/* 20000-23fff empty space, filled in vh_startup */
@@ -2060,25 +2060,25 @@ ROM_START( spinlbrk )
ROM_REGION( 0x100000, "ymsnd", 0 ) /* sound samples */
ROM_LOAD( "ic166", 0x000000, 0x80000, CRC(6e0d063a) SHA1(313983e69f9625814de033fef7f6e9564694117a) )
- ROM_LOAD( "ic163", 0x080000, 0x80000, CRC(e6621dfb) SHA1(85ee77c4720b7eb20ecf293c16b3105c8dcb1114) ) //FIRST AND SECOND HALF IDENTICAL
+ ROM_LOAD( "ic163", 0x080000, 0x80000, CRC(e6621dfb) SHA1(85ee77c4720b7eb20ecf293c16b3105c8dcb1114) ) //FIRST AND SECOND HALF IDENTICAL
ROM_REGION( 0x0c00, "plds", 0 )
- ROM_LOAD( "epl16p8bp.ic133", 0x0000, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic127", 0x0200, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic99", 0x0400, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic100", 0x0600, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "gal16v8a.ic95", 0x0800, 0x0117, NO_DUMP ) /* read protected */
- ROM_LOAD( "gal16v8a.ic114", 0x0a00, 0x0117, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic133", 0x0000, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic127", 0x0200, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic99", 0x0400, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic100", 0x0600, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "gal16v8a.ic95", 0x0800, 0x0117, NO_DUMP ) /* read protected */
+ ROM_LOAD( "gal16v8a.ic114", 0x0a00, 0x0117, NO_DUMP ) /* read protected */
ROM_END
ROM_START( spinlbrku )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "ic98.u5", 0x00000, 0x10000, CRC(3a0f7667) SHA1(55d5fa1a325c17532ed83d231032bdbe9fb84d85) )
ROM_LOAD16_BYTE( "ic104.u6",0x00001, 0x10000, CRC(a0e0af31) SHA1(21f6c3246bb7be2fd926324fd6d041e319a4e214) )
ROM_LOAD16_BYTE( "ic93.u4", 0x20000, 0x10000, CRC(0cf73029) SHA1(e1346b759a41f9eec9536dc90671778582e595b4) )
ROM_LOAD16_BYTE( "ic94.u3", 0x20001, 0x10000, CRC(5cf7c426) SHA1(b201da40c4511d2845004dff72d36adbb8a4fab9) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "ic117", 0x00000, 0x08000, CRC(625ada41) SHA1(2dd0674c68ea382431115c155afbf880f5b9deb2) )
ROM_LOAD( "ic118", 0x10000, 0x10000, CRC(1025f024) SHA1(3e497c74c950d2cd2a0931cf2ae9b0124d11ca6a) )
@@ -2089,7 +2089,7 @@ ROM_START( spinlbrku )
ROM_REGION( 0x200000, "gfx2", 0 )
ROM_LOAD( "ic17", 0x000000, 0x80000, CRC(a63d5a55) SHA1(a942651a206a2abe4f60f0717e1d5d8e89b993d4) )
ROM_LOAD( "ic11", 0x080000, 0x80000, CRC(7dcc913d) SHA1(527bae5020581d1ac322ea25c8e0994d54bbc051) )
- ROM_LOAD( "ic16", 0x100000, 0x80000, CRC(0d84af7f) SHA1(07356ee61c84c4c4ccb49c8dfe8c468990580041) ) //FIRST AND SECOND HALF IDENTICAL
+ ROM_LOAD( "ic16", 0x100000, 0x80000, CRC(0d84af7f) SHA1(07356ee61c84c4c4ccb49c8dfe8c468990580041) ) //FIRST AND SECOND HALF IDENTICAL
ROM_REGION( 0x100000, "gfx3", 0 )
ROM_LOAD( "ic12", 0x000000, 0x80000, CRC(d63fac4e) SHA1(bb96d2e41334d136b9208dbe7e88a45e3bbc6542) )
@@ -2101,7 +2101,7 @@ ROM_START( spinlbrku )
ROM_LOAD( "ic35", 0x100000, 0x80000, CRC(eba8e1a3) SHA1(976ef30437df9aba6fa6d5cd11728476f34eb05b) )
ROM_LOAD( "ic40", 0x180000, 0x80000, CRC(5ef5aa7e) SHA1(8d4b0f2348c536c6781c8ba25722301673aca289) )
- ROM_REGION16_BE( 0x24000, "gfx5", 0 ) /* hardcoded sprite maps */
+ ROM_REGION16_BE( 0x24000, "gfx5", 0 ) /* hardcoded sprite maps */
ROM_LOAD16_BYTE( "ic19", 0x00000, 0x10000, CRC(db24eeaa) SHA1(300dd1ce81dd258b265bc3a64b8542ed152ed2cf) )
ROM_LOAD16_BYTE( "ic13", 0x00001, 0x10000, CRC(97025bf4) SHA1(0519f0c94f3d417bf8ff0124a3a137035a4013dc) )
/* 20000-23fff empty space, filled in vh_startup */
@@ -2110,25 +2110,25 @@ ROM_START( spinlbrku )
ROM_REGION( 0x100000, "ymsnd", 0 ) /* sound samples */
ROM_LOAD( "ic166", 0x000000, 0x80000, CRC(6e0d063a) SHA1(313983e69f9625814de033fef7f6e9564694117a) )
- ROM_LOAD( "ic163", 0x080000, 0x80000, CRC(e6621dfb) SHA1(85ee77c4720b7eb20ecf293c16b3105c8dcb1114) ) //FIRST AND SECOND HALF IDENTICAL
+ ROM_LOAD( "ic163", 0x080000, 0x80000, CRC(e6621dfb) SHA1(85ee77c4720b7eb20ecf293c16b3105c8dcb1114) ) //FIRST AND SECOND HALF IDENTICAL
ROM_REGION( 0x0c00, "plds", 0 )
- ROM_LOAD( "epl16p8bp.ic133", 0x0000, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic127", 0x0200, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic99", 0x0400, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic100", 0x0600, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "gal16v8a.ic95", 0x0800, 0x0117, NO_DUMP ) /* read protected */
- ROM_LOAD( "gal16v8a.ic114", 0x0a00, 0x0117, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic133", 0x0000, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic127", 0x0200, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic99", 0x0400, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic100", 0x0600, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "gal16v8a.ic95", 0x0800, 0x0117, NO_DUMP ) /* read protected */
+ ROM_LOAD( "gal16v8a.ic114", 0x0a00, 0x0117, NO_DUMP ) /* read protected */
ROM_END
ROM_START( spinlbrkj )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "j5", 0x00000, 0x10000, CRC(6a3d690e) SHA1(4ac1985ea0a73b8fc12105ff75121718595dd171) )
ROM_LOAD16_BYTE( "j6", 0x00001, 0x10000, CRC(869593fa) SHA1(5821b011d42113f247bd100cecf140bbfc1e969c) )
ROM_LOAD16_BYTE( "j4", 0x20000, 0x10000, CRC(33e33912) SHA1(d6d052cd8dbedfd254bdf5e82ad770e4bf241777) )
ROM_LOAD16_BYTE( "j3", 0x20001, 0x10000, CRC(16ca61d0) SHA1(5d99a1261251412c3c758af751997fe31026c0d6) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "ic117", 0x00000, 0x08000, CRC(625ada41) SHA1(2dd0674c68ea382431115c155afbf880f5b9deb2) )
ROM_LOAD( "ic118", 0x10000, 0x10000, CRC(1025f024) SHA1(3e497c74c950d2cd2a0931cf2ae9b0124d11ca6a) )
@@ -2139,7 +2139,7 @@ ROM_START( spinlbrkj )
ROM_REGION( 0x200000, "gfx2", 0 )
ROM_LOAD( "ic17", 0x000000, 0x80000, CRC(a63d5a55) SHA1(a942651a206a2abe4f60f0717e1d5d8e89b993d4) )
ROM_LOAD( "ic11", 0x080000, 0x80000, CRC(7dcc913d) SHA1(527bae5020581d1ac322ea25c8e0994d54bbc051) )
- ROM_LOAD( "ic16", 0x100000, 0x80000, CRC(0d84af7f) SHA1(07356ee61c84c4c4ccb49c8dfe8c468990580041) ) //FIRST AND SECOND HALF IDENTICAL
+ ROM_LOAD( "ic16", 0x100000, 0x80000, CRC(0d84af7f) SHA1(07356ee61c84c4c4ccb49c8dfe8c468990580041) ) //FIRST AND SECOND HALF IDENTICAL
ROM_REGION( 0x100000, "gfx3", 0 )
ROM_LOAD( "ic12", 0x000000, 0x80000, CRC(d63fac4e) SHA1(bb96d2e41334d136b9208dbe7e88a45e3bbc6542) )
@@ -2151,7 +2151,7 @@ ROM_START( spinlbrkj )
ROM_LOAD( "ic35", 0x100000, 0x80000, CRC(eba8e1a3) SHA1(976ef30437df9aba6fa6d5cd11728476f34eb05b) )
ROM_LOAD( "ic40", 0x180000, 0x80000, CRC(5ef5aa7e) SHA1(8d4b0f2348c536c6781c8ba25722301673aca289) )
- ROM_REGION16_BE( 0x24000, "gfx5", 0 ) /* hardcoded sprite maps */
+ ROM_REGION16_BE( 0x24000, "gfx5", 0 ) /* hardcoded sprite maps */
ROM_LOAD16_BYTE( "ic19", 0x00000, 0x10000, CRC(db24eeaa) SHA1(300dd1ce81dd258b265bc3a64b8542ed152ed2cf) )
ROM_LOAD16_BYTE( "ic13", 0x00001, 0x10000, CRC(97025bf4) SHA1(0519f0c94f3d417bf8ff0124a3a137035a4013dc) )
/* 20000-23fff empty space, filled in vh_startup */
@@ -2160,23 +2160,23 @@ ROM_START( spinlbrkj )
ROM_REGION( 0x100000, "ymsnd", 0 ) /* sound samples */
ROM_LOAD( "ic166", 0x000000, 0x80000, CRC(6e0d063a) SHA1(313983e69f9625814de033fef7f6e9564694117a) )
- ROM_LOAD( "ic163", 0x080000, 0x80000, CRC(e6621dfb) SHA1(85ee77c4720b7eb20ecf293c16b3105c8dcb1114) ) //FIRST AND SECOND HALF IDENTICAL
+ ROM_LOAD( "ic163", 0x080000, 0x80000, CRC(e6621dfb) SHA1(85ee77c4720b7eb20ecf293c16b3105c8dcb1114) ) //FIRST AND SECOND HALF IDENTICAL
ROM_REGION( 0x0c00, "plds", 0 )
- ROM_LOAD( "epl16p8bp.ic133", 0x0000, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic127", 0x0200, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic99", 0x0400, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "epl16p8bp.ic100", 0x0600, 0x0107, NO_DUMP ) /* read protected */
- ROM_LOAD( "gal16v8a.ic95", 0x0800, 0x0117, NO_DUMP ) /* read protected */
- ROM_LOAD( "gal16v8a.ic114", 0x0a00, 0x0117, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic133", 0x0000, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic127", 0x0200, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic99", 0x0400, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "epl16p8bp.ic100", 0x0600, 0x0107, NO_DUMP ) /* read protected */
+ ROM_LOAD( "gal16v8a.ic95", 0x0800, 0x0117, NO_DUMP ) /* read protected */
+ ROM_LOAD( "gal16v8a.ic114", 0x0a00, 0x0117, NO_DUMP ) /* read protected */
ROM_END
ROM_START( karatblz )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "rom2v3", 0x00000, 0x40000, CRC(01f772e1) SHA1(f87f19a82d75839b5671f23ce14218d7b910eabc) )
ROM_LOAD16_WORD_SWAP( "1.u15", 0x40000, 0x40000, CRC(d16ee21b) SHA1(d454cdf22b72a537b9d7ae73deb8136a4f09da47) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "5.u92", 0x00000, 0x20000, CRC(97d67510) SHA1(1ffd419e3dec7de1099cd5819b0309f7dd0df80e) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -2204,11 +2204,11 @@ ROM_START( karatblz )
ROM_END
ROM_START( karatblzu )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "2.u14", 0x00000, 0x40000, CRC(202e6220) SHA1(2605511a0574cbc39fdf3d8ae27a0aa9b43345fb) )
ROM_LOAD16_WORD_SWAP( "1.u15", 0x40000, 0x40000, CRC(d16ee21b) SHA1(d454cdf22b72a537b9d7ae73deb8136a4f09da47) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "5.u92", 0x00000, 0x20000, CRC(97d67510) SHA1(1ffd419e3dec7de1099cd5819b0309f7dd0df80e) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -2240,7 +2240,7 @@ ROM_START( karatblzj )
ROM_LOAD16_WORD_SWAP( "2tecmo.u14", 0x00000, 0x40000, CRC(57e52654) SHA1(15939d8f7c693b9248f3dd2b2ad5fbae2c19621f) )
ROM_LOAD16_WORD_SWAP( "1.u15", 0x40000, 0x40000, CRC(d16ee21b) SHA1(d454cdf22b72a537b9d7ae73deb8136a4f09da47) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "5.u92", 0x00000, 0x20000, CRC(97d67510) SHA1(1ffd419e3dec7de1099cd5819b0309f7dd0df80e) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -2268,12 +2268,12 @@ ROM_START( karatblzj )
ROM_END
ROM_START( turbofrc )
- ROM_REGION( 0xc0000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0xc0000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "tfrc2.bin", 0x00000, 0x40000, CRC(721300ee) SHA1(79ab32fdfd377592a0bdbd1c4794cfd529a3eb7b) )
ROM_LOAD16_WORD_SWAP( "tfrc1.bin", 0x40000, 0x40000, CRC(6cd5312b) SHA1(57b109fe268fb963e981c91b6d288667a3c9a665) )
ROM_LOAD16_WORD_SWAP( "tfrc3.bin", 0x80000, 0x40000, CRC(63f50557) SHA1(f8dba8c9ba412c9a67457ec31a804c57593ab20b) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "tfrcu166.bin", 0x00000, 0x20000, CRC(2ca14a65) SHA1(95f6e7b4fa7ca26872ff472d7e6fb75fd4f281d5) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -2303,10 +2303,10 @@ ROM_START( turbofrc )
ROM_END
ROM_START( aerofgt )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "1.u4", 0x00000, 0x80000, CRC(6fdff0a2) SHA1(7cc9529b426091027aa3e23586cb7d162376c0ff) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "2.153", 0x00000, 0x20000, CRC(a1ef64ec) SHA1(fa3e434738bf4e742ad68882c1e914100ce0f761) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -2326,11 +2326,11 @@ ROM_START( aerofgt )
ROM_END
ROM_START( aerofgtb )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "v2", 0x00000, 0x40000, CRC(5c9de9f0) SHA1(93b62c59f0bc052c6fdbd5aae292a7ab2122dfd1) )
ROM_LOAD16_BYTE( "v1", 0x00001, 0x40000, CRC(89c1dcf4) SHA1(41401d63049c140e4254dc791022d85c44271390) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "v3", 0x00000, 0x20000, CRC(cbb18cf4) SHA1(7119a7536cf710660ff06d1e7d2879c79ef12b3d) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -2356,11 +2356,11 @@ ROM_START( aerofgtb )
ROM_END
ROM_START( aerofgtc )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "v2.149", 0x00000, 0x40000, CRC(f187aec6) SHA1(8905af34f114ae22fbfbd3ae115f19280bdd4fb3) )
ROM_LOAD16_BYTE( "v1.111", 0x00001, 0x40000, CRC(9e684b19) SHA1(b5e1e5b74ed9fd223c9315ee2d548e620224c102) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
ROM_LOAD( "2.153", 0x00000, 0x20000, CRC(a1ef64ec) SHA1(fa3e434738bf4e742ad68882c1e914100ce0f761) )
ROM_RELOAD( 0x10000, 0x20000 )
@@ -2387,12 +2387,12 @@ ROM_START( aerofgtc )
ROM_END
ROM_START( sonicwi )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "2.149", 0x00000, 0x40000, CRC(3d1b96ba) SHA1(941be323c0cb15e05c92b897984617b05c5cf676) )
ROM_LOAD16_BYTE( "1.111", 0x00001, 0x40000, CRC(a3d09f94) SHA1(a1064d659488878f5303edc2b8636312ab632a83) )
- ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
- ROM_LOAD( "2.153", 0x00000, 0x20000, CRC(a1ef64ec) SHA1(fa3e434738bf4e742ad68882c1e914100ce0f761) ) // 3.156
+ ROM_REGION( 0x30000, "audiocpu", 0 ) /* 64k for the audio CPU + banks */
+ ROM_LOAD( "2.153", 0x00000, 0x20000, CRC(a1ef64ec) SHA1(fa3e434738bf4e742ad68882c1e914100ce0f761) ) // 3.156
ROM_RELOAD( 0x10000, 0x20000 )
/* gfx ROMs were missing in this set, I'm using the aerofgtb ones */
@@ -2418,7 +2418,7 @@ ROM_START( sonicwi )
ROM_END
ROM_START( aerfboot )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "afb_ep2.u3", 0x00000, 0x40000, CRC(2bb9edf7) SHA1(cf0a62070fc0803dd8c473c375f6a2d1884ba2bf) )
ROM_LOAD16_BYTE( "afb_ep3.u2", 0x00001, 0x40000, CRC(475d3df3) SHA1(58bde24e9dea2fb0d7ae4f2a574b06bc1a33a13d) )
@@ -2445,7 +2445,7 @@ ROM_START( aerfboot )
ROM_END
ROM_START( aerfboo2 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "p2", 0x00000, 0x40000, CRC(6c4ec09b) SHA1(cdfb8c59ddd6360487fee017d5093636aa52c5c2) )
ROM_LOAD16_BYTE( "p1", 0x00001, 0x40000, CRC(841c513a) SHA1(819e634f0aec29b1863c9cf0118cc33154d10037) )
@@ -2469,7 +2469,7 @@ ROM_START( aerfboo2 )
ROM_END
ROM_START( wbbc97 )
- ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x400000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "03.27c040.ur4.rom", 0x000001, 0x80000, CRC(fb4e48fc) SHA1(cffc75766a9b867ab73597156142aa7c70bf6f20) )
ROM_LOAD16_BYTE( "07.27c040.uo4.rom", 0x000000, 0x80000, CRC(87605dcc) SHA1(c5d05e7c581e02f88fd42c65768f5c8632e571a1) )
ROM_LOAD16_BYTE( "04.27c4000.ur4a.rom",0x100001, 0x80000, CRC(2dd6ff07) SHA1(54724f49d4ca1db16a799704a9e023f6ee407fee) )
@@ -2479,19 +2479,19 @@ ROM_START( wbbc97 )
ROM_LOAD16_BYTE( "06.27c4000.ur4c.rom",0x300001, 0x80000, CRC(b22d11c4) SHA1(15d2ba97704bbcf9d851b650a9c56a6a668cfe63) )
ROM_LOAD16_BYTE( "10.27c040.uo4c.rom", 0x300000, 0x80000, CRC(fe403e8b) SHA1(5f8202792d9ec3e0404637614277c0375c747f7e) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* z80 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* z80 code */
ROM_LOAD( "02.27c512.su11.rom", 0x000000, 0x10000, CRC(f03178e9) SHA1(5b0abee03059109a3cdb08a9341091255d5cb6ae) )
- ROM_REGION( 0x40000, "gfx1", 0 ) /* GFX */
+ ROM_REGION( 0x40000, "gfx1", 0 ) /* GFX */
ROM_LOAD( "15.27c020.uu10.rom", 0x000000, 0x40000, CRC(965bc99e) SHA1(db72121cfbcd6916f46ac5bd3592681eafa4e5da) )
- ROM_REGION( 0x100000, "gfx2", 0 ) /* GFX */
+ ROM_REGION( 0x100000, "gfx2", 0 ) /* GFX */
ROM_LOAD( "11.27c020.ue12.rom", 0x000000, 0x40000, CRC(a0b23c8a) SHA1(85ccc5dcc891a352b90f0f3d89f6115bc52face6) )
ROM_LOAD( "12.27c020.ue11.rom", 0x040000, 0x40000, CRC(4e529623) SHA1(b3e1e1ba5e05f7e095c0409f199c89b81297cf40) )
ROM_LOAD( "13.27c020.ue10.rom", 0x080000, 0x40000, CRC(3745f892) SHA1(085986dff9639dedaee3bcecca17a6ea7e4a45f4) )
ROM_LOAD( "14.27c020.ue9.rom", 0x0c0000, 0x40000, CRC(2814f4d2) SHA1(bf459b9ff160d0f18d74224d5e0729b8120261e6) )
- ROM_REGION( 0x40000, "oki", 0 ) /* OKIM6295 samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* OKIM6295 samples */
ROM_LOAD( "01.27c020.su10.rom", 0x000000, 0x40000, CRC(c024e48c) SHA1(d3caedd22044c1645d96301a93f794db3ff77047) )
ROM_REGION( 0x200, "user1", 0 ) /* ??? */
@@ -2525,4 +2525,3 @@ GAME( 1992, aerofgtc, aerofgt, aerofgtb, aerofgtb, driver_device, 0, ROT270, "V
GAME( 1992, sonicwi, aerofgt, aerofgtb, aerofgtb, driver_device, 0, ROT270, "Video System Co.", "Sonic Wings (Japan)", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL )
GAME( 1992, aerfboot, aerofgt, aerfboot, aerofgtb, driver_device, 0, ROT270, "bootleg", "Aero Fighters (bootleg set 1)", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND )
GAME( 1992, aerfboo2, aerofgt, aerfboo2, aerofgtb, driver_device, 0, ROT270, "bootleg", "Aero Fighters (bootleg set 2)", GAME_SUPPORTS_SAVE | GAME_NO_COCKTAIL | GAME_IMPERFECT_SOUND )
-
diff --git a/src/mame/drivers/airbustr.c b/src/mame/drivers/airbustr.c
index 9a888b49e5c..c6a613b3099 100644
--- a/src/mame/drivers/airbustr.c
+++ b/src/mame/drivers/airbustr.c
@@ -232,25 +232,25 @@ READ8_MEMBER(airbustr_state::devram_r)
switch (offset)
{
/* Reading efe0 probably resets a watchdog mechanism
- that would reset the main cpu. We avoid this and patch
- the rom instead (main cpu has to be reset once at startup) */
+ that would reset the main cpu. We avoid this and patch
+ the rom instead (main cpu has to be reset once at startup) */
case 0xfe0:
return watchdog_reset_r(space, 0);
/* Reading a word at eff2 probably yelds the product
- of the words written to eff0 and eff2 */
+ of the words written to eff0 and eff2 */
case 0xff2:
case 0xff3:
{
- int x = (m_devram[0xff0] + m_devram[0xff1] * 256) * (m_devram[0xff2] + m_devram[0xff3] * 256);
+ int x = (m_devram[0xff0] + m_devram[0xff1] * 256) * (m_devram[0xff2] + m_devram[0xff3] * 256);
if (offset == 0xff2)
return (x & 0x00ff) >> 0;
else
return (x & 0xff00) >> 8;
- } break;
+ } break;
/* Reading eff4, F0 times must yield at most 80-1 consecutive
- equal values */
+ equal values */
case 0xff4:
return machine().rand();
@@ -294,27 +294,27 @@ READ8_MEMBER(airbustr_state::soundcommand_status_r)
READ8_MEMBER(airbustr_state::soundcommand_r)
{
- m_soundlatch_status = 0; // soundlatch has been read
+ m_soundlatch_status = 0; // soundlatch has been read
return soundlatch_byte_r(space, 0);
}
READ8_MEMBER(airbustr_state::soundcommand2_r)
{
- m_soundlatch2_status = 0; // soundlatch2 has been read
+ m_soundlatch2_status = 0; // soundlatch2 has been read
return soundlatch2_byte_r(space, 0);
}
WRITE8_MEMBER(airbustr_state::soundcommand_w)
{
soundlatch_byte_w(space, 0, data);
- m_soundlatch_status = 1; // soundlatch has been written
- m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); // cause a nmi to sub cpu
+ m_soundlatch_status = 1; // soundlatch has been written
+ m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE); // cause a nmi to sub cpu
}
WRITE8_MEMBER(airbustr_state::soundcommand2_w)
{
soundlatch2_byte_w(space, 0, data);
- m_soundlatch2_status = 1; // soundlatch2 has been written
+ m_soundlatch2_status = 1; // soundlatch2 has been written
}
WRITE8_MEMBER(airbustr_state::airbustr_paletteram_w)
@@ -427,52 +427,52 @@ static INPUT_PORTS_START( airbustr )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // used
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // used
PORT_START("DSW1")
PORT_DIPUNUSED_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW1:1" )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW1:3" )
- PORT_DIPNAME( 0x08, 0x08, "Coin Mode" ) PORT_DIPLOCATION("SW1:4")
- PORT_DIPSETTING( 0x08, "Mode 1" ) // routine at 0x056d: 11 21 12 16 (bit 3 active)
- PORT_DIPSETTING( 0x00, "Mode 2" ) // 11 21 13 14 (bit 3 not active)
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6")
- PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
- PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
- PORT_DIPSETTING( 0x10, DEF_STR( 1C_3C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8")
- PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
- PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
- PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
- PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPNAME( 0x08, 0x08, "Coin Mode" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPSETTING( 0x08, "Mode 1" ) // routine at 0x056d: 11 21 12 16 (bit 3 active)
+ PORT_DIPSETTING( 0x00, "Mode 2" ) // 11 21 13 14 (bit 3 not active)
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x10, DEF_STR( 1C_3C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) ) PORT_CONDITION("DSW1", 0x08, NOTEQUALS, 0x00)
+ PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_4C ) ) PORT_CONDITION("DSW1", 0x08, EQUALS, 0x00)
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x01, DEF_STR( Difficult ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
PORT_DIPUNUSED_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW2:3" )
- PORT_DIPNAME( 0x08, 0x08, "Freeze" ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x08, 0x08, "Freeze" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x10, "5" )
PORT_DIPSETTING( 0x00, "7" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW2:8" )
@@ -483,12 +483,12 @@ static INPUT_PORTS_START( airbustrj )
PORT_MODIFY("DSW1")
PORT_DIPUNUSED_DIPLOC( 0x08, IP_ACTIVE_LOW, "SW1:4" )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6") // routine at 0x0546 : 11 12 21 23
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6") // routine at 0x0546 : 11 12 21 23
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8")
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
@@ -504,9 +504,9 @@ static const gfx_layout tile_gfxlayout =
4,
{ 0, 1, 2, 3 },
{ 1*4, 0*4, 3*4, 2*4, 5*4, 4*4, 7*4, 6*4,
- 1*4+32*8, 0*4+32*8, 3*4+32*8, 2*4+32*8, 5*4+32*8, 4*4+32*8, 7*4+32*8, 6*4+32*8 },
+ 1*4+32*8, 0*4+32*8, 3*4+32*8, 2*4+32*8, 5*4+32*8, 4*4+32*8, 7*4+32*8, 6*4+32*8 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
- 0*32+64*8, 1*32+64*8, 2*32+64*8, 3*32+64*8, 4*32+64*8, 5*32+64*8, 6*32+64*8, 7*32+64*8 },
+ 0*32+64*8, 1*32+64*8, 2*32+64*8, 3*32+64*8, 4*32+64*8, 5*32+64*8, 6*32+64*8, 7*32+64*8 },
16*16*4
};
@@ -517,9 +517,9 @@ static const gfx_layout sprite_gfxlayout =
4,
{ 0, 1, 2, 3 },
{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4,
- 0*4+32*8, 1*4+32*8, 2*4+32*8, 3*4+32*8, 4*4+32*8, 5*4+32*8, 6*4+32*8, 7*4+32*8 },
+ 0*4+32*8, 1*4+32*8, 2*4+32*8, 3*4+32*8, 4*4+32*8, 5*4+32*8, 6*4+32*8, 7*4+32*8 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
- 0*32+64*8, 1*32+64*8, 2*32+64*8, 3*32+64*8, 4*32+64*8, 5*32+64*8, 6*32+64*8, 7*32+64*8 },
+ 0*32+64*8, 1*32+64*8, 2*32+64*8, 3*32+64*8, 4*32+64*8, 5*32+64*8, 6*32+64*8, 7*32+64*8 },
16*16*4
};
@@ -537,8 +537,8 @@ static const ym2203_interface ym2203_config =
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
- DEVCB_INPUT_PORT("DSW1"), // DSW-1 connected to port A
- DEVCB_INPUT_PORT("DSW2"), // DSW-2 connected to port B
+ DEVCB_INPUT_PORT("DSW1"), // DSW-1 connected to port A
+ DEVCB_INPUT_PORT("DSW2"), // DSW-2 connected to port B
DEVCB_NULL,
DEVCB_NULL
},
@@ -614,32 +614,32 @@ void airbustr_state::machine_reset()
static const kaneko_pandora_interface airbustr_pandora_config =
{
- "screen", /* screen tag */
- 1, /* gfx_region */
- 0, 0 /* x_offs, y_offs */
+ "screen", /* screen tag */
+ 1, /* gfx_region */
+ 0, 0 /* x_offs, y_offs */
};
static MACHINE_CONFIG_START( airbustr, airbustr_state )
/* basic machine hardware */
- MCFG_CPU_ADD("master", Z80, 6000000) // ???
+ MCFG_CPU_ADD("master", Z80, 6000000) // ???
MCFG_CPU_PROGRAM_MAP(master_map)
MCFG_CPU_IO_MAP(master_io_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", airbustr_state, airbustr_scanline, "screen", 0, 1)
- MCFG_CPU_ADD("slave", Z80, 6000000) // ???
+ MCFG_CPU_ADD("slave", Z80, 6000000) // ???
MCFG_CPU_PROGRAM_MAP(slave_map)
MCFG_CPU_IO_MAP(slave_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", airbustr_state, slave_interrupt) /* nmi signal from master cpu */
- MCFG_CPU_ADD("audiocpu", Z80, 6000000) // ???
+ MCFG_CPU_ADD("audiocpu", Z80, 6000000) // ???
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_io_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", airbustr_state, irq0_line_hold) // nmi are caused by sub cpu writing a sound command
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", airbustr_state, irq0_line_hold) // nmi are caused by sub cpu writing a sound command
- MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // Palette RAM is filled by sub cpu with data supplied by main cpu
+ MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // Palette RAM is filled by sub cpu with data supplied by main cpu
// Maybe a high value is safer in order to avoid glitches
- MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -700,7 +700,7 @@ ROM_START( airbustr )
ROM_LOAD( "pr-001.bin", 0x00000, 0x80000, CRC(7e6cb377) SHA1(005290f9f53a0c3a6a9d04486b16b7fd52cc94b6) ) // sprites
ROM_LOAD( "pr-02.bin", 0x80000, 0x10000, CRC(6bbd5e46) SHA1(26563737f3f91ee0a056d35ce42217bb57d8a081) )
- ROM_REGION( 0x40000, "oki", 0 ) /* OKI-M6295 samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* OKI-M6295 samples */
ROM_LOAD( "pr-200.bin", 0x00000, 0x40000, CRC(a4dd3390) SHA1(2d72b46b4979857f6b66489bebda9f48799f59cf) )
ROM_END
@@ -727,7 +727,7 @@ ROM_START( airbustrj )
ROM_LOAD( "pr-001.bin", 0x000000, 0x80000, CRC(7e6cb377) SHA1(005290f9f53a0c3a6a9d04486b16b7fd52cc94b6) ) // sprites
ROM_LOAD( "pr-02.bin", 0x080000, 0x10000, CRC(6bbd5e46) SHA1(26563737f3f91ee0a056d35ce42217bb57d8a081) )
- ROM_REGION( 0x40000, "oki", 0 ) /* OKI-M6295 samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* OKI-M6295 samples */
ROM_LOAD( "pr-200.bin", 0x00000, 0x40000, CRC(a4dd3390) SHA1(2d72b46b4979857f6b66489bebda9f48799f59cf) )
ROM_END
@@ -773,7 +773,7 @@ ROM_START( airbustrb )
ROM_LOAD( "14.bin", 0x80000, 0x10000, CRC(6bbd5e46) SHA1(26563737f3f91ee0a056d35ce42217bb57d8a081) )
- ROM_REGION( 0x40000, "oki", 0 ) /* OKI-M6295 samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* OKI-M6295 samples */
/* Same content as airbusj, pr-200.bin, different sized roms */
ROM_LOAD( "4.bin", 0x00000, 0x20000, CRC(21d9bfe3) SHA1(4a69458cd2a6309e389c9e7593ae29d3ef0f8daf) )
ROM_LOAD( "3.bin", 0x20000, 0x20000, CRC(58cd19e2) SHA1(479f22241bf29f7af67d9679fc6c20f10004fdd8) )
@@ -789,6 +789,6 @@ DRIVER_INIT_MEMBER(airbustr_state,airbustr)
/* Game Drivers */
-GAME( 1990, airbustr, 0, airbustr, airbustr, airbustr_state, airbustr, ROT0, "Kaneko (Namco license)", "Air Buster: Trouble Specialty Raid Unit (World)", GAME_SUPPORTS_SAVE ) // 891220
+GAME( 1990, airbustr, 0, airbustr, airbustr, airbustr_state, airbustr, ROT0, "Kaneko (Namco license)", "Air Buster: Trouble Specialty Raid Unit (World)", GAME_SUPPORTS_SAVE ) // 891220
GAME( 1990, airbustrj, airbustr, airbustr, airbustrj, airbustr_state,airbustr, ROT0, "Kaneko (Namco license)", "Air Buster: Trouble Specialty Raid Unit (Japan)", GAME_SUPPORTS_SAVE) // 891229
-GAME( 1990, airbustrb, airbustr, airbustrb,airbustrj, driver_device,0, ROT0, "bootleg", "Air Buster: Trouble Specialty Raid Unit (bootleg)", GAME_SUPPORTS_SAVE) // based on Japan set (891229)
+GAME( 1990, airbustrb, airbustr, airbustrb,airbustrj, driver_device,0, ROT0, "bootleg", "Air Buster: Trouble Specialty Raid Unit (bootleg)", GAME_SUPPORTS_SAVE) // based on Japan set (891229)
diff --git a/src/mame/drivers/ajax.c b/src/mame/drivers/ajax.c
index 9a5263cbd65..02efffea9fa 100644
--- a/src/mame/drivers/ajax.c
+++ b/src/mame/drivers/ajax.c
@@ -26,37 +26,37 @@
/****************************************************************************/
static ADDRESS_MAP_START( ajax_main_map, AS_PROGRAM, 8, ajax_state )
- AM_RANGE(0x0000, 0x01c0) AM_READWRITE(ajax_ls138_f10_r, ajax_ls138_f10_w) /* bankswitch + sound command + FIRQ command */
- AM_RANGE(0x0800, 0x0807) AM_DEVREADWRITE_LEGACY("k051960", k051937_r, k051937_w) /* sprite control registers */
- AM_RANGE(0x0c00, 0x0fff) AM_DEVREADWRITE_LEGACY("k051960", k051960_r, k051960_w) /* sprite RAM 2128SL at J7 */
+ AM_RANGE(0x0000, 0x01c0) AM_READWRITE(ajax_ls138_f10_r, ajax_ls138_f10_w) /* bankswitch + sound command + FIRQ command */
+ AM_RANGE(0x0800, 0x0807) AM_DEVREADWRITE_LEGACY("k051960", k051937_r, k051937_w) /* sprite control registers */
+ AM_RANGE(0x0c00, 0x0fff) AM_DEVREADWRITE_LEGACY("k051960", k051960_r, k051960_w) /* sprite RAM 2128SL at J7 */
AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_byte_be_w) AM_SHARE("paletteram")/* palette */
- AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("share1") /* shared RAM with the 6809 */
- AM_RANGE(0x4000, 0x5fff) AM_RAM /* RAM 6264L at K10 */
- AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank2") /* banked ROM */
- AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM N11 */
+ AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("share1") /* shared RAM with the 6809 */
+ AM_RANGE(0x4000, 0x5fff) AM_RAM /* RAM 6264L at K10 */
+ AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank2") /* banked ROM */
+ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM N11 */
ADDRESS_MAP_END
static ADDRESS_MAP_START( ajax_sub_map, AS_PROGRAM, 8, ajax_state )
- AM_RANGE(0x0000, 0x07ff) AM_DEVREADWRITE_LEGACY("k051316", k051316_r, k051316_w) /* 051316 zoom/rotation layer */
- AM_RANGE(0x0800, 0x080f) AM_DEVWRITE_LEGACY("k051316", k051316_ctrl_w) /* 051316 control registers */
- AM_RANGE(0x1000, 0x17ff) AM_DEVREAD_LEGACY("k051316", k051316_rom_r) /* 051316 (ROM test) */
- AM_RANGE(0x1800, 0x1800) AM_WRITE(ajax_bankswitch_2_w) /* bankswitch control */
- AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("share1") /* shared RAM with the 052001 */
- AM_RANGE(0x4000, 0x7fff) AM_DEVREADWRITE_LEGACY("k052109", k052109_r, k052109_w) /* video RAM + color RAM + video registers */
- AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1") /* banked ROM */
- AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM I16 */
+ AM_RANGE(0x0000, 0x07ff) AM_DEVREADWRITE_LEGACY("k051316", k051316_r, k051316_w) /* 051316 zoom/rotation layer */
+ AM_RANGE(0x0800, 0x080f) AM_DEVWRITE_LEGACY("k051316", k051316_ctrl_w) /* 051316 control registers */
+ AM_RANGE(0x1000, 0x17ff) AM_DEVREAD_LEGACY("k051316", k051316_rom_r) /* 051316 (ROM test) */
+ AM_RANGE(0x1800, 0x1800) AM_WRITE(ajax_bankswitch_2_w) /* bankswitch control */
+ AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("share1") /* shared RAM with the 052001 */
+ AM_RANGE(0x4000, 0x7fff) AM_DEVREADWRITE_LEGACY("k052109", k052109_r, k052109_w) /* video RAM + color RAM + video registers */
+ AM_RANGE(0x8000, 0x9fff) AM_ROMBANK("bank1") /* banked ROM */
+ AM_RANGE(0xa000, 0xffff) AM_ROM /* ROM I16 */
ADDRESS_MAP_END
static ADDRESS_MAP_START( ajax_sound_map, AS_PROGRAM, 8, ajax_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM F6 */
- AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM 2128SL at D16 */
- AM_RANGE(0x9000, 0x9000) AM_WRITE(sound_bank_w) /* 007232 bankswitch */
- AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE_LEGACY("k007232_1", k007232_r, k007232_w) /* 007232 registers (chip 1) */
- AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE_LEGACY("k007232_2", k007232_r, k007232_w) /* 007232 registers (chip 2) */
- AM_RANGE(0xb80c, 0xb80c) AM_WRITE(k007232_extvol_w) /* extra volume, goes to the 007232 w/ A11 */
+ AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM F6 */
+ AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM 2128SL at D16 */
+ AM_RANGE(0x9000, 0x9000) AM_WRITE(sound_bank_w) /* 007232 bankswitch */
+ AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE_LEGACY("k007232_1", k007232_r, k007232_w) /* 007232 registers (chip 1) */
+ AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE_LEGACY("k007232_2", k007232_r, k007232_w) /* 007232 registers (chip 2) */
+ AM_RANGE(0xb80c, 0xb80c) AM_WRITE(k007232_extvol_w) /* extra volume, goes to the 007232 w/ A11 */
/* selecting a different latch for the external port */
- AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) /* YM2151 */
- AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
+ AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) /* YM2151 */
+ AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
ADDRESS_MAP_END
@@ -66,45 +66,45 @@ static INPUT_PORTS_START( ajax )
/* "No Coin B" = coins produce sound, but no effect on coin counter */
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
- PORT_DIPSETTING( 0x03, "2" )
- PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x01, "5" )
- PORT_DIPSETTING( 0x00, "7" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4,5")
- PORT_DIPSETTING( 0x18, "30000 150000" )
- PORT_DIPSETTING( 0x10, "50000 200000" )
- PORT_DIPSETTING( 0x08, "30000" )
- PORT_DIPSETTING( 0x00, "50000" )
- PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
- PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPSETTING( 0x03, "2" )
+ PORT_DIPSETTING( 0x02, "3" )
+ PORT_DIPSETTING( 0x01, "5" )
+ PORT_DIPSETTING( 0x00, "7" )
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPSETTING( 0x18, "30000 150000" )
+ PORT_DIPSETTING( 0x10, "50000 200000" )
+ PORT_DIPSETTING( 0x08, "30000" )
+ PORT_DIPSETTING( 0x00, "50000" )
+ PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
+ PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW3")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
- PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Upright Controls" ) PORT_DIPLOCATION("SW3:2") // Listed as "unused" and forced to be off in the manual. (US) // "Normal Upright / Upright Double" (JP)
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x02, 0x02, "Upright Controls" ) PORT_DIPLOCATION("SW3:2") // Listed as "unused" and forced to be off in the manual. (US) // "Normal Upright / Upright Double" (JP)
PORT_DIPSETTING( 0x02, DEF_STR( Single ) )
PORT_DIPSETTING( 0x00, DEF_STR( Dual ) )
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW3:3" )
- PORT_DIPNAME( 0x08, 0x08, "Control in 3D Stages" ) PORT_DIPLOCATION("SW3:4") // The manual make reference to "general control"
- PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
- PORT_DIPSETTING( 0x00, "Inverted" )
+ PORT_DIPNAME( 0x08, 0x08, "Control in 3D Stages" ) PORT_DIPLOCATION("SW3:4") // The manual make reference to "general control"
+ PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0x00, "Inverted" )
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("SYSTEM") /* COINSW & START */
+ PORT_START("SYSTEM") /* COINSW & START */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) /* service */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 ) /* service */
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -208,14 +208,14 @@ static const k051316_interface ajax_k051316_intf =
static MACHINE_CONFIG_START( ajax, ajax_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", KONAMI, 3000000) /* 12/4 MHz*/
+ MCFG_CPU_ADD("maincpu", KONAMI, 3000000) /* 12/4 MHz*/
MCFG_CPU_PROGRAM_MAP(ajax_main_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", ajax_state, ajax_interrupt) /* IRQs triggered by the 051960 */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", ajax_state, ajax_interrupt) /* IRQs triggered by the 051960 */
- MCFG_CPU_ADD("sub", M6809, 3000000) /* ? */
+ MCFG_CPU_ADD("sub", M6809, 3000000) /* ? */
MCFG_CPU_PROGRAM_MAP(ajax_sub_map)
- MCFG_CPU_ADD("audiocpu", Z80, 3579545) /* 3.58 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80, 3579545) /* 3.58 MHz */
MCFG_CPU_PROGRAM_MAP(ajax_sound_map)
MCFG_QUANTUM_TIME(attotime::from_hz(600))
@@ -271,141 +271,141 @@ MACHINE_CONFIG_END
*/
ROM_START( ajax )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* 052001 code */
- ROM_LOAD( "770_m01.n11", 0x10000, 0x08000, CRC(4a64e53a) SHA1(acd249bfcb5f248c41b3e40c7c1bce1b8c645d3a) ) /* banked ROM */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
- ROM_LOAD( "770_l02.n12", 0x18000, 0x10000, CRC(ad7d592b) SHA1(c75d9696b16de231c479379dd02d33fe54021d88) ) /* banked ROM */
-
- ROM_REGION( 0x22000, "sub", 0 ) /* 64k + 72k for banked ROMs */
- ROM_LOAD( "770_l05.i16", 0x20000, 0x02000, CRC(ed64fbb2) SHA1(429046edaf1299afa7fb9c385b4ef0c244ec2409) ) /* banked ROM */
- ROM_CONTINUE( 0x0a000, 0x06000 ) /* fixed ROM */
- ROM_LOAD( "770_f04.g16", 0x10000, 0x10000, CRC(e0e4ec9c) SHA1(15ae09c3ad67ec626d8178ec1417f0c57ca4eca4) ) /* banked ROM */
-
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
- ROM_LOAD( "770_h03.f16", 0x00000, 0x08000, CRC(2ffd2afc) SHA1(ca2ef684f87bcf9b70b3ec66ec80685edaf04b9b) )
-
- ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD16_BYTE( "770c13-a.f3", 0x000000, 0x010000, CRC(4ef6fff2) SHA1(0a2953f6907738b795d96184329431539386a463) )
- ROM_LOAD16_BYTE( "770c13-c.f4", 0x000001, 0x010000, CRC(97ffbab6) SHA1(97d9a39600eed918e12908a9abed0d4161c20ef6) )
- ROM_LOAD16_BYTE( "770c13-b.e3", 0x020000, 0x010000, CRC(86fdd706) SHA1(334c2720fc35aa556c6c5850d32f9bc9a6800fba) )
- ROM_LOAD16_BYTE( "770c13-d.e4", 0x020001, 0x010000, CRC(7d7acb2d) SHA1(3797743edf99201de928246e22e65ad17afe62f8) )
- ROM_LOAD16_BYTE( "770c12-a.f5", 0x040000, 0x010000, CRC(6c0ade68) SHA1(35e4548a37e19210c767ef2ed4c514dbde6806c2) )
- ROM_LOAD16_BYTE( "770c12-c.f6", 0x040001, 0x010000, CRC(61fc39cc) SHA1(34d0342ec0878590c289a66b39bde121cfadf00f) )
- ROM_LOAD16_BYTE( "770c12-b.e5", 0x060000, 0x010000, CRC(5f221cc6) SHA1(9a7a9c7853a3b582c4034b773cef08aee5391d6e) )
- ROM_LOAD16_BYTE( "770c12-d.e6", 0x060001, 0x010000, CRC(f1edb2f4) SHA1(3e66cc711e25cbf6e6a747d43a9efec0710d5b7a) )
-
- ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD16_BYTE( "770c09-a.f8", 0x000000, 0x010000, CRC(76690fb8) SHA1(afe267a37b65d63d3765dc3b88d8a8262446f786) )
- ROM_LOAD16_BYTE( "770c09-e.f9", 0x000001, 0x010000, CRC(17b482c9) SHA1(3535197956f5bf5b564fec1ddbb3e3ea3bf1f7bd) )
- ROM_LOAD16_BYTE( "770c09-b.e8", 0x020000, 0x010000, CRC(cd1709d1) SHA1(5a835639eb2d75adcfd0103b0800dd74b2bf9503) )
- ROM_LOAD16_BYTE( "770c09-f.e9", 0x020001, 0x010000, CRC(cba4b47e) SHA1(6ecb6283de4aa5ef8441db62b19200397f7734b3) )
- ROM_LOAD16_BYTE( "770c09-c.d8", 0x040000, 0x010000, CRC(bfd080b8) SHA1(83e186e08f442167e66575305930fa93f838faa6) )
- ROM_LOAD16_BYTE( "770c09-g.d9", 0x040001, 0x010000, CRC(77d58ea0) SHA1(8647c6920032e010b71ba4bc966ef6e1fd0a58a8) )
- ROM_LOAD16_BYTE( "770c09-d.c8", 0x060000, 0x010000, CRC(6f955600) SHA1(6f85adb633a670c8540b1e86d4bb6640829e74da) )
- ROM_LOAD16_BYTE( "770c09-h.c9", 0x060001, 0x010000, CRC(494a9090) SHA1(decd4442c206d1cd8f7741f2499aa3264b247d06) )
- ROM_LOAD16_BYTE( "770c08-a.f10", 0x080000, 0x010000, CRC(efd29a56) SHA1(2a9f138d1242a35162a3f092b0343dff899e3b83) )
- ROM_LOAD16_BYTE( "770c08-e.f11", 0x080001, 0x010000, CRC(6d43afde) SHA1(03d16125e7d082df08cd5e52a6694a1ddb765e4f) )
- ROM_LOAD16_BYTE( "770c08-b.e10", 0x0a0000, 0x010000, CRC(f3374014) SHA1(613c91e02fbf577668ea558c1893b845962368dd) )
- ROM_LOAD16_BYTE( "770c08-f.e11", 0x0a0001, 0x010000, CRC(f5ba59aa) SHA1(b65ea2ec20c2e9fa2e0dfe4c38d3d4f0b7160a97) )
- ROM_LOAD16_BYTE( "770c08-c.d10", 0x0c0000, 0x010000, CRC(28e7088f) SHA1(45c53a58bc6d2e70d5d20d5e6d58ec3e5bea3eeb) )
- ROM_LOAD16_BYTE( "770c08-g.d11", 0x0c0001, 0x010000, CRC(17da8f6d) SHA1(ba1d33d44cd50ff5d5a15b23d1a6153bc7b09579) )
- ROM_LOAD16_BYTE( "770c08-d.c10", 0x0e0000, 0x010000, CRC(91591777) SHA1(53f416a51f7075f070168bced7b6f925f54c7b84) )
- ROM_LOAD16_BYTE( "770c08-h.c11", 0x0e0001, 0x010000, CRC(d97d4b15) SHA1(e3d7d7adeec8c8c808acb9f84641fd3a6bf249be) )
-
- ROM_REGION( 0x080000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "770c06", 0x000000, 0x040000, CRC(d0c592ee) SHA1(c1be73dd259f2779d715659b177e47513776a0d4) ) /* zoom/rotate (F4) */
- ROM_LOAD( "770c07", 0x040000, 0x040000, CRC(0b399fb1) SHA1(fbe26f9aa9a655d08bebcdd79719d35134ca4dd5) ) /* zoom/rotate (H4) */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* 052001 code */
+ ROM_LOAD( "770_m01.n11", 0x10000, 0x08000, CRC(4a64e53a) SHA1(acd249bfcb5f248c41b3e40c7c1bce1b8c645d3a) ) /* banked ROM */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
+ ROM_LOAD( "770_l02.n12", 0x18000, 0x10000, CRC(ad7d592b) SHA1(c75d9696b16de231c479379dd02d33fe54021d88) ) /* banked ROM */
+
+ ROM_REGION( 0x22000, "sub", 0 ) /* 64k + 72k for banked ROMs */
+ ROM_LOAD( "770_l05.i16", 0x20000, 0x02000, CRC(ed64fbb2) SHA1(429046edaf1299afa7fb9c385b4ef0c244ec2409) ) /* banked ROM */
+ ROM_CONTINUE( 0x0a000, 0x06000 ) /* fixed ROM */
+ ROM_LOAD( "770_f04.g16", 0x10000, 0x10000, CRC(e0e4ec9c) SHA1(15ae09c3ad67ec626d8178ec1417f0c57ca4eca4) ) /* banked ROM */
+
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
+ ROM_LOAD( "770_h03.f16", 0x00000, 0x08000, CRC(2ffd2afc) SHA1(ca2ef684f87bcf9b70b3ec66ec80685edaf04b9b) )
+
+ ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD16_BYTE( "770c13-a.f3", 0x000000, 0x010000, CRC(4ef6fff2) SHA1(0a2953f6907738b795d96184329431539386a463) )
+ ROM_LOAD16_BYTE( "770c13-c.f4", 0x000001, 0x010000, CRC(97ffbab6) SHA1(97d9a39600eed918e12908a9abed0d4161c20ef6) )
+ ROM_LOAD16_BYTE( "770c13-b.e3", 0x020000, 0x010000, CRC(86fdd706) SHA1(334c2720fc35aa556c6c5850d32f9bc9a6800fba) )
+ ROM_LOAD16_BYTE( "770c13-d.e4", 0x020001, 0x010000, CRC(7d7acb2d) SHA1(3797743edf99201de928246e22e65ad17afe62f8) )
+ ROM_LOAD16_BYTE( "770c12-a.f5", 0x040000, 0x010000, CRC(6c0ade68) SHA1(35e4548a37e19210c767ef2ed4c514dbde6806c2) )
+ ROM_LOAD16_BYTE( "770c12-c.f6", 0x040001, 0x010000, CRC(61fc39cc) SHA1(34d0342ec0878590c289a66b39bde121cfadf00f) )
+ ROM_LOAD16_BYTE( "770c12-b.e5", 0x060000, 0x010000, CRC(5f221cc6) SHA1(9a7a9c7853a3b582c4034b773cef08aee5391d6e) )
+ ROM_LOAD16_BYTE( "770c12-d.e6", 0x060001, 0x010000, CRC(f1edb2f4) SHA1(3e66cc711e25cbf6e6a747d43a9efec0710d5b7a) )
+
+ ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD16_BYTE( "770c09-a.f8", 0x000000, 0x010000, CRC(76690fb8) SHA1(afe267a37b65d63d3765dc3b88d8a8262446f786) )
+ ROM_LOAD16_BYTE( "770c09-e.f9", 0x000001, 0x010000, CRC(17b482c9) SHA1(3535197956f5bf5b564fec1ddbb3e3ea3bf1f7bd) )
+ ROM_LOAD16_BYTE( "770c09-b.e8", 0x020000, 0x010000, CRC(cd1709d1) SHA1(5a835639eb2d75adcfd0103b0800dd74b2bf9503) )
+ ROM_LOAD16_BYTE( "770c09-f.e9", 0x020001, 0x010000, CRC(cba4b47e) SHA1(6ecb6283de4aa5ef8441db62b19200397f7734b3) )
+ ROM_LOAD16_BYTE( "770c09-c.d8", 0x040000, 0x010000, CRC(bfd080b8) SHA1(83e186e08f442167e66575305930fa93f838faa6) )
+ ROM_LOAD16_BYTE( "770c09-g.d9", 0x040001, 0x010000, CRC(77d58ea0) SHA1(8647c6920032e010b71ba4bc966ef6e1fd0a58a8) )
+ ROM_LOAD16_BYTE( "770c09-d.c8", 0x060000, 0x010000, CRC(6f955600) SHA1(6f85adb633a670c8540b1e86d4bb6640829e74da) )
+ ROM_LOAD16_BYTE( "770c09-h.c9", 0x060001, 0x010000, CRC(494a9090) SHA1(decd4442c206d1cd8f7741f2499aa3264b247d06) )
+ ROM_LOAD16_BYTE( "770c08-a.f10", 0x080000, 0x010000, CRC(efd29a56) SHA1(2a9f138d1242a35162a3f092b0343dff899e3b83) )
+ ROM_LOAD16_BYTE( "770c08-e.f11", 0x080001, 0x010000, CRC(6d43afde) SHA1(03d16125e7d082df08cd5e52a6694a1ddb765e4f) )
+ ROM_LOAD16_BYTE( "770c08-b.e10", 0x0a0000, 0x010000, CRC(f3374014) SHA1(613c91e02fbf577668ea558c1893b845962368dd) )
+ ROM_LOAD16_BYTE( "770c08-f.e11", 0x0a0001, 0x010000, CRC(f5ba59aa) SHA1(b65ea2ec20c2e9fa2e0dfe4c38d3d4f0b7160a97) )
+ ROM_LOAD16_BYTE( "770c08-c.d10", 0x0c0000, 0x010000, CRC(28e7088f) SHA1(45c53a58bc6d2e70d5d20d5e6d58ec3e5bea3eeb) )
+ ROM_LOAD16_BYTE( "770c08-g.d11", 0x0c0001, 0x010000, CRC(17da8f6d) SHA1(ba1d33d44cd50ff5d5a15b23d1a6153bc7b09579) )
+ ROM_LOAD16_BYTE( "770c08-d.c10", 0x0e0000, 0x010000, CRC(91591777) SHA1(53f416a51f7075f070168bced7b6f925f54c7b84) )
+ ROM_LOAD16_BYTE( "770c08-h.c11", 0x0e0001, 0x010000, CRC(d97d4b15) SHA1(e3d7d7adeec8c8c808acb9f84641fd3a6bf249be) )
+
+ ROM_REGION( 0x080000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "770c06", 0x000000, 0x040000, CRC(d0c592ee) SHA1(c1be73dd259f2779d715659b177e47513776a0d4) ) /* zoom/rotate (F4) */
+ ROM_LOAD( "770c07", 0x040000, 0x040000, CRC(0b399fb1) SHA1(fbe26f9aa9a655d08bebcdd79719d35134ca4dd5) ) /* zoom/rotate (H4) */
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "63s241.j11", 0x0000, 0x0200, CRC(9bdd719f) SHA1(de98e562080a97714047a8ad17abc6662c188897) ) /* priority encoder (not used) */
-
- ROM_REGION( 0x040000, "k007232_1", 0 ) /* 007232 data (chip 1) */
- ROM_LOAD( "770c10-a.a7", 0x000000, 0x010000, CRC(e45ec094) SHA1(540c56e1d778e6082db23aa3da64f6179b1f3635) )
- ROM_LOAD( "770c10-b.a6", 0x010000, 0x010000, CRC(349db7d3) SHA1(210da067038abeb021a77b3bf2664c9a49b3410a) )
- ROM_LOAD( "770c10-c.a5", 0x020000, 0x010000, CRC(71cb1f05) SHA1(57399806746b659f52114fb7bd4e11a7992a2c5d) )
- ROM_LOAD( "770c10-d.a4", 0x030000, 0x010000, CRC(e8ab1844) SHA1(dc22c4d11d6396a051398ba9ec6380aa3f856e71) )
-
- ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
- ROM_LOAD( "770c11-a.c6", 0x000000, 0x010000, CRC(8cccd9e0) SHA1(73e50a896ed212462046b7bfa04aad5e266425ca) )
- ROM_LOAD( "770c11-b.c5", 0x010000, 0x010000, CRC(0af2fedd) SHA1(038189210a73f668a0d913ff2dfc4ffa2e6bd5f4) )
- ROM_LOAD( "770c11-c.c4", 0x020000, 0x010000, CRC(7471f24a) SHA1(04d7a69ddc01017a773485fa891711d94c8ad47c) )
- ROM_LOAD( "770c11-d.c3", 0x030000, 0x010000, CRC(a58be323) SHA1(0401ede130cf9a529469bfb3dbcc8aee68e53243) )
- ROM_LOAD( "770c11-e.b7", 0x040000, 0x010000, CRC(dd553541) SHA1(96f36cb7b696f465005c7e7f1e4373b98a337864) )
- ROM_LOAD( "770c11-f.b6", 0x050000, 0x010000, CRC(3f78bd0f) SHA1(1d445c2b6460d6aac6f2acf0d5a5d73c31ba52e0) )
- ROM_LOAD( "770c11-g.b5", 0x060000, 0x010000, CRC(078c51b2) SHA1(6ad7ae8cda62023a286f5b4ac393ea0d02d20aeb) )
- ROM_LOAD( "770c11-h.b4", 0x070000, 0x010000, CRC(7300c2e1) SHA1(f9d23074701fb2127aed45d7cff91cc1cf8ce717) )
+ ROM_LOAD( "63s241.j11", 0x0000, 0x0200, CRC(9bdd719f) SHA1(de98e562080a97714047a8ad17abc6662c188897) ) /* priority encoder (not used) */
+
+ ROM_REGION( 0x040000, "k007232_1", 0 ) /* 007232 data (chip 1) */
+ ROM_LOAD( "770c10-a.a7", 0x000000, 0x010000, CRC(e45ec094) SHA1(540c56e1d778e6082db23aa3da64f6179b1f3635) )
+ ROM_LOAD( "770c10-b.a6", 0x010000, 0x010000, CRC(349db7d3) SHA1(210da067038abeb021a77b3bf2664c9a49b3410a) )
+ ROM_LOAD( "770c10-c.a5", 0x020000, 0x010000, CRC(71cb1f05) SHA1(57399806746b659f52114fb7bd4e11a7992a2c5d) )
+ ROM_LOAD( "770c10-d.a4", 0x030000, 0x010000, CRC(e8ab1844) SHA1(dc22c4d11d6396a051398ba9ec6380aa3f856e71) )
+
+ ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
+ ROM_LOAD( "770c11-a.c6", 0x000000, 0x010000, CRC(8cccd9e0) SHA1(73e50a896ed212462046b7bfa04aad5e266425ca) )
+ ROM_LOAD( "770c11-b.c5", 0x010000, 0x010000, CRC(0af2fedd) SHA1(038189210a73f668a0d913ff2dfc4ffa2e6bd5f4) )
+ ROM_LOAD( "770c11-c.c4", 0x020000, 0x010000, CRC(7471f24a) SHA1(04d7a69ddc01017a773485fa891711d94c8ad47c) )
+ ROM_LOAD( "770c11-d.c3", 0x030000, 0x010000, CRC(a58be323) SHA1(0401ede130cf9a529469bfb3dbcc8aee68e53243) )
+ ROM_LOAD( "770c11-e.b7", 0x040000, 0x010000, CRC(dd553541) SHA1(96f36cb7b696f465005c7e7f1e4373b98a337864) )
+ ROM_LOAD( "770c11-f.b6", 0x050000, 0x010000, CRC(3f78bd0f) SHA1(1d445c2b6460d6aac6f2acf0d5a5d73c31ba52e0) )
+ ROM_LOAD( "770c11-g.b5", 0x060000, 0x010000, CRC(078c51b2) SHA1(6ad7ae8cda62023a286f5b4ac393ea0d02d20aeb) )
+ ROM_LOAD( "770c11-h.b4", 0x070000, 0x010000, CRC(7300c2e1) SHA1(f9d23074701fb2127aed45d7cff91cc1cf8ce717) )
ROM_END
ROM_START( typhoon )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* 052001 code */
- ROM_LOAD( "770_k01.n11", 0x10000, 0x08000, CRC(5ba74a22) SHA1(897d3309f2efb3bfa56e86581ee4a492e656788c) ) /* banked ROM */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
- ROM_LOAD( "770_k02.n12", 0x18000, 0x10000, CRC(3bcf782a) SHA1(4b6127bced0b2519f8ad30587f32588a16368071) ) /* banked ROM */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* 052001 code */
+ ROM_LOAD( "770_k01.n11", 0x10000, 0x08000, CRC(5ba74a22) SHA1(897d3309f2efb3bfa56e86581ee4a492e656788c) ) /* banked ROM */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
+ ROM_LOAD( "770_k02.n12", 0x18000, 0x10000, CRC(3bcf782a) SHA1(4b6127bced0b2519f8ad30587f32588a16368071) ) /* banked ROM */
- ROM_REGION( 0x22000, "sub", 0 ) /* 64k + 72k for banked ROMs */
- ROM_LOAD( "770_k05.i16", 0x20000, 0x02000, CRC(0f1bebbb) SHA1(012a8867ee0febaaadd7bcbc91e462bda5d3a411) ) /* banked ROM */
- ROM_CONTINUE( 0x0a000, 0x06000 ) /* fixed ROM */
- ROM_LOAD( "770_f04.g16", 0x10000, 0x10000, CRC(e0e4ec9c) SHA1(15ae09c3ad67ec626d8178ec1417f0c57ca4eca4) ) /* banked ROM */
+ ROM_REGION( 0x22000, "sub", 0 ) /* 64k + 72k for banked ROMs */
+ ROM_LOAD( "770_k05.i16", 0x20000, 0x02000, CRC(0f1bebbb) SHA1(012a8867ee0febaaadd7bcbc91e462bda5d3a411) ) /* banked ROM */
+ ROM_CONTINUE( 0x0a000, 0x06000 ) /* fixed ROM */
+ ROM_LOAD( "770_f04.g16", 0x10000, 0x10000, CRC(e0e4ec9c) SHA1(15ae09c3ad67ec626d8178ec1417f0c57ca4eca4) ) /* banked ROM */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
- ROM_LOAD( "770_h03.f16", 0x00000, 0x08000, CRC(2ffd2afc) SHA1(ca2ef684f87bcf9b70b3ec66ec80685edaf04b9b) )
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
+ ROM_LOAD( "770_h03.f16", 0x00000, 0x08000, CRC(2ffd2afc) SHA1(ca2ef684f87bcf9b70b3ec66ec80685edaf04b9b) )
- ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "770c13", 0x000000, 0x040000, CRC(b859ca4e) SHA1(f58678d503683f78cca0d5ed2d79f6f68ab3495a) ) /* characters (N22) */
- ROM_LOAD( "770c12", 0x040000, 0x040000, CRC(50d14b72) SHA1(e3ff4a5aeefa6c10b5f7fec18297948b7c5acfdf) ) /* characters (K22) */
+ ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "770c13", 0x000000, 0x040000, CRC(b859ca4e) SHA1(f58678d503683f78cca0d5ed2d79f6f68ab3495a) ) /* characters (N22) */
+ ROM_LOAD( "770c12", 0x040000, 0x040000, CRC(50d14b72) SHA1(e3ff4a5aeefa6c10b5f7fec18297948b7c5acfdf) ) /* characters (K22) */
- ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "770c09", 0x000000, 0x080000, CRC(1ab4a7ff) SHA1(fa007b41027f95d29d2a9f931a2fe235844db637) ) /* sprites (N4) */
- ROM_LOAD( "770c08", 0x080000, 0x080000, CRC(a8e80586) SHA1(0401f59baa691905287cef94427f39e0c3f0adc6) ) /* sprites (K4) */
+ ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "770c09", 0x000000, 0x080000, CRC(1ab4a7ff) SHA1(fa007b41027f95d29d2a9f931a2fe235844db637) ) /* sprites (N4) */
+ ROM_LOAD( "770c08", 0x080000, 0x080000, CRC(a8e80586) SHA1(0401f59baa691905287cef94427f39e0c3f0adc6) ) /* sprites (K4) */
- ROM_REGION( 0x080000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "770c06", 0x000000, 0x040000, CRC(d0c592ee) SHA1(c1be73dd259f2779d715659b177e47513776a0d4) ) /* zoom/rotate (F4) */
- ROM_LOAD( "770c07", 0x040000, 0x040000, CRC(0b399fb1) SHA1(fbe26f9aa9a655d08bebcdd79719d35134ca4dd5) ) /* zoom/rotate (H4) */
+ ROM_REGION( 0x080000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "770c06", 0x000000, 0x040000, CRC(d0c592ee) SHA1(c1be73dd259f2779d715659b177e47513776a0d4) ) /* zoom/rotate (F4) */
+ ROM_LOAD( "770c07", 0x040000, 0x040000, CRC(0b399fb1) SHA1(fbe26f9aa9a655d08bebcdd79719d35134ca4dd5) ) /* zoom/rotate (H4) */
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "63s241.j11", 0x0000, 0x0200, CRC(9bdd719f) SHA1(de98e562080a97714047a8ad17abc6662c188897) ) /* priority encoder (not used) */
+ ROM_LOAD( "63s241.j11", 0x0000, 0x0200, CRC(9bdd719f) SHA1(de98e562080a97714047a8ad17abc6662c188897) ) /* priority encoder (not used) */
- ROM_REGION( 0x040000, "k007232_1", 0 ) /* 007232 data (chip 1) */
- ROM_LOAD( "770c10", 0x000000, 0x040000, CRC(7fac825f) SHA1(581522d7a02dad16d2803ff344b4db133f767e6b) )
+ ROM_REGION( 0x040000, "k007232_1", 0 ) /* 007232 data (chip 1) */
+ ROM_LOAD( "770c10", 0x000000, 0x040000, CRC(7fac825f) SHA1(581522d7a02dad16d2803ff344b4db133f767e6b) )
- ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
- ROM_LOAD( "770c11", 0x000000, 0x080000, CRC(299a615a) SHA1(29cdcc21998c72f4cf311792b904b79bde236bab) )
+ ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
+ ROM_LOAD( "770c11", 0x000000, 0x080000, CRC(299a615a) SHA1(29cdcc21998c72f4cf311792b904b79bde236bab) )
ROM_END
ROM_START( ajaxj )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* 052001 code */
- ROM_LOAD( "770_l01.n11", 0x10000, 0x08000, CRC(7cea5274) SHA1(8e3b2b11a8189e3a1703b3b4b453fbb386f5537f) ) /* banked ROM */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
- ROM_LOAD( "770_l02.n12", 0x18000, 0x10000, CRC(ad7d592b) SHA1(c75d9696b16de231c479379dd02d33fe54021d88) ) /* banked ROM */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* 052001 code */
+ ROM_LOAD( "770_l01.n11", 0x10000, 0x08000, CRC(7cea5274) SHA1(8e3b2b11a8189e3a1703b3b4b453fbb386f5537f) ) /* banked ROM */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* fixed ROM */
+ ROM_LOAD( "770_l02.n12", 0x18000, 0x10000, CRC(ad7d592b) SHA1(c75d9696b16de231c479379dd02d33fe54021d88) ) /* banked ROM */
- ROM_REGION( 0x22000, "sub", 0 ) /* 64k + 72k for banked ROMs */
- ROM_LOAD( "770_l05.i16", 0x20000, 0x02000, CRC(ed64fbb2) SHA1(429046edaf1299afa7fb9c385b4ef0c244ec2409) ) /* banked ROM */
- ROM_CONTINUE( 0x0a000, 0x06000 ) /* fixed ROM */
- ROM_LOAD( "770_f04.g16", 0x10000, 0x10000, CRC(e0e4ec9c) SHA1(15ae09c3ad67ec626d8178ec1417f0c57ca4eca4) ) /* banked ROM */
+ ROM_REGION( 0x22000, "sub", 0 ) /* 64k + 72k for banked ROMs */
+ ROM_LOAD( "770_l05.i16", 0x20000, 0x02000, CRC(ed64fbb2) SHA1(429046edaf1299afa7fb9c385b4ef0c244ec2409) ) /* banked ROM */
+ ROM_CONTINUE( 0x0a000, 0x06000 ) /* fixed ROM */
+ ROM_LOAD( "770_f04.g16", 0x10000, 0x10000, CRC(e0e4ec9c) SHA1(15ae09c3ad67ec626d8178ec1417f0c57ca4eca4) ) /* banked ROM */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
- ROM_LOAD( "770_f03.f16", 0x00000, 0x08000, CRC(3fe914fd) SHA1(c691920402bd859e2bf765084704a8bfad302cfa) )
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
+ ROM_LOAD( "770_f03.f16", 0x00000, 0x08000, CRC(3fe914fd) SHA1(c691920402bd859e2bf765084704a8bfad302cfa) )
- ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "770c13", 0x000000, 0x040000, CRC(b859ca4e) SHA1(f58678d503683f78cca0d5ed2d79f6f68ab3495a) ) /* characters (N22) */
- ROM_LOAD( "770c12", 0x040000, 0x040000, CRC(50d14b72) SHA1(e3ff4a5aeefa6c10b5f7fec18297948b7c5acfdf) ) /* characters (K22) */
+ ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "770c13", 0x000000, 0x040000, CRC(b859ca4e) SHA1(f58678d503683f78cca0d5ed2d79f6f68ab3495a) ) /* characters (N22) */
+ ROM_LOAD( "770c12", 0x040000, 0x040000, CRC(50d14b72) SHA1(e3ff4a5aeefa6c10b5f7fec18297948b7c5acfdf) ) /* characters (K22) */
- ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "770c09", 0x000000, 0x080000, CRC(1ab4a7ff) SHA1(fa007b41027f95d29d2a9f931a2fe235844db637) ) /* sprites (N4) */
- ROM_LOAD( "770c08", 0x080000, 0x080000, CRC(a8e80586) SHA1(0401f59baa691905287cef94427f39e0c3f0adc6) ) /* sprites (K4) */
+ ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "770c09", 0x000000, 0x080000, CRC(1ab4a7ff) SHA1(fa007b41027f95d29d2a9f931a2fe235844db637) ) /* sprites (N4) */
+ ROM_LOAD( "770c08", 0x080000, 0x080000, CRC(a8e80586) SHA1(0401f59baa691905287cef94427f39e0c3f0adc6) ) /* sprites (K4) */
- ROM_REGION( 0x080000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "770c06", 0x000000, 0x040000, CRC(d0c592ee) SHA1(c1be73dd259f2779d715659b177e47513776a0d4) ) /* zoom/rotate (F4) */
- ROM_LOAD( "770c07", 0x040000, 0x040000, CRC(0b399fb1) SHA1(fbe26f9aa9a655d08bebcdd79719d35134ca4dd5) ) /* zoom/rotate (H4) */
+ ROM_REGION( 0x080000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "770c06", 0x000000, 0x040000, CRC(d0c592ee) SHA1(c1be73dd259f2779d715659b177e47513776a0d4) ) /* zoom/rotate (F4) */
+ ROM_LOAD( "770c07", 0x040000, 0x040000, CRC(0b399fb1) SHA1(fbe26f9aa9a655d08bebcdd79719d35134ca4dd5) ) /* zoom/rotate (H4) */
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "63s241.j11", 0x0000, 0x0200, CRC(9bdd719f) SHA1(de98e562080a97714047a8ad17abc6662c188897) ) /* priority encoder (not used) */
+ ROM_LOAD( "63s241.j11", 0x0000, 0x0200, CRC(9bdd719f) SHA1(de98e562080a97714047a8ad17abc6662c188897) ) /* priority encoder (not used) */
- ROM_REGION( 0x040000, "k007232_1", 0 ) /* 007232 data (chip 1) */
- ROM_LOAD( "770c10", 0x000000, 0x040000, CRC(7fac825f) SHA1(581522d7a02dad16d2803ff344b4db133f767e6b) )
+ ROM_REGION( 0x040000, "k007232_1", 0 ) /* 007232 data (chip 1) */
+ ROM_LOAD( "770c10", 0x000000, 0x040000, CRC(7fac825f) SHA1(581522d7a02dad16d2803ff344b4db133f767e6b) )
- ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
- ROM_LOAD( "770c11", 0x000000, 0x080000, CRC(299a615a) SHA1(29cdcc21998c72f4cf311792b904b79bde236bab) )
+ ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
+ ROM_LOAD( "770c11", 0x000000, 0x080000, CRC(299a615a) SHA1(29cdcc21998c72f4cf311792b904b79bde236bab) )
ROM_END
diff --git a/src/mame/drivers/albazc.c b/src/mame/drivers/albazc.c
index 38d76762106..1dfc8a6bc09 100644
--- a/src/mame/drivers/albazc.c
+++ b/src/mame/drivers/albazc.c
@@ -90,7 +90,7 @@ void albazc_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect)
UINT32 albazc_state::screen_update_hanaroku(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
- bitmap.fill(0x1f0, cliprect); // ???
+ bitmap.fill(0x1f0, cliprect); // ???
draw_sprites(bitmap, cliprect);
return 0;
}
@@ -98,17 +98,17 @@ UINT32 albazc_state::screen_update_hanaroku(screen_device &screen, bitmap_ind16
WRITE8_MEMBER(albazc_state::hanaroku_out_0_w)
{
/*
- bit description
-
- 0 meter1 (coin1)
- 1 meter2 (coin2)
- 2 meter3 (1/2 d-up)
- 3 meter4
- 4 call out (meter)
- 5 lockout (key)
- 6 hopper2 (play)
- 7 meter5 (start)
- */
+ bit description
+
+ 0 meter1 (coin1)
+ 1 meter2 (coin2)
+ 2 meter3 (1/2 d-up)
+ 3 meter4
+ 4 call out (meter)
+ 5 lockout (key)
+ 6 hopper2 (play)
+ 7 meter5 (start)
+ */
coin_counter_w(machine(), 0, data & 0x01);
coin_counter_w(machine(), 1, data & 0x02);
@@ -120,17 +120,17 @@ WRITE8_MEMBER(albazc_state::hanaroku_out_0_w)
WRITE8_MEMBER(albazc_state::hanaroku_out_1_w)
{
/*
- bit description
-
- 0 hopper1 (data clear)
- 1 dis dat
- 2 dis clk
- 3 pay out
- 4 ext in 1
- 5 ext in 2
- 6 ?
- 7 ?
- */
+ bit description
+
+ 0 hopper1 (data clear)
+ 1 dis dat
+ 2 dis clk
+ 3 pay out
+ 4 ext in 1
+ 5 ext in 2
+ 6 ?
+ 7 ?
+ */
}
WRITE8_MEMBER(albazc_state::hanaroku_out_2_w)
@@ -164,11 +164,11 @@ static ADDRESS_MAP_START( hanaroku_map, AS_PROGRAM, 8, albazc_state )
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE("spriteram1")
AM_RANGE(0x9000, 0x97ff) AM_RAM AM_SHARE("spriteram2")
AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_SHARE("spriteram3")
- AM_RANGE(0xa200, 0xa2ff) AM_WRITENOP // ??? written once during P.O.S.T.
- AM_RANGE(0xa300, 0xa304) AM_WRITE(albazc_vregs_w) // ???
- AM_RANGE(0xb000, 0xb000) AM_WRITENOP // ??? always 0x40
- AM_RANGE(0xc000, 0xc3ff) AM_RAM // main ram
- AM_RANGE(0xc400, 0xc4ff) AM_RAM // ???
+ AM_RANGE(0xa200, 0xa2ff) AM_WRITENOP // ??? written once during P.O.S.T.
+ AM_RANGE(0xa300, 0xa304) AM_WRITE(albazc_vregs_w) // ???
+ AM_RANGE(0xb000, 0xb000) AM_WRITENOP // ??? always 0x40
+ AM_RANGE(0xc000, 0xc3ff) AM_RAM // main ram
+ AM_RANGE(0xc400, 0xc4ff) AM_RAM // ???
AM_RANGE(0xd000, 0xd000) AM_DEVREAD_LEGACY("aysnd", ay8910_r)
AM_RANGE(0xd000, 0xd001) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_data_w)
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0") AM_WRITE(hanaroku_out_0_w)
@@ -179,9 +179,9 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( hanaroku )
- PORT_START("IN0") /* 0xe000 */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) // adds n credits depending on "Coinage" Dip Switch
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) // adds 5 credits
+ PORT_START("IN0") /* 0xe000 */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) // adds n credits depending on "Coinage" Dip Switch
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) // adds 5 credits
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1/2 D-Up") PORT_CODE(KEYCODE_H)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Reset") PORT_CODE(KEYCODE_R)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Meter") PORT_CODE(KEYCODE_M)
@@ -189,7 +189,7 @@ static INPUT_PORTS_START( hanaroku )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Play")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
- PORT_START("IN1") /* 0xe001 */
+ PORT_START("IN1") /* 0xe001 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_HANAFUDA_A )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_HANAFUDA_B )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_HANAFUDA_C )
@@ -199,7 +199,7 @@ static INPUT_PORTS_START( hanaroku )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_HANAFUDA_YES )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_HANAFUDA_NO )
- PORT_START("IN2") /* 0xe002 */
+ PORT_START("IN2") /* 0xe002 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME("Data Clear")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_NAME("Medal In") PORT_CODE(KEYCODE_I)
@@ -208,29 +208,29 @@ static INPUT_PORTS_START( hanaroku )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Ext In 2")
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW1") /* 0xd000 - Port A */
+ PORT_START("DSW1") /* 0xd000 - Port A */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW2") /* 0xd000 - Port B */
+ PORT_START("DSW2") /* 0xd000 - Port B */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW3") /* 0xe004 */
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) // Stored at 0xc028
+ PORT_START("DSW3") /* 0xe004 */
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) // Stored at 0xc028
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x00, "1 Coin/10 Credits" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) // Stored at 0xc03a
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) // Stored at 0xc03a
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) // Stored at 0xc078
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) // Stored at 0xc078
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x20, "Game Mode" ) // Stored at 0xc02e
- PORT_DIPSETTING( 0x30, "Mode 0" ) // Collect OFF
- PORT_DIPSETTING( 0x20, "Mode 1" ) // Collect ON (code at 0x36ea)
- PORT_DIPSETTING( 0x10, "Mode 2" ) // Collect ON (code at 0x3728)
- PORT_DIPSETTING( 0x00, "Mode 3" ) // No credit counter
+ PORT_DIPNAME( 0x30, 0x20, "Game Mode" ) // Stored at 0xc02e
+ PORT_DIPSETTING( 0x30, "Mode 0" ) // Collect OFF
+ PORT_DIPSETTING( 0x20, "Mode 1" ) // Collect ON (code at 0x36ea)
+ PORT_DIPSETTING( 0x10, "Mode 2" ) // Collect ON (code at 0x3728)
+ PORT_DIPSETTING( 0x00, "Mode 3" ) // No credit counter
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
INPUT_PORTS_END
@@ -269,7 +269,7 @@ static const ay8910_interface ay8910_config =
static MACHINE_CONFIG_START( hanaroku, albazc_state )
- MCFG_CPU_ADD("maincpu", Z80,6000000) /* ? MHz */
+ MCFG_CPU_ADD("maincpu", Z80,6000000) /* ? MHz */
MCFG_CPU_PROGRAM_MAP(hanaroku_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", albazc_state, irq0_line_hold)
diff --git a/src/mame/drivers/albazg.c b/src/mame/drivers/albazg.c
index e12fdeba24c..35e2c3131a2 100644
--- a/src/mame/drivers/albazg.c
+++ b/src/mame/drivers/albazg.c
@@ -209,26 +209,26 @@ static const ay8910_interface ay8910_config =
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
static I8255A_INTERFACE( ppi8255_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(albazg_state,mux_w), /* Port A write */
- DEVCB_INPUT_PORT("SYSTEM"), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_DRIVER_MEMBER(albazg_state,mux_r), /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(albazg_state,mux_w), /* Port A write */
+ DEVCB_INPUT_PORT("SYSTEM"), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_DRIVER_MEMBER(albazg_state,mux_r), /* Port C read */
+ DEVCB_NULL /* Port C write */
};
/***************************************************************************************/
@@ -397,7 +397,7 @@ static MACHINE_CONFIG_START( yumefuda, albazg_state )
MCFG_SCREEN_VISIBLE_AREA(0, 32*8-1, 0, 32*8-1)
MCFG_SCREEN_UPDATE_DRIVER(albazg_state, screen_update_yumefuda)
- MCFG_MC6845_ADD("crtc", H46505, MASTER_CLOCK/16, mc6845_intf) /* hand tuned to get ~60 fps */
+ MCFG_MC6845_ADD("crtc", H46505, MASTER_CLOCK/16, mc6845_intf) /* hand tuned to get ~60 fps */
MCFG_GFXDECODE( yumefuda )
MCFG_PALETTE_LENGTH(0x80)
diff --git a/src/mame/drivers/aleck64.c b/src/mame/drivers/aleck64.c
index f3bb67e5d38..97f8eafdad8 100644
--- a/src/mame/drivers/aleck64.c
+++ b/src/mame/drivers/aleck64.c
@@ -175,11 +175,11 @@ static UINT32 dip_read_offset = 0;
static WRITE32_HANDLER( aleck_dips_w )
{
/*
- mtetrisc uses offset 0x1c and 0x03 a good bit in conjunction with reading INMJ.
- (See Test menu GAME DATA and MEMORY CHECK/S2D Ram test, also CONFIGURATION/save & exit. eeprom? Serial2DRAM?)
+ mtetrisc uses offset 0x1c and 0x03 a good bit in conjunction with reading INMJ.
+ (See Test menu GAME DATA and MEMORY CHECK/S2D Ram test, also CONFIGURATION/save & exit. eeprom? Serial2DRAM?)
- srmvs uses 0x40, communications?
- */
+ srmvs uses 0x40, communications?
+ */
switch( offset )
{
@@ -199,7 +199,7 @@ static READ32_HANDLER( aleck_dips_r )
switch( offset )
{
case 0:
- return (space.machine().root_device().ioport("IN0")->read()); /* mtetrisc has regular inputs here */
+ return (space.machine().root_device().ioport("IN0")->read()); /* mtetrisc has regular inputs here */
case 1:
return (space.machine().root_device().ioport("IN1")->read());
case 2:
@@ -276,31 +276,31 @@ static READ32_HANDLER( aleck_dips_r )
*/
static ADDRESS_MAP_START( n64_map, AS_PROGRAM, 32, n64_state )
- AM_RANGE(0x00000000, 0x007fffff) AM_RAM /*AM_MIRROR(0xc0000000)*/ AM_SHARE("rdram") // RDRAM
+ AM_RANGE(0x00000000, 0x007fffff) AM_RAM /*AM_MIRROR(0xc0000000)*/ AM_SHARE("rdram") // RDRAM
AM_RANGE(0x03f00000, 0x03f00027) AM_DEVREADWRITE("rcp", n64_periphs, rdram_reg_r, rdram_reg_w)
- AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") // RSP DMEM
- AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("rsp_imem") // RSP IMEM
- AM_RANGE(0x04040000, 0x040fffff) AM_DEVREADWRITE_LEGACY("rsp", n64_sp_reg_r, n64_sp_reg_w) // RSP
- AM_RANGE(0x04100000, 0x041fffff) AM_DEVREADWRITE_LEGACY("rsp", n64_dp_reg_r, n64_dp_reg_w) // RDP
- AM_RANGE(0x04300000, 0x043fffff) AM_DEVREADWRITE("rcp", n64_periphs, mi_reg_r, mi_reg_w) // MIPS Interface
- AM_RANGE(0x04400000, 0x044fffff) AM_DEVREADWRITE("rcp", n64_periphs, vi_reg_r, vi_reg_w) // Video Interface
- AM_RANGE(0x04500000, 0x045fffff) AM_DEVREADWRITE("rcp", n64_periphs, ai_reg_r, ai_reg_w) // Audio Interface
- AM_RANGE(0x04600000, 0x046fffff) AM_DEVREADWRITE("rcp", n64_periphs, pi_reg_r, pi_reg_w) // Peripheral Interface
- AM_RANGE(0x04700000, 0x047fffff) AM_DEVREADWRITE("rcp", n64_periphs, ri_reg_r, ri_reg_w) // RDRAM Interface
- AM_RANGE(0x04800000, 0x048fffff) AM_DEVREADWRITE("rcp", n64_periphs, si_reg_r, si_reg_w) // Serial Interface
- AM_RANGE(0x10000000, 0x13ffffff) AM_ROM AM_REGION("user2", 0) // Cartridge
- AM_RANGE(0x1fc00000, 0x1fc007bf) AM_ROM AM_REGION("user1", 0) // PIF ROM
+ AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") // RSP DMEM
+ AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("rsp_imem") // RSP IMEM
+ AM_RANGE(0x04040000, 0x040fffff) AM_DEVREADWRITE_LEGACY("rsp", n64_sp_reg_r, n64_sp_reg_w) // RSP
+ AM_RANGE(0x04100000, 0x041fffff) AM_DEVREADWRITE_LEGACY("rsp", n64_dp_reg_r, n64_dp_reg_w) // RDP
+ AM_RANGE(0x04300000, 0x043fffff) AM_DEVREADWRITE("rcp", n64_periphs, mi_reg_r, mi_reg_w) // MIPS Interface
+ AM_RANGE(0x04400000, 0x044fffff) AM_DEVREADWRITE("rcp", n64_periphs, vi_reg_r, vi_reg_w) // Video Interface
+ AM_RANGE(0x04500000, 0x045fffff) AM_DEVREADWRITE("rcp", n64_periphs, ai_reg_r, ai_reg_w) // Audio Interface
+ AM_RANGE(0x04600000, 0x046fffff) AM_DEVREADWRITE("rcp", n64_periphs, pi_reg_r, pi_reg_w) // Peripheral Interface
+ AM_RANGE(0x04700000, 0x047fffff) AM_DEVREADWRITE("rcp", n64_periphs, ri_reg_r, ri_reg_w) // RDRAM Interface
+ AM_RANGE(0x04800000, 0x048fffff) AM_DEVREADWRITE("rcp", n64_periphs, si_reg_r, si_reg_w) // Serial Interface
+ AM_RANGE(0x10000000, 0x13ffffff) AM_ROM AM_REGION("user2", 0) // Cartridge
+ AM_RANGE(0x1fc00000, 0x1fc007bf) AM_ROM AM_REGION("user1", 0) // PIF ROM
AM_RANGE(0x1fc007c0, 0x1fc007ff) AM_DEVREADWRITE("rcp", n64_periphs, pif_ram_r, pif_ram_w)
/*
- Surely this should mirror main ram? srmvs crashes, and
- vivdolls overwrites it's memory test code if it does mirror
- */
+ Surely this should mirror main ram? srmvs crashes, and
+ vivdolls overwrites it's memory test code if it does mirror
+ */
AM_RANGE(0xc0000000, 0xc07fffff) AM_RAM
AM_RANGE(0xc0800000, 0xc0800fff) AM_READWRITE_LEGACY(aleck_dips_r,aleck_dips_w)
- AM_RANGE(0xd0000000, 0xd00fffff) AM_RAM // mtetrisc, write only, mirror?
+ AM_RANGE(0xd0000000, 0xd00fffff) AM_RAM // mtetrisc, write only, mirror?
ADDRESS_MAP_END
@@ -313,21 +313,21 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( aleck64 )
PORT_START("P1")
- PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A
- PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B
- PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) // Button Z
- PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start
- PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up
- PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down
- PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left
- PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) // Joypad Right
+ PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A
+ PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B
+ PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) // Button Z
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start
+ PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up
+ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down
+ PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left
+ PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) // Joypad Right
PORT_BIT( 0x00c0, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) // Pan Left
- PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(1) // Pan Right
- PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_PLAYER(1) // C Button Up
- PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_PLAYER(1) // C Button Down
- PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_PLAYER(1) // C Button Left
- PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON9 ) PORT_PLAYER(1) // C Button Right
+ PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) // Pan Left
+ PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(1) // Pan Right
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_PLAYER(1) // C Button Up
+ PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_PLAYER(1) // C Button Down
+ PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_PLAYER(1) // C Button Left
+ PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON9 ) PORT_PLAYER(1) // C Button Right
PORT_START("P1_ANALOG_X")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
@@ -336,21 +336,21 @@ static INPUT_PORTS_START( aleck64 )
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0xff,0x00) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
PORT_START("P2")
- PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) // Button A
- PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) // Button B
- PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) // Button Z
- PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start
- PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) // Joypad Up
- PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) // Joypad Down
- PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // Joypad Left
- PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) // Joypad Right
+ PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) // Button A
+ PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) // Button B
+ PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) // Button Z
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start
+ PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) // Joypad Up
+ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) // Joypad Down
+ PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // Joypad Left
+ PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) // Joypad Right
PORT_BIT( 0x00c0, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(2) // Pan Left
- PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(2) // Pan Right
- PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_PLAYER(2) // C Button Up
- PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_PLAYER(2) // C Button Down
- PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_PLAYER(2) // C Button Left
- PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON9 ) PORT_PLAYER(2) // C Button Right
+ PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(2) // Pan Left
+ PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_PLAYER(2) // Pan Right
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_PLAYER(2) // C Button Up
+ PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_PLAYER(2) // C Button Down
+ PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_PLAYER(2) // C Button Left
+ PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON9 ) PORT_PLAYER(2) // C Button Right
PORT_START("P2_ANALOG_X")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(2)
@@ -488,21 +488,21 @@ INPUT_PORTS_END
static INPUT_PORTS_START( starsldr )
PORT_START("P1")
- PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A
- PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B
+ PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1) // Button A
+ PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1) // Button B
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start
- PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up
- PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down
- PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left
- PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) // Joypad Right
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START1 ) // Start
+ PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1) // Joypad Up
+ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) // Joypad Down
+ PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) // Joypad Left
+ PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1) // Joypad Right
PORT_BIT( 0x00c0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) // Button C
+ PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) // Button C
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) // Button D
+ PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1) // Button D
PORT_START("P1_ANALOG_X")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
@@ -511,21 +511,21 @@ static INPUT_PORTS_START( starsldr )
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0xff,0x00) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
PORT_START("P2")
- PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) // Button A
- PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) // Button B
+ PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) // Button A
+ PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2) // Button B
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start
- PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) // Joypad Up
- PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) // Joypad Down
- PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // Joypad Left
- PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) // Joypad Right
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_START2 ) // Start
+ PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2) // Joypad Up
+ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) // Joypad Down
+ PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) // Joypad Left
+ PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2) // Joypad Right
PORT_BIT( 0x00c0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) // Button C
+ PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) // Button C
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(2) // Button D
+ PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(2) // Button D
PORT_START("P2_ANALOG_X")
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(2)
@@ -535,20 +535,20 @@ static INPUT_PORTS_START( starsldr )
PORT_START("IN0")
- PORT_DIPNAME( 0x80000000, 0x00000000, DEF_STR(Joystick) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80000000, 0x00000000, DEF_STR(Joystick) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00000000, DEF_STR(Joystick) )
PORT_DIPSETTING( 0x80000000, "3D" )
- PORT_DIPNAME( 0x60000000, 0x60000000, "Auto Level" ) PORT_DIPLOCATION("SW1:6,7")
+ PORT_DIPNAME( 0x60000000, 0x60000000, "Auto Level" ) PORT_DIPLOCATION("SW1:6,7")
PORT_DIPSETTING( 0x60000000, DEF_STR(Normal) )
PORT_DIPSETTING( 0x40000000, "Slow" )
PORT_DIPSETTING( 0x20000000, "Fast1" )
PORT_DIPSETTING( 0x00000000, "Fast2" )
- PORT_DIPNAME( 0x18000000, 0x18000000, "Player" ) PORT_DIPLOCATION("SW1:4,5")
+ PORT_DIPNAME( 0x18000000, 0x18000000, "Player" ) PORT_DIPLOCATION("SW1:4,5")
PORT_DIPSETTING( 0x18000000, "3" )
PORT_DIPSETTING( 0x10000000, "4" )
PORT_DIPSETTING( 0x08000000, "2" )
PORT_DIPSETTING( 0x00000000, "1" )
- PORT_DIPNAME( 0x07000000, 0x07000000, DEF_STR(Coinage) ) PORT_DIPLOCATION("SW1:1,2,3")
+ PORT_DIPNAME( 0x07000000, 0x07000000, DEF_STR(Coinage) ) PORT_DIPLOCATION("SW1:1,2,3")
PORT_DIPSETTING( 0x00000000, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x01000000, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02000000, DEF_STR( 3C_1C ) )
@@ -557,19 +557,19 @@ static INPUT_PORTS_START( starsldr )
PORT_DIPSETTING( 0x06000000, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x05000000, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x04000000, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0x00800000, 0x00800000, "DIPSW2 #8" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x00800000, 0x00800000, "DIPSW2 #8" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR(Language) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR(Language) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x00400000, DEF_STR(English) )
PORT_DIPSETTING( 0x00000000, DEF_STR(Japanese) )
- PORT_DIPNAME( 0x00200000, 0x00000000, "Demosound" ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x00200000, 0x00000000, "Demosound" ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x00100000, 0x00100000, "Rapid" ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x00100000, 0x00100000, "Rapid" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00100000, DEF_STR( On ) )
- PORT_DIPNAME( 0x000c0000, 0x000c0000, "Extend" ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x000c0000, 0x000c0000, "Extend" ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x000c0000, "Every 30000000" )
PORT_DIPSETTING( 0x00080000, "Every 50000000" )
PORT_DIPSETTING( 0x00040000, "Every 70000000" )
@@ -589,7 +589,7 @@ static INPUT_PORTS_START( starsldr )
PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_COIN1 )
INPUT_PORTS_END
- static INPUT_PORTS_START( doncdoon )
+ static INPUT_PORTS_START( doncdoon )
PORT_START("P1")
PORT_START("P1_ANALOG_X")
PORT_START("P1_ANALOG_Y")
@@ -698,22 +698,22 @@ PORT_START("INMJ")
PORT_START("IN0")
PORT_BIT( 0x0000ffff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_DIPNAME( 0x80000000, 0x80000000, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80000000, 0x80000000, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x40000000, 0x40000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40000000, 0x40000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x20000000, 0x20000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20000000, 0x20000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x20000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x10000000, 0x10000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10000000, 0x10000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x10000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x08000000, 0x08000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08000000, 0x08000000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x07000000, 0x07000000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3")
+ PORT_DIPNAME( 0x07000000, 0x07000000, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2,3")
PORT_DIPSETTING( 0x00000000, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x01000000, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02000000, DEF_STR( 3C_1C ) )
@@ -722,22 +722,22 @@ PORT_START("INMJ")
PORT_DIPSETTING( 0x06000000, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x05000000, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x04000000, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Test ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x00800000, 0x00800000, DEF_STR( Test ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x00800000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x00400000, 0x00400000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x00400000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x00200000, 0x00000000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x00200000, 0x00000000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x00200000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
- PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x00100000, 0x00100000, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00100000, DEF_STR( On ) )
- PORT_DIPNAME( 0x00080000, 0x00080000, "Kuitan" ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x00080000, 0x00080000, "Kuitan" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x00000000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00080000, DEF_STR( On ) )
- PORT_DIPNAME( 0x00070000, 0x00070000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2,3")
+ PORT_DIPNAME( 0x00070000, 0x00070000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2,3")
PORT_DIPSETTING( 0x00000000, DEF_STR( Hardest ) )
PORT_DIPSETTING( 0x00010000, DEF_STR( Very_Hard ) )
PORT_DIPSETTING( 0x00020000, DEF_STR( Hard ) )
@@ -795,9 +795,9 @@ INPUT_PORTS_END
/* ?? */
static const mips3_config vr4300_config =
{
- 16384, /* code cache size */
- 8192, /* data cache size */
- 62500000 /* system clock */
+ 16384, /* code cache size */
+ 8192, /* data cache size */
+ 62500000 /* system clock */
};
static MACHINE_CONFIG_START( aleck64, n64_state )
@@ -853,10 +853,10 @@ ROM_START( aleck64 )
ROM_REGION32_BE( 0x80, "user4", ROMREGION_ERASE00 )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
ROM_START( 11beat )
@@ -867,10 +867,10 @@ ROM_START( 11beat )
ROM_LOAD16_WORD_SWAP( "nus-zhaj.u3", 0x000000, 0x0800000, CRC(95258ba2) SHA1(0299b8fb9a8b1b24428d0f340f6bf1cfaf99c672) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
ROM_START( mtetrisc )
@@ -887,10 +887,10 @@ ROM_START( mtetrisc )
ROM_LOAD ( "at24c01.u34", 0x000000, 0x80, CRC(ba7e503f) SHA1(454aa4fdde7d8694d1affaf25cd750fa678686bb) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -910,10 +910,10 @@ ROM_START( starsldr )
ROM_LOAD16_WORD_SWAP( "nus-zhbj-0.u3", 0x000000, 0xc00000, CRC(a4edac93) SHA1(3794606c008fb69f5d16dcccece94d03da23bf8a) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -925,10 +925,10 @@ ROM_START( srmvs )
ROM_LOAD16_WORD_SWAP( "nus-zsej-0.u2", 0x000000, 0x2000000, CRC(44f40102) SHA1(a78de955f2fcd99dda14e782984368b320eb5415) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -949,10 +949,10 @@ ROM_START( vivdolls )
ROM_LOAD16_WORD_SWAP( "nus-zsaj-0.u3", 0x000000, 0x800000, CRC(f3220e29) SHA1(06d8b808cc19378b046803f4dc75c7d791b7767f) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -980,10 +980,10 @@ ROM_START( twrshaft )
ROM_LOAD16_WORD_SWAP( "nus-zsij-0.u1", 0x000000, 0x800000, CRC(2389576f) SHA1(dc22b2eab4d7a02cb918827a62e6c120b3a84e6c) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -999,10 +999,10 @@ ROM_START( hipai )
ROM_LOAD16_WORD_SWAP( "nus-nsij-0.u1", 0x000000, 0x800000, CRC(94cf9f8d) SHA1(cd624d1f5de2be3bec3ece06556a2e39bef66d77) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -1018,10 +1018,10 @@ ROM_START( kurufev )
ROM_LOAD16_WORD_SWAP( "nus-zsij-0.u1", 0x000000, 0x800000, CRC(2389576f) SHA1(dc22b2eab4d7a02cb918827a62e6c120b3a84e6c) ) // same as tower & shaft
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
ROM_START( doncdoon )
@@ -1036,10 +1036,10 @@ ROM_START( doncdoon )
ROM_LOAD16_WORD_SWAP( "nus-zsij-0.u1", 0x000000, 0x800000, CRC(547d8122) SHA1(347f0785767265acb0f0c21646e06cbe6f561821) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -1051,10 +1051,10 @@ ROM_START( mayjin3 )
ROM_LOAD16_WORD_SWAP( "nus-zscj.u3", 0x000000, 0x800000, CRC(8b36eb91) SHA1(179745625c16c6813d5f8d29bfd7628783d55806) )
ROM_REGION16_BE( 0x80, "normpoint", 0 )
- ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
+ ROM_LOAD( "normpnt.rom", 0x00, 0x80, CRC(e7f2a005) SHA1(c27b4a364a24daeee6e99fd286753fd6216362b4) )
ROM_REGION16_BE( 0x80, "normslope", 0 )
- ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
+ ROM_LOAD( "normslp.rom", 0x00, 0x80, CRC(4f2ae525) SHA1(eab43f8cc52c8551d9cff6fced18ef80eaba6f05) )
ROM_END
@@ -1075,4 +1075,3 @@ GAME( 2003, hipai, aleck64, aleck64, hipai, n64_state, aleck64, ROT0, "Ar
GAME( 2003, doncdoon, aleck64, aleck64, doncdoon, n64_state, aleck64, ROT0, "Aruze", "Hanabi de Doon! - Don-chan Puzzle", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
GAME( 2003, kurufev, aleck64, aleck64, kurufev, n64_state, aleck64, ROT0, "Aruze / Takumi", "Kurukuru Fever", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS )
GAME( 2000, mayjin3, aleck64, aleck64, aleck64, n64_state, aleck64, ROT0, "Seta / Able Corporation", "Mayjinsen 3", GAME_NOT_WORKING|GAME_NO_SOUND )
-
diff --git a/src/mame/drivers/alg.c b/src/mame/drivers/alg.c
index 02a6142bb6c..5a6169a40e3 100644
--- a/src/mame/drivers/alg.c
+++ b/src/mame/drivers/alg.c
@@ -35,7 +35,7 @@ class alg_state : public amiga_state
public:
alg_state(const machine_config &mconfig, device_type type, const char *tag)
: amiga_state(mconfig, type, tag),
- m_laserdisc(*this, "laserdisc") { }
+ m_laserdisc(*this, "laserdisc") { }
required_device<sony_ldp1450_device> m_laserdisc;
@@ -295,9 +295,9 @@ static ADDRESS_MAP_START( main_map_r1, AS_PROGRAM, 16, alg_state )
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE_LEGACY(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE_LEGACY(amiga_custom_r, amiga_custom_w) AM_SHARE("custom_regs")
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE_LEGACY(amiga_autoconfig_r, amiga_autoconfig_w)
- AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* System ROM */
+ AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* System ROM */
- AM_RANGE(0xf00000, 0xf1ffff) AM_ROM AM_REGION("user2", 0) /* Custom ROM */
+ AM_RANGE(0xf00000, 0xf1ffff) AM_ROM AM_REGION("user2", 0) /* Custom ROM */
AM_RANGE(0xf54000, 0xf55fff) AM_RAM AM_SHARE("nvram")
ADDRESS_MAP_END
@@ -308,9 +308,9 @@ static ADDRESS_MAP_START( main_map_r2, AS_PROGRAM, 16, alg_state )
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE_LEGACY(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE_LEGACY(amiga_custom_r, amiga_custom_w) AM_SHARE("custom_regs")
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE_LEGACY(amiga_autoconfig_r, amiga_autoconfig_w)
- AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* System ROM */
+ AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* System ROM */
- AM_RANGE(0xf00000, 0xf3ffff) AM_ROM AM_REGION("user2", 0) /* Custom ROM */
+ AM_RANGE(0xf00000, 0xf3ffff) AM_ROM AM_REGION("user2", 0) /* Custom ROM */
AM_RANGE(0xf7c000, 0xf7dfff) AM_RAM AM_SHARE("nvram")
ADDRESS_MAP_END
@@ -321,9 +321,9 @@ static ADDRESS_MAP_START( main_map_picmatic, AS_PROGRAM, 16, alg_state )
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE_LEGACY(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE_LEGACY(amiga_custom_r, amiga_custom_w) AM_SHARE("custom_regs")
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE_LEGACY(amiga_autoconfig_r, amiga_autoconfig_w)
- AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* System ROM */
+ AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* System ROM */
- AM_RANGE(0xf00000, 0xf1ffff) AM_ROM AM_REGION("user2", 0) /* Custom ROM */
+ AM_RANGE(0xf00000, 0xf1ffff) AM_ROM AM_REGION("user2", 0) /* Custom ROM */
AM_RANGE(0xf40000, 0xf41fff) AM_RAM AM_SHARE("nvram")
ADDRESS_MAP_END
@@ -336,44 +336,44 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( alg )
- PORT_START("JOY0DAT") /* read by Amiga core */
+ PORT_START("JOY0DAT") /* read by Amiga core */
PORT_BIT( 0x0303, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, alg_state,amiga_joystick_convert, "P1JOY")
PORT_BIT( 0xfcfc, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_START("JOY1DAT") /* read by Amiga core */
+ PORT_START("JOY1DAT") /* read by Amiga core */
PORT_BIT( 0x0303, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, alg_state,amiga_joystick_convert, "P2JOY")
PORT_BIT( 0xfcfc, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_START("POTGO") /* read by Amiga core */
+ PORT_START("POTGO") /* read by Amiga core */
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0xaaff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("HVPOS") /* read by Amiga core */
+ PORT_START("HVPOS") /* read by Amiga core */
PORT_BIT( 0x1ffff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, alg_state,lightgun_pos_r, NULL)
PORT_START("FIRE")
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P1JOY") /* referenced by JOY0DAT */
+ PORT_START("P1JOY") /* referenced by JOY0DAT */
PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_HIGH )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN2 )
- PORT_START("P2JOY") /* referenced by JOY1DAT */
+ PORT_START("P2JOY") /* referenced by JOY1DAT */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("GUN1X") /* referenced by lightgun_pos_r */
+ PORT_START("GUN1X") /* referenced by lightgun_pos_r */
PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(1)
- PORT_START("GUN1Y") /* referenced by lightgun_pos_r */
+ PORT_START("GUN1Y") /* referenced by lightgun_pos_r */
PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(1)
INPUT_PORTS_END
@@ -391,13 +391,13 @@ static INPUT_PORTS_START( alg_2p )
PORT_MODIFY("P2JOY")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, alg_state,lightgun_holster_r, NULL)
- PORT_START("GUN2X") /* referenced by lightgun_pos_r */
+ PORT_START("GUN2X") /* referenced by lightgun_pos_r */
PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2)
- PORT_START("GUN2Y") /* referenced by lightgun_pos_r */
+ PORT_START("GUN2Y") /* referenced by lightgun_pos_r */
PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2)
- PORT_START("TRIGGERS") /* referenced by lightgun_trigger_r and lightgun_holster_r */
+ PORT_START("TRIGGERS") /* referenced by lightgun_trigger_r and lightgun_holster_r */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1)
@@ -414,26 +414,26 @@ INPUT_PORTS_END
static const legacy_mos6526_interface cia_0_intf =
{
- DEVCB_LINE(amiga_cia_0_irq), /* irq_func */
- DEVCB_NULL, /* pc_func */
+ DEVCB_LINE(amiga_cia_0_irq), /* irq_func */
+ DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(alg_state,alg_cia_0_porta_r),
- DEVCB_DRIVER_MEMBER(alg_state,alg_cia_0_porta_w), /* port A */
+ DEVCB_DRIVER_MEMBER(alg_state,alg_cia_0_porta_w), /* port A */
DEVCB_DRIVER_MEMBER(alg_state,alg_cia_0_portb_r),
- DEVCB_DRIVER_MEMBER(alg_state,alg_cia_0_portb_w) /* port B */
+ DEVCB_DRIVER_MEMBER(alg_state,alg_cia_0_portb_w) /* port B */
};
static const legacy_mos6526_interface cia_1_intf =
{
- DEVCB_LINE(amiga_cia_1_irq), /* irq_func */
- DEVCB_NULL, /* pc_func */
+ DEVCB_LINE(amiga_cia_1_irq), /* irq_func */
+ DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(alg_state,alg_cia_1_porta_r),
- DEVCB_DRIVER_MEMBER(alg_state,alg_cia_1_porta_w), /* port A */
+ DEVCB_DRIVER_MEMBER(alg_state,alg_cia_1_porta_w), /* port A */
DEVCB_NULL,
- DEVCB_NULL /* port B */
+ DEVCB_NULL /* port B */
};
static MACHINE_CONFIG_START( alg_r1, alg_state )
@@ -827,20 +827,20 @@ GAME( 1991, wsjr15, wsjr, alg_r1, alg, alg_state, palr3, ROT0, "Ameri
/* Rev. B board */
/* PAL R6 */
GAME( 1990, maddog, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Mad Dog McCree v2.03 board rev.B", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
- /* works ok but uses right player (2) controls only for trigger and holster */
+ /* works ok but uses right player (2) controls only for trigger and holster */
GAME( 1992, maddog2, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Mad Dog II: The Lost Gold v2.04", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
GAME( 1992, maddog22, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Mad Dog II: The Lost Gold v2.02", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
GAME( 1992, maddog21, maddog2, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Mad Dog II: The Lost Gold v1.0", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
- /* works ok but uses right player (2) controls only for trigger and holster */
+ /* works ok but uses right player (2) controls only for trigger and holster */
GAME( 1992, spacepir, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Space Pirates v2.2", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
GAME( 1992, gallgall, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Gallagher's Gallery v2.2", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
- /* all good, but no holster */
+ /* all good, but no holster */
GAME( 1993, crimepat, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Crime Patrol v1.4", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
GAME( 1993, crimep2, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Crime Patrol 2: Drug Wars v1.3", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
GAME( 1993, crimep211,crimep2, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "Crime Patrol 2: Drug Wars v1.1", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
GAME( 1994, lastbh, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT0, "American Laser Games", "The Last Bounty Hunter v0.06", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
GAME( 1995, fastdraw, alg_bios, alg_r2, alg_2p, alg_state, palr6, ROT90, "American Laser Games", "Fast Draw Showdown v1.3", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
- /* works ok but uses right player (2) controls only for trigger and holster */
+ /* works ok but uses right player (2) controls only for trigger and holster */
/* NOVA games on ALG hardware with own address scramble */
GAME( 199?, aplatoon, alg_bios, alg_r2, alg, alg_state, aplatoon, ROT0, "Nova?", "Platoon V.?.? US", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IMPERFECT_GRAPHICS )
diff --git a/src/mame/drivers/alien.c b/src/mame/drivers/alien.c
index 06fa8edcbcd..65066bbf329 100644
--- a/src/mame/drivers/alien.c
+++ b/src/mame/drivers/alien.c
@@ -17,14 +17,14 @@
#include "emu.h"
#include "cpu/sh4/sh4.h"
-#define MASTER_CLOCK XTAL_200MHz
+#define MASTER_CLOCK XTAL_200MHz
class alien_state : public driver_device
{
public:
alien_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
DECLARE_READ64_MEMBER(test_r);
@@ -79,7 +79,7 @@ void alien_state::machine_reset()
static MACHINE_CONFIG_START( alien, alien_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", SH4LE, MASTER_CLOCK) /* 200MHz */
+ MCFG_CPU_ADD("maincpu", SH4LE, MASTER_CLOCK) /* 200MHz */
MCFG_CPU_PROGRAM_MAP(alien_map)
/* video hardware */
@@ -106,7 +106,7 @@ MACHINE_CONFIG_END
ROM_START( alien )
ROM_REGION( 0x800000, "maincpu", 0 ) // BIOS code
ROM_LOAD32_WORD( "aln_s04.4.ic30", 0x000000, 0x400000, CRC(11777d3f) SHA1(8cc9fcae7911e6be273b4532d89b44a309687ead) )
- ROM_LOAD32_WORD( "aln_s05.5.ic33", 0x000002, 0x400000, CRC(71d2f22c) SHA1(16b25aa34f8b0d988565e7ab7cecc4df62ee8cf3) )
+ ROM_LOAD32_WORD( "aln_s05.5.ic33", 0x000002, 0x400000, CRC(71d2f22c) SHA1(16b25aa34f8b0d988565e7ab7cecc4df62ee8cf3) )
ROM_REGION( 0x800100, "unk", 0 ) //sound samples flash rom
ROM_LOAD( "s29jl064hxxtfi00.u35", 0x000000, 0x800100, CRC(01890c61) SHA1(4fad321f42eab835351c6d5f73539bdbed80affe) )
diff --git a/src/mame/drivers/aliens.c b/src/mame/drivers/aliens.c
index f89d0199222..fe452edba81 100644
--- a/src/mame/drivers/aliens.c
+++ b/src/mame/drivers/aliens.c
@@ -113,25 +113,25 @@ WRITE8_MEMBER(aliens_state::k052109_051960_w)
}
static ADDRESS_MAP_START( aliens_map, AS_PROGRAM, 8, aliens_state )
- AM_RANGE(0x0000, 0x03ff) AM_READWRITE(bankedram_r, bankedram_w) AM_SHARE("ram") /* palette + work RAM */
+ AM_RANGE(0x0000, 0x03ff) AM_READWRITE(bankedram_r, bankedram_w) AM_SHARE("ram") /* palette + work RAM */
AM_RANGE(0x0400, 0x1fff) AM_RAM
- AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank1") /* banked ROM */
+ AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0x5f80, 0x5f80) AM_READ_PORT("DSW3")
AM_RANGE(0x5f81, 0x5f81) AM_READ_PORT("P1")
AM_RANGE(0x5f82, 0x5f82) AM_READ_PORT("P2")
AM_RANGE(0x5f83, 0x5f83) AM_READ_PORT("DSW2")
AM_RANGE(0x5f84, 0x5f84) AM_READ_PORT("DSW1")
- AM_RANGE(0x5f88, 0x5f88) AM_READ(watchdog_reset_r) AM_WRITE(aliens_coin_counter_w) /* coin counters */
- AM_RANGE(0x5f8c, 0x5f8c) AM_WRITE(aliens_sh_irqtrigger_w) /* cause interrupt on audio CPU */
+ AM_RANGE(0x5f88, 0x5f88) AM_READ(watchdog_reset_r) AM_WRITE(aliens_coin_counter_w) /* coin counters */
+ AM_RANGE(0x5f8c, 0x5f8c) AM_WRITE(aliens_sh_irqtrigger_w) /* cause interrupt on audio CPU */
AM_RANGE(0x4000, 0x7fff) AM_READWRITE(k052109_051960_r, k052109_051960_w)
- AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM e24_j02.bin */
+ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM e24_j02.bin */
ADDRESS_MAP_END
static ADDRESS_MAP_START( aliens_sound_map, AS_PROGRAM, 8, aliens_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM g04_b03.bin */
- AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
+ AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM g04_b03.bin */
+ AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
+ AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
AM_RANGE(0xe000, 0xe00d) AM_DEVREADWRITE_LEGACY("k007232", k007232_r, k007232_w)
ADDRESS_MAP_END
@@ -148,30 +148,30 @@ static INPUT_PORTS_START( aliens )
/* "No Credits" = both coin slots open, but no effect on coin counters */
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x03, "1" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPUNUSED_DIPLOC( 0x0004, 0x0004, "SW2:3" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x0008, 0x0008, "SW2:4" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0010, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
+ PORT_DIPUNUSED_DIPLOC( 0x0004, 0x0004, "SW2:3" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x0008, 0x0008, "SW2:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x0010, 0x0010, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW3")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW3:2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW3:2" ) /* Listed as "Unused" */
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW3:3" )
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW3:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW3:4" ) /* Listed as "Unused" */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -199,7 +199,7 @@ static void volume_callback( device_t *device, int v )
static const k007232_interface k007232_config =
{
- volume_callback /* external port callback */
+ volume_callback /* external port callback */
};
@@ -247,11 +247,11 @@ static MACHINE_CONFIG_START( aliens, aliens_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", KONAMI, XTAL_24MHz/8) /* 052001 (verified on pcb) */
+ MCFG_CPU_ADD("maincpu", KONAMI, XTAL_24MHz/8) /* 052001 (verified on pcb) */
MCFG_CPU_PROGRAM_MAP(aliens_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", aliens_state, aliens_interrupt)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(aliens_sound_map)
@@ -259,7 +259,7 @@ static MACHINE_CONFIG_START( aliens, aliens_state )
MCFG_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(59.17) /* verified on pcb */
+ MCFG_SCREEN_REFRESH_RATE(59.17) /* verified on pcb */
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(64*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(14*8, (64-14)*8-1, 2*8, 30*8-1 )
@@ -274,12 +274,12 @@ static MACHINE_CONFIG_START( aliens, aliens_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_YM2151_ADD("ymsnd", XTAL_3_579545MHz) /* verified on pcb */
+ MCFG_YM2151_ADD("ymsnd", XTAL_3_579545MHz) /* verified on pcb */
MCFG_YM2151_PORT_WRITE_HANDLER(WRITE8(aliens_state,aliens_snd_bankswitch_w))
MCFG_SOUND_ROUTE(0, "mono", 0.60)
MCFG_SOUND_ROUTE(1, "mono", 0.60)
- MCFG_SOUND_ADD("k007232", K007232, XTAL_3_579545MHz) /* verified on pcb */
+ MCFG_SOUND_ADD("k007232", K007232, XTAL_3_579545MHz) /* verified on pcb */
MCFG_SOUND_CONFIG(k007232_config)
MCFG_SOUND_ROUTE(0, "mono", 0.20)
MCFG_SOUND_ROUTE(1, "mono", 0.20)
@@ -302,23 +302,23 @@ ROM_START( aliens )
ROM_LOAD( "875_b03.g04", 0x00000, 0x08000, CRC(1ac4d283) SHA1(2253f1f39c7edb6cef438b3d97f3af67a1f491ff) )
ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
- ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
- ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
+ ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
+ ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
/* second half empty */
- ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
- ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
+ ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
+ ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
/* second half empty */
ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
- ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
- ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
+ ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
+ ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
/* second half empty */
- ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
- ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
+ ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
+ ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
/* second half empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
+ ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232", 0 ) /* samples for 007232 */
ROM_LOAD( "875b04.e05", 0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
@@ -334,23 +334,23 @@ ROM_START( aliens2 )
ROM_LOAD( "875_b03.g04", 0x00000, 0x08000, CRC(1ac4d283) SHA1(2253f1f39c7edb6cef438b3d97f3af67a1f491ff) )
ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
- ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
- ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
+ ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
+ ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
/* second half empty */
- ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
- ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
+ ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
+ ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
/* second half empty */
ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
- ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
- ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
+ ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
+ ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
/* second half empty */
- ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
- ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
+ ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
+ ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
/* second half empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
+ ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232", 0 ) /* samples for 007232 */
ROM_LOAD( "875b04.e05", 0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
@@ -366,23 +366,23 @@ ROM_START( aliens3 )
ROM_LOAD( "875_b03.g04", 0x00000, 0x08000, CRC(1ac4d283) SHA1(2253f1f39c7edb6cef438b3d97f3af67a1f491ff) )
ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
- ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
- ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
+ ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
+ ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
/* second half empty */
- ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
- ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
+ ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
+ ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
/* second half empty */
ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
- ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
- ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
+ ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
+ ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
/* second half empty */
- ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
- ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
+ ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
+ ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
/* second half empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
+ ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232", 0 ) /* samples for 007232 */
ROM_LOAD( "875b04.e05", 0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
@@ -398,23 +398,23 @@ ROM_START( aliensu )
ROM_LOAD( "875_b03.g04", 0x00000, 0x08000, CRC(1ac4d283) SHA1(2253f1f39c7edb6cef438b3d97f3af67a1f491ff) )
ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
- ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
- ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
+ ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
+ ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
/* second half empty */
- ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
- ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
+ ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
+ ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
/* second half empty */
ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
- ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
- ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
+ ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
+ ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
/* second half empty */
- ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
- ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
+ ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
+ ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
/* second half empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
+ ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232", 0 ) /* samples for 007232 */
ROM_LOAD( "875b04.e05", 0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
@@ -430,23 +430,23 @@ ROM_START( aliensj )
ROM_LOAD( "875_k03.g04", 0x00000, 0x08000, CRC(bd86264d) SHA1(345fd666daf8a29ef314b14306c1a976cb159bed) )
ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
- ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
- ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
+ ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
+ ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
/* second half empty */
- ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
- ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
+ ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
+ ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
/* second half empty */
ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
- ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
- ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
+ ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
+ ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
/* second half empty */
- ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
- ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
+ ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
+ ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
/* second half empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
+ ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232", 0 ) /* samples for 007232 */
ROM_LOAD( "875b04.e05", 0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
@@ -462,23 +462,23 @@ ROM_START( aliensj2 )
ROM_LOAD( "875_k03.g04", 0x00000, 0x08000, CRC(bd86264d) SHA1(345fd666daf8a29ef314b14306c1a976cb159bed) )
ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
- ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
- ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
+ ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
+ ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
/* second half empty */
- ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
- ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
+ ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
+ ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
/* second half empty */
ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
- ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
- ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
+ ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
+ ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
/* second half empty */
- ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
- ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
+ ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
+ ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
/* second half empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
+ ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232", 0 ) /* samples for 007232 */
ROM_LOAD( "875b04.e05", 0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
@@ -494,23 +494,23 @@ ROM_START( aliensa )
ROM_LOAD( "875_k03.g04", 0x00000, 0x08000, CRC(bd86264d) SHA1(345fd666daf8a29ef314b14306c1a976cb159bed) )
ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
- ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
- ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
+ ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) ) /* characters (set 1) */
+ ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) ) /* characters (set 2) */
/* second half empty */
- ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
- ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
+ ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) ) /* characters (set 1) */
+ ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) ) /* characters (set 2) */
/* second half empty */
ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
- ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
- ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
+ ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) ) /* sprites (set 1) */
+ ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) ) /* sprites (set 2) */
/* second half empty */
- ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
- ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
+ ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) ) /* sprites (set 1) */
+ ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) ) /* sprites (set 2) */
/* second half empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
+ ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232", 0 ) /* samples for 007232 */
ROM_LOAD( "875b04.e05", 0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
diff --git a/src/mame/drivers/allied.c b/src/mame/drivers/allied.c
index 953772f3f05..8f696385cd7 100644
--- a/src/mame/drivers/allied.c
+++ b/src/mame/drivers/allied.c
@@ -14,7 +14,7 @@ class allied_state : public driver_device
public:
allied_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -72,15 +72,15 @@ ROM_END
#define rom_starshot rom_allied
-GAME(1977, allied, 0, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Allied System", GAME_IS_BIOS_ROOT)
-GAME(1977, suprpick, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Super Picker", GAME_IS_SKELETON_MECHANICAL)
-GAME(1977, royclark, allied, allied, allied, allied_state, allied, ROT0, "Fascination Int.", "Roy Clark - The Entertainer", GAME_IS_SKELETON_MECHANICAL)
-GAME(1977, thndbolt, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Thunderbolt", GAME_IS_SKELETON_MECHANICAL)
-GAME(1978, hoedown, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Hoe Down", GAME_IS_SKELETON_MECHANICAL)
-GAME(1978, takefive, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Take Five", GAME_IS_SKELETON_MECHANICAL)
-GAME(1978, heartspd, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Hearts & Spades", GAME_IS_SKELETON_MECHANICAL)
-GAME(1978, foathens, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Flame of Athens", GAME_IS_SKELETON_MECHANICAL)
-GAME(1979, disco79, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Disco '79", GAME_IS_SKELETON_MECHANICAL)
-GAME(1979, erosone, allied, allied, allied, allied_state, allied, ROT0, "Fascination Int.", "Eros One", GAME_IS_SKELETON_MECHANICAL)
-GAME(1979, circa33, allied, allied, allied, allied_state, allied, ROT0, "Fascination Int.", "Circa 1933", GAME_IS_SKELETON_MECHANICAL)
-GAME(1979, starshot, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Star Shooter", GAME_IS_SKELETON_MECHANICAL)
+GAME(1977, allied, 0, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Allied System", GAME_IS_BIOS_ROOT)
+GAME(1977, suprpick, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Super Picker", GAME_IS_SKELETON_MECHANICAL)
+GAME(1977, royclark, allied, allied, allied, allied_state, allied, ROT0, "Fascination Int.", "Roy Clark - The Entertainer", GAME_IS_SKELETON_MECHANICAL)
+GAME(1977, thndbolt, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Thunderbolt", GAME_IS_SKELETON_MECHANICAL)
+GAME(1978, hoedown, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Hoe Down", GAME_IS_SKELETON_MECHANICAL)
+GAME(1978, takefive, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Take Five", GAME_IS_SKELETON_MECHANICAL)
+GAME(1978, heartspd, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Hearts & Spades", GAME_IS_SKELETON_MECHANICAL)
+GAME(1978, foathens, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Flame of Athens", GAME_IS_SKELETON_MECHANICAL)
+GAME(1979, disco79, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Disco '79", GAME_IS_SKELETON_MECHANICAL)
+GAME(1979, erosone, allied, allied, allied, allied_state, allied, ROT0, "Fascination Int.", "Eros One", GAME_IS_SKELETON_MECHANICAL)
+GAME(1979, circa33, allied, allied, allied, allied_state, allied, ROT0, "Fascination Int.", "Circa 1933", GAME_IS_SKELETON_MECHANICAL)
+GAME(1979, starshot, allied, allied, allied, allied_state, allied, ROT0, "Allied Leisure", "Star Shooter", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/alpha68k.c b/src/mame/drivers/alpha68k.c
index fb7ef91a3be..c7d9bc89cc3 100644
--- a/src/mame/drivers/alpha68k.c
+++ b/src/mame/drivers/alpha68k.c
@@ -204,7 +204,7 @@ DIP locations verified from manuals for:
#include "sound/2203intf.h"
#include "includes/alpha68k.h"
-#define SBASEBAL_HACK 0
+#define SBASEBAL_HACK 0
/******************************************************************************/
@@ -271,10 +271,10 @@ READ16_MEMBER(alpha68k_state::control_4_r)
{
if (m_invert_controls)
return ~((((~(1 << ioport("IN6")->read())) << 4) & 0xf000)
- + (((~(1 << ioport("IN5")->read()))) & 0x0f00));
+ + (((~(1 << ioport("IN5")->read()))) & 0x0f00));
return (((~(1 << ioport("IN6")->read())) << 4) & 0xf000)
- + (((~(1 << ioport("IN5")->read()))) & 0x0f00);
+ + (((~(1 << ioport("IN5")->read()))) & 0x0f00);
}
READ16_MEMBER(alpha68k_state::jongbou_inputs_r)
@@ -333,9 +333,9 @@ WRITE16_MEMBER(alpha68k_state::tnextspc_soundlatch_w)
READ16_MEMBER(alpha68k_state::kyros_alpha_trigger_r)
{
/* possible jump codes:
- - Kyros : 0x22
- - Super Stingray : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
- */
+ - Kyros : 0x22
+ - Super Stingray : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
+ */
static const UINT8 coinage1[8][2]={{1,1}, {1,5}, {1,3}, {2,3}, {1,2}, {1,6}, {1,4}, {3,2}};
static const UINT8 coinage2[8][2]={{1,1}, {5,1}, {3,1}, {7,1}, {2,1}, {6,1}, {4,1}, {8,1}};
int source = m_shared_ram[offset];
@@ -351,7 +351,7 @@ READ16_MEMBER(alpha68k_state::kyros_alpha_trigger_r)
m_latch = 0;
if ((ioport("IN2")->read() & 0x1) == 0 && !m_latch)
{
- m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
+ m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
m_shared_ram[0x22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -367,7 +367,7 @@ READ16_MEMBER(alpha68k_state::kyros_alpha_trigger_r)
}
else if ((ioport("IN2")->read() & 0x2) == 0 && !m_latch)
{
- m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id >> 8); // coinB
+ m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id >> 8); // coinB
m_shared_ram[0x22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -383,12 +383,12 @@ READ16_MEMBER(alpha68k_state::kyros_alpha_trigger_r)
}
else
{
- if (m_microcontroller_id == 0x00ff) /* Super Stingry */
+ if (m_microcontroller_id == 0x00ff) /* Super Stingry */
{
- if (m_trigstate >= 12 || m_game_id == ALPHA68K_JONGBOU) /* arbitrary value ! */
+ if (m_trigstate >= 12 || m_game_id == ALPHA68K_JONGBOU) /* arbitrary value ! */
{
m_trigstate = 0;
- m_microcontroller_data = 0x21; // timer
+ m_microcontroller_data = 0x21; // timer
}
else
m_microcontroller_data = 0x00;
@@ -413,10 +413,10 @@ READ16_MEMBER(alpha68k_state::kyros_alpha_trigger_r)
READ16_MEMBER(alpha68k_state::alpha_II_trigger_r)
{
/* possible jump codes:
- - Time Soldiers : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
- - Sky Soldiers : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
- - Gold Medalist : 0x21,0x23,0x24,0x5b
- */
+ - Time Soldiers : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
+ - Sky Soldiers : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
+ - Gold Medalist : 0x21,0x23,0x24,0x5b
+ */
static const UINT8 coinage1[8][2] = {{1,1}, {1,2}, {1,3}, {1,4}, {1,5}, {1,6}, {2,3}, {3,2}};
static const UINT8 coinage2[8][2] = {{1,1}, {2,1}, {3,1}, {4,1}, {5,1}, {6,1}, {7,1}, {8,1}};
int source = m_shared_ram[offset];
@@ -436,7 +436,7 @@ READ16_MEMBER(alpha68k_state::alpha_II_trigger_r)
m_latch = 0;
if ((ioport("IN2")->read() & 0x1) == 0 && !m_latch)
{
- m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
+ m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
m_shared_ram[0x22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -459,7 +459,7 @@ READ16_MEMBER(alpha68k_state::alpha_II_trigger_r)
}
else if ((ioport("IN2")->read() & 0x2) == 0 && !m_latch)
{
- m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id >> 8); // coinB
+ m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id >> 8); // coinB
m_shared_ram[0x22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -482,8 +482,8 @@ READ16_MEMBER(alpha68k_state::alpha_II_trigger_r)
}
else
{
- if (m_microcontroller_id == 0x8803) /* Gold Medalist */
- m_microcontroller_data = 0x21; // timer
+ if (m_microcontroller_id == 0x8803) /* Gold Medalist */
+ m_microcontroller_data = 0x21; // timer
else
m_microcontroller_data = 0x00;
m_shared_ram[0x29] = (source & 0xff00) | m_microcontroller_data;
@@ -507,10 +507,10 @@ READ16_MEMBER(alpha68k_state::alpha_II_trigger_r)
READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
{
/* possible jump codes:
- - Sky Adventure : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
- - Gang Wars : 0x21,0x23,0x24,0x54
- - Super Champion Baseball : 0x21,0x23,0x24
- */
+ - Sky Adventure : 0x21,0x22,0x23,0x24,0x34,0x37,0x3a,0x3d,0x40,0x43,0x46,0x49
+ - Gang Wars : 0x21,0x23,0x24,0x54
+ - Super Champion Baseball : 0x21,0x23,0x24
+ */
static const UINT8 coinage1[8][2] = {{1,1}, {1,5}, {1,3}, {2,3}, {1,2}, {1,6}, {1,4}, {3,2}};
static const UINT8 coinage2[8][2] = {{1,1}, {5,1}, {3,1}, {7,1}, {2,1}, {6,1}, {4,1}, {8,1}};
int source = m_shared_ram[offset];
@@ -528,7 +528,7 @@ READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
m_latch = 0;
if ((ioport("IN2")->read() & 0x1) == 0 && !m_latch)
{
- m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
+ m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
m_shared_ram[0x22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -547,7 +547,7 @@ READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
}
else if ((ioport("IN2")->read() & 0x2) == 0 && !m_latch)
{
- m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id>>8); // coinB
+ m_shared_ram[0x29] = (source & 0xff00) | (m_coin_id>>8); // coinB
m_shared_ram[0x22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -586,7 +586,7 @@ READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
m_latch = 0;
if ((ioport("IN2")->read() & 0x1) == 0 && !m_latch)
{
- m_shared_ram[0x1f29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
+ m_shared_ram[0x1f29] = (source & 0xff00) | (m_coin_id & 0xff); // coinA
m_shared_ram[0x1f22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -605,7 +605,7 @@ READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
}
else if ((ioport("IN2")->read() & 0x2) == 0 && !m_latch)
{
- m_shared_ram[0x1f29] = (source & 0xff00) | (m_coin_id >> 8); // coinB
+ m_shared_ram[0x1f29] = (source & 0xff00) | (m_coin_id >> 8); // coinB
m_shared_ram[0x1f22] = (source & 0xff00) | 0x0;
m_latch = 1;
@@ -629,8 +629,8 @@ READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
}
/* Gang Wars expects the first dip to appear in RAM at 0x02c6,
- the microcontroller supplies it (it does for all the other games,
- but usually to 0x0 in RAM) when 0x21 is read (code at 0x009332) */
+ the microcontroller supplies it (it does for all the other games,
+ but usually to 0x0 in RAM) when 0x21 is read (code at 0x009332) */
source = m_shared_ram[0x0163];
m_shared_ram[0x0163] = (source & 0x00ff) | (ioport("IN4")->read() << 8);
@@ -651,7 +651,7 @@ READ16_MEMBER(alpha68k_state::alpha_V_trigger_r)
/******************************************************************************/
static ADDRESS_MAP_START( kyros_map, AS_PROGRAM, 16, alpha68k_state )
- AM_RANGE(0x000000, 0x01ffff) AM_ROM // main program
+ AM_RANGE(0x000000, 0x01ffff) AM_ROM // main program
AM_RANGE(0x020000, 0x020fff) AM_RAM AM_SHARE("shared_ram") // work RAM
AM_RANGE(0x040000, 0x041fff) AM_RAM AM_SHARE("spriteram") // sprite RAM
AM_RANGE(0x060000, 0x060001) AM_RAM AM_SHARE("videoram") // MSB: watchdog, LSB: BGC
@@ -661,13 +661,13 @@ static ADDRESS_MAP_START( kyros_map, AS_PROGRAM, 16, alpha68k_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( alpha68k_I_map, AS_PROGRAM, 16, alpha68k_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // main program
- AM_RANGE(0x080000, 0x083fff) AM_RAM // work RAM
- AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram") // video RAM
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // main program
+ AM_RANGE(0x080000, 0x083fff) AM_RAM // work RAM
+ AM_RANGE(0x100000, 0x103fff) AM_RAM AM_SHARE("spriteram") // video RAM
AM_RANGE(0x180000, 0x180001) AM_READ_PORT("IN3") AM_WRITENOP // LSB: DSW0, MSB: watchdog(?)
- AM_RANGE(0x180008, 0x180009) AM_READ_PORT("IN4") // LSB: DSW1
- AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0") // joy1, joy2
- AM_RANGE(0x340000, 0x340001) AM_READ_PORT("IN1") // coin, start, service
+ AM_RANGE(0x180008, 0x180009) AM_READ_PORT("IN4") // LSB: DSW1
+ AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0") // joy1, joy2
+ AM_RANGE(0x340000, 0x340001) AM_READ_PORT("IN1") // coin, start, service
AM_RANGE(0x380000, 0x380001) AM_READ_PORT("IN2") AM_WRITE(paddlema_soundlatch_w) // LSB: sound latch write and RST38 trigger, joy3, joy4
ADDRESS_MAP_END
@@ -865,36 +865,36 @@ ADDRESS_MAP_END
PORT_BIT( 0x8000, active, start )
#define ALPHA68K_COINAGE_BITS_0TO2 \
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:4,5,6") \
- PORT_DIPSETTING( 0x07, "A 1C/1C B 1C/1C" ) \
- PORT_DIPSETTING( 0x06, "A 1C/2C B 2C/1C" ) \
- PORT_DIPSETTING( 0x05, "A 1C/3C B 3C/1C" ) \
- PORT_DIPSETTING( 0x04, "A 1C/4C B 4C/1C" ) \
- PORT_DIPSETTING( 0x03, "A 1C/5C B 5C/1C" ) \
- PORT_DIPSETTING( 0x02, "A 1C/6C B 6C/1C" ) \
- PORT_DIPSETTING( 0x01, "A 2C/3C B 7C/1C" ) \
- PORT_DIPSETTING( 0x00, "A 3C/2C B 8C/1C" ) \
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:4,5,6") \
+ PORT_DIPSETTING( 0x07, "A 1C/1C B 1C/1C" ) \
+ PORT_DIPSETTING( 0x06, "A 1C/2C B 2C/1C" ) \
+ PORT_DIPSETTING( 0x05, "A 1C/3C B 3C/1C" ) \
+ PORT_DIPSETTING( 0x04, "A 1C/4C B 4C/1C" ) \
+ PORT_DIPSETTING( 0x03, "A 1C/5C B 5C/1C" ) \
+ PORT_DIPSETTING( 0x02, "A 1C/6C B 6C/1C" ) \
+ PORT_DIPSETTING( 0x01, "A 2C/3C B 7C/1C" ) \
+ PORT_DIPSETTING( 0x00, "A 3C/2C B 8C/1C" ) \
#define ALPHA68K_COINAGE_BITS_1TO3 \
- PORT_DIPNAME( 0x0e, 0x0e, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,5,6") \
- PORT_DIPSETTING( 0x0e, "A 1C/1C B 1C/1C" ) \
- PORT_DIPSETTING( 0x06, "A 1C/2C B 2C/1C" ) \
- PORT_DIPSETTING( 0x0a, "A 1C/3C B 3C/1C" ) \
- PORT_DIPSETTING( 0x02, "A 1C/4C B 4C/1C" ) \
- PORT_DIPSETTING( 0x0c, "A 1C/5C B 5C/1C" ) \
- PORT_DIPSETTING( 0x04, "A 1C/6C B 6C/1C" ) \
- PORT_DIPSETTING( 0x08, "A 2C/3C B 7C/1C" ) \
+ PORT_DIPNAME( 0x0e, 0x0e, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,5,6") \
+ PORT_DIPSETTING( 0x0e, "A 1C/1C B 1C/1C" ) \
+ PORT_DIPSETTING( 0x06, "A 1C/2C B 2C/1C" ) \
+ PORT_DIPSETTING( 0x0a, "A 1C/3C B 3C/1C" ) \
+ PORT_DIPSETTING( 0x02, "A 1C/4C B 4C/1C" ) \
+ PORT_DIPSETTING( 0x0c, "A 1C/5C B 5C/1C" ) \
+ PORT_DIPSETTING( 0x04, "A 1C/6C B 6C/1C" ) \
+ PORT_DIPSETTING( 0x08, "A 2C/3C B 7C/1C" ) \
PORT_DIPSETTING( 0x00, "A 3C/2C B 8C/1C" )
#define ALPHA68K_COINAGE_BITS_2TO4 \
- PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:2,3,4") \
- PORT_DIPSETTING( 0x1c, "A 1C/1C B 1C/1C" ) \
- PORT_DIPSETTING( 0x18, "A 1C/2C B 2C/1C" ) \
- PORT_DIPSETTING( 0x14, "A 1C/3C B 3C/1C" ) \
- PORT_DIPSETTING( 0x10, "A 1C/4C B 4C/1C" ) \
- PORT_DIPSETTING( 0x0c, "A 1C/5C B 5C/1C" ) \
- PORT_DIPSETTING( 0x08, "A 1C/6C B 6C/1C" ) \
- PORT_DIPSETTING( 0x04, "A 2C/3C B 7C/1C" ) \
+ PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:2,3,4") \
+ PORT_DIPSETTING( 0x1c, "A 1C/1C B 1C/1C" ) \
+ PORT_DIPSETTING( 0x18, "A 1C/2C B 2C/1C" ) \
+ PORT_DIPSETTING( 0x14, "A 1C/3C B 3C/1C" ) \
+ PORT_DIPSETTING( 0x10, "A 1C/4C B 4C/1C" ) \
+ PORT_DIPSETTING( 0x0c, "A 1C/5C B 5C/1C" ) \
+ PORT_DIPSETTING( 0x08, "A 1C/6C B 6C/1C" ) \
+ PORT_DIPSETTING( 0x04, "A 2C/3C B 7C/1C" ) \
PORT_DIPSETTING( 0x00, "A 3C/2C B 8C/1C" )
#define ALPHA68K_MCU \
@@ -934,11 +934,11 @@ static INPUT_PORTS_START( kyros )
ALPHA68K_PLAYER_INPUT_SWAP_LR_MSB( 2, IPT_UNKNOWN, IPT_START2, IP_ACTIVE_HIGH )
PORT_START("IN1") /* dipswitches */
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
//ALPHA68K_COINAGE_BITS_1TO3
- PORT_DIPNAME( 0x0e, 0x0e, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2,3,4")
+ PORT_DIPNAME( 0x0e, 0x0e, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2,3,4")
PORT_DIPSETTING( 0x0e, "A 1C/1C B 1C/1C" )
PORT_DIPSETTING( 0x06, "A 1C/2C B 2C/1C" )
PORT_DIPSETTING( 0x0a, "A 1C/3C B 3C/1C" )
@@ -947,15 +947,15 @@ static INPUT_PORTS_START( kyros )
PORT_DIPSETTING( 0x04, "A 1C/6C B 6C/1C" )
PORT_DIPSETTING( 0x08, "A 2C/3C B 7C/1C" )
PORT_DIPSETTING( 0x00, "A 3C/2C B 8C/1C" )
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x10, "4" )
PORT_DIPSETTING( 0x20, "5" )
PORT_DIPSETTING( 0x30, "6" )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
@@ -1005,7 +1005,7 @@ static INPUT_PORTS_START( jongbou )
INPUT_PORTS_END
static INPUT_PORTS_START( paddlema )
- PORT_START("IN0") // (bottom players)
+ PORT_START("IN0") // (bottom players)
ALPHA68K_PLAYER_INPUT_LSB( 1, IPT_UNKNOWN, IPT_UNKNOWN, IP_ACTIVE_LOW )
ALPHA68K_PLAYER_INPUT_MSB( 2, IPT_UNKNOWN, IPT_UNKNOWN, IP_ACTIVE_LOW )
@@ -1023,50 +1023,50 @@ static INPUT_PORTS_START( paddlema )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // "Test" ?
+ PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // "Test" ?
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN2") // (top players)
+ PORT_START("IN2") // (top players)
ALPHA68K_PLAYER_INPUT_LSB( 3, IPT_UNKNOWN, IPT_UNKNOWN, IP_ACTIVE_LOW )
ALPHA68K_PLAYER_INPUT_MSB( 4, IPT_UNKNOWN, IPT_UNKNOWN, IP_ACTIVE_LOW )
PORT_START("IN3") //DSW0
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:8,7")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:8,7")
PORT_DIPSETTING( 0x03, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:6,5")
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:6,5")
PORT_DIPSETTING( 0x0c, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("SW1:4,3") /* See notes for Game Time / Match Type combos */
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("SW1:4,3") /* See notes for Game Time / Match Type combos */
PORT_DIPSETTING( 0x00, "Defualt Time" )
PORT_DIPSETTING( 0x20, "+10 Seconds" )
PORT_DIPSETTING( 0x10, "+20 Seconds" )
PORT_DIPSETTING( 0x30, "+30 Seconds" )
- PORT_DIPNAME( 0xc0, 0x40, "Match Type" ) PORT_DIPLOCATION("SW1:2,1") /* Styles are for Upright/Table & Single/Dual controls???? */
- PORT_DIPSETTING( 0x80, "A to B" ) /* Manual shows "Upright Sytle B" */
- PORT_DIPSETTING( 0x00, "A to C" ) /* Manual shows "Upright Sytle A" */
- PORT_DIPSETTING( 0x40, "A to E" ) /* Manual shows "Table Sytle C" */
+ PORT_DIPNAME( 0xc0, 0x40, "Match Type" ) PORT_DIPLOCATION("SW1:2,1") /* Styles are for Upright/Table & Single/Dual controls???? */
+ PORT_DIPSETTING( 0x80, "A to B" ) /* Manual shows "Upright Sytle B" */
+ PORT_DIPSETTING( 0x00, "A to C" ) /* Manual shows "Upright Sytle A" */
+ PORT_DIPSETTING( 0x40, "A to E" ) /* Manual shows "Table Sytle C" */
// PORT_DIPSETTING( 0xc0, "A to B" ) /* Manual shows "Table Sytle D" */
- PORT_START("IN4") // DSW1
+ PORT_START("IN4") // DSW1
PORT_SERVICE_DIPLOC( 0x01, IP_ACTIVE_HIGH, "SW2:8" )
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x01, "SW2:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x01, "SW2:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x01, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x30, 0x00, "Game Mode" ) PORT_DIPLOCATION("SW2:4,3")
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x01, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x01, "SW2:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x01, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x30, 0x00, "Game Mode" ) PORT_DIPLOCATION("SW2:4,3")
PORT_DIPSETTING( 0x20, "Demo Sounds Off" )
PORT_DIPSETTING( 0x00, "Demo Sounds On" )
PORT_DIPSETTING( 0x10, "Win Match Against CPU (Cheat)")
PORT_DIPSETTING( 0x30, "Freeze" )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:2") /* Manual shows "Off" for this dipswitch */
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:2") /* Manual shows "Off" for this dipswitch */
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x40, DEF_STR( Japanese ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x80, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
INPUT_PORTS_END
@@ -1085,28 +1085,28 @@ static INPUT_PORTS_START( timesold )
PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
/* 2 physical sets of _6_ dip switches */
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:2,3")
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:2,3")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x18, DEF_STR( Normal ) )
// PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x10, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x20, DEF_STR( Japanese ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:5" ) /* Listed as "Unused" - See notes */
- PORT_DIPNAME( 0x80, 0x80, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6") /* Listed in the manual as "Free Play" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:5" ) /* Listed as "Unused" - See notes */
+ PORT_DIPNAME( 0x80, 0x80, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6") /* Listed in the manual as "Free Play" */
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN4") /* A 6 way dip switch */
ALPHA68K_COINAGE_BITS_0TO2
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2,1")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2,1")
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x10, "5" )
@@ -1135,28 +1135,28 @@ static INPUT_PORTS_START( btlfield )
PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
/* 2 physical sets of _6_ dip switches */
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:2,3")
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:2,3")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x18, DEF_STR( Normal ) )
// PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x10, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:4") /* Listed as "Unused". */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:4") /* Listed as "Unused". */
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x20, DEF_STR( Japanese ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:5" ) /* Listed as "Unused", see notes. */
- PORT_DIPNAME( 0x80, 0x80, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6")
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:5" ) /* Listed as "Unused", see notes. */
+ PORT_DIPNAME( 0x80, 0x80, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN4") /* A 6 way dip switch */
ALPHA68K_COINAGE_BITS_0TO2
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2,1")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2,1")
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x10, "5" )
@@ -1174,7 +1174,7 @@ static INPUT_PORTS_START( btlfieldb )
PORT_INCLUDE( btlfield )
PORT_MODIFY("IN4") /* A 6 way dip switch */
- PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:4,5,6")
+ PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:4,5,6")
PORT_DIPSETTING( 0x00, "A 1C/1C B 1C/1C" )
PORT_DIPSETTING( 0x01, "A 1C/2C B 2C/1C" )
PORT_DIPSETTING( 0x02, "A 1C/3C B 3C/1C" )
@@ -1183,7 +1183,7 @@ static INPUT_PORTS_START( btlfieldb )
PORT_DIPSETTING( 0x05, "A 1C/6C B 6C/1C" )
PORT_DIPSETTING( 0x06, "A 2C/3C B 7C/1C" )
PORT_DIPSETTING( 0x07, "A 3C/2C B 8C/1C" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW1:2" )
@@ -1212,30 +1212,30 @@ static INPUT_PORTS_START( skysoldr )
PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
/* 2 physical sets of _6_ dip switches */
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:2,3")
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:2,3")
PORT_DIPSETTING( 0x08, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x10, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x18, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:4") /* Manual states "Always On" */
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:4") /* Manual states "Always On" */
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x20, DEF_STR( Japanese ) )
- PORT_DIPNAME( 0x40, 0x40, "Manufacturer" ) PORT_DIPLOCATION("SW1:5") /* Manual states "Always Off" See notes */
+ PORT_DIPNAME( 0x40, 0x40, "Manufacturer" ) PORT_DIPLOCATION("SW1:5") /* Manual states "Always Off" See notes */
PORT_DIPSETTING( 0x40, "SNK" )
PORT_DIPSETTING( 0x00, "Romstar" )
- PORT_DIPNAME( 0x80, 0x80, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x80, 0x80, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN4") /* A 6 way dip switch */
ALPHA68K_COINAGE_BITS_0TO2
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2,1")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2,1")
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x10, "5" )
@@ -1277,30 +1277,30 @@ static INPUT_PORTS_START( goldmedl )
PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
/* 2 physical sets of _6_ dip switches */
- PORT_DIPNAME( 0x04, 0x00, "Event Select" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x04, 0x00, "Event Select" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x88, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:2,6")
+ PORT_DIPNAME( 0x88, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:2,6")
PORT_DIPSETTING( 0x00, "Upright 2 Players" )
PORT_DIPSETTING( 0x80, "Upright 4 Players" )
PORT_DIPSETTING( 0x88, DEF_STR( Cocktail ) )
//PORT_DIPSETTING( 0x08, DEF_STR( Cocktail ) ) /* Not documented. */
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START3 ) PORT_DIPLOCATION("SW1:3") /* Listed as "Always OFF". */
- PORT_DIPNAME( 0x20, 0x20, "Speed For 100M Dash" ) PORT_DIPLOCATION("SW1:4")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START3 ) PORT_DIPLOCATION("SW1:3") /* Listed as "Always OFF". */
+ PORT_DIPNAME( 0x20, 0x20, "Speed For 100M Dash" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, "10 Beats For Max Speed" )
PORT_DIPSETTING( 0x20, "14 Beats For Max Speed" )
- PORT_DIPNAME( 0x40, 0x40, "Computer Demonstration" ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x40, 0x40, "Computer Demonstration" ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_START("IN4") /* A 6 way dip switch */
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x03, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x02, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) )
ALPHA68K_COINAGE_BITS_2TO4
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -1326,28 +1326,28 @@ static INPUT_PORTS_START( skyadvnt )
PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
/* 2 physical sets of _6_ dip switches */
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x08, "2" )
PORT_DIPSETTING( 0x0c, "3" )
PORT_DIPSETTING( 0x04, "4" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:3" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:4,5") // See notes
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:3" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:4,5") // See notes
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x60, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("IN4") /* A 6 way dip switch */
- PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW1:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW1:6" ) /* Listed as "Unused" */
ALPHA68K_COINAGE_BITS_1TO3
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -1358,13 +1358,13 @@ static INPUT_PORTS_START( skyadvntu )
PORT_INCLUDE( skyadvnt )
PORT_MODIFY("IN4") /* A 6 way dip switch */
- PORT_DIPNAME( 0x01, 0x00, "Price to Continue" ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x01, 0x00, "Price to Continue" ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, "Same as Start" )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x02, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
@@ -1387,39 +1387,39 @@ static INPUT_PORTS_START( gangwarsu )
PORT_SERVICE_NO_TOGGLE(0x02, IP_ACTIVE_LOW)
/* 2 physical sets of _6_ dip switches */
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x08, "2" )
PORT_DIPSETTING( 0x0c, "3" )
PORT_DIPSETTING( 0x04, "4" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x10, 0x00, "Timer Speed" ) PORT_DIPLOCATION("SW2:3") // Check code at 0x01923a
- PORT_DIPSETTING( 0x00, "Slow" ) // 1 second = 0x01ff
- PORT_DIPSETTING( 0x10, DEF_STR( Normal ) ) // 1 second = 0x013f
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPNAME( 0x10, 0x00, "Timer Speed" ) PORT_DIPLOCATION("SW2:3") // Check code at 0x01923a
+ PORT_DIPSETTING( 0x00, "Slow" ) // 1 second = 0x01ff
+ PORT_DIPSETTING( 0x10, DEF_STR( Normal ) ) // 1 second = 0x013f
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x60, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("IN4") /* A 6 way dip switch */
- PORT_DIPNAME( 0x01, 0x00, "Price to Continue" ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x01, 0x00, "Price to Continue" ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, "Same as Start" )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x02, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -1427,19 +1427,19 @@ INPUT_PORTS_END
/* Same as 'gangwarsu' but bits 0-3 of 2nd set of Dip Switches are different */
static INPUT_PORTS_START( gangwars )
- PORT_INCLUDE( gangwarsu ) /* See notes about "IN2" (microcontroller) */
+ PORT_INCLUDE( gangwarsu ) /* See notes about "IN2" (microcontroller) */
PORT_MODIFY("IN3")
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:1" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:1" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x08, "3" )
PORT_DIPSETTING( 0x00, "4" )
PORT_MODIFY("IN4") /* A 6 way dip switch */
- PORT_DIPNAME( 0x01, 0x00, "Coin Slots" ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x01, 0x00, "Coin Slots" ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x01, "2" )
- PORT_DIPNAME( 0x0e, 0x0e, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4,5")
+ PORT_DIPNAME( 0x0e, 0x0e, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3,4,5")
PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
@@ -1462,7 +1462,7 @@ static INPUT_PORTS_START( sbasebal )
#if SBASEBAL_HACK
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
#else
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) // COIN2 - unused due to code at 0x0002b4
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) // COIN2 - unused due to code at 0x0002b4
#endif
PORT_START("IN3") /* Service + dip */
@@ -1479,7 +1479,7 @@ static INPUT_PORTS_START( sbasebal )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unused ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) // Check code at 0x0089e6
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) // Check code at 0x0089e6
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Game_Time ) )
@@ -1496,7 +1496,7 @@ static INPUT_PORTS_START( sbasebal )
#endif
PORT_START("IN4") /* A 6 way dip switch */
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) // Check code at 0x009d3a
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) // Check code at 0x009d3a
PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
@@ -1537,46 +1537,46 @@ static INPUT_PORTS_START( tnextspc )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW1:2" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x04, 0x04, "Additional Bonus Life" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW1:2" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x04, 0x04, "Additional Bonus Life" ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x04, "2nd Extend ONLY" )
PORT_DIPSETTING( 0x00, "Every Extend" )
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW1:4" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW1:4" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x30, "A 1C/1C B 1C/2C" )
PORT_DIPSETTING( 0x20, "A 2C/1C B 1C/3C" )
PORT_DIPSETTING( 0x10, "A 3C/1C B 1C/5C" )
PORT_DIPSETTING( 0x00, "A 4C/1C B 1C/6C" )
- PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:7,8")
PORT_DIPSETTING( 0xc0, "2" )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0x40, "4" )
PORT_DIPSETTING( 0x00, "5" )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3") PORT_CONDITION("DSW2",0x08,EQUALS,0x08)
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3") PORT_CONDITION("DSW2",0x08,EQUALS,0x08)
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, "Game Mode" ) PORT_DIPLOCATION("SW2:3") PORT_CONDITION("DSW2",0x08,EQUALS,0x00)
+ PORT_DIPNAME( 0x04, 0x04, "Game Mode" ) PORT_DIPLOCATION("SW2:3") PORT_CONDITION("DSW2",0x08,EQUALS,0x00)
PORT_DIPSETTING( 0x00, "Freeze" )
PORT_DIPSETTING( 0x04, "Infinite Lives (Cheat)")
- PORT_DIPNAME( 0x08, 0x08, "SW2:3 Demo Sound/Game Mode" ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x08, 0x08, "SW2:3 Demo Sound/Game Mode" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, DEF_STR( Demo_Sounds ) )
PORT_DIPSETTING( 0x00, "Game Mode" )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x30, "100000 200000" )
PORT_DIPSETTING( 0x20, "150000 300000" )
PORT_DIPSETTING( 0x10, "300000 500000" )
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
PORT_SERVICE_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW2:8" )
@@ -1614,9 +1614,9 @@ static const gfx_layout spritelayout =
4, /* 4 bits per pixel */
{ 0, 0x80000*8, 0x100000*8, 0x180000*8 },
{ 16*8+7, 16*8+6, 16*8+5, 16*8+4, 16*8+3, 16*8+2, 16*8+1, 16*8+0,
- 7, 6, 5, 4, 3, 2, 1, 0 },
+ 7, 6, 5, 4, 3, 2, 1, 0 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
8*32 /* every sprite takes 32 consecutive bytes */
};
@@ -1627,9 +1627,9 @@ static const gfx_layout spritelayout_V =
4, /* 4 bits per pixel */
{ RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) },
{ 16*8+7, 16*8+6, 16*8+5, 16*8+4, 16*8+3, 16*8+2, 16*8+1, 16*8+0,
- 7, 6, 5, 4, 3, 2, 1, 0 },
+ 7, 6, 5, 4, 3, 2, 1, 0 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
8*32 /* every sprite takes 32 consecutive bytes */
};
@@ -1871,7 +1871,7 @@ MACHINE_START_MEMBER(alpha68k_state,common)
save_item(NAME(m_trigstate));
save_item(NAME(m_deposits1));
save_item(NAME(m_deposits2));
- save_item(NAME(m_credits));
+ save_item(NAME(m_credits));
save_item(NAME(m_coinvalue));
save_item(NAME(m_microcontroller_data));
save_item(NAME(m_latch));
@@ -1964,7 +1964,7 @@ static MACHINE_CONFIG_START( sstingry, alpha68k_state )
MCFG_CPU_PERIODIC_INT_DRIVER(alpha68k_state, irq0_line_hold, 2*60)
MCFG_CPU_PERIODIC_INT_DRIVER(alpha68k_state, nmi_line_pulse, 4000)
- MCFG_CPU_ADD("mcu", I8748, 9263750) /* 9.263750 MHz oscillator, divided by 3*5 internally */
+ MCFG_CPU_ADD("mcu", I8748, 9263750) /* 9.263750 MHz oscillator, divided by 3*5 internally */
// MCFG_CPU_PROGRAM_MAP(i8748_map)
MCFG_CPU_IO_MAP(i8748_portmap)
MCFG_DEVICE_DISABLE()
@@ -2003,12 +2003,12 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( kyros, alpha68k_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_24MHz/4) /* Verified on bootleg PCB */
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_24MHz/4) /* Verified on bootleg PCB */
MCFG_CPU_PROGRAM_MAP(kyros_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", alpha68k_state, irq1_line_hold)
MCFG_CPU_PERIODIC_INT_DRIVER(alpha68k_state, irq2_line_hold, 60) // MCU irq
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) /* Verified on bootleg PCB */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_24MHz/6) /* Verified on bootleg PCB */
MCFG_CPU_PROGRAM_MAP(kyros_sound_map)
MCFG_CPU_IO_MAP(kyros_sound_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(alpha68k_state, irq0_line_hold, 2*60)
@@ -2033,13 +2033,13 @@ static MACHINE_CONFIG_START( kyros, alpha68k_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ym1", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
+ MCFG_SOUND_ADD("ym1", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.35)
- MCFG_SOUND_ADD("ym2", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
+ MCFG_SOUND_ADD("ym2", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.35)
- MCFG_SOUND_ADD("ym3", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
+ MCFG_SOUND_ADD("ym3", YM2203, XTAL_24MHz/12) /* Verified on bootleg PCB */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
MCFG_DAC_ADD("dac")
@@ -2349,7 +2349,7 @@ ROM_START( sstingry )
ROM_LOAD( "ss_01.rom", 0x0000, 0x4000, CRC(fef09a92) SHA1(77b6aded1eed1bd5e6ffb25b56b62b10b7b9a304) )
ROM_LOAD( "ss_02.rom", 0x4000, 0x4000, CRC(ab4e8c01) SHA1(d96e7f97945fff48fb7b4661fdb575ac7ff77445) )
- ROM_REGION( 0x0400, "mcu", 0 ) /* 8748 MCU code */
+ ROM_REGION( 0x0400, "mcu", 0 ) /* 8748 MCU code */
ROM_LOAD( "d8748.bin", 0x0000, 0x0400, CRC(7fcbfc30) SHA1(6d087a3d44e475b6c8260a5134952097f26459b7) )
ROM_REGION( 0x60000, "gfx1", 0 )
@@ -3161,7 +3161,7 @@ DRIVER_INIT_MEMBER(alpha68k_state,jongbou)
DRIVER_INIT_MEMBER(alpha68k_state,paddlema)
{
m_microcontroller_id = 0;
- m_coin_id = 0; // Not needed !
+ m_coin_id = 0; // Not needed !
m_game_id = 0;
}
@@ -3262,11 +3262,11 @@ DRIVER_INIT_MEMBER(alpha68k_state,sbasebal)
UINT16 *rom = (UINT16 *)memregion("maincpu")->base();
/* Patch protection check, it does a divide by zero because the MCU is trying to
- calculate the ball speed when a strike is scored, notice that current emulation
- just returns 49 mi/h every time that this event happens.
- 68k reads at [0x4023e], then subtracts this value with [0x41838], presumably it's raw speed minus angle.
- main CPU then writes the result to RAM location [0x41866], probably just to signal the result to the MCU.
- */
+ calculate the ball speed when a strike is scored, notice that current emulation
+ just returns 49 mi/h every time that this event happens.
+ 68k reads at [0x4023e], then subtracts this value with [0x41838], presumably it's raw speed minus angle.
+ main CPU then writes the result to RAM location [0x41866], probably just to signal the result to the MCU.
+ */
rom[0xb672/2] = 0x4e71;
/* And patch the ROM checksums */
@@ -3281,7 +3281,7 @@ DRIVER_INIT_MEMBER(alpha68k_state,sbasebal)
#endif
m_invert_controls = 0;
- m_microcontroller_id = 0x8512; // Same as 'gangwars' ?
+ m_microcontroller_id = 0x8512; // Same as 'gangwars' ?
m_coin_id = 0x23 | (0x24 << 8);
m_game_id = 0;
}
@@ -3290,7 +3290,7 @@ DRIVER_INIT_MEMBER(alpha68k_state,tnextspc)
{
m_invert_controls = 0;
m_microcontroller_id = 0x890a;
- m_coin_id = 0; // Not needed !
+ m_coin_id = 0; // Not needed !
m_game_id = 0;
}
diff --git a/src/mame/drivers/alvg.c b/src/mame/drivers/alvg.c
index d6f27defee6..c05e058918f 100644
--- a/src/mame/drivers/alvg.c
+++ b/src/mame/drivers/alvg.c
@@ -7,7 +7,7 @@ class alvg_state : public driver_device
public:
alvg_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -241,11 +241,11 @@ ROM_START(usafootb)
ROM_END
-GAME(1991, agsoccer, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "A.G. Soccer Ball", GAME_IS_SKELETON_MECHANICAL)
-GAME(1992, wrldtour, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Al's Garage Band Goes On A World Tour", GAME_IS_SKELETON_MECHANICAL)
-GAME(1992, wrldtour2, wrldtour, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Al's Garage Band Goes On A World Tour R02b", GAME_IS_SKELETON_MECHANICAL)
-GAME(1993, usafootb, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "U.S.A. Football", GAME_IS_SKELETON_MECHANICAL)
-GAME(1993, mystcast, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Mystery Castle", GAME_IS_SKELETON_MECHANICAL)
-GAME(1993, pstlpkr, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Pistol Poker", GAME_IS_SKELETON_MECHANICAL)
-GAME(1993, punchy, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Punchy The Clown", GAME_IS_SKELETON_MECHANICAL)
-GAME(1993, dinoeggs, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Dinosaur Eggs", GAME_IS_SKELETON_MECHANICAL)
+GAME(1991, agsoccer, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "A.G. Soccer Ball", GAME_IS_SKELETON_MECHANICAL)
+GAME(1992, wrldtour, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Al's Garage Band Goes On A World Tour", GAME_IS_SKELETON_MECHANICAL)
+GAME(1992, wrldtour2, wrldtour, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Al's Garage Band Goes On A World Tour R02b", GAME_IS_SKELETON_MECHANICAL)
+GAME(1993, usafootb, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "U.S.A. Football", GAME_IS_SKELETON_MECHANICAL)
+GAME(1993, mystcast, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Mystery Castle", GAME_IS_SKELETON_MECHANICAL)
+GAME(1993, pstlpkr, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Pistol Poker", GAME_IS_SKELETON_MECHANICAL)
+GAME(1993, punchy, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Punchy The Clown", GAME_IS_SKELETON_MECHANICAL)
+GAME(1993, dinoeggs, 0, alvg, alvg, alvg_state, alvg, ROT0, "Alvin G", "Dinosaur Eggs", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/amaticmg.c b/src/mame/drivers/amaticmg.c
index 97d797a2fce..2bb7b35061b 100644
--- a/src/mame/drivers/amaticmg.c
+++ b/src/mame/drivers/amaticmg.c
@@ -408,10 +408,10 @@
***********************************************************************************/
-#define MASTER_CLOCK XTAL_16MHz
-#define CPU_CLOCK MASTER_CLOCK/4 /* guess */
-#define SND_CLOCK MASTER_CLOCK/4 /* guess */
-#define CRTC_CLOCK MASTER_CLOCK/8 /* guess */
+#define MASTER_CLOCK XTAL_16MHz
+#define CPU_CLOCK MASTER_CLOCK/4 /* guess */
+#define SND_CLOCK MASTER_CLOCK/4 /* guess */
+#define CRTC_CLOCK MASTER_CLOCK/8 /* guess */
#include "emu.h"
@@ -518,8 +518,8 @@ UINT32 amaticmg_state::screen_update_amaticmg2(screen_device &screen, bitmap_ind
void amaticmg_state::palette_init()
{
const UINT8 *color_prom = machine().root_device().memregion("proms")->base();
- int bit0, bit1, bit2 , r, g, b;
- int i;
+ int bit0, bit1, bit2 , r, g, b;
+ int i;
for (i = 0; i < 0x200; ++i)
{
@@ -545,8 +545,8 @@ void amaticmg_state::palette_init()
PALETTE_INIT_MEMBER(amaticmg_state,amaticmg2)
{
const UINT8 *color_prom = machine().root_device().memregion("proms")->base();
- int r, g, b;
- int i;
+ int r, g, b;
+ int i;
for (i = 0; i < machine().root_device().memregion("proms")->bytes(); i+=2)
{
@@ -585,10 +585,10 @@ WRITE8_MEMBER(amaticmg_state::out_a_w)
-x-- ---- HOLD4
*/
- output_set_lamp_value(0, (data >> 3) & 1); /* START */
- output_set_lamp_value(1, (data >> 4) & 1); /* BET */
- output_set_lamp_value(2, (data >> 5) & 1); /* HOLD3 */
- output_set_lamp_value(3, (data >> 6) & 1); /* HOLD4 */
+ output_set_lamp_value(0, (data >> 3) & 1); /* START */
+ output_set_lamp_value(1, (data >> 4) & 1); /* BET */
+ output_set_lamp_value(2, (data >> 5) & 1); /* HOLD3 */
+ output_set_lamp_value(3, (data >> 6) & 1); /* HOLD4 */
logerror("port A: %2X\n", data);
}
@@ -606,9 +606,9 @@ WRITE8_MEMBER(amaticmg_state::out_c_w)
x--- ---- Hopper motor
--x- x--- (unknown)
*/
- output_set_lamp_value(4, (data >> 1) & 1); /* HOLD1 */
- output_set_lamp_value(5, (data >> 4) & 1); /* HOLD2 */
- output_set_lamp_value(6, (data >> 6) & 1); /* CANCEL */
+ output_set_lamp_value(4, (data >> 1) & 1); /* HOLD1 */
+ output_set_lamp_value(5, (data >> 4) & 1); /* HOLD2 */
+ output_set_lamp_value(6, (data >> 6) & 1); /* CANCEL */
// coin_counter_w(machine(), 0, data & 0x04); /* Coin In */
// coin_counter_w(machine(), 1, data & 0x01); /* Coin Out */
@@ -658,8 +658,8 @@ static ADDRESS_MAP_START( amaticmg2_portmap, AS_IO, 8, amaticmg_state )
AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ppi8255_0", i8255_device, read, write)
AM_RANGE(0x20, 0x23) AM_DEVREADWRITE("ppi8255_1", i8255_device, read, write)
AM_RANGE(0x40, 0x41) AM_DEVWRITE_LEGACY("ymsnd", ym3812_w)
- AM_RANGE(0x60, 0x60) AM_DEVWRITE("crtc", mc6845_device, address_w) // 0e for mg_iii_vger_3.64_v_8309
- AM_RANGE(0x61, 0x61) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) // 0f for mg_iii_vger_3.64_v_8309
+ AM_RANGE(0x60, 0x60) AM_DEVWRITE("crtc", mc6845_device, address_w) // 0e for mg_iii_vger_3.64_v_8309
+ AM_RANGE(0x61, 0x61) AM_DEVREADWRITE("crtc", mc6845_device, register_r, register_w) // 0f for mg_iii_vger_3.64_v_8309
AM_RANGE(0xc0, 0xc0) AM_WRITE(rombank_w)
AM_RANGE(0xe6, 0xe6) AM_WRITE(nmi_mask_w)
ADDRESS_MAP_END
@@ -692,21 +692,21 @@ static INPUT_PORTS_START( amaticmg )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Service B (Dienst B") PORT_CODE(KEYCODE_8) PORT_TOGGLE
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_NAME("Coin 2 (Muenze 2)") PORT_IMPULSE(3)
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hopper Payout pulse") PORT_IMPULSE(3) PORT_CODE(KEYCODE_Q) // Hopper paying pulse
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hopper Payout pulse") PORT_IMPULSE(3) PORT_CODE(KEYCODE_Q) // Hopper paying pulse
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) PORT_CODE(KEYCODE_W) // 'Ausgegeben 0 - Hopper Leer' (spent 0 - hopper empty)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 (Halten 3)")
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2 (Halten 2)")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3 (Halten 3)")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2 (Halten 2)")
PORT_START("IN2")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Take (Loeschen)")
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1 (Halten 1)")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Clear / Take (Loeschen)")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1 (Halten 1)")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service A (Dienst A") PORT_CODE(KEYCODE_7) PORT_TOGGLE
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) PORT_NAME("Bet (Setzen) / Half Take")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME("Service C (Dienst C") PORT_CODE(KEYCODE_9) PORT_TOGGLE
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service (Master)") PORT_CODE(KEYCODE_0)
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 (Halten 4)")
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 (Halten 4)")
PORT_START("IN3")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -719,28 +719,28 @@ static INPUT_PORTS_START( amaticmg )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("SW1")
- PORT_DIPNAME( 0x01, 0x01, "DIP1") PORT_DIPLOCATION("DIP:1")
+ PORT_DIPNAME( 0x01, 0x01, "DIP1") PORT_DIPLOCATION("DIP:1")
PORT_DIPSETTING( 0x01, "Off (Aus)" )
PORT_DIPSETTING( 0x00, "On (Ein)" )
- PORT_DIPNAME( 0x02, 0x02, "DIP2") PORT_DIPLOCATION("DIP:2")
+ PORT_DIPNAME( 0x02, 0x02, "DIP2") PORT_DIPLOCATION("DIP:2")
PORT_DIPSETTING( 0x02, "Off (Aus)" )
PORT_DIPSETTING( 0x00, "On (Ein)" )
- PORT_DIPNAME( 0x04, 0x04, "Coin 1 (Muenzen 1)" ) PORT_DIPLOCATION("DIP:3")
+ PORT_DIPNAME( 0x04, 0x04, "Coin 1 (Muenzen 1)" ) PORT_DIPLOCATION("DIP:3")
PORT_DIPSETTING( 0x04, "10" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x08, 0x08, "Coin 2 (Muenzen 2)" ) PORT_DIPLOCATION("DIP:4")
+ PORT_DIPNAME( 0x08, 0x08, "Coin 2 (Muenzen 2)" ) PORT_DIPLOCATION("DIP:4")
PORT_DIPSETTING( 0x08, "100" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x10, 0x10, "Jackpot") PORT_DIPLOCATION("DIP:5")
+ PORT_DIPNAME( 0x10, 0x10, "Jackpot") PORT_DIPLOCATION("DIP:5")
PORT_DIPSETTING( 0x10, "Jackpot KZB")
PORT_DIPSETTING( 0x00, "Jackpot LZB")
- PORT_DIPNAME( 0x20, 0x20, "Fruechtebonus" ) PORT_DIPLOCATION("DIP:6")
+ PORT_DIPNAME( 0x20, 0x20, "Fruechtebonus" ) PORT_DIPLOCATION("DIP:6")
PORT_DIPSETTING( 0x20, "Fruechtebonus Bleibt" )
PORT_DIPSETTING( 0x00, "Fruechtebonus Clear" )
- PORT_DIPNAME( 0x40, 0x40, "DIP7") PORT_DIPLOCATION("DIP:7")
+ PORT_DIPNAME( 0x40, 0x40, "DIP7") PORT_DIPLOCATION("DIP:7")
PORT_DIPSETTING( 0x40, "Off (Aus)" )
PORT_DIPSETTING( 0x00, "On (Ein)" )
- PORT_DIPNAME( 0x80, 0x80, "BH") PORT_DIPLOCATION("DIP:8")
+ PORT_DIPNAME( 0x80, 0x80, "BH") PORT_DIPLOCATION("DIP:8")
PORT_DIPSETTING( 0x80, "BH Dreifach")
PORT_DIPSETTING( 0x00, "BH Normal")
INPUT_PORTS_END
@@ -767,7 +767,7 @@ static const gfx_layout charlayout_6bpp =
RGN_FRAC(1,3),
6,
{ RGN_FRAC(0,3) + 0, RGN_FRAC(0,3) + 4, RGN_FRAC(1,3) + 0, RGN_FRAC(1,3) + 4,RGN_FRAC(2,3) + 0, RGN_FRAC(2,3) + 4, },
- { 3, 2, 1, 0 }, /* tiles are x-flipped */
+ { 3, 2, 1, 0 }, /* tiles are x-flipped */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
8*4*2
};
@@ -820,22 +820,22 @@ static const mc6845_interface mc6845_intf =
static I8255A_INTERFACE( ppi8255_intf_0 )
{
- DEVCB_INPUT_PORT("IN0"), /* Port A read */
- DEVCB_NULL, /* Port A write */
- DEVCB_INPUT_PORT("IN1"), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_INPUT_PORT("IN2"), /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_INPUT_PORT("IN0"), /* Port A read */
+ DEVCB_NULL, /* Port A write */
+ DEVCB_INPUT_PORT("IN1"), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_INPUT_PORT("IN2"), /* Port C read */
+ DEVCB_NULL /* Port C write */
};
static I8255A_INTERFACE( ppi8255_intf_1 )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(amaticmg_state,out_a_w), /* Port A write */
- DEVCB_INPUT_PORT("SW1"), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_NULL, /* Port C read */
- DEVCB_DRIVER_MEMBER(amaticmg_state,out_c_w) /* Port C write */
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(amaticmg_state,out_a_w), /* Port A write */
+ DEVCB_INPUT_PORT("SW1"), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_NULL, /* Port C read */
+ DEVCB_DRIVER_MEMBER(amaticmg_state,out_c_w) /* Port C write */
};
@@ -864,7 +864,7 @@ void amaticmg_state::machine_reset()
static MACHINE_CONFIG_START( amaticmg, amaticmg_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) /* WRONG! */
+ MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) /* WRONG! */
MCFG_CPU_PROGRAM_MAP(amaticmg_map)
MCFG_CPU_IO_MAP(amaticmg_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", amaticmg_state, nmi_line_pulse) // no NMI mask?
@@ -934,7 +934,7 @@ MACHINE_CONFIG_END
ROM_START( suprstar )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x20000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x20000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "u3.bin", 0x00000, 0x20000, CRC(29bf4a95) SHA1(a73873f7cd1fdf5accc3e79f4619949f261400b8) )
ROM_REGION( 0x10000, "gfx1", 0 )
@@ -951,7 +951,7 @@ ROM_END
ROM_START( am_mg24 )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "mgi_vger_3.9-i-8201.i6.bin", 0x00000, 0x40000, CRC(9ce159f7) SHA1(101c277d579a69cb03f879288b2cecf838cf1741) )
ROM_REGION( 0x180000, "gfx1", 0 )
@@ -967,7 +967,7 @@ ROM_END
ROM_START( am_mg3 )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "mg_iii_vger_3.5-i-8205.bin", 0x00000, 0x40000, CRC(21d64029) SHA1(d5c3fde02833a96dd7a43481a489bfc4a5c9609d) )
ROM_REGION( 0x180000, "gfx1", 0 )
@@ -982,7 +982,7 @@ ROM_END
ROM_START( am_mg3a )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "mg_iii_vger_3.64_v_8309.i16", 0x00000, 0x40000, CRC(c54f97c4) SHA1(d5ce91be7332ada304d18d07706e3b98ac0fa74b) )
ROM_REGION( 0x180000, "gfx1", 0 )
@@ -999,7 +999,7 @@ ROM_END
ROM_START( am_mg31i )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "mgi_sita_3.1_o_8270.bin", 0x00000, 0x40000, CRC(7358bdde) SHA1(674b57ddaaaed9b88ad563762b2421be7057e498) )
ROM_REGION( 0x180000, "gfx1", 0 )
@@ -1014,7 +1014,7 @@ ROM_END
ROM_START( am_mg33i )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "mgi_sita_3.3_o_8270.bin", 0x00000, 0x40000, CRC(eaa1ed83) SHA1(e50d06ea3631bd6e4f5fe14d8283c3550b2779a6) )
ROM_REGION( 0x180000, "gfx1", 0 )
@@ -1029,7 +1029,7 @@ ROM_END
ROM_START( am_mg34i )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "mgi_sita_3.4_o_8270.bin", 0x00000, 0x40000, CRC(bea7cd25) SHA1(89c9e02b48f34b2168e8624e552ead476cc339b9) )
ROM_REGION( 0x180000, "gfx1", 0 )
@@ -1044,7 +1044,7 @@ ROM_END
ROM_START( am_mg35i )
ROM_REGION( 0x40000, "maincpu", ROMREGION_ERASE00 )
- ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
+ ROM_REGION( 0x40000, "mainprg", 0 ) /* encrypted program ROM...*/
ROM_LOAD( "mgi_sita_3.5_o_8270.bin", 0x00000, 0x40000, CRC(816eb41e) SHA1(0cad597e764455011d03f519e4adafb310e75451) )
ROM_REGION( 0x180000, "gfx1", 0 )
diff --git a/src/mame/drivers/ambush.c b/src/mame/drivers/ambush.c
index c1322602dfc..a1914e609e6 100644
--- a/src/mame/drivers/ambush.c
+++ b/src/mame/drivers/ambush.c
@@ -181,9 +181,9 @@ static const gfx_layout spritelayout =
2, /* 2 bits per pixel */
{ 0, 0x2000*8 }, /* The bitplanes are separate */
{ 0, 1, 2, 3, 4, 5, 6, 7,
- 8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
+ 8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
+ 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
32*8 /* every char takes 32 consecutive bytes */
};
@@ -229,7 +229,7 @@ static const ay8910_interface ay8912_interface_2 =
static MACHINE_CONFIG_START( ambush, ambush_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/6) /* XTAL confirmed, divisor guessed */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/6) /* XTAL confirmed, divisor guessed */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(main_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", ambush_state, irq0_line_hold)
@@ -249,11 +249,11 @@ static MACHINE_CONFIG_START( ambush, ambush_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay1", AY8912, XTAL_18_432MHz/6/2) /* XTAL confirmed, divisor guessed */
+ MCFG_SOUND_ADD("ay1", AY8912, XTAL_18_432MHz/6/2) /* XTAL confirmed, divisor guessed */
MCFG_SOUND_CONFIG(ay8912_interface_1)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
- MCFG_SOUND_ADD("ay2", AY8912, XTAL_18_432MHz/6/2) /* XTAL confirmed, divisor guessed */
+ MCFG_SOUND_ADD("ay2", AY8912, XTAL_18_432MHz/6/2) /* XTAL confirmed, divisor guessed */
MCFG_SOUND_CONFIG(ay8912_interface_2)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
MACHINE_CONFIG_END
@@ -280,9 +280,9 @@ ROM_START( ambush )
ROM_REGION( 0x0400, "proms", 0 )
ROM_LOAD( "a.bpr", 0x0000, 0x0100, CRC(5f27f511) SHA1(fe3ae701443ff50d3d03c0a5d0e0ab0e716b05cc) ) /* color PROMs */
- ROM_LOAD( "b.bpr", 0x0100, 0x0100, CRC(1b03fd3b) SHA1(1a58b212476cacace6065056f23b59a69053a2f6) ) /* How is this selected, */
- ROM_LOAD( "13.bpr", 0x0200, 0x0100, CRC(547e970f) SHA1(e2ec0bece49fb283e43549703d6d5d6f561c69a6) ) /* I'm not sure what these do. */
- ROM_LOAD( "14.bpr", 0x0300, 0x0100, CRC(622a8ce7) SHA1(6834f67874251f2ef3a33aec893311f5d10e496f) ) /* They don't look like color PROMs */
+ ROM_LOAD( "b.bpr", 0x0100, 0x0100, CRC(1b03fd3b) SHA1(1a58b212476cacace6065056f23b59a69053a2f6) ) /* How is this selected, */
+ ROM_LOAD( "13.bpr", 0x0200, 0x0100, CRC(547e970f) SHA1(e2ec0bece49fb283e43549703d6d5d6f561c69a6) ) /* I'm not sure what these do. */
+ ROM_LOAD( "14.bpr", 0x0300, 0x0100, CRC(622a8ce7) SHA1(6834f67874251f2ef3a33aec893311f5d10e496f) ) /* They don't look like color PROMs */
ROM_END
ROM_START( ambushj )
@@ -299,9 +299,9 @@ ROM_START( ambushj )
ROM_REGION( 0x0400, "proms", 0 )
ROM_LOAD( "a.bpr", 0x0000, 0x0100, CRC(5f27f511) SHA1(fe3ae701443ff50d3d03c0a5d0e0ab0e716b05cc) ) /* color PROMs */
- ROM_LOAD( "b.bpr", 0x0100, 0x0100, CRC(1b03fd3b) SHA1(1a58b212476cacace6065056f23b59a69053a2f6) ) /* How is this selected, */
- ROM_LOAD( "13.bpr", 0x0200, 0x0100, CRC(547e970f) SHA1(e2ec0bece49fb283e43549703d6d5d6f561c69a6) ) /* I'm not sure what these do. */
- ROM_LOAD( "14.bpr", 0x0300, 0x0100, CRC(622a8ce7) SHA1(6834f67874251f2ef3a33aec893311f5d10e496f) ) /* They don't look like color PROMs */
+ ROM_LOAD( "b.bpr", 0x0100, 0x0100, CRC(1b03fd3b) SHA1(1a58b212476cacace6065056f23b59a69053a2f6) ) /* How is this selected, */
+ ROM_LOAD( "13.bpr", 0x0200, 0x0100, CRC(547e970f) SHA1(e2ec0bece49fb283e43549703d6d5d6f561c69a6) ) /* I'm not sure what these do. */
+ ROM_LOAD( "14.bpr", 0x0300, 0x0100, CRC(622a8ce7) SHA1(6834f67874251f2ef3a33aec893311f5d10e496f) ) /* They don't look like color PROMs */
ROM_END
ROM_START( ambushv )
@@ -318,9 +318,9 @@ ROM_START( ambushv )
ROM_REGION( 0x0400, "proms", 0 )
ROM_LOAD( "a.bpr", 0x0000, 0x0100, CRC(5f27f511) SHA1(fe3ae701443ff50d3d03c0a5d0e0ab0e716b05cc) ) /* color PROMs */
- ROM_LOAD( "b.bpr", 0x0100, 0x0100, CRC(1b03fd3b) SHA1(1a58b212476cacace6065056f23b59a69053a2f6) ) /* How is this selected, */
- ROM_LOAD( "13.bpr", 0x0200, 0x0100, CRC(547e970f) SHA1(e2ec0bece49fb283e43549703d6d5d6f561c69a6) ) /* I'm not sure what these do. */
- ROM_LOAD( "14.bpr", 0x0300, 0x0100, CRC(622a8ce7) SHA1(6834f67874251f2ef3a33aec893311f5d10e496f) ) /* They don't look like color PROMs */
+ ROM_LOAD( "b.bpr", 0x0100, 0x0100, CRC(1b03fd3b) SHA1(1a58b212476cacace6065056f23b59a69053a2f6) ) /* How is this selected, */
+ ROM_LOAD( "13.bpr", 0x0200, 0x0100, CRC(547e970f) SHA1(e2ec0bece49fb283e43549703d6d5d6f561c69a6) ) /* I'm not sure what these do. */
+ ROM_LOAD( "14.bpr", 0x0300, 0x0100, CRC(622a8ce7) SHA1(6834f67874251f2ef3a33aec893311f5d10e496f) ) /* They don't look like color PROMs */
ROM_END
/*************************************
diff --git a/src/mame/drivers/ampoker2.c b/src/mame/drivers/ampoker2.c
index 72de4c13aa4..3fc9fd888ca 100644
--- a/src/mame/drivers/ampoker2.c
+++ b/src/mame/drivers/ampoker2.c
@@ -389,7 +389,7 @@
*********************************************************************************/
-#define MASTER_CLOCK XTAL_6MHz
+#define MASTER_CLOCK XTAL_6MHz
#include "emu.h"
#include "cpu/z80/z80.h"
@@ -494,10 +494,10 @@ WRITE8_MEMBER(ampoker2_state::ampoker2_port31_w)
BIT 4 = TWL_YELL ;Tower Light YELLOW
--------------------------------------------------*/
{
- output_set_lamp_value(1, ((data >> 1) & 1)); /* Lamp 1 - BET/RED */
- output_set_lamp_value(6, ((data >> 2) & 1)); /* Lamp 6 - HOLD 4 */
- output_set_lamp_value(4, ((data >> 3) & 1)); /* Lamp 4 - HOLD 2 */
- output_set_lamp_value(8, ((data >> 4) & 1)); /* Lamp 8 - TWR.YELLOW */
+ output_set_lamp_value(1, ((data >> 1) & 1)); /* Lamp 1 - BET/RED */
+ output_set_lamp_value(6, ((data >> 2) & 1)); /* Lamp 6 - HOLD 4 */
+ output_set_lamp_value(4, ((data >> 3) & 1)); /* Lamp 4 - HOLD 2 */
+ output_set_lamp_value(8, ((data >> 4) & 1)); /* Lamp 8 - TWR.YELLOW */
}
@@ -512,7 +512,7 @@ WRITE8_MEMBER(ampoker2_state::ampoker2_port32_w)
BIT 4 =
--------------------------------------------------*/
{
- output_set_lamp_value(5, ((data >> 3) & 1)); /* Lamp 5 - HOLD 3 */
+ output_set_lamp_value(5, ((data >> 3) & 1)); /* Lamp 5 - HOLD 3 */
}
@@ -541,7 +541,7 @@ WRITE8_MEMBER(ampoker2_state::ampoker2_port34_w)
BIT 4 = LAMP_2 ;Lamp 3 (BLACK)
--------------------------------------------------*/
{
- output_set_lamp_value(2, ((data >> 4) & 1)); /* Lamp 2 - BLACK */
+ output_set_lamp_value(2, ((data >> 4) & 1)); /* Lamp 2 - BLACK */
}
@@ -570,10 +570,10 @@ WRITE8_MEMBER(ampoker2_state::ampoker2_port36_w)
BIT 4 = LAMP_3 ;Lamp 3 (HOLD1)
--------------------------------------------------*/
{
- output_set_lamp_value(9, (data & 1)); /* Lamp 9 - TWR.GREEN */
- output_set_lamp_value(7, ((data >> 2) & 1)); /* Lamp 7 - HOLD 5 */
- output_set_lamp_value(0, ((data >> 3) & 1)); /* Lamp 0 - DEAL */
- output_set_lamp_value(3, ((data >> 4) & 1)); /* Lamp 3 - HOLD 1 */
+ output_set_lamp_value(9, (data & 1)); /* Lamp 9 - TWR.GREEN */
+ output_set_lamp_value(7, ((data >> 2) & 1)); /* Lamp 7 - HOLD 5 */
+ output_set_lamp_value(0, ((data >> 3) & 1)); /* Lamp 0 - DEAL */
+ output_set_lamp_value(3, ((data >> 4) & 1)); /* Lamp 3 - HOLD 1 */
}
@@ -586,7 +586,7 @@ WRITE8_MEMBER(ampoker2_state::ampoker2_watchdog_reset_w)
{
/* watchdog sometimes stop to work */
- if (((data >> 3) & 0x01) == 0) /* check for refresh value (0x08) */
+ if (((data >> 3) & 0x01) == 0) /* check for refresh value (0x08) */
{
machine().watchdog_reset();
// popmessage("%02x", data);
@@ -610,7 +610,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( ampoker2_io_map, AS_IO, 8, ampoker2_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x08, 0x0f) AM_WRITENOP /* inexistent in the real hardware */
+ AM_RANGE(0x08, 0x0f) AM_WRITENOP /* inexistent in the real hardware */
AM_RANGE(0x10, 0x10) AM_READ_PORT("IN0")
AM_RANGE(0x11, 0x11) AM_READ_PORT("IN1")
AM_RANGE(0x12, 0x12) AM_READ_PORT("IN2")
@@ -620,13 +620,13 @@ static ADDRESS_MAP_START( ampoker2_io_map, AS_IO, 8, ampoker2_state )
AM_RANGE(0x16, 0x16) AM_READ_PORT("IN6")
AM_RANGE(0x17, 0x17) AM_READ_PORT("IN7")
// AM_RANGE(0x21, 0x21) AM_WRITENOP /* undocumented, write 0x1a after each reset */
- AM_RANGE(0x30, 0x30) AM_WRITE(ampoker2_port30_w) /* see write handlers */
- AM_RANGE(0x31, 0x31) AM_WRITE(ampoker2_port31_w) /* see write handlers */
- AM_RANGE(0x32, 0x32) AM_WRITE(ampoker2_port32_w) /* see write handlers */
- AM_RANGE(0x33, 0x33) AM_WRITE(ampoker2_port33_w) /* see write handlers */
- AM_RANGE(0x34, 0x34) AM_WRITE(ampoker2_port34_w) /* see write handlers */
- AM_RANGE(0x35, 0x35) AM_WRITE(ampoker2_port35_w) /* see write handlers */
- AM_RANGE(0x36, 0x36) AM_WRITE(ampoker2_port36_w) /* see write handlers */
+ AM_RANGE(0x30, 0x30) AM_WRITE(ampoker2_port30_w) /* see write handlers */
+ AM_RANGE(0x31, 0x31) AM_WRITE(ampoker2_port31_w) /* see write handlers */
+ AM_RANGE(0x32, 0x32) AM_WRITE(ampoker2_port32_w) /* see write handlers */
+ AM_RANGE(0x33, 0x33) AM_WRITE(ampoker2_port33_w) /* see write handlers */
+ AM_RANGE(0x34, 0x34) AM_WRITE(ampoker2_port34_w) /* see write handlers */
+ AM_RANGE(0x35, 0x35) AM_WRITE(ampoker2_port35_w) /* see write handlers */
+ AM_RANGE(0x36, 0x36) AM_WRITE(ampoker2_port36_w) /* see write handlers */
AM_RANGE(0x37, 0x37) AM_WRITE(ampoker2_watchdog_reset_w)
AM_RANGE(0x38, 0x39) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_data_w)
AM_RANGE(0x3A, 0x3A) AM_DEVREAD_LEGACY("aysnd", ay8910_r)
@@ -1097,7 +1097,7 @@ static INPUT_PORTS_START( piccolop )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)
PORT_START("IN7")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN) // lack of v-sync if low
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN) // lack of v-sync if low
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("IN7-2") PORT_CODE(KEYCODE_6_PAD)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("IN7-3") PORT_CODE(KEYCODE_7_PAD)
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
@@ -1155,7 +1155,7 @@ static const ay8910_interface ay8910_config =
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
- DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL /* no ports used */
+ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL /* no ports used */
};
@@ -1166,11 +1166,11 @@ static const ay8910_interface ay8910_config =
static MACHINE_CONFIG_START( ampoker2, ampoker2_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/2) /* 3 MHz */
+ MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/2) /* 3 MHz */
MCFG_CPU_PROGRAM_MAP(ampoker2_map)
MCFG_CPU_IO_MAP(ampoker2_io_map)
MCFG_CPU_PERIODIC_INT_DRIVER(ampoker2_state, nmi_line_pulse, 1536)
- MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(200)) /* 200 ms, measured */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(200)) /* 200 ms, measured */
MCFG_NVRAM_ADD_0FILL("nvram")
@@ -1178,8 +1178,8 @@ static MACHINE_CONFIG_START( ampoker2, ampoker2_state )
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
/* if VBLANK is used, the watchdog timer stop to work.
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
- */
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
+ */
MCFG_SCREEN_SIZE(64*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(20*8, 56*8-1, 2*8, 32*8-1)
MCFG_SCREEN_UPDATE_DRIVER(ampoker2_state, screen_update_ampoker2)
@@ -1190,7 +1190,7 @@ static MACHINE_CONFIG_START( ampoker2, ampoker2_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("aysnd", AY8910,MASTER_CLOCK/4) /* 1.5 MHz, measured */
+ MCFG_SOUND_ADD("aysnd", AY8910,MASTER_CLOCK/4) /* 1.5 MHz, measured */
MCFG_SOUND_CONFIG(ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
MACHINE_CONFIG_END
@@ -1307,7 +1307,7 @@ ROM_END
ROM_START( pkrdewin )
ROM_REGION( 0x14000, "maincpu", 0 )
ROM_LOAD( "poker7.001", 0x4000, 0x10000, CRC(eca16b9e) SHA1(5063d733721457ab3b08caafbe8d33b2cbe4f88b) )
- ROM_COPY( "maincpu", 0x8000, 0x0000, 0x4000 ) /* poker7.001 contains the 1st and 2nd 16K quarters swapped */
+ ROM_COPY( "maincpu", 0x8000, 0x0000, 0x4000 ) /* poker7.001 contains the 1st and 2nd 16K quarters swapped */
ROM_COPY( "maincpu", 0x10000, 0x8000, 0x4000 ) /* poker7.001 contains the 1st and 2nd 16K quarters swapped */
ROM_REGION( 0x4000, "gfx1", 0 )
@@ -1317,7 +1317,7 @@ ROM_START( pkrdewin )
ROM_LOAD( "82s147an.u48", 0x0000, 0x0200, CRC(9bc8e543) SHA1(e4882868a43e21a509a180b9731600d1dd63b5cc) )
ROM_END
-ROM_START( videomat ) /* polish bootleg */
+ROM_START( videomat ) /* polish bootleg */
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "rom.bin", 0x0000, 0x10000, CRC(910cd941) SHA1(350ca70370c5082901343d0c0c1424729d77b006) )
diff --git a/src/mame/drivers/amspdwy.c b/src/mame/drivers/amspdwy.c
index 36192e5111d..889821ae153 100644
--- a/src/mame/drivers/amspdwy.c
+++ b/src/mame/drivers/amspdwy.c
@@ -75,20 +75,20 @@ WRITE8_MEMBER(amspdwy_state::amspdwy_sound_w)
}
static ADDRESS_MAP_START( amspdwy_map, AS_PROGRAM, 8, amspdwy_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
+ AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
AM_RANGE(0x8000, 0x801f) AM_WRITE(amspdwy_paletteram_w) AM_SHARE("paletteram")// Palette
- AM_RANGE(0x9000, 0x93ff) AM_MIRROR(0x0400) AM_RAM_WRITE(amspdwy_videoram_w) AM_SHARE("videoram") // Layer, mirrored?
- AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(amspdwy_colorram_w) AM_SHARE("colorram") // Layer
- AM_RANGE(0x9c00, 0x9fff) AM_RAM // Unused?
+ AM_RANGE(0x9000, 0x93ff) AM_MIRROR(0x0400) AM_RAM_WRITE(amspdwy_videoram_w) AM_SHARE("videoram") // Layer, mirrored?
+ AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(amspdwy_colorram_w) AM_SHARE("colorram") // Layer
+ AM_RANGE(0x9c00, 0x9fff) AM_RAM // Unused?
// AM_RANGE(0xa000, 0xa000) AM_WRITENOP // ?
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("DSW1")
- AM_RANGE(0xa400, 0xa400) AM_READ_PORT("DSW2") AM_WRITE(amspdwy_flipscreen_w) // DSW 2 + Toggle Flip Screen?
- AM_RANGE(0xa800, 0xa800) AM_READ(amspdwy_wheel_0_r) // Player 1
- AM_RANGE(0xac00, 0xac00) AM_READ(amspdwy_wheel_1_r) // Player 2
- AM_RANGE(0xb000, 0xb000) AM_WRITENOP // ? Exiting IRQ
- AM_RANGE(0xb400, 0xb400) AM_READ(amspdwy_sound_r) AM_WRITE(amspdwy_sound_w) // YM2151 status, To Sound CPU
+ AM_RANGE(0xa400, 0xa400) AM_READ_PORT("DSW2") AM_WRITE(amspdwy_flipscreen_w) // DSW 2 + Toggle Flip Screen?
+ AM_RANGE(0xa800, 0xa800) AM_READ(amspdwy_wheel_0_r) // Player 1
+ AM_RANGE(0xac00, 0xac00) AM_READ(amspdwy_wheel_1_r) // Player 2
+ AM_RANGE(0xb000, 0xb000) AM_WRITENOP // ? Exiting IRQ
+ AM_RANGE(0xb400, 0xb400) AM_READ(amspdwy_sound_r) AM_WRITE(amspdwy_sound_w) // YM2151 status, To Sound CPU
AM_RANGE(0xc000, 0xc0ff) AM_RAM AM_SHARE("spriteram")// Sprites
- AM_RANGE(0xe000, 0xe7ff) AM_RAM // Work RAM
+ AM_RANGE(0xe000, 0xe7ff) AM_RAM // Work RAM
ADDRESS_MAP_END
@@ -113,12 +113,12 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( amspdwy_sound_map, AS_PROGRAM, 8, amspdwy_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
+ AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
// AM_RANGE(0x8000, 0x8000) AM_WRITENOP // ? Written with 0 at the start
- AM_RANGE(0x9000, 0x9000) AM_READ(soundlatch_byte_r) // From Main CPU
- AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) //
- AM_RANGE(0xc000, 0xdfff) AM_RAM // Work RAM
- AM_RANGE(0xffff, 0xffff) AM_READNOP // ??? IY = FFFF at the start ?
+ AM_RANGE(0x9000, 0x9000) AM_READ(soundlatch_byte_r) // From Main CPU
+ AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) //
+ AM_RANGE(0xc000, 0xdfff) AM_RAM // Work RAM
+ AM_RANGE(0xffff, 0xffff) AM_READNOP // ??? IY = FFFF at the start ?
ADDRESS_MAP_END
@@ -134,60 +134,60 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( amspdwy )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x00, "Character Test" ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x01, 0x00, "Character Test" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x01, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x00, "Show Arrows" ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x02, 0x00, "Show Arrows" ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_SERVICE_DIPLOC( 0x08, IP_ACTIVE_HIGH, "SW1:5" )
- PORT_DIPNAME( 0x10, 0x00, "Steering Test" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x10, 0x00, "Steering Test" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW1:3" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW1:2" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW1:1" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW1:3" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW1:2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW1:1" ) /* Listed as "Unused" */
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:7,8")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:7,8")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x04, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x30, 0x00, "Time To Qualify" ) PORT_DIPLOCATION("SW2:3,4") /* code at 0x1770 */
+ PORT_DIPNAME( 0x30, 0x00, "Time To Qualify" ) PORT_DIPLOCATION("SW2:3,4") /* code at 0x1770 */
PORT_DIPSETTING( 0x30, "20 sec" )
PORT_DIPSETTING( 0x20, "30 sec" )
PORT_DIPSETTING( 0x10, "45 sec" )
PORT_DIPSETTING( 0x00, "60 sec" )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:2" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:1" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:1" ) /* Listed as "Unused" */
- PORT_START("WHEEL1") // Player 1 Wheel + Coins
- PORT_BIT( 0x1f, IP_ACTIVE_HIGH, IPT_SPECIAL ) // wheel
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2) // 2-3f
+ PORT_START("WHEEL1") // Player 1 Wheel + Coins
+ PORT_BIT( 0x1f, IP_ACTIVE_HIGH, IPT_SPECIAL ) // wheel
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2) // 2-3f
- PORT_START("WHEEL2") // Player 2 Wheel + Coins
+ PORT_START("WHEEL2") // Player 2 Wheel + Coins
PORT_BIT( 0x1f, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2)
- PORT_START("IN0") // Player 1&2 Pedals + YM2151 Sound Status
+ PORT_START("IN0") // Player 1&2 Pedals + YM2151 Sound Status
PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL )
- PORT_START("AN1") // Player 1 Analog Fake Port
+ PORT_START("AN1") // Player 1 Analog Fake Port
PORT_BIT( 0xffff, 0x0000, IPT_DIAL ) PORT_SENSITIVITY(15) PORT_KEYDELTA(20) PORT_CODE_DEC(KEYCODE_LEFT) PORT_CODE_INC(KEYCODE_RIGHT) PORT_PLAYER(1)
- PORT_START("AN2") // Player 2 Analog Fake Port
+ PORT_START("AN2") // Player 2 Analog Fake Port
PORT_BIT( 0xffff, 0x0000, IPT_DIAL ) PORT_SENSITIVITY(15) PORT_KEYDELTA(20) PORT_CODE_DEC(KEYCODE_D) PORT_CODE_INC(KEYCODE_G) PORT_PLAYER(2)
INPUT_PORTS_END
@@ -197,10 +197,10 @@ static INPUT_PORTS_START( amspdwya )
PORT_INCLUDE(amspdwy)
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x10, 0x00, "Time To Qualify" ) PORT_DIPLOCATION("SW2:4") /* code at 0x2696 */
+ PORT_DIPNAME( 0x10, 0x00, "Time To Qualify" ) PORT_DIPLOCATION("SW2:4") /* code at 0x2696 */
PORT_DIPSETTING( 0x10, "45 sec" )
PORT_DIPSETTING( 0x00, "60 sec" )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW2:3" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW2:3" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -264,9 +264,9 @@ static MACHINE_CONFIG_START( amspdwy, amspdwy_state )
MCFG_CPU_ADD("maincpu", Z80,3000000)
MCFG_CPU_PROGRAM_MAP(amspdwy_map)
MCFG_CPU_IO_MAP(amspdwy_portmap)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", amspdwy_state, irq0_line_hold) /* IRQ: 60Hz, NMI: retn */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", amspdwy_state, irq0_line_hold) /* IRQ: 60Hz, NMI: retn */
- MCFG_CPU_ADD("audiocpu", Z80,3000000) /* Can't be disabled: the YM2151 timers must work */
+ MCFG_CPU_ADD("audiocpu", Z80,3000000) /* Can't be disabled: the YM2151 timers must work */
MCFG_CPU_PROGRAM_MAP(amspdwy_sound_map)
MCFG_QUANTUM_PERFECT_CPU("maincpu")
@@ -352,14 +352,14 @@ HILO.5A 5A 2732 9B3C
***************************************************************************/
ROM_START( amspdwy )
- ROM_REGION( 0x18000, "maincpu", 0 ) /* Main Z80 Code */
+ ROM_REGION( 0x18000, "maincpu", 0 ) /* Main Z80 Code */
ROM_LOAD( "game5807.u33", 0x00000, 0x8000, CRC(88233b59) SHA1(bfdf10dde1731cde5c579a9a5173cafe9295a80c) )
ROM_LOAD( "trks6092.u34", 0x10000, 0x8000, CRC(74a4e7b7) SHA1(b4f6e3faaf048351c6671205f52378a64b81bcb1) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
ROM_LOAD( "audi9463.u2", 0x00000, 0x8000, CRC(61b0467e) SHA1(74509e7712838dd760919893aeda9241d308d0c3) )
- ROM_REGION( 0x4000, "gfx1", 0 ) /* Layer + Sprites */
+ ROM_REGION( 0x4000, "gfx1", 0 ) /* Layer + Sprites */
ROM_LOAD( "hilo9b3c.5a", 0x0000, 0x1000, CRC(f50f864c) SHA1(5b2412c1558b30a04523fcdf1d5cf6fdae1ba88d) )
ROM_LOAD( "hihie12a.4a", 0x1000, 0x1000, CRC(3d7497f3) SHA1(34820ba42d9c9dab1d6fdda15795450ce08392c1) )
ROM_LOAD( "lolo1d51.1a", 0x2000, 0x1000, CRC(58701c1c) SHA1(67b476e697652a6b684bd76ae6c0078ed4b3e3a2) )
@@ -367,14 +367,14 @@ ROM_START( amspdwy )
ROM_END
ROM_START( amspdwya )
- ROM_REGION( 0x18000, "maincpu", 0 ) /* Main Z80 Code */
+ ROM_REGION( 0x18000, "maincpu", 0 ) /* Main Z80 Code */
ROM_LOAD( "game.u33", 0x00000, 0x8000, CRC(facab102) SHA1(e232969eaaad8b89ac8e28ee0a7996107a7de9a2) )
ROM_LOAD( "trks6092.u34", 0x10000, 0x8000, CRC(74a4e7b7) SHA1(b4f6e3faaf048351c6671205f52378a64b81bcb1) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
ROM_LOAD( "audi9463.u2", 0x00000, 0x8000, CRC(61b0467e) SHA1(74509e7712838dd760919893aeda9241d308d0c3) )
- ROM_REGION( 0x4000, "gfx1", 0 ) /* Layer + Sprites */
+ ROM_REGION( 0x4000, "gfx1", 0 ) /* Layer + Sprites */
ROM_LOAD( "hilo9b3c.5a", 0x0000, 0x1000, CRC(f50f864c) SHA1(5b2412c1558b30a04523fcdf1d5cf6fdae1ba88d) )
ROM_LOAD( "hihie12a.4a", 0x1000, 0x1000, CRC(3d7497f3) SHA1(34820ba42d9c9dab1d6fdda15795450ce08392c1) )
ROM_LOAD( "lolo1d51.1a", 0x2000, 0x1000, CRC(58701c1c) SHA1(67b476e697652a6b684bd76ae6c0078ed4b3e3a2) )
diff --git a/src/mame/drivers/angelkds.c b/src/mame/drivers/angelkds.c
index ea8cfb43d20..fb5d48a04c2 100644
--- a/src/mame/drivers/angelkds.c
+++ b/src/mame/drivers/angelkds.c
@@ -140,7 +140,7 @@ Dumped by Chackn
WRITE8_MEMBER(angelkds_state::angelkds_cpu_bank_write)
{
- membank("bank1")->set_entry(data & 0x0f); // shall we check (data & 0x0f) < # of available banks (8 or 10 resp.)?
+ membank("bank1")->set_entry(data & 0x0f); // shall we check (data & 0x0f) < # of available banks (8 or 10 resp.)?
}
@@ -215,11 +215,11 @@ static ADDRESS_MAP_START( main_portmap, AS_IO, 8, angelkds_state )
AM_RANGE(0x00, 0x00) AM_WRITENOP // 00 on start-up, not again
AM_RANGE(0x42, 0x42) AM_WRITE(angelkds_cpu_bank_write)
AM_RANGE(0x43, 0x43) AM_WRITENOP // 9a on start-up, not again
- AM_RANGE(0x40, 0x40) AM_READ_PORT("I40") /* "Coinage" Dip Switches */
- AM_RANGE(0x41, 0x41) AM_READ_PORT("I41") /* Other Dip Switches */
- AM_RANGE(0x42, 0x42) AM_READ_PORT("I42") /* Players inputs (not needed ?) */
- AM_RANGE(0x80, 0x80) AM_READ_PORT("I80") /* System inputs */
- AM_RANGE(0x81, 0x82) AM_READ(angelkds_input_r) /* Players inputs */
+ AM_RANGE(0x40, 0x40) AM_READ_PORT("I40") /* "Coinage" Dip Switches */
+ AM_RANGE(0x41, 0x41) AM_READ_PORT("I41") /* Other Dip Switches */
+ AM_RANGE(0x42, 0x42) AM_READ_PORT("I42") /* Players inputs (not needed ?) */
+ AM_RANGE(0x80, 0x80) AM_READ_PORT("I80") /* System inputs */
+ AM_RANGE(0x81, 0x82) AM_READ(angelkds_input_r) /* Players inputs */
AM_RANGE(0x83, 0x83) AM_WRITENOP // 9b on start-up, not again
AM_RANGE(0xc0, 0xc3) AM_READWRITE(angelkds_main_sound_r, angelkds_main_sound_w) // 02 various points
ADDRESS_MAP_END
@@ -255,94 +255,94 @@ ADDRESS_MAP_END
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT ) PORT_PLAYER(player) PORT_8WAY
#define ANGELDSK_FAKE_PLAYERS_INPUT( player ) \
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(player) /* To enter initials */ \
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Unused */ \
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(player) /* To enter initials */ \
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* Unused */ \
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(player) PORT_8WAY \
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(player) PORT_8WAY \
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(player) PORT_8WAY \
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(player) PORT_8WAY \
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(player) /* To shorten the rope and */ \
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(player) /* To shorten the rope and */ \
/* move right in hiscores table */
static INPUT_PORTS_START( angelkds )
/*
- Free Play: Set SW1:1-8 ON (A:Free Play & B:Free Play).
- Sound Test: Set SW1:1-8 ON (A:Free Play & B:Free Play), hold test switch and reboot.
- Joystick Test: Set SW1:1-7 ON & SW1:8 OFF (A:Free Play & B:3C_1C), hold test switch and reboot.
- Joystick Test Coin_A & Coin_B seem to be switched, only works when setting A to 3C_1C and B to Free Play.
- */
- PORT_START("I40") /* inport $40 */
- PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
- PORT_DIPSETTING( 0x70, DEF_STR( 4C_1C ) )
- PORT_DIPSETTING( 0x80, DEF_STR( 3C_1C ) )
- PORT_DIPSETTING( 0x90, DEF_STR( 2C_1C ) )
+ Free Play: Set SW1:1-8 ON (A:Free Play & B:Free Play).
+ Sound Test: Set SW1:1-8 ON (A:Free Play & B:Free Play), hold test switch and reboot.
+ Joystick Test: Set SW1:1-7 ON & SW1:8 OFF (A:Free Play & B:3C_1C), hold test switch and reboot.
+ Joystick Test Coin_A & Coin_B seem to be switched, only works when setting A to 3C_1C and B to Free Play.
+ */
+ PORT_START("I40") /* inport $40 */
+ PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
+ PORT_DIPSETTING( 0x70, DEF_STR( 4C_1C ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( 3C_1C ) )
+ PORT_DIPSETTING( 0x90, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x60, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x50, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0xf0, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x20, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x10, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
- PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
- PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
- PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
-
- PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
- PORT_DIPSETTING( 0x07, DEF_STR( 4C_1C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
- PORT_DIPSETTING( 0x09, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0xe0, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0xd0, DEF_STR( 1C_3C ) )
+ PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
+ PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
+ PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
+
+ PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
+ PORT_DIPSETTING( 0x07, DEF_STR( 4C_1C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
+ PORT_DIPSETTING( 0x09, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x05, DEF_STR( 2C_1C ) )
// PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x0f, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
- PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
- PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
- PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
-
- PORT_START("I41") /* inport $41 */
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPSETTING( 0x0e, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x0d, DEF_STR( 1C_3C ) )
+ PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
+ PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
+ PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
+
+ PORT_START("I41") /* inport $41 */
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x02, 0x00, "High Score Characters" ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x02, 0x00, "High Score Characters" ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x02, "10" )
- PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x0c, "20k, 50k, 100k, 200k and 500k" )
PORT_DIPSETTING( 0x08, "50k, 100k, 200k and 500k" )
PORT_DIPSETTING( 0x04, "100k, 200k and 500k" )
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x10, "5" )
PORT_DIPSETTING( 0x00, "99 (Cheat)" )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8") /* Stored at 0xc023 */
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8") /* Stored at 0xc023 */
PORT_DIPSETTING( 0xc0, DEF_STR( Very_Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x80, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) )
- PORT_START("I42") /* inport $42 */
+ PORT_START("I42") /* inport $42 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // duplicated IPT_JOYSTICK_LEFTRIGHT
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_8WAY // duplicated IPT_JOYSTICK_LEFTRIGHT
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) // duplicated IPT_JOYSTICK_LEFTRIGHT
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_8WAY // duplicated IPT_JOYSTICK_LEFTRIGHT
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("I80") /* inport $80 */
+ PORT_START("I80") /* inport $80 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
@@ -352,10 +352,10 @@ static INPUT_PORTS_START( angelkds )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
- PORT_START("I81") /* inport $81 */
+ PORT_START("I81") /* inport $81 */
ANGELDSK_PLAYERS_INPUT( 1 )
- PORT_START("I82") /* inport $82 */
+ PORT_START("I82") /* inport $82 */
ANGELDSK_PLAYERS_INPUT( 2 )
#if FAKEINPUTS
@@ -363,14 +363,14 @@ static INPUT_PORTS_START( angelkds )
/* Fake inputs to allow to play the game with 1 joystick instead of 2 */
PORT_START("FAKE1")
PORT_DIPNAME( 0x01, 0x00, "FAKE (for debug) Joysticks (Player 1)" )
- PORT_DIPSETTING( 0x01, "1" )
- PORT_DIPSETTING( 0x00, "2" )
+ PORT_DIPSETTING( 0x01, "1" )
+ PORT_DIPSETTING( 0x00, "2" )
ANGELDSK_FAKE_PLAYERS_INPUT( 1 )
PORT_START("FAKE2")
PORT_DIPNAME( 0x01, 0x00, "FAKE (for debug) Joysticks (Player 2)" )
- PORT_DIPSETTING( 0x01, "1" )
- PORT_DIPSETTING( 0x00, "2" )
+ PORT_DIPSETTING( 0x01, "1" )
+ PORT_DIPSETTING( 0x00, "2" )
ANGELDSK_FAKE_PLAYERS_INPUT( 2 )
#endif
@@ -378,8 +378,8 @@ static INPUT_PORTS_START( angelkds )
INPUT_PORTS_END
static INPUT_PORTS_START( spcpostn )
- PORT_START("I40") /* inport $40 */
- PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
+ PORT_START("I40") /* inport $40 */
+ PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
@@ -396,7 +396,7 @@ static INPUT_PORTS_START( spcpostn )
PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
+ PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
@@ -414,29 +414,29 @@ static INPUT_PORTS_START( spcpostn )
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x90, DEF_STR( 1C_7C ) )
- PORT_START("I41") /* inport $41 */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR(Allow_Continue ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_START("I41") /* inport $41 */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR(Allow_Continue ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x01, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x02, 0x02, "Obstruction Car" ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x02, 0x02, "Obstruction Car" ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x02, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x0c, 0x08, "Time Limit" ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x08, "Time Limit" ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x00, "1:10" )
PORT_DIPSETTING( 0x04, "1:20" )
PORT_DIPSETTING( 0x08, "1:30" )
PORT_DIPSETTING( 0x0c, "1:40" )
- PORT_DIPNAME( 0x30, 0x20, "Power Down" ) PORT_DIPLOCATION("SW2:5,6")
+ PORT_DIPNAME( 0x30, 0x20, "Power Down" ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x30, "Slow" )
PORT_DIPSETTING( 0x20, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x10, "Fast" )
PORT_DIPSETTING( 0x00, "Fastest" )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
- PORT_START("I42") /* inport $42 */
+ PORT_START("I42") /* inport $42 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -446,7 +446,7 @@ static INPUT_PORTS_START( spcpostn )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("I80") /* inport $80 */
+ PORT_START("I80") /* inport $80 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
@@ -456,7 +456,7 @@ static INPUT_PORTS_START( spcpostn )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
- PORT_START("I81") /* inport $81 */
+ PORT_START("I81") /* inport $81 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1) PORT_8WAY
@@ -466,7 +466,7 @@ static INPUT_PORTS_START( spcpostn )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_PLAYER(1) // probably unused
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_PLAYER(1) // probably unused
- PORT_START("I82") /* inport $82 */
+ PORT_START("I82") /* inport $82 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2) PORT_8WAY
@@ -546,7 +546,7 @@ static const gfx_layout angelkds_spritelayout =
16,16,
RGN_FRAC(1,2),
4,
- { 0,4, RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4 },
+ { 0,4, RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4 },
{ 0, 1, 2, 3, 8, 9, 10, 11, 16,17,18,19, 24,25,26,27 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, 8*32, 9*32, 10*32, 11*32, 12*32, 13*32, 14*32, 15*32 },
16*32
@@ -696,7 +696,7 @@ ROM_START( angelkds )
ROM_LOAD( "11438", 0x38000, 0x08000, CRC(d640f89e) SHA1(38fb67bcb2a3d1ad614fc62e42f22a66bc757137) )
ROM_REGION( 0x20, "proms", 0 )
- ROM_LOAD( "63s081n.u5", 0x00, 0x20, CRC(36b98627) SHA1(d2d54d92d1d47e7cc85104989ee421ce5d80a42a) )
+ ROM_LOAD( "63s081n.u5", 0x00, 0x20, CRC(36b98627) SHA1(d2d54d92d1d47e7cc85104989ee421ce5d80a42a) )
ROM_END
ROM_START( spcpostn )
diff --git a/src/mame/drivers/appoooh.c b/src/mame/drivers/appoooh.c
index 57441754097..735d85421de 100644
--- a/src/mame/drivers/appoooh.c
+++ b/src/mame/drivers/appoooh.c
@@ -270,10 +270,10 @@ static INPUT_PORTS_START( appoooh )
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON3 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
- PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
PORT_START("DSW1")
- PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
+ PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
@@ -282,18 +282,18 @@ static INPUT_PORTS_START( appoooh )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5")
+ PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5")
PORT_DIPSETTING( 0x18, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x80, DEF_STR( Hard ) )
INPUT_PORTS_END
@@ -302,8 +302,8 @@ static INPUT_PORTS_START( robowres )
PORT_INCLUDE( appoooh )
PORT_MODIFY("DSW1")
- PORT_DIPUNUSED_DIPLOC(0x40,0x40, "SW1:7" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPUNUSED_DIPLOC(0x40,0x40, "SW1:7" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x00, DEF_STR( Japanese ) )
PORT_DIPSETTING( 0x80, DEF_STR( English ) )
INPUT_PORTS_END
@@ -317,26 +317,26 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 characters */
- 2048, /* 2048 characters */
- 3, /* 3 bits per pixel */
- { 2*2048*8*8, 1*2048*8*8, 0*2048*8*8 }, /* the bitplanes are separated */
+ 8,8, /* 8*8 characters */
+ 2048, /* 2048 characters */
+ 3, /* 3 bits per pixel */
+ { 2*2048*8*8, 1*2048*8*8, 0*2048*8*8 }, /* the bitplanes are separated */
{ 7, 6, 5, 4, 3, 2, 1, 0 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout spritelayout =
{
- 16,16, /* 8*8 characters */
- 512, /* 512 characters */
- 3, /* 3 bits per pixel */
- { 2*2048*8*8, 1*2048*8*8, 0*2048*8*8 }, /* the bitplanes are separated */
+ 16,16, /* 8*8 characters */
+ 512, /* 512 characters */
+ 3, /* 3 bits per pixel */
+ { 2*2048*8*8, 1*2048*8*8, 0*2048*8*8 }, /* the bitplanes are separated */
{ 7, 6, 5, 4, 3, 2, 1, 0 ,
- 8*8+7,8*8+6,8*8+5,8*8+4,8*8+3,8*8+2,8*8+1,8*8+0},
+ 8*8+7,8*8+6,8*8+5,8*8+4,8*8+3,8*8+2,8*8+1,8*8+0},
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
- 32*8 /* every char takes 8 consecutive bytes */
+ 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
+ 32*8 /* every char takes 8 consecutive bytes */
};
static GFXDECODE_START( appoooh )
@@ -365,18 +365,18 @@ static const gfx_layout robowres_spritelayout =
3,
{ RGN_FRAC(2,3),RGN_FRAC(1,3),RGN_FRAC(0,3) },
{ 7, 6, 5, 4, 3, 2, 1, 0 ,
- 8*8+7,8*8+6,8*8+5,8*8+4,8*8+3,8*8+2,8*8+1,8*8+0},
+ 8*8+7,8*8+6,8*8+5,8*8+4,8*8+3,8*8+2,8*8+1,8*8+0},
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
- 32*8 /* every char takes 8 consecutive bytes */
+ 16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
+ 32*8 /* every char takes 8 consecutive bytes */
};
static GFXDECODE_START( robowres )
GFXDECODE_ENTRY( "gfx1", 0, robowres_charlayout, 0, 32 )
- GFXDECODE_ENTRY( "gfx2", 0, robowres_charlayout, 0, 32 )
+ GFXDECODE_ENTRY( "gfx2", 0, robowres_charlayout, 0, 32 )
GFXDECODE_ENTRY( "gfx1", 0, robowres_spritelayout, 0, 32 )
- GFXDECODE_ENTRY( "gfx2", 0, robowres_spritelayout, 0, 32 )
+ GFXDECODE_ENTRY( "gfx2", 0, robowres_spritelayout, 0, 32 )
GFXDECODE_END
@@ -389,7 +389,7 @@ GFXDECODE_END
static const msm5205_interface msm5205_config =
{
appoooh_adpcm_int,/* interrupt function */
- MSM5205_S64_4B /* 6KHz */
+ MSM5205_S64_4B /* 6KHz */
};
@@ -399,7 +399,7 @@ static const msm5205_interface msm5205_config =
static const sn76496_config psg_intf =
{
- DEVCB_NULL
+ DEVCB_NULL
};
@@ -439,7 +439,7 @@ INTERRUPT_GEN_MEMBER(appoooh_state::vblank_irq)
static MACHINE_CONFIG_START( appoooh_common, appoooh_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,18432000/6) /* ??? the main xtal is 18.432 MHz */
+ MCFG_CPU_ADD("maincpu", Z80,18432000/6) /* ??? the main xtal is 18.432 MHz */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(main_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", appoooh_state, vblank_irq)
@@ -508,7 +508,7 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( appoooh )
- ROM_REGION( 0x14000, "maincpu", 0 ) /* 64k for code + 16k bank */
+ ROM_REGION( 0x14000, "maincpu", 0 ) /* 64k for code + 16k bank */
ROM_LOAD( "epr-5906.bin", 0x00000, 0x2000, CRC(fffae7fe) SHA1(b4bb60eb6331e503759bd963eafefa69331d6b86) )
ROM_LOAD( "epr-5907.bin", 0x02000, 0x2000, CRC(57696cd6) SHA1(74a005d18d55fed9ece9b579d2e7e6619a47538b) )
ROM_LOAD( "epr-5908.bin", 0x04000, 0x2000, CRC(4537cddc) SHA1(ecb71cab7b9269d713399987cbc45ff54735019f) )
@@ -520,21 +520,21 @@ ROM_START( appoooh )
ROM_LOAD( "epr-5914.bin", 0x12000, 0x2000, CRC(58792d4a) SHA1(8acdb0ebee5faadadd64bd64db1fdf881ee70333) ) /* a000-dfff */
ROM_REGION( 0x0c000, "gfx1", 0 )
- ROM_LOAD( "epr-5895.bin", 0x00000, 0x4000, CRC(4b0d4294) SHA1(f9f4d928c76b32cbcbaf7bfd0ebec2d4dfc37566) ) /* playfield #1 chars */
+ ROM_LOAD( "epr-5895.bin", 0x00000, 0x4000, CRC(4b0d4294) SHA1(f9f4d928c76b32cbcbaf7bfd0ebec2d4dfc37566) ) /* playfield #1 chars */
ROM_LOAD( "epr-5896.bin", 0x04000, 0x4000, CRC(7bc84d75) SHA1(36e98eaac1ba23ab842080205bdb5b76b888ddc2) )
ROM_LOAD( "epr-5897.bin", 0x08000, 0x4000, CRC(745f3ffa) SHA1(03f5d1d567e786e7835defc6995d1b39aee2c28d) )
ROM_REGION( 0x0c000, "gfx2", 0 )
- ROM_LOAD( "epr-5898.bin", 0x00000, 0x4000, CRC(cf01644d) SHA1(0cc1b7f7a3b33b0edf4e277e320467b19dfc5bc8) ) /* playfield #2 chars */
+ ROM_LOAD( "epr-5898.bin", 0x00000, 0x4000, CRC(cf01644d) SHA1(0cc1b7f7a3b33b0edf4e277e320467b19dfc5bc8) ) /* playfield #2 chars */
ROM_LOAD( "epr-5899.bin", 0x04000, 0x4000, CRC(885ad636) SHA1(d040948f7cf030e4ab0f0509df23cb855e9c920c) )
ROM_LOAD( "epr-5900.bin", 0x08000, 0x4000, CRC(a8ed13f3) SHA1(31c4a52fea8f26b4a79564c7e8443a88d43aee12) )
ROM_REGION( 0x0220, "proms", 0 )
- ROM_LOAD( "pr5921.prm", 0x0000, 0x020, CRC(f2437229) SHA1(8fb4240142f4c77f820d7c153c22ff82f66aa7b1) ) /* palette */
- ROM_LOAD( "pr5922.prm", 0x0020, 0x100, CRC(85c542bf) SHA1(371d92fca2ae609a47d3a2ea349f14f30b846da8) ) /* charset #1 lookup table */
- ROM_LOAD( "pr5923.prm", 0x0120, 0x100, CRC(16acbd53) SHA1(e5791646730c6232efa2c0327b484472c47baf21) ) /* charset #2 lookup table */
+ ROM_LOAD( "pr5921.prm", 0x0000, 0x020, CRC(f2437229) SHA1(8fb4240142f4c77f820d7c153c22ff82f66aa7b1) ) /* palette */
+ ROM_LOAD( "pr5922.prm", 0x0020, 0x100, CRC(85c542bf) SHA1(371d92fca2ae609a47d3a2ea349f14f30b846da8) ) /* charset #1 lookup table */
+ ROM_LOAD( "pr5923.prm", 0x0120, 0x100, CRC(16acbd53) SHA1(e5791646730c6232efa2c0327b484472c47baf21) ) /* charset #2 lookup table */
- ROM_REGION( 0xa000, "adpcm", 0 ) /* adpcm voice data */
+ ROM_REGION( 0xa000, "adpcm", 0 ) /* adpcm voice data */
ROM_LOAD( "epr-5901.bin", 0x0000, 0x2000, CRC(170a10a4) SHA1(7b0c8427c69525cbcbe9f88b22b12aafb6949bfd) )
ROM_LOAD( "epr-5902.bin", 0x2000, 0x2000, CRC(f6981640) SHA1(1a93913ecb64d1c459e5bbcc28c4ca3ea90f21e1) )
ROM_LOAD( "epr-5903.bin", 0x4000, 0x2000, CRC(0439df50) SHA1(1f981c1867366fa57de25ff8f421c121d82d7321) )
@@ -543,7 +543,7 @@ ROM_START( appoooh )
ROM_END
ROM_START( robowres )
- ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 16k bank */
+ ROM_REGION( 0x1c000, "maincpu", 0 ) /* 64k for code + 16k bank */
ROM_LOAD( "epr-7540.13d", 0x00000, 0x8000, CRC(a2a54237) SHA1(06c80fe6725582d19aa957728977e871e79e79e1) )
ROM_LOAD( "epr-7541.14d", 0x08000, 0x6000, CRC(cbf7d1a8) SHA1(5eb6d2130d4e5401a332df6db5cad07f3131e8e4) )
ROM_CONTINUE( 0x10000, 0x2000 )
@@ -565,12 +565,12 @@ ROM_START( robowres )
ROM_LOAD( "pr7572.7f", 0x00020, 0x0100, CRC(2b083d0c) SHA1(5b39bd4297bec788caac9e9de5128d43932a24e2) )
ROM_LOAD( "pr7573.7g", 0x00120, 0x0100, CRC(2b083d0c) SHA1(5b39bd4297bec788caac9e9de5128d43932a24e2) )
- ROM_REGION( 0x8000, "adpcm", 0 ) /* adpcm voice data */
+ ROM_REGION( 0x8000, "adpcm", 0 ) /* adpcm voice data */
ROM_LOAD( "epr-7543.12b", 0x00000, 0x8000, CRC(4d108c49) SHA1(a7c3c5a5ad36917ea7f6d917377c2392fa9beea3) )
ROM_END
ROM_START( robowresb )
- ROM_REGION( 0x1c000+0x8000, "maincpu", 0 ) /* 64k for code + 16k bank */
+ ROM_REGION( 0x1c000+0x8000, "maincpu", 0 ) /* 64k for code + 16k bank */
ROM_LOAD( "dg4.e13", 0x00000, 0x8000, CRC(f7585d4f) SHA1(718879f8262681b6b66968eb49a0fb04fda5160b) )
ROM_LOAD( "epr-7541.14d", 0x08000, 0x6000, CRC(cbf7d1a8) SHA1(5eb6d2130d4e5401a332df6db5cad07f3131e8e4) )
ROM_CONTINUE( 0x10000, 0x2000 )
@@ -593,7 +593,7 @@ ROM_START( robowresb )
ROM_LOAD( "pr7572.7f", 0x00020, 0x0100, CRC(2b083d0c) SHA1(5b39bd4297bec788caac9e9de5128d43932a24e2) )
ROM_LOAD( "pr7573.7g", 0x00120, 0x0100, CRC(2b083d0c) SHA1(5b39bd4297bec788caac9e9de5128d43932a24e2) )
- ROM_REGION( 0x8000, "adpcm", 0 ) /* adpcm voice data */
+ ROM_REGION( 0x8000, "adpcm", 0 ) /* adpcm voice data */
ROM_LOAD( "epr-7543.12b", 0x00000, 0x8000, CRC(4d108c49) SHA1(a7c3c5a5ad36917ea7f6d917377c2392fa9beea3) )
ROM_END
diff --git a/src/mame/drivers/aquarium.c b/src/mame/drivers/aquarium.c
index 194f641f4af..909eac2921e 100644
--- a/src/mame/drivers/aquarium.c
+++ b/src/mame/drivers/aquarium.c
@@ -111,12 +111,12 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, aquarium_state )
AM_RANGE(0xc80000, 0xc81fff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xd00000, 0xd00fff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBRGBx_word_w) AM_SHARE("paletteram")
AM_RANGE(0xd80014, 0xd8001f) AM_WRITEONLY AM_SHARE("scroll")
- AM_RANGE(0xd80068, 0xd80069) AM_WRITENOP /* probably not used */
+ AM_RANGE(0xd80068, 0xd80069) AM_WRITENOP /* probably not used */
AM_RANGE(0xd80080, 0xd80081) AM_READ_PORT("DSW")
- AM_RANGE(0xd80082, 0xd80083) AM_READNOP /* stored but not read back ? check code at 0x01f440 */
+ AM_RANGE(0xd80082, 0xd80083) AM_READNOP /* stored but not read back ? check code at 0x01f440 */
AM_RANGE(0xd80084, 0xd80085) AM_READ_PORT("INPUTS")
AM_RANGE(0xd80086, 0xd80087) AM_READ(aquarium_coins_r)
- AM_RANGE(0xd80088, 0xd80089) AM_WRITENOP /* ?? video related */
+ AM_RANGE(0xd80088, 0xd80089) AM_WRITENOP /* ?? video related */
AM_RANGE(0xd8008a, 0xd8008b) AM_WRITE(aquarium_sound_w)
AM_RANGE(0xff0000, 0xffffff) AM_RAM
ADDRESS_MAP_END
@@ -138,24 +138,24 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( aquarium )
PORT_START("DSW")
- PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x0002, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0003, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0001, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x000c, 0x000c, "Winning Rounds (Player VS CPU)" ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x000c, 0x000c, "Winning Rounds (Player VS CPU)" ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x000c, "1/1" )
PORT_DIPSETTING( 0x0008, "2/3" )
PORT_DIPSETTING( 0x0004, "3/5" )
// PORT_DIPSETTING( 0x0000, "1/1" ) /* Not used or listed in manual */
- PORT_DIPNAME( 0x0030, 0x0030, "Winning Rounds (Player VS Player)" ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPNAME( 0x0030, 0x0030, "Winning Rounds (Player VS Player)" ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x0030, "1/1" )
PORT_DIPSETTING( 0x0020, "2/3" )
PORT_DIPSETTING( 0x0010, "3/5" )
// PORT_DIPSETTING( 0x0000, "1/1" ) /* Not used or listed in manual */
- PORT_DIPUNUSED_DIPLOC( 0x0040, 0x0040, "SW1:7" ) /* Listed in the manual as always OFF */
- PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW1:8" ) /* Listed in the manual as always OFF */
- PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:1,2,3")
+ PORT_DIPUNUSED_DIPLOC( 0x0040, 0x0040, "SW1:7" ) /* Listed in the manual as always OFF */
+ PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW1:8" ) /* Listed in the manual as always OFF */
+ PORT_DIPNAME( 0x0700, 0x0700, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:1,2,3")
PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0100, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0200, DEF_STR( 3C_1C ) )
@@ -164,15 +164,15 @@ static INPUT_PORTS_START( aquarium )
PORT_DIPSETTING( 0x0600, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0500, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x0400, DEF_STR( 1C_4C ) )
- PORT_DIPUNUSED_DIPLOC( 0x0800, 0x0800, "SW2:4" ) /* Listed in the manual as always OFF */
- PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPUNUSED_DIPLOC( 0x0800, 0x0800, "SW2:4" ) /* Listed in the manual as always OFF */
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW2:7" ) /* Listed in the manual as always OFF */
- PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:8" ) /* Listed in the manual as always OFF */
+ PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW2:7" ) /* Listed in the manual as always OFF */
+ PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:8" ) /* Listed in the manual as always OFF */
PORT_START("INPUTS")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
@@ -181,7 +181,7 @@ static INPUT_PORTS_START( aquarium )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
- PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* used in testmode, but not in game? */
+ PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* used in testmode, but not in game? */
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
@@ -189,7 +189,7 @@ static INPUT_PORTS_START( aquarium )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
- PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* used in testmode, but not in game? */
+ PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* used in testmode, but not in game? */
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START1 )
PORT_START("SYSTEM")
@@ -201,40 +201,40 @@ static INPUT_PORTS_START( aquarium )
PORT_SERVICE( 0x1000, IP_ACTIVE_LOW )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* sound status */
+ PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* sound status */
INPUT_PORTS_END
static const gfx_layout char5bpplayout =
{
- 16,16, /* 16*16 characters */
+ 16,16, /* 16*16 characters */
RGN_FRAC(1,2),
- 5, /* 4 bits per pixel */
+ 5, /* 4 bits per pixel */
{ RGN_FRAC(1,2), 0, 1, 2, 3 },
{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4, 2*4+32, 3*4+32, 0*4+32, 1*4+32, 6*4+32, 7*4+32, 4*4+32, 5*4+32 },
{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
- 128*8 /* every sprite takes 128 consecutive bytes */
+ 128*8 /* every sprite takes 128 consecutive bytes */
};
static const gfx_layout char_8x8_layout =
{
- 8,8, /* 8*8 characters */
+ 8,8, /* 8*8 characters */
RGN_FRAC(1,1),
- 4, /* 4 bits per pixel */
+ 4, /* 4 bits per pixel */
{ 0, 1, 2, 3 },
{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static const gfx_layout tilelayout =
{
- 16,16, /* 16*16 sprites */
+ 16,16, /* 16*16 sprites */
RGN_FRAC(1,1),
- 4, /* 4 bits per pixel */
+ 4, /* 4 bits per pixel */
{ 48, 16, 32, 0 },
{ 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64, 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
- 128*8 /* every sprite takes 128 consecutive bytes */
+ 128*8 /* every sprite takes 128 consecutive bytes */
};
DRIVER_INIT_MEMBER(aquarium_state,aquarium)
@@ -242,8 +242,8 @@ DRIVER_INIT_MEMBER(aquarium_state,aquarium)
UINT8 *Z80 = machine().root_device().memregion("audiocpu")->base();
/* The BG tiles are 5bpp, this rearranges the data from
- the roms containing the 1bpp data so we can decode it
- correctly */
+ the roms containing the 1bpp data so we can decode it
+ correctly */
UINT8 *DAT2 = machine().root_device().memregion("gfx1")->base() + 0x080000;
UINT8 *DAT = machine().root_device().memregion("user1")->base();
int len = 0x0200000;
diff --git a/src/mame/drivers/arabian.c b/src/mame/drivers/arabian.c
index cba5b39b361..c7c52df222f 100644
--- a/src/mame/drivers/arabian.c
+++ b/src/mame/drivers/arabian.c
@@ -49,7 +49,7 @@
#include "sound/ay8910.h"
/* constants */
-#define MAIN_OSC XTAL_12MHz
+#define MAIN_OSC XTAL_12MHz
/*************************************
@@ -62,12 +62,12 @@ WRITE8_MEMBER(arabian_state::ay8910_porta_w)
{
/*
- bit 7 = ENA
- bit 6 = ENB
- bit 5 = /ABHF
- bit 4 = /AGHF
- bit 3 = /ARHF
- */
+ bit 7 = ENA
+ bit 6 = ENB
+ bit 5 = /ABHF
+ bit 4 = /AGHF
+ bit 3 = /ARHF
+ */
m_video_control = data;
}
@@ -75,11 +75,11 @@ WRITE8_MEMBER(arabian_state::ay8910_porta_w)
WRITE8_MEMBER(arabian_state::ay8910_portb_w)
{
/*
- bit 5 = /IREQ to custom CPU
- bit 4 = /SRES to custom CPU
- bit 1 = coin 2 counter
- bit 0 = coin 1 counter
- */
+ bit 5 = /IREQ to custom CPU
+ bit 4 = /SRES to custom CPU
+ bit 1 = coin 2 counter
+ bit 0 = coin 1 counter
+ */
machine().device("mcu")->execute().set_input_line(MB88_IRQ_LINE, data & 0x20 ? CLEAR_LINE : ASSERT_LINE);
machine().device("mcu")->execute().set_input_line(INPUT_LINE_RESET, data & 0x10 ? CLEAR_LINE : ASSERT_LINE);
@@ -263,7 +263,7 @@ static INPUT_PORTS_START( arabian )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_START2 )
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE1 ) /* IN3 : "AUX-S" */
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE1 ) /* IN3 : "AUX-S" */
PORT_START("COM1")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY
@@ -273,9 +273,9 @@ static INPUT_PORTS_START( arabian )
PORT_START("COM2")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 )
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN9 */
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN10 */
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN11 */
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN9 */
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN10 */
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN11 */
PORT_START("COM3")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
@@ -285,9 +285,9 @@ static INPUT_PORTS_START( arabian )
PORT_START("COM4")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN17 */
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN18 */
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN19 */
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN17 */
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN18 */
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* IN19 */
PORT_START("COM5")
PORT_DIPNAME( 0x01, 0x01, "Coin Counters" ) PORT_DIPLOCATION("SW2:!1")
diff --git a/src/mame/drivers/arcadecl.c b/src/mame/drivers/arcadecl.c
index 914436d0d7e..0da8d0e779a 100644
--- a/src/mame/drivers/arcadecl.c
+++ b/src/mame/drivers/arcadecl.c
@@ -73,7 +73,7 @@
#include "includes/arcadecl.h"
-#define MASTER_CLOCK XTAL_14_31818MHz
+#define MASTER_CLOCK XTAL_14_31818MHz
/*************************************
@@ -121,9 +121,9 @@ WRITE16_MEMBER(arcadecl_state::latch_w)
{
/* bit layout in this register:
- 0x0080 == ADPCM bank
- 0x001F == volume
- */
+ 0x0080 == ADPCM bank
+ 0x001F == volume
+ */
/* lower byte being modified? */
if (ACCESSING_BITS_0_7)
@@ -210,7 +210,7 @@ static INPUT_PORTS_START( arcadecl )
PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("TRACKX2")
- PORT_BIT( 0x00ff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(32) PORT_REVERSE PORT_PLAYER(2)
+ PORT_BIT( 0x00ff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(32) PORT_REVERSE PORT_PLAYER(2)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("TRACKY2")
@@ -218,11 +218,11 @@ static INPUT_PORTS_START( arcadecl )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("TRACKX1")
- PORT_BIT( 0x00ff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(32) PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0x00ff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(32) PORT_REVERSE PORT_PLAYER(1)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("TRACKY1")
- PORT_BIT( 0x00ff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(32) PORT_PLAYER(1)
+ PORT_BIT( 0x00ff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(32) PORT_PLAYER(1)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
diff --git a/src/mame/drivers/arcadia.c b/src/mame/drivers/arcadia.c
index eb3ec365424..f3874b36d3e 100644
--- a/src/mame/drivers/arcadia.c
+++ b/src/mame/drivers/arcadia.c
@@ -211,7 +211,7 @@ static ADDRESS_MAP_START( amiga_map, AS_PROGRAM, 16, arcadia_amiga_state )
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE_LEGACY(amiga_cia_r, amiga_cia_w)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE_LEGACY(amiga_custom_r, amiga_custom_w) AM_SHARE("custom_regs")
AM_RANGE(0xe80000, 0xe8ffff) AM_READWRITE_LEGACY(amiga_autoconfig_r, amiga_autoconfig_w)
- AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* Kickstart BIOS */
+ AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("user1", 0) /* Kickstart BIOS */
AM_RANGE(0x800000, 0x97ffff) AM_ROMBANK("bank2") AM_REGION("user3", 0)
AM_RANGE(0x980000, 0x9fbfff) AM_ROM AM_REGION("user2", 0)
@@ -286,20 +286,20 @@ INPUT_PORTS_END
static const legacy_mos6526_interface cia_0_intf =
{
- DEVCB_LINE(amiga_cia_0_irq), /* irq_func */
- DEVCB_NULL, /* pc_func */
+ DEVCB_LINE(amiga_cia_0_irq), /* irq_func */
+ DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_INPUT_PORT("CIA0PORTA"),
- DEVCB_DRIVER_MEMBER(arcadia_amiga_state,arcadia_cia_0_porta_w), /* port A */
+ DEVCB_DRIVER_MEMBER(arcadia_amiga_state,arcadia_cia_0_porta_w), /* port A */
DEVCB_INPUT_PORT("CIA0PORTB"),
- DEVCB_DRIVER_MEMBER(arcadia_amiga_state,arcadia_cia_0_portb_w) /* port B */
+ DEVCB_DRIVER_MEMBER(arcadia_amiga_state,arcadia_cia_0_portb_w) /* port B */
};
static const legacy_mos6526_interface cia_1_intf =
{
- DEVCB_LINE(amiga_cia_1_irq), /* irq_func */
- DEVCB_NULL, /* pc_func */
+ DEVCB_LINE(amiga_cia_1_irq), /* irq_func */
+ DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
@@ -854,35 +854,35 @@ DRIVER_INIT_MEMBER(arcadia_amiga_state,xeon) { arcadia_init(machine()); generi
*************************************/
/* BIOS */
-GAME( 1988, ar_bios, 0, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Arcadia System BIOS", GAME_IS_BIOS_ROOT )
+GAME( 1988, ar_bios, 0, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Arcadia System BIOS", GAME_IS_BIOS_ROOT )
-GAME( 1988, ar_airh, ar_bios, arcadia, arcadia, arcadia_amiga_state, airh, ROT0, "Arcadia Systems", "SportTime Table Hockey (Arcadia, set 1, V 2.1)", 0 )
-GAME( 1988, ar_airh2, ar_airh, arcadia, arcadia, arcadia_amiga_state, airh, ROT0, "Arcadia Systems", "SportTime Table Hockey (Arcadia, set 2)", 0 )
+GAME( 1988, ar_airh, ar_bios, arcadia, arcadia, arcadia_amiga_state, airh, ROT0, "Arcadia Systems", "SportTime Table Hockey (Arcadia, set 1, V 2.1)", 0 )
+GAME( 1988, ar_airh2, ar_airh, arcadia, arcadia, arcadia_amiga_state, airh, ROT0, "Arcadia Systems", "SportTime Table Hockey (Arcadia, set 2)", 0 )
-GAME( 1988, ar_bowl, ar_bios, arcadia, arcadia, arcadia_amiga_state, bowl, ROT0, "Arcadia Systems", "SportTime Bowling (Arcadia, V 2.1)", 0 )
+GAME( 1988, ar_bowl, ar_bios, arcadia, arcadia, arcadia_amiga_state, bowl, ROT0, "Arcadia Systems", "SportTime Bowling (Arcadia, V 2.1)", 0 )
-GAME( 1987, ar_dart, ar_bios, arcadia, arcadia, arcadia_amiga_state, dart, ROT0, "Arcadia Systems", "World Darts (Arcadia, set 1, V 2.1)", 0 )
-GAME( 1987, ar_dart2, ar_dart, arcadia, arcadia, arcadia_amiga_state, dart, ROT0, "Arcadia Systems", "World Darts (Arcadia, set 2)", GAME_NOT_WORKING ) // bad dump
+GAME( 1987, ar_dart, ar_bios, arcadia, arcadia, arcadia_amiga_state, dart, ROT0, "Arcadia Systems", "World Darts (Arcadia, set 1, V 2.1)", 0 )
+GAME( 1987, ar_dart2, ar_dart, arcadia, arcadia, arcadia_amiga_state, dart, ROT0, "Arcadia Systems", "World Darts (Arcadia, set 2)", GAME_NOT_WORKING ) // bad dump
-GAME( 1988, ar_fast, ar_bios, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Magic Johnson's Fast Break (Arcadia, V 2.8)", 0 )
+GAME( 1988, ar_fast, ar_bios, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Magic Johnson's Fast Break (Arcadia, V 2.8)", 0 )
-GAME( 1988, ar_ldrb, ar_bios, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Leader Board (Arcadia, set 1, V 2.4?)", 0 )
-GAME( 1988, ar_ldrba, ar_ldrb, arcadia, arcadia, arcadia_amiga_state, ldrba, ROT0, "Arcadia Systems", "Leader Board (Arcadia, set 2, V 2.5)", 0 )
-GAME( 1988, ar_ldrbb, ar_ldrb, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Leader Board (Arcadia, set 3)", 0 )
+GAME( 1988, ar_ldrb, ar_bios, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Leader Board (Arcadia, set 1, V 2.4?)", 0 )
+GAME( 1988, ar_ldrba, ar_ldrb, arcadia, arcadia, arcadia_amiga_state, ldrba, ROT0, "Arcadia Systems", "Leader Board (Arcadia, set 2, V 2.5)", 0 )
+GAME( 1988, ar_ldrbb, ar_ldrb, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Leader Board (Arcadia, set 3)", 0 )
-GAME( 1987, ar_ninj, ar_bios, arcadia, arcadia, arcadia_amiga_state, ninj, ROT0, "Arcadia Systems", "Ninja Mission (Arcadia, set 1, V 2.5)", 0 )
+GAME( 1987, ar_ninj, ar_bios, arcadia, arcadia, arcadia_amiga_state, ninj, ROT0, "Arcadia Systems", "Ninja Mission (Arcadia, set 1, V 2.5)", 0 )
GAME( 1987, ar_ninj2, ar_ninj, arcadia, arcadia, arcadia_amiga_state, ninj, ROT0, "Arcadia Systems", "Ninja Mission (Arcadia, set 2)", 0 )
-GAME( 1988, ar_rdwr, ar_bios, arcadia, arcadia, arcadia_amiga_state, rdwr, ROT0, "Arcadia Systems", "RoadWars (Arcadia, V 2.3)", 0 )
+GAME( 1988, ar_rdwr, ar_bios, arcadia, arcadia, arcadia_amiga_state, rdwr, ROT0, "Arcadia Systems", "RoadWars (Arcadia, V 2.3)", 0 )
-GAME( 1988, ar_sdwr, ar_bios, arcadia, arcadia, arcadia_amiga_state, sdwr, ROT0, "Arcadia Systems", "Sidewinder (Arcadia, set 1, V 2.1)", 0 )
+GAME( 1988, ar_sdwr, ar_bios, arcadia, arcadia, arcadia_amiga_state, sdwr, ROT0, "Arcadia Systems", "Sidewinder (Arcadia, set 1, V 2.1)", 0 )
GAME( 1988, ar_sdwr2, ar_sdwr, arcadia, arcadia, arcadia_amiga_state, sdwr, ROT0, "Arcadia Systems", "Sidewinder (Arcadia, set 2)", 0 )
-GAME( 1989, ar_socc, ar_bios, arcadia, arcadia, arcadia_amiga_state, socc, ROT0, "Arcadia Systems", "World Trophy Soccer (Arcadia, V 3.0)", 0 )
+GAME( 1989, ar_socc, ar_bios, arcadia, arcadia, arcadia_amiga_state, socc, ROT0, "Arcadia Systems", "World Trophy Soccer (Arcadia, V 3.0)", 0 )
-GAME( 1990, ar_spot, ar_bios, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Spot (Arcadia)", 0 )
+GAME( 1990, ar_spot, ar_bios, arcadia, arcadia, arcadia_amiga_state, none, ROT0, "Arcadia Systems", "Spot (Arcadia)", 0 )
-GAME( 1987, ar_sprg, ar_bios, arcadia, arcadia, arcadia_amiga_state, sprg, ROT0, "Arcadia Systems", "Space Ranger (Arcadia, V 2.0)", 0 )
+GAME( 1987, ar_sprg, ar_bios, arcadia, arcadia, arcadia_amiga_state, sprg, ROT0, "Arcadia Systems", "Space Ranger (Arcadia, V 2.0)", 0 )
-GAME( 1988, ar_xeon, ar_bios, arcadia, arcadia, arcadia_amiga_state, xeon, ROT0, "Arcadia Systems", "Xenon (Arcadia, V 2.3)", 0 )
+GAME( 1988, ar_xeon, ar_bios, arcadia, arcadia, arcadia_amiga_state, xeon, ROT0, "Arcadia Systems", "Xenon (Arcadia, V 2.3)", 0 )
diff --git a/src/mame/drivers/argus.c b/src/mame/drivers/argus.c
index b843ab448d8..eaf21c1923c 100644
--- a/src/mame/drivers/argus.c
+++ b/src/mame/drivers/argus.c
@@ -180,7 +180,7 @@ WRITE8_MEMBER(argus_state::argus_bankselect_w)
int bankaddress;
bankaddress = 0x10000 + ((data & 7) * 0x4000);
- membank("bank1")->set_base(&RAM[bankaddress]); /* Select 8 banks of 16k */
+ membank("bank1")->set_base(&RAM[bankaddress]); /* Select 8 banks of 16k */
}
@@ -298,7 +298,7 @@ ADDRESS_MAP_END
***************************************************************************/
static INPUT_PORTS_START( argus )
- PORT_START("SYSTEM") /* System control */
+ PORT_START("SYSTEM") /* System control */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -308,7 +308,7 @@ static INPUT_PORTS_START( argus )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_START("P1") /* Player 1 control */
+ PORT_START("P1") /* Player 1 control */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
@@ -318,7 +318,7 @@ static INPUT_PORTS_START( argus )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("P2") /* Player 2 control */
+ PORT_START("P2") /* Player 2 control */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
@@ -330,33 +330,33 @@ static INPUT_PORTS_START( argus )
/* DIPSW default setting: all OFF */
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,6")
+ PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,6")
PORT_DIPSETTING( 0x04, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x06, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x02, DEF_STR( Medium_Difficult ) )
PORT_DIPSETTING( 0x00, DEF_STR( Difficult ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x10, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:2,1")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:2,1")
PORT_DIPSETTING( 0x80, "2" )
PORT_DIPSETTING( 0xc0, "3" )
PORT_DIPSETTING( 0x40, "4" )
PORT_DIPSETTING( 0x00, "5" )
PORT_START("DSW2")
- PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:8" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:7" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:6,5,4")
+ PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x1c, 0x1c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:6,5,4")
PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
@@ -365,7 +365,7 @@ static INPUT_PORTS_START( argus )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x14, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0xe0, 0xe0, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:3,2,1")
+ PORT_DIPNAME( 0xe0, 0xe0, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:3,2,1")
PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 3C_1C ) )
@@ -380,25 +380,25 @@ static INPUT_PORTS_START( valtric )
PORT_INCLUDE( argus )
PORT_MODIFY("SYSTEM")
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* assigned JAMMA "Service", but not used */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* assigned JAMMA "Service", but not used */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
/* DIPSW default setting: all OFF */
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,6")
+ PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,6")
PORT_DIPSETTING( 0x06, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x04, DEF_STR( Medium_Difficult ) )
PORT_DIPSETTING( 0x02, DEF_STR( Difficult ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:2,1")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:2,1")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0xc0, "3" )
PORT_DIPSETTING( 0x80, "4" )
PORT_DIPSETTING( 0x40, "5" )
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x01, 0x01, "Invulnerability (Cheat)" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x01, 0x01, "Invulnerability (Cheat)" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -407,31 +407,31 @@ static INPUT_PORTS_START( butasan )
PORT_INCLUDE( valtric )
PORT_MODIFY("SYSTEM")
- PORT_SERVICE( 0x20, IP_ACTIVE_LOW ) /* work as both "Service Credit SW" and "Test Mode SW" */
+ PORT_SERVICE( 0x20, IP_ACTIVE_LOW ) /* work as both "Service Credit SW" and "Test Mode SW" */
/* DIPSW default setting: all OFF */
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Invulnerability (Cheat)" ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x02, 0x02, "Invulnerability (Cheat)" ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:6,5")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:6,5")
PORT_DIPSETTING( 0x0c, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x04, "5" )
PORT_DIPSETTING( 0x00, "6" )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,3")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,3")
PORT_DIPSETTING( 0x30, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Medium_Difficult ) )
PORT_DIPSETTING( 0x10, DEF_STR( Difficult ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:2" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:1" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:1" ) /* Listed as "Unused" */
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -543,7 +543,7 @@ GFXDECODE_END
static MACHINE_CONFIG_START( argus, argus_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 5000000) /* 4 MHz */
+ MCFG_CPU_ADD("maincpu", Z80, 5000000) /* 4 MHz */
MCFG_CPU_PROGRAM_MAP(argus_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", argus_state, argus_scanline, "screen", 0, 1)
@@ -556,7 +556,7 @@ static MACHINE_CONFIG_START( argus, argus_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(54)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is referred to psychic5 driver */)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is referred to psychic5 driver */)
MCFG_SCREEN_SIZE(32*16, 32*16)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
MCFG_SCREEN_UPDATE_DRIVER(argus_state, screen_update_argus)
@@ -587,7 +587,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( valtric, argus_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 5000000) /* 5 MHz */
+ MCFG_CPU_ADD("maincpu", Z80, 5000000) /* 5 MHz */
MCFG_CPU_PROGRAM_MAP(valtric_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", argus_state, argus_scanline, "screen", 0, 1)
@@ -600,7 +600,7 @@ static MACHINE_CONFIG_START( valtric, argus_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(54)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is referred to psychic5 driver */)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is referred to psychic5 driver */)
MCFG_SCREEN_SIZE(32*16, 32*16)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
MCFG_SCREEN_UPDATE_DRIVER(argus_state, screen_update_valtric)
@@ -631,7 +631,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( butasan, argus_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 5000000) /* 5 MHz */
+ MCFG_CPU_ADD("maincpu", Z80, 5000000) /* 5 MHz */
MCFG_CPU_PROGRAM_MAP(butasan_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", argus_state, butasan_scanline, "screen", 0, 1)
@@ -644,7 +644,7 @@ static MACHINE_CONFIG_START( butasan, argus_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(54)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is taken from psychic5 driver */)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0) /* This value is taken from psychic5 driver */)
MCFG_SCREEN_SIZE(32*16, 32*16)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
MCFG_SCREEN_UPDATE_DRIVER(argus_state, screen_update_butasan)
@@ -680,73 +680,73 @@ MACHINE_CONFIG_END
***************************************************************************/
ROM_START( argus )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU */
ROM_LOAD( "ag_02.bin", 0x00000, 0x08000, CRC(278a3f3d) SHA1(c5ac5a004ebf0194c33f71dab4020fa636cefbc2) )
ROM_LOAD( "ag_03.bin", 0x10000, 0x08000, CRC(3a7f3bfa) SHA1(b11e134c084fc3c982dfe31836c1cf3fc0d481fd) )
ROM_LOAD( "ag_04.bin", 0x18000, 0x08000, CRC(76adc9f6) SHA1(e223a8b2371c51f121958ee3687c777f597334c9) )
ROM_LOAD( "ag_05.bin", 0x20000, 0x08000, CRC(f76692d6) SHA1(1dc353a042cdda909eb9f1b1ca749a3b3eaa01e4) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "ag_01.bin", 0x00000, 0x04000, CRC(769e3f57) SHA1(209160a96486ab0b90967c015143ec28fba2e2a4) )
- ROM_REGION( 0x20000, "gfx1", 0 ) /* Sprite */
+ ROM_REGION( 0x20000, "gfx1", 0 ) /* Sprite */
ROM_LOAD( "ag_09.bin", 0x00000, 0x08000, CRC(6dbc1c58) SHA1(ef7b6901b702dd347b3a3f162162138175efe578) )
ROM_LOAD( "ag_08.bin", 0x08000, 0x08000, CRC(ce6e987e) SHA1(9de257d8061ec917f4d443ff509fd457f995d73b) )
ROM_LOAD( "ag_07.bin", 0x10000, 0x08000, CRC(bbb9638d) SHA1(61dec71d4d976bef3af26d0dc9c0355fd1098ffb) )
ROM_LOAD( "ag_06.bin", 0x18000, 0x08000, CRC(655b48f8) SHA1(4fce1dffe091b97e7055955743434e49e97b4b79) )
- ROM_REGION( 0x20000, "gfx2", 0 ) /* BG0 */
+ ROM_REGION( 0x20000, "gfx2", 0 ) /* BG0 */
ROM_LOAD( "ag_13.bin", 0x00000, 0x08000, CRC(20274268) SHA1(9b7767d14bd169dabe6add0623d353bf4b59779b) )
ROM_LOAD( "ag_14.bin", 0x08000, 0x08000, CRC(ceb8860b) SHA1(90e094686d9d18e49e4848d18d1e31ac95f13937) )
ROM_LOAD( "ag_11.bin", 0x10000, 0x08000, CRC(99ce8556) SHA1(39caababd6e20ecb0375b85fb6490ee0b04f0949) )
ROM_LOAD( "ag_12.bin", 0x18000, 0x08000, CRC(e0e5377c) SHA1(b5981d832127d0b28b6a7bb0437716593e0ed71a) )
- ROM_REGION( 0x08000, "gfx3", 0 ) /* BG1 */
+ ROM_REGION( 0x08000, "gfx3", 0 ) /* BG1 */
ROM_LOAD( "ag_17.bin", 0x00000, 0x08000, CRC(0f12d09b) SHA1(718db4ff016526dddacdf6f0088f247ee97c6543) )
- ROM_REGION( 0x08000, "gfx4", 0 ) /* Text */
+ ROM_REGION( 0x08000, "gfx4", 0 ) /* Text */
ROM_LOAD( "ag_10.bin", 0x00000, 0x04000, CRC(2de696c4) SHA1(1ad0f1cde127a1618c2ea74a53e522963a79e5ce) )
- ROM_REGION( 0x08000, "user1", 0 ) /* Map */
+ ROM_REGION( 0x08000, "user1", 0 ) /* Map */
ROM_LOAD( "ag_15.bin", 0x00000, 0x08000, CRC(99834c1b) SHA1(330f271771b158493b28bb178c8cda98efd1d90c) )
- ROM_REGION( 0x08000, "user2", 0 ) /* Pattern */
+ ROM_REGION( 0x08000, "user2", 0 ) /* Pattern */
ROM_LOAD( "ag_16.bin", 0x00000, 0x08000, CRC(39a51714) SHA1(ad89a630f1352eb4d8beeeebf909d5e2b5d7cc12) )
ROM_END
ROM_START( valtric )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* Main CPU */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* Main CPU */
ROM_LOAD( "vt_04.bin", 0x00000, 0x08000, CRC(709c705f) SHA1(b82e2209a0371dcbc2708c485b02985cea04353f) )
ROM_LOAD( "vt_06.bin", 0x10000, 0x10000, CRC(c9cbb4e4) SHA1(3c84cda778263a9bb2031e29f6f29f29878d2070) )
ROM_LOAD( "vt_05.bin", 0x20000, 0x10000, CRC(7ab2684b) SHA1(9bca7e2fd3b5f4043de37cd439d5235957e5012f) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "vt_01.bin", 0x00000, 0x08000, CRC(4616484f) SHA1(24d060218cc1542ebfc2100ecd6489a0e17b36ee) )
- ROM_REGION( 0x20000, "gfx1", 0 ) /* Sprite */
+ ROM_REGION( 0x20000, "gfx1", 0 ) /* Sprite */
ROM_LOAD( "vt_02.bin", 0x00000, 0x10000, CRC(66401977) SHA1(91c527d0bcea54d723068715a12cb3c976d04294) )
ROM_LOAD( "vt_03.bin", 0x10000, 0x10000, CRC(9203bbce) SHA1(f40cee48f62a87a0b5d18e271faa5b8dd36ae5f1) )
- ROM_REGION( 0x40000, "gfx2", 0 ) /* BG */
+ ROM_REGION( 0x40000, "gfx2", 0 ) /* BG */
ROM_LOAD( "vt_08.bin", 0x00000, 0x10000, CRC(661dd338) SHA1(cc643a14607c10e4a1710766f77422cd89a6bf94) )
ROM_LOAD( "vt_09.bin", 0x10000, 0x10000, CRC(085a35b1) SHA1(ff589e67b6b5a6e661f29294a32a3840f45a9304) )
ROM_LOAD( "vt_10.bin", 0x20000, 0x10000, CRC(09c47323) SHA1(fcfbd5054e63fae00b6a3959228964ac8f3cbf37) )
ROM_LOAD( "vt_11.bin", 0x30000, 0x10000, CRC(4cf800b5) SHA1(7241e284b15475d8a6d533e4caadd0acbf058231) )
- ROM_REGION( 0x08000, "gfx3", 0 ) /* Text */
+ ROM_REGION( 0x08000, "gfx3", 0 ) /* Text */
ROM_LOAD( "vt_07.bin", 0x00000, 0x08000, CRC(d5f9bfb9) SHA1(6b3f11f9b8f76c0144a109f1506d8cbb01876237) )
ROM_END
ROM_START( butasan ) /* English "subtitle" of Butasan for Japanese region. Original Jaleco PCB */
- ROM_REGION( 0x30000, "maincpu", 0 ) /* Main CPU */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* Main CPU */
ROM_LOAD( "4.t2", 0x00000, 0x08000, CRC(1ba1d8e4) SHA1(ab141a1fbaab9f3ef6788b131833effb32c42930) ) /* M5L27256K-2 (32kb) - 4.4.bin */
ROM_LOAD( "3.s2", 0x10000, 0x10000, CRC(a6b3ccc2) SHA1(fcc9db1cd68fd9477d86e63e6906d194d5ee477a) )
ROM_LOAD( "2.p2", 0x20000, 0x10000, CRC(96517fa9) SHA1(03ee1f118f109c85b046098c457a90b40e163f3c) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "1.b2", 0x00000, 0x10000, CRC(c9d23e2d) SHA1(cee289d5bf7626fc35808a09f9f1f4628fa16974) )
- ROM_REGION( 0x80000, "gfx1", 0 ) /* Sprite */
+ ROM_REGION( 0x80000, "gfx1", 0 ) /* Sprite */
ROM_LOAD( "16.k16", 0x00000, 0x10000, CRC(e0ce51b6) SHA1(458c7c422a7b6ce42f397a8868610f6386fd815c) )
ROM_LOAD( "15.k15", 0x10000, 0x10000, CRC(2105f6e1) SHA1(54c13073f0dc8b5d3fb5578aa5958a5dd01396a6) )
ROM_LOAD( "14.k14", 0x20000, 0x10000, CRC(8ec891c1) SHA1(e16f18a0eed300752af8f07fd3cef5cd825a2a05) )
@@ -756,31 +756,31 @@ ROM_START( butasan ) /* English "subtitle" of Butasan for Japanese region. Orig
ROM_LOAD( "10.k10", 0x60000, 0x10000, CRC(fd4d3baf) SHA1(fa8e3970a8aac83efcb669fe5d4683adade9aa4f) )
ROM_LOAD( "9.k9", 0x70000, 0x10000, CRC(7da4c0fd) SHA1(fb2b148ccfee530313da886eddf7711ee83b4aeb) )
- ROM_REGION( 0x20000, "gfx2", 0 ) /* BG0 */
+ ROM_REGION( 0x20000, "gfx2", 0 ) /* BG0 */
ROM_LOAD( "5.l7", 0x00000, 0x10000, CRC(b8e026b0) SHA1(eb6ff9042b21b7190000c571ccba7d81f11ce9f1) )
ROM_LOAD( "6.n7", 0x10000, 0x10000, CRC(8bbacb81) SHA1(015be76e44ed2389eff912d8f61a757667d7670b) )
- ROM_REGION( 0x10000, "gfx3", 0 ) /* BG1 */
+ ROM_REGION( 0x10000, "gfx3", 0 ) /* BG1 */
ROM_LOAD( "7.a8", 0x00000, 0x10000, CRC(3a48d531) SHA1(0ff6256bb7ea909d95b2bfb994ebc5432ea6d055) )
- ROM_REGION( 0x08000, "gfx4", 0 ) /* Text */
+ ROM_REGION( 0x08000, "gfx4", 0 ) /* Text */
ROM_LOAD( "8.a7", 0x00000, 0x08000, CRC(85153252) SHA1(20af223f9dc2e29e506e257c36e96d10dc150467) )
- ROM_REGION( 0x00200, "proms", 0 ) /* Data proms ??? */
+ ROM_REGION( 0x00200, "proms", 0 ) /* Data proms ??? */
ROM_LOAD( "buta-01.prm", 0x00000, 0x00100, CRC(45baedd0) SHA1(afdafb67d55007e6fb99518657e27ce61d2cb7e6) )
ROM_LOAD( "buta-02.prm", 0x00100, 0x00100, CRC(0dcb18fc) SHA1(0b097b873c9484981f87a5e3d1af767f901ae05f) )
ROM_END
ROM_START( butasanj )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* Main CPU */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* Main CPU */
ROM_LOAD( "buta-04.bin", 0x00000, 0x08000, CRC(47ff4ca9) SHA1(d89a41f6987c91d20b010f0cbda332cf54b21f8c) )
ROM_LOAD( "buta-03.bin", 0x10000, 0x10000, CRC(69fd88c7) SHA1(fd827d7926a2de5ffe2982b3a59ea43de00ee46b) )
ROM_LOAD( "buta-02.bin", 0x20000, 0x10000, CRC(519dc412) SHA1(48bbb01b217bd19c48ef7ab12c60805aaa02527c) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "1.b2", 0x00000, 0x10000, CRC(c9d23e2d) SHA1(cee289d5bf7626fc35808a09f9f1f4628fa16974) ) // buta-01.bin
- ROM_REGION( 0x80000, "gfx1", 0 ) /* Sprite */
+ ROM_REGION( 0x80000, "gfx1", 0 ) /* Sprite */
ROM_LOAD( "16.k16", 0x00000, 0x10000, CRC(e0ce51b6) SHA1(458c7c422a7b6ce42f397a8868610f6386fd815c) ) // buta-16.bin
ROM_LOAD( "buta-15.bin", 0x10000, 0x10000, CRC(3ed19daa) SHA1(b8090c3baa2b31681bed15c682a97c024e229df7) )
ROM_LOAD( "14.k14", 0x20000, 0x10000, CRC(8ec891c1) SHA1(e16f18a0eed300752af8f07fd3cef5cd825a2a05) ) // buta-14.bin
@@ -790,17 +790,17 @@ ROM_START( butasanj )
ROM_LOAD( "10.k10", 0x60000, 0x10000, CRC(fd4d3baf) SHA1(fa8e3970a8aac83efcb669fe5d4683adade9aa4f) ) // buta-10.bin
ROM_LOAD( "9.k9", 0x70000, 0x10000, CRC(7da4c0fd) SHA1(fb2b148ccfee530313da886eddf7711ee83b4aeb) ) // buta-09.bin
- ROM_REGION( 0x20000, "gfx2", 0 ) /* BG0 */
+ ROM_REGION( 0x20000, "gfx2", 0 ) /* BG0 */
ROM_LOAD( "5.l7", 0x00000, 0x10000, CRC(b8e026b0) SHA1(eb6ff9042b21b7190000c571ccba7d81f11ce9f1) ) // buta-05.bin
ROM_LOAD( "6.n7", 0x10000, 0x10000, CRC(8bbacb81) SHA1(015be76e44ed2389eff912d8f61a757667d7670b) ) // buta-06.bin
- ROM_REGION( 0x10000, "gfx3", 0 ) /* BG1 */
+ ROM_REGION( 0x10000, "gfx3", 0 ) /* BG1 */
ROM_LOAD( "7.a8", 0x00000, 0x10000, CRC(3a48d531) SHA1(0ff6256bb7ea909d95b2bfb994ebc5432ea6d055) ) // buta-07.bin
- ROM_REGION( 0x08000, "gfx4", 0 ) /* Text */
+ ROM_REGION( 0x08000, "gfx4", 0 ) /* Text */
ROM_LOAD( "buta-08.bin", 0x00000, 0x08000, CRC(5d45ce9c) SHA1(113c3e7ce20634ee4bb740705485572583298694) )
- ROM_REGION( 0x00200, "proms", 0 ) /* Data proms ??? */
+ ROM_REGION( 0x00200, "proms", 0 ) /* Data proms ??? */
ROM_LOAD( "buta-01.prm", 0x00000, 0x00100, CRC(45baedd0) SHA1(afdafb67d55007e6fb99518657e27ce61d2cb7e6) )
ROM_LOAD( "buta-02.prm", 0x00100, 0x00100, CRC(0dcb18fc) SHA1(0b097b873c9484981f87a5e3d1af767f901ae05f) )
ROM_END
diff --git a/src/mame/drivers/aristmk4.c b/src/mame/drivers/aristmk4.c
index f7745871a3b..710fb13ecf4 100644
--- a/src/mame/drivers/aristmk4.c
+++ b/src/mame/drivers/aristmk4.c
@@ -227,7 +227,7 @@
***********************************************************************************************************************************************/
-#define MAIN_CLOCK XTAL_12MHz
+#define MAIN_CLOCK XTAL_12MHz
#include "emu.h"
#include "cpu/m6809/m6809.h"
@@ -345,10 +345,10 @@ INLINE void uBackgroundColour(running_machine &machine)
aristmk4_state *state = machine.driver_data<aristmk4_state>();
/* SW7 can be set when the main door is open, this allows the colours for the background
- to be adjusted whilst the machine is running.
+ to be adjusted whilst the machine is running.
- There are 4 possible combinations for colour select via SW7, colours vary based on software installed.
- */
+ There are 4 possible combinations for colour select via SW7, colours vary based on software installed.
+ */
switch(state->ioport("SW7")->read())
{
@@ -359,7 +359,7 @@ INLINE void uBackgroundColour(running_machine &machine)
break;
case 0x01:
// unselect U22 via SW7. OE on U22 is low.
- memset(&state->m_shapeRomPtr[0x4000],0xff,0x2000); // fill unused space with 0xff
+ memset(&state->m_shapeRomPtr[0x4000],0xff,0x2000); // fill unused space with 0xff
memcpy(&state->m_shapeRomPtr[0xa000],&state->m_shapeRom[0xa000], 0x2000); // restore defaults here
break;
case 0x02:
@@ -393,8 +393,8 @@ UINT32 aristmk4_state::screen_update_aristmk4(screen_device &screen, bitmap_ind1
color = ((m_mkiv_vram[count]) & 0xe0) >> 5;
tile = (m_mkiv_vram[count+1]|m_mkiv_vram[count]<<8) & 0x3ff;
bgtile = (m_mkiv_vram[count+1]|m_mkiv_vram[count]<<8) & 0xff; // first 256 tiles
- uBackgroundColour(machine()); // read sw7
- gfx->decode(bgtile); // force the machine to update only the first 256 tiles.
+ uBackgroundColour(machine()); // read sw7
+ gfx->decode(bgtile); // force the machine to update only the first 256 tiles.
// as we only update the background, not the entire display.
flipx = ((m_mkiv_vram[count]) & 0x04);
flipy = ((m_mkiv_vram[count]) & 0x08);
@@ -474,17 +474,17 @@ READ8_MEMBER(aristmk4_state::u3_p2)
READ8_MEMBER(aristmk4_state::u3_p3)
{
- int u3_p3_ret= ioport("5003")->read();
+ int u3_p3_ret= ioport("5003")->read();
- if ((m_printer_motor)==1) // Printer Motor Off
+ if ((m_printer_motor)==1) // Printer Motor Off
- {
- u3_p3_ret = u3_p3_ret^0x80; // Printer Home Off
- m_printer_motor=0;
+ {
+ u3_p3_ret = u3_p3_ret^0x80; // Printer Home Off
+ m_printer_motor=0;
- }
+ }
- return u3_p3_ret;
+ return u3_p3_ret;
}
@@ -555,7 +555,7 @@ READ8_MEMBER(aristmk4_state::mkiv_pia_ina)
/* uncomment this code once RTC is fixed */
//return machine().device<mc146818_device>("rtc")->read(space,1);
- return 0; // OK for now, the aussie version has no RTC on the MB so this is valid.
+ return 0; // OK for now, the aussie version has no RTC on the MB so this is valid.
}
//output a
@@ -595,12 +595,12 @@ WRITE8_MEMBER(aristmk4_state::mkiv_pia_outb)
UINT8 emet[5];
int i = 0;
//pia_data = data;
- emet[0] = data & 0x01; /* emet1 - bit 1 - PB0 */
+ emet[0] = data & 0x01; /* emet1 - bit 1 - PB0 */
/* seren1 - bit 2 - PB1 */
- emet[1] = data & 0x04; /* emet3 - bit 3 - PB2 */
- emet[2] = data & 0x08; /* emet4 - bit 4 - PB3 */
- emet[3] = data & 0x10; /* emet5 - bit 5 - PB4 */
- emet[4] = data & 0x20; /* emet6 - bit 6 - PB5 */
+ emet[1] = data & 0x04; /* emet3 - bit 3 - PB2 */
+ emet[2] = data & 0x08; /* emet4 - bit 4 - PB3 */
+ emet[3] = data & 0x10; /* emet5 - bit 5 - PB4 */
+ emet[4] = data & 0x20; /* emet6 - bit 6 - PB5 */
for(i = 0;i<sizeof(emet);i++)
{
@@ -623,7 +623,7 @@ static const char *const meter_sample_names[] =
static const samples_interface meter_samples_interface =
{
- 5, /* one for each meter - can pulse simultaneously */
+ 5, /* one for each meter - can pulse simultaneously */
meter_sample_names
};
@@ -745,17 +745,17 @@ WRITE8_MEMBER(aristmk4_state::via_b_w)
switch(m_ay8910_1)
{
- case 0x00: //INACT -Nothing to do here. Inactive PSG
+ case 0x00: //INACT -Nothing to do here. Inactive PSG
break;
- case 0x03: //READ - Nothing to do here. The read happens in via_a_r
+ case 0x03: //READ - Nothing to do here. The read happens in via_a_r
break;
- case 0x06: //WRITE
+ case 0x06: //WRITE
{
ay8910_data_w( machine().device("ay1"), space, 0 , m_psg_data );
//logerror("VIA Port A write data ay1: %02X\n",m_psg_data);
break;
}
- case 0x07: //LATCH Address (set register)
+ case 0x07: //LATCH Address (set register)
{
ay8910_address_w( machine().device("ay1"), space, 0 , m_psg_data );
//logerror("VIA Port B write register ay1: %02X\n",m_psg_data);
@@ -770,19 +770,19 @@ WRITE8_MEMBER(aristmk4_state::via_b_w)
switch(m_ay8910_2)
{
- case 0x00: //INACT - Nothing to do here. Inactive PSG
+ case 0x00: //INACT - Nothing to do here. Inactive PSG
break;
- case 0x02: //INACT - '010' Nothing to do here. Inactive PSG. this will only happen on ay2 due to the bit 2 swap on 'inactive'
+ case 0x02: //INACT - '010' Nothing to do here. Inactive PSG. this will only happen on ay2 due to the bit 2 swap on 'inactive'
break;
- case 0x03: //READ - Nothing to do here. The read happens in via_a_r
+ case 0x03: //READ - Nothing to do here. The read happens in via_a_r
break;
- case 0x06: //WRITE
+ case 0x06: //WRITE
{
ay8910_data_w( machine().device("ay2"), space, 0 , m_psg_data );
//logerror("VIA Port A write data ay2: %02X\n",m_psg_data);
break;
}
- case 0x07: //LATCH Address (set register)
+ case 0x07: //LATCH Address (set register)
{
ay8910_address_w( machine().device("ay2"), space, 0 , m_psg_data );
//logerror("VIA Port B write register ay2: %02X\n",m_psg_data);
@@ -1543,35 +1543,35 @@ static const via6522_interface via_interface =
static const pia6821_interface aristmk4_pia1_intf =
{
- DEVCB_DRIVER_MEMBER(aristmk4_state, mkiv_pia_ina), // port A in
- DEVCB_NULL, // port B in
- DEVCB_NULL, // line CA1 in
- DEVCB_NULL, // line CB1 in
- DEVCB_NULL, // line CA2 in
- DEVCB_NULL, // line CB2 in
- DEVCB_DRIVER_MEMBER(aristmk4_state, mkiv_pia_outa), // port A out
- DEVCB_DRIVER_MEMBER(aristmk4_state,mkiv_pia_outb), // port B out
- DEVCB_DRIVER_MEMBER(aristmk4_state,mkiv_pia_ca2), // line CA2 out
- DEVCB_DRIVER_MEMBER(aristmk4_state,mkiv_pia_cb2), // port CB2 out
- DEVCB_NULL, // IRQA
- DEVCB_NULL // IRQB
+ DEVCB_DRIVER_MEMBER(aristmk4_state, mkiv_pia_ina), // port A in
+ DEVCB_NULL, // port B in
+ DEVCB_NULL, // line CA1 in
+ DEVCB_NULL, // line CB1 in
+ DEVCB_NULL, // line CA2 in
+ DEVCB_NULL, // line CB2 in
+ DEVCB_DRIVER_MEMBER(aristmk4_state, mkiv_pia_outa), // port A out
+ DEVCB_DRIVER_MEMBER(aristmk4_state,mkiv_pia_outb), // port B out
+ DEVCB_DRIVER_MEMBER(aristmk4_state,mkiv_pia_ca2), // line CA2 out
+ DEVCB_DRIVER_MEMBER(aristmk4_state,mkiv_pia_cb2), // port CB2 out
+ DEVCB_NULL, // IRQA
+ DEVCB_NULL // IRQB
};
static const mc6845_interface mc6845_intf =
{
/* in fact is a mc6845 driving 4 pixels by memory address.
- that's why the big horizontal parameters */
-
- "screen", /* screen we are acting on */
- 4, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ that's why the big horizontal parameters */
+
+ "screen", /* screen we are acting on */
+ 4, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
/* read m/c number */
@@ -1593,12 +1593,12 @@ READ8_MEMBER(aristmk4_state::pc1_r)
static I8255A_INTERFACE( ppi8255_intf )
{
- DEVCB_DRIVER_MEMBER(aristmk4_state,pa1_r), /* Port A read */
- DEVCB_NULL, /* Port A write */
- DEVCB_DRIVER_MEMBER(aristmk4_state,pb1_r), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_DRIVER_MEMBER(aristmk4_state,pc1_r), /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_DRIVER_MEMBER(aristmk4_state,pa1_r), /* Port A read */
+ DEVCB_NULL, /* Port A write */
+ DEVCB_DRIVER_MEMBER(aristmk4_state,pb1_r), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_DRIVER_MEMBER(aristmk4_state,pc1_r), /* Port C read */
+ DEVCB_NULL /* Port C write */
};
@@ -1660,20 +1660,20 @@ void aristmk4_state::machine_reset()
TIMER_DEVICE_CALLBACK_MEMBER(aristmk4_state::aristmk4_pf)
{
/*
- IRQ generator pulses the NMI signal to CPU in the event of power down or power failure.
- This event is recorded in NVRAM to facilitate the Robot Test.
+ IRQ generator pulses the NMI signal to CPU in the event of power down or power failure.
+ This event is recorded in NVRAM to facilitate the Robot Test.
- Would be ideal to use this in our add_exit_callback instead of using a timer but it doesn't seem to
- save the power down state in nvram. Is there a cleaner way to do this?
+ Would be ideal to use this in our add_exit_callback instead of using a timer but it doesn't seem to
+ save the power down state in nvram. Is there a cleaner way to do this?
- To enter the robot test
+ To enter the robot test
- 1. Open the main door
- 2. Trigger powerfail / NMI by presing L for at least 1 second, the game will freeze.
- 3. Press F3 ( reset ) whilst holding down robot/hopper test button ( Z )
+ 1. Open the main door
+ 2. Trigger powerfail / NMI by presing L for at least 1 second, the game will freeze.
+ 3. Press F3 ( reset ) whilst holding down robot/hopper test button ( Z )
- Note: The use of 1 Hz in the timer is to avoid unintentional triggering the NMI ( ie.. hold down L for at least 1 second )
- */
+ Note: The use of 1 Hz in the timer is to avoid unintentional triggering the NMI ( ie.. hold down L for at least 1 second )
+ */
if(machine().root_device().ioport("powerfail")->read()) // send NMI signal if L pressed
{
@@ -1695,7 +1695,7 @@ static MACHINE_CONFIG_START( aristmk4, aristmk4_state )
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(320, 256)
- MCFG_SCREEN_VISIBLE_AREA(0, 304-1, 0, 216-1) /* from the crtc registers... updated by crtc */
+ MCFG_SCREEN_VISIBLE_AREA(0, 304-1, 0, 216-1) /* from the crtc registers... updated by crtc */
MCFG_GFXDECODE(aristmk4)
MCFG_PALETTE_LENGTH(512)
@@ -1703,7 +1703,7 @@ static MACHINE_CONFIG_START( aristmk4, aristmk4_state )
MCFG_SCREEN_UPDATE_DRIVER(aristmk4_state, screen_update_aristmk4)
MCFG_I8255A_ADD( "ppi8255_0", ppi8255_intf )
- MCFG_VIA6522_ADD("via6522_0", 0, via_interface) /* 1 MHz.(only 1 or 2 MHz.are valid) */
+ MCFG_VIA6522_ADD("via6522_0", 0, via_interface) /* 1 MHz.(only 1 or 2 MHz.are valid) */
MCFG_PIA6821_ADD("pia6821_0", aristmk4_pia1_intf)
MCFG_MC6845_ADD("crtc", C6545_1, MAIN_CLOCK/8, mc6845_intf) // TODO: type is unknown
MCFG_MC146818_ADD("rtc", MC146818_IGNORE_CENTURY)
@@ -1760,10 +1760,10 @@ MACHINE_CONFIG_END
ROM_START( 3bagflvt )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("5vxfc790.u87", 0x06000, 0x2000, CRC(79ee932f) SHA1(de85de107310315b69bd7564f1921c7501b679b2)) // game code
ROM_LOAD("5vxfc790.u86", 0x08000, 0x8000, CRC(b6185f3b) SHA1(db642d7b1d1fd93483642bae518eb99a3e99aec9))
@@ -1776,17 +1776,17 @@ ROM_START( 3bagflvt )
ROM_LOAD("1vlsh224.u46", 0x08000, 0x2000, CRC(f33970b3) SHA1(8814a4d29383545c7c48e5b44f16a53e38b67fc3))
ROM_LOAD("1vlsh224.u47", 0x0a000, 0x2000, CRC(609ecf9e) SHA1(9d819bb71f62eb4dd1b3d71748e87c7d77e2afe6))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm48.u71", 0x0000, 0x0200, CRC(81daeeb0) SHA1(7dfe198c6def5c4ae4ecac488d65c2911fb3a890))
ROM_END
ROM_START( 3bagflnz )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("3vxfc5345.u87", 0x06000, 0x2000, CRC(ba97a469) SHA1(fee56fe7116d1f1aab2b0f2526101d4eb87f0bf1)) // game code
ROM_LOAD("3vxfc5345.u86", 0x08000, 0x8000, CRC(c632c7c7) SHA1(f3090d037f71a0cf099bb55abbc509cf95f0cbba))
@@ -1799,17 +1799,17 @@ ROM_START( 3bagflnz )
ROM_LOAD("1vlsh224.u46", 0x08000, 0x2000, CRC(f33970b3) SHA1(8814a4d29383545c7c48e5b44f16a53e38b67fc3))
ROM_LOAD("1vlsh224.u47", 0x0a000, 0x2000, CRC(609ecf9e) SHA1(9d819bb71f62eb4dd1b3d71748e87c7d77e2afe6))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm48.u71", 0x0000, 0x0200, CRC(81daeeb0) SHA1(7dfe198c6def5c4ae4ecac488d65c2911fb3a890))
ROM_END
ROM_START( blkrhino )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("3vxfc5344.u87", 0x06000, 0x2000, CRC(7aed16f5) SHA1(0229387e352da8e7278e5bc5c61079742d05d900)) // game code
ROM_LOAD("3vxfc5344.u86", 0x08000, 0x8000, CRC(4739f0f0) SHA1(231b6ad26b6b5d413dbd0a23257e86814978449b))
@@ -1822,17 +1822,17 @@ ROM_START( blkrhino )
ROM_LOAD("1vlsh236.u46", 0x08000, 0x2000, CRC(4a0ce91d) SHA1(e2f853c69fb256870c9809cdfbba2b40b47a0004))
ROM_LOAD("1vlsh236.u47", 0x0a000, 0x2000, CRC(b265276e) SHA1(8fc0b7a0c12549b4138c51eb91b74f13282909dd))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( coralr2 )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("1vxfc5472.u87", 0x06000, 0x2000, CRC(f51e541b) SHA1(00f5b9019cdae77d4b5745156b92343d22ad3a6e)) // game code
ROM_LOAD("1vxfc5472.u86", 0x08000, 0x8000, CRC(d8d27f65) SHA1(19aec2a29e9d3ecbd8ecfd74ae60cfbf197d2faa))
@@ -1845,17 +1845,17 @@ ROM_START( coralr2 )
ROM_LOAD("1vlsh385.u46", 0x08000, 0x2000, CRC(e13ec0ed) SHA1(80d5ef2d980a8fe1f2bb28b512022518ffc82de1))
ROM_LOAD("1vlsh385.u47", 0x0a000, 0x2000, CRC(30e88bb4) SHA1(dfcd21c6fc50123dfcc0e60429948c650a6de625))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( eforest )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("12xf528902.u87", 0x06000, 0x2000, CRC(b2f79725) SHA1(66842130b49276bda91e211514af0ab074d2c283)) // game code
ROM_LOAD("12xf528902.u86", 0x08000, 0x8000, CRC(547207f3) SHA1(aedae50abb4cffa0434abfe606a11fbbba037197))
@@ -1868,17 +1868,17 @@ ROM_START( eforest )
ROM_LOAD("1vlsh230.u46", 0x08000, 0x2000, CRC(75ad8e3f) SHA1(87812850f08f8ad3057d0e5a2a20ad8acba01a26))
ROM_LOAD("1vlsh230.u47", 0x0a000, 0x2000, CRC(af9f9869) SHA1(1dac81470889a5fc5b58f3ad0c8dfa1369a800e8))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( eforesta )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("4vxfc818.u87", 0x06000, 0x2000, CRC(03c2890f) SHA1(10d479b7ccece813676ad815a96169bbf259c49d)) // game code
ROM_LOAD("4vxfc818.u86", 0x08000, 0x8000, CRC(36125194) SHA1(dc681dc60b25893ca3ee101f6813c22b914771f5))
@@ -1891,17 +1891,17 @@ ROM_START( eforesta )
ROM_LOAD("1vlsh230.u46", 0x08000, 0x2000, CRC(75ad8e3f) SHA1(87812850f08f8ad3057d0e5a2a20ad8acba01a26))
ROM_LOAD("1vlsh230.u47", 0x0a000, 0x2000, CRC(af9f9869) SHA1(1dac81470889a5fc5b58f3ad0c8dfa1369a800e8))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( eforestb )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("3vxfc5343.u87", 0x06000, 0x2000, CRC(49b9c5ef) SHA1(bd1761f41ddb3f19b6b923de77743a2b5ec078e1)) // game code
ROM_LOAD("3vxfc5343.u86", 0x08000, 0x8000, CRC(a3eb0c09) SHA1(5a0947f2f36a87dffe4041fbaebaabb1c694bafe))
@@ -1914,17 +1914,17 @@ ROM_START( eforestb )
ROM_LOAD("1vlsh230_a.u46", 0x08000, 0x2000, CRC(a3ca69b0) SHA1(c4bdd8afbb4d076f07d4a14a7e7ac8907a0cb7ec))
ROM_LOAD("1vlsh230.u47", 0x0a000, 0x2000, CRC(af9f9869) SHA1(1dac81470889a5fc5b58f3ad0c8dfa1369a800e8))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( goldenc )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("1vxfc5462.u87", 0x06000, 0x2000, CRC(11b569f7) SHA1(270e1be6bf2a75400af174ceb65436bb6a381a62)) // game code
ROM_LOAD("1vxfc5462.u86", 0x08000, 0x8000, CRC(9714b080) SHA1(41c7d840f600ddff31794ebe949f89c89bd4f2ad))
@@ -1937,17 +1937,17 @@ ROM_START( goldenc )
ROM_LOAD("1vlsh231.u46", 0x08000, 0x2000, CRC(a3ca369e) SHA1(e3076c9f3017991b93214bebf7f5227d995eeda1))
ROM_LOAD("1vlsh231.u47", 0x0a000, 0x2000, CRC(844fa43b) SHA1(b8ef6cc2aca955f41b15cd8e3c281eee4b611e80))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( swtht2nz )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("1vxfc5461.u87", 0x06000, 0x2000, CRC(ae10c63f) SHA1(80e5aca4dec7d2503bf7be81ed8b761ebbe4c174)) // game code
ROM_LOAD("1vxfc5461.u86", 0x08000, 0x8000, CRC(053e71f0) SHA1(4a45bd11b53347be90402cea7bd94a648d6b8129))
@@ -1960,17 +1960,17 @@ ROM_START( swtht2nz )
ROM_LOAD("1vlsh237.u46", 0x08000, 0x2000, CRC(4d03c73f) SHA1(7ae629a90feb87019cc01ecef804c5ba28861f00))
ROM_LOAD("1vlsh237.u47", 0x0a000, 0x2000, CRC(c51e37bb) SHA1(8f3d9b61926fe21089559736b3458fe3b84618f2))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( kgbird )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("4vxfc5341_10c.u87", 0x06000, 0x2000, CRC(5e7c1762) SHA1(2e80be06c7737aca304d46f3c3f1efd24c570cfd)) // game code
ROM_LOAD("4vxfc5341.u86", 0x08000, 0x8000, CRC(3450c544) SHA1(f8883ce3b4bd9073ec6bc985f4666b46f17de092))
@@ -1983,17 +1983,17 @@ ROM_START( kgbird )
ROM_LOAD("1vlsh159.u46", 0x08000, 0x2000, CRC(e155c8d4) SHA1(9c50152dd420d545a88eaea98c2dd2ef49cf056a))
ROM_LOAD("1vlsh159.u47", 0x0a000, 0x2000, CRC(f91b66ba) SHA1(4f5d0f0562c6a6029ad6d76507091a159983d6f4))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm29.u71", 0x0000, 0x0200, CRC(ef25f5cc) SHA1(51d12f4b8b8712cbd18ec97ec04e1340cd85fc67))
ROM_END
ROM_START( kgbirda )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("4vxfc5341.u87", 0x06000, 0x2000, CRC(21c05874) SHA1(9ddcd34817bc6f88cb2a94374e492d29dd56fb9a)) // game code
ROM_LOAD("4vxfc5341.u86", 0x08000, 0x8000, CRC(3450c544) SHA1(f8883ce3b4bd9073ec6bc985f4666b46f17de092))
@@ -2006,17 +2006,17 @@ ROM_START( kgbirda )
ROM_LOAD("1vlsh159.u46", 0x08000, 0x2000, CRC(e155c8d4) SHA1(9c50152dd420d545a88eaea98c2dd2ef49cf056a))
ROM_LOAD("1vlsh159.u47", 0x0a000, 0x2000, CRC(f91b66ba) SHA1(4f5d0f0562c6a6029ad6d76507091a159983d6f4))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm29.u71", 0x0000, 0x0200, CRC(ef25f5cc) SHA1(51d12f4b8b8712cbd18ec97ec04e1340cd85fc67))
ROM_END
ROM_START( phantomp )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("4vxfc5431.u87", 0x06000, 0x2000, CRC(84e8eeb5) SHA1(95dcbae79b42463480fb3dd2594570070ba1a3ef)) // game code
ROM_LOAD("4vxfc5431.u86", 0x08000, 0x8000, CRC(a6aa3d6f) SHA1(64d97c52355d5d0faebe1ee704f6ad46cc90f0f1))
@@ -2029,17 +2029,17 @@ ROM_START( phantomp )
ROM_LOAD("1vlsh266.u46", 0x08000, 0x2000, CRC(6ead5ffc) SHA1(1611d5e2dd5ea06525b6079577a45e713a8065d5))
ROM_LOAD("1vlsh266.u47", 0x0a000, 0x2000, CRC(c1fb4f23) SHA1(6c9a4e52bd0312c9b49f91a1f563fecd87e5bb82))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( topgear )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("4vxfc969.u87", 0x06000, 0x2000, CRC(5628f477) SHA1(8517905b4d4174fea79e2e3ed38c80fcc6506c6a)) // game code
ROM_LOAD("4vxfc969.u86", 0x08000, 0x8000, CRC(d5afa54e) SHA1(4268c0ddb9beab68348ba520d47bea64b875d8a7))
@@ -2052,17 +2052,17 @@ ROM_START( topgear )
ROM_LOAD("1vlsh154.u46", 0x08000, 0x2000, CRC(186f3e3b) SHA1(57f82a79a3d24090f33f5525207d6697e954cdf5))
ROM_LOAD("1vlsh154.u47", 0x0a000, 0x2000, CRC(dc7d2dab) SHA1(16d223f28b377fafb478d6124fc0eb6d7dd7d591))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm29.u71", 0x0000, 0x0200, CRC(ef25f5cc) SHA1(51d12f4b8b8712cbd18ec97ec04e1340cd85fc67)) // Using 1CM29 PROM until topgear's 2CM33 PROM is dumped
ROM_END
ROM_START( wtigernz )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("3vxfc5342.u87", 0x06000, 0x2000, CRC(9492b242) SHA1(26bb14cba8e8c3cdbcb4b4903da9592b0a1f8cb3)) // game code
ROM_LOAD("3vxfc5342.u86", 0x08000, 0x8000, CRC(f639ef56) SHA1(5d49deee95df29cd4f5c69fea01bb752aaf2ce99))
@@ -2075,17 +2075,17 @@ ROM_START( wtigernz )
ROM_LOAD("1vlsh157.u46", 0x08000, 0x2000, BAD_DUMP CRC(7dfd06ec) SHA1(51fbc3d24e270edb8de432a99ca28695e42e72a6))
ROM_LOAD("1vlsh157.u47", 0x0a000, 0x2000, BAD_DUMP CRC(177a45ea) SHA1(6b044f88c79de571a007fb71ff2f99587babe474))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( ffortune )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("1vxfc5460.u87", 0x06000, 0x2000, CRC(45047c35) SHA1(4af572a23bca33a360c4711f24fb113167f90447)) // game code
ROM_LOAD("1vxfc5460.u86", 0x08000, 0x8000, CRC(9a8b0eae) SHA1(ffd0419566c2352e3d750040405a760bd75c87d5))
@@ -2098,17 +2098,17 @@ ROM_START( ffortune )
ROM_LOAD("1vlsh228.u46", 0x08000, 0x2000, CRC(b0a04c83) SHA1(57247867db6417c525c4c3cdcc409523037e00fd))
ROM_LOAD("1vlsh228.u47", 0x0a000, 0x2000, CRC(cd24ee39) SHA1(12798e14f7f6308e130da824ffc7c577a36cef04))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm48.u71", 0x0000, 0x0200, CRC(81daeeb0) SHA1(7dfe198c6def5c4ae4ecac488d65c2911fb3a890))
ROM_END
ROM_START( autmoon )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("1vxfc5488.u87", 0x06000, 0x2000, CRC(30ca1eed) SHA1(540635a8b94c14aefa1d8404226d9e1046776111)) // game code
ROM_LOAD("1vxfc5488.u86", 0x08000, 0x8000, CRC(8153a60b) SHA1(54b8a0467645161d827bf8cb9fbceb0d00f9639f))
@@ -2121,17 +2121,17 @@ ROM_START( autmoon )
ROM_LOAD("1vxfc5488.u46", 0x08000, 0x2000, CRC(fa126a77) SHA1(31d6096c58653a45176b6373835f83c8f2c46f80))
ROM_LOAD("1vxfc5488.u47", 0x0a000, 0x2000, CRC(50307da0) SHA1(6418a51cf915b37fa11f47d000e4229dacf95951))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm34.u71", 0x0000, 0x0200, CRC(75814247) SHA1(9d123dadba3b5a1fd1c7f0100b255c4dd4f7e04f))
ROM_END
ROM_START( gtroppo )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("3vas003.u7", 0x06000, 0x2000, CRC(fe7d0ea4) SHA1(3f3f4809534065c33eca2cfff0d1d2a3e3992406)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("1vxec542.lu9", 0x08000, 0x8000, CRC(09654256) SHA1(234cb74cac92a715f8913b740e69afa57b9b39e8)) // game code
/* SHAPE EPROMs */
@@ -2143,17 +2143,17 @@ ROM_START( gtroppo )
ROM_LOAD("1vxec542.u11", 0x08000, 0x2000, CRC(87ed6fab) SHA1(72428b66d6186dea3bd1f9cfe215341e6b29b3c2))
ROM_LOAD("1vxec542.u13", 0x0a000, 0x2000, CRC(673a129d) SHA1(cb1ae12e43993bfe399595a8778888eb5a264ec1))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("gtroppo.u40", 0x0000, 0x0200, CRC(918cb0ab) SHA1(2ec37abae2ecae2f0f525daf6fafd03789fca20b))
ROM_END
ROM_START( clkwise )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("3vas003.u7", 0x06000, 0x2000, CRC(fe7d0ea4) SHA1(3f3f4809534065c33eca2cfff0d1d2a3e3992406)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("1vxec534.lu9", 0x08000, 0x8000, NO_DUMP) // game code, non-existent
/* SHAPE EPROMs */
@@ -2165,17 +2165,17 @@ ROM_START( clkwise )
ROM_LOAD("1vlsh101.u11", 0x08000, 0x2000, CRC(362867bb) SHA1(aba3a74b3bf2a96d8bda4deacada56c5d531bcb4))
ROM_LOAD("1vlsh101.u13", 0x0a000, 0x2000, CRC(649fbc77) SHA1(22bd81b39279dc393bd791e2e1a2999215581e2b))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("gtroppo.u40", 0x0000, 0x0200, BAD_DUMP CRC(918cb0ab) SHA1(2ec37abae2ecae2f0f525daf6fafd03789fca20b)) // Using gtroppo's PROM until clkwise's 2CM18 PROM is dumped
ROM_END
ROM_START( cgold2 )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("3xf5182h04.u87", 0x06000, 0x2000, CRC(070a02b2) SHA1(872621275e51c5dca371861a9b9f3038f0dbc8aa)) // game code
ROM_LOAD("3xf5182h04.u86", 0x08000, 0x8000, CRC(5ac1d424) SHA1(42bb8b5eb163a04054621bbcba5cf8203a661baf))
@@ -2188,17 +2188,17 @@ ROM_START( cgold2 )
ROM_LOAD("3xf5182.u46", 0x08000, 0x2000, CRC(9580c2c2) SHA1(8a010fb9e349c066e1af53ed9aa659dbf7dbf17e))
ROM_LOAD("3xf5182.u47", 0x0a000, 0x2000, CRC(f3cb845a) SHA1(288f7fe991bb60194a9ef9e8c9b2b18ebbd3b49c))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("gtroppo.u71", 0x0000, 0x0200, BAD_DUMP CRC(918cb0ab) SHA1(2ec37abae2ecae2f0f525daf6fafd03789fca20b)) // Using gtroppo's PROM for now
ROM_END
ROM_START( fhunter )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("2xf5196i01.u87", 0x06000, 0x2000, CRC(f9e6b760) SHA1(af7f16727e84ba8f07400f7f02302862e02d1af4)) // game code
ROM_LOAD("2xf5196i01.u86", 0x08000, 0x8000, CRC(6971ccee) SHA1(1292cfa8125cbaec3bcd9d136cb385a3574bfa4a))
@@ -2211,17 +2211,17 @@ ROM_START( fhunter )
ROM_LOAD("2xf5196.u46", 0x08000, 0x2000, CRC(7704c13f) SHA1(4cfca6ee9e2e543714e8bf0c6de4d9e9406ce250))
ROM_LOAD("2xf5196.u47", 0x0a000, 0x2000, CRC(a9e6da98) SHA1(3b7d8920d3ef4ae17a55d2e1968318eb3c70264d))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm48.u71", 0x0000, 0x0200, CRC(81daeeb0) SHA1(7dfe198c6def5c4ae4ecac488d65c2911fb3a890))
ROM_END
ROM_START( fhuntera )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("2xf5196i02.u87", 0x06000, 0x2000, CRC(4b532a14) SHA1(98d1753ad1d0d041f81a535947ed501d0eb1d85c)) // game code
ROM_LOAD("2xf5196i01.u86", 0x08000, 0x8000, CRC(6971ccee) SHA1(1292cfa8125cbaec3bcd9d136cb385a3574bfa4a))
@@ -2234,17 +2234,17 @@ ROM_START( fhuntera )
ROM_LOAD("2xf5196.u46", 0x08000, 0x2000, CRC(7704c13f) SHA1(4cfca6ee9e2e543714e8bf0c6de4d9e9406ce250))
ROM_LOAD("2xf5196.u47", 0x0a000, 0x2000, CRC(a9e6da98) SHA1(3b7d8920d3ef4ae17a55d2e1968318eb3c70264d))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm48.u71", 0x0000, 0x0200, CRC(81daeeb0) SHA1(7dfe198c6def5c4ae4ecac488d65c2911fb3a890))
ROM_END
ROM_START( arcwins )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("2vas004.u59", 0x02000, 0x2000, CRC(84226547) SHA1(df9c2c01a7ac4d930c06a8c4863853ddb1a2adbe)) // sound and video rom
- /* GAME EPROMs */
+ /* GAME EPROMs */
ROM_LOAD("4xf5227h03.u87", 0x06000, 0x2000, CRC(eec47dcf) SHA1(9d9d56310fc2c69c56aee961d1881328e3aa32d2)) // game code
ROM_LOAD("4xf5227h03.u86", 0x08000, 0x8000, CRC(4e2b955a) SHA1(66202e1c7fe52f706c809d6aa8aa649b54dca4d2))
@@ -2257,7 +2257,7 @@ ROM_START( arcwins )
ROM_LOAD("4xf5227.u46", 0x08000, 0x2000, CRC(c4b2ec7c) SHA1(db0bef392e83a1fb9b1d2255b36a3ec12e73ee1c))
ROM_LOAD("4xf5227.u47", 0x0a000, 0x2000, CRC(6608d05a) SHA1(7a4014d4dbc8ec6b3dcf14df5a5149696c7ce45e))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("1cm29.u71", 0x0000, 0x0200, CRC(ef25f5cc) SHA1(51d12f4b8b8712cbd18ec97ec04e1340cd85fc67))
ROM_END
@@ -2266,10 +2266,10 @@ ROM_END
ROM_START( wildone )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("3vas003.u59", 0x06000, 0x2000, CRC(fe7d0ea4) SHA1(3f3f4809534065c33eca2cfff0d1d2a3e3992406)) // sound and video rom
- /* GAME EPROMS */
+ /* GAME EPROMS */
ROM_LOAD("4vxec5357.u86", 0x08000, 0x8000, CRC(ad0311b6) SHA1(182efb32556c36f2b6a0fddecc991bc3b0e21dc5)) // game code
/* SHAPE EPROMS */
@@ -2281,17 +2281,17 @@ ROM_START( wildone )
ROM_LOAD("8vlsh007.u46", 0x08000, 0x2000, CRC(a3bc50dc) SHA1(8cfa4a3415e060be89eb4727eaddb3d64d5f87cb))
ROM_LOAD("8vlsh007.u47", 0x0a000, 0x2000, CRC(2ba003ea) SHA1(9e4dff2f5d3645ab918b3cc766ca6f5689fc517e))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm07.u71", 0x0000, 0x0200, CRC(1e3f402a) SHA1(f38da1ad6607df38add10c69febf7f5f8cd21744))
ROM_END
ROM_START( gldnpkr )
ROM_REGION(0x10000, "maincpu", 0 )
- /* VIDEO AND SOUND EPROM */
+ /* VIDEO AND SOUND EPROM */
ROM_LOAD("vidsnd.u7", 0x06000, 0x2000, CRC(568bd63f) SHA1(128b0b085c8b97d1c90baeab4886c522c0bc9a0e)) // sound and video rom
- /* GAME EPROMS */
+ /* GAME EPROMS */
ROM_LOAD("8vxec037.lu9", 0x08000, 0x8000, CRC(a75276b1) SHA1(13950bd26c5f0a26f0dee5938eeee0c16a3119df)) // game code
/* SHAPE EPROMS */
@@ -2303,7 +2303,7 @@ ROM_START( gldnpkr )
ROM_LOAD("8vxec037.u11", 0x08000, 0x2000, CRC(e056af8c) SHA1(1ff67c5aed19219a65c1562a971e9968a7e78fad))
ROM_LOAD("8vxec037.u13", 0x0a000, 0x2000, CRC(d97876cd) SHA1(23f8b1632c19f2f0a6918a6e4aa987c0feda5cd4))
- /* COLOR PROM */
+ /* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )
ROM_LOAD("2cm07.u40", 0x0000, 0x0200, CRC(1e3f402a) SHA1(f38da1ad6607df38add10c69febf7f5f8cd21744)) // Using 2CM07 until a correct PROM is confirmed
ROM_END
@@ -2326,28 +2326,28 @@ ROM_START( 86lions )
// ROM_LOAD( "prom.x", 0x00, 0x20, NO_DUMP )
ROM_END
-GAMEL( 1985, 86lions, 0, 86lions, aristmk4, aristmk4_state, aristmk4, ROT0, "Aristocrat", "86 Lions", GAME_NOT_WORKING, layout_topgear )
-GAMEL( 1996, eforest, 0, aristmk4, eforest, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Enchanted Forest (12XF528902, US)", 0, layout_eforest ) // multiple denominations
-GAMEL( 1995, eforesta, eforest, aristmk4, aristmk4, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Enchanted Forest (4VXFC818, NSW)", 0, layout_aristmk4 ) // 10c, $1 = 10 credits
-GAMEL( 1996, eforestb, eforest, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Enchanted Forest (3VXFC5343, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
-GAMEL( 1996, 3bagflvt, 0, aristmk4, 3bagflvt, aristmk4_state, aristmk4, ROT0, "Aristocrat", "3 Bags Full (5VXFC790, Victoria)", 0, layout_3bagflvt ) // 5c, $1 = 20 credits
-GAMEL( 1996, 3bagflnz, 3bagflvt, aristmk4, 3bagflnz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "3 Bags Full (3VXFC5345, New Zealand)", 0, layout_3bagflnz ) // 5c, $2 = 40 credits
-GAMEL( 1996, blkrhino, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Black Rhino (3VXFC5344, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
-GAMEL( 1996, kgbird, 0, aristmk4, kgbird, aristmk4_state, aristmk4, ROT0, "Aristocrat", "K.G. Bird (4VXFC5341, New Zealand, 87.98%)",0, layout_kgbird ) // 5c, $2 = 40 credits
-GAMEL( 1996, kgbirda, kgbird, aristmk4, kgbird, aristmk4_state, aristmk4, ROT0, "Aristocrat", "K.G. Bird (4VXFC5341, New Zealand, 91.97%)",0, layout_kgbird ) // 10c, $2 = 20 credits
-GAMEL( 1998, swtht2nz, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Sweet Hearts II (1VXFC5461, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
-GAMEL( 1996, goldenc, 0, aristmk4, goldenc, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Golden Canaries (1VXFC5462, New Zealand)", 0, layout_goldenc ) // 2c, $2 = 100 credits
-GAMEL( 1996, topgear, 0, aristmk4, topgear, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Top Gear (4VXFC969, New Zealand)", 0, layout_topgear ) // 10c, 1 coin = 1 credit
-GAMEL( 1996, wtigernz, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "White Tiger (3VXFC5342, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
-GAMEL( 1998, phantomp, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Phantom Pays (4VXFC5431, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
-GAMEL( 2000, coralr2, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Coral Riches II (1VXFC5472, New Zealand)", 0, layout_arimk4nz ) // 2c, $2 = 100 credits
-GAMEL( 1998, ffortune, 0, aristmk4, goldenc, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Fantasy Fortune (1VXFC5460, New Zealand)", 0, layout_goldenc ) // 5c, $2 = 40 credits
-GAMEL( 1999, autmoon, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Autumn Moon (1VXFC5488, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
-GAMEL( 1986, gtroppo, 0, aristmk4, topgear, aristmk4_state, aristmk4, ROT0, "Ainsworth Nominees P.L.", "Gone Troppo (1VXEC542, NSW)", 0, layout_topgear ) // possibly 20c, 1 coin = 1 credit
-GAMEL( 1986, clkwise, 0, aristmk4, topgear, aristmk4_state, aristmk4, ROT0, "Ainsworth Nominees P.L.", "Clockwise (1VXEC534, New Zealand)", GAME_NOT_WORKING, layout_topgear ) // 20c, 1 coin = 1 credit
-GAMEL( 1995, cgold2, 0, aristmk4, cgold2, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Caribbean Gold II (3XF5182H04, US)", GAME_NOT_WORKING, layout_cgold2 ) // multiple denominations
-GAMEL( 1996, fhunter, 0, aristmk4, fhunter, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Fortune Hunter (2XF5196I01, US)", GAME_NOT_WORKING, layout_fhunter ) // multiple denominations
-GAMEL( 1996, fhuntera, fhunter, aristmk4, fhunter, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Fortune Hunter (2XF5196I02, US)", GAME_NOT_WORKING, layout_fhunter ) // multiple denominations
-GAMEL( 1996, arcwins, 0, aristmk4, arcwins, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Arctic Wins (4XF5227H03, US)", 0, layout_arcwins ) // multiple denominations
-GAMEL( 1997, wildone, 0, aristmk4_poker, wildone, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Wild One (4VXEC5357, New Zealand)", 0, layout_wildone ) // 20c, $2 = 10 credits, video poker
-GAMEL( 1986, gldnpkr, 0, aristmk4_poker, gldnpkr, aristmk4_state, aristmk4, ROT0, "Ainsworth Nominees P.L.", "Golden Poker (8VXEC037, NSW)", 0, layout_gldnpkr ) // possibly 20c, 1 coin = 1 credit, video poker
+GAMEL( 1985, 86lions, 0, 86lions, aristmk4, aristmk4_state, aristmk4, ROT0, "Aristocrat", "86 Lions", GAME_NOT_WORKING, layout_topgear )
+GAMEL( 1996, eforest, 0, aristmk4, eforest, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Enchanted Forest (12XF528902, US)", 0, layout_eforest ) // multiple denominations
+GAMEL( 1995, eforesta, eforest, aristmk4, aristmk4, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Enchanted Forest (4VXFC818, NSW)", 0, layout_aristmk4 ) // 10c, $1 = 10 credits
+GAMEL( 1996, eforestb, eforest, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Enchanted Forest (3VXFC5343, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
+GAMEL( 1996, 3bagflvt, 0, aristmk4, 3bagflvt, aristmk4_state, aristmk4, ROT0, "Aristocrat", "3 Bags Full (5VXFC790, Victoria)", 0, layout_3bagflvt ) // 5c, $1 = 20 credits
+GAMEL( 1996, 3bagflnz, 3bagflvt, aristmk4, 3bagflnz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "3 Bags Full (3VXFC5345, New Zealand)", 0, layout_3bagflnz ) // 5c, $2 = 40 credits
+GAMEL( 1996, blkrhino, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Black Rhino (3VXFC5344, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
+GAMEL( 1996, kgbird, 0, aristmk4, kgbird, aristmk4_state, aristmk4, ROT0, "Aristocrat", "K.G. Bird (4VXFC5341, New Zealand, 87.98%)",0, layout_kgbird ) // 5c, $2 = 40 credits
+GAMEL( 1996, kgbirda, kgbird, aristmk4, kgbird, aristmk4_state, aristmk4, ROT0, "Aristocrat", "K.G. Bird (4VXFC5341, New Zealand, 91.97%)",0, layout_kgbird ) // 10c, $2 = 20 credits
+GAMEL( 1998, swtht2nz, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Sweet Hearts II (1VXFC5461, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
+GAMEL( 1996, goldenc, 0, aristmk4, goldenc, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Golden Canaries (1VXFC5462, New Zealand)", 0, layout_goldenc ) // 2c, $2 = 100 credits
+GAMEL( 1996, topgear, 0, aristmk4, topgear, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Top Gear (4VXFC969, New Zealand)", 0, layout_topgear ) // 10c, 1 coin = 1 credit
+GAMEL( 1996, wtigernz, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "White Tiger (3VXFC5342, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
+GAMEL( 1998, phantomp, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Phantom Pays (4VXFC5431, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
+GAMEL( 2000, coralr2, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Coral Riches II (1VXFC5472, New Zealand)", 0, layout_arimk4nz ) // 2c, $2 = 100 credits
+GAMEL( 1998, ffortune, 0, aristmk4, goldenc, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Fantasy Fortune (1VXFC5460, New Zealand)", 0, layout_goldenc ) // 5c, $2 = 40 credits
+GAMEL( 1999, autmoon, 0, aristmk4, arimk4nz, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Autumn Moon (1VXFC5488, New Zealand)", 0, layout_arimk4nz ) // 5c, $2 = 40 credits
+GAMEL( 1986, gtroppo, 0, aristmk4, topgear, aristmk4_state, aristmk4, ROT0, "Ainsworth Nominees P.L.", "Gone Troppo (1VXEC542, NSW)", 0, layout_topgear ) // possibly 20c, 1 coin = 1 credit
+GAMEL( 1986, clkwise, 0, aristmk4, topgear, aristmk4_state, aristmk4, ROT0, "Ainsworth Nominees P.L.", "Clockwise (1VXEC534, New Zealand)", GAME_NOT_WORKING, layout_topgear ) // 20c, 1 coin = 1 credit
+GAMEL( 1995, cgold2, 0, aristmk4, cgold2, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Caribbean Gold II (3XF5182H04, US)", GAME_NOT_WORKING, layout_cgold2 ) // multiple denominations
+GAMEL( 1996, fhunter, 0, aristmk4, fhunter, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Fortune Hunter (2XF5196I01, US)", GAME_NOT_WORKING, layout_fhunter ) // multiple denominations
+GAMEL( 1996, fhuntera, fhunter, aristmk4, fhunter, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Fortune Hunter (2XF5196I02, US)", GAME_NOT_WORKING, layout_fhunter ) // multiple denominations
+GAMEL( 1996, arcwins, 0, aristmk4, arcwins, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Arctic Wins (4XF5227H03, US)", 0, layout_arcwins ) // multiple denominations
+GAMEL( 1997, wildone, 0, aristmk4_poker, wildone, aristmk4_state, aristmk4, ROT0, "Aristocrat", "Wild One (4VXEC5357, New Zealand)", 0, layout_wildone ) // 20c, $2 = 10 credits, video poker
+GAMEL( 1986, gldnpkr, 0, aristmk4_poker, gldnpkr, aristmk4_state, aristmk4, ROT0, "Ainsworth Nominees P.L.", "Golden Poker (8VXEC037, NSW)", 0, layout_gldnpkr ) // possibly 20c, 1 coin = 1 credit, video poker
diff --git a/src/mame/drivers/aristmk5.c b/src/mame/drivers/aristmk5.c
index 04a9f7b60a0..c1be9badaaf 100644
--- a/src/mame/drivers/aristmk5.c
+++ b/src/mame/drivers/aristmk5.c
@@ -90,67 +90,67 @@ public:
TIMER_CALLBACK_MEMBER(aristmk5_state::mk5_VSYNC_callback)
{
- m_ioc_regs[IRQ_STATUS_A] |= 0x08; //turn vsync bit on
+ m_ioc_regs[IRQ_STATUS_A] |= 0x08; //turn vsync bit on
m_mk5_VSYNC_timer->adjust(attotime::never);
}
WRITE32_MEMBER(aristmk5_state::Ns5w48)
{
- /*
- There is one writeable register which is written with the Ns5w48 strobe. It contains four bits which are
- taken from bits 16 to 19 of the word being written. The register is cleared whenever the chip is reset. The
- register controls part of the video system. Bit 3(from data bus bit 19) controls the eorv output. If the bit is
- one, eorv outputs the NV/CSYNC signal from VIDC. If the bit is zero, eorv outputs inverted NV/CSYNC. Bit 2 of
- the register controls the eorh output. If the bit is zero, eorh is the NHSYNC output of VIDC. If the bit is one,
- eorh is inverted NHSYNC. Bits 1 and 0 control what is fed to the vidclk output as follows:
-
- Bit1 Bit0 vidclk
- 0 0 24 Mhz clock
- 0 1 25 Mhz clock ;// external video crystal
- 1 0 36 Mhz clock
- 1 1 24 Mhz clock
-
-
- */
-
- /*
- Golden Pyramids disassembly
-
- MOV R0, #0x3200000
- ROM:03400948 MOV R1, #8
- ROM:0340094C STRB R1, [R0,#0x14] ; clear vsync
- ROM:03400950 LDR R2, =0xC350 ; 50000
- ROM:03400954
- ROM:03400954 loc_3400954 ; CODE XREF: sub_3400944+18?j
- ROM:03400954 NOP
- ROM:03400958 SUBS R2, R2, #1
- ROM:0340095C BNE loc_3400954 ; does this 50000 times, presumably to wait for vsync
- ROM:03400960 MOV R0, #0x3200000
- ROM:03400964 LDRB R1, [R0,#0x10] ; reads the irq status a
- ROM:03400968 TST R1, #8 ; test vsync
- */
+ /*
+ There is one writeable register which is written with the Ns5w48 strobe. It contains four bits which are
+ taken from bits 16 to 19 of the word being written. The register is cleared whenever the chip is reset. The
+ register controls part of the video system. Bit 3(from data bus bit 19) controls the eorv output. If the bit is
+ one, eorv outputs the NV/CSYNC signal from VIDC. If the bit is zero, eorv outputs inverted NV/CSYNC. Bit 2 of
+ the register controls the eorh output. If the bit is zero, eorh is the NHSYNC output of VIDC. If the bit is one,
+ eorh is inverted NHSYNC. Bits 1 and 0 control what is fed to the vidclk output as follows:
+
+ Bit1 Bit0 vidclk
+ 0 0 24 Mhz clock
+ 0 1 25 Mhz clock ;// external video crystal
+ 1 0 36 Mhz clock
+ 1 1 24 Mhz clock
+
+
+ */
+
+ /*
+ Golden Pyramids disassembly
+
+ MOV R0, #0x3200000
+ ROM:03400948 MOV R1, #8
+ ROM:0340094C STRB R1, [R0,#0x14] ; clear vsync
+ ROM:03400950 LDR R2, =0xC350 ; 50000
+ ROM:03400954
+ ROM:03400954 loc_3400954 ; CODE XREF: sub_3400944+18?j
+ ROM:03400954 NOP
+ ROM:03400958 SUBS R2, R2, #1
+ ROM:0340095C BNE loc_3400954 ; does this 50000 times, presumably to wait for vsync
+ ROM:03400960 MOV R0, #0x3200000
+ ROM:03400964 LDRB R1, [R0,#0x10] ; reads the irq status a
+ ROM:03400968 TST R1, #8 ; test vsync
+ */
m_ioc_regs[IRQ_STATUS_A] &= ~0x08;
/* bit 1 bit 0 */
if((data &~(0x02)) && (data & (0x01))) // external video crystal is enabled. 25 mhz
- {
- m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure but see above
- }
- if((data &~(0x02)) && (data &~(0x01))) // video clock is enabled. 24 mhz
- {
- m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure
- }
- if((data & (0x02)) && (data &~(0x01))) // video clock is enabled. 36 mhz
- {
- m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure
- }
- if((data &(0x02)) && (data &(0x01))) // video clock is enabled. 24 mhz
- {
- m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure
- }
+ {
+ m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure but see above
+ }
+ if((data &~(0x02)) && (data &~(0x01))) // video clock is enabled. 24 mhz
+ {
+ m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure
+ }
+ if((data & (0x02)) && (data &~(0x01))) // video clock is enabled. 36 mhz
+ {
+ m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure
+ }
+ if((data &(0x02)) && (data &(0x01))) // video clock is enabled. 24 mhz
+ {
+ m_mk5_VSYNC_timer->adjust(attotime::from_hz(50000)); // not sure
+ }
}
TIMER_CALLBACK_MEMBER(aristmk5_state::mk5_2KHz_callback)
@@ -162,29 +162,29 @@ TIMER_CALLBACK_MEMBER(aristmk5_state::mk5_2KHz_callback)
READ32_MEMBER(aristmk5_state::Ns5x58)
{
- /*
- 1953.125 Hz for the operating system timer interrupt
+ /*
+ 1953.125 Hz for the operating system timer interrupt
- The pintr pin ( printer interrupt ) is connected to an interrupt latch in IOEB.
- A rising edge on pintr causes an interrupt to be latched in IOEB. The latch output
- is connected to the NIL[6] interrupt input on IOC and goes low when the rising edge is detected.
- The interrupt is cleared (NIL[6] is set high) by resetting the chip or by the NS5x58
- strobe.
+ The pintr pin ( printer interrupt ) is connected to an interrupt latch in IOEB.
+ A rising edge on pintr causes an interrupt to be latched in IOEB. The latch output
+ is connected to the NIL[6] interrupt input on IOC and goes low when the rising edge is detected.
+ The interrupt is cleared (NIL[6] is set high) by resetting the chip or by the NS5x58
+ strobe.
- NIL[6] IOEB/1pintr - Interrupt Input ( OS Tick Interrput )
+ NIL[6] IOEB/1pintr - Interrupt Input ( OS Tick Interrput )
- Rising edge signal
- 010101010101 .-------. logic 0 .-------------.
- ------------->|pint |---1pintr------>|NIL[6] |
- | IOEB | | IOC |
- `-------' `-------------'
- */
+ Rising edge signal
+ 010101010101 .-------. logic 0 .-------------.
+ ------------->|pint |---1pintr------>|NIL[6] |
+ | IOEB | | IOC |
+ `-------' `-------------'
+ */
// reset 2KHz timer
- m_mk5_2KHz_timer->adjust(attotime::from_hz(1953.125));
- m_ioc_regs[IRQ_STATUS_A] &= ~0x01;
- machine().device("maincpu")->execute().set_input_line(ARM_IRQ_LINE, CLEAR_LINE);
+ m_mk5_2KHz_timer->adjust(attotime::from_hz(1953.125));
+ m_ioc_regs[IRQ_STATUS_A] &= ~0x01;
+ machine().device("maincpu")->execute().set_input_line(ARM_IRQ_LINE, CLEAR_LINE);
return 0xffffffff;
}
@@ -239,61 +239,61 @@ READ32_MEMBER(aristmk5_state::Ns5r50)
WRITE32_MEMBER(aristmk5_state::sram_banksel_w)
{
- /*
-
- The Main Board provides 32 kbytes of Static Random Access Memory (SRAM) with
- battery back-up for the electronic meters.
- The SRAM contains machine metering information, recording money in/out and
- game history etc. It is critical that this data is preserved reliably, and various
- jurisdictions require multiple backups of the data.
- Three standard low power SRAMs are fitted to the board. The data is usually
- replicated three times, so that each chip contains identical data. Each memory is
- checked against the other to verify that the stored data is correct.
- Each chip is mapped to the same address, and the chip selected depends on the bank
- select register. Access is mutually exclusive, increasing security with only one chip
- visible in the CPU address &space at a time. If the CPU crashes and overwrites
- memory only one of the three devices can be corrupted. On reset the bank select
- register selects bank 0, which does not exist. The SRAMs are at banks 1,2,3.
- Each of the SRAM chips may be powered from a separate battery, further reducing
- the possibility of losing data. For the US Gaming Machine, a single battery provides
- power for all three SRAMs. This battery also powers the Real Time Clock
-
-
- CHIP SELECT & SRAM BANKING
-
- write: 03010420 40 select bank 1
- write: 3220000 01 store 0x01 @ 3220000
- write: 03010420 80 select bank 2
- write: 3220000 02 store 0x02 @ 3220000
- write: 03010420 C0 ...
- write: 3220000 03 ...
- write: 03010420 00 ...
- write: 3220000 00 ...
- write: 03010420 40 select the first SRAM chip
- read: 3220000 01 read the value 0x1 back hopefully
- write: 03010420 80 ...
- read: 3220000 02 ...
- write: 03010420 C0 ...
- read: 3220000 03 ...
- write: 03010420 00 select bank 0
-
-
- Bit 0 - Page 1
- Bit 1 - Page 2
- Bit 2 - Page 3
- NC
- NC
- NC
- Bit 6 - SRAM 1
- Bit 7 - SRAM 2
-
- Bit 1 and 2 on select Page 4.
- Bit 6 and 7 on select SRAM 3.
-
- 4 pages of 32k for each sram chip.
- */
- membank("sram_bank")->set_entry((data & 0xc0) >> 6);
- membank("sram_bank_nz")->set_entry((data & 0xc0) >> 6);
+ /*
+
+ The Main Board provides 32 kbytes of Static Random Access Memory (SRAM) with
+ battery back-up for the electronic meters.
+ The SRAM contains machine metering information, recording money in/out and
+ game history etc. It is critical that this data is preserved reliably, and various
+ jurisdictions require multiple backups of the data.
+ Three standard low power SRAMs are fitted to the board. The data is usually
+ replicated three times, so that each chip contains identical data. Each memory is
+ checked against the other to verify that the stored data is correct.
+ Each chip is mapped to the same address, and the chip selected depends on the bank
+ select register. Access is mutually exclusive, increasing security with only one chip
+ visible in the CPU address &space at a time. If the CPU crashes and overwrites
+ memory only one of the three devices can be corrupted. On reset the bank select
+ register selects bank 0, which does not exist. The SRAMs are at banks 1,2,3.
+ Each of the SRAM chips may be powered from a separate battery, further reducing
+ the possibility of losing data. For the US Gaming Machine, a single battery provides
+ power for all three SRAMs. This battery also powers the Real Time Clock
+
+
+ CHIP SELECT & SRAM BANKING
+
+ write: 03010420 40 select bank 1
+ write: 3220000 01 store 0x01 @ 3220000
+ write: 03010420 80 select bank 2
+ write: 3220000 02 store 0x02 @ 3220000
+ write: 03010420 C0 ...
+ write: 3220000 03 ...
+ write: 03010420 00 ...
+ write: 3220000 00 ...
+ write: 03010420 40 select the first SRAM chip
+ read: 3220000 01 read the value 0x1 back hopefully
+ write: 03010420 80 ...
+ read: 3220000 02 ...
+ write: 03010420 C0 ...
+ read: 3220000 03 ...
+ write: 03010420 00 select bank 0
+
+
+ Bit 0 - Page 1
+ Bit 1 - Page 2
+ Bit 2 - Page 3
+ NC
+ NC
+ NC
+ Bit 6 - SRAM 1
+ Bit 7 - SRAM 2
+
+ Bit 1 and 2 on select Page 4.
+ Bit 6 and 7 on select SRAM 3.
+
+ 4 pages of 32k for each sram chip.
+ */
+ membank("sram_bank")->set_entry((data & 0xc0) >> 6);
+ membank("sram_bank_nz")->set_entry((data & 0xc0) >> 6);
}
/* U.S games have no dram emulator enabled */
@@ -411,8 +411,8 @@ void aristmk5_state::machine_reset()
}
#if 0
-#define NVRAM_SIZE 256
-#define NVRAM_PAGE_SIZE 0 /* max size of one write request */
+#define NVRAM_SIZE 256
+#define NVRAM_PAGE_SIZE 0 /* max size of one write request */
static const i2cmem_interface i2cmem_interface =
{
@@ -430,7 +430,7 @@ static AAKART_INTERFACE( kart_interface )
static MACHINE_CONFIG_START( aristmk5, aristmk5_state )
MCFG_CPU_ADD("maincpu", ARM, 12000000)
MCFG_CPU_PROGRAM_MAP(aristmk5_drame_map)
- MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */
// MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
MCFG_AAKART_ADD("kart", 12000000/128, kart_interface) // TODO: frequency
@@ -474,7 +474,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( aristmk5_usa, aristmk5_state )
MCFG_CPU_ADD("maincpu", ARM, 12000000)
MCFG_CPU_PROGRAM_MAP(aristmk5_map)
- MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(2)) /* 1.6 - 2 seconds */
// MCFG_I2CMEM_ADD("i2cmem",i2cmem_interface)
@@ -741,17 +741,17 @@ ROM_END
GAME( 1995, aristmk5, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "MKV Set/Clear Chips (USA)", GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
// Dates listed below are for the combination (reel layout), not release dates
-GAME( 1995, enchfrst, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Enchanted Forest (0400122V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 570/3, E - 23/06/95
-GAME( 1995, swthrt2v, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweet Hearts II (01J01986, Venezuela)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 577/1, C - 07/09/95
-GAME( 1996, dolphntr, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (0200424V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/1, B - 06/12/96
-GAME( 1996, dolphtra, dolphntr, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (0100424V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/1, B - 06/12/96
-GAME( 1997, goldprmd, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (MV4091, USA)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // MV4091, B - 13/05/97
-GAME( 1997, qotn, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Queen of the Nile (0200439V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/4, B - 13/05/97
-GAME( 1997, dmdtouch, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Diamond Touch (0400433V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 604, E - 30/06/97
-GAME( 1998, adonis, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0200751V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/9, A - 25/05/98
-GAME( 1998, reelrock, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Reelin-n-Rockin (0100779V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 628, A - 13/07/98
-GAME( 1998, indiandr, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Indian Dreaming (0100845V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 628/1, B - 15/12/98
-GAME( 1999, wtiger, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "White Tiger Classic (0200954V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 638/1, B - 08/07/99
-GAME( 2000, magicmsk, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Mask (MV4115, Export)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // MV4115, A - 09/05/2000
-GAME( 2000, margmgc, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (01J00101, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // JB005, A - 07/07/2000
-GAME( 2001, geishanz, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Geisha (0101408V, New Zealand)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // MV4127, A - 05/03/01
+GAME( 1995, enchfrst, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Enchanted Forest (0400122V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 570/3, E - 23/06/95
+GAME( 1995, swthrt2v, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Sweet Hearts II (01J01986, Venezuela)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 577/1, C - 07/09/95
+GAME( 1996, dolphntr, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (0200424V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/1, B - 06/12/96
+GAME( 1996, dolphtra, dolphntr, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Dolphin Treasure (0100424V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/1, B - 06/12/96
+GAME( 1997, goldprmd, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Golden Pyramids (MV4091, USA)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // MV4091, B - 13/05/97
+GAME( 1997, qotn, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Queen of the Nile (0200439V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/4, B - 13/05/97
+GAME( 1997, dmdtouch, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Diamond Touch (0400433V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 604, E - 30/06/97
+GAME( 1998, adonis, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Adonis (0200751V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 602/9, A - 25/05/98
+GAME( 1998, reelrock, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Reelin-n-Rockin (0100779V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 628, A - 13/07/98
+GAME( 1998, indiandr, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Indian Dreaming (0100845V, Local)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 628/1, B - 15/12/98
+GAME( 1999, wtiger, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "White Tiger Classic (0200954V, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // 638/1, B - 08/07/99
+GAME( 2000, magicmsk, aristmk5, aristmk5_usa, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Magic Mask (MV4115, Export)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // MV4115, A - 09/05/2000
+GAME( 2000, margmgc, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Margarita Magic (01J00101, NSW/ACT)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // JB005, A - 07/07/2000
+GAME( 2001, geishanz, 0, aristmk5, aristmk5, aristmk5_state, aristmk5, ROT0, "Aristocrat", "Geisha (0101408V, New Zealand)", GAME_NOT_WORKING|GAME_IMPERFECT_SOUND ) // MV4127, A - 05/03/01
diff --git a/src/mame/drivers/aristmk6.c b/src/mame/drivers/aristmk6.c
index 99f3e45affe..924d7ca73a2 100644
--- a/src/mame/drivers/aristmk6.c
+++ b/src/mame/drivers/aristmk6.c
@@ -241,16 +241,16 @@ GAME( 200?, aristmk6, 0, aristmk6, aristmk6, driver_device, 0, R
GAME( 200?, mk6nsw11, 0, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Aristocrat MK6 Base (11011901, NSW/ACT)", GAME_NOT_WORKING | GAME_NO_SOUND | GAME_IS_BIOS_ROOT)
// Dates listed below are for the combination (reel layout), not release dates
-GAME( 2004, antcleo, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Antony and Cleopatra (10177211, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 754, B - 12/07/04
-GAME( 2002, 50lions, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "50 Lions (10120511, NSW/ACT)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 717, A - 11/10/02
-GAME( 2003, 50lionsa, 50lions, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "50 Lions (10156111, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 717, D - 20/10/03
-GAME( 2003, choysun, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Choy Sun Doa (20131511, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 688, D - 23/01/03
-GAME( 2003, crystals, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Crystal Springs (10155811, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 740, A - 28/05/03
-GAME( 2003, indianmm, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Indian Dreaming - Maximillion$ (10130711, NSW/ACT)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 628/12, A - 17/01/03
-GAME( 2004, wheregld, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Where's the Gold (20177111, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 756, C - 17/06/04
-GAME( 2002, whalecsh, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Whales of Cash (20155711, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 695, A - 14/06/02
-GAME( 2003, wildways, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Wild Ways (10130111, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 698/1, A - 25/02/03
-GAME( 2003, thaiprin, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Thai Princess (30127721, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 707, E - 21/03/03
+GAME( 2004, antcleo, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Antony and Cleopatra (10177211, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 754, B - 12/07/04
+GAME( 2002, 50lions, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "50 Lions (10120511, NSW/ACT)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 717, A - 11/10/02
+GAME( 2003, 50lionsa, 50lions, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "50 Lions (10156111, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 717, D - 20/10/03
+GAME( 2003, choysun, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Choy Sun Doa (20131511, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 688, D - 23/01/03
+GAME( 2003, crystals, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Crystal Springs (10155811, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 740, A - 28/05/03
+GAME( 2003, indianmm, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Indian Dreaming - Maximillion$ (10130711, NSW/ACT)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 628/12, A - 17/01/03
+GAME( 2004, wheregld, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Where's the Gold (20177111, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 756, C - 17/06/04
+GAME( 2002, whalecsh, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Whales of Cash (20155711, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 695, A - 14/06/02
+GAME( 2003, wildways, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Wild Ways (10130111, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 698/1, A - 25/02/03
+GAME( 2003, thaiprin, aristmk6, aristmk6, aristmk6, driver_device, 0, ROT0, "Aristocrat", "Thai Princess (30127721, Malaysia)", GAME_NOT_WORKING | GAME_NO_SOUND ) // 707, E - 21/03/03
/*
List of known MK6 games, excluding Hyperlink variations
diff --git a/src/mame/drivers/arkanoid.c b/src/mame/drivers/arkanoid.c
index 131410af134..4a4b89b5c85 100644
--- a/src/mame/drivers/arkanoid.c
+++ b/src/mame/drivers/arkanoid.c
@@ -559,14 +559,14 @@ static ADDRESS_MAP_START( arkanoid_map, AS_PROGRAM, 8, arkanoid_state )
AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xd000, 0xd001) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_data_w)
AM_RANGE(0xd001, 0xd001) AM_DEVREAD_LEGACY("aysnd", ay8910_r)
- AM_RANGE(0xd008, 0xd008) AM_WRITE(arkanoid_d008_w) /* gfx bank, flip screen etc. */
- AM_RANGE(0xd00c, 0xd00c) AM_READ_PORT("SYSTEM") /* 2 bits from the 68705 */
+ AM_RANGE(0xd008, 0xd008) AM_WRITE(arkanoid_d008_w) /* gfx bank, flip screen etc. */
+ AM_RANGE(0xd00c, 0xd00c) AM_READ_PORT("SYSTEM") /* 2 bits from the 68705 */
AM_RANGE(0xd010, 0xd010) AM_READ_PORT("BUTTONS") AM_WRITE(watchdog_reset_w)
AM_RANGE(0xd018, 0xd018) AM_READWRITE(arkanoid_Z80_mcu_r, arkanoid_Z80_mcu_w) /* input from the 68705 */
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xe800, 0xe83f) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xe840, 0xefff) AM_RAM
- AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
+ AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
ADDRESS_MAP_END
static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 8, arkanoid_state )
@@ -574,14 +574,14 @@ static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 8, arkanoid_state )
AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xd000, 0xd000) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_w)
AM_RANGE(0xd001, 0xd001) AM_DEVREADWRITE_LEGACY("aysnd", ay8910_r, ay8910_data_w)
- AM_RANGE(0xd008, 0xd008) AM_WRITE(arkanoid_d008_w) /* gfx bank, flip screen etc. */
+ AM_RANGE(0xd008, 0xd008) AM_WRITE(arkanoid_d008_w) /* gfx bank, flip screen etc. */
AM_RANGE(0xd00c, 0xd00c) AM_READ_PORT("SYSTEM")
AM_RANGE(0xd010, 0xd010) AM_READ_PORT("BUTTONS") AM_WRITE(watchdog_reset_w)
AM_RANGE(0xd018, 0xd018) AM_READ_PORT("MUX") AM_WRITENOP
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xe800, 0xe83f) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xe840, 0xefff) AM_RAM
- AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
+ AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
ADDRESS_MAP_END
static ADDRESS_MAP_START( hexa_map, AS_PROGRAM, 8, arkanoid_state )
@@ -591,7 +591,7 @@ static ADDRESS_MAP_START( hexa_map, AS_PROGRAM, 8, arkanoid_state )
AM_RANGE(0xd001, 0xd001) AM_DEVREAD_LEGACY("aysnd", ay8910_r)
AM_RANGE(0xd000, 0xd001) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_data_w)
AM_RANGE(0xd008, 0xd008) AM_WRITE(hexa_d008_w)
- AM_RANGE(0xd010, 0xd010) AM_WRITE(watchdog_reset_w) /* or IRQ acknowledge, or both */
+ AM_RANGE(0xd010, 0xd010) AM_WRITE(watchdog_reset_w) /* or IRQ acknowledge, or both */
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_SHARE("videoram")
ADDRESS_MAP_END
@@ -600,14 +600,14 @@ static ADDRESS_MAP_START( brixian_map, AS_PROGRAM, 8, arkanoid_state )
AM_RANGE(0xc000, 0xc7ff) AM_RAM
AM_RANGE(0xd000, 0xd000) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_w)
AM_RANGE(0xd001, 0xd001) AM_DEVREADWRITE_LEGACY("aysnd", ay8910_r, ay8910_data_w)
- AM_RANGE(0xd008, 0xd008) AM_WRITE(arkanoid_d008_w) /* gfx bank, flip screen etc. */
+ AM_RANGE(0xd008, 0xd008) AM_WRITE(arkanoid_d008_w) /* gfx bank, flip screen etc. */
AM_RANGE(0xd00c, 0xd00c) AM_READ_PORT("SYSTEM")
AM_RANGE(0xd010, 0xd010) AM_READ_PORT("BUTTONS") AM_WRITE(watchdog_reset_w)
AM_RANGE(0xd018, 0xd018) AM_READ_PORT("MUX") AM_WRITENOP
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(arkanoid_videoram_w) AM_SHARE("videoram")
AM_RANGE(0xe800, 0xe83f) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xe840, 0xefff) AM_RAM
- AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
+ AM_RANGE(0xf000, 0xffff) AM_READNOP /* fixes instant death in final level */
// Interesting locations:
// c105=0a @ title displays each piece
// c110=01 - Title, 02 - Start Game, 04 - Select Stage
@@ -639,7 +639,7 @@ static INPUT_PORTS_START( arkanoid )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_COIN2 )
- PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, arkanoid_state,arkanoid_68705_input_r, NULL) /* Inputs from the 68705 */
+ PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, arkanoid_state,arkanoid_68705_input_r, NULL) /* Inputs from the 68705 */
PORT_START("BUTTONS")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
@@ -651,35 +651,35 @@ static INPUT_PORTS_START( arkanoid )
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, arkanoid_state,arkanoid_input_mux, "P1\0P2")
PORT_START("DSW")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x01, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_SERVICE_DIPLOC(0x04, IP_ACTIVE_LOW, "SW1:6" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x08, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x10, "20K 60K 60K+" )
PORT_DIPSETTING( 0x00, "20K" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
PORT_DIPSETTING( 0x20, "3" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") /* Table at 0x0328 */
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2") /* Table at 0x0328 */
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
- PORT_START("UNUSED") /* This is read in ay8910_interface */
+ PORT_START("UNUSED") /* This is read in ay8910_interface */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P1") /* Spinner Player 1 */
+ PORT_START("P1") /* Spinner Player 1 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15)
- PORT_START("P2") /* Spinner Player 2 */
+ PORT_START("P2") /* Spinner Player 2 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_COCKTAIL
INPUT_PORTS_END
@@ -688,10 +688,10 @@ static INPUT_PORTS_START( arkanoidj )
PORT_INCLUDE( arkanoid )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2") /* Table at 0x0320 */
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2") /* Table at 0x0320 */
PORT_DIPSETTING( 0x40, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
INPUT_PORTS_END
@@ -700,10 +700,10 @@ static INPUT_PORTS_START( ark1ball )
PORT_INCLUDE( arkanoidj )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$60" at 0x9c7f and 0x9c9b */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$60" at 0x9c7f and 0x9c9b */
PORT_DIPSETTING( 0x10, "60K 100K 60K+" )
PORT_DIPSETTING( 0x00, "60K" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
PORT_DIPSETTING( 0x20, "1" )
PORT_DIPSETTING( 0x00, "2" )
INPUT_PORTS_END
@@ -713,15 +713,15 @@ static INPUT_PORTS_START( arkatayt )
PORT_INCLUDE( arkanoidj )
PORT_MODIFY("SYSTEM")
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) /* Some bootlegs need it to be 1 */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* Some bootlegs need it to be 0 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) /* Some bootlegs need it to be 1 */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* Some bootlegs need it to be 0 */
INPUT_PORTS_END
static INPUT_PORTS_START( arkangc )
PORT_INCLUDE( arkatayt )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x01, 0x01, "Ball Speed" ) PORT_DIPLOCATION("SW1:8") /* Speed at 0xc462 (code at 0x18aa) - Also affects level 2 (code at 0x7b82) */
+ PORT_DIPNAME( 0x01, 0x01, "Ball Speed" ) PORT_DIPLOCATION("SW1:8") /* Speed at 0xc462 (code at 0x18aa) - Also affects level 2 (code at 0x7b82) */
PORT_DIPSETTING( 0x01, DEF_STR( Normal ) ) /* 0xc462 = 0x06 - Normal level 2 */
PORT_DIPSETTING( 0x00, "Faster" ) /* 0xc462 = 0x08 - Level 2 same as level 30 */
INPUT_PORTS_END
@@ -730,7 +730,7 @@ static INPUT_PORTS_START( arkangc2 )
PORT_INCLUDE( arkatayt )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x01, 0x01, "Ball Speed" ) PORT_DIPLOCATION("SW1:8") /* Speed at 0xc462 (code at 0x18aa) - Also affects level 2 (code at 0x7b82) */
+ PORT_DIPNAME( 0x01, 0x01, "Ball Speed" ) PORT_DIPLOCATION("SW1:8") /* Speed at 0xc462 (code at 0x18aa) - Also affects level 2 (code at 0x7b82) */
PORT_DIPSETTING( 0x01, "Slower" ) /* 0xc462 = 0x04 - Normal level 2 */
PORT_DIPSETTING( 0x00, DEF_STR ( Normal ) ) /* 0xc462 = 0x06 - Level 2 same as level 30 */
INPUT_PORTS_END
@@ -746,13 +746,13 @@ static INPUT_PORTS_START( arkgcbl )
PORT_INCLUDE( arkatayt )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x01, 0x00, "Round Select" ) PORT_DIPLOCATION("SW1:8") /* Check code at 0x7bc2 - Speed at 0xc462 (code at 0x18aa) */
+ PORT_DIPNAME( 0x01, 0x00, "Round Select" ) PORT_DIPLOCATION("SW1:8") /* Check code at 0x7bc2 - Speed at 0xc462 (code at 0x18aa) */
PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) /* 0xc462 = 0x06 */
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) /* 0xc462 = 0x06 */
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$20" at 0x9c7f and 0x9c9b */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$20" at 0x9c7f and 0x9c9b */
PORT_DIPSETTING( 0x10, "60K 100K 60K+" ) /* But "20K 60K 60K+" when continue */
PORT_DIPSETTING( 0x00, "60K" ) /* But "20K" when continue */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x20, "3" )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:2" ) /* Always 2C_1C - check code at 0x7d5e */
@@ -765,13 +765,13 @@ static INPUT_PORTS_START( paddle2 )
PORT_DIPNAME( 0x01, 0x00, "Round Select" ) PORT_DIPLOCATION("SW1:8") /* Check code at 0x7bc2 - Speed at 0xc462 (code at 0x18aa) */
PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) /* 0xc462 = 0x06 */
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) /* 0xc462 = 0x06 */
- PORT_DIPNAME( 0x04, 0x04, "Controls ?" ) PORT_DIPLOCATION("SW1:6") /* Check code at 0x96a1 and read notes */
+ PORT_DIPNAME( 0x04, 0x04, "Controls ?" ) PORT_DIPLOCATION("SW1:6") /* Check code at 0x96a1 and read notes */
PORT_DIPSETTING( 0x04, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x00, DEF_STR( Alternate ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$20" at 0x9c7f and 0x9c9b */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$20" at 0x9c7f and 0x9c9b */
PORT_DIPSETTING( 0x10, "60K 100K 60K+" ) /* But "20K 60K 60K+" when continue */
PORT_DIPSETTING( 0x00, "60K" ) /* But "20K" when continue */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x20, "3" )
INPUT_PORTS_END
@@ -780,13 +780,13 @@ static INPUT_PORTS_START( arktayt2 )
PORT_INCLUDE( arkatayt )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$60" at 0x9c7f and 0x9c9b */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:4") /* "ld a,$60" at 0x93bd and "ld a,$60" at 0x9c7f and 0x9c9b */
PORT_DIPSETTING( 0x10, "60K 100K 60K+" )
PORT_DIPSETTING( 0x00, "60K" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:3") /* Table at 0x9a28 */
PORT_DIPSETTING( 0x20, "2" )
PORT_DIPSETTING( 0x00, "3" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2") /* Table at 0x0320 */
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2") /* Table at 0x0320 */
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 1C_1C ) )
INPUT_PORTS_END
@@ -869,7 +869,7 @@ static INPUT_PORTS_START( hexa )
INPUT_PORTS_END
static INPUT_PORTS_START( brixian )
- PORT_START("SYSTEM")
+ PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -924,13 +924,13 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 characters */
- 4096, /* 4096 characters */
- 3, /* 3 bits per pixel */
- { 2*4096*8*8, 4096*8*8, 0 }, /* the two bitplanes are separated */
+ 8,8, /* 8*8 characters */
+ 4096, /* 4096 characters */
+ 3, /* 3 bits per pixel */
+ { 2*4096*8*8, 4096*8*8, 0 }, /* the two bitplanes are separated */
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
/* Graphics Decode Information */
@@ -1025,7 +1025,7 @@ static MACHINE_CONFIG_START( arkanoid, arkanoid_state )
MCFG_CPU_ADD("mcu", M68705, XTAL_12MHz/4) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(mcu_map)
- MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // 100 CPU slices per second to synchronize between the MCU and the main CPU
+ MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // 100 CPU slices per second to synchronize between the MCU and the main CPU
MCFG_MACHINE_START_OVERRIDE(arkanoid_state,arkanoid)
MCFG_MACHINE_RESET_OVERRIDE(arkanoid_state,arkanoid)
@@ -1056,7 +1056,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( hexa, arkanoid_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) /* Imported from arkanoid - correct? */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_12MHz/2) /* Imported from arkanoid - correct? */
MCFG_CPU_PROGRAM_MAP(hexa_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", arkanoid_state, irq0_line_hold)
@@ -1079,7 +1079,7 @@ static MACHINE_CONFIG_START( hexa, arkanoid_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("aysnd", AY8910, XTAL_12MHz/4/2) /* Imported from arkanoid - correct? */
+ MCFG_SOUND_ADD("aysnd", AY8910, XTAL_12MHz/4/2) /* Imported from arkanoid - correct? */
MCFG_SOUND_CONFIG(hexa_ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MACHINE_CONFIG_END
@@ -1114,7 +1114,7 @@ ROM_START( arkanoid )
ROM_LOAD( "a75-01-1.ic17", 0x0000, 0x8000, CRC(5bcda3b0) SHA1(52cadd38b5f8e8856f007a9c602d6b508f30be65) )
ROM_LOAD( "a75-11.ic16", 0x8000, 0x8000, CRC(eafd7191) SHA1(d2f8843b716718b1de209e97a874e8ce600f3f87) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-06.ic14", 0x0000, 0x0800, BAD_DUMP CRC(515d77b6) SHA1(a302937683d11f663abd56a2fd7c174374e4d7fb) ) /* Possible bootleg code??, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1123,13 +1123,13 @@ ROM_START( arkanoid )
ROM_LOAD( "a75-05.ic62", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 ) /* BPROMs are silkscreened as 7621, actual BPROMs used are MMI 6306-1N */
- ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
// these were decapped, sort them!
// None of these work with any genuine Arkanoid sets!
- ROM_REGION( 0x0800, "alt_mcus", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "alt_mcus", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "arkanoid1_68705p3.ic14", 0x0000, 0x0800, CRC(1b68e2d8) SHA1(f642a7cb624ee14fb0e410de5ae1fc799d2fa1c2) ) // this is close to the supported MCU, is it a bootleg?
ROM_LOAD( "arkanoid_mcu.ic14", 0x0000, 0x0800, CRC(4e44b50a) SHA1(c61e7d158dc8e2b003c8158053ec139b904599af) ) // this has a more genuine Programmed By Yasu 1986 string in it with 0x00 fill near the end
ROM_LOAD( "arkanoid_68705p5.ic14", 0x0000, 0x0800, CRC(0be83647) SHA1(625fd1e6061123df612f115ef14a06cd6009f5d1) ) // same as above, but with 0xff fill
@@ -1140,7 +1140,7 @@ ROM_START( arkanoidu )
ROM_LOAD( "a75-19.ic17", 0x0000, 0x8000, CRC(d3ad37d7) SHA1(a172a1ef5bb83ee2d8ed2842ef8968af19ad411e) )
ROM_LOAD( "a75-18.ic16", 0x8000, 0x8000, CRC(cdc08301) SHA1(05f54353cc8333af14fa985a2764960e20e8161a) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-20.ic14", 0x0000, 0x0800, BAD_DUMP CRC(de518e47) SHA1(b8eddd1c566505fb69e3d1207c7a9720dfb9f503) ) /* Hand crafted, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1149,9 +1149,9 @@ ROM_START( arkanoidu )
ROM_LOAD( "a75-05.ic62", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 ) /* BPROMs are silkscreened as 7621, actual BPROMs used are MMI 6306-1N */
- ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkanoiduo )
@@ -1159,7 +1159,7 @@ ROM_START( arkanoiduo )
ROM_LOAD( "a75-01-1.ic17", 0x0000, 0x8000, CRC(5bcda3b0) SHA1(52cadd38b5f8e8856f007a9c602d6b508f30be65) )
ROM_LOAD( "a75-10.ic16", 0x8000, 0x8000, CRC(a1769e15) SHA1(fbb45731246a098b29eb08de5d63074b496aaaba) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-06.ic14", 0x0000, 0x0800, BAD_DUMP CRC(515d77b6) SHA1(a302937683d11f663abd56a2fd7c174374e4d7fb) ) /* Possible bootleg code??, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1168,9 +1168,9 @@ ROM_START( arkanoiduo )
ROM_LOAD( "a75-05.ic62", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 ) /* BPROMs are silkscreened as 7621, actual BPROMs used are MMI 6306-1N */
- ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.ic23", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.ic23", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkanoidj )
@@ -1178,7 +1178,7 @@ ROM_START( arkanoidj )
ROM_LOAD( "a75-21.ic17", 0x0000, 0x8000, CRC(bf0455fc) SHA1(250522b84b9f491c3f4efc391bf6aa6124361369) )
ROM_LOAD( "a75-22.ic16", 0x8000, 0x8000, CRC(3a2688d3) SHA1(9633a661352def3d85f95ca830f6d761b0b5450e) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-23.ic14", 0x0000, 0x0800, BAD_DUMP CRC(0a4abef6) SHA1(fdce0b7a2eab7fd4f1f4fc3b93120b1ebc16078e) ) /* Hand crafted, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1187,9 +1187,9 @@ ROM_START( arkanoidj )
ROM_LOAD( "a75-05.ic62", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 ) /* BPROMs are silkscreened as 7621, actual BPROMs used are MMI 6306-1N */
- ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.ic22", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkanoidjo )
@@ -1197,7 +1197,7 @@ ROM_START( arkanoidjo )
ROM_LOAD( "a75-01-1.ic17", 0x0000, 0x8000, CRC(5bcda3b0) SHA1(52cadd38b5f8e8856f007a9c602d6b508f30be65) )
ROM_LOAD( "a75-02.ic16", 0x8000, 0x8000, CRC(bbc33ceb) SHA1(e9b6fef98d0d20e77c7a1c25eff8e9a8c668a258) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-06.ic14", 0x0000, 0x0800, BAD_DUMP CRC(515d77b6) SHA1(a302937683d11f663abd56a2fd7c174374e4d7fb) ) /* Possible bootleg code??, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1206,9 +1206,9 @@ ROM_START( arkanoidjo )
ROM_LOAD( "a75-05.ic62", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 ) /* BPROMs are silkscreened as 7621, actual BPROMs used are MMI 6306-1N */
- ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.ic23", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.ic23", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkatour )
@@ -1216,7 +1216,7 @@ ROM_START( arkatour )
ROM_LOAD( "a75-27.ic17", 0x0000, 0x8000, CRC(e3b8faf5) SHA1(4c09478fa41881fa89ee6afb676aeb780f17ac2e) )
ROM_LOAD( "a75-28.ic16", 0x8000, 0x8000, CRC(326aca4d) SHA1(5a194b7a0361236d471b24905dc6434372f81252) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-32.ic14", 0x0000, 0x0800, BAD_DUMP CRC(d3249559) SHA1(b1542764450016614e9e03cedd6a2f1e59961789) ) /* Hand crafted, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1225,9 +1225,9 @@ ROM_START( arkatour )
ROM_LOAD( "a75-31.ic62", 0x10000, 0x8000, CRC(7b76b192) SHA1(a68aa08717646a6c322cf3455df07f50df9e9f33) )
ROM_REGION( 0x0600, "proms", 0 ) /* BPROMs are silkscreened as 7621, actual BPROMs used are MMI 6306-1N */
- ROM_LOAD( "a75-33.ic24", 0x0000, 0x0200, CRC(b4bf3c81) SHA1(519188937ac9728c653fabac877e37dc43c3f71a) ) /* red component */
- ROM_LOAD( "a75-34.ic23", 0x0200, 0x0200, CRC(de85a803) SHA1(325214995996de36a0470fbfc00e4e393c0b17ad) ) /* green component */
- ROM_LOAD( "a75-35.ic22", 0x0400, 0x0200, CRC(38acfd3b) SHA1(2841e9db047aa039eff8567a518b6250b355507b) ) /* blue component */
+ ROM_LOAD( "a75-33.ic24", 0x0000, 0x0200, CRC(b4bf3c81) SHA1(519188937ac9728c653fabac877e37dc43c3f71a) ) /* red component */
+ ROM_LOAD( "a75-34.ic23", 0x0200, 0x0200, CRC(de85a803) SHA1(325214995996de36a0470fbfc00e4e393c0b17ad) ) /* green component */
+ ROM_LOAD( "a75-35.ic22", 0x0400, 0x0200, CRC(38acfd3b) SHA1(2841e9db047aa039eff8567a518b6250b355507b) ) /* blue component */
ROM_END
ROM_START( arkanoidjb ) /* This set requires a MCU. The MCU code included doesn't seem to work??? See USER1 region below */
@@ -1236,7 +1236,7 @@ ROM_START( arkanoidjb ) /* This set requires a MCU. The MCU code included doesn'
ROM_LOAD( "e2.6f", 0x8000, 0x8000, CRC(bbc33ceb) SHA1(e9b6fef98d0d20e77c7a1c25eff8e9a8c668a258) ) /* == A75-02.IC16 */
/* Use the current A75-06.IC14 MCU code so the game is playable */
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-06.ic14", 0x0000, 0x0800, BAD_DUMP CRC(515d77b6) SHA1(a302937683d11f663abd56a2fd7c174374e4d7fb) ) /* Possible bootleg code??, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1245,9 +1245,9 @@ ROM_START( arkanoidjb ) /* This set requires a MCU. The MCU code included doesn'
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
/* Until we know what this MCU is supposed to do, we put it here */
ROM_REGION( 0x0800, "user1", 0 )
@@ -1259,7 +1259,7 @@ ROM_START( arkanoidjb2 )
ROM_LOAD( "1.ic81", 0x0000, 0x8000, CRC(9ff93dc2) SHA1(eee0975b799a8e6717f646dd40716dc454476106) )
ROM_LOAD( "2.ic82", 0x8000, 0x8000, CRC(bbc33ceb) SHA1(e9b6fef98d0d20e77c7a1c25eff8e9a8c668a258) ) /* == A75-02.IC16 */
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-06.ic14", 0x0000, 0x0800, BAD_DUMP CRC(515d77b6) SHA1(a302937683d11f663abd56a2fd7c174374e4d7fb) ) /* Possible bootleg code??, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1268,9 +1268,9 @@ ROM_START( arkanoidjb2 )
ROM_LOAD( "a75-05.ic62", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 ) /* BPROMs are silkscreened as 7621, actual BPROMs used are MMI 6306-1N */
- ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.ic23", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.ic24", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.ic23", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.ic23", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( ark1ball ) /* This set requires a MCU. No MCU rom was supplied so we use current A75-06.IC14 for now */
@@ -1279,7 +1279,7 @@ ROM_START( ark1ball ) /* This set requires a MCU. No MCU rom was supplied so we
ROM_LOAD( "2palline.7f", 0x8000, 0x8000, CRC(ed6b62ab) SHA1(4d4991b422756bd304fc5ef236aac1422fe1f999) )
/* Use the current A75-06.IC14 MCU code so the game is playable */
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a75-06.ic14", 0x0000, 0x0800, BAD_DUMP CRC(515d77b6) SHA1(a302937683d11f663abd56a2fd7c174374e4d7fb) ) /* Possible bootleg code??, need the decapped data here */
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1288,9 +1288,9 @@ ROM_START( ark1ball ) /* This set requires a MCU. No MCU rom was supplied so we
ROM_LOAD( "a-5.3f", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkangc )
@@ -1304,9 +1304,9 @@ ROM_START( arkangc )
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkangc2 )
@@ -1320,9 +1320,9 @@ ROM_START( arkangc2 )
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( block2 )
@@ -1330,7 +1330,7 @@ ROM_START( block2 )
ROM_LOAD( "1.bin", 0x00000, 0x8000, CRC(2b026cae) SHA1(73d1d5d3e6d65fbe378ce85ff501610573ae5e95) )
ROM_LOAD( "2.bin", 0x08000, 0x8000, CRC(e3843fea) SHA1(8c654dcf78d9e4f4c6a7a7d384fdf622536234c1) )
- ROM_REGION( 0x8000, "unknown", 0 ) /* is it more data or something else like sound or palette ? not Z80 code nor levels anyway */
+ ROM_REGION( 0x8000, "unknown", 0 ) /* is it more data or something else like sound or palette ? not Z80 code nor levels anyway */
ROM_LOAD( "3.bin", 0x00000, 0x8000, CRC(e336c219) SHA1(e1dce37727e7084a83e73f15a138312ab6224061) )
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1340,9 +1340,9 @@ ROM_START( block2 )
// no proms were present in this set.. assumed to be the same
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
// this set has the same 'space invader' scrambled block gfx, and unknown (sound?) rom as the one above
@@ -1352,7 +1352,7 @@ ROM_START( arkbloc3 )
ROM_LOAD( "blockbl.001", 0x00000, 0x8000, CRC(bf7197a0) SHA1(4fbc0cbc09d292ab0f2e4a35b30505b2f7e4dc0d) )
ROM_LOAD( "blockbl.002", 0x08000, 0x8000, CRC(29dbe452) SHA1(b99cb98549bddf1e673e2e715c80664001581f9f) )
- ROM_REGION( 0x8000, "unknown", 0 ) /* is it more data or something else like sound or palette ? not Z80 code nor levels anyway */
+ ROM_REGION( 0x8000, "unknown", 0 ) /* is it more data or something else like sound or palette ? not Z80 code nor levels anyway */
ROM_LOAD( "blockbl.006", 0x00000, 0x8000, CRC(e336c219) SHA1(e1dce37727e7084a83e73f15a138312ab6224061) )
ROM_REGION( 0x18000, "gfx1", 0 )
@@ -1362,9 +1362,9 @@ ROM_START( arkbloc3 )
// no proms were present in this set.. assumed to be the same
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkblock )
@@ -1378,9 +1378,9 @@ ROM_START( arkblock )
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkbloc2 )
@@ -1394,9 +1394,9 @@ ROM_START( arkbloc2 )
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
@@ -1429,12 +1429,12 @@ ROM_START( arkgcbl )
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "82s129.5k", 0x0000, 0x0100, CRC(fa70b64d) SHA1(273669d05f793cf1ee0741b175be281307fa9b5e) ) /* red component + */
- ROM_LOAD( "82s129.5jk", 0x0100, 0x0100, CRC(cca69884) SHA1(fdcd66110c8eb901a401f8618821c7980946a511) ) /* red component = a75-07.bpr*/
- ROM_LOAD( "82s129.5l", 0x0200, 0x0100, CRC(3e4d2bf5) SHA1(c475887302dd137d6965769070b7d55f488c1b25) ) /* green component + */
- ROM_LOAD( "82s129.5kl", 0x0300, 0x0100, CRC(085d625a) SHA1(26c96a1c1b7562fed84c31dd92fdf7829e96a9c7) ) /* green component = a75-08.bpr*/
- ROM_LOAD( "82s129.5mn", 0x0400, 0x0100, CRC(0fe0b108) SHA1(fcf27619208922345a1e42b3a219b4274f66968d) ) /* blue component + */
- ROM_LOAD( "63s141.5m", 0x0500, 0x0100, CRC(5553f675) SHA1(c50255af8d99664b92e0bb34a527fd42ebf7e759) ) /* blue component = a75-09.bpr*/
+ ROM_LOAD( "82s129.5k", 0x0000, 0x0100, CRC(fa70b64d) SHA1(273669d05f793cf1ee0741b175be281307fa9b5e) ) /* red component + */
+ ROM_LOAD( "82s129.5jk", 0x0100, 0x0100, CRC(cca69884) SHA1(fdcd66110c8eb901a401f8618821c7980946a511) ) /* red component = a75-07.bpr*/
+ ROM_LOAD( "82s129.5l", 0x0200, 0x0100, CRC(3e4d2bf5) SHA1(c475887302dd137d6965769070b7d55f488c1b25) ) /* green component + */
+ ROM_LOAD( "82s129.5kl", 0x0300, 0x0100, CRC(085d625a) SHA1(26c96a1c1b7562fed84c31dd92fdf7829e96a9c7) ) /* green component = a75-08.bpr*/
+ ROM_LOAD( "82s129.5mn", 0x0400, 0x0100, CRC(0fe0b108) SHA1(fcf27619208922345a1e42b3a219b4274f66968d) ) /* blue component + */
+ ROM_LOAD( "63s141.5m", 0x0500, 0x0100, CRC(5553f675) SHA1(c50255af8d99664b92e0bb34a527fd42ebf7e759) ) /* blue component = a75-09.bpr*/
ROM_REGION( 0x0200, "pal", 0 )
ROM_LOAD( "pal16r8.5f", 0x0000, 0x0104, CRC(36471917) SHA1(d0f295a94d480b44416e66be4b480b299aad5c3c) )
@@ -1452,12 +1452,12 @@ ROM_START( arkgcbla )
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "82s129.5k", 0x0000, 0x0100, CRC(fa70b64d) SHA1(273669d05f793cf1ee0741b175be281307fa9b5e) ) /* red component + */
- ROM_LOAD( "82s129.5jk", 0x0100, 0x0100, CRC(cca69884) SHA1(fdcd66110c8eb901a401f8618821c7980946a511) ) /* red component = a75-07.bpr*/
- ROM_LOAD( "82s129.5l", 0x0200, 0x0100, CRC(3e4d2bf5) SHA1(c475887302dd137d6965769070b7d55f488c1b25) ) /* green component + */
- ROM_LOAD( "82s129.5kl", 0x0300, 0x0100, CRC(085d625a) SHA1(26c96a1c1b7562fed84c31dd92fdf7829e96a9c7) ) /* green component = a75-08.bpr*/
- ROM_LOAD( "82s129.5mn", 0x0400, 0x0100, CRC(0fe0b108) SHA1(fcf27619208922345a1e42b3a219b4274f66968d) ) /* blue component + */
- ROM_LOAD( "63s141.5m", 0x0500, 0x0100, CRC(5553f675) SHA1(c50255af8d99664b92e0bb34a527fd42ebf7e759) ) /* blue component = a75-09.bpr*/
+ ROM_LOAD( "82s129.5k", 0x0000, 0x0100, CRC(fa70b64d) SHA1(273669d05f793cf1ee0741b175be281307fa9b5e) ) /* red component + */
+ ROM_LOAD( "82s129.5jk", 0x0100, 0x0100, CRC(cca69884) SHA1(fdcd66110c8eb901a401f8618821c7980946a511) ) /* red component = a75-07.bpr*/
+ ROM_LOAD( "82s129.5l", 0x0200, 0x0100, CRC(3e4d2bf5) SHA1(c475887302dd137d6965769070b7d55f488c1b25) ) /* green component + */
+ ROM_LOAD( "82s129.5kl", 0x0300, 0x0100, CRC(085d625a) SHA1(26c96a1c1b7562fed84c31dd92fdf7829e96a9c7) ) /* green component = a75-08.bpr*/
+ ROM_LOAD( "82s129.5mn", 0x0400, 0x0100, CRC(0fe0b108) SHA1(fcf27619208922345a1e42b3a219b4274f66968d) ) /* blue component + */
+ ROM_LOAD( "63s141.5m", 0x0500, 0x0100, CRC(5553f675) SHA1(c50255af8d99664b92e0bb34a527fd42ebf7e759) ) /* blue component = a75-09.bpr*/
ROM_REGION( 0x0200, "pal", 0 )
ROM_LOAD( "pal16r8.5f", 0x0000, 0x0104, CRC(36471917) SHA1(d0f295a94d480b44416e66be4b480b299aad5c3c) )
@@ -1475,9 +1475,9 @@ ROM_START( paddle2 )
ROM_LOAD( "a75-05.rom", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arkatayt )
@@ -1491,9 +1491,9 @@ ROM_START( arkatayt )
ROM_LOAD( "3-ic35.5c", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "ic73.11e", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "ic74.12e", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "ic75.13e", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "ic73.11e", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "ic74.12e", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "ic75.13e", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( arktayt2 )
@@ -1507,9 +1507,9 @@ ROM_START( arktayt2 )
ROM_LOAD( "3-ic35.5c", 0x10000, 0x8000, CRC(c76374e2) SHA1(7520dd48de20db60a2038f134dcaa454988e7874) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "ic73.11e", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "ic74.12e", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "ic75.13e", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "ic73.11e", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "ic74.12e", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "ic75.13e", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
@@ -1524,14 +1524,14 @@ ROM_START( tetrsark )
ROM_LOAD( "ic62.5", 0x10000, 0x8000, CRC(c8e80a00) SHA1(4bee4c36ee768ae68ebc64e639fdc43f61c74f92) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
- ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
- ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
+ ROM_LOAD( "a75-07.bpr", 0x0000, 0x0200, CRC(0af8b289) SHA1(6bc589e8a609b4cf450aebedc8ce02d5d45c970f) ) /* red component */
+ ROM_LOAD( "a75-08.bpr", 0x0200, 0x0200, CRC(abb002fb) SHA1(c14f56b8ef103600862e7930709d293b0aa97a73) ) /* green component */
+ ROM_LOAD( "a75-09.bpr", 0x0400, 0x0200, CRC(a7c6c277) SHA1(adaa003dcd981576ea1cc5f697d709b2d6b2ea29) ) /* blue component */
ROM_END
ROM_START( hexa )
- ROM_REGION( 0x18000, "maincpu", 0 ) /* 64k for code + 32k for banked ROM */
+ ROM_REGION( 0x18000, "maincpu", 0 ) /* 64k for code + 32k for banked ROM */
ROM_LOAD( "hexa.20", 0x00000, 0x8000, CRC(98b00586) SHA1(3591a3b0486d720f0aaa9f0bf4be352cd0ffcbc7) )
ROM_LOAD( "hexa.21", 0x10000, 0x8000, CRC(3d5d006c) SHA1(ad4eadab82024b122182eacb5a322cfd6e476a70) )
@@ -1603,14 +1603,14 @@ DRIVER_INIT_MEMBER(arkanoid_state,block2)
// combine these into a single swap..
srctile = BITSWAP16(tile,15,14,13,12,
- 11,10,9,8,
- 7,5,6,3,
- 1,2,4,0);
+ 11,10,9,8,
+ 7,5,6,3,
+ 1,2,4,0);
srctile = BITSWAP16(srctile,15,14,13,12,
- 11,9,10,5,
- 7,6,8,4,
- 3,2,1,0);
+ 11,9,10,5,
+ 7,6,8,4,
+ 3,2,1,0);
srctile = srctile ^ 0xd4;
@@ -1698,8 +1698,8 @@ GAME( 1986, arkangc, arkanoid, bootleg, arkangc, arkanoid_state, arkangc,
GAME( 1986, arkangc2, arkanoid, bootleg, arkangc2, arkanoid_state, arkangc2, ROT90, "bootleg (Game Corporation)", "Arkanoid (Game Corporation bootleg, set 2)", GAME_SUPPORTS_SAVE )
GAME( 1986, arkblock, arkanoid, bootleg, arkangc, arkanoid_state, arkblock, ROT90, "bootleg (Game Corporation)", "Block (Game Corporation bootleg, set 1)", GAME_SUPPORTS_SAVE )
GAME( 1986, arkbloc2, arkanoid, bootleg, arkangc, arkanoid_state, arkbloc2, ROT90, "bootleg (Game Corporation)", "Block (Game Corporation bootleg, set 2)", GAME_SUPPORTS_SAVE )
-GAME( 1986, arkbloc3, arkanoid, bootleg, block2, arkanoid_state, block2, ROT90, "bootleg (Game Corporation)", "Block (Game Corporation bootleg, set 3)", GAME_SUPPORTS_SAVE ) // Both these sets have an extra unknown rom
-GAME( 1986, block2, arkanoid, bootleg, block2, arkanoid_state, block2, ROT90, "bootleg (S.P.A. Co.)", "Block 2 (S.P.A. Co. bootleg)", GAME_SUPPORTS_SAVE ) // and scrambled gfx roms with 'space invader' themed gfx
+GAME( 1986, arkbloc3, arkanoid, bootleg, block2, arkanoid_state, block2, ROT90, "bootleg (Game Corporation)", "Block (Game Corporation bootleg, set 3)", GAME_SUPPORTS_SAVE ) // Both these sets have an extra unknown rom
+GAME( 1986, block2, arkanoid, bootleg, block2, arkanoid_state, block2, ROT90, "bootleg (S.P.A. Co.)", "Block 2 (S.P.A. Co. bootleg)", GAME_SUPPORTS_SAVE ) // and scrambled gfx roms with 'space invader' themed gfx
GAME( 1986, arkgcbl, arkanoid, bootleg, arkgcbl, arkanoid_state, arkgcbl, ROT90, "bootleg", "Arkanoid (bootleg on Block hardware, set 1)", GAME_SUPPORTS_SAVE )
GAME( 1986, arkgcbla, arkanoid, bootleg, arkgcbl, arkanoid_state, arkgcbl, ROT90, "bootleg", "Arkanoid (bootleg on Block hardware, set 2)", GAME_SUPPORTS_SAVE )
GAME( 1988, paddle2, arkanoid, bootleg, paddle2, arkanoid_state, paddle2, ROT90, "bootleg", "Paddle 2 (bootleg on Block hardware)", GAME_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/armedf.c b/src/mame/drivers/armedf.c
index a200c056eae..41c3a7767ed 100644
--- a/src/mame/drivers/armedf.c
+++ b/src/mame/drivers/armedf.c
@@ -293,7 +293,7 @@ Notes:
#include "includes/armedf.h"
#include "includes/nb1414m4.h"
-#define LEGION_HACK 0
+#define LEGION_HACK 0
/*************************************
@@ -406,7 +406,7 @@ static ADDRESS_MAP_START( terraf_map, AS_PROGRAM, 16, armedf_state )
AM_RANGE(0x07c002, 0x07c003) AM_WRITE(armedf_bg_scrollx_w)
AM_RANGE(0x07c004, 0x07c005) AM_WRITE(armedf_bg_scrolly_w)
AM_RANGE(0x07c00a, 0x07c00b) AM_WRITE(sound_command_w)
- AM_RANGE(0x07c00c, 0x07c00d) AM_WRITENOP /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
+ AM_RANGE(0x07c00c, 0x07c00d) AM_WRITENOP /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
AM_RANGE(0x07c00e, 0x07c00f) AM_WRITE(irq_lv1_ack_w)
ADDRESS_MAP_END
@@ -459,7 +459,7 @@ static ADDRESS_MAP_START( legion_map, AS_PROGRAM, 16, armedf_state )
AM_RANGE(0x07c002, 0x07c003) AM_WRITE(armedf_bg_scrollx_w)
AM_RANGE(0x07c004, 0x07c005) AM_WRITE(armedf_bg_scrolly_w)
AM_RANGE(0x07c00a, 0x07c00b) AM_WRITE(sound_command_w)
- AM_RANGE(0x07c00c, 0x07c00d) AM_WRITENOP /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
+ AM_RANGE(0x07c00c, 0x07c00d) AM_WRITENOP /* Watchdog ? cycle 0000 -> 0100 -> 0200 back to 0000 */
AM_RANGE(0x07c00e, 0x07c00f) AM_WRITE(irq_lv2_ack_w)
ADDRESS_MAP_END
@@ -593,14 +593,14 @@ READ16_MEMBER(bigfghtr_state::sharedram_r)
return (ioport("P2")->read() & 0xffff) ^ 0xffff;
/*
- protection controls where the program code should jump to.
+ protection controls where the program code should jump to.
- example snippet:
- 00DB2A: 41FA FE86 lea (-$17a,PC), A0; ($d9b2) ;base program vector
- 00DB2E: 4DF9 0008 0E2A lea $80e2a.l, A6 ;base RAM vector, used by the i8751 to send the value, this value is added to the above A0
- 00DB34: 3039 0008 0E62 move.w $80e62.l, D0 ;number of snippets to execute
- 00DB3A: 6100 00F0 bsr $dc2c
- */
+ example snippet:
+ 00DB2A: 41FA FE86 lea (-$17a,PC), A0; ($d9b2) ;base program vector
+ 00DB2E: 4DF9 0008 0E2A lea $80e2a.l, A6 ;base RAM vector, used by the i8751 to send the value, this value is added to the above A0
+ 00DB34: 3039 0008 0E62 move.w $80e62.l, D0 ;number of snippets to execute
+ 00DB3A: 6100 00F0 bsr $dc2c
+ */
/* bp daee, A0 = 0xdd02, A6 = 0x808ca, D0 = 0x80902 */
//case 0x902/2:
@@ -649,21 +649,21 @@ READ16_MEMBER(bigfghtr_state::sharedram_r)
/*case 0x
- case 0x94a/2:
- return 0x0002*4;
- case (0x90a+2*0x40)/2:
- case (0x90a+3*0x40)/2:
- return 0x0003*4;
- case (0x90a+4*0x40)/2:
- return 0x000c*4; // 0x13d74
- case (0x90a+5*0x40)/2:
- return 0x000d*4; // 0x130f6
- case (0x90a+6*0x40)/2:
- return 0x000e*4; // 0x1817e
- case (0x90a+7*0x40)/2:
- return 0x0010*4; // 0x15924
- //case (0x90a+0x25)/2:
- // return 2;*/
+ case 0x94a/2:
+ return 0x0002*4;
+ case (0x90a+2*0x40)/2:
+ case (0x90a+3*0x40)/2:
+ return 0x0003*4;
+ case (0x90a+4*0x40)/2:
+ return 0x000c*4; // 0x13d74
+ case (0x90a+5*0x40)/2:
+ return 0x000d*4; // 0x130f6
+ case (0x90a+6*0x40)/2:
+ return 0x000e*4; // 0x1817e
+ case (0x90a+7*0x40)/2:
+ return 0x0010*4; // 0x15924
+ //case (0x90a+0x25)/2:
+ // return 2;*/
}
}
@@ -684,7 +684,7 @@ static ADDRESS_MAP_START( bigfghtr_map, AS_PROGRAM, 16, bigfghtr_state )
AM_RANGE(0x08c002, 0x08c003) AM_READ_PORT("P2")
AM_RANGE(0x08c004, 0x08c005) AM_READ_PORT("DSW0")
AM_RANGE(0x08c006, 0x08c007) AM_READ_PORT("DSW1")
- AM_RANGE(0x08d000, 0x08d001) AM_WRITE(terraf_io_w) //807b0
+ AM_RANGE(0x08d000, 0x08d001) AM_WRITE(terraf_io_w) //807b0
AM_RANGE(0x08d002, 0x08d003) AM_WRITE(armedf_bg_scrollx_w)
AM_RANGE(0x08d004, 0x08d005) AM_WRITE(armedf_bg_scrolly_w)
AM_RANGE(0x08d006, 0x08d007) AM_WRITE(armedf_fg_scrollx_w)
@@ -795,30 +795,30 @@ static INPUT_PORTS_START( armedf )
PORT_BIT( 0xf800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "6" )
/* SW1:3,4 defined in manual/test-mode as:
- PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x04, "20k" )
- PORT_DIPSETTING( 0x00, "40k" )
- PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
- PORT_DIPSETTING( 0x08, "60k" )
- PORT_DIPSETTING( 0x00, "80k" )*/
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPSETTING( 0x04, "20k" )
+ PORT_DIPSETTING( 0x00, "40k" )
+ PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPSETTING( 0x08, "60k" )
+ PORT_DIPSETTING( 0x00, "80k" )*/
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0c, "20k then every 60k" )
PORT_DIPSETTING( 0x04, "20k then every 80k" )
PORT_DIPSETTING( 0x08, "40k then every 60k" )
PORT_DIPSETTING( 0x00, "40k then every 80k" )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,8")
PORT_DIPSETTING( 0xc0, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x80, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
@@ -826,22 +826,22 @@ static INPUT_PORTS_START( armedf )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5,6") // not in the "test mode"
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5,6") // not in the "test mode"
PORT_DIPSETTING( 0x30, DEF_STR( No ) )
PORT_DIPSETTING( 0x20, "3 Times" )
PORT_DIPSETTING( 0x10, "5 Times" )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:7") // not in the "test mode"
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:7") // not in the "test mode"
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" )
@@ -852,41 +852,41 @@ static INPUT_PORTS_START( legion )
PORT_INCLUDE( armedf )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x04, "30k Then Every 100k" )
PORT_DIPSETTING( 0x00, "50k Only" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW1:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW1:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
#if LEGION_HACK // see notes
- PORT_DIPNAME( 0x80, 0x80, "Allow Invulnerability (Cheat)" ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, "Allow Invulnerability (Cheat)" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
#else
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
#endif
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x10, 0x10, "Coin Slots" ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, "Coin Slots" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x10, "Common" )
PORT_DIPSETTING( 0x00, "Individual" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x20, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
#if LEGION_HACK // see notes
- PORT_DIPNAME( 0x40, 0x40, "P1 Invulnerability (Cheat)") PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x40, 0x40, "P1 Invulnerability (Cheat)") PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "P2 Invulnerability (Cheat)") PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x80, "P2 Invulnerability (Cheat)") PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
#else
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
#endif
INPUT_PORTS_END
@@ -896,28 +896,28 @@ static INPUT_PORTS_START( terraf )
PORT_MODIFY("DSW1")
/* SW1:3,4 defined in manual/test-mode as:
- PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x04, "20k" )
- PORT_DIPSETTING( 0x00, "50k" )
- PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
- PORT_DIPSETTING( 0x08, "60k" )
- PORT_DIPSETTING( 0x00, "90k" )*/
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPSETTING( 0x04, "20k" )
+ PORT_DIPSETTING( 0x00, "50k" )
+ PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPSETTING( 0x08, "60k" )
+ PORT_DIPSETTING( 0x00, "90k" )*/
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0c, "20k then every 60k" )
PORT_DIPSETTING( 0x04, "20k then every 90k" )
PORT_DIPSETTING( 0x08, "50k then every 60k" )
PORT_DIPSETTING( 0x00, "50k then every 90k" )
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_MODIFY("DSW2")
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7,8")
+ PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7,8")
PORT_DIPSETTING( 0xc0, DEF_STR( No ) )
PORT_DIPSETTING( 0x80, "Only 3 Times" )
PORT_DIPSETTING( 0x40, "Only 5 Times" )
@@ -929,29 +929,29 @@ static INPUT_PORTS_START( kozure )
PORT_MODIFY("DSW1")
/* SW1:3,4 defined in manual/test-mode as:
- PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x04, DEF_STR( None ) )
- PORT_DIPSETTING( 0x00, "50k" )
- PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
- PORT_DIPSETTING( 0x08, "60k" )
- PORT_DIPSETTING( 0x00, "90k" )*/
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPSETTING( 0x04, DEF_STR( None ) )
+ PORT_DIPSETTING( 0x00, "50k" )
+ PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPSETTING( 0x08, "60k" )
+ PORT_DIPSETTING( 0x00, "90k" )*/
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x08, "50k then every 60k" )
PORT_DIPSETTING( 0x00, "50k then every 90k" )
PORT_DIPSETTING( 0x0c, "Every 60k" )
PORT_DIPSETTING( 0x04, "Every 90k" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" )
@@ -982,33 +982,33 @@ static INPUT_PORTS_START( cclimbr2 )
PORT_MODIFY("DSW1")
/* SW1:3,4 defined in manual/test-mode as:
- PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x04, "30k" )
- PORT_DIPSETTING( 0x00, "60k" )
- PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
- PORT_DIPSETTING( 0x08, "70k" )
- PORT_DIPSETTING( 0x00, DEF_STR( None ) )*/
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x04, 0x04, "1st Bonus Life" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPSETTING( 0x04, "30k" )
+ PORT_DIPSETTING( 0x00, "60k" )
+ PORT_DIPNAME( 0x08, 0x08, "2nd Bonus Life" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPSETTING( 0x08, "70k" )
+ PORT_DIPSETTING( 0x00, DEF_STR( None ) )*/
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0c, "30K and 100k" )
PORT_DIPSETTING( 0x08, "60k and 130k" )
PORT_DIPSETTING( 0x04, "30k only" )
PORT_DIPSETTING( 0x00, "60k only" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Normal ) )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x10, "3 Times" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Partial Invulnerability (Cheat)") PORT_DIPLOCATION("SW2:7") /* Listed as "Unused" */
+ PORT_DIPNAME( 0x40, 0x40, "Partial Invulnerability (Cheat)") PORT_DIPLOCATION("SW2:7") /* Listed as "Unused" */
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
static INPUT_PORTS_START( bigfghtr )
@@ -1133,10 +1133,10 @@ static const gfx_layout sprite_layout =
};
static GFXDECODE_START( armedf )
- GFXDECODE_ENTRY( "gfx1", 0, char_layout, 0*16, 32 )
- GFXDECODE_ENTRY( "gfx2", 0, tile_layout, 64*16, 32 )
- GFXDECODE_ENTRY( "gfx3", 0, tile_layout, 96*16, 32 )
- GFXDECODE_ENTRY( "gfx4", 0, sprite_layout, 32*16, 32 )
+ GFXDECODE_ENTRY( "gfx1", 0, char_layout, 0*16, 32 )
+ GFXDECODE_ENTRY( "gfx2", 0, tile_layout, 64*16, 32 )
+ GFXDECODE_ENTRY( "gfx3", 0, tile_layout, 96*16, 32 )
+ GFXDECODE_ENTRY( "gfx4", 0, sprite_layout, 32*16, 32 )
GFXDECODE_END
@@ -1177,14 +1177,14 @@ MACHINE_RESET_MEMBER(armedf_state,armedf)
static MACHINE_CONFIG_START( terraf, armedf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_PROGRAM_MAP(terraf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@@ -1222,16 +1222,16 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( terrafb, armedf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_PROGRAM_MAP(terraf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
- MCFG_CPU_ADD("extra", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("extra", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(terrafb_extraz80_map)
MCFG_CPU_IO_MAP(terrafb_extraz80_portmap)
@@ -1270,14 +1270,14 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( kozure, armedf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_PROGRAM_MAP(kozure_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@@ -1314,14 +1314,14 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( armedf, armedf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_PROGRAM_MAP(armedf_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@@ -1358,14 +1358,14 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( cclimbr2, armedf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_PROGRAM_MAP(cclimbr2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@@ -1402,14 +1402,14 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( legion, armedf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_PROGRAM_MAP(legion_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@@ -1446,14 +1446,14 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( legiono, armedf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // 8mhz?
MCFG_CPU_PROGRAM_MAP(legiono_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq2_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(cclimbr2_soundmap)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(armedf_state,armedf)
MCFG_MACHINE_RESET_OVERRIDE(armedf_state,armedf)
@@ -1503,14 +1503,14 @@ MACHINE_RESET_MEMBER(bigfghtr_state,bigfghtr)
static MACHINE_CONFIG_START( bigfghtr, bigfghtr_state )
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // verified
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) // verified
MCFG_CPU_PROGRAM_MAP(bigfghtr_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", armedf_state, irq1_line_assert)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) // 4mhz?
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_portmap)
- MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
+ MCFG_CPU_PERIODIC_INT_DRIVER(armedf_state, irq0_line_hold, XTAL_8MHz/2/512) // ?
MCFG_MACHINE_START_OVERRIDE(bigfghtr_state,bigfghtr)
MCFG_MACHINE_RESET_OVERRIDE(bigfghtr_state,bigfghtr)
@@ -1551,13 +1551,13 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( legion )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "lg1.bin", 0x000001, 0x010000, CRC(c4aeb724) SHA1(b4c0383f3b1fa6b1d5bdab0f3a5293c89a82a474) )
ROM_LOAD16_BYTE( "lg3.bin", 0x000000, 0x010000, CRC(777e4935) SHA1(225766940059b4c12e69332ea77eb618dbd1467b) )
ROM_LOAD16_BYTE( "legion.1b", 0x020001, 0x010000, CRC(c306660a) SHA1(31c6b868ba07677b5110c577335873354bff596f) ) // lg2
ROM_LOAD16_BYTE( "legion.1d", 0x020000, 0x010000, CRC(c2e45e1e) SHA1(95cc359145b1b03123262891feed358407ba105a) ) // lg4
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "legion.1h", 0x00000, 0x04000, CRC(2ca4f7f0) SHA1(7cf997af9dd74ced9d28c047069ccfb67d72e257) ) // lg9
ROM_LOAD( "legion.1i", 0x04000, 0x08000, CRC(79f4a827) SHA1(25e4c1b5b8466627244b7226310e67e4261333b6) ) // lg10
@@ -1575,18 +1575,18 @@ ROM_START( legion )
ROM_LOAD( "legion.1k", 0x000000, 0x010000, CRC(ff5a0db9) SHA1(9308deb363d3b7686cc69485ec14201dd68f9a97) ) // lg12
ROM_LOAD( "legion.1j", 0x010000, 0x010000, CRC(bae220c8) SHA1(392ae0fb0351dcad7b0e8e0ed4a1dc6e07f493df) ) // lg11
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
ROM_LOAD ( "lg7.bin", 0x0000, 0x4000, CRC(533e2b58) SHA1(a13ea4a530038760ffa87713903c59a932452717) )
ROM_END
ROM_START( legiono )
- ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "legion.1a", 0x000001, 0x010000, CRC(8c0cda1d) SHA1(14b93d4fb4381ebc6a4ccdb480089bf69c6f474b) )
ROM_LOAD16_BYTE( "legion.1c", 0x000000, 0x010000, CRC(21226660) SHA1(ee48812d6ec9d4dccc58684164916f91b71aabf2) )
ROM_LOAD16_BYTE( "legion.1b", 0x020001, 0x010000, CRC(c306660a) SHA1(31c6b868ba07677b5110c577335873354bff596f) )
ROM_LOAD16_BYTE( "legion.1d", 0x020000, 0x010000, CRC(c2e45e1e) SHA1(95cc359145b1b03123262891feed358407ba105a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "legion.1h", 0x00000, 0x04000, CRC(2ca4f7f0) SHA1(7cf997af9dd74ced9d28c047069ccfb67d72e257) )
ROM_LOAD( "legion.1i", 0x04000, 0x08000, CRC(79f4a827) SHA1(25e4c1b5b8466627244b7226310e67e4261333b6) )
@@ -1606,7 +1606,7 @@ ROM_START( legiono )
ROM_END
ROM_START( terraf )
- ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "8.6e", 0x00000, 0x10000, CRC(fd58fa06) SHA1(f1f5fbd153be5fd5669aada66134baedfeac5d32) )
ROM_LOAD16_BYTE( "3.6h", 0x00001, 0x10000, CRC(54823a7d) SHA1(bdf67890428710470a622ea48383b3fae8de8cbd) )
ROM_LOAD16_BYTE( "7.4e", 0x20000, 0x10000, CRC(fde8de7e) SHA1(6b0d27ec49c8c0609c110ad97938bec8c077ad18) )
@@ -1614,7 +1614,7 @@ ROM_START( terraf )
ROM_LOAD16_BYTE( "6.3e", 0x40000, 0x10000, CRC(a5bb8c3b) SHA1(36730b1a4a686de7251b80eb084a00f64bd7b40d) )
ROM_LOAD16_BYTE( "1.3h", 0x40001, 0x10000, CRC(d2de6d28) SHA1(0371b5bf8e6105aaf8847c4b6d0d2d7d105079c1) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "11.17k", 0x00000, 0x10000, CRC(4407d475) SHA1(96e86c7ef4dc997812436f7d0ddea332b4e6cb2b) )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -1632,15 +1632,15 @@ ROM_START( terraf )
ROM_LOAD( "12.7d", 0x00000, 0x10000, CRC(2d1f2ceb) SHA1(77544e1c4bda06feac135a96bb76af7c79278dc0) ) /* sprites */
ROM_LOAD( "13.9d", 0x10000, 0x10000, CRC(1d2f92d6) SHA1(e842c6bf95a5958a6ca2c85e68b9bc3cc15211a4) )
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
ROM_LOAD( "10.11c", 0x0000, 0x4000, CRC(ac705812) SHA1(65be46ee959d8478cb6dffb25e61f7742276997b) )
- ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
+ ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
ROM_LOAD( "n82s129an.11j", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) ) /* N82S129AN or compatible labled "TF" */
ROM_END
ROM_START( terrafu ) /* Bootleg of the USA version?, uses some roms common to bootlegs that differ to the orginal board sets */
- ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "tf-8.6e", 0x00000, 0x10000, CRC(fea6dd64) SHA1(682eae338ce14808f134897f594fae1c69e75a1a) )
ROM_LOAD16_BYTE( "tf-3.6h", 0x00001, 0x10000, CRC(02f9d05a) SHA1(88985373bc3cffbc838e0b701ecd732a417975a1) )
ROM_LOAD16_BYTE( "tf-7.4e", 0x20000, 0x10000, CRC(fde8de7e) SHA1(6b0d27ec49c8c0609c110ad97938bec8c077ad18) )
@@ -1648,7 +1648,7 @@ ROM_START( terrafu ) /* Bootleg of the USA version?, uses some roms common to bo
ROM_LOAD16_BYTE( "tf-6.3e", 0x40000, 0x08000, CRC(b91e9ba3) SHA1(33e5272d1691859a2bb1f340eb4bdfdd5d73a5d4) ) /* Half the size of World & Japan sets?? */
ROM_LOAD16_BYTE( "tf-1.3h", 0x40001, 0x08000, CRC(d6e22375) SHA1(c84fc19700b65ee36b0c7d75cd7c97f86c7f719d) ) /* bootlegs use this size rom for 1 & 6 */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "tf-001.17k", 0x00000, 0x10000, CRC(eb6b4138) SHA1(04c53bf46d87a156d3fad86f051985d0df79bd20) )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -1666,15 +1666,15 @@ ROM_START( terrafu ) /* Bootleg of the USA version?, uses some roms common to bo
ROM_LOAD( "tf-003.7d", 0x00000, 0x10000, CRC(d74085a1) SHA1(3f6ba85dbd6e48a502c115b2d322a586fc4f56c9) ) /* sprites */
ROM_LOAD( "tf-002.9d", 0x10000, 0x10000, CRC(148aa0c5) SHA1(8d8a565540e91b384a9c154522501921b7da4d4e) )
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
ROM_LOAD( "10.11c", 0x0000, 0x4000, CRC(ac705812) SHA1(65be46ee959d8478cb6dffb25e61f7742276997b) )
- ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
+ ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
ROM_LOAD( "n82s129an.11j", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) ) /* N82S129AN or compatible labled "TF" */
ROM_END
ROM_START( terrafj )
- ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "tfj-8.bin", 0x00000, 0x10000, CRC(b11a6fa7) SHA1(7bb2b98be02d8913796a6d4fa20eed16226ce6b9) )
ROM_LOAD16_BYTE( "tfj-3.bin", 0x00001, 0x10000, CRC(6c6aa7ed) SHA1(ee5fdeb5411034ce0fd1c883ee25bf1fe9a3ec52) )
ROM_LOAD16_BYTE( "tfj-7.bin", 0x20000, 0x10000, CRC(fde8de7e) SHA1(6b0d27ec49c8c0609c110ad97938bec8c077ad18) )
@@ -1682,7 +1682,7 @@ ROM_START( terrafj )
ROM_LOAD16_BYTE( "tfj-6.bin", 0x40000, 0x10000, CRC(4911dfbf) SHA1(91d3607e98e2e746cebddd20a10a033a5557c017) )
ROM_LOAD16_BYTE( "tfj-1.bin", 0x40001, 0x10000, CRC(93063d9a) SHA1(58321e18865a0a72b74beab969b7ea5e010be16a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "11.17k", 0x00000, 0x10000, CRC(4407d475) SHA1(96e86c7ef4dc997812436f7d0ddea332b4e6cb2b) )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -1700,10 +1700,10 @@ ROM_START( terrafj )
ROM_LOAD( "tfj-12.7d", 0x00000, 0x10000, CRC(d74085a1) SHA1(3f6ba85dbd6e48a502c115b2d322a586fc4f56c9) ) /* sprites */
ROM_LOAD( "tfj-13.9d", 0x10000, 0x10000, CRC(148aa0c5) SHA1(8d8a565540e91b384a9c154522501921b7da4d4e) )
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
ROM_LOAD( "10.11c", 0x0000, 0x4000, CRC(ac705812) SHA1(65be46ee959d8478cb6dffb25e61f7742276997b) )
- ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
+ ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
ROM_LOAD( "n82s129an.11j", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) ) /* N82S129AN or compatible labled "TF" */
ROM_END
@@ -1738,7 +1738,7 @@ Company logo and copyright string removed.
ROM_START( terrafjb )
- ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "tfj-8.bin", 0x00000, 0x10000, CRC(b11a6fa7) SHA1(7bb2b98be02d8913796a6d4fa20eed16226ce6b9) )
ROM_LOAD16_BYTE( "tfj-3.bin", 0x00001, 0x10000, CRC(6c6aa7ed) SHA1(ee5fdeb5411034ce0fd1c883ee25bf1fe9a3ec52) )
ROM_LOAD16_BYTE( "tfj-7.bin", 0x20000, 0x10000, CRC(fde8de7e) SHA1(6b0d27ec49c8c0609c110ad97938bec8c077ad18) )
@@ -1746,10 +1746,10 @@ ROM_START( terrafjb )
ROM_LOAD16_BYTE( "tfb-6.bin", 0x40000, 0x08000, CRC(552c3c63) SHA1(82d930b7fcdf4879c4644c47ecce58fd2645f10f) )
ROM_LOAD16_BYTE( "tfb-1.bin", 0x40001, 0x08000, CRC(6a0b94c7) SHA1(55fb32ab859bf51a1c79bf962bb677fa557216ed) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "tf-001.17k", 0x00000, 0x10000, CRC(eb6b4138) SHA1(04c53bf46d87a156d3fad86f051985d0df79bd20) )
- ROM_REGION( 0x4000, "extra", 0 ) /* z80 program (replacement mcu/blitter) */
+ ROM_REGION( 0x4000, "extra", 0 ) /* z80 program (replacement mcu/blitter) */
ROM_LOAD( "tfb-10.bin", 0x0000, 0x4000, CRC(3f9aa367) SHA1(8278fb357b2d68869e39efa01ff19005807b41f8) )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -1767,12 +1767,12 @@ ROM_START( terrafjb )
ROM_LOAD( "tfj-12.7d", 0x00000, 0x10000, CRC(d74085a1) SHA1(3f6ba85dbd6e48a502c115b2d322a586fc4f56c9) ) /* sprites */
ROM_LOAD( "tfj-13.9d", 0x10000, 0x10000, CRC(148aa0c5) SHA1(8d8a565540e91b384a9c154522501921b7da4d4e) )
- ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
+ ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
ROM_LOAD( "n82s129an.11j", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) ) /* N82S129AN or compatible labled "TF" */
ROM_END
ROM_START( terrafb ) /* Seems to be a bootleg of the Japanese version with the region warning screen hacked to just say "WAIT" */
- ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", ROMREGION_ERASEFF ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "tf-014.6e", 0x00000, 0x10000, CRC(8e5f557f) SHA1(3462a58146c3f33bf8686adbd2ead25dae3804a8) )
ROM_LOAD16_BYTE( "tf-011.6h", 0x00001, 0x10000, CRC(5320162a) SHA1(eaffafcaf146cdddb03f40f92ce23dfd096eb89e) )
ROM_LOAD16_BYTE( "tf-013.4e", 0x20000, 0x10000, CRC(a86951e0) SHA1(804cc6f143993f5a9d5f3798e971d7abfe94c3a8) )
@@ -1780,7 +1780,7 @@ ROM_START( terrafb ) /* Seems to be a bootleg of the Japanese version with the r
ROM_LOAD16_BYTE( "tf-012.3e", 0x40000, 0x08000, CRC(4f0e1d76) SHA1(b8636acde7547358663b94bdc8d49b5cc6b596eb) )
ROM_LOAD16_BYTE( "tf-009.3h", 0x40001, 0x08000, CRC(d1014280) SHA1(5ee8d71d77b31b25cce2bf1953c0a5166313a857) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "tf-001.17k", 0x00000, 0x10000, CRC(eb6b4138) SHA1(04c53bf46d87a156d3fad86f051985d0df79bd20) )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -1798,15 +1798,15 @@ ROM_START( terrafb ) /* Seems to be a bootleg of the Japanese version with the r
ROM_LOAD( "tfj-12.7d", 0x00000, 0x10000, CRC(d74085a1) SHA1(3f6ba85dbd6e48a502c115b2d322a586fc4f56c9) ) /* sprites */
ROM_LOAD( "tfj-13.9d", 0x10000, 0x10000, CRC(148aa0c5) SHA1(8d8a565540e91b384a9c154522501921b7da4d4e) )
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter, shouldn't be loaded? */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter, shouldn't be loaded? */
ROM_LOAD( "tf-10.11c", 0x0000, 0x4000, CRC(ac705812) SHA1(65be46ee959d8478cb6dffb25e61f7742276997b) )
- ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
+ ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
ROM_LOAD( "n82s129an.11j", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) ) /* N82S129AN or compatible labled "TF" */
ROM_END
ROM_START( kozure )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "kozure8.6e", 0x00000, 0x10000, CRC(6bbfb1e6) SHA1(ffc8f835e28ff5f5b11f826b74ac2712c3018178) )
ROM_LOAD16_BYTE( "kozure3.6h", 0x00001, 0x10000, CRC(f9178ec8) SHA1(68085b6030f4d1f89931263df68635b3b276e9f0) )
ROM_LOAD16_BYTE( "kozure7.5e", 0x20000, 0x10000, CRC(a7ee09bb) SHA1(70ea2ab09b44e9188eb9500d9663d11e521caa1a) )
@@ -1814,32 +1814,32 @@ ROM_START( kozure )
ROM_LOAD16_BYTE( "kozure6.3e", 0x40000, 0x10000, CRC(9120e728) SHA1(af2ce368d66d01cbad136ae119b31b1701ad0595) )
ROM_LOAD16_BYTE( "kozure1.3h", 0x40001, 0x10000, CRC(345fe7a5) SHA1(56ad809cf4a609447cce3e0181ff86e3f0e8966c) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "kozure11.17k", 0x00000, 0x10000, CRC(dba51e2d) SHA1(49e799d39d298cd3e01602ae5a2d123dfbfa9134) )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "kozure9.11e", 0x00000, 0x08000, CRC(e041356e) SHA1(3e4c8564e7a8c940bbe72db11759903aa295287f) ) /* characters */
+ ROM_LOAD( "kozure9.11e", 0x00000, 0x08000, CRC(e041356e) SHA1(3e4c8564e7a8c940bbe72db11759903aa295287f) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "kozure5.15h", 0x00000, 0x20000, CRC(0b510258) SHA1(e7ec89faa574b755605ddb67d6c908a9f5f2d6ac) ) /* foreground tiles */
+ ROM_LOAD( "kozure5.15h", 0x00000, 0x20000, CRC(0b510258) SHA1(e7ec89faa574b755605ddb67d6c908a9f5f2d6ac) ) /* foreground tiles */
ROM_LOAD( "kozure4.14h", 0x20000, 0x10000, CRC(fb8e13e6) SHA1(f2eafcf6d7362dc62e808f582a7bd2970e5e1ad1) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "kozure14.8a", 0x00000, 0x10000, CRC(94a9c3d0) SHA1(7a5d810ea370d158b2099c17f4d656fbd3deeac8) ) /* background tiles */
+ ROM_LOAD( "kozure14.8a", 0x00000, 0x10000, CRC(94a9c3d0) SHA1(7a5d810ea370d158b2099c17f4d656fbd3deeac8) ) /* background tiles */
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "kozure12.8d", 0x00000, 0x20000, CRC(15f4021d) SHA1(b2ba6fda1a7bdaae97de4b0157b9b656b4385e08) ) /* sprites */
+ ROM_LOAD( "kozure12.8d", 0x00000, 0x20000, CRC(15f4021d) SHA1(b2ba6fda1a7bdaae97de4b0157b9b656b4385e08) ) /* sprites */
ROM_LOAD( "kozure13.9d", 0x20000, 0x20000, CRC(b3b6c753) SHA1(9ad061cac9558320b5cfd1ac1ac8d7f1788270cc) )
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
ROM_LOAD( "kozure10.11c", 0x0000, 0x4000, CRC(f48be21d) SHA1(5d6db049f30cab98f672814a86a06609c1fa8fb4) )
- ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
+ ROM_REGION( 0x0100, "proms", 0 ) /* Unknown use */
ROM_LOAD( "n82s129an.11j", 0x0000, 0x0100, CRC(81244757) SHA1(6324f63e571f0f7a0bb9eb97f9994809db79493f) ) /* N82S129AN or compatible labled "TF" */
ROM_END
ROM_START( cclimbr2 )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "4.bin", 0x00000, 0x10000, CRC(7922ea14) SHA1(4395c1dfdeeba8173cce23b5453185c3ff976980) )
ROM_LOAD16_BYTE( "1.bin", 0x00001, 0x10000, CRC(2ac7ed67) SHA1(5e9c3ca4f5b259ed7b08db8353be7d36ac947578) )
ROM_LOAD16_BYTE( "6.bin", 0x20000, 0x10000, CRC(7905c992) SHA1(5e3ddb3b8127476b763578c3717ffe85aa6b342a) )
@@ -1847,7 +1847,7 @@ ROM_START( cclimbr2 )
ROM_LOAD16_BYTE( "3.bin", 0x40000, 0x10000, CRC(1fb110d6) SHA1(a478096b4b075ff655d079e43151d6b8375f0caa) )
ROM_LOAD16_BYTE( "2.bin", 0x40001, 0x10000, CRC(0024c15b) SHA1(0cd69a24139e878c09d4de37e4d102851765168f) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "11.bin", 0x00000, 0x04000, CRC(fe0175be) SHA1(5c50fa07d8fa61d58a825bbc2cc5a7b85ff3e42e) )
ROM_LOAD( "12.bin", 0x04000, 0x08000, CRC(5ddf18f2) SHA1(b66da5ad400d00b07160986e4841a309a3572bd1) )
@@ -1868,12 +1868,12 @@ ROM_START( cclimbr2 )
ROM_LOAD( "13.bin", 0x20000, 0x10000, CRC(6b6ec999) SHA1(7749ce435f497732bd1b6958974cd95e960fc9fe) )
ROM_LOAD( "14.bin", 0x30000, 0x10000, CRC(f426a4ad) SHA1(facccb21ca73c560d3a38e05e677782516d5b0c0) )
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
ROM_LOAD( "9.bin", 0x0000, 0x4000, CRC(740d260f) SHA1(5b4487930c7a1fb0a796aec2243bec631b1b5104) )
ROM_END
ROM_START( cclimbr2a )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 64K*8 for 68000 code */
ROM_LOAD16_BYTE( "4a.bin", 0x00000, 0x10000, CRC(e1d3192c) SHA1(6e0e6d731af401147f3c2566ddef3e169223eccd) )
ROM_LOAD16_BYTE( "1a.bin", 0x00001, 0x10000, CRC(3ef84974) SHA1(04a6a2ac5b95d0a329ad7afc68b0ef480608c2d4) )
ROM_LOAD16_BYTE( "6.bin", 0x20000, 0x10000, CRC(7905c992) SHA1(5e3ddb3b8127476b763578c3717ffe85aa6b342a) )
@@ -1881,7 +1881,7 @@ ROM_START( cclimbr2a )
ROM_LOAD16_BYTE( "3.bin", 0x40000, 0x10000, CRC(1fb110d6) SHA1(a478096b4b075ff655d079e43151d6b8375f0caa) )
ROM_LOAD16_BYTE( "2.bin", 0x40001, 0x10000, CRC(0024c15b) SHA1(0cd69a24139e878c09d4de37e4d102851765168f) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "11.bin", 0x00000, 0x04000, CRC(fe0175be) SHA1(5c50fa07d8fa61d58a825bbc2cc5a7b85ff3e42e) )
ROM_LOAD( "12.bin", 0x04000, 0x08000, CRC(5ddf18f2) SHA1(b66da5ad400d00b07160986e4841a309a3572bd1) )
@@ -1902,12 +1902,12 @@ ROM_START( cclimbr2a )
ROM_LOAD( "13.bin", 0x20000, 0x10000, CRC(6b6ec999) SHA1(7749ce435f497732bd1b6958974cd95e960fc9fe) )
ROM_LOAD( "14.bin", 0x30000, 0x10000, CRC(f426a4ad) SHA1(facccb21ca73c560d3a38e05e677782516d5b0c0) )
- ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
+ ROM_REGION( 0x4000, "blit_data", 0 ) /* data for mcu/blitter */
ROM_LOAD( "9.bin", 0x0000, 0x4000, CRC(740d260f) SHA1(5b4487930c7a1fb0a796aec2243bec631b1b5104) )
ROM_END
ROM_START( armedf )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "06.3d", 0x00000, 0x10000, CRC(0f9015e2) SHA1(0dc9c2cda0220bb9d03048c0eac62bc512d30622) )
ROM_LOAD16_BYTE( "01.3f", 0x00001, 0x10000, CRC(816ff7c5) SHA1(1013883f2389aba4b8f397aacc0d681807a31cd5) )
ROM_LOAD16_BYTE( "07.5d", 0x20000, 0x10000, CRC(5b3144a5) SHA1(98dd45049f242480c9ac0903fb38dfb2b8906be7) )
@@ -1915,7 +1915,7 @@ ROM_START( armedf )
ROM_LOAD16_BYTE( "af_08.rom", 0x40000, 0x10000, CRC(d1d43600) SHA1(1a473b4958a02a33c0a02e7e72a70a9ee0c68c50) )
ROM_LOAD16_BYTE( "af_03.rom", 0x40001, 0x10000, CRC(bbe1fe2d) SHA1(f47be23c7564b106d636d49d5f1da47daecd31df) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "af_10.rom", 0x00000, 0x10000, CRC(c5eacb87) SHA1(33af84b48fbda26729975b02cfb70f23c0bce6a2) )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -1935,7 +1935,7 @@ ROM_START( armedf )
ROM_END
ROM_START( armedff )
- ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x60000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "af_06.rom", 0x00000, 0x10000, CRC(c5326603) SHA1(135a8d96d792cf9b55e39e21160ee419be76d28a) )
ROM_LOAD16_BYTE( "af_01.rom", 0x00001, 0x10000, CRC(458e9542) SHA1(22e4281eaac6b9b04af324cc96b5f3e4d1cefe43) )
ROM_LOAD16_BYTE( "af_07.rom", 0x20000, 0x10000, CRC(cc8517f5) SHA1(93e4d3707a48551af89cadd0e016ddb65285a005) )
@@ -1943,7 +1943,7 @@ ROM_START( armedff )
ROM_LOAD16_BYTE( "af_08.rom", 0x40000, 0x10000, CRC(d1d43600) SHA1(1a473b4958a02a33c0a02e7e72a70a9ee0c68c50) )
ROM_LOAD16_BYTE( "af_03.rom", 0x40001, 0x10000, CRC(bbe1fe2d) SHA1(f47be23c7564b106d636d49d5f1da47daecd31df) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "af_10.rom", 0x00000, 0x10000, CRC(c5eacb87) SHA1(33af84b48fbda26729975b02cfb70f23c0bce6a2) )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -1969,10 +1969,10 @@ ROM_START( skyrobo )
ROM_LOAD16_BYTE( "4", 0x40000, 0x20000, CRC(37ced4b7) SHA1(9ded66f795d3c0886f48e52de632e6edb8c57e84) ) /* Rom location IC5 */
ROM_LOAD16_BYTE( "2", 0x40001, 0x20000, CRC(88d52f8e) SHA1(33b0d2b3cd38a13d8580694e7c50c059914eebe2) ) /* Rom location IC4 */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "8.17k", 0x00000, 0x10000, CRC(0aeab61e) SHA1(165e0ad58542b65383fef714578da21f62df7b74) )
- ROM_REGION( 0x10000, "mcu", 0 ) /* Intel C8751 read protected MCU */
+ ROM_REGION( 0x10000, "mcu", 0 ) /* Intel C8751 read protected MCU */
ROM_LOAD( "i8751.mcu", 0x00000, 0x1000, NO_DUMP )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -2001,10 +2001,10 @@ ROM_START( bigfghtr )
ROM_LOAD16_BYTE( "4.ic5", 0x40000, 0x20000, CRC(2464a83b) SHA1(00f5ac81bc33148daafeab757647b63894e0e0ca) )
ROM_LOAD16_BYTE( "2.ic4", 0x40001, 0x20000, CRC(b47bbcd5) SHA1(811bd4bc8fb662abf4734ab51e24c863d5cc3df3) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound) */
ROM_LOAD( "8.17k", 0x00000, 0x10000, CRC(0aeab61e) SHA1(165e0ad58542b65383fef714578da21f62df7b74) )
- ROM_REGION( 0x10000, "mcu", 0 ) /* Intel C8751 read protected MCU */
+ ROM_REGION( 0x10000, "mcu", 0 ) /* Intel C8751 read protected MCU */
ROM_LOAD( "i8751.mcu", 0x00000, 0x1000, NO_DUMP )
ROM_REGION( 0x08000, "gfx1", 0 )
@@ -2074,7 +2074,7 @@ DRIVER_INIT_MEMBER(armedf_state,legion)
{
#if LEGION_HACK
/* This is a hack to allow you to use the extra features
- of 3 of the "Unused" Dip Switches (see notes above). */
+ of 3 of the "Unused" Dip Switches (see notes above). */
UINT16 *RAM = (UINT16 *)memregion("maincpu")->base();
RAM[0x0001d6 / 2] = 0x0001;
/* To avoid checksum error */
@@ -2090,7 +2090,7 @@ DRIVER_INIT_MEMBER(armedf_state,legiono)
{
#if LEGION_HACK
/* This is a hack to allow you to use the extra features
- of 3 of the "Unused" Dip Switches (see notes above). */
+ of 3 of the "Unused" Dip Switches (see notes above). */
UINT16 *RAM = (UINT16 *)memregion("maincpu")->base();
RAM[0x0001d6/2] = 0x0001;
/* No need to patch the checksum routine (see notes) ! */
diff --git a/src/mame/drivers/artmagic.c b/src/mame/drivers/artmagic.c
index 7b22668016b..0a3d376f9c9 100644
--- a/src/mame/drivers/artmagic.c
+++ b/src/mame/drivers/artmagic.c
@@ -32,8 +32,8 @@
#include "machine/nvram.h"
-#define MASTER_CLOCK_40MHz (XTAL_40MHz)
-#define MASTER_CLOCK_25MHz (XTAL_25MHz)
+#define MASTER_CLOCK_40MHz (XTAL_40MHz)
+#define MASTER_CLOCK_25MHz (XTAL_25MHz)
/*************************************
@@ -166,12 +166,12 @@ static void ultennis_protection(running_machine &machine)
/* check the command byte */
switch (state->m_prot_input[0])
{
- case 0x00: /* reset */
+ case 0x00: /* reset */
state->m_prot_input_index = state->m_prot_output_index = 0;
state->m_prot_output[0] = machine.rand();
break;
- case 0x01: /* 01 aaaa bbbb cccc dddd (xxxx) */
+ case 0x01: /* 01 aaaa bbbb cccc dddd (xxxx) */
if (state->m_prot_input_index == 9)
{
UINT16 a = state->m_prot_input[1] | (state->m_prot_input[2] << 8);
@@ -192,20 +192,20 @@ static void ultennis_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x02: /* 02 aaaa bbbb cccc (xxxxxxxx) */
+ case 0x02: /* 02 aaaa bbbb cccc (xxxxxxxx) */
/*
- Ultimate Tennis -- actual values from a board:
-
- hex decimal
- 0041 0084 00c8 -> 00044142 65 132 200 -> 278850 = 65*65*66
- 001e 0084 00fc -> 0000e808 30 132 252 -> 59400 = 30*30*66
- 0030 007c 005f -> 00022e00 48 124 95 -> 142848 = 48*48*62
- 0024 00dd 0061 -> 00022ce0 36 221 97 -> 142560 = 36*36*110
- 0025 0096 005b -> 00019113 37 150 91 -> 102675 = 37*37*75
- 0044 00c9 004c -> 00070e40 68 201 76 -> 462400 = 68*68*100
-
- question is: what is the 3rd value doing there?
- */
+ Ultimate Tennis -- actual values from a board:
+
+ hex decimal
+ 0041 0084 00c8 -> 00044142 65 132 200 -> 278850 = 65*65*66
+ 001e 0084 00fc -> 0000e808 30 132 252 -> 59400 = 30*30*66
+ 0030 007c 005f -> 00022e00 48 124 95 -> 142848 = 48*48*62
+ 0024 00dd 0061 -> 00022ce0 36 221 97 -> 142560 = 36*36*110
+ 0025 0096 005b -> 00019113 37 150 91 -> 102675 = 37*37*75
+ 0044 00c9 004c -> 00070e40 68 201 76 -> 462400 = 68*68*100
+
+ question is: what is the 3rd value doing there?
+ */
if (state->m_prot_input_index == 7)
{
UINT16 a = (INT16)(state->m_prot_input[1] | (state->m_prot_input[2] << 8));
@@ -222,7 +222,7 @@ static void ultennis_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x03: /* 03 (xxxx) */
+ case 0x03: /* 03 (xxxx) */
if (state->m_prot_input_index == 1)
{
UINT16 x = state->m_prot_save;
@@ -234,7 +234,7 @@ static void ultennis_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x04: /* 04 aaaa */
+ case 0x04: /* 04 aaaa */
if (state->m_prot_input_index == 3)
{
UINT16 a = state->m_prot_input[1] | (state->m_prot_input[2] << 8);
@@ -257,18 +257,18 @@ static void cheesech_protection(running_machine &machine)
/* check the command byte */
switch (state->m_prot_input[0])
{
- case 0x00: /* reset */
+ case 0x00: /* reset */
state->m_prot_input_index = state->m_prot_output_index = 0;
state->m_prot_output[0] = machine.rand();
break;
- case 0x01: /* 01 aaaa bbbb (xxxx) */
+ case 0x01: /* 01 aaaa bbbb (xxxx) */
if (state->m_prot_input_index == 5)
{
UINT16 a = state->m_prot_input[1] | (state->m_prot_input[2] << 8);
UINT16 b = state->m_prot_input[3] | (state->m_prot_input[4] << 8);
- UINT16 c = 0x4000; /* seems to be hard-coded */
- UINT16 d = 0x00a0; /* seems to be hard-coded */
+ UINT16 c = 0x4000; /* seems to be hard-coded */
+ UINT16 d = 0x00a0; /* seems to be hard-coded */
UINT16 x = a - b;
if ((INT16)x >= 0)
x = (x * c) >> 16;
@@ -283,7 +283,7 @@ static void cheesech_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x03: /* 03 (xxxx) */
+ case 0x03: /* 03 (xxxx) */
if (state->m_prot_input_index == 1)
{
UINT16 x = state->m_prot_save;
@@ -295,7 +295,7 @@ static void cheesech_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x04: /* 04 aaaa */
+ case 0x04: /* 04 aaaa */
if (state->m_prot_input_index == 3)
{
UINT16 a = state->m_prot_input[1] | (state->m_prot_input[2] << 8);
@@ -318,7 +318,7 @@ static void stonebal_protection(running_machine &machine)
/* check the command byte */
switch (state->m_prot_input[0])
{
- case 0x01: /* 01 aaaa bbbb cccc dddd (xxxx) */
+ case 0x01: /* 01 aaaa bbbb cccc dddd (xxxx) */
if (state->m_prot_input_index == 9)
{
UINT16 a = state->m_prot_input[1] | (state->m_prot_input[2] << 8);
@@ -339,7 +339,7 @@ static void stonebal_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x02: /* 02 aaaa (xx) */
+ case 0x02: /* 02 aaaa (xx) */
if (state->m_prot_input_index == 3)
{
/*UINT16 a = state->m_prot_input[1] | (state->m_prot_input[2] << 8);*/
@@ -351,7 +351,7 @@ static void stonebal_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x03: /* 03 (xxxx) */
+ case 0x03: /* 03 (xxxx) */
if (state->m_prot_input_index == 1)
{
UINT16 x = state->m_prot_save;
@@ -363,7 +363,7 @@ static void stonebal_protection(running_machine &machine)
state->m_prot_input_index = 0;
break;
- case 0x04: /* 04 aaaa */
+ case 0x04: /* 04 aaaa */
if (state->m_prot_input_index == 3)
{
UINT16 a = state->m_prot_input[1] | (state->m_prot_input[2] << 8);
@@ -487,15 +487,15 @@ ADDRESS_MAP_END
static const tms34010_config tms_config =
{
- TRUE, /* halt on reset */
- "screen", /* the screen operated on */
- MASTER_CLOCK_40MHz/6, /* pixel clock */
- 1, /* pixels per clock */
- NULL, /* scanline update (indexed16) */
- artmagic_scanline, /* scanline update (rgb32) */
- m68k_gen_int, /* generate interrupt */
- artmagic_to_shiftreg, /* write to shiftreg function */
- artmagic_from_shiftreg /* read from shiftreg function */
+ TRUE, /* halt on reset */
+ "screen", /* the screen operated on */
+ MASTER_CLOCK_40MHz/6, /* pixel clock */
+ 1, /* pixels per clock */
+ NULL, /* scanline update (indexed16) */
+ artmagic_scanline, /* scanline update (rgb32) */
+ m68k_gen_int, /* generate interrupt */
+ artmagic_to_shiftreg, /* write to shiftreg function */
+ artmagic_from_shiftreg /* read from shiftreg function */
};
@@ -570,21 +570,21 @@ static INPUT_PORTS_START( cheesech )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("300004")
- PORT_DIPUNUSED_DIPLOC( 0x0001, 0x0001, "SWB:8" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x0006, 0x0004, DEF_STR( Language ) ) PORT_DIPLOCATION("SWB:6,7")
+ PORT_DIPUNUSED_DIPLOC( 0x0001, 0x0001, "SWB:8" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x0006, 0x0004, DEF_STR( Language ) ) PORT_DIPLOCATION("SWB:6,7")
PORT_DIPSETTING( 0x0000, DEF_STR( French ) )
PORT_DIPSETTING( 0x0002, DEF_STR( Italian ) )
PORT_DIPSETTING( 0x0004, DEF_STR( English ) )
PORT_DIPSETTING( 0x0006, DEF_STR( German ) )
- PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Lives )) PORT_DIPLOCATION("SWB:4,5")
+ PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Lives )) PORT_DIPLOCATION("SWB:4,5")
PORT_DIPSETTING( 0x0008, "3" )
PORT_DIPSETTING( 0x0018, "4" )
PORT_DIPSETTING( 0x0000, "5" )
PORT_DIPSETTING( 0x0010, "6" )
- PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Demo_Sounds )) PORT_DIPLOCATION("SWB:3")
+ PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Demo_Sounds )) PORT_DIPLOCATION("SWB:3")
PORT_DIPSETTING( 0x0020, DEF_STR( Off ))
PORT_DIPSETTING( 0x0000, DEF_STR( On ))
- PORT_DIPNAME( 0x00c0, 0x0040, DEF_STR( Difficulty )) PORT_DIPLOCATION("SWB:1,2")
+ PORT_DIPNAME( 0x00c0, 0x0040, DEF_STR( Difficulty )) PORT_DIPLOCATION("SWB:1,2")
PORT_DIPSETTING( 0x00c0, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0040, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0080, DEF_STR( Hard ) )
@@ -592,7 +592,7 @@ static INPUT_PORTS_START( cheesech )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("300006")
- PORT_DIPNAME( 0x0007, 0x0007, "Right Coinage" ) PORT_DIPLOCATION("SWA:6,7,8")
+ PORT_DIPNAME( 0x0007, 0x0007, "Right Coinage" ) PORT_DIPLOCATION("SWA:6,7,8")
PORT_DIPSETTING( 0x0002, DEF_STR( 6C_1C ))
PORT_DIPSETTING( 0x0006, DEF_STR( 5C_1C ))
PORT_DIPSETTING( 0x0001, DEF_STR( 4C_1C ))
@@ -601,7 +601,7 @@ static INPUT_PORTS_START( cheesech )
PORT_DIPSETTING( 0x0007, DEF_STR( 1C_1C ))
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_2C ))
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_4C ))
- PORT_DIPNAME( 0x0038, 0x0038, "Left Coinage" ) PORT_DIPLOCATION("SWA:3,4,5")
+ PORT_DIPNAME( 0x0038, 0x0038, "Left Coinage" ) PORT_DIPLOCATION("SWA:3,4,5")
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ))
PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ))
PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ))
@@ -610,7 +610,7 @@ static INPUT_PORTS_START( cheesech )
PORT_DIPSETTING( 0x0008, DEF_STR( 1C_4C ))
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_5C ))
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_6C ))
- PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play )) PORT_DIPLOCATION("SWA:2")
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play )) PORT_DIPLOCATION("SWA:2")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ))
PORT_DIPSETTING( 0x0000, DEF_STR( On ))
PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SWA:1" )
@@ -625,8 +625,8 @@ static INPUT_PORTS_START( cheesech )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("30000a")
- PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, artmagic_state,prot_r, NULL) /* protection data */
- PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* protection ready */
+ PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, artmagic_state,prot_r, NULL) /* protection data */
+ PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* protection ready */
PORT_BIT( 0x00fc, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
@@ -636,16 +636,16 @@ static INPUT_PORTS_START( ultennis )
PORT_INCLUDE(cheesech)
PORT_MODIFY("300004")
- PORT_DIPNAME( 0x0001, 0x0001, "Button Layout" ) PORT_DIPLOCATION("SWB:8")
+ PORT_DIPNAME( 0x0001, 0x0001, "Button Layout" ) PORT_DIPLOCATION("SWB:8")
PORT_DIPSETTING( 0x0001, "Triangular" )
PORT_DIPSETTING( 0x0000, "Linear" )
- PORT_DIPNAME( 0x0002, 0x0002, "Start Set At" ) PORT_DIPLOCATION("SWB:7")
+ PORT_DIPNAME( 0x0002, 0x0002, "Start Set At" ) PORT_DIPLOCATION("SWB:7")
PORT_DIPSETTING( 0x0000, "0-0" )
PORT_DIPSETTING( 0x0002, "4-4" )
- PORT_DIPNAME( 0x0004, 0x0004, "Sets Per Match" ) PORT_DIPLOCATION("SWB:6")
+ PORT_DIPNAME( 0x0004, 0x0004, "Sets Per Match" ) PORT_DIPLOCATION("SWB:6")
PORT_DIPSETTING( 0x0004, "1" )
PORT_DIPSETTING( 0x0000, "3" )
- PORT_DIPNAME( 0x0018, 0x0008, "Game Duratiob" ) PORT_DIPLOCATION("SWB:4,5")
+ PORT_DIPNAME( 0x0018, 0x0008, "Game Duratiob" ) PORT_DIPLOCATION("SWB:4,5")
PORT_DIPSETTING( 0x0018, "5 Lost Points" )
PORT_DIPSETTING( 0x0008, "6 Lost Points" )
PORT_DIPSETTING( 0x0010, "7 Lost Points" )
@@ -658,10 +658,10 @@ static INPUT_PORTS_START( stonebal )
PORT_MODIFY("300004")
PORT_SERVICE_DIPLOC( 0x0001, IP_ACTIVE_LOW, "SWA:1" )
- PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Free_Play )) PORT_DIPLOCATION("SWA:2")
+ PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Free_Play )) PORT_DIPLOCATION("SWA:2")
PORT_DIPSETTING( 0x0002, DEF_STR( Off ))
PORT_DIPSETTING( 0x0000, DEF_STR( On ))
- PORT_DIPNAME( 0x001c, 0x001c, "Left Coinage" ) PORT_DIPLOCATION("SWA:3,4,5")
+ PORT_DIPNAME( 0x001c, 0x001c, "Left Coinage" ) PORT_DIPLOCATION("SWA:3,4,5")
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ))
PORT_DIPSETTING( 0x0004, DEF_STR( 2C_1C ))
PORT_DIPSETTING( 0x001c, DEF_STR( 1C_1C ))
@@ -670,7 +670,7 @@ static INPUT_PORTS_START( stonebal )
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_4C ))
PORT_DIPSETTING( 0x000c, DEF_STR( 1C_5C ))
PORT_DIPSETTING( 0x0008, DEF_STR( 1C_6C ))
- PORT_DIPNAME( 0x00e0, 0x00e0, "Right Coinage" ) PORT_DIPLOCATION("SWA:6,7,8")
+ PORT_DIPNAME( 0x00e0, 0x00e0, "Right Coinage" ) PORT_DIPLOCATION("SWA:6,7,8")
PORT_DIPSETTING( 0x0040, DEF_STR( 6C_1C ))
PORT_DIPSETTING( 0x0060, DEF_STR( 5C_1C ))
PORT_DIPSETTING( 0x0080, DEF_STR( 4C_1C ))
@@ -681,15 +681,15 @@ static INPUT_PORTS_START( stonebal )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_4C ))
PORT_MODIFY("300006")
- PORT_DIPNAME( 0x0003, 0x0002, DEF_STR( Difficulty )) PORT_DIPLOCATION("SWB:1,2")
+ PORT_DIPNAME( 0x0003, 0x0002, DEF_STR( Difficulty )) PORT_DIPLOCATION("SWB:1,2")
PORT_DIPSETTING( 0x0003, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0002, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0001, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Very_Hard ) )
- PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Demo_Sounds )) PORT_DIPLOCATION("SWB:3")
+ PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Demo_Sounds )) PORT_DIPLOCATION("SWB:3")
PORT_DIPSETTING( 0x0004, DEF_STR( Off ))
PORT_DIPSETTING( 0x0000, DEF_STR( On ))
- PORT_DIPNAME( 0x0038, 0x0038, "Match Time" ) PORT_DIPLOCATION("SWB:4,5,6")
+ PORT_DIPNAME( 0x0038, 0x0038, "Match Time" ) PORT_DIPLOCATION("SWB:4,5,6")
PORT_DIPSETTING( 0x0030, "60s" )
PORT_DIPSETTING( 0x0028, "70s" )
PORT_DIPSETTING( 0x0020, "80s" )
@@ -698,10 +698,10 @@ static INPUT_PORTS_START( stonebal )
PORT_DIPSETTING( 0x0010, "110s" )
PORT_DIPSETTING( 0x0008, "120s" )
PORT_DIPSETTING( 0x0000, "130s" )
- PORT_DIPNAME( 0x0040, 0x0040, "Free Match Time" ) PORT_DIPLOCATION("SWB:7")
+ PORT_DIPNAME( 0x0040, 0x0040, "Free Match Time" ) PORT_DIPLOCATION("SWB:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0000, "Short" )
- PORT_DIPNAME( 0x0080, 0x0080, "Game Mode" ) PORT_DIPLOCATION("SWB:8")
+ PORT_DIPNAME( 0x0080, 0x0080, "Game Mode" ) PORT_DIPLOCATION("SWB:8")
PORT_DIPSETTING( 0x0080, "4 Players" )
PORT_DIPSETTING( 0x0000, "2 Players" )
@@ -733,7 +733,7 @@ static INPUT_PORTS_START( stoneba2 )
PORT_INCLUDE(stonebal)
PORT_MODIFY("300006")
- PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SWB:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SWB:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -762,21 +762,21 @@ static INPUT_PORTS_START( shtstar )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("3c0004")
- PORT_DIPUNUSED_DIPLOC( 0x0001, 0x0001, "SWB:8" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x0006, 0x0004, DEF_STR( Language ) ) PORT_DIPLOCATION("SWB:6,7")
+ PORT_DIPUNUSED_DIPLOC( 0x0001, 0x0001, "SWB:8" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x0006, 0x0004, DEF_STR( Language ) ) PORT_DIPLOCATION("SWB:6,7")
PORT_DIPSETTING( 0x0000, DEF_STR( French ) )
PORT_DIPSETTING( 0x0002, DEF_STR( Italian ) )
PORT_DIPSETTING( 0x0004, DEF_STR( English ) )
PORT_DIPSETTING( 0x0006, DEF_STR( German ) )
- PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Lives )) PORT_DIPLOCATION("SWB:4,5")
+ PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Lives )) PORT_DIPLOCATION("SWB:4,5")
PORT_DIPSETTING( 0x0008, "3" )
PORT_DIPSETTING( 0x0018, "4" )
PORT_DIPSETTING( 0x0000, "5" )
PORT_DIPSETTING( 0x0010, "6" )
- PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Demo_Sounds )) PORT_DIPLOCATION("SWB:3")
+ PORT_DIPNAME( 0x0020, 0x0000, DEF_STR( Demo_Sounds )) PORT_DIPLOCATION("SWB:3")
PORT_DIPSETTING( 0x0020, DEF_STR( Off ))
PORT_DIPSETTING( 0x0000, DEF_STR( On ))
- PORT_DIPNAME( 0x00c0, 0x0040, DEF_STR( Difficulty )) PORT_DIPLOCATION("SWB:1,2")
+ PORT_DIPNAME( 0x00c0, 0x0040, DEF_STR( Difficulty )) PORT_DIPLOCATION("SWB:1,2")
PORT_DIPSETTING( 0x00c0, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0040, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0080, DEF_STR( Hard ) )
@@ -784,7 +784,7 @@ static INPUT_PORTS_START( shtstar )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("3c0006")
- PORT_DIPNAME( 0x0007, 0x0007, "Right Coinage" ) PORT_DIPLOCATION("SWA:6,7,8")
+ PORT_DIPNAME( 0x0007, 0x0007, "Right Coinage" ) PORT_DIPLOCATION("SWA:6,7,8")
PORT_DIPSETTING( 0x0002, DEF_STR( 6C_1C ))
PORT_DIPSETTING( 0x0006, DEF_STR( 5C_1C ))
PORT_DIPSETTING( 0x0001, DEF_STR( 4C_1C ))
@@ -793,7 +793,7 @@ static INPUT_PORTS_START( shtstar )
PORT_DIPSETTING( 0x0007, DEF_STR( 1C_1C ))
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_2C ))
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_4C ))
- PORT_DIPNAME( 0x0038, 0x0038, "Left Coinage" ) PORT_DIPLOCATION("SWA:3,4,5")
+ PORT_DIPNAME( 0x0038, 0x0038, "Left Coinage" ) PORT_DIPLOCATION("SWA:3,4,5")
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ))
PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ))
PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ))
@@ -802,7 +802,7 @@ static INPUT_PORTS_START( shtstar )
PORT_DIPSETTING( 0x0008, DEF_STR( 1C_4C ))
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_5C ))
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_6C ))
- PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play )) PORT_DIPLOCATION("SWA:2")
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play )) PORT_DIPLOCATION("SWA:2")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ))
PORT_DIPSETTING( 0x0000, DEF_STR( On ))
PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SWA:1" )
@@ -817,8 +817,8 @@ static INPUT_PORTS_START( shtstar )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("3c000a")
- PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, artmagic_state,prot_r, NULL) /* protection data */
- PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* protection ready */
+ PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, artmagic_state,prot_r, NULL) /* protection data */
+ PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* protection ready */
PORT_BIT( 0x00fc, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
@@ -905,7 +905,7 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( cheesech )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
ROM_LOAD16_BYTE( "u102", 0x00000, 0x40000, CRC(1d6e07c5) SHA1(8650868cce47f685d22131aa28aad45033cb0a52) )
ROM_LOAD16_BYTE( "u101", 0x00001, 0x40000, CRC(30ae9f95) SHA1(fede5d271aabb654c1efc077253d81ba23786f22) )
@@ -919,7 +919,7 @@ ROM_END
ROM_START( ultennis )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
ROM_LOAD16_BYTE( "utu102.bin", 0x00000, 0x40000, CRC(ec31385e) SHA1(244e78619c549712d5541fb252656afeba639bb7) )
ROM_LOAD16_BYTE( "utu101.bin", 0x00001, 0x40000, CRC(08a7f655) SHA1(b8a4265472360b68bed71d6c175fc54dff088c1d) )
@@ -932,7 +932,7 @@ ROM_END
ROM_START( ultennisj )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
ROM_LOAD16_BYTE( "a&m001d0194-13c-u102-japan.u102", 0x00000, 0x40000, CRC(65cee452) SHA1(49259e8faf289d6d80769f6d44e9d61d15e431c6) )
ROM_LOAD16_BYTE( "a&m001d0194-12c-u101-japan.u101", 0x00001, 0x40000, CRC(5f4b0ca0) SHA1(57e9ed60cc0e53eeb4e08c4003138d3bdaec3de7) )
@@ -985,7 +985,7 @@ u1601.bin 32M Mask 8642h / Gfx
*/
ROM_START( stonebal )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
ROM_LOAD16_BYTE( "u102", 0x00000, 0x40000, CRC(712feda1) SHA1(c5b385f425786566fa274fe166a7116615a8ce86) )
ROM_LOAD16_BYTE( "u101", 0x00001, 0x40000, CRC(4f1656a9) SHA1(720717ae4166b3ec50bb572197a8c6c96b284648) )
@@ -999,7 +999,7 @@ ROM_END
ROM_START( stonebal2 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for 68000 code */
ROM_LOAD16_BYTE( "u102.bin", 0x00000, 0x40000, CRC(b3c4f64f) SHA1(6327e9f3cd9deb871a6910cf1f006c8ee143e859) )
ROM_LOAD16_BYTE( "u101.bin", 0x00001, 0x40000, CRC(fe373f74) SHA1(bafac4bbd1aae4ccc4ae16205309483f1bbdd464) )
@@ -1178,7 +1178,7 @@ DRIVER_INIT_MEMBER(artmagic_state,cheesech)
DRIVER_INIT_MEMBER(artmagic_state,stonebal)
{
decrypt_ultennis(machine());
- m_is_stoneball = 1; /* blits 1 line high are NOT encrypted, also different first pixel decrypt */
+ m_is_stoneball = 1; /* blits 1 line high are NOT encrypted, also different first pixel decrypt */
m_protection_handler = stonebal_protection;
}
@@ -1204,5 +1204,3 @@ GAME( 1994, cheesech, 0, cheesech, cheesech, artmagic_state, cheesech, RO
GAME( 1994, stonebal, 0, stonebal, stonebal, artmagic_state, stonebal, ROT0, "Art & Magic", "Stone Ball (4 Players)", GAME_SUPPORTS_SAVE )
GAME( 1994, stonebal2,stonebal, stonebal, stoneba2, artmagic_state, stonebal, ROT0, "Art & Magic", "Stone Ball (2 Players)", GAME_SUPPORTS_SAVE )
GAME( 1994, shtstar, 0, shtstar, shtstar, artmagic_state, shtstar, ROT0, "Nova", "Shooting Star", GAME_NOT_WORKING )
-
-
diff --git a/src/mame/drivers/ashnojoe.c b/src/mame/drivers/ashnojoe.c
index b6d6174a7a5..6ddee78660f 100644
--- a/src/mame/drivers/ashnojoe.c
+++ b/src/mame/drivers/ashnojoe.c
@@ -82,7 +82,7 @@ Coin B is not used
READ16_MEMBER(ashnojoe_state::fake_4a00a_r)
{
/* If it returns 1 there's no sound. Is it used to sync the game and sound?
- or just a debug enable/disable register? */
+ or just a debug enable/disable register? */
return 0;
}
@@ -110,7 +110,7 @@ static ADDRESS_MAP_START( ashnojoe_map, AS_PROGRAM, 16, ashnojoe_state )
AM_RANGE(0x04a004, 0x04a005) AM_READ_PORT("DSW")
AM_RANGE(0x04a006, 0x04a007) AM_WRITEONLY AM_SHARE("tilemap_reg")
AM_RANGE(0x04a008, 0x04a009) AM_WRITE(ashnojoe_soundlatch_w)
- AM_RANGE(0x04a00a, 0x04a00b) AM_READ(fake_4a00a_r) // ??
+ AM_RANGE(0x04a00a, 0x04a00b) AM_READ(fake_4a00a_r) // ??
AM_RANGE(0x04a010, 0x04a019) AM_WRITE(joe_tilemaps_xscroll_w)
AM_RANGE(0x04a020, 0x04a029) AM_WRITE(joe_tilemaps_yscroll_w)
AM_RANGE(0x04c000, 0x04ffff) AM_RAM
@@ -255,9 +255,9 @@ static const gfx_layout tiles16x16_layout =
4,
{ 0, 1, 2, 3 },
{ 0, 4, 8, 12, 16, 20, 24, 28,
- 32,36,40, 44, 48, 52, 56, 60 },
+ 32,36,40, 44, 48, 52, 56, 60 },
{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
- 8*64, 9*64,10*64,11*64,12*64,13*64,14*64,15*64 },
+ 8*64, 9*64,10*64,11*64,12*64,13*64,14*64,15*64 },
16*64
};
diff --git a/src/mame/drivers/asterix.c b/src/mame/drivers/asterix.c
index 06d2b71f96b..1690926babc 100644
--- a/src/mame/drivers/asterix.c
+++ b/src/mame/drivers/asterix.c
@@ -21,10 +21,10 @@ colour, including the word "Konami"
static const eeprom_interface eeprom_intf =
{
- 7, /* address bits */
- 8, /* data bits */
- "111000", /* read command */
- "111100", /* write command */
+ 7, /* address bits */
+ 8, /* data bits */
+ "111000", /* read command */
+ "111100", /* write command */
"1100100000000",/* erase command */
"1100000000000",/* lock command */
"1100110000000" /* unlock command */
@@ -171,7 +171,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, asterix_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x100000, 0x107fff) AM_RAM
AM_RANGE(0x180000, 0x1807ff) AM_DEVREADWRITE_LEGACY("k053244", k053245_word_r, k053245_word_w)
- AM_RANGE(0x180800, 0x180fff) AM_RAM // extra RAM, or mirror for the above?
+ AM_RANGE(0x180800, 0x180fff) AM_RAM // extra RAM, or mirror for the above?
AM_RANGE(0x200000, 0x20000f) AM_DEVREADWRITE_LEGACY("k053244", k053244_word_r, k053244_word_w)
AM_RANGE(0x280000, 0x280fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_word_w) AM_SHARE("paletteram")
AM_RANGE(0x300000, 0x30001f) AM_DEVREADWRITE_LEGACY("k053244", k053244_lsb_r, k053244_lsb_w)
@@ -182,11 +182,11 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, asterix_state )
AM_RANGE(0x380300, 0x380301) AM_WRITE(sound_irq_w)
AM_RANGE(0x380400, 0x380401) AM_WRITE(asterix_spritebank_w)
AM_RANGE(0x380500, 0x38051f) AM_DEVWRITE_LEGACY("k053251", k053251_lsb_w)
- AM_RANGE(0x380600, 0x380601) AM_NOP // Watchdog
+ AM_RANGE(0x380600, 0x380601) AM_NOP // Watchdog
AM_RANGE(0x380700, 0x380707) AM_DEVWRITE_LEGACY("k056832", k056832_b_word_w)
AM_RANGE(0x380800, 0x380803) AM_WRITE(protection_w)
AM_RANGE(0x400000, 0x400fff) AM_DEVREADWRITE_LEGACY("k056832", k056832_ram_half_word_r, k056832_ram_half_word_w)
- AM_RANGE(0x420000, 0x421fff) AM_DEVREAD_LEGACY("k056832", k056832_old_rom_word_r) // Passthrough to tile roms
+ AM_RANGE(0x420000, 0x421fff) AM_DEVREAD_LEGACY("k056832", k056832_old_rom_word_r) // Passthrough to tile roms
AM_RANGE(0x440000, 0x44003f) AM_DEVWRITE_LEGACY("k056832", k056832_word_w)
ADDRESS_MAP_END
@@ -212,7 +212,7 @@ static INPUT_PORTS_START( asterix )
PORT_START("IN1")
KONAMI16_LSB(2, IPT_UNKNOWN, IPT_START2)
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
- PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNUSED ) // EEPROM ready (always 1)
+ PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNUSED ) // EEPROM ready (always 1)
PORT_SERVICE_NO_TOGGLE(0x0400, IP_ACTIVE_LOW )
PORT_BIT( 0xf800, IP_ACTIVE_HIGH, IPT_UNKNOWN )
diff --git a/src/mame/drivers/asteroid.c b/src/mame/drivers/asteroid.c
index 85e747cc6c8..f351f4ab360 100644
--- a/src/mame/drivers/asteroid.c
+++ b/src/mame/drivers/asteroid.c
@@ -240,9 +240,9 @@ static ADDRESS_MAP_START( asteroid_map, AS_PROGRAM, 8, asteroid_state )
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_SHARE("ram1")
AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_SHARE("ram2")
- AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
- AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
- AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
+ AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
+ AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
+ AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
AM_RANGE(0x3000, 0x3000) AM_WRITE_LEGACY(avgdvg_go_w)
AM_RANGE(0x3200, 0x3200) AM_WRITE(asteroid_bank_switch_w)
AM_RANGE(0x3400, 0x3400) AM_WRITE(watchdog_reset_w)
@@ -251,7 +251,7 @@ static ADDRESS_MAP_START( asteroid_map, AS_PROGRAM, 8, asteroid_state )
AM_RANGE(0x3c00, 0x3c05) AM_WRITE(asteroid_sounds_w)
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(asteroid_noise_reset_w)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_SHARE("vectorram") AM_REGION("maincpu", 0x4000)
- AM_RANGE(0x5000, 0x57ff) AM_ROM /* vector rom */
+ AM_RANGE(0x5000, 0x57ff) AM_ROM /* vector rom */
AM_RANGE(0x6800, 0x7fff) AM_ROM
ADDRESS_MAP_END
@@ -261,9 +261,9 @@ static ADDRESS_MAP_START( astdelux_map, AS_PROGRAM, 8, asteroid_state )
AM_RANGE(0x0000, 0x01ff) AM_RAM
AM_RANGE(0x0200, 0x02ff) AM_RAMBANK("bank1") AM_SHARE("ram1")
AM_RANGE(0x0300, 0x03ff) AM_RAMBANK("bank2") AM_SHARE("ram2")
- AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
- AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
- AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
+ AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
+ AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
+ AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
AM_RANGE(0x2c00, 0x2c0f) AM_DEVREADWRITE("pokey", pokey_device, read, write)
AM_RANGE(0x2c40, 0x2c7f) AM_DEVREAD("earom", atari_vg_earom_device, read)
AM_RANGE(0x3000, 0x3000) AM_WRITE_LEGACY(avgdvg_go_w)
@@ -277,7 +277,7 @@ static ADDRESS_MAP_START( astdelux_map, AS_PROGRAM, 8, asteroid_state )
AM_RANGE(0x3c05, 0x3c07) AM_WRITE(astdelux_coin_counter_w)
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(asteroid_noise_reset_w)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_SHARE("vectorram") AM_REGION("maincpu", 0x4000)
- AM_RANGE(0x4800, 0x57ff) AM_ROM /* vector rom */
+ AM_RANGE(0x4800, 0x57ff) AM_ROM /* vector rom */
AM_RANGE(0x6000, 0x7fff) AM_ROM
ADDRESS_MAP_END
@@ -286,8 +286,8 @@ static ADDRESS_MAP_START( llander_map, AS_PROGRAM, 8, asteroid_state )
ADDRESS_MAP_GLOBAL_MASK(0x7fff)
AM_RANGE(0x0000, 0x00ff) AM_RAM AM_MIRROR(0x1f00)
AM_RANGE(0x2000, 0x2000) AM_READ_PORT("IN0")
- AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
- AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
+ AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
+ AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
AM_RANGE(0x2c00, 0x2c00) AM_READ_PORT("THRUST")
AM_RANGE(0x3000, 0x3000) AM_WRITE_LEGACY(avgdvg_go_w)
AM_RANGE(0x3200, 0x3200) AM_WRITE(llander_led_w)
@@ -295,7 +295,7 @@ static ADDRESS_MAP_START( llander_map, AS_PROGRAM, 8, asteroid_state )
AM_RANGE(0x3c00, 0x3c00) AM_WRITE(llander_sounds_w)
AM_RANGE(0x3e00, 0x3e00) AM_WRITE(llander_snd_reset_w)
AM_RANGE(0x4000, 0x47ff) AM_RAM AM_SHARE("vectorram") AM_REGION("maincpu", 0x4000)
- AM_RANGE(0x4800, 0x5fff) AM_ROM /* vector rom */
+ AM_RANGE(0x4800, 0x5fff) AM_ROM /* vector rom */
AM_RANGE(0x6000, 0x7fff) AM_ROM
ADDRESS_MAP_END
@@ -318,8 +318,8 @@ static INPUT_PORTS_START( asteroid )
/* Bit 2 is the 3 KHz source and Bit 3 the VG_HALT bit */
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, asteroid_state,clock_r, NULL)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL)
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_TILT )
PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
@@ -330,32 +330,32 @@ static INPUT_PORTS_START( asteroid )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START2 )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) /* thrust */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) /* thrust */
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(KEYCODE_RIGHT) PORT_CODE(JOYCODE_X_RIGHT_SWITCH)/* right */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH) /* left */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH) /* left */
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:1,2")
- PORT_DIPSETTING ( 0x00, DEF_STR( English ) )
- PORT_DIPSETTING ( 0x01, DEF_STR( German ) )
- PORT_DIPSETTING ( 0x02, DEF_STR( French ) )
- PORT_DIPSETTING ( 0x03, DEF_STR( Spanish ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW:3")
- PORT_DIPSETTING ( 0x04, "3" )
- PORT_DIPSETTING ( 0x00, "4" )
- PORT_DIPNAME( 0x08, 0x00, "Center Mech" ) PORT_DIPLOCATION("SW:4") /* Left/Center for 3-door mech */
- PORT_DIPSETTING ( 0x00, "X 1" )
- PORT_DIPSETTING ( 0x08, "X 2" )
- PORT_DIPNAME( 0x30, 0x00, "Right Mech" ) PORT_DIPLOCATION("SW:5,6")
- PORT_DIPSETTING ( 0x00, "X 1" )
- PORT_DIPSETTING ( 0x10, "X 4" )
- PORT_DIPSETTING ( 0x20, "X 5" )
- PORT_DIPSETTING ( 0x30, "X 6" )
- PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:7,8")
- PORT_DIPSETTING ( 0xc0, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING ( 0x80, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING ( 0x40, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING ( 0x00, DEF_STR( Free_Play ) )
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:1,2")
+ PORT_DIPSETTING ( 0x00, DEF_STR( English ) )
+ PORT_DIPSETTING ( 0x01, DEF_STR( German ) )
+ PORT_DIPSETTING ( 0x02, DEF_STR( French ) )
+ PORT_DIPSETTING ( 0x03, DEF_STR( Spanish ) )
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW:3")
+ PORT_DIPSETTING ( 0x04, "3" )
+ PORT_DIPSETTING ( 0x00, "4" )
+ PORT_DIPNAME( 0x08, 0x00, "Center Mech" ) PORT_DIPLOCATION("SW:4") /* Left/Center for 3-door mech */
+ PORT_DIPSETTING ( 0x00, "X 1" )
+ PORT_DIPSETTING ( 0x08, "X 2" )
+ PORT_DIPNAME( 0x30, 0x00, "Right Mech" ) PORT_DIPLOCATION("SW:5,6")
+ PORT_DIPSETTING ( 0x00, "X 1" )
+ PORT_DIPSETTING ( 0x10, "X 4" )
+ PORT_DIPSETTING ( 0x20, "X 5" )
+ PORT_DIPSETTING ( 0x30, "X 6" )
+ PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:7,8")
+ PORT_DIPSETTING ( 0xc0, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING ( 0x80, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING ( 0x40, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING ( 0x00, DEF_STR( Free_Play ) )
INPUT_PORTS_END
@@ -363,8 +363,8 @@ static INPUT_PORTS_START( asteroidb )
PORT_INCLUDE( asteroid )
PORT_MODIFY("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* resets */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* resets */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* resets */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* resets */
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -376,9 +376,9 @@ static INPUT_PORTS_START( asteroidb )
PORT_MODIFY("IN1")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) /* thrust */
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) /* thrust */
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
PORT_MODIFY("DSW1")
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW:4" )
@@ -387,7 +387,7 @@ static INPUT_PORTS_START( asteroidb )
PORT_START("HS") /* hyperspace */
PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
INPUT_PORTS_END
@@ -399,37 +399,37 @@ static INPUT_PORTS_START( asterock )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, asteroid_state,clock_r, NULL)
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1)
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( French ) )
PORT_DIPSETTING( 0x02, DEF_STR( German ) )
PORT_DIPSETTING( 0x03, DEF_STR( Italian ) )
- PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW:3,4")
+ PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW:3,4")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x0c, "5" )
- PORT_DIPNAME( 0x10, 0x00, "Records Table" ) PORT_DIPLOCATION("SW:5")
+ PORT_DIPNAME( 0x10, 0x00, "Records Table" ) PORT_DIPLOCATION("SW:5")
PORT_DIPSETTING( 0x00, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x10, "Special" )
- PORT_DIPNAME( 0x20, 0x00, "Coin Mode" ) PORT_DIPLOCATION("SW:6")
- PORT_DIPSETTING ( 0x00, DEF_STR( Normal ) )
- PORT_DIPSETTING ( 0x20, "Special" )
- PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:7,8")
- PORT_DIPSETTING ( 0xc0, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1",0x20,EQUALS,0x00)
- PORT_DIPSETTING ( 0x80, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1",0x20,EQUALS,0x00)
- PORT_DIPSETTING ( 0x40, DEF_STR( 1C_2C ) ) PORT_CONDITION("DSW1",0x20,EQUALS,0x00)
+ PORT_DIPNAME( 0x20, 0x00, "Coin Mode" ) PORT_DIPLOCATION("SW:6")
+ PORT_DIPSETTING ( 0x00, DEF_STR( Normal ) )
+ PORT_DIPSETTING ( 0x20, "Special" )
+ PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:7,8")
+ PORT_DIPSETTING ( 0xc0, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW1",0x20,EQUALS,0x00)
+ PORT_DIPSETTING ( 0x80, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1",0x20,EQUALS,0x00)
+ PORT_DIPSETTING ( 0x40, DEF_STR( 1C_2C ) ) PORT_CONDITION("DSW1",0x20,EQUALS,0x00)
// PORT_DIPSETTING ( 0x00, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW1",0x20,EQUALS,0x00)
- PORT_DIPSETTING ( 0xc0, "Coin A 2/1 Coin B 2/1 Coin C 1/1" ) PORT_CONDITION("DSW1",0x20,NOTEQUALS,0x00)
- PORT_DIPSETTING ( 0x80, "Coin A 1/1 Coin B 1/1 Coin C 1/2" ) PORT_CONDITION("DSW1",0x20,NOTEQUALS,0x00)
- PORT_DIPSETTING ( 0x40, "Coin A 1/2 Coin B 1/2 Coin C 1/4" ) PORT_CONDITION("DSW1",0x20,NOTEQUALS,0x00)
+ PORT_DIPSETTING ( 0xc0, "Coin A 2/1 Coin B 2/1 Coin C 1/1" ) PORT_CONDITION("DSW1",0x20,NOTEQUALS,0x00)
+ PORT_DIPSETTING ( 0x80, "Coin A 1/1 Coin B 1/1 Coin C 1/2" ) PORT_CONDITION("DSW1",0x20,NOTEQUALS,0x00)
+ PORT_DIPSETTING ( 0x40, "Coin A 1/2 Coin B 1/2 Coin C 1/4" ) PORT_CONDITION("DSW1",0x20,NOTEQUALS,0x00)
// PORT_DIPSETTING ( 0x00, "Coin A 1/1 Coin B 1/1 Coin C 1/2" ) PORT_CONDITION("DSW1",0x20,NOTEQUALS,0x00)
INPUT_PORTS_END
@@ -440,8 +440,8 @@ static INPUT_PORTS_START( astdelux )
/* Bit 2 is the 3 KHz source and Bit 3 the VG_HALT bit */
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, asteroid_state,clock_r, NULL)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(avgdvg_done_r, NULL)
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_CODE(KEYCODE_SPACE) PORT_CODE(JOYCODE_BUTTON3) /* hyperspace */
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1) /* fire */
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_TILT )
PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
@@ -452,63 +452,63 @@ static INPUT_PORTS_START( astdelux )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) /* Coin Right */
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START2 )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) /* thrust */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_CODE(KEYCODE_LALT) PORT_CODE(JOYCODE_BUTTON2) /* thrust */
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(KEYCODE_RIGHT) PORT_CODE(JOYCODE_X_RIGHT_SWITCH)/* right */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH) /* left */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH) /* left */
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("R5:1,2")
- PORT_DIPSETTING ( 0x00, DEF_STR( English ) )
- PORT_DIPSETTING ( 0x01, DEF_STR( German ) )
- PORT_DIPSETTING ( 0x02, DEF_STR( French ) )
- PORT_DIPSETTING ( 0x03, DEF_STR( Spanish ) )
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("R5:1,2")
+ PORT_DIPSETTING ( 0x00, DEF_STR( English ) )
+ PORT_DIPSETTING ( 0x01, DEF_STR( German ) )
+ PORT_DIPSETTING ( 0x02, DEF_STR( French ) )
+ PORT_DIPSETTING ( 0x03, DEF_STR( Spanish ) )
/* Default lives is 2,3,4,5. Values incremented by 1 if Bonus Life set to None or Coinage set to 2C_1C.
- Incremented by 2 if both are set at the same time. PORT_CONDITION() can only test for 1 switch at a time. */
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("R5:3,4") /* Default is 2 or 3 depending on manual version */
- PORT_DIPSETTING ( 0x00, "2-4" )
- PORT_DIPSETTING ( 0x04, "3-5" )
- PORT_DIPSETTING ( 0x08, "4-6" )
- PORT_DIPSETTING ( 0x0c, "5-7" )
- PORT_DIPNAME( 0x10, 0x00, "Minimum Plays" ) PORT_DIPLOCATION("R5:5")
- PORT_DIPSETTING ( 0x00, "1" )
- PORT_DIPSETTING ( 0x10, "2" )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("R5:6") /* Listed as "Unused" */
- PORT_DIPSETTING ( 0x00, DEF_STR( Hard ) )
- PORT_DIPSETTING ( 0x20, DEF_STR( Easy ) )
- PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("R5:7,8")
- PORT_DIPSETTING ( 0x00, "10000" )
- PORT_DIPSETTING ( 0x40, "12000" )
- PORT_DIPSETTING ( 0x80, "15000" )
- PORT_DIPSETTING ( 0xc0, DEF_STR( None ) )
+ Incremented by 2 if both are set at the same time. PORT_CONDITION() can only test for 1 switch at a time. */
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("R5:3,4") /* Default is 2 or 3 depending on manual version */
+ PORT_DIPSETTING ( 0x00, "2-4" )
+ PORT_DIPSETTING ( 0x04, "3-5" )
+ PORT_DIPSETTING ( 0x08, "4-6" )
+ PORT_DIPSETTING ( 0x0c, "5-7" )
+ PORT_DIPNAME( 0x10, 0x00, "Minimum Plays" ) PORT_DIPLOCATION("R5:5")
+ PORT_DIPSETTING ( 0x00, "1" )
+ PORT_DIPSETTING ( 0x10, "2" )
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("R5:6") /* Listed as "Unused" */
+ PORT_DIPSETTING ( 0x00, DEF_STR( Hard ) )
+ PORT_DIPSETTING ( 0x20, DEF_STR( Easy ) )
+ PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("R5:7,8")
+ PORT_DIPSETTING ( 0x00, "10000" )
+ PORT_DIPSETTING ( 0x40, "12000" )
+ PORT_DIPSETTING ( 0x80, "15000" )
+ PORT_DIPSETTING ( 0xc0, DEF_STR( None ) )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("L8:1,2")
- PORT_DIPSETTING ( 0x00, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING ( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING ( 0x02, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING ( 0x03, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0c, 0x0c, "Right Coin" ) PORT_DIPLOCATION("L8:3,4")
- PORT_DIPSETTING ( 0x00, "X 6" )
- PORT_DIPSETTING ( 0x04, "X 5" )
- PORT_DIPSETTING ( 0x08, "X 4" )
- PORT_DIPSETTING ( 0x0c, "X 1" )
- PORT_DIPNAME( 0x10, 0x10, "Center Coin" ) PORT_DIPLOCATION("L8:5") /* "Left Coin" in a 2-mech door */
- PORT_DIPSETTING ( 0x00, "X 2" )
- PORT_DIPSETTING ( 0x10, "X 1" )
- PORT_DIPNAME( 0xe0, 0xe0, "Bonus Coins" ) PORT_DIPLOCATION("L8:6,7,8")
- PORT_DIPSETTING ( 0x60, "1 Coin Each 5 Coins" )
- PORT_DIPSETTING ( 0x80, "2 Coins Each 4 Coins" )
- PORT_DIPSETTING ( 0xa0, "1 Coin Each 4 Coins" )
- PORT_DIPSETTING ( 0xc0, "1 Coin Each 2 Coins" )
- PORT_DIPSETTING ( 0xe0, DEF_STR( None ) )
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("L8:1,2")
+ PORT_DIPSETTING ( 0x00, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING ( 0x01, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING ( 0x02, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING ( 0x03, DEF_STR( Free_Play ) )
+ PORT_DIPNAME( 0x0c, 0x0c, "Right Coin" ) PORT_DIPLOCATION("L8:3,4")
+ PORT_DIPSETTING ( 0x00, "X 6" )
+ PORT_DIPSETTING ( 0x04, "X 5" )
+ PORT_DIPSETTING ( 0x08, "X 4" )
+ PORT_DIPSETTING ( 0x0c, "X 1" )
+ PORT_DIPNAME( 0x10, 0x10, "Center Coin" ) PORT_DIPLOCATION("L8:5") /* "Left Coin" in a 2-mech door */
+ PORT_DIPSETTING ( 0x00, "X 2" )
+ PORT_DIPSETTING ( 0x10, "X 1" )
+ PORT_DIPNAME( 0xe0, 0xe0, "Bonus Coins" ) PORT_DIPLOCATION("L8:6,7,8")
+ PORT_DIPSETTING ( 0x60, "1 Coin Each 5 Coins" )
+ PORT_DIPSETTING ( 0x80, "2 Coins Each 4 Coins" )
+ PORT_DIPSETTING ( 0xa0, "1 Coin Each 4 Coins" )
+ PORT_DIPSETTING ( 0xc0, "1 Coin Each 2 Coins" )
+ PORT_DIPSETTING ( 0xe0, DEF_STR( None ) )
/* The manual includes a 3rd DIP controlling the number & configuration of coin counters, defined as: */
#if 0
PORT_START("DSW3") // 4-Toggle switch located on game PCB at M12
PORT_DIPNAME( 0x03, 0x00, "Coin Counters" ) PORT_DIPLOCATION("M12:1,2")
PORT_DIPSETTING ( 0x00, "1=Left, Center & Right" ) // "For games having these coin doors: Thai 1Baht/1Baht, German 1DM/1DM, US 25c/25c,
- // Belgian or French 5Fr/5Fr, Swiss or French 1Fr/1Fr, US 25c/25c/25c,
- // Japanese 100Y/100Y, Swedish 1Kr/1Kr, UK 10P/10P, Australian 20c/20c, or Italian 100L/100L."
+ // Belgian or French 5Fr/5Fr, Swiss or French 1Fr/1Fr, US 25c/25c/25c,
+ // Japanese 100Y/100Y, Swedish 1Kr/1Kr, UK 10P/10P, Australian 20c/20c, or Italian 100L/100L."
PORT_DIPSETTING ( 0x01, "1=Left & Center, 2=Right" ) // "For games having these coin doors: German 2DM/1DM, German 1DM/5DM, US 25c/25c/1$, or US 25c/1$."
PORT_DIPSETTING ( 0x02, "1=Left, 2=Center & Right" ) // "No coin door is currently designed for this configuration."
PORT_DIPSETTING ( 0x03, "1=Left, 2=Center, 3=Right" ) // "For games having these coin doors: German 1DM/2DM/5DM."
@@ -536,32 +536,32 @@ static INPUT_PORTS_START( llander )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START2 ) PORT_NAME("Select Game")
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Abort")
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(KEYCODE_RIGHT) PORT_CODE(JOYCODE_X_RIGHT_SWITCH) /* right */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH) /* left */
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(KEYCODE_RIGHT) PORT_CODE(JOYCODE_X_RIGHT_SWITCH) /* right */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH) /* left */
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, "Right Coin" ) PORT_DIPLOCATION("P8:1,2") /* "Left Coin Mech always registers X 1" */
- PORT_DIPSETTING ( 0x00, "X 1" )
- PORT_DIPSETTING ( 0x01, "X 4" )
- PORT_DIPSETTING ( 0x02, "X 5" )
- PORT_DIPSETTING ( 0x03, "X 6" )
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("P8:3,4")
- PORT_DIPSETTING ( 0x00, DEF_STR( English ) )
- PORT_DIPSETTING ( 0x04, DEF_STR( French ) )
- PORT_DIPSETTING ( 0x08, DEF_STR( Spanish ) )
- PORT_DIPSETTING ( 0x0c, DEF_STR( German ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("P8:6")
- PORT_DIPSETTING ( 0x00, DEF_STR( Normal ) )
- PORT_DIPSETTING ( 0x20, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0xd0, 0x80, "Fuel Units Per Coin" ) PORT_DIPLOCATION("P8:5,7,8")
- PORT_DIPSETTING ( 0x00, "450" )
- PORT_DIPSETTING ( 0x40, "600" )
- PORT_DIPSETTING ( 0x80, "750" )
- PORT_DIPSETTING ( 0xc0, "900" )
- PORT_DIPSETTING ( 0x10, "1100" )
- PORT_DIPSETTING ( 0x50, "1300" )
- PORT_DIPSETTING ( 0x90, "1550" )
- PORT_DIPSETTING ( 0xd0, "1800" )
+ PORT_DIPNAME( 0x03, 0x00, "Right Coin" ) PORT_DIPLOCATION("P8:1,2") /* "Left Coin Mech always registers X 1" */
+ PORT_DIPSETTING ( 0x00, "X 1" )
+ PORT_DIPSETTING ( 0x01, "X 4" )
+ PORT_DIPSETTING ( 0x02, "X 5" )
+ PORT_DIPSETTING ( 0x03, "X 6" )
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("P8:3,4")
+ PORT_DIPSETTING ( 0x00, DEF_STR( English ) )
+ PORT_DIPSETTING ( 0x04, DEF_STR( French ) )
+ PORT_DIPSETTING ( 0x08, DEF_STR( Spanish ) )
+ PORT_DIPSETTING ( 0x0c, DEF_STR( German ) )
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("P8:6")
+ PORT_DIPSETTING ( 0x00, DEF_STR( Normal ) )
+ PORT_DIPSETTING ( 0x20, DEF_STR( Free_Play ) )
+ PORT_DIPNAME( 0xd0, 0x80, "Fuel Units Per Coin" ) PORT_DIPLOCATION("P8:5,7,8")
+ PORT_DIPSETTING ( 0x00, "450" )
+ PORT_DIPSETTING ( 0x40, "600" )
+ PORT_DIPSETTING ( 0x80, "750" )
+ PORT_DIPSETTING ( 0xc0, "900" )
+ PORT_DIPSETTING ( 0x10, "1100" )
+ PORT_DIPSETTING ( 0x50, "1300" )
+ PORT_DIPSETTING ( 0x90, "1550" )
+ PORT_DIPSETTING ( 0xd0, "1800" )
/* The next one is a potentiometer */
/* The way the DAC/counter circuit always tries to self center at the voltage derived from the thrust control, */
@@ -578,15 +578,15 @@ static INPUT_PORTS_START( llander1 )
PORT_INCLUDE( llander )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("P8:5") /* "Left Coin Mech always registers X 1" */
- PORT_DIPSETTING ( 0x00, DEF_STR( Normal ) )
- PORT_DIPSETTING ( 0x10, DEF_STR( Free_Play ) )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "P8:6" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0xc0, 0x80, "Fuel units" ) PORT_DIPLOCATION("P8:7,8")
- PORT_DIPSETTING ( 0x00, "450" )
- PORT_DIPSETTING ( 0x40, "600" )
- PORT_DIPSETTING ( 0x80, "750" )
- PORT_DIPSETTING ( 0xc0, "900" )
+ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("P8:5") /* "Left Coin Mech always registers X 1" */
+ PORT_DIPSETTING ( 0x00, DEF_STR( Normal ) )
+ PORT_DIPSETTING ( 0x10, DEF_STR( Free_Play ) )
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "P8:6" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0xc0, 0x80, "Fuel units" ) PORT_DIPLOCATION("P8:7,8")
+ PORT_DIPSETTING ( 0x00, "450" )
+ PORT_DIPSETTING ( 0x40, "600" )
+ PORT_DIPSETTING ( 0x80, "750" )
+ PORT_DIPSETTING ( 0xc0, "900" )
INPUT_PORTS_END
@@ -807,7 +807,7 @@ ROM_START( meteorho )
/* DVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "prom.bin", 0x0000, 0x0100, CRC(9e237193) SHA1(f663e12d5db0fa50ea49d03591475ae0a7168bc0) )
+ ROM_LOAD( "prom.bin", 0x0000, 0x0100, CRC(9e237193) SHA1(f663e12d5db0fa50ea49d03591475ae0a7168bc0) )
ROM_END
ROM_START( hyperspc )
diff --git a/src/mame/drivers/astinvad.c b/src/mame/drivers/astinvad.c
index b33bc1c9e2e..fc6616cb1b0 100644
--- a/src/mame/drivers/astinvad.c
+++ b/src/mame/drivers/astinvad.c
@@ -100,22 +100,22 @@ public:
static I8255A_INTERFACE( ppi8255_0_intf )
{
- DEVCB_INPUT_PORT("IN0"), /* Port A read */
- DEVCB_NULL, /* Port A write */
- DEVCB_INPUT_PORT("IN1"), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_INPUT_PORT("IN2"), /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_INPUT_PORT("IN0"), /* Port A read */
+ DEVCB_NULL, /* Port A write */
+ DEVCB_INPUT_PORT("IN1"), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_INPUT_PORT("IN2"), /* Port C read */
+ DEVCB_NULL /* Port C write */
};
static I8255A_INTERFACE( ppi8255_1_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(astinvad_state,astinvad_sound1_w), /* Port A write */
- DEVCB_INPUT_PORT("CABINET"), /* Port B read */
- DEVCB_DRIVER_MEMBER(astinvad_state,astinvad_sound2_w), /* Port B write */
- DEVCB_NULL, /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(astinvad_state,astinvad_sound1_w), /* Port A write */
+ DEVCB_INPUT_PORT("CABINET"), /* Port B read */
+ DEVCB_DRIVER_MEMBER(astinvad_state,astinvad_sound2_w), /* Port B write */
+ DEVCB_NULL, /* Port C read */
+ DEVCB_NULL /* Port C write */
};
@@ -717,26 +717,26 @@ ROM_END
ROM_START( spaceint )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "1", 0x0000, 0x0400, CRC(184314d2) SHA1(76789780c46e19c73904b229d23c865819915558) )
- ROM_LOAD( "2", 0x0400, 0x0400, CRC(55459aa1) SHA1(5631d8de4e41682962cde65002b0fe86f2b189f9) )
- ROM_LOAD( "3", 0x0800, 0x0400, CRC(9d6819be) SHA1(da061b908ca6a9f3312d6adc4395a138eed473c8) )
- ROM_LOAD( "4", 0x0c00, 0x0400, CRC(432052d4) SHA1(0c944c91cc7b1f03cd817250af13238eb62539ec) )
- ROM_LOAD( "5", 0x1000, 0x0400, CRC(c6cfa650) SHA1(afdfaedddf6703101856944bb49ba13fc40ede39) )
- ROM_LOAD( "6", 0x1400, 0x0400, CRC(c7ccf40f) SHA1(10efe05a4e0625ce427871fbb6e55df112fdd783) )
+ ROM_LOAD( "1", 0x0000, 0x0400, CRC(184314d2) SHA1(76789780c46e19c73904b229d23c865819915558) )
+ ROM_LOAD( "2", 0x0400, 0x0400, CRC(55459aa1) SHA1(5631d8de4e41682962cde65002b0fe86f2b189f9) )
+ ROM_LOAD( "3", 0x0800, 0x0400, CRC(9d6819be) SHA1(da061b908ca6a9f3312d6adc4395a138eed473c8) )
+ ROM_LOAD( "4", 0x0c00, 0x0400, CRC(432052d4) SHA1(0c944c91cc7b1f03cd817250af13238eb62539ec) )
+ ROM_LOAD( "5", 0x1000, 0x0400, CRC(c6cfa650) SHA1(afdfaedddf6703101856944bb49ba13fc40ede39) )
+ ROM_LOAD( "6", 0x1400, 0x0400, CRC(c7ccf40f) SHA1(10efe05a4e0625ce427871fbb6e55df112fdd783) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "clr", 0x0000, 0x0100, CRC(13c1803f) SHA1(da59bf63d9e84aca32904c107674bc89974648eb) )
+ ROM_LOAD( "clr", 0x0000, 0x0100, CRC(13c1803f) SHA1(da59bf63d9e84aca32904c107674bc89974648eb) )
ROM_END
ROM_START( spaceintj )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "3j", 0x0000, 0x0800, CRC(b26c57a1) SHA1(456330c09130f910e847ef4bfe773421615d1448) )
- ROM_LOAD( "3f", 0x0800, 0x0800, CRC(bac8b96c) SHA1(5a7b24402c7a1a08e69cf15eb31c93d411a7e929) )
- ROM_LOAD( "3e", 0x1000, 0x0800, CRC(346125f3) SHA1(59c120ac3b120fa28acef3b9041c03939f2981f8) )
- ROM_LOAD( "3d", 0x1800, 0x0800, CRC(3a3a261f) SHA1(0604ec621180016acab804b57ac405e434d6f0c0) )
+ ROM_LOAD( "3j", 0x0000, 0x0800, CRC(b26c57a1) SHA1(456330c09130f910e847ef4bfe773421615d1448) )
+ ROM_LOAD( "3f", 0x0800, 0x0800, CRC(bac8b96c) SHA1(5a7b24402c7a1a08e69cf15eb31c93d411a7e929) )
+ ROM_LOAD( "3e", 0x1000, 0x0800, CRC(346125f3) SHA1(59c120ac3b120fa28acef3b9041c03939f2981f8) )
+ ROM_LOAD( "3d", 0x1800, 0x0800, CRC(3a3a261f) SHA1(0604ec621180016acab804b57ac405e434d6f0c0) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "clr", 0x0000, 0x0100, BAD_DUMP CRC(13c1803f) SHA1(da59bf63d9e84aca32904c107674bc89974648eb) )
+ ROM_LOAD( "clr", 0x0000, 0x0100, BAD_DUMP CRC(13c1803f) SHA1(da59bf63d9e84aca32904c107674bc89974648eb) )
ROM_END
diff --git a/src/mame/drivers/astrafr.c b/src/mame/drivers/astrafr.c
index 6c8a453683c..a40c5b4f51c 100644
--- a/src/mame/drivers/astrafr.c
+++ b/src/mame/drivers/astrafr.c
@@ -20,8 +20,8 @@ class astrafr_state : public driver_device
public:
astrafr_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_slavecpu(*this, "slavecpu")
+ m_maincpu(*this, "maincpu"),
+ m_slavecpu(*this, "slavecpu")
{
fgpa_first_read_addr = 0xffff;
@@ -2138,203 +2138,202 @@ DRIVER_INIT_MEMBER(astrafr_state,astradec_sml_dual)
}
// Single games?
-GAME( 200?, as_srb, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V004)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_srba, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V100)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_srbb, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V101)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_srbc, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V201)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_srbd, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V202)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_srbe, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V203)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_srb, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V004)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_srba, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V100)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_srbb, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V101)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_srbc, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V201)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_srbd, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V202)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_srbe, as_srb , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Ring a Bell (Astra, V203)", GAME_IS_SKELETON_MECHANICAL)
// Linked games (single rom per CPU with master/slave?)
-GAME( 200?, as_party, 0 , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V105)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_partya, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V110)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_partyb, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V112)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_partyc, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V206)" ,GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_partyd, as_party , astrafr_dual_37, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V401)", GAME_IS_SKELETON_MECHANICAL) // significantly different set
-GAME( 200?, as_partye, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V907)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_partyf, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V906)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_party, 0 , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V105)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_partya, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V110)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_partyb, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V112)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_partyc, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V206)" ,GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_partyd, as_party , astrafr_dual_37, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V401)", GAME_IS_SKELETON_MECHANICAL) // significantly different set
+GAME( 200?, as_partye, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V907)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_partyf, as_party , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Party Time (Astra, V906)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_letsp, 0 , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Let's Party (Astra, V904)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_letsp, 0 , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Let's Party (Astra, V904)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_topsl, 0 , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V103)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_topsla, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V104)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_topslb, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V201)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_topslc, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V203)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_topsld, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V205)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_topsl, 0 , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V103)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_topsla, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V104)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_topslb, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V201)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_topslc, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V203)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_topsld, as_topsl , astrafr_dual_2e, astrafr, driver_device, 0, ROT0, "Astra", "Top Slot (Astra, V205)", GAME_IS_SKELETON_MECHANICAL)
// Other HW? (has u1/u2 pairing)
-GAME( 200?, as_bigtm, 0 , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Big Time (Astra, V003)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_acp, 0 , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "unknown Astra 'ACP' (Astra, V403)", GAME_IS_SKELETON_MECHANICAL) // no sound data in here?
-GAME( 200?, as_celeb, 0 , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Celebration (Astra, V100)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_celeba, as_celeb , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Celebration (Astra, V101)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_celebb, as_celeb , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Celebration (Astra, V201)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_bigtm, 0 , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Big Time (Astra, V003)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_acp, 0 , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "unknown Astra 'ACP' (Astra, V403)", GAME_IS_SKELETON_MECHANICAL) // no sound data in here?
+GAME( 200?, as_celeb, 0 , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Celebration (Astra, V100)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_celeba, as_celeb , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Celebration (Astra, V101)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_celebb, as_celeb , astra_single , astrafr, astrafr_state, astradec, ROT0, "Astra", "Celebration (Astra, V201)", GAME_IS_SKELETON_MECHANICAL)
// u1/u2 pairing and Linked?
-GAME( 200?, as_hc, 0 , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V107)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_hca, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V109)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_hcb, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V110)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_hcc, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V111)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_hcd, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V909)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hc, 0 , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V107)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hca, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V109)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hcb, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V110)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hcc, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V111)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hcd, as_hc , astrafr_dual_37 , astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Hokey Cokey (Astra, V909)", GAME_IS_SKELETON_MECHANICAL)
// Non-Astra, same hw?
-GAME( 200?, as_cshah, 0 , astra_single_alt_57 , astrafr, astrafr_state, astradec, ROT0, "Lowen", "Cash Ahoi (Lowen, V105)", GAME_IS_SKELETON_MECHANICAL)
-
-
-GAME( 200?, as_big10, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V500)", GAME_IS_SKELETON_MECHANICAL) // BB96
-GAME( 200?, as_big10a, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V503)", GAME_IS_SKELETON_MECHANICAL) // BB96
-GAME( 200?, as_big10b, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V507)", GAME_IS_SKELETON_MECHANICAL) // BB96
-GAME( 200?, as_big10c, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V601)", GAME_IS_SKELETON_MECHANICAL) // BB96
-GAME( 200?, as_big10d, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V605)", GAME_IS_SKELETON_MECHANICAL) // BB96
-GAME( 200?, as_big15, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 15 (Astra, V101)", GAME_IS_SKELETON_MECHANICAL) // DL98
-GAME( 200?, as_bigcs, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big Cash (Astra, V101)", GAME_IS_SKELETON_MECHANICAL) // CF97/CF98
-GAME( 200?, as_bigcsa, as_bigcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big Cash (Astra, V103)", GAME_IS_SKELETON_MECHANICAL) // CF97/CF98
-
-GAME( 200?, as_bbr, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL) // FA00/CU98
-GAME( 200?, as_bbra, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V102,alt)" , GAME_IS_SKELETON_MECHANICAL) // FA00/CU98
-GAME( 200?, as_bbrb, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V201)" , GAME_IS_SKELETON_MECHANICAL) // FA00/CU98
-GAME( 200?, as_bbrc, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V003)" , GAME_IS_SKELETON_MECHANICAL) // CU98
-GAME( 200?, as_bbrd, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // CU98
-GAME( 200?, as_bbre, as_bbr , astra_single_37, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL) // FG01
-GAME( 200?, as_bbrf, as_bbr , astra_single_37, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL) // FN01
-
-GAME( 200?, as_dblcs, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V110)" , GAME_IS_SKELETON_MECHANICAL) // BR97
-GAME( 200?, as_dblcsa, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V112)" , GAME_IS_SKELETON_MECHANICAL) // BR97
-GAME( 200?, as_dblcsb, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V108)" , GAME_IS_SKELETON_MECHANICAL) // BR97
-GAME( 200?, as_dblcsc, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V109)" , GAME_IS_SKELETON_MECHANICAL) // CN97
-GAME( 200?, as_dblcsd, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL) // CN97
-GAME( 200?, as_dblcse, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // FB00
-GAME( 200?, as_dblcsf, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL) // FB00
-GAME( 200?, as_dblcsg, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V100, alt)" , GAME_IS_SKELETON_MECHANICAL) // DN98
-GAME( 200?, as_dblcsh, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL) // FO01
-
-GAME( 200?, as_fortn, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Fortune Teller (Astra, V009)" , GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 200?, as_gof, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Lowen", "Game Of Fortune (Lowen, V208)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_hog, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Hearts Of Gold (Astra, V002)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_hxr, 0 , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Hot Cross Run (Astra, V108)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_hr, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Hot Reel (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 200?, as_djp, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Double Jackpot (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_djpa, 0 , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Double Jackpot (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_djpb, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Double Jackpot (Astra, V109)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_cshcs, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Lowen", "Cash Castle (Lowen, V006)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_colmn, 0 , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Colour Of Money (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_colmna, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_colmnb, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V108)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_colmnc, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V109)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_colmnd, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V908)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jackb, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jackpot Bell (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jpx, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jackpot X (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jpxa, as_jpx , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jackpot X (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jpxb, as_jpx , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jackpot X (Astra, V002)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jolly, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jolly Roger (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jmpj, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jumping Jackpots (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jmpja, as_jmpj , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jumping Jackpots (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjive, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjivea, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjiveb, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjivec, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjived, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjivee, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V101, alt)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjivef, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_jjiveg, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V005)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_kingc, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Cash (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_kingca, as_kingc , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Cash (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_koc, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Of Clubs (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_koca, as_koc , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Of Clubs (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_lbt, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Big 10 (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_lbta, as_lbt , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Big 10 (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 200?, as_ldl, 0 , astra_single_2e, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V700)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ldla, as_ldl , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V600)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ldlb, as_ldl , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V312)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ldlc, as_ldl , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V003)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ldld, as_ldl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Devils (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ldle, as_ldl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Devils (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_mp, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Lowen", "Mission Possible (Lowen, V118)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_mp2, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Lowen", "Mission Possible 2 (Lowen, V114)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_otr, 0 , astra_single_2e, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Over The Rainbow (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_otra, as_otr , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Over The Rainbow (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // incomplete set
-GAME( 200?, as_ptf, 0 , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // strange extra sound(?) roms in here
-GAME( 200?, as_ptfa, as_ptf , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra, V803)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ptfb, as_ptf , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra, V905)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ptfc, as_ptf , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_pia, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Pay It Again (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_piaa, as_pia , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Pay It Again (Astra, V206)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_piab, as_pia , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Pay It Again (Astra, V904)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_pharg, 0 , astra_single_37, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V005)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_pharga, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_phargb, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_phargc, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_phargd, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_pharge, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_pb, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Piggy Banking (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_cshah, 0 , astra_single_alt_57 , astrafr, astrafr_state, astradec, ROT0, "Lowen", "Cash Ahoi (Lowen, V105)", GAME_IS_SKELETON_MECHANICAL)
+
+
+GAME( 200?, as_big10, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V500)", GAME_IS_SKELETON_MECHANICAL) // BB96
+GAME( 200?, as_big10a, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V503)", GAME_IS_SKELETON_MECHANICAL) // BB96
+GAME( 200?, as_big10b, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V507)", GAME_IS_SKELETON_MECHANICAL) // BB96
+GAME( 200?, as_big10c, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V601)", GAME_IS_SKELETON_MECHANICAL) // BB96
+GAME( 200?, as_big10d, as_big10 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 10 (Astra, V605)", GAME_IS_SKELETON_MECHANICAL) // BB96
+GAME( 200?, as_big15, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big 15 (Astra, V101)", GAME_IS_SKELETON_MECHANICAL) // DL98
+GAME( 200?, as_bigcs, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big Cash (Astra, V101)", GAME_IS_SKELETON_MECHANICAL) // CF97/CF98
+GAME( 200?, as_bigcsa, as_bigcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Big Cash (Astra, V103)", GAME_IS_SKELETON_MECHANICAL) // CF97/CF98
+
+GAME( 200?, as_bbr, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL) // FA00/CU98
+GAME( 200?, as_bbra, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V102,alt)" , GAME_IS_SKELETON_MECHANICAL) // FA00/CU98
+GAME( 200?, as_bbrb, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V201)" , GAME_IS_SKELETON_MECHANICAL) // FA00/CU98
+GAME( 200?, as_bbrc, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V003)" , GAME_IS_SKELETON_MECHANICAL) // CU98
+GAME( 200?, as_bbrd, as_bbr , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // CU98
+GAME( 200?, as_bbre, as_bbr , astra_single_37, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL) // FG01
+GAME( 200?, as_bbrf, as_bbr , astra_single_37, astrafr, driver_device, 0, ROT0, "Astra", "Bullion Bars (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL) // FN01
+
+GAME( 200?, as_dblcs, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V110)" , GAME_IS_SKELETON_MECHANICAL) // BR97
+GAME( 200?, as_dblcsa, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V112)" , GAME_IS_SKELETON_MECHANICAL) // BR97
+GAME( 200?, as_dblcsb, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V108)" , GAME_IS_SKELETON_MECHANICAL) // BR97
+GAME( 200?, as_dblcsc, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V109)" , GAME_IS_SKELETON_MECHANICAL) // CN97
+GAME( 200?, as_dblcsd, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL) // CN97
+GAME( 200?, as_dblcse, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // FB00
+GAME( 200?, as_dblcsf, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL) // FB00
+GAME( 200?, as_dblcsg, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V100, alt)" , GAME_IS_SKELETON_MECHANICAL) // DN98
+GAME( 200?, as_dblcsh, as_dblcs , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Double Cash (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL) // FO01
+
+GAME( 200?, as_fortn, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Fortune Teller (Astra, V009)" , GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 200?, as_gof, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Lowen", "Game Of Fortune (Lowen, V208)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hog, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Hearts Of Gold (Astra, V002)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hxr, 0 , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Hot Cross Run (Astra, V108)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_hr, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Hot Reel (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 200?, as_djp, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Double Jackpot (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_djpa, 0 , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Double Jackpot (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_djpb, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Double Jackpot (Astra, V109)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_cshcs, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Lowen", "Cash Castle (Lowen, V006)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_colmn, 0 , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Colour Of Money (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_colmna, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_colmnb, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V108)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_colmnc, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V109)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_colmnd, as_colmn , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Colour Of Money (Astra, V908)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jackb, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jackpot Bell (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jpx, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jackpot X (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jpxa, as_jpx , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jackpot X (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jpxb, as_jpx , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jackpot X (Astra, V002)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jolly, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jolly Roger (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jmpj, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jumping Jackpots (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jmpja, as_jmpj , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Jumping Jackpots (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjive, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjivea, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjiveb, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjivec, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjived, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjivee, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V101, alt)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjivef, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V004)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_jjiveg, as_jjive , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Jungle Jive (Astra, V005)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_kingc, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Cash (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_kingca, as_kingc , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Cash (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_koc, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Of Clubs (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_koca, as_koc , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "King Of Clubs (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_lbt, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Big 10 (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_lbta, as_lbt , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Big 10 (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 200?, as_ldl, 0 , astra_single_2e, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V700)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ldla, as_ldl , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V600)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ldlb, as_ldl , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V312)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ldlc, as_ldl , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Little Devils (Astra, V003)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ldld, as_ldl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Devils (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ldle, as_ldl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Little Devils (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_mp, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Lowen", "Mission Possible (Lowen, V118)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_mp2, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Lowen", "Mission Possible 2 (Lowen, V114)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_otr, 0 , astra_single_2e, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Over The Rainbow (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_otra, as_otr , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Over The Rainbow (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // incomplete set
+GAME( 200?, as_ptf, 0 , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL) // strange extra sound(?) roms in here
+GAME( 200?, as_ptfa, as_ptf , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra, V803)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ptfb, as_ptf , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra, V905)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ptfc, as_ptf , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Astra", "Party Fruits (Astra)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_pia, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Pay It Again (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_piaa, as_pia , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Pay It Again (Astra, V206)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_piab, as_pia , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Pay It Again (Astra, V904)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_pharg, 0 , astra_single_37, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V005)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_pharga, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_phargb, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_phargc, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_phargd, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_pharge, as_pharg , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Pharaoh's Gold (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_pb, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Piggy Banking (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
// this might be another mix of master / slave sets, and multiple games....
-GAME( 200?, as_rtr, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtra, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101, alt 1)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtrb, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101, alt 2)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtrc, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101, alt 3)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtrd, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V100, )" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtre, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V100, alt)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtrf, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtrg, as_rtr , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V200, alt)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rtrh, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 200?, as_rab, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_raba, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rabb, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rabc, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rbg, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V304)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rbga, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V303)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rbgb, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rbgc, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rbgd, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rbge, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V008)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rbglo, 0 , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Lowen", "River Boat Gambler (Lowen, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_rox, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Roll X (Astra, V006)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_csv, 0 , astra_single_37, astrafr, driver_device, 0, ROT0, "Astra", "Slot Slant (?) (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_sltcl, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Slots Classic (?) (Astra)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_stp, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Stampede (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_stpa, as_stp , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Stampede (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_stpb, as_stp , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Stampede (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_siu, 0 , astra_single_37, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Step It Up (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL) // extra sound roms(?) in this set
-GAME( 200?, as_siua, as_siu , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Step It Up (Astra, V203)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_sld, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V700)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_slda, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V600)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_sldb, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V500)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_sldc, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V400)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_sldd, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_slde, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tem, 0 , astra_single_alt_37, astrafr, astrafr_state, astradec, ROT0, "Astra", "Temptation (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tema, as_tem , astra_single_alt_37, astrafr, astrafr_state, astradec, ROT0, "Astra", "Temptation (Astra, V006)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tbl, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tbla, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tblb, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tblc, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tbld, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V304)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tble, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V303)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_tblf, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V301)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_td, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Twin Dragons (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 200?, as_twp, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Twin Pots (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_twpa, as_twp , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Twin Pots (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_vn, 0 , astrafr_dual_alt_37, astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Vegas Nights (Astra, V205)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_vcv, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V005)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_vcva, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_vcvb, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_vcvc, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_vcvd, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_vcve, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ww, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V203)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_wwa, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V204)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_wwb, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V205)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_wwc, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_wwd, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_wwe, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
-GAME( 200?, as_ws, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Win Streak (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL) // incomplete dump
-
+GAME( 200?, as_rtr, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtra, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101, alt 1)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtrb, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101, alt 2)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtrc, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V101, alt 3)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtrd, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V100, )" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtre, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V100, alt)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtrf, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtrg, as_rtr , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V200, alt)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rtrh, as_rtr , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Ready To Roll (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 200?, as_rab, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_raba, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rabb, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rabc, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Ring A Bell (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rbg, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V304)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rbga, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V303)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rbgb, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rbgc, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rbgd, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rbge, as_rab , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "River Boat Gambler (Astra, V008)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rbglo, 0 , astrafr_dual_37, astrafr, astrafr_state, astradec_sml_dual, ROT0, "Lowen", "River Boat Gambler (Lowen, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_rox, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Roll X (Astra, V006)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_csv, 0 , astra_single_37, astrafr, driver_device, 0, ROT0, "Astra", "Slot Slant (?) (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_sltcl, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Slots Classic (?) (Astra)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_stp, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Stampede (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_stpa, as_stp , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Stampede (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_stpb, as_stp , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Stampede (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_siu, 0 , astra_single_37, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Step It Up (Astra, V202)" , GAME_IS_SKELETON_MECHANICAL) // extra sound roms(?) in this set
+GAME( 200?, as_siua, as_siu , astra_single, astrafr, astrafr_state, astradec_sml, ROT0, "Astra", "Step It Up (Astra, V203)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_sld, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V700)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_slda, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V600)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_sldb, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V500)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_sldc, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V400)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_sldd, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V200)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_slde, as_sld , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Super Little Devil (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tem, 0 , astra_single_alt_37, astrafr, astrafr_state, astradec, ROT0, "Astra", "Temptation (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tema, as_tem , astra_single_alt_37, astrafr, astrafr_state, astradec, ROT0, "Astra", "Temptation (Astra, V006)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tbl, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tbla, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V105)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tblb, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tblc, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tbld, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V304)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tble, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V303)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_tblf, as_tbl , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Triple Bells (Astra, V301)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_td, 0 , astra_single_2e, astrafr, astrafr_state, astradec, ROT0, "Astra", "Twin Dragons (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 200?, as_twp, 0 , astra_single_2e, astrafr, driver_device, 0, ROT0, "Astra", "Twin Pots (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_twpa, as_twp , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Twin Pots (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_vn, 0 , astrafr_dual_alt_37, astrafr, astrafr_state, astradec_dual, ROT0, "Astra", "Vegas Nights (Astra, V205)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_vcv, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V005)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_vcva, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V107)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_vcvb, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V106)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_vcvc, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_vcvd, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_vcve, as_vcv , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Viva Cash Vegas (Astra, V101)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ww, 0 , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V203)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_wwa, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V204)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_wwb, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V205)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_wwc, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V104)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_wwd, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V103)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_wwe, as_ww , astra_single, astrafr, driver_device, 0, ROT0, "Astra", "Wicked Willy (Astra, V102)" , GAME_IS_SKELETON_MECHANICAL)
+GAME( 200?, as_ws, 0 , astra_single, astrafr, astrafr_state, astradec, ROT0, "Astra", "Win Streak (Astra, V100)" , GAME_IS_SKELETON_MECHANICAL) // incomplete dump
diff --git a/src/mame/drivers/astrocde.c b/src/mame/drivers/astrocde.c
index 0c77cfee2cb..37ac2e72696 100644
--- a/src/mame/drivers/astrocde.c
+++ b/src/mame/drivers/astrocde.c
@@ -192,13 +192,13 @@ WRITE8_MEMBER(astrocde_state::seawolf2_lamps_w)
/* ------x- torpedo 3 available */
/* -------x torpedo 4 available */
- output_set_lamp_value((offset ^ 1) * 7 + 0, ( data >> 5) & 1); /* 0/7 = hit lamp */
- output_set_lamp_value((offset ^ 1) * 7 + 1, (~data >> 4) & 1); /* 1/8 = reload lamp */
- output_set_lamp_value((offset ^ 1) * 7 + 2, ( data >> 4) & 1); /* 2/9 = ready lamp */
- output_set_lamp_value((offset ^ 1) * 7 + 3, ( data >> 3) & 1); /* 3/10 = torpedo 1 lamp */
- output_set_lamp_value((offset ^ 1) * 7 + 4, ( data >> 2) & 1); /* 4/11 = torpedo 2 lamp */
- output_set_lamp_value((offset ^ 1) * 7 + 5, ( data >> 1) & 1); /* 5/12 = torpedo 3 lamp */
- output_set_lamp_value((offset ^ 1) * 7 + 6, ( data >> 0) & 1); /* 6/13 = torpedo 4 lamp */
+ output_set_lamp_value((offset ^ 1) * 7 + 0, ( data >> 5) & 1); /* 0/7 = hit lamp */
+ output_set_lamp_value((offset ^ 1) * 7 + 1, (~data >> 4) & 1); /* 1/8 = reload lamp */
+ output_set_lamp_value((offset ^ 1) * 7 + 2, ( data >> 4) & 1); /* 2/9 = ready lamp */
+ output_set_lamp_value((offset ^ 1) * 7 + 3, ( data >> 3) & 1); /* 3/10 = torpedo 1 lamp */
+ output_set_lamp_value((offset ^ 1) * 7 + 4, ( data >> 2) & 1); /* 4/11 = torpedo 2 lamp */
+ output_set_lamp_value((offset ^ 1) * 7 + 5, ( data >> 1) & 1); /* 5/12 = torpedo 3 lamp */
+ output_set_lamp_value((offset ^ 1) * 7 + 6, ( data >> 0) & 1); /* 6/13 = torpedo 4 lamp */
}
@@ -302,13 +302,13 @@ READ8_MEMBER(astrocde_state::wow_io_r)
switch ((offset >> 9) & 7)
{
- case 0: coin_counter_w(machine(), 0, data); break;
- case 1: coin_counter_w(machine(), 1, data); break;
- case 2: m_sparkle[0] = data; break;
- case 3: m_sparkle[1] = data; break;
- case 4: m_sparkle[2] = data; break;
- case 5: m_sparkle[3] = data; break;
- case 7: coin_counter_w(machine(), 2, data); break;
+ case 0: coin_counter_w(machine(), 0, data); break;
+ case 1: coin_counter_w(machine(), 1, data); break;
+ case 2: m_sparkle[0] = data; break;
+ case 3: m_sparkle[1] = data; break;
+ case 4: m_sparkle[2] = data; break;
+ case 5: m_sparkle[3] = data; break;
+ case 7: coin_counter_w(machine(), 2, data); break;
}
return 0xff;
}
@@ -327,12 +327,12 @@ READ8_MEMBER(astrocde_state::gorf_io_1_r)
switch ((offset >> 9) & 7)
{
- case 0: coin_counter_w(machine(), 0, data); break;
- case 1: coin_counter_w(machine(), 1, data); break;
- case 2: m_sparkle[0] = data; break;
- case 3: m_sparkle[1] = data; break;
- case 4: m_sparkle[2] = data; break;
- case 5: m_sparkle[3] = data; break;
+ case 0: coin_counter_w(machine(), 0, data); break;
+ case 1: coin_counter_w(machine(), 1, data); break;
+ case 2: m_sparkle[0] = data; break;
+ case 3: m_sparkle[1] = data; break;
+ case 4: m_sparkle[2] = data; break;
+ case 5: m_sparkle[3] = data; break;
case 6:
machine().device<astrocade_device>("astrocade1")->set_output_gain(0, data ? 0.0 : 1.0);
#if USE_FAKE_VOTRAX
@@ -341,7 +341,7 @@ READ8_MEMBER(astrocde_state::gorf_io_1_r)
machine().device<votrax_sc01_device>("votrax")->set_output_gain(0, data ? 1.0 : 0.0);
#endif
break;
- case 7: mame_printf_debug("io_1:%d\n", data); break;
+ case 7: mame_printf_debug("io_1:%d\n", data); break;
}
return 0xff;
}
@@ -353,14 +353,14 @@ READ8_MEMBER(astrocde_state::gorf_io_2_r)
switch ((offset >> 9) & 7)
{
- case 0: output_set_lamp_value(0, data); break;
- case 1: output_set_lamp_value(1, data); break;
- case 2: output_set_lamp_value(2, data); break;
- case 3: output_set_lamp_value(3, data); break;
- case 4: output_set_lamp_value(4, data); break;
- case 5: output_set_lamp_value(5, data); break;
- case 6: /* n/c */ break;
- case 7: mame_printf_debug("io_2:%d\n", data); break;
+ case 0: output_set_lamp_value(0, data); break;
+ case 1: output_set_lamp_value(1, data); break;
+ case 2: output_set_lamp_value(2, data); break;
+ case 3: output_set_lamp_value(3, data); break;
+ case 4: output_set_lamp_value(4, data); break;
+ case 5: output_set_lamp_value(5, data); break;
+ case 6: /* n/c */ break;
+ case 7: mame_printf_debug("io_2:%d\n", data); break;
}
return 0xff;
}
@@ -379,11 +379,11 @@ READ8_MEMBER(astrocde_state::robby_io_r)
switch ((offset >> 9) & 7)
{
- case 0: coin_counter_w(machine(), 0, data); break;
- case 1: coin_counter_w(machine(), 1, data); break;
- case 2: coin_counter_w(machine(), 2, data); break;
- case 6: set_led_status(machine(), 0, data); break;
- case 7: set_led_status(machine(), 1, data); break;
+ case 0: coin_counter_w(machine(), 0, data); break;
+ case 1: coin_counter_w(machine(), 1, data); break;
+ case 2: coin_counter_w(machine(), 2, data); break;
+ case 6: set_led_status(machine(), 0, data); break;
+ case 7: set_led_status(machine(), 1, data); break;
}
return 0xff;
}
@@ -408,12 +408,12 @@ READ8_MEMBER(astrocde_state::profpac_io_1_r)
READ8_MEMBER(astrocde_state::profpac_io_2_r)
{
- output_set_lamp_value(0, (offset >> 8) & 1); /* left lamp A */
- output_set_lamp_value(1, (offset >> 9) & 1); /* left lamp B */
- output_set_lamp_value(2, (offset >> 10) & 1); /* left lamp C */
- output_set_lamp_value(3, (offset >> 12) & 1); /* right lamp A */
- output_set_lamp_value(4, (offset >> 13) & 1); /* right lamp B */
- output_set_lamp_value(5, (offset >> 14) & 1); /* right lamp C */
+ output_set_lamp_value(0, (offset >> 8) & 1); /* left lamp A */
+ output_set_lamp_value(1, (offset >> 9) & 1); /* left lamp B */
+ output_set_lamp_value(2, (offset >> 10) & 1); /* left lamp C */
+ output_set_lamp_value(3, (offset >> 12) & 1); /* right lamp A */
+ output_set_lamp_value(4, (offset >> 13) & 1); /* right lamp B */
+ output_set_lamp_value(5, (offset >> 14) & 1); /* right lamp C */
return 0xff;
}
@@ -503,10 +503,10 @@ WRITE8_MEMBER(astrocde_state::demndrgn_sound_w)
static Z80CTC_INTERFACE( ctc_intf )
{
- DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
- DEVCB_NULL, /* ZC/TO0 callback */
+ DEVCB_CPU_INPUT_LINE("sub", INPUT_LINE_IRQ0), /* interrupt handler */
+ DEVCB_NULL, /* ZC/TO0 callback */
DEVCB_NULL, /* ZC/TO1 callback */
- DEVCB_NULL /* ZC/TO2 callback */
+ DEVCB_NULL /* ZC/TO2 callback */
};
@@ -738,7 +738,7 @@ static const ioport_value controller_table[64] =
static INPUT_PORTS_START( seawolf2 )
PORT_START("P1HANDLE")
PORT_BIT( 0x3f, 0x1f, IPT_POSITIONAL ) PORT_PLAYER(2) PORT_POSITIONS(64) PORT_REMAP_TABLE(controller_table) PORT_SENSITIVITY(20) PORT_KEYDELTA(4) PORT_CENTERDELTA(0) PORT_CROSSHAIR(X, 2.0, -0.40, 34.0 / 240.0)
- PORT_DIPNAME( 0x40, 0x00, "Language 1" ) PORT_DIPLOCATION("S2:!1")
+ PORT_DIPNAME( 0x40, 0x00, "Language 1" ) PORT_DIPLOCATION("S2:!1")
PORT_DIPSETTING( 0x00, "Language 2" )
PORT_DIPSETTING( 0x40, DEF_STR( French ) )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
@@ -752,29 +752,29 @@ static INPUT_PORTS_START( seawolf2 )
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_START2 )
- PORT_DIPNAME( 0x08, 0x00, "Language 2" ) PORT_DIPLOCATION("S2:!2")
+ PORT_DIPNAME( 0x08, 0x00, "Language 2" ) PORT_DIPLOCATION("S2:!2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x08, DEF_STR( German ) )
PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("P4HANDLE")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("S1:!2")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("S1:!2")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x06, 0x00, "Play Time" ) PORT_DIPLOCATION("S1:!3,!4")
- PORT_DIPSETTING( 0x06, "1P 40s/2P 45s" ) /* Extended play: 1P 20s/2P 20s */
- PORT_DIPSETTING( 0x04, "1P 50s/2P 60s" ) /* Extended play: 1P 25s/2P 30s */
- PORT_DIPSETTING( 0x02, "1P 60s/2P 75s" ) /* Extended play: 1P 30s/2P 35s */
- PORT_DIPSETTING( 0x00, "1P 70s/2P 90s" ) /* Extended play: 1P 35s/2P 45s */
- PORT_DIPNAME( 0x08, 0x08, "2 Players Game" ) PORT_DIPLOCATION("S1:!1")
+ PORT_DIPNAME( 0x06, 0x00, "Play Time" ) PORT_DIPLOCATION("S1:!3,!4")
+ PORT_DIPSETTING( 0x06, "1P 40s/2P 45s" ) /* Extended play: 1P 20s/2P 20s */
+ PORT_DIPSETTING( 0x04, "1P 50s/2P 60s" ) /* Extended play: 1P 25s/2P 30s */
+ PORT_DIPSETTING( 0x02, "1P 60s/2P 75s" ) /* Extended play: 1P 30s/2P 35s */
+ PORT_DIPSETTING( 0x00, "1P 70s/2P 90s" ) /* Extended play: 1P 35s/2P 45s */
+ PORT_DIPNAME( 0x08, 0x08, "2 Players Game" ) PORT_DIPLOCATION("S1:!1")
PORT_DIPSETTING( 0x00, "1 Credit" )
PORT_DIPSETTING( 0x08, "2 Credits" )
- PORT_DIPNAME( 0x30, 0x00, "Extended Play" ) PORT_DIPLOCATION("S1:!5,!6")
+ PORT_DIPNAME( 0x30, 0x00, "Extended Play" ) PORT_DIPLOCATION("S1:!5,!6")
PORT_DIPSETTING( 0x10, "5000" )
PORT_DIPSETTING( 0x20, "6000" )
PORT_DIPSETTING( 0x30, "7000" )
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
- PORT_DIPNAME( 0x40, 0x40, "Monitor" ) PORT_DIPLOCATION("S1:!7")
+ PORT_DIPNAME( 0x40, 0x40, "Monitor" ) PORT_DIPLOCATION("S1:!7")
PORT_DIPSETTING( 0x40, "Color" )
PORT_DIPSETTING( 0x00, "B/W" )
PORT_SERVICE_DIPLOC( 0x80, IP_ACTIVE_LOW, "S1:!8")
@@ -795,17 +795,17 @@ static INPUT_PORTS_START( ebases )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_DIPNAME( 0x10, 0x00, "Monitor" ) PORT_DIPLOCATION( "JU:1" )
+ PORT_DIPNAME( 0x10, 0x00, "Monitor" ) PORT_DIPLOCATION( "JU:1" )
PORT_DIPSETTING( 0x00, "Color" )
PORT_DIPSETTING( 0x10, "B/W" )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION( "JU:2" )
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION( "JU:2" )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("P3HANDLE")
- PORT_DIPNAME( 0x01, 0x00, "2 Players Game" ) PORT_DIPLOCATION( "S1:1" )
+ PORT_DIPNAME( 0x01, 0x00, "2 Players Game" ) PORT_DIPLOCATION( "S1:1" )
PORT_DIPSETTING( 0x00, "1 Credit" )
PORT_DIPSETTING( 0x01, "2 Credits" )
PORT_DIPUNUSED_DIPLOC( 0x02, 0x00, "S1:2" )
@@ -843,12 +843,12 @@ INPUT_CHANGED_MEMBER(astrocde_state::spacezap_monitor)
static INPUT_PORTS_START( spacezap )
PORT_START("P1HANDLE")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) // manual says this dip is unused on cocktail cabs
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) // manual says this dip is unused on cocktail cabs
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_TILT )
PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) // starts a 1 player game if 1 credit
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) // starts a 1 player game if 1 credit
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("P2HANDLE")
@@ -866,16 +866,16 @@ static INPUT_PORTS_START( spacezap )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("P1 Aim Left") PORT_CODE(KEYCODE_LEFT)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("P1 Aim Right") PORT_CODE(KEYCODE_RIGHT)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("JU:2")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("JU:2")
PORT_DIPSETTING( 0x20, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("P4HANDLE")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coin_A ) ) PORT_DIPLOCATION( "S1:1" )
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coin_A ) ) PORT_DIPLOCATION( "S1:1" )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coin_B ) ) PORT_DIPLOCATION( "S1:2,3" )
+ PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coin_B ) ) PORT_DIPLOCATION( "S1:2,3" )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) )
@@ -888,7 +888,7 @@ static INPUT_PORTS_START( spacezap )
PORT_START("FAKE")
/* Dedicated cabinets had a B/W monitor and color overlay,
- some (unofficial/repaired?) cabinets had a color monitor. */
+ some (unofficial/repaired?) cabinets had a color monitor. */
PORT_CONFNAME( 0x01, 0x00, "Monitor" ) PORT_CHANGED_MEMBER(DEVICE_SELF, astrocde_state,spacezap_monitor, 0)
PORT_CONFSETTING( 0x00, "B/W" )
PORT_CONFSETTING( 0x01, "Color" )
@@ -904,7 +904,7 @@ static INPUT_PORTS_START( wow )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("JU:1") /* Undocumented, jumper? */
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("JU:1") /* Undocumented, jumper? */
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -929,28 +929,28 @@ static INPUT_PORTS_START( wow )
PORT_START("P4HANDLE")
/* "If S1:1,2,3 are all ON or all OFF, only coin meter number 1 will count." */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("S1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("S1:1")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("S1:2,3")
+ PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("S1:2,3")
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_5C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4")
PORT_DIPSETTING( 0x08, DEF_STR( English ) )
- PORT_DIPSETTING( 0x00, "Foreign (NEED ROM)" ) /* "Requires A082-91374-A000" */
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("S1:5")
+ PORT_DIPSETTING( 0x00, "Foreign (NEED ROM)" ) /* "Requires A082-91374-A000" */
+ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("S1:5")
PORT_DIPSETTING( 0x10, "2 for 1 Credit / 5 for 2 Credits" )
PORT_DIPSETTING( 0x00, "3 for 1 Credit / 7 for 2 Credits" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("S1:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("S1:6")
PORT_DIPSETTING( 0x20, "After 3rd Level" )
PORT_DIPSETTING( 0x00, "After 4th Level" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("S1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("S1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("S1:8")
- PORT_DIPSETTING( 0x00, "On only when controls are touched" ) /* "Touching controls will enable attract sound for 1 cycle." */
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("S1:8")
+ PORT_DIPSETTING( 0x00, "On only when controls are touched" ) /* "Touching controls will enable attract sound for 1 cycle." */
PORT_DIPSETTING( 0x80, "Always On" )
INPUT_PORTS_END
@@ -959,7 +959,7 @@ static INPUT_PORTS_START( wowg )
PORT_INCLUDE(wow)
PORT_MODIFY("P4HANDLE")
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4") /* Default it to Foreign because this set has the German ROM */
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4") /* Default it to Foreign because this set has the German ROM */
PORT_DIPSETTING( 0x08, DEF_STR( English ) )
PORT_DIPSETTING( 0x00, "Foreign (German ROM)" )
INPUT_PORTS_END
@@ -973,10 +973,10 @@ static INPUT_PORTS_START( gorf )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("JU:1") /* Jumper */
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("JU:1") /* Jumper */
PORT_DIPSETTING( 0x40, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x80, 0x80, "Speech" ) PORT_DIPLOCATION("JU:2") /* Jumper */
+ PORT_DIPNAME( 0x80, 0x80, "Speech" ) PORT_DIPLOCATION("JU:2") /* Jumper */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
@@ -998,27 +998,27 @@ static INPUT_PORTS_START( gorf )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(gorf_speech_status_r, NULL)
PORT_START("P4HANDLE")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("S1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("S1:1")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("S1:2,3")
+ PORT_DIPNAME( 0x06, 0x06, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("S1:2,3")
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_5C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4")
PORT_DIPSETTING( 0x08, DEF_STR( English ) )
- PORT_DIPSETTING( 0x00, "Foreign (NEED ROM)" ) /* "Requires A082-91374-A000" */
- PORT_DIPNAME( 0x10, 0x00, "Lives per Credit" ) PORT_DIPLOCATION("S1:5")
+ PORT_DIPSETTING( 0x00, "Foreign (NEED ROM)" ) /* "Requires A082-91374-A000" */
+ PORT_DIPNAME( 0x10, 0x00, "Lives per Credit" ) PORT_DIPLOCATION("S1:5")
PORT_DIPSETTING( 0x10, "2" )
PORT_DIPSETTING( 0x00, "3" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("S1:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("S1:6")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x20, "Mission 5" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("S1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("S1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("S1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("S1:8")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1028,7 +1028,7 @@ static INPUT_PORTS_START( gorfpgm1g )
PORT_INCLUDE(gorf)
PORT_MODIFY("P4HANDLE")
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4") /* Default it to Foreign because this set has the German ROM */
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("S1:4") /* Default it to Foreign because this set has the German ROM */
PORT_DIPSETTING( 0x08, DEF_STR( English ) )
PORT_DIPSETTING( 0x00, "Foreign (German ROM)" )
INPUT_PORTS_END
@@ -1064,22 +1064,22 @@ static INPUT_PORTS_START( robby )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("P4HANDLE")
- PORT_DIPNAME( 0x01, 0x01, "Use NVRAM" ) PORT_DIPLOCATION("S1:1")
+ PORT_DIPNAME( 0x01, 0x01, "Use NVRAM" ) PORT_DIPLOCATION("S1:1")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
PORT_DIPNAME( 0x02, 0x02, "Use Service Mode Settings" ) PORT_DIPLOCATION("S1:2")
PORT_DIPSETTING( 0x00, "Reset" )
PORT_DIPSETTING( 0x02, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("S1:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("S1:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("S1:4") /* Listed as "Unused". */
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("S1:4") /* Listed as "Unused". */
PORT_DIPSETTING( 0x08, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "S1:5" )
PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "S1:6" )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "S1:7" )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("S1:8") /* Listed as "Unused". */
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("S1:8") /* Listed as "Unused". */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1109,19 +1109,19 @@ static INPUT_PORTS_START( profpac )
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("P4HANDLE")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("S1:1")
- PORT_DIPSETTING( 0x01, DEF_STR( Upright ) ) /* Upright or Mini */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("S1:1")
+ PORT_DIPSETTING( 0x01, DEF_STR( Upright ) ) /* Upright or Mini */
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x02, 0x02, "Reset on powerup" ) PORT_DIPLOCATION("S1:2")
+ PORT_DIPNAME( 0x02, 0x02, "Reset on powerup" ) PORT_DIPLOCATION("S1:2")
PORT_DIPSETTING( 0x02, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x04, 0x00, "Halt on error" ) PORT_DIPLOCATION("S1:3")
+ PORT_DIPNAME( 0x04, 0x00, "Halt on error" ) PORT_DIPLOCATION("S1:3")
PORT_DIPSETTING( 0x04, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x08, 0x00, "Beep" ) PORT_DIPLOCATION("S1:4")
+ PORT_DIPNAME( 0x08, 0x00, "Beep" ) PORT_DIPLOCATION("S1:4")
PORT_DIPSETTING( 0x08, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x10, 0x00, "ROM's Used" ) PORT_DIPLOCATION("S1:5")
+ PORT_DIPNAME( 0x10, 0x00, "ROM's Used" ) PORT_DIPLOCATION("S1:5")
PORT_DIPSETTING( 0x10, "8K & 16K ROM's" )
PORT_DIPSETTING( 0x00, "32K ROM's" )
PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "S1:6" )
@@ -1177,43 +1177,43 @@ static INPUT_PORTS_START( tenpindx )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* select game */
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) /* number of players */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) /* start game */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* select game */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) /* number of players */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 ) /* start game */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("P61")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("S1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("S1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x02, 0x02, "Lockup" ) PORT_DIPLOCATION("S1:2")
+ PORT_DIPNAME( 0x02, 0x02, "Lockup" ) PORT_DIPLOCATION("S1:2")
PORT_DIPSETTING( 0x02, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x04, 0x00, "Reset" ) PORT_DIPLOCATION("S1:3")
+ PORT_DIPNAME( 0x04, 0x00, "Reset" ) PORT_DIPLOCATION("S1:3")
PORT_DIPSETTING( 0x04, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x08, 0x00, "Beep" ) PORT_DIPLOCATION("S1:4")
+ PORT_DIPNAME( 0x08, 0x00, "Beep" ) PORT_DIPLOCATION("S1:4")
PORT_DIPSETTING( 0x08, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x10, 0x10, "Regulation" ) PORT_DIPLOCATION("S1:5")
+ PORT_DIPNAME( 0x10, 0x10, "Regulation" ) PORT_DIPLOCATION("S1:5")
PORT_DIPSETTING( 0x10, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x20, 0x20, "Ticket Dispenser" ) PORT_DIPLOCATION("S1:6")
+ PORT_DIPNAME( 0x20, 0x20, "Ticket Dispenser" ) PORT_DIPLOCATION("S1:6")
PORT_DIPSETTING( 0x20, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x40, 0x40, "Bill Acceptor" ) PORT_DIPLOCATION("S1:7")
+ PORT_DIPNAME( 0x40, 0x40, "Bill Acceptor" ) PORT_DIPLOCATION("S1:7")
PORT_DIPSETTING( 0x40, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "S1:8" )
PORT_START("P62")
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_SPECIAL ) /* F1-F8 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_SPECIAL ) /* F1-F8 */
PORT_START("P63")
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_SPECIAL ) /* F9-F0,P1-P6 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_SPECIAL ) /* F9-F0,P1-P6 */
PORT_START("P64")
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_SPECIAL ) /* P7-P0 */
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_SPECIAL ) /* P7-P0 */
PORT_START("DIPSW")
PORT_DIPUNUSED_DIPLOC( 0x01, 0x00, "S2:1" )
@@ -1248,7 +1248,7 @@ static const char *const seawolf_sample_names[] =
static const samples_interface seawolf2_samples_interface =
{
- 10, /* 5*2 channels */
+ 10, /* 5*2 channels */
seawolf_sample_names
};
@@ -1299,7 +1299,7 @@ static MACHINE_CONFIG_START( astrocade_base, astrocde_state )
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(ASTROCADE_CLOCK, 455, 0, 352, 262, 0, 240)
- MCFG_SCREEN_DEFAULT_POSITION(1.1, 0.0, 1.18, -0.018) /* clip out borders */
+ MCFG_SCREEN_DEFAULT_POSITION(1.1, 0.0, 1.18, -0.018) /* clip out borders */
MCFG_SCREEN_UPDATE_DRIVER(astrocde_state, screen_update_astrocde)
MACHINE_CONFIG_END
@@ -1412,7 +1412,7 @@ static MACHINE_CONFIG_DERIVED( wow, astrocade_base )
/* video hardware */
MCFG_SCREEN_MODIFY("screen")
- MCFG_SCREEN_DEFAULT_POSITION(1.0, 0.0, 1.0, 0.0) /* adjusted to match screenshots */
+ MCFG_SCREEN_DEFAULT_POSITION(1.0, 0.0, 1.0, 0.0) /* adjusted to match screenshots */
// MCFG_SCREEN_DEFAULT_POSITION(1.066, -0.004, 1.048, -0.026) /* adjusted to match flyer */
/* sound hardware */
@@ -1436,7 +1436,7 @@ static MACHINE_CONFIG_DERIVED( gorf, astrocade_base )
/* video hardware */
MCFG_SCREEN_MODIFY("screen")
- MCFG_SCREEN_DEFAULT_POSITION(1.0, 0.0, 1.0, 0.0) /* adjusted to match flyer */
+ MCFG_SCREEN_DEFAULT_POSITION(1.0, 0.0, 1.0, 0.0) /* adjusted to match flyer */
/* sound hardware */
MCFG_SPEAKER_ADD("upper", 0.0, 0.0, 1.0)
@@ -1495,7 +1495,7 @@ static MACHINE_CONFIG_DERIVED( tenpindx, astrocade_16color_base )
MCFG_CPU_PROGRAM_MAP(profpac_map)
MCFG_CPU_IO_MAP(port_map_16col_pattern_nosound)
- MCFG_CPU_ADD("sub", Z80, ASTROCADE_CLOCK/4) /* real clock unknown */
+ MCFG_CPU_ADD("sub", Z80, ASTROCADE_CLOCK/4) /* real clock unknown */
MCFG_CPU_CONFIG(tenpin_daisy_chain)
MCFG_CPU_PROGRAM_MAP(tenpin_sub_map)
MCFG_CPU_IO_MAP(tenpin_sub_io_map)
@@ -1504,7 +1504,7 @@ static MACHINE_CONFIG_DERIVED( tenpindx, astrocade_16color_base )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("aysnd", AY8912, ASTROCADE_CLOCK/4) /* real clock unknown */
+ MCFG_SOUND_ADD("aysnd", AY8912, ASTROCADE_CLOCK/4) /* real clock unknown */
MCFG_SOUND_CONFIG(ay8912_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.33)
MACHINE_CONFIG_END
@@ -1656,7 +1656,7 @@ ROM_START( profpac )
ROM_LOAD( "ppq14", 0x34000, 0x4000, CRC(ecb861de) SHA1(73d28a79b76795d3016dd608f9ab3d255f40e477) )
ROM_REGION( 0xa00, "plds", 0 )
- ROM_LOAD( "pls153a_cpu.u12", 0x00000, 0x00eb, CRC(499a6fc5) SHA1(633d647bcae2f762847a2abe8069741ac33b15b8) )
+ ROM_LOAD( "pls153a_cpu.u12", 0x00000, 0x00eb, CRC(499a6fc5) SHA1(633d647bcae2f762847a2abe8069741ac33b15b8) )
ROM_LOAD( "pls153a_cpu.u16", 0x00100, 0x00eb, CRC(9a5ea540) SHA1(8619c7626e58eac09a4d91f5ad49742240f5f71e) )
ROM_LOAD( "pls153a_epr.u6", 0x00200, 0x00eb, CRC(d8454bf7) SHA1(5e074a2cbac99ebbf02bc4cd331679ede30eea3f) )
ROM_LOAD( "pls153a_epr.u7", 0x00300, 0x00eb, CRC(fa831d9f) SHA1(ca8c3d8db24e99537c682aaf9726cbcef86728dd) )
@@ -1713,7 +1713,7 @@ ROM_START( tenpindx )
ROM_LOAD( "tpd_x16.bin", 0x1c000, 0x2000, CRC(8839d0e1) SHA1(5f1e581066d1851ee996f152ebec83db40aa7073) )
ROM_REGION( 0xa00, "plds", 0 )
- ROM_LOAD( "pls153a_cpu.u12", 0x00000, 0x00eb, CRC(499a6fc5) SHA1(633d647bcae2f762847a2abe8069741ac33b15b8) )
+ ROM_LOAD( "pls153a_cpu.u12", 0x00000, 0x00eb, CRC(499a6fc5) SHA1(633d647bcae2f762847a2abe8069741ac33b15b8) )
ROM_LOAD( "pls153a_cpu.u16", 0x00100, 0x00eb, CRC(9a5ea540) SHA1(8619c7626e58eac09a4d91f5ad49742240f5f71e) )
ROM_LOAD( "pls153a_epr.u6", 0x00200, 0x00eb, CRC(d8454bf7) SHA1(5e074a2cbac99ebbf02bc4cd331679ede30eea3f) )
ROM_LOAD( "pls153a_epr.u7", 0x00300, 0x00eb, CRC(fa831d9f) SHA1(ca8c3d8db24e99537c682aaf9726cbcef86728dd) )
diff --git a/src/mame/drivers/astrocorp.c b/src/mame/drivers/astrocorp.c
index ce26aa40a6b..666e63e9de1 100644
--- a/src/mame/drivers/astrocorp.c
+++ b/src/mame/drivers/astrocorp.c
@@ -118,13 +118,13 @@ static void draw_sprites( running_machine &machine, bitmap_ind16 &bitmap, const
int x, y;
int xwrap, ywrap;
- int sx = source[ 0x0/2 ];
- int code = source[ 0x2/2 ];
- int sy = source[ 0x4/2 ];
- int attr = source[ 0x6/2 ];
+ int sx = source[ 0x0/2 ];
+ int code = source[ 0x2/2 ];
+ int sy = source[ 0x4/2 ];
+ int attr = source[ 0x6/2 ];
- int dimx = (attr >> 8) & 0xff;
- int dimy = (attr >> 0) & 0xff;
+ int dimx = (attr >> 8) & 0xff;
+ int dimy = (attr >> 0) & 0xff;
if (!sx && !code)
return;
@@ -215,18 +215,18 @@ WRITE16_MEMBER(astrocorp_state::showhand_outputs_w)
{
if (ACCESSING_BITS_0_7)
{
- coin_counter_w(machine(), 0, (data & 0x0004)); // coin counter
- set_led_status(machine(), 0, (data & 0x0008)); // you win
+ coin_counter_w(machine(), 0, (data & 0x0004)); // coin counter
+ set_led_status(machine(), 0, (data & 0x0008)); // you win
if ((data & 0x0010)) increment_dispensed_tickets(machine(), 1); // coin out
- set_led_status(machine(), 1, (data & 0x0020)); // coin/hopper jam
+ set_led_status(machine(), 1, (data & 0x0020)); // coin/hopper jam
}
if (ACCESSING_BITS_8_15)
{
- set_led_status(machine(), 2, (data & 0x0100)); // bet
- set_led_status(machine(), 3, (data & 0x0800)); // start
- set_led_status(machine(), 4, (data & 0x1000)); // ? select/choose
- set_led_status(machine(), 5, (data & 0x2000)); // ? select/choose
- set_led_status(machine(), 6, (data & 0x4000)); // look
+ set_led_status(machine(), 2, (data & 0x0100)); // bet
+ set_led_status(machine(), 3, (data & 0x0800)); // start
+ set_led_status(machine(), 4, (data & 0x1000)); // ? select/choose
+ set_led_status(machine(), 5, (data & 0x2000)); // ? select/choose
+ set_led_status(machine(), 6, (data & 0x4000)); // look
}
// popmessage("%04X",data);
}
@@ -251,23 +251,23 @@ WRITE16_MEMBER(astrocorp_state::skilldrp_outputs_w)
if (ACCESSING_BITS_0_7)
{
- coin_counter_w(machine(), 0, (data & 0x0001)); // key in |
- coin_counter_w(machine(), 0, (data & 0x0002)); // coin in |- manual shows 1 in- and 1 out- counter
- coin_counter_w(machine(), 1, (data & 0x0004)); // key out |
- machine().device<ticket_dispenser_device>("hopper")->write(space, 0, (data & 0x0008)<<4); // hopper motor?
+ coin_counter_w(machine(), 0, (data & 0x0001)); // key in |
+ coin_counter_w(machine(), 0, (data & 0x0002)); // coin in |- manual shows 1 in- and 1 out- counter
+ coin_counter_w(machine(), 1, (data & 0x0004)); // key out |
+ machine().device<ticket_dispenser_device>("hopper")->write(space, 0, (data & 0x0008)<<4); // hopper motor?
// (data & 0x0010) // hopper?
- set_led_status(machine(), 0, (data & 0x0020)); // error lamp (coin/hopper jam: "call attendant")
- machine().device<ticket_dispenser_device>("ticket")->write(space, 0, data & 0x0080); // ticket motor?
+ set_led_status(machine(), 0, (data & 0x0020)); // error lamp (coin/hopper jam: "call attendant")
+ machine().device<ticket_dispenser_device>("ticket")->write(space, 0, data & 0x0080); // ticket motor?
}
if (ACCESSING_BITS_8_15)
{
// lamps:
- set_led_status(machine(), 1, (data & 0x0100)); // select
- set_led_status(machine(), 2, (data & 0x0400)); // take
- set_led_status(machine(), 3, (data & 0x0800)); // bet
- set_led_status(machine(), 4, (data & 0x1000)); // start
- set_led_status(machine(), 5, (data & 0x4000)); // win / test
- set_led_status(machine(), 6, (data & 0x8000)); // ticket?
+ set_led_status(machine(), 1, (data & 0x0100)); // select
+ set_led_status(machine(), 2, (data & 0x0400)); // take
+ set_led_status(machine(), 3, (data & 0x0800)); // bet
+ set_led_status(machine(), 4, (data & 0x1000)); // start
+ set_led_status(machine(), 5, (data & 0x4000)); // win / test
+ set_led_status(machine(), 6, (data & 0x8000)); // ticket?
}
// popmessage("%04X",data);
@@ -283,7 +283,7 @@ WRITE16_MEMBER(astrocorp_state::astrocorp_screen_enable_w)
READ16_MEMBER(astrocorp_state::astrocorp_unk_r)
{
- return 0xffff; // bit 3?
+ return 0xffff; // bit 3?
}
// 5-6-5 Palette: BBBBB-GGGGGG-RRRRR
@@ -306,7 +306,7 @@ static ADDRESS_MAP_START( showhand_map, AS_PROGRAM, 16, astrocorp_state )
AM_RANGE( 0x05a000, 0x05a001 ) AM_WRITE(showhand_outputs_w)
AM_RANGE( 0x05e000, 0x05e001 ) AM_READ_PORT("EEPROMIN")
AM_RANGE( 0x060000, 0x0601ff ) AM_RAM_WRITE(astrocorp_palette_w) AM_SHARE("paletteram")
- AM_RANGE( 0x070000, 0x073fff ) AM_RAM AM_SHARE("nvram") // battery
+ AM_RANGE( 0x070000, 0x073fff ) AM_RAM AM_SHARE("nvram") // battery
AM_RANGE( 0x080000, 0x080001 ) AM_WRITE(astrocorp_sound_bank_w)
AM_RANGE( 0x0a0000, 0x0a0001 ) AM_WRITE(astrocorp_screen_enable_w)
AM_RANGE( 0x0d0000, 0x0d0001 ) AM_READ(astrocorp_unk_r) AM_DEVWRITE8("oki", okim6295_device, write, 0xff00)
@@ -322,7 +322,7 @@ static ADDRESS_MAP_START( showhanc_map, AS_PROGRAM, 16, astrocorp_state )
AM_RANGE( 0x088000, 0x088001 ) AM_WRITE(astrocorp_eeprom_w)
AM_RANGE( 0x08a000, 0x08a001 ) AM_WRITE(showhand_outputs_w)
AM_RANGE( 0x08e000, 0x08e001 ) AM_READ_PORT("EEPROMIN")
- AM_RANGE( 0x090000, 0x093fff ) AM_RAM AM_SHARE("nvram") // battery
+ AM_RANGE( 0x090000, 0x093fff ) AM_RAM AM_SHARE("nvram") // battery
AM_RANGE( 0x0a0000, 0x0a0001 ) AM_WRITE(astrocorp_screen_enable_w)
AM_RANGE( 0x0e0000, 0x0e0001 ) AM_READ(astrocorp_unk_r) AM_DEVWRITE8("oki", okim6295_device, write, 0xff00)
ADDRESS_MAP_END
@@ -337,14 +337,14 @@ static ADDRESS_MAP_START( skilldrp_map, AS_PROGRAM, 16, astrocorp_state )
AM_RANGE( 0x20e000, 0x20e001 ) AM_READ_PORT("EEPROMIN")
AM_RANGE( 0x380000, 0x3801ff ) AM_RAM_WRITE(astrocorp_palette_w) AM_SHARE("paletteram")
AM_RANGE( 0x400000, 0x400001 ) AM_WRITE(astrocorp_screen_enable_w)
- AM_RANGE( 0x500000, 0x507fff ) AM_RAM AM_SHARE("nvram") // battery
+ AM_RANGE( 0x500000, 0x507fff ) AM_RAM AM_SHARE("nvram") // battery
AM_RANGE( 0x580000, 0x580001 ) AM_WRITE(skilldrp_sound_bank_w)
AM_RANGE( 0x600000, 0x600001 ) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
ADDRESS_MAP_END
static ADDRESS_MAP_START( speeddrp_map, AS_PROGRAM, 16, astrocorp_state )
AM_RANGE( 0x000000, 0x01ffff ) AM_ROM
- AM_RANGE( 0x280000, 0x283fff ) AM_RAM AM_SHARE("nvram") // battery
+ AM_RANGE( 0x280000, 0x283fff ) AM_RAM AM_SHARE("nvram") // battery
AM_RANGE( 0x380000, 0x380fff ) AM_RAM AM_SHARE("spriteram")
AM_RANGE( 0x382000, 0x382001 ) AM_WRITE(astrocorp_draw_sprites_w)
AM_RANGE( 0x384000, 0x384001 ) AM_READ_PORT("INPUTS")
@@ -362,23 +362,23 @@ ADDRESS_MAP_END
***************************************************************************/
static INPUT_PORTS_START( showhand )
- PORT_START("INPUTS") // 54000
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin
- PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Payout") PORT_CODE(KEYCODE_F1) // payout (must be 0 on startup)
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Bet / Double")
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Look / Small")
- PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW ) // settings
- PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
- PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL ) // coin sensor
- PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Yes / Big")
- PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hold1") // HOLD1 in test mode
- PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Select")
- PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Take")
- PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("Reset Settings") // when 1 in test mode: reset settings (must be 0 on startup)
- PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
- PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_COIN2 ) // key in
- PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) // coin sensor
+ PORT_START("INPUTS") // 54000
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin
+ PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Payout") PORT_CODE(KEYCODE_F1) // payout (must be 0 on startup)
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Bet / Double")
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Look / Small")
+ PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW ) // settings
+ PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
+ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL ) // coin sensor
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Yes / Big")
+ PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hold1") // HOLD1 in test mode
+ PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Select")
+ PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Take")
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("Reset Settings") // when 1 in test mode: reset settings (must be 0 on startup)
+ PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // ?
+ PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_COIN2 ) // key in
+ PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) // coin sensor
PORT_START( "EEPROMIN" )
PORT_BIT( 0xfff7, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -391,22 +391,22 @@ static INPUT_PORTS_START( showhand )
INPUT_PORTS_END
static INPUT_PORTS_START( showhanc )
- PORT_START("INPUTS") // 84000
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin
- PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Payout") PORT_CODE(KEYCODE_F1) // payout (must be 0 on startup)
+ PORT_START("INPUTS") // 84000
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) // coin
+ PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Payout") PORT_CODE(KEYCODE_F1) // payout (must be 0 on startup)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Bet / Double")
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Select")
- PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW ) // settings
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Bet / Double")
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Select")
+ PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW ) // settings
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Take") // HOLD1 in test mode
+ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start / Take") // HOLD1 in test mode
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Look / Small / Exit") // HOLD5 in test mode
- PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Hold2") // HOLD2 in test mode
- PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Yes / Big") // HOLD4 in test mode
- PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("Reset Settings") // when 1 in test mode: reset settings (must be 0 on startup)
- PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_SPECIAL ) // must be 0 for inputs to work
- PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // key in (shows an error)
+ PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Look / Small / Exit") // HOLD5 in test mode
+ PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Hold2") // HOLD2 in test mode
+ PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Yes / Big") // HOLD4 in test mode
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("Reset Settings") // when 1 in test mode: reset settings (must be 0 on startup)
+ PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_SPECIAL ) // must be 0 for inputs to work
+ PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) // key in (shows an error)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START( "EEPROMIN" )
@@ -421,21 +421,21 @@ INPUT_PORTS_END
static INPUT_PORTS_START( skilldrp )
PORT_START("INPUTS")
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5)
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE )
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START3 ) PORT_NAME("Select / Double")
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START3 ) PORT_NAME("Select / Double")
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("Ticket Out")
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("Ticket Out")
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Bet")
- PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) // ticket sw
+ PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Bet")
+ PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("ticket", ticket_dispenser_device, line_r) // ticket sw
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK )
- PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) // hopper sw
+ PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) // hopper sw
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
PORT_START( "EEPROMIN" )
@@ -472,7 +472,7 @@ GFXDECODE_END
Machine Drivers
***************************************************************************/
-static const UINT16 showhand_default_eeprom[15] = {0x0001,0x0007,0x000a,0x0003,0x0000,0x0009,0x0003,0x0000,0x0002,0x0001,0x0000,0x0000,0x0000,0x0000,0x0000};
+static const UINT16 showhand_default_eeprom[15] = {0x0001,0x0007,0x000a,0x0003,0x0000,0x0009,0x0003,0x0000,0x0002,0x0001,0x0000,0x0000,0x0000,0x0000,0x0000};
static MACHINE_CONFIG_START( showhand, astrocorp_state )
@@ -487,7 +487,7 @@ static MACHINE_CONFIG_START( showhand, astrocorp_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(58.846) // measured on pcb
+ MCFG_SCREEN_REFRESH_RATE(58.846) // measured on pcb
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
MCFG_SCREEN_SIZE(320, 240)
MCFG_SCREEN_VISIBLE_AREA(0, 320-1, 0, 240-1)
@@ -526,7 +526,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(astrocorp_state::skilldrp_scanline)
static MACHINE_CONFIG_START( skilldrp, astrocorp_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_24MHz / 2) // JX-1689F1028N GRX586.V5
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_24MHz / 2) // JX-1689F1028N GRX586.V5
MCFG_CPU_PROGRAM_MAP(skilldrp_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", astrocorp_state, skilldrp_scanline, "screen", 0, 1)
@@ -829,8 +829,8 @@ MX29F1610MC-10
ROM_START( westvent )
ROM_REGION( 0x40000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "1_w.v.aa.02.d.bin", 0x00000, 0x20000, CRC(5e208192) SHA1(5a35a419fe95513b68423d4eb6c77fdd375667f3) ) // good?
- ROM_LOAD16_BYTE( "2_w.v.aa.02.d.bin", 0x00001, 0x20000, BAD_DUMP CRC(f56d3ead) SHA1(2cf8960eab221cfce1c7ac6a20d002c4b05d8cc6) ) // FIXED BITS (xxxxxx0xxxxxxxxx)
+ ROM_LOAD16_BYTE( "1_w.v.aa.02.d.bin", 0x00000, 0x20000, CRC(5e208192) SHA1(5a35a419fe95513b68423d4eb6c77fdd375667f3) ) // good?
+ ROM_LOAD16_BYTE( "2_w.v.aa.02.d.bin", 0x00001, 0x20000, BAD_DUMP CRC(f56d3ead) SHA1(2cf8960eab221cfce1c7ac6a20d002c4b05d8cc6) ) // FIXED BITS (xxxxxx0xxxxxxxxx)
ROM_REGION( 0x600000, "sprites", 0 )
ROM_LOAD( "top.bin", 0x000000, 0x200000, CRC(75bbaae0) SHA1(ef35775dd481ff343df1ee071ccd52b024d084b7) )
@@ -915,7 +915,7 @@ ROM_START( winbingo )
ROM_REGION( 0x400000, "sprites", ROMREGION_ERASE )
ROM_LOAD( "mx29f1610mc.u26", 0x000000, 0x200000, CRC(ad1f61e7) SHA1(845aa01d49c50bcadaed16d76c0dd9131a425b46) )
ROM_LOAD( "mx29f1610mc.u30", 0x200000, 0x200000, CRC(31613d99) SHA1(1c720f8d981c3e9cb9d9b3b27eb95e7f72ccfc93) )
-// ROM_LOAD( "mx29f1610mc.u30.bad.dump", 0x200000, 0x0a0000, BAD_DUMP CRC(6da439c5) SHA1(6afc0c800fe57b9b34ca317f4d1c040b11d3d988) )
+// ROM_LOAD( "mx29f1610mc.u30.bad.dump", 0x200000, 0x0a0000, BAD_DUMP CRC(6da439c5) SHA1(6afc0c800fe57b9b34ca317f4d1c040b11d3d988) )
// U30 is a bad dump in this set, so use U30 from winbingoa (since U26 is the same too)
ROM_REGION( 0x80000, "oki", 0 )
@@ -938,7 +938,7 @@ ROM_END
/***************************************************************************
Hacher (graphics hack of Win Win Bingo Ver. EN.01.6?)
-
+
ASTRO M1.2 PCB with Astro F02 2005-02-18
***************************************************************************/
@@ -1114,14 +1114,14 @@ DRIVER_INIT_MEMBER(astrocorp_state,showhand)
#if 0
UINT16 *rom = (UINT16*)machine().root_device().memregion("maincpu")->base();
- rom[0x0a1a/2] = 0x6000; // hopper jam
+ rom[0x0a1a/2] = 0x6000; // hopper jam
- rom[0x1494/2] = 0x4e71; // enable full test mode
- rom[0x1496/2] = 0x4e71; // ""
- rom[0x1498/2] = 0x4e71; // ""
+ rom[0x1494/2] = 0x4e71; // enable full test mode
+ rom[0x1496/2] = 0x4e71; // ""
+ rom[0x1498/2] = 0x4e71; // ""
- rom[0x12f6/2] = 0x6000; // rom error
- rom[0x4916/2] = 0x6000; // rom error
+ rom[0x12f6/2] = 0x6000; // rom error
+ rom[0x4916/2] = 0x6000; // rom error
#endif
}
@@ -1130,11 +1130,11 @@ DRIVER_INIT_MEMBER(astrocorp_state,showhanc)
#if 0
UINT16 *rom = (UINT16*)machine().root_device().memregion("maincpu")->base();
- rom[0x14d4/2] = 0x4e71; // enable full test mode
- rom[0x14d6/2] = 0x4e71; // ""
- rom[0x14d8/2] = 0x4e71; // ""
+ rom[0x14d4/2] = 0x4e71; // enable full test mode
+ rom[0x14d6/2] = 0x4e71; // ""
+ rom[0x14d8/2] = 0x4e71; // ""
- rom[0x139c/2] = 0x6000; // rom error
+ rom[0x139c/2] = 0x6000; // rom error
#endif
}
diff --git a/src/mame/drivers/astrof.c b/src/mame/drivers/astrof.c
index 88d89c0d60f..4f2b103cfea 100644
--- a/src/mame/drivers/astrof.c
+++ b/src/mame/drivers/astrof.c
@@ -61,15 +61,15 @@
#include "includes/astrof.h"
-#define MASTER_CLOCK (XTAL_10_595MHz)
-#define MAIN_CPU_CLOCK (MASTER_CLOCK / 16)
-#define PIXEL_CLOCK (MASTER_CLOCK / 2)
-#define HTOTAL (0x150)
-#define HBEND (0x000)
-#define HBSTART (0x100)
-#define VTOTAL (0x118)
-#define VBEND (0x000)
-#define VBSTART (0x100)
+#define MASTER_CLOCK (XTAL_10_595MHz)
+#define MAIN_CPU_CLOCK (MASTER_CLOCK / 16)
+#define PIXEL_CLOCK (MASTER_CLOCK / 2)
+#define HTOTAL (0x150)
+#define HBEND (0x000)
+#define HBSTART (0x100)
+#define VTOTAL (0x118)
+#define VBEND (0x000)
+#define VBSTART (0x100)
@@ -128,8 +128,8 @@ CUSTOM_INPUT_MEMBER(astrof_state::astrof_p2_controls_r)
UINT32 ret;
/* on an upright cabinet, a single set of controls
- is connected to both sets of pins on the edge
- connector */
+ is connected to both sets of pins on the edge
+ connector */
if (ioport("CAB")->read())
ret = ioport("P2")->read();
else
@@ -144,8 +144,8 @@ CUSTOM_INPUT_MEMBER(astrof_state::tomahawk_controls_r)
UINT32 ret;
/* on a cocktail cabinet, two sets of controls are
- multiplexed on a single set of inputs
- (not verified on pcb) */
+ multiplexed on a single set of inputs
+ (not verified on pcb) */
if (m_flipscreen)
ret = ioport("P2")->read();
@@ -163,8 +163,8 @@ CUSTOM_INPUT_MEMBER(astrof_state::tomahawk_controls_r)
*
*************************************/
-#define ASTROF_NUM_PENS (0x10)
-#define TOMAHAWK_NUM_PENS (0x20)
+#define ASTROF_NUM_PENS (0x10)
+#define TOMAHAWK_NUM_PENS (0x20)
void astrof_state::video_start()
@@ -188,7 +188,7 @@ static rgb_t make_pen( running_machine &machine, UINT8 data )
UINT8 b2_bit = (data >> 5) & 0x01;
/* this is probably not quite right, but I don't have the
- knowledge to figure out the actual weights - ZV */
+ knowledge to figure out the actual weights - ZV */
UINT8 r = (0xc0 * r1_bit) + (0x3f * r2_bit);
UINT8 g = (0xc0 * g1_bit) + (0x3f * g2_bit);
UINT8 b = (0xc0 * b1_bit) + (0x3f * b2_bit);
@@ -1090,7 +1090,7 @@ ROM_START( abattle )
ROM_REGION( 0x0100, "proms", 0 )
ROM_LOAD( "8f-clr.bin", 0x0000, 0x0100, CRC(3bf3ccb0) SHA1(d61d19d38045f42a9adecf295e479fee239bed48) )
- ROM_REGION( 0x0100, "user1", 0 ) /* decryption table */
+ ROM_REGION( 0x0100, "user1", 0 ) /* decryption table */
ROM_LOAD( "2h-prot.bin", 0x0000, 0x0100, CRC(a6bdd18c) SHA1(438bfc543730afdb531204585f17a68ddc03ded0) )
ROM_END
@@ -1113,7 +1113,7 @@ ROM_START( abattle2 )
ROM_REGION( 0x0100, "proms", 0 )
ROM_LOAD( "8f-clr.bin", 0x0000, 0x0100, CRC(3bf3ccb0) SHA1(d61d19d38045f42a9adecf295e479fee239bed48) )
- ROM_REGION( 0x0100, "user1", 0 ) /* decryption table */
+ ROM_REGION( 0x0100, "user1", 0 ) /* decryption table */
ROM_LOAD( "2h-prot.bin", 0x0000, 0x0100, CRC(a6bdd18c) SHA1(438bfc543730afdb531204585f17a68ddc03ded0) )
ROM_END
diff --git a/src/mame/drivers/astropc.c b/src/mame/drivers/astropc.c
index 84a34a16c52..c8143a0795e 100644
--- a/src/mame/drivers/astropc.c
+++ b/src/mame/drivers/astropc.c
@@ -18,7 +18,7 @@ class astropc_state : public driver_device
public:
astropc_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -52,7 +52,7 @@ MACHINE_CONFIG_END
ROM_START( blackbd )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -69,7 +69,7 @@ ROM_END
ROM_START( blackbda )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -84,7 +84,7 @@ ROM_START( blackbda )
ROM_END
ROM_START( blackbdb )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -96,7 +96,7 @@ ROM_START( blackbdb )
ROM_END
ROM_START( dslayrr )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -108,7 +108,7 @@ ROM_START( dslayrr )
ROM_END
ROM_START( dslayrra )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -120,7 +120,7 @@ ROM_START( dslayrra )
ROM_END
ROM_START( hawaii )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -132,7 +132,7 @@ ROM_START( hawaii )
ROM_END
ROM_START( oligam )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -144,7 +144,7 @@ ROM_START( oligam )
ROM_END
ROM_START( rasce )
- ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
+ ROM_REGION32_LE(0x40000, "bios", 0) /* motherboard bios */ // wasn't in this set!
ROM_LOAD( "bios.002", 0x0000, 0x040000, CRC(45333544) SHA1(bcc03b4f77b2e447192a1e5ed9f4cc09d0289714) )
ROM_REGION(0x20000, "rom", 0)
@@ -161,15 +161,15 @@ DRIVER_INIT_MEMBER(astropc_state,astropc)
}
-GAME( 2002, blackbd, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Black Beard (Russia, set 1)", GAME_IS_SKELETON )
+GAME( 2002, blackbd, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Black Beard (Russia, set 1)", GAME_IS_SKELETON )
GAME( 2002, blackbda, blackbd, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Black Beard (Russia, set 2)", GAME_IS_SKELETON )
GAME( 2002, blackbdb, blackbd, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Black Beard (Russia, set 3)", GAME_IS_SKELETON )
-GAME( 2002, dslayrr, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Dragon Slayer (Russia, set 1)", GAME_IS_SKELETON )
-GAME( 2002, dslayrra, dslayrr, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Dragon Slayer (Russia, set 2)", GAME_IS_SKELETON )
+GAME( 2002, dslayrr, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Dragon Slayer (Russia, set 1)", GAME_IS_SKELETON )
+GAME( 2002, dslayrra, dslayrr, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Dragon Slayer (Russia, set 2)", GAME_IS_SKELETON )
-GAME( 2002, hawaii, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Hawaii (Russia)", GAME_IS_SKELETON )
+GAME( 2002, hawaii, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Hawaii (Russia)", GAME_IS_SKELETON )
-GAME( 2002, oligam, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Olympian Games (Russia)", GAME_IS_SKELETON )
+GAME( 2002, oligam, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Olympian Games (Russia)", GAME_IS_SKELETON )
-GAME( 2002, rasce, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Ra Sceptor (Russia)", GAME_IS_SKELETON )
+GAME( 2002, rasce, 0, astropc, astropc, astropc_state, astropc, ROT0, "Astro", "Ra Sceptor (Russia)", GAME_IS_SKELETON )
diff --git a/src/mame/drivers/asuka.c b/src/mame/drivers/asuka.c
index bfb4a1dc0e3..f8a02acb7ac 100644
--- a/src/mame/drivers/asuka.c
+++ b/src/mame/drivers/asuka.c
@@ -323,24 +323,24 @@ static ADDRESS_MAP_START( bonzeadv_map, AS_PROGRAM, 16, asuka_state )
AM_RANGE(0x800000, 0x8007ff) AM_READWRITE_LEGACY(bonzeadv_cchip_ram_r, bonzeadv_cchip_ram_w)
AM_RANGE(0x800802, 0x800803) AM_READWRITE_LEGACY(bonzeadv_cchip_ctrl_r, bonzeadv_cchip_ctrl_w)
AM_RANGE(0x800c00, 0x800c01) AM_WRITE_LEGACY(bonzeadv_cchip_bank_w)
- AM_RANGE(0xc00000, 0xc0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
+ AM_RANGE(0xc00000, 0xc0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
AM_RANGE(0xc20000, 0xc2000f) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_ctrl_word_r, tc0100scn_ctrl_word_w)
- AM_RANGE(0xd00000, 0xd03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
+ AM_RANGE(0xd00000, 0xd03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
ADDRESS_MAP_END
static ADDRESS_MAP_START( asuka_map, AS_PROGRAM, 16, asuka_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x100000, 0x103fff) AM_RAM
- AM_RANGE(0x1076f0, 0x1076f1) AM_READNOP /* Mofflott init does dummy reads here */
+ AM_RANGE(0x1076f0, 0x1076f1) AM_READNOP /* Mofflott init does dummy reads here */
AM_RANGE(0x200000, 0x20000f) AM_DEVREADWRITE_LEGACY("tc0110pcr", tc0110pcr_word_r, tc0110pcr_step1_word_w)
AM_RANGE(0x3a0000, 0x3a0003) AM_WRITE(asuka_spritectrl_w)
AM_RANGE(0x3e0000, 0x3e0001) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_port_w, 0x00ff)
AM_RANGE(0x3e0002, 0x3e0003) AM_DEVREADWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff)
AM_RANGE(0x400000, 0x40000f) AM_DEVREADWRITE8_LEGACY("tc0220ioc", tc0220ioc_r, tc0220ioc_w, 0x00ff)
- AM_RANGE(0xc00000, 0xc0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
- AM_RANGE(0xc10000, 0xc103ff) AM_WRITENOP /* error in Asuka init code */
+ AM_RANGE(0xc00000, 0xc0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
+ AM_RANGE(0xc10000, 0xc103ff) AM_WRITENOP /* error in Asuka init code */
AM_RANGE(0xc20000, 0xc2000f) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_ctrl_word_r, tc0100scn_ctrl_word_w)
- AM_RANGE(0xd00000, 0xd03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
+ AM_RANGE(0xd00000, 0xd03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
ADDRESS_MAP_END
static ADDRESS_MAP_START( cadash_map, AS_PROGRAM, 16, asuka_state )
@@ -349,26 +349,26 @@ static ADDRESS_MAP_START( cadash_map, AS_PROGRAM, 16, asuka_state )
AM_RANGE(0x0c0000, 0x0c0001) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_port_w, 0x00ff)
AM_RANGE(0x0c0002, 0x0c0003) AM_DEVREADWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff)
AM_RANGE(0x100000, 0x107fff) AM_RAM
- AM_RANGE(0x800000, 0x800fff) AM_READWRITE(cadash_share_r,cadash_share_w) /* network ram */
+ AM_RANGE(0x800000, 0x800fff) AM_READWRITE(cadash_share_r,cadash_share_w) /* network ram */
AM_RANGE(0x900000, 0x90000f) AM_DEVREADWRITE8_LEGACY("tc0220ioc", tc0220ioc_r, tc0220ioc_w, 0x00ff)
AM_RANGE(0xa00000, 0xa0000f) AM_DEVREADWRITE_LEGACY("tc0110pcr", tc0110pcr_word_r, tc0110pcr_step1_4bpg_word_w)
- AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
- AM_RANGE(0xc00000, 0xc0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
+ AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
+ AM_RANGE(0xc00000, 0xc0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
AM_RANGE(0xc20000, 0xc2000f) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_ctrl_word_r, tc0100scn_ctrl_word_w)
ADDRESS_MAP_END
-static ADDRESS_MAP_START( eto_map, AS_PROGRAM, 16 /* N.B. tc100scn mirror overlaps spriteram */, asuka_state )
+static ADDRESS_MAP_START( eto_map, AS_PROGRAM, 16 /* N.B. tc100scn mirror overlaps spriteram */, asuka_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0x100000, 0x10000f) AM_DEVREADWRITE_LEGACY("tc0110pcr", tc0110pcr_word_r, tc0110pcr_step1_word_w)
AM_RANGE(0x200000, 0x203fff) AM_RAM
AM_RANGE(0x300000, 0x30000f) AM_DEVREADWRITE8_LEGACY("tc0220ioc", tc0220ioc_r, tc0220ioc_w, 0x00ff)
- AM_RANGE(0x400000, 0x40000f) AM_DEVREAD8_LEGACY("tc0220ioc", tc0220ioc_r, 0x00ff) /* service mode mirror */
+ AM_RANGE(0x400000, 0x40000f) AM_DEVREAD8_LEGACY("tc0220ioc", tc0220ioc_r, 0x00ff) /* service mode mirror */
AM_RANGE(0x4a0000, 0x4a0003) AM_WRITE(asuka_spritectrl_w)
AM_RANGE(0x4e0000, 0x4e0001) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_port_w, 0x00ff)
AM_RANGE(0x4e0002, 0x4e0003) AM_DEVREADWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, tc0140syt_comm_w, 0x00ff)
- AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
+ AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE_LEGACY("pc090oj", pc090oj_word_r, pc090oj_word_w) /* sprite ram */
AM_RANGE(0xc00000, 0xc0ffff) AM_DEVWRITE_LEGACY("tc0100scn", tc0100scn_word_w)
- AM_RANGE(0xd00000, 0xd0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
+ AM_RANGE(0xd00000, 0xd0ffff) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_word_r, tc0100scn_word_w) /* tilemaps */
AM_RANGE(0xd20000, 0xd2000f) AM_DEVREADWRITE_LEGACY("tc0100scn", tc0100scn_ctrl_word_r, tc0100scn_ctrl_word_w)
ADDRESS_MAP_END
@@ -459,20 +459,20 @@ static INPUT_PORTS_START( bonzeadv )
/* 0x3b0000 -> 0x10cb7e ($b7e,A5) */
PORT_START("DSWB")
TAITO_DIFFICULTY_LOC(SWB)
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4") /* see notes */
- PORT_DIPSETTING( 0x08, "40k 100k" ) /* 300k 1000k 1500k 2000k 2500k 3000k 3500k 5000k */
- PORT_DIPSETTING( 0x0c, "50k 150k" ) /* 500k 1000k 2000k 3000k 4000k 5000k 6000k 7000k */
- PORT_DIPSETTING( 0x04, "60k 200k" ) /* 500k 1000k 2000k 3000k 4000k 5000k 6000k 7000k */
- PORT_DIPSETTING( 0x00, "80k 250k" ) /* 500k 1000k 2000k 3000k 4000k 5000k 6000k 7000k */
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4") /* see notes */
+ PORT_DIPSETTING( 0x08, "40k 100k" ) /* 300k 1000k 1500k 2000k 2500k 3000k 3500k 5000k */
+ PORT_DIPSETTING( 0x0c, "50k 150k" ) /* 500k 1000k 2000k 3000k 4000k 5000k 6000k 7000k */
+ PORT_DIPSETTING( 0x04, "60k 200k" ) /* 500k 1000k 2000k 3000k 4000k 5000k 6000k 7000k */
+ PORT_DIPSETTING( 0x00, "80k 250k" ) /* 500k 1000k 2000k 3000k 4000k 5000k 6000k 7000k */
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
PORT_DIPSETTING( 0x20, "2" )
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x10, "4" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWB:7")
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SWB:8" ) /* see notes */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SWB:8" ) /* see notes */
PORT_START("800007")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
@@ -520,17 +520,17 @@ static INPUT_PORTS_START( asuka )
/* 0x400002 -> 0x10361c */
PORT_START("DSWB")
TAITO_DIFFICULTY_LOC(SWB)
- PORT_DIPNAME( 0x0c, 0x0c, "Bonus Points" ) PORT_DIPLOCATION("SWB:3,4") /* for each plane shot after each end of level boss */
+ PORT_DIPNAME( 0x0c, 0x0c, "Bonus Points" ) PORT_DIPLOCATION("SWB:3,4") /* for each plane shot after each end of level boss */
PORT_DIPSETTING( 0x0c, "500" )
PORT_DIPSETTING( 0x08, "1500" )
PORT_DIPSETTING( 0x04, "2000" )
PORT_DIPSETTING( 0x00, "2500" )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
PORT_DIPSETTING( 0x10, "1" )
PORT_DIPSETTING( 0x20, "2" )
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x00, "4" )
- PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWB:7,8")
+ PORT_DIPNAME( 0xc0, 0x80, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWB:7,8")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0xc0, "Up To Level 2" )
PORT_DIPSETTING( 0x80, "Up To Level 3" )
@@ -563,22 +563,22 @@ static INPUT_PORTS_START( mofflott )
/* 0x400002 -> 0x100a93.b */
PORT_MODIFY("DSWB")
TAITO_DIFFICULTY_LOC(SWB)
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4")
PORT_DIPSETTING( 0x0c, "20k And Every 50k" )
PORT_DIPSETTING( 0x08, "50k And Every 100k" )
PORT_DIPSETTING( 0x04, "100k Only" )
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x10, "4" )
PORT_DIPSETTING( 0x20, "5" )
- PORT_DIPNAME( 0x40, 0x40, "Invulnerability (Cheat)") PORT_DIPLOCATION("SWB:7")
+ PORT_DIPNAME( 0x40, 0x40, "Invulnerability (Cheat)") PORT_DIPLOCATION("SWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Number Of Keys" ) PORT_DIPLOCATION("SWB:8")
- PORT_DIPSETTING( 0x00, "B 14" ) /* Hard */
- PORT_DIPSETTING( 0x80, "A 16" ) /* Easy */
+ PORT_DIPNAME( 0x80, 0x80, "Number Of Keys" ) PORT_DIPLOCATION("SWB:8")
+ PORT_DIPSETTING( 0x00, "B 14" ) /* Hard */
+ PORT_DIPSETTING( 0x80, "A 16" ) /* Easy */
INPUT_PORTS_END
/* different players and system inputs than 'asuka' */
@@ -591,7 +591,7 @@ static INPUT_PORTS_START( cadash )
/* 0x900002 -> 0x10317c ($317c,A5) */
PORT_START("DSWB")
TAITO_DIFFICULTY_LOC(SWB)
- PORT_DIPNAME( 0x0c, 0x0c, "Starting Time" ) PORT_DIPLOCATION("SWB:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, "Starting Time" ) PORT_DIPLOCATION("SWB:3,4")
PORT_DIPSETTING( 0x00, "5:00" )
PORT_DIPSETTING( 0x04, "6:00" )
PORT_DIPSETTING( 0x0c, "7:00" )
@@ -607,7 +607,7 @@ static INPUT_PORTS_START( cadash )
PORT_DIPSETTING( 0x10, "Default - 1:00" )
PORT_DIPSETTING( 0x30, "Default" )
PORT_DIPSETTING( 0x20, "Default + 1:00" )
- PORT_DIPNAME( 0xc0, 0xc0, "Communication Mode" ) PORT_DIPLOCATION("SWB:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, "Communication Mode" ) PORT_DIPLOCATION("SWB:7,8")
PORT_DIPSETTING( 0xc0, "Stand alone" )
PORT_DIPSETTING( 0x80, "Master" )
PORT_DIPSETTING( 0x00, "Slave" )
@@ -649,10 +649,10 @@ static INPUT_PORTS_START( galmedes )
/* 0x400000 -> 0x100982 */
PORT_MODIFY("DSWA")
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:5,6")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x00)
PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x00)
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x80)
@@ -661,7 +661,7 @@ static INPUT_PORTS_START( galmedes )
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x00)
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x80)
PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x80)
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWA:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWA:7,8")
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x80)
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x80)
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) ) PORT_CONDITION("DSWB",0x80,EQUALS,0x80)
@@ -674,20 +674,20 @@ static INPUT_PORTS_START( galmedes )
/* 0x400002 -> 0x100984 */
PORT_MODIFY("DSWB")
TAITO_DIFFICULTY_LOC(SWB)
- PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4")
+ PORT_DIPNAME( 0x0c, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4")
PORT_DIPSETTING( 0x08, "Every 100k" )
PORT_DIPSETTING( 0x0c, "100k And Every 200k" )
PORT_DIPSETTING( 0x04, "150k And Every 200k" )
PORT_DIPSETTING( 0x00, "Every 200k" )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
PORT_DIPSETTING( 0x20, "1" )
PORT_DIPSETTING( 0x10, "2" )
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x00, "4" )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SWB:7" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x80, 0x80, "Coin Mode" ) PORT_DIPLOCATION("SWB:8")
- PORT_DIPSETTING( 0x80, "Mode A (Japan)" ) /* Mode A is TAITO_COINAGE_JAPAN_OLD */
- PORT_DIPSETTING( 0x00, "Mode B (World)" ) /* Mode B is TAITO_COINAGE_WORLD */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SWB:7" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x80, 0x80, "Coin Mode" ) PORT_DIPLOCATION("SWB:8")
+ PORT_DIPSETTING( 0x80, "Mode A (Japan)" ) /* Mode A is TAITO_COINAGE_JAPAN_OLD */
+ PORT_DIPSETTING( 0x00, "Mode B (World)" ) /* Mode B is TAITO_COINAGE_WORLD */
INPUT_PORTS_END
static INPUT_PORTS_START( earthjkr )
@@ -696,17 +696,17 @@ static INPUT_PORTS_START( earthjkr )
/* 0x400002 -> 0x1009842 */
PORT_MODIFY("DSWB")
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4")
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:3,4")
PORT_DIPSETTING( 0x00, "100k and 300k" )
PORT_DIPSETTING( 0x08, "100k only" )
PORT_DIPSETTING( 0x04, "200k only" )
PORT_DIPSETTING( 0x0c, DEF_STR( None ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:5,6")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x30, "2" )
PORT_DIPSETTING( 0x20, "3" )
PORT_DIPSETTING( 0x10, "4" )
- PORT_DIPNAME( 0x40, 0x40, "Copyright" ) PORT_DIPLOCATION("SWB:7") /* code at 0x00b982 and 0x00dbce */
+ PORT_DIPNAME( 0x40, 0x40, "Copyright" ) PORT_DIPLOCATION("SWB:7") /* code at 0x00b982 and 0x00dbce */
PORT_DIPSETTING( 0x40, "Visco" ) /* Japan notice screen ON */
PORT_DIPSETTING( 0x00, "Visco (distributed by Romstar)" ) /* Japan notice screen OFF */
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SWB:8" )
@@ -721,7 +721,7 @@ static INPUT_PORTS_START( eto )
PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SWB:3" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SWB:4" )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SWB:5" )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SWB:6" ) /* value stored at 0x20090a but not read back */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SWB:6" ) /* value stored at 0x20090a but not read back */
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SWB:7" )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SWB:8" )
INPUT_PORTS_END
@@ -749,15 +749,15 @@ static const gfx_layout tilelayout =
4,
{ 0, 1, 2, 3 },
{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4,
- 10*4, 11*4, 8*4, 9*4, 14*4, 15*4, 12*4, 13*4 },
+ 10*4, 11*4, 8*4, 9*4, 14*4, 15*4, 12*4, 13*4 },
{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,
- 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
+ 8*64, 9*64, 10*64, 11*64, 12*64, 13*64, 14*64, 15*64 },
128*8
};
static GFXDECODE_START( asuka )
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 256 ) /* OBJ */
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 256 ) /* SCR */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 256 ) /* OBJ */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 256 ) /* SCR */
GFXDECODE_END
@@ -779,8 +779,8 @@ static const ym2610_interface ym2610_config =
static const msm5205_interface msm5205_config =
{
- asuka_msm5205_vck, /* VCK function */
- MSM5205_S48_4B /* 8 kHz */
+ asuka_msm5205_vck, /* VCK function */
+ MSM5205_S48_4B /* 8 kHz */
};
@@ -791,20 +791,20 @@ static const msm5205_interface msm5205_config =
static const tc0100scn_interface asuka_tc0100scn_intf =
{
"screen",
- 1, 2, /* gfxnum, txnum */
- 0, 0, /* x_offset, y_offset */
- 0, 0, /* flip_xoff, flip_yoff */
- 0, 0, /* flip_text_xoff, flip_text_yoff */
+ 1, 2, /* gfxnum, txnum */
+ 0, 0, /* x_offset, y_offset */
+ 0, 0, /* flip_xoff, flip_yoff */
+ 0, 0, /* flip_text_xoff, flip_text_yoff */
0, 0
};
static const tc0100scn_interface cadash_tc0100scn_intf =
{
"screen",
- 1, 2, /* gfxnum, txnum */
- 1, 0, /* x_offset, y_offset */
- 0, 0, /* flip_xoff, flip_yoff */
- 0, 0, /* flip_text_xoff, flip_text_yoff */
+ 1, 2, /* gfxnum, txnum */
+ 1, 0, /* x_offset, y_offset */
+ 0, 0, /* flip_xoff, flip_yoff */
+ 0, 0, /* flip_text_xoff, flip_text_yoff */
0, 0
};
@@ -875,7 +875,7 @@ void asuka_state::screen_eof_asuka(screen_device &screen, bool state)
static const tc0220ioc_interface asuka_io_intf =
{
DEVCB_INPUT_PORT("DSWA"), DEVCB_INPUT_PORT("DSWB"),
- DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_INPUT_PORT("IN2") /* port read handlers */
+ DEVCB_INPUT_PORT("IN0"), DEVCB_INPUT_PORT("IN1"), DEVCB_INPUT_PORT("IN2") /* port read handlers */
};
@@ -928,11 +928,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( asuka, asuka_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) /* verified on pcb */
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(asuka_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", asuka_state, irq5_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_16MHz/4) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_16MHz/4) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(z80_map)
@@ -975,14 +975,14 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( cadash, asuka_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_32MHz/2) /* 68000p12 running at 16Mhz, verified on pcb */
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_32MHz/2) /* 68000p12 running at 16Mhz, verified on pcb */
MCFG_CPU_PROGRAM_MAP(cadash_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", asuka_state, cadash_interrupt)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_8MHz/2) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(cadash_z80_map)
- MCFG_CPU_ADD("subcpu", Z180, 4000000) /* 4 MHz ??? */
+ MCFG_CPU_ADD("subcpu", Z180, 4000000) /* 4 MHz ??? */
MCFG_CPU_PROGRAM_MAP(cadash_sub_map)
MCFG_CPU_IO_MAP(cadash_sub_io)
@@ -1010,7 +1010,7 @@ static MACHINE_CONFIG_START( cadash, asuka_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_YM2151_ADD("ymsnd", XTAL_8MHz/2) /* verified on pcb */
+ MCFG_YM2151_ADD("ymsnd", XTAL_8MHz/2) /* verified on pcb */
MCFG_YM2151_IRQ_HANDLER(INPUTLINE("audiocpu", 0))
MCFG_YM2151_PORT_WRITE_HANDLER(WRITE8(asuka_state,sound_bankswitch_2151_w))
MCFG_SOUND_ROUTE(0, "mono", 0.50)
@@ -1022,11 +1022,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( mofflott, asuka_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 8000000) /* 8 MHz ??? */
+ MCFG_CPU_ADD("maincpu", M68000, 8000000) /* 8 MHz ??? */
MCFG_CPU_PROGRAM_MAP(asuka_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", asuka_state, irq5_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz ??? */
+ MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz ??? */
MCFG_CPU_PROGRAM_MAP(z80_map)
@@ -1044,7 +1044,7 @@ static MACHINE_CONFIG_START( mofflott, asuka_state )
MCFG_SCREEN_VBLANK_DRIVER(asuka_state, screen_eof_asuka)
MCFG_GFXDECODE(asuka)
- MCFG_PALETTE_LENGTH(4096) /* only Mofflott uses full palette space */
+ MCFG_PALETTE_LENGTH(4096) /* only Mofflott uses full palette space */
MCFG_PC090OJ_ADD("pc090oj", bonzeadv_pc090oj_intf)
MCFG_TC0100SCN_ADD("tc0100scn", cadash_tc0100scn_intf)
@@ -1069,11 +1069,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( galmedes, asuka_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 8000000) /* 8 MHz ??? */
+ MCFG_CPU_ADD("maincpu", M68000, 8000000) /* 8 MHz ??? */
MCFG_CPU_PROGRAM_MAP(asuka_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", asuka_state, irq5_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz ??? */
+ MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz ??? */
MCFG_CPU_PROGRAM_MAP(cadash_z80_map)
@@ -1091,7 +1091,7 @@ static MACHINE_CONFIG_START( galmedes, asuka_state )
MCFG_SCREEN_VBLANK_DRIVER(asuka_state, screen_eof_asuka)
MCFG_GFXDECODE(asuka)
- MCFG_PALETTE_LENGTH(4096) /* only Mofflott uses full palette space */
+ MCFG_PALETTE_LENGTH(4096) /* only Mofflott uses full palette space */
MCFG_PC090OJ_ADD("pc090oj", bonzeadv_pc090oj_intf)
MCFG_TC0100SCN_ADD("tc0100scn", cadash_tc0100scn_intf)
@@ -1112,11 +1112,11 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( eto, asuka_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 8000000) /* 8 MHz ??? */
+ MCFG_CPU_ADD("maincpu", M68000, 8000000) /* 8 MHz ??? */
MCFG_CPU_PROGRAM_MAP(eto_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", asuka_state, irq5_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz ??? */
+ MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz ??? */
MCFG_CPU_PROGRAM_MAP(cadash_z80_map)
@@ -1167,10 +1167,10 @@ ROM_START( bonzeadv )
ROM_LOAD16_WORD_SWAP( "b41-01.15", 0x80000, 0x80000, CRC(5d072fa4) SHA1(6ffe1b8531381eb6dd3f1fec18c91294a6aca9f6) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "b41-13.20", 0x00000, 0x04000, CRC(9e464254) SHA1(b6f6126b54c15320ecaa652d0eeabaa4cd94bd26) )
@@ -1178,7 +1178,7 @@ ROM_START( bonzeadv )
/* CPU3 - CCHIP aka TC0030CMD marked b41-05.43 */
- ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
ROM_LOAD( "b41-04.48", 0x00000, 0x80000, CRC(c668638f) SHA1(07238a6cb4d93ffaf6351657163b5d80f0dbf688) )
ROM_END
@@ -1192,10 +1192,10 @@ ROM_START( bonzeadvo )
ROM_LOAD16_WORD_SWAP( "b41-01.15", 0x80000, 0x80000, CRC(5d072fa4) SHA1(6ffe1b8531381eb6dd3f1fec18c91294a6aca9f6) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "b41-13.20", 0x00000, 0x04000, CRC(9e464254) SHA1(b6f6126b54c15320ecaa652d0eeabaa4cd94bd26) )
@@ -1203,7 +1203,7 @@ ROM_START( bonzeadvo )
/* CPU3 - CCHIP aka TC0030CMD marked b41-05.43 */
- ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
ROM_LOAD( "b41-04.48", 0x00000, 0x80000, CRC(c668638f) SHA1(07238a6cb4d93ffaf6351657163b5d80f0dbf688) )
ROM_END
@@ -1217,10 +1217,10 @@ ROM_START( bonzeadvu )
ROM_LOAD16_WORD_SWAP( "b41-01.15", 0x80000, 0x80000, CRC(5d072fa4) SHA1(6ffe1b8531381eb6dd3f1fec18c91294a6aca9f6) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "b41-13.20", 0x00000, 0x04000, CRC(9e464254) SHA1(b6f6126b54c15320ecaa652d0eeabaa4cd94bd26) )
@@ -1228,7 +1228,7 @@ ROM_START( bonzeadvu )
/* CPU3 - CCHIP aka TC0030CMD marked b41-05.43 */
- ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
ROM_LOAD( "b41-04.48", 0x00000, 0x80000, CRC(c668638f) SHA1(07238a6cb4d93ffaf6351657163b5d80f0dbf688) )
ROM_END
@@ -1242,10 +1242,10 @@ ROM_START( jigkmgri )
ROM_LOAD16_WORD_SWAP( "b41-01.15", 0x80000, 0x80000, CRC(5d072fa4) SHA1(6ffe1b8531381eb6dd3f1fec18c91294a6aca9f6) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* Tiles (8 x 8) */
+ ROM_LOAD( "b41-03.1", 0x00000, 0x80000, CRC(736d35d0) SHA1(7d41a7d71e117714bbd2cdda2953589cda6e763a) ) /* Tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "b41-02.7", 0x00000, 0x80000, CRC(29f205d9) SHA1(9e9f0c2755a9aa5acfe2601911bfa07d8d61164c) ) /* Sprites (16 x 16) */
ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "b41-13.20", 0x00000, 0x04000, CRC(9e464254) SHA1(b6f6126b54c15320ecaa652d0eeabaa4cd94bd26) )
@@ -1253,7 +1253,7 @@ ROM_START( jigkmgri )
/* CPU3 - CCHIP aka TC0030CMD marked b41-05.43 */
- ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "ymsnd", 0 ) /* ADPCM samples */
ROM_LOAD( "b41-04.48", 0x00000, 0x80000, CRC(c668638f) SHA1(07238a6cb4d93ffaf6351657163b5d80f0dbf688) )
ROM_END
@@ -1262,21 +1262,21 @@ ROM_START( asuka )
ROM_LOAD16_BYTE( "b68-13.bin", 0x00000, 0x20000, CRC(855efb3e) SHA1(644e02e207adeaec7839c824688d88ab8d046418) )
ROM_LOAD16_BYTE( "b68-12.bin", 0x00001, 0x20000, CRC(271eeee9) SHA1(c08e347be4aae929c0ab95ff7618edaa1a7d6da9) )
/* 0x040000 - 0x7ffff is intentionally empty */
- ROM_LOAD16_WORD( "b68-03.bin", 0x80000, 0x80000, CRC(d3a59b10) SHA1(35a2ff18b64e73ac5e17484354c0cc58bc2cd7fc) ) /* Fix ROM */
+ ROM_LOAD16_WORD( "b68-03.bin", 0x80000, 0x80000, CRC(d3a59b10) SHA1(35a2ff18b64e73ac5e17484354c0cc58bc2cd7fc) ) /* Fix ROM */
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "b68-01.bin", 0x00000, 0x80000, CRC(89f32c94) SHA1(74fbb699e05e2336509cb5ac06ed94335ff870d5) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "b68-01.bin", 0x00000, 0x80000, CRC(89f32c94) SHA1(74fbb699e05e2336509cb5ac06ed94335ff870d5) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0xa0000, "gfx2", 0 )
- ROM_LOAD ( "b68-02.bin", 0x00000, 0x80000, CRC(f5018cd3) SHA1(860ce140ae369556d03d5d78987b87c0d6070df5) ) /* Sprites (16 x 16) */
+ ROM_LOAD ( "b68-02.bin", 0x00000, 0x80000, CRC(f5018cd3) SHA1(860ce140ae369556d03d5d78987b87c0d6070df5) ) /* Sprites (16 x 16) */
ROM_LOAD16_BYTE( "b68-07.bin", 0x80000, 0x10000, CRC(c113acc8) SHA1(613c61a78df73dcb0b9c9018ae829e865baac772) )
ROM_LOAD16_BYTE( "b68-06.bin", 0x80001, 0x10000, CRC(f517e64d) SHA1(8be491bfe0f7eed58521de9d31da677acf635c23) )
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "b68-11.bin", 0x00000, 0x04000, CRC(c378b508) SHA1(1b145fe736b924f298e02532cf9f26cc18b42ca7) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x10000, "ymsnd", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x10000, "ymsnd", 0 ) /* ADPCM samples */
ROM_LOAD( "b68-10.bin", 0x00000, 0x10000, CRC(387aaf40) SHA1(47c583564ef1d49ece15f97221b2e073e8fb0544) )
ROM_END
@@ -1285,21 +1285,21 @@ ROM_START( asukaj )
ROM_LOAD16_BYTE( "b68-09.bin", 0x00000, 0x20000, CRC(1eaa1bbb) SHA1(01ca6a5f3c47dab49654b84601119714eb329cc5) )
ROM_LOAD16_BYTE( "b68-08.bin", 0x00001, 0x20000, CRC(8cc96e60) SHA1(dc94f3fd48c0407ec72e8330bc688e9e16d39213) )
/* 0x040000 - 0x7ffff is intentionally empty */
- ROM_LOAD16_WORD( "b68-03.bin", 0x80000, 0x80000, CRC(d3a59b10) SHA1(35a2ff18b64e73ac5e17484354c0cc58bc2cd7fc) ) /* Fix ROM */
+ ROM_LOAD16_WORD( "b68-03.bin", 0x80000, 0x80000, CRC(d3a59b10) SHA1(35a2ff18b64e73ac5e17484354c0cc58bc2cd7fc) ) /* Fix ROM */
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "b68-01.bin", 0x00000, 0x80000, CRC(89f32c94) SHA1(74fbb699e05e2336509cb5ac06ed94335ff870d5) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "b68-01.bin", 0x00000, 0x80000, CRC(89f32c94) SHA1(74fbb699e05e2336509cb5ac06ed94335ff870d5) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0xa0000, "gfx2", 0 )
- ROM_LOAD ( "b68-02.bin", 0x00000, 0x80000, CRC(f5018cd3) SHA1(860ce140ae369556d03d5d78987b87c0d6070df5) ) /* Sprites (16 x 16) */
+ ROM_LOAD ( "b68-02.bin", 0x00000, 0x80000, CRC(f5018cd3) SHA1(860ce140ae369556d03d5d78987b87c0d6070df5) ) /* Sprites (16 x 16) */
ROM_LOAD16_BYTE( "b68-07.bin", 0x80000, 0x10000, CRC(c113acc8) SHA1(613c61a78df73dcb0b9c9018ae829e865baac772) )
ROM_LOAD16_BYTE( "b68-06.bin", 0x80001, 0x10000, CRC(f517e64d) SHA1(8be491bfe0f7eed58521de9d31da677acf635c23) )
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "b68-11.bin", 0x00000, 0x04000, CRC(c378b508) SHA1(1b145fe736b924f298e02532cf9f26cc18b42ca7) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x10000, "ymsnd", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x10000, "ymsnd", 0 ) /* ADPCM samples */
ROM_LOAD( "b68-10.bin", 0x00000, 0x10000, CRC(387aaf40) SHA1(47c583564ef1d49ece15f97221b2e073e8fb0544) )
ROM_END
@@ -1308,21 +1308,21 @@ ROM_START( mofflott )
ROM_LOAD16_BYTE( "c17-09.bin", 0x00000, 0x20000, CRC(05ee110f) SHA1(8cedd911d3fdcca1e409260d12dd03a2fb35ef86) )
ROM_LOAD16_BYTE( "c17-08.bin", 0x00001, 0x20000, CRC(d0aacffd) SHA1(2c5ec4020aad2c1cd3a004dc70a12e0d77eb6aa7) )
/* 0x40000 - 0x7ffff is intentionally empty */
- ROM_LOAD16_WORD( "c17-03.bin", 0x80000, 0x80000, CRC(27047fc3) SHA1(1f88a7a42a94bac0e164a69896ae168ab821fbb3) ) /* Fix ROM */
+ ROM_LOAD16_WORD( "c17-03.bin", 0x80000, 0x80000, CRC(27047fc3) SHA1(1f88a7a42a94bac0e164a69896ae168ab821fbb3) ) /* Fix ROM */
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "c17-01.bin", 0x00000, 0x80000, CRC(e9466d42) SHA1(93d533a9a992e3ff537e914577ede41729235826) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "c17-01.bin", 0x00000, 0x80000, CRC(e9466d42) SHA1(93d533a9a992e3ff537e914577ede41729235826) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0xa0000, "gfx2", 0 )
- ROM_LOAD ( "c17-02.bin", 0x00000, 0x80000, CRC(8860a8db) SHA1(372adea8835a9524ece30ab71181ef9d05b120e9) ) /* Sprites (16 x 16) */
+ ROM_LOAD ( "c17-02.bin", 0x00000, 0x80000, CRC(8860a8db) SHA1(372adea8835a9524ece30ab71181ef9d05b120e9) ) /* Sprites (16 x 16) */
ROM_LOAD16_BYTE( "c17-05.bin", 0x80000, 0x10000, CRC(57ac4741) SHA1(3188ff0866324c68fba8e9745a0cb186784cb53d) )
ROM_LOAD16_BYTE( "c17-04.bin", 0x80001, 0x10000, CRC(f4250410) SHA1(1f5f6baca4aa695ce2ae5c65adcb460da872a239) )
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "c17-07.bin", 0x00000, 0x04000, CRC(cdb7bc2c) SHA1(5113055c954a39918436db75cc06b53c29c60728) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x10000, "ymsnd", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x10000, "ymsnd", 0 ) /* ADPCM samples */
ROM_LOAD( "c17-06.bin", 0x00000, 0x10000, CRC(5c332125) SHA1(408f42df18b38347c8a4e177a9484162a66877e1) )
ROM_END
@@ -1334,16 +1334,16 @@ ROM_START( cadash )
ROM_LOAD16_BYTE( "c21-17", 0x40001, 0x20000, CRC(bf9a578a) SHA1(42bde46081db6be2f61eaf171438ecc9264d18be) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "c21-08.38", 0x00000, 0x04000, CRC(dca495a0) SHA1(4e0f401f1b967da75f33fd7294860ad0b4bf2dce) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
+ ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
ROM_LOAD( "c21-07.57", 0x00000, 0x08000, CRC(f02292bd) SHA1(0a5c06a048ad67f90e0d766b504582e9eef035f7) )
ROM_REGION( 0x0800, "plds", 0 )
@@ -1361,16 +1361,16 @@ ROM_START( cadashj )
ROM_LOAD16_BYTE( "c21-05.14", 0x40001, 0x20000, CRC(834018d2) SHA1(0b1a29316f90a98478b47d7fa3f05c68e5ddd9b3) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "c21-08.38", 0x00000, 0x04000, CRC(dca495a0) SHA1(4e0f401f1b967da75f33fd7294860ad0b4bf2dce) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
+ ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
ROM_LOAD( "c21-07.57", 0x00000, 0x08000, CRC(f02292bd) SHA1(0a5c06a048ad67f90e0d766b504582e9eef035f7) )
ROM_END
@@ -1383,17 +1383,17 @@ ROM_START( cadashu )
ROM_REGION( 0x80000, "gfx1", 0 )
// bad dump so used checksum from other sets //
- ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
// bad dump so used checksum from other sets //
- ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "c21-08.38", 0x00000, 0x04000, CRC(dca495a0) SHA1(4e0f401f1b967da75f33fd7294860ad0b4bf2dce) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
+ ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
ROM_LOAD( "c21-07.57", 0x00000, 0x08000, CRC(f02292bd) SHA1(0a5c06a048ad67f90e0d766b504582e9eef035f7) )
ROM_END
@@ -1405,16 +1405,16 @@ ROM_START( cadashi )
ROM_LOAD16_BYTE( "c21-17it", 0x40001, 0x20000, CRC(641fc9dd) SHA1(1497e39f6b250de39ef2785aaca7e68a803612fa) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "c21-08.38", 0x00000, 0x04000, CRC(dca495a0) SHA1(4e0f401f1b967da75f33fd7294860ad0b4bf2dce) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
+ ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
ROM_LOAD( "c21-07.57", 0x00000, 0x08000, CRC(f02292bd) SHA1(0a5c06a048ad67f90e0d766b504582e9eef035f7) )
ROM_END
@@ -1426,16 +1426,16 @@ ROM_START( cadashf )
ROM_LOAD16_BYTE( "c21-20", 0x40001, 0x20000, CRC(b96acfd9) SHA1(d05b55fd5bbf8fd0e5a7272d1951f27a4900371f) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "c21-08.38", 0x00000, 0x04000, CRC(dca495a0) SHA1(4e0f401f1b967da75f33fd7294860ad0b4bf2dce) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
+ ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
ROM_LOAD( "c21-07.57", 0x00000, 0x08000, CRC(f02292bd) SHA1(0a5c06a048ad67f90e0d766b504582e9eef035f7) )
ROM_END
@@ -1447,16 +1447,16 @@ ROM_START( cadashg )
ROM_LOAD16_BYTE( "c21-24-1.15", 0x40001, 0x20000, CRC(2359b93e) SHA1(9a5ce34dd8667a987ab8b6e6246f0ad032af868f) )
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "c21-02.9", 0x00000, 0x80000, CRC(205883b9) SHA1(5aafee8cab3f949a7db91bcc26912f331041b51e) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "c21-01.1", 0x00000, 0x80000, CRC(1ff6f39c) SHA1(742f296efc8073fafa73da2c8d7d26ca9514b6bf) ) /* Sprites (16 x 16) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "c21-08.38", 0x00000, 0x04000, CRC(dca495a0) SHA1(4e0f401f1b967da75f33fd7294860ad0b4bf2dce) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
- ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
+ ROM_REGION( 0x08000, "subcpu", 0 ) /* 2 machine interface mcu rom ? */
ROM_LOAD( "c21-07.57", 0x00000, 0x08000, CRC(f02292bd) SHA1(0a5c06a048ad67f90e0d766b504582e9eef035f7) )
ROM_END
@@ -1465,17 +1465,17 @@ ROM_START( galmedes )
ROM_LOAD16_BYTE( "gm-prg1.bin", 0x00000, 0x20000, CRC(32a70753) SHA1(3bd094b7ae600dbc87ba74e8b2d6b86a68346f4f) )
ROM_LOAD16_BYTE( "gm-prg0.bin", 0x00001, 0x20000, CRC(fae546a4) SHA1(484cad5287daa495b347f6b5b065f3b3d02d8f0e) )
/* 0x40000 - 0x7ffff is intentionally empty */
- ROM_LOAD16_WORD( "gm-30.rom", 0x80000, 0x80000, CRC(4da2a407) SHA1(7bd0eb629dd7022a16e328612c786c544267f7bc) ) /* Fix ROM */
+ ROM_LOAD16_WORD( "gm-30.rom", 0x80000, 0x80000, CRC(4da2a407) SHA1(7bd0eb629dd7022a16e328612c786c544267f7bc) ) /* Fix ROM */
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "gm-scn.bin", 0x00000, 0x80000, CRC(3bab0581) SHA1(56b79a4ffd9f4880a63450b7d1b79f029de75e20) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "gm-scn.bin", 0x00000, 0x80000, CRC(3bab0581) SHA1(56b79a4ffd9f4880a63450b7d1b79f029de75e20) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "gm-obj.bin", 0x00000, 0x80000, CRC(7a4a1315) SHA1(e2010ee4222415fd55ba3102003be4151d29e39b) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "gm-obj.bin", 0x00000, 0x80000, CRC(7a4a1315) SHA1(e2010ee4222415fd55ba3102003be4151d29e39b) ) /* Sprites (16 x 16) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "gm-snd.bin", 0x00000, 0x04000, CRC(d6f56c21) SHA1(ff9743448ac8ce57a2f8c33a26145e7b92cbe3c3) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
ROM_END
ROM_START( earthjkr )
@@ -1483,19 +1483,19 @@ ROM_START( earthjkr )
ROM_LOAD16_BYTE( "ej_3b.rom", 0x00000, 0x20000, CRC(bdd86fc2) SHA1(96578860ed03718f8a68847b367eac6c81b79ca2) )
ROM_LOAD16_BYTE( "ej_3a.rom", 0x00001, 0x20000, CRC(9c8050c6) SHA1(076c882f75787e8120de66ff0dcd2cb820513c45) )
/* 0x40000 - 0x7ffff is intentionally empty */
- ROM_LOAD16_WORD( "ej_30e.rom", 0x80000, 0x80000, CRC(49d1f77f) SHA1(f6c9b2fc88b77cc9baa5be48da5c3eb72310e471) ) /* Fix ROM */
+ ROM_LOAD16_WORD( "ej_30e.rom", 0x80000, 0x80000, CRC(49d1f77f) SHA1(f6c9b2fc88b77cc9baa5be48da5c3eb72310e471) ) /* Fix ROM */
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "ej_chr.rom", 0x00000, 0x80000, CRC(ac675297) SHA1(2a34e1eae3a4be84dbf709053f5e8a781b1073fc) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "ej_chr.rom", 0x00000, 0x80000, CRC(ac675297) SHA1(2a34e1eae3a4be84dbf709053f5e8a781b1073fc) ) /* SCR tiles (8 x 8) */
ROM_REGION( 0xa0000, "gfx2", 0 )
- ROM_LOAD ( "ej_obj.rom", 0x00000, 0x80000, CRC(5f21ac47) SHA1(45c94ffb53ee9b822b0676f6fb151fed4ce6d967) ) /* Sprites (16 x 16) */
+ ROM_LOAD ( "ej_obj.rom", 0x00000, 0x80000, CRC(5f21ac47) SHA1(45c94ffb53ee9b822b0676f6fb151fed4ce6d967) ) /* Sprites (16 x 16) */
ROM_LOAD16_BYTE( "ej_1.rom", 0x80000, 0x10000, CRC(cb4891db) SHA1(af1112608cdd897ef6028ef617f5ca69d7964861) )
ROM_LOAD16_BYTE( "ej_0.rom", 0x80001, 0x10000, CRC(b612086f) SHA1(625748fcb698ec57b7b3ce46019cf85de99aaaa1) )
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "ej_2.rom", 0x00000, 0x04000, CRC(42ba2566) SHA1(c437388684b565c7504d6bad6accd73aa000faca) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
ROM_END
ROM_START( eto )
@@ -1503,17 +1503,17 @@ ROM_START( eto )
ROM_LOAD16_BYTE( "eto-1.23", 0x00000, 0x20000, CRC(44286597) SHA1(ac37e5edbf9d187f60232adc5e9ebed45b3d2fe2) )
ROM_LOAD16_BYTE( "eto-0.8", 0x00001, 0x20000, CRC(57b79370) SHA1(25f83eada982ef654260fe92016d42a90005a05c) )
/* 0x40000 - 0x7ffff is intentionally empty */
- ROM_LOAD16_WORD( "eto-2.30", 0x80000, 0x80000, CRC(12f46fb5) SHA1(04db8b6ccd0051668bd2930275efa0265c0cfd2b) ) /* Fix ROM */
+ ROM_LOAD16_WORD( "eto-2.30", 0x80000, 0x80000, CRC(12f46fb5) SHA1(04db8b6ccd0051668bd2930275efa0265c0cfd2b) ) /* Fix ROM */
ROM_REGION( 0x80000, "gfx1", 0 )
- ROM_LOAD( "eto-4.3", 0x00000, 0x80000, CRC(a8768939) SHA1(a2cbbd3e10ed48ba32a680b2e40ea03900cf33fa) ) /* Sprites (16 x 16) */
+ ROM_LOAD( "eto-4.3", 0x00000, 0x80000, CRC(a8768939) SHA1(a2cbbd3e10ed48ba32a680b2e40ea03900cf33fa) ) /* Sprites (16 x 16) */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "eto-3.6", 0x00000, 0x80000, CRC(dd247397) SHA1(53a7bf877fd7e5f3daf295a698f4012447b6f113) ) /* SCR tiles (8 x 8) */
+ ROM_LOAD( "eto-3.6", 0x00000, 0x80000, CRC(dd247397) SHA1(53a7bf877fd7e5f3daf295a698f4012447b6f113) ) /* SCR tiles (8 x 8) */
- ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
+ ROM_REGION( 0x1c000, "audiocpu", 0 ) /* sound cpu */
ROM_LOAD( "eto-5.27", 0x00000, 0x04000, CRC(b3689da0) SHA1(812d2e0a794403df9f0a5035784f14cd070ea080) )
- ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
+ ROM_CONTINUE( 0x10000, 0x0c000 ) /* banked stuff */
ROM_END
diff --git a/src/mame/drivers/atarifb.c b/src/mame/drivers/atarifb.c
index 2a1ec3907ea..2a335ef4c78 100644
--- a/src/mame/drivers/atarifb.c
+++ b/src/mame/drivers/atarifb.c
@@ -244,33 +244,33 @@ static INPUT_PORTS_START( atarifb )
PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_START("IN1")
- PORT_DIPNAME( 0x03, 0x00, "Time Per Coin" ) PORT_DIPLOCATION("K10:1,2")
- PORT_DIPSETTING( 0x00, "1:30" )
- PORT_DIPSETTING( 0x01, "2:00" )
- PORT_DIPSETTING( 0x02, "2:30" )
- PORT_DIPSETTING( 0x03, "3:00" )
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "K10:3" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x08, 0x00, "Atari Logo" ) PORT_DIPLOCATION("K10:4") /* Listed as "Unused" */
- PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x03, 0x00, "Time Per Coin" ) PORT_DIPLOCATION("K10:1,2")
+ PORT_DIPSETTING( 0x00, "1:30" )
+ PORT_DIPSETTING( 0x01, "2:00" )
+ PORT_DIPSETTING( 0x02, "2:30" )
+ PORT_DIPSETTING( 0x03, "3:00" )
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "K10:3" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x08, 0x00, "Atari Logo" ) PORT_DIPLOCATION("K10:4") /* Listed as "Unused" */
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT ( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT ( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_START("IN2") /* IN2 - Player 1 trackball, y */
+ PORT_START("IN2") /* IN2 - Player 1 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE
/* The lower 4 bits are the input */
- PORT_START("IN3") /* IN3 - Player 1 trackball, x */
+ PORT_START("IN3") /* IN3 - Player 1 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10)
/* The lower 4 bits are the input */
- PORT_START("IN4") /* IN4 - Player 2 trackball, y */
+ PORT_START("IN4") /* IN4 - Player 2 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
/* The lower 4 bits are the input */
- PORT_START("IN5") /* IN5 - Player 2 trackball, x */
+ PORT_START("IN5") /* IN5 - Player 2 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
/* The lower 4 bits are the input */
INPUT_PORTS_END
@@ -288,19 +288,19 @@ static INPUT_PORTS_START( atarifb4 )
PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_START("IN6") /* IN6 - Player 3 trackball, y */
+ PORT_START("IN6") /* IN6 - Player 3 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(3)
/* The lower 4 bits are the input */
- PORT_START("IN7") /* IN7 - Player 3 trackball, x */
+ PORT_START("IN7") /* IN7 - Player 3 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(3)
/* The lower 4 bits are the input */
- PORT_START("IN8") /* IN8 - Player 4 trackball, y */
+ PORT_START("IN8") /* IN8 - Player 4 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(4)
/* The lower 4 bits are the input */
- PORT_START("IN9") /* IN9 - Player 4 trackball, x */
+ PORT_START("IN9") /* IN9 - Player 4 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(4)
/* The lower 4 bits are the input */
@@ -318,13 +318,13 @@ static INPUT_PORTS_START( abaseb )
PORT_INCLUDE( atarifb )
PORT_MODIFY("IN1")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("K10:1,2")
- PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
- PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x03, DEF_STR( Easiest ) )
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "K10:3" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "K10:4" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("K10:1,2")
+ PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x03, DEF_STR( Easiest ) )
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "K10:3" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "K10:4" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -334,48 +334,48 @@ static INPUT_PORTS_START( soccer )
PORT_START("IN1")
PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("2/4 Player Toggle") PORT_DIPLOCATION("SW2:4") /* Listed as "Unused" */
- PORT_DIPNAME( 0x02, 0x00, "Rule Switch" ) PORT_DIPLOCATION("SW2:3") /* Listed as "Unused" */
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x02, DEF_STR( On ) )
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:1,2")
- PORT_DIPSETTING( 0x00, DEF_STR( English ) )
- PORT_DIPSETTING( 0x04, DEF_STR( German ) )
- PORT_DIPSETTING( 0x08, DEF_STR( French ) )
- PORT_DIPSETTING( 0x0c, DEF_STR( Spanish ) )
+ PORT_DIPNAME( 0x02, 0x00, "Rule Switch" ) PORT_DIPLOCATION("SW2:3") /* Listed as "Unused" */
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( On ) )
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPSETTING( 0x00, DEF_STR( English ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( German ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( French ) )
+ PORT_DIPSETTING( 0x0c, DEF_STR( Spanish ) )
PORT_BIT ( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
PORT_BIT ( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4)
PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_START("IN2") /* IN2 - Player 1 trackball, y */
+ PORT_START("IN2") /* IN2 - Player 1 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE
/* The lower 4 bits are the input */
- PORT_START("IN3") /* IN3 - Player 1 trackball, x */
+ PORT_START("IN3") /* IN3 - Player 1 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10)
/* The lower 4 bits are the input */
- PORT_START("IN4") /* IN4 - Player 2 trackball, y */
+ PORT_START("IN4") /* IN4 - Player 2 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
/* The lower 4 bits are the input */
- PORT_START("IN5") /* IN5 - Player 2 trackball, x */
+ PORT_START("IN5") /* IN5 - Player 2 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
/* The lower 4 bits are the input */
- PORT_START("IN6") /* IN6 - Player 3 trackball, y */
+ PORT_START("IN6") /* IN6 - Player 3 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(3)
/* The lower 4 bits are the input */
- PORT_START("IN7") /* IN7 - Player 3 trackball, x */
+ PORT_START("IN7") /* IN7 - Player 3 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(3)
/* The lower 4 bits are the input */
- PORT_START("IN8") /* IN8 - Player 4 trackball, y */
+ PORT_START("IN8") /* IN8 - Player 4 trackball, y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(4)
/* The lower 4 bits are the input */
- PORT_START("IN9") /* IN9 - Player 4 trackball, x */
+ PORT_START("IN9") /* IN9 - Player 4 trackball, x */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(4)
/* The lower 4 bits are the input */
@@ -390,27 +390,27 @@ static INPUT_PORTS_START( soccer )
PORT_BIT ( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_START("DSW1")
- PORT_DIPNAME( 0x07, 0x00, "Time per coin" ) PORT_DIPLOCATION("SW1:1,2,3")
- PORT_DIPSETTING( 0x00, "1:00" )
- PORT_DIPSETTING( 0x01, "1:20" )
- PORT_DIPSETTING( 0x02, "1:40" )
- PORT_DIPSETTING( 0x03, "2:00" )
- PORT_DIPSETTING( 0x04, "2:30" )
- PORT_DIPSETTING( 0x05, "3:00" )
- PORT_DIPSETTING( 0x06, "3:30" )
- PORT_DIPSETTING( 0x07, "4:00" )
- PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5")
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 1C_4C ) )
- PORT_DIPSETTING( 0x10, DEF_STR( 1C_5C ) )
- PORT_DIPSETTING( 0x18, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:6")
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:7")
- PORT_DIPSETTING( 0x00, "1 Coin Minimum" )
- PORT_DIPSETTING( 0x40, "2 Coin Minimum" )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x07, 0x00, "Time per coin" ) PORT_DIPLOCATION("SW1:1,2,3")
+ PORT_DIPSETTING( 0x00, "1:00" )
+ PORT_DIPSETTING( 0x01, "1:20" )
+ PORT_DIPSETTING( 0x02, "1:40" )
+ PORT_DIPSETTING( 0x03, "2:00" )
+ PORT_DIPSETTING( 0x04, "2:30" )
+ PORT_DIPSETTING( 0x05, "3:00" )
+ PORT_DIPSETTING( 0x06, "3:30" )
+ PORT_DIPSETTING( 0x07, "4:00" )
+ PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5")
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 1C_4C ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( 1C_5C ) )
+ PORT_DIPSETTING( 0x18, DEF_STR( 1C_6C ) )
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPSETTING( 0x00, "1 Coin Minimum" )
+ PORT_DIPSETTING( 0x40, "2 Coin Minimum" )
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -465,7 +465,7 @@ static const gfx_layout spritelayout =
{ 0 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
16*8
};
@@ -478,7 +478,7 @@ static const gfx_layout spritemasklayout =
{ 0 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
16*8
};
@@ -561,7 +561,7 @@ static MACHINE_CONFIG_START( atarifb, atarifb_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2037) /* 16.3ms * 1/8 = 2037.5. Is it 1/8th or 3/32nds? (1528?) */)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2037) /* 16.3ms * 1/8 = 2037.5. Is it 1/8th or 3/32nds? (1528?) */)
MCFG_SCREEN_SIZE(38*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(0*8, 38*8-1, 1*8, 31*8-1)
MCFG_SCREEN_UPDATE_DRIVER(atarifb_state, screen_update_atarifb)
diff --git a/src/mame/drivers/atarig1.c b/src/mame/drivers/atarig1.c
index 7a6100a6378..0d7dff5fb9b 100644
--- a/src/mame/drivers/atarig1.c
+++ b/src/mame/drivers/atarig1.c
@@ -88,7 +88,7 @@ READ16_MEMBER(atarig1_state::special_port0_r)
{
int temp = ioport("IN0")->read();
if (m_cpu_to_sound_ready) temp ^= 0x1000;
- temp ^= 0x2000; /* A2DOK always high for now */
+ temp ^= 0x2000; /* A2DOK always high for now */
return temp;
}
@@ -200,9 +200,9 @@ static void pitfightb_cheap_slapstic_init(running_machine &machine)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, atarig1_state )
AM_RANGE(0x000000, 0x037fff) AM_ROM
- AM_RANGE(0x038000, 0x03ffff) AM_ROM /* pitfight slapstic goes here */
+ AM_RANGE(0x038000, 0x03ffff) AM_ROM /* pitfight slapstic goes here */
AM_RANGE(0x040000, 0x077fff) AM_ROM
- AM_RANGE(0x078000, 0x07ffff) AM_ROM /* hydra slapstic goes here */
+ AM_RANGE(0x078000, 0x07ffff) AM_ROM /* hydra slapstic goes here */
AM_RANGE(0xf80000, 0xf80001) AM_WRITE(watchdog_reset16_w)
AM_RANGE(0xf88000, 0xf8ffff) AM_WRITE(eeprom_enable_w)
AM_RANGE(0xf90000, 0xf90001) AM_WRITE8(sound_w, 0xff00)
@@ -231,7 +231,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( hydra )
- PORT_START("IN0") /* fc0000 */
+ PORT_START("IN0") /* fc0000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Left Trigger")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Right Trigger")
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Left Thumb")
@@ -243,25 +243,25 @@ static INPUT_PORTS_START( hydra )
PORT_SERVICE( 0x4000, IP_ACTIVE_LOW )
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_START("ADC0") /* ADC 0 @ fc8000 */
+ PORT_START("ADC0") /* ADC 0 @ fc8000 */
PORT_BIT( 0x00ff, 0x0080, IPT_AD_STICK_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("ADC1") /* ADC 1 @ fc8000 */
+ PORT_START("ADC1") /* ADC 1 @ fc8000 */
PORT_BIT( 0x00ff, 0x0080, IPT_AD_STICK_Y ) PORT_SENSITIVITY(70) PORT_KEYDELTA(10)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("ADC2") /* ADC 2 @ fc8000 */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
- PORT_INCLUDE( atarijsa_ii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_ii ) /* audio board port */
PORT_MODIFY( "JSAII" )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( pitfight )
- PORT_START("IN0") /* fc0000 */
+ PORT_START("IN0") /* fc0000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
@@ -275,7 +275,7 @@ static INPUT_PORTS_START( pitfight )
PORT_SERVICE( 0x4000, IP_ACTIVE_LOW )
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_START("ADC0") /* fc8000 */
+ PORT_START("ADC0") /* fc8000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(3)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3)
@@ -299,14 +299,14 @@ static INPUT_PORTS_START( pitfight )
PORT_START("ADC2") /* not used */
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_ii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_ii ) /* audio board port */
PORT_MODIFY( "JSAII" )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( pitfightj )
- PORT_START("IN0") /* fc0000 */
+ PORT_START("IN0") /* fc0000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
@@ -337,7 +337,7 @@ static INPUT_PORTS_START( pitfightj )
PORT_START("ADC2") /* not used */
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_ii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_ii ) /* audio board port */
PORT_MODIFY( "JSAII" )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
INPUT_PORTS_END
@@ -394,44 +394,44 @@ GFXDECODE_END
static const atarirle_desc modesc_hydra =
{
- "gfx3", /* region where the GFX data lives */
- 256, /* number of entries in sprite RAM */
- 0, /* left clip coordinate */
- 255, /* right clip coordinate */
-
- 0x200, /* base palette entry */
- 0x100, /* maximum number of colors */
-
- {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
- {{ 0,0x00f0,0,0,0,0,0,0 }}, /* mask for the color */
- {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
- {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
- {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
- {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
- {{ 0,0,0,0,0,0x00ff,0,0 }}, /* mask for the order */
- {{ 0 }}, /* mask for the priority */
- {{ 0 }} /* mask for the VRAM target */
+ "gfx3", /* region where the GFX data lives */
+ 256, /* number of entries in sprite RAM */
+ 0, /* left clip coordinate */
+ 255, /* right clip coordinate */
+
+ 0x200, /* base palette entry */
+ 0x100, /* maximum number of colors */
+
+ {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
+ {{ 0,0x00f0,0,0,0,0,0,0 }}, /* mask for the color */
+ {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
+ {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
+ {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
+ {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
+ {{ 0,0,0,0,0,0x00ff,0,0 }}, /* mask for the order */
+ {{ 0 }}, /* mask for the priority */
+ {{ 0 }} /* mask for the VRAM target */
};
static const atarirle_desc modesc_pitfight =
{
- "gfx3", /* region where the GFX data lives */
- 256, /* number of entries in sprite RAM */
- 40, /* left clip coordinate */
- 295, /* right clip coordinate */
-
- 0x200, /* base palette entry */
- 0x100, /* maximum number of colors */
-
- {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
- {{ 0,0x00f0,0,0,0,0,0,0 }}, /* mask for the color */
- {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
- {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
- {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
- {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
- {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
- {{ 0 }}, /* mask for the priority */
- {{ 0 }} /* mask for the VRAM target */
+ "gfx3", /* region where the GFX data lives */
+ 256, /* number of entries in sprite RAM */
+ 40, /* left clip coordinate */
+ 295, /* right clip coordinate */
+
+ 0x200, /* base palette entry */
+ 0x100, /* maximum number of colors */
+
+ {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
+ {{ 0,0x00f0,0,0,0,0,0,0 }}, /* mask for the color */
+ {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
+ {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
+ {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
+ {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
+ {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
+ {{ 0 }}, /* mask for the priority */
+ {{ 0 }} /* mask for the VRAM target */
};
/*************************************
@@ -484,7 +484,7 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( hydra )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136079-3028.bin", 0x00000, 0x10000, CRC(43475f73) SHA1(48a0de5bcbfa2f986edeee93e5a4ef99e13be4de) )
ROM_LOAD16_BYTE( "136079-3029.bin", 0x00001, 0x10000, CRC(886e1de8) SHA1(5728f5823c6020ff28cbb52faf1e06cb7088eb75) )
ROM_LOAD16_BYTE( "136079-3034.bin", 0x20000, 0x10000, CRC(5115aa36) SHA1(dce43800ae611166d59e60f9671cf1354e7f91de) )
@@ -494,7 +494,7 @@ ROM_START( hydra )
ROM_LOAD16_BYTE( "136079-1030.bin", 0x60000, 0x10000, CRC(b31fd41f) SHA1(1738d31b3262b32f89ce64fe262682b6bb544e79) )
ROM_LOAD16_BYTE( "136079-1031.bin", 0x60001, 0x10000, CRC(453d076f) SHA1(a7fd8e5efebf56c22e0a7e0b224597b4dba4692a) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "hydraa0.bin", 0x10000, 0x4000, CRC(619d7319) SHA1(3c58f18ca5c93ae049bfca91043718fff43e674c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -536,7 +536,7 @@ ROM_START( hydra )
ROM_LOAD( "136079-1038.bin", 0x10000, 0x10000, CRC(a2eda15b) SHA1(358888ffdeb3d0e98f59e239de6d7e1f7e15aca2) )
ROM_LOAD( "136079-1039.bin", 0x20000, 0x10000, CRC(eb9eaeb7) SHA1(cd8e076b07588879f1a0e6c0fb9de9889480bebb) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136079-1040.bin", 0x0000, 0x0200, CRC(43d6f3d4) SHA1(a072099df1db8db3589130c67a86a362e03d70ff) )
ROM_LOAD( "136079-1041.bin", 0x0200, 0x0200, CRC(341dc4bb) SHA1(175143e29cf9e6a4cecb43b3801356085944d168) )
ROM_LOAD( "136079-1042.bin", 0x0400, 0x0200, CRC(2e49b52e) SHA1(f8abffbcafe2cba7d1410175bb75ec07faac3b47) )
@@ -544,7 +544,7 @@ ROM_END
ROM_START( hydrap )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "hydhi0.bin", 0x00000, 0x10000, CRC(dab2e8a2) SHA1(ba13b973b2c351fcf36e8dc1a481e797c6e5911e) )
ROM_LOAD16_BYTE( "hydlo0.bin", 0x00001, 0x10000, CRC(c18d4f16) SHA1(93a165b1726ea6fc6488ddfd49ba4cec960612e4) )
ROM_LOAD16_BYTE( "hydhi1.bin", 0x20000, 0x10000, CRC(50c12bb9) SHA1(dea919be2878c8079de4be690ce91d8de5c42771) )
@@ -554,7 +554,7 @@ ROM_START( hydrap )
ROM_LOAD16_BYTE( "hydhi3.bin", 0x60000, 0x10000, CRC(29e9e03e) SHA1(0b03482834c1c8fcdd902d513c23c0cc04900f5f) )
ROM_LOAD16_BYTE( "hydlo3.bin", 0x60001, 0x10000, CRC(7b5047f0) SHA1(99b59dfebc0df0b876e69a885a3e3b07ef958fd4) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "hydraa0.bin", 0x10000, 0x4000, BAD_DUMP CRC(619d7319) SHA1(3c58f18ca5c93ae049bfca91043718fff43e674c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -596,7 +596,7 @@ ROM_START( hydrap )
ROM_LOAD( "136079-1038.bin", 0x10000, 0x10000, BAD_DUMP CRC(a2eda15b) SHA1(358888ffdeb3d0e98f59e239de6d7e1f7e15aca2) )
ROM_LOAD( "136079-1039.bin", 0x20000, 0x10000, BAD_DUMP CRC(eb9eaeb7) SHA1(cd8e076b07588879f1a0e6c0fb9de9889480bebb) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136079-1040.bin", 0x0000, 0x0200, CRC(43d6f3d4) SHA1(a072099df1db8db3589130c67a86a362e03d70ff) )
ROM_LOAD( "136079-1041.bin", 0x0200, 0x0200, CRC(341dc4bb) SHA1(175143e29cf9e6a4cecb43b3801356085944d168) )
ROM_LOAD( "136079-1042.bin", 0x0400, 0x0200, CRC(2e49b52e) SHA1(f8abffbcafe2cba7d1410175bb75ec07faac3b47) )
@@ -604,7 +604,7 @@ ROM_END
ROM_START( hydrap2 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "05c", 0x00001, 0x10000, CRC(531ebb3b) SHA1(866de3e2c747bd272c5235f9717ebeaeca90735b) )
ROM_LOAD16_BYTE( "05e", 0x00000, 0x10000, CRC(6d77b124) SHA1(a485a783211a052ca01aa400b3c5e59a2dba6faa) )
ROM_LOAD16_BYTE( "15c", 0x20001, 0x10000, CRC(2f823b49) SHA1(db457b43e528a6d447802259707a00f02bf92f2e) )
@@ -614,7 +614,7 @@ ROM_START( hydrap2 )
ROM_LOAD16_BYTE( "30c", 0x60001, 0x10000, CRC(89604306) SHA1(ccac6eabb174903f4ee144fce53a169daa734e07) )
ROM_LOAD16_BYTE( "30e", 0x60000, 0x10000, CRC(25221b17) SHA1(bb14117f256c3db6881bb91cace297d4c636e684) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "aud.1b", 0x10000, 0x4000, CRC(e1b5188a) SHA1(e9f2a78df49fa085a9363ca194e2ceb5fa5409c4) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -656,7 +656,7 @@ ROM_START( hydrap2 )
ROM_LOAD( "136079-1038.bin", 0x10000, 0x10000, BAD_DUMP CRC(a2eda15b) SHA1(358888ffdeb3d0e98f59e239de6d7e1f7e15aca2) ) // "
ROM_LOAD( "136079-1039.bin", 0x20000, 0x10000, BAD_DUMP CRC(eb9eaeb7) SHA1(cd8e076b07588879f1a0e6c0fb9de9889480bebb) ) // "
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136079-1040.bin", 0x0000, 0x0200, CRC(43d6f3d4) SHA1(a072099df1db8db3589130c67a86a362e03d70ff) )
ROM_LOAD( "136079-1041.bin", 0x0200, 0x0200, CRC(341dc4bb) SHA1(175143e29cf9e6a4cecb43b3801356085944d168) )
ROM_LOAD( "136079-1042.bin", 0x0400, 0x0200, CRC(2e49b52e) SHA1(f8abffbcafe2cba7d1410175bb75ec07faac3b47) )
@@ -697,13 +697,13 @@ A048490-01
The chip on the 10P card is labeled 136079-2053
*/
ROM_START( pitfight )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136081-9028.05d", 0x00000, 0x10000, CRC(427713e9) SHA1(8b4913188cac9fe3845c812a07c81f5fdb4a2ded) )
ROM_LOAD16_BYTE( "136081-9029.05b", 0x00001, 0x10000, CRC(2cdeaeba) SHA1(e02c99d7f5a7080ea75dc2dd59d4678b62f6bd55) )
ROM_LOAD16_BYTE( "136081-9030.15d", 0x20000, 0x10000, CRC(3bace9ef) SHA1(29072871b268f343fa1e7fcc9682674df2b2e34f) )
ROM_LOAD16_BYTE( "136081-9031.15b", 0x20001, 0x10000, CRC(c717f011) SHA1(3c5d6c12b85285422345a1aba3f8c497f74c6889) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -735,13 +735,13 @@ ROM_START( pitfight )
ROM_LOAD16_BYTE( "136081-1015.130r", 0x1c0001, 0x20000, CRC(9378ad0b) SHA1(909f9879f5b8fc3ed0622fd27d903ccb1f7a90c6) )
ROM_LOAD16_BYTE( "136081-1016.130n", 0x1c0000, 0x20000, CRC(19c3fbe0) SHA1(ba28f71edb04387f009afe39bfe0ffeff8fbf5e9) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
@@ -793,13 +793,13 @@ A048490-01
The chip on the 10P card is labeled 136079-2053.
*/
ROM_START( pitfight7 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136081-7028.05d", 0x00000, 0x10000, CRC(7391dc8b) SHA1(2140b21e71871c2cb81cccd92f536763d955ec97) )
ROM_LOAD16_BYTE( "136081-7029.05b", 0x00001, 0x10000, CRC(b3b88382) SHA1(0a0de330d7261c7eaa5aa705328d6c0c28d27536) )
ROM_LOAD16_BYTE( "136081-7030.15d", 0x20000, 0x10000, CRC(5fd5a0b1) SHA1(5d4711e8d10176b6989c4db012dbb4e29860590c) )
ROM_LOAD16_BYTE( "136081-7031.15b", 0x20001, 0x10000, CRC(e14a1d0c) SHA1(734fa1cd5ad835fa77c686006993ea9358e3b072) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -831,13 +831,13 @@ ROM_START( pitfight7 )
ROM_LOAD16_BYTE( "136081-1015.130r", 0x1c0001, 0x20000, CRC(9378ad0b) SHA1(909f9879f5b8fc3ed0622fd27d903ccb1f7a90c6) )
ROM_LOAD16_BYTE( "136081-1016.130n", 0x1c0000, 0x20000, CRC(19c3fbe0) SHA1(ba28f71edb04387f009afe39bfe0ffeff8fbf5e9) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
@@ -856,13 +856,13 @@ ROM_END
ROM_START( pitfight6 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136081-6028.05d", 0x00000, 0x10000, CRC(dae1d895) SHA1(d3852b932e318e3f6ab034aba8210d896f9f08da) )
ROM_LOAD16_BYTE( "136081-6029.05b", 0x00001, 0x10000, CRC(4df13418) SHA1(e5469fbdd7263ca651d5cb7518576e4f9c4892e7) )
ROM_LOAD16_BYTE( "136081-6030.15d", 0x20000, 0x10000, CRC(72b4b249) SHA1(295c707783ca40d6b68eb36b4511774e889bf447) )
ROM_LOAD16_BYTE( "136081-6031.15b", 0x20001, 0x10000, CRC(f0c5d03b) SHA1(53aed44930ebaad98d833bc86837c57ac623937d) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -882,13 +882,13 @@ ROM_START( pitfight6 )
ROM_LOAD16_BYTE( "136081-1067.70r", 0x100001, 0x80000, CRC(ca4f75a8) SHA1(f8b8b03df4ad043a48970a0f8a4c3b85c7140493) )
ROM_LOAD16_BYTE( "136081-1068.70n", 0x100000, 0x80000, CRC(85240517) SHA1(f3d5c0803a7958569d2f3b9c25c73d33defcabe7) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
@@ -907,13 +907,13 @@ ROM_END
ROM_START( pitfight5 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136081-5028.05d", 0x00000, 0x10000, CRC(dd34b528) SHA1(806e01f3fd6a1335cdcfd2e41f04e9046fe433b5) )
ROM_LOAD16_BYTE( "136081-5029.05b", 0x00001, 0x10000, CRC(b0ee9a09) SHA1(df85aeae2c497fbb22732704c2d581a3c195fcfb) )
ROM_LOAD16_BYTE( "136081-5030.15d", 0x20000, 0x10000, CRC(6a094723) SHA1(a77046a8c5fab81cf0207122e494c32aab3b220d) )
ROM_LOAD16_BYTE( "136081-5031.15b", 0x20001, 0x10000, CRC(47400d94) SHA1(07ba297a9b3ae574bc501a24fb6e46db7a5b3de5) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -933,13 +933,13 @@ ROM_START( pitfight5 )
ROM_LOAD16_BYTE( "136081-1067.70r", 0x100001, 0x80000, CRC(ca4f75a8) SHA1(f8b8b03df4ad043a48970a0f8a4c3b85c7140493) )
ROM_LOAD16_BYTE( "136081-1068.70n", 0x100000, 0x80000, CRC(85240517) SHA1(f3d5c0803a7958569d2f3b9c25c73d33defcabe7) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
@@ -958,13 +958,13 @@ ROM_END
ROM_START( pitfight4 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136081-4028.05d", 0x00000, 0x10000, CRC(f7cb1a4b) SHA1(024eb80d822559d9f3756710d1988f592639cd5e) )
ROM_LOAD16_BYTE( "136081-4029.05b", 0x00001, 0x10000, CRC(13ae0d4f) SHA1(1816f40f7e3fee2427e11623c9f1d1b3515cbf72) )
ROM_LOAD16_BYTE( "136081-3030.15d", 0x20000, 0x10000, CRC(b053e779) SHA1(f143f0e16850ad98366db208e956f7402d1ca848) )
ROM_LOAD16_BYTE( "136081-3031.15b", 0x20001, 0x10000, CRC(2b8c4d13) SHA1(6f1679ef5974bf44848bfa6db0b9b05f71f6e7d6) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -996,13 +996,13 @@ ROM_START( pitfight4 )
ROM_LOAD16_BYTE( "136081-1015.130r", 0x1c0001, 0x20000, CRC(9378ad0b) SHA1(909f9879f5b8fc3ed0622fd27d903ccb1f7a90c6) )
ROM_LOAD16_BYTE( "136081-1016.130n", 0x1c0000, 0x20000, CRC(19c3fbe0) SHA1(ba28f71edb04387f009afe39bfe0ffeff8fbf5e9) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
@@ -1021,13 +1021,13 @@ ROM_END
ROM_START( pitfight3 )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136081-3028.05d", 0x00000, 0x10000, CRC(99530da4) SHA1(b542910127553d285f699d2b75e5d6fb071ff046) )
ROM_LOAD16_BYTE( "136081-3029.05b", 0x00001, 0x10000, CRC(78c7afbf) SHA1(7588dfee1e120b69591499ddf2860490b1c66885) )
ROM_LOAD16_BYTE( "136081-3030.15d", 0x20000, 0x10000, CRC(b053e779) SHA1(f143f0e16850ad98366db208e956f7402d1ca848) )
ROM_LOAD16_BYTE( "136081-3031.15b", 0x20001, 0x10000, CRC(2b8c4d13) SHA1(6f1679ef5974bf44848bfa6db0b9b05f71f6e7d6) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1059,13 +1059,13 @@ ROM_START( pitfight3 )
ROM_LOAD16_BYTE( "136081-1015.130r", 0x1c0001, 0x20000, CRC(9378ad0b) SHA1(909f9879f5b8fc3ed0622fd27d903ccb1f7a90c6) )
ROM_LOAD16_BYTE( "136081-1016.130n", 0x1c0000, 0x20000, CRC(19c3fbe0) SHA1(ba28f71edb04387f009afe39bfe0ffeff8fbf5e9) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
@@ -1084,13 +1084,13 @@ ROM_END
ROM_START( pitfightj )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "136081-3428.05d", 0x00000, 0x10000, CRC(39be5484) SHA1(683ab8cf21f2b82aee11ce21b9dfbdb82083d6b6) )
ROM_LOAD16_BYTE( "136081-3429.05b", 0x00001, 0x10000, CRC(2cb14a58) SHA1(004178b4869766c11904d1fdf72725ba481bc8cc) )
ROM_LOAD16_BYTE( "136081-3430.15d", 0x20000, 0x10000, CRC(80707ac0) SHA1(39ddd228bb630bbdf32c76c7906e54f6a62c06ad) )
ROM_LOAD16_BYTE( "136081-3431.15b", 0x20001, 0x10000, CRC(9bf43aa6) SHA1(b41c30118a0c0032303d1b1de471aac292a4968a) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-2060.1b", 0x10000, 0x4000, CRC(4317a9f3) SHA1(310154be47fd16b417699338e04e08f3ed973198) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1122,13 +1122,13 @@ ROM_START( pitfightj )
ROM_LOAD16_BYTE( "136081-1015.130r", 0x1c0001, 0x20000, CRC(9378ad0b) SHA1(909f9879f5b8fc3ed0622fd27d903ccb1f7a90c6) )
ROM_LOAD16_BYTE( "136081-1016.130n", 0x1c0000, 0x20000, CRC(19c3fbe0) SHA1(ba28f71edb04387f009afe39bfe0ffeff8fbf5e9) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
@@ -1147,13 +1147,13 @@ ROM_END
ROM_START( pitfightb )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD16_BYTE( "pit9.bin", 0x00000, 0x10000, CRC(946fb15b) SHA1(dbde8daf60a6bda242ea0d627c1fe5034de18090) )
ROM_LOAD16_BYTE( "pit7.bin", 0x00001, 0x10000, CRC(a9e7163a) SHA1(d1536bde0df20fb5f78e5ce55d453cb0c2c0b663) )
ROM_LOAD16_BYTE( "pit8.bin", 0x20000, 0x10000, CRC(b74a8258) SHA1(779990ed95c25dd0a8e9f30c4d9a8d69162d14fc) )
ROM_LOAD16_BYTE( "pit6.bin", 0x20001, 0x10000, CRC(40204ecd) SHA1(73d827e119cc1408356e28c1e67f6c8e287eeb15) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1185,13 +1185,13 @@ ROM_START( pitfightb )
ROM_LOAD16_BYTE( "136081-1015.130r", 0x1c0001, 0x20000, CRC(9378ad0b) SHA1(909f9879f5b8fc3ed0622fd27d903ccb1f7a90c6) )
ROM_LOAD16_BYTE( "136081-1016.130n", 0x1c0000, 0x20000, CRC(19c3fbe0) SHA1(ba28f71edb04387f009afe39bfe0ffeff8fbf5e9) )
- ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
+ ROM_REGION( 0x40000, "adpcm", 0 ) /* 256k for ADPCM samples */
ROM_LOAD( "136081-1061.7k", 0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
ROM_LOAD( "136081-1062.7j", 0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
ROM_LOAD( "136081-1063.7e", 0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
ROM_LOAD( "136081-1064.7d", 0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136081-1040.30s", 0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
ROM_LOAD( "136081-1041.25s", 0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
ROM_LOAD( "136081-1042.20s", 0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
diff --git a/src/mame/drivers/atarig42.c b/src/mame/drivers/atarig42.c
index 500335f10da..0a3435658de 100644
--- a/src/mame/drivers/atarig42.c
+++ b/src/mame/drivers/atarig42.c
@@ -70,7 +70,7 @@ READ16_MEMBER(atarig42_state::special_port2_r)
int temp = ioport("IN2")->read();
if (m_cpu_to_sound_ready) temp ^= 0x0020;
if (m_sound_to_cpu_ready) temp ^= 0x0010;
- temp ^= 0x0008; /* A2D.EOC always high for now */
+ temp ^= 0x0008; /* A2D.EOC always high for now */
return temp;
}
@@ -368,7 +368,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( roadriot )
- PORT_START("IN0") /* e00000 */
+ PORT_START("IN0") /* e00000 */
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
@@ -378,24 +378,24 @@ static INPUT_PORTS_START( roadriot )
PORT_START("IN1") /* e00002 */
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN2") /* e00010 */
+ PORT_START("IN2") /* e00010 */
PORT_BIT( 0x003f, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_iii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_iii ) /* audio board port */
- PORT_START("A2D0") /* analog 0 */
+ PORT_START("A2D0") /* analog 0 */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
- PORT_START("A2D1") /* analog 1 */
+ PORT_START("A2D1") /* analog 1 */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
INPUT_PORTS_END
static INPUT_PORTS_START( guardian )
- PORT_START("IN0") /* e00000 */
+ PORT_START("IN0") /* e00000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(3)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
@@ -429,18 +429,18 @@ static INPUT_PORTS_START( guardian )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
- PORT_START("IN2") /* e00010 */
+ PORT_START("IN2") /* e00010 */
PORT_BIT( 0x003f, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_iii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_iii ) /* audio board port */
- PORT_START("A2D0") /* analog 0 */
+ PORT_START("A2D0") /* analog 0 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D1") /* analog 1 */
+ PORT_START("A2D1") /* analog 1 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
@@ -494,45 +494,45 @@ GFXDECODE_END
static const atarirle_desc modesc_0x200 =
{
- "gfx3", /* region where the GFX data lives */
- 256, /* number of entries in sprite RAM */
- 0, /* left clip coordinate */
- 0, /* right clip coordinate */
-
- 0x200, /* base palette entry */
- 0x400, /* maximum number of colors */
-
- {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
- {{ 0,0x01f0,0,0,0,0,0,0 }}, /* mask for the color */
- {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
- {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
- {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
- {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
- {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
- {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
- {{ 0 }} /* mask for the VRAM target */
+ "gfx3", /* region where the GFX data lives */
+ 256, /* number of entries in sprite RAM */
+ 0, /* left clip coordinate */
+ 0, /* right clip coordinate */
+
+ 0x200, /* base palette entry */
+ 0x400, /* maximum number of colors */
+
+ {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
+ {{ 0,0x01f0,0,0,0,0,0,0 }}, /* mask for the color */
+ {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
+ {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
+ {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
+ {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
+ {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
+ {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
+ {{ 0 }} /* mask for the VRAM target */
};
static const atarirle_desc modesc_0x400 =
{
- "gfx3", /* region where the GFX data lives */
- 256, /* number of entries in sprite RAM */
- 0, /* left clip coordinate */
- 0, /* right clip coordinate */
-
- 0x400, /* base palette entry */
- 0x400, /* maximum number of colors */
-
- {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
- {{ 0,0x03f0,0,0,0,0,0,0 }}, /* mask for the color */
- {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
- {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
- {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
- {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
- {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
- {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
- {{ 0 }} /* mask for the VRAM target */
+ "gfx3", /* region where the GFX data lives */
+ 256, /* number of entries in sprite RAM */
+ 0, /* left clip coordinate */
+ 0, /* right clip coordinate */
+
+ 0x400, /* base palette entry */
+ 0x400, /* maximum number of colors */
+
+ {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
+ {{ 0,0x03f0,0,0,0,0,0,0 }}, /* mask for the color */
+ {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
+ {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
+ {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
+ {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
+ {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
+ {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
+ {{ 0 }} /* mask for the VRAM target */
};
@@ -594,16 +594,16 @@ MACHINE_CONFIG_END
ROM_START( roadriot )
- ROM_REGION( 0x80004, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80004, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "136089-3114.8d", 0x00000, 0x20000, CRC(a2bd949c) SHA1(f96064d491b4d488cadebd3a63a6d3edf9236046) )
ROM_LOAD16_BYTE( "136089-3113.8c", 0x00001, 0x20000, CRC(68c45cb1) SHA1(e38c7ad3f3d301e59a1d9f53e8f2c28e91d691fe) )
ROM_LOAD16_BYTE( "136089-2016.9d", 0x40000, 0x20000, CRC(6191653c) SHA1(97d1a84a585149e8f2c49cab7af22dc755dff350) )
ROM_LOAD16_BYTE( "136089-2015.9c", 0x40001, 0x20000, CRC(0d34419a) SHA1(f16e9fb4cd537d727611cb7dd5537c030671fe1e) )
- ROM_REGION( 0x2000, "asic65", 0 ) /* ASIC65 TMS32015 code */
+ ROM_REGION( 0x2000, "asic65", 0 ) /* ASIC65 TMS32015 code */
ROM_LOAD( "136089-1012.3f", 0x00000, 0x0a80, CRC(7c5498e7) SHA1(9d8b235baf7b75bef8ef9b168647c5b2b80b2cb3) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 6502 code */
ROM_LOAD( "136089-1047.12c", 0x10000, 0x4000, CRC(849dd26c) SHA1(05a0b2a5f7ee4437448b5f076d3066d96dec2320) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -645,23 +645,23 @@ ROM_START( roadriot )
ROM_REGION( 0x1000, "eeprom", 0 )
ROM_LOAD( "roadriot.nv", 0x0000, 0x1000, CRC(d7f73bad) SHA1(017cccde835ca2e03f606de74bea233e4c5a8533) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136089-1001.bin", 0x0000, 0x0200, CRC(5836cb5a) SHA1(2c797f6a1227d6e1fd7a12f99f0254072c8c266e) )
ROM_LOAD( "136089-1002.bin", 0x0200, 0x0200, CRC(44288753) SHA1(811582015264f85a32643196cdb331a41430318f) )
ROM_LOAD( "136089-1003.bin", 0x0400, 0x0200, CRC(1f571706) SHA1(26d5ea59163b3482ab1f8a26178d0849c5fd9692) )
ROM_END
ROM_START( roadrioto )
- ROM_REGION( 0x80004, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80004, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "136089-2014.8d", 0x00000, 0x20000, CRC(bf8aaafc) SHA1(1594d91b56609d49921c866d8f5796619e79217b) ) /* Program ROMs in Blue labels, */
ROM_LOAD16_BYTE( "136089-2013.8c", 0x00001, 0x20000, CRC(5dd2dd70) SHA1(8f6a0e809ec1f6feea8a18197a789086a7b9dd6a) ) /* other ROMs in Yellow labels */
ROM_LOAD16_BYTE( "136089-2016.9d", 0x40000, 0x20000, CRC(6191653c) SHA1(97d1a84a585149e8f2c49cab7af22dc755dff350) ) /* PALs & BPROMs in White labels */
ROM_LOAD16_BYTE( "136089-2015.9c", 0x40001, 0x20000, CRC(0d34419a) SHA1(f16e9fb4cd537d727611cb7dd5537c030671fe1e) )
- ROM_REGION( 0x2000, "asic65", 0 ) /* ASIC65 TMS32015 code */
+ ROM_REGION( 0x2000, "asic65", 0 ) /* ASIC65 TMS32015 code */
ROM_LOAD( "136089-1012.3f", 0x00000, 0x0a80, CRC(7c5498e7) SHA1(9d8b235baf7b75bef8ef9b168647c5b2b80b2cb3) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 6502 code */
ROM_LOAD( "136089-1047.12c", 0x10000, 0x4000, CRC(849dd26c) SHA1(05a0b2a5f7ee4437448b5f076d3066d96dec2320) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -703,7 +703,7 @@ ROM_START( roadrioto )
ROM_REGION( 0x1000, "eeprom", 0 )
ROM_LOAD( "roadriot.nv", 0x0000, 0x1000, CRC(d7f73bad) SHA1(017cccde835ca2e03f606de74bea233e4c5a8533) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136089-1001.bin", 0x0000, 0x0200, CRC(5836cb5a) SHA1(2c797f6a1227d6e1fd7a12f99f0254072c8c266e) )
ROM_LOAD( "136089-1002.bin", 0x0200, 0x0200, CRC(44288753) SHA1(811582015264f85a32643196cdb331a41430318f) )
ROM_LOAD( "136089-1003.bin", 0x0400, 0x0200, CRC(1f571706) SHA1(26d5ea59163b3482ab1f8a26178d0849c5fd9692) )
@@ -711,16 +711,16 @@ ROM_END
ROM_START( guardian )
- ROM_REGION( 0x80004, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x80004, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "136092-2021.8e", 0x00000, 0x20000, CRC(efea1e02) SHA1(f0f1ef300f36953aff73b68ffe6d9950ac575f7d) )
ROM_LOAD16_BYTE( "136092-2020.8cd", 0x00001, 0x20000, CRC(a8f655ba) SHA1(2defe4d138613e248718a617d103794e051746f7) )
ROM_LOAD16_BYTE( "136092-2023.9e", 0x40000, 0x20000, CRC(cfa29316) SHA1(4e0e76304e29ee59bc2ce9a704e3f651dc9d473c) )
ROM_LOAD16_BYTE( "136092-2022.9cd", 0x40001, 0x20000, CRC(ed2abc91) SHA1(81531040d5663f6ab82e924210056e3737e17a8d) )
- ROM_REGION( 0x2000, "asic65", 0 ) /* ASIC65 TMS32015 code */
+ ROM_REGION( 0x2000, "asic65", 0 ) /* ASIC65 TMS32015 code */
ROM_LOAD( "136089-1012.3f", 0x00000, 0x0a80, NO_DUMP )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 6502 code */
ROM_LOAD( "136092-0080-snd.12c", 0x10000, 0x4000, CRC(0388f805) SHA1(49c11313bc4192dbe294cf68b652cb19047889fd) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -752,7 +752,7 @@ ROM_START( guardian )
ROM_REGION( 0x1000, "eeprom", 0 )
ROM_LOAD( "guardian-eeprom.bin", 0x0000, 0x1000, CRC(fba171dc) SHA1(c53f72b7c25602c5fedc38d34d1342fbd10e4a44) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136092-1001.bin", 0x0000, 0x0200, CRC(b3251eeb) SHA1(5e83baa70aaa28f07f32657bf974fd87719972d3) )
ROM_LOAD( "136092-1002.bin", 0x0200, 0x0200, CRC(0c5314da) SHA1(a9c7ee3ab015c7f3ada4200acd2854eb9a5c74b0) )
ROM_LOAD( "136092-1003.bin", 0x0400, 0x0200, CRC(344b406a) SHA1(f4422f8c0d7004d0277a4fc77718d555f80fcf69) )
diff --git a/src/mame/drivers/atarigt.c b/src/mame/drivers/atarigt.c
index fe50e37a052..224b1af63d8 100644
--- a/src/mame/drivers/atarigt.c
+++ b/src/mame/drivers/atarigt.c
@@ -58,8 +58,8 @@
#include "includes/atarigt.h"
-#define LOG_PROTECTION (0)
-#define HACK_TMEK_CONTROLS (0)
+#define LOG_PROTECTION (0)
+#define HACK_TMEK_CONTROLS (0)
@@ -123,8 +123,8 @@ static void cage_irq_callback(running_machine &machine, int reason)
READ32_MEMBER(atarigt_state::special_port2_r)
{
int temp = ioport("SERVICE")->read();
- temp ^= 0x0001; /* /A2DRDY always high for now */
- temp ^= 0x0008; /* A2D.EOC always high for now */
+ temp ^= 0x0001; /* /A2DRDY always high for now */
+ temp ^= 0x0008; /* A2D.EOC always high for now */
return (temp << 16) | temp;
}
@@ -145,27 +145,27 @@ INLINE void compute_fake_pots(int *pots)
pots[0] = pots[1] = pots[2] = pots[3] = 0x80;
- if (fake & 0x01) /* up */
+ if (fake & 0x01) /* up */
{
- if (fake & 0x04) /* up and left */
+ if (fake & 0x04) /* up and left */
pots[3] = 0x00;
- else if (fake & 0x08) /* up and right */
+ else if (fake & 0x08) /* up and right */
pots[1] = 0x00;
- else /* up only */
+ else /* up only */
pots[1] = pots[3] = 0x00;
}
- else if (fake & 0x02) /* down */
+ else if (fake & 0x02) /* down */
{
- if (fake & 0x04) /* down and left */
+ if (fake & 0x04) /* down and left */
pots[3] = 0xff;
- else if (fake & 0x08) /* down and right */
+ else if (fake & 0x08) /* down and right */
pots[1] = 0xff;
- else /* down only */
+ else /* down only */
pots[1] = pots[3] = 0xff;
}
- else if (fake & 0x04) /* left only */
+ else if (fake & 0x04) /* left only */
pots[1] = 0xff, pots[3] = 0x00;
- else if (fake & 0x08) /* right only */
+ else if (fake & 0x08) /* right only */
pots[3] = 0xff, pots[1] = 0x00;
}
#endif
@@ -205,15 +205,15 @@ READ32_MEMBER(atarigt_state::analog_port1_r)
WRITE32_MEMBER(atarigt_state::latch_w)
{
/*
- D13 = 68.DISA
- D12 = ERASE
- D11 = /MOGO
- D8 = VCR
- D5 = /XRESET
- D4 = /SNDRES
- D3 = CC.L
- D0 = CC.R
- */
+ D13 = 68.DISA
+ D12 = ERASE
+ D11 = /MOGO
+ D8 = VCR
+ D5 = /XRESET
+ D4 = /SNDRES
+ D3 = CC.L
+ D0 = CC.R
+ */
/* upper byte */
if (ACCESSING_BITS_24_31)
@@ -654,7 +654,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( common )
- PORT_START("P1_P2") /* 68.SW (A1=0, A1=1) */
+ PORT_START("P1_P2") /* 68.SW (A1=0, A1=1) */
PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
@@ -674,25 +674,25 @@ static INPUT_PORTS_START( common )
PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
- PORT_START("SERVICE") /* 68.STATUS (A2=0) */
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /A2DRDY */
- PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_TILT ) /* TILT */
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ23 */
- PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
- PORT_BIT( 0x0030, IP_ACTIVE_LOW, IPT_UNUSED ) /* NC */
- PORT_SERVICE( 0x0040, IP_ACTIVE_LOW ) /* SELFTEST */
- PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") /* VBLANK */
+ PORT_START("SERVICE") /* 68.STATUS (A2=0) */
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /A2DRDY */
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_TILT ) /* TILT */
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ23 */
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
+ PORT_BIT( 0x0030, IP_ACTIVE_LOW, IPT_UNUSED ) /* NC */
+ PORT_SERVICE( 0x0040, IP_ACTIVE_LOW ) /* SELFTEST */
+ PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") /* VBLANK */
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("COIN") /* 68.STATUS (A2=1) */
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /VBIRQ */
- PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /4MSIRQ */
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ0 */
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ1 */
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
- PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_COIN2 ) /* COINR */
- PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN1 ) /* COINL */
+ PORT_START("COIN") /* 68.STATUS (A2=1) */
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /VBIRQ */
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /4MSIRQ */
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ0 */
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ1 */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
+ PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_COIN2 ) /* COINR */
+ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN1 ) /* COINL */
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
@@ -700,7 +700,7 @@ static INPUT_PORTS_START( tmek )
PORT_INCLUDE( common )
#if (HACK_TMEK_CONTROLS)
- PORT_START("FAKE") /* single digital joystick */
+ PORT_START("FAKE") /* single digital joystick */
PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
@@ -802,23 +802,23 @@ GFXDECODE_END
static const atarirle_desc modesc =
{
- "gfx3", /* region where the GFX data lives */
- 256, /* number of entries in sprite RAM */
- 0, /* left clip coordinate */
- 0, /* right clip coordinate */
-
- 0x0000, /* base palette entry */
- 0x1000, /* maximum number of colors */
-
- {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
- {{ 0,0x0ff0,0,0,0,0,0,0 }}, /* mask for the color */
- {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
- {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
- {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
- {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
- {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
- {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
- {{ 0,0x8000,0,0,0,0,0,0 }} /* mask for the VRAM target */
+ "gfx3", /* region where the GFX data lives */
+ 256, /* number of entries in sprite RAM */
+ 0, /* left clip coordinate */
+ 0, /* right clip coordinate */
+
+ 0x0000, /* base palette entry */
+ 0x1000, /* maximum number of colors */
+
+ {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
+ {{ 0,0x0ff0,0,0,0,0,0,0 }}, /* mask for the color */
+ {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
+ {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
+ {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
+ {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
+ {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
+ {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
+ {{ 0,0x8000,0,0,0,0,0,0 }} /* mask for the VRAM target */
};
@@ -869,16 +869,16 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( tmek )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "0044d", 0x00000, 0x20000, CRC(1cd62725) SHA1(7685794d9fbe3fe7a9978d12e489447b4fba5282) )
ROM_LOAD32_BYTE( "0043d", 0x00001, 0x20000, CRC(82185051) SHA1(a21aad4f6ec948d9cd47efb89e7811c5c2e4850b) )
ROM_LOAD32_BYTE( "0042d", 0x00002, 0x20000, CRC(ef9feda4) SHA1(9fb6e91d4c22e28ced61d0d1f28f5e43191c8762) )
ROM_LOAD32_BYTE( "0041d", 0x00003, 0x20000, CRC(179da056) SHA1(5f7ddf44aab55beaf2c377b0c93279acb6273255) )
- ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
+ ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
ROM_LOAD32_BYTE( "0078c", 0x000000, 0x080000, CRC(ff5b979a) SHA1(deb8ee454b6b7c7bddb2ba0c808869e45b19e55f) )
- ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
+ ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
ROM_LOAD32_WORD( "0077", 0x400000, 0x200000, CRC(8f650f8b) SHA1(e3b48ff4e2093d709134b6bf62cecd101ab5cef4) )
ROM_LOAD32_BYTE( "2501a", 0x400002, 0x080000, CRC(98e51103) SHA1(420d0aac6b1de1bd990b9e4219041192400299f8) )
ROM_LOAD32_BYTE( "2500a", 0x400003, 0x080000, CRC(49c0136c) SHA1(1ad463b1e50df9843abb8c645cbe8a79e42cbb87) )
@@ -917,23 +917,23 @@ ROM_START( tmek )
ROM_LOAD16_BYTE( "0315", 0xe00000, 0x100000, CRC(28e97d06) SHA1(ef115f393c568822cb2cb3cca92c7656e1ee07f9) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
+ ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
ROM_LOAD( "0001b", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "0001c", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
ROM_END
ROM_START( tmek51p )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "prog0", 0x00000, 0x20000, CRC(df16ffc1) SHA1(9b63493bc9fae4c6c58883050921fed1ae8f0cf3) )
ROM_LOAD32_BYTE( "prog1", 0x00001, 0x20000, CRC(a5ab6b62) SHA1(7c12c6f78e795b61c7dd40b871e7f1461c199cab) )
ROM_LOAD32_BYTE( "prog2", 0x00002, 0x20000, CRC(bdcf5942) SHA1(21c54694bfe1e5663e67a54afed2a0f37b0f00de) )
ROM_LOAD32_BYTE( "prog3", 0x00003, 0x20000, CRC(7b59022a) SHA1(7395063ff0ecda0453dc7d981ca0b90b8411b715) )
- ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
+ ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
ROM_LOAD32_BYTE( "0078c", 0x000000, 0x080000, CRC(ff5b979a) SHA1(deb8ee454b6b7c7bddb2ba0c808869e45b19e55f) )
- ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
+ ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
ROM_LOAD32_WORD( "0077", 0x400000, 0x200000, CRC(8f650f8b) SHA1(e3b48ff4e2093d709134b6bf62cecd101ab5cef4) )
ROM_LOAD32_BYTE( "2501a", 0x400002, 0x080000, CRC(98e51103) SHA1(420d0aac6b1de1bd990b9e4219041192400299f8) )
ROM_LOAD32_BYTE( "2500a", 0x400003, 0x080000, CRC(49c0136c) SHA1(1ad463b1e50df9843abb8c645cbe8a79e42cbb87) )
@@ -972,23 +972,23 @@ ROM_START( tmek51p )
ROM_LOAD16_BYTE( "0315", 0xe00000, 0x100000, CRC(28e97d06) SHA1(ef115f393c568822cb2cb3cca92c7656e1ee07f9) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
+ ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
ROM_LOAD( "0001b", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "0001c", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
ROM_END
ROM_START( tmek45 )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "0044c", 0x00000, 0x20000, CRC(6079fc3f) SHA1(f8caedd9708108ce7c2d1300661dadaf2e3a6319) )
ROM_LOAD32_BYTE( "0043c", 0x00001, 0x20000, CRC(23d6388b) SHA1(6144c845ae28777809776d863c0ed5ee3dff5c58) )
ROM_LOAD32_BYTE( "0042c", 0x00002, 0x20000, CRC(ba8745be) SHA1(139a3132ea2c69e37e63868402fcf10852953e9b) )
ROM_LOAD32_BYTE( "0041c", 0x00003, 0x20000, CRC(0285bc17) SHA1(346d9fcbea4b22986be04971074531bc0c014c79) )
- ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
+ ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
ROM_LOAD32_BYTE( "0078b", 0x000000, 0x080000, CRC(a952771c) SHA1(49982ea864a99c07f45886ada7e2c9427a75f775) )
- ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
+ ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
ROM_LOAD32_WORD( "0077", 0x400000, 0x200000, CRC(8f650f8b) SHA1(e3b48ff4e2093d709134b6bf62cecd101ab5cef4) )
ROM_LOAD32_BYTE( "2501a", 0x400002, 0x080000, CRC(98e51103) SHA1(420d0aac6b1de1bd990b9e4219041192400299f8) )
ROM_LOAD32_BYTE( "2500a", 0x400003, 0x080000, CRC(49c0136c) SHA1(1ad463b1e50df9843abb8c645cbe8a79e42cbb87) )
@@ -1027,23 +1027,23 @@ ROM_START( tmek45 )
ROM_LOAD16_BYTE( "0315", 0xe00000, 0x100000, CRC(28e97d06) SHA1(ef115f393c568822cb2cb3cca92c7656e1ee07f9) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
+ ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
ROM_LOAD( "0001b", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "0001c", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
ROM_END
ROM_START( tmek44 )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "0044b", 0x00000, 0x20000, CRC(f7cc0590) SHA1(b60df7535b3ce0c94ca14a2430a3a414d77fc751) )
ROM_LOAD32_BYTE( "0043b", 0x00001, 0x20000, CRC(9fb8e072) SHA1(5904bebf17f31922998f9b31e388abc2ac244385) )
ROM_LOAD32_BYTE( "0042b", 0x00002, 0x20000, CRC(ce68a9b3) SHA1(47b7a0ac8cce3d40f3f7559ec1b137dfdeaf1d83) )
ROM_LOAD32_BYTE( "0041b", 0x00003, 0x20000, CRC(b71ec759) SHA1(d4bed4bbab2c3bd278da4cd0f53580d7f66d8152) )
- ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
+ ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
ROM_LOAD32_BYTE( "0078a", 0x000000, 0x080000, CRC(314d736f) SHA1(b23946fde6ea47d6a6e3430a9df4b06d453a94c8) )
- ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
+ ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
ROM_LOAD32_WORD( "0077", 0x400000, 0x200000, CRC(8f650f8b) SHA1(e3b48ff4e2093d709134b6bf62cecd101ab5cef4) )
ROM_LOAD32_BYTE( "2501a", 0x400002, 0x080000, CRC(98e51103) SHA1(420d0aac6b1de1bd990b9e4219041192400299f8) )
ROM_LOAD32_BYTE( "2500a", 0x400003, 0x080000, CRC(49c0136c) SHA1(1ad463b1e50df9843abb8c645cbe8a79e42cbb87) )
@@ -1082,23 +1082,23 @@ ROM_START( tmek44 )
ROM_LOAD16_BYTE( "0315", 0xe00000, 0x100000, CRC(28e97d06) SHA1(ef115f393c568822cb2cb3cca92c7656e1ee07f9) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
+ ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
ROM_LOAD( "0001b", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "0001c", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
ROM_END
ROM_START( tmek20 )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "pgm0", 0x00000, 0x20000, CRC(f5f7f7be) SHA1(66be472e7c0ef26e2ce2b45488a8e4cfc1b0f80a) )
ROM_LOAD32_BYTE( "pgm1", 0x00001, 0x20000, CRC(284f7971) SHA1(5327f6368abd2ab9740a5150a8660c420f750476) )
ROM_LOAD32_BYTE( "pgm2", 0x00002, 0x20000, CRC(ce9a77d4) SHA1(025143b59d85180286086940b05c8e5ea0b4a7fe) )
ROM_LOAD32_BYTE( "pgm3", 0x00003, 0x20000, CRC(28b0e210) SHA1(7567671beecc7d30e9d4b61cf7d3448bb1dbb072) )
- ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
+ ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
ROM_LOAD32_BYTE( "0078", 0x000000, 0x080000, BAD_DUMP CRC(314d736f) SHA1(b23946fde6ea47d6a6e3430a9df4b06d453a94c8) ) // not dumped from this pcb, rom taken from another set instead
- ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
+ ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
ROM_LOAD32_WORD( "0077", 0x400000, 0x200000, CRC(8f650f8b) SHA1(e3b48ff4e2093d709134b6bf62cecd101ab5cef4) )
ROM_LOAD32_BYTE( "2501a", 0x400002, 0x080000, CRC(98e51103) SHA1(420d0aac6b1de1bd990b9e4219041192400299f8) )
ROM_LOAD32_BYTE( "2500a", 0x400003, 0x080000, CRC(49c0136c) SHA1(1ad463b1e50df9843abb8c645cbe8a79e42cbb87) )
@@ -1137,23 +1137,23 @@ ROM_START( tmek20 )
ROM_LOAD16_BYTE( "0315", 0xe00000, 0x100000, CRC(28e97d06) SHA1(ef115f393c568822cb2cb3cca92c7656e1ee07f9) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
+ ROM_LOAD( "0001a", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
ROM_LOAD( "0001b", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "0001c", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
ROM_END
ROM_START( primrage )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136102-1044b.29l", 0x000000, 0x80000, CRC(35c9c34b) SHA1(4bd1d35cc7c68574819afd648405eedb8db25b4c) )
ROM_LOAD32_BYTE( "136102-1043b.28l", 0x000001, 0x80000, CRC(86322829) SHA1(e0e72888def0931d078921f099bae6788738a291) )
ROM_LOAD32_BYTE( "136102-1042b.27l", 0x000002, 0x80000, CRC(750e8095) SHA1(4660637136b1a25169d8c43646c8b87081763987) )
ROM_LOAD32_BYTE( "136102-1041b.25l", 0x000003, 0x80000, CRC(6a90d283) SHA1(7c18c97cb5e5cdd26a52cd6bc099fbce87055311) )
- ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
+ ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
ROM_LOAD32_BYTE( "136102-1078a.11a", 0x000000, 0x080000, CRC(0656435f) SHA1(f8e498171e754eb8703dad6b2351509bbb27e06b) )
- ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
+ ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
ROM_LOAD32_WORD( "136102-0075", 0x400000, 0x200000, CRC(b685a88e) SHA1(998b8fe54971f6cd96e4c22b19e3831f29d8172d) )
ROM_LOAD32_WORD( "136102-0077", 0x400002, 0x200000, CRC(3283cea8) SHA1(fb7333ca951053a56c501f2ce0eb197c8fcafaf7) )
@@ -1194,52 +1194,52 @@ ROM_START( primrage )
ROM_LOAD16_BYTE( "136102-0331.moh0.7", 0x1e00000, 0x100000, CRC(c6a64dad) SHA1(ee54514463ab61cbaef70da064cf5de591e5861f) )
ROM_REGION( 0x0600, "proms", 0 ) /* N82S147AN */
- ROM_LOAD( "136094-0001a.13s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
+ ROM_LOAD( "136094-0001a.13s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
ROM_LOAD( "136094-0002a.14s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-0003a.15s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
- ROM_REGION( 0x0012, "mainbd_pals", 0 ) /* Dump attempted but security fuse blown */
+ ROM_REGION( 0x0012, "mainbd_pals", 0 ) /* Dump attempted but security fuse blown */
ROM_LOAD( "136101-0021a.22a.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-15LP */
- ROM_LOAD( "136101-1025b.22e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0013a.23e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-15LP */
- ROM_LOAD( "136101-0018a.24e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0017a.25e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL22V10B-10LP */
- ROM_LOAD( "136101-1220a.22u.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-10LP */
- ROM_LOAD( "136094-0015a.17p.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136094-0007a.17s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-1008a.13m.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0011a.11k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-1022a.12k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL22V10B-15LP */
- ROM_LOAD( "136094-0014a.12s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136094-0016a.11s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0009a.10m.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0012a.9n.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0010b.8k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0019a.7k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL20V8B-25LP */
- ROM_LOAD( "136101-0006a.1s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-10LP */
-
- ROM_REGION( 0x0002, "rombd_pals", 0 ) /* Dump attempted but security fuse blown */
+ ROM_LOAD( "136101-1025b.22e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0013a.23e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-15LP */
+ ROM_LOAD( "136101-0018a.24e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0017a.25e.bin", 0x0000, 0x0001, NO_DUMP) /* GAL22V10B-10LP */
+ ROM_LOAD( "136101-1220a.22u.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-10LP */
+ ROM_LOAD( "136094-0015a.17p.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136094-0007a.17s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-1008a.13m.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0011a.11k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-1022a.12k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL22V10B-15LP */
+ ROM_LOAD( "136094-0014a.12s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136094-0016a.11s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0009a.10m.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0012a.9n.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0010b.8k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0019a.7k.bin", 0x0000, 0x0001, NO_DUMP) /* GAL20V8B-25LP */
+ ROM_LOAD( "136101-0006a.1s.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-10LP */
+
+ ROM_REGION( 0x0002, "rombd_pals", 0 ) /* Dump attempted but security fuse blown */
ROM_LOAD( "136102-0261a.bnkdec.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-15LP */
- ROM_LOAD( "136102-0260a.romdec.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-10LP */
+ ROM_LOAD( "136102-0260a.romdec.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-10LP */
- ROM_REGION( 0x0003, "sndbd_pals", 0 ) /* Dump attempted but security fuse blown */
- ROM_LOAD( "136101-0070a.9f.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_REGION( 0x0003, "sndbd_pals", 0 ) /* Dump attempted but security fuse blown */
+ ROM_LOAD( "136101-0070a.9f.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
ROM_LOAD( "136102-0071a.10f.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
- ROM_LOAD( "136101-0073a.11f.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
+ ROM_LOAD( "136101-0073a.11f.bin", 0x0000, 0x0001, NO_DUMP) /* GAL16V8B-25LP */
ROM_END
ROM_START( primrage20 )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136102-0044b.29l", 0x000000, 0x80000, CRC(26139575) SHA1(22e59ab621d58e56969b64701fc59aec085193dd) )
ROM_LOAD32_BYTE( "136102-0043b.28l", 0x000001, 0x80000, CRC(928d2447) SHA1(9bbbdbf056a7b986d985d79be889b9876a710631) )
ROM_LOAD32_BYTE( "136102-0042b.27l", 0x000002, 0x80000, CRC(cd6062b9) SHA1(2973fb561ab68cd48ec132b6720c04d10bedfd19) )
ROM_LOAD32_BYTE( "136102-0041b.25l", 0x000003, 0x80000, CRC(3008f6f0) SHA1(45aac457b4584ee3bd3561e3b2e34e49aa61fbc5) )
- ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
+ ROM_REGION32_LE( 0x200000, "cageboot", 0 ) /* TMS320C31 boot ROM */
ROM_LOAD32_BYTE( "136102-0078a.11a", 0x000000, 0x080000, CRC(91df8d8f) SHA1(6d361f88de604b8f11dd9bfe85ff18bcd322862d) )
- ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
+ ROM_REGION32_LE( 0x1000000, "cage", 0 ) /* TMS320C31 sound ROMs */
ROM_LOAD32_WORD( "136102-0075", 0x400000, 0x200000, CRC(b685a88e) SHA1(998b8fe54971f6cd96e4c22b19e3831f29d8172d) )
ROM_LOAD32_WORD( "136102-0077", 0x400002, 0x200000, CRC(3283cea8) SHA1(fb7333ca951053a56c501f2ce0eb197c8fcafaf7) )
@@ -1280,7 +1280,7 @@ ROM_START( primrage20 )
ROM_LOAD16_BYTE( "136102-0331.moh0.7", 0x1e00000, 0x100000, CRC(c6a64dad) SHA1(ee54514463ab61cbaef70da064cf5de591e5861f) )
ROM_REGION( 0x0600, "proms", 0 ) /* N82S147AN */
- ROM_LOAD( "136094-0001a.13s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
+ ROM_LOAD( "136094-0001a.13s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* microcode for growth renderer */
ROM_LOAD( "136094-0002a.14s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-0003a.15s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
ROM_END
diff --git a/src/mame/drivers/atarigx2.c b/src/mame/drivers/atarigx2.c
index af3221b85a4..2c0d1593ebf 100644
--- a/src/mame/drivers/atarigx2.c
+++ b/src/mame/drivers/atarigx2.c
@@ -60,7 +60,7 @@ READ32_MEMBER(atarigx2_state::special_port2_r)
int temp = ioport("SERVICE")->read();
if (m_cpu_to_sound_ready) temp ^= 0x0020;
if (m_sound_to_cpu_ready) temp ^= 0x0010;
- temp ^= 0x0008; /* A2D.EOC always high for now */
+ temp ^= 0x0008; /* A2D.EOC always high for now */
return (temp << 16) | temp;
}
@@ -91,15 +91,15 @@ READ32_MEMBER(atarigx2_state::a2d_data_r)
WRITE32_MEMBER(atarigx2_state::latch_w)
{
/*
- D13 = 68.DISA
- D12 = ERASE
- D11 = /MOGO
- D8 = VCR
- D5 = /XRESET
- D4 = /SNDRES
- D3 = CC.L
- D0 = CC.R
- */
+ D13 = 68.DISA
+ D12 = ERASE
+ D11 = /MOGO
+ D8 = VCR
+ D5 = /XRESET
+ D4 = /SNDRES
+ D3 = CC.L
+ D0 = CC.R
+ */
logerror("latch_w(%08X) & %08X\n", data, mem_mask);
@@ -1169,110 +1169,110 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( spclords )
- PORT_START("P1_P2") /* 68.SW (A1=0,1) */
+ PORT_START("P1_P2") /* 68.SW (A1=0,1) */
PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 ) /* RED button */
- PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) /* Right thumb */
- PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) /* Right trigger */
- PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) /* Throttle reverse */
+ PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 ) /* RED button */
+ PORT_BIT( 0x00000200, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) /* Right thumb */
+ PORT_BIT( 0x00000400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1) /* Right trigger */
+ PORT_BIT( 0x00000800, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) /* Throttle reverse */
PORT_BIT( 0x00001000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x00002000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 ) /* BLUE button */
- PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) /* Left thumb */
- PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) /* Left trigger */
- PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) /* Throttle forward */
+ PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 ) /* BLUE button */
+ PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) /* Left thumb */
+ PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) /* Left trigger */
+ PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) /* Throttle forward */
PORT_BIT( 0x10000000, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
- PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) /* Throttle button */
+ PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) /* Throttle button */
PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_START("SERVICE") /* 68.STATUS (A2=0) */
- PORT_BIT( 0x0007, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
- PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDIRQ */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDFULL */
+ PORT_BIT( 0x0007, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDIRQ */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDFULL */
PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("SPECIAL") /* 68.STATUS (A2=1) */
- PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ */
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XFULL */
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
- PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ */
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XFULL */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
+ PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_iii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_iii ) /* audio board port */
- PORT_START("A2D0") /* A2D @ 0xD00000 */
+ PORT_START("A2D0") /* A2D @ 0xD00000 */
PORT_BIT ( 0x00ff, 0x0080, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D1") /* A2D @ 0xD00002 */
+ PORT_START("A2D1") /* A2D @ 0xD00002 */
PORT_BIT ( 0x00ff, 0x0080, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D2") /* A2D @ 0xD00004 */
+ PORT_START("A2D2") /* A2D @ 0xD00004 */
PORT_BIT ( 0x00ff, 0x0080, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D3") /* A2D @ 0xD00006 */
+ PORT_START("A2D3") /* A2D @ 0xD00006 */
PORT_BIT ( 0x00ff, 0x0080, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( motofren )
- PORT_START("P1_P2") /* 68.SW (A1=0,1) */
+ PORT_START("P1_P2") /* 68.SW (A1=0,1) */
PORT_BIT( 0x0000ffff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x00ff0000, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 ) /* Start/fire */
- PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) /* AUX3 */
- PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) /* AUX2 */
- PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) /* AUX1 */
+ PORT_BIT( 0x01000000, IP_ACTIVE_LOW, IPT_START1 ) /* Start/fire */
+ PORT_BIT( 0x02000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) /* AUX3 */
+ PORT_BIT( 0x04000000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) /* AUX2 */
+ PORT_BIT( 0x08000000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) /* AUX1 */
PORT_BIT( 0xf0000000, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("SERVICE") /* 68.STATUS (A2=0) */
- PORT_BIT( 0x0007, IP_ACTIVE_LOW, IPT_UNUSED ) /* +5V */
- PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDIRQ */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDFULL */
+ PORT_START("SERVICE") /* 68.STATUS (A2=0) */
+ PORT_BIT( 0x0007, IP_ACTIVE_LOW, IPT_UNUSED ) /* +5V */
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDIRQ */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDFULL */
PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("SPECIAL") /* 68.STATUS (A2=1) */
- PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ */
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XFULL */
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
- PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_START("SPECIAL") /* 68.STATUS (A2=1) */
+ PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ */
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XFULL */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
+ PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_iii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_iii ) /* audio board port */
- PORT_START("A2D0") /* A2D @ 0xD00000 */
+ PORT_START("A2D0") /* A2D @ 0xD00000 */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(16)
- PORT_START("A2D1") /* A2D @ 0xD00002 */
+ PORT_START("A2D1") /* A2D @ 0xD00002 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D2") /* A2D @ 0xD00004 */
+ PORT_START("A2D2") /* A2D @ 0xD00004 */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
- PORT_START("A2D3") /* A2D @ 0xD00006 */
+ PORT_START("A2D3") /* A2D @ 0xD00006 */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( rrreveng )
- PORT_START("P1_P2") /* 68.SW (A1=0,1) */
+ PORT_START("P1_P2") /* 68.SW (A1=0,1) */
PORT_BIT( 0x000000ff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x00000100, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x0000fe00, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -1285,38 +1285,38 @@ static INPUT_PORTS_START( rrreveng )
PORT_BIT( 0x40000000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
PORT_BIT( 0x80000000, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("SERVICE") /* 68.STATUS (A2=0) */
- PORT_BIT( 0x0007, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
- PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDIRQ */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDFULL */
+ PORT_START("SERVICE") /* 68.STATUS (A2=0) */
+ PORT_BIT( 0x0007, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* A2D.EOC */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDIRQ */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /AUDFULL */
PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("SPECIAL") /* 68.STATUS (A2=1) */
- PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ */
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XFULL */
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
- PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_START("SPECIAL") /* 68.STATUS (A2=1) */
+ PORT_BIT( 0x0003, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XIRQ */
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /XFULL */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SERVICER */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL ) /* /SER.L */
+ PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_SPECIAL ) /* +5V */
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_iii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_iii ) /* audio board port */
- PORT_START("A2D0") /* A2D @ 0xD00000 */
+ PORT_START("A2D0") /* A2D @ 0xD00000 */
PORT_BIT ( 0x00ff, 0x0010, IPT_PEDAL ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D1") /* A2D @ 0xD00002 */
+ PORT_START("A2D1") /* A2D @ 0xD00002 */
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D2") /* A2D @ 0xD00004 */
+ PORT_START("A2D2") /* A2D @ 0xD00004 */
PORT_BIT ( 0x00ff, 0x0080, IPT_PADDLE ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("A2D3") /* A2D @ 0xD00006 */
+ PORT_START("A2D3") /* A2D @ 0xD00006 */
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
@@ -1369,44 +1369,44 @@ GFXDECODE_END
static const atarirle_desc modesc_0x200 =
{
- "gfx3", /* region where the GFX data lives */
- 256, /* number of entries in sprite RAM */
- 0, /* left clip coordinate */
- 0, /* right clip coordinate */
-
- 0x200, /* base palette entry */
- 0x400, /* maximum number of colors */
-
- {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
- {{ 0,0x01f0,0,0,0,0,0,0 }}, /* mask for the color */
- {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
- {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
- {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
- {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
- {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
- {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
- {{ 0 }} /* mask for the VRAM target */
+ "gfx3", /* region where the GFX data lives */
+ 256, /* number of entries in sprite RAM */
+ 0, /* left clip coordinate */
+ 0, /* right clip coordinate */
+
+ 0x200, /* base palette entry */
+ 0x400, /* maximum number of colors */
+
+ {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
+ {{ 0,0x01f0,0,0,0,0,0,0 }}, /* mask for the color */
+ {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
+ {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
+ {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
+ {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
+ {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
+ {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
+ {{ 0 }} /* mask for the VRAM target */
};
static const atarirle_desc modesc_0x400 =
{
- "gfx3", /* region where the GFX data lives */
- 256, /* number of entries in sprite RAM */
- 0, /* left clip coordinate */
- 0, /* right clip coordinate */
-
- 0x400, /* base palette entry */
- 0x400, /* maximum number of colors */
-
- {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
- {{ 0,0x03f0,0,0,0,0,0,0 }}, /* mask for the color */
- {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
- {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
- {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
- {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
- {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
- {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
- {{ 0 }} /* mask for the VRAM target */
+ "gfx3", /* region where the GFX data lives */
+ 256, /* number of entries in sprite RAM */
+ 0, /* left clip coordinate */
+ 0, /* right clip coordinate */
+
+ 0x400, /* base palette entry */
+ 0x400, /* maximum number of colors */
+
+ {{ 0x7fff,0,0,0,0,0,0,0 }}, /* mask for the code index */
+ {{ 0,0x03f0,0,0,0,0,0,0 }}, /* mask for the color */
+ {{ 0,0,0xffc0,0,0,0,0,0 }}, /* mask for the X position */
+ {{ 0,0,0,0xffc0,0,0,0,0 }}, /* mask for the Y position */
+ {{ 0,0,0,0,0xffff,0,0,0 }}, /* mask for the scale factor */
+ {{ 0x8000,0,0,0,0,0,0,0 }}, /* mask for the horizontal flip */
+ {{ 0,0,0,0,0,0,0x00ff,0 }}, /* mask for the order */
+ {{ 0,0x0e00,0,0,0,0,0,0 }}, /* mask for the priority */
+ {{ 0 }} /* mask for the VRAM target */
};
@@ -1461,20 +1461,20 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( spclords )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "main0rc.095", 0x000000, 0x020000, CRC(82ddf575) SHA1(e2821b2f576694bce4590cd03b944b7991ecbc27) )
ROM_LOAD32_BYTE( "main1rc.095", 0x000001, 0x020000, CRC(69d64819) SHA1(e9cb99b0ba2a0e23e7699a61130e5e8a4b632db4) )
ROM_LOAD32_BYTE( "main2rc.095", 0x000002, 0x020000, CRC(49d30630) SHA1(2d0f2abe5d17b4cf575f80687502fac33c7f3206) )
ROM_LOAD32_BYTE( "main3rc.095", 0x000003, 0x020000, CRC(3872424c) SHA1(db08ad9386dfe8fa4e2a83a2505118a636247279) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136095.80a", 0x10000, 0x4000, CRC(33bc0ede) SHA1(2ee30d9125057cdfbdb83e4dbf28306c35a9c233) )
ROM_CONTINUE( 0x04000, 0xc000 )
ROM_REGION( 0x60000, "gfx1", 0 )
ROM_LOAD( "136095.30a", 0x00000, 0x20000, CRC(27e0cfec) SHA1(03df57757d091f9a0b8c8d98d091dd759f570788) ) /* playfield, planes 0-1 */
ROM_LOAD( "136095.31a", 0x20000, 0x20000, CRC(5529cdc7) SHA1(8aff8a42fb2a86b7e4666940da4c1ee19dab6281) ) /* playfield, planes 2-3 */
- ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
+ ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
ROM_REGION( 0x020000, "gfx2", 0 )
ROM_LOAD( "136095.25a", 0x000000, 0x20000, CRC(1669496e) SHA1(005deaafd6156505e3a27966123e58928837ad9f) ) /* alphanumerics */
@@ -1499,7 +1499,7 @@ ROM_START( spclords )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136095.81a", 0x00000, 0x80000, CRC(212560dd) SHA1(9d90bca5b478050d640b2393c9d3d59a4bd493dd) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136095-001a.bin", 0x0000, 0x0200, BAD_DUMP CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* Not dumped from actual PCB, but seems common to the platform */
ROM_LOAD( "136095-002a.bin", 0x0200, 0x0200, BAD_DUMP CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) ) /* Confirmed for Moto Frenzy & Road Riot's Revenge */
ROM_LOAD( "136095-003a.bin", 0x0400, 0x0200, BAD_DUMP CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1507,20 +1507,20 @@ ROM_END
ROM_START( spclordsb )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136095.21b", 0x00000, 0x20000, CRC(2ba99ce2) SHA1(5d8d138698c29838a85da1721c3400c666a14e18) )
ROM_LOAD32_BYTE( "136095.22b", 0x00001, 0x20000, CRC(631c5009) SHA1(6b2ea907087e411579f55dff60724ba33afa8a06) )
ROM_LOAD32_BYTE( "136095.23b", 0x00002, 0x20000, CRC(bc64ab63) SHA1(999851a39123f6a01cb83d97ea744e12590b6e7e) )
ROM_LOAD32_BYTE( "136095.24b", 0x00003, 0x20000, CRC(7284a01a) SHA1(afa866c97b4c3df7fda3c196072231096beaa0db) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136095.80a", 0x10000, 0x4000, CRC(33bc0ede) SHA1(2ee30d9125057cdfbdb83e4dbf28306c35a9c233) )
ROM_CONTINUE( 0x04000, 0xc000 )
ROM_REGION( 0x60000, "gfx1", 0 )
ROM_LOAD( "136095.30a", 0x00000, 0x20000, CRC(27e0cfec) SHA1(03df57757d091f9a0b8c8d98d091dd759f570788) ) /* playfield, planes 0-1 */
ROM_LOAD( "136095.31a", 0x20000, 0x20000, CRC(5529cdc7) SHA1(8aff8a42fb2a86b7e4666940da4c1ee19dab6281) ) /* playfield, planes 2-3 */
- ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
+ ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
ROM_REGION( 0x020000, "gfx2", 0 )
ROM_LOAD( "136095.25a", 0x000000, 0x20000, CRC(1669496e) SHA1(005deaafd6156505e3a27966123e58928837ad9f) ) /* alphanumerics */
@@ -1545,7 +1545,7 @@ ROM_START( spclordsb )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136095.81a", 0x00000, 0x80000, CRC(212560dd) SHA1(9d90bca5b478050d640b2393c9d3d59a4bd493dd) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136095-001a.bin", 0x0000, 0x0200, BAD_DUMP CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* Not dumped from actual PCB, but seems common to the platform */
ROM_LOAD( "136095-002a.bin", 0x0200, 0x0200, BAD_DUMP CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) ) /* Confirmed for Moto Frenzy & Road Riot's Revenge */
ROM_LOAD( "136095-003a.bin", 0x0400, 0x0200, BAD_DUMP CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1553,20 +1553,20 @@ ROM_END
ROM_START( spclordsg )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "german0.095", 0x000000, 0x020000, CRC(5a885f8e) SHA1(ec7ef0d76320099a6f3fad80c9ec404ce8602557) )
ROM_LOAD32_BYTE( "german1.095", 0x000001, 0x020000, CRC(56f8d517) SHA1(4bcd2d368d48e7492a739aa3041a40e1518b8c94) )
ROM_LOAD32_BYTE( "german2.095", 0x000002, 0x020000, CRC(9527df10) SHA1(c18434c1f40fa23a6cc78df7104c7e2e6888d189) )
ROM_LOAD32_BYTE( "german3.095", 0x000003, 0x020000, CRC(0aaaad66) SHA1(382b859be652d7d83319907d354d294643cef2b4) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136095.80a", 0x10000, 0x4000, CRC(33bc0ede) SHA1(2ee30d9125057cdfbdb83e4dbf28306c35a9c233) )
ROM_CONTINUE( 0x04000, 0xc000 )
ROM_REGION( 0x60000, "gfx1", 0 )
ROM_LOAD( "136095.30a", 0x00000, 0x20000, CRC(27e0cfec) SHA1(03df57757d091f9a0b8c8d98d091dd759f570788) ) /* playfield, planes 0-1 */
ROM_LOAD( "136095.31a", 0x20000, 0x20000, CRC(5529cdc7) SHA1(8aff8a42fb2a86b7e4666940da4c1ee19dab6281) ) /* playfield, planes 2-3 */
- ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
+ ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
ROM_REGION( 0x020000, "gfx2", 0 )
ROM_LOAD( "136095.25a", 0x000000, 0x20000, CRC(1669496e) SHA1(005deaafd6156505e3a27966123e58928837ad9f) ) /* alphanumerics */
@@ -1591,7 +1591,7 @@ ROM_START( spclordsg )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136095.81a", 0x00000, 0x80000, CRC(212560dd) SHA1(9d90bca5b478050d640b2393c9d3d59a4bd493dd) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136095-001a.bin", 0x0000, 0x0200, BAD_DUMP CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* Not dumped from actual PCB, but seems common to the platform */
ROM_LOAD( "136095-002a.bin", 0x0200, 0x0200, BAD_DUMP CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) ) /* Confirmed for Moto Frenzy & Road Riot's Revenge */
ROM_LOAD( "136095-003a.bin", 0x0400, 0x0200, BAD_DUMP CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1599,20 +1599,20 @@ ROM_END
ROM_START( spclordsa )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136095.21a", 0x00000, 0x20000, CRC(fe8edb0b) SHA1(ae50a637df476c62f8194577cdca2677f9b5cbd0) )
ROM_LOAD32_BYTE( "136095.22a", 0x00001, 0x20000, CRC(c2d2867b) SHA1(481fe54d6cd8698bfd2776e2af6f51332304b7ba) )
ROM_LOAD32_BYTE( "136095.23a", 0x00002, 0x20000, CRC(20a0e443) SHA1(54597342901d6b38dddbe754f41ceeddcc4e5289) )
ROM_LOAD32_BYTE( "136095.24a", 0x00003, 0x20000, CRC(d3f0439c) SHA1(f9245f448b77187b4cd5d9436b5caebd2800be5d))
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136095.80a", 0x10000, 0x4000, CRC(33bc0ede) SHA1(2ee30d9125057cdfbdb83e4dbf28306c35a9c233) )
ROM_CONTINUE( 0x04000, 0xc000 )
ROM_REGION( 0x60000, "gfx1", 0 )
ROM_LOAD( "136095.30a", 0x00000, 0x20000, CRC(27e0cfec) SHA1(03df57757d091f9a0b8c8d98d091dd759f570788) ) /* playfield, planes 0-1 */
ROM_LOAD( "136095.31a", 0x20000, 0x20000, CRC(5529cdc7) SHA1(8aff8a42fb2a86b7e4666940da4c1ee19dab6281) ) /* playfield, planes 2-3 */
- ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
+ ROM_FILL( 0x40000, 0x20000, 0 ) /* playfield, planes 4-5 */
ROM_REGION( 0x020000, "gfx2", 0 )
ROM_LOAD( "136095.25a", 0x000000, 0x20000, CRC(1669496e) SHA1(005deaafd6156505e3a27966123e58928837ad9f) ) /* alphanumerics */
@@ -1637,7 +1637,7 @@ ROM_START( spclordsa )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136095.81a", 0x00000, 0x80000, CRC(212560dd) SHA1(9d90bca5b478050d640b2393c9d3d59a4bd493dd) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136095-001a.bin", 0x0000, 0x0200, BAD_DUMP CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* Not dumped from actual PCB, but seems common to the platform */
ROM_LOAD( "136095-002a.bin", 0x0200, 0x0200, BAD_DUMP CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) ) /* Confirmed for Moto Frenzy & Road Riot's Revenge */
ROM_LOAD( "136095-003a.bin", 0x0400, 0x0200, BAD_DUMP CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1645,13 +1645,13 @@ ROM_END
ROM_START( motofren )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136094-moto0.23e", 0x000000, 0x020000, CRC(2c6ec446) SHA1(d83fee26b384e6fd783104746e6560504ae43ca6) )
ROM_LOAD32_BYTE( "136094-moto1.23j", 0x000001, 0x020000, CRC(e7163e7b) SHA1(7ea8a7a63bd1befee4cf9e708949fca7f06572c1) )
ROM_LOAD32_BYTE( "136094-moto2.37e", 0x000002, 0x020000, CRC(6b1c7626) SHA1(b318a5856bcbd6a8fc7eb92e4b9a576b8c16cbf3) )
ROM_LOAD32_BYTE( "136094-moto3.37j", 0x000003, 0x020000, CRC(44c3cd2a) SHA1(a16046586cbaa000e056115c92b5f22bf49869ad) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136094-0080a.12c", 0x10000, 0x4000, CRC(0b1e565c) SHA1(03bdeafd8cf680f76bbd1f9aba6efac27f19a93c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1685,7 +1685,7 @@ ROM_START( motofren )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136094-0082a.19e", 0x00000, 0x80000, CRC(fde543c4) SHA1(7d36d7f2f30d0ac40da77a36a47488d75474caaf) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) )
ROM_LOAD( "136094-002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1693,13 +1693,13 @@ ROM_END
ROM_START( motofrenmd )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136094-0221a.23e", 0x00000, 0x20000, CRC(134e9ff0) SHA1(801b817bf49b4317a7518192025a878b9cd13f7f) )
ROM_LOAD32_BYTE( "136094-0222a.23j", 0x00001, 0x20000, CRC(f6df65c7) SHA1(0a2092a509ae8c61e3f55c30c47bf39c71e2aa6e) )
ROM_LOAD32_BYTE( "136094-0223a.37e", 0x00002, 0x20000, CRC(cdb04a4a) SHA1(ee342bdb5654e8b841b1f60e46d1bcae7c4e5cd2) )
ROM_LOAD32_BYTE( "136094-0224a.37j", 0x00003, 0x20000, CRC(f3a9949f) SHA1(d3fa68fc63c505dd4c9d0e0c7f0625cc24ac9571) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136094-0080b.12c", 0x10000, 0x4000, CRC(5e542608) SHA1(8a10b5fac6ac120c7aae2edaa12413c9b8345d87) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1733,25 +1733,25 @@ ROM_START( motofrenmd )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136094-0082a.19e", 0x00000, 0x80000, CRC(fde543c4) SHA1(7d36d7f2f30d0ac40da77a36a47488d75474caaf) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) )
ROM_LOAD( "136094-002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
- ROM_REGION( 0x10000, "clarn", 0 ) /* ADSP2105 (40 MHz) CPU code for communications / Game Link with another PCB */
+ ROM_REGION( 0x10000, "clarn", 0 ) /* ADSP2105 (40 MHz) CPU code for communications / Game Link with another PCB */
ROM_LOAD( "136094-0071a.1j", 0x00000, 0x10000, CRC(089bc0a4) SHA1(677f95aac18fecfc6067d93f488999775889be4c) )
ROM_END
#ifdef UNUSED_DEFINITION
ROM_START( motofrei )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136094-motoi0.23e", 0x000000, 0x020000, CRC(a2ed9656) SHA1(7473400ee26e72d8ca51dd1f84a6c3bf0c5a72e9) )
ROM_LOAD32_BYTE( "136094-motoi1.23j", 0x000001, 0x020000, CRC(5ded2f8d) SHA1(df146f110abf3d53f1c968baac1a6fc6e1871aa0) )
ROM_LOAD32_BYTE( "136094-motoi2.37e", 0x000002, 0x020000, CRC(7a26217f) SHA1(1271a000e2976480a3b959609a5597498886be4f) )
ROM_LOAD32_BYTE( "136094-motoi3.37j", 0x000003, 0x020000, CRC(ff5ca6ad) SHA1(1e26db56940ce1db819d2179f4ce3962e0b5b732) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136094-0080a.12c", 0x10000, 0x4000, CRC(0b1e565c) SHA1(03bdeafd8cf680f76bbd1f9aba6efac27f19a93c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1785,7 +1785,7 @@ ROM_START( motofrei )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136094-0082a.19e", 0x00000, 0x80000, CRC(fde543c4) SHA1(7d36d7f2f30d0ac40da77a36a47488d75474caaf) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) )
ROM_LOAD( "136094-002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1794,13 +1794,13 @@ ROM_END
#ifdef UNUSED_DEFINITION
ROM_START( motofreg )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136094-motog0.23e", 0x000000, 0x020000, CRC(1b205eed) SHA1(e5bcabd6b0b8e7f06e9be0f7f66c86d09840d876) )
ROM_LOAD32_BYTE( "136094-motog1.23j", 0x000001, 0x020000, CRC(f28e6634) SHA1(2d5d151cbbebdb8691b01398e0be6a08b2bc65ac) )
ROM_LOAD32_BYTE( "136094-motog2.37e", 0x000002, 0x020000, CRC(01400d54) SHA1(cd539497465857a804b5bc228bb0c93afd1e684e) )
ROM_LOAD32_BYTE( "136094-motog3.37j", 0x000003, 0x020000, CRC(c467c136) SHA1(9407bdf65ee6261e30227e6b87e2a35da8ee124e) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136094-0080a.12c", 0x10000, 0x4000, CRC(0b1e565c) SHA1(03bdeafd8cf680f76bbd1f9aba6efac27f19a93c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1834,7 +1834,7 @@ ROM_START( motofreg )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136094-0082a.19e", 0x00000, 0x80000, CRC(fde543c4) SHA1(7d36d7f2f30d0ac40da77a36a47488d75474caaf) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) )
ROM_LOAD( "136094-002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1843,13 +1843,13 @@ ROM_END
#ifdef UNUSED_DEFINITION
ROM_START( motofmdg )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136094-mdg0.23e", 0x000000, 0x020000, CRC(5839b940) SHA1(0b331869e938a7e344d4a514a8b70d26f5d1fc14) )
ROM_LOAD32_BYTE( "136094-mdg1.23j", 0x000001, 0x020000, CRC(c46a4104) SHA1(76543fefff535938f11ba7b68e97a786d35f5b82) )
ROM_LOAD32_BYTE( "136094-mdg2.37e", 0x000002, 0x020000, CRC(0b8bfe6e) SHA1(7220032a07928fd8a887c63ffcab4ec526733cae) )
ROM_LOAD32_BYTE( "136094-mdg3.37j", 0x000003, 0x020000, CRC(1dcd0d09) SHA1(0f6801694498688ed94588ac4b828ac56f3a16ec) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136094-0080a.12c", 0x10000, 0x4000, CRC(0b1e565c) SHA1(03bdeafd8cf680f76bbd1f9aba6efac27f19a93c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1883,7 +1883,7 @@ ROM_START( motofmdg )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136094-0082a.19e", 0x00000, 0x80000, CRC(fde543c4) SHA1(7d36d7f2f30d0ac40da77a36a47488d75474caaf) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) )
ROM_LOAD( "136094-002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1891,13 +1891,13 @@ ROM_END
#endif
ROM_START( motofrenft )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136094-ft0.23e", 0x000000, 0x020000, CRC(99158754) SHA1(46e73a465aceb147e1ca1bd982448079880cc47e) )
ROM_LOAD32_BYTE( "136094-ft1.23j", 0x000001, 0x020000, CRC(33c4e205) SHA1(8a223481cfe2aa45a815c6a18017a14502e929b3) )
ROM_LOAD32_BYTE( "136094-ft2.37e", 0x000002, 0x020000, CRC(30eb94bb) SHA1(b7a2b41570d2110aaedea8a3b9d120af31671bbd) )
ROM_LOAD32_BYTE( "136094-ft3.37j", 0x000003, 0x020000, CRC(a92e05e3) SHA1(354b6bbb058d10c4da55cb58bf05eae83350ba08) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136094-0080a.12c", 0x10000, 0x4000, CRC(0b1e565c) SHA1(03bdeafd8cf680f76bbd1f9aba6efac27f19a93c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1931,7 +1931,7 @@ ROM_START( motofrenft )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136094-0082a.19e", 0x00000, 0x80000, CRC(fde543c4) SHA1(7d36d7f2f30d0ac40da77a36a47488d75474caaf) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) )
ROM_LOAD( "136094-002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1939,13 +1939,13 @@ ROM_END
ROM_START( motofrenmf )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "136094-ftmd0.23e", 0x000000, 0x020000, CRC(9be0803e) SHA1(b5e3029ef43adfeafd5979d4ee49a3eb62efd629) )
ROM_LOAD32_BYTE( "136094-ftmd1.23j", 0x000001, 0x020000, CRC(2a5e9b18) SHA1(af671680047678f86614e23439ac1f0420528343) )
ROM_LOAD32_BYTE( "136094-ftmd2.37e", 0x000002, 0x020000, CRC(769223fc) SHA1(acfafae3d81a6a3a4ff82c6381590ac31ad80f23) )
ROM_LOAD32_BYTE( "136094-ftmd3.37j", 0x000003, 0x020000, CRC(96382cc0) SHA1(ba2b6b105c552077767d1185886761fce3ec2885) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136094-0080a.12c", 0x10000, 0x4000, CRC(0b1e565c) SHA1(03bdeafd8cf680f76bbd1f9aba6efac27f19a93c) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -1979,7 +1979,7 @@ ROM_START( motofrenmf )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "136094-0082a.19e", 0x00000, 0x80000, CRC(fde543c4) SHA1(7d36d7f2f30d0ac40da77a36a47488d75474caaf) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) )
ROM_LOAD( "136094-002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) )
ROM_LOAD( "136094-003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) )
@@ -1987,7 +1987,7 @@ ROM_END
ROM_START( rrreveng )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "revenge.23e", 0x00000, 0x20000, CRC(3ade13a6) SHA1(672dd0800d6a1cf6cbb2adcebe452a0df71b3236) ) /* Test menu shows 06SEP1994 14:25:13 */
ROM_LOAD32_BYTE( "revenge.23j", 0x00001, 0x20000, CRC(aff623d5) SHA1(3ad419deb2f40d62f5a6803035c5d08fe82833f4) )
ROM_LOAD32_BYTE( "revenge.37e", 0x00002, 0x20000, CRC(b5e2a3e2) SHA1(b6ad6d03120ad6699af31d09474b82979ead65bb) )
@@ -2013,12 +2013,12 @@ ROM_START( rrreveng )
ROM_LOAD16_BYTE( "revenge.31t", 0x400000, 0x80000, CRC(086fb896) SHA1(5ca3aea3a52e73a1054c88759d957709c2ad22a2) )
ROM_LOAD16_BYTE( "revenge.31r", 0x400001, 0x80000, CRC(518fdd7c) SHA1(ccee646efb178aa3720e75524646e20d18b27694) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-0001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* 74S472AN BPROM */
ROM_LOAD( "136094-0002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) ) /* 74S472AN BPROM */
ROM_LOAD( "136094-0003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) ) /* 74S472AN BPROM */
- ROM_REGION( 0x0600, "pals", 0 ) /* none of these have been verified as good */
+ ROM_REGION( 0x0600, "pals", 0 ) /* none of these have been verified as good */
ROM_LOAD( "136094-0019b.3n", 0x0000, 0x0157, CRC(598d5009) SHA1(9804f05fbf1b9324f8c3937e0953da02870d988b) ) /* GAL20V8A */
ROM_LOAD( "136094-0010a.5n", 0x0000, 0x0117, CRC(87ff6393) SHA1(df1f0a5450485598c0ef7fa4981cc0e40a6a5073) ) /* GAL16V8A */
ROM_LOAD( "136094-0011b.5r", 0x0000, 0x0117, CRC(832671eb) SHA1(85232128a4b03c4e3dffb4f2e6381a89f4f9aac5) ) /* GAL16V8A */
@@ -2036,7 +2036,7 @@ ROM_START( rrreveng )
/* all roms above are from this PCB however the sound board was missing - assumed to be the same */
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "rr65snd.bin", 0x10000, 0x4000, CRC(d78429da) SHA1(a4d36d74986f08c793f15f2e67cb97a8c91c5e90) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -2049,13 +2049,13 @@ ROM_END
ROM_START( rrrevenga ) /* Same program roms as the set below, but shares more roms with the most current version (parent) */
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "rrprghh.23e", 0x00000, 0x20000, CRC(d2903e9d) SHA1(8782cd6ee39e2159b9ebc68ecdc3ecefcdeb8623) ) /* Test menu shows 27JAN1994 17:02:20 */
ROM_LOAD32_BYTE( "rrprghl.23j", 0x00001, 0x20000, CRC(1afd500c) SHA1(6d24087a839e5e7d9c764026a9f3089e52785cdb) )
ROM_LOAD32_BYTE( "rrprglh.37e", 0x00002, 0x20000, CRC(2b03a6fc) SHA1(7c95a0307b854bd37fd327ff1af1b69aa60fb2fd) )
ROM_LOAD32_BYTE( "rrprgll.37j", 0x00003, 0x20000, CRC(acf078da) SHA1(3506e105d3b208864ce12ab20e6250cb3a0005d6) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "rr65snd.bin", 0x10000, 0x4000, CRC(d78429da) SHA1(a4d36d74986f08c793f15f2e67cb97a8c91c5e90) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -2085,12 +2085,12 @@ ROM_START( rrrevenga ) /* Same program roms as the set below, but shares more ro
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "rralpc1.bin", 0x00000, 0x80000, CRC(7ccd26d7) SHA1(1a74bdc66482896f5b9795d27383aa993e5fbaa4) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-0001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* 74S472AN BPROM */
ROM_LOAD( "136094-0002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) ) /* 74S472AN BPROM */
ROM_LOAD( "136094-0003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) ) /* 74S472AN BPROM */
- ROM_REGION( 0x0600, "pals", 0 ) /* none of these have been verified as good */
+ ROM_REGION( 0x0600, "pals", 0 ) /* none of these have been verified as good */
ROM_LOAD( "136094-0019b.3n", 0x0000, 0x0157, CRC(598d5009) SHA1(9804f05fbf1b9324f8c3937e0953da02870d988b) ) /* GAL20V8A */
ROM_LOAD( "136094-0010a.5n", 0x0000, 0x0117, CRC(87ff6393) SHA1(df1f0a5450485598c0ef7fa4981cc0e40a6a5073) ) /* GAL16V8A */
ROM_LOAD( "136094-0011b.5r", 0x0000, 0x0117, CRC(832671eb) SHA1(85232128a4b03c4e3dffb4f2e6381a89f4f9aac5) ) /* GAL16V8A */
@@ -2109,13 +2109,13 @@ ROM_END
ROM_START( rrrevengb )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 8*64k for 68000 code */
ROM_LOAD32_BYTE( "rrprghh.23e", 0x00000, 0x20000, CRC(d2903e9d) SHA1(8782cd6ee39e2159b9ebc68ecdc3ecefcdeb8623) )
ROM_LOAD32_BYTE( "rrprghl.23j", 0x00001, 0x20000, CRC(1afd500c) SHA1(6d24087a839e5e7d9c764026a9f3089e52785cdb) )
ROM_LOAD32_BYTE( "rrprglh.37e", 0x00002, 0x20000, CRC(2b03a6fc) SHA1(7c95a0307b854bd37fd327ff1af1b69aa60fb2fd) )
ROM_LOAD32_BYTE( "rrprgll.37j", 0x00003, 0x20000, CRC(acf078da) SHA1(3506e105d3b208864ce12ab20e6250cb3a0005d6) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "rr65snd.bin", 0x10000, 0x4000, CRC(d78429da) SHA1(a4d36d74986f08c793f15f2e67cb97a8c91c5e90) )
ROM_CONTINUE( 0x04000, 0xc000 )
@@ -2145,12 +2145,12 @@ ROM_START( rrrevengb )
ROM_REGION( 0x80000, "adpcmr", 0 )
ROM_LOAD( "rralpc1.bin", 0x00000, 0x80000, CRC(7ccd26d7) SHA1(1a74bdc66482896f5b9795d27383aa993e5fbaa4) )
- ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
+ ROM_REGION( 0x0600, "proms", 0 ) /* microcode for growth renderer */
ROM_LOAD( "136094-0001a.22s", 0x0000, 0x0200, CRC(a70ade3f) SHA1(f4a558b17767eed2683c768d1b441e75edcff967) ) /* 74S472AN BPROM */
ROM_LOAD( "136094-0002a.21s", 0x0200, 0x0200, CRC(f4768b4d) SHA1(a506fa5386ab0ea2851ff1f8474d4bfc66deaa70) ) /* 74S472AN BPROM */
ROM_LOAD( "136094-0003a.20s", 0x0400, 0x0200, CRC(22a76ad4) SHA1(ce840c283bbd3a5f19dc8d91b19d1571eff51ff4) ) /* 74S472AN BPROM */
- ROM_REGION( 0x0600, "pals", 0 ) /* none of these have been verified as good */
+ ROM_REGION( 0x0600, "pals", 0 ) /* none of these have been verified as good */
ROM_LOAD( "136094-0019b.3n", 0x0000, 0x0157, CRC(598d5009) SHA1(9804f05fbf1b9324f8c3937e0953da02870d988b) ) /* GAL20V8A */
ROM_LOAD( "136094-0010a.5n", 0x0000, 0x0117, CRC(87ff6393) SHA1(df1f0a5450485598c0ef7fa4981cc0e40a6a5073) ) /* GAL16V8A */
ROM_LOAD( "136094-0011b.5r", 0x0000, 0x0117, CRC(832671eb) SHA1(85232128a4b03c4e3dffb4f2e6381a89f4f9aac5) ) /* GAL16V8A */
diff --git a/src/mame/drivers/atarisy1.c b/src/mame/drivers/atarisy1.c
index 93ead56fae3..24cfba3b8fd 100644
--- a/src/mame/drivers/atarisy1.c
+++ b/src/mame/drivers/atarisy1.c
@@ -433,7 +433,7 @@ static const via6522_interface via_interface =
/*inputs : A/B */ DEVCB_DRIVER_MEMBER(atarisy1_state,via_pa_r), DEVCB_DRIVER_MEMBER(atarisy1_state,via_pb_r),
/*inputs : CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
/*outputs: A/B */ DEVCB_DRIVER_MEMBER(atarisy1_state,via_pa_w), DEVCB_DRIVER_MEMBER(atarisy1_state,via_pb_w),
- /*outputs: CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
+ /*outputs: CA/B1,CA/B2 */ DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL,
/*irq */ DEVCB_NULL
};
@@ -460,7 +460,7 @@ WRITE8_MEMBER(atarisy1_state::led_w)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, atarisy1_state )
AM_RANGE(0x000000, 0x07ffff) AM_ROM
- AM_RANGE(0x080000, 0x087fff) AM_ROM /* slapstic maps here */
+ AM_RANGE(0x080000, 0x087fff) AM_ROM /* slapstic maps here */
AM_RANGE(0x2e0000, 0x2e0001) AM_READ_LEGACY(atarisy1_int3state_r)
AM_RANGE(0x400000, 0x401fff) AM_RAM
AM_RANGE(0x800000, 0x800001) AM_WRITE_LEGACY(atarisy1_xscroll_w) AM_SHARE("xscroll")
@@ -479,7 +479,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, atarisy1_state )
AM_RANGE(0xf20000, 0xf20007) AM_READ(trakball_r)
AM_RANGE(0xf40000, 0xf4001f) AM_READWRITE(joystick_r, joystick_w)
AM_RANGE(0xf60000, 0xf60003) AM_READ(port4_r)
- AM_RANGE(0xf80000, 0xf80001) AM_WRITE8(sound_w, 0x00ff) /* used by roadbls2 */
+ AM_RANGE(0xf80000, 0xf80001) AM_WRITE8(sound_w, 0x00ff) /* used by roadbls2 */
AM_RANGE(0xfc0000, 0xfc0001) AM_READ8(sound_r, 0x00ff)
AM_RANGE(0xfe0000, 0xfe0001) AM_WRITE8(sound_w, 0x00ff)
ADDRESS_MAP_END
@@ -513,18 +513,18 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( marble )
PORT_START("IN0") /* F20000 */
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE PORT_PLAYER(1)
PORT_START("IN1") /* F20002 */
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
PORT_START("IN2") /* F20004 */
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE PORT_PLAYER(2)
PORT_START("IN3") /* F20006 */
- PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(2)
- PORT_START("F60000") /* F60000 */
+ PORT_START("F60000") /* F60000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -535,7 +535,7 @@ static INPUT_PORTS_START( marble )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("1820") /* 1820 (sound) */
+ PORT_START("1820") /* 1820 (sound) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -547,23 +547,23 @@ INPUT_PORTS_END
static INPUT_PORTS_START( peterpak )
- PORT_START("IN0") /* F40000 */
+ PORT_START("IN0") /* F40000 */
PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
- PORT_START("IN1") /* n/a */
+ PORT_START("IN1") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("IN2") /* n/a */
+ PORT_START("IN2") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("IN3") /* n/a */
+ PORT_START("IN3") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("F60000") /* F60000 */
+ PORT_START("F60000") /* F60000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Throw/P1 Start")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Right Throw/P2 Start")
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Jump")
@@ -574,7 +574,7 @@ static INPUT_PORTS_START( peterpak )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("1820") /* 1820 (sound) */
+ PORT_START("1820") /* 1820 (sound) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -586,26 +586,26 @@ INPUT_PORTS_END
static INPUT_PORTS_START( indytemp )
- PORT_START("IN0") /* F40000 */
+ PORT_START("IN0") /* F40000 */
PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT )
- PORT_START("IN1") /* n/a */
+ PORT_START("IN1") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("IN2") /* n/a */
+ PORT_START("IN2") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("IN3") /* n/a */
+ PORT_START("IN3") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("F60000") /* F60000 */
+ PORT_START("F60000") /* F60000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Whip/P1 Start")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Right Whip/P2 Start")
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* freeze? */
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* freeze? */
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -613,7 +613,7 @@ static INPUT_PORTS_START( indytemp )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("1820") /* 1820 (sound) */
+ PORT_START("1820") /* 1820 (sound) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -627,7 +627,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( indytemc )
PORT_INCLUDE( indytemp )
- PORT_MODIFY("IN0") /* F40000 */
+ PORT_MODIFY("IN0") /* F40000 */
PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
@@ -637,19 +637,19 @@ INPUT_PORTS_END
static INPUT_PORTS_START( roadrunn )
- PORT_START("IN0") /* F40000 */
+ PORT_START("IN0") /* F40000 */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
- PORT_START("IN1") /* F40002 */
+ PORT_START("IN1") /* F40002 */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(1)
- PORT_START("IN2") /* n/a */
+ PORT_START("IN2") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN3") /* n/a */
+ PORT_START("IN3") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("F60000") /* F60000 */
+ PORT_START("F60000") /* F60000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left Hop/P1 Start")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Right Hop/P2 Start")
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Unused Button 1")
@@ -660,7 +660,7 @@ static INPUT_PORTS_START( roadrunn )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("1820") /* 1820 (sound) */
+ PORT_START("1820") /* 1820 (sound) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -672,19 +672,19 @@ INPUT_PORTS_END
static INPUT_PORTS_START( roadblst )
- PORT_START("IN0") /* F20000 */
+ PORT_START("IN0") /* F20000 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_REVERSE
- PORT_START("IN1") /* F40000 */
+ PORT_START("IN1") /* F40000 */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(64)
- PORT_START("IN2") /* n/a */
+ PORT_START("IN2") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("IN3") /* n/a */
+ PORT_START("IN3") /* n/a */
PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("F60000") /* F60000 */
+ PORT_START("F60000") /* F60000 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Special Weapon")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Lasers")
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -695,7 +695,7 @@ static INPUT_PORTS_START( roadblst )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("1820") /* 1820 (sound) */
+ PORT_START("1820") /* 1820 (sound) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -814,7 +814,7 @@ MACHINE_CONFIG_END
#define ROM_LOAD_BIOS(bios,name,offset,length,hash) \
ROMX_LOAD(name, offset, length, hash, ROM_BIOS(bios+1)) /* Note '+1' */
-#define MOTHERBOARD_BIOS \
+#define MOTHERBOARD_BIOS \
ROM_SYSTEM_BIOS( 0, "ttl", "TTL Motherboard (Rev 2)" ) \
ROM_LOAD16_BYTE_BIOS(0, "136032.205.l13", 0x00000, 0x04000, CRC(88d0be26) SHA1(d124045eccc562ff0423b23a240e27ad740fa0c9) ) \
ROM_LOAD16_BYTE_BIOS(0, "136032.206.l12", 0x00001, 0x04000, CRC(3c79ef05) SHA1(20fdca7131478e1ee12691bdafd2d5bb74cbd16f) ) \
@@ -825,7 +825,7 @@ MACHINE_CONFIG_END
ROM_LOAD16_BYTE_BIOS(2, "136032.114.j11", 0x00000, 0x04000, CRC(195c54ad) SHA1(d7cda3cd3db4c6f77074ca05e96ae11b62e048b7) ) \
ROM_LOAD16_BYTE_BIOS(2, "136032.115.j10", 0x00001, 0x04000, CRC(7275b4dc) SHA1(0896ab37ea832a1335046353612c1b4c86d8d040) )
-#define MOTHERBOARD_ALPHA \
+#define MOTHERBOARD_ALPHA \
ROM_LOAD_BIOS(0, "136032.104.f5", 0x00000, 0x02000, CRC(7a29dc07) SHA1(72ba464da01bd6d3a91b8d9997d5ac14b6f47aad) ) \
ROM_LOAD_BIOS(1, "136032.104.f5", 0x00000, 0x02000, CRC(7a29dc07) SHA1(72ba464da01bd6d3a91b8d9997d5ac14b6f47aad) ) \
ROM_LOAD_BIOS(2, "136032.107.b2", 0x00000, 0x02000, CRC(315e4bea) SHA1(a00ea23fbdbf075f8f3f184275be83387e8ac82b) )
@@ -839,20 +839,20 @@ MACHINE_CONFIG_END
ROM_LOAD_BIOS(1, "136032.103.f7", 0x00000, 0x00001, NO_DUMP ) /* N82S153 */
ROM_START( atarisy1 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
- ROM_REGION( 0x10000, "audiocpu", ROMREGION_ERASE00 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", ROMREGION_ERASE00 ) /* 64k for 6502 code */
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x100000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by the TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by the TTL version.) */
+ MOTHERBOARD_PROMS
- ROM_REGION( 0x400, "proms", ROMREGION_ERASE00 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", ROMREGION_ERASE00 ) /* graphics mapping PROMs */
ROM_END
@@ -867,8 +867,8 @@ ROM_END
*/
ROM_START( marble )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136033.623", 0x10000, 0x04000, CRC(284ed2e9) SHA1(a24d2fd587dffcc8536ef28fcbcf5c964a6b67a9) )
ROM_LOAD16_BYTE( "136033.624", 0x10001, 0x04000, CRC(d541b021) SHA1(978b1565da746f7389eaf7646604990fb28d47ed) )
ROM_LOAD16_BYTE( "136033.625", 0x18000, 0x04000, CRC(563755c7) SHA1(a444b72ff4cdecee3b9dd7e636d658c31ecc186c) )
@@ -880,12 +880,12 @@ ROM_START( marble )
ROM_LOAD16_BYTE( "136033.107", 0x80000, 0x04000, CRC(f3b8745b) SHA1(4754eac5e6d8547b3ee00f3f48eaa560eb403862) )
ROM_LOAD16_BYTE( "136033.108", 0x80001, 0x04000, CRC(e51eecaa) SHA1(37d51a9e9cb33d1156d02a312ac8e202a18d7c20) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136033.421", 0x8000, 0x4000, CRC(78153dc3) SHA1(d4e68226b87df8834dc3d6daa9d683f17896c32e) )
ROM_LOAD( "136033.422", 0xc000, 0x4000, CRC(2e66300e) SHA1(49acb9443c5d2c1016cde7f489deab2575dd82ca) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x100000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136033.137", 0x00000, 0x04000, CRC(7a45f5c1) SHA1(b826a178660ff2e278558e4779586737751dca5e) ) /* bank 1, plane 0 */
@@ -903,18 +903,18 @@ ROM_START( marble )
ROM_LOAD( "136033.151", 0x94000, 0x04000, CRC(84ee1c80) SHA1(5192c0a2887f46b616d130bdbfffbbd5e394e9a3) ) /* bank 2, plane 1 */
ROM_LOAD( "136033.153", 0xa4000, 0x04000, CRC(daa02926) SHA1(33c7a38c66fb4d67a6ee88ef2da2bba091439e0c) ) /* bank 2, plane 2 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136033.118", 0x000, 0x200, CRC(2101b0ed) SHA1(e4fb8dfa80ed78847c697f9de2bd8540b0c04889) ) /* remap */
ROM_LOAD( "136033.119", 0x200, 0x200, CRC(19f6e767) SHA1(041f24cc03c9043c31c3294c9565dfda9bdada74) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( marble2 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136033.401", 0x10000, 0x08000, CRC(ecfc25a2) SHA1(45d98bea8d6bed5ecdcde1049c3a3f6e0fa6ee4c) )
ROM_LOAD16_BYTE( "136033.402", 0x10001, 0x08000, CRC(7ce9bf53) SHA1(0a5761d4856cd055e8a58b36276945e06c01d08d) )
ROM_LOAD16_BYTE( "136033.403", 0x20000, 0x08000, CRC(dafee7a2) SHA1(6e4aa9721b5fd4385422c146a84a5e271124abcb) )
@@ -922,12 +922,12 @@ ROM_START( marble2 )
ROM_LOAD16_BYTE( "136033.107", 0x80000, 0x04000, CRC(f3b8745b) SHA1(4754eac5e6d8547b3ee00f3f48eaa560eb403862) )
ROM_LOAD16_BYTE( "136033.108", 0x80001, 0x04000, CRC(e51eecaa) SHA1(37d51a9e9cb33d1156d02a312ac8e202a18d7c20) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136033.421", 0x8000, 0x4000, CRC(78153dc3) SHA1(d4e68226b87df8834dc3d6daa9d683f17896c32e) )
ROM_LOAD( "136033.422", 0xc000, 0x4000, CRC(2e66300e) SHA1(49acb9443c5d2c1016cde7f489deab2575dd82ca) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x100000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136033.137", 0x00000, 0x04000, CRC(7a45f5c1) SHA1(b826a178660ff2e278558e4779586737751dca5e) ) /* bank 1, plane 0 */
@@ -945,18 +945,18 @@ ROM_START( marble2 )
ROM_LOAD( "136033.151", 0x94000, 0x04000, CRC(84ee1c80) SHA1(5192c0a2887f46b616d130bdbfffbbd5e394e9a3) ) /* bank 2, plane 1 */
ROM_LOAD( "136033.153", 0xa4000, 0x04000, CRC(daa02926) SHA1(33c7a38c66fb4d67a6ee88ef2da2bba091439e0c) ) /* bank 2, plane 2 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136033.118", 0x000, 0x200, CRC(2101b0ed) SHA1(e4fb8dfa80ed78847c697f9de2bd8540b0c04889) ) /* remap */
ROM_LOAD( "136033.119", 0x200, 0x200, CRC(19f6e767) SHA1(041f24cc03c9043c31c3294c9565dfda9bdada74) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( marble3 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136033.201", 0x10000, 0x08000, CRC(9395804d) SHA1(7cca2cc85a9678199c7a60c0976f3e0362f8538f) )
ROM_LOAD16_BYTE( "136033.202", 0x10001, 0x08000, CRC(edd313f5) SHA1(f3ec6f5812287e187026446fe286f257b54c426e) )
ROM_LOAD16_BYTE( "136033.403", 0x20000, 0x08000, CRC(dafee7a2) SHA1(6e4aa9721b5fd4385422c146a84a5e271124abcb) )
@@ -964,12 +964,12 @@ ROM_START( marble3 )
ROM_LOAD16_BYTE( "136033.107", 0x80000, 0x04000, CRC(f3b8745b) SHA1(4754eac5e6d8547b3ee00f3f48eaa560eb403862) )
ROM_LOAD16_BYTE( "136033.108", 0x80001, 0x04000, CRC(e51eecaa) SHA1(37d51a9e9cb33d1156d02a312ac8e202a18d7c20) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136033.121", 0x8000, 0x4000, CRC(73fe2b46) SHA1(09fceb60c831972f544c92a84c6d0cbc2481b9f5) )
ROM_LOAD( "136033.122", 0xc000, 0x4000, CRC(03bf65c3) SHA1(4f4a4e4b5bd202da2d18c062f585a842082f08db) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x100000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136033.137", 0x00000, 0x04000, CRC(7a45f5c1) SHA1(b826a178660ff2e278558e4779586737751dca5e) ) /* bank 1, plane 0 */
@@ -987,18 +987,18 @@ ROM_START( marble3 )
ROM_LOAD( "136033.151", 0x94000, 0x04000, CRC(84ee1c80) SHA1(5192c0a2887f46b616d130bdbfffbbd5e394e9a3) ) /* bank 2, plane 1 */
ROM_LOAD( "136033.153", 0xa4000, 0x04000, CRC(daa02926) SHA1(33c7a38c66fb4d67a6ee88ef2da2bba091439e0c) ) /* bank 2, plane 2 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136033.118", 0x000, 0x200, CRC(2101b0ed) SHA1(e4fb8dfa80ed78847c697f9de2bd8540b0c04889) ) /* remap */
ROM_LOAD( "136033.119", 0x200, 0x200, CRC(19f6e767) SHA1(041f24cc03c9043c31c3294c9565dfda9bdada74) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( marble4 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136033.323", 0x10000, 0x04000, CRC(4dc2987a) SHA1(abe155f773dfa623aee6c3952941426adb4c8c9c) )
ROM_LOAD16_BYTE( "136033.324", 0x10001, 0x04000, CRC(e22e6e11) SHA1(aedb18f25aad846b82690c70b917e97cdcfbd09e) )
ROM_LOAD16_BYTE( "136033.225", 0x18000, 0x04000, CRC(743f6c5c) SHA1(b69b7dc9923f514b8de207895bbe0c2038dc519d) )
@@ -1010,12 +1010,12 @@ ROM_START( marble4 )
ROM_LOAD16_BYTE( "136033.107", 0x80000, 0x04000, CRC(f3b8745b) SHA1(4754eac5e6d8547b3ee00f3f48eaa560eb403862) )
ROM_LOAD16_BYTE( "136033.108", 0x80001, 0x04000, CRC(e51eecaa) SHA1(37d51a9e9cb33d1156d02a312ac8e202a18d7c20) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136033.257", 0x8000, 0x4000, CRC(2e2e0df8) SHA1(e76f7297a3e78ebbc00e3a4c468149f9f7124b16) )
ROM_LOAD( "136033.258", 0xc000, 0x4000, CRC(1b9655cd) SHA1(deb8728ee9620718e449f1e55a6fe115256c00c9) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x100000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136033.137", 0x00000, 0x04000, CRC(7a45f5c1) SHA1(b826a178660ff2e278558e4779586737751dca5e) ) /* bank 1, plane 0 */
@@ -1033,18 +1033,18 @@ ROM_START( marble4 )
ROM_LOAD( "136033.151", 0x94000, 0x04000, CRC(84ee1c80) SHA1(5192c0a2887f46b616d130bdbfffbbd5e394e9a3) ) /* bank 2, plane 1 */
ROM_LOAD( "136033.153", 0xa4000, 0x04000, CRC(daa02926) SHA1(33c7a38c66fb4d67a6ee88ef2da2bba091439e0c) ) /* bank 2, plane 2 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136033.118", 0x000, 0x200, CRC(2101b0ed) SHA1(e4fb8dfa80ed78847c697f9de2bd8540b0c04889) ) /* remap */
ROM_LOAD( "136033.119", 0x200, 0x200, CRC(19f6e767) SHA1(041f24cc03c9043c31c3294c9565dfda9bdada74) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( marble5 ) /* LSI Cartridge */
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136033.201", 0x10000, 0x08000, CRC(9395804d) SHA1(7cca2cc85a9678199c7a60c0976f3e0362f8538f) ) /* Located at B10 */
ROM_LOAD16_BYTE( "136033.202", 0x10001, 0x08000, CRC(edd313f5) SHA1(f3ec6f5812287e187026446fe286f257b54c426e) ) /* Located at A10 */
ROM_LOAD16_BYTE( "136033.203", 0x20000, 0x08000, CRC(dafee7a2) SHA1(6e4aa9721b5fd4385422c146a84a5e271124abcb) ) /* Located at B12 */
@@ -1052,7 +1052,7 @@ ROM_START( marble5 ) /* LSI Cartridge */
ROM_LOAD16_BYTE( "136033.107", 0x80000, 0x04000, CRC(f3b8745b) SHA1(4754eac5e6d8547b3ee00f3f48eaa560eb403862) ) /* Located at B16 */
ROM_LOAD16_BYTE( "136033.108", 0x80001, 0x04000, CRC(e51eecaa) SHA1(37d51a9e9cb33d1156d02a312ac8e202a18d7c20) ) /* Located at A16 */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136033.121", 0x08000, 0x04000, CRC(73fe2b46) SHA1(09fceb60c831972f544c92a84c6d0cbc2481b9f5) ) /* Located at D14 */
ROM_LOAD( "136033.122", 0x0c000, 0x04000, CRC(03bf65c3) SHA1(4f4a4e4b5bd202da2d18c062f585a842082f08db) ) /* Located at D16 */
@@ -1064,17 +1064,17 @@ ROM_START( marble5 ) /* LSI Cartridge */
ROM_LOAD( "136033.110", 0x10000, 0x08000, CRC(b883ec76) SHA1(ec048e19395fd617f2cd0d3edea728799bdca037) ) /* bank 1, plane 1 - located at B6 */
ROM_LOAD( "136033.111", 0x20000, 0x08000, CRC(c208bd5e) SHA1(e75f7d33c66b58e3c72a83d0dc7a6427a57d0de9) ) /* bank 1, plane 2 - located at C1 */
ROM_LOAD( "136033.112", 0x30000, 0x08000, CRC(042673d4) SHA1(499c1edf82834d5ff6144ee4349b2349db7a57c2) ) /* bank 1, plane 3 - located at C6 */
- ROM_LOAD( "136033.113", 0x40000, 0x08000, CRC(b390aef3) SHA1(2cd58071d1c09058af7876c35484c3b571774a06) ) /* bank 1, plane 4 - located at D1 */
+ ROM_LOAD( "136033.113", 0x40000, 0x08000, CRC(b390aef3) SHA1(2cd58071d1c09058af7876c35484c3b571774a06) ) /* bank 1, plane 4 - located at D1 */
ROM_LOAD( "136033.115", 0x84000, 0x04000, CRC(b6658f06) SHA1(e719d956f4f9d703a12e2c5520cac0a2f47ea058) ) /* bank 2, plane 0 - located at B2 */
ROM_LOAD( "136033.116", 0x94000, 0x04000, CRC(84ee1c80) SHA1(5192c0a2887f46b616d130bdbfffbbd5e394e9a3) ) /* bank 2, plane 1 - located at B7 */
ROM_LOAD( "136033.117", 0xa4000, 0x04000, CRC(daa02926) SHA1(33c7a38c66fb4d67a6ee88ef2da2bba091439e0c) ) /* bank 2, plane 2 - located at C7 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136033.118", 0x00000, 0x00200, CRC(2101b0ed) SHA1(e4fb8dfa80ed78847c697f9de2bd8540b0c04889) ) /* remap, located at A7 */
ROM_LOAD( "136033.159", 0x00200, 0x00200, CRC(19f6e767) SHA1(041f24cc03c9043c31c3294c9565dfda9bdada74) ) /* color, located at A5 */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
@@ -1083,8 +1083,8 @@ ROM_END
*/
ROM_START( peterpak )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136028.142", 0x10000, 0x04000, CRC(4f9fc020) SHA1(7e0d5660ea395ded7e0e4c9122bc41f9bb9a483d) )
ROM_LOAD16_BYTE( "136028.143", 0x10001, 0x04000, CRC(9fb257cc) SHA1(5590fc2b4e79a071ae5ba04e23aadb3e35614a73) )
ROM_LOAD16_BYTE( "136028.144", 0x18000, 0x04000, CRC(50267619) SHA1(7aec7e4c8b97313d18c8eb55e078157776e29842) )
@@ -1094,12 +1094,12 @@ ROM_START( peterpak )
ROM_LOAD16_BYTE( "136028.148", 0x80000, 0x04000, CRC(230e8ba9) SHA1(decda85f3de92ab72bb2a3812a84a92c937a7409) )
ROM_LOAD16_BYTE( "136028.149", 0x80001, 0x04000, CRC(0ff0c13a) SHA1(d1912d8e468ca04a930aedaece824f020d8e0357) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136028.101", 0x8000, 0x4000, CRC(ff712aa2) SHA1(07beeb51f41d406782965dddb6fe73fdc49529df) )
ROM_LOAD( "136028.102", 0xc000, 0x4000, CRC(89ea21a1) SHA1(a7cb6eceb45d54406d6fc692f50a4e34564d6170) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x180000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136028.138", 0x000000, 0x08000, CRC(53eaa018) SHA1(3f9887d4996e6a7c894732e9c9ebe4408fb60192) ) /* bank 1, plane 0 */
@@ -1117,12 +1117,12 @@ ROM_START( peterpak )
ROM_LOAD( "136028.111", 0x124000, 0x04000, CRC(246599f3) SHA1(7902941ce29a784875c17a8eadb50288f1497604) ) /* bank 3, plane 2 */
ROM_LOAD( "136028.114", 0x134000, 0x04000, CRC(918a5082) SHA1(0a9b83e0c9f6883bdca1b84805f8642fc660d09d) ) /* bank 3, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136028.136", 0x000, 0x200, CRC(861cfa36) SHA1(d18ca5e28bf48df6506be6bc0283c996c6520ef4) ) /* remap */
ROM_LOAD( "136028.137", 0x200, 0x200, CRC(8507e5ea) SHA1(a009a98fe02625a20f4a9d9ab1c70891bf4e45ec) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
@@ -1131,8 +1131,8 @@ ROM_END
*/
ROM_START( indytemp )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136036.432", 0x10000, 0x08000, CRC(d888cdf1) SHA1(c9cbc0d429755611b3749e018d3817d4d7042425) )
ROM_LOAD16_BYTE( "136036.431", 0x10001, 0x08000, CRC(b7ac7431) SHA1(b062258746ca5f9c3f9cf8a6186eb3c370ac3a77) )
ROM_LOAD16_BYTE( "136036.434", 0x20000, 0x08000, CRC(802495fd) SHA1(228f48ef067a758fe0d3bfe0508765a52bb579eb) )
@@ -1142,13 +1142,13 @@ ROM_START( indytemp )
ROM_LOAD16_BYTE( "136036.358", 0x80000, 0x04000, CRC(d9351106) SHA1(6a11cef7f93701d5bc08e0ce413999322a011d69) )
ROM_LOAD16_BYTE( "136036.359", 0x80001, 0x04000, CRC(e731caea) SHA1(71c1445804b5696078a49855852420e4046d77bb) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136036.153", 0x4000, 0x4000, CRC(95294641) SHA1(00f90a0d49d2c77d5288080036f81a74ad31f8bc) )
ROM_LOAD( "136036.154", 0x8000, 0x4000, CRC(cbfc6adb) SHA1(ee132eced924435f1214e2997533e866a3e5364b) )
ROM_LOAD( "136036.155", 0xc000, 0x4000, CRC(4c8233ac) SHA1(3d2bdb71b8f499a21f0b0e1686be7fe6f23efede) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x200000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136036.135", 0x000000, 0x08000, CRC(ffa8749c) SHA1(b0bec9b8364a15606d9f4d11f674dea2ec25279f) ) /* bank 1, plane 0 */
@@ -1171,18 +1171,18 @@ ROM_START( indytemp )
ROM_LOAD( "136036.146", 0x1a0000, 0x08000, CRC(8ae5a7b5) SHA1(97ddf916c41d6ddd23501e27611a83c912ec9ad2) ) /* bank 4, plane 2 */
ROM_LOAD( "136036.150", 0x1b0000, 0x08000, CRC(a10c4bd9) SHA1(3177f22aff9e18c0f003f3fd1fa4b258308eee07) ) /* bank 4, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136036.152", 0x000, 0x200, CRC(4f96e57c) SHA1(271633a0aacd1d1efe2917728b73e90010c64d2c) ) /* remap */
ROM_LOAD( "136036.151", 0x200, 0x200, CRC(7daf351f) SHA1(95c13d81a47440f847af7b19632cc032380b9ff4) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( indytemp2 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136036.470", 0x10000, 0x08000, CRC(7fac1dd8) SHA1(043daf709209e76115899a1e301f8fb262b3a749) )
ROM_LOAD16_BYTE( "136036.471", 0x10001, 0x08000, CRC(e93272fb) SHA1(bb5741419a9d1a54ae16bfd6d2fcf64627e8a5c3) )
ROM_LOAD16_BYTE( "136036.434", 0x20000, 0x08000, CRC(802495fd) SHA1(228f48ef067a758fe0d3bfe0508765a52bb579eb) )
@@ -1192,13 +1192,13 @@ ROM_START( indytemp2 )
ROM_LOAD16_BYTE( "136036.358", 0x80000, 0x04000, CRC(d9351106) SHA1(6a11cef7f93701d5bc08e0ce413999322a011d69) )
ROM_LOAD16_BYTE( "136036.359", 0x80001, 0x04000, CRC(e731caea) SHA1(71c1445804b5696078a49855852420e4046d77bb) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136036.153", 0x4000, 0x4000, CRC(95294641) SHA1(00f90a0d49d2c77d5288080036f81a74ad31f8bc) )
ROM_LOAD( "136036.154", 0x8000, 0x4000, CRC(cbfc6adb) SHA1(ee132eced924435f1214e2997533e866a3e5364b) )
ROM_LOAD( "136036.155", 0xc000, 0x4000, CRC(4c8233ac) SHA1(3d2bdb71b8f499a21f0b0e1686be7fe6f23efede) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x200000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136036.135", 0x000000, 0x08000, CRC(ffa8749c) SHA1(b0bec9b8364a15606d9f4d11f674dea2ec25279f) ) /* bank 1, plane 0 */
@@ -1221,18 +1221,18 @@ ROM_START( indytemp2 )
ROM_LOAD( "136036.146", 0x1a0000, 0x08000, CRC(8ae5a7b5) SHA1(97ddf916c41d6ddd23501e27611a83c912ec9ad2) ) /* bank 4, plane 2 */
ROM_LOAD( "136036.150", 0x1b0000, 0x08000, CRC(a10c4bd9) SHA1(3177f22aff9e18c0f003f3fd1fa4b258308eee07) ) /* bank 4, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136036.152", 0x000, 0x200, CRC(4f96e57c) SHA1(271633a0aacd1d1efe2917728b73e90010c64d2c) ) /* remap */
ROM_LOAD( "136036.151", 0x200, 0x200, CRC(7daf351f) SHA1(95c13d81a47440f847af7b19632cc032380b9ff4) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( indytemp3 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "232.10b", 0x10000, 0x08000, CRC(1e80108f) SHA1(663ef81b865c4d13fd73eca4f82ee64a4bdeaad5) )
ROM_LOAD16_BYTE( "231.10a", 0x10001, 0x08000, CRC(8ae54c0c) SHA1(c7ab4a2e2af8f2336baa8c7b2a80af7c9bfd0435) )
ROM_LOAD16_BYTE( "234.12b", 0x20000, 0x08000, CRC(86be7e07) SHA1(b6b0d9c6d81d446dab675c71d60f792f6a657c5b) )
@@ -1242,13 +1242,13 @@ ROM_START( indytemp3 )
ROM_LOAD16_BYTE( "158.16b", 0x80000, 0x04000, CRC(10372888) SHA1(438a990dc7599325f203d57ffb0a94ae36a00cc7) )
ROM_LOAD16_BYTE( "159.16a", 0x80001, 0x04000, CRC(50f890a8) SHA1(7dfdc4512de8fb0039b426e3b5be50e0095f39f7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136036.153", 0x4000, 0x4000, CRC(95294641) SHA1(00f90a0d49d2c77d5288080036f81a74ad31f8bc) )
ROM_LOAD( "136036.154", 0x8000, 0x4000, CRC(cbfc6adb) SHA1(ee132eced924435f1214e2997533e866a3e5364b) )
ROM_LOAD( "136036.155", 0xc000, 0x4000, CRC(4c8233ac) SHA1(3d2bdb71b8f499a21f0b0e1686be7fe6f23efede) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x200000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136036.135", 0x000000, 0x08000, CRC(ffa8749c) SHA1(b0bec9b8364a15606d9f4d11f674dea2ec25279f) ) /* bank 1, plane 0 */
@@ -1271,18 +1271,18 @@ ROM_START( indytemp3 )
ROM_LOAD( "136036.146", 0x1a0000, 0x08000, CRC(8ae5a7b5) SHA1(97ddf916c41d6ddd23501e27611a83c912ec9ad2) ) /* bank 4, plane 2 */
ROM_LOAD( "136036.150", 0x1b0000, 0x08000, CRC(a10c4bd9) SHA1(3177f22aff9e18c0f003f3fd1fa4b258308eee07) ) /* bank 4, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136036.152", 0x000, 0x200, CRC(4f96e57c) SHA1(271633a0aacd1d1efe2917728b73e90010c64d2c) ) /* remap */
ROM_LOAD( "136036.151", 0x200, 0x200, CRC(7daf351f) SHA1(95c13d81a47440f847af7b19632cc032380b9ff4) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( indytemp4 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136036.332", 0x10000, 0x08000, CRC(a5563773) SHA1(52701b53e62aae691f7b9483f5e843d805223a0a) )
ROM_LOAD16_BYTE( "136036.331", 0x10001, 0x08000, CRC(7d562141) SHA1(a2143ed473e40a5a46679e7751fc37475768885f) )
ROM_LOAD16_BYTE( "136036.334", 0x20000, 0x08000, CRC(e40828e5) SHA1(a5c50693bddcc394711859bdc36d9ff93d02b82e) )
@@ -1292,13 +1292,13 @@ ROM_START( indytemp4 )
ROM_LOAD16_BYTE( "136036.358", 0x80000, 0x04000, CRC(d9351106) SHA1(6a11cef7f93701d5bc08e0ce413999322a011d69) )
ROM_LOAD16_BYTE( "136036.359", 0x80001, 0x04000, CRC(e731caea) SHA1(71c1445804b5696078a49855852420e4046d77bb) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136036.153", 0x4000, 0x4000, CRC(95294641) SHA1(00f90a0d49d2c77d5288080036f81a74ad31f8bc) )
ROM_LOAD( "136036.154", 0x8000, 0x4000, CRC(cbfc6adb) SHA1(ee132eced924435f1214e2997533e866a3e5364b) )
ROM_LOAD( "136036.155", 0xc000, 0x4000, CRC(4c8233ac) SHA1(3d2bdb71b8f499a21f0b0e1686be7fe6f23efede) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x200000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136036.135", 0x000000, 0x08000, CRC(ffa8749c) SHA1(b0bec9b8364a15606d9f4d11f674dea2ec25279f) ) /* bank 1, plane 0 */
@@ -1321,17 +1321,17 @@ ROM_START( indytemp4 )
ROM_LOAD( "136036.146", 0x1a0000, 0x08000, CRC(8ae5a7b5) SHA1(97ddf916c41d6ddd23501e27611a83c912ec9ad2) ) /* bank 4, plane 2 */
ROM_LOAD( "136036.150", 0x1b0000, 0x08000, CRC(a10c4bd9) SHA1(3177f22aff9e18c0f003f3fd1fa4b258308eee07) ) /* bank 4, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136036.152", 0x000, 0x200, CRC(4f96e57c) SHA1(271633a0aacd1d1efe2917728b73e90010c64d2c) ) /* remap */
ROM_LOAD( "136036.151", 0x200, 0x200, CRC(7daf351f) SHA1(95c13d81a47440f847af7b19632cc032380b9ff4) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( indytempc ) /* Dedicated boardset marked 'ATARI SYSTEM I LSI CARTRIDGE COCKTAIL A043310' */
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
ROM_LOAD16_BYTE( "136032.116", 0x00000, 0x04000, CRC(195c54ad) SHA1(d7cda3cd3db4c6f77074ca05e96ae11b62e048b7) )
ROM_LOAD16_BYTE( "136032.117", 0x00001, 0x04000, CRC(9af9fe29) SHA1(1d5077662e4111ece9f8a5124394dad8b1abdc13) )
ROM_LOAD16_BYTE( "136032.632", 0x10000, 0x08000, CRC(d3e1a611) SHA1(edbced6dd64ca44a59aff6a4acca0b3ddb233810) )
@@ -1343,7 +1343,7 @@ ROM_START( indytempc ) /* Dedicated boardset marked 'ATARI SYSTEM I LSI CARTRIDG
ROM_LOAD16_BYTE( "136036.358", 0x80000, 0x04000, CRC(d9351106) SHA1(6a11cef7f93701d5bc08e0ce413999322a011d69) )
ROM_LOAD16_BYTE( "136036.359", 0x80001, 0x04000, CRC(e731caea) SHA1(71c1445804b5696078a49855852420e4046d77bb) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136036.153", 0x4000, 0x4000, CRC(95294641) SHA1(00f90a0d49d2c77d5288080036f81a74ad31f8bc) )
ROM_LOAD( "136036.170", 0x8000, 0x8000, CRC(f318b321) SHA1(8fe9e88fa9f2104526f89926a7119b866051e4ef) )
@@ -1371,15 +1371,15 @@ ROM_START( indytempc ) /* Dedicated boardset marked 'ATARI SYSTEM I LSI CARTRIDG
ROM_LOAD( "136036.146", 0x1a0000, 0x08000, CRC(8ae5a7b5) SHA1(97ddf916c41d6ddd23501e27611a83c912ec9ad2) ) /* bank 4, plane 2 */
ROM_LOAD( "136036.150", 0x1b0000, 0x08000, CRC(a10c4bd9) SHA1(3177f22aff9e18c0f003f3fd1fa4b258308eee07) ) /* bank 4, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136036.152", 0x000, 0x200, CRC(4f96e57c) SHA1(271633a0aacd1d1efe2917728b73e90010c64d2c) ) /* remap */
ROM_LOAD( "136036.160", 0x200, 0x200, CRC(88c65843) SHA1(81fef378b3dbf4d7228beb7427e2f75cae371808) ) /* color */
ROM_END
ROM_START( indytempd )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136036.462", 0x10000, 0x08000, CRC(317dc430) SHA1(563f09fb1b096bd40e1a73acb7f11d3809f9f19f) )
ROM_LOAD16_BYTE( "136036.461", 0x10001, 0x08000, CRC(8c73f974) SHA1(023b55f1d54606f5c51b86b802d417099d775f14) )
ROM_LOAD16_BYTE( "136036.464", 0x20000, 0x08000, CRC(3fcb199f) SHA1(11a8a17bf0100b5f16e9148669b2ec5bf81b3d62) )
@@ -1389,13 +1389,13 @@ ROM_START( indytempd )
ROM_LOAD16_BYTE( "136036.358", 0x80000, 0x04000, CRC(d9351106) SHA1(6a11cef7f93701d5bc08e0ce413999322a011d69) )
ROM_LOAD16_BYTE( "136036.359", 0x80001, 0x04000, CRC(e731caea) SHA1(71c1445804b5696078a49855852420e4046d77bb) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136036.153", 0x4000, 0x4000, CRC(95294641) SHA1(00f90a0d49d2c77d5288080036f81a74ad31f8bc) )
ROM_LOAD( "136036.154", 0x8000, 0x4000, CRC(cbfc6adb) SHA1(ee132eced924435f1214e2997533e866a3e5364b) )
ROM_LOAD( "136036.155", 0xc000, 0x4000, CRC(4c8233ac) SHA1(3d2bdb71b8f499a21f0b0e1686be7fe6f23efede) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x200000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136036.135", 0x000000, 0x08000, CRC(ffa8749c) SHA1(b0bec9b8364a15606d9f4d11f674dea2ec25279f) ) /* bank 1, plane 0 */
@@ -1418,12 +1418,12 @@ ROM_START( indytempd )
ROM_LOAD( "136036.146", 0x1a0000, 0x08000, CRC(8ae5a7b5) SHA1(97ddf916c41d6ddd23501e27611a83c912ec9ad2) ) /* bank 4, plane 2 */
ROM_LOAD( "136036.150", 0x1b0000, 0x08000, CRC(a10c4bd9) SHA1(3177f22aff9e18c0f003f3fd1fa4b258308eee07) ) /* bank 4, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136036.152", 0x000, 0x200, CRC(4f96e57c) SHA1(271633a0aacd1d1efe2917728b73e90010c64d2c) ) /* remap */
ROM_LOAD( "136036.151", 0x200, 0x200, CRC(7daf351f) SHA1(95c13d81a47440f847af7b19632cc032380b9ff4) ) /* color */
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
@@ -1432,8 +1432,8 @@ ROM_END
*/
ROM_START( roadrunn )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136040-228.11c", 0x010000, 0x008000, CRC(b66c629a) SHA1(94dc13f2f151a4109ee50016bcc1392aef0d5a22) )
ROM_LOAD16_BYTE( "136040-229.11a", 0x010001, 0x008000, CRC(5638959f) SHA1(486bd13ba151558b72bf29de9ecc14944e56435c) )
ROM_LOAD16_BYTE( "136040-230.13c", 0x020000, 0x008000, CRC(cd7956a3) SHA1(d72aa90b74a77e5fa49cb34515383c8ab054d654) )
@@ -1447,12 +1447,12 @@ ROM_START( roadrunn )
ROM_LOAD16_BYTE( "136040-140.17c", 0x080000, 0x004000, CRC(d1464c88) SHA1(0d600119a9137f4c7cad7f708e0c885da96af207) )
ROM_LOAD16_BYTE( "136040-141.17a", 0x080001, 0x004000, CRC(f8f2acdf) SHA1(b9e31c1f96fab5368fb90768e059157f74cbc762) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136040-143.15e", 0x008000, 0x004000, CRC(62b9878e) SHA1(db6072a7c8600d85fb70dac3d940a200d0cb5d0a) )
ROM_LOAD( "136040-144.17e", 0x00c000, 0x004000, CRC(6ef1b804) SHA1(176066c6946090c87945213145960754cd315acb) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x300000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136040-101.4b", 0x000000, 0x008000, CRC(26d9f29c) SHA1(e03a03484ede4ea209040faf64e88f0667a0ab40) ) /* bank 1, plane 0 */
@@ -1485,18 +1485,18 @@ ROM_START( roadrunn )
ROM_LOAD( "136040-118.1d", 0x2a0000, 0x008000, CRC(f489a968) SHA1(424ef3f11b30b152e03d40e604350098e0c3e9e0) ) /* bank 6, plane 2 */
ROM_LOAD( "136040-124.6d", 0x2b0000, 0x008000, CRC(524d65f7) SHA1(3f2b0ee642fe7eebb578b00b44d9821369269791) ) /* bank 6, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136040-126.7a", 0x000000, 0x000200, CRC(1713c0cd) SHA1(237ce1c53d8a17823df3341360f03b2b94cd91bb) )
ROM_LOAD( "136040-125.5a", 0x000200, 0x000200, CRC(a9ca8795) SHA1(77583510e7a7179493f313e0c0b25d029dd6e583) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadrunn2 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136040-x28.11c", 0x010000, 0x008000, CRC(fbd43085) SHA1(57f2f2f01e235f4525507583887d52b09f6267b4) )
ROM_LOAD16_BYTE( "136040-x29.11a", 0x010001, 0x008000, CRC(f8d8819b) SHA1(dddb44290e3d2728845639611c3a66c3389c8f69) )
ROM_LOAD16_BYTE( "136040-x30.13c", 0x020000, 0x008000, CRC(6a273375) SHA1(2e222ad4a4d53ec50f848386fca12f74e98814ed) )
@@ -1510,12 +1510,12 @@ ROM_START( roadrunn2 )
ROM_LOAD16_BYTE( "136040-140.17c", 0x080000, 0x004000, CRC(d1464c88) SHA1(0d600119a9137f4c7cad7f708e0c885da96af207) )
ROM_LOAD16_BYTE( "136040-141.17a", 0x080001, 0x004000, CRC(f8f2acdf) SHA1(b9e31c1f96fab5368fb90768e059157f74cbc762) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136040-143.15e", 0x008000, 0x004000, CRC(62b9878e) SHA1(db6072a7c8600d85fb70dac3d940a200d0cb5d0a) )
ROM_LOAD( "136040-144.17e", 0x00c000, 0x004000, CRC(6ef1b804) SHA1(176066c6946090c87945213145960754cd315acb) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x300000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136040-101.4b", 0x000000, 0x008000, CRC(26d9f29c) SHA1(e03a03484ede4ea209040faf64e88f0667a0ab40) ) /* bank 1, plane 0 */
@@ -1548,18 +1548,18 @@ ROM_START( roadrunn2 )
ROM_LOAD( "136040-118.1d", 0x2a0000, 0x008000, CRC(f489a968) SHA1(424ef3f11b30b152e03d40e604350098e0c3e9e0) ) /* bank 6, plane 2 */
ROM_LOAD( "136040-124.6d", 0x2b0000, 0x008000, CRC(524d65f7) SHA1(3f2b0ee642fe7eebb578b00b44d9821369269791) ) /* bank 6, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136040-126.7a", 0x000000, 0x000200, CRC(1713c0cd) SHA1(237ce1c53d8a17823df3341360f03b2b94cd91bb) )
ROM_LOAD( "136040-125.5a", 0x000200, 0x000200, CRC(a9ca8795) SHA1(77583510e7a7179493f313e0c0b25d029dd6e583) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadrunn1 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136040-128.11c", 0x010000, 0x008000, CRC(5e39d540) SHA1(69fae4c7db247062dffda0138a6e3bfb697f17bf) )
ROM_LOAD16_BYTE( "136040-129.11a", 0x010001, 0x008000, CRC(d79bfea1) SHA1(eb265ff5f3f08bbdb3b19f9c7dece7e58dd2c6ba) )
ROM_LOAD16_BYTE( "136040-130.13c", 0x020000, 0x008000, CRC(66453b37) SHA1(cb467a9c8109475bbc6d24b4a3559fa2f2edc887) )
@@ -1573,12 +1573,12 @@ ROM_START( roadrunn1 )
ROM_LOAD16_BYTE( "136040-140.17c", 0x080000, 0x004000, CRC(d1464c88) SHA1(0d600119a9137f4c7cad7f708e0c885da96af207) )
ROM_LOAD16_BYTE( "136040-141.17a", 0x080001, 0x004000, CRC(f8f2acdf) SHA1(b9e31c1f96fab5368fb90768e059157f74cbc762) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136040-143.15e", 0x008000, 0x004000, CRC(62b9878e) SHA1(db6072a7c8600d85fb70dac3d940a200d0cb5d0a) )
ROM_LOAD( "136040-144.17e", 0x00c000, 0x004000, CRC(6ef1b804) SHA1(176066c6946090c87945213145960754cd315acb) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x300000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136040-101.4b", 0x000000, 0x008000, CRC(26d9f29c) SHA1(e03a03484ede4ea209040faf64e88f0667a0ab40) ) /* bank 1, plane 0 */
@@ -1611,12 +1611,12 @@ ROM_START( roadrunn1 )
ROM_LOAD( "136040-118.1d", 0x2a0000, 0x008000, CRC(f489a968) SHA1(424ef3f11b30b152e03d40e604350098e0c3e9e0) ) /* bank 6, plane 2 */
ROM_LOAD( "136040-124.6d", 0x2b0000, 0x008000, CRC(524d65f7) SHA1(3f2b0ee642fe7eebb578b00b44d9821369269791) ) /* bank 6, plane 3 */
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136040-126.7a", 0x000000, 0x000200, CRC(1713c0cd) SHA1(237ce1c53d8a17823df3341360f03b2b94cd91bb) )
ROM_LOAD( "136040-125.5a", 0x000200, 0x000200, CRC(a9ca8795) SHA1(77583510e7a7179493f313e0c0b25d029dd6e583) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
@@ -1632,8 +1632,8 @@ ROM_END
*/
ROM_START( roadblst )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-1157.11c", 0x010000, 0x008000, CRC(6d9ad91e) SHA1(15815d3777be5377e053a39c1cef20eb101d9b92) )
ROM_LOAD16_BYTE( "136048-1158.11a", 0x010001, 0x008000, CRC(7d4cf151) SHA1(979006149906638b942a3157b237112acc16183d) )
ROM_LOAD16_BYTE( "136048-1159.13c", 0x020000, 0x008000, CRC(921c0e34) SHA1(bcc90a73baaecc551e1065037681a79e260905ff) )
@@ -1647,13 +1647,13 @@ ROM_START( roadblst )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -1690,18 +1690,18 @@ ROM_START( roadblst )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblstg )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-2257.11c", 0x010000, 0x008000, CRC(6e9de790) SHA1(348d4953b63f577b2b1ad747c6fb32c8ec55d310) )
ROM_LOAD16_BYTE( "136048-2258.11a", 0x010001, 0x008000, CRC(5160c69e) SHA1(a4aa4ae0cf24f0d3c768186332b4b0f8e55d2700) )
ROM_LOAD16_BYTE( "136048-2259.13c", 0x020000, 0x008000, CRC(62f10976) SHA1(e3c832304ad9163ed43d128aa68c321af655958d) )
@@ -1715,13 +1715,13 @@ ROM_START( roadblstg )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -1758,18 +1758,18 @@ ROM_START( roadblstg )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblst3 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-3157.11c", 0x010000, 0x008000, CRC(ce88fe34) SHA1(72a311e7e2e5f588226168e048905281f71f0aef) )
ROM_LOAD16_BYTE( "136048-3158.11a", 0x010001, 0x008000, CRC(03bf2879) SHA1(27f2622b9e2a3f823557fd231a8b0e3234fea5cb) )
ROM_LOAD16_BYTE( "136048-3159.13c", 0x020000, 0x008000, CRC(4305d74a) SHA1(618e0c638efb4110daf0954e89368c7b68a2a155) )
@@ -1783,13 +1783,13 @@ ROM_START( roadblst3 )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -1826,18 +1826,18 @@ ROM_START( roadblst3 )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblstg2 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-1239.11c", 0x010000, 0x008000, CRC(3b2bb14b) SHA1(e5eac61a4249a644fbc27908b443a3830d4488e6) )
ROM_CONTINUE( 0x050000, 0x008000 )
ROM_LOAD16_BYTE( "136048-1240.11a", 0x010001, 0x008000, CRC(2a5ab597) SHA1(3bdd27c67b05a426bd57e03a5c71948b6b57a40a) )
@@ -1851,13 +1851,13 @@ ROM_START( roadblstg2 )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -1894,18 +1894,18 @@ ROM_START( roadblstg2 )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblst2 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-1139.11c", 0x010000, 0x008000, CRC(b73c1bd5) SHA1(c4de0267a75225db22c771bec14b8da2fc9f06bf) )
ROM_CONTINUE( 0x050000, 0x008000 )
ROM_LOAD16_BYTE( "136048-1140.11a", 0x010001, 0x008000, CRC(6305429b) SHA1(c4180f6438a539ddc34c12529e5ac6d59c107728) )
@@ -1919,13 +1919,13 @@ ROM_START( roadblst2 )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -1962,18 +1962,18 @@ ROM_START( roadblst2 )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblstg1 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-1251.11c", 0x010000, 0x008000, CRC(7e94d6a2) SHA1(985b7537dc484975b458a9ae5780e32a5f742d1c) )
ROM_CONTINUE( 0x050000, 0x008000 )
ROM_LOAD16_BYTE( "136048-1252.11a", 0x010001, 0x008000, CRC(d7a66215) SHA1(f9797384f2d01b0dda2ff47c3560ca3489a7a38c) )
@@ -1987,13 +1987,13 @@ ROM_START( roadblstg1 )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -2030,18 +2030,18 @@ ROM_START( roadblstg1 )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblst1 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-2151.11c", 0x010000, 0x008000, CRC(ea6b3060) SHA1(0786f2e528c6a77ad7422ae199d06b7261cb4f2c) )
ROM_CONTINUE( 0x050000, 0x008000 )
ROM_LOAD16_BYTE( "136048-2152.11a", 0x010001, 0x008000, CRC(f5c1fbe0) SHA1(1917f2110a8021198b0cdadbaeab44c71b3bb0b5) )
@@ -2055,13 +2055,13 @@ ROM_START( roadblst1 )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -2098,18 +2098,18 @@ ROM_START( roadblst1 )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblstc )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-1179.7p", 0x010000, 0x008000, CRC(ef448f96) SHA1(238a6c435e317383a1983702ef0a1f2b757ebe8c) )
ROM_LOAD16_BYTE( "136048-1180.8p", 0x010001, 0x008000, CRC(bdb368d5) SHA1(9c79b053708ff619a2733664f881abb849ae2371) )
ROM_LOAD16_BYTE( "136048-1181.7r", 0x020000, 0x008000, CRC(d52581da) SHA1(d0a475f9d8199bc7c0ce6e6a663f214df9bffc39) )
@@ -2123,13 +2123,13 @@ ROM_START( roadblstc )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -2166,18 +2166,18 @@ ROM_START( roadblstc )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblstcg )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-1235.7p", 0x010000, 0x008000, CRC(58b2998f) SHA1(7e9f4ca2b15cf60c61e0615f214f9fcc518cb194) )
ROM_LOAD16_BYTE( "136048-1236.8p", 0x010001, 0x008000, CRC(02e23a40) SHA1(6525351669e95dab869c7adc7d992d12d9313aee) )
ROM_LOAD16_BYTE( "136048-1237.7r", 0x020000, 0x008000, CRC(5e0a7c5d) SHA1(fb3688fbadc05f96980c67f5446ccb250d20b1a3) )
@@ -2191,13 +2191,13 @@ ROM_START( roadblstcg )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -2234,18 +2234,18 @@ ROM_START( roadblstcg )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
ROM_START( roadblstc1 )
- ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
- MOTHERBOARD_BIOS
+ ROM_REGION( 0x88000, "maincpu", 0 ) /* 8.5*64k for 68000 code & slapstic ROM */
+ MOTHERBOARD_BIOS
ROM_LOAD16_BYTE( "136048-2135.7p", 0x010000, 0x008000, CRC(c0ef86df) SHA1(7dd4d2acba55dc001e009c37fae5a97a53ea1e66) )
ROM_LOAD16_BYTE( "136048-2136.8p", 0x010001, 0x008000, CRC(9637e2f0) SHA1(86257e1316356c1a7d86bcf7b57bcaff33ac3df5) )
ROM_LOAD16_BYTE( "136048-2137.7r", 0x020000, 0x008000, CRC(5382ab85) SHA1(1511dfaf8537980e506e4180a23ffcfcfec81451) )
@@ -2259,13 +2259,13 @@ ROM_START( roadblstc1 )
ROM_LOAD16_BYTE( "136048-2147.7k", 0x080000, 0x004000, CRC(5c1adf67) SHA1(53838a2f5059797991aa337a7bec32f7e694610a) )
ROM_LOAD16_BYTE( "136048-2148.8k", 0x080001, 0x004000, CRC(d9ac8966) SHA1(7d056c1eb8184b4261c5713b0d5799b2fd8bde2a) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136048-1149.14e", 0x4000, 0x4000, CRC(2e54f95e) SHA1(5056ddec3c88384ada1d2ee9b1532b9ba9f34e08) )
ROM_LOAD( "136048-1169.1516e", 0x8000, 0x4000, CRC(ee318052) SHA1(f66ff39499697b7439dc62567e727fec769c1505) )
ROM_LOAD( "136048-1170.17e", 0xc000, 0x4000, CRC(75dfec33) SHA1(3092348b98419bb23181d21406733d5d21cd3d82) )
ROM_REGION( 0x2000, "alpha", 0 )
- MOTHERBOARD_ALPHA
+ MOTHERBOARD_ALPHA
ROM_REGION( 0x380000, "tiles", ROMREGION_INVERT | ROMREGION_ERASEFF )
ROM_LOAD( "136048-1101.2s", 0x000000, 0x008000, CRC(fe342d27) SHA1(72deac16ab9b6b811f49d70d700d6bc3a904f9d5) ) /* bank 1, plane 0 */
@@ -2302,12 +2302,12 @@ ROM_START( roadblstc1 )
ROM_LOAD( "136048-1118.3l", 0x330000, 0x008000, CRC(be879b8e) SHA1(dc1d1f7bdb511e922b650fac88307a08ab37ac4c) ) /* bank 7/6, plane 0 */
ROM_CONTINUE( 0x2b0000, 0x008000 )
- ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
+ ROM_REGION( 0x400, "proms", 0 ) /* graphics mapping PROMs */
ROM_LOAD( "136048-1174.12d", 0x000000, 0x000200, CRC(db4a4d53) SHA1(c5468f3585ec9bc23c9ee990b3ae3738b0309823) )
ROM_LOAD( "136048-1173.2d", 0x000200, 0x000200, CRC(c80574af) SHA1(9a3dc83f70e79915ce0db3e6e69b5dcfee3acb6f) )
- ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
- MOTHERBOARD_PROMS
+ ROM_REGION( 0x201, "motherbrd_proms", 0) /* Motherboard PROM's (Only used by TTL version.) */
+ MOTHERBOARD_PROMS
ROM_END
@@ -2322,8 +2322,8 @@ DRIVER_INIT_MEMBER(atarisy1_state,marble)
{
slapstic_configure(*machine().device<cpu_device>("maincpu"), 0x080000, 0, 103);
- m_joystick_type = 0; /* none */
- m_trackball_type = 1; /* rotated */
+ m_joystick_type = 0; /* none */
+ m_trackball_type = 1; /* rotated */
}
@@ -2331,8 +2331,8 @@ DRIVER_INIT_MEMBER(atarisy1_state,peterpak)
{
slapstic_configure(*machine().device<cpu_device>("maincpu"), 0x080000, 0, 107);
- m_joystick_type = 1; /* digital */
- m_trackball_type = 0; /* none */
+ m_joystick_type = 1; /* digital */
+ m_trackball_type = 0; /* none */
}
@@ -2340,8 +2340,8 @@ DRIVER_INIT_MEMBER(atarisy1_state,indytemp)
{
slapstic_configure(*machine().device<cpu_device>("maincpu"), 0x080000, 0, 105);
- m_joystick_type = 1; /* digital */
- m_trackball_type = 0; /* none */
+ m_joystick_type = 1; /* digital */
+ m_trackball_type = 0; /* none */
}
@@ -2349,8 +2349,8 @@ DRIVER_INIT_MEMBER(atarisy1_state,roadrunn)
{
slapstic_configure(*machine().device<cpu_device>("maincpu"), 0x080000, 0, 108);
- m_joystick_type = 2; /* analog */
- m_trackball_type = 0; /* none */
+ m_joystick_type = 2; /* analog */
+ m_trackball_type = 0; /* none */
}
@@ -2358,8 +2358,8 @@ DRIVER_INIT_MEMBER(atarisy1_state,roadb109)
{
slapstic_configure(*machine().device<cpu_device>("maincpu"), 0x080000, 0, 109);
- m_joystick_type = 3; /* pedal */
- m_trackball_type = 2; /* steering wheel */
+ m_joystick_type = 3; /* pedal */
+ m_trackball_type = 2; /* steering wheel */
}
@@ -2367,8 +2367,8 @@ DRIVER_INIT_MEMBER(atarisy1_state,roadb110)
{
slapstic_configure(*machine().device<cpu_device>("maincpu"), 0x080000, 0, 110);
- m_joystick_type = 3; /* pedal */
- m_trackball_type = 2; /* steering wheel */
+ m_joystick_type = 3; /* pedal */
+ m_trackball_type = 2; /* steering wheel */
}
diff --git a/src/mame/drivers/atarisy2.c b/src/mame/drivers/atarisy2.c
index 3289bf7aba1..494adfd4a05 100644
--- a/src/mame/drivers/atarisy2.c
+++ b/src/mame/drivers/atarisy2.c
@@ -133,9 +133,9 @@
#include "sound/pokey.h"
-#define MASTER_CLOCK XTAL_20MHz
-#define SOUND_CLOCK XTAL_14_31818MHz
-#define VIDEO_CLOCK XTAL_32MHz
+#define MASTER_CLOCK XTAL_20MHz
+#define SOUND_CLOCK XTAL_14_31818MHz
+#define VIDEO_CLOCK XTAL_32MHz
@@ -411,14 +411,14 @@ READ8_MEMBER(atarisy2_state::leta_r)
{
static const char *const letanames[] = { "LETA0", "LETA1", "LETA2", "LETA3" };
- if (offset <= 1 && m_pedal_count == -1) /* 720 */
+ if (offset <= 1 && m_pedal_count == -1) /* 720 */
{
switch (ioport("SELECT")->read())
{
- case 0: /* Real */
+ case 0: /* Real */
break;
- case 1: /* Fake Joystick */
+ case 1: /* Fake Joystick */
/* special thanks to MAME Analog+ for the mapping code */
{
int analogx = ioport("FAKE_JOY_X")->read() - 128;
@@ -457,14 +457,14 @@ READ8_MEMBER(atarisy2_state::leta_r)
}
}
- case 2: /* Fake Spinner */
+ case 2: /* Fake Spinner */
{
INT32 diff;
UINT32 temp;
UINT32 rotate_count = ioport("FAKE_SPINNER")->read() & 0xffff;
/* rotate_count behaves the same as the real LEAT1 Rotate encoder
- * we use it to generate the LETA0 Center encoder count
- */
+ * we use it to generate the LETA0 Center encoder count
+ */
if (rotate_count != m_spin_last_rotate_count)
{
@@ -643,19 +643,19 @@ WRITE8_MEMBER(atarisy2_state::mixer_w)
/* these gains are cheesed up, but give an approximate effect */
/*
- * Before the volume adjustment, all channels pass through
- * a high-pass filter which removes DC components. The
- * filter frequency does also depend on the settings on
- * the resistors.
- *
- * The op-amp after the pokey feeds mixes the op-amp output voltage
- * with a low impedance back to the input. The internal resistance of the
- * pokey now is the ground pole of a three pole resistor mixer: ground,
- * 15V and op-amp output voltage.
- *
- * ==> DISCRETE candidate
- *
- */
+ * Before the volume adjustment, all channels pass through
+ * a high-pass filter which removes DC components. The
+ * filter frequency does also depend on the settings on
+ * the resistors.
+ *
+ * The op-amp after the pokey feeds mixes the op-amp output voltage
+ * with a low impedance back to the input. The internal resistance of the
+ * pokey now is the ground pole of a three pole resistor mixer: ground,
+ * 15V and op-amp output voltage.
+ *
+ * ==> DISCRETE candidate
+ *
+ */
/* bits 0-2 control the volume of the YM2151, using 22k, 47k, and 100k resistors */
rtop = 1.0/(1.0/100 + 1.0/100);
@@ -845,7 +845,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( paperboy )
- PORT_START("1840") /*(sound) */
+ PORT_START("1840") /*(sound) */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SPECIAL )
@@ -894,47 +894,47 @@ static INPUT_PORTS_START( paperboy )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW0")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("6/7A:!8,!7")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("6/7A:!8,!7")
PORT_DIPSETTING( 0x03, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("6/7A:!6,!5")
+ PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("6/7A:!6,!5")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x04, "*4" )
PORT_DIPSETTING( 0x08, "*5" )
PORT_DIPSETTING( 0x0c, "*6" )
- PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("6/7A:!4")
+ PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("6/7A:!4")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x10, "*2" )
- PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("6/7A:!3,!2,!1")
+ PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("6/7A:!3,!2,!1")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x80, "1 Each 5" )
PORT_DIPSETTING( 0x40, "1 Each 4" )
PORT_DIPSETTING( 0xa0, "1 Each 3" )
PORT_DIPSETTING( 0x60, "2 Each 4" )
PORT_DIPSETTING( 0x20, "1 Each 2" )
- PORT_DIPSETTING( 0xc0, "1 Each ?" ) /* Not Documented */
+ PORT_DIPSETTING( 0xc0, "1 Each ?" ) /* Not Documented */
PORT_DIPSETTING( 0xe0, DEF_STR( Free_Play ) )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!8,!7")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!8,!7")
PORT_DIPSETTING( 0x01, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x02, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x00, DEF_STR( Medium_Hard ) )
PORT_DIPSETTING( 0x03, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("5/6A:!6,!5")
+ PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("5/6A:!6,!5")
PORT_DIPSETTING( 0x08, "10000" )
PORT_DIPSETTING( 0x00, "15000" )
PORT_DIPSETTING( 0x0c, "20000" )
PORT_DIPSETTING( 0x04, DEF_STR( None ) )
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("5/6A:!4,!3")
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("5/6A:!4,!3")
PORT_DIPSETTING( 0x20, "3" )
PORT_DIPSETTING( 0x00, "4" )
PORT_DIPSETTING( 0x30, "5" )
PORT_DIPSETTING( 0x10, "Infinite (Cheat)")
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "5/6A:!2" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "5/6A:!1" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "5/6A:!2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "5/6A:!1" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -948,64 +948,64 @@ static INPUT_PORTS_START( 720 )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
/* 720 uses a special controller to control the player rotation.
- * It uses 1 disc with 72 teeth for the rotation and another disc
- * with 2 teeth for the alignment of the joystick to the top position.
- * The following graph shows how the Center and Rotate disc align.
- * The numbers show how the optical count varies from center.
- *
- * _____2 1________1 2_____
- * |__| |__| Center disc - 2 teeth. Shown lined up with Rotate disc
- * __ __ __ __
- * __| |__| |__| |__| |__ Rotate disc - 72 teeth (144 positions)
- * 4 3 2 1 1 2 3 4
- */
+ * It uses 1 disc with 72 teeth for the rotation and another disc
+ * with 2 teeth for the alignment of the joystick to the top position.
+ * The following graph shows how the Center and Rotate disc align.
+ * The numbers show how the optical count varies from center.
+ *
+ * _____2 1________1 2_____
+ * |__| |__| Center disc - 2 teeth. Shown lined up with Rotate disc
+ * __ __ __ __
+ * __| |__| |__| |__| |__ Rotate disc - 72 teeth (144 positions)
+ * 4 3 2 1 1 2 3 4
+ */
/* Center disc */
/* X1, X2 LETA inputs */
- PORT_MODIFY("LETA0") /* not direct mapped */
+ PORT_MODIFY("LETA0") /* not direct mapped */
PORT_BIT( 0xff, 0x00, IPT_DIAL_V ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_NAME("Center") PORT_CONDITION("SELECT",0x03,EQUALS,0x00)
/* Rotate disc */
/* Y1, Y2 LETA inputs */
/* The disc has 72 teeth which are read by the hardware at 2x */
/* Computer hardware reads at 4x, so we set the sensitivity to 50% */
- PORT_MODIFY("LETA1") /* not direct mapped */
+ PORT_MODIFY("LETA1") /* not direct mapped */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_FULL_TURN_COUNT(144) PORT_NAME("Rotate") PORT_CONDITION("SELECT",0x03,EQUALS,0x00)
- PORT_START("FAKE_JOY_X") /* not direct mapped */
+ PORT_START("FAKE_JOY_X") /* not direct mapped */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CONDITION("SELECT",0x03,EQUALS,0x01)
- PORT_START("FAKE_JOY_Y") /* not direct mapped */
+ PORT_START("FAKE_JOY_Y") /* not direct mapped */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_CONDITION("SELECT",0x03,EQUALS,0x01)
/* Let's assume we are using a 1200 count spinner. We scale to get a 144 count.
- * 144/1200 = 0.12 = 12% */
- PORT_START("FAKE_SPINNER") /* not direct mapped */
+ * 144/1200 = 0.12 = 12% */
+ PORT_START("FAKE_SPINNER") /* not direct mapped */
PORT_BIT( 0xffff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(12) PORT_KEYDELTA(10) PORT_CONDITION("SELECT",0x03,EQUALS,0x02)
PORT_START("SELECT")
- PORT_CONFNAME( 0x03, 0x02, "Controller Type" )
- PORT_CONFSETTING( 0x00, "Real" )
- PORT_CONFSETTING( 0x01, "Joystick" )
- PORT_CONFSETTING( 0x02, "Spinner" )
+ PORT_CONFNAME( 0x03, 0x02, "Controller Type" )
+ PORT_CONFSETTING( 0x00, "Real" )
+ PORT_CONFSETTING( 0x01, "Joystick" )
+ PORT_CONFSETTING( 0x02, "Spinner" )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("5/6A:!8,!7")
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("5/6A:!8,!7")
PORT_DIPSETTING( 0x01, "3000" )
PORT_DIPSETTING( 0x00, "5000" )
PORT_DIPSETTING( 0x02, "8000" )
PORT_DIPSETTING( 0x03, "12000" )
- PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!6,!5")
+ PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!6,!5")
PORT_DIPSETTING( 0x04, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x30, 0x10, "Maximum Add. A. Coins" ) PORT_DIPLOCATION("5/6A:!4,!3")
+ PORT_DIPNAME( 0x30, 0x10, "Maximum Add. A. Coins" ) PORT_DIPLOCATION("5/6A:!4,!3")
PORT_DIPSETTING( 0x10, "0" )
PORT_DIPSETTING( 0x20, "1" )
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x30, "3" )
- PORT_DIPNAME( 0xc0, 0x40, "Coins Required" ) PORT_DIPLOCATION("5/6A:!2,!1")
+ PORT_DIPNAME( 0xc0, 0x40, "Coins Required" ) PORT_DIPLOCATION("5/6A:!2,!1")
PORT_DIPSETTING( 0x80, "3 To Start, 2 To Continue" )
PORT_DIPSETTING( 0xc0, "3 To Start, 1 To Continue" )
PORT_DIPSETTING( 0x00, "2 To Start, 1 To Continue" )
@@ -1046,7 +1046,7 @@ static INPUT_PORTS_START( ssprint )
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_PLAYER(3)
PORT_MODIFY("DSW0")
- PORT_DIPNAME( 0x1c, 0x00, "Coin Multiplier" ) PORT_DIPLOCATION("6/7A:!6,!5,!4")
+ PORT_DIPNAME( 0x1c, 0x00, "Coin Multiplier" ) PORT_DIPLOCATION("6/7A:!6,!5,!4")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x04, "*2" )
PORT_DIPSETTING( 0x08, "*3" )
@@ -1057,17 +1057,17 @@ static INPUT_PORTS_START( ssprint )
PORT_DIPSETTING( 0x1c, "*8" )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!8,!7")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!8,!7")
PORT_DIPSETTING( 0x01, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x02, DEF_STR( Medium_Hard ) )
PORT_DIPSETTING( 0x03, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x0c, 0x00, "Obstacles" ) PORT_DIPLOCATION("5/6A:!6,!5")
+ PORT_DIPNAME( 0x0c, 0x00, "Obstacles" ) PORT_DIPLOCATION("5/6A:!6,!5")
PORT_DIPSETTING( 0x04, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x08, DEF_STR( Medium_Hard ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x30, 0x00, "Wrenches" ) PORT_DIPLOCATION("5/6A:!4,!3")
+ PORT_DIPNAME( 0x30, 0x00, "Wrenches" ) PORT_DIPLOCATION("5/6A:!4,!3")
PORT_DIPSETTING( 0x10, "2" )
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x20, "4" )
@@ -1096,7 +1096,7 @@ static INPUT_PORTS_START( csprint )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x80, 0x00, "Auto High Score Reset" ) PORT_DIPLOCATION("5/6A:!1") /* "After 2000 Plays." */
+ PORT_DIPNAME( 0x80, 0x00, "Auto High Score Reset" ) PORT_DIPLOCATION("5/6A:!1") /* "After 2000 Plays." */
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1125,9 +1125,9 @@ static INPUT_PORTS_START( apb )
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_PLAYER(1)
PORT_MODIFY("DSW0")
- PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("6/7A:!3,!2,!1")
+ PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("6/7A:!3,!2,!1")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
- PORT_DIPSETTING( 0xc0, "1 Each 6" ) /* Not documented */
+ PORT_DIPSETTING( 0xc0, "1 Each 6" ) /* Not documented */
PORT_DIPSETTING( 0xa0, "1 Each 5" )
PORT_DIPSETTING( 0x80, "1 Each 4" )
PORT_DIPSETTING( 0x60, "1 Each 3" )
@@ -1136,24 +1136,24 @@ static INPUT_PORTS_START( apb )
PORT_DIPSETTING( 0xe0, DEF_STR( Free_Play ) )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x01, 0x00, "Attract Lights" ) PORT_DIPLOCATION("5/6A:!8") /* Listed As Unused. */
+ PORT_DIPNAME( 0x01, 0x00, "Attract Lights" ) PORT_DIPLOCATION("5/6A:!8") /* Listed As Unused. */
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x06, 0x00, "Max Continues" ) PORT_DIPLOCATION("5/6A:!7,!6")
+ PORT_DIPNAME( 0x06, 0x00, "Max Continues" ) PORT_DIPLOCATION("5/6A:!7,!6")
PORT_DIPSETTING( 0x02, "3" )
PORT_DIPSETTING( 0x04, "10" )
PORT_DIPSETTING( 0x00, "25" )
PORT_DIPSETTING( 0x06, "199" )
- PORT_DIPNAME( 0x38, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!5,!4,!3") /* No. Of Demerits Allowed Bonus Inc. Every x Pts Perfect Day Bonus */
- PORT_DIPSETTING( 0x38, DEF_STR( Easiest ) ) /* 11 5000 Yes */
- PORT_DIPSETTING( 0x30, DEF_STR( Very_Easy ) ) /* 10 6000 Yes */
- PORT_DIPSETTING( 0x28, DEF_STR( Easy ) ) /* 9 8000 Yes */
- PORT_DIPSETTING( 0x00, DEF_STR( Medium_Easy ) ) /* 8 10000 Yes */
- PORT_DIPSETTING( 0x20, DEF_STR( Medium_Hard ) ) /* 7 11000 Yes */
- PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) /* 6 13000 Yes */
- PORT_DIPSETTING( 0x08, DEF_STR( Very_Hard ) ) /* 5 15000 No */
- PORT_DIPSETTING( 0x18, DEF_STR( Hardest ) ) /* 4 18000 No */
- PORT_DIPNAME( 0xc0, 0x00, "Coins Required" ) PORT_DIPLOCATION("5/6A:!2,!1")
+ PORT_DIPNAME( 0x38, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("5/6A:!5,!4,!3") /* No. Of Demerits Allowed Bonus Inc. Every x Pts Perfect Day Bonus */
+ PORT_DIPSETTING( 0x38, DEF_STR( Easiest ) ) /* 11 5000 Yes */
+ PORT_DIPSETTING( 0x30, DEF_STR( Very_Easy ) ) /* 10 6000 Yes */
+ PORT_DIPSETTING( 0x28, DEF_STR( Easy ) ) /* 9 8000 Yes */
+ PORT_DIPSETTING( 0x00, DEF_STR( Medium_Easy ) ) /* 8 10000 Yes */
+ PORT_DIPSETTING( 0x20, DEF_STR( Medium_Hard ) ) /* 7 11000 Yes */
+ PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) /* 6 13000 Yes */
+ PORT_DIPSETTING( 0x08, DEF_STR( Very_Hard ) ) /* 5 15000 No */
+ PORT_DIPSETTING( 0x18, DEF_STR( Hardest ) ) /* 4 18000 No */
+ PORT_DIPNAME( 0xc0, 0x00, "Coins Required" ) PORT_DIPLOCATION("5/6A:!2,!1")
PORT_DIPSETTING( 0x80, "3 To Start, 2 To Continue" )
PORT_DIPSETTING( 0xc0, "3 To Start, 1 To Continue" )
PORT_DIPSETTING( 0x00, "2 To Start, 1 To Continue" )
@@ -1240,7 +1240,7 @@ static const pokey_interface pokey_interface_2 =
static const struct t11_setup t11_data =
{
- 0x36ff /* initial mode word has DAL15,14,11,8 pulled low */
+ 0x36ff /* initial mode word has DAL15,14,11,8 pulled low */
};
@@ -1308,7 +1308,7 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( paperboy )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "cpu_l07.rv3", 0x008000, 0x004000, CRC(4024bb9b) SHA1(9030ce5a6a1a3d769c699a92b32a55013f9766aa) )
ROM_LOAD16_BYTE( "cpu_n07.rv3", 0x008001, 0x004000, CRC(0260901a) SHA1(39d786f5c440ca1fd529ee73e2a4d2406cd1db8f) )
ROM_LOAD16_BYTE( "cpu_f06.rv2", 0x010000, 0x004000, CRC(3fea86ac) SHA1(90722bfd0426efbfb69714151f8644b56075b4c1) )
@@ -1320,7 +1320,7 @@ ROM_START( paperboy )
ROM_LOAD16_BYTE( "cpu_l06.rv2", 0x070000, 0x004000, CRC(8a754466) SHA1(2c4c6ca797c7f4349c2893d8c0ba7e2658fdca99) )
ROM_LOAD16_BYTE( "cpu_s06.rv2", 0x070001, 0x004000, CRC(224209f9) SHA1(c41269bfadb8fff1c8ff0f6ea0b8e8b34feb49d6) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "cpu_a02.rv3", 0x004000, 0x004000, CRC(ba251bc4) SHA1(768e42608263205e412e651082ffa2a083b04644) )
ROM_LOAD( "cpu_b02.rv2", 0x008000, 0x004000, CRC(e4e7a8b9) SHA1(f11a0cf40d5c51ff180f0fa1cf676f95090a1010) )
ROM_LOAD( "cpu_c02.rv2", 0x00c000, 0x004000, CRC(d44c2aa2) SHA1(f1b00e36d87f6d77746cf003198c7f19aa2f4fab) )
@@ -1350,7 +1350,7 @@ ROM_END
ROM_START( paperboyr2 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "cpu_l07.rv2", 0x008000, 0x004000, CRC(39d0a625) SHA1(c4f62cecbc8a122f58f98312517feccf9429f28b) )
ROM_LOAD16_BYTE( "cpu_n07.rv2", 0x008001, 0x004000, CRC(3c5de588) SHA1(faad02fee1528cd52af1fac315096a46a9eb9a85) )
ROM_LOAD16_BYTE( "cpu_f06.rv2", 0x010000, 0x004000, CRC(3fea86ac) SHA1(90722bfd0426efbfb69714151f8644b56075b4c1) )
@@ -1362,7 +1362,7 @@ ROM_START( paperboyr2 )
ROM_LOAD16_BYTE( "cpu_l06.rv2", 0x070000, 0x004000, CRC(8a754466) SHA1(2c4c6ca797c7f4349c2893d8c0ba7e2658fdca99) )
ROM_LOAD16_BYTE( "cpu_s06.rv2", 0x070001, 0x004000, CRC(224209f9) SHA1(c41269bfadb8fff1c8ff0f6ea0b8e8b34feb49d6) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "cpu_a02.rv2", 0x004000, 0x004000, CRC(4a759092) SHA1(26909df77f53ac19e205411b90558488badc82bd) )
ROM_LOAD( "cpu_b02.rv2", 0x008000, 0x004000, CRC(e4e7a8b9) SHA1(f11a0cf40d5c51ff180f0fa1cf676f95090a1010) )
ROM_LOAD( "cpu_c02.rv2", 0x00c000, 0x004000, CRC(d44c2aa2) SHA1(f1b00e36d87f6d77746cf003198c7f19aa2f4fab) )
@@ -1392,7 +1392,7 @@ ROM_END
ROM_START( paperboyr1 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "cpu_l07.rv1", 0x008000, 0x004000, CRC(fd87a8ee) SHA1(f42fe59f62928bb36c00b6814e1af173d713fb2e) )
ROM_LOAD16_BYTE( "cpu_n07.rv1", 0x008001, 0x004000, CRC(a997e217) SHA1(85d97e62bb225f6302cdad18bf1299d364614ce4) )
ROM_LOAD16_BYTE( "cpu_f06.rv1", 0x010000, 0x004000, CRC(e871248d) SHA1(c660e21e47a958ee72857ca41e6a299ce4328076) )
@@ -1404,7 +1404,7 @@ ROM_START( paperboyr1 )
ROM_LOAD16_BYTE( "cpu_l06.rv1", 0x070000, 0x004000, CRC(ccbc58a6) SHA1(dd66317146c295524f83b8d40c20164e873752b5) )
ROM_LOAD16_BYTE( "cpu_s06.rv1", 0x070001, 0x004000, CRC(a7f14643) SHA1(d73c8ec2493617fce2e6822e8a6cde16a2de5965) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "cpu_a02.rv1", 0x004000, 0x004000, CRC(5479a788) SHA1(4cc5145e75ac6370f54eea33531f1f96160ee82b) )
ROM_LOAD( "cpu_b02.rv1", 0x008000, 0x004000, CRC(de4147c6) SHA1(c997510b2018291924abddfe604a8f738fd8035c) )
ROM_LOAD( "cpu_c02.rv1", 0x00c000, 0x004000, CRC(b71505fc) SHA1(15fd156038861cb715fce10f1c56f3ded851be39) )
@@ -1843,7 +1843,7 @@ ROM_END
ROM_START( ssprint )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136042-330.7l", 0x008000, 0x004000, CRC(ee312027) SHA1(7caeaf6220022ffffc7d1feefec24163bed70275) )
ROM_LOAD16_BYTE( "136042-331.7n", 0x008001, 0x004000, CRC(2ef15354) SHA1(c8044bd2e435bdd423877b78f375f13588d1dfd1) )
ROM_LOAD16_BYTE( "136042-329.6f", 0x010000, 0x008000, CRC(ed1d6205) SHA1(7b2b2fd5eb12b1b6266d2becb96c8cf23cdaed26) )
@@ -1853,7 +1853,7 @@ ROM_START( ssprint )
ROM_LOAD16_BYTE( "136042-126.6l", 0x070000, 0x008000, CRC(92f5392c) SHA1(064ccf24a68440caa565c0467ba4bf4246133698) )
ROM_LOAD16_BYTE( "136042-122.6s", 0x070001, 0x008000, CRC(0381f362) SHA1(e33b6d4949cdee33f27cedf00ef20f1ce5011e24) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136042-419.2bc", 0x008000, 0x004000, CRC(b277915a) SHA1(e0e8cd713950f45352b7c1de986b5b0b5c1703b3) )
ROM_LOAD( "136042-420.2d", 0x00c000, 0x004000, CRC(170b2c53) SHA1(c6d5657da29cf637cea940406fcff9a7328964f8) )
@@ -1890,7 +1890,7 @@ ROM_END
ROM_START( ssprints )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136042-138.7l", 0x008000, 0x004000, CRC(234a7c65) SHA1(2686cb83f339e20b7168ebf22f97d11511815859) )
ROM_LOAD16_BYTE( "136042-139.7n", 0x008001, 0x004000, CRC(7652a461) SHA1(9afe5b1d8ad16906b9927e8ca7e1ce81f86352d2) )
ROM_LOAD16_BYTE( "136042-137.6f", 0x010000, 0x008000, CRC(fa4c7e9d) SHA1(88eedd7c24da591f75525d0229ff91fac8c2d4ad) )
@@ -1900,7 +1900,7 @@ ROM_START( ssprints )
ROM_LOAD16_BYTE( "136042-126.6l", 0x070000, 0x008000, CRC(92f5392c) SHA1(064ccf24a68440caa565c0467ba4bf4246133698) )
ROM_LOAD16_BYTE( "136042-122.6s", 0x070001, 0x008000, CRC(0381f362) SHA1(e33b6d4949cdee33f27cedf00ef20f1ce5011e24) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136042-119.2bc", 0x008000, 0x004000, CRC(0c810231) SHA1(a5a637e12df7eae234fdc2d3957d122c196c65cd) )
ROM_LOAD( "136042-120.2d", 0x00c000, 0x004000, CRC(647b7481) SHA1(51b1b09919eee3d98e65d48e3a2af8321ccf8a02) )
@@ -1937,7 +1937,7 @@ ROM_END
ROM_START( ssprintf )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136042-134.7l", 0x008000, 0x004000, CRC(b7757b44) SHA1(4d38addb68cb272e5cb9cfbfeb7c3a5aeb21ad26) )
ROM_LOAD16_BYTE( "136042-135.7n", 0x008001, 0x004000, CRC(4fc132ba) SHA1(6724c59d4942bb9196918f1f83bac7bb07099076) )
ROM_LOAD16_BYTE( "136042-133.6f", 0x010000, 0x008000, CRC(0b9f89da) SHA1(025650687af247f4bb7d070d69073cf7afbf9a27) )
@@ -1947,7 +1947,7 @@ ROM_START( ssprintf )
ROM_LOAD16_BYTE( "136042-126.6l", 0x070000, 0x008000, CRC(92f5392c) SHA1(064ccf24a68440caa565c0467ba4bf4246133698) )
ROM_LOAD16_BYTE( "136042-122.6s", 0x070001, 0x008000, CRC(0381f362) SHA1(e33b6d4949cdee33f27cedf00ef20f1ce5011e24) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136042-119.2bc", 0x008000, 0x004000, CRC(0c810231) SHA1(a5a637e12df7eae234fdc2d3957d122c196c65cd) )
ROM_LOAD( "136042-120.2d", 0x00c000, 0x004000, CRC(647b7481) SHA1(51b1b09919eee3d98e65d48e3a2af8321ccf8a02) )
@@ -1984,7 +1984,7 @@ ROM_END
ROM_START( ssprintg )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136042-430.7l", 0x008000, 0x004000, CRC(c21df5f5) SHA1(0b79cfa0a6f3c1c59d09ff6a741abc71dc3da240) )
ROM_LOAD16_BYTE( "136042-431.7n", 0x008001, 0x004000, CRC(5880fc58) SHA1(c4e6c48d99b903f80408f0ee81672ff259f131ae) )
ROM_LOAD16_BYTE( "136042-429.6f", 0x010000, 0x008000, CRC(2060f68a) SHA1(b435a6de3e5ea5c1b5ba14f755660f747d972c38) )
@@ -1994,7 +1994,7 @@ ROM_START( ssprintg )
ROM_LOAD16_BYTE( "136042-126.6l", 0x070000, 0x008000, CRC(92f5392c) SHA1(064ccf24a68440caa565c0467ba4bf4246133698) )
ROM_LOAD16_BYTE( "136042-122.6s", 0x070001, 0x008000, CRC(0381f362) SHA1(e33b6d4949cdee33f27cedf00ef20f1ce5011e24) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136042-119.2bc", 0x008000, 0x004000, CRC(0c810231) SHA1(a5a637e12df7eae234fdc2d3957d122c196c65cd) )
ROM_LOAD( "136042-120.2d", 0x00c000, 0x004000, CRC(647b7481) SHA1(51b1b09919eee3d98e65d48e3a2af8321ccf8a02) )
@@ -2031,7 +2031,7 @@ ROM_END
ROM_START( ssprint3 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136042-330.7l", 0x008000, 0x004000, CRC(ee312027) SHA1(7caeaf6220022ffffc7d1feefec24163bed70275) )
ROM_LOAD16_BYTE( "136042-331.7n", 0x008001, 0x004000, CRC(2ef15354) SHA1(c8044bd2e435bdd423877b78f375f13588d1dfd1) )
ROM_LOAD16_BYTE( "136042-329.6f", 0x010000, 0x008000, CRC(ed1d6205) SHA1(7b2b2fd5eb12b1b6266d2becb96c8cf23cdaed26) )
@@ -2041,7 +2041,7 @@ ROM_START( ssprint3 )
ROM_LOAD16_BYTE( "136042-126.6l", 0x070000, 0x008000, CRC(92f5392c) SHA1(064ccf24a68440caa565c0467ba4bf4246133698) )
ROM_LOAD16_BYTE( "136042-122.6s", 0x070001, 0x008000, CRC(0381f362) SHA1(e33b6d4949cdee33f27cedf00ef20f1ce5011e24) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136042-319.2bc", 0x008000, 0x004000, CRC(c7f31c16) SHA1(cfacf22405da5e3cf95059ea6b9677a5a8471496) )
ROM_LOAD( "136042-320.2d", 0x00c000, 0x004000, CRC(9815ece9) SHA1(95239e15fe3e3f9a66e0f4dae365f763656cb70b) )
@@ -2078,7 +2078,7 @@ ROM_END
ROM_START( ssprintg1 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136042-230.7l", 0x008000, 0x004000, CRC(e5b2da29) SHA1(99150184a3f065e934ed6f60731fe534a75ba991) )
ROM_LOAD16_BYTE( "136042-231.7n", 0x008001, 0x004000, CRC(fac14b00) SHA1(6e5bf1e80f3d04f670b8290195609c0ac0cacea2) )
ROM_LOAD16_BYTE( "136042-229.6f", 0x010000, 0x008000, CRC(78b01070) SHA1(ccfa6bd1068e7bd3524a7da93a901633256f0524) )
@@ -2088,7 +2088,7 @@ ROM_START( ssprintg1 )
ROM_LOAD16_BYTE( "136042-126.6l", 0x070000, 0x008000, CRC(92f5392c) SHA1(064ccf24a68440caa565c0467ba4bf4246133698) )
ROM_LOAD16_BYTE( "136042-122.6s", 0x070001, 0x008000, CRC(0381f362) SHA1(e33b6d4949cdee33f27cedf00ef20f1ce5011e24) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136042-119.2bc", 0x008000, 0x004000, CRC(0c810231) SHA1(a5a637e12df7eae234fdc2d3957d122c196c65cd) )
ROM_LOAD( "136042-120.2d", 0x00c000, 0x004000, CRC(647b7481) SHA1(51b1b09919eee3d98e65d48e3a2af8321ccf8a02) )
@@ -2125,7 +2125,7 @@ ROM_END
ROM_START( ssprint1 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136042-130.7l", 0x008000, 0x004000, CRC(b1edc688) SHA1(2b5c4a20e54fda43b49e5f811ed144675f8e019b) )
ROM_LOAD16_BYTE( "136042-131.7n", 0x008001, 0x004000, CRC(df49dc5a) SHA1(7cdd54cbfd0dc0428394047a057892e7f7d17b50) )
ROM_LOAD16_BYTE( "136042-129.6f", 0x010000, 0x008000, CRC(8be22fca) SHA1(d663ef2e71bafbda5351d73e0b9a86bbfa66e225) )
@@ -2135,7 +2135,7 @@ ROM_START( ssprint1 )
ROM_LOAD16_BYTE( "136042-126.6l", 0x070000, 0x008000, CRC(92f5392c) SHA1(064ccf24a68440caa565c0467ba4bf4246133698) )
ROM_LOAD16_BYTE( "136042-122.6s", 0x070001, 0x008000, CRC(0381f362) SHA1(e33b6d4949cdee33f27cedf00ef20f1ce5011e24) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136042-119.2bc", 0x008000, 0x004000, CRC(0c810231) SHA1(a5a637e12df7eae234fdc2d3957d122c196c65cd) )
ROM_LOAD( "136042-120.2d", 0x00c000, 0x004000, CRC(647b7481) SHA1(51b1b09919eee3d98e65d48e3a2af8321ccf8a02) )
@@ -2172,7 +2172,7 @@ ROM_END
ROM_START( csprints )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-2326.7l", 0x008000, 0x004000, CRC(fd4ed0d3) SHA1(22d7a290c56975b8af82054b5fd8c9298f17f99a) )
ROM_LOAD16_BYTE( "136045-2327.7n", 0x008001, 0x004000, CRC(5ef2a65a) SHA1(3ead2b91abca5ff95bffcd1fd40d3ff635d7801f) )
ROM_LOAD16_BYTE( "136045-2325.6f", 0x010000, 0x008000, CRC(57253376) SHA1(100901de38f8561fc29d5b135b76b24755a4b1b2) )
@@ -2182,7 +2182,7 @@ ROM_START( csprints )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -2217,7 +2217,7 @@ ROM_END
ROM_START( csprint )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-3126.7l", 0x008000, 0x004000, CRC(1dcf8b98) SHA1(6d83ea725a8448cd1fc31cdce2e24662db6b9bcf) )
ROM_LOAD16_BYTE( "136045-2127.7n", 0x008001, 0x004000, CRC(bdcbe42c) SHA1(6dce564ce53f7171f8c713185cbf8b99a421ca41) )
ROM_LOAD16_BYTE( "136045-2125.6f", 0x010000, 0x008000, CRC(76cc68b9) SHA1(651dbe8862afe2b7985a0a1cd1dabdbb1accc163) )
@@ -2227,7 +2227,7 @@ ROM_START( csprint )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -2262,7 +2262,7 @@ ROM_END
ROM_START( csprints1 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-1326.7l", 0x008000, 0x004000, CRC(cfa673a6) SHA1(db630ce26b6b2cf9215a7810ab6b93a5485bd5ae) )
ROM_LOAD16_BYTE( "136045-1327.7n", 0x008001, 0x004000, CRC(16c1dcab) SHA1(deb3eaff35e7b3810133c7ce74a528d3a58babb2) )
ROM_LOAD16_BYTE( "136045-1325.6f", 0x010000, 0x008000, CRC(8661f17b) SHA1(a9271fca78eba39484b1f806f675a69e33007633) )
@@ -2272,7 +2272,7 @@ ROM_START( csprints1 )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -2307,7 +2307,7 @@ ROM_END
ROM_START( csprintf )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-1626.7l", 0x008000, 0x004000, CRC(f9d4fbd3) SHA1(df8bea5190203be6157b0825af107c31404bbdf8) )
ROM_LOAD16_BYTE( "136045-1627.7n", 0x008001, 0x004000, CRC(637f0afa) SHA1(ef89300b3d8fd8c2ddba76c0cdd2589f5ae16c81) )
ROM_LOAD16_BYTE( "136045-1625.6f", 0x010000, 0x008000, CRC(1edc6462) SHA1(6e1653b71240fdc865dca7ea7916e8468245ea2f) )
@@ -2317,7 +2317,7 @@ ROM_START( csprintf )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -2352,7 +2352,7 @@ ROM_END
ROM_START( csprintg )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-2226.7l", 0x008000, 0x004000, CRC(1f437a3f) SHA1(f976a023124d002e922669585eb22334720c15e5) )
ROM_LOAD16_BYTE( "136045-1227.7n", 0x008001, 0x004000, CRC(d1dce1cc) SHA1(2de07c4730e1b5e4b11466220bb350f3263d43e7) )
ROM_LOAD16_BYTE( "136045-1225.6f", 0x010000, 0x008000, CRC(e787da64) SHA1(8a5a9731b39808525a69522006801322d27d1e6b) )
@@ -2362,7 +2362,7 @@ ROM_START( csprintg )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -2397,7 +2397,7 @@ ROM_END
ROM_START( csprint2 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-2126.7l", 0x008000, 0x004000, CRC(0ff83de8) SHA1(23f90b8f3ebd3d3bbd7a68aaecae5f45f1b477c0) )
ROM_LOAD16_BYTE( "136045-1127.7n", 0x008001, 0x004000, CRC(e3e37258) SHA1(64f48c1acbb02cc8f6b76232d142382007485fb2) )
ROM_LOAD16_BYTE( "136045-1125.6f", 0x010000, 0x008000, CRC(650623d2) SHA1(036cb441aba64d08f3b50f72cb22fed3b4766341) )
@@ -2407,7 +2407,7 @@ ROM_START( csprint2 )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -2442,7 +2442,7 @@ ROM_END
ROM_START( csprintg1 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-1226.7l", 0x008000, 0x004000, CRC(becfc276) SHA1(cc3a6ef91fb3a47426a347ba4f6df41582e6deba) )
ROM_LOAD16_BYTE( "136045-1227.7n", 0x008001, 0x004000, CRC(d1dce1cc) SHA1(2de07c4730e1b5e4b11466220bb350f3263d43e7) )
ROM_LOAD16_BYTE( "136045-1225.6f", 0x010000, 0x008000, CRC(e787da64) SHA1(8a5a9731b39808525a69522006801322d27d1e6b) )
@@ -2452,7 +2452,7 @@ ROM_START( csprintg1 )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -2487,7 +2487,7 @@ ROM_END
ROM_START( csprint1 )
- ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
+ ROM_REGION( 0x90000, "maincpu", 0 ) /* 9*64k for T11 code */
ROM_LOAD16_BYTE( "136045-1126.7l", 0x008000, 0x004000, CRC(a04ecbac) SHA1(56a77c9fd8cdd963616cf25838ade2a87a87947b) )
ROM_LOAD16_BYTE( "136045-1127.7n", 0x008001, 0x004000, CRC(e3e37258) SHA1(64f48c1acbb02cc8f6b76232d142382007485fb2) )
ROM_LOAD16_BYTE( "136045-1125.6f", 0x010000, 0x008000, CRC(650623d2) SHA1(036cb441aba64d08f3b50f72cb22fed3b4766341) )
@@ -2497,7 +2497,7 @@ ROM_START( csprint1 )
ROM_LOAD16_BYTE( "136045-1123.6l", 0x070000, 0x008000, CRC(0a4d216a) SHA1(53a4af7673c9dae1f6f2f13dce3c38a31ee12ee2) )
ROM_LOAD16_BYTE( "136045-1120.6s", 0x070001, 0x008000, CRC(103f3fde) SHA1(9a0e82c3294369858b7a6c978143d8145a8df5a2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136045-1118.2bc", 0x008000, 0x004000, CRC(eba41b2f) SHA1(a0d6e9f4609f2587b0fad6845e75653c10bf4249) )
ROM_LOAD( "136045-1119.2d", 0x00c000, 0x004000, CRC(9e49043a) SHA1(ec467fe1cd59c51e43c3acd83d300f5b3309a47a) )
@@ -3201,8 +3201,8 @@ DRIVER_INIT_MEMBER(atarisy2_state,paperboy)
DRIVER_INIT_MEMBER(atarisy2_state,720)
{
/* without the default EEPROM, 720 hangs at startup due to communication
- issues with the sound CPU; temporarily increasing the sound CPU frequency
- to ~2.2MHz "fixes" the problem */
+ issues with the sound CPU; temporarily increasing the sound CPU frequency
+ to ~2.2MHz "fixes" the problem */
slapstic_init(machine(), 107);
m_pedal_count = -1;
diff --git a/src/mame/drivers/atarisy4.c b/src/mame/drivers/atarisy4.c
index 9b9277539f6..3f09b346573 100644
--- a/src/mame/drivers/atarisy4.c
+++ b/src/mame/drivers/atarisy4.c
@@ -73,12 +73,12 @@ public:
struct gpu_
{
/* Memory-mapped registers */
- UINT16 gr[8]; /* Command parameters */
+ UINT16 gr[8]; /* Command parameters */
- UINT16 bcrw; /* Screen buffer W control */
- UINT16 bcrx; /* Screen buffer X control */
- UINT16 bcry; /* Screen buffer Y control */
- UINT16 bcrz; /* Screen buffer Z control */
+ UINT16 bcrw; /* Screen buffer W control */
+ UINT16 bcrx; /* Screen buffer X control */
+ UINT16 bcry; /* Screen buffer Y control */
+ UINT16 bcrz; /* Screen buffer Z control */
UINT16 psrw;
UINT16 psrx;
UINT16 psry;
@@ -88,13 +88,13 @@ struct gpu_
UINT16 ctr;
UINT16 lfr;
UINT16 ifr;
- UINT16 ecr; /* Execute command register */
+ UINT16 ecr; /* Execute command register */
UINT16 far;
- UINT16 mcr; /* Interrupt control */
+ UINT16 mcr; /* Interrupt control */
UINT16 qlr;
UINT16 qar;
- UINT16 dhr; /* Scanline counter */
+ UINT16 dhr; /* Scanline counter */
UINT16 dlr;
/* Others */
@@ -365,13 +365,13 @@ void execute_gpu_command(running_machine &machine)
case 0x16:
{
/*
- Copy screen RAM to color RAM
- GR0 : Color start X
- GR1 : Color start Y
- GR2 : Color table offset
- GR3 : Size
- GR4 : Channels to set (R: 0x10, G: 0x20, B: 0x40)
- */
+ Copy screen RAM to color RAM
+ GR0 : Color start X
+ GR1 : Color start Y
+ GR2 : Color table offset
+ GR3 : Size
+ GR4 : Channels to set (R: 0x10, G: 0x20, B: 0x40)
+ */
int i;
int offset = xy_to_screen_addr(gpu.gr[0] - 0x400, gpu.gr[1] - 0x200);
int table_offs = gpu.gr[2];
@@ -452,34 +452,34 @@ WRITE16_MEMBER(atarisy4_state::gpu_w)
{
switch (offset)
{
- case 0x00: gpu.gr[0] = data; break;
- case 0x01: gpu.gr[1] = data; break;
- case 0x02: gpu.gr[2] = data; break;
- case 0x03: gpu.gr[3] = data; break;
- case 0x04: gpu.gr[4] = data; break;
- case 0x05: gpu.gr[5] = data; break;
- case 0x06: gpu.gr[6] = data; break;
- case 0x07: gpu.gr[7] = data; break;
-
- case 0x08: gpu.bcrw = data; break;
- case 0x09: gpu.bcrx = data; break;
- case 0x0a: gpu.bcry = data; break;
- case 0x0b: gpu.bcrz = data; break;
- case 0x0c: gpu.psrw = data; break;
- case 0x0d: gpu.psrx = data; break;
- case 0x0e: gpu.psry = data; break;
- case 0x0f: gpu.psrz = data; break;
-
- case 0x14: gpu.dpr = data; break;
- case 0x15: gpu.ctr = data; break;
- case 0x16: gpu.ifr = data; break;
+ case 0x00: gpu.gr[0] = data; break;
+ case 0x01: gpu.gr[1] = data; break;
+ case 0x02: gpu.gr[2] = data; break;
+ case 0x03: gpu.gr[3] = data; break;
+ case 0x04: gpu.gr[4] = data; break;
+ case 0x05: gpu.gr[5] = data; break;
+ case 0x06: gpu.gr[6] = data; break;
+ case 0x07: gpu.gr[7] = data; break;
+
+ case 0x08: gpu.bcrw = data; break;
+ case 0x09: gpu.bcrx = data; break;
+ case 0x0a: gpu.bcry = data; break;
+ case 0x0b: gpu.bcrz = data; break;
+ case 0x0c: gpu.psrw = data; break;
+ case 0x0d: gpu.psrx = data; break;
+ case 0x0e: gpu.psry = data; break;
+ case 0x0f: gpu.psrz = data; break;
+
+ case 0x14: gpu.dpr = data; break;
+ case 0x15: gpu.ctr = data; break;
+ case 0x16: gpu.ifr = data; break;
case 0x17:
{
gpu.ecr = data;
execute_gpu_command(machine());
break;
}
- case 0x1a: gpu.far = data; break;
+ case 0x1a: gpu.far = data; break;
case 0x20:
{
gpu.mcr = data;
@@ -490,8 +490,8 @@ WRITE16_MEMBER(atarisy4_state::gpu_w)
break;
}
- case 0x21: gpu.qlr = data; break;
- case 0x22: gpu.qar = data; break;
+ case 0x21: gpu.qlr = data; break;
+ case 0x22: gpu.qar = data; break;
}
}
@@ -501,17 +501,17 @@ READ16_MEMBER(atarisy4_state::gpu_r)
switch (offset)
{
- case 0x08: res = gpu.bcrw; break;
- case 0x09: res = gpu.bcrx; break;
- case 0x0a: res = gpu.bcry; break;
- case 0x0b: res = gpu.bcrz; break;
+ case 0x08: res = gpu.bcrw; break;
+ case 0x09: res = gpu.bcrx; break;
+ case 0x0a: res = gpu.bcry; break;
+ case 0x0b: res = gpu.bcrz; break;
- case 0x20: res = gpu.mcr; break;
+ case 0x20: res = gpu.mcr; break;
- case 0x400: res = 5; break; // TODO!
- case 0x420: res = 5; break;
+ case 0x400: res = 5; break; // TODO!
+ case 0x420: res = 5; break;
- default: logerror("GPU_R[%x]\n", offset);
+ default: logerror("GPU_R[%x]\n", offset);
}
return res;
@@ -807,7 +807,7 @@ INLINE UINT8 hex_to_ascii(UINT8 in)
void load_ldafile(address_space &space, const UINT8 *file)
{
-#define READ_CHAR() file[i++]
+#define READ_CHAR() file[i++]
int i = 0;
while (true)
@@ -861,7 +861,7 @@ void load_ldafile(address_space &space, const UINT8 *file)
/* Load memory space with data from a Tektronix-Extended HEX file */
void load_hexfile(address_space &space, const UINT8 *file)
{
-#define READ_HEX_CHAR() hex_to_ascii(file[i++])
+#define READ_HEX_CHAR() hex_to_ascii(file[i++])
UINT32 i = 0;
UINT32 line = 1;
diff --git a/src/mame/drivers/ataxx.c b/src/mame/drivers/ataxx.c
index 072352b9daa..477ea873849 100644
--- a/src/mame/drivers/ataxx.c
+++ b/src/mame/drivers/ataxx.c
@@ -34,8 +34,8 @@
#include "sound/2151intf.h"
-#define MASTER_CLOCK XTAL_28_63636MHz
-#define MCU_CLOCK XTAL_16MHz
+#define MASTER_CLOCK XTAL_28_63636MHz
+#define MCU_CLOCK XTAL_16MHz
@@ -99,42 +99,42 @@ ADDRESS_MAP_END
*************************************/
/* Helps document the input ports. */
-#define IPT_SLAVEHALT IPT_SPECIAL
+#define IPT_SLAVEHALT IPT_SPECIAL
static INPUT_PORTS_START( ataxx )
- PORT_START("IN0") /* 0xF6 */
+ PORT_START("IN0") /* 0xF6 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* huh? affects trackball movement */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* huh? affects trackball movement */
PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_START("IN1") /* 0xF7 */
+ PORT_START("IN1") /* 0xF7 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SLAVEHALT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN2") /* 0x20 */
+ PORT_START("IN2") /* 0x20 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AN0") /* 0x00 - analog X */
+ PORT_START("AN0") /* 0x00 - analog X */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
- PORT_START("AN1") /* 0x01 - analog Y */
+ PORT_START("AN1") /* 0x01 - analog Y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
- PORT_START("AN2") /* 0x02 - analog X */
+ PORT_START("AN2") /* 0x02 - analog X */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
- PORT_START("AN3") /* 0x03 - analog Y */
+ PORT_START("AN3") /* 0x03 - analog Y */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
INPUT_PORTS_END
static INPUT_PORTS_START( wsf )
- PORT_START("IN0") /* 0xF6 */
+ PORT_START("IN0") /* 0xF6 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -144,18 +144,18 @@ static INPUT_PORTS_START( wsf )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4)
- PORT_START("IN1") /* 0xF7 */
+ PORT_START("IN1") /* 0xF7 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SLAVEHALT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN2") /* 0x20 */
+ PORT_START("IN2") /* 0x20 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE_NO_TOGGLE( 0x04, IP_ACTIVE_LOW )
PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P1_P2") /* 0x0D */
+ PORT_START("P1_P2") /* 0x0D */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
@@ -165,7 +165,7 @@ static INPUT_PORTS_START( wsf )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
- PORT_START("P3_P4") /* 0x0E */
+ PORT_START("P3_P4") /* 0x0E */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(4)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(4)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(4)
@@ -175,7 +175,7 @@ static INPUT_PORTS_START( wsf )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(3)
- PORT_START("BUTTONS") /* 0x0F */
+ PORT_START("BUTTONS") /* 0x0F */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
@@ -188,7 +188,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( indyheat )
- PORT_START("IN0") /* 0xF6 */
+ PORT_START("IN0") /* 0xF6 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
@@ -196,37 +196,37 @@ static INPUT_PORTS_START( indyheat )
PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
- PORT_START("IN1") /* 0xF7 */
+ PORT_START("IN1") /* 0xF7 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SLAVEHALT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN2") /* 0x20 */
+ PORT_START("IN2") /* 0x20 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AN0") /* Analog wheel 1 */
+ PORT_START("AN0") /* Analog wheel 1 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
- PORT_START("AN1") /* Analog wheel 2 */
+ PORT_START("AN1") /* Analog wheel 2 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
- PORT_START("AN2") /* Analog wheel 3 */
+ PORT_START("AN2") /* Analog wheel 3 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(3)
- PORT_START("AN3") /* Analog pedal 1 */
+ PORT_START("AN3") /* Analog pedal 1 */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
- PORT_START("AN4") /* Analog pedal 2 */
+ PORT_START("AN4") /* Analog pedal 2 */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
- PORT_START("AN5") /* Analog pedal 3 */
+ PORT_START("AN5") /* Analog pedal 3 */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(3)
- PORT_START("P1") /* 0x0D */
+ PORT_START("P1") /* 0x0D */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P2") /* 0x0E */
+ PORT_START("P2") /* 0x0E */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P3") /* 0x0F */
+ PORT_START("P3") /* 0x0F */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
@@ -234,7 +234,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( brutforc )
- PORT_START("IN0") /* 0xF6 */
+ PORT_START("IN0") /* 0xF6 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
@@ -242,16 +242,16 @@ static INPUT_PORTS_START( brutforc )
PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
- PORT_START("IN1") /* 0xF7 */
+ PORT_START("IN1") /* 0xF7 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SLAVEHALT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN2") /* 0x20 */
+ PORT_START("IN2") /* 0x20 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P1") /* 0x0E */
+ PORT_START("P1") /* 0x0E */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
@@ -261,7 +261,7 @@ static INPUT_PORTS_START( brutforc )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P2") /* 0x0D */
+ PORT_START("P2") /* 0x0D */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
@@ -271,7 +271,7 @@ static INPUT_PORTS_START( brutforc )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("P3") /* 0x0F */
+ PORT_START("P3") /* 0x0F */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(3)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(3)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3)
@@ -387,7 +387,7 @@ ROM_START( ataxx )
ROM_LOAD( "e-302-31011-01.u103", 0xa0000, 0x20000, CRC(ed326164) SHA1(8706192f525ece200587cee7e7beb4a1975bf63e) )
ROM_REGION( 0x00001, "user1", ROMREGION_ERASEFF ) /* X-ROM (data used by main processor) */
- /* Empty / not used */
+ /* Empty / not used */
ROM_REGION16_BE( 0x100, "eeprom", 0 )
ROM_LOAD16_WORD( "eeprom-ataxx.bin", 0x0000, 0x0100, CRC(989cdb8c) SHA1(13b30a328e71a195960e98e50d1657a8b6860dcf) )
@@ -421,7 +421,7 @@ ROM_START( ataxxa )
ROM_LOAD( "e-302-31011-01.u103", 0xa0000, 0x20000, CRC(ed326164) SHA1(8706192f525ece200587cee7e7beb4a1975bf63e) )
ROM_REGION( 0x00001, "user1", ROMREGION_ERASEFF ) /* X-ROM (data used by main processor) */
- /* Empty / not used */
+ /* Empty / not used */
ROM_REGION16_BE( 0x100, "eeprom", 0 )
ROM_LOAD16_WORD( "eeprom-ataxx.bin", 0x0000, 0x0100, CRC(989cdb8c) SHA1(13b30a328e71a195960e98e50d1657a8b6860dcf) )
@@ -454,7 +454,7 @@ ROM_START( ataxxe )
ROM_LOAD( "e-302-31011-01.u103", 0xa0000, 0x20000, CRC(ed326164) SHA1(8706192f525ece200587cee7e7beb4a1975bf63e) )
ROM_REGION( 0x00001, "user1", ROMREGION_ERASEFF ) /* X-ROM (data used by main processor) */
- /* Empty / not used */
+ /* Empty / not used */
ROM_REGION16_BE( 0x100, "eeprom", 0 )
ROM_LOAD16_WORD( "eeprom-ataxxe.bin", 0x0000, 0x0100, CRC(8df1dee1) SHA1(876c5d5d506c31fdf4c3e611a1869b50ceadc6fd) )
@@ -488,7 +488,7 @@ ROM_START( ataxxj )
ROM_LOAD( "e-302-31011-01.u103", 0xa0000, 0x20000, CRC(ed326164) SHA1(8706192f525ece200587cee7e7beb4a1975bf63e) )
ROM_REGION( 0x00001, "user1", ROMREGION_ERASEFF ) /* X-ROM (data used by main processor) */
- /* Empty / not used */
+ /* Empty / not used */
ROM_REGION16_BE( 0x100, "eeprom", 0 )
ROM_LOAD16_WORD( "eeprom-ataxxj.bin", 0x0000, 0x0100, CRC(8df1dee1) SHA1(876c5d5d506c31fdf4c3e611a1869b50ceadc6fd) )
diff --git a/src/mame/drivers/atetris.c b/src/mame/drivers/atetris.c
index a257bce970a..a434d909e80 100644
--- a/src/mame/drivers/atetris.c
+++ b/src/mame/drivers/atetris.c
@@ -56,8 +56,8 @@
#include "machine/nvram.h"
-#define MASTER_CLOCK XTAL_14_31818MHz
-#define BOOTLEG_CLOCK XTAL_14_7456MHz
+#define MASTER_CLOCK XTAL_14_31818MHz
+#define BOOTLEG_CLOCK XTAL_14_7456MHz
/*************************************
@@ -244,14 +244,14 @@ static INPUT_PORTS_START( atetris )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 )
- PORT_DIPNAME( 0x04, 0x00, "Freeze" ) PORT_DIPLOCATION("50H:!4")
+ PORT_DIPNAME( 0x04, 0x00, "Freeze" ) PORT_DIPLOCATION("50H:!4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x00, "Freeze Step" ) PORT_DIPLOCATION("50H:!3")
+ PORT_DIPNAME( 0x08, 0x00, "Freeze Step" ) PORT_DIPLOCATION("50H:!3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "50H:!2" ) /* Listed As "SPARE2 (Unused)" */
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "50H:!1" ) /* Listed As "SPARE1 (Unused)" */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "50H:!2" ) /* Listed As "SPARE2 (Unused)" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "50H:!1" ) /* Listed As "SPARE1 (Unused)" */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
@@ -272,7 +272,7 @@ static INPUT_PORTS_START( atetrisc )
PORT_INCLUDE( atetris )
PORT_MODIFY("IN0")
- PORT_DIPNAME( 0x20, 0x00, "Flip Controls" ) PORT_DIPLOCATION("50H:!1")
+ PORT_DIPNAME( 0x20, 0x00, "Flip Controls" ) PORT_DIPLOCATION("50H:!1")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
INPUT_PORTS_END
@@ -287,13 +287,13 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8,
- RGN_FRAC(1,1),
- 4,
- { 0,1,2,3 },
- { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4},
- { 0*4*8, 1*4*8, 2*4*8, 3*4*8, 4*4*8, 5*4*8, 6*4*8, 7*4*8},
- 8*8*4
+ 8,8,
+ RGN_FRAC(1,1),
+ 4,
+ { 0,1,2,3 },
+ { 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4},
+ { 0*4*8, 1*4*8, 2*4*8, 3*4*8, 4*4*8, 5*4*8, 6*4*8, 7*4*8},
+ 8*8*4
};
@@ -328,7 +328,7 @@ static const pokey_interface pokey_interface_2 =
static const sn76496_config psg_intf =
{
- DEVCB_NULL
+ DEVCB_NULL
};
/*************************************
diff --git a/src/mame/drivers/atlantis.c b/src/mame/drivers/atlantis.c
index 4c555fe1f9f..e760b2b3995 100644
--- a/src/mame/drivers/atlantis.c
+++ b/src/mame/drivers/atlantis.c
@@ -74,8 +74,8 @@ void atlantis_state::machine_start()
void atlantis_state::machine_reset()
{
- dcs_reset_w(machine(), 1);
- dcs_reset_w(machine(), 0);
+ dcs_reset_w(machine(), 1);
+ dcs_reset_w(machine(), 0);
}
@@ -101,10 +101,10 @@ UINT32 atlantis_state::screen_update_mwskins(screen_device &screen, bitmap_ind16
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, atlantis_state )
ADDRESS_MAP_UNMAP_HIGH
- AM_RANGE(0x00000000, 0x007fffff) AM_RAM // 8 MB main RAM
- // 04000000 - PCI slot (ActionTec modem, ROM dump TBD)
- // 08000000 - PLX9050 chip (Zeus interface?)
- // 0F000000 - VR4373 ("Nile 3") registers
+ AM_RANGE(0x00000000, 0x007fffff) AM_RAM // 8 MB main RAM
+ // 04000000 - PCI slot (ActionTec modem, ROM dump TBD)
+ // 08000000 - PLX9050 chip (Zeus interface?)
+ // 0F000000 - VR4373 ("Nile 3") registers
AM_RANGE(0x1fc00000, 0x1fc7ffff) AM_ROM AM_REGION("user1", 0) AM_SHARE("rombase")
ADDRESS_MAP_END
@@ -128,8 +128,8 @@ INPUT_PORTS_END
static const mips3_config r4310_config =
{
- 16384, /* code cache size */
- 16384 /* data cache size */
+ 16384, /* code cache size */
+ 16384 /* data cache size */
};
static MACHINE_CONFIG_START( mwskins, atlantis_state )
@@ -168,24 +168,24 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( mwskins )
- ROM_REGION32_LE( 0x80000, "user1", 0 ) /* 512k for R4310 code */
- ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )
+ ROM_REGION32_LE( 0x80000, "user1", 0 ) /* 512k for R4310 code */
+ ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )
DISK_REGION( "drive_0" )
DISK_IMAGE( "mwskins", 0, SHA1(5cb293a6fdb2478293f48ddfc93cdd018acb2bb5) )
ROM_END
ROM_START( mwskinsa )
- ROM_REGION32_LE( 0x80000, "user1", 0 ) /* 512k for R4310 code */
- ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )
+ ROM_REGION32_LE( 0x80000, "user1", 0 ) /* 512k for R4310 code */
+ ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )
DISK_REGION( "drive_0" )
DISK_IMAGE( "mwskinsa", 0, SHA1(72497917b31156eb11a46bbcc6f22a254dcec044) )
ROM_END
ROM_START( mwskinso )
- ROM_REGION32_LE( 0x80000, "user1", 0 ) /* 512k for R4310 code */
- ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )
+ ROM_REGION32_LE( 0x80000, "user1", 0 ) /* 512k for R4310 code */
+ ROM_LOAD( "skins_game_u4_boot_1.00.u4", 0x000000, 0x080000, CRC(0fe87720) SHA1(4b24abbe662a2d7b61e6a3f079e28b73605ba19f) )
DISK_REGION( "drive_0" )
DISK_IMAGE( "mwskins104", 0, SHA1(6917f66718999c144c854795c5856bf5659b85fa) )
@@ -211,4 +211,3 @@ DRIVER_INIT_MEMBER(atlantis_state,mwskins)
GAME( 2000, mwskins, 0, mwskins, mwskins, atlantis_state, mwskins, ROT0, "Midway", "Skins Game (1.06)", GAME_NOT_WORKING | GAME_NO_SOUND )
GAME( 2000, mwskinsa, mwskins, mwskins, mwskins, atlantis_state, mwskins, ROT0, "Midway", "Skins Game (1.06, alt)", GAME_NOT_WORKING | GAME_NO_SOUND )
GAME( 2000, mwskinso, mwskins, mwskins, mwskins, atlantis_state, mwskins, ROT0, "Midway", "Skins Game (1.04)", GAME_NOT_WORKING | GAME_NO_SOUND )
-
diff --git a/src/mame/drivers/atronic.c b/src/mame/drivers/atronic.c
index c29e473b38c..6c78d1b283a 100644
--- a/src/mame/drivers/atronic.c
+++ b/src/mame/drivers/atronic.c
@@ -21,7 +21,7 @@ class atronic_state : public driver_device
public:
atronic_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@@ -811,33 +811,33 @@ ROM_END
-GAME( 1999, atronic, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Atronic SetUp/Clear Chips (Russia, set 1)", GAME_IS_SKELETON)
+GAME( 1999, atronic, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Atronic SetUp/Clear Chips (Russia, set 1)", GAME_IS_SKELETON)
GAME( 1999, atronica, atronic, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Atronic SetUp/Clear Chips (Russia, set 2)", GAME_IS_SKELETON)
-GAME( 2002, atlantca, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Atlantica (Russia) (Atronic) (set 1)", GAME_IS_SKELETON)
-GAME( 2002, atlantcaa, atlantca, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Atlantica (Russia) (Atronic) (set 2)", GAME_IS_SKELETON)
-GAME( 2002, baboshka, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Baboshka (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, cfblue, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Crazy Fruits Blue (Russia) (Atronic) (set 1)", GAME_IS_SKELETON)
-GAME( 2002, cfbluea, cfblue, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Crazy Fruits Blue (Russia) (Atronic) (set 2)", GAME_IS_SKELETON)
-GAME( 2002, cfgreen, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Crazy Fruits Green (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, chicken, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Chicken (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, aclown, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Clown (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, goldglen, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Golden Glenn (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, iccash, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "I C Cash (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, shpinxii, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Sphinx II (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, bearnec, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Bear Necessities (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, beachpt, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Beach Patrol (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, beetleup, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Beetles Unplugged (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, abigchs, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Big Cheese (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, bigblue, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Big Blue (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, castaway, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Castaway (Russia) (Atronic) (set 1)", GAME_IS_SKELETON)
-GAME( 2002, castawaya, castaway, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Castaway (Russia) (Atronic) (set 2)", GAME_IS_SKELETON)
-GAME( 2002, dncsprt, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Dancing Spirit (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, drmmake, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Dream Maker (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, goldcity, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Gold City (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, jumpjkpt, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Jumping Jackpots (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, mushmagi, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Mushroom Magic (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, santam, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Santa Maria (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, splmastr, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Spell Master (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, tajmah, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Tajmahal (Russia) (Atronic)", GAME_IS_SKELETON)
-GAME( 2002, 3wishrd, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Three Wishes Red (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, atlantca, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Atlantica (Russia) (Atronic) (set 1)", GAME_IS_SKELETON)
+GAME( 2002, atlantcaa, atlantca, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Atlantica (Russia) (Atronic) (set 2)", GAME_IS_SKELETON)
+GAME( 2002, baboshka, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Baboshka (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, cfblue, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Crazy Fruits Blue (Russia) (Atronic) (set 1)", GAME_IS_SKELETON)
+GAME( 2002, cfbluea, cfblue, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Crazy Fruits Blue (Russia) (Atronic) (set 2)", GAME_IS_SKELETON)
+GAME( 2002, cfgreen, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Crazy Fruits Green (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, chicken, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Chicken (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, aclown, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Clown (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, goldglen, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Golden Glenn (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, iccash, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "I C Cash (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, shpinxii, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Sphinx II (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, bearnec, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Bear Necessities (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, beachpt, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Beach Patrol (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, beetleup, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Beetles Unplugged (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, abigchs, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Big Cheese (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, bigblue, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Big Blue (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, castaway, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Castaway (Russia) (Atronic) (set 1)", GAME_IS_SKELETON)
+GAME( 2002, castawaya, castaway, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Castaway (Russia) (Atronic) (set 2)", GAME_IS_SKELETON)
+GAME( 2002, dncsprt, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Dancing Spirit (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, drmmake, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Dream Maker (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, goldcity, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Gold City (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, jumpjkpt, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Jumping Jackpots (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, mushmagi, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Mushroom Magic (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, santam, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Santa Maria (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, splmastr, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Spell Master (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, tajmah, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Tajmahal (Russia) (Atronic)", GAME_IS_SKELETON)
+GAME( 2002, 3wishrd, 0, atronic, atronic, driver_device, 0, ROT0, "Atronic", "Three Wishes Red (Russia) (Atronic)", GAME_IS_SKELETON)
diff --git a/src/mame/drivers/attckufo.c b/src/mame/drivers/attckufo.c
index 1cce3dd737a..83e79409df2 100644
--- a/src/mame/drivers/attckufo.c
+++ b/src/mame/drivers/attckufo.c
@@ -51,8 +51,8 @@ class attckufo_state : public driver_device
public:
attckufo_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_mos6560(*this, "mos6560") ,
+ m_maincpu(*this, "maincpu"),
+ m_mos6560(*this, "mos6560") ,
m_mainram(*this, "mainram"),
m_tileram(*this, "tileram"){ }
@@ -86,12 +86,12 @@ READ8_MEMBER(attckufo_state::attckufo_io_r)
WRITE8_MEMBER(attckufo_state::attckufo_io_w)
{
/*
- offset, data:
- 0 $00,$30
- 1 $00,$04
- 2 $00
- 3 $00,$04
- */
+ offset, data:
+ 0 $00,$30
+ 1 $00,$04
+ 2 $00
+ 3 $00,$04
+ */
}
READ8_MEMBER(attckufo_state::vic_videoram_r)
diff --git a/src/mame/drivers/avalnche.c b/src/mame/drivers/avalnche.c
index 905d9d6cbd2..17cf88ab2d0 100644
--- a/src/mame/drivers/avalnche.c
+++ b/src/mame/drivers/avalnche.c
@@ -153,14 +153,14 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( avalnche )
PORT_START("IN0")
- PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:4,3")
+ PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:4,3")
PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:2,1")
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:2,1")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x30, DEF_STR( German ) )
PORT_DIPSETTING( 0x20, DEF_STR( French ) )
@@ -171,16 +171,16 @@ static INPUT_PORTS_START( avalnche )
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
- PORT_DIPNAME( 0x04, 0x04, "Allow Extended Play" ) PORT_DIPLOCATION("SW:8")
+ PORT_DIPNAME( 0x04, 0x04, "Allow Extended Play" ) PORT_DIPLOCATION("SW:8")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x08, 0x00, "Lives/Extended Play" ) PORT_DIPLOCATION("SW:7")
+ PORT_DIPNAME( 0x08, 0x00, "Lives/Extended Play" ) PORT_DIPLOCATION("SW:7")
PORT_DIPSETTING( 0x00, "3/450 Points" )
PORT_DIPSETTING( 0x08, "5/750 Points" )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* SLAM */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* SLAM */
PORT_SERVICE( 0x20, IP_ACTIVE_HIGH)
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON1 ) /* Serve */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") /* VBLANK */
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON1 ) /* Serve */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") /* VBLANK */
PORT_START("PADDLE")
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x40, 0xb7) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_CENTERDELTA(0)
@@ -190,14 +190,14 @@ static INPUT_PORTS_START( cascade )
PORT_INCLUDE( avalnche )
PORT_MODIFY("IN0")
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:2,1")
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:2,1")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x30, DEF_STR( German ) )
PORT_DIPSETTING( 0x20, DEF_STR( French ) )
PORT_DIPSETTING( 0x10, DEF_STR( Italian ) )
PORT_MODIFY("IN1")
- PORT_DIPNAME( 0x08, 0x00, "Extended Play" ) PORT_DIPLOCATION("SW:7")
+ PORT_DIPNAME( 0x08, 0x00, "Extended Play" ) PORT_DIPLOCATION("SW:7")
PORT_DIPSETTING( 0x00, "1500 Points" )
PORT_DIPSETTING( 0x08, "2500 Points" )
INPUT_PORTS_END
@@ -206,14 +206,14 @@ static INPUT_PORTS_START( catch )
PORT_INCLUDE( avalnche )
PORT_MODIFY("IN0")
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:2,1")
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:2,1")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x30, DEF_STR( German ) )
PORT_DIPSETTING( 0x20, DEF_STR( French ) )
PORT_DIPSETTING( 0x10, DEF_STR( English ) )
PORT_MODIFY("IN1")
- PORT_DIPNAME( 0x0c, 0x00, "Extended Play" ) PORT_DIPLOCATION("SW:8,7")
+ PORT_DIPNAME( 0x0c, 0x00, "Extended Play" ) PORT_DIPLOCATION("SW:8,7")
PORT_DIPSETTING( 0x00, "600 Points" )
PORT_DIPSETTING( 0x04, "850 Points" )
PORT_DIPSETTING( 0x08, "1100 Points" )
@@ -246,7 +246,7 @@ void avalnche_state::machine_reset()
static MACHINE_CONFIG_START( avalnche, avalnche_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6502,MASTER_CLOCK/16) /* clock input is the "2H" signal divided by two */
+ MCFG_CPU_ADD("maincpu", M6502,MASTER_CLOCK/16) /* clock input is the "2H" signal divided by two */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_PERIODIC_INT_DRIVER(avalnche_state, nmi_line_pulse, 8*60)
@@ -288,33 +288,33 @@ MACHINE_CONFIG_END
ROM_START( avalnche )
ROM_REGION( 0x8000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "30612.d2", 0x6800, 0x0800, CRC(3f975171) SHA1(afe680865da97824f1ebade4c7a2ba5d7ee2cbab) )
- ROM_LOAD_NIB_LOW ( "30615.d3", 0x6800, 0x0800, CRC(3e1a86b4) SHA1(3ff4cffea5b7a32231c0996473158f24c3bbe107) )
- ROM_LOAD_NIB_HIGH( "30613.e2", 0x7000, 0x0800, CRC(47a224d3) SHA1(9feb7444a2e5a3d90a4fe78ae5d23c3a5039bfaa) )
- ROM_LOAD_NIB_LOW ( "30616.e3", 0x7000, 0x0800, CRC(f620f0f8) SHA1(7802b399b3469fc840796c3145b5f63781090956) )
- ROM_LOAD_NIB_HIGH( "30611.c2", 0x7800, 0x0800, CRC(0ad07f85) SHA1(5a1a873b14e63dbb69ee3686ba53f7ca831fe9d0) )
- ROM_LOAD_NIB_LOW ( "30614.c3", 0x7800, 0x0800, CRC(a12d5d64) SHA1(1647d7416bf9266d07f066d3797bda943e004d24) )
+ ROM_LOAD_NIB_HIGH( "30612.d2", 0x6800, 0x0800, CRC(3f975171) SHA1(afe680865da97824f1ebade4c7a2ba5d7ee2cbab) )
+ ROM_LOAD_NIB_LOW ( "30615.d3", 0x6800, 0x0800, CRC(3e1a86b4) SHA1(3ff4cffea5b7a32231c0996473158f24c3bbe107) )
+ ROM_LOAD_NIB_HIGH( "30613.e2", 0x7000, 0x0800, CRC(47a224d3) SHA1(9feb7444a2e5a3d90a4fe78ae5d23c3a5039bfaa) )
+ ROM_LOAD_NIB_LOW ( "30616.e3", 0x7000, 0x0800, CRC(f620f0f8) SHA1(7802b399b3469fc840796c3145b5f63781090956) )
+ ROM_LOAD_NIB_HIGH( "30611.c2", 0x7800, 0x0800, CRC(0ad07f85) SHA1(5a1a873b14e63dbb69ee3686ba53f7ca831fe9d0) )
+ ROM_LOAD_NIB_LOW ( "30614.c3", 0x7800, 0x0800, CRC(a12d5d64) SHA1(1647d7416bf9266d07f066d3797bda943e004d24) )
ROM_END
ROM_START( cascade )
ROM_REGION( 0x8000, "maincpu", 0 )
- ROM_LOAD( "10005.1a", 0x6800, 0x0400, CRC(54774594) SHA1(03e013b563675fb8a30bd69836466a353db9bfc7) )
- ROM_LOAD( "10005.1b", 0x6c00, 0x0400, CRC(fd9575ad) SHA1(ed0a1343d3c0456d458561256d5ee966b6c213f4) )
- ROM_LOAD( "10005.2a", 0x7000, 0x0400, CRC(12857c75) SHA1(e42fdee70bd19d6f60e88f106a49dbbd68c591cd) )
- ROM_LOAD( "10005.2b", 0x7400, 0x0400, CRC(26361698) SHA1(587cc6f0dc068a74aac41c2cb3336d70d2dd91e5) )
- ROM_LOAD( "10005.3a", 0x7800, 0x0400, CRC(d1f422ff) SHA1(65ecbf0a22ba340d6a1768ed029030bac9c19e0f) )
- ROM_LOAD( "10005.3b", 0x7c00, 0x0400, CRC(bb243d96) SHA1(3a387a8c50cd9b0db37d12b94dc9e260892dbf21) )
+ ROM_LOAD( "10005.1a", 0x6800, 0x0400, CRC(54774594) SHA1(03e013b563675fb8a30bd69836466a353db9bfc7) )
+ ROM_LOAD( "10005.1b", 0x6c00, 0x0400, CRC(fd9575ad) SHA1(ed0a1343d3c0456d458561256d5ee966b6c213f4) )
+ ROM_LOAD( "10005.2a", 0x7000, 0x0400, CRC(12857c75) SHA1(e42fdee70bd19d6f60e88f106a49dbbd68c591cd) )
+ ROM_LOAD( "10005.2b", 0x7400, 0x0400, CRC(26361698) SHA1(587cc6f0dc068a74aac41c2cb3336d70d2dd91e5) )
+ ROM_LOAD( "10005.3a", 0x7800, 0x0400, CRC(d1f422ff) SHA1(65ecbf0a22ba340d6a1768ed029030bac9c19e0f) )
+ ROM_LOAD( "10005.3b", 0x7c00, 0x0400, CRC(bb243d96) SHA1(3a387a8c50cd9b0db37d12b94dc9e260892dbf21) )
ROM_END
ROM_START( catchp )
ROM_REGION( 0x8000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "catch.e2", 0x7000, 0x0800, CRC(ce1911ef) SHA1(1237b3e2c69342d2cccc8a3a9303f1b39b66e927) ) // n82s185
- ROM_LOAD_NIB_LOW ( "catch.e3", 0x7000, 0x0800, CRC(32bf254a) SHA1(22920d43beb2f21c0862c3675a4ee3e230d889b2) ) // "
- ROM_LOAD_NIB_HIGH( "catch.d2", 0x7800, 0x0800, CRC(404a9551) SHA1(1e966ebb6e08e86e858146fe6c070e96b80171f8) ) // "
- ROM_LOAD_NIB_LOW ( "catch.d3", 0x7800, 0x0800, CRC(fde4dd73) SHA1(bc6fbfed8099865bef35b4c3061c7f5541bcec23) ) // "
+ ROM_LOAD_NIB_HIGH( "catch.e2", 0x7000, 0x0800, CRC(ce1911ef) SHA1(1237b3e2c69342d2cccc8a3a9303f1b39b66e927) ) // n82s185
+ ROM_LOAD_NIB_LOW ( "catch.e3", 0x7000, 0x0800, CRC(32bf254a) SHA1(22920d43beb2f21c0862c3675a4ee3e230d889b2) ) // "
+ ROM_LOAD_NIB_HIGH( "catch.d2", 0x7800, 0x0800, CRC(404a9551) SHA1(1e966ebb6e08e86e858146fe6c070e96b80171f8) ) // "
+ ROM_LOAD_NIB_LOW ( "catch.d3", 0x7800, 0x0800, CRC(fde4dd73) SHA1(bc6fbfed8099865bef35b4c3061c7f5541bcec23) ) // "
ROM_REGION( 0x0200, "user1", 0 ) // ?
- ROM_LOAD( "catch.k3", 0x0000, 0x0200, CRC(a0ffc6fc) SHA1(b5c1a170acbf490786ed6ecc582712c3d2a97f37) ) // n82s129
+ ROM_LOAD( "catch.k3", 0x0000, 0x0200, CRC(a0ffc6fc) SHA1(b5c1a170acbf490786ed6ecc582712c3d2a97f37) ) // n82s129
ROM_END
diff --git a/src/mame/drivers/avt.c b/src/mame/drivers/avt.c
index 2033d641144..af65ffa1744 100644
--- a/src/mame/drivers/avt.c
+++ b/src/mame/drivers/avt.c
@@ -403,9 +403,9 @@
************************************************************************************************/
-#define MASTER_CLOCK XTAL_10MHz /* unknown */
-#define CPU_CLOCK MASTER_CLOCK/4 /* guess... seems accurate */
-#define CRTC_CLOCK MASTER_CLOCK/16 /* it gives 59.410646 fps with current settings */
+#define MASTER_CLOCK XTAL_10MHz /* unknown */
+#define CPU_CLOCK MASTER_CLOCK/4 /* guess... seems accurate */
+#define CRTC_CLOCK MASTER_CLOCK/16 /* it gives 59.410646 fps with current settings */
#include "emu.h"
#include "cpu/z80/z80.h"
@@ -448,22 +448,22 @@ public:
INTERRUPT_GEN_MEMBER(avt_vblank_irq);
};
-#define mc6845_h_char_total (state->m_crtc_vreg[0])
-#define mc6845_h_display (m_crtc_vreg[1])
-#define mc6845_h_sync_pos (state->m_crtc_vreg[2])
-#define mc6845_sync_width (state->m_crtc_vreg[3])
-#define mc6845_v_char_total (state->m_crtc_vreg[4])
-#define mc6845_v_total_adj (state->m_crtc_vreg[5])
-#define mc6845_v_display (m_crtc_vreg[6])
-#define mc6845_v_sync_pos (state->m_crtc_vreg[7])
-#define mc6845_mode_ctrl (state->m_crtc_vreg[8])
-#define mc6845_tile_height (state->m_crtc_vreg[9]+1)
-#define mc6845_cursor_y_start (state->m_crtc_vreg[0x0a])
-#define mc6845_cursor_y_end (state->m_crtc_vreg[0x0b])
-#define mc6845_start_addr (((state->m_crtc_vreg[0x0c]<<8) & 0x3f00) | (state->m_crtc_vreg[0x0d] & 0xff))
-#define mc6845_cursor_addr (((state->m_crtc_vreg[0x0e]<<8) & 0x3f00) | (state->m_crtc_vreg[0x0f] & 0xff))
-#define mc6845_light_pen_addr (((state->m_crtc_vreg[0x10]<<8) & 0x3f00) | (state->m_crtc_vreg[0x11] & 0xff))
-#define mc6845_update_addr (((state->m_crtc_vreg[0x12]<<8) & 0x3f00) | (state->m_crtc_vreg[0x13] & 0xff))
+#define mc6845_h_char_total (state->m_crtc_vreg[0])
+#define mc6845_h_display (m_crtc_vreg[1])
+#define mc6845_h_sync_pos (state->m_crtc_vreg[2])
+#define mc6845_sync_width (state->m_crtc_vreg[3])
+#define mc6845_v_char_total (state->m_crtc_vreg[4])
+#define mc6845_v_total_adj (state->m_crtc_vreg[5])
+#define mc6845_v_display (m_crtc_vreg[6])
+#define mc6845_v_sync_pos (state->m_crtc_vreg[7])
+#define mc6845_mode_ctrl (state->m_crtc_vreg[8])
+#define mc6845_tile_height (state->m_crtc_vreg[9]+1)
+#define mc6845_cursor_y_start (state->m_crtc_vreg[0x0a])
+#define mc6845_cursor_y_end (state->m_crtc_vreg[0x0b])
+#define mc6845_start_addr (((state->m_crtc_vreg[0x0c]<<8) & 0x3f00) | (state->m_crtc_vreg[0x0d] & 0xff))
+#define mc6845_cursor_addr (((state->m_crtc_vreg[0x0e]<<8) & 0x3f00) | (state->m_crtc_vreg[0x0f] & 0xff))
+#define mc6845_light_pen_addr (((state->m_crtc_vreg[0x10]<<8) & 0x3f00) | (state->m_crtc_vreg[0x11] & 0xff))
+#define mc6845_update_addr (((state->m_crtc_vreg[0x12]<<8) & 0x3f00) | (state->m_crtc_vreg[0x13] & 0xff))
/*********************************************
@@ -576,7 +576,7 @@ void avt_state::palette_init()
/* hack to switch cyan->magenta for highlighted background */
if (j == 0x40)
- palette_set_color(machine(), j, MAKE_RGB(g, r, b)); // Why this one has R-G swapped?...
+ palette_set_color(machine(), j, MAKE_RGB(g, r, b)); // Why this one has R-G swapped?...
else
palette_set_color(machine(), j, MAKE_RGB(r, g, b));
}
@@ -632,8 +632,8 @@ static ADDRESS_MAP_START( avt_portmap, AS_IO, 8, avt_state )
// AM_RANGE(0x08, 0x0b) unk, maybe IO
// AM_RANGE(0x08, 0x08) AM_READ_PORT("IN2")
// AM_RANGE(0x09, 0x09) AM_READ_PORT("IN3")
- AM_RANGE(0x21, 0x21) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w) /* AY8910 data */
- AM_RANGE(0x23, 0x23) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_w) /* AY8910 control */
+ AM_RANGE(0x21, 0x21) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w) /* AY8910 data */
+ AM_RANGE(0x23, 0x23) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_w) /* AY8910 control */
AM_RANGE(0x28, 0x28) AM_WRITE(avt_6845_address_w)
AM_RANGE(0x29, 0x29) AM_READWRITE(avt_6845_data_r,avt_6845_data_w)
ADDRESS_MAP_END
@@ -849,16 +849,16 @@ GFXDECODE_END
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
@@ -891,7 +891,7 @@ INTERRUPT_GEN_MEMBER(avt_state::avt_vblank_irq)
static MACHINE_CONFIG_START( avt, avt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) /* guess */
+ MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) /* guess */
MCFG_CPU_PROGRAM_MAP(avt_map)
MCFG_CPU_IO_MAP(avt_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", avt_state, avt_vblank_irq)
@@ -901,7 +901,7 @@ static MACHINE_CONFIG_START( avt, avt_state )
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(32*8, 32*8)
- MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) /* 240x224 (through CRTC) */
+ MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 32*8-1) /* 240x224 (through CRTC) */
MCFG_SCREEN_UPDATE_DRIVER(avt_state, screen_update_avt)
MCFG_GFXDECODE(avt)
@@ -909,11 +909,11 @@ static MACHINE_CONFIG_START( avt, avt_state )
MCFG_PALETTE_LENGTH(8*16)
- MCFG_MC6845_ADD("crtc", MC6845, CRTC_CLOCK, mc6845_intf) /* guess */
+ MCFG_MC6845_ADD("crtc", MC6845, CRTC_CLOCK, mc6845_intf) /* guess */
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("aysnd", AY8910, CPU_CLOCK/2) /* 1.25 MHz.?? */
+ MCFG_SOUND_ADD("aysnd", AY8910, CPU_CLOCK/2) /* 1.25 MHz.?? */
MCFG_SOUND_CONFIG(ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00)
MACHINE_CONFIG_END
@@ -963,7 +963,7 @@ ROM_START( avtbingo )
ROM_REGION( 0x0400, "proms", 0 )
ROM_LOAD( "bingo.avt", 0x0000, 0x0200, CRC(c1a2ecd9) SHA1(21c7a2599e48fa1efccd4f46cf1c34888add2087) )
- ROM_LOAD( "avtbingo.u34", 0x0200, 0x0200, CRC(9454c3de) SHA1(df05f24e607b7494856e627c9f995ffa0cc043f7) ) /* unknown */
+ ROM_LOAD( "avtbingo.u34", 0x0200, 0x0200, CRC(9454c3de) SHA1(df05f24e607b7494856e627c9f995ffa0cc043f7) ) /* unknown */
ROM_END
ROM_START( avtnfl )
@@ -973,8 +973,8 @@ ROM_START( avtnfl )
ROM_LOAD( "u40-14.33", 0x4000, 0x2000, CRC(205910dd) SHA1(37fee06926e4dcd89ec6390b4914a852f12a9e25) )
/* GFX from Symbols for debugging purposes.
- Original graphics are missing.
- */
+ Original graphics are missing.
+ */
ROM_REGION( 0x6000, "gfx1", 0 )
ROM_LOAD( "avtnfl.blu", 0x0000, 0x2000, BAD_DUMP CRC(ee07339b) SHA1(260ac4739c90efa60597bf815d12fb96cf5391ed) )
ROM_LOAD( "avtnfl.grn", 0x2000, 0x2000, BAD_DUMP CRC(1df023ac) SHA1(1919ddb835d525fd1843326de939af74693fc88a) )
diff --git a/src/mame/drivers/aztarac.c b/src/mame/drivers/aztarac.c
index 1e28e82b395..8685378abad 100644
--- a/src/mame/drivers/aztarac.c
+++ b/src/mame/drivers/aztarac.c
@@ -63,8 +63,8 @@ READ16_MEMBER(aztarac_state::nvram_r)
READ16_MEMBER(aztarac_state::joystick_r)
{
- return (((ioport("STICKZ")->read() - 0xf) << 8) |
- ((ioport("STICKY")->read() - 0xf) & 0xff));
+ return (((ioport("STICKZ")->read() - 0xf) << 8) |
+ ((ioport("STICKY")->read() - 0xf) & 0xff));
}
diff --git a/src/mame/drivers/backfire.c b/src/mame/drivers/backfire.c
index 9e3473c2bc0..c9a4ebe0b2a 100644
--- a/src/mame/drivers/backfire.c
+++ b/src/mame/drivers/backfire.c
@@ -383,7 +383,7 @@ static const gfx_layout charlayout =
{ RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
- 16*8 /* every char takes 8 consecutive bytes */
+ 16*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout spritelayout =
@@ -414,12 +414,12 @@ static const gfx_layout tilelayout =
static GFXDECODE_START( backfire )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 128 ) /* Characters 8x8 */
- GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 128 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx2", 0, charlayout, 0, 128 ) /* Characters 8x8 */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 128 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x200, 32 ) /* Sprites 16x16 (screen 1) */
- GFXDECODE_ENTRY( "gfx4", 0, spritelayout, 0x600, 32 ) /* Sprites 16x16 (screen 2) */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 128 ) /* Characters 8x8 */
+ GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 128 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx2", 0, charlayout, 0, 128 ) /* Characters 8x8 */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 128 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x200, 32 ) /* Sprites 16x16 (screen 1) */
+ GFXDECODE_ENTRY( "gfx4", 0, spritelayout, 0x600, 32 ) /* Sprites 16x16 (screen 2) */
GFXDECODE_END
@@ -453,9 +453,9 @@ static const deco16ic_interface backfire_deco16ic_tilegen1_intf =
{
"lscreen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0x00, 0x40, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
backfire_bank_callback,
backfire_bank_callback,
0,1
@@ -465,9 +465,9 @@ static const deco16ic_interface backfire_deco16ic_tilegen2_intf =
{
"lscreen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0x10, 0x50, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
backfire_bank_callback,
backfire_bank_callback,
2,3
@@ -501,7 +501,7 @@ static MACHINE_CONFIG_START( backfire, backfire_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", ARM, 28000000/4) /* Unconfirmed */
MCFG_CPU_PROGRAM_MAP(backfire_map)
- MCFG_CPU_VBLANK_INT_DRIVER("lscreen", backfire_state, deco32_vbl_interrupt) /* or is it "rscreen?" */
+ MCFG_CPU_VBLANK_INT_DRIVER("lscreen", backfire_state, deco32_vbl_interrupt) /* or is it "rscreen?" */
MCFG_EEPROM_93C46_ADD("eeprom")
@@ -681,11 +681,11 @@ static void descramble_sound( running_machine &machine )
UINT32 addr;
addr = BITSWAP24 (x,23,22,21,0, 20,
- 19,18,17,16,
- 15,14,13,12,
- 11,10,9, 8,
- 7, 6, 5, 4,
- 3, 2, 1 );
+ 19,18,17,16,
+ 15,14,13,12,
+ 11,10,9, 8,
+ 7, 6, 5, 4,
+ 3, 2, 1 );
buf1[addr] = rom[x];
}
diff --git a/src/mame/drivers/badlands.c b/src/mame/drivers/badlands.c
index ee63ca129d3..a4707abeca9 100644
--- a/src/mame/drivers/badlands.c
+++ b/src/mame/drivers/badlands.c
@@ -279,25 +279,25 @@ READ8_MEMBER(badlands_state::audio_io_r)
switch (offset & 0x206)
{
- case 0x000: /* n/c */
+ case 0x000: /* n/c */
logerror("audio_io_r: Unknown read at %04X\n", offset & 0x206);
break;
- case 0x002: /* /RDP */
+ case 0x002: /* /RDP */
result = m6502_sound_r(space, offset);
break;
- case 0x004: /* /RDIO */
+ case 0x004: /* /RDIO */
/*
- 0x80 = self test
- 0x40 = NMI line state (active low)
- 0x20 = sound output full
- 0x10 = self test
- 0x08 = +5V
- 0x04 = +5V
- 0x02 = coin 2
- 0x01 = coin 1
- */
+ 0x80 = self test
+ 0x40 = NMI line state (active low)
+ 0x20 = sound output full
+ 0x10 = self test
+ 0x08 = +5V
+ 0x04 = +5V
+ 0x02 = coin 2
+ 0x01 = coin 1
+ */
result = ioport("AUDIO")->read();
if (!(ioport("FE4000")->read() & 0x0080)) result ^= 0x90;
if (m_cpu_to_sound_ready) result ^= 0x40;
@@ -305,14 +305,14 @@ READ8_MEMBER(badlands_state::audio_io_r)
result ^= 0x10;
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* /VOICE */
- case 0x202: /* /WRP */
- case 0x204: /* /WRIO */
- case 0x206: /* /MIX */
+ case 0x200: /* /VOICE */
+ case 0x202: /* /WRP */
+ case 0x204: /* /WRIO */
+ case 0x206: /* /MIX */
logerror("audio_io_r: Unknown read at %04X\n", offset & 0x206);
break;
}
@@ -325,34 +325,34 @@ WRITE8_MEMBER(badlands_state::audio_io_w)
{
switch (offset & 0x206)
{
- case 0x000: /* n/c */
- case 0x002: /* /RDP */
- case 0x004: /* /RDIO */
+ case 0x000: /* n/c */
+ case 0x002: /* /RDP */
+ case 0x004: /* /RDIO */
logerror("audio_io_w: Unknown write (%02X) at %04X\n", data & 0xff, offset & 0x206);
break;
- case 0x006: /* /IRQACK */
+ case 0x006: /* /IRQACK */
m6502_irq_ack_r(space, 0);
break;
- case 0x200: /* n/c */
- case 0x206: /* n/c */
+ case 0x200: /* n/c */
+ case 0x206: /* n/c */
break;
- case 0x202: /* /WRP */
+ case 0x202: /* /WRP */
m6502_sound_w(space, offset, data);
break;
- case 0x204: /* WRIO */
+ case 0x204: /* WRIO */
/*
- 0xc0 = bank address
- 0x20 = coin counter 2
- 0x10 = coin counter 1
- 0x08 = n/c
- 0x04 = n/c
- 0x02 = n/c
- 0x01 = YM2151 reset (active low)
- */
+ 0xc0 = bank address
+ 0x20 = coin counter 2
+ 0x10 = coin counter 1
+ 0x08 = n/c
+ 0x04 = n/c
+ 0x02 = n/c
+ 0x01 = YM2151 reset (active low)
+ */
/* update the bank */
memcpy(m_bank_base, &m_bank_source_data[0x1000 * ((data >> 6) & 3)], 0x1000);
@@ -413,7 +413,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( badlands )
- PORT_START("FE4000") /* fe4000 */
+ PORT_START("FE4000") /* fe4000 */
PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
@@ -421,25 +421,25 @@ static INPUT_PORTS_START( badlands )
PORT_SERVICE( 0x0080, IP_ACTIVE_LOW )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("FE6000") /* fe6000 */
+ PORT_START("FE6000") /* fe6000 */
PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(1)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("FE6002") /* fe6002 */
+ PORT_START("FE6002") /* fe6002 */
PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("AUDIO") /* audio port */
+ PORT_START("AUDIO") /* audio port */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* self test */
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* response buffer full */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) /* command buffer full */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* self test */
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* self test */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* response buffer full */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) /* command buffer full */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* self test */
- PORT_START("PEDALS") /* fake for pedals */
+ PORT_START("PEDALS") /* fake for pedals */
PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0xfffc, IP_ACTIVE_HIGH, IPT_UNUSED )
@@ -534,18 +534,18 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( badlands )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "136074-1008.20f", 0x00000, 0x10000, CRC(a3da5774) SHA1(5ab1eb61d25594b2d7c40400cb57e7f47a717598) )
ROM_LOAD16_BYTE( "136074-1006.27f", 0x00001, 0x10000, CRC(aa03b4f3) SHA1(5eda60c715ffcefd4ad34bdb90579e8671dc384a) )
ROM_LOAD16_BYTE( "136074-1009.17f", 0x20000, 0x10000, CRC(0e2e807f) SHA1(5b61de066dca12c44335aa68a13c821845657866) )
ROM_LOAD16_BYTE( "136074-1007.24f", 0x20001, 0x10000, CRC(99a20c2c) SHA1(9b0a5a5dafb8816e72330d302c60339b600b49a8) )
- ROM_REGION( 0x14000, "audiocpu", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "audiocpu", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136074-1018.9c", 0x10000, 0x4000, CRC(a05fd146) SHA1(d97abbcf7897ca720cc18ff3a323f41cd3b23c34) )
ROM_CONTINUE( 0x04000, 0xc000 )
ROM_REGION( 0x60000, "gfx1", ROMREGION_INVERT )
- ROM_LOAD( "136074-1012.4n", 0x000000, 0x10000, CRC(5d124c6c) SHA1(afebaaf90b3751f5e873fc4c45f1d5385ef86a6e) ) /* playfield */
+ ROM_LOAD( "136074-1012.4n", 0x000000, 0x10000, CRC(5d124c6c) SHA1(afebaaf90b3751f5e873fc4c45f1d5385ef86a6e) ) /* playfield */
ROM_LOAD( "136074-1013.2n", 0x010000, 0x10000, CRC(b1ec90d6) SHA1(8d4c7db8e1bf9c050f5869eb38fa573867fdc12b) )
ROM_LOAD( "136074-1014.4s", 0x020000, 0x10000, CRC(248a6845) SHA1(086ef0840b889e790ce3fcd09f98589aae932456) )
ROM_LOAD( "136074-1015.2s", 0x030000, 0x10000, CRC(792296d8) SHA1(833cdb968064151ca77bb3dbe416ff7127a12de4) )
@@ -553,7 +553,7 @@ ROM_START( badlands )
ROM_LOAD( "136074-1017.2u", 0x050000, 0x10000, CRC(ad0071a3) SHA1(472b197e5d320b3424d8a8d8c051b1023a07ae08) )
ROM_REGION( 0x30000, "gfx2", ROMREGION_INVERT )
- ROM_LOAD( "136074-1010.14r", 0x000000, 0x10000, CRC(c15f629e) SHA1(944e3479dce6e420cf9a3f4c1438c5ca66e5cb97) ) /* mo */
+ ROM_LOAD( "136074-1010.14r", 0x000000, 0x10000, CRC(c15f629e) SHA1(944e3479dce6e420cf9a3f4c1438c5ca66e5cb97) ) /* mo */
ROM_LOAD( "136074-1011.10r", 0x010000, 0x10000, CRC(fb0b6717) SHA1(694ab0f04d673682831a24027757d4b3c40a4e0e) )
ROM_LOAD( "136074-1019.14t", 0x020000, 0x10000, CRC(0e26bff6) SHA1(ee018dd37a27c7e7c16a57ea0d32aeb9cdf26bb4) )
@@ -682,7 +682,7 @@ MACHINE_RESET_MEMBER(badlands_state,badlandsb)
static MACHINE_CONFIG_START( badlandsb, badlands_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_28MHz/4) /* Divisor estimated */
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_28MHz/4) /* Divisor estimated */
MCFG_CPU_PROGRAM_MAP(bootleg_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", badlands_state, vblank_int)
@@ -709,7 +709,7 @@ static MACHINE_CONFIG_START( badlandsb, badlands_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_YM2151_ADD("ymsnd", XTAL_20MHz/8) /* Divisor estimated */
+ MCFG_YM2151_ADD("ymsnd", XTAL_20MHz/8) /* Divisor estimated */
MCFG_SOUND_ROUTE(0, "mono", 0.30)
MCFG_SOUND_ROUTE(1, "mono", 0.30)
MACHINE_CONFIG_END
@@ -719,7 +719,7 @@ MACHINE_CONFIG_END
/* bootleg by Playmark, uses Joystick controls */
ROM_START( badlandsb )
/* bootleg 68k Program */
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "blb28.ic21", 0x00000, 0x10000, CRC(dffb025d) SHA1(f2c17607acbbeee7d5d3f3dd2e8dc768b755e991) )
ROM_LOAD16_BYTE( "blb22.ic22", 0x00001, 0x10000, CRC(ca3015c4) SHA1(72e1451498143d920239487704f4b4a8a71410e0) )
ROM_LOAD16_BYTE( "blb27.ic19", 0x20000, 0x10000, CRC(0e2e807f) SHA1(5b61de066dca12c44335aa68a13c821845657866) )
@@ -751,7 +751,7 @@ ROM_END
ROM_START( badlandsb2 )
/* bootleg 68k Program */
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "5.ic21", 0x00000, 0x10000, CRC(dffb025d) SHA1(f2c17607acbbeee7d5d3f3dd2e8dc768b755e991) )
ROM_LOAD16_BYTE( "2.ic22", 0x00001, 0x10000, CRC(ca3015c4) SHA1(72e1451498143d920239487704f4b4a8a71410e0) )
ROM_LOAD16_BYTE( "4.ic19", 0x20000, 0x10000, CRC(0e2e807f) SHA1(5b61de066dca12c44335aa68a13c821845657866) )
diff --git a/src/mame/drivers/bagman.c b/src/mame/drivers/bagman.c
index 02c06d4ff49..7af2546bc32 100644
--- a/src/mame/drivers/bagman.c
+++ b/src/mame/drivers/bagman.c
@@ -112,25 +112,25 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, bagman_state )
AM_RANGE(0x6000, 0x67ff) AM_RAM
AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(bagman_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(bagman_colorram_w) AM_SHARE("colorram")
- AM_RANGE(0x9c00, 0x9fff) AM_WRITENOP /* written to, but unused */
+ AM_RANGE(0x9c00, 0x9fff) AM_WRITENOP /* written to, but unused */
AM_RANGE(0xa000, 0xa000) AM_READ(bagman_pal16r6_r)
//AM_RANGE(0xa800, 0xa805) AM_READ_LEGACY(bagman_ls259_r) /*just for debugging purposes*/
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITE(bagman_flipscreen_w)
AM_RANGE(0xa003, 0xa003) AM_WRITEONLY AM_SHARE("video_enable")
AM_RANGE(0xc000, 0xffff) AM_ROM /* Super Bagman only */
- AM_RANGE(0x9800, 0x981f) AM_WRITEONLY AM_SHARE("spriteram") /* hidden portion of color RAM */
+ AM_RANGE(0x9800, 0x981f) AM_WRITEONLY AM_SHARE("spriteram") /* hidden portion of color RAM */
/* here only to initialize the pointer, */
/* writes are handled by bagman_colorram_w */
AM_RANGE(0xa800, 0xa805) AM_WRITE(bagman_ls259_w) /* TMS5110 driving state machine */
AM_RANGE(0xa004, 0xa004) AM_WRITE(bagman_coin_counter_w)
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
- AM_RANGE(0xb800, 0xb800) AM_READNOP /* looks like watchdog from schematics */
+ AM_RANGE(0xb800, 0xb800) AM_READNOP /* looks like watchdog from schematics */
#if 0
- AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* ???? */
- AM_RANGE(0xb000, 0xb000) AM_WRITENOP /* ???? */
- AM_RANGE(0xb800, 0xb800) AM_WRITENOP /* ???? */
+ AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* ???? */
+ AM_RANGE(0xb000, 0xb000) AM_WRITENOP /* ???? */
+ AM_RANGE(0xb800, 0xb800) AM_WRITENOP /* ???? */
#endif
ADDRESS_MAP_END
@@ -141,10 +141,10 @@ static ADDRESS_MAP_START( pickin_map, AS_PROGRAM, 8, bagman_state )
AM_RANGE(0x7000, 0x77ff) AM_RAM
AM_RANGE(0x8800, 0x8bff) AM_RAM_WRITE(bagman_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x9800, 0x9bff) AM_RAM_WRITE(bagman_colorram_w) AM_SHARE("colorram")
- AM_RANGE(0x9800, 0x981f) AM_WRITEONLY AM_SHARE("spriteram") /* hidden portion of color RAM */
+ AM_RANGE(0x9800, 0x981f) AM_WRITEONLY AM_SHARE("spriteram") /* hidden portion of color RAM */
/* here only to initialize the pointer, */
/* writes are handled by bagman_colorram_w */
- AM_RANGE(0x9c00, 0x9fff) AM_WRITENOP /* written to, but unused */
+ AM_RANGE(0x9c00, 0x9fff) AM_WRITENOP /* written to, but unused */
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_mask_w)
AM_RANGE(0xa001, 0xa002) AM_WRITE(bagman_flipscreen_w)
AM_RANGE(0xa003, 0xa003) AM_WRITEONLY AM_SHARE("video_enable")
@@ -152,9 +152,9 @@ static ADDRESS_MAP_START( pickin_map, AS_PROGRAM, 8, bagman_state )
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("DSW")
- AM_RANGE(0xa005, 0xa005) AM_WRITENOP /* ???? */
- AM_RANGE(0xa006, 0xa006) AM_WRITENOP /* ???? */
- AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* ???? */
+ AM_RANGE(0xa005, 0xa005) AM_WRITENOP /* ???? */
+ AM_RANGE(0xa006, 0xa006) AM_WRITENOP /* ???? */
+ AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* ???? */
/* guess */
AM_RANGE(0xb000, 0xb000) AM_DEVWRITE_LEGACY("ay2", ay8910_address_w)
@@ -192,28 +192,28 @@ static INPUT_PORTS_START( bagman )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_START("DSW")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
- PORT_DIPSETTING( 0x03, "2" )
- PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x01, "4" )
- PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3")
- PORT_DIPSETTING( 0x00, "2C/1C 1C/1C 1C/3C 1C/7C" )
- PORT_DIPSETTING( 0x04, "1C/1C 1C/2C 1C/6C 1C/14C" )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5")
- PORT_DIPSETTING( 0x18, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x10, DEF_STR( Medium ) )
- PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:6")
- PORT_DIPSETTING( 0x20, DEF_STR( English ) )
- PORT_DIPSETTING( 0x00, DEF_STR( French ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:7")
- PORT_DIPSETTING( 0x40, "30000" )
- PORT_DIPSETTING( 0x00, "40000" )
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPSETTING( 0x03, "2" )
+ PORT_DIPSETTING( 0x02, "3" )
+ PORT_DIPSETTING( 0x01, "4" )
+ PORT_DIPSETTING( 0x00, "5" )
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPSETTING( 0x00, "2C/1C 1C/1C 1C/3C 1C/7C" )
+ PORT_DIPSETTING( 0x04, "1C/1C 1C/2C 1C/6C 1C/14C" )
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5")
+ PORT_DIPSETTING( 0x18, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( Medium ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( Hard ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPSETTING( 0x20, DEF_STR( English ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( French ) )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPSETTING( 0x40, "30000" )
+ PORT_DIPSETTING( 0x00, "40000" )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) ) /* Cabinet type set through edge connector, not dip switch (verified on real pcb) */
- PORT_DIPSETTING( 0x80, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
INPUT_PORTS_END
static INPUT_PORTS_START( bagmans )
@@ -221,8 +221,8 @@ static INPUT_PORTS_START( bagmans )
PORT_MODIFY("DSW")
PORT_DIPNAME( 0x20, 0x20, DEF_STR ( Demo_Sounds ) )
- PORT_DIPSETTING( 0x00, DEF_STR ( Off ) )
- PORT_DIPSETTING( 0x20, DEF_STR ( On ) )
+ PORT_DIPSETTING( 0x00, DEF_STR ( Off ) )
+ PORT_DIPSETTING( 0x20, DEF_STR ( On ) )
INPUT_PORTS_END
static INPUT_PORTS_START( sbagman )
@@ -239,31 +239,31 @@ static INPUT_PORTS_START( pickin )
PORT_INCLUDE( bagman )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1")
- PORT_DIPSETTING( 0x00, "2C/1C 1C/1C 1C/3C 1C/7C" )
- PORT_DIPSETTING( 0x01, "1C/1C 1C/2C 1C/6C 1C/14C" )
- PORT_DIPNAME( 0x06, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:2,3")
- PORT_DIPSETTING( 0x06, "2" )
- PORT_DIPSETTING( 0x04, "3" )
- PORT_DIPSETTING( 0x02, "4" )
- PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:4")
- PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPSETTING( 0x00, "2C/1C 1C/1C 1C/3C 1C/7C" )
+ PORT_DIPSETTING( 0x01, "1C/1C 1C/2C 1C/6C 1C/14C" )
+ PORT_DIPNAME( 0x06, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:2,3")
+ PORT_DIPSETTING( 0x06, "2" )
+ PORT_DIPSETTING( 0x04, "3" )
+ PORT_DIPSETTING( 0x02, "4" )
+ PORT_DIPSETTING( 0x00, "5" )
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW1:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW1:6" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:7")
- PORT_DIPSETTING( 0x40, DEF_STR( English ) )
- PORT_DIPSETTING( 0x00, DEF_STR( French ) )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPSETTING( 0x40, DEF_STR( English ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( French ) )
INPUT_PORTS_END
static INPUT_PORTS_START( botanic )
PORT_INCLUDE( bagman )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x08, 0x08, "Invulnerability Fruits" ) PORT_DIPLOCATION("SW1:4")
- PORT_DIPSETTING( 0x08, "3" )
- PORT_DIPSETTING( 0x00, DEF_STR( None ) )
+ PORT_DIPNAME( 0x08, 0x08, "Invulnerability Fruits" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPSETTING( 0x08, "3" )
+ PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW1:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW1:6" )
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW1:7" )
@@ -292,41 +292,41 @@ static INPUT_PORTS_START( squaitsa )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_START("DSW")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:1")
- PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x06, 0x06, "Max Points" ) PORT_DIPLOCATION("SW:2,3")
- PORT_DIPSETTING( 0x06, "7" )
- PORT_DIPSETTING( 0x04, "11" )
- PORT_DIPSETTING( 0x02, "15" )
- PORT_DIPSETTING( 0x00, "21" )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW:4,5")
- PORT_DIPSETTING( 0x00, "Level 1" )
- PORT_DIPSETTING( 0x08, "Level 2" )
- PORT_DIPSETTING( 0x10, "Level 3" )
- PORT_DIPSETTING( 0x18, "Level 4" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:6")
- PORT_DIPSETTING( 0x20, DEF_STR( Spanish ) )
- PORT_DIPSETTING( 0x00, DEF_STR( English ) )
- PORT_DIPNAME( 0x40, 0x40, "Body Fault" ) PORT_DIPLOCATION("SW:7")
- PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, "Protection?" ) /* Left empty in the dips scan */
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:1")
+ PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
+ PORT_DIPNAME( 0x06, 0x06, "Max Points" ) PORT_DIPLOCATION("SW:2,3")
+ PORT_DIPSETTING( 0x06, "7" )
+ PORT_DIPSETTING( 0x04, "11" )
+ PORT_DIPSETTING( 0x02, "15" )
+ PORT_DIPSETTING( 0x00, "21" )
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW:4,5")
+ PORT_DIPSETTING( 0x00, "Level 1" )
+ PORT_DIPSETTING( 0x08, "Level 2" )
+ PORT_DIPSETTING( 0x10, "Level 3" )
+ PORT_DIPSETTING( 0x18, "Level 4" )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:6")
+ PORT_DIPSETTING( 0x20, DEF_STR( Spanish ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( English ) )
+ PORT_DIPNAME( 0x40, 0x40, "Body Fault" ) PORT_DIPLOCATION("SW:7")
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x80, 0x00, "Protection?" ) /* Left empty in the dips scan */
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DIAL_P1")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(5)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(5)
PORT_START("DIAL_P2")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(5) PORT_COCKTAIL
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(5) PORT_COCKTAIL
INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 characters */
- 512, /* 512 characters */
- 2, /* 2 bits per pixel */
+ 8,8, /* 8*8 characters */
+ 512, /* 512 characters */
+ 2, /* 2 bits per pixel */
{ 0, 512*8*8 }, /* the two bitplanes are separated */
{ 0, 1, 2, 3, 4, 5, 6, 7 }, /* pretty straightforward layout */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
@@ -334,28 +334,28 @@ static const gfx_layout charlayout =
};
static const gfx_layout spritelayout =
{
- 16,16, /* 16*16 sprites */
- 128, /* 128 sprites */
- 2, /* 2 bits per pixel */
- { 0, 128*16*16 }, /* the two bitplanes are separated */
- { 0, 1, 2, 3, 4, 5, 6, 7, /* pretty straightforward layout */
+ 16,16, /* 16*16 sprites */
+ 128, /* 128 sprites */
+ 2, /* 2 bits per pixel */
+ { 0, 128*16*16 }, /* the two bitplanes are separated */
+ { 0, 1, 2, 3, 4, 5, 6, 7, /* pretty straightforward layout */
8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static GFXDECODE_START( bagman )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 ) /* char set #1 */
- GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0, 16 ) /* sprites */
- GFXDECODE_ENTRY( "gfx2", 0, charlayout, 0, 16 ) /* char set #2 */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 ) /* char set #1 */
+ GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0, 16 ) /* sprites */
+ GFXDECODE_ENTRY( "gfx2", 0, charlayout, 0, 16 ) /* char set #2 */
GFXDECODE_END
static GFXDECODE_START( pickin )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 ) /* char set #1 */
- GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0, 16 ) /* sprites */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 16 ) /* char set #1 */
+ GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0, 16 ) /* sprites */
/* no gfx2 */
GFXDECODE_END
@@ -435,31 +435,31 @@ static const ay8910_interface ay8910_interface_2 =
static const tmsprom_interface prom_intf =
{
- "5110ctrl", /* prom memory region - sound region is automatically assigned */
- 0x1000, /* individual rom_size */
- 1, /* bit # of pdc line */
+ "5110ctrl", /* prom memory region - sound region is automatically assigned */
+ 0x1000, /* individual rom_size */
+ 1, /* bit # of pdc line */
/* virtual bit 8: constant 0, virtual bit 9:constant 1 */
- 8, /* bit # of ctl1 line */
- 2, /* bit # of ctl2 line */
- 8, /* bit # of ctl4 line */
- 2, /* bit # of ctl8 line */
- 6, /* bit # of rom reset */
- 7, /* bit # of stop */
- DEVCB_DEVICE_LINE("tms", tms5110_pdc_w), /* tms pdc func */
- DEVCB_DEVICE_HANDLER("tms", tms5110_ctl_w) /* tms ctl func */
+ 8, /* bit # of ctl1 line */
+ 2, /* bit # of ctl2 line */
+ 8, /* bit # of ctl4 line */
+ 2, /* bit # of ctl8 line */
+ 6, /* bit # of rom reset */
+ 7, /* bit # of stop */
+ DEVCB_DEVICE_LINE("tms", tms5110_pdc_w), /* tms pdc func */
+ DEVCB_DEVICE_HANDLER("tms", tms5110_ctl_w) /* tms ctl func */
};
static const tms5110_interface bagman_tms5110_interface =
{
/* legacy interface */
- NULL, /* function to be called when chip requests another bit */
- NULL, /* speech ROM load address callback */
+ NULL, /* function to be called when chip requests another bit */
+ NULL, /* speech ROM load address callback */
/* new rom controller interface */
- DEVCB_DEVICE_LINE("tmsprom", tmsprom_m0_w), /* the M0 line */
- DEVCB_NULL, /* the M1 line */
- DEVCB_NULL, /* Write to ADD1,2,4,8 - 4 address bits */
- DEVCB_DEVICE_LINE("tmsprom", tmsprom_data_r), /* Read one bit from ADD8/Data - voice data */
- DEVCB_NULL /* rom clock - Only used to drive the data lines */
+ DEVCB_DEVICE_LINE("tmsprom", tmsprom_m0_w), /* the M0 line */
+ DEVCB_NULL, /* the M1 line */
+ DEVCB_NULL, /* Write to ADD1,2,4,8 - 4 address bits */
+ DEVCB_DEVICE_LINE("tmsprom", tmsprom_data_r), /* Read one bit from ADD8/Data - voice data */
+ DEVCB_NULL /* rom clock - Only used to drive the data lines */
};
INTERRUPT_GEN_MEMBER(bagman_state::vblank_irq)
@@ -759,15 +759,15 @@ ROM_START( sbagman )
ROM_LOAD( "9.9m", 0x4000, 0x1000, CRC(601f34ba) SHA1(1b7ee61a341b9a87abe4fe10b0c647a9b0b97d38) )
ROM_LOAD( "10.9n", 0x5000, 0x1000, CRC(5f750918) SHA1(3dc44f259e88999dbb95b4d4376281cc81c1ab87) )
ROM_LOAD( "13.8d", 0xc000, 0x0e00, CRC(944a4453) SHA1(cd64d9267d2c5cea39464ba9308752c690e7fd24) )
- ROM_CONTINUE( 0xfe00, 0x0200 )
+ ROM_CONTINUE( 0xfe00, 0x0200 )
ROM_LOAD( "14.8f", 0xd000, 0x0400, CRC(83b10139) SHA1(8a1880c6ab8a345676fe30465351d69cc1b416b2) )
- ROM_CONTINUE( 0xe400, 0x0200 )
- ROM_CONTINUE( 0xd600, 0x0a00 )
+ ROM_CONTINUE( 0xe400, 0x0200 )
+ ROM_CONTINUE( 0xd600, 0x0a00 )
ROM_LOAD( "15.8j", 0xe000, 0x0400, CRC(fe924879) SHA1(b80cbf9cba91e553f7685aef348854c02f0619c7) )
- ROM_CONTINUE( 0xd400, 0x0200 )
- ROM_CONTINUE( 0xe600, 0x0a00 )
+ ROM_CONTINUE( 0xd400, 0x0200 )
+ ROM_CONTINUE( 0xe600, 0x0a00 )
ROM_LOAD( "16.8k", 0xf000, 0x0e00, CRC(b77eb1f5) SHA1(ef94c1b449e3fa230491052fc3bd4db3f1239263) )
- ROM_CONTINUE( 0xce00, 0x0200 )
+ ROM_CONTINUE( 0xce00, 0x0200 )
ROM_REGION( 0x2000, "gfx1", 0 )
ROM_LOAD( "2.1e", 0x0000, 0x1000, CRC(f4d3d4e6) SHA1(167ad0259578966fe86384df844e69cf2cc77443) )
@@ -798,15 +798,15 @@ ROM_START( sbagmans )
ROM_LOAD( "sbag_9m.bin", 0x4000, 0x1000, CRC(b21e246e) SHA1(39d2e93ac5240bb45e76c30c535d12e302690dde) )
ROM_LOAD( "10.9n", 0x5000, 0x1000, CRC(5f750918) SHA1(3dc44f259e88999dbb95b4d4376281cc81c1ab87) )
ROM_LOAD( "13.8d", 0xc000, 0x0e00, CRC(944a4453) SHA1(cd64d9267d2c5cea39464ba9308752c690e7fd24) )
- ROM_CONTINUE( 0xfe00, 0x0200 )
+ ROM_CONTINUE( 0xfe00, 0x0200 )
ROM_LOAD( "sbag_f8.bin", 0xd000, 0x0400, CRC(0f3e6de4) SHA1(a7e50d210630b500e534d626d76110dee4aeb18d) )
- ROM_CONTINUE( 0xe400, 0x0200 )
- ROM_CONTINUE( 0xd600, 0x0a00 )
+ ROM_CONTINUE( 0xe400, 0x0200 )
+ ROM_CONTINUE( 0xd600, 0x0a00 )
ROM_LOAD( "15.8j", 0xe000, 0x0400, CRC(fe924879) SHA1(b80cbf9cba91e553f7685aef348854c02f0619c7) )
- ROM_CONTINUE( 0xd400, 0x0200 )
- ROM_CONTINUE( 0xe600, 0x0a00 )
+ ROM_CONTINUE( 0xd400, 0x0200 )
+ ROM_CONTINUE( 0xe600, 0x0a00 )
ROM_LOAD( "16.8k", 0xf000, 0x0e00, CRC(b77eb1f5) SHA1(ef94c1b449e3fa230491052fc3bd4db3f1239263) )
- ROM_CONTINUE( 0xce00, 0x0200 )
+ ROM_CONTINUE( 0xce00, 0x0200 )
ROM_REGION( 0x2000, "gfx1", 0 )
ROM_LOAD( "2.1e", 0x0000, 0x1000, CRC(f4d3d4e6) SHA1(167ad0259578966fe86384df844e69cf2cc77443) )
@@ -931,7 +931,7 @@ DRIVER_INIT_MEMBER(bagman_state,bagman)
{
/* Unmap video enable register, not available on earlier hardware revision(s)
- Bagman is supposed to have glitches during screen transitions */
+ Bagman is supposed to have glitches during screen transitions */
machine().device("maincpu")->memory().space(AS_PROGRAM).unmap_write(0xa003, 0xa003);
*m_video_enable = 1;
}
diff --git a/src/mame/drivers/balsente.c b/src/mame/drivers/balsente.c
index e19cf233b41..f0a83fc1f9f 100644
--- a/src/mame/drivers/balsente.c
+++ b/src/mame/drivers/balsente.c
@@ -259,7 +259,7 @@ static ADDRESS_MAP_START( cpu1_map, AS_PROGRAM, 8, balsente_state )
AM_RANGE(0x9903, 0x9903) AM_READ_PORT("IN1") AM_WRITENOP
AM_RANGE(0x9a00, 0x9a03) AM_READ(balsente_random_num_r)
AM_RANGE(0x9a04, 0x9a05) AM_READWRITE(balsente_m6850_r, balsente_m6850_w)
- AM_RANGE(0x9b00, 0x9cff) AM_RAM AM_SHARE("nvram") /* system+cart NOVRAM */
+ AM_RANGE(0x9b00, 0x9cff) AM_RAM AM_SHARE("nvram") /* system+cart NOVRAM */
AM_RANGE(0xa000, 0xbfff) AM_ROMBANK("bank1")
AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bank2")
ADDRESS_MAP_END
@@ -316,27 +316,27 @@ ADDRESS_MAP_END
#define UNUSED_ANALOG PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
#define BALSENTE_COINAGE_ALT \
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2") \
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2") \
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) ) \
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) ) \
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) ) \
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
#define BALSENTE_COINAGE_ALT2 \
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2") \
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2") \
PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) ) \
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) ) \
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) \
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
#define BALSENTE_PLAYERS_PER_COIN \
- PORT_DIPNAME( 0x04, 0x04, "Players Per Credit" ) PORT_DIPLOCATION("H1:3") \
+ PORT_DIPNAME( 0x04, 0x04, "Players Per Credit" ) PORT_DIPLOCATION("H1:3") \
PORT_DIPSETTING( 0x00, "1" ) \
PORT_DIPSETTING( 0x04, "1 Or 2" )
static INPUT_PORTS_START( sentetst )
PORT_START("SWH")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
@@ -346,27 +346,27 @@ static INPUT_PORTS_START( sentetst )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "H1:5" )
PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "H1:6" )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "H1:7" )
- PORT_DIPNAME( 0x80, 0x80, "High Scores" ) PORT_DIPLOCATION("H1:8")
+ PORT_DIPNAME( 0x80, 0x80, "High Scores" ) PORT_DIPLOCATION("H1:8")
PORT_DIPSETTING( 0x80, "Keep Top 5" )
PORT_DIPSETTING( 0x00, "Keep All" )
PORT_START("SWG")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("G1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("G1:1,2")
PORT_DIPSETTING( 0x00, "Every 10,000" )
PORT_DIPSETTING( 0x01, "Every 15,000" )
PORT_DIPSETTING( 0x02, "Every 20,000" )
PORT_DIPSETTING( 0x03, "Every 25,000" )
- PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:3,4")
+ PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:3,4")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x0c, "5" )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "G1:5" )
PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "G1:6" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("G1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("G1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -396,10 +396,10 @@ static INPUT_PORTS_START( sentetst )
/* Player 1 Trackball */
PORT_START("AN2")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
PORT_START("AN3")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
INPUT_PORTS_END
@@ -409,7 +409,7 @@ static INPUT_PORTS_START( cshift )
PORT_MODIFY("SWG")
PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "G1:1" )
PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "G1:2" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:3")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "G1:4" )
@@ -441,7 +441,7 @@ static INPUT_PORTS_START( gghost )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "H1:7" )
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x07, 0x05, "Game Duration" ) PORT_DIPLOCATION("G1:1,2,3")
+ PORT_DIPNAME( 0x07, 0x05, "Game Duration" ) PORT_DIPLOCATION("G1:1,2,3")
PORT_DIPSETTING( 0x00, "9 Points" )
PORT_DIPSETTING( 0x02, "11 Points" )
PORT_DIPSETTING( 0x04, "15 Points" )
@@ -467,17 +467,17 @@ static INPUT_PORTS_START( gghost )
/* Player 2 Trackball */
PORT_MODIFY("AN0")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(2)
PORT_MODIFY("AN1")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
/* Player 1 Trackball */
PORT_MODIFY("AN2")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
INPUT_PORTS_END
@@ -489,7 +489,7 @@ static INPUT_PORTS_START( hattrick )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "H1:8" )
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x07, 0x02, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("G1:1,2,3")
+ PORT_DIPNAME( 0x07, 0x02, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("G1:1,2,3")
PORT_DIPSETTING( 0x00, "1:15" )
PORT_DIPSETTING( 0x01, "1:30" )
PORT_DIPSETTING( 0x02, "1:45" )
@@ -550,11 +550,11 @@ static INPUT_PORTS_START( otwalls )
/* Player 1 Dial */
PORT_MODIFY("AN2")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
/* Player 2 Dial */
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
INPUT_PORTS_END
@@ -562,7 +562,7 @@ static INPUT_PORTS_START( snakjack )
PORT_INCLUDE( sentetst )
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("G1:1,2")
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("G1:1,2")
PORT_DIPSETTING( 0x00, "Every 15,000" )
PORT_DIPSETTING( 0x01, "Every 20,000" )
PORT_DIPSETTING( 0x02, "Every 25,000" )
@@ -578,13 +578,13 @@ static INPUT_PORTS_START( stocker )
PORT_INCLUDE( sentetst )
PORT_MODIFY("SWH")
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x1c, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("H1:3,4,5")
+ PORT_DIPNAME( 0x1c, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("H1:3,4,5")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x04, "2 Coins = 1 Bonus" )
PORT_DIPSETTING( 0x08, "3 Coins = 1 Bonus" )
@@ -593,10 +593,10 @@ static INPUT_PORTS_START( stocker )
PORT_DIPSETTING( 0x14, "5 Coins = 1 Bonus" )
PORT_DIPSETTING( 0x18, "5 Coins = 2 Bonus" )
PORT_DIPSETTING( 0x1c, "5 Coins = 3 Bonus" )
- PORT_DIPNAME( 0x20, 0x00, "Left Coin Mech" ) PORT_DIPLOCATION("H1:6")
+ PORT_DIPNAME( 0x20, 0x00, "Left Coin Mech" ) PORT_DIPLOCATION("H1:6")
PORT_DIPSETTING( 0x00, "x1" )
PORT_DIPSETTING( 0x20, "x2" )
- PORT_DIPNAME( 0xc0, 0x00, "Right Coin Mech" ) PORT_DIPLOCATION("H1:7,8")
+ PORT_DIPNAME( 0xc0, 0x00, "Right Coin Mech" ) PORT_DIPLOCATION("H1:7,8")
PORT_DIPSETTING( 0x00, "x1" )
PORT_DIPSETTING( 0x40, "x4" )
PORT_DIPSETTING( 0x80, "x5" )
@@ -607,7 +607,7 @@ static INPUT_PORTS_START( stocker )
PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "G1:2" )
PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "G1:3" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "G1:4" )
- PORT_DIPNAME( 0x40, 0x40, "End Of Game" ) PORT_DIPLOCATION("G1:7")
+ PORT_DIPNAME( 0x40, 0x40, "End Of Game" ) PORT_DIPLOCATION("G1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x00, "3 Tickets" )
@@ -623,7 +623,7 @@ static INPUT_PORTS_START( stocker )
/* Player 1 Wheel */
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
INPUT_PORTS_END
@@ -631,20 +631,20 @@ static INPUT_PORTS_START( triviag1 )
PORT_INCLUDE( sentetst )
PORT_MODIFY("SWH")
- PORT_DIPNAME( 0x20, 0x00, "Sound" ) PORT_DIPLOCATION("H1:6")
+ PORT_DIPNAME( 0x20, 0x00, "Sound" ) PORT_DIPLOCATION("H1:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "Sound Test" ) PORT_DIPLOCATION("H1:7")
+ PORT_DIPNAME( 0x40, 0x00, "Sound Test" ) PORT_DIPLOCATION("H1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "High Scores" ) PORT_DIPLOCATION("H1:8")
+ PORT_DIPNAME( 0x80, 0x80, "High Scores" ) PORT_DIPLOCATION("H1:8")
PORT_DIPSETTING( 0x00, "Keep Top 5" )
PORT_DIPSETTING( 0x80, "Keep Top 10" )
PORT_MODIFY("SWG")
PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "G1:1" )
PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "G1:2" )
- PORT_DIPNAME( 0x0c, 0x04, "Guesses" ) PORT_DIPLOCATION("G1:3,4")
+ PORT_DIPNAME( 0x0c, 0x04, "Guesses" ) PORT_DIPLOCATION("G1:3,4")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x04, "4" )
PORT_DIPSETTING( 0x08, "5" )
@@ -673,14 +673,14 @@ static INPUT_PORTS_START( triviaes )
PORT_INCLUDE( triviag1 )
PORT_MODIFY("SWH")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( Free_Play ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x0c, 0x04, "Guesses" ) PORT_DIPLOCATION("G1:3,4")
+ PORT_DIPNAME( 0x0c, 0x04, "Guesses" ) PORT_DIPLOCATION("G1:3,4")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x08, "4" )
@@ -695,28 +695,28 @@ static INPUT_PORTS_START( gimeabrk )
BALSENTE_COINAGE_ALT
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x03, 0x01, "Bonus Shot" ) PORT_DIPLOCATION("G1:1,2")
+ PORT_DIPNAME( 0x03, 0x01, "Bonus Shot" ) PORT_DIPLOCATION("G1:1,2")
PORT_DIPSETTING( 0x00, "Every 6 Balls" )
PORT_DIPSETTING( 0x01, "Every 8 Balls" )
PORT_DIPSETTING( 0x02, "Every 10 Balls" )
PORT_DIPSETTING( 0x03, "Every 12 Balls" )
- PORT_DIPNAME( 0x0c, 0x08, "Initial Shots" ) PORT_DIPLOCATION("G1:3,4")
+ PORT_DIPNAME( 0x0c, 0x08, "Initial Shots" ) PORT_DIPLOCATION("G1:3,4")
PORT_DIPSETTING( 0x00, "8" )
PORT_DIPSETTING( 0x04, "10" )
PORT_DIPSETTING( 0x08, "12" )
PORT_DIPSETTING( 0x0c, "14" )
- PORT_DIPNAME( 0x10, 0x00, "Players Per Credit" ) PORT_DIPLOCATION("G1:5")
+ PORT_DIPNAME( 0x10, 0x00, "Players Per Credit" ) PORT_DIPLOCATION("G1:5")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x10, "1 Or 2" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("G1:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("G1:6")
PORT_DIPSETTING( 0x20, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x40, 0x40, "High Scores" ) PORT_DIPLOCATION("G1:7")
+ PORT_DIPNAME( 0x40, 0x40, "High Scores" ) PORT_DIPLOCATION("G1:7")
PORT_DIPSETTING( 0x40, "Keep Top 5" )
PORT_DIPSETTING( 0x00, "Keep All" )
PORT_MODIFY("IN0")
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_MODIFY("IN1")
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
@@ -726,15 +726,15 @@ static INPUT_PORTS_START( gimeabrk )
/* Player 1 Trackball, Cocktail acts as Player 2*/
PORT_MODIFY("AN0")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
PORT_MODIFY("AN1")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
/* Player 2 Trackball, Cocktail acts as Player 1 */
PORT_MODIFY("AN2")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_COCKTAIL PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_COCKTAIL PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(2)
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_COCKTAIL PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_COCKTAIL PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
INPUT_PORTS_END
@@ -745,16 +745,16 @@ static INPUT_PORTS_START( minigolf )
BALSENTE_COINAGE_ALT2
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x01, 0x01, "Add-A-Coin" ) PORT_DIPLOCATION("G1:1")
+ PORT_DIPNAME( 0x01, 0x01, "Add-A-Coin" ) PORT_DIPLOCATION("G1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Display Kids" ) PORT_DIPLOCATION("G1:2")
+ PORT_DIPNAME( 0x02, 0x02, "Display Kids" ) PORT_DIPLOCATION("G1:2")
PORT_DIPSETTING( 0x02, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x04, 0x04, "Kid On Left Located" ) PORT_DIPLOCATION("G1:3")
+ PORT_DIPNAME( 0x04, 0x04, "Kid On Left Located" ) PORT_DIPLOCATION("G1:3")
PORT_DIPSETTING( 0x04, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x08, 0x08, "Kid On Right Located" ) PORT_DIPLOCATION("G1:4")
+ PORT_DIPNAME( 0x08, 0x08, "Kid On Right Located" ) PORT_DIPLOCATION("G1:4")
PORT_DIPSETTING( 0x08, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "G1:5" )
@@ -770,10 +770,10 @@ static INPUT_PORTS_START( minigolf )
/* Player 1 Trackball */
PORT_MODIFY("AN2")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
INPUT_PORTS_END
@@ -796,7 +796,7 @@ static INPUT_PORTS_START( toggle )
PORT_MODIFY("SWG")
PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "G1:1" )
PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "G1:2" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:3")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "G1:4" )
@@ -830,7 +830,7 @@ static INPUT_PORTS_START( nametune )
PORT_INCLUDE( stocker )
PORT_MODIFY("SWH")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("H1:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 3C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
@@ -871,7 +871,7 @@ static INPUT_PORTS_START( nstocker )
BALSENTE_COINAGE_ALT2
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("G1:1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("G1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "G1:7" )
@@ -880,10 +880,10 @@ static INPUT_PORTS_START( nstocker )
PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, balsente_state,nstocker_bits_r, NULL)
/* cheese alert -- we have to map this to player 2 so that it doesn't interfere with
- the crosshair controls */
+ the crosshair controls */
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20)
- PORT_CODE_DEC(KEYCODE_S) PORT_CODE_DEC(JOYCODE_X_LEFT_SWITCH) PORT_CODE_INC(KEYCODE_F) PORT_CODE_INC(JOYCODE_X_RIGHT_SWITCH) PORT_RESET PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20)
+ PORT_CODE_DEC(KEYCODE_S) PORT_CODE_DEC(JOYCODE_X_LEFT_SWITCH) PORT_CODE_INC(KEYCODE_F) PORT_CODE_INC(JOYCODE_X_RIGHT_SWITCH) PORT_RESET PORT_PLAYER(2)
/* extra ports for shooters */
PORT_START("FAKEX") /* fake analog X */
@@ -901,7 +901,7 @@ static INPUT_PORTS_START( sfootbal )
BALSENTE_COINAGE_ALT2
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x07, 0x03, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("G1:1,2,3")
+ PORT_DIPNAME( 0x07, 0x03, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("G1:1,2,3")
PORT_DIPSETTING( 0x00, "1:30" )
PORT_DIPSETTING( 0x01, "1:40" )
PORT_DIPSETTING( 0x02, "1:50" )
@@ -910,7 +910,7 @@ static INPUT_PORTS_START( sfootbal )
PORT_DIPSETTING( 0x05, "2:40" )
PORT_DIPSETTING( 0x06, "3:00" )
PORT_DIPSETTING( 0x07, "3:30" )
- PORT_DIPNAME( 0x08, 0x00, "Players Per Credit" ) PORT_DIPLOCATION("G1:4")
+ PORT_DIPNAME( 0x08, 0x00, "Players Per Credit" ) PORT_DIPLOCATION("G1:4")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x08, "1 Or 2" )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "G1:7" )
@@ -926,17 +926,17 @@ static INPUT_PORTS_START( sfootbal )
/* Player 2 Analog Joystick */
PORT_MODIFY("AN0")
- PORT_BIT( 0xff, 0, IPT_AD_STICK_Y ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_AD_STICK_Y ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_PLAYER(2)
PORT_MODIFY("AN1")
- PORT_BIT( 0xff, 0, IPT_AD_STICK_X ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_REVERSE PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_AD_STICK_X ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_REVERSE PORT_PLAYER(2)
/* Player 1 Analog Joystick */
PORT_MODIFY("AN2")
- PORT_BIT( 0xff, 0, IPT_AD_STICK_Y ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_AD_STICK_Y ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_PLAYER(1)
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_AD_STICK_X ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_AD_STICK_X ) PORT_MINMAX(0x80,0x7f) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_REVERSE PORT_PLAYER(1)
INPUT_PORTS_END
@@ -947,7 +947,7 @@ static INPUT_PORTS_START( spiker )
BALSENTE_COINAGE_ALT2
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x01, 0x00, "Game Duration" ) PORT_DIPLOCATION("G1:1")
+ PORT_DIPNAME( 0x01, 0x00, "Game Duration" ) PORT_DIPLOCATION("G1:1")
PORT_DIPSETTING( 0x00, "11 Points" )
PORT_DIPSETTING( 0x01, "15 Points" )
PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "G1:2" )
@@ -967,17 +967,17 @@ static INPUT_PORTS_START( spiker )
/* Player 2 Trackball */
PORT_MODIFY("AN0")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(2)
PORT_MODIFY("AN1")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(2)
/* Player 1 Trackball */
PORT_MODIFY("AN2")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_PLAYER(1)
PORT_MODIFY("AN3")
- PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(20) PORT_RESET PORT_REVERSE PORT_PLAYER(1)
INPUT_PORTS_END
@@ -988,22 +988,22 @@ static INPUT_PORTS_START( stompin )
BALSENTE_COINAGE_ALT2
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x01, 0x00, "Display Kids" ) PORT_DIPLOCATION("G1:1")
+ PORT_DIPNAME( 0x01, 0x00, "Display Kids" ) PORT_DIPLOCATION("G1:1")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x02, 0x02, "Kid On Right Located" ) PORT_DIPLOCATION("G1:2")
+ PORT_DIPNAME( 0x02, 0x02, "Kid On Right Located" ) PORT_DIPLOCATION("G1:2")
PORT_DIPSETTING( 0x02, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x04, 0x04, "Kid On Left Located" ) PORT_DIPLOCATION("G1:3")
+ PORT_DIPNAME( 0x04, 0x04, "Kid On Left Located" ) PORT_DIPLOCATION("G1:3")
PORT_DIPSETTING( 0x04, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G1:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "Bee In Game" ) PORT_DIPLOCATION("G1:7")
+ PORT_DIPNAME( 0x40, 0x00, "Bee In Game" ) PORT_DIPLOCATION("G1:7")
PORT_DIPSETTING( 0x40, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x80, 0x00, "Bug Generation" ) PORT_DIPLOCATION("G1:8")
+ PORT_DIPNAME( 0x80, 0x00, "Bug Generation" ) PORT_DIPLOCATION("G1:8")
PORT_DIPSETTING( 0x00, "Regular" )
PORT_DIPSETTING( 0x80, DEF_STR( None ) )
@@ -1040,12 +1040,12 @@ static INPUT_PORTS_START( grudge )
PORT_INCLUDE( sentetst )
PORT_MODIFY("SWH")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H1:1,2")
PORT_DIPSETTING( 0x00, "0" )
PORT_DIPSETTING( 0x01, "1" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x03, "3" )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("H1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("H1:8")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
@@ -1055,7 +1055,7 @@ static INPUT_PORTS_START( grudge )
PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "G1:3" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "G1:4" )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "G1:7" )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Players ) ) PORT_DIPLOCATION("G1:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Players ) ) PORT_DIPLOCATION("G1:8")
PORT_DIPSETTING( 0x80, "2" )
PORT_DIPSETTING( 0x00, "3" )
@@ -1073,13 +1073,13 @@ static INPUT_PORTS_START( grudge )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("AN0")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20) PORT_PLAYER(1)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20) PORT_PLAYER(1)
PORT_MODIFY("AN1")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20) PORT_PLAYER(2)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20) PORT_PLAYER(2)
PORT_MODIFY("AN2")
- PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20) PORT_PLAYER(3)
+ PORT_BIT( 0xff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(20) PORT_PLAYER(3)
PORT_MODIFY("AN3")
UNUSED_ANALOG
@@ -1093,17 +1093,17 @@ static INPUT_PORTS_START( rescraid )
BALSENTE_COINAGE_ALT2
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("G1:1")
PORT_DIPSETTING( 0x00, "4" )
PORT_DIPSETTING( 0x01, "5" )
- PORT_DIPNAME( 0x0c, 0x04, "Minimum Game Time" ) PORT_DIPLOCATION("G1:3,4")
+ PORT_DIPNAME( 0x0c, 0x04, "Minimum Game Time" ) PORT_DIPLOCATION("G1:3,4")
PORT_DIPSETTING( 0x08, "45" )
PORT_DIPSETTING( 0x04, "60" )
PORT_DIPSETTING( 0x00, "90" )
PORT_DIPSETTING( 0x0c, "120" )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "G1:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "G1:6" )
- PORT_DIPNAME( 0x40, 0x40, "Keep High Scores" ) PORT_DIPLOCATION("G1:7")
+ PORT_DIPNAME( 0x40, 0x40, "Keep High Scores" ) PORT_DIPLOCATION("G1:7")
PORT_DIPSETTING( 0x40, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
@@ -1131,18 +1131,18 @@ static INPUT_PORTS_START( shrike )
PORT_INCLUDE( sentetst )
PORT_MODIFY("SWH")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage )) PORT_DIPLOCATION("H1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage )) PORT_DIPLOCATION("H1:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ))
PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ))
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ))
PORT_DIPSETTING( 0x03, DEF_STR( Free_Play ))
- PORT_DIPNAME( 0x40, 0x40, "Reset High Scores" ) PORT_DIPLOCATION("H1:7")
+ PORT_DIPNAME( 0x40, 0x40, "Reset High Scores" ) PORT_DIPLOCATION("H1:7")
PORT_DIPSETTING( 0x40, DEF_STR( No ))
PORT_DIPSETTING( 0x00, DEF_STR( Yes ))
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "H1:8" )
PORT_MODIFY("SWG")
- PORT_DIPNAME( 0x03, 0x03, "Minimum Game Time" ) PORT_DIPLOCATION("G1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, "Minimum Game Time" ) PORT_DIPLOCATION("G1:1,2")
PORT_DIPSETTING( 0x00, "1:00" )
PORT_DIPSETTING( 0x01, "1:30" )
PORT_DIPSETTING( 0x02, "2:00" )
@@ -1275,11 +1275,11 @@ MACHINE_CONFIG_END
*************************************/
#define MOTHERBOARD_PALS \
- ROM_REGION( 0x00001, "motherbrd_pals", 0) /* Motherboard PAL's */ \
- ROM_LOAD( "u01508001100b.u20f", 0x00000, 0x00001, NO_DUMP ) /* PAL16L8 */
+ ROM_REGION( 0x00001, "motherbrd_pals", 0) /* Motherboard PAL's */ \
+ ROM_LOAD( "u01508001100b.u20f", 0x00000, 0x00001, NO_DUMP ) /* PAL16L8 */
#define SOUNDBOARD_ROMS \
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */ \
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */ \
ROM_LOAD( "8002-10 9-25-84.5", 0x00000, 0x2000, CRC(4dd0a525) SHA1(f0c447adc5b67917851a9df978df851247e75c43) )
ROM_START( sentetst )
@@ -1288,7 +1288,7 @@ ROM_START( sentetst )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "sdiaggr0.bin", 0x00000, 0x2000, CRC(5e0ff62a) SHA1(3f0ebebb2f58530af7fac57a4780dfb37ef1ee1d) )
MOTHERBOARD_PALS
@@ -1308,7 +1308,7 @@ ROM_START( cshift )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "cs-gr0.bin", 0x00000, 0x2000, CRC(67f9d3b3) SHA1(4f3f80e4272b20611206636b6ccb627087efd0c3) )
ROM_LOAD( "cs-gr1.bin", 0x02000, 0x2000, CRC(78973d50) SHA1(de7891ef47c277d733d9b4810d68621718644655) )
ROM_LOAD( "cs-gr2.bin", 0x04000, 0x2000, CRC(1784f939) SHA1(ff7f43451580e3b314c24b00a66765c0b395ddf6) )
@@ -1332,7 +1332,7 @@ ROM_START( gghost )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "ggh-gr0.bin", 0x00000, 0x2000, CRC(03515526) SHA1(bceb7c8c3aa4c39b6cf1b976c5765c920399fe31) )
ROM_LOAD( "ggh-gr1.bin", 0x02000, 0x2000, CRC(b4293435) SHA1(5e2b96c19c4f5c63a5afa2de504d29fe64a4c908) )
ROM_LOAD( "ggh-gr2.bin", 0x04000, 0x2000, CRC(ece0cb97) SHA1(13bfb38de30992b9597c9d0f87f7b2a5c061ba51) )
@@ -1354,7 +1354,7 @@ ROM_START( hattrick )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "rom-gr0.u9b", 0x00000, 0x2000, CRC(9f41baba) SHA1(fa817a8e4d2f7b86a2294132e3991f7b6d8cb11a) )
ROM_LOAD( "rom-gr1.u8b", 0x02000, 0x2000, CRC(951f08c9) SHA1(059a575dd35cd8e822e12ac2606b47b6272bbb41) )
@@ -1375,7 +1375,7 @@ ROM_START( otwalls )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "otw-gr0.bin", 0x00000, 0x2000, CRC(210bad3c) SHA1(703769c6a569b17f2ad18441da7de0237be4721e) )
ROM_LOAD( "otw-gr1.bin", 0x02000, 0x2000, CRC(13e6aaa5) SHA1(ac8b9d16d2159d4a578d8fa988b59c058c5efc88) )
ROM_LOAD( "otw-gr2.bin", 0x04000, 0x2000, CRC(5cfefee5) SHA1(9aa74f0e1116098f43a4f8b4957db8923ddaf780) )
@@ -1400,7 +1400,7 @@ ROM_START( snakepit )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "spit-gr0.bin", 0x00000, 0x2000, CRC(f77fd85d) SHA1(f8e69d1d0030412d6129a8ebfee40b3f1f189d8d) )
ROM_LOAD( "spit-gr1.bin", 0x02000, 0x2000, CRC(3ad10334) SHA1(1d82a7948fbee627c80a9e03ade90e57972a6a31) )
ROM_LOAD( "spit-gr2.bin", 0x04000, 0x2000, CRC(24887703) SHA1(089f077400c9a3e3f5b43e8aa60b41160e296d52) )
@@ -1425,7 +1425,7 @@ ROM_START( snakjack )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "rom-gr0.u9b", 0x00000, 0x2000, CRC(3e64b5d5) SHA1(ab681eabb4f8e5b946c288ffb8df0624c0473d82) )
ROM_LOAD( "rom-gr1.u8b", 0x02000, 0x2000, CRC(b3b8baee) SHA1(b37638784a3903f2dcd698104da75b4ab59e8257) )
ROM_LOAD( "rom-gr2.u7b", 0x04000, 0x2000, CRC(e9d89dac) SHA1(570809ec5f8a64f280e13cbf801664cb548997e9) )
@@ -1447,7 +1447,7 @@ ROM_START( stocker )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u6b", 0x00000, 0x4000, CRC(2e66ac35) SHA1(c65b4991a88f8359c85f904f66a7fe73330aface) )
ROM_LOAD( "gr23.u5b", 0x04000, 0x4000, CRC(6fa43631) SHA1(7000907b914bf851b09811e3736af8c02e1aeda9) )
@@ -1468,10 +1468,10 @@ ROM_START( stocker )
ROM_LOAD( "stkr-cd.bin", 0x2c000, 0x2000, BAD_DUMP CRC(53dbc4e5) SHA1(e389978b5472174681fa180c6a2edf49903a6514) ) // 1 bad byte
ROM_LOAD( "stkr-ef.bin", 0x2e000, 0x2000, BAD_DUMP CRC(cdcf46bc) SHA1(8b1e801dab1efed002d484135264998d255dc041) ) // 1 bad byte
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
ROM_LOAD( "sentesnd", 0x00000, 0x2000, CRC(4dd0a525) SHA1(f0c447adc5b67917851a9df978df851247e75c43) )
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "stkr-gr0.bin", 0x00000, 0x2000, CRC(76d5694c) SHA1(e2b155fc7178886eb37a532d961b99b8c864397c) )
ROM_LOAD( "stkr-gr1.bin", 0x02000, 0x2000, CRC(4a5cc00b) SHA1(9ce46ed94e715a5997998aee6377baf2869ab3a6) )
ROM_LOAD( "stkr-gr2.bin", 0x04000, 0x2000, CRC(70002382) SHA1(c151ad3df2714a2f9f8b047894e7585ca16bd29e) )
@@ -1497,7 +1497,7 @@ ROM_START( triviag1 )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "tpg1-gr0.bin", 0x00000, 0x2000, CRC(20c9217a) SHA1(79ef058633149da8d2835405954ac31c661bf660) )
ROM_LOAD( "tpg1-gr1.bin", 0x02000, 0x2000, CRC(d7f44504) SHA1(804dbc4c006b20bdb01bdf02754e0d98f6fbacbe) )
ROM_LOAD( "tpg1-gr2.bin", 0x04000, 0x2000, CRC(4e59a15d) SHA1(c584bae32e2e5d8b5a48c44a31272b4f9dadfcd1) )
@@ -1521,7 +1521,7 @@ ROM_START( trivia12 )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr0.u9b", 0x00000, 0x2000, CRC(20c9217a) SHA1(79ef058633149da8d2835405954ac31c661bf660) )
ROM_LOAD( "gr1.u8b", 0x02000, 0x2000, CRC(d7f44504) SHA1(804dbc4c006b20bdb01bdf02754e0d98f6fbacbe) )
ROM_LOAD( "gr2.u7b", 0x04000, 0x2000, CRC(4e59a15d) SHA1(c584bae32e2e5d8b5a48c44a31272b4f9dadfcd1) )
@@ -1544,7 +1544,7 @@ ROM_START( triviag2 )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.bin", 0x00000, 0x4000, CRC(6829de8e) SHA1(4ec494883ba358f2ac7ce8d5a623a2f34b5bc843) )
ROM_LOAD( "gr23.bin", 0x04000, 0x4000, CRC(89398700) SHA1(771ee04baa9a31d435a6234490105878713e7845) )
ROM_LOAD( "gr45.bin", 0x08000, 0x4000, CRC(1e870293) SHA1(32149c9c8047854f2b2ad8844c4bd00a8ded588e) )
@@ -1564,7 +1564,7 @@ ROM_START( triviasp )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.bin", 0x00000, 0x4000, CRC(6829de8e) SHA1(4ec494883ba358f2ac7ce8d5a623a2f34b5bc843) )
ROM_LOAD( "gr23.bin", 0x04000, 0x4000, CRC(89398700) SHA1(771ee04baa9a31d435a6234490105878713e7845) )
ROM_LOAD( "allsport.3b", 0x08000, 0x4000, CRC(7415a7fc) SHA1(93d832434f359ce7b02aef276c89456b16438979) )
@@ -1584,7 +1584,7 @@ ROM_START( triviayp )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.bin", 0x00000, 0x4000, CRC(6829de8e) SHA1(4ec494883ba358f2ac7ce8d5a623a2f34b5bc843) )
ROM_LOAD( "gr23.bin", 0x04000, 0x4000, CRC(89398700) SHA1(771ee04baa9a31d435a6234490105878713e7845) )
ROM_LOAD( "gr45.bin", 0x08000, 0x4000, CRC(1242033e) SHA1(1a3fe186bb261e2c7d9fbbb2a3103b39bf029b35) )
@@ -1604,7 +1604,7 @@ ROM_START( triviabb )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u6b", 0x00000, 0x4000, CRC(6829de8e) SHA1(4ec494883ba358f2ac7ce8d5a623a2f34b5bc843) )
ROM_LOAD( "gr23.u5b", 0x04000, 0x4000, CRC(89398700) SHA1(771ee04baa9a31d435a6234490105878713e7845) )
ROM_LOAD( "gr45.u4b", 0x08000, 0x4000, CRC(92fb6fb1) SHA1(1a322bd3cfacdf82d4fcc4b4d47f78a701411919) )
@@ -1628,7 +1628,7 @@ ROM_START( triviaes )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "tp_gr3.bin", 0x00000, 0x4000, CRC(6829de8e) SHA1(4ec494883ba358f2ac7ce8d5a623a2f34b5bc843) )
ROM_LOAD( "tp_gr2.bin", 0x04000, 0x4000, CRC(89398700) SHA1(771ee04baa9a31d435a6234490105878713e7845) )
ROM_LOAD( "tp_gr1.bin", 0x08000, 0x4000, CRC(1242033e) SHA1(1a3fe186bb261e2c7d9fbbb2a3103b39bf029b35) )
@@ -1646,7 +1646,7 @@ ROM_START( gimeabrk )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u6b", 0x00000, 0x4000, CRC(e3cdc476) SHA1(2f17c3f84767850d45192dfb507dd2716ecadc20) )
ROM_LOAD( "gr23.u5b", 0x04000, 0x4000, CRC(0555d9c0) SHA1(da0d1f207ad056b2d82a5ad6382372066883d161) )
@@ -1667,7 +1667,7 @@ ROM_START( minigolf )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u6b", 0x00000, 0x4000, CRC(8e24d594) SHA1(d35329fb78f90ec478418917aa1ef06d0967e6f8) )
ROM_LOAD( "gr23.u5b", 0x04000, 0x4000, CRC(3bf355ef) SHA1(691df25b35b00e21ad09d17a21fe98a353aa3dda) )
ROM_LOAD( "gr45.u4b", 0x08000, 0x4000, CRC(8eb14921) SHA1(fda8b8f8e801360310f7cb1aa4c6aea1fa0a4b25) )
@@ -1690,7 +1690,7 @@ ROM_START( minigolf2 )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u6b", 0x00000, 0x4000, CRC(8e24d594) SHA1(d35329fb78f90ec478418917aa1ef06d0967e6f8) )
ROM_LOAD( "gr23.u5b", 0x04000, 0x4000, CRC(3bf355ef) SHA1(691df25b35b00e21ad09d17a21fe98a353aa3dda) )
ROM_LOAD( "gr45.u4b", 0x08000, 0x4000, CRC(8eb14921) SHA1(fda8b8f8e801360310f7cb1aa4c6aea1fa0a4b25) )
@@ -1715,7 +1715,7 @@ ROM_START( toggle )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "tgle-gr0.bin", 0x00000, 0x2000, CRC(0e0e5d0e) SHA1(363858ce08767f8a9b8eaec56405377cdd74b178) )
ROM_LOAD( "tgle-gr1.bin", 0x02000, 0x2000, CRC(3b141ad2) SHA1(72430fd616adbc72d86a5f10672572a31bed0b5d) )
@@ -1744,7 +1744,7 @@ ROM_START( nametune )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "nttgr0.bin", 0x00000, 0x8000, CRC(6b75bb4b) SHA1(e7131d112fb0b36985c5b6383700f55728a1c4fd) )
MOTHERBOARD_PALS
@@ -1771,7 +1771,7 @@ ROM_START( nametune2 )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr 0.u3c", 0x00000, 0x8000, CRC(a0121b80) SHA1(ba38e9b738baac85fa33ae3751d02cb223fa3e65) )
ROM_REGION( 0x00001, "cart_pals", 0) /* PAL's located on the cartridge */
@@ -1800,7 +1800,7 @@ ROM_START( nstocker )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u4c", 0x00000, 0x4000, CRC(fd0c38be) SHA1(b9e12e76f44f2b2b3ca6a57c58f0cbb019b1971f) )
ROM_LOAD( "gr23.u3c", 0x04000, 0x4000, CRC(35d4433e) SHA1(399d04c2a29d993f77d0d5c2d62915081d4a85dd) )
ROM_LOAD( "gr45.u2c", 0x08000, 0x4000, CRC(734b858a) SHA1(71763789807021938b840a88af34aad7f4751298) )
@@ -1831,7 +1831,7 @@ ROM_START( nstocker2 )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u4c", 0x00000, 0x4000, CRC(fd0c38be) SHA1(b9e12e76f44f2b2b3ca6a57c58f0cbb019b1971f) )
ROM_LOAD( "gr23.u3c", 0x04000, 0x4000, CRC(35d4433e) SHA1(399d04c2a29d993f77d0d5c2d62915081d4a85dd) )
ROM_LOAD( "gr45.u2c", 0x08000, 0x4000, CRC(734b858a) SHA1(71763789807021938b840a88af34aad7f4751298) )
@@ -1859,7 +1859,7 @@ ROM_START( sfootbal )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u4c", 0x00000, 0x4000, CRC(e3108d35) SHA1(05b7f1a1a18d7f72a3d3f6102cb8ab42421b7366) )
ROM_LOAD( "gr23.u3c", 0x04000, 0x4000, CRC(5c5af726) SHA1(04cdd476e6689d17273659fb1fe0ca642edbe5a8) )
ROM_LOAD( "gr45.u2c", 0x08000, 0x4000, CRC(e767251e) SHA1(3c05295317a673fb1de5924f27de276d2846d805) )
@@ -1880,7 +1880,7 @@ ROM_START( spiker )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u4c", 0x00000, 0x4000, CRC(0caa6e3e) SHA1(ce6765d44e444d24129ec99f04a41a866a32eee2) )
ROM_LOAD( "gr23.u3c", 0x04000, 0x4000, CRC(970c81f6) SHA1(f22189e172a795d115597feb48ccbc04be3859b9) )
ROM_LOAD( "gr45.u2c", 0x08000, 0x4000, CRC(90ddd737) SHA1(8e1dde2f42e9bf755dedeef218745d1fc54faac7) )
@@ -1900,7 +1900,7 @@ ROM_START( spiker2 ) /* Spiker U.R. 5/5/86 */
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01(__050586).u4c", 0x00000, 0x4000, CRC(1228b7a3) SHA1(70a207714ba7bc4f4dbc492768480afa424b31c0) )
ROM_LOAD( "gr23.u3c", 0x04000, 0x4000, CRC(970c81f6) SHA1(f22189e172a795d115597feb48ccbc04be3859b9) )
ROM_LOAD( "gr45(__050586).u2c", 0x08000, 0x4000, CRC(bf2b413d) SHA1(f0f797853ac1b6e45ff606d7aa5c9350765efd48) )
@@ -1920,7 +1920,7 @@ ROM_START( spiker3 ) /* Spiker U.R. 6/9/86 */
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr01.u4c", 0x00000, 0x4000, CRC(0caa6e3e) SHA1(ce6765d44e444d24129ec99f04a41a866a32eee2) )
ROM_LOAD( "gr23.u3c", 0x04000, 0x4000, CRC(970c81f6) SHA1(f22189e172a795d115597feb48ccbc04be3859b9) )
ROM_LOAD( "gr45.u2c", 0x08000, 0x4000, CRC(90ddd737) SHA1(8e1dde2f42e9bf755dedeef218745d1fc54faac7) )
@@ -1943,7 +1943,7 @@ ROM_START( stompin )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr 01.u4c", 0x00000, 0x4000, CRC(14ffdd1e) SHA1(4528548c07789f9dca2cabd2c64ea1ff8f36a99e) )
ROM_LOAD( "gr 23.u3c", 0x04000, 0x4000, CRC(761abb80) SHA1(a1278e93a4fa66cc4d347954dd45121120da568d) )
ROM_LOAD( "gr 45.u2c", 0x08000, 0x4000, CRC(0d2cf2e6) SHA1(beccb1342127e79a845c4b6b20f20052097ebb98) )
@@ -1965,7 +1965,7 @@ ROM_START( rescraid )
SOUNDBOARD_ROMS
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr 0.a5", 0x00000, 0x8000, CRC(e0dfc133) SHA1(0b120b4410098d8db26b5819043d4fe7c426b948) )
ROM_LOAD( "gr 4.a7", 0x08000, 0x8000, CRC(952ade30) SHA1(f065368f645616d6d84be469ba45a9afa8788eda) )
@@ -1987,10 +1987,10 @@ ROM_START( rescraida )
ROM_LOAD( "cd8-sa.a16", 0x20000, 0x8000, CRC(9dfb50c2) SHA1(24280b48106cbcedeb6d7b10f951db906a123819) )
ROM_LOAD( "cd12-sa.a18", 0x28000, 0x8000, CRC(18c62613) SHA1(a55b4b948805bdd5d1e8c8ff803826a7bbfa383e) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
ROM_LOAD( "sentesnd", 0x00000, 0x2000, CRC(4dd0a525) SHA1(f0c447adc5b67917851a9df978df851247e75c43) )
- ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x10000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "gr0.a5", 0x00000, 0x8000, CRC(e0dfc133) SHA1(0b120b4410098d8db26b5819043d4fe7c426b948) )
ROM_LOAD( "gr4.a7", 0x08000, 0x8000, CRC(952ade30) SHA1(f065368f645616d6d84be469ba45a9afa8788eda) )
@@ -2005,10 +2005,10 @@ ROM_START( grudge )
ROM_LOAD( "grudge.cd0", 0x20000, 0x8000, CRC(e51db1f2) SHA1(57fc0f1df358dd6ea982dcbe9c3f79b3f072be53) )
ROM_LOAD( "grudge.cd4", 0x28000, 0x8000, CRC(6b60e47e) SHA1(5a399942d4ef9b7349fffd07c07092b667cf6247) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
ROM_LOAD( "sentesnd", 0x00000, 0x2000, CRC(4dd0a525) SHA1(f0c447adc5b67917851a9df978df851247e75c43) )
- ROM_REGION( 0x8000, "gfx1", 0 ) /* up to 64k of sprites */
+ ROM_REGION( 0x8000, "gfx1", 0 ) /* up to 64k of sprites */
ROM_LOAD( "grudge.gr0", 0x00000, 0x8000, CRC(b9681f53) SHA1(bb0c516408f1769e018f0ec8707786d4d1e9ef7e) )
MOTHERBOARD_PALS
@@ -2028,14 +2028,14 @@ ROM_START( shrike )
ROM_LOAD( "savgu21.bin", 0x2c000, 0x2000, CRC(c22b93e1) SHA1(15d3925abb3e7e928925f5781f228d1bc0dfe31c) )
ROM_LOAD( "savgu36.bin", 0x2e000, 0x2000, CRC(28431c4a) SHA1(522df8224c559f51c36d2bc01c189b019fabc5eb) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for Z80 */
ROM_LOAD( "sentesnd", 0x00000, 0x2000, CRC(4dd0a525) SHA1(f0c447adc5b67917851a9df978df851247e75c43) )
- ROM_REGION( 0x4000, "68k", 0 ) /* 16k for M68000 */
+ ROM_REGION( 0x4000, "68k", 0 ) /* 16k for M68000 */
ROM_LOAD16_BYTE( "savgu22.bin", 0x00000, 0x2000, CRC(c7787162) SHA1(52d8d148206c6ceb9c28ba747b301121a7790802) )
ROM_LOAD16_BYTE( "savgu24.bin", 0x00001, 0x2000, CRC(a9105ca8) SHA1(1a94a052a4a8d221e1eafec0cd5b0ada6f1987f4) )
- ROM_REGION( 0x20000, "gfx1", 0 ) /* up to 128k of banked sprites */
+ ROM_REGION( 0x20000, "gfx1", 0 ) /* up to 128k of banked sprites */
ROM_LOAD( "savgu8.bin", 0x00000, 0x2000, CRC(499a1d06) SHA1(0f3ed5ff345abb655f5a9f926ac3eb5dbca72a14) )
ROM_LOAD( "savgu7.bin", 0x02000, 0x2000, CRC(ce0607f9) SHA1(0f6708d92e69a67b3eaba98f7ab4ad70eda3c854) )
ROM_LOAD( "savgu6.bin", 0x04000, 0x2000, CRC(01d1b31e) SHA1(8061227f18f08e3b74bc6fc341ed4902c415db6c) )
@@ -2063,9 +2063,9 @@ ROM_END
*
*************************************/
-#define EXPAND_ALL 0x00
-#define EXPAND_NONE 0x3f
-#define SWAP_HALVES 0x80
+#define EXPAND_ALL 0x00
+#define EXPAND_NONE 0x3f
+#define SWAP_HALVES 0x80
static void expand_roms(running_machine &machine, UINT8 cd_rom_mask)
{
diff --git a/src/mame/drivers/bankp.c b/src/mame/drivers/bankp.c
index 04a17eab14b..1e9a3256464 100644
--- a/src/mame/drivers/bankp.c
+++ b/src/mame/drivers/bankp.c
@@ -97,20 +97,20 @@
#include "includes/bankp.h"
-#define MASTER_CLOCK XTAL_15_468MHz
+#define MASTER_CLOCK XTAL_15_468MHz
// Video timing
// PCB measured: H = 15.61khz V = 60.99hz, +/- 0.01hz
// --> VTOTAL should be OK, HTOTAL not 100% certain
-#define PIXEL_CLOCK MASTER_CLOCK/3
+#define PIXEL_CLOCK MASTER_CLOCK/3
-#define HTOTAL 330
-#define HBEND 0+3*8
-#define HBSTART 224+3*8
+#define HTOTAL 330
+#define HBEND 0+3*8
+#define HBSTART 224+3*8
-#define VTOTAL 256
-#define VBEND 0+2*8
-#define VBSTART 224+2*8
+#define VTOTAL 256
+#define VBEND 0+2*8
+#define VBSTART 224+2*8
/*************************************
@@ -243,23 +243,23 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 characters */
- 1024, /* 1024 characters */
- 2, /* 2 bits per pixel */
- { 0, 4 }, /* the bitplanes are packed in one byte */
+ 8,8, /* 8*8 characters */
+ 1024, /* 1024 characters */
+ 2, /* 2 bits per pixel */
+ { 0, 4 }, /* the bitplanes are packed in one byte */
{ STEP4(8*8+3,-1), STEP4(0*8+3,-1) },
{ STEP8(0*8,8) },
- 16*8 /* every char takes 8 consecutive bytes */
+ 16*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout charlayout2 =
{
- 8,8, /* 8*8 characters */
- 2048, /* 2048 characters */
- 3, /* 3 bits per pixel */
- { 0, 2048*8*8, 2*2048*8*8 }, /* the bitplanes are separated */
+ 8,8, /* 8*8 characters */
+ 2048, /* 2048 characters */
+ 3, /* 3 bits per pixel */
+ { 0, 2048*8*8, 2*2048*8*8 }, /* the bitplanes are separated */
{ STEP8(7,-1) },
{ STEP8(0*8,8) },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static GFXDECODE_START( bankp )
@@ -273,7 +273,7 @@ GFXDECODE_END
static const sn76496_config psg_intf =
{
- DEVCB_NULL
+ DEVCB_NULL
};
/*************************************
@@ -346,11 +346,11 @@ ROM_START( bankp )
ROM_LOAD( "epr-6176.7d", 0xc000, 0x2000, CRC(c98ac200) SHA1(1bdb87868deebe03da18280e617530c24118da1c) )
ROM_REGION( 0x04000, "gfx1", 0 )
- ROM_LOAD( "epr-6165.5l", 0x0000, 0x2000, CRC(aef34a93) SHA1(513895cd3144977b3d9b5ac7f2bf40384d69e157) ) /* playfield #1 chars */
+ ROM_LOAD( "epr-6165.5l", 0x0000, 0x2000, CRC(aef34a93) SHA1(513895cd3144977b3d9b5ac7f2bf40384d69e157) ) /* playfield #1 chars */
ROM_LOAD( "epr-6166.5k", 0x2000, 0x2000, CRC(ca13cb11) SHA1(3aca0b0d3f052a742e1cd0b96bfad834e78fcd7d) )
ROM_REGION( 0x0c000, "gfx2", 0 )
- ROM_LOAD( "epr-6172.5b", 0x0000, 0x2000, CRC(c4c4878b) SHA1(423143d81408eda96f87bdc3a306517c473cbe00) ) /* playfield #2 chars */
+ ROM_LOAD( "epr-6172.5b", 0x0000, 0x2000, CRC(c4c4878b) SHA1(423143d81408eda96f87bdc3a306517c473cbe00) ) /* playfield #2 chars */
ROM_LOAD( "epr-6171.5d", 0x2000, 0x2000, CRC(a18165a1) SHA1(9a7513ea84f9231edba4e637df28a1705c8cdeb0) )
ROM_LOAD( "epr-6170.5e", 0x4000, 0x2000, CRC(b58aa8fa) SHA1(432b43cd9af4e3dab579cfd191b731aa11ceb121) )
ROM_LOAD( "epr-6169.5f", 0x6000, 0x2000, CRC(1aa37fce) SHA1(6e2402683145de8972a53c9ec01da9a422392bed) )
@@ -358,9 +358,9 @@ ROM_START( bankp )
ROM_LOAD( "epr-6167.5i", 0xa000, 0x2000, CRC(3fa337e1) SHA1(5fdc45436be27cceb5157bd6201c30e3de28fd7b) )
ROM_REGION( 0x0220, "proms", 0 )
- ROM_LOAD( "pr-6177.8a", 0x0000, 0x020, CRC(eb70c5ae) SHA1(13613dad6c14004278f777d6f3f62712a2a85773) ) /* palette */
- ROM_LOAD( "pr-6178.6f", 0x0020, 0x100, CRC(0acca001) SHA1(54c354d825a24a9085867b114a2cd6835baebe55) ) /* charset #1 lookup table */
- ROM_LOAD( "pr-6179.5a", 0x0120, 0x100, CRC(e53bafdb) SHA1(7a414f6db5476dd7d0217e5b846ed931381eda02) ) /* charset #2 lookup table */
+ ROM_LOAD( "pr-6177.8a", 0x0000, 0x020, CRC(eb70c5ae) SHA1(13613dad6c14004278f777d6f3f62712a2a85773) ) /* palette */
+ ROM_LOAD( "pr-6178.6f", 0x0020, 0x100, CRC(0acca001) SHA1(54c354d825a24a9085867b114a2cd6835baebe55) ) /* charset #1 lookup table */
+ ROM_LOAD( "pr-6179.5a", 0x0120, 0x100, CRC(e53bafdb) SHA1(7a414f6db5476dd7d0217e5b846ed931381eda02) ) /* charset #2 lookup table */
ROM_REGION( 0x025c, "user1", 0 )
ROM_LOAD( "315-5074.2c.bin", 0x0000, 0x025b, CRC(2e57bbba) SHA1(c3e45e8a972342779442e50872a2f5f2d61e9c0a) )
@@ -388,9 +388,9 @@ ROM_START( combh )
ROM_LOAD( "epr-10912.5i", 0xa000, 0x2000, CRC(cbe22738) SHA1(2dbdb593882ec66e783411f02941ce822e1c62a1) )
ROM_REGION( 0x0220, "proms", 0 )
- ROM_LOAD( "pr-10900.8a", 0x0000, 0x020, CRC(f95fcd66) SHA1(ed7bf6691a942f344b0230310876a63a68606922) ) /* palette */
- ROM_LOAD( "pr-10901.6f", 0x0020, 0x100, CRC(6fd981c8) SHA1(0bd2e7b72fd5e055224a675108e2e706cd6f6e5a) ) /* charset #2 lookup table */
- ROM_LOAD( "pr-10902.5a", 0x0120, 0x100, CRC(84d6bded) SHA1(67d9c4c7d7c84eb54ec655a4cf1768ca0cbb047d) ) /* charset #1 lookup table */
+ ROM_LOAD( "pr-10900.8a", 0x0000, 0x020, CRC(f95fcd66) SHA1(ed7bf6691a942f344b0230310876a63a68606922) ) /* palette */
+ ROM_LOAD( "pr-10901.6f", 0x0020, 0x100, CRC(6fd981c8) SHA1(0bd2e7b72fd5e055224a675108e2e706cd6f6e5a) ) /* charset #2 lookup table */
+ ROM_LOAD( "pr-10902.5a", 0x0120, 0x100, CRC(84d6bded) SHA1(67d9c4c7d7c84eb54ec655a4cf1768ca0cbb047d) ) /* charset #1 lookup table */
ROM_REGION( 0x025c, "user1", 0 )
ROM_LOAD( "315-5074.2c.bin", 0x0000, 0x025b, CRC(2e57bbba) SHA1(c3e45e8a972342779442e50872a2f5f2d61e9c0a) )
diff --git a/src/mame/drivers/baraduke.c b/src/mame/drivers/baraduke.c
index a1c96275fa2..b2fea834e83 100644
--- a/src/mame/drivers/baraduke.c
+++ b/src/mame/drivers/baraduke.c
@@ -128,19 +128,19 @@ READ8_MEMBER(baraduke_state::inputport_r)
{
switch (m_inputport_selected)
{
- case 0x00: /* DSW A (bits 0-4) */
+ case 0x00: /* DSW A (bits 0-4) */
return (ioport("DSWA")->read() & 0xf8) >> 3;
- case 0x01: /* DSW A (bits 5-7), DSW B (bits 0-1) */
+ case 0x01: /* DSW A (bits 5-7), DSW B (bits 0-1) */
return ((ioport("DSWA")->read() & 0x07) << 2) | ((ioport("DSWB")->read() & 0xc0) >> 6);
- case 0x02: /* DSW B (bits 2-6) */
+ case 0x02: /* DSW B (bits 2-6) */
return (ioport("DSWB")->read() & 0x3e) >> 1;
- case 0x03: /* DSW B (bit 7), DSW C (bits 0-3) */
+ case 0x03: /* DSW B (bit 7), DSW C (bits 0-3) */
return ((ioport("DSWB")->read() & 0x01) << 4) | (ioport("EDGE")->read() & 0x0f);
- case 0x04: /* coins, start */
+ case 0x04: /* coins, start */
return ioport("IN0")->read();
- case 0x05: /* 2P controls */
+ case 0x05: /* 2P controls */
return ioport("IN2")->read();
- case 0x06: /* 1P controls */
+ case 0x06: /* 1P controls */
return ioport("IN1")->read();
default:
return 0xff;
@@ -161,15 +161,15 @@ WRITE8_MEMBER(baraduke_state::baraduke_irq_ack_w)
static ADDRESS_MAP_START( baraduke_map, AS_PROGRAM, 8, baraduke_state )
- AM_RANGE(0x0000, 0x1fff) AM_READWRITE(baraduke_spriteram_r,baraduke_spriteram_w) AM_SHARE("spriteram") /* Sprite RAM */
- AM_RANGE(0x2000, 0x3fff) AM_READWRITE(baraduke_videoram_r,baraduke_videoram_w) AM_SHARE("videoram") /* Video RAM */
- AM_RANGE(0x4000, 0x43ff) AM_DEVREADWRITE_LEGACY("namco", namcos1_cus30_r,namcos1_cus30_w) /* PSG device, shared RAM */
+ AM_RANGE(0x0000, 0x1fff) AM_READWRITE(baraduke_spriteram_r,baraduke_spriteram_w) AM_SHARE("spriteram") /* Sprite RAM */
+ AM_RANGE(0x2000, 0x3fff) AM_READWRITE(baraduke_videoram_r,baraduke_videoram_w) AM_SHARE("videoram") /* Video RAM */
+ AM_RANGE(0x4000, 0x43ff) AM_DEVREADWRITE_LEGACY("namco", namcos1_cus30_r,namcos1_cus30_w) /* PSG device, shared RAM */
AM_RANGE(0x4800, 0x4fff) AM_READWRITE(baraduke_textram_r,baraduke_textram_w) AM_SHARE("textram")/* video RAM (text layer) */
- AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog_reset_w) /* watchdog reset */
- AM_RANGE(0x8800, 0x8800) AM_WRITE(baraduke_irq_ack_w) /* irq acknowledge */
- AM_RANGE(0xb000, 0xb002) AM_WRITE(baraduke_scroll0_w) /* scroll (layer 0) */
- AM_RANGE(0xb004, 0xb006) AM_WRITE(baraduke_scroll1_w) /* scroll (layer 1) */
- AM_RANGE(0x6000, 0xffff) AM_ROM /* ROM */
+ AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog_reset_w) /* watchdog reset */
+ AM_RANGE(0x8800, 0x8800) AM_WRITE(baraduke_irq_ack_w) /* irq acknowledge */
+ AM_RANGE(0xb000, 0xb002) AM_WRITE(baraduke_scroll0_w) /* scroll (layer 0) */
+ AM_RANGE(0xb004, 0xb006) AM_WRITE(baraduke_scroll1_w) /* scroll (layer 1) */
+ AM_RANGE(0x6000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END
READ8_MEMBER(baraduke_state::soundkludge_r)
@@ -180,14 +180,14 @@ READ8_MEMBER(baraduke_state::soundkludge_r)
static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, baraduke_state )
AM_RANGE(0x0000, 0x001f) AM_READWRITE_LEGACY(m6801_io_r,m6801_io_w)/* internal registers */
- AM_RANGE(0x0080, 0x00ff) AM_RAM /* built in RAM */
- AM_RANGE(0x1105, 0x1105) AM_READ(soundkludge_r) /* cures speech */
+ AM_RANGE(0x0080, 0x00ff) AM_RAM /* built in RAM */
+ AM_RANGE(0x1105, 0x1105) AM_READ(soundkludge_r) /* cures speech */
AM_RANGE(0x1000, 0x13ff) AM_DEVREADWRITE_LEGACY("namco", namcos1_cus30_r, namcos1_cus30_w) /* PSG device, shared RAM */
- AM_RANGE(0x8000, 0xbfff) AM_ROM /* MCU external ROM */
- AM_RANGE(0x8000, 0x8000) AM_WRITENOP /* watchdog reset? */
- AM_RANGE(0x8800, 0x8800) AM_WRITENOP /* irq acknoledge? */
- AM_RANGE(0xc000, 0xc7ff) AM_RAM /* RAM */
- AM_RANGE(0xf000, 0xffff) AM_ROM /* MCU internal ROM */
+ AM_RANGE(0x8000, 0xbfff) AM_ROM /* MCU external ROM */
+ AM_RANGE(0x8000, 0x8000) AM_WRITENOP /* watchdog reset? */
+ AM_RANGE(0x8800, 0x8800) AM_WRITENOP /* irq acknoledge? */
+ AM_RANGE(0xc000, 0xc7ff) AM_RAM /* RAM */
+ AM_RANGE(0xf000, 0xffff) AM_ROM /* MCU internal ROM */
ADDRESS_MAP_END
@@ -197,10 +197,10 @@ READ8_MEMBER(baraduke_state::readFF)
}
static ADDRESS_MAP_START( mcu_port_map, AS_IO, 8, baraduke_state )
- AM_RANGE(M6801_PORT1, M6801_PORT1) AM_READ(inputport_r) /* input ports read */
- AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(inputport_select_w) /* input port select */
- AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READ(readFF) /* leds won't work otherwise */
- AM_RANGE(M6801_PORT2, M6801_PORT2) AM_WRITE(baraduke_lamps_w) /* lamps */
+ AM_RANGE(M6801_PORT1, M6801_PORT1) AM_READ(inputport_r) /* input ports read */
+ AM_RANGE(M6801_PORT1, M6801_PORT1) AM_WRITE(inputport_select_w) /* input port select */
+ AM_RANGE(M6801_PORT2, M6801_PORT2) AM_READ(readFF) /* leds won't work otherwise */
+ AM_RANGE(M6801_PORT2, M6801_PORT2) AM_WRITE(baraduke_lamps_w) /* lamps */
ADDRESS_MAP_END
@@ -208,52 +208,52 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( baraduke )
PORT_START("DSWA")
PORT_SERVICE_DIPLOC(0x80, IP_ACTIVE_LOW, "SWA:1" )
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWA:2,3")
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWA:2,3")
PORT_DIPSETTING( 0x40, "2" )
PORT_DIPSETTING( 0x60, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:4,5")
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:4,5")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:6")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWA:7,8")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWA:7,8")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_START("DSWB")
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:1,2")
- PORT_DIPSETTING( 0x80, "Every 10k" ) // "B"
- PORT_DIPSETTING( 0xc0, "10k And Every 20k" ) // "A" (default)
- PORT_DIPSETTING( 0x40, "Every 20k" ) // "C"
- PORT_DIPSETTING( 0x00, DEF_STR( None ) ) // "D"
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:3,4")
- PORT_DIPSETTING( 0x20, DEF_STR( Easy ) ) // "B"
- PORT_DIPSETTING( 0x30, DEF_STR( Normal ) ) // "A" (default)
- PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) // "C"
- PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) ) // "D"
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:1,2")
+ PORT_DIPSETTING( 0x80, "Every 10k" ) // "B"
+ PORT_DIPSETTING( 0xc0, "10k And Every 20k" ) // "A" (default)
+ PORT_DIPSETTING( 0x40, "Every 20k" ) // "C"
+ PORT_DIPSETTING( 0x00, DEF_STR( None ) ) // "D"
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:3,4")
+ PORT_DIPSETTING( 0x20, DEF_STR( Easy ) ) // "B"
+ PORT_DIPSETTING( 0x30, DEF_STR( Normal ) ) // "A" (default)
+ PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) // "C"
+ PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) ) // "D"
/* To advance rounds: set SWB:5 to ON, coin up game and push 1P start.
- Use joystick to select round 1 - 48. Set SWB:5 to OFF to play selected round. */
- PORT_DIPNAME( 0x08, 0x08, "Round Select" ) PORT_DIPLOCATION("SWB:5")
+ Use joystick to select round 1 - 48. Set SWB:5 to OFF to play selected round. */
+ PORT_DIPNAME( 0x08, 0x08, "Round Select" ) PORT_DIPLOCATION("SWB:5")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, "Freeze" ) PORT_DIPLOCATION("SWB:6")
+ PORT_DIPNAME( 0x04, 0x04, "Freeze" ) PORT_DIPLOCATION("SWB:6")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "Allow Continue From Last Level" ) PORT_DIPLOCATION("SWB:7")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SWB:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SWB:8" ) /* Listed as "Unused" */
PORT_START("EDGE")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) /* service switch from the edge connector */
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("EDGE21:1") /* edge connector Pin 21 */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) /* service switch from the edge connector */
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("EDGE21:1") /* edge connector Pin 21 */
PORT_DIPSETTING( 0x02, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -289,36 +289,36 @@ static INPUT_PORTS_START( metrocrs )
PORT_INCLUDE( baraduke )
PORT_MODIFY("DSWA")
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:2,3")
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:2,3")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x60, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:4,5")
- PORT_DIPSETTING( 0x10, DEF_STR( Easy ) ) // "B"
- PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // "A" (default)
- PORT_DIPSETTING( 0x08, DEF_STR( Hard ) ) // "C"
- PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) ) // "D"
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:4,5")
+ PORT_DIPSETTING( 0x10, DEF_STR( Easy ) ) // "B"
+ PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // "A" (default)
+ PORT_DIPSETTING( 0x08, DEF_STR( Hard ) ) // "C"
+ PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) ) // "D"
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SWA:6") // metrocrs: after round 8, metrocrsa: after round 4
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
PORT_MODIFY("DSWB")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:1")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:1")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
/* To advance rounds: set SWB:2 to ON, coin up game and push 1P start.
- Use joystick to select round 1 - 32. Set SWB:2 to OFF to play selected round. */
- PORT_DIPNAME( 0x40, 0x40, "Round Select" ) PORT_DIPLOCATION("SWB:2")
+ Use joystick to select round 1 - 32. Set SWB:2 to OFF to play selected round. */
+ PORT_DIPNAME( 0x40, 0x40, "Round Select" ) PORT_DIPLOCATION("SWB:2")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SWB:3")
+ PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SWB:3")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SWB:4" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SWB:5" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SWB:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SWB:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SWB:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SWB:5" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SWB:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SWB:7" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -352,7 +352,7 @@ static const gfx_layout spritelayout =
{ 0, 1, 2, 3 },
{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4,
8*4, 9*4, 10*4, 11*4, 12*4, 13*4, 14*4, 15*4 },
- { 8*8*0, 8*8*1, 8*8*2, 8*8*3, 8*8*4, 8*8*5, 8*8*6, 8*8*7,
+ { 8*8*0, 8*8*1, 8*8*2, 8*8*3, 8*8*4, 8*8*5, 8*8*6, 8*8*7,
8*8*8, 8*8*9, 8*8*10, 8*8*11, 8*8*12, 8*8*13, 8*8*14, 8*8*15 },
128*8
};
@@ -368,8 +368,8 @@ GFXDECODE_END
static const namco_interface namco_config =
{
- 8, /* number of voices */
- 0 /* stereo */
+ 8, /* number of voices */
+ 0 /* stereo */
};
@@ -386,7 +386,7 @@ static MACHINE_CONFIG_START( baraduke, baraduke_state )
MCFG_CPU_IO_MAP(mcu_port_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", baraduke_state, irq0_line_hold)
- MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* we need heavy synch */
+ MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* we need heavy synch */
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
@@ -418,27 +418,27 @@ ROM_START( aliensec )
ROM_LOAD( "bd2_2.9b", 0xc000, 0x04000, CRC(383e5458) SHA1(091f25e287f0a81649c9a4fa196ebe4112a82295) )
ROM_REGION( 0x10000 , "mcu", 0 ) /* MCU code */
- ROM_LOAD( "bd1_4.3b", 0x8000, 0x4000, CRC(abda0fe7) SHA1(f7edcb5f9fa47bb38a8207af5678cf4ccc243547) ) /* subprogram for the MCU */
- ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
+ ROM_LOAD( "bd1_4.3b", 0x8000, 0x4000, CRC(abda0fe7) SHA1(f7edcb5f9fa47bb38a8207af5678cf4ccc243547) ) /* subprogram for the MCU */
+ ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
ROM_REGION( 0x02000, "gfx1", 0 )
- ROM_LOAD( "bd1_5.3j", 0x00000, 0x2000, CRC(706b7fee) SHA1(e5694289bd4346c1a3a004feaa940710cea755c6) ) /* characters */
+ ROM_LOAD( "bd1_5.3j", 0x00000, 0x2000, CRC(706b7fee) SHA1(e5694289bd4346c1a3a004feaa940710cea755c6) ) /* characters */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "bd2_8.4p", 0x00000, 0x4000, CRC(432bd7d9) SHA1(876e071b514864d434ab49002c5432f9c88665c1) ) /* tiles */
+ ROM_LOAD( "bd2_8.4p", 0x00000, 0x4000, CRC(432bd7d9) SHA1(876e071b514864d434ab49002c5432f9c88665c1) ) /* tiles */
ROM_LOAD( "bd1_7.4n", 0x04000, 0x4000, CRC(0d7ebec9) SHA1(6b86b476db61f5760bc8610b51adc1115cfdad96) )
ROM_LOAD( "bd2_6.4m", 0x08000, 0x4000, CRC(f4c1df60) SHA1(8a3a6682884b227fe4293adb09624a4389ee660d) )
/* 0xc000-0xffff will be unpacked from 0x8000-0xbfff */
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "bd1_9.8k", 0x00000, 0x4000, CRC(87a29acc) SHA1(3aa00efc95d1da50f6e4637d101640328287dea1) ) /* sprites */
+ ROM_LOAD( "bd1_9.8k", 0x00000, 0x4000, CRC(87a29acc) SHA1(3aa00efc95d1da50f6e4637d101640328287dea1) ) /* sprites */
ROM_LOAD( "bd1_10.8l", 0x04000, 0x4000, CRC(72b6d20c) SHA1(e40b48dacefce4fd62ab28d3e6ff3932d4ff005b) )
ROM_LOAD( "bd1_11.8m", 0x08000, 0x4000, CRC(3076af9c) SHA1(57ce09b298fd0bae94e4d8c817a34ce812c3ddfc) )
ROM_LOAD( "bd1_12.8n", 0x0c000, 0x4000, CRC(8b4c09a3) SHA1(46e0ef39cb313c6780f6137769153dc4a054c77f) )
ROM_REGION( 0x1000, "proms", 0 )
- ROM_LOAD( "bd1-1.1n", 0x0000, 0x0800, CRC(0d78ebc6) SHA1(0a0c1e23eb4d1748c4e6c448284d785286c77911) ) /* Blue + Green palette (prom type mb7138e) */
- ROM_LOAD( "bd1-2.2m", 0x0800, 0x0800, CRC(03f7241f) SHA1(16ae059f084ba0ac4ddaa95dbeed113295f106ea) ) /* Red palette (prom type mb7128e) */
+ ROM_LOAD( "bd1-1.1n", 0x0000, 0x0800, CRC(0d78ebc6) SHA1(0a0c1e23eb4d1748c4e6c448284d785286c77911) ) /* Blue + Green palette (prom type mb7138e) */
+ ROM_LOAD( "bd1-2.2m", 0x0800, 0x0800, CRC(03f7241f) SHA1(16ae059f084ba0ac4ddaa95dbeed113295f106ea) ) /* Red palette (prom type mb7128e) */
ROM_END
ROM_START( baraduke )
@@ -448,83 +448,83 @@ ROM_START( baraduke )
ROM_LOAD( "bd1_2.9b", 0xc000, 0x04000, CRC(40617fcd) SHA1(51d17f3a2fc96e13c8ef5952efece526e0fb33f4) )
ROM_REGION( 0x10000 , "mcu", 0 ) /* MCU code */
- ROM_LOAD( "bd1_4b.3b", 0x8000, 0x4000, CRC(a47ecd32) SHA1(a2a75e65deb28224a5729ed134ee4d5ea8c50706) ) /* subprogram for the MCU */
- ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
+ ROM_LOAD( "bd1_4b.3b", 0x8000, 0x4000, CRC(a47ecd32) SHA1(a2a75e65deb28224a5729ed134ee4d5ea8c50706) ) /* subprogram for the MCU */
+ ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
ROM_REGION( 0x02000, "gfx1", 0 )
- ROM_LOAD( "bd1_5.3j", 0x00000, 0x2000, CRC(706b7fee) SHA1(e5694289bd4346c1a3a004feaa940710cea755c6) ) /* characters */
+ ROM_LOAD( "bd1_5.3j", 0x00000, 0x2000, CRC(706b7fee) SHA1(e5694289bd4346c1a3a004feaa940710cea755c6) ) /* characters */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "bd1_8.4p", 0x00000, 0x4000, CRC(b0bb0710) SHA1(797832aea59bf80342fd2a3505645f2766bde65b) ) /* tiles */
+ ROM_LOAD( "bd1_8.4p", 0x00000, 0x4000, CRC(b0bb0710) SHA1(797832aea59bf80342fd2a3505645f2766bde65b) ) /* tiles */
ROM_LOAD( "bd1_7.4n", 0x04000, 0x4000, CRC(0d7ebec9) SHA1(6b86b476db61f5760bc8610b51adc1115cfdad96) )
ROM_LOAD( "bd1_6.4m", 0x08000, 0x4000, CRC(e5da0896) SHA1(abb8bf7e9dc1c60bc0a20a691109fb145bb1d8e0) )
/* 0xc000-0xffff will be unpacked from 0x8000-0xbfff */
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "bd1_9.8k", 0x00000, 0x4000, CRC(87a29acc) SHA1(3aa00efc95d1da50f6e4637d101640328287dea1) ) /* sprites */
+ ROM_LOAD( "bd1_9.8k", 0x00000, 0x4000, CRC(87a29acc) SHA1(3aa00efc95d1da50f6e4637d101640328287dea1) ) /* sprites */
ROM_LOAD( "bd1_10.8l", 0x04000, 0x4000, CRC(72b6d20c) SHA1(e40b48dacefce4fd62ab28d3e6ff3932d4ff005b) )
ROM_LOAD( "bd1_11.8m", 0x08000, 0x4000, CRC(3076af9c) SHA1(57ce09b298fd0bae94e4d8c817a34ce812c3ddfc) )
ROM_LOAD( "bd1_12.8n", 0x0c000, 0x4000, CRC(8b4c09a3) SHA1(46e0ef39cb313c6780f6137769153dc4a054c77f) )
ROM_REGION( 0x1000, "proms", 0 )
- ROM_LOAD( "bd1-1.1n", 0x0000, 0x0800, CRC(0d78ebc6) SHA1(0a0c1e23eb4d1748c4e6c448284d785286c77911) ) /* Blue + Green palette (prom type mb7138e) */
- ROM_LOAD( "bd1-2.2m", 0x0800, 0x0800, CRC(03f7241f) SHA1(16ae059f084ba0ac4ddaa95dbeed113295f106ea) ) /* Red palette (prom type mb7128e) */
+ ROM_LOAD( "bd1-1.1n", 0x0000, 0x0800, CRC(0d78ebc6) SHA1(0a0c1e23eb4d1748c4e6c448284d785286c77911) ) /* Blue + Green palette (prom type mb7138e) */
+ ROM_LOAD( "bd1-2.2m", 0x0800, 0x0800, CRC(03f7241f) SHA1(16ae059f084ba0ac4ddaa95dbeed113295f106ea) ) /* Red palette (prom type mb7128e) */
ROM_END
ROM_START( metrocrs )
ROM_REGION( 0x10000, "maincpu", 0 ) /* 6809 code */
- ROM_LOAD( "mc1-3.9c", 0x6000, 0x02000, CRC(3390b33c) SHA1(0733aece368acc913e2ff32e8817194cb4b630fb) )
- ROM_LOAD( "mc1-1.9a", 0x8000, 0x04000, CRC(10b0977e) SHA1(6266d173b55075da1f252092bf38185880bc4969) )
- ROM_LOAD( "mc1-2.9b", 0xc000, 0x04000, CRC(5c846f35) SHA1(3c98a0f1131f2e2477fc75a588123c57ff5350ad) )
+ ROM_LOAD( "mc1-3.9c", 0x6000, 0x02000, CRC(3390b33c) SHA1(0733aece368acc913e2ff32e8817194cb4b630fb) )
+ ROM_LOAD( "mc1-1.9a", 0x8000, 0x04000, CRC(10b0977e) SHA1(6266d173b55075da1f252092bf38185880bc4969) )
+ ROM_LOAD( "mc1-2.9b", 0xc000, 0x04000, CRC(5c846f35) SHA1(3c98a0f1131f2e2477fc75a588123c57ff5350ad) )
ROM_REGION( 0x10000 , "mcu", 0 ) /* MCU code */
- ROM_LOAD( "mc1-4.3b", 0x8000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) /* subprogram for the MCU */
- ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
+ ROM_LOAD( "mc1-4.3b", 0x8000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) /* subprogram for the MCU */
+ ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
ROM_REGION( 0x02000, "gfx1", 0 )
- ROM_LOAD( "mc1-5.3j", 0x00000, 0x2000, CRC(9b5ea33a) SHA1(a8108e71e3440b645ebdb5cdbd87712151299789) ) /* characters */
+ ROM_LOAD( "mc1-5.3j", 0x00000, 0x2000, CRC(9b5ea33a) SHA1(a8108e71e3440b645ebdb5cdbd87712151299789) ) /* characters */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "mc1-7.4p", 0x00000, 0x4000, CRC(c9dfa003) SHA1(86e8f9fc25de67691ce5385d93b723e7eb836b2b) ) /* tiles */
- ROM_LOAD( "mc1-6.4n", 0x04000, 0x4000, CRC(9686dc3c) SHA1(1caf712eedb1f70559169685e5421e11866e518c) )
+ ROM_LOAD( "mc1-7.4p", 0x00000, 0x4000, CRC(c9dfa003) SHA1(86e8f9fc25de67691ce5385d93b723e7eb836b2b) ) /* tiles */
+ ROM_LOAD( "mc1-6.4n", 0x04000, 0x4000, CRC(9686dc3c) SHA1(1caf712eedb1f70559169685e5421e11866e518c) )
ROM_FILL( 0x08000, 0x4000, 0xff )
/* 0xc000-0xffff will be unpacked from 0x8000-0xbfff */
ROM_REGION( 0x08000, "gfx3", 0 )
- ROM_LOAD( "mc1-8.8k", 0x00000, 0x4000, CRC(265b31fa) SHA1(d46e6db5d6f325954d2b6159157b11e10fe5838d) ) /* sprites */
- ROM_LOAD( "mc1-9.8l", 0x04000, 0x4000, CRC(541ec029) SHA1(a3096d8405b6bbc862b03773889f6cbd43739f5b) )
+ ROM_LOAD( "mc1-8.8k", 0x00000, 0x4000, CRC(265b31fa) SHA1(d46e6db5d6f325954d2b6159157b11e10fe5838d) ) /* sprites */
+ ROM_LOAD( "mc1-9.8l", 0x04000, 0x4000, CRC(541ec029) SHA1(a3096d8405b6bbc862b03773889f6cbd43739f5b) )
ROM_REGION( 0x1000, "proms", 0 )
- ROM_LOAD( "mc1-1.1n", 0x0000, 0x0800, CRC(32a78a8b) SHA1(545a59bc3c5868ac1749d2947210110205fb3da2) ) /* Blue + Green palette */
- ROM_LOAD( "mc1-2.2m", 0x0800, 0x0800, CRC(6f4dca7b) SHA1(781134c02853aded2cba63719c0e4c78b227da1c) ) /* Red palette */
+ ROM_LOAD( "mc1-1.1n", 0x0000, 0x0800, CRC(32a78a8b) SHA1(545a59bc3c5868ac1749d2947210110205fb3da2) ) /* Blue + Green palette */
+ ROM_LOAD( "mc1-2.2m", 0x0800, 0x0800, CRC(6f4dca7b) SHA1(781134c02853aded2cba63719c0e4c78b227da1c) ) /* Red palette */
ROM_END
ROM_START( metrocrsa )
ROM_REGION( 0x10000, "maincpu", 0 ) /* 6809 code */
- ROM_LOAD( "mc2-3.9b", 0x6000, 0x02000, CRC(ffe08075) SHA1(4e1341d5a9a58f171e1e6f9aa18092d5557a6947) )
- ROM_LOAD( "mc2-1.9a", 0x8000, 0x04000, CRC(05a239ea) SHA1(3e7c7d305d0f48e2431d60b176a0cb451ddc4637) )
- ROM_LOAD( "mc2-2.9a", 0xc000, 0x04000, CRC(db9b0e6d) SHA1(2772b59fe7dc0e78ee29dd001a6bba75b94e0334) )
+ ROM_LOAD( "mc2-3.9b", 0x6000, 0x02000, CRC(ffe08075) SHA1(4e1341d5a9a58f171e1e6f9aa18092d5557a6947) )
+ ROM_LOAD( "mc2-1.9a", 0x8000, 0x04000, CRC(05a239ea) SHA1(3e7c7d305d0f48e2431d60b176a0cb451ddc4637) )
+ ROM_LOAD( "mc2-2.9a", 0xc000, 0x04000, CRC(db9b0e6d) SHA1(2772b59fe7dc0e78ee29dd001a6bba75b94e0334) )
ROM_REGION( 0x10000 , "mcu", 0 ) /* MCU code */
- ROM_LOAD( "mc1-4.3b", 0x8000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) /* subprogram for the MCU */
- ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
+ ROM_LOAD( "mc1-4.3b", 0x8000, 0x2000, CRC(9c88f898) SHA1(d6d0345002b70c5aca41c664f34181715cd87669) ) /* subprogram for the MCU */
+ ROM_LOAD( "cus60-60a1.mcu", 0xf000, 0x1000, CRC(076ea82a) SHA1(22b5e62e26390d7d5cacc0503c7aa5ed524204df) ) /* MCU internal code */
ROM_REGION( 0x02000, "gfx1", 0 )
- ROM_LOAD( "mc1-5.3j", 0x00000, 0x2000, CRC(9b5ea33a) SHA1(a8108e71e3440b645ebdb5cdbd87712151299789) ) /* characters */
+ ROM_LOAD( "mc1-5.3j", 0x00000, 0x2000, CRC(9b5ea33a) SHA1(a8108e71e3440b645ebdb5cdbd87712151299789) ) /* characters */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "mc1-7.4p", 0x00000, 0x4000, CRC(c9dfa003) SHA1(86e8f9fc25de67691ce5385d93b723e7eb836b2b) ) /* tiles */
- ROM_LOAD( "mc1-6.4n", 0x04000, 0x4000, CRC(9686dc3c) SHA1(1caf712eedb1f70559169685e5421e11866e518c) )
+ ROM_LOAD( "mc1-7.4p", 0x00000, 0x4000, CRC(c9dfa003) SHA1(86e8f9fc25de67691ce5385d93b723e7eb836b2b) ) /* tiles */
+ ROM_LOAD( "mc1-6.4n", 0x04000, 0x4000, CRC(9686dc3c) SHA1(1caf712eedb1f70559169685e5421e11866e518c) )
ROM_FILL( 0x08000, 0x4000, 0xff )
/* 0xc000-0xffff will be unpacked from 0x8000-0xbfff */
ROM_REGION( 0x08000, "gfx3", 0 )
- ROM_LOAD( "mc1-8.8k", 0x00000, 0x4000, CRC(265b31fa) SHA1(d46e6db5d6f325954d2b6159157b11e10fe5838d) ) /* sprites */
- ROM_LOAD( "mc1-9.8l", 0x04000, 0x4000, CRC(541ec029) SHA1(a3096d8405b6bbc862b03773889f6cbd43739f5b) )
+ ROM_LOAD( "mc1-8.8k", 0x00000, 0x4000, CRC(265b31fa) SHA1(d46e6db5d6f325954d2b6159157b11e10fe5838d) ) /* sprites */
+ ROM_LOAD( "mc1-9.8l", 0x04000, 0x4000, CRC(541ec029) SHA1(a3096d8405b6bbc862b03773889f6cbd43739f5b) )
ROM_REGION( 0x1000, "proms", 0 )
- ROM_LOAD( "mc1-1.1n", 0x0000, 0x0800, CRC(32a78a8b) SHA1(545a59bc3c5868ac1749d2947210110205fb3da2) ) /* Blue + Green palette */
- ROM_LOAD( "mc1-2.2m", 0x0800, 0x0800, CRC(6f4dca7b) SHA1(781134c02853aded2cba63719c0e4c78b227da1c) ) /* Red palette */
+ ROM_LOAD( "mc1-1.1n", 0x0000, 0x0800, CRC(32a78a8b) SHA1(545a59bc3c5868ac1749d2947210110205fb3da2) ) /* Blue + Green palette */
+ ROM_LOAD( "mc1-2.2m", 0x0800, 0x0800, CRC(6f4dca7b) SHA1(781134c02853aded2cba63719c0e4c78b227da1c) ) /* Red palette */
ROM_END
diff --git a/src/mame/drivers/bartop52.c b/src/mame/drivers/bartop52.c
index 5441a53aaba..8b6448f010f 100644
--- a/src/mame/drivers/bartop52.c
+++ b/src/mame/drivers/bartop52.c
@@ -41,11 +41,11 @@ static ADDRESS_MAP_START(a5200_mem, AS_PROGRAM, 8, bartop52_state )
AM_RANGE(0xf800, 0xffff) AM_ROM
ADDRESS_MAP_END
-#define JOYSTICK_DELTA 10
-#define JOYSTICK_SENSITIVITY 200
+#define JOYSTICK_DELTA 10
+#define JOYSTICK_SENSITIVITY 200
static INPUT_PORTS_START(bartop52)
- PORT_START("djoy_b") /* IN3 digital joystick buttons (GTIA button bits) */
+ PORT_START("djoy_b") /* IN3 digital joystick buttons (GTIA button bits) */
PORT_BIT(0x01, 0x01, IPT_BUTTON1) PORT_CODE(JOYCODE_BUTTON1) PORT_PLAYER(1)
PORT_BIT(0x02, 0x02, IPT_BUTTON1) PORT_CODE(JOYCODE_BUTTON2) PORT_PLAYER(2)
PORT_BIT(0x04, 0x04, IPT_UNUSED)
@@ -55,44 +55,44 @@ static INPUT_PORTS_START(bartop52)
PORT_BIT(0x40, 0x40, IPT_UNUSED)
PORT_BIT(0x80, 0x80, IPT_UNUSED)
- PORT_START("keypad_0")
- PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("(Break)") PORT_CODE(KEYCODE_PAUSE) // is this correct?
+ PORT_START("keypad_0")
+ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("(Break)") PORT_CODE(KEYCODE_PAUSE) // is this correct?
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Wind-Up") PORT_CODE(KEYCODE_ENTER_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("[0]") PORT_CODE(KEYCODE_0_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("No Wind-Up") PORT_CODE(KEYCODE_PLUS_PAD)
- PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
- PORT_START("keypad_1")
+ PORT_START("keypad_1")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Reset") PORT_CODE(KEYCODE_F3)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Fast Ball Low") PORT_CODE(KEYCODE_9_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Change-Up Low") PORT_CODE(KEYCODE_8_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Curve Low") PORT_CODE(KEYCODE_7_PAD)
- PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
- PORT_START("keypad_2")
+ PORT_START("keypad_2")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME(DEF_STR(Pause)) PORT_CODE(KEYCODE_F2)
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Fast Ball Med.") PORT_CODE(KEYCODE_6_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Change-Up Med.") PORT_CODE(KEYCODE_5_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Curve Med") PORT_CODE(KEYCODE_4_PAD)
- PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
- PORT_START("keypad_3")
+ PORT_START("keypad_3")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_START) PORT_NAME("Start")
PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Fast Ball High") PORT_CODE(KEYCODE_3_PAD)
PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Change-Up High") PORT_CODE(KEYCODE_2_PAD)
PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("Curve High") PORT_CODE(KEYCODE_1_PAD)
- PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_BIT(0xf0, IP_ACTIVE_HIGH, IPT_UNUSED)
- PORT_START("analog_0")
+ PORT_START("analog_0")
PORT_BIT(0xff, 0x72, IPT_AD_STICK_X) PORT_SENSITIVITY(JOYSTICK_SENSITIVITY) PORT_KEYDELTA(JOYSTICK_DELTA) PORT_MINMAX(0x00,0xe4) PORT_PLAYER(1)
- PORT_START("analog_1")
+ PORT_START("analog_1")
PORT_BIT(0xff, 0x72, IPT_AD_STICK_Y) PORT_SENSITIVITY(JOYSTICK_SENSITIVITY) PORT_KEYDELTA(JOYSTICK_DELTA) PORT_MINMAX(0x00,0xe4) PORT_PLAYER(1)
- PORT_START("analog_2")
+ PORT_START("analog_2")
PORT_BIT(0xff, 0x72, IPT_AD_STICK_X) PORT_SENSITIVITY(JOYSTICK_SENSITIVITY) PORT_KEYDELTA(JOYSTICK_DELTA) PORT_MINMAX(0x00,0xe4) PORT_PLAYER(2)
- PORT_START("analog_3")
+ PORT_START("analog_3")
PORT_BIT(0xff, 0x72, IPT_AD_STICK_Y) PORT_SENSITIVITY(JOYSTICK_SENSITIVITY) PORT_KEYDELTA(JOYSTICK_DELTA) PORT_MINMAX(0x00,0xe4) PORT_PLAYER(2)
INPUT_PORTS_END
diff --git a/src/mame/drivers/batman.c b/src/mame/drivers/batman.c
index ff7f782f8a3..45170c9d834 100644
--- a/src/mame/drivers/batman.c
+++ b/src/mame/drivers/batman.c
@@ -157,7 +157,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( batman )
- PORT_START("260000") /* 260000 */
+ PORT_START("260000") /* 260000 */
PORT_BIT( 0x01ff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
@@ -167,17 +167,17 @@ static INPUT_PORTS_START( batman )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
- PORT_START("260002") /* 260002 */
+ PORT_START("260002") /* 260002 */
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("260010") /* 260010 */
+ PORT_START("260010") /* 260010 */
PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNUSED ) /* Input buffer full (@260030) */
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED ) /* Output buffer full (@260040) */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNUSED ) /* Input buffer full (@260030) */
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED ) /* Output buffer full (@260040) */
PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_INCLUDE( atarijsa_iii ) /* audio board port */
+ PORT_INCLUDE( atarijsa_iii ) /* audio board port */
INPUT_PORTS_END
@@ -213,9 +213,9 @@ static const gfx_layout pfmolayout =
static GFXDECODE_START( batman )
- GFXDECODE_ENTRY( "gfx3", 0, pfmolayout, 512, 64 ) /* sprites & playfield */
- GFXDECODE_ENTRY( "gfx2", 0, pfmolayout, 256, 64 ) /* sprites & playfield */
- GFXDECODE_ENTRY( "gfx1", 0, anlayout, 0, 64 ) /* characters 8x8 */
+ GFXDECODE_ENTRY( "gfx3", 0, pfmolayout, 512, 64 ) /* sprites & playfield */
+ GFXDECODE_ENTRY( "gfx2", 0, pfmolayout, 256, 64 ) /* sprites & playfield */
+ GFXDECODE_ENTRY( "gfx1", 0, anlayout, 0, 64 ) /* characters 8x8 */
GFXDECODE_END
@@ -262,7 +262,7 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( batman )
- ROM_REGION( 0xc0000, "maincpu", 0 ) /* 6*128k for 68000 code */
+ ROM_REGION( 0xc0000, "maincpu", 0 ) /* 6*128k for 68000 code */
ROM_LOAD16_BYTE( "136085-2030.10r", 0x00000, 0x20000, CRC(7cf4e5bf) SHA1(d6068a65fb524d839a34e596a272fac1ce90981c) )
ROM_LOAD16_BYTE( "136085-2031.7r", 0x00001, 0x20000, CRC(7d7f3fc4) SHA1(8ee3e9ad3464006a26c36155b6099433110e2a6e) )
ROM_LOAD16_BYTE( "136085-2032.91r", 0x40000, 0x20000, CRC(d80afb20) SHA1(5696627f6fa713dba4d12443c945f3e1cb6452a3) )
@@ -270,21 +270,21 @@ ROM_START( batman )
ROM_LOAD16_BYTE( "136085-2034.9r", 0x80000, 0x20000, CRC(05388c62) SHA1(de037203d94e72e2922c89256da080ae023ca0e7) )
ROM_LOAD16_BYTE( "136085-2035.5r", 0x80001, 0x20000, CRC(e77c92dd) SHA1(6d475092f7628114960d26b8ec1c5eae5e61ce25) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k + 16k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k + 16k for 6502 code */
ROM_LOAD( "136085-1040.12c", 0x10000, 0x4000, CRC(080db83c) SHA1(ec084b7c1dc5878acd6d081e2e8b8d1e8b3d8a45) )
ROM_CONTINUE( 0x04000, 0xc000 )
ROM_REGION( 0x20000, "gfx1", 0 )
- ROM_LOAD( "136085-2009.10m", 0x00000, 0x20000, CRC(a82d4923) SHA1(38e03eebd95347a383f3d7357462252961bd3c7f) ) /* alphanumerics */
+ ROM_LOAD( "136085-2009.10m", 0x00000, 0x20000, CRC(a82d4923) SHA1(38e03eebd95347a383f3d7357462252961bd3c7f) ) /* alphanumerics */
ROM_REGION( 0x100000, "gfx2", ROMREGION_INVERT )
- ROM_LOAD( "136085-1010.13r", 0x000000, 0x20000, CRC(466e1365) SHA1(318530e8a97c1b6ee3e671e677fc7684df5cc3a8) ) /* graphics, plane 0 */
+ ROM_LOAD( "136085-1010.13r", 0x000000, 0x20000, CRC(466e1365) SHA1(318530e8a97c1b6ee3e671e677fc7684df5cc3a8) ) /* graphics, plane 0 */
ROM_LOAD( "136085-1014.14r", 0x020000, 0x20000, CRC(ef53475a) SHA1(9bfc66bb8dd02757e4a79a75928b260f4518a94b) )
- ROM_LOAD( "136085-1011.13m", 0x040000, 0x20000, CRC(8cda5efc) SHA1(b0410f9bf1f38f5f1e9add15079b03d7f19b4c8f) ) /* graphics, plane 1 */
+ ROM_LOAD( "136085-1011.13m", 0x040000, 0x20000, CRC(8cda5efc) SHA1(b0410f9bf1f38f5f1e9add15079b03d7f19b4c8f) ) /* graphics, plane 1 */
ROM_LOAD( "136085-1015.14m", 0x060000, 0x20000, CRC(043e7f8b) SHA1(a3b2c539c1fa9b1e8d3dc8163b9a7c6e22408122) )
- ROM_LOAD( "136085-1012.13f", 0x080000, 0x20000, CRC(b017f2c3) SHA1(12846f0ae33e808dfb0795ea4138115b0eb36c4e) ) /* graphics, plane 2 */
+ ROM_LOAD( "136085-1012.13f", 0x080000, 0x20000, CRC(b017f2c3) SHA1(12846f0ae33e808dfb0795ea4138115b0eb36c4e) ) /* graphics, plane 2 */
ROM_LOAD( "136085-1016.14f", 0x0a0000, 0x20000, CRC(70aa2360) SHA1(5b944b533be40b859b7fae64559286034409ac6c) )
- ROM_LOAD( "136085-1013.13c", 0x0c0000, 0x20000, CRC(68b64975) SHA1(f3fb45dd74fc21dd2eece87e739c734963962f93) ) /* graphics, plane 3 */
+ ROM_LOAD( "136085-1013.13c", 0x0c0000, 0x20000, CRC(68b64975) SHA1(f3fb45dd74fc21dd2eece87e739c734963962f93) ) /* graphics, plane 3 */
ROM_LOAD( "136085-1017.14c", 0x0e0000, 0x20000, CRC(e4af157b) SHA1(ddf9eff84c882a096f7e435a6227b32d31029f9e) )
ROM_REGION( 0x100000, "gfx3", ROMREGION_INVERT )
@@ -297,7 +297,7 @@ ROM_START( batman )
ROM_LOAD( "136085-1021.15c", 0x0c0000, 0x20000, CRC(9c8ef9ba) SHA1(c2540adfc227a654a3f91e2cfdcd98b3a04ae4fb) )
ROM_LOAD( "136085-1025.16c", 0x0e0000, 0x20000, CRC(5d30bcd1) SHA1(817e225511ab98e7575ee512d659c51fcb7716dc) )
- ROM_REGION( 0x80000, "adpcm", 0 ) /* 1MB for ADPCM */
+ ROM_REGION( 0x80000, "adpcm", 0 ) /* 1MB for ADPCM */
ROM_LOAD( "136085-1041.19e", 0x00000, 0x20000, CRC(d97d5dbb) SHA1(7609841c773e3d1ae5a21da81e3387260fd8da41) )
ROM_LOAD( "136085-1042.17e", 0x20000, 0x20000, CRC(8c496986) SHA1(07c84c68885e2ab3e81ee92942d6a0f29e4dffa8) )
ROM_LOAD( "136085-1043.15e", 0x40000, 0x20000, CRC(51812d3b) SHA1(6748fecef753179a9257c0da5a7b7c9648437208) )
diff --git a/src/mame/drivers/battlane.c b/src/mame/drivers/battlane.c
index 92febf22851..a72e48dd3ee 100644
--- a/src/mame/drivers/battlane.c
+++ b/src/mame/drivers/battlane.c
@@ -26,54 +26,54 @@ WRITE8_MEMBER(battlane_state::battlane_cpu_command_w)
m_cpu_control = data;
/*
- CPU control register
+ CPU control register
- 0x80 = Video Flip
- 0x08 = NMI
- 0x04 = CPU 0 IRQ (0=Activate)
- 0x02 = CPU 1 IRQ (0=Activate)
- 0x01 = Y Scroll MSB
- */
+ 0x80 = Video Flip
+ 0x08 = NMI
+ 0x04 = CPU 0 IRQ (0=Activate)
+ 0x02 = CPU 1 IRQ (0=Activate)
+ 0x01 = Y Scroll MSB
+ */
flip_screen_set(data & 0x80);
/*
- I think that the NMI is an inhibitor. It is constantly set
- to zero whenever an NMIs are allowed.
+ I think that the NMI is an inhibitor. It is constantly set
+ to zero whenever an NMIs are allowed.
- However, it could also be that setting to zero could
- cause the NMI to trigger. I really don't know.
- */
+ However, it could also be that setting to zero could
+ cause the NMI to trigger. I really don't know.
+ */
- /*
- if (~m_cpu_control & 0x08)
- {
- m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
- m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
- }
- */
+ /*
+ if (~m_cpu_control & 0x08)
+ {
+ m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
+ m_subcpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
+ }
+ */
/*
- CPU2's SWI will trigger an 6809 IRQ on the master by resetting 0x04
- Master will respond by setting the bit back again
- */
- m_maincpu->set_input_line(M6809_IRQ_LINE, data & 0x04 ? CLEAR_LINE : HOLD_LINE);
+ CPU2's SWI will trigger an 6809 IRQ on the master by resetting 0x04
+ Master will respond by setting the bit back again
+ */
+ m_maincpu->set_input_line(M6809_IRQ_LINE, data & 0x04 ? CLEAR_LINE : HOLD_LINE);
/*
- Slave function call (e.g. ROM test):
- FA7F: 86 03 LDA #$03 ; Function code
- FA81: 97 6B STA $6B
- FA83: 86 0E LDA #$0E
- FA85: 84 FD ANDA #$FD ; Trigger IRQ
- FA87: 97 66 STA $66
- FA89: B7 1C 03 STA $1C03 ; Do Trigger
- FA8C: C6 40 LDB #$40
- FA8E: D5 68 BITB $68
- FA90: 27 FA BEQ $FA8C ; Wait for slave IRQ pre-function dispatch
- FA92: 96 68 LDA $68
- FA94: 84 01 ANDA #$01
- FA96: 27 FA BEQ $FA92 ; Wait for bit to be set
- */
+ Slave function call (e.g. ROM test):
+ FA7F: 86 03 LDA #$03 ; Function code
+ FA81: 97 6B STA $6B
+ FA83: 86 0E LDA #$0E
+ FA85: 84 FD ANDA #$FD ; Trigger IRQ
+ FA87: 97 66 STA $66
+ FA89: B7 1C 03 STA $1C03 ; Do Trigger
+ FA8C: C6 40 LDB #$40
+ FA8E: D5 68 BITB $68
+ FA90: 27 FA BEQ $FA8C ; Wait for slave IRQ pre-function dispatch
+ FA92: 96 68 LDA $68
+ FA94: 84 01 ANDA #$01
+ FA96: 27 FA BEQ $FA92 ; Wait for bit to be set
+ */
m_subcpu->set_input_line(M6809_IRQ_LINE, data & 0x02 ? CLEAR_LINE : HOLD_LINE);
}
@@ -139,35 +139,35 @@ static INPUT_PORTS_START( battlane )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_3C ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:7,8")
PORT_DIPSETTING( 0xc0, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x80, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x0c, "20K 50K+" )
PORT_DIPSETTING( 0x08, "20K 70K+" )
PORT_DIPSETTING( 0x04, "20K 90K+" )
@@ -226,7 +226,7 @@ static const gfx_layout tilelayout2 =
16, 16, /* 16*16 tiles */
256, /* 256 tiles */
3, /* 3 bits per pixel */
- { 0x8000*8, 0x4000*8+4, 0x4000*8+0 }, /* plane offset */
+ { 0x8000*8, 0x4000*8+4, 0x4000*8+0 }, /* plane offset */
{
3, 2, 1, 0,
8+3, 8+2, 8+1, 8+0,
@@ -242,9 +242,9 @@ static const gfx_layout tilelayout2 =
static GFXDECODE_START( battlane )
- GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0, 2 ) /* colors 0x00-0x0f */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 32, 4 ) /* colors 0x20-0x3f */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout2, 32, 4 ) /* colors 0x20-0x3f */
+ GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0, 2 ) /* colors 0x00-0x0f */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 32, 4 ) /* colors 0x20-0x3f */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout2, 32, 4 ) /* colors 0x20-0x3f */
GFXDECODE_END
diff --git a/src/mame/drivers/battlera.c b/src/mame/drivers/battlera.c
index 15f69e572fc..dc59b37fbe6 100644
--- a/src/mame/drivers/battlera.c
+++ b/src/mame/drivers/battlera.c
@@ -58,7 +58,7 @@ READ8_MEMBER(battlera_state::control_data_r)
case 0xef: return ioport("DSW1")->read(); /* Dip 1 */
}
- return 0xff;
+ return 0xff;
}
/******************************************************************************/
@@ -139,37 +139,37 @@ static INPUT_PORTS_START( battlera )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
- PORT_START("IN2") /* Coins */
+ PORT_START("IN2") /* Coins */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x01, "1" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x00, "Infinite (Cheat)")
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x08, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )
@@ -177,9 +177,9 @@ static INPUT_PORTS_START( battlera )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
/******************************************************************************/
@@ -218,7 +218,7 @@ GFXDECODE_END
static const msm5205_interface msm5205_config =
{
battlera_adpcm_int,/* interrupt function */
- MSM5205_S48_4B /* 8KHz */
+ MSM5205_S48_4B /* 8KHz */
};
/******************************************************************************/
diff --git a/src/mame/drivers/battlex.c b/src/mame/drivers/battlex.c
index aedc5678450..fe2c7afe917 100644
--- a/src/mame/drivers/battlex.c
+++ b/src/mame/drivers/battlex.c
@@ -105,13 +105,13 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( battlex )
- PORT_START("DSW1") /* IN0 */
+ PORT_START("DSW1") /* IN0 */
PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Allow_Continue ) ) // Not on 1st stage
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Allow_Continue ) ) // Not on 1st stage
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x04, DEF_STR( Yes ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) )
@@ -126,7 +126,7 @@ static INPUT_PORTS_START( battlex )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("SYSTEM") /* IN1 */
+ PORT_START("SYSTEM") /* IN1 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_IMPULSE(4)
@@ -136,7 +136,7 @@ static INPUT_PORTS_START( battlex )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_START("INPUTS") /* IN2 */
+ PORT_START("INPUTS") /* IN2 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_4WAY
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY
@@ -146,7 +146,7 @@ static INPUT_PORTS_START( battlex )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
- PORT_START("DSW2") /* IN3 */
+ PORT_START("DSW2") /* IN3 */
PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_B ) )
PORT_DIPSETTING( 0x07, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 2C_1C ) )
@@ -166,7 +166,7 @@ static INPUT_PORTS_START( battlex )
PORT_DIPSETTING( 0x20, "10000" )
PORT_DIPSETTING( 0x40, "15000" )
PORT_DIPSETTING( 0x60, "20000" )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Free_Play ) ) // See notes
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Free_Play ) ) // See notes
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
INPUT_PORTS_END
@@ -246,10 +246,10 @@ void battlex_state::machine_reset()
static MACHINE_CONFIG_START( battlex, battlex_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,XTAL_10MHz/4 ) // ?
+ MCFG_CPU_ADD("maincpu", Z80,XTAL_10MHz/4 ) // ?
MCFG_CPU_PROGRAM_MAP(battlex_map)
MCFG_CPU_IO_MAP(io_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(battlex_state, battlex_interrupt, 400) /* controls game speed? */
+ MCFG_CPU_PERIODIC_INT_DRIVER(battlex_state, battlex_interrupt, 400) /* controls game speed? */
/* video hardware */
@@ -265,7 +265,7 @@ static MACHINE_CONFIG_START( battlex, battlex_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("aysnd", AY8910, XTAL_10MHz/8) // ?
+ MCFG_SOUND_ADD("aysnd", AY8910, XTAL_10MHz/8) // ?
MCFG_SOUND_CONFIG(battlex_ay8910_interface)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.40)
MACHINE_CONFIG_END
@@ -291,12 +291,12 @@ ROM_START( battlex )
ROM_LOAD( "1a_h.6h", 0x1000, 0x1000, CRC(9f4c3bdd) SHA1(e921ecafefe54c033d05d9cd289808e971ac7940) )
ROM_LOAD( "1a_j.6j", 0x2000, 0x1000, CRC(c1345b05) SHA1(17194c8ec961990222bd295ff1d036a64f497b0e) )
- ROM_REGION( 0x3000, "gfx1", ROMREGION_ERASE00 ) // filled in later
+ ROM_REGION( 0x3000, "gfx1", ROMREGION_ERASE00 ) // filled in later
- ROM_REGION( 0x1000, "user2", 0 ) // gfx1 1bpp gfxdata
+ ROM_REGION( 0x1000, "user2", 0 ) // gfx1 1bpp gfxdata
ROM_LOAD( "1a_e.6e", 0x0000, 0x1000, CRC(126842b7) SHA1(2da4f64e077232c1dd0853d07d801f9781517850) )
- ROM_REGION( 0x1000, "user1", 0 ) // gfx1 colormask, bad?
+ ROM_REGION( 0x1000, "user1", 0 ) // gfx1 colormask, bad?
ROM_LOAD( "1a_d.6d", 0x0000, 0x1000, CRC(750a46ef) SHA1(b6ab93e084ab0b7c6ad90ee6431bc1b7ab9ed46d) )
ROM_END
diff --git a/src/mame/drivers/battlnts.c b/src/mame/drivers/battlnts.c
index f8906743244..c8df76b4795 100644
--- a/src/mame/drivers/battlnts.c
+++ b/src/mame/drivers/battlnts.c
@@ -56,31 +56,31 @@ WRITE8_MEMBER(battlnts_state::battlnts_bankswitch_w)
*************************************/
static ADDRESS_MAP_START( battlnts_map, AS_PROGRAM, 8, battlnts_state )
- AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE_LEGACY("k007342", k007342_r, k007342_w) /* Color RAM + Video RAM */
- AM_RANGE(0x2000, 0x21ff) AM_DEVREADWRITE_LEGACY("k007420", k007420_r, k007420_w) /* Sprite RAM */
- AM_RANGE(0x2200, 0x23ff) AM_DEVREADWRITE_LEGACY("k007342", k007342_scroll_r, k007342_scroll_w) /* Scroll RAM */
+ AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE_LEGACY("k007342", k007342_r, k007342_w) /* Color RAM + Video RAM */
+ AM_RANGE(0x2000, 0x21ff) AM_DEVREADWRITE_LEGACY("k007420", k007420_r, k007420_w) /* Sprite RAM */
+ AM_RANGE(0x2200, 0x23ff) AM_DEVREADWRITE_LEGACY("k007342", k007342_scroll_r, k007342_scroll_w) /* Scroll RAM */
AM_RANGE(0x2400, 0x24ff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_byte_be_w) AM_SHARE("paletteram")/* palette */
- AM_RANGE(0x2600, 0x2607) AM_DEVWRITE_LEGACY("k007342", k007342_vreg_w) /* Video Registers */
+ AM_RANGE(0x2600, 0x2607) AM_DEVWRITE_LEGACY("k007342", k007342_vreg_w) /* Video Registers */
AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("DSW1")
AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P2")
AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P1")
- AM_RANGE(0x2e03, 0x2e03) AM_READ_PORT("DSW3") /* coinsw, testsw, startsw */
+ AM_RANGE(0x2e03, 0x2e03) AM_READ_PORT("DSW3") /* coinsw, testsw, startsw */
AM_RANGE(0x2e04, 0x2e04) AM_READ_PORT("DSW2")
- AM_RANGE(0x2e08, 0x2e08) AM_WRITE(battlnts_bankswitch_w) /* bankswitch control */
- AM_RANGE(0x2e0c, 0x2e0c) AM_WRITE(battlnts_spritebank_w) /* sprite bank select */
- AM_RANGE(0x2e10, 0x2e10) AM_WRITE(watchdog_reset_w) /* watchdog reset */
- AM_RANGE(0x2e14, 0x2e14) AM_WRITE(soundlatch_byte_w) /* sound code # */
- AM_RANGE(0x2e18, 0x2e18) AM_WRITE(battlnts_sh_irqtrigger_w) /* cause interrupt on audio CPU */
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM */
- AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM 777e02.bin */
+ AM_RANGE(0x2e08, 0x2e08) AM_WRITE(battlnts_bankswitch_w) /* bankswitch control */
+ AM_RANGE(0x2e0c, 0x2e0c) AM_WRITE(battlnts_spritebank_w) /* sprite bank select */
+ AM_RANGE(0x2e10, 0x2e10) AM_WRITE(watchdog_reset_w) /* watchdog reset */
+ AM_RANGE(0x2e14, 0x2e14) AM_WRITE(soundlatch_byte_w) /* sound code # */
+ AM_RANGE(0x2e18, 0x2e18) AM_WRITE(battlnts_sh_irqtrigger_w) /* cause interrupt on audio CPU */
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM */
+ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM 777e02.bin */
ADDRESS_MAP_END
static ADDRESS_MAP_START( battlnts_sound_map, AS_PROGRAM, 8, battlnts_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM 777c01.rom */
- AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
- AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE_LEGACY("ym1", ym3812_r, ym3812_w) /* YM3812 (chip 1) */
- AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE_LEGACY("ym2", ym3812_r, ym3812_w) /* YM3812 (chip 2) */
- AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
+ AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM 777c01.rom */
+ AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
+ AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE_LEGACY("ym1", ym3812_r, ym3812_w) /* YM3812 (chip 1) */
+ AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE_LEGACY("ym2", ym3812_r, ym3812_w) /* YM3812 (chip 2) */
+ AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
ADDRESS_MAP_END
/*************************************
@@ -95,43 +95,43 @@ static INPUT_PORTS_START( battlnts )
/* "No Coin B" = coins produce sound, but no effect on coin counter */
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
- PORT_DIPSETTING( 0x03, "2" )
- PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x01, "5" )
- PORT_DIPSETTING( 0x00, "7" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4,5")
- PORT_DIPSETTING( 0x18, "30k And Every 70k" )
- PORT_DIPSETTING( 0x10, "40k And Every 80k" )
- PORT_DIPSETTING( 0x08, "40k" )
- PORT_DIPSETTING( 0x00, "50k" )
- PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
- PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPSETTING( 0x03, "2" )
+ PORT_DIPSETTING( 0x02, "3" )
+ PORT_DIPSETTING( 0x01, "5" )
+ PORT_DIPSETTING( 0x00, "7" )
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPSETTING( 0x18, "30k And Every 70k" )
+ PORT_DIPSETTING( 0x10, "40k And Every 80k" )
+ PORT_DIPSETTING( 0x08, "40k" )
+ PORT_DIPSETTING( 0x00, "50k" )
+ PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
+ PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW3")
KONAMI8_SYSTEM_10
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
- PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Upright Controls" ) PORT_DIPLOCATION("SW3:2")
- PORT_DIPSETTING( 0x40, DEF_STR( Single ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Dual ) )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x40, "Upright Controls" ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPSETTING( 0x40, DEF_STR( Single ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Dual ) )
PORT_SERVICE_DIPLOC(0x80, IP_ACTIVE_LOW, "SW3:3" )
PORT_START("P1")
KONAMI8_B1(1)
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW3:4")
- PORT_DIPSETTING( 0x80, "3 Times" )
- PORT_DIPSETTING( 0x00, "5 Times" )
+ PORT_DIPSETTING( 0x80, "3 Times" )
+ PORT_DIPSETTING( 0x00, "5 Times" )
PORT_START("P2")
KONAMI8_B1_UNK(2)
@@ -141,16 +141,16 @@ static INPUT_PORTS_START( rackemup )
PORT_INCLUDE( battlnts )
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x03, 0x02, "Balls" ) PORT_DIPLOCATION("SW2:1,2")
- PORT_DIPSETTING( 0x03, "2" )
- PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x01, "4" )
- PORT_DIPSETTING( 0x00, "7" )
- PORT_DIPNAME( 0x18, 0x10, "Time To Aim" ) PORT_DIPLOCATION("SW2:4,5")
- PORT_DIPSETTING( 0x18, "25s (Stage 1: 30s)" )
- PORT_DIPSETTING( 0x10, "20s (Stage 1: 25s)" )
- PORT_DIPSETTING( 0x08, "17s (Stage 1: 22s)" )
- PORT_DIPSETTING( 0x00, "15s (Stage 1: 20s)" )
+ PORT_DIPNAME( 0x03, 0x02, "Balls" ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPSETTING( 0x03, "2" )
+ PORT_DIPSETTING( 0x02, "3" )
+ PORT_DIPSETTING( 0x01, "4" )
+ PORT_DIPSETTING( 0x00, "7" )
+ PORT_DIPNAME( 0x18, 0x10, "Time To Aim" ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPSETTING( 0x18, "25s (Stage 1: 30s)" )
+ PORT_DIPSETTING( 0x10, "20s (Stage 1: 25s)" )
+ PORT_DIPSETTING( 0x08, "17s (Stage 1: 22s)" )
+ PORT_DIPSETTING( 0x00, "15s (Stage 1: 20s)" )
PORT_MODIFY("P1")
KONAMI8_B12(1)
@@ -176,29 +176,29 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8 x 8 characters */
- 0x40000/32, /* 8192 characters */
- 4, /* 4bpp */
+ 8,8, /* 8 x 8 characters */
+ 0x40000/32, /* 8192 characters */
+ 4, /* 4bpp */
{ 0, 1, 2, 3 }, /* the four bitplanes are packed in one nibble */
{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
- 32*8 /* every character takes 32 consecutive bytes */
+ 32*8 /* every character takes 32 consecutive bytes */
};
static const gfx_layout spritelayout =
{
- 8,8, /* 8*8 sprites */
+ 8,8, /* 8*8 sprites */
0x40000/32, /* 8192 sprites */
- 4, /* 4 bpp */
+ 4, /* 4 bpp */
{ 0, 1, 2, 3 }, /* the four bitplanes are packed in one nibble */
{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4},
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static GFXDECODE_START( battlnts )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 1 ) /* colors 0-15 */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 1 ) /* colors 0-15 */
GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 4*16, 1 ) /* colors 64-79 */
GFXDECODE_END
@@ -211,12 +211,12 @@ GFXDECODE_END
static const k007342_interface bladestl_k007342_intf =
{
- 0, battlnts_tile_callback /* gfx_num (for tile creation), callback */
+ 0, battlnts_tile_callback /* gfx_num (for tile creation), callback */
};
static const k007420_interface bladestl_k007420_intf =
{
- 0x3ff, battlnts_sprite_callback /* banklimit, callback */
+ 0x3ff, battlnts_sprite_callback /* banklimit, callback */
};
@@ -395,7 +395,7 @@ static void shuffle( UINT8 *buf, int len )
return;
if (len % 4)
- fatalerror("shuffle() - not modulo 4\n"); /* must not happen */
+ fatalerror("shuffle() - not modulo 4\n"); /* must not happen */
len /= 2;
diff --git a/src/mame/drivers/bbusters.c b/src/mame/drivers/bbusters.c
index 3c943591eab..f31a300ea99 100644
--- a/src/mame/drivers/bbusters.c
+++ b/src/mame/drivers/bbusters.c
@@ -327,20 +327,20 @@ static ADDRESS_MAP_START( bbusters_map, AS_PROGRAM, 16, bbusters_state )
AM_RANGE(0x080000, 0x08ffff) AM_RAM AM_SHARE("ram")
AM_RANGE(0x090000, 0x090fff) AM_RAM_WRITE(bbusters_video_w) AM_SHARE("videoram")
AM_RANGE(0x0a0000, 0x0a0fff) AM_RAM AM_SHARE("spriteram")
- AM_RANGE(0x0a1000, 0x0a7fff) AM_RAM /* service mode */
+ AM_RANGE(0x0a1000, 0x0a7fff) AM_RAM /* service mode */
AM_RANGE(0x0a8000, 0x0a8fff) AM_RAM AM_SHARE("spriteram2")
- AM_RANGE(0x0a9000, 0x0affff) AM_RAM /* service mode */
+ AM_RANGE(0x0a9000, 0x0affff) AM_RAM /* service mode */
AM_RANGE(0x0b0000, 0x0b1fff) AM_RAM_WRITE(bbusters_pf1_w) AM_SHARE("pf1_data")
AM_RANGE(0x0b2000, 0x0b3fff) AM_RAM_WRITE(bbusters_pf2_w) AM_SHARE("pf2_data")
- AM_RANGE(0x0b4000, 0x0b5fff) AM_RAM /* service mode */
+ AM_RANGE(0x0b4000, 0x0b5fff) AM_RAM /* service mode */
AM_RANGE(0x0b8000, 0x0b8003) AM_WRITEONLY AM_SHARE("pf1_scroll_data")
AM_RANGE(0x0b8008, 0x0b800b) AM_WRITEONLY AM_SHARE("pf2_scroll_data")
AM_RANGE(0x0d0000, 0x0d0fff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_word_w) AM_SHARE("paletteram")
- AM_RANGE(0x0e0000, 0x0e0001) AM_READ_PORT("COINS") /* Coins */
- AM_RANGE(0x0e0002, 0x0e0003) AM_READ_PORT("IN0") /* Player 1 & 2 */
- AM_RANGE(0x0e0004, 0x0e0005) AM_READ_PORT("IN1") /* Player 3 */
- AM_RANGE(0x0e0008, 0x0e0009) AM_READ_PORT("DSW1") /* Dip 1 */
- AM_RANGE(0x0e000a, 0x0e000b) AM_READ_PORT("DSW2") /* Dip 2 */
+ AM_RANGE(0x0e0000, 0x0e0001) AM_READ_PORT("COINS") /* Coins */
+ AM_RANGE(0x0e0002, 0x0e0003) AM_READ_PORT("IN0") /* Player 1 & 2 */
+ AM_RANGE(0x0e0004, 0x0e0005) AM_READ_PORT("IN1") /* Player 3 */
+ AM_RANGE(0x0e0008, 0x0e0009) AM_READ_PORT("DSW1") /* Dip 1 */
+ AM_RANGE(0x0e000a, 0x0e000b) AM_READ_PORT("DSW2") /* Dip 2 */
AM_RANGE(0x0e0018, 0x0e0019) AM_READ(sound_status_r)
AM_RANGE(0x0e8000, 0x0e8001) AM_READWRITE(kludge_r, gun_select_w)
AM_RANGE(0x0e8002, 0x0e8003) AM_READ(control_3_r)
@@ -396,18 +396,18 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( bbusters )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Fire") // "Fire"
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Grenade") // "Grenade"
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Fire") // "Fire"
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Grenade") // "Grenade"
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Fire") // "Fire"
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Grenade") // "Grenade"
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Fire") // "Fire"
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Grenade") // "Grenade"
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START3 )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) PORT_NAME("P3 Fire") // "Fire"
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_NAME("P3 Grenade") // "Grenade"
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) PORT_NAME("P3 Fire") // "Fire"
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_NAME("P3 Grenade") // "Grenade"
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -421,59 +421,59 @@ static INPUT_PORTS_START( bbusters )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN5 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN6 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) // See notes
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 ) // See notes
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x06, 0x06, "Magazine / Grenade" ) PORT_DIPLOCATION("SW1:2,3")
+ PORT_DIPNAME( 0x06, 0x06, "Magazine / Grenade" ) PORT_DIPLOCATION("SW1:2,3")
PORT_DIPSETTING( 0x04, "5 / 2" )
PORT_DIPSETTING( 0x06, "7 / 3" )
PORT_DIPSETTING( 0x02, "9 / 4" )
PORT_DIPSETTING( 0x00, "12 / 5" )
/* Manual (from a different revision/region?) says:
- SW1:4 SW1:5 SW1:6
- 1C_1C 1 To continue OFF OFF OFF
- 2C_1C 1 To continue ON OFF OFF
- 1C_2C 1 To continue OFF ON OFF
- 2C_1C 2 To continue ON ON OFF
- 3C_1C 1 To continue OFF OFF ON
- 3C_1C 2 To continue ON OFF ON
- 4C_3C 1 To continue OFF ON ON
- Free Play Mode OFF OFF OFF
-
- SW1:7 Unused
- SW1:8 Blood color: ON=green OFF=red */
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:4,5")
+ SW1:4 SW1:5 SW1:6
+ 1C_1C 1 To continue OFF OFF OFF
+ 2C_1C 1 To continue ON OFF OFF
+ 1C_2C 1 To continue OFF ON OFF
+ 2C_1C 2 To continue ON ON OFF
+ 3C_1C 1 To continue OFF OFF ON
+ 3C_1C 2 To continue ON OFF ON
+ 4C_3C 1 To continue OFF ON ON
+ Free Play Mode OFF OFF OFF
+
+ SW1:7 Unused
+ SW1:8 Blood color: ON=green OFF=red */
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:4,5")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:6,7")
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:6,7")
PORT_DIPSETTING( 0x60, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x80, 0x80, "Coin Slots" ) PORT_DIPLOCATION("SW1:8") // See notes
+ PORT_DIPNAME( 0x80, 0x80, "Coin Slots" ) PORT_DIPLOCATION("SW1:8") // See notes
PORT_DIPSETTING( 0x80, "Common" )
PORT_DIPSETTING( 0x00, "Individual" )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x0c, 0x0c, "Game Mode" ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, "Game Mode" ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x08, "Demo Sounds Off" )
PORT_DIPSETTING( 0x0c, "Demo Sounds On" )
PORT_DIPSETTING( 0x04, "Infinite Energy (Cheat)")
PORT_DIPSETTING( 0x00, "Freeze" )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
PORT_SERVICE_DIPLOC(0x80, IP_ACTIVE_LOW, "SW2:8" )
PORT_START("GUNX1")
@@ -496,56 +496,56 @@ static INPUT_PORTS_START( mechatt )
PORT_START("IN0")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 ) // See notes
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 ) // See notes
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_COIN4 )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Fire") // "Fire"
- PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Grenade") // "Grenade"
+ PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 Fire") // "Fire"
+ PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 Grenade") // "Grenade"
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Fire") // "Fire"
- PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Grenade") // "Grenade"
+ PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Fire") // "Fire"
+ PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 Grenade") // "Grenade"
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW1")
- PORT_DIPNAME( 0x0001, 0x0001, "Coin Slots" ) PORT_DIPLOCATION("SW1:1") // Listed as "Unused" (manual from different revision/region?), See notes
+ PORT_DIPNAME( 0x0001, 0x0001, "Coin Slots" ) PORT_DIPLOCATION("SW1:1") // Listed as "Unused" (manual from different revision/region?), See notes
PORT_DIPSETTING( 0x0001, "Common" )
PORT_DIPSETTING( 0x0000, "Individual" )
- PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
PORT_DIPSETTING( 0x0002, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x000c, 0x000c, "Magazine / Grenade" ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x000c, 0x000c, "Magazine / Grenade" ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x0008, "5 / 2" )
PORT_DIPSETTING( 0x000c, "6 / 3" )
PORT_DIPSETTING( 0x0004, "7 / 4" )
PORT_DIPSETTING( 0x0000, "8 / 5" )
- PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6") // See notes
+ PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:5,6") // See notes
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x00c0, 0x00c0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8") // Listed as "Unused" (manual from different revision/region?), See notes
+ PORT_DIPNAME( 0x00c0, 0x00c0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:7,8") // Listed as "Unused" (manual from different revision/region?), See notes
PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0080, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0040, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x0200, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0300, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0100, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x0c00, 0x0c00, "Game Mode" ) PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0x0c00, 0x0c00, "Game Mode" ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x0800, "Demo Sounds Off" )
PORT_DIPSETTING( 0x0c00, "Demo Sounds On" )
PORT_DIPSETTING( 0x0400, "Infinite Energy (Cheat)")
PORT_DIPSETTING( 0x0000, "Freeze" )
- PORT_DIPUNUSED_DIPLOC(0x1000, 0x1000, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC(0x2000, 0x2000, "SW2:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC(0x4000, 0x4000, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC(0x1000, 0x1000, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC(0x2000, 0x2000, "SW2:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC(0x4000, 0x4000, "SW2:7" ) /* Listed as "Unused" */
PORT_SERVICE_DIPLOC( 0x8000, IP_ACTIVE_LOW, "SW2:8" )
PORT_START("GUNX1")
@@ -564,7 +564,7 @@ static INPUT_PORTS_START( mechattu )
PORT_MODIFY("DSW1")
PORT_DIPUNUSED_DIPLOC( 0x0001, 0x0001, "SW1:1" )
- PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,6")
+ PORT_DIPNAME( 0x0030, 0x0030, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:5,6")
PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) )
PORT_DIPSETTING( 0x0010, "1 Coin/2 Credits first, then 1 Coin/1 Credit" )
PORT_DIPSETTING( 0x0020, "2 Coins/1 Credit first, then 1 Coin/1 Credit" )
@@ -606,9 +606,9 @@ static const gfx_layout spritelayout =
static const gfx_layout tilelayout =
{
- 16,16, /* 16*16 sprites */
+ 16,16, /* 16*16 sprites */
RGN_FRAC(1,1),
- 4, /* 4 bits per pixel */
+ 4, /* 4 bits per pixel */
{ 0, 1, 2, 3 },
{ 0, 4, 8, 12, 16, 20, 24, 28,
0+64*8, 4+64*8, 8+64*8, 12+64*8,
diff --git a/src/mame/drivers/beaminv.c b/src/mame/drivers/beaminv.c
index 25a1a5a1d3b..9fa7c6e5aba 100644
--- a/src/mame/drivers/beaminv.c
+++ b/src/mame/drivers/beaminv.c
@@ -93,7 +93,7 @@ public:
/* the interrupt scanlines are a guess */
-#define INTERRUPTS_PER_FRAME (2)
+#define INTERRUPTS_PER_FRAME (2)
static const int interrupt_lines[INTERRUPTS_PER_FRAME] = { 0x00, 0x80 };
@@ -208,8 +208,8 @@ READ8_MEMBER(beaminv_state::v128_r)
*
*************************************/
-#define P1_CONTROL_PORT_TAG ("CONTP1")
-#define P2_CONTROL_PORT_TAG ("CONTP2")
+#define P1_CONTROL_PORT_TAG ("CONTP1")
+#define P2_CONTROL_PORT_TAG ("CONTP2")
WRITE8_MEMBER(beaminv_state::controller_select_w)
@@ -332,7 +332,7 @@ INPUT_PORTS_END
static MACHINE_CONFIG_START( beaminv, beaminv_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 2000000) /* 2 MHz ? */
+ MCFG_CPU_ADD("maincpu", Z80, 2000000) /* 2 MHz ? */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(main_io_map)
diff --git a/src/mame/drivers/beathead.c b/src/mame/drivers/beathead.c
index 1c5db02570d..f9ce7ea8a72 100644
--- a/src/mame/drivers/beathead.c
+++ b/src/mame/drivers/beathead.c
@@ -134,7 +134,7 @@
-#define MAX_SCANLINES 262
+#define MAX_SCANLINES 262
@@ -338,7 +338,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 32, beathead_state)
AM_RANGE(0x41000700, 0x41000703) AM_WRITE(watchdog_reset32_w)
AM_RANGE(0x42000000, 0x4201ffff) AM_RAM_WRITE(palette_w) AM_SHARE("paletteram")
AM_RANGE(0x43000000, 0x43000007) AM_READWRITE(hsync_ram_r, hsync_ram_w)
- AM_RANGE(0x8df80000, 0x8df80003) AM_READNOP /* noisy x4 during scanline int */
+ AM_RANGE(0x8df80000, 0x8df80003) AM_READNOP /* noisy x4 during scanline int */
AM_RANGE(0x8f380000, 0x8f3fffff) AM_WRITE(vram_latch_w)
AM_RANGE(0x8f900000, 0x8f97ffff) AM_WRITE(vram_transparent_w)
AM_RANGE(0x8f980000, 0x8f9fffff) AM_RAM AM_SHARE("videoram")
@@ -356,7 +356,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( beathead )
- PORT_START("IN0") /* Player 1 */
+ PORT_START("IN0") /* Player 1 */
PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
@@ -367,7 +367,7 @@ static INPUT_PORTS_START( beathead )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
- PORT_START("IN1") /* Player 2 */
+ PORT_START("IN1") /* Player 2 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -391,8 +391,8 @@ static INPUT_PORTS_START( beathead )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_iii ) /* audio board port */
- PORT_MODIFY("JSAIII")
+ PORT_INCLUDE( atarijsa_iii ) /* audio board port */
+ PORT_MODIFY("JSAIII")
// coin 1+2 import from JSAIII not used - set to unused
PORT_BIT( 0x03, IP_ACTIVE_HIGH, IPT_UNUSED )
@@ -439,11 +439,11 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( beathead )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k + 16k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k + 16k for 6502 code */
ROM_LOAD( "bhsnd.bin", 0x10000, 0x4000, CRC(dfd33f02) SHA1(479a4838c89691d5a4654a4cd84b6433a9e86109) )
ROM_CONTINUE( 0x04000, 0xc000 )
- ROM_REGION32_LE( 0x400000, "user1", 0 ) /* 4MB for ASAP code */
+ ROM_REGION32_LE( 0x400000, "user1", 0 ) /* 4MB for ASAP code */
ROM_LOAD32_BYTE( "bhprog0.bin", 0x000000, 0x80000, CRC(87975721) SHA1(862cb3a290c829aedea26ee7100c50a12e9517e7) )
ROM_LOAD32_BYTE( "bhprog1.bin", 0x000001, 0x80000, CRC(25d89743) SHA1(9ff9a41355aa6914efc4a44909026e648a3c40f3) )
ROM_LOAD32_BYTE( "bhprog2.bin", 0x000002, 0x80000, CRC(87722609) SHA1(dbd766fa57f4528702a98db28ae48fb5d2a7f7df) )
@@ -453,7 +453,7 @@ ROM_START( beathead )
ROM_LOAD32_BYTE( "bhpics2.bin", 0x200002, 0x80000, CRC(00b96481) SHA1(39daa46321c1d4f8bce8c25d0450b97f1f19dedb) )
ROM_LOAD32_BYTE( "bhpics3.bin", 0x200003, 0x80000, CRC(99c4f1db) SHA1(aba4440c5cdf413f970a0c65457e2d1b37caf2d6) )
- ROM_REGION( 0x80000, "adpcm", 0 ) /* 1MB for ADPCM */
+ ROM_REGION( 0x80000, "adpcm", 0 ) /* 1MB for ADPCM */
ROM_LOAD( "bhpcm0.bin", 0x00000, 0x20000, CRC(609ca626) SHA1(9bfc913fc4c3453b132595f8553245376bce3a51) )
ROM_LOAD( "bhpcm1.bin", 0x20000, 0x20000, CRC(35511509) SHA1(41294b81e253db5d2f30f8589dd59729a31bb2bb) )
ROM_LOAD( "bhpcm2.bin", 0x40000, 0x20000, CRC(f71a840a) SHA1(09d045552704cd1434307f9a36ce03c5c06a8ff6) )
diff --git a/src/mame/drivers/beezer.c b/src/mame/drivers/beezer.c
index ca49c0be7e2..77ddf0908a9 100644
--- a/src/mame/drivers/beezer.c
+++ b/src/mame/drivers/beezer.c
@@ -55,22 +55,22 @@ static INPUT_PORTS_START( beezer )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSWB")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWB:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWB:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:3")
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x00, "4" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWB:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:5,6")
+ PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:5,6")
PORT_DIPSETTING( 0x20, "30000" )
PORT_DIPSETTING( 0x10, "60000" )
PORT_DIPSETTING( 0x00, "90000" )
PORT_DIPSETTING( 0x30, DEF_STR( No ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWB:7,8")
PORT_DIPSETTING( 0xc0, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x80, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
diff --git a/src/mame/drivers/belatra.c b/src/mame/drivers/belatra.c
index e61f69cbaa2..44d7e6fd9bb 100644
--- a/src/mame/drivers/belatra.c
+++ b/src/mame/drivers/belatra.c
@@ -47,7 +47,7 @@ class belatra_state : public driver_device
public:
belatra_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -117,12 +117,12 @@ ROM_START( ldrinka )
ROM_END
-GAME( 2004, fairyl2 ,0, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (set 1)", GAME_IS_SKELETON )
-GAME( 2004, fairyl2a ,fairyl2, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (set 2)", GAME_IS_SKELETON )
-GAME( 2004, fairyl2b ,fairyl2, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (set 3)", GAME_IS_SKELETON )
-GAME( 2004, fairyl2bl ,fairyl2, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (bootleg)", GAME_IS_SKELETON )
+GAME( 2004, fairyl2 ,0, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (set 1)", GAME_IS_SKELETON )
+GAME( 2004, fairyl2a ,fairyl2, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (set 2)", GAME_IS_SKELETON )
+GAME( 2004, fairyl2b ,fairyl2, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (set 3)", GAME_IS_SKELETON )
+GAME( 2004, fairyl2bl ,fairyl2, belatra, belatra, driver_device, 0, ROT0, "Belatra","Fairy Land 2 (bootleg)", GAME_IS_SKELETON )
-GAME( 2004, ldrink ,0, belatra, belatra, driver_device, 0, ROT0, "Belatra","Lucky Drink (set 1)", GAME_IS_SKELETON )
-GAME( 2004, ldrinka ,ldrink, belatra, belatra, driver_device, 0, ROT0, "Belatra","Lucky Drink (set 2)", GAME_IS_SKELETON )
+GAME( 2004, ldrink ,0, belatra, belatra, driver_device, 0, ROT0, "Belatra","Lucky Drink (set 1)", GAME_IS_SKELETON )
+GAME( 2004, ldrinka ,ldrink, belatra, belatra, driver_device, 0, ROT0, "Belatra","Lucky Drink (set 2)", GAME_IS_SKELETON )
-GAME( 2004, merryjn ,0, belatra, belatra, driver_device, 0, ROT0, "Belatra","Merry Joiner", GAME_IS_SKELETON )
+GAME( 2004, merryjn ,0, belatra, belatra, driver_device, 0, ROT0, "Belatra","Merry Joiner", GAME_IS_SKELETON )
diff --git a/src/mame/drivers/berzerk.c b/src/mame/drivers/berzerk.c
index b324ca7bb5b..ce812c2ccb5 100644
--- a/src/mame/drivers/berzerk.c
+++ b/src/mame/drivers/berzerk.c
@@ -66,20 +66,20 @@ public:
#define MONITOR_TYPE_PORT_TAG ("MONITOR_TYPE")
-#define MASTER_CLOCK (XTAL_10MHz)
-#define MAIN_CPU_CLOCK (MASTER_CLOCK / 4)
-#define PIXEL_CLOCK (MASTER_CLOCK / 2)
-#define S14001_CLOCK (MASTER_CLOCK / 4)
-#define HTOTAL (0x140)
-#define HBEND (0x000)
-#define HBSTART (0x100)
-#define VTOTAL (0x106)
-#define VBEND (0x020)
-#define VBSTART (0x100)
-#define VCOUNTER_START_NO_VBLANK (0x020)
-#define VCOUNTER_START_VBLANK (0x0da)
-#define IRQS_PER_FRAME (2)
-#define NMIS_PER_FRAME (8)
+#define MASTER_CLOCK (XTAL_10MHz)
+#define MAIN_CPU_CLOCK (MASTER_CLOCK / 4)
+#define PIXEL_CLOCK (MASTER_CLOCK / 2)
+#define S14001_CLOCK (MASTER_CLOCK / 4)
+#define HTOTAL (0x140)
+#define HBEND (0x000)
+#define HBSTART (0x100)
+#define VTOTAL (0x106)
+#define VBEND (0x020)
+#define VBSTART (0x100)
+#define VCOUNTER_START_NO_VBLANK (0x020)
+#define VCOUNTER_START_VBLANK (0x0da)
+#define IRQS_PER_FRAME (2)
+#define NMIS_PER_FRAME (8)
static const UINT8 irq_trigger_counts[IRQS_PER_FRAME] = { 0x80, 0xda };
static const UINT8 irq_trigger_v256s [IRQS_PER_FRAME] = { 0x00, 0x01 };
@@ -346,10 +346,10 @@ void berzerk_state::machine_reset()
*
*************************************/
-#define NUM_PENS (0x10)
+#define NUM_PENS (0x10)
-#define LS181_12C (0)
-#define LS181_10C (1)
+#define LS181_12C (0)
+#define LS181_10C (1)
void berzerk_state::video_start()
@@ -369,16 +369,16 @@ WRITE8_MEMBER(berzerk_state::magicram_w)
UINT8 current_video_data = m_videoram[offset];
/* shift data towards LSB. MSB bits are filled by data from last_shift_data.
- The shifter consists of 5 74153 devices @ 7A, 8A, 9A, 10A and 11A,
- followed by 4 more 153's at 11B, 10B, 9B and 8B, which optionally
- reverse the order of the resulting bits */
+ The shifter consists of 5 74153 devices @ 7A, 8A, 9A, 10A and 11A,
+ followed by 4 more 153's at 11B, 10B, 9B and 8B, which optionally
+ reverse the order of the resulting bits */
UINT8 shift_flop_output = (((UINT16)m_last_shift_data << 8) | data) >> (m_magicram_control & 0x07);
if (m_magicram_control & 0x08)
shift_flop_output = BITSWAP8(shift_flop_output, 0, 1, 2, 3, 4, 5, 6, 7);
/* collision detection - AND gate output goes to the K pin of the flip-flop,
- while J is LO, therefore, it only resets, never sets */
+ while J is LO, therefore, it only resets, never sets */
if (shift_flop_output & current_video_data)
m_intercept = 0;
@@ -391,7 +391,7 @@ WRITE8_MEMBER(berzerk_state::magicram_w)
TTL74181_write(LS181_10C, TTL74181_INPUT_S0, 4, m_magicram_control >> 4);
alu_output = (TTL74181_read(LS181_10C, TTL74181_OUTPUT_F0, 4) << 4) |
- (TTL74181_read(LS181_12C, TTL74181_OUTPUT_F0, 4) << 0);
+ (TTL74181_read(LS181_12C, TTL74181_OUTPUT_F0, 4) << 0);
m_videoram[offset] = alu_output ^ 0xff;
@@ -403,7 +403,7 @@ WRITE8_MEMBER(berzerk_state::magicram_w)
WRITE8_MEMBER(berzerk_state::magicram_control_w)
{
/* save the control byte, clear the shift data latch,
- and set the intercept flip-flop */
+ and set the intercept flip-flop */
m_magicram_control = data;
m_last_shift_data = 0;
m_intercept = 1;
@@ -431,14 +431,14 @@ static void get_pens(running_machine &machine, pen_t *pens)
if (machine.root_device().ioport(MONITOR_TYPE_PORT_TAG)->read() == 0)
compute_resistor_weights(0, 0xff, -1.0,
- 2, resistances_wg, color_weights, 0, 270,
- 2, resistances_wg, color_weights, 0, 270,
- 2, resistances_wg, color_weights, 0, 270);
+ 2, resistances_wg, color_weights, 0, 270,
+ 2, resistances_wg, color_weights, 0, 270,
+ 2, resistances_wg, color_weights, 0, 270);
else
compute_resistor_weights(0, 0xff, -1.0,
- 2, resistances_el, color_weights, 0, 270,
- 2, resistances_el, color_weights, 0, 270,
- 2, resistances_el, color_weights, 0, 270);
+ 2, resistances_el, color_weights, 0, 270,
+ 2, resistances_el, color_weights, 0, 270,
+ 2, resistances_el, color_weights, 0, 270);
for (color = 0; color < NUM_PENS; color++)
{
@@ -535,7 +535,7 @@ WRITE8_MEMBER(berzerk_state::berzerk_audio_w)
s14001a_set_volume(device, ((data & 0x38) >> 3) + 1);
/* clock control - the first LS161 divides the clock by 9 to 16, the 2nd by 8,
- giving a final clock from 19.5kHz to 34.7kHz */
+ giving a final clock from 19.5kHz to 34.7kHz */
clock_divisor = 16 - (data & 0x07);
s14001a_set_clock(device, S14001_CLOCK / clock_divisor / 8);
@@ -716,16 +716,16 @@ static INPUT_PORTS_START( common ) // used on all games
PORT_START("SW2")
/* port for the 'bookkeeping reset' and 'bookkeeping' buttons;
- * The 'bookkeeping reset' button is an actual button on the zpu-1000 and
- * zpu-1001 pcbs, labeled 'S2' or 'SW2'. It is wired to bit 0.
- * * pressing it while high scores are displayed will give a free game
- * without adding any coin info to the bookkeeping info in nvram.
- * The 'bookkeeping' button is wired to the control panel, usually hidden
- * underneath or only accessible through the coin door. Wired to bit 7.
- * * It displays various bookkeeping statistics when pressed sequentially.
- * Pressing P1 fire (according to the manual) when stats are displayed
- * will clear the stat shown on screen.
- */
+ * The 'bookkeeping reset' button is an actual button on the zpu-1000 and
+ * zpu-1001 pcbs, labeled 'S2' or 'SW2'. It is wired to bit 0.
+ * * pressing it while high scores are displayed will give a free game
+ * without adding any coin info to the bookkeeping info in nvram.
+ * The 'bookkeeping' button is wired to the control panel, usually hidden
+ * underneath or only accessible through the coin door. Wired to bit 7.
+ * * It displays various bookkeeping statistics when pressed sequentially.
+ * Pressing P1 fire (according to the manual) when stats are displayed
+ * will clear the stat shown on screen.
+ */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_NAME("Free Game (not logged in bookkeeping)")
PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SERVICE2 ) PORT_NAME("Bookkeeping") PORT_CODE(KEYCODE_F1)
@@ -794,8 +794,8 @@ static INPUT_PORTS_START( frenzy )
PORT_START("F2")
/* Bit 0 does some more hardware tests. According to the manual, both bit 0 & 1 must be:
- - ON for Signature Analysis (S.A.)
- - OFF for game operation */
+ - ON for Signature Analysis (S.A.)
+ - OFF for game operation */
//PORT_BIT( 0x03, IP_ACTIVE_HIGH, IPT_UNUSED ) // F2:1,2
PORT_DIPNAME( 0x03, 0x00, "Hardware Tests" ) PORT_DIPLOCATION("F2:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
@@ -946,7 +946,7 @@ static INPUT_PORTS_START( moonwarp )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_START("P1_DIAL")
- PORT_BIT( 0xff, 0x0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(4) PORT_RESET
+ PORT_BIT( 0xff, 0x0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(4) PORT_RESET
PORT_START("P2")
//PORT_BIT( 0x1f, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_COCKTAIL // spinner/dial
@@ -955,7 +955,7 @@ static INPUT_PORTS_START( moonwarp )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_START("P2_DIAL")
- PORT_BIT( 0xff, 0x0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(4) PORT_COCKTAIL PORT_RESET
+ PORT_BIT( 0xff, 0x0, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(4) PORT_COCKTAIL PORT_RESET
PORT_START("F2")
PORT_DIPNAME( 0x03, 0x00, "Hardware Tests" ) PORT_DIPLOCATION("F2:1,2")
@@ -1099,7 +1099,7 @@ static MACHINE_CONFIG_START( berzerk, berzerk_state )
MCFG_SOUND_RESET(berzerk)
- MCFG_SOUND_ADD("speech", S14001A, 0) /* placeholder - the clock is software controllable */
+ MCFG_SOUND_ADD("speech", S14001A, 0) /* placeholder - the clock is software controllable */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MCFG_SOUND_ADD("exidy", EXIDY, 0)
@@ -1153,8 +1153,8 @@ ROM_START( berzerk )
ROM_FILL( 0x3800, 0x0800, 0xff )
ROM_REGION( 0x01000, "speech", 0 ) /* voice data */
- ROM_LOAD( "berzerk_r_vo_1c.1c", 0x0000, 0x0800, CRC(2cfe825d) SHA1(f12fed8712f20fa8213f606c4049a8144bfea42e) ) /* VSU-1000 board */
- ROM_LOAD( "berzerk_r_vo_2c.2c", 0x0800, 0x0800, CRC(d2b6324e) SHA1(20a6611ad6ec19409ac138bdae7bdfaeab6c47cf) ) /* ditto */
+ ROM_LOAD( "berzerk_r_vo_1c.1c", 0x0000, 0x0800, CRC(2cfe825d) SHA1(f12fed8712f20fa8213f606c4049a8144bfea42e) ) /* VSU-1000 board */
+ ROM_LOAD( "berzerk_r_vo_2c.2c", 0x0800, 0x0800, CRC(d2b6324e) SHA1(20a6611ad6ec19409ac138bdae7bdfaeab6c47cf) ) /* ditto */
ROM_END
ROM_START( berzerk1 )
@@ -1168,8 +1168,8 @@ ROM_START( berzerk1 )
ROM_FILL( 0x3800, 0x0800, 0xff )
ROM_REGION( 0x01000, "speech", 0 ) /* voice data */
- ROM_LOAD( "berzerk_r_vo_1c.1c", 0x0000, 0x0800, CRC(2cfe825d) SHA1(f12fed8712f20fa8213f606c4049a8144bfea42e) ) /* VSU-1000 board */
- ROM_LOAD( "berzerk_r_vo_2c.2c", 0x0800, 0x0800, CRC(d2b6324e) SHA1(20a6611ad6ec19409ac138bdae7bdfaeab6c47cf) ) /* ditto */
+ ROM_LOAD( "berzerk_r_vo_1c.1c", 0x0000, 0x0800, CRC(2cfe825d) SHA1(f12fed8712f20fa8213f606c4049a8144bfea42e) ) /* VSU-1000 board */
+ ROM_LOAD( "berzerk_r_vo_2c.2c", 0x0800, 0x0800, CRC(d2b6324e) SHA1(20a6611ad6ec19409ac138bdae7bdfaeab6c47cf) ) /* ditto */
ROM_END
ROM_START( berzerkg )
@@ -1183,8 +1183,8 @@ ROM_START( berzerkg )
ROM_FILL( 0x3800, 0x0800, 0xff )
ROM_REGION( 0x01000, "speech", 0 ) /* voice data */
- ROM_LOAD( "berzerk_german_1c.1c", 0x0000, 0x0800, CRC(fc1da15f) SHA1(f759a017d9e95acf0e1d35b16d8820acee7d7e3d) ) /* VSU-1000 board */
- ROM_LOAD( "berzerk_german_2c.2c", 0x0800, 0x0800, CRC(7f6808fb) SHA1(8a9c43597f924221f68d1b31e033f1dc492cddc5) ) /* ditto */
+ ROM_LOAD( "berzerk_german_1c.1c", 0x0000, 0x0800, CRC(fc1da15f) SHA1(f759a017d9e95acf0e1d35b16d8820acee7d7e3d) ) /* VSU-1000 board */
+ ROM_LOAD( "berzerk_german_2c.2c", 0x0800, 0x0800, CRC(7f6808fb) SHA1(8a9c43597f924221f68d1b31e033f1dc492cddc5) ) /* ditto */
ROM_END
@@ -1197,8 +1197,8 @@ ROM_START( frenzy )
ROM_LOAD( "6d-4", 0xc000, 0x1000, CRC(5581a7b1) SHA1(1f633c1c29d3b64f701c601feba26da66a6c6f23) )
ROM_REGION( 0x01000, "speech", 0 ) /* voice data */
- ROM_LOAD( "e169-1cvo.1c", 0x0000, 0x0800, CRC(2cfe825d) SHA1(f12fed8712f20fa8213f606c4049a8144bfea42e) ) /* VSU-1000 board */
- ROM_LOAD( "e169-2cvo.2c", 0x0800, 0x0800, CRC(d2b6324e) SHA1(20a6611ad6ec19409ac138bdae7bdfaeab6c47cf) ) /* ditto */
+ ROM_LOAD( "e169-1cvo.1c", 0x0000, 0x0800, CRC(2cfe825d) SHA1(f12fed8712f20fa8213f606c4049a8144bfea42e) ) /* VSU-1000 board */
+ ROM_LOAD( "e169-2cvo.2c", 0x0800, 0x0800, CRC(d2b6324e) SHA1(20a6611ad6ec19409ac138bdae7bdfaeab6c47cf) ) /* ditto */
ROM_REGION( 0x0020, "proms", 0 )
ROM_LOAD( "prom.6e", 0x0000, 0x0020, CRC(4471ca5d) SHA1(ba8dca2ec076818f8ad8c17b15c77965e36fa05e) ) /* address decoder/rom select prom (N82S123N) */
@@ -1224,7 +1224,7 @@ ROM_START( moonwarp )
ROM_LOAD( "5c.bin", 0xc000, 0x1000, CRC(a3d551ab) SHA1(a32352727b5475a6ec6c495c55f01ccd6e024f98) )
ROM_REGION( 0x01000, "speech", 0 ) /* voice data */
- ROM_LOAD( "moonwar.1c.bin", 0x0000, 0x0800, CRC(9e9a653f) SHA1(cf49a38ef343ace271ba1e5dde38bd8b9c0bd876) ) /* VSU-1000 board */
+ ROM_LOAD( "moonwar.1c.bin", 0x0000, 0x0800, CRC(9e9a653f) SHA1(cf49a38ef343ace271ba1e5dde38bd8b9c0bd876) ) /* VSU-1000 board */
ROM_LOAD( "moonwar.2c.bin", 0x0800, 0x0800, CRC(73fd988d) SHA1(08a2aeb4d87eee58e38e4e3f749a95f2308aceb0) ) /* ditto */
ROM_REGION( 0x0020, "proms", 0 )
diff --git a/src/mame/drivers/bestleag.c b/src/mame/drivers/bestleag.c
index 9201bd4c380..eba7bc87932 100644
--- a/src/mame/drivers/bestleag.c
+++ b/src/mame/drivers/bestleag.c
@@ -125,9 +125,9 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
/*
- Sprites are the same to sslam, but using 16x16 sprites instead of 8x8
+ Sprites are the same to sslam, but using 16x16 sprites instead of 8x8
- */
+ */
int offs;
@@ -293,7 +293,7 @@ static INPUT_PORTS_START( bestleag )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin B" to "Free Play"
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin B" to "Free Play"
/* 0x01 to 0x05 gives 2C_3C */
PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW.A:5,6,7,8")
PORT_DIPSETTING( 0x70, DEF_STR( 4C_1C ) )
@@ -306,7 +306,7 @@ static INPUT_PORTS_START( bestleag )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin A" to "Free Play"
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin A" to "Free Play"
/* 0x10 to 0x50 gives 2C_3C */
PORT_START("DSWB")
@@ -319,10 +319,10 @@ static INPUT_PORTS_START( bestleag )
PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
PORT_DIPNAME( 0x18, 0x18, "Timer Speed" ) PORT_DIPLOCATION("SW.B:4,5")
- PORT_DIPSETTING( 0x08, "Slow" ) // 65
- PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // 50
- PORT_DIPSETTING( 0x10, "Fast" ) // 35
- PORT_DIPSETTING( 0x00, "Fastest" ) // 25
+ PORT_DIPSETTING( 0x08, "Slow" ) // 65
+ PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // 50
+ PORT_DIPSETTING( 0x10, "Fast" ) // 35
+ PORT_DIPSETTING( 0x00, "Fastest" ) // 25
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW.B:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
@@ -462,4 +462,3 @@ ROM_END
GAME( 1993, bestleag, bigstrik, bestleag, bestleag, driver_device, 0, ROT0, "bootleg", "Best League (bootleg of Big Striker, Italian Serie A)", GAME_NO_COCKTAIL )
GAME( 1993, bestleaw, bigstrik, bestleaw, bestleag, driver_device, 0, ROT0, "bootleg", "Best League (bootleg of Big Striker, World Cup)", GAME_NO_COCKTAIL )
-
diff --git a/src/mame/drivers/bfcobra.c b/src/mame/drivers/bfcobra.c
index 49a7fdc268d..f1cb6848341 100644
--- a/src/mame/drivers/bfcobra.c
+++ b/src/mame/drivers/bfcobra.c
@@ -85,8 +85,8 @@
/*
Defines
*/
-#define Z80_XTAL 5910000 /* Unconfirmed */
-#define M6809_XTAL 1000000
+#define Z80_XTAL 5910000 /* Unconfirmed */
+#define M6809_XTAL 1000000
/*
@@ -114,58 +114,58 @@ union ADDR_REG
};
/* Blitter register flag bits */
-#define CMD_RUN 0x01
-#define CMD_COLST 0x02
-#define CMD_PARRD 0x04 /* Never used? */
-#define CMD_SRCUP 0x08
-#define CMD_DSTUP 0x10
-#define CMD_LT0 0x20
-#define CMD_LT1 0x40
-#define CMD_LINEDRAW 0x80
+#define CMD_RUN 0x01
+#define CMD_COLST 0x02
+#define CMD_PARRD 0x04 /* Never used? */
+#define CMD_SRCUP 0x08
+#define CMD_DSTUP 0x10
+#define CMD_LT0 0x20
+#define CMD_LT1 0x40
+#define CMD_LINEDRAW 0x80
/* All unconfirmed */
//#define SRCDST_CMP 0x10
//#define SRCDST_WRAP 0x20
//#define SRCDST_SIGN 0x40
-#define SRCDST_A_1 0x80 /* This might be correct for line drawing? */
+#define SRCDST_A_1 0x80 /* This might be correct for line drawing? */
/* These appear to be correct */
-#define MODE_SSIGN 0x80
-#define MODE_DSIGN 0x40
-#define MODE_YFRAC 0x20
-#define MODE_BITTOBYTE 0x04
-#define MODE_PALREMAP 0x10
-
-#define CMPFUNC_LT 0x01
-#define CMPFUNC_EQ 0x02
-#define CMPFUNC_GT 0x04
-#define CMPFUNC_BEQ 0x08
-#define CMPFUNC_LOG0 0x10
-#define CMPFUNC_LOG1 0x20
-#define CMPFUNC_LOG2 0x40
-#define CMPFUNC_LOG3 0x80
+#define MODE_SSIGN 0x80
+#define MODE_DSIGN 0x40
+#define MODE_YFRAC 0x20
+#define MODE_BITTOBYTE 0x04
+#define MODE_PALREMAP 0x10
+
+#define CMPFUNC_LT 0x01
+#define CMPFUNC_EQ 0x02
+#define CMPFUNC_GT 0x04
+#define CMPFUNC_BEQ 0x08
+#define CMPFUNC_LOG0 0x10
+#define CMPFUNC_LOG1 0x20
+#define CMPFUNC_LOG2 0x40
+#define CMPFUNC_LOG3 0x80
/*
Blitter state
*/
struct blitter_t
{
- ADDR_REG program;
+ ADDR_REG program;
- UINT8 control;
- UINT8 status;
+ UINT8 control;
+ UINT8 status;
- UINT8 command;
- ADDR_REG source;
- ADDR_REG dest;
- UINT8 modectl;
- UINT8 compfunc;
- UINT8 outercnt;
+ UINT8 command;
+ ADDR_REG source;
+ ADDR_REG dest;
+ UINT8 modectl;
+ UINT8 compfunc;
+ UINT8 outercnt;
- UINT8 innercnt;
- UINT8 step;
- UINT8 pattern;
+ UINT8 innercnt;
+ UINT8 step;
+ UINT8 pattern;
};
#define LOOPTYPE ( ( blitter.command&0x60 ) >> 5 )
@@ -175,43 +175,43 @@ struct blitter_t
*/
struct ramdac_t
{
- UINT8 addr_w;
- UINT8 addr_r;
- UINT8 mask;
+ UINT8 addr_w;
+ UINT8 addr_r;
+ UINT8 mask;
/* 18-bit colors */
- UINT8 color_r[3];
- UINT8 color_w[3];
- UINT32 table[256];
+ UINT8 color_r[3];
+ UINT8 color_w[3];
+ UINT32 table[256];
/* Access counts */
- UINT8 count_r;
- UINT8 count_w;
+ UINT8 count_r;
+ UINT8 count_w;
};
struct fdc_t
{
- UINT8 MSR;
-
- int side;
- int track;
- int sector;
- int number;
- int stop_track;
- int setup_read;
-
- int byte_pos;
- int offset;
-
- int phase;
- int next_phase;
- int cmd_len;
- int cmd_cnt;
- int res_len;
- int res_cnt;
- UINT8 cmd[10];
- UINT8 results[8];
+ UINT8 MSR;
+
+ int side;
+ int track;
+ int sector;
+ int number;
+ int stop_track;
+ int setup_read;
+
+ int byte_pos;
+ int offset;
+
+ int phase;
+ int next_phase;
+ int cmd_len;
+ int cmd_cnt;
+ int res_len;
+ int res_cnt;
+ UINT8 cmd[10];
+ UINT8 results[8];
};
@@ -364,7 +364,7 @@ void bfcobra_state::video_start()
m_col7bit[i] = col;
col = (col & 3) | (col76index[( (col & 0x0c) >> 2) & 3] << 2 ) |
- (col76index[( (col & 0x30) >> 4) & 3] << 5 );
+ (col76index[( (col & 0x30) >> 4) & 3] << 5 );
m_col6bit[i] = col;
}
}
@@ -461,7 +461,7 @@ INLINE UINT8* blitter_get_addr(running_machine &machine, UINT32 addr)
*/
static void RunBlit(address_space &space)
{
-#define BLITPRG_READ(x) blitter.x = *(blitter_get_addr(space.machine(), blitter.program.addr++))
+#define BLITPRG_READ(x) blitter.x = *(blitter_get_addr(space.machine(), blitter.program.addr++))
bfcobra_state *state = space.machine().driver_data<bfcobra_state>();
struct blitter_t &blitter = state->m_blitter;
@@ -492,30 +492,30 @@ static void RunBlit(address_space &space)
if (DEBUG_BLITTER)
{
mame_printf_debug("\n%s:Blitter: Running command from 0x%.5x\n\n", device->machine().describe_context(), blitter.program.addr - 12);
- mame_printf_debug("Command Reg %.2x", blitter.command);
- mame_printf_debug(" %s %s %s %s %s %s %s\n",
+ mame_printf_debug("Command Reg %.2x", blitter.command);
+ mame_printf_debug(" %s %s %s %s %s %s %s\n",
blitter.command & CMD_RUN ? "RUN" : " ",
blitter.command & CMD_COLST ? "COLST" : " ",
blitter.command & CMD_PARRD ? "PARRD" : " ",
blitter.command & CMD_SRCUP ? "SRCUP" : " ",
blitter.command & CMD_DSTUP ? "DSTUP" : " ");
- mame_printf_debug("Src Address Byte 0 %.2x\n", blitter.source.addr0);
- mame_printf_debug("Src Address Byte 1 %.2x\n", blitter.source.addr1);
- mame_printf_debug("Src Control %.2x\n", blitter.source.addr2);
- mame_printf_debug(" Src Address %.5x\n", blitter.source.addr & 0xfffff);
- mame_printf_debug("Dest Address Byte 0 %.2x\n", blitter.dest.addr0);
- mame_printf_debug("Dest Address Byte 1 %.2x\n", blitter.dest.addr1);
- mame_printf_debug("Dest Control %.2x\n", blitter.dest.addr2);
- mame_printf_debug(" Dst. Address %.5x\n", blitter.dest.addr & 0xfffff);
- mame_printf_debug("Mode Control %.2x", blitter.modectl);
- mame_printf_debug(" %s\n", blitter.modectl & MODE_BITTOBYTE ? "BIT_TO_BYTE" : "");
-
- mame_printf_debug("Comp. and LFU %.2x\n", blitter.compfunc);
+ mame_printf_debug("Src Address Byte 0 %.2x\n", blitter.source.addr0);
+ mame_printf_debug("Src Address Byte 1 %.2x\n", blitter.source.addr1);
+ mame_printf_debug("Src Control %.2x\n", blitter.source.addr2);
+ mame_printf_debug(" Src Address %.5x\n", blitter.source.addr & 0xfffff);
+ mame_printf_debug("Dest Address Byte 0 %.2x\n", blitter.dest.addr0);
+ mame_printf_debug("Dest Address Byte 1 %.2x\n", blitter.dest.addr1);
+ mame_printf_debug("Dest Control %.2x\n", blitter.dest.addr2);
+ mame_printf_debug(" Dst. Address %.5x\n", blitter.dest.addr & 0xfffff);
+ mame_printf_debug("Mode Control %.2x", blitter.modectl);
+ mame_printf_debug(" %s\n", blitter.modectl & MODE_BITTOBYTE ? "BIT_TO_BYTE" : "");
+
+ mame_printf_debug("Comp. and LFU %.2x\n", blitter.compfunc);
mame_printf_debug("Outer Loop Count %.2x (%d)\n", blitter.outercnt, blitter.outercnt);
mame_printf_debug("Inner Loop Count %.2x (%d)\n", blitter.innercnt, blitter.innercnt);
- mame_printf_debug("Step Value %.2x\n", blitter.step);
- mame_printf_debug("Pattern Byte %.2x\n", blitter.pattern);
+ mame_printf_debug("Step Value %.2x\n", blitter.step);
+ mame_printf_debug("Pattern Byte %.2x\n", blitter.pattern);
}
#endif
@@ -580,10 +580,10 @@ static void RunBlit(address_space &space)
}
else do
{
- UINT8 inhibit = 0;
+ UINT8 inhibit = 0;
/* TODO: Set this correctly */
- UINT8 result = blitter.pattern;
+ UINT8 result = blitter.pattern;
if (LOOPTYPE == 3 && innercnt == blitter.innercnt)
{
@@ -677,10 +677,10 @@ static void RunBlit(address_space &space)
if (blitter.modectl == MODE_PALREMAP)
{
/*
- In this mode, the source points to a 256 entry lookup table.
- The existing destination pixel is used as a lookup
- into the table and the colours is replaced.
- */
+ In this mode, the source points to a 256 entry lookup table.
+ The existing destination pixel is used as a lookup
+ into the table and the colours is replaced.
+ */
UINT8 dest = *blitter_get_addr(space.machine(), blitter.dest.addr);
UINT8 newcol = *(blitter_get_addr(space.machine(), (blitter.source.addr + dest) & 0xfffff));
@@ -1124,9 +1124,9 @@ READ8_MEMBER(bfcobra_state::fdctrl_r)
READ8_MEMBER(bfcobra_state::fddata_r)
{
struct fdc_t &fdc = m_fdc;
- #define BPS 1024
- #define SPT 10
- #define BPT 1024*10
+ #define BPS 1024
+ #define SPT 10
+ #define BPT 1024*10
UINT8 val = 0;
@@ -1408,9 +1408,9 @@ WRITE8_MEMBER(bfcobra_state::meter_w)
m_meter_latch = data;
/*
- When a meter is triggered, the current drawn is sensed. If a meter
- is connected, the /FIRQ line will be pulsed.
- */
+ When a meter is triggered, the current drawn is sensed. If a meter
+ is connected, the /FIRQ line will be pulsed.
+ */
for (i = 0; i < 8; i++)
{
if (changed & (1 << i))
@@ -1478,11 +1478,11 @@ WRITE8_MEMBER(bfcobra_state::upd_w)
}
static ADDRESS_MAP_START( m6809_prog_map, AS_PROGRAM, 8, bfcobra_state )
- AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE("nvram")
- AM_RANGE(0x2000, 0x2000) AM_RAM // W 'B', 6F
- AM_RANGE(0x2200, 0x2200) AM_RAM // W 'F'
+ AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE("nvram")
+ AM_RANGE(0x2000, 0x2000) AM_RAM // W 'B', 6F
+ AM_RANGE(0x2200, 0x2200) AM_RAM // W 'F'
AM_RANGE(0x2600, 0x2600) AM_READWRITE(meter_r, meter_w)
- AM_RANGE(0x2800, 0x2800) AM_RAM // W
+ AM_RANGE(0x2800, 0x2800) AM_RAM // W
AM_RANGE(0x2A00, 0x2A02) AM_READWRITE(latch_r, latch_w)
AM_RANGE(0x2E00, 0x2E00) AM_READ(int_latch_r)
AM_RANGE(0x3001, 0x3001) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w)
@@ -1496,7 +1496,7 @@ static ADDRESS_MAP_START( m6809_prog_map, AS_PROGRAM, 8, bfcobra_state )
// AM_RANGE(0x3600, 0x3600) AM_NOP
AM_RANGE(0x3801, 0x3801) AM_READWRITE(upd_r, upd_w)
AM_RANGE(0x8000, 0xffff) AM_ROM
- AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* Watchdog */
+ AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* Watchdog */
ADDRESS_MAP_END
static INPUT_PORTS_START( bfcobra )
@@ -1681,7 +1681,7 @@ READ_LINE_MEMBER(bfcobra_state::data_acia_rx_r)
WRITE_LINE_MEMBER(bfcobra_state::data_acia_tx_w)
{
- m_data_t = state;
+ m_data_t = state;
}
@@ -1702,9 +1702,9 @@ static ACIA6850_INTERFACE( data_acia_if )
DRIVER_INIT_MEMBER(bfcobra_state,bfcobra)
{
/*
- 6809 ROM address and data lines are scrambled.
- This is the same scrambling as Scorpion 2.
- */
+ 6809 ROM address and data lines are scrambled.
+ This is the same scrambling as Scorpion 2.
+ */
static const UINT8 datalookup[] = { 1, 3, 5, 6, 4, 2, 0, 7 };
static const UINT8 addrlookup[] = { 11, 12, 0, 2, 3, 5, 7, 9, 8, 6, 1, 4, 10, 13, 14 };
@@ -1833,7 +1833,7 @@ ROM_START( inquiztr )
ROM_REGION( 0x20000, "altuser1", 0 )
ROM_LOAD( "9576028.bin", 0x10000, 0x10000, CRC(2d85682c) SHA1(baec47bff4b8beef5afbb737dc57b22bf93ebcf8) )
- // these look quite different.. (like they belong together) but booting with these gives a checksum error (banking?)
+ // these look quite different.. (like they belong together) but booting with these gives a checksum error (banking?)
ROM_LOAD( "inqvypp1", 0x00000, 0x010000, CRC(9bac8c6e) SHA1(15e24d60c2f3997e637694f60daa552b22628766) )
ROM_LOAD( "inqvypp2", 0x10000, 0x010000, CRC(f9cd196c) SHA1(0ac31d87462cbee6f41e19aefe740d876910bdf5) )
@@ -1959,23 +1959,23 @@ ROM_START( qosb )
/* there is a set close to this with
- ROM_LOAD( "qosrom0", 0x0000, 0x080000, CRC(4f150634) SHA1(beb1d3c212b189f3baa08fe454e83f30108be08e) )
- qosrom1 = rom1_307.bin qosb A Question of Sport (39-960-089)
- ROM_LOAD( "qosrom2", 0x0000, 0x080000, CRC(c39737db) SHA1(ccfdb19dab3af064db44e6022248aef98749bc97) )
- ROM_LOAD( "qosrom3", 0x0000, 0x080000, CRC(785b8ff9) SHA1(61b31e0e60c31ecb4b179bfe008a96155d939709) )
- ROM_LOAD( "qossnd1", 0x0000, 0x010000, CRC(888a29f8) SHA1(0e5aa9db54e783708ece1e8c7bffb10d994ab384) )
+ ROM_LOAD( "qosrom0", 0x0000, 0x080000, CRC(4f150634) SHA1(beb1d3c212b189f3baa08fe454e83f30108be08e) )
+ qosrom1 = rom1_307.bin qosb A Question of Sport (39-960-089)
+ ROM_LOAD( "qosrom2", 0x0000, 0x080000, CRC(c39737db) SHA1(ccfdb19dab3af064db44e6022248aef98749bc97) )
+ ROM_LOAD( "qosrom3", 0x0000, 0x080000, CRC(785b8ff9) SHA1(61b31e0e60c31ecb4b179bfe008a96155d939709) )
+ ROM_LOAD( "qossnd1", 0x0000, 0x010000, CRC(888a29f8) SHA1(0e5aa9db54e783708ece1e8c7bffb10d994ab384) )
- but it simply looks like a bad dump, rom3 is an alt 'rom 2' and the others are mostly the same as qosb
- */
+ but it simply looks like a bad dump, rom3 is an alt 'rom 2' and the others are mostly the same as qosb
+ */
ROM_END
-GAME( 1989, inquiztr, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Inquizitor", GAME_NOT_WORKING )
-GAME( 1990, escounts, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Every Second Counts (39-360-053)", GAME_IMPERFECT_GRAPHICS )
-GAME( 1991, trebltop, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Treble Top (39-360-070)", GAME_IMPERFECT_GRAPHICS )
-GAME( 1991, beeline, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Beeline (39-360-075)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS )
-GAME( 1991, quizvadr, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Quizvaders (39-360-078)", GAME_IMPERFECT_GRAPHICS )
-GAME( 1992, qos, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "A Question of Sport (set 1, 39-960-107)", GAME_IMPERFECT_GRAPHICS )
-GAME( 1992, qosa, qos , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "A Question of Sport (set 2, 39-960-099)", GAME_IMPERFECT_GRAPHICS )
-GAME( 1992, qosb, qos , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "A Question of Sport (set 3, 39-960-089)", GAME_IMPERFECT_GRAPHICS )
+GAME( 1989, inquiztr, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Inquizitor", GAME_NOT_WORKING )
+GAME( 1990, escounts, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Every Second Counts (39-360-053)", GAME_IMPERFECT_GRAPHICS )
+GAME( 1991, trebltop, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Treble Top (39-360-070)", GAME_IMPERFECT_GRAPHICS )
+GAME( 1991, beeline, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Beeline (39-360-075)", GAME_NOT_WORKING | GAME_IMPERFECT_GRAPHICS )
+GAME( 1991, quizvadr, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "Quizvaders (39-360-078)", GAME_IMPERFECT_GRAPHICS )
+GAME( 1992, qos, 0 , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "A Question of Sport (set 1, 39-960-107)", GAME_IMPERFECT_GRAPHICS )
+GAME( 1992, qosa, qos , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "A Question of Sport (set 2, 39-960-099)", GAME_IMPERFECT_GRAPHICS )
+GAME( 1992, qosb, qos , bfcobra, bfcobra, bfcobra_state, bfcobra, ROT0, "BFM", "A Question of Sport (set 3, 39-960-089)", GAME_IMPERFECT_GRAPHICS )
diff --git a/src/mame/drivers/bfm_ad5.c b/src/mame/drivers/bfm_ad5.c
index 87449cf6b08..98834cfa988 100644
--- a/src/mame/drivers/bfm_ad5.c
+++ b/src/mame/drivers/bfm_ad5.c
@@ -41,8 +41,8 @@ DRIVER_INIT_MEMBER(adder5_state,ad5)
// help identify roms where one of the pair is missing too
if (!found)
{
- found = find_project_string(machine(), 3, 1);
- found = find_project_string(machine(), 3, 2);
+ found = find_project_string(machine(), 3, 1);
+ found = find_project_string(machine(), 3, 2);
}
if (!found)
@@ -73,4 +73,3 @@ MACHINE_CONFIG_START( bfm_ad5, adder5_state )
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
/* unknown sound */
MACHINE_CONFIG_END
-
diff --git a/src/mame/drivers/bfm_ad5sw.c b/src/mame/drivers/bfm_ad5sw.c
index e730b83b049..5ab40e05e0c 100644
--- a/src/mame/drivers/bfm_ad5sw.c
+++ b/src/mame/drivers/bfm_ad5sw.c
@@ -1644,13 +1644,13 @@ ROM_END
#define ad5mww_others \
ROM_REGION( 0x400000, "pics", ROMREGION_ERASEFF ) \
- ROM_START( ad5mww )
+ ROM_START( ad5mww )
ROM_REGION( 0x1000000, "maincpu", ROMREGION_ERASEFF )
ROM_LOAD( "39211269.bin", 0x0000, 0x7a0866, CRC(0fae0667) SHA1(5356149061413c71b662371aa08f616a28ddbafb) )
ad5mww_others
ROM_END
- ROM_START( ad5mwwa )
+ ROM_START( ad5mwwa )
ROM_REGION( 0x1000000, "maincpu", ROMREGION_ERASEFF )
ROM_LOAD( "39211270.bin", 0x0000, 0x7a097a, CRC(13cb2a2a) SHA1(f00bf3647abf0593eb0708aee103dfd42e623bef) )
ad5mww_others
@@ -1785,352 +1785,351 @@ ROM_END
// PR3255 CASINO COPS TRIPLE CASINO COPS ARCADE PR3255 COPS & ROBBERS SOUNDS11
-GAME( 200?, ad5crcpt ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5crcpta ,ad5crcpt, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5crcpt ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5crcpta ,ad5crcpt, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PROJECT NUMBER PR2334 BULLSEYE_PFP ITSBULLSEYE SOUNDS BULLSEYE_PFP S.SITE
-GAME( 200?, ad5bpfpm ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5bpfpma ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5bpfpmb ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5bpfpm ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5bpfpma ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5bpfpmb ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
// PROJECT NUMBER PR2334 BULLSEYE_PFP BULLSEYEPFP SOUNDS BULLSEYE_PFP S.SITE
-GAME( 200?, ad5bpfpmc ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5bpfpmd ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5bpfpmc ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5bpfpmd ,ad5bpfpm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Bullseye Pounds For Points (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
// PR1601 AWP CRAZY MONEY CRAZY MONEY S.SITE PR1601 CRAZY MONEY SOUNDS11
-GAME( 200?, ad5cmons ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Crazy Money (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5cmonsa ,ad5cmons, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Crazy Money (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5cmons ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Crazy Money (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5cmonsa ,ad5cmons, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Crazy Money (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR3314 AWP DEAL OR NO DEAL PLATINUM SCORP5 PR3314 DOND PLATINUM SOUNDS11
-GAME( 200?, ad5dndpl ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndpla ,ad5dndpl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndplb ,ad5dndpl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndplc ,ad5dndpl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndpl ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndpla ,ad5dndpl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndplb ,ad5dndpl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndplc ,ad5dndpl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Platinum (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PROJECT NUMBER PR3401 AWP HI ROLLER SCORP5 PR3401 HI ROLLER SOUNDS11 HI ROLLER S.SITE
-GAME( 200?, ad5hir ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5hira ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5hirb ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5hirc ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5hir ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5hira ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5hirb ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5hirc ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PROJECT NUMBER PR1755 HI ROLLER PR1755 HI ROLLER SOUNDS12
-GAME( 200?, ad5hircl ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller Club (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5hircla ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller Club (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5hirclb ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller Club (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5hircl ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller Club (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5hircla ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller Club (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5hirclb ,ad5hir, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Hi Roller Club (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
// PROJECT NUMBER PR1965 CASINO DOND TRIPLE CASINO DOND ARCADE PR1965 CASINO DOND R SOUNDS11
-GAME( 200?, ad5dnd ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5dnda ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndb ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndc ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndd ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5dnde ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndf ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndg ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 8)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndh ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 9)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndi ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 10)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndj ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 11)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndk ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 12)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndl ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 13)", GAME_IS_SKELETON )
+GAME( 200?, ad5dnd ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5dnda ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndb ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndc ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndd ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5dnde ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndf ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndg ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 8)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndh ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 9)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndi ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 10)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndj ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 11)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndk ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 12)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndl ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 13)", GAME_IS_SKELETON )
// PROJECT NUMBER PR1945 VIDEO CASINO DOND VID CASINO DOND ARCADE PR1945 CASINO D O N D SOUNDS12
-GAME( 200?, ad5dndm ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 14)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndn ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 15)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndo ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 16)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndp ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 17)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndq ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 18)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndr ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 19)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndm ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 14)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndn ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 15)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndo ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 16)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndp ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 17)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndq ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 18)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndr ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 19)", GAME_IS_SKELETON )
// PROJECT NUMBER PR1945 DEAL OR NO DEAL - BFG*DEAL ( PR1945 CASINO D O N D SOUNDS11 )
-GAME( 200?, ad5dndu ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 22)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndv ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 23)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndu ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 22)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndv ,ad5dnd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Adder 5) (set 23)", GAME_IS_SKELETON )
// PROJECT NUMBER PR3078 DEAL OR NO DEAL - BFG*BDTS ( PR3078 DOND TWIN SOUNDS11 ) (twin screen)
-GAME( 200?, ad5dndcl ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndcla ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndclb ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndclc ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndcld ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndcle ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndclf ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 20)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndclg ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 21)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndcl ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndcla ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndclb ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndclc ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndcld ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndcle ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndclf ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 20)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndclg ,ad5dndcl, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Adder 5) (set 21)", GAME_IS_SKELETON )
// PR3402 AWP DOND DOUBLE DELUXE S5 PR3402 DOUBLE DELUXE SOUNDS11
-GAME( 200?, ad5dnddd ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5dnddda ,ad5dnddd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5dnddd ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5dnddda ,ad5dnddd, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR3526 DEAL OR NO DEAL THE PERFECT GAME - BFGNVVPG ( R3526 DOND PERFG CLUB SOUNDS12 ) (twin screen)
-GAME( 200?, ad5dndpg ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndpga ,ad5dndpg, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndpgb ,ad5dndpg, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5dndpgc ,ad5dndpg, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndpg ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndpga ,ad5dndpg, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndpgb ,ad5dndpg, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5dndpgc ,ad5dndpg, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PR3206 AWP COPS N ROBBERS PR3206 COPS N ROBBERS SOUNDS11
-GAME( 200?, ad5copsr ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsra ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrb ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrd ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsre ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrf ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrk ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrl ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 8)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrm ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 9)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsro ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 10)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrp ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 11)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrq ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 12)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrv ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 13)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrw ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 14)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsra ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrb ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrd ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsre ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrf ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrk ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrl ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 8)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrm ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 9)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsro ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 10)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrp ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 11)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrq ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 12)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrv ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 13)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrw ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR3206) (Bellfruit) (Adder 5) (set 14)", GAME_IS_SKELETON )
// PR1965 CASINO COPS TRIPLE CASINO COPS ARCADE PR3255 COPS & ROBBERS SOUNDS11
-GAME( 200?, ad5copsrc ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrg ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrn ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrr ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrx ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsry ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrc ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrg ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrn ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrr ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrx ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsry ,ad5copsr, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Cops 'n' Robbers (PR1965) (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
// PR2476 COPSNROBB3 COPNROB SOUNDS COPSNROBB3 S.SITE ` MAZNSCBT
-GAME( 200?, ad5crsc ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5crsca ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5crscb ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5crscc ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrj ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsru ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsr0 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 7)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsr2 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 8)", GAME_IS_SKELETON )
+GAME( 200?, ad5crsc ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5crsca ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5crscb ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5crscc ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrj ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsru ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr0 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 7)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr2 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2476) (Mazooma) (Adder 5) (set 8)", GAME_IS_SKELETON )
// PR2495 COPSNROB COPNROB SOUNDS COPSNROB S.SITE ` MAZNSCBF
-GAME( 200?, ad5copsrh ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsri ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrs ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsrt ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsr4 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsr6 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5crscd ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 7)", GAME_IS_SKELETON )
-GAME( 200?, ad5crsce ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 8)", GAME_IS_SKELETON )
-GAME( 200?, ad5crscf ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 9)", GAME_IS_SKELETON )
-GAME( 200?, ad5crscg ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 10)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrh ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsri ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrs ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrt ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr4 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr6 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5crscd ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 7)", GAME_IS_SKELETON )
+GAME( 200?, ad5crsce ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 8)", GAME_IS_SKELETON )
+GAME( 200?, ad5crscf ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 9)", GAME_IS_SKELETON )
+GAME( 200?, ad5crscg ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2495) (Mazooma) (Adder 5) (set 10)", GAME_IS_SKELETON )
// PR2628 COPSNROB COPNROB SOUNDS COPSNROB S.SITE ` MAZ*CRBF
-GAME( 200?, ad5copsr3 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsr5 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5crsch ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsr7 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr3 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr5 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5crsch ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr7 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2628) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PR2497 COPSNROB COPNROB CD SOUNDS COPSNROB S.SITE ` MAZ*COPV
-GAME( 200?, ad5copsrz ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2497) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5copsr1 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2497) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsrz ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2497) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5copsr1 ,ad5crsc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Cops 'n' Robbers (PR2497) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR3217 AWP GOLD MINE PR3217 GOLD MINE SOUNDS11 GOLD MINE S.SITE
-GAME( 200?, ad5gldmn ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmna ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmnb ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmnc ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmnd ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmne ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmnf ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmng ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 8)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmnh ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 9)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmni ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 10)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmnj ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 11)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldmnk ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 12)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmn ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmna ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmnb ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmnc ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmnd ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmne ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmnf ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmng ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 8)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmnh ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 9)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmni ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 10)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmnj ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 11)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldmnk ,ad5gldmn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Gold Mine (Bellfruit) (Adder 5) (set 12)", GAME_IS_SKELETON )
// PR2365 MONOPOLYWOW WOW SOUNDS MONOPOLYWOW S.SITE ` MAZ*BPFP
-GAME( 200?, ad5mowow ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNBPFP) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowl ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNBPFP) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowe ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPBPFP) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowm ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPBPFP) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowow ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNBPFP) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowl ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNBPFP) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowe ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPBPFP) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowm ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPBPFP) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2365 MONOPOLYWOW WOW SOUNDS MONOPOLYWOW S.SITE ` MAZ*MWOW
-GAME( 200?, ad5mowowd ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNMWOW) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowi ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPMWOW) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowd ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNMWOW) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowi ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPMWOW) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
// PR2365 MONOPOLYWOW WOWT SOUNDS MONOPOLYWOW S.SITE ` MAZ*WOWT
-GAME( 200?, ad5mowowa ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNWOWT) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowb ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNWOWT) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowf ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPWOWT) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowg ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPWOWT) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowa ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNWOWT) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowb ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZNWOWT) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowf ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPWOWT) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowg ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2365, MAZPWOWT) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2389 MONOPOLYWOW WOWT SOUNDS MONOPOLYWOW S.SITE ` MAZ*WWBU
-GAME( 200?, ad5mowowc ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2389, MAZNWWBU) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowh ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2389, MAZPWWBU) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowc ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2389, MAZNWWBU) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowh ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR2389, MAZPWWBU) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
// PR3075 VIDEO CASINO WOW CASINO DOND WOW ARCADE PR3075 CASINO DOND WOW SOUNDS11 (wrong game?)
-GAME( 200?, ad5mowowj ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR3075) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5mowowk ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR3075) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowj ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR3075) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5mowowk ,ad5mowow, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (PR3075) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2283 PINK PANTHER ` QPS*PINK (PINK PANTHER SOUNDS)
-GAME( 200?, ad5pp ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSNPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppa ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSNPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppf ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSPPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppg ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSPPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5pp ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSNPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppa ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSNPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppf ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSPPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppg ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2283, QPSPPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2267 PINK PANTHER ` MAZ*PINK (SD_PANTHER SNDS)
-GAME( 200?, ad5ppb ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2267, MAZNPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppc ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2267, MAZNPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5pph ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2267, MAZPPINK) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppb ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2267, MAZNPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppc ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2267, MAZNPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5pph ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (PR2267, MAZPPINK) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
/* (no main ident string) MAZ.PINKP SOUNDS */
-GAME( 200?, ad5ppd ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZNPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppe ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZNPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppi ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZPPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppj ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZPPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppd ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZNPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppe ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZNPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppi ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZPPINK) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppj ,ad5pp, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Pink Panther (MAZPPINK) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR1669 RANDOM SPINNER ` BFGNRNDN ( PR1669 RANDOM SPINNER SNDS11 )
-GAME( 200?, ad5rsclb ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbc ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbd ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbe ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbf ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbi ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbj ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclb ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbc ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbd ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbe ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbf ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbi ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbj ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
// PR1826 RANDOM SPINNER ` BFGNRNDN ( PR1826 RANDOM SPINNER SOUNDS12 )
-GAME( 200?, ad5rsclba ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGNRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbb ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGNRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbg ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGPRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsclbh ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGPRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclba ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGNRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbb ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGNRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbg ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGPRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsclbh ,ad5rsclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner Club (PR1826, BFGPRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2217 RANDOM MONOPOLY ` MAZ*RNDN - S16MONOP SOUNDS
-GAME( 200?, ad5monop ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopa ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopb ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopc ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopf ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopg ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5monoph ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopi ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5monop ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopa ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopb ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopc ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZNRNDN) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopf ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopg ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5monoph ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopi ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2217, MAZPRNDN) (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PR2221 RANDOM MONOPOLY ` MAZ*RNDN - S16MONOP SOUNDS
-GAME( 200?, ad5monopd ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZNRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5monope ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZNRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopj ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZPRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5monopk ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZPRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopd ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZNRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5monope ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZNRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopj ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZPRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5monopk ,ad5monop, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly (PR2221, MAZPRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR1669 RANDOM SPINNER ` BFGNRNDN ( PR1669 RANDOM SPINNER SNDS11 )
-GAME( 200?, ad5rspin ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rspinb ,ad5rspin, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rspin ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner (PR1669, BFGNRNDN) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rspinb ,ad5rspin, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner (PR1669, BFGPRNDN) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR1872 HOT SPINNER ASTURIAS 2.00 (wrong game?) ( PR1506 RANDOM SPINNER ) (non-english, can't find a sound string)
-GAME( 200?, ad5rspinc ,ad5rspin, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rspinc ,ad5rspin, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Spinner (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
// PR1758 BULLSEYE TRIPLE ` BFG*BULS ( PR1758 BULLSEYE TRIPLE SOUNDS11 )
-GAME( 200?, ad5btc ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Bullseye Triple Club (PR1758, BFGPBULS) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5btca ,ad5btc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Bullseye Triple Club (PR1758, BFGPBULS) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5btcb ,ad5btc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Bullseye Triple Club (PR1758, BFGNBULS) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5btc ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Bullseye Triple Club (PR1758, BFGPBULS) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5btca ,ad5btc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Bullseye Triple Club (PR1758, BFGPBULS) (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5btcb ,ad5btc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Bullseye Triple Club (PR1758, BFGNBULS) (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PR2226 RANDOM SPINNWIN ` MAZ*RNDN ( S16RSPINNWIN SOUNDS )
-GAME( 200?, ad5rsnw ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZNRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsnwa ,ad5rsnw, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZNRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsnwb ,ad5rsnw, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZPRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsnwc ,ad5rsnw, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZPRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsnw ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZNRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsnwa ,ad5rsnw, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZNRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsnwb ,ad5rsnw, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZPRNDN) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsnwc ,ad5rsnw, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Spin 'n' Win (PR2226, MAZPRNDN) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR3084 VIDEO SUPER SLAM VIDEO SUPER SLAM CLUB PR3084 SUPER SLAM VID SOUNDS11
-GAME( 200?, ad5sslam ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5sslama ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5sslamb ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5sslamc ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5sslamd ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5sslame ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5sslamf ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
+GAME( 200?, ad5sslam ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5sslama ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5sslamb ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5sslamc ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5sslamd ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5sslame ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5sslamf ,ad5sslam, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Super Slam (Bellfruit) (Adder 5) (set 7)", GAME_IS_SKELETON )
// PR2419 ROAD TO RICHES MR2R SOUNDS
-GAME( 200?, ad5mr2r ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2ra ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2rb ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2rc ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2rd ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2re ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 6)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2rf ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 7)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2rg ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 8)", GAME_IS_SKELETON )
-GAME( 200?, ad5mr2rh ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 9)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2r ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2ra ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2rb ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2rc ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2rd ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2re ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2rf ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 7)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2rg ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 8)", GAME_IS_SKELETON )
+GAME( 200?, ad5mr2rh ,ad5mr2r, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Adder 5) (set 9)", GAME_IS_SKELETON )
// PR1756 RANDOM WINNER ` BFG*RWSX ( PR1756 RANDOM WINNER SOUNDS12 )
-GAME( 200?, ad5rwclb ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGNRWSX) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rwclba ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGNRWSX) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5rwclbb ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGPRWSX) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rwclbc ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGPRWSX) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rwclb ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGNRWSX) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rwclba ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGNRWSX) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rwclbb ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGPRWSX) (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rwclbc ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1756, BFGPRWSX) (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR1757 RANDOM WINNER ` BFG*RWCL ( PR1756 RANDOM WINNER SOUNDS12 )
-GAME( 200?, ad5rwclbd ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1757, BFGPRWCL) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5rwclbe ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1757, BFGNRWCL) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5rwclbd ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1757, BFGPRWCL) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5rwclbe ,ad5rwclb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Random Winner Club (PR1757, BFGNRWCL) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
// PR2258 GOLDEN WINNER
-GAME( 200?, ad5gldwn ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Golden Winner (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5gldwna ,ad5gldwn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Golden Winner (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldwn ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Golden Winner (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5gldwna ,ad5gldwn, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Golden Winner (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR1712 RAPID PAY PR1712 RAPID PAY SOUNDS11
-GAME( 200?, ad5rapid ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Rapid Pay (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rapida ,ad5rapid, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Rapid Pay (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rapid ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Rapid Pay (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rapida ,ad5rapid, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Rapid Pay (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2226 JACKPOT MONOPOLY ` MAZ*JACM (JPMONP SOUNDS)
-GAME( 200?, ad5jckmo ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZNJACM) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5jckmoa ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZNJACM) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5jckmoc ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZNJACM) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5jckmod ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZPJACM) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5jckmoe ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZPJACM) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5jckmo ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZNJACM) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5jckmoa ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZNJACM) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5jckmoc ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZNJACM) (Mazooma) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5jckmod ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZPJACM) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5jckmoe ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2226, MAZPJACM) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2253 JACKPOT MONOPOLY ` MAZNJACM (JPMONP SOUNDS)
-GAME( 200?, ad5jckmob ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2253, MAZNJACM) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5jckmob ,ad5jckmo, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Jackpot Monopoly (PR2253, MAZNJACM) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
// PR2304 PINKP_BTB PPBTB SOUNDS PINKP_BTB S.SITE ` QPSNPPBB
-GAME( 200?, ad5ppbtb ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSNPPBB) (Qps) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppbtba ,ad5ppbtb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSNPPBB) (Qps) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppbtbb ,ad5ppbtb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSPPPBB) (Qps) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5ppbtbc ,ad5ppbtb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSPPPBB) (Qps) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppbtb ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSNPPBB) (Qps) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppbtba ,ad5ppbtb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSNPPBB) (Qps) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppbtbb ,ad5ppbtb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSPPPBB) (Qps) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5ppbtbc ,ad5ppbtb, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Pink Panther Break The Bank (PR2304, QPSPPPBB) (Qps) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR3507 AWP VIVA LAS VEGAS SCORP5 PR3507 VIVA LAS VEGAS SOUNDS11
-GAME( 200?, ad5vlv ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5vlvb ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5vlvc ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5vlvd ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-GAME( 200?, ad5vlve ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5vlvf ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
+GAME( 200?, ad5vlv ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5vlvb ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5vlvc ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5vlvd ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5vlve ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5vlvf ,ad5vlv, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Viva Las Vegas (Bellfruit) (Adder 5) (set 6)", GAME_IS_SKELETON )
// PR2331 RROULETTE REEL ROULETTE SOUNDS RROULETTE S.SITE ` QPS*RLRO
-GAME( 200?, ad5rroul ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (QPSNRLRO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5rroula ,ad5rroul, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (QPSPRLRO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5rroul ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (QPSNRLRO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5rroula ,ad5rroul, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (QPSPRLRO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
// PR2331 RROULETTE REEL ROULETTE SOUNDS RROULETTE S.SITE ` MAZ*RERO
-GAME( 200?, ad5rroulb ,ad5rroul, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (MAZNRERO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5rroulc ,ad5rroul, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (MAZPRERO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5rroulb ,ad5rroul, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (MAZNRERO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5rroulc ,ad5rroul, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Roulette (MAZPRERO) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
// PR2444 MONTE CARLO OR BUST MONTE SOUNDS
-GAME( 200?, ad5mcob ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5mcoba ,ad5mcob, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5mcobb ,ad5mcob, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5mcobc ,ad5mcob, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5mcob ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5mcoba ,ad5mcob, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5mcobb ,ad5mcob, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5mcobc ,ad5mcob, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Qps","Monte Carlo Or Bust (Qps) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PR1625 POKER KING PR1625 POKER KING SOUNDS11 POKER KING S.SITE
-GAME( 200?, ad5pking ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Poker King (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5pkinga ,ad5pking, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Poker King (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5pking ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Poker King (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5pkinga ,ad5pking, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Poker King (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR3073 VIDEO POKER ACE VID POKER ACE ARCADE PR3073 POKER ACE SOUNDS11
-GAME( 200?, ad5vpa ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5vpaa ,ad5vpa, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5vpab ,ad5vpa, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5vpac ,ad5vpa, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
+GAME( 200?, ad5vpa ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5vpaa ,ad5vpa, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5vpab ,ad5vpa, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5vpac ,ad5vpa, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Video Poker Ace (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
// PR1629 TORNADO 5.5 (Revision 8) ` BFG*TORD ( PR1627 TORNADO CLUB SOUNDS11 )
-GAME( 200?, ad5tornc ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.5, rv 8, BFGNTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5torncb ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.5, rv 8, BFGPTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5tornc ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.5, rv 8, BFGNTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5torncb ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.5, rv 8, BFGPTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
// PR1629 TORNADO 5.8 (Revision 7) ` BFGPTORD ( PR1627 TORNADO CLUB SOUNDS11 )
-GAME( 200?, ad5tornca ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.8, rv 7, BFGNTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5torncc ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.8, rv 7, BFGPTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5tornca ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.8, rv 7, BFGNTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5torncc ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1629, 5.8, rv 7, BFGPTORD) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
// PR1627 TORNADO 0.1 (Revision 1) ` BFG*TORN ( PR1627 TORNADO CLUB SOUNDS11 )
-GAME( 200?, ad5tornce ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1627, 0.1, rv 1, BFGNTORN) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
-GAME( 200?, ad5torncd ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1627, 0.1, rv 1, BFGPTORN) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5tornce ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1627, 0.1, rv 1, BFGNTORN) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5torncd ,ad5tornc, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Tornado Club (PR1627, 0.1, rv 1, BFGPTORN) (Bellfruit) (Adder 5)", GAME_IS_SKELETON )
// PR2268 REEL CASH
-GAME( 200?, ad5rcash ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Cash (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rcasha ,ad5rcash, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Cash (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rcash ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Cash (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rcasha ,ad5rcash, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Reel Cash (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2284 RANDOM MONOPOLY WOTW ( S16MONOPWOW SOUNDS )
-GAME( 200?, ad5mww ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly Wonders Of The World (PR2284) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5mww ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly Wonders Of The World (PR2284) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
// PR2291 RANDOM MONOPOLY WOTW ( S16MONOPWOW SOUNDS )
-GAME( 200?, ad5mwwa ,ad5mww, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly Wonders Of The World (PR2291) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
+GAME( 200?, ad5mwwa ,ad5mww, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Random Monopoly Wonders Of The World (PR2291) (Mazooma) (Adder 5)", GAME_IS_SKELETON )
// PR2242 EYES DOWN ` MAZ*EYDW
-GAME( 200?, ad5eyes ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZNEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5eyesa ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZNEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5eyesd ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZPEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5eyese ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZPEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyes ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZNEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyesa ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZNEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyesd ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZPEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyese ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2242, MAZPEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR2246 EYES DOWN ` MAZ*EYDW
-GAME( 200?, ad5eyesb ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZNEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5eyesg ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZNEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5eyesc ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZPEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5eyesf ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZPEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyesb ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZNEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyesg ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZNEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyesc ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZPEYDW) (Mazooma) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5eyesf ,ad5eyes, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "Mazooma","Eyes Down (PR2246, MAZPEYDW) (Mazooma) (Adder 5) (set 2)", GAME_IS_SKELETON )
// PR3302 AWP RONNIE O SULLIVANS ROCKET MONEY SCORP5 PR3302 RONNIE ROCKET SOUNDS11
-GAME( 200?, ad5rsrm ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsrma ,ad5rsrm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsrr ,ad5rsrm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
-GAME( 200?, ad5rsrra ,ad5rsrm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
-
+GAME( 200?, ad5rsrm ,0, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 1)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsrma ,ad5rsrm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 2)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsrr ,ad5rsrm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 3)", GAME_IS_SKELETON )
+GAME( 200?, ad5rsrra ,ad5rsrm, bfm_ad5, bfm_ad5, adder5_state, ad5, ROT0, "BFM","Ronnie O'Sullivan's Rocket Money (Bellfruit) (Adder 5) (set 4)", GAME_IS_SKELETON )
diff --git a/src/mame/drivers/bfm_sc1.c b/src/mame/drivers/bfm_sc1.c
index e610df2c303..1d04a45b847 100644
--- a/src/mame/drivers/bfm_sc1.c
+++ b/src/mame/drivers/bfm_sc1.c
@@ -109,7 +109,7 @@ class bfm_sc1_state : public driver_device
public:
bfm_sc1_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_vfd0(*this, "vfd0")
+ m_vfd0(*this, "vfd0")
{ }
optional_device<bfm_bd1_t> m_vfd0;
@@ -186,15 +186,15 @@ public:
#define VFD_CLOCK1 0x80
#define VFD_DATA 0x40
-#define MASTER_CLOCK (XTAL_4MHz)
-#define ADDER_CLOCK (XTAL_8MHz)
+#define MASTER_CLOCK (XTAL_4MHz)
+#define ADDER_CLOCK (XTAL_8MHz)
///////////////////////////////////////////////////////////////////////////
static void Scorpion1_SetSwitchState(bfm_sc1_state *drvstate, int strobe, int data, int state)
{
if ( state ) drvstate->m_sc1_Inputs[strobe] |= (1<<data);
- else drvstate->m_sc1_Inputs[strobe] &= ~(1<<data);
+ else drvstate->m_sc1_Inputs[strobe] &= ~(1<<data);
}
///////////////////////////////////////////////////////////////////////////
@@ -225,7 +225,7 @@ INTERRUPT_GEN_MEMBER(bfm_sc1_state::timer_irq)
{
m_irq_status = 0x01 |0x02; //0xff;
- m_sc1_Inputs[2] = ioport("STROBE0")->read();
+ m_sc1_Inputs[2] = ioport("STROBE0")->read();
generic_pulse_irq_line(device.execute(), M6809_IRQ_LINE, 1);
}
@@ -247,7 +247,7 @@ READ8_MEMBER(bfm_sc1_state::irqlatch_r)
WRITE8_MEMBER(bfm_sc1_state::reel12_w)
{
if ( m_locked & 0x01 )
- { // hardware is still locked,
+ { // hardware is still locked,
if ( data == 0x46 ) m_locked &= ~0x01;
}
else
@@ -269,7 +269,7 @@ WRITE8_MEMBER(bfm_sc1_state::reel12_w)
WRITE8_MEMBER(bfm_sc1_state::reel34_w)
{
if ( m_locked & 0x02 )
- { // hardware is still locked,
+ { // hardware is still locked,
if ( data == 0x42 ) m_locked &= ~0x02;
}
else
@@ -309,7 +309,7 @@ WRITE8_MEMBER(bfm_sc1_state::mmtr_w)
{
int i;
if ( m_locked & 0x04 )
- { // hardware is still locked,
+ { // hardware is still locked,
m_locked &= ~0x04;
}
else
@@ -441,7 +441,7 @@ WRITE8_MEMBER(bfm_sc1_state::mux1latch_w)
int input_strobe = data & 0x07;
if ( !(data & 0x08) )
{ // clock changed to low
- int strobe, offset, pattern, i;
+ int strobe, offset, pattern, i;
strobe = data & 0x07;
offset = strobe<<4;
@@ -606,9 +606,9 @@ WRITE8_MEMBER(bfm_sc1_state::nec_reset_w)
WRITE8_MEMBER(bfm_sc1_state::nec_latch_w)
{
device_t *device = machine().device("upd");
- upd7759_port_w (device, space, 0, data&0x3F); // setup sample
+ upd7759_port_w (device, space, 0, data&0x3F); // setup sample
upd7759_start_w(device, 0);
- upd7759_start_w(device, 1); // start
+ upd7759_start_w(device, 1); // start
}
/////////////////////////////////////////////////////////////////////////////////////
@@ -650,13 +650,13 @@ void bfm_sc1_state::machine_reset()
m_irq_status = 0;
m_is_timer_enabled = 1;
m_coin_inhibits = 0;
- m_mux1_outputlatch = 0x08; // clock HIGH
+ m_mux1_outputlatch = 0x08; // clock HIGH
m_mux1_datalo = 0;
- m_mux1_datahi = 0;
+ m_mux1_datahi = 0;
m_mux1_input = 0;
- m_mux2_outputlatch = 0x08; // clock HIGH
+ m_mux2_outputlatch = 0x08; // clock HIGH
m_mux2_datalo = 0;
- m_mux2_datahi = 0;
+ m_mux2_datahi = 0;
m_mux2_input = 0;
m_vfd0->reset();
@@ -676,7 +676,7 @@ void bfm_sc1_state::machine_reset()
}
m_acia_status = 0x02; // MC6850 transmit buffer empty !!!
- m_locked = 0x07; // hardware is locked
+ m_locked = 0x07; // hardware is locked
// init rom bank ////////////////////////////////////////////////////////////////////
{
@@ -694,18 +694,18 @@ void bfm_sc1_state::machine_reset()
static ADDRESS_MAP_START( sc1_base, AS_PROGRAM, 8, bfm_sc1_state )
AM_RANGE(0x0000, 0x1FFF) AM_RAM AM_SHARE("nvram") //8k RAM
- AM_RANGE(0x2000, 0x21FF) AM_WRITE(reel34_w) // reel 2+3 latch
- AM_RANGE(0x2200, 0x23FF) AM_WRITE(reel12_w) // reel 1+2 latch
- AM_RANGE(0x2400, 0x25FF) AM_WRITE(vfd_w) // vfd latch
+ AM_RANGE(0x2000, 0x21FF) AM_WRITE(reel34_w) // reel 2+3 latch
+ AM_RANGE(0x2200, 0x23FF) AM_WRITE(reel12_w) // reel 1+2 latch
+ AM_RANGE(0x2400, 0x25FF) AM_WRITE(vfd_w) // vfd latch
- AM_RANGE(0x2600, 0x27FF) AM_READWRITE(mmtr_r,mmtr_w) // mechanical meters
- AM_RANGE(0x2800, 0x2800) AM_READWRITE(triac_r,triac_w) // payslide triacs
+ AM_RANGE(0x2600, 0x27FF) AM_READWRITE(mmtr_r,mmtr_w) // mechanical meters
+ AM_RANGE(0x2800, 0x2800) AM_READWRITE(triac_r,triac_w) // payslide triacs
AM_RANGE(0x2A00, 0x2A00) AM_READWRITE(mux1latch_r,mux1latch_w) // mux1
AM_RANGE(0x2A01, 0x2A01) AM_READWRITE(mux1datlo_r,mux1datlo_w)
AM_RANGE(0x2A02, 0x2A02) AM_READWRITE(mux1dathi_r,mux1dathi_w)
- AM_RANGE(0x2E00, 0x2E00) AM_READ(irqlatch_r) // irq latch
+ AM_RANGE(0x2E00, 0x2E00) AM_READ(irqlatch_r) // irq latch
AM_RANGE(0x3001, 0x3001) AM_READ(soundlatch_byte_r)
AM_RANGE(0x3001, 0x3001) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w)
@@ -718,11 +718,11 @@ static ADDRESS_MAP_START( sc1_base, AS_PROGRAM, 8, bfm_sc1_state )
AM_RANGE(0x3409, 0x3409) AM_READWRITE(mux2datlo_r,mux2datlo_w)
AM_RANGE(0x340A, 0x340A) AM_READWRITE(mux2dathi_r,mux2dathi_w)
- AM_RANGE(0x3600, 0x3600) AM_WRITE(bankswitch_w) // write bank
- AM_RANGE(0x3800, 0x39FF) AM_WRITE(reel56_w) // reel 5+6 latch
+ AM_RANGE(0x3600, 0x3600) AM_WRITE(bankswitch_w) // write bank
+ AM_RANGE(0x3800, 0x39FF) AM_WRITE(reel56_w) // reel 5+6 latch
- AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM
- AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages)
+ AM_RANGE(0x4000, 0x5FFF) AM_ROM // 8k ROM
+ AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1") // 8k paged ROM (4 pages)
AM_RANGE(0x8000, 0xFFFF) AM_ROM AM_WRITE (watchdog_reset_w) // 32k ROM
ADDRESS_MAP_END
@@ -734,8 +734,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sc1_adder2, AS_PROGRAM, 8, bfm_sc1_state )
AM_IMPORT_FROM( sc1_base )
- AM_RANGE(0x3E00, 0x3E00) AM_READWRITE(vid_uart_ctrl_r,vid_uart_ctrl_w) // video uart control reg read
- AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r,vid_uart_tx_w) // video uart receive reg
+ AM_RANGE(0x3E00, 0x3E00) AM_READWRITE(vid_uart_ctrl_r,vid_uart_ctrl_w) // video uart control reg read
+ AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r,vid_uart_tx_w) // video uart receive reg
ADDRESS_MAP_END
@@ -756,7 +756,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( scorpion1 )
PORT_START("STROBE0")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3)
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3)
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3)
@@ -870,7 +870,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( clatt )
PORT_START("STROBE0")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("20p")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("50p")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("1 Pound")
@@ -890,11 +890,11 @@ static INPUT_PORTS_START( clatt )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_START("STROBE2")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Stop/Gamble")
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Start")
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_INTERLOCK ) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_INTERLOCK ) PORT_NAME("Front Door") PORT_CODE(KEYCODE_W) PORT_TOGGLE
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("Stop/Gamble")
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Start")
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_INTERLOCK ) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_INTERLOCK ) PORT_NAME("Front Door") PORT_CODE(KEYCODE_W) PORT_TOGGLE
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
@@ -982,7 +982,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( toppoker )
PORT_START("STROBE0")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("Fl 1.00")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
@@ -1097,9 +1097,9 @@ INPUT_PORTS_END
/////////////////////////////////////////////////////////////////////////////////////
static MACHINE_CONFIG_START( scorpion1, bfm_sc1_state )
- MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4) // 6809 CPU at 1 Mhz
- MCFG_CPU_PROGRAM_MAP(sc1_base) // setup read and write memorymap
- MCFG_CPU_PERIODIC_INT_DRIVER(bfm_sc1_state, timer_irq, 1000) // generate 1000 IRQ's per second
+ MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4) // 6809 CPU at 1 Mhz
+ MCFG_CPU_PROGRAM_MAP(sc1_base) // setup read and write memorymap
+ MCFG_CPU_PERIODIC_INT_DRIVER(bfm_sc1_state, timer_irq, 1000) // generate 1000 IRQ's per second
MCFG_WATCHDOG_TIME_INIT(PERIOD_OF_555_MONOSTABLE(120000,100e-9))
MCFG_BFMBD1_ADD("vfd0",0)
@@ -1118,7 +1118,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( scorpion1_adder2, scorpion1 )
MCFG_CPU_MODIFY("maincpu")
- MCFG_CPU_PROGRAM_MAP(sc1_adder2) // setup read and write memorymap
+ MCFG_CPU_PROGRAM_MAP(sc1_adder2) // setup read and write memorymap
MCFG_DEFAULT_LAYOUT(layout_sc1_vid)
MCFG_SCREEN_ADD("adder", RASTER)
@@ -1135,9 +1135,9 @@ static MACHINE_CONFIG_DERIVED( scorpion1_adder2, scorpion1 )
MCFG_PALETTE_INIT(adder2)
MCFG_GFXDECODE(adder2)
- MCFG_CPU_ADD("adder2", M6809, ADDER_CLOCK/4 ) // adder2 board 6809 CPU at 2 Mhz
- MCFG_CPU_PROGRAM_MAP(adder2_memmap) // setup adder2 board memorymap
- MCFG_CPU_VBLANK_INT("adder",adder2_vbl) // board has a VBL IRQ
+ MCFG_CPU_ADD("adder2", M6809, ADDER_CLOCK/4 ) // adder2 board 6809 CPU at 2 Mhz
+ MCFG_CPU_PROGRAM_MAP(adder2_memmap) // setup adder2 board memorymap
+ MCFG_CPU_VBLANK_INT("adder",adder2_vbl) // board has a VBL IRQ
MACHINE_CONFIG_END
/////////////////////////////////////////////////////////////////////////////////////
@@ -1146,7 +1146,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( scorpion1_viper, scorpion1 )
MCFG_CPU_MODIFY("maincpu")
- MCFG_CPU_PROGRAM_MAP(sc1_viper) // setup read and write memorymap
+ MCFG_CPU_PROGRAM_MAP(sc1_viper) // setup read and write memorymap
MCFG_SOUND_ADD("upd",UPD7759, UPD7759_STANDARD_CLOCK)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
@@ -1165,7 +1165,7 @@ static void sc1_common_init(running_machine &machine, int reels, int decrypt, in
{
stepper_config(machine, i, &starpoint_interface_48step);
}
- if (decrypt) bfm_decode_mainrom(machine,"maincpu", state->m_codec_data); // decode main rom
+ if (decrypt) bfm_decode_mainrom(machine,"maincpu", state->m_codec_data); // decode main rom
state->m_defaultbank = defaultbank;
@@ -1253,7 +1253,7 @@ int sc1_find_project_string(running_machine &machine )
DRIVER_INIT_MEMBER(bfm_sc1_state,toppoker)
{
sc1_common_init(machine(),3,1, 3);
- adder2_decode_char_roms(machine()); // decode GFX roms
+ adder2_decode_char_roms(machine()); // decode GFX roms
MechMtr_config(machine(),8);
sc1_find_project_string(machine());
}
@@ -1369,7 +1369,7 @@ ROM_START( m_tppokr )
ROM_LOAD( "tpk010.vid", 0x00000, 0x20000, CRC(ea4eddca) SHA1(5fb805d35376ec7ee8d58684e584621dbb2b2a9c))
ROM_REGION( 0x40000, "gfx1", ROMREGION_ERASEFF )
- ROM_LOAD( "tpk011.chr", 0x00000, 0x20000, CRC(4dc23ad8) SHA1(8e8cc699412dbb092e16e14518f407353f477ee1))
+ ROM_LOAD( "tpk011.chr", 0x00000, 0x20000, CRC(4dc23ad8) SHA1(8e8cc699412dbb092e16e14518f407353f477ee1))
ROM_END
/////////////////////////////////////////////////////////////////////////////////////
@@ -2629,7 +2629,7 @@ ROM_END
#define GAME_FLAGS GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL
//Adder 2
-GAME( 1996, m_tppokr , 0 , scorpion1_adder2 , toppoker , bfm_sc1_state, toppoker , 0, "BFM/ELAM", "Top Poker (Dutch, Game Card 95-750-899)", GAME_FLAGS )
+GAME( 1996, m_tppokr , 0 , scorpion1_adder2 , toppoker , bfm_sc1_state, toppoker , 0, "BFM/ELAM", "Top Poker (Dutch, Game Card 95-750-899)", GAME_FLAGS )
/********************************************************************************************************************************************************************************************************************
@@ -2648,18 +2648,18 @@ ROM_START( sc1cshatb ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "957172.71
ROM_START( sc1cshat ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "cash_attraction_b", 0x0000, 0x8000, CRC(79870574) SHA1(89e5db89064a9e24bc37389d78f4defb7d2f479b) ) ROM_LOAD( "cash_attraction_a", 0x8000, 0x8000, CRC(fab3283c) SHA1(669b425687faad0ebf88c1aaaafa40c446fa2e24) ) ROM_END
// PROJECT NUMBER 5489 CASH ATTRACTION - 18-JUL-1989 12:48:39
-GAME( 198?, sc1cshata , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-109
-GAME( 198?, sc1cshati , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-109
+GAME( 198?, sc1cshata , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-109
+GAME( 198?, sc1cshati , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-109
// PROJECT NUMBER 5489 CASH ATTRACTION VARIABLE % - 18-JUL-1989 14:33:44
-GAME( 198?, sc1cshatc , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-109
-GAME( 198?, sc1cshatf , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-109
+GAME( 198?, sc1cshatc , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-109
+GAME( 198?, sc1cshatf , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-109
// PROJECT NUMBER 5489 CASH ATTRACTION - 26-OCT-1989 16:31:38
-GAME( 198?, sc1cshath , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-119
+GAME( 198?, sc1cshath , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-119
// PROJECT NUMBER 5489 CASH ATTRACTION VARIABLE % - 26-OCT-1989 16:35:40
-GAME( 198?, sc1cshatg , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 4, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-119
+GAME( 198?, sc1cshatg , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 4, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-119
// PROJECT NUMBER 5602 CASH ATTRACTION 20P VARIABLE % - 3-JAN-1990 16:57:23
-GAME( 198?, sc1cshatb , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 5) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-132
-GAME( 198?, sc1cshat , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 5, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-132
+GAME( 198?, sc1cshatb , sc1cshat , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 5) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-132
+GAME( 198?, sc1cshat , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Attraction (Bellfruit) (set 5, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-132
/********************************************************************************************************************************************************************************************************************
@@ -2668,12 +2668,12 @@ GAME( 198?, sc1cshat , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse ,
********************************************************************************************************************************************************************************************************************/
ROM_START( sc1clatt ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "39370196.2", 0x0000, 0x8000, CRC(c809c22d) SHA1(fca7515bc84d432150ffe5e32fccc6aed458b8b0) ) ROM_LOAD( "39370196.1", 0x8000, 0x8000, CRC(4c2e465f) SHA1(101939d37d9c033f6d1dfb83b4beb54e4061aec2) ) ROM_END
-ROM_START( sc1clatta ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "393717553 prom b.bin", 0x0000, 0x8000, BAD_DUMP CRC(06f41627) SHA1(0e54314147a5f0d833d83f6f0ee828bd1c875f3e) ) ROM_LOAD( "393717552 prom a.bin", 0x8000, 0x8000, BAD_DUMP CRC(795e93cf) SHA1(017fa5ea3d9ad1f7a7a619d88a5892a9ffe6f3bc) ) ROM_END
+ROM_START( sc1clatta ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "393717553 prom b.bin", 0x0000, 0x8000, BAD_DUMP CRC(06f41627) SHA1(0e54314147a5f0d833d83f6f0ee828bd1c875f3e) ) ROM_LOAD( "393717552 prom a.bin", 0x8000, 0x8000, BAD_DUMP CRC(795e93cf) SHA1(017fa5ea3d9ad1f7a7a619d88a5892a9ffe6f3bc) ) ROM_END
// PROJECT NUMBER 5527 CLUB ATTRACTION DUAL #1 - 3-APR-1990 17:17:23
-GAME( 1990, sc1clatt , 0 , scorpion1 , clatt , bfm_sc1_state, clatt , 0, "BFM", "Club Attraction (UK, Game Card 39-370-196)", GAME_FLAGS ) // GAME No 39-370-196
+GAME( 1990, sc1clatt , 0 , scorpion1 , clatt , bfm_sc1_state, clatt , 0, "BFM", "Club Attraction (UK, Game Card 39-370-196)", GAME_FLAGS ) // GAME No 39-370-196
// PROJECT NUMBER 5527 CLUB ATTRACTION DUAL #1 - 22-NOV-1990 16:26:05
-GAME( 1990, sc1clatta , sc1clatt , scorpion1 , clatt , bfm_sc1_state, clatt , 0, "BFM", "Club Attraction (set 2)", GAME_FLAGS ) // GAME No 39-370-266
+GAME( 1990, sc1clatta , sc1clatt , scorpion1 , clatt , bfm_sc1_state, clatt , 0, "BFM", "Club Attraction (set 2)", GAME_FLAGS ) // GAME No 39-370-266
/********************************************************************************************************************************************************************************************************************
@@ -2692,17 +2692,17 @@ ROM_START( sc1cshwzd ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "95717211.b
// PROJECT NUMBER 5423 CASH WISE - 13-MAY-1989 14:46:29
-GAME( 198?, sc1cshwza , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-100
-GAME( 198?, sc1cshwze , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-100
+GAME( 198?, sc1cshwza , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-100
+GAME( 198?, sc1cshwze , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-100
// PROJECT NUMBER 5423 CASH WISE VARIABLE % - 13-MAY-1989 14:49:12
-GAME( 198?, sc1cshwz , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-100
-GAME( 198?, sc1cshwzc , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-100
+GAME( 198?, sc1cshwz , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-100
+GAME( 198?, sc1cshwzc , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-100
// PROJECT NUMBER 5423 CASH WISE - 2-JUN-1989 13:08:30
-GAME( 198?, sc1cshwzb , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-104
-GAME( 198?, sc1cshwzf , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-104
+GAME( 198?, sc1cshwzb , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-104
+GAME( 198?, sc1cshwzf , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-104
// PROJECT NUMBER 5423 CASH WISE VARIABLE % - 2-JUN-1989 13:24:44
-GAME( 199?, sc1cshwzg , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 4) (Scorpion 1)", GAME_FLAGS) // GAME No 39-370-104
-GAME( 198?, sc1cshwzd , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 4, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-104
+GAME( 199?, sc1cshwzg , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 4) (Scorpion 1)", GAME_FLAGS) // GAME No 39-370-104
+GAME( 198?, sc1cshwzd , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Wise (Bellfruit) (set 4, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-104
/********************************************************************************************************************************************************************************************************************
@@ -2710,7 +2710,7 @@ GAME( 198?, sc1cshwzd , sc1cshwz , scorpion1 , scorpion1 , bfm_sc1_state, lot
the 1-JUN-1990 set has an odd game code
********************************************************************************************************************************************************************************************************************/
- #define sc1_clbw_sound \
+ #define sc1_clbw_sound \
ROM_REGION( 0x20000, "upd", 0 )\
ROM_LOAD( "wisesnd1.bin", 0x0000, 0x010000, CRC(204605a6) SHA1(193a60878ed46f122e5d2d8f35fc6ea967b8734f) )\
ROM_LOAD( "wisesnd2.bin", 0x010000, 0x010000, CRC(6aa66166) SHA1(2e7cc67afdce2febb541bb1d0e7c107876d4233d) )\
@@ -2719,9 +2719,9 @@ ROM_START( sc1clbw ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "clbwzp2",
ROM_START( sc1clbwa ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club wise 95717551b.bin", 0x0000, 0x8000, CRC(0528a718) SHA1(27f4225c948d93ce1c833679f97e045f3b7a6aac) ) ROM_LOAD( "club wise 95717550a.bin", 0x8000, 0x8000, CRC(5b305f11) SHA1(592ea71fcb72eaa90fd421e3bd3761cfd686b019) ) sc1_clbw_sound ROM_END
// PROJECT NUMBER 5731 V1 5/10/20p PLAY - 21-NOV-1990 12:00:09
-GAME( 198?, sc1clbwa , sc1clbw , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Wise (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-265
+GAME( 198?, sc1clbwa , sc1clbw , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Wise (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-265
// PROJECT NUMBER 5731 V1 5/10/20p PLAY - 1-JUN-1990 12:03:09
-GAME( 198?, sc1clbw , 0 , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Wise (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No PR5731S11.HEX
+GAME( 198?, sc1clbw , 0 , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Wise (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No PR5731S11.HEX
/********************************************************************************************************************************************************************************************************************
@@ -2737,9 +2737,9 @@ ROM_START( sc1barcd ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "95740352 b.
ROM_START( sc1barcda )ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "barcode 5_10p b.bin", 0x0000, 0x8000, CRC(69d4d0b2) SHA1(bb73b917cf414623dcd239c5daeeccb4e0ccc2ed) ) ROM_LOAD( "barcode 5_10p a.bin", 0x8000, 0x8000, CRC(e864aba1) SHA1(b3f707b6d5f3d7236e4a5e9ed78c61a78c3e8196) ) sc1barcd_sound ROM_END
// PROJECT NUMBER 5907 BARCODE 20P PAYOUT - 8-JAN-1992 15:34:28
-GAME( 198?, sc1barcd , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Barcode (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-502
+GAME( 198?, sc1barcd , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Barcode (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-502
// PROJECT NUMBER 6380 BARCODE 5P 10P PLAY- 17-FEB-1994 09:23:56
-GAME( 198?, sc1barcda , sc1barcd , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Barcode (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-959
+GAME( 198?, sc1barcda , sc1barcd , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Barcode (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-959
/********************************************************************************************************************************************************************************************************************
Double Chance
@@ -2767,10 +2767,10 @@ ROM_START( sc1dblchb )
ROM_END
// PROJECT NUMBER 5599 DOUBLE CHANCE 20P - 6-APR-1990 11:02:09
-GAME( 198?, sc1dblch , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Double Chance (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-203
+GAME( 198?, sc1dblch , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Double Chance (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-203
// too bad to get PROJECT identification
-GAME( 198?, sc1dblcha , sc1dblch , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Double Chance (Bellfruit) (set 2, bad) (Scorpion 1)", GAME_FLAGS )
-GAME( 198?, sc1dblchb , sc1dblch , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Double Chance (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1dblcha , sc1dblch , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Double Chance (Bellfruit) (set 2, bad) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1dblchb , sc1dblch , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Double Chance (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS )
/********************************************************************************************************************************************************************************************************************
@@ -2801,19 +2801,19 @@ ROM_START( sc1cl65a ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "39370858.p
ROM_START( sc1cl65ap ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "39370858.p2", 0x0000, 0x8000, CRC(ff0e35c0) SHA1(0d3d46b541e188200cb4b9cc65eb60eac913dc2b) ) ROM_LOAD( "club-six-five-special_dat_ac_rot_20po_ass.bin", 0x8000, 0x8000, CRC(028ff7b2) SHA1(500b6f8d85678e99ae804600099fe78b542ad6a3) ) sc1_cl65_sound_alt ROM_END
// PROJECT NUMBER 5732 SIX FIVE SPECIAL - 6-SEP-1990 14:55:09
-GAME( 198?, sc1cl65 , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-240
+GAME( 198?, sc1cl65 , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-240
// PROJECT NUMBER 5732 SIX FIVE SPECIAL - 5-OCT-1992 16:23:33
-GAME( 198?, sc1cl65d , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-694
-GAME( 198?, sc1cl65dp , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-694
+GAME( 198?, sc1cl65d , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-694
+GAME( 198?, sc1cl65dp , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-694
// PROJECT NUMBER 5732 SIX FIVE SPECIAL 20P PAYOUT - 13-OCT-1992 12:18:09
-GAME( 198?, sc1cl65c , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-714
-GAME( 198?, sc1cl65cp , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-714
+GAME( 198?, sc1cl65c , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-714
+GAME( 198?, sc1cl65cp , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-714
// PROJECT NUMBER 6124 SIX FIVE SPECIAL 200 POUND JP - 21-APR-1993 14:43:38
-GAME( 198?, sc1cl65b , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 4) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-859
-GAME( 198?, sc1cl65bp , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 4, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-859
+GAME( 198?, sc1cl65b , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 4) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-859
+GAME( 198?, sc1cl65bp , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 4, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-859
// PROJECT NUMBER 6124 20P PAYOUT SIX FIVE SPECIAL #200/20P PAYOUT - 21-APR-1993 14:46:20
-GAME( 198?, sc1cl65a , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 5) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-858
-GAME( 198?, sc1cl65ap , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 5, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-858
+GAME( 198?, sc1cl65a , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 5) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-858
+GAME( 198?, sc1cl65ap , sc1cl65 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club 65 Special (Bellfruit) (set 5, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-858
/********************************************************************************************************************************************************************************************************************
China Town
@@ -2829,17 +2829,17 @@ ROM_START( sc1chinap ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-chin
ROM_START( sc1chinaa ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-china-town_std_ac_rot_bss.bin", 0x0000, 0x8000, CRC(6e09a878) SHA1(4084b1dc3425ceb980ef5c63a883720f3ad84d7f) ) ROM_LOAD( "club-china-town_std_ac_rot_ass.bin", 0x8000, 0x8000, CRC(de12ac34) SHA1(0caeb2a6b209ee34d67d4c619dd63562c839261e) ) sc1_china_sound ROM_END
ROM_START( sc1chinaap ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-china-town_dat_ac_rot_bss.bin", 0x0000, 0x8000, CRC(6e09a878) SHA1(4084b1dc3425ceb980ef5c63a883720f3ad84d7f) ) ROM_LOAD( "club-china-town_dat_ac_rot_ass.bin", 0x8000, 0x8000, CRC(109b722c) SHA1(19426f3f907f108dc16b4036d3986c6395f799d0) ) sc1_china_sound ROM_END
ROM_START( sc1chinab ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-china-town_std_ac_150pnd_lfj_bss.bin", 0x0000, 0x8000, CRC(d41c6999) SHA1(cc2eb2e74ca3bfa78d74dd08f83acb2fe650e13d) ) ROM_LOAD( "club-china-town_std_ac_150pnd_lfj_ass.bin", 0x8000, 0x8000, CRC(8c3e69f1) SHA1(cb0cbf7a6039549b969160a162a0cd5511b24cd3) ) sc1_china_sound ROM_END
-ROM_START( sc1chinabp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-china-town_dat_ac_150pnd_lfj_bss.bin", 0x0000, 0x8000, CRC(d41c6999) SHA1(cc2eb2e74ca3bfa78d74dd08f83acb2fe650e13d) ) ROM_LOAD( "club-china-town_dat_ac_150pnd_lfj_ass.bin", 0x8000, 0x8000, CRC(9547727a) SHA1(ac4a23ae78d9331261ee0ab59816f65c5c1547d7) ) sc1_china_sound ROM_END
+ROM_START( sc1chinabp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-china-town_dat_ac_150pnd_lfj_bss.bin", 0x0000, 0x8000, CRC(d41c6999) SHA1(cc2eb2e74ca3bfa78d74dd08f83acb2fe650e13d) ) ROM_LOAD( "club-china-town_dat_ac_150pnd_lfj_ass.bin", 0x8000, 0x8000, CRC(9547727a) SHA1(ac4a23ae78d9331261ee0ab59816f65c5c1547d7) ) sc1_china_sound ROM_END
// CHINA TOWN CHINA TOWN - 18-MAR-1992 13:59:59
-GAME( 198?, sc1chinaa , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-551
-GAME( 198?, sc1chinaap , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-551
+GAME( 198?, sc1chinaa , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-551
+GAME( 198?, sc1chinaap , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-551
// PR6121 CHINA TOWN CHINA TOWN 200 POUND JACKPOT - 14-APR-1993 12:15:57
-GAME( 198?, sc1china , 0 , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-857
-GAME( 198?, sc1chinap , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-857
+GAME( 198?, sc1china , 0 , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-857
+GAME( 198?, sc1chinap , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-857
// PROJECT NUMBER PR5989 CHINA TOWN CHINA TOWN SMOOTHED JACKPOT - 12-MAY-1994 12:15:56
-GAME( 198?, sc1chinab , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-979
-GAME( 198?, sc1chinabp , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-979
+GAME( 198?, sc1chinab , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-979
+GAME( 198?, sc1chinabp , sc1china , scorpion1_viper , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "China Town Club (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-979
/********************************************************************************************************************************************************************************************************************
Club Temptation
@@ -2860,9 +2860,9 @@ ROM_START( sc1clbtm ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "temp12b.bi
ROM_START( sc1clbtma ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "temptp2", 0x0000, 0x8000, CRC(d165fa87) SHA1(aef8a4af8b6e83ef09dffc8aca305eaf7dd3936b) ) ROM_LOAD( "temptp1", 0x8000, 0x8000, CRC(6f03648d) SHA1(a6402c94ebf4d570d1d3fb462eb621566c27f307) ) sc1_clbtm_sound ROM_END
// PROJECT NUMBER 5491 TEMPTATION - 1-MAY-1991 13:36:44
-GAME( 198?, sc1clbtm , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Temptation (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-342
+GAME( 198?, sc1clbtm , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Temptation (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-342
// PROJECT NUMBER 5491 TEMPTATION HI-FREQ CASHPOT - 31-OCT-1991 12:50:19
-GAME( 198?, sc1clbtma , sc1clbtm , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Temptation (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-449
+GAME( 198?, sc1clbtma , sc1clbtm , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Temptation (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-449
/********************************************************************************************************************************************************************************************************************
Count Cash Club
@@ -2878,17 +2878,17 @@ ROM_START( sc1counta ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-coun
ROM_START( sc1countap ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-count-cash_dat_ac_rnr_bss.bin", 0x0000, 0x8000, CRC(69df417d) SHA1(a7788a9f3056919017616960ba5017bcd94b8a98) ) ROM_LOAD( "club-count-cash_dat_ac_rnr_ass.bin", 0x8000, 0x8000, CRC(87f68f57) SHA1(fe99c8577a80a7ec791bf87e78cf429eebbc7785) ) sc1_count_sound ROM_END
// PROJECT NUMBER 6031 COUNT CASH standard - 14-SEP-1992 11:07:14
-GAME( 198?, sc1counta , sc1count , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-698
-GAME( 198?, sc1countap , sc1count , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-698
+GAME( 198?, sc1counta , sc1count , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-698
+GAME( 198?, sc1countap , sc1count , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-698
// PROJECT NUMBER 6120 COUNT CASH 200 POUND JACKPOT - 14-APR-1993 12:12:42
-GAME( 198?, sc1count , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-855
-GAME( 198?, sc1countp , sc1count , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-855
+GAME( 198?, sc1count , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-855
+GAME( 198?, sc1countp , sc1count , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Count Cash Club (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-855
/********************************************************************************************************************************************************************************************************************
Strike It Rich
********************************************************************************************************************************************************************************************************************/
-ROM_START( sc1sir ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "s.i.rich 2p 2.40 p2 9.3.90 1a96.bin", 0x0000, 0x8000, CRC(618841ca) SHA1(2e690ca91da0a1ff36245a6f1e2ad681a6ed4f32) ) ROM_LOAD( "s.i.rich 2p 2.40 p1 9.3.90 0b49.bin", 0x8000, 0x8000, CRC(c54703f8) SHA1(9ac3af9021cf5012562b0ab057a30e11e01eef65) ) ROM_END
+ROM_START( sc1sir ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "s.i.rich 2p 2.40 p2 9.3.90 1a96.bin", 0x0000, 0x8000, CRC(618841ca) SHA1(2e690ca91da0a1ff36245a6f1e2ad681a6ed4f32) ) ROM_LOAD( "s.i.rich 2p 2.40 p1 9.3.90 0b49.bin", 0x8000, 0x8000, CRC(c54703f8) SHA1(9ac3af9021cf5012562b0ab057a30e11e01eef65) ) ROM_END
ROM_START( sc1sirb ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "s.i.rich 5p 2.40 p2 9.3.90.bin", 0x0000, 0x8000, CRC(cd3df765) SHA1(798d051afbba5a474b1b619621e4425f5ff7f8db) ) ROM_LOAD( "s.i.rich 5p 2.40 p1 9.3.90.bin", 0x8000, 0x8000, CRC(6a37f38d) SHA1(1e7640446ecb6e00d57a92ab3592c389a172f257) ) ROM_END
/* these are both bad dumps, similar to each other, but not to the sets we support */
@@ -2906,12 +2906,12 @@ ROM_START( sc1sirc )
ROM_END
// PROJECT NUMBER 5773 STRIKE IT RICH - 2P - 7-MAR-1990 15:24:32
-GAME( 198?, sc1sir , 0 , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-180
+GAME( 198?, sc1sir , 0 , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-180
// PROJECT NUMBER 5773 STRIKE IT RICH - 5P - 9-MAR-1990 10:48:23
-GAME( 198?, sc1sirb , sc1sir , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-184
+GAME( 198?, sc1sirb , sc1sir , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-184
// 2nd half with the ident strings is missing
-GAME( 198?, sc1sira , sc1sir , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 3, bad) (Scorpion 1)", GAME_FLAGS )
-GAME( 198?, sc1sirc , sc1sir , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 4, bad) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1sira , sc1sir , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 3, bad) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1sirc , sc1sir , scorpion1 , clatt , bfm_sc1_state, lotse , 0, "BFM", "Strike It Rich (Bellfruit) (set 4, bad) (Scorpion 1)", GAME_FLAGS )
/********************************************************************************************************************************************************************************************************************
Fun House Club
@@ -2927,38 +2927,38 @@ ROM_START( sc1funhp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "club-fun-ho
ROM_START( sc1funha ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "funhop2", 0x0000, 0x8000, CRC(2454e295) SHA1(9785d278afe05c632e1ab326d1b8fbabcc591fb6) ) ROM_LOAD( "funhop1", 0x8000, 0x8000, CRC(282d5651) SHA1(bd8c0985143d8fb5c8e0a2bfedea248569c8cf98) ) sc1_funh_sound ROM_END
// PROJECT NUMBER 5944 FUN HOUSE - 18-FEB-1992 16:16:01
-GAME( 198?, sc1funh , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fun House Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-530
-GAME( 198?, sc1funhp , sc1funh , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fun House Club (Bellfruit) (set 1, Protocol, bad) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-530
+GAME( 198?, sc1funh , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fun House Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-530
+GAME( 198?, sc1funhp , sc1funh , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fun House Club (Bellfruit) (set 1, Protocol, bad) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-530
// PROJECT NUMBER 5944 FUN HOUSE - 9-OCT-1991 14:08:13
-GAME( 198?, sc1funha , sc1funh , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fun House Club (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-432
+GAME( 198?, sc1funha , sc1funh , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fun House Club (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-432
/********************************************************************************************************************************************************************************************************************
Tri Star
********************************************************************************************************************************************************************************************************************/
-ROM_START( sc1tri ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "20p b.bin", 0x0000, 0x8000, CRC(ef5bc525) SHA1(2881b9292f9dd7376997992941e07d288640703b) ) ROM_LOAD( "20p a.bin", 0x8000, 0x8000, CRC(d162ebd5) SHA1(cfab100ab8cc34b61108fc7b8a3ec1f1b22f90ba) ) ROM_END
+ROM_START( sc1tri ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "20p b.bin", 0x0000, 0x8000, CRC(ef5bc525) SHA1(2881b9292f9dd7376997992941e07d288640703b) ) ROM_LOAD( "20p a.bin", 0x8000, 0x8000, CRC(d162ebd5) SHA1(cfab100ab8cc34b61108fc7b8a3ec1f1b22f90ba) ) ROM_END
ROM_START( sc1tria ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "957172.42 std var% b.bin", 0x0000, 0x8000, CRC(d8d70cac) SHA1(8137ab06912bc27f26bcbb800a09b095ba2175bb) ) ROM_LOAD( "957172.41 std var% a.bin", 0x8000, 0x8000, CRC(b314f739) SHA1(793c01f292c5144a1f5975b276b4985c565a2833) ) ROM_END
ROM_START( sc1triap ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "957172.42 std var% b.bin", 0x0000, 0x8000, CRC(d8d70cac) SHA1(8137ab06912bc27f26bcbb800a09b095ba2175bb) ) ROM_LOAD( "957182.41 proto var% a.bin", 0x8000, 0x8000, CRC(1af55594) SHA1(9e65c7bbb37d75662e4243fc6ba13f249183e2a3) ) ROM_END
ROM_START( sc1trib ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "957272.42 std b.bin", 0x0000, 0x8000, CRC(634b1927) SHA1(60f2bf02a12021da3c7995122dff85ce7831ed42) ) ROM_LOAD( "957272.41 std a.bin", 0x8000, 0x8000, CRC(635ded7e) SHA1(3e8bda8c2fa6fc8e46ba3e3a70dfb183fad3223b) ) ROM_END
ROM_START( sc1tribp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "957272.42 std b.bin", 0x0000, 0x8000, CRC(634b1927) SHA1(60f2bf02a12021da3c7995122dff85ce7831ed42) ) ROM_LOAD( "957282.41 proto std a.bin", 0x8000, 0x8000, CRC(e5999ec8) SHA1(0a11544da03fc2197dc2cc6780cbaeee55372069) ) ROM_END
// PROJECT NUMBER 5600 TRISTAR 20P VARIABLE % - 21-DEC-1989 17:54:13
-GAME( 198?, sc1tri , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-131
+GAME( 198?, sc1tri , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-131
// PROJECT NUMBER 5490 TRISTAR VARIABLE % - 26-OCT-1989 16:45:43
-GAME( 198?, sc1tria , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-120
-GAME( 198?, sc1triap , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-120
+GAME( 198?, sc1tria , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-120
+GAME( 198?, sc1triap , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 2, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-371-120
// PROJECT NUMBER 5490 TRISTAR - 26-OCT-1989 16:43:39
-GAME( 198?, sc1trib , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-120
-GAME( 198?, sc1tribp , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-120
+GAME( 198?, sc1trib , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-380-120
+GAME( 198?, sc1tribp , sc1tri , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Tri Star (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-381-120
/********************************************************************************************************************************************************************************************************************
Club Explosion
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 5523 VE 5/10/20p PLAY - 9-MAR-1990 12:25:00
-GAME( 198?, sc1clbxp , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Explosion (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS ) // GAME No 39-370-175
+GAME( 198?, sc1clbxp , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Explosion (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS ) // GAME No 39-370-175
// PROJECT NUMBER 5523 VE 5/10/20p PLAY - 13-NOV-1989 14:13:58
-GAME( 198?, sc1clbxpa , sc1clbxp , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Explosion (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS ) // GAME No 39-370-121
+GAME( 198?, sc1clbxpa , sc1clbxp , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Club Explosion (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS ) // GAME No 39-370-121
/********************************************************************************************************************************************************************************************************************
Clockwise
@@ -2970,10 +2970,10 @@ GAME( 198?, sc1clbxpa , sc1clbxp , scorpion1_viper , clatt , bfm_sc1_state, lot
ROM_LOAD( "95000002snd.bin", 0x08000, 0x008000, CRC(ca2f5547) SHA1(fe8378ee485ce396b665ea504650caf51843fd74) ) \
ROM_LOAD( "95000003snd.bin", 0x10000, 0x008000, CRC(475695f9) SHA1(9f6ba3de7b4b38946106a3aeab9a2a2eb2a99193) ) \
-ROM_START( sc1cwcl ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "95717154b.bin", 0x0000, 0x8000, CRC(e6422f75) SHA1(4ab33a5503209377f4739dbe11e4afa8d7e43699) ) ROM_LOAD( "95717153a.bin", 0x8000, 0x8000, CRC(233174a1) SHA1(94cf071a955e3716f463c4370daabfe94db2fd0e) ) sc1_cwcl_sound ROM_END
+ROM_START( sc1cwcl ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "95717154b.bin", 0x0000, 0x8000, CRC(e6422f75) SHA1(4ab33a5503209377f4739dbe11e4afa8d7e43699) ) ROM_LOAD( "95717153a.bin", 0x8000, 0x8000, CRC(233174a1) SHA1(94cf071a955e3716f463c4370daabfe94db2fd0e) ) sc1_cwcl_sound ROM_END
// PROJECT NUMBER 5216 VE 5/10/20p PLAY - 17-FEB-1989 12:23:30
-GAME( 198?, sc1cwcl , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Clockwise (Bellfruit) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-076
+GAME( 198?, sc1cwcl , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Clockwise (Bellfruit) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-076
/********************************************************************************************************************************************************************************************************************
Bar Trek
@@ -2987,101 +2987,101 @@ GAME( 198?, sc1cwcl , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse
ROM_START( sc1bartk ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "bartrekgameb.bin", 0x0000, 0x8000, CRC(24c7c803) SHA1(ab5051c8727cab44ad59913edab3d5d145728cb5) ) ROM_LOAD( "bartrekgamea.bin", 0x8000, 0x8000, CRC(a7a84c16) SHA1(8c5ab34268e932be12e85eed5a56386681f13da4) ) sc1_bartk_sound ROM_END
// PROJECT NUMBER 6006 BAR TREK #3/#6 - 1-DEC-1992 08:20:06
-GAME( 198?, sc1bartk , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Bar Trek (Bellfruit) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-746
+GAME( 198?, sc1bartk , 0 , scorpion1_viper , clatt , bfm_sc1_state, lotse , 0, "BFM", "Bar Trek (Bellfruit) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-746
// PROJECT NUMBER 5146 CASH CARD GAME No 39-370-064 - 17-NOV-1988 11:06:39
-GAME( 198?, sc1cshcda , sc1cshcd , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Card (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cshcda , sc1cshcd , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Card (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5146 CASH CARD VERSION 2 GAME No 39-372-052 - 17-OCT-1988 15:24:53
-GAME( 198?, sc1cshcdb , sc1cshcd , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Card (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cshcdb , sc1cshcd , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Card (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5415 CASH EXPLOSION VERSION 8 GAME No 39-370-063 - 17-NOV-1988 11:59:28
-GAME( 198?, sc1cexpl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Explosion (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cexpl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Explosion (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5415 CASH EXPLOSION FIXED 78% GAME No 39-373-042 - 12-AUG-1988 13:36:16
-GAME( 198?, sc1cexpla , sc1cexpl , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Explosion (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cexpla , sc1cexpl , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Explosion (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5415 CASH EXPLOSION VERSION 2 GAME No 39-370-042 - 12-AUG-1988 13:47:56
-GAME( 198?, sc1cexplb , sc1cexpl , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Explosion (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cexplb , sc1cexpl , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Explosion (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS )
// these hang after showing some lamps, what is PHOENIX1?
// PROJECT NUMBER 6218 COPS & ROBBERS PHOENIX1 - 10-SEP-1993 11:39:11
-GAME( 198?, sc1cops , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-918
+GAME( 198?, sc1cops , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-918
// PROJECT NUMBER 6218 COPS & ROBBERS PHOENIX1 - 12-MAY-1994 09:35:23
-GAME( 198?, sc1copsa , sc1cops , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-981
+GAME( 198?, sc1copsa , sc1cops , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-981
// PROJECT NUMBER 6218 COPS & ROBBERS PHOENIX1 HIGH TOKEN - 31-AUG-1993 09:49:28
-GAME( 198?, sc1copdx , sc1cops , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-916
+GAME( 198?, sc1copdx , sc1cops , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 3) (Scorpion 1)", GAME_FLAGS ) // GAME No 39-370-916
// PROJECT NUMBER 6207 OFAH - PHOENIX 1 - 18-APR-1994 10:44:57
-GAME( 199?, sc1ofs56 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Only Fools and Horses (Bellfruit) (Scorpion 1?)", GAME_FLAGS) // GAME No 39-370-974
+GAME( 199?, sc1ofs56 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Only Fools and Horses (Bellfruit) (Scorpion 1?)", GAME_FLAGS) // GAME No 39-370-974
// PROJECT NUMBER 5420 AWP10 VERSION 1 FIXED 78% GAME No 39-373-069 - 04-JAN-1989 10:16:18
-GAME( 198?, sc1linx , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Linx (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // bad rom
+GAME( 198?, sc1linx , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Linx (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS ) // bad rom
// PROJECT NUMBER 5613 LINX 20P PLAY VARIABLE % GAME No 39-370-154 - 1-FEB-1990 08:35:47
-GAME( 198?, sc1linxa , sc1linx , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Linx (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1linxa , sc1linx , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Linx (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5420 AWP10 VERSION 1 GAME No 39-370-078 - 28-FEB-1989 17:10:59
-GAME( 198?, sc1linxp , sc1linx , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Linx (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1linxp , sc1linx , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Linx (Bellfruit) (set 3, Protocol) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5493 20P POWERLINES VARIABLE % GAME No 39-370-130 - 13-DEC-1989 16:21:27
-GAME( 198?, sc1pwrl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Power Lines (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1pwrl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Power Lines (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6104 SPECTRE #6/#3 GAME No 39-370-765 - 11-JAN-1993 13:52:50
-GAME( 198?, sc1spct , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Spectre (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1spct , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Spectre (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6104 SPECTRE #6/#3 5P/10P PLAY 10P/20P P/O GAME No 39-370-966 - 10-MAR-1994 07:57:48
-GAME( 198?, sc1spcta , sc1spct , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Spectre (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // bad rom
+GAME( 198?, sc1spcta , sc1spct , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Spectre (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // bad rom
// different inputs, hold ALT to run
// PROJECT NUMBER 6171 TYPHOON PHOENIX1 #200 GAME No 39-370-944 - 5-NOV-1993 12:02:03
-GAME( 198?, sc1typ , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Typhoon Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1typ , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Typhoon Club (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6171 TYPHOON PHOENIX1 #200 GAME No 39-371-944 - 5-NOV-1993 12:02:03
-GAME( 198?, sc1typp , sc1typ , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Typhoon Club (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1typp , sc1typ , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Typhoon Club (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5417 WINNING STREAK GAME No 39-370-055 - 10-NOV-1988 09:31:58
-GAME( 198?, sc1winst , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Winning Streak (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1winst , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Winning Streak (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5417 WINNING STREAK GAME No 39-371-055 - 10-NOV-1988 09:31:58
-GAME( 198?, sc1winstp , sc1winst , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Winning Streak (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1winstp , sc1winst , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Winning Streak (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS )
// no header data due to bad rom
-GAME( 198?, sc1winsta , sc1winst , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Winning Streak (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // bad rom
+GAME( 198?, sc1winsta , sc1winst , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Winning Streak (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS ) // bad rom
// the first 2 sets are (unusually) licensed
// PROJECT NUMBER 5774 5P PLAY CASH LINES GAME No 39-370-183 - 9-MAR-1990 10:45:33
-GAME( 199?, sc1clins , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/PCP", "Cash Lines (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1clins , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/PCP", "Cash Lines (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS)
// PROJECT NUMBER 5774 2P PLAY CASH LINES GAME No 39-370-181 - 7-MAR-1990 15:27:24
-GAME( 199?, sc1clinsa , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/PCP", "Cash Lines (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1clinsa , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/PCP", "Cash Lines (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS)
// PROJECT NUMBER 5159 CASH LINES GAME No 39-371-028 - 28-MAR-1988 07:34:28
-GAME( 199?, sc1clinsb , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 3)", GAME_FLAGS)
+GAME( 199?, sc1clinsb , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 3)", GAME_FLAGS)
// PROJECT NUMBER 5159 CASH LINES GAME No 39-370-028 - 28-MAR-1988 07:34:28
-GAME( 199?, sc1clinsc , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 4)", GAME_FLAGS)
+GAME( 199?, sc1clinsc , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 4)", GAME_FLAGS)
// PROJECT NUMBER 5159 ALL CASH CASH LINES GAME No 39-370-098 - 9-MAY-1989 14:40:54
-GAME( 199?, sc1clinsd , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 5)", GAME_FLAGS)
+GAME( 199?, sc1clinsd , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 5)", GAME_FLAGS)
// PROJECT NUMBER 5159 CASH LINES GAME No 39-370-056 - 17-NOV-1988 09:55:47
-GAME( 199?, sc1clinse , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 6)", GAME_FLAGS) // bad rom
+GAME( 199?, sc1clinse , sc1clins , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Cash Lines (Bellfruit) (Scorpion 1) (set 6)", GAME_FLAGS) // bad rom
// PROJECT NUMBER 6108 HIGH POINT 20P PAYOUT S+P #3/#6 GAME No 39-370-787 - 22-FEB-1993 16:00:23
-GAME( 199?, sc1hipt , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "High Point (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1hipt , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "High Point (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS)
// PROJECT NUMBER 6108 HIGH POINT 10P PAYOUT S+P #3/#6 GAME No 39-370-793 - 24-FEB-1993 16:58:57
-GAME( 199?, sc1hipta , sc1hipt , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "High Point (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1hipta , sc1hipt , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "High Point (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS)
// just alarms (part of a video game maybe?)
// PROJECT NUMBER 6842 Fruit Pursuit GAME No PR6842S12 - 3-DEC-1997 16:45:49
-GAME( 199?, sc1frpus , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fruit Pursuit (Bellfruit) (set 1) (Scorpion 1?)", GAME_FLAGS)
+GAME( 199?, sc1frpus , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fruit Pursuit (Bellfruit) (set 1) (Scorpion 1?)", GAME_FLAGS)
// no header data due to bad rom
-GAME( 199?, sc1frpusa , sc1frpus , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fruit Pursuit (Bellfruit) (set 2) (Scorpion 1?)", GAME_FLAGS) // bad rom?
+GAME( 199?, sc1frpusa , sc1frpus , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Fruit Pursuit (Bellfruit) (set 2) (Scorpion 1?)", GAME_FLAGS) // bad rom?
// PROJECT NUMBER 5422 CHAIN REACTION VARIABLE % GAME No 39-370-084 - 30-MAR-1989 16:17:14
-GAME( 199?, sc1chain , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Chain Reaction (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1chain , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Chain Reaction (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS)
// PROJECT NUMBER 5422 CHAIN REACTION VARIABLE % GAME No 39-371-084 - 30-MAR-1989 16:17:14
-GAME( 199?, sc1chainp , sc1chain , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Chain Reaction (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1chainp , sc1chain , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Chain Reaction (Bellfruit) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS)
// no header data due to bad rom
-GAME( 199?, sc1goldw , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Golden Winner (Bellfruit) (Scorpion ?)", GAME_FLAGS) /// bad rom
+GAME( 199?, sc1goldw , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Golden Winner (Bellfruit) (Scorpion ?)", GAME_FLAGS) /// bad rom
// no header data due to bad rom
-GAME( 199?, sc1druby , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Diamonds & Rubys (Bellfruit) (Scorpion ?) (set 1)", GAME_FLAGS) // bad rom
+GAME( 199?, sc1druby , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Diamonds & Rubys (Bellfruit) (Scorpion ?) (set 1)", GAME_FLAGS) // bad rom
// no header data due to bad rom
-GAME( 199?, sc1drubya , sc1druby , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Diamonds & Rubys (Bellfruit) (Scorpion ?) (set 2)", GAME_FLAGS) // bad rom
+GAME( 199?, sc1drubya , sc1druby , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM", "Diamonds & Rubys (Bellfruit) (Scorpion ?) (set 2)", GAME_FLAGS) // bad rom
@@ -3100,37 +3100,37 @@ GAME( 199?, sc1drubya , sc1druby , scorpion1 , scorpion1 , bfm_sc1_state, lot
/* PROM ERROR 3 */
// PROJECT NUMBER 6757 ACTIVE 8 SCORP I GAME No 95-752-019 - 08-JAN-1998 14:46:17
-GAME( 198?, sc1actv8 , 0 , scorpion1_viper , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Active 8 (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1actv8 , 0 , scorpion1_viper , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Active 8 (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6541 BIG MATCH SCORP I GAME No 39-372-084 - 27-JUN-1996 15:56:53
-GAME( 198?, sc1bigmt , 0 , scorpion1_viper , clatt , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "The Big Match (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1bigmt , 0 , scorpion1_viper , clatt , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "The Big Match (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 1051 CASHCOIN SCORP I GAME No 95100005 - 05-OCT-1998 13:44:52
-GAME( 198?, sc1ccoin , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cash Coin (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1ccoin , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cash Coin (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6883 DREAM MACHINE GAME No 95-752-021 - 08-JAN-1998 14:25:32
-GAME( 198?, sc1dream , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Dream Machine (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1dream , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Dream Machine (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 1113 GOODTIMES SCORP I GAME No 95-100-020 - 23-FEB-1999 11:02:32
-GAME( 198?, sc1gtime , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Good Times (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1gtime , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Good Times (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 1112 TIARA SCORP I GAME No 95-100-014 - 16-DEC-1998 10:37:21
-GAME( 198?, sc1tiara , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Tiara (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1tiara , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Tiara (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6363 GRAND SLAM SCORP I GAME No 39-372-041 - 14-SEP-1995 14:01:04
-GAME( 198?, sc1gslam , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Grand Slam (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1gslam , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Grand Slam (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 1096 HAPPY HOUR GAME No 95-100-025 - 15-JUL-1999 16:25:41
-GAME( 198?, sc1happy , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Happy Hour (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1happy , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Happy Hour (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6764 MASTER CLUB SCORP I GAME No 95-750-971 - 26-MAY-1997 14:48:32
-GAME( 198?, sc1mast , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Master Club (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1mast , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Master Club (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6881 ULTIMATE SCORP I GAME No 95-752-020 - 08-JAN-1998 12:12:12
-GAME( 198?, sc1ult , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Ultimate (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1ult , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Ultimate (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6763 CLUB 3000 SCORP I GAME No 95-750-920 - 05-FEB-1997 14:38:48
-GAME( 199?, sc1clb3 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Club 3000 (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1clb3 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Club 3000 (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS)
/********************************************************************************************************************************************************************************************************************
*********************************************************************************************************************************************************************************************************************
@@ -3140,140 +3140,140 @@ GAME( 199?, sc1clb3 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse ,
/* All these boot */
// PROJECT NUMBER 6642 LOTUS GAME No 95-750-911 - 07-JAN-1997 14:48:18
-GAME( 1988, sc1lotus , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Lotus SE (Dutch) (set 1)", GAME_FLAGS )
+GAME( 1988, sc1lotus , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Lotus SE (Dutch) (set 1)", GAME_FLAGS )
// PROJECT NUMBER 6642 LOTUS GAME No 95-750-911 - 07-JAN-1997 14:48:18
-GAME( 1988, sc1lotusa , sc1lotus , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Lotus SE (Dutch) (set 2)", GAME_FLAGS )
+GAME( 1988, sc1lotusa , sc1lotus , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Lotus SE (Dutch) (set 2)", GAME_FLAGS )
// PROJECT NUMBER 5142 DUTCH ROULETTE GAME No 39-360-029 - 18-APR-1989 16:03:00
-GAME( 1988, sc1roul , 0 , scorpion1 , scorpion1 , bfm_sc1_state, rou029 , 0, "BFM/ELAM", "Roulette (Dutch, Game Card 39-360-129?)", GAME_FLAGS )
+GAME( 1988, sc1roul , 0 , scorpion1 , scorpion1 , bfm_sc1_state, rou029 , 0, "BFM/ELAM", "Roulette (Dutch, Game Card 39-360-129?)", GAME_FLAGS )
// PROJECT NUMBER 6045 ARMADA GAME No 39-370-729 - 28-AUG-1992 14:37:00
-GAME( 198?, sc1armad , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Armada (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1armad , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Armada (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6043 CALYPSO GAME No 39-370-754 - 08-DEC-1992 13:20:00
-GAME( 198?, sc1calyp , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Calypso (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1calyp , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Calypso (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6041 CARROUSEL TOPBOX GAME No 95-750-801 - 02-JUL-1996 10:43:35
-GAME( 198?, sc1carro , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt_bank0 , 0, "BFM/ELAM", "Carrousel (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1carro , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt_bank0 , 0, "BFM/ELAM", "Carrousel (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5514 DUTCH 6 V1 1989 GAME No 39-370-650 - 29-JUL-1992 15:51:26
-GAME( 198?, sc1cshcd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cash Card (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cshcd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cash Card (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5512 DUTCH CASH EXPLOSION GAME No 39-360-036 - 15-SEP-1989 15:04:00
-GAME( 198?, sc1cexpd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cash Explosion (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cexpd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cash Explosion (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5725 DUTCH 5 V1 1989 GAME No 39-370-608 - 18-JUN-1992 09:20:55
-GAME( 198?, sc1cshin , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cashino (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cshin , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cashino (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5729 CLASSIC GAME No 39-370-606 - 18-JUN-1992 08:32:02
-GAME( 198?, sc1class , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Classic (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1class , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Classic (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6046 CLOWN AROUND GAME No 95-750-786 - 19-JUN-1996 13:59:25
-GAME( 198?, sc1clown , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Clown Around (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1clown , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Clown Around (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6641 DUTCH CLUB 2000 SPECIAL EDITION GAME No 95-750-912 - 07-JAN-1997 13:10:21
-GAME( 198?, sc1cl2k , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Club 2000 (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cl2k , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Club 2000 (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6050 CLUB 2001 GAME No 39-370-865 - 30-APR-1993 10:41:43
-GAME( 198?, sc1cl2k1 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Club 2001 (Dutch (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1cl2k1 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Club 2001 (Dutch (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5724 DUTCH CLUB DIAMOND GAME No 39-360-097 - 13-JUL-1992 15:12:03
-GAME( 198?, sc1clbdm , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Club Diamond (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1clbdm , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Club Diamond (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6250 COPS N ROBBERS GAME No 95-750-835 - 05-AUG-1996 16:33:34
-GAME( 198?, sc1copdd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cops 'n' Robbers Deluxe (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1copdd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Cops 'n' Robbers Deluxe (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5399 DUTCH 2 V1 1989 GAME No 39-370-651 - 29-JUL-1992 15:25:57
-GAME( 198?, sc1disc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Discovey (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1disc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Discovey (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5956 FLASH GAME No 95-750-771 - 17-JUN-1996 09:30:53
-GAME( 198?, sc1flash , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Flash (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1flash , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Flash (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5391 FRUIT LINES GAME No 39-370-653 - 30-JUL-1992 09:31:10
-GAME( 198?, sc1fruit , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Fruit Lines (Dutch) (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1fruit , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Fruit Lines (Dutch) (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5391 FRUIT LINES GAME No 39-370-653 - 30-JUL-1992 09:31:10
-GAME( 198?, sc1frtln , sc1fruit , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Fruit Lines (Dutch) (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1frtln , sc1fruit , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Fruit Lines (Dutch) (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6048 GRAND PRIX GAME No 39-370-805 - 26-MAR-1993 11:26:08
-GAME( 198?, sc1gprix , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Grand Prix (Dutch) (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1gprix , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Grand Prix (Dutch) (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5957 Impact GAME No 95-750-769 - 02-JUL-1996 12:10:32
-GAME( 198?, sc1impc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Impact (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1impc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Impact (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6246 KINGS CLUB GAME No 95-750-757 - 14-JUN-1996 14:06:15
-GAME( 198?, sc1kings , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "BFM/ELAM", "Kings Club (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1kings , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "BFM/ELAM", "Kings Club (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5467 DUTCH MAGIC CIRCLE GAME No 39-360-031 - 19-APR-1989 16:59:00
-GAME( 198?, sc1magc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Magic Circle (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1magc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Magic Circle (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECTNUMBER 5726 DUTCH MANHATTAN GAME No 39-370-368 - 05-JUL-1991 15:01:00
-GAME( 198?, sc1manha , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "BFM/ELAM", "Manhattan (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1manha , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "BFM/ELAM", "Manhattan (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5398 DUTCH QUATRO GAME No 39-360-032 - 24-APR-1989 13:46:00
-GAME( 198?, sc1quat , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Quatro (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1quat , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Quatro (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5728 DUTCH MISTRAL GAME No 95-750-796 - 20-JUN-1996 13:39:32
-GAME( 198?, sc1mist , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "BFM/ELAM", "Mistral (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1mist , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "BFM/ELAM", "Mistral (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5727 PHOENIX OLYMPIA GAME No 39-372-031 - 28-APR-1995
-GAME( 198?, sc1olym , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Olympia (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1olym , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Olympia (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6247 ORACLE GAME No 95-750-803 - 01-JUL-1996 11:31:21
-GAME( 198?, sc1orac , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Oracle (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1orac , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Oracle (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6645 RAINBOW GAME No RBA8GMV6 - 21-OCT-1999 20:11:02
-GAME( 198?, sc1rain , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Rainbow (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1rain , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Rainbow (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5511 DUTCH REEL CASH GAME No 39-360-035 - 20-JUN-1989 09:01:00
-GAME( 198?, sc1re , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Reel Cash (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1re , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Reel Cash (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5511 DUTCH REEL CASH 90 SPECIAL EDITION GAME No 95-750-837 - 09-AUG-1996 16:14:43
-GAME( 198?, sc1rese , sc1re , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Reel Cash SE (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS ) // doesn't say 'SE'
+GAME( 198?, sc1rese , sc1re , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Reel Cash SE (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS ) // doesn't say 'SE'
// PROJECT NUMBER 5390 DUTCH REVOLUTION GAME No 39-360-020 - 23-FEB-1989 10:49:00
-GAME( 198?, sc1revo , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Revolution (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1revo , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Revolution (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6354 ROSE N CROWN 90 TOPBOX GAME No 95-750-802 - 03-JUL-1996 14:29:11
-GAME( 198?, sc1rose , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Rose 'n' Crown (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1rose , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Rose 'n' Crown (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6245 SANTANA GAME No 95-750-793 - 20-JUN-1996 13:01:14
-GAME( 198?, sc1sant , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Santana (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1sant , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Santana (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5515 SATELLITE GAME No 39-360-038 - 03-NOV-1989 14:27:00@
-GAME( 198?, sc1sat , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Satellite (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1sat , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Satellite (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 1052 SATELLITE GAME No 95100000 - 16-MAR-1998 9:05:08
-GAME( 199?, sc1satse , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Satellite SE (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS) // different game?
+GAME( 199?, sc1satse , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Satellite SE (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS) // different game?
// PROJECT NUMBER 5959 SHANGHAI GAME No 39-370-626 - 26-JUN-1992 14:04:06
-GAME( 198?, sc1shan , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Shanghai (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1shan , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Shanghai (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5952 STERLING GAME No 95-750-787 - 19-JUN-1996 13:16:41
-GAME( 198?, sc1ster , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Sterling (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1ster , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Sterling (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5367 DUTCH STRIKE 4 GAME No 01-ST8-0A1 - 30-AUG-1991 13:13:27
-GAME( 198?, sc1str4 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Strike 4 (Dutch) (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS )
+GAME( 198?, sc1str4 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Strike 4 (Dutch) (Bellfruit) (Scorpion 1) (set 1)", GAME_FLAGS )
// PROJECT NUMBER 5367 DUTCH STRIKE 4 GAME No 39-360-009 - 14-MRT-1988 16:40:00
-GAME( 198?, sc1str4a , sc1str4 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Strike 4 (Dutch) (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS )
+GAME( 198?, sc1str4a , sc1str4 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "BFM/ELAM", "Strike 4 (Dutch) (Bellfruit) (Scorpion 1) (set 2)", GAME_FLAGS )
// PROJECT NUMBER 6244 TORNADO GAME No 39-370-930 - 19-OCT-1993 12:16:25
-GAME( 198?, sc1torn , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Tornado (Dutch) (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1torn , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Tornado (Dutch) (Bellfruit) (set 1) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6244 TORNADO GAME No 95-750-792 - 24-JUN-1996 12:16:25
-GAME( 198?, sc1torna , sc1torn , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Tornado (Dutch) (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1torna , sc1torn , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Tornado (Dutch) (Bellfruit) (set 2) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5517 DUTCH 8 V1 1989 GAME No 39-370-939 - 3-NOV-1993 15:24:36
-GAME( 198?, sc1vent , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Ventura (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1vent , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Ventura (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 5721 DUTCH VICTORY GAME No 39-360-043 - 05-APR-1990 16:30:00@
-GAME( 198?, sc1vict , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Victory (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1vict , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Victory (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6241 WINFALLS GAME No 39-370-809 - 17-MRT-1993 13:30:02
-GAME( 198?, sc1winfl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Winfalls (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1winfl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Winfalls (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS )
// PROJECT NUMBER 6882 STRIKE SCORP I GAME No 95-752-023 - 02-FEB-1998 11:23:13
-GAME( 199?, sc1strk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Strike (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1strk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Strike (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS)
// PROJECT NUMBER 6766 SUPERFLUSH GAME No 95-750-926 - 11-FEB-1997 16:28:47
-GAME( 199?, sc1supfl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Super Flush (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1supfl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "BFM/ELAM", "Super Flush (Dutch) (Bellfruit) (Scorpion 1)", GAME_FLAGS)
@@ -3294,97 +3294,97 @@ GAME( 199?, sc1supfl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse ,
/* ELAM, but not BFM, no BFM headers */
-GAME( 198?, sc1dago , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Dagobert's Vault (Dutch) (Elam) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1dago , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Dagobert's Vault (Dutch) (Elam) (Scorpion 1)", GAME_FLAGS )
-GAME( 198?, sc1spit , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Spitfire (Dutch) (Elam) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1spit , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Spitfire (Dutch) (Elam) (Scorpion 1)", GAME_FLAGS )
-GAME( 198?, sc1voy , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Voyager (Dutch) (Elam) (set 1) (Scorpion 1)", GAME_FLAGS )
-GAME( 198?, sc1voya , sc1voy , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Voyager (Dutch) (Elam) (set 2) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1voy , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Voyager (Dutch) (Elam) (set 1) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1voya , sc1voy , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Voyager (Dutch) (Elam) (set 2) (Scorpion 1)", GAME_FLAGS )
/* ELAM, but not BFM, BFM style header */
// PROJECT NUMBER 1005 ZEPPELIN GAME No ZPA8GMV8 - 21-OCT-1999 20:30:55
-GAME( 198?, sc1zep , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Zeppelin (Dutch) (Elam) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1zep , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "ELAM", "Zeppelin (Dutch) (Elam) (Scorpion 1)", GAME_FLAGS )
/* 3rd Party Games without BFM headers, many manufacturers are unknown / unconfirmed */
// has ELAM and Barcrest strings, but I think that's just relating to hardware it can hook up to
// has GOEDGEKEURD DOOR HET IJKWEZEN ONDER NR. TK-0000 near the end, like several other games we've seen
-GAME( 198?, sc1final , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Final Touch (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS ) // PAL ERROR
-GAME( 198?, sc1sups , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Superstar (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS ) // PAL ERROR
-GAME( 198?, sc1wthn , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Eurocoin", "Wild Thing (Eurocoin) (Scorpion 1)", GAME_FLAGS ) // PAL ERROR
-GAME( 199?, sc1reply , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Eurocoin", "Replay (Eurocoin) (Scorpion 1)", GAME_FLAGS) // PAL ERROR
+GAME( 198?, sc1final , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Final Touch (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS ) // PAL ERROR
+GAME( 198?, sc1sups , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Superstar (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS ) // PAL ERROR
+GAME( 198?, sc1wthn , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Eurocoin", "Wild Thing (Eurocoin) (Scorpion 1)", GAME_FLAGS ) // PAL ERROR
+GAME( 199?, sc1reply , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Eurocoin", "Replay (Eurocoin) (Scorpion 1)", GAME_FLAGS) // PAL ERROR
// similar, but different error
-GAME( 198?, sc1t1k , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Eurocoin", "Top 1000 (Dutch) (Eurocoin) (Scorpion 1)", GAME_FLAGS ) // BATTERIJ DEFECT
-GAME( 199?, sc1czbrk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Crazy Break (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT
-GAME( 199?, sc1energ , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Energy (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT
-GAME( 199?, sc1dip , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Eurocoin", "Diplomat (Eurocoin) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT (no sound)
-GAME( 199?, sc1lamb , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Eurocoin", "Lambada (Eurocoin) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT
+GAME( 198?, sc1t1k , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Eurocoin", "Top 1000 (Dutch) (Eurocoin) (Scorpion 1)", GAME_FLAGS ) // BATTERIJ DEFECT
+GAME( 199?, sc1czbrk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Crazy Break (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT
+GAME( 199?, sc1energ , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Energy (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT
+GAME( 199?, sc1dip , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Eurocoin", "Diplomat (Eurocoin) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT (no sound)
+GAME( 199?, sc1lamb , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Eurocoin", "Lambada (Eurocoin) (Scorpion 1)", GAME_FLAGS) // BATTERIJ DEFECT
// Misc 3rd Party
-GAME( 199?, sc1smoke , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Smokey Vs The Bandit (Mdm) (set 1) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1smokea , sc1smoke , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Smokey Vs The Bandit (Mdm) (set 2) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1smoke , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Smokey Vs The Bandit (Mdm) (set 1) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1smokea , sc1smoke , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Smokey Vs The Bandit (Mdm) (set 2) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1ccroc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 1) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1ccroca , sc1ccroc , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 2) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1ccrocb , sc1ccroc , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 3) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1ccrocc , sc1ccroc , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 4) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1ccroc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 1) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1ccroca , sc1ccroc , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 2) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1ccrocb , sc1ccroc , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 3) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1ccrocc , sc1ccroc , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Crazy Crocs (Mdm) (set 4) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1crocr , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Croc And Roll (Mdm) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1crocr , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Croc And Roll (Mdm) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1btclk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Beat The Clock (Mdm) (set 1) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1btclka , sc1btclk , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Beat The Clock (Mdm) (set 2) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1btclkb , sc1btclk , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Beat The Clock (Mdm) (set 3) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1btclk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Beat The Clock (Mdm) (set 1) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1btclka , sc1btclk , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Beat The Clock (Mdm) (set 2) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
+GAME( 199?, sc1btclkb , sc1btclk , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Mdm", "Beat The Clock (Mdm) (set 3) (Scorpion 2/3?)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_NO_SOUND )
-GAME( 199?, sc1days , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "All In A Days Work (Global) (set 1)", GAME_FLAGS)
-GAME( 199?, sc1daysa , sc1days , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "All In A Days Work (Global) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1days , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "All In A Days Work (Global) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1daysa , sc1days , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "All In A Days Work (Global) (set 2)", GAME_FLAGS)
-GAME( 199?, sc1cscl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Cash Classic (Global) (set 1)", GAME_FLAGS)
-GAME( 199?, sc1cscla , sc1cscl , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Cash Classic (Global) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1cscl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Cash Classic (Global) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1cscla , sc1cscl , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Cash Classic (Global) (set 2)", GAME_FLAGS)
-GAME( 199?, sc1driv , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 1)", GAME_FLAGS)
-GAME( 199?, sc1driva , sc1driv , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 2)", GAME_FLAGS)
-GAME( 199?, sc1drivb , sc1driv , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 3)", GAME_FLAGS)
-GAME( 199?, sc1drivc , sc1driv , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 4)", GAME_FLAGS)
+GAME( 199?, sc1driv , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1driva , sc1driv , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1drivb , sc1driv , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 3)", GAME_FLAGS)
+GAME( 199?, sc1drivc , sc1driv , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Driving School (Global) (set 4)", GAME_FLAGS)
-GAME( 199?, sc1vsd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Vegas Super Deal (Global)", GAME_FLAGS)
+GAME( 199?, sc1vsd , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Vegas Super Deal (Global)", GAME_FLAGS)
-GAME( 199?, sc1wof , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Wheel Of Fortune (Global) (set 1)", GAME_FLAGS)
-GAME( 199?, sc1wofa , sc1wof , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Wheel Of Fortune (Global) (set 2)", GAME_FLAGS)
-GAME( 199?, sc1wofb , sc1wof , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Global", "Wheel Of Fortune (Global) (set 3)", GAME_FLAGS)
+GAME( 199?, sc1wof , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Wheel Of Fortune (Global) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1wofa , sc1wof , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Wheel Of Fortune (Global) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1wofb , sc1wof , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "Global", "Wheel Of Fortune (Global) (set 3)", GAME_FLAGS)
-GAME( 199?, sc1crzyc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Crazy Cash (Global) (set 1)", GAME_FLAGS)
-GAME( 199?, sc1crzyca , sc1crzyc , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Crazy Cash (Global) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1crzyc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Crazy Cash (Global) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1crzyca , sc1crzyc , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Crazy Cash (Global) (set 2)", GAME_FLAGS)
-GAME( 199?, sc1clbdy , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Club Dynamite (Global) (set 1)", GAME_FLAGS)
-GAME( 199?, sc1clbdya , sc1clbdy , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Club Dynamite (Global) (set 2)", GAME_FLAGS)
+GAME( 199?, sc1clbdy , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Club Dynamite (Global) (set 1)", GAME_FLAGS)
+GAME( 199?, sc1clbdya , sc1clbdy , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Club Dynamite (Global) (set 2)", GAME_FLAGS)
-GAME( 199?, sc1chqfl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Chequered Flag (Global)", GAME_FLAGS)
+GAME( 199?, sc1chqfl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Global", "Chequered Flag (Global)", GAME_FLAGS)
-GAME( 199?, sc1cdm , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Club Diamond (Crystal) (set 1) (Scorpion 1)", GAME_FLAGS)
-GAME( 199?, sc1cdmp , sc1cdm , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Club Diamond (Crystal) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1cdm , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Club Diamond (Crystal) (set 1) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1cdmp , sc1cdm , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Club Diamond (Crystal) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS)
-GAME( 199?, sc1hfcc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Hi Flyer Club (Crystal) (set 1) (Scorpion 1)", GAME_FLAGS)
-GAME( 199?, sc1hfccp , sc1hfcc , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Hi Flyer Club (Crystal) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1hfcc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Hi Flyer Club (Crystal) (set 1) (Scorpion 1)", GAME_FLAGS)
+GAME( 199?, sc1hfccp , sc1hfcc , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Crystal", "Hi Flyer Club (Crystal) (set 1, Protocol) (Scorpion 1)", GAME_FLAGS)
-GAME( 199?, sc1moonl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Bwb", "Moon Lite (Bwb)", GAME_FLAGS)
+GAME( 199?, sc1moonl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Bwb", "Moon Lite (Bwb)", GAME_FLAGS)
-GAME( 199?, sc1ltdv , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Pcp", "Little Devil (Pcp)", GAME_FLAGS)
+GAME( 199?, sc1ltdv , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Pcp", "Little Devil (Pcp)", GAME_FLAGS)
-GAME( 199?, sc1twice , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Associated Leisure", "Twice As Nice (Associated Leisure) (Scorpion 1)", GAME_FLAGS) // this has valid strings in it BEFORE the bfm decode, but decodes to valid code, does it use some funky mapping, or did they just fill unused space with valid looking data?
+GAME( 199?, sc1twice , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse_bank0 , 0, "Associated Leisure", "Twice As Nice (Associated Leisure) (Scorpion 1)", GAME_FLAGS) // this has valid strings in it BEFORE the bfm decode, but decodes to valid code, does it use some funky mapping, or did they just fill unused space with valid looking data?
-GAME( 1992, sc1s1000 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Deltasoft","Super 1000 (Deltasoft)", GAME_FLAGS) // JT/Deltasoft Nov 1992
+GAME( 1992, sc1s1000 , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "Deltasoft","Super 1000 (Deltasoft)", GAME_FLAGS) // JT/Deltasoft Nov 1992
// these 2 are both the same manufacturer
-GAME( 198?, sc1clbrn , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "<unknown>", "Club Runner (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS )
-GAME( 198?, sc1clbsp , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "<unknown>", "Club Spinner (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1clbrn , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "<unknown>", "Club Runner (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS )
+GAME( 198?, sc1clbsp , 0 , scorpion1 , scorpion1 , bfm_sc1_state, nocrypt , 0, "<unknown>", "Club Spinner (Dutch) (unknown) (Scorpion 1)", GAME_FLAGS )
-GAME( 199?, sc1scunk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "unknown Scorpion 1 'Super ?' (Bellfruit) (Scorpion 1)", GAME_FLAGS) // ?
+GAME( 199?, sc1scunk , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "unknown Scorpion 1 'Super ?' (Bellfruit) (Scorpion 1)", GAME_FLAGS) // ?
-GAME( 199?, sc1wud ,0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "What's Up Dr (Scorpion 1?)", GAME_FLAGS) // was in maygayep.c whats up doc set
+GAME( 199?, sc1wud ,0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "What's Up Dr (Scorpion 1?)", GAME_FLAGS) // was in maygayep.c whats up doc set
-GAME( 199?, sc1btbc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Beat The Bank Club (unknown) (Scorpion 1?)", GAME_FLAGS) // behaves like sc1clbdya, but then locks up
+GAME( 199?, sc1btbc , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Beat The Bank Club (unknown) (Scorpion 1?)", GAME_FLAGS) // behaves like sc1clbdya, but then locks up
-GAME( 199?, sc1boncl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Bonanza Club (unknown) (Scorpion 1)", GAME_FLAGS) // just alarms
+GAME( 199?, sc1boncl , 0 , scorpion1 , scorpion1 , bfm_sc1_state, lotse , 0, "<unknown>", "Bonanza Club (unknown) (Scorpion 1)", GAME_FLAGS) // just alarms
diff --git a/src/mame/drivers/bfm_sc2.c b/src/mame/drivers/bfm_sc2.c
index 6ad2c31665c..9750683970c 100644
--- a/src/mame/drivers/bfm_sc2.c
+++ b/src/mame/drivers/bfm_sc2.c
@@ -178,9 +178,9 @@ class bfm_sc2_state : public driver_device
public:
bfm_sc2_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_vfd0(*this, "vfd0"),
- m_vfd1(*this, "vfd1")
- { }
+ m_vfd0(*this, "vfd0"),
+ m_vfd1(*this, "vfd1")
+ { }
optional_device<bfm_bd1_t> m_vfd0;
optional_device<bfm_bd1_t> m_vfd1;
@@ -318,7 +318,7 @@ public:
#define UART_LOG(x) do { if (VERBOSE) logerror x; } while (0)
#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
-#define MASTER_CLOCK (XTAL_8MHz)
+#define MASTER_CLOCK (XTAL_8MHz)
// local prototypes ///////////////////////////////////////////////////////
@@ -380,7 +380,7 @@ static void on_scorpion2_reset(running_machine &machine)
machine.device("ymsnd")->reset();
- // reset stepper motors /////////////////////////////////////////////////
+ // reset stepper motors /////////////////////////////////////////////////
{
int pattern =0, i;
@@ -422,7 +422,7 @@ void Scorpion2_SetSwitchState(running_machine &machine, int strobe, int data, in
drvstate->m_input_override[strobe] |= (1<<data);
if ( state ) drvstate->m_sc2_Inputs[strobe] |= (1<<data);
- else drvstate->m_sc2_Inputs[strobe] &= ~(1<<data);
+ else drvstate->m_sc2_Inputs[strobe] &= ~(1<<data);
}
else
{
@@ -431,14 +431,14 @@ void Scorpion2_SetSwitchState(running_machine &machine, int strobe, int data, in
drvstate->m_input_override[strobe-8+4] |= (1<<(data+2));
if ( state ) drvstate->m_sc2_Inputs[strobe-8+4] |= (1<<(data+2));
- else drvstate->m_sc2_Inputs[strobe-8+4] &= ~(1<<(data+2));
+ else drvstate->m_sc2_Inputs[strobe-8+4] &= ~(1<<(data+2));
}
else
{
drvstate->m_input_override[strobe-8] |= (1<<(data+5));
if ( state ) drvstate->m_sc2_Inputs[strobe-8] |= (1 << (data+5));
- else drvstate->m_sc2_Inputs[strobe-8] &= ~(1 << (data+5));
+ else drvstate->m_sc2_Inputs[strobe-8] &= ~(1 << (data+5));
}
}
}
@@ -635,8 +635,8 @@ READ8_MEMBER(bfm_sc2_state::mux_input_r)
if (offset < 8)
{
int idx = (offset & 4) ? 4 : 8;
- t1 = m_input_override[offset]; // strobe 0-7 data 0-4
- t2 = m_input_override[offset+idx]; // strobe 8-B data 0-4
+ t1 = m_input_override[offset]; // strobe 0-7 data 0-4
+ t2 = m_input_override[offset+idx]; // strobe 8-B data 0-4
t1 = (m_sc2_Inputs[offset] & t1) | ( ( ioport(port[offset])->read() & ~t1) & 0x1F);
if (idx == 8)
@@ -717,7 +717,7 @@ WRITE8_MEMBER(bfm_sc2_state::nec_latch_w)
upd7759_set_bank_base(device, bank*0x20000);
- upd7759_port_w(device, space, 0, data&0x3F); // setup sample
+ upd7759_port_w(device, space, 0, data&0x3F); // setup sample
upd7759_start_w(device, 0);
upd7759_start_w(device, 1);
}
@@ -741,15 +741,15 @@ READ8_MEMBER(bfm_sc2_state::vfd_status_hop_r)// on video games, hopper inputs ar
if ( m_hopper_running )
{
- result &= ~0x01; // set motor running input
+ result &= ~0x01; // set motor running input
- if ( m_timercnt & 0x04 ) m_hopper_coin_sense ^= 1; // toggle coin seen
+ if ( m_timercnt & 0x04 ) m_hopper_coin_sense ^= 1; // toggle coin seen
- if ( m_hopper_coin_sense ) result &= ~0x02; // update coin seen input
+ if ( m_hopper_coin_sense ) result &= ~0x02; // update coin seen input
}
}
- if ( !upd7759_busy_r(machine().device("upd")) ) result |= 0x80; // update sound busy input
+ if ( !upd7759_busy_r(machine().device("upd")) ) result |= 0x80; // update sound busy input
return result;
}
@@ -831,7 +831,7 @@ READ8_MEMBER(bfm_sc2_state::timerirqclr_r)
READ8_MEMBER(bfm_sc2_state::irqstatus_r)
{
- int result = m_irq_status | m_irq_timer_stat | 0x80; // 0x80 = ~MUXERROR
+ int result = m_irq_status | m_irq_timer_stat | 0x80; // 0x80 = ~MUXERROR
m_irq_timer_stat = 0;
@@ -1082,8 +1082,8 @@ on a simple two wire bus.
-#define SCL 0x01 //SCL pin (clock)
-#define SDA 0x02 //SDA pin (data)
+#define SCL 0x01 //SCL pin (clock)
+#define SDA 0x02 //SDA pin (data)
static void e2ram_reset(running_machine &machine)
@@ -1171,7 +1171,7 @@ READ8_MEMBER(bfm_sc2_state::vfd_status_r)
WRITE8_MEMBER(bfm_sc2_state::vfd1_bd1_w)
{
- m_vfd0->write_char(data);
+ m_vfd0->write_char(data);
}
WRITE8_MEMBER(bfm_sc2_state::vfd_reset_w)
@@ -1201,10 +1201,10 @@ WRITE8_MEMBER(bfm_sc2_state::e2ram_w)
{
while ( 1 )
{
- if ( ( (changed & SDA) && !(data & SDA)) && // 1->0 on SDA AND
+ if ( ( (changed & SDA) && !(data & SDA)) && // 1->0 on SDA AND
( !(changed & SCL) && (data & SCL) ) // SCL=1 and not changed
)
- { // X24C08 Start condition (1->0 on SDA while SCL=1)
+ { // X24C08 Start condition (1->0 on SDA while SCL=1)
m_e2dummywrite = ( m_e2state == 5 );
LOG(("e2ram: c:%d d:%d Start condition dummywrite=%d\n", (data & SCL)?1:0, (data&SDA)?1:0, m_e2dummywrite ));
@@ -1215,10 +1215,10 @@ WRITE8_MEMBER(bfm_sc2_state::e2ram_w)
break;
}
- if ( ( (changed & SDA) && (data & SDA)) && // 0->1 on SDA AND
+ if ( ( (changed & SDA) && (data & SDA)) && // 0->1 on SDA AND
( !(changed & SCL) && (data & SCL) ) // SCL=1 and not changed
)
- { // X24C08 Stop condition (0->1 on SDA while SCL=1)
+ { // X24C08 Stop condition (0->1 on SDA while SCL=1)
LOG(("e2ram: c:%d d:%d Stop condition\n", (data & SCL)?1:0, (data&SDA)?1:0 ));
m_e2state = 0;
m_e2data = 0;
@@ -1264,7 +1264,7 @@ WRITE8_MEMBER(bfm_sc2_state::e2ram_w)
m_e2data_to_read = m_e2ram[m_e2address];
if ( m_e2rw & 1 ) m_e2state = 7; // read data
- else m_e2state = 0; //?not sure
+ else m_e2state = 0; //?not sure
}
else
{
@@ -1308,7 +1308,7 @@ WRITE8_MEMBER(bfm_sc2_state::e2ram_w)
ack = recAck(changed,data);
if ( ack )
{
- m_e2data_pin = 0; // pin=0, no error !!
+ m_e2data_pin = 0; // pin=0, no error !!
if ( ack < 0 )
{
@@ -1435,7 +1435,7 @@ static ADDRESS_MAP_START( sc2_basemap, AS_PROGRAM, 8, bfm_sc2_state )
AM_RANGE(0x2300, 0x230B) AM_READ(mux_input_r)
AM_RANGE(0x2300, 0x231F) AM_WRITE(mux_output_w)
- AM_RANGE(0x2320, 0x2323) AM_WRITE(dimas_w) /* ?unknown dim related */
+ AM_RANGE(0x2320, 0x2323) AM_WRITE(dimas_w) /* ?unknown dim related */
AM_RANGE(0x2324, 0x2324) AM_READWRITE(expansion_latch_r, expansion_latch_w)
AM_RANGE(0x2325, 0x2327) AM_WRITE(unknown_w)
@@ -1454,23 +1454,23 @@ static ADDRESS_MAP_START( sc2_basemap, AS_PROGRAM, 8, bfm_sc2_state )
AM_RANGE(0x2337, 0x2337) AM_WRITE(volume_override_w)
AM_RANGE(0x2338, 0x2338) AM_WRITE(payout_select_w)
AM_RANGE(0x2339, 0x2339) AM_WRITE(unknown_w)
- AM_RANGE(0x2400, 0x2400) AM_READWRITE(uart1stat_r, uart1ctrl_w) /* mc6850 compatible uart */
+ AM_RANGE(0x2400, 0x2400) AM_READWRITE(uart1stat_r, uart1ctrl_w) /* mc6850 compatible uart */
AM_RANGE(0x2500, 0x2500) AM_READWRITE(uart1data_r, uart1data_w)
- AM_RANGE(0x2600, 0x2600) AM_READWRITE(uart2stat_r, uart2ctrl_w) /* mc6850 compatible uart */
+ AM_RANGE(0x2600, 0x2600) AM_READWRITE(uart2stat_r, uart2ctrl_w) /* mc6850 compatible uart */
AM_RANGE(0x2700, 0x2700) AM_READWRITE(uart2data_r, uart2data_w)
- AM_RANGE(0x2800, 0x2800) AM_WRITE(vfd1_bd1_w) /* vfd1 data */
- AM_RANGE(0x2900, 0x2900) AM_WRITE(vfd_reset_w) /* vfd1+vfd2 reset line */
+ AM_RANGE(0x2800, 0x2800) AM_WRITE(vfd1_bd1_w) /* vfd1 data */
+ AM_RANGE(0x2900, 0x2900) AM_WRITE(vfd_reset_w) /* vfd1+vfd2 reset line */
AM_RANGE(0x2A00, 0x2AFF) AM_WRITE(nec_latch_w)
AM_RANGE(0x2B00, 0x2BFF) AM_WRITE(nec_reset_w)
- AM_RANGE(0x2C00, 0x2C00) AM_WRITE(unlock_w) /* custom chip unlock */
+ AM_RANGE(0x2C00, 0x2C00) AM_WRITE(unlock_w) /* custom chip unlock */
AM_RANGE(0x2D00, 0x2D01) AM_DEVWRITE_LEGACY("ymsnd", ym2413_w)
- AM_RANGE(0x2E00, 0x2E00) AM_WRITE(bankswitch_w) /* write bank (rom page select for 0x6000 - 0x7fff ) */
+ AM_RANGE(0x2E00, 0x2E00) AM_WRITE(bankswitch_w) /* write bank (rom page select for 0x6000 - 0x7fff ) */
//AM_RANGE(0x2F00, 0x2F00) AM_WRITE(vfd2_data_w) /* vfd2 data (not usually connected!)*/
AM_RANGE(0x3FFE, 0x3FFE) AM_READ(direct_input_r )
AM_RANGE(0x3FFF, 0x3FFF) AM_READ(coin_input_r)
AM_RANGE(0x4000, 0x5FFF) AM_ROM
- AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w) // contains unknown I/O registers
+ AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w) // contains unknown I/O registers
AM_RANGE(0x6000, 0x7FFF) AM_ROMBANK("bank1")
AM_RANGE(0x8000, 0xFFFF) AM_ROM
ADDRESS_MAP_END
@@ -1480,7 +1480,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( memmap_vid, AS_PROGRAM, 8, bfm_sc2_state )
AM_IMPORT_FROM( sc2_basemap )
- AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_hop_r) // vfd status register
+ AM_RANGE(0x2000, 0x2000) AM_READ(vfd_status_hop_r) // vfd status register
AM_RANGE(0x2000, 0x20FF) AM_WRITE(reel12_vid_w)
AM_RANGE(0x2100, 0x21FF) AM_WRITENOP
AM_RANGE(0x2200, 0x22FF) AM_WRITENOP
@@ -1488,15 +1488,15 @@ static ADDRESS_MAP_START( memmap_vid, AS_PROGRAM, 8, bfm_sc2_state )
AM_RANGE(0x3C00, 0x3C07) AM_READ(key_r )
AM_RANGE(0x3C80, 0x3C80) AM_WRITE(e2ram_w )
- AM_RANGE(0x3E00, 0x3E00) AM_READWRITE(vid_uart_ctrl_r, vid_uart_ctrl_w) // video uart control reg
- AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r, vid_uart_tx_w) // video uart data reg
+ AM_RANGE(0x3E00, 0x3E00) AM_READWRITE(vid_uart_ctrl_r, vid_uart_ctrl_w) // video uart control reg
+ AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r, vid_uart_tx_w) // video uart data reg
ADDRESS_MAP_END
// input ports for pyramid ////////////////////////////////////////
static INPUT_PORTS_START( pyramid )
PORT_START("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("Fl 1.00")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.50")
@@ -1710,7 +1710,7 @@ static INPUT_PORTS_START( qntoond )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.50")
PORT_MODIFY("STROBE1")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Collect") PORT_CODE(KEYCODE_C)
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_NAME("Collect") PORT_CODE(KEYCODE_C)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Hand 1" )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Hand 2" )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Hand 3" )
@@ -1780,7 +1780,7 @@ static INPUT_PORTS_START( quintoon )
PORT_INCLUDE( pyramid )
PORT_MODIFY("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("20p")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("50p")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("GBP 1.00")
@@ -1839,7 +1839,7 @@ static INPUT_PORTS_START( slotsnl )
PORT_INCLUDE( pyramid )
PORT_MODIFY("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 1.00")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
@@ -2033,7 +2033,7 @@ static INPUT_PORTS_START( paradice )
PORT_INCLUDE( pyramid )
PORT_MODIFY("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 1.00")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
@@ -2087,7 +2087,7 @@ static INPUT_PORTS_START( pokio )
PORT_INCLUDE( pyramid )
PORT_MODIFY("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 1.00")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
@@ -2146,11 +2146,11 @@ MACHINE_START_MEMBER(bfm_sc2_state,bfm_sc2)
}
static MACHINE_CONFIG_START( scorpion2_vid, bfm_sc2_state )
- MCFG_MACHINE_RESET_OVERRIDE(bfm_sc2_state, init ) // main scorpion2 board initialisation
- MCFG_QUANTUM_TIME(attotime::from_hz(960)) // needed for serial communication !!
- MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4 ) // 6809 CPU at 2 Mhz
- MCFG_CPU_PROGRAM_MAP(memmap_vid) // setup scorpion2 board memorymap
- MCFG_CPU_PERIODIC_INT_DRIVER(bfm_sc2_state, timer_irq, 1000) // generate 1000 IRQ's per second
+ MCFG_MACHINE_RESET_OVERRIDE(bfm_sc2_state, init ) // main scorpion2 board initialisation
+ MCFG_QUANTUM_TIME(attotime::from_hz(960)) // needed for serial communication !!
+ MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4 ) // 6809 CPU at 2 Mhz
+ MCFG_CPU_PROGRAM_MAP(memmap_vid) // setup scorpion2 board memorymap
+ MCFG_CPU_PERIODIC_INT_DRIVER(bfm_sc2_state, timer_irq, 1000) // generate 1000 IRQ's per second
MCFG_WATCHDOG_TIME_INIT(PERIOD_OF_555_MONOSTABLE(120000,100e-9))
MCFG_BFMBD1_ADD("vfd0",0)
@@ -2175,9 +2175,9 @@ static MACHINE_CONFIG_START( scorpion2_vid, bfm_sc2_state )
MCFG_PALETTE_INIT(adder2)
MCFG_GFXDECODE(adder2)
- MCFG_CPU_ADD("adder2", M6809, MASTER_CLOCK/4 ) // adder2 board 6809 CPU at 2 Mhz
- MCFG_CPU_PROGRAM_MAP(adder2_memmap) // setup adder2 board memorymap
- MCFG_CPU_VBLANK_INT("adder", adder2_vbl) // board has a VBL IRQ
+ MCFG_CPU_ADD("adder2", M6809, MASTER_CLOCK/4 ) // adder2 board 6809 CPU at 2 Mhz
+ MCFG_CPU_PROGRAM_MAP(adder2_memmap) // setup adder2 board memorymap
+ MCFG_CPU_VBLANK_INT("adder", adder2_vbl) // board has a VBL IRQ
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("upd", UPD7759, UPD7759_STANDARD_CLOCK)
@@ -2270,7 +2270,7 @@ static void sc2_common_init(running_machine &machine, int decrypt)
{
bfm_sc2_state *state = machine.driver_data<bfm_sc2_state>();
- if (decrypt) bfm_decode_mainrom(machine, "maincpu", state->m_codec_data); // decode main rom
+ if (decrypt) bfm_decode_mainrom(machine, "maincpu", state->m_codec_data); // decode main rom
memset(state->m_sc2_Inputs, 0, sizeof(state->m_sc2_Inputs)); // clear all inputs
}
@@ -2293,13 +2293,13 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,quintoon)
{
sc2_common_init(machine(), 1);
adder2_decode_char_roms(machine());
- MechMtr_config(machine(),8); // setup mech meters
+ MechMtr_config(machine(),8); // setup mech meters
m_has_hopper = 0;
- Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
- Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
- Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
+ Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
+ Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
+ Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
Scorpion2_SetSwitchState(machine(),5,2,1);
Scorpion2_SetSwitchState(machine(),6,4,1);
@@ -2313,14 +2313,14 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,quintoon)
DRIVER_INIT_MEMBER(bfm_sc2_state,pyramid)
{
sc2_common_init(machine(), 1);
- adder2_decode_char_roms(machine()); // decode GFX roms
+ adder2_decode_char_roms(machine()); // decode GFX roms
adder2_common_init(machine());
m_has_hopper = 1;
- Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
- Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
- Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
+ Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
+ Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
+ Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
m_sc2_show_door = 1;
m_sc2_door_state = 0x41;
@@ -2330,7 +2330,7 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,pyramid)
DRIVER_INIT_MEMBER(bfm_sc2_state,sltsbelg)
{
sc2_common_init(machine(), 1);
- adder2_decode_char_roms(machine()); // decode GFX roms
+ adder2_decode_char_roms(machine()); // decode GFX roms
adder2_common_init(machine());
m_has_hopper = 1;
@@ -2344,14 +2344,14 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,sltsbelg)
DRIVER_INIT_MEMBER(bfm_sc2_state,adder_dutch)
{
sc2_common_init(machine(), 1);
- adder2_decode_char_roms(machine()); // decode GFX roms
+ adder2_decode_char_roms(machine()); // decode GFX roms
adder2_common_init(machine());
m_has_hopper = 0;
- Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
- Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
- Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
+ Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
+ Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
+ Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
m_sc2_show_door = 1;
m_sc2_door_state = 0x41;
@@ -2362,14 +2362,14 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,adder_dutch)
DRIVER_INIT_MEMBER(bfm_sc2_state,gldncrwn)
{
sc2_common_init(machine(), 1);
- adder2_decode_char_roms(machine()); // decode GFX roms
+ adder2_decode_char_roms(machine()); // decode GFX roms
adder2_common_init(machine());
m_has_hopper = 0;
- Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
- Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
- Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
+ Scorpion2_SetSwitchState(machine(),3,0,1); // tube1 level switch
+ Scorpion2_SetSwitchState(machine(),3,1,1); // tube2 level switch
+ Scorpion2_SetSwitchState(machine(),3,2,1); // tube3 level switch
m_sc2_show_door = 0;
m_sc2_door_state = 0x41;
@@ -2379,48 +2379,48 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,gldncrwn)
ROM_START( quintoon )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("95750206.p1", 0x00000, 0x10000, CRC(05f4bfad) SHA1(22751573f3a51a9fd2d2a75a7d1b20d78112e0bb))
+ ROM_LOAD("95750206.p1", 0x00000, 0x10000, CRC(05f4bfad) SHA1(22751573f3a51a9fd2d2a75a7d1b20d78112e0bb))
ROM_REGION( 0x20000, "adder2", 0 )
- ROM_LOAD("quinp132", 0x00000, 0x20000, CRC(63896a7f) SHA1(81aa56874a15faa3aabdfc0fc524b2e25b751f22))
+ ROM_LOAD("quinp132", 0x00000, 0x20000, CRC(63896a7f) SHA1(81aa56874a15faa3aabdfc0fc524b2e25b751f22))
ROM_REGION( 0x20000, "upd", 0 ) // using Dutch samples, need to check a UK Quintoon PCB
- ROM_LOAD("95001016.snd", 0x00000, 0x20000, BAD_DUMP CRC(cf097d41) SHA1(6712f93896483360256d8baffc05977c8e532ef1))
+ ROM_LOAD("95001016.snd", 0x00000, 0x20000, BAD_DUMP CRC(cf097d41) SHA1(6712f93896483360256d8baffc05977c8e532ef1))
ROM_REGION( 0x40000, "gfx1", ROMREGION_ERASEFF )
- ROM_LOAD("quinp233", 0x00000, 0x20000, CRC(3d4ebecf) SHA1(b339cf16797ccf7a1ec20fcebf52b6edad9a1047))
+ ROM_LOAD("quinp233", 0x00000, 0x20000, CRC(3d4ebecf) SHA1(b339cf16797ccf7a1ec20fcebf52b6edad9a1047))
ROM_END
// ROM definition UK Quintoon (older) ////////////////////////////////////
ROM_START( quintono )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("95750203.bin", 0x00000, 0x10000, CRC(037ef2d0) SHA1(6958624e29629a7639a80e8929b833a8b0201833))
+ ROM_LOAD("95750203.bin", 0x00000, 0x10000, CRC(037ef2d0) SHA1(6958624e29629a7639a80e8929b833a8b0201833))
ROM_REGION( 0x20000, "adder2", 0 )
- ROM_LOAD("quinp132", 0x00000, 0x20000, CRC(63896a7f) SHA1(81aa56874a15faa3aabdfc0fc524b2e25b751f22))
+ ROM_LOAD("quinp132", 0x00000, 0x20000, CRC(63896a7f) SHA1(81aa56874a15faa3aabdfc0fc524b2e25b751f22))
ROM_REGION( 0x20000, "upd", 0 ) // using Dutch samples, need to check a UK Quintoon PCB
- ROM_LOAD("95001016.snd", 0x00000, 0x20000, BAD_DUMP CRC(cf097d41) SHA1(6712f93896483360256d8baffc05977c8e532ef1))
+ ROM_LOAD("95001016.snd", 0x00000, 0x20000, BAD_DUMP CRC(cf097d41) SHA1(6712f93896483360256d8baffc05977c8e532ef1))
ROM_REGION( 0x40000, "gfx1", ROMREGION_ERASEFF )
- ROM_LOAD("quinp233", 0x00000, 0x20000, CRC(3d4ebecf) SHA1(b339cf16797ccf7a1ec20fcebf52b6edad9a1047))
+ ROM_LOAD("quinp233", 0x00000, 0x20000, CRC(3d4ebecf) SHA1(b339cf16797ccf7a1ec20fcebf52b6edad9a1047))
ROM_END
// ROM definition UK Quintoon (data) /////////////////////////////////////
ROM_START( quintond )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("95751206.bin", 0x00000, 0x10000, CRC(63def707) SHA1(d016df74f4f83cd72b16f9ccbe78cc382bf056c8))
+ ROM_LOAD("95751206.bin", 0x00000, 0x10000, CRC(63def707) SHA1(d016df74f4f83cd72b16f9ccbe78cc382bf056c8))
ROM_REGION( 0x20000, "adder2", 0 )
- ROM_LOAD("quinp132", 0x00000, 0x20000, CRC(63896a7f) SHA1(81aa56874a15faa3aabdfc0fc524b2e25b751f22))
+ ROM_LOAD("quinp132", 0x00000, 0x20000, CRC(63896a7f) SHA1(81aa56874a15faa3aabdfc0fc524b2e25b751f22))
ROM_REGION( 0x20000, "upd", 0 ) // using Dutch samples, need to check a UK Quintoon PCB
- ROM_LOAD("95001016.snd", 0x00000, 0x20000, BAD_DUMP CRC(cf097d41) SHA1(6712f93896483360256d8baffc05977c8e532ef1))
+ ROM_LOAD("95001016.snd", 0x00000, 0x20000, BAD_DUMP CRC(cf097d41) SHA1(6712f93896483360256d8baffc05977c8e532ef1))
ROM_REGION( 0x40000, "gfx1", ROMREGION_ERASEFF )
- ROM_LOAD("quinp233", 0x00000, 0x20000, CRC(3d4ebecf) SHA1(b339cf16797ccf7a1ec20fcebf52b6edad9a1047))
+ ROM_LOAD("quinp233", 0x00000, 0x20000, CRC(3d4ebecf) SHA1(b339cf16797ccf7a1ec20fcebf52b6edad9a1047))
ROM_END
// ROM definition Dutch Quintoon ///////////////////////////////////////////
@@ -2541,13 +2541,13 @@ ROM_START( slotsnl )
ROM_LOAD("95750368.bin", 0x00000, 0x10000, CRC(3a43048c) SHA1(13728e05b334cba90ea9cc51ea00c4384baa8614))
ROM_REGION( 0x20000, "adder2", 0 )
- ROM_LOAD("video.vid", 0x00000, 0x20000, CRC(cc760208) SHA1(cc01b1e31335b26f2d0f3470d8624476b153655f))
+ ROM_LOAD("video.vid", 0x00000, 0x20000, CRC(cc760208) SHA1(cc01b1e31335b26f2d0f3470d8624476b153655f))
ROM_REGION( 0x20000, "upd", 0 )
ROM_LOAD("95001029.snd", 0x00000, 0x20000, CRC(7749c724) SHA1(a87cce0c99e392f501bba44b3936a7059d682c9c))
ROM_REGION( 0x40000, "gfx1", ROMREGION_ERASEFF )
- ROM_LOAD("charset.chr", 0x00000, 0x20000, CRC(ef4300b6) SHA1(a1f765f38c2f146651fc685ea6195af72465f559))
+ ROM_LOAD("charset.chr", 0x00000, 0x20000, CRC(ef4300b6) SHA1(a1f765f38c2f146651fc685ea6195af72465f559))
ROM_REGION( 0x10, "proms", 0 )
ROM_LOAD( "slotspal.bin", 0, 8 , CRC(ee5421f0) SHA1(21bdcbf11dda8b1a93c49ae1c706954bba53c917))
@@ -2566,7 +2566,7 @@ ROM_START( sltblgtk )
ROM_LOAD("sound029.bin", 0x00000, 0x20000, CRC(7749c724) SHA1(a87cce0c99e392f501bba44b3936a7059d682c9c))
ROM_REGION( 0x40000, "gfx1", ROMREGION_ERASEFF )
- ROM_LOAD("chr122.bin", 0x00000, 0x20000, CRC(a1e3bdf4) SHA1(f0cabe08dee028e2014cbf0fc3fe0806cdfa60c6))
+ ROM_LOAD("chr122.bin", 0x00000, 0x20000, CRC(a1e3bdf4) SHA1(f0cabe08dee028e2014cbf0fc3fe0806cdfa60c6))
ROM_REGION( 0x10, "proms", 0 )
ROM_LOAD("stsbtpal.bin", 0, 8 , CRC(20e13635) SHA1(5aa7e7cac8c00ebc193d63d0c6795904f42c70fa))
@@ -2585,7 +2585,7 @@ ROM_START( sltblgp1 )
ROM_LOAD("sound033.bin", 0x00000, 0x20000, CRC(bb1dfa55) SHA1(442454fccfe03e6f4c3353551cb7459e184a099d))
ROM_REGION( 0x40000, "gfx1", ROMREGION_ERASEFF )
- ROM_LOAD("chr143.bin", 0x00000, 0x20000, CRC(a40e91e2) SHA1(87dc76963ea961fcfbe4f3e25df9162348d39d79))
+ ROM_LOAD("chr143.bin", 0x00000, 0x20000, CRC(a40e91e2) SHA1(87dc76963ea961fcfbe4f3e25df9162348d39d79))
ROM_REGION( 0x10, "proms", 0 )
ROM_LOAD("stsbcpal.bin", 0, 8 , CRC(c63bcab6) SHA1(238841165d5b3241b0bcc5c1792e9c0be1fc0177))
@@ -2639,28 +2639,28 @@ ROM_END
/* Scorpion 3 expansion */
READ8_MEMBER(bfm_sc2_state::sc3_expansion_r)
{
- int result = 0;
+ int result = 0;
- switch ( offset )
- {
- case 0: result = 0;
- break;
- case 1: result = input_port_read_indexed(machine,0); /* coin input */
- }
+ switch ( offset )
+ {
+ case 0: result = 0;
+ break;
+ case 1: result = input_port_read_indexed(machine,0); /* coin input */
+ }
- return result;
+ return result;
}
WRITE8_MEMBER(bfm_sc2_state::sc3_expansion_w)
{
- switch ( offset )
- {
- case 0:
- break;
- case 1:
- break;
- }
+ switch ( offset )
+ {
+ case 0:
+ break;
+ case 1:
+ break;
+ }
}
#endif
@@ -2728,21 +2728,21 @@ static INPUT_PORTS_START( scorpion2 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("STROBE3")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I30")
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I31")
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I32")
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I33")
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I34")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I30")
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I31")
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I32")
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I33")
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I34")
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("STROBE4")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_INTERLOCK) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_INTERLOCK) PORT_NAME("Front Door") PORT_CODE(KEYCODE_W) PORT_TOGGLE
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I43")
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I44")
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_INTERLOCK) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_INTERLOCK) PORT_NAME("Front Door") PORT_CODE(KEYCODE_W) PORT_TOGGLE
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I43")
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("I44")
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED)
@@ -2840,7 +2840,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( bbrkfst )
PORT_START("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("20p")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("50p")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("GBP 1.00")
@@ -2883,9 +2883,9 @@ static INPUT_PORTS_START( bbrkfst )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("STROBE4")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_INTERLOCK) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_INTERLOCK) PORT_NAME("Front Door") PORT_CODE(KEYCODE_W) PORT_TOGGLE
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_INTERLOCK) PORT_NAME("Cashbox Door") PORT_CODE(KEYCODE_Q) PORT_TOGGLE
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_INTERLOCK) PORT_NAME("Front Door") PORT_CODE(KEYCODE_W) PORT_TOGGLE
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Refill Key") PORT_CODE(KEYCODE_R) PORT_TOGGLE
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
@@ -2984,7 +2984,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( drwho )
PORT_START("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("10p")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("20p")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("50p")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("GBP 1.00")
@@ -3607,7 +3607,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( scorpion3 )
PORT_START("COINS")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("Fl 1.00")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
@@ -3812,7 +3812,7 @@ MACHINE_CONFIG_END
/* machine driver for scorpion2 board + matrix board */
static MACHINE_CONFIG_START( scorpion2_dm01, bfm_sc2_state )
MCFG_MACHINE_RESET_OVERRIDE(bfm_sc2_state,dm01_init)
- MCFG_QUANTUM_TIME(attotime::from_hz(960)) // needed for serial communication !!
+ MCFG_QUANTUM_TIME(attotime::from_hz(960)) // needed for serial communication !!
MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4 )
MCFG_CPU_PROGRAM_MAP(sc2_basemap)
MCFG_CPU_PERIODIC_INT_DRIVER(bfm_sc2_state, timer_irq, 1000)
@@ -3831,9 +3831,9 @@ static MACHINE_CONFIG_START( scorpion2_dm01, bfm_sc2_state )
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_sc2_dmd)
- MCFG_CPU_ADD("matrix", M6809, 2000000 ) /* matrix board 6809 CPU at 2 Mhz ?? I don't know the exact freq.*/
+ MCFG_CPU_ADD("matrix", M6809, 2000000 ) /* matrix board 6809 CPU at 2 Mhz ?? I don't know the exact freq.*/
MCFG_CPU_PROGRAM_MAP(bfm_dm01_memmap)
- MCFG_CPU_PERIODIC_INT(bfm_dm01_vbl, 1500 ) /* generate 1500 NMI's per second ?? what is the exact freq?? */
+ MCFG_CPU_PERIODIC_INT(bfm_dm01_vbl, 1500 ) /* generate 1500 NMI's per second ?? what is the exact freq?? */
MACHINE_CONFIG_END
static void sc2awp_common_init(running_machine &machine,int reels, int decrypt)
@@ -3878,10 +3878,10 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,bbrkfst)
m_has_hopper = 0;
- Scorpion2_SetSwitchState(machine(),4,0, 1); /* GBP1 Low Level Switch */
- Scorpion2_SetSwitchState(machine(),4,1, 1); /* 20p Low Level Switch */
- Scorpion2_SetSwitchState(machine(),4,2, 1); /* Token Front Low Level Switch */
- Scorpion2_SetSwitchState(machine(),4,3, 1); /* Token Rear Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,0, 1); /* GBP1 Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,1, 1); /* 20p Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,2, 1); /* Token Front Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,3, 1); /* Token Rear Low Level Switch */
Scorpion2_SetSwitchState(machine(),4,4, 1);
Scorpion2_SetSwitchState(machine(),6,0, 0);
Scorpion2_SetSwitchState(machine(),6,1, 1);
@@ -3897,14 +3897,14 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,drwho_common)
m_has_hopper = 0;
- Scorpion2_SetSwitchState(machine(),4,0, 0); /* GBP1 Low Level Switch */
- Scorpion2_SetSwitchState(machine(),4,1, 0); /* 20p Low Level Switch */
- Scorpion2_SetSwitchState(machine(),4,2, 0); /* Token Front Low Level Switch */
- Scorpion2_SetSwitchState(machine(),4,3, 0); /* Token Rear Low Level Switch */
- Scorpion2_SetSwitchState(machine(),7,0, 0); /* GBP1 High Level Switch */
- Scorpion2_SetSwitchState(machine(),7,1, 0); /* 20P High Level Switch */
- Scorpion2_SetSwitchState(machine(),7,2, 0); /* Token Front High Level Switch */
- Scorpion2_SetSwitchState(machine(),7,3, 0); /* Token Rear High Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,0, 0); /* GBP1 Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,1, 0); /* 20p Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,2, 0); /* Token Front Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),4,3, 0); /* Token Rear Low Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,0, 0); /* GBP1 High Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,1, 0); /* 20P High Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,2, 0); /* Token Front High Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,3, 0); /* Token Rear High Level Switch */
sc2_find_project_string(machine());
}
@@ -3935,19 +3935,19 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,cpeno1)
MechMtr_config(machine(),5);
- Scorpion2_SetSwitchState(machine(),3,3,1); /* 5p play */
- Scorpion2_SetSwitchState(machine(),3,4,1); /* 20p play */
+ Scorpion2_SetSwitchState(machine(),3,3,1); /* 5p play */
+ Scorpion2_SetSwitchState(machine(),3,4,1); /* 20p play */
- Scorpion2_SetSwitchState(machine(),4,0,1); /* pay tube low (1 pound front) */
- Scorpion2_SetSwitchState(machine(),4,1,1); /* pay tube low (20p) */
- Scorpion2_SetSwitchState(machine(),4,2,1); /* pay tube low (?1 right) */
- Scorpion2_SetSwitchState(machine(),4,3,1); /* pay tube low (?1 left) */
+ Scorpion2_SetSwitchState(machine(),4,0,1); /* pay tube low (1 pound front) */
+ Scorpion2_SetSwitchState(machine(),4,1,1); /* pay tube low (20p) */
+ Scorpion2_SetSwitchState(machine(),4,2,1); /* pay tube low (?1 right) */
+ Scorpion2_SetSwitchState(machine(),4,3,1); /* pay tube low (?1 left) */
- Scorpion2_SetSwitchState(machine(),5,0,1); /* pay sensor (GBP1 front) */
- Scorpion2_SetSwitchState(machine(),5,1,1); /* pay sensor (20 p) */
- Scorpion2_SetSwitchState(machine(),5,2,1); /* pay sensor (1 right) */
- Scorpion2_SetSwitchState(machine(),5,3,1); /* pay sensor (?1 left) */
- Scorpion2_SetSwitchState(machine(),5,4,1); /* payout unit present */
+ Scorpion2_SetSwitchState(machine(),5,0,1); /* pay sensor (GBP1 front) */
+ Scorpion2_SetSwitchState(machine(),5,1,1); /* pay sensor (20 p) */
+ Scorpion2_SetSwitchState(machine(),5,2,1); /* pay sensor (1 right) */
+ Scorpion2_SetSwitchState(machine(),5,3,1); /* pay sensor (?1 left) */
+ Scorpion2_SetSwitchState(machine(),5,4,1); /* payout unit present */
m_slide_pay_sensor[0] = 0x50;
m_slide_pay_sensor[1] = 0x51;
@@ -3956,16 +3956,16 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,cpeno1)
m_slide_pay_sensor[4] = 0;
m_slide_pay_sensor[5] = 0;
- Scorpion2_SetSwitchState(machine(),6,0,1); /* ? percentage key */
+ Scorpion2_SetSwitchState(machine(),6,0,1); /* ? percentage key */
Scorpion2_SetSwitchState(machine(),6,1,1);
Scorpion2_SetSwitchState(machine(),6,2,1);
Scorpion2_SetSwitchState(machine(),6,3,1);
Scorpion2_SetSwitchState(machine(),6,4,1);
- Scorpion2_SetSwitchState(machine(),7,0,0); /* GBP1 High Level Switch */
- Scorpion2_SetSwitchState(machine(),7,1,0); /* 20P High Level Switch */
- Scorpion2_SetSwitchState(machine(),7,2,0); /* Token Front High Level Switch */
- Scorpion2_SetSwitchState(machine(),7,3,0); /* Token Rear High Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,0,0); /* GBP1 High Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,1,0); /* 20P High Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,2,0); /* Token Front High Level Switch */
+ Scorpion2_SetSwitchState(machine(),7,3,0); /* Token Rear High Level Switch */
m_sc2_show_door = 1;
m_sc2_door_state = 0x31;
@@ -3978,12 +3978,12 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,ofah)
{
sc2awpdmd_common_init(machine(),4, 1);
- Scorpion2_SetSwitchState(machine(),4,0,1); /* pay tube low (1 pound front) */
- Scorpion2_SetSwitchState(machine(),4,1,1); /* pay tube low (20p) */
- Scorpion2_SetSwitchState(machine(),4,2,1); /* pay tube low (?1 right) */
- Scorpion2_SetSwitchState(machine(),4,3,1); /* pay tube low (?1 left) */
+ Scorpion2_SetSwitchState(machine(),4,0,1); /* pay tube low (1 pound front) */
+ Scorpion2_SetSwitchState(machine(),4,1,1); /* pay tube low (20p) */
+ Scorpion2_SetSwitchState(machine(),4,2,1); /* pay tube low (?1 right) */
+ Scorpion2_SetSwitchState(machine(),4,3,1); /* pay tube low (?1 left) */
- Scorpion2_SetSwitchState(machine(),6,0,0); /* ? percentage key */
+ Scorpion2_SetSwitchState(machine(),6,0,0); /* ? percentage key */
Scorpion2_SetSwitchState(machine(),6,1,1);
Scorpion2_SetSwitchState(machine(),6,2,0);
Scorpion2_SetSwitchState(machine(),6,3,1);
@@ -3996,12 +3996,12 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,prom)
{
sc2awpdmd_common_init(machine(),6, 1);
- Scorpion2_SetSwitchState(machine(),4,0,1); /* pay tube low (1 pound front) */
- Scorpion2_SetSwitchState(machine(),4,1,1); /* pay tube low (20p) */
- Scorpion2_SetSwitchState(machine(),4,2,1); /* pay tube low (?1 right) */
- Scorpion2_SetSwitchState(machine(),4,3,1); /* pay tube low (?1 left) */
+ Scorpion2_SetSwitchState(machine(),4,0,1); /* pay tube low (1 pound front) */
+ Scorpion2_SetSwitchState(machine(),4,1,1); /* pay tube low (20p) */
+ Scorpion2_SetSwitchState(machine(),4,2,1); /* pay tube low (?1 right) */
+ Scorpion2_SetSwitchState(machine(),4,3,1); /* pay tube low (?1 left) */
- Scorpion2_SetSwitchState(machine(),6,0,0); /* ? percentage key */
+ Scorpion2_SetSwitchState(machine(),6,0,0); /* ? percentage key */
Scorpion2_SetSwitchState(machine(),6,1,1);
Scorpion2_SetSwitchState(machine(),6,2,0);
Scorpion2_SetSwitchState(machine(),6,3,1);
@@ -4081,7 +4081,7 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,luvjub)
#define sc2_luvv_sound \
ROM_REGION( 0x80000, "upd", 0 )\
- ROM_LOAD("snd.bin", 0x00000, 0x80000, CRC(19efac32) SHA1(26f901fc11f052a4d3cff67f8f61dcdd04f3dc22))\
+ ROM_LOAD("snd.bin", 0x00000, 0x80000, CRC(19efac32) SHA1(26f901fc11f052a4d3cff67f8f61dcdd04f3dc22))\
#define sc2_ofool_sound\
ROM_REGION( 0x80000, "upd", 0 )\
@@ -4216,7 +4216,7 @@ DRIVER_INIT_MEMBER(bfm_sc2_state,luvjub)
ROM_START( sc2brkfs )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("big-breakfast_std_ar_var_a.bin", 0x00000, 0x10000, CRC(5f016daa) SHA1(25ee10138bddf453588e3c458268533a88a51217) )
+ ROM_LOAD("big-breakfast_std_ar_var_a.bin", 0x00000, 0x10000, CRC(5f016daa) SHA1(25ee10138bddf453588e3c458268533a88a51217) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("bigbreakfastsnd.bin", 0x00000, 0x80000, CRC(bf91aa2b) SHA1(40942165e65ff9b027015d500e5a9726c44ba1c5))
@@ -4256,7 +4256,7 @@ ROM_END
ROM_START( sc2brkfs1 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("big-breakfast_std_ss_var_a.bin", 0x00000, 0x10000, CRC(08d1fa7d) SHA1(a3dba79eef32835f0b46dbd7b376b797324df904) )
+ ROM_LOAD("big-breakfast_std_ss_var_a.bin", 0x00000, 0x10000, CRC(08d1fa7d) SHA1(a3dba79eef32835f0b46dbd7b376b797324df904) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("bigbreakfastsnd.bin", 0x00000, 0x80000, CRC(bf91aa2b) SHA1(40942165e65ff9b027015d500e5a9726c44ba1c5))
@@ -4272,7 +4272,7 @@ ROM_END
ROM_START( sc2brkfs2 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("big-breakfast_std_ac_var_jp-8_a.bin", 0x00000, 0x10000, CRC(2671af1b) SHA1(0a34dd2953a99be9fb2a128f9d1f7ddc0fc8242a) )
+ ROM_LOAD("big-breakfast_std_ac_var_jp-8_a.bin", 0x00000, 0x10000, CRC(2671af1b) SHA1(0a34dd2953a99be9fb2a128f9d1f7ddc0fc8242a) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("bigbreakfastsnd.bin", 0x00000, 0x80000, CRC(bf91aa2b) SHA1(40942165e65ff9b027015d500e5a9726c44ba1c5))
@@ -4280,7 +4280,7 @@ ROM_END
ROM_START( sc2brkfs3 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("big-breakfast_std_ac_8pnd20p_a.bin", 0x00000, 0x10000, CRC(054c38ad) SHA1(f4ab55f977848e3d2a933bba1ab619ffa3e14db6) )
+ ROM_LOAD("big-breakfast_std_ac_8pnd20p_a.bin", 0x00000, 0x10000, CRC(054c38ad) SHA1(f4ab55f977848e3d2a933bba1ab619ffa3e14db6) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("bigbreakfastsnd.bin", 0x00000, 0x80000, CRC(bf91aa2b) SHA1(40942165e65ff9b027015d500e5a9726c44ba1c5))
@@ -4297,7 +4297,7 @@ ROM_END
ROM_START( sc2brkfs4 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("big-breakfast_std_ac_var_10pnd-20p_a.bin", 0x00000, 0x10000, CRC(d879feaa) SHA1(2656fbe018fe40194c2b77d289b77fabbc9e537c) )
+ ROM_LOAD("big-breakfast_std_ac_var_10pnd-20p_a.bin", 0x00000, 0x10000, CRC(d879feaa) SHA1(2656fbe018fe40194c2b77d289b77fabbc9e537c) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("bigbreakfastsnd.bin", 0x00000, 0x80000, CRC(bf91aa2b) SHA1(40942165e65ff9b027015d500e5a9726c44ba1c5))
@@ -4314,7 +4314,7 @@ ROM_END
ROM_START( sc2brkfs5 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("big-breakfast_std_ac_10pnd-20p_a.bin", 0x00000, 0x10000, CRC(55d7321c) SHA1(0b4a6b66aa64fbb3238539a2167f761d0910b814) )
+ ROM_LOAD("big-breakfast_std_ac_10pnd-20p_a.bin", 0x00000, 0x10000, CRC(55d7321c) SHA1(0b4a6b66aa64fbb3238539a2167f761d0910b814) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("bigbreakfastsnd.bin", 0x00000, 0x80000, CRC(bf91aa2b) SHA1(40942165e65ff9b027015d500e5a9726c44ba1c5))
@@ -4339,7 +4339,7 @@ ROM_END
ROM_START( sc2drwho )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("95750288.bin", 0x00000, 0x10000, CRC(fe95b5a5) SHA1(876a812f69903fd99f896b35eeaf132c215b0035) ) // dr-who-time-lord_std_ss_20p_ass.bin
+ ROM_LOAD("95750288.bin", 0x00000, 0x10000, CRC(fe95b5a5) SHA1(876a812f69903fd99f896b35eeaf132c215b0035) ) // dr-who-time-lord_std_ss_20p_ass.bin
ROM_REGION( 0x80000, "upd", 0 )
@@ -4348,7 +4348,7 @@ ROM_END
ROM_START( sc2drwho7 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("95750661.p1", 0x00000, 0x10000, CRC(4b5b50eb) SHA1(fe2b820c214b3e967348b99ccff30a4bfe0251dc) )
+ ROM_LOAD("95750661.p1", 0x00000, 0x10000, CRC(4b5b50eb) SHA1(fe2b820c214b3e967348b99ccff30a4bfe0251dc) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4356,7 +4356,7 @@ ROM_END
ROM_START( sc2drwho1p )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("dr-who-time-lord_dat_ac_ass.bin", 0x00000, 0x10000, CRC(5a467a44) SHA1(d5a3dcdf50e07e36187350072b5d82d620f8f1d8) )
+ ROM_LOAD("dr-who-time-lord_dat_ac_ass.bin", 0x00000, 0x10000, CRC(5a467a44) SHA1(d5a3dcdf50e07e36187350072b5d82d620f8f1d8) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4364,7 +4364,7 @@ ROM_END
ROM_START( sc2drwhop )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("dr-who-time-lord_dat_ss_20p_ass.bin", 0x00000, 0x10000, CRC(8ce06af9) SHA1(adb58507b2b6aae59857384748d59485f1739eaf) )
+ ROM_LOAD("dr-who-time-lord_dat_ss_20p_ass.bin", 0x00000, 0x10000, CRC(8ce06af9) SHA1(adb58507b2b6aae59857384748d59485f1739eaf) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4372,7 +4372,7 @@ ROM_END
ROM_START( sc2drwho1 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("dr-who-time-lord_std_ac_ass.bin", 0x00000, 0x10000, CRC(053313cc) SHA1(2a52b7edae0ce676255eb347bba17a2e48c1707a) )
+ ROM_LOAD("dr-who-time-lord_std_ac_ass.bin", 0x00000, 0x10000, CRC(053313cc) SHA1(2a52b7edae0ce676255eb347bba17a2e48c1707a) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4380,7 +4380,7 @@ ROM_END
ROM_START( sc2drwho2 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("dr-who-time-lord_std_var_20p_ass.bin", 0x00000, 0x10000, CRC(35f4e6ab) SHA1(5e5e35889adb7d3384aae663c667b0251d39aeee) )
+ ROM_LOAD("dr-who-time-lord_std_var_20p_ass.bin", 0x00000, 0x10000, CRC(35f4e6ab) SHA1(5e5e35889adb7d3384aae663c667b0251d39aeee) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4388,7 +4388,7 @@ ROM_END
ROM_START( sc2drwho4p )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_dat_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(e65717c2) SHA1(9b8db0bcac9fd996de29527440d6af3592102120) )
+ ROM_LOAD("time-lord_dat_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(e65717c2) SHA1(9b8db0bcac9fd996de29527440d6af3592102120) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4396,7 +4396,7 @@ ROM_END
ROM_START( sc2drwho7p )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_dat_ac_10pnd-20p-25p_ass.bin", 0x00000, 0x10000, CRC(9a27ac6d) SHA1(d1b0e85d41198c5d2cd1b492e53359a5dc1ac474) )
+ ROM_LOAD("time-lord_dat_ac_10pnd-20p-25p_ass.bin", 0x00000, 0x10000, CRC(9a27ac6d) SHA1(d1b0e85d41198c5d2cd1b492e53359a5dc1ac474) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4404,7 +4404,7 @@ ROM_END
ROM_START( sc2drwho5p )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_dat_ac_8pnd-20p_ass.bin", 0x00000, 0x10000, CRC(b6629b5e) SHA1(d20085b4ab9a0786063eb063f7d1df2a6814f40c) )
+ ROM_LOAD("time-lord_dat_ac_8pnd-20p_ass.bin", 0x00000, 0x10000, CRC(b6629b5e) SHA1(d20085b4ab9a0786063eb063f7d1df2a6814f40c) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4412,7 +4412,7 @@ ROM_END
ROM_START( sc2drwho6p )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_dat_ar_10p_ass.bin", 0x00000, 0x10000, CRC(04653c3b) SHA1(0c23f939103772fac628342074de820ec6b472ce) )
+ ROM_LOAD("time-lord_dat_ar_10p_ass.bin", 0x00000, 0x10000, CRC(04653c3b) SHA1(0c23f939103772fac628342074de820ec6b472ce) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4420,7 +4420,7 @@ ROM_END
ROM_START( sc2drwho3p )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_dat_ar_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(40aaa98f) SHA1(80705e24e419558d8a7b1f886bfc2b3ce5465446) )
+ ROM_LOAD("time-lord_dat_ar_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(40aaa98f) SHA1(80705e24e419558d8a7b1f886bfc2b3ce5465446) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4428,7 +4428,7 @@ ROM_END
ROM_START( sc2drwho2p )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_dat_var_no-jp-spin_ass.bin", 0x00000, 0x10000, CRC(bf087547) SHA1(f4b7289a76e814af5fb3affc360a9ac659c09bbe) )
+ ROM_LOAD("time-lord_dat_var_no-jp-spin_ass.bin", 0x00000, 0x10000, CRC(bf087547) SHA1(f4b7289a76e814af5fb3affc360a9ac659c09bbe) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4436,7 +4436,7 @@ ROM_END
ROM_START( sc2drwho4 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_std_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(278f559e) SHA1(d4396df02a5e24b3684c26fcaa57c8e499789332) )
+ ROM_LOAD("time-lord_std_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(278f559e) SHA1(d4396df02a5e24b3684c26fcaa57c8e499789332) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4444,7 +4444,7 @@ ROM_END
ROM_START( sc2drwho5 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_std_ac_8pnd-20p_ass.bin", 0x00000, 0x10000, CRC(0b2850c8) SHA1(5fac64f35a6b6158d8c15f41e82574768b1c3617) )
+ ROM_LOAD("time-lord_std_ac_8pnd-20p_ass.bin", 0x00000, 0x10000, CRC(0b2850c8) SHA1(5fac64f35a6b6158d8c15f41e82574768b1c3617) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4452,7 +4452,7 @@ ROM_END
ROM_START( sc2drwho6 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_std_ar_10p_ass.bin", 0x00000, 0x10000, CRC(f716a21d) SHA1(340df4cdea3309bfebeba7c419057f1bf5ed5024) )
+ ROM_LOAD("time-lord_std_ar_10p_ass.bin", 0x00000, 0x10000, CRC(f716a21d) SHA1(340df4cdea3309bfebeba7c419057f1bf5ed5024) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4460,7 +4460,7 @@ ROM_END
ROM_START( sc2drwho3 )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("time-lord_std_ar_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(8dd0f908) SHA1(2eca748874cc061f9a8145b081d2c097a40e1e47) )
+ ROM_LOAD("time-lord_std_ar_20p_uk94_ass.bin", 0x00000, 0x10000, CRC(8dd0f908) SHA1(2eca748874cc061f9a8145b081d2c097a40e1e47) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4468,7 +4468,7 @@ ROM_END
ROM_START( sc2drwhodx )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("tmld5pa", 0x00000, 0x10000, CRC(b9ddfd0d) SHA1(915afd83eab330a0e70635c35f031f2041b9f5ad) )
+ ROM_LOAD("tmld5pa", 0x00000, 0x10000, CRC(b9ddfd0d) SHA1(915afd83eab330a0e70635c35f031f2041b9f5ad) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4502,7 +4502,7 @@ ROM_END
/* not encrypted, bootleg? */
ROM_START( sc2drwhou )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("drwho.bin", 0x00000, 0x10000, CRC(9e53a1f7) SHA1(60c6aa226c96678a6e487fbf0f32554fd85ebd66) )
+ ROM_LOAD("drwho.bin", 0x00000, 0x10000, CRC(9e53a1f7) SHA1(60c6aa226c96678a6e487fbf0f32554fd85ebd66) )
ROM_REGION( 0x80000, "upd", 0 )
ROM_LOAD("timelordsnd.bin", 0x00000, 0x80000, CRC(57fdaf3a) SHA1(f7cbaddb7f2ab8e1c7b17f187bab263e0dde463b))
@@ -4512,7 +4512,7 @@ ROM_END
ROM_START( sc2focus )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD("focus.bin", 0x00000, 0x10000, CRC(ddd1a21e) SHA1(cbb467b03642d6de37f6dc204b902f2d7e92230e))
+ ROM_LOAD("focus.bin", 0x00000, 0x10000, CRC(ddd1a21e) SHA1(cbb467b03642d6de37f6dc204b902f2d7e92230e))
ROM_REGION( 0x20000, "upd", 0 )
ROM_LOAD("focsound.bin", 0x00000, 0x20000, CRC(fce86700) SHA1(546680dd85234608c1b7e850bad3165400fd981c))
@@ -5098,7 +5098,7 @@ ROM_START( sc2luvv )
ROM_LOAD("95750808.bin", 0x00000, 0x10000, CRC(e6668fc7) SHA1(71dd412114c6386cba72e2b29ea07f2d99d14065))
ROM_REGION( 0x20000, "matrix", 0 )
- ROM_LOAD("95000584.p1", 0x00000, 0x10000, CRC(cfdd7bb2) SHA1(90086aaff743a7b2385488af1e8a126029113028))//mtx_ass.bin
+ ROM_LOAD("95000584.p1", 0x00000, 0x10000, CRC(cfdd7bb2) SHA1(90086aaff743a7b2385488af1e8a126029113028))//mtx_ass.bin
sc2_luvv_sound
ROM_END
@@ -7548,20 +7548,20 @@ ROM_END
#define GAME_FLAGS GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL
-GAMEL( 1993, qntoondo, qntoond, scorpion2_vid, qntoond, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Quintoon (Dutch, Game Card 95-750-136)", GAME_SUPPORTS_SAVE,layout_quintoon )
-GAMEL( 1993, quintoon, 0, scorpion2_vid, quintoon, bfm_sc2_state, quintoon, 0, "BFM", "Quintoon (UK, Game Card 95-750-206)", GAME_SUPPORTS_SAVE|GAME_IMPERFECT_SOUND,layout_quintoon ) //Current samples need verification
+GAMEL( 1993, qntoondo, qntoond, scorpion2_vid, qntoond, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Quintoon (Dutch, Game Card 95-750-136)", GAME_SUPPORTS_SAVE,layout_quintoon )
+GAMEL( 1993, quintoon, 0, scorpion2_vid, quintoon, bfm_sc2_state, quintoon, 0, "BFM", "Quintoon (UK, Game Card 95-750-206)", GAME_SUPPORTS_SAVE|GAME_IMPERFECT_SOUND,layout_quintoon ) //Current samples need verification
GAMEL( 1993, quintond, quintoon, scorpion2_vid, quintoon, bfm_sc2_state, quintoon, 0, "BFM", "Quintoon (UK, Game Card 95-751-206, Datapak)",GAME_SUPPORTS_SAVE|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING,layout_quintoon ) //Current samples need verification
-GAMEL( 1993, quintono, quintoon, scorpion2_vid, quintoon, bfm_sc2_state, quintoon, 0, "BFM", "Quintoon (UK, Game Card 95-750-203)", GAME_SUPPORTS_SAVE|GAME_IMPERFECT_SOUND,layout_quintoon ) //Current samples need verification
-GAMEL( 1993, qntoond, 0, scorpion2_vid, qntoond, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Quintoon (Dutch, Game Card 95-750-243)", GAME_SUPPORTS_SAVE,layout_quintoon )
-GAMEL( 1994, pokio, 0, scorpion2_vid, pokio, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Pokio (Dutch, Game Card 95-750-278)", GAME_SUPPORTS_SAVE,layout_pokio )
-GAMEL( 1995, slotsnl, 0, scorpion2_vid, slotsnl, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Slots (Dutch, Game Card 95-750-368)", GAME_SUPPORTS_SAVE,layout_slots )
-GAMEL( 1995, paradice, 0, scorpion2_vid, paradice, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Paradice (Dutch, Game Card 95-750-615)", GAME_SUPPORTS_SAVE,layout_paradice )
-GAMEL( 1996, pyramid, 0, scorpion2_vid, pyramid, bfm_sc2_state, pyramid, 0, "BFM/ELAM", "Pyramid (Dutch, Game Card 95-750-898)", GAME_SUPPORTS_SAVE,layout_pyramid )
-
-GAMEL( 1996, sltblgtk, 0, scorpion2_vid, sltblgtk, bfm_sc2_state, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Token, Game Card 95-750-943)", GAME_SUPPORTS_SAVE,layout_sltblgtk )
-GAMEL( 1996, sltblgpo, 0, scorpion2_vid, sltblgpo, bfm_sc2_state, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Cash, Game Card 95-750-938)", GAME_SUPPORTS_SAVE,layout_sltblgpo )
-GAMEL( 1996, sltblgp1, sltblgpo, scorpion2_vid, sltblgpo, bfm_sc2_state, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Cash, Game Card 95-752-008)", GAME_SUPPORTS_SAVE,layout_sltblgpo )
-GAMEL( 1997, gldncrwn, 0, scorpion2_vid, gldncrwn, bfm_sc2_state, gldncrwn, 0, "BFM/ELAM", "Golden Crown (Dutch, Game Card 95-752-011)", GAME_SUPPORTS_SAVE,layout_gldncrwn )
+GAMEL( 1993, quintono, quintoon, scorpion2_vid, quintoon, bfm_sc2_state, quintoon, 0, "BFM", "Quintoon (UK, Game Card 95-750-203)", GAME_SUPPORTS_SAVE|GAME_IMPERFECT_SOUND,layout_quintoon ) //Current samples need verification
+GAMEL( 1993, qntoond, 0, scorpion2_vid, qntoond, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Quintoon (Dutch, Game Card 95-750-243)", GAME_SUPPORTS_SAVE,layout_quintoon )
+GAMEL( 1994, pokio, 0, scorpion2_vid, pokio, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Pokio (Dutch, Game Card 95-750-278)", GAME_SUPPORTS_SAVE,layout_pokio )
+GAMEL( 1995, slotsnl, 0, scorpion2_vid, slotsnl, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Slots (Dutch, Game Card 95-750-368)", GAME_SUPPORTS_SAVE,layout_slots )
+GAMEL( 1995, paradice, 0, scorpion2_vid, paradice, bfm_sc2_state, adder_dutch,0, "BFM/ELAM", "Paradice (Dutch, Game Card 95-750-615)", GAME_SUPPORTS_SAVE,layout_paradice )
+GAMEL( 1996, pyramid, 0, scorpion2_vid, pyramid, bfm_sc2_state, pyramid, 0, "BFM/ELAM", "Pyramid (Dutch, Game Card 95-750-898)", GAME_SUPPORTS_SAVE,layout_pyramid )
+
+GAMEL( 1996, sltblgtk, 0, scorpion2_vid, sltblgtk, bfm_sc2_state, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Token, Game Card 95-750-943)", GAME_SUPPORTS_SAVE,layout_sltblgtk )
+GAMEL( 1996, sltblgpo, 0, scorpion2_vid, sltblgpo, bfm_sc2_state, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Cash, Game Card 95-750-938)", GAME_SUPPORTS_SAVE,layout_sltblgpo )
+GAMEL( 1996, sltblgp1, sltblgpo, scorpion2_vid, sltblgpo, bfm_sc2_state, sltsbelg, 0, "BFM/ELAM", "Slots (Belgian Cash, Game Card 95-752-008)", GAME_SUPPORTS_SAVE,layout_sltblgpo )
+GAMEL( 1997, gldncrwn, 0, scorpion2_vid, gldncrwn, bfm_sc2_state, gldncrwn, 0, "BFM/ELAM", "Golden Crown (Dutch, Game Card 95-752-011)", GAME_SUPPORTS_SAVE,layout_gldncrwn )
/* Non-Video */
@@ -7575,38 +7575,38 @@ GAMEL( 1997, gldncrwn, 0, scorpion2_vid, gldncrwn, bfm_sc2_state, gldncrwn,
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6305 DR WHO TIMELORD - 28-SEP-1994 11:14:58
-GAMEL( 1994, sc2drwho , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 1, UK, Single Site) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-288
-GAMEL( 1994, sc2drwhou , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwhon , 0, "BFM", "Dr.Who The Timelord (set 1, UK, Single Site) (Scorpion 2/3) (not encrypted)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-288 (unencrypted bootleg?)
-GAMEL( 1994, sc2drwhop , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 1, UK, Single Site Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-288
+GAMEL( 1994, sc2drwho , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 1, UK, Single Site) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-288
+GAMEL( 1994, sc2drwhou , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwhon , 0, "BFM", "Dr.Who The Timelord (set 1, UK, Single Site) (Scorpion 2/3) (not encrypted)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-288 (unencrypted bootleg?)
+GAMEL( 1994, sc2drwhop , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 1, UK, Single Site Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-288
// PROJECT NUMBER 6305 DR WHO TIMELORD IRISH ALL CASH - 28-SEP-1994 11:20:17
-GAMEL( 1994, sc2drwho1 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 2, UK, Arcade) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-290
-GAMEL( 1994, sc2drwho1p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 2, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-290
+GAMEL( 1994, sc2drwho1 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 2, UK, Arcade) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-290
+GAMEL( 1994, sc2drwho1p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 2, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-290
// PROJECT NUMBER 6305 DR WHO TIMELORD NO JP SPIN - 17-NOV-1994 09:34:50
-GAMEL( 1994, sc2drwho2 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 3, UK, no Jackpot spin) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-309
-GAMEL( 1994, sc2drwho2p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 3, UK, no Jackpot spin, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-309
+GAMEL( 1994, sc2drwho2 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 3, UK, no Jackpot spin) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-309
+GAMEL( 1994, sc2drwho2p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 3, UK, no Jackpot spin, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-309
// PROJECT NUMBER 6305 DR WHO TIMELORD ARCADE - 24-OCT-1995 16:12:44
-GAMEL( 1994, sc2drwho3 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 4, UK, Arcade) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-536
-GAMEL( 1994, sc2drwho3p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 4, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-536
+GAMEL( 1994, sc2drwho3 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 4, UK, Arcade) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-536
+GAMEL( 1994, sc2drwho3p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 4, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-536
// PROJECT NUMBER 6305 DR WHO TIMELORD 4/8 - 24-OCT-1995 16:14:30
-GAMEL( 1994, sc2drwho4 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 5, UK) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-535
-GAMEL( 1994, sc2drwho4p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 5, UK, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-535
+GAMEL( 1994, sc2drwho4 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 5, UK) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-535
+GAMEL( 1994, sc2drwho4p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 5, UK, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-535
// PROJECT NUMBER 6305 DR WHO TIMELORD IRISH ALL CASH 4/8 - 25-OCT-1995 09:50:12
-GAMEL( 1994, sc2drwho5 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 6, UK, Arcade, 8GBP Jackpot) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-531
-GAMEL( 1994, sc2drwho5p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 6, UK, Arcade, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-531
+GAMEL( 1994, sc2drwho5 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 6, UK, Arcade, 8GBP Jackpot) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-531
+GAMEL( 1994, sc2drwho5p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 6, UK, Arcade, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-531
// PROJECT NUMBER 6305 TIMELORD ARCADE 10P PLAY 4/8 - 25-OCT-1995 09:53:06
-GAMEL( 1994, sc2drwho6 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 7, UK, Arcade) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-533
-GAMEL( 1994, sc2drwho6p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 7, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-533
+GAMEL( 1994, sc2drwho6 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 7, UK, Arcade) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-533
+GAMEL( 1994, sc2drwho6p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 7, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-533
// PROJECT NUMBER 6305 DR WHO TIMELORD 10 POUNDS - 28-MAR-1996 13:21:58
-GAMEL( 1994, sc2drwho7 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 8, UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-661
-GAMEL( 1994, sc2drwho7p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 8, UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-661
+GAMEL( 1994, sc2drwho7 , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 8, UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-661
+GAMEL( 1994, sc2drwho7p , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord (set 8, UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-751-661
// PROJECT NUMBER 6419 DR WHO TIMELORD DELUXE - 8-MAR-1995 15:37:53
-GAMEL( 1994, sc2drwhodx , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord Deluxe (set 1) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-370
+GAMEL( 1994, sc2drwhodx , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord Deluxe (set 1) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-370
// PROJECT NUMBER 6419 TIMELORD DELUXE MULTI-SITE ALL CASH - 4-DEC-1995 10:48:34
-GAMEL( 1994, sc2drwhodx1, sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord Deluxe (set 2) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-572
+GAMEL( 1994, sc2drwhodx1, sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Dr.Who The Timelord Deluxe (set 2) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL,layout_drwho) // GAME No 95-750-572
// PROJECT NUMBER 6999 TIMELORD AT PLAYMAKER 5P/10p 500P - 15-SEP-1997 10:02:47
-GAMEL( 1994, sc2drwhomz , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Dr.Who The Timelord (Mazooma) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL | GAME_NOT_WORKING,layout_drwho) // GAME No TLVMAZ12_N, error 99
+GAMEL( 1994, sc2drwhomz , sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Dr.Who The Timelord (Mazooma) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL | GAME_NOT_WORKING,layout_drwho) // GAME No TLVMAZ12_N, error 99
// PROJECT NUMBER TLP12 TIMELORD AT PLAYMAKER 5P/10p 500P - 15-SEP-1997 10:03:49
-GAMEL( 1994, sc2drwhomzp, sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Dr.Who The Timelord (Mazooma, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL | GAME_NOT_WORKING,layout_drwho) // GAME No TLVMAZ12_P, error 99
+GAMEL( 1994, sc2drwhomzp, sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Dr.Who The Timelord (Mazooma, Protocol) (Scorpion 2/3)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL | GAME_NOT_WORKING,layout_drwho) // GAME No TLVMAZ12_P, error 99
/********************************************************************************************************************************************************************************************************************
The Big Breakfast
@@ -7614,23 +7614,23 @@ GAMEL( 1994, sc2drwhomzp, sc2drwho , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 640X BIG BREAKFAST VAR STAKE/JACKPOT - 16-OCT-1995 14:57:47
-GAME( 1994, sc2brkfs1 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 1 UK, Single Site) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-523
-GAME( 1994, sc2brkfs1p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 1 UK, Single Site, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-523
+GAME( 1994, sc2brkfs1 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 1 UK, Single Site) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-523
+GAME( 1994, sc2brkfs1p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 1 UK, Single Site, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-523
// PROJECT NUMBER 6514 BIG BREAKFAST ARCADE VAR STAKE/JACKPOT - 16-OCT-1995 14:59:52
-GAME( 1994, sc2brkfs , 0 , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-524
-GAME( 1994, sc2brkfsp , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-524
+GAME( 1994, sc2brkfs , 0 , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-524
+GAME( 1994, sc2brkfsp , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-524
// PROJECT NUMBER 640X BIG BREAKFAST VAR STAKE #6 CASH JACKPOT - 20-OCT-1995 11:59:24
-GAME( 1994, sc2brkfs3 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-517
-GAME( 1994, sc2brkfs6 , sc2brkfs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Big Breakfast (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-517
+GAME( 1994, sc2brkfs3 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-517
+GAME( 1994, sc2brkfs6 , sc2brkfs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Big Breakfast (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-517
// PROJECT NUMBER 6514 BIG BREAKFAST VAR STAKE #8 CASH JACKPOT - 12-JAN-1996 12:52:36
-GAME( 1994, sc2brkfs2 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 4 UK, Arcade, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-604
-GAME( 1994, sc2brkfs3p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 4 UK, Arcade, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-604
+GAME( 1994, sc2brkfs2 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 4 UK, Arcade, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-604
+GAME( 1994, sc2brkfs3p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 4 UK, Arcade, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-604
// PROJECT NUMBER 6514 BIG BREAKFAST VAR STAKE !10 CASH JACKPOT - 16-MAY-1996 11:52:49
-GAME( 1994, sc2brkfs4 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 5 UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-709
-GAME( 1994, sc2brkfs4p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 5 UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-709
+GAME( 1994, sc2brkfs4 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 5 UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-709
+GAME( 1994, sc2brkfs4p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 5 UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-709
// PROJECT NUMBER 6514 BIG BREAKFAST WHITBREAD #10 ALL CASH 20P PLAY - 16-MAY-1996 12:16:31
-GAME( 1994, sc2brkfs5 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 6 UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-710
-GAME( 1994, sc2brkfs5p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 6 UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-710
+GAME( 1994, sc2brkfs5 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 6 UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-710
+GAME( 1994, sc2brkfs5p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast (set 6 UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-710
/********************************************************************************************************************************************************************************************************************
@@ -7639,42 +7639,42 @@ GAME( 1994, sc2brkfs5p , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkf
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6621 BIG BREAKFAST CASINO GALA TOKEN - 19-AUG-1997 09:21:25
-GAME( 1994, sc2brkfsm , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast Casino (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-986
+GAME( 1994, sc2brkfsm , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "The Big Breakfast Casino (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-986
// PROJECT NUMBER 7013 BIG BREAKFAST CASINO AT MAZOOMA 5P - 23-JAN-1998 11:29:13
-GAME( 1994, sc2brkfsm1 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM/Mazooma", "The Big Breakfast Casino (Mazooma, set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No BBCVM51
+GAME( 1994, sc2brkfsm1 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM/Mazooma", "The Big Breakfast Casino (Mazooma, set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No BBCVM51
// PROJECT NUMBER 7013 BIG BREAKFAST CASINO AT MAZOOMA 5P - 14-MAY-1998 10:05:23
-GAME( 1994, sc2brkfsm2 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM/Mazooma", "The Big Breakfast Casino (Mazooma, set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No BBCVM52
+GAME( 1994, sc2brkfsm2 , sc2brkfs , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM/Mazooma", "The Big Breakfast Casino (Mazooma, set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No BBCVM52
/********************************************************************************************************************************************************************************************************************
Match Of The Day
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6400 MATCH OF THE DAY IRISH ALL CASH - 15-MAY-1995 14:47:45
-GAME( 199?, sc2motd9 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 1, Irish) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-413
+GAME( 199?, sc2motd9 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 1, Irish) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-413
// PROJECT NUMBER 6560 MATCH OF THE DAY STANDARD S+P #4/#8 - 6-OCT-1995 10:59:44
-GAME( 199?, sc2motd5 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 2, UK, Single Site) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-515
-GAME( 199?, sc2motd5p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 2, UK, Single Site, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-515
+GAME( 199?, sc2motd5 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 2, UK, Single Site) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-515
+GAME( 199?, sc2motd5p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 2, UK, Single Site, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-515
// PROJECT NUMBER 6560 MATCH OF THE DAY ARCADE S+P #4/#8 - 6-OCT-1995 11:37:00
-GAME( 199?, sc2motd4 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 3, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-513
-GAME( 199?, sc2motd4p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 3, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-513
+GAME( 199?, sc2motd4 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 3, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-513
+GAME( 199?, sc2motd4p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 3, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-513
// PROJECT NUMBER 6560 MATCH OF THE DAY STANDARD S+P #4/#8 IRISH ALL CASH - 6-OCT-1995 12:20:16
-GAME( 199?, sc2motd6 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 4, Irish, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-514
-GAME( 199?, sc2motd6p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 4, Irish, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-514
+GAME( 199?, sc2motd6 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 4, Irish, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-514
+GAME( 199?, sc2motd6p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 4, Irish, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-514
// PROJECT NUMBER 6587 (6311) MATCH OF THE DAY STANDARD S+P #4/#8 - 14-NOV-1995 13:40:49
-GAME( 199?, sc2motd7 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-559
-GAME( 199?, sc2motd8p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 5, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-559
+GAME( 199?, sc2motd7 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-559
+GAME( 199?, sc2motd8p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 5, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-559
// PROJECT NUMBER 6587 (6311) MATCH OF THE DAY ARCADE S+P #4/#8 - 14-NOV-1995 13:42:06
-GAME( 199?, sc2motd3 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-560
-GAME( 199?, sc2motd3p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 6, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-560
+GAME( 199?, sc2motd3 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-560
+GAME( 199?, sc2motd3p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 6, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-560
// PROJECT NUMBER 6770 MATCH OF THE DAY STANDARD #10 ALL CASH - 11-APR-1996 15:05:22
-GAME( 199?, sc2motd1 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 7, UK, 10GBP Jackpot, 1st Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-671
-GAME( 199?, sc2motd1p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 7, UK, 10GBP Jackpot, 1st Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-671
+GAME( 199?, sc2motd1 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 7, UK, 10GBP Jackpot, 1st Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-671
+GAME( 199?, sc2motd1p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 7, UK, 10GBP Jackpot, 1st Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-671
// PROJECT NUMBER 6770 MATCH OF THE DAY WHITBREAD #10 ALL CASH - 11-APR-1996 15:08:33
-GAME( 199?, sc2motd2 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 8, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-672
-GAME( 199?, sc2motd2p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 8, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-672
+GAME( 199?, sc2motd2 , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 8, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-672
+GAME( 199?, sc2motd2p , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 8, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-672
// PROJECT NUMBER 6798 MATCH OF THE DAY STANDARD #10 ALL CASH - 14-AUG-1996 11:54:58
-GAME( 199?, sc2motd , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 9, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-852
-GAME( 199?, sc2motdp , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 9, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-852
+GAME( 199?, sc2motd , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 9, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-852
+GAME( 199?, sc2motdp , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day (Bellfruit) (set 9, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-852
/********************************************************************************************************************************************************************************************************************
Match Of The Day - Road To Wembley
@@ -7683,30 +7683,30 @@ GAME( 199?, sc2motdp , sc2motd , scorpion2 , drwho , bfm_sc2_state, drwho ,
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6401 MOTD ROAD TO WEMBLEY 16RM GAME No 95-750-335 - 9-JAN-1995 12:26:53
-GAME( 199?, sc2wembl7a , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 1, UK, 8GBP Jackpot, 16RM motor) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2wembl7a , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 1, UK, 8GBP Jackpot, 16RM motor) (Scorpion 2/3)", GAME_FLAGS)
// PROJECT NUMBER 6555 ROAD TO WEMBLEY 16RM #8 - 2-OCT-1995 14:53:30
-GAME( 199?, sc2wembl5a , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 2, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-498
-GAME( 199?, sc2wembl5ap , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 2, UK, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-498
+GAME( 199?, sc2wembl5a , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 2, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-498
+GAME( 199?, sc2wembl5ap , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 2, UK, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-498
// PROJECT NUMBER 6555 ROAD TO WEMBLEY 16RM 10P VERSION #8 - 2-OCT-1995 15:09:05
-GAME( 199?, sc2wembl8 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-499
-GAME( 199?, sc2wembl4p , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-499
+GAME( 199?, sc2wembl8 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-499
+GAME( 199?, sc2wembl4p , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-499
// PROJECT NUMBER 6555 ROAD TO WEMBLEY ARCADE 16RM #8 - 2-OCT-1995 15:12:53
-GAME( 199?, sc2wembl9 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 4, Arcade, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-500
-GAME( 199?, sc2wembl6ap , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 4, Arcade, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-500
+GAME( 199?, sc2wembl9 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 4, Arcade, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-500
+GAME( 199?, sc2wembl6ap , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 4, Arcade, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-500
// PROJECT NUMBER 6555 ROAD TO WEMBLEY IRISH ALL CASH #8 16RM - 2-OCT-1995 15:14:41
-GAME( 199?, sc2wembl10 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 5, Irish, 8GBP Jackpot, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-501
-GAME( 199?, sc2wembl7ap , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 5, Irish, 8GBP Jackpot, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-501
+GAME( 199?, sc2wembl10 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 5, Irish, 8GBP Jackpot, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-501
+GAME( 199?, sc2wembl7ap , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 5, Irish, 8GBP Jackpot, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-501
// PROJECT NUMBER 6555 ROAD TO WEMBLEY 15RM #8 - 18-OCT-1995 11:46:51
-GAME( 199?, sc2wembl1 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 6, UK, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-525
-GAME( 199?, sc2wembl1p , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 6, UK, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-525
+GAME( 199?, sc2wembl1 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 6, UK, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-525
+GAME( 199?, sc2wembl1p , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 6, UK, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-525
// PROJECT NUMBER 6781 ROAD TO WEMBLEY #10 ALL CASH 16RM - 15-MAR-1996 12:52:04
-GAME( 199?, sc2wembl2 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 7, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-653
-GAME( 199?, sc2wembl2p , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 7, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-653
+GAME( 199?, sc2wembl2 , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 7, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-653
+GAME( 199?, sc2wembl2p , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 7, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-653
// PROJECT NUMBER 6781 ROAD TO WEMBLEY #10 ALL CASH 15RM - 28-MAR-1996 14:01:40
-GAME( 199?, sc2wembl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 8, UK, 10GBP Jackpot, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-659
-GAME( 199?, sc2wemblp , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 8, UK, 10GBP Jackpot, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-659
+GAME( 199?, sc2wembl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 8, UK, 10GBP Jackpot, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-659
+GAME( 199?, sc2wemblp , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Match Of The Day - Road To Wembley (Bellfruit) (set 8, UK, 10GBP Jackpot, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-659
// PROJECT NUMBER 7005 ROAD TO WEMBLEY !5 ALL CASH 16RM GAME No RWVMAZ12_N - 22-OCT-1997 20:03:46
-GAME( 199?, sc2wemblm , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Match Of The Day - Road To Wembley (Bellfruit/Mazooma) (Scorpion 2/3)", GAME_FLAGS) // error 99
+GAME( 199?, sc2wemblm , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Match Of The Day - Road To Wembley (Bellfruit/Mazooma) (Scorpion 2/3)", GAME_FLAGS) // error 99
/********************************************************************************************************************************************************************************************************************
@@ -7715,27 +7715,27 @@ GAME( 199?, sc2wemblm , sc2wembl , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6431 THE GAME SHOW - 28-FEB-1995 11:51:15
-GAME( 199?, sc2gsclb5 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-362
+GAME( 199?, sc2gsclb5 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-362
// PROJECT NUMBER PR6431 THE GAME SHOW - 9-JUN-1995 12:16:14
-GAME( 199?, sc2gsclb7 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-424
+GAME( 199?, sc2gsclb7 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-424
// PROJECT NUMBER PR6431 THE GAME SHOW - 14-DEC-1995 16:10:08
-GAME( 199?, sc2gsclb2 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 3, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-587
-GAME( 199?, sc2gsclb2p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 3, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-587
+GAME( 199?, sc2gsclb2 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 3, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-587
+GAME( 199?, sc2gsclb2p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 3, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-587
// PROJECT NUMBER PR6431 THE GAME SHOW FIXED 65% - 23-JAN-1996 11:56:38
-GAME( 199?, sc2gsclb , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 4, UK, Arcade, p65) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-588
-GAME( 199?, sc2gsclbp , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 4, UK, Arcade, p65, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-588
+GAME( 199?, sc2gsclb , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 4, UK, Arcade, p65) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-588
+GAME( 199?, sc2gsclbp , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 4, UK, Arcade, p65, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-588
// PROJECT NUMBER PR6431 THE GAME SHOW SEALINK VERSION - 23-JAN-1996 11:58:58
-GAME( 199?, sc2gsclb3 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 5, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-589
-GAME( 199?, sc2gsclb3p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 5, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-589
+GAME( 199?, sc2gsclb3 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 5, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-589
+GAME( 199?, sc2gsclb3p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 5, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-589
// PROJECT NUMBER PR6431 THE GAME SHOW FAST FILL CASHPOT - 23-JAN-1996 12:17:04
-GAME( 199?, sc2gsclb4 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 6, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-590
-GAME( 199?, sc2gsclb4p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 6, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-590
+GAME( 199?, sc2gsclb4 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 6, UK, Arcade) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-590
+GAME( 199?, sc2gsclb4p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 6, UK, Arcade, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-590
// PROJECT NUMBER PR6575 THE GAME SHOW FIXED 65% 25P PLAY - 11-APR-1996 14:46:58
-GAME( 199?, sc2gsclb1 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 7, UK, Arcade, 250GBP Jackpot, p65) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-667
-GAME( 199?, sc2gsclb1p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 7, UK, Arcade, 250GBP Jackpot, p65, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-667
+GAME( 199?, sc2gsclb1 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 7, UK, Arcade, 250GBP Jackpot, p65) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-667
+GAME( 199?, sc2gsclb1p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 7, UK, Arcade, 250GBP Jackpot, p65, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-667
// PROJECT NUMBER PR6575 THE GAME SHOW 25P PLAY - 20-AUG-1996 10:03:25
-GAME( 199?, sc2gsclb6 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-844
-GAME( 199?, sc2gsclb6p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 8, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-844
+GAME( 199?, sc2gsclb6 , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-844
+GAME( 199?, sc2gsclb6p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Game Show Club (Bellfruit) (set 8, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-844
/********************************************************************************************************************************************************************************************************************
@@ -7743,37 +7743,37 @@ GAME( 199?, sc2gsclb6p , sc2gsclb , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT PR6231 CLUB COPS AND ROBBERS - 20-JUL-1993 15:15:32
-GAME( 199?, sc2copcl11 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-118
+GAME( 199?, sc2copcl11 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-118
// PROJECT PR6231 CLUB COPS AND ROBBERS 150 POUND JACKPOT - 16-NOV-1993 12:34:10
-GAME( 199?, sc2copcl1 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-154
-GAME( 199?, sc2copcl1p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-154
+GAME( 199?, sc2copcl1 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-154
+GAME( 199?, sc2copcl1p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-154
// PROJECT NUMBER PR6231 CLUB COPS AND ROBBERS FIXED 65% - 16-NOV-1993 12:35:38
-GAME( 199?, sc2copcl4 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-156
+GAME( 199?, sc2copcl4 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-156
// PROJECT PR6231 CLUB COPS AND ROBBERS - 16-NOV-1993 12:39:31
-GAME( 199?, sc2copcl6 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-153
-GAME( 199?, sc2copcl6p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-153
+GAME( 199?, sc2copcl6 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-153
+GAME( 199?, sc2copcl6p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-153
// PROJECT PR6231 CLUB COPS AND ROBBERS GENEROUS 5P - 20-JAN-1994 11:13:45
-GAME( 199?, sc2copcl7 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-190
+GAME( 199?, sc2copcl7 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-190
// PROJECT PR6231 CLUB COPS AND ROBBERS - 4-AUG-1994 16:23:21
-GAME( 199?, sc2copcl10 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-268
+GAME( 199?, sc2copcl10 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-268
// PROJECT PR6231 CLUB COPS AND ROBBERS SEALINK VERSION - 22-MAY-1995 11:47:58
-GAME( 199?, sc2copcl9 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 7, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-409
-GAME( 199?, sc2copcl9p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 7, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-409
+GAME( 199?, sc2copcl9 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 7, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-409
+GAME( 199?, sc2copcl9p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 7, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-409
// PROJECT NUMBER 6231 CLUB COPS AND ROBBERS GENEROUS 5P NPO - 2-FEB-1996 12:39:22
-GAME( 199?, sc2copcl8 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-628
-GAME( 199?, sc2copcl8p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 8, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-628
+GAME( 199?, sc2copcl8 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-628
+GAME( 199?, sc2copcl8p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 8, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-628
// PROJECT NUMBER PR6231 CLUB COPS AND ROBBERS 25P/#250 - 2-SEP-1996 17:17:50
-GAME( 199?, sc2copcl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 9, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-859
-GAME( 199?, sc2copclp , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 9, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-859
+GAME( 199?, sc2copcl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 9, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-859
+GAME( 199?, sc2copclp , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 9, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-859
// PROJECT NUMBER PR6231 CLUB COPS AND ROBBERS 20P/#250 - 2-SEP-1996 17:26:44
-GAME( 199?, sc2copcl2 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 10, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-858
-GAME( 199?, sc2copcl12 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, prom , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 10, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-858
+GAME( 199?, sc2copcl2 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 10, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-858
+GAME( 199?, sc2copcl12 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, prom , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 10, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-858
// PROJECT PR6231 CLUB COPS AND ROBBERS NPO 63% SEALINK VERSION - 5-JAN-1998 11:53:49
-GAME( 199?, sc2copcl5 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 11, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-752-015
-GAME( 199?, sc2copcl11p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 11, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-753-015
+GAME( 199?, sc2copcl5 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 11, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-752-015
+GAME( 199?, sc2copcl11p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 11, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-753-015
// PROJECT PR6231 CLUB COPS AND ROBBERS NPO 67% SEALINK VERSION - 5-JAN-1998 11:56:01
-GAME( 199?, sc2copcl3 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 12, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-752-014
-GAME( 199?, sc2copcl3p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 12, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-753-014
+GAME( 199?, sc2copcl3 , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 12, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-752-014
+GAME( 199?, sc2copcl3p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cops 'n' Robbers Club (Bellfruit) (set 12, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-753-014
/********************************************************************************************************************************************************************************************************************
@@ -7781,13 +7781,13 @@ GAME( 199?, sc2copcl3p , sc2copcl , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6625 SUPER BAR SEVEN CASINO ALL CASH - 22-AUG-1996 16:22:26
-GAME( 199?, sc2cb71 , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 1, UK, All Cash) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-853
+GAME( 199?, sc2cb71 , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 1, UK, All Cash) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-853
// PROJECT NUMBER 6625 SUPER BAR SEVEN CASINO ALL CASH - 7-OCT-1996 11:08:33
-GAME( 199?, sc2cb72 , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-872
-GAME( 199?, sc2cb72p , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-872
+GAME( 199?, sc2cb72 , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-872
+GAME( 199?, sc2cb72p , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-872
// PROJECT NUMBER 6625 SUPER BAR SEVEN CASINO NEW STATS - 8-MAY-1997 11:17:30
-GAME( 199?, sc2cb7 , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-960
-GAME( 199?, sc2cb7p , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-960
+GAME( 199?, sc2cb7 , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-960
+GAME( 199?, sc2cb7p , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Bar 7 Casino (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-960
/********************************************************************************************************************************************************************************************************************
@@ -7795,42 +7795,42 @@ GAME( 199?, sc2cb7p , sc2cb7 , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6304 DELS MILLIONS - 6-APR-1994 09:57:37
-GAME( 199?, sc2dels6 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-221
+GAME( 199?, sc2dels6 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-221
// PROJECT NUMBER 6304 DELS MILLIONS ARCADE - 4-AUG-1994 10:28:31
-GAME( 199?, sc2dels7 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-262
+GAME( 199?, sc2dels7 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-262
// PROJECT NUMBER 6304 DELS MILLIONS ALL CASH - 2-SEP-1994 11:16:44
-GAME( 199?, sc2dels3 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 3, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-284
-GAME( 199?, sc2dels3p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 3, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-284
+GAME( 199?, sc2dels3 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 3, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-284
+GAME( 199?, sc2dels3p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 3, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-284
// PROJECT NUMBER 6304 DELS MILLIONS ARCADE DELUXE - 2-MAR-1995 09:13:57
-GAME( 199?, sc2delsd , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 4, Deluxe) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-365
+GAME( 199?, sc2delsd , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 4, Deluxe) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-365
// PROJECT NUMBER 6566 DELS MILLIONS S&P #8 - 31-OCT-1995 15:17:16
-GAME( 199?, sc2dels5 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-541
-GAME( 199?, sc2dels9 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 5, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-541
+GAME( 199?, sc2dels5 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-541
+GAME( 199?, sc2dels9 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 5, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-541
// PROJECT NUMBER 6566 DELS MILLIONS S&P #8 ARCADE - 31-OCT-1995 16:09:31
-GAME( 199?, sc2dels4 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-542
-GAME( 199?, sc2dels4p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 6, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-542
+GAME( 199?, sc2dels4 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-542
+GAME( 199?, sc2dels4p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 6, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-542
// PROJECT NUMBER 6566 DELS MILLIONS S&P #8 ALL CASH - 11-APR-1996 14:29:24
-GAME( 199?, sc2dels2 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 7, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-670
-GAME( 199?, sc2dels2p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 7, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-670
+GAME( 199?, sc2dels2 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 7, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-670
+GAME( 199?, sc2dels2p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 7, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-670
// PROJECT NUMBER 6566 DELS MILLIONS !10 ALL CASH - 11-APR-1996 14:32:53
-GAME( 199?, sc2dels8 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-669
+GAME( 199?, sc2dels8 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-669
// PROJECT NUMBER 6566 DELS MILLIONS !10 ALL CASH - 10-JUL-1996 08:00:19
-GAME( 199?, sc2dels , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 9, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-821
-GAME( 199?, sc2delsp , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 9, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-821
+GAME( 199?, sc2dels , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 9, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-821
+GAME( 199?, sc2delsp , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 9, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-821
// PROJECT NUMBER 6566 DELS MILLIONS !10 WHITBREAD - 10-JUL-1996 08:02:38
-GAME( 199?, sc2dels1 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 10, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-820
-GAME( 199?, sc2dels1p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 10, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-820
+GAME( 199?, sc2dels1 , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 10, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-820
+GAME( 199?, sc2dels1p , sc2dels , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Del's Millions (Bellfruit) (set 10, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-820
// the Mazooma versioning is different, N/P should be protocol / non-protocol, but the builds are minutes apart, so 11/12/13/14 can't really be version numbers
// PROJECT NUMBER P7003 DELS MILLIONS !5 ALL CASH
-GAME( 199?, sc2delsm , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ11_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ11_N - 15-SEP-1997 11:52:00
-GAME( 199?, sc2delsm2 , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ11_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ11_P - 15-SEP-1997 11:53:06
-GAME( 199?, sc2delsmp , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ12_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ12_N - 15-SEP-1997 11:54:08
-GAME( 199?, sc2delsm2p , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ12_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ12_P - 15-SEP-1997 11:55:11
-GAME( 199?, sc2delsm1 , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ13_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ13_N - 15-SEP-1997 11:56:15
-GAME( 199?, sc2delsm3 , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ13_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ13_P - 15-SEP-1997 11:57:17
-GAME( 199?, sc2delsm1p , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ14_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ14_N - 15-SEP-1997 11:58:21
-GAME( 199?, sc2delsm3p , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ14_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ14_P - 15-SEP-1997 11:59:25
+GAME( 199?, sc2delsm , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ11_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ11_N - 15-SEP-1997 11:52:00
+GAME( 199?, sc2delsm2 , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ11_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ11_P - 15-SEP-1997 11:53:06
+GAME( 199?, sc2delsmp , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ12_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ12_N - 15-SEP-1997 11:54:08
+GAME( 199?, sc2delsm2p , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ12_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ12_P - 15-SEP-1997 11:55:11
+GAME( 199?, sc2delsm1 , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ13_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ13_N - 15-SEP-1997 11:56:15
+GAME( 199?, sc2delsm3 , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ13_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ13_P - 15-SEP-1997 11:57:17
+GAME( 199?, sc2delsm1p , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ14_N) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ14_N - 15-SEP-1997 11:58:21
+GAME( 199?, sc2delsm3p , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Del's Millions (Bellfruit/Mazooma) (DMVMAZ14_P) (Scorpion 2/3)", GAME_FLAGS) // GAME No DMVMAZ14_P - 15-SEP-1997 11:59:25
/********************************************************************************************************************************************************************************************************************
@@ -7838,35 +7838,35 @@ GAME( 199?, sc2delsm3p , sc2delsm , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6402 DOWN TOWN 16RM - 12-JAN-1995 09:31:41
-GAME( 199?, sc2downt6 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 1, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-337
+GAME( 199?, sc2downt6 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 1, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-337
// PROJECT NUMBER 6402 DOWN TOWN IRISH ALL CASH 16RM - 7-FEB-1995 16:45:43
-GAME( 199?, sc2downt7 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 2, Irish, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-354
+GAME( 199?, sc2downt7 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 2, Irish, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-354
// PROJECT NUMBER 6558 DOWN TOWN 16RM #8 - 17-OCT-1995 17:46:53
-GAME( 199?, sc2downt8a , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 3, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-519
-GAME( 199?, sc2downt8ap , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 3, UK, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-519
+GAME( 199?, sc2downt8a , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 3, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-519
+GAME( 199?, sc2downt8ap , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 3, UK, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-519
// PROJECT NUMBER 6558 DOWN TOWN ARCADE 16RM #8 - 17-OCT-1995 17:59:15
-GAME( 199?, sc2downt1 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 4, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-520
-GAME( 199?, sc2downt1p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 4, UK, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-520
+GAME( 199?, sc2downt1 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 4, UK, 16RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-520
+GAME( 199?, sc2downt1p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 4, UK, 16RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-520
// PROJECT NUMBER 6558 DOWN TOWN ALL CASH #8 - 10-NOV-1995 09:56:29
-GAME( 199?, sc2downt5 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-510
+GAME( 199?, sc2downt5 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-510
// PROJECT NUMBER 6558 DOWN TOWN #8 - 2-FEB-1996 10:36:24
-GAME( 199?, sc2downt2 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-624
-GAME( 199?, sc2downtp , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 6, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-624
+GAME( 199?, sc2downt2 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 6, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-624
+GAME( 199?, sc2downtp , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 6, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-624
// PROJECT NUMBER 6558 DOWN TOWN ARCADE #8 - 2-FEB-1996 10:38:03
-GAME( 199?, sc2downt , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 7, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-625
-GAME( 199?, sc2downt2p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 7, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-625
+GAME( 199?, sc2downt , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 7, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-625
+GAME( 199?, sc2downt2p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 7, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-625
// PROJECT NUMBER 6558 DOWN TOWN ALL CASH !10 - 29-MAY-1996 12:37:51
-GAME( 199?, sc2downt3a , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-733
-GAME( 199?, sc2downt3ap , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 8, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-733
+GAME( 199?, sc2downt3a , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 8, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-733
+GAME( 199?, sc2downt3ap , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 8, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-733
// PROJECT NUMBER 6558 DOWN TOWN WHITBREAD !10 - 29-MAY-1996 12:39:25
-GAME( 199?, sc2downt4a , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 9, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-734
-GAME( 199?, sc2downt4ap , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 9, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-734
+GAME( 199?, sc2downt4a , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 9, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-734
+GAME( 199?, sc2downt4ap , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 9, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-734
// PROJECT NUMBER 6782 DOWN TOWN WHITBREAD !10 15RM - 18-JUN-1996 12:01:0
-GAME( 199?, sc2downt4 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 10, UK, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-780
-GAME( 199?, sc2downt4p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 10, UK, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-780
+GAME( 199?, sc2downt4 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 10, UK, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-780
+GAME( 199?, sc2downt4p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 10, UK, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-780
// PROJECT NUMBER 6782 DOWN TOWN ALL CASH !10 15RM - 18-JUN-1996 14:56:33
-GAME( 199?, sc2downt3 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 11, UK, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-782
-GAME( 199?, sc2downt3p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 11, UK, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-782
+GAME( 199?, sc2downt3 , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 11, UK, 15RM motor) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-782
+GAME( 199?, sc2downt3p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Down Town (Bellfruit) (set 11, UK, 15RM motor, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-782
/********************************************************************************************************************************************************************************************************************
@@ -7875,11 +7875,11 @@ GAME( 199?, sc2downt3p , sc2downt , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6591 CLUB GRAND SLAM - 7-AUG-1996 12:32:05
-GAME( 1996, sc2gslam1 , sc2gslam , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 1) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-843
-GAME( 1996, sc2gslam1p , sc2gslam , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 1, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-843
+GAME( 1996, sc2gslam1 , sc2gslam , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 1) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-843
+GAME( 1996, sc2gslam1p , sc2gslam , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 1, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-843
// PROJECT NUMBER PR6591 CLUB GRAND SLAM - 29-OCT-2001 14:48:47
-GAME( 1996, sc2gslam , 0 , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 2) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-752-056
-GAME( 1996, sc2gslamp , sc2gslam , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 2, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-753-056
+GAME( 1996, sc2gslam , 0 , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 2) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-752-056
+GAME( 1996, sc2gslamp , sc2gslam , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcgslm , 0, "BFM", "Club Grand Slam (UK, set 2, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-753-056
/********************************************************************************************************************************************************************************************************************
Make A Million
@@ -7887,21 +7887,21 @@ GAME( 1996, sc2gslamp , sc2gslam , scorpion2 , bfmcgslm , bfm_sc2_state, bfmcg
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6553 MAKE A MILLION #4/#8 - 18-SEP-1995 13:54:26
-GAME( 199?, sc2mam4 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-483
-GAME( 199?, sc2mam4p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-483
+GAME( 199?, sc2mam4 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-483
+GAME( 199?, sc2mam4p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-483
// PROJECT NUMBER 6553 MAKE A MILLION ARCADE #4/#8 - 18-SEP-1995 14:51:08
-GAME( 199?, sc2mam3 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-484
-GAME( 199?, sc2mam3a , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 2, UK, alt) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-484
-GAME( 199?, sc2mam3p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-484
+GAME( 199?, sc2mam3 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-484
+GAME( 199?, sc2mam3a , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 2, UK, alt) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-484
+GAME( 199?, sc2mam3p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-484
// PROJECT NUMBER 6553 MAKE A MILLION #8 ALL CASH - 19-SEP-1995 12:11:36
-GAME( 199?, sc2mam2 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 3, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-485
-GAME( 199?, sc2mam2p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 3, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-485
+GAME( 199?, sc2mam2 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 3, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-485
+GAME( 199?, sc2mam2p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 3, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-485
// PROJECT NUMBER 6780 MAKE A MILLION #10 10/25P - 24-MAY-1996 16:15:11
-GAME( 199?, sc2mam , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 4, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-731
-GAME( 199?, sc2mamp , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 4, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-731
+GAME( 199?, sc2mam , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 4, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-731
+GAME( 199?, sc2mamp , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 4, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-731
// PROJECT NUMBER 6780 MAKE A MILLION #10 10/25P - 24-MAY-1996 16:18:45
-GAME( 199?, sc2mam1 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 5, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-732
-GAME( 199?, sc2mam1p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 5, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-732
+GAME( 199?, sc2mam1 , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 5, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-732
+GAME( 199?, sc2mam1p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million (Bellfruit) (set 5, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-732
/********************************************************************************************************************************************************************************************************************
@@ -7909,16 +7909,16 @@ GAME( 199?, sc2mam1p , sc2mam , scorpion2 , drwho , bfm_sc2_state, drwho , 0
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6546 CLUB MAKE A MILLION CASHPOT/JACKPOT - 7-AUG-1996 12:35:19
-GAME( 199?, sc2mamcl3 , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-849
+GAME( 199?, sc2mamcl3 , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-849
// PROJECT NUMBER 6546 CLUB MAKE A MILLION CASHPOT/JACKPOT - 8-JAN-1997 16:59:29
-GAME( 199?, sc2mamcl2 , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-916
-GAME( 199?, sc2mamcl2p , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-916
+GAME( 199?, sc2mamcl2 , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-916
+GAME( 199?, sc2mamcl2p , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-916
// PROJECT NUMBER 6546 CLUB MAKE A MILLION CPOT/JPOT 20P #250 - 15-JAN-1997 15:03:44
-GAME( 199?, sc2mamcl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 3, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-914
-GAME( 199?, sc2mamclp , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 3, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-914
+GAME( 199?, sc2mamcl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 3, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-914
+GAME( 199?, sc2mamclp , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 3, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-914
// PROJECT NUMBER 6546 CLUB MAKE A MILLION CASHPOT/JACKPOT 65% - 31-JAN-1997 11:32:37
-GAME( 199?, sc2mamcl1 , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-915
-GAME( 199?, sc2mamcl1p , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-915
+GAME( 199?, sc2mamcl1 , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-915
+GAME( 199?, sc2mamcl1p , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Make A Million Club (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-915
/********************************************************************************************************************************************************************************************************************
@@ -7927,24 +7927,24 @@ GAME( 199?, sc2mamcl1p , sc2mamcl , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6517 INSTANT JACKPOTS V2 - 22-AUG-1995 14:36:22
-GAME( 199?, sc2inst5 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-463
+GAME( 199?, sc2inst5 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-463
// PROJECT NUMBER 6517 INSTANT JACKPOTS VAR STAKE/JACKPOT - 19-SEP-1995 10:15:02
-GAME( 199?, sc2inst6 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-473
+GAME( 199?, sc2inst6 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-473
// PROJECT NUMBER 6517 INSTANT JACKPOTS VAR STAKE/JACKPOT - 16-OCT-1995 15:03:51
-GAME( 199?, sc2inst4 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-521
-GAME( 199?, sc2inst4p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-521
+GAME( 199?, sc2inst4 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-521
+GAME( 199?, sc2inst4p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-521
// PROJECT NUMBER 6517 INSTANT JACKPOTS VAR STAKE/JPOT ARCADE - 16-OCT-1995 15:31:35
-GAME( 199?, sc2inst2 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-522
-GAME( 199?, sc2inst2p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-522
+GAME( 199?, sc2inst2 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-522
+GAME( 199?, sc2inst2p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-522
// PROJECT NUMBER 6517 INSTANT JACKPOTS #8 ALL CASH - 12-JAN-1996 10:15:03
-GAME( 199?, sc2inst3 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 5, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-605
-GAME( 199?, sc2inst3p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 5, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-605
+GAME( 199?, sc2inst3 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 5, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-605
+GAME( 199?, sc2inst3p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 5, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-605
// PROJECT NUMBER 6517 INSTANT JACKPOTS DE-REG - 15-MAY-1996 15:29:07
-GAME( 199?, sc2inst , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 6, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-715
-GAME( 199?, sc2instp , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 6, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-715
+GAME( 199?, sc2inst , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 6, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-715
+GAME( 199?, sc2instp , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 6, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-715
// PROJECT NUMBER 6517 INSTANT JACKPOTS WHITBREAD #10 ALL CASH 20P PLAY - 15-MAY-1996 15:30:35
-GAME( 199?, sc2inst1 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 7, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-716
-GAME( 199?, sc2inst1p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 7, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-716
+GAME( 199?, sc2inst1 , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 7, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-716
+GAME( 199?, sc2inst1p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Instant Jackpot (Bellfruit) (set 7, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-716
/********************************************************************************************************************************************************************************************************************
Cash On The Nile
@@ -7952,13 +7952,13 @@ GAME( 199?, sc2inst1p , sc2inst , scorpion2 , drwho , bfm_sc2_state, drwho ,
********************************************************************************************************************************************************************************************************************/
// PROJECT 6060 CASH ON THE NILE CASH ON THE NILE 12RM #150 - 12-JAN-1993 12:27:05
-GAME( 199?, sc2cnile1 , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 1 UK, 150GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-047
+GAME( 199?, sc2cnile1 , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 1 UK, 150GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-047
// PROJECT 6060 CASH ON THE NILE CASH ON THE NILE 12RM #150 - 10-FEB-1993 14:42:56
-GAME( 199?, sc2cnile , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 2 UK, 150GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-049
-GAME( 199?, sc2cnilep , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 2 UK, 150GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-049
+GAME( 199?, sc2cnile , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 2 UK, 150GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-049
+GAME( 199?, sc2cnilep , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 2 UK, 150GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-049
// CASH ON THE NILE 200 POUND JACKPOT CASH ON THE NILE 12RM #200 J/P - 9-APR-1993 10:33:22
-GAME( 199?, sc2cnile2 , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 3 UK, 200GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-071
-GAME( 199?, sc2cnile2p , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 3 UK, 200GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-071
+GAME( 199?, sc2cnile2 , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 3 UK, 200GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-071
+GAME( 199?, sc2cnile2p , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash On The Nile Club (Bellfruit) (set 3 UK, 200GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-071
/********************************************************************************************************************************************************************************************************************
@@ -7966,129 +7966,129 @@ GAME( 199?, sc2cnile2p , sc2cnile , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6707 FOOTBALL CLUB CASHPOT/JACKPOT - 16-DEC-1996 15:24:47
-GAME( 199?, sc2foot2 , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-905
-GAME( 199?, sc2foot2p , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-905
+GAME( 199?, sc2foot2 , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-905
+GAME( 199?, sc2foot2p , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-905
// PROJECT NUMBER PR6707 FOOTBALL CLUB CASHPOT/JACKPOT 20P !250 - 20-DEC-1996 12:35:37
-GAME( 199?, sc2foot , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-909
-GAME( 199?, sc2footp , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-909
+GAME( 199?, sc2foot , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-909
+GAME( 199?, sc2footp , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-909
// PROJECT NUMBER PR6707 FOOTBALL CLUB CASHPOT/JACKPOT 5p #100 - 31-JAN-1997 12:24:35
-GAME( 199?, sc2foot1 , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 3, UK, 100GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-908
-GAME( 199?, sc2foot1p , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 3, UK, 100GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-908
+GAME( 199?, sc2foot1 , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 3, UK, 100GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-908
+GAME( 199?, sc2foot1p , sc2foot , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Football Club (Bellfruit) (set 3, UK, 100GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-908
/********************************************************************************************************************************************************************************************************************
Super Star
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6609 SUPER STAR - 15-JUL-1996 13:33:17
-GAME( 199?, sc2sstar1 , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 1, UK, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-822
-GAME( 199?, sc2sstar1p , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 1, UK, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-822
+GAME( 199?, sc2sstar1 , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 1, UK, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-822
+GAME( 199?, sc2sstar1p , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 1, UK, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-822
// PROJECT NUMBER 6609 SUPER STAR TRIDENT 3 - 17-JUL-1996 15:00:38
-GAME( 199?, sc2sstar , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 2, UK, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-824
-GAME( 199?, sc2sstarp , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 2, UK, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-824
+GAME( 199?, sc2sstar , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 2, UK, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-824
+GAME( 199?, sc2sstarp , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 2, UK, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-824
// PROJECT NUMBER 6609 SUPER STAR WHITBREAD - 19-JUL-1996 12:30:57
-GAME( 199?, sc2sstar3 , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 3, UK, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-826
-GAME( 199?, sc2sstar3p , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 3, UK, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-826
+GAME( 199?, sc2sstar3 , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 3, UK, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-826
+GAME( 199?, sc2sstar3p , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 3, UK, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-826
// PROJECT NUMBER 6609 SUPER STAR IRISH - 7-AUG-1996 12:39:04
-GAME( 199?, sc2sstar2 , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 4, UK, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-829
-GAME( 199?, sc2sstar2p , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 4, UK, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-829
+GAME( 199?, sc2sstar2 , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 4, UK, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-829
+GAME( 199?, sc2sstar2p , sc2sstar , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Super Star (Bellfruit) (set 4, UK, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-829
/********************************************************************************************************************************************************************************************************************
Club Grand Casino
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6547 GRAND CASINO - 5-FEB-1997 09:41:41
-GAME( 199?, sc2cgcas , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-922
-GAME( 199?, sc2cgcasp , sc2cgcas , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-922
+GAME( 199?, sc2cgcas , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-922
+GAME( 199?, sc2cgcasp , sc2cgcas , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-922
// PROJECT NUMBER PR6547 GRAND CASINO UK - 5-FEB-1997 09:47:11
-GAME( 199?, sc2cgcas1 , sc2cgcas , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-923
-GAME( 199?, sc2cgcas1p , sc2cgcas , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-923
+GAME( 199?, sc2cgcas1 , sc2cgcas , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-923
+GAME( 199?, sc2cgcas1p , sc2cgcas , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Club Grand Casino (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-923
/********************************************************************************************************************************************************************************************************************
Casino Royale
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6603 CASINO ROYALE (T2 - 5/10/20P) - 7-MAY-1996 17:02:50
-GAME( 199?, sc2casr3 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 1, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-704
-GAME( 199?, sc2casr3p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 1, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-704
+GAME( 199?, sc2casr3 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 1, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-704
+GAME( 199?, sc2casr3p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 1, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-704
// PROJECT NUMBER 6603 CASINO ROYALE (T2) DE-REG - 5-JUN-1996 15:03:27
-GAME( 199?, sc2casr4 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-743
-GAME( 199?, sc2casr4p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-743
+GAME( 199?, sc2casr4 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-743
+GAME( 199?, sc2casr4p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-743
// PROJECT NUMBER 6603 CASINO ROYALE (T2) WHITBREAD - 5-JUN-1996 15:06:18
-GAME( 199?, sc2casr2 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-744
-GAME( 199?, sc2casr2p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-744
+GAME( 199?, sc2casr2 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-744
+GAME( 199?, sc2casr2p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-744
// PROJECT NUMBER 6690 CASINO ROYALE (T3) DE-REG - 14-JUN-1996 08:18:20
-GAME( 199?, sc2casr1 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 4, UK, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-773
-GAME( 199?, sc2casr1p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 4, UK, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-773
+GAME( 199?, sc2casr1 , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 4, UK, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-773
+GAME( 199?, sc2casr1p , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 4, UK, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-773
// PROJECT NUMBER 6690 CASINO ROYALE (T3) DE-REG WHITBREAD - 14-JUN-1996 08:20:40
-GAME( 199?, sc2casr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 5, UK, 10GBP Jackpot, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-774
-GAME( 199?, sc2casrp , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 5, UK, 10GBP Jackpot, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-774
+GAME( 199?, sc2casr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 5, UK, 10GBP Jackpot, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-774
+GAME( 199?, sc2casrp , sc2casr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Casino Royale (Bellfruit) (set 5, UK, 10GBP Jackpot, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-774
/********************************************************************************************************************************************************************************************************************
Cash Vegas
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6714 CASH VEGAS - 11-NOV-1996 14:12:19
-GAME( 199?, sc2cvega , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-890
-GAME( 199?, sc2cvega4p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-890
+GAME( 199?, sc2cvega , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-890
+GAME( 199?, sc2cvega4p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-890
// PROJECT NUMBER 6714 CASH VEGAS WHITBREAD - 11-NOV-1996 14:14:44
-GAME( 199?, sc2cvega3 , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-891
-GAME( 199?, sc2cvega3p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-891
+GAME( 199?, sc2cvega3 , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-891
+GAME( 199?, sc2cvega3p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-891
// PROJECT NUMBER 6714 TOKEN CASH VEGAS T2 TOKEN - 19-NOV-1996 15:39:02
-GAME( 199?, sc2cvega2 , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 3, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-893
-GAME( 199?, sc2cvega2p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 3, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-893
+GAME( 199?, sc2cvega2 , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 3, UK, 8GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-893
+GAME( 199?, sc2cvega2p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 3, UK, 8GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-893
// PROJECT NUMBER 6714 CASH VEGAS HOPPER - 25-NOV-1996 12:09:44
-GAME( 199?, sc2cvega1 , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 4, UK, 10GBP Jackpot, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-896
-GAME( 199?, sc2cvega1p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 4, UK, 10GBP Jackpot, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-896
+GAME( 199?, sc2cvega1 , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 4, UK, 10GBP Jackpot, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-896
+GAME( 199?, sc2cvega1p , sc2cvega , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Vegas (Bellfruit) (set 4, UK, 10GBP Jackpot, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-896
/********************************************************************************************************************************************************************************************************************
Surprise Surprize
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6572 SURPRISE SURPRIZE GALA S+P 95 - 4-JAN-1996 10:03:38
-GAME( 199?, sc2suprz , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-594
-GAME( 199?, sc2suprzp , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 1, UK, Protocol)(Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-594
+GAME( 199?, sc2suprz , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-594
+GAME( 199?, sc2suprzp , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 1, UK, Protocol)(Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-594
// PROJECT NUMBER 6572 SURPRISE SURPRIZE SINGLESITE S+P 95 - 4-JAN-1996 10:05:52
-GAME( 199?, sc2suprz1 , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-593
-GAME( 199?, sc2suprz1p , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-593
+GAME( 199?, sc2suprz1 , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-593
+GAME( 199?, sc2suprz1p , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-593
// PROJECT NUMBER 6139 SURPRISE SURPRIZE SCORPION 2 BINGO #3/#6 - 18-JUN-1993 11:34:01 o
-GAME( 199?, sc2suprz3 , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-096
+GAME( 199?, sc2suprz3 , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-096
// PROJECT NUMBER 6139 SURPRISE SURPRIZE SCORPION 2 #6 ALL CASH 20P - 1-JUL-1996 10:52:24
-GAME( 199?, sc2suprz2 , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-807
-GAME( 199?, sc2suprz2p , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-807
+GAME( 199?, sc2suprz2 , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-807
+GAME( 199?, sc2suprz2p , sc2suprz , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Surprise Surprize (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-807
/********************************************************************************************************************************************************************************************************************
Pharaoh's Gold Club
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6635 PHARAOHS GOLD PHARAOHS GOLD 250 POUND JACKPOT - 6-AUG-1996 16:55:46
-GAME( 199?, sc2cpg2 , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-840
-GAME( 199?, sc2cpg2p , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-840
+GAME( 199?, sc2cpg2 , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-840
+GAME( 199?, sc2cpg2p , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-840
// PROJECT NUMBER PR6635 PHARAOHS GOLD PHARAOHS GOLD 20PP 250 POUND JACKPOT - 30-AUG-1996 08:03:38
-GAME( 199?, sc2cpg , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-860
-GAME( 199?, sc2cpgp , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-860
+GAME( 199?, sc2cpg , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-860
+GAME( 199?, sc2cpgp , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-860
// PROJECT NUMBER PR6635 PHARAOHS GOLD PHARAOHS GOLD 250 POUND JACKPOT 65% - 19-SEP-1996 15:49:24
-GAME( 199?, sc2cpg1 , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 3, UK, p65) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-867
-GAME( 199?, sc2cpg1p , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 3, UK, p65, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-867
+GAME( 199?, sc2cpg1 , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 3, UK, p65) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-867
+GAME( 199?, sc2cpg1p , sc2cpg , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Pharaoh's Gold Club (Bellfruit) (set 3, UK, p65, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-867
/********************************************************************************************************************************************************************************************************************
Showtime Spectacular
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6550 SHOWTIME SPECTACULAR S+P 5/10/20P #4/#8 - 14-SEP-1995 15:46:26
-GAME( 199?, sc2showt4 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-478
-GAME( 199?, sc2showt4p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-478
+GAME( 199?, sc2showt4 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-478
+GAME( 199?, sc2showt4p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-478
// PROJECT NUMBER 6550 SHOWTIME SPECTACULAR ARCADE S+P #4/#8 - 14-SEP-1995 15:48:13
-GAME( 199?, sc2showt3 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-479
-GAME( 199?, sc2showt3p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-479
+GAME( 199?, sc2showt3 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-479
+GAME( 199?, sc2showt3p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-479
// PROJECT NUMBER 6550 SHOWTIME SPECTACULAR S+P 5/10/20P IRISH ALL CASH #8 - 14-SEP-1995 16:26:44
-GAME( 199?, sc2showt2 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-480
-GAME( 199?, sc2showt2p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-480
+GAME( 199?, sc2showt2 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-480
+GAME( 199?, sc2showt2p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-480
// PROJECT NUMBER 6779 SHOWTIME SPECTACULAR S+P 20/25P #10 - 22-MAY-1996 10:30:47
-GAME( 199?, sc2showt , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-729
-GAME( 199?, sc2showtp , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-729
+GAME( 199?, sc2showt , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 4, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-729
+GAME( 199?, sc2showtp , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 4, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-729
// PROJECT NUMBER 6779 SHOWTIME SPECTACULAR S+P WHITBREAD 20P #10 - 22-MAY-1996 10:32:59
-GAME( 199?, sc2showt1 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-730
-GAME( 199?, sc2showt1p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 5, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-730
+GAME( 199?, sc2showt1 , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 5, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-730
+GAME( 199?, sc2showt1p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Showtime Spectacular (Bellfruit) (set 5, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-730
/********************************************************************************************************************************************************************************************************************
Cat & Mouse
@@ -8099,30 +8099,30 @@ GAME( 199?, sc2showt1p , sc2showt , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6306 CAT+MOUSE - 4-MAY-1994 17:16:31
-GAME( 199?, sc2catms3 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-237
+GAME( 199?, sc2catms3 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-237
// PROJECT NUMBER 6306 CAT+MOUSE - 25-AUG-1994 10:08:22
-GAME( 199?, sc2ctms2 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-279
+GAME( 199?, sc2ctms2 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-279
// PROJECT NUMBER 6306 CAT+MOUSE ARCADE - 25-AUG-1994 10:09:28
-GAME( 199?, sc2ctms25 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-280
+GAME( 199?, sc2ctms25 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-280
// PROJECT NUMBER 6426 CAT+MOUSE DELUXE ARCADE - 15-JUN-1995 15:56:14
-GAME( 199?, sc2catms , 0 , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 4, Deluxe) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-428
+GAME( 199?, sc2catms , 0 , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 4, Deluxe) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-428
// PROJECT NUMBER 6564 CAT+MOUSE #8 - 26-OCT-1995 08:49:39
-GAME( 199?, sc2ctms23 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-537
-GAME( 199?, sc2ctms23p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 5, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-537
+GAME( 199?, sc2ctms23 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-537
+GAME( 199?, sc2ctms23p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 5, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-537
// PROJECT NUMBER 6564 CAT+MOUSE ARCADE #8 - 26-OCT-1995 08:51:39
-GAME( 199?, sc2ctms22 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 6) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-538
-GAME( 199?, sc2ctms22p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 6, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-538
+GAME( 199?, sc2ctms22 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 6) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-538
+GAME( 199?, sc2ctms22p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 6, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-538
// PROJECT NUMBER 6564 CAT+MOUSE #8 ALL CASH - 26-OCT-1995 10:53:48
-GAME( 199?, sc2ctms21 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 7) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-539
-GAME( 199?, sc2ctms21p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 7, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-539
+GAME( 199?, sc2ctms21 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 7) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-539
+GAME( 199?, sc2ctms21p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 7, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-539
// PROJECT NUMBER 6564 CAT+MOUSE ARCADE 10P PLAY #8 - 27-FEB-1996 11:26:40
-GAME( 199?, sc2ctms24p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 8, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-540
+GAME( 199?, sc2ctms24p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 8, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-540
// PROJECT NUMBER 6564 CAT+MOUSE #10 ALL CASH - 26-MAR-1996 08:34:02
-GAME( 199?, sc2catms2 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 9) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-660
-GAME( 199?, sc2catms2p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 9, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-660
+GAME( 199?, sc2catms2 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 9) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-660
+GAME( 199?, sc2catms2p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 9, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-660
// PROJECT NUMBER 6564 CAT+MOUSE #10 ALL CASH WHITBREAD - 18-APR-1996 10:51:30
-GAME( 199?, sc2catms1 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 10) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-673
-GAME( 199?, sc2catms1p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 10, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-673
+GAME( 199?, sc2catms1 , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 10) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-673
+GAME( 199?, sc2catms1p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cat & Mouse (Bellfruit) (set 10, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-673
/********************************************************************************************************************************************************************************************************************
@@ -8130,8 +8130,8 @@ GAME( 199?, sc2catms1p , sc2catms , scorpion2 , bbrkfst , bfm_sc2_state, bbrkf
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6772 C+M+B TOO #10 DE-REG - 3-JUL-1996 12:51:26
-GAME( 199?, sc2cmbt , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cat & Mouse & Bonzo Too (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-809
-GAME( 199?, sc2cmbtp , sc2cmbt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cat & Mouse & Bonzo Too (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-809
+GAME( 199?, sc2cmbt , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cat & Mouse & Bonzo Too (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-809
+GAME( 199?, sc2cmbtp , sc2cmbt , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cat & Mouse & Bonzo Too (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-809
/********************************************************************************************************************************************************************************************************************
Easy Money
@@ -8139,14 +8139,14 @@ GAME( 199?, sc2cmbtp , sc2cmbt , scorpion2 , drwho , bfm_sc2_state, drwho ,
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6608 EASY MONEY STANDARD SINGLE SITE #8/#10 ALL CASH - 2-MAY-1996 11:02:39
-GAME( 199?, sc2easy , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-685
-GAME( 199?, sc2easyp , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-685
+GAME( 199?, sc2easy , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-685
+GAME( 199?, sc2easyp , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-685
// PROJECT NUMBER 6608 EASY MONEY WHITBREAD #10 ALL CASH 20P PLAY - 2-MAY-1996 11:04:21
-GAME( 199?, sc2easy2 , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-686
-GAME( 199?, sc2easy2p , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-686
+GAME( 199?, sc2easy2 , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-686
+GAME( 199?, sc2easy2p , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-686
// PROJECT NUMBER 6613 EASY MONEY WHITBREAD #10 ALL CASH 20P PLAY - 14-JUN-1996 11:44:11
-GAME( 199?, sc2easy1 , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-776
-GAME( 199?, sc2easy1p , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-776
+GAME( 199?, sc2easy1 , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-776
+GAME( 199?, sc2easy1p , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Easy Money (Bellfruit) (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-776
/********************************************************************************************************************************************************************************************************************
Flash Cash
@@ -8154,69 +8154,69 @@ GAME( 199?, sc2easy1p , sc2easy , scorpion2 , drwho , bfm_sc2_state, drwho ,
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6713 FLASH CASH TRIDENT2 #8/#10 ALL CASH 5P/10P/20P/25P PLAY - 10-OCT-1996 10:45:44
-GAME( 199?, sc2flaca1 , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 1, UK, 10GBP Jackpot, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-873
-GAME( 199?, sc2flaca1p , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 1, UK, 10GBP Jackpot, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-873
+GAME( 199?, sc2flaca1 , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 1, UK, 10GBP Jackpot, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-873
+GAME( 199?, sc2flaca1p , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 1, UK, 10GBP Jackpot, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-873
// PROJECT NUMBER 6713 FLASH CASH TRIDENT2 WHITBREAD #10 ALL CASH 20P PLAY - 10-OCT-1996 11:14:42
-GAME( 199?, sc2flaca2 , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 2, UK, 10GBP Jackpot, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-874
-GAME( 199?, sc2flaca2p , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 2, UK, 10GBP Jackpot, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-874
+GAME( 199?, sc2flaca2 , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 2, UK, 10GBP Jackpot, 2nd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-874
+GAME( 199?, sc2flaca2p , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 2, UK, 10GBP Jackpot, 2nd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-874
// PROJECT NUMBER 6723 FLASH CASH TRIDENT3 #8/#10 ALL CASH 5P/10P/20P/25P PLAY - 23-OCT-1996 12:13:03
-GAME( 199?, sc2flaca , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 3, UK, 10GBP Jackpot, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-877
-GAME( 199?, sc2flacap , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 3, UK, 10GBP Jackpot, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-877
+GAME( 199?, sc2flaca , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 3, UK, 10GBP Jackpot, 3rd Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-877
+GAME( 199?, sc2flacap , sc2flaca , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Flash Cash (Bellfruit) (set 3, UK, 10GBP Jackpot, 3rd Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-877
/********************************************************************************************************************************************************************************************************************
Cashino Club
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6232 CASHINO - 22-JUL-1994 12:10:28
-GAME( 199?, sc2cshcl1 , sc2cshcl , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-254
-GAME( 199?, sc2cshcl1p , sc2cshcl , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-254
+GAME( 199?, sc2cshcl1 , sc2cshcl , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-254
+GAME( 199?, sc2cshcl1p , sc2cshcl , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-254
// PROJECT NUMBER 6232 CASHINO FIXED 65% - 22-JUL-1994 12:19:27
-GAME( 199?, sc2cshcl , 0 , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-255
-GAME( 199?, sc2cshclp , sc2cshcl , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-255
+GAME( 199?, sc2cshcl , 0 , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-255
+GAME( 199?, sc2cshclp , sc2cshcl , scorpion2 , bbrkfst , bfm_sc2_state, bbrkfst , 0, "BFM", "Cashino Club (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-255
/********************************************************************************************************************************************************************************************************************
Eggs On Legs Tour
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6604 EGGS ON LEGS !10 ALL CASH - 11-JUN-1996 08:54:37
-GAME( 199?, sc2eggs1 , sc2eggs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 1, UK, Arcade, 10GBP Jackpot?) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-746
-GAME( 199?, sc2eggs1p , sc2eggs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 1, UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-746
+GAME( 199?, sc2eggs1 , sc2eggs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 1, UK, Arcade, 10GBP Jackpot?) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-746
+GAME( 199?, sc2eggs1p , sc2eggs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 1, UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-746
// PROJECT NUMBER 6604 EGGS ON LEGS !10 WHITBREAD - 11-JUN-1996 08:59:45
-GAME( 199?, sc2eggs , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 2, UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-747
-GAME( 199?, sc2eggsp , sc2eggs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 2, UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-747
+GAME( 199?, sc2eggs , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 2, UK, Arcade, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-747
+GAME( 199?, sc2eggsp , sc2eggs , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Eggs On Legs Tour (Bellfruit) (set 2, UK, Arcade, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-747
/********************************************************************************************************************************************************************************************************************
Wild West Club
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6433 WILD WEST FAST POT FILL - 11-DEC-1995 17:27:48
-GAME( 199?, sc2wwcl1 , sc2wwcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-582
-GAME( 199?, sc2wwcl1p , sc2wwcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-582
+GAME( 199?, sc2wwcl1 , sc2wwcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-582
+GAME( 199?, sc2wwcl1p , sc2wwcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-582
// PROJECT NUMBER PR6433 WILD WEST - 7-AUG-1996 16:44:24
-GAME( 199?, sc2wwcl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-845
-GAME( 199?, sc2wwclp , sc2wwcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-845
+GAME( 199?, sc2wwcl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-845
+GAME( 199?, sc2wwclp , sc2wwcl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Wild West Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-845
/********************************************************************************************************************************************************************************************************************
Double Diamond
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6570 DOUBLE DIAMOND STAKES AND PRIZES #8 - 3-JAN-1996 12:21:14
-GAME( 199?, sc2dbl1 , sc2dbl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-599
-GAME( 199?, sc2dbl1p , sc2dbl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-599
+GAME( 199?, sc2dbl1 , sc2dbl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-599
+GAME( 199?, sc2dbl1p , sc2dbl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-599
// PROJECT NUMBER 6322 DOUBLE DIAMOND GALA 82% STAKES AND PRIZES - 3-JAN-1996 12:22:52
-GAME( 199?, sc2dbl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-600
-GAME( 199?, sc2dblp , sc2dbl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-600
+GAME( 199?, sc2dbl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-600
+GAME( 199?, sc2dblp , sc2dbl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Double Diamond (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-600
/********************************************************************************************************************************************************************************************************************
Hyperactive
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6784 HYPERACTIVE !10 ALL CASH - 18-JUN-1996 12:10:31
-GAME( 199?, sc2hypr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 1, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-748
-GAME( 199?, sc2hyprp , sc2hypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 1, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-748
+GAME( 199?, sc2hypr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 1, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-748
+GAME( 199?, sc2hyprp , sc2hypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 1, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-748
// PROJECT NUMBER 6784 HYPERACTIVE WHITBREAD !10 ALL CASH - 18-JUN-1996 12:12:26
-GAME( 199?, sc2hypr1 , sc2hypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-749
-GAME( 199?, sc2hypr1p , sc2hypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-749
+GAME( 199?, sc2hypr1 , sc2hypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-749
+GAME( 199?, sc2hypr1p , sc2hypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hyperactive (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-749
/********************************************************************************************************************************************************************************************************************
King Cash Club
@@ -8224,64 +8224,64 @@ GAME( 199?, sc2hypr1p , sc2hypr , scorpion2 , drwho , bfm_sc2_state, drwho ,
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6184 KING CASH 200 POUND JACKPOT DUAL STAKE - 26-NOV-1993 11:38:06
-GAME( 199?, sc2kcclb1 , sc2kcclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-168
-GAME( 199?, sc2kcclb1p , sc2kcclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-168
+GAME( 199?, sc2kcclb1 , sc2kcclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 2, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-168
+GAME( 199?, sc2kcclb1p , sc2kcclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-168
// PROJECT NUMBER PR6034 KING CASH 200 POUND JACKPOT - 26-NOV-1993 11:40:08
-GAME( 199?, sc2kcclb , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-166
-GAME( 199?, sc2kcclbp , sc2kcclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-166
+GAME( 199?, sc2kcclb , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-166
+GAME( 199?, sc2kcclbp , sc2kcclb , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "King Cash Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-166
/********************************************************************************************************************************************************************************************************************
Olympic Gold
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6606 OLYMPIC GOLD !10 ALL CASH - 30-APR-1996 15:42:35
-GAME( 199?, sc2olgld , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-689
-GAME( 199?, sc2olgldp , sc2olgld , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-689
+GAME( 199?, sc2olgld , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-689
+GAME( 199?, sc2olgldp , sc2olgld , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-689
// PROJECT NUMBER 6606 OLYMPIC GOLD !10 WHITBREAD - 30-APR-1996 15:44:58
-GAME( 199?, sc2olgld1 , sc2olgld , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-690
-GAME( 199?, sc2olgld1p , sc2olgld , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-690
+GAME( 199?, sc2olgld1 , sc2olgld , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 2, UK, 10GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-690
+GAME( 199?, sc2olgld1p , sc2olgld , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Olympic Gold (Bellfruit) (set 2, UK, 10GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-690
/********************************************************************************************************************************************************************************************************************
Reel Gems
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6321 REEL GEMS STANDARD STAKES AND PRIZES #4/#8 - 29-JAN-1996 11:58:16
-GAME( 199?, sc2relgm , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Reel Gems (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-612
-GAME( 199?, sc2relgmp , sc2relgm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Reel Gems (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-612
+GAME( 199?, sc2relgm , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Reel Gems (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-612
+GAME( 199?, sc2relgmp , sc2relgm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Reel Gems (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-612
// PROJECT NUMBER 6321 REEL GEMS GALA 82% FIXED S+P #4/#8 - 29-JAN-1996 11:59:54
-GAME( 199?, sc2relgm1p , sc2relgm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Reel Gems (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-613
+GAME( 199?, sc2relgm1p , sc2relgm , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Reel Gems (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-613
/********************************************************************************************************************************************************************************************************************
Top Wack
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6610 TOP WHACK 10PD 20P WHITBREAD T2 - 19-JUN-1996 16:02:20
-GAME( 199?, sc2topwk , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Top Wack (Bellfruit) (set 1, UK, 10GBP Jackpot, 1st Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-791
-GAME( 199?, sc2topwkp , sc2topwk , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Top Wack (Bellfruit) (set 1, UK, 10GBP Jackpot, 1st Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-791
+GAME( 199?, sc2topwk , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Top Wack (Bellfruit) (set 1, UK, 10GBP Jackpot, 1st Triennial) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-791
+GAME( 199?, sc2topwkp , sc2topwk , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Top Wack (Bellfruit) (set 1, UK, 10GBP Jackpot, 1st Triennial, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-791
/********************************************************************************************************************************************************************************************************************
Golden Roulette
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6421 GOLDEN ROULETTE S+P VARIABLE STAKE/PAYOUT - 4-OCT-1995 10:46:40
-GAME( 199?, sc2groul , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Golden Roulette (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-507
-GAME( 199?, sc2groulp , sc2groul , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Golden Roulette (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-507
+GAME( 199?, sc2groul , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Golden Roulette (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-507
+GAME( 199?, sc2groulp , sc2groul , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Golden Roulette (Bellfruit) (set 2, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-507
/********************************************************************************************************************************************************************************************************************
Hey Presto
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6138 HEY PRESTO % VARIABLE - ALL CASH - SCORPION 2 - 9-JUL-1996 17:03:26
-GAME( 199?, sc2heypr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hey Presto (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-812
-GAME( 199?, sc2heyprp , sc2heypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hey Presto (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-812
+GAME( 199?, sc2heypr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hey Presto (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-812
+GAME( 199?, sc2heyprp , sc2heypr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Hey Presto (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-812
/********************************************************************************************************************************************************************************************************************
Majestic Bells
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6324 MAJESTIC BELLS S+P - 16-NOV-1995 15:37:58
-GAME( 199?, sc2majes , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Majestic Bells (Bellfruit) (set 1) (set 1)", GAME_FLAGS) // GAME No 95-750-563
-GAME( 199?, sc2majesp , sc2majes , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Majestic Bells (Bellfruit) (set 1, Protocol) (set 2)", GAME_FLAGS) // GAME No 95-751-563
+GAME( 199?, sc2majes , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Majestic Bells (Bellfruit) (set 1) (set 1)", GAME_FLAGS) // GAME No 95-750-563
+GAME( 199?, sc2majesp , sc2majes , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Majestic Bells (Bellfruit) (set 1, Protocol) (set 2)", GAME_FLAGS) // GAME No 95-751-563
/********************************************************************************************************************************************************************************************************************
Pay Roll Casino
@@ -8289,35 +8289,35 @@ GAME( 199?, sc2majesp , sc2majes , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 7015 PAYROLL CASINO AT MAZOOMA 5P - 14-MAY-1998 10:20:02
-GAME( 199?, sc2payr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Pay Roll Casino (Bellfruit/Mazooma) (Scorpion 2/3)", GAME_FLAGS) // GAME No PRCVM52
+GAME( 199?, sc2payr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM/Mazooma", "Pay Roll Casino (Bellfruit/Mazooma) (Scorpion 2/3)", GAME_FLAGS) // GAME No PRCVM52
/********************************************************************************************************************************************************************************************************************
Carrot Gold Club
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6833 250 CARROT GOLD - 22-MAY-1997 09:04:15
-GAME( 199?, sc2cgc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Carrot Gold Club (Bellfruit) (Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-968
+GAME( 199?, sc2cgc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Carrot Gold Club (Bellfruit) (Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-968
/********************************************************************************************************************************************************************************************************************
The Great Train Robbery
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6205 THE GREAT TRAIN ROBBERY 15RM - 20-AUG-1993 11:53:20
-GAME( 199?, sc2gtr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Great Train Robbery (Bellfruit) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-137
+GAME( 199?, sc2gtr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "The Great Train Robbery (Bellfruit) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-137
/********************************************************************************************************************************************************************************************************************
Main Attraction
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6203 MAIN ATTRACTION - 12-JUL-1993 17:45:15
-GAME( 199?, sc2maina , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Main Attraction (Bellfruit) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-115
+GAME( 199?, sc2maina , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Main Attraction (Bellfruit) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-115
/********************************************************************************************************************************************************************************************************************
Focus (Dutch)
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6346 FOCUS - 23-JAN-1995 15:31:32
-GAME( 1995, sc2focus , 0 , scorpion3 , scorpion3 , bfm_sc2_state, focus , 0, "BFM/ELAM", "Focus (Dutch, Game Card 95-750-347) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-347
+GAME( 1995, sc2focus , 0 , scorpion3 , scorpion3 , bfm_sc2_state, focus , 0, "BFM/ELAM", "Focus (Dutch, Game Card 95-750-347) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-347
/********************************************************************************************************************************************************************************************************************
Public Enemy No.1 (German)
@@ -8325,7 +8325,7 @@ GAME( 1995, sc2focus , 0 , scorpion3 , scorpion3 , bfm_sc2_state, focus , 0
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6489 PUBLIC ENEMY No1 - 22-MAY-1995 09:24:05
-GAME( 199?, sc2pe1g , 0 , scorpion2 , drwho , bfm_sc2_state, drwhon , 0, "BFM", "Public Enemy No.1 (Bellfruit) [German] (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-415
+GAME( 199?, sc2pe1g , 0 , scorpion2 , drwho , bfm_sc2_state, drwhon , 0, "BFM", "Public Enemy No.1 (Bellfruit) [German] (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-415
/********************************************************************************************************************************************************************************************************************
@@ -8340,32 +8340,32 @@ GAME( 199?, sc2pe1g , 0 , scorpion2 , drwho , bfm_sc2_state, drwhon , 0,
ROM_START( sc2winstb ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_std_ac_var_8-10pnd_ass.bin", 0x00000, 0x10000, CRC(f2d16bd5) SHA1(bd6a9da9da24459b14917386c64ecbc46c8adfda) ) sc2_winst_sound ROM_END
ROM_START( sc2winstbp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_dat_ac_var_8-10pnd_ass.bin", 0x00000, 0x10000, CRC(351560f4) SHA1(b33c6bdeadeabbe5a4231b8bd5b134f9ea402133) ) sc2_winst_sound ROM_END
ROM_START( sc2winst ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_std_ar_var_8pnd_ass.bin", 0x00000, 0x10000, CRC(d7a10aeb) SHA1(7346c83df7fd3de57a1b6f0ce498daabacb11491) ) sc2_winst_sound ROM_END
-ROM_START( sc2winstp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_dat_ar_var_8pnd_ass.bin", 0x00000, 0x10000, CRC(a83633ef) SHA1(66caadd3127a424249fe78918ff99be833b81fad) ) sc2_winst_sound ROM_END
+ROM_START( sc2winstp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_dat_ar_var_8pnd_ass.bin", 0x00000, 0x10000, CRC(a83633ef) SHA1(66caadd3127a424249fe78918ff99be833b81fad) ) sc2_winst_sound ROM_END
ROM_START( sc2winstd ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_std_ss_var_ass.bin", 0x00000, 0x10000, CRC(c88f9a6e) SHA1(19a2b708f90a53a8dcfe69d2f6c683362867daba) ) sc2_winst_sound ROM_END
ROM_START( sc2winstdp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_dat_ss_var_ass.bin", 0x00000, 0x10000, CRC(311550dd) SHA1(17dc789cba542e7c3c137a7e6a2a2d8869c84a7a) ) sc2_winst_sound ROM_END
ROM_START( sc2winste ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_std_wi_ac_10pnd-20p_ass.bin", 0x00000, 0x10000, CRC(ecbb7707) SHA1(ea064149c515e39b17e851bcd39092ea3ae999a0) ) sc2_winst_sound ROM_END
ROM_START( sc2winstep ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_dat_wi_ac_10pnd-20p_ass.bin", 0x00000, 0x10000, CRC(ae418733) SHA1(f63c63232056929760742fcf7f8beda387f5c597) ) sc2_winst_sound ROM_END
-ROM_START( sc2winstf ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_std_wi_ac_10pnd-20p_tri3_ass.bin", 0x00000, 0x10000, CRC(eb9ee9ae) SHA1(3150aec95039aa65a9126a0326e4dd10829347b2) ) sc2_winst_sound ROM_END
+ROM_START( sc2winstf ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_std_wi_ac_10pnd-20p_tri3_ass.bin", 0x00000, 0x10000, CRC(eb9ee9ae) SHA1(3150aec95039aa65a9126a0326e4dd10829347b2) ) sc2_winst_sound ROM_END
ROM_START( sc2winstfp ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_dat_wi_ac_10pnd-20p_tri3_ass.bin", 0x00000, 0x10000, CRC(39ac4021) SHA1(bd5f4d8800a794fdca8abee15acc3ea8d30c538a) ) sc2_winst_sound ROM_END
ROM_START( sc2winstg ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "winning-streak_std_ac_tri3_ass.bin", 0x00000, 0x10000, CRC(b3e2b2d6) SHA1(0008e9d329327b4aecae5d861303c486942ef694) ) sc2_winst_sound ROM_END
// PROJECT NUMBER PR6605 WINNING STREAK T2,ARCADE,#8,5/10/20 - 8-MAY-1996 10:31:16
-GAME( 198?, sc2winst , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 1) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-702
-GAME( 198?, sc2winstp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 1, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-702
+GAME( 198?, sc2winst , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 1) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-702
+GAME( 198?, sc2winstp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 1, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-702
// PROJECT NUMBER PR6605 WINNING STREAK T2,8PD TOK,5/10/20 - 8-MAY-1996 10:36:21
-GAME( 198?, sc2winstd , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 2) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-700
-GAME( 198?, sc2winstdp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 2, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-700
+GAME( 198?, sc2winstd , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 2) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-700
+GAME( 198?, sc2winstdp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 2, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-700
// PROJECT NUMBER PR6605 WINNING STREAK T2,#8/#10 CASH 5/10/20/25P - 13-JUN-1996 12:27:29
-GAME( 198?, sc2winstb , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 3) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-766
-GAME( 198?, sc2winstbp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 3, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-766
+GAME( 198?, sc2winstb , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 3) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-766
+GAME( 198?, sc2winstbp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 3, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-766
// PROJECT NUMBER PR6605 WINNING STREAK T2,WHITBREAD,#10 CASH,20p - 13-JUN-1996 12:30:20
-GAME( 198?, sc2winste , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 4) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-767
-GAME( 198?, sc2winstep , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 4, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-767
+GAME( 198?, sc2winste , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 4) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-767
+GAME( 198?, sc2winstep , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 4, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-767
// PROJECT NUMBER PR6691 WINNING STREAK T3 HOPPERS #8/10 5-25P - 13-JUN-1996 16:28:02
-GAME( 198?, sc2winstg , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 5) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-777
+GAME( 198?, sc2winstg , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 5) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-777
// PROJECT NUMBER PR6691 WINNING STREAK T3,WHITBREAD,#10 CASH,20p - 13-JUN-1996 16:31:36
-GAME( 198?, sc2winstf , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 6) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-778
-GAME( 198?, sc2winstfp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 6, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-778
+GAME( 198?, sc2winstf , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 6) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-778
+GAME( 198?, sc2winstfp , sc2winst , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Winning Streak (Bellfruit) (set 6, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-778
/********************************************************************************************************************************************************************************************************************
@@ -8383,14 +8383,14 @@ ROM_START( sc2cexpld ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "cash_explo
ROM_START( sc2cexple ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "cash_explosion_std_wi_ac_10pnd_20p_a.bin", 0x0000, 0x010000, CRC(2901a315) SHA1(c9733488894ccead7a69b161f2afacdb3f892b89) ) sc2_cexpl_sound ROM_END
// PROJECT NUMBER 6518 CASH EXPLOSION 5/10/20P #8 IRISH ALL CASH - 12-JAN-1996 10:12:16
-GAME( 198?, sc2cexpld , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 1) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-606
-GAME( 198?, sc2cexpla , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 1, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-606
+GAME( 198?, sc2cexpld , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 1) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-606
+GAME( 198?, sc2cexpla , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 1, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-606
// PROJECT NUMBER 6776 CASH EXPLOSION DE-REG - 21-MAY-1996 12:38:53
-GAME( 198?, sc2cexplc , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 2) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-723
-GAME( 198?, sc2cexpl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 2, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-723
+GAME( 198?, sc2cexplc , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 2) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-723
+GAME( 198?, sc2cexpl , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 2, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-723
// PROJECT NUMBER 6776 CASH EXPLOSION DE-REG WHITBREAD - 21-MAY-1996 12:40:20
-GAME( 198?, sc2cexple , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 3) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-728
-GAME( 198?, sc2cexplb , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 3, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-728
+GAME( 198?, sc2cexple , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 3) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-750-728
+GAME( 198?, sc2cexplb , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "BFM", "Cash Explosion (Bellfruit) (set 3, Protocol) (Scorpion 2)", GAME_FLAGS ) // GAME No 95-751-728
/********************************************************************************************************************************************************************************************************************
*********************************************************************************************************************************************************************************************************************
@@ -8411,19 +8411,19 @@ GAME( 198?, sc2cexplb , sc2cexpl , scorpion2 , drwho , bfm_sc2_state, drwho
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6569 (6224) LUVVLY JUBBLY GALA S+P 95 - 30-JAN-1996 11:12:00
-GAME( 1996, sc2luvv6p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 1, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-621
+GAME( 1996, sc2luvv6p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 1, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-621
// PROJECT NUMBER 6569 (6224) LUVVLY JUBBLY MULTISITE S+P 95 - 30-JAN-1996 11:14:05
-GAME( 1996, sc2luvv2 , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 2, UK, Multisite) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-622
-GAME( 1996, sc2luvv2p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 2, UK, Multisite, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-622
+GAME( 1996, sc2luvv2 , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 2, UK, Multisite) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-622
+GAME( 1996, sc2luvv2p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 2, UK, Multisite, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-622
// PROJECT NUMBER 6569 (6224) LUVVLY JUBBLY MULTISITE #10/25P - 2-JUL-1996 16:32:17
-GAME( 1996, sc2luvv , 0 , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/25p) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-808
-GAME( 1996, sc2luvvp , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/25p, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-808
+GAME( 1996, sc2luvv , 0 , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/25p) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-808
+GAME( 1996, sc2luvvp , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/25p, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-808
// PROJECT NUMBER 6569 (6224) LUVVLY JUBBLY MULTISITE #4/5P PLAY - 4-JUL-1996 10:56:24
-GAME( 1996, sc2luvv4 , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 4, UK, Multisite 4GBP/5p) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-810
-GAME( 1996, sc2luvv4p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 4, UK, Multisite 4GBP/5p, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-810
+GAME( 1996, sc2luvv4 , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 4, UK, Multisite 4GBP/5p) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-810
+GAME( 1996, sc2luvv4p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 4, UK, Multisite 4GBP/5p, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-810
// PROJECT NUMBER 6569 (6224) LUVVLY JUBBLY MULTISITE #10/20P - 12-SEP-1996 14:07:57
-GAME( 1996, sc2luvv1 , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/20p) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-866
-GAME( 1996, sc2luvv1p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/20p, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-866
+GAME( 1996, sc2luvv1 , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/20p) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-866
+GAME( 1996, sc2luvv1p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvjub , 0, "BFM", "Luvvly Jubbly (set 3, UK, Multisite 10GBP/20p, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-866
/********************************************************************************************************************************************************************************************************************
@@ -8432,20 +8432,20 @@ GAME( 1996, sc2luvv1p , sc2luvv , scorpion2_dm01 , luvjub , bfm_sc2_state, luvj
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6331 PUBLIC ENEMY NO.1 - 26-JUL-1994 09:24:19
-GAME( 1996, sc2cpe3 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 1, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-257
-GAME( 1996, sc2cpe3p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 1, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-257
+GAME( 1996, sc2cpe3 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 1, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-257
+GAME( 1996, sc2cpe3p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 1, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-257
// PROJECT NUMBER PR6331 PUBLIC ENEMY NO.1 FIXED 65% - 10-AUG-1994 11:26:30
-GAME( 1996, sc2cpe4 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 2, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-273
-GAME( 1996, sc2cpe4p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 2, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-273
+GAME( 1996, sc2cpe4 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 2, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-273
+GAME( 1996, sc2cpe4p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 2, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-273
// PROJECT NUMBER PR6574 PUBLIC ENEMY NO.1 S+P 25P/#250 STENA SEALINK - 3-JAN-1996 12:17:33
-GAME( 1996, sc2cpe2 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 3, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-597
-GAME( 1996, sc2cpe2p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 3, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-597
+GAME( 1996, sc2cpe2 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 3, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-597
+GAME( 1996, sc2cpe2p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 3, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-597
// PROJECT NUMBER PR6574 PUBLIC ENEMY NO.1 S+P 25P/#250 FIXED 65% - 3-JAN-1996 12:19:01
-GAME( 1996, sc2cpe1 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 4, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-598
-GAME( 1996, sc2cpe1p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 4, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-598
+GAME( 1996, sc2cpe1 , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 4, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-598
+GAME( 1996, sc2cpe1p , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 4, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-598
// PROJECT NUMBER PR6574 PUBLIC ENEMY NO.1 S+P 25P/#250 - 20-AUG-1996 10:05:21
-GAME( 1996, sc2cpe , 0 , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 5, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-846
-GAME( 1996, sc2cpep , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 5, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-846
+GAME( 1996, sc2cpe , 0 , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 5, UK) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-750-846
+GAME( 1996, sc2cpep , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1 , 0, "BFM", "Club Public Enemy No.1 (set 5, UK, Protocol) (Scorpion 2/3)", GAME_NOT_WORKING|GAME_REQUIRES_ARTWORK|GAME_MECHANICAL) // GAME No 95-751-846
/********************************************************************************************************************************************************************************************************************
Cops 'n' Robbers
@@ -8453,19 +8453,19 @@ GAME( 1996, sc2cpep , sc2cpe , scorpion2_dm01 , cpeno1 , bfm_sc2_state, cpeno1
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6012 COPS & ROBBERS #3/#6 - 29-DEC-1992 21:26:28
-GAME( 199?, sc2cops5 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-044
+GAME( 199?, sc2cops5 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-044
// PROJECT NUMBER 6012 COPS AND ROBBERS S+P 10P - 7-JUL-1993 10:17:18
-GAME( 199?, sc2cops2 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-110
+GAME( 199?, sc2cops2 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-110
// PROJECT NUMBER 6589 (6012) COPS & ROBBERS (SINGLE SITE 5P/10P/20P) - 4-DEC-1995 10:52:08
-GAME( 199?, sc2cops3 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-577
-GAME( 199?, sc2cops3p , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-577
+GAME( 199?, sc2cops3 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-577
+GAME( 199?, sc2cops3p , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-577
// PROJECT NUMBER 6589 (6012) COPS & ROBBERS (ARCADE 5P/10P/20P) - 4-DEC-1995 10:53:58
-GAME( 199?, sc2copsp , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 4, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-578
+GAME( 199?, sc2copsp , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 4, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-578
// PROJECT NUMBER 6589 (6012) COPS & ROBBERS (IRISH ALL CASH 5P/10P/20P) - 7-MAR-1996 15:07:40
-GAME( 199?, sc2cops4 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-645
+GAME( 199?, sc2cops4 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-645
// PROJECT NUMBER 6589 (6012) COPS & ROBBERS (#10 ALL CASH 20P/25P) - 15-MAR-1996 11:52:02
-GAME( 199?, sc2cops , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 6) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-652
-GAME( 199?, sc2cops1p , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 6, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-652
+GAME( 199?, sc2cops , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 6) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-652
+GAME( 199?, sc2cops1p , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers (Bellfruit) (set 6, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-652
/********************************************************************************************************************************************************************************************************************
@@ -8475,12 +8475,12 @@ GAME( 199?, sc2cops1p , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6622 BINGO COPS N ROBBERS #8/#10 ALL CASH - 9-JUL-1996 17:08:15
-GAME( 199?, sc2copsc , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-814
-GAME( 199?, sc2copscp , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-814
+GAME( 199?, sc2copsc , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-814
+GAME( 199?, sc2copscp , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 1, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-814
// PROJECT NUMBER 6622 BINGO COPS N ROBBERS SWITCHABLE BINGO/ARCADE - 9-JUL-1996 17:12:33
-GAME( 199?, sc2copsc1 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-816
-GAME( 199?, sc2copsc1p , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-816
-GAME( 199?, sc2copsc1pa , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 2, Protocol) (Scorpion 2/3) (alt matrix rom)", GAME_FLAGS) // GAME No 95-751-816
+GAME( 199?, sc2copsc1 , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-816
+GAME( 199?, sc2copsc1p , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-816
+GAME( 199?, sc2copsc1pa , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Casino Cops 'n' Robbers (Bellfruit) (set 2, Protocol) (Scorpion 2/3) (alt matrix rom)", GAME_FLAGS) // GAME No 95-751-816
/********************************************************************************************************************************************************************************************************************
@@ -8489,25 +8489,25 @@ GAME( 199?, sc2copsc1pa , sc2cops , scorpion2_dm01 , drwho , bfm_sc2_state, of
********************************************************************************************************************************************************************************************************************/
// PROJECT PR6332 CLUB COPS AND ROBBERS DELUXE - 17-NOV-1995 12:36:04
-GAME( 199?, sc2copdc5 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 1, UK, 200GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-561
-GAME( 199?, sc2copdc5p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 1, UK, 200GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-561
+GAME( 199?, sc2copdc5 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 1, UK, 200GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-561
+GAME( 199?, sc2copdc5p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 1, UK, 200GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-561
// PROJECT PR6588 CLUB COPS AND ROBBERS DELUXE 25P/#250 - 17-NOV-1995 13:18:57
-GAME( 199?, sc2copdc6 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-562
+GAME( 199?, sc2copdc6 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-562
// PROJECT PR6588 CLUB COPS AND ROBBERS DELUXE 25P/#250 65% - 30-NOV-1995 16:14:25
-GAME( 199?, sc2copdc1 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 3, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-574
-GAME( 199?, sc2copdc1p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 3, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-574
+GAME( 199?, sc2copdc1 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 3, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-574
+GAME( 199?, sc2copdc1p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 3, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-574
// PROJECT NUMBER 6588 CLUB COPS AND ROBBERS DELUXE 20P/#250 - 25-MAR-1996 13:57:23
-GAME( 199?, sc2copdc2 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 4, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-658
-GAME( 199?, sc2copdc2p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 4, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-658
+GAME( 199?, sc2copdc2 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 4, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-658
+GAME( 199?, sc2copdc2p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 4, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-658
// PROJECT PR6588 CLUB COPS AND ROBBERS DELUXE 25P/#250 - 13-AUG-1996 14:01:25
-GAME( 199?, sc2copdc3 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 5, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-842
-GAME( 199?, sc2copdc3p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 5, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-842
+GAME( 199?, sc2copdc3 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 5, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-842
+GAME( 199?, sc2copdc3p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 5, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-842
// PROJECT PR6588 CLUB COPS AND ROBBERS DELUXE 25P/#250 63% - 25-SEP-1997 08:30:05
-GAME( 199?, sc2copdc4 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 6, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-993
-GAME( 199?, sc2copdc4p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 6, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-993
+GAME( 199?, sc2copdc4 , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 6, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-993
+GAME( 199?, sc2copdc4p , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 6, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-993
// PROJECT PR6588 CLUB COPS AND ROBBERS DELUXE 25P/#250 67% - 25-SEP-1997 08:33:14
-GAME( 199?, sc2copdc , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 7, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-992
-GAME( 199?, sc2copdcp , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 7, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-992
+GAME( 199?, sc2copdc , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 7, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-992
+GAME( 199?, sc2copdcp , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Cops 'n' Robbers Club Deluxe (Bellfruit) (set 7, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-992
/********************************************************************************************************************************************************************************************************************
@@ -8517,21 +8517,21 @@ GAME( 199?, sc2copdcp , sc2copdc , scorpion2_dm01 , drwho , bfm_sc2_state, ofa
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6201 ROUND THE TOWN - 4-MAR-1993 11:05:07
-GAME( 199?, sc2town4 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-052
+GAME( 199?, sc2town4 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-052
// PROJECT NUMBER 6201 ROUND THE TOWN IRISH ALL CASH - 1-APR-1993 14:44:50
-GAME( 199?, sc2town2 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-069
+GAME( 199?, sc2town2 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-069
// PROJECT NUMBER 6620 (6201) ROUND THE TOWN S&P - 15-DEC-1995 14:50:50
-GAME( 199?, sc2town3 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-591
-GAME( 199?, sc2town3p , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-591
+GAME( 199?, sc2town3 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-591
+GAME( 199?, sc2town3p , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 3, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-591
// PROJECT NUMBER 6620 (6201) ROUND THE TOWN (ARCADE/HIGH TOKEN) - 18-DEC-1995 15:59:22
-GAME( 199?, sc2town1 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 4) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-592
-GAME( 199?, sc2town1a , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 4, alt) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-592
-GAME( 199?, sc2town1p , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 4, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-592
+GAME( 199?, sc2town1 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 4) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-592
+GAME( 199?, sc2town1a , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 4, alt) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-592
+GAME( 199?, sc2town1p , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 4, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-592
// PROJECT NUMBER 6620 (6201) ROUND THE TOWN S&P IRISH AC - 5-MAR-1996 12:05:06
-GAME( 199?, sc2town5 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-642
+GAME( 199?, sc2town5 , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-642
// PROJECT NUMBER 6620 (6201) ROUND THE TOWN #10 AC - 15-MAR-1996 12:07:18
-GAME( 199?, sc2town , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 6) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-654
-GAME( 199?, sc2townp , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 6, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-654
+GAME( 199?, sc2town , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 6) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-654
+GAME( 199?, sc2townp , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Round The Town (Bellfruit) (set 6, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-654
// PROJECT NUMBER 6620 (6201) ROUND THE TOWN (ARCADE/HIGH TOKEN) - 18-DEC-1995 15:59:22
@@ -8540,15 +8540,15 @@ GAME( 199?, sc2townp , sc2town , scorpion2_dm01 , drwho , bfm_sc2_state, ofah
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6207 ONLY FOOLS AND HORSES - 14-OCT-1993 15:28:16
-GAME( 199?, sc2ofool1 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-147
+GAME( 199?, sc2ofool1 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-147
// PROJECT NUMBER 6207 ONLY FOOLS AND HORSES ALL CASH - 29-OCT-1993 13:00:02
-GAME( 199?, sc2ofool3 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-151
+GAME( 199?, sc2ofool3 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-151
// PROJECT NUMBER 6207 ONLY FOOLS AND HORSES - 18-NOV-1993 14:32:21
-GAME( 199?, sc2ofool , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-159
+GAME( 199?, sc2ofool , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 3) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-159
// PROJECT NUMBER 6207 ONLY FOOLS AND HORSES ALL CASH - 18-NOV-1993 16:12:34
-GAME( 199?, sc2ofool2 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 4) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-162
+GAME( 199?, sc2ofool2 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 4) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-162
// PROJECT NUMBER 6207 ONLY FOOLS AND HORSES ARCADE 10P PLAY - 14-DEC-1993 14:51:34
-GAME( 199?, sc2ofool4 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-177
+GAME( 199?, sc2ofool4 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Only Fools & Horses (Bellfruit) (set 5) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-177
/********************************************************************************************************************************************************************************************************************
@@ -8556,10 +8556,10 @@ GAME( 199?, sc2ofool4 , sc2ofool , scorpion2_dm01 , drwho , bfm_sc2_state, ofa
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6221 PARTY TIME BINGO SCORPION 2 - 10-JUN-1993 14:26:26
-GAME( 199?, sc2ptytm1 , sc2ptytm , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Party Time (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-092
+GAME( 199?, sc2ptytm1 , sc2ptytm , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Party Time (Bellfruit) (set 1) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-092
// PROJECT NUMBER 6221 PARTY TIME BINGO SCORPION 2 #4 ALL CASH 10P PLAY - 1-JUL-1996 12:02:22
-GAME( 199?, sc2ptytm , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Party Time (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-806
-GAME( 199?, sc2ptytmp , sc2ptytm , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Party Time (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-806
+GAME( 199?, sc2ptytm , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Party Time (Bellfruit) (set 2) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-806
+GAME( 199?, sc2ptytmp , sc2ptytm , scorpion2_dm01 , drwho , bfm_sc2_state, ofah , 0, "BFM", "Party Time (Bellfruit) (set 2, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-806
/********************************************************************************************************************************************************************************************************************
@@ -8567,7 +8567,7 @@ GAME( 199?, sc2ptytmp , sc2ptytm , scorpion2_dm01 , drwho , bfm_sc2_state, ofa
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6172 ALONG THE PROM SINGLE SITE - 30-MAR-1993 12:03:27
-GAME( 199?, sc2prom , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Along The Prom (Bellfruit) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-062
+GAME( 199?, sc2prom , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Along The Prom (Bellfruit) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-062
/********************************************************************************************************************************************************************************************************************
@@ -8575,12 +8575,12 @@ GAME( 199?, sc2prom , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER PR6432 PREMIER CLUB MANAGER - 26-JAN-1996 11:52:43
-GAME( 199?, sc2prem2 , sc2prem , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-616
+GAME( 199?, sc2prem2 , sc2prem , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-616
// PROJECT NUMBER PR6432 PREMIER CLUB MANAGER 25P !250 - 13-AUG-1996 14:05:05
-GAME( 199?, sc2prem , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-848
+GAME( 199?, sc2prem , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-848
// PROJECT NUMBER PR6432 PREMIER CLUB MANAGER - 20-AUG-1996 10:06:44
-GAME( 199?, sc2prem1 , sc2prem , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-847
-GAME( 199?, sc2prem1p , sc2prem , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-847
+GAME( 199?, sc2prem1 , sc2prem , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 3, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-847
+GAME( 199?, sc2prem1p , sc2prem , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Premier Club Manager (Bellfruit) (set 3, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-847
/********************************************************************************************************************************************************************************************************************
Golden Casino Club
@@ -8588,14 +8588,14 @@ GAME( 199?, sc2prem1p , sc2prem , scorpion2_dm01 , drwho , bfm_sc2_state, prom
********************************************************************************************************************************************************************************************************************/
// PROJECT NUMBER 6632 GOLDEN CASINO VAR STAKE/JACKPOT - 12-FEB-1997 15:54:10
-GAME( 199?, sc2gcclb2 , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-927
-GAME( 199?, sc2gcclb2p , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-927
+GAME( 199?, sc2gcclb2 , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 1, UK) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-927
+GAME( 199?, sc2gcclb2p , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 1, UK, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-927
// PROJECT NUMBER 6632 GOLDEN CASINO 20P STAKE/#250 JACKPOT - 12-FEB-1997 15:56:05
-GAME( 199?, sc2gcclb , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-928
-GAME( 199?, sc2gcclbp , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-928
+GAME( 199?, sc2gcclb , 0 , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 2, UK, 250GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-928
+GAME( 199?, sc2gcclbp , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 2, UK, 250GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-928
// PROJECT NUMBER 6632 GOLDEN CASINO 5P STAKE/#100 JACKPOT - 12-FEB-1997 15:57:23
-GAME( 199?, sc2gcclb1 , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 3, UK, 100GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-929
-GAME( 199?, sc2gcclb1p , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 3, UK, 100GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-929
+GAME( 199?, sc2gcclb1 , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 3, UK, 100GBP Jackpot) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-750-929
+GAME( 199?, sc2gcclb1p , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, prom , 0, "BFM", "Golden Casino Club (Bellfruit) (set 3, UK, 100GBP Jackpot, Protocol) (Scorpion 2/3)", GAME_FLAGS) // GAME No 95-751-929
/********************************************************************************************************************************************************************************************************************
@@ -8613,52 +8613,52 @@ GAME( 199?, sc2gcclb1p , sc2gcclb , scorpion2_dm01 , drwho , bfm_sc2_state, p
// these need inverted service door, and seem to have some issues with the reels jumping between 2 values?
-GAME( 199?, sc2goldr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Gold Reserve (Mdm) (v1.3) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2goldrp , sc2goldr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Gold Reserve (Mdm) (v1.3 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2goldr1 , sc2goldr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Gold Reserve (Mdm) (set 2) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2goldr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Gold Reserve (Mdm) (v1.3) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2goldrp , sc2goldr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Gold Reserve (Mdm) (v1.3 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2goldr1 , sc2goldr , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Gold Reserve (Mdm) (set 2) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2hifly , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v4.1) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2hifly2 , sc2hifly , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v3.1) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2hifly3 , sc2hifly , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v2.1) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2hifly4 , sc2hifly , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v?.?) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2hifly , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v4.1) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2hifly2 , sc2hifly , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v3.1) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2hifly3 , sc2hifly , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v2.1) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2hifly4 , sc2hifly , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "High Flyer (Mdm) (v?.?) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2scc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Safe Cracker Club (Mdm) (v4.4) (Scorpion 2/3)", GAME_FLAGS) // also marked as 'GLOBAL'?
+GAME( 199?, sc2scc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Mdm", "Safe Cracker Club (Mdm) (v4.4) (Scorpion 2/3)", GAME_FLAGS) // also marked as 'GLOBAL'?
// custom Global sound system?
-GAME( 199?, sc2dick , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v3.1) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2dickp , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v3.1 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2dick1 , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v2.2) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2dick2 , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v1.5) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2dick2p , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v1.5 Protocol ) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2dick2e , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v?.? Euro) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2dick2eu , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v?.? Euro unencrypted) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2dick , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v3.1) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2dickp , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v3.1 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2dick1 , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v2.2) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2dick2 , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v1.5) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2dick2p , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v1.5 Protocol ) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2dick2e , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v?.? Euro) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2dick2eu , sc2dick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Spotted Dick (Global) (v?.? Euro unencrypted) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2pick , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Global) (v2.3) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2pickp , sc2pick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Global) (v2.3 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2pick , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Global) (v2.3) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2pickp , sc2pick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Global) (v2.3 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2pickc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Club?) (Global) (v1.9) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2pickcp , sc2pick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Club?) (Global) (v1.9 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2pickc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Club?) (Global) (v1.9) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2pickcp , sc2pick , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "Pick Of The Bunch (Club?) (Global) (v1.9 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2rock , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.5) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2rockp , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.5 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2rock1 , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.4) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2rock1p , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.4 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2rocke , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v?.? Euro) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2rock , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.5) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2rockp , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.5 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2rock1 , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.4) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2rock1p , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v1.4 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2rocke , sc2rock , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "How Big's Your Rock? (Global) (v?.? Euro) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2call , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Global) (v2.7) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2callp , sc2call , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Global) (v2.7 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2call , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Global) (v2.7) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2callp , sc2call , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Global) (v2.7 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2callc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Club?) (Global) (v1.6) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2callcp , sc2callc , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Club?) (Global) (v1.6 Protocol) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2callc , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Club?) (Global) (v1.6) (Scorpion 2/3)", GAME_FLAGS)
+GAME( 199?, sc2callcp , sc2callc , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Global", "It's Your Call (Club?) (Global) (v1.6 Protocol) (Scorpion 2/3)", GAME_FLAGS)
-GAME( 199?, sc2bar7 , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Bar 7 (Concept)", GAME_FLAGS)
-GAME( 199?, sc2bbar7 , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Big Bar 7 (Concept)", GAME_FLAGS)
-GAME( 199?, sc2flutr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Flutter (Concept)", GAME_FLAGS) // not a game, but a link unit?
-GAME( 199?, sc2smnud , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Multi Nudger (Concept)", GAME_FLAGS)
+GAME( 199?, sc2bar7 , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Bar 7 (Concept)", GAME_FLAGS)
+GAME( 199?, sc2bbar7 , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Big Bar 7 (Concept)", GAME_FLAGS)
+GAME( 199?, sc2flutr , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Flutter (Concept)", GAME_FLAGS) // not a game, but a link unit?
+GAME( 199?, sc2smnud , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Multi Nudger (Concept)", GAME_FLAGS)
//Seems to be plain Scorpion 2 - keeps tripping watchdog?
-GAME( 199?, sc2scshx , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Cash X (Concept)", GAME_FLAGS)
-GAME( 199?, sc2sghst , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Ghost (Concept)", GAME_FLAGS)
-GAME( 199?, sc2scshxgman, sc2scshx , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Cash X (Concept) (Gamesman Hardware)", GAME_FLAGS)
-GAME( 199?, sc2scshxstar, sc2scshx , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Cash X (Concept) (Starpoint Hardware)", GAME_FLAGS)
-GAME( 199?, sc2scshxcas, sc2scshx , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Casino Cash X (Concept)", GAME_FLAGS)
+GAME( 199?, sc2scshx , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Cash X (Concept)", GAME_FLAGS)
+GAME( 199?, sc2sghst , 0 , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Ghost (Concept)", GAME_FLAGS)
+GAME( 199?, sc2scshxgman, sc2scshx , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Cash X (Concept) (Gamesman Hardware)", GAME_FLAGS)
+GAME( 199?, sc2scshxstar, sc2scshx , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Cash X (Concept) (Starpoint Hardware)", GAME_FLAGS)
+GAME( 199?, sc2scshxcas, sc2scshx , scorpion2 , drwho , bfm_sc2_state, drwho , 0, "Concept", "Super Casino Cash X (Concept)", GAME_FLAGS)
diff --git a/src/mame/drivers/bfm_sc4.c b/src/mame/drivers/bfm_sc4.c
index 77505202cfa..e67fde5b25d 100644
--- a/src/mame/drivers/bfm_sc4.c
+++ b/src/mame/drivers/bfm_sc4.c
@@ -246,8 +246,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4)
// help identify roms where one of the pair is missing too
if (!found)
{
- found = find_project_string(machine(), 1, 1);
- found = find_project_string(machine(), 1, 2);
+ found = find_project_string(machine(), 1, 1);
+ found = find_project_string(machine(), 1, 2);
}
if (!found)
@@ -2529,33 +2529,33 @@ ROM_START( sc4cckeyk )
ROM_END
ROM_START( sc4cckeyl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412918.lo", 0x00001, 0x080000, CRC(b268d275) SHA1(70b31512c0d8c8e0bf644fa1d5ea723c35c2a629) )
- ROM_LOAD16_BYTE( "95412919.hi", 0x00000, 0x080000, CRC(d96df890) SHA1(65f8d2b4840efd5c3fe65b00ecbf2df7ac81cbe6) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412918.lo", 0x00001, 0x080000, CRC(b268d275) SHA1(70b31512c0d8c8e0bf644fa1d5ea723c35c2a629) )
+ ROM_LOAD16_BYTE( "95412919.hi", 0x00000, 0x080000, CRC(d96df890) SHA1(65f8d2b4840efd5c3fe65b00ecbf2df7ac81cbe6) )
sc_cckey_others
ROM_END
ROM_START( sc4cckeym )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412920.lo", 0x00001, 0x080000, CRC(e047005e) SHA1(b3de1d863cda1945e1207b3df51a8b5172e65bb8) )
- ROM_LOAD16_BYTE( "95412921.hi", 0x00000, 0x080000, CRC(7b903100) SHA1(1df4a5ded5cc195ee020f302870eb8bf4c8a14d3) )
- sc_cckey_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412920.lo", 0x00001, 0x080000, CRC(e047005e) SHA1(b3de1d863cda1945e1207b3df51a8b5172e65bb8) )
+ ROM_LOAD16_BYTE( "95412921.hi", 0x00000, 0x080000, CRC(7b903100) SHA1(1df4a5ded5cc195ee020f302870eb8bf4c8a14d3) )
+ sc_cckey_others
ROM_END
ROM_START( sc4cckeyn )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413918.lo", 0x00001, 0x080000, CRC(9062cdaa) SHA1(b8249ca6590aef5041315f1dbbdc019ffb5e8ac2) )
- ROM_LOAD16_BYTE( "95413919.hi", 0x00000, 0x080000, CRC(de714343) SHA1(95f605d91e43c3bcd2a2799ecf385f1e75cc5413) )
- sc_cckey_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413918.lo", 0x00001, 0x080000, CRC(9062cdaa) SHA1(b8249ca6590aef5041315f1dbbdc019ffb5e8ac2) )
+ ROM_LOAD16_BYTE( "95413919.hi", 0x00000, 0x080000, CRC(de714343) SHA1(95f605d91e43c3bcd2a2799ecf385f1e75cc5413) )
+ sc_cckey_others
ROM_END
ROM_START( sc4cckeyo )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413920.lo", 0x00001, 0x080000, CRC(deae622a) SHA1(7f8f7b93c734278d24f69fd4a491b3d4133d8b1d) )
- ROM_LOAD16_BYTE( "95413921.hi", 0x00000, 0x080000, CRC(92671c85) SHA1(4444e3a54393f8fb824eeebfed8f2cbaf07e83ea) )
- sc_cckey_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413920.lo", 0x00001, 0x080000, CRC(deae622a) SHA1(7f8f7b93c734278d24f69fd4a491b3d4133d8b1d) )
+ ROM_LOAD16_BYTE( "95413921.hi", 0x00000, 0x080000, CRC(92671c85) SHA1(4444e3a54393f8fb824eeebfed8f2cbaf07e83ea) )
+ sc_cckey_others
ROM_END
@@ -3218,17 +3218,17 @@ ROM_START( sc4crcph )
ROM_END
ROM_START( sc4crcpi )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95426474.lo", 0x00001, 0x080000, CRC(aa0a4d1d) SHA1(20ad278517287b3cbcd9f8275814635ea3ecb766) )
- ROM_LOAD16_BYTE( "95426475.hi", 0x00000, 0x080000, CRC(ec216472) SHA1(19c4806834348d68e5d80234cd14ecde9cf8112c) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95426474.lo", 0x00001, 0x080000, CRC(aa0a4d1d) SHA1(20ad278517287b3cbcd9f8275814635ea3ecb766) )
+ ROM_LOAD16_BYTE( "95426475.hi", 0x00000, 0x080000, CRC(ec216472) SHA1(19c4806834348d68e5d80234cd14ecde9cf8112c) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4crcpj )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95427474.lo", 0x00001, 0x080000, CRC(e73365df) SHA1(6d8d918368350da76eec60b71c0dab6de7b970c7) )
- ROM_LOAD16_BYTE( "95427475.hi", 0x00000, 0x080000, CRC(58fd6031) SHA1(beef4a6fd5e0d7bc68e9628073c0ce0035bd9168) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95427474.lo", 0x00001, 0x080000, CRC(e73365df) SHA1(6d8d918368350da76eec60b71c0dab6de7b970c7) )
+ ROM_LOAD16_BYTE( "95427475.hi", 0x00000, 0x080000, CRC(58fd6031) SHA1(beef4a6fd5e0d7bc68e9628073c0ce0035bd9168) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
@@ -3642,40 +3642,40 @@ ROM_START( sc4cclimp )
ROM_END
ROM_START( sc4cclimq )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412772.lo", 0x00001, 0x080000, CRC(905a1d80) SHA1(04aee5ffb26a3f8c6def2f725f08ca1d8e6b61fd) )
- ROM_LOAD16_BYTE( "95412773.hi", 0x00000, 0x080000, CRC(4aa622ee) SHA1(e999a9ae0e8ef2eb73a9115cd7bf7a8e3904a40b) )
- sc_cclim_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412772.lo", 0x00001, 0x080000, CRC(905a1d80) SHA1(04aee5ffb26a3f8c6def2f725f08ca1d8e6b61fd) )
+ ROM_LOAD16_BYTE( "95412773.hi", 0x00000, 0x080000, CRC(4aa622ee) SHA1(e999a9ae0e8ef2eb73a9115cd7bf7a8e3904a40b) )
+ sc_cclim_others
ROM_END
ROM_START( sc4cclimr )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412777.hi", 0x00000, 0x080000, CRC(e0e74ca2) SHA1(797fda3a4634bdd3f8ab0b31f7b880c8dbf23904) )
- ROM_LOAD16_BYTE( "95412776.lo", 0x00001, 0x080000, CRC(4aac0ecd) SHA1(192cce8dfc93f44063134bae948d29d10528b83e) )
- sc_cclim_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412777.hi", 0x00000, 0x080000, CRC(e0e74ca2) SHA1(797fda3a4634bdd3f8ab0b31f7b880c8dbf23904) )
+ ROM_LOAD16_BYTE( "95412776.lo", 0x00001, 0x080000, CRC(4aac0ecd) SHA1(192cce8dfc93f44063134bae948d29d10528b83e) )
+ sc_cclim_others
ROM_END
ROM_START( sc4cclims )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412780.lo", 0x00001, 0x080000, CRC(978b1de6) SHA1(e601fbcb188a170f82b9e1092328cb5aea41b899) )
- ROM_LOAD16_BYTE( "95412781.hi", 0x00000, 0x080000, CRC(7b241139) SHA1(62bbf20c3ad5ac251a0e0e017ca0b380ebf671b9) )
- sc_cclim_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412780.lo", 0x00001, 0x080000, CRC(978b1de6) SHA1(e601fbcb188a170f82b9e1092328cb5aea41b899) )
+ ROM_LOAD16_BYTE( "95412781.hi", 0x00000, 0x080000, CRC(7b241139) SHA1(62bbf20c3ad5ac251a0e0e017ca0b380ebf671b9) )
+ sc_cclim_others
ROM_END
ROM_START( sc4cclimt )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413772.lo", 0x00001, 0x080000, CRC(3edcdd60) SHA1(40e30b4aba9fc05c781fba6a9d2089dcf1962a76) )
- ROM_LOAD16_BYTE( "95413773.hi", 0x00000, 0x080000, CRC(6da80d25) SHA1(3467e24b60e0f6a7ae07555fc54a8a5bc3f25fed) )
- sc_cclim_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413772.lo", 0x00001, 0x080000, CRC(3edcdd60) SHA1(40e30b4aba9fc05c781fba6a9d2089dcf1962a76) )
+ ROM_LOAD16_BYTE( "95413773.hi", 0x00000, 0x080000, CRC(6da80d25) SHA1(3467e24b60e0f6a7ae07555fc54a8a5bc3f25fed) )
+ sc_cclim_others
ROM_END
ROM_START( sc4cclimu )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413776.lo", 0x00001, 0x080000, CRC(4d339ce0) SHA1(f3152fbd69d277dd0e32179ab4f0c0b7148faa0b) )
- ROM_LOAD16_BYTE( "95413777.hi", 0x00000, 0x080000, CRC(5875fc90) SHA1(996df61833df07f512c1039563917d40e6788f87) )
- sc_cclim_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413776.lo", 0x00001, 0x080000, CRC(4d339ce0) SHA1(f3152fbd69d277dd0e32179ab4f0c0b7148faa0b) )
+ ROM_LOAD16_BYTE( "95413777.hi", 0x00000, 0x080000, CRC(5875fc90) SHA1(996df61833df07f512c1039563917d40e6788f87) )
+ sc_cclim_others
ROM_END
ROM_START( sc4cfqps )
@@ -3765,35 +3765,35 @@ ROM_END
ROM_START( sc4cfqpsl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95400731.lo", 0x00001, 0x080000, CRC(af64d3e8) SHA1(4bc3c91cd2f686dbc208d197e22d37c8d5a81216) )
ROM_LOAD16_BYTE( "95400732.hi", 0x00000, 0x080000, CRC(a80fde0f) SHA1(8b99e38aab8b845dfb26555448f1ca669b737ea1) )
sc_cfqps_others
ROM_END
ROM_START( sc4cfqpsm )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95400733.lo", 0x00001, 0x080000, CRC(a75e21b7) SHA1(526a1d0d2cb7848310beb418f63cd69606e0f158) )
ROM_LOAD16_BYTE( "95400734.hi", 0x00000, 0x080000, CRC(e6f35697) SHA1(816acbbb254f83030a911928300a6fa244177f51) )
sc_cfqps_others
ROM_END
ROM_START( sc4cfqpsn )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95401731.lo", 0x00001, 0x080000, CRC(11d8d978) SHA1(b84a3e9ea1d282de05d73b48d20b2a0f49c5384d) )
ROM_LOAD16_BYTE( "95401732.hi", 0x00000, 0x080000, CRC(796f1e36) SHA1(ec1fc7b9384d7384b5873c572d35cb39de1239ae) )
sc_cfqps_others
ROM_END
ROM_START( sc4cfqpso )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95401733.lo", 0x00001, 0x080000, CRC(d9b4d65e) SHA1(07196de44372ed477f7b8be40585ab9c01961f8a) )
ROM_LOAD16_BYTE( "95401734.hi", 0x00000, 0x080000, CRC(17ef0211) SHA1(8d21e5b5a3282fcdd5f6847d860c8c673a71431b) )
sc_cfqps_others
ROM_END
ROM_START( sc4cfqpsp )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "crfr15hi", 0x00000, 0x080000, CRC(a33f7f3e) SHA1(157f1ad656a423070dbf8f21330ac0382a6e1898) )
ROM_LOAD16_BYTE( "crfr15lo", 0x00001, 0x080000, CRC(1683f3ef) SHA1(207c92942961ef7590fc4573bc91c9a16e5b9bda) )
sc_cfqps_others
@@ -3816,193 +3816,193 @@ ROM_END
ROM_START( sc4cfcasa )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95410450.lo", 0x00001, 0x080000, CRC(fc8a8427) SHA1(63bd12570a4f9d0a29e7e05a833976697db68e15) )
- ROM_LOAD16_BYTE( "95410451.hi", 0x00000, 0x080000, CRC(99e8270f) SHA1(4529aecc88afc4739ddd5fd072241d577c455a8f) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95410450.lo", 0x00001, 0x080000, CRC(fc8a8427) SHA1(63bd12570a4f9d0a29e7e05a833976697db68e15) )
+ ROM_LOAD16_BYTE( "95410451.hi", 0x00000, 0x080000, CRC(99e8270f) SHA1(4529aecc88afc4739ddd5fd072241d577c455a8f) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasb )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95410453.hi", 0x00000, 0x080000, CRC(83ceb620) SHA1(a47f4972ef26593e0b9ce13ea4b3f1dc439925f5) )
- ROM_LOAD16_BYTE( "95410452.lo", 0x00001, 0x080000, CRC(59a7f7cd) SHA1(1a40c341f4797e7ec8441f31bc83a59f37eba8fa) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95410453.hi", 0x00000, 0x080000, CRC(83ceb620) SHA1(a47f4972ef26593e0b9ce13ea4b3f1dc439925f5) )
+ ROM_LOAD16_BYTE( "95410452.lo", 0x00001, 0x080000, CRC(59a7f7cd) SHA1(1a40c341f4797e7ec8441f31bc83a59f37eba8fa) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasc )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95410530.lo", 0x00001, 0x080000, CRC(0559f269) SHA1(7c9766294f64f35e337796a24955d916231ed89d) )
- ROM_LOAD16_BYTE( "95410531.hi", 0x00000, 0x080000, CRC(5f204ab2) SHA1(b4ba89d8d90175c68eac5346f51dd59465415d69) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95410530.lo", 0x00001, 0x080000, CRC(0559f269) SHA1(7c9766294f64f35e337796a24955d916231ed89d) )
+ ROM_LOAD16_BYTE( "95410531.hi", 0x00000, 0x080000, CRC(5f204ab2) SHA1(b4ba89d8d90175c68eac5346f51dd59465415d69) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasd )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95410532.lo", 0x00001, 0x080000, CRC(022b90e3) SHA1(dd8823b75a90896ee843139b696ee5e73f299a87) )
- ROM_LOAD16_BYTE( "95410533.hi", 0x00000, 0x080000, CRC(af410ed5) SHA1(38bbd77789c9db49861dbf72cd23443ad5cfedfb) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95410532.lo", 0x00001, 0x080000, CRC(022b90e3) SHA1(dd8823b75a90896ee843139b696ee5e73f299a87) )
+ ROM_LOAD16_BYTE( "95410533.hi", 0x00000, 0x080000, CRC(af410ed5) SHA1(38bbd77789c9db49861dbf72cd23443ad5cfedfb) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcase )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95411450.lo", 0x00001, 0x080000, CRC(11cef6cf) SHA1(5364455b3ea34a11844b3b42c1a45a15c2bf126c) )
- ROM_LOAD16_BYTE( "95411451.hi", 0x00000, 0x080000, CRC(f6d4c9e3) SHA1(5011b066375c7faa408ffbd1965c3b5d46836a72) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95411450.lo", 0x00001, 0x080000, CRC(11cef6cf) SHA1(5364455b3ea34a11844b3b42c1a45a15c2bf126c) )
+ ROM_LOAD16_BYTE( "95411451.hi", 0x00000, 0x080000, CRC(f6d4c9e3) SHA1(5011b066375c7faa408ffbd1965c3b5d46836a72) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasf )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95411452.lo", 0x00001, 0x080000, CRC(9bd4d90f) SHA1(3a0c3e66a937ecf6d92cd2937a8d942cc40cf436) )
- ROM_LOAD16_BYTE( "95411453.hi", 0x00000, 0x080000, CRC(d2c3aa4a) SHA1(a23c425f2df44525a4d1d95bdfd7ce4985f6a475) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95411452.lo", 0x00001, 0x080000, CRC(9bd4d90f) SHA1(3a0c3e66a937ecf6d92cd2937a8d942cc40cf436) )
+ ROM_LOAD16_BYTE( "95411453.hi", 0x00000, 0x080000, CRC(d2c3aa4a) SHA1(a23c425f2df44525a4d1d95bdfd7ce4985f6a475) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasg )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95411530.lo", 0x00001, 0x080000, CRC(3543eb62) SHA1(d0b7afb5e731fbfd12109ba090037d98c69b8a26) )
- ROM_LOAD16_BYTE( "95411531.hi", 0x00000, 0x080000, CRC(3c7955db) SHA1(41e92ed095c81e2f635d1a939c26bbe160eae756) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95411530.lo", 0x00001, 0x080000, CRC(3543eb62) SHA1(d0b7afb5e731fbfd12109ba090037d98c69b8a26) )
+ ROM_LOAD16_BYTE( "95411531.hi", 0x00000, 0x080000, CRC(3c7955db) SHA1(41e92ed095c81e2f635d1a939c26bbe160eae756) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcash )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95411532.lo", 0x00001, 0x080000, CRC(525652ce) SHA1(da5a87c2ac2c2387f267837ceaaf6fbb42019036) )
- ROM_LOAD16_BYTE( "95411533.hi", 0x00000, 0x080000, CRC(2834b509) SHA1(e50e94bda43814268d95cddb42a586bdf73b5efb) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95411532.lo", 0x00001, 0x080000, CRC(525652ce) SHA1(da5a87c2ac2c2387f267837ceaaf6fbb42019036) )
+ ROM_LOAD16_BYTE( "95411533.hi", 0x00000, 0x080000, CRC(2834b509) SHA1(e50e94bda43814268d95cddb42a586bdf73b5efb) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasi )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412738.lo", 0x00001, 0x080000, CRC(3d4acd70) SHA1(3c8396c51b584bf651f7da99fba055ba39d22af9) )
- ROM_LOAD16_BYTE( "95412739.hi", 0x00000, 0x080000, CRC(4d66828e) SHA1(456bd9038fb329c821eb4fd6d19fd41cc6d1ac93) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412738.lo", 0x00001, 0x080000, CRC(3d4acd70) SHA1(3c8396c51b584bf651f7da99fba055ba39d22af9) )
+ ROM_LOAD16_BYTE( "95412739.hi", 0x00000, 0x080000, CRC(4d66828e) SHA1(456bd9038fb329c821eb4fd6d19fd41cc6d1ac93) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasj )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412740.lo", 0x00001, 0x080000, CRC(0840e5f9) SHA1(b5dfb30eb91e9f1133fd7ac58ff00186602fc64d) )
- ROM_LOAD16_BYTE( "95412741.hi", 0x00000, 0x080000, CRC(23a85755) SHA1(5ed609ae4ac78294a11fbccd0a024513f97c7d72) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412740.lo", 0x00001, 0x080000, CRC(0840e5f9) SHA1(b5dfb30eb91e9f1133fd7ac58ff00186602fc64d) )
+ ROM_LOAD16_BYTE( "95412741.hi", 0x00000, 0x080000, CRC(23a85755) SHA1(5ed609ae4ac78294a11fbccd0a024513f97c7d72) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcask )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412754.lo", 0x00001, 0x080000, CRC(9a98fa55) SHA1(5db2401b1bf5904dffc771b54676e87c8eb279a7) )
- ROM_LOAD16_BYTE( "95412755.hi", 0x00000, 0x080000, CRC(9495327b) SHA1(91571feb8d7718bee50ac29f29ef79628f9119cc) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412754.lo", 0x00001, 0x080000, CRC(9a98fa55) SHA1(5db2401b1bf5904dffc771b54676e87c8eb279a7) )
+ ROM_LOAD16_BYTE( "95412755.hi", 0x00000, 0x080000, CRC(9495327b) SHA1(91571feb8d7718bee50ac29f29ef79628f9119cc) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412764.lo", 0x00001, 0x080000, CRC(46e535cc) SHA1(016232c6b235338f3affe913df08e13889d85f8d) )
- ROM_LOAD16_BYTE( "95412765.hi", 0x00000, 0x080000, CRC(e907ee58) SHA1(9e9988b3c1f8fb4188a8e48338ece87a23181b87) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412764.lo", 0x00001, 0x080000, CRC(46e535cc) SHA1(016232c6b235338f3affe913df08e13889d85f8d) )
+ ROM_LOAD16_BYTE( "95412765.hi", 0x00000, 0x080000, CRC(e907ee58) SHA1(9e9988b3c1f8fb4188a8e48338ece87a23181b87) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasm )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412766.lo", 0x00001, 0x080000, CRC(32339b1f) SHA1(5cdcf2e88bf887d7acc0a33b27ed722d5cba0dfd) )
- ROM_LOAD16_BYTE( "95412767.hi", 0x00000, 0x080000, CRC(8f43e454) SHA1(c4fd0f210fc7074d435362162306b574d8a63d14) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412766.lo", 0x00001, 0x080000, CRC(32339b1f) SHA1(5cdcf2e88bf887d7acc0a33b27ed722d5cba0dfd) )
+ ROM_LOAD16_BYTE( "95412767.hi", 0x00000, 0x080000, CRC(8f43e454) SHA1(c4fd0f210fc7074d435362162306b574d8a63d14) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasn )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413738.lo", 0x00001, 0x080000, CRC(1367c7a9) SHA1(5089435b654173d3005d583fa530eda9a192937d) )
- ROM_LOAD16_BYTE( "95413739.hi", 0x00000, 0x080000, CRC(eb8885e8) SHA1(0cc3d06956bfba56a1ed7315fe4fe3617d484b8f) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413738.lo", 0x00001, 0x080000, CRC(1367c7a9) SHA1(5089435b654173d3005d583fa530eda9a192937d) )
+ ROM_LOAD16_BYTE( "95413739.hi", 0x00000, 0x080000, CRC(eb8885e8) SHA1(0cc3d06956bfba56a1ed7315fe4fe3617d484b8f) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcaso )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413740.lo", 0x00001, 0x080000, CRC(5a6465d1) SHA1(9981d9cf86514617a8aa3cb6730e0543b929399e) )
- ROM_LOAD16_BYTE( "95413741.hi", 0x00000, 0x080000, CRC(7655f0d1) SHA1(9d64022d5ea8407eaa5a1d94dede93744845c83a) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413740.lo", 0x00001, 0x080000, CRC(5a6465d1) SHA1(9981d9cf86514617a8aa3cb6730e0543b929399e) )
+ ROM_LOAD16_BYTE( "95413741.hi", 0x00000, 0x080000, CRC(7655f0d1) SHA1(9d64022d5ea8407eaa5a1d94dede93744845c83a) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasp )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413754.lo", 0x00001, 0x080000, CRC(17404e08) SHA1(d90399b069328200ff76663062dba12f3394e842) )
- ROM_LOAD16_BYTE( "95413755.hi", 0x00000, 0x080000, CRC(861fb2d1) SHA1(2e4555e8754dbb758819dfa9c1a2e3eb09eacf5f) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413754.lo", 0x00001, 0x080000, CRC(17404e08) SHA1(d90399b069328200ff76663062dba12f3394e842) )
+ ROM_LOAD16_BYTE( "95413755.hi", 0x00000, 0x080000, CRC(861fb2d1) SHA1(2e4555e8754dbb758819dfa9c1a2e3eb09eacf5f) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasq )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413762.lo", 0x00001, 0x080000, CRC(f1e94a7f) SHA1(1c8e0579b61d558ee862b948df3c08812b61b3eb) )
- ROM_LOAD16_BYTE( "95413763.hi", 0x00000, 0x080000, CRC(ec7006df) SHA1(164d2078b5a626c0a7d3aa176bc9ab5570e628c1) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413762.lo", 0x00001, 0x080000, CRC(f1e94a7f) SHA1(1c8e0579b61d558ee862b948df3c08812b61b3eb) )
+ ROM_LOAD16_BYTE( "95413763.hi", 0x00000, 0x080000, CRC(ec7006df) SHA1(164d2078b5a626c0a7d3aa176bc9ab5570e628c1) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasr )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413764.lo", 0x00001, 0x080000, CRC(0f652c25) SHA1(cf240682e214f1eaead7010d32a6056d8965a654) )
- ROM_LOAD16_BYTE( "95413765.hi", 0x00000, 0x080000, CRC(3fc85422) SHA1(6f14fb68c327b52495386680d1de46006f1e4841) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413764.lo", 0x00001, 0x080000, CRC(0f652c25) SHA1(cf240682e214f1eaead7010d32a6056d8965a654) )
+ ROM_LOAD16_BYTE( "95413765.hi", 0x00000, 0x080000, CRC(3fc85422) SHA1(6f14fb68c327b52495386680d1de46006f1e4841) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcass )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95402826.lo", 0x00001, 0x080000, CRC(f823b1e3) SHA1(95dd2f8c94dd7f6a204c8056a3a7f2798fb134af) )
ROM_LOAD16_BYTE( "95402827.hi", 0x00000, 0x080000, CRC(788d2c23) SHA1(88bb8f4e977a2e44af8000f5c135e705f8e55ec4) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcast )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95402828.lo", 0x00001, 0x080000, CRC(f5bcb426) SHA1(0f6140cb742c61069f57960c6b94915529ff53b9) )
ROM_LOAD16_BYTE( "95402829.hi", 0x00000, 0x080000, CRC(29b382e0) SHA1(d513f7069265d73ebac3ccc6b100b262db611b17) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasu )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95403826.lo", 0x00001, 0x080000, CRC(174e86b3) SHA1(3f7ba66f3fa88340ac51bfad49f2feeefc6a1256) )
ROM_LOAD16_BYTE( "95403827.hi", 0x00000, 0x080000, CRC(f18004de) SHA1(46f421827b118fe3286399157a81530171a133b4) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasv )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95403828.lo", 0x00001, 0x080000, CRC(97231b0e) SHA1(ab200ea31392e1c703bddb18e200f7cda1165a71) )
ROM_LOAD16_BYTE( "95403829.hi", 0x00000, 0x080000, CRC(a0beaa1d) SHA1(ce532c5c474730cf1cd701eff32aa47f3e1da34d) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasw )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95406072.lo", 0x00001, 0x080000, CRC(147282fb) SHA1(3723fe14a849a7441c9a754d36a33ee3a3bf1716) )
ROM_LOAD16_BYTE( "95406073.hi", 0x00000, 0x080000, CRC(40343eeb) SHA1(ef95757c47f678c789d940350a77226eafe37d93) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasx )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95407072.lo", 0x00001, 0x080000, CRC(fef2d0ca) SHA1(af7f7138cfe75c293e09c5e7976b736b9e7f1f7b) )
ROM_LOAD16_BYTE( "95407073.hi", 0x00000, 0x080000, CRC(cb444ef6) SHA1(b851de11a178306033662604c54004c0180d26de) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasy )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95407710.lo", 0x00001, 0x080000, CRC(dd2e2992) SHA1(2ebcdde8112f4cd314f6ff22de8e61c8f81ba6ad) )
ROM_LOAD16_BYTE( "95407711.hi", 0x00000, 0x080000, CRC(6396f0d4) SHA1(461a326e76249b486755fbf3175b42222ae23144) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasz )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95408162.lo", 0x00001, 0x080000, CRC(30394ef9) SHA1(5c54f3199618bf2aa9a136e05ba6fe16040e4e5b) )
ROM_LOAD16_BYTE( "95408163.hi", 0x00000, 0x080000, CRC(212c022d) SHA1(3831cf883269e44adc800d8019db8a11f06348e0) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas0 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95408218.lo", 0x00001, 0x080000, CRC(dd7eee33) SHA1(eed75ea486c885b534b2b71b02c1ee34e81bba12) )
ROM_LOAD16_BYTE( "95408219.hi", 0x00000, 0x080000, CRC(60478c42) SHA1(5e679c87dae3f9ae665dbcb4a00f9feb44e03297) )
PR6923_CRAZY_FRUITS_SOUNDS11
@@ -4012,14 +4012,14 @@ ROM_END
ROM_START( sc4cfcas1 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95409162.lo", 0x00001, 0x080000, CRC(9a9cd54e) SHA1(a6e683556f08d9bcbc0839eba9934d58c2190d16) )
ROM_LOAD16_BYTE( "95409163.hi", 0x00000, 0x080000, CRC(0813b353) SHA1(26b122fd878548ffe906ee59194ef61eea78542c) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas2 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95409218.lo", 0x00001, 0x080000, CRC(8c7e3593) SHA1(d94a17fe98eda5c087a0667cbfa607e863d9e84f) )
ROM_LOAD16_BYTE( "95409219.hi", 0x00000, 0x080000, CRC(cc798847) SHA1(fede2c5ebc2beb21d9b49f58272a60f3fc30a388) )
PR6923_CRAZY_FRUITS_SOUNDS11
@@ -4031,49 +4031,49 @@ ROM_END
ROM_START( sc4cfcas8 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410206.lo", 0x00001, 0x080000, CRC(f8479128) SHA1(3228a81e2b72940a8f20fb0102c815455300ab43) )
ROM_LOAD16_BYTE( "95410207.hi", 0x00000, 0x080000, CRC(2f64a7ef) SHA1(8e05c788c20b35f233070e3a4095addc644b380a) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas9 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410518.lo", 0x00001, 0x080000, CRC(fcb3b0a6) SHA1(efdb462f91432c8cd26daa31e5adc71e38d2dd4b) )
ROM_LOAD16_BYTE( "95410519.hi", 0x00000, 0x080000, CRC(3838ca0f) SHA1(8cd53ec06f3c102615034984fa74040a379f81d1) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas3 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410520.lo", 0x00001, 0x080000, CRC(8f612ecc) SHA1(a7ab7cb115f0242f7825762410d77cce1ad52491) )
ROM_LOAD16_BYTE( "95410521.hi", 0x00000, 0x080000, CRC(fa54b8de) SHA1(cf0ac9ceba71a3f725e581bee5cd9203f7668992) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas4 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410522.lo", 0x00001, 0x080000, CRC(a221f34a) SHA1(42d6292ee3661e3aaea56c6b8684ca4c3f54a0d6) )
ROM_LOAD16_BYTE( "95410523.hi", 0x00000, 0x080000, CRC(8b09aadd) SHA1(10b51d10e6e11253df9b3c5acf2d929fb19772ea) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas5 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410524.lo", 0x00001, 0x080000, CRC(c309891b) SHA1(d2c8550129b14a6ddf3c251cced1bd450dfa7439) )
ROM_LOAD16_BYTE( "95410525.hi", 0x00000, 0x080000, CRC(868b6a77) SHA1(09b42a6f3d4371e3b24132d4c45fe062d471a9c2) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas6 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410996.lo", 0x00001, 0x080000, CRC(d9edbacd) SHA1(e6b0ef17d88dcdb53274a13848e6974cd2127ced) )
ROM_LOAD16_BYTE( "95410997.hi", 0x00000, 0x080000, CRC(a6118e1b) SHA1(e707da09dcf0aa5d468a00212fc3fcfb3fbcf6ed) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcas7 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410998.lo", 0x00001, 0x080000, CRC(be6fa84d) SHA1(4c426f52c33f52b61ecdfde458e149d0a0222f87) )
ROM_LOAD16_BYTE( "95410999.hi", 0x00000, 0x080000, CRC(430e4b42) SHA1(9c3316167b48e08c663e0c215bda31c9f78bef0b) )
PR6923_CRAZY_FRUITS_SOUNDS11
@@ -4082,63 +4082,63 @@ ROM_END
ROM_START( sc4cfcasaa )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411206.lo", 0x00001, 0x080000, CRC(3f747371) SHA1(f04d2f76ff5e0b1fc9096f05d93b555f25a433bd) )
ROM_LOAD16_BYTE( "95411207.hi", 0x00000, 0x080000, CRC(38a16e88) SHA1(ec94ee1cdb788d5f7e5bc262285bedceb8501c37) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasab )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411518.lo", 0x00001, 0x080000, CRC(2912f0a9) SHA1(d600c522950e127f957ca341c2ce506223ccf981) )
ROM_LOAD16_BYTE( "95411519.hi", 0x00000, 0x080000, CRC(1b07aa20) SHA1(4554dff7d38a71241a54f9e56072e6e5c0da9d4b) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasac )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411520.lo", 0x00001, 0x080000, CRC(f165dba0) SHA1(37ca7bcf72ed84d3c28c405344e6d5cfdc4fb020) )
ROM_LOAD16_BYTE( "95411521.hi", 0x00000, 0x080000, CRC(44f7fa77) SHA1(06dfdec5e46b45959561223ea960ae5458ba39c9) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasad )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411522.lo", 0x00001, 0x080000, CRC(4cf8f8dd) SHA1(18f40df751ba13defd1e080f1b76e9aece646ce5) )
ROM_LOAD16_BYTE( "95411523.hi", 0x00000, 0x080000, CRC(03a57868) SHA1(3e6fe8c3355aeb016b90b8d5307da367f729a5e6) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasae )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411524.lo", 0x00001, 0x080000, CRC(373e90c5) SHA1(4b1647f9c415f00653546ac31f1ef57d08e579f9) )
ROM_LOAD16_BYTE( "95411525.hi", 0x00000, 0x080000, CRC(ebaae63f) SHA1(aec39f680821c116eb0549f811a5077b0309499a) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasaf )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411996.lo", 0x00001, 0x080000, CRC(c85682fa) SHA1(7f5cbd1bb96c0a9170916a8d0d3b6fd500d70298) )
ROM_LOAD16_BYTE( "95411997.hi", 0x00000, 0x080000, CRC(6d805ccf) SHA1(8775f2a55ca8207216787bbea05b8dfa6c8ee4c6) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasag )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411998.lo", 0x00001, 0x080000, CRC(bb2ca77e) SHA1(47100cf01fbf027316fb7d139a28de86953a5338) )
ROM_LOAD16_BYTE( "95411999.hi", 0x00000, 0x080000, CRC(0f825875) SHA1(9da6b169074194cd7f54525914bc19da98c94a51) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasah )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95412062.lo", 0x00001, 0x080000, CRC(4c7996c2) SHA1(022ce9a036e8e3b3a1b427d151fca0592855b1ed) )
ROM_LOAD16_BYTE( "95412063.hi", 0x00000, 0x080000, CRC(06906d31) SHA1(3b8a66f837a4f8bc8d97fee34c29b6cb877beb22) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasai )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95413062.lo", 0x00001, 0x080000, CRC(769b9bed) SHA1(95cf5797e6ff0bb32f80a3616cca92d5ea90a69a) )
ROM_LOAD16_BYTE( "95413063.hi", 0x00000, 0x080000, CRC(b7ad867f) SHA1(6fe236254e3dfdfe90ab00c7a7fe7676ece8dc1d) )
PR6923_CRAZY_FRUITS_SOUNDS11
@@ -4151,28 +4151,28 @@ ROM_END
ROM_START( sc4cfcasaj )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p6923p31.hi", 0x00000, 0x080000, CRC(6d87d1f6) SHA1(bc91361ef0ae9b94ee9d437662beca87d5916968) )
ROM_LOAD16_BYTE( "p6923p31.lo", 0x00001, 0x080000, CRC(21a802b6) SHA1(d2081509edfcbb889628dc910f4db1094eae64dd) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasak )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p6923p53.hi", 0x00000, 0x080000, CRC(aacd5356) SHA1(a91330815a61d2ca1f8e52d3ac162ab02643798b) )
ROM_LOAD16_BYTE( "p6923p53.lo", 0x00001, 0x080000, CRC(d50b7e71) SHA1(a6682a5dcd557a2ec27651d420e7bef8459fafff) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasal )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p6923s31.hi", 0x00000, 0x080000, CRC(e01f2141) SHA1(cd3ecac441f6c1cf67cf2f443dc8465d5bcfc406) )
ROM_LOAD16_BYTE( "p6923s31.lo", 0x00001, 0x080000, CRC(88d60172) SHA1(0c75342f861f8477ee3393426ca93f7d7da1dc7f) )
PR6923_CRAZY_FRUITS_SOUNDS11
ROM_END
ROM_START( sc4cfcasam )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p6923s53.hi", 0x00000, 0x080000, CRC(7c92adb7) SHA1(fe4e2ad8238bccb2ae1ccec4949b27dca5d49d1e) )
ROM_LOAD16_BYTE( "p6923s53.lo", 0x00001, 0x080000, CRC(e347ca23) SHA1(2b0fadb6e3ac7439a748452b49475f26d93b2e92) )
PR6923_CRAZY_FRUITS_SOUNDS11
@@ -4706,33 +4706,33 @@ ROM_START( sc4crzkys )
ROM_END
ROM_START( sc4crzkyt )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412768.lo", 0x00001, 0x080000, CRC(8c0e64b9) SHA1(e67d84d384d4c5bb43c45768d538048fc456b90f) )
- ROM_LOAD16_BYTE( "95412769.hi", 0x00000, 0x080000, CRC(e474d8fb) SHA1(55457253310084b51a7f0b3ad55cd56699505e66) )
- sc_crzky_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412768.lo", 0x00001, 0x080000, CRC(8c0e64b9) SHA1(e67d84d384d4c5bb43c45768d538048fc456b90f) )
+ ROM_LOAD16_BYTE( "95412769.hi", 0x00000, 0x080000, CRC(e474d8fb) SHA1(55457253310084b51a7f0b3ad55cd56699505e66) )
+ sc_crzky_others
ROM_END
ROM_START( sc4crzkyu )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412770.lo", 0x00001, 0x080000, CRC(3d588dea) SHA1(0ccb0f2e4997340602ac095b94eb796a289e1125) )
- ROM_LOAD16_BYTE( "95412771.hi", 0x00000, 0x080000, CRC(38deb018) SHA1(5ee9403b969dcccbc7387071923eb3bc4fab8c86) )
- sc_crzky_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412770.lo", 0x00001, 0x080000, CRC(3d588dea) SHA1(0ccb0f2e4997340602ac095b94eb796a289e1125) )
+ ROM_LOAD16_BYTE( "95412771.hi", 0x00000, 0x080000, CRC(38deb018) SHA1(5ee9403b969dcccbc7387071923eb3bc4fab8c86) )
+ sc_crzky_others
ROM_END
ROM_START( sc4crzkyv )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413394.lo", 0x00001, 0x080000, CRC(482b8cd6) SHA1(aca9f1ac29d8323b215ed6b62621e357d03e6b60) )
- ROM_LOAD16_BYTE( "95413395.hi", 0x00000, 0x080000, CRC(fecb656d) SHA1(99f52e5c61e71f032e579bc2bc08f415350459f8) )
- sc_crzky_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413394.lo", 0x00001, 0x080000, CRC(482b8cd6) SHA1(aca9f1ac29d8323b215ed6b62621e357d03e6b60) )
+ ROM_LOAD16_BYTE( "95413395.hi", 0x00000, 0x080000, CRC(fecb656d) SHA1(99f52e5c61e71f032e579bc2bc08f415350459f8) )
+ sc_crzky_others
ROM_END
ROM_START( sc4crzkyw )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413396.lo", 0x00001, 0x080000, CRC(02cc445f) SHA1(2ca7589b403e2308d11de81400c4bd5811a3d1c1) )
- ROM_LOAD16_BYTE( "95413397.hi", 0x00000, 0x080000, CRC(88774042) SHA1(3c75da111da7bdbf68bcbc08fc6db26122b04b0b) )
- sc_crzky_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413396.lo", 0x00001, 0x080000, CRC(02cc445f) SHA1(2ca7589b403e2308d11de81400c4bd5811a3d1c1) )
+ ROM_LOAD16_BYTE( "95413397.hi", 0x00000, 0x080000, CRC(88774042) SHA1(3c75da111da7bdbf68bcbc08fc6db26122b04b0b) )
+ sc_crzky_others
ROM_END
@@ -9264,30 +9264,30 @@ ROM_START( sc4luckb0 )
ROM_END
ROM_START( sc4luckb1 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412784.lo", 0x00001, 0x080000, CRC(5aa0e877) SHA1(61f5feb82da6120e9dc1e035ecc5014c0312cfe5) )
- ROM_LOAD16_BYTE( "95412785.hi", 0x00000, 0x080000, CRC(71a8f0a7) SHA1(f15e021e2fd036e3b8e6df527dce247dcbcae183) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412784.lo", 0x00001, 0x080000, CRC(5aa0e877) SHA1(61f5feb82da6120e9dc1e035ecc5014c0312cfe5) )
+ ROM_LOAD16_BYTE( "95412785.hi", 0x00000, 0x080000, CRC(71a8f0a7) SHA1(f15e021e2fd036e3b8e6df527dce247dcbcae183) )
sc_luckb_others
ROM_END
ROM_START( sc4luckb2 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412786.lo", 0x00001, 0x080000, CRC(ef399481) SHA1(46f896e061b1e0952f344d8263733b4767f4fd33) )
- ROM_LOAD16_BYTE( "95412787.hi", 0x00000, 0x080000, CRC(afba8e8f) SHA1(5263a8909e930eba04c9d2dd3cc561bc05dd98bc) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412786.lo", 0x00001, 0x080000, CRC(ef399481) SHA1(46f896e061b1e0952f344d8263733b4767f4fd33) )
+ ROM_LOAD16_BYTE( "95412787.hi", 0x00000, 0x080000, CRC(afba8e8f) SHA1(5263a8909e930eba04c9d2dd3cc561bc05dd98bc) )
sc_luckb_others
ROM_END
ROM_START( sc4luckb3 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413784.lo", 0x00001, 0x080000, CRC(1f6e5750) SHA1(bf66ec55f95263b9609d540ff80ff6e30b412c8f) )
- ROM_LOAD16_BYTE( "95413785.hi", 0x00000, 0x080000, CRC(1d94f72f) SHA1(cdb6f996738d24c5067930ef24699d851a0bbdc6) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413784.lo", 0x00001, 0x080000, CRC(1f6e5750) SHA1(bf66ec55f95263b9609d540ff80ff6e30b412c8f) )
+ ROM_LOAD16_BYTE( "95413785.hi", 0x00000, 0x080000, CRC(1d94f72f) SHA1(cdb6f996738d24c5067930ef24699d851a0bbdc6) )
sc_luckb_others
ROM_END
ROM_START( sc4luckb4 )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413786.lo", 0x00001, 0x080000, CRC(afb1726c) SHA1(676e27a33da21a728129d179339aab761485b22d) )
- ROM_LOAD16_BYTE( "95413787.hi", 0x00000, 0x080000, CRC(c3a6cc83) SHA1(399629c1a80790d4590b97d800f4dcf0ff7f7180) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413786.lo", 0x00001, 0x080000, CRC(afb1726c) SHA1(676e27a33da21a728129d179339aab761485b22d) )
+ ROM_LOAD16_BYTE( "95413787.hi", 0x00000, 0x080000, CRC(c3a6cc83) SHA1(399629c1a80790d4590b97d800f4dcf0ff7f7180) )
sc_luckb_others
ROM_END
@@ -9701,33 +9701,33 @@ ROM_END
ROM_START( sc4mgrj )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412804.lo", 0x00001, 0x080000, CRC(0948aa27) SHA1(14a779bbe176e525b53ce9c7a0ac46d043afb47d) )
- ROM_LOAD16_BYTE( "95412805.hi", 0x00000, 0x080000, CRC(5e7bf5e1) SHA1(f03880f80a154c408717c8d53121d1bde2e62ab5) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412804.lo", 0x00001, 0x080000, CRC(0948aa27) SHA1(14a779bbe176e525b53ce9c7a0ac46d043afb47d) )
+ ROM_LOAD16_BYTE( "95412805.hi", 0x00000, 0x080000, CRC(5e7bf5e1) SHA1(f03880f80a154c408717c8d53121d1bde2e62ab5) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4mgrk )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412808.lo", 0x00001, 0x080000, CRC(e500f4cf) SHA1(3d0738ab1b927887f257fe063b57ee4a76be6808) )
- ROM_LOAD16_BYTE( "95412809.hi", 0x00000, 0x080000, CRC(4556db34) SHA1(a06dfa1a2389f0ae185b6cc520b7dca75dd9dd6a) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412808.lo", 0x00001, 0x080000, CRC(e500f4cf) SHA1(3d0738ab1b927887f257fe063b57ee4a76be6808) )
+ ROM_LOAD16_BYTE( "95412809.hi", 0x00000, 0x080000, CRC(4556db34) SHA1(a06dfa1a2389f0ae185b6cc520b7dca75dd9dd6a) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4mgrl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413804.lo", 0x00001, 0x080000, CRC(9c1261ca) SHA1(50cce10f8736e982346aba313abd2e761d7286fc) )
- ROM_LOAD16_BYTE( "95413805.hi", 0x00000, 0x080000, CRC(ae77f9cf) SHA1(e88d82e8711b81dce306db558c03141699b2a813) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413804.lo", 0x00001, 0x080000, CRC(9c1261ca) SHA1(50cce10f8736e982346aba313abd2e761d7286fc) )
+ ROM_LOAD16_BYTE( "95413805.hi", 0x00000, 0x080000, CRC(ae77f9cf) SHA1(e88d82e8711b81dce306db558c03141699b2a813) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4mgrm )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413808.lo", 0x00001, 0x080000, CRC(80630b04) SHA1(9393d9be92aca4eb4f4a774868fe8b6698139b67) )
- ROM_LOAD16_BYTE( "95413809.hi", 0x00000, 0x080000, CRC(cf0a0b46) SHA1(434acbbe97748b96853f288b14cebcce02151515) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413808.lo", 0x00001, 0x080000, CRC(80630b04) SHA1(9393d9be92aca4eb4f4a774868fe8b6698139b67) )
+ ROM_LOAD16_BYTE( "95413809.hi", 0x00000, 0x080000, CRC(cf0a0b46) SHA1(434acbbe97748b96853f288b14cebcce02151515) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
@@ -11175,17 +11175,17 @@ ROM_START( sc4pogblc )
ROM_END
ROM_START( sc4pogbld )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95426590.lo", 0x00001, 0x080000, CRC(4bd1ca29) SHA1(9d9a3e14027b259c614780681d337d9004e5dbfd) )
- ROM_LOAD16_BYTE( "95426591.hi", 0x00000, 0x080000, CRC(3e550a37) SHA1(48e2371953744e2d3b59833388be66484293dfe9) )
- PR3082_C_POTS_OF_GOLD_SOUNDS11
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95426590.lo", 0x00001, 0x080000, CRC(4bd1ca29) SHA1(9d9a3e14027b259c614780681d337d9004e5dbfd) )
+ ROM_LOAD16_BYTE( "95426591.hi", 0x00000, 0x080000, CRC(3e550a37) SHA1(48e2371953744e2d3b59833388be66484293dfe9) )
+ PR3082_C_POTS_OF_GOLD_SOUNDS11
ROM_END
ROM_START( sc4pogble )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95427590.lo", 0x00001, 0x080000, CRC(0a7f6c5f) SHA1(cf8eb884d1980a1e136d2b1e52ba4d7dc7904896) )
- ROM_LOAD16_BYTE( "95427591.hi", 0x00000, 0x080000, CRC(8802578a) SHA1(71c16bb83b858d42846703387976460812234771) )
- PR3082_C_POTS_OF_GOLD_SOUNDS11
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95427590.lo", 0x00001, 0x080000, CRC(0a7f6c5f) SHA1(cf8eb884d1980a1e136d2b1e52ba4d7dc7904896) )
+ ROM_LOAD16_BYTE( "95427591.hi", 0x00000, 0x080000, CRC(8802578a) SHA1(71c16bb83b858d42846703387976460812234771) )
+ PR3082_C_POTS_OF_GOLD_SOUNDS11
ROM_END
@@ -15112,33 +15112,33 @@ ROM_END
ROM_START( sc4wldbnn )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412798.lo", 0x00001, 0x080000, CRC(b1faf86e) SHA1(59d28f3cc7e6102b6ab30cf8f3cf3ff330400935) )
- ROM_LOAD16_BYTE( "95412799.hi", 0x00000, 0x080000, CRC(154696d1) SHA1(e36ac082a4d9217609d480c8ebe2a62ca5e05030) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412798.lo", 0x00001, 0x080000, CRC(b1faf86e) SHA1(59d28f3cc7e6102b6ab30cf8f3cf3ff330400935) )
+ ROM_LOAD16_BYTE( "95412799.hi", 0x00000, 0x080000, CRC(154696d1) SHA1(e36ac082a4d9217609d480c8ebe2a62ca5e05030) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4wldbno )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412802.lo", 0x00001, 0x080000, CRC(0707c737) SHA1(ab2b5654593af4b2ef3b967b922a140d254832cd) )
- ROM_LOAD16_BYTE( "95412803.hi", 0x00000, 0x080000, CRC(7cba6d55) SHA1(7770f2cb130f54f4f43004b78e1494d0d067f444) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412802.lo", 0x00001, 0x080000, CRC(0707c737) SHA1(ab2b5654593af4b2ef3b967b922a140d254832cd) )
+ ROM_LOAD16_BYTE( "95412803.hi", 0x00000, 0x080000, CRC(7cba6d55) SHA1(7770f2cb130f54f4f43004b78e1494d0d067f444) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4wldbnp )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413798.lo", 0x00001, 0x080000, CRC(78d31c7e) SHA1(4ce9b96b039c2e70b53b7446cc7701cfa0d21f69) )
- ROM_LOAD16_BYTE( "95413799.hi", 0x00000, 0x080000, CRC(969a883b) SHA1(9e23f39bdb3ac8819f2910d3ae86ffc63e36d78b) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413798.lo", 0x00001, 0x080000, CRC(78d31c7e) SHA1(4ce9b96b039c2e70b53b7446cc7701cfa0d21f69) )
+ ROM_LOAD16_BYTE( "95413799.hi", 0x00000, 0x080000, CRC(969a883b) SHA1(9e23f39bdb3ac8819f2910d3ae86ffc63e36d78b) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4wldbnq )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413802.lo", 0x00001, 0x080000, CRC(cda11a90) SHA1(fcf4728cbc93b537283b06f7234dfdd1b1c986fe) )
- ROM_LOAD16_BYTE( "95413803.hi", 0x00000, 0x080000, CRC(4e53c2cc) SHA1(9f844af4abb60c4616c840075e7f7bbadaad70be) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413802.lo", 0x00001, 0x080000, CRC(cda11a90) SHA1(fcf4728cbc93b537283b06f7234dfdd1b1c986fe) )
+ ROM_LOAD16_BYTE( "95413803.hi", 0x00000, 0x080000, CRC(4e53c2cc) SHA1(9f844af4abb60c4616c840075e7f7bbadaad70be) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
@@ -16694,10 +16694,10 @@ ROM_END
ROM_START( sc4cblasa )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95418020.lo", 0x00001, 0x080000, CRC(156f98d1) SHA1(7f7af9b194bd2866f82c7fcd6a19196b2bc7451c) )
- ROM_LOAD16_BYTE( "95418021.hi", 0x00000, 0x080000, CRC(b6a36c59) SHA1(4d0764c1cf3a0036379e29fee244a075a4412800) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95418020.lo", 0x00001, 0x080000, CRC(156f98d1) SHA1(7f7af9b194bd2866f82c7fcd6a19196b2bc7451c) )
+ ROM_LOAD16_BYTE( "95418021.hi", 0x00000, 0x080000, CRC(b6a36c59) SHA1(4d0764c1cf3a0036379e29fee244a075a4412800) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
@@ -17240,35 +17240,35 @@ ROM_END
ROM_START( sc4czfre )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95400341.lo", 0x00001, 0x080000, CRC(5de1df69) SHA1(2a83c45ed694b2bf20fc1a748ecd3d00a5271832) )
ROM_LOAD16_BYTE( "95400342.hi", 0x00000, 0x080000, CRC(903dee0c) SHA1(529fdb14a06564afa3fcf3a2bf04f0c682c4e636) )
sc_czfr_others
ROM_END
ROM_START( sc4czfrf )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95400343.lo", 0x00001, 0x080000, CRC(d525c165) SHA1(818679010490f0266f8a8ada845d227d31bb92a6) )
ROM_LOAD16_BYTE( "95400344.hi", 0x00000, 0x080000, CRC(afac271f) SHA1(6bc551ed667fbcdd42722222080141d971e709c9) )
sc_czfr_others
ROM_END
ROM_START( sc4czfrg )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95400345.lo", 0x00001, 0x080000, CRC(dbf40752) SHA1(26fe336c235538ed50c4d5b67262bcaf02f74dcc) )
ROM_LOAD16_BYTE( "95400346.hi", 0x00000, 0x080000, CRC(28344abe) SHA1(c1c361c335114d6102b4ba97809eeb2f8cb2a299) )
sc_czfr_others
ROM_END
ROM_START( sc4czfrh )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95401341.lo", 0x00001, 0x080000, CRC(ea1b83ef) SHA1(8a526c030b8e9547fcdebfaa8316ce77adec9a69) )
ROM_LOAD16_BYTE( "95401342.hi", 0x00000, 0x080000, CRC(b1e080fb) SHA1(d284191feacb6636cec76e6103ed98003c04c40f) )
sc_czfr_others
ROM_END
ROM_START( sc4czfri )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95401343.lo", 0x00001, 0x080000, CRC(23aa3367) SHA1(d291432a0595c97d16e8183501a3d622bf20cc86) )
ROM_LOAD16_BYTE( "95401344.hi", 0x00000, 0x080000, CRC(ba038114) SHA1(3b9835224eae26af435f2d1fd2156a751a48f0e2) )
sc_czfr_others
@@ -17276,14 +17276,14 @@ ROM_END
ROM_START( sc4czfrj )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95401345.lo", 0x00001, 0x080000, CRC(8c3e322a) SHA1(f2663cdd8280fa661ac2aea257acc363525b60c5) )
ROM_LOAD16_BYTE( "95401346.hi", 0x00000, 0x080000, CRC(d9b74800) SHA1(a3b2e098c7d04fbaf98da69de41636b52e8b497c) )
sc_czfr_others
ROM_END
ROM_START( sc4czfrk )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95401347.lo", 0x00001, 0x080000, CRC(2bdabad1) SHA1(81479370e7a03d8562162cb4820157d733c5aa87) )
ROM_LOAD16_BYTE( "95401348.hi", 0x00000, 0x080000, CRC(63212cb9) SHA1(2eb3a00a6f18cc4c63ae84f321735be824e20889) )
sc_czfr_others
@@ -17452,16 +17452,16 @@ ROM_START( sc4dndcsc )
ROM_END
ROM_START( sc4dndcsd )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95422796.lo", 0x00001, 0x080000, CRC(e868d7b2) SHA1(9bfab76066bdd8c0189a3b076cb5fcaf9b319974) )
- ROM_LOAD16_BYTE( "95422797.hi", 0x00000, 0x080000, CRC(7814d075) SHA1(2a5b3e2e9c6a2a1823ce952d978287c012e6bdb8) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95422796.lo", 0x00001, 0x080000, CRC(e868d7b2) SHA1(9bfab76066bdd8c0189a3b076cb5fcaf9b319974) )
+ ROM_LOAD16_BYTE( "95422797.hi", 0x00000, 0x080000, CRC(7814d075) SHA1(2a5b3e2e9c6a2a1823ce952d978287c012e6bdb8) )
PR1907_DEAL_OR_NO_DEAL_SOUNDS11
ROM_END
ROM_START( sc4dndcse )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95423796.lo", 0x00001, 0x080000, CRC(804c03c4) SHA1(f73c9655c1206334afeb6bbd73bd24579eb1d67c) )
- ROM_LOAD16_BYTE( "95423797.hi", 0x00000, 0x080000, CRC(c5b8ef0a) SHA1(5ae7be45364c8db8425b1ea08d8705c1fe2e032a) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95423796.lo", 0x00001, 0x080000, CRC(804c03c4) SHA1(f73c9655c1206334afeb6bbd73bd24579eb1d67c) )
+ ROM_LOAD16_BYTE( "95423797.hi", 0x00000, 0x080000, CRC(c5b8ef0a) SHA1(5ae7be45364c8db8425b1ea08d8705c1fe2e032a) )
PR1907_DEAL_OR_NO_DEAL_SOUNDS11
ROM_END
@@ -17725,24 +17725,24 @@ ROM_START( sc4dndhfi )
ROM_END
ROM_START( sc4dndhfj )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95423799.hi", 0x00000, 0x080000, CRC(922bf36c) SHA1(18bb9e38340dd0fd7e95fc0f70d0a47ef98f6d9c) )
- ROM_LOAD16_BYTE( "95423798.lo", 0x00001, 0x080000, CRC(310e7ab7) SHA1(8ec44acd16dbe22837d365970e496640d1250355) )
- sc_dndhf_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95423799.hi", 0x00000, 0x080000, CRC(922bf36c) SHA1(18bb9e38340dd0fd7e95fc0f70d0a47ef98f6d9c) )
+ ROM_LOAD16_BYTE( "95423798.lo", 0x00001, 0x080000, CRC(310e7ab7) SHA1(8ec44acd16dbe22837d365970e496640d1250355) )
+ sc_dndhf_others
ROM_END
ROM_START( sc4dndhfk )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95428082.lo", 0x00001, 0x080000, CRC(161690d0) SHA1(a9eb5d47b067897803814f7c5d5e3436002f278b) )
- ROM_LOAD16_BYTE( "95428083.hi", 0x00000, 0x080000, CRC(72520ead) SHA1(bbaeeaddc98530eb879596a4526d0101a7912d20) )
- sc_dndhf_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95428082.lo", 0x00001, 0x080000, CRC(161690d0) SHA1(a9eb5d47b067897803814f7c5d5e3436002f278b) )
+ ROM_LOAD16_BYTE( "95428083.hi", 0x00000, 0x080000, CRC(72520ead) SHA1(bbaeeaddc98530eb879596a4526d0101a7912d20) )
+ sc_dndhf_others
ROM_END
ROM_START( sc4dndhfl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95429082.lo", 0x00001, 0x080000, CRC(5172b542) SHA1(f460fe62b12d709d528135603252951d306c64c9) )
- ROM_LOAD16_BYTE( "95429083.hi", 0x00000, 0x080000, CRC(26040dae) SHA1(9302efb1a92e5c31dc22d0a6b4cc51f26c4bf5ab) )
- sc_dndhf_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95429082.lo", 0x00001, 0x080000, CRC(5172b542) SHA1(f460fe62b12d709d528135603252951d306c64c9) )
+ ROM_LOAD16_BYTE( "95429083.hi", 0x00000, 0x080000, CRC(26040dae) SHA1(9302efb1a92e5c31dc22d0a6b4cc51f26c4bf5ab) )
+ sc_dndhf_others
ROM_END
@@ -17768,9 +17768,9 @@ ROM_START( sc4dndysb )
ROM_END
ROM_START( sc4dndysc )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95426066.lo", 0x00001, 0x080000, CRC(9f388484) SHA1(abbf996d8dfca49302eada0d669477ceb6a74706) )
- ROM_LOAD16_BYTE( "95426067.hi", 0x00000, 0x080000, CRC(9f5164c4) SHA1(ed68a46a05bcca3ed1478b6a31ca59cd870ebf7e) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95426066.lo", 0x00001, 0x080000, CRC(9f388484) SHA1(abbf996d8dfca49302eada0d669477ceb6a74706) )
+ ROM_LOAD16_BYTE( "95426067.hi", 0x00000, 0x080000, CRC(9f5164c4) SHA1(ed68a46a05bcca3ed1478b6a31ca59cd870ebf7e) )
sc_dndys_others
ROM_END
@@ -18794,17 +18794,17 @@ ROM_START( sc4fguyc )
ROM_END
ROM_START( sc4fguyd )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95426070.lo", 0x00001, 0x080000, CRC(fa164ebd) SHA1(b50b261ea503b1f56b99d692805fb90ca67e22e6) )
- ROM_LOAD16_BYTE( "95426071.hi", 0x00000, 0x080000, CRC(304dc4dc) SHA1(045f639ffae4ac54e6554ca5c9a11516f0561e64) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95426070.lo", 0x00001, 0x080000, CRC(fa164ebd) SHA1(b50b261ea503b1f56b99d692805fb90ca67e22e6) )
+ ROM_LOAD16_BYTE( "95426071.hi", 0x00000, 0x080000, CRC(304dc4dc) SHA1(045f639ffae4ac54e6554ca5c9a11516f0561e64) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4fguye )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95427070.lo", 0x00001, 0x080000, CRC(916479f9) SHA1(d9f9a48c671ba046469ddcdcdfbf6de0c7ec703d) )
- ROM_LOAD16_BYTE( "95427071.hi", 0x00000, 0x080000, CRC(85306584) SHA1(f844c345330b5d0983dacb693aa5bacaf5fd60b5) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95427070.lo", 0x00001, 0x080000, CRC(916479f9) SHA1(d9f9a48c671ba046469ddcdcdfbf6de0c7ec703d) )
+ ROM_LOAD16_BYTE( "95427071.hi", 0x00000, 0x080000, CRC(85306584) SHA1(f844c345330b5d0983dacb693aa5bacaf5fd60b5) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4fbspn )
@@ -19861,34 +19861,34 @@ ROM_START( sc4hntcso )
ROM_END
ROM_START( sc4hntcsp )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412788.lo", 0x00001, 0x080000, CRC(0d8a0e36) SHA1(258ec8aea8f820919e106eda3e774054bb3758cb) )
- ROM_LOAD16_BYTE( "95412789.hi", 0x00000, 0x080000, CRC(0b15f31a) SHA1(051e047374fc3848a052b85bc54fb2a940fcd2f5) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412788.lo", 0x00001, 0x080000, CRC(0d8a0e36) SHA1(258ec8aea8f820919e106eda3e774054bb3758cb) )
+ ROM_LOAD16_BYTE( "95412789.hi", 0x00000, 0x080000, CRC(0b15f31a) SHA1(051e047374fc3848a052b85bc54fb2a940fcd2f5) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4hntcsq )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95412792.lo", 0x00001, 0x080000, CRC(bebb8a6d) SHA1(e1009ff6af9f9cf5df3d3f35dcac254e9ba25a84) )
- ROM_LOAD16_BYTE( "95412793.hi", 0x00000, 0x080000, CRC(fd18bea6) SHA1(94f3cf2ed593705a3caa788b3b55864f5726bb75) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95412792.lo", 0x00001, 0x080000, CRC(bebb8a6d) SHA1(e1009ff6af9f9cf5df3d3f35dcac254e9ba25a84) )
+ ROM_LOAD16_BYTE( "95412793.hi", 0x00000, 0x080000, CRC(fd18bea6) SHA1(94f3cf2ed593705a3caa788b3b55864f5726bb75) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4hntcsr )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413788.lo", 0x00001, 0x080000, CRC(223e4033) SHA1(47a335ef0d6964c7ef2ab8e4308323ac9269d98b) )
- ROM_LOAD16_BYTE( "95413789.hi", 0x00000, 0x080000, CRC(51709e9c) SHA1(d9e3b4ebcf7acf0fc8bc546019b93338fe1a60e6) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413788.lo", 0x00001, 0x080000, CRC(223e4033) SHA1(47a335ef0d6964c7ef2ab8e4308323ac9269d98b) )
+ ROM_LOAD16_BYTE( "95413789.hi", 0x00000, 0x080000, CRC(51709e9c) SHA1(d9e3b4ebcf7acf0fc8bc546019b93338fe1a60e6) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4hntcss )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95413792.lo", 0x00001, 0x080000, CRC(1dfb13f0) SHA1(aab4c67090ea5024fe8ac1b36855398cbd8f0eed) )
- ROM_LOAD16_BYTE( "95413793.hi", 0x00000, 0x080000, CRC(57bf0935) SHA1(34ed890464aafd08e41d622367cc82898e9e07de) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95413792.lo", 0x00001, 0x080000, CRC(1dfb13f0) SHA1(aab4c67090ea5024fe8ac1b36855398cbd8f0eed) )
+ ROM_LOAD16_BYTE( "95413793.hi", 0x00000, 0x080000, CRC(57bf0935) SHA1(34ed890464aafd08e41d622367cc82898e9e07de) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
@@ -20286,17 +20286,17 @@ ROM_START( sc4ijobk )
ROM_END
ROM_START( sc4ijobl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95426078.lo", 0x00001, 0x080000, CRC(42ea72a3) SHA1(da088b0322fe3fc89348f63d7b342d68be37906b) )
- ROM_LOAD16_BYTE( "95426079.hi", 0x00000, 0x080000, CRC(49c8cf07) SHA1(af9a27e36ca5652ac542ad69b9987dd454b5bb7d) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95426078.lo", 0x00001, 0x080000, CRC(42ea72a3) SHA1(da088b0322fe3fc89348f63d7b342d68be37906b) )
+ ROM_LOAD16_BYTE( "95426079.hi", 0x00000, 0x080000, CRC(49c8cf07) SHA1(af9a27e36ca5652ac542ad69b9987dd454b5bb7d) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4ijobm )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95427079.hi", 0x00000, 0x080000, CRC(ff90a41d) SHA1(cc3011bdee10214c2de15683c436f1819a3b0e89) )
- ROM_LOAD16_BYTE( "95427078.lo", 0x00001, 0x080000, CRC(9b27c381) SHA1(f9a66f13d3ea1ca206ec2904e6944ed41fe83e63) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95427079.hi", 0x00000, 0x080000, CRC(ff90a41d) SHA1(cc3011bdee10214c2de15683c436f1819a3b0e89) )
+ ROM_LOAD16_BYTE( "95427078.lo", 0x00001, 0x080000, CRC(9b27c381) SHA1(f9a66f13d3ea1ca206ec2904e6944ed41fe83e63) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4jjok )
@@ -21201,24 +21201,24 @@ ROM_START( sc4mhpk )
ROM_END
ROM_START( sc4mhpl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95419854.lo", 0x00001, 0x080000, CRC(8a7b8323) SHA1(7927df3bb734548c8464ca94a188f597b4d8f6aa) )
- ROM_LOAD16_BYTE( "95419855.hi", 0x00000, 0x080000, CRC(52609c25) SHA1(af11b20e91f1a70dedd9570e9a14a6ff769641cc) )
- sc_mhp_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95419854.lo", 0x00001, 0x080000, CRC(8a7b8323) SHA1(7927df3bb734548c8464ca94a188f597b4d8f6aa) )
+ ROM_LOAD16_BYTE( "95419855.hi", 0x00000, 0x080000, CRC(52609c25) SHA1(af11b20e91f1a70dedd9570e9a14a6ff769641cc) )
+ sc_mhp_others
ROM_END
ROM_START( sc4mhpm )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95422770.lo", 0x00001, 0x080000, CRC(7aa35ca2) SHA1(67be41eb0d19b4bf1e5013249f08eb761c5c1276) )
- ROM_LOAD16_BYTE( "95422771.hi", 0x00000, 0x080000, CRC(30a79dad) SHA1(4854f4427cf46bbe874b2937c22261df4c21af4e) )
- sc_mhp_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95422770.lo", 0x00001, 0x080000, CRC(7aa35ca2) SHA1(67be41eb0d19b4bf1e5013249f08eb761c5c1276) )
+ ROM_LOAD16_BYTE( "95422771.hi", 0x00000, 0x080000, CRC(30a79dad) SHA1(4854f4427cf46bbe874b2937c22261df4c21af4e) )
+ sc_mhp_others
ROM_END
ROM_START( sc4mhpn )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95423770.lo", 0x00001, 0x080000, CRC(fb478f7a) SHA1(cbf813b0ccfcaf6ce1a241c9479dc75d3623043c) )
- ROM_LOAD16_BYTE( "95423771.hi", 0x00000, 0x080000, CRC(6217ded1) SHA1(c96041c00211a0cc938267cc39e968cdb93b48f0) )
- sc_mhp_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95423770.lo", 0x00001, 0x080000, CRC(fb478f7a) SHA1(cbf813b0ccfcaf6ce1a241c9479dc75d3623043c) )
+ ROM_LOAD16_BYTE( "95423771.hi", 0x00000, 0x080000, CRC(6217ded1) SHA1(c96041c00211a0cc938267cc39e968cdb93b48f0) )
+ sc_mhp_others
ROM_END
ROM_START( sc4mhpo )
@@ -21767,17 +21767,17 @@ ROM_START( sc4popeyc )
ROM_END
ROM_START( sc4popeyd )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95426090.lo", 0x00001, 0x080000, CRC(f2439f57) SHA1(28c85aa4af37e0b6f4e593758c290d1dfabc01b3) )
- ROM_LOAD16_BYTE( "95426091.hi", 0x00000, 0x080000, CRC(7fd3b733) SHA1(0f3fe3048c4b258c44b6f664249a16885033e242) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95426090.lo", 0x00001, 0x080000, CRC(f2439f57) SHA1(28c85aa4af37e0b6f4e593758c290d1dfabc01b3) )
+ ROM_LOAD16_BYTE( "95426091.hi", 0x00000, 0x080000, CRC(7fd3b733) SHA1(0f3fe3048c4b258c44b6f664249a16885033e242) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4popeye )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95427090.lo", 0x00001, 0x080000, CRC(d18c6d3c) SHA1(5173df9b9c7a260153f03fa363eedad5eb3f3799) )
- ROM_LOAD16_BYTE( "95427091.hi", 0x00000, 0x080000, CRC(6476ffc9) SHA1(ade7583943bd32bcada8d0cb33489ab50471f2e7) )
- ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95427090.lo", 0x00001, 0x080000, CRC(d18c6d3c) SHA1(5173df9b9c7a260153f03fa363eedad5eb3f3799) )
+ ROM_LOAD16_BYTE( "95427091.hi", 0x00000, 0x080000, CRC(6476ffc9) SHA1(ade7583943bd32bcada8d0cb33489ab50471f2e7) )
+ ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00)
ROM_END
ROM_START( sc4pog )
@@ -21837,17 +21837,17 @@ ROM_START( sc4pogg )
ROM_END
ROM_START( sc4pogh )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95422750.lo", 0x00001, 0x080000, CRC(72e10a5e) SHA1(2182fe643ae0442b1a116737d3a8c37af783a58f) )
- ROM_LOAD16_BYTE( "95422751.hi", 0x00000, 0x080000, CRC(2c304af5) SHA1(fc2d659c0c372b9f2516cd60a4b0c568992288c7) )
- PR1918_POTS_OF_GOLD_SOUNDS11
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95422750.lo", 0x00001, 0x080000, CRC(72e10a5e) SHA1(2182fe643ae0442b1a116737d3a8c37af783a58f) )
+ ROM_LOAD16_BYTE( "95422751.hi", 0x00000, 0x080000, CRC(2c304af5) SHA1(fc2d659c0c372b9f2516cd60a4b0c568992288c7) )
+ PR1918_POTS_OF_GOLD_SOUNDS11
ROM_END
ROM_START( sc4pogi )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95423750.lo", 0x00001, 0x080000, CRC(70582a43) SHA1(c84b5fdb729abc7f1ea82857bd717013199b04a4) )
- ROM_LOAD16_BYTE( "95423751.hi", 0x00000, 0x080000, CRC(92f59096) SHA1(53f2ee3f11e119ca0daa7305f52f31e22a6f8315) )
- PR1918_POTS_OF_GOLD_SOUNDS11
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95423750.lo", 0x00001, 0x080000, CRC(70582a43) SHA1(c84b5fdb729abc7f1ea82857bd717013199b04a4) )
+ ROM_LOAD16_BYTE( "95423751.hi", 0x00000, 0x080000, CRC(92f59096) SHA1(53f2ee3f11e119ca0daa7305f52f31e22a6f8315) )
+ PR1918_POTS_OF_GOLD_SOUNDS11
ROM_END
ROM_START( sc4pwrpl )
@@ -22310,9 +22310,9 @@ ROM_START( sc4showte )
ROM_END
ROM_START( sc4showtf )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95423654.lo", 0x00001, 0x080000, CRC(15648452) SHA1(72619130fbcde1fb0b2f90f02769cbd0f6f1e64e) )
- ROM_LOAD16_BYTE( "95423655.hi", 0x00000, 0x080000, CRC(9f6c934b) SHA1(28315b8bdc91355506ca150e1aeb3161e573bc5c) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95423654.lo", 0x00001, 0x080000, CRC(15648452) SHA1(72619130fbcde1fb0b2f90f02769cbd0f6f1e64e) )
+ ROM_LOAD16_BYTE( "95423655.hi", 0x00000, 0x080000, CRC(9f6c934b) SHA1(28315b8bdc91355506ca150e1aeb3161e573bc5c) )
sc_showt_others
ROM_END
@@ -23485,30 +23485,30 @@ ROM_END
ROM_START( sc4clbmn )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95418938.lo", 0x00001, 0x080000, CRC(59faf394) SHA1(a61158d582de97b0e1e613a984504066e56e237e) )
- ROM_LOAD16_BYTE( "95418939.hi", 0x00000, 0x080000, CRC(ff6df292) SHA1(5d97c45b250ac7276520ead111186fb27846b085) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95418938.lo", 0x00001, 0x080000, CRC(59faf394) SHA1(a61158d582de97b0e1e613a984504066e56e237e) )
+ ROM_LOAD16_BYTE( "95418939.hi", 0x00000, 0x080000, CRC(ff6df292) SHA1(5d97c45b250ac7276520ead111186fb27846b085) )
sc_clbmn_others
ROM_END
ROM_START( sc4clbmna )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95419938.lo", 0x00001, 0x080000, CRC(e3316610) SHA1(b651136355adc6da794ce669bfaa9551c567d133) )
- ROM_LOAD16_BYTE( "95419939.hi", 0x00000, 0x080000, CRC(54eda019) SHA1(762def4d175722222a8b17dd4278bc49f0f3b873) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95419938.lo", 0x00001, 0x080000, CRC(e3316610) SHA1(b651136355adc6da794ce669bfaa9551c567d133) )
+ ROM_LOAD16_BYTE( "95419939.hi", 0x00000, 0x080000, CRC(54eda019) SHA1(762def4d175722222a8b17dd4278bc49f0f3b873) )
sc_clbmn_others
ROM_END
ROM_START( sc4clbmnb )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95422126.lo", 0x00001, 0x080000, CRC(09ddd2a8) SHA1(20bad26635c6277a2d556afaf52ffd38ee2ec99c) )
- ROM_LOAD16_BYTE( "95422127.hi", 0x00000, 0x080000, CRC(b5f1deb6) SHA1(adf483b3194f17428c6f128378725c65ef186f65) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95422126.lo", 0x00001, 0x080000, CRC(09ddd2a8) SHA1(20bad26635c6277a2d556afaf52ffd38ee2ec99c) )
+ ROM_LOAD16_BYTE( "95422127.hi", 0x00000, 0x080000, CRC(b5f1deb6) SHA1(adf483b3194f17428c6f128378725c65ef186f65) )
sc_clbmn_others
ROM_END
ROM_START( sc4clbmnc )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95423126.lo", 0x00001, 0x080000, CRC(02953434) SHA1(329944baf10c305597bf137bfc9c6fdce2e30bd2) )
- ROM_LOAD16_BYTE( "95423127.hi", 0x00000, 0x080000, CRC(6f03e758) SHA1(7317bd88df1c1c3f378cbbe30982c3e1479a1dc4) )
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95423126.lo", 0x00001, 0x080000, CRC(02953434) SHA1(329944baf10c305597bf137bfc9c6fdce2e30bd2) )
+ ROM_LOAD16_BYTE( "95423127.hi", 0x00000, 0x080000, CRC(6f03e758) SHA1(7317bd88df1c1c3f378cbbe30982c3e1479a1dc4) )
sc_clbmn_others
ROM_END
@@ -23516,18 +23516,18 @@ ROM_END
ROM_START( sc4boomb )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95426488.lo", 0x00001, 0x080000, CRC(b5ddf816) SHA1(3817eedab684ae06f3b079993d800c4000cf46dd) )
- ROM_LOAD16_BYTE( "95426489.hi", 0x00000, 0x080000, CRC(c84a8b41) SHA1(86f2f14f9a66aa616f579c835d8111751f36a84e) )
- sc_mobob_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95426488.lo", 0x00001, 0x080000, CRC(b5ddf816) SHA1(3817eedab684ae06f3b079993d800c4000cf46dd) )
+ ROM_LOAD16_BYTE( "95426489.hi", 0x00000, 0x080000, CRC(c84a8b41) SHA1(86f2f14f9a66aa616f579c835d8111751f36a84e) )
+ sc_mobob_others
ROM_END
ROM_START( sc4boomba )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
- ROM_LOAD16_BYTE( "95427489.hi", 0x00000, 0x080000, CRC(6dc23ad0) SHA1(5318dfffca7211600e0f64ea0ef1f45701f57401) )
- ROM_LOAD16_BYTE( "95427488.lo", 0x00001, 0x080000, CRC(5ac5adbd) SHA1(a4cf828eb3d5d8e2603a1921e6f63e04348beb26) )
- sc_mobob_others
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_LOAD16_BYTE( "95427489.hi", 0x00000, 0x080000, CRC(6dc23ad0) SHA1(5318dfffca7211600e0f64ea0ef1f45701f57401) )
+ ROM_LOAD16_BYTE( "95427488.lo", 0x00001, 0x080000, CRC(5ac5adbd) SHA1(a4cf828eb3d5d8e2603a1921e6f63e04348beb26) )
+ sc_mobob_others
ROM_END
@@ -23571,7 +23571,7 @@ ROM_END
/* Scorpion 4 */
-GAME( 200?, sc4tst ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Scorpion 4 Test Rig (Bellfruit) (Scorpion ?)", GAME_NOT_WORKING )
+GAME( 200?, sc4tst ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Scorpion 4 Test Rig (Bellfruit) (Scorpion ?)", GAME_NOT_WORKING )
static const stepper_interface* sc4pstat_reel_configs[6] =
{
@@ -23597,32 +23597,32 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pstat_mbus)
// can't get passed 'read meters'
// PR2516 PAYSTATIONV2.0 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstat ,0, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pstatb ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstat ,0, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatb ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2516 PAYSTATIONV2.1 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstata ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pstatc ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstata ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatc ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2516 PAYSTATIONV2.2 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstatd ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.2) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatd ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.2) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// PR2516 PAYSTATIONV2.3 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstate ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.3) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstate ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V2.3) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// ones below can be 'played' (skip 'read meters' with ctrl)
// PR2516 PAYSTATIONV4.0 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstath ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V4.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pstatm ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V4.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstath ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V4.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatm ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V4.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2516 PAYSTATIONV011 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstatf ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pstati ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatf ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstati ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2516 PAYSTATION 012 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstatn ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pstatp ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatn ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatp ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2516 PAYSTATIONV041 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstatg ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pstatj ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatg ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatj ,sc4pstat, sc4, sc4, sc4_state, sc4pstat_mbus, ROT0, "QPS","Paystation (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2516 PAYSTATION 042 PAYSTATIONSND PAYSTATION
-GAME( 200?, sc4pstato ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pstatq ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstato ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pstatq ,sc4pstat, sc4, sc4, sc4_state, sc4pstat, ROT0, "QPS","Paystation (V042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4cvani_reel_configs[6] =
{
@@ -23641,16 +23641,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cvani)
}
// PR2052 CASHLVANIA VANIASND CASH'!'VANIA
-GAME( 200?, sc4cvani ,0, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvania ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanib ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanic ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanid ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanie ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanif ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanig ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanih ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvanii ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvani ,0, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvania ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanib ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanic ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanid ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanie ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanif ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanig ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanih ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvanii ,sc4cvani, sc4, sc4, sc4_state, sc4cvani, ROT0, "QPS","Cashvania (Qps) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4cvclb_reel_configs[6] =
{
@@ -23675,16 +23675,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cvclb_mbus)
}
// PRXXXX CLUBCASHLVANIA V1.0 CLUBVANIASND CLUB CASH!VANIA
-GAME( 200?, sc4cvclb ,0, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvclba ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvclbc ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvclbd ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclb ,0, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclba ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclbc ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclbd ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V1.0) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PRXXXX CLUBCASHLVANIA V2.0 CLUBVANIASND CLUB CASH!VANIA
-GAME( 200?, sc4cvclbb ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvclbe ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclbb ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclbe ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb, ROT0, "QPS","Cashvania Club (V2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PRXXXX CLUBCASHLVANIA 411 CLUBVANIASND CLUB CASH!VANIA
-GAME( 200?, sc4cvclbf ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb_mbus, ROT0, "QPS","Cashvania Club (V411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cvclbg ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb_mbus, ROT0, "QPS","Cashvania Club (V411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclbf ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb_mbus, ROT0, "QPS","Cashvania Club (V411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cvclbg ,sc4cvclb, sc4, sc4, sc4_state, sc4cvclb_mbus, ROT0, "QPS","Cashvania Club (V411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4spark_reel_configs[6] =
@@ -23705,12 +23705,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4spark)
// PR6912 SOUTH PARK PR6912 SOUTH PARK SOUNDS11 SOUTH PARK
-GAME( 200?, sc4spark ,0, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4sparka ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4sparkb ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4sparkc ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4sparkd ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4sparke ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4spark ,0, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4sparka ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sparkb ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4sparkc ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4sparkd ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4sparke ,sc4spark, sc4, sc4, sc4_state, sc4spark, ROT0, "BFM","South Park (BFM) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4brkfs_reel_configs[6] =
{
@@ -23730,10 +23730,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4brkfs)
// PR6910 BIG BREAKFAST PR6910 BRKF SOUNDS11 BIG BREAKFAST
-GAME( 200?, sc4brkfs ,0, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4brkfsa ,sc4brkfs, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4brkfsb ,sc4brkfs, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4brkfsc ,sc4brkfs, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4brkfs ,0, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4brkfsa ,sc4brkfs, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4brkfsb ,sc4brkfs, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4brkfsc ,sc4brkfs, sc4, sc4, sc4_state, sc4brkfs, ROT0, "BFM","The Big Breakfast (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4gslam_reel_configs[6] =
{
@@ -23752,13 +23752,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gslam)
}
// PR6934 GRAND SLAM PR6934 SLM2 SOUNDS11 GRAND SLAM
-GAME( 200?, sc4gslam ,0, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gslama ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gslamb ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gslamc ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gslamd ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gslame ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gslamf ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gslam ,0, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gslama ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gslamb ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gslamc ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gslamd ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gslame ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gslamf ,sc4gslam, sc4, sc4, sc4_state, sc4gslam, ROT0, "BFM","Grandslam Club (BFM) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
static const stepper_interface* sc4gcclb_reel_configs[6] =
@@ -23786,26 +23786,26 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gcclb_mbus)
// this was marked (and has the header) GRAND CASINO, and was paired with some (bad dumps) of 'Grand Casino' sound roms, but it actually
// appears to be a version of Grandslam and expects the Grandslam sounds
// PR7194 GRAND CASINO PR6934 SLM2 SOUNDS11 GRAND CASINO
-GAME( 200?, sc4gcclb ,0, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclba ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbb ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbc ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbd ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbe ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbf ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbg ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbh ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbi ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbj ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbk ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclb ,0, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclba ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbb ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbc ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbd ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbe ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbf ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbg ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbh ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbi ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbj ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbk ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
// PR7194 GRAND CASINO PR6934 SLM2 SOUNDS11 GRAND CASINO GRAND CASINO CLUB
-GAME( 200?, sc4gcclbl ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbm ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbn ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbp ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbl ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbm ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbn ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbp ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
// PR7149 GRAND CASINO GRAND CASINO CLUB PR6934 SLM2 SOUNDS11 GRAND CASINO
-GAME( 200?, sc4gcclbo ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcclbq ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbo ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcclbq ,sc4gcclb, sc4, sc4, sc4_state, sc4gcclb_mbus, ROT0, "BFM","Grandslam Casino (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
@@ -23827,8 +23827,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4botn)
// PR2538 BACK OF THE NET V011 BACKOFTHENETSND BACK OF THE NET
-GAME( 200?, sc4botn ,0, sc4, sc4, sc4_state, sc4botn, ROT0, "Qps","Back Of The Net (Qps) (Scorpion 4) (set 1, 011)", GAME_NOT_WORKING )
-GAME( 200?, sc4botna ,sc4botn, sc4, sc4, sc4_state, sc4botn, ROT0, "Qps","Back Of The Net (Qps) (Scorpion 4) (set 2, 011)", GAME_NOT_WORKING )
+GAME( 200?, sc4botn ,0, sc4, sc4, sc4_state, sc4botn, ROT0, "Qps","Back Of The Net (Qps) (Scorpion 4) (set 1, 011)", GAME_NOT_WORKING )
+GAME( 200?, sc4botna ,sc4botn, sc4, sc4, sc4_state, sc4botn, ROT0, "Qps","Back Of The Net (Qps) (Scorpion 4) (set 2, 011)", GAME_NOT_WORKING )
static const stepper_interface* sc4bbclb_reel_configs[6] =
@@ -23855,13 +23855,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bbclb_mbus)
// doesn't play
// PRXXXX CLUB BANKETY BANK VER1.0 CLUBBANKSND CLUB BANKETYBANK
-GAME( 200?, sc4bbclb ,0, sc4, sc4, sc4_state, sc4bbclb, ROT0, "Qps","Bankety Bank Club (V1.0) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bbclb ,0, sc4, sc4, sc4_state, sc4bbclb, ROT0, "Qps","Bankety Bank Club (V1.0) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// PRXXXX CLUB BANKETY BANK VER1.1 CLUBBANKSND CLUB BANKETYBANK
-GAME( 200?, sc4bbclba ,sc4bbclb, sc4, sc4, sc4_state, sc4bbclb, ROT0, "Qps","Bankety Bank Club (V1.1) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bbclba ,sc4bbclb, sc4, sc4, sc4_state, sc4bbclb, ROT0, "Qps","Bankety Bank Club (V1.1) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// can be played
// PRXXXX CLUB BANKETY BANK 411 CLUBBANKSND CLUB BANKETYBANK
-GAME( 200?, sc4bbclbb ,sc4bbclb, sc4, sc4, sc4_state, sc4bbclb_mbus, ROT0, "Qps","Bankety Bank Club (V411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bbclbc ,sc4bbclb, sc4, sc4, sc4_state, sc4bbclb_mbus, ROT0, "Qps","Bankety Bank Club (V411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bbclbb ,sc4bbclb, sc4, sc4, sc4_state, sc4bbclb_mbus, ROT0, "Qps","Bankety Bank Club (V411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bbclbc ,sc4bbclb, sc4, sc4, sc4_state, sc4bbclb_mbus, ROT0, "Qps","Bankety Bank Club (V411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4canca_reel_configs[6] =
@@ -23881,10 +23881,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4canca)
}
// PR7017CASINO CAN CAN CASH PR7017,Casino CAN CAN CASH, LINE SOUNDS CAN CAN CASH
-GAME( 200?, sc4canca ,0, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cancaa ,sc4canca, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cancab ,sc4canca, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cancac ,sc4canca, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4canca ,0, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cancaa ,sc4canca, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cancab ,sc4canca, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cancac ,sc4canca, sc4, sc4, sc4_state, sc4canca, ROT0, "Mazooma","Can Can Cash Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4captn_reel_configs[6] =
@@ -23905,14 +23905,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4captn)
// PR2013 CAPTAIN CASH CCASH SOUNDS CAPTAIN CASH
-GAME( 200?, sc4captn ,0, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4captnb ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4captnc ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4captn ,0, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4captnb ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4captnc ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PR9999 CAPTAIN CASH CCASH SOUNDS CAPTAIN CASH (invalid project number)
-GAME( 200?, sc4captna ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4captnd ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4captne ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4captnf ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4captna ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4captnd ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4captne ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4captnf ,sc4captn, sc4, sc4, sc4_state, sc4captn, ROT0, "Qps","Captain Cash (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
static const stepper_interface* sc4cmous_reel_configs[6] =
{
@@ -23932,11 +23932,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cmous)
// PR2534 CASH AND MOUSE V041 CASHANDMOUSESND CASH AND MOUSE
-GAME( 200?, sc4cmous ,0, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cmousb ,sc4cmous, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cmous ,0, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cmousb ,sc4cmous, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2534 CASH AND MOUSE V011 CASHANDMOUSESND CASH AND MOUSE
-GAME( 200?, sc4cmousa ,sc4cmous, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cmousc ,sc4cmous, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cmousa ,sc4cmous, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cmousc ,sc4cmous, sc4, sc4, sc4_state, sc4cmous, ROT0, "Qps","Cash & Mouse (V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4hotpr_reel_configs[6] =
{
@@ -23955,17 +23955,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hotpr)
}
// PR6911 HOT PROPERTY PR6911 HOT PROPERTY SOUNDS11 HOT PROPERTY
-GAME( 200?, sc4hotpr ,0, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotprb ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotprd ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotpre ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotpra ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM / Whitbread", "Hot Property (Bellfruit) (Scorpion 4) (Whitbread, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotprc ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM / Whitbread", "Hot Property (Bellfruit) (Scorpion 4) (Whitbread, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotpr ,0, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotprb ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotprd ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotpre ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM", "Hot Property (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotpra ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM / Whitbread", "Hot Property (Bellfruit) (Scorpion 4) (Whitbread, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotprc ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "BFM / Whitbread", "Hot Property (Bellfruit) (Scorpion 4) (Whitbread, set 2)", GAME_NOT_WORKING )
// is this some kind of reworked / licensed version of Hot Property?
// PR6911 HOT PROPERTY PR6911 HOT PROPERTY SOUNDS11 $$ CASH 'N' BURN
-GAME( 200?, sc4cburn ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "Qps","Cash 'n' Burn (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cburn ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "Qps","Cash 'n' Burn (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
// PR6911 HOT PROPERTY V4.0 PR6911 HOT PROPERTY SOUNDS11 $ CASH 'N' BURN
-GAME( 200?, sc4cburna ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "Qps","Cash 'n' Burn (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cburna ,sc4hotpr, sc4, sc4, sc4_state, sc4hotpr, ROT0, "Qps","Cash 'n' Burn (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4cnfr_reel_configs[6] =
@@ -23986,17 +23986,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cnfr)
// PR6815 CASH N FRUIT PR6815 CASH N FRUIT SOUNDS11
-GAME( 200?, sc4cnfr ,0, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfra ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfrb ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfre ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfrf ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfrg ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfr ,0, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfra ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfrb ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfre ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfrf ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfrg ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR4615 CASH N FRUIT S+P98 PR6815 CASH N FRUIT SOUNDS11
-GAME( 200?, sc4cnfrc ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfrd ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfrh ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cnfri ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfrc ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfrd ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfrh ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cnfri ,sc4cnfr, sc4, sc4, sc4_state, sc4cnfr, ROT0, "BFM","Cash 'n' Fruit S+P98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4cad_reel_configs[6] =
{
@@ -24021,31 +24021,31 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cad_mbus)
}
// PR2528 CASH ADDER V1.0 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cad ,0, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cada ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadf ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadg ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cad ,0, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cada ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadf ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadg ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V1.0) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2528 CASH ADDER 011 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cadb ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadh ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadb ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadh ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2528 CASH ADDER 041 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cadc ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadi ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadc ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadi ,sc4cad, sc4, sc4, sc4_state, sc4cad_mbus, ROT0, "Qps","Cash Adder (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2528 CASH ADDER 012 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cadd ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadj ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadd ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadj ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2528 CASH ADDER 042 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cade ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadk ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cade ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadk ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2528 CASH ADDER 013 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cadl ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V013) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadm ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V013) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadl ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V013) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadm ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V013) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2528 CASH ADDER 014 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cadn ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V014) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadp ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V014) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadn ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V014) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadp ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V014) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2528 CASH ADDER 043 CASHADDERSND CASH ADDER
-GAME( 200?, sc4cado ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V043) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadq ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V043) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cado ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V043) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadq ,sc4cad, sc4, sc4, sc4_state, sc4cad, ROT0, "Qps","Cash Adder (V043) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4cadcl_reel_configs[6] =
{
@@ -24064,8 +24064,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cadcl)
}
// PRXXXX QPS155 CLUB CASH ADDER Version 411 CLUBCASHADDERSND CLUB CASH ADDER
-GAME( 200?, sc4cadcl ,0, sc4, sc4, sc4_state, sc4cadcl, ROT0, "Qps","Cash Adder Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cadcla ,sc4cadcl, sc4, sc4, sc4_state, sc4cadcl, ROT0, "Qps","Cash Adder Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadcl ,0, sc4, sc4, sc4_state, sc4cadcl, ROT0, "Qps","Cash Adder Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cadcla ,sc4cadcl, sc4, sc4, sc4_state, sc4cadcl, ROT0, "Qps","Cash Adder Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4cr_reel_configs[6] =
{
@@ -24084,15 +24084,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cr)
}
// PR2061 CASHRAKER RAKERSND CASHRAKER
-GAME( 200?, sc4cr ,0, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cra ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4crb ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cr ,0, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cra ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crb ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PR2061 CASHRAKER V2.1 RAKERSND CASHRAKER
-GAME( 200?, sc4crc ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cre ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crc ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cre ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2061 CASHRAKER V2.2 RAKERSND CASHRAKER
-GAME( 200?, sc4crd ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.2) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crf ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.2) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crd ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.2) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crf ,sc4cr, sc4, sc4, sc4_state, sc4cr, ROT0, "Qps","Cash Raker (V2.2) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4crcl_reel_configs[6] =
@@ -24119,16 +24119,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4crcl_mbus)
// PR???? CLUB CASHRAKER V1.0 CLUBRAKERSND CLUB CASHRAKER
-GAME( 200?, sc4crcl ,0, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crclb ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcl ,0, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crclb ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR???? CLUB CASHRAKER V1.1 CLUBRAKERSND CLUB CASHRAKER
-GAME( 200?, sc4crcla ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crclc ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcla ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crclc ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR???? CLUB CASHRAKER V1.3 CLUBRAKERSND CLUB CASHRAKER
-GAME( 200?, sc4crcld ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.3) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcld ,sc4crcl, sc4, sc4, sc4_state, sc4crcl, ROT0, "Qps","Cash Raker Club (V1.3) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// PR???? CLUB CASHRAKER 411 CLUBRAKERSND CLUB CASHRAKER
-GAME( 200?, sc4crcle ,sc4crcl, sc4, sc4, sc4_state, sc4crcl_mbus, ROT0, "Qps","Cash Raker Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crclf ,sc4crcl, sc4, sc4, sc4_state, sc4crcl_mbus, ROT0, "Qps","Cash Raker Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcle ,sc4crcl, sc4, sc4, sc4_state, sc4crcl_mbus, ROT0, "Qps","Cash Raker Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crclf ,sc4crcl, sc4, sc4, sc4_state, sc4crcl_mbus, ROT0, "Qps","Cash Raker Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4cashm_reel_configs[6] =
{
@@ -24148,12 +24148,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cashm)
// PR2008 CASHANOVA CASH SOUNDS
-GAME( 200?, sc4cashm ,0, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cashma ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cashmb ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cashmc ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cashmd ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cashme ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cashm ,0, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cashma ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cashmb ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cashmc ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cashmd ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cashme ,sc4cashm, sc4, sc4, sc4_state, sc4cashm, ROT0, "Mazooma","Cashanova (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
@@ -24193,15 +24193,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ckx3p)
// this seems to need all the units connected to function
// PR2360 CASINO KING X BARKX SOUNDS 8 KING X
-GAME( 200?, sc4ckx ,0, sc4, sc4, sc4_state, sc4ckxtb, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // Top Box
-GAME( 200?, sc4ckxd ,sc4ckx, sc4, sc4, sc4_state, sc4ckxtb, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING ) // Top Box
+GAME( 200?, sc4ckx ,0, sc4, sc4, sc4_state, sc4ckxtb, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // Top Box
+GAME( 200?, sc4ckxd ,sc4ckx, sc4, sc4, sc4_state, sc4ckxtb, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING ) // Top Box
// PR2360 CASINO KING X KING X MAZ BARKX SOUNDS KING X 3P
-GAME( 200?, sc4ckxa ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ckxb ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ckxc ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ckxe ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ckxf ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ckxg ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ckxa ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ckxb ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ckxc ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ckxe ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ckxf ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ckxg ,sc4ckx, sc4, sc4, sc4_state, sc4ckx3p, ROT0, "Mazooma","Casino King X (Mazooma) (Scorpion 4) (Base, set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4chick_reel_configs[6] =
{
@@ -24220,7 +24220,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4chick)
}
// PR7060CASINO CHICKEN DALES TTTWO SOUNDS CHICKEN DALES
-GAME( 200?, sc4chick ,0, sc4, sc4, sc4_state, sc4chick, ROT0, "Mazooma","Chickendales (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4chick ,0, sc4, sc4, sc4_state, sc4chick, ROT0, "Mazooma","Chickendales (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4cla7_reel_configs[6] =
@@ -24240,10 +24240,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cla7)
}
// PR2111 CLASSIC 7'S CLASS SOUNDS CLASSIC 7'S
-GAME( 200?, sc4cla7 ,0, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cla7a ,sc4cla7, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cla7b ,sc4cla7, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cla7c ,sc4cla7, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cla7 ,0, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cla7a ,sc4cla7, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cla7b ,sc4cla7, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cla7c ,sc4cla7, sc4, sc4, sc4_state, sc4cla7, ROT0, "Mazooma","Classic 7s (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ccogs_reel_configs[6] =
{
@@ -24262,7 +24262,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ccogs)
}
// PR2522 CLEVERCOGS V1.0 CLEVERCOGSSND CLEVER COGS
-GAME( 200?, sc4ccogs ,0, sc4, sc4, sc4_state, sc4ccogs, ROT0, "Qps","Clever Cogs (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ccogs ,0, sc4, sc4, sc4_state, sc4ccogs, ROT0, "Qps","Clever Cogs (Qps) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4cclas_reel_configs[6] =
@@ -24288,40 +24288,40 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cclas_mbus)
}
// PR7148 CLUB CLASS PR7148 CLUB CLASS SOUNDS11 CLUB CLASS
-GAME( 200?, sc4cclas ,0, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasa ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasb ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasc ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasd ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasf ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasi ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasj ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclask ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasl ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasm ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasn ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclaso ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasq ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasr ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclass ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclast ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasu ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasv ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasw ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclas ,0, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasa ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasb ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasc ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasd ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasf ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasi ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasj ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclask ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasl ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasm ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasn ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclaso ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasq ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasr ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclass ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclast ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasu ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasv ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasw ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
// PR7148 CLUB CLASS CLUB CLASS CLUB PR7148 CLUB CLASS SOUNDS11 CLUB CLASS
-GAME( 200?, sc4cclasx ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasy ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasz ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclas0 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclas1 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 25)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclas2 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 26)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclas3 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 27)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclas4 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 28)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasx ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasy ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasz ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclas0 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclas1 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 25)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclas2 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 26)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclas3 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 27)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclas4 ,sc4cclas, sc4, sc4, sc4_state, sc4cclas_mbus, ROT0, "BFM","Club Class (Bellfruit) (Scorpion 4) (set 28)", GAME_NOT_WORKING )
// PR7148 CLUB CLASS 65% FERRY PR7148 CLUB CLASS SOUNDS11 CLUB CLASS
-GAME( 200?, sc4cclase ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasg ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclash ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclasp ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclase ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasg ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclash ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclasp ,sc4cclas, sc4, sc4, sc4_state, sc4cclas, ROT0, "BFM","Club Class (65% Ferry) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
@@ -24346,12 +24346,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4crcc)
// PR6837 CLASSIC CLUB COPS AND ROBBERS PR6837 COPS SOUNDS11 COPS AND ROBBERS
-GAME( 200?, sc4crcc ,0, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcca ,sc4crcc, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcc ,0, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcca ,sc4crcc, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR6837 CLASSIC CLUB COPS AND ROBBERS 65% PR6837 COPS SOUNDS11
// the roms are a weird size, and the code is invalid, bad dumps? can they be fixed?
-GAME( 200?, sc4crccb ,sc4crcc, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (65%) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crccc ,sc4crcc, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (65%) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crccb ,sc4crcc, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (65%) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crccc ,sc4crcc, sc4dmd, sc4, sc4_state, sc4crcc, ROT0, "BFM","Cops 'n' Robbers Club Classic (65%) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
@@ -24378,29 +24378,29 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cclim_mbus)
}
// PR1129 CASINO CRAZY CLIMBER PR1129 CRAZY CLIMBER SOUNDS11
-GAME( 200?, sc4cclim ,0, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclima ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimb ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimc ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimd ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimh ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimi ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimm ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimn ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimo ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimp ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclims ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclim ,0, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclima ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimb ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimc ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimd ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimh ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimi ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimm ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimn ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimo ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimp ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclims ,sc4cclim, sc4, sc4, sc4_state, sc4cclim, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
// PR1129 CASINO CRAZY CLIMBER CRAZY CLIMBER S.SITE PR1129 CRAZY CLIMBER SOUNDS11
-GAME( 200?, sc4cclime ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimf ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimg ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimj ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimk ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4ccliml ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimq ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimr ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimt ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
-GAME( 200?, sc4cclimu ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclime ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimf ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimg ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimj ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimk ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4ccliml ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimq ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimr ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimt ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
+GAME( 200?, sc4cclimu ,sc4cclim, sc4, sc4, sc4_state, sc4cclim_mbus, ROT0, "BFM","Casino Crazy Climber (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
static const stepper_interface* sc4czfr_reel_configs[6] =
@@ -24421,9 +24421,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4czfr)
// the unusual sound rom numbering suggests a non-English market version, although the startup messages are in English
// PR6982 CRAZY FRUITS 1.02 95004150 CRAZY FRUITS PR6982 CRAZY FRUITS
-GAME( 200?, sc4czfr ,0, sc4, sc4, sc4_state, sc4czfr, ROT0, "BFM","Crazy Fruits (Germany?) (PR6982, GCRF, 1.02) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // German set?
+GAME( 200?, sc4czfr ,0, sc4, sc4, sc4_state, sc4czfr, ROT0, "BFM","Crazy Fruits (Germany?) (PR6982, GCRF, 1.02) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // German set?
// P_6_8_ _R_Z_ _R_I_S_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _5_0_1_0_C_A_Y_F_U_T_ _R_9_2_ _
-GAME( 200?, sc4czfrd ,sc4czfr, sc4, sc4, sc4_state, sc4czfr, ROT0, "BFM","Crazy Fruits (Germany?) (PR6982, GCRF) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // incomplete pairing (in 'up for it' set)
+GAME( 200?, sc4czfrd ,sc4czfr, sc4, sc4, sc4_state, sc4czfr, ROT0, "BFM","Crazy Fruits (Germany?) (PR6982, GCRF) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // incomplete pairing (in 'up for it' set)
@@ -24463,36 +24463,36 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cfqps_alt)
// PR6813 CRAZY FRUITS PR6813 CRAZY FRUITS SOUNDS11
// these 3 have a unique attract style
-GAME( 200?, sc4cfqps ,0, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsb ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsd ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqps ,0, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsb ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsd ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// the attract style changes below
-GAME( 200?, sc4cfqpsa ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsk ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CCAS) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // why are these 2 CCAS? a mistake? or different version?
-GAME( 200?, sc4czfrc ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CCAS) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfrb ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfre ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfrg ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfrh ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfrj ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfrk ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfrf ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits (PR6813, CRFR) (BFM + Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4czfri ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits (PR6813, CRFR) (BFM + Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsa ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CRFR) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsk ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CCAS) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // why are these 2 CCAS? a mistake? or different version?
+GAME( 200?, sc4czfrc ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits (PR6813, CCAS) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfrb ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfre ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfrg ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfrh ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfrj ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfrk ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits (PR6813, CRFR) (BFM) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfrf ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits (PR6813, CRFR) (BFM + Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfri ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits (PR6813, CRFR) (BFM + Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2521 CRAZY FRUITS V1.0 PR6813 CRAZY FRUITS SOUNDS11
-GAME( 200?, sc4cfqpsc ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpse ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsc ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpse ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// 4 sets below use reels 1,2,3,5 instead of 1,2,3,4 ?!
-GAME( 200?, sc4cfqpsf ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsg ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsh ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsi ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsf ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsg ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsh ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsi ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps_alt, ROT0, "Qps","Crazy Fruits V1.0 (PR2521, ECRZ) (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR4613 CRAZY FRUITS SP98 PR6813 CRAZY FRUITS SOUNDS11
-GAME( 200?, sc4cfqpsj ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits SP98 (PR4613) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsl ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits SP98 (PR4613) (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsn ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits SP98 (PR4613) (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsp ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits SP98 (PR4613) (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpsm ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits SP98 (PR4613) (BFM / Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfqpso ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits SP98 (PR4613) (BFM / Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsj ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "Qps","Crazy Fruits SP98 (PR4613) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsl ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits SP98 (PR4613) (BFM) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsn ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits SP98 (PR4613) (BFM) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsp ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM","Crazy Fruits SP98 (PR4613) (BFM) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpsm ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits SP98 (PR4613) (BFM / Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfqpso ,sc4cfqps, sc4, sc4, sc4_state, sc4cfqps, ROT0, "BFM / Whitbread","Crazy Fruits SP98 (PR4613) (BFM / Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4cfcas_reel_configs[6] =
@@ -24518,58 +24518,58 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cfcas_mbus)
}
// PR6923 CASINO CRAZY FRUITS PR6923 CRAZY FRUITS SOUNDS11
-GAME( 200?, sc4cfcas ,0, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasa ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasb ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcase ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasf ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcask ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasm ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasp ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasq ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcass ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcast ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasu ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasv ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasw ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasx ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasy ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasz ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas0 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas1 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas2 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas6 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas7 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas8 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasaa ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasaf ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 25)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasag ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 26)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasah ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 27)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasai ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 28)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasaj ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 29)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasak ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 30)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasal ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 31)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasam ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 32)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas ,0, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasa ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasb ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcase ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasf ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcask ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasm ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasp ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasq ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcass ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcast ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasu ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasv ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasw ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasx ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasy ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasz ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas0 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas1 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas2 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas6 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas7 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas8 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasaa ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasaf ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 25)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasag ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 26)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasah ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 27)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasai ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 28)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasaj ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 29)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasak ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 30)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasal ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 31)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasam ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas, ROT0, "BFM","Casino Crazy Fruits (Bellfruit) (Scorpion 4) (set 32)", GAME_NOT_WORKING )
// OK
-GAME( 200?, sc4cfcasr ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYPF) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasl ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYPF) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasi ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasj ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasn ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcaso ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasr ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYPF) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasl ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYPF) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasi ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasj ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasn ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcaso ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
-GAME( 200?, sc4cfcasc ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasd ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasg ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcash ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas3 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas9 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasab ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasac ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas4 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcas5 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasad ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfcasae ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasc ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasd ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasg ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcash ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas3 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas9 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasab ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasac ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (ZYFR) (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas4 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcas5 ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasad ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcasae ,sc4cfcas, sc4, sc4, sc4_state, sc4cfcas_mbus, ROT0, "BFM","Casino Crazy Fruits (CCFR) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4cfclb_reel_configs[6] =
@@ -24589,51 +24589,51 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cfclb)
}
// PR6931 CLUB CRAZY FRUITS PR6931 CRZY SOUNDS11
-GAME( 200?, sc4cfclb ,0, sc4, sc4, sc4_state, sc4cfclb, ROT0, "BFM","Crazy Fruits Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfclba ,sc4cfclb, sc4, sc4, sc4_state, sc4cfclb, ROT0, "BFM","Crazy Fruits Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfclbb ,sc4cfclb, sc4, sc4, sc4_state, sc4cfclb, ROT0, "BFM","Crazy Fruits Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclb ,0, sc4, sc4, sc4_state, sc4cfclb, ROT0, "BFM","Crazy Fruits Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclba ,sc4cfclb, sc4, sc4, sc4_state, sc4cfclb, ROT0, "BFM","Crazy Fruits Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclbb ,sc4cfclb, sc4, sc4, sc4_state, sc4cfclb, ROT0, "BFM","Crazy Fruits Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PR7141 CRAZY GANG PR7141 CRAZY GANG SOUNDS11 CRAZY GANG
-GAME( 200?, sc4crzgn ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 1, Top Box)", GAME_NOT_WORKING ) // Top Box
-GAME( 200?, sc4crzgnb ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 2, Top Box)", GAME_NOT_WORKING ) // Top Box
-GAME( 200?, sc4crzgng ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 3, Top Box)", GAME_NOT_WORKING ) // Top Box
-GAME( 200?, sc4crzgnj ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 4, Top Box)", GAME_NOT_WORKING ) // Top Box
+GAME( 200?, sc4crzgn ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 1, Top Box)", GAME_NOT_WORKING ) // Top Box
+GAME( 200?, sc4crzgnb ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 2, Top Box)", GAME_NOT_WORKING ) // Top Box
+GAME( 200?, sc4crzgng ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 3, Top Box)", GAME_NOT_WORKING ) // Top Box
+GAME( 200?, sc4crzgnj ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 4, Top Box)", GAME_NOT_WORKING ) // Top Box
// none of these do anything with the reels, probably waiting for the Top Box?
-GAME( 200?, sc4crzgna ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnc ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnd ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgne ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnf ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnh ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgni ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnk ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnl ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnm ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnn ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgno ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnp ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnq ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnx ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING ) // incomplete pairing
-GAME( 200?, sc4crzgny ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnz ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn0 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn1 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn2 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgna ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnc ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnd ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgne ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnf ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnh ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgni ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnk ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnl ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnm ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnn ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgno ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnp ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnq ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnx ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4crzgny ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnz ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn0 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn1 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn2 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
// NUMBER PR7141 CRAZY GANG PR7141 CRAZY GANG SOUNDS11 CRAZY GANG ARCADE
-GAME( 200?, sc4crzgnr ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgns ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnt ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnu ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnv ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgnw ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn3 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn4 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn5 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn6 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn7 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzgn8 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnr ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgns ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnt ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnu ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnv ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgnw ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn3 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn4 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn5 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn6 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn7 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzgn8 ,sc4crzgn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Gang Arcade (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4crzky_reel_configs[6] =
@@ -24661,31 +24661,31 @@ DRIVER_INIT_MEMBER(sc4_state,sc4crzky_mbus)
// PR1128 CASINO CRAZY KEYS PR1128 CRAZY KEYS SOUNDS11
-GAME( 200?, sc4crzky ,0, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkya ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyb ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyc ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyd ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkye ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyf ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyg ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // incomplete pairing
-GAME( 200?, sc4crzkyh ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyl ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkym ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyn ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyt ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyu ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzky ,0, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkya ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyb ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyc ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyd ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkye ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyf ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyg ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4crzkyh ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyl ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkym ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyn ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyt ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyu ,sc4crzky, sc4, sc4, sc4_state, sc4crzky, ROT0, "BFM","Casino Crazy Keys (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
// PR1128 CASINO CRAZY KEYS CRAZY KEYS ARCADE PR1128 CRAZY KEYS SOUNDS11
-GAME( 200?, sc4crzkyi ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyj ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyk ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyo ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyp ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyq ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyr ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkys ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyv ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4crzkyw ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyi ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyj ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyk ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyo ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyp ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyq ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyr ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkys ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyv ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4crzkyw ,sc4crzky, sc4, sc4, sc4_state, sc4crzky_mbus, ROT0, "BFM","Casino Crazy Keys Arcade (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4cccsh_reel_configs[6] =
@@ -24707,12 +24707,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cccsh)
// SWP, different buttons to most games, no reels
// PR7023 CRISS CROSS CASH CCC SOUNDS
-GAME( 200?, sc4cccsh ,0, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cccsha ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cccshb ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cccshc ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cccshd ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cccshe ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cccsh ,0, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cccsha ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cccshb ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cccshc ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cccshd ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cccshe ,sc4cccsh, sc4, sc4, sc4_state, sc4cccsh, ROT0, "Mazooma","Criss Cross Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
@@ -24735,21 +24735,21 @@ DRIVER_INIT_MEMBER(sc4_state,sc4daylt)
// PR6801 DAYLIGHT ROBBERY PR6801 DAYLIGHT SOUNDS
-GAME( 200?, sc4daylt ,0, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4daylta ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltb ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltc ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltg ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4daylth ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4daylti ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltj ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4daylt ,0, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4daylta ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltb ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltc ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltg ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4daylth ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4daylti ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltj ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR4601 DAYLIGHT ROBBERY SP98 PR6801 DAYLIGHT SOUNDS
-GAME( 200?, sc4dayltd ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4daylte ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltf ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltk ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltl ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4dayltm ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltd ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4daylte ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltf ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltk ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltl ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4dayltm ,sc4daylt, sc4, sc4, sc4_state, sc4daylt, ROT0, "BFM","Daylight Robbery SP98 (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4deepi_reel_configs[6] =
{
@@ -24768,10 +24768,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4deepi)
}
// PR2099 DEEP IMPACT DIMP SOUNDS DEEP IMPACT
-GAME( 200?, sc4deepi ,0, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4deepia ,sc4deepi, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4deepib ,sc4deepi, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4deepid ,sc4deepi, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4deepi ,0, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4deepia ,sc4deepi, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4deepib ,sc4deepi, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4deepid ,sc4deepi, sc4, sc4, sc4_state, sc4deepi, ROT0, "Mazooma","Deep Impact (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
@@ -24792,11 +24792,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4disco)
}
// PR7048 DISCO INFERNO DISCO SOUNDS DISCO INFERNO
-GAME( 200?, sc4disco ,0, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4discob ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4discoa ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4discoc ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4discod ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4disco ,0, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4discob ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4discoa ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4discoc ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4discod ,sc4disco, sc4, sc4, sc4_state, sc4disco, ROT0, "Mazooma","Disco Inferno (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4dblfr_reel_configs[6] =
{
@@ -24815,13 +24815,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4dblfr)
}
// PR7060 DOUBLE FRENZY DFRZYSND
-GAME( 200?, sc4dblfr ,0, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dblfra ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4dblfrb ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4dblfrc ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4dblfr ,0, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dblfra ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dblfrb ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4dblfrc ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR7060) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2276 DOUBLE FRENZY 212 DFRZYSND
-GAME( 200?, sc4dblfrd ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR2276) (212) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dblfre ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR2276) (212) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dblfrd ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR2276) (212) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dblfre ,sc4dblfr, sc4, sc4, sc4_state, sc4dblfr, ROT0, "Qps","Double Frenzy (PR2276) (212) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4darwr_reel_configs[6] =
{
@@ -24840,10 +24840,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4darw)
}
// PR2026 DOUGH AND ARROW DOUGHSND DOUGH AND ARROW
-GAME( 200?, sc4darw ,0, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4darwa ,sc4darw, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4darwb ,sc4darw, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4darwc ,sc4darw, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4darw ,0, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4darwa ,sc4darw, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4darwb ,sc4darw, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4darwc ,sc4darw, sc4, sc4, sc4_state, sc4darw, ROT0, "Qps","Dough & Arrow (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4sstep_reel_configs[6] =
{
@@ -24863,9 +24863,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sstep)
// SUPER STEP..........................................................................................SUPERSTEPSND. (non-standard header)
-GAME( 200?, sc4sstep ,0, sc4, sc4, sc4_state, sc4sstep, ROT0, "Qps","Super Step (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // Dough & Arrow clone? Super Step in header
-GAME( 200?, sc4sstepa ,sc4sstep, sc4, sc4, sc4_state, sc4sstep, ROT0, "Qps","Super Step (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // Dough & Arrow clone? Super Step in header
-GAME( 200?, sc4sstepb ,sc4sstep, sc4, sc4, sc4_state, sc4sstep, ROT0, "Qps / 21 Casino","Super Step (Qps / 21 Casino) (Scorpion 4)", GAME_NOT_WORKING ) // This one contains 21-Casino and Super Step strings
+GAME( 200?, sc4sstep ,0, sc4, sc4, sc4_state, sc4sstep, ROT0, "Qps","Super Step (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // Dough & Arrow clone? Super Step in header
+GAME( 200?, sc4sstepa ,sc4sstep, sc4, sc4, sc4_state, sc4sstep, ROT0, "Qps","Super Step (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // Dough & Arrow clone? Super Step in header
+GAME( 200?, sc4sstepb ,sc4sstep, sc4, sc4, sc4_state, sc4sstep, ROT0, "Qps / 21 Casino","Super Step (Qps / 21 Casino) (Scorpion 4)", GAME_NOT_WORKING ) // This one contains 21-Casino and Super Step strings
static const stepper_interface* sc4duckq_reel_configs[6] =
@@ -24886,8 +24886,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4duckq)
// PR2519 THEDUCKSOFHAZZARD V1.0 DUCKSOFHAZZARDSND DUCKS OF HAZZARD
-GAME( 200?, sc4duckq ,0, sc4, sc4, sc4_state, sc4duckq, ROT0, "Qps","Ducks Of Hazzard (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4duckqa ,sc4duckq, sc4, sc4, sc4_state, sc4duckq, ROT0, "Qps","Ducks Of Hazzard (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4duckq ,0, sc4, sc4, sc4_state, sc4duckq, ROT0, "Qps","Ducks Of Hazzard (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4duckqa ,sc4duckq, sc4, sc4, sc4_state, sc4duckq, ROT0, "Qps","Ducks Of Hazzard (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4eascs_reel_configs[6] =
{
@@ -24906,18 +24906,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4eascs)
}
// PR1326 CASINO EASY STREAK PR1326 EASY STREAK SOUNDS11 (actually expects PR1326_CAS_EASY_STREAK_SOUNDS11 ? )
-GAME( 200?, sc4eascs ,0, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsa ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsb ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsc ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsd ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascse ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsf ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsg ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsh ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsi ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsj ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4eascsk ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascs ,0, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsa ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsb ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsc ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsd ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascse ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsf ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsg ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsh ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsi ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsj ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4eascsk ,sc4eascs, sc4, sc4, sc4_state, sc4eascs, ROT0, "BFM","Casino Easy Streak (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4fastf_reel_configs[6] =
{
@@ -24936,10 +24936,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fastf)
}
// PR2071 FAST 'N' FURIOUS FNF SOUNDS FAST 'N' FURIOUS
-GAME( 200?, sc4fastf ,0, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fastfa ,sc4fastf, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fastfb ,sc4fastf, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fastfc ,sc4fastf, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fastf ,0, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fastfa ,sc4fastf, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fastfb ,sc4fastf, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fastfc ,sc4fastf, sc4, sc4, sc4_state, sc4fastf, ROT0, "Mazooma","Fast 'n' Furious (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ffru_reel_configs[6] =
{
@@ -24959,12 +24959,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ffru)
// PR7070 FAST FRUIT FFRUIT SOUNDS FAST FRUIT
-GAME( 200?, sc4ffru ,0, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps / Mazooma","Fast Fruit (Qps / Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // has 'MAZ' game code in roms
-GAME( 200?, sc4ffrub ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps / Mazooma","Fast Fruit (Qps / Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // has 'MAZ' game code in roms
-GAME( 200?, sc4ffrua ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ffruc ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ffrud ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ffrue ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ffru ,0, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps / Mazooma","Fast Fruit (Qps / Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // has 'MAZ' game code in roms
+GAME( 200?, sc4ffrub ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps / Mazooma","Fast Fruit (Qps / Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // has 'MAZ' game code in roms
+GAME( 200?, sc4ffrua ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ffruc ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ffrud ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ffrue ,sc4ffru, sc4, sc4, sc4_state, sc4ffru, ROT0, "Qps","Fast Fruit (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4fpitc_reel_configs[6] =
@@ -24984,19 +24984,19 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fpitc)
}
// PR7119 FEVER_PITCH PR7119 FEVER PITCH SOUNDS11
-GAME( 200?, sc4fpitc ,0, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitca ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitcb ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitcd ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitce ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitcf ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitch ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitci ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitcj ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitck ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitc ,0, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitca ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitcb ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitcd ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitce ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitcf ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitch ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitci ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitcj ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitck ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// these 2 fail to show anything
-GAME( 200?, sc4fpitcc ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4fpitcg ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitcc ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4fpitcg ,sc4fpitc, sc4, sc4, sc4_state, sc4fpitc, ROT0, "BFM","Fever Pitch (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4fcc_reel_configs[6] =
{
@@ -25016,10 +25016,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fcc)
}
// PR6835 FIRE CRACKER PR6835 FIRE SOUNDS11
-GAME( 200?, sc4fcc ,0, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fcca ,sc4fcc, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fccb ,sc4fcc, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fccc ,sc4fcc, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fcc ,0, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fcca ,sc4fcc, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fccb ,sc4fcc, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fccc ,sc4fcc, sc4dmd, sc4, sc4_state, sc4fcc, ROT0, "BFM","Firecracker Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4fire_reel_configs[6] =
{
@@ -25039,8 +25039,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fire)
// PR2082 FIRE POWER FPOW SOUNDS FIRE POWER
-GAME( 200?, sc4fire ,0, sc4, sc4, sc4_state, sc4fire, ROT0, "Mazooma","Firepower (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4firea ,sc4fire, sc4, sc4, sc4_state, sc4fire, ROT0, "Mazooma","Firepower (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fire ,0, sc4, sc4, sc4_state, sc4fire, ROT0, "Mazooma","Firepower (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4firea ,sc4fire, sc4, sc4, sc4_state, sc4fire, ROT0, "Mazooma","Firepower (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4fwp_reel_configs[6] =
@@ -25061,13 +25061,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fwp)
// PR2016 WAYSPAYS PR2016,5WAYSPAYS, FWAY SOUNDS 5 WAYS PAYS
-GAME( 200?, sc4fwp ,0, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fwpa ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fwpb ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fwpc ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4fwpcs ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // marked as 'casino'
-GAME( 200?, sc4fwpcsa ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4fwpcsb ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4fwp ,0, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fwpa ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fwpb ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fwpc ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fwpcs ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // marked as 'casino'
+GAME( 200?, sc4fwpcsa ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4fwpcsb ,sc4fwp, sc4, sc4, sc4_state, sc4fwp, ROT0, "Mazooma","Five Ways Pays (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
static const stepper_interface* sc4fd7th_reel_configs[6] =
{
@@ -25087,17 +25087,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fd7th)
// PR6804 FRANKIE DETTORI PR6804 FRANKIE SOUNDS
-GAME( 200?, sc4fd7th ,0, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7tha ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7thb ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7the ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7thf ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7thg ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7th ,0, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7tha ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7thb ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7the ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7thf ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7thg ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR6804 FRANKIE DETTORI SP98 PR6804 FRANKIE SOUNDS
-GAME( 200?, sc4fd7thc ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7thd ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7thh ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fd7thi ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7thc ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7thd ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7thh ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fd7thi ,sc4fd7th, sc4, sc4, sc4_state, sc4fd7th, ROT0, "BFM","Frankie Dettori's 7th Heaven SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4frenz_reel_configs[6] =
{
@@ -25116,12 +25116,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4frenz)
}
// PR1101 FRUIT FRENZY PR1101 FRUIT FRENZY SOUNDS11
-GAME( 200?, sc4frenz ,0, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4frenza ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4frenzb ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4frenzc ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4frenzd ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4frenze ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4frenz ,0, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4frenza ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4frenzb ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4frenzc ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4frenzd ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4frenze ,sc4frenz, sc4, sc4, sc4_state, sc4frenz, ROT0, "BFM","Fruit Frenzy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4ftopi_reel_configs[6] =
{
@@ -25141,19 +25141,19 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ftopi)
// PR2027 FRUITOPIA FRUITOPIASND FRUITOPIA
-GAME( 200?, sc4ftopi ,0, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ftopia ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ftopib ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ftopic ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopi ,0, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopia ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopib ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopic ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2027 FRUITOPIA_17/04/03 V1.1 FRUITOPIASND FRUITOPIA
-GAME( 200?, sc4ftopif ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ftopii ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopif ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopii ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2027 FRUITOPIA V2.1 FRUITOPIASND FRUITOPIA
-GAME( 200?, sc4ftopid ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ftopig ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopid ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopig ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2027 FRUITOPIA V2.2 FRUITOPIASND FRUITOPIA
-GAME( 200?, sc4ftopie ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.2) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ftopih ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.2) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopie ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.2) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ftopih ,sc4ftopi, sc4, sc4, sc4_state, sc4ftopi, ROT0, "Qps","Fruitopia (V2.2) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4frsu_reel_configs[6] =
{
@@ -25172,14 +25172,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4frsu)
}
// PR6928 CASINO FRUIT N SUITS PR6928 FRUIT N SUITS SOUNDS11
-GAME( 200?, sc4frsu ,0, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4frsua ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4frsub ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4frsuc ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4frsud ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4frsue ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4frsuf ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4frsug ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsu ,0, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsua ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsub ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsuc ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsud ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsue ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsuf ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4frsug ,sc4frsu, sc4, sc4, sc4_state, sc4frsu, ROT0, "BFM","Casino Fruits 'n' Suits (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4fullt_reel_configs[6] =
{
@@ -25198,20 +25198,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fullt)
}
// PR2537 FULL THROTTLE 011 FULLTHROTTLESND FULL THROTTLE
-GAME( 200?, sc4fullt ,0, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fulltb ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fullt ,0, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fulltb ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2537 FULL THROTTLE 041 FULLTHROTTLESND FULL THROTTLE
-GAME( 200?, sc4fullta ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fulltc ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fullta ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fulltc ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2537 FULL THROTTLE 012 FULLTHROTTLESND FULL THROTTLE
-GAME( 200?, sc4fulltd ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fulltg ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fulltd ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fulltg ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2537 FULL THROTTLE 042 FULLTHROTTLESND FULL THROTTLE
-GAME( 200?, sc4fullte ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fullth ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fullte ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fullth ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// R2537 FULL THROTTLE 013 FULLTHROTTLESND FULL THROTTLE
-GAME( 200?, sc4fulltf ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (013) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fullti ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (013) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fulltf ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (013) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fullti ,sc4fullt, sc4, sc4, sc4_state, sc4fullt, ROT0, "Qps","Full Throttle (013) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4ziggy_reel_configs[6] =
@@ -25232,14 +25232,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ziggy)
// PR2162 GETTIN' ZIGGY ZIGY SOUNDS GETTIN' ZIGGY
-GAME( 200?, sc4ziggy ,0, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ziggya ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ziggyb ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ziggyc ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ziggyd ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ziggye ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4ziggyf ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ziggyg ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggy ,0, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggya ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggyb ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggyc ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggyd ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggye ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggyf ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ziggyg ,sc4ziggy, sc4, sc4, sc4_state, sc4ziggy, ROT0, "Mazooma","Gettin Ziggy With It (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4gldcl_reel_configs[6] =
{
@@ -25258,8 +25258,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gldcl)
}
// PR2292 CLUB GLADIATOR CLUB GLADIATOR CLUB CLUB GLAD SOUNDS CLUB GLADIATOR
-GAME( 200?, sc4gldcl ,0, sc4, sc4, sc4_state, sc4gldcl, ROT0, "QPS","Gladiator Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gldcla ,sc4gldcl, sc4, sc4, sc4_state, sc4gldcl, ROT0, "QPS","Gladiator Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gldcl ,0, sc4, sc4, sc4_state, sc4gldcl, ROT0, "QPS","Gladiator Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gldcla ,sc4gldcl, sc4, sc4, sc4_state, sc4gldcl, ROT0, "QPS","Gladiator Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
@@ -25299,16 +25299,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ghosttb)
}
// PR7090 GOLDEN GHOST GOLDEN GHOST MAZ GHOST SOUNDS GOLDEN GHOST
-GAME( 200?, sc4ghost ,0, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ghostb ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ghostc ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ghoste ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ghostf ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ghostg ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghost ,0, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghostb ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghostc ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghoste ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghostf ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghostg ,sc4ghost, sc4, sc4, sc4_state, sc4ghost, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR7090 GOLD GHOST TRIPLE GHOST SOUNDS 8 GOLDEN GHOST
-GAME( 200?, sc4ghosta ,sc4ghost, sc4, sc4, sc4_state, sc4ghosttb, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ghostd ,sc4ghost, sc4, sc4, sc4_state, sc4ghosttb, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ghosth ,sc4ghost, sc4, sc4, sc4_state, sc4ghosttb, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (Top Box, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghosta ,sc4ghost, sc4, sc4, sc4_state, sc4ghosttb, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghostd ,sc4ghost, sc4, sc4, sc4_state, sc4ghosttb, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ghosth ,sc4ghost, sc4, sc4, sc4_state, sc4ghosttb, ROT0, "Mazooma","Golden Ghost (Mazooma) (Scorpion 4) (Top Box, set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4ggrid_reel_configs[6] =
@@ -25334,26 +25334,26 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ggrid_mbus)
}
// PR2518 GOLDEN GRID V1.0 GOLDENGRIDSND GOLDEN GRID
-GAME( 200?, sc4ggrid ,0, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggrida ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggride ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggridf ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggrid ,0, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggrida ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggride ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridf ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.0) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2518 GOLDEN GRID V1.1 GOLDENGRIDSND GOLDEN GRID
-GAME( 200?, sc4ggridb ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggridc ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggridg ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggridh ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridb ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridc ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridg ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridh ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.1) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2518 GOLDEN GRID V1.3 GOLDENGRIDSND GOLDEN GRID
-GAME( 200?, sc4ggridd ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.3) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridd ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid, ROT0, "Qps","Golden Grid (V1.3) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// PR2518 GOLDEN GRID V011 GOLDENGRIDSND GOLDEN GRID
-GAME( 200?, sc4ggridi ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V011) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggridk ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V011) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridi ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V011) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridk ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V011) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2518 GOLDEN GRID V041 GOLDENGRIDSND GOLDEN GRID
-GAME( 200?, sc4ggridj ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggridl ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridj ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridl ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2518 GOLDEN GRID V012 GOLDENGRIDSND GOLDEN GRID
-GAME( 200?, sc4ggridm ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggridn ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridm ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggridn ,sc4ggrid, sc4, sc4, sc4_state, sc4ggrid_mbus, ROT0, "Qps","Golden Grid (V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4ggcl_reel_configs[6] =
{
@@ -25378,13 +25378,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ggcl_mbus)
}
// PR???? CLUB GOLDEN GRID V1.0 CLUBGOLDENGRIDSND CLUB GOLDEN GRID
-GAME( 200?, sc4ggcl ,0, sc4, sc4, sc4_state, sc4ggcl, ROT0, "Qps","Golden Grid Club (V1.0) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggcl ,0, sc4, sc4, sc4_state, sc4ggcl, ROT0, "Qps","Golden Grid Club (V1.0) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// PR???? CLUB GOLDEN GRID 411 CLUBGOLDENGRIDSND CLUB GOLDEN GRID
-GAME( 200?, sc4ggcla ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggclb ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggcla ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggclb ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR???? CLUB GOLDEN GRID 412 CLUBGOLDENGRIDSND CLUB GOLDEN GRID
-GAME( 200?, sc4ggclc ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V412) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggcld ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V412) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggclc ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V412) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggcld ,sc4ggcl, sc4, sc4, sc4_state, sc4ggcl_mbus, ROT0, "Qps","Golden Grid Club (V412) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4goldo_reel_configs[6] =
@@ -25405,12 +25405,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4goldo)
// PR7024 GOLDEN OLDIE OLDIE SOUNDS
-GAME( 200?, sc4goldo ,0, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldoa ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldob ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldoc ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gocas ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gocasa ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldo ,0, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldoa ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldob ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldoc ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gocas ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gocasa ,sc4goldo, sc4, sc4, sc4_state, sc4goldo, ROT0, "Mazooma","Casino Golden Oldie (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4goldw_reel_configs[6] =
@@ -25432,15 +25432,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4goldw)
// the dot matrix calls these 'classic crazy fruits' was it not shown or is Golden Winner a subtitle?
// PR1431 GOLDEN WINNER PR1431 GOLDEN WINNER SND11
-GAME( 200?, sc4goldw ,0, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldwa ,sc4goldw, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldwb ,sc4goldw, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldwc ,sc4goldw, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldw ,0, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldwa ,sc4goldw, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldwb ,sc4goldw, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldwc ,sc4goldw, sc4, sc4, sc4_state, sc4goldw, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR1437 GOLDEN WINNER PR1436 TRIPLE CASINO SOUNDS11 // these show init comms
-GAME( 200?, sc4goldwd ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldwe ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldwf ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4goldwg ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldwd ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldwe ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldwf ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4goldwg ,sc4goldw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Golden Winner (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4bonbx_reel_configs[6] =
@@ -25491,31 +25491,31 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gx)
// Listed as Bonus Bar X, what's the correct title?
// PR7036GOLDEN X GOLDEN X ARCADE BARX SOUNDS GOLDEN X
-GAME( 200?, sc4bonbx ,0, sc4, sc4bonbx4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxc ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxd ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxe ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxf ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbx ,0, sc4, sc4bonbx4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxc ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxd ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxe ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxf ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbxm, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
// PR7036GOLDEN X BARX SOUNDS GOLDEN X
-GAME( 200?, sc4bonbxa ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxb ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxg ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxh ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxi ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxj ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxk ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4bonbxl ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxa ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxb ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxg ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxh ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxi ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxj ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxk ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4bonbxl ,sc4bonbx, sc4, sc4, sc4_state, sc4bonbx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
// PR7036 GOLDEN X BARX SOUNDS (these were listed as Golden X Casino but seem to be Bar X / Bonus Bar X)
-GAME( 200?, sc4gx ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gxcasa ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gxcasb ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gxcasc ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gxcasd ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gxcasa ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gxcasb ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gxcasc ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gxcasd ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 5)", GAME_NOT_WORKING )
// PR7036GOLDEN X BARX SOUNDS GOLDEN
-GAME( 200?, sc4gxcase ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gxcasf ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4gxa ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 8)", GAME_NOT_WORKING ) // wasn't marked as Casino
-GAME( 200?, sc4gxb ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 9)", GAME_NOT_WORKING ) // wasn't marked as Casino
+GAME( 200?, sc4gxcase ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gxcasf ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gxa ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 8)", GAME_NOT_WORKING ) // wasn't marked as Casino
+GAME( 200?, sc4gxb ,sc4bonbx, sc4, sc4, sc4_state, sc4gx, ROT0, "Mazooma","Bar X (Mazooma) (Scorpion 4) (BARX, set 9)", GAME_NOT_WORKING ) // wasn't marked as Casino
@@ -25541,14 +25541,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gggtb)
// TBOX
// PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
-GAME( 200?, sc4ggtb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
-GAME( 200?, sc4ggtba ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4ggtbb ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggtb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
+GAME( 200?, sc4ggtba ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggtbb ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 3)", GAME_NOT_WORKING ) // ^^
// PR2056 GOLD X TRIPLE BARX SOUNDS J GOLD X TRIPLE (this was in a set just called 'top box')
-GAME( 200?, sc4tbox ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tbox ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 4)", GAME_NOT_WORKING )
// PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE (these were in a Monopoly set, did it use the same top box code?, could be for Monopoly Deluxe?)
-GAME( 200?, sc4monog ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 5)", GAME_NOT_WORKING )// PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
-GAME( 200?, sc4monoga ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 6)", GAME_NOT_WORKING )// PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
+GAME( 200?, sc4monog ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 5)", GAME_NOT_WORKING )// PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
+GAME( 200?, sc4monoga ,sc4ggtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, TBOX) (Scorpion 4) (Top Box, set 6)", GAME_NOT_WORKING )// PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
static const stepper_interface* sc4ggame_reel_configs[6] =
@@ -25592,94 +25592,94 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gx3)
// GLDX
// 25GBP sets
// PR2056 GOLDEN X GOLDEN GAME ARCADE BARX SOUNDS GOLDEN X
-GAME( 200?, sc4ggame ,0, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggamei ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 2)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamep ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 3)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggameq ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 4)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamer ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame ,0, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggamei ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamep ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 3)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggameq ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamer ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 25GBP, set 5)", GAME_NOT_WORKING )// ^^
// 35GBP sets
-GAME( 200?, sc4ggame7 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 1)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame8 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 2)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame9 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 3)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggameaa ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 4)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggameab ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 5)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggameac ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 6)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamead ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 7)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggameae ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 8)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame7 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 1)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame8 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame9 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 3)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggameaa ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggameab ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggameac ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 6)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamead ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 7)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggameae ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (GLDX, 35GBP, set 8)", GAME_NOT_WORKING )// ^^
// pay unit error
-GAME( 200?, sc4ggamel ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamem ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamew ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 3)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamex ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamey ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 5)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamez ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 6)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame1 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 7)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame2 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 8)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamel ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamem ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamew ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 3)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamex ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamey ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamez ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 6)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame1 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 7)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame2 ,sc4ggame, sc4, sc4, sc4_state, sc4ggamem, ROT0, "Mazooma","Golden X (Mazooma) (PR2056, newer?) (Scorpion 4) (set 8)", GAME_NOT_WORKING )// ^^
// 25GBP, no 41 check
// PR2056 GOLDEN X BARX SOUNDS GOLDEN X
-GAME( 200?, sc4ggamea ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggameb ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4ggamec ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 3)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4ggamed ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 4)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4ggames ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 5)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamet ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 6)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggameu ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 7)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamea ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggameb ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggamec ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggamed ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 4)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggames ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamet ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 6)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggameu ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 25GBP, set 7)", GAME_NOT_WORKING )// ^^
// 30GBP, no 41 check
-GAME( 200?, sc4ggamef ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 1)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4ggameg ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4ggamej ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 3)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamek ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 4)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggamev ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 5)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame3 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 6)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame4 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 7)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame5 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 8)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame6 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 9)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamef ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 1)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggameg ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggamej ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 3)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamek ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamev ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame3 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 6)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame4 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 7)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame5 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 8)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame6 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (GLDX, 30GBP, set 9)", GAME_NOT_WORKING )// ^^
// pay unit error
-GAME( 200?, sc4ggamen ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggame0 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggamen ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggame0 ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
// PR2056 GOLDEN X BARX SOUNDS GOLDEN X (are these really Gold Diggers?)
-GAME( 200?, sc4gdmz ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // GLDX
-GAME( 200?, sc4gdmza ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // GLDX
+GAME( 200?, sc4gdmz ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // GLDX
+GAME( 200?, sc4gdmza ,sc4ggame, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden X (Mazooma) (PR2056) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // GLDX
// boot as GLDX, not happy with this sound rom..
// PR2056 GOLDEN X BARX SOUNDS GOLDEN X
-GAME( 200?, sc4gx3 ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gx3a ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gx3b ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gx3c ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gx3d ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gx3e ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gx3f ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4gx3g ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3 ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3a ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3b ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3c ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3d ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3e ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3f ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gx3g ,sc4ggame, sc4, sc4, sc4_state, sc4gx3, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 8)", GAME_NOT_WORKING )
// GLDX
// PR2056 GOLDEN X BARX SOUNDS GOLDEN X (was Golden Game Casino)
-GAME( 200?, sc4ggcas ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggcasa ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggcasb ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggcasc ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggcas ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggcasa ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggcasb ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggcasc ,sc4ggame, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden X (Mazooma) (Scorpion 4) (GLDX, set 12)", GAME_NOT_WORKING )
// GLDC
// PR2056 GOLDEN X BARX SOUNDS GOLDEN X
-GAME( 200?, sc4gnc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gnca ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gncb ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gncc ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gncd ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gnce ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gnc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gnca ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gncb ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gncc ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gncd ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gnce ,sc4gnc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Golden Game Club (Mazooma) (Scorpion 4) (GLDC, set 6)", GAME_NOT_WORKING )
// GGDX
// these were in the above sets
// PR2201 GOLDEN X GOLDEN GAME MAZ GXDX SOUNDS GOLDEN GAME DLX
-GAME( 200?, sc4ggdlx ,0, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggdlxc ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggdlx ,0, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggdlxc ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 2)", GAME_NOT_WORKING )// ^^
// PR2201 GOLDEN X GOLDEN GAME DLX MAZ GXDX SOUNDS GOLDEN X
-GAME( 200?, sc4ggdlxa ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggdlxb ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 4)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggdlxd ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 5)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4ggdlxe ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 6)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggdlxa ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggdlxb ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggdlxd ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggdlxe ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 6)", GAME_NOT_WORKING )// ^^
// PR2201 GOLDEN GAME DELUXE GOLDEN GAME MAZ GXDX SOUNDS GOLDEN GAME DLX
-GAME( 200?, sc4ggdlxf ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ggdlxg ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 8)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4ggdlxf ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggdlxg ,sc4ggdlx, sc4, sc4, sc4_state, sc4ggame, ROT0, "Mazooma","Golden Game Deluxe (Mazooma) (PR2201) (Scorpion 4) (GGDX, set 8)", GAME_NOT_WORKING )// ^^
@@ -25701,29 +25701,29 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ggg)
// do these sets have the wrong project name / ID strings? they boot at GGGB (Grand Golden Game) but their product ID in the header suggests standard Golden Game, looks like they forgot to update it at first, the topbox has the same issue
// PR2056 GOLDEN X GOLDEN GAME ARCADE BARX SOUNDS GOLDEN X
-GAME( 200?, sc4ggg ,0, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gggb ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4gggc ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 3)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4gggd ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 4)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4ggge ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 5)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4gggf ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 6)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4gggk ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 7)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggl ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 8)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggm ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 9)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggn ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 10)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggo ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 11)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggp ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 12)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggg ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4ggg ,0, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gggb ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4gggc ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4gggd ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 4)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4ggge ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 5)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4gggf ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 6)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4gggk ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 7)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggl ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 8)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggm ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 9)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggn ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 10)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggo ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 11)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggp ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 12)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggg ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056) (Scorpion 4) (GGGB, 35GBP, set 13)", GAME_NOT_WORKING )
// PR2353 GRAND GOLDEN GAME GRAND GOLDEN GAME MAZ BARX SOUNDS GOLDEN GAME
-GAME( 200?, sc4gggh ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 1)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4gggi ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 2)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggq ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 3)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggr ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 4)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4gggs ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggh ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 1)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4gggi ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggq ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 3)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggr ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggs ,sc4ggg, sc4, sc4, sc4_state, sc4ggg, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2353) (Scorpion 4) (GGGB, 35GBP, set 5)", GAME_NOT_WORKING )// ^^
// PR2056 GOLD X TRIPLE BARX SOUNDS 0 GOLD X TRIPLE (these were in a Grand Golden Game set)
-GAME( 200?, sc4gggtb ,sc4ggg, sc4, sc4, sc4_state, sc4gggtb, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056, GGGT) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
-GAME( 200?, sc4gggtba ,sc4ggg, sc4, sc4, sc4_state, sc4gggtb, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056, GGGT) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4gggtb ,sc4ggg, sc4, sc4, sc4_state, sc4gggtb, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056, GGGT) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 GOLD X TRIPLE BARX SOUNDS GOLD X TRIPLE
+GAME( 200?, sc4gggtba ,sc4ggg, sc4, sc4, sc4_state, sc4gggtb, ROT0, "Mazooma","Grand Golden Game (Mazooma) (PR2056, GGGT) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )// ^^
@@ -25746,10 +25746,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gag)
// the (PR7019, GRAN) sets requires 3:2 and 3:3 ON to boot, (PR7019, GRAB) I'm not sure
// PR7019 GRAB A GRANNY GRANNY SOUNDS
-GAME( 200?, sc4gag ,0, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAB) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gagb ,sc4gag, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAB) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gaga ,sc4gag, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAN) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gagc ,sc4gag, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAN) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gag ,0, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAB) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gagb ,sc4gag, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAB) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gaga ,sc4gag, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAN) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gagc ,sc4gag, sc4, sc4, sc4_state, sc4gag, ROT0, "Mazooma","Grab A Granny (PR7019, GRAN) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4greed_reel_configs[6] =
@@ -25771,8 +25771,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4greed)
// PR1401 AWP GREEDY GONZALEZ PR1401 GREEDY GONZ SOUNDS11
-GAME( 200?, sc4greed ,0, sc4, sc4, sc4_state, sc4greed, ROT0, "BFM","Greedy Gonzalez (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4greeda ,sc4greed, sc4, sc4, sc4_state, sc4greed, ROT0, "BFM","Greedy Gonzalez (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4greed ,0, sc4, sc4, sc4_state, sc4greed, ROT0, "BFM","Greedy Gonzalez (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4greeda ,sc4greed, sc4, sc4, sc4_state, sc4greed, ROT0, "BFM","Greedy Gonzalez (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4hf_reel_configs[6] =
{
@@ -25793,14 +25793,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hf)
//PR1011 HAPPY FRUITS PR1011 HAPPY FRUITS SOUNDS11
-GAME( 200?, sc4hf ,0, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hfa ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hfb ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hfc ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hfd ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hfe ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4hff ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4hfg ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4hf ,0, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfa ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfb ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfc ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfd ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfe ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hff ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfg ,sc4hf, sc4, sc4, sc4_state, sc4hf, ROT0, "BFM","Happy Fruits (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4hfcl_reel_configs[6] =
@@ -25822,8 +25822,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hfcl)
// PR1021 CLUB HAPPY FRUITS PR1021 HAPPY SOUNDS11 HAPPY FRUITS
-GAME( 200?, sc4hfcl ,0, sc4, sc4, sc4_state, sc4hfcl, ROT0, "BFM","Happy Fruits Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hfcla ,sc4hfcl, sc4, sc4, sc4_state, sc4hfcl, ROT0, "BFM","Happy Fruits Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfcl ,0, sc4, sc4, sc4_state, sc4hfcl, ROT0, "BFM","Happy Fruits Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hfcla ,sc4hfcl, sc4, sc4, sc4_state, sc4hfcl, ROT0, "BFM","Happy Fruits Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4himi_reel_configs[6] =
@@ -25843,18 +25843,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4himi)
}
// PR2999 HIGH 'N' MIGHTY MITY SOUNDS HIGH 'N' MIGHTY
-GAME( 200?, sc4himi ,0, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4himic ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4himif ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4himig ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4himih ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4himii ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4himi ,0, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4himic ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4himif ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4himig ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4himih ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4himii ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2999) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR2119 HIGH 'N' MIGHTY MITY SOUNDS HIGH 'N' MIGHTY
-GAME( 200?, sc4himia ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2119) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4himie ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2119) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4himia ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2119) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4himie ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2119) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2067 HIGH 'N' MIGHTY MITY SOUNDS HIGH 'N' MIGHTY
-GAME( 200?, sc4himib ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2067) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4himid ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2067) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4himib ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2067) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4himid ,sc4himi, sc4, sc4, sc4_state, sc4himi, ROT0, "Mazooma","High 'n' Mighty (PR2067) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4hi5_reel_configs[6] =
@@ -25874,14 +25874,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hi5)
}
// PR1003 HIGH FIVE PR1003 HIGH FIVE SOUNDS11
-GAME( 200?, sc4hi5 ,0, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hi5b ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hi5d ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hi5f ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hi5a ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hi5c ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hi5e ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hi5g ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5 ,0, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5b ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5d ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5f ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM","High 5 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5a ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5c ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5e ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hi5g ,sc4hi5, sc4, sc4, sc4_state, sc4hi5, ROT0, "BFM / Whitbread","High 5 (Bellfruit / Whitbread) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4sprng_reel_configs[6] =
{
@@ -25900,7 +25900,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sprng)
}
// PR2066 HIGHLY SPRUNG HIGH SOUNDS HIGHLY SPRUNG
-GAME( 200?, sc4sprng ,0, sc4, sc4, sc4_state, sc4sprng, ROT0, "Mazooma","Highly Sprung (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4sprng ,0, sc4, sc4, sc4_state, sc4sprng, ROT0, "Mazooma","Highly Sprung (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4hilo_reel_configs[6] =
@@ -25920,18 +25920,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hilo)
}
// PR1013 HILOWATHA PR1013 HILOWATHA SOUNDS11
-GAME( 200?, sc4hilo ,0, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hiloa ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hilob ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hiloc ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hilod ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hiloe ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4hilof ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4hilog ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4hiloh ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4hiloi ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4hiloj ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4hilok ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4hilo ,0, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hiloa ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hilob ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hiloc ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hilod ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hiloe ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hilof ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4hilog ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4hiloh ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4hiloi ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4hiloj ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4hilok ,sc4hilo, sc4, sc4, sc4_state, sc4hilo, ROT0, "BFM","Hilowatha (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4hitsh_reel_configs[6] =
@@ -25951,12 +25951,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hitsh)
}
// PR1112 HIT SHOT PR1112 HIT SHOT SOUNDS11
-GAME( 200?, sc4hitsh ,0, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hitsha ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hitshb ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hitshc ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hitshd ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hitshe ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hitsh ,0, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hitsha ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hitshb ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hitshc ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hitshd ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hitshe ,sc4hitsh, sc4, sc4, sc4_state, sc4hitsh, ROT0, "BFM","Hit Shot (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4holyw_reel_configs[6] =
{
@@ -25975,10 +25975,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4holyw)
}
// PR7115 HOLLYWOOD PR7115 HOLLYWOOD SOUNDS11
-GAME( 200?, sc4holyw ,0, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM","Hollywood (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4holywb ,sc4holyw, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM","Hollywood (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4holywa ,sc4holyw, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM / Whitbread","Hollywood (Bellfruit / Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4holywc ,sc4holyw, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM / Whitbread","Hollywood (Bellfruit / Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4holyw ,0, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM","Hollywood (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4holywb ,sc4holyw, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM","Hollywood (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4holywa ,sc4holyw, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM / Whitbread","Hollywood (Bellfruit / Whitbread) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4holywc ,sc4holyw, sc4, sc4, sc4_state, sc4holyw, ROT0, "BFM / Whitbread","Hollywood (Bellfruit / Whitbread) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4h6cl_reel_configs[6] =
{
@@ -25997,10 +25997,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4h6cl)
}
// PR1759 CLUB HOT SIX HOT SIX CLUB PR1759 HOSX SOUNDS11
-GAME( 200?, sc4h6cl ,0, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4h6cla ,sc4h6cl, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4h6clb ,sc4h6cl, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4h6clc ,sc4h6cl, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4h6cl ,0, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4h6cla ,sc4h6cl, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4h6clb ,sc4h6cl, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4h6clc ,sc4h6cl, sc4, sc4, sc4_state, sc4h6cl, ROT0, "BFM","Hot Six Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ijclb_reel_configs[6] =
@@ -26021,7 +26021,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ijclb)
// PR2403 CLUB ITALIAN JOB CLUB ITALIAN JOB CLUB CLUB ITJB SOUNDS
-GAME( 200?, sc4ijclb ,0, sc4, sc4, sc4_state, sc4ijclb, ROT0, "Mazooma","Italian Job Club (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijclb ,0, sc4, sc4, sc4_state, sc4ijclb, ROT0, "Mazooma","Italian Job Club (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4jack_reel_configs[6] =
{
@@ -26041,14 +26041,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4jack)
// PR2078 JACK THE KIPPER JKIP SOUNDS JACK THE KIPPER
-GAME( 200?, sc4jack ,0, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4jacka ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4jackb ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4jackc ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4jackd ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4jacke ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4jackf ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4jackg ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4jack ,0, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4jacka ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4jackb ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4jackc ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4jackd ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4jacke ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4jackf ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4jackg ,sc4jack, sc4, sc4, sc4_state, sc4jack, ROT0, "Mazooma","Jack The Kipper (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4jjunc_reel_configs[6] =
@@ -26068,16 +26068,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4jjunc)
}
// PR1304 JACKPOT JUNCTION PR1304 JACKPOT JUNCTION SOUNDS11
-GAME( 2002, sc4jjunc ,0, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjunca ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjuncb ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjuncc ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjuncd ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjunce ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjuncf ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjuncg ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjunch ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 2002, sc4jjunci ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjunc ,0, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjunca ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjuncb ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjuncc ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjuncd ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjunce ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjuncf ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjuncg ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjunch ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 2002, sc4jjunci ,sc4jjunc, sc4, sc4, sc4_state, sc4jjunc, ROT0, "BFM","Jackpot Junction (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4jjucl_reel_configs[6] =
@@ -26105,14 +26105,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4jjucl_mbus)
// REEL7 ERR 27 (where does reel 7 connect?!)
// PR1422 CLUB JACKPOT JUNCTION PR1422 JACKPOT JUNCTION SOUNDS11
-GAME( 200?, sc4jjucl ,0, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjuclb ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjucl ,0, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjuclb ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1422 CLUB JACKPOT JUNCTION JACKPOT JUNCTION CLUB PR1422 JACKPOT JUNCTION SOUNDS11
-GAME( 200?, sc4jjucld ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl_mbus, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjucle ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl_mbus, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjucld ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl_mbus, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjucle ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl_mbus, ROT0, "BFM","Jackpot Junction Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR1422 CLUB JACKPOT JUNCTION FERRY PR1422 JACKPOT JUNCTION SOUNDS11
-GAME( 200?, sc4jjucla ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjuclc ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjucla ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjuclc ,sc4jjucl, sc4, sc4, sc4_state, sc4jjucl, ROT0, "BFM","Jackpot Junction Club (Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4jolly_reel_configs[6] =
@@ -26133,8 +26133,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4jolly)
// PR2054 JOLLY JOUSTINGV2.0 JJOLLSND JOLLY JOUSTING
-GAME( 200?, sc4jolly ,0, sc4, sc4, sc4_state, sc4jolly, ROT0, "Qps","Jolly Jousting (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4jollya ,sc4jolly, sc4, sc4, sc4_state, sc4jolly, ROT0, "Qps","Jolly Jousting (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4jolly ,0, sc4, sc4, sc4_state, sc4jolly, ROT0, "Qps","Jolly Jousting (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4jollya ,sc4jolly, sc4, sc4, sc4_state, sc4jolly, ROT0, "Qps","Jolly Jousting (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4juicy_reel_configs[6] =
@@ -26161,20 +26161,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4juicy_mbus)
// PR1136 JUICY JACKPOTS 65% FERRY PR1136 JUICY JACKPOTS SOUNDS11
-GAME( 200?, sc4juicy ,0, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (65% Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4juicyb ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (65% Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicy ,0, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (65% Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicyb ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (65% Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1136 JUICY JACKPOTS PR1136 JUICY JACKPOTS SOUNDS11
-GAME( 200?, sc4juicyd ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4juicye ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4juicyf ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4juicyg ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicyd ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicye ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicyf ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicyg ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR1136 JUICY JACKPOTS JUICY JACKPOTS CLUB PR1136 JUICY JACKPOTS SOUNDS11
-GAME( 200?, sc4juicyi ,sc4juicy, sc4, sc4, sc4_state, sc4juicy_mbus, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (311 Club, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4juicyj ,sc4juicy, sc4, sc4, sc4_state, sc4juicy_mbus, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (311 Club, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicyi ,sc4juicy, sc4, sc4, sc4_state, sc4juicy_mbus, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (311 Club, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicyj ,sc4juicy, sc4, sc4, sc4_state, sc4juicy_mbus, ROT0, "BFM","Juicy Jackpots Club (PR1136) (Bellfruit) (Scorpion 4) (311 Club, set 2)", GAME_NOT_WORKING )
// this has a different (wrong?) product ID and issues with the VFD even during startup, maybe a buggy release?
// PR1123 JUICY JACKPOTS PR1136 JUICY JACKPOTS SOUNDS11
-GAME( 200?, sc4juicya ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1123) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4juicyc ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1123) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicya ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1123) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4juicyc ,sc4juicy, sc4, sc4, sc4_state, sc4juicy, ROT0, "BFM","Juicy Jackpots Club (PR1123) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4jjf_reel_configs[6] =
@@ -26195,21 +26195,21 @@ DRIVER_INIT_MEMBER(sc4_state,sc4jjf)
// PR6807 JUMPING JACK FLASH PR6807 JUMP SOUNDS11
-GAME( 200?, sc4jjf ,0, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfa ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfb ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfg ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfh ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfi ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjf ,0, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfa ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfb ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfg ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfh ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfi ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash (PR6807) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR4607 JUMPING JACK FLASH SP98 PR6807 JUMP SOUNDS11
-GAME( 200?, sc4jjfc ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfd ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfe ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjff ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfj ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfk ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfl ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjfm ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfc ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfd ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfe ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjff ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfj ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfk ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfl ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjfm ,sc4jjf, sc4, sc4, sc4_state, sc4jjf, ROT0, "BFM","Jumping Jack Flash SP98 (PR4607) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4kalei_reel_configs[6] =
{
@@ -26228,14 +26228,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4kalei)
}
// PR2538 KALEIDOSCOPE 011 KALEIDOSCOPESND KALEIDOSCOPE
-GAME( 200?, sc4kalei ,0, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4kaleib ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (011) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4kalei ,0, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4kaleib ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (011) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PR2538 KALEIDOSCOPE 041 KALEIDOSCOPESND KALEIDOSCOPE
-GAME( 200?, sc4kaleia ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4kaleic ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (041) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4kaleia ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4kaleic ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (041) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2538 KALEIDOSCOPE 051 KALEIDOSCOPESND KALEIDOSCOPE
-GAME( 200?, sc4kaleid ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (051) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4kaleie ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (051) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4kaleid ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (051) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4kaleie ,sc4kalei, sc4, sc4, sc4_state, sc4kalei, ROT0, "Qps","Kaleidoscope (051) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4lir_reel_configs[6] =
{
@@ -26254,16 +26254,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lir)
}
// PR1001 LET IT ROLL PR1001 LETITROLL SOUNDS11
-GAME( 200?, sc4lir ,0, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lira ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4lirb ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4lirc ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4lird ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4lire ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4lirf ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4lirg ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4lirh ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4liri ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4lir ,0, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lira ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lirb ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4lirc ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4lird ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4lire ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4lirf ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4lirg ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4lirh ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4liri ,sc4lir, sc4, sc4, sc4_state, sc4lir, ROT0, "BFM","Let It Roll (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4lined_reel_configs[6] =
@@ -26289,27 +26289,27 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lined_mbus)
}
// PR7067CASINO LINE DANCER LINE SOUNDS LINE DANCER
-GAME( 200?, sc4lined ,0, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lineda ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lined ,0, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lineda ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PAY UNIT ERR 17 alarm during startup
-GAME( 200?, sc4linedb ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4linedc ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4linedb ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4linedc ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR7067CASINO LINE DANCER LINE DANCER ARCADE LINE SOUNDS LINE DANCER
// PAY UNIT ERR 17 alarm during startup
-GAME( 200?, sc4linedd ,sc4lined, sc4, sc4, sc4_state, sc4lined_mbus, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4linede ,sc4lined, sc4, sc4, sc4_state, sc4lined_mbus, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4linedd ,sc4lined, sc4, sc4, sc4_state, sc4lined_mbus, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4linede ,sc4lined, sc4, sc4, sc4_state, sc4lined_mbus, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// ok
-GAME( 200?, sc4linedf ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4linedg ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4linedh ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4linedi ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4linedf ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4linedg ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4linedh ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4linedi ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR7067CASINO LINE DANCER LINE SOUNDS LINE DANCER (same as above?)
-GAME( 200?, sc4ldcas ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldcasa ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldcasb ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldcasc ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldcasd ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldcase ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldcas ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldcasa ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldcasb ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldcasc ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldcasd ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldcase ,sc4lined, sc4, sc4, sc4_state, sc4lined, ROT0, "Mazooma","Line Dancer Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4ldvcl_reel_configs[6] =
{
@@ -26328,7 +26328,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ldvcl)
}
// PR2421 LITTLEDEVIL CLUB LITTLEDEVIL CLUB CLILDEV SOUNDS CLUB LITTLEDEVIL
-GAME( 200?, sc4ldvcl ,0, sc4, sc4, sc4_state, sc4ldvcl, ROT0, "Mazooma","Little Devil Club (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldvcl ,0, sc4, sc4, sc4_state, sc4ldvcl, ROT0, "Mazooma","Little Devil Club (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4lockb_reel_configs[6] =
{
@@ -26347,14 +26347,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lockb)
}
// PR1108 LOCKBUSTER PR1108 LOCKBUSTER SOUNDS11
-GAME( 200?, sc4lockb ,0, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lockba ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4lockbb ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4lockbc ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4lockbd ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4lockbe ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4lockbf ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4lockbg ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockb ,0, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockba ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockbb ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockbc ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockbd ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockbe ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockbf ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4lockbg ,sc4lockb, sc4, sc4, sc4_state, sc4lockb, ROT0, "BFM","Lock Buster (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4lkbcl_reel_configs[6] =
{
@@ -26380,19 +26380,19 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lkbcl_mbus)
// PR1321 CLUB LOCKBUSTER PR1321 CLUB LOCKBUSTER SOUNDS11
-GAME( 200?, sc4lkbcl ,0, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lkbclb ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4lkbcle ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4lkbclg ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbcl ,0, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbclb ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbcle ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbclg ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR1321 CLUB LOCKBUSTER CLUB LOCKBUSTER CLUB PR1321 CLUB LOCKBUSTER SOUNDS11
-GAME( 200?, sc4lkbclh ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl_mbus, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (311 Club, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lkbcli ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl_mbus, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (311 Club, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbclh ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl_mbus, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (311 Club, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbcli ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl_mbus, ROT0, "BFM","Lock Buster Club (Bellfruit) (Scorpion 4) (311 Club, set 2)", GAME_NOT_WORKING )
// PR1321 CLUB LOCKBUSTER EURO PR1321 CLUB LOCKBUSTER SOUNDS11
-GAME( 200?, sc4lkbcla ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Euro) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lkbclc ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Euro) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbcla ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Euro) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbclc ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Euro) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1321 CLUB LOCKBUSTER FERRY PR1321 CLUB LOCKBUSTER SOUNDS11
-GAME( 200?, sc4lkbcld ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lkbclf ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbcld ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lkbclf ,sc4lkbcl, sc4, sc4, sc4_state, sc4lkbcl, ROT0, "BFM","Lock Buster Club (Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4lotrf_reel_configs[6] =
@@ -26412,17 +26412,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lotrf)
}
// PR1115 LORD OF THE RINGS PR1115 L O T RINGS SOUNDS11
-GAME( 200?, sc4lotrf ,0, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrfa ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrf ,0, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrfa ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1115 LORD OF THE RINGS ISS 2 PR1115 L O T RINGS SOUNDS11
-GAME( 200?, sc4lotrfb ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrfc ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrfd ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrfe ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrff ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrfg ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrt ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING ) // these were marked LOTR Trilogy and paired with different (wrong, now oprhaned, sound roms)
-GAME( 200?, sc4lotrta ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrfb ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrfc ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrfd ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrfe ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrff ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrfg ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrt ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING ) // these were marked LOTR Trilogy and paired with different (wrong, now oprhaned, sound roms)
+GAME( 200?, sc4lotrta ,sc4lotrf, sc4, sc4, sc4_state, sc4lotrf, ROT0, "BFM","Lord Of The Rings - The Fellowship Of The Ring (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4lotr2_reel_configs[6] =
@@ -26448,21 +26448,21 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lotr2_mbus)
}
// PR1315 TWO TOWERS PR1313 TWO TOWERS SOUNDS11
-GAME( 200?, sc4lotr2 ,0, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2a ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2b ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2c ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2d ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2e ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2j ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2k ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2l ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2m ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2 ,0, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2a ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2b ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2c ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2d ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2e ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2j ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2k ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2l ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2m ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// PR1315 TWO TOWERS PR1313 TWO TOWERS SOUNDS11 TWO TOWERS S.SITE
-GAME( 200?, sc4lotr2f ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2g ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2h ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotr2i ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2f ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2g ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2h ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotr2i ,sc4lotr2, sc4, sc4, sc4_state, sc4lotr2_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
static const stepper_interface* sc4ltr2c_reel_configs[6] =
{
@@ -26488,19 +26488,19 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ltr2c_mbus)
// PR1420 CLUB LOTR TWO TOWERS PR1420 CLUB TWOTOWERS SOUNDS11
-GAME( 200?, sc4ltr2c ,0, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2ca ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2cb ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2cc ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2cd ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2ce ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2cf ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2cg ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2c ,0, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2ca ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2cb ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2cc ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2cd ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2ce ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2cf ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2cg ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR1420 CLUB LOTR TWO TOWERS PR1420 CLUB TWOTOWERS SOUNDS11 CLUB TWO TOWERS
-GAME( 200?, sc4ltr2ch ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2ci ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2cj ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4ltr2ck ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2ch ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2ci ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2cj ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4ltr2ck ,sc4ltr2c, sc4, sc4, sc4_state, sc4ltr2c_mbus, ROT0, "BFM","Lord Of The Rings - The Two Towers Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4luck7tb_reel_configs[6] =
{
@@ -26538,13 +26538,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4luck7)
// PR2085 LUCKY SEVENS LUCKY SOUNDS
-GAME( 200?, sc4luck7 ,0, sc4, sc4, sc4_state, sc4luck7tb, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (Top Box)", GAME_NOT_WORKING )
+GAME( 200?, sc4luck7 ,0, sc4, sc4, sc4_state, sc4luck7tb, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (Top Box)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
-GAME( 200?, sc4luck7a ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4luck7b ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4luck7c ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4luck7a ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4luck7b ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4luck7c ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PR2085 LUCKY SEVENS LUCKY SEVENS ARCADE LUCKY SOUNDS LUCKY SEVENS
-GAME( 200?, sc4luck7d ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4luck7d ,sc4luck7, sc4, sc4, sc4_state, sc4luck7, ROT0, "Mazooma","Lucky 7s (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4luckb_reel_configs[6] =
{
@@ -26569,40 +26569,40 @@ DRIVER_INIT_MEMBER(sc4_state,sc4luckb_mbus)
}
// PR1033 CASINO LUCKY BALLS PR1033 LUCKY BALLS SOUNDS11
-GAME( 200?, sc4luckb ,0, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckba ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbb ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbc ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbd ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbe ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbf ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbg ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbh ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbi ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbj ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbk ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbl ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbm ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbn ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbo ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbp ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbt ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbu ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbv ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbw ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbx ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckb1 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckb2 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckb3 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 25)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckb4 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 26)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckb ,0, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckba ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbb ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbc ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbd ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbe ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbf ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbg ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbh ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbi ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbj ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbk ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbl ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbm ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbn ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbo ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbp ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbt ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbu ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbv ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbw ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbx ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckb1 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckb2 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckb3 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 25)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckb4 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb, ROT0, "BFM","Lucky Balls Casino (Bellfruit) (Scorpion 4) (set 26)", GAME_NOT_WORKING )
// PR1033 CASINO LUCKY BALLS PR1033 LUCKY BALLS SOUNDS11 LUCKY BALLS ARCADE
-GAME( 200?, sc4luckbq ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbr ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbs ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckby ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4luckbz ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // incomplete pairing
-GAME( 200?, sc4luckb0 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbq ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbr ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbs ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckby ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4luckbz ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4luckb0 ,sc4luckb, sc4, sc4, sc4_state, sc4luckb_mbus, ROT0, "BFM","Lucky Balls Casino Arcade (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4magic_reel_configs[6] =
{
@@ -26622,10 +26622,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4magic)
// PR2520 MAGIC POUND ABOUT V1.0 MAGICPOUNDABOUTSND MAGIC POUNDABOUT
-GAME( 200?, sc4magic ,0, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magica ,sc4magic, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4magicb ,sc4magic, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4magicc ,sc4magic, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4magic ,0, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magica ,sc4magic, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magicb ,sc4magic, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4magicc ,sc4magic, sc4, sc4, sc4_state, sc4magic, ROT0, "Qps","Magic Poundabout (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4maxim_reel_configs[6] =
{
@@ -26644,14 +26644,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4maxim)
}
// PR2019 MAXIMUS CASH MAX SOUNDS MAXIMUS CASH
-GAME( 200?, sc4maxim ,0, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4maxima ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4maximb ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4maximc ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4maximd ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4maxime ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4maximf ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4maximg ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4maxim ,0, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4maxima ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4maximb ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4maximc ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4maximd ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4maxime ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4maximf ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4maximg ,sc4maxim, sc4, sc4, sc4_state, sc4maxim, ROT0, "Mazooma","Maximus Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
@@ -26679,21 +26679,21 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mgrm)
}
// PR1132 CASINO MONEY GO ROUND PR1132 MONEY GO ROUND SOUNDS11
-GAME( 200?, sc4mgr ,0, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgra ,sc4mgr, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrh ,sc4mgr, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgri ,sc4mgr, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgr ,0, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgra ,sc4mgr, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrh ,sc4mgr, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgri ,sc4mgr, sc4, sc4, sc4_state, sc4mgr, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR1132 CASINO MONEY GO ROUND PR1132 MONEY GO ROUND SOUNDS11 MONEY GO ROUND S.SITE
-GAME( 200?, sc4mgrb ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrc ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrd ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgre ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrf ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrg ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrj ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrk ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrl ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4mgrm ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrb ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrc ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrd ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgre ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrf ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrg ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrj ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrk ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrl ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4mgrm ,sc4mgr, sc4, sc4, sc4_state, sc4mgrm, ROT0, "BFM","Money Go Round Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
static const stepper_interface* sc4mspid_reel_configs[6] =
{
@@ -26718,21 +26718,21 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mspid_mbus)
}
// PR1325 CASINO MONEY SPIDER PR1325 MONEYSPIDER SOUNDS11
-GAME( 200?, sc4mspid ,0, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspida ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidb ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidc ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidd ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspide ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidf ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidg ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidj ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidk ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidl ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidm ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspid ,0, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspida ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidb ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidc ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidd ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspide ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidf ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidg ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidj ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidk ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidl ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidm ,sc4mspid, sc4, sc4, sc4_state, sc4mspid, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
// PR1325 CASINO MONEY SPIDER MONEY SPIDER ARCADE PR1325 MONEYSPIDER SOUNDS11
-GAME( 200?, sc4mspidh ,sc4mspid, sc4, sc4, sc4_state, sc4mspid_mbus, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4mspidi ,sc4mspid, sc4, sc4, sc4_state, sc4mspid_mbus, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidh ,sc4mspid, sc4, sc4, sc4_state, sc4mspid_mbus, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4mspidi ,sc4mspid, sc4, sc4, sc4_state, sc4mspid_mbus, ROT0, "BFM","Casino Money Spider (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
static const stepper_interface* sc4msclb_reel_configs[6] =
{
@@ -26751,14 +26751,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4msclb)
}
// PR1040 MONEY SPINNER PR1040 MON S CLUB SOUNDS11
-GAME( 200?, sc4msclb ,0, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4msclba ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4msclbb ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4msclbc ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4msclbd ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4msclbe ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4msclbf ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4msclbg ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclb ,0, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclba ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclbb ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclbc ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclbd ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclbe ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclbf ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4msclbg ,sc4msclb, sc4, sc4, sc4_state, sc4msclb, ROT0, "BFM","Money Spinner Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4mtb_reel_configs[6] =
{
@@ -26777,18 +26777,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mtb)
}
// PR6803 MONEY TO BURN PR6803 BURN SOUNDS11
-GAME( 200?, sc4mtb ,0, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtba ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbb ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbe ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbf ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbg ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbj ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtb ,0, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtba ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbb ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbe ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbf ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbg ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbj ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
// PR4603 MONEY TO BURN SP98 PR6803 BURN SOUNDS11
-GAME( 200?, sc4mtbc ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbd ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbh ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbi ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbc ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbd ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbh ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbi ,sc4mtb, sc4, sc4, sc4_state, sc4mtb, ROT0, "BFM","Money To Burn SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4mtbcl_reel_configs[6] =
{
@@ -26808,22 +26808,22 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mtbcl)
// PR6932 CLUB MONEY TO BURN PR6932 BURN SOUNDS11
-GAME( 200?, sc4mtbcl ,0, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbcla ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclb ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclc ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbcld ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbcle ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclf ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclg ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclh ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbcli ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclj ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclk ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbcll ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclm ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbcln ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4mtbclo ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbcl ,0, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbcla ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclb ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclc ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbcld ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbcle ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclf ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclg ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclh ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbcli ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclj ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclk ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbcll ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclm ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbcln ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4mtbclo ,sc4mtbcl, sc4, sc4, sc4_state, sc4mtbcl, ROT0, "BFM","Money To Burn Club (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
static const stepper_interface* sc4monob_reel_configs[6] =
{
@@ -26843,20 +26843,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4monob)
// PR2121 MONOPOLY MPLY SOUNDS MONOPOLY
-GAME( 200?, sc4monob ,0, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4monoba ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobb ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobc ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobd ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobe ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobf ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobg ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobh ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobi ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobj ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobk ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobl ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4monobm ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4monob ,0, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4monoba ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobb ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobc ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobd ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobe ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobf ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobg ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobh ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobi ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobj ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobk ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobl ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4monobm ,sc4monob, sc4, sc4, sc4_state, sc4monob, ROT0, "BFM","Monopoly (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
@@ -26876,8 +26876,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mono5)
m_reel_setup = sc4mono5_reel_configs;
}
-GAME( 200?, sc4mono5 ,0, sc4, sc4, sc4_state, sc4mono5, ROT0, "Mazooma","Monopoly 5 (PR7089, MONF) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR7089 MONO 5 MONO SOUNDS MONOPOLY
-GAME( 200?, sc4mono5a ,sc4mono5, sc4, sc4, sc4_state, sc4mono5, ROT0, "Mazooma","Monopoly 5 (PR7089, MONF) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // PR7089 MONO 5 MONO SOUNDS MONOPOLY
+GAME( 200?, sc4mono5 ,0, sc4, sc4, sc4_state, sc4mono5, ROT0, "Mazooma","Monopoly 5 (PR7089, MONF) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR7089 MONO 5 MONO SOUNDS MONOPOLY
+GAME( 200?, sc4mono5a ,sc4mono5, sc4, sc4, sc4_state, sc4mono5, ROT0, "Mazooma","Monopoly 5 (PR7089, MONF) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // PR7089 MONO 5 MONO SOUNDS MONOPOLY
static const stepper_interface* sc4monoa_reel_configs[6] =
{
@@ -26903,26 +26903,26 @@ DRIVER_INIT_MEMBER(sc4_state,sc4monoa_mbus)
m_reel_setup = sc4monoa_reel_configs;
}
-GAME( 200?, sc4monoa ,0, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR2122 MONOPOLY MONOPOLY TRIPLE ARCADE MONO SOUNDS MONOPOLY
-GAME( 200?, sc4monoaa ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4monoad ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4monoae ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4monoaf ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4monoag ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoa ,0, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR2122 MONOPOLY MONOPOLY TRIPLE ARCADE MONO SOUNDS MONOPOLY
+GAME( 200?, sc4monoaa ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoad ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoae ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoaf ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoag ,sc4monoa, sc4, sc4, sc4_state, sc4monoa_mbus, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // ^^
// PAY UNIT ERR 17
-GAME( 200?, sc4monoab ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4monoac ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4monoah ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4monoai ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4monoaj ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4monoak ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )// ^^
-
-GAME( 200?, sc4monoal ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )// PR2122 MONOPOLY MONOPOLY TRIPLE ARCADE MONOPOLY TRIPLE
-GAME( 200?, sc4monoam ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4monoan ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 15)", GAME_NOT_WORKING )// PR2122 MONOPOLY MONO SOUNDS MONOPOLY
-GAME( 200?, sc4monoao ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 16)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4monoap ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 17)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4monoaq ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 18)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4monoab ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoac ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoah ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4monoai ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4monoaj ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4monoak ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )// ^^
+
+GAME( 200?, sc4monoal ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )// PR2122 MONOPOLY MONOPOLY TRIPLE ARCADE MONOPOLY TRIPLE
+GAME( 200?, sc4monoam ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4monoan ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 15)", GAME_NOT_WORKING )// PR2122 MONOPOLY MONO SOUNDS MONOPOLY
+GAME( 200?, sc4monoao ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 16)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4monoap ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 17)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4monoaq ,sc4monoa, sc4, sc4, sc4_state, sc4monoa, ROT0, "Mazooma","Monopoly Triple (PR2122, MOTR) (Mazooma) (Scorpion 4) (set 18)", GAME_NOT_WORKING )// ^^
static const stepper_interface* sc4monop_reel_configs[6] =
{
@@ -26940,8 +26940,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4monop)
m_reel_setup = sc4monop_reel_configs;
}
-GAME( 200?, sc4monop ,sc4monoa, sc4, sc4, sc4_state, sc4monop, ROT0, "Mazooma","Monopoly Triple (PR2056, TBOX) (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 MONOP TRIPLE MONO SOUNDS MONOP TRIPLE
-GAME( 200?, sc4monopa ,sc4monoa, sc4, sc4, sc4_state, sc4monop, ROT0, "Mazooma","Monopoly Triple (PR2056, TBOX) (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING ) // PR2056 MONOP TRIPLE MONO SOUNDS MONOP TRIPLE
+GAME( 200?, sc4monop ,sc4monoa, sc4, sc4, sc4_state, sc4monop, ROT0, "Mazooma","Monopoly Triple (PR2056, TBOX) (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 MONOP TRIPLE MONO SOUNDS MONOP TRIPLE
+GAME( 200?, sc4monopa ,sc4monoa, sc4, sc4, sc4_state, sc4monop, ROT0, "Mazooma","Monopoly Triple (PR2056, TBOX) (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING ) // PR2056 MONOP TRIPLE MONO SOUNDS MONOP TRIPLE
static const stepper_interface* sc4mondx_reel_configs[6] =
@@ -26965,45 +26965,45 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mondx)
// So which Top Box roms should thse use? Why do some play without one?
// Waits for Top Box
-GAME( 200?, sc4mondxd ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// PR2202 MONOPOLY DELUXE MONOPOLY DELUXE MAZ MONOPOLY TRIPLE
-GAME( 200?, sc4mondxg ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mondxd ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// PR2202 MONOPOLY DELUXE MONOPOLY DELUXE MAZ MONOPOLY TRIPLE
+GAME( 200?, sc4mondxg ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
// Plays without Top Box
-GAME( 200?, sc4mondxe ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )// PR2202 MONOPOLY MONOPOLY TRIPLE MAZ MONOPOLY DELUXE
-GAME( 200?, sc4mondxf ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mondxe ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )// PR2202 MONOPOLY MONOPOLY TRIPLE MAZ MONOPOLY DELUXE
+GAME( 200?, sc4mondxf ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.1) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
// Waits for Top Box
-GAME( 200?, sc4mondx ,0, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// PR2202 MONOPOLY DELUXE MONOPOLY DELUXE MAZ MPDX SOUNDS MONOPOLY
-GAME( 200?, sc4mondxa ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mondx ,0, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )// PR2202 MONOPOLY DELUXE MONOPOLY DELUXE MAZ MPDX SOUNDS MONOPOLY
+GAME( 200?, sc4mondxa ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )// ^^
// Plays without Top Box
-GAME( 200?, sc4mondxb ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mondxc ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mondxb ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mondxc ,sc4mondx, sc4, sc4, sc4_state, sc4mondx, ROT0, "Mazooma","Monopoly Deluxe (PR2202, MPDX 1.0) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
// I think this is different to the above, this is GM** (Grand Monopoly?)
-GAME( 200?, sc4mcas ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 1)", GAME_NOT_WORKING ) // PR2354 MONOPOLY CASINO MONOPOLY TRIPLE MAZ MONO SOUNDS MONOPOLY
-GAME( 200?, sc4mcasm ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcasn ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 3)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcaso ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 4)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcasp ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 5)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcasq ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 6)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcasr ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 7)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcass ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 8)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcast ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 9)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcasv ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 10)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcasw ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 11)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcasx ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 12)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcasy ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 13)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcasz ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 14)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcas0 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 15)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcas1 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 16)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcas2 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 17)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mcas3 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 18)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcas ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 1)", GAME_NOT_WORKING ) // PR2354 MONOPOLY CASINO MONOPOLY TRIPLE MAZ MONO SOUNDS MONOPOLY
+GAME( 200?, sc4mcasm ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcasn ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcaso ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 4)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcasp ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 5)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcasq ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 6)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcasr ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 7)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcass ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 8)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcast ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 9)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcasv ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 10)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcasw ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 11)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcasx ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 12)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcasy ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 13)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcasz ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 14)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcas0 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 15)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcas1 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 16)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcas2 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 17)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mcas3 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2354) (Mazooma) (Scorpion 4) (GMBU, set 18)", GAME_NOT_WORKING )// ^^
// these have a different internal code compared to the PR2056 sets above which strongly indicates they're for the 'GMBU' sets above
-GAME( 200?, sc4mcask ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2056) (Mazooma) (Scorpion 4) (GMTB, Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 MONOP TRIPLE MONO SOUNDS MONOP TRIPLE
-GAME( 200?, sc4mcasu ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2056) (Mazooma) (Scorpion 4) (GMTB, Top Box, set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mcas4 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2056) (Mazooma) (Scorpion 4) (GMTB, Top Box, set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcask ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2056) (Mazooma) (Scorpion 4) (GMTB, Top Box, set 1)", GAME_NOT_WORKING ) // PR2056 MONOP TRIPLE MONO SOUNDS MONOP TRIPLE
+GAME( 200?, sc4mcasu ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2056) (Mazooma) (Scorpion 4) (GMTB, Top Box, set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mcas4 ,sc4mcas, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Casino (PR2056) (Mazooma) (Scorpion 4) (GMTB, Top Box, set 3)", GAME_NOT_WORKING ) // ^^
@@ -27026,16 +27026,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mont)
// PR2510 MONTEGO PAY LOWTECHSND MONTEGO PAY
-GAME( 200?, sc4mont ,0, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4monta ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4montb ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4montc ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4montd ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4monte ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4montf ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4montg ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4month ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4monti ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4mont ,0, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4monta ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4montb ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4montc ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4montd ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4monte ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4montf ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4montg ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4month ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4monti ,sc4mont, sc4, sc4, sc4_state, sc4mont, ROT0, "Qps","Montego Pay (Qps) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4mou_reel_configs[6] =
@@ -27055,9 +27055,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mou)
}
// PR2523 MOVE ON UP V1.0 MOVEONUPSND MOVE ON UP
-GAME( 200?, sc4mou ,0, sc4, sc4, sc4_state, sc4mou, ROT0, "Qps","Move On Up (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4moua ,sc4mou, sc4, sc4, sc4_state, sc4mou, ROT0, "Qps","Move On Up (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4moub ,sc4mou, sc4, sc4, sc4_state, sc4mou, ROT0, "Qps","Move On Up (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mou ,0, sc4, sc4, sc4_state, sc4mou, ROT0, "Qps","Move On Up (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4moua ,sc4mou, sc4, sc4, sc4_state, sc4mou, ROT0, "Qps","Move On Up (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4moub ,sc4mou, sc4, sc4, sc4_state, sc4mou, ROT0, "Qps","Move On Up (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4nmtj_reel_configs[6] =
{
@@ -27076,11 +27076,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4nmtj)
}
// PR2171 NEVER MIND JPS NMTJ SOUNDS NEVER MIND JPS
-GAME( 200?, sc4nmtj ,0, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (011)", GAME_NOT_WORKING )
-GAME( 200?, sc4nmtja ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (014, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4nmtjc ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (014, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4nmtjb ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (044, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4nmtjd ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (044, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmtj ,0, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (011)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmtja ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (014, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmtjc ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (014, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmtjb ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (044, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmtjd ,sc4nmtj, sc4, sc4, sc4_state, sc4nmtj, ROT0, "Mazooma","Never Mind The Jackpots (Mazooma) (Scorpion 4) (044, set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4oyf_reel_configs[6] =
{
@@ -27099,8 +27099,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4oyf)
}
// PR1310 AWP OFF YOUR FACE PR1310 OFF YOUR FACE SOUNDS11
-GAME( 200?, sc4oyf ,0, sc4, sc4, sc4_state, sc4oyf, ROT0, "BFM","Off Your Face (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4oyfa ,sc4oyf, sc4, sc4, sc4_state, sc4oyf, ROT0, "BFM","Off Your Face (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4oyf ,0, sc4, sc4, sc4_state, sc4oyf, ROT0, "BFM","Off Your Face (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4oyfa ,sc4oyf, sc4, sc4, sc4_state, sc4oyf, ROT0, "BFM","Off Your Face (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4opses_reel_configs[6] =
@@ -27120,8 +27120,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4opses)
}
// PR1106 OPEN SESAME PR1106 OPEN SESAME SOUNDS11
-GAME( 200?, sc4opses ,0, sc4, sc4, sc4_state, sc4opses, ROT0, "BFM","Open Sesame (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4opsesa ,sc4opses, sc4, sc4, sc4_state, sc4opses, ROT0, "BFM","Open Sesame (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4opses ,0, sc4, sc4, sc4_state, sc4opses, ROT0, "BFM","Open Sesame (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4opsesa ,sc4opses, sc4, sc4, sc4_state, sc4opses, ROT0, "BFM","Open Sesame (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4pacqp_reel_configs[6] =
@@ -27142,9 +27142,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pacqp)
// PR7072 PAC MAN PACP SOUNDS PAC-MAN
-GAME( 200?, sc4pacqp ,0, sc4, sc4, sc4_state, sc4pacqp, ROT0, "QPS","Pac Man (PR7072, QPAC) (QPS) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacqpa ,sc4pacqp, sc4, sc4, sc4_state, sc4pacqp, ROT0, "QPS","Pac Man (PR7072, QPAC) (QPS) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacqpb ,sc4pacqp, sc4, sc4, sc4_state, sc4pacqp, ROT0, "QPS","Pac Man (PR7072, QPAC) (QPS) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacqp ,0, sc4, sc4, sc4_state, sc4pacqp, ROT0, "QPS","Pac Man (PR7072, QPAC) (QPS) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacqpa ,sc4pacqp, sc4, sc4, sc4_state, sc4pacqp, ROT0, "QPS","Pac Man (PR7072, QPAC) (QPS) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacqpb ,sc4pacqp, sc4, sc4, sc4_state, sc4pacqp, ROT0, "QPS","Pac Man (PR7072, QPAC) (QPS) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4pacmn_reel_configs[6] =
{
@@ -27163,9 +27163,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pacmn)
}
// PR7026 PACMAN PACMAN SOUNDS
-GAME( 200?, sc4pacmn ,0, sc4, sc4, sc4_state, sc4pacmn, ROT0, "Mazooma","Pac Man (PR7026, PMAN) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // this set doesn't start, CPU ends up dead? - needs valid jackpot / stake keys
-GAME( 200?, sc4pacmna ,sc4pacmn, sc4, sc4, sc4_state, sc4pacmn, ROT0, "Mazooma","Pac Man (PR7026, PMAN) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacmnb ,sc4pacmn, sc4, sc4, sc4_state, sc4pacmn, ROT0, "Mazooma","Pac Man (PR7026, PMAN) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacmn ,0, sc4, sc4, sc4_state, sc4pacmn, ROT0, "Mazooma","Pac Man (PR7026, PMAN) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // this set doesn't start, CPU ends up dead? - needs valid jackpot / stake keys
+GAME( 200?, sc4pacmna ,sc4pacmn, sc4, sc4, sc4_state, sc4pacmn, ROT0, "Mazooma","Pac Man (PR7026, PMAN) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacmnb ,sc4pacmn, sc4, sc4, sc4_state, sc4pacmn, ROT0, "Mazooma","Pac Man (PR7026, PMAN) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4paccs_reel_configs[6] =
{
@@ -27190,19 +27190,19 @@ DRIVER_INIT_MEMBER(sc4_state,sc4paccs_mbus)
}
// PR7049CASINO PACMAN PACMAN SOUNDS
-GAME( 200?, sc4paccs ,0, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsa ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsb ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsc ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsd ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccse ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsf ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsg ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsj ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsk ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsl ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsh ,sc4paccs, sc4, sc4, sc4_state, sc4paccs_mbus, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccsi ,sc4paccs, sc4, sc4, sc4_state, sc4paccs_mbus, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccs ,0, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsa ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsb ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsc ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsd ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccse ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsf ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsg ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsj ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsk ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsl ,sc4paccs, sc4, sc4, sc4_state, sc4paccs, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsh ,sc4paccs, sc4, sc4, sc4_state, sc4paccs_mbus, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccsi ,sc4paccs, sc4, sc4, sc4_state, sc4paccs_mbus, ROT0, "Mazooma","Pac Man Casino (PR7049, PACL) (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
static const stepper_interface* sc4paccl_reel_configs[6] =
{
@@ -27221,10 +27221,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4paccl)
}
// PR2018 PACMAN CLUB CLUB PACMAN SOUNDS PACMAN C L U B
-GAME( 200?, sc4paccl ,0, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4paccla ,sc4paccl, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacclb ,sc4paccl, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacclc ,sc4paccl, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccl ,0, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4paccla ,sc4paccl, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacclb ,sc4paccl, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacclc ,sc4paccl, sc4, sc4, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4pacpl_reel_configs[6] =
{
@@ -27243,15 +27243,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pacpl)
}
// PR7058 PACMAN PACP SOUNDS PACMAN PLUS
-GAME( 200?, sc4pacpl ,0, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacpla ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacplb ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacplc ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacpld ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacple ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacplf ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacplg ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4pacplh ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacpl ,0, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacpla ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacplb ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacplc ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacpld ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacple ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacplf ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacplg ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4pacplh ,sc4pacpl, sc4, sc4, sc4_state, sc4pacpl, ROT0, "Mazooma","Pac Man Plus (PR7058, PACP) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
static const stepper_interface* sc4pmani_reel_configs[6] =
@@ -27272,8 +27272,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pmani)
// REEL 4 ERR 24
// PR2031 PACMANIA ANIA SOUNDS PACMANIA
-GAME( 200?, sc4pmani ,0, sc4, sc4, sc4_state, sc4pmani, ROT0, "Mazooma","Pac Mania (PR2031, ANIA) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pmania ,sc4pmani, sc4, sc4, sc4_state, sc4pmani, ROT0, "Mazooma","Pac Mania (PR2031, ANIA) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pmani ,0, sc4, sc4, sc4_state, sc4pmani, ROT0, "Mazooma","Pac Mania (PR2031, ANIA) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pmania ,sc4pmani, sc4, sc4, sc4_state, sc4pmani, ROT0, "Mazooma","Pac Mania (PR2031, ANIA) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4party_reel_configs[6] =
{
@@ -27292,7 +27292,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4party)
}
// PR7151 PARTY TIME 1.02 95008113 G PARTYTIME SOUNDS11
-GAME( 200?, sc4party ,0, sc4, sc4, sc4_state, sc4party, ROT0, "Nova","Party Time (German) (PR7151, GPTM) (Nova) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4party ,0, sc4, sc4, sc4_state, sc4party, ROT0, "Nova","Party Time (German) (PR7151, GPTM) (Nova) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4pgold_reel_configs[6] =
@@ -27312,12 +27312,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pgold)
}
// PR1012 PHARAOH'S GOLD PR1012 PHARAOHS GOLD SOUNDS11
-GAME( 200?, sc4pgold ,0, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pgolda ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pgoldb ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pgoldc ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4pgoldd ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4pgoldf ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4pgold ,0, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pgolda ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pgoldb ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pgoldc ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pgoldd ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4pgoldf ,sc4pgold, sc4, sc4, sc4_state, sc4pgold, ROT0, "BFM","Pharaoh's Gold (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
@@ -27338,11 +27338,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ppclb)
}
// PR2236 CLUB PINK PANTHER 411 CLUBPINKPANTHERSND CLUB PINKPANTHER
-GAME( 200?, sc4ppclb ,0, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // also in a set marked 'Pink Pannther Think Pink'
-GAME( 200?, sc4ppclbb ,sc4ppclb, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppclb ,0, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // also in a set marked 'Pink Pannther Think Pink'
+GAME( 200?, sc4ppclbb ,sc4ppclb, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2236 CLUB PINK PANTHER 412 CLUBPINKPANTHERSND CLUB PINKPANTHER
-GAME( 200?, sc4ppclba ,sc4ppclb, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (412) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppclbc ,sc4ppclb, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (412) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppclba ,sc4ppclb, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (412) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppclbc ,sc4ppclb, sc4, sc4, sc4_state, sc4ppclb, ROT0, "Qps","Pink Panther Club (412) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4pipe_reel_configs[6] =
{
@@ -27362,8 +27362,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pipe)
// PR2110 PIPING HOT PIPE SOUNDS PIPING HOT
-GAME( 200?, sc4pipe ,0, sc4, sc4, sc4_state, sc4pipe, ROT0, "Mazooma","Piping Hot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pipea ,sc4pipe, sc4, sc4, sc4_state, sc4pipe, ROT0, "Mazooma","Piping Hot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pipe ,0, sc4, sc4, sc4_state, sc4pipe, ROT0, "Mazooma","Piping Hot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pipea ,sc4pipe, sc4, sc4, sc4_state, sc4pipe, ROT0, "Mazooma","Piping Hot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4plumb_reel_configs[6] =
{
@@ -27383,14 +27383,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4plumb)
// QPS142 CLUB PLUMB CRAZY 413 CLUBPLUMBCRAZYSND CLUB PLUMB CRAZY
-GAME( 200?, sc4plumb ,0, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (413) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4plumba ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (413) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4plumb ,0, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (413) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4plumba ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (413) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// QPS142 CLUB PLUMB CRAZY 411 CLUBPLUMBCRAZYSND CLUB PLUMB CRAZY
-GAME( 200?, sc4plumbb ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4plumbc ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4plumbb ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4plumbc ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// QPS142 CLUB PLUMB CRAZY 412 CLUBPLUMBCRAZYSND CLUB PLUMB CRAZY
-GAME( 200?, sc4plumbd ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (412) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4plumbe ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (412) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4plumbd ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (412) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4plumbe ,sc4plumb, sc4, sc4, sc4_state, sc4plumb, ROT0, "Qps","Plumb Crazy Club (412) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4polem_reel_configs[6] =
@@ -27413,11 +27413,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4polem)
// these are sensitive to the inputs, eg for sc4polemd 3:2 and 3:3 MUST be on or the CPU will crash again even if you reset after the initial MEMORY RESET
// I don't know how to boot the other sets, they also show different codes for each set (buggy startup code?)
// PR7009 POLE POSITION POLE POSITION SOUNDS
-GAME( 200?, sc4polem ,0, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4polema ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4polemb ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4polemc ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4polemd ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4polem ,0, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4polema ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4polemb ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4polemc ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4polemd ,sc4polem, sc4, sc4, sc4_state, sc4polem, ROT0, "Mazooma","Pole Position (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4polic_reel_configs[6] =
@@ -27438,11 +27438,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4polic)
// PR2514 POLICE SQUID V1.0 POLICESQUIDSND POLICE SQUID
-GAME( 200?, sc4polic ,0, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4policb ,sc4polic, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4polic ,0, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4policb ,sc4polic, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2514 POLICE SQUID V2.0 POLICESQUIDSND POLICE SQUID
-GAME( 200?, sc4polica ,sc4polic, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4policc ,sc4polic, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4polica ,sc4polic, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4policc ,sc4polic, sc4, sc4, sc4_state, sc4polic, ROT0, "Qps","Police Squid (V2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4potsh_reel_configs[6] =
@@ -27463,8 +27463,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4potsh)
// QPS143 POT SHOT V1.0 POTSHOTSND POT SHOT
-GAME( 200?, sc4potsh ,0, sc4, sc4, sc4_state, sc4potsh, ROT0, "Qps","Pot Shot (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4potsha ,sc4potsh, sc4, sc4, sc4_state, sc4potsh, ROT0, "Qps","Pot Shot (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4potsh ,0, sc4, sc4, sc4_state, sc4potsh, ROT0, "Qps","Pot Shot (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4potsha ,sc4potsh, sc4, sc4, sc4_state, sc4potsh, ROT0, "Qps","Pot Shot (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4pogbl_reel_configs[6] =
@@ -27484,12 +27484,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pogbl)
}
// PR3083 CLUB POTS OF GOLD POTS OF GOLD CLUB PR3082 C POTS OF GOLD SOUNDS11 POTS OF GOLD
-GAME( 200?, sc4pogbl ,0, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pogbla ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pogblb ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pogblc ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4pogbld ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4pogble ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4pogbl ,0, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pogbla ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pogblb ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pogblc ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pogbld ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4pogble ,sc4pogbl, sc4, sc4, sc4_state, sc4pogbl, ROT0, "BFM","Pots Of Gold Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4pwrsg_reel_configs[6] =
{
@@ -27509,10 +27509,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pwrsg)
// PR2053 POWERSURGE SURGESND POWERSURGE
-GAME( 200?, sc4pwrsg ,0, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pwrsga ,sc4pwrsg, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pwrsgb ,sc4pwrsg, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pwrsgc ,sc4pwrsg, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrsg ,0, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrsga ,sc4pwrsg, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrsgb ,sc4pwrsg, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrsgc ,sc4pwrsg, sc4, sc4, sc4_state, sc4pwrsg, ROT0, "Qps","Power Surge (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4pir_reel_configs[6] =
{
@@ -27532,14 +27532,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pir)
// PR1303 THE PRIZE IS RIGHT PR1303 T PRIZE I R SOUNDS11
-GAME( 200?, sc4pir ,0, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pira ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pirb ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pirc ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4pird ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4pire ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4pirf ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4pirg ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4pir ,0, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pira ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pirb ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pirc ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pird ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4pire ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4pirf ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4pirg ,sc4pir, sc4, sc4, sc4_state, sc4pir, ROT0, "BFM","The Prize Is Right (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4pen1_reel_configs[6] =
@@ -27561,11 +27561,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pen1)
// PR6914 PUBLIC ENEMY PR6914 PUBLIC ENEMY SOUNDS11 PUBLIC ENEMY
-GAME( 200?, sc4pen1 ,0, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pen1a ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pen1b ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pen1c ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4pen1d ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4pen1 ,0, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pen1a ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pen1b ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pen1c ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pen1d ,sc4pen1, sc4, sc4, sc4_state, sc4pen1, ROT0, "BFM","Public Enemy No1 (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4qmodo_reel_configs[6] =
{
@@ -27584,11 +27584,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4qmodo)
}
// QUAZZI MO' DOUGH..........QUAZZSND....... (no standard header)
-GAME( 200?, sc4qmodo , 0, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4qmodoa ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4qmodob ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4qmodoc ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4qmodod ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4qmodo , 0, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4qmodoa ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4qmodob ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4qmodoc ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4qmodod ,sc4qmodo, sc4, sc4, sc4_state, sc4qmodo, ROT0, "Qps","Quazzi Mo' Dough (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4quidr_reel_configs[6] =
{
@@ -27607,10 +27607,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4quidr)
}
-GAME( 200?, sc4quidr ,0, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4quidra ,sc4quidr, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4quidrb ,sc4quidr, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4quidrc ,sc4quidr, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidr ,0, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidra ,sc4quidr, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidrb ,sc4quidr, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidrc ,sc4quidr, sc4, sc4, sc4_state, sc4quidr, ROT0, "Qps","Quid Rock (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4rdrag_reel_configs[6] =
{
@@ -27630,11 +27630,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rdrag)
// PR2542 RED DRAGON 011 REDDRAGONSND RED DRAGON
-GAME( 200?, sc4rdrag ,0, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rdraga ,sc4rdrag, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rdrag ,0, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rdraga ,sc4rdrag, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2542 RED DRAGON 021 REDDRAGONSND RED DRAGON
-GAME( 200?, sc4rdragc ,sc4rdrag, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (021) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rdragf ,sc4rdrag, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (021) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rdragc ,sc4rdrag, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (021) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rdragf ,sc4rdrag, sc4, sc4, sc4_state, sc4rdrag, ROT0, "Qps","Red Dragon (021) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4rdrcl_reel_configs[6] =
@@ -27654,10 +27654,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rdrcl)
}
// QPS160 CLUB RED DRAGON 411 CLUBREDDRAGONSND CLUB RED DRAGON
-GAME( 200?, sc4rdrcl ,0, sc4, sc4, sc4_state, sc4rdrcl, ROT0, "Qps","Red Dragon Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rdrclb ,sc4rdrcl, sc4, sc4, sc4_state, sc4rdrcl, ROT0, "Qps","Red Dragon Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rdrcl ,0, sc4, sc4, sc4_state, sc4rdrcl, ROT0, "Qps","Red Dragon Club (411) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rdrclb ,sc4rdrcl, sc4, sc4, sc4_state, sc4rdrcl, ROT0, "Qps","Red Dragon Club (411) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// QPS160 CLUB RED DRAGON 412 CLUBREDDRAGONSND CLUB RED DRAGON
-GAME( 200?, sc4rdrcla ,sc4rdrcl, sc4, sc4, sc4_state, sc4rdrcl, ROT0, "Qps","Red Dragon Club (412) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rdrcla ,sc4rdrcl, sc4, sc4, sc4_state, sc4rdrcl, ROT0, "Qps","Red Dragon Club (412) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4relcz_reel_configs[6] =
@@ -27678,10 +27678,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4relcz)
// PR1015 REELY CRAZY PR1015 REELY CRAZY SOUNDS11
-GAME( 200?, sc4relcz ,0, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4relcza ,sc4relcz, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4relczb ,sc4relcz, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4relczc ,sc4relcz, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4relcz ,0, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4relcza ,sc4relcz, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4relczb ,sc4relcz, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4relczc ,sc4relcz, sc4, sc4, sc4_state, sc4relcz, ROT0, "BFM","Reely Crazy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4rotc_reel_configs[6] =
@@ -27702,11 +27702,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rotc)
// PR2132 RETURN OF THE COUNT ROTC SOUNDS THE COUNT
-GAME( 200?, sc4rotc ,0, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rotca ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rotcb ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rotcc ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4rotcd ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4rotc ,0, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rotca ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rotcb ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rotcc ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rotcd ,sc4rotc, sc4, sc4, sc4_state, sc4rotc, ROT0, "Mazooma","Return Of The Count (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4rich_reel_configs[6] =
{
@@ -27725,19 +27725,19 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rich)
}
// PR7118 RICH GEEZER PR7118 RICH GEEZER SOUNDS11
-GAME( 200?, sc4rich ,0, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4richa ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4richb ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4richc ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4richd ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4riche ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4richf ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4richg ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4richh ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4richi ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4richj ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4richk ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4richl ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4rich ,0, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4richa ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4richb ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4richc ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4richd ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4riche ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4richf ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4richg ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4richh ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4richi ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4richj ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4richk ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4richl ,sc4rich, sc4, sc4, sc4_state, sc4rich, ROT0, "BFM","Rich Geezer (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
static const stepper_interface* sc4rttt_reel_configs[6] =
@@ -27764,12 +27764,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rttt_mbus)
// PR2089 RISE TO THE TOP RISE SOUNDS RISE TO THE TOP
-GAME( 200?, sc4rttt ,0, sc4, sc4, sc4_state, sc4rttt, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rttta ,sc4rttt, sc4, sc4, sc4_state, sc4rttt, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rtttb ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rtttc ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4rtttd ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4rttte ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4rttt ,0, sc4, sc4, sc4_state, sc4rttt, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rttta ,sc4rttt, sc4, sc4, sc4_state, sc4rttt, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rtttb ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rtttc ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rtttd ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4rttte ,sc4rttt, sc4, sc4, sc4_state, sc4rttt_mbus, ROT0, "Mazooma","Rise To The Top (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4roksc_reel_configs[6] =
{
@@ -27788,11 +27788,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4roksc)
}
// PR2527 ROCKET SCIENCE V1.1 ROCKETSCIENCESND ROCKET SCIENCE
-GAME( 200?, sc4roksc ,0, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rokscb ,sc4roksc, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4roksc ,0, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rokscb ,sc4roksc, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2527 ROCKET SCIENCE 011 ROCKETSCIENCESND ROCKET SCIENCE
-GAME( 200?, sc4roksca ,sc4roksc, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rokscc ,sc4roksc, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4roksca ,sc4roksc, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rokscc ,sc4roksc, sc4, sc4, sc4_state, sc4roksc, ROT0, "Qps","Rocket Science (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4blast_reel_configs[6] =
{
@@ -27812,14 +27812,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4blast)
// only starts 2nd time (requires valid ram?)
// PR2539 BLAST OFF011 ROCKETSCIENCESND BLAST OFF
-GAME( 200?, sc4blast ,0, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4blastb ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4blast ,0, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4blastb ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2539 BLAST OFF041 ROCKETSCIENCESND BLAST OFF
-GAME( 200?, sc4blasta ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4blastc ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4blasta ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4blastc ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2539 BLAST OFF 042 ROCKETSCIENCESND BLAST OFF
-GAME( 200?, sc4blastd ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4blaste ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4blastd ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4blaste ,sc4blast, sc4, sc4, sc4_state, sc4blast, ROT0, "Qps","Blast Off (042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
@@ -27841,17 +27841,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rogds)
// PR2060 ROGAN DOSH ROGANSND ROGAN DOSH
-GAME( 200?, sc4rogds ,0, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rogdsa ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rogdsb ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rogdsc ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogds ,0, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogdsa ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogdsb ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogdsc ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2060 ROGAN DOSH V1.6 ROGANSND ROGAN DOSH
-GAME( 200?, sc4rogdse ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v1.6) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogdse ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v1.6) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// PR2060 ROGAN DOSH V2.0 ROGANSND ROGAN DOSH
-GAME( 200?, sc4rogdsd ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rogdsf ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogdsd ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v2.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogdsf ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v2.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2060 ROGAN DOSH V2.1 ROGANSND ROGAN DOSH
-GAME( 200?, sc4rogdsg ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v2.1) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rogdsg ,sc4rogds, sc4, sc4, sc4_state, sc4rogds, ROT0, "Qps","Rogan Dosh (v2.1) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4rt_reel_configs[6] =
@@ -27872,11 +27872,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rt)
// PR2034 ROLLING THUNDER ROL SOUNDS ROLLING THUNDER
-GAME( 200?, sc4rt ,0, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rta ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rtb ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rtc ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4rtd ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4rt ,0, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rta ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rtb ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rtc ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rtd ,sc4rt, sc4, sc4, sc4_state, sc4rt, ROT0, "Mazooma","Rolling Thunder (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4broll_reel_configs[6] =
{
@@ -27897,10 +27897,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4broll)
// missing sound roms, doesn't play, same game code and sound ident as Rolling Thunder?
// PR2034 BANK ROLL ROL SOUNDS BANK ROLL
-GAME( 200?, sc4broll ,0, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4brolla ,sc4broll, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4brollb ,sc4broll, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4brollc ,sc4broll, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4broll ,0, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4brolla ,sc4broll, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4brollb ,sc4broll, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4brollc ,sc4broll, sc4, sc4, sc4_state, sc4broll, ROT0, "Mazooma","Bank Roll (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
@@ -27923,10 +27923,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rbank)
// PR1111 ROYAL BANKER PR1111 ROYLEBANKER SOUNDS11
-GAME( 200?, sc4rbank ,0, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rbanka ,sc4rbank, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rbankb ,sc4rbank, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rbankc ,sc4rbank, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rbank ,0, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rbanka ,sc4rbank, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rbankb ,sc4rbank, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rbankc ,sc4rbank, sc4, sc4, sc4_state, sc4rbank, ROT0, "BFM","Royle Banker (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4royle_reel_configs[6] =
@@ -27946,21 +27946,21 @@ DRIVER_INIT_MEMBER(sc4_state,sc4royle)
}
// PR1102 ROYLEFAMILY PR1102 ROYLEFAMILY SOUNDS11
-GAME( 200?, sc4royle ,0, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylea ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4royleb ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylec ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4royled ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylee ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4royleh ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylei ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4royle ,0, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylea ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4royleb ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylec ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4royled ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylee ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4royleh ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylei ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR1102 ROYLEFAMILY REV2 PR1102 ROYLEFAMILY SOUNDS11
-GAME( 200?, sc4roylef ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4royleg ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylej ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylek ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylel ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4roylem ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylef ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4royleg ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylej ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylek ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylel ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4roylem ,sc4royle, sc4, sc4, sc4_state, sc4royle, ROT0, "BFM","Royle Family (REV 2) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4srrmz_reel_configs[6] =
@@ -27986,29 +27986,29 @@ DRIVER_INIT_MEMBER(sc4_state,sc4srrmz_mbus)
}
// PR7141 SHAKE RATTLE ROLL LINE SOUNDS * SHAKE RATT ROLL
-GAME( 200?, sc4srrmz ,0, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll (Mazooma) (Scorpion 4) (Top Box)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmz ,0, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll (Mazooma) (Scorpion 4) (Top Box)", GAME_NOT_WORKING )
// PR7079CASINO SHAKE RATTLE AND ROL PR7079,Casino SHAKE RATTLE AND ROLL, LINE SOUNDS ROCK AND ROLL
-GAME( 200?, sc4srrmza ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzb ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzc ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmze ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmza ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzb ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzc ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmze ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR7079CASINO SHAKE RATTLE AND ROL PR7079,Casino SHAKE RATTLE AND ROLL, LINE SOUNDS ROCK AND ROLL (the same as some of the above.. )
-GAME( 200?, sc4srrca ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrcaa ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrcab ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrcac ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrcad ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrcae ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrca ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrcaa ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrcab ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrcac ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrcad ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrcae ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz, ROT0, "Mazooma","Shake Rattle Roll Casino (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// PR7079CASINO SHAKE RATTLE AND ROL SHAK RATTLE ROLL ARCADE PR7079,Casino SHAKE RATTLE AND ROLL, LINE SOUNDS
-GAME( 200?, sc4srrmzd ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzf ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzg ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzh ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzi ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzj ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzk ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzl ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrmzm ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzd ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzf ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzg ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzh ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzi ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzj ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzk ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzl ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrmzm ,sc4srrmz, sc4, sc4, sc4_state, sc4srrmz_mbus, ROT0, "Mazooma","Shake Rattle Roll Arcade (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
static const stepper_interface* sc4sidsp_reel_configs[6] =
@@ -28029,10 +28029,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sidsp)
// PR2117 SIDE SPLITTER SSPT SOUNDS SIDE SPLITTER
-GAME( 200?, sc4sidsp ,0, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4sidspa ,sc4sidsp, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4sidspb ,sc4sidsp, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4sidspc ,sc4sidsp, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4sidsp ,0, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4sidspa ,sc4sidsp, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sidspb ,sc4sidsp, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4sidspc ,sc4sidsp, sc4, sc4, sc4_state, sc4sidsp, ROT0, "Mazooma","Side Splitter (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4sirpz_reel_configs[6] =
{
@@ -28052,10 +28052,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sirpz)
// PR2004CASINO SIR PRIZE LINE SOUNDS SIR PRIZE 8 +
-GAME( 200?, sc4sirpz ,0, sc4, sc4, sc4_state, sc4sirpz, ROT0, "Mazooma","Sir Prize (PR2004, SIRV) (Mazooma) (Scorpion 4)", GAME_NOT_WORKING ) // 7:0 and 7:1 must be turned ON to boot this
+GAME( 200?, sc4sirpz ,0, sc4, sc4, sc4_state, sc4sirpz, ROT0, "Mazooma","Sir Prize (PR2004, SIRV) (Mazooma) (Scorpion 4)", GAME_NOT_WORKING ) // 7:0 and 7:1 must be turned ON to boot this
// PR7079CASINO SIR PRIZE PR7079,Casino SIR PRIZE, LINE SOUNDS SIR PRIZE
-GAME( 200?, sc4sirpza ,sc4sirpz, sc4, sc4, sc4_state, sc4sirpz, ROT0, "Mazooma","Sir Prize (PR7079, SIRP) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4sirpzb ,sc4sirpz, sc4, sc4, sc4_state, sc4sirpz, ROT0, "Mazooma","Sir Prize (PR7079, SIRP) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sirpza ,sc4sirpz, sc4, sc4, sc4_state, sc4sirpz, ROT0, "Mazooma","Sir Prize (PR7079, SIRP) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4sirpzb ,sc4sirpz, sc4, sc4, sc4_state, sc4sirpz, ROT0, "Mazooma","Sir Prize (PR7079, SIRP) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4smk7_reel_configs[6] =
{
@@ -28075,7 +28075,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4smk7)
// PR6924 SMOKIN SEVENS PR6924 SMOKIN SEVENS SOUNDS11
-GAME( 200?, sc4smk7 ,0, sc4, sc4, sc4_state, sc4smk7, ROT0, "BFM","Smoking 7's (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4smk7 ,0, sc4, sc4, sc4_state, sc4smk7, ROT0, "BFM","Smoking 7's (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4srr_reel_configs[6] =
{
@@ -28095,10 +28095,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4srr)
// PR1105 SNAKE RATTLE 'N' ROLL PR1105 SNAKERR SOUNDS11
-GAME( 200?, sc4srr ,0, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4srra ,sc4srr, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrb ,sc4srr, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4srrc ,sc4srr, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4srr ,0, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4srra ,sc4srr, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrb ,sc4srr, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4srrc ,sc4srr, sc4, sc4, sc4_state, sc4srr, ROT0, "BFM","Snake Rattle 'n' Roll (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4slc_reel_configs[6] =
{
@@ -28123,22 +28123,22 @@ DRIVER_INIT_MEMBER(sc4_state,sc4slc_mbus)
}
// PR1423 CLUB SNAKES N LADDERS PR1423 CSNK SOUNDS11 SNAKES N LADDERS
-GAME( 2003, sc4slc ,0, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcb ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcc ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 2003, sc4slce ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 2003, sc4slci ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcm ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcn ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 2003, sc4slc ,0, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcb ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcc ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 2003, sc4slce ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 2003, sc4slci ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcm ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcn ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
// PR1423 CLUB SNAKES N LADDERS SNAKES N LADDERS CLUB PR1423 CSNK SOUNDS11 SNAKES N LADDERS
-GAME( 2003, sc4slca ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcd ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcf ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcg ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcj ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 2003, sc4slck ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 2003, sc4slcl ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 2003, sc4slch ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 2003, sc4slca ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcd ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcf ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcg ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcj ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 2003, sc4slck ,sc4slc, sc4, sc4, sc4_state, sc4slc_mbus, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 2003, sc4slcl ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 2003, sc4slch ,sc4slc, sc4, sc4, sc4_state, sc4slc, ROT0, "BFM","Snakes & Ladders Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4solgl_reel_configs[6] =
@@ -28158,10 +28158,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4solgl)
}
// PR1010 SOLID GOLD PR1010 SOLID GOLD SOUNDS11
-GAME( 200?, sc4solgl ,0, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4solgla ,sc4solgl, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4solglb ,sc4solgl, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4solglc ,sc4solgl, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4solgl ,0, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4solgla ,sc4solgl, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4solglb ,sc4solgl, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4solglc ,sc4solgl, sc4, sc4, sc4_state, sc4solgl, ROT0, "BFM","Solid Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4sace_reel_configs[6] =
{
@@ -28181,8 +28181,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sace)
// PR2509 SPACE ACE V2.2 SPACESND SPACE ACE
-GAME( 200?, sc4sace ,0, sc4, sc4, sc4_state, sc4sace, ROT0, "Qps","Space Ace (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4sacea ,sc4sace, sc4, sc4, sc4_state, sc4sace, ROT0, "Qps","Space Ace (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sace ,0, sc4, sc4, sc4_state, sc4sace, ROT0, "Qps","Space Ace (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4sacea ,sc4sace, sc4, sc4, sc4_state, sc4sace, ROT0, "Qps","Space Ace (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4sbust_reel_configs[6] =
@@ -28203,8 +28203,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sbust)
// PR2506 SPACEBUSTER BUSTERSND SPACEBUSTER
-GAME( 200?, sc4sbust ,0, sc4, sc4, sc4_state, sc4sbust, ROT0, "Qps","Space Buster (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4sbusta ,sc4sbust, sc4, sc4, sc4_state, sc4sbust, ROT0, "Qps","Space Buster (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sbust ,0, sc4, sc4, sc4_state, sc4sbust, ROT0, "Qps","Space Buster (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4sbusta ,sc4sbust, sc4, sc4, sc4_state, sc4sbust, ROT0, "Qps","Space Buster (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4starp_reel_configs[6] =
@@ -28225,18 +28225,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4starp)
// PR6805 STARPRIZE PR6805 STARPRIZE SOUNDS
-GAME( 200?, sc4starp ,0, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpa ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpb ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpc ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpd ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpe ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpf ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpg ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4starph ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpi ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpj ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4starpk ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4starp ,0, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpa ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpb ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpc ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpd ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpe ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpf ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpg ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4starph ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpi ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpj ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4starpk ,sc4starp, sc4, sc4, sc4_state, sc4starp, ROT0, "BFM","Starprize (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4stirc_reel_configs[6] =
@@ -28256,17 +28256,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4stirc)
}
// PR2005 STIR CRAZY STIR SOUNDS STIR CRAZY
-GAME( 200?, sc4stirc ,0, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4stirca ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4stircb ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4stircc ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4stircd ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4stirce ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4stircf ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4stircg ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4stirch ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4stirci ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4stircj ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4stirc ,0, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4stirca ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4stircb ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4stircc ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4stircd ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4stirce ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4stircf ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4stircg ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4stirch ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4stirci ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4stircj ,sc4stirc, sc4, sc4, sc4_state, sc4stirc, ROT0, "Mazooma","Stir Crazy (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
static const stepper_interface* sc4strk_reel_configs[6] =
@@ -28286,18 +28286,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4strk)
}
// PR2167CASINO THE STREAK PR7017,CASINO STREAK, STRK SOUNDS THE STREAK
-GAME( 200?, sc4strk ,0, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4strka ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkb ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkc ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkd ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4strke ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkf ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkg ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkh ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4strki ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkj ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4strkk ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4strk ,0, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4strka ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkb ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkc ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkd ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4strke ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkf ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkg ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkh ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4strki ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkj ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4strkk ,sc4strk, sc4, sc4, sc4_state, sc4strk, ROT0, "Mazooma","The Streak (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4tristtb_reel_configs[6] =
{
@@ -28333,33 +28333,33 @@ DRIVER_INIT_MEMBER(sc4_state,sc4trist)
}
// PR2188 TRIPLE STREAK STR3 SOUNDS " THE STREAK
-GAME( 200?, sc4trist ,0, sc4, sc4, sc4_state, sc4tristtb, ROT0, "Mazooma","Triple Streak (PR2188) (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4trista ,sc4trist, sc4, sc4, sc4_state, sc4tristtb, ROT0, "Mazooma","Triple Streak (PR2188) (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4trist ,0, sc4, sc4, sc4_state, sc4tristtb, ROT0, "Mazooma","Triple Streak (PR2188) (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4trista ,sc4trist, sc4, sc4, sc4_state, sc4tristtb, ROT0, "Mazooma","Triple Streak (PR2188) (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )
// PR2167CASINO THE STREAK PR7017,CASINO STREAK, STR3 SOUNDS THE STREAK
-GAME( 200?, sc4tristb ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristc ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristd ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4triste ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristf ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristg ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristh ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristi ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristj ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristk ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristl ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristm ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristn ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristo ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristp ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristq ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristr ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4trists ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristt ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristu ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristv ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristw ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristx ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
-GAME( 200?, sc4tristy ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristb ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristc ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristd ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4triste ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristf ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristg ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristh ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristi ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristj ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristk ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristl ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristm ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristn ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristo ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristp ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristq ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristr ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4trists ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristt ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristu ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristv ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristw ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristx ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
+GAME( 200?, sc4tristy ,sc4trist, sc4, sc4, sc4_state, sc4trist, ROT0, "Mazooma","Triple Streak (PR2167) (Mazooma) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
static const stepper_interface* sc4sahed_reel_configs[6] =
@@ -28379,9 +28379,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sahed)
}
// PRxxxx STREAKS AHEAD V1.0 STREAKSSND STREAKS AHEAD
-GAME( 200?, sc4sahed ,0, sc4, sc4, sc4_state, sc4sahed, ROT0, "Qps","Streaks Ahead (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4saheda ,sc4sahed, sc4, sc4, sc4_state, sc4sahed, ROT0, "Qps","Streaks Ahead (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4sahedb ,sc4sahed, sc4, sc4, sc4_state, sc4sahed, ROT0, "Qps","Streaks Ahead (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4sahed ,0, sc4, sc4, sc4_state, sc4sahed, ROT0, "Qps","Streaks Ahead (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4saheda ,sc4sahed, sc4, sc4, sc4_state, sc4sahed, ROT0, "Qps","Streaks Ahead (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sahedb ,sc4sahed, sc4, sc4, sc4_state, sc4sahed, ROT0, "Qps","Streaks Ahead (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4strx_reel_configs[6] =
{
@@ -28401,10 +28401,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4strx)
// PR1114 STRIKE X PR1114 STRIKX SOUNDS11
-GAME( 200?, sc4strx ,0, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4strxa ,sc4strx, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4strxb ,sc4strx, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4strxc ,sc4strx, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4strx ,0, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4strxa ,sc4strx, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4strxb ,sc4strx, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4strxc ,sc4strx, sc4, sc4, sc4_state, sc4strx, ROT0, "BFM","Strike X (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
@@ -28431,10 +28431,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4suscl_mbus)
}
// PR2357 CLUB SUITS U SIR SUITS U SIR CLUB CLUB SUIT SOUNDS
-GAME( 200?, sc4suscl ,0, sc4, sc4, sc4_state, sc4suscl, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4susclb ,sc4suscl, sc4, sc4, sc4_state, sc4suscl, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4susclc ,sc4suscl, sc4, sc4, sc4_state, sc4suscl_mbus, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4suscla ,sc4suscl, sc4, sc4, sc4_state, sc4suscl_mbus, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4suscl ,0, sc4, sc4, sc4_state, sc4suscl, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4susclb ,sc4suscl, sc4, sc4, sc4_state, sc4suscl, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4susclc ,sc4suscl, sc4, sc4, sc4_state, sc4suscl_mbus, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4suscla ,sc4suscl, sc4, sc4, sc4_state, sc4suscl_mbus, ROT0, "Qps","Suits U Sir Club (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4s6c_reel_configs[6] =
@@ -28454,13 +28454,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4s6c)
}
// PR6834 SUPER 6 FIXED 65% PR6834 SSIX SOUNDS11
-GAME( 200?, sc4s6c ,0, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (65% Fixed) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4s6cb ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (65% Fixed) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4s6c ,0, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (65% Fixed) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4s6cb ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (65% Fixed) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR6834 SUPER 6 PR6834 SSIX SOUNDS11
-GAME( 200?, sc4s6ca ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4s6cc ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4s6cd ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4s6ce ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4s6ca ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4s6cc ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4s6cd ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4s6ce ,sc4s6c, sc4, sc4, sc4_state, sc4s6c, ROT0, "BFM","Super 6 Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
@@ -28487,17 +28487,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4taekw_mbus)
}
// PR2515 TAE KWON DOUGH TAEKWONSND TAE KWON DOUGH
-GAME( 200?, sc4taekw ,0, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwa ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwb ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwg ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwh ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwi ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwj ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwc ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwd ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwe ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4taekwf ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekw ,0, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwa ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwb ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwg ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwh ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwi ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwj ,sc4taekw, sc4, sc4, sc4_state, sc4taekw, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwc ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwd ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwe ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4taekwf ,sc4taekw, sc4, sc4, sc4_state, sc4taekw_mbus, ROT0, "Qps","Tae Kwon Dough (Qps) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
static const stepper_interface* sc4taknt_reel_configs[6] =
@@ -28517,8 +28517,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4taknt)
}
// PR1302 AWP TAKE NOTE PR1302 TAKE NOTE SOUNDS11
-GAME( 200?, sc4taknt ,0, sc4, sc4, sc4_state, sc4taknt, ROT0, "BFM","Take Note (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4taknta ,sc4taknt, sc4, sc4, sc4_state, sc4taknt, ROT0, "BFM","Take Note (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4taknt ,0, sc4, sc4, sc4_state, sc4taknt, ROT0, "BFM","Take Note (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4taknta ,sc4taknt, sc4, sc4, sc4_state, sc4taknt, ROT0, "BFM","Take Note (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4takcl_reel_configs[6] =
{
@@ -28544,20 +28544,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4takcl_mbus)
// PR1323 CLUB TAKE NOTE PR1323 CNOT SOUNDS11
-GAME( 200?, sc4takcl ,0, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4takcld ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4takcli ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4takclj ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4takcl ,0, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4takcld ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4takcli ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4takclj ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR1323 CLUB TAKE NOTE CLUB TAKE NOTE CLUB PR1323 CNOT SOUNDS11
-GAME( 200?, sc4takclg ,sc4takcl, sc4, sc4, sc4_state, sc4takcl_mbus, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4takclh ,sc4takcl, sc4, sc4, sc4_state, sc4takcl_mbus, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4takclg ,sc4takcl, sc4, sc4, sc4_state, sc4takcl_mbus, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4takclh ,sc4takcl, sc4, sc4, sc4_state, sc4takcl_mbus, ROT0, "BFM","Take Note Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR1323 CLUB TAKE NOTE 500 PR1323 CNOT SOUNDS11
-GAME( 200?, sc4takcla ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club 500 (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4takcla ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club 500 (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
// PR1323 CLUB TAKE NOTE FERRY PR1323 CNOT SOUNDS11
-GAME( 200?, sc4takclb ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4takclc ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4takcle ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4takclf ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4takclb ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4takclc ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4takcle ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4takclf ,sc4takcl, sc4, sc4, sc4_state, sc4takcl, ROT0, "BFM","Take Note Club (Ferry) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4tetri_reel_configs[6] =
{
@@ -28576,18 +28576,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tetri)
}
// PR7077 TETRIS TETR SOUNDS
-GAME( 200?, sc4tetri ,0, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetria ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrib ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetric ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrid ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrie ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrif ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrig ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrih ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrii ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrij ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4tetrik ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetri ,0, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetria ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrib ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetric ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrid ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrie ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrif ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrig ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrih ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrii ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrij ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4tetrik ,sc4tetri, sc4, sc4, sc4_state, sc4tetri, ROT0, "Mazooma","Tetris (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4tic2_reel_configs[6] =
@@ -28614,23 +28614,23 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tic2_mbus)
// PR7060CASINO TICTACTWO TTTWO SOUNDS TIC TAC TWO
-GAME( 200?, sc4tic2 ,0, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2a ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2b ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2c ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2d ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2e ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2f ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2g ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2n ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2o ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2 ,0, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2a ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2b ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2c ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2d ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2e ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2f ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2g ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2n ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2o ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// PR7060CASINO TICTACTWO TIC TAC TWO ARCADE TTTWO SOUNDS TIC TAC TWO
-GAME( 200?, sc4tic2i ,sc4tic2, sc4, sc4, sc4_state, sc4tic2_mbus, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2j ,sc4tic2, sc4, sc4, sc4_state, sc4tic2_mbus, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2k ,sc4tic2, sc4, sc4, sc4_state, sc4tic2_mbus, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2h ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2l ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4tic2m ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2i ,sc4tic2, sc4, sc4, sc4_state, sc4tic2_mbus, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2j ,sc4tic2, sc4, sc4, sc4_state, sc4tic2_mbus, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2k ,sc4tic2, sc4, sc4, sc4_state, sc4tic2_mbus, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2h ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2l ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4tic2m ,sc4tic2, sc4, sc4, sc4_state, sc4tic2, ROT0, "Mazooma","Tic Tac Two Casino Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4tbana_reel_configs[6] =
@@ -28652,8 +28652,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tbana)
// PR1110 TOP BANANA PR1110 TOP BANANA SOUNDS11
-GAME( 200?, sc4tbana ,0, sc4, sc4, sc4_state, sc4tbana, ROT0, "BFM","Top Banana (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tbanaa ,sc4tbana, sc4, sc4, sc4_state, sc4tbana, ROT0, "BFM","Top Banana (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tbana ,0, sc4, sc4, sc4_state, sc4tbana, ROT0, "BFM","Top Banana (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tbanaa ,sc4tbana, sc4, sc4, sc4_state, sc4tbana, ROT0, "BFM","Top Banana (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4tgear_reel_configs[6] =
{
@@ -28673,14 +28673,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tgear)
// REEL 4 ERR 24
// PR7062 TOP GEARS GEARS SOUNDS TOP GEARS
-GAME( 200?, sc4tgear ,0, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tgeara ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tgearb ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tgearc ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4tgeard ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4tgeare ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4tgearf ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4tgearg ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgear ,0, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgeara ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgearb ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgearc ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgeard ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgeare ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgearf ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4tgearg ,sc4tgear, sc4, sc4, sc4_state, sc4tgear, ROT0, "Mazooma","Top Gear (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4tload_reel_configs[6] =
@@ -28701,7 +28701,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tload)
// PR2112 TOP LOADER LOAD SOUNDS TOP LOADER
-GAME( 200?, sc4tload ,0, sc4, sc4, sc4_state, sc4tload, ROT0, "Mazooma","Top Loader (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tload ,0, sc4, sc4, sc4_state, sc4tload, ROT0, "Mazooma","Top Loader (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ticlb_reel_configs[6] =
@@ -28722,11 +28722,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ticlb)
}
// PR6832 TREASURE ISLAND FIXED 65% PR6832 TRES SOUNDS11
-GAME( 200?, sc4ticlb ,0, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Fixed 65%) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ticlbb ,sc4ticlb, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Fixed 65%) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ticlb ,0, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Fixed 65%) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ticlbb ,sc4ticlb, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Fixed 65%) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR6832 TREASURE ISLAND PR6832 TRES SOUNDS11
-GAME( 200?, sc4ticlba ,sc4ticlb, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ticlbc ,sc4ticlb, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ticlba ,sc4ticlb, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ticlbc ,sc4ticlb, sc4dmd, sc4, sc4_state, sc4ticlb, ROT0, "BFM","Treasure Island Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4ttomb_reel_configs[6] =
{
@@ -28746,10 +28746,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ttomb)
}
// PR1305 TREASURE TOMB PR1305 TRES TOMB SOUNDS11 / HIT SHOT
-GAME( 200?, sc4ttomb ,0, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttomba ,sc4ttomb, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttombb ,sc4ttomb, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttombc ,sc4ttomb, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttomb ,0, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttomba ,sc4ttomb, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttombb ,sc4ttomb, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttombc ,sc4ttomb, sc4, sc4, sc4_state, sc4ttomb, ROT0, "BFM","Treasure Tomb (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4tridn_reel_configs[6] =
@@ -28769,8 +28769,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tridn)
}
// PR2103 THE TRIDENT TRID SOUNDS THE TRIDENT
-GAME( 200?, sc4tridn ,0, sc4, sc4, sc4_state, sc4tridn, ROT0, "Mazooma","Trident, The (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tridna ,sc4tridn, sc4, sc4, sc4_state, sc4tridn, ROT0, "Mazooma","Trident, The (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tridn ,0, sc4, sc4, sc4_state, sc4tridn, ROT0, "Mazooma","Trident, The (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tridna ,sc4tridn, sc4, sc4, sc4_state, sc4tridn, ROT0, "Mazooma","Trident, The (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4tri7tb_reel_configs[6] =
{
@@ -28812,31 +28812,31 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tri7_mbus)
// PR1328 TRIPLE 7'S PR1328 TRIPLE 7S SOUNDS11 TRIPLE 7'S ABOVE
-GAME( 200?, sc4tri7 ,0, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // ABUV
-GAME( 200?, sc4tri7a ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7m ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7n ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7v ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7w ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7f ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // SEVN
-GAME( 200?, sc4tri7g ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7h ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7i ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7j ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7k ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7l ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7o ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7p ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7q ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7r ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7s ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7t ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7u ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7 ,0, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING ) // ABUV
+GAME( 200?, sc4tri7a ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7m ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7n ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7v ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7w ,sc4tri7, sc4, sc4, sc4_state, sc4tri7tb, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (Top Box, set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7f ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // SEVN
+GAME( 200?, sc4tri7g ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7h ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7i ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7j ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7k ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7l ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7o ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7p ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7q ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7r ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7s ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7t ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7u ,sc4tri7, sc4, sc4, sc4_state, sc4tri7, ROT0, "BFM","Triple 7's (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
// PR1328 TRIPLE 7'S PR1328 TRIPLE 7S SOUNDS11 SEVENS ABOVE ARCADE TRIPLE 7'S ABOVE
-GAME( 200?, sc4tri7b ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7c ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7d ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tri7e ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7b ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7c ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7d ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tri7e ,sc4tri7, sc4, sc4, sc4_state, sc4tri7_mbus, ROT0, "BFM","Triple 7's Arcade (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4tub_reel_configs[6] =
@@ -28857,10 +28857,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4tub)
// PR1103 TUBULAR BELLS PR1103 TUBULAR BELLS SOUNDS11
-GAME( 200?, sc4tub ,0, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4tuba ,sc4tub, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4tubb ,sc4tub, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4tubc ,sc4tub, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4tub ,0, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4tuba ,sc4tub, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4tubb ,sc4tub, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4tubc ,sc4tub, sc4, sc4, sc4_state, sc4tub, ROT0, "BFM","Tubular Bells (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
@@ -28887,17 +28887,17 @@ DRIVER_INIT_MEMBER(sc4_state,sc4vrgcl_mbus)
}
// PR1037 CLUB VERY RICH GEEZER PR1037 RICH SOUNDS11 VERY RICH GEEZER
-GAME( 200?, sc4vrgcl ,0, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgcla ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgclb ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgclc ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgcld ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgcle ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgclf ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgclg ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgcl ,0, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgcla ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgclb ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgclc ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgcld ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgcle ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgclf ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgclg ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR1037 CLUB VERY RICH GEEZER VERY RICH GEEZER CLUB PR1037 RICH SOUNDS11 VERY RICH GEEZER
-GAME( 200?, sc4vrgclh ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl_mbus, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4vrgcli ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl_mbus, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgclh ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl_mbus, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4vrgcli ,sc4vrgcl, sc4, sc4, sc4_state, sc4vrgcl_mbus, ROT0, "BFM","Very Rich Geezer Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4vmclb_reel_configs[6] =
{
@@ -28917,9 +28917,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4vmclb)
// / PR7132 CLUB VIVA MEXICO PR7132 VIVA SOUNDS11 VIVA MEXICO
-GAME( 200?, sc4vmclb ,0, sc4, sc4, sc4_state, sc4vmclb, ROT0, "BFM","Viva Mexico Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4vmclba ,sc4vmclb, sc4, sc4, sc4_state, sc4vmclb, ROT0, "BFM","Viva Mexico Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4vmclbb ,sc4vmclb, sc4, sc4, sc4_state, sc4vmclb, ROT0, "BFM","Viva Mexico Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4vmclb ,0, sc4, sc4, sc4_state, sc4vmclb, ROT0, "BFM","Viva Mexico Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4vmclba ,sc4vmclb, sc4, sc4, sc4_state, sc4vmclb, ROT0, "BFM","Viva Mexico Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4vmclbb ,sc4vmclb, sc4, sc4, sc4_state, sc4vmclb, ROT0, "BFM","Viva Mexico Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4waw_reel_configs[6] =
@@ -28940,13 +28940,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4waw)
// Reel 4 is strange ERR24
// PR7065 WET 'N' WILD WILD SOUNDS WET 'N' WILD
-GAME( 200?, sc4waw ,0, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4wawa ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4wawb ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4wawc ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4wawd ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4wawe ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4wawf ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4waw ,0, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4wawa ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4wawb ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4wawc ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4wawd ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4wawe ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4wawf ,sc4waw, sc4, sc4, sc4_state, sc4waw, ROT0, "Mazooma","Wet & Wild (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
static const stepper_interface* sc4leg_reel_configs[6] =
@@ -28966,14 +28966,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4leg)
}
// PR7120 WHO WANTS TO BE A LEGIONNAIRE PR7120 LEGIONNAIRE SOUNDS11
-GAME( 200?, sc4leg ,0, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lega ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4legb ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4legc ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4legd ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4lege ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4legf ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4legg ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4leg ,0, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lega ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4legb ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4legc ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4legd ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4lege ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4legf ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4legg ,sc4leg, sc4, sc4, sc4_state, sc4leg, ROT0, "BFM","Who Wants To Be A Legionnaire (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4cleg_reel_configs[6] =
{
@@ -28998,14 +28998,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cleg_mbus)
}
// PR1038 CLUB WHO WANTS TO BE A LEGIONNAIRE PR1038 CLUB WWTBAL SOUNDS11
-GAME( 200?, sc4legcb ,0, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4legcba ,sc4legcb, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4legcbb ,sc4legcb, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4legcbc ,sc4legcb, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4legcb ,0, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4legcba ,sc4legcb, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4legcbb ,sc4legcb, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4legcbc ,sc4legcb, sc4, sc4, sc4_state, sc4cleg, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// Alarms through startup, doesn't start game
// PR1038 CLUB WHO WANTS TO BE A LEGIONNAIRE WWTB LEGIONNAIRE CLUB PR1038 CLUB WWTBAL SOUNDS11
-GAME( 200?, sc4legcbd ,sc4legcb, sc4, sc4, sc4_state, sc4cleg_mbus, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4legcbe ,sc4legcb, sc4, sc4, sc4_state, sc4cleg_mbus, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4legcbd ,sc4legcb, sc4, sc4, sc4_state, sc4cleg_mbus, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4legcbe ,sc4legcb, sc4, sc4, sc4_state, sc4cleg_mbus, ROT0, "BFM","Who Wants To Be A Legionnaire Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4wspin_reel_configs[6] =
{
@@ -29025,11 +29025,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4wspin)
// QPS162 WIN SPINNER Arcade Version 011 WINSPINNERSND WIN SPINNER
-GAME( 200?, sc4wspin ,0, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner Arcade (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4wspinc ,sc4wspin, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner Arcade (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4wspin ,0, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner Arcade (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4wspinc ,sc4wspin, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner Arcade (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// QPS162 WIN SPINNER SP Arcade Version 011 WINSPINNERSND WIN SPINNER
-GAME( 200?, sc4wspinb ,sc4wspin, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner SP Arcade (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4wspind ,sc4wspin, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner SP Arcade (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4wspinb ,sc4wspin, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner SP Arcade (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4wspind ,sc4wspin, sc4, sc4, sc4_state, sc4wspin, ROT0, "Qps","Win Spinner SP Arcade (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4wwys_reel_configs[6] =
{
@@ -29048,8 +29048,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4wwys)
}
// PR1301 WIN WHEN YOUR SPINNING PR1301 WIN W Y S SOUNDS11
-GAME( 200?, sc4wwys ,0, sc4, sc4, sc4_state, sc4wwys, ROT0, "BFM","Win When Your Spinning (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4wwysa ,sc4wwys, sc4, sc4, sc4_state, sc4wwys, ROT0, "BFM","Win When Your Spinning (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4wwys ,0, sc4, sc4, sc4_state, sc4wwys, ROT0, "BFM","Win When Your Spinning (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4wwysa ,sc4wwys, sc4, sc4, sc4_state, sc4wwys, ROT0, "BFM","Win When Your Spinning (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4winsptb_reel_configs[6] =
{
@@ -29085,47 +29085,47 @@ DRIVER_INIT_MEMBER(sc4_state,sc4winsp)
}
// PR2526 WINNING SPIN TOP BOX WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winsp ,0, sc4, sc4, sc4_state, sc4winsptb, ROT0, "Qps","Winning Spin Top Box (PR2526, WSPT) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winsp ,0, sc4, sc4, sc4_state, sc4winsptb, ROT0, "Qps","Winning Spin Top Box (PR2526, WSPT) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
// PR2526 WINNING SPIN TOP BOX WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winsp0 ,sc4winsp, sc4, sc4, sc4_state, sc4winsptb, ROT0, "Qps","Winning Spin Top Box (PR2526, WSPT) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // was in a Win Spinner set, but probably belongs here
+GAME( 200?, sc4winsp0 ,sc4winsp, sc4, sc4, sc4_state, sc4winsptb, ROT0, "Qps","Winning Spin Top Box (PR2526, WSPT) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // was in a Win Spinner set, but probably belongs here
// PR2546 WINNING SPIN Bingo Version011 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspa ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winsph ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspa ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winsph ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Bingo Version 012 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspe ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspl ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspq ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspw ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspe ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspl ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspq ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspw ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Bingo V012) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Arcade Version011 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspd ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspk ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspd ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspk ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Arcade Version 012 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspt ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspz ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspt ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspz ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Version 021 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspb ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V021) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspi ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V021) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspb ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V021) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspi ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V021) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Version 022 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspf ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspm ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspr ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspx ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspf ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspm ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspr ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspx ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V022) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Version 031 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspc ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V031) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspj ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V031) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspc ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V031) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspj ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V031) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Version 032 WINNINGSPINSND WINNING SPIN
-GAME( 200?, sc4winspg ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspn ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4winsps ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspy ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspg ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspn ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winsps ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspy ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (V032) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Arcade Version 061 WINNINGSPINSND WINNING SPIN
// these can be booted
-GAME( 200?, sc4winspo ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V061) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspu ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V061) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspo ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V061) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspu ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V061) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2546 WINNING SPIN Arcade Version 062 WINNINGSPINSND WINNING SPIN
// these can be booted
-GAME( 200?, sc4winspp ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V062) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4winspv ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V062) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspp ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V062) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4winspv ,sc4winsp, sc4, sc4, sc4_state, sc4winsp, ROT0, "Qps","Winning Spin (Arcade V062) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4wondw_reel_configs[6] =
{
@@ -29144,8 +29144,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4wondw)
}
// PR1318 WONDER WHEEL PR1314 WONDER WHEEL SOUNDS11
-GAME( 200?, sc4wondw ,0, sc4, sc4, sc4_state, sc4wondw, ROT0, "BFM","Wonder Wheel (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4wondwa ,sc4wondw, sc4, sc4, sc4_state, sc4wondw, ROT0, "BFM","Wonder Wheel (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4wondw ,0, sc4, sc4, sc4_state, sc4wondw, ROT0, "BFM","Wonder Wheel (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4wondwa ,sc4wondw, sc4, sc4, sc4_state, sc4wondw, ROT0, "BFM","Wonder Wheel (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4xmark_reel_configs[6] =
{
@@ -29164,8 +29164,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4xmark)
}
// PR1116 X MARKS THE SPOT PR1116 X MARKS THE SPOT SOUNDS11
-GAME( 200?, sc4xmark ,0, sc4, sc4, sc4_state, sc4xmark, ROT0, "BFM","X Marks The Spot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4xmarka ,sc4xmark, sc4, sc4, sc4_state, sc4xmark, ROT0, "BFM","X Marks The Spot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4xmark ,0, sc4, sc4, sc4_state, sc4xmark, ROT0, "BFM","X Marks The Spot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4xmarka ,sc4xmark, sc4, sc4, sc4_state, sc4xmark, ROT0, "BFM","X Marks The Spot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
@@ -29186,14 +29186,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4blokq)
}
// PR2025 BLOCK BUSTER BUSTERSND BLOCK BUSTER
-GAME( 200?, sc4blokq ,0, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4blokqa ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4blokqb ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4blokqc ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4blokqd ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4blokqe ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4blokq ,0, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4blokqa ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4blokqb ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4blokqc ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4blokqd ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4blokqe ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Qps","Blockbuster (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR2025 BLOCK BUSTER BUSTERSND BLOCK BUSTER (same as sc4blokq ?)
-GAME( 200?, sc4bbust ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Mazooma","Blockbuster (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bbust ,sc4blokq, sc4, sc4, sc4_state, sc4blokq, ROT0, "Mazooma","Blockbuster (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4clbtm_reel_configs[6] =
@@ -29215,12 +29215,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4clbtm)
// PR7131 CLUB TEMPTATION PR7131 TEMPTATION SOUNDS11
-GAME( 200?, sc4clbtm ,0, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbtma ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbtmb ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbtmc ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbtmd ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbtme ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbtm ,0, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbtma ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbtmb ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbtmc ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbtmd ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbtme ,sc4clbtm, sc4dmd, sc4, sc4_state, sc4clbtm, ROT0, "BFM","Club Temptation (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4onup_reel_configs[6] =
{
@@ -29239,8 +29239,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4onup)
}
// PR2076 ON THE UP HYPE SOUNDS ON THE UP
-GAME( 200?, sc4onup ,0, sc4, sc4, sc4_state, sc4onup, ROT0, "BFM","On The Up (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4onupa ,sc4onup, sc4, sc4, sc4_state, sc4onup, ROT0, "BFM","On The Up (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4onup ,0, sc4, sc4, sc4_state, sc4onup, ROT0, "BFM","On The Up (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4onupa ,sc4onup, sc4, sc4, sc4_state, sc4onup, ROT0, "BFM","On The Up (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4hyper_reel_configs[6] =
{
@@ -29259,8 +29259,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hyper)
}
// PR2053 HYPERACTIVEL HYPE SOUNDS HYPERACTIVE
-GAME( 200?, sc4hyper ,0, sc4, sc4, sc4_state, sc4hyper, ROT0, "Mazooma","Hyperactive (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hypera ,sc4hyper, sc4, sc4, sc4_state, sc4hyper, ROT0, "Mazooma","Hyperactive (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hyper ,0, sc4, sc4, sc4_state, sc4hyper, ROT0, "Mazooma","Hyperactive (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hypera ,sc4hyper, sc4, sc4, sc4_state, sc4hyper, ROT0, "Mazooma","Hyperactive (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4pglcl_reel_configs[6] =
@@ -29279,15 +29279,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pglcl)
m_reel_setup = sc4pglcl_reel_configs;
}
// PR1623 PHARAOHS GOLD PHARAOHS GOLD CLUB PR1623 CLASS PHAR GOLD SOUNDS11
-GAME( 200?, sc4pglcl ,0, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PAY UNIT ERR 17
-GAME( 200?, sc4pglcla ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglclb ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglclc ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglcld ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglcle ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglclf ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglclg ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglclh ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglcl ,0, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PAY UNIT ERR 17
+GAME( 200?, sc4pglcla ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglclb ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglclc ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglcld ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglcle ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglclf ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglclg ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglclh ,sc4pglcl, sc4, sc4, sc4_state, sc4pglcl, ROT0, "BFM","Pharaoh's Gold Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
static const stepper_interface* sc4po8_reel_configs[6] =
{
@@ -29313,26 +29313,26 @@ DRIVER_INIT_MEMBER(sc4_state,sc4po8_mbus)
// PR2530 PIECES OF EIGHT V1.0 PIECESOFEIGHTSND PIECES OF EIGHT
-GAME( 200?, sc4po8 ,0, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8e ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8f ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8 ,0, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.0) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8e ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.0) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8f ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.0) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PR2530 PIECES OF EIGHT V1.1 PIECESOFEIGHTSND PIECES OF EIGHT
-GAME( 200?, sc4po8a ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8b ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8g ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8h ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8a ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8b ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8g ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8h ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (V1.1) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR2530 PIECES OF EIGHT 011 PIECESOFEIGHTSND PIECES OF EIGHT
-GAME( 200?, sc4po8c ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "Qps","Pieces Of Eight (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8m ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "QPS","Pieces Of Eight (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8c ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "Qps","Pieces Of Eight (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8m ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "QPS","Pieces Of Eight (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2530 PIECES OF EIGHT 012 PIECESOFEIGHTSND PIECES OF EIGHT
-GAME( 200?, sc4po8i ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8k ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8i ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8k ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2530 PIECES OF EIGHT 041 PIECESOFEIGHTSND PIECES OF EIGHT
-GAME( 200?, sc4po8d ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "Qps","Pieces Of Eight (041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8n ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "QPS","Pieces Of Eight (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8d ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "Qps","Pieces Of Eight (041) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8n ,sc4po8, sc4, sc4, sc4_state, sc4po8_mbus, ROT0, "QPS","Pieces Of Eight (041) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2530 PIECES OF EIGHT 042 PIECESOFEIGHTSND PIECES OF EIGHT
-GAME( 200?, sc4po8j ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4po8l ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8j ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (042) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4po8l ,sc4po8, sc4, sc4, sc4_state, sc4po8, ROT0, "Qps","Pieces Of Eight (042) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
@@ -29355,16 +29355,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4adjb)
// PR3039 AWP ANT N DECS JIGGY BANK S4 PR3009 JIGGY BANK SOUNDS11 JIGGY BANK S.SITE
-GAME( 200?, sc4adjb ,0, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjba ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbb ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbc ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbd ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbe ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbf ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbg ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbh ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4adjbi ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjb ,0, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjba ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbb ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbc ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbd ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbe ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbf ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbg ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbh ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4adjbi ,sc4adjb, sc4, sc4, sc4_state, sc4adjb, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 4) (Set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4adwta_reel_configs[6] =
{
@@ -29383,8 +29383,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4adwta)
}
// PR1940 AWP ANT N DECS WTAD S4 PR1940 ADSNT SHOWTIME SOUNDS11 ANTNDECSWTAD S.SITE
-GAME( 200?, sc4adwta ,0, sc4, sc4, sc4_state, sc4adwta, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4adwtaa ,sc4adwta, sc4, sc4, sc4_state, sc4adwta, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4adwta ,0, sc4, sc4, sc4_state, sc4adwta, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4adwtaa ,sc4adwta, sc4, sc4, sc4_state, sc4adwta, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4a40_reel_configs[6] =
{
@@ -29403,10 +29403,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4a40)
}
// PR2200 AROUND THE BOARD AROU SOUNDS AROUND THE BOARD
-GAME( 200?, sc4a40 ,0, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4a40a ,sc4a40, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4a40b ,sc4a40, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4a40c ,sc4a40, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40 ,0, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40a ,sc4a40, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40b ,sc4a40, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40c ,sc4a40, sc4, sc4, sc4_state, sc4a40, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4a40cl_reel_configs[6] =
{
@@ -29425,10 +29425,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4a40cl)
}
// PR2154 CLUB AROUND BOAR CLB AROUND BOARD CLUB AROU SOUNDS
-GAME( 200?, sc4a40cl ,0, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4a40cla ,sc4a40cl, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4a40clb ,sc4a40cl, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4a40clc ,sc4a40cl, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40cl ,0, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40cla ,sc4a40cl, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40clb ,sc4a40cl, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4a40clc ,sc4a40cl, sc4, sc4, sc4_state, sc4a40cl, ROT0, "Mazooma","Around The Board In 40 Days Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4bantm_reel_configs[6] =
@@ -29448,10 +29448,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bantm)
}
// PR2301 BANTAM OF THE OPERA BANTAM SOUNDS BANTAMOFTHEOPERA
-GAME( 200?, sc4bantm ,0, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bantma ,sc4bantm, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bantmb ,sc4bantm, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bantmc ,sc4bantm, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bantm ,0, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bantma ,sc4bantm, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bantmb ,sc4bantm, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bantmc ,sc4bantm, sc4, sc4, sc4_state, sc4bantm, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4bar7_reel_configs[6] =
@@ -29471,14 +29471,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bar7)
}
// PR1433 BAR7S PR1433 BAR SEVENS SOUNDS11
-GAME( 200?, sc4bar7 ,0, sc4, sc4, sc4_state, sc4bar7, ROT0, "BFM","Bar 7's (PR1433) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bar7a ,sc4bar7, sc4, sc4, sc4_state, sc4bar7, ROT0, "BFM","Bar 7's (PR1433) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bar7 ,0, sc4, sc4, sc4_state, sc4bar7, ROT0, "BFM","Bar 7's (PR1433) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bar7a ,sc4bar7, sc4, sc4, sc4_state, sc4bar7, ROT0, "BFM","Bar 7's (PR1433) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// INIT COMMS (optional top box for above maybe?)
// PR1438 BAR7S PR1436 TRIPLE CASINO SOUNDS11
-GAME( 200?, sc4bar7b ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bar7c ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bar7d ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bar7e ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bar7b ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bar7c ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bar7d ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bar7e ,sc4bar7, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Bar 7's (PR1438) (Bellfruit) (Scorpion 4) (Top Box?, set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4batl_reel_configs[6] =
{
@@ -29498,8 +29498,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4batl)
// PR1724 AWP BATTLESHIPS AND CRUISERS S4 PR1704 B AND C SOUNDS11 BATTLESHIPSCRUIS S.SITE
-GAME( 200?, sc4batl ,0, sc4, sc4, sc4_state, sc4batl, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4batla ,sc4batl, sc4, sc4, sc4_state, sc4batl, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4batl ,0, sc4, sc4, sc4_state, sc4batl, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4batla ,sc4batl, sc4, sc4, sc4_state, sc4batl, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4bull_reel_configs[6] =
@@ -29519,10 +29519,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bull)
}
// PR1722 AWP BULLSEYE SCORP4 PR1702 BULLSEYE SOUNDS11 BULLSEYE S.SITE
-GAME( 200?, sc4bull ,0, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulla ,sc4bull, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bullb ,sc4bull, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bullc ,sc4bull, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bull ,0, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulla ,sc4bull, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bullb ,sc4bull, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bullc ,sc4bull, sc4, sc4, sc4_state, sc4bull, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4bullcs_reel_configs[6] =
{
@@ -29541,10 +29541,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bullcs)
}
// PR1740 AWP BULLSEYE CLASSIC SCORP4 PR1702 BULLSEYE SOUNDS11 BULLSEYE CLASSIC S.SITE
-GAME( 200?, sc4bulcs ,0, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulcsa ,sc4bulcs, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulcsb ,sc4bulcs, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulcsc ,sc4bulcs, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcs ,0, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcsa ,sc4bulcs, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcsb ,sc4bulcs, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcsc ,sc4bulcs, sc4, sc4, sc4_state, sc4bullcs, ROT0, "BFM","Bullseye Classic (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4butch_reel_configs[6] =
{
@@ -29564,14 +29564,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4butch)
// PR1930 AWP BUTCH CASHIDY AND THE SUNDANCE QUID S4 PR1910 B C AND THE S Q SOUNDS11 BUTCH N SUNDANCE S.SITE
-GAME( 200?, sc4butch ,0, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4butcha ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4butchb ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4butchc ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4butchd ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4butche ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4butchf ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4butchg ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4butch ,0, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4butcha ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4butchb ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4butchc ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4butchd ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4butche ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4butchf ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4butchg ,sc4butch, sc4, sc4, sc4_state, sc4butch, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4cabin_reel_configs[6] =
@@ -29591,20 +29591,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cabin)
}
// PR2209 CABIN FEVER CABF SOUNDS CABIN FEVER
-GAME( 200?, sc4cabin ,0, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabina ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabinb ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabinc ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabind ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabine ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabinf ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabing ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabinh ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabini ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabinj ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabink ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabinl ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4cabinm ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabin ,0, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabina ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabinb ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabinc ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabind ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabine ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabinf ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabing ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabinh ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabini ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabinj ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabink ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabinl ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4cabinm ,sc4cabin, sc4, sc4, sc4_state, sc4cabin, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
static const stepper_interface* sc4cari_reel_configs[6] =
{
@@ -29623,12 +29623,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cari)
}
// PR2326 CARIBBEAN CASH CABC SOUNDS CARIBBEAN CASH
-GAME( 200?, sc4cari ,0, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4caria ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4carib ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4caric ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4carid ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4carie ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cari ,0, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4caria ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4carib ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4caric ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4carid ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4carie ,sc4cari, sc4, sc4, sc4_state, sc4cari, ROT0, "Mazooma","Caribbean Cash (PR2326) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4cariq_reel_configs[6] =
@@ -29649,14 +29649,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cariq)
// these lack identification strings, and it's not the same game as above
-GAME( 200?, sc4cariq ,0, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cariqa ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cariqb ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cariqc ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cariqd ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cariqe ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cariqf ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cariqg ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariq ,0, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariqa ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariqb ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariqc ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariqd ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariqe ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariqf ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cariqg ,sc4cariq, sc4, sc4, sc4_state, sc4cariq, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4cblas_reel_configs[6] =
{
@@ -29676,8 +29676,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cblas)
// PR1683 BLAS14
-GAME( 200?, sc4cblas ,0, sc4, sc4, sc4_state, sc4cblas, ROT0, "Voodoo Games","Cash Blast (Voodoo Games) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cblasa ,sc4cblas, sc4, sc4, sc4_state, sc4cblas, ROT0, "Voodoo Games","Cash Blast (Voodoo Games) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cblas ,0, sc4, sc4, sc4_state, sc4cblas, ROT0, "Voodoo Games","Cash Blast (Voodoo Games) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cblasa ,sc4cblas, sc4, sc4, sc4_state, sc4cblas, ROT0, "Voodoo Games","Cash Blast (Voodoo Games) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4casxt_reel_configs[6] =
@@ -29697,12 +29697,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4casxt)
}
// PR2338 XTRAVAGANZA XTRV SOUNDS XTRAVAGANZA
-GAME( 200?, sc4casxt ,0, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4casxta ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4casxtb ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4casxtc ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4casxtd ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4casxte ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4casxt ,0, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4casxta ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4casxtb ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4casxtc ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4casxtd ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4casxte ,sc4casxt, sc4, sc4, sc4_state, sc4casxt, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4chavi_reel_configs[6] =
{
@@ -29722,14 +29722,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4chavi)
// PR1731 AWP CHAV IT SCORP4 PR1711 CHAV IT SOUNDS11 CHAV IT S.SITE
-GAME( 200?, sc4chavi ,0, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavia ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavib ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavic ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavid ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavie ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavif ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavig ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavi ,0, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavia ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavib ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavic ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavid ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavie ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavif ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavig ,sc4chavi, sc4, sc4, sc4_state, sc4chavi, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4chavy_reel_configs[6] =
{
@@ -29749,14 +29749,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4chavy)
// PR2305 CHAVVY CHASE CHVY SOUNDS
-GAME( 200?, sc4chavy ,0, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavya ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavyb ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavyc ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavyd ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavye ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavyf ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4chavyg ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavy ,0, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavya ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavyb ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavyc ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavyd ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavye ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavyf ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4chavyg ,sc4chavy, sc4, sc4, sc4_state, sc4chavy, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4cmani_reel_configs[6] =
@@ -29777,8 +29777,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cmani)
// PR1308 COLOUR MANIA PR1308 COLOUR MAN SOUNDS11
-GAME( 200?, sc4cmani ,0, sc4, sc4, sc4_state, sc4cmani, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cmania ,sc4cmani, sc4, sc4, sc4_state, sc4cmani, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cmani ,0, sc4, sc4, sc4_state, sc4cmani, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cmania ,sc4cmani, sc4, sc4, sc4_state, sc4cmani, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4ctl_reel_configs[6] =
@@ -29798,22 +29798,22 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ctl)
}
// PR1109 AWP COP THE LOT PR1109 CTLOT SOUNDS11
-GAME( 200?, sc4ctl ,0, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ctla ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ctlb ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ctlc ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ctld ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ctle ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctl ,0, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctla ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctlb ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctlc ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctld ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctle ,sc4ctl, sc4, sc4, sc4_state, sc4ctl, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR3035 AWP COPS AND ROBBERS SAFE CRACKER S4 PR3005 SAFE CRACKER SOUNDS11 SAFE CRACKER S.SITE
-GAME( 200?, sc4crsc ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crsca ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4crscb ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4crscc ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4crscd ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4crsce ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4crscf ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4crscg ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4crsc ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crsca ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crscb ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4crscc ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4crscd ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4crsce ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4crscf ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4crscg ,sc4crsc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4coro_reel_configs[6] =
@@ -29833,14 +29833,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4coro)
}
// PR2252 CORONATION ST CORRY SOUNDS CORONATION ST
-GAME( 200?, sc4coro ,0, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4coroa ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4corof ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4corog ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4coroj ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4corok ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4corol ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4corom ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4coro ,0, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4coroa ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4corof ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4corog ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4coroj ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4corok ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4corol ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4corom ,sc4coro, sc4, sc4, sc4_state, sc4coro, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4corod_reel_configs[6] =
@@ -29882,16 +29882,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4corotb)
// PR2249 CORONATION ST Arcade Version 012 COROST_TRIPLE SOUNDS CORONATION ST
// PAY UINT ERR 17
-GAME( 200?, sc4coroc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Coronation Street Triple (Arcade Version 012) (PR2249) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4coroh ,sc4coroc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Coronation Street Triple (Arcade Version 012) (PR2249) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4coroc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Coronation Street Triple (Arcade Version 012) (PR2249) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4coroh ,sc4coroc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Coronation Street Triple (Arcade Version 012) (PR2249) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// P_2_4_ _O_O_A_I_N_S_ _i_g_ _e_s_o_ _1_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _O_O_T_T_I_L_ _O_N_S_ _ _ _ _ _ _ _C_R_N_T_O_ _S_ _ _ _
-GAME( 200?, sc4coron ,sc4coroc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Coronation Street Triple (Bingo Version ?1) (PR2?4?) (Mazooma) (Scorpion 4) ", GAME_NOT_WORKING ) // incomplete pair, was in 'show me the money' set 'Bingo Version' is a guess
+GAME( 200?, sc4coron ,sc4coroc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Coronation Street Triple (Bingo Version ?1) (PR2?4?) (Mazooma) (Scorpion 4) ", GAME_NOT_WORKING ) // incomplete pair, was in 'show me the money' set 'Bingo Version' is a guess
// PR2249 CORONATION STREET CORS MAZ COROST_TRIPLE SOUNDS
-GAME( 200?, sc4corod ,sc4coroc, sc4, sc4, sc4_state, sc4corod, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4coroi ,sc4coroc, sc4, sc4, sc4_state, sc4corod, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4corod ,sc4coroc, sc4, sc4, sc4_state, sc4corod, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4coroi ,sc4coroc, sc4, sc4, sc4_state, sc4corod, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2526 CORONATION ST TOP BOX COROST_TRIPLE SOUNDS CORONATION ST
-GAME( 200?, sc4corotb ,sc4coroc, sc4, sc4, sc4_state, sc4corotb, ROT0, "Mazooma","Coronation Street Triple Top Box (PR2526, CSTB) (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4corotba ,sc4coroc, sc4, sc4, sc4_state, sc4corotb, ROT0, "Mazooma","Coronation Street Triple Top Box (PR2526, CSTB) (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4corotb ,sc4coroc, sc4, sc4, sc4_state, sc4corotb, ROT0, "Mazooma","Coronation Street Triple Top Box (PR2526, CSTB) (Mazooma) (Scorpion 4) (Top Box, set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4corotba ,sc4coroc, sc4, sc4, sc4_state, sc4corotb, ROT0, "Mazooma","Coronation Street Triple Top Box (PR2526, CSTB) (Mazooma) (Scorpion 4) (Top Box, set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4corcl_reel_configs[6] =
{
@@ -29911,8 +29911,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4corcl)
// PR2383 CLUBCORONATIONSTREET CLUBCORONATIONST CLUB CCORO SOUNDS CLUB CORO ST
-GAME( 200?, sc4corcl ,0, sc4, sc4, sc4_state, sc4corcl, ROT0, "Mazooma","Coronation Street Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4corcla ,sc4corcl, sc4, sc4, sc4_state, sc4corcl, ROT0, "Mazooma","Coronation Street Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4corcl ,0, sc4, sc4, sc4_state, sc4corcl, ROT0, "Mazooma","Coronation Street Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4corcla ,sc4corcl, sc4, sc4, sc4_state, sc4corcl, ROT0, "Mazooma","Coronation Street Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4count_reel_configs[6] =
{
@@ -29931,8 +29931,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4count)
}
// PR1929 AWP COUNTDOWN S4 PR1909 COUNTDOWN SOUNDS11 COUNTDOWN S.SITE
-GAME( 200?, sc4count ,0, sc4, sc4, sc4_state, sc4count, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4counta ,sc4count, sc4, sc4, sc4_state, sc4count, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4count ,0, sc4, sc4, sc4_state, sc4count, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4counta ,sc4count, sc4, sc4, sc4_state, sc4count, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
@@ -29967,22 +29967,22 @@ INPUT_PORTS_START( sc4dnd35 )
INPUT_PORTS_END
// PR1927 AWP DEAL OR NO DEAL S4 PR1907 DEAL OR NO DEAL SOUNDS11
-GAME( 200?, sc4dnd ,0, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL016, set 1)", GAME_NOT_WORKING ) // DONL 016
-GAME( 200?, sc4dndb ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL016, set 2)", GAME_NOT_WORKING ) // DONL 016
-GAME( 200?, sc4dnde ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL017, set 1)", GAME_NOT_WORKING ) // DONL 017
-GAME( 200?, sc4dndh ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL017, set 2)", GAME_NOT_WORKING ) // DONL 017
-GAME( 200?, sc4dndf ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL018, set 1)", GAME_NOT_WORKING ) // DONL 018
-GAME( 200?, sc4dndi ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL018, set 2)", GAME_NOT_WORKING )// DONL 018
-GAME( 200?, sc4dndd ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL402, set 1)", GAME_NOT_WORKING ) // DONL 402
-GAME( 200?, sc4dndg ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL402, set 2)", GAME_NOT_WORKING ) // DONL 402
-GAME( 200?, sc4dndj ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL406, set 1)", GAME_NOT_WORKING )// DONL 406
-GAME( 200?, sc4dndl ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL406, set 2)", GAME_NOT_WORKING )// DONL 406
-GAME( 200?, sc4dndc ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL422, set 1)", GAME_NOT_WORKING ) // DONL 422
-GAME( 200?, sc4dnda ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL422, set 2)", GAME_NOT_WORKING ) // DONL 422, incomplete pairing
-GAME( 200?, sc4dndn ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL424, set 1)", GAME_NOT_WORKING )// DONL 424
-GAME( 200?, sc4dndo ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL424, set 2)", GAME_NOT_WORKING )// DONL 424
-GAME( 200?, sc4dndk ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL428, set 1)", GAME_NOT_WORKING )// DONL 428
-GAME( 200?, sc4dndm ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL428, set 2)", GAME_NOT_WORKING )// DONL 428
+GAME( 200?, sc4dnd ,0, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL016, set 1)", GAME_NOT_WORKING ) // DONL 016
+GAME( 200?, sc4dndb ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL016, set 2)", GAME_NOT_WORKING ) // DONL 016
+GAME( 200?, sc4dnde ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL017, set 1)", GAME_NOT_WORKING ) // DONL 017
+GAME( 200?, sc4dndh ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL017, set 2)", GAME_NOT_WORKING ) // DONL 017
+GAME( 200?, sc4dndf ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL018, set 1)", GAME_NOT_WORKING ) // DONL 018
+GAME( 200?, sc4dndi ,sc4dnd, sc4, sc4dnd25, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL018, set 2)", GAME_NOT_WORKING )// DONL 018
+GAME( 200?, sc4dndd ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL402, set 1)", GAME_NOT_WORKING ) // DONL 402
+GAME( 200?, sc4dndg ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL402, set 2)", GAME_NOT_WORKING ) // DONL 402
+GAME( 200?, sc4dndj ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL406, set 1)", GAME_NOT_WORKING )// DONL 406
+GAME( 200?, sc4dndl ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL406, set 2)", GAME_NOT_WORKING )// DONL 406
+GAME( 200?, sc4dndc ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL422, set 1)", GAME_NOT_WORKING ) // DONL 422
+GAME( 200?, sc4dnda ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL422, set 2)", GAME_NOT_WORKING ) // DONL 422, incomplete pairing
+GAME( 200?, sc4dndn ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL424, set 1)", GAME_NOT_WORKING )// DONL 424
+GAME( 200?, sc4dndo ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL424, set 2)", GAME_NOT_WORKING )// DONL 424
+GAME( 200?, sc4dndk ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL428, set 1)", GAME_NOT_WORKING )// DONL 428
+GAME( 200?, sc4dndm ,sc4dnd, sc4, sc4dnd35, sc4_state, sc4dnd, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 4) (DONL428, set 2)", GAME_NOT_WORKING )// DONL 428
static const stepper_interface* sc4dndcs_reel_configs[6] =
{
@@ -30008,12 +30008,12 @@ INPUT_PORTS_START( sc4dndcs5 )
INPUT_PORTS_END
// PR1967 AWP CLASSIC DEAL OR NO DEAL S4 PR1907 DEAL OR NO DEAL SOUNDS11
-GAME( 200?, sc4dndcs ,0, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD211, set 1)", GAME_NOT_WORKING ) // CLDD 211
-GAME( 200?, sc4dndcsb ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD211, set 2)", GAME_NOT_WORKING ) // CLDD 211
-GAME( 200?, sc4dndcsa ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD212, set 1)", GAME_NOT_WORKING ) // CLDD 212
-GAME( 200?, sc4dndcsc ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD212, set 2)", GAME_NOT_WORKING ) // CLDD 212
-GAME( 200?, sc4dndcsd ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD215, set 1)", GAME_NOT_WORKING ) // CLDD 215
-GAME( 200?, sc4dndcse ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD215, set 2)", GAME_NOT_WORKING ) // CLDD 215
+GAME( 200?, sc4dndcs ,0, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD211, set 1)", GAME_NOT_WORKING ) // CLDD 211
+GAME( 200?, sc4dndcsb ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD211, set 2)", GAME_NOT_WORKING ) // CLDD 211
+GAME( 200?, sc4dndcsa ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD212, set 1)", GAME_NOT_WORKING ) // CLDD 212
+GAME( 200?, sc4dndcsc ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD212, set 2)", GAME_NOT_WORKING ) // CLDD 212
+GAME( 200?, sc4dndcsd ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD215, set 1)", GAME_NOT_WORKING ) // CLDD 215
+GAME( 200?, sc4dndcse ,sc4dndcs, sc4, sc4dndcs5, sc4_state, sc4dndcs, ROT0, "BFM","Deal Or No Deal Classic (Bellfruit) (Scorpion 4) (CLDD215, set 2)", GAME_NOT_WORKING ) // CLDD 215
static const stepper_interface* sc4dndbb_reel_configs[6] =
{
@@ -30047,16 +30047,16 @@ INPUT_PORTS_END
// PR3229 AWP DEAL OR NO DEAL BREAK THE BANK SCORP4 PR3209 BREAK THE BANK SOUNDS11
-GAME( 200?, sc4dndbb ,0, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE471, set 1)", GAME_NOT_WORKING ) // CRBE 471
-GAME( 200?, sc4dndbbb ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE471, set 2)", GAME_NOT_WORKING ) // CRBE 471
-GAME( 200?, sc4dndbba ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE472, set 1)", GAME_NOT_WORKING ) // CRBE 472
-GAME( 200?, sc4dndbbc ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE472, set 2)", GAME_NOT_WORKING ) // CRBE 472
-GAME( 200?, sc4dndbbd ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE473, set 1)", GAME_NOT_WORKING ) // CRBE 473
-GAME( 200?, sc4dndbbg ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE473, set 2)", GAME_NOT_WORKING ) // CRBE 473
-GAME( 200?, sc4dndbbe ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE571, set 1)", GAME_NOT_WORKING ) // CRBE 571
-GAME( 200?, sc4dndbbh ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE571, set 2)", GAME_NOT_WORKING ) // CRBE 571
-GAME( 200?, sc4dndbbf ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE572, set 1)", GAME_NOT_WORKING ) // CRBE 572
-GAME( 200?, sc4dndbbi ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE572, set 2)", GAME_NOT_WORKING )// CRBE 572
+GAME( 200?, sc4dndbb ,0, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE471, set 1)", GAME_NOT_WORKING ) // CRBE 471
+GAME( 200?, sc4dndbbb ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE471, set 2)", GAME_NOT_WORKING ) // CRBE 471
+GAME( 200?, sc4dndbba ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE472, set 1)", GAME_NOT_WORKING ) // CRBE 472
+GAME( 200?, sc4dndbbc ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE472, set 2)", GAME_NOT_WORKING ) // CRBE 472
+GAME( 200?, sc4dndbbd ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE473, set 1)", GAME_NOT_WORKING ) // CRBE 473
+GAME( 200?, sc4dndbbg ,sc4dndbb, sc4, sc4dndbb35, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE473, set 2)", GAME_NOT_WORKING ) // CRBE 473
+GAME( 200?, sc4dndbbe ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE571, set 1)", GAME_NOT_WORKING ) // CRBE 571
+GAME( 200?, sc4dndbbh ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE571, set 2)", GAME_NOT_WORKING ) // CRBE 571
+GAME( 200?, sc4dndbbf ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE572, set 1)", GAME_NOT_WORKING ) // CRBE 572
+GAME( 200?, sc4dndbbi ,sc4dndbb, sc4, sc4dndbb70, sc4_state, sc4dndbb, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 4) (CRBE572, set 2)", GAME_NOT_WORKING )// CRBE 572
static const stepper_interface* sc4dndcl_reel_configs[6] =
{
@@ -30089,14 +30089,14 @@ INPUT_PORTS_START( sc4dndcl500 )
INPUT_PORTS_END
// PR1949 CLUB DEAL OR NO DEAL DEAL OR NO DEAL CLUB PR1949 DEAL O N D SOUNDS11
-GAME( 200?, sc4dndclc ,sc4dndcl, sc4, sc4, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL181, set 1)", GAME_NOT_WORKING ) // DNDL 181 CLUB $500 (no key req?)
-GAME( 200?, sc4dndclg ,sc4dndcl, sc4, sc4, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL181, set 2)", GAME_NOT_WORKING ) // DNDL 181 CLUB $500 (no key req?)
-GAME( 200?, sc4dndcla ,sc4dndcl, sc4, sc4dndcl500, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL212, set 1)", GAME_NOT_WORKING ) // DNDL 212 CLUB ?500
-GAME( 200?, sc4dndcle ,sc4dndcl, sc4, sc4dndcl500, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL212, set 2)", GAME_NOT_WORKING ) // DNDL 212 CLUB ?500
-GAME( 200?, sc4dndcl ,0, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL313, set 1)", GAME_NOT_WORKING ) // DNDL 313 CLUB ?250
-GAME( 200?, sc4dndcld ,sc4dndcl, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL313, set 2)", GAME_NOT_WORKING ) // DNDL 313 CLUB ?250
-GAME( 200?, sc4dndclb ,sc4dndcl, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL391, set 1)", GAME_NOT_WORKING ) // DNDL 391 CLUB ?250
-GAME( 200?, sc4dndclf ,sc4dndcl, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL391, set 2)", GAME_NOT_WORKING ) // DNDL 391 CLUB ?250
+GAME( 200?, sc4dndclc ,sc4dndcl, sc4, sc4, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL181, set 1)", GAME_NOT_WORKING ) // DNDL 181 CLUB $500 (no key req?)
+GAME( 200?, sc4dndclg ,sc4dndcl, sc4, sc4, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL181, set 2)", GAME_NOT_WORKING ) // DNDL 181 CLUB $500 (no key req?)
+GAME( 200?, sc4dndcla ,sc4dndcl, sc4, sc4dndcl500, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL212, set 1)", GAME_NOT_WORKING ) // DNDL 212 CLUB ?500
+GAME( 200?, sc4dndcle ,sc4dndcl, sc4, sc4dndcl500, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL212, set 2)", GAME_NOT_WORKING ) // DNDL 212 CLUB ?500
+GAME( 200?, sc4dndcl ,0, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL313, set 1)", GAME_NOT_WORKING ) // DNDL 313 CLUB ?250
+GAME( 200?, sc4dndcld ,sc4dndcl, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL313, set 2)", GAME_NOT_WORKING ) // DNDL 313 CLUB ?250
+GAME( 200?, sc4dndclb ,sc4dndcl, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL391, set 1)", GAME_NOT_WORKING ) // DNDL 391 CLUB ?250
+GAME( 200?, sc4dndclf ,sc4dndcl, sc4, sc4dndcl250, sc4_state, sc4dndcl, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 4) (DNDL391, set 2)", GAME_NOT_WORKING ) // DNDL 391 CLUB ?250
static const stepper_interface* sc4dnddd_reel_configs[6] =
{
@@ -30130,14 +30130,14 @@ INPUT_PORTS_END
// PR3235 AWP DEAL OR NO DEAL DOUBLE S4 PR3215 DOND DOUBLE SOUNDS11 DOUBLE DOND S.SITE
-GAME( 200?, sc4dnddd ,0, sc4, sc4dnddd35, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO471, set 1)", GAME_NOT_WORKING ) // DDNO 471
-GAME( 200?, sc4dndddd ,sc4dnddd, sc4, sc4dnddd35, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO471, set 2)", GAME_NOT_WORKING ) // DDNO 471
-GAME( 200?, sc4dnddda ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO571, set 1)", GAME_NOT_WORKING ) // DDNO 571
-GAME( 200?, sc4dnddde ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO571, set 2)", GAME_NOT_WORKING ) // DDNO 571
-GAME( 200?, sc4dndddb ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO572, set 1)", GAME_NOT_WORKING ) // DDNO 572
-GAME( 200?, sc4dndddf ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO572, set 2)", GAME_NOT_WORKING ) // DDNO 572
-GAME( 200?, sc4dndddc ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO573, set 1)", GAME_NOT_WORKING ) // DDNO 573
-GAME( 200?, sc4dndddg ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO573, set 2)", GAME_NOT_WORKING ) // DDNO 573
+GAME( 200?, sc4dnddd ,0, sc4, sc4dnddd35, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO471, set 1)", GAME_NOT_WORKING ) // DDNO 471
+GAME( 200?, sc4dndddd ,sc4dnddd, sc4, sc4dnddd35, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO471, set 2)", GAME_NOT_WORKING ) // DDNO 471
+GAME( 200?, sc4dnddda ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO571, set 1)", GAME_NOT_WORKING ) // DDNO 571
+GAME( 200?, sc4dnddde ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO571, set 2)", GAME_NOT_WORKING ) // DDNO 571
+GAME( 200?, sc4dndddb ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO572, set 1)", GAME_NOT_WORKING ) // DDNO 572
+GAME( 200?, sc4dndddf ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO572, set 2)", GAME_NOT_WORKING ) // DDNO 572
+GAME( 200?, sc4dndddc ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO573, set 1)", GAME_NOT_WORKING ) // DDNO 573
+GAME( 200?, sc4dndddg ,sc4dnddd, sc4, sc4dnddd70, sc4_state, sc4dnddd, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 4) (DDNO573, set 2)", GAME_NOT_WORKING ) // DDNO 573
static const stepper_interface* sc4dndhf_reel_configs[6] =
{
@@ -30170,19 +30170,19 @@ INPUT_PORTS_START( sc4dndhf70 )
INPUT_PORTS_END
// PR3038 DEAL OR NO DEAL HALL OF FAME SCORP4 PR3008 HALL OF FAME SOUNDS11 HALL OF FAME S.SITE
-GAME( 200?, sc4dndhff ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA471, set 1)", GAME_NOT_WORKING ) // DNHA 471
-GAME( 200?, sc4dndhfh ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA471, set 2)", GAME_NOT_WORKING ) // DNHA 471
-GAME( 200?, sc4dndhfg ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA472, set 1)", GAME_NOT_WORKING ) // DNHA 472
-GAME( 200?, sc4dndhfi ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA472, set 2)", GAME_NOT_WORKING ) // DNHA 472
-GAME( 200?, sc4dndhf ,0, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA473, set 1)", GAME_NOT_WORKING ) // DNHA 473
-GAME( 200?, sc4dndhfa ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA473, set 2)", GAME_NOT_WORKING ) // DNHA 473
-GAME( 200?, sc4dndhfj ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA476)", GAME_NOT_WORKING ) // DNHA 476
-GAME( 200?, sc4dndhfb ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA477, set 1)", GAME_NOT_WORKING ) // DNHA 477
-GAME( 200?, sc4dndhfd ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA477, set 2)", GAME_NOT_WORKING ) // DNHA 477
-GAME( 200?, sc4dndhfc ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA571, set 1)", GAME_NOT_WORKING ) // DNHA 571
-GAME( 200?, sc4dndhfe ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA571, set 2)", GAME_NOT_WORKING ) // DNHA 571
-GAME( 200?, sc4dndhfk ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA572, set 1, bad?)", GAME_NOT_WORKING ) // error 51 (bad rom?)
-GAME( 200?, sc4dndhfl ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA572, set 2, bad?)", GAME_NOT_WORKING ) // error 51 (bad rom?)
+GAME( 200?, sc4dndhff ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA471, set 1)", GAME_NOT_WORKING ) // DNHA 471
+GAME( 200?, sc4dndhfh ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA471, set 2)", GAME_NOT_WORKING ) // DNHA 471
+GAME( 200?, sc4dndhfg ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA472, set 1)", GAME_NOT_WORKING ) // DNHA 472
+GAME( 200?, sc4dndhfi ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA472, set 2)", GAME_NOT_WORKING ) // DNHA 472
+GAME( 200?, sc4dndhf ,0, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA473, set 1)", GAME_NOT_WORKING ) // DNHA 473
+GAME( 200?, sc4dndhfa ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA473, set 2)", GAME_NOT_WORKING ) // DNHA 473
+GAME( 200?, sc4dndhfj ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA476)", GAME_NOT_WORKING ) // DNHA 476
+GAME( 200?, sc4dndhfb ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA477, set 1)", GAME_NOT_WORKING ) // DNHA 477
+GAME( 200?, sc4dndhfd ,sc4dndhf, sc4, sc4dndhf35, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA477, set 2)", GAME_NOT_WORKING ) // DNHA 477
+GAME( 200?, sc4dndhfc ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA571, set 1)", GAME_NOT_WORKING ) // DNHA 571
+GAME( 200?, sc4dndhfe ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA571, set 2)", GAME_NOT_WORKING ) // DNHA 571
+GAME( 200?, sc4dndhfk ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA572, set 1, bad?)", GAME_NOT_WORKING ) // error 51 (bad rom?)
+GAME( 200?, sc4dndhfl ,sc4dndhf, sc4, sc4dndhf70, sc4_state, sc4dndhf, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 4) (DNHA572, set 2, bad?)", GAME_NOT_WORKING ) // error 51 (bad rom?)
static const stepper_interface* sc4dndys_reel_configs[6] =
{
@@ -30217,10 +30217,10 @@ INPUT_PORTS_END
// PR3227 AWP DEAL OR NO DEAL ITS YOUR SHOW SCORP4 PR3207 ITS YOUR SHOW SOUNDS11 ITS YOUR SHOW S.SITE
-GAME( 200?, sc4dndys ,0, sc4, sc4dndys70, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO571, set 1)", GAME_NOT_WORKING ) // DOBO 571
-GAME( 200?, sc4dndysb ,sc4dndys, sc4, sc4dndys70, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO571, set 2)", GAME_NOT_WORKING ) // DOBO 571
-GAME( 200?, sc4dndysa ,sc4dndys, sc4, sc4dndys35, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO474, set 1)", GAME_NOT_WORKING ) // DOBO 474
-GAME( 200?, sc4dndysc ,sc4dndys, sc4, sc4dndys35, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO474, set 2)", GAME_NOT_WORKING ) // DOBO 474
+GAME( 200?, sc4dndys ,0, sc4, sc4dndys70, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO571, set 1)", GAME_NOT_WORKING ) // DOBO 571
+GAME( 200?, sc4dndysb ,sc4dndys, sc4, sc4dndys70, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO571, set 2)", GAME_NOT_WORKING ) // DOBO 571
+GAME( 200?, sc4dndysa ,sc4dndys, sc4, sc4dndys35, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO474, set 1)", GAME_NOT_WORKING ) // DOBO 474
+GAME( 200?, sc4dndysc ,sc4dndys, sc4, sc4dndys35, sc4_state, sc4dndys, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 4) (DOBO474, set 2)", GAME_NOT_WORKING ) // DOBO 474
static const stepper_interface* sc4dndlp_reel_configs[6] =
{
@@ -30248,12 +30248,12 @@ INPUT_PORTS_END
// PR3212 AWP DEAL OR NO DEAL LETS PLAY DEAL OR NO DEAL SCORP4 PR3212 LETS PLAY DOND SOUNDS11 LETS PLAY DOND S.SITE
-GAME( 200?, sc4dndlp ,0, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN571, set 1)", GAME_NOT_WORKING )// LPDN 571
-GAME( 200?, sc4dndlpc ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN571, set 2)", GAME_NOT_WORKING )// LPDN 571
-GAME( 200?, sc4dndlpa ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN572, set 1)", GAME_NOT_WORKING )// LPDN 572
-GAME( 200?, sc4dndlpd ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN572, set 2)", GAME_NOT_WORKING )// LPDN 572
-GAME( 200?, sc4dndlpb ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN573, set 1)", GAME_NOT_WORKING )// LPDN 573
-GAME( 200?, sc4dndlpe ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN573, set 2)", GAME_NOT_WORKING )// LPDN 573
+GAME( 200?, sc4dndlp ,0, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN571, set 1)", GAME_NOT_WORKING )// LPDN 571
+GAME( 200?, sc4dndlpc ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN571, set 2)", GAME_NOT_WORKING )// LPDN 571
+GAME( 200?, sc4dndlpa ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN572, set 1)", GAME_NOT_WORKING )// LPDN 572
+GAME( 200?, sc4dndlpd ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN572, set 2)", GAME_NOT_WORKING )// LPDN 572
+GAME( 200?, sc4dndlpb ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN573, set 1)", GAME_NOT_WORKING )// LPDN 573
+GAME( 200?, sc4dndlpe ,sc4dndlp, sc4, sc4dndlp70, sc4_state, sc4dndlp, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 4) (LPDN573, set 2)", GAME_NOT_WORKING )// LPDN 573
static const stepper_interface* sc4dndra_reel_configs[6] =
{
@@ -30286,12 +30286,12 @@ INPUT_PORTS_START( sc4dndra70 )
INPUT_PORTS_END
// PR3221 AWP DEAL OR NO DEAL RED ALERT SCORP4 PR3201 DOND RED ALERT SOUNDS11 RED ALERT S.SITE
-GAME( 200?, sc4dndra ,0, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT471, set 1)", GAME_NOT_WORKING ) // REDT 471
-GAME( 200?, sc4dndraa ,sc4dndra, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT471, set 2)", GAME_NOT_WORKING ) // REDT 471
-GAME( 200?, sc4dndrab ,sc4dndra, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT474, set 1)", GAME_NOT_WORKING ) // REDT 474
-GAME( 200?, sc4dndrad ,sc4dndra, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT474, set 2)", GAME_NOT_WORKING ) // REDT 474
-GAME( 200?, sc4dndrac ,sc4dndra, sc4, sc4dndra70, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT572, set 1)", GAME_NOT_WORKING ) // REDT 572
-GAME( 200?, sc4dndrae ,sc4dndra, sc4, sc4dndra70, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT572, set 2)", GAME_NOT_WORKING ) // REDT 572
+GAME( 200?, sc4dndra ,0, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT471, set 1)", GAME_NOT_WORKING ) // REDT 471
+GAME( 200?, sc4dndraa ,sc4dndra, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT471, set 2)", GAME_NOT_WORKING ) // REDT 471
+GAME( 200?, sc4dndrab ,sc4dndra, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT474, set 1)", GAME_NOT_WORKING ) // REDT 474
+GAME( 200?, sc4dndrad ,sc4dndra, sc4, sc4dndra35, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT474, set 2)", GAME_NOT_WORKING ) // REDT 474
+GAME( 200?, sc4dndrac ,sc4dndra, sc4, sc4dndra70, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT572, set 1)", GAME_NOT_WORKING ) // REDT 572
+GAME( 200?, sc4dndrae ,sc4dndra, sc4, sc4dndra70, sc4_state, sc4dndra, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 4) (REDT572, set 2)", GAME_NOT_WORKING ) // REDT 572
static const stepper_interface* sc4dndbd_reel_configs[6] =
{
@@ -30325,12 +30325,12 @@ INPUT_PORTS_END
// PR3230 AWP DEAL OR NO DEAL THE BIG DEAL SCORP4 PR3210 THE BIG DEAL SOUNDS11 THE BIG DEAL S.SITE
-GAME( 200?, sc4dndbd ,0, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA471, set 1)", GAME_NOT_WORKING ) // BGDA 471
-GAME( 200?, sc4dndbda ,sc4dndbd, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA471, set 2)", GAME_NOT_WORKING ) // BGDA 471
-GAME( 200?, sc4dndbdb ,sc4dndbd, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA472, set 1)", GAME_NOT_WORKING ) // BGDA 472
-GAME( 200?, sc4dndbdd ,sc4dndbd, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA472, set 2)", GAME_NOT_WORKING ) // BGDA 472
-GAME( 200?, sc4dndbdc ,sc4dndbd, sc4, sc4dndbd70, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA571, set 1)", GAME_NOT_WORKING ) // BGDA 571
-GAME( 200?, sc4dndbde ,sc4dndbd, sc4, sc4dndbd70, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA571, set 2)", GAME_NOT_WORKING ) // BGDA 571
+GAME( 200?, sc4dndbd ,0, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA471, set 1)", GAME_NOT_WORKING ) // BGDA 471
+GAME( 200?, sc4dndbda ,sc4dndbd, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA471, set 2)", GAME_NOT_WORKING ) // BGDA 471
+GAME( 200?, sc4dndbdb ,sc4dndbd, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA472, set 1)", GAME_NOT_WORKING ) // BGDA 472
+GAME( 200?, sc4dndbdd ,sc4dndbd, sc4, sc4dndbd35, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA472, set 2)", GAME_NOT_WORKING ) // BGDA 472
+GAME( 200?, sc4dndbdc ,sc4dndbd, sc4, sc4dndbd70, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA571, set 1)", GAME_NOT_WORKING ) // BGDA 571
+GAME( 200?, sc4dndbde ,sc4dndbd, sc4, sc4dndbd70, sc4_state, sc4dndbd, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 4) (BGDA571, set 2)", GAME_NOT_WORKING ) // BGDA 571
static const stepper_interface* sc4dndbr_reel_configs[6] =
{
@@ -30364,14 +30364,14 @@ INPUT_PORTS_END
// PR3041 AWP DEAL OR NO DEAL THE BIG REDS S4 PR3011 THE BIG REDS SOUNDS11 THE BIG REDS S.SITE
-GAME( 200?, sc4dndbr ,0, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD471, set 1)", GAME_NOT_WORKING ) // BIGD 471
-GAME( 200?, sc4dndbrb ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD471, set 2)", GAME_NOT_WORKING ) // BIGD 471
-GAME( 200?, sc4dndbra ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD472, set 1)", GAME_NOT_WORKING ) // BIGD 472
-GAME( 200?, sc4dndbrc ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD472, set 2)", GAME_NOT_WORKING ) // BIGD 472
-GAME( 200?, sc4dndbrd ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD475, set 1)", GAME_NOT_WORKING ) // BIGD 475
-GAME( 200?, sc4dndbrf ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD475, set 2)", GAME_NOT_WORKING ) // BIGD 475
-GAME( 200?, sc4dndbre ,sc4dndbr, sc4, sc4dndbr70, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD571, set 1)", GAME_NOT_WORKING ) // BIGD 571
-GAME( 200?, sc4dndbrg ,sc4dndbr, sc4, sc4dndbr70, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD571, set 2)", GAME_NOT_WORKING ) // BIGD 571
+GAME( 200?, sc4dndbr ,0, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD471, set 1)", GAME_NOT_WORKING ) // BIGD 471
+GAME( 200?, sc4dndbrb ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD471, set 2)", GAME_NOT_WORKING ) // BIGD 471
+GAME( 200?, sc4dndbra ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD472, set 1)", GAME_NOT_WORKING ) // BIGD 472
+GAME( 200?, sc4dndbrc ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD472, set 2)", GAME_NOT_WORKING ) // BIGD 472
+GAME( 200?, sc4dndbrd ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD475, set 1)", GAME_NOT_WORKING ) // BIGD 475
+GAME( 200?, sc4dndbrf ,sc4dndbr, sc4, sc4dndbr35, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD475, set 2)", GAME_NOT_WORKING ) // BIGD 475
+GAME( 200?, sc4dndbre ,sc4dndbr, sc4, sc4dndbr70, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD571, set 1)", GAME_NOT_WORKING ) // BIGD 571
+GAME( 200?, sc4dndbrg ,sc4dndbr, sc4, sc4dndbr70, sc4_state, sc4dndbr, ROT0, "BFM","Deal Or No Deal The Big Reds (Bellfruit) (Scorpion 4) (BIGD571, set 2)", GAME_NOT_WORKING ) // BIGD 571
static const stepper_interface* sc4dndcc_reel_configs[6] =
{
@@ -30405,13 +30405,13 @@ INPUT_PORTS_END
// PR3047 AWP DEAL OR NO DEAL THE CRAZY CHAIR SCORP4 PR3017 CRAZY CHAIR SOUNDS11 CRAZY CHAIR S.SITE
-GAME( 200?, sc4dndcc ,0, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR471, set 1)", GAME_NOT_WORKING ) // CRZR 471
-GAME( 200?, sc4dndccb ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR471, set 2)", GAME_NOT_WORKING ) // CRZR 471, incomplete pairing
-GAME( 200?, sc4dndcca ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR474)", GAME_NOT_WORKING ) // CRZR 474
-GAME( 200?, sc4dndccc ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR475, set 1)", GAME_NOT_WORKING ) // CRZR 475
-GAME( 200?, sc4dndcce ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR475, set 2)", GAME_NOT_WORKING ) // CRZR 475
-GAME( 200?, sc4dndccd ,sc4dndcc, sc4, sc4dndcc70, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR571, set 1)", GAME_NOT_WORKING ) // CRZR 571
-GAME( 200?, sc4dndccf ,sc4dndcc, sc4, sc4dndcc70, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR571, set 2)", GAME_NOT_WORKING ) // CRZR 571
+GAME( 200?, sc4dndcc ,0, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR471, set 1)", GAME_NOT_WORKING ) // CRZR 471
+GAME( 200?, sc4dndccb ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR471, set 2)", GAME_NOT_WORKING ) // CRZR 471, incomplete pairing
+GAME( 200?, sc4dndcca ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR474)", GAME_NOT_WORKING ) // CRZR 474
+GAME( 200?, sc4dndccc ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR475, set 1)", GAME_NOT_WORKING ) // CRZR 475
+GAME( 200?, sc4dndcce ,sc4dndcc, sc4, sc4dndcc35, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR475, set 2)", GAME_NOT_WORKING ) // CRZR 475
+GAME( 200?, sc4dndccd ,sc4dndcc, sc4, sc4dndcc70, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR571, set 1)", GAME_NOT_WORKING ) // CRZR 571
+GAME( 200?, sc4dndccf ,sc4dndcc, sc4, sc4dndcc70, sc4_state, sc4dndcc, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 4) (CRZR571, set 2)", GAME_NOT_WORKING ) // CRZR 571
static const stepper_interface* sc4dnddw_reel_configs[6] =
{
@@ -30444,14 +30444,14 @@ INPUT_PORTS_START( sc4dnddw70 )
INPUT_PORTS_END
// PR3043 AWP THE DEAL WHEEL S4 PR3202 THE DEAL WHEEL SOUNDS11 THE DEAL WHEEL S.SITE
-GAME( 200?, sc4dnddw ,0, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN471, set 1)", GAME_NOT_WORKING ) // DOFN 471
-GAME( 200?, sc4dnddwb ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN471, set 2)", GAME_NOT_WORKING ) // DOFN 471
-GAME( 200?, sc4dnddwa ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN473, set 1)", GAME_NOT_WORKING ) // DOFN 473
-GAME( 200?, sc4dnddwc ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN473, set 2)", GAME_NOT_WORKING ) // DOFN 473
-GAME( 200?, sc4dnddwd ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN475, set 1)", GAME_NOT_WORKING ) // DOFN 475
-GAME( 200?, sc4dnddwf ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN475, set 2)", GAME_NOT_WORKING ) // DOFN 475
-GAME( 200?, sc4dnddwe ,sc4dnddw, sc4, sc4dnddw70, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN572, set 1)", GAME_NOT_WORKING ) // DOFN 572
-GAME( 200?, sc4dnddwg ,sc4dnddw, sc4, sc4dnddw70, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN572, set 2)", GAME_NOT_WORKING ) // DOFN 572
+GAME( 200?, sc4dnddw ,0, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN471, set 1)", GAME_NOT_WORKING ) // DOFN 471
+GAME( 200?, sc4dnddwb ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN471, set 2)", GAME_NOT_WORKING ) // DOFN 471
+GAME( 200?, sc4dnddwa ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN473, set 1)", GAME_NOT_WORKING ) // DOFN 473
+GAME( 200?, sc4dnddwc ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN473, set 2)", GAME_NOT_WORKING ) // DOFN 473
+GAME( 200?, sc4dnddwd ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN475, set 1)", GAME_NOT_WORKING ) // DOFN 475
+GAME( 200?, sc4dnddwf ,sc4dnddw, sc4, sc4dnddw35, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN475, set 2)", GAME_NOT_WORKING ) // DOFN 475
+GAME( 200?, sc4dnddwe ,sc4dnddw, sc4, sc4dnddw70, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN572, set 1)", GAME_NOT_WORKING ) // DOFN 572
+GAME( 200?, sc4dnddwg ,sc4dnddw, sc4, sc4dnddw70, sc4_state, sc4dnddw, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 4) (DOFN572, set 2)", GAME_NOT_WORKING ) // DOFN 572
static const stepper_interface* sc4dnddf_reel_configs[6] =
{
@@ -30484,12 +30484,12 @@ INPUT_PORTS_START( sc4dnddf70 )
INPUT_PORTS_END
// PR3044 AWP DEAL OR NO DEAL THE DREAM FACTORY SCORP4 PR3014 DREAM FACTORY SOUNDS11 DREAM FACTORY S.SITE
-GAME( 200?, sc4dnddf ,0, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC471, set 1)", GAME_NOT_WORKING ) // TDFC 471
-GAME( 200?, sc4dnddfa ,sc4dnddf, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC471, set 2)", GAME_NOT_WORKING ) // TDFC 471, incomplete pairing
-GAME( 200?, sc4dnddfb ,sc4dnddf, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC475, set 1)", GAME_NOT_WORKING ) // TDFC 475
-GAME( 200?, sc4dnddfd ,sc4dnddf, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC475, set 2)", GAME_NOT_WORKING ) // TDFC 475
-GAME( 200?, sc4dnddfc ,sc4dnddf, sc4, sc4dnddf70, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC571, set 1)", GAME_NOT_WORKING ) // TDFC 571
-GAME( 200?, sc4dnddfe ,sc4dnddf, sc4, sc4dnddf70, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC571, set 2)", GAME_NOT_WORKING ) // TDFC 571
+GAME( 200?, sc4dnddf ,0, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC471, set 1)", GAME_NOT_WORKING ) // TDFC 471
+GAME( 200?, sc4dnddfa ,sc4dnddf, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC471, set 2)", GAME_NOT_WORKING ) // TDFC 471, incomplete pairing
+GAME( 200?, sc4dnddfb ,sc4dnddf, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC475, set 1)", GAME_NOT_WORKING ) // TDFC 475
+GAME( 200?, sc4dnddfd ,sc4dnddf, sc4, sc4dnddf35, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC475, set 2)", GAME_NOT_WORKING ) // TDFC 475
+GAME( 200?, sc4dnddfc ,sc4dnddf, sc4, sc4dnddf70, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC571, set 1)", GAME_NOT_WORKING ) // TDFC 571
+GAME( 200?, sc4dnddfe ,sc4dnddf, sc4, sc4dnddf70, sc4_state, sc4dnddf, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 4) (TDFC571, set 2)", GAME_NOT_WORKING ) // TDFC 571
static const stepper_interface* sc4dndpg_reel_configs[6] =
{
@@ -30523,12 +30523,12 @@ INPUT_PORTS_END
// PR3240 AWP DEAL OR NO DEAL THE PERFECT GAME SCORP4 PR3220 DOND PERFECT SOUNDS11 THE PERFECT GAME S.SITE
-GAME( 200?, sc4dndpg ,0, sc4, sc4dndpg35, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG471, set 1)", GAME_NOT_WORKING ) // TPGB 471
-GAME( 200?, sc4dndpgc ,sc4dndpg, sc4, sc4dndpg35, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG471, set 2)", GAME_NOT_WORKING ) // TPBG 471
-GAME( 200?, sc4dndpga ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG571, set 1)", GAME_NOT_WORKING ) // TPGB 571
-GAME( 200?, sc4dndpgd ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPGB571, set 2)", GAME_NOT_WORKING ) // TPGB 571
-GAME( 200?, sc4dndpgb ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG572, set 1)", GAME_NOT_WORKING ) // TPGB 572
-GAME( 200?, sc4dndpge ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPGB572, set 2)", GAME_NOT_WORKING ) // TPGB 572
+GAME( 200?, sc4dndpg ,0, sc4, sc4dndpg35, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG471, set 1)", GAME_NOT_WORKING ) // TPGB 471
+GAME( 200?, sc4dndpgc ,sc4dndpg, sc4, sc4dndpg35, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG471, set 2)", GAME_NOT_WORKING ) // TPBG 471
+GAME( 200?, sc4dndpga ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG571, set 1)", GAME_NOT_WORKING ) // TPGB 571
+GAME( 200?, sc4dndpgd ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPGB571, set 2)", GAME_NOT_WORKING ) // TPGB 571
+GAME( 200?, sc4dndpgb ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPBG572, set 1)", GAME_NOT_WORKING ) // TPGB 572
+GAME( 200?, sc4dndpge ,sc4dndpg, sc4, sc4dndpg70, sc4_state, sc4dndpg, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 4) (TPGB572, set 2)", GAME_NOT_WORKING ) // TPGB 572
static const stepper_interface* sc4dndtp_reel_configs[6] =
{
@@ -30554,20 +30554,20 @@ INPUT_PORTS_START( sc4dndtp35 )
INPUT_PORTS_END
// PR3033 AWP DOND THE POWER 5 SCORP4 PR3033 POWER FIVE SOUNDS11 DOND THE POWER 5 S.SITE
-GAME( 200?, sc4dndtp ,0, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV411, set 1)", GAME_NOT_WORKING ) // TPRV 411
-GAME( 200?, sc4dndtpe ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV411, set 2)", GAME_NOT_WORKING ) // TPRV 411
-GAME( 200?, sc4dndtpa ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV412, set 1)", GAME_NOT_WORKING ) // TPRV 412
-GAME( 200?, sc4dndtpf ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV412, set 2)", GAME_NOT_WORKING ) // TPRV 412
-GAME( 200?, sc4dndtpb ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV413, set 1)", GAME_NOT_WORKING ) // TPRV 413
-GAME( 200?, sc4dndtpg ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV413, set 2)", GAME_NOT_WORKING ) // TPRV 413
-GAME( 200?, sc4dndtpc ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV414, set 1, bad)", GAME_NOT_WORKING ) // TPRV 414 EEPROM error (bad rom?) (botched release?)
-GAME( 200?, sc4dndtph ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV414, set 2, bad)", GAME_NOT_WORKING ) // TPRV 414 EEPROM error (bad rom?) (botched release?)
-GAME( 200?, sc4dndtpd ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV415, set 1)", GAME_NOT_WORKING ) // TPRV 415
-GAME( 200?, sc4dndtpi ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV415, set 2)", GAME_NOT_WORKING )// TPRV 415
-GAME( 200?, sc4dndtpl ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV416, set 1)", GAME_NOT_WORKING )// TPRV 416
-GAME( 200?, sc4dndtpm ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV416, set 2)", GAME_NOT_WORKING )// TPRV 416
-GAME( 200?, sc4dndtpj ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV41A, set 1)", GAME_NOT_WORKING )// TPRV 41A
-GAME( 200?, sc4dndtpk ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV41A, set 2)", GAME_NOT_WORKING )// TPRV 41A
+GAME( 200?, sc4dndtp ,0, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV411, set 1)", GAME_NOT_WORKING ) // TPRV 411
+GAME( 200?, sc4dndtpe ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV411, set 2)", GAME_NOT_WORKING ) // TPRV 411
+GAME( 200?, sc4dndtpa ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV412, set 1)", GAME_NOT_WORKING ) // TPRV 412
+GAME( 200?, sc4dndtpf ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV412, set 2)", GAME_NOT_WORKING ) // TPRV 412
+GAME( 200?, sc4dndtpb ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV413, set 1)", GAME_NOT_WORKING ) // TPRV 413
+GAME( 200?, sc4dndtpg ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV413, set 2)", GAME_NOT_WORKING ) // TPRV 413
+GAME( 200?, sc4dndtpc ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV414, set 1, bad)", GAME_NOT_WORKING ) // TPRV 414 EEPROM error (bad rom?) (botched release?)
+GAME( 200?, sc4dndtph ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV414, set 2, bad)", GAME_NOT_WORKING ) // TPRV 414 EEPROM error (bad rom?) (botched release?)
+GAME( 200?, sc4dndtpd ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV415, set 1)", GAME_NOT_WORKING ) // TPRV 415
+GAME( 200?, sc4dndtpi ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV415, set 2)", GAME_NOT_WORKING )// TPRV 415
+GAME( 200?, sc4dndtpl ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV416, set 1)", GAME_NOT_WORKING )// TPRV 416
+GAME( 200?, sc4dndtpm ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV416, set 2)", GAME_NOT_WORKING )// TPRV 416
+GAME( 200?, sc4dndtpj ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV41A, set 1)", GAME_NOT_WORKING )// TPRV 41A
+GAME( 200?, sc4dndtpk ,sc4dndtp, sc4, sc4dndtp35, sc4_state, sc4dndtp, ROT0, "BFM","Deal Or No Deal The Power 5 (Bellfruit) (Scorpion 4) (TPRV41A, set 2)", GAME_NOT_WORKING )// TPRV 41A
static const stepper_interface* sc4dndww_reel_configs[6] =
@@ -30595,12 +30595,12 @@ INPUT_PORTS_END
// PR3006 AWP DEAL OR NO DEAL THE WALK OF WEALTH SCORP4 PR3006 WALK OF WEALTH SOUNDS11 WALK OF WEALTH S.SITE
-GAME( 200?, sc4dndww ,0, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH411, set 1)", GAME_NOT_WORKING ) // TWOH 411
-GAME( 200?, sc4dndwwb ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH411, set 2)", GAME_NOT_WORKING ) // TWOH 411
-GAME( 200?, sc4dndwwa ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH412, set 1)", GAME_NOT_WORKING ) // TWOH 412
-GAME( 200?, sc4dndwwe ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH412, set 2)", GAME_NOT_WORKING ) // TWOH 412
-GAME( 200?, sc4dndwwc ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH415, set 1)", GAME_NOT_WORKING ) // TWOH 415
-GAME( 200?, sc4dndwwd ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH415, set 2)", GAME_NOT_WORKING ) // TWOH 415
+GAME( 200?, sc4dndww ,0, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH411, set 1)", GAME_NOT_WORKING ) // TWOH 411
+GAME( 200?, sc4dndwwb ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH411, set 2)", GAME_NOT_WORKING ) // TWOH 411
+GAME( 200?, sc4dndwwa ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH412, set 1)", GAME_NOT_WORKING ) // TWOH 412
+GAME( 200?, sc4dndwwe ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH412, set 2)", GAME_NOT_WORKING ) // TWOH 412
+GAME( 200?, sc4dndwwc ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH415, set 1)", GAME_NOT_WORKING ) // TWOH 415
+GAME( 200?, sc4dndwwd ,sc4dndww, sc4, sc4dndww35, sc4_state, sc4dndww, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 4) (TWOH415, set 2)", GAME_NOT_WORKING ) // TWOH 415
static const stepper_interface* sc4dndcw_reel_configs[6] =
{
@@ -30627,10 +30627,10 @@ INPUT_PORTS_END
// PR3027 AWP CLASSIC DEAL OR NO DEAL THE WALK OF WEALTH SCORP4 PR3006 WALK OF WEALTH SOUNDS11 WALK OF WEALTH S.SITE
-GAME( 200?, sc4dndcw ,0, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH271, set 1)", GAME_NOT_WORKING ) // CWOH 271
-GAME( 200?, sc4dndcwb ,sc4dndcw, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH271, set 2)", GAME_NOT_WORKING ) // CWOH 271
-GAME( 200?, sc4dndcwa ,sc4dndcw, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH272, set 1)", GAME_NOT_WORKING ) // CWOH 272
-GAME( 200?, sc4dndcwc ,sc4dndcw, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH272, set 2)", GAME_NOT_WORKING ) // CWOH 272
+GAME( 200?, sc4dndcw ,0, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH271, set 1)", GAME_NOT_WORKING ) // CWOH 271
+GAME( 200?, sc4dndcwb ,sc4dndcw, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH271, set 2)", GAME_NOT_WORKING ) // CWOH 271
+GAME( 200?, sc4dndcwa ,sc4dndcw, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH272, set 1)", GAME_NOT_WORKING ) // CWOH 272
+GAME( 200?, sc4dndcwc ,sc4dndcw, sc4, sc4dndcw5, sc4_state, sc4dndcw, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 4) (CWOH272, set 2)", GAME_NOT_WORKING ) // CWOH 272
static const stepper_interface* sc4dndtr_reel_configs[6] =
{
@@ -30657,8 +30657,8 @@ INPUT_PORTS_END
// PR3329 DOND THINK RED S4 PR3304 THINK RED SOUNDS11 THINK RED S.SITE
-GAME( 200?, sc4dndtr ,0, sc4, sc4dndtr70, sc4_state, sc4dndtr, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 4) (THRE571, set 1)", GAME_NOT_WORKING ) // THRE 571
-GAME( 200?, sc4dndtra ,sc4dndtr, sc4, sc4dndtr70, sc4_state, sc4dndtr, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 4) (THRE571, set 2)", GAME_NOT_WORKING ) // THRE 571
+GAME( 200?, sc4dndtr ,0, sc4, sc4dndtr70, sc4_state, sc4dndtr, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 4) (THRE571, set 1)", GAME_NOT_WORKING ) // THRE 571
+GAME( 200?, sc4dndtra ,sc4dndtr, sc4, sc4dndtr70, sc4_state, sc4dndtr, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 4) (THRE571, set 2)", GAME_NOT_WORKING ) // THRE 571
static const stepper_interface* sc4dndwb_reel_configs[6] =
{
@@ -30684,14 +30684,14 @@ INPUT_PORTS_START( sc4dndwb35 )
INPUT_PORTS_END
// PR1982 AWP DEAL OR NO DEAL WHATS IN YOUR BOX SCORP4 PR1962 WHATS IN Y BOX SOUNDS11 WHATS IN YOUR BX S.SITE
-GAME( 200?, sc4dndwb ,0, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX412, set 1)", GAME_NOT_WORKING ) // WIYX 412
-GAME( 200?, sc4dndwbb ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX412, set 2)", GAME_NOT_WORKING ) // WIYX 412
-GAME( 200?, sc4dndwba ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX414, set 1)", GAME_NOT_WORKING ) // WIYX 414
-GAME( 200?, sc4dndwbc ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX414, set 2)", GAME_NOT_WORKING ) // WIYX 414
-GAME( 200?, sc4dndwbd ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX415, set 1)", GAME_NOT_WORKING ) // WIYX 415
-GAME( 200?, sc4dndwbe ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX415, set 2)", GAME_NOT_WORKING ) // WIYX 415
-GAME( 200?, sc4dndwbf ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX419, set 1)", GAME_NOT_WORKING ) // WIYX 419
-GAME( 200?, sc4dndwbg ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX419, set 2)", GAME_NOT_WORKING ) // WIYX 419
+GAME( 200?, sc4dndwb ,0, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX412, set 1)", GAME_NOT_WORKING ) // WIYX 412
+GAME( 200?, sc4dndwbb ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX412, set 2)", GAME_NOT_WORKING ) // WIYX 412
+GAME( 200?, sc4dndwba ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX414, set 1)", GAME_NOT_WORKING ) // WIYX 414
+GAME( 200?, sc4dndwbc ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX414, set 2)", GAME_NOT_WORKING ) // WIYX 414
+GAME( 200?, sc4dndwbd ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX415, set 1)", GAME_NOT_WORKING ) // WIYX 415
+GAME( 200?, sc4dndwbe ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX415, set 2)", GAME_NOT_WORKING ) // WIYX 415
+GAME( 200?, sc4dndwbf ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX419, set 1)", GAME_NOT_WORKING ) // WIYX 419
+GAME( 200?, sc4dndwbg ,sc4dndwb, sc4, sc4dndwb35, sc4_state, sc4dndwb, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 4) (WIYX419, set 2)", GAME_NOT_WORKING ) // WIYX 419
static const stepper_interface* sc4dndbe_reel_configs[6] =
{
@@ -30724,20 +30724,20 @@ INPUT_PORTS_START( sc4dndbe35 )
INPUT_PORTS_END
// PR1935 AWP DEAL OR NO DEAL BEAT THE BANKER S4 PR1915 BEAT THE BANKER SOUNDS11 BEAT THE BANKER S.SITE
-GAME( 200?, sc4dndbe ,0, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK012, set 1)", GAME_NOT_WORKING ) // DBTK 012
-GAME( 200?, sc4dndbec ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK012, set 2)", GAME_NOT_WORKING ) // DBTK 012
-GAME( 200?, sc4dndbeg ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK013, set 1)", GAME_NOT_WORKING ) // DBTK 013
-GAME( 200?, sc4dndbek ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK013, set 2)", GAME_NOT_WORKING ) // DBTK 013
-GAME( 200?, sc4dndbeh ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK014, set 1)", GAME_NOT_WORKING ) // DBTK 014
-GAME( 200?, sc4dndbel ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK014, set 2)", GAME_NOT_WORKING ) // DBTK 014
-GAME( 200?, sc4dndbeb ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK422, set 1)", GAME_NOT_WORKING ) // DBTK 422
-GAME( 200?, sc4dndbed ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK422, set 2)", GAME_NOT_WORKING ) // DBTK 422
-GAME( 200?, sc4dndbee ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK423, set 1)", GAME_NOT_WORKING ) // DBTK 423
-GAME( 200?, sc4dndbei ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK423, set 2)", GAME_NOT_WORKING ) // DBTK 423
-GAME( 200?, sc4dndbef ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK425, set 1)", GAME_NOT_WORKING ) // DBTK 425
-GAME( 200?, sc4dndbej ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK425, set 2)", GAME_NOT_WORKING ) // DBTK 425
-GAME( 200?, sc4dndbem ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK426, set 1)", GAME_NOT_WORKING ) // DBTK 426
-GAME( 200?, sc4dndben ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK426, set 2)", GAME_NOT_WORKING ) // DBTK 426
+GAME( 200?, sc4dndbe ,0, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK012, set 1)", GAME_NOT_WORKING ) // DBTK 012
+GAME( 200?, sc4dndbec ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK012, set 2)", GAME_NOT_WORKING ) // DBTK 012
+GAME( 200?, sc4dndbeg ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK013, set 1)", GAME_NOT_WORKING ) // DBTK 013
+GAME( 200?, sc4dndbek ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK013, set 2)", GAME_NOT_WORKING ) // DBTK 013
+GAME( 200?, sc4dndbeh ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK014, set 1)", GAME_NOT_WORKING ) // DBTK 014
+GAME( 200?, sc4dndbel ,sc4dndbe, sc4, sc4dndbe25, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK014, set 2)", GAME_NOT_WORKING ) // DBTK 014
+GAME( 200?, sc4dndbeb ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK422, set 1)", GAME_NOT_WORKING ) // DBTK 422
+GAME( 200?, sc4dndbed ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK422, set 2)", GAME_NOT_WORKING ) // DBTK 422
+GAME( 200?, sc4dndbee ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK423, set 1)", GAME_NOT_WORKING ) // DBTK 423
+GAME( 200?, sc4dndbei ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK423, set 2)", GAME_NOT_WORKING ) // DBTK 423
+GAME( 200?, sc4dndbef ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK425, set 1)", GAME_NOT_WORKING ) // DBTK 425
+GAME( 200?, sc4dndbej ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK425, set 2)", GAME_NOT_WORKING ) // DBTK 425
+GAME( 200?, sc4dndbem ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK426, set 1)", GAME_NOT_WORKING ) // DBTK 426
+GAME( 200?, sc4dndben ,sc4dndbe, sc4, sc4dndbe35, sc4_state, sc4dndbe, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 4) (DBTK426, set 2)", GAME_NOT_WORKING ) // DBTK 426
static const stepper_interface* sc4dndbc_reel_configs[6] =
{
@@ -30764,8 +30764,8 @@ INPUT_PORTS_END
// PR3337 AWP DEAL OR NO DEAL BOX CLEVER SCORP4 PR3312 DOND BOXCLEVER SOUNDS11 BOX CLEVER S.SITE
-GAME( 200?, sc4dndbc ,0, sc4, sc4dndbc70, sc4_state, sc4dndbc, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 4) (BOXR571, set 1)", GAME_NOT_WORKING ) // BOXR 571
-GAME( 200?, sc4dndbca ,sc4dndbc, sc4, sc4dndbc70, sc4_state, sc4dndbc, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 4) (BOXR571, set 2)", GAME_NOT_WORKING ) // BOXR 571
+GAME( 200?, sc4dndbc ,0, sc4, sc4dndbc70, sc4_state, sc4dndbc, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 4) (BOXR571, set 1)", GAME_NOT_WORKING ) // BOXR 571
+GAME( 200?, sc4dndbca ,sc4dndbc, sc4, sc4dndbc70, sc4_state, sc4dndbc, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 4) (BOXR571, set 2)", GAME_NOT_WORKING ) // BOXR 571
static const stepper_interface* sc4dmine_reel_configs[6] =
{
@@ -30785,12 +30785,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4dmine)
// PR1307 AWP DIAMOND MINE PR1307 DIAM MINE SOUNDS11
-GAME( 200?, sc4dmine ,0, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dminea ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4dmineb ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4dminec ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4dmined ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4dminee ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4dmine ,0, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dminea ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dmineb ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4dminec ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4dmined ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4dminee ,sc4dmine, sc4, sc4, sc4_state, sc4dmine, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4ddosh_reel_configs[6] =
@@ -30817,33 +30817,33 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ddosh_mbus)
// saw a crash on exit with this game, why?
// PR1309 AWP DOCTOR DOSH PR1309 DOCTOR DOSH SOUNDS11
-GAME( 200?, sc4ddosh ,0, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddosha ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshb ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshc ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshd ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshe ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshl ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshm ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshn ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddosho ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddosh ,0, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddosha ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshb ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshc ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshd ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshe ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshl ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshm ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshn ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddosho ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// PR1309 AWP DOCTOR DOSH PR1309 DOCTOR DOSH SOUNDS11 DOCTOR DOSH S.SITE
-GAME( 200?, sc4ddoshf ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshg ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshh ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshi ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshj ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4ddoshk ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshf ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshg ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshh ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshi ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshj ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4ddoshk ,sc4ddosh, sc4, sc4, sc4_state, sc4ddosh_mbus, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
// board positions & steppa feature don't light anything, investigate (might only be a problem in demo mode?)
// PR1736 AWP DOUGH HO HO S4 PR1716 DOUGH HO HO SOUNDS11 DOUGH HO HO S.SITE
-GAME( 200?, sc4dhh ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dhha ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4dhhb ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4dhhc ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4dhhd ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4dhhe ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4dhh ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dhha ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dhhb ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4dhhc ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4dhhd ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4dhhe ,sc4dhh, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4dough_reel_configs[6] =
{
@@ -30862,8 +30862,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4dough)
}
// PR1615 AWP DOUGH SELECTA SCORP4 PR1615 DOUGH SELECTA SOUNDS11 DOUGH SELECTA S.SITE
-GAME( 200?, sc4dough ,0, sc4, sc4, sc4_state, sc4dough, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dougha ,sc4dough, sc4, sc4, sc4_state, sc4dough, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dough ,0, sc4, sc4, sc4_state, sc4dough, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dougha ,sc4dough, sc4, sc4, sc4_state, sc4dough, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4emmer_reel_configs[6] =
{
@@ -30883,10 +30883,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4emmer)
// PR2313 EMMERDALE EMMR SOUNDS EMMERDALE
-GAME( 200?, sc4emmer ,0, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4emmera ,sc4emmer, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4emmerb ,sc4emmer, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4emmerc ,sc4emmer, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4emmer ,0, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4emmera ,sc4emmer, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4emmerb ,sc4emmer, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4emmerc ,sc4emmer, sc4, sc4, sc4_state, sc4emmer, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4evol_reel_configs[6] =
@@ -30906,14 +30906,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4evol)
}
// PR2135 EVOLUTION EVOL SOUNDS EVOLUTION
-GAME( 200?, sc4evol ,0, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4evola ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4evolb ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4evolc ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4evold ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4evole ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4evolf ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4evolg ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4evol ,0, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4evola ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4evolb ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4evolc ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4evold ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4evole ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4evolf ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4evolg ,sc4evol, sc4, sc4, sc4_state, sc4evol, ROT0, "Qps","Evolution (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4fguy_reel_configs[6] =
{
@@ -30946,12 +30946,12 @@ INPUT_PORTS_START( sc4fguy70 )
INPUT_PORTS_END
// PR3233 AWP FAMILY GUY S4 PR3213 FAMILY GUY SOUNDS11 FAMILY GUY S.SITE
-GAME( 200?, sc4fguy ,0, sc4, sc4fguy35, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // FAMY 471
-GAME( 200?, sc4fguyb ,sc4fguy, sc4, sc4fguy35, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // FAMY 471
-GAME( 200?, sc4fguya ,sc4fguy, sc4, sc4fguy70, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // FAMY 572
-GAME( 200?, sc4fguyc ,sc4fguy, sc4, sc4fguy70, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // FAMY 572
-GAME( 200?, sc4fguyd ,sc4fguy, sc4, sc4, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4fguye ,sc4fguy, sc4, sc4, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4fguy ,0, sc4, sc4fguy35, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // FAMY 471
+GAME( 200?, sc4fguyb ,sc4fguy, sc4, sc4fguy35, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // FAMY 471
+GAME( 200?, sc4fguya ,sc4fguy, sc4, sc4fguy70, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // FAMY 572
+GAME( 200?, sc4fguyc ,sc4fguy, sc4, sc4fguy70, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // FAMY 572
+GAME( 200?, sc4fguyd ,sc4fguy, sc4, sc4, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4fguye ,sc4fguy, sc4, sc4, sc4_state, sc4fguy, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4fbspn_reel_configs[6] =
{
@@ -30970,10 +30970,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fbspn)
}
// PR1721 AWP FAT BOY SPIN SCORP4 PR1701 FAT BOY SPIN SOUNDS11 FAT BOY SPIN S.SITE
-GAME( 200?, sc4fbspn ,0, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fbspna ,sc4fbspn, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fbspnb ,sc4fbspn, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fbspnc ,sc4fbspn, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fbspn ,0, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fbspna ,sc4fbspn, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fbspnb ,sc4fbspn, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fbspnc ,sc4fbspn, sc4, sc4, sc4_state, sc4fbspn, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4fmj_reel_configs[6] =
@@ -30993,10 +30993,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fmj)
}
// PR2328 FULL METAL JACKPOT FULLM SOUNDS F METAL JACKPOT
-GAME( 200?, sc4fmj ,0, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fmja ,sc4fmj, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fmjb ,sc4fmj, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4fmjc ,sc4fmj, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4fmj ,0, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fmja ,sc4fmj, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fmjb ,sc4fmj, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fmjc ,sc4fmj, sc4, sc4, sc4_state, sc4fmj, ROT0, "QPS / Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4gd_reel_configs[6] =
@@ -31016,14 +31016,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gd)
}
// PR1016 GOLD DIGGER PR1016 GOLD DIGGER SOUNDS11
-GAME( 200?, sc4gd ,0, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gda ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdb ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdc ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdd ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gde ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdf ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdg ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4gd ,0, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gda ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdb ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdc ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdd ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gde ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdf ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdg ,sc4gd, sc4, sc4, sc4_state, sc4gd, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4gdclb_reel_configs[6] =
{
@@ -31043,18 +31043,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gdclb)
// PR1137 CLUB GOLD DIGGER PR1137 GOLDD CL SOUNDS11
-GAME( 200?, sc4gdclb ,0, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclba ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbb ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbc ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbd ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbe ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbf ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbg ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbh ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbi ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbj ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4gdclbk ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclb ,0, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclba ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbb ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbc ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbd ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbe ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbf ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbg ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbh ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbi ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbj ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4gdclbk ,sc4gdclb, sc4, sc4, sc4_state, sc4gdclb, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
static const stepper_interface* sc4gbcas_reel_configs[6] =
{
@@ -31074,10 +31074,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gbcas)
// this one is a variation of lucky balls
// PR1034 CASINO GOLDEN BALLS PR1034 GOLDEN BALLS SOUNDS11
-GAME( 200?, sc4gbcas ,0, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gbcasa ,sc4gbcas, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gbcasb ,sc4gbcas, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gbcasc ,sc4gbcas, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gbcas ,0, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gbcasa ,sc4gbcas, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gbcasb ,sc4gbcas, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gbcasc ,sc4gbcas, sc4, sc4, sc4_state, sc4gbcas, ROT0, "BFM","Casino Golden Balls (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4gball_reel_configs[6] =
@@ -31098,10 +31098,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gball)
// this is a football themed game...
// PR1604 AWP GOLDEN BALLS PR1604 GOLDEN BALLS SOUNDS12 GOLDEN BALLS S.SITE
-GAME( 200?, sc4gball ,0, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gballa ,sc4gball, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gballb ,sc4gball, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gballc ,sc4gball, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gball ,0, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gballa ,sc4gball, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gballb ,sc4gball, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gballc ,sc4gball, sc4, sc4, sc4_state, sc4gball, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4gunp_reel_configs[6] =
{
@@ -31120,14 +31120,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4gunp)
}
// PR3046 AWP THE GUNPOWDER SLOT S4 PR3016 GUNPOWDER SLOT SOUNDS11 GUNPOWDER SLOT S.SITE
-GAME( 200?, sc4gunp ,0, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gunpa ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gunpb ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gunpc ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gunpd ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gunpe ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gunpf ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4gunpg ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunp ,0, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunpa ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunpb ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunpc ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunpd ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunpe ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunpf ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gunpg ,sc4gunp, sc4, sc4, sc4_state, sc4gunp, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4hapnt_reel_configs[6] =
{
@@ -31146,12 +31146,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hapnt)
}
// PR1306 AWP HAPPY NOTES PR1306 HAPPY NOTES SOUNDS11
-GAME( 200?, sc4hapnt ,0, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hapnta ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hapntb ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hapntc ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hapntd ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hapnte ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hapnt ,0, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hapnta ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hapntb ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hapntc ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hapntd ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hapnte ,sc4hapnt, sc4, sc4, sc4_state, sc4hapnt, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4hntcs_reel_configs[6] =
{
@@ -31177,27 +31177,27 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hntcs)
}
// PR1327 CASINO HAPPY NOTES HAPPY NOTES S.SITE PR1327 CAS_HAPPY_NOTES SOUNDS11
-GAME( 200?, sc4hntcs ,0, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsa ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsb ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsc ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcs ,0, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsa ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsb ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsc ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcsm, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR1327 CASINO HAPPY NOTES PR1327 CAS_HAPPY_NOTES SOUNDS11
-GAME( 200?, sc4hntcsd ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcse ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsf ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsg ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsh ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsi ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsj ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsk ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsl ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsm ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsn ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcso ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsp ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsq ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcsr ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4hntcss ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsd ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcse ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsf ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsg ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsh ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsi ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsj ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsk ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsl ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsm ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsn ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcso ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsp ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsq ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcsr ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4hntcss ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Happy Notes Casino (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
@@ -31205,18 +31205,18 @@ GAME( 200?, sc4hntcss ,sc4hntcs, sc4, sc4, sc4_state, sc4hntcs, ROT0, "BFM","Hap
// PR1419 AWP HELLS BELLS PR1402 HELLS BELLS SOUNDS11
-GAME( 200?, sc4hellb ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbb ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbc ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbd ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbe ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbf ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellb ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbb ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbc ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbd ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbe ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbf ,sc4hellb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PAY UINT ERR 17
// PR1419 AWP HELLS BELLS PR1402 HELLS BELLS SOUNDS11 HELLS BELLS S.SITE
-GAME( 200?, sc4hellbg ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbh ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbi ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4hellbj ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbg ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbh ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbi ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4hellbj ,sc4hellb, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hells Bells (PR1419) (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4hill_reel_configs[6] =
{
@@ -31235,8 +31235,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hill)
}
// PR1643 AWP HILLBILLIONAIRE SCORP4 PR1613 HILLBILLIONAIRE SOUNDS11 HILLBILLIONAIRE S.SITE
-GAME( 200?, sc4hill ,0, sc4, sc4, sc4_state, sc4hill, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hilla ,sc4hill, sc4, sc4, sc4_state, sc4hill, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hill ,0, sc4, sc4, sc4_state, sc4hill, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hilla ,sc4hill, sc4, sc4, sc4_state, sc4hill, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4hiss_reel_configs[6] =
@@ -31256,14 +31256,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hiss)
}
// PR2176 HISSING QUID VIPA SOUNDS HISSING QUID
-GAME( 200?, sc4hiss ,0, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hissa ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4hissb ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hissc ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hissd ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hisse ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4hissf ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4hissg ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4hiss ,0, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hissa ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hissb ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hissc ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hissd ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hisse ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hissf ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4hissg ,sc4hiss, sc4, sc4, sc4_state, sc4hiss, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4hotrd_reel_configs[6] =
@@ -31284,8 +31284,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hotrd)
// PR1733 AWP HOT ROD SCORP4 PR1713 HOT ROD SOUNDS11 HOT ROD S.SITE
-GAME( 200?, sc4hotrd ,0, sc4, sc4, sc4_state, sc4hotrd, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotrda ,sc4hotrd, sc4, sc4, sc4_state, sc4hotrd, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotrd ,0, sc4, sc4, sc4_state, sc4hotrd, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotrda ,sc4hotrd, sc4, sc4, sc4_state, sc4hotrd, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4hotsh_reel_configs[6] =
{
@@ -31304,8 +31304,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hotsh)
}
// PR3231 AWP HOT SHOT SCORP4 PR3211 HOT SHOT SOUNDS11 HOT SHOT S.SITE
-GAME( 200?, sc4hotsh ,0, sc4, sc4, sc4_state, sc4hotsh, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotsha ,sc4hotsh, sc4, sc4, sc4_state, sc4hotsh, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotsh ,0, sc4, sc4, sc4_state, sc4hotsh, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotsha ,sc4hotsh, sc4, sc4, sc4_state, sc4hotsh, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4hotwd_reel_configs[6] =
@@ -31326,14 +31326,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4hotwd)
// PR1311 HOT WAD PR1311 HOT WAD SOUNDS11
-GAME( 200?, sc4hotwd ,0, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotwda ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotwd ,0, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotwda ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR1311 HOT WAD PR1311 HOT WAD SOUNDS11 2 HOT WAD S.SITE
-GAME( 200?, sc4hotwdb ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotwdc ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotwdd ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4hotwde ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotwdb ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotwdc ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotwdd ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4hotwde ,sc4hotwd, sc4, sc4, sc4_state, sc4hotwd, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4celeb_reel_configs[6] =
@@ -31354,11 +31354,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4celeb)
// PR1603 AWP IM A CELEBRITY PR1603 IM A CELEB SOUNDS11 IM A CELEBRITY S.SITE
-GAME( 200?, sc4celeb ,0, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4celeba ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4celebb ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4celebc ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4celebd ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4celeb ,0, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4celeba ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4celebb ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4celebc ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4celebd ,sc4celeb, sc4, sc4, sc4_state, sc4celeb, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4inspn_reel_configs[6] =
@@ -31378,8 +31378,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4inspn)
}
// PR2555 INNER SPIN V013 INNERSPINSND INNER SPIN
-GAME( 200?, sc4inspn ,0, sc4, sc4, sc4_state, sc4inspn, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4inspna ,sc4inspn, sc4, sc4, sc4_state, sc4inspn, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4inspn ,0, sc4, sc4, sc4_state, sc4inspn, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4inspna ,sc4inspn, sc4, sc4, sc4_state, sc4inspn, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4ijob_reel_configs[6] =
@@ -31400,20 +31400,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ijob)
// PR2366 AWP THE ITALIAN JOB S4 PR2366 THE ITALIAN JOB SOUNDS11 ITALIAN JOB S.SITE
-GAME( 200?, sc4ijob ,0, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijoba ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobb ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobc ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobd ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobe ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobf ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobg ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobh ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobi ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobj ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobk ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobl ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4ijobm ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijob ,0, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijoba ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobb ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobc ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobd ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobe ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobf ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobg ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobh ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobi ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobj ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobk ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobl ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4ijobm ,sc4ijob, sc4, sc4, sc4_state, sc4ijob, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
static const stepper_interface* sc4ldvl_reel_configs[6] =
{
@@ -31432,10 +31432,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ldvl)
}
// PR2376 LITTLE DEVIL LDEVIL SOUNDS LITTLE DEVIL
-GAME( 200?, sc4ldvl ,0, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldvla ,sc4ldvl, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldvlb ,sc4ldvl, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ldvlc ,sc4ldvl, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldvl ,0, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldvla ,sc4ldvl, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldvlb ,sc4ldvl, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ldvlc ,sc4ldvl, sc4, sc4, sc4_state, sc4ldvl, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4lotrr_reel_configs[6] =
@@ -31455,13 +31455,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lotrr)
}
// PR1427 AWP RETURN OF THE KING PR1413 RETURN OF THE SOUNDS11 RETURN OF KING S.SITE
-GAME( 200?, sc4lotrr ,0, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrra ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrrb ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrrc ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrr ,0, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrra ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrrb ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrrc ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
-GAME( 200?, sc4lotrrd ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4lotrre ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrrd ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4lotrre ,sc4lotrr, sc4, sc4, sc4_state, sc4lotrr, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4manic_reel_configs[6] =
{
@@ -31480,14 +31480,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4manic)
}
// PR3034 AWP MANIC MINER SCORP4 PR3004 MANIC MINER SOUNDS11 MANIC MINER S.SITE
-GAME( 200?, sc4manic ,0, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4manica ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4manicb ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4manicc ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4manicd ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4manice ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4manicf ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4manicg ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4manic ,0, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4manica ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4manicb ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4manicc ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4manicd ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4manice ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4manicf ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4manicg ,sc4manic, sc4, sc4, sc4_state, sc4manic, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4mmm_reel_configs[6] =
{
@@ -31507,14 +31507,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mmm)
// PR2282 MENTALMONEYMONSTERS MMMO SOUNDS MONEY MONSTERS
-GAME( 200?, sc4mmm ,0, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmma ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmmb ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmmc ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmmd ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmme ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmmf ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmmg ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmm ,0, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmma ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmmb ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmmc ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmmd ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmme ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmmf ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmmg ,sc4mmm, sc4, sc4, sc4_state, sc4mmm, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4mmad_reel_configs[6] =
{
@@ -31533,15 +31533,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mmad)
}
// PR2533 MONEY MADNESS MONM SOUNDS MONEY MADNESS
-GAME( 200?, sc4mmad ,0, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmada ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmadb ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmadc ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmad ,0, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmada ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmadb ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmadc ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR2533) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
// PR0000 MONEY MADNESS MONM SOUNDS MONEY MADNESS (did Mazooma mess up this release? it has an invalid project code of PR0000, and 3 of the sets are missing their other half)
-GAME( 200?, sc4mmadd ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmade ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // incomplete pairing
-GAME( 200?, sc4mmadf ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING ) // incomplete pairing
-GAME( 200?, sc4mmadg ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4mmadd ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmade ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4mmadf ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4mmadg ,sc4mmad, sc4, sc4, sc4_state, sc4mmad, ROT0, "Mazooma","Money Madness (PR0000) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // incomplete pairing
static const stepper_interface* sc4mdm_reel_configs[6] =
@@ -31561,8 +31561,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mdm)
}
// PR3333 AWP MONOPOLY DOUBLE MONEY S4 PR3308 MPOLY D MONEY SOUNDS11 DOUBLE MONEY S.SITE
-GAME( 200?, sc4mdm ,0, sc4, sc4, sc4_state, sc4mdm, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mdma ,sc4mdm, sc4, sc4, sc4_state, sc4mdm, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mdm ,0, sc4, sc4, sc4_state, sc4mdm, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mdma ,sc4mdm, sc4, sc4, sc4_state, sc4mdm, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4mhn_reel_configs[6] =
{
@@ -31581,8 +31581,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mhn)
}
// PR2380 MONOPOLY HERE AND NOW MR2R SOUNDS NITH
-GAME( 200?, sc4mhn ,0, sc4, sc4, sc4_state, sc4mhn, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mhna ,sc4mhn, sc4, sc4, sc4_state, sc4mhn, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mhn ,0, sc4, sc4, sc4_state, sc4mhn, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mhna ,sc4mhn, sc4, sc4, sc4_state, sc4mhn, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4mhp_reel_configs[6] =
@@ -31603,22 +31603,22 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mhp)
// PR2345 AWP MONOPOLY HOT PROPERTY S4 PR2345 HOT PROPERTY SOUNDS11 HOT PROPERTY S.SITE
-GAME( 200?, sc4mhp ,0, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // 471
-GAME( 200?, sc4mhpa ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // 472
-GAME( 200?, sc4mhpb ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // 271
-GAME( 200?, sc4mhpc ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // 471
-GAME( 200?, sc4mhpd ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // 472
-GAME( 200?, sc4mhpe ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // 271
-GAME( 200?, sc4mhpf ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING ) // 475
-GAME( 200?, sc4mhpg ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // 571
-GAME( 200?, sc4mhph ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING ) // 572
-GAME( 200?, sc4mhpi ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING ) // 475
-GAME( 200?, sc4mhpj ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING ) // 571
-GAME( 200?, sc4mhpk ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING ) // 572
-GAME( 200?, sc4mhpl ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING ) // 411
-GAME( 200?, sc4mhpm ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING ) // 272
-GAME( 200?, sc4mhpn ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING ) // 272
-GAME( 200?, sc4mhpo ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4mhp ,0, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // 471
+GAME( 200?, sc4mhpa ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // 472
+GAME( 200?, sc4mhpb ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // 271
+GAME( 200?, sc4mhpc ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // 471
+GAME( 200?, sc4mhpd ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // 472
+GAME( 200?, sc4mhpe ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // 271
+GAME( 200?, sc4mhpf ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING ) // 475
+GAME( 200?, sc4mhpg ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING ) // 571
+GAME( 200?, sc4mhph ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING ) // 572
+GAME( 200?, sc4mhpi ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING ) // 475
+GAME( 200?, sc4mhpj ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING ) // 571
+GAME( 200?, sc4mhpk ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING ) // 572
+GAME( 200?, sc4mhpl ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING ) // 411
+GAME( 200?, sc4mhpm ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING ) // 272
+GAME( 200?, sc4mhpn ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING ) // 272
+GAME( 200?, sc4mhpo ,sc4mhp, sc4, sc4, sc4_state, sc4mhp, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
static const stepper_interface* sc4mmb_reel_configs[6] =
{
@@ -31638,8 +31638,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mmb)
// PR1931 AWP MONOLOLY MONEY BAGS SCORP4 PR1911 MPOLY MONEYBAGS SOUNDS11 MONEYBAGS S.SITE
-GAME( 200?, sc4mmb ,0, sc4, sc4, sc4_state, sc4mmb, ROT0, "BFM","Monopoly Money Bags (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mmba ,sc4mmb, sc4, sc4, sc4_state, sc4mmb, ROT0, "BFM","Monopoly Money Bags (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmb ,0, sc4, sc4, sc4_state, sc4mmb, ROT0, "BFM","Monopoly Money Bags (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mmba ,sc4mmb, sc4, sc4, sc4_state, sc4mmb, ROT0, "BFM","Monopoly Money Bags (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4mrh_reel_configs[6] =
{
@@ -31659,12 +31659,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mrh)
// PR2363 RED HOT MONOP MONOPOLY ARCADE MONO SOUNDS MONOPOLY
-GAME( 200?, sc4mrh ,0, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mrha ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mrhb ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mrhc ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4mrhd ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mrhe ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4mrh ,0, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mrha ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mrhb ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mrhc ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mrhd ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mrhe ,sc4mrh, sc4, sc4, sc4_state, sc4mrh, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4mr2r_reel_configs[6] =
{
@@ -31684,12 +31684,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4mr2r)
// PR2329 MONOPOLY ROAD TO RICHES MR2R SOUNDS ROAD TO RICHES
-GAME( 200?, sc4mr2r ,0, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4mr2ra ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4mr2rb ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4mr2rc ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4mr2rd ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4mr2re ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4mr2r ,0, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4mr2ra ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4mr2rb ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4mr2rc ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4mr2rd ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4mr2re ,sc4mr2r, sc4, sc4, sc4_state, sc4mr2r, ROT0, "Mazooma","Monopoly Road To Riches (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4nmare_reel_configs[6] =
{
@@ -31709,10 +31709,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4nmare)
// PR3032 AWP NIGHTMARE ON ELM STREET S4 PR3002 ELM STREET SOUNDS11 NIGHTMARE ELM ST S.SITE
-GAME( 200?, sc4nmare ,0, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4nmarea ,sc4nmare, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4nmareb ,sc4nmare, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4nmarec ,sc4nmare, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmare ,0, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmarea ,sc4nmare, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmareb ,sc4nmare, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4nmarec ,sc4nmare, sc4, sc4, sc4_state, sc4nmare, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4potp_reel_configs[6] =
@@ -31733,23 +31733,23 @@ DRIVER_INIT_MEMBER(sc4_state,sc4potp)
// PR1612 PICK OF THE PACK PR1612 PICK OF THE PACK SOUNDS11 PICK OF THE PACK S.SITE
-GAME( 200?, sc4potp ,0, sc4, sc4, sc4_state, sc4potp, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4potpa ,sc4potp, sc4, sc4, sc4_state, sc4potp, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4potp ,0, sc4, sc4, sc4_state, sc4potp, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4potpa ,sc4potp, sc4, sc4, sc4_state, sc4potp, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2279 PINK PANTHER CLOUSEAUS REVENGE REVENGE QPS REVENGE SOUNDS
-GAME( 200?, sc4ppcr ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcra ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcrb ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcrd ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcre ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcrf ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcrg ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcrh ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcri ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppcrj ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcr ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcra ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcrb ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcrd ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcre ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcrf ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcrg ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcrh ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcri ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcrj ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// PR2279 CLOUSEAU TOP BOX COROST_TRIPLE SOUNDS REVENGE TIME
-GAME( 200?, sc4ppcrtb ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge Top Box (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppcrtb ,sc4ppcr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Clouseau's Revenge Top Box (Mazooma) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ppctc_reel_configs[6] =
@@ -31770,28 +31770,28 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ppctc)
// PR2407 AWP PINK PANTHER CRACK THE CODE SCORP4 PR2407 CRACK THE CODE SOUNDS11 CRACK THE CODE S.SITE
-GAME( 200?, sc4ppctc ,0, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppctca ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppctcb ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppctcc ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppctcd ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppctce ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppctcf ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppctcg ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctc ,0, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctca ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctcb ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctcc ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctcd ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctce ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctcf ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppctcg ,sc4ppctc, sc4, sc4, sc4_state, sc4ppctc, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR2330 PINK PANTHER DYM PINK PANTHER DYM QPS DYMT SOUNDS PINK PANTHER DYM -
-GAME( 200?, sc4ppdym ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymb ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymc ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymd ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymf ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymg ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymh ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymi ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdym ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymb ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymc ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymd ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymf ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymg ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymh ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymi ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR2333 PINK PANTHER TOP BOX DYMT SOUNDS ALL YOUR BASE
-GAME( 200?, sc4ppdymtb ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money Top Box (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ppdymtba ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money Top Box (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymtb ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money Top Box (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ppdymtba ,sc4ppdym, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Double Your Money Top Box (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4pony_reel_configs[6] =
{
@@ -31811,12 +31811,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pony)
// PR1408 PONY EXPRESS PR1408 PONY EXPRESS SOUNDS11 PONY EXPRESS S.SITE
-GAME( 200?, sc4pony ,0, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ponya ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ponyb ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ponyc ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ponyd ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ponye ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4pony ,0, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ponya ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ponyb ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ponyc ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ponyd ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ponye ,sc4pony, sc4, sc4, sc4_state, sc4pony, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // incomplete pairing
static const stepper_interface* sc4popey_reel_configs[6] =
{
@@ -31835,12 +31835,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4popey)
}
// PR2417 AWP POPEYE S4 PR2417 POPEYE SOUNDS11 POPEYE S.SITE
-GAME( 200?, sc4popey ,0, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4popeya ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4popeyb ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4popeyc ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4popeyd ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4popeye ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4popey ,0, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4popeya ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4popeyb ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4popeyc ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4popeyd ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4popeye ,sc4popey, sc4, sc4, sc4_state, sc4popey, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4pwrbl_reel_configs[6] =
@@ -31862,8 +31862,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pwrbl)
// sequel to gamball, mechanical?
// PR1614 AWP POWERBALL POWERBALL S.SITE PR1614 POWERBALL SOUNDS11
-GAME( 200?, sc4pwrbl ,0, sc4, sc4, sc4_state, sc4pwrbl, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pwrbla ,sc4pwrbl, sc4, sc4, sc4_state, sc4pwrbl, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrbl ,0, sc4, sc4, sc4_state, sc4pwrbl, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrbla ,sc4pwrbl, sc4, sc4, sc4_state, sc4pwrbl, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4quidv_reel_configs[6] =
@@ -31883,10 +31883,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4quidv)
}
// PR2342 QUID VICIOUS QUIDV SOUNDS QUID VICIOUS
-GAME( 200?, sc4quidv ,0, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4quidva ,sc4quidv, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4quidvb ,sc4quidv, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4quidvc ,sc4quidv, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidv ,0, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidva ,sc4quidv, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidvb ,sc4quidv, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4quidvc ,sc4quidv, sc4, sc4, sc4_state, sc4quidv, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4rhx_reel_configs[6] =
{
@@ -31911,31 +31911,31 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rhx_mbus)
}
// PR2077 RED HOT X REDX SOUNDS RED HOT X
-GAME( 200?, sc4rhx ,0, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxa ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxd ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxe ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxj ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxk ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // incomplete pairing
-GAME( 200?, sc4rhxl ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxm ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhx ,0, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxa ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxd ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxe ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxj ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxk ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4rhxl ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxm ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR2077 RED HOT X RED HOT X ARCADE REDX SOUNDS RED HOT X
-GAME( 200?, sc4rhxb ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxc ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxh ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxi ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxf ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxg ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxn ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxo ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxp ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxq ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxr ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxs ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxt ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxu ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxv ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxw ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxb ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxc ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxh ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxi ,sc4rhx, sc4, sc4, sc4_state, sc4rhx_mbus, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxf ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxg ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxn ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxo ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxp ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxq ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxr ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxs ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxt ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxu ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxv ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxw ,sc4rhx, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
static const stepper_interface* sc4rhxcs_reel_configs[6] =
@@ -31955,18 +31955,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rhxcs)
}
// PR2364 CASINO RED HOT X RED HOT X CRHX SOUNDS RED HOT X
-GAME( 200?, sc4rhxcs ,0, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxcsa ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxcsb ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxcsc ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxcsd ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxcse ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcs ,0, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcsa ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcsb ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcsc ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcsd ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcse ,sc4rhxcs, sc4, sc4, sc4_state, sc4rhxcs, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR2056 RED HOT X CLUB REDX SOUNDS RED HOT X CLUB
-GAME( 200?, sc4rhxcl ,0, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxcla ,sc4rhxcl, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxclb ,sc4rhxcl, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rhxclc ,sc4rhxcl, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcl ,0, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxcla ,sc4rhxcl, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxclb ,sc4rhxcl, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rhxclc ,sc4rhxcl, sc4, sc4, sc4_state, sc4rhx, ROT0, "Mazooma","Red Hot X Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
@@ -31987,10 +31987,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4redsq)
}
// PR2557 RED SQUARE REDS SOUNDS RED SQUARE
-GAME( 200?, sc4redsq ,0, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4redsqa ,sc4redsq, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4redsqb ,sc4redsq, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4redsqc ,sc4redsq, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4redsq ,0, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4redsqa ,sc4redsq, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4redsqb ,sc4redsq, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4redsqc ,sc4redsq, sc4, sc4, sc4_state, sc4redsq, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4rosts_reel_configs[6] =
@@ -32011,14 +32011,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rosts)
// PR3256 CLUB RONNIE O SULLIVANS TOURNAMENT SCORP4 RONNIE OSULLIVAN CLUB PR3256 RONNIE O SOUNDS11 RONNIE SULLIVAN
-GAME( 200?, sc4rosts ,0, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rostsa ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rostsb ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rostsc ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4rostsd ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4rostse ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4rostsf ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4rostsg ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4rosts ,0, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rostsa ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rostsb ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rostsc ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rostsd ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4rostse ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4rostsf ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4rostsg ,sc4rosts, sc4, sc4, sc4_state, sc4rosts, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4rovrt_reel_configs[6] =
{
@@ -32038,12 +32038,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rovrt)
// PR2311 ROVERS RETURN ROVERS RETURN SOUNDS ROVERS RETURN
-GAME( 200?, sc4rovrt ,0, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4rovrta ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4rovrtb ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4rovrtc ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4rovrtd ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4rovrte ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4rovrt ,0, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4rovrta ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4rovrtb ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4rovrtc ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rovrtd ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4rovrte ,sc4rovrt, sc4, sc4, sc4_state, sc4rovrt, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4showt_reel_configs[6] =
{
@@ -32063,13 +32063,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4showt)
// PR3043 AWP SHOW TIME S4 PR3013 SHOWTIME SOUNDS11 SHOW TIME S.SITE
-GAME( 200?, sc4showt ,0, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4showta ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4showtb ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4showtc ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4showtd ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4showte ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4showtf ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4showt ,0, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4showta ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4showtb ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4showtc ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4showtd ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4showte ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4showtf ,sc4showt, sc4, sc4, sc4_state, sc4showt, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
static const stepper_interface* sc4spice_reel_configs[6] =
@@ -32089,10 +32089,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4spice)
}
// PR1921 AWP SPICE IT UP SCORP4 PR1901 SPICE IT UP SOUNDS11 SPICE IT UP S.SITE
-GAME( 200?, sc4spice ,0, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4spicea ,sc4spice, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4spiceb ,sc4spice, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4spicec ,sc4spice, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4spice ,0, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4spicea ,sc4spice, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4spiceb ,sc4spice, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4spicec ,sc4spice, sc4, sc4, sc4_state, sc4spice, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4sus_reel_configs[6] =
{
@@ -32111,14 +32111,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sus)
}
// PR2255 SUITUSIR SUIT SOUNDS SUITS U SIR
-GAME( 200?, sc4sus ,0, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4susc ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4susf ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4susg ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4sush ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4susi ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4susj ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4susk ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4sus ,0, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4susc ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4susf ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4susg ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4sush ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4susi ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4susj ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4susk ,sc4sus, sc4, sc4, sc4_state, sc4sus, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
static const stepper_interface* sc4sslam_reel_configs[6] =
{
@@ -32137,8 +32137,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sslam)
}
// PR3081 CLUB SUPER SLAM SUPER SLAM CLUB PR3080 SUPER SLAM SOUNDS11
-GAME( 200?, sc4sslam ,0, sc4, sc4, sc4_state, sc4sslam, ROT0, "BFM","Super Slam (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4sslama ,sc4sslam, sc4, sc4, sc4_state, sc4sslam, ROT0, "BFM","Super Slam (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sslam ,0, sc4, sc4, sc4_state, sc4sslam, ROT0, "BFM","Super Slam (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4sslama ,sc4sslam, sc4, sc4, sc4_state, sc4sslam, ROT0, "BFM","Super Slam (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4swbak_reel_configs[6] =
@@ -32158,10 +32158,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4swbak)
}
// PR2235 SWITCHBACK SWBK SOUNDS SWITCHBACK
-GAME( 200?, sc4swbak ,0, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4swbaka ,sc4swbak, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4swbakb ,sc4swbak, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4swbakc ,sc4swbak, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4swbak ,0, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4swbaka ,sc4swbak, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4swbakb ,sc4swbak, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4swbakc ,sc4swbak, sc4, sc4, sc4_state, sc4swbak, ROT0, "QPS","Switch Back (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ttpie_reel_configs[6] =
@@ -32182,15 +32182,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ttpie)
// PR1714 AWP TAKE THE PIECE S4 PR1714 TAKE THE PIECE SOUNDS11 TAKETHEPIECE S.SITE
-GAME( 200?, sc4ttpie ,0, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttpiec ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpie ,0, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpiec ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1734 AWP TAKE THE PIECE S4 PR1714 TAKE THE PIECE SOUNDS11 TAKETHEPIECE S.SITE
-GAME( 200?, sc4ttpiea ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttpieb ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttpied ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttpiee ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttpief ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4ttpieg ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpiea ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpieb ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpied ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpiee ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpief ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4ttpieg ,sc4ttpie, sc4, sc4, sc4_state, sc4ttpie, ROT0, "BFM","Take The Piece (Bellfruit) (PR1734) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4typ_reel_configs[6] =
@@ -32211,10 +32211,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4typ)
// PR3031 AWP TAKE YOUR PICK S4 PR3001 TAKE YOUR PICK SOUNDS11 TAKE YOUR PICK S.SITE
-GAME( 200?, sc4typ ,0, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4typa ,sc4typ, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4typb ,sc4typ, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4typc ,sc4typ, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4typ ,0, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4typa ,sc4typ, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4typb ,sc4typ, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4typc ,sc4typ, sc4, sc4, sc4_state, sc4typ, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4trail_reel_configs[6] =
{
@@ -32233,10 +32233,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4trail)
}
// PR2170 TRAIL BLAZER TRAB SOUNDS TRAIL BLAZER
-GAME( 200?, sc4trail ,0, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4traila ,sc4trail, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4trailb ,sc4trail, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4trailc ,sc4trail, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4trail ,0, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4traila ,sc4trail, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4trailb ,sc4trail, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4trailc ,sc4trail, sc4, sc4, sc4_state, sc4trail, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4vivam_reel_configs[6] =
@@ -32257,10 +32257,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4vivam)
// PR6907 VIVA MEXICO PR6907 VIVA MEXICO SOUNDS11
-GAME( 200?, sc4vivam ,0, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivama ,sc4vivam, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivamb ,sc4vivam, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivamc ,sc4vivam, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivam ,0, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivama ,sc4vivam, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivamb ,sc4vivam, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivamc ,sc4vivam, sc4, sc4, sc4_state, sc4vivam, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4vivcs_reel_configs[6] =
@@ -32283,16 +32283,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4vivcs)
// PR6927 CASINO VIVA MEXICO PR6927 VIVAMEXICO SOUNDS11
// these do nothing..
-GAME( 200?, sc4vivcs ,0, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivcsa ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcs ,0, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcsa ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR6927 CASINO VIVA MEXICO PR6927 VIVAMEXICO SOUNDS21
// these boot
-GAME( 200?, sc4vivcsb ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivcsc ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivcsd ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivcse ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivcsf ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4vivcsg ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcsb ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcsc ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcsd ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcse ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcsf ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4vivcsg ,sc4vivcs, sc4, sc4, sc4_state, sc4vivcs, ROT0, "BFM","Casino Viva Mexico (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
@@ -32314,13 +32314,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bpb)
}
// PR1728 AWP BULLY'S PRIZE BOARD PR1708 B PRIZE BOARD SOUNDS11 BULLYSPRIZEBOARD S.SITE
-GAME( 200?, sc4bpb ,0, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bpbc ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bpb ,0, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bpbc ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1728 AWP BULLY'S PRIZE BOARD S4 PR1708 B PRIZE BOARD SOUNDS11 BULLYSPRIZEBOARD S.SITE
-GAME( 200?, sc4bpba ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bpbb ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4bpbd ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4bpbe ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4bpba ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bpbb ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bpbd ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4bpbe ,sc4bpb, sc4, sc4, sc4_state, sc4bpb, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4bsp_reel_configs[6] =
@@ -32340,15 +32340,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bsp)
}
// PR3040 AWP BULLYS STAR PRIZE SCORP4 PR3012 BULLYS STAR P SOUNDS11 BULLYS STARPRIZE S.SITE
-GAME( 200?, sc4bsp ,0, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bspa ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bspb ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bspc ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4bspd ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4bspg ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4bsp ,0, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bspa ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bspb ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bspc ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bspd ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4bspg ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3040) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR3042 AWP BULLYS STAR PRIZE SCORP4 PR3012 BULLYS STAR P SOUNDS11 BULLYS STARPRIZE S.SITE
-GAME( 200?, sc4bspe ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3042) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bspf ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3042) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bspe ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3042) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bspf ,sc4bsp, sc4, sc4, sc4_state, sc4bsp, ROT0, "BFM","Bully's Star Prize (PR3042) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4chain_reel_configs[6] =
@@ -32369,10 +32369,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4chain)
// PR1316 AWP CHAIN REACTION PR1312 CHAIN REACT SOUNDS11
-GAME( 200?, sc4chain ,0, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4chaina ,sc4chain, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4chainb ,sc4chain, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4chainc ,sc4chain, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4chain ,0, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4chaina ,sc4chain, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4chainb ,sc4chain, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4chainc ,sc4chain, sc4, sc4, sc4_state, sc4chain, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4clown_reel_configs[6] =
@@ -32393,27 +32393,27 @@ DRIVER_INIT_MEMBER(sc4_state,sc4clown)
// PR1727 AWP CLOWN AROUND SCORP4 PR1707 CLOWN AROUND SOUNDS11 CLOWN AROUND S.SITE
-GAME( 200?, sc4clown ,0, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4clowna ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4clownb ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4clownc ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4clownd ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4clowne ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4clownf ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4clowng ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4clown ,0, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4clowna ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4clownb ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4clownc ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4clownd ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4clowne ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4clownf ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4clowng ,sc4clown, sc4, sc4, sc4_state, sc4clown, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
/* wrong sound roms */
-GAME( 200?, sc4mowow ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR2118 MONOPOLY WOTW WOTW SOUNDS MONOPOLY WOTW 8P
-GAME( 200?, sc4mowowa ,sc4mowow, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mowowb ,sc4mowow, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mowowc ,sc4mowow, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mowow ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR2118 MONOPOLY WOTW WOTW SOUNDS MONOPOLY WOTW 8P
+GAME( 200?, sc4mowowa ,sc4mowow, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mowowb ,sc4mowow, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mowowc ,sc4mowow, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2118) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mwwtb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR2389 WHEEL OF WEALTH WOWT SOUNDS WHEEL OF WEAL
-GAME( 200?, sc4mwwtba ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mwwtbb ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4mwwtbc ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
-GAME( 200?, sc4mwwtbd ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 5)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mwwtb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR2389 WHEEL OF WEALTH WOWT SOUNDS WHEEL OF WEAL
+GAME( 200?, sc4mwwtba ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mwwtbb ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4mwwtbc ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 4)", GAME_NOT_WORKING )// ^^
+GAME( 200?, sc4mwwtbd ,sc4mwwtb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (PR2389, Top Box) (Scorpion 4) (set 5)", GAME_NOT_WORKING )// ^^
static const stepper_interface* sc4bwow_reel_configs[6] =
@@ -32432,8 +32432,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bwow)
m_reel_setup = sc4bwow_reel_configs;
}
-GAME( 200?, sc4bwow ,0, sc4, sc4, sc4_state, sc4bwow, ROT0, "BFM","Wheel Of Wealth (Bellfruit) (PR1726) (Scorpion 4) (WHEL013, set 1)", GAME_NOT_WORKING ) // PR1726 AWP WHEEL OF WEALTH PR1706 WHEEL OF WEALTH SOUNDS11 WHEEL OF WEALTH S.SITE
-GAME( 200?, sc4bwowa ,sc4bwow, sc4, sc4, sc4_state, sc4bwow, ROT0, "BFM","Wheel Of Wealth (Bellfruit) (PR1726) (Scorpion 4) (WHEL013, set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4bwow ,0, sc4, sc4, sc4_state, sc4bwow, ROT0, "BFM","Wheel Of Wealth (Bellfruit) (PR1726) (Scorpion 4) (WHEL013, set 1)", GAME_NOT_WORKING ) // PR1726 AWP WHEEL OF WEALTH PR1706 WHEEL OF WEALTH SOUNDS11 WHEEL OF WEALTH S.SITE
+GAME( 200?, sc4bwowa ,sc4bwow, sc4, sc4, sc4_state, sc4bwow, ROT0, "BFM","Wheel Of Wealth (Bellfruit) (PR1726) (Scorpion 4) (WHEL013, set 2)", GAME_NOT_WORKING ) // ^^
static const stepper_interface* sc4nunsm_reel_configs[6] =
@@ -32453,16 +32453,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4nunsm)
}
// PR2166 NUN N ROSES NANR SOUNDS NUNS N ROSES
-GAME( 200?, sc4nunsm ,0, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmb ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmc ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmd ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsme ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmf ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmg ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmh ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmi ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4nunsmj ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsm ,0, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmb ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmc ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmd ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsme ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmf ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmg ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmh ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmi ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4nunsmj ,sc4nunsm, sc4, sc4, sc4_state, sc4nunsm, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4acesh_reel_configs[6] =
@@ -32482,10 +32482,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4acesh)
}
// PR2070 ACES HIGH ACEHI SOUNDS ACES HIGH
-GAME( 200?, sc4acesh ,0, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4acesha ,sc4acesh, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4aceshb ,sc4acesh, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4aceshc ,sc4acesh, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4acesh ,0, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4acesha ,sc4acesh, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4aceshb ,sc4acesh, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4aceshc ,sc4acesh, sc4, sc4, sc4_state, sc4acesh, ROT0, "Mazooma","Aces High (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4bed_reel_configs[6] =
@@ -32506,12 +32506,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bed)
// PR2094 BEDAZZLED BEDZ SOUNDS BEDAZZLED
-GAME( 200?, sc4bed ,0, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4beda ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bedb ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bedc ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4bedd ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4bede ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4bed ,0, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4beda ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedb ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedc ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedd ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4bede ,sc4bed, sc4, sc4, sc4_state, sc4bed, ROT0, "Mazooma","Bedazzled (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4bedcl_reel_configs[6] =
{
@@ -32531,12 +32531,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bedcl)
// PR2102 CLUB BEDAZZLED CBED SOUNDS CLUB BEDAZZLED
-GAME( 200?, sc4bedcl ,0, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedcl ,0, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
// PR2102 CLUB BEDAZZLED CLUB BEDAZZLED CLUB CBED SOUNDS CLUB BEDAZZLED
-GAME( 200?, sc4bedcla ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bedclb ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bedclc ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4bedcld ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedcla ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedclb ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedclc ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bedcld ,sc4bedcl, sc4, sc4, sc4_state, sc4bedcl, ROT0, "Mazooma","Bedazzled Club (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
static const stepper_interface* sc4bblas_reel_configs[6] =
{
@@ -32561,13 +32561,13 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bblas_mbus)
}
// PR2083 BIG BLASTER BBST SOUNDS BIG BLASTER
-GAME( 200?, sc4bblas ,0, sc4, sc4, sc4_state, sc4bblas, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bblasa ,sc4bblas, sc4, sc4, sc4_state, sc4bblas, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bblasb ,sc4bblas, sc4, sc4, sc4_state, sc4bblas, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bblasc ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4bblasd ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4bblase ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4bblasf ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4bblas ,0, sc4, sc4, sc4_state, sc4bblas, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bblasa ,sc4bblas, sc4, sc4, sc4_state, sc4bblas, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bblasb ,sc4bblas, sc4, sc4, sc4_state, sc4bblas, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bblasc ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bblasd ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4bblase ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4bblasf ,sc4bblas, sc4, sc4, sc4_state, sc4bblas_mbus, ROT0, "Mazooma","Big Blaster (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
static const stepper_interface* sc4bankb_reel_configs[6] =
@@ -32588,11 +32588,11 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bankb)
// PR???? BANKETYBANK V1.0 BANKETYBANKSND BANKETY BANK
-GAME( 200?, sc4bankb ,0, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bankba ,sc4bankb, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bankb ,0, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bankba ,sc4bankb, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR???? BANKETYBANK 011 BANKETYBANKSND BANKETY BANK
-GAME( 200?, sc4bb ,sc4bankb, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bba ,sc4bankb, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bb ,sc4bankb, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bba ,sc4bankb, sc4, sc4, sc4_state, sc4bankb, ROT0, "Qps","Bankety Bank (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4bobcl_reel_configs[6] =
{
@@ -32611,8 +32611,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bobcl)
}
// PR2298 CLUB BOBBY DAZZLER CLUB BOB DAZZLER CLUB CLUBBOBD SOUNDS
-GAME( 200?, sc4bobcl ,0, sc4, sc4, sc4_state, sc4bobcl, ROT0, "Mazooma","Bobby Dazzler Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bobcla ,sc4bobcl, sc4, sc4, sc4_state, sc4bobcl, ROT0, "Mazooma","Bobby Dazzler Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bobcl ,0, sc4, sc4, sc4_state, sc4bobcl, ROT0, "Mazooma","Bobby Dazzler Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bobcla ,sc4bobcl, sc4, sc4, sc4_state, sc4bobcl, ROT0, "Mazooma","Bobby Dazzler Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4brksp_reel_configs[6] =
{
@@ -32631,8 +32631,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4brksp)
}
// PR2033 BREAK THE SPELL SPELL SOUNDS BREAK THE SPELL
-GAME( 200?, sc4brksp ,0, sc4, sc4, sc4_state, sc4brksp, ROT0, "Mazooma","Break The Spell (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4brkspa ,sc4brksp, sc4, sc4, sc4_state, sc4brksp, ROT0, "Mazooma","Break The Spell (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4brksp ,0, sc4, sc4, sc4_state, sc4brksp, ROT0, "Mazooma","Break The Spell (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4brkspa ,sc4brksp, sc4, sc4, sc4_state, sc4brksp, ROT0, "Mazooma","Break The Spell (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4bulcl_reel_configs[6] =
{
@@ -32651,16 +32651,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bulcl)
}
// PR1753 CLUB BULLSEYE BULLSEYE CLUB PR1751 BULLSEYE SOUNDS11 BULLSYE
-GAME( 200?, sc4bulcl ,0, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulcla ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulclb ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulclc ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulcld ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulcle ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulclf ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulclg ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulclh ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4bulcli ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcl ,0, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcla ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulclb ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulclc ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcld ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcle ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulclf ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulclg ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulclh ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4bulcli ,sc4bulcl, sc4, sc4, sc4_state, sc4bulcl, ROT0, "BFM","Bullseye Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
static const stepper_interface* sc4carry_reel_configs[6] =
{
@@ -32680,59 +32680,59 @@ DRIVER_INIT_MEMBER(sc4_state,sc4carry)
// PR1113 CARRY ON WINNING PR1113 CARRY ON WINNING SOUNDS11
-GAME( 200?, sc4carry ,0, sc4, sc4, sc4_state, sc4carry, ROT0, "BFM","Carry On Winning (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4carrya ,sc4carry, sc4, sc4, sc4_state, sc4carry, ROT0, "BFM","Carry On Winning (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4carry ,0, sc4, sc4, sc4_state, sc4carry, ROT0, "BFM","Carry On Winning (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4carrya ,sc4carry, sc4, sc4, sc4_state, sc4carry, ROT0, "BFM","Carry On Winning (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1349 CLUB CASH BAZAAR PR1349 CLUB CASH BAZAAR SOUNDS11
-GAME( 200?, sc4cbaz ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbaza ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazb ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazc ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazd ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbaze ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazf ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazg ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazh ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazi ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbaz ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbaza ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazb ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazc ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazd ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbaze ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazf ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazg ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazh ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazi ,sc4cbaz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// These alarm through startup and don't boot, are they missing something like a DMD?
// PR1349 CLUB CASH BAZAAR CLUB CASH BAZAAR CLUB PR1349 CLUB CASH BAZAAR SOUNDS11
-GAME( 200?, sc4cbazj ,sc4cbaz, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4cbazk ,sc4cbaz, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazj ,sc4cbaz, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4cbazk ,sc4cbaz, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cash Bazaar Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
// PR2118 CASH ON THE LASH COTL SOUNDS CASH ON THE LASH
-GAME( 200?, sc4clash ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4clasha ,sc4clash, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4clashb ,sc4clash, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4clashc ,sc4clash, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4clashd ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4clashe ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4clashf ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4clashg ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4clash ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4clasha ,sc4clash, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4clashb ,sc4clash, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4clashc ,sc4clash, sc4, sc4, sc4_state, sc4mbus, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4clashd ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4clashe ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4clashf ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4clashg ,sc4clash, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash On The Lash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
// PR1426 CASINO CRAZY FRUITS GOLD PR1426 CRAZY F GOLD SOUNDS11 CRAZY FRUIT GOLD S.SITE (set was marked as Casino Crazy Keys)
-GAME( 200?, sc4cckey ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeya ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyb ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyc ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyd ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeye ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyf ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyg ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyh ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyj ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyi ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyk ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyl ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeym ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyn ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 200?, sc4cckeyo ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckey ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeya ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyb ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyc ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyd ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeye ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyf ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyg ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyh ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyj ,sc4cckey, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyi ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyk ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyl ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeym ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyn ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 200?, sc4cckeyo ,sc4cckey, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Casino Crazy Fruits Gold (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
static const stepper_interface* sc4clclo_reel_configs[6] =
{
@@ -32751,7 +32751,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4clclo)
}
// PR2383 CLUBCLOUSEAU CLUBCLOUSEAU CLUB CCLOU SOUNDS CLUB CLOSEAU
-GAME( 200?, sc4clclo ,0, sc4, sc4, sc4_state, sc4clclo, ROT0, "QPS","Club Clouseau (QPS) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4clclo ,0, sc4, sc4, sc4_state, sc4clclo, ROT0, "QPS","Club Clouseau (QPS) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4cjcl_reel_configs[6] =
{
@@ -32770,55 +32770,55 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cjcl)
}
// PR1621 CLUB COOL JEWELS PR1621 COOL SOUNDS11 CLUB COOL JEWELS CLUB
-GAME( 200?, sc4cjcl ,0, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjcla ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjclb ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjclc ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjcld ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjcle ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjclf ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjcl ,0, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjcla ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjclb ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjclc ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjcld ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjcle ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjclf ,sc4cjcl, sc4, sc4, sc4_state, sc4cjcl, ROT0, "BFM","Cool Jewels Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
// PR3241 CLUB COPS AND ROBBERS PLATINUM SCORP4 COPS & ROBRS PLT CLUB PR3241 C N R PLATINUM SOUNDS11 COPS AND ROBBERS
-GAME( 200?, sc4crcp ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpa ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpc ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpd ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpe ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpf ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpg ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcph ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpi ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4crcpj ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcp ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpa ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpc ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpd ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpe ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpf ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpg ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcph ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpi ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4crcpj ,sc4crcp, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Club Platinum (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// PR1348 CLUB COPS AND ROBBERS GOLD PR1348 CCRG SOUNDS11 COPS AND ROBBERS
-GAME( 2003, sc4crgc ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgca ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcb ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcc ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcd ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgce ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcf ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcg ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgch ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgci ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcj ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgck ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcl ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcm ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgco ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcq ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgct ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcw ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgc ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgca ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcb ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcc ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcd ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgce ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcf ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcg ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgch ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgci ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcj ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgck ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcl ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcm ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgco ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 15)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcq ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 16)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgct ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 17)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcw ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 18)", GAME_NOT_WORKING )
// PR1348 CLUB COPS AND ROBBERS GOLD COPS & ROBRS GLD CLUB PR1348 CCRG SOUNDS11 COPS AND ROBBERS
-GAME( 2003, sc4crgcr ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcu ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcn ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcp ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcr ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 21)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcu ,sc4crgc, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 22)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcn ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 19)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcp ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 20)", GAME_NOT_WORKING )
// PR1348 !500 CLUB COPS AND ROBBERS GOLD COPS & ROBRS GLD CLUB PR1348 CCRG SOUNDS11 COPS AND ROBBERS
-GAME( 2003, sc4crgcs ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
-GAME( 2003, sc4crgcv ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcs ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 23)", GAME_NOT_WORKING )
+GAME( 2003, sc4crgcv ,sc4crgc, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Cops 'n' Robbers Gold Club (Bellfruit) (Scorpion 4) (set 24)", GAME_NOT_WORKING )
@@ -32840,12 +32840,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cfcla)
}
// PR1396 CLASSIC CRAZY FRUITS PR1396 CLSIC CRAZY FRUITS SND11
-GAME( 200?, sc4cfcla ,0, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfclab ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfclac ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfclad ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfclae ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfclaf ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfcla ,0, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclab ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclac ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclad ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclae ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfclaf ,sc4cfcla, sc4, sc4, sc4_state, sc4cfcla, ROT0, "BFM","Crazy Fruits Classic (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
static const stepper_interface* sc4cfdu_reel_configs[6] =
{
@@ -32864,10 +32864,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cfdu)
}
// PR1107 CRAZY FRUITS DOWNUNDER PR1107 DOWN UNDER SOUNDS11
-GAME( 200?, sc4cfdu ,0, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfdua ,sc4cfdu, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfdub ,sc4cfdu, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfduc ,sc4cfdu, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfdu ,0, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfdua ,sc4cfdu, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfdub ,sc4cfdu, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfduc ,sc4cfdu, sc4, sc4, sc4_state, sc4cfdu, ROT0, "BFM","Crazy Fruits Down Under (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4cfgcl_reel_configs[6] =
@@ -32887,10 +32887,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cfgcl)
}
// PR1620 CLUB CRAZY FRUITS GOLD PR1620 CRAZY SOUNDS11 CRAZY FRUITS CLUB
-GAME( 200?, sc4cfgcl ,0, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfgcla ,sc4cfgcl, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfgclb ,sc4cfgcl, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cfgclc ,sc4cfgcl, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfgcl ,0, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfgcla ,sc4cfgcl, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfgclb ,sc4cfgcl, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cfgclc ,sc4cfgcl, sc4, sc4, sc4_state, sc4cfgcl, ROT0, "BFM","Crazy Fruits Gold Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4derby_reel_configs[6] =
@@ -32911,34 +32911,34 @@ DRIVER_INIT_MEMBER(sc4_state,sc4derby)
// PR1006 DEMOLITION DERBY PR1006 DEMDERBY SOUNDS11
-GAME( 200?, sc4derby ,0, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4derbya ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4derbyb ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4derbyc ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4derbyd ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4derbye ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4derby ,0, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4derbya ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4derbyb ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4derbyc ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4derbyd ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4derbye ,sc4derby, sc4, sc4, sc4_state, sc4derby, ROT0, "BFM","Demolition Derby (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
// PR2558 DOUBLE DIAMOND 011 DOUBLEDIAMONDSND DOUBLE DIAMOND
-GAME( 200?, sc4dbldm ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Double Diamond (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4dbldm ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Double Diamond (Qps) (Scorpion 4)", GAME_NOT_WORKING )
// PR1104 DYNAMITE PR1104 DYNAMITE SOUNDS11
-GAME( 200?, sc4dyna ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Dynamite (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dynaa ,sc4dyna, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Dynamite (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dyna ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Dynamite (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dynaa ,sc4dyna, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Dynamite (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1017 EASY STREAK PR1017 EASY STREAK SOUNDS11 EASY STREAK
-GAME( 200?, sc4easy ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4easya ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4easyb ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4easyc ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4easyd ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4easye ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4easyf ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4easy ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4easya ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4easyb ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4easyc ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4easyd ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4easye ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4easyf ,sc4easy, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Easy Streak (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
//PROJECT NUMBER PR1955 CLUB MONEYBAGS MONEY BAGS CLUB PR1955 C M MONEYBAGS SOUNDS11 DEAL OR NO DEAL 5-10-20 10-20-30 20-30-50 30-50-100
-GAME( 200?, sc4clbmn ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbmna ,sc4clbmn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbmnb ,sc4clbmn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4clbmnc ,sc4clbmn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbmn ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbmna ,sc4clbmn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbmnb ,sc4clbmn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4clbmnc ,sc4clbmn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Club Moneybags (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4boomb_reel_configs[6] =
@@ -32958,8 +32958,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4boomb)
}
//PROJECT NUMBER PR3332 AWP MONOPOLY BOOM OR BUST S4 PR3307 MPOLY BOOM OR B SOUNDS11 BOOM OR BUST S.SITE
-GAME( 200?, sc4boomb ,0, sc4, sc4, sc4_state, sc4boomb, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4boomba ,sc4boomb, sc4, sc4, sc4_state, sc4boomb, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4boomb ,0, sc4, sc4, sc4_state, sc4boomb, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4boomba ,sc4boomb, sc4, sc4, sc4_state, sc4boomb, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
@@ -32981,21 +32981,21 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fever)
// we have FEVER SOUNDS12 but it accepts those?
// PR1007 FEVER PR1007 FEVER SOUNDS11
-GAME( 200?, sc4fever ,0, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fevera ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4feverb ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4feverc ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4feverd ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fevere ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4feverf ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4feverg ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4feverh ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4feverk ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fever ,0, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fevera ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4feverb ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4feverc ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4feverd ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fevere ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4feverf ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4feverg ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4feverh ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4feverk ,sc4fever, sc4, sc4, sc4_state, sc4fever, ROT0, "BFM","Fever (PR1007) (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7054 POWER BALL POWERBALL SOUNDS
-GAME( 200?, sc4pwrbq ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Power Ball (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pwrbqa ,sc4pwrbq, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Power Ball (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrbq ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Power Ball (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pwrbqa ,sc4pwrbq, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Power Ball (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
/**********************************************************************************************************************************/
@@ -33020,8 +33020,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4aztec)
}
-GAME( 200?, sc4aztec ,0, sc4, sc4, sc4_state, sc4aztec, ROT0, "BFG / Eurocoin","Aztec Casino (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )// PR1225 AZTEC CASINO
-GAME( 200?, sc4azteca ,sc4aztec, sc4, sc4, sc4_state, sc4aztec, ROT0, "BFG / Eurocoin","Aztec (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1215 AZTEC EURO
+GAME( 200?, sc4aztec ,0, sc4, sc4, sc4_state, sc4aztec, ROT0, "BFG / Eurocoin","Aztec Casino (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )// PR1225 AZTEC CASINO
+GAME( 200?, sc4azteca ,sc4aztec, sc4, sc4, sc4_state, sc4aztec, ROT0, "BFG / Eurocoin","Aztec (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1215 AZTEC EURO
static const stepper_interface* sc4helrd_reel_configs[6] =
@@ -33041,8 +33041,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4helrd)
}
// PR1254 HELLRAISER ART12 95004326 HELLRAISER PR1254
-GAME( 200?, sc4helrd ,0, sc4, sc4, sc4_state, sc4helrd, ROT0, "BFM","Hellraiser (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4helrs ,sc4helrd, sc4, sc4, sc4_state, sc4helrd, ROT0, "BFM","Hellraiser (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4helrd ,0, sc4, sc4, sc4_state, sc4helrd, ROT0, "BFM","Hellraiser (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4helrs ,sc4helrd, sc4, sc4, sc4_state, sc4helrd, ROT0, "BFM","Hellraiser (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4heatw_reel_configs[6] =
@@ -33064,7 +33064,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4heatw)
// PR1216 HEATWAVE ART 12 95004287 HEATWAVE PR1156
-GAME( 200?, sc4heatw ,0, sc4, sc4, sc4_state, sc4heatw, ROT0, "BFM","Heatwave (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4heatw ,0, sc4, sc4, sc4_state, sc4heatw, ROT0, "BFM","Heatwave (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4colos_reel_configs[6] =
@@ -33085,7 +33085,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4colos)
// PR1208 COLOSSUS 95004235 COLOSSUS PR7155 COLOSSUS
-GAME( 200?, sc4colos ,0, sc4, sc4, sc4_state, sc4colos, ROT0, "BFM","Colossus (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4colos ,0, sc4, sc4, sc4_state, sc4colos, ROT0, "BFM","Colossus (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4fevdt_reel_configs[6] =
{
@@ -33104,9 +33104,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fevdt)
}
// PR1202 FEVER 95004239 FEVER PR7157
-GAME( 200?, sc4fevdt ,0, sc4, sc4, sc4_state, sc4fevdt, ROT0, "BFM","Fever (PR1202) (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fevdta ,sc4fevdt, sc4, sc4, sc4_state, sc4fevdt, ROT0, "BFM","Fever (PR1202) (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4fevdtb ,sc4fevdt, sc4, sc4, sc4_state, sc4fevdt, ROT0, "BFM","Fever (PR1202) (Dutch) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4fevdt ,0, sc4, sc4, sc4_state, sc4fevdt, ROT0, "BFM","Fever (PR1202) (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fevdta ,sc4fevdt, sc4, sc4, sc4_state, sc4fevdt, ROT0, "BFM","Fever (PR1202) (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fevdtb ,sc4fevdt, sc4, sc4, sc4_state, sc4fevdt, ROT0, "BFM","Fever (PR1202) (Dutch) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4fevnx_reel_configs[6] =
{
@@ -33125,8 +33125,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4fevnx)
}
// PR1216 FEVER ART12 95004318 FEVER T N PR1251
-GAME( 200?, sc4fevnx ,0, sc4, sc4, sc4_state, sc4fevnx, ROT0, "BFM","Fever The Next (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4fevnxa ,sc4fevnx, sc4, sc4, sc4_state, sc4fevnx, ROT0, "BFM","Fever The Next (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4fevnx ,0, sc4, sc4, sc4_state, sc4fevnx, ROT0, "BFM","Fever The Next (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4fevnxa ,sc4fevnx, sc4, sc4, sc4_state, sc4fevnx, ROT0, "BFM","Fever The Next (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4game_reel_configs[6] =
{
@@ -33144,8 +33144,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4game)
m_reel_setup = sc4game_reel_configs;
}
-GAME( 200?, sc4gamcs ,0, sc4, sc4, sc4_state, sc4game, ROT0, "BFM","The Game Casino (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1224 THE GAME CASINO 95004285 THEGAME PR1153
-GAME( 200?, sc4game ,sc4gamcs, sc4, sc4, sc4_state, sc4game, ROT0, "BFM","The Game (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1213 THE GAME 95004285 THEGAME PR1153
+GAME( 200?, sc4gamcs ,0, sc4, sc4, sc4_state, sc4game, ROT0, "BFM","The Game Casino (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1224 THE GAME CASINO 95004285 THEGAME PR1153
+GAME( 200?, sc4game ,sc4gamcs, sc4, sc4, sc4_state, sc4game, ROT0, "BFM","The Game (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1213 THE GAME 95004285 THEGAME PR1153
static const stepper_interface* sc4goud_reel_configs[6] =
{
@@ -33164,7 +33164,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4goud)
}
// PR1211 GOUDKOORTS 95004288 GOUDKOORTS PR1151
-GAME( 200?, sc4goud ,0, sc4, sc4, sc4_state, sc4goud, ROT0, "BFM","Goudkoorts (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4goud ,0, sc4, sc4, sc4_state, sc4goud, ROT0, "BFM","Goudkoorts (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4lasv_reel_configs[6] =
@@ -33184,8 +33184,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4lasv)
}
// PR1209 LAS VEGAS 95004261 LASVEGAS PR7159
-GAME( 200?, sc4lasv ,0, sc4, sc4, sc4_state, sc4lasv, ROT0, "BFM","Las Vegas (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4lasva ,sc4lasv, sc4, sc4, sc4_state, sc4lasv, ROT0, "BFM","Las Vegas (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4lasv ,0, sc4, sc4, sc4_state, sc4lasv, ROT0, "BFM","Las Vegas (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4lasva ,sc4lasv, sc4, sc4, sc4_state, sc4lasv, ROT0, "BFM","Las Vegas (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4miljo_reel_configs[6] =
{
@@ -33204,8 +33204,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4miljo)
}
-GAME( 200?, sc4miljo ,0, sc4, sc4, sc4_state, sc4miljo, ROT0, "BFM","Miljonairs (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR1217 MILJONAIRSART12 95004305 MILJONAIRE PR1157
-GAME( 200?, sc4milja ,sc4miljo, sc4, sc4, sc4_state, sc4miljo, ROT0, "BFM","Miljonairs Arcade (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1223 MILJONAIRS 95004305 MILJONAIRE PR1157
+GAME( 200?, sc4miljo ,0, sc4, sc4, sc4_state, sc4miljo, ROT0, "BFM","Miljonairs (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR1217 MILJONAIRSART12 95004305 MILJONAIRE PR1157
+GAME( 200?, sc4milja ,sc4miljo, sc4, sc4, sc4_state, sc4miljo, ROT0, "BFM","Miljonairs Arcade (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING ) // PR1223 MILJONAIRS 95004305 MILJONAIRE PR1157
static const stepper_interface* sc4paytm_reel_configs[6] =
{
@@ -33224,7 +33224,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4paytm)
}
// PR1205 PAY TIME 95004224 PAYTIME PR7156 PAY TIME
-GAME( 200?, sc4paytm ,0, sc4, sc4, sc4_state, sc4paytm, ROT0, "BFM","Pay Time (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4paytm ,0, sc4, sc4, sc4_state, sc4paytm, ROT0, "BFM","Pay Time (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4pglcs_reel_configs[6] =
@@ -33244,9 +33244,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pglcs)
}
// PR1261 PHARAOH'S GOLD 95004316 CAS PHAR GOLD PR1261
-GAME( 200?, sc4pglcs ,0, sc4, sc4, sc4_state, sc4pglcs, ROT0, "BFM","Pharaoh's Gold Casino (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglcsa ,sc4pglcs, sc4, sc4, sc4_state, sc4pglcs, ROT0, "BFM","Pharaoh's Gold Casino (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4pglcsb ,sc4pglcs, sc4, sc4, sc4_state, sc4pglcs, ROT0, "BFM","Pharaoh's Gold Casino (Dutch) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglcs ,0, sc4, sc4, sc4_state, sc4pglcs, ROT0, "BFM","Pharaoh's Gold Casino (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglcsa ,sc4pglcs, sc4, sc4, sc4_state, sc4pglcs, ROT0, "BFM","Pharaoh's Gold Casino (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4pglcsb ,sc4pglcs, sc4, sc4, sc4_state, sc4pglcs, ROT0, "BFM","Pharaoh's Gold Casino (Dutch) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4redad_reel_configs[6] =
{
@@ -33266,8 +33266,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4redad)
// PR1206 RED ALERT 95004266 REDALERT PR1051
-GAME( 200?, sc4redad ,0, sc4, sc4, sc4_state, sc4redad, ROT0, "BFM","Red Alert (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4redada ,sc4redad, sc4, sc4, sc4_state, sc4redad, ROT0, "BFM","Red Alert (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4redad ,0, sc4, sc4, sc4_state, sc4redad, ROT0, "BFM","Red Alert (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4redada ,sc4redad, sc4, sc4, sc4_state, sc4redad, ROT0, "BFM","Red Alert (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
static const stepper_interface* sc4rvlnx_reel_configs[6] =
@@ -33288,7 +33288,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rvlnx)
// PR1252 REVOLUTION NEXT 95004320 REVOLUTIONTN PR1252
-GAME( 200?, sc4rvlnx ,0, sc4, sc4, sc4_state, sc4rvlnx, ROT0, "BFM","Revolution The Next (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rvlnx ,0, sc4, sc4, sc4_state, sc4rvlnx, ROT0, "BFM","Revolution The Next (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4rvl_reel_configs[6] =
{
@@ -33308,7 +33308,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rvl)
// PR1203 REVOLUTION 95004259 REVOLUTION PR7158
-GAME( 200?, sc4rvl ,0, sc4, sc4, sc4_state, sc4rvl, ROT0, "BFM","Revolution (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rvl ,0, sc4, sc4, sc4_state, sc4rvl, ROT0, "BFM","Revolution (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4rio_reel_configs[6] =
{
@@ -33327,7 +33327,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4rio)
}
// PR1222 RIO GRANDE 95004309 RIO GRANDE SOUNDS11
-GAME( 200?, sc4rio ,0, sc4, sc4, sc4_state, sc4rio, ROT0, "BFM","Rio Grande (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4rio ,0, sc4, sc4, sc4_state, sc4rio, ROT0, "BFM","Rio Grande (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4strbr_reel_configs[6] =
@@ -33347,12 +33347,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4strbr)
}
// PR1219 STARS 'N BARS 95004290 STARSNBARS PR1159
-GAME( 200?, sc4strbr ,0, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars (PR1219) (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4strbrb ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars (PR1219) (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4strbr ,0, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars (PR1219) (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4strbrb ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars (PR1219) (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1263 SNBA ART13 STARS 'N' BARS ARCADE - ART13 95004290 STARSNBARS PR1159
-GAME( 200?, sc4strbra ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars Arcade (PR1263) (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4strbrc ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars Arcade (PR1263) (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4strbrd ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars Arcade (PR1263) (Dutch) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4strbra ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars Arcade (PR1263) (Dutch) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4strbrc ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars Arcade (PR1263) (Dutch) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4strbrd ,sc4strbr, sc4, sc4, sc4_state, sc4strbr, ROT0, "BFM","Stars 'n' Bars Arcade (PR1263) (Dutch) (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
static const stepper_interface* sc4twilt_reel_configs[6] =
{
@@ -33372,7 +33372,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4twilt)
// PR1214 TWILIGHT 95004299 TWILIGHT PR1154
-GAME( 200?, sc4twilt ,0, sc4, sc4, sc4_state, sc4twilt, ROT0, "BFM","Twilight (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4twilt ,0, sc4, sc4, sc4_state, sc4twilt, ROT0, "BFM","Twilight (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4monsp_reel_configs[6] =
@@ -33392,7 +33392,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4monsp)
}
// PR1218 MONEY SPINNER ART12 95004291 MONEYSPINNER PR1158
-GAME( 200?, sc4monsp ,0, sc4, sc4, sc4_state, sc4monsp, ROT0, "BFM","Money Spinner (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4monsp ,0, sc4, sc4, sc4_state, sc4monsp, ROT0, "BFM","Money Spinner (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ivply_reel_configs[6] =
@@ -33413,7 +33413,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ivply)
// PR1227 4PLAY ART13 95004313 4PLAY PR1227
-GAME( 200?, sc4ivply ,0, sc4, sc4, sc4_state, sc4ivply, ROT0, "BFM","4 Play (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ivply ,0, sc4, sc4, sc4_state, sc4ivply, ROT0, "BFM","4 Play (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4ccc_reel_configs[6] =
{
@@ -33433,7 +33433,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ccc)
// PR1221 CRISSCROSSCRAZY ART13 95004282 CRISSCROSS PR1161
-GAME( 200?, sc4ccc ,0, sc4, sc4, sc4_state, sc4ccc, ROT0, "BFM","Criss Cross Crazy (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4ccc ,0, sc4, sc4, sc4_state, sc4ccc, ROT0, "BFM","Criss Cross Crazy (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4valqp_reel_configs[6] =
{
@@ -33452,7 +33452,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4valqp)
}
// PR2040E VALHALLA...PR2040 SOUNDS V1.... (non-standard header)
-GAME( 200?, sc4valqp ,0, sc4, sc4, sc4_state, sc4valqp, ROT0, "Qps / Eurocoin","Valhalla (Dutch) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4valqp ,0, sc4, sc4, sc4_state, sc4valqp, ROT0, "Qps / Eurocoin","Valhalla (Dutch) (Qps) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4winxp_reel_configs[6] =
@@ -33472,7 +33472,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4winxp)
}
// PR1207 WIN XPLOSION 95004265 WINXPLOSION PR1053
-GAME( 200?, sc4winxp ,0, sc4, sc4, sc4_state, sc4winxp, ROT0, "BFM","Win X-plosion (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4winxp ,0, sc4, sc4, sc4_state, sc4winxp, ROT0, "BFM","Win X-plosion (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4xcash_reel_configs[6] =
@@ -33493,7 +33493,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4xcash)
// PR1264 XTRA CASH ART13 XTRA CASH CASINO (LOTECH) - ART13 95004321 XTRACASH PR1264
-GAME( 200?, sc4xcash ,0, sc4, sc4, sc4_state, sc4xcash, ROT0, "BFM","Xtra Cash Casino (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4xcash ,0, sc4, sc4, sc4_state, sc4xcash, ROT0, "BFM","Xtra Cash Casino (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4helld_reel_configs[6] =
{
@@ -33513,7 +33513,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4helld)
// PR1201 HELLS BELLS 95004211 HELLS BELLS PR6945 HELLS BELLS (non english?)
-GAME( 200?, sc4helld ,0, sc4, sc4, sc4_state, sc4helld, ROT0, "BFM / Eurocoin","Hells Bells (PR1201) (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4helld ,0, sc4, sc4, sc4_state, sc4helld, ROT0, "BFM / Eurocoin","Hells Bells (PR1201) (Dutch) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4cashn_reel_configs[6] =
{
@@ -33533,7 +33533,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cashn)
// PR2038E Dutch12 Cashanova (not a standard string)
-GAME( 200?, sc4cashn ,0, sc4, sc4, sc4_state, sc4cashn, ROT0, "Mazooma / Eurocoin","Cashanova (Dutch) (Mazooma / Eurocoin) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cashn ,0, sc4, sc4, sc4_state, sc4cashn, ROT0, "Mazooma / Eurocoin","Cashanova (Dutch) (Mazooma / Eurocoin) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4czfra_reel_configs[6] =
@@ -33554,7 +33554,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4czfra)
// PR1212 CRAZY FRUITS PR1152 CRAZY FRUITS SOUNDS11
-GAME( 200?, sc4czfra ,0, sc4, sc4, sc4_state, sc4czfra, ROT0, "BFM","Crazy Fruits (Dutch) (PR1212, CRAZ) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4czfra ,0, sc4, sc4, sc4_state, sc4czfra, ROT0, "BFM","Crazy Fruits (Dutch) (PR1212, CRAZ) (Bellfruit) (Scorpion 4)", GAME_NOT_WORKING )
/**********************************************************************************************************************************/
@@ -33580,7 +33580,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4polen)
}
// PR7012 GERMAN POLE POSITION PR7012 SOUNDS
-GAME( 200?, sc4polen ,0, sc4, sc4, sc4_state, sc4polen, ROT0, "Nova","Pole Position (German) (PR7012, GPOS) (Nova) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4polen ,0, sc4, sc4, sc4_state, sc4polen, ROT0, "Nova","Pole Position (German) (PR7012, GPOS) (Nova) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4valnv_reel_configs[6] =
@@ -33601,7 +33601,7 @@ DRIVER_INIT_MEMBER(sc4_state,sc4valnv)
// PR7025 GERMAN VALHALLA 7025 VER1 SOUNDS
-GAME( 200?, sc4valnv ,0, sc4, sc4, sc4_state, sc4valnv, ROT0, "Nova","Valhalla (German) (PR7025, GVAL) (Nova) (Scorpion 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4valnv ,0, sc4, sc4, sc4_state, sc4valnv, ROT0, "Nova","Valhalla (German) (PR7025, GVAL) (Nova) (Scorpion 4)", GAME_NOT_WORKING )
static const stepper_interface* sc4wernr_reel_configs[6] =
@@ -33621,8 +33621,8 @@ DRIVER_INIT_MEMBER(sc4_state,sc4wernr)
}
// PR7027 GERMAN WERNER PR7027 SOUNDS V1
-GAME( 200?, sc4wernr ,0, sc4, sc4, sc4_state, sc4wernr, ROT0, "Nova","Werner (German) (PR7027, GWER) (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4wrnlt ,sc4wernr, sc4, sc4, sc4_state, sc4wernr, ROT0, "Nova","Werner (German) (PR7027, GWER) (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4wernr ,0, sc4, sc4, sc4_state, sc4wernr, ROT0, "Nova","Werner (German) (PR7027, GWER) (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4wrnlt ,sc4wernr, sc4, sc4, sc4_state, sc4wernr, ROT0, "Nova","Werner (German) (PR7027, GWER) (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
/**********************************************************************************************************************************/
@@ -33630,135 +33630,135 @@ GAME( 200?, sc4wrnlt ,sc4wernr, sc4, sc4, sc4_state, sc4wernr, ROT0, "Nova","Wer
/**********************************************************************************************************************************/
// not sure this is SC4, it crashes MAME and the addresses it accesses look strange
-GAME( 200?, sc4milro ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Millionaires Row (Scorpion 4?)", GAME_NOT_WORKING )
+GAME( 200?, sc4milro ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Millionaires Row (Scorpion 4?)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR1611 AWP ANT AND DECS PR1611 ANT AND DECS SOUNDS11 ANT AND DECS S.SITE
-GAME( 200?, sc4adsnt ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4adsnta ,sc4adsnt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4adsnt ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4adsnta ,sc4adsnt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR1411 AWP SNAKES AND LADDERS PR1411 SNAKES A L SOUNDS11 SNAKES & LADDERS S.SITE
-GAME( 200?, sc4slad ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4slada ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4sladb ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4sladc ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4sladd ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4slade ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4sladf ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4sladg ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4sladh ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4slad ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4slada ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4sladb ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4sladc ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4sladd ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4slade ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4sladf ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4sladg ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4sladh ,sc4slad, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR2535 MAGIC CIRCLE STANDARD 011 MAGICSND
-GAME( 200?, sc4magci ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcik ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magci ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (011) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcik ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (011) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 021 MAGICSND
-GAME( 200?, sc4magcia ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (021) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcil ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (021) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcia ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (021) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcil ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (021) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 031 MAGICSND
-GAME( 200?, sc4magcib ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (031) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcim ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (031) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcib ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (031) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcim ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (031) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 012 MAGICSND
-GAME( 200?, sc4magcic ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcin ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcid ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcio ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcic ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcin ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcid ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcio ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (012) (Qps) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
//P R2535 MAGIC CIRCLE STANDARD 022 MAGICSND
-GAME( 200?, sc4magcie ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (022) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcip ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (022) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcie ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (022) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcip ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (022) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 032 MAGICSND
-GAME( 200?, sc4magcif ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (032) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magciq ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (032) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcif ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (032) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magciq ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (032) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 013 MAGICSND
-GAME( 200?, sc4magcig ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (013) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcir ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (013) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcig ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (013) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcir ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (013) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 014 MAGICSND
-GAME( 200?, sc4magcih ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (014) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcis ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (014) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcih ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (014) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcis ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (014) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 024 MAGICSND
-GAME( 200?, sc4magcii ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (024) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magcit ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (024) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcii ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (024) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcit ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (024) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2535 MAGIC CIRCLE STANDARD 034 MAGICSND
-GAME( 200?, sc4magcij ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (034) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4magciu ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (034) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4magcij ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (034) (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4magciu ,sc4magci, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Magic Circle (034) (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR2544 DOUBLE CRAZY REELS 021 DCRZYSND
-GAME( 200?, sc4dcrls ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (021) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dcrlsf ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (021) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrls ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (021) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsf ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (021) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2544 DOUBLE CRAZY REELS 031 DCRZYSND
-GAME( 200?, sc4dcrlsa ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (031) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dcrlsg ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (031) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsa ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (031) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsg ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (031) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2544 DOUBLE CRAZY REELS 022 DCRZYSND
-GAME( 200?, sc4dcrlsb ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (022) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dcrlsh ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (022) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsb ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (022) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsh ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (022) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2544 DOUBLE CRAZY REELS 032 DCRZYSND
-GAME( 200?, sc4dcrlsc ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (032) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dcrlsi ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (032) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsc ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (032) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsi ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (032) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2544 DOUBLE CRAZY REELS 023 DCRZYSND
-GAME( 200?, sc4dcrlsd ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (023) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dcrlsj ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (023) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsd ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (023) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsj ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (023) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2544 DOUBLE CRAZY REELS 033 DCRZYSND
-GAME( 200?, sc4dcrlse ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (033) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4dcrlsk ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (033) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlse ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (033) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4dcrlsk ,sc4dcrls, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Double Crazy Reels (033) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR2564 GOLDEN SHOT Standard Version GOLDENSHOTLOTECHSND
-GAME( 200?, sc4gshot ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gshotb ,sc4gshot, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gshot ,0, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gshotb ,sc4gshot, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR2564 GOLDEN SHOT Arcade Version GOLDENSHOTLOTECHSND
-GAME( 200?, sc4gshota ,sc4gshot, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot Arcade (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gshotc ,sc4gshot, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot Arcade (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gshota ,sc4gshot, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot Arcade (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gshotc ,sc4gshot, sc4, sc4, sc4_state, sc4, ROT0, "Qps","Golden Shot Arcade (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR1416 COOL JEWELS PR1416 COOL JEWELS SOUNDS11 COOL JEWELS S.SITE
-GAME( 200?, sc4cj ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4cja ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjb ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjc ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4cjd ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4cj ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4cja ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjb ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjc ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4cjd ,sc4cj, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING ) // incomplete pairing
// PAY UNIT ERROR 17
// PR1638 AWP CROWN JEWELS PR1608 CROWN JEWELS SOUNDS11 CROWN JEWELS S.SITE
-GAME( 200?, sc4crnjw ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crown Jewels (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4crnjwa ,sc4crnjw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crown Jewels (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4crnjw ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crown Jewels (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4crnjwa ,sc4crnjw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crown Jewels (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR1609 JACKPOT JOKERS PR1609 JACKPOT JOKERS SOUNDS11 JACKPOT JOKERS S.SITE
-GAME( 200?, sc4jjok ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4jjoka ,sc4jjok, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjok ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4jjoka ,sc4jjok, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// fails to boot, like many of the Pole Position sets, probably needs some specific dips setting due to buggy code?
// PR7008 CHUBBY DOES VEGAS VEGAS SOUNDS11
-GAME( 200?, sc4chub ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Chubby Does Vegas (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4chuba ,sc4chub, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Chubby Does Vegas (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4chubb ,sc4chub, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Chubby Does Vegas (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4chub ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Chubby Does Vegas (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4chuba ,sc4chub, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Chubby Does Vegas (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4chubb ,sc4chub, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Chubby Does Vegas (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PAY UNIT ERR 17
// PR1412 AWP COPS AND ROBBERS PR1412 COPS AND ROBBERS SOUNDS11 COPS AND ROBBERS S.SITE
-GAME( 200?, sc4copsr ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsra ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsrb ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsrc ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsrd ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsre ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsrf ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsrg ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsrh ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4copsri ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsr ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsra ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsrb ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsrc ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsrd ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsre ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsrf ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsrg ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsrh ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4copsri ,sc4copsr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
// gives an 'init comms' countdown
// PR1439 DIAMONDS & RUBIES PR1436 TRIPLE CASINO SOUNDS11
-GAME( 200?, sc4druby ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4drubya ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4drubyb ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 3)", GAME_NOT_WORKING ) // incomplete pairing
-GAME( 200?, sc4drubyc ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4drubyd ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4druby ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4drubya ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4drubyb ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 3)", GAME_NOT_WORKING ) // incomplete pairing
+GAME( 200?, sc4drubyc ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4drubyd ,sc4druby, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Diamonds & Rubies (Bellfruit) (Scorpion 4) (Top Box?, set 5)", GAME_NOT_WORKING )
/****************************************************************************************************************************************************************************************************************/
@@ -33791,18 +33791,18 @@ DRIVER_INIT_MEMBER(sc4_state,sc4abra)
// missing sound roms
// PR2540 ABRACADABRA ABRA SOUNDS ABRACADABRA
-GAME( 200?, sc4abra ,0, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 1, 041)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4abraa ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 2, 041)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4abrab ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 3, 044)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4abrac ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 4, 044)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4abrad ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 5, 014)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4abrae ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 6, 014)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4abra ,0, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 1, 041)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4abraa ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 2, 041)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4abrab ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 3, 044)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4abrac ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 4, 044)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4abrad ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 5, 014)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4abrae ,sc4abra, sc4, sc4, sc4_state, sc4abra, ROT0, "Qps","Abracadabra (Qps) (Scorpion 4) (set 6, 014)", GAME_NOT_WORKING | GAME_NO_SOUND )
// bad / missing sound roms
// PR7068 ALADDIN'S CAVE CAVE SOUNDS
-GAME( 200?, sc4alad ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Aladdin's Cave (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4alada ,sc4alad, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Aladdin's Cave (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4alad ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Aladdin's Cave (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4alada ,sc4alad, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Aladdin's Cave (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
@@ -33825,20 +33825,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bigdl)
// missing sound roms, doesn't play
// PR2501 BIG DEAL BIGDEALSND BIG DEAL
-GAME( 200?, sc4bigdl ,0, sc4, sc4, sc4_state, sc4bigdl, ROT0, "Qps","Big Deal (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bigdla ,sc4bigdl, sc4, sc4, sc4_state, sc4bigdl, ROT0, "Qps","Big Deal (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bigdl ,0, sc4, sc4, sc4_state, sc4bigdl, ROT0, "Qps","Big Deal (Qps) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bigdla ,sc4bigdl, sc4, sc4, sc4_state, sc4bigdl, ROT0, "Qps","Big Deal (Qps) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// no sound roms, doesn't init properly (doesn't even attempt reel test)
// PR7011 BLUE RINSE BRINSE SOUNDS
-GAME( 200?, sc4blue ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bluea ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4blueb ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bluec ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4blued ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bluee ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4blue ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bluea ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4blueb ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bluec ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4blued ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bluee ,sc4blue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Blue Rinse (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4brix_reel_configs[6] =
@@ -33860,9 +33860,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4brix)
// no sound roms
// PR2023.GERMAN BRIX...........PR2023,German BRIX,......PR2023 SOUNDS V1 (non-standard header)
-GAME( 200?, sc4brix ,0, sc4, sc4, sc4_state, sc4brix, ROT0, "Nova","Brix (German) (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4brixa ,sc4brix, sc4, sc4, sc4_state, sc4brix, ROT0, "Nova","Brix (German) (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4brixb ,sc4brix, sc4, sc4, sc4_state, sc4brix, ROT0, "Nova","Brix (German) (Nova) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4brix ,0, sc4, sc4, sc4_state, sc4brix, ROT0, "Nova","Brix (German) (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4brixa ,sc4brix, sc4, sc4, sc4_state, sc4brix, ROT0, "Nova","Brix (German) (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4brixb ,sc4brix, sc4, sc4, sc4_state, sc4brix, ROT0, "Nova","Brix (German) (Nova) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4bugs_reel_configs[6] =
@@ -33884,10 +33884,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4bugs)
// no sound roms
// PR7109 BUGS MONEY PR7109 BUGS MONEY SOUNDS11 BUGS MONEY
-GAME( 200?, sc4bugs ,0, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bugsa ,sc4bugs, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bugsb ,sc4bugs, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bugsc ,sc4bugs, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bugs ,0, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bugsa ,sc4bugs, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bugsb ,sc4bugs, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bugsc ,sc4bugs, sc4, sc4, sc4_state, sc4bugs, ROT0, "BFM","Bugs Money (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4cconx_reel_configs[6] =
@@ -33926,15 +33926,15 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cconxd)
// no sound roms
// PR7038 CASH CONNEXION MTOM SOUNDS
-GAME( 200?, sc4cconx ,0, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cconxa ,sc4cconx, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cconxb ,sc4cconx, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cconxc ,sc4cconx, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cconxd ,sc4cconx, sc4, sc4, sc4_state, sc4cconxd, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND ) // this one won't init without a 200 step reel
+GAME( 200?, sc4cconx ,0, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cconxa ,sc4cconx, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cconxb ,sc4cconx, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cconxc ,sc4cconx, sc4, sc4, sc4_state, sc4cconx, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cconxd ,sc4cconx, sc4, sc4, sc4_state, sc4cconxd, ROT0, "Mazooma","Cash Connexion (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND ) // this one won't init without a 200 step reel
// PR7029 MONEY TO MONEY MTOM SOUNDS
-GAME( 200?, sc4m2m ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Money To Money (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4m2ma ,sc4m2m, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Money To Money (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4m2m ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Money To Money (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4m2ma ,sc4m2m, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Money To Money (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4ccrus_reel_configs[6] =
@@ -33955,9 +33955,9 @@ DRIVER_INIT_MEMBER(sc4_state,sc4ccrus)
// no sound roms (probably doesn't want cashanova, but check)
// PR2006 CASH CRUSADERS CASH SOUNDS CASH CRUSADERS
-GAME( 200?, sc4ccrus ,0, sc4, sc4, sc4_state, sc4ccrus, ROT0, "Mazooma","Cash Crusaders (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ccrusa ,sc4ccrus, sc4, sc4, sc4_state, sc4ccrus, ROT0, "Mazooma","Cash Crusaders (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ccrusb ,sc4ccrus, sc4, sc4, sc4_state, sc4ccrus, ROT0, "Mazooma","Cash Crusaders (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ccrus ,0, sc4, sc4, sc4_state, sc4ccrus, ROT0, "Mazooma","Cash Crusaders (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ccrusa ,sc4ccrus, sc4, sc4, sc4_state, sc4ccrus, ROT0, "Mazooma","Cash Crusaders (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ccrusb ,sc4ccrus, sc4, sc4, sc4_state, sc4ccrus, ROT0, "Mazooma","Cash Crusaders (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4chand_reel_configs[6] =
@@ -33978,10 +33978,10 @@ DRIVER_INIT_MEMBER(sc4_state,sc4chand)
// no sound roms
// PR7108 CASH IN HAND PR7108 CASH IN HAND SOUNDS11 CASH IN HAND
-GAME( 200?, sc4chand ,0, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4chanda ,sc4chand, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4chandb ,sc4chand, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4chandc ,sc4chand, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4chand ,0, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4chanda ,sc4chand, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4chandb ,sc4chand, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4chandc ,sc4chand, sc4, sc4, sc4_state, sc4chand, ROT0, "BFM","Cash In Hand (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4cinv_reel_configs[6] =
@@ -34003,16 +34003,16 @@ DRIVER_INIT_MEMBER(sc4_state,sc4cinv)
// no sound roms
// PR6809 CASHINVADERS PR6809 CASHINVADERS SOUNDS
-GAME( 200?, sc4cinv ,0, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinva ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinvb ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinvc ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinvd ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinve ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinvf ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinvg ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinvh ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cinvi ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinv ,0, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinva ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinvb ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinvc ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinvd ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinve ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinvf ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinvg ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinvh ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cinvi ,sc4cinv, sc4, sc4, sc4_state, sc4cinv, ROT0, "BFM","Cash Invaders (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4jjc_reel_configs[6] =
@@ -34033,39 +34033,39 @@ DRIVER_INIT_MEMBER(sc4_state,sc4jjc)
}
// PR2152 JUMPIN JACK CASH JACK SOUNDS JUMPIN JACK CASH
-GAME( 200?, sc4jjc ,0, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjca ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjcb ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjcc ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjcd ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjce ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjcf ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjcg ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjch ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jjci ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjc ,0, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjca ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjcb ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjcc ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjcd ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjce ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjcf ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjcg ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjch ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jjci ,sc4jjc, sc4, sc4, sc4_state, sc4jjc, ROT0, "Mazooma","Jumping Jack Cash (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7103 JUNGLE BUCKS PR7103 JUNGLEBUCKS SOUNDS11 JUNGLE BUCKS
-GAME( 200?, sc4jbuck ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jbucka ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jbuckb ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jbuckc ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jbuckd ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jbuck ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jbucka ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jbuckb ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jbuckc ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jbuckd ,sc4jbuck, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Jungle Bucks (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2161 KING KONG CASH 000 KKCSH SOUNDS KING KONG CASH
-GAME( 200?, sc4kkong ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkonga ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongb ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongc ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongd ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkonge ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongf ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongg ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongh ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongi ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4kkongj ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkong ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkonga ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongb ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongc ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongd ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkonge ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongf ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongg ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongh ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongi ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4kkongj ,sc4kkong, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","King Kong Cash (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4knok_reel_configs[6] =
{
@@ -34102,12 +34102,12 @@ DRIVER_INIT_MEMBER(sc4_state,sc4knokb)
// PR7061 KNOCKOUT KOUT SOUNDS
-GAME( 200?, sc4knok ,0, sc4, sc4, sc4_state, sc4knok, ROT0, "Mazooma","Knockout (PR7061, KOUT) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4knoka ,sc4knok, sc4, sc4, sc4_state, sc4knok, ROT0, "Mazooma","Knockout (PR7061, KOUT) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4knok ,0, sc4, sc4, sc4_state, sc4knok, ROT0, "Mazooma","Knockout (PR7061, KOUT) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4knoka ,sc4knok, sc4, sc4, sc4_state, sc4knok, ROT0, "Mazooma","Knockout (PR7061, KOUT) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// I think this is a different game
// PR2057 KNOCK OUT PKOT SOUNDS KNOCK OUT
-GAME( 200?, sc4knokb ,sc4knok, sc4, sc4, sc4_state, sc4knokb, ROT0, "Mazooma","Knockout (PR2057, PKOT) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4knokc ,sc4knok, sc4, sc4, sc4_state, sc4knokb, ROT0, "Mazooma","Knockout (PR2057, PKOT) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4knokb ,sc4knok, sc4, sc4, sc4_state, sc4knokb, ROT0, "Mazooma","Knockout (PR2057, PKOT) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4knokc ,sc4knok, sc4, sc4, sc4_state, sc4knokb, ROT0, "Mazooma","Knockout (PR2057, PKOT) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
@@ -34128,36 +34128,36 @@ DRIVER_INIT_MEMBER(sc4_state,sc4maxcc)
}
// PR2130 CLUB MAXIMUS CASH MAXIMUS CASH CLUB CMAX SOUNDS MAXIMUS CASH
-GAME( 200?, sc4maxcc ,0, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4maxcca ,sc4maxcc, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4maxccb ,sc4maxcc, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4maxccc ,sc4maxcc, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4maxcc ,0, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4maxcca ,sc4maxcc, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4maxccb ,sc4maxcc, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4maxccc ,sc4maxcc, sc4, sc4, sc4_state, sc4maxcc, ROT0, "Mazooma","Maximus Cash Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6904 MONEY BAGS PR6904 MONEY BAGS SOUNDS11
-GAME( 200?, sc4mbags ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mbagsa ,sc4mbags, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mbagsb ,sc4mbags, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mbagsc ,sc4mbags, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mbags ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mbagsa ,sc4mbags, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mbagsb ,sc4mbags, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mbagsc ,sc4mbags, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Money Bags (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// sound roms are bad, missing first 0x10000 bytes with header
// PR6938 TUTTI FRUTTI PR6938 FRUT SOUNDS11 TUTTI FRUTTI
-GAME( 200?, sc4tfclb ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Tutti Frutti Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tfclba ,sc4tfclb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Tutti Frutti Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tfclb ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Tutti Frutti Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tfclba ,sc4tfclb, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Tutti Frutti Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// doesn't like the sound rom we have even if the ID is right
// PR7022 UP FOR GRABS GRAB SOUNDS
-GAME( 200?, sc4ufg ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Up For Grabs (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ufga ,sc4ufg, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Up For Grabs (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ufg ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Up For Grabs (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ufga ,sc4ufg, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Up For Grabs (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6819 UP FOT IT PR6819 UP FOR IT SOUNDS11
-GAME( 200?, sc4ufi ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ufia ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ufib ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ufic ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ufid ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ufie ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
+GAME( 200?, sc4ufi ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ufia ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ufib ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ufic ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ufid ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ufie ,sc4ufi, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Up For It (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
static const stepper_interface* sc4wadzl_reel_configs[6] =
@@ -34177,110 +34177,110 @@ DRIVER_INIT_MEMBER(sc4_state,sc4wadzl)
}
// PR2052 WADZILLA WADZ SOUNDS WADZILLA
-GAME( 200?, sc4wadzl ,0, sc4, sc4, sc4_state, sc4wadzl, ROT0, "Mazooma","Wadzilla (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wadzla ,sc4wadzl, sc4, sc4, sc4_state, sc4wadzl, ROT0, "Mazooma","Wadzilla (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wadzl ,0, sc4, sc4, sc4_state, sc4wadzl, ROT0, "Mazooma","Wadzilla (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wadzla ,sc4wadzl, sc4, sc4, sc4_state, sc4wadzl, ROT0, "Mazooma","Wadzilla (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6812 WHO DARES WINS PR6812 WHO DARES WINS SOUNDS
-GAME( 200?, sc4wdw ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwa ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwb ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwc ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwd ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwe ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwf ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwg ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwh ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwi ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wdwj ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdw ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwa ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwb ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwc ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwd ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwe ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwf ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwg ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwh ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwi ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wdwj ,sc4wdw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Who Dares Wins (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7144 WILD BUNCH PR7144 CRAZY FRUITS SOUNDS11
-GAME( 200?, sc4wldbn ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbna ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnb ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnc ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnd ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbne ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnf ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbni ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnj ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnk ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnn ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbno ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnp ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnq ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbn ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbna ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnb ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnc ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnd ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbne ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnf ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbni ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnj ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnk ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnn ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 11)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbno ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 12)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnp ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 13)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnq ,sc4wldbn, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Bunch (Bellfruit) (Scorpion 4) (set 14)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7144 WILD BUNCH PR7144 WILD BUNCH SOUNDS11 CAS WILD BUNCH S.SITE
-GAME( 200?, sc4wldbng ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnh ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnl ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldbnm ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbng ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnh ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnl ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldbnm ,sc4wldbn, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Wild Bunch Casino (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7110 WILD THING PR7110 WILD THING SOUNDS11
-GAME( 200?, sc4wthng ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthnga ,sc4wthng, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthngb ,sc4wthng, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthngc ,sc4wthng, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthng ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnga ,sc4wthng, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthngb ,sc4wthng, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthngc ,sc4wthng, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Wild Thing (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// does NOT want 'WILD SOUNDS' from 'PR7065 WET 'N' WILD'
// PR7060CASINO WILDTHING WILD THING ARCADE WILD SOUNDS WILD THING
-GAME( 200?, sc4wthnm ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthnma ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthnmb ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthnmc ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthnmd ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthnme ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wthnmf ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnm ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnma ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnmb ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnmc ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnmd ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnme ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wthnmf ,sc4wthnm, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino Arcade (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7060CASINO WILDTHING WILD SOUNDS WILD THING
-GAME( 200?, sc4wtc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wtca ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wtcb ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wtcc ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wtcd ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wtce ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wtcf ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wtc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wtca ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wtcb ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wtcc ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wtcd ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wtce ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wtcf ,sc4wtc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Thing Casino (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
// RNG ERR 99
// PR21xx SECTION 16 SECT SOUNDS SECTION 16
-GAME( 200?, sc4s16 ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Section 16 (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4s16a ,sc4s16, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Section 16 (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4s16 ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Section 16 (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4s16a ,sc4s16, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Section 16 (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// both of these are incomplete
// P_O_E_T_N_M_E_ _R_0_1_B_A_K_G_L_ _._0_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _9_0_8_6_ _L_C_ _O_D_G_S_U_D_1_
-GAME( 200?, sc4bgold ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Black Gold (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
-GAME( 200?, sc4bgolda ,sc4bgold, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Black Gold (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
+GAME( 200?, sc4bgold ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Black Gold (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
+GAME( 200?, sc4bgolda ,sc4bgold, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Black Gold (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
// no identifiaction string
-GAME( 200?, sc4wag ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma/Nova","Win-A-Gain (German) (Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wag ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma/Nova","Win-A-Gain (German) (Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2170 BOBBY DAZZLER BOBD SOUNDS BOBBY DAZZLER
-GAME( 200?, sc4bob ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4boba ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobb ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobc ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobd ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobe ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobf ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobg ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobh ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bobi ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bob ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4boba ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobb ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobc ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobd ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobe ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobf ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobg ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobh ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bobi ,sc4bob, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2230 CLUEDO CLUE SOUNDS CLUEDO
-GAME( 200?, sc4clue ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cluea ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4clueb ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cluec ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4clued ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cluee ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cluef ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4clueg ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4clue ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cluea ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4clueb ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cluec ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4clued ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cluee ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cluef ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4clueg ,sc4clue, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2118 DUCKS OF HAZZARD DUCKSOFHAZZARDSND DUCKS OF HAZZARD
-GAME( 200?, sc4ducks ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ducksa ,sc4ducks, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ducksb ,sc4ducks, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ducksc ,sc4ducks, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ducks ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ducksa ,sc4ducks, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ducksb ,sc4ducks, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ducksc ,sc4ducks, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4glad_reel_configs[6] =
{
@@ -34299,20 +34299,20 @@ DRIVER_INIT_MEMBER(sc4_state,sc4glad)
}
// PR2255 GLADIATOR GLAD SOUNDS GLADIATOR
-GAME( 200?, sc4glad ,0, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4glada ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4gladb ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4gladc ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4gladd ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4glade ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4gladf ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4gladg ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4glad ,0, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4glada ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4gladb ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4gladc ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4gladd ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4glade ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4gladf ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4gladg ,sc4glad, sc4, sc4, sc4_state, sc4glad, ROT0, "QPS / Mazooma","Gladiator (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR1936 AWP HOT DOG SCORP4 PR1916 HOT DOG SOUNDS11 HOT DOG S.SITE
-GAME( 200?, sc4hotdg ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hotdga ,sc4hotdg, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
-GAME( 200?, sc4hotdgb ,sc4hotdg, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hotdgc ,sc4hotdg, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hotdg ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hotdga ,sc4hotdg, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
+GAME( 200?, sc4hotdgb ,sc4hotdg, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hotdgc ,sc4hotdg, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4pp_reel_configs[6] =
@@ -34333,44 +34333,44 @@ DRIVER_INIT_MEMBER(sc4_state,sc4pp)
// doesn't like any of the sound roms we have
// PR2562 PINK PANTHER PINK SOUNDS PINK PANTHER
-GAME( 200?, sc4pp ,0, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppa ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppb ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppc ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppd ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pp ,0, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppa ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppb ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppc ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppd ,sc4pp, sc4, sc4, sc4_state, sc4pp, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2303 STRIKES AGAIN PPSA SOUNDS STRIKES AGAIN
-GAME( 200?, sc4ppsag ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsaga ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsagb ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsagc ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsagd ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsage ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsagf ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsagg ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsagh ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ppsagi ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsag ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsaga ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsagb ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsagc ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsagd ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsage ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsagf ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsagg ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsagh ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ppsagi ,sc4ppsag, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR1938 AWP POTS OF GOLD SCORP4 PR1918 POTS OF GOLD SOUNDS11 POTS OF GOLD S.SITE
-GAME( 200?, sc4pog ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4poga ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pogb ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pogc ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pogd ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4poge ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pogf ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pogg ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND)
-GAME( 200?, sc4pogh ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pogi ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pog ,0, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4poga ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pogb ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pogc ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pogd ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4poge ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pogf ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pogg ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND)
+GAME( 200?, sc4pogh ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pogi ,sc4pog, sc4, sc4, sc4_state, sc4mbus, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2272 POWER PLAY PPLY SOUNDS
-GAME( 200?, sc4pwrpl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwrpla ,sc4pwrpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwrplb ,sc4pwrpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwrplc ,sc4pwrpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwrpl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwrpla ,sc4pwrpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwrplb ,sc4pwrpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwrplc ,sc4pwrpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4swywm_reel_configs[6] =
@@ -34391,14 +34391,14 @@ DRIVER_INIT_MEMBER(sc4_state,sc4swywm)
// PR2232 SPIN WHEN YOU'RE WINNING SPIN SOUNDS
-GAME( 200?, sc4swywm ,0, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4swywma ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4swywmb ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4swywmc ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4swywmd ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4swywme ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4swywmf ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4swywmg ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywm ,0, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywma ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywmb ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywmc ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywmd ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywme ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywmf ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4swywmg ,sc4swywm, sc4, sc4, sc4_state, sc4swywm, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
static const stepper_interface* sc4sumit_reel_configs[6] =
{
@@ -34418,418 +34418,418 @@ DRIVER_INIT_MEMBER(sc4_state,sc4sumit)
// PR2176 SUMMIT UP SUMMIT SOUNDS SUMMIT UP (was in the Suits U Sir set)
-GAME( 200?, sc4sumit ,0, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sumita ,sc4sus, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sumitb ,sc4sus, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sumitc ,sc4sus, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sumit ,0, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sumita ,sc4sus, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sumitb ,sc4sus, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sumitc ,sc4sus, sc4, sc4, sc4_state, sc4sumit, ROT0, "Mazooma","Summit Up (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2211 TOP OF THE SHOTS TOTS SOUNDS TOP OF THE SHOTS
-GAME( 200?, sc4tpsht ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tpshta ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tpshtb ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tpshtc ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tpshtd ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tpshte ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tpshtf ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tpshtg ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpsht ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpshta ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpshtb ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpshtc ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpshtd ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpshte ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpshtf ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tpshtg ,sc4tpsht, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// does not want the 'COTL SOUNDS' from Cash On The Lash
// PR2118 ADRENALIN COTL SOUNDS ADRENALIN
-GAME( 200?, sc4adren ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4adrena ,sc4adren, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4adrenb ,sc4adren, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4adrenc ,sc4adren, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4adren ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4adrena ,sc4adren, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4adrenb ,sc4adren, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4adrenc ,sc4adren, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Adrenalin (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// check if Side Splitter sound is correct
// RNG ERROR 99
// PR21xx BINGO BELLE SSPT SOUNDS BINGO BELLE
-GAME( 200?, sc4bingb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bingo Belle (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4bingba ,sc4bingb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bingo Belle (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bingb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bingo Belle (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4bingba ,sc4bingb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Bingo Belle (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2020 CASH ERUPTION ERUP SOUNDS CASH ERUPTION
-GAME( 200?, sc4cerup ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Eruption (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cerup ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Eruption (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2076 CASH EXPLOSION CEXP SOUNDS CASH EXPLSION
-GAME( 200?, sc4cexpl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cexpla ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cexplb ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cexplc ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cexplf ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cexplg ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexpl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexpla ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexplb ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexplc ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexplf ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexplg ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2076) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2120 CASH EXPLOSION CEXP SOUNDS CASH EXPLSION
-GAME( 200?, sc4cexpld ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2120) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cexple ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2120) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexpld ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2120) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cexple ,sc4cexpl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cash Explosion (PR2120) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2062 CASINO ROYALE CROY SOUNDS CASINO ROYALE
-GAME( 200?, sc4casry ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2062) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4casryc ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2062) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4casry ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2062) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4casryc ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2062) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2075 CASINO ROYALE DUCRV46 CROY CROY SOUNDS CASINO ROYALE (Jumping Bean copyright?)
-GAME( 200?, sc4casryd ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2075) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4casrye ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2075) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4casryd ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2075) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4casrye ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2075) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2073, CZECH CASINO ROYALE.......................CROY SOUNDS... (not standard header)
-GAME( 200?, sc4casrya ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2073) (Czech) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4casryb ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2073) (Czech) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4casrya ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2073) (Czech) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4casryb ,sc4casry, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Royale (PR2073) (Czech) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2237 CLUB CLUEDO CLUB CLUEDO CLUB CCLU SOUNDS CLUB CLUEDO
-GAME( 200?, sc4clucl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4clucla ,sc4clucl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4clucl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4clucla ,sc4clucl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Cluedo Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// half size sound rom, or missing a rom
// PR2058 COUNT YER CASH PR2058 COUNT YER CASH SOUNDS11
-GAME( 200?, sc4cyc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cyca ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cycb ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cycc ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cycd ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cyc ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cyca ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cycb ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cycc ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cycd ,sc4cyc, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
// half size sound rom, or missing a rom
// PR2092 CLUB COUNT YER CASH COUNT YER CASH CLUB CLCC SOUNDS
-GAME( 200?, sc4cyccl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cyccla ,sc4cyccl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cycclb ,sc4cyccl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4cycclc ,sc4cyccl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cyccl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cyccla ,sc4cyccl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cycclb ,sc4cyccl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cycclc ,sc4cyccl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Count Yer Cash Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// half size sound rom, or missing a rom
// PR7017 THREE LIONS LION SOUNDS
-GAME( 200?, sc4lions ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4lionsa ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4lionsb ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4lionsc ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4lionsd ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4lionse ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4lionsf ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4lions ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4lionsa ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4lionsb ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4lionsc ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4lionsd ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4lionse ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4lionsf ,sc4lions, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Three Lions (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6984 VIVA MEXICO 1.30 95008095 VIVA MEXICO PR6984
-GAME( 200?, sc4vmnv ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Viva Mexico (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4vmnv ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Viva Mexico (Nova) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6984 VIVA MEXICO 1.00 95008095 VIVA MEXICO PR6984
-GAME( 200?, sc4vmnva ,sc4vmnv, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Viva Mexico (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4vmnva ,sc4vmnv, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Viva Mexico (Nova) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// wrong sound roms
// PROJECT NUMBER PR7113 TEMPTATION PR7113 TEMPTATION SOUNDS11
-GAME( 200?, sc4tempt ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND)
-GAME( 200?, sc4tempta ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4temptb ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4temptc ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4temptd ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4tempte ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4temptf ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4temptg ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tempt ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND)
+GAME( 200?, sc4tempta ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4temptb ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4temptc ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4temptd ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4tempte ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4temptf ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4temptg ,sc4tempt, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Temptation (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// half size sound rom, or missing a rom
// PR7016 TAKE THE PISTE PISTE SOUNDS
-GAME( 200?, sc4ttp ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ttpa ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ttpb ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ttpc ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ttpd ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ttpe ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ttpf ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ttp ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ttpa ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ttpb ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ttpc ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ttpd ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ttpe ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ttpf ,sc4ttp, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Take The Piste (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2206 STREAKX STRX SOUNDS SUPER STREAX
-GAME( 200?, sc4supst ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Super Streax (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4supsta ,sc4supst, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Super Streax (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4supst ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Super Streax (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4supsta ,sc4supst, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Super Streax (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// NUMBER PR2024 STREET FIGHTER STRF SOUNDS STREET FIGHTER
-GAME( 200?, sc4sf ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sfa ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sfb ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sfc ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sfd ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sf ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sfa ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sfb ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sfc ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sfd ,sc4sf, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Street Fighter (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2055.GERMAN MONOPOLY... (non-standard header)
-GAME( 200?, sc4monod ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly (Mazooma) [German] (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4monoda ,sc4monod, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly (Mazooma) [German] (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4monodb ,sc4monod, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly (Mazooma) [German] (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4monod ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly (Mazooma) [German] (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4monoda ,sc4monod, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly (Mazooma) [German] (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4monodb ,sc4monod, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly (Mazooma) [German] (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6806 MOTORWAY MAYHEM PR6806 MAYH SOUNDS11
-GAME( 200?, sc4motor ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motora ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motorb ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motorc ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motord ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motore ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motorf ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motorg ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4motorh ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motor ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motora ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motorb ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motorc ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motord ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motore ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motorf ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motorg ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4motorh ,sc4motor, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Motorway Mania (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
// sound roms are bad dumps
// PR6915 stag night PR6915 STAG NIGHT SOUNDS11
-GAME( 200?, sc4stag ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Stag Night (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4staga ,sc4stag, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Stag Night (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stag ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Stag Night (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4staga ,sc4stag, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Stag Night (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7016 HICKORY DICKORY DOSH HICKORY SOUNDS
-GAME( 200?, sc4hdd ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7016) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hddc ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7016) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hddd ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7016) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hdd ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7016) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hddc ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7016) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hddd ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7016) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7045 HICKORY DICKORY DOSH HICKORY SOUNDS
-GAME( 200?, sc4hdda ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hddb ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hdde ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hddf ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hdda ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hddb ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hdde ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hddf ,sc4hdd, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hickory Dickory Dosh (PR7045) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2036 HYDE & STREAK HYDE SOUNDS HYDE & STREAK
-GAME( 200?, sc4hyde ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hydea ,sc4hyde, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hydeb ,sc4hyde, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4hydec ,sc4hyde, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hyde ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hydea ,sc4hyde, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hydeb ,sc4hyde, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4hydec ,sc4hyde, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Hyde & Streak (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// // does NOT want 'WILD SOUNDS' from 'PR7065 WET 'N' WILD'
// PR2043 NUDGE IT WILD SOUNDS NUDGE IT
-GAME( 200?, sc4nudit ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Nudge It (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4nudit ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Nudge It (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2043 NUDGE IT NGIT SOUNDS NUDGE IT
-GAME( 200?, sc4nudita ,sc4nudit, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Nudge It (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4nuditb ,sc4nudit, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Nudge It (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4nudita ,sc4nudit, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Nudge It (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4nuditb ,sc4nudit, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Nudge It (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
// PR6908 OUTLAW PR6908 OUTLAW SOUNDS11
-GAME( 200?, sc4outlw ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4outlwa ,sc4outlw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4outlwb ,sc4outlw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4outlwc ,sc4outlw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4outlw ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4outlwa ,sc4outlw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4outlwb ,sc4outlw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4outlwc ,sc4outlw, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Outlaw (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7002 ROLLOVER JACKPOT PR7002 ROLLOVER SOUNDS
-GAME( 200?, sc4rollo ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4rolloa ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4rolloc ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4rollod ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rollo ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rolloa ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rolloc ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rollod ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7002) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7032 ROLLOVER JACKPOT PR7002 ROLLOVER SOUNDS
-GAME( 200?, sc4rollob ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7032) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4rolloe ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7032) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4rollof ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7032) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rollob ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7032) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rolloe ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7032) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rollof ,sc4rollo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rollover Jackpot (PR7032) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2086 ROUTE66 RT66 SOUNDS ROUTE 66
-GAME( 200?, sc4r66 ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Route 66 (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4r66 ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Route 66 (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2051 CLUB ROLLING THUNDER CLRT SOUNDS ROLLING THUNDER
-GAME( 200?, sc4rtclb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rolling Thunder Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4rtclba ,sc4rtclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rolling Thunder Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rtclb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rolling Thunder Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rtclba ,sc4rtclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Rolling Thunder Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR1031 CASINO ROLL ME OVER PR1031 ROLL ME OVER SOUNDS11
-GAME( 200?, sc4rmo ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Roll Me Over Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4rmoa ,sc4rmo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Roll Me Over Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND)
+GAME( 200?, sc4rmo ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Roll Me Over Casino (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4rmoa ,sc4rmo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Roll Me Over Casino (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND)
// doesn't like the sound rom (not sure why, they look OK and have correct header)
// PR7044 GERMAN JIGGERY POKERY PR7044SND
-GAME( 200?, sc4jiggn ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Jiggery Pockery (German) (Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jiggn ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Jiggery Pockery (German) (Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// missing sound roms
// PR7021 JIGGERY POKERY PR7021 SOUNDS
-GAME( 200?, sc4jiggr ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jiggra ,sc4jiggr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jiggrb ,sc4jiggr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jiggrc ,sc4jiggr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jiggr ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jiggra ,sc4jiggr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jiggrb ,sc4jiggr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jiggrc ,sc4jiggr, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jiggery Pokery (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// doesn't like the sound roms we have (WILDJACK SOUNDS)
// PR0000 WILD JACKPOTS WJPT SOUNDS WILD JACKPOTS
-GAME( 200?, sc4wldjk ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldjka ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldjkb ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldjkc ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldjkd ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldjke ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldjkf ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4wldjkg ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjk ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjka ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjkb ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjkc ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjkd ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjke ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjkf ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4wldjkg ,sc4wldjk, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2096 JIVE MONEY JIVE SOUNDS JIVE MONEY
-GAME( 200?, sc4jive ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2096) (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jive ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2096) (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2160 JIVE MONEY JMON SOUNDS JIVE MONEY
-GAME( 200?, sc4jivea ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jiveb ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jivec ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4jived ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jivea ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jiveb ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jivec ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4jived ,sc4jive, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Jive Money (PR2160) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// no sound roms
// PR2164 CLUB MONOPOLY CLB MONOPOLY WOW CLUB CWOW SOUNDS CLUB MONOPOLOY
-GAME( 200?, sc4mclb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mclba ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mclbb ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mclbc ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mclbd ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4mclbe ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mclb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mclba ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mclbb ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mclbc ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mclbd ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4mclbe ,sc4mclb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly Club (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4monot ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND ) // PR2133MONOPOLY TTT MONOPOLY TTT MAZ MONL SOUNDS MONOPOLY
-GAME( 200?, sc4monota ,sc4monot, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4monotb ,sc4monot, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4monotc ,sc4monot, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND ) // PR2133MONOPOLY TTT MONOPOLY TTT ARCADE MONL SOUNDS MONOPOLY
+GAME( 200?, sc4monot ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND ) // PR2133MONOPOLY TTT MONOPOLY TTT MAZ MONL SOUNDS MONOPOLY
+GAME( 200?, sc4monota ,sc4monot, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4monotb ,sc4monot, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4monotc ,sc4monot, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Monopoly TTT (PR2133) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND ) // PR2133MONOPOLY TTT MONOPOLY TTT ARCADE MONL SOUNDS MONOPOLY
// WRONG SOUNDS, PAY UNIT ERR 17
-GAME( 200?, sc4cmon ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND ) // PR2133 CASINO MONOPOLY MONOPOLY ARCADE MONL SOUNDS MONOPOLY
-GAME( 200?, sc4cmona ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmonb ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmonc ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmond ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmone ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmonf ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmong ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmonh ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
-GAME( 200?, sc4cmoni ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmon ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND ) // PR2133 CASINO MONOPOLY MONOPOLY ARCADE MONL SOUNDS MONOPOLY
+GAME( 200?, sc4cmona ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmonb ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmonc ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmond ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmone ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmonf ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmong ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmonh ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
+GAME( 200?, sc4cmoni ,sc4cmon, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Casino Monopoly (PR2133) (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND ) // ^^
// PR6810 POWER CRAZY PR6810 POWER SOUNDS11
-GAME( 200?, sc4pwcrz ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwcrza ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwcrzb ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwcrze ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwcrzf ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
-GAME( 200?, sc4pwcrzg ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrz ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrza ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrzb ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrze ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrzf ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND ) // incomplete pairing
+GAME( 200?, sc4pwcrzg ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR4610 POWER CRAZY SP98 PR6810 POWER SOUNDS11
-GAME( 200?, sc4pwcrzc ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwcrzd ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwcrzh ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4pwcrzi ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrzc ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrzd ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrzh ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4pwcrzi ,sc4pwcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Power Crazy SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR1191 QUARTERBACK QBCK SOUNDS QUARTERBACK
-GAME( 200?, sc4quart ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quarta ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quart ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quarta ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// QUARTERBACK .PR2072.ITALIAN QUARTERBACK.. (non-standard header)
-GAME( 200?, sc4quartb ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quarte ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quarti ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quartk ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartb ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quarte ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quarti ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartk ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2072) (Italian) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// QUARTERBACK .PR2064.GERMAN QUARTERBACK.. (non-standard header)
-GAME( 200?, sc4quartc ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quartd ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quartf ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quartg ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quarth ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quartj ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quartl ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4quartm ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartc ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartd ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartf ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartg ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quarth ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartj ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartl ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4quartm ,sc4quart, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Quaterback (PR2064) (German) (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6902 RED HOT IBIZA PR6902 IBIZ SOUNDS11
-GAME( 200?, sc4ibiza ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizaa ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizab ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizac ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizad ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizae ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizaf ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizag ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizah ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4ibizai ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibiza ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizaa ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizab ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizac ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizad ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizae ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizaf ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizag ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizah ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4ibizai ,sc4ibiza, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Red Hot Ibiza (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2037 REEL TO REEL RTOR SOUNDS REEL 2 REEL
-GAME( 200?, sc4r2r ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4r2ra ,sc4r2r, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4r2rb ,sc4r2r, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4r2rc ,sc4r2r, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4r2r ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4r2ra ,sc4r2r, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4r2rb ,sc4r2r, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4r2rc ,sc4r2r, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Reel To Reel (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2020 REVOLVER REV SOUNDS REVOLVER
-GAME( 200?, sc4revo ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4revoa ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4revob ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4revoc ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4revod ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4revoe ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4revo ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4revoa ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4revob ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4revoc ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4revod ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4revoe ,sc4revo, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Revolver (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7076 GERMAN SINBAD2001 PR7076,German SINBAD2001, PR7076 SOUNDS V1
-GAME( 200?, sc4s2k ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Sinbad 2000 (German) (Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4s2k ,0, sc4, sc4, sc4_state, sc4, ROT0, "Nova","Sinbad 2000 (German) (Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// half size sound roms
// PR6905 SKY'S THE LIMIT PR6905 SKY'S THE LIMIT SOUNDS11
-GAME( 200?, sc4stl ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4stla ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4stlb ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4stlc ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4stld ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4stle ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4stlf ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4stlg ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stl ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stla ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stlb ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stlc ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stld ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stle ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stlf ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4stlg ,sc4stl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Sky's The Limit, The (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// half size sound roms
// PR2145 SOME LIKE IT HOT SLIH SOUNDS SOME LIKE IT HOT
-GAME( 200?, sc4slih ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sliha ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4slihb ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4slihc ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4slihd ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4slihe ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4slih ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sliha ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4slihb ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4slihc ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4slihd ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4slihe ,sc4slih, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Some Like It Hot (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7055 SPLASH N GRAB GRAB SOUNDS
-GAME( 200?, sc4splgb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Splash & Grab (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4splgba ,sc4splgb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Splash & Grab (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4splgb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Splash & Grab (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4splgba ,sc4splgb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Splash & Grab (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2044 CASINO SPREAD YOUR BET SBET SOUNDS SPREAD YOUR BET
-GAME( 200?, sc4spred ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Spread Your Bet (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4spred ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Spread Your Bet (Mazooma) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6921 DIAMONDS AND RUBIES PR6921 DARB SOUNDS11
-GAME( 200?, sc4sdr ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies (PR6921) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sdrb ,sc4sdr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies (PR6921) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sdr ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies (PR6921) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sdrb ,sc4sdr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies (PR6921) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR6921 DIAMONDS AND RUBIES SP98 PR6921 DARB SOUNDS11
-GAME( 200?, sc4sdra ,sc4sdr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies SP98 (PR6921) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4sdrc ,sc4sdr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies SP98 (PR6921) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sdra ,sc4sdr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies SP98 (PR6921) (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4sdrc ,sc4sdr, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Super Diamonds & Rubies SP98 (PR6921) (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR2022 GERMAN CASHANOVA (not a standard string)
-GAME( 200?, sc4cashg ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma / Nova","Cashanova (German) (Mazooma / Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4cashg ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma / Nova","Cashanova (German) (Mazooma / Nova) (Scorpion 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// bad sound roms
// PR6906 CRAZY CASINO SP98 PR6906 CRCS SOUNDS11
-GAME( 200?, sc4crzcs ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzcsa ,sc4crzcs, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzcsb ,sc4crzcs, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzcsc ,sc4crzcs, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzcs ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzcsa ,sc4crzcs, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzcsb ,sc4crzcs, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzcsc ,sc4crzcs, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Crazy Casino SP98 (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// PR7001 IT'S A CRAZY WORLD CRAZY WORLD SOUNDS
-GAME( 200?, sc4crzwl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzwla ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzwlb ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzwlc ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzwld ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzwle ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzwlf ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4crzwlg ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwl ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwla ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwlb ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwlc ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwld ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwle ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwlf ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4crzwlg ,sc4crzwl, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Crazy World (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
// no sound roms
// PR6814 FOOTBALL CRAZY PR6814 FOOTBALL CRAZY SOUNDS
-GAME( 200?, sc4fbcrz ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrza ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrzb ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrzc ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrzd ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrze ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrzf ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrzg ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrzh ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4fbcrzi ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrz ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrza ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrzb ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrzc ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrzd ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 5)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrze ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 6)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrzf ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 7)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrzg ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 8)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrzh ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 9)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4fbcrzi ,sc4fbcrz, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Football Crazy (Bellfruit) (Scorpion 4) (set 10)", GAME_NOT_WORKING | GAME_NO_SOUND )
// no sound roms
// PR6916 FROOTY BOOTY PR6916 FROOTY BOOTY SOUNDS11 FROOTY BOOTY
-GAME( 200?, sc4frboo ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4frbooa ,sc4frboo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4frboob ,sc4frboo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
-GAME( 200?, sc4frbooc ,sc4frboo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4frboo ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4frbooa ,sc4frboo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4frboob ,sc4frboo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_NO_SOUND )
+GAME( 200?, sc4frbooc ,sc4frboo, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Frooty Booty (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_NO_SOUND )
// no sound roms
// not a fruit machine? coin pusher?
-GAME( 200?, sc4gfev ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR20XX GOLD FEVER PUSHER GOLDFEVER SOUNDS GOLD FEVER
-GAME( 200?, sc4gfeva ,sc4gfev, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // PR2142 GOLD FEVER PUSHER USA GOLDFEVER SOUNDS GOLD FEVER
-GAME( 200?, sc4gfevb ,sc4gfev, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, sc4db ,sc4gfev, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // PR2142 GOLD FEVER PUSHER USA GOLDFEVER SOUNDS GOLD FEVER
+GAME( 200?, sc4gfev ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING ) // PR20XX GOLD FEVER PUSHER GOLDFEVER SOUNDS GOLD FEVER
+GAME( 200?, sc4gfeva ,sc4gfev, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING ) // PR2142 GOLD FEVER PUSHER USA GOLDFEVER SOUNDS GOLD FEVER
+GAME( 200?, sc4gfevb ,sc4gfev, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, sc4db ,sc4gfev, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Gold Fever (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING ) // PR2142 GOLD FEVER PUSHER USA GOLDFEVER SOUNDS GOLD FEVER
// no sound roms
// PR2125 GRAND BLASTER CASH GRAN SOUNDS GRAND BLASTER
-GAME( 200?, sc4gcb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcba ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbb ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbc ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbd ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbe ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbf ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbg ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbh ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbi ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
-GAME( 200?, sc4gcbj ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcb ,0, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcba ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbb ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbc ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbd ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 5)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbe ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 6)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbf ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 7)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbg ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 8)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbh ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 9)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbi ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 10)", GAME_NOT_WORKING )
+GAME( 200?, sc4gcbj ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand Blaster Cash (Mazooma) (Scorpion 4) (set 11)", GAME_NOT_WORKING )
/****************************************************************************************************************************************************************************************************************/
/****************************************************************************************************************************************************************************************************************/
@@ -34843,20 +34843,16 @@ GAME( 200?, sc4gcbj ,sc4gcb, sc4, sc4, sc4_state, sc4, ROT0, "Mazooma","Grand B
/****************************************************************************************************************************************************************************************************************/
-GAME( 200?, ad4skill ,0, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Skill Dice (BFM) (Scorpion 4 + Adder 4)", GAME_NOT_WORKING )
-GAME( 200?, ad4film ,0, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Film Premiere (Video?) (Bellfruit) (Adder 4) (set 1)", GAME_NOT_WORKING ) // the 68k vectors differ from usual, but it contains the expected strings for an Adder 4 title. No main program roms tho? :/
-GAME( 200?, ad4filma ,ad4film, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Film Premiere (Video?) (Bellfruit) (Adder 4) (set 2)", GAME_NOT_WORKING ) // ^^
-GAME( 200?, ad4ctl ,0, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Video) (Bellfruit) (Adder 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, ad4ctla ,ad4ctl, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Video) (Bellfruit) (Adder 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, ad4skill ,0, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Skill Dice (BFM) (Scorpion 4 + Adder 4)", GAME_NOT_WORKING )
+GAME( 200?, ad4film ,0, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Film Premiere (Video?) (Bellfruit) (Adder 4) (set 1)", GAME_NOT_WORKING ) // the 68k vectors differ from usual, but it contains the expected strings for an Adder 4 title. No main program roms tho? :/
+GAME( 200?, ad4filma ,ad4film, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Film Premiere (Video?) (Bellfruit) (Adder 4) (set 2)", GAME_NOT_WORKING ) // ^^
+GAME( 200?, ad4ctl ,0, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Video) (Bellfruit) (Adder 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, ad4ctla ,ad4ctl, sc4_adder4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Video) (Bellfruit) (Adder 4) (set 2)", GAME_NOT_WORKING )
// PR1036 CLUB COP THE LOT PR1036 CLOT SOUNDS11 COP THE LOT
// shows nothing on the VFD, but boots (to very little)
-GAME( 200?, sc4ctlcl ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
-GAME( 200?, sc4ctlcla ,sc4ctlcl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctlcl ,0, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 1)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctlcla ,sc4ctlcl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 2)", GAME_NOT_WORKING )
// PR1036 CLUB COP THE LOT COP THE LOT CLUB PR1036 CLOT SOUNDS11 COP THE LOT
// shows nothing, but alarms, do these go with the ad4 video roms?
-GAME( 200?, sc4ctlclb ,sc4ctlcl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
-GAME( 200?, sc4ctlclc ,sc4ctlcl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
-
-
-
-
+GAME( 200?, sc4ctlclb ,sc4ctlcl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 3)", GAME_NOT_WORKING )
+GAME( 200?, sc4ctlclc ,sc4ctlcl, sc4, sc4, sc4_state, sc4, ROT0, "BFM","Cop The Lot Club (Bellfruit) (Scorpion 4) (set 4)", GAME_NOT_WORKING )
diff --git a/src/mame/drivers/bfm_sc4h.c b/src/mame/drivers/bfm_sc4h.c
index c6569e2074e..64db7a0393c 100644
--- a/src/mame/drivers/bfm_sc4h.c
+++ b/src/mame/drivers/bfm_sc4h.c
@@ -306,7 +306,7 @@ WRITE16_MEMBER(sc4_state::sc4_mem_w)
}
if (mem_mask&0x00ff)
- { // lamps
+ { // lamps
mux_output_w(space, (addr & 0x01f0)>>4, data);
}
@@ -319,7 +319,7 @@ WRITE16_MEMBER(sc4_state::sc4_mem_w)
}
if (mem_mask&0x00ff)
- { // lamps
+ { // lamps
mux_output2_w(space, (addr & 0x01f0)>>4, data);
}
}
@@ -618,7 +618,7 @@ MACHINE_START_MEMBER(sc4_state,sc4)
for ( int n = 0; n < reels; n++ )
{
- if (m_reel_setup[n]) stepper_config(machine(), n, m_reel_setup[n]);
+ if (m_reel_setup[n]) stepper_config(machine(), n, m_reel_setup[n]);
}
}
@@ -687,10 +687,10 @@ static const duart68681_config bfm_sc4_duart68681_config =
bfm_sc4_duart_input_r,
bfm_sc4_duart_output_w,
// TODO: What are the actual frequencies?
- XTAL_16MHz/2/8, /* IP2/RxCB clock */
- XTAL_16MHz/2/16, /* IP3/TxCA clock */
- XTAL_16MHz/2/16, /* IP4/RxCA clock */
- XTAL_16MHz/2/8, /* IP5/TxCB clock */
+ XTAL_16MHz/2/8, /* IP2/RxCB clock */
+ XTAL_16MHz/2/16, /* IP3/TxCA clock */
+ XTAL_16MHz/2/16, /* IP4/RxCA clock */
+ XTAL_16MHz/2/8, /* IP5/TxCB clock */
};
@@ -740,7 +740,7 @@ static const duart68681_config m68307_duart68681_config =
MACHINE_CONFIG_START( sc4, sc4_state )
- MCFG_CPU_ADD("maincpu", M68307, 16000000) // 68307! (EC000 core)
+ MCFG_CPU_ADD("maincpu", M68307, 16000000) // 68307! (EC000 core)
MCFG_CPU_PROGRAM_MAP(sc4_map)
// internal duart of the 68307... paired in machine start
@@ -775,7 +775,7 @@ MACHINE_START_MEMBER(sc4_adder4_state,adder4)
}
MACHINE_CONFIG_DERIVED_CLASS( sc4_adder4, sc4, sc4_adder4_state )
- MCFG_CPU_ADD("adder4", M68340, 25175000) // 68340 (CPU32 core)
+ MCFG_CPU_ADD("adder4", M68340, 25175000) // 68340 (CPU32 core)
MCFG_CPU_PROGRAM_MAP(sc4_adder4_map)
MCFG_MACHINE_START_OVERRIDE(sc4_adder4_state, adder4 )
@@ -785,9 +785,9 @@ MACHINE_CONFIG_DERIVED_CLASS( sc4dmd, sc4, sc4_state )
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_sc4_dmd)
- MCFG_CPU_ADD("matrix", M6809, 2000000 ) /* matrix board 6809 CPU at 2 Mhz ?? I don't know the exact freq.*/
+ MCFG_CPU_ADD("matrix", M6809, 2000000 ) /* matrix board 6809 CPU at 2 Mhz ?? I don't know the exact freq.*/
MCFG_CPU_PROGRAM_MAP(bfm_dm01_memmap)
- MCFG_CPU_PERIODIC_INT(bfm_dm01_vbl, 1500 ) /* generate 1500 NMI's per second ?? what is the exact freq?? */
+ MCFG_CPU_PERIODIC_INT(bfm_dm01_vbl, 1500 ) /* generate 1500 NMI's per second ?? what is the exact freq?? */
MCFG_MACHINE_START_OVERRIDE(sc4_state, sc4 )
MACHINE_CONFIG_END
@@ -972,7 +972,3 @@ INPUT_PORTS_START( sc4_base )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
INPUT_PORTS_END
-
-
-
-
diff --git a/src/mame/drivers/bfm_sc5sw.c b/src/mame/drivers/bfm_sc5sw.c
index 4c16f9f0c10..e36a137feb5 100644
--- a/src/mame/drivers/bfm_sc5sw.c
+++ b/src/mame/drivers/bfm_sc5sw.c
@@ -1036,7 +1036,7 @@ ROM_END
ROM_START( sc5cfptc )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95408564.lo", 0x00001, 0x080000, CRC(a10083eb) SHA1(c6da0a1b55e07303efa5b72864a5be9a3456539d) )
ROM_LOAD16_BYTE( "95408565.hi", 0x00000, 0x080000, CRC(f4ce13a0) SHA1(014778d2da3ef2fea222a930e3f70b5e3c092975) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
@@ -1044,14 +1044,14 @@ ROM_END
ROM_START( sc5cfptd )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95408566.lo", 0x00001, 0x080000, CRC(ae80c8dc) SHA1(f300f7f706b48dc6fefeda66bdd51ed8e22705e0) )
ROM_LOAD16_BYTE( "95408567.hi", 0x00000, 0x080000, CRC(f11a6e3e) SHA1(98374f710c3dd979515dc6280845a72a31a330d5) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_END
ROM_START( sc5cfpte )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95409564.lo", 0x00001, 0x080000, CRC(abcd12e3) SHA1(4e8652d0bbfaaf4e829708993a23c3736f0b8892) )
ROM_LOAD16_BYTE( "95409565.hi", 0x00000, 0x080000, CRC(46c03cdd) SHA1(72d63095eaea3d7239f7603ff3382eecc2a625d0) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
@@ -1059,7 +1059,7 @@ ROM_END
ROM_START( sc5cfptf )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95409566.lo", 0x00001, 0x080000, CRC(f3c6493b) SHA1(0bc97c4329930164433cb22690b6bb35b6e27c4a) )
ROM_LOAD16_BYTE( "95409567.hi", 0x00000, 0x080000, CRC(618cbc2b) SHA1(5ca7a7b0cd42f7be16be12e83ab82457a42ca1e6) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
@@ -1067,35 +1067,35 @@ ROM_END
ROM_START( sc5cfptg )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1371p11.hi", 0x00000, 0x080000, CRC(8c438718) SHA1(a266fe867bddcc11216f2d3f31b222d1d5af6237) )
ROM_LOAD16_BYTE( "p1371p11.lo", 0x00001, 0x080000, CRC(9cfe5ba9) SHA1(d2bedca469bbbbfdd2fd1584b397a26d660fea7c) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_END
ROM_START( sc5cfpth )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1371s11.hi", 0x00000, 0x080000, CRC(24335da7) SHA1(a2f05a13a28d2910a3150abaebf980ba5f9c1130) )
ROM_LOAD16_BYTE( "p1371s11.lo", 0x00001, 0x080000, CRC(4116abb7) SHA1(897d1043178b6d0c88d9c306fc27db2f3978c76f) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_END
ROM_START( sc5cfpti )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411134.lo", 0x00001, 0x080000, CRC(eb9cf02e) SHA1(68a1caf92f8b2d1b73d3eb07920b98ffb93a0451) )
ROM_LOAD16_BYTE( "95411135.hi", 0x00000, 0x080000, CRC(ae33cdbd) SHA1(691907e7867027d0e60558c2615ee8a51d0463a1) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_END
ROM_START( sc5cfptj )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95408568.lo", 0x00001, 0x080000, CRC(c091adad) SHA1(5bd2e7004af74f27192f3f425ecac47d424d41a9) )
ROM_LOAD16_BYTE( "95408569.hi", 0x00000, 0x080000, CRC(f35e76eb) SHA1(7bc9dfc1b812c5222378c40180c4644c4aa3f058) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_END
ROM_START( sc5cfptk )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95409568.lo", 0x00001, 0x080000, CRC(005222e0) SHA1(e6b87dd98f6706e3dc61db267be7eeded07ec3fe) )
ROM_LOAD16_BYTE( "95409569.hi", 0x00000, 0x080000, CRC(26202661) SHA1(8379ef9b769d9e6a0922a093c6327510b5c10256) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
@@ -1103,56 +1103,56 @@ ROM_END
ROM_START( sc5cfptl )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1371p91.hi", 0x00000, 0x080000, CRC(8b39df7a) SHA1(b6423e36f0dda2dd1ff11189aaa4f9a567e05af8) )
ROM_LOAD16_BYTE( "p1371p91.lo", 0x00001, 0x080000, CRC(2c357088) SHA1(5266734637e7aa9924bb5395fcf48994d407f015) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_END
ROM_START( sc5cfptm )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1371s91.hi", 0x00000, 0x080000, CRC(22f54a59) SHA1(75cb71c453911cc5d1b5a88625d9fffa43a57f3e) )
ROM_LOAD16_BYTE( "p1371s91.lo", 0x00001, 0x080000, CRC(55dc637c) SHA1(8340491640d8748787d2401f3f33542c8f20c7dc) )
ROM_REGION( 0x400000, "ymz", ROMREGION_ERASE00 )
ROM_END
ROM_START( sc5cfptn )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95410186.lo", 0x00001, 0x080000, CRC(73483953) SHA1(ec2823d2059c65367e647ac1106dd70d18e5bc89) )
ROM_LOAD16_BYTE( "95410187.hi", 0x00000, 0x080000, CRC(ba91c41c) SHA1(ed556ea559724cdae0bcd0298fd2021a2b49e15a) )
PR1430_CRAZY_F_SIT_D_SOUNDS11
ROM_END
ROM_START( sc5cfpto )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "95411186.lo", 0x00001, 0x080000, CRC(7e933b3c) SHA1(90410c291902b72d95f3376657e918cd1d60d8a8) )
ROM_LOAD16_BYTE( "95411187.hi", 0x00000, 0x080000, CRC(cdc68736) SHA1(92bfe250d2b0f3030ce8541dbed73a37ac3dc8b9) )
PR1430_CRAZY_F_SIT_D_SOUNDS11
ROM_END
ROM_START( sc5cfptp )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1430p42.hi", 0x00000, 0x080000, CRC(97e3926b) SHA1(c385e2ed2eb0e043a3c84f25b1b64c934bb380e1) )
ROM_LOAD16_BYTE( "p1430p42.lo", 0x00001, 0x080000, CRC(9b33feaf) SHA1(31a53520e5b65b39ac1a54ba2eba13f5ce75ee50) )
PR1430_CRAZY_F_SIT_D_SOUNDS11
ROM_END
ROM_START( sc5cfptq )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1430p52.hi", 0x00000, 0x080000, CRC(832d2241) SHA1(98c6e5e485d474b88a7e8a313b4cc469ec14b5e9) )
ROM_LOAD16_BYTE( "p1430p52.lo", 0x00001, 0x080000, CRC(d9fb0e30) SHA1(fe337db428bf68abb770a5e06d8ac73cc4e7794e) )
PR1430_CRAZY_F_SIT_D_SOUNDS11
ROM_END
ROM_START( sc5cfptr )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1430s42.hi", 0x00000, 0x080000, CRC(a5f0acf8) SHA1(01877be0da6018d067cc683a4a2dd14c4c6f7ba3) )
ROM_LOAD16_BYTE( "p1430s42.lo", 0x00001, 0x080000, CRC(64522503) SHA1(16203ff08a0de9db92522b05669c0c92057a27c4) )
PR1430_CRAZY_F_SIT_D_SOUNDS11
ROM_END
ROM_START( sc5cfpts )
- ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
+ ROM_REGION( 0x400000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD16_BYTE( "p1430s52.hi", 0x00000, 0x080000, CRC(9f7bd7f8) SHA1(b81c62398213ccefcaaca5c1d6c579c30ff67884) )
ROM_LOAD16_BYTE( "p1430s52.lo", 0x00001, 0x080000, CRC(623fea2b) SHA1(fe38a4a9a91fa986bf4d36c7a28c8bb2c73659b7) )
PR1430_CRAZY_F_SIT_D_SOUNDS11
@@ -12639,8 +12639,8 @@ DRIVER_INIT_MEMBER(bfm_sc5_state,sc5)
// help identify roms where one of the pair is missing too
if (!found)
{
- found = find_project_string(machine(), 3, 1);
- found = find_project_string(machine(), 3, 2);
+ found = find_project_string(machine(), 3, 1);
+ found = find_project_string(machine(), 3, 2);
}
if (!found)
@@ -12649,2269 +12649,2268 @@ DRIVER_INIT_MEMBER(bfm_sc5_state,sc5)
}
// PR2437 28 PLAYS LATER TEDL SOUNDS NITH
-GAME( 200?, sc5plays ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","28 Plays Later (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5playsa ,sc5plays, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","28 Plays Later (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5plays ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","28 Plays Later (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5playsa ,sc5plays, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","28 Plays Later (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3214 AWP ANT N DECS SNT GRAB THE ADS S5 PR3214 SNT GRAB THE ADS SOUNDS11 GRAB THE ADS S.SITE
-GAME( 200?, sc5adga ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adgaa ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adgab ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adgac ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adgad ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adgae ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adga ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adgaa ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adgab ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adgac ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adgad ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adgae ,sc5adga, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Ads (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3214 AWP ANT N DECS GRAB THE CASH S5 PR3214 GRAB THE CASH SOUNDS11 GRAB THE CASH S.SITE
-GAME( 200?, sc5adgtc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Cash (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adgtca ,sc5adgtc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Cash (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adgtc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Cash (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adgtca ,sc5adgtc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Grab The Cash (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// Z053 BANKJOB PR000053 BANKJOB 1 BANKJOB AWP (this numbering looks more like QPS)
-GAME( 200?, sc5bjob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjoba ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobb ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobc ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobd ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobe ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobf ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobg ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobh ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bjobi ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjoba ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobb ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobc ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobd ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobe ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobf ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobg ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobh ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bjobi ,sc5bjob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bank Job (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR2077KING X KING X MAZ BARKX SOUNDS KING X
-GAME( 200?, sc5bkngx ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bar King X (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bkngxa ,sc5bkngx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bar King X (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bkngx ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bar King X (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bkngxa ,sc5bkngx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bar King X (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3216 AWP BUCKANEERS SCORP5 PR3216 BUCKANEERS SOUNDS11 BUCKANEERS S.SITE
-GAME( 200?, sc5bucc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bucca ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5buccb ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5buccc ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5buccd ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bucce ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bucc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bucca ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5buccb ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5buccc ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5buccd ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bucce ,sc5bucc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Buccaneers (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3205 AWP BULLSEYE POUNDS FOR POINTS S5 PR3205 BULLYS PNDSFPTS SOUNDS11 POUNDS FOR POINT S.SITE
-GAME( 200?, sc5bpfpb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Pounds For Points (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bpfpba ,sc5bpfpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Pounds For Points (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpfpb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Pounds For Points (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpfpba ,sc5bpfpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Pounds For Points (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1914 AWP THREE IN A BED BULLSEYE SCORP5 PR1914 THREE I A BED B SOUNDS11 3IAB BULLSEYE S.SITE
-GAME( 200?, sc5btiab ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Three In A Bed (Bellfruit) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5btiab ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Three In A Bed (Bellfruit) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR1744 BULLSEYE TRIPLE BULLSEYE TRIPLE ARCADE PR1743 CASINO BULLSEYE SOUNDS11
-GAME( 200?, sc5btrip ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5btripa ,sc5btrip, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5btrip ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5btripa ,sc5btrip, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1743 CASINO BULLSEYE CASINO BULLSEYE ARCADE PR1743 CASINO BULLSEYE SOUNDS11
-GAME( 200?, sc5btripb ,sc5btrip, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5btripc ,sc5btrip, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5btripb ,sc5btrip, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5btripc ,sc5btrip, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye Triple (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2197 BUNNY MONEY BUNNY MONEY BUNN SOUNDS BUNNY MONEY
-GAME( 200?, sc5bunny ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bunny Money (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bunnya ,sc5bunny, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bunny Money (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bunny ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bunny Money (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bunnya ,sc5bunny, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bunny Money (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// Z054 CANNON PR000054 CANNON 1 CANNON AWP (looks more like a QPS header)
-GAME( 200?, sc5cbrun ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cannonball Run (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cbruna ,sc5cbrun, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cannonball Run (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cbrun ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cannonball Run (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cbruna ,sc5cbrun, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cannonball Run (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1681 181104 CASH FACTOR PR1681 CASH FACTOR 1 CASH FACTOR AWP
-GAME( 200?, sc5cfact ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Factor (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfacta ,sc5cfact, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Factor (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfact ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Factor (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfacta ,sc5cfact, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Factor (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3204 AWP CASH OF THE TITANS S5 PR3204 CASH TITANS SOUNDS11 CASH OF TITANS S.SITE
-GAME( 200?, sc5ctit ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Of The Titans (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ctita ,sc5ctit, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Of The Titans (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ctit ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Of The Titans (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ctita ,sc5ctit, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Of The Titans (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2343 CASH RAIDER RAID SOUNDS NITH
-GAME( 200?, sc5craid ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cash Raider (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5craida ,sc5craid, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cash Raider (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5craid ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cash Raider (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5craida ,sc5craid, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cash Raider (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1610 AWP CASH VEGAS PR1610 CASH VEGAS SOUNDS11 CASH VEGAS S.SITE
-GAME( 200?, sc5cvega ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Vegas (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cvegaa ,sc5cvega, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Vegas (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cvega ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Vegas (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cvegaa ,sc5cvega, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Vegas (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2210 CHOP 'N' CHANGE CHOP SOUNDS CHOP 'N' CHANGE
-GAME( 200?, sc5chopc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chop 'n' Change (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chopca ,sc5chopc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chop 'n' Change (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chopc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chop 'n' Change (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chopca ,sc5chopc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chop 'n' Change (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2422 BINGO BAR7 S5 PR1433 BAR SEVENS SOUNDS11 BAR7 S.SITE
-GAME( 200?, sc5cbar7 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Classic Bar 7 (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cbar7a ,sc5cbar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Classic Bar 7 (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cbar7 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Classic Bar 7 (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cbar7a ,sc5cbar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Classic Bar 7 (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2495 CLUEDO CLUEDO SOUNDS CLUEDO
-GAME( 200?, sc5clu70 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Cluedo 70 (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clu70a ,sc5clu70, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Cluedo 70 (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clu70 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Cluedo 70 (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clu70a ,sc5clu70, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Cluedo 70 (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2339 CLUEDO CASINO CLUEDO CASINO MAZ CCLU SOUNDS GET A CLUE
-GAME( 200?, sc5clcas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo Casino (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clcasa ,sc5clcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo Casino (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clcas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo Casino (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clcasa ,sc5clcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo Casino (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3320 AWP CLUEDO NOTORIOUS S5 PR3320 CLUEDO SOUNDS11 CLUEDO NOTORIOUS S.SITE
-GAME( 200?, sc5clnot ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clnota ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clnotb ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clnotc ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clnotd ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clnote ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clnotf ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clnotg ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnot ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnota ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnotb ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnotc ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnotd ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnote ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnotf ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clnotg ,sc5clnot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cluedo Notorious (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2332 CLUEDO THE USUAL SUSPECTS CTUS SOUNDS CLUEDO CTUL
-GAME( 200?, sc5clus ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusa ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusb ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusc ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusd ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cluse ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusf ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusg ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clush ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusi ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusj ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clusk ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clus ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusa ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusb ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusc ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusd ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cluse ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusf ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusg ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clush ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusi ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusj ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clusk ,sc5clus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo The Usual Suspects (Mazooma) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
// PR3317 AWP THE COLOUR OF MONEY S5 PR3317 COLOUR OF MONEY SOUNDS11 COLOUR OF MONEY S.SITE
-GAME( 200?, sc5colmo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5colmoa ,sc5colmo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5colmob ,sc5colmo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5colmoc ,sc5colmo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5colmo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5colmoa ,sc5colmo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5colmob ,sc5colmo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5colmoc ,sc5colmo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3502 AWP THE COLOUR OF MONEY NEW S5 PR3502 C OF M TEN SOUNDS11 COLOUR OF MONEY2 S.SITE
-GAME( 200?, sc5newcm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5newcma ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5newcmb ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5newcmc ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5newcmd ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5newcme ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5newcm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5newcma ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5newcmb ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5newcmc ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5newcmd ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5newcme ,sc5newcm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Of Money New, The (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3506 AWP COPS AND ROBBERS ON THE RUN S5 PR3506 C & R ON T RUN SOUNDS11 ON THE RUN S.SITE
-GAME( 200?, sc5crotr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers On The Run (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crotra ,sc5crotr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers On The Run (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crotr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers On The Run (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crotra ,sc5crotr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers On The Run (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3427 CLUB COPS N ROBBERS SMASH N GRAB SCORP5 PR3421 CNR_SNG SOUNDS11 SMASH N GRAB CLUB
-GAME( 200?, sc5crsgc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgca ,sc5crsgc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgca ,sc5crsgc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3421 CLUB COPS N ROBBERS SMASH N GRAB SCORP5 PR3421 CNR_SNG SOUNDS11 SMASH N GRAB CLUB
-GAME( 200?, sc5crsgcb ,sc5crsgc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgcc ,sc5crsgc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgcb ,sc5crsgc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgcc ,sc5crsgc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3421 CLUB COPS N ROBBERS SMASH N GRAB SCORP5 PR3421 CNR_SNG SOUNDS11 SMASH N GRAB CLUB (same ident as some of the sc5crsgc sets..)
-GAME( 200?, sc5crsgr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgra ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgrb ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgrc ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgrd ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgre ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgrf ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsgrg ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgra ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgrb ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgrc ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgrd ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgre ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgrf ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsgrg ,sc5crsgr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Smash 'n' Grab (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3521 AWP CORONATION STREET SCORP5 PR3521 CORRONATION ST SOUNDS11 CORONATION ST S.SITE
-GAME( 200?, sc5corst ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corsta ,sc5corst, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corstb ,sc5corst, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corstc ,sc5corst, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corst ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corsta ,sc5corst, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corstb ,sc5corst, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corstc ,sc5corst, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Coronation Street (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3417 AWP CRAZYFRUIT AND NUTCASE SCORP5 PR3417 CF NUTCASE SOUNDS11 CF& NUTCASE S.SITE
-GAME( 200?, sc5cfnc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruit & Nutcase (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfnca ,sc5cfnc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruit & Nutcase (Bellfruit) (Scorpion 5) (set 2", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfnc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruit & Nutcase (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfnca ,sc5cfnc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruit & Nutcase (Bellfruit) (Scorpion 5) (set 2", GAME_IS_SKELETON_MECHANICAL )
// PR3436 CRAZY FRUITS COMMUNITY PARTY CRAZY FRUITS CP ARCADE PR3436 CF COMMUNITY P SOUNDS11
-GAME( 200?, sc5cfcp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpa ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpb ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpc ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpd ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpe ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpf ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpg ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcph ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpi ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpj ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpk ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpl ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpm ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpn ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpo ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpp ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpq ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpr ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcps ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpt ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpu ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpv ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfcpw ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpa ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpb ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpc ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpd ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpe ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpf ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpg ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcph ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpi ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpj ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpk ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpl ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpm ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpn ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpo ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpp ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpq ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpr ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcps ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpt ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpu ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpv ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfcpw ,sc5cfcp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Community Party (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )
// PR1359 CASINO CRAZY FRUITS PARTY PR1359 CRAZY F PARTY SOUNDS11
-GAME( 200?, sc5cfpt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfpta ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptb ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptc ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptd ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfpte ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptf ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptg ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfpth ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfpti ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfpt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfpta ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptb ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptc ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptd ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfpte ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptf ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptg ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfpth ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfpti ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR1359 CASINO CRAZY FRUITS PARTY PR1359 TB CRAZY F P SOUNDS11
-GAME( 200?, sc5cfptj ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptk ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptl ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptm ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptj ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptk ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptl ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptm ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
// PR1430 CASINO CRAZY FRUITS SIT DOWN PR1430 CRAZY F SIT D SOUNDS11
-GAME( 200?, sc5cfptn ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfpto ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptp ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptq ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfptr ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cfpts ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptn ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfpto ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptp ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptq ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfptr ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cfpts ,sc5cfpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Fruits Casino Party Time (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
// PR3418 AWP CRAZY KNIGHTS SCORP5 PR3418 CRAZY KNIGHTS SOUNDS11 CRAZY KNIGHTS S.SITE
-GAME( 200?, sc5cknig ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ckniga ,sc5cknig, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cknigb ,sc5cknig, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cknigc ,sc5cknig, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cknig ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ckniga ,sc5cknig, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cknigb ,sc5cknig, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cknigc ,sc5cknig, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Knights (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1741 CRAZY PAYS SCORP5 PR1741 CRAZY PAYS SOUNDS11 CRAZY PAYS S.SITE
-GAME( 200?, sc5cpays ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Pays (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cpaysa ,sc5cpays, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Pays (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cpays ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Pays (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cpaysa ,sc5cpays, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crazy Pays (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3409 AWP DEAL OR NO DEAL BANKERS BONUS S5 PR3409 BANKERS BONUS SOUNDS11 BANKERS BONUS S.SITE
-GAME( 200?, sc5dndbo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndboa ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbob ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndboc ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbod ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndboe ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbof ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbog ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndboh ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndboi ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndboj ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbok ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndboa ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbob ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndboc ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbod ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndboe ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbof ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbog ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndboh ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndboi ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndboj ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbok ,sc5dndbo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Banker's Bonus (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
// PR3068 CLUB BEAT THE BANKER BEAT THE BANKER CLUB PR3068 BEAT THE BANKER SOUNDS11
-GAME( 200?, sc5dndbl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbla ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblb ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblc ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbld ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndble ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblf ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblg ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblh ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbli ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblj ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblk ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbll ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblm ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbln ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblo ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblp ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblq ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndblr ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbls ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbla ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblb ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblc ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbld ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndble ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblf ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblg ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblh ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbli ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblj ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblk ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbll ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblm ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbln ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblo ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblp ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblq ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndblr ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbls ,sc5dndbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Club (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
// these contain no 'PROJECT NUMBER' ident string.
-GAME( 200?, sc5dndbq ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbqa ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbqb ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbqc ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbqd ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbqe ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbq ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbqa ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbqb ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbqc ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbqd ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbqe ,sc5dndbq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Deal Or No Deal Beat The Banker (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3503 AWP DEAL OR NO DEAL COPS AND ROBBERS S5 PR3503 DOND CNR SOUNDS11 DOND COPS S.SITE
-GAME( 200?, sc5dndcr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcra ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcrb ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcrc ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcrd ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcre ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcra ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcrb ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcrc ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcrd ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcre ,sc5dndcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3545 AWP DESERT ISLAND DEAL S5 PR3545 DOND D I D SOUNDS11 DESERT ISLAND DL S.SITE
-GAME( 200?, sc5dndde ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddea ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddeb ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddec ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndded ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddee ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddef ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddeg ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndde ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddea ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddeb ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddec ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndded ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddee ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddef ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddeg ,sc5dndde, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Desert Island Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3420 AWP DIAMOND DOND S5 PR3420 DIAMOND DOND SOUNDS11 DIAMOND DOND S.SITE
-GAME( 200?, sc5dnddi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddia ,sc5dnddi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddib ,sc5dnddi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddic ,sc5dnddi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddia ,sc5dnddi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddib ,sc5dnddi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddic ,sc5dnddi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Diamond (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3313 AWP DEAL OR NO DEAL DOUBLE TAKE S5 PR3313 DOUBLE TAKE SOUNDS11 DOUBLE TAKE S.SITE
-GAME( 200?, sc5dnddt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddta ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddtb ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddtc ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddtd ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddte ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddtf ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddta ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddtb ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddtc ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddtd ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddte ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddtf ,sc5dnddt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Take (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
// PR3316 AWP DOND DREAM OFFER S5 PR3316 DREAM OFFER SOUNDS11 DREAM OFFER S.SITE
-GAME( 200?, sc5dnddo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddoa ,sc5dnddo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddob ,sc5dnddo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddoc ,sc5dnddo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddoa ,sc5dnddo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddob ,sc5dnddo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddoc ,sc5dnddo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Dream Offer (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3432 AWP DEAL OR NO DEAL FEELING LUCKY SCORP5 PR3309 FEELING LUCKY SOUNDS11 FEELING LUCKY S.SITE
-GAME( 200?, sc5dndfl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3432) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndfla ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3432) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndfl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3432) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndfla ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3432) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3309 AWP DEAL OR NO DEAL FEELING LUCKY SCORP5 PR3309 FEELING LUCKY SOUNDS11 FEELING LUCKY S.SITE
-GAME( 200?, sc5dndflb ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndflc ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndfld ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndfle ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndflb ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndflc ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndfld ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndfle ,sc5dndfl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Feeling Lucky (PR3309) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3501 AWP DEAL OR NO DEAL GAME ON SCORP5 PR3501 DOND GAME ON SOUNDS11 DOND GAME ON S.SITE
-GAME( 200?, sc5dndgo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Game On (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndgoa ,sc5dndgo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Game On (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndgo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Game On (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndgoa ,sc5dndgo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Game On (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3310 AWP DEAL OR NO DEAL GOLD S5 PR3310 DOND GOLD SOUNDS11 DOND GOLD S.SITE
-GAME( 200?, sc5dndgl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndgla ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndglb ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndglc ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndgld ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndgle ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndglf ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndglg ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndglh ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndgli ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndglj ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndglk ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndgl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndgla ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndglb ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndglc ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndgld ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndgle ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndglf ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndglg ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndglh ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndgli ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndglj ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndglk ,sc5dndgl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Gold (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
// PR3415 AWP DEAL OR NO DEAL LIVE THE DREAM S5 PR3415 LIVE THE DREAM SOUNDS11 LIVE THE DREAM S.SITE
-GAME( 200?, sc5dndld ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlda ,sc5dndld, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndldb ,sc5dndld, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndldc ,sc5dndld, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndld ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlda ,sc5dndld, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndldb ,sc5dndld, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndldc ,sc5dndld, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Live The Dream (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3407 AWP DEAL OR NO DEAL MAKE OR BREAK S5 PR3407 MAKE OR BREAK SOUNDS11 MAKE OR BREAK S.SITE
-GAME( 200?, sc5dndmb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmba ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbb ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbc ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbd ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbe ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbf ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbg ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbh ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbi ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbj ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmbk ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmba ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbb ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbc ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbd ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbe ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbf ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbg ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbh ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbi ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbj ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmbk ,sc5dndmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Make Or Break (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
// PR3411 AWP MEGA DEAL OR NO DEAL S5 PR3411 MEGA DOND SOUNDS11 MEGA DOND S.SITE
-GAME( 200?, sc5dndmd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmda ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdd ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmde ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdf ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdi ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdj ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdk ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmda ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdd ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmde ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdf ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdi ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdj ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdk ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3411) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3496 AWP MEGA DEAL OR NO DEAL S5 PR3411 MEGA DOND SOUNDS11 MEGA DOND S.SITE
-GAME( 200?, sc5dndmdb ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdc ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdg ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndmdh ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdb ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdc ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdg ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndmdh ,sc5dndmd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Mega Deal Or No Deal (PR3496) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3404 AWP DEAL OR NO DEAL PLAY IT AGAIN SCORP5 PR3404 PLAY IT AGAIN SOUNDS11 PLAY IT AGAIN S.SITE
-GAME( 200?, sc5dndpa ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpaa ,sc5dndpa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpab ,sc5dndpa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpac ,sc5dndpa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpa ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpaa ,sc5dndpa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpab ,sc5dndpa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpac ,sc5dndpa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play It Again (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3505 AWP DEAL OR NO DEAL PLAY THE GAME S5 PR3505 PLAY THE GAME SOUNDS11 PLAY THE GAME S.SITE
-GAME( 200?, sc5ddptg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddptga ,sc5ddptg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddptgb ,sc5ddptg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddptgc ,sc5ddptg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddptg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddptga ,sc5ddptg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddptgb ,sc5ddptg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddptgc ,sc5ddptg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Play The Game (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3303 AWP DEAL OR NO DEAL THE PLAYERS CHOICE SCORP5 PR3303 PLAYERS CHOICE SOUNDS11 PLAYERS CHOICE S.SITE
-GAME( 200?, sc5ddply ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Player's Choice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddplya ,sc5ddply, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Player's Choice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddply ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Player's Choice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddplya ,sc5ddply, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Player's Choice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3419 AWP DOND ROAD TO RICHES SCORP5 PR3419 ROAD TO RICHES SOUNDS11 ROAD TO RICHES S.SITE
-GAME( 200?, sc5dndrr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrra ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrrb ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrrc ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrrd ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrre ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrra ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrrb ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrrc ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrrd ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrre ,sc5dndrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Road To Riches (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3239 AWP SIMPLY DEAL OR NO DEAL SCORP5 PR3219 SIMPLY DOND SOUNDS11 SIMPLY DOND S.SITE
-GAME( 200?, sc5dndsi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndsia ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndsib ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndsic ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndsid ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndsi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndsia ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndsib ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndsic ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndsid ,sc5dndsi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Simply Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
// PR3405 AWP DEAL OR NO DEAL THE BANKER RINGS TWICE S5 PR3405 DOND BANKER SOUNDS11 DOND THE BANKER S.SITE
-GAME( 200?, sc5dndrt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrta ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrtb ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrtc ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrtd ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrte ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrta ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrtb ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrtc ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrtd ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrte ,sc5dndrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Banker Rings Twice (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3412 AWP DEAL OR NO DEAL THE PERFECT DEAL SCORP5 PR3412 PERFECT DEAL SOUNDS11 THE PERFECT DEAL S.SITE
-GAME( 200?, sc5dndpd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpda ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpdb ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpdc ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpdd ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpde ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpda ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpdb ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpdc ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpdd ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpde ,sc5dndpd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3303 AWP DEAL OR NO DEAL THE PLAYERS CHOICE SCORP5 PR3303 PLAYERS CHOICE SOUNDS11 PLAYERS CHOICE S.SITE
-GAME( 200?, sc5dndpc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Players Choice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpca ,sc5dndpc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Players Choice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Players Choice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpca ,sc5dndpc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Players Choice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3416 AWP DEAL OR NO DEAL THINK BIG SCORP5 PR3416 DOND THINK BIG SOUNDS11 DOND THINK BIG S.SITE
-GAME( 200?, sc5dndtb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Big (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtba ,sc5dndtb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Big (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Big (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtba ,sc5dndtb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Big (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2323 DEVIL OF A DEAL DOAD SOUNDS DEVIL OF A DEAL S.SITE
-GAME( 200?, sc5devil ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5devila ,sc5devil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5devilb ,sc5devil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5devilc ,sc5devil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5devil ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5devila ,sc5devil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5devilb ,sc5devil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5devilc ,sc5devil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Devil Of A Deal (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3007 AWP DRAC PACK SCORP5 PR3007 DRACPACK SOUNDS11 DRAC PACK S.SITE
-GAME( 200?, sc5dracp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Drac Pack (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dracpa ,sc5dracp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Drac Pack (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dracp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Drac Pack (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dracpa ,sc5dracp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Drac Pack (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3306 AWP FAMILY GUY BOOZE HOUND SCORP5 PR3306 BOOZE HOUND SOUNDS11 BOOZE HOUND S.SITE
-GAME( 200?, sc5fgbh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fgbha ,sc5fgbh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fgbhb ,sc5fgbh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fgbhc ,sc5fgbh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fgbh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fgbha ,sc5fgbh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fgbhb ,sc5fgbh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fgbhc ,sc5fgbh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Booze Hound (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3301 AWP FAMILY GUY GRIFFIN PLUMBING S5 PR3301 GRIFFIN PLUMB SOUNDS11 GRIFFIN PLUMBING S.SITE
-GAME( 200?, sc5fggp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fggpa ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fggpb ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fggpc ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fggpd ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fggpe ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fggpf ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fggpg ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggpa ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggpb ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggpc ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggpd ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggpe ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggpf ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fggpg ,sc5fggp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy Griffin Plumbing (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR IT FAST CASH FASTCASHSOUND FAST CASH
-GAME( 200?, sc5fast ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Fast Cash (Qps) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fast ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Fast Cash (Qps) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR3061 CLUB FIGHT NIGHT FIGHT NIGHT CLUB PR3061 CLUB FIGHT NIGHT SOUNDS11 CLUB FIGHT NIGHT
-GAME( 200?, sc5fnclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fnclba ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fnclbb ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fnclbc ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fnclbd ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fnclbe ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fnclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fnclba ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fnclbb ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fnclbc ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fnclbd ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fnclbe ,sc5fnclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fight Night Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1939 FIRE N DICE PR1919 FIRE N DICE SOUNDS11 FIRE N DICE S.SITE
-GAME( 200?, sc5fdice ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fire 'n' Dice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fdicea ,sc5fdice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fire 'n' Dice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fdice ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fire 'n' Dice (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fdicea ,sc5fdice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fire 'n' Dice (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1602 AWP FIRESTARTER SCORP5 PR1602 FIRESTARTER SOUNDS11 FIRESTARTER S.SITE
-GAME( 200?, sc5fires ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5firesa ,sc5fires, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5firesb ,sc5fires, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5firesc ,sc5fires, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fires ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5firesa ,sc5fires, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5firesb ,sc5fires, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5firesc ,sc5fires, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Firestarter (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2418 FLASH THE CASH FLASHCASH SOUNDS FLASHTHECASH
-GAME( 200?, sc5ftcas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Flash The Cash (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ftcasa ,sc5ftcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Flash The Cash (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ftcas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Flash The Cash (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ftcasa ,sc5ftcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Flash The Cash (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2319 FRUIT LOOP FLOOP SOUNDS FRUIT LOOP
-GAME( 200?, sc5floop ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Loops (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5floopa ,sc5floop, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Loops (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5floop ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Loops (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5floopa ,sc5floop, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Loops (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1404 GET RICH QUICK PR1404 GET RICH QUICK SOUNDS11
-GAME( 200?, sc5grq ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5grqa ,sc5grq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5grqb ,sc5grq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5grqc ,sc5grq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5grq ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5grqa ,sc5grq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5grqb ,sc5grq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5grqc ,sc5grq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Get Rich Quick (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1403 GOLD FEVER PR1403 GOLD FEVER SOUNDS11
-GAME( 200?, sc5gldfv ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldfva ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldfvb ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldfvc ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldfvd ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldfve ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldfvf ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldfvg ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfv ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfva ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfvb ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfvc ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfvd ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfve ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfvf ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldfvg ,sc5gldfv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Fever (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3410 AWP GOLDEN GOALS SCORP5 PR3410 GOLDEN GOALS SOUNDS11 GOLDEN GOALS S.SITE
-GAME( 200?, sc5gldgo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Goals (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldgoa ,sc5gldgo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Goals (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldgo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Goals (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldgoa ,sc5gldgo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Goals (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2203 GOLDEN SPINNER GSPINSND (top box?)
-GAME( 200?, sc5gldsp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner (PR2203) (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldsp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner (PR2203) (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2546 GOLDEN SPINNER Bingo Version 011 GSPINSND GOLDEN SPINNER
-GAME( 200?, sc5gldspa ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspb ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspc ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspe ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspg ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspi ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspj ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspk ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspl ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspm ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspo ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspa ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspb ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspc ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspe ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspg ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspi ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspj ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspk ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspl ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspm ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspo ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Bingo (011) (PR2546) (Mazooma) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
// PR2546 GOLDEN SPINNER Arcade Version 061 GSPINSND GOLDEN SPINNER
-GAME( 200?, sc5gldspd ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspf ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldsph ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspn ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gldspp ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspd ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspf ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldsph ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspn ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gldspp ,sc5gldsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Spinner Arcade (061) (PR2546) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
// Z052 GRANDMASTER PR000052 GRANDMASTER 1 GRANDMASTER AWP (looks like a QPS header)
-GAME( 200?, sc5gmclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gmclba ,sc5gmclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gmclbb ,sc5gmclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gmclbc ,sc5gmclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gmclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gmclba ,sc5gmclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gmclbb ,sc5gmclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gmclbc ,sc5gmclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Grand Master Cash (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2318 HI ROLLER HIROLL SOUNDS HIGH ROLLER
-GAME( 200?, sc5hirol ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hirola ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hirolb ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hirolc ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hirold ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hirole ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hirol ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hirola ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hirolb ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hirolc ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hirold ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hirole ,sc5hirol, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","High Roller (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1405 THE HULK PR1405 THE HULK SOUNDS11
-GAME( 200?, sc5hulk ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulka ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulkb ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulkc ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulkd ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulke ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulkf ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulkg ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulkh ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hulki ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulk ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulka ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulkb ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulkc ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulkd ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulke ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulkf ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulkg ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulkh ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hulki ,sc5hulk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hulk, The (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR2316 IT'S A BULLSEYE ITSBULLSEYE SOUNDS IT'S A BULLSEYE
-GAME( 200?, sc5iab ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","It's A Bullseye (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5iaba ,sc5iab, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","It's A Bullseye (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5iab ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","It's A Bullseye (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5iaba ,sc5iab, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","It's A Bullseye (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2450 ITALIAN JOB BTDO ITLY SOUNDS NITH
-GAME( 200?, sc5ijbdo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijbdoa ,sc5ijbdo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijbdob ,sc5ijbdo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijbdoc ,sc5ijbdo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijbdo ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijbdoa ,sc5ijbdo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijbdob ,sc5ijbdo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijbdoc ,sc5ijbdo, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Italian Job - Blow The Doors Off (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2077KING X KING X MAZ BARKX SOUNDS KING X 3
-GAME( 200?, sc5kingx ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X (PR2077) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5kingxa ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X (PR2077) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5kingx ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X (PR2077) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5kingxa ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X (PR2077) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2336KING X KING X MAZ BARKX SOUNDS KING X 3P
-GAME( 200?, sc5kingxc ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X 3P (PR2336) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5kingxe ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X 3P (PR2336) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5kingxc ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X 3P (PR2336) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5kingxe ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X 3P (PR2336) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2279 KING X TRIPLE BARKX SOUNDS + +
-GAME( 200?, sc5kingxb ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X Triple (PR2279) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5kingxd ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X Triple (PR2279) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5kingxb ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X Triple (PR2279) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5kingxd ,sc5kingx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","King X Triple (PR2279) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2344 TOSSTHEMONKEY TOSTM SOUNDS TOSS THE MONKEY
-GAME( 200?, sc5monky ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monkey Business / Toss The Monkey (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5monkya ,sc5monky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monkey Business / Toss The Monkey (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5monky ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monkey Business / Toss The Monkey (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5monkya ,sc5monky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monkey Business / Toss The Monkey (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3431 AWP MONOPOLY BOOM OR BUST CLASSIC S5 PR3307 MPOLY BOOM OR B SOUNDS11 BOOM OR BUST S.SITE
-GAME( 200?, sc5mobob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5moboba ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mobobd ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mobobe ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5moboba ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobd ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobe ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust Classic (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3307 AWP MONOPOLY BOOM OR BUST S5 PR3307 MPOLY BOOM OR B SOUNDS11 BOOM OR BUST S.SITE
-GAME( 200?, sc5mobobb ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mobobc ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mobobf ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mobobg ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mobobh ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mobobi ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobb ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobc ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobf ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobg ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobh ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mobobi ,sc5mobob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Boom Or Bust (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3504 AWP MONOPOLY AUCTION SCORP5 PR3504 MPOLY AUCTION SOUNDS11 MONO AUCTION S.SITE
-GAME( 200?, sc5mogta ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mogtaa ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mogtab ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mogtac ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mogtad ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mogtae ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mogta ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mogtaa ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mogtab ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mogtac ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mogtad ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mogtae ,sc5mogta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Go To Auction (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3311 AWP MONOPOLY MILLIONAIRE SCORP5 PR3311 MPOLY MILL SOUNDS11 MILLIONAIRE S.SITE
-GAME( 200?, sc5momil ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momila ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momilb ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momilc ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momild ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momile ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momil ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momila ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momilb ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momilc ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momild ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momile ,sc5momil, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Millionaire (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1945 CLUB MONEYBAGS MONEY BAGS CLUB PR1955 C M MONEYBAGS SOUNDS11 DEAL OR NO DEAL
-GAME( 200?, sc5mombc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mombca ,sc5mombc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mombcb ,sc5mombc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mombcc ,sc5mombc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mombc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mombca ,sc5mombc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mombcb ,sc5mombc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mombcc ,sc5mombc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags Club (PR1945) (BFM) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2496 MONOPOLY MONEY SPINNER MONY SOUNDS NITH
-GAME( 200?, sc5moms ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momsa ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momsc ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momsd ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5moms ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momsa ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momsc ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momsd ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Money Spinner (PR2496) (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2395 MONEY SPINNER MONY SOUNDS NITH (== sc5monsp code?)
-GAME( 200?, sc5momsb ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Money Spinner (PR2395) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5momse ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Money Spinner (PR2395) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momsb ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Money Spinner (PR2395) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5momse ,sc5moms, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Money Spinner (PR2395) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3408 AWP MONOPOLY PROPERTY LADDER S5 PR3408 MPOLY PROP LAD SOUNDS11 PROPERTY LADDER S.SITE
-GAME( 200?, sc5mopl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mopla ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5moplb ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5moplc ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mopld ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mople ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5moplf ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5moplg ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mopl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mopla ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5moplb ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5moplc ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mopld ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mople ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5moplf ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5moplg ,sc5mopl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Property Ladder (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2457 ROADTORICHES CLUBROADTORICHES CLUB CRTR SOUNDS CLUB ROAD TO RICHES
-GAME( 200?, sc5mor2r ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Road To Riches (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mor2ra ,sc5mor2r, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Road To Riches (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mor2r ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Road To Riches (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mor2ra ,sc5mor2r, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Road To Riches (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2449 PR2449,MONOPOLY WA MONOPOLY WA MAZ
-GAME( 200?, sc5monwa ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Win Again (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5monwaa ,sc5monwa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Win Again (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5monwa ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Win Again (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5monwaa ,sc5monwa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monopoly Win Again (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2485 CLUB MONTE CARLO OR BUST CLUB MONTE CARLO CLUB CLUB MONTE SOUNDS CLUB MONTE CARLO
-GAME( 200?, sc5cmcob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cmcoba ,sc5cmcob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cmcobb ,sc5cmcob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cmcobc ,sc5cmcob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmcob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmcoba ,sc5cmcob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmcobb ,sc5cmcob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmcobc ,sc5cmcob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Monte Carlo Or Bust Club (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2166 NUN N ROSES NANR SOUNDS NUNS N ROSES
-GAME( 200?, sc5nunsb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Nuns 'n' Roses (Bellfruit) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nunsb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Nuns 'n' Roses (Bellfruit) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR3315 AWP OVER THE RAINBOW SCORP5 PR3315 OV THE RAINBOW SOUNDS11 OVER THE RAINBOW S.SITE
-GAME( 200?, sc5rainb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rainba ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rainbb ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rainbc ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rainbd ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rainbe ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rainb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rainba ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rainbb ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rainbc ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rainbd ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rainbe ,sc5rainb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Over The Rainbow (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3015 AWP PARROTS OF THE CARIBBEAN SCORP5 PR3015 P CARIBBEAN SOUNDS11 PARROT CARIBBEAN S.SITE
-GAME( 200?, sc5parot ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5parota ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5parotb ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5parotc ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5parotd ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5parote ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5parotf ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5parotg ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parot ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parota ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parotb ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parotc ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parotd ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parote ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parotf ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5parotg ,sc5parot, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Parrots Of The Caribbean (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2411 PILEONTHEPOUNDS PILE SOUNDS PILE
-GAME( 200?, sc5pilep ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pilepa ,sc5pilep, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pilepb ,sc5pilep, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pilepc ,sc5pilep, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pilep ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pilepa ,sc5pilep, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pilepb ,sc5pilep, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pilepc ,sc5pilep, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Pile On The Pounds (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2306 POTS OF LUCK POTSOFLUCKSOUNDS POTS OF LUCK
-GAME( 200?, sc5potsm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pots Of Luck (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potsma ,sc5potsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pots Of Luck (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potsm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pots Of Luck (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potsma ,sc5potsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pots Of Luck (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3528 CLUB PUBLIC ENEMY S5 PR3528 PUBLIC ENEMY SOUNDS11 PUBLIC ENEMY S.SITE
-GAME( 200?, sc5cpen1 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cpen1a ,sc5cpen1, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cpen1b ,sc5cpen1, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cpen1c ,sc5cpen1, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cpen1 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cpen1a ,sc5cpen1, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cpen1b ,sc5cpen1, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cpen1c ,sc5cpen1, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Public Enemy No1 Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1406 QUALITY STREAK PR1406 QUALITY STREAK SOUNDS11
-GAME( 200?, sc5qual ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quala ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualb ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualc ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quald ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quale ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualf ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualg ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualh ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quali ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualj ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualk ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quall ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5qualm ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qual ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quala ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualb ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualc ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quald ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quale ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualf ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualg ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualh ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quali ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualj ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualk ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quall ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5qualm ,sc5qual, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Quality Streak (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
// PR2169 REEL SPIN SHADY TRSS SOUNDS REEL SPIN SHADY
-GAME( 200?, sc5rssh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Reel Spin Shady (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rssha ,sc5rssh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Reel Spin Shady (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rssh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Reel Spin Shady (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rssha ,sc5rssh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Reel Spin Shady (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3208 AWP ROAD HOG S5 PR3208 ROAD HOG SOUNDS11 ROAD HOG S.SITE
-GAME( 200?, sc5hog ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog (PR3208) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hoga ,sc5hog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog (PR3208) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hog ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog (PR3208) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hoga ,sc5hog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog (PR3208) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3248 ROAD HOG SCORP5 ROAD HOG CLUB PR3248 ROAD HOG SOUNDS11 ROAD HOG
-GAME( 200?, sc5rhclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhclba ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhclbb ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhclbc ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhclbd ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhclbe ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclba ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclbb ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclbc ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclbd ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclbe ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3249 ROAD HOG SCORP5 ROAD HOG FERRY CLUB PR3248 ROAD HOG SOUNDS11
-GAME( 200?, sc5rhclbf ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhclbg ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclbf ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhclbg ,sc5rhclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Road Hog Club (PR3248) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1774 181104 SHARP SHOOTER PR1774 SHARP SHOOTER 1 SHARP SHOOTER AWP
-GAME( 200?, sc5sharp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Voodoo","Sharp Shooter (Voodoo) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sharpa ,sc5sharp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Voodoo","Sharp Shooter (Voodoo) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sharp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Voodoo","Sharp Shooter (Voodoo) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sharpa ,sc5sharp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Voodoo","Sharp Shooter (Voodoo) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// Z056 SHOOTSTARS PR000056 SHOOTSTARS 1 SHOOTSTARS AWP (Qps header?)
-GAME( 200?, sc5sfts ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sftsa ,sc5sfts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sftsb ,sc5sfts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sftsc ,sc5sfts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sfts ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sftsa ,sc5sfts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sftsb ,sc5sfts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sftsc ,sc5sfts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Shoot For The Stars (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2466 SNAKE RATTLE AND ROLL SNAKERR SOUNDS SNAKE R AND ROLL
-GAME( 200?, sc5srrqp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Snake Rattle & Roll (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5srrqpa ,sc5srrqp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Snake Rattle & Roll (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5srrqp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Snake Rattle & Roll (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5srrqpa ,sc5srrqp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Snake Rattle & Roll (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3223 AWP SPINIT TO WINIT S5 PR3203 SPIN IT TO W IT SOUNDS11 SPINIT TO WINIT S.SITE
-GAME( 200?, sc5sitwi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spin It To Win It (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sitwia ,sc5sitwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spin It To Win It (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sitwi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spin It To Win It (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sitwia ,sc5sitwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spin It To Win It (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2205 SPINNING AROUND SPIN SOUNDS SPINNING AROUND
-GAME( 200?, sc5spnrn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spinning Around (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5spnrna ,sc5spnrn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spinning Around (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spnrn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spinning Around (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spnrna ,sc5spnrn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spinning Around (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR0003 RACE02
-GAME( 200?, sc5srace ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Streak Racer (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sracea ,sc5srace, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Streak Racer (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5srace ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Streak Racer (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sracea ,sc5srace, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Streak Racer (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2355 SUPER SLEUTH SSLEUTH SOUNDS SUPER SLEUTH
-GAME( 200?, sc5sleut ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Super Sleuth (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sleuta ,sc5sleut, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Super Sleuth (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sleut ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Super Sleuth (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sleuta ,sc5sleut, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Super Sleuth (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1630 TRICK SHOT MULTI PLAYER TRICK SHOT MULTI ARCADE PR1630 TRICKSHOTMULT SOUNDS11
-GAME( 200?, sc5tsmp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Trick Shot Multi Player (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tsmpa ,sc5tsmp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Trick Shot Multi Player (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tsmp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Trick Shot Multi Player (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tsmpa ,sc5tsmp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Trick Shot Multi Player (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1606 UP POMPAY PR1636 UP POMPAY SOUNDS11 UP POMPAY S.SITE
-GAME( 200?, sc5pompa ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Up Pompay (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pompaa ,sc5pompa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Up Pompay (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pompab ,sc5pompa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Up Pompay (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // incomplete pairing
+GAME( 200?, sc5pompa ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Up Pompay (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pompaa ,sc5pompa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Up Pompay (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pompab ,sc5pompa, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Up Pompay (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // incomplete pairing
// PR2402 VAMPIREPAYER VAMP SOUNDS VAMP
-GAME( 200?, sc5vamp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Vampire Payer (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5vampa ,sc5vamp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Vampire Payer (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5vamp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Vampire Payer (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5vampa ,sc5vamp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Vampire Payer (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2176 VIPER ACTIVE VIPA SOUNDS VIPER ACTIVE
-GAME( 200?, sc5viper ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viper Active (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5vipera ,sc5viper, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viper Active (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5viper ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viper Active (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5vipera ,sc5viper, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viper Active (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2358 VIZ VIZ SOUNDS VIZ
-GAME( 200?, sc5viz ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5viza ,sc5viz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5vizb ,sc5viz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5vizc ,sc5viz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5viz ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5viza ,sc5viz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5vizb ,sc5viz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5vizc ,sc5viz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Viz (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3305 AWP WACKY RACES SCORP5 PR3330 WACKY RACES SOUNDS11 WACKY RACES S.SITE
-GAME( 200?, sc5wacky ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wackya ,sc5wacky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wackyb ,sc5wacky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wackyc ,sc5wacky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wacky ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wackya ,sc5wacky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wackyb ,sc5wacky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wackyc ,sc5wacky, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wacky Racers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2213 WAR OF THE WORLDS WADS SOUNDS
-GAME( 200?, sc5wotw ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","War Of The Wads (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wotwa ,sc5wotw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","War Of The Wads (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wotw ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","War Of The Wads (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wotwa ,sc5wotw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","War Of The Wads (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2196 WILD REELS WILD REELS MAZ WIDR SOUNDS WILD REELS
-GAME( 200?, sc5wild ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Reels (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wilda ,sc5wild, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Reels (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wild ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Reels (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wilda ,sc5wild, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Reels (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2552 WIN CAN ALLEY WINCANALLEYSND WIN CAN ALLEY
-GAME( 200?, sc5wca ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcaa ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcad ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcaf ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcah ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcai ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcal ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcan ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wca ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcaa ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcad ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcaf ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcah ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcai ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcal ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcan ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (Qps) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2552 WIN CAN ALLEY 5 pound 10p Version WINCANALLEYSND WIN CAN ALLEY
-GAME( 200?, sc5wcab ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcae ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcaj ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcam ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcab ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcae ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcaj ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcam ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p version) (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2552 WIN CAN ALLEY 5 pound 10p Arcade Version WINCANALLEYSND
-GAME( 200?, sc5wcac ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcag ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcak ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wcao ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcac ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcag ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcak ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wcao ,sc5wca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Win Can Alley (5 pound 10p Arcade version) (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3218 AWP WOK N ROLL S5 PR3218 WOK N ROLL SOUNDS11 WOK N ROLL S.SITE
-GAME( 200?, sc5wok ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wok n' Roll (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5woka ,sc5wok, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wok n' Roll (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wok ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wok n' Roll (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5woka ,sc5wok, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Wok n' Roll (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2556 RED HOT REELS RHRL SOUNDS RED HOT REELS
-GAME( 200?, sc5rhr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhra ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhrb ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhrc ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhrd ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhre ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhra ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhrb ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhrc ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhrd ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhre ,sc5rhr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Red Hot Reels (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2458 CLUB SNAKE RATTLE AND ROLL CLUB SRAR CLUB CLUB SRAR SND CLUB SNAKE RATTLE AND ROLL
-GAME( 200?, sc5srrcl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5srrcla ,sc5srrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5srrclb ,sc5srrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5srrclc ,sc5srrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5srrcl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5srrcla ,sc5srrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5srrclb ,sc5srrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5srrclc ,sc5srrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snake Rattle 'n' Roll Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3422 CLUB THE PRIZE IS RIGHT S5 PR3422 PRIZE IS RIGHT SOUNDS11 THE PRIZE IS RIGHT S.SITE
-GAME( 200?, sc5pircl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pircla ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pirclb ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pirclc ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pircld ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pircle ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pirclf ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pirclg ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pircl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pircla ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pirclb ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pirclc ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pircld ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pircle ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pirclf ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pirclg ,sc5pircl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","The Prize Is Right Club (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2457 ROADTORICHES CLUBROADTORICHES CLUB CRTR SOUNDS CLUB ROAD TO RICHES
-GAME( 200?, sc5mrrcl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mrrcla ,sc5mrrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mrrclb ,sc5mrrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mrrclc ,sc5mrrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mrrcl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mrrcla ,sc5mrrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mrrclb ,sc5mrrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mrrclc ,sc5mrrcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// BFGP1234..............G95427832.RAZY_.PR3436 CF COMMUNITY P SOUNDS11. (non-standard header, seems to indicate that these are actually Crazy Fruits Community Parts?)
-GAME( 200?, sc5crcpt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crcpta ,sc5crcpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crcptb ,sc5crcpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crcpt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crcpta ,sc5crcpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crcptb ,sc5crcpt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Community Party (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
// PR3009 AWP ANT N DECS JIGGY BANK S5 PR3009 JIGGY BANK SOUNDS11 JIGGY BANK S.SITE
-GAME( 200?, sc5adjb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjba ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbb ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbc ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbd ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbe ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbf ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbg ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbh ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbi ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbj ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbk ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbl ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbm ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbn ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbo ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbp ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbq ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbr ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbs ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adjbt ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjba ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbb ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbc ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbd ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbe ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbf ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbg ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbh ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbi ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbj ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbk ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbl ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbm ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbn ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbo ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbp ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbq ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbr ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbs ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adjbt ,sc5adjb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Jiggy Bank (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
// PR1920 AWP ANT N DECS WTAD S5 PR1940 ADSNT SHOWTIME SOUNDS11 ANTNDECSWTAD S.SITE
-GAME( 200?, sc5adwta ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adwtaa ,sc5adwta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adwta ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adwtaa ,sc5adwta, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway Win The Ads (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2200 AROUND THE BOARD AROU SOUNDS AROUND THE BOARD
-GAME( 200?, sc5a40 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5a40a ,sc5a40, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5a40 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5a40a ,sc5a40, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Around The Board In 40 Days (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2301 BANTAM OF THE OPERA BANTAM SOUNDS BANTAMOFTHEOPERA
-GAME( 200?, sc5bantm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bantma ,sc5bantm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bantm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bantma ,sc5bantm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bantam Of The Opera (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1447 BAR7S PR1492 CAS BAR SEVENS SOUNDS11 BAR 7S M.SITE
-GAME( 200?, sc5bar7 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bar7a ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7a ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3064 BINGO BAR7 S5 PR1433 BAR SEVENS SOUNDS11 BAR7 S.SITE
-GAME( 200?, sc5bar7b ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bar7c ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bar7d ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bar7e ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bar7f ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bar7g ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7b ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7c ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7d ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7e ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7f ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bar7g ,sc5bar7, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bar 7's Bingo (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1704 AWP BATTLESHIPS AND CRUISERS PR1704 B AND C SOUNDS11 BATTLESHIPSCRUIS S.SITE
-GAME( 200?, sc5batl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5batla ,sc5batl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5batl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5batla ,sc5batl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Battleships & Cruisers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2170 BOBBY DAZZLER BOBD SOUNDS BOBBY DAZZLER
-GAME( 200?, sc5bob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5boba ,sc5bob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bobb ,sc5bob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bobc ,sc5bob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5boba ,sc5bob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bobb ,sc5bob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bobc ,sc5bob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Bobby Dazzler (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1702 AWP BULLSEYE SCORP5 PR1702 BULLSEYE SOUNDS11 BULLSEYE S.SITE
-GAME( 200?, sc5bull ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bulla ,sc5bull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bullb ,sc5bull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bullc ,sc5bull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bull ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bulla ,sc5bull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bullb ,sc5bull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bullc ,sc5bull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1719 AWP SUPER BULLSEYE SCORP5 PR1702 BULLSEYE SOUNDS11 SUPER BULLSEYE S.SITE
-GAME( 200?, sc5sbull ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Super Bullseye (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sbulla ,sc5sbull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Super Bullseye (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sbull ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Super Bullseye (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sbulla ,sc5sbull, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Super Bullseye (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3318 AWP BULLSEYE 5 REELS S5 PR3318 BULLSEYE SOUNDS11 BULLSEYE S.SITE
-GAME( 200?, sc5bull5 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bull5a ,sc5bull5, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bull5b ,sc5bull5, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bull5c ,sc5bull5, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bull5 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bull5a ,sc5bull5, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bull5b ,sc5bull5, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bull5c ,sc5bull5, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bullseye 5 Reels (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1910 AWP BUTCH CASHIDY AND THE SUNDANCE QUID S5 PR1910 B C AND THE S Q SOUNDS11 BUTCH N SUNDANCE S.SITE
-GAME( 200?, sc5butch ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5butcha ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5butchb ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5butchc ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5butchd ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5butche ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5butch ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5butcha ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5butchb ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5butchc ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5butchd ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5butche ,sc5butch, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Butch Cashidy & The Sundance Quid (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2209 CABIN FEVER CABF SOUNDS CABIN FEVER
-GAME( 200?, sc5cabin ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cabina ,sc5cabin, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cabinb ,sc5cabin, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cabinc ,sc5cabin, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cabin ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cabina ,sc5cabin, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cabinb ,sc5cabin, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cabinc ,sc5cabin, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cabin Fever (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2326 CARIBBEAN CASH CABC SOUNDS CARIBBEAN CASH
-GAME( 200?, sc5cari ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5caria ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5carib ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5caric ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5carid ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5carie ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5carif ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5carig ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cari ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5caria ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5carib ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5caric ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5carid ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5carie ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5carif ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5carig ,sc5cari, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Caribbean Cash (Qps) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1683 BLAS14
-GAME( 200?, sc5cblas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Blast (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cblasa ,sc5cblas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Blast (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cblas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Blast (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cblasa ,sc5cblas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cash Blast (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2338 XTRAVAGANZA XTRV SOUNDS XTRAVAGANZA
-GAME( 200?, sc5casxt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5casxta ,sc5casxt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5casxt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5casxta ,sc5casxt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Casino Xtravaganza (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1711 AWP CHAV IT SCORP5 PR1711 CHAV IT SOUNDS11 CHAV IT S.SITE
-GAME( 200?, sc5chavi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavia ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavib ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavic ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavid ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavie ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavia ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavib ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavic ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavid ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavie ,sc5chavi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chav It (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2305 CHAVVY CHASE CHVY SOUNDS
-GAME( 200?, sc5chavy ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavya ,sc5chavy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavyb ,sc5chavy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chavyc ,sc5chavy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavy ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavya ,sc5chavy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavyb ,sc5chavy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chavyc ,sc5chavy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Chavy Chase (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2230 CLUEDO CLUE SOUNDS CLUEDO
-GAME( 200?, sc5clue ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cluea ,sc5clue, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clueb ,sc5clue, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cluec ,sc5clue, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clue ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cluea ,sc5clue, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clueb ,sc5clue, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cluec ,sc5clue, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Cluedo (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1308 COLOUR MANIA PR1308 COLOUR MAN SOUNDS11
-GAME( 200?, sc5cmani ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cmania ,sc5cmani, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cmanib ,sc5cmani, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cmanic ,sc5cmani, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmani ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmania ,sc5cmani, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmanib ,sc5cmani, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cmanic ,sc5cmani, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Colour Mania (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1416 COOL JEWELS PR1416 COOL JEWELS SOUNDS11 COOL JEWELS S.SITE
-GAME( 200?, sc5cj ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cja ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cjb ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cjc ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cjd ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cje ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cj ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cja ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cjb ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cjc ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cjd ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cje ,sc5cj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cool Jewels (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1109 AWP COP THE LOT PR1109 CTLOT SOUNDS11
-GAME( 200?, sc5ctl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ctla ,sc5ctl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ctlb ,sc5ctl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ctlc ,sc5ctl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ctl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ctla ,sc5ctl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ctlb ,sc5ctl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ctlc ,sc5ctl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cop The Lot (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3005 AWP COPS AND ROBBERS SAFE CRACKER S5 PR3005 SAFE CRACKER SOUNDS11 SAFE CRACKER S.SITE
-GAME( 200?, sc5crsc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsca ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscb ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscc ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscd ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsce ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscf ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscg ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsch ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsci ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscj ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsck ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscl ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscm ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscn ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsco ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscp ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscq ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscr ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscs ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crsct ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5crscu ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsca ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscb ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscc ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscd ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsce ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscf ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscg ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsch ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsci ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscj ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsck ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscl ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscm ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscn ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsco ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscp ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscq ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscr ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscs ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crsct ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5crscu ,sc5crsc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers Safe Cracker (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
// PROJECT NUMBER PR2252 CORONATION ST CORRY SOUNDS CORONATION ST
-GAME( 200?, sc5coro ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corom ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coroy ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coro0 ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coro ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corom ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroy ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coro0 ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street (PR2252) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2552 CORONATION ST COROST_SINGLE CORONATION ST
-GAME( 200?, sc5coroe ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corof ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corog ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coroh ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coroq ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coror ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coros ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corot ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroe ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corof ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corog ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroh ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroq ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coror ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coros ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corot ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Single (PR2252) (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2249 CORONATION ST TRIPLE COROST SOUNDS (top box maybe?)
-GAME( 200?, sc5coroa ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroa ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
// PR2249 CORONATION STREET CORS MAZ COROST_TRIPLE SOUNDS
-GAME( 200?, sc5corok ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corol ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corow ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corox ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corok ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corol ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corow ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corox ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple (PR2249) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2249 CORONATION STREET Arcade Version 061 COROST_TRIPLE SOUNDS CORONATION ST
-GAME( 200?, sc5corob ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V061) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coron ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V061) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corob ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V061) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coron ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V061) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2249 CORONATION STREET Arcade Version 063 COROST_TRIPLE SOUNDS CORONATION ST
-GAME( 200?, sc5coroj ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V063) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corov ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V063) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroj ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V063) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corov ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Arcade (V063) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2249 CORONATION STREET Bingo Version 012 COROST_TRIPLE SOUNDS CORONATION ST
-GAME( 200?, sc5coroc ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corod ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coroi ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coroo ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corop ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5corou ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroc ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corod ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroi ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroo ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corop ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5corou ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V012) (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2249 CORONATION STREET Bingo Version 013 COROST_TRIPLE SOUNDS CORONATION ST
-GAME( 200?, sc5coroz ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V013) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5coro1 ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V013) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coroz ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V013) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5coro1 ,sc5coro, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Coronation Street Triple Bingo (V013) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1909 AWP COUNTDOWN S5 PR1909 COUNTDOWN SOUNDS11 COUNTDOWN S.SITE
-GAME( 200?, sc5count ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5counta ,sc5count, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5count ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5counta ,sc5count, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Countdown (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2387. T FRUIT CRAZY T FRUIT CRAZY QPS GOLD X TRIPLE (but contains Crazy Keys strings as well?)
-GAME( 200?, sc5czfr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Fruit Crazy Triple / Crazy Keys (QPS) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5czfr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Fruit Crazy Triple / Crazy Keys (QPS) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2388 FRUIT CRAZY SINGLE FRUIT CRAZY CRZ SOUNDS PR2388 FRUIT CRAZY FRUIT CRAZY MAZ (not a standard header)
-GAME( 200?, sc5frcrz ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Crazy (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5frcrza ,sc5czfr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Crazy (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5frcrz ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Crazy (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5frcrza ,sc5czfr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Fruit Crazy (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1608 AWP CROWN JEWELS PR1608 CROWN JEWELS SOUNDS11 CROWN JEWELS S.SITE
-GAME( 2004, sc5crnjw ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crown Jewels (PR1608) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2004, sc5crnjwa ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crown Jewels (PR1608) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2004, sc5crnjwb ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crown Jewels (PR1608) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2004, sc5crnjw ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crown Jewels (PR1608) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2004, sc5crnjwa ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crown Jewels (PR1608) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2004, sc5crnjwb ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Crown Jewels (PR1608) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
// Z055 CJEWELS PR000055 CJEWELS 1 CJEWELS AWP
-GAME( 200?, sc5cjqps ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cjqpsa ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cjqpsb ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5cjqpsc ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cjqps ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cjqpsa ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cjqpsb ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5cjqpsc ,sc5crnjw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Crown Jewels (Z055) (QPS) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1907 AWP DEAL OR NO DEAL S5 PR1907 DEAL OR NO DEAL SOUNDS11 DEALORNODEAL S.SITE
-GAME( 200?, sc5dnd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnda ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndb ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndc ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndd ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnde ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndf ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndg ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndh ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndi ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndj ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndk ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndl ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndm ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndn ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndo ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndp ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndq ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndr ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnds ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndt ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnda ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndb ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndc ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndd ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnde ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndf ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndg ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndh ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndi ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndj ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndk ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndl ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndm ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndn ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndo ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndp ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndq ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndr ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnds ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndt ,sc5dnd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
// PR1954 CASINO DOND REELS CASINO DOND ARCADE PR1954 CASINO DOND R SOUNDS11
-GAME( 200?, sc5dndcs ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsa ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsb ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsc ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsd ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcse ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsf ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsg ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsh ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsi ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsj ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsk ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsl ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcsm ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-
-
-GAME( 200?, sc5dndc2 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE
-GAME( 200?, sc5dndc2a ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5dndc2b ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-
-GAME( 200?, sc5dndc2c ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // PR1964 CASINO DOND TOP DOND TOPBOX ARCADE PR1964 CASINO DOND R SOUNDS11
-GAME( 200?, sc5dndc2d ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-
-GAME( 200?, sc5dndc2e ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL ) // PR1964 CASINO DOND TOP S5 DOND TOPBOX ARCADE
-GAME( 200?, sc5dndc2f ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5dndc2g ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5dndc2h ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5dndc2i ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2j ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2k ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2l ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2m ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND TOP S5 DOND TOPBOX ARCADE PR1964 CASINO DOND R SOUNDS11
-GAME( 200?, sc5dndc2n ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2o ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND TOP S5 DOND TOPBOX ARCADE PR1964 CASINO DOND SOUNDS12
-GAME( 200?, sc5dndc2p ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )// ^^
-
-GAME( 200?, sc5dndc2q ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE PR1964 CASINO DOND R SOUNDS11
-GAME( 200?, sc5dndc2r ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2s ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2t ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2u ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE PR1964 CASINO DOND SOUNDS12
-GAME( 200?, sc5dndc2v ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )// ^^
-GAME( 200?, sc5dndc2w ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE
-
-GAME( 200?, sc5dndc3 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR1965 CASINO DOND TOPBOX CASINO DOND ARCADE PR1965 CASINO DOND R SOUNDS11
-GAME( 200?, sc5dndc3a ,sc5dndc3, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5dndc3b ,sc5dndc3, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5dndc3c ,sc5dndc3, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5dndcs ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsa ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsb ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsc ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsd ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcse ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsf ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsg ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsh ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsi ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsj ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsk ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsl ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcsm ,sc5dndcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1954) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+
+
+GAME( 200?, sc5dndc2 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE
+GAME( 200?, sc5dndc2a ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5dndc2b ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+
+GAME( 200?, sc5dndc2c ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // PR1964 CASINO DOND TOP DOND TOPBOX ARCADE PR1964 CASINO DOND R SOUNDS11
+GAME( 200?, sc5dndc2d ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+
+GAME( 200?, sc5dndc2e ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL ) // PR1964 CASINO DOND TOP S5 DOND TOPBOX ARCADE
+GAME( 200?, sc5dndc2f ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5dndc2g ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5dndc2h ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5dndc2i ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2j ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2k ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2l ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2m ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND TOP S5 DOND TOPBOX ARCADE PR1964 CASINO DOND R SOUNDS11
+GAME( 200?, sc5dndc2n ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2o ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND TOP S5 DOND TOPBOX ARCADE PR1964 CASINO DOND SOUNDS12
+GAME( 200?, sc5dndc2p ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )// ^^
+
+GAME( 200?, sc5dndc2q ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE PR1964 CASINO DOND R SOUNDS11
+GAME( 200?, sc5dndc2r ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2s ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2t ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2u ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE PR1964 CASINO DOND SOUNDS12
+GAME( 200?, sc5dndc2v ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )// ^^
+GAME( 200?, sc5dndc2w ,sc5dndc2, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1964) (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )// PR1964 CASINO DOND MULTI DOND MULTIPLAYER ARCADE
+
+GAME( 200?, sc5dndc3 ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR1965 CASINO DOND TOPBOX CASINO DOND ARCADE PR1965 CASINO DOND R SOUNDS11
+GAME( 200?, sc5dndc3a ,sc5dndc3, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5dndc3b ,sc5dndc3, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5dndc3c ,sc5dndc3, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Casino (PR1965) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // ^^
// PR3209 AWP DEAL OR NO DEAL BREAK THE BANK SCORP5 PR3209 BREAK THE BANK SOUNDS11 BREAK THE BANK S.SITE
-GAME( 200?, sc5dndbb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbba ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbbb ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbbc ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbbd ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbbe ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbbf ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbbg ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbba ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbbb ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbbc ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbbd ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbbe ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbbf ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbbg ,sc5dndbb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Break The Bank (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR???? CLUB DEAL OR NO DEAL DEAL OR NO DEAL CLUB PR3068 BEAT THE BANKER SOUNDS11 DEAL OR NO DEAL
-GAME( 200?, sc5dndcl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcla ,sc5dndcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcla ,sc5dndcl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR???? CLUB DEAL OR NO DEAL BEAT THE BANKER CLUB PR3068 BEAT THE BANKER SOUNDS11 (there were in the Walk of Wealth sets)
-GAME( 200?, sc5dndcb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club Beat The Banker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcba ,sc5dndcb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club Beat The Banker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club Beat The Banker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcba ,sc5dndcb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Club Beat The Banker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3215 AWP DEAL OR NO DEAL DOUBLE S5 PR3215 DOND DOUBLE SOUNDS11 DOUBLE DOND S.SITE
-GAME( 200?, sc5dnddd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddda ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndddb ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndddc ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndddd ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddde ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndddf ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndddg ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndddh ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndddi ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddda ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndddb ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndddc ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndddd ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddde ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndddf ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndddg ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndddh ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndddi ,sc5dnddd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Double Deal Or No Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR3008 DEAL OR NO DEAL HALL OF FAME SCORP5 PR3008 HALL OF FAME SOUNDS11 HALL OF FAME S.SITE
-GAME( 200?, sc5dndhf ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfa ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfb ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfc ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfd ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfe ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhff ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfg ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfh ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfi ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfj ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfk ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfl ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfm ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfn ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfo ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfp ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfq ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfr ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfs ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhft ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndhfu ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhf ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfa ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfb ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfc ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfd ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfe ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhff ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfg ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfh ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfi ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfj ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfk ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfl ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfm ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfn ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfo ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfp ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfq ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfr ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfs ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhft ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndhfu ,sc5dndhf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Hall Of Fame (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
// PR3207 AWP DEAL OR NO DEAL ITS YOUR SHOW SCORP5 PR3207 ITS YOUR SHOW SOUNDS11 ITS YOUR SHOW S.SITE
-GAME( 200?, sc5dndys ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndysa ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndysb ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndysc ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndysd ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndyse ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndysf ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndysg ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndysh ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndys ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndysa ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndysb ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndysc ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndysd ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndyse ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndysf ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndysg ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndysh ,sc5dndys, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal It's Your Show (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
// PR3232 AWP DEAL OR NO DEAL LETS PLAY DEAL OR NO DEAL SCORP5 PR3212 LETS PLAY DOND SOUNDS11 LETS PLAY DOND S.SITE
-GAME( 200?, sc5dndlp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpa ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpb ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpc ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpd ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpe ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpf ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpg ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlph ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpi ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpj ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpk ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpl ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpm ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpn ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpo ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpp ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpq ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpr ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlps ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpt ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndlpu ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpa ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpb ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpc ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpd ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpe ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpf ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpg ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlph ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpi ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpj ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpk ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpl ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpm ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpn ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpo ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpp ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpq ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpr ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlps ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpt ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndlpu ,sc5dndlp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Let's Play Deal Or No Deal (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
// PR3201 AWP DEAL OR NO DEAL RED ALERT SCORP5 PR3201 DOND RED ALERT SOUNDS11 RED ALERT S.SITE
-GAME( 200?, sc5dndra ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndraa ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrab ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrac ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrad ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrae ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndraf ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrag ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrah ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrai ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndraj ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndrak ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndra ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndraa ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrab ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrac ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrad ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrae ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndraf ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrag ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrah ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrai ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndraj ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndrak ,sc5dndra, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Red Alert (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
// PR3210 AWP DEAL OR NO DEAL THE BIG DEAL SCORP5 PR3210 THE BIG DEAL SOUNDS11 THE BIG DEAL S.SITE
-GAME( 200?, sc5dndbd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbda ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbdb ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbdc ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbdd ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbde ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbdf ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbdg ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbdh ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbdi ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbda ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbdb ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbdc ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbdd ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbde ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbdf ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbdg ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbdh ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbdi ,sc5dndbd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Deal (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR3011 AWP DEAL OR NO DEAL THE BIG REDS S5 PR3011 THE BIG REDS SOUNDS11 THE BIG REDS S.SITE
-GAME( 200?, sc5dndbr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbra ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrd ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrf ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrg ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrj ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrl ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrm ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrn ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbro ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrp ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrq ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrr ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrs ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrt ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbru ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrv ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrw ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbra ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrd ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrf ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrg ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrj ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrl ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrm ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrn ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbro ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrp ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrq ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrr ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrs ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrt ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbru ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrv ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrw ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3011) (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
// PR3018 AWP DEAL OR NO DEAL THE BIG REDS S5 PR3011 THE BIG REDS SOUNDS11 THE BIG REDS S.SITE
-GAME( 200?, sc5dndbrb ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrc ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbre ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrh ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbri ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbrk ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrb ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrc ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbre ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrh ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbri ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbrk ,sc5dndbr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Big Reds (PR3018) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR3017 AWP DEAL OR NO DEAL THE CRAZY CHAIR SCORP5 PR3017 CRAZY CHAIR SOUNDS11 CRAZY CHAIR S.SITE
-GAME( 200?, sc5dndcc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcca ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccb ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccc ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccd ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcce ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccf ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccg ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcch ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcci ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccj ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcck ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccl ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccm ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccn ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcco ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccp ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccq ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndccr ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcca ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccb ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccc ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccd ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcce ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccf ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccg ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcch ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcci ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccj ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcck ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccl ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccm ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccn ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcco ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccp ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccq ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndccr ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
// PR3250 DOND THE CRAZY CHAIR CRAZY CHAIR ARCADE PR3250 THE CRAZY CHAIR SOUNDS11
-GAME( 200?, sc5dndca ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcaa ,sc5dndca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcab ,sc5dndca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcac ,sc5dndca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndca ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcaa ,sc5dndca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcab ,sc5dndca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcac ,sc5dndca, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3250) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3362 DOND THE CRAZY CHAIR CRAZY CHAIR ARCADE PR3362 THE CRAZY CHAIR SOUNDS11
-GAME( 200?, sc5dndcad ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3362) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndcae ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3362) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcad ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3362) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndcae ,sc5dndcc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Crazy Chair Arcade (PR3362) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3013 AWP THE DEAL WHEEL S5 PR3202 THE DEAL WHEEL SOUNDS11 THE DEAL WHEEL S.SITE
-GAME( 200?, sc5dnddw ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwa ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwb ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwc ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwd ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwe ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwf ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwg ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwh ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwi ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddwj ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddw ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwa ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwb ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwc ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwd ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwe ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwf ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwg ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwh ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwi ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddwj ,sc5dnddw, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Deal Wheel (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
// PR3014 AWP DEAL OR NO DEAL THE DREAM FACTORY SCORP5 PR3014 DREAM FACTORY SOUNDS11 DREAM FACTORY S.SITE
-GAME( 200?, sc5dnddf ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfa ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfb ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfc ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfd ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfe ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddff ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfg ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfh ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfi ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfj ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfk ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfl ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfm ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dnddfn ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddf ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfa ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfb ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfc ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfd ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfe ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddff ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfg ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfh ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfi ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfj ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfk ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfl ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfm ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dnddfn ,sc5dnddf, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Dream Factory (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
// PR3220 AWP DEAL OR NO DEAL THE PERFECT GAME SCORP5 PR3220 DOND PERFECT SOUNDS11 THE PERFECT GAME S.SITE
-GAME( 200?, sc5dndpg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpga ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgb ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgc ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgd ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpge ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgf ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgg ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgh ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgi ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgj ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgk ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgl ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgm ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgn ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgo ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgp ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgq ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgr ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgs ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgt ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgu ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgv ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpgw ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpga ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgb ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgc ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgd ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpge ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgf ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgg ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgh ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgi ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgj ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgk ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgl ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgm ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgn ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgo ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgp ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgq ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgr ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgs ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgt ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgu ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgv ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpgw ,sc5dndpg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )
// PR3403 AWP CLASSIC DEAL OR NO DEAL THE PERFECT GAME SCORP5 PR3220 DOND PERFECT SOUNDS11 THE PERFECT GAME S.SITE
-GAME( 200?, sc5dndpl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndpla ,sc5dndpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndplb ,sc5dndpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndplc ,sc5dndpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndpla ,sc5dndpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndplb ,sc5dndpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndplc ,sc5dndpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Perfect Game Classic (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3003 AWP DOND THE POWER 5 SCORP5 PR3033 POWER FIVE SOUNDS11 DOND THE POWER 5 S.SITE
-GAME( 200?, sc5dndtp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpa ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpb ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpc ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpd ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpe ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpf ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpg ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtph ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpi ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpj ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpk ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpl ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpm ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpn ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpo ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpp ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpq ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpr ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtps ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpt ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpu ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtpv ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpa ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpb ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpc ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpd ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpe ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpf ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpg ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtph ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpi ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpj ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpk ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpl ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpm ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpn ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpo ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpp ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpq ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpr ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtps ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpt ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpu ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtpv ,sc5dndtp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Power (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
// PR3036 AWP DEAL OR NO DEAL THE WALK OF WEALTH SCORP5 PR3006 WALK OF WEALTH SOUNDS11 WALK OF WEALTH S.SITE
-GAME( 200?, sc5dndww ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwa ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwb ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwc ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwd ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwe ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwf ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwg ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwh ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwi ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwj ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwk ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwl ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwm ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwn ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwo ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwp ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwq ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwwr ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwws ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndww ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwa ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwb ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwc ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwd ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwe ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwf ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwg ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwh ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwi ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwj ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwk ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwl ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwm ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwn ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwo ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwp ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwq ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwwr ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwws ,sc5dndww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
// PR3026 AWP CLASSIC DEAL OR NO DEAL THE WALK OF WEALTH SCORP5 PR3006 WALK OF WEALTH SOUNDS11 WALK OF WEALTH S.SITE
-GAME( 200?, sc5dndwc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwca ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwcb ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwcc ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwcd ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwce ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwcf ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwcg ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwca ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwcb ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwcc ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwcd ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwce ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwcf ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwcg ,sc5dndwc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal The Walk Of Wealth Classic (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3304 DOND THINK RED S5 PR3304 THINK RED SOUNDS11 THINK RED S.SITE
-GAME( 200?, sc5dndtr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtra ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrb ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrc ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrd ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtre ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrf ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrg ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrh ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtri ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrj ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndtrk ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtra ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrb ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrc ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrd ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtre ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrf ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrg ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrh ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtri ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrj ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndtrk ,sc5dndtr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Think Red (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
// PR1962 AWP DEAL OR NO DEAL WHATS IN YOUR BOX SCORP5 PR1962 WHATS IN Y BOX SOUNDS11 WHATS IN YOUR BX S.SITE
-GAME( 200?, sc5dndwb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwba ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbb ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbc ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbd ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbe ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbf ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbg ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbh ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbi ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbj ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbk ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbl ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbm ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbn ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbo ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbp ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbq ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbr ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwbs ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwba ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbb ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbc ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbd ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbe ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbf ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbg ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbh ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbi ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbj ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbk ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbl ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbm ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbn ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbo ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbp ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbq ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbr ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwbs ,sc5dndwb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
// PR3071 CASINO DOND WIYB REELS CASINO DOND ARCADE PR3071 W IN YOUR BOX SOUNDS11
-GAME( 200?, sc5dndwi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwia ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwib ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwic ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwid ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwie ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwif ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndwig ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwi ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwia ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwib ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwic ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwid ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwie ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwif ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndwig ,sc5dndwi, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal What's In Your Box Casino (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1307 AWP DIAMOND MINE PR1307 DIAM MINE SOUNDS11
-GAME( 2002, sc5dmine ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dminea ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dmineb ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dminec ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dmined ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dminee ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dminef ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dmineg ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dmineh ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dminei ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dmine ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminea ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dmineb ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminec ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dmined ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminee ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminef ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dmineg ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dmineh ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminei ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR1307 AWP DIAMOND MINE PR1307 DIAM MINE SOUNDS11 DIAMOND MINE S.SITE
-GAME( 2002, sc5dminej ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dminek ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2002, sc5dminel ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminej ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminek ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2002, sc5dminel ,sc5dmine, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Diamond Mine (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
// PR1394 AWP DOCTOR DOSH SCORP5 PR1309 DOCTOR DOSH SOUNDS11
-GAME( 200?, sc5ddosh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddosha ,sc5ddosh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddosh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddosha ,sc5ddosh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Doctor Dosh (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1716 AWP DOUGH HO HO S5 PR1716 DOUGH HO HO SOUNDS11 DOUGH HO HO S.SITE
-GAME( 200?, sc5dhh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dhha ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dhhb ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dhhc ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dhhd ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dhhe ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dhhf ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dhhg ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL ) // incomplete pairing
+GAME( 200?, sc5dhh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dhha ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dhhb ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dhhc ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dhhd ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dhhe ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dhhf ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dhhg ,sc5dhh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Ho Ho (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL ) // incomplete pairing
// PR1615 AWP DOUGH SELECTA SCORP5 PR1615 DOUGH SELECTA SOUNDS11 DOUGH SELECTA S.SITE
-GAME( 200?, sc5dough ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dougha ,sc5dough, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dough ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dougha ,sc5dough, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Dough Selecta (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2118 DUCKS OF HAZZARD DUCKSOFHAZZARDSND DUCKS OF HAZZARD
-GAME( 200?, sc5ducks ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ducks ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Ducks Of Hazzard (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2313 EMMERDALE EMMR SOUNDS EMMERDALE
-GAME( 200?, sc5emmer ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5emmera ,sc5emmer, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5emmer ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5emmera ,sc5emmer, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Emmerdale (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3213 AWP FAMILY GUY S5 PR3213 FAMILY GUY SOUNDS11 FAMILY GUY S.SITE
-GAME( 200?, sc5fguy ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fguya ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fguyb ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fguyc ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fguyd ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fguye ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fguyf ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fguyg ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguy ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguya ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguyb ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguyc ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguyd ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguye ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguyf ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fguyg ,sc5fguy, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Family Guy (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1701 AWP FAT BOY SPIN SCORP5 PR1701 FAT BOY SPIN SOUNDS11 FAT BOY SPIN S.SITE
-GAME( 200?, sc5fbspn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fbspna ,sc5fbspn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fbspn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fbspna ,sc5fbspn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Fat Boy Spin (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2328 FULL METAL JACKPOT FULLM SOUNDS F METAL JACKPOT
-GAME( 200?, sc5fmj ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5fmja ,sc5fmj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fmj ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5fmja ,sc5fmj, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Full Metal Jackpot (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2255 GLADIATOR GLAD SOUNDS GLADIATOR
-GAME( 200?, sc5glad ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5glada ,sc5glad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gladb ,sc5glad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gladc ,sc5glad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5glad ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5glada ,sc5glad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gladb ,sc5glad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gladc ,sc5glad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gladiator (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3509 AWP GOLD DIGGER SCORP5 PR3509 GOLD DIGGER SOUNDS11 GOLD DIGGER S.SITE
-GAME( 200?, sc5gd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gda ,sc5gd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gda ,sc5gd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2325 GOLD DIGGERS GOLD SOUNDS GOLD DIGGERS
-GAME( 200?, sc5gdmz ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gold Diggers (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdmza ,sc5gdmz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gold Diggers (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdmz ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gold Diggers (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdmza ,sc5gdmz, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Gold Diggers (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1137 CLUB GOLD DIGGER CLUB GOLD DIGGER CLUB PR1137 GOLDD CL SOUNDS11
-GAME( 200?, sc5gdclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclba ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbb ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbc ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbd ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbe ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbf ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbg ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclba ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbb ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbc ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbd ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbe ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbf ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbg ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3429 CLUB GOLD DIGGER CLUB GOLD DIGGER CLUB PR1137 GOLDD CL SOUNDS11
-GAME( 200?, sc5gdclbj ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (PR3429) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbk ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (PR3429) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbj ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (PR3429) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbk ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger Club (PR3429) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3509 AWP GOLD DIGGER SCORP5 PR3509 GOLD DIGGER SOUNDS11 GOLD DIGGER S.SITE
-GAME( 200?, sc5gdclbh ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (PR3509) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gdclbi ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (PR3509) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbh ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (PR3509) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gdclbi ,sc5gdclb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gold Digger (PR3509) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1604 AWP GOLDEN BALLS PR1604 GOLDEN BALLS SOUNDS12 GOLDEN BALLS S.SITE (same as the sc5 version)
-GAME( 200?, sc5gball ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gballa ,sc5gball, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gballb ,sc5gball, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gballc ,sc5gball, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gball ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gballa ,sc5gball, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gballb ,sc5gball, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gballc ,sc5gball, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Golden Balls (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2208 GOLDEN GAME PLASMA GOLDEN GAME MAZ BARX SOUNDS
-GAME( 200?, sc5ggame ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ggamea ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ggameb ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ggamec ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ggamed ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ggame ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ggamea ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ggameb ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ggamec ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ggamed ,sc5ggame, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Golden Game (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ggg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR2371 GRAND GOLDEN GAME GRAND GOLDEN GAM MAZ ( GOLD X TRIPLE
-GAME( 200?, sc5ggga ,sc5ggg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5gggb ,sc5ggg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // PR2353 GRAND GOLDEN GAME GRAND GOLDEN GAM MAZ BARX SOUNDS GOLDEN GAME
-GAME( 200?, sc5gggc ,sc5ggg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5ggg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR2371 GRAND GOLDEN GAME GRAND GOLDEN GAM MAZ ( GOLD X TRIPLE
+GAME( 200?, sc5ggga ,sc5ggg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5gggb ,sc5ggg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // PR2353 GRAND GOLDEN GAME GRAND GOLDEN GAM MAZ BARX SOUNDS GOLDEN GAME
+GAME( 200?, sc5gggc ,sc5ggg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Grand Golden Game (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // ^^
// PR3016 AWP THE GUNPOWDER SLOT S5 PR3016 GUNPOWDER SLOT SOUNDS11 GUNPOWDER SLOT S.SITE
-GAME( 200?, sc5gunp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpa ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpb ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpc ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpd ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpe ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpf ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpg ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunph ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpi ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpj ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpk ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5gunpl ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpa ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpb ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpc ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpd ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpe ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpf ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpg ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunph ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpi ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpj ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpk ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5gunpl ,sc5gunp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Gunpowder Slot (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
// PR1388 AWP HAPPY NOTES SCORP5 PR1306 HAPPY NOTES SOUNDS11
-GAME( 200?, sc5hapnt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hapnta ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hapntb ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hapntc ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hapntd ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hapnte ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hapntf ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hapntg ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapnt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapnta ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapntb ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapntc ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapntd ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapnte ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapntf ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hapntg ,sc5hapnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Happy Notes (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1402 AWP HELLS BELLS PR1402 HELLS BELLS SOUNDS11
-GAME( 200?, sc5hellb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hells Bells (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hellba ,sc5hellb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hells Bells (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hellb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hells Bells (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hellba ,sc5hellb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hells Bells (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1613 AWP HILLBILLIONAIRE SCORP5 PR1613 HILLBILLIONAIRE SOUNDS11 HILLBILLIONAIRE S.SITE
-GAME( 200?, sc5hill ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hilla ,sc5hill, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hillb ,sc5hill, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hill ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hilla ,sc5hill, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hillb ,sc5hill, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hill Billionaire (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
// PR2176 HISSING QUID VIPA SOUNDS HISSING QUID
-GAME( 200?, sc5hiss ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hissa ,sc5hiss, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hissb ,sc5hiss, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hissc ,sc5hiss, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hiss ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hissa ,sc5hiss, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hissb ,sc5hiss, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hissc ,sc5hiss, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Hissing Quid (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1936 AWP HOT DOG SCORP5 PR1916 HOT DOG SOUNDS11 HOT DOG S.SITE
-GAME( 200?, sc5hotdg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotdga ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotdgb ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotdgc ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotdgd ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotdge ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotdg ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotdga ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotdgb ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotdgc ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotdgd ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotdge ,sc5hotdg, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Dog (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1733 AWP HOT ROD SCORP5 PR1713 HOT ROD SOUNDS11 HOT ROD S.SITE
-GAME( 200?, sc5hotrd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotrda ,sc5hotrd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotrd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotrda ,sc5hotrd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Rod (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3211 AWP HOT SHOT SCORP5 PR3211 HOT SHOT SOUNDS11 HOT SHOT S.SITE
-GAME( 200?, sc5hotsh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotsha ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshb ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshc ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshd ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshe ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshf ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshg ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshh ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshi ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshj ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshk ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshl ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshm ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshn ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotsho ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshp ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotshq ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotsh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotsha ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshb ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshc ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshd ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshe ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshf ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshg ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshh ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshi ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshj ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshk ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshl ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshm ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshn ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotsho ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshp ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotshq ,sc5hotsh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Shot (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
// PR1311 HOT WAD PR1311 HOT WAD SOUNDS11
-GAME( 200?, sc5hotwd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotwda ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotwdb ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotwdc ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotwdd ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotwde ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotwdf ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5hotwdg ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwd ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwda ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwdb ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwdc ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwdd ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwde ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwdf ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5hotwdg ,sc5hotwd, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Hot Wad (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1603 AWP IM A CELEBRITY PR1603 IM A CELEB SOUNDS11 IM A CELEBRITY S.SITE
-GAME( 200?, sc5celeb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5celeba ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5celebb ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5celebc ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5celebd ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5celeb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5celeba ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5celebb ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5celebc ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5celebd ,sc5celeb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","I'm A Celebrity (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2555 INNER SPIN V013 INNERSPINSND INNER SPIN
-GAME( 200?, sc5inspn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5inspna ,sc5inspn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5inspn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5inspna ,sc5inspn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Inner Spin (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2366 AWP THE ITALIAN JOB S5 PR2366 THE ITALIAN JOB SOUNDS11 ITALIAN JOB S.SITE
-GAME( 200?, sc5ijob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijoba ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobb ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobc ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobd ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobe ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobf ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobg ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobh ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ijobi ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijob ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijoba ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobb ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobc ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobd ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobe ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobf ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobg ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobh ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ijobi ,sc5ijob, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Italian Job (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR1609 JACKPOT JOKERS PR1609 JACKPOT JOKERS SOUNDS11 JACKPOT JOKERS S.SITE
-GAME( 200?, sc5jjok ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5jjoka ,sc5jjok, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5jjok ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5jjoka ,sc5jjok, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Jackpot Jokers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2376 LITTLE DEVIL LDEVIL SOUNDS LITTLE DEVIL
-GAME( 200?, sc5ldvl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ldvla ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ldvlb ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ldvlc ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ldvld ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ldvle ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ldvl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ldvla ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ldvlb ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ldvlc ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ldvld ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ldvle ,sc5ldvl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Little Devil (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1413 AWP RETURN OF THE KING PR1413 RETURN OF THE SOUNDS11 RETURN OF KING S.SITE
-GAME( 200?, sc5lotrr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrra ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrrb ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrrc ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrrd ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrre ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrrf ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrrg ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrrh ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5lotrri ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrra ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrrb ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrrc ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrrd ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrre ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrrf ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrrg ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrrh ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5lotrri ,sc5lotrr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Lord Of The Rings - Return Of The King (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR3004 AWP MANIC MINER SCORP5 PR3004 MANIC MINER SOUNDS11 MANIC MINER S.SITE
-GAME( 200?, sc5manic ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manica ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicb ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicc ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicd ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manice ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicf ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicg ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manich ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manici ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicj ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manick ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicl ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicm ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicn ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manico ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicp ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicq ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicr ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manics ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manict ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicu ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicv ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicw ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicx ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 25)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5manicy ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 26)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manic ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manica ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicb ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicc ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicd ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manice ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicf ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicg ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manich ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manici ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicj ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manick ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicl ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicm ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicn ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manico ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicp ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicq ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicr ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manics ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manict ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 21)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicu ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 22)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicv ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 23)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicw ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 24)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicx ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 25)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5manicy ,sc5manic, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Manic Miner (Bellfruit) (Scorpion 5) (set 26)", GAME_IS_SKELETON_MECHANICAL )
// PR2282 MENTALMONEYMONSTERS MMMO SOUNDS MONEY MONSTERS
-GAME( 200?, sc5mmm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmma ,sc5mmm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmmb ,sc5mmm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmmc ,sc5mmm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmma ,sc5mmm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmmb ,sc5mmm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmmc ,sc5mmm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Mental Money Monsters (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR0000 MONEY MADNESS MONM SOUNDS MONEY MADNESS
-GAME( 200?, sc5mmad ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmada ,sc5mmad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmadb ,sc5mmad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmadc ,sc5mmad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmad ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmada ,sc5mmad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmadb ,sc5mmad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmadc ,sc5mmad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Money Madness (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2395 MONEY SPINNER MONY SOUNDS NITH
-GAME( 200?, sc5monsp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Money Spinner (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5monspa ,sc5monsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Money Spinner (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5monsp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Money Spinner (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5monspa ,sc5monsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Money Spinner (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PROJECT NUMBER PR0_0_ MONOPOLY P_S_E_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _U_A_S_U_D_ _ _ _ _ _ _ _ _ _ _ _ _ _T_I_K_P_N_ _ _ _
-GAME( 200?, sc5monop ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL ) // incomplete pairing
+GAME( 200?, sc5monop ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL ) // incomplete pairing
-GAME( 200?, sc5mcas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR2372 CASINO MONOPOLY MONO SOUNDS CASINO MONOPOLY
-GAME( 200?, sc5mcasa ,sc5mcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
-GAME( 200?, sc5mcasb ,sc5mcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // PR2372 CASINO MONOPOLY CASINO MONOPOLY MAZ MONO SOUNDS CASINO MONOPOLY
-GAME( 200?, sc5mcasc ,sc5mcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5mcas ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL ) // PR2372 CASINO MONOPOLY MONO SOUNDS CASINO MONOPOLY
+GAME( 200?, sc5mcasa ,sc5mcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL ) // ^^
+GAME( 200?, sc5mcasb ,sc5mcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL ) // PR2372 CASINO MONOPOLY CASINO MONOPOLY MAZ MONO SOUNDS CASINO MONOPOLY
+GAME( 200?, sc5mcasc ,sc5mcas, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Casino (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL ) // ^^
// PR3308 AWP MONOPOLY DOUBLE MONEY S5 PR3308 MPOLY D MONEY SOUNDS11 DOUBLE MONEY S.SITE
-GAME( 200?, sc5mdm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mdma ,sc5mdm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mdmb ,sc5mdm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mdmc ,sc5mdm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mdm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mdma ,sc5mdm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mdmb ,sc5mdm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mdmc ,sc5mdm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Double Money (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2380 MONOPOLY HERE AND NOW MR2R SOUNDS NITH
-GAME( 200?, sc5mhn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhna ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhnb ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhnc ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhnd ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhne ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhn ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhna ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhnb ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhnc ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhnd ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhne ,sc5mhn, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Here & Now (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2345 AWP MONOPOLY HOT PROPERTY S5 PR2345 HOT PROPERTY SOUNDS11 HOT PROPERTY S.SITE
-GAME( 200?, sc5mhp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpa ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpb ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpc ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpd ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpe ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpf ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpg ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhph ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpi ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpj ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpk ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mhpl ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpa ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpb ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpc ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpd ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpe ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpf ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpg ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhph ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpi ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpj ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpk ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mhpl ,sc5mhp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Hot Property (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
// PR3413 AWP MONOPOLY MONEYBAGS S5 PR3413 MONEYBAGS SOUNDS11 MONEYBAGS S.SITE
-GAME( 200?, sc5mmb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmba ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmbb ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmbc ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmba ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmbb ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmbc ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR3413) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1911 AWP MONOLOLY MONEY BAGS SCORP5 PR1911 MPOLY MONEYBAGS SOUNDS11 MONEYBAGS S.SITE
-GAME( 200?, sc5mmbd ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR1911) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mmbe ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR1911) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmbd ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR1911) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mmbe ,sc5mmb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Monopoly Money Bags (PR1911) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2363 RED HOT MONOP RED HOT MONOPOLY MAZ MONO SOUNDS MONOPOLY
-GAME( 200?, sc5mrh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mrha ,sc5mrh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mrh ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mrha ,sc5mrh, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Red Hot (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2329 MONOPOLY ROAD TO RICHES MR2R SOUNDS ROAD TO RICHES
-GAME( 200?, sc5mr2r ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches (PR2329) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mr2ra ,sc5mr2r, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches (PR2329) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mr2r ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches (PR2329) (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mr2ra ,sc5mr2r, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches (PR2329) (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2457 ROADTORICHES CLUBROADTORICHES CLUB CRTR SOUNDS CLUB ROAD TO RICHES
-GAME( 200?, sc5mr2rb ,sc5mr2r, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (PR2457) (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mr2rb ,sc5mr2r, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Road To Riches Club (PR2457) (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2190 MONOPOLY WOW MONOPOLY WOW MAZ TWOW SOUNDS
-GAME( 200?, sc5mww ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mwwa ,sc5mww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mwwb ,sc5mww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mwwc ,sc5mww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mww ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mwwa ,sc5mww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mwwb ,sc5mww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mwwc ,sc5mww, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wonders Of The World (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR3002 AWP NIGHTMARE ON ELM STREET S5 PR3002 ELM STREET SOUNDS11 NIGHTMARE ELM ST S.SITE
-GAME( 200?, sc5nmare ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nmarea ,sc5nmare, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nmareb ,sc5nmare, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nmarec ,sc5nmare, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nmare ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nmarea ,sc5nmare, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nmareb ,sc5nmare, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nmarec ,sc5nmare, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","A Nightmare On Elm Street (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1612 PICK OF THE PACK PR1612 PICK OF THE PACK SOUNDS11 PICK OF THE PACK S.SITE
-GAME( 2005, sc5potp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 2005, sc5potpa ,sc5potp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2005, sc5potp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 2005, sc5potpa ,sc5potp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pick Of The Pack (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2562 PINK PANTHER PINK SOUNDS PINK PANTHER
-GAME( 200?, sc5pp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppa ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppb ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppc ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppd ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppe ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppf ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppg ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppa ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppb ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppc ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppd ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppe ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppf ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppg ,sc5pp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2279 PINK PANTHER CLOUSEAUS REVENGE REVENGE QPS REVENGE SOUNDS
-GAME( 200?, sc5ppcr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppcrb ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppcrc ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppcrd ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppcr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppcrb ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppcrc ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppcrd ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Clouseau's Revenge (Mazooma / QPS) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2279 CLOUSEAUS REVENGE REVENGE SOUNDS
-GAME( 200?, sc5ppcra ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppcra ,sc5ppcr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Clouseau's Revenge (Mazooma) (Scorpion 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2407 AWP PINK PANTHER CRACK THE CODE SCORP5 PR2407 CRACK THE CODE SOUNDS11 CRACK THE CODE S.SITE
-GAME( 200?, sc5ppctc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctca ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctcb ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctcc ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctcd ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctce ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctcf ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctcg ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctch ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppctci ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctca ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctcb ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctcc ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctcd ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctce ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctcf ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctcg ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctch ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppctci ,sc5ppctc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pink Panther Crack The Code (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR2330 PINK PANTHER DYM PINK PANTHER DYM QPS DYMN SOUNDS PINK PANTHER DYM
-GAME( 200?, sc5ppdym ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Double Your Money (Mazooma / QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppdyma ,sc5ppdym, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Double Your Money (Mazooma / QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppdym ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Double Your Money (Mazooma / QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppdyma ,sc5ppdym, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma / QPS","Pink Panther Double Your Money (Mazooma / QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2303 STRIKES AGAIN PPSA SOUNDS STRIKES AGAIN
-GAME( 200?, sc5ppsag ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppsaga ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppsagb ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppsagc ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppsagd ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ppsage ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppsag ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppsaga ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppsagb ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppsagc ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppsagd ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ppsage ,sc5ppsag, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Pink Panther Strikes Again (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1408 PONY EXPRESS PR1408 PONY EXPRESS SOUNDS11 PONY EXPRESS S.SITE
-GAME( 200?, sc5pony ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ponya ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ponyb ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ponyc ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ponyd ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ponye ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pony ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ponya ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ponyb ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ponyc ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ponyd ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ponye ,sc5pony, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pony Express (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2417 AWP POPEYE S5 PR2417 POPEYE SOUNDS11 POPEYE S.SITE
-GAME( 200?, sc5popey ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5popeya ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5popeyb ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5popeyc ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5popeyd ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5popeye ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5popeyf ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5popeyg ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popey ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popeya ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popeyb ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popeyc ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popeyd ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popeye ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popeyf ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5popeyg ,sc5popey, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Popeye (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1918 AWP POTS OF GOLD SCORP5 PR1918 POTS OF GOLD SOUNDS11 POTS OF GOLD S.SITE
-GAME( 200?, sc5pog ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5poga ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pogb ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pogc ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pogd ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5poge ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pogf ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pogg ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pog ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5poga ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pogb ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pogc ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pogd ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5poge ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pogf ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pogg ,sc5pog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Pots Of Gold (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// Z050 POTOFGLD PR000050 POTOFGLD 1 POTOFGLD AWP
-GAME( 200?, sc5potog ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potoga ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potogb ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potogc ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potogd ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potoge ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potogf ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potogg ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potogh ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5potogi ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potog ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potoga ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potogb ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potogc ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potogd ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potoge ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potogf ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potogg ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potogh ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5potogi ,sc5potog, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "QPS","Pot Of Gold (QPS) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR2272 POWER PLAY PPLY SOUNDS
-GAME( 200?, sc5pwrpl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pwrpla ,sc5pwrpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pwrpl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pwrpla ,sc5pwrpl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Power Play (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1614 AWP POWERBALL POWERBALL S.SITE PR1614 POWERBALL SOUNDS11
-GAME( 200?, sc5pwrbl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5pwrbla ,sc5pwrbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pwrbl ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5pwrbla ,sc5pwrbl, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Powerball (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2342 QUID VICIOUS QUIDV SOUNDS QUID VICIOUS
-GAME( 200?, sc5quidv ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quidva ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quidvb ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quidvc ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quidvd ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quidve ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quidvf ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5quidvg ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidv ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidva ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidvb ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidvc ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidvd ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidve ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidvf ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5quidvg ,sc5quidv, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Quid Vicious (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR2077 RED HOT X SDRDX SOUNDS
-GAME( 200?, sc5rhx ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhx ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
// PR2077 RED HOT X SDRDX SOUNDS
-GAME( 200?, sc5rhxa ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhxb ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhxc ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhxd ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhxe ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhxf ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxa ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxb ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxc ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxd ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxe ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxf ,sc5rhx, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
// PR2364 CASINO RED HOT X RED HOT X CRHX SOUNDS RED HOT X
-GAME( 200?, sc5rhxcs ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rhxcsa ,sc5rhxcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxcs ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rhxcsa ,sc5rhxcs, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Hot X Casino (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2557 RED SQUARE REDS SOUNDS RED SQUARE
-GAME( 200?, sc5redsq ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5redsqa ,sc5redsq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5redsq ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5redsqa ,sc5redsq, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Red Square (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3257 CLUB RONNIE O SULLIVANS TOURNAMENT SCORP5 RONNIE OSULLIVAN CLUB PR3256 RONNIE O SOUNDS11 RONNIE SULLIVAN
-GAME( 200?, sc5rosts ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rostsa ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rostsb ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rostsc ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rostsd ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rostse ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rosts ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rostsa ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rostsb ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rostsc ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rostsd ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rostse ,sc5rosts, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ronnie O'Sullivan's Tournament Snooker (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2311 ROVERS RETURN ROVERS RETURN SOUNDS ROVERS RETURN
-GAME( 200?, sc5rovrt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rovrta ,sc5rovrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rovrtb ,sc5rovrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5rovrtc ,sc5rovrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rovrt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rovrta ,sc5rovrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rovrtb ,sc5rovrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5rovrtc ,sc5rovrt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Rovers Return (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2280 SHOW ME THE MONEY SMTM SOUNDS
-GAME( 200?, sc5smtm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Show Me The Money (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5smtma ,sc5smtm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Show Me The Money (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5smtm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Show Me The Money (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5smtma ,sc5smtm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Show Me The Money (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3013 AWP SHOW TIME S5 PR3013 SHOWTIME SOUNDS11 SHOW TIME S.SITE
-GAME( 200?, sc5showt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showta ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtb ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtc ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtd ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showte ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtf ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtg ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showth ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showti ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtj ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtk ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtl ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtm ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtn ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showto ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtp ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtq ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showtr ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5showts ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showta ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtb ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtc ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtd ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showte ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtf ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtg ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showth ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showti ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtj ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtk ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtl ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtm ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtn ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showto ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtp ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtq ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showtr ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 19)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5showts ,sc5showt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Showtime (Bellfruit) (Scorpion 5) (set 20)", GAME_IS_SKELETON_MECHANICAL )
// PR1411 AWP SNAKES AND LADDERS PR1411 SNAKES A L SOUNDS11
-GAME( 200?, sc5slad ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5slada ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sladb ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sladc ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sladd ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5slade ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sladf ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sladg ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5slad ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5slada ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sladb ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sladc ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sladd ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5slade ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sladf ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sladg ,sc5slad, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Snakes & Ladders (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR1901 AWP SPICE IT UP SCORP5 PR1901 SPICE IT UP SOUNDS11 SPICE IT UP S.SITE
-GAME( 200?, sc5spice ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5spiceb ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spice ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spiceb ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1921 AWP SPICE IT UP SCORP4 PR1901 SPICE IT UP SOUNDS11 SPICE IT UP S.SITE (this header is incorrect, these are SCORP 5 sets, they use opcodes not present in the sc5 cpu and have the 'SC5' at the start of the ROM)
-GAME( 200?, sc5spicea ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5spicec ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5spiced ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5spicee ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spicea ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spicec ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spiced ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5spicee ,sc5spice, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Spice It Up (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR2232 SPIN WHEN YOU'RE WINNING SPIN SOUNDS
-GAME( 200?, sc5swywm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5swywma ,sc5swywm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5swywmb ,sc5swywm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5swywmc ,sc5swywm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5swywm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5swywma ,sc5swywm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5swywmb ,sc5swywm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5swywmc ,sc5swywm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Spin When Your Winning (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2176 SUMMIT UP SUMMIT SOUNDS SUMMIT UP H
-GAME( 200?, sc5sumit ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Summit Up (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5sumita ,sc5sumit, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Summit Up (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sumit ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Summit Up (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sumita ,sc5sumit, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Summit Up (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2255 SUITUSIR SUIT SOUNDS SUITS U SIR
-GAME( 200?, sc5sus ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5susa ,sc5sus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5susb ,sc5sus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5susc ,sc5sus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5sus ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5susa ,sc5sus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5susb ,sc5sus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5susc ,sc5sus, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Qps","Suits U Sir (Qps) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2235 SWITCHBACK SWBK SOUNDS SWITCHBACK
-GAME( 200?, sc5swbak ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Switch Back (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5swbaka ,sc5swbak, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Switch Back (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5swbak ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Switch Back (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5swbaka ,sc5swbak, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Switch Back (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1714 AWP TAKE THE PIECE S5 PR1714 TAKE THE PIECE SOUNDS11 TAKETHEPIECE S.SITE
-GAME( 200?, sc5ttpie ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpiea ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpieb ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpiec ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpied ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpiee ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpief ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpieg ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpieh ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ttpiei ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpie ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpiea ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpieb ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpiec ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpied ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpiee ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpief ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpieg ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpieh ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ttpiei ,sc5ttpie, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take The Piece (Bellfruit) (PR1714) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR3001 AWP TAKE YOUR PICK S5 PR3001 TAKE YOUR PICK SOUNDS11 TAKE YOUR PICK S.SITE
-GAME( 200?, sc5typ ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5typa ,sc5typ, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5typb ,sc5typ, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5typc ,sc5typ, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5typ ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5typa ,sc5typ, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5typb ,sc5typ, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5typc ,sc5typ, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Take Your Pick (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR2140 MONOPOLY X SDMON SOUNDS (are these really a game called Top Box, or are they Top Box roms for Monopoly?)
-GAME( 200?, sc5tbox ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxa, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxb, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxc, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxd, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxe, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxf, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxg, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxh, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxi, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxj, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxk, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxl, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxm, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxn, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxo, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxp, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tboxq, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tbox ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxa, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxb, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxc, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxd, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxe, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxf, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxg, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxh, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxi, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxj, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxk, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxl, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxm, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxn, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxo, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxp, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tboxq, sc5tbox, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Box (Mazooma) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
// PR2211 TOP OF THE SHOTS TOTS SOUNDS TOP OF THE SHOTS
-GAME( 200?, sc5tpsht ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tpshta ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tpshtb ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tpshtc ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5tpshtd ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tpsht ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tpshta ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tpshtb ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tpshtc ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5tpshtd ,sc5tpsht, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Top Of The Shots (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
// PR2175 TRAIL BLAZER TRAB SOUNDS TRAIL BLAZER
-GAME( 200?, sc5trail ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5traila ,sc5trail, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5trail ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5traila ,sc5trail, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Trailblazer (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR3010 AWP VIVA MEXICO SCORP5 PR3010 VIVA MEXICO SOUNDS11 VIVA MEXICO S.SITE
-GAME( 200?, sc5vivam ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5vivama ,sc5vivam, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5vivam ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5vivama ,sc5vivam, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Viva Mexico (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2341 WILD JACKPOTS WILDJACK SOUNDS WILD JACKPOTS
-GAME( 200?, sc5wldjk ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5wldjka ,sc5wldjk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wldjk ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5wldjka ,sc5wldjk, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Wild Jackpots (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1611 AWP ANT AND DECS PR1611 ANT AND DECS SOUNDS11 ANT AND DECS S.SITE
-GAME( 200?, sc5adsnt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5adsnta ,sc5adsnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adsnt ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5adsnta ,sc5adsnt, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Ant & Dec's Saturday Night Takeaway (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1708 AWP BULLY'S PRIZE BOARD PR1708 B PRIZE BOARD SOUNDS11 BULLYSPRIZEBOARD S.SITE
-GAME( 200?, sc5bpb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bpbb ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bpbd ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bpbe ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpb ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpbb ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpbd ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpbe ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
// PR1708 AWP BULLY'S PRIZE BOARD S5 PR1708 B PRIZE BOARD SOUNDS11 BULLYSPRIZEBOARD S.SITE
-GAME( 200?, sc5bpba ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bpbc ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bpbf ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bpbg ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpba ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpbc ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpbf ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bpbg ,sc5bpb, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Prize Board (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3010 AWP BULLYS STAR PRIZE SCORP5 PR3012 BULLYS STAR P SOUNDS11 BULLYS STARPRIZE S.SITE
-GAME( 200?, sc5bsp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspa ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspb ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspc ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspd ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspe ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspf ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspg ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bsph ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspi ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspl ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspm ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspn ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspo ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspp ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspq ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bsp ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspa ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspb ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspc ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspd ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspe ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspf ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspg ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bsph ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspi ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspl ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspm ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspn ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspo ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 16)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspp ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 17)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspq ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3010) (Bellfruit) (Scorpion 5) (set 18)", GAME_IS_SKELETON_MECHANICAL )
// PR3012 AWP BULLYS STAR PRIZE SCORP5 PR3012 BULLYS STAR P SOUNDS11 BULLYS STARPRIZE S.SITE
-GAME( 200?, sc5bspj ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3012) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5bspk ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3012) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspj ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3012) (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5bspk ,sc5bsp, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Bully's Star Prize (PR3012) (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR1312 AWP CHAIN REACTION PR1312 CHAIN REACT SOUNDS11
-GAME( 200?, sc5chain ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chaina ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chainb ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chainc ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chaind ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5chaine ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chain ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chaina ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chainb ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chainc ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chaind ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5chaine ,sc5chain, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Chain Reaction (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1707 AWP CLOWN AROUND SCORP5 PR1707 CLOWN AROUND SOUNDS11 CLOWN AROUND S.SITE
-GAME( 200?, sc5clown ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clowna ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clownb ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clownc ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clownd ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5clowne ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clown ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clowna ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clownb ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clownc ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clownd ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5clowne ,sc5clown, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Clown Around (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
// PR1412 AWP COPS AND ROBBERS PR1412 COPS AND ROBBERS SOUNDS11 COPS AND ROBBERS S.SITE
-GAME( 200?, sc5copsr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsra ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsrb ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsrc ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsrd ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsre ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsrf ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsrg ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsrh ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5copsri ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsr ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsra ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsrb ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsrc ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsrd ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsre ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsrf ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsrg ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsrh ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5copsri ,sc5copsr, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Cops 'n' Robbers (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
// PR1915 AWP DEAL OR NO DEAL BEAT THE BANKER S5 PR1915 BEAT THE BANKER SOUNDS11 BEAT THE BANKER S.SITE
-GAME( 200?, sc5dndbe ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbea ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbeb ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbec ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbed ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbee ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbef ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbeg ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbeh ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbei ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbej ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbek ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbel ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbem ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndben ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbe ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbea ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbeb ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbec ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbed ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbee ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbef ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbeg ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbeh ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbei ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbej ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbek ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbel ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 13)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbem ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 14)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndben ,sc5dndbe, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker (Bellfruit) (Scorpion 5) (set 15)", GAME_IS_SKELETON_MECHANICAL )
// PR3063 CASINO DOND CAN YOU BEAT THE BANKER CASINO DOND ARCADE PR3063 BEAT THE BANKER SOUNDS11
-GAME( 200?, sc5ddbbc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddbbca ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddbbcb ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddbbcc ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddbbcd ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddbbce ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddbbcf ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5ddbbcg ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbca ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbcb ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbcc ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbcd ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbce ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbcf ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5ddbbcg ,sc5ddbbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Beat The Banker Casino (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
// PR3312 AWP DEAL OR NO DEAL BOX CLEVER SCORP5 PR3312 DOND BOXCLEVER SOUNDS11 BOX CLEVER S.SITE
-GAME( 200?, sc5dndbc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbca ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbcb ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbcc ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbcd ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbce ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbcf ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbcg ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbch ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbci ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbcj ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5dndbck ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbc ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbca ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbcb ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbcc ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbcd ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbce ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbcf ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 7)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbcg ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 8)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbch ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 9)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbci ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 10)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbcj ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 11)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5dndbck ,sc5dndbc, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "BFM","Deal Or No Deal Box Clever (Bellfruit) (Scorpion 5) (set 12)", GAME_IS_SKELETON_MECHANICAL )
// PR1706 AWP WHEEL OF WEALTH PR1706 WHEEL OF WEALTH SOUNDS11 WHEEL OF WEALTH S.SITE
-GAME( 200?, sc5mowow ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5mowowb ,sc5mowow, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mowow ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5mowowb ,sc5mowow, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Monopoly Wheel Of Wealth (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
// PR2166 NUN N ROSES NANR SOUNDS NUNS N ROSES
-GAME( 200?, sc5nunsm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nunsma ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nunsmb ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nunsmc ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nunsmd ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
-GAME( 200?, sc5nunsme ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
-
+GAME( 200?, sc5nunsm ,0, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 1)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nunsma ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 2)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nunsmb ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 3)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nunsmc ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 4)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nunsmd ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 5)", GAME_IS_SKELETON_MECHANICAL )
+GAME( 200?, sc5nunsme ,sc5nunsm, bfm_sc5, bfm_sc5, bfm_sc5_state, sc5, ROT0, "Mazooma","Nuns 'n' Roses (Mazooma) (Scorpion 5) (set 6)", GAME_IS_SKELETON_MECHANICAL )
diff --git a/src/mame/drivers/bfm_swp.c b/src/mame/drivers/bfm_swp.c
index 8c42bbc4011..f0d2b69d013 100644
--- a/src/mame/drivers/bfm_swp.c
+++ b/src/mame/drivers/bfm_swp.c
@@ -119,7 +119,7 @@ class bfm_swp_state : public driver_device
public:
bfm_swp_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
UINT32* m_cpuregion;
@@ -312,7 +312,7 @@ ROM_END
-GAME( 199?, c3_rtime , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "Radio Times (Bellfruit) (Cobra 3)", GAME_IS_SKELETON )
-GAME( 199?, c3_telly , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "Telly Addicts (Bellfruit) (Cobra 3)", GAME_IS_SKELETON )
-GAME( 199?, c3_totp , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "Top of the Pops (Bellfruit) (Cobra 3?)", GAME_IS_SKELETON )
-GAME( 199?, c3_ppays , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "The Phrase That Pays (Bellfruit) (Cobra 3?)", GAME_IS_SKELETON )
+GAME( 199?, c3_rtime , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "Radio Times (Bellfruit) (Cobra 3)", GAME_IS_SKELETON )
+GAME( 199?, c3_telly , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "Telly Addicts (Bellfruit) (Cobra 3)", GAME_IS_SKELETON )
+GAME( 199?, c3_totp , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "Top of the Pops (Bellfruit) (Cobra 3?)", GAME_IS_SKELETON )
+GAME( 199?, c3_ppays , 0 , bfm_swp, bfm_swp, driver_device, 0, ROT0, "BFM", "The Phrase That Pays (Bellfruit) (Cobra 3?)", GAME_IS_SKELETON )
diff --git a/src/mame/drivers/bfmsys83.c b/src/mame/drivers/bfmsys83.c
index 0edbd5d2e4e..f3743b16a0d 100644
--- a/src/mame/drivers/bfmsys83.c
+++ b/src/mame/drivers/bfmsys83.c
@@ -18,7 +18,7 @@ public:
static ADDRESS_MAP_START( memmap, AS_PROGRAM, 8, bfmsys83_state )
- AM_RANGE(0x4000, 0xffff) AM_ROM // 32K ROM
+ AM_RANGE(0x4000, 0xffff) AM_ROM // 32K ROM
ADDRESS_MAP_END
static INPUT_PORTS_START( bfmsys83 )
@@ -58,5 +58,5 @@ ROM_START( b83cops ) // was marked as sys85, but I think this is the sys83 set?
ROM_LOAD( "cops.p4", 0x8000, 0x2000, CRC(ce573b35) SHA1(f2ba22f0d55f882dd91b37e80e4bb14effd9113a) )
ROM_END
-GAME( 198?, b83catms , 0 , bfmsys83 , bfmsys83 , driver_device, 0 , 0, "BFM", "Cat & Mouse (Bellfruit) (System 83)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 198?, b83cops , 0 , bfmsys83 , bfmsys83 , driver_device, 0 , 0, "BFM", "Cops & Robbers (Bellfruit) (System 83)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 198?, b83catms , 0 , bfmsys83 , bfmsys83 , driver_device, 0 , 0, "BFM", "Cat & Mouse (Bellfruit) (System 83)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 198?, b83cops , 0 , bfmsys83 , bfmsys83 , driver_device, 0 , 0, "BFM", "Cops & Robbers (Bellfruit) (System 83)", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/bfmsys85.c b/src/mame/drivers/bfmsys85.c
index 7c3febf01de..3506481f4e8 100644
--- a/src/mame/drivers/bfmsys85.c
+++ b/src/mame/drivers/bfmsys85.c
@@ -72,7 +72,7 @@ class bfmsys85_state : public driver_device
public:
bfmsys85_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_vfd(*this, "vfd")
+ m_vfd(*this, "vfd")
{ }
optional_device<roc10937_t> m_vfd;
@@ -115,7 +115,7 @@ public:
INTERRUPT_GEN_MEMBER(timer_irq);
};
-#define MASTER_CLOCK (XTAL_4MHz)
+#define MASTER_CLOCK (XTAL_4MHz)
///////////////////////////////////////////////////////////////////////////
// Serial Communications (Where does this go?) ////////////////////////////
@@ -157,7 +157,7 @@ void bfmsys85_state::machine_reset()
m_mux_input_strobe = 0;
m_mux_input = 0;
- m_vfd->reset(); // reset display1
+ m_vfd->reset(); // reset display1
// reset stepper motors ///////////////////////////////////////////////////
{
@@ -170,7 +170,7 @@ void bfmsys85_state::machine_reset()
}
m_optic_pattern = pattern;
}
- m_locked = 0x00; // hardware is open
+ m_locked = 0x00; // hardware is open
}
///////////////////////////////////////////////////////////////////////////
@@ -243,7 +243,7 @@ WRITE8_MEMBER(bfmsys85_state::mmtr_w)
m_mmtr_latch = data;
for (i=0; i<8; i++)
- if ( changed & (1 << i) ) MechMtr_update(i, data & (1 << i) );
+ if ( changed & (1 << i) ) MechMtr_update(i, data & (1 << i) );
if ( data ) generic_pulse_irq_line(machine().device("maincpu")->execute(), M6809_FIRQ_LINE, 1);
}
@@ -310,7 +310,7 @@ WRITE8_MEMBER(bfmsys85_state::mux_ctrl_w)
//logerror(" sys85 mux: clear all outputs\n");
break;
- case 0xE0: // End of interrupt
+ case 0xE0: // End of interrupt
break;
}
@@ -318,9 +318,9 @@ WRITE8_MEMBER(bfmsys85_state::mux_ctrl_w)
READ8_MEMBER(bfmsys85_state::mux_ctrl_r)
{
- // software waits for bit7 to become low
+ // software waits for bit7 to become low
- return 0;
+ return 0;
}
WRITE8_MEMBER(bfmsys85_state::mux_data_w)
@@ -380,17 +380,17 @@ void bfmsys85_state::machine_start()
static ADDRESS_MAP_START( memmap, AS_PROGRAM, 8, bfmsys85_state )
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_SHARE("nvram") //8k RAM
- AM_RANGE(0x2000, 0x21FF) AM_WRITE(reel34_w) // reel 3+4 latch
- AM_RANGE(0x2200, 0x23FF) AM_WRITE(reel12_w) // reel 1+2 latch
- AM_RANGE(0x2400, 0x25FF) AM_WRITE(vfd_w) // vfd latch
+ AM_RANGE(0x2000, 0x21FF) AM_WRITE(reel34_w) // reel 3+4 latch
+ AM_RANGE(0x2200, 0x23FF) AM_WRITE(reel12_w) // reel 1+2 latch
+ AM_RANGE(0x2400, 0x25FF) AM_WRITE(vfd_w) // vfd latch
AM_RANGE(0x2600, 0x27FF) AM_READWRITE(mmtr_r,mmtr_w)// mechanical meter latch
- AM_RANGE(0x2800, 0x2800) AM_READ(triac_r) // payslide triacs
- AM_RANGE(0x2800, 0x29FF) AM_WRITE(triac_w) // triacs
+ AM_RANGE(0x2800, 0x2800) AM_READ(triac_r) // payslide triacs
+ AM_RANGE(0x2800, 0x29FF) AM_WRITE(triac_w) // triacs
AM_RANGE(0x2A00, 0x2A00) AM_READWRITE(mux_data_r,mux_data_w)// mux
AM_RANGE(0x2A01, 0x2A01) AM_READWRITE(mux_ctrl_r,mux_ctrl_w)// mux status register
- AM_RANGE(0x2E00, 0x2E00) AM_READ(irqlatch_r) // irq latch ( MC6850 / timer )
+ AM_RANGE(0x2E00, 0x2E00) AM_READ(irqlatch_r) // irq latch ( MC6850 / timer )
AM_RANGE(0x3000, 0x3000) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w)
AM_RANGE(0x3001, 0x3001) AM_READNOP //sound latch
@@ -402,28 +402,28 @@ static ADDRESS_MAP_START( memmap, AS_PROGRAM, 8, bfmsys85_state )
AM_RANGE(0x3406, 0x3406) AM_DEVREAD("acia6850_0", acia6850_device, status_read)
AM_RANGE(0x3407, 0x3407) AM_DEVREAD("acia6850_0", acia6850_device, data_read)
- AM_RANGE(0x3600, 0x3600) AM_WRITE(mux_enable_w) // mux enable
+ AM_RANGE(0x3600, 0x3600) AM_WRITE(mux_enable_w) // mux enable
- AM_RANGE(0x4000, 0xffff) AM_ROM // 48K ROM
- AM_RANGE(0x8000, 0xFFFF) AM_WRITE(watchdog_w) // kick watchdog
+ AM_RANGE(0x4000, 0xffff) AM_ROM // 48K ROM
+ AM_RANGE(0x8000, 0xFFFF) AM_WRITE(watchdog_w) // kick watchdog
ADDRESS_MAP_END
// machine driver for system85 board //////////////////////////////////////
static MACHINE_CONFIG_START( bfmsys85, bfmsys85_state )
- MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4) // 6809 CPU at 1 Mhz
- MCFG_CPU_PROGRAM_MAP(memmap) // setup read and write memorymap
- MCFG_CPU_PERIODIC_INT_DRIVER(bfmsys85_state, timer_irq, 1000) // generate 1000 IRQ's per second
+ MCFG_CPU_ADD("maincpu", M6809, MASTER_CLOCK/4) // 6809 CPU at 1 Mhz
+ MCFG_CPU_PROGRAM_MAP(memmap) // setup read and write memorymap
+ MCFG_CPU_PERIODIC_INT_DRIVER(bfmsys85_state, timer_irq, 1000) // generate 1000 IRQ's per second
MCFG_MSC1937_ADD("vfd",0,RIGHT_TO_LEFT)
MCFG_ACIA6850_ADD("acia6850_0", m6809_acia_if)
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("aysnd",AY8912, MASTER_CLOCK/4) // add AY8912 soundchip
+ MCFG_SOUND_ADD("aysnd",AY8912, MASTER_CLOCK/4) // add AY8912 soundchip
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
- MCFG_NVRAM_ADD_0FILL("nvram") // load/save nv RAM
+ MCFG_NVRAM_ADD_0FILL("nvram") // load/save nv RAM
MCFG_DEFAULT_LAYOUT(layout_bfmsys85)
MACHINE_CONFIG_END
@@ -432,7 +432,7 @@ MACHINE_CONFIG_END
static INPUT_PORTS_START( bfmsys85 )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Fl 5.00")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Fl 2.50")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 ) PORT_IMPULSE(3) PORT_NAME("Fl 1.00")
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN4 ) PORT_IMPULSE(3) PORT_NAME("Fl 0.25")
@@ -765,99 +765,98 @@ DRIVER_INIT_MEMBER(bfmsys85_state,nodecode)
}
// PROJECT NUMBER 5539 2P CASH EXPLOSION GAME No 39-350-190 - 29-MAR-1989 11:45:25
-GAME( 1989, b85cexpl , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Explosion (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1989, b85cexpl , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Explosion (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5150 THE ROYAL 10P PLAY GAME No 39-350-128 - 21-JAN-1988 12:42:53
-GAME( 1988, b85royal , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Royal (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // 'The Royal' ?? hack of the Ritz or Big Deal Club?
+GAME( 1988, b85royal , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Royal (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // 'The Royal' ?? hack of the Ritz or Big Deal Club?
// PROJECT NUMBER 4957 BIGDEAL 5P PLAY GAME No 39-350-055 - 9-MAR-1987 11:12:05
-GAME( 1987, b85bdclb , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Big Deal Club (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85bdclb , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Big Deal Club (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5035 BIGDEAL 5P PLAY GAME No 39-350-045 - 25-FEB-1987 14:19:41
-GAME( 1987, b85bdclba , b85bdclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Big Deal Club (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85bdclba , b85bdclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Big Deal Club (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5034 BIGDEAL 20P PLAY GAME No 39-350-047 - 25-FEB-1987 12:44:21
-GAME( 1987, b85bdclbb , b85bdclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Big Deal Club (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85bdclbb , b85bdclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Big Deal Club (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5145 CASH BLITZ GAME No 39-351-091 - 13-AUG-1987 11:25:29
-GAME( 1987, b85cblit , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Blitz (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85cblit , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Blitz (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5145 CASH BLITZ GAME No 39-350-091 - 13-AUG-1987 11:08:54
-GAME( 1987, b85cblita , b85cblit , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Blitz (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85cblita , b85cblit , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Blitz (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5145 CASH BLITZ GAME No 39-350-102 - 3-NOV-1987 16:24:39
-GAME( 1987, b85cblitb , b85cblit , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Blitz (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85cblitb , b85cblit , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Cash Blitz (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5495 CLUB PREMIER 5P,10P AND 20P PLAY GAME No 39-350-187 - 28-FEB-1989 15:26:47
-GAME( 1989, b85clbpm , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Club Premier (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1989, b85clbpm , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Club Premier (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5116 HI LO SILVER DX GAME No 39-350-049 - 27-FEB-1987 10:49:08
-GAME( 1987, b85hilo , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Hi Lo Silver (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85hilo , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Hi Lo Silver (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5407 HI LO SILVER 2P GAME No 39-350-142 - 12-OCT-1988 09:39:26
-GAME( 1988, b85hiloa , b85hilo , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Hi Lo Silver (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1988, b85hiloa , b85hilo , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Hi Lo Silver (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5104 THE RITZ 10P PLAY GAME No 39-350-084 - 28-AUG-1987 08:44:30
-GAME( 1987, b85ritzd , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 5)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85ritzd , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 5)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5184 THE RITZ 5P PLAY GAME No 39-350-137 - 25-FEB-1988 11:07:18
-GAME( 1988, b85ritz , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // alt version of Big Deal Club?
+GAME( 1988, b85ritz , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // alt version of Big Deal Club?
// PROJECT NUMBER 5183 THE RITZ 20P PLAY GAME No 39-350-136 - 25-FEB-1988 11:25:52
-GAME( 1988, b85ritzb , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1988, b85ritzb , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5183 THE RITZ 20P PLAY GAME No 39-350-138 - 16-MAR-1988 10:46:30
-GAME( 1988, b85ritza , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1988, b85ritza , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5104 THE RITZ 10P PLAY GAME No 39-350-139 - 16-MAR-1988 11:04:27
-GAME( 1988, b85ritzc , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 4)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1988, b85ritzc , b85ritz , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "The Ritz (System 85, set 4)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5137 V2 10P PLAY GAME No 39-350-115 - 9-DEC-1987 12:39:16
-GAME( 1987, b85jpclb , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85jpclb , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5357 V2 20P PLAY GAME No 39-350-112 - 7-DEC-1987 14:32:31
-GAME( 1987, b85jpclba , b85jpclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1987, b85jpclba , b85jpclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5137 V2 10P PLAY GAME No 39-350-141 - 16-MAR-1988 11:46:48
-GAME( 1988, b85jpclbb , b85jpclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1988, b85jpclbb , b85jpclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5357 V2 20P PLAY GAME No 39-350-140 - 16-MAR-1988 11:21:43
-GAME( 1988, b85jpclbc , b85jpclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 4)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1988, b85jpclbc , b85jpclb , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Jackpot Club (System 85, set 4)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5368 SUPER NUDGE GAMBLER #4.00 GAME No 39-340-230 - 27-JAN-1988 14:20:43
-GAME( 1988, b85sngam , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Super Nudge Gambler (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1988, b85sngam , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Super Nudge Gambler (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 4766 10P KING OF CLUBS GAME No 39-340-026 - 25-NOV-1985 08:49:11
-GAME( 199?, b85koc , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "King of Clubs (Bellfruit) (System 85, set 1)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL) // this has valid strings in it BEFORE the bfm decode, but decodes to valid code, does it use some funky mapping, or did they just fill unused space with valid looking data?
+GAME( 199?, b85koc , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "King of Clubs (Bellfruit) (System 85, set 1)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL) // this has valid strings in it BEFORE the bfm decode, but decodes to valid code, does it use some funky mapping, or did they just fill unused space with valid looking data?
// PROJECT NUMBER 4766 10P KING OF CLUBS GAME No 39340002 - 16-AUG-1985 15:53:13
-GAME( 199?, b85koca , b85koc , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "King of Clubs (Bellfruit) (System 85, set 2)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL) // this has valid strings in it BEFORE the bfm decode, but decodes to valid code, does it use some funky mapping, or did they just fill unused space with valid looking data?
+GAME( 199?, b85koca , b85koc , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "King of Clubs (Bellfruit) (System 85, set 2)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL) // this has valid strings in it BEFORE the bfm decode, but decodes to valid code, does it use some funky mapping, or did they just fill unused space with valid looking data?
// PROJECT NUMBER 5425 BAR SEVEN ARCADE GAME No 39-341-236 - 11-APR-1988 11:30:33
-GAME( 199?, b85cb7p , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Bar Sevens (Bellfruit) (Protocol) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK) // seems to work better here than in sc1
+GAME( 199?, b85cb7p , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Bar Sevens (Bellfruit) (Protocol) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK) // seems to work better here than in sc1
// PROJECT NUMBER 5596 DISCOVERY 85 - 06-APR-1990 08:57:39
-GAME( 199?, b85disc , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM/ELAM", "Discovey (Dutch) (Bellfruit) (System 85)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL ) // GAME No 39-350-251
+GAME( 199?, b85disc , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM/ELAM", "Discovey (Dutch) (Bellfruit) (System 85)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL ) // GAME No 39-350-251
// PROJECT NUMBER 5452 DUTCH SUPER CARDS GAME No 39-340-271 - 04-JAN-1989 14:39:00
-GAME( 1989, b85scard , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Supercards (Dutch, Game Card 39-340-271?) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1989, b85scard , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Supercards (Dutch, Game Card 39-340-271?) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 4840 DUTCH JOKERS WILD PO GAME No 39-340-345 - 31-JUL-1992 20:01:55
-GAME( 1992, b85jkwld , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Jokers Wild (Dutch) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1992, b85jkwld , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Jokers Wild (Dutch) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 4823 LUCKY CARDS 200 PO GAME No 39-332-217 - 2-DEC-1986 15:57:19
-GAME( 1986, b85lucky , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Lucky Cards (Dutch) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1986, b85lucky , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Lucky Cards (Dutch) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 4902 DUTCH LUCKY DICE PO GAME No 39-340-346 - 03-AUG-1992 16:30:00
-GAME( 1992, b85luckd , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM/ELAM", "Lucky Dice (Dutch) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1992, b85luckd , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM/ELAM", "Lucky Dice (Dutch) (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 4758 DUTCH C+R 200 PO GAME No 39-332-215 - 2-DEC-1986 15:50:43
-GAME( 199?, b85cops , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Cops 'n' Robbers (Dutch) (Bellfruit) (System 85)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
+GAME( 199?, b85cops , 0 , bfmsys85, bfmsys85, bfmsys85_state, nodecode, 0, "BFM/ELAM", "Cops 'n' Robbers (Dutch) (Bellfruit) (System 85)", GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK|GAME_NOT_WORKING|GAME_MECHANICAL)
// this might be system 85 or sc1, the rom config is 0x2000 + 0x8000, and it writes to the AY address we map on S85 for the alarm
// however it still gives the same error message in both, has offset alpha text in s85 and appears to attempt to communicate with something we don't map, maybe it's some video based board / game with bits missing?
// PROJECT NUMBER 5464 V3 10P/20P PLAY GAME No 39-350-173 - 24-JAN-1989 10:48:53
-GAME( 1989, b85dbldl , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Double Dealer (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1989, b85dbldl , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Double Dealer (System 85, set 1)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5464 V3 10P/20P PLAY GAME No 39-350-181 - 02-FEB-1989 15:19:20
-GAME( 1985, b85dbldla , b85dbldl , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Double Dealer (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
+GAME( 1985, b85dbldla , b85dbldl , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Double Dealer (System 85, set 2)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK )
// PROJECT NUMBER 5464 V3 10P/20P PLAY GAME No 39-350-166 - 17-OCT-1988 14:56:38
-GAME( 199?, b85dbldlb , b85dbldl , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Double Dealer (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // found in a sc4 potp set ...
+GAME( 199?, b85dbldlb , b85dbldl , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Double Dealer (System 85, set 3)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // found in a sc4 potp set ...
// appears to be the same as above with a different title
// PROJECT NUMBER 5165 V1 10P PLAY GAME No 39-350-179 - 02-FEB-1989 14:42:57
-GAME( 199?, b85potp , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Pick Of The Pack (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // found in a sc4 potp set ...
-
+GAME( 199?, b85potp , 0 , bfmsys85, bfmsys85, bfmsys85_state, decode , 0, "BFM", "Pick Of The Pack (System 85)", GAME_NOT_WORKING|GAME_SUPPORTS_SAVE|GAME_REQUIRES_ARTWORK ) // found in a sc4 potp set ...
diff --git a/src/mame/drivers/bgt.c b/src/mame/drivers/bgt.c
index 1408141e590..4af9c2751ca 100644
--- a/src/mame/drivers/bgt.c
+++ b/src/mame/drivers/bgt.c
@@ -16,7 +16,7 @@ class bgt_state : public driver_device
public:
bgt_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -55,7 +55,7 @@ ROM_START( bg_ddb )
ROM_REGION( 0x100000, "oki", ROMREGION_ERASE00 )
/* there were sound roms in the 'CoinWorld Ding Dong Bells' set which might belong here, otherwise
- roms are probably missing */
+ roms are probably missing */
ROM_END
ROM_START( bg_barmy )
diff --git a/src/mame/drivers/big10.c b/src/mame/drivers/big10.c
index a2252763904..75fd8ccc0a4 100644
--- a/src/mame/drivers/big10.c
+++ b/src/mame/drivers/big10.c
@@ -53,7 +53,7 @@
***************************************************************************/
-#define MASTER_CLOCK XTAL_21_4772MHz /* Dumper notes poorly refers to a 21.?727 Xtal. */
+#define MASTER_CLOCK XTAL_21_4772MHz /* Dumper notes poorly refers to a 21.?727 Xtal. */
#include "emu.h"
@@ -68,7 +68,7 @@ class big10_state : public driver_device
public:
big10_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_v9938(*this, "v9938") { }
+ m_v9938(*this, "v9938") { }
required_device<v9938_device> m_v9938;
UINT8 m_mux_data;
@@ -141,8 +141,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( main_io, AS_IO, 8, big10_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_READ(mux_r) /* present in test mode */
- AM_RANGE(0x02, 0x02) AM_READ_PORT("SYSTEM") /* coins and service */
+ AM_RANGE(0x00, 0x00) AM_READ(mux_r) /* present in test mode */
+ AM_RANGE(0x02, 0x02) AM_READ_PORT("SYSTEM") /* coins and service */
AM_RANGE(0x98, 0x9b) AM_DEVREADWRITE("v9938", v9938_device, read, write)
AM_RANGE(0xa0, 0xa1) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_data_w)
AM_RANGE(0xa2, 0xa2) AM_DEVREAD_LEGACY("aysnd", ay8910_r) /* Dip-Switches routes here. */
@@ -156,7 +156,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( big10 )
PORT_START("SYSTEM")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_TOGGLE /* Service Mode */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_TOGGLE /* Service Mode */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("Payout")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2)
@@ -193,24 +193,24 @@ static INPUT_PORTS_START( big10 )
PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:8")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:8")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:7")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:7")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:6")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:6")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:5")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:5")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, "Main Game Rate" ) PORT_DIPLOCATION("DSW1:4,3")
+ PORT_DIPNAME( 0x30, 0x30, "Main Game Rate" ) PORT_DIPLOCATION("DSW1:4,3")
PORT_DIPSETTING( 0x00, "60%" )
PORT_DIPSETTING( 0x10, "70%" )
PORT_DIPSETTING( 0x20, "80%" )
PORT_DIPSETTING( 0x30, "90%" )
- PORT_DIPNAME( 0xC0, 0xc0, "Coinage (A=1; B=5; C=10)" ) PORT_DIPLOCATION("DSW1:2,1")
+ PORT_DIPNAME( 0xC0, 0xc0, "Coinage (A=1; B=5; C=10)" ) PORT_DIPLOCATION("DSW1:2,1")
PORT_DIPSETTING( 0x00, "x1" )
PORT_DIPSETTING( 0x40, "x2" )
PORT_DIPSETTING( 0x80, "x5" )
@@ -244,7 +244,7 @@ static const ay8910_interface ay8910_config =
static MACHINE_CONFIG_START( big10, big10_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/6) /* guess */
+ MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/6) /* guess */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(main_io)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", big10_state, big10_interrupt, "screen", 0, 1)
@@ -268,7 +268,7 @@ static MACHINE_CONFIG_START( big10, big10_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("aysnd", AY8910, MASTER_CLOCK/12) /* guess */
+ MCFG_SOUND_ADD("aysnd", AY8910, MASTER_CLOCK/12) /* guess */
MCFG_SOUND_CONFIG(ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
MACHINE_CONFIG_END
diff --git a/src/mame/drivers/bigevglf.c b/src/mame/drivers/bigevglf.c
index 765659b7cce..8a0e61aa2bf 100644
--- a/src/mame/drivers/bigevglf.c
+++ b/src/mame/drivers/bigevglf.c
@@ -210,7 +210,7 @@ WRITE8_MEMBER(bigevglf_state::beg_port08_w)
static INPUT_PORTS_START( bigevglf )
- PORT_START("PORT00") /* port 00 on sub cpu */
+ PORT_START("PORT00") /* port 00 on sub cpu */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
@@ -220,11 +220,11 @@ static INPUT_PORTS_START( bigevglf )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_START("PORT04") /* port 04 on sub cpu - bit 0 and bit 1 are coin inputs */
+ PORT_START("PORT04") /* port 04 on sub cpu - bit 0 and bit 1 are coin inputs */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
- PORT_START("DSW1") /* port 05 on sub cpu */
+ PORT_START("DSW1") /* port 05 on sub cpu */
PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
@@ -241,7 +241,7 @@ static INPUT_PORTS_START( bigevglf )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_2C ) )
- PORT_START("DSW2") /* port 06 on sub cpu */
+ PORT_START("DSW2") /* port 06 on sub cpu */
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x01, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
@@ -265,16 +265,16 @@ static INPUT_PORTS_START( bigevglf )
PORT_DIPSETTING( 0x20, "9" )
PORT_DIPSETTING( 0x00, "10" )
- PORT_START("P1X") /* port 02 on sub cpu - muxed port 0 */
+ PORT_START("P1X") /* port 02 on sub cpu - muxed port 0 */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(10)
- PORT_START("P1Y") /* port 03 on sub cpu - muxed port 0 */
+ PORT_START("P1Y") /* port 03 on sub cpu - muxed port 0 */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(10) PORT_REVERSE
- PORT_START("P2X") /* port 02 on sub cpu - muxed port 1 */
+ PORT_START("P2X") /* port 02 on sub cpu - muxed port 1 */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(10) PORT_COCKTAIL
- PORT_START("P2Y") /* port 03 on sub cpu - muxed port 1 */
+ PORT_START("P2Y") /* port 03 on sub cpu - muxed port 1 */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(10) PORT_REVERSE PORT_COCKTAIL
INPUT_PORTS_END
@@ -304,12 +304,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( bigevglf_portmap, AS_IO, 8, bigevglf_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_WRITENOP /* video ram enable ???*/
+ AM_RANGE(0x00, 0x00) AM_WRITENOP /* video ram enable ???*/
AM_RANGE(0x01, 0x01) AM_WRITE(bigevglf_gfxcontrol_w) /* plane select */
AM_RANGE(0x02, 0x02) AM_WRITE(beg_banking_w)
AM_RANGE(0x03, 0x03) AM_WRITE(beg13_a_set_w)
AM_RANGE(0x04, 0x04) AM_WRITE(beg13_b_clr_w)
- AM_RANGE(0x05, 0x05) AM_WRITE(bigevglf_vidram_addr_w) /* video banking (256 banks) for f000-f0ff area */
+ AM_RANGE(0x05, 0x05) AM_WRITE(bigevglf_vidram_addr_w) /* video banking (256 banks) for f000-f0ff area */
AM_RANGE(0x06, 0x06) AM_READ(beg_status_r)
ADDRESS_MAP_END
@@ -327,13 +327,13 @@ ADDRESS_MAP_END
READ8_MEMBER(bigevglf_state::sub_cpu_mcu_coin_port_r)
{
/*
- bit 0 and bit 1 = coin inputs
- bit 3 and bit 4 = MCU status
- bit 5 = must toggle, vblank ?
+ bit 0 and bit 1 = coin inputs
+ bit 3 and bit 4 = MCU status
+ bit 5 = must toggle, vblank ?
- */
+ */
m_mcu_coin_bit5 ^= 0x20;
- return bigevglf_mcu_status_r(space, 0) | (ioport("PORT04")->read() & 3) | m_mcu_coin_bit5; /* bit 0 and bit 1 - coin inputs */
+ return bigevglf_mcu_status_r(space, 0) | (ioport("PORT04")->read() & 3) | m_mcu_coin_bit5; /* bit 0 and bit 1 - coin inputs */
}
static ADDRESS_MAP_START( bigevglf_sub_portmap, AS_IO, 8, bigevglf_state )
@@ -369,11 +369,11 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, bigevglf_state )
AM_RANGE(0xca00, 0xca0d) AM_DEVWRITE_LEGACY("msm", msm5232_w)
AM_RANGE(0xcc00, 0xcc00) AM_WRITENOP
AM_RANGE(0xce00, 0xce00) AM_WRITENOP
- AM_RANGE(0xd800, 0xd800) AM_READWRITE(sound_command_r, beg_fromsound_w) /* write to D800 sets bit 1 in status */
+ AM_RANGE(0xd800, 0xd800) AM_READWRITE(sound_command_r, beg_fromsound_w) /* write to D800 sets bit 1 in status */
AM_RANGE(0xda00, 0xda00) AM_READWRITE(soundstate_r, nmi_enable_w)
AM_RANGE(0xdc00, 0xdc00) AM_WRITE(nmi_disable_w)
AM_RANGE(0xde00, 0xde00) AM_WRITENOP
- AM_RANGE(0xe000, 0xefff) AM_READNOP /* space for diagnostics ROM */
+ AM_RANGE(0xe000, 0xefff) AM_READNOP /* space for diagnostics ROM */
ADDRESS_MAP_END
@@ -410,7 +410,7 @@ GFXDECODE_END
static const msm5232_interface msm5232_config =
{
- { 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 }, /* 0.65 (???) uF capacitors */
+ { 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 }, /* 0.65 (???) uF capacitors */
DEVCB_NULL
};
@@ -488,26 +488,26 @@ void bigevglf_state::machine_reset()
static MACHINE_CONFIG_START( bigevglf, bigevglf_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,10000000/2) /* 5 MHz ? */
+ MCFG_CPU_ADD("maincpu", Z80,10000000/2) /* 5 MHz ? */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(bigevglf_portmap)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", bigevglf_state, irq0_line_hold) /* vblank */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", bigevglf_state, irq0_line_hold) /* vblank */
- MCFG_CPU_ADD("sub", Z80,10000000/2) /* 5 MHz ? */
+ MCFG_CPU_ADD("sub", Z80,10000000/2) /* 5 MHz ? */
MCFG_CPU_PROGRAM_MAP(sub_map)
MCFG_CPU_IO_MAP(bigevglf_sub_portmap)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", bigevglf_state, irq0_line_hold) /* vblank */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", bigevglf_state, irq0_line_hold) /* vblank */
- MCFG_CPU_ADD("audiocpu", Z80,8000000/2) /* 4 MHz ? */
+ MCFG_CPU_ADD("audiocpu", Z80,8000000/2) /* 4 MHz ? */
MCFG_CPU_PROGRAM_MAP(sound_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(bigevglf_state, irq0_line_hold, 2*60) /* IRQ generated by ???;
+ MCFG_CPU_PERIODIC_INT_DRIVER(bigevglf_state, irq0_line_hold, 2*60) /* IRQ generated by ???;
2 irqs/frame give good music tempo but also SOUND ERROR in test mode,
4 irqs/frame give SOUND OK in test mode but music seems to be running too fast */
- MCFG_CPU_ADD("mcu", M68705,2000000) /* ??? */
+ MCFG_CPU_ADD("mcu", M68705,2000000) /* ??? */
MCFG_CPU_PROGRAM_MAP(m68705_map)
- MCFG_QUANTUM_TIME(attotime::from_hz(600)) /* 10 CPU slices per frame - interleaving is forced on the fly */
+ MCFG_QUANTUM_TIME(attotime::from_hz(600)) /* 10 CPU slices per frame - interleaving is forced on the fly */
/* video hardware */
@@ -529,14 +529,14 @@ static MACHINE_CONFIG_START( bigevglf, bigevglf_state )
MCFG_SOUND_ADD("msm", MSM5232, 8000000/4)
MCFG_SOUND_CONFIG(msm5232_config)
- MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
- MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
- MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
- MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
- MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
- MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
- MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
- MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
+ MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
+ MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
+ MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
+ MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
+ MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
+ MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
+ MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
+ MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
// pin 1 SOLO 8' not mapped
// pin 2 SOLO 16' not mapped
// pin 22 Noise Output not mapped
diff --git a/src/mame/drivers/bigstrkb.c b/src/mame/drivers/bigstrkb.c
index cab4d20d8e2..2e47aabc3a0 100644
--- a/src/mame/drivers/bigstrkb.c
+++ b/src/mame/drivers/bigstrkb.c
@@ -44,7 +44,7 @@ static ADDRESS_MAP_START( bigstrkb_map, AS_PROGRAM, 16, bigstrkb_state )
AM_RANGE(0x0C2108, 0x0C2109) AM_WRITENOP
AM_RANGE(0x0C2200, 0x0C2201) AM_WRITENOP
AM_RANGE(0x0C2208, 0x0C2209) AM_WRITENOP
- AM_RANGE(0x0c2308, 0x0c2309) AM_WRITENOP // bit 0 of DSW1 (flip screen) - use vregs
+ AM_RANGE(0x0c2308, 0x0c2309) AM_WRITENOP // bit 0 of DSW1 (flip screen) - use vregs
AM_RANGE(0x0D0000, 0x0dffff) AM_RAM // 0xd2000 - 0xd3fff? 0xd8000?
@@ -90,7 +90,7 @@ ADDRESS_MAP_END
PORT_BIT( 0x80, IP_ACTIVE_LOW, start )
static INPUT_PORTS_START( bigstrkb )
- PORT_START("DSW0") /* DSW0 (0x700000.w) */
+ PORT_START("DSW0") /* DSW0 (0x700000.w) */
PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
PORT_DIPSETTING( 0x07, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
@@ -102,7 +102,7 @@ static INPUT_PORTS_START( bigstrkb )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0b, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin B" to "Free Play"
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin B" to "Free Play"
/* 0x01 to 0x05 gives 2C_3C */
PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
PORT_DIPSETTING( 0x70, DEF_STR( 4C_1C ) )
@@ -115,11 +115,11 @@ static INPUT_PORTS_START( bigstrkb )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0xb0, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0xa0, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin A" to "Free Play"
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) ) // also set "Coin A" to "Free Play"
/* 0x10 to 0x50 gives 2C_3C */
- PORT_START("DSW1") /* DSW1 (0x700002.w) */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) // Check code at 0x00097c (flip screen)
+ PORT_START("DSW1") /* DSW1 (0x700002.w) */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) // Check code at 0x00097c (flip screen)
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x06, 0x06, DEF_STR( Difficulty ) )
@@ -128,19 +128,19 @@ static INPUT_PORTS_START( bigstrkb )
PORT_DIPSETTING( 0x04, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
PORT_DIPNAME( 0x18, 0x18, "Timer Speed" )
- PORT_DIPSETTING( 0x08, "Slow" ) // 65
- PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // 50
- PORT_DIPSETTING( 0x10, "Fast" ) // 35
- PORT_DIPSETTING( 0x00, "Fastest" ) // 25
+ PORT_DIPSETTING( 0x08, "Slow" ) // 65
+ PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // 50
+ PORT_DIPSETTING( 0x10, "Fast" ) // 35
+ PORT_DIPSETTING( 0x00, "Fastest" ) // 25
PORT_DIPUNUSED( 0x20, IP_ACTIVE_LOW )
PORT_DIPNAME( 0x40, 0x40, "2 Players Game" )
PORT_DIPSETTING( 0x00, "1 Credit" )
PORT_DIPSETTING( 0x40, "2 Credits" )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) // Check code at 0x000c50 (test mode ?)
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) // Check code at 0x000c50 (test mode ?)
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SYSTEM") /* System inputs (0x700004.w) */
+ PORT_START("SYSTEM") /* System inputs (0x700004.w) */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -150,10 +150,10 @@ static INPUT_PORTS_START( bigstrkb )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("P1") /* Player 1 controls (0x70000c.w) */
+ PORT_START("P1") /* Player 1 controls (0x70000c.w) */
BIGSTRKB_PLAYER_INPUT( 1, IPT_START1 )
- PORT_START("P2") /* Player 2 controls (0x70000a.w) */
+ PORT_START("P2") /* Player 2 controls (0x70000a.w) */
BIGSTRKB_PLAYER_INPUT( 2, IPT_START2 )
INPUT_PORTS_END
@@ -177,9 +177,9 @@ static const gfx_layout bigstrkb_char16layout =
4,
{ RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) },
{ 0, 1, 2, 3, 4, 5, 6, 7,
- 8, 9,10,11,12,13,14,15 },
+ 8, 9,10,11,12,13,14,15 },
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16,
- 8*16, 9*16,10*16,11*16,12*16,13*16,14*16,15*16 },
+ 8*16, 9*16,10*16,11*16,12*16,13*16,14*16,15*16 },
16*16
};
@@ -259,24 +259,24 @@ ROM_END
// same as bigstrkb, but less buggy/better presentation, and teams are Italian league instead of international
ROM_START( bigstrkba )
ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
- ROM_LOAD16_BYTE( "15.cpu16", 0x000000, 0x040000, CRC(204551b5) SHA1(bfc8d284801a2c11677431287bc2e5b8ba7737db) )
- ROM_LOAD16_BYTE( "16.cpu17", 0x000001, 0x040000, CRC(3ba6997b) SHA1(86c0318a48b42b4622f3397c55584e0779e4f626) )
+ ROM_LOAD16_BYTE( "15.cpu16", 0x000000, 0x040000, CRC(204551b5) SHA1(bfc8d284801a2c11677431287bc2e5b8ba7737db) )
+ ROM_LOAD16_BYTE( "16.cpu17", 0x000001, 0x040000, CRC(3ba6997b) SHA1(86c0318a48b42b4622f3397c55584e0779e4f626) )
ROM_REGION( 0x40000, "gfx1", 0 ) /* 8x8x4 FG Tiles */
- ROM_LOAD( "5.bin", 0x000000, 0x010000, CRC(f51ea151) SHA1(fd80280fa99cd08b9f458a4d4078ce59a926b4bc) )
- ROM_LOAD( "6.bin", 0x010000, 0x010000, CRC(754d750e) SHA1(d0a6be6d373e95404733c125126bbeeed03e370e) )
- ROM_LOAD( "7.bin", 0x020000, 0x010000, CRC(fbc52546) SHA1(daae9451629b67d532dfd4825b552944e1c585d8) )
- ROM_LOAD( "8.bin", 0x030000, 0x010000, CRC(62c63eaa) SHA1(4a408703a3d70159d78b0c213ff52a95a8a07884) )
+ ROM_LOAD( "5.bin", 0x000000, 0x010000, CRC(f51ea151) SHA1(fd80280fa99cd08b9f458a4d4078ce59a926b4bc) )
+ ROM_LOAD( "6.bin", 0x010000, 0x010000, CRC(754d750e) SHA1(d0a6be6d373e95404733c125126bbeeed03e370e) )
+ ROM_LOAD( "7.bin", 0x020000, 0x010000, CRC(fbc52546) SHA1(daae9451629b67d532dfd4825b552944e1c585d8) )
+ ROM_LOAD( "8.bin", 0x030000, 0x010000, CRC(62c63eaa) SHA1(4a408703a3d70159d78b0c213ff52a95a8a07884) )
ROM_REGION( 0x200000, "gfx2", ROMREGION_INVERT ) /* 16x16x4 BG Tiles */
- ROM_LOAD( "1.bin", 0x000000, 0x080000, CRC(c4eb9746) SHA1(ed4436e79abdb043349ee20d22c5454590ab5837) )
- ROM_LOAD( "2.bin", 0x080000, 0x080000, CRC(aa0beb78) SHA1(42cde54203cab4169099172cfce090725102e44c) )
- ROM_LOAD( "3.bin", 0x100000, 0x080000, CRC(d02298c5) SHA1(d3da72cc4edc8a6c9c8ec76bb566ded6d0b7b453) )
- ROM_LOAD( "4.bin", 0x180000, 0x080000, CRC(069ac008) SHA1(30b90d80177de744624e9d9618eebe5471042afd) )
+ ROM_LOAD( "1.bin", 0x000000, 0x080000, CRC(c4eb9746) SHA1(ed4436e79abdb043349ee20d22c5454590ab5837) )
+ ROM_LOAD( "2.bin", 0x080000, 0x080000, CRC(aa0beb78) SHA1(42cde54203cab4169099172cfce090725102e44c) )
+ ROM_LOAD( "3.bin", 0x100000, 0x080000, CRC(d02298c5) SHA1(d3da72cc4edc8a6c9c8ec76bb566ded6d0b7b453) )
+ ROM_LOAD( "4.bin", 0x180000, 0x080000, CRC(069ac008) SHA1(30b90d80177de744624e9d9618eebe5471042afd) )
ROM_REGION( 0x080000, "gfx3", ROMREGION_INVERT ) /* 16x16x4 Sprites */
ROM_LOAD( "footgaa.011", 0x000000, 0x20000, CRC(c3924fea) SHA1(85b6775b5aa8c518a1e169b97379a210e25e67c9) )
- ROM_LOAD( "12.bin", 0x020000, 0x20000, CRC(8e15ea09) SHA1(e591811bb5ecb1782a77883b3ee27212fb703f22) )
+ ROM_LOAD( "12.bin", 0x020000, 0x20000, CRC(8e15ea09) SHA1(e591811bb5ecb1782a77883b3ee27212fb703f22) )
ROM_LOAD( "footgaa.013", 0x040000, 0x20000, CRC(26ce4b7f) SHA1(4bfd1de6d73dc5e720972bba477081dba0b05ab3) )
ROM_LOAD( "footgaa.014", 0x060000, 0x20000, CRC(c3cfc500) SHA1(5dc5780b9977b0544601471004c656c2fd738bcd) )
diff --git a/src/mame/drivers/bingo.c b/src/mame/drivers/bingo.c
index 187c7ac56a2..9814cef986a 100644
--- a/src/mame/drivers/bingo.c
+++ b/src/mame/drivers/bingo.c
@@ -9,7 +9,7 @@ class bingo_state : public driver_device
public:
bingo_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -52,7 +52,7 @@ class seeben_state : public driver_device
public:
seeben_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -92,7 +92,7 @@ class splin_state : public driver_device
public:
splin_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -238,86 +238,86 @@ ROM_START(topgamet)
ROM_END
ROM_START(penalty)
- ROM_REGION(0x10000, "maincpu", 0)
- ROM_LOAD("13006-1.epr", 0x8000, 0x8000, CRC(93cfbec9) SHA1(c245604ac42c88c647950db4497a6f9dd3504955))
- ROM_LOAD("13006-2.epr", 0x0000, 0x4000, CRC(41470cc1) SHA1(7050df563fddbe8216317d96664d12567b618645))
+ ROM_REGION(0x10000, "maincpu", 0)
+ ROM_LOAD("13006-1.epr", 0x8000, 0x8000, CRC(93cfbec9) SHA1(c245604ac42c88c647950db4497a6f9dd3504955))
+ ROM_LOAD("13006-2.epr", 0x0000, 0x4000, CRC(41470cc1) SHA1(7050df563fddbe8216317d96664d12567b618645))
ROM_END
ROM_START(brooklyn)
- ROM_REGION(0x10000, "maincpu", 0)
- ROM_LOAD("n10207-1.epr", 0x8000, 0x8000, CRC(7851f870) SHA1(8da400108a352954ced8fc942663c0635bec4d1c))
- ROM_LOAD("n10207-2.epr", 0x0000, 0x4000, CRC(861dae09) SHA1(d808fbbf6b50e1482a512b9bd1b18a023694adb2))
+ ROM_REGION(0x10000, "maincpu", 0)
+ ROM_LOAD("n10207-1.epr", 0x8000, 0x8000, CRC(7851f870) SHA1(8da400108a352954ced8fc942663c0635bec4d1c))
+ ROM_LOAD("n10207-2.epr", 0x0000, 0x4000, CRC(861dae09) SHA1(d808fbbf6b50e1482a512b9bd1b18a023694adb2))
ROM_END
ROM_START(brooklyna)
- ROM_REGION(0x10000, "maincpu", 0)
- ROM_LOAD("o10307-1.epr", 0x8000, 0x8000, CRC(628ac640) SHA1(67edb424f15880e874b03028066e6c0039db21fa))
- ROM_LOAD("o10307-2.epr", 0x0000, 0x4000, CRC(c35d83ff) SHA1(e37c03e6960138cb6b628dfc6b12e484bbae96e8))
+ ROM_REGION(0x10000, "maincpu", 0)
+ ROM_LOAD("o10307-1.epr", 0x8000, 0x8000, CRC(628ac640) SHA1(67edb424f15880e874b03028066e6c0039db21fa))
+ ROM_LOAD("o10307-2.epr", 0x0000, 0x4000, CRC(c35d83ff) SHA1(e37c03e6960138cb6b628dfc6b12e484bbae96e8))
ROM_END
ROM_START(newdixie)
- ROM_REGION(0x10000, "maincpu", 0)
- ROM_LOAD("10307-1.epr", 0x8000, 0x8000, CRC(7b6b2e9c) SHA1(149c9e1d2a3e7db735835c6fa795e41b2eb45175))
- ROM_LOAD("10307-2.epr", 0x0000, 0x4000, CRC(d99a7866) SHA1(659a0107bc970d2578dcfd7cdd43661da778fd5c))
+ ROM_REGION(0x10000, "maincpu", 0)
+ ROM_LOAD("10307-1.epr", 0x8000, 0x8000, CRC(7b6b2e9c) SHA1(149c9e1d2a3e7db735835c6fa795e41b2eb45175))
+ ROM_LOAD("10307-2.epr", 0x0000, 0x4000, CRC(d99a7866) SHA1(659a0107bc970d2578dcfd7cdd43661da778fd5c))
ROM_END
ROM_START(superdix)
- ROM_REGION(0x10000, "maincpu", 0)
+ ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "12906-1.epr", 0x8000, 0x8000, CRC(e90a8aa5) SHA1(88dac74fb020535b535f7c4c245bbece398164ee))
ROM_LOAD( "12906-2.epr", 0x0000, 0x4000, CRC(4875dfb4) SHA1(722bfa89f69d14e24555eea9cc975012098db25b))
ROM_END
ROM_START(cntine31)
- ROM_REGION(0x10000, "maincpu", 0)
- ROM_LOAD("10107-1.epr", 0x8000, 0x8000, CRC(3b67cce3) SHA1(95f71526c236262ff985148ba7ea057f07fadbe8))
- ROM_LOAD("10107-2.epr", 0x0000, 0x4000, CRC(89d08795) SHA1(dc75502580d681d9b4dc878b0d80346bcef407ae))
+ ROM_REGION(0x10000, "maincpu", 0)
+ ROM_LOAD("10107-1.epr", 0x8000, 0x8000, CRC(3b67cce3) SHA1(95f71526c236262ff985148ba7ea057f07fadbe8))
+ ROM_LOAD("10107-2.epr", 0x0000, 0x4000, CRC(89d08795) SHA1(dc75502580d681d9b4dc878b0d80346bcef407ae))
ROM_END
ROM_START(domino2)
- ROM_REGION(0x10000, "maincpu", 0)
- ROM_LOAD("13006.epr", 0x8000, 0x8000, CRC(8ed9b2a5) SHA1(8f3e730cef3e74cb043691a111e1bf6660642a73))
+ ROM_REGION(0x10000, "maincpu", 0)
+ ROM_LOAD("13006.epr", 0x8000, 0x8000, CRC(8ed9b2a5) SHA1(8f3e730cef3e74cb043691a111e1bf6660642a73))
ROM_END
ROM_START(ggate)
- ROM_REGION(0x10000, "maincpu", 0)
+ ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "13006-1.epr", 0x8000, 0x8000, CRC(6a451fc6) SHA1(93287937c8a679dfca1a162977a62357134673b6))
ROM_LOAD( "13006-2.epr", 0x0000, 0x4000, CRC(217299b0) SHA1(ef3ee8811183dca43699a7c2d75fb99bc3668ae2))
ROM_END
ROM_START(ggatea)
- ROM_REGION(0x10000, "maincpu", 0)
+ ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "12906-1.epr", 0x8000, 0x8000, CRC(3792fc4c) SHA1(4ab88b6c73ce1b49e1a4d12cc9fa61c7d74ed780))
ROM_LOAD( "12906-2.epr", 0x0000, 0x4000, CRC(a1115196) SHA1(dfa549a547b5cd7a9369d30fa1e868e6725cb3f1))
ROM_END
ROM_START(tripjok)
- ROM_REGION(0x10000, "maincpu", 0)
+ ROM_REGION(0x10000, "maincpu", 0)
ROM_LOAD( "13006-1", 0x8000, 0x8000, CRC(5682ac90) SHA1(c9fa13c56e9178eb861991fcad6b09fd27cca3cb))
ROM_LOAD( "13006-2", 0x0000, 0x4000, CRC(c7104e8f) SHA1(a3737f70cb9c97df24b5da915ef53b6d30f2470d))
ROM_END
-GAME(1980, cntinntl, 0, bingo, bingo, bingo_state, bingo, ROT0, "Bally", "Continental (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, goldgame, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, goldgkitb, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Kit Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, goldgstake, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, goldgnew, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Bingo New (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, goldgkit1, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Kit 1 Generation (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, michigan, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, michkit1, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Bingo Kit 1 Generation (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, michkitb, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Kit Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, michstake, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, michnew, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Bingo New (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, montana, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Montana Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, topgame, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Top Game Laser L10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, topgamet, topgame, splin, splin, splin_state, splin, ROT0, "Splin", "Top Game Turbo (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, penalty, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Penalty (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, brooklyn, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Brooklyn (set 1) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, brooklyna, brooklyn, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Brooklyn (set 2) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, newdixie, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "New Dixieland (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, superdix, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Super Dixieland (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, cntine31, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Continental 3 in 1 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, domino2, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Domino II (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, tripjok, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Triple Joker (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, ggate, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Golden Gate (set 1) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
-GAME(19??, ggatea, ggate, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Golden Gate (set 2) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1980, cntinntl, 0, bingo, bingo, bingo_state, bingo, ROT0, "Bally", "Continental (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, goldgame, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, goldgkitb, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Kit Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, goldgstake, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, goldgnew, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Bingo New (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, goldgkit1, goldgame, splin, splin, splin_state, splin, ROT0, "Splin", "Golden Game Kit 1 Generation (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, michigan, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, michkit1, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Bingo Kit 1 Generation (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, michkitb, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Kit Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, michstake, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, michnew, michigan, splin, splin, splin_state, splin, ROT0, "Splin", "Michigan Bingo New (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, montana, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Montana Bingo Stake 6/10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, topgame, 0, splin, splin, splin_state, splin, ROT0, "Splin", "Top Game Laser L10 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, topgamet, topgame, splin, splin, splin_state, splin, ROT0, "Splin", "Top Game Turbo (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, penalty, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Penalty (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, brooklyn, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Brooklyn (set 1) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, brooklyna, brooklyn, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Brooklyn (set 2) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, newdixie, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "New Dixieland (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, superdix, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Super Dixieland (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, cntine31, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Continental 3 in 1 (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, domino2, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Domino II (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, tripjok, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Triple Joker (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, ggate, 0, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Golden Gate (set 1) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
+GAME(19??, ggatea, ggate, seeben, seeben, seeben_state, seeben, ROT0, "Seeben (Belgium)", "Golden Gate (set 2) (Bingo)", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/bingoc.c b/src/mame/drivers/bingoc.c
index e216c27000c..322ab39d5d9 100644
--- a/src/mame/drivers/bingoc.c
+++ b/src/mame/drivers/bingoc.c
@@ -101,9 +101,9 @@ WRITE8_MEMBER(bingoc_state::bingoc_play_w)
{
device_t *device = machine().device("upd");
/*
- ---- --x- sound rom banking
- ---- ---x start-stop sample
- */
+ ---- --x- sound rom banking
+ ---- ---x start-stop sample
+ */
UINT8 *upd = machine().root_device().memregion("upd")->base();
memcpy(&upd[0x00000], &upd[0x20000 + (((data & 2)>>1) * 0x20000)], 0x20000);
upd7759_start_w(device, data & 1);
@@ -144,11 +144,11 @@ INPUT_PORTS_END
static MACHINE_CONFIG_START( bingoc, bingoc_state )
- MCFG_CPU_ADD("maincpu", M68000,8000000) /* ? MHz */
+ MCFG_CPU_ADD("maincpu", M68000,8000000) /* ? MHz */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bingoc_state, irq2_line_hold)
- MCFG_CPU_ADD("soundcpu", Z80,4000000) /* ? MHz */
+ MCFG_CPU_ADD("soundcpu", Z80,4000000) /* ? MHz */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_io)
#if SOUND_TEST
diff --git a/src/mame/drivers/bingoman.c b/src/mame/drivers/bingoman.c
index f9981e8158a..48e307a3dd3 100644
--- a/src/mame/drivers/bingoman.c
+++ b/src/mame/drivers/bingoman.c
@@ -246,7 +246,7 @@ class bingoman_state : public driver_device
public:
bingoman_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
// devices
@@ -403,13 +403,13 @@ ROM_START( bingoman )
ROM_REGION( 0x80000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD16_WORD_SWAP( "ps.020.u51", 0x000000, 0x080000, CRC(0f40b10d) SHA1(96a24547a612ba7c2b33c84a0f3afecc9a7cc076) ) // wrong ...
- ROM_REGION( 0x300000, "tms", ROMREGION_ERASE00 ) // banked
- ROM_LOAD( "p03_036.015.u01", 0x000000, 0x080000, CRC(b78b7fca) SHA1(8e4147bb8351db5b17e2bf39bb12ca31cf02f3a6) ) // Game 1 (Gold Jackpot)
- ROM_LOAD( "p03_tms.030.u02", 0x080000, 0x080000, CRC(94f0076e) SHA1(45d0379ad232ae7c5723c87a5fed9f9cc576aea2) ) // Game 1 (Gold Jackpot)
- ROM_LOAD( "p07_036.010.u03", 0x100000, 0x080000, CRC(dda80fab) SHA1(4fb06ca94a8a03e5ee91d4cb4a24ac35863a82a1) ) // Game 2 (Turbo Game)
- ROM_LOAD( "p07_tms.025.u04", 0x180000, 0x080000, CRC(6c4a84f8) SHA1(e683753eaf54fdedd1cdc64c4dd4591e3b48dc75) ) // Game 2 (Turbo Game)
- ROM_LOAD( "p14_036.012.u05", 0x200000, 0x080000, CRC(a9f2c609) SHA1(0669aba100a8263b99373d7ac997ec4f1967bb1b) ) // Game 3 (Rolling Bingo - Joker Bonus)
- ROM_LOAD( "p14_tms.030.u06", 0x280000, 0x080000, CRC(cdf60d47) SHA1(ef7e107f1713466fb18e940e90e7f46c781d4581) ) // Game 3 (Rolling Bingo - Joker Bonus)
+ ROM_REGION( 0x300000, "tms", ROMREGION_ERASE00 ) // banked
+ ROM_LOAD( "p03_036.015.u01", 0x000000, 0x080000, CRC(b78b7fca) SHA1(8e4147bb8351db5b17e2bf39bb12ca31cf02f3a6) ) // Game 1 (Gold Jackpot)
+ ROM_LOAD( "p03_tms.030.u02", 0x080000, 0x080000, CRC(94f0076e) SHA1(45d0379ad232ae7c5723c87a5fed9f9cc576aea2) ) // Game 1 (Gold Jackpot)
+ ROM_LOAD( "p07_036.010.u03", 0x100000, 0x080000, CRC(dda80fab) SHA1(4fb06ca94a8a03e5ee91d4cb4a24ac35863a82a1) ) // Game 2 (Turbo Game)
+ ROM_LOAD( "p07_tms.025.u04", 0x180000, 0x080000, CRC(6c4a84f8) SHA1(e683753eaf54fdedd1cdc64c4dd4591e3b48dc75) ) // Game 2 (Turbo Game)
+ ROM_LOAD( "p14_036.012.u05", 0x200000, 0x080000, CRC(a9f2c609) SHA1(0669aba100a8263b99373d7ac997ec4f1967bb1b) ) // Game 3 (Rolling Bingo - Joker Bonus)
+ ROM_LOAD( "p14_tms.030.u06", 0x280000, 0x080000, CRC(cdf60d47) SHA1(ef7e107f1713466fb18e940e90e7f46c781d4581) ) // Game 3 (Rolling Bingo - Joker Bonus)
ROM_REGION( 0x100000, "snd", ROMREGION_ERASE00 )
ROM_LOAD( "snd.u10.021.u10", 0x00000, 0x80000, CRC(676f7c4f) SHA1(acdec156cb2d7b880cc1668cce50268bb2b4ec72) )
@@ -432,13 +432,13 @@ ROM_START( bingomana )
ROM_REGION( 0x80000, "maincpu", ROMREGION_ERASE00 )
ROM_LOAD16_WORD_SWAP( "ps.020.u51", 0x000000, 0x080000, CRC(0f40b10d) SHA1(96a24547a612ba7c2b33c84a0f3afecc9a7cc076) ) // wrong ...
- ROM_REGION( 0x300000, "tms", ROMREGION_ERASE00 ) // banked
- ROM_LOAD( "a03_037.013.u01", 0x000000, 0x080000, CRC(9c3ed8e9) SHA1(263431ed6db314bee64709bae16fa8c6d5adbd41) ) // Game 1 (Gold Jackpot)
- ROM_LOAD( "a03_tms.010.u02", 0x080000, 0x080000, CRC(f4142b1a) SHA1(1a14865bd567d5e7bf9e0e0765f6443c8165f46b) ) // Game 1 (Gold Jackpot)
+ ROM_REGION( 0x300000, "tms", ROMREGION_ERASE00 ) // banked
+ ROM_LOAD( "a03_037.013.u01", 0x000000, 0x080000, CRC(9c3ed8e9) SHA1(263431ed6db314bee64709bae16fa8c6d5adbd41) ) // Game 1 (Gold Jackpot)
+ ROM_LOAD( "a03_tms.010.u02", 0x080000, 0x080000, CRC(f4142b1a) SHA1(1a14865bd567d5e7bf9e0e0765f6443c8165f46b) ) // Game 1 (Gold Jackpot)
ROM_REGION( 0x100000, "snd", ROMREGION_ERASE00 )
- ROM_LOAD( "snd_u10.022.u10", 0x00000, 0x80000, CRC(216a9c4a) SHA1(f1eb5f6517d6b579bf977b8eb4dd3f3544b75796) ) // different revision
- ROM_LOAD( "snd_u11.022.u11", 0x80000, 0x80000, CRC(c0bb0056) SHA1(c8bc3a618eb9be940e089ec00d88c0b92d42025c) ) // different revision
+ ROM_LOAD( "snd_u10.022.u10", 0x00000, 0x80000, CRC(216a9c4a) SHA1(f1eb5f6517d6b579bf977b8eb4dd3f3544b75796) ) // different revision
+ ROM_LOAD( "snd_u11.022.u11", 0x80000, 0x80000, CRC(c0bb0056) SHA1(c8bc3a618eb9be940e089ec00d88c0b92d42025c) ) // different revision
ROM_REGION( 0x10000, "plds", ROMREGION_ERASE00 )
ROM_LOAD( "102u0530_gal16v8d.u05", 0x0000, 0x0892, CRC(3f0f57e5) SHA1(65383da38f4ad6c5ecaf84336eabea3a77db1307) )
diff --git a/src/mame/drivers/bingor.c b/src/mame/drivers/bingor.c
index 97f0da47ef8..b484a7e09f3 100644
--- a/src/mame/drivers/bingor.c
+++ b/src/mame/drivers/bingor.c
@@ -724,7 +724,7 @@ ROM_END
*/
-ROM_START( bingor5 ) /* BellStar V3 */
+ROM_START( bingor5 ) /* BellStar V3 */
ROM_REGION( 0x20000, "boot_prg", ROMREGION_ERASE00 ) /* i186 code */
ROM_LOAD16_BYTE( "bellstar_v3_v.3.6.02_l.bin", 0x010000, 0x08000, CRC(56b84a5d) SHA1(1bda4fb972b4f0f0575089b545bf15dfea859948) )
ROM_LOAD16_BYTE( "bellstar_v3_v.3.6.02_h.bin", 0x010001, 0x08000, CRC(d6945bb8) SHA1(b620f1b547be03c4609bff8d06111d0ea425bae8) )
diff --git a/src/mame/drivers/bionicc.c b/src/mame/drivers/bionicc.c
index 7ff9a21c70e..163658185eb 100644
--- a/src/mame/drivers/bionicc.c
+++ b/src/mame/drivers/bionicc.c
@@ -143,21 +143,21 @@ TIMER_DEVICE_CALLBACK_MEMBER(bionicc_state::bionicc_scanline)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, bionicc_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
- AM_RANGE(0xfe0000, 0xfe07ff) AM_RAM /* RAM? */
+ AM_RANGE(0xfe0000, 0xfe07ff) AM_RAM /* RAM? */
AM_RANGE(0xfe0800, 0xfe0cff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0xfe0d00, 0xfe3fff) AM_RAM /* RAM? */
- AM_RANGE(0xfe4000, 0xfe4001) AM_WRITE(bionicc_gfxctrl_w) /* + coin counters */
+ AM_RANGE(0xfe4000, 0xfe4001) AM_WRITE(bionicc_gfxctrl_w) /* + coin counters */
AM_RANGE(0xfe4000, 0xfe4001) AM_READ_PORT("SYSTEM")
AM_RANGE(0xfe4002, 0xfe4003) AM_READ_PORT("DSW")
AM_RANGE(0xfe8010, 0xfe8017) AM_WRITE(bionicc_scroll_w)
- AM_RANGE(0xfe801a, 0xfe801b) AM_WRITE(bionicc_mpu_trigger_w) /* ??? not sure, but looks like it */
+ AM_RANGE(0xfe801a, 0xfe801b) AM_WRITE(bionicc_mpu_trigger_w) /* ??? not sure, but looks like it */
AM_RANGE(0xfec000, 0xfecfff) AM_RAM_WRITE(bionicc_txvideoram_w) AM_SHARE("txvideoram")
AM_RANGE(0xff0000, 0xff3fff) AM_RAM_WRITE(bionicc_fgvideoram_w) AM_SHARE("fgvideoram")
AM_RANGE(0xff4000, 0xff7fff) AM_RAM_WRITE(bionicc_bgvideoram_w) AM_SHARE("bgvideoram")
AM_RANGE(0xff8000, 0xff87ff) AM_RAM_WRITE(bionicc_paletteram_w) AM_SHARE("paletteram")
- AM_RANGE(0xffc000, 0xfffff7) AM_RAM /* working RAM */
+ AM_RANGE(0xffc000, 0xfffff7) AM_RAM /* working RAM */
AM_RANGE(0xfffff8, 0xfffff9) AM_READWRITE(hacked_soundcommand_r, hacked_soundcommand_w) /* hack */
- AM_RANGE(0xfffffa, 0xffffff) AM_READWRITE(hacked_controls_r, hacked_controls_w) /* hack */
+ AM_RANGE(0xfffffa, 0xffffff) AM_READWRITE(hacked_controls_r, hacked_controls_w) /* hack */
ADDRESS_MAP_END
@@ -184,7 +184,7 @@ static INPUT_PORTS_START( bionicc )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_START("DSW")
- PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWB:1,2,3")
+ PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWB:1,2,3")
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0001, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0002, DEF_STR( 2C_1C ) )
@@ -193,7 +193,7 @@ static INPUT_PORTS_START( bionicc )
PORT_DIPSETTING( 0x0005, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:4,5,6")
+ PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWB:4,5,6")
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0008, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) )
@@ -203,28 +203,28 @@ static INPUT_PORTS_START( bionicc )
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0018, DEF_STR( 1C_6C ) )
PORT_SERVICE_DIPLOC( 0x0040, IP_ACTIVE_LOW, "SWB:7" )
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWB:8")
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWB:8")
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWA:1,2")
+ PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWA:1,2")
PORT_DIPSETTING( 0x0300, "3" )
PORT_DIPSETTING( 0x0200, "4" )
PORT_DIPSETTING( 0x0100, "5" )
PORT_DIPSETTING( 0x0000, "7" )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:3")
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:3")
PORT_DIPSETTING( 0x0400, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x1800, 0x1800, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWA:4,5") /* table at 0x00483a */
+ PORT_DIPNAME( 0x1800, 0x1800, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWA:4,5") /* table at 0x00483a */
PORT_DIPSETTING( 0x1800, "20k 40k 100k 60k+" )
PORT_DIPSETTING( 0x1000, "30k 50k 120k 70k+" )
PORT_DIPSETTING( 0x0800, "20k 60k")
PORT_DIPSETTING( 0x0000, "30k 70k" )
- PORT_DIPNAME( 0x6000, 0x4000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:6,7")
+ PORT_DIPNAME( 0x6000, 0x4000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SWA:6,7")
PORT_DIPSETTING( 0x4000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x6000, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x2000, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x8000, 0x8000, "Freeze" ) PORT_DIPLOCATION("SWA:8") /* Listed as "Unused" */
+ PORT_DIPNAME( 0x8000, 0x8000, "Freeze" ) PORT_DIPLOCATION("SWA:8") /* Listed as "Unused" */
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
@@ -315,10 +315,10 @@ static const gfx_layout scroll1layout_bionicc=
};
static GFXDECODE_START( bionicc )
- GFXDECODE_ENTRY( "gfx1", 0, vramlayout_bionicc, 768, 64 ) /* colors 768-1023 */
- GFXDECODE_ENTRY( "gfx2", 0, scroll2layout_bionicc, 0, 4 ) /* colors 0- 63 */
- GFXDECODE_ENTRY( "gfx3", 0, scroll1layout_bionicc, 256, 4 ) /* colors 256- 319 */
- GFXDECODE_ENTRY( "gfx4", 0, spritelayout_bionicc, 512, 16 ) /* colors 512- 767 */
+ GFXDECODE_ENTRY( "gfx1", 0, vramlayout_bionicc, 768, 64 ) /* colors 768-1023 */
+ GFXDECODE_ENTRY( "gfx2", 0, scroll2layout_bionicc, 0, 4 ) /* colors 0- 63 */
+ GFXDECODE_ENTRY( "gfx3", 0, scroll1layout_bionicc, 256, 4 ) /* colors 256- 319 */
+ GFXDECODE_ENTRY( "gfx4", 0, spritelayout_bionicc, 512, 16 ) /* colors 512- 767 */
GFXDECODE_END
@@ -359,9 +359,9 @@ static MACHINE_CONFIG_START( bionicc, bionicc_state )
MCFG_CPU_ADD("audiocpu", Z80, EXO3_F0_CLK / 4) /* EXO3 C,B=GND, A=5V ==> Divisor 2^2 */
MCFG_CPU_PROGRAM_MAP(sound_map)
/* FIXME: interrupt timing
- * schematics indicate that nmi_line is set on M680000 access with AB1=1
- * and IOCS=0 (active low), see pages A-1/10, A-4/10 in schematics
- */
+ * schematics indicate that nmi_line is set on M680000 access with AB1=1
+ * and IOCS=0 (active low), see pages A-1/10, A-4/10 in schematics
+ */
MCFG_CPU_PERIODIC_INT_DRIVER(bionicc_state, nmi_line_pulse, 4*60)
@@ -405,18 +405,18 @@ ROM_START( bionicc ) /* "Not for use in Japan" */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "ts_01b.4e", 0x00000, 0x8000, CRC(a9a6cafa) SHA1(55e0a0e6ca11e8e73339d5b4604e130031211291) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
+ ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
ROM_LOAD( "c8751h-88", 0x0000, 0x1000, NO_DUMP )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "tsu_08.8l", 0x00000, 0x8000, CRC(9bf0b7a2) SHA1(1361335c3c2c8a9c6a7d99566048d8aac99e7c8f) ) /* VIDEORAM (text layer) tiles */
+ ROM_LOAD( "tsu_08.8l", 0x00000, 0x8000, CRC(9bf0b7a2) SHA1(1361335c3c2c8a9c6a7d99566048d8aac99e7c8f) ) /* VIDEORAM (text layer) tiles */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "tsu_07.5l", 0x00000, 0x8000, CRC(9469efa4) SHA1(53c70361e8d9e54825f61b87a10df42438aaf5b0) ) /* SCROLL2 Layer Tiles */
+ ROM_LOAD( "tsu_07.5l", 0x00000, 0x8000, CRC(9469efa4) SHA1(53c70361e8d9e54825f61b87a10df42438aaf5b0) ) /* SCROLL2 Layer Tiles */
ROM_LOAD( "tsu_06.4l", 0x08000, 0x8000, CRC(40bf0eb4) SHA1(fcb186c31747e2c9872de01e34b3e713dc74df82) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
+ ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
ROM_LOAD( "ts_11.15f", 0x08000, 0x8000, CRC(ab30237a) SHA1(ea6c07df992ba48f9eca7daa4ea775faa94358d2) )
ROM_LOAD( "ts_17.17g", 0x10000, 0x8000, CRC(deb657e4) SHA1(b36b468f9bbb7a4937286230d3f6caa14c61d4dd) )
ROM_LOAD( "ts_16.15g", 0x18000, 0x8000, CRC(d363b5f9) SHA1(1dd3991d99db2d6bcbdb12879ba50a01fef95004) )
@@ -426,7 +426,7 @@ ROM_START( bionicc ) /* "Not for use in Japan" */
ROM_LOAD( "ts_24.18k", 0x38000, 0x8000, CRC(f156e564) SHA1(a6cad05bcc6d9ded6294f9b5aa856d05641aed02) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "tse_10.13f", 0x00000, 0x8000, CRC(d28eeacc) SHA1(8b4a655a48da276b07f3464c65743b13cec52bcb) ) /* Sprites */
+ ROM_LOAD( "tse_10.13f", 0x00000, 0x8000, CRC(d28eeacc) SHA1(8b4a655a48da276b07f3464c65743b13cec52bcb) ) /* Sprites */
ROM_LOAD( "tsu_09.11f", 0x08000, 0x8000, CRC(6a049292) SHA1(525c862061f426d679b539b6926af4c9f14b47b5) )
ROM_LOAD( "tse_15.13g", 0x10000, 0x8000, CRC(9b5593c0) SHA1(73c0acbb01fe69c2bd29dea11b6a223c8efb54a0) )
ROM_LOAD( "tsu_14.11g", 0x18000, 0x8000, CRC(46b2ad83) SHA1(21ebd5691a544323fdfcf330b9a37bbe0428e3e3) )
@@ -436,7 +436,7 @@ ROM_START( bionicc ) /* "Not for use in Japan" */
ROM_LOAD( "tsu_21.15j", 0x38000, 0x8000, CRC(98777006) SHA1(bcc2058b639e9b71d16af05f63df298bcce91fdc) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
+ ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
ROM_END
ROM_START( bionicc1 ) /* "Not for use outside of USA or Canada" revision B */
@@ -449,18 +449,18 @@ ROM_START( bionicc1 ) /* "Not for use outside of USA or Canada" revision B */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "ts_01b.4e", 0x00000, 0x8000, CRC(a9a6cafa) SHA1(55e0a0e6ca11e8e73339d5b4604e130031211291) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
+ ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
ROM_LOAD( "c8751h-88", 0x0000, 0x1000, NO_DUMP )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "tsu_08.8l", 0x00000, 0x8000, CRC(9bf0b7a2) SHA1(1361335c3c2c8a9c6a7d99566048d8aac99e7c8f) ) /* VIDEORAM (text layer) tiles */
+ ROM_LOAD( "tsu_08.8l", 0x00000, 0x8000, CRC(9bf0b7a2) SHA1(1361335c3c2c8a9c6a7d99566048d8aac99e7c8f) ) /* VIDEORAM (text layer) tiles */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "tsu_07.5l", 0x00000, 0x8000, CRC(9469efa4) SHA1(53c70361e8d9e54825f61b87a10df42438aaf5b0) ) /* SCROLL2 Layer Tiles */
+ ROM_LOAD( "tsu_07.5l", 0x00000, 0x8000, CRC(9469efa4) SHA1(53c70361e8d9e54825f61b87a10df42438aaf5b0) ) /* SCROLL2 Layer Tiles */
ROM_LOAD( "tsu_06.4l", 0x08000, 0x8000, CRC(40bf0eb4) SHA1(fcb186c31747e2c9872de01e34b3e713dc74df82) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
+ ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
ROM_LOAD( "ts_11.15f", 0x08000, 0x8000, CRC(ab30237a) SHA1(ea6c07df992ba48f9eca7daa4ea775faa94358d2) )
ROM_LOAD( "ts_17.17g", 0x10000, 0x8000, CRC(deb657e4) SHA1(b36b468f9bbb7a4937286230d3f6caa14c61d4dd) )
ROM_LOAD( "ts_16.15g", 0x18000, 0x8000, CRC(d363b5f9) SHA1(1dd3991d99db2d6bcbdb12879ba50a01fef95004) )
@@ -470,7 +470,7 @@ ROM_START( bionicc1 ) /* "Not for use outside of USA or Canada" revision B */
ROM_LOAD( "ts_24.18k", 0x38000, 0x8000, CRC(f156e564) SHA1(a6cad05bcc6d9ded6294f9b5aa856d05641aed02) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "tsu_10.13f", 0x00000, 0x8000, CRC(f1180d02) SHA1(312626af48235a1f726ab596f296ef4739785ca0) ) /* Sprites */
+ ROM_LOAD( "tsu_10.13f", 0x00000, 0x8000, CRC(f1180d02) SHA1(312626af48235a1f726ab596f296ef4739785ca0) ) /* Sprites */
ROM_LOAD( "tsu_09.11f", 0x08000, 0x8000, CRC(6a049292) SHA1(525c862061f426d679b539b6926af4c9f14b47b5) )
ROM_LOAD( "tsu_15.13g", 0x10000, 0x8000, CRC(ea912701) SHA1(106336c63a1c8a0b13236268bc533a8263285cad) )
ROM_LOAD( "tsu_14.11g", 0x18000, 0x8000, CRC(46b2ad83) SHA1(21ebd5691a544323fdfcf330b9a37bbe0428e3e3) )
@@ -480,7 +480,7 @@ ROM_START( bionicc1 ) /* "Not for use outside of USA or Canada" revision B */
ROM_LOAD( "tsu_21.15j", 0x38000, 0x8000, CRC(98777006) SHA1(bcc2058b639e9b71d16af05f63df298bcce91fdc) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
+ ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
ROM_END
ROM_START( bionicc2 ) /* "Not for use outside of USA or Canada" 1st release */
@@ -493,18 +493,18 @@ ROM_START( bionicc2 ) /* "Not for use outside of USA or Canada" 1st release */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "ts_01b.4e", 0x00000, 0x8000, CRC(a9a6cafa) SHA1(55e0a0e6ca11e8e73339d5b4604e130031211291) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
+ ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
ROM_LOAD( "c8751h-88", 0x0000, 0x1000, NO_DUMP )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "tsu_08.8l", 0x00000, 0x8000, CRC(9bf0b7a2) SHA1(1361335c3c2c8a9c6a7d99566048d8aac99e7c8f) ) /* VIDEORAM (text layer) tiles */
+ ROM_LOAD( "tsu_08.8l", 0x00000, 0x8000, CRC(9bf0b7a2) SHA1(1361335c3c2c8a9c6a7d99566048d8aac99e7c8f) ) /* VIDEORAM (text layer) tiles */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "tsu_07.5l", 0x00000, 0x8000, CRC(9469efa4) SHA1(53c70361e8d9e54825f61b87a10df42438aaf5b0) ) /* SCROLL2 Layer Tiles */
+ ROM_LOAD( "tsu_07.5l", 0x00000, 0x8000, CRC(9469efa4) SHA1(53c70361e8d9e54825f61b87a10df42438aaf5b0) ) /* SCROLL2 Layer Tiles */
ROM_LOAD( "tsu_06.4l", 0x08000, 0x8000, CRC(40bf0eb4) SHA1(fcb186c31747e2c9872de01e34b3e713dc74df82) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
+ ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
ROM_LOAD( "ts_11.15f", 0x08000, 0x8000, CRC(ab30237a) SHA1(ea6c07df992ba48f9eca7daa4ea775faa94358d2) )
ROM_LOAD( "ts_17.17g", 0x10000, 0x8000, CRC(deb657e4) SHA1(b36b468f9bbb7a4937286230d3f6caa14c61d4dd) )
ROM_LOAD( "ts_16.15g", 0x18000, 0x8000, CRC(d363b5f9) SHA1(1dd3991d99db2d6bcbdb12879ba50a01fef95004) )
@@ -514,7 +514,7 @@ ROM_START( bionicc2 ) /* "Not for use outside of USA or Canada" 1st release */
ROM_LOAD( "ts_24.18k", 0x38000, 0x8000, CRC(f156e564) SHA1(a6cad05bcc6d9ded6294f9b5aa856d05641aed02) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "tsu_10.13f", 0x00000, 0x8000, CRC(f1180d02) SHA1(312626af48235a1f726ab596f296ef4739785ca0) ) /* Sprites */
+ ROM_LOAD( "tsu_10.13f", 0x00000, 0x8000, CRC(f1180d02) SHA1(312626af48235a1f726ab596f296ef4739785ca0) ) /* Sprites */
ROM_LOAD( "tsu_09.11f", 0x08000, 0x8000, CRC(6a049292) SHA1(525c862061f426d679b539b6926af4c9f14b47b5) )
ROM_LOAD( "tsu_15.13g", 0x10000, 0x8000, CRC(ea912701) SHA1(106336c63a1c8a0b13236268bc533a8263285cad) )
ROM_LOAD( "tsu_14.11g", 0x18000, 0x8000, CRC(46b2ad83) SHA1(21ebd5691a544323fdfcf330b9a37bbe0428e3e3) )
@@ -524,7 +524,7 @@ ROM_START( bionicc2 ) /* "Not for use outside of USA or Canada" 1st release */
ROM_LOAD( "tsu_21.15j", 0x38000, 0x8000, CRC(98777006) SHA1(bcc2058b639e9b71d16af05f63df298bcce91fdc) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
+ ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
ROM_END
ROM_START( topsecrt ) /* "Not for use in any other country but Japan" */
@@ -537,18 +537,18 @@ ROM_START( topsecrt ) /* "Not for use in any other country but Japan" */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "ts_01.4e", 0x00000, 0x8000, CRC(8ea07917) SHA1(e9ace70d89482fc3669860450a41aacacbee9083) )
- ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
+ ROM_REGION( 0x1000, "mcu", 0 ) /* i8751 microcontroller */
ROM_LOAD( "c8751h-88", 0x0000, 0x1000, NO_DUMP )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "ts_08.8l", 0x00000, 0x8000, CRC(96ad379e) SHA1(accd3a560b259c186bc28cdc004ed8de0b12f9d5) ) /* VIDEORAM (text layer) tiles */
+ ROM_LOAD( "ts_08.8l", 0x00000, 0x8000, CRC(96ad379e) SHA1(accd3a560b259c186bc28cdc004ed8de0b12f9d5) ) /* VIDEORAM (text layer) tiles */
ROM_REGION( 0x10000, "gfx2", 0 )
- ROM_LOAD( "ts_07.5l", 0x00000, 0x8000, CRC(25cdf8b2) SHA1(316f6acc46878682dabeab12722e6a64504d23bd) ) /* SCROLL2 Layer Tiles */
+ ROM_LOAD( "ts_07.5l", 0x00000, 0x8000, CRC(25cdf8b2) SHA1(316f6acc46878682dabeab12722e6a64504d23bd) ) /* SCROLL2 Layer Tiles */
ROM_LOAD( "ts_06.4l", 0x08000, 0x8000, CRC(314fb12d) SHA1(dab0519a49b64fe7a837b3c6383f6147e1ab6ffd) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
+ ROM_LOAD( "ts_12.17f", 0x00000, 0x8000, CRC(e4b4619e) SHA1(3bec8399ffb28fd50ce6ae88d90b091eadf8bda1) ) /* SCROLL1 Layer Tiles */
ROM_LOAD( "ts_11.15f", 0x08000, 0x8000, CRC(ab30237a) SHA1(ea6c07df992ba48f9eca7daa4ea775faa94358d2) )
ROM_LOAD( "ts_17.17g", 0x10000, 0x8000, CRC(deb657e4) SHA1(b36b468f9bbb7a4937286230d3f6caa14c61d4dd) )
ROM_LOAD( "ts_16.15g", 0x18000, 0x8000, CRC(d363b5f9) SHA1(1dd3991d99db2d6bcbdb12879ba50a01fef95004) )
@@ -558,7 +558,7 @@ ROM_START( topsecrt ) /* "Not for use in any other country but Japan" */
ROM_LOAD( "ts_24.18k", 0x38000, 0x8000, CRC(f156e564) SHA1(a6cad05bcc6d9ded6294f9b5aa856d05641aed02) )
ROM_REGION( 0x40000, "gfx4", 0 )
- ROM_LOAD( "ts_10.13f", 0x00000, 0x8000, CRC(c3587d05) SHA1(ad0898a5d4cf110783ef092bf8e65b6ef31a8ae0) ) /* Sprites */
+ ROM_LOAD( "ts_10.13f", 0x00000, 0x8000, CRC(c3587d05) SHA1(ad0898a5d4cf110783ef092bf8e65b6ef31a8ae0) ) /* Sprites */
ROM_LOAD( "ts_09.11f", 0x08000, 0x8000, CRC(6b63eef2) SHA1(5d1580db7f49c5994c2a08a36c2d05f3e246930d) )
ROM_LOAD( "ts_15.13g", 0x10000, 0x8000, CRC(db8cebb0) SHA1(1cc9eac14851cde95fb2d69d6f5ffb08bc9c0d93) )
ROM_LOAD( "ts_14.11g", 0x18000, 0x8000, CRC(e2e41abf) SHA1(d002d0d8fdbb9ec3e2eac218f6338f733953ca82) )
@@ -568,7 +568,7 @@ ROM_START( topsecrt ) /* "Not for use in any other country but Japan" */
ROM_LOAD( "ts_21.15j", 0x38000, 0x8000, CRC(27a9bb7c) SHA1(bb60332c0ecde4d7797960dec39c1079498175c3) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
+ ROM_LOAD( "63s141.18f", 0x0000, 0x0100, CRC(b58d0023) SHA1(e8a4a2e2951bf73b3d9eed6957e9ee1e61c9c58a) ) /* priority (not used), Labeled "TSB" */
ROM_END
diff --git a/src/mame/drivers/bishi.c b/src/mame/drivers/bishi.c
index aec2de9a446..75fe9b80a16 100644
--- a/src/mame/drivers/bishi.c
+++ b/src/mame/drivers/bishi.c
@@ -142,21 +142,21 @@ READ16_MEMBER(bishi_state::bishi_K056832_rom_r)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, bishi_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
- AM_RANGE(0x400000, 0x407fff) AM_RAM // Work RAM
+ AM_RANGE(0x400000, 0x407fff) AM_RAM // Work RAM
AM_RANGE(0x800000, 0x800001) AM_READWRITE(control_r, control_w)
AM_RANGE(0x800004, 0x800005) AM_READ_PORT("DSW")
AM_RANGE(0x800006, 0x800007) AM_READ_PORT("SYSTEM")
AM_RANGE(0x800008, 0x800009) AM_READ_PORT("INPUTS")
- AM_RANGE(0x810000, 0x810003) AM_WRITE(control2_w) // bank switch for K056832 character ROM test
- AM_RANGE(0x820000, 0x820001) AM_WRITENOP // lamps (see lamp test in service menu)
+ AM_RANGE(0x810000, 0x810003) AM_WRITE(control2_w) // bank switch for K056832 character ROM test
+ AM_RANGE(0x820000, 0x820001) AM_WRITENOP // lamps (see lamp test in service menu)
AM_RANGE(0x830000, 0x83003f) AM_DEVWRITE_LEGACY("k056832", k056832_word_w)
- AM_RANGE(0x840000, 0x840007) AM_DEVWRITE_LEGACY("k056832", k056832_b_word_w) // VSCCS
- AM_RANGE(0x850000, 0x85001f) AM_DEVWRITE_LEGACY("k054338", k054338_word_w) // CLTC
- AM_RANGE(0x870000, 0x8700ff) AM_DEVWRITE_LEGACY("k055555", k055555_word_w) // PCU2
+ AM_RANGE(0x840000, 0x840007) AM_DEVWRITE_LEGACY("k056832", k056832_b_word_w) // VSCCS
+ AM_RANGE(0x850000, 0x85001f) AM_DEVWRITE_LEGACY("k054338", k054338_word_w) // CLTC
+ AM_RANGE(0x870000, 0x8700ff) AM_DEVWRITE_LEGACY("k055555", k055555_word_w) // PCU2
AM_RANGE(0x880000, 0x880003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0xff00)
- AM_RANGE(0xa00000, 0xa01fff) AM_DEVREADWRITE_LEGACY("k056832", k056832_ram_word_r, k056832_ram_word_w) // Graphic planes
+ AM_RANGE(0xa00000, 0xa01fff) AM_DEVREADWRITE_LEGACY("k056832", k056832_ram_word_r, k056832_ram_word_w) // Graphic planes
AM_RANGE(0xb00000, 0xb03fff) AM_RAM_WRITE(paletteram_xbgr_word_be_w) AM_SHARE("paletteram")
- AM_RANGE(0xb04000, 0xb047ff) AM_READ(bishi_mirror_r) // bug in the ram/rom test?
+ AM_RANGE(0xb04000, 0xb047ff) AM_READ(bishi_mirror_r) // bug in the ram/rom test?
AM_RANGE(0xc00000, 0xc01fff) AM_READ(bishi_K056832_rom_r)
ADDRESS_MAP_END
diff --git a/src/mame/drivers/bking.c b/src/mame/drivers/bking.c
index 8451097c728..fb656b11b3c 100644
--- a/src/mame/drivers/bking.c
+++ b/src/mame/drivers/bking.c
@@ -213,11 +213,11 @@ static INPUT_PORTS_START( bking )
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* Continue 1 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) /* Continue 2 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* Continue 1 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) /* Continue 2 */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT )
- PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) /* Not Connected */
+ PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) /* Not Connected */
PORT_START("DSWA")
PORT_DIPNAME( 0x01, 0x00, "Holes Awarded" ) PORT_DIPLOCATION("SWA:1")
@@ -336,18 +336,18 @@ static const gfx_layout charlayout =
static const gfx_layout crowlayout =
{
- 16,32, /* 16*32 characters */
- 16, /* 16 characters */
- 2, /* 2 bits per pixel */
+ 16,32, /* 16*32 characters */
+ 16, /* 16 characters */
+ 2, /* 2 bits per pixel */
{ 0, 4 },
{ 3*32*8+3, 3*32*8+2, 3*32*8+1, 3*32*8+0,
- 2*32*8+3, 2*32*8+2, 2*32*8+1, 2*32*8+0,
- 32*8+3, 32*8+2, 32*8+1, 32*8+0,
- 3, 2, 1, 0 }, /* reverse layout */
+ 2*32*8+3, 2*32*8+2, 2*32*8+1, 2*32*8+0,
+ 32*8+3, 32*8+2, 32*8+1, 32*8+0,
+ 3, 2, 1, 0 }, /* reverse layout */
{ 31*8, 30*8, 29*8, 28*8, 27*8, 26*8, 25*8, 24*8,
- 23*8, 22*8, 21*8, 20*8, 19*8, 18*8, 17*8, 16*8,
- 15*8, 14*8, 13*8, 12*8, 11*8, 10*8, 9*8, 8*8,
- 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 },
+ 23*8, 22*8, 21*8, 20*8, 19*8, 18*8, 17*8, 16*8,
+ 15*8, 14*8, 13*8, 12*8, 11*8, 10*8, 9*8, 8*8,
+ 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 },
128*8 /* every sprite takes 128 consecutive bytes */
};
@@ -359,7 +359,7 @@ static const gfx_layout balllayout =
{ 0 },
{ 7, 6, 5, 4, 3, 2, 1, 0 }, /* pretty straightforward layout */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
16*8 /* every sprite takes 16 consecutive bytes */
};
@@ -465,12 +465,12 @@ MACHINE_RESET_MEMBER(bking_state,bking3)
static MACHINE_CONFIG_START( bking, bking_state )
/* basic machine hardware */
- MCFG_CPU_ADD("main_cpu", Z80, XTAL_12MHz/4) /* 3 MHz */
+ MCFG_CPU_ADD("main_cpu", Z80, XTAL_12MHz/4) /* 3 MHz */
MCFG_CPU_PROGRAM_MAP(bking_map)
MCFG_CPU_IO_MAP(bking_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bking_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_6MHz/2) /* 3 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_6MHz/2) /* 3 MHz */
MCFG_CPU_PROGRAM_MAP(bking_audio_map)
/* interrupts (from Jungle King hardware, might be wrong): */
/* - no interrupts synced with vblank */
@@ -588,10 +588,10 @@ ROM_START( bking2 )
ROM_LOAD( "09.13a", 0x5000, 0x1000, CRC(595e3dd4) SHA1(9dd3388ce704dd5473af034716cd8d48df3dc495) )
ROM_REGION( 0x0800, "gfx2", 0 )
- ROM_LOAD( "17", 0x0000, 0x0800, CRC(e5663f0b) SHA1(b0fed8c4cdff7b12bb220e51d5b7188933934a34) ) /* crow graphics */
+ ROM_LOAD( "17", 0x0000, 0x0800, CRC(e5663f0b) SHA1(b0fed8c4cdff7b12bb220e51d5b7188933934a34) ) /* crow graphics */
ROM_REGION( 0x0800, "gfx3", 0 )
- ROM_LOAD( "18", 0x0000, 0x0800, CRC(fc9cec31) SHA1(5ab1c9b3b15334c6ec06826005ecb66b34d8879a) ) /* ball 1 graphics. Only the first 128 bytes used */
+ ROM_LOAD( "18", 0x0000, 0x0800, CRC(fc9cec31) SHA1(5ab1c9b3b15334c6ec06826005ecb66b34d8879a) ) /* ball 1 graphics. Only the first 128 bytes used */
ROM_REGION( 0x0800, "gfx4", 0 )
ROM_LOAD( "19", 0x0000, 0x0800, CRC(fc9cec31) SHA1(5ab1c9b3b15334c6ec06826005ecb66b34d8879a) ) /* ball 2 graphics. Only the first 128 bytes used */
@@ -600,7 +600,7 @@ ROM_START( bking2 )
ROM_LOAD( "mb7051.2c", 0x0000, 0x0020, CRC(4cb5bd32) SHA1(8851bae033ba67516d5ff6888e5daef10c2116ee) ) /* collision detection */
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "82s141.2d", 0x0000, 0x0200, CRC(61b7a9ff) SHA1(4302de0c0dad2b871ad4719ad934beaee05a0c40) ) /* palette */
+ ROM_LOAD( "82s141.2d", 0x0000, 0x0200, CRC(61b7a9ff) SHA1(4302de0c0dad2b871ad4719ad934beaee05a0c40) ) /* palette */
ROM_REGION( 0x0600, "plds", 0 )
ROM_LOAD( "pal16l8.1", 0x0000, 0x0104, CRC(e75d19f5) SHA1(d51cbb247760312b8884bbd0478a321eee05034f) )
@@ -774,12 +774,12 @@ ROM_START( bking3 )
ROM_LOAD( "a24-10.4f", 0x6000, 0x1000, CRC(a86b3e62) SHA1(f97a13e31e622b5ac55c23458c65a49c2998196a) )
ROM_LOAD( "a24-11.2f", 0x7000, 0x1000, CRC(b39db430) SHA1(4f48a34f3aaa1e998a4a5656bc3f399d9e6633c4) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound ROMs */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound ROMs */
ROM_LOAD( "a24-18.4f", 0x0000, 0x1000, CRC(fa3bfa98) SHA1(733924e154e301a9d692d80b485afc4ab0e200c1) )
ROM_LOAD( "a24-19.4d", 0x1000, 0x1000, CRC(817f9c2a) SHA1(7365ecf2700e1fd13016408f5493f8d51aab5bbd) )
ROM_LOAD( "a24-20.4b", 0x2000, 0x1000, CRC(0e9e16d6) SHA1(43c69602a8d9c34c527ce54472db84168acc4ef4) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the microcontroller */
ROM_LOAD( "a24_22.ic17", 0x000000, 0x000800, CRC(27c497d5) SHA1(c6c72bbf0537da53148fa0a56d412ab46129d29c) ) //M68705P5S uC 3MHz xtal
ROM_REGION( 0x6000, "gfx1", 0 ) /* Tiles */
@@ -803,7 +803,7 @@ ROM_START( bking3 )
ROM_LOAD( "82s123.2c", 0x0000, 0x0020, CRC(4cb5bd32) SHA1(8851bae033ba67516d5ff6888e5daef10c2116ee) ) /* collision detection */
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "a24_03.2d", 0x0000, 0x0200, CRC(599a6cbe) SHA1(eed8592aaba7b2b6d06f26a2b8720a288f9ad90f) ) /* palette */
+ ROM_LOAD( "a24_03.2d", 0x0000, 0x0200, CRC(599a6cbe) SHA1(eed8592aaba7b2b6d06f26a2b8720a288f9ad90f) ) /* palette */
ROM_REGION( 0x1000, "user2", 0 )
ROM_LOAD( "a24-21.25", 0x0000, 0x1000, CRC(3106fcac) SHA1(08454adfb58e5df84140d86ed52fa4ef684df9f1) ) /* extra rom on the same SUB PCB where is the mcu */
diff --git a/src/mame/drivers/blackt96.c b/src/mame/drivers/blackt96.c
index 33eeaf1c9f0..74160b6a2e0 100644
--- a/src/mame/drivers/blackt96.c
+++ b/src/mame/drivers/blackt96.c
@@ -137,7 +137,7 @@ public:
DECLARE_WRITE16_MEMBER(bg_videoram6_w);
DECLARE_WRITE16_MEMBER(bg_videoram7_w);
- UINT16* m_spriteram[8];
+ UINT16* m_spriteram[8];
tilemap_t *m_bg_tilemap[8];
UINT8 m_txt_bank;
@@ -213,7 +213,7 @@ static void draw_strip(running_machine &machine, bitmap_ind16 &bitmap, const rec
base += page * 2;
/* ---- ---- ---x xxxx
- xxxx ---y yyyy yyyy */
+ xxxx ---y yyyy yyyy */
int xx= ((state->m_spriteram[0][base+0]&0x001f)<<4) | (state->m_spriteram[0][base+1]&0xf000)>>12;
int yy = ((state->m_spriteram[0][base+1]&0x1ff));
@@ -229,7 +229,7 @@ static void draw_strip(running_machine &machine, bitmap_ind16 &bitmap, const rec
for (int y=0;y<32;y++)
{
/* -Xtt tttt tttt tttt
- ---- ---- cccc cccc */
+ ---- ---- cccc cccc */
UINT16 tile = (base2[y*2+1]&0x3fff);
UINT16 flipx = (base2[y*2+1]&0x4000);
@@ -465,7 +465,7 @@ static INPUT_PORTS_START( blackt96 )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
#endif
- /* Dipswitch Port A */
+ /* Dipswitch Port A */
PORT_START("DSW1")
PORT_DIPNAME( 0x0300, 0x0000, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:!7,!8")
PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
@@ -483,14 +483,14 @@ static INPUT_PORTS_START( blackt96 )
PORT_DIPNAME( 0x2000, 0x2000, "Bonus Life Type" ) PORT_DIPLOCATION("SW1:!3")
PORT_DIPSETTING( 0x2000, "Every" )
PORT_DIPSETTING( 0x0000, "Second Only" )
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:!2") // ?
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:!2") // ?
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:!1")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- /* Dipswitch Port B */
+ /* Dipswitch Port B */
PORT_START("DSW2")
PORT_SERVICE( 0x0100, IP_ACTIVE_HIGH ) PORT_DIPLOCATION("SW2:!8")
PORT_DIPNAME( 0x0200, 0x0000, "Continue" ) PORT_DIPLOCATION("SW2:!7")
@@ -506,7 +506,7 @@ static INPUT_PORTS_START( blackt96 )
PORT_DIPSETTING( 0x1000, "Never Finish" )
PORT_DIPSETTING( 0x2000, "Demo Sound Off" )
PORT_DIPSETTING( 0x3000, "Stop Video" )
- PORT_DIPNAME( 0xc000, 0xc000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!1,!2") // 'Level'
+ PORT_DIPNAME( 0xc000, 0xc000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!1,!2") // 'Level'
PORT_DIPSETTING( 0x8000, "1" )
PORT_DIPSETTING( 0x0000, "2" )
PORT_DIPSETTING( 0x4000, "3" )
@@ -598,7 +598,7 @@ static MACHINE_CONFIG_START( blackt96, blackt96_state )
MCFG_CPU_PROGRAM_MAP(blackt96_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", blackt96_state, irq1_line_hold)
- MCFG_CPU_ADD("audiocpu", PIC16C57, 8000000) /* ? */
+ MCFG_CPU_ADD("audiocpu", PIC16C57, 8000000) /* ? */
MCFG_CPU_IO_MAP(sound_io_map)
MCFG_GFXDECODE(blackt96)
diff --git a/src/mame/drivers/bladestl.c b/src/mame/drivers/bladestl.c
index 88ab5fd5ee6..f02fe3ef63b 100644
--- a/src/mame/drivers/bladestl.c
+++ b/src/mame/drivers/bladestl.c
@@ -121,34 +121,34 @@ WRITE8_MEMBER(bladestl_state::bladestl_speech_ctrl_w)
*************************************/
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, bladestl_state )
- AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE_LEGACY("k007342", k007342_r, k007342_w) /* Color RAM + Video RAM */
- AM_RANGE(0x2000, 0x21ff) AM_DEVREADWRITE_LEGACY("k007420", k007420_r, k007420_w) /* Sprite RAM */
- AM_RANGE(0x2200, 0x23ff) AM_DEVREADWRITE_LEGACY("k007342", k007342_scroll_r, k007342_scroll_w) /* Scroll RAM */
- AM_RANGE(0x2400, 0x245f) AM_RAM AM_SHARE("paletteram") /* palette */
- AM_RANGE(0x2600, 0x2607) AM_DEVWRITE_LEGACY("k007342", k007342_vreg_w) /* Video Registers */
- AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("COINSW") /* DIPSW #3, coinsw, startsw */
- AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P1") /* 1P controls */
- AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P2") /* 2P controls */
- AM_RANGE(0x2e03, 0x2e03) AM_READ_PORT("DSW2") /* DISPW #2 */
- AM_RANGE(0x2e40, 0x2e40) AM_READ_PORT("DSW1") /* DIPSW #1 */
- AM_RANGE(0x2e80, 0x2e80) AM_WRITE(bladestl_sh_irqtrigger_w) /* cause interrupt on audio CPU */
- AM_RANGE(0x2ec0, 0x2ec0) AM_WRITE(watchdog_reset_w) /* watchdog reset */
- AM_RANGE(0x2f00, 0x2f03) AM_READ(trackball_r) /* Trackballs */
- AM_RANGE(0x2f40, 0x2f40) AM_WRITE(bladestl_bankswitch_w) /* bankswitch control */
- AM_RANGE(0x2f80, 0x2f9f) AM_DEVREADWRITE_LEGACY("k051733", k051733_r, k051733_w) /* Protection: 051733 */
- AM_RANGE(0x2fc0, 0x2fc0) AM_WRITENOP /* ??? */
- AM_RANGE(0x4000, 0x5fff) AM_RAM /* Work RAM */
- AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM */
+ AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE_LEGACY("k007342", k007342_r, k007342_w) /* Color RAM + Video RAM */
+ AM_RANGE(0x2000, 0x21ff) AM_DEVREADWRITE_LEGACY("k007420", k007420_r, k007420_w) /* Sprite RAM */
+ AM_RANGE(0x2200, 0x23ff) AM_DEVREADWRITE_LEGACY("k007342", k007342_scroll_r, k007342_scroll_w) /* Scroll RAM */
+ AM_RANGE(0x2400, 0x245f) AM_RAM AM_SHARE("paletteram") /* palette */
+ AM_RANGE(0x2600, 0x2607) AM_DEVWRITE_LEGACY("k007342", k007342_vreg_w) /* Video Registers */
+ AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("COINSW") /* DIPSW #3, coinsw, startsw */
+ AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P1") /* 1P controls */
+ AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P2") /* 2P controls */
+ AM_RANGE(0x2e03, 0x2e03) AM_READ_PORT("DSW2") /* DISPW #2 */
+ AM_RANGE(0x2e40, 0x2e40) AM_READ_PORT("DSW1") /* DIPSW #1 */
+ AM_RANGE(0x2e80, 0x2e80) AM_WRITE(bladestl_sh_irqtrigger_w) /* cause interrupt on audio CPU */
+ AM_RANGE(0x2ec0, 0x2ec0) AM_WRITE(watchdog_reset_w) /* watchdog reset */
+ AM_RANGE(0x2f00, 0x2f03) AM_READ(trackball_r) /* Trackballs */
+ AM_RANGE(0x2f40, 0x2f40) AM_WRITE(bladestl_bankswitch_w) /* bankswitch control */
+ AM_RANGE(0x2f80, 0x2f9f) AM_DEVREADWRITE_LEGACY("k051733", k051733_r, k051733_w) /* Protection: 051733 */
+ AM_RANGE(0x2fc0, 0x2fc0) AM_WRITENOP /* ??? */
+ AM_RANGE(0x4000, 0x5fff) AM_RAM /* Work RAM */
+ AM_RANGE(0x6000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM */
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, bladestl_state )
AM_RANGE(0x0000, 0x07ff) AM_RAM
- AM_RANGE(0x1000, 0x1001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) /* YM2203 */
- AM_RANGE(0x3000, 0x3000) AM_WRITE(bladestl_speech_ctrl_w) /* UPD7759 */
- AM_RANGE(0x4000, 0x4000) AM_READ(bladestl_speech_busy_r) /* UPD7759 */
- AM_RANGE(0x5000, 0x5000) AM_WRITENOP /* ??? */
- AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
+ AM_RANGE(0x1000, 0x1001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) /* YM2203 */
+ AM_RANGE(0x3000, 0x3000) AM_WRITE(bladestl_speech_ctrl_w) /* UPD7759 */
+ AM_RANGE(0x4000, 0x4000) AM_READ(bladestl_speech_busy_r) /* UPD7759 */
+ AM_RANGE(0x5000, 0x5000) AM_WRITENOP /* ??? */
+ AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END
@@ -166,20 +166,20 @@ static INPUT_PORTS_START( bladestl )
PORT_START("DSW2")
PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:1" )
PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:2" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x18, 0x18, "Bonus time set" ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
+ PORT_DIPNAME( 0x18, 0x18, "Bonus time set" ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x18, "30 secs" )
PORT_DIPSETTING( 0x10, "20 secs" )
PORT_DIPSETTING( 0x08, "15 secs" )
PORT_DIPSETTING( 0x00, "10 secs" )
- PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
- PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
+ PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -189,7 +189,7 @@ static INPUT_PORTS_START( bladestl )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW3:2" )
@@ -197,7 +197,7 @@ static INPUT_PORTS_START( bladestl )
PORT_START("P1")
KONAMI8_B123(1)
- PORT_DIPNAME( 0x80, 0x80, "Period time set" ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x80, 0x80, "Period time set" ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x80, "4" )
PORT_DIPSETTING( 0x00, "7" )
@@ -221,11 +221,11 @@ static INPUT_PORTS_START( bladestle )
PORT_INCLUDE( bladestl )
PORT_MODIFY("DSW2")
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
PORT_MODIFY("P1")
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW3:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW3:4" ) /* Listed as "Unused" */
PORT_MODIFY("TRACKBALL_P2_1")
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(63) PORT_PLAYER(2)
@@ -244,29 +244,29 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8 x 8 characters */
- 0x40000/32, /* 8192 characters */
- 4, /* 4bpp */
- { 0, 1, 2, 3 }, /* the four bitplanes are packed in one nibble */
+ 8,8, /* 8 x 8 characters */
+ 0x40000/32, /* 8192 characters */
+ 4, /* 4bpp */
+ { 0, 1, 2, 3 }, /* the four bitplanes are packed in one nibble */
{ 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
- 32*8 /* every character takes 32 consecutive bytes */
+ 32*8 /* every character takes 32 consecutive bytes */
};
static const gfx_layout spritelayout =
{
- 8,8, /* 8*8 sprites */
- 0x40000/32, /* 8192 sprites */
- 4, /* 4 bpp */
- { 0, 1, 2, 3 }, /* the four bitplanes are packed in one nibble */
+ 8,8, /* 8*8 sprites */
+ 0x40000/32, /* 8192 sprites */
+ 4, /* 4 bpp */
+ { 0, 1, 2, 3 }, /* the four bitplanes are packed in one nibble */
{ 0*4, 1*4, 2*4, 3*4, 4*4, 5*4, 6*4, 7*4 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static GFXDECODE_START( bladestl )
- GFXDECODE_ENTRY( "gfx1", 0x000000, charlayout, 0, 2 ) /* colors 00..31 */
- GFXDECODE_ENTRY( "gfx1", 0x040000, spritelayout, 32, 16 ) /* colors 32..47 but using lookup table */
+ GFXDECODE_ENTRY( "gfx1", 0x000000, charlayout, 0, 2 ) /* colors 00..31 */
+ GFXDECODE_ENTRY( "gfx1", 0x040000, spritelayout, 32, 16 ) /* colors 32..47 but using lookup table */
GFXDECODE_END
@@ -291,12 +291,12 @@ static const ym2203_interface ym2203_config =
static const k007342_interface bladestl_k007342_intf =
{
- 0, bladestl_tile_callback /* gfx_num (for tile creation), callback */
+ 0, bladestl_tile_callback /* gfx_num (for tile creation), callback */
};
static const k007420_interface bladestl_k007420_intf =
{
- 0x3ff, bladestl_sprite_callback /* banklimit, callback */
+ 0x3ff, bladestl_sprite_callback /* banklimit, callback */
};
@@ -330,7 +330,7 @@ void bladestl_state::machine_reset()
static MACHINE_CONFIG_START( bladestl, bladestl_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", HD6309, 24000000/2) /* 24MHz/2 (?) */
+ MCFG_CPU_ADD("maincpu", HD6309, 24000000/2) /* 24MHz/2 (?) */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", bladestl_state, bladestl_scanline, "screen", 0, 1)
@@ -357,7 +357,7 @@ static MACHINE_CONFIG_START( bladestl, bladestl_state )
/* sound hardware */
/* the initialization order is important, the port callbacks being
- called at initialization time */
+ called at initialization time */
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("upd", UPD7759, UPD7759_STANDARD_CLOCK)
@@ -377,15 +377,15 @@ MACHINE_CONFIG_END
ROM_START( bladestl )
ROM_REGION( 0x18000, "maincpu", 0 ) /* code + banked roms */
- ROM_LOAD( "797-t01.19c", 0x10000, 0x08000, CRC(89d7185d) SHA1(0d2f346d9515cab0389106c0e227fb0bd84a2c9c) ) /* fixed ROM */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* banked ROM */
+ ROM_LOAD( "797-t01.19c", 0x10000, 0x08000, CRC(89d7185d) SHA1(0d2f346d9515cab0389106c0e227fb0bd84a2c9c) ) /* fixed ROM */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* banked ROM */
ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the sound CPU */
ROM_LOAD( "797-c02.12d", 0x08000, 0x08000, CRC(65a331ea) SHA1(f206f6c5f0474542a5b7686b2f4d2cc7077dd5b9) )
ROM_REGION( 0x080000, "gfx1", 0 )
- ROM_LOAD( "797a05.19h", 0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) ) /* tiles */
- ROM_LOAD( "797a06.13h", 0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) ) /* sprites */
+ ROM_LOAD( "797a05.19h", 0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) ) /* tiles */
+ ROM_LOAD( "797a06.13h", 0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) ) /* sprites */
ROM_REGION( 0x0100, "proms", 0 )
ROM_LOAD( "797a07.16i", 0x0000, 0x0100, CRC(7aecad4e) SHA1(05150a8dd25bdd6ab0c5b350e6ffd272f040e46a) ) /* sprites lookup table, 63S141N BPROM */
@@ -397,15 +397,15 @@ ROM_END
ROM_START( bladestll )
ROM_REGION( 0x18000, "maincpu", 0 ) /* code + banked roms */
- ROM_LOAD( "797-l01.19c", 0x10000, 0x08000, CRC(1ab14c40) SHA1(c566e31a666b467d75f5fc9fa427986c3ebc705c) ) /* fixed ROM */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* banked ROM */
+ ROM_LOAD( "797-l01.19c", 0x10000, 0x08000, CRC(1ab14c40) SHA1(c566e31a666b467d75f5fc9fa427986c3ebc705c) ) /* fixed ROM */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* banked ROM */
ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the sound CPU */
ROM_LOAD( "797-c02.12d", 0x08000, 0x08000, CRC(65a331ea) SHA1(f206f6c5f0474542a5b7686b2f4d2cc7077dd5b9) )
ROM_REGION( 0x080000, "gfx1", 0 )
- ROM_LOAD( "797a05.19h", 0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) ) /* tiles */
- ROM_LOAD( "797a06.13h", 0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) ) /* sprites */
+ ROM_LOAD( "797a05.19h", 0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) ) /* tiles */
+ ROM_LOAD( "797a06.13h", 0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) ) /* sprites */
ROM_REGION( 0x0100, "proms", 0 )
ROM_LOAD( "797a07.16i", 0x0000, 0x0100, CRC(7aecad4e) SHA1(05150a8dd25bdd6ab0c5b350e6ffd272f040e46a) ) /* sprites lookup table, 63S141N BPROM */
@@ -417,15 +417,15 @@ ROM_END
ROM_START( bladestle )
ROM_REGION( 0x18000, "maincpu", 0 ) /* code + banked roms */
- ROM_LOAD( "797-e01.19c", 0x10000, 0x08000, CRC(f8472e95) SHA1(8b6caa905fb1642300dd9da508871b00429872c3) ) /* fixed ROM */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* banked ROM */
+ ROM_LOAD( "797-e01.19c", 0x10000, 0x08000, CRC(f8472e95) SHA1(8b6caa905fb1642300dd9da508871b00429872c3) ) /* fixed ROM */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* banked ROM */
ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the sound CPU */
ROM_LOAD( "797-c02.12d", 0x08000, 0x08000, CRC(65a331ea) SHA1(f206f6c5f0474542a5b7686b2f4d2cc7077dd5b9) )
ROM_REGION( 0x080000, "gfx1", 0 )
- ROM_LOAD( "797a05.19h", 0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) ) /* tiles */
- ROM_LOAD( "797a06.13h", 0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) ) /* sprites */
+ ROM_LOAD( "797a05.19h", 0x000000, 0x40000, CRC(5491ba28) SHA1(c807774827c55c211ab68f548e1e835289cc5744) ) /* tiles */
+ ROM_LOAD( "797a06.13h", 0x040000, 0x40000, CRC(d055f5cc) SHA1(3723b39b2a3e6dd8e7fc66bbfe1eef9f80818774) ) /* sprites */
ROM_REGION( 0x0100, "proms", 0 )
ROM_LOAD( "797a07.16i", 0x0000, 0x0100, CRC(7aecad4e) SHA1(05150a8dd25bdd6ab0c5b350e6ffd272f040e46a) ) /* sprites lookup table, 63S141N BPROM */
diff --git a/src/mame/drivers/blitz.c b/src/mame/drivers/blitz.c
index 869b26c9d65..defbe2dd4e0 100644
--- a/src/mame/drivers/blitz.c
+++ b/src/mame/drivers/blitz.c
@@ -281,8 +281,8 @@
*******************************************************************************/
-#define MASTER_CLOCK XTAL_10MHz
-#define CPU_CLOCK (MASTER_CLOCK/16)
+#define MASTER_CLOCK XTAL_10MHz
+#define CPU_CLOCK (MASTER_CLOCK/16)
#include "emu.h"
#include "cpu/m6502/m6502.h"
@@ -348,8 +348,8 @@ TILE_GET_INFO_MEMBER(blitz_state::get_bg_tile_info)
int attr = m_colorram[tile_index];
int code = ((attr & 1) << 8) | m_videoram[tile_index];
- int bank = (attr & 0x02) >> 1; /* bit 1 switch the gfx banks */
- int color = (attr & 0x3c) >> 2; /* bits 2-3-4-5 for color */
+ int bank = (attr & 0x02) >> 1; /* bit 1 switch the gfx banks */
+ int color = (attr & 0x3c) >> 2; /* bits 2-3-4-5 for color */
SET_TILE_INFO_MEMBER(bank, code, color, 0);
}
@@ -393,8 +393,8 @@ void blitz_state::palette_init()
int bit0, bit1, bit2, bit3, r, g, b, bk;
/* blue killer (from schematics) */
- bit3 = (color_prom[i] >> 3) & 0x01;
- bk = bit3;
+ bit3 = (color_prom[i] >> 3) & 0x01;
+ bk = bit3;
/* red component */
bit0 = (color_prom[i] >> 0) & 0x01;
@@ -424,7 +424,7 @@ void blitz_state::palette_init()
*/
READ8_MEMBER(blitz_state::megadpkr_mux_port_r)
{
- switch( m_mux_data & 0xf0 ) /* bits 4-7 */
+ switch( m_mux_data & 0xf0 ) /* bits 4-7 */
{
case 0x10: return ioport("IN0-0")->read();
case 0x20: return ioport("IN0-1")->read();
@@ -437,7 +437,7 @@ READ8_MEMBER(blitz_state::megadpkr_mux_port_r)
WRITE8_MEMBER(blitz_state::mux_w)
{
- m_mux_data = data ^ 0xff; /* inverted */
+ m_mux_data = data ^ 0xff; /* inverted */
}
@@ -703,34 +703,34 @@ GFXDECODE_END
static const pia6821_interface megadpkr_pia0_intf =
{
- DEVCB_DRIVER_MEMBER(blitz_state,megadpkr_mux_port_r), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_DRIVER_MEMBER(blitz_state,lamps_a_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_DRIVER_MEMBER(blitz_state,megadpkr_mux_port_r), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_DRIVER_MEMBER(blitz_state,lamps_a_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
static const pia6821_interface megadpkr_pia1_intf =
{
- DEVCB_INPUT_PORT("SW1"), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DRIVER_MEMBER(blitz_state,sound_w), /* port A out */
- DEVCB_DRIVER_MEMBER(blitz_state,mux_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_INPUT_PORT("SW1"), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DRIVER_MEMBER(blitz_state,sound_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(blitz_state,mux_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
@@ -740,16 +740,16 @@ static const pia6821_interface megadpkr_pia1_intf =
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
@@ -834,27 +834,27 @@ MACHINE_CONFIG_END
******************************************/
ROM_START( megadpkr )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* program ROM */
- ROM_LOAD( "mega-2.u2", 0x8000, 0x8000, CRC(2b133b92) SHA1(97bc21c42897cfd13c0247e239aebb18f73cde91) )
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* program ROM */
+ ROM_LOAD( "mega-2.u2", 0x8000, 0x8000, CRC(2b133b92) SHA1(97bc21c42897cfd13c0247e239aebb18f73cde91) )
/* sharing the same space, but not totally understood... banked through MCU? */
ROM_REGION( 0x10000, "cpubank", 0 )
- ROM_LOAD( "mega-3.u3", 0x8000, 0x8000, CRC(ff0a46c6) SHA1(df053c323c0e2dd0e41e22286d38e889bfda3aa5) )
+ ROM_LOAD( "mega-3.u3", 0x8000, 0x8000, CRC(ff0a46c6) SHA1(df053c323c0e2dd0e41e22286d38e889bfda3aa5) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the undumped 68705 microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the undumped 68705 microcontroller */
ROM_LOAD( "mega-1.u1", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x3000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the R-G bitplanes */
- ROM_LOAD( "car1.5a", 0x2000, 0x1000, CRC(29e244d2) SHA1(c309a5ee6922bf2752d218c134edb3ef5f808afa) ) /* text chars / cards deck gfx, bitplane3 */
+ ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the R-G bitplanes */
+ ROM_LOAD( "car1.5a", 0x2000, 0x1000, CRC(29e244d2) SHA1(c309a5ee6922bf2752d218c134edb3ef5f808afa) ) /* text chars / cards deck gfx, bitplane3 */
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "car3.2a", 0x0000, 0x1000, CRC(819c06c4) SHA1(45b874554fb487173acf12daa4ff99e49e335362) ) /* cards deck gfx, bitplane1 */
- ROM_LOAD( "car2.4a", 0x1000, 0x1000, CRC(41eec680) SHA1(3723f66e1def3908f2e6ba2989def229d9846b02) ) /* cards deck gfx, bitplane2 */
- ROM_COPY( "gfx1", 0x2800, 0x2000, 0x0800 ) /* cards deck gfx, bitplane3. found in the 2nd quarter of the chars rom */
+ ROM_LOAD( "car3.2a", 0x0000, 0x1000, CRC(819c06c4) SHA1(45b874554fb487173acf12daa4ff99e49e335362) ) /* cards deck gfx, bitplane1 */
+ ROM_LOAD( "car2.4a", 0x1000, 0x1000, CRC(41eec680) SHA1(3723f66e1def3908f2e6ba2989def229d9846b02) ) /* cards deck gfx, bitplane2 */
+ ROM_COPY( "gfx1", 0x2800, 0x2000, 0x0800 ) /* cards deck gfx, bitplane3. found in the 2nd quarter of the chars rom */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "m3-7611-5.7d", 0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) )
+ ROM_LOAD( "m3-7611-5.7d", 0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) )
ROM_END
/*
@@ -887,27 +887,27 @@ note : MC68705P5S is protected
*/
ROM_START( megadpkrb )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* program ROM */
- ROM_LOAD( "u2.bin", 0x8000, 0x8000, CRC(0efdf472) SHA1(4b1ae10427c2ae8d7cbbe525a6b30973372d4420) )
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* program ROM */
+ ROM_LOAD( "u2.bin", 0x8000, 0x8000, CRC(0efdf472) SHA1(4b1ae10427c2ae8d7cbbe525a6b30973372d4420) )
/* sharing the same space, but not totally understood... banked through MCU? */
ROM_REGION( 0x10000, "cpubank", 0 )
- ROM_LOAD( "u3.bin", 0x8000, 0x8000, CRC(c973e345) SHA1(aae9da8cbaf0cf07086e5acacf9052e49fbdd896) )
+ ROM_LOAD( "u3.bin", 0x8000, 0x8000, CRC(c973e345) SHA1(aae9da8cbaf0cf07086e5acacf9052e49fbdd896) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the undumped 68705 microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the undumped 68705 microcontroller */
ROM_LOAD( "u11.bin", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x3000, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the R-G bitplanes */
- ROM_LOAD( "car1_5a.bin", 0x2000, 0x1000, CRC(29e244d2) SHA1(c309a5ee6922bf2752d218c134edb3ef5f808afa) ) /* text chars / cards deck gfx, bitplane3 */
+ ROM_FILL( 0x0000, 0x2000, 0 ) /* filling the R-G bitplanes */
+ ROM_LOAD( "car1_5a.bin", 0x2000, 0x1000, CRC(29e244d2) SHA1(c309a5ee6922bf2752d218c134edb3ef5f808afa) ) /* text chars / cards deck gfx, bitplane3 */
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "car3_2a.bin", 0x0000, 0x1000, CRC(819c06c4) SHA1(45b874554fb487173acf12daa4ff99e49e335362) ) /* cards deck gfx, bitplane1 */
- ROM_LOAD( "car2_4a.bin", 0x1000, 0x1000, CRC(41eec680) SHA1(3723f66e1def3908f2e6ba2989def229d9846b02) ) /* cards deck gfx, bitplane2 */
- ROM_COPY( "gfx1", 0x2800, 0x2000, 0x0800 ) /* cards deck gfx, bitplane3. found in the 2nd quarter of the chars rom */
+ ROM_LOAD( "car3_2a.bin", 0x0000, 0x1000, CRC(819c06c4) SHA1(45b874554fb487173acf12daa4ff99e49e335362) ) /* cards deck gfx, bitplane1 */
+ ROM_LOAD( "car2_4a.bin", 0x1000, 0x1000, CRC(41eec680) SHA1(3723f66e1def3908f2e6ba2989def229d9846b02) ) /* cards deck gfx, bitplane2 */
+ ROM_COPY( "gfx1", 0x2800, 0x2000, 0x0800 ) /* cards deck gfx, bitplane3. found in the 2nd quarter of the chars rom */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "m3-7611-5.7d", 0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) )
+ ROM_LOAD( "m3-7611-5.7d", 0x0000, 0x0100, CRC(7f31066b) SHA1(15420780ec6b2870fc4539ec3afe4f0c58eedf12) )
ROM_END
diff --git a/src/mame/drivers/blitz68k.c b/src/mame/drivers/blitz68k.c
index 158314afdcd..35da4976f5e 100644
--- a/src/mame/drivers/blitz68k.c
+++ b/src/mame/drivers/blitz68k.c
@@ -55,20 +55,20 @@ class blitz68k_state : public driver_device
public:
blitz68k_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_nvram(*this, "nvram"),
- m_frame_buffer(*this, "frame_buffer"),
- m_blit_romaddr(*this, "blit_romaddr"),
- m_blit_attr1_ram(*this, "blit_attr1_ram"),
- m_blit_dst_ram_loword(*this, "blitram_loword"),
- m_blit_attr2_ram(*this, "blit_attr2_ram"),
- m_blit_dst_ram_hiword(*this, "blitram_hiword"),
- m_blit_vregs(*this, "blit_vregs"),
- m_blit_transpen(*this, "blit_transpen"),
- m_leds0(*this, "leds0"),
- m_leds1(*this, "leds1"),
- m_leds2(*this, "leds2") { }
-
- optional_shared_ptr<UINT16> m_nvram;
+ m_nvram(*this, "nvram"),
+ m_frame_buffer(*this, "frame_buffer"),
+ m_blit_romaddr(*this, "blit_romaddr"),
+ m_blit_attr1_ram(*this, "blit_attr1_ram"),
+ m_blit_dst_ram_loword(*this, "blitram_loword"),
+ m_blit_attr2_ram(*this, "blit_attr2_ram"),
+ m_blit_dst_ram_hiword(*this, "blitram_hiword"),
+ m_blit_vregs(*this, "blit_vregs"),
+ m_blit_transpen(*this, "blit_transpen"),
+ m_leds0(*this, "leds0"),
+ m_leds1(*this, "leds1"),
+ m_leds2(*this, "leds2") { }
+
+ optional_shared_ptr<UINT16> m_nvram;
UINT8 *m_blit_buffer;
optional_shared_ptr<UINT16> m_frame_buffer;
optional_shared_ptr<UINT16> m_blit_romaddr;
@@ -279,7 +279,7 @@ WRITE16_MEMBER(blitz68k_state::blit_copy_w)
logerror("blit copy %04x %04x %04x %04x %04x\n", m_blit_romaddr[0], m_blit_attr1_ram[0], m_blit_dst_ram_loword[0], m_blit_attr2_ram[0], m_blit_dst_ram_hiword[0] );
logerror("blit vregs %04x %04x %04x %04x\n",m_blit_vregs[0/2],m_blit_vregs[2/2],m_blit_vregs[4/2],m_blit_vregs[6/2]);
logerror("blit transpen %04x %04x %04x %04x %04x %04x %04x %04x\n",m_blit_transpen[0/2],m_blit_transpen[2/2],m_blit_transpen[4/2],m_blit_transpen[6/2],
- m_blit_transpen[8/2],m_blit_transpen[10/2],m_blit_transpen[12/2],m_blit_transpen[14/2]);
+ m_blit_transpen[8/2],m_blit_transpen[10/2],m_blit_transpen[12/2],m_blit_transpen[14/2]);
blit_dst_xpos = (m_blit_dst_ram_loword[0] & 0x00ff)*2;
blit_dst_ypos = ((m_blit_dst_ram_loword[0] & 0xff00)>>8);
@@ -332,7 +332,7 @@ WRITE16_MEMBER(blitz68k_state::blit_copy_w)
READ8_MEMBER(blitz68k_state::blit_status_r)
{
- return 0; // bit 0 = blitter busy
+ return 0; // bit 0 = blitter busy
}
WRITE8_MEMBER(blitz68k_state::blit_x_w)
@@ -449,10 +449,10 @@ WRITE8_MEMBER(blitz68k_state::blit_flags_w)
{
switch(offset)
{
- case 0: blit_flipx_w(space, offset, data); break;
- case 1: blit_flipy_w(space, offset, data); break;
- case 2: blit_solid_w(space, offset, data); break;
- case 3: blit_trans_w(space, offset, data); break;
+ case 0: blit_flipx_w(space, offset, data); break;
+ case 1: blit_flipy_w(space, offset, data); break;
+ case 2: blit_solid_w(space, offset, data); break;
+ case 3: blit_trans_w(space, offset, data); break;
}
}
@@ -469,7 +469,7 @@ WRITE8_MEMBER(blitz68k_state::blit_draw_w)
blit.x, blit.y, blit.w, blit.h,
blit.addr[2], blit.addr[1], blit.addr[0],
blit.pen[0], blit.pen[1], blit.pen[2], blit.pen[3],
- blit.flag[0], blit.flag[1], blit.flipx, blit.flipy, blit.solid, blit.trans, blit.flag[6], blit.flag[7]
+ blit.flag[0], blit.flag[1], blit.flipx, blit.flipy, blit.solid, blit.trans, blit.flag[6], blit.flag[7]
);
x_size = (blit.w + 1) * 2;
@@ -528,14 +528,14 @@ WRITE8_MEMBER(blitz68k_state::blit_hwyxa_draw_w)
{
switch (offset)
{
- case 0: blit_h_w (space, offset, data); break;
- case 1: blit_w_w (space, offset, data); break;
- case 2: blit_y_w (space, offset, data); break;
- case 3: blit_x_w (space, offset, data); break;
- case 4: blit_addr2_w (space, offset, data); break;
- case 5: blit_addr1_w (space, offset, data); break;
- case 6: blit_addr0_w (space, offset, data); break;
- case 7: blit_draw_w (space, offset, data); break;
+ case 0: blit_h_w (space, offset, data); break;
+ case 1: blit_w_w (space, offset, data); break;
+ case 2: blit_y_w (space, offset, data); break;
+ case 3: blit_x_w (space, offset, data); break;
+ case 4: blit_addr2_w (space, offset, data); break;
+ case 5: blit_addr1_w (space, offset, data); break;
+ case 6: blit_addr0_w (space, offset, data); break;
+ case 7: blit_draw_w (space, offset, data); break;
}
}
@@ -589,7 +589,7 @@ WRITE16_MEMBER(blitz68k_state::irq_callback_w)
WRITE16_MEMBER(blitz68k_state::sound_write_w)
{
popmessage("%02x",data);
- dac_data_w(0, data & 0x0f); /* Sound DAC? */
+ dac_data_w(0, data & 0x0f); /* Sound DAC? */
}
#endif
@@ -660,25 +660,25 @@ ADDRESS_MAP_END
// MCU simulation (to be done)
READ8_MEMBER(blitz68k_state::bankrob_mcu1_r)
{
- UINT8 ret = 0; // machine().rand() gives "interesting" results
+ UINT8 ret = 0; // machine().rand() gives "interesting" results
logerror("%s: mcu1 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::bankrob_mcu2_r)
{
- UINT8 ret = 0; // machine().rand() gives "interesting" results
+ UINT8 ret = 0; // machine().rand() gives "interesting" results
logerror("%s: mcu2 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::bankrob_mcu_status_read_r)
{
- return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
+ return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
}
READ8_MEMBER(blitz68k_state::bankrob_mcu_status_write_r)
{
- return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
+ return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
}
WRITE8_MEMBER(blitz68k_state::bankrob_mcu1_w)
@@ -716,7 +716,7 @@ static ADDRESS_MAP_START( bankrob_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x280000, 0x280001) AM_READ(blitter_status_r)
- AM_RANGE(0x2c0000, 0x2c0001) AM_WRITENOP // 1->0
+ AM_RANGE(0x2c0000, 0x2c0001) AM_WRITENOP // 1->0
AM_RANGE(0x2e0000, 0x2e0001) AM_WRITE8(blit_flag0_w, 0xff00)
AM_RANGE(0x2e0002, 0x2e0003) AM_WRITE8(blit_flag1_w, 0xff00)
@@ -737,7 +737,7 @@ static ADDRESS_MAP_START( bankrob_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x400004, 0x400005) AM_READWRITE8(bankrob_mcu1_r, bankrob_mcu1_w, 0x00ff)
AM_RANGE(0x400006, 0x400007) AM_READWRITE8(bankrob_mcu2_r, bankrob_mcu2_w, 0xff00)
- AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE8("crtc", mc6845_device, status_r, address_w, 0xff00) // triggered by MCU?
+ AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE8("crtc", mc6845_device, status_r, address_w, 0xff00) // triggered by MCU?
AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8("crtc", mc6845_device, register_r, register_w, 0xff00)
ADDRESS_MAP_END
@@ -746,24 +746,24 @@ ADDRESS_MAP_END
// MCU simulation (to be done)
READ8_MEMBER(blitz68k_state::bankroba_mcu1_r)
{
- UINT8 ret = machine().rand(); // machine().rand() gives "interesting" results
+ UINT8 ret = machine().rand(); // machine().rand() gives "interesting" results
logerror("%s: mcu1 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::bankroba_mcu2_r)
{
- UINT8 ret = machine().rand(); // machine().rand() gives "interesting" results
+ UINT8 ret = machine().rand(); // machine().rand() gives "interesting" results
logerror("%s: mcu2 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::bankroba_mcu1_status_write_r)
{
- return 0x00; // bit 0 = MCU1. Active low.
+ return 0x00; // bit 0 = MCU1. Active low.
}
READ8_MEMBER(blitz68k_state::bankroba_mcu2_status_write_r)
{
- return 0x01; // bit 0 = MCU2. Active high.
+ return 0x01; // bit 0 = MCU2. Active high.
}
WRITE8_MEMBER(blitz68k_state::bankroba_mcu1_w)
@@ -779,10 +779,10 @@ static ADDRESS_MAP_START( bankroba_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM
AM_RANGE(0x200000, 0x20ffff) AM_RAM
- AM_RANGE(0x800000, 0x800001) AM_READ8(bankroba_mcu1_r, 0x00ff) // lev 4
+ AM_RANGE(0x800000, 0x800001) AM_READ8(bankroba_mcu1_r, 0x00ff) // lev 4
AM_RANGE(0x840000, 0x840001) AM_WRITE8(bankroba_mcu1_w, 0x00ff)
- AM_RANGE(0x880000, 0x880001) AM_READ8(bankroba_mcu2_r, 0x00ff) // lev 3
+ AM_RANGE(0x880000, 0x880001) AM_READ8(bankroba_mcu2_r, 0x00ff) // lev 3
AM_RANGE(0x8c0000, 0x8c0001) AM_WRITE8(bankroba_mcu2_w, 0x00ff)
AM_RANGE(0x900000, 0x900001) AM_DEVWRITE8("ramdac",ramdac_device, index_w, 0xff00 )
@@ -837,14 +837,14 @@ WRITE16_MEMBER(blitz68k_state::cjffruit_leds1_w)
data = COMBINE_DATA(m_leds0);
if (ACCESSING_BITS_8_15)
{
- coin_counter_w(machine(), 0, data & 0x0100); // coin in
- set_led_status(machine(), 0, data & 0x0200); // win???
+ coin_counter_w(machine(), 0, data & 0x0100); // coin in
+ set_led_status(machine(), 0, data & 0x0200); // win???
// 1 data & 0x0400 // win???
- set_led_status(machine(), 2, data & 0x0800); // small
- set_led_status(machine(), 3, data & 0x1000); // big
- set_led_status(machine(), 4, data & 0x2000); // take
- set_led_status(machine(), 5, data & 0x4000); // double up
- set_led_status(machine(), 6, data & 0x8000); // cancel
+ set_led_status(machine(), 2, data & 0x0800); // small
+ set_led_status(machine(), 3, data & 0x1000); // big
+ set_led_status(machine(), 4, data & 0x2000); // take
+ set_led_status(machine(), 5, data & 0x4000); // double up
+ set_led_status(machine(), 6, data & 0x8000); // cancel
show_leds123();
}
}
@@ -854,14 +854,14 @@ WRITE16_MEMBER(blitz68k_state::cjffruit_leds2_w)
data = COMBINE_DATA(m_leds1);
if (ACCESSING_BITS_8_15)
{
- set_led_status(machine(), 7, data & 0x0100); // start
- set_led_status(machine(), 8, data & 0x0200); // bet
- set_led_status(machine(), 9, data & 0x0400); // hold 5
- set_led_status(machine(), 10, data & 0x0800); // hold 4
- set_led_status(machine(), 11, data & 0x1000); // hold 3
- set_led_status(machine(), 12, data & 0x2000); // hold 2
- set_led_status(machine(), 13, data & 0x4000); // collect
- set_led_status(machine(), 14, data & 0x8000); // call attendant
+ set_led_status(machine(), 7, data & 0x0100); // start
+ set_led_status(machine(), 8, data & 0x0200); // bet
+ set_led_status(machine(), 9, data & 0x0400); // hold 5
+ set_led_status(machine(), 10, data & 0x0800); // hold 4
+ set_led_status(machine(), 11, data & 0x1000); // hold 3
+ set_led_status(machine(), 12, data & 0x2000); // hold 2
+ set_led_status(machine(), 13, data & 0x4000); // collect
+ set_led_status(machine(), 14, data & 0x8000); // call attendant
show_leds123();
}
}
@@ -871,8 +871,8 @@ WRITE16_MEMBER(blitz68k_state::cjffruit_leds3_w)
data = COMBINE_DATA(m_leds2);
if (ACCESSING_BITS_8_15)
{
- set_led_status(machine(), 15, data & 0x0100); // hopper coins?
- set_led_status(machine(), 16, data & 0x0400); // coin out?
+ set_led_status(machine(), 15, data & 0x0100); // hopper coins?
+ set_led_status(machine(), 16, data & 0x0400); // coin out?
show_leds123();
}
}
@@ -908,7 +908,7 @@ WRITE16_MEMBER(blitz68k_state::crtc_lpen_w)
// MCU simulation (to be done)
READ16_MEMBER(blitz68k_state::cjffruit_mcu_r)
{
- UINT8 ret = 0x00; // machine().rand() gives "interesting" results
+ UINT8 ret = 0x00; // machine().rand() gives "interesting" results
logerror("%s: mcu reads %02x\n", machine().describe_context(), ret);
return ret << 8;
}
@@ -948,9 +948,9 @@ static ADDRESS_MAP_START( cjffruit_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x8fa000, 0x8fa001) AM_WRITE(cjffruit_leds2_w) AM_SHARE("leds1")
AM_RANGE(0x8fc000, 0x8fc001) AM_WRITE(cjffruit_leds3_w) AM_SHARE("leds2")
- AM_RANGE(0x8fe000, 0x8fe003) AM_WRITE8(blit_flags_w, 0xffff) // flipx,y,solid,trans
+ AM_RANGE(0x8fe000, 0x8fe003) AM_WRITE8(blit_flags_w, 0xffff) // flipx,y,solid,trans
AM_RANGE(0x8fe004, 0x8fe005) AM_WRITEONLY
- AM_RANGE(0x8fe006, 0x8fe007) AM_WRITE(crtc_lpen_w) // 0x8fe006: 0->1, 0x8fe007: 1->0
+ AM_RANGE(0x8fe006, 0x8fe007) AM_WRITE(crtc_lpen_w) // 0x8fe006: 0->1, 0x8fe007: 1->0
AM_RANGE(0xc40000, 0xc40001) AM_READWRITE8(crtc_r, crtc_w, 0xffff)
ADDRESS_MAP_END
@@ -962,7 +962,7 @@ ADDRESS_MAP_END
// MCU simulation (to be done)
READ16_MEMBER(blitz68k_state::deucesw2_mcu_r)
{
- UINT8 ret = 0x00; // machine().rand() gives "interesting" results
+ UINT8 ret = 0x00; // machine().rand() gives "interesting" results
logerror("%s: mcu reads %02x\n", machine().describe_context(), ret);
return ret << 8;
}
@@ -977,14 +977,14 @@ WRITE16_MEMBER(blitz68k_state::deucesw2_leds1_w)
data = COMBINE_DATA(m_leds0);
if (ACCESSING_BITS_8_15)
{
- coin_counter_w(machine(), 0, data & 0x0100); // coin in
- set_led_status(machine(), 0, data & 0x0200); // win???
+ coin_counter_w(machine(), 0, data & 0x0100); // coin in
+ set_led_status(machine(), 0, data & 0x0200); // win???
// 1 data & 0x0400 // win???
- set_led_status(machine(), 2, data & 0x0800); // small
- set_led_status(machine(), 3, data & 0x1000); // big
- set_led_status(machine(), 4, data & 0x2000); // take
- set_led_status(machine(), 5, data & 0x4000); // double up
- set_led_status(machine(), 6, data & 0x8000); // cancel
+ set_led_status(machine(), 2, data & 0x0800); // small
+ set_led_status(machine(), 3, data & 0x1000); // big
+ set_led_status(machine(), 4, data & 0x2000); // take
+ set_led_status(machine(), 5, data & 0x4000); // double up
+ set_led_status(machine(), 6, data & 0x8000); // cancel
show_leds123();
}
}
@@ -994,14 +994,14 @@ WRITE16_MEMBER(blitz68k_state::deucesw2_leds2_w)
data = COMBINE_DATA(m_leds1);
if (ACCESSING_BITS_8_15)
{
- set_led_status(machine(), 7, data & 0x0100); // start
- set_led_status(machine(), 8, data & 0x0200); // bet
- set_led_status(machine(), 9, data & 0x0400); // hold 5
- set_led_status(machine(), 10, data & 0x0800); // hold 4
- set_led_status(machine(), 11, data & 0x1000); // hold 3
- set_led_status(machine(), 12, data & 0x2000); // hold 2
- set_led_status(machine(), 13, data & 0x4000); // hold 1
- set_led_status(machine(), 14, data & 0x8000); // call attendant
+ set_led_status(machine(), 7, data & 0x0100); // start
+ set_led_status(machine(), 8, data & 0x0200); // bet
+ set_led_status(machine(), 9, data & 0x0400); // hold 5
+ set_led_status(machine(), 10, data & 0x0800); // hold 4
+ set_led_status(machine(), 11, data & 0x1000); // hold 3
+ set_led_status(machine(), 12, data & 0x2000); // hold 2
+ set_led_status(machine(), 13, data & 0x4000); // hold 1
+ set_led_status(machine(), 14, data & 0x8000); // call attendant
show_leds123();
}
}
@@ -1011,8 +1011,8 @@ WRITE16_MEMBER(blitz68k_state::deucesw2_leds3_w)
data = COMBINE_DATA(m_leds2);
if (ACCESSING_BITS_8_15)
{
- set_led_status(machine(), 15, data & 0x0100); // hopper coins?
- set_led_status(machine(), 16, data & 0x0400); // coin out?
+ set_led_status(machine(), 15, data & 0x0100); // hopper coins?
+ set_led_status(machine(), 16, data & 0x0400); // coin out?
show_leds123();
}
}
@@ -1047,9 +1047,9 @@ static ADDRESS_MAP_START( deucesw2_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x89a000, 0x89a001) AM_WRITE(deucesw2_leds2_w) AM_SHARE("leds1")
AM_RANGE(0x89c000, 0x89c001) AM_WRITE(deucesw2_leds3_w) AM_SHARE("leds2")
- AM_RANGE(0x89e000, 0x89e003) AM_WRITE8(blit_flags_w, 0xffff) // flipx,y,solid,trans
+ AM_RANGE(0x89e000, 0x89e003) AM_WRITE8(blit_flags_w, 0xffff) // flipx,y,solid,trans
AM_RANGE(0x89e004, 0x89e005) AM_WRITEONLY
- AM_RANGE(0x89e006, 0x89e007) AM_WRITE(crtc_lpen_w) // 0x89e006: 0->1, 0x89e007: 1->0
+ AM_RANGE(0x89e006, 0x89e007) AM_WRITE(crtc_lpen_w) // 0x89e006: 0->1, 0x89e007: 1->0
AM_RANGE(0xc00000, 0xc00001) AM_READWRITE8(crtc_r, crtc_w, 0xffff)
ADDRESS_MAP_END
@@ -1061,25 +1061,25 @@ ADDRESS_MAP_END
// MCU simulation (to be done)
READ8_MEMBER(blitz68k_state::dualgame_mcu1_r)
{
- UINT8 ret = 0; // machine().rand() gives "interesting" results
+ UINT8 ret = 0; // machine().rand() gives "interesting" results
logerror("%s: mcu1 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::dualgame_mcu2_r)
{
- UINT8 ret = 0; // machine().rand() gives "interesting" results
+ UINT8 ret = 0; // machine().rand() gives "interesting" results
logerror("%s: mcu2 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::dualgame_mcu_status_read_r)
{
- return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
+ return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
}
READ8_MEMBER(blitz68k_state::dualgame_mcu_status_write_r)
{
- return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
+ return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
}
WRITE8_MEMBER(blitz68k_state::dualgame_mcu1_w)
@@ -1120,14 +1120,14 @@ static ADDRESS_MAP_START( dualgame_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x2a0000, 0x2a0001) AM_WRITE(crtc_lpen_w)
AM_RANGE(0x2a0000, 0x2a0001) AM_READNOP
- AM_RANGE(0x2c0000, 0x2c0001) AM_WRITENOP // 1->0 (MCU related?)
+ AM_RANGE(0x2c0000, 0x2c0001) AM_WRITENOP // 1->0 (MCU related?)
AM_RANGE(0x2e0000, 0x2e0001) AM_WRITE8(blit_flag0_w, 0xff00)
AM_RANGE(0x2e0002, 0x2e0003) AM_WRITE8(blit_flag1_w, 0xff00)
- AM_RANGE(0x2e0004, 0x2e0005) AM_WRITE8(blit_flipx_w, 0xff00) // flipx
- AM_RANGE(0x2e0006, 0x2e0007) AM_WRITE8(blit_flipy_w, 0xff00) // flipy
- AM_RANGE(0x2e0008, 0x2e0009) AM_WRITE8(blit_solid_w, 0xff00) // solid
- AM_RANGE(0x2e000a, 0x2e000b) AM_WRITE8(blit_trans_w, 0xff00) // transparency
+ AM_RANGE(0x2e0004, 0x2e0005) AM_WRITE8(blit_flipx_w, 0xff00) // flipx
+ AM_RANGE(0x2e0006, 0x2e0007) AM_WRITE8(blit_flipy_w, 0xff00) // flipy
+ AM_RANGE(0x2e0008, 0x2e0009) AM_WRITE8(blit_solid_w, 0xff00) // solid
+ AM_RANGE(0x2e000a, 0x2e000b) AM_WRITE8(blit_trans_w, 0xff00) // transparency
AM_RANGE(0x2e000c, 0x2e000d) AM_WRITE8(blit_flag6_w, 0xff00)
AM_RANGE(0x2e000e, 0x2e000f) AM_WRITE8(blit_flag7_w, 0xff00)
@@ -1152,7 +1152,7 @@ ADDRESS_MAP_END
// MCU simulation (to be done)
READ16_MEMBER(blitz68k_state::hermit_mcu_r)
{
- UINT8 ret = 0x00; // machine().rand() gives "interesting" results
+ UINT8 ret = 0x00; // machine().rand() gives "interesting" results
logerror("%s: mcu reads %02x\n", machine().describe_context(), ret);
return ret << 8;
}
@@ -1167,7 +1167,7 @@ WRITE16_MEMBER(blitz68k_state::hermit_leds1_w)
data = COMBINE_DATA(m_leds0);
if (ACCESSING_BITS_8_15)
{
- coin_counter_w(machine(), 0, data & 0x0100); // coin in
+ coin_counter_w(machine(), 0, data & 0x0100); // coin in
show_leds12();
}
}
@@ -1177,7 +1177,7 @@ WRITE16_MEMBER(blitz68k_state::hermit_leds2_w)
data = COMBINE_DATA(m_leds1);
if (ACCESSING_BITS_8_15)
{
- set_led_status(machine(), 7, data & 0x0100); // button
+ set_led_status(machine(), 7, data & 0x0100); // button
show_leds12();
}
}
@@ -1221,11 +1221,11 @@ static ADDRESS_MAP_START( hermit_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x9e0000, 0x9e0001) AM_WRITE(hermit_leds1_w) AM_SHARE("leds0")
AM_RANGE(0x9e8000, 0x9e8001) AM_WRITE(hermit_leds2_w) AM_SHARE("leds1")
- AM_RANGE(0x9f0000, 0x9f0003) AM_WRITE8(blit_flags_w, 0xffff) // flipx,y,solid,trans
+ AM_RANGE(0x9f0000, 0x9f0003) AM_WRITE8(blit_flags_w, 0xffff) // flipx,y,solid,trans
AM_RANGE(0x9f0004, 0x9f0005) AM_WRITEONLY
- AM_RANGE(0x9f0006, 0x9f0007) AM_WRITE(crtc_lpen_w) // 0x9f0006: 0->1, 0x9f0007: 1->0
+ AM_RANGE(0x9f0006, 0x9f0007) AM_WRITE(crtc_lpen_w) // 0x9f0006: 0->1, 0x9f0007: 1->0
- AM_RANGE(0xb00000, 0xb00001) AM_READWRITE8(crtc_r, crtc_w, 0xffff) // triggered by MCU?
+ AM_RANGE(0xb00000, 0xb00001) AM_READWRITE8(crtc_r, crtc_w, 0xffff) // triggered by MCU?
AM_RANGE(0xc80000, 0xc80007) AM_WRITE8(blit_hwyxa_draw_w, 0xffff)
ADDRESS_MAP_END
@@ -1237,25 +1237,25 @@ ADDRESS_MAP_END
// MCU simulation (to be done)
READ8_MEMBER(blitz68k_state::maxidbl_mcu1_r)
{
- UINT8 ret = 0; // machine().rand() gives "interesting" results
+ UINT8 ret = 0; // machine().rand() gives "interesting" results
logerror("%s: mcu1 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::maxidbl_mcu2_r)
{
- UINT8 ret = 0; // machine().rand() gives "interesting" results
+ UINT8 ret = 0; // machine().rand() gives "interesting" results
logerror("%s: mcu2 reads %02x\n", machine().describe_context(), ret);
return ret;
}
READ8_MEMBER(blitz68k_state::maxidbl_mcu_status_read_r)
{
- return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
+ return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
}
READ8_MEMBER(blitz68k_state::maxidbl_mcu_status_write_r)
{
- return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
+ return 0x03; // bit 0 = MCU1, bit 1 = MCU2. Active high.
}
WRITE8_MEMBER(blitz68k_state::maxidbl_mcu1_w)
@@ -1273,8 +1273,8 @@ static ADDRESS_MAP_START( maxidbl_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x400000, 0x40ffff) AM_RAM AM_SHARE("frame_buffer")
- AM_RANGE(0x30000c, 0x30000d) AM_WRITENOP // 0->1 (IRQ3 ack.?)
- AM_RANGE(0x30000e, 0x30000f) AM_WRITENOP // 1->0 (MCU related?)
+ AM_RANGE(0x30000c, 0x30000d) AM_WRITENOP // 0->1 (IRQ3 ack.?)
+ AM_RANGE(0x30000e, 0x30000f) AM_WRITENOP // 1->0 (MCU related?)
AM_RANGE(0x500000, 0x500001) AM_READ8(maxidbl_mcu_status_write_r, 0x00ff)
AM_RANGE(0x500002, 0x500003) AM_READ8(maxidbl_mcu_status_read_r, 0x00ff)
@@ -1282,7 +1282,7 @@ static ADDRESS_MAP_START( maxidbl_map, AS_PROGRAM, 16, blitz68k_state )
AM_RANGE(0x500004, 0x500005) AM_READWRITE8(maxidbl_mcu1_r, maxidbl_mcu1_w, 0x00ff)
AM_RANGE(0x500006, 0x500007) AM_READWRITE8(maxidbl_mcu2_r, maxidbl_mcu2_w, 0xff00)
- AM_RANGE(0x600000, 0x600001) AM_DEVREADWRITE8("crtc", mc6845_device, status_r, address_w, 0xff00) // triggered by MCU?
+ AM_RANGE(0x600000, 0x600001) AM_DEVREADWRITE8("crtc", mc6845_device, status_r, address_w, 0xff00) // triggered by MCU?
AM_RANGE(0x600002, 0x600003) AM_DEVREADWRITE8("crtc", mc6845_device, register_r, register_w, 0xff00)
ADDRESS_MAP_END
@@ -1297,16 +1297,16 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( bankrob )
// not hooked up
PORT_START("DSW")
- PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0000, "50 Hz" )
PORT_DIPSETTING( 0x0100, "60 Hz" )
- PORT_DIPNAME( 0x0200, 0x0200, "Clock?" ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x0200, 0x0200, "Clock?" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x0000, "10 MHz" )
PORT_DIPSETTING( 0x0200, "11 MHz" )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1344,10 +1344,10 @@ static INPUT_PORTS_START( cjffruit )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME("Call Attendant")
PORT_START("DSW")
- PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0000, "50 Hz" )
PORT_DIPSETTING( 0x0100, "60 Hz" )
- PORT_DIPNAME( 0x0e00, 0x0800, "Pinout" ) PORT_DIPLOCATION("SW1:4,5,6")
+ PORT_DIPNAME( 0x0e00, 0x0800, "Pinout" ) PORT_DIPLOCATION("SW1:4,5,6")
PORT_DIPSETTING( 0x0e00, "8L6 (Cherry Master)" )
PORT_DIPSETTING( 0x0c00, "8L7" )
PORT_DIPSETTING( 0x0a00, "8L10" )
@@ -1357,7 +1357,7 @@ static INPUT_PORTS_START( cjffruit )
PORT_DIPSETTING( 0x0200, "Invalid #1" )
PORT_DIPSETTING( 0x0000, "Invalid #2" )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Logic Door") PORT_CODE(KEYCODE_L) PORT_TOGGLE
- PORT_DIPNAME( 0x2000, 0x2000, "Factory Default" ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x2000, 0x2000, "Factory Default" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Main Door") PORT_CODE(KEYCODE_O) PORT_TOGGLE
@@ -1367,9 +1367,9 @@ INPUT_PORTS_END
static INPUT_PORTS_START( deucesw2 )
// Inputs for L74 pinout
PORT_START("IN0")
- PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // coin 1
- PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(5) // coin 2
- PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(5) // coin 3
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // coin 1
+ PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(5) // coin 2
+ PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(5) // coin 3
PORT_SERVICE_NO_TOGGLE( 0x0800, IP_ACTIVE_LOW ) // menu
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) // stats
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // collect
@@ -1397,12 +1397,12 @@ static INPUT_PORTS_START( deucesw2 )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME("Call Attendant")
PORT_START("DSW")
- PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0000, "50 Hz" )
PORT_DIPSETTING( 0x0100, "60 Hz" )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Logic Door") PORT_CODE(KEYCODE_L) PORT_TOGGLE
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Main Door") PORT_CODE(KEYCODE_O) PORT_TOGGLE
- PORT_DIPNAME( 0x3800, 0x2000, "Pinout" ) PORT_DIPLOCATION("SW1:4,5,6")
+ PORT_DIPNAME( 0x3800, 0x2000, "Pinout" ) PORT_DIPLOCATION("SW1:4,5,6")
PORT_DIPSETTING( 0x3800, "8L6 (Cherry Master)" )
PORT_DIPSETTING( 0x3000, "8L7" )
PORT_DIPSETTING( 0x2800, "8L10" )
@@ -1411,10 +1411,10 @@ static INPUT_PORTS_START( deucesw2 )
PORT_DIPSETTING( 0x1000, "Invalid #2" )
PORT_DIPSETTING( 0x0800, "Invalid #3" )
PORT_DIPSETTING( 0x0000, "Invalid #4" )
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x8000, 0x8000, "Factory Default" ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x8000, 0x8000, "Factory Default" ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1422,23 +1422,23 @@ INPUT_PORTS_END
static INPUT_PORTS_START( dualgame )
// not hooked up
PORT_START("DSW")
- PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x0000, "50 Hz" )
PORT_DIPSETTING( 0x0100, "60 Hz" )
- PORT_DIPNAME( 0x0200, 0x0200, "Clock?" ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x0200, 0x0200, "Clock?" ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0000, "10 MHz" )
PORT_DIPSETTING( 0x0200, "11 MHz" )
- PORT_DIPNAME( 0x0400, 0x0400, "V-Sync" ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x0400, 0x0400, "V-Sync" ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x0000, "V-" )
PORT_DIPSETTING( 0x0400, "V+" )
- PORT_DIPNAME( 0x0800, 0x0800, "H-Sync" ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x0800, 0x0800, "H-Sync" ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x0000, "H-" )
PORT_DIPSETTING( 0x0800, "H+" )
INPUT_PORTS_END
static INPUT_PORTS_START( hermit )
PORT_START("IN0")
- PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // coin 1
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(5) // coin 1
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN ) // -
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) // -
PORT_SERVICE_NO_TOGGLE( 0x0800, IP_ACTIVE_LOW ) // menu
@@ -1458,36 +1458,36 @@ static INPUT_PORTS_START( hermit )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // -
PORT_START("DSW")
- PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x0000, "50 Hz" )
PORT_DIPSETTING( 0x0100, "60 Hz" )
- PORT_DIPNAME( 0x0200, 0x0200, "Clock?" ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x0200, 0x0200, "Clock?" ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x0000, "20 MHz" )
PORT_DIPSETTING( 0x0200, "22 MHz" )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x2000, 0x2000, "Trackball Alt #1" ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x2000, 0x2000, "Trackball Alt #1" ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, "Trackball Alt #2" ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x4000, 0x4000, "Trackball Alt #2" ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x8000, 0x8000, "Factory Default" ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x8000, 0x8000, "Factory Default" ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_START("TRACK_X")
- PORT_BIT( 0x0f, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(2) PORT_KEYDELTA(100) PORT_RESET
+ PORT_BIT( 0x0f, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(2) PORT_KEYDELTA(100) PORT_RESET
PORT_START("TRACK_Y")
- PORT_BIT( 0x0f, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(2) PORT_KEYDELTA(100) PORT_RESET
+ PORT_BIT( 0x0f, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(2) PORT_KEYDELTA(100) PORT_RESET
INPUT_PORTS_END
static INPUT_PORTS_START( ilpag )
@@ -1573,30 +1573,30 @@ INPUT_PORTS_END
static INPUT_PORTS_START( maxidbl )
// not hooked up
PORT_START("DSW_SUB")
- PORT_DIPNAME( 0x0100, 0x0100, "V-Sync" ) PORT_DIPLOCATION("SW1:1")
+ PORT_DIPNAME( 0x0100, 0x0100, "V-Sync" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x0000, "V-" )
PORT_DIPSETTING( 0x0100, "V+" )
- PORT_DIPNAME( 0x0200, 0x0200, "H-Sync" ) PORT_DIPLOCATION("SW1:2")
+ PORT_DIPNAME( 0x0200, 0x0200, "H-Sync" ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x0000, "H-" )
PORT_DIPSETTING( 0x0800, "H+" )
- PORT_DIPNAME( 0x0400, 0x0400, "Comp" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x0400, 0x0400, "Comp" ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0800, 0x0800, "En-V" ) PORT_DIPLOCATION("SW1:4")
+ PORT_DIPNAME( 0x0800, 0x0800, "En-V" ) PORT_DIPLOCATION("SW1:4")
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_START("DSW")
- PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x0100, 0x0100, "Screen Refresh" ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x0000, "50 Hz" )
PORT_DIPSETTING( 0x0100, "60 Hz" )
- PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
@@ -1664,44 +1664,44 @@ WRITE_LINE_MEMBER(blitz68k_state::crtc_vsync_irq5)
const mc6845_interface mc6845_intf_irq1 =
{
- "screen", /* screen we are acting on */
- 4, /* number of pixels per video memory address */ /* Horizontal Display programmed to 160 characters */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_DRIVER_LINE_MEMBER(blitz68k_state,crtc_vsync_irq1), /* VSYNC callback */
- crtc_addr /* update address callback */
+ "screen", /* screen we are acting on */
+ 4, /* number of pixels per video memory address */ /* Horizontal Display programmed to 160 characters */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_DRIVER_LINE_MEMBER(blitz68k_state,crtc_vsync_irq1), /* VSYNC callback */
+ crtc_addr /* update address callback */
};
const mc6845_interface mc6845_intf_irq3 =
{
- "screen", /* screen we are acting on */
- 4, /* number of pixels per video memory address */ /* Horizontal Display programmed to 160 characters */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_DRIVER_LINE_MEMBER(blitz68k_state,crtc_vsync_irq3), /* VSYNC callback */
- crtc_addr /* update address callback */
+ "screen", /* screen we are acting on */
+ 4, /* number of pixels per video memory address */ /* Horizontal Display programmed to 160 characters */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_DRIVER_LINE_MEMBER(blitz68k_state,crtc_vsync_irq3), /* VSYNC callback */
+ crtc_addr /* update address callback */
};
const mc6845_interface mc6845_intf_irq5 =
{
- "screen", /* screen we are acting on */
- 4, /* number of pixels per video memory address */ /* Horizontal Display programmed to 160 characters */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_DRIVER_LINE_MEMBER(blitz68k_state,crtc_vsync_irq5), /* VSYNC callback */
- crtc_addr /* update address callback */
+ "screen", /* screen we are acting on */
+ 4, /* number of pixels per video memory address */ /* Horizontal Display programmed to 160 characters */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_DRIVER_LINE_MEMBER(blitz68k_state,crtc_vsync_irq5), /* VSYNC callback */
+ crtc_addr /* update address callback */
};
static ADDRESS_MAP_START( ramdac_map, AS_0, 8, blitz68k_state )
@@ -1714,7 +1714,7 @@ static RAMDAC_INTERFACE( ramdac_intf )
};
static MACHINE_CONFIG_START( ilpag, blitz68k_state )
- MCFG_CPU_ADD("maincpu", M68000, 11059200 ) // ?
+ MCFG_CPU_ADD("maincpu", M68000, 11059200 ) // ?
MCFG_CPU_PROGRAM_MAP(ilpag_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq4_line_hold) //3 & 6 used, mcu comms?
@@ -1815,7 +1815,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( bankrob, blitz68k_state )
MCFG_CPU_ADD("maincpu", M68000, XTAL_11_0592MHz)
MCFG_CPU_PROGRAM_MAP(bankrob_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq3_line_hold) // protection prevents correct irq frequency by crtc
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq3_line_hold) // protection prevents correct irq frequency by crtc
// irq 2 reads from MCUs
// MC68HC705C8P (MCU1)
@@ -1847,7 +1847,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( bankroba, blitz68k_state )
MCFG_CPU_ADD("maincpu", M68000, XTAL_11_0592MHz )
MCFG_CPU_PROGRAM_MAP(bankroba_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq5_line_hold) // protection prevents correct irq frequency by crtc
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq5_line_hold) // protection prevents correct irq frequency by crtc
// irq 3,4 read from MCUs
// MC68HC705C8P (MCU)
@@ -1937,7 +1937,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( hermit, blitz68k_state )
MCFG_CPU_ADD("maincpu", M68000, XTAL_22_1184MHz/2 )
MCFG_CPU_PROGRAM_MAP(hermit_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq1_line_hold) // protection prevents correct irq frequency by crtc
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq1_line_hold) // protection prevents correct irq frequency by crtc
// MC68HC705C8P (MCU)
@@ -1966,7 +1966,7 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( maxidbl, blitz68k_state )
MCFG_CPU_ADD("maincpu", M68000, XTAL_11_0592MHz)
MCFG_CPU_PROGRAM_MAP(maxidbl_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq3_line_hold) // protection prevents correct irq frequency by crtc
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", blitz68k_state, irq3_line_hold) // protection prevents correct irq frequency by crtc
// irq 2 reads from MCUs
// MC68HC705C8P (MCU1)
@@ -2048,11 +2048,11 @@ ROM_START( bankrob )
ROM_LOAD16_BYTE( "unknown_label.u21", 0x00000, 0x20000, CRC(a043a651) SHA1(798f7b7b04bf6ef5333b07d329fadc0264da00e9) )
ROM_LOAD16_BYTE( "unknown_label.u20", 0x00001, 0x20000, CRC(31dcfd41) SHA1(d23f6a6d57d917ba1c4e202c341b35ab0eeaef42) )
- ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
- ROM_LOAD( "xpi-1_2.6.u6", 0x0000, 0x2000, NO_DUMP ) // missing label
+ ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
+ ROM_LOAD( "xpi-1_2.6.u6", 0x0000, 0x2000, NO_DUMP ) // missing label
- ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
- ROM_LOAD( "xpi-2_2.6.u7", 0x0000, 0x2000, NO_DUMP ) // "for SPI & MPI 06/08/1995"
+ ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
+ ROM_LOAD( "xpi-2_2.6.u7", 0x0000, 0x2000, NO_DUMP ) // "for SPI & MPI 06/08/1995"
ROM_REGION( 0x100000, "blitter", 0 ) // data for the blitter
ROM_LOAD16_BYTE( "unknown_label.u70", 0x00000, 0x80000, CRC(35225bf6) SHA1(cd3176ab43c0678c6b9a92b9fafea116babdd534) )
@@ -2060,15 +2060,15 @@ ROM_START( bankrob )
// ROM_REGION( 0x20000, "samples", 0 ) // 8 bit unsigned
- ROM_REGION( 0x117, "plds", 0 )
- ROM_LOAD( "palce16v8h.u10", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u18", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u33", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u34", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u39", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u60", 0x000, 0x117, NO_DUMP )
+ ROM_REGION( 0x117, "plds", 0 )
+ ROM_LOAD( "palce16v8h.u10", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u18", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u33", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u34", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u39", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u60", 0x000, 0x117, NO_DUMP )
ROM_END
/*************************************************************************************************************
@@ -2116,33 +2116,33 @@ ROM_START( bankroba )
ROM_LOAD16_BYTE( "dkbkus_2.64-b.u32", 0x00000, 0x20000, CRC(03ddde43) SHA1(c24ed9419726ca7bd96a92651705043da545512f) )
ROM_LOAD16_BYTE( "dkbkus_2.64-a.u31", 0x00001, 0x20000, CRC(8906f5b6) SHA1(b9dbecfac299bdd1dba5fe22cda3485b3202e074) )
- ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
ROM_LOAD( "c8-bank_2.51.u2", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
ROM_LOAD( "bankroba_sub.mcu", 0x0000, 0x2000, NO_DUMP )
ROM_REGION( 0x100000, "blitter", 0 ) // data for the blitter
ROM_LOAD( "dkbkus_2.31-c.u46", 0x00000, 0x80000, CRC(d94a3ead) SHA1(e599b8d110bae16f83b3969834aa9b01076e2310) )
ROM_LOAD( "dkbkus_2.31-d.u51", 0x80000, 0x80000, CRC(834b63bb) SHA1(da6b5e2fc1626044ecddf438c696e606a72d6164) )
- ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
+ ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
ROM_LOAD( "unknown_label.u18", 0x00000, 0x80000, CRC(37f5862d) SHA1(8053c9ea30bb304982ef7e2c67d94454df520dfd) ) // = bank_2.31-g.u17 (dualgame)
- ROM_REGION( 0x117, "plds", 0 )
- ROM_LOAD( "pal20x6acns.u12", 0x000, 0x0cc, NO_DUMP ) // size?
- ROM_LOAD( "palce16v8h.u22", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "pal20x10acns.u40", 0x000, 0x0cc, NO_DUMP ) // size?
- ROM_LOAD( "pal20x6acns.u43", 0x000, 0x0cc, NO_DUMP ) // size?
- ROM_LOAD( "palce16v8h.u44", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "pal20x6acns.u48", 0x000, 0x0cc, NO_DUMP ) // size?
- ROM_LOAD( "pal20x6acns.u52", 0x000, 0x0cc, NO_DUMP ) // size?
- ROM_LOAD( "palce16v8h.u53", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u56", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u57", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u69", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u71", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u72", 0x000, 0x117, NO_DUMP )
+ ROM_REGION( 0x117, "plds", 0 )
+ ROM_LOAD( "pal20x6acns.u12", 0x000, 0x0cc, NO_DUMP ) // size?
+ ROM_LOAD( "palce16v8h.u22", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "pal20x10acns.u40", 0x000, 0x0cc, NO_DUMP ) // size?
+ ROM_LOAD( "pal20x6acns.u43", 0x000, 0x0cc, NO_DUMP ) // size?
+ ROM_LOAD( "palce16v8h.u44", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "pal20x6acns.u48", 0x000, 0x0cc, NO_DUMP ) // size?
+ ROM_LOAD( "pal20x6acns.u52", 0x000, 0x0cc, NO_DUMP ) // size?
+ ROM_LOAD( "palce16v8h.u53", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u56", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u57", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u69", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u71", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u72", 0x000, 0x117, NO_DUMP )
ROM_END
/*************************************************************************************************************
@@ -2186,7 +2186,7 @@ ROM_START( cj3play )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code
ROM_LOAD16_WORD( "cjtripleply-cj_1.10-a.u65", 0x00000, 0x80000, CRC(69ae3fd3) SHA1(50eed5130905b710f48b2086173448e999dc96e8) )
- ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8A code
+ ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8A code
ROM_LOAD( "cj-tripleplay_2.4.c8", 0x0000, 0x2000, NO_DUMP )
ROM_REGION( 0x200000, "blitter", 0 ) // data for the blitter
@@ -2195,7 +2195,7 @@ ROM_START( cj3play )
ROM_LOAD16_BYTE( "cjtripleply-cj_1.10-f.u51", 0x100000, 0x80000, CRC(c8ccf1a7) SHA1(7a7b0f68d6ed5894fb4deb93fbf8053aff4fdb35) )
ROM_LOAD16_BYTE( "cjtripleply-cj_1.10-e.u61", 0x100001, 0x80000, CRC(ff59f0ae) SHA1(b9f9cdc90f44f75ace079ec08ab5d71b21ce98dd) )
- ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
+ ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
ROM_LOAD( "cjtripleply-cj_1.10-g.u50", 0x00000, 0x80000, CRC(8129f700) SHA1(fc09e1e4694757b08570cc46c9536340fbce0ded) )
ROM_REGION( 0x117, "plds", 0 )
@@ -2246,7 +2246,7 @@ ROM_START( cjffruit )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code
ROM_LOAD16_WORD( "cjfunfruit-cj_1.13-a.u65", 0x00000, 0x80000, CRC(3a74d769) SHA1(fc8804d49cc31dadf10027ed1e2458cae96d6355) )
- ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8P code
ROM_LOAD( "cjfunfruit_2.3.c8", 0x0000, 0x2000, NO_DUMP )
ROM_REGION( 0x200000, "blitter", 0 ) // data for the blitter
@@ -2255,7 +2255,7 @@ ROM_START( cjffruit )
ROM_LOAD16_BYTE( "cjfunfruit-cj_1.13-f.u51", 0x100000, 0x80000, CRC(f5de1072) SHA1(943a82899ca6a07991fa4031d2ff96f625c9d6f5) )
ROM_LOAD16_BYTE( "cjfunfruit-cj_1.13-e.u61", 0x100001, 0x80000, CRC(7acaef9d) SHA1(5031dc22e787dc4d8dffe67382068b9926c24bef) )
- ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
+ ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
ROM_LOAD( "cjfunfruit-cj_1.13-g.u50", 0x00000, 0x80000, CRC(5fb53d3e) SHA1(f4a37b00a9417440685d198f1375b615848e7fb6) )
ROM_REGION( 0x117, "plds", 0 )
@@ -2309,16 +2309,16 @@ Other:
ROM_START( deucesw2 )
ROM_REGION( 0x40000, "maincpu", 0 ) // 68000 code
- ROM_LOAD( "cb2wild-ah-2.02f-a.u92", 0x00000, 0x40000, CRC(723140ef) SHA1(8ab9c89663ce0dd736b6e9f701f16dbf5ebb9527) ) // "for CBC ($6F6D)"
+ ROM_LOAD( "cb2wild-ah-2.02f-a.u92", 0x00000, 0x40000, CRC(723140ef) SHA1(8ab9c89663ce0dd736b6e9f701f16dbf5ebb9527) ) // "for CBC ($6F6D)"
- ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8P code
- ROM_LOAD( "cbc-8l_2.0.u31", 0x0000, 0x2000, NO_DUMP ) // "for CBC-8L REV..." (label is only partially readable)
+ ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8P code
+ ROM_LOAD( "cbc-8l_2.0.u31", 0x0000, 0x2000, NO_DUMP ) // "for CBC-8L REV..." (label is only partially readable)
ROM_REGION( 0x80000, "blitter", 0 ) // data for the blitter
- ROM_LOAD16_BYTE( "cb2wild-ah-2.02f-d.u87", 0x00000, 0x40000, CRC(7ab3ea30) SHA1(5e435f2a6ea169b827ae0f3da6a8afda0b636d7e) ) // "for CBC ($AA97)"
- ROM_LOAD16_BYTE( "cb2wild-ah-2.02f-c.u94", 0x00001, 0x40000, CRC(5b465430) SHA1(df428e3309732376d0999ad75567e264b7db9a1c) ) // "for CBC ($465A)"
+ ROM_LOAD16_BYTE( "cb2wild-ah-2.02f-d.u87", 0x00000, 0x40000, CRC(7ab3ea30) SHA1(5e435f2a6ea169b827ae0f3da6a8afda0b636d7e) ) // "for CBC ($AA97)"
+ ROM_LOAD16_BYTE( "cb2wild-ah-2.02f-c.u94", 0x00001, 0x40000, CRC(5b465430) SHA1(df428e3309732376d0999ad75567e264b7db9a1c) ) // "for CBC ($465A)"
- ROM_REGION( 0x20000, "samples", 0 ) // 8 bit unsigned
+ ROM_REGION( 0x20000, "samples", 0 ) // 8 bit unsigned
ROM_LOAD( "cb2wild-ah-2.02f-k.u54", 0x00000, 0x20000, CRC(1eea618b) SHA1(65f3513d1a93a8afbfaeff27ebea5f0b5348e54b) )
ROM_REGION( 0x117, "plds", 0 )
@@ -2383,21 +2383,21 @@ Other:
ROM_START( dualgame )
ROM_REGION( 0x40000, "maincpu", 0 ) // 68000 code
- ROM_LOAD16_BYTE( "mpduga_0.01-a.u27", 0x00000, 0x20000, CRC(57b87596) SHA1(b31d83f5dbd0ad25564c876e2995bba61e1f425f) ) // "for MPI/MPM 09/05/1995"
- ROM_LOAD16_BYTE( "mpduga_0.01-b.u28", 0x00001, 0x20000, CRC(e441d895) SHA1(c026b6ebeaedece303b9361bd92c69150ea63b0a) ) // ""
+ ROM_LOAD16_BYTE( "mpduga_0.01-a.u27", 0x00000, 0x20000, CRC(57b87596) SHA1(b31d83f5dbd0ad25564c876e2995bba61e1f425f) ) // "for MPI/MPM 09/05/1995"
+ ROM_LOAD16_BYTE( "mpduga_0.01-b.u28", 0x00001, 0x20000, CRC(e441d895) SHA1(c026b6ebeaedece303b9361bd92c69150ea63b0a) ) // ""
- ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
ROM_LOAD( "dualgame.u8", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
ROM_LOAD( "dualgame.u9", 0x0000, 0x2000, NO_DUMP )
ROM_REGION( 0x100000, "blitter", 0 ) // data for the blitter
ROM_LOAD16_BYTE( "mpduga_0.01-d.u69", 0x00000, 0x80000, CRC(2f65e87e) SHA1(ded9d75ebb46e061615dac408f86dad14df9d30b) )
ROM_LOAD16_BYTE( "mpduga_0.01-c.u68", 0x00001, 0x80000, CRC(bc5b4738) SHA1(69bcc15d3e7524ba26dad0e29919461fbd0a8736) )
- ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
- ROM_LOAD( "bank_2.31-g.u17", 0x00000, 0x80000, CRC(37f5862d) SHA1(8053c9ea30bb304982ef7e2c67d94454df520dfd) ) // "for DK-B or DAB 03/04/1995" (hand-written: Demo)
+ ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
+ ROM_LOAD( "bank_2.31-g.u17", 0x00000, 0x80000, CRC(37f5862d) SHA1(8053c9ea30bb304982ef7e2c67d94454df520dfd) ) // "for DK-B or DAB 03/04/1995" (hand-written: Demo)
ROM_END
/*************************************************************************************************************
@@ -2442,21 +2442,21 @@ ROM_START( hermit )
ROM_REGION( 0x40000, "maincpu", 0 ) // 68000 code
ROM_LOAD( "unknown_label.u69", 0x00000, 0x40000, CRC(5e1a37c1) SHA1(76ec6ef75ddda848d466e20a4a8bfb3e1647e876) )
- ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8P code
- ROM_LOAD( "lc-hermit_1.00.u51", 0x0000, 0x2000, NO_DUMP ) // "for LC-8L 26/04/1995"
+ ROM_REGION( 0x2000, "mcu", 0 ) // 68HC705C8P code
+ ROM_LOAD( "lc-hermit_1.00.u51", 0x0000, 0x2000, NO_DUMP ) // "for LC-8L 26/04/1995"
ROM_REGION( 0x100000, "blitter", 0 ) // data for the blitter
ROM_LOAD16_BYTE( "unknown_label.u2", 0x00000, 0x80000, CRC(fc8b9ec6) SHA1(c7515cf78d68a1ae7f2e8e50fe3083db2547c314) )
ROM_LOAD16_BYTE( "unknown_label.u3", 0x00001, 0x80000, CRC(0a621d76) SHA1(66cabf4e233dc784851c9fb07f18658c10744cd7) )
- ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
- ROM_LOAD( "lcherm_1.00-g.u48", 0x00000, 0x80000, CRC(1ad999de) SHA1(02beb744a0a6fb92e225c1de10672c852151eb6b) ) // "for LC-8L 26/04/1995"
+ ROM_REGION( 0x80000, "samples", 0 ) // 8 bit unsigned
+ ROM_LOAD( "lcherm_1.00-g.u48", 0x00000, 0x80000, CRC(1ad999de) SHA1(02beb744a0a6fb92e225c1de10672c852151eb6b) ) // "for LC-8L 26/04/1995"
- ROM_REGION( 0x117, "plds", 0 )
- ROM_LOAD( "palce16v8h.u34", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u45", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u46", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u56", 0x000, 0x117, NO_DUMP )
+ ROM_REGION( 0x117, "plds", 0 )
+ ROM_LOAD( "palce16v8h.u34", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u45", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u46", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u56", 0x000, 0x117, NO_DUMP )
ROM_END
/*************************************************************************************************************
@@ -2566,21 +2566,21 @@ ROM_START( maxidbl )
ROM_LOAD16_BYTE( "spm_maxi_1.1-b.u25", 0x00000, 0x20000, CRC(b0c754c2) SHA1(a664386d1813b1e06be0d9f41fc3569dfc20e395) )
ROM_LOAD16_BYTE( "sp_maxi_1.1-a.u24", 0x00001, 0x20000, CRC(adec27b6) SHA1(3dabe86eae9781e6d8fe20e160351e5e757faeda) )
- ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
ROM_LOAD( "c8_pi-2.u5", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
ROM_LOAD( "c8_spi-maxi.u6", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x2000, "mcu3", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu3", 0 ) // 68HC705C8P code
ROM_LOAD( "sub8l74_846.u18", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x117, "plds", 0 )
- ROM_LOAD( "16as15hb1.u2", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "16as15hb1.u13", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "16as15hb1.u14", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "16as15hb1.u15", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "16as15hb1.u19", 0x000, 0x117, NO_DUMP )
+ ROM_REGION( 0x117, "plds", 0 )
+ ROM_LOAD( "16as15hb1.u2", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "16as15hb1.u13", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "16as15hb1.u14", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "16as15hb1.u15", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "16as15hb1.u19", 0x000, 0x117, NO_DUMP )
ROM_END
/*************************************************************************************************************
@@ -2631,21 +2631,21 @@ ROM_START( megadble )
ROM_LOAD16_BYTE( "spmegasp_1.62-b.u25", 0x00000, 0x20000, CRC(4562a181) SHA1(82f1034a0631f83236b163c0c1d6fed5d365bf9c) )
ROM_LOAD16_BYTE( "spmegasp_1.62-a.u24", 0x00001, 0x20000, CRC(292fdacc) SHA1(fd8e117586569abb094d3b0ebd41292565f18c2a) )
- ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
- ROM_LOAD( "xpi-2_2.6.u5", 0x0000, 0x2000, NO_DUMP ) // C8-#2
+ ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
+ ROM_LOAD( "xpi-2_2.6.u5", 0x0000, 0x2000, NO_DUMP ) // C8-#2
- ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
- ROM_LOAD( "xpi-1_2.6.u6", 0x0000, 0x2000, NO_DUMP ) // C8-#1, no label
+ ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
+ ROM_LOAD( "xpi-1_2.6.u6", 0x0000, 0x2000, NO_DUMP ) // C8-#1, no label
- ROM_REGION( 0x2000, "mcu3", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu3", 0 ) // 68HC705C8P code
ROM_LOAD( "hilo_sk-b_4.01.u18", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x117, "plds", 0 )
- ROM_LOAD( "palce16v8h.u2", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u13", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u14", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
+ ROM_REGION( 0x117, "plds", 0 )
+ ROM_LOAD( "palce16v8h.u2", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u13", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u14", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
ROM_END
/*************************************************************************************************************
@@ -2670,21 +2670,21 @@ ROM_START( megadblj )
ROM_LOAD16_BYTE( "spmegajk_1.26-b.u25", 0x00000, 0x20000, CRC(de206213) SHA1(35d886c805424fe7b364b49f301ff8467e30c26b) )
ROM_LOAD16_BYTE( "spmegajk_1.26-a.u24", 0x00001, 0x20000, CRC(fa0ccaea) SHA1(562324119e08d44228ac754acbf763d0781ab891) )
- ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
ROM_LOAD( "c8_pi-2.u5", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
ROM_LOAD( "c8_spi-megajk.u6", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x2000, "mcu3", 0 ) // 68HC705C8P code
+ ROM_REGION( 0x2000, "mcu3", 0 ) // 68HC705C8P code
ROM_LOAD( "megadblj_sub.mcu", 0x0000, 0x2000, NO_DUMP )
- ROM_REGION( 0x117, "plds", 0 )
- ROM_LOAD( "palce16v8h.u2", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u13", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u14", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
+ ROM_REGION( 0x117, "plds", 0 )
+ ROM_LOAD( "palce16v8h.u2", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u13", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u14", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
ROM_END
/*************************************************************************************************************
@@ -2709,18 +2709,18 @@ ROM_START( poker52 )
ROM_LOAD16_BYTE( "unknown_label.u25", 0x00000, 0x20000, CRC(63e0dd69) SHA1(970e6363ade714a2b9a844c5683ab1365193457a) )
ROM_LOAD16_BYTE( "unknown_label.u24", 0x00001, 0x20000, NO_DUMP )
- ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
- ROM_LOAD( "xpi-2_2.3.u5", 0x0000, 0x2000, NO_DUMP ) // C8-#2, "for SPI or MPI 09/02/1995" (partially readable)
+ ROM_REGION( 0x2000, "mcu1", 0 ) // 68HC705C8P code
+ ROM_LOAD( "xpi-2_2.3.u5", 0x0000, 0x2000, NO_DUMP ) // C8-#2, "for SPI or MPI 09/02/1995" (partially readable)
- ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
- ROM_LOAD( "spi-pk52_1.6.u6", 0x0000, 0x2000, NO_DUMP ) // C8-#2
+ ROM_REGION( 0x2000, "mcu2", 0 ) // 68HC705C8P code
+ ROM_LOAD( "spi-pk52_1.6.u6", 0x0000, 0x2000, NO_DUMP ) // C8-#2
- ROM_REGION( 0x117, "plds", 0 )
- ROM_LOAD( "palce16v8h.u2", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u13", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u14", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
- ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
+ ROM_REGION( 0x117, "plds", 0 )
+ ROM_LOAD( "palce16v8h.u2", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u13", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u14", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u15", 0x000, 0x117, NO_DUMP )
+ ROM_LOAD( "palce16v8h.u19", 0x000, 0x117, NO_DUMP )
ROM_END
/*************************************************************************************************************
@@ -2910,15 +2910,15 @@ DRIVER_INIT_MEMBER(blitz68k_state,megadble)
GAME( 1992, maxidbl, 0, maxidbl, maxidbl, blitz68k_state, maxidbl, ROT0, "Blitz Systems Inc.", "Maxi Double Poker (Ver. 1.10)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND | GAME_WRONG_COLORS )
-GAME( 1990, megadblj, 0, maxidbl, maxidbl, blitz68k_state, megadblj, ROT0, "Blitz Systems Inc.", "Mega Double Poker Jackpot (Ver. 1.26)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // JUNE 28TH, 1993
+GAME( 1990, megadblj, 0, maxidbl, maxidbl, blitz68k_state, megadblj, ROT0, "Blitz Systems Inc.", "Mega Double Poker Jackpot (Ver. 1.26)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // JUNE 28TH, 1993
GAME( 1990, megadble, 0, maxidbl, maxidbl, blitz68k_state, megadble, ROT0, "Blitz Systems Inc.", "Mega Double Poker (Ver. 1.63 Espagnol)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND | GAME_WRONG_COLORS ) // NOVEMBER 1994
GAME( 1993, steaser, 0, steaser, steaser, driver_device, 0, ROT0, "<unknown>", "Strip Teaser (Italy, Ver. 1.22)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // In-game strings are in Italian but service mode is half English / half French?
-GAME( 1993, bankrob, 0, bankrob, bankrob, blitz68k_state, bankrob, ROT0, "Entertainment Technology Corp.", "Bank Robbery (Ver. 3.32)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // BLITZ SYSTEM INC APRIL 1995
-GAME( 1993, bankroba, bankrob, bankroba, bankrob, blitz68k_state, bankroba, ROT0, "Entertainment Technology Corp.", "Bank Robbery (Ver. 2.00)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // BLITZ SYSTEM INC MAY 10TH, 1993
-GAME( 1993?, poker52, 0, maxidbl, maxidbl, driver_device, 0, ROT0, "Blitz Systems Inc.", "Poker 52 (Ver. 1.2)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // MARCH 10TH, 1994
+GAME( 1993, bankrob, 0, bankrob, bankrob, blitz68k_state, bankrob, ROT0, "Entertainment Technology Corp.", "Bank Robbery (Ver. 3.32)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // BLITZ SYSTEM INC APRIL 1995
+GAME( 1993, bankroba, bankrob, bankroba, bankrob, blitz68k_state, bankroba, ROT0, "Entertainment Technology Corp.", "Bank Robbery (Ver. 2.00)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // BLITZ SYSTEM INC MAY 10TH, 1993
+GAME( 1993?, poker52, 0, maxidbl, maxidbl, driver_device, 0, ROT0, "Blitz Systems Inc.", "Poker 52 (Ver. 1.2)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // MARCH 10TH, 1994
GAME( 1995, dualgame, 0, dualgame, dualgame, blitz68k_state, dualgame, ROT0, "Labtronix Technologies", "Dual Games (prototype)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // SEPTEMBER 5TH, 1995
-GAME( 1995, hermit, 0, hermit, hermit, blitz68k_state, hermit, ROT0, "Dugamex", "The Hermit (Ver. 1.14)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // APRIL 1995
-GAME( 1997, deucesw2, 0, deucesw2, deucesw2, blitz68k_state, deucesw2, ROT0, "<unknown>", "Deuces Wild 2 - American Heritage (Ver. 2.02F)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // APRIL 10TH, 1997
+GAME( 1995, hermit, 0, hermit, hermit, blitz68k_state, hermit, ROT0, "Dugamex", "The Hermit (Ver. 1.14)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // APRIL 1995
+GAME( 1997, deucesw2, 0, deucesw2, deucesw2, blitz68k_state, deucesw2, ROT0, "<unknown>", "Deuces Wild 2 - American Heritage (Ver. 2.02F)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // APRIL 10TH, 1997
GAME( 1998, cj3play, 0, cjffruit, cjffruit, blitz68k_state, cj3play, ROT0, "Cadillac Jack", "Triple Play (Ver. 1.10)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // FEBRUARY 24TH, 1999
GAME( 1998, cjffruit, 0, cjffruit, cjffruit, blitz68k_state, cjffruit, ROT0, "Cadillac Jack", "Funny Fruit (Ver. 1.13)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND ) // APRIL 21ST, 1999
GAME( 199?, ilpag, 0, ilpag, ilpag, driver_device, 0, ROT0, "<unknown>", "Il Pagliaccio (Italy, Ver. 2.7C)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_NO_SOUND )
diff --git a/src/mame/drivers/blktiger.c b/src/mame/drivers/blktiger.c
index 1cfe5e3bc47..61c625f599f 100644
--- a/src/mame/drivers/blktiger.c
+++ b/src/mame/drivers/blktiger.c
@@ -80,14 +80,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( blktiger_io_map, AS_IO, 8, blktiger_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(soundlatch_byte_w)
- AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITE(blktiger_bankswitch_w)
+ AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(soundlatch_byte_w)
+ AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITE(blktiger_bankswitch_w)
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
- AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW0") AM_WRITE(blktiger_coinlockout_w)
- AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW1") AM_WRITE(blktiger_video_control_w)
+ AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW0") AM_WRITE(blktiger_coinlockout_w)
+ AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW1") AM_WRITE(blktiger_video_control_w)
AM_RANGE(0x05, 0x05) AM_READ_PORT("FREEZE")
AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
- AM_RANGE(0x07, 0x07) AM_READWRITE(blktiger_from_mcu_r,blktiger_to_mcu_w) /* Software protection (7) */
+ AM_RANGE(0x07, 0x07) AM_READWRITE(blktiger_from_mcu_r,blktiger_to_mcu_w) /* Software protection (7) */
AM_RANGE(0x08, 0x09) AM_WRITE(blktiger_scrollx_w)
AM_RANGE(0x0a, 0x0b) AM_WRITE(blktiger_scrolly_w)
AM_RANGE(0x0c, 0x0c) AM_WRITE(blktiger_video_enable_w)
@@ -97,14 +97,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( blktigerbl_io_map, AS_IO, 8, blktiger_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(soundlatch_byte_w)
- AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITE(blktiger_bankswitch_w)
+ AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(soundlatch_byte_w)
+ AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1") AM_WRITE(blktiger_bankswitch_w)
AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
- AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW0") AM_WRITE(blktiger_coinlockout_w)
- AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW1") AM_WRITE(blktiger_video_control_w)
+ AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW0") AM_WRITE(blktiger_coinlockout_w)
+ AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW1") AM_WRITE(blktiger_video_control_w)
AM_RANGE(0x05, 0x05) AM_READ_PORT("FREEZE")
AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
- AM_RANGE(0x07, 0x07) AM_NOP /* Software protection (7) */
+ AM_RANGE(0x07, 0x07) AM_NOP /* Software protection (7) */
AM_RANGE(0x08, 0x09) AM_WRITE(blktiger_scrollx_w)
AM_RANGE(0x0a, 0x0b) AM_WRITE(blktiger_scrolly_w)
AM_RANGE(0x0c, 0x0c) AM_WRITE(blktiger_video_enable_w)
@@ -126,7 +126,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( blktiger_mcu_io_map, AS_IO, 8, blktiger_state )
AM_RANGE(MCS51_PORT_P0,MCS51_PORT_P0) AM_READWRITE(blktiger_from_main_r,blktiger_to_main_w)
- AM_RANGE(MCS51_PORT_P1,MCS51_PORT_P3) AM_WRITENOP /* other ports unknown */
+ AM_RANGE(MCS51_PORT_P1,MCS51_PORT_P3) AM_WRITENOP /* other ports unknown */
ADDRESS_MAP_END
@@ -135,9 +135,9 @@ static INPUT_PORTS_START( blktiger )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
@@ -149,8 +149,8 @@ static INPUT_PORTS_START( blktiger )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
PORT_START("IN2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
@@ -159,11 +159,11 @@ static INPUT_PORTS_START( blktiger )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
PORT_START("DSW0")
- PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION( "SW1:1,2,3" )
+ PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION( "SW1:1,2,3" )
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
@@ -172,7 +172,7 @@ static INPUT_PORTS_START( blktiger )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_5C ) )
- PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) ) PORT_DIPLOCATION( "SW1:4,5,6" )
+ PORT_DIPNAME( 0x38, 0x38, DEF_STR( Coin_B ) ) PORT_DIPLOCATION( "SW1:4,5,6" )
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
@@ -181,20 +181,20 @@ static INPUT_PORTS_START( blktiger )
PORT_DIPSETTING( 0x28, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_5C ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION( "SW1:7" )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION( "SW1:7" )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Test ) ) PORT_DIPLOCATION( "SW1:8" )
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Test ) ) PORT_DIPLOCATION( "SW1:8" )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION( "SW2:1,2" )
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION( "SW2:1,2" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "7")
- PORT_DIPNAME( 0x1c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION( "SW2:3,4,5" )
+ PORT_DIPNAME( 0x1c, 0x0c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION( "SW2:3,4,5" )
PORT_DIPSETTING( 0x1c, "1 (Easiest)")
PORT_DIPSETTING( 0x18, "2" )
PORT_DIPSETTING( 0x14, "3" )
@@ -203,18 +203,18 @@ static INPUT_PORTS_START( blktiger )
PORT_DIPSETTING( 0x08, "6" )
PORT_DIPSETTING( 0x04, "7" )
PORT_DIPSETTING( 0x00, "8 (Hardest)" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION( "SW2:6" )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION( "SW2:6" )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION( "SW2:7" )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION( "SW2:7" )
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x40, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION( "SW2:8" )
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION( "SW2:8" )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
PORT_START("FREEZE")
- PORT_DIPNAME( 0x01, 0x01, "Freeze" ) /* could be VBLANK */
+ PORT_DIPNAME( 0x01, 0x01, "Freeze" ) /* could be VBLANK */
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -251,9 +251,9 @@ static const gfx_layout spritelayout =
};
static GFXDECODE_START( blktiger )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0x300, 32 ) /* colors 0x300-0x37f */
- GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0x000, 16 ) /* colors 0x000-0x0ff */
- GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x200, 8 ) /* colors 0x200-0x27f */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0x300, 32 ) /* colors 0x300-0x37f */
+ GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0x000, 16 ) /* colors 0x000-0x0ff */
+ GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x200, 8 ) /* colors 0x200-0x27f */
GFXDECODE_END
@@ -314,7 +314,7 @@ void blktiger_state::machine_reset()
static MACHINE_CONFIG_START( blktiger, blktiger_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, XTAL_24MHz/4) /* verified on pcb */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_24MHz/4) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(blktiger_map)
MCFG_CPU_IO_MAP(blktiger_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", blktiger_state, irq0_line_hold)
@@ -368,12 +368,12 @@ MACHINE_CONFIG_END
***************************************************************************/
ROM_START( blktiger )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
- ROM_LOAD( "bdu-01a.5e", 0x00000, 0x08000, CRC(a8f98f22) SHA1(f77c0d0ebf3e52a21d2c0c5004350a408b8e6d24) ) /* CODE */
- ROM_LOAD( "bdu-02a.6e", 0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) ) /* 0+1 */
- ROM_LOAD( "bdu-03a.8e", 0x20000, 0x10000, CRC(4089e157) SHA1(7972b1c745057802d4fd66d88b0101eb3c03e701) ) /* 2+3 */
- ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
- ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
+ ROM_LOAD( "bdu-01a.5e", 0x00000, 0x08000, CRC(a8f98f22) SHA1(f77c0d0ebf3e52a21d2c0c5004350a408b8e6d24) ) /* CODE */
+ ROM_LOAD( "bdu-02a.6e", 0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) ) /* 0+1 */
+ ROM_LOAD( "bdu-03a.8e", 0x20000, 0x10000, CRC(4089e157) SHA1(7972b1c745057802d4fd66d88b0101eb3c03e701) ) /* 2+3 */
+ ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
+ ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bd-06.1l", 0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
@@ -382,21 +382,21 @@ ROM_START( blktiger )
ROM_LOAD( "bd.6k", 0x0000, 0x1000, CRC(ac7d14f1) SHA1(46fd6b43f10312e3e8d3c9e0c0fd616af98fdbad) )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
+ ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
+ ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
ROM_LOAD( "bd-11.4b", 0x10000, 0x10000, CRC(7932c86f) SHA1(b3b1bc1e2b0db5c2eb8772f8a2c35129cc80d511) )
ROM_LOAD( "bd-14.9b", 0x20000, 0x10000, CRC(dc49593a) SHA1(e4ef42ba9f238fd43c8217657c92896f31d3912c) )
ROM_LOAD( "bd-13.8b", 0x30000, 0x10000, CRC(7ed7a122) SHA1(3acc6d4c9731db0609c2e26e3bd255847149ca33) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
+ ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
ROM_LOAD( "bd-07.4a", 0x10000, 0x10000, CRC(5fccbd27) SHA1(33c55aa9c12b3121ca5c3b4c39a9b152b6946461) )
ROM_LOAD( "bd-10.9a", 0x20000, 0x10000, CRC(fc33ccc6) SHA1(d492626a88565c2626f98ecb1d74535f1ad68e4c) )
ROM_LOAD( "bd-09.8a", 0x30000, 0x10000, CRC(f449de01) SHA1(f6b40e9eb2471b89c42ab84f4214295d284db0c3) )
- ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
+ ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
ROM_LOAD( "bd01.8j", 0x0000, 0x0100, CRC(29b459e5) SHA1(0034734a533df3dea16b7b48e072485d7f26f850) )
ROM_LOAD( "bd02.9j", 0x0100, 0x0100, CRC(8b741e66) SHA1(6c1fda59936a7217b05949f5c54b1f91f4b49dbe) )
ROM_LOAD( "bd03.11k", 0x0200, 0x0100, CRC(27201c75) SHA1(c54d87f06bfe0b0908389c005014d97156e272c2) )
@@ -404,12 +404,12 @@ ROM_START( blktiger )
ROM_END
ROM_START( blktigera )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
- ROM_LOAD( "bdu-01.5e", 0x00000, 0x08000, CRC(47b13922) SHA1(a722048d48171b68119b7ef1af6e06953c238ad6) ) /* CODE */
- ROM_LOAD( "bdu-02.6e", 0x10000, 0x10000, CRC(2e0daf1b) SHA1(dbcaf2bb1b2c9cd4b2ca1d52b81d6e33b5c7eee9) ) /* 0+1 */
- ROM_LOAD( "bdu-03.8e", 0x20000, 0x10000, CRC(3b67dfec) SHA1(f9d83f2bb1fbf05d80f6870d91411e9b7bbea917) ) /* 2+3 */
- ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
- ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
+ ROM_LOAD( "bdu-01.5e", 0x00000, 0x08000, CRC(47b13922) SHA1(a722048d48171b68119b7ef1af6e06953c238ad6) ) /* CODE */
+ ROM_LOAD( "bdu-02.6e", 0x10000, 0x10000, CRC(2e0daf1b) SHA1(dbcaf2bb1b2c9cd4b2ca1d52b81d6e33b5c7eee9) ) /* 0+1 */
+ ROM_LOAD( "bdu-03.8e", 0x20000, 0x10000, CRC(3b67dfec) SHA1(f9d83f2bb1fbf05d80f6870d91411e9b7bbea917) ) /* 2+3 */
+ ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
+ ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bd-06.1l", 0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
@@ -418,21 +418,21 @@ ROM_START( blktigera )
ROM_LOAD( "bd.6k", 0x0000, 0x1000, CRC(ac7d14f1) SHA1(46fd6b43f10312e3e8d3c9e0c0fd616af98fdbad) )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
+ ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
+ ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
ROM_LOAD( "bd-11.4b", 0x10000, 0x10000, CRC(7932c86f) SHA1(b3b1bc1e2b0db5c2eb8772f8a2c35129cc80d511) )
ROM_LOAD( "bd-14.9b", 0x20000, 0x10000, CRC(dc49593a) SHA1(e4ef42ba9f238fd43c8217657c92896f31d3912c) )
ROM_LOAD( "bd-13.8b", 0x30000, 0x10000, CRC(7ed7a122) SHA1(3acc6d4c9731db0609c2e26e3bd255847149ca33) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
+ ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
ROM_LOAD( "bd-07.4a", 0x10000, 0x10000, CRC(5fccbd27) SHA1(33c55aa9c12b3121ca5c3b4c39a9b152b6946461) )
ROM_LOAD( "bd-10.9a", 0x20000, 0x10000, CRC(fc33ccc6) SHA1(d492626a88565c2626f98ecb1d74535f1ad68e4c) )
ROM_LOAD( "bd-09.8a", 0x30000, 0x10000, CRC(f449de01) SHA1(f6b40e9eb2471b89c42ab84f4214295d284db0c3) )
- ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
+ ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
ROM_LOAD( "bd01.8j", 0x0000, 0x0100, CRC(29b459e5) SHA1(0034734a533df3dea16b7b48e072485d7f26f850) )
ROM_LOAD( "bd02.9j", 0x0100, 0x0100, CRC(8b741e66) SHA1(6c1fda59936a7217b05949f5c54b1f91f4b49dbe) )
ROM_LOAD( "bd03.11k", 0x0200, 0x0100, CRC(27201c75) SHA1(c54d87f06bfe0b0908389c005014d97156e272c2) )
@@ -440,32 +440,32 @@ ROM_START( blktigera )
ROM_END
ROM_START( blktigerb1 )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
- ROM_LOAD( "btiger1.f6", 0x00000, 0x08000, CRC(9d8464e8) SHA1(c847ee9a22b8b636e85427214747e6bd779023e8) ) /* CODE */
- ROM_LOAD( "bdu-02a.6e", 0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) ) /* 0+1 */
- ROM_LOAD( "btiger3.j6", 0x20000, 0x10000, CRC(52c56ed1) SHA1(b6ea61869dcfcedb8cfc14c613440e3f4649866f) ) /* 2+3 */
- ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
- ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
+ ROM_LOAD( "btiger1.f6", 0x00000, 0x08000, CRC(9d8464e8) SHA1(c847ee9a22b8b636e85427214747e6bd779023e8) ) /* CODE */
+ ROM_LOAD( "bdu-02a.6e", 0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) ) /* 0+1 */
+ ROM_LOAD( "btiger3.j6", 0x20000, 0x10000, CRC(52c56ed1) SHA1(b6ea61869dcfcedb8cfc14c613440e3f4649866f) ) /* 2+3 */
+ ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
+ ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bd-06.1l", 0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
+ ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
+ ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
ROM_LOAD( "bd-11.4b", 0x10000, 0x10000, CRC(7932c86f) SHA1(b3b1bc1e2b0db5c2eb8772f8a2c35129cc80d511) )
ROM_LOAD( "bd-14.9b", 0x20000, 0x10000, CRC(dc49593a) SHA1(e4ef42ba9f238fd43c8217657c92896f31d3912c) )
ROM_LOAD( "bd-13.8b", 0x30000, 0x10000, CRC(7ed7a122) SHA1(3acc6d4c9731db0609c2e26e3bd255847149ca33) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
+ ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
ROM_LOAD( "bd-07.4a", 0x10000, 0x10000, CRC(5fccbd27) SHA1(33c55aa9c12b3121ca5c3b4c39a9b152b6946461) )
ROM_LOAD( "bd-10.9a", 0x20000, 0x10000, CRC(fc33ccc6) SHA1(d492626a88565c2626f98ecb1d74535f1ad68e4c) )
ROM_LOAD( "bd-09.8a", 0x30000, 0x10000, CRC(f449de01) SHA1(f6b40e9eb2471b89c42ab84f4214295d284db0c3) )
- ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
+ ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
ROM_LOAD( "bd01.8j", 0x0000, 0x0100, CRC(29b459e5) SHA1(0034734a533df3dea16b7b48e072485d7f26f850) )
ROM_LOAD( "bd02.9j", 0x0100, 0x0100, CRC(8b741e66) SHA1(6c1fda59936a7217b05949f5c54b1f91f4b49dbe) )
ROM_LOAD( "bd03.11k", 0x0200, 0x0100, CRC(27201c75) SHA1(c54d87f06bfe0b0908389c005014d97156e272c2) )
@@ -473,32 +473,32 @@ ROM_START( blktigerb1 )
ROM_END
ROM_START( blktigerb2 )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
- ROM_LOAD( "1.bin", 0x00000, 0x08000, CRC(47e2b21e) SHA1(3f03543ace435239978a95f569ac89f6762253c0) ) /* CODE */
- ROM_LOAD( "bdu-02a.6e", 0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) ) /* 0+1 */
- ROM_LOAD( "3.bin", 0x20000, 0x10000, CRC(52c56ed1) SHA1(b6ea61869dcfcedb8cfc14c613440e3f4649866f) ) /* 2+3 : same crc of btiger3.j6 from bktigerb */
- ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
- ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
+ ROM_LOAD( "1.bin", 0x00000, 0x08000, CRC(47e2b21e) SHA1(3f03543ace435239978a95f569ac89f6762253c0) ) /* CODE */
+ ROM_LOAD( "bdu-02a.6e", 0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) ) /* 0+1 */
+ ROM_LOAD( "3.bin", 0x20000, 0x10000, CRC(52c56ed1) SHA1(b6ea61869dcfcedb8cfc14c613440e3f4649866f) ) /* 2+3 : same crc of btiger3.j6 from bktigerb */
+ ROM_LOAD( "bd-04.9e", 0x30000, 0x10000, CRC(ed6af6ec) SHA1(bed303c51bcddf233ad0701306d557a60ce9f5a5) ) /* 4+5 */
+ ROM_LOAD( "bd-05.10e", 0x40000, 0x10000, CRC(ae59b72e) SHA1(6e72214b71f2f337af236c8be891a18570cb6fbb) ) /* 6+7 */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bd-06.1l", 0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
+ ROM_LOAD( "bd-15.2n", 0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
+ ROM_LOAD( "bd-12.5b", 0x00000, 0x10000, CRC(c4524993) SHA1(9aa6c58004ca1117e5ac44ba8fc51e9128b921b8) ) /* tiles */
ROM_LOAD( "bd-11.4b", 0x10000, 0x10000, CRC(7932c86f) SHA1(b3b1bc1e2b0db5c2eb8772f8a2c35129cc80d511) )
ROM_LOAD( "bd-14.9b", 0x20000, 0x10000, CRC(dc49593a) SHA1(e4ef42ba9f238fd43c8217657c92896f31d3912c) )
ROM_LOAD( "bd-13.8b", 0x30000, 0x10000, CRC(7ed7a122) SHA1(3acc6d4c9731db0609c2e26e3bd255847149ca33) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
+ ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
ROM_LOAD( "bd-07.4a", 0x10000, 0x10000, CRC(5fccbd27) SHA1(33c55aa9c12b3121ca5c3b4c39a9b152b6946461) )
ROM_LOAD( "bd-10.9a", 0x20000, 0x10000, CRC(fc33ccc6) SHA1(d492626a88565c2626f98ecb1d74535f1ad68e4c) )
ROM_LOAD( "bd-09.8a", 0x30000, 0x10000, CRC(f449de01) SHA1(f6b40e9eb2471b89c42ab84f4214295d284db0c3) )
- ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
+ ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
ROM_LOAD( "bd01.8j", 0x0000, 0x0100, CRC(29b459e5) SHA1(0034734a533df3dea16b7b48e072485d7f26f850) )
ROM_LOAD( "bd02.9j", 0x0100, 0x0100, CRC(8b741e66) SHA1(6c1fda59936a7217b05949f5c54b1f91f4b49dbe) )
ROM_LOAD( "bd03.11k", 0x0200, 0x0100, CRC(27201c75) SHA1(c54d87f06bfe0b0908389c005014d97156e272c2) )
@@ -506,12 +506,12 @@ ROM_START( blktigerb2 )
ROM_END
ROM_START( blkdrgon )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
- ROM_LOAD( "bd_01.5e", 0x00000, 0x08000, CRC(27ccdfbc) SHA1(3caafe00735ba9b24d870ee61ad2cae541551024) ) /* CODE */
- ROM_LOAD( "bd_02.6e", 0x10000, 0x10000, CRC(7d39c26f) SHA1(562a3f578e109ae020f65e341c876ad7e510a311) ) /* 0+1 */
- ROM_LOAD( "bd_03.8e", 0x20000, 0x10000, CRC(d1bf3757) SHA1(b19f8b986406bde65ac7f0d55d54f87b37f5e42f) ) /* 2+3 */
- ROM_LOAD( "bd_04.9e", 0x30000, 0x10000, CRC(4d1d6680) SHA1(e137624c59392de6aaffeded99b024938360bd25) ) /* 4+5 */
- ROM_LOAD( "bd_05.10e", 0x40000, 0x10000, CRC(c8d0c45e) SHA1(66c2e5a74c5875a2c8e28740fe944bd943246ce5) ) /* 6+7 */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
+ ROM_LOAD( "bd_01.5e", 0x00000, 0x08000, CRC(27ccdfbc) SHA1(3caafe00735ba9b24d870ee61ad2cae541551024) ) /* CODE */
+ ROM_LOAD( "bd_02.6e", 0x10000, 0x10000, CRC(7d39c26f) SHA1(562a3f578e109ae020f65e341c876ad7e510a311) ) /* 0+1 */
+ ROM_LOAD( "bd_03.8e", 0x20000, 0x10000, CRC(d1bf3757) SHA1(b19f8b986406bde65ac7f0d55d54f87b37f5e42f) ) /* 2+3 */
+ ROM_LOAD( "bd_04.9e", 0x30000, 0x10000, CRC(4d1d6680) SHA1(e137624c59392de6aaffeded99b024938360bd25) ) /* 4+5 */
+ ROM_LOAD( "bd_05.10e", 0x40000, 0x10000, CRC(c8d0c45e) SHA1(66c2e5a74c5875a2c8e28740fe944bd943246ce5) ) /* 6+7 */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bd_06.1l", 0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
@@ -520,21 +520,21 @@ ROM_START( blkdrgon )
ROM_LOAD( "bd.6k", 0x0000, 0x1000, CRC(ac7d14f1) SHA1(46fd6b43f10312e3e8d3c9e0c0fd616af98fdbad) )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "bd_15.2n", 0x00000, 0x08000, CRC(3821ab29) SHA1(576f1839f63b0cad6b851d6e6a3e9dec21ac811d) ) /* characters */
+ ROM_LOAD( "bd_15.2n", 0x00000, 0x08000, CRC(3821ab29) SHA1(576f1839f63b0cad6b851d6e6a3e9dec21ac811d) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "bd_12.5b", 0x00000, 0x10000, CRC(22d0a4b0) SHA1(f9402ea9ffedcb280497a63c5eb352de9d4ca3fd) ) /* tiles */
+ ROM_LOAD( "bd_12.5b", 0x00000, 0x10000, CRC(22d0a4b0) SHA1(f9402ea9ffedcb280497a63c5eb352de9d4ca3fd) ) /* tiles */
ROM_LOAD( "bd_11.4b", 0x10000, 0x10000, CRC(c8b5fc52) SHA1(621e899285ce6302e5b25d133d9cd52c09b7b202) )
ROM_LOAD( "bd_14.9b", 0x20000, 0x10000, CRC(9498c378) SHA1(841934ddef724faf04162c4be4aea1684d8d8e0f) )
ROM_LOAD( "bd_13.8b", 0x30000, 0x10000, CRC(5b0df8ce) SHA1(57d10b48bd61b0224ce21b36bde8d2479e8e5df4) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "bd_08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
+ ROM_LOAD( "bd_08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
ROM_LOAD( "bd_07.4a", 0x10000, 0x10000, CRC(5fccbd27) SHA1(33c55aa9c12b3121ca5c3b4c39a9b152b6946461) )
ROM_LOAD( "bd_10.9a", 0x20000, 0x10000, CRC(fc33ccc6) SHA1(d492626a88565c2626f98ecb1d74535f1ad68e4c) )
ROM_LOAD( "bd_09.8a", 0x30000, 0x10000, CRC(f449de01) SHA1(f6b40e9eb2471b89c42ab84f4214295d284db0c3) )
- ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
+ ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
ROM_LOAD( "bd01.8j", 0x0000, 0x0100, CRC(29b459e5) SHA1(0034734a533df3dea16b7b48e072485d7f26f850) )
ROM_LOAD( "bd02.9j", 0x0100, 0x0100, CRC(8b741e66) SHA1(6c1fda59936a7217b05949f5c54b1f91f4b49dbe) )
ROM_LOAD( "bd03.11k", 0x0200, 0x0100, CRC(27201c75) SHA1(c54d87f06bfe0b0908389c005014d97156e272c2) )
@@ -543,32 +543,32 @@ ROM_END
ROM_START( blkdrgonb )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
- ROM_LOAD( "a1", 0x00000, 0x08000, CRC(7caf2ba0) SHA1(57b17caff67d36b24075f5865d433bfc8bcc9bc2) ) /* CODE */
- ROM_LOAD( "blkdrgon.6e", 0x10000, 0x10000, CRC(7d39c26f) SHA1(562a3f578e109ae020f65e341c876ad7e510a311) ) /* 0+1 */
- ROM_LOAD( "a3", 0x20000, 0x10000, CRC(f4cd0f39) SHA1(9efc5161c861c7ec8ae72509e71c6d7b71b22fc6) ) /* 2+3 */
- ROM_LOAD( "blkdrgon.9e", 0x30000, 0x10000, CRC(4d1d6680) SHA1(e137624c59392de6aaffeded99b024938360bd25) ) /* 4+5 */
- ROM_LOAD( "blkdrgon.10e", 0x40000, 0x10000, CRC(c8d0c45e) SHA1(66c2e5a74c5875a2c8e28740fe944bd943246ce5) ) /* 6+7 */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for code + banked ROMs images */
+ ROM_LOAD( "a1", 0x00000, 0x08000, CRC(7caf2ba0) SHA1(57b17caff67d36b24075f5865d433bfc8bcc9bc2) ) /* CODE */
+ ROM_LOAD( "blkdrgon.6e", 0x10000, 0x10000, CRC(7d39c26f) SHA1(562a3f578e109ae020f65e341c876ad7e510a311) ) /* 0+1 */
+ ROM_LOAD( "a3", 0x20000, 0x10000, CRC(f4cd0f39) SHA1(9efc5161c861c7ec8ae72509e71c6d7b71b22fc6) ) /* 2+3 */
+ ROM_LOAD( "blkdrgon.9e", 0x30000, 0x10000, CRC(4d1d6680) SHA1(e137624c59392de6aaffeded99b024938360bd25) ) /* 4+5 */
+ ROM_LOAD( "blkdrgon.10e", 0x40000, 0x10000, CRC(c8d0c45e) SHA1(66c2e5a74c5875a2c8e28740fe944bd943246ce5) ) /* 6+7 */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bd-06.1l", 0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
ROM_REGION( 0x08000, "gfx1", 0 )
- ROM_LOAD( "b5", 0x00000, 0x08000, CRC(852ad2b7) SHA1(9f30c0d7e1127589b03d8f45ea50e0f907181a4b) ) /* characters */
+ ROM_LOAD( "b5", 0x00000, 0x08000, CRC(852ad2b7) SHA1(9f30c0d7e1127589b03d8f45ea50e0f907181a4b) ) /* characters */
ROM_REGION( 0x40000, "gfx2", 0 )
- ROM_LOAD( "blkdrgon.5b", 0x00000, 0x10000, CRC(22d0a4b0) SHA1(f9402ea9ffedcb280497a63c5eb352de9d4ca3fd) ) /* tiles */
+ ROM_LOAD( "blkdrgon.5b", 0x00000, 0x10000, CRC(22d0a4b0) SHA1(f9402ea9ffedcb280497a63c5eb352de9d4ca3fd) ) /* tiles */
ROM_LOAD( "b1", 0x10000, 0x10000, CRC(053ab15c) SHA1(f0ddc71009ab5dd69ae463c3636ec2332c0556f8) )
ROM_LOAD( "blkdrgon.9b", 0x20000, 0x10000, CRC(9498c378) SHA1(841934ddef724faf04162c4be4aea1684d8d8e0f) )
ROM_LOAD( "b3", 0x30000, 0x10000, CRC(9dc6e943) SHA1(0818c1fb2cc8ff403a479457b268bba6ec0730bc) )
ROM_REGION( 0x40000, "gfx3", 0 )
- ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
+ ROM_LOAD( "bd-08.5a", 0x00000, 0x10000, CRC(e2f17438) SHA1(3e5fdae07d40febedc59c7c7c4d9c6f0d72b58b5) ) /* sprites */
ROM_LOAD( "bd-07.4a", 0x10000, 0x10000, CRC(5fccbd27) SHA1(33c55aa9c12b3121ca5c3b4c39a9b152b6946461) )
ROM_LOAD( "bd-10.9a", 0x20000, 0x10000, CRC(fc33ccc6) SHA1(d492626a88565c2626f98ecb1d74535f1ad68e4c) )
ROM_LOAD( "bd-09.8a", 0x30000, 0x10000, CRC(f449de01) SHA1(f6b40e9eb2471b89c42ab84f4214295d284db0c3) )
- ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
+ ROM_REGION( 0x0400, "proms", 0 ) /* PROMs (function unknown) */
ROM_LOAD( "bd01.8j", 0x0000, 0x0100, CRC(29b459e5) SHA1(0034734a533df3dea16b7b48e072485d7f26f850) )
ROM_LOAD( "bd02.9j", 0x0100, 0x0100, CRC(8b741e66) SHA1(6c1fda59936a7217b05949f5c54b1f91f4b49dbe) )
ROM_LOAD( "bd03.11k", 0x0200, 0x0100, CRC(27201c75) SHA1(c54d87f06bfe0b0908389c005014d97156e272c2) )
diff --git a/src/mame/drivers/blmbycar.c b/src/mame/drivers/blmbycar.c
index 83026fb4edc..89cf64cbeb9 100644
--- a/src/mame/drivers/blmbycar.c
+++ b/src/mame/drivers/blmbycar.c
@@ -101,28 +101,28 @@ READ16_MEMBER(blmbycar_state::blmbycar_opt_wheel_r)
static ADDRESS_MAP_START( blmbycar_map, AS_PROGRAM, 16, blmbycar_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0xfec000, 0xfeffff) AM_RAM
- AM_RANGE(0x100000, 0x103fff) AM_WRITEONLY // ???
- AM_RANGE(0x104000, 0x105fff) AM_RAM_WRITE(blmbycar_vram_1_w) AM_SHARE("vram_1") // Layer 1
- AM_RANGE(0x106000, 0x107fff) AM_RAM_WRITE(blmbycar_vram_0_w) AM_SHARE("vram_0") // Layer 0
- AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ???
- AM_RANGE(0x10c000, 0x10c003) AM_WRITEONLY AM_SHARE("scroll_1") // Scroll 1
- AM_RANGE(0x10c004, 0x10c007) AM_WRITEONLY AM_SHARE("scroll_0") // Scroll 0
- AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(blmbycar_palette_w) // Palette
+ AM_RANGE(0x100000, 0x103fff) AM_WRITEONLY // ???
+ AM_RANGE(0x104000, 0x105fff) AM_RAM_WRITE(blmbycar_vram_1_w) AM_SHARE("vram_1") // Layer 1
+ AM_RANGE(0x106000, 0x107fff) AM_RAM_WRITE(blmbycar_vram_0_w) AM_SHARE("vram_0") // Layer 0
+ AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ???
+ AM_RANGE(0x10c000, 0x10c003) AM_WRITEONLY AM_SHARE("scroll_1") // Scroll 1
+ AM_RANGE(0x10c004, 0x10c007) AM_WRITEONLY AM_SHARE("scroll_0") // Scroll 0
+ AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(blmbycar_palette_w) // Palette
AM_RANGE(0x200600, 0x203fff) AM_RAM
- AM_RANGE(0x204000, 0x2045ff) AM_RAM_WRITE(blmbycar_palette_w) AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x204000, 0x2045ff) AM_RAM_WRITE(blmbycar_palette_w) AM_SHARE("paletteram") // Palette
AM_RANGE(0x204600, 0x207fff) AM_RAM
AM_RANGE(0x440000, 0x441fff) AM_RAM
AM_RANGE(0x444000, 0x445fff) AM_WRITEONLY AM_SHARE("spriteram")// Sprites (size?)
AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW")
AM_RANGE(0x700002, 0x700003) AM_READ_PORT("P1_P2")
- AM_RANGE(0x700004, 0x700005) AM_READ(blmbycar_opt_wheel_r) // Wheel (optical)
+ AM_RANGE(0x700004, 0x700005) AM_READ(blmbycar_opt_wheel_r) // Wheel (optical)
AM_RANGE(0x700006, 0x700007) AM_READ_PORT("UNK")
- AM_RANGE(0x700008, 0x700009) AM_READ(blmbycar_pot_wheel_r) // Wheel (potentiometer)
- AM_RANGE(0x70000a, 0x70000b) AM_WRITENOP // ? Wheel
- AM_RANGE(0x70000c, 0x70000d) AM_WRITE(blmbycar_okibank_w) // Sound
- AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // Sound
- AM_RANGE(0x70006a, 0x70006b) AM_WRITE(blmbycar_pot_wheel_reset_w) // Wheel (potentiometer)
- AM_RANGE(0x70007a, 0x70007b) AM_WRITE(blmbycar_pot_wheel_shift_w) //
+ AM_RANGE(0x700008, 0x700009) AM_READ(blmbycar_pot_wheel_r) // Wheel (potentiometer)
+ AM_RANGE(0x70000a, 0x70000b) AM_WRITENOP // ? Wheel
+ AM_RANGE(0x70000c, 0x70000d) AM_WRITE(blmbycar_okibank_w) // Sound
+ AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) // Sound
+ AM_RANGE(0x70006a, 0x70006b) AM_WRITE(blmbycar_pot_wheel_reset_w) // Wheel (potentiometer)
+ AM_RANGE(0x70007a, 0x70007b) AM_WRITE(blmbycar_pot_wheel_shift_w) //
ADDRESS_MAP_END
READ16_MEMBER(blmbycar_state::waterball_unk_r)
@@ -135,25 +135,25 @@ READ16_MEMBER(blmbycar_state::waterball_unk_r)
static ADDRESS_MAP_START( watrball_map, AS_PROGRAM, 16, blmbycar_state )
AM_RANGE(0x000000, 0x0fffff) AM_ROM
AM_RANGE(0xfec000, 0xfeffff) AM_RAM
- AM_RANGE(0x100000, 0x103fff) AM_WRITEONLY // ???
- AM_RANGE(0x104000, 0x105fff) AM_RAM_WRITE(blmbycar_vram_1_w) AM_SHARE("vram_1") // Layer 1
- AM_RANGE(0x106000, 0x107fff) AM_RAM_WRITE(blmbycar_vram_0_w) AM_SHARE("vram_0") // Layer 0
- AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ???
- AM_RANGE(0x10c000, 0x10c003) AM_WRITEONLY AM_SHARE("scroll_1") // Scroll 1
- AM_RANGE(0x10c004, 0x10c007) AM_WRITEONLY AM_SHARE("scroll_0") // Scroll 0
- AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(blmbycar_palette_w) // Palette
+ AM_RANGE(0x100000, 0x103fff) AM_WRITEONLY // ???
+ AM_RANGE(0x104000, 0x105fff) AM_RAM_WRITE(blmbycar_vram_1_w) AM_SHARE("vram_1") // Layer 1
+ AM_RANGE(0x106000, 0x107fff) AM_RAM_WRITE(blmbycar_vram_0_w) AM_SHARE("vram_0") // Layer 0
+ AM_RANGE(0x108000, 0x10bfff) AM_WRITEONLY // ???
+ AM_RANGE(0x10c000, 0x10c003) AM_WRITEONLY AM_SHARE("scroll_1") // Scroll 1
+ AM_RANGE(0x10c004, 0x10c007) AM_WRITEONLY AM_SHARE("scroll_0") // Scroll 0
+ AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(blmbycar_palette_w) // Palette
AM_RANGE(0x200600, 0x203fff) AM_RAM
- AM_RANGE(0x204000, 0x2045ff) AM_RAM_WRITE(blmbycar_palette_w) AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x204000, 0x2045ff) AM_RAM_WRITE(blmbycar_palette_w) AM_SHARE("paletteram") // Palette
AM_RANGE(0x204600, 0x207fff) AM_RAM
AM_RANGE(0x440000, 0x441fff) AM_RAM
AM_RANGE(0x444000, 0x445fff) AM_WRITEONLY AM_SHARE("spriteram")// Sprites (size?)
AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW")
AM_RANGE(0x700002, 0x700003) AM_READ_PORT("P1_P2")
- AM_RANGE(0x700006, 0x700007) AM_READNOP // read
- AM_RANGE(0x700008, 0x700009) AM_READ(waterball_unk_r) // 0x0008 must toggle
- AM_RANGE(0x70000a, 0x70000b) AM_WRITEONLY // ?? busy
- AM_RANGE(0x70000c, 0x70000d) AM_WRITE(blmbycar_okibank_w) // Sound
- AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) //
+ AM_RANGE(0x700006, 0x700007) AM_READNOP // read
+ AM_RANGE(0x700008, 0x700009) AM_READ(waterball_unk_r) // 0x0008 must toggle
+ AM_RANGE(0x70000a, 0x70000b) AM_WRITEONLY // ?? busy
+ AM_RANGE(0x70000c, 0x70000d) AM_WRITE(blmbycar_okibank_w) // Sound
+ AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff) //
ADDRESS_MAP_END
/***************************************************************************
@@ -166,7 +166,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( blmbycar )
- PORT_START("DSW") /* $700000.w */
+ PORT_START("DSW") /* $700000.w */
PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:8,7")
PORT_DIPSETTING( 0x0002, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0003, DEF_STR( Normal ) )
@@ -213,9 +213,9 @@ static INPUT_PORTS_START( blmbycar )
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_START("P1_P2") /* $700002.w */
+ PORT_START("P1_P2") /* $700002.w */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
- PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
@@ -224,7 +224,7 @@ static INPUT_PORTS_START( blmbycar )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
- PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
+ PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
@@ -232,10 +232,10 @@ static INPUT_PORTS_START( blmbycar )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 )
- PORT_START("WHEEL") /* $700004.w */
+ PORT_START("WHEEL") /* $700004.w */
PORT_BIT ( 0x00ff, 0x0080, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(1)
- PORT_START("UNK") /* $700006.w */
+ PORT_START("UNK") /* $700006.w */
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
@@ -282,7 +282,7 @@ static INPUT_PORTS_START( watrball )
PORT_START("P1_P2")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
- PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
@@ -291,7 +291,7 @@ static INPUT_PORTS_START( watrball )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
- PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
+ PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
@@ -353,7 +353,7 @@ MACHINE_RESET_MEMBER(blmbycar_state,blmbycar)
static MACHINE_CONFIG_START( blmbycar, blmbycar_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 10000000) /* ? */
+ MCFG_CPU_ADD("maincpu", M68000, 10000000) /* ? */
MCFG_CPU_PROGRAM_MAP(blmbycar_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", blmbycar_state, irq1_line_hold)
@@ -396,7 +396,7 @@ MACHINE_RESET_MEMBER(blmbycar_state,watrball)
static MACHINE_CONFIG_START( watrball, blmbycar_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 10000000) /* ? */
+ MCFG_CPU_ADD("maincpu", M68000, 10000000) /* ? */
MCFG_CPU_PROGRAM_MAP(watrball_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", blmbycar_state, irq1_line_hold)
@@ -446,34 +446,34 @@ GFX : TI TPC1020AFN-084
***************************************************************************/
ROM_START( blmbycar )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "bcrom4.bin", 0x000000, 0x080000, CRC(06d490ba) SHA1(6d113561b474bf613c6b91c9525a52025ae65ab7) )
ROM_LOAD16_BYTE( "bcrom6.bin", 0x000001, 0x080000, CRC(33aca664) SHA1(04fff492654d3edac62e9d35808e5946bcc78cbb) )
- ROM_REGION( 0x200000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x200000, "sprites", 0 ) /* Sprites */
ROM_LOAD( "bc_rom7", 0x000000, 0x080000, CRC(e55ca79b) SHA1(4453a6ae0518832f437ab701c28cb2f32920f8ba) )
ROM_LOAD( "bc_rom8", 0x080000, 0x080000, CRC(cdf38c96) SHA1(3273c29b6a01a7296d06fc653120f8c615195d2c) )
ROM_LOAD( "bc_rom9", 0x100000, 0x080000, CRC(0337ab3d) SHA1(18c72cd640c7b599390dffaeb670f5832202bf06) )
ROM_LOAD( "bc_rom10", 0x180000, 0x080000, CRC(5458917e) SHA1(c8dd5a391cc20a573e27a140b185893a8c04859e) )
- ROM_REGION( 0x140000, "oki", 0 ) /* 8 bit adpcm (banked) */
+ ROM_REGION( 0x140000, "oki", 0 ) /* 8 bit adpcm (banked) */
ROM_LOAD( "bc_rom1", 0x040000, 0x080000, CRC(ac6f8ba1) SHA1(69d2d47cdd331bde5a8973d29659b3f8520452e7) )
ROM_LOAD( "bc_rom2", 0x0c0000, 0x080000, CRC(a4bc31bf) SHA1(f3d60141a91449a73f6cec9f4bc5d95ca7911e19) )
ROM_COPY( "oki", 0x040000, 0x000000, 0x040000 )
ROM_END
ROM_START( blmbycaru )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "bc_rom4", 0x000000, 0x080000, CRC(76f054a2) SHA1(198efd152b13033e5249119ca48b9e0f6351b0b9) )
ROM_LOAD16_BYTE( "bc_rom6", 0x000001, 0x080000, CRC(2570b4c5) SHA1(706465950023a6ef7c85ceb9c76246d7556b3859) )
- ROM_REGION( 0x200000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x200000, "sprites", 0 ) /* Sprites */
ROM_LOAD( "bc_rom7", 0x000000, 0x080000, CRC(e55ca79b) SHA1(4453a6ae0518832f437ab701c28cb2f32920f8ba) )
ROM_LOAD( "bc_rom8", 0x080000, 0x080000, CRC(cdf38c96) SHA1(3273c29b6a01a7296d06fc653120f8c615195d2c) )
ROM_LOAD( "bc_rom9", 0x100000, 0x080000, CRC(0337ab3d) SHA1(18c72cd640c7b599390dffaeb670f5832202bf06) )
ROM_LOAD( "bc_rom10", 0x180000, 0x080000, CRC(5458917e) SHA1(c8dd5a391cc20a573e27a140b185893a8c04859e) )
- ROM_REGION( 0x140000, "oki", 0 ) /* 8 bit adpcm (banked) */
+ ROM_REGION( 0x140000, "oki", 0 ) /* 8 bit adpcm (banked) */
ROM_LOAD( "bc_rom1", 0x040000, 0x080000, CRC(ac6f8ba1) SHA1(69d2d47cdd331bde5a8973d29659b3f8520452e7) )
ROM_LOAD( "bc_rom2", 0x0c0000, 0x080000, CRC(a4bc31bf) SHA1(f3d60141a91449a73f6cec9f4bc5d95ca7911e19) )
ROM_COPY( "oki", 0x040000, 0x000000, 0x040000 )
@@ -496,17 +496,17 @@ The game has fonts identical to World rally and obiviously Blomby car ;)
*/
ROM_START( watrball )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "rom4.bin", 0x000000, 0x020000, CRC(bfbfa720) SHA1(d6d14c0ba545eb7adee7190da2d3db1c6dd00d75) )
ROM_LOAD16_BYTE( "rom6.bin", 0x000001, 0x020000, CRC(acff9b01) SHA1(b85671bcc4f03fdf05eb1c9b5d4143e33ec1d7db) )
- ROM_REGION( 0x200000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x200000, "sprites", 0 ) /* Sprites */
ROM_LOAD( "rom7.bin", 0x000000, 0x080000, CRC(e7e5c311) SHA1(5af1a666bf23c5505d120d81fb942f5c49341861) )
ROM_LOAD( "rom8.bin", 0x080000, 0x080000, CRC(fd27ce6e) SHA1(a472a8cc25818427d2870518649780146e51835b) )
ROM_LOAD( "rom9.bin", 0x100000, 0x080000, CRC(122cc0ad) SHA1(27cdb19fa082089e47c5cdb44742cfd93aa23a00) )
ROM_LOAD( "rom10.bin", 0x180000, 0x080000, CRC(22a2a706) SHA1(c7350a94a857e0007d7fc0076b44a3d62693cb6c) )
- ROM_REGION( 0x140000, "oki", 0 ) /* 8 bit adpcm (banked) */
+ ROM_REGION( 0x140000, "oki", 0 ) /* 8 bit adpcm (banked) */
ROM_LOAD( "rom1.bin", 0x040000, 0x080000, CRC(7f88dee7) SHA1(d493b961fa4631185a33faee7f61786430707209))
// ROM_LOAD( "rom2.bin", 0x0c0000, 0x080000, /* not populated for this game */ )
ROM_COPY( "oki", 0x040000, 0x000000, 0x040000 )
diff --git a/src/mame/drivers/blockade.c b/src/mame/drivers/blockade.c
index 685e6dd1741..8fcfa0c14d3 100644
--- a/src/mame/drivers/blockade.c
+++ b/src/mame/drivers/blockade.c
@@ -107,7 +107,7 @@ WRITE8_MEMBER(blockade_state::blockade_coin_latch_w)
if (BLOCKADE_LOG) mame_printf_debug("Pin 19 Low\n");
}
- return;
+ return;
}
@@ -118,18 +118,18 @@ WRITE8_MEMBER(blockade_state::blockade_coin_latch_w)
*************************************/
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, blockade_state )
- AM_RANGE(0x0000, 0x07ff) AM_ROM AM_MIRROR(0x6000)
- AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(blockade_videoram_w) AM_SHARE("videoram") AM_MIRROR(0x6c00)
- AM_RANGE(0x9000, 0x90ff) AM_RAM AM_MIRROR(0x6f00)
+ AM_RANGE(0x0000, 0x07ff) AM_ROM AM_MIRROR(0x6000)
+ AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(blockade_videoram_w) AM_SHARE("videoram") AM_MIRROR(0x6c00)
+ AM_RANGE(0x9000, 0x90ff) AM_RAM AM_MIRROR(0x6f00)
ADDRESS_MAP_END
static ADDRESS_MAP_START( main_io_map, AS_IO, 8, blockade_state )
- AM_RANGE(0x01, 0x01) AM_READWRITE(blockade_input_port_0_r, blockade_coin_latch_w)
- AM_RANGE(0x02, 0x02) AM_READ_PORT("IN1")
- AM_RANGE(0x02, 0x02) AM_WRITE(blockade_sound_freq_w)
- AM_RANGE(0x04, 0x04) AM_READ_PORT("IN2")
- AM_RANGE(0x04, 0x04) AM_WRITE(blockade_env_on_w)
- AM_RANGE(0x08, 0x08) AM_WRITE(blockade_env_off_w)
+ AM_RANGE(0x01, 0x01) AM_READWRITE(blockade_input_port_0_r, blockade_coin_latch_w)
+ AM_RANGE(0x02, 0x02) AM_READ_PORT("IN1")
+ AM_RANGE(0x02, 0x02) AM_WRITE(blockade_sound_freq_w)
+ AM_RANGE(0x04, 0x04) AM_READ_PORT("IN2")
+ AM_RANGE(0x04, 0x04) AM_WRITE(blockade_env_on_w)
+ AM_RANGE(0x08, 0x08) AM_WRITE(blockade_env_off_w)
ADDRESS_MAP_END
@@ -149,14 +149,14 @@ static INPUT_PORTS_START( blockade )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_CONFNAME( 0x04, 0x04, "Boom Switch" )
- PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
- PORT_CONFSETTING( 0x04, DEF_STR( On ) )
+ PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
+ PORT_CONFSETTING( 0x04, DEF_STR( On ) )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_CONFNAME( 0x70, 0x70, DEF_STR( Lives ) )
- PORT_CONFSETTING( 0x60, "3" )
- PORT_CONFSETTING( 0x50, "4" )
- PORT_CONFSETTING( 0x30, "5" )
- PORT_CONFSETTING( 0x70, "6" )
+ PORT_CONFSETTING( 0x60, "3" )
+ PORT_CONFSETTING( 0x50, "4" )
+ PORT_CONFSETTING( 0x30, "5" )
+ PORT_CONFSETTING( 0x70, "6" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
/* this is really used for the coin latch, */
/* see blockade_interrupt() */
@@ -191,11 +191,11 @@ static INPUT_PORTS_START( comotion )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_CONFNAME( 0x04, 0x04, "Boom Switch" )
- PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
- PORT_CONFSETTING( 0x04, DEF_STR( On ) )
+ PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
+ PORT_CONFSETTING( 0x04, DEF_STR( On ) )
PORT_CONFNAME( 0x08, 0x00, DEF_STR( Lives ) )
- PORT_CONFSETTING( 0x00, "3" )
- PORT_CONFSETTING( 0x08, "4" )
+ PORT_CONFSETTING( 0x00, "3" )
+ PORT_CONFSETTING( 0x08, "4" )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -508,69 +508,69 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( blockade )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "316-04.u2", 0x0000, 0x0400, CRC(a93833e9) SHA1(e29e7b29900f8305effa700a53806a12bf9d37bd) )
- ROM_LOAD_NIB_LOW( "316-03.u3", 0x0000, 0x0400, CRC(85960d3b) SHA1(aabfe8f9c26126299d6c07a31ef1aac5300deff5) )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD_NIB_HIGH( "316-04.u2", 0x0000, 0x0400, CRC(a93833e9) SHA1(e29e7b29900f8305effa700a53806a12bf9d37bd) )
+ ROM_LOAD_NIB_LOW( "316-03.u3", 0x0000, 0x0400, CRC(85960d3b) SHA1(aabfe8f9c26126299d6c07a31ef1aac5300deff5) )
- ROM_REGION( 0x100, "gfx1", 0 )
- ROM_LOAD_NIB_HIGH( "316-02.u29", 0x0000, 0x0100, CRC(409f610f) SHA1(0c2253f4b72d8aa395f87cc0abe07f0b46fa538b) )
- ROM_LOAD_NIB_LOW( "316-01.u43", 0x0000, 0x0100, CRC(41a00b28) SHA1(2d0a90aac9d10a1ded240e5202fdf9cd7f70c4a7) )
+ ROM_REGION( 0x100, "gfx1", 0 )
+ ROM_LOAD_NIB_HIGH( "316-02.u29", 0x0000, 0x0100, CRC(409f610f) SHA1(0c2253f4b72d8aa395f87cc0abe07f0b46fa538b) )
+ ROM_LOAD_NIB_LOW( "316-01.u43", 0x0000, 0x0100, CRC(41a00b28) SHA1(2d0a90aac9d10a1ded240e5202fdf9cd7f70c4a7) )
ROM_END
ROM_START( comotion )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "316-07.u2", 0x0000, 0x0400, CRC(5b9bd054) SHA1(324b844788945e7bc82d096d6d375e79e3e1a634) )
- ROM_LOAD_NIB_LOW( "316-08.u3", 0x0000, 0x0400, CRC(1a856042) SHA1(91bdc260e8c88ce2b6ac05bfba043ed611bc30de) )
- ROM_LOAD_NIB_HIGH( "316-09.u4", 0x0400, 0x0400, CRC(2590f87c) SHA1(95a7af04b610d79fb3f6d74dda322e66164b9484) )
- ROM_LOAD_NIB_LOW( "316-10.u5", 0x0400, 0x0400, CRC(fb49a69b) SHA1(4009c3256a86508d981c1f77b65e6bff1face1e7) )
-
- ROM_REGION( 0x100, "gfx1", 0 )
- ROM_LOAD_NIB_HIGH( "316-06.u43", 0x0000, 0x0100, CRC(8f071297) SHA1(811471c87b77b4b9ab056cf0c0743fc2616b754c) ) /* Note: these are reversed */
- ROM_LOAD_NIB_LOW( "316-05.u29", 0x0000, 0x0100, CRC(53fb8821) SHA1(0a499aa4cf15f7ebea155aacd914de8851544215) )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD_NIB_HIGH( "316-07.u2", 0x0000, 0x0400, CRC(5b9bd054) SHA1(324b844788945e7bc82d096d6d375e79e3e1a634) )
+ ROM_LOAD_NIB_LOW( "316-08.u3", 0x0000, 0x0400, CRC(1a856042) SHA1(91bdc260e8c88ce2b6ac05bfba043ed611bc30de) )
+ ROM_LOAD_NIB_HIGH( "316-09.u4", 0x0400, 0x0400, CRC(2590f87c) SHA1(95a7af04b610d79fb3f6d74dda322e66164b9484) )
+ ROM_LOAD_NIB_LOW( "316-10.u5", 0x0400, 0x0400, CRC(fb49a69b) SHA1(4009c3256a86508d981c1f77b65e6bff1face1e7) )
+
+ ROM_REGION( 0x100, "gfx1", 0 )
+ ROM_LOAD_NIB_HIGH( "316-06.u43", 0x0000, 0x0100, CRC(8f071297) SHA1(811471c87b77b4b9ab056cf0c0743fc2616b754c) ) /* Note: these are reversed */
+ ROM_LOAD_NIB_LOW( "316-05.u29", 0x0000, 0x0100, CRC(53fb8821) SHA1(0a499aa4cf15f7ebea155aacd914de8851544215) )
ROM_END
ROM_START( blasto )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "blasto.u2", 0x0000, 0x0400, CRC(ec99d043) SHA1(10650e54bf55f3ace5c199215c2fce211916d3b7) )
- ROM_LOAD_NIB_LOW( "blasto.u3", 0x0000, 0x0400, CRC(be333415) SHA1(386cab720f0c2da16b9ec84f67ccebf23406c58d) )
- ROM_LOAD_NIB_HIGH( "blasto.u4", 0x0400, 0x0400, CRC(1c889993) SHA1(e23c72d075cf3d209081bca5a953c33c8ae042ea) )
- ROM_LOAD_NIB_LOW( "blasto.u5", 0x0400, 0x0400, CRC(efb640cb) SHA1(2dff5b249f876d7d13cc6dfad652ce7e5af10370) )
-
- ROM_REGION( 0x200, "gfx1", 0 )
- ROM_LOAD_NIB_HIGH( "blasto.u29", 0x0000, 0x0200, CRC(4dd69499) SHA1(34f097477a297bf5f986804e5967c92f9292be29) )
- ROM_LOAD_NIB_LOW( "blasto.u43", 0x0000, 0x0200, CRC(104051a4) SHA1(cae6b9d48e3eda5ba12ff5d9835ce2733e90f774) )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD_NIB_HIGH( "blasto.u2", 0x0000, 0x0400, CRC(ec99d043) SHA1(10650e54bf55f3ace5c199215c2fce211916d3b7) )
+ ROM_LOAD_NIB_LOW( "blasto.u3", 0x0000, 0x0400, CRC(be333415) SHA1(386cab720f0c2da16b9ec84f67ccebf23406c58d) )
+ ROM_LOAD_NIB_HIGH( "blasto.u4", 0x0400, 0x0400, CRC(1c889993) SHA1(e23c72d075cf3d209081bca5a953c33c8ae042ea) )
+ ROM_LOAD_NIB_LOW( "blasto.u5", 0x0400, 0x0400, CRC(efb640cb) SHA1(2dff5b249f876d7d13cc6dfad652ce7e5af10370) )
+
+ ROM_REGION( 0x200, "gfx1", 0 )
+ ROM_LOAD_NIB_HIGH( "blasto.u29", 0x0000, 0x0200, CRC(4dd69499) SHA1(34f097477a297bf5f986804e5967c92f9292be29) )
+ ROM_LOAD_NIB_LOW( "blasto.u43", 0x0000, 0x0200, CRC(104051a4) SHA1(cae6b9d48e3eda5ba12ff5d9835ce2733e90f774) )
ROM_END
ROM_START( hustle )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "3160016.u2", 0x0000, 0x0400, CRC(d983de7c) SHA1(af6e0ea78449bfba4fe8affd724d7b0eb3d38706) )
- ROM_LOAD_NIB_LOW( "3160017.u3", 0x0000, 0x0400, CRC(edec9cb9) SHA1(548cc7b0a15a1c977b7ef4a99ff88101893f661a) )
- ROM_LOAD_NIB_HIGH( "3160018.u4", 0x0400, 0x0400, CRC(f599b9c0) SHA1(c55ed33ac51b9cfbb2fe4321bbb1e0a16694f065) )
- ROM_LOAD_NIB_LOW( "3160019.u5", 0x0400, 0x0400, CRC(7794bc7e) SHA1(b3d577291dea0e096b2ee56b0ef612f41b2e859c) )
-
- ROM_REGION( 0x200, "gfx1", 0 )
- ROM_LOAD_NIB_HIGH( "3160020.u29", 0x0000, 0x0200, CRC(541d2c67) SHA1(abdb918f302352693870b0a50eabaf95acf1cf63) )
- ROM_LOAD_NIB_LOW( "3160021.u43", 0x0000, 0x0200, CRC(b5083128) SHA1(d7e8242e9d12d09f3d69c08e373ede2bdd4deba9) )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD_NIB_HIGH( "3160016.u2", 0x0000, 0x0400, CRC(d983de7c) SHA1(af6e0ea78449bfba4fe8affd724d7b0eb3d38706) )
+ ROM_LOAD_NIB_LOW( "3160017.u3", 0x0000, 0x0400, CRC(edec9cb9) SHA1(548cc7b0a15a1c977b7ef4a99ff88101893f661a) )
+ ROM_LOAD_NIB_HIGH( "3160018.u4", 0x0400, 0x0400, CRC(f599b9c0) SHA1(c55ed33ac51b9cfbb2fe4321bbb1e0a16694f065) )
+ ROM_LOAD_NIB_LOW( "3160019.u5", 0x0400, 0x0400, CRC(7794bc7e) SHA1(b3d577291dea0e096b2ee56b0ef612f41b2e859c) )
+
+ ROM_REGION( 0x200, "gfx1", 0 )
+ ROM_LOAD_NIB_HIGH( "3160020.u29", 0x0000, 0x0200, CRC(541d2c67) SHA1(abdb918f302352693870b0a50eabaf95acf1cf63) )
+ ROM_LOAD_NIB_LOW( "3160021.u43", 0x0000, 0x0200, CRC(b5083128) SHA1(d7e8242e9d12d09f3d69c08e373ede2bdd4deba9) )
ROM_END
ROM_START( mineswpr )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "mineswee.h0p", 0x0000, 0x0400, CRC(5850a4ba) SHA1(9f097d31428f4494573187049c53fbed2075ff32) )
- ROM_LOAD_NIB_LOW( "mineswee.l0p", 0x0000, 0x0400, CRC(05961379) SHA1(3d59341be8a663e8c54c1556442c992a6eb886ab) )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD_NIB_HIGH( "mineswee.h0p", 0x0000, 0x0400, CRC(5850a4ba) SHA1(9f097d31428f4494573187049c53fbed2075ff32) )
+ ROM_LOAD_NIB_LOW( "mineswee.l0p", 0x0000, 0x0400, CRC(05961379) SHA1(3d59341be8a663e8c54c1556442c992a6eb886ab) )
- ROM_REGION( 0x200, "gfx1", 0 )
- ROM_LOAD_NIB_HIGH( "mineswee.ums", 0x0000, 0x0200, CRC(0e1c5c37) SHA1(d4d56bd63307e387771c48304724dfc1ea1306d9) )
- ROM_LOAD_NIB_LOW( "mineswee.uls", 0x0000, 0x0200, CRC(3a4f66e1) SHA1(bd7f6c51d568a79fb06414b2a6ef245d0d983c3e) )
+ ROM_REGION( 0x200, "gfx1", 0 )
+ ROM_LOAD_NIB_HIGH( "mineswee.ums", 0x0000, 0x0200, CRC(0e1c5c37) SHA1(d4d56bd63307e387771c48304724dfc1ea1306d9) )
+ ROM_LOAD_NIB_LOW( "mineswee.uls", 0x0000, 0x0200, CRC(3a4f66e1) SHA1(bd7f6c51d568a79fb06414b2a6ef245d0d983c3e) )
ROM_END
ROM_START( mineswpr4 )
- ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD_NIB_HIGH( "mineswee.h0p", 0x0000, 0x0400, CRC(5850a4ba) SHA1(9f097d31428f4494573187049c53fbed2075ff32) )
- ROM_LOAD_NIB_LOW( "mineswee.l0p", 0x0000, 0x0400, CRC(05961379) SHA1(3d59341be8a663e8c54c1556442c992a6eb886ab) )
+ ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_LOAD_NIB_HIGH( "mineswee.h0p", 0x0000, 0x0400, CRC(5850a4ba) SHA1(9f097d31428f4494573187049c53fbed2075ff32) )
+ ROM_LOAD_NIB_LOW( "mineswee.l0p", 0x0000, 0x0400, CRC(05961379) SHA1(3d59341be8a663e8c54c1556442c992a6eb886ab) )
- ROM_REGION( 0x200, "gfx1", 0 )
- ROM_LOAD_NIB_HIGH( "mineswee.cms", 0x0000, 0x0200, CRC(aad3ce0c) SHA1(92257706ae0c9c1a258eed3311116063e647e1ae) )
- ROM_LOAD_NIB_LOW( "mineswee.cls", 0x0000, 0x0200, CRC(70959755) SHA1(f62d448742da3fae8bbd96eb3a2714db500cecce) )
+ ROM_REGION( 0x200, "gfx1", 0 )
+ ROM_LOAD_NIB_HIGH( "mineswee.cms", 0x0000, 0x0200, CRC(aad3ce0c) SHA1(92257706ae0c9c1a258eed3311116063e647e1ae) )
+ ROM_LOAD_NIB_LOW( "mineswee.cls", 0x0000, 0x0200, CRC(70959755) SHA1(f62d448742da3fae8bbd96eb3a2714db500cecce) )
ROM_END
/*************************************
diff --git a/src/mame/drivers/blockhl.c b/src/mame/drivers/blockhl.c
index b74390d3556..328a28644cb 100644
--- a/src/mame/drivers/blockhl.c
+++ b/src/mame/drivers/blockhl.c
@@ -33,7 +33,7 @@ static KONAMI_SETLINES_CALLBACK( blockhl_banking );
INTERRUPT_GEN_MEMBER(blockhl_state::blockhl_interrupt)
{
- if (k052109_is_irq_enabled(m_k052109) && m_rombank == 0) /* kludge to prevent crashes */
+ if (k052109_is_irq_enabled(m_k052109) && m_rombank == 0) /* kludge to prevent crashes */
device.execute().set_input_line(KONAMI_IRQ_LINE, HOLD_LINE);
}
@@ -111,7 +111,7 @@ static ADDRESS_MAP_START( audio_map, AS_PROGRAM, 8, blockhl_state )
AM_RANGE(0x8000, 0x87ff) AM_RAM
AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_byte_r)
AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write)
- AM_RANGE(0xe00c, 0xe00d) AM_WRITENOP /* leftover from missing 007232? */
+ AM_RANGE(0xe00c, 0xe00d) AM_WRITENOP /* leftover from missing 007232? */
ADDRESS_MAP_END
@@ -133,19 +133,19 @@ static INPUT_PORTS_START( blockhl )
/* "No Coin B" = coins produce sound, but no effect on coin counter */
PORT_START("DSW2")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x01, "1" )
PORT_DIPSETTING( 0x00, "2" )
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:2" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:3" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:3" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -154,12 +154,12 @@ static INPUT_PORTS_START( blockhl )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW3:2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW3:2" ) /* Listed as "Unused" */
PORT_SERVICE_DIPLOC(0x40, IP_ACTIVE_LOW, "SW3:3" )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW3:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW3:4" ) /* Listed as "Unused" */
INPUT_PORTS_END
@@ -212,7 +212,7 @@ void blockhl_state::machine_reset()
static MACHINE_CONFIG_START( blockhl, blockhl_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", KONAMI,3000000) /* Konami custom 052526 */
+ MCFG_CPU_ADD("maincpu", KONAMI,3000000) /* Konami custom 052526 */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", blockhl_state, blockhl_interrupt)
@@ -260,19 +260,19 @@ ROM_START( blockhl )
ROM_LOAD( "973d01.g6", 0x0000, 0x8000, CRC(eeee9d92) SHA1(6c6c324b1f6f4fba0aa12e0d1fc5dbab133ef669) )
ROM_REGION( 0x20000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD16_BYTE( "973f07.k15", 0x00000, 0x08000, CRC(1a8cd9b4) SHA1(7cb7944d24ac51fa6b610542d9dec68697cacf0f) ) /* tiles */
+ ROM_LOAD16_BYTE( "973f07.k15", 0x00000, 0x08000, CRC(1a8cd9b4) SHA1(7cb7944d24ac51fa6b610542d9dec68697cacf0f) ) /* tiles */
ROM_LOAD16_BYTE( "973f08.k18", 0x00001, 0x08000, CRC(952b51a6) SHA1(017575738d444b688b137cad5611638d53be84f2) )
ROM_LOAD16_BYTE( "973f09.k20", 0x10000, 0x08000, CRC(77841594) SHA1(e1bfdc5bb598d865868d578ef7faba8078becd7a) )
ROM_LOAD16_BYTE( "973f10.k23", 0x10001, 0x08000, CRC(09039fab) SHA1(a9dea17aacf4484d21ef3b16470263447b51b6b5) )
ROM_REGION( 0x20000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD16_BYTE( "973f06.k12", 0x00000, 0x08000, CRC(51acfdb6) SHA1(94d243f341b490684f5297d95d4835bd522ece35) ) /* sprites */
+ ROM_LOAD16_BYTE( "973f06.k12", 0x00000, 0x08000, CRC(51acfdb6) SHA1(94d243f341b490684f5297d95d4835bd522ece35) ) /* sprites */
ROM_LOAD16_BYTE( "973f05.k9", 0x00001, 0x08000, CRC(4cfea298) SHA1(4772b5b99f5fd8174d8884bd84173512e1edabf4) )
ROM_LOAD16_BYTE( "973f04.k7", 0x10000, 0x08000, CRC(69ca41bd) SHA1(9b0b1c888efd2f2d5525f14778e18fb4a7353eb6) )
ROM_LOAD16_BYTE( "973f03.k4", 0x10001, 0x08000, CRC(21e98472) SHA1(8c697d369a1f57be0825c33b4e9107ce1b02a130) )
- ROM_REGION( 0x0100, "proms", 0 ) /* PROMs */
- ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) ) /* priority encoder (not used) */
+ ROM_REGION( 0x0100, "proms", 0 ) /* PROMs */
+ ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) ) /* priority encoder (not used) */
ROM_END
ROM_START( quarth )
@@ -284,19 +284,19 @@ ROM_START( quarth )
ROM_LOAD( "973d01.g6", 0x0000, 0x8000, CRC(eeee9d92) SHA1(6c6c324b1f6f4fba0aa12e0d1fc5dbab133ef669) )
ROM_REGION( 0x20000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD16_BYTE( "973e07.k15", 0x00000, 0x08000, CRC(0bd6b0f8) SHA1(6c59cf637354fe2df424eaa89feb9c1bc1f66a92) ) /* tiles */
+ ROM_LOAD16_BYTE( "973e07.k15", 0x00000, 0x08000, CRC(0bd6b0f8) SHA1(6c59cf637354fe2df424eaa89feb9c1bc1f66a92) ) /* tiles */
ROM_LOAD16_BYTE( "973e08.k18", 0x00001, 0x08000, CRC(104d0d5f) SHA1(595698911513113d01e5b565f5b073d1bd033d3f) )
ROM_LOAD16_BYTE( "973e09.k20", 0x10000, 0x08000, CRC(bd3a6f24) SHA1(eb45db3a6a52bb2b25df8c2dace877e59b4130a6) )
ROM_LOAD16_BYTE( "973e10.k23", 0x10001, 0x08000, CRC(cf5e4b86) SHA1(43348753894c1763b26dbfc70245dac92048db8f) )
ROM_REGION( 0x20000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD16_BYTE( "973e06.k12", 0x00000, 0x08000, CRC(0d58af85) SHA1(2efd661d614fb305a14cfe1aa4fb17714f215d4f) ) /* sprites */
+ ROM_LOAD16_BYTE( "973e06.k12", 0x00000, 0x08000, CRC(0d58af85) SHA1(2efd661d614fb305a14cfe1aa4fb17714f215d4f) ) /* sprites */
ROM_LOAD16_BYTE( "973e05.k9", 0x00001, 0x08000, CRC(15d822cb) SHA1(70ecad5e0a461df0da6e6eb23f43a7b643297f0d) )
ROM_LOAD16_BYTE( "973e04.k7", 0x10000, 0x08000, CRC(d70f4a2c) SHA1(25f835a17bacf2b8debb2eb8a3cff90cab3f402a) )
ROM_LOAD16_BYTE( "973e03.k4", 0x10001, 0x08000, CRC(2c5a4b4b) SHA1(e2991dd78b9cd96cf93ebd6de0d4e060d346ab9c) )
- ROM_REGION( 0x0100, "proms", 0 ) /* PROMs */
- ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) ) /* priority encoder (not used) */
+ ROM_REGION( 0x0100, "proms", 0 ) /* PROMs */
+ ROM_LOAD( "973a11.h10", 0x0000, 0x0100, CRC(46d28fe9) SHA1(9d0811a928c8907785ef483bfbee5445506b3ec8) ) /* priority encoder (not used) */
ROM_END
diff --git a/src/mame/drivers/blockout.c b/src/mame/drivers/blockout.c
index 5aa4ba18837..cb1a1f7a1c1 100644
--- a/src/mame/drivers/blockout.c
+++ b/src/mame/drivers/blockout.c
@@ -112,12 +112,12 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, blockout_state )
AM_RANGE(0x100010, 0x100011) AM_WRITE(blockout_irq6_ack_w)
AM_RANGE(0x100012, 0x100013) AM_WRITE(blockout_irq5_ack_w)
AM_RANGE(0x100014, 0x100015) AM_WRITE(blockout_sound_command_w)
- AM_RANGE(0x100016, 0x100017) AM_WRITENOP /* don't know, maybe reset sound CPU */
+ AM_RANGE(0x100016, 0x100017) AM_WRITENOP /* don't know, maybe reset sound CPU */
AM_RANGE(0x180000, 0x1bffff) AM_RAM_WRITE(blockout_videoram_w) AM_SHARE("videoram")
- AM_RANGE(0x1d4000, 0x1dffff) AM_RAM /* work RAM */
- AM_RANGE(0x1f4000, 0x1fffff) AM_RAM /* work RAM */
+ AM_RANGE(0x1d4000, 0x1dffff) AM_RAM /* work RAM */
+ AM_RANGE(0x1f4000, 0x1fffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x207fff) AM_RAM AM_SHARE("frontvideoram")
- AM_RANGE(0x208000, 0x21ffff) AM_RAM /* ??? */
+ AM_RANGE(0x208000, 0x21ffff) AM_RAM /* ??? */
AM_RANGE(0x280002, 0x280003) AM_WRITE(blockout_frontcolor_w)
AM_RANGE(0x280200, 0x2805ff) AM_RAM_WRITE(blockout_paletteram_w) AM_SHARE("paletteram")
ADDRESS_MAP_END
@@ -132,12 +132,12 @@ static ADDRESS_MAP_START( agress_map, AS_PROGRAM, 16, blockout_state )
AM_RANGE(0x100010, 0x100011) AM_WRITE(blockout_irq6_ack_w)
AM_RANGE(0x100012, 0x100013) AM_WRITE(blockout_irq5_ack_w)
AM_RANGE(0x100014, 0x100015) AM_WRITE(blockout_sound_command_w)
- AM_RANGE(0x100016, 0x100017) AM_WRITENOP /* don't know, maybe reset sound CPU */
+ AM_RANGE(0x100016, 0x100017) AM_WRITENOP /* don't know, maybe reset sound CPU */
AM_RANGE(0x180000, 0x1bffff) AM_RAM_WRITE(blockout_videoram_w) AM_SHARE("videoram")
- AM_RANGE(0x1d4000, 0x1dffff) AM_RAM /* work RAM */
- AM_RANGE(0x1f4000, 0x1fffff) AM_RAM /* work RAM */
+ AM_RANGE(0x1d4000, 0x1dffff) AM_RAM /* work RAM */
+ AM_RANGE(0x1f4000, 0x1fffff) AM_RAM /* work RAM */
AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE("frontvideoram") AM_MIRROR(0x004000) // agress checks at F3A that this is mirrored, blockout glitches if you do it to it
- AM_RANGE(0x208000, 0x21ffff) AM_RAM /* ??? */
+ AM_RANGE(0x208000, 0x21ffff) AM_RAM /* ??? */
AM_RANGE(0x280002, 0x280003) AM_WRITE(blockout_frontcolor_w)
AM_RANGE(0x280200, 0x2805ff) AM_RAM_WRITE(blockout_paletteram_w) AM_SHARE("paletteram")
ADDRESS_MAP_END
@@ -184,37 +184,37 @@ static INPUT_PORTS_START( blockout )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
/* the following two are supposed to control Coin 2, but they don't work. */
/* This happens on the original board too. */
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:3" ) /* According to the manual SW1:3,4 should be the same settings as SW1:1,2 */
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:3" ) /* According to the manual SW1:3,4 should be the same settings as SW1:1,2 */
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW1:4" )
- PORT_DIPNAME( 0x10, 0x10, "1 Coin to Continue" ) PORT_DIPLOCATION("SW1:5")
- PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) /* Same price as Coinage setting */
- PORT_DIPSETTING( 0x00, DEF_STR( On ) ) /* Always 1 Coin */
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x10, 0x10, "1 Coin to Continue" ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) /* Same price as Coinage setting */
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) ) /* Always 1 Coin */
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) )
- PORT_DIPNAME( 0x04, 0x04, "Rotate Buttons" ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x04, 0x04, "Rotate Buttons" ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_DIPLOCATION("SW2:7") /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_DIPLOCATION("SW2:7") /* Listed as "Unused" */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_DIPLOCATION("SW2:8") /* Listed as "Unused" */
INPUT_PORTS_END
@@ -231,7 +231,7 @@ static INPUT_PORTS_START( blockoutj )
/* The following switch is 2/3 rotate buttons on the other sets, option doesn't exist in the Japan version */
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW2:3" )
/* these can still be used on the difficutly select even if they can't be used for rotating pieces in this version */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_DIPLOCATION("SW2:7")
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_DIPLOCATION("SW2:7")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) PORT_DIPLOCATION("SW2:8")
INPUT_PORTS_END
@@ -240,14 +240,14 @@ static INPUT_PORTS_START( agress )
/* factory shipment setting is all dips OFF */
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x04, 0x04, "Opening Cut" ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x04, "Opening Cut" ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:5" )
PORT_MODIFY("DSW2")
/* Engrish here. The manual says "Number of Prayers". Maybe related to lives? */
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Players ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Players ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x04, "1" )
PORT_DIPSETTING( 0x00, "2" )
INPUT_PORTS_END
@@ -305,7 +305,7 @@ static MACHINE_CONFIG_START( blockout, blockout_state )
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", blockout_state, blockout_scanline, "screen", 0, 1)
- MCFG_CPU_ADD("audiocpu", Z80, AUDIO_CLOCK) /* 3.579545 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80, AUDIO_CLOCK) /* 3.579545 MHz */
MCFG_CPU_PROGRAM_MAP(audio_map)
@@ -345,75 +345,75 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( blockout )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
ROM_LOAD16_BYTE( "bo29a0-2.bin", 0x00000, 0x20000, CRC(b0103427) SHA1(53cac2adc04783abbde21e9f3c0e655f22f68f69) )
ROM_LOAD16_BYTE( "bo29a1-2.bin", 0x00001, 0x20000, CRC(5984d5a2) SHA1(4b350856d0313d40eaa3d8a8d9e310f74bc20398) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bo29e3-0.bin", 0x0000, 0x8000, CRC(3ea01f78) SHA1(5fc4ad4d9f03d7c26d2afc3e7ede75589e40b0d8) )
- ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
+ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
ROM_LOAD( "bo29e2-0.bin", 0x0000, 0x20000, CRC(15c5a99d) SHA1(89091eda454a028fd1f17501584bd589baf6d523) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "mb7114h.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
+ ROM_LOAD( "mb7114h.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
ROM_END
ROM_START( blockout2 )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
ROM_LOAD16_BYTE( "29a0", 0x00000, 0x20000, CRC(605f931e) SHA1(65fa7227dafde1fc8564e09fa949fe575b394d8a) )
ROM_LOAD16_BYTE( "29a1", 0x00001, 0x20000, CRC(38f07000) SHA1(e4070e3067d77cc1b0d8d0c63786f2729c5c703a) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bo29e3-0.bin", 0x0000, 0x8000, CRC(3ea01f78) SHA1(5fc4ad4d9f03d7c26d2afc3e7ede75589e40b0d8) )
- ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
+ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
ROM_LOAD( "bo29e2-0.bin", 0x0000, 0x20000, CRC(15c5a99d) SHA1(89091eda454a028fd1f17501584bd589baf6d523) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "mb7114h.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
+ ROM_LOAD( "mb7114h.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
ROM_END
ROM_START( blockoutj )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
ROM_LOAD16_BYTE( "2.bin", 0x00000, 0x20000, CRC(e16cf065) SHA1(541b30b054cf08f10d6ca4746423759f4326c005) )
ROM_LOAD16_BYTE( "1.bin", 0x00001, 0x20000, CRC(950b28a3) SHA1(7d1635ac2a3fc1efdd2f78cd6038bd7b4c907b1b) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "bo29e3-0.bin", 0x0000, 0x8000, CRC(3ea01f78) SHA1(5fc4ad4d9f03d7c26d2afc3e7ede75589e40b0d8) )
- ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
+ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
ROM_LOAD( "bo29e2-0.bin", 0x0000, 0x20000, CRC(15c5a99d) SHA1(89091eda454a028fd1f17501584bd589baf6d523) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "mb7114h.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
+ ROM_LOAD( "mb7114h.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
ROM_END
ROM_START( agress )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
ROM_LOAD16_BYTE( "palco1.81", 0x00000, 0x20000, CRC(3acc917a) SHA1(14960588673458d862daf14a8d7474af6c95c2ad) )
ROM_LOAD16_BYTE( "palco2.91", 0x00001, 0x20000, CRC(abfd5bcc) SHA1(bf0ea8ba00750ea2ddf2b8afc96393bf8a730068) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "palco3.73", 0x0000, 0x8000, CRC(2a21c97d) SHA1(7f71bf18db3e6ff9c69c589268450e66c6585cdd) )
- ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
+ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
ROM_LOAD( "palco4.78", 0x0000, 0x20000, CRC(9dfd9cfe) SHA1(5ea8f98bc0cd117cde81c04f02aa33199afe8231) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "82s129pr.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
+ ROM_LOAD( "82s129pr.25", 0x0000, 0x0100, CRC(b25bbda7) SHA1(840f1470886bd0019db3cd29e3d1d80205a65f48) ) /* unknown */
ROM_END
// this is probably an original English version with copyright year hacked
ROM_START( agressb )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 2*128k for 68000 code */
ROM_LOAD16_BYTE( "palco1.ic81", 0x00000, 0x20000, CRC(a1875175) SHA1(6c9946bcd4fe7987d4f817ea25bfc76432188883) )
ROM_LOAD16_BYTE( "palco2.ic91", 0x00001, 0x20000, CRC(ab3182c3) SHA1(788a3e7cf6ef889262f3d72af8be9ec951eb397b) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "palco3.ic73", 0x000000, 0x08000, CRC(2a21c97d) SHA1(7f71bf18db3e6ff9c69c589268450e66c6585cdd) )
- ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
+ ROM_REGION( 0x40000, "oki", 0 ) /* 128k for ADPCM samples - sound chip is OKIM6295 */
ROM_LOAD( "palco4.ic78", 0x000000, 0x20000, CRC(9dfd9cfe) SHA1(5ea8f98bc0cd117cde81c04f02aa33199afe8231) )
ROM_REGION( 0x0100, "proms", 0 )
diff --git a/src/mame/drivers/bloodbro.c b/src/mame/drivers/bloodbro.c
index 5237544d13f..e63c7a156bd 100644
--- a/src/mame/drivers/bloodbro.c
+++ b/src/mame/drivers/bloodbro.c
@@ -192,16 +192,16 @@ ADDRESS_MAP_END
PORT_DIPSETTING( 0x000a, DEF_STR( 1C_6C ) ) \
PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) ) \
/* Coin Mode 2 */ \
- PORT_DIPNAME( 0x0006, 0x0006, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:2,3") PORT_CONDITION("DSW",0x0001,EQUALS,0x0000) \
- PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) ) \
- PORT_DIPSETTING( 0x0002, DEF_STR( 3C_1C ) ) \
- PORT_DIPSETTING( 0x0004, DEF_STR( 2C_1C ) ) \
- PORT_DIPSETTING( 0x0006, DEF_STR( 1C_1C ) ) \
- PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5") PORT_CONDITION("DSW",0x0001,EQUALS,0x0000) \
- PORT_DIPSETTING( 0x0018, DEF_STR( 1C_2C ) ) \
- PORT_DIPSETTING( 0x0010, DEF_STR( 1C_3C ) ) \
- PORT_DIPSETTING( 0x0008, DEF_STR( 1C_5C ) ) \
- PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) ) \
+ PORT_DIPNAME( 0x0006, 0x0006, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:2,3") PORT_CONDITION("DSW",0x0001,EQUALS,0x0000) \
+ PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) ) \
+ PORT_DIPSETTING( 0x0002, DEF_STR( 3C_1C ) ) \
+ PORT_DIPSETTING( 0x0004, DEF_STR( 2C_1C ) ) \
+ PORT_DIPSETTING( 0x0006, DEF_STR( 1C_1C ) ) \
+ PORT_DIPNAME( 0x0018, 0x0018, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5") PORT_CONDITION("DSW",0x0001,EQUALS,0x0000) \
+ PORT_DIPSETTING( 0x0018, DEF_STR( 1C_2C ) ) \
+ PORT_DIPSETTING( 0x0010, DEF_STR( 1C_3C ) ) \
+ PORT_DIPSETTING( 0x0008, DEF_STR( 1C_5C ) ) \
+ PORT_DIPSETTING( 0x0000, DEF_STR( 1C_6C ) ) \
PORT_DIPNAME( 0x0020, 0x0020, "Starting Coin" ) PORT_DIPLOCATION("SW1:6") \
PORT_DIPSETTING( 0x0020, DEF_STR( Normal ) ) \
PORT_DIPSETTING( 0x0000, "x2" )
@@ -210,23 +210,23 @@ static INPUT_PORTS_START( bloodbro_base )
PORT_START("DSW")
BLOODBRO_COINAGE
/* SW1:7,8 is listed as "ROM change option", "optional"
- A B C D
- Coin Up 0 1 1 1
- Screen Complete 0 0 0 1
- Stage Complete 1 1 3 1
- Top 10 1 3 3 3
- High Score 1 4 5 4
- Complete Game 5 5 10 15
-
- D limits 8 tickets/coin except completion
-
- The sets handled in MAME don't seem to have this "feature"
- PORT_DIPNAME( 0x00c0, 0x00c0, "Ticket Dispenser Payout Mode" ) PORT_DIPLOCATION("SW1:7,8")
- PORT_DIPSETTING( 0x00c0, "A" )
- PORT_DIPSETTING( 0x0080, "B" )
- PORT_DIPSETTING( 0x0040, "C" )
- PORT_DIPSETTING( 0x0000, "D" )
- */
+ A B C D
+ Coin Up 0 1 1 1
+ Screen Complete 0 0 0 1
+ Stage Complete 1 1 3 1
+ Top 10 1 3 3 3
+ High Score 1 4 5 4
+ Complete Game 5 5 10 15
+
+ D limits 8 tickets/coin except completion
+
+ The sets handled in MAME don't seem to have this "feature"
+ PORT_DIPNAME( 0x00c0, 0x00c0, "Ticket Dispenser Payout Mode" ) PORT_DIPLOCATION("SW1:7,8")
+ PORT_DIPSETTING( 0x00c0, "A" )
+ PORT_DIPSETTING( 0x0080, "B" )
+ PORT_DIPSETTING( 0x0040, "C" )
+ PORT_DIPSETTING( 0x0000, "D" )
+ */
PORT_DIPUNKNOWN_DIPLOC( 0x0040, IP_ACTIVE_LOW, "SW1:7" )
PORT_DIPUNKNOWN_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:8" )
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
@@ -256,18 +256,18 @@ static INPUT_PORTS_START( bloodbro_base )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // "Fire"
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // "Roll"
- PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) // "Dynamite"
- PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* tested when "continue" - check code at 0x000598 */
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // "Fire"
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // "Roll"
+ PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) // "Dynamite"
+ PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* tested when "continue" - check code at 0x000598 */
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
- PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) // "Fire"
- PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // "Roll"
- PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) // "Dynamite"
- PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* tested - check code at 0x0005fe - VBLANK ? (probably not) */
+ PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) // "Fire"
+ PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // "Roll"
+ PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) // "Dynamite"
+ PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* tested - check code at 0x0005fe - VBLANK ? (probably not) */
PORT_START("IN1")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
@@ -283,7 +283,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( weststry )
PORT_INCLUDE( bloodbro_base )
- PORT_START("COIN") /* referenced by seibu sound board */
+ PORT_START("COIN") /* referenced by seibu sound board */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
INPUT_PORTS_END
@@ -296,12 +296,12 @@ static INPUT_PORTS_START( bloodbro )
PORT_BIT( 0x000e, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x00e0, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* tested - check code at 0x000800 */
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* tested - check code at 0x000800 */
PORT_BIT( 0x0e00, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0xe000, IP_ACTIVE_LOW, IPT_UNKNOWN )
- SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
+ SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
INPUT_PORTS_END
static INPUT_PORTS_START( skysmash )
@@ -336,16 +336,16 @@ static INPUT_PORTS_START( skysmash )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // "Fire"
- PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // "Bomb"
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // "Fire"
+ PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) // "Bomb"
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
- PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) // "Fire"
- PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // "Bomb"
+ PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) // "Fire"
+ PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) // "Bomb"
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -359,7 +359,7 @@ static INPUT_PORTS_START( skysmash )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0xe000, IP_ACTIVE_LOW, IPT_UNKNOWN )
- SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
+ SEIBU_COIN_INPUTS /* coin inputs read through sound cpu */
INPUT_PORTS_END
@@ -367,50 +367,50 @@ INPUT_PORTS_END
static const gfx_layout textlayout =
{
- 8,8, /* 8*8 characters */
- RGN_FRAC(1,2), /* 4096 characters */
- 4, /* 4 bits per pixel */
+ 8,8, /* 8*8 characters */
+ RGN_FRAC(1,2), /* 4096 characters */
+ 4, /* 4 bits per pixel */
{ 0, 4, RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4 },
{ 3, 2, 1, 0, 8+3, 8+2, 8+1, 8+0},
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
- 16*8 /* every char takes 16 consecutive bytes */
+ 16*8 /* every char takes 16 consecutive bytes */
};
static const gfx_layout spritelayout =
{
- 16,16, /* 16*16 sprites */
+ 16,16, /* 16*16 sprites */
RGN_FRAC(1,1),
- 4, /* 4 bits per pixel */
+ 4, /* 4 bits per pixel */
{ 8, 12, 0, 4 },
{ 3, 2, 1, 0, 16+3, 16+2, 16+1, 16+0,
- 3+32*16, 2+32*16, 1+32*16, 0+32*16, 16+3+32*16, 16+2+32*16, 16+1+32*16, 16+0+32*16 },
+ 3+32*16, 2+32*16, 1+32*16, 0+32*16, 16+3+32*16, 16+2+32*16, 16+1+32*16, 16+0+32*16 },
{ 0*16, 2*16, 4*16, 6*16, 8*16, 10*16, 12*16, 14*16,
16*16, 18*16, 20*16, 22*16, 24*16, 26*16, 28*16, 30*16 },
- 128*8 /* every sprite takes 128 consecutive bytes */
+ 128*8 /* every sprite takes 128 consecutive bytes */
};
static const gfx_layout weststry_textlayout =
{
- 8,8, /* 8*8 sprites */
- RGN_FRAC(1,4), /* 4096 sprites */
- 4, /* 4 bits per pixel */
+ 8,8, /* 8*8 sprites */
+ RGN_FRAC(1,4), /* 4096 sprites */
+ 4, /* 4 bits per pixel */
{ RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) },
- { 0, 1, 2, 3, 4, 5, 6, 7 },
- { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every sprite takes 8 consecutive bytes */
+ { 0, 1, 2, 3, 4, 5, 6, 7 },
+ { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
+ 8*8 /* every sprite takes 8 consecutive bytes */
};
static const gfx_layout weststry_spritelayout =
{
- 16,16, /* 16*16 sprites */
- RGN_FRAC(1,4), /* 8192 sprites */
- 4, /* 4 bits per pixel */
+ 16,16, /* 16*16 sprites */
+ RGN_FRAC(1,4), /* 8192 sprites */
+ 4, /* 4 bits per pixel */
{ RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) },
{ 0, 1, 2, 3, 4, 5, 6, 7,
- 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 },
+ 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
/* Graphics Decode Info */
@@ -496,16 +496,16 @@ ROM_START( bloodbro )
ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
ROM_REGION( 0x20000, "gfx1", 0 )
- ROM_LOAD( "bb_05.u061.6f", 0x00000, 0x10000, CRC(04ba6d19) SHA1(7333075c3323756d51917418b5234d785a9bee00) ) /* characters */
+ ROM_LOAD( "bb_05.u061.6f", 0x00000, 0x10000, CRC(04ba6d19) SHA1(7333075c3323756d51917418b5234d785a9bee00) ) /* characters */
ROM_LOAD( "bb_06.u063.6d", 0x10000, 0x10000, CRC(7092e35b) SHA1(659d30b2e2fd9ffa34a47e98193c8f0a87ac1315) )
ROM_REGION( 0x100000, "gfx2", 0 )
- ROM_LOAD( "blood_bros_bk__(c)1990_tad_corp.u064.4d", 0x00000, 0x100000, CRC(1aa87ee6) SHA1(e7843c1e8a0f3a685f0b5d6e3a2eb3176c410847) ) /* Background+Foreground */
+ ROM_LOAD( "blood_bros_bk__(c)1990_tad_corp.u064.4d", 0x00000, 0x100000, CRC(1aa87ee6) SHA1(e7843c1e8a0f3a685f0b5d6e3a2eb3176c410847) ) /* Background+Foreground */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "blood_bros_obj__(c)1990_tad_corp.u078.2n", 0x00000, 0x100000, CRC(d27c3952) SHA1(de7306432b682f238b911507ad7aa2fa8acbee80) ) /* sprites */
+ ROM_LOAD( "blood_bros_obj__(c)1990_tad_corp.u078.2n", 0x00000, 0x100000, CRC(d27c3952) SHA1(de7306432b682f238b911507ad7aa2fa8acbee80) ) /* sprites */
- ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
ROM_LOAD( "bb_08.u095.5a", 0x00000, 0x20000, CRC(deb1b975) SHA1(08f2e9a0a23171201b71d381d091edcd3787c287) )
ROM_END
@@ -522,16 +522,16 @@ ROM_START( bloodbroa )
ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
ROM_REGION( 0x20000, "gfx1", 0 )
- ROM_LOAD( "bb_05.u061.6f", 0x00000, 0x10000, CRC(04ba6d19) SHA1(7333075c3323756d51917418b5234d785a9bee00) ) /* characters */
+ ROM_LOAD( "bb_05.u061.6f", 0x00000, 0x10000, CRC(04ba6d19) SHA1(7333075c3323756d51917418b5234d785a9bee00) ) /* characters */
ROM_LOAD( "bb_06.u063.6d", 0x10000, 0x10000, CRC(7092e35b) SHA1(659d30b2e2fd9ffa34a47e98193c8f0a87ac1315) )
ROM_REGION( 0x100000, "gfx2", 0 )
- ROM_LOAD( "blood_bros_bk__(c)1990_tad_corp.u064.4d", 0x00000, 0x100000, CRC(1aa87ee6) SHA1(e7843c1e8a0f3a685f0b5d6e3a2eb3176c410847) ) /* Background+Foreground */
+ ROM_LOAD( "blood_bros_bk__(c)1990_tad_corp.u064.4d", 0x00000, 0x100000, CRC(1aa87ee6) SHA1(e7843c1e8a0f3a685f0b5d6e3a2eb3176c410847) ) /* Background+Foreground */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "blood_bros_obj__(c)1990_tad_corp.u078.2n", 0x00000, 0x100000, CRC(d27c3952) SHA1(de7306432b682f238b911507ad7aa2fa8acbee80) ) /* sprites */
+ ROM_LOAD( "blood_bros_obj__(c)1990_tad_corp.u078.2n", 0x00000, 0x100000, CRC(d27c3952) SHA1(de7306432b682f238b911507ad7aa2fa8acbee80) ) /* sprites */
- ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
ROM_LOAD( "bb_08.u095.5a", 0x00000, 0x20000, CRC(deb1b975) SHA1(08f2e9a0a23171201b71d381d091edcd3787c287) )
ROM_END
@@ -548,34 +548,34 @@ ROM_START( bloodbrob )
ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
ROM_REGION( 0x20000, "gfx1", 0 )
- ROM_LOAD( "bb_05.u061.6f", 0x00000, 0x10000, CRC(04ba6d19) SHA1(7333075c3323756d51917418b5234d785a9bee00) ) /* characters */
+ ROM_LOAD( "bb_05.u061.6f", 0x00000, 0x10000, CRC(04ba6d19) SHA1(7333075c3323756d51917418b5234d785a9bee00) ) /* characters */
ROM_LOAD( "bb_06.u063.6d", 0x10000, 0x10000, CRC(7092e35b) SHA1(659d30b2e2fd9ffa34a47e98193c8f0a87ac1315) )
ROM_REGION( 0x100000, "gfx2", 0 )
- ROM_LOAD( "blood_bros_bk__(c)1990_tad_corp.u064.4d", 0x00000, 0x100000, CRC(1aa87ee6) SHA1(e7843c1e8a0f3a685f0b5d6e3a2eb3176c410847) ) /* Background+Foreground */
+ ROM_LOAD( "blood_bros_bk__(c)1990_tad_corp.u064.4d", 0x00000, 0x100000, CRC(1aa87ee6) SHA1(e7843c1e8a0f3a685f0b5d6e3a2eb3176c410847) ) /* Background+Foreground */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "blood_bros_obj__(c)1990_tad_corp.u078.2n", 0x00000, 0x100000, CRC(d27c3952) SHA1(de7306432b682f238b911507ad7aa2fa8acbee80) ) /* sprites */
+ ROM_LOAD( "blood_bros_obj__(c)1990_tad_corp.u078.2n", 0x00000, 0x100000, CRC(d27c3952) SHA1(de7306432b682f238b911507ad7aa2fa8acbee80) ) /* sprites */
- ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
ROM_LOAD( "bb_08.u095.5a", 0x00000, 0x20000, CRC(deb1b975) SHA1(08f2e9a0a23171201b71d381d091edcd3787c287) )
ROM_END
ROM_START( weststry )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for cpu code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 64k for cpu code */
ROM_LOAD16_BYTE( "ws13.bin", 0x00001, 0x20000, CRC(158e302a) SHA1(52cc1bf526424ff025a6b79f3fc7bba4b9bbfcbb) )
ROM_LOAD16_BYTE( "ws15.bin", 0x00000, 0x20000, CRC(672e9027) SHA1(71cb9fcef04edb972ba88de45d605dcff539ea2d) )
ROM_LOAD16_BYTE( "bb_04.bin", 0x40001, 0x20000, CRC(fd951c2c) SHA1(f4031bf303c67c82f2f78f7456f78382d8c1ac85) )
ROM_LOAD16_BYTE( "bb_03.bin", 0x40000, 0x20000, CRC(18d3c460) SHA1(93b86af1199f0fedeaf1fe64d27ffede4b819e42) )
- ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for sound cpu code */
+ ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k for sound cpu code */
ROM_LOAD( "ws17.bin", 0x000000, 0x08000, CRC(e00a8f09) SHA1(e7247ce0ab99d0726f31dee5de5ba33f4ebd183e) )
ROM_CONTINUE( 0x010000, 0x08000 )
ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
ROM_REGION( 0x20000, "gfx1", 0 ) // first half of these is blank
- ROM_LOAD( "ws09.bin", 0x00000, 0x08000, CRC(f05b2b3e) SHA1(6570d795d68655ace9668f32dc0bf5c2d2372411) ) /* characters */
+ ROM_LOAD( "ws09.bin", 0x00000, 0x08000, CRC(f05b2b3e) SHA1(6570d795d68655ace9668f32dc0bf5c2d2372411) ) /* characters */
ROM_CONTINUE( 0x00000, 0x08000 )
ROM_LOAD( "ws11.bin", 0x08000, 0x08000, CRC(2b10e3d2) SHA1(0f5045615b44e2300745fd3afac7f1441352cca5) )
ROM_CONTINUE( 0x08000, 0x08000 )
@@ -585,17 +585,17 @@ ROM_START( weststry )
ROM_CONTINUE( 0x18000, 0x08000 )
ROM_REGION( 0x100000, "gfx2", 0 )
- ROM_LOAD( "ws01.bin", 0x20000, 0x20000, CRC(32bda4bc) SHA1(ed0c0740c7af513b341b2b7ff3e0bf6045e930e9) ) /* Foreground */
+ ROM_LOAD( "ws01.bin", 0x20000, 0x20000, CRC(32bda4bc) SHA1(ed0c0740c7af513b341b2b7ff3e0bf6045e930e9) ) /* Foreground */
ROM_LOAD( "ws03.bin", 0x60000, 0x20000, CRC(046b51f8) SHA1(25af752caebdec762582fc0130cf14546110bb54) )
ROM_LOAD( "ws02.bin", 0xa0000, 0x20000, CRC(ed9d682e) SHA1(0f79ea09a7af367d175081f72f2bc94f6caad463) )
ROM_LOAD( "ws04.bin", 0xe0000, 0x20000, CRC(75f082e5) SHA1(b29f09a3cc9a0ac3f982be3981f5e895050c49e8) )
- ROM_LOAD( "ws05.bin", 0x00000, 0x20000, CRC(007c8dc0) SHA1(f44576da3b89d6a889fdb564825ac6ce3bb4cffe) ) /* Background */
+ ROM_LOAD( "ws05.bin", 0x00000, 0x20000, CRC(007c8dc0) SHA1(f44576da3b89d6a889fdb564825ac6ce3bb4cffe) ) /* Background */
ROM_LOAD( "ws07.bin", 0x40000, 0x20000, CRC(0f0c8d9a) SHA1(f5fe9b5ee4c8ffd7caf5313d13fb5f6e181ed9b6) )
ROM_LOAD( "ws06.bin", 0x80000, 0x20000, CRC(459d075e) SHA1(24cd0bffe7c5bbccf653ced0b73579059603d187) )
ROM_LOAD( "ws08.bin", 0xc0000, 0x20000, CRC(4d6783b3) SHA1(9870fe9570afeff179b6080581fd6bb187898ff0) )
ROM_REGION( 0x100000, "gfx3", ROMREGION_INVERT )
- ROM_LOAD( "ws25.bin", 0x00000, 0x20000, BAD_DUMP CRC(8092e8e9) SHA1(eabe58ac0f88234b0dddf361f56aad509a83012e) ) /* sprites */
+ ROM_LOAD( "ws25.bin", 0x00000, 0x20000, BAD_DUMP CRC(8092e8e9) SHA1(eabe58ac0f88234b0dddf361f56aad509a83012e) ) /* sprites */
ROM_LOAD( "ws26.bin", 0x20000, 0x20000, BAD_DUMP CRC(f6a1f42c) SHA1(6d5503e1a9b00104970292d22301ed28893c5223) )
ROM_LOAD( "ws23.bin", 0x40000, 0x20000, CRC(43d58e24) SHA1(99e255faa9716d9102a1223419084fc209ab4024) )
ROM_LOAD( "ws24.bin", 0x60000, 0x20000, CRC(20a867ea) SHA1(d3985002931fd4180fc541d61a94371871f3709d) )
@@ -604,7 +604,7 @@ ROM_START( weststry )
ROM_LOAD( "ws19.bin", 0xc0000, 0x20000, CRC(c5dd0a96) SHA1(4696ab1b02d40c54a7dacf0bdf90b624b7d6812e) )
ROM_LOAD( "ws20.bin", 0xe0000, 0x20000, CRC(f1245c16) SHA1(f3941bf5830995f65a5378326fdb72687fbbddcf) )
- ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
ROM_LOAD( "bb_08.bin", 0x00000, 0x20000, CRC(deb1b975) SHA1(08f2e9a0a23171201b71d381d091edcd3787c287) )
ROM_END
@@ -621,16 +621,16 @@ ROM_START( skysmash )
ROM_COPY( "audiocpu", 0, 0x018000, 0x08000 )
ROM_REGION( 0x20000, "gfx1", 0 )
- ROM_LOAD( "rom3", 0x00000, 0x10000, CRC(fbb241be) SHA1(cd94c328891538bbd8c062d90a47ddf3d7d05bb0) ) /* characters */
+ ROM_LOAD( "rom3", 0x00000, 0x10000, CRC(fbb241be) SHA1(cd94c328891538bbd8c062d90a47ddf3d7d05bb0) ) /* characters */
ROM_LOAD( "rom4", 0x10000, 0x10000, CRC(ad3cde81) SHA1(2bd0c707e5b67d3699a743d989cb5384cbe37ff7) )
ROM_REGION( 0x100000, "gfx2", 0 )
- ROM_LOAD( "rom9", 0x00000, 0x100000, CRC(b0a5eecf) SHA1(9e8191c7ae4a32dc16aebc37fa942afc531eddd4) ) /* Background + Foreground */
+ ROM_LOAD( "rom9", 0x00000, 0x100000, CRC(b0a5eecf) SHA1(9e8191c7ae4a32dc16aebc37fa942afc531eddd4) ) /* Background + Foreground */
ROM_REGION( 0x80000, "gfx3", 0 )
- ROM_LOAD( "rom10", 0x00000, 0x080000, CRC(1bbcda5d) SHA1(63915221f70a7dfda6a4d8ac7f5c663c9316610a) ) /* sprites */
+ ROM_LOAD( "rom10", 0x00000, 0x080000, CRC(1bbcda5d) SHA1(63915221f70a7dfda6a4d8ac7f5c663c9316610a) ) /* sprites */
- ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki", 0 ) /* ADPCM samples */
ROM_LOAD( "rom1", 0x00000, 0x20000, CRC(e69986f6) SHA1(de38bf2d5638cb40740882e1abccf7928e43a5a6) )
ROM_END
diff --git a/src/mame/drivers/blstroid.c b/src/mame/drivers/blstroid.c
index 1597771f356..f246a19454b 100644
--- a/src/mame/drivers/blstroid.c
+++ b/src/mame/drivers/blstroid.c
@@ -111,15 +111,15 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( blstroid )
- PORT_START("DIAL0") /* ff9800 */
+ PORT_START("DIAL0") /* ff9800 */
PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(60) PORT_KEYDELTA(10) PORT_PLAYER(1)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DIAL1") /* ff9804 */
+ PORT_START("DIAL1") /* ff9804 */
PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(60) PORT_KEYDELTA(10) PORT_PLAYER(2)
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN0") /* ff9c00 */
+ PORT_START("IN0") /* ff9c00 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
@@ -130,7 +130,7 @@ static INPUT_PORTS_START( blstroid )
PORT_SERVICE( 0x0080, IP_ACTIVE_LOW )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN1") /* ff9c02 */
+ PORT_START("IN1") /* ff9c02 */
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
@@ -141,7 +141,7 @@ static INPUT_PORTS_START( blstroid )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_INCLUDE( atarijsa_i ) /* audio port */
+ PORT_INCLUDE( atarijsa_i ) /* audio port */
INPUT_PORTS_END
@@ -226,13 +226,13 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( blstroid )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "136057-4123.6c", 0x000000, 0x010000, CRC(d14badc4) SHA1(ccba30e1eb6b3351cbc7ea18951debb7f7aa4520) )
ROM_LOAD16_BYTE( "136057-4121.6b", 0x000001, 0x010000, CRC(ae3e93e8) SHA1(66ccff68e9b0f7e97abf126f977775e29ce4eee5) )
ROM_LOAD16_BYTE( "136057-4124.4c", 0x020000, 0x010000, CRC(fd2365df) SHA1(63ed3f9a92fed985f9ddb93687f11a24c8309f56) )
ROM_LOAD16_BYTE( "136057-4122.4b", 0x020001, 0x010000, CRC(c364706e) SHA1(e03cd60d139000607d83240b0b48865eafb1188b) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136057-1135.2k", 0x010000, 0x004000, CRC(baa8b5fe) SHA1(4af1f9bec3ffa856016a89bc20041d572305ba3a) )
ROM_CONTINUE( 0x004000, 0x00c000 )
@@ -263,13 +263,13 @@ ROM_END
ROM_START( blstroid3 )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "136057-3123.6c", 0x000000, 0x010000, CRC(8fb050f5) SHA1(4944ffb0843262afe41fc6b876ab6858dcefc95f) )
ROM_LOAD16_BYTE( "136057-3121.6b", 0x000001, 0x010000, CRC(21fae262) SHA1(2516a75d76bcfdea5ab41a4898d47ed166bd1996) )
ROM_LOAD16_BYTE( "136057-3124.4c", 0x020000, 0x010000, CRC(a9140c31) SHA1(02518bf998c0c74dff66f3192dcb1f91b1812cf8) )
ROM_LOAD16_BYTE( "136057-3122.4b", 0x020001, 0x010000, CRC(137fbb17) SHA1(3dda03ecdb2dc9a9cd78aeaa502497662496a26d) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136057-1135.2k", 0x010000, 0x004000, CRC(baa8b5fe) SHA1(4af1f9bec3ffa856016a89bc20041d572305ba3a) )
ROM_CONTINUE( 0x004000, 0x00c000 )
@@ -300,13 +300,13 @@ ROM_END
ROM_START( blstroid2 )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "136057-2123.6c", 0x000000, 0x010000, CRC(5a092513) SHA1(11396125842ea3a43d61b4ce266bb8053fdefd73) )
ROM_LOAD16_BYTE( "136057-2121.6b", 0x000001, 0x010000, CRC(486aac51) SHA1(5e7fe7eb225d1c2701c21658ba2bad14ef7b64b1) )
ROM_LOAD16_BYTE( "136057-2124.4c", 0x020000, 0x010000, CRC(d0fa38fe) SHA1(8aeae50dff6bcd14ac5faf10f15724b7f7430f5c) )
ROM_LOAD16_BYTE( "136057-2122.4b", 0x020001, 0x010000, CRC(744bf921) SHA1(bb9118bfc04745df2eb78e1d1e70f7fc2e0509d4) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136057-1135.2k", 0x010000, 0x004000, CRC(baa8b5fe) SHA1(4af1f9bec3ffa856016a89bc20041d572305ba3a) )
ROM_CONTINUE( 0x004000, 0x00c000 )
@@ -337,13 +337,13 @@ ROM_END
ROM_START( blstroidg )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "136057-2223.6c", 0x000000, 0x010000, CRC(cc82108b) SHA1(487a80cac2a196e9b17c64c5d0b884d1ed8da401) )
ROM_LOAD16_BYTE( "136057-2221.6b", 0x000001, 0x010000, CRC(84822e68) SHA1(763edc9b3605e583506ca1d9befab66411fc720a) )
ROM_LOAD16_BYTE( "136057-2224.4c", 0x020000, 0x010000, CRC(849249d4) SHA1(61d6eaff7df54f0353639e192eb6074a80916e29) )
ROM_LOAD16_BYTE( "136057-2222.4b", 0x020001, 0x010000, CRC(bdeaba0d) SHA1(f479514b5d9543f9e12aa1ac48e20bf054cb18d0) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136057-1135.2k", 0x010000, 0x004000, CRC(baa8b5fe) SHA1(4af1f9bec3ffa856016a89bc20041d572305ba3a) )
ROM_CONTINUE( 0x004000, 0x00c000 )
@@ -374,13 +374,13 @@ ROM_END
ROM_START( blstroidh )
- ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
+ ROM_REGION( 0x40000, "maincpu", 0 ) /* 4*64k for 68000 code */
ROM_LOAD16_BYTE( "eheadh0.c6", 0x00000, 0x10000, CRC(061f0898) SHA1(a277399aa8af665b1fb40c2bb4cf5d36d333db8d) )
ROM_LOAD16_BYTE( "eheadl0.b6", 0x00001, 0x10000, CRC(ae8df7cb) SHA1(9eaf377bbfa09e2d3ae77764dbf09ff79b65b34f) )
ROM_LOAD16_BYTE( "eheadh1.c5", 0x20000, 0x10000, CRC(0b7a3cb6) SHA1(7dc585ff536055e85b0849aa075f2fdab34a8e1c) )
ROM_LOAD16_BYTE( "eheadl1.b5", 0x20001, 0x10000, CRC(43971694) SHA1(a39a8da244645bb56081fd71609a33d8b7d78478) )
- ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
+ ROM_REGION( 0x14000, "jsa", 0 ) /* 64k for 6502 code */
ROM_LOAD( "136057-1135.2k", 0x010000, 0x004000, CRC(baa8b5fe) SHA1(4af1f9bec3ffa856016a89bc20041d572305ba3a) )
ROM_CONTINUE( 0x004000, 0x00c000 )
diff --git a/src/mame/drivers/blueprnt.c b/src/mame/drivers/blueprnt.c
index db8a81dd904..00e79cb15e9 100644
--- a/src/mame/drivers/blueprnt.c
+++ b/src/mame/drivers/blueprnt.c
@@ -158,43 +158,43 @@ static INPUT_PORTS_START( blueprnt )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
PORT_START("DILSW1")
- PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "DILSW1:1" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x06, 0x02, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("DILSW1:2,3")
+ PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "DILSW1:1" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x06, 0x02, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("DILSW1:2,3")
PORT_DIPSETTING( 0x00, "20K" )
PORT_DIPSETTING( 0x02, "30K" )
PORT_DIPSETTING( 0x04, "40K" )
PORT_DIPSETTING( 0x06, "50K" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("DILSW1:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("DILSW1:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x00, "Maze Monster Appears In" ) PORT_DIPLOCATION("DILSW1:5")
PORT_DIPSETTING( 0x00, "2nd Maze" )
PORT_DIPSETTING( 0x10, "3rd Maze" )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("DILSW1:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("DILSW1:6")
PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("DILSW1:7") /* Listed as "Unused" */
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("DILSW1:7") /* Listed as "Unused" */
PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_5C ) )
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "DILSW1:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "DILSW1:8" ) /* Listed as "Unused" */
PORT_START("DILSW2")
- PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("DILSW2:1,2")
+ PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("DILSW2:1,2")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x03, "5" )
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "DILSW2:3" ) /* Listed as "Unused" */
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DILSW2:4")
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "DILSW2:3" ) /* Listed as "Unused" */
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DILSW2:4")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x08, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x30, 0x10, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DILSW2:5,6")
+ PORT_DIPNAME( 0x30, 0x10, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DILSW2:5,6")
PORT_DIPSETTING( 0x00, "Level 1" )
PORT_DIPSETTING( 0x10, "Level 2" )
PORT_DIPSETTING( 0x20, "Level 3" )
PORT_DIPSETTING( 0x30, "Level 4" )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "DILSW2:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "DILSW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "DILSW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "DILSW2:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
static INPUT_PORTS_START( saturn )
@@ -208,14 +208,14 @@ static INPUT_PORTS_START( saturn )
PORT_MODIFY("DILSW1")
PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "DILSW1:1" )
- PORT_DIPNAME( 0x02, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DILSW1:2")
+ PORT_DIPNAME( 0x02, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DILSW1:2")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x02, DEF_STR( Cocktail ) )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "DILSW1:3" )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "DILSW1:4" )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "DILSW1:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "DILSW1:6" )
- PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("DILSW1:7,8")
+ PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("DILSW1:7,8")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x40, "4" )
PORT_DIPSETTING( 0x80, "5" )
@@ -223,10 +223,10 @@ static INPUT_PORTS_START( saturn )
PORT_MODIFY("DILSW2")
PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "DILSW2:1" )
- PORT_DIPNAME( 0x02, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DILSW2:2")
+ PORT_DIPNAME( 0x02, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DILSW2:2")
PORT_DIPSETTING( 0x02, "A 2/1 B 1/3" )
PORT_DIPSETTING( 0x00, "A 1/1 B 1/6" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DILSW2:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DILSW2:3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "DILSW2:4" )
@@ -264,17 +264,17 @@ static INPUT_PORTS_START( grasspin )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "DILSW1:6" )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "DILSW1:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "DILSW1:4" )
- PORT_DIPNAME( 0x60, 0x60, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DILSW1:2,3") // 2 should be infinite lives according to pcb
+ PORT_DIPNAME( 0x60, 0x60, DEF_STR( Coinage ) ) PORT_DIPLOCATION("DILSW1:2,3") // 2 should be infinite lives according to pcb
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x60, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x80, 0x00, "Freeze" ) PORT_DIPLOCATION("DILSW1:1") // ok
+ PORT_DIPNAME( 0x80, 0x00, "Freeze" ) PORT_DIPLOCATION("DILSW1:1") // ok
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("DILSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("DILSW2:7,8")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("DILSW2:7,8")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
@@ -282,10 +282,10 @@ static INPUT_PORTS_START( grasspin )
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "DILSW2:6" )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "DILSW2:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "DILSW2:4" )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DILSW2:3")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DILSW2:3")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x40, 0x00, "Freeze" ) PORT_DIPLOCATION("DILSW2:2") // should be flip screen according to pcb
+ PORT_DIPNAME( 0x40, 0x00, "Freeze" ) PORT_DIPLOCATION("DILSW2:2") // should be flip screen according to pcb
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "DILSW2:1" )
@@ -299,14 +299,14 @@ INPUT_PORTS_END
static const gfx_layout spritelayout =
{
- 8,16, /* 8*16 sprites */
- RGN_FRAC(1,3), /* 256 sprites */
- 3, /* 3 bits per pixel */
- { RGN_FRAC(2,3), RGN_FRAC(1,3), 0 }, /* the bitplanes are separated */
+ 8,16, /* 8*16 sprites */
+ RGN_FRAC(1,3), /* 256 sprites */
+ 3, /* 3 bits per pixel */
+ { RGN_FRAC(2,3), RGN_FRAC(1,3), 0 }, /* the bitplanes are separated */
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 16*8 /* every sprite takes 16 consecutive bytes */
+ 16*8 /* every sprite takes 16 consecutive bytes */
};
@@ -364,14 +364,14 @@ void blueprnt_state::machine_reset()
static MACHINE_CONFIG_START( blueprnt, blueprnt_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 7000000/2) // 3.5 MHz
+ MCFG_CPU_ADD("maincpu", Z80, 7000000/2) // 3.5 MHz
MCFG_CPU_PROGRAM_MAP(blueprnt_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", blueprnt_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, 10000000/2/2/2) // 1.25 MHz (2H)
+ MCFG_CPU_ADD("audiocpu", Z80, 10000000/2/2/2) // 1.25 MHz (2H)
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_IO_MAP(sound_io)
- MCFG_CPU_PERIODIC_INT_DRIVER(blueprnt_state, irq0_line_hold, 4*60) // IRQs connected to 32V
+ MCFG_CPU_PERIODIC_INT_DRIVER(blueprnt_state, irq0_line_hold, 4*60) // IRQs connected to 32V
// NMIs are caused by the main CPU
MCFG_QUANTUM_PERFECT_CPU("maincpu")
diff --git a/src/mame/drivers/bmcbowl.c b/src/mame/drivers/bmcbowl.c
index 7fd0ef5f833..20647594cac 100644
--- a/src/mame/drivers/bmcbowl.c
+++ b/src/mame/drivers/bmcbowl.c
@@ -211,9 +211,9 @@ READ16_MEMBER(bmcbowl_state::bmc_protection_r)
case 0xca68:
switch(space.device().state().state_int(M68K_D2))
{
- case 0: return 0x37<<8;
+ case 0: return 0x37<<8;
case 0x1013: return 0;
- default: return 0x46<<8;
+ default: return 0x46<<8;
}
break;
}
@@ -263,7 +263,7 @@ WRITE8_MEMBER(bmcbowl_state::via_ca2_out)
WRITE8_MEMBER(bmcbowl_state::via_irq)
{
- machine().device("maincpu")->execute().set_input_line(4, data ? ASSERT_LINE : CLEAR_LINE);
+ machine().device("maincpu")->execute().set_input_line(4, data ? ASSERT_LINE : CLEAR_LINE);
}
@@ -272,35 +272,35 @@ WRITE8_MEMBER(bmcbowl_state::via_irq)
#ifdef NVRAM_HACK
static const UINT8 bmc_nv1[]=
{
- 0x00,0x00,0x55,0x55,0x00,0x00,0x55,0x55,0x00,0x00,0x55,0x55,0x00,0x00,0x55,0x55,0x13,0x88,0x46,0xDD,0x0F,0xA0,
- 0x5A,0xF5,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x6E,0x55,
- 0x55,0x55,0x3B,0x00,0x00,0x00,0x06,0x55,0x55,0x55,0x53,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,
- 0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x6E,0x55,0x55,0x55,0x3B,0x00,0x00,0x00,0x06,0x55,0x55,0x55,0x53,0x00,
- 0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
- 0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0xFF,0x00,0x0A,0x00,0x0A,
- 0x00,0x32,0x00,0x02,0x28,0x32,0x5C,0x0A,0x03,0x03,0xD6,0x66,0xFF,0xFF,0xFF,0xFF,0x5D,0xED,0xFF,0xFF,0xFF,0xFF,
- 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
- 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
- 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
- 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
- 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x25,0xD5,0x25,0x1C,0x00,0x00,0x00,0x00,
- 0x00,0x96,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x6E,
- 0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,
- 0x00,0x00,0x00,0x96,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
- 0x00,0x00,0xDC,0x00,0xFF,0xFF,0xFF,0xFF
+ 0x00,0x00,0x55,0x55,0x00,0x00,0x55,0x55,0x00,0x00,0x55,0x55,0x00,0x00,0x55,0x55,0x13,0x88,0x46,0xDD,0x0F,0xA0,
+ 0x5A,0xF5,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x6E,0x55,
+ 0x55,0x55,0x3B,0x00,0x00,0x00,0x06,0x55,0x55,0x55,0x53,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,
+ 0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x6E,0x55,0x55,0x55,0x3B,0x00,0x00,0x00,0x06,0x55,0x55,0x55,0x53,0x00,
+ 0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,
+ 0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0x00,0x00,0x00,0x00,0x55,0x55,0x55,0x55,0xFF,0x00,0x0A,0x00,0x0A,
+ 0x00,0x32,0x00,0x02,0x28,0x32,0x5C,0x0A,0x03,0x03,0xD6,0x66,0xFF,0xFF,0xFF,0xFF,0x5D,0xED,0xFF,0xFF,0xFF,0xFF,
+ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
+ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
+ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
+ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
+ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x25,0xD5,0x25,0x1C,0x00,0x00,0x00,0x00,
+ 0x00,0x96,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x6E,
+ 0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x96,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,0x00,0xDC,0x00,0xFF,0xFF,0xFF,0xFF
};
static const UINT8 bmc_nv2[]=
{
- 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
- 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0x00,0x09,0x00,0x00,0x2B,0xF1,
- 0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,
+ 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0x00,0x09,0x00,0x00,0x2B,0xF1,
+ 0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF
};
static const UINT8 bmc_nv3[]=
{
- 0xFA,0xFF,0x01,0x02,0x04,0x0A,0x1E,0xC8,0x02,0x01,0xFF,0xFF,0xFF,0xFF,0xFF
+ 0xFA,0xFF,0x01,0x02,0x04,0x0A,0x1E,0xC8,0x02,0x01,0xFF,0xFF,0xFF,0xFF,0xFF
};
@@ -362,9 +362,9 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( bmcbowl )
- PORT_START("IN0") /* DSW 1 */
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Note")
- PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Analizer")
+ PORT_START("IN0") /* DSW 1 */
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Note")
+ PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Analizer")
PORT_BIT(0x0002, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Pay") PORT_CODE(KEYCODE_M)
PORT_BIT(0x0004, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Stop") PORT_CODE(KEYCODE_Z)
@@ -383,7 +383,7 @@ static INPUT_PORTS_START( bmcbowl )
PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Big") PORT_CODE(KEYCODE_G)
PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Double") PORT_CODE(KEYCODE_H)
- PORT_START("IN1") /* DSW 2 */
+ PORT_START("IN1") /* DSW 2 */
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Coinage ) )
PORT_DIPSETTING( 0x20, "1 COIN 10 CREDITS" )
PORT_DIPSETTING( 0x00, "2 COINS 10 CREDITS" )
@@ -411,7 +411,7 @@ static INPUT_PORTS_START( bmcbowl )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("IN2") /* DSW 4 */
+ PORT_START("IN2") /* DSW 4 */
PORT_DIPNAME( 0x01, 0x00, "DSW4 8" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -448,8 +448,8 @@ READ8_MEMBER(bmcbowl_state::dips1_r)
{
switch(m_bmc_input)
{
- case 0x00: return ioport("IN1")->read();
- case 0x40: return ioport("IN2")->read();
+ case 0x00: return ioport("IN1")->read();
+ case 0x40: return ioport("IN2")->read();
}
logerror("%s:unknown input - %X\n",machine().describe_context(),m_bmc_input);
return 0xff;
diff --git a/src/mame/drivers/bmcpokr.c b/src/mame/drivers/bmcpokr.c
index 937ea21c831..7b4b2e9d4cf 100644
--- a/src/mame/drivers/bmcpokr.c
+++ b/src/mame/drivers/bmcpokr.c
@@ -252,10 +252,10 @@ ROM_START( bmcpokr )
ROM_LOAD16_BYTE( "ch-m-605.u13", 0x000000, 0x20000, CRC(c5c3fcd1) SHA1(b77fef734c290d52ae877a24bb3ee42b24eb5cb8) )
ROM_REGION( 0x200000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "ch-m-101.u39", 0x000000, 0x80000, CRC(f4b82e0a) SHA1(f545c6ab1375518de06900f02a0eb5af1edeeb47) )
- ROM_LOAD16_BYTE( "ch-m-201.u40", 0x000001, 0x80000, CRC(520571cb) SHA1(5c006f10d6192939003f8197e8bb64908a826fc1) )
- ROM_LOAD16_BYTE( "ch-m-301.u45", 0x100000, 0x80000, CRC(daba09c3) SHA1(e5d2f92b63288c36faa367a3306d1999264843e8) )
- ROM_LOAD16_BYTE( "ch-a-401.u29", 0x100001, 0x80000, CRC(5ee5d39f) SHA1(f6881aa5c755831d885f7adf35a5a094f7302205) )
+ ROM_LOAD16_BYTE( "ch-m-101.u39", 0x000000, 0x80000, CRC(f4b82e0a) SHA1(f545c6ab1375518de06900f02a0eb5af1edeeb47) )
+ ROM_LOAD16_BYTE( "ch-m-201.u40", 0x000001, 0x80000, CRC(520571cb) SHA1(5c006f10d6192939003f8197e8bb64908a826fc1) )
+ ROM_LOAD16_BYTE( "ch-m-301.u45", 0x100000, 0x80000, CRC(daba09c3) SHA1(e5d2f92b63288c36faa367a3306d1999264843e8) )
+ ROM_LOAD16_BYTE( "ch-a-401.u29", 0x100001, 0x80000, CRC(5ee5d39f) SHA1(f6881aa5c755831d885f7adf35a5a094f7302205) )
ROM_REGION( 0x040000, "oki", 0 ) /* Samples */
ROM_LOAD( "ch-m-701.u10", 0x00000, 0x40000, CRC(e01be644) SHA1(b68682786d5b40cb5672cfd7f717adcfb8fac7d3) )
diff --git a/src/mame/drivers/bnstars.c b/src/mame/drivers/bnstars.c
index 04467c3a3e5..15a379f63ff 100644
--- a/src/mame/drivers/bnstars.c
+++ b/src/mame/drivers/bnstars.c
@@ -99,19 +99,19 @@ class bnstars_state : public driver_device
public:
bnstars_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_ms32_tx0_ram(*this, "tx0_ram"),
- m_ms32_tx1_ram(*this, "tx1_ram"),
- m_ms32_bg0_ram(*this, "bg0_ram"),
- m_ms32_bg1_ram(*this, "bg1_ram"),
- m_ms32_roz0_ram(*this, "roz0_ram"),
- m_ms32_roz1_ram(*this, "roz1_ram"),
- m_ms32_pal_ram(*this, "pal_ram"),
- m_ms32_roz_ctrl(*this, "roz_ctrl"),
- m_ms32_spram(*this, "spram"),
- m_ms32_tx0_scroll(*this, "tx0_scroll"),
- m_ms32_bg0_scroll(*this, "bg0_scroll"),
- m_ms32_tx1_scroll(*this, "tx1_scroll"),
- m_ms32_bg1_scroll(*this, "bg1_scroll") { }
+ m_ms32_tx0_ram(*this, "tx0_ram"),
+ m_ms32_tx1_ram(*this, "tx1_ram"),
+ m_ms32_bg0_ram(*this, "bg0_ram"),
+ m_ms32_bg1_ram(*this, "bg1_ram"),
+ m_ms32_roz0_ram(*this, "roz0_ram"),
+ m_ms32_roz1_ram(*this, "roz1_ram"),
+ m_ms32_pal_ram(*this, "pal_ram"),
+ m_ms32_roz_ctrl(*this, "roz_ctrl"),
+ m_ms32_spram(*this, "spram"),
+ m_ms32_tx0_scroll(*this, "tx0_scroll"),
+ m_ms32_bg0_scroll(*this, "bg0_scroll"),
+ m_ms32_tx1_scroll(*this, "tx1_scroll"),
+ m_ms32_bg1_scroll(*this, "bg1_scroll") { }
tilemap_t *m_ms32_tx_tilemap[2];
tilemap_t *m_ms32_bg_tilemap[2];
@@ -235,57 +235,57 @@ static void draw_roz(running_machine &machine, bitmap_ind16 &bitmap, const recta
bnstars_state *state = machine.driver_data<bnstars_state>();
/* TODO: registers 0x40/4 / 0x44/4 and 0x50/4 / 0x54/4 are used, meaning unknown */
- if (state->m_ms32_roz_ctrl[chip][0x5c/4] & 1) /* "super" mode */
+ if (state->m_ms32_roz_ctrl[chip][0x5c/4] & 1) /* "super" mode */
{
printf("no lineram!\n");
return;
/*
- rectangle my_clip;
- int y,maxy;
-
- my_clip.min_x = cliprect.min_x;
- my_clip.max_x = cliprect.max_x;
-
- y = cliprect.min_y;
- maxy = cliprect.max_y;
-
- while (y <= maxy)
- {
- UINT32 *lineaddr = ms32_lineram + 8 * (y & 0xff);
-
- int start2x = (lineaddr[0x00/4] & 0xffff) | ((lineaddr[0x04/4] & 3) << 16);
- int start2y = (lineaddr[0x08/4] & 0xffff) | ((lineaddr[0x0c/4] & 3) << 16);
- int incxx = (lineaddr[0x10/4] & 0xffff) | ((lineaddr[0x14/4] & 1) << 16);
- int incxy = (lineaddr[0x18/4] & 0xffff) | ((lineaddr[0x1c/4] & 1) << 16);
- int startx = (state->m_ms32_roz_ctrl[0x00/4] & 0xffff) | ((state->m_ms32_roz_ctrl[0x04/4] & 3) << 16);
- int starty = (state->m_ms32_roz_ctrl[0x08/4] & 0xffff) | ((state->m_ms32_roz_ctrl[0x0c/4] & 3) << 16);
- int offsx = state->m_ms32_roz_ctrl[0x30/4];
- int offsy = state->m_ms32_roz_ctrl[0x34/4];
-
- my_clip.min_y = my_clip.max_y = y;
-
- offsx += (state->m_ms32_roz_ctrl[0x38/4] & 1) * 0x400; // ??? gratia, hayaosi1...
- offsy += (state->m_ms32_roz_ctrl[0x3c/4] & 1) * 0x400; // ??? gratia, hayaosi1...
-
- // extend sign
- if (start2x & 0x20000) start2x |= ~0x3ffff;
- if (start2y & 0x20000) start2y |= ~0x3ffff;
- if (startx & 0x20000) startx |= ~0x3ffff;
- if (starty & 0x20000) starty |= ~0x3ffff;
- if (incxx & 0x10000) incxx |= ~0x1ffff;
- if (incxy & 0x10000) incxy |= ~0x1ffff;
-
- state->m_ms32_roz_tilemap->draw_roz(bitmap, &my_clip,
- (start2x+startx+offsx)<<16, (start2y+starty+offsy)<<16,
- incxx<<8, incxy<<8, 0, 0,
- 1, // Wrap
- 0, priority);
-
- y++;
- }
- */
+ rectangle my_clip;
+ int y,maxy;
+
+ my_clip.min_x = cliprect.min_x;
+ my_clip.max_x = cliprect.max_x;
+
+ y = cliprect.min_y;
+ maxy = cliprect.max_y;
+
+ while (y <= maxy)
+ {
+ UINT32 *lineaddr = ms32_lineram + 8 * (y & 0xff);
+
+ int start2x = (lineaddr[0x00/4] & 0xffff) | ((lineaddr[0x04/4] & 3) << 16);
+ int start2y = (lineaddr[0x08/4] & 0xffff) | ((lineaddr[0x0c/4] & 3) << 16);
+ int incxx = (lineaddr[0x10/4] & 0xffff) | ((lineaddr[0x14/4] & 1) << 16);
+ int incxy = (lineaddr[0x18/4] & 0xffff) | ((lineaddr[0x1c/4] & 1) << 16);
+ int startx = (state->m_ms32_roz_ctrl[0x00/4] & 0xffff) | ((state->m_ms32_roz_ctrl[0x04/4] & 3) << 16);
+ int starty = (state->m_ms32_roz_ctrl[0x08/4] & 0xffff) | ((state->m_ms32_roz_ctrl[0x0c/4] & 3) << 16);
+ int offsx = state->m_ms32_roz_ctrl[0x30/4];
+ int offsy = state->m_ms32_roz_ctrl[0x34/4];
+
+ my_clip.min_y = my_clip.max_y = y;
+
+ offsx += (state->m_ms32_roz_ctrl[0x38/4] & 1) * 0x400; // ??? gratia, hayaosi1...
+ offsy += (state->m_ms32_roz_ctrl[0x3c/4] & 1) * 0x400; // ??? gratia, hayaosi1...
+
+ // extend sign
+ if (start2x & 0x20000) start2x |= ~0x3ffff;
+ if (start2y & 0x20000) start2y |= ~0x3ffff;
+ if (startx & 0x20000) startx |= ~0x3ffff;
+ if (starty & 0x20000) starty |= ~0x3ffff;
+ if (incxx & 0x10000) incxx |= ~0x1ffff;
+ if (incxy & 0x10000) incxy |= ~0x1ffff;
+
+ state->m_ms32_roz_tilemap->draw_roz(bitmap, &my_clip,
+ (start2x+startx+offsx)<<16, (start2y+starty+offsy)<<16,
+ incxx<<8, incxy<<8, 0, 0,
+ 1, // Wrap
+ 0, priority);
+
+ y++;
+ }
+ */
}
- else /* "simple" mode */
+ else /* "simple" mode */
{
int startx = (state->m_ms32_roz_ctrl[chip][0x00/4] & 0xffff) | ((state->m_ms32_roz_ctrl[chip][0x04/4] & 3) << 16);
int starty = (state->m_ms32_roz_ctrl[chip][0x08/4] & 0xffff) | ((state->m_ms32_roz_ctrl[chip][0x0c/4] & 3) << 16);
@@ -296,8 +296,8 @@ static void draw_roz(running_machine &machine, bitmap_ind16 &bitmap, const recta
int offsx = state->m_ms32_roz_ctrl[chip][0x30/4];
int offsy = state->m_ms32_roz_ctrl[chip][0x34/4];
- offsx += (state->m_ms32_roz_ctrl[chip][0x38/4] & 1) * 0x400; // ??? gratia, hayaosi1...
- offsy += (state->m_ms32_roz_ctrl[chip][0x3c/4] & 1) * 0x400; // ??? gratia, hayaosi1...
+ offsx += (state->m_ms32_roz_ctrl[chip][0x38/4] & 1) * 0x400; // ??? gratia, hayaosi1...
+ offsy += (state->m_ms32_roz_ctrl[chip][0x3c/4] & 1) * 0x400; // ??? gratia, hayaosi1...
/* extend sign */
if (startx & 0x20000) startx |= ~0x3ffff;
@@ -420,53 +420,53 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
int code, attr, color, size, pri, pri_mask;
gfx_element *gfx = machine.gfx[region];
- UINT32 *source = sprram_top;
- const UINT32 *finish = sprram_top + (sprram_size - 0x10) / 4;
+ UINT32 *source = sprram_top;
+ const UINT32 *finish = sprram_top + (sprram_size - 0x10) / 4;
if (state->m_ms32_reverse_sprite_order == 1)
{
- source = sprram_top + (sprram_size - 0x10) / 4;
- finish = sprram_top;
+ source = sprram_top + (sprram_size - 0x10) / 4;
+ finish = sprram_top;
}
for (;state->m_ms32_reverse_sprite_order ? (source>=finish) : (source<finish); state->m_ms32_reverse_sprite_order ? (source-=4) : (source+=4))
{
- attr = source[ 0 ];
+ attr = source[ 0 ];
- if ((attr & 0x0004) == 0) continue;
+ if ((attr & 0x0004) == 0) continue;
- flipx = attr & 1;
- flipy = attr & 2;
+ flipx = attr & 1;
+ flipy = attr & 2;
pri = (attr >> 4)&0xf;
- code = source[ 1 ];
- color = source[ 2 ];
+ code = source[ 1 ];
+ color = source[ 2 ];
- tx = (code >> 0) & 0xff;
- ty = (code >> 8) & 0xff;
+ tx = (code >> 0) & 0xff;
+ ty = (code >> 8) & 0xff;
- code = (color & 0x0fff);
+ code = (color & 0x0fff);
- color = (color >> 12) & 0xf;
+ color = (color >> 12) & 0xf;
- size = source[ 3 ];
+ size = source[ 3 ];
- xsize = ((size >> 0) & 0xff) + 1;
- ysize = ((size >> 8) & 0xff) + 1;
+ xsize = ((size >> 0) & 0xff) + 1;
+ ysize = ((size >> 8) & 0xff) + 1;
- sy = source[ 4 ];
- sx = source[ 5 ];
+ sy = source[ 4 ];
+ sx = source[ 5 ];
- sx = (sx & 0x3ff) - (sx & 0x400);
- sy = (sy & 0x1ff) - (sy & 0x200);
+ sx = (sx & 0x3ff) - (sx & 0x400);
+ sy = (sy & 0x1ff) - (sy & 0x200);
- xzoom = (source[ 6 ]&0xffff);
- yzoom = (source[ 7 ]&0xffff);
+ xzoom = (source[ 6 ]&0xffff);
+ yzoom = (source[ 7 ]&0xffff);
- if (!yzoom || !xzoom) continue;
+ if (!yzoom || !xzoom) continue;
yzoom = 0x1000000/yzoom;
xzoom = 0x1000000/xzoom;
@@ -498,7 +498,7 @@ static void draw_sprites(running_machine &machine, bitmap_ind16 &bitmap, const r
flipx, flipy,
sx,sy,
xzoom, yzoom, machine.priority_bitmap,pri_mask, 0);
- } /* end sprite loop */
+ } /* end sprite loop */
}
@@ -538,7 +538,7 @@ UINT32 bnstars_state::screen_update_bnstars_left(screen_device &screen, bitmap_i
machine().priority_bitmap.fill(0, cliprect);
- bitmap.fill(0, cliprect); /* bg color */
+ bitmap.fill(0, cliprect); /* bg color */
m_ms32_bg_tilemap[0]->set_scrollx(0, m_ms32_bg0_scroll[0x00/4] + m_ms32_bg0_scroll[0x08/4] + 0x10 );
@@ -562,7 +562,7 @@ UINT32 bnstars_state::screen_update_bnstars_right(screen_device &screen, bitmap_
machine().priority_bitmap.fill(0, cliprect);
- bitmap.fill(0x8000+0, cliprect); /* bg color */
+ bitmap.fill(0x8000+0, cliprect); /* bg color */
m_ms32_bg_tilemap[1]->set_scrollx(0, m_ms32_bg1_scroll[0x00/4] + m_ms32_bg1_scroll[0x08/4] + 0x10 );
@@ -1358,13 +1358,13 @@ TIMER_DEVICE_CALLBACK_MEMBER(bnstars_state::ms32_interrupt)
if( scanline == 0 ) irq_raise(machine(), 10);
if( scanline == 8) irq_raise(machine(), 9);
/* hayaosi1 needs at least 12 IRQ 0 per frame to work (see code at FFE02289)
- kirarast needs it too, at least 8 per frame, but waits for a variable amount
- 47pi2 needs ?? per frame (otherwise it hangs when you lose)
- in different points. Could this be a raster interrupt?
- Other games using it but not needing it to work:
- desertwr
- p47aces
- */
+ kirarast needs it too, at least 8 per frame, but waits for a variable amount
+ 47pi2 needs ?? per frame (otherwise it hangs when you lose)
+ in different points. Could this be a raster interrupt?
+ Other games using it but not needing it to work:
+ desertwr
+ p47aces
+ */
if( (scanline % 8) == 0 && scanline <= 224 ) irq_raise(machine(), 0);
}
diff --git a/src/mame/drivers/bntyhunt.c b/src/mame/drivers/bntyhunt.c
index 30d07668953..5efe3cc2685 100644
--- a/src/mame/drivers/bntyhunt.c
+++ b/src/mame/drivers/bntyhunt.c
@@ -14,7 +14,7 @@ class bntyhunt_state : public driver_device
public:
bntyhunt_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@@ -64,7 +64,7 @@ MACHINE_CONFIG_END
ROM_START(bntyhunt)
- ROM_REGION32_LE(0x20000, "maincpu", 0) /* motherboard bios */
+ ROM_REGION32_LE(0x20000, "maincpu", 0) /* motherboard bios */
ROM_LOAD("bntyhunt.pcbios", 0x000000, 0x10000, NO_DUMP )
DISK_REGION( "disks" )
diff --git a/src/mame/drivers/bogeyman.c b/src/mame/drivers/bogeyman.c
index 26fdbecd1dd..ead4bec5250 100644
--- a/src/mame/drivers/bogeyman.c
+++ b/src/mame/drivers/bogeyman.c
@@ -154,9 +154,9 @@ static const gfx_layout tiles1a =
3,
{ 0x8000*8+4, 0, 4 },
{ 1024*8*8+3, 1024*8*8+2, 1024*8*8+1, 1024*8*8+0, 3, 2, 1, 0,
- 1024*8*8+3+64, 1024*8*8+2+64, 1024*8*8+1+64, 1024*8*8+0+64, 3+64,2+64,1+64,0+64 },
+ 1024*8*8+3+64, 1024*8*8+2+64, 1024*8*8+1+64, 1024*8*8+0+64, 3+64,2+64,1+64,0+64 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 0*8+16*8, 1*8+16*8, 2*8+16*8, 3*8+16*8, 4*8+16*8, 5*8+16*8, 6*8+16*8, 7*8+16*8 },
+ 0*8+16*8, 1*8+16*8, 2*8+16*8, 3*8+16*8, 4*8+16*8, 5*8+16*8, 6*8+16*8, 7*8+16*8 },
32*8
};
@@ -167,9 +167,9 @@ static const gfx_layout tiles1b =
3,
{ 0x8000*8+0, 0+0x1000*8+0, 4+0x1000*8 },
{ 1024*8*8+3, 1024*8*8+2, 1024*8*8+1, 1024*8*8+0, 3, 2, 1, 0,
- 1024*8*8+3+64, 1024*8*8+2+64, 1024*8*8+1+64, 1024*8*8+0+64, 3+64,2+64, 1+64,0+64 },
+ 1024*8*8+3+64, 1024*8*8+2+64, 1024*8*8+1+64, 1024*8*8+0+64, 3+64,2+64, 1+64,0+64 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 0*8+16*8, 1*8+16*8, 2*8+16*8, 3*8+16*8, 4*8+16*8, 5*8+16*8, 6*8+16*8, 7*8+16*8 },
+ 0*8+16*8, 1*8+16*8, 2*8+16*8, 3*8+16*8, 4*8+16*8, 5*8+16*8, 6*8+16*8, 7*8+16*8 },
32*8
};
@@ -180,9 +180,9 @@ static const gfx_layout sprites =
3,
{ 0x8000*8, 0x4000*8, 0 },
{ 16*8, 1+(16*8), 2+(16*8), 3+(16*8), 4+(16*8), 5+(16*8), 6+(16*8), 7+(16*8),
- 0, 1, 2, 3, 4, 5, 6, 7 },
+ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
16*16
};
@@ -239,7 +239,7 @@ static const ay8910_interface ay8910_config =
static MACHINE_CONFIG_START( bogeyman, bogeyman_state )
// basic machine hardware
- MCFG_CPU_ADD("maincpu", M6502, 1500000) /* Verified */
+ MCFG_CPU_ADD("maincpu", M6502, 1500000) /* Verified */
MCFG_CPU_PROGRAM_MAP(bogeyman_map)
MCFG_CPU_PERIODIC_INT_DRIVER(bogeyman_state, irq0_line_hold, 16*60) // Controls sound
@@ -261,11 +261,11 @@ static MACHINE_CONFIG_START( bogeyman, bogeyman_state )
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay1", AY8910, 1500000) /* Verified */
+ MCFG_SOUND_ADD("ay1", AY8910, 1500000) /* Verified */
MCFG_SOUND_CONFIG(ay8910_config)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
- MCFG_SOUND_ADD("ay2", AY8910, 1500000) /* Verified */
+ MCFG_SOUND_ADD("ay2", AY8910, 1500000) /* Verified */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
MACHINE_CONFIG_END
@@ -278,17 +278,17 @@ ROM_START( bogeyman )
ROM_LOAD( "j00.c17", 0x0c000, 0x04000, CRC(5d486de9) SHA1(40ea14a4a25f8f38d33a8844f627ba42503e1280) )
ROM_REGION( 0x10000, "gfx1", 0 )
- ROM_LOAD( "j70.h15", 0x00000, 0x04000, CRC(fdc787bf) SHA1(1f185a1927fff6ce793d673ebd882a852ac547e4) ) /* Characters */
+ ROM_LOAD( "j70.h15", 0x00000, 0x04000, CRC(fdc787bf) SHA1(1f185a1927fff6ce793d673ebd882a852ac547e4) ) /* Characters */
ROM_LOAD( "j60.c17", 0x08000, 0x01000, CRC(cc03ceb2) SHA1(0149eacac2c1469be6e19f7a43c13d1fe8790f2c) )
ROM_CONTINUE( 0x0a000, 0x01000 )
ROM_REGION( 0x0c000, "gfx2", 0 )
- ROM_LOAD( "j30.c9", 0x00000, 0x04000, CRC(41af81c0) SHA1(d8465622cdf16bc906818641d7988fc412454a45) ) /* Sprites */
+ ROM_LOAD( "j30.c9", 0x00000, 0x04000, CRC(41af81c0) SHA1(d8465622cdf16bc906818641d7988fc412454a45) ) /* Sprites */
ROM_LOAD( "j40.c7", 0x04000, 0x04000, CRC(8b438421) SHA1(295806c119f4ddc01afc15550e1ff397fbf5d862) )
ROM_LOAD( "j50.c5", 0x08000, 0x04000, CRC(b507157f) SHA1(471f67eb5e7aedef52353581405d9613d2a86898) )
ROM_REGION( 0x10000, "gfx3", 0 )
- ROM_LOAD( "j90.h12", 0x00000, 0x04000, CRC(46b2d4d0) SHA1(35cd320d4db7aa6a89f83ba4d9ff88925357d640) ) /* Tiles */
+ ROM_LOAD( "j90.h12", 0x00000, 0x04000, CRC(46b2d4d0) SHA1(35cd320d4db7aa6a89f83ba4d9ff88925357d640) ) /* Tiles */
ROM_LOAD( "j80.h13", 0x04000, 0x04000, CRC(77ebd0a4) SHA1(c6921ee59633eeeda97c73cb7833578fa8a84fa3) )
ROM_LOAD( "ja0.h10", 0x08000, 0x01000, CRC(f2aa05ed) SHA1(e6df96e4128eff6de7e6483254608dd8a7b258b9) )
ROM_CONTINUE( 0x0a000, 0x01000 )
@@ -296,8 +296,8 @@ ROM_START( bogeyman )
ROM_CONTINUE( 0x0e000, 0x01000 )
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "82s129.5k", 0x0000, 0x0100, CRC(4a7c5367) SHA1(a67f5b90c18238cbfb1507230b4614191d37eef4) ) /* Colour prom 1 */
- ROM_LOAD( "82s129.6k", 0x0100, 0x0100, CRC(b6127713) SHA1(5bd8627453916ac6605af7d1193f79c748eab981) ) /* Colour prom 2 */
+ ROM_LOAD( "82s129.5k", 0x0000, 0x0100, CRC(4a7c5367) SHA1(a67f5b90c18238cbfb1507230b4614191d37eef4) ) /* Colour prom 1 */
+ ROM_LOAD( "82s129.6k", 0x0100, 0x0100, CRC(b6127713) SHA1(5bd8627453916ac6605af7d1193f79c748eab981) ) /* Colour prom 2 */
ROM_END
/* Game Driver */
diff --git a/src/mame/drivers/bombjack.c b/src/mame/drivers/bombjack.c
index fd0a10de9c5..731771817ce 100644
--- a/src/mame/drivers/bombjack.c
+++ b/src/mame/drivers/bombjack.c
@@ -147,7 +147,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, bombjack_state )
AM_RANGE(0xb000, 0xb000) AM_WRITE(irq_mask_w)
AM_RANGE(0xb001, 0xb001) AM_READ_PORT("P2")
AM_RANGE(0xb002, 0xb002) AM_READ_PORT("SYSTEM")
- AM_RANGE(0xb003, 0xb003) AM_READNOP /* watchdog reset? */
+ AM_RANGE(0xb003, 0xb003) AM_READNOP /* watchdog reset? */
AM_RANGE(0xb004, 0xb004) AM_READ_PORT("DSW1")
AM_RANGE(0xb004, 0xb004) AM_WRITE(bombjack_flipscreen_w)
AM_RANGE(0xb005, 0xb005) AM_READ_PORT("DSW2")
@@ -182,9 +182,9 @@ static INPUT_PORTS_START( bombjack )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
PORT_START("P2")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
@@ -192,16 +192,16 @@ static INPUT_PORTS_START( bombjack )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* probably unused */
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START2 )
- PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
+ PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
PORT_START("DSW1")
PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:!1,!2")
@@ -228,7 +228,7 @@ static INPUT_PORTS_START( bombjack )
PORT_START("DSW2")
/* Manual states DSW2 bits 0-2 are unused and have to be left on OFF (0x00) */
- PORT_DIPNAME( 0x07, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:!1,!2,!3") /* see notes */
+ PORT_DIPNAME( 0x07, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:!1,!2,!3") /* see notes */
PORT_DIPSETTING( 0x02, "Every 30k" )
PORT_DIPSETTING( 0x01, "Every 100k" )
PORT_DIPSETTING( 0x07, "50k, 100k and 300k" )
@@ -262,47 +262,47 @@ INPUT_PORTS_END
static const gfx_layout charlayout1 =
{
- 8,8, /* 8*8 characters */
- 512, /* 512 characters */
- 3, /* 3 bits per pixel */
- { 0, 512*8*8, 2*512*8*8 }, /* the bitplanes are separated */
- { 0, 1, 2, 3, 4, 5, 6, 7 }, /* pretty straightforward layout */
+ 8,8, /* 8*8 characters */
+ 512, /* 512 characters */
+ 3, /* 3 bits per pixel */
+ { 0, 512*8*8, 2*512*8*8 }, /* the bitplanes are separated */
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, /* pretty straightforward layout */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout charlayout2 =
{
- 16,16, /* 16*16 characters */
- 256, /* 256 characters */
- 3, /* 3 bits per pixel */
- { 0, 1024*8*8, 2*1024*8*8 }, /* the bitplanes are separated */
- { 0, 1, 2, 3, 4, 5, 6, 7, /* pretty straightforward layout */
+ 16,16, /* 16*16 characters */
+ 256, /* 256 characters */
+ 3, /* 3 bits per pixel */
+ { 0, 1024*8*8, 2*1024*8*8 }, /* the bitplanes are separated */
+ { 0, 1, 2, 3, 4, 5, 6, 7, /* pretty straightforward layout */
8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
- 32*8 /* every character takes 32 consecutive bytes */
+ 32*8 /* every character takes 32 consecutive bytes */
};
static const gfx_layout spritelayout1 =
{
- 16,16, /* 16*16 sprites */
- 128, /* 128 sprites */
- 3, /* 3 bits per pixel */
- { 0, 1024*8*8, 2*1024*8*8 }, /* the bitplanes are separated */
+ 16,16, /* 16*16 sprites */
+ 128, /* 128 sprites */
+ 3, /* 3 bits per pixel */
+ { 0, 1024*8*8, 2*1024*8*8 }, /* the bitplanes are separated */
{ 0, 1, 2, 3, 4, 5, 6, 7,
8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static const gfx_layout spritelayout2 =
{
- 32,32, /* 32*32 sprites */
- 32, /* 32 sprites */
- 3, /* 3 bits per pixel */
- { 0, 1024*8*8, 2*1024*8*8 }, /* the bitplanes are separated */
+ 32,32, /* 32*32 sprites */
+ 32, /* 32 sprites */
+ 3, /* 3 bits per pixel */
+ { 0, 1024*8*8, 2*1024*8*8 }, /* the bitplanes are separated */
{ 0, 1, 2, 3, 4, 5, 6, 7,
8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7,
32*8+0, 32*8+1, 32*8+2, 32*8+3, 32*8+4, 32*8+5, 32*8+6, 32*8+7,
@@ -311,14 +311,14 @@ static const gfx_layout spritelayout2 =
16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8,
64*8, 65*8, 66*8, 67*8, 68*8, 69*8, 70*8, 71*8,
80*8, 81*8, 82*8, 83*8, 84*8, 85*8, 86*8, 87*8 },
- 128*8 /* every sprite takes 128 consecutive bytes */
+ 128*8 /* every sprite takes 128 consecutive bytes */
};
static GFXDECODE_START( bombjack )
- GFXDECODE_ENTRY( "chars", 0x0000, charlayout1, 0, 16 ) /* characters */
- GFXDECODE_ENTRY( "tiles", 0x0000, charlayout2, 0, 16 ) /* background tiles */
- GFXDECODE_ENTRY( "sprites", 0x0000, spritelayout1, 0, 16 ) /* normal sprites */
- GFXDECODE_ENTRY( "sprites", 0x1000, spritelayout2, 0, 16 ) /* large sprites */
+ GFXDECODE_ENTRY( "chars", 0x0000, charlayout1, 0, 16 ) /* characters */
+ GFXDECODE_ENTRY( "tiles", 0x0000, charlayout2, 0, 16 ) /* background tiles */
+ GFXDECODE_ENTRY( "sprites", 0x0000, spritelayout1, 0, 16 ) /* normal sprites */
+ GFXDECODE_ENTRY( "sprites", 0x1000, spritelayout2, 0, 16 ) /* large sprites */
GFXDECODE_END
@@ -356,11 +356,11 @@ INTERRUPT_GEN_MEMBER(bombjack_state::vblank_irq)
static MACHINE_CONFIG_START( bombjack, bombjack_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, XTAL_4MHz) /* Confirmed from PCB */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_4MHz) /* Confirmed from PCB */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bombjack_state, vblank_irq)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_12MHz/4) /* Confirmed from PCB */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_12MHz/4) /* Confirmed from PCB */
MCFG_CPU_PROGRAM_MAP(audio_map)
MCFG_CPU_IO_MAP(audio_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bombjack_state, nmi_line_pulse)
@@ -381,7 +381,7 @@ static MACHINE_CONFIG_START( bombjack, bombjack_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay1", AY8910, XTAL_12MHz/8) /* Confirmed from PCB */
+ MCFG_SOUND_ADD("ay1", AY8910, XTAL_12MHz/8) /* Confirmed from PCB */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.13)
MCFG_SOUND_ADD("ay2", AY8910, XTAL_12MHz/8)
@@ -407,25 +407,25 @@ ROM_START( bombjack )
ROM_LOAD( "12_n01b.bin", 0x6000, 0x2000, CRC(1d3ecee5) SHA1(8b3c49e21ea4952cae7042890d1be2115f7d6fda) )
ROM_LOAD( "13.1r", 0xc000, 0x2000, CRC(70e0244d) SHA1(67654155e42821ea78a655f869fb81c8d6387f63) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound board */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound board */
ROM_LOAD( "01_h03t.bin", 0x0000, 0x2000, CRC(8407917d) SHA1(318face9f7a7ab6c7eeac773995040425e780aaf) )
ROM_REGION( 0x3000, "chars", 0 )
- ROM_LOAD( "03_e08t.bin", 0x0000, 0x1000, CRC(9f0470d5) SHA1(94ef52ef47b4399a03528fe3efeac9c1d6983446) ) /* chars */
+ ROM_LOAD( "03_e08t.bin", 0x0000, 0x1000, CRC(9f0470d5) SHA1(94ef52ef47b4399a03528fe3efeac9c1d6983446) ) /* chars */
ROM_LOAD( "04_h08t.bin", 0x1000, 0x1000, CRC(81ec12e6) SHA1(e29ba193f21aa898499187603b25d2e226a07c7b) )
ROM_LOAD( "05_k08t.bin", 0x2000, 0x1000, CRC(e87ec8b1) SHA1(a66808ef2d62fca2854396898b86bac9be5f17a3) )
ROM_REGION( 0x6000, "tiles", 0 )
- ROM_LOAD( "06_l08t.bin", 0x0000, 0x2000, CRC(51eebd89) SHA1(515128a3971fcb97b60c5b6bdd2b03026aec1921) ) /* background tiles */
+ ROM_LOAD( "06_l08t.bin", 0x0000, 0x2000, CRC(51eebd89) SHA1(515128a3971fcb97b60c5b6bdd2b03026aec1921) ) /* background tiles */
ROM_LOAD( "07_n08t.bin", 0x2000, 0x2000, CRC(9dd98e9d) SHA1(6db6006a6e20ff7c243d88293ca53681c4703ea5) )
ROM_LOAD( "08_r08t.bin", 0x4000, 0x2000, CRC(3155ee7d) SHA1(e7897dca4c145f10b7d975b8ef0e4d8aa9354c25) )
ROM_REGION( 0x6000, "sprites", 0 )
- ROM_LOAD( "16_m07b.bin", 0x0000, 0x2000, CRC(94694097) SHA1(de71bcd67f97d05527f2504fc8430be333fb9ec2) ) /* sprites */
+ ROM_LOAD( "16_m07b.bin", 0x0000, 0x2000, CRC(94694097) SHA1(de71bcd67f97d05527f2504fc8430be333fb9ec2) ) /* sprites */
ROM_LOAD( "15_l07b.bin", 0x2000, 0x2000, CRC(013f58f2) SHA1(20c64593ab9fcb04cefbce0cd5d17ce3ff26441b) )
ROM_LOAD( "14_j07b.bin", 0x4000, 0x2000, CRC(101c858d) SHA1(ed1746c15cdb04fae888601d940183d5c7702282) )
- ROM_REGION( 0x1000, "gfx4", 0 ) /* background tilemaps */
+ ROM_REGION( 0x1000, "gfx4", 0 ) /* background tilemaps */
ROM_LOAD( "02_p04t.bin", 0x0000, 0x1000, CRC(398d4a02) SHA1(ac18a8219f99ba9178b96c9564de3978e39c59fd) )
ROM_END
@@ -437,25 +437,25 @@ ROM_START( bombjack2 )
ROM_LOAD( "12_n01b.bin", 0x6000, 0x2000, CRC(1d3ecee5) SHA1(8b3c49e21ea4952cae7042890d1be2115f7d6fda) )
ROM_LOAD( "13_r01b.bin", 0xc000, 0x2000, CRC(bcafdd29) SHA1(d243eb1249e885aa75fc910fce6e7744770d6e82) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound board */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound board */
ROM_LOAD( "01_h03t.bin", 0x0000, 0x2000, CRC(8407917d) SHA1(318face9f7a7ab6c7eeac773995040425e780aaf) )
ROM_REGION( 0x3000, "chars", 0 )
- ROM_LOAD( "03_e08t.bin", 0x0000, 0x1000, CRC(9f0470d5) SHA1(94ef52ef47b4399a03528fe3efeac9c1d6983446) ) /* chars */
+ ROM_LOAD( "03_e08t.bin", 0x0000, 0x1000, CRC(9f0470d5) SHA1(94ef52ef47b4399a03528fe3efeac9c1d6983446) ) /* chars */
ROM_LOAD( "04_h08t.bin", 0x1000, 0x1000, CRC(81ec12e6) SHA1(e29ba193f21aa898499187603b25d2e226a07c7b) )
ROM_LOAD( "05_k08t.bin", 0x2000, 0x1000, CRC(e87ec8b1) SHA1(a66808ef2d62fca2854396898b86bac9be5f17a3) )
ROM_REGION( 0x6000, "tiles", 0 )
- ROM_LOAD( "06_l08t.bin", 0x0000, 0x2000, CRC(51eebd89) SHA1(515128a3971fcb97b60c5b6bdd2b03026aec1921) ) /* background tiles */
+ ROM_LOAD( "06_l08t.bin", 0x0000, 0x2000, CRC(51eebd89) SHA1(515128a3971fcb97b60c5b6bdd2b03026aec1921) ) /* background tiles */
ROM_LOAD( "07_n08t.bin", 0x2000, 0x2000, CRC(9dd98e9d) SHA1(6db6006a6e20ff7c243d88293ca53681c4703ea5) )
ROM_LOAD( "08_r08t.bin", 0x4000, 0x2000, CRC(3155ee7d) SHA1(e7897dca4c145f10b7d975b8ef0e4d8aa9354c25) )
ROM_REGION( 0x6000, "sprites", 0 )
- ROM_LOAD( "16_m07b.bin", 0x0000, 0x2000, CRC(94694097) SHA1(de71bcd67f97d05527f2504fc8430be333fb9ec2) ) /* sprites */
+ ROM_LOAD( "16_m07b.bin", 0x0000, 0x2000, CRC(94694097) SHA1(de71bcd67f97d05527f2504fc8430be333fb9ec2) ) /* sprites */
ROM_LOAD( "15_l07b.bin", 0x2000, 0x2000, CRC(013f58f2) SHA1(20c64593ab9fcb04cefbce0cd5d17ce3ff26441b) )
ROM_LOAD( "14_j07b.bin", 0x4000, 0x2000, CRC(101c858d) SHA1(ed1746c15cdb04fae888601d940183d5c7702282) )
- ROM_REGION( 0x1000, "gfx4", 0 ) /* background tilemaps */
+ ROM_REGION( 0x1000, "gfx4", 0 ) /* background tilemaps */
ROM_LOAD( "02_p04t.bin", 0x0000, 0x1000, CRC(398d4a02) SHA1(ac18a8219f99ba9178b96c9564de3978e39c59fd) )
ROM_END
diff --git a/src/mame/drivers/boogwing.c b/src/mame/drivers/boogwing.c
index 1e4fe457456..a6ad7c1e007 100644
--- a/src/mame/drivers/boogwing.c
+++ b/src/mame/drivers/boogwing.c
@@ -188,7 +188,7 @@ static INPUT_PORTS_START( boogwing )
PORT_DIPNAME( 0x1000, 0x1000, "Coin Slots" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x1000, "Common" )
PORT_DIPSETTING( 0x0000, "Individual" )
- PORT_DIPNAME( 0x2000, 0x2000, "Stage Reset" ) PORT_DIPLOCATION("SW2:6") /* At loss of life */
+ PORT_DIPNAME( 0x2000, 0x2000, "Stage Reset" ) PORT_DIPLOCATION("SW2:6") /* At loss of life */
PORT_DIPSETTING( 0x2000, "Point of Termination" )
PORT_DIPSETTING( 0x0000, "Beginning of Stage" )
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") /* Manual shows as OFF and states "Don't Change" */
@@ -260,17 +260,17 @@ static const gfx_layout spritelayout =
{ 24,8,16,0 },
{ 512,513,514,515,516,517,518,519, 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
- 8*32, 9*32,10*32,11*32,12*32,13*32,14*32,15*32},
+ 8*32, 9*32,10*32,11*32,12*32,13*32,14*32,15*32},
32*32
};
static GFXDECODE_START( boogwing )
- GFXDECODE_ENTRY( "tiles1", 0, tile_8x8_layout, 0, 16 ) /* Tiles (8x8) */
- GFXDECODE_ENTRY( "tiles2", 0, tile_16x16_layout_5bpp, 0x100, 16 ) /* Tiles (16x16) */
- GFXDECODE_ENTRY( "tiles3", 0, tile_16x16_layout, 0x300, 32 ) /* Tiles (16x16) */
- GFXDECODE_ENTRY( "sprites1", 0, spritelayout, 0x500, 32 ) /* Sprites (16x16) */
- GFXDECODE_ENTRY( "sprites2", 0, spritelayout, 0x700, 16 ) /* Sprites (16x16) */
+ GFXDECODE_ENTRY( "tiles1", 0, tile_8x8_layout, 0, 16 ) /* Tiles (8x8) */
+ GFXDECODE_ENTRY( "tiles2", 0, tile_16x16_layout_5bpp, 0x100, 16 ) /* Tiles (16x16) */
+ GFXDECODE_ENTRY( "tiles3", 0, tile_16x16_layout, 0x300, 32 ) /* Tiles (16x16) */
+ GFXDECODE_ENTRY( "sprites1", 0, spritelayout, 0x500, 32 ) /* Sprites (16x16) */
+ GFXDECODE_ENTRY( "sprites2", 0, spritelayout, 0x700, 16 ) /* Sprites (16x16) */
GFXDECODE_END
/**********************************************************************************/
@@ -307,7 +307,7 @@ static const deco16ic_interface boogwing_deco16ic_tilegen1_intf =
0, 1,
0x0f, 0x1f, /* trans masks (pf2 has 5bpp graphics) */
0, 0, /* color base (pf2 is non default) */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
NULL,
boogwing_bank_callback,
0, 1
@@ -329,7 +329,7 @@ static const deco16ic_interface boogwing_deco16ic_tilegen2_intf =
static MACHINE_CONFIG_START( boogwing, boogwing_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, 14000000) /* DE102 */
+ MCFG_CPU_ADD("maincpu", M68000, 14000000) /* DE102 */
MCFG_CPU_PROGRAM_MAP(boogwing_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", boogwing_state, irq6_line_hold)
diff --git a/src/mame/drivers/bottom9.c b/src/mame/drivers/bottom9.c
index dca0a865aae..4272e877da5 100644
--- a/src/mame/drivers/bottom9.c
+++ b/src/mame/drivers/bottom9.c
@@ -219,13 +219,13 @@ static INPUT_PORTS_START( bottom9 )
PORT_DIPSETTING( 0x08, "30" )
PORT_DIPSETTING( 0x00, "40" )
PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
- PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
+ PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
@@ -235,7 +235,7 @@ static INPUT_PORTS_START( bottom9 )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW3:2" ) /* According to manual: N/U */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW3:2" ) /* According to manual: N/U */
PORT_SERVICE_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW3:3" )
PORT_DIPNAME( 0x80, 0x80, "Fielder Control" ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x80, DEF_STR( Normal ) )
@@ -355,7 +355,7 @@ static MACHINE_CONFIG_START( bottom9, bottom9_state )
MCFG_CPU_ADD("audiocpu", Z80, 3579545)
MCFG_CPU_PROGRAM_MAP(audio_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(bottom9_state, bottom9_sound_interrupt, 8*60) /* irq is triggered by the main CPU */
+ MCFG_CPU_PERIODIC_INT_DRIVER(bottom9_state, bottom9_sound_interrupt, 8*60) /* irq is triggered by the main CPU */
/* video hardware */
@@ -406,7 +406,7 @@ ROM_START( bottom9 )
ROM_LOAD( "891j01.g8", 0x0000, 0x8000, CRC(31b0a0a8) SHA1(8e047f81c19f25de97fa22e70dcfe9e06bfae699) )
ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "891e10c", 0x00000, 0x10000, CRC(209b0431) SHA1(07f05f63267d5ed5c99b5f786bb66a87045db9e1) ) /* characters */
+ ROM_LOAD16_BYTE( "891e10c", 0x00000, 0x10000, CRC(209b0431) SHA1(07f05f63267d5ed5c99b5f786bb66a87045db9e1) ) /* characters */
ROM_LOAD16_BYTE( "891e10a", 0x00001, 0x10000, CRC(8020a9e8) SHA1(3792794a1b875506089da63cae955668cc61f54b) )
ROM_LOAD16_BYTE( "891e10d", 0x20000, 0x10000, CRC(16d5fd7a) SHA1(895a53e41173a70c48337d812466857676908a23) )
ROM_LOAD16_BYTE( "891e10b", 0x20001, 0x10000, CRC(30121cc0) SHA1(79174d00b79855c00c9c872b8f32946be1bf1d8a) )
@@ -416,7 +416,7 @@ ROM_START( bottom9 )
ROM_LOAD16_BYTE( "891e09b", 0x60001, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
+ ROM_LOAD16_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
ROM_LOAD16_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
ROM_LOAD16_BYTE( "891e06f", 0x20000, 0x10000, CRC(f9ada524) SHA1(2df1fe91f43b95bb4e4a24a0931ab6f540496f65) )
ROM_LOAD16_BYTE( "891e06b", 0x20001, 0x10000, CRC(2295dfaa) SHA1(96070e1bd07b33b6701e45ee1e200f24532e8630) )
@@ -434,11 +434,11 @@ ROM_START( bottom9 )
ROM_LOAD16_BYTE( "891e05d", 0xe0001, 0x10000, CRC(f6d3f886) SHA1(b8bdcc9470aa93849b8c8a1f03971281cacc6d44) )
ROM_REGION( 0x020000, "gfx3", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD( "891e07a", 0x00000, 0x10000, CRC(b8d8b939) SHA1(ee91fb46d70db2d17f5909c4ea7ee1cf2d317d10) ) /* zoom/rotate */
+ ROM_LOAD( "891e07a", 0x00000, 0x10000, CRC(b8d8b939) SHA1(ee91fb46d70db2d17f5909c4ea7ee1cf2d317d10) ) /* zoom/rotate */
ROM_LOAD( "891e07b", 0x10000, 0x10000, CRC(83b2f92d) SHA1(c4972018e1f8109656784fae3e023a5522622c4b) )
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "891b11.f23", 0x0000, 0x0100, CRC(ecb854aa) SHA1(3bd321ca3076d4e0042e0af656d51909fa6a5b3b) ) /* priority encoder (not used) */
+ ROM_LOAD( "891b11.f23", 0x0000, 0x0100, CRC(ecb854aa) SHA1(3bd321ca3076d4e0042e0af656d51909fa6a5b3b) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232_1", 0 ) /* samples for 007232 #0 */
ROM_LOAD( "891e08a", 0x00000, 0x10000, CRC(cef667bf) SHA1(e773fc0ced45e01e13cdee18c404d609356d2d0e) )
@@ -463,7 +463,7 @@ ROM_START( bottom9n )
ROM_LOAD( "891j01.g8", 0x0000, 0x8000, CRC(31b0a0a8) SHA1(8e047f81c19f25de97fa22e70dcfe9e06bfae699) )
ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "891e10c", 0x00000, 0x10000, CRC(209b0431) SHA1(07f05f63267d5ed5c99b5f786bb66a87045db9e1) ) /* characters */
+ ROM_LOAD16_BYTE( "891e10c", 0x00000, 0x10000, CRC(209b0431) SHA1(07f05f63267d5ed5c99b5f786bb66a87045db9e1) ) /* characters */
ROM_LOAD16_BYTE( "891e10a", 0x00001, 0x10000, CRC(8020a9e8) SHA1(3792794a1b875506089da63cae955668cc61f54b) )
ROM_LOAD16_BYTE( "891e10d", 0x20000, 0x10000, CRC(16d5fd7a) SHA1(895a53e41173a70c48337d812466857676908a23) )
ROM_LOAD16_BYTE( "891e10b", 0x20001, 0x10000, CRC(30121cc0) SHA1(79174d00b79855c00c9c872b8f32946be1bf1d8a) )
@@ -473,7 +473,7 @@ ROM_START( bottom9n )
ROM_LOAD16_BYTE( "891e09b", 0x60001, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
+ ROM_LOAD16_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
ROM_LOAD16_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
ROM_LOAD16_BYTE( "891e06f", 0x20000, 0x10000, CRC(f9ada524) SHA1(2df1fe91f43b95bb4e4a24a0931ab6f540496f65) )
ROM_LOAD16_BYTE( "891e06b", 0x20001, 0x10000, CRC(2295dfaa) SHA1(96070e1bd07b33b6701e45ee1e200f24532e8630) )
@@ -491,11 +491,11 @@ ROM_START( bottom9n )
ROM_LOAD16_BYTE( "891e05d", 0xe0001, 0x10000, CRC(f6d3f886) SHA1(b8bdcc9470aa93849b8c8a1f03971281cacc6d44) )
ROM_REGION( 0x020000, "gfx3", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD( "891e07a", 0x00000, 0x10000, CRC(b8d8b939) SHA1(ee91fb46d70db2d17f5909c4ea7ee1cf2d317d10) ) /* zoom/rotate */
+ ROM_LOAD( "891e07a", 0x00000, 0x10000, CRC(b8d8b939) SHA1(ee91fb46d70db2d17f5909c4ea7ee1cf2d317d10) ) /* zoom/rotate */
ROM_LOAD( "891e07b", 0x10000, 0x10000, CRC(83b2f92d) SHA1(c4972018e1f8109656784fae3e023a5522622c4b) )
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "891b11.f23", 0x0000, 0x0100, CRC(ecb854aa) SHA1(3bd321ca3076d4e0042e0af656d51909fa6a5b3b) ) /* priority encoder (not used) */
+ ROM_LOAD( "891b11.f23", 0x0000, 0x0100, CRC(ecb854aa) SHA1(3bd321ca3076d4e0042e0af656d51909fa6a5b3b) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232_1", 0 ) /* samples for 007232 #0 */
ROM_LOAD( "891e08a", 0x00000, 0x10000, CRC(cef667bf) SHA1(e773fc0ced45e01e13cdee18c404d609356d2d0e) )
@@ -520,7 +520,7 @@ ROM_START( mstadium )
ROM_LOAD( "891w01.g8", 0x0000, 0x8000, CRC(edec565a) SHA1(69cba0d00c6ef76c4ce2b553e3fd15de8abbbf31) )
ROM_REGION( 0x080000, "gfx1", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "891e10c", 0x00000, 0x10000, CRC(209b0431) SHA1(07f05f63267d5ed5c99b5f786bb66a87045db9e1) ) /* characters */
+ ROM_LOAD16_BYTE( "891e10c", 0x00000, 0x10000, CRC(209b0431) SHA1(07f05f63267d5ed5c99b5f786bb66a87045db9e1) ) /* characters */
ROM_LOAD16_BYTE( "891e10a", 0x00001, 0x10000, CRC(8020a9e8) SHA1(3792794a1b875506089da63cae955668cc61f54b) )
ROM_LOAD16_BYTE( "891e10d", 0x20000, 0x10000, CRC(16d5fd7a) SHA1(895a53e41173a70c48337d812466857676908a23) )
ROM_LOAD16_BYTE( "891e10b", 0x20001, 0x10000, CRC(30121cc0) SHA1(79174d00b79855c00c9c872b8f32946be1bf1d8a) )
@@ -530,7 +530,7 @@ ROM_START( mstadium )
ROM_LOAD16_BYTE( "891e09b", 0x60001, 0x10000, CRC(b6f914fb) SHA1(e95f3e899c2ead15ef8a529dbc67e8f4a0f88bdd) )
ROM_REGION( 0x100000, "gfx2", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD16_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
+ ROM_LOAD16_BYTE( "891e06e", 0x00000, 0x10000, CRC(0b04db1c) SHA1(0beae7bb8da49379915c0253ce03091eb71a58b5) ) /* sprites */
ROM_LOAD16_BYTE( "891e06a", 0x00001, 0x10000, CRC(5ee37327) SHA1(f63ddaf63af06ea5421b0361315940582ef57922) )
ROM_LOAD16_BYTE( "891e06f", 0x20000, 0x10000, CRC(f9ada524) SHA1(2df1fe91f43b95bb4e4a24a0931ab6f540496f65) )
ROM_LOAD16_BYTE( "891e06b", 0x20001, 0x10000, CRC(2295dfaa) SHA1(96070e1bd07b33b6701e45ee1e200f24532e8630) )
@@ -548,11 +548,11 @@ ROM_START( mstadium )
ROM_LOAD16_BYTE( "891e05d", 0xe0001, 0x10000, CRC(f6d3f886) SHA1(b8bdcc9470aa93849b8c8a1f03971281cacc6d44) )
ROM_REGION( 0x020000, "gfx3", 0 ) /* graphics ( dont dispose as the program can read them, 0 ) */
- ROM_LOAD( "891e07a", 0x00000, 0x10000, CRC(b8d8b939) SHA1(ee91fb46d70db2d17f5909c4ea7ee1cf2d317d10) ) /* zoom/rotate */
+ ROM_LOAD( "891e07a", 0x00000, 0x10000, CRC(b8d8b939) SHA1(ee91fb46d70db2d17f5909c4ea7ee1cf2d317d10) ) /* zoom/rotate */
ROM_LOAD( "891e07b", 0x10000, 0x10000, CRC(83b2f92d) SHA1(c4972018e1f8109656784fae3e023a5522622c4b) )
ROM_REGION( 0x0200, "proms", 0 )
- ROM_LOAD( "891b11.f23", 0x0000, 0x0100, CRC(ecb854aa) SHA1(3bd321ca3076d4e0042e0af656d51909fa6a5b3b) ) /* priority encoder (not used) */
+ ROM_LOAD( "891b11.f23", 0x0000, 0x0100, CRC(ecb854aa) SHA1(3bd321ca3076d4e0042e0af656d51909fa6a5b3b) ) /* priority encoder (not used) */
ROM_REGION( 0x40000, "k007232_1", 0 ) /* samples for 007232 #0 */
ROM_LOAD( "891e08a", 0x00000, 0x10000, CRC(cef667bf) SHA1(e773fc0ced45e01e13cdee18c404d609356d2d0e) )
diff --git a/src/mame/drivers/bowltry.c b/src/mame/drivers/bowltry.c
index 80456a29215..af23b436a8e 100644
--- a/src/mame/drivers/bowltry.c
+++ b/src/mame/drivers/bowltry.c
@@ -9,11 +9,11 @@
------------------------
At U12 the chip is Toshiba TA8428FG
-
+
At U1 the chip is H8/3008
-
+
At X1 on the crystal it is printed S753
-
+
big gfx chip marked
YAMAHA JAPAN
@@ -32,7 +32,7 @@ class bowltry_state : public driver_device
public:
bowltry_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
UINT32 screen_update_bowltry(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@@ -75,15 +75,15 @@ MACHINE_CONFIG_END
ROM_START( bowltry )
ROM_REGION( 0x080000, "maincpu", 0 )
- ROM_LOAD16_WORD_SWAP( "u30_v1.00.u30", 0x000000, 0x080000, CRC(2bd47419) SHA1(8fc975340e47ddeedf96e454a6c5372328f28b72) )
-
+ ROM_LOAD16_WORD_SWAP( "u30_v1.00.u30", 0x000000, 0x080000, CRC(2bd47419) SHA1(8fc975340e47ddeedf96e454a6c5372328f28b72) )
+
ROM_REGION( 0x800000, "gfx", 0 )
ROM_LOAD16_BYTE( "u27_v1.00.u27", 0x000000, 0x400000, CRC(80f51c25) SHA1(53c21325e7796197c26ca0cf4f8e51bf1e0bdcd3) )
ROM_LOAD16_BYTE( "u28_v1.00.u28", 0x000001, 0x400000, CRC(9cc8b577) SHA1(6ef5cbb83860f88c9c83d4410034c5b528b2138b) )
-
+
ROM_REGION( 0x400000, "tt5665", 0 )
- ROM_LOAD( "u24_v1.00.u24", 0x000000, 0x400000, CRC(4e082d58) SHA1(d2eb58bc3d8ade2ea556960013d580f0fb952090) )
+ ROM_LOAD( "u24_v1.00.u24", 0x000000, 0x400000, CRC(4e082d58) SHA1(d2eb58bc3d8ade2ea556960013d580f0fb952090) )
ROM_END
-GAME( 200?, bowltry, 0, bowltry, bowltry, driver_device, 0, ROT0, "Atlus", "Bowling Try",GAME_IS_SKELETON )
+GAME( 200?, bowltry, 0, bowltry, bowltry, driver_device, 0, ROT0, "Atlus", "Bowling Try",GAME_IS_SKELETON )
diff --git a/src/mame/drivers/brkthru.c b/src/mame/drivers/brkthru.c
index 986d05e3f3b..903ab5fb9f5 100644
--- a/src/mame/drivers/brkthru.c
+++ b/src/mame/drivers/brkthru.c
@@ -56,7 +56,7 @@
#include "includes/brkthru.h"
-#define MASTER_CLOCK XTAL_12MHz
+#define MASTER_CLOCK XTAL_12MHz
/*************************************
@@ -120,9 +120,9 @@ static ADDRESS_MAP_START( brkthru_map, AS_PROGRAM, 8, brkthru_state )
AM_RANGE(0x1801, 0x1801) AM_READ_PORT("P2")
AM_RANGE(0x1802, 0x1802) AM_READ_PORT("DSW1")
AM_RANGE(0x1803, 0x1803) AM_READ_PORT("DSW2/COIN")
- AM_RANGE(0x1800, 0x1801) AM_WRITE(brkthru_1800_w) /* bg scroll and color, ROM bank selection, flip screen */
+ AM_RANGE(0x1800, 0x1801) AM_WRITE(brkthru_1800_w) /* bg scroll and color, ROM bank selection, flip screen */
AM_RANGE(0x1802, 0x1802) AM_WRITE(brkthru_soundlatch_w)
- AM_RANGE(0x1803, 0x1803) AM_WRITE(brkthru_1803_w) /* NMI enable, + ? */
+ AM_RANGE(0x1803, 0x1803) AM_WRITE(brkthru_1803_w) /* NMI enable, + ? */
AM_RANGE(0x2000, 0x3fff) AM_ROMBANK("bank1")
AM_RANGE(0x4000, 0xffff) AM_ROM
ADDRESS_MAP_END
@@ -180,7 +180,7 @@ static INPUT_PORTS_START( brkthru )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") /* used only by the self test */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") /* used only by the self test */
PORT_START("DSW1")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
@@ -200,11 +200,11 @@ static INPUT_PORTS_START( brkthru )
PORT_DIPSETTING( 0x20, "Slow" )
PORT_DIPSETTING( 0x00, "Fast" )
PORT_DIPNAME( 0x40, 0x00, "Control Panel" ) PORT_DIPLOCATION("SW1:7")
- PORT_DIPSETTING( 0x40, "1 Player" )
- PORT_DIPSETTING( 0x00, "2 Players" )
+ PORT_DIPSETTING( 0x40, "1 Player" )
+ PORT_DIPSETTING( 0x00, "2 Players" )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
PORT_START("DSW2/COIN")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
@@ -217,7 +217,7 @@ static INPUT_PORTS_START( brkthru )
PORT_DIPSETTING( 0x04, "10000/20000 Points" )
PORT_DIPSETTING( 0x0c, "20000/30000 Points" )
PORT_DIPSETTING( 0x08, "20000/40000 Points" )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5") /* Manual says ALWAYS OFF */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5") /* Manual says ALWAYS OFF */
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
/* According to the manual, bit 5 should control Flip Screen */
@@ -241,16 +241,16 @@ static INPUT_PORTS_START( darwin )
PORT_INCLUDE( brkthru )
PORT_MODIFY("DSW1")
- PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW1:5" ) /* Manual says must be OFF */
+ PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW1:5" ) /* Manual says must be OFF */
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Manual says must be OFF */
+ PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Manual says must be OFF */
- PORT_MODIFY("DSW2/COIN") /* modified by Shingo Suzuki 1999/11/02 */
+ PORT_MODIFY("DSW2/COIN") /* modified by Shingo Suzuki 1999/11/02 */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x01, "3" )
PORT_DIPSETTING( 0x00, "5" )
@@ -281,57 +281,57 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 chars */
- 256, /* 256 characters */
- 3, /* 3 bits per pixel */
- { 512*8*8+4, 0, 4 }, /* plane offset */
+ 8,8, /* 8*8 chars */
+ 256, /* 256 characters */
+ 3, /* 3 bits per pixel */
+ { 512*8*8+4, 0, 4 }, /* plane offset */
{ 256*8*8+0, 256*8*8+1, 256*8*8+2, 256*8*8+3, 0, 1, 2, 3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout tilelayout1 =
{
- 16,16, /* 16*16 tiles */
- 128, /* 128 tiles */
- 3, /* 3 bits per pixel */
- { 0x4000*8+4, 0, 4 }, /* plane offset */
+ 16,16, /* 16*16 tiles */
+ 128, /* 128 tiles */
+ 3, /* 3 bits per pixel */
+ { 0x4000*8+4, 0, 4 }, /* plane offset */
{ 0, 1, 2, 3, 1024*8*8+0, 1024*8*8+1, 1024*8*8+2, 1024*8*8+3,
16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+1024*8*8+0, 16*8+1024*8*8+1, 16*8+1024*8*8+2, 16*8+1024*8*8+3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 32*8 /* every tile takes 32 consecutive bytes */
+ 32*8 /* every tile takes 32 consecutive bytes */
};
static const gfx_layout tilelayout2 =
{
- 16,16, /* 16*16 tiles */
- 128, /* 128 tiles */
- 3, /* 3 bits per pixel */
- { 0x3000*8+0, 0, 4 }, /* plane offset */
+ 16,16, /* 16*16 tiles */
+ 128, /* 128 tiles */
+ 3, /* 3 bits per pixel */
+ { 0x3000*8+0, 0, 4 }, /* plane offset */
{ 0, 1, 2, 3, 1024*8*8+0, 1024*8*8+1, 1024*8*8+2, 1024*8*8+3,
16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+1024*8*8+0, 16*8+1024*8*8+1, 16*8+1024*8*8+2, 16*8+1024*8*8+3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 32*8 /* every tile takes 32 consecutive bytes */
+ 32*8 /* every tile takes 32 consecutive bytes */
};
static const gfx_layout spritelayout =
{
- 16,16, /* 16*16 sprites */
- 1024, /* 1024 sprites */
- 3, /* 3 bits per pixel */
- { 2*1024*32*8, 1024*32*8, 0 }, /* plane offset */
+ 16,16, /* 16*16 sprites */
+ 1024, /* 1024 sprites */
+ 3, /* 3 bits per pixel */
+ { 2*1024*32*8, 1024*32*8, 0 }, /* plane offset */
{ 16*8+0, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7,
0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static GFXDECODE_START( brkthru )
- GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 0x00, 1 ) /* use colors 0x00-0x07 */
- GFXDECODE_ENTRY( "gfx2", 0x00000, tilelayout1, 0x80, 16 ) /* use colors 0x80-0xff */
+ GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 0x00, 1 ) /* use colors 0x00-0x07 */
+ GFXDECODE_ENTRY( "gfx2", 0x00000, tilelayout1, 0x80, 16 ) /* use colors 0x80-0xff */
GFXDECODE_ENTRY( "gfx2", 0x01000, tilelayout2, 0x80, 16 )
GFXDECODE_ENTRY( "gfx2", 0x08000, tilelayout1, 0x80, 16 )
GFXDECODE_ENTRY( "gfx2", 0x09000, tilelayout2, 0x80, 16 )
@@ -339,7 +339,7 @@ static GFXDECODE_START( brkthru )
GFXDECODE_ENTRY( "gfx2", 0x11000, tilelayout2, 0x80, 16 )
GFXDECODE_ENTRY( "gfx2", 0x18000, tilelayout1, 0x80, 16 )
GFXDECODE_ENTRY( "gfx2", 0x19000, tilelayout2, 0x80, 16 )
- GFXDECODE_ENTRY( "gfx3", 0x00000, spritelayout, 0x40, 8 ) /* use colors 0x40-0x7f */
+ GFXDECODE_ENTRY( "gfx3", 0x00000, spritelayout, 0x40, 8 ) /* use colors 0x40-0x7f */
GFXDECODE_END
@@ -395,7 +395,7 @@ static MACHINE_CONFIG_START( brkthru, brkthru_state )
MCFG_CPU_PROGRAM_MAP(brkthru_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", brkthru_state, vblank_irq)
- MCFG_CPU_ADD("audiocpu", M6809, MASTER_CLOCK/8) /* 1.5 MHz ? */
+ MCFG_CPU_ADD("audiocpu", M6809, MASTER_CLOCK/8) /* 1.5 MHz ? */
MCFG_CPU_PROGRAM_MAP(sound_map)
@@ -431,7 +431,7 @@ static MACHINE_CONFIG_START( darwin, brkthru_state )
MCFG_CPU_PROGRAM_MAP(darwin_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", brkthru_state, vblank_irq)
- MCFG_CPU_ADD("audiocpu", M6809, MASTER_CLOCK/8) /* 1.5 MHz ? */
+ MCFG_CPU_ADD("audiocpu", M6809, MASTER_CLOCK/8) /* 1.5 MHz ? */
MCFG_CPU_PROGRAM_MAP(sound_map)
@@ -442,17 +442,17 @@ static MACHINE_CONFIG_START( darwin, brkthru_state )
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_RAW_PARAMS(MASTER_CLOCK/2, 384, 8, 248, 272, 8, 248)
/* frames per second, vblank duration
- Horizontal video frequency:
- HSync = Dot Clock / Horizontal Frame Length
- = Xtal /2 / (HDisplay + HBlank)
- = 12MHz/2 / (240 + 144)
- = 15.625kHz
- Vertical Video frequency:
- VSync = HSync / Vertical Frame Length
- = HSync / (VDisplay + VBlank)
- = 15.625kHz / (240 + 32)
- = 57.444855Hz
- tuned by Shingo SUZUKI(VSyncMAME Project) 2000/10/19 */
+ Horizontal video frequency:
+ HSync = Dot Clock / Horizontal Frame Length
+ = Xtal /2 / (HDisplay + HBlank)
+ = 12MHz/2 / (240 + 144)
+ = 15.625kHz
+ Vertical Video frequency:
+ VSync = HSync / Vertical Frame Length
+ = HSync / (VDisplay + VBlank)
+ = 15.625kHz / (240 + 32)
+ = 57.444855Hz
+ tuned by Shingo SUZUKI(VSyncMAME Project) 2000/10/19 */
MCFG_SCREEN_UPDATE_DRIVER(brkthru_state, screen_update_brkthru)
@@ -486,27 +486,27 @@ ROM_START( brkthru )
ROM_LOAD( "brkthru.3", 0x18000, 0x8000, CRC(2f2c40c2) SHA1(fcb78941453520a3a07f272127dae7c2cc1999ea) )
ROM_REGION( 0x02000, "gfx1", 0 )
- ROM_LOAD( "brkthru.12", 0x00000, 0x2000, CRC(58c0b29b) SHA1(9dc075f8afae7e8fe164a9fe325e9948cdc7e4bb) ) /* characters */
+ ROM_LOAD( "brkthru.12", 0x00000, 0x2000, CRC(58c0b29b) SHA1(9dc075f8afae7e8fe164a9fe325e9948cdc7e4bb) ) /* characters */
ROM_REGION( 0x20000, "gfx2", 0 )
/* background */
/* we do a lot of scatter loading here, to place the data in a format */
/* which can be decoded by MAME's standard functions */
- ROM_LOAD( "brkthru.7", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */
- ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
- ROM_LOAD( "brkthru.6", 0x10000, 0x4000, CRC(fd3cee40) SHA1(3308b96bb69e0fa6dffbdff296273fafa16d5e70) ) /* bitplanes 1,2 for bank 5,6 */
- ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
- ROM_LOAD( "brkthru.8", 0x04000, 0x1000, CRC(f67ee64e) SHA1(75634bd481ae44b8aa02acb4f9b4d7ff973a4c71) ) /* bitplane 3 for bank 1,2 */
+ ROM_LOAD( "brkthru.7", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */
+ ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
+ ROM_LOAD( "brkthru.6", 0x10000, 0x4000, CRC(fd3cee40) SHA1(3308b96bb69e0fa6dffbdff296273fafa16d5e70) ) /* bitplanes 1,2 for bank 5,6 */
+ ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
+ ROM_LOAD( "brkthru.8", 0x04000, 0x1000, CRC(f67ee64e) SHA1(75634bd481ae44b8aa02acb4f9b4d7ff973a4c71) ) /* bitplane 3 for bank 1,2 */
ROM_CONTINUE( 0x06000, 0x1000 )
- ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
+ ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
ROM_CONTINUE( 0x0e000, 0x1000 )
- ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
+ ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
ROM_CONTINUE( 0x16000, 0x1000 )
- ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
+ ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
ROM_CONTINUE( 0x1e000, 0x1000 )
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "brkthru.9", 0x00000, 0x8000, CRC(f54e50a7) SHA1(eccf4d859c26944271ec6586644b4730a72851fd) ) /* sprites */
+ ROM_LOAD( "brkthru.9", 0x00000, 0x8000, CRC(f54e50a7) SHA1(eccf4d859c26944271ec6586644b4730a72851fd) ) /* sprites */
ROM_LOAD( "brkthru.10", 0x08000, 0x8000, CRC(fd156945) SHA1(a0575a4164217e63317886176ab7e59d255fc771) )
ROM_LOAD( "brkthru.11", 0x10000, 0x8000, CRC(c152a99b) SHA1(f96133aa01219eda357b9e906bd9577dbfe359c0) )
@@ -526,27 +526,27 @@ ROM_START( brkthruj )
ROM_LOAD( "brkthru.3", 0x18000, 0x8000, CRC(2f2c40c2) SHA1(fcb78941453520a3a07f272127dae7c2cc1999ea) )
ROM_REGION( 0x02000, "gfx1", 0 )
- ROM_LOAD( "12", 0x00000, 0x2000, CRC(3d9a7003) SHA1(2e5de982eb75ac75312fb29bb4cb2ed12ec0fd56) ) /* characters */
+ ROM_LOAD( "12", 0x00000, 0x2000, CRC(3d9a7003) SHA1(2e5de982eb75ac75312fb29bb4cb2ed12ec0fd56) ) /* characters */
ROM_REGION( 0x20000, "gfx2", 0 )
/* background */
/* we do a lot of scatter loading here, to place the data in a format */
/* which can be decoded by MAME's standard functions */
- ROM_LOAD( "brkthru.7", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */
- ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
- ROM_LOAD( "6", 0x10000, 0x4000, CRC(cb47b395) SHA1(bf5459d696e863644f13c8b0786b8f45caf6ceb6) ) /* bitplanes 1,2 for bank 5,6 */
- ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
- ROM_LOAD( "8", 0x04000, 0x1000, CRC(5e5a2cd7) SHA1(f1782d67b924b4b89bcb6602e970c28fbeaab522) ) /* bitplane 3 for bank 1,2 */
+ ROM_LOAD( "brkthru.7", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */
+ ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
+ ROM_LOAD( "6", 0x10000, 0x4000, CRC(cb47b395) SHA1(bf5459d696e863644f13c8b0786b8f45caf6ceb6) ) /* bitplanes 1,2 for bank 5,6 */
+ ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
+ ROM_LOAD( "8", 0x04000, 0x1000, CRC(5e5a2cd7) SHA1(f1782d67b924b4b89bcb6602e970c28fbeaab522) ) /* bitplane 3 for bank 1,2 */
ROM_CONTINUE( 0x06000, 0x1000 )
- ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
+ ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
ROM_CONTINUE( 0x0e000, 0x1000 )
- ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
+ ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
ROM_CONTINUE( 0x16000, 0x1000 )
- ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
+ ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
ROM_CONTINUE( 0x1e000, 0x1000 )
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "brkthru.9", 0x00000, 0x8000, CRC(f54e50a7) SHA1(eccf4d859c26944271ec6586644b4730a72851fd) ) /* sprites */
+ ROM_LOAD( "brkthru.9", 0x00000, 0x8000, CRC(f54e50a7) SHA1(eccf4d859c26944271ec6586644b4730a72851fd) ) /* sprites */
ROM_LOAD( "brkthru.10", 0x08000, 0x8000, CRC(fd156945) SHA1(a0575a4164217e63317886176ab7e59d255fc771) )
ROM_LOAD( "brkthru.11", 0x10000, 0x8000, CRC(c152a99b) SHA1(f96133aa01219eda357b9e906bd9577dbfe359c0) )
@@ -567,27 +567,27 @@ ROM_START( forcebrk )
ROM_LOAD( "brkthru.3", 0x18000, 0x8000, CRC(2f2c40c2) SHA1(fcb78941453520a3a07f272127dae7c2cc1999ea) )
ROM_REGION( 0x02000, "gfx1", 0 )
- ROM_LOAD( "12", 0x00000, 0x2000, CRC(3d9a7003) SHA1(2e5de982eb75ac75312fb29bb4cb2ed12ec0fd56) ) /* characters */
+ ROM_LOAD( "12", 0x00000, 0x2000, CRC(3d9a7003) SHA1(2e5de982eb75ac75312fb29bb4cb2ed12ec0fd56) ) /* characters */
ROM_REGION( 0x20000, "gfx2", 0 )
/* background */
/* we do a lot of scatter loading here, to place the data in a format */
/* which can be decoded by MAME's standard functions */
- ROM_LOAD( "brkthru.7", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */
- ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
- ROM_LOAD( "forcebrk6", 0x10000, 0x4000, CRC(08bca16a) SHA1(d5dcf5cf68a5090f467c076abb1b9cf0baffe272) ) /* bitplanes 1,2 for bank 5,6 */
- ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
- ROM_LOAD( "forcebrk8", 0x04000, 0x1000, CRC(a3a1131e) SHA1(e0b73c8b2c8ea6b31418bc642830875c5985f800) ) /* bitplane 3 for bank 1,2 */
+ ROM_LOAD( "brkthru.7", 0x00000, 0x4000, CRC(920cc56a) SHA1(c75806691073f1f3bd54dcaca4c14155ecf4471d) ) /* bitplanes 1,2 for bank 1,2 */
+ ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
+ ROM_LOAD( "forcebrk6", 0x10000, 0x4000, CRC(08bca16a) SHA1(d5dcf5cf68a5090f467c076abb1b9cf0baffe272) ) /* bitplanes 1,2 for bank 5,6 */
+ ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
+ ROM_LOAD( "forcebrk8", 0x04000, 0x1000, CRC(a3a1131e) SHA1(e0b73c8b2c8ea6b31418bc642830875c5985f800) ) /* bitplane 3 for bank 1,2 */
ROM_CONTINUE( 0x06000, 0x1000 )
- ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
+ ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
ROM_CONTINUE( 0x0e000, 0x1000 )
- ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
+ ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
ROM_CONTINUE( 0x16000, 0x1000 )
- ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
+ ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
ROM_CONTINUE( 0x1e000, 0x1000 )
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "brkthru.9", 0x00000, 0x8000, CRC(f54e50a7) SHA1(eccf4d859c26944271ec6586644b4730a72851fd) ) /* sprites */
+ ROM_LOAD( "brkthru.9", 0x00000, 0x8000, CRC(f54e50a7) SHA1(eccf4d859c26944271ec6586644b4730a72851fd) ) /* sprites */
ROM_LOAD( "brkthru.10", 0x08000, 0x8000, CRC(fd156945) SHA1(a0575a4164217e63317886176ab7e59d255fc771) )
ROM_LOAD( "brkthru.11", 0x10000, 0x8000, CRC(c152a99b) SHA1(f96133aa01219eda357b9e906bd9577dbfe359c0) )
@@ -613,21 +613,21 @@ ROM_START( darwin )
/* background */
/* we do a lot of scatter loading here, to place the data in a format */
/* which can be decoded by MAME's standard functions */
- ROM_LOAD( "darw_03.rom", 0x00000, 0x4000, CRC(57d0350d) SHA1(6f904047485e669afb5f4b590818743111f010c6) ) /* bitplanes 1,2 for bank 1,2 */
- ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
- ROM_LOAD( "darw_02.rom", 0x10000, 0x4000, CRC(559a71ab) SHA1(a28de25e89e0d68332f4095b988827a9cb72c675) ) /* bitplanes 1,2 for bank 5,6 */
- ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
- ROM_LOAD( "darw_01.rom", 0x04000, 0x1000, CRC(15a16973) SHA1(5eb978a32be88176936e5d37b6ec18820d9720d8) ) /* bitplane 3 for bank 1,2 */
+ ROM_LOAD( "darw_03.rom", 0x00000, 0x4000, CRC(57d0350d) SHA1(6f904047485e669afb5f4b590818743111f010c6) ) /* bitplanes 1,2 for bank 1,2 */
+ ROM_CONTINUE( 0x08000, 0x4000 ) /* bitplanes 1,2 for bank 3,4 */
+ ROM_LOAD( "darw_02.rom", 0x10000, 0x4000, CRC(559a71ab) SHA1(a28de25e89e0d68332f4095b988827a9cb72c675) ) /* bitplanes 1,2 for bank 5,6 */
+ ROM_CONTINUE( 0x18000, 0x4000 ) /* bitplanes 1,2 for bank 7,8 */
+ ROM_LOAD( "darw_01.rom", 0x04000, 0x1000, CRC(15a16973) SHA1(5eb978a32be88176936e5d37b6ec18820d9720d8) ) /* bitplane 3 for bank 1,2 */
ROM_CONTINUE( 0x06000, 0x1000 )
- ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
+ ROM_CONTINUE( 0x0c000, 0x1000 ) /* bitplane 3 for bank 3,4 */
ROM_CONTINUE( 0x0e000, 0x1000 )
- ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
+ ROM_CONTINUE( 0x14000, 0x1000 ) /* bitplane 3 for bank 5,6 */
ROM_CONTINUE( 0x16000, 0x1000 )
- ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
+ ROM_CONTINUE( 0x1c000, 0x1000 ) /* bitplane 3 for bank 7,8 */
ROM_CONTINUE( 0x1e000, 0x1000 )
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "darw_10.rom", 0x00000, 0x8000, CRC(487a014c) SHA1(c9543df8115088b02019e76a6473ecc5f645a836) ) /* sprites */
+ ROM_LOAD( "darw_10.rom", 0x00000, 0x8000, CRC(487a014c) SHA1(c9543df8115088b02019e76a6473ecc5f645a836) ) /* sprites */
ROM_LOAD( "darw_11.rom", 0x08000, 0x8000, CRC(548ce2d1) SHA1(3b1757c70346ab4ee19ec85e7ae5137f8ccf446f) )
ROM_LOAD( "darw_12.rom", 0x10000, 0x8000, CRC(faba5fef) SHA1(848da4d4888f0218b737f1dc9b62944f68349a43) )
diff --git a/src/mame/drivers/bsktball.c b/src/mame/drivers/bsktball.c
index 5da7b71a682..01cd69ec9fa 100644
--- a/src/mame/drivers/bsktball.c
+++ b/src/mame/drivers/bsktball.c
@@ -139,27 +139,27 @@ static INPUT_PORTS_START( bsktball )
PORT_START("DSW")
PORT_DIPNAME( 0x07, 0x00, "Play Time per Credit" ) PORT_DIPLOCATION("SW:1,2,3")
- PORT_DIPSETTING( 0x07, DEF_STR( Free_Play ) )
- PORT_DIPSETTING( 0x06, "2:30" )
- PORT_DIPSETTING( 0x05, "2:00" )
- PORT_DIPSETTING( 0x04, "1:30" )
- PORT_DIPSETTING( 0x03, "1:15" )
- PORT_DIPSETTING( 0x02, "0:45" )
- PORT_DIPSETTING( 0x01, "0:30" )
- PORT_DIPSETTING( 0x00, "1:00" )
+ PORT_DIPSETTING( 0x07, DEF_STR( Free_Play ) )
+ PORT_DIPSETTING( 0x06, "2:30" )
+ PORT_DIPSETTING( 0x05, "2:00" )
+ PORT_DIPSETTING( 0x04, "1:30" )
+ PORT_DIPSETTING( 0x03, "1:15" )
+ PORT_DIPSETTING( 0x02, "0:45" )
+ PORT_DIPSETTING( 0x01, "0:30" )
+ PORT_DIPSETTING( 0x00, "1:00" )
PORT_DIPNAME( 0x18, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW:4,5")
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x10, DEF_STR( 1C_4C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 1C_5C ) )
- PORT_DIPSETTING( 0x18, DEF_STR( 1C_6C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( 1C_4C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 1C_5C ) )
+ PORT_DIPSETTING( 0x18, DEF_STR( 1C_6C ) )
PORT_DIPNAME( 0x20, 0x00, "Cost" ) PORT_DIPLOCATION("SW:6")
- PORT_DIPSETTING( 0x20, "Two Coin Minimum" )
- PORT_DIPSETTING( 0x00, "One Coin Minimum" )
+ PORT_DIPSETTING( 0x20, "Two Coin Minimum" )
+ PORT_DIPSETTING( 0x00, "One Coin Minimum" )
PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW:7,8")
- PORT_DIPSETTING( 0xc0, DEF_STR( German ) )
- PORT_DIPSETTING( 0x80, DEF_STR( French ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Spanish ) )
- PORT_DIPSETTING( 0x00, DEF_STR( English ) )
+ PORT_DIPSETTING( 0xc0, DEF_STR( German ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( French ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Spanish ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( English ) )
INPUT_PORTS_END
@@ -189,7 +189,7 @@ static const gfx_layout motionlayout =
2,
{ 0, 8*0x800 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
- { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
+ { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8,
16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8,
24*8, 25*8, 26*8, 27*8, 28*8, 29*8, 30*8, 31*8 },
diff --git a/src/mame/drivers/btime.c b/src/mame/drivers/btime.c
index c688b05adf9..c76dbb220f8 100644
--- a/src/mame/drivers/btime.c
+++ b/src/mame/drivers/btime.c
@@ -154,16 +154,16 @@ A few notes:
enum
{
AUDIO_ENABLE_NONE,
- AUDIO_ENABLE_DIRECT, /* via direct address in memory map */
- AUDIO_ENABLE_AY8910 /* via ay-8910 port A */
+ AUDIO_ENABLE_DIRECT, /* via direct address in memory map */
+ AUDIO_ENABLE_AY8910 /* via ay-8910 port A */
};
WRITE8_MEMBER(btime_state::audio_nmi_enable_w)
{
/* for most games, this serves as the NMI enable for the audio CPU; however,
- lnc and disco use bit 0 of the first AY-8910's port A instead; many other
- games also write there in addition to this address */
+ lnc and disco use bit 0 of the first AY-8910's port A instead; many other
+ games also write there in addition to this address */
if (m_audio_nmi_enable_type == AUDIO_ENABLE_DIRECT)
{
m_audio_nmi_enabled = data & 1;
@@ -210,11 +210,11 @@ static ADDRESS_MAP_START( cookrace_map, AS_PROGRAM, 8, btime_state )
AM_RANGE(0xc400, 0xc7ff) AM_RAM AM_SHARE("colorram")
AM_RANGE(0xc800, 0xcbff) AM_READWRITE(btime_mirrorvideoram_r, btime_mirrorvideoram_w)
AM_RANGE(0xcc00, 0xcfff) AM_READWRITE(btime_mirrorcolorram_r, btime_mirrorcolorram_w)
- AM_RANGE(0xd000, 0xd0ff) AM_RAM /* background? */
- AM_RANGE(0xd100, 0xd3ff) AM_RAM /* ? */
+ AM_RANGE(0xd000, 0xd0ff) AM_RAM /* background? */
+ AM_RANGE(0xd100, 0xd3ff) AM_RAM /* ? */
AM_RANGE(0xd400, 0xd7ff) AM_RAM AM_SHARE("bnj_bgram")
AM_RANGE(0xe000, 0xe000) AM_READ_PORT("DSW1") AM_WRITE(bnj_video_control_w)
- AM_RANGE(0xe300, 0xe300) AM_READ_PORT("DSW1") /* mirror address used on high score name entry */
+ AM_RANGE(0xe300, 0xe300) AM_READ_PORT("DSW1") /* mirror address used on high score name entry */
/* screen */
AM_RANGE(0xe001, 0xe001) AM_READ_PORT("DSW2") AM_WRITE(audio_command_w)
AM_RANGE(0xe002, 0xe002) AM_READ_PORT("P1")
@@ -275,12 +275,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( mmonkey_map, AS_PROGRAM, 8, btime_state )
AM_RANGE(0x0000, 0x3bff) AM_RAM AM_SHARE("rambase")
AM_RANGE(0x3c00, 0x3fff) AM_RAM_WRITE(lnc_videoram_w) AM_SHARE("videoram")
- AM_RANGE(0x7800, 0x7bff) AM_WRITEONLY AM_SHARE("colorram") /* this is just here to initialize the pointer */
+ AM_RANGE(0x7800, 0x7bff) AM_WRITEONLY AM_SHARE("colorram") /* this is just here to initialize the pointer */
AM_RANGE(0x7c00, 0x7fff) AM_READWRITE(btime_mirrorvideoram_r, lnc_mirrorvideoram_w)
AM_RANGE(0x8000, 0x8000) AM_READ_PORT("DSW1")
AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2") AM_WRITE(bnj_video_control_w)
AM_RANGE(0x8003, 0x8003) AM_WRITEONLY AM_SHARE("lnc_charbank")
- AM_RANGE(0x9000, 0x9000) AM_READ_PORT("P1") AM_WRITENOP /* IRQ ack??? */
+ AM_RANGE(0x9000, 0x9000) AM_READ_PORT("P1") AM_WRITENOP /* IRQ ack??? */
AM_RANGE(0x9001, 0x9001) AM_READ_PORT("P2")
AM_RANGE(0x9002, 0x9002) AM_READ_PORT("SYSTEM") AM_WRITE(audio_command_w)
AM_RANGE(0xb000, 0xbfff) AM_READWRITE(mmonkey_protection_r, mmonkey_protection_w)
@@ -455,9 +455,9 @@ static INPUT_PORTS_START( btime )
PORT_DIPNAME( 0x10, 0x00, "End of Level Pepper" ) PORT_DIPLOCATION("14D:5")
PORT_DIPSETTING( 0x10, DEF_STR( No ) )
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "14D:6" ) /* it should be OFF according to the manual */
- PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "14D:7" ) /* it should be OFF according to the manual */
- PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "14D:8" ) /* it should be OFF according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "14D:6" ) /* it should be OFF according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "14D:7" ) /* it should be OFF according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "14D:8" ) /* it should be OFF according to the manual */
INPUT_PORTS_END
static INPUT_PORTS_START( cookrace )
@@ -606,9 +606,9 @@ static INPUT_PORTS_START( zoar )
PORT_DIPNAME( 0x10, 0x00, "Weapon Select" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00, "Manual" )
PORT_DIPSETTING( 0x10, "Auto" )
- PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW2:6" ) /* These 3 switches have something to do with coinage */
- PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW2:7" ) /* See code at $d234. Feel free to figure them out */
- PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Manual says to leave them OFF */
+ PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW2:6" ) /* These 3 switches have something to do with coinage */
+ PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW2:7" ) /* See code at $d234. Feel free to figure them out */
+ PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Manual says to leave them OFF */
INPUT_PORTS_END
static INPUT_PORTS_START( lnc )
@@ -649,7 +649,7 @@ static INPUT_PORTS_START( lnc )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) )
- PORT_DIPNAME( 0x30, 0x30, "Test Mode" ) PORT_DIPLOCATION("SW1:5,6") /* Manual says these bits are unused */
+ PORT_DIPNAME( 0x30, 0x30, "Test Mode" ) PORT_DIPLOCATION("SW1:5,6") /* Manual says these bits are unused */
PORT_DIPSETTING( 0x30, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, "RAM Test Only" )
PORT_DIPSETTING( 0x20, "Watchdog Test Only" )
@@ -674,10 +674,10 @@ static INPUT_PORTS_START( lnc )
PORT_DIPNAME( 0x08, 0x08, "Game Speed" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, "Slow" )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW2:5" ) /* it should be OFF according to the manual */
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW2:6" ) /* it should be OFF according to the manual */
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:7" ) /* it should be OFF according to the manual */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:8" ) /* it should be OFF according to the manual */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW2:5" ) /* it should be OFF according to the manual */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x00, "SW2:6" ) /* it should be OFF according to the manual */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:7" ) /* it should be OFF according to the manual */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:8" ) /* it should be OFF according to the manual */
INPUT_PORTS_END
static INPUT_PORTS_START( wtennis )
@@ -792,7 +792,7 @@ static INPUT_PORTS_START( mmonkey )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Free_Play ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED( 0x20, 0x00 ) /* almost certainly unused */
+ PORT_DIPUNUSED( 0x20, 0x00 ) /* almost certainly unused */
PORT_DIPNAME( 0x40, 0x00, "Control Panel" )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )
@@ -815,8 +815,8 @@ static INPUT_PORTS_START( mmonkey )
PORT_DIPSETTING( 0x08, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x10, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, "Level Skip Mode (Cheat)")
- PORT_DIPUNUSED( 0x20, 0x00 ) /* almost certainly unused */
- PORT_DIPUNUSED( 0x40, 0x00 ) /* almost certainly unused */
+ PORT_DIPUNUSED( 0x20, 0x00 ) /* almost certainly unused */
+ PORT_DIPUNUSED( 0x40, 0x00 ) /* almost certainly unused */
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
INPUT_PORTS_END
@@ -894,9 +894,9 @@ static INPUT_PORTS_START( bnj )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("7D:5")
PORT_DIPSETTING( 0x10, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "7D:6" ) /* it should be OFF according to the manual */
- PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "7D:7" ) /* it should be OFF according to the manual */
- PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "7D:8" ) /* it should be OFF according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "7D:6" ) /* it should be OFF according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "7D:7" ) /* it should be OFF according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "7D:8" ) /* it should be OFF according to the manual */
INPUT_PORTS_END
static INPUT_PORTS_START( disco )
@@ -1031,10 +1031,10 @@ static INPUT_PORTS_START( sdtennis )
PORT_DIPSETTING( 0x04, "2 Sets won" )
PORT_DIPSETTING( 0x02, "3 Sets won" )
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) // Check code at 0xc55b
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) // Check code at 0xc55b
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) // Check code at 0xc5af
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) // Check code at 0xc5af
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0xe0, 0xe0, "Copyright" )
@@ -1042,7 +1042,7 @@ static INPUT_PORTS_START( sdtennis )
PORT_DIPSETTING( 0xc0, "Data East USA" )
/* Other values are the same as 0xe0 */
/* 0x60 also gives a special coinage : COIN1 gives 3 credits and COIN2 gives 8 credits
- whatever the coinage Dip Switch are (they are not read in this case) */
+ whatever the coinage Dip Switch are (they are not read in this case) */
INPUT_PORTS_END
static const gfx_layout tile8layout =
@@ -1159,12 +1159,12 @@ static const ay8910_interface ay2_intf =
static const discrete_mixer_desc btime_sound_mixer_desc =
{DISC_MIXER_IS_OP_AMP,
{RES_K(100), RES_K(100)},
- {0,0}, /* no variable resistors */
+ {0,0}, /* no variable resistors */
{0,0}, /* no node capacitors */
- 0, /* no RI */
+ 0, /* no RI */
RES_K(10),
CAP_P(150),
- 0, /* Modelled separately */
+ 0, /* Modelled separately */
0, 1};
/* R49 has 4.7k in schematics, but listed as 47k in bill of material
@@ -1173,7 +1173,7 @@ static const discrete_mixer_desc btime_sound_mixer_desc =
* Anoid measured R49 to R52 on a Burger Time pcb. These are
* listed below
*/
-#define BTIME_R49 RES_K(47) /* pcb: 47.4k */
+#define BTIME_R49 RES_K(47) /* pcb: 47.4k */
/* The input divider R51 R50 is not independent of R52, which
* also depends on ay internal resistance.
@@ -1192,9 +1192,9 @@ static const discrete_mixer_desc btime_sound_mixer_desc =
*
*/
-#define BTIME_R52 RES_K(1) /* pcb: .912k = 1K || 11k */
-#define BTIME_R51 RES_K(5) /* pcb: .923k = 1k || 11k schematics 1k */
-#define BTIME_R50 RES_K(10) /* pcb: 1.667k = 10k || 2k */
+#define BTIME_R52 RES_K(1) /* pcb: .912k = 1K || 11k */
+#define BTIME_R51 RES_K(5) /* pcb: .923k = 1k || 11k schematics 1k */
+#define BTIME_R50 RES_K(10) /* pcb: 1.667k = 10k || 2k */
static const discrete_op_amp_filt_info btime_opamp_desc =
{BTIME_R51, 0, BTIME_R50, 0, BTIME_R49, CAP_U(0.068), CAP_U(0.068), 0, 0, 5.0, -5.0};
@@ -1221,14 +1221,14 @@ static DISCRETE_SOUND_START( btime_sound )
DISCRETE_CRFILTER(NODE_41, NODE_40, RES_K(10), CAP_U(10))
/* Amplifier is upc1181H3
- *
- * http://www.ic-ts-histo.de/fad/ics/upc1181/upc1181.htm
- *
- * A linear frequency response is mentioned as well as a lower
- * edge frequency determined by cap on pin3, however no formula given.
- *
- * not modelled here
- */
+ *
+ * http://www.ic-ts-histo.de/fad/ics/upc1181/upc1181.htm
+ *
+ * A linear frequency response is mentioned as well as a lower
+ * edge frequency determined by cap on pin3, however no formula given.
+ *
+ * not modelled here
+ */
/* Assuming a 4 Ohm impedance speaker */
DISCRETE_CRFILTER(NODE_43, NODE_41, 3.0, CAP_U(100))
@@ -1296,7 +1296,7 @@ MACHINE_RESET_MEMBER(btime_state,mmonkey)
static MACHINE_CONFIG_START( btime, btime_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", DECO_CPU7, HCLK2) /* seletable between H2/H4 via jumper */
+ MCFG_CPU_ADD("maincpu", DECO_CPU7, HCLK2) /* seletable between H2/H4 via jumper */
MCFG_CPU_PROGRAM_MAP(btime_map)
MCFG_CPU_ADD("audiocpu", M6502, HCLK1/3/2)
@@ -1503,7 +1503,7 @@ ROM_START( btime )
ROM_LOAD( "ab01.3b", 0x0800, 0x0800, CRC(25b49078) SHA1(4abdcbd4f3362c3e4463a1274731289f1a72d2e6) )
ROM_LOAD( "ab02.4b", 0x1000, 0x0800, CRC(b8ef56c3) SHA1(4a03bf011dc1fb2902f42587b1174b880cf06df1) )
- ROM_REGION( 0x0800, "bg_map", 0 ) /* background tilemaps */
+ ROM_REGION( 0x0800, "bg_map", 0 ) /* background tilemaps */
ROM_LOAD( "ab03.6b", 0x0000, 0x0800, CRC(d26bc1f3) SHA1(737af6e264183a1f151f277a07cf250d6abb3fd8) )
ROM_END
@@ -1531,7 +1531,7 @@ ROM_START( btime2 )
ROM_LOAD( "ab01.3b", 0x0800, 0x0800, CRC(25b49078) SHA1(4abdcbd4f3362c3e4463a1274731289f1a72d2e6) )
ROM_LOAD( "ab02.4b", 0x1000, 0x0800, CRC(b8ef56c3) SHA1(4a03bf011dc1fb2902f42587b1174b880cf06df1) )
- ROM_REGION( 0x0800, "bg_map", 0 ) /* background tilemaps */
+ ROM_REGION( 0x0800, "bg_map", 0 ) /* background tilemaps */
ROM_LOAD( "ab03.6b", 0x0000, 0x0800, CRC(d26bc1f3) SHA1(737af6e264183a1f151f277a07cf250d6abb3fd8) )
ROM_END
@@ -1559,7 +1559,7 @@ ROM_START( btimem )
ROM_LOAD( "ab01.3b", 0x0800, 0x0800, CRC(25b49078) SHA1(4abdcbd4f3362c3e4463a1274731289f1a72d2e6) )
ROM_LOAD( "ab02.4b", 0x1000, 0x0800, CRC(b8ef56c3) SHA1(4a03bf011dc1fb2902f42587b1174b880cf06df1) )
- ROM_REGION( 0x0800, "bg_map", 0 ) /* background tilemaps */
+ ROM_REGION( 0x0800, "bg_map", 0 ) /* background tilemaps */
ROM_LOAD( "ab03.6b", 0x0000, 0x0800, CRC(d26bc1f3) SHA1(737af6e264183a1f151f277a07cf250d6abb3fd8) )
ROM_END
@@ -1568,7 +1568,7 @@ ROM_START( cookrace )
/* code is in the range 0500-3fff, encrypted */
ROM_LOAD( "1f.1", 0x0000, 0x2000, CRC(68759d32) SHA1(2112a6f17b871aefdb39739e47d4a9f368a2eb3c) )
ROM_LOAD( "2f.2", 0x2000, 0x2000, CRC(be7d72d1) SHA1(232d108098cb490e7c828aa4524ad09d3866ae18) )
- ROM_LOAD( "2k", 0xffe0, 0x0020, CRC(e2553b3d) SHA1(0a38929cdb3f37c6e4bacc5c3f94c049b4352858) ) /* reset/interrupt vectors */
+ ROM_LOAD( "2k", 0xffe0, 0x0020, CRC(e2553b3d) SHA1(0a38929cdb3f37c6e4bacc5c3f94c049b4352858) ) /* reset/interrupt vectors */
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "6f.6", 0xe000, 0x1000, CRC(6b8e0272) SHA1(372a891b7b357aea0297ba9bcae752c3c9d8c1be) ) /* starts at 0000, not f000; 0000-01ff is RAM */
@@ -1587,8 +1587,8 @@ ROM_START( cookrace )
ROM_CONTINUE( 0x1000, 0x0800 )
ROM_REGION( 0x0040, "proms", 0 )
- ROM_LOAD( "f9.clr", 0x0000, 0x0020, CRC(c2348c1d) SHA1(a7cc4b499b6c89c5966711f8bb922026c2978e1a) ) /* palette */
- ROM_LOAD( "b7", 0x0020, 0x0020, CRC(e4268fa6) SHA1(93f74e633c3a19755e78e0e2883109cd8ccde9a8) ) /* unknown */
+ ROM_LOAD( "f9.clr", 0x0000, 0x0020, CRC(c2348c1d) SHA1(a7cc4b499b6c89c5966711f8bb922026c2978e1a) ) /* palette */
+ ROM_LOAD( "b7", 0x0020, 0x0020, CRC(e4268fa6) SHA1(93f74e633c3a19755e78e0e2883109cd8ccde9a8) ) /* unknown */
ROM_END
ROM_START( tisland )
@@ -1649,8 +1649,8 @@ ROM_START( lnc )
ROM_LOAD( "s9-15m", 0x5000, 0x1000, CRC(87c8ee9a) SHA1(158019b18bc3e5104bebeb241c077a706bf72ff2) )
ROM_REGION( 0x0040, "proms", 0 )
- ROM_LOAD( "sc-5m", 0x0000, 0x0020, CRC(2a976ebe) SHA1(f3c1b0d98f431f9cd0d5fa009fafa1115aabe6e5) ) /* palette */
- ROM_LOAD( "sb-4c", 0x0020, 0x0020, CRC(a29b4204) SHA1(7f15cae5c4aaa29638fb45029782dafd2b3d1484) ) /* RAS/CAS logic - not used */
+ ROM_LOAD( "sc-5m", 0x0000, 0x0020, CRC(2a976ebe) SHA1(f3c1b0d98f431f9cd0d5fa009fafa1115aabe6e5) ) /* palette */
+ ROM_LOAD( "sb-4c", 0x0020, 0x0020, CRC(a29b4204) SHA1(7f15cae5c4aaa29638fb45029782dafd2b3d1484) ) /* RAS/CAS logic - not used */
ROM_END
/*This one doesn't have the (c) deco and the "pro" word at the title screen so I'm assuming it's a bootleg.*/
@@ -1670,8 +1670,8 @@ ROM_START( protennb )
/* dynamically allocated */
ROM_REGION( 0x0040, "proms", 0 )
- ROM_LOAD( "82s123n.a8", 0x0000, 0x0020, CRC(6a0006ac) SHA1(72265bc472fb7610af190130560ef507244ce41c) ) /* palette */
- ROM_LOAD( "82s123n.j10", 0x0020, 0x0020, CRC(27b004e3) SHA1(4b9960b99130281a3b07f44816001e5eabf7a6fc) ) /* RAS/CAS logic - not used */
+ ROM_LOAD( "82s123n.a8", 0x0000, 0x0020, CRC(6a0006ac) SHA1(72265bc472fb7610af190130560ef507244ce41c) ) /* palette */
+ ROM_LOAD( "82s123n.j10", 0x0020, 0x0020, CRC(27b004e3) SHA1(4b9960b99130281a3b07f44816001e5eabf7a6fc) ) /* RAS/CAS logic - not used */
ROM_END
ROM_START( wtennis )
@@ -1693,8 +1693,8 @@ ROM_START( wtennis )
ROM_LOAD( "t8", 0x5000, 0x1000, CRC(542ace7b) SHA1(b1423d39302ad7d98c9223d8b1d6d062b7676dd9) )
ROM_REGION( 0x0040, "proms", 0 )
- ROM_LOAD( "mb7051.m5", 0x0000, 0x0020, CRC(f051cb28) SHA1(6aebccd38ba7887caff248c8acddb8e14526f1e7) ) /* palette */
- ROM_LOAD( "sb-4c", 0x0020, 0x0020, CRC(a29b4204) SHA1(7f15cae5c4aaa29638fb45029782dafd2b3d1484) ) /* RAS/CAS logic - not used */
+ ROM_LOAD( "mb7051.m5", 0x0000, 0x0020, CRC(f051cb28) SHA1(6aebccd38ba7887caff248c8acddb8e14526f1e7) ) /* palette */
+ ROM_LOAD( "sb-4c", 0x0020, 0x0020, CRC(a29b4204) SHA1(7f15cae5c4aaa29638fb45029782dafd2b3d1484) ) /* RAS/CAS logic - not used */
ROM_END
ROM_START( mmonkey )
@@ -1716,8 +1716,8 @@ ROM_START( mmonkey )
ROM_LOAD( "mmonkey.m14", 0x5000, 0x1000, CRC(f943e28c) SHA1(6ff536a21f34cbb958f6d0f84791102938966ff3) )
ROM_REGION( 0x0040, "proms", 0 )
- ROM_LOAD( "mmi6331.m5", 0x0000, 0x0020, CRC(55e28b32) SHA1(b73f85224738252dc8dbb38a54250dcfe1fc3ae3) ) /* palette */
- ROM_LOAD( "sb-4c", 0x0020, 0x0020, CRC(a29b4204) SHA1(7f15cae5c4aaa29638fb45029782dafd2b3d1484) ) /* RAS/CAS logic - not used */
+ ROM_LOAD( "mmi6331.m5", 0x0000, 0x0020, CRC(55e28b32) SHA1(b73f85224738252dc8dbb38a54250dcfe1fc3ae3) ) /* palette */
+ ROM_LOAD( "sb-4c", 0x0020, 0x0020, CRC(a29b4204) SHA1(7f15cae5c4aaa29638fb45029782dafd2b3d1484) ) /* RAS/CAS logic - not used */
ROM_END
ROM_START( brubber )
@@ -1743,7 +1743,7 @@ ROM_END
/*
Bump 'n Jump (Data East USA)
- Sound Board:
+ Sound Board:
CIS-1
DATA EAST-0136
@@ -1753,7 +1753,7 @@ ROM_END
*/
ROM_START( bnj )
- ROM_REGION( 0x10000, "maincpu", 0 )
+ ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "ad08.12b", 0xa000, 0x2000, CRC(8d649bd5) SHA1(83105718c2d18ef75ca18ae92b34545cb939bc02) )
ROM_LOAD( "ad07.12c", 0xc000, 0x2000, CRC(7a27f5f4) SHA1(f62d752bb7a995e120ed4d642793c543f0ef13ca) )
ROM_LOAD( "ad06.12d", 0xe000, 0x2000, CRC(f855a2d2) SHA1(f231ed008537aeeeacbec64f485e9a96ab3441e1) )
@@ -1813,8 +1813,8 @@ ROM_START( caractn )
ROM_LOAD( "c4.10f", 0x1000, 0x1000, CRC(a9ffacb4) SHA1(49d5f9c0b695f474197fbb761bacc065b6b5808a) )
ROM_REGION( 0x0040, "proms", 0 )
- ROM_LOAD( "tbp18s030.11a", 0x0000, 0x020, CRC(318d25b9) SHA1(9a82619c94f5911d01ddf6b85f7e30cdc6f1d0a3) ) /* palette */
- ROM_LOAD( "tbp18s030.cpu", 0x0020, 0x020, CRC(6b0c2942) SHA1(7d25acc753923b265792fc78f8fc70175c0e0ec2) ) /* RAS/CAS logic - not used */
+ ROM_LOAD( "tbp18s030.11a", 0x0000, 0x020, CRC(318d25b9) SHA1(9a82619c94f5911d01ddf6b85f7e30cdc6f1d0a3) ) /* palette */
+ ROM_LOAD( "tbp18s030.cpu", 0x0020, 0x020, CRC(6b0c2942) SHA1(7d25acc753923b265792fc78f8fc70175c0e0ec2) ) /* RAS/CAS logic - not used */
ROM_REGION( 0x0140, "plds", 0 )
ROM_LOAD( "pal10l8.10k", 0x0000, 0x002c, CRC(dc72a65f) SHA1(d61c149d4df93a2074debf7c5e46557c6b06d10d) )
@@ -1848,7 +1848,7 @@ ROM_START( zoar )
ROM_LOAD( "z05.14l", 0x1000, 0x1000, CRC(05dc6b09) SHA1(197c720544a090e12980513b441a2b9cf04e212f) )
ROM_LOAD( "z08.15l", 0x2000, 0x1000, CRC(9a148551) SHA1(db92dd7552c6f76a062910f37a3fe3524fdffd38) )
- ROM_REGION( 0x1000, "bg_map", 0 ) /* background tilemaps */
+ ROM_REGION( 0x1000, "bg_map", 0 ) /* background tilemaps */
ROM_LOAD( "z13.6b", 0x0000, 0x1000, CRC(8fefa960) SHA1(614026aa71703dd3898e470f45730e5c6934b31b) )
ROM_REGION( 0x0060, "proms", 0 )
@@ -1913,8 +1913,8 @@ READ8_MEMBER(btime_state::wtennis_reset_hack_r)
UINT8 *RAM = memregion("maincpu")->base();
/* Otherwise the game goes into test mode and there is no way out that I
- can see. I'm not sure how it can work, it probably somehow has to do
- with the tape system */
+ can see. I'm not sure how it can work, it probably somehow has to do
+ with the tape system */
RAM[0xfc30] = 0;
@@ -1931,9 +1931,9 @@ DRIVER_INIT_MEMBER(btime_state,zoar)
UINT8 *rom = memregion("maincpu")->base();
/* At location 0xD50A is what looks like an undocumented opcode. I tried
- implementing it given what opcode 0x23 should do, but it still didn't
- work in demo mode. So this could be another protection or a bad ROM read.
- I'm NOPing it out for now. */
+ implementing it given what opcode 0x23 should do, but it still didn't
+ work in demo mode. So this could be another protection or a bad ROM read.
+ I'm NOPing it out for now. */
memset(&rom[0xd50a],0xea,8);
m_audio_nmi_enable_type = AUDIO_ENABLE_AY8910;
@@ -1944,9 +1944,9 @@ DRIVER_INIT_MEMBER(btime_state,tisland)
UINT8 *rom = memregion("maincpu")->base();
/* At location 0xa2b6 there's a strange RLA followed by a BPL that reads from an
- unmapped area that causes the game to fail in several circumstances.On the Cassette
- version the RLA (33) is in reality a BIT (24),so I'm guessing that there's something
- wrong going on in the encryption scheme.*/
+ unmapped area that causes the game to fail in several circumstances.On the Cassette
+ version the RLA (33) is in reality a BIT (24),so I'm guessing that there's something
+ wrong going on in the encryption scheme.*/
memset(&rom[0xa2b6],0x24,1);
m_audio_nmi_enable_type = AUDIO_ENABLE_DIRECT;
diff --git a/src/mame/drivers/btoads.c b/src/mame/drivers/btoads.c
index d64566371e3..204716e683c 100644
--- a/src/mame/drivers/btoads.c
+++ b/src/mame/drivers/btoads.c
@@ -10,9 +10,9 @@
#include "includes/btoads.h"
-#define CPU_CLOCK XTAL_64MHz
-#define VIDEO_CLOCK XTAL_20MHz
-#define SOUND_CLOCK XTAL_24MHz
+#define CPU_CLOCK XTAL_64MHz
+#define VIDEO_CLOCK XTAL_20MHz
+#define SOUND_CLOCK XTAL_24MHz
@@ -178,7 +178,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, btoads_state )
AM_RANGE(0x20000300, 0x2000037f) AM_READWRITE(paletteram_r, paletteram_w)
AM_RANGE(0x20000380, 0x200003ff) AM_READWRITE(main_sound_r, main_sound_w)
AM_RANGE(0x20000400, 0x2000047f) AM_WRITE(misc_control_w)
- AM_RANGE(0x40000000, 0x4000000f) AM_WRITENOP /* watchdog? */
+ AM_RANGE(0x40000000, 0x4000000f) AM_WRITENOP /* watchdog? */
AM_RANGE(0x60000000, 0x6003ffff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0xa0000000, 0xa03fffff) AM_READWRITE(vram_fg_display_r, vram_fg_display_w) AM_SHARE("vram_fg0")
AM_RANGE(0xa4000000, 0xa43fffff) AM_READWRITE(vram_fg_draw_r, vram_fg_draw_w) AM_SHARE("vram_fg1")
@@ -299,15 +299,15 @@ INPUT_PORTS_END
static const tms34010_config tms_config =
{
- FALSE, /* halt on reset */
- "screen", /* the screen operated on */
- VIDEO_CLOCK/2, /* pixel clock */
- 1, /* pixels per clock */
- NULL, /* scanline callback (indexed16) */
+ FALSE, /* halt on reset */
+ "screen", /* the screen operated on */
+ VIDEO_CLOCK/2, /* pixel clock */
+ 1, /* pixels per clock */
+ NULL, /* scanline callback (indexed16) */
btoads_state::static_scanline_update, /* scanline callback (rgb32) */
- NULL, /* generate interrupt */
- btoads_state::static_to_shiftreg, /* write to shiftreg function */
- btoads_state::static_from_shiftreg /* read from shiftreg function */
+ NULL, /* generate interrupt */
+ btoads_state::static_to_shiftreg, /* write to shiftreg function */
+ btoads_state::static_from_shiftreg /* read from shiftreg function */
};
@@ -355,23 +355,23 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( btoads )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* sound program, M27C256B rom */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* sound program, M27C256B rom */
ROM_LOAD( "bt.u102", 0x0000, 0x8000, CRC(a90b911a) SHA1(6ec25161e68df1c9870d48cc2b1f85cd1a49aba9) )
- ROM_REGION16_LE( 0x800000, "user1", 0 ) /* 34020 code, M27C322 roms */
+ ROM_REGION16_LE( 0x800000, "user1", 0 ) /* 34020 code, M27C322 roms */
ROM_LOAD32_WORD( "btc0-p0.u120", 0x000000, 0x400000, CRC(0dfd1e35) SHA1(733a0a4235bebd598c600f187ed2628f28cf9bd0) )
ROM_LOAD32_WORD( "btc0-p1.u121", 0x000002, 0x400000, CRC(df7487e1) SHA1(67151b900767bb2653b5261a98c81ff8827222c3) )
- ROM_REGION( 0x1000000, "bsmt", 0 ) /* BSMT data, M27C160 rom */
+ ROM_REGION( 0x1000000, "bsmt", 0 ) /* BSMT data, M27C160 rom */
ROM_LOAD( "btc0-s.u109", 0x00000, 0x200000, CRC(d9612ddb) SHA1(f186dfb013e81abf81ba8ac5dc7eb731c1ad82b6) )
ROM_REGION( 0x080a, "plds", 0 )
- ROM_LOAD( "u10.bin", 0x0000, 0x0157, CRC(b1144178) SHA1(15fb047adee4125e9fcf04171e0a502655e0a3d8) ) /* GAL20V8A-15LP Located at U10. */
- ROM_LOAD( "u11.bin", 0x0000, 0x0157, CRC(7c6beb96) SHA1(2f19d21889dd765b344ad7d257ea7c244baebec2) ) /* GAL20V8A-15LP Located at U11. */
- ROM_LOAD( "u57.bin", 0x0000, 0x0157, CRC(be355a56) SHA1(975238bb1ea8fef14458d6f264a82aa77ecf865d) ) /* GAL20V8A-15LP Located at U57. */
- ROM_LOAD( "u58.bin", 0x0000, 0x0157, CRC(41ed339c) SHA1(5853c805a902e6d12c979958d878d1cefd6908cc) ) /* GAL20V8A-15LP Located at U58. */
- ROM_LOAD( "u90.bin", 0x0000, 0x0157, CRC(a0d0c3f1) SHA1(47464c2ef9fadbba933df27767f377e0c29158aa) ) /* GAL20V8A-15LP Located at U90. */
- ROM_LOAD( "u144.bin", 0x0000, 0x0157, CRC(8597017f) SHA1(003d7b5de57e48f831ab211e2783fff338ce2f32) ) /* GAL20V8A-15LP Located at U144. */
+ ROM_LOAD( "u10.bin", 0x0000, 0x0157, CRC(b1144178) SHA1(15fb047adee4125e9fcf04171e0a502655e0a3d8) ) /* GAL20V8A-15LP Located at U10. */
+ ROM_LOAD( "u11.bin", 0x0000, 0x0157, CRC(7c6beb96) SHA1(2f19d21889dd765b344ad7d257ea7c244baebec2) ) /* GAL20V8A-15LP Located at U11. */
+ ROM_LOAD( "u57.bin", 0x0000, 0x0157, CRC(be355a56) SHA1(975238bb1ea8fef14458d6f264a82aa77ecf865d) ) /* GAL20V8A-15LP Located at U57. */
+ ROM_LOAD( "u58.bin", 0x0000, 0x0157, CRC(41ed339c) SHA1(5853c805a902e6d12c979958d878d1cefd6908cc) ) /* GAL20V8A-15LP Located at U58. */
+ ROM_LOAD( "u90.bin", 0x0000, 0x0157, CRC(a0d0c3f1) SHA1(47464c2ef9fadbba933df27767f377e0c29158aa) ) /* GAL20V8A-15LP Located at U90. */
+ ROM_LOAD( "u144.bin", 0x0000, 0x0157, CRC(8597017f) SHA1(003d7b5de57e48f831ab211e2783fff338ce2f32) ) /* GAL20V8A-15LP Located at U144. */
ROM_END
diff --git a/src/mame/drivers/bublbobl.c b/src/mame/drivers/bublbobl.c
index 585c320cc24..110eb9e0eab 100644
--- a/src/mame/drivers/bublbobl.c
+++ b/src/mame/drivers/bublbobl.c
@@ -275,7 +275,7 @@ TODO:
#include "includes/bublbobl.h"
-#define MAIN_XTAL XTAL_24MHz
+#define MAIN_XTAL XTAL_24MHz
/*************************************
@@ -311,7 +311,7 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, bublbobl_state )
AM_RANGE(0xb000, 0xb000) AM_READ(soundlatch_byte_r) AM_WRITE(bublbobl_sound_status_w)
AM_RANGE(0xb001, 0xb001) AM_WRITE(bublbobl_sh_nmi_enable_w) AM_READNOP
AM_RANGE(0xb002, 0xb002) AM_WRITE(bublbobl_sh_nmi_disable_w)
- AM_RANGE(0xe000, 0xffff) AM_ROM // space for diagnostic ROM?
+ AM_RANGE(0xe000, 0xffff) AM_ROM // space for diagnostic ROM?
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_map, AS_PROGRAM, 8, bublbobl_state )
@@ -332,7 +332,7 @@ static ADDRESS_MAP_START( bootlegmcu_map, AS_PROGRAM, 8, bublbobl_state )
ADDRESS_MAP_GLOBAL_MASK(0x7ff)
AM_RANGE(0x000, 0x000) AM_READWRITE(bublbobl_68705_port_a_r, bublbobl_68705_port_a_w)
AM_RANGE(0x001, 0x001) AM_READWRITE(bublbobl_68705_port_b_r, bublbobl_68705_port_b_w)
- AM_RANGE(0x002, 0x002) AM_READ_PORT("IN0") // COIN
+ AM_RANGE(0x002, 0x002) AM_READ_PORT("IN0") // COIN
AM_RANGE(0x004, 0x004) AM_WRITE(bublbobl_68705_ddr_a_w)
AM_RANGE(0x005, 0x005) AM_WRITE(bublbobl_68705_ddr_b_w)
AM_RANGE(0x006, 0x006) AM_WRITENOP // ???
@@ -393,11 +393,11 @@ static ADDRESS_MAP_START( tokio_sound_map, AS_PROGRAM, 8, bublbobl_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x8fff) AM_RAM
AM_RANGE(0x9000, 0x9000) AM_READ(soundlatch_byte_r) AM_WRITE(bublbobl_sound_status_w)
- AM_RANGE(0x9800, 0x9800) AM_READNOP // ???
+ AM_RANGE(0x9800, 0x9800) AM_READNOP // ???
AM_RANGE(0xa000, 0xa000) AM_WRITE(bublbobl_sh_nmi_disable_w)
AM_RANGE(0xa800, 0xa800) AM_WRITE(bublbobl_sh_nmi_enable_w)
AM_RANGE(0xb000, 0xb001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w)
- AM_RANGE(0xe000, 0xffff) AM_ROM // space for diagnostic ROM?
+ AM_RANGE(0xe000, 0xffff) AM_ROM // space for diagnostic ROM?
ADDRESS_MAP_END
@@ -413,56 +413,56 @@ static INPUT_PORTS_START( bublbobl )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN2 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: coin lockout
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: select 1-way or 2-way coin counter
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: trigger IRQ on main CPU (jumper switchable to vblank)
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: select read or write shared RAM
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: coin lockout
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: select 1-way or 2-way coin counter
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: trigger IRQ on main CPU (jumper switchable to vblank)
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) // output: select read or write shared RAM
PORT_START("DSW0")
- PORT_DIPNAME( 0x05, 0x04, "Mode" ) PORT_DIPLOCATION("DSW-A:1,3")
+ PORT_DIPNAME( 0x05, 0x04, "Mode" ) PORT_DIPLOCATION("DSW-A:1,3")
PORT_DIPSETTING( 0x04, "Game, English" )
PORT_DIPSETTING( 0x05, "Game, Japanese" )
PORT_DIPSETTING( 0x01, "Test (Grid and Inputs)" )
PORT_DIPSETTING( 0x00, "Test (RAM and Sound)/Pause" )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSW-A:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("DSW-A:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSW-A:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSW-A:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("DSW-A:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("DSW-A:5,6")
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("DSW-A:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("DSW-A:7,8")
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSW-B:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("DSW-B:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Very_Hard ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("DSW-B:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("DSW-B:3,4")
PORT_DIPSETTING( 0x08, "20K 80K 300K" )
PORT_DIPSETTING( 0x0c, "30K 100K 400K" )
PORT_DIPSETTING( 0x04, "40K 200K 500K" )
PORT_DIPSETTING( 0x00, "50K 250K 500K" )
// then more bonus lives at 1M 2M 3M 4M 5M - for all dip switch settings
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("DSW-B:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("DSW-B:5,6")
PORT_DIPSETTING( 0x10, "1" )
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x20, "5" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW-B:7")
- PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) // must be off (see notes)
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW-B:7")
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) // must be off (see notes)
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "ROM Type" ) PORT_DIPLOCATION("DSW-B:8")
- PORT_DIPSETTING( 0x80, "IC52=512kb, IC53=none" ) // will hang on startup if set to wrong type
+ PORT_DIPNAME( 0x80, 0x80, "ROM Type" ) PORT_DIPLOCATION("DSW-B:8")
+ PORT_DIPSETTING( 0x80, "IC52=512kb, IC53=none" ) // will hang on startup if set to wrong type
PORT_DIPSETTING( 0x00, "IC52=256kb, IC53=256kb" )
PORT_START("IN1")
@@ -591,46 +591,46 @@ INPUT_PORTS_END
static INPUT_PORTS_START( tokio )
PORT_START("DSW0")
- PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW A:1")
+ PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW A:1")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x01, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW A:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW A:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW A:3" )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW A:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW A:4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW A:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW A:5,6")
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW A:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW A:7,8")
PORT_DIPSETTING( 0x40, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0xc0, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x00, "Enemies" ) PORT_DIPLOCATION("SW B:1")
+ PORT_DIPNAME( 0x01, 0x00, "Enemies" ) PORT_DIPLOCATION("SW B:1")
PORT_DIPSETTING( 0x01, "Few (Easy)" )
PORT_DIPSETTING( 0x00, "Many (Hard)" )
- PORT_DIPNAME( 0x02, 0x02, "Enemy Shots" ) PORT_DIPLOCATION("SW B:2")
+ PORT_DIPNAME( 0x02, 0x02, "Enemy Shots" ) PORT_DIPLOCATION("SW B:2")
PORT_DIPSETTING( 0x02, "Few (Easy)" )
PORT_DIPSETTING( 0x00, "Many (Hard)" )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW B:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW B:3,4")
PORT_DIPSETTING( 0x0c, "100K 400K" )
PORT_DIPSETTING( 0x08, "200K 400K" )
PORT_DIPSETTING( 0x04, "300K 400K" )
PORT_DIPSETTING( 0x00, "400K 400K" )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW B:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW B:5,6")
PORT_DIPSETTING( 0x30, "3" )
PORT_DIPSETTING( 0x20, "4" )
PORT_DIPSETTING( 0x10, "5" )
- PORT_DIPSETTING( 0x00, "99 (Cheat)") // 6 in original version
+ PORT_DIPSETTING( 0x00, "99 (Cheat)") // 6 in original version
PORT_DIPUNUSED_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW B:7" )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW B:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW B:8")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x80, DEF_STR( Japanese ) )
@@ -640,7 +640,7 @@ static INPUT_PORTS_START( tokio )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) // data ready from MCU
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) // data ready from MCU
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -762,15 +762,15 @@ MACHINE_RESET_MEMBER(bublbobl_state,tokio)
static MACHINE_CONFIG_START( tokio, bublbobl_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, MAIN_XTAL/4) // 6 MHz
+ MCFG_CPU_ADD("maincpu", Z80, MAIN_XTAL/4) // 6 MHz
MCFG_CPU_PROGRAM_MAP(tokio_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, irq0_line_hold)
- MCFG_CPU_ADD("slave", Z80, MAIN_XTAL/4) // 6 MHz
+ MCFG_CPU_ADD("slave", Z80, MAIN_XTAL/4) // 6 MHz
MCFG_CPU_PROGRAM_MAP(tokio_slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, MAIN_XTAL/8) // 3 MHz
+ MCFG_CPU_ADD("audiocpu", Z80, MAIN_XTAL/8) // 3 MHz
MCFG_CPU_PROGRAM_MAP(tokio_sound_map) // NMIs are triggered by the main CPU, IRQs are triggered by the YM2203
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) // 100 CPU slices per frame - a high value to ensure proper synchronization of the CPUs
@@ -839,18 +839,18 @@ MACHINE_RESET_MEMBER(bublbobl_state,bublbobl)
static MACHINE_CONFIG_START( bublbobl, bublbobl_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, MAIN_XTAL/4) // 6 MHz
+ MCFG_CPU_ADD("maincpu", Z80, MAIN_XTAL/4) // 6 MHz
MCFG_CPU_PROGRAM_MAP(master_map)
// IRQs are triggered by the MCU
- MCFG_CPU_ADD("slave", Z80, MAIN_XTAL/4) // 6 MHz
+ MCFG_CPU_ADD("slave", Z80, MAIN_XTAL/4) // 6 MHz
MCFG_CPU_PROGRAM_MAP(slave_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80, MAIN_XTAL/8) // 3 MHz
+ MCFG_CPU_ADD("audiocpu", Z80, MAIN_XTAL/8) // 3 MHz
MCFG_CPU_PROGRAM_MAP(sound_map) // IRQs are triggered by the YM2203
- MCFG_CPU_ADD("mcu", M6801, 4000000) // actually 6801U4 // xtal is 4MHz, divided by 4 internally
+ MCFG_CPU_ADD("mcu", M6801, 4000000) // actually 6801U4 // xtal is 4MHz, divided by 4 internally
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, irq0_line_pulse) // comes from the same clock that latches the INT pin on the second Z80
@@ -901,7 +901,7 @@ static MACHINE_CONFIG_DERIVED( boblbobl, bublbobl )
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(bootleg_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, irq0_line_hold) // interrupt mode 1, unlike Bubble Bobble
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, irq0_line_hold) // interrupt mode 1, unlike Bubble Bobble
MCFG_MACHINE_START_OVERRIDE(bublbobl_state,boblbobl)
MCFG_MACHINE_RESET_OVERRIDE(bublbobl_state,boblbobl)
@@ -943,7 +943,7 @@ MACHINE_RESET_MEMBER(bublbobl_state,bub68705)
static MACHINE_CONFIG_DERIVED( bub68705, bublbobl )
MCFG_DEVICE_REMOVE("mcu")
- MCFG_CPU_ADD("mcu", M68705, 4000000) // xtal is 4MHz, divided by 4 internally
+ MCFG_CPU_ADD("mcu", M68705, 4000000) // xtal is 4MHz, divided by 4 internally
MCFG_CPU_PROGRAM_MAP(bootlegmcu_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bublbobl_state, bublbobl_m68705_interrupt) // ??? should come from the same clock which latches the INT pin on the second Z80
@@ -959,7 +959,7 @@ MACHINE_CONFIG_END
*
*************************************/
ROM_START( tokio ) // newer japan set, has -1 revision of roms 02, 03 and 06
- ROM_REGION( 0x30000, "maincpu", 0 ) /* main CPU */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* main CPU */
ROM_LOAD( "a71-02-1.ic4", 0x00000, 0x8000, CRC(BB8DABD7) SHA1(141E9F0C19BCF316477681369E2D98DFFDD8435D) )
/* ROMs banked at 8000-bfff */
ROM_LOAD( "a71-03-1.ic5", 0x10000, 0x8000, CRC(EE49B383) SHA1(D510A1D168542DF6A87C7D7C67A47CF776A51F29) )
@@ -967,13 +967,13 @@ ROM_START( tokio ) // newer japan set, has -1 revision of roms 02, 03 and 06
ROM_LOAD( "a71-05.ic7", 0x20000, 0x8000, CRC(6da0b945) SHA1(6c80b8333dd95657f99e6ba5b6e877733ac02a8c) )
ROM_LOAD( "a71-06-1.ic8", 0x28000, 0x8000, CRC(56927B3F) SHA1(33FB4E71B95664ECFF1F35F6782A14101982A56D) )
- ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
ROM_LOAD( "a71-01.ic1", 0x00000, 0x8000, CRC(0867c707) SHA1(7129974f1252b28e9e338bd3c7fcb87210dcf412) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
ROM_LOAD( "a71-07.ic10", 0x0000, 0x08000, CRC(f298cc7b) SHA1(ebf5c804aa07b7f198ec3e1f8d1e111cd89ebdf3) )
- ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
+ ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
ROM_LOAD( "a71-24.ic57", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* gfx roms, on gfx board */
@@ -995,14 +995,14 @@ ROM_START( tokio ) // newer japan set, has -1 revision of roms 02, 03 and 06
ROM_LOAD( "a71-23.ic37", 0x78000, 0x8000, CRC(30bd46ad) SHA1(6e1618ed237c769d1a8d329fbd7a9f7216993215) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
+ ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
ROM_REGION( 0x0200, "plds", 0 )
ROM_LOAD( "a71-26.ic19", 0x0000, 0x0117, CRC(4e1f119c) SHA1(0ac8eb2fdb202951e5f7145f92dfd10fe96b294b) )
ROM_END
ROM_START( tokioo ) // older japan set, has older roms 02, 03, 06
- ROM_REGION( 0x30000, "maincpu", 0 ) /* main CPU */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* main CPU */
ROM_LOAD( "a71-02.ic4", 0x00000, 0x8000, CRC(d556c908) SHA1(d5d8afb7f7888d77aa9a372dfbab75fbd0358cc3) )
/* ROMs banked at 8000-bfff */
ROM_LOAD( "a71-03.ic5", 0x10000, 0x8000, CRC(69dacf44) SHA1(ee8c33702749c0e2562951f9f80c897d3fbd7dd7) )
@@ -1010,13 +1010,13 @@ ROM_START( tokioo ) // older japan set, has older roms 02, 03, 06
ROM_LOAD( "a71-05.ic7", 0x20000, 0x8000, CRC(6da0b945) SHA1(6c80b8333dd95657f99e6ba5b6e877733ac02a8c) )
ROM_LOAD( "a71-06.ic8", 0x28000, 0x8000, CRC(447d6779) SHA1(5b329b221357a9cea777415d409a6423529a925c) )
- ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
ROM_LOAD( "a71-01.ic1", 0x00000, 0x8000, CRC(0867c707) SHA1(7129974f1252b28e9e338bd3c7fcb87210dcf412) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
ROM_LOAD( "a71-07.ic10", 0x0000, 0x08000, CRC(f298cc7b) SHA1(ebf5c804aa07b7f198ec3e1f8d1e111cd89ebdf3) )
- ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
+ ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
ROM_LOAD( "a71-24.ic57", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* gfx roms, on gfx board */
@@ -1038,14 +1038,14 @@ ROM_START( tokioo ) // older japan set, has older roms 02, 03, 06
ROM_LOAD( "a71-23.ic37", 0x78000, 0x8000, CRC(30bd46ad) SHA1(6e1618ed237c769d1a8d329fbd7a9f7216993215) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
+ ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
ROM_REGION( 0x0200, "plds", 0 )
ROM_LOAD( "a71-26.ic19", 0x0000, 0x0117, CRC(4e1f119c) SHA1(0ac8eb2fdb202951e5f7145f92dfd10fe96b294b) )
ROM_END
ROM_START( tokiou )
- ROM_REGION( 0x30000, "maincpu", 0 ) /* main CPU */
+ ROM_REGION( 0x30000, "maincpu", 0 ) /* main CPU */
ROM_LOAD( "a71-27-1.ic4", 0x00000, 0x8000, CRC(8c180896) SHA1(bc8aeb42da4bae7db6f65b9874224f60a9bc4500) )
/* ROMs banked at 8000-bfff */
ROM_LOAD( "a71-28-1.ic5", 0x10000, 0x8000, CRC(1b447527) SHA1(6939e6c1b8492825d18f4e96f39ff45f4c96eea2) )
@@ -1053,13 +1053,13 @@ ROM_START( tokiou )
ROM_LOAD( "a71-05.ic7", 0x20000, 0x8000, CRC(6da0b945) SHA1(6c80b8333dd95657f99e6ba5b6e877733ac02a8c) )
ROM_LOAD( "a71-06-1.ic8", 0x28000, 0x8000, CRC(56927b3f) SHA1(33fb4e71b95664ecff1f35f6782a14101982a56d) )
- ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
ROM_LOAD( "a71-01.ic1", 0x00000, 0x8000, CRC(0867c707) SHA1(7129974f1252b28e9e338bd3c7fcb87210dcf412) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
ROM_LOAD( "a71-07.ic10", 0x0000, 0x08000, CRC(f298cc7b) SHA1(ebf5c804aa07b7f198ec3e1f8d1e111cd89ebdf3) )
- ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
+ ROM_REGION( 0x0800, "cpu3", 0 ) /* 2k for the microcontroller (68705P5) */
ROM_LOAD( "a71-24.ic57", 0x0000, 0x0800, NO_DUMP )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* gfx roms, on gfx board */
@@ -1081,7 +1081,7 @@ ROM_START( tokiou )
ROM_LOAD( "a71-23.ic37", 0x78000, 0x8000, CRC(30bd46ad) SHA1(6e1618ed237c769d1a8d329fbd7a9f7216993215) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
+ ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
ROM_REGION( 0x0200, "plds", 0 )
ROM_LOAD( "a71-26.ic19", 0x0000, 0x0117, CRC(4e1f119c) SHA1(0ac8eb2fdb202951e5f7145f92dfd10fe96b294b) )
@@ -1096,10 +1096,10 @@ ROM_START( tokiob )
ROM_LOAD( "a71-05.ic7", 0x20000, 0x8000, CRC(6da0b945) SHA1(6c80b8333dd95657f99e6ba5b6e877733ac02a8c) )
ROM_LOAD( "6.ic8", 0x28000, 0x8000, CRC(1490e95b) SHA1(a73e1857a1029156f0b5f7f7fe34a37870e72209) )
- ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* video CPU */
ROM_LOAD( "a71-01.ic1", 0x00000, 0x8000, CRC(0867c707) SHA1(7129974f1252b28e9e338bd3c7fcb87210dcf412) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* audio CPU */
ROM_LOAD( "a71-07.ic10", 0x0000, 0x08000, CRC(f298cc7b) SHA1(ebf5c804aa07b7f198ec3e1f8d1e111cd89ebdf3) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT ) /* gfx roms, on gfx board */
@@ -1121,7 +1121,7 @@ ROM_START( tokiob )
ROM_LOAD( "a71-23.ic37", 0x78000, 0x8000, CRC(30bd46ad) SHA1(6e1618ed237c769d1a8d329fbd7a9f7216993215) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
+ ROM_LOAD( "a71-25.ic41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing, on gfx board */
ROM_END
@@ -1146,13 +1146,13 @@ ROM_START( bublbobl )
ROM_LOAD( "a78-05-1.52", 0x10000, 0x10000, CRC(9f8ee242) SHA1(924150d4e7e087a9b2b0a294c2d0e9903a266c6c) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
- ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
+ ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1172,7 +1172,7 @@ ROM_START( bublbobl )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
/* Located on CPU/Sound Board */
ROM_REGION( 0x0003, "plds", 0 )
@@ -1195,13 +1195,13 @@ ROM_START( bublbobl1 )
ROM_LOAD( "a78-05.52", 0x10000, 0x10000, CRC(53f4bc6e) SHA1(15a2e6d83438d4136b154b3d90dd2cf9f1ce572c) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
- ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
+ ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1221,7 +1221,7 @@ ROM_START( bublbobl1 )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
/* Located on CPU/Sound Board */
ROM_REGION( 0x0003, "plds", 0 )
@@ -1244,13 +1244,13 @@ ROM_START( bublboblr )
ROM_LOAD( "a78-24.52", 0x10000, 0x10000, CRC(b7afedc4) SHA1(6e4c8712f1fdf000e231cfd622dd3b514c61a6fd) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
- ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
+ ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1270,7 +1270,7 @@ ROM_START( bublboblr )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
/* Located on CPU/Sound Board */
ROM_REGION( 0x0003, "plds", 0 )
@@ -1293,13 +1293,13 @@ ROM_START( bublboblr1 )
ROM_LOAD( "a78-21.52", 0x10000, 0x10000, CRC(2844033d) SHA1(6ac0b09d0325990cf18935f35b0adbc033758947) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
- ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
+ ROM_REGION( 0x10000, "mcu", 0 ) /* 64k for the MCU */
ROM_LOAD( "a78-01.17", 0xf000, 0x1000, CRC(b1bfb53d) SHA1(31b8f31acd3aa394acd80db362774749842e1285) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1319,7 +1319,7 @@ ROM_START( bublboblr1 )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
/* Located on CPU/Sound Board */
ROM_REGION( 0x0003, "plds", 0 )
@@ -1336,10 +1336,10 @@ ROM_START( boblbobl )
ROM_LOAD( "bb4", 0x18000, 0x08000, CRC(afda99d8) SHA1(304324074ae726501bbb08e683850639d69939fb) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1359,7 +1359,7 @@ ROM_START( boblbobl )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
ROM_REGION( 0x0600, "plds", 0 )
ROM_LOAD( "pal16r4.u36", 0x0000, 0x0104, CRC(22fe26ac) SHA1(bbbfcbe6faded4af7ceec57b800297c054a997da) )
@@ -1369,32 +1369,32 @@ ROM_END
ROM_START( boblbobl2 )
ROM_REGION( 0x30000, "maincpu", 0 )
- ROM_LOAD( "cpu2-3.bin", 0x00000, 0x08000, CRC(2d9107b6) SHA1(ab1a4a20f4b533cd06cc458668f407a8a14c9d70) )
+ ROM_LOAD( "cpu2-3.bin", 0x00000, 0x08000, CRC(2d9107b6) SHA1(ab1a4a20f4b533cd06cc458668f407a8a14c9d70) )
/* ROMs banked at 8000-bfff */
ROM_LOAD( "bb5", 0x10000, 0x08000, CRC(13118eb1) SHA1(5a5da40c2cc82420f70bc58ffa32de1088c6c82f) )
- ROM_LOAD( "cpu2-4.bin", 0x18000, 0x08000, CRC(3f9fed10) SHA1(1cc18a58d9a27495048825836accfa81ebbc0c56) )
+ ROM_LOAD( "cpu2-4.bin", 0x18000, 0x08000, CRC(3f9fed10) SHA1(1cc18a58d9a27495048825836accfa81ebbc0c56) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
- ROM_LOAD( "gfx7.bin", 0x00000, 0x10000, CRC(702f61c0) SHA1(2f294ab2b0286736a64ea2bfc95d855aa5b41ada) )
- ROM_LOAD( "gfx8.bin", 0x10000, 0x10000, CRC(677840e8) SHA1(995b2125ca18910d7d4b96078f4ecb17465c4151) )
+ ROM_LOAD( "gfx7.bin", 0x00000, 0x10000, CRC(702f61c0) SHA1(2f294ab2b0286736a64ea2bfc95d855aa5b41ada) )
+ ROM_LOAD( "gfx8.bin", 0x10000, 0x10000, CRC(677840e8) SHA1(995b2125ca18910d7d4b96078f4ecb17465c4151) )
ROM_LOAD( "a78-13.16", 0x20000, 0x08000, CRC(d0af35c5) SHA1(c5a89f4d73acc0db86654540b3abfd77b3757db5) )
- ROM_LOAD( "a78-14.17", 0x28000, 0x08000, CRC(7b5369a8) SHA1(1307b26d80e6f36ebe6c442bebec41d20066eaf9) ) // match
+ ROM_LOAD( "a78-14.17", 0x28000, 0x08000, CRC(7b5369a8) SHA1(1307b26d80e6f36ebe6c442bebec41d20066eaf9) ) // match
/* 0x30000-0x3ffff empty */
- ROM_LOAD( "gfx10.bin", 0x40000, 0x10000, CRC(d370f499) SHA1(94ce157ff1a53fabf08abe5467531b94a56666a5) )
- ROM_LOAD( "gfx11.bin", 0x50000, 0x10000, CRC(76f2b367) SHA1(3e357a5642c8747df77a995057cecdf96f3130ab) )
+ ROM_LOAD( "gfx10.bin", 0x40000, 0x10000, CRC(d370f499) SHA1(94ce157ff1a53fabf08abe5467531b94a56666a5) )
+ ROM_LOAD( "gfx11.bin", 0x50000, 0x10000, CRC(76f2b367) SHA1(3e357a5642c8747df77a995057cecdf96f3130ab) )
ROM_LOAD( "a78-19.34", 0x60000, 0x08000, CRC(66e9438c) SHA1(b94e62b6fbe7f4e08086d0365afc5cff6e0ccafd) )
- ROM_LOAD( "a78-20.35", 0x68000, 0x08000, CRC(9ef863ad) SHA1(29f91b5a3765e4d6e6c3382db1d8d8297b6e56c8) ) // match
+ ROM_LOAD( "a78-20.35", 0x68000, 0x08000, CRC(9ef863ad) SHA1(29f91b5a3765e4d6e6c3382db1d8d8297b6e56c8) ) // match
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
ROM_END
ROM_START( sboblboa )
@@ -1405,10 +1405,10 @@ ROM_START( sboblboa )
ROM_LOAD( "1b.bin", 0x18000, 0x08000, CRC(1f29b5c0) SHA1(c15c84ca11cc10edac6340468bca463ecb2d89e6) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "1e.rom", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "1d.rom", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1428,7 +1428,7 @@ ROM_START( sboblboa )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
ROM_END
ROM_START( sboblbob )
@@ -1439,10 +1439,10 @@ ROM_START( sboblbob )
ROM_LOAD( "bbb-4.rom", 0x18000, 0x08000, CRC(94c75591) SHA1(7698bc4b7d20e554a73a489cd3a15ae61b350e37) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "a78-08.37", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "a78-07.46", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1462,7 +1462,7 @@ ROM_START( sboblbob )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
ROM_END
@@ -1475,13 +1475,13 @@ ROM_START( bub68705 )
ROM_LOAD( "3.bin", 0x18000, 0x08000, CRC(e6c698f2) SHA1(8df116075f5891f74d0da8966ed11c597b5f544f) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "4.bin", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "1.bin", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
- ROM_REGION( 0x800, "mcu", 0 ) /* 64k for the MCU */
+ ROM_REGION( 0x800, "mcu", 0 ) /* 64k for the MCU */
ROM_LOAD( "68705.bin", 0x000, 0x800, CRC(78caa635) SHA1(a756e45b25b007843ba4f2204cad6081cf7260e9) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1501,7 +1501,7 @@ ROM_START( bub68705 )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
ROM_END
@@ -1513,10 +1513,10 @@ ROM_START( dland )
ROM_LOAD( "dl_4.u68", 0x18000, 0x08000, CRC(c6a3776f) SHA1(473fc8c990046f90517f2506f1ca59eeb7ea13e5) )
/* 20000-2ffff empty */
- ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
+ ROM_REGION( 0x10000, "slave", 0 ) /* 64k for the second CPU */
ROM_LOAD( "dl_1.u42", 0x0000, 0x08000, CRC(ae11a07b) SHA1(af7a335c8da637103103cc274e077f123908ebb7) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the third CPU */
ROM_LOAD( "dl_2.u74", 0x0000, 0x08000, CRC(4f9a26e8) SHA1(3105b34b88a7134493c2b3f584729f8b0407a011) )
ROM_REGION( 0x80000, "gfx1", ROMREGION_INVERT )
@@ -1530,7 +1530,7 @@ ROM_START( dland )
/* 0x70000-0x7ffff empty */
ROM_REGION( 0x0100, "proms", 0 ) // not on this? (but needed for the bublbobl video driver to work)
- ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
+ ROM_LOAD( "a71-25.41", 0x0000, 0x0100, CRC(2d0f8545) SHA1(089c31e2f614145ef2743164f7b52ae35bc06808) ) /* video timing */
ROM_END
diff --git a/src/mame/drivers/buggychl.c b/src/mame/drivers/buggychl.c
index 99a7f2795c6..1c88e242862 100644
--- a/src/mame/drivers/buggychl.c
+++ b/src/mame/drivers/buggychl.c
@@ -88,7 +88,7 @@ Dip locations and factory settings verified from dip listing
WRITE8_MEMBER(buggychl_state::bankswitch_w)
{
- membank("bank1")->set_entry(data & 0x07); // shall we check if data&7 < # banks?
+ membank("bank1")->set_entry(data & 0x07); // shall we check if data&7 < # banks?
}
TIMER_CALLBACK_MEMBER(buggychl_state::nmi_callback)
@@ -146,13 +146,13 @@ static ADDRESS_MAP_START( buggychl_map, AS_PROGRAM, 8, buggychl_state )
AM_RANGE(0xd600, 0xd600) AM_READ_PORT("DSW1")
AM_RANGE(0xd601, 0xd601) AM_READ_PORT("DSW2")
AM_RANGE(0xd602, 0xd602) AM_READ_PORT("DSW3")
- AM_RANGE(0xd603, 0xd603) AM_READ_PORT("IN0") /* player inputs */
+ AM_RANGE(0xd603, 0xd603) AM_READ_PORT("IN0") /* player inputs */
AM_RANGE(0xd608, 0xd608) AM_READ_PORT("WHEEL")
- AM_RANGE(0xd609, 0xd609) AM_READ_PORT("IN1") /* coin + accelerator */
+ AM_RANGE(0xd609, 0xd609) AM_READ_PORT("IN1") /* coin + accelerator */
// AM_RANGE(0xd60a, 0xd60a) // other inputs, not used?
// AM_RANGE(0xd60b, 0xd60b) // other inputs, not used?
AM_RANGE(0xd610, 0xd610) AM_WRITE(sound_command_w)
- AM_RANGE(0xd618, 0xd618) AM_WRITENOP /* accelerator clear */
+ AM_RANGE(0xd618, 0xd618) AM_WRITENOP /* accelerator clear */
AM_RANGE(0xd700, 0xd7ff) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_byte_be_w) AM_SHARE("paletteram")
AM_RANGE(0xd840, 0xd85f) AM_WRITEONLY AM_SHARE("scrollv")
AM_RANGE(0xdb00, 0xdbff) AM_WRITEONLY AM_SHARE("scrollh")
@@ -166,21 +166,21 @@ static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, buggychl_state )
AM_RANGE(0x4800, 0x4801) AM_DEVWRITE_LEGACY("ay1", ay8910_address_data_w)
AM_RANGE(0x4802, 0x4803) AM_DEVWRITE_LEGACY("ay2", ay8910_address_data_w)
AM_RANGE(0x4810, 0x481d) AM_DEVWRITE_LEGACY("msm", msm5232_w)
- AM_RANGE(0x4820, 0x4820) AM_RAM /* VOL/BAL for the 7630 on the MSM5232 output */
- AM_RANGE(0x4830, 0x4830) AM_RAM /* TRBL/BASS for the 7630 on the MSM5232 output */
+ AM_RANGE(0x4820, 0x4820) AM_RAM /* VOL/BAL for the 7630 on the MSM5232 output */
+ AM_RANGE(0x4830, 0x4830) AM_RAM /* TRBL/BASS for the 7630 on the MSM5232 output */
AM_RANGE(0x5000, 0x5000) AM_READ(soundlatch_byte_r)
// AM_RANGE(0x5001, 0x5001) AM_READNOP /* is command pending? */
AM_RANGE(0x5001, 0x5001) AM_WRITE(nmi_enable_w)
AM_RANGE(0x5002, 0x5002) AM_WRITE(nmi_disable_w)
AM_RANGE(0x5003, 0x5003) AM_WRITE(sound_enable_w)
- AM_RANGE(0xe000, 0xefff) AM_ROM /* space for diagnostics ROM */
+ AM_RANGE(0xe000, 0xefff) AM_ROM /* space for diagnostics ROM */
ADDRESS_MAP_END
/******************************************************************************/
static INPUT_PORTS_START( buggychl )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, "Game Over Bonus" ) PORT_DIPLOCATION("SW1:1,2") /* Arks/Flags/Fuel */
+ PORT_DIPNAME( 0x03, 0x03, "Game Over Bonus" ) PORT_DIPLOCATION("SW1:1,2") /* Arks/Flags/Fuel */
PORT_DIPSETTING( 0x03, "2000/1000/50" )
PORT_DIPSETTING( 0x02, "1000/500/30" )
PORT_DIPSETTING( 0x01, "500/200/10" )
@@ -189,15 +189,15 @@ static INPUT_PORTS_START( buggychl )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5")
- PORT_DIPSETTING( 0x18, DEF_STR( Easy ) ) /* 1300 units of fuel */
- PORT_DIPSETTING( 0x10, DEF_STR( Normal ) ) /* 1200 units of fuel */
- PORT_DIPSETTING( 0x08, DEF_STR( Hard ) ) /* 1100 units of fuel */
- PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) /* 1000 units of fuel */
+ PORT_DIPSETTING( 0x18, DEF_STR( Easy ) ) /* 1300 units of fuel */
+ PORT_DIPSETTING( 0x10, DEF_STR( Normal ) ) /* 1200 units of fuel */
+ PORT_DIPSETTING( 0x08, DEF_STR( Hard ) ) /* 1100 units of fuel */
+ PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) /* 1000 units of fuel */
PORT_SERVICE_DIPLOC( 0x20, IP_ACTIVE_LOW, "SW1:6" )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Only listed as OFF in the manual */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Only listed as OFF in the manual */
PORT_START("DSW2")
PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW2:1,2,3,4")
@@ -239,11 +239,11 @@ static INPUT_PORTS_START( buggychl )
PORT_DIPNAME( 0x01, 0x01, "Start button needed" ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x01, DEF_STR( Yes ) )
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Only listed as OFF in the manual */
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Only listed as OFF in the manual */
PORT_DIPNAME( 0x04, 0x04, "Fuel loss (Cheat)") PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x00, "Crash only" )
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Only listed as OFF in the manual */
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED ) /* Only listed as OFF in the manual */
PORT_DIPNAME( 0x10, 0x10, "Coinage Display" ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x00, DEF_STR( No ) )
PORT_DIPSETTING( 0x10, DEF_STR( Yes ) )
@@ -261,7 +261,7 @@ static INPUT_PORTS_START( buggychl )
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON2 ) /* shift */
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON2 ) /* shift */
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("Test Button") PORT_CODE(KEYCODE_F1)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
@@ -272,7 +272,7 @@ static INPUT_PORTS_START( buggychl )
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_TILT )
- PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_BUTTON1 ) /* accelerator */
+ PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_BUTTON1 ) /* accelerator */
PORT_START("WHEEL") /* wheel */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_REVERSE
@@ -351,7 +351,7 @@ static const ay8910_interface ay8910_interface_2 =
static const msm5232_interface msm5232_config =
{
- { 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6 }, /* default 0.39 uF capacitors (not verified) */
+ { 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6 }, /* default 0.39 uF capacitors (not verified) */
DEVCB_NULL
};
@@ -397,7 +397,7 @@ static MACHINE_CONFIG_START( buggychl, buggychl_state )
MCFG_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz??? */
MCFG_CPU_PROGRAM_MAP(sound_map)
- MCFG_CPU_PERIODIC_INT_DRIVER(buggychl_state, irq0_line_hold, 60*60) /* irq is timed, tied to the cpu clock and not to vblank */
+ MCFG_CPU_PERIODIC_INT_DRIVER(buggychl_state, irq0_line_hold, 60*60) /* irq is timed, tied to the cpu clock and not to vblank */
/* nmi is caused by the main cpu */
MCFG_CPU_ADD("mcu", M68705,8000000/2) /* 4 MHz */
@@ -430,14 +430,14 @@ static MACHINE_CONFIG_START( buggychl, buggychl_state )
MCFG_SOUND_ADD("msm", MSM5232, 2000000)
MCFG_SOUND_CONFIG(msm5232_config)
- MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
- MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
- MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
- MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
- MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
- MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
- MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
- MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
+ MCFG_SOUND_ROUTE(0, "mono", 1.0) // pin 28 2'-1
+ MCFG_SOUND_ROUTE(1, "mono", 1.0) // pin 29 4'-1
+ MCFG_SOUND_ROUTE(2, "mono", 1.0) // pin 30 8'-1
+ MCFG_SOUND_ROUTE(3, "mono", 1.0) // pin 31 16'-1
+ MCFG_SOUND_ROUTE(4, "mono", 1.0) // pin 36 2'-2
+ MCFG_SOUND_ROUTE(5, "mono", 1.0) // pin 35 4'-2
+ MCFG_SOUND_ROUTE(6, "mono", 1.0) // pin 34 8'-2
+ MCFG_SOUND_ROUTE(7, "mono", 1.0) // pin 33 16'-2
// pin 1 SOLO 8' not mapped
// pin 2 SOLO 16' not mapped
// pin 22 Noise Output not mapped
@@ -460,10 +460,10 @@ ROM_START( buggychl )
ROM_REGION( 0x10000, "audiocpu", 0 ) /* sound Z80 */
ROM_LOAD( "a22-24.28", 0x00000, 0x4000, CRC(1e7f841f) SHA1(2dc0787b08d32acb78291b689c02dbb83d04d08c) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 8k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 8k for the microcontroller */
ROM_LOAD( "a22-19.31", 0x00000, 0x0800, CRC(06a71df0) SHA1(28183e6769e1471e7f28dc2a9f5b54e14b7ef339) )
- ROM_REGION( 0x20000, "gfx1", 0 ) /* sprites */
+ ROM_REGION( 0x20000, "gfx1", 0 ) /* sprites */
ROM_LOAD( "a22-06.111", 0x00000, 0x4000, CRC(1df91b17) SHA1(440d33bf984042fb4eac8f17bb385992ccdc6113) )
ROM_LOAD( "a22-07.110", 0x04000, 0x4000, CRC(2f0ab9b7) SHA1(07b98e23d12da834d522e29fe7891503dc258b05) )
ROM_LOAD( "a22-08.109", 0x08000, 0x4000, CRC(49cb2134) SHA1(f9998617c097b90be7257ba6fc1e46ff9e1f8916) )
@@ -473,10 +473,10 @@ ROM_START( buggychl )
ROM_LOAD( "a22-12.105", 0x18000, 0x4000, CRC(8b365b24) SHA1(a306c1f6fe1f5563602ab424f1b4f6ac17d1e47d) )
ROM_LOAD( "a22-13.104", 0x1c000, 0x4000, CRC(2c6d68fe) SHA1(9e1a0e44ae2b9986d0ebff49a0fd4df3e8a7f4e7) )
- ROM_REGION( 0x4000, "gfx2", 0 ) /* sprite zoom tables */
- ROM_LOAD( "a22-14.59", 0x0000, 0x2000, CRC(a450b3ef) SHA1(42646bfaed19ea01ffe06996bb6c2fd6c70076d6) ) /* vertical */
- ROM_LOAD( "a22-15.115", 0x2000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
- ROM_LOAD( "a22-16.116", 0x3000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
+ ROM_REGION( 0x4000, "gfx2", 0 ) /* sprite zoom tables */
+ ROM_LOAD( "a22-14.59", 0x0000, 0x2000, CRC(a450b3ef) SHA1(42646bfaed19ea01ffe06996bb6c2fd6c70076d6) ) /* vertical */
+ ROM_LOAD( "a22-15.115", 0x2000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
+ ROM_LOAD( "a22-16.116", 0x3000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
ROM_END
ROM_START( buggychlt )
@@ -490,10 +490,10 @@ ROM_START( buggychlt )
ROM_REGION( 0x10000, "audiocpu", 0 ) /* sound Z80 */
ROM_LOAD( "a22-24.28", 0x00000, 0x4000, CRC(1e7f841f) SHA1(2dc0787b08d32acb78291b689c02dbb83d04d08c) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 8k for the microcontroller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 8k for the microcontroller */
ROM_LOAD( "a22-19.31", 0x00000, 0x0800, CRC(06a71df0) SHA1(28183e6769e1471e7f28dc2a9f5b54e14b7ef339) )
- ROM_REGION( 0x20000, "gfx1", 0 ) /* sprites */
+ ROM_REGION( 0x20000, "gfx1", 0 ) /* sprites */
ROM_LOAD( "a22-06.111", 0x00000, 0x4000, CRC(1df91b17) SHA1(440d33bf984042fb4eac8f17bb385992ccdc6113) )
ROM_LOAD( "a22-07.110", 0x04000, 0x4000, CRC(2f0ab9b7) SHA1(07b98e23d12da834d522e29fe7891503dc258b05) )
ROM_LOAD( "a22-08.109", 0x08000, 0x4000, CRC(49cb2134) SHA1(f9998617c097b90be7257ba6fc1e46ff9e1f8916) )
@@ -503,10 +503,10 @@ ROM_START( buggychlt )
ROM_LOAD( "a22-12.105", 0x18000, 0x4000, CRC(8b365b24) SHA1(a306c1f6fe1f5563602ab424f1b4f6ac17d1e47d) )
ROM_LOAD( "a22-13.104", 0x1c000, 0x4000, CRC(2c6d68fe) SHA1(9e1a0e44ae2b9986d0ebff49a0fd4df3e8a7f4e7) )
- ROM_REGION( 0x4000, "gfx2", 0 ) /* sprite zoom tables */
- ROM_LOAD( "a22-14.59", 0x0000, 0x2000, CRC(a450b3ef) SHA1(42646bfaed19ea01ffe06996bb6c2fd6c70076d6) ) /* vertical */
- ROM_LOAD( "a22-15.115", 0x2000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
- ROM_LOAD( "a22-16.116", 0x3000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
+ ROM_REGION( 0x4000, "gfx2", 0 ) /* sprite zoom tables */
+ ROM_LOAD( "a22-14.59", 0x0000, 0x2000, CRC(a450b3ef) SHA1(42646bfaed19ea01ffe06996bb6c2fd6c70076d6) ) /* vertical */
+ ROM_LOAD( "a22-15.115", 0x2000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
+ ROM_LOAD( "a22-16.116", 0x3000, 0x1000, CRC(337a0c14) SHA1(2aa6814f74497c5c55bf7098d7f6f5508845e36c) ) /* horizontal */
ROM_END
diff --git a/src/mame/drivers/buster.c b/src/mame/drivers/buster.c
index d5177f7f607..bd790ad0881 100644
--- a/src/mame/drivers/buster.c
+++ b/src/mame/drivers/buster.c
@@ -308,16 +308,16 @@ GFXDECODE_END
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
void buster_state::palette_init()
@@ -331,7 +331,7 @@ void buster_state::palette_init()
static MACHINE_CONFIG_START( buster, buster_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,XTAL_3_579545MHz) /* ? MHz */
+ MCFG_CPU_ADD("maincpu", Z80,XTAL_3_579545MHz) /* ? MHz */
MCFG_CPU_PROGRAM_MAP(mainmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", buster_state, irq0_line_hold)
diff --git a/src/mame/drivers/bwidow.c b/src/mame/drivers/bwidow.c
index e6b552b34e7..8823bd6e055 100644
--- a/src/mame/drivers/bwidow.c
+++ b/src/mame/drivers/bwidow.c
@@ -229,7 +229,7 @@
-#define IN_LEFT (1 << 0)
+#define IN_LEFT (1 << 0)
#define IN_RIGHT (1 << 1)
#define IN_FIRE (1 << 2)
#define IN_SHIELD (1 << 3)
@@ -321,11 +321,11 @@ CUSTOM_INPUT_MEMBER(bwidow_state::clock_r)
WRITE8_MEMBER(bwidow_state::bwidow_misc_w)
{
/*
- 0x10 = p1 led
- 0x20 = p2 led
- 0x01 = coin counter 1
- 0x02 = coin counter 2
- */
+ 0x10 = p1 led
+ 0x20 = p2 led
+ 0x01 = coin counter 1
+ 0x02 = coin counter 2
+ */
if (data == m_lastdata) return;
set_led_status(machine(), 0,~data & 0x10);
@@ -377,7 +377,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( spacduel_map, AS_PROGRAM, 8, bwidow_state )
AM_RANGE(0x0000, 0x03ff) AM_RAM
AM_RANGE(0x0800, 0x0800) AM_READ_PORT("IN0")
- AM_RANGE(0x0900, 0x0907) AM_READ(spacduel_IN3_r) /* IN1 */
+ AM_RANGE(0x0900, 0x0907) AM_READ(spacduel_IN3_r) /* IN1 */
AM_RANGE(0x0905, 0x0906) AM_WRITENOP /* ignore? */
AM_RANGE(0x0a00, 0x0a00) AM_DEVREAD("earom", atari_vg_earom_device, read)
// AM_RANGE(0x0c00, 0x0c00) AM_WRITE_LEGACY(coin_counter_w) /* coin out */
@@ -404,8 +404,8 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( bwidow )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To fit "Coin B" Dip Switch
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To fit "Coin A" Dip Switch
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To fit "Coin B" Dip Switch
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To fit "Coin A" Dip Switch
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1)
@@ -459,7 +459,7 @@ static INPUT_PORTS_START( bwidow )
PORT_DIPSETTING ( 0x80, "40000" )
PORT_DIPSETTING ( 0xc0, DEF_STR( None ) )
- PORT_START("IN3") /* IN3 - Movement joystick */
+ PORT_START("IN3") /* IN3 - Movement joystick */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT ) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT ) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN ) PORT_8WAY
@@ -469,7 +469,7 @@ static INPUT_PORTS_START( bwidow )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("IN4") /* IN4 - Firing joystick */
+ PORT_START("IN4") /* IN4 - Firing joystick */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN ) PORT_8WAY
@@ -483,8 +483,8 @@ INPUT_PORTS_END
static INPUT_PORTS_START( gravitar )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To fit "Coin B" Dip Switch
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To fit "Coin A" Dip Switch
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To fit "Coin B" Dip Switch
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To fit "Coin A" Dip Switch
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1)
@@ -557,8 +557,8 @@ INPUT_PORTS_END
static INPUT_PORTS_START( lunarbat )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To be similar with other games
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To be similar with other games
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To be similar with other games
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To be similar with other games
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -568,10 +568,10 @@ static INPUT_PORTS_START( lunarbat )
/* bit 7 is tied to a 3kHz clock */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, bwidow_state,clock_r, NULL)
- PORT_START("DSW0") /* DSW0 - Not read */
+ PORT_START("DSW0") /* DSW0 - Not read */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW1") /* DSW1 - Not read */
+ PORT_START("DSW1") /* DSW1 - Not read */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN3")
@@ -584,15 +584,15 @@ static INPUT_PORTS_START( lunarbat )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("IN4") /* IN4 - Not read */
+ PORT_START("IN4") /* IN4 - Not read */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
static INPUT_PORTS_START( spacduel )
PORT_START("IN0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To fit "Coin B" Dip Switch
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To fit "Coin A" Dip Switch
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) // To fit "Coin B" Dip Switch
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // To fit "Coin A" Dip Switch
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Diagnostic Step") PORT_CODE(KEYCODE_F1)
@@ -661,7 +661,7 @@ static INPUT_PORTS_START( spacduel )
PORT_DIPSETTING ( 0x00, "game" )
/* See machine/spacduel.c for more info on these 2 ports */
- PORT_START("IN3") /* IN3 - Player 1 - spread over 8 memory locations */
+ PORT_START("IN3") /* IN3 - Player 1 - spread over 8 memory locations */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(1)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(1)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
@@ -671,7 +671,7 @@ static INPUT_PORTS_START( spacduel )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 ) PORT_NAME("Select")
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("IN4") /* IN4 - Player 2 - spread over 8 memory locations */
+ PORT_START("IN4") /* IN4 - Player 2 - spread over 8 memory locations */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_PLAYER(2)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
@@ -709,8 +709,8 @@ static MACHINE_CONFIG_START( bwidow, bwidow_state )
MCFG_VIDEO_START(avg)
- /* sound hardware */
- MCFG_FRAGMENT_ADD(bwidow_audio)
+ /* sound hardware */
+ MCFG_FRAGMENT_ADD(bwidow_audio)
MACHINE_CONFIG_END
@@ -722,7 +722,7 @@ static MACHINE_CONFIG_DERIVED( gravitar, bwidow )
MCFG_SCREEN_MODIFY("screen")
MCFG_SCREEN_VISIBLE_AREA(0, 420, 0, 400)
- /* sound hardware */
+ /* sound hardware */
MCFG_FRAGMENT_ADD(gravitar_audio)
MACHINE_CONFIG_END
@@ -774,7 +774,7 @@ ROM_START( bwidow )
ROM_LOAD( "136017-104.j1", 0xc000, 0x1000, CRC(44f9943f) SHA1(e83d8242e4592149719be6a68cf3aba46116072f) )
ROM_LOAD( "136017-105.kl1", 0xd000, 0x1000, CRC(1fdf801c) SHA1(33da2ba3cefa3d0dddc8647f9b6caf5d5bfe9b3b) )
ROM_LOAD( "136017-106.m1", 0xe000, 0x1000, CRC(ccc9b26c) SHA1(f1398e3ff2b62af1509bc117028845b671ff1ca2) )
- ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
+ ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
@@ -794,10 +794,10 @@ ROM_START( gravitar )
ROM_LOAD( "136010.304", 0xc000, 0x1000, CRC(467ad5da) SHA1(822b06be6f2d6298b2b10161fbabbb2caa74b2ef) )
ROM_LOAD( "136010.305", 0xd000, 0x1000, CRC(840603af) SHA1(4a7124f91d3ee940686c51374a861efe6cb5d282) )
ROM_LOAD( "136010.306", 0xe000, 0x1000, CRC(3f3805ad) SHA1(baf080deaa8eea43af2f3be71dacc63e4666c453) )
- ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
+ ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
ROM_END
ROM_START( gravitar2 )
@@ -814,10 +814,10 @@ ROM_START( gravitar2 )
ROM_LOAD( "136010.204", 0xc000, 0x1000, CRC(5d6bc29e) SHA1(fdd442644209ab858eb4ed1b4cdeb1db26f80108) )
ROM_LOAD( "136010.205", 0xd000, 0x1000, CRC(0db1ff34) SHA1(288d9ffff9d18025621be249ea25a7444f58f3a9) )
ROM_LOAD( "136010.206", 0xe000, 0x1000, CRC(4521ca48) SHA1(5770cb46c4ac28d632ad5910723a9edda8283ce5) )
- ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
+ ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
ROM_END
ROM_START( gravp )
@@ -834,10 +834,10 @@ ROM_START( gravp )
ROM_LOAD( "j1.bin", 0xc000, 0x1000, CRC(33d19ef6) SHA1(68f95e237427959d6ef64a5b4dd1e03db7389271) )
ROM_LOAD( "kl1.bin", 0xd000, 0x1000, CRC(032b5806) SHA1(b719792a177e74ec49e6952e445b9cdeaca7505f) )
ROM_LOAD( "m1.bin", 0xe000, 0x1000, CRC(47fe97a0) SHA1(7cbde4b59abde679c28d7547700b342f25762e4a) )
- ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
+ ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
ROM_END
ROM_START( lunarbat )
@@ -853,10 +853,10 @@ ROM_START( lunarbat )
ROM_LOAD( "004.010", 0xc000, 0x1000, CRC(c407764f) SHA1(f202a9fe6c10975bb124b4b1e902341da578da8f) )
ROM_LOAD( "005.010", 0xd000, 0x1000, CRC(4feb6f81) SHA1(b852f1093e56343225c1b2b2554a93c88fc58637) )
ROM_LOAD( "006.010", 0xe000, 0x1000, CRC(f8ad139d) SHA1(e9e0dcb0872b19af09825a979f8b3747c9632091) )
- ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
+ ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
ROM_END
ROM_START( lunarba1 )
@@ -876,10 +876,10 @@ ROM_START( lunarba1 )
ROM_RELOAD( 0xc000, 0x1000 )
ROM_RELOAD( 0xd000, 0x1000 )
ROM_RELOAD( 0xe000, 0x1000 )
- ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
+ ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
ROM_END
ROM_START( spacduel )
@@ -900,10 +900,10 @@ ROM_START( spacduel )
ROM_RELOAD( 0xd000, 0x1000 )
ROM_RELOAD( 0xe000, 0x1000 )
- ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
+ ROM_RELOAD( 0xf000, 0x1000 ) /* for reset/interrupt vectors */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "136002-125.n4", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
ROM_END
diff --git a/src/mame/drivers/bwing.c b/src/mame/drivers/bwing.c
index f56db4f4692..d0ef37bcca3 100644
--- a/src/mame/drivers/bwing.c
+++ b/src/mame/drivers/bwing.c
@@ -202,51 +202,51 @@ INPUT_CHANGED_MEMBER(bwing_state::tilt_pressed)
static INPUT_PORTS_START( bwing )
PORT_START("DSW0")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_3C ) )
- PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
+ PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_3C ) )
- PORT_DIPNAME( 0x10, 0x10, "Diagnostics" ) PORT_DIPLOCATION("SW1:5")
+ PORT_DIPNAME( 0x10, 0x10, "Diagnostics" ) PORT_DIPLOCATION("SW1:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x40, 0x40, "Invincibility" ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, "Invincibility" ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Infinite ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Infinite ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x00, "5" )
PORT_DIPSETTING( 0x01, "3" )
- PORT_DIPNAME( 0x06, 0x06, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:2,3") /* Listed as "Not Used" in the manual */
+ PORT_DIPNAME( 0x06, 0x06, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:2,3") /* Listed as "Not Used" in the manual */
PORT_DIPSETTING( 0x00, "40000" )
PORT_DIPSETTING( 0x02, "20000 80000" )
PORT_DIPSETTING( 0x04, "20000 60000" )
PORT_DIPSETTING( 0x06, "20000 40000" )
- PORT_DIPNAME( 0x08, 0x08, "Enemy Crafts" ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x08, 0x08, "Enemy Crafts" ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x08, DEF_STR( Normal ) )
- PORT_DIPNAME( 0x10, 0x10, "Enemy Missiles" ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, "Enemy Missiles" ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x10, DEF_STR( Normal ) )
- PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW2:6") /* Listed as "Not Used" in the manual */
+ PORT_DIPNAME( 0x20, 0x20, "Freeze" ) PORT_DIPLOCATION("SW2:6") /* Listed as "Not Used" in the manual */
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "Country" ) PORT_DIPLOCATION("SW2:7") /* Listed as "Not Used" in the manual */
+ PORT_DIPNAME( 0x40, 0x00, "Country" ) PORT_DIPLOCATION("SW2:7") /* Listed as "Not Used" in the manual */
PORT_DIPSETTING( 0x00, "Japan/US" )
PORT_DIPSETTING( 0x40, "Japan Only" )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8") /* Listed as "Not Used" in the manual */
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8") /* Listed as "Not Used" in the manual */
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -317,7 +317,7 @@ static const gfx_layout spritelayout =
{ 0x40000, 0x20000, 0 },
{ 7, 6, 5, 4, 3, 2, 1, 0, 128+7, 128+6, 128+5, 128+4, 128+3, 128+2, 128+1, 128+0 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8,10*8,11*8,12*8,13*8,14*8,15*8 },
+ 8*8, 9*8,10*8,11*8,12*8,13*8,14*8,15*8 },
32*8
};
@@ -375,7 +375,7 @@ static MACHINE_CONFIG_START( bwing, bwing_state )
MCFG_CPU_IO_MAP(bwp3_io_map)
MCFG_CPU_PERIODIC_INT_DRIVER(bwing_state, bwp3_interrupt, 1000)
- MCFG_QUANTUM_TIME(attotime::from_hz(18000)) // high enough?
+ MCFG_QUANTUM_TIME(attotime::from_hz(18000)) // high enough?
// video hardware
@@ -383,7 +383,7 @@ static MACHINE_CONFIG_START( bwing, bwing_state )
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(600)) // must be long enough for polling
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(600)) // must be long enough for polling
MCFG_SCREEN_SIZE(32*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 1*8, 31*8-1)
MCFG_SCREEN_UPDATE_DRIVER(bwing_state, screen_update_bwing)
diff --git a/src/mame/drivers/by17.c b/src/mame/drivers/by17.c
index 89220f61314..e83591f4d7d 100644
--- a/src/mame/drivers/by17.c
+++ b/src/mame/drivers/by17.c
@@ -11,7 +11,7 @@ class by17_state : public driver_device
public:
by17_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -158,13 +158,13 @@ ROM_START(stk_sprs)
ROM_END
-GAME( 1978, blackjck, 0, by17, by17, by17_state, by17, ROT0, "Bally","Black Jack (Pinball)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1976, bowarrow, 0, by17, by17, by17_state, by17, ROT0, "Bally","Bow & Arrow (Prototype)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1977, eightbll, 0, by17, by17, by17_state, by17, ROT0, "Bally","Eight Ball", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1977, evelknie, 0, by17, by17, by17_state, by17, ROT0, "Bally","Evel Knievel", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1977, freedom, 0, by17, by17, by17_state, by17, ROT0, "Bally","Freedom", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1978, matahari, 0, by17, by17, by17_state, by17, ROT0, "Bally","Mata Hari", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1977, nightrdr, 0, by17, by17, by17_state, by17, ROT0, "Bally","Night Rider (rev. 21)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1977, nightr20, nightrdr, by17, by17, by17_state, by17, ROT0, "Bally","Night Rider (rev. 20)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1978, pwerplay, 0, by17, by17, by17_state, by17, ROT0, "Bally","Power Play (Pinball)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1978, stk_sprs, 0, by17, by17, by17_state, by17, ROT0, "Bally","Strikes and Spares", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, blackjck, 0, by17, by17, by17_state, by17, ROT0, "Bally","Black Jack (Pinball)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1976, bowarrow, 0, by17, by17, by17_state, by17, ROT0, "Bally","Bow & Arrow (Prototype)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1977, eightbll, 0, by17, by17, by17_state, by17, ROT0, "Bally","Eight Ball", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1977, evelknie, 0, by17, by17, by17_state, by17, ROT0, "Bally","Evel Knievel", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1977, freedom, 0, by17, by17, by17_state, by17, ROT0, "Bally","Freedom", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, matahari, 0, by17, by17, by17_state, by17, ROT0, "Bally","Mata Hari", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1977, nightrdr, 0, by17, by17, by17_state, by17, ROT0, "Bally","Night Rider (rev. 21)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1977, nightr20, nightrdr, by17, by17, by17_state, by17, ROT0, "Bally","Night Rider (rev. 20)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, pwerplay, 0, by17, by17, by17_state, by17, ROT0, "Bally","Power Play (Pinball)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, stk_sprs, 0, by17, by17, by17_state, by17, ROT0, "Bally","Strikes and Spares", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/by35.c b/src/mame/drivers/by35.c
index ddc2e775dbe..4c59d458558 100644
--- a/src/mame/drivers/by35.c
+++ b/src/mame/drivers/by35.c
@@ -11,7 +11,7 @@ class by35_state : public driver_device
public:
by35_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -1283,77 +1283,77 @@ ROM_START(suprbowl)
ROM_END
-GAME( 1986, bullseye, 0, by35, by35, by35_state, by35, ROT0, "Grand Products","301/Bullseye", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1984, blakpyra, 0, by35, by35, by35_state, by35, ROT0, "Bally","Black Pyramid", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1983, bmx, 0, by35, by35, by35_state, by35, ROT0, "Bally","BMX", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, centaur, 0, by35, by35, by35_state, by35, ROT0, "Bally","Centaur", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, bullseye, 0, by35, by35, by35_state, by35, ROT0, "Grand Products","301/Bullseye", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1984, blakpyra, 0, by35, by35, by35_state, by35, ROT0, "Bally","Black Pyramid", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1983, bmx, 0, by35, by35, by35_state, by35, ROT0, "Bally","BMX", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, centaur, 0, by35, by35, by35_state, by35, ROT0, "Bally","Centaur", GAME_IS_SKELETON_MECHANICAL)
GAME( 1985, cosflash, flashgdn, by35, by35, by35_state, by35, ROT0, "Bell Games","Cosmic Flash", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1985, cybrnaut, 0, by35, by35, by35_state, by35, ROT0, "Bally","Cybernaut", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1979, dollyptn, 0, by35, by35, by35_state, by35, ROT0, "Bally","Dolly Parton", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, eballdlx, 0, by35, by35, by35_state, by35, ROT0, "Bally","Eight Ball Deluxe (rev. 15)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1985, cybrnaut, 0, by35, by35, by35_state, by35, ROT0, "Bally","Cybernaut", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1979, dollyptn, 0, by35, by35, by35_state, by35, ROT0, "Bally","Dolly Parton", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, eballdlx, 0, by35, by35, by35_state, by35, ROT0, "Bally","Eight Ball Deluxe (rev. 15)", GAME_IS_SKELETON_MECHANICAL)
GAME( 1981, eballd14, eballdlx, by35, by35, by35_state, by35, ROT0, "Bally","Eight Ball Deluxe (rev. 14)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, elektra, 0, by35, by35, by35_state, by35, ROT0, "Bally","Elektra", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, embryon, 0, by35, by35, by35_state, by35, ROT0, "Bally","Embryon", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, fathom, 0, by35, by35, by35_state, by35, ROT0, "Bally","Fathom", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1984, fbclass, 0, by35, by35, by35_state, by35, ROT0, "Bally","Fireball Classic", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, fball_ii, 0, by35, by35, by35_state, by35, ROT0, "Bally","Fireball II", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, flashgdn, 0, by35, by35, by35_state, by35, ROT0, "Bally","Flash Gordon", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, flashgdnf, flashgdn, by35, by35, by35_state, by35, ROT0, "Bally","Flash Gordon (French)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, flashgdnv, flashgdn, by35, by35, by35_state, by35, ROT0, "Bally","Flash Gordon (Vocalizer sound)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, frontier, 0, by35, by35, by35_state, by35, ROT0, "Bally","Frontier", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1979, futurspa, 0, by35, by35, by35_state, by35, ROT0, "Bally","Future Spa", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1983, goldball, 0, by35, by35, by35_state, by35, ROT0, "Bally","Gold Ball (set 1)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1983, goldballn, goldball, by35, by35, by35_state, by35, ROT0, "Bally / Oliver","Gold Ball (set 2)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1983, granslam, 0, by35, by35, by35_state, by35, ROT0, "Bally","Grand Slam", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1983, granslam4, granslam, by35, by35, by35_state, by35, ROT0, "Bally","Grand Slam (4 Players)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1979, hglbtrtr, 0, by35, by35, by35_state, by35, ROT0, "Bally","Harlem Globetrotters On Tour", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, hotdoggn, 0, by35, by35, by35_state, by35, ROT0, "Bally","Hotdoggin'", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1984, kosteel, 0, by35, by35, by35_state, by35, ROT0, "Bally","Kings of Steel", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1979, kiss, 0, by35, by35, by35_state, by35, ROT0, "Bally","Kiss", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1978, lostwrlp, 0, by35, by35, by35_state, by35, ROT0, "Bally","Lost World", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1981, medusa, 0, by35, by35, by35_state, by35, ROT0, "Bally","Medusa", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1982, m_mpac, 0, by35, by35, by35_state, by35, ROT0, "Bally","Mr. and Mrs. PacMan", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, mystic, 0, by35, by35, by35_state, by35, ROT0, "Bally","Mystic", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1984, myststar, 0, by35, by35, by35_state, by35, ROT0, "Bally","Mystic Star", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, elektra, 0, by35, by35, by35_state, by35, ROT0, "Bally","Elektra", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, embryon, 0, by35, by35, by35_state, by35, ROT0, "Bally","Embryon", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, fathom, 0, by35, by35, by35_state, by35, ROT0, "Bally","Fathom", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1984, fbclass, 0, by35, by35, by35_state, by35, ROT0, "Bally","Fireball Classic", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, fball_ii, 0, by35, by35, by35_state, by35, ROT0, "Bally","Fireball II", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, flashgdn, 0, by35, by35, by35_state, by35, ROT0, "Bally","Flash Gordon", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, flashgdnf, flashgdn, by35, by35, by35_state, by35, ROT0, "Bally","Flash Gordon (French)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, flashgdnv, flashgdn, by35, by35, by35_state, by35, ROT0, "Bally","Flash Gordon (Vocalizer sound)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, frontier, 0, by35, by35, by35_state, by35, ROT0, "Bally","Frontier", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1979, futurspa, 0, by35, by35, by35_state, by35, ROT0, "Bally","Future Spa", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1983, goldball, 0, by35, by35, by35_state, by35, ROT0, "Bally","Gold Ball (set 1)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1983, goldballn, goldball, by35, by35, by35_state, by35, ROT0, "Bally / Oliver","Gold Ball (set 2)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1983, granslam, 0, by35, by35, by35_state, by35, ROT0, "Bally","Grand Slam", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1983, granslam4, granslam, by35, by35, by35_state, by35, ROT0, "Bally","Grand Slam (4 Players)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1979, hglbtrtr, 0, by35, by35, by35_state, by35, ROT0, "Bally","Harlem Globetrotters On Tour", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, hotdoggn, 0, by35, by35, by35_state, by35, ROT0, "Bally","Hotdoggin'", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1984, kosteel, 0, by35, by35, by35_state, by35, ROT0, "Bally","Kings of Steel", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1979, kiss, 0, by35, by35, by35_state, by35, ROT0, "Bally","Kiss", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, lostwrlp, 0, by35, by35, by35_state, by35, ROT0, "Bally","Lost World", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1981, medusa, 0, by35, by35, by35_state, by35, ROT0, "Bally","Medusa", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1982, m_mpac, 0, by35, by35, by35_state, by35, ROT0, "Bally","Mr. and Mrs. PacMan", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, mystic, 0, by35, by35, by35_state, by35, ROT0, "Bally","Mystic", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1984, myststar, 0, by35, by35, by35_state, by35, ROT0, "Bally","Mystic Star", GAME_IS_SKELETON_MECHANICAL)
GAME( 1985, newwave, blakpyra, by35, by35, by35_state, by35, ROT0, "Bell Games","New Wave", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, ngndshkr, 0, by35, by35, by35_state, by35, ROT0, "Bally","Nitro Ground Shaker", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1979, paragon, 0, by35, by35, by35_state, by35, ROT0, "Bally","Paragon", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1978, playboy , 0, by35, by35, by35_state, by35, ROT0, "Bally","Playboy", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1982, rapidfip, 0, by35, by35, by35_state, by35, ROT0, "Bally","Rapid Fire", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, rollston, 0, by35, by35, by35_state, by35, ROT0, "Bally","Rolling Stones", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1985, saturn2, spyhuntr, by35, by35, by35_state, by35, ROT0, "Bell Games","Saturn 2", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, slbmania, 0, by35, by35, by35_state, by35, ROT0, "Bally","Silverball Mania", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, skatebll, 0, by35, by35, by35_state, by35, ROT0, "Bally","Skateball", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1986, spacehaw, cybrnaut, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Space Hawks", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, spaceinv, 0, by35, by35, by35_state, by35, ROT0, "Bally","Space Invaders", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1982, speakesy, 0, by35, by35, by35_state, by35, ROT0, "Bally","Speakeasy", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, ngndshkr, 0, by35, by35, by35_state, by35, ROT0, "Bally","Nitro Ground Shaker", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1979, paragon, 0, by35, by35, by35_state, by35, ROT0, "Bally","Paragon", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, playboy , 0, by35, by35, by35_state, by35, ROT0, "Bally","Playboy", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1982, rapidfip, 0, by35, by35, by35_state, by35, ROT0, "Bally","Rapid Fire", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, rollston, 0, by35, by35, by35_state, by35, ROT0, "Bally","Rolling Stones", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1985, saturn2, spyhuntr, by35, by35, by35_state, by35, ROT0, "Bell Games","Saturn 2", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, slbmania, 0, by35, by35, by35_state, by35, ROT0, "Bally","Silverball Mania", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, skatebll, 0, by35, by35, by35_state, by35, ROT0, "Bally","Skateball", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, spacehaw, cybrnaut, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Space Hawks", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, spaceinv, 0, by35, by35, by35_state, by35, ROT0, "Bally","Space Invaders", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1982, speakesy, 0, by35, by35, by35_state, by35, ROT0, "Bally","Speakeasy", GAME_IS_SKELETON_MECHANICAL)
GAME( 1982, speakesy4p, speakesy, by35, by35, by35_state, by35, ROT0, "Bally","Speakeasy 4 Player", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1982, spectrm, 0, by35, by35, by35_state, by35, ROT0, "Bally","Spectrum", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1982, spectrm4, spectrm, by35, by35, by35_state, by35, ROT0, "Bally","Spectrum (ver 4)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1984, spyhuntr, 0, by35, by35, by35_state, by35, ROT0, "Bally","Spy Hunter (Pinball)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1979, startrep, 0, by35, by35, by35_state, by35, ROT0, "Bally","Star Trek (Pinball)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1979, sst, 0, by35, by35, by35_state, by35, ROT0, "Bally","Supersonic", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1978, smman, 0, by35, by35, by35_state, by35, ROT0, "Bally","Six Million Dollar Man", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1984, tigerrag, kosteel, by35, by35, by35_state, by35, ROT0, "Bell Games","Tiger Rag", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1982, vector, 0, by35, by35, by35_state, by35, ROT0, "Bally","Vector", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, viking, 0, by35, by35, by35_state, by35, ROT0, "Bally","Viking", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1978, voltan, 0, by35, by35, by35_state, by35, ROT0, "Bally","Voltan Escapes Cosmic Doom", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1983, xsandos, 0, by35, by35, by35_state, by35, ROT0, "Bally","X's & O's", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, xenon, 0, by35, by35, by35_state, by35, ROT0, "Bally","Xenon", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1980, xenonf, xenon, by35, by35, by35_state, by35, ROT0, "Bally","Xenon (French)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1985, worlddef, 0, by35, by35, by35_state, by35, ROT0, "Bell Games","World Defender", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1986, darkshad, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Dark Shadow", GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 1986, skflight, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Skill Flight", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, cobrap, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Cobra", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, futrquen, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Future Queen", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, f1gpp, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","F1 Grand Prix", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, toppin, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Top Pin", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, uboat65, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","U-boat 65", GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 1988, bbbowlin, 0, by35, by35, by35_state, by35, ROT0, "United","Big Ball Bowling (Bowler)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, monrobwl, 0, by35, by35, by35_state, by35, ROT0, "Monroe Bowling Co.","Stars & Strikes (Bowler)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, mdntmrdr, 0, by35, by35, by35_state, by35, ROT0, "Bally Midway","Midnight Marauders (Gun game)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, blbeauty, 0, by35, by35, by35_state, by35, ROT0, "Stern","Black Beauty (Shuffle)", GAME_IS_SKELETON_MECHANICAL)
-
-GAME( 1984, suprbowl, xsandos, by35, by35, by35_state, by35, ROT0, "Bell Games","Super Bowl", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1982, spectrm, 0, by35, by35, by35_state, by35, ROT0, "Bally","Spectrum", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1982, spectrm4, spectrm, by35, by35, by35_state, by35, ROT0, "Bally","Spectrum (ver 4)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1984, spyhuntr, 0, by35, by35, by35_state, by35, ROT0, "Bally","Spy Hunter (Pinball)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1979, startrep, 0, by35, by35, by35_state, by35, ROT0, "Bally","Star Trek (Pinball)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1979, sst, 0, by35, by35, by35_state, by35, ROT0, "Bally","Supersonic", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, smman, 0, by35, by35, by35_state, by35, ROT0, "Bally","Six Million Dollar Man", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1984, tigerrag, kosteel, by35, by35, by35_state, by35, ROT0, "Bell Games","Tiger Rag", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1982, vector, 0, by35, by35, by35_state, by35, ROT0, "Bally","Vector", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, viking, 0, by35, by35, by35_state, by35, ROT0, "Bally","Viking", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1978, voltan, 0, by35, by35, by35_state, by35, ROT0, "Bally","Voltan Escapes Cosmic Doom", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1983, xsandos, 0, by35, by35, by35_state, by35, ROT0, "Bally","X's & O's", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, xenon, 0, by35, by35, by35_state, by35, ROT0, "Bally","Xenon", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1980, xenonf, xenon, by35, by35, by35_state, by35, ROT0, "Bally","Xenon (French)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1985, worlddef, 0, by35, by35, by35_state, by35, ROT0, "Bell Games","World Defender", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, darkshad, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Dark Shadow", GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 1986, skflight, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Skill Flight", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, cobrap, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Cobra", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, futrquen, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Future Queen", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, f1gpp, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","F1 Grand Prix", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, toppin, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","Top Pin", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, uboat65, 0, by35, by35, by35_state, by35, ROT0, "Nuova Bell Games","U-boat 65", GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 1988, bbbowlin, 0, by35, by35, by35_state, by35, ROT0, "United","Big Ball Bowling (Bowler)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, monrobwl, 0, by35, by35, by35_state, by35, ROT0, "Monroe Bowling Co.","Stars & Strikes (Bowler)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, mdntmrdr, 0, by35, by35, by35_state, by35, ROT0, "Bally Midway","Midnight Marauders (Gun game)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, blbeauty, 0, by35, by35, by35_state, by35, ROT0, "Stern","Black Beauty (Shuffle)", GAME_IS_SKELETON_MECHANICAL)
+
+GAME( 1984, suprbowl, xsandos, by35, by35, by35_state, by35, ROT0, "Bell Games","Super Bowl", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/by6803.c b/src/mame/drivers/by6803.c
index b4a5945d77d..cdef202c773 100644
--- a/src/mame/drivers/by6803.c
+++ b/src/mame/drivers/by6803.c
@@ -12,7 +12,7 @@ class by6803_state : public driver_device
public:
by6803_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -318,23 +318,23 @@ ROM_START(trucksp2)
ROM_END
-GAME( 1989, atlantip, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Atlantis", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1985, beatclck, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Beat the Clock", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1986, blackblt, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Black Belt", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, black100, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Blackwater 100", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, black100s, black100, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Blackwater 100 (Single Ball Play)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, cityslck, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","City Slicker", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, dungdrag, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Dungeons & Dragons", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1985, eballchp, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Eight Ball Champ", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, esclwrld, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Escape from the Lost World", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, esclwrldg, esclwrld, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Escape from the Lost World (German)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, hardbody, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Hardbody", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, hardbodyg, hardbody, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Hardbody (German)", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, hvymetap, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Heavy Metal Meltdown", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1986, ladyluck, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Lady Luck", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1986, motrdome, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","MotorDome", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1987, prtyanim, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Party Animal", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1986, specforc, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Special Force", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1986, strngsci, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Strange Science", GAME_IS_SKELETON_MECHANICAL)
-GAME( 1988, trucksp3, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Truck Stop (P-3)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1989, atlantip, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Atlantis", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1985, beatclck, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Beat the Clock", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, blackblt, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Black Belt", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, black100, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Blackwater 100", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, black100s, black100, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Blackwater 100 (Single Ball Play)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, cityslck, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","City Slicker", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, dungdrag, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Dungeons & Dragons", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1985, eballchp, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Eight Ball Champ", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, esclwrld, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Escape from the Lost World", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, esclwrldg, esclwrld, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Escape from the Lost World (German)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, hardbody, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Hardbody", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, hardbodyg, hardbody, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Hardbody (German)", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, hvymetap, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Heavy Metal Meltdown", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, ladyluck, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Lady Luck", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, motrdome, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","MotorDome", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1987, prtyanim, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Party Animal", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, specforc, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Special Force", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1986, strngsci, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Strange Science", GAME_IS_SKELETON_MECHANICAL)
+GAME( 1988, trucksp3, 0, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Truck Stop (P-3)", GAME_IS_SKELETON_MECHANICAL)
GAME( 1988, trucksp2, trucksp3, by6803, by6803, by6803_state, by6803, ROT0, "Bally","Truck Stop (P-2)", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/by68701.c b/src/mame/drivers/by68701.c
index 517166be1b3..17d886783c8 100644
--- a/src/mame/drivers/by68701.c
+++ b/src/mame/drivers/by68701.c
@@ -7,7 +7,7 @@ class by68701_state : public driver_device
public:
by68701_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -128,9 +128,9 @@ ROM_START(eballdlxp4)
ROM_END
-GAME(1981, flashgdnp1, flashgdn, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Flash Gordon (prototype rev. 1)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1981, flashgdnp2, flashgdn, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Flash Gordon (prototype rev. 2)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1981, eballdlxp1, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 1)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1981, eballdlxp2, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 2)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1981, eballdlxp3, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 3)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1981, eballdlxp4, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 4)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1981, flashgdnp1, flashgdn, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Flash Gordon (prototype rev. 1)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1981, flashgdnp2, flashgdn, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Flash Gordon (prototype rev. 2)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1981, eballdlxp1, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 1)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1981, eballdlxp2, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 2)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1981, eballdlxp3, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 3)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1981, eballdlxp4, eballdlx, by68701, by68701, by68701_state, by68701, ROT0, "Bally", "Eight Ball Deluxe (prototype rev. 4)", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/byvid.c b/src/mame/drivers/byvid.c
index 9e8f8281e8c..9e24dced6c2 100644
--- a/src/mame/drivers/byvid.c
+++ b/src/mame/drivers/byvid.c
@@ -15,10 +15,10 @@ class by133_state : public driver_device
public:
by133_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu"),
- m_videocpu(*this, "videocpu"),
- m_audiocpu(*this, "audiocpu"),
- m_videopia(*this, "videopia")
+ m_maincpu(*this, "maincpu"),
+ m_videocpu(*this, "videocpu"),
+ m_audiocpu(*this, "audiocpu"),
+ m_videopia(*this, "videopia")
{ }
// devices
@@ -140,18 +140,18 @@ WRITE8_MEMBER(by133_state::by133_portb_w)
static const pia6821_interface videopia_intf =
{
- DEVCB_NULL, /* port A in */
- DEVCB_DRIVER_MEMBER(by133_state,by133_portb_r), /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_DRIVER_MEMBER(by133_state,by133_portb_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_DRIVER_LINE_MEMBER(by133_state,by133_cb2), /* line CB2 out */
- DEVCB_DRIVER_LINE_MEMBER(by133_state,by133_firq), /* IRQA */
- DEVCB_DRIVER_LINE_MEMBER(by133_state,by133_firq) /* IRQB */
+ DEVCB_NULL, /* port A in */
+ DEVCB_DRIVER_MEMBER(by133_state,by133_portb_r), /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_DRIVER_MEMBER(by133_state,by133_portb_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_DRIVER_LINE_MEMBER(by133_state,by133_cb2), /* line CB2 out */
+ DEVCB_DRIVER_LINE_MEMBER(by133_state,by133_firq), /* IRQA */
+ DEVCB_DRIVER_LINE_MEMBER(by133_state,by133_firq) /* IRQB */
};
diff --git a/src/mame/drivers/bzone.c b/src/mame/drivers/bzone.c
index 689e309de57..fde7dddf98c 100644
--- a/src/mame/drivers/bzone.c
+++ b/src/mame/drivers/bzone.c
@@ -322,7 +322,7 @@ static ADDRESS_MAP_START( redbaron_map, AS_PROGRAM, 8, bzone_state )
AM_RANGE(0x0800, 0x0800) AM_READ_PORT("IN0")
AM_RANGE(0x0a00, 0x0a00) AM_READ_PORT("DSW0")
AM_RANGE(0x0c00, 0x0c00) AM_READ_PORT("DSW1")
- AM_RANGE(0x1000, 0x1000) AM_WRITENOP /* coin out - Manual states this is "Coin Counter" */
+ AM_RANGE(0x1000, 0x1000) AM_WRITENOP /* coin out - Manual states this is "Coin Counter" */
AM_RANGE(0x1200, 0x1200) AM_WRITE_LEGACY(avgdvg_go_w)
AM_RANGE(0x1400, 0x1400) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x1600, 0x1600) AM_WRITE_LEGACY(avgdvg_reset_w)
@@ -330,8 +330,8 @@ static ADDRESS_MAP_START( redbaron_map, AS_PROGRAM, 8, bzone_state )
AM_RANGE(0x1802, 0x1802) AM_READ_PORT("IN4")
AM_RANGE(0x1804, 0x1804) AM_DEVREAD_LEGACY("mathbox", mathbox_lo_r)
AM_RANGE(0x1806, 0x1806) AM_DEVREAD_LEGACY("mathbox", mathbox_hi_r)
- AM_RANGE(0x1808, 0x1808) AM_WRITE(redbaron_joysound_w) /* and select joystick pot also */
- AM_RANGE(0x180a, 0x180a) AM_WRITENOP /* sound reset, yet todo */
+ AM_RANGE(0x1808, 0x1808) AM_WRITE(redbaron_joysound_w) /* and select joystick pot also */
+ AM_RANGE(0x180a, 0x180a) AM_WRITENOP /* sound reset, yet todo */
AM_RANGE(0x180c, 0x180c) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
AM_RANGE(0x1810, 0x181f) AM_DEVREADWRITE("pokey", pokey_device, read, write)
AM_RANGE(0x1820, 0x185f) AM_DEVREADWRITE("earom", atari_vg_earom_device, read, write)
@@ -365,47 +365,47 @@ ADDRESS_MAP_END
#define BZONEDSW0\
PORT_START("DSW0")\
PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("M10:1,2")\
- PORT_DIPSETTING( 0x00, "2" )\
- PORT_DIPSETTING( 0x01, "3" )\
- PORT_DIPSETTING( 0x02, "4" )\
- PORT_DIPSETTING( 0x03, "5" )\
+ PORT_DIPSETTING( 0x00, "2" )\
+ PORT_DIPSETTING( 0x01, "3" )\
+ PORT_DIPSETTING( 0x02, "4" )\
+ PORT_DIPSETTING( 0x03, "5" )\
PORT_DIPNAME( 0x0c, 0x04, "Missile appears at" ) PORT_DIPLOCATION("M10:3,4")\
- PORT_DIPSETTING( 0x00, "5000" )\
- PORT_DIPSETTING( 0x04, "10000" )\
- PORT_DIPSETTING( 0x08, "20000" )\
- PORT_DIPSETTING( 0x0c, "30000" )\
+ PORT_DIPSETTING( 0x00, "5000" )\
+ PORT_DIPSETTING( 0x04, "10000" )\
+ PORT_DIPSETTING( 0x08, "20000" )\
+ PORT_DIPSETTING( 0x0c, "30000" )\
PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("M10:5,6")\
- PORT_DIPSETTING( 0x10, "15k and 100k" )\
- PORT_DIPSETTING( 0x20, "25k and 100k" )\
- PORT_DIPSETTING( 0x30, "50k and 100k" )\
- PORT_DIPSETTING( 0x00, DEF_STR( None ) )\
+ PORT_DIPSETTING( 0x10, "15k and 100k" )\
+ PORT_DIPSETTING( 0x20, "25k and 100k" )\
+ PORT_DIPSETTING( 0x30, "50k and 100k" )\
+ PORT_DIPSETTING( 0x00, DEF_STR( None ) )\
PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("M10:7,8")\
- PORT_DIPSETTING( 0x00, DEF_STR( English ))\
- PORT_DIPSETTING( 0x40, DEF_STR( German ))\
- PORT_DIPSETTING( 0x80, DEF_STR( French ))\
- PORT_DIPSETTING( 0xc0, DEF_STR( Spanish ))
+ PORT_DIPSETTING( 0x00, DEF_STR( English ))\
+ PORT_DIPSETTING( 0x40, DEF_STR( German ))\
+ PORT_DIPSETTING( 0x80, DEF_STR( French ))\
+ PORT_DIPSETTING( 0xc0, DEF_STR( Spanish ))
#define BZONEDSW1\
PORT_START("DSW1")\
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("P10:1,2")\
- PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )\
- PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )\
- PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )\
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )\
+ PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )\
+ PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )\
+ PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )\
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )\
PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("P10:3,4")\
- PORT_DIPSETTING( 0x00, "*1" )\
- PORT_DIPSETTING( 0x04, "*4" )\
- PORT_DIPSETTING( 0x08, "*5" )\
- PORT_DIPSETTING( 0x0c, "*6" )\
+ PORT_DIPSETTING( 0x00, "*1" )\
+ PORT_DIPSETTING( 0x04, "*4" )\
+ PORT_DIPSETTING( 0x08, "*5" )\
+ PORT_DIPSETTING( 0x0c, "*6" )\
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("P10:5")\
- PORT_DIPSETTING( 0x00, "*1" )\
- PORT_DIPSETTING( 0x10, "*2" )\
+ PORT_DIPSETTING( 0x00, "*1" )\
+ PORT_DIPSETTING( 0x10, "*2" )\
PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("P10:6,7,8")\
- PORT_DIPSETTING( 0x00, DEF_STR( None ) )\
- PORT_DIPSETTING( 0x20, "3 credits/2 coins" )\
- PORT_DIPSETTING( 0x40, "5 credits/4 coins" )\
- PORT_DIPSETTING( 0x60, "6 credits/4 coins" )\
- PORT_DIPSETTING( 0x80, "6 credits/5 coins" )
+ PORT_DIPSETTING( 0x00, DEF_STR( None ) )\
+ PORT_DIPSETTING( 0x20, "3 credits/2 coins" )\
+ PORT_DIPSETTING( 0x40, "5 credits/4 coins" )\
+ PORT_DIPSETTING( 0x60, "6 credits/4 coins" )\
+ PORT_DIPSETTING( 0x80, "6 credits/5 coins" )
#define BZONEADJ \
PORT_START("R11") \
@@ -436,30 +436,30 @@ static INPUT_PORTS_START( redbaron )
PORT_START("DSW0")
/* See the table above if you are really interested */
PORT_DIPNAME( 0xff, 0xfd, DEF_STR( Coinage ) ) PORT_DIPLOCATION("M10:1,2,3,4,5,6,7,8")
- PORT_DIPSETTING( 0xfd, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0xfd, DEF_STR( Normal ) )
PORT_START("DSW1")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Language ) ) PORT_DIPLOCATION("P10:1,2")
- PORT_DIPSETTING( 0x00, DEF_STR( German ) )
- PORT_DIPSETTING( 0x01, DEF_STR( French ) )
- PORT_DIPSETTING( 0x02, DEF_STR( Spanish ) )
- PORT_DIPSETTING( 0x03, DEF_STR( English ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( German ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( French ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( Spanish ) )
+ PORT_DIPSETTING( 0x03, DEF_STR( English ) )
PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("P10:3,4")
- PORT_DIPSETTING( 0x0c, "2k 10k 30k" )
- PORT_DIPSETTING( 0x08, "4k 15k 40k" )
- PORT_DIPSETTING( 0x04, "6k 20k 50k" )
- PORT_DIPSETTING( 0x00, DEF_STR( None ) )
+ PORT_DIPSETTING( 0x0c, "2k 10k 30k" )
+ PORT_DIPSETTING( 0x08, "4k 15k 40k" )
+ PORT_DIPSETTING( 0x04, "6k 20k 50k" )
+ PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPNAME( 0x30, 0x20, DEF_STR( Lives ) ) PORT_DIPLOCATION("P10:5,6")
- PORT_DIPSETTING( 0x30, "2" )
- PORT_DIPSETTING( 0x20, "3" )
- PORT_DIPSETTING( 0x10, "4" )
- PORT_DIPSETTING( 0x00, "5" )
+ PORT_DIPSETTING( 0x30, "2" )
+ PORT_DIPSETTING( 0x20, "3" )
+ PORT_DIPSETTING( 0x10, "4" )
+ PORT_DIPSETTING( 0x00, "5" )
PORT_DIPNAME( 0x40, 0x40, "One Play Minimum" ) PORT_DIPLOCATION("P10:7")
- PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, "Self Adjust Diff" ) PORT_DIPLOCATION("P10:8")
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
/* IN3 - the real machine reads either the X or Y axis from this port */
/* Instead, we use the two fake 5 & 6 ports and bank-switch the proper */
@@ -470,17 +470,17 @@ static INPUT_PORTS_START( redbaron )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_4WAY
- PORT_START("IN4") /* Misc controls */
+ PORT_START("IN4") /* Misc controls */
PORT_BIT( 0x3f, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 )
/* These 2 are fake - they are bank-switched from reads to IN3 */
/* Red Baron doesn't seem to use the full 0-255 range. */
- PORT_START("FAKE1") /* IN5 */
+ PORT_START("FAKE1") /* IN5 */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(64,192) PORT_SENSITIVITY(25) PORT_KEYDELTA(10)
- PORT_START("FAKE2") /* IN6 */
+ PORT_START("FAKE2") /* IN6 */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(64,192) PORT_SENSITIVITY(25) PORT_KEYDELTA(10)
INPUT_PORTS_END
@@ -512,13 +512,13 @@ static INPUT_PORTS_START( bradley )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_NAME("Magnification Toggle") PORT_CODE(KEYCODE_M) PORT_TOGGLE
PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("AN0") /* analog 0 = turret rotation */
+ PORT_START("AN0") /* analog 0 = turret rotation */
PORT_BIT( 0xff, 0x88, IPT_AD_STICK_X ) PORT_MINMAX(0x48,0xc8) PORT_SENSITIVITY(25) PORT_KEYDELTA(10)
- PORT_START("AN1") /* analog 1 = turret elevation */
+ PORT_START("AN1") /* analog 1 = turret elevation */
PORT_BIT( 0xff, 0x86, IPT_AD_STICK_Y ) PORT_MINMAX(0x46,0xc6) PORT_SENSITIVITY(25) PORT_KEYDELTA(10)
- PORT_START("AN2") /* analog 2 = shell firing range hack removed, now uses Z */
+ PORT_START("AN2") /* analog 2 = shell firing range hack removed, now uses Z */
PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Z ) PORT_MINMAX(0x10,0xf0) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE
BZONEADJ
@@ -650,7 +650,7 @@ ROM_START( bzone ) /* Analog Vec Gen A035742-02 */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
/* Mathbox PROMs */
ROM_REGION( 0x20, "user2", 0 )
@@ -680,7 +680,7 @@ ROM_START( bzonea ) /* Analog Vec Gen A035742-02 */
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
/* Mathbox PROMs */
ROM_REGION( 0x20, "user2", 0 )
@@ -706,12 +706,12 @@ ROM_START( bzonec ) /* cocktail version */
ROM_LOAD( "bz1b7000", 0x7000, 0x0800, CRC(ed8a860e) SHA1(316a3c4870ba44bb3e9cb9fc5200eb081318facf) )
ROM_LOAD( "bz1a7800", 0x7800, 0x0800, CRC(04babf45) SHA1(a59da5ff49fc398ca4a948e28f05250af776b898) )
/* Vector Generator ROMs */
- ROM_LOAD( "036422-01.bc3", 0x3000, 0x0800, CRC(7414177b) SHA1(147d97a3b475e738ce00b1a7909bbd787ad06eda) ) // bz3a3000
+ ROM_LOAD( "036422-01.bc3", 0x3000, 0x0800, CRC(7414177b) SHA1(147d97a3b475e738ce00b1a7909bbd787ad06eda) ) // bz3a3000
ROM_LOAD( "bz3b3800", 0x3800, 0x0800, CRC(76cf57f6) SHA1(1b8f3fcd664ed04ce60d94fdf27e56b20d52bdbd) )
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
/* Mathbox PROMs */
ROM_REGION( 0x20, "user2", 0 )
@@ -743,7 +743,7 @@ ROM_START( bradley )
/* AVG PROM */
ROM_REGION( 0x100, "user1", 0 )
- ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
+ ROM_LOAD( "036408-01.k7", 0x0000, 0x0100, CRC(5903af03) SHA1(24bc0366f394ad0ec486919212e38be0f08d0239) )
/* Mathbox PROMs */
ROM_REGION( 0x20, "user2", 0 )
diff --git a/src/mame/drivers/cabal.c b/src/mame/drivers/cabal.c
index 7e19d368fd5..374a9896fc0 100644
--- a/src/mame/drivers/cabal.c
+++ b/src/mame/drivers/cabal.c
@@ -130,7 +130,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, cabal_state )
AM_RANGE(0xc0040, 0xc0041) AM_WRITENOP /* ??? */
AM_RANGE(0xc0080, 0xc0081) AM_WRITE(cabal_flipscreen_w)
AM_RANGE(0xe0000, 0xe07ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_word_w) AM_SHARE("paletteram")
- AM_RANGE(0xe8008, 0xe8009) AM_WRITE(cabal_sound_irq_trigger_word_w) // fix coin insertion
+ AM_RANGE(0xe8008, 0xe8009) AM_WRITE(cabal_sound_irq_trigger_word_w) // fix coin insertion
AM_RANGE(0xe8000, 0xe800d) AM_READWRITE_LEGACY(seibu_main_word_r, seibu_main_word_w)
ADDRESS_MAP_END
@@ -308,14 +308,14 @@ static INPUT_PORTS_START( common )
PORT_DIPSETTING( 0x2000, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x1000, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Very_Hard ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x4000, 0x4000, "SW2:7" ) /* Left blank in the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x4000, 0x4000, "SW2:7" ) /* Left blank in the manual */
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x8000, DEF_STR( On ) )
PORT_START("COIN")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(4) /* read through sound cpu */
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(4) /* read through sound cpu */
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(4) /* read through sound cpu */
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(4) /* read through sound cpu */
INPUT_PORTS_END
static INPUT_PORTS_START( cabalt )
@@ -354,11 +354,11 @@ static INPUT_PORTS_START( cabalj )
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNKNOWN )
/* Since the Trackball version was produced first, and it doesn't use
- the third button, Pin 24 of the JAMMA connector ('JAMMA button 3')
- has no trace on the pcb. To work around this design issue the
- manufacturer had to use pin 15 which is usually the test / service
- button
- */
+ the third button, Pin 24 of the JAMMA connector ('JAMMA button 3')
+ has no trace on the pcb. To work around this design issue the
+ manufacturer had to use pin 15 which is usually the test / service
+ button
+ */
PORT_START("INPUTS")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
@@ -371,7 +371,7 @@ static INPUT_PORTS_START( cabalj )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START1 )
/* The joystick version has a PCB marked "Joystick sub" containing a 74ls245. It plugs in the
- sockets of the two D4701AC */
+ sockets of the two D4701AC */
PORT_START("IN0")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -573,13 +573,13 @@ static MACHINE_CONFIG_START( cabalbl, cabal_state )
MACHINE_CONFIG_END
ROM_START( cabal )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
ROM_LOAD16_BYTE( "13.7h", 0x00000, 0x10000, CRC(00abbe0c) SHA1(bacf17444abfb4f56248ff56e37b0aa2b1a3800d) )
ROM_LOAD16_BYTE( "11.6h", 0x00001, 0x10000, CRC(44736281) SHA1(1d6da95ef96d9c02aea70791e1cb87b70097d5ed) )
ROM_LOAD16_BYTE( "12.7j", 0x20000, 0x10000, CRC(d763a47c) SHA1(146d8082a404b6eddaf2dc9ba41a997949c17f8a) )
ROM_LOAD16_BYTE( "10.6j", 0x20001, 0x10000, CRC(96d5e8af) SHA1(ed7d854f08e87db5ae6cf526eafa029dfd2bfb9f) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
ROM_LOAD( "4-3n", 0x0000, 0x2000, CRC(4038eff2) SHA1(0bcafc1b78c3bef9a0e9b822c482ea4a942fd180) )
ROM_LOAD( "3-3p", 0x8000, 0x8000, CRC(d9defcbf) SHA1(f26b10b1dbe5aa6446f70fd18e5f1379455578ec) )
@@ -587,7 +587,7 @@ ROM_START( cabal )
ROM_LOAD( "5-6s", 0x00000, 0x04000, CRC(6a76955a) SHA1(733cb4b862b5dac97c2641b58f2362471e62fcf2) ) /* characters */
/* The Joystick versions use a sub-board instead of the mask roms
- the content is the same as the mask roms */
+ the content is the same as the mask roms */
ROM_REGION( 0x80000, "gfx2", 0 )
ROM_LOAD16_BYTE( "bg_rom1.bin", 0x00000, 0x10000, CRC(1023319b) SHA1(38fcc8159776b82779b3163329b07c61be939fae) )
ROM_LOAD16_BYTE( "bg_rom2.bin", 0x00001, 0x10000, CRC(3b6d2b09) SHA1(4cdcd22836dce4ee6348c4e6df7c6360d12ef912) )
@@ -608,15 +608,15 @@ ROM_START( cabal )
ROM_LOAD16_BYTE( "sp_rom7.bin", 0x60000, 0x10000, CRC(55c44764) SHA1(7fad1f2084664b5b4d1384c8081371b0c79c4f5e) )
ROM_LOAD16_BYTE( "sp_rom8.bin", 0x60001, 0x10000, CRC(702735c9) SHA1(e4ac799dc85ff5b7c8e578611605989c78f9e8b3) )
- ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
ROM_LOAD( "2-1s", 0x00000, 0x10000, CRC(850406b4) SHA1(23ac1650c6d6f35607a5264b3aa89868401a645a) )
- ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
ROM_LOAD( "1-1u", 0x00000, 0x10000, CRC(8b3e0789) SHA1(b1450db1b1bada237c90930623e4def321099f13) )
ROM_END
ROM_START( cabala )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
ROM_LOAD16_BYTE( "epr-a-9.7h", 0x00000, 0x10000, CRC(00abbe0c) SHA1(bacf17444abfb4f56248ff56e37b0aa2b1a3800d) )
ROM_LOAD16_BYTE( "epr-a-7.6h", 0x00001, 0x10000, CRC(c89608db) SHA1(a56e77526227af5b693eea9ef74da0d9d57cc55c) )
ROM_LOAD16_BYTE( "epr-a-8.7k", 0x20000, 0x08000, CRC(fe84788a) SHA1(29c49ebbe62357c27befcdcc4c19841a8bf32b2d) )
@@ -624,7 +624,7 @@ ROM_START( cabala )
ROM_LOAD16_BYTE( "epr-a-6.6k", 0x20001, 0x08000, CRC(81eb1355) SHA1(bbf926d40164d78319e982da0e8fb8ec4d4f8b87) )
ROM_RELOAD(0x30001,0x08000)
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
ROM_LOAD( "epr-a-4.3n", 0x0000, 0x2000, CRC(4038eff2) SHA1(0bcafc1b78c3bef9a0e9b822c482ea4a942fd180) )
ROM_LOAD( "epr-a-3.3p", 0x8000, 0x4000, CRC(c0097c55) SHA1(874f813c1b466dab2d15a707e340b9bdb200246c) )
@@ -637,21 +637,21 @@ ROM_START( cabala )
ROM_REGION( 0x80000, "gfx3", 0 )
ROM_LOAD( "tad-1.5e", 0x00000, 0x80000, CRC(8324a7fe) SHA1(aed4470df35ec18e65e35bddc9c217a5019fdcbf) ) /* sprites */
- ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
ROM_LOAD( "epr-a-2.1s", 0x00000, 0x10000, CRC(850406b4) SHA1(23ac1650c6d6f35607a5264b3aa89868401a645a) )
- ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
ROM_LOAD( "epr-a-1.1u", 0x00000, 0x10000, CRC(8b3e0789) SHA1(b1450db1b1bada237c90930623e4def321099f13) )
ROM_END
ROM_START( cabalus )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
ROM_LOAD16_BYTE( "h7_512.bin", 0x00000, 0x10000, CRC(8fe16fb4) SHA1(fedb2d0c6c21516f68cfa99093772fe8fa862389) )
ROM_LOAD16_BYTE( "h6_512.bin", 0x00001, 0x10000, CRC(6968101c) SHA1(d65005ac235dae5c32bbcd182cb365e8fa067fe7) )
ROM_LOAD16_BYTE( "k7_512.bin", 0x20000, 0x10000, CRC(562031a2) SHA1(ed5ef50a66c7797a7f345e479162cf83d6777f7c) )
ROM_LOAD16_BYTE( "k6_512.bin", 0x20001, 0x10000, CRC(4fda2856) SHA1(a213cb7443cdccbad3f2610e8d42b2e149cbedb9) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
ROM_LOAD( "4-3n", 0x0000, 0x2000, CRC(4038eff2) SHA1(0bcafc1b78c3bef9a0e9b822c482ea4a942fd180) )
ROM_LOAD( "3-3p", 0x8000, 0x8000, CRC(d9defcbf) SHA1(f26b10b1dbe5aa6446f70fd18e5f1379455578ec) )
@@ -664,25 +664,25 @@ ROM_START( cabalus )
ROM_REGION( 0x80000, "gfx3", 0 )
ROM_LOAD( "tad-1.5e", 0x00000, 0x80000, CRC(8324a7fe) SHA1(aed4470df35ec18e65e35bddc9c217a5019fdcbf) ) /* sprites */
- ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples? */
+ ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples? */
ROM_LOAD( "2-1s", 0x00000, 0x10000, CRC(850406b4) SHA1(23ac1650c6d6f35607a5264b3aa89868401a645a) )
- ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
ROM_LOAD( "1-1u", 0x00000, 0x10000, CRC(8b3e0789) SHA1(b1450db1b1bada237c90930623e4def321099f13) )
- ROM_REGION( 0x0200, "proms", 0 ) /* unknown */
+ ROM_REGION( 0x0200, "proms", 0 ) /* unknown */
ROM_LOAD( "prom05.8e", 0x0000, 0x0100, CRC(a94b18c2) SHA1(e7db4c1efc9e313e36eef3f53ae5b2e573a38920) )
ROM_LOAD( "prom10.4j", 0x0100, 0x0100, CRC(261c93bc) SHA1(942470198143d584d3766f28587d1879abd912c1) )
ROM_END
ROM_START( cabalus2 )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
ROM_LOAD16_BYTE( "9-7h", 0x00000, 0x10000, CRC(ebbb9484) SHA1(2c77d5b4acdc37720dc7ccab526862981bf8da51) )
ROM_LOAD16_BYTE( "7-6h", 0x00001, 0x10000, CRC(51aeb49e) SHA1(df38dc58d8c6fa3d35904bf34e29111e7bd523ad) )
ROM_LOAD16_BYTE( "8-7k", 0x20000, 0x10000, CRC(4c24ed9a) SHA1(f0fc25c3e7dc8ac71fdad3e91ab618cd7a037123) )
ROM_LOAD16_BYTE( "6-6k", 0x20001, 0x10000, CRC(681620e8) SHA1(c9eacfb55059986dbecc2fae1339069a852f917b) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
ROM_LOAD( "4-3n", 0x0000, 0x2000, CRC(4038eff2) SHA1(0bcafc1b78c3bef9a0e9b822c482ea4a942fd180) )
ROM_LOAD( "3-3p", 0x8000, 0x8000, CRC(d9defcbf) SHA1(f26b10b1dbe5aa6446f70fd18e5f1379455578ec) )
@@ -695,13 +695,13 @@ ROM_START( cabalus2 )
ROM_REGION( 0x80000, "gfx3", 0 )
ROM_LOAD( "tad-1.5e", 0x00000, 0x80000, CRC(8324a7fe) SHA1(aed4470df35ec18e65e35bddc9c217a5019fdcbf) ) /* sprites */
- ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
ROM_LOAD( "2-1s", 0x00000, 0x10000, CRC(850406b4) SHA1(23ac1650c6d6f35607a5264b3aa89868401a645a) )
- ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
ROM_LOAD( "1-1u", 0x00000, 0x10000, CRC(8b3e0789) SHA1(b1450db1b1bada237c90930623e4def321099f13) )
- ROM_REGION( 0x0200, "proms", 0 ) /* unknown */
+ ROM_REGION( 0x0200, "proms", 0 ) /* unknown */
ROM_LOAD( "prom05.8e", 0x0000, 0x0100, CRC(a94b18c2) SHA1(e7db4c1efc9e313e36eef3f53ae5b2e573a38920) )
ROM_LOAD( "prom10.4j", 0x0100, 0x0100, CRC(261c93bc) SHA1(942470198143d584d3766f28587d1879abd912c1) )
ROM_END
@@ -743,20 +743,20 @@ Note: The bootleg has *3* Z80s
*/
ROM_START( cabalbl )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
ROM_LOAD16_BYTE( "cabal_24.bin", 0x00000, 0x10000, CRC(00abbe0c) SHA1(bacf17444abfb4f56248ff56e37b0aa2b1a3800d) )
ROM_LOAD16_BYTE( "cabal_22.bin", 0x00001, 0x10000, CRC(78c4af27) SHA1(31049d1ec76d76284682de7a0592f63d97019240) )
ROM_LOAD16_BYTE( "cabal_23.bin", 0x20000, 0x10000, CRC(d763a47c) SHA1(146d8082a404b6eddaf2dc9ba41a997949c17f8a) )
ROM_LOAD16_BYTE( "cabal_21.bin", 0x20001, 0x10000, CRC(96d5e8af) SHA1(ed7d854f08e87db5ae6cf526eafa029dfd2bfb9f) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
ROM_LOAD( "cabal_11.bin", 0x0000, 0x10000, CRC(d308a543) SHA1(4f45db42512f83266001daee55d06f49e7908e35) )
ROM_REGION( 0x8000, "gfx1", 0 )
ROM_LOAD( "cabal_20.bin", 0x00000, 0x08000, CRC(189033fd) SHA1(814f0cbc5f72345c04922d6d7c986f99d57335fa) ) /* characters */
/* The bootleg versions use a sub-board instead of the mask roms
- the content is the same as the mask roms */
+ the content is the same as the mask roms */
ROM_REGION( 0x80000, "gfx2", 0 )
ROM_LOAD16_BYTE( "cabal_15.bin", 0x00000, 0x10000, CRC(1023319b) SHA1(38fcc8159776b82779b3163329b07c61be939fae) )
ROM_LOAD16_BYTE( "cabal_17.bin", 0x00001, 0x10000, CRC(3b6d2b09) SHA1(4cdcd22836dce4ee6348c4e6df7c6360d12ef912) )
@@ -791,13 +791,13 @@ ROM_END
// based on stickers present on the board it appears to have been manufactured by 'TAB-Austria' and is marked 'CA02'
ROM_START( cabalbl2 )
- ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
+ ROM_REGION( 0x50000, "maincpu", 0 ) /* 64k for cpu code */
ROM_LOAD16_BYTE( "c9.bin", 0x00000, 0x10000, CRC(00abbe0c) SHA1(bacf17444abfb4f56248ff56e37b0aa2b1a3800d) )
ROM_LOAD16_BYTE( "c7.bin", 0x00001, 0x10000, CRC(44736281) SHA1(1d6da95ef96d9c02aea70791e1cb87b70097d5ed) )
ROM_LOAD16_BYTE( "c8.bin", 0x20000, 0x10000, CRC(d763a47c) SHA1(146d8082a404b6eddaf2dc9ba41a997949c17f8a) )
ROM_LOAD16_BYTE( "c6.bin", 0x20001, 0x10000, CRC(96d5e8af) SHA1(ed7d854f08e87db5ae6cf526eafa029dfd2bfb9f) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for sound cpu code */
ROM_LOAD( "c4.bin", 0x2000, 0x2000, CRC(82f9f296) SHA1(2769ffdc28f003684e77d4806be07b87d50be31c) )
ROM_CONTINUE(0x0000,0x2000)
ROM_IGNORE(0x4000)
@@ -827,10 +827,10 @@ ROM_START( cabalbl2 )
ROM_LOAD16_BYTE( "c21.bin", 0x60000, 0x10000, CRC(55c44764) SHA1(7fad1f2084664b5b4d1384c8081371b0c79c4f5e) )
ROM_LOAD16_BYTE( "c25.bin", 0x60001, 0x10000, CRC(702735c9) SHA1(e4ac799dc85ff5b7c8e578611605989c78f9e8b3) )
- ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm1", 0 ) /* Samples */
ROM_LOAD( "c2.bin", 0x00000, 0x10000, CRC(850406b4) SHA1(23ac1650c6d6f35607a5264b3aa89868401a645a) )
- ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
+ ROM_REGION( 0x10000, "adpcm2", 0 ) /* Samples */
ROM_LOAD( "c1.bin", 0x00000, 0x10000, CRC(8b3e0789) SHA1(b1450db1b1bada237c90930623e4def321099f13) )
ROM_END
diff --git a/src/mame/drivers/cabaret.c b/src/mame/drivers/cabaret.c
index 2455e8af8be..4d79d3fcb55 100644
--- a/src/mame/drivers/cabaret.c
+++ b/src/mame/drivers/cabaret.c
@@ -107,8 +107,8 @@ WRITE8_MEMBER(cabaret_state::fg_color_w)
void cabaret_state::video_start()
{
- m_bg_tilemap = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(cabaret_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 32, 64, 8);
- m_fg_tilemap = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(cabaret_state::get_fg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32);
+ m_bg_tilemap = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(cabaret_state::get_bg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 32, 64, 8);
+ m_fg_tilemap = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(cabaret_state::get_fg_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 64, 32);
m_fg_tilemap->set_transparent_pen(0);
m_bg_tilemap->set_scroll_cols(64);
}
@@ -146,14 +146,14 @@ WRITE8_MEMBER(cabaret_state::cabaret_nmi_and_coins_w)
// popmessage("%02x",data);
}
- coin_counter_w(machine(), 0, data & 0x01); // coin_a
- coin_counter_w(machine(), 1, data & 0x04); // coin_c
- coin_counter_w(machine(), 2, data & 0x08); // key in
- coin_counter_w(machine(), 3, data & 0x10); // coin m_out mech
+ coin_counter_w(machine(), 0, data & 0x01); // coin_a
+ coin_counter_w(machine(), 1, data & 0x04); // coin_c
+ coin_counter_w(machine(), 2, data & 0x08); // key in
+ coin_counter_w(machine(), 3, data & 0x10); // coin m_out mech
- set_led_status(machine(), 6, data & 0x40); // led for coin m_out / hopper active
+ set_led_status(machine(), 6, data & 0x40); // led for coin m_out / hopper active
- m_nmi_enable = data; // data & 0x80 // nmi enable?
+ m_nmi_enable = data; // data & 0x80 // nmi enable?
m_out[0] = data;
show_out();
@@ -175,9 +175,9 @@ static ADDRESS_MAP_START( cabaret_portmap, AS_IO, 8, cabaret_state )
AM_RANGE( 0x0090, 0x0090 ) AM_READ_PORT( "BUTTONS1" )
AM_RANGE( 0x00a0, 0x00a0 ) AM_WRITE(cabaret_nmi_and_coins_w )
- AM_RANGE( 0x00a1, 0x00a1 ) AM_READ_PORT("DSW1") /* DSW1 */
- AM_RANGE( 0x00a2, 0x00a2 ) AM_READ_PORT("DSW2") /* DSW2 */
- AM_RANGE( 0x00b0, 0x00b0 ) AM_READ_PORT("DSW3") /* DSW3 */
+ AM_RANGE( 0x00a1, 0x00a1 ) AM_READ_PORT("DSW1") /* DSW1 */
+ AM_RANGE( 0x00a2, 0x00a2 ) AM_READ_PORT("DSW2") /* DSW2 */
+ AM_RANGE( 0x00b0, 0x00b0 ) AM_READ_PORT("DSW3") /* DSW3 */
AM_RANGE( 0x00e0, 0x00e1 ) AM_DEVWRITE_LEGACY("ymsnd", ym2413_w )
@@ -199,7 +199,7 @@ ADDRESS_MAP_END
***************************************************************************/
static INPUT_PORTS_START( cabaret )
- PORT_START("DSW1") // OK
+ PORT_START("DSW1") // OK
PORT_DIPNAME( 0x07, 0x00, "Poke %" ) PORT_DIPLOCATION("SWA:1,2,3")
PORT_DIPSETTING( 0x07, "60%" )
PORT_DIPSETTING( 0x06, "65%" )
@@ -223,7 +223,7 @@ static INPUT_PORTS_START( cabaret )
PORT_DIPSETTING( 0x00, "Quick" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_START("DSW2") // OK
+ PORT_START("DSW2") // OK
PORT_DIPNAME( 0x03, 0x00, "Limit" ) PORT_DIPLOCATION("SWB:1,2")
PORT_DIPSETTING( 0x03, "5000" )
PORT_DIPSETTING( 0x02, "10000" )
@@ -244,7 +244,7 @@ static INPUT_PORTS_START( cabaret )
PORT_START("SERVICE")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Memory Clear") // stats, memory
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Memory Clear") // stats, memory
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
PORT_SERVICE_NO_TOGGLE( 0x20, IP_ACTIVE_LOW )
@@ -288,8 +288,8 @@ static const gfx_layout layout_8x8x6 =
RGN_FRAC(1, 3),
6,
{ RGN_FRAC(0,3)+8,RGN_FRAC(0,3)+0,
- RGN_FRAC(1,3)+8,RGN_FRAC(1,3)+0,
- RGN_FRAC(2,3)+8,RGN_FRAC(2,3)+0 },
+ RGN_FRAC(1,3)+8,RGN_FRAC(1,3)+0,
+ RGN_FRAC(2,3)+8,RGN_FRAC(2,3)+0 },
{ STEP8(0,1) },
{ STEP8(0,2*8) },
8*8*2
@@ -301,8 +301,8 @@ static const gfx_layout layout_8x32x6i =
RGN_FRAC(1, 3),
6,
{ RGN_FRAC(0,3)+8,RGN_FRAC(0,3)+0,
- RGN_FRAC(1,3)+8,RGN_FRAC(1,3)+0,
- RGN_FRAC(2,3)+8,RGN_FRAC(2,3)+0 },
+ RGN_FRAC(1,3)+8,RGN_FRAC(1,3)+0,
+ RGN_FRAC(2,3)+8,RGN_FRAC(2,3)+0 },
{ STEP8(0,1) },
{ STEP32(0,2*8) },
8*32*2
@@ -322,12 +322,12 @@ GFXDECODE_END
void cabaret_state::machine_reset()
{
- m_nmi_enable = 0;
+ m_nmi_enable = 0;
}
INTERRUPT_GEN_MEMBER(cabaret_state::cabaret_interrupt)
{
- if (m_nmi_enable & 0x80)
+ if (m_nmi_enable & 0x80)
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
}
@@ -382,7 +382,7 @@ DRIVER_INIT_MEMBER(cabaret_state,cabaret)
}
ROM_START( cabaret )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code */
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* 64k for code */
ROM_LOAD( "cg-8v204.u97", 0x0000, 0x10000, CRC(44cebf77) SHA1(e3f4e4abf41388f0eed50cf9a0fd0b14aa2f8b93) )
ROM_REGION( 0x60000, "gfx1", 0 )
@@ -396,7 +396,7 @@ ROM_START( cabaret )
ROM_LOAD( "cg-3.u42", 0x4000, 0x4000, CRC(7e1f821f) SHA1(b709d49f9d1890fe3b8ca7f90affc0017a0ad95e) )
ROM_REGION( 0x8000, "gfx3", 0 )
- ROM_LOAD( "cg-7.u98", 0x0000, 0x8000, CRC(b93ae6f8) SHA1(accb87045c278d5d79fff65bb763aa6e8025a945) ) /* background maps, read by the CPU */
+ ROM_LOAD( "cg-7.u98", 0x0000, 0x8000, CRC(b93ae6f8) SHA1(accb87045c278d5d79fff65bb763aa6e8025a945) ) /* background maps, read by the CPU */
ROM_END
GAME( 1992, cabaret, 0, cabaret, cabaret, cabaret_state, cabaret, ROT0, "AMT Co. Ltd.", "Cabaret", GAME_NOT_WORKING )
diff --git a/src/mame/drivers/calchase.c b/src/mame/drivers/calchase.c
index 5eb9f1fc346..22d0b1c6d6a 100644
--- a/src/mame/drivers/calchase.c
+++ b/src/mame/drivers/calchase.c
@@ -131,8 +131,8 @@ class calchase_state : public driver_device
public:
calchase_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
- { }
+ m_maincpu(*this, "maincpu")
+ { }
UINT32 *m_bios_ram;
UINT32 *m_bios_ext_ram;
@@ -142,11 +142,11 @@ public:
UINT8 m_mxtc_config_reg[256];
UINT8 m_piix4_config_reg[4][256];
- device_t *m_pit8254;
- device_t *m_pic8259_1;
- device_t *m_pic8259_2;
- device_t *m_dma8237_1;
- device_t *m_dma8237_2;
+ device_t *m_pit8254;
+ device_t *m_pic8259_1;
+ device_t *m_pic8259_2;
+ device_t *m_dma8237_1;
+ device_t *m_dma8237_2;
UINT32 m_idle_skip_ram;
required_device<cpu_device> m_maincpu;
@@ -343,22 +343,22 @@ static void mxtc_config_w(device_t *busdevice, device_t *device, int function, i
// mame_printf_debug("%s:MXTC: write %d, %02X, %02X\n", machine.describe_context(), function, reg, data);
/*
- memory banking with North Bridge:
- 0x63 (PAM) xx-- ---- BIOS extension 0xe0000 - 0xeffff
- --xx ---- BIOS area 0xf0000-0xfffff
- ---- xx-- ISA add-on BIOS 0xc0000 - 0xcffff
- ---- --xx ISA add-on BIOS 0xd0000 - 0xdffff
+ memory banking with North Bridge:
+ 0x63 (PAM) xx-- ---- BIOS extension 0xe0000 - 0xeffff
+ --xx ---- BIOS area 0xf0000-0xfffff
+ ---- xx-- ISA add-on BIOS 0xc0000 - 0xcffff
+ ---- --xx ISA add-on BIOS 0xd0000 - 0xdffff
- 10 -> 1 = Write Enable, 0 = Read Enable
- */
+ 10 -> 1 = Write Enable, 0 = Read Enable
+ */
if (reg == 0x63)
{
- if (data & 0x20) // enable RAM access to region 0xf0000 - 0xfffff
+ if (data & 0x20) // enable RAM access to region 0xf0000 - 0xfffff
state->membank("bios_bank")->set_base(state->m_bios_ram);
- else // disable RAM access (reads go to BIOS ROM)
+ else // disable RAM access (reads go to BIOS ROM)
state->membank("bios_bank")->set_base(state->memregion("bios")->base() + 0x10000);
- if (data & 0x80) // enable RAM access to region 0xe0000 - 0xeffff
+ if (data & 0x80) // enable RAM access to region 0xe0000 - 0xeffff
state->membank("bios_ext")->set_base(state->m_bios_ext_ram);
else
state->membank("bios_ext")->set_base(state->memregion("bios")->base() + 0);
@@ -574,7 +574,7 @@ static ADDRESS_MAP_START( calchase_map, AS_PROGRAM, 32, calchase_state )
//AM_RANGE(0x18000000, 0x180001ff) AM_RAM
//AM_RANGE(0x20000000, 0x200001ff) AM_RAM
//AM_RANGE(0x28000000, 0x280001ff) AM_RAM
- AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */
+ AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("bios", 0) /* System BIOS */
ADDRESS_MAP_END
static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state )
@@ -629,7 +629,7 @@ ADDRESS_MAP_END
#if 1
static INPUT_PORTS_START( calchase )
PORT_START("pc_keyboard_0")
- PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED ) /* unused scancode 0 */
+ PORT_BIT ( 0x0001, 0x0000, IPT_UNUSED ) /* unused scancode 0 */
AT_KEYB_HELPER( 0x0002, "Esc", KEYCODE_Q ) /* Esc 01 81 */
PORT_START("pc_keyboard_1")
@@ -652,13 +652,13 @@ static INPUT_PORTS_START( calchase )
PORT_START("pc_keyboard_5")
PORT_START("pc_keyboard_6")
- AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */
- AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */
- AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left", KEYCODE_LEFT ) /* Left 69 e9 */
- AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */
- AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */
- AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */
- AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */
+ AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */
+ AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */
+ AT_KEYB_HELPER( 0x0100, "(MF2)Cursor Left", KEYCODE_LEFT ) /* Left 69 e9 */
+ AT_KEYB_HELPER( 0x0200, "(MF2)Cursor Right", KEYCODE_RIGHT ) /* Right 6a ea */
+ AT_KEYB_HELPER( 0x0800, "(MF2)Cursor Down", KEYCODE_DOWN ) /* Down 6c ec */
+ AT_KEYB_HELPER( 0x1000, "(MF2)Page Down", KEYCODE_PGDN ) /* Page Down 6d ed */
+ AT_KEYB_HELPER( 0x4000, "Del", KEYCODE_A ) /* Delete 6f ef */
PORT_START("pc_keyboard_7")
@@ -869,15 +869,15 @@ static const struct pit8253_config calchase_pit8254_config =
{
{
{
- 4772720/4, /* heartbeat IRQ */
+ 4772720/4, /* heartbeat IRQ */
DEVCB_NULL,
DEVCB_DEVICE_LINE("pic8259_1", pic8259_ir0_w)
}, {
- 4772720/4, /* dram refresh */
+ 4772720/4, /* dram refresh */
DEVCB_NULL,
DEVCB_NULL
}, {
- 4772720/4, /* pio port c pin 4, and speaker polling enough */
+ 4772720/4, /* pio port c pin 4, and speaker polling enough */
DEVCB_NULL,
DEVCB_NULL
}
diff --git a/src/mame/drivers/calomega.c b/src/mame/drivers/calomega.c
index 41ab83c6edc..5bc36471ec9 100644
--- a/src/mame/drivers/calomega.c
+++ b/src/mame/drivers/calomega.c
@@ -638,10 +638,10 @@
***********************************************************************************/
-#define MASTER_CLOCK XTAL_10MHz
-#define CPU_CLOCK (MASTER_CLOCK/16)
-#define UART_CLOCK (MASTER_CLOCK/16)
-#define SND_CLOCK (MASTER_CLOCK/8)
+#define MASTER_CLOCK XTAL_10MHz
+#define CPU_CLOCK (MASTER_CLOCK/16)
+#define UART_CLOCK (MASTER_CLOCK/16)
+#define SND_CLOCK (MASTER_CLOCK/8)
#include "emu.h"
#include "cpu/m6502/m6502.h"
@@ -671,7 +671,7 @@ WRITE_LINE_MEMBER(calomega_state::tx_rx_clk)
READ8_MEMBER(calomega_state::s903_mux_port_r)
{
- switch( m_s903_mux_data & 0xf0 ) /* bits 4-7 */
+ switch( m_s903_mux_data & 0xf0 ) /* bits 4-7 */
{
case 0x10: return ioport("IN0-0")->read();
case 0x20: return ioport("IN0-1")->read();
@@ -679,19 +679,19 @@ READ8_MEMBER(calomega_state::s903_mux_port_r)
case 0x80: return ioport("IN0-3")->read();
}
- return machine().root_device().ioport("FRQ")->read(); /* bit7 used for 50/60 Hz selector */
+ return machine().root_device().ioport("FRQ")->read(); /* bit7 used for 50/60 Hz selector */
}
WRITE8_MEMBER(calomega_state::s903_mux_w)
{
- m_s903_mux_data = data ^ 0xff; /* inverted */
+ m_s903_mux_data = data ^ 0xff; /* inverted */
}
READ8_MEMBER(calomega_state::s905_mux_port_r)
{
- switch( m_s905_mux_data & 0x0f ) /* bits 0-3 */
+ switch( m_s905_mux_data & 0x0f ) /* bits 0-3 */
{
case 0x01: return ioport("IN0-0")->read();
case 0x02: return ioport("IN0-1")->read();
@@ -699,12 +699,12 @@ READ8_MEMBER(calomega_state::s905_mux_port_r)
case 0x08: return ioport("IN0-3")->read();
}
- return machine().root_device().ioport("FRQ")->read(); /* bit6 used for 50/60 Hz selector */
+ return machine().root_device().ioport("FRQ")->read(); /* bit6 used for 50/60 Hz selector */
}
WRITE8_MEMBER(calomega_state::s905_mux_w)
{
- m_s905_mux_data = data ^ 0xff; /* inverted */
+ m_s905_mux_data = data ^ 0xff; /* inverted */
}
@@ -798,33 +798,33 @@ WRITE8_MEMBER(calomega_state::ay_bout_w)
WRITE8_MEMBER(calomega_state::lamps_903a_w)
{
/* First 5 bits of PIA0 port B */
- output_set_lamp_value(1, 1-((data) & 1)); /* L1 (Hold 1) */
- output_set_lamp_value(2, 1-((data >> 1) & 1)); /* L2 (Hold 2) */
- output_set_lamp_value(3, 1-((data >> 2) & 1)); /* L3 (Hold 3) */
- output_set_lamp_value(4, 1-((data >> 3) & 1)); /* L4 (Hold 4) */
- output_set_lamp_value(5, 1-((data >> 4) & 1)); /* L5 (Hold 5) */
+ output_set_lamp_value(1, 1-((data) & 1)); /* L1 (Hold 1) */
+ output_set_lamp_value(2, 1-((data >> 1) & 1)); /* L2 (Hold 2) */
+ output_set_lamp_value(3, 1-((data >> 2) & 1)); /* L3 (Hold 3) */
+ output_set_lamp_value(4, 1-((data >> 3) & 1)); /* L4 (Hold 4) */
+ output_set_lamp_value(5, 1-((data >> 4) & 1)); /* L5 (Hold 5) */
}
WRITE8_MEMBER(calomega_state::lamps_903b_w)
{
/* First 4 bits of PIA1 port A */
- output_set_lamp_value(6, 1-((data) & 1)); /* L6 (Cancel) */
- output_set_lamp_value(7, 1-((data >> 1) & 1)); /* L7 (Bet) */
- output_set_lamp_value(8, 1-((data >> 2) & 1)); /* L8 (Take) */
- output_set_lamp_value(9, 1-((data >> 3) & 1)); /* L9 (Door?) */
+ output_set_lamp_value(6, 1-((data) & 1)); /* L6 (Cancel) */
+ output_set_lamp_value(7, 1-((data >> 1) & 1)); /* L7 (Bet) */
+ output_set_lamp_value(8, 1-((data >> 2) & 1)); /* L8 (Take) */
+ output_set_lamp_value(9, 1-((data >> 3) & 1)); /* L9 (Door?) */
}
WRITE8_MEMBER(calomega_state::lamps_905_w)
{
/* Whole 8 bits of PIA0 port B */
- output_set_lamp_value(1, 1-((data) & 1)); /* L1 (Hold 1) */
- output_set_lamp_value(2, 1-((data >> 1) & 1)); /* L2 (Hold 2) */
- output_set_lamp_value(3, 1-((data >> 2) & 1)); /* L3 (Hold 3) */
- output_set_lamp_value(4, 1-((data >> 3) & 1)); /* L4 (Hold 4) */
- output_set_lamp_value(5, 1-((data >> 4) & 1)); /* L5 (Hold 5) */
- output_set_lamp_value(6, 1-((data >> 5) & 1)); /* L6 (unknown) */
- output_set_lamp_value(7, 1-((data >> 6) & 1)); /* L7 (unknown) */
- output_set_lamp_value(8, 1-((data >> 7) & 1)); /* L8 (unknown) */
+ output_set_lamp_value(1, 1-((data) & 1)); /* L1 (Hold 1) */
+ output_set_lamp_value(2, 1-((data >> 1) & 1)); /* L2 (Hold 2) */
+ output_set_lamp_value(3, 1-((data >> 2) & 1)); /* L3 (Hold 3) */
+ output_set_lamp_value(4, 1-((data >> 3) & 1)); /* L4 (Hold 4) */
+ output_set_lamp_value(5, 1-((data >> 4) & 1)); /* L5 (Hold 5) */
+ output_set_lamp_value(6, 1-((data >> 5) & 1)); /* L6 (unknown) */
+ output_set_lamp_value(7, 1-((data >> 6) & 1)); /* L7 (unknown) */
+ output_set_lamp_value(8, 1-((data >> 7) & 1)); /* L8 (unknown) */
}
@@ -898,7 +898,7 @@ static INPUT_PORTS_START( stand903 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("0-4") PORT_CODE(KEYCODE_4)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("0-5") PORT_CODE(KEYCODE_5)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("0-6") PORT_CODE(KEYCODE_6)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
@@ -908,7 +908,7 @@ static INPUT_PORTS_START( stand903 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1-4") PORT_CODE(KEYCODE_R)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1-5") PORT_CODE(KEYCODE_T)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1-6") PORT_CODE(KEYCODE_Y)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-2")
@@ -918,7 +918,7 @@ static INPUT_PORTS_START( stand903 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2-4") PORT_CODE(KEYCODE_F)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2-5") PORT_CODE(KEYCODE_G)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2-6") PORT_CODE(KEYCODE_H)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-3")
@@ -928,73 +928,73 @@ static INPUT_PORTS_START( stand903 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("3-4") PORT_CODE(KEYCODE_V)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("3-5") PORT_CODE(KEYCODE_B)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("3-6") PORT_CODE(KEYCODE_N)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
/* SW1-5 should be wired to PIA0 portA, bit 6.
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1016,7 +1016,7 @@ static INPUT_PORTS_START( stand903 )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
@@ -1030,7 +1030,7 @@ static INPUT_PORTS_START( stand904 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("0-4") PORT_CODE(KEYCODE_4)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("0-5") PORT_CODE(KEYCODE_5)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("0-6") PORT_CODE(KEYCODE_6)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
@@ -1040,7 +1040,7 @@ static INPUT_PORTS_START( stand904 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1-4") PORT_CODE(KEYCODE_R)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1-5") PORT_CODE(KEYCODE_T)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("1-6") PORT_CODE(KEYCODE_Y)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-2")
@@ -1050,7 +1050,7 @@ static INPUT_PORTS_START( stand904 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2-4") PORT_CODE(KEYCODE_F)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2-5") PORT_CODE(KEYCODE_G)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("2-6") PORT_CODE(KEYCODE_H)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-3")
@@ -1060,47 +1060,47 @@ static INPUT_PORTS_START( stand904 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("3-4") PORT_CODE(KEYCODE_V)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("3-5") PORT_CODE(KEYCODE_B)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("3-6") PORT_CODE(KEYCODE_N)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
/* SW1-5 should be wired to PIA0 portA, bit 6.
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1122,7 +1122,7 @@ static INPUT_PORTS_START( stand904 )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
@@ -1171,33 +1171,33 @@ static INPUT_PORTS_START( stand905 )
/* For System 905, SW1 uses the whole PIA1 portA */
- PORT_START("SW1") /* settings (PIA1) */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_START("SW1") /* settings (PIA1) */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1216,7 +1216,7 @@ static INPUT_PORTS_START( stand905 )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x40, 0x40, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x40, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
@@ -1226,23 +1226,23 @@ INPUT_PORTS_END
static INPUT_PORTS_START( gdrwpkrd )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancel Discards")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_STAND )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Door Open")
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") /* in some games you need to open the door first */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") /* in some games you need to open the door first */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hand Pay") PORT_CODE(KEYCODE_W)
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Dispute") PORT_CODE(KEYCODE_0) /* in some games you need to open the door first */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Dispute") PORT_CODE(KEYCODE_0) /* in some games you need to open the door first */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-2")
@@ -1252,7 +1252,7 @@ static INPUT_PORTS_START( gdrwpkrd )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Discard 4")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Discard 5")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small")
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-3")
@@ -1262,71 +1262,71 @@ static INPUT_PORTS_START( gdrwpkrd )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("WT.Switch") PORT_CODE(KEYCODE_8)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
/* SW1-5 should be wired to PIA0 portA, bit 6.
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
- PORT_DIPNAME( 0x30, 0x20, "Maximum Credits") PORT_DIPLOCATION("SW2:1,2")
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_DIPNAME( 0x30, 0x20, "Maximum Credits") PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x00, "100" )
PORT_DIPSETTING( 0x10, "400" )
PORT_DIPSETTING( 0x20, "800" )
PORT_DIPSETTING( 0x30, "1600" )
- PORT_DIPNAME( 0xC0, 0x40, "Maximum Bet") PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0xC0, 0x40, "Maximum Bet") PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x00, "5" )
PORT_DIPSETTING( 0x40, "10" )
PORT_DIPSETTING( 0x80, "40" )
PORT_DIPSETTING( 0xC0, "80" )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1348,30 +1348,30 @@ static INPUT_PORTS_START( gdrwpkrd )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( gdrwpkrh )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_CANCEL ) PORT_NAME("Cancel Holds")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_STAND )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Door Open")
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") /* in some games you need to open the door first */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") /* in some games you need to open the door first */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hand Pay") PORT_CODE(KEYCODE_W)
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Dispute") PORT_CODE(KEYCODE_0) /* in some games you need to open the door first */
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Dispute") PORT_CODE(KEYCODE_0) /* in some games you need to open the door first */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-2")
@@ -1381,7 +1381,7 @@ static INPUT_PORTS_START( gdrwpkrh )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small")
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-3")
@@ -1391,71 +1391,71 @@ static INPUT_PORTS_START( gdrwpkrh )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big")
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("WT.Switch") PORT_CODE(KEYCODE_8)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
/* SW1-5 should be wired to PIA0 portA, bit 6.
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
- PORT_DIPNAME( 0x30, 0x20, "Maximum Credits") PORT_DIPLOCATION("SW2:1,2")
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_DIPNAME( 0x30, 0x20, "Maximum Credits") PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x00, "100" )
PORT_DIPSETTING( 0x10, "400" )
PORT_DIPSETTING( 0x20, "800" )
PORT_DIPSETTING( 0x30, "1600" )
- PORT_DIPNAME( 0xC0, 0x40, "Maximum Bet") PORT_DIPLOCATION("SW2:3,4")
+ PORT_DIPNAME( 0xC0, 0x40, "Maximum Bet") PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x00, "5" )
PORT_DIPSETTING( 0x40, "10" )
PORT_DIPSETTING( 0x80, "40" )
PORT_DIPSETTING( 0xC0, "80" )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1477,30 +1477,30 @@ static INPUT_PORTS_START( gdrwpkrh )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( arcadebj )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Door Open") PORT_CODE(KEYCODE_O)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-2")
@@ -1510,7 +1510,7 @@ static INPUT_PORTS_START( arcadebj )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Hit") PORT_CODE(KEYCODE_V)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Stand") PORT_CODE(KEYCODE_B)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-3")
@@ -1520,73 +1520,73 @@ static INPUT_PORTS_START( arcadebj )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) /* connected to SW2-5 */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
/* SW1-5 should be wired to PIA0 portA, bit 6.
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1608,14 +1608,14 @@ static INPUT_PORTS_START( arcadebj )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( comg074 )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Collect") PORT_CODE(KEYCODE_Q)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
@@ -1628,7 +1628,7 @@ static INPUT_PORTS_START( comg074 )
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hand Pay") PORT_CODE(KEYCODE_W)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("IN0-1-2")
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) PORT_NAME("Door Open")
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") /* in some games you need to open the door first */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") /* in some games you need to open the door first */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("IN0-1-5")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN0-1-6")
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
@@ -1658,11 +1658,11 @@ static INPUT_PORTS_START( comg074 )
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1675,48 +1675,48 @@ static INPUT_PORTS_START( comg074 )
PORT_DIPSETTING( 0x80, "40" )
PORT_DIPSETTING( 0xC0, "80" )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1738,14 +1738,14 @@ static INPUT_PORTS_START( comg074 )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( comg076 )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
@@ -1755,7 +1755,7 @@ static INPUT_PORTS_START( comg076 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1788,11 +1788,11 @@ static INPUT_PORTS_START( comg076 )
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
PORT_DIPNAME( 0x30, 0x00, "Minimum Winning Hand")
PORT_DIPSETTING( 0x00, "Jacks or Better" )
PORT_DIPSETTING( 0x20, "Queens or Better" )
@@ -1804,48 +1804,48 @@ static INPUT_PORTS_START( comg076 )
PORT_DIPSETTING( 0xC0, "20" )
PORT_DIPSETTING( 0x40, "50" )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1867,14 +1867,14 @@ static INPUT_PORTS_START( comg076 )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( comg128 )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
@@ -1917,11 +1917,11 @@ static INPUT_PORTS_START( comg128 )
SW1-6 should be wired to H-POL.
SW1-7 should be wired to V-POL.
*/
- PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
+ PORT_START("SW1") /* settings (PIA1), SW2 in schematics */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L6 */
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L7 */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L8 */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* L9 */
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1934,48 +1934,48 @@ static INPUT_PORTS_START( comg128 )
PORT_DIPSETTING( 0x80, "4" )
PORT_DIPSETTING( 0xC0, "5" )
- PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
- PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
+ PORT_START("SW2") /* baud (serial 6850-4024), SW1 in schematics */
+ PORT_DIPNAME( 0x3f, 0x08, "Baud Rate" ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6")
PORT_DIPSETTING( 0x01, "300" )
PORT_DIPSETTING( 0x02, "600" )
PORT_DIPSETTING( 0x04, "1200" )
PORT_DIPSETTING( 0x08, "2400" )
PORT_DIPSETTING( 0x10, "4800" )
PORT_DIPSETTING( 0x20, "9600" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
+ PORT_START("SW3") /* unknown (ay8912), SW3 in schematics */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -1997,14 +1997,14 @@ static INPUT_PORTS_START( comg128 )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( elgrande )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
@@ -2014,7 +2014,7 @@ static INPUT_PORTS_START( elgrande )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -2067,7 +2067,7 @@ static INPUT_PORTS_START( elgrande )
PORT_DIPSETTING( 0x80, "20" )
PORT_DIPSETTING( 0xC0, "50" )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -2089,14 +2089,14 @@ static INPUT_PORTS_START( elgrande )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( jjpoker )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
@@ -2106,7 +2106,7 @@ static INPUT_PORTS_START( jjpoker )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -2159,7 +2159,7 @@ static INPUT_PORTS_START( jjpoker )
PORT_DIPSETTING( 0x80, "20" )
PORT_DIPSETTING( 0xC0, "50" )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -2181,14 +2181,14 @@ static INPUT_PORTS_START( jjpoker )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
static INPUT_PORTS_START( ssipkr )
PORT_START("IN0-0")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) PORT_NAME("Deal / Draw")
@@ -2198,7 +2198,7 @@ static INPUT_PORTS_START( ssipkr )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("IN0-1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* credits */
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("Service")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -2251,7 +2251,7 @@ static INPUT_PORTS_START( ssipkr )
PORT_DIPSETTING( 0x80, "20" )
PORT_DIPSETTING( 0xc0, "50" )
- PORT_START("FRQ") /* settings (PIA0) */
+ PORT_START("FRQ") /* settings (PIA0) */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -2273,7 +2273,7 @@ static INPUT_PORTS_START( ssipkr )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
+ PORT_DIPNAME( 0x80, 0x80, "Frequency" ) PORT_DIPLOCATION("FRQ:1")
PORT_DIPSETTING( 0x80, "60Hz." )
PORT_DIPSETTING( 0x00, "50Hz." )
INPUT_PORTS_END
@@ -2290,29 +2290,29 @@ static INPUT_PORTS_START( stand906 )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-7") PORT_CODE(KEYCODE_7)
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_NAME("0-8") PORT_CODE(KEYCODE_8)
- PORT_START("SW2") /* Tied to AY8912 port. Covered with tape except SW2-8 */
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
+ PORT_START("SW2") /* Tied to AY8912 port. Covered with tape except SW2-8 */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -2412,18 +2412,18 @@ GFXDECODE_END
*/
static const pia6821_interface sys903_pia0_intf =
{
- DEVCB_DRIVER_MEMBER(calomega_state,s903_mux_port_r), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_DRIVER_MEMBER(calomega_state,lamps_903a_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_DRIVER_MEMBER(calomega_state,s903_mux_port_r), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_DRIVER_MEMBER(calomega_state,lamps_903a_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
/********** Systems 903/904 PIA-1 (U39) wiring **********
@@ -2474,18 +2474,18 @@ static const pia6821_interface sys903_pia0_intf =
*/
static const pia6821_interface sys903_pia1_intf =
{
- DEVCB_INPUT_PORT("SW1"), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DRIVER_MEMBER(calomega_state,lamps_903b_w), /* port A out */
- DEVCB_DRIVER_MEMBER(calomega_state,s903_mux_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_INPUT_PORT("SW1"), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DRIVER_MEMBER(calomega_state,lamps_903b_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(calomega_state,s903_mux_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
/********** System 905 PIA-0 (U48) wiring **********
@@ -2536,18 +2536,18 @@ static const pia6821_interface sys903_pia1_intf =
*/
static const pia6821_interface sys905_pia0_intf =
{
- DEVCB_DRIVER_MEMBER(calomega_state,s905_mux_port_r), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_DRIVER_MEMBER(calomega_state,lamps_905_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_DRIVER_MEMBER(calomega_state,s905_mux_port_r), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_DRIVER_MEMBER(calomega_state,lamps_905_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
/********** Systems 905 PIA-1 (U63) wiring **********
@@ -2598,53 +2598,53 @@ static const pia6821_interface sys905_pia0_intf =
*/
static const pia6821_interface sys905_pia1_intf =
{
- DEVCB_INPUT_PORT("SW1"), /* port A in */
- DEVCB_NULL, /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_DRIVER_MEMBER(calomega_state,s905_mux_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_INPUT_PORT("SW1"), /* port A in */
+ DEVCB_NULL, /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_DRIVER_MEMBER(calomega_state,s905_mux_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
/********** System 906 PIA-0 **********/
static const pia6821_interface sys906_pia0_intf =
{
- DEVCB_DRIVER_MEMBER(calomega_state,pia0_ain_r), /* port A in */ /* Valid input port. Each polled value is stored at $0538 */
- DEVCB_DRIVER_MEMBER(calomega_state,pia0_bin_r), /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DRIVER_MEMBER(calomega_state,pia0_aout_w), /* port A out */
- DEVCB_DRIVER_MEMBER(calomega_state,pia0_bout_w), /* port B out */
- DEVCB_DRIVER_MEMBER(calomega_state,pia0_ca2_w), /* line CA2 out */ /* Seems a kind of "heartbit" watchdog, switching 1's and 0's */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia0_ain_r), /* port A in */ /* Valid input port. Each polled value is stored at $0538 */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia0_bin_r), /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia0_aout_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia0_bout_w), /* port B out */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia0_ca2_w), /* line CA2 out */ /* Seems a kind of "heartbit" watchdog, switching 1's and 0's */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
/********** System 906 PIA-1 **********/
static const pia6821_interface sys906_pia1_intf =
{
- DEVCB_DRIVER_MEMBER(calomega_state,pia1_ain_r), /* port A in */
- DEVCB_DRIVER_MEMBER(calomega_state,pia1_bin_r), /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_DRIVER_MEMBER(calomega_state,pia1_aout_w), /* port A out */
- DEVCB_DRIVER_MEMBER(calomega_state,pia1_bout_w), /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia1_ain_r), /* port A in */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia1_bin_r), /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia1_aout_w), /* port A out */
+ DEVCB_DRIVER_MEMBER(calomega_state,pia1_bout_w), /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
@@ -2683,7 +2683,7 @@ static const ay8910_interface sys903_ay8912_intf =
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
- DEVCB_INPUT_PORT("SW3"), /* from schematics */
+ DEVCB_INPUT_PORT("SW3"), /* from schematics */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL
@@ -2703,7 +2703,7 @@ static const ay8910_interface sys906_ay8912_intf =
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
- DEVCB_INPUT_PORT("SW2"), /* From PCB pic. Value is stored at $0539 */
+ DEVCB_INPUT_PORT("SW2"), /* From PCB pic. Value is stored at $0539 */
DEVCB_NULL,
DEVCB_DRIVER_MEMBER(calomega_state,ay_aout_w),
DEVCB_DRIVER_MEMBER(calomega_state,ay_bout_w)
@@ -2716,16 +2716,16 @@ static const ay8910_interface sys906_ay8912_intf =
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
@@ -2735,7 +2735,7 @@ static const mc6845_interface mc6845_intf =
static MACHINE_CONFIG_START( sys903, calomega_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6502, CPU_CLOCK) /* confirmed */
+ MCFG_CPU_ADD("maincpu", M6502, CPU_CLOCK) /* confirmed */
MCFG_CPU_PROGRAM_MAP(sys903_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", calomega_state, irq0_line_hold)
@@ -2756,11 +2756,11 @@ static MACHINE_CONFIG_START( sys903, calomega_state )
MCFG_PALETTE_LENGTH(1024)
- MCFG_MC6845_ADD("crtc", MC6845, CPU_CLOCK, mc6845_intf) /* 6845 @ CPU clock */
+ MCFG_MC6845_ADD("crtc", MC6845, CPU_CLOCK, mc6845_intf) /* 6845 @ CPU clock */
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay8912", AY8912, SND_CLOCK) /* confirmed */
+ MCFG_SOUND_ADD("ay8912", AY8912, SND_CLOCK) /* confirmed */
MCFG_SOUND_CONFIG(sys903_ay8912_intf)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
@@ -2806,7 +2806,7 @@ static MACHINE_CONFIG_DERIVED( sys906, sys903 )
/* basic machine hardware */
- MCFG_CPU_REPLACE("maincpu", M65C02, CPU_CLOCK) /* guess */
+ MCFG_CPU_REPLACE("maincpu", M65C02, CPU_CLOCK) /* guess */
MCFG_CPU_PROGRAM_MAP(sys906_map)
MCFG_PIA6821_MODIFY("pia0", sys906_pia0_intf)
@@ -2833,678 +2833,678 @@ MACHINE_CONFIG_END
*
*************************************************/
-ROM_START( comg074 ) /* Cal Omega v7.4 (Gaming Poker) */
+ROM_START( comg074 ) /* Cal Omega v7.4 (Gaming Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "1800.u5", 0x1800, 0x0800, CRC(69759432) SHA1(d64646476b4f67088bf5996ffc272d2571e62c53) ) /* Seems to be from v6.5. Unused. */
- ROM_LOAD( "2000.u6", 0x2000, 0x0800, CRC(bd9044f6) SHA1(9ebfc8379fe79a84982a0176a6b26267580272de) )
- ROM_LOAD( "2800.u7", 0x2800, 0x0800, CRC(d1d2e111) SHA1(2e5b6fbaf04539851d0f0674f0fd86e9be90c0fd) )
- ROM_LOAD( "3000.u8", 0x3000, 0x0800, CRC(cac4af01) SHA1(aed2986575b8d5539581515d818cb5bb9054c7c9) )
- ROM_LOAD( "3800.u9", 0x3800, 0x0800, CRC(6d32c533) SHA1(286cd511dc42e4e98c0e5fee2c7b265a4db949cf) )
+ ROM_LOAD( "1800.u5", 0x1800, 0x0800, CRC(69759432) SHA1(d64646476b4f67088bf5996ffc272d2571e62c53) ) /* Seems to be from v6.5. Unused. */
+ ROM_LOAD( "2000.u6", 0x2000, 0x0800, CRC(bd9044f6) SHA1(9ebfc8379fe79a84982a0176a6b26267580272de) )
+ ROM_LOAD( "2800.u7", 0x2800, 0x0800, CRC(d1d2e111) SHA1(2e5b6fbaf04539851d0f0674f0fd86e9be90c0fd) )
+ ROM_LOAD( "3000.u8", 0x3000, 0x0800, CRC(cac4af01) SHA1(aed2986575b8d5539581515d818cb5bb9054c7c9) )
+ ROM_LOAD( "3800.u9", 0x3800, 0x0800, CRC(6d32c533) SHA1(286cd511dc42e4e98c0e5fee2c7b265a4db949cf) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "poker_cg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "poker_cg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "poker_cg2c.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "poker_cg2b.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "poker_cg2a.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
-
- ROM_REGION( 0x400, "proms", 0 ) /* from other set */
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, BAD_DUMP CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "poker_cg2c.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "poker_cg2b.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "poker_cg2a.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+
+ ROM_REGION( 0x400, "proms", 0 ) /* from other set */
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, BAD_DUMP CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg076 ) /* Cal Omega v7.6 (Arcade Poker) */
+ROM_START( comg076 ) /* Cal Omega v7.6 (Arcade Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "07-62.u6", 0x2000, 0x0800, CRC(99ffa2a4) SHA1(07fd182ff86f9ab09bbf09f51d655811a09ffa03) )
- ROM_LOAD( "07-63.u7", 0x2800, 0x0800, CRC(9ed58bc5) SHA1(c545053847ec7585e4ac97c70cf33529ed0f1111) )
- ROM_LOAD( "07-64.u8", 0x3000, 0x0800, CRC(95714680) SHA1(26938903600bd0920b1dd1c6900c56c6b749976a) )
- ROM_LOAD( "07-65.u9", 0x3800, 0x0800, CRC(02be8b39) SHA1(bb056e6e0ebd5f81c61fa7aa8252330088b3088e) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "07-62.u6", 0x2000, 0x0800, CRC(99ffa2a4) SHA1(07fd182ff86f9ab09bbf09f51d655811a09ffa03) )
+ ROM_LOAD( "07-63.u7", 0x2800, 0x0800, CRC(9ed58bc5) SHA1(c545053847ec7585e4ac97c70cf33529ed0f1111) )
+ ROM_LOAD( "07-64.u8", 0x3000, 0x0800, CRC(95714680) SHA1(26938903600bd0920b1dd1c6900c56c6b749976a) )
+ ROM_LOAD( "07-65.u9", 0x3800, 0x0800, CRC(02be8b39) SHA1(bb056e6e0ebd5f81c61fa7aa8252330088b3088e) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg079 ) /* Cal Omega v7.9 (Arcade Poker) */
+ROM_START( comg079 ) /* Cal Omega v7.9 (Arcade Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "07-91.u5", 0x1800, 0x0800, CRC(da415c27) SHA1(be42f1d36579ff8fafd6df4e30a64a6141a7a2ae) )
- ROM_LOAD( "07-92.u6", 0x2000, 0x0800, CRC(31211ed3) SHA1(799bc4ca77ee01a4d45320263e4cc2d066ec26e5) )
+ ROM_LOAD( "07-91.u5", 0x1800, 0x0800, CRC(da415c27) SHA1(be42f1d36579ff8fafd6df4e30a64a6141a7a2ae) )
+ ROM_LOAD( "07-92.u6", 0x2000, 0x0800, CRC(31211ed3) SHA1(799bc4ca77ee01a4d45320263e4cc2d066ec26e5) )
- /* code jumps to $2e64 where there's an inexistent mnemonic 0x32! (kill).
- also writes to $axxx (inexistent) and $08fx-$09xx (supposed to be $0880-$0881).
- */
- ROM_LOAD( "07-93.u7", 0x2800, 0x0800, BAD_DUMP CRC(52c84b9c) SHA1(569d6384b9084a11fe84e291f1c165bc0df3ab49) )
- ROM_LOAD( "07-94.u8", 0x3000, 0x0800, CRC(ed0e7d4a) SHA1(72f512ca2da573e4571ca6f164fb055daa26dd3c) )
- ROM_LOAD( "07-95.u9", 0x3800, 0x0800, CRC(3acc8f49) SHA1(1a193cc292f79da869caddd11478d6ad55466d7b) )
+ /* code jumps to $2e64 where there's an inexistent mnemonic 0x32! (kill).
+ also writes to $axxx (inexistent) and $08fx-$09xx (supposed to be $0880-$0881).
+ */
+ ROM_LOAD( "07-93.u7", 0x2800, 0x0800, BAD_DUMP CRC(52c84b9c) SHA1(569d6384b9084a11fe84e291f1c165bc0df3ab49) )
+ ROM_LOAD( "07-94.u8", 0x3000, 0x0800, CRC(ed0e7d4a) SHA1(72f512ca2da573e4571ca6f164fb055daa26dd3c) )
+ ROM_LOAD( "07-95.u9", 0x3800, 0x0800, CRC(3acc8f49) SHA1(1a193cc292f79da869caddd11478d6ad55466d7b) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg080 ) /* Cal Omega v8.0 (Arcade Black Jack) */
+ROM_START( comg080 ) /* Cal Omega v8.0 (Arcade Black Jack) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "08-02.u6", 0x2000, 0x0800, CRC(abf8c48e) SHA1(fea059af900fd6d17725ccf7a5ff2eb0af5c8e0a) )
- ROM_LOAD( "08-03.u7", 0x2800, 0x0800, CRC(e9ccb5af) SHA1(68a45d839afba3c6eafb7c75e5660de3a6be4eb5) )
- ROM_LOAD( "08-04.u8", 0x3000, 0x0800, CRC(325bdae8) SHA1(5a94c96ec3980361570da58fb407a1dba38064b8) )
- ROM_LOAD( "08-05.u9", 0x3800, 0x0800, BAD_DUMP CRC(71bd14d2) SHA1(00b3e2d965ac7ae1fc994b81246ad2c29ef4834c) ) /* bad dump. 2nd half is blank */
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "08-02.u6", 0x2000, 0x0800, CRC(abf8c48e) SHA1(fea059af900fd6d17725ccf7a5ff2eb0af5c8e0a) )
+ ROM_LOAD( "08-03.u7", 0x2800, 0x0800, CRC(e9ccb5af) SHA1(68a45d839afba3c6eafb7c75e5660de3a6be4eb5) )
+ ROM_LOAD( "08-04.u8", 0x3000, 0x0800, CRC(325bdae8) SHA1(5a94c96ec3980361570da58fb407a1dba38064b8) )
+ ROM_LOAD( "08-05.u9", 0x3800, 0x0800, BAD_DUMP CRC(71bd14d2) SHA1(00b3e2d965ac7ae1fc994b81246ad2c29ef4834c) ) /* bad dump. 2nd half is blank */
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "gpkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "gpkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "gpkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "gpkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "gpkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "gpkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "gpkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "gpkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg094 ) /* Cal Omega v9.4 (Keno) */
+ROM_START( comg094 ) /* Cal Omega v9.4 (Keno) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "09-42.u6", 0x2000, 0x0800, CRC(1cff1319) SHA1(97b7ed54d398f36dc476028471784fc4e50bc378) )
- ROM_LOAD( "09-43.u7", 0x2800, 0x0800, CRC(e6b123be) SHA1(f89df2dc6deeecff41be83d7a9040cfe5d872bad) )
- ROM_LOAD( "09-44.u8", 0x3000, 0x0800, CRC(13939de9) SHA1(b2f97828808f6001846049cbf9af40e32908a58f) )
- ROM_LOAD( "09-45.u9", 0x3800, 0x0800, CRC(7508de2e) SHA1(62faf65a1b815e11158cfb807090923ab368784d) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "09-42.u6", 0x2000, 0x0800, CRC(1cff1319) SHA1(97b7ed54d398f36dc476028471784fc4e50bc378) )
+ ROM_LOAD( "09-43.u7", 0x2800, 0x0800, CRC(e6b123be) SHA1(f89df2dc6deeecff41be83d7a9040cfe5d872bad) )
+ ROM_LOAD( "09-44.u8", 0x3000, 0x0800, CRC(13939de9) SHA1(b2f97828808f6001846049cbf9af40e32908a58f) )
+ ROM_LOAD( "09-45.u9", 0x3800, 0x0800, CRC(7508de2e) SHA1(62faf65a1b815e11158cfb807090923ab368784d) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
- ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
- ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
+ ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
+ ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
+ ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg107 ) /* Cal Omega v10.7c (Big Game) */
+ROM_START( comg107 ) /* Cal Omega v10.7c (Big Game) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "10-72.u6", 0x2000, 0x0800, CRC(dd0fbefb) SHA1(caed286ba1adb4d5c5c874c56339b9d71dd41bc6) )
- ROM_LOAD( "10-73.u7", 0x2800, 0x0800, CRC(fcb7774d) SHA1(d3c89e0df0005e4bc4894156622b3d1e4cd09f2a) )
- ROM_LOAD( "10-74.u8", 0x3000, 0x0800, CRC(d19ed885) SHA1(c41e59e87ce88a5b229e334b6a563a3b21d12b15) )
- ROM_LOAD( "10-75.u9", 0x3800, 0x0800, CRC(1491f3ab) SHA1(cf545f5f5da910b98846699bff1d2e6eb40dc290) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "10-72.u6", 0x2000, 0x0800, CRC(dd0fbefb) SHA1(caed286ba1adb4d5c5c874c56339b9d71dd41bc6) )
+ ROM_LOAD( "10-73.u7", 0x2800, 0x0800, CRC(fcb7774d) SHA1(d3c89e0df0005e4bc4894156622b3d1e4cd09f2a) )
+ ROM_LOAD( "10-74.u8", 0x3000, 0x0800, CRC(d19ed885) SHA1(c41e59e87ce88a5b229e334b6a563a3b21d12b15) )
+ ROM_LOAD( "10-75.u9", 0x3800, 0x0800, CRC(1491f3ab) SHA1(cf545f5f5da910b98846699bff1d2e6eb40dc290) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "lotcg0.u67", 0x0000, 0x1000, CRC(6f7cffee) SHA1(ababeb49155c84b22c4bb3568cfb5f05ff1cd797) )
+ ROM_LOAD( "lotcg0.u67", 0x0000, 0x1000, CRC(6f7cffee) SHA1(ababeb49155c84b22c4bb3568cfb5f05ff1cd797) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "lotcgc.u70", 0x0000, 0x1000, CRC(bfe4df1c) SHA1(f7e055d41e16ead6b18d755e664347645f94865a) )
- ROM_LOAD( "lotcgb.u69", 0x1000, 0x1000, CRC(5bda0f42) SHA1(d4b3340e9c8ca49483fa846103f0bd81d57a5ab3) )
- ROM_LOAD( "lotcga.u68", 0x2000, 0x1000, CRC(0975e360) SHA1(7b9dbbae50c43ad99ee11798ada0a44e71c611f9) )
+ ROM_LOAD( "lotcgc.u70", 0x0000, 0x1000, CRC(bfe4df1c) SHA1(f7e055d41e16ead6b18d755e664347645f94865a) )
+ ROM_LOAD( "lotcgb.u69", 0x1000, 0x1000, CRC(5bda0f42) SHA1(d4b3340e9c8ca49483fa846103f0bd81d57a5ab3) )
+ ROM_LOAD( "lotcga.u68", 0x2000, 0x1000, CRC(0975e360) SHA1(7b9dbbae50c43ad99ee11798ada0a44e71c611f9) )
- ROM_REGION( 0x0800, "user1", 0 ) /* keyboard interfase ROM */
- ROM_LOAD( "lotkbd.sub", 0x0000, 0x0800, CRC(c1636ab5) SHA1(5a3ad24918751ca6a6640807e421e80f6b4cc844) )
+ ROM_REGION( 0x0800, "user1", 0 ) /* keyboard interfase ROM */
+ ROM_LOAD( "lotkbd.sub", 0x0000, 0x0800, CRC(c1636ab5) SHA1(5a3ad24918751ca6a6640807e421e80f6b4cc844) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg123 ) /* Cal Omega v12.3 (Ticket Poker) */
+ROM_START( comg123 ) /* Cal Omega v12.3 (Ticket Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "12-31.u5", 0x1800, 0x0800, BAD_DUMP CRC(8a1e9b03) SHA1(d57548226a695eb43d491dd953ad0b9b8ff8eb82) )
- ROM_LOAD( "12-32.u6", 0x2000, 0x0800, CRC(c30eb9c4) SHA1(bf3c2e069ecb9763028738c29054802b605cfa92) )
- ROM_LOAD( "12-33.u7", 0x2800, 0x0800, CRC(31472f2a) SHA1(5b82ef32f1bde44a0d83629fb3ce092c3b96c7d4) )
- ROM_LOAD( "12-34.u8", 0x3000, 0x0800, CRC(15a29f3f) SHA1(cfc31240ba01641d78c114ff40ab4536183cd829) )
- ROM_LOAD( "12-35.u9", 0x3800, 0x0800, BAD_DUMP CRC(f1e8ba9e) SHA1(605db3fdbaff4ba13729371ad0c4fbab3889378e) )
+ ROM_LOAD( "12-31.u5", 0x1800, 0x0800, BAD_DUMP CRC(8a1e9b03) SHA1(d57548226a695eb43d491dd953ad0b9b8ff8eb82) )
+ ROM_LOAD( "12-32.u6", 0x2000, 0x0800, CRC(c30eb9c4) SHA1(bf3c2e069ecb9763028738c29054802b605cfa92) )
+ ROM_LOAD( "12-33.u7", 0x2800, 0x0800, CRC(31472f2a) SHA1(5b82ef32f1bde44a0d83629fb3ce092c3b96c7d4) )
+ ROM_LOAD( "12-34.u8", 0x3000, 0x0800, CRC(15a29f3f) SHA1(cfc31240ba01641d78c114ff40ab4536183cd829) )
+ ROM_LOAD( "12-35.u9", 0x3800, 0x0800, BAD_DUMP CRC(f1e8ba9e) SHA1(605db3fdbaff4ba13729371ad0c4fbab3889378e) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg125 ) /* Cal Omega v12.5 (Bingo) */
+ROM_START( comg125 ) /* Cal Omega v12.5 (Bingo) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "12-52.u6", 0x2000, 0x0800, CRC(ea0a6bd6) SHA1(f138d2f29252d95dea93a1e936725de99c714b35) )
- ROM_LOAD( "12-53.u7", 0x2800, 0x0800, CRC(c888ee34) SHA1(2796c6ae196b046f12b75b1c095a430fa4be0da2) )
- ROM_LOAD( "12-54.u8", 0x3000, 0x0800, CRC(4c7d11a6) SHA1(0131f077e204250d594c9baadc0596efeb7639cc) )
- ROM_LOAD( "12-55.u9", 0x3800, 0x0800, CRC(fabe1de0) SHA1(a39583d410707930fbe32341c30bb1b8a28a8d73) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "12-52.u6", 0x2000, 0x0800, CRC(ea0a6bd6) SHA1(f138d2f29252d95dea93a1e936725de99c714b35) )
+ ROM_LOAD( "12-53.u7", 0x2800, 0x0800, CRC(c888ee34) SHA1(2796c6ae196b046f12b75b1c095a430fa4be0da2) )
+ ROM_LOAD( "12-54.u8", 0x3000, 0x0800, CRC(4c7d11a6) SHA1(0131f077e204250d594c9baadc0596efeb7639cc) )
+ ROM_LOAD( "12-55.u9", 0x3800, 0x0800, CRC(fabe1de0) SHA1(a39583d410707930fbe32341c30bb1b8a28a8d73) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
+ ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
- ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
- ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
+ ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
+ ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
+ ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg127 ) /* Cal Omega v12.7 (Keno) */
+ROM_START( comg127 ) /* Cal Omega v12.7 (Keno) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "12-72.u6", 0x2000, 0x0800, CRC(091a4b32) SHA1(3600854152482bf18d2377aa635a9fd7f3d4b2f7) )
- ROM_LOAD( "12-73.u7", 0x2800, 0x0800, CRC(c1fb5293) SHA1(f20cdddb4c89cb2fc647ddfcff6bd6f5095a0a28) )
- ROM_LOAD( "12-74.u8", 0x3000, 0x0800, CRC(de277137) SHA1(127b95616824dfb1025f3346c1335a8bf4835e68) )
- ROM_LOAD( "12-75.u9", 0x3800, 0x0800, CRC(04485ba3) SHA1(ee22396fc23508635e43ca8b17fc1f23e670fe85) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "12-72.u6", 0x2000, 0x0800, CRC(091a4b32) SHA1(3600854152482bf18d2377aa635a9fd7f3d4b2f7) )
+ ROM_LOAD( "12-73.u7", 0x2800, 0x0800, CRC(c1fb5293) SHA1(f20cdddb4c89cb2fc647ddfcff6bd6f5095a0a28) )
+ ROM_LOAD( "12-74.u8", 0x3000, 0x0800, CRC(de277137) SHA1(127b95616824dfb1025f3346c1335a8bf4835e68) )
+ ROM_LOAD( "12-75.u9", 0x3800, 0x0800, CRC(04485ba3) SHA1(ee22396fc23508635e43ca8b17fc1f23e670fe85) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
- ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
- ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
+ ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
+ ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
+ ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg128 ) /* Cal Omega v12.8 (Arcade Game) */
+ROM_START( comg128 ) /* Cal Omega v12.8 (Arcade Game) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "12-82.u6", 0x2000, 0x0800, CRC(85f0c548) SHA1(f08e26a7acb883a92e73e564fb2b58422d1784c6) )
- ROM_LOAD( "12-83.u7", 0x2800, 0x0800, CRC(57212e46) SHA1(d0bac63e0efcdb8ef4a1b6c4d53776447557e4d0) )
- ROM_LOAD( "12-84.u8", 0x3000, 0x0800, CRC(00ab3cd8) SHA1(da00457c49d3a101dc31578d07b2e986f0d73919) )
- ROM_LOAD( "12-85.u9", 0x3800, 0x0800, CRC(3b00c172) SHA1(039aa2a2b41ea29e8e22a889c3984e30b321e7e3) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "12-82.u6", 0x2000, 0x0800, CRC(85f0c548) SHA1(f08e26a7acb883a92e73e564fb2b58422d1784c6) )
+ ROM_LOAD( "12-83.u7", 0x2800, 0x0800, CRC(57212e46) SHA1(d0bac63e0efcdb8ef4a1b6c4d53776447557e4d0) )
+ ROM_LOAD( "12-84.u8", 0x3000, 0x0800, CRC(00ab3cd8) SHA1(da00457c49d3a101dc31578d07b2e986f0d73919) )
+ ROM_LOAD( "12-85.u9", 0x3800, 0x0800, CRC(3b00c172) SHA1(039aa2a2b41ea29e8e22a889c3984e30b321e7e3) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg134 ) /* Cal Omega 13.4 (Nudge Keno) */
+ROM_START( comg134 ) /* Cal Omega 13.4 (Nudge Keno) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "13-42.u6", 0x2000, 0x0800, CRC(3ff1e83d) SHA1(0c2d2faed1148909dd7d50e9eda76c6403181435) )
- ROM_LOAD( "13-43.u7", 0x2800, 0x0800, CRC(cf2125f4) SHA1(32678f3ac82c76fb8116de77ce332fe098d5e8c0) )
- ROM_LOAD( "13-44.u8", 0x3000, 0x0800, CRC(09a8d3c4) SHA1(60937b386a7fa8c30bd509633b5e98e79a1189d4) )
- ROM_LOAD( "13-45.u9", 0x3800, 0x0800, CRC(790d3347) SHA1(02bbbfd447bee596557e4c3a61649ca1330a970f) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "13-42.u6", 0x2000, 0x0800, CRC(3ff1e83d) SHA1(0c2d2faed1148909dd7d50e9eda76c6403181435) )
+ ROM_LOAD( "13-43.u7", 0x2800, 0x0800, CRC(cf2125f4) SHA1(32678f3ac82c76fb8116de77ce332fe098d5e8c0) )
+ ROM_LOAD( "13-44.u8", 0x3000, 0x0800, CRC(09a8d3c4) SHA1(60937b386a7fa8c30bd509633b5e98e79a1189d4) )
+ ROM_LOAD( "13-45.u9", 0x3800, 0x0800, CRC(790d3347) SHA1(02bbbfd447bee596557e4c3a61649ca1330a970f) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
+ ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
- ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
- ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
+ ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
+ ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
+ ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg145 ) /* Cal Omega v14.5 (Pixels) */
+ROM_START( comg145 ) /* Cal Omega v14.5 (Pixels) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "14-51.u5", 0x1800, 0x0800, CRC(b173af4b) SHA1(2fd7d391c765e8e5bf148d92223ffc2a2619dcfd) )
- ROM_LOAD( "14-52.u6", 0x2000, 0x0800, CRC(f12434c5) SHA1(f957831867cc8c98fb479cd2d859790d19883d26) )
- ROM_LOAD( "14-53.u7", 0x2800, 0x0800, CRC(3b22802b) SHA1(8cc563e79fd90873132e358f2ce5942ddbd65144) )
- ROM_LOAD( "14-54.u8", 0x3000, 0x0800, CRC(8a230410) SHA1(4ff31869a7389af20f6557d9306f19a5d3ba5766) )
- ROM_LOAD( "14-55.u9", 0x3800, 0x0800, CRC(0e6e7413) SHA1(6e2b37f6cbb49ce3e0111777a3b197f5b2012ed0) )
+ ROM_LOAD( "14-51.u5", 0x1800, 0x0800, CRC(b173af4b) SHA1(2fd7d391c765e8e5bf148d92223ffc2a2619dcfd) )
+ ROM_LOAD( "14-52.u6", 0x2000, 0x0800, CRC(f12434c5) SHA1(f957831867cc8c98fb479cd2d859790d19883d26) )
+ ROM_LOAD( "14-53.u7", 0x2800, 0x0800, CRC(3b22802b) SHA1(8cc563e79fd90873132e358f2ce5942ddbd65144) )
+ ROM_LOAD( "14-54.u8", 0x3000, 0x0800, CRC(8a230410) SHA1(4ff31869a7389af20f6557d9306f19a5d3ba5766) )
+ ROM_LOAD( "14-55.u9", 0x3800, 0x0800, CRC(0e6e7413) SHA1(6e2b37f6cbb49ce3e0111777a3b197f5b2012ed0) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
+ ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
- ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
- ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
+ ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
+ ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
+ ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg157 ) /* Cal Omega v15.7 (Double-Draw Poker) */
+ROM_START( comg157 ) /* Cal Omega v15.7 (Double-Draw Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "15-71.u5", 0x1800, 0x0800, CRC(e0c89569) SHA1(68f32b00dd8ceb08e9677438c2bfec86e1a7fe6a) )
- ROM_LOAD( "15-72.u6", 0x2000, 0x0800, CRC(a3ebd1af) SHA1(a31eff7fe205efeb5b6fe1adaed66d2f23f91844) )
- ROM_LOAD( "15-73.u7", 0x2800, 0x0800, CRC(68682479) SHA1(5644e7f86a854572f4e54d6cf9552ef9ccbcb195) )
- ROM_LOAD( "15-74.u8", 0x3000, 0x0800, CRC(1d020dd0) SHA1(a36ae43587c0dd9abcb893db45715c405bb091fe) )
- ROM_LOAD( "15-75.u9", 0x3800, 0x0800, CRC(dba3ad3e) SHA1(4ef16e7b7456e189fcbf3ceba98955960d0953fc) )
+ ROM_LOAD( "15-71.u5", 0x1800, 0x0800, CRC(e0c89569) SHA1(68f32b00dd8ceb08e9677438c2bfec86e1a7fe6a) )
+ ROM_LOAD( "15-72.u6", 0x2000, 0x0800, CRC(a3ebd1af) SHA1(a31eff7fe205efeb5b6fe1adaed66d2f23f91844) )
+ ROM_LOAD( "15-73.u7", 0x2800, 0x0800, CRC(68682479) SHA1(5644e7f86a854572f4e54d6cf9552ef9ccbcb195) )
+ ROM_LOAD( "15-74.u8", 0x3000, 0x0800, CRC(1d020dd0) SHA1(a36ae43587c0dd9abcb893db45715c405bb091fe) )
+ ROM_LOAD( "15-75.u9", 0x3800, 0x0800, CRC(dba3ad3e) SHA1(4ef16e7b7456e189fcbf3ceba98955960d0953fc) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "gpkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "gpkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "gpkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "gpkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "gpkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "gpkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "gpkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "gpkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg159 ) /* Cal Omega v15.9 (Wild Double-Up) */
+ROM_START( comg159 ) /* Cal Omega v15.9 (Wild Double-Up) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "15-93.u7", 0x5000, 0x1000, CRC(a1ca1fc0) SHA1(a751dba148c818a25237c2ac95328b6a5643f4e0) )
- ROM_LOAD( "15-94.u8", 0x6000, 0x1000, CRC(849595ea) SHA1(c28629de84b0c0d389c52490677ecb9139fd738d) )
- ROM_LOAD( "15-95.u9", 0x7000, 0x1000, CRC(c858ea24) SHA1(c7ecaddd4064b352c061b9164f2f347c310fab39) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "15-93.u7", 0x5000, 0x1000, CRC(a1ca1fc0) SHA1(a751dba148c818a25237c2ac95328b6a5643f4e0) )
+ ROM_LOAD( "15-94.u8", 0x6000, 0x1000, CRC(849595ea) SHA1(c28629de84b0c0d389c52490677ecb9139fd738d) )
+ ROM_LOAD( "15-95.u9", 0x7000, 0x1000, CRC(c858ea24) SHA1(c7ecaddd4064b352c061b9164f2f347c310fab39) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "jkr2cg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
+ ROM_LOAD( "jkr2cg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "jkr2cgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
- ROM_LOAD( "jkr2cgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
- ROM_LOAD( "jkr2cga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
+ ROM_LOAD( "jkr2cgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
+ ROM_LOAD( "jkr2cgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
+ ROM_LOAD( "jkr2cga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "wldclr.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "wldclr.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg164 ) /* Cal Omega v16.4 (Keno) */
+ROM_START( comg164 ) /* Cal Omega v16.4 (Keno) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "16-41.u5", 0x1800, 0x0800, CRC(fae6b065) SHA1(a123f98e4b4815a06d62d0429697cdce71756b94) )
- ROM_LOAD( "16-42.u6", 0x2000, 0x0800, NO_DUMP ) /* missing ROM??? */
- ROM_LOAD( "16-43.u7", 0x2800, 0x0800, CRC(15974dbc) SHA1(fe2979861b8021949c127b182b9b50975b77bdd1) )
- ROM_LOAD( "16-44.u8", 0x3000, 0x0800, CRC(64f06a75) SHA1(1cf4d89d2ee60200f84d47a3a637471e0af9239c) )
- ROM_LOAD( "16-45.u9", 0x3800, 0x0800, CRC(3a8bc80e) SHA1(a1fb58b30850b1fe2bf976b8b99c8c540d67534a) )
+ ROM_LOAD( "16-41.u5", 0x1800, 0x0800, CRC(fae6b065) SHA1(a123f98e4b4815a06d62d0429697cdce71756b94) )
+ ROM_LOAD( "16-42.u6", 0x2000, 0x0800, NO_DUMP ) /* missing ROM??? */
+ ROM_LOAD( "16-43.u7", 0x2800, 0x0800, CRC(15974dbc) SHA1(fe2979861b8021949c127b182b9b50975b77bdd1) )
+ ROM_LOAD( "16-44.u8", 0x3000, 0x0800, CRC(64f06a75) SHA1(1cf4d89d2ee60200f84d47a3a637471e0af9239c) )
+ ROM_LOAD( "16-45.u9", 0x3800, 0x0800, CRC(3a8bc80e) SHA1(a1fb58b30850b1fe2bf976b8b99c8c540d67534a) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
- ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
- ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
+ ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
+ ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
+ ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg168 ) /* Cal Omega v16.8 (Keno) */
+ROM_START( comg168 ) /* Cal Omega v16.8 (Keno) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "16-82.u6", 0x2000, 0x0800, CRC(ba044cd6) SHA1(659ec979e61baf4e871af857b722bb6fd789ff75) )
- ROM_LOAD( "16-83.u7", 0x2800, 0x0800, CRC(e3326b68) SHA1(7326f87319c363161ba8571dd983b070ef4f8694) )
- ROM_LOAD( "16-84.u8", 0x3000, 0x0800, CRC(1f72acea) SHA1(26d0e5a36f14ccae22d216a13d0459f0389ea6c0) )
- ROM_LOAD( "16-85.u9", 0x3800, 0x0800, CRC(4f38e3b3) SHA1(4d034959f665f0fdb5a4df85bae67dbd3d38077f) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "16-82.u6", 0x2000, 0x0800, CRC(ba044cd6) SHA1(659ec979e61baf4e871af857b722bb6fd789ff75) )
+ ROM_LOAD( "16-83.u7", 0x2800, 0x0800, CRC(e3326b68) SHA1(7326f87319c363161ba8571dd983b070ef4f8694) )
+ ROM_LOAD( "16-84.u8", 0x3000, 0x0800, CRC(1f72acea) SHA1(26d0e5a36f14ccae22d216a13d0459f0389ea6c0) )
+ ROM_LOAD( "16-85.u9", 0x3800, 0x0800, CRC(4f38e3b3) SHA1(4d034959f665f0fdb5a4df85bae67dbd3d38077f) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
- ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
- ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
+ ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
+ ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
+ ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg172 ) /* Cal Omega v17.2 (Double Double Poker) */
+ROM_START( comg172 ) /* Cal Omega v17.2 (Double Double Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "17-23.u7", 0x5000, 0x1000, CRC(96efc8d1) SHA1(96836ca7188dc53e3a8af64f1fed9fe1c0c4e056) )
- ROM_LOAD( "17-24.u8", 0x6000, 0x1000, CRC(08d31a98) SHA1(85e23ffeb8fa82ec0155f54d2193511517e6ec8c) )
- ROM_LOAD( "17-25.u9", 0x7000, 0x1000, CRC(82508c71) SHA1(dd44e949f36e04ceaf1e527615c7003d0a9c0073) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "17-23.u7", 0x5000, 0x1000, CRC(96efc8d1) SHA1(96836ca7188dc53e3a8af64f1fed9fe1c0c4e056) )
+ ROM_LOAD( "17-24.u8", 0x6000, 0x1000, CRC(08d31a98) SHA1(85e23ffeb8fa82ec0155f54d2193511517e6ec8c) )
+ ROM_LOAD( "17-25.u9", 0x7000, 0x1000, CRC(82508c71) SHA1(dd44e949f36e04ceaf1e527615c7003d0a9c0073) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "jkrpkrcg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
+ ROM_LOAD( "jkrpkrcg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "jkrpkrcgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
- ROM_LOAD( "jkrpkrcgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
- ROM_LOAD( "jkrpkrcga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
+ ROM_LOAD( "jkrpkrcgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
+ ROM_LOAD( "jkrpkrcgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
+ ROM_LOAD( "jkrpkrcga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "wldclr.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "wldclr.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg175 ) /* Cal Omega v17.5 (Gaming Draw Poker) */
+ROM_START( comg175 ) /* Cal Omega v17.5 (Gaming Draw Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "17-51.u5", 0x1800, 0x0800, CRC(5450b90a) SHA1(4e67a17b2353bbe89fb6be4951efd09a948a987e) )
- ROM_LOAD( "17-52.u6", 0x2000, 0x0800, CRC(29d787fd) SHA1(3f8c46f928c7fc3e68fe47efe23505f393bdb577) )
- ROM_LOAD( "17-53.u7", 0x2800, 0x0800, CRC(080f6a23) SHA1(69866fba7cc348976ed1dfbfe103a5852a60d081) )
- ROM_LOAD( "17-54.u8", 0x3000, 0x0800, CRC(7867815d) SHA1(8f3c4375f9b7c4eb5ebe413a8ac8593ff2ceb3e0) )
- ROM_LOAD( "17-55.u9", 0x3800, 0x0800, CRC(656aa3e3) SHA1(2ccf1328d134cb26a5c4a0e45841079166de19be) )
+ ROM_LOAD( "17-51.u5", 0x1800, 0x0800, CRC(5450b90a) SHA1(4e67a17b2353bbe89fb6be4951efd09a948a987e) )
+ ROM_LOAD( "17-52.u6", 0x2000, 0x0800, CRC(29d787fd) SHA1(3f8c46f928c7fc3e68fe47efe23505f393bdb577) )
+ ROM_LOAD( "17-53.u7", 0x2800, 0x0800, CRC(080f6a23) SHA1(69866fba7cc348976ed1dfbfe103a5852a60d081) )
+ ROM_LOAD( "17-54.u8", 0x3000, 0x0800, CRC(7867815d) SHA1(8f3c4375f9b7c4eb5ebe413a8ac8593ff2ceb3e0) )
+ ROM_LOAD( "17-55.u9", 0x3800, 0x0800, CRC(656aa3e3) SHA1(2ccf1328d134cb26a5c4a0e45841079166de19be) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg176 ) /* Cal Omega 17.6 (Nudge Keno) */
+ROM_START( comg176 ) /* Cal Omega 17.6 (Nudge Keno) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "17-61.u5", 0x1800, 0x0800, CRC(7b201d27) SHA1(142d25c424e6bfd4327bb796f8dc9d0e6cb21797) )
- ROM_LOAD( "17-62.u6", 0x2000, 0x0800, CRC(0ce87971) SHA1(ad1fecf4ed34eccd2a5b09e8847cb4a011875b73) )
- ROM_LOAD( "17-63.u7", 0x2800, 0x0800, CRC(adce3e97) SHA1(5c12984b241c4884158ecc0743a3805115457277) )
- ROM_LOAD( "17-64.u8", 0x3000, 0x0800, CRC(2a48525a) SHA1(9e48ca9fc3cc4c42dac3a24b2a6ac78204f7d2d8) )
- ROM_LOAD( "17-65.u9", 0x3800, 0x0800, CRC(d4d929fa) SHA1(9cee198596375b810210856bc4ba5f5a3d706df4) )
+ ROM_LOAD( "17-61.u5", 0x1800, 0x0800, CRC(7b201d27) SHA1(142d25c424e6bfd4327bb796f8dc9d0e6cb21797) )
+ ROM_LOAD( "17-62.u6", 0x2000, 0x0800, CRC(0ce87971) SHA1(ad1fecf4ed34eccd2a5b09e8847cb4a011875b73) )
+ ROM_LOAD( "17-63.u7", 0x2800, 0x0800, CRC(adce3e97) SHA1(5c12984b241c4884158ecc0743a3805115457277) )
+ ROM_LOAD( "17-64.u8", 0x3000, 0x0800, CRC(2a48525a) SHA1(9e48ca9fc3cc4c42dac3a24b2a6ac78204f7d2d8) )
+ ROM_LOAD( "17-65.u9", 0x3800, 0x0800, CRC(d4d929fa) SHA1(9cee198596375b810210856bc4ba5f5a3d706df4) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
+ ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
- ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
- ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
+ ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
+ ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
+ ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg181 ) /* Cal Omega 18.1 (Nudge Keno) */
+ROM_START( comg181 ) /* Cal Omega 18.1 (Nudge Keno) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "18-12.u6", 0x2000, 0x0800, CRC(dd867180) SHA1(caf703f45dea980e84fc29d2ea0d3f4e211aaa3f) )
- ROM_LOAD( "18-13.u7", 0x2800, 0x0800, CRC(39ccbddd) SHA1(1c027957ad6a3346dd3bcc0b422d2e854c6f5439) )
- ROM_LOAD( "18-14.u8", 0x3000, 0x0800, CRC(ddf23ef1) SHA1(8340a2b0125e42602045fea2a248f1ec9e9915c0) )
- ROM_LOAD( "18-15.u9", 0x3800, 0x0800, CRC(549610b5) SHA1(371e4651a400d4c8b7181391c1d9b964d1ccb6fb) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "18-12.u6", 0x2000, 0x0800, CRC(dd867180) SHA1(caf703f45dea980e84fc29d2ea0d3f4e211aaa3f) )
+ ROM_LOAD( "18-13.u7", 0x2800, 0x0800, CRC(39ccbddd) SHA1(1c027957ad6a3346dd3bcc0b422d2e854c6f5439) )
+ ROM_LOAD( "18-14.u8", 0x3000, 0x0800, CRC(ddf23ef1) SHA1(8340a2b0125e42602045fea2a248f1ec9e9915c0) )
+ ROM_LOAD( "18-15.u9", 0x3800, 0x0800, CRC(549610b5) SHA1(371e4651a400d4c8b7181391c1d9b964d1ccb6fb) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
+ ROM_LOAD( "nbcg0.u67", 0x0000, 0x0800, CRC(b4b01f22) SHA1(1214d91ae28ac40ef37fce787783cd64331ed224) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
- ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
- ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
+ ROM_LOAD( "nbcgc.u70", 0x0000, 0x1000, CRC(f7ca234f) SHA1(3b2717051341c423969ed4bfb292a9f88119c2a8) )
+ ROM_LOAD( "nbcgb.u69", 0x1000, 0x1000, CRC(9d409932) SHA1(d3ffca50a059278777238d206895a0d188f4ff6f) )
+ ROM_LOAD( "nbcga.u68", 0x2000, 0x1000, CRC(afe1a666) SHA1(c1530700a283d18e7136754d45904930ef424bcf) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "bclr.u28", 0x0000, 0x0100, CRC(0ec45d01) SHA1(da73ae7e1c74913921dc378a97795c6da47dcbfb) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg183 ) /* Cal Omega v18.3 (Pixels) */
+ROM_START( comg183 ) /* Cal Omega v18.3 (Pixels) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "18-32.u6", 0x4000, 0x1000, CRC(c793ffc1) SHA1(f2ef82f92a9e18128d28973bcf050d0c3e1819f3) )
- ROM_LOAD( "18-33.u7", 0x5000, 0x1000, CRC(415a6599) SHA1(648986310a3864652897e5d18b8be06819cce7a8) )
- ROM_LOAD( "18-34.u8", 0x6000, 0x1000, CRC(fc5d3b89) SHA1(3601401d00d7a0621eac4254da238e9c8929cac4) )
- ROM_LOAD( "18-35.u9", 0x7000, 0x1000, CRC(6552207f) SHA1(bd8a7546b4dad07d151dc7039028916386aee5e9) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "18-32.u6", 0x4000, 0x1000, CRC(c793ffc1) SHA1(f2ef82f92a9e18128d28973bcf050d0c3e1819f3) )
+ ROM_LOAD( "18-33.u7", 0x5000, 0x1000, CRC(415a6599) SHA1(648986310a3864652897e5d18b8be06819cce7a8) )
+ ROM_LOAD( "18-34.u8", 0x6000, 0x1000, CRC(fc5d3b89) SHA1(3601401d00d7a0621eac4254da238e9c8929cac4) )
+ ROM_LOAD( "18-35.u9", 0x7000, 0x1000, CRC(6552207f) SHA1(bd8a7546b4dad07d151dc7039028916386aee5e9) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
+ ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
- ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
- ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
+ ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
+ ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
+ ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg185 ) /* Cal Omega v18.5 (Pixels) */
+ROM_START( comg185 ) /* Cal Omega v18.5 (Pixels) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "18-52.u6", 0x4000, 0x1000, CRC(19225f7d) SHA1(73d713ee86886f935d9b2c2ca670d8e00d466b7f) )
- ROM_LOAD( "18-53.u7", 0x5000, 0x1000, CRC(797e2b70) SHA1(83f974c6c1886eab5c90782766b72900c73045e1) )
- ROM_LOAD( "18-54.u8", 0x6000, 0x1000, CRC(6becc802) SHA1(e72783db52bffd3fa2f7d35cd8a004415e37b004) )
- ROM_LOAD( "18-55.u9", 0x7000, 0x1000, CRC(313db76a) SHA1(d81228bf0badc8a3cf08c77de27b3d973953175c) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "18-52.u6", 0x4000, 0x1000, CRC(19225f7d) SHA1(73d713ee86886f935d9b2c2ca670d8e00d466b7f) )
+ ROM_LOAD( "18-53.u7", 0x5000, 0x1000, CRC(797e2b70) SHA1(83f974c6c1886eab5c90782766b72900c73045e1) )
+ ROM_LOAD( "18-54.u8", 0x6000, 0x1000, CRC(6becc802) SHA1(e72783db52bffd3fa2f7d35cd8a004415e37b004) )
+ ROM_LOAD( "18-55.u9", 0x7000, 0x1000, CRC(313db76a) SHA1(d81228bf0badc8a3cf08c77de27b3d973953175c) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
+ ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
- ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
- ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
+ ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
+ ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
+ ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg186 ) /* Cal Omega v18.6 (Pixels) */
+ROM_START( comg186 ) /* Cal Omega v18.6 (Pixels) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "18-62.u6", 0x4000, 0x1000, CRC(025f4268) SHA1(750a5417fe2b077893d8252dd5eafc42fafd965e) )
- ROM_LOAD( "18-63.u7", 0x5000, 0x1000, CRC(948a6ef1) SHA1(6aeb244209f3376042a32d9accb38e3f09cb192a) )
- ROM_LOAD( "18-64.u8", 0x6000, 0x1000, CRC(9fb6e82b) SHA1(db38564e8060f1c67183f3f412a24439b2253e13) )
- ROM_LOAD( "18-65.u9", 0x7000, 0x1000, CRC(a68be5ef) SHA1(1ab2bc1b070863260fa281970f886d77e2fa7ccd) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "18-62.u6", 0x4000, 0x1000, CRC(025f4268) SHA1(750a5417fe2b077893d8252dd5eafc42fafd965e) )
+ ROM_LOAD( "18-63.u7", 0x5000, 0x1000, CRC(948a6ef1) SHA1(6aeb244209f3376042a32d9accb38e3f09cb192a) )
+ ROM_LOAD( "18-64.u8", 0x6000, 0x1000, CRC(9fb6e82b) SHA1(db38564e8060f1c67183f3f412a24439b2253e13) )
+ ROM_LOAD( "18-65.u9", 0x7000, 0x1000, CRC(a68be5ef) SHA1(1ab2bc1b070863260fa281970f886d77e2fa7ccd) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
+ ROM_LOAD( "pxcg0.u67", 0x0000, 0x0800, CRC(4b487d88) SHA1(ae8bf1c84c475a70ea98eb8419a920389bac1761) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
- ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
- ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
+ ROM_LOAD( "pxcgc.u70", 0x0000, 0x1000, CRC(9750eea2) SHA1(4f8b04a161501840ad2576379f23e8be2d46a488) )
+ ROM_LOAD( "pxcgb.u69", 0x1000, 0x1000, CRC(a3bed6b1) SHA1(078cface4af9720bee3288f5f0236725c8bfb575) )
+ ROM_LOAD( "pxcga.u68", 0x2000, 0x1000, CRC(d80f064a) SHA1(1b22ca3e446ed3c6fb49a90c463394dec96bc4ec) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pixclr.u28", 0x0000, 0x0100, CRC(67d23e76) SHA1(826cf77ca5a4d492d66e45ee96a7780a94fbe634) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg187 ) /* Cal Omega v18.7 (Amusement Poker) */
+ROM_START( comg187 ) /* Cal Omega v18.7 (Amusement Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "18-72.u6", 0x4000, 0x1000, BAD_DUMP CRC(1a4bd46a) SHA1(76101271ff9b98c3310e1666dfba34a01a0f0bcd) ) /* 1st half seems to be the 2nd one, and 2nd half is filled of 0xff */
- ROM_LOAD( "18-73.u7", 0x5000, 0x1000, CRC(ca374ecb) SHA1(113495afa88da97cb7239f645fabba7125ce2b4b) )
- ROM_LOAD( "18-74.u8", 0x6000, 0x1000, CRC(5bb57ca8) SHA1(22dc6f0e2fee5408fa70e4bc60f1833534ee038f) )
- ROM_LOAD( "18-75.u9", 0x7000, 0x1000, CRC(70a8ccb3) SHA1(b5b7d6a8262ab6e47a1400681c414fd3edd0d7a8) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "18-72.u6", 0x4000, 0x1000, BAD_DUMP CRC(1a4bd46a) SHA1(76101271ff9b98c3310e1666dfba34a01a0f0bcd) ) /* 1st half seems to be the 2nd one, and 2nd half is filled of 0xff */
+ ROM_LOAD( "18-73.u7", 0x5000, 0x1000, CRC(ca374ecb) SHA1(113495afa88da97cb7239f645fabba7125ce2b4b) )
+ ROM_LOAD( "18-74.u8", 0x6000, 0x1000, CRC(5bb57ca8) SHA1(22dc6f0e2fee5408fa70e4bc60f1833534ee038f) )
+ ROM_LOAD( "18-75.u9", 0x7000, 0x1000, CRC(70a8ccb3) SHA1(b5b7d6a8262ab6e47a1400681c414fd3edd0d7a8) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "jkr2cg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
+ ROM_LOAD( "jkr2cg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "jkr2cgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
- ROM_LOAD( "jkr2cgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
- ROM_LOAD( "jkr2cga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
+ ROM_LOAD( "jkr2cgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
+ ROM_LOAD( "jkr2cgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
+ ROM_LOAD( "jkr2cga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "mltclr.u28", 0x0000, 0x0100, CRC(fefb0fa8) SHA1(66d86aa19d9d37ffd2840d6653fcec667bc716d4) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "mltclr.u28", 0x0000, 0x0100, CRC(fefb0fa8) SHA1(66d86aa19d9d37ffd2840d6653fcec667bc716d4) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg204 ) /* Cal Omega v20.4 (Super Blackjack) */
+ROM_START( comg204 ) /* Cal Omega v20.4 (Super Blackjack) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "20-41.u5", 0x3000, 0x1000, CRC(9c2203f7) SHA1(fd566683e887cf80cd0e6c82a413aebc378397f8) )
- ROM_LOAD( "20-42.u6", 0x4000, 0x1000, CRC(31b37010) SHA1(c35ef77725c6c6dd9f369d50d9a8e55c2e3644af) )
- ROM_LOAD( "20-43.u7", 0x5000, 0x1000, CRC(a9edf684) SHA1(7d2d8f3ec00c93914bfd629fae838b7d0f4bf414) )
- ROM_LOAD( "20-44.u8", 0x6000, 0x1000, CRC(7a46e6cd) SHA1(91be6ddfd33ebab1f65e08f58c1be46fc770c1bf) )
- ROM_LOAD( "20-45.u9", 0x7000, 0x1000, CRC(1e76202a) SHA1(015bf7ba62a561f5640aad7855e5fdd46787cdbf) )
+ ROM_LOAD( "20-41.u5", 0x3000, 0x1000, CRC(9c2203f7) SHA1(fd566683e887cf80cd0e6c82a413aebc378397f8) )
+ ROM_LOAD( "20-42.u6", 0x4000, 0x1000, CRC(31b37010) SHA1(c35ef77725c6c6dd9f369d50d9a8e55c2e3644af) )
+ ROM_LOAD( "20-43.u7", 0x5000, 0x1000, CRC(a9edf684) SHA1(7d2d8f3ec00c93914bfd629fae838b7d0f4bf414) )
+ ROM_LOAD( "20-44.u8", 0x6000, 0x1000, CRC(7a46e6cd) SHA1(91be6ddfd33ebab1f65e08f58c1be46fc770c1bf) )
+ ROM_LOAD( "20-45.u9", 0x7000, 0x1000, CRC(1e76202a) SHA1(015bf7ba62a561f5640aad7855e5fdd46787cdbf) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "jkr2cg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
+ ROM_LOAD( "jkr2cg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "jkr2cgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
- ROM_LOAD( "jkr2cgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
- ROM_LOAD( "jkr2cga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
+ ROM_LOAD( "jkr2cgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
+ ROM_LOAD( "jkr2cgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
+ ROM_LOAD( "jkr2cga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "mltclr.u28", 0x0000, 0x0100, CRC(fefb0fa8) SHA1(66d86aa19d9d37ffd2840d6653fcec667bc716d4) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "mltclr.u28", 0x0000, 0x0100, CRC(fefb0fa8) SHA1(66d86aa19d9d37ffd2840d6653fcec667bc716d4) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg208 ) /* Cal Omega v20.8 (Winner's Choice) */
+ROM_START( comg208 ) /* Cal Omega v20.8 (Winner's Choice) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "20-81.u5", 0x3000, 0x1000, CRC(938be03a) SHA1(606252b5160a7af340faa3d4ed6af9dff849c9ac) )
- ROM_LOAD( "20-82.u6", 0x4000, 0x1000, CRC(7d42257c) SHA1(f1487bcc2475d1bcdfbc9bf866adcb0d510acef5) )
- ROM_LOAD( "20-83.u7", 0x5000, 0x1000, CRC(b3b25958) SHA1(096f010db3164579ba81851a3f1062df0f46fc0f) )
- ROM_LOAD( "20-84.u8", 0x6000, 0x1000, CRC(0bfb9f9d) SHA1(4a3c1e88faa90a9f4a483b053beb2c8af688d52d) )
- ROM_LOAD( "20-85.u9", 0x7000, 0x1000, CRC(d61ba385) SHA1(0352a5306e942467d142982394d2d72892d1ecd6) )
+ ROM_LOAD( "20-81.u5", 0x3000, 0x1000, CRC(938be03a) SHA1(606252b5160a7af340faa3d4ed6af9dff849c9ac) )
+ ROM_LOAD( "20-82.u6", 0x4000, 0x1000, CRC(7d42257c) SHA1(f1487bcc2475d1bcdfbc9bf866adcb0d510acef5) )
+ ROM_LOAD( "20-83.u7", 0x5000, 0x1000, CRC(b3b25958) SHA1(096f010db3164579ba81851a3f1062df0f46fc0f) )
+ ROM_LOAD( "20-84.u8", 0x6000, 0x1000, CRC(0bfb9f9d) SHA1(4a3c1e88faa90a9f4a483b053beb2c8af688d52d) )
+ ROM_LOAD( "20-85.u9", 0x7000, 0x1000, CRC(d61ba385) SHA1(0352a5306e942467d142982394d2d72892d1ecd6) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "mlt2cg0.u67", 0x0000, 0x1000, CRC(43a095f0) SHA1(1824dd864bfc385035cc6b3da736ab6de9336440) )
+ ROM_LOAD( "mlt2cg0.u67", 0x0000, 0x1000, CRC(43a095f0) SHA1(1824dd864bfc385035cc6b3da736ab6de9336440) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "mlt2cgc.u70", 0x0000, 0x1000, CRC(432ae4f9) SHA1(e4229ee743d0245b3efaed0d852bf24712508ce9) )
- ROM_LOAD( "mlt2cgb.u69", 0x1000, 0x1000, CRC(d5173679) SHA1(396c9c3eb7a0a5e5d279d079e635c8e4e5581779) )
- ROM_LOAD( "mlt2cga.u68", 0x2000, 0x1000, CRC(b7397d3a) SHA1(f35607a4cd60e4467e27474e8063b7a7a4a65d9f) )
+ ROM_LOAD( "mlt2cgc.u70", 0x0000, 0x1000, CRC(432ae4f9) SHA1(e4229ee743d0245b3efaed0d852bf24712508ce9) )
+ ROM_LOAD( "mlt2cgb.u69", 0x1000, 0x1000, CRC(d5173679) SHA1(396c9c3eb7a0a5e5d279d079e635c8e4e5581779) )
+ ROM_LOAD( "mlt2cga.u68", 0x2000, 0x1000, CRC(b7397d3a) SHA1(f35607a4cd60e4467e27474e8063b7a7a4a65d9f) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "mltclr.u28", 0x0000, 0x0100, CRC(fefb0fa8) SHA1(66d86aa19d9d37ffd2840d6653fcec667bc716d4) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "mltclr.u28", 0x0000, 0x0100, CRC(fefb0fa8) SHA1(66d86aa19d9d37ffd2840d6653fcec667bc716d4) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg227 ) /* Cal Omega v22.7 (Amusement Poker (Double Double)) */
+ROM_START( comg227 ) /* Cal Omega v22.7 (Amusement Poker (Double Double)) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "22-73.u7", 0x5000, 0x1000, CRC(152d1ff9) SHA1(8bbfea1bae9e4fe2a2ac52507dc8dd0e33fbbd06) )
- ROM_LOAD( "22-74.u8", 0x6000, 0x1000, CRC(3af0f69d) SHA1(c34a0eab3ad4e4db310727805ba1ddc73533bfa6) )
- ROM_LOAD( "22-75.u9", 0x7000, 0x1000, CRC(d1f3fe24) SHA1(8b43b521fb1be8ef4286b4bfee99b654c49cf9de) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "22-73.u7", 0x5000, 0x1000, CRC(152d1ff9) SHA1(8bbfea1bae9e4fe2a2ac52507dc8dd0e33fbbd06) )
+ ROM_LOAD( "22-74.u8", 0x6000, 0x1000, CRC(3af0f69d) SHA1(c34a0eab3ad4e4db310727805ba1ddc73533bfa6) )
+ ROM_LOAD( "22-75.u9", 0x7000, 0x1000, CRC(d1f3fe24) SHA1(8b43b521fb1be8ef4286b4bfee99b654c49cf9de) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "jkrpkrcg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
+ ROM_LOAD( "jkrpkrcg0.u67", 0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "jkrpkrcgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
- ROM_LOAD( "jkrpkrcgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
- ROM_LOAD( "jkrpkrcga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
+ ROM_LOAD( "jkrpkrcgc.u70", 0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
+ ROM_LOAD( "jkrpkrcgb.u69", 0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
+ ROM_LOAD( "jkrpkrcga.u68", 0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "wldclr.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "wldclr.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg230 ) /* Cal Omega v23.0 (FC Bingo (4-card)) */
+ROM_START( comg230 ) /* Cal Omega v23.0 (FC Bingo (4-card)) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "23-02.u6", 0x4000, 0x1000, BAD_DUMP CRC(f154670a) SHA1(e0c66649d1434eca3435033a32634cb90cef0f31) )
- ROM_LOAD( "23-03.u7", 0x5000, 0x1000, BAD_DUMP CRC(daf93757) SHA1(27d57007a24a5f892f7ee201072fcd5817373cad) )
- ROM_LOAD( "23-04.u8", 0x6000, 0x1000, CRC(ebb5531a) SHA1(9fd003fcba5a5120332bcbd3c845d555c60875e9) )
- ROM_LOAD( "23-05.u9", 0x7000, 0x1000, BAD_DUMP CRC(cca254a0) SHA1(9dc7c660e0f2d5766756e4ef8cb5a7eddec18069) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "23-02.u6", 0x4000, 0x1000, BAD_DUMP CRC(f154670a) SHA1(e0c66649d1434eca3435033a32634cb90cef0f31) )
+ ROM_LOAD( "23-03.u7", 0x5000, 0x1000, BAD_DUMP CRC(daf93757) SHA1(27d57007a24a5f892f7ee201072fcd5817373cad) )
+ ROM_LOAD( "23-04.u8", 0x6000, 0x1000, CRC(ebb5531a) SHA1(9fd003fcba5a5120332bcbd3c845d555c60875e9) )
+ ROM_LOAD( "23-05.u9", 0x7000, 0x1000, BAD_DUMP CRC(cca254a0) SHA1(9dc7c660e0f2d5766756e4ef8cb5a7eddec18069) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "fcbcg0.u67", 0x0000, 0x1000, BAD_DUMP CRC(ded1c944) SHA1(eafb30b4a2cbb6c10dba959d3839a8f8bf793972) )
+ ROM_LOAD( "fcbcg0.u67", 0x0000, 0x1000, BAD_DUMP CRC(ded1c944) SHA1(eafb30b4a2cbb6c10dba959d3839a8f8bf793972) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "fcbcgc.u70", 0x0000, 0x1000, BAD_DUMP CRC(9f101dd8) SHA1(4f6671b8b36f9351f368d8bbc92c20bd2b7b3dab) )
- ROM_LOAD( "fcbcgb.u69", 0x1000, 0x1000, BAD_DUMP CRC(a7548075) SHA1(a751289cbc8b726082b60740c0202c08e3981e24) )
- ROM_LOAD( "fcbcga.u68", 0x2000, 0x1000, BAD_DUMP CRC(3fc39df9) SHA1(223d05f8969a1846a986b29395c98f97a3218bf7) )
+ ROM_LOAD( "fcbcgc.u70", 0x0000, 0x1000, BAD_DUMP CRC(9f101dd8) SHA1(4f6671b8b36f9351f368d8bbc92c20bd2b7b3dab) )
+ ROM_LOAD( "fcbcgb.u69", 0x1000, 0x1000, BAD_DUMP CRC(a7548075) SHA1(a751289cbc8b726082b60740c0202c08e3981e24) )
+ ROM_LOAD( "fcbcga.u68", 0x2000, 0x1000, BAD_DUMP CRC(3fc39df9) SHA1(223d05f8969a1846a986b29395c98f97a3218bf7) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "fcbclr.u28", 0x0000, 0x0100, BAD_DUMP CRC(6db5a344) SHA1(5f1a81ac02a2a74252decd3bb95a5436cc943930) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "fcbclr.u28", 0x0000, 0x0100, BAD_DUMP CRC(6db5a344) SHA1(5f1a81ac02a2a74252decd3bb95a5436cc943930) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg236 ) /* Cal Omega v23.6 (Hotline) */
+ROM_START( comg236 ) /* Cal Omega v23.6 (Hotline) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "23-62.u6", 0x4000, 0x1000, CRC(6f3dd409) SHA1(8112c3114609317fe5543bf26fa426d36d60c5e1) )
- ROM_LOAD( "23-63.u7", 0x5000, 0x1000, CRC(76e96865) SHA1(03055751efa143cff0501aaa9b2beb9d533e13e7) )
- ROM_LOAD( "23-64.u8", 0x6000, 0x1000, CRC(26a18d82) SHA1(1ca036c014f180fb1720150642be3986c053c1c9) )
- ROM_LOAD( "23-65.u9", 0x7000, 0x1000, CRC(4e24d2d3) SHA1(56200760dced8b8bf2b38eee5c26a20ffc5b5442) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "23-62.u6", 0x4000, 0x1000, CRC(6f3dd409) SHA1(8112c3114609317fe5543bf26fa426d36d60c5e1) )
+ ROM_LOAD( "23-63.u7", 0x5000, 0x1000, CRC(76e96865) SHA1(03055751efa143cff0501aaa9b2beb9d533e13e7) )
+ ROM_LOAD( "23-64.u8", 0x6000, 0x1000, CRC(26a18d82) SHA1(1ca036c014f180fb1720150642be3986c053c1c9) )
+ ROM_LOAD( "23-65.u9", 0x7000, 0x1000, CRC(4e24d2d3) SHA1(56200760dced8b8bf2b38eee5c26a20ffc5b5442) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "hlcg0.u67", 0x0000, 0x1000, CRC(b2871c94) SHA1(001c376479701efa4542c88f0eca9e13c694667c) )
+ ROM_LOAD( "hlcg0.u67", 0x0000, 0x1000, CRC(b2871c94) SHA1(001c376479701efa4542c88f0eca9e13c694667c) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "hlcgc.u70", 0x0000, 0x1000, CRC(6af901d9) SHA1(f9fcfcf2c92d1a3ef9a18b4e3e680c9de4829533) )
- ROM_LOAD( "hlcgb.u69", 0x1000, 0x1000, CRC(db2d3eb7) SHA1(45f686edf7093069b44e895547c7ec67f820447d) )
- ROM_LOAD( "hlcga.u68", 0x2000, 0x1000, CRC(a7e583fd) SHA1(d3b0aa9e24b6aedf24af55e5b149ab75d6f01a36) )
+ ROM_LOAD( "hlcgc.u70", 0x0000, 0x1000, CRC(6af901d9) SHA1(f9fcfcf2c92d1a3ef9a18b4e3e680c9de4829533) )
+ ROM_LOAD( "hlcgb.u69", 0x1000, 0x1000, CRC(db2d3eb7) SHA1(45f686edf7093069b44e895547c7ec67f820447d) )
+ ROM_LOAD( "hlcga.u68", 0x2000, 0x1000, CRC(a7e583fd) SHA1(d3b0aa9e24b6aedf24af55e5b149ab75d6f01a36) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "hlclr.u28", 0x0000, 0x0100, CRC(1c994cda) SHA1(5c8698b4c5e43146106c9da8a306e3099b26ca2d) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "hlclr.u28", 0x0000, 0x0100, CRC(1c994cda) SHA1(5c8698b4c5e43146106c9da8a306e3099b26ca2d) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
/*
@@ -3540,119 +3540,119 @@ ROM_END
*/
-ROM_START( comg239 ) /* Cal Omega v23.9 (Gaming Draw Poker) */
+ROM_START( comg239 ) /* Cal Omega v23.9 (Gaming Draw Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "23-91.u5", 0x1800, 0x0800, CRC(b49035e2) SHA1(b94a0245ca64d15b1496d1b272ffc0ce80f85526) )
- ROM_LOAD( "23-92.u6", 0x2000, 0x0800, CRC(d9ffaa73) SHA1(e39d10121e16f89cd8d30a5391a14dc3d4b13a46) )
- ROM_LOAD( "23-93.u7", 0x2800, 0x0800, CRC(f4e44280) SHA1(a03e5f03ed86c8ad7900fab0ef6a71c76eba3232) )
- ROM_LOAD( "23-94.u8", 0x3000, 0x0800, CRC(8372f4d0) SHA1(de289b65cbe30c92b46fa87b9262ff7f9cfa0431) )
- ROM_LOAD( "23-95.u9", 0x3800, 0x0800, CRC(bfcb934d) SHA1(b7cfa049bdd773368cb8326bcdfabbf474d15bb4) )
+ ROM_LOAD( "23-91.u5", 0x1800, 0x0800, CRC(b49035e2) SHA1(b94a0245ca64d15b1496d1b272ffc0ce80f85526) )
+ ROM_LOAD( "23-92.u6", 0x2000, 0x0800, CRC(d9ffaa73) SHA1(e39d10121e16f89cd8d30a5391a14dc3d4b13a46) )
+ ROM_LOAD( "23-93.u7", 0x2800, 0x0800, CRC(f4e44280) SHA1(a03e5f03ed86c8ad7900fab0ef6a71c76eba3232) )
+ ROM_LOAD( "23-94.u8", 0x3000, 0x0800, CRC(8372f4d0) SHA1(de289b65cbe30c92b46fa87b9262ff7f9cfa0431) )
+ ROM_LOAD( "23-95.u9", 0x3800, 0x0800, CRC(bfcb934d) SHA1(b7cfa049bdd773368cb8326bcdfabbf474d15bb4) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "pkcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+ ROM_LOAD( "pkcgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "pkcgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "pkcga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "82s129n.u28", 0x0000, 0x0100, CRC(6db5a344) SHA1(5f1a81ac02a2a74252decd3bb95a5436cc943930) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "82s129n.u28", 0x0000, 0x0100, CRC(6db5a344) SHA1(5f1a81ac02a2a74252decd3bb95a5436cc943930) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg240 ) /* Cal Omega v24.0 (Gaming Draw Poker) */
+ROM_START( comg240 ) /* Cal Omega v24.0 (Gaming Draw Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "24-01.u5", 0x1800, 0x0800, CRC(445e4e1e) SHA1(11f1b2652fce0e507bde66296f57d689a8460df5) )
- ROM_LOAD( "24-02.u6", 0x2000, 0x0800, CRC(53ef572d) SHA1(14c99f94a22d93de998f6418ea9dc3eab5119a82) )
- ROM_LOAD( "24-03.u7", 0x2800, 0x0800, CRC(fe46b112) SHA1(b32ef6a09a0b9059840cef4f8847cdbb3cf96fa9) )
- ROM_LOAD( "24-04.u8", 0x3000, 0x0800, CRC(0060978d) SHA1(f5ee296592520408d2bdd7022d5b82e712cfc643) )
- ROM_LOAD( "24-05_02bt.u9", 0x3800, 0x0800, CRC(9637a6c0) SHA1(29589fcf8c4db760da95d29be74340fea65b550a) )
+ ROM_LOAD( "24-01.u5", 0x1800, 0x0800, CRC(445e4e1e) SHA1(11f1b2652fce0e507bde66296f57d689a8460df5) )
+ ROM_LOAD( "24-02.u6", 0x2000, 0x0800, CRC(53ef572d) SHA1(14c99f94a22d93de998f6418ea9dc3eab5119a82) )
+ ROM_LOAD( "24-03.u7", 0x2800, 0x0800, CRC(fe46b112) SHA1(b32ef6a09a0b9059840cef4f8847cdbb3cf96fa9) )
+ ROM_LOAD( "24-04.u8", 0x3000, 0x0800, CRC(0060978d) SHA1(f5ee296592520408d2bdd7022d5b82e712cfc643) )
+ ROM_LOAD( "24-05_02bt.u9", 0x3800, 0x0800, CRC(9637a6c0) SHA1(29589fcf8c4db760da95d29be74340fea65b550a) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "cgo.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "cgo.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "cgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
- ROM_LOAD( "cgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
- ROM_LOAD( "cga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
-
- ROM_REGION( 0x400, "proms", 0 ) /* is this prom ok? */
- ROM_LOAD( "pok-6301.u28", 0x0000, 0x0100, CRC(56c2577b) SHA1(cb75882067e1e0d9f9369a37b5a829dd091d473e) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "cgc.u70", 0x0000, 0x0800, CRC(f2f94661) SHA1(f37f7c0dff680fd02897dae64e13e297d0fdb3e7) )
+ ROM_LOAD( "cgb.u69", 0x0800, 0x0800, CRC(6bbb1e2d) SHA1(51ee282219bf84218886ad11a24bc6a8e7337527) )
+ ROM_LOAD( "cga.u68", 0x1000, 0x0800, CRC(6e3e9b1d) SHA1(14eb8d14ce16719a6ad7d13db01e47c8f05955f0) )
+
+ ROM_REGION( 0x400, "proms", 0 ) /* is this prom ok? */
+ ROM_LOAD( "pok-6301.u28", 0x0000, 0x0100, CRC(56c2577b) SHA1(cb75882067e1e0d9f9369a37b5a829dd091d473e) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg246 ) /* Cal Omega v24.6 (Hotline) */
+ROM_START( comg246 ) /* Cal Omega v24.6 (Hotline) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
- ROM_LOAD( "24-62.u6", 0x4000, 0x1000, CRC(41f7b882) SHA1(4b532d70d5a7101952085a8fcdc0568c4266a72a) )
- ROM_LOAD( "24-63.u7", 0x5000, 0x1000, CRC(226580b7) SHA1(07e6332ace45e0ced57aed6e348ab12c1f07ff34) )
- ROM_LOAD( "24-64.u8", 0x6000, 0x1000, CRC(bf402e32) SHA1(436670b8f37caac14bb578a31dddbc0e2b0fd1ae) )
- ROM_LOAD( "24-65.u9", 0x7000, 0x1000, CRC(4eb99af3) SHA1(1af1a27f2575290aa0dce88840cd8be516a542ff) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket */
+ ROM_LOAD( "24-62.u6", 0x4000, 0x1000, CRC(41f7b882) SHA1(4b532d70d5a7101952085a8fcdc0568c4266a72a) )
+ ROM_LOAD( "24-63.u7", 0x5000, 0x1000, CRC(226580b7) SHA1(07e6332ace45e0ced57aed6e348ab12c1f07ff34) )
+ ROM_LOAD( "24-64.u8", 0x6000, 0x1000, CRC(bf402e32) SHA1(436670b8f37caac14bb578a31dddbc0e2b0fd1ae) )
+ ROM_LOAD( "24-65.u9", 0x7000, 0x1000, CRC(4eb99af3) SHA1(1af1a27f2575290aa0dce88840cd8be516a542ff) )
ROM_REGION( 0x1000, "gfx1", 0 )
- ROM_LOAD( "hlcg0.u67", 0x0000, 0x1000, CRC(b2871c94) SHA1(001c376479701efa4542c88f0eca9e13c694667c) )
+ ROM_LOAD( "hlcg0.u67", 0x0000, 0x1000, CRC(b2871c94) SHA1(001c376479701efa4542c88f0eca9e13c694667c) )
ROM_REGION( 0x3000, "gfx2", 0 )
- ROM_LOAD( "hlcgc.u70", 0x0000, 0x1000, CRC(6af901d9) SHA1(f9fcfcf2c92d1a3ef9a18b4e3e680c9de4829533) )
- ROM_LOAD( "hlcgb.u69", 0x1000, 0x1000, CRC(db2d3eb7) SHA1(45f686edf7093069b44e895547c7ec67f820447d) )
- ROM_LOAD( "hlcga.u68", 0x2000, 0x1000, CRC(a7e583fd) SHA1(d3b0aa9e24b6aedf24af55e5b149ab75d6f01a36) )
+ ROM_LOAD( "hlcgc.u70", 0x0000, 0x1000, CRC(6af901d9) SHA1(f9fcfcf2c92d1a3ef9a18b4e3e680c9de4829533) )
+ ROM_LOAD( "hlcgb.u69", 0x1000, 0x1000, CRC(db2d3eb7) SHA1(45f686edf7093069b44e895547c7ec67f820447d) )
+ ROM_LOAD( "hlcga.u68", 0x2000, 0x1000, CRC(a7e583fd) SHA1(d3b0aa9e24b6aedf24af55e5b149ab75d6f01a36) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "hlclr.u28", 0x0000, 0x0100, CRC(1c994cda) SHA1(5c8698b4c5e43146106c9da8a306e3099b26ca2d) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "hlclr.u28", 0x0000, 0x0100, CRC(1c994cda) SHA1(5c8698b4c5e43146106c9da8a306e3099b26ca2d) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg272a ) /* Cal Omega v27.2 (Keno (amusement)) */
+ROM_START( comg272a ) /* Cal Omega v27.2 (Keno (amusement)) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "27-22.u6", 0x2000, 0x0800, CRC(db3e1918) SHA1(4b8f33103f093ddbe750b536abc4545cf262d2e5) )
- ROM_LOAD( "27-23.u7", 0x2800, 0x0800, CRC(c9e9cfd8) SHA1(dd0615ac579331330bda070f9ed68d7972436781) )
- ROM_LOAD( "27-24.u8", 0x3000, 0x0800, CRC(d3fbab7f) SHA1(805510356bd52cf698a838daeaf16096eedcfd37) )
- ROM_LOAD( "27-25.u9", 0x3800, 0x0800, CRC(22dc5b5e) SHA1(4442b7ac0516fdad8c81687fa9683eeace5b6c2d) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "27-22.u6", 0x2000, 0x0800, CRC(db3e1918) SHA1(4b8f33103f093ddbe750b536abc4545cf262d2e5) )
+ ROM_LOAD( "27-23.u7", 0x2800, 0x0800, CRC(c9e9cfd8) SHA1(dd0615ac579331330bda070f9ed68d7972436781) )
+ ROM_LOAD( "27-24.u8", 0x3000, 0x0800, CRC(d3fbab7f) SHA1(805510356bd52cf698a838daeaf16096eedcfd37) )
+ ROM_LOAD( "27-25.u9", 0x3800, 0x0800, CRC(22dc5b5e) SHA1(4442b7ac0516fdad8c81687fa9683eeace5b6c2d) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
- ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
- ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
+ ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
+ ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
+ ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg272b ) /* Cal Omega v27.2 (Keno (gaming)) */
+ROM_START( comg272b ) /* Cal Omega v27.2 (Keno (gaming)) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "27-22m.u6", 0x2000, 0x0800, CRC(6dc6ec9c) SHA1(dd80d0e544ad51d1b950970e735d7ce1e05062e3) )
- ROM_LOAD( "27-23m.u7", 0x2800, 0x0800, CRC(242ce2ed) SHA1(e114cec7eb7554de14561e7c0e6aed01d7e72ca6) )
- ROM_LOAD( "27-24m.u8", 0x3000, 0x0800, CRC(e191b0e1) SHA1(cc476efa194c1b2cd0035e9b4725e81d3a6f381c) )
- ROM_LOAD( "27-25m.u9", 0x3800, 0x0800, CRC(4152b53d) SHA1(6fe577045d03362b8b988c7a9cd0542c9a20d7a7) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "27-22m.u6", 0x2000, 0x0800, CRC(6dc6ec9c) SHA1(dd80d0e544ad51d1b950970e735d7ce1e05062e3) )
+ ROM_LOAD( "27-23m.u7", 0x2800, 0x0800, CRC(242ce2ed) SHA1(e114cec7eb7554de14561e7c0e6aed01d7e72ca6) )
+ ROM_LOAD( "27-24m.u8", 0x3000, 0x0800, CRC(e191b0e1) SHA1(cc476efa194c1b2cd0035e9b4725e81d3a6f381c) )
+ ROM_LOAD( "27-25m.u9", 0x3800, 0x0800, CRC(4152b53d) SHA1(6fe577045d03362b8b988c7a9cd0542c9a20d7a7) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x0000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
- ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
- ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
+ ROM_LOAD( "kcgc.u70", 0x0000, 0x0800, CRC(fb721236) SHA1(33ef355913b8acb5017a24ca1c46dec1c391a528) )
+ ROM_LOAD( "kcgb.u69", 0x0800, 0x0800, CRC(2b9205d9) SHA1(48ed4dcef38e9567246f09bd9bea5bf291e7e1b9) )
+ ROM_LOAD( "kcga.u68", 0x1000, 0x0800, CRC(c4491e35) SHA1(44acb8bd7af287350b99d159b6f83015fcdbd93c) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "pokclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
/*
@@ -3666,68 +3666,68 @@ ROM_END
*/
-ROM_START( comg5108 ) /* Cal Omega v51.08 (Gaming Poker) */
+ROM_START( comg5108 ) /* Cal Omega v51.08 (Gaming Poker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "epr1.u28", 0x6000, 0x2000, CRC(3d6abca9) SHA1(54a802f89bd64380abf269a2b507513c8db5319b) ) /* checked in offset $8034 */
- ROM_LOAD( "epr2.u29", 0x8000, 0x2000, CRC(72cf8376) SHA1(fa1682244402e1b36164c670241f585bf4017ad9) )
- ROM_LOAD( "epr3.u30", 0xa000, 0x2000, CRC(c79957e5) SHA1(64afdedf5369d56790e9ae7a8d3be5f52125ca1f) )
- ROM_LOAD( "epr4.u31", 0xc000, 0x2000, CRC(eb0b0a86) SHA1(4fd29700db8fe183392cc66a54a128657c7e05e0) )
- ROM_LOAD( "epr5.u32", 0xe000, 0x2000, CRC(b0981cea) SHA1(e56278176df1a6c20acfb8cbf2f5e7a946d93111) )
+ ROM_LOAD( "epr1.u28", 0x6000, 0x2000, CRC(3d6abca9) SHA1(54a802f89bd64380abf269a2b507513c8db5319b) ) /* checked in offset $8034 */
+ ROM_LOAD( "epr2.u29", 0x8000, 0x2000, CRC(72cf8376) SHA1(fa1682244402e1b36164c670241f585bf4017ad9) )
+ ROM_LOAD( "epr3.u30", 0xa000, 0x2000, CRC(c79957e5) SHA1(64afdedf5369d56790e9ae7a8d3be5f52125ca1f) )
+ ROM_LOAD( "epr4.u31", 0xc000, 0x2000, CRC(eb0b0a86) SHA1(4fd29700db8fe183392cc66a54a128657c7e05e0) )
+ ROM_LOAD( "epr5.u32", 0xe000, 0x2000, CRC(b0981cea) SHA1(e56278176df1a6c20acfb8cbf2f5e7a946d93111) )
ROM_REGION( 0x6000, "gfx1", 0 )
- ROM_LOAD( "cg2c.u4", 0x0000, 0x2000, CRC(dc77a6db) SHA1(3af5f568de3f2af1a6bbb00d673bdbff16c87a40) )
- ROM_LOAD( "cg2b.u5", 0x2000, 0x2000, CRC(1f79f76d) SHA1(b2bce60e24dd61977f7bf6ee4705ca7d104ab388) )
- ROM_LOAD( "cg2a.u6", 0x4000, 0x2000, CRC(d5fd9fc2) SHA1(68472e7271f835656197109620bb3988fc52308a) )
+ ROM_LOAD( "cg2c.u4", 0x0000, 0x2000, CRC(dc77a6db) SHA1(3af5f568de3f2af1a6bbb00d673bdbff16c87a40) )
+ ROM_LOAD( "cg2b.u5", 0x2000, 0x2000, CRC(1f79f76d) SHA1(b2bce60e24dd61977f7bf6ee4705ca7d104ab388) )
+ ROM_LOAD( "cg2a.u6", 0x4000, 0x2000, CRC(d5fd9fc2) SHA1(68472e7271f835656197109620bb3988fc52308a) )
- ROM_REGION( 0x400, "proms", 0 ) /* from other set */
- ROM_LOAD( "bprom.u16", 0x0000, 0x0200, CRC(a6d43709) SHA1(cbff2cb60137462dc0b7c7719a64574218d96c62) )
- ROM_RELOAD( 0x0200, 0x0200 )
+ ROM_REGION( 0x400, "proms", 0 ) /* from other set */
+ ROM_LOAD( "bprom.u16", 0x0000, 0x0200, CRC(a6d43709) SHA1(cbff2cb60137462dc0b7c7719a64574218d96c62) )
+ ROM_RELOAD( 0x0200, 0x0200 )
ROM_END
/*********************** Diagnostic PROMs ***********************/
-ROM_START( comg903d ) /* Cal Omega 903d (System 903 diag.PROM) */
+ROM_START( comg903d ) /* Cal Omega 903d (System 903 diag.PROM) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket (requested by the manual) */
- ROM_FILL( 0x2000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
- ROM_FILL( 0x2800, 0x0800, 0xff ) /* empty socket (requested by the manual) */
- ROM_FILL( 0x3000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
- ROM_LOAD( "903diag.u9", 0x3800, 0x0800, CRC(f8092cea) SHA1(0c864419a4e1956c030b185739eca59313f20e8a) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x2000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x2800, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x3000, 0x0800, 0xff ) /* empty socket (requested by the manual) */
+ ROM_LOAD( "903diag.u9", 0x3800, 0x0800, CRC(f8092cea) SHA1(0c864419a4e1956c030b185739eca59313f20e8a) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "testcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "testcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_FILL( 0x0000, 0x1800, 0xff ) /* removed all ROMs (requested by the manual) */
+ ROM_FILL( 0x0000, 0x1800, 0xff ) /* removed all ROMs (requested by the manual) */
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "testclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "testclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( comg905d ) /* Cal Omega 905d (System 905 diag.PROM) */
+ROM_START( comg905d ) /* Cal Omega 905d (System 905 diag.PROM) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
- ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
- ROM_FILL( 0x5000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
- ROM_FILL( 0x6000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
- ROM_LOAD( "905diag.u9", 0x7000, 0x1000, CRC(6c20dbc7) SHA1(dbab0d2cf07bade2e3619bd5f29d406f3498a278) )
+ ROM_FILL( 0x3000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x4000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x5000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
+ ROM_FILL( 0x6000, 0x1000, 0xff ) /* empty socket (requested by the manual) */
+ ROM_LOAD( "905diag.u9", 0x7000, 0x1000, CRC(6c20dbc7) SHA1(dbab0d2cf07bade2e3619bd5f29d406f3498a278) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "testcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
+ ROM_LOAD( "testcg0.u67", 0x0000, 0x0800, CRC(b626ad89) SHA1(551b75f4559d11a4f8f56e38982114a21c77d4e7) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_FILL( 0x0000, 0x1800, 0xff ) /* removed all ROMs (requested by the manual) */
+ ROM_FILL( 0x0000, 0x1800, 0xff ) /* removed all ROMs (requested by the manual) */
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "testclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "testclr.u28", 0x0000, 0x0100, CRC(a8191ef7) SHA1(d6f777980179ab091e2713ee815d46bf9c0ac486) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
@@ -3763,140 +3763,140 @@ ROM_END
ROM_START( elgrande )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
- ROM_LOAD( "d1.u6", 0x2000, 0x0800, CRC(8b6b505c) SHA1(5f89bb1b50b9dfacf23c50e3016b9258b0e15084) )
- ROM_LOAD( "d1.u7", 0x2800, 0x0800, CRC(d803a978) SHA1(682b73c968ef57007397d3e5eb0e78a97722da5e) )
- ROM_LOAD( "d1.u8", 0x3000, 0x0800, CRC(291fa93b) SHA1(1d57f736b11ddc916effde78e2cd08c313a62901) )
- ROM_LOAD( "d1.u9", 0x3800, 0x0800, CRC(ec3309a7) SHA1(b8ab7f3f2edf2658ea633b2b557ea37517615399) )
+ ROM_FILL( 0x1800, 0x0800, 0xff ) /* empty socket */
+ ROM_LOAD( "d1.u6", 0x2000, 0x0800, CRC(8b6b505c) SHA1(5f89bb1b50b9dfacf23c50e3016b9258b0e15084) )
+ ROM_LOAD( "d1.u7", 0x2800, 0x0800, CRC(d803a978) SHA1(682b73c968ef57007397d3e5eb0e78a97722da5e) )
+ ROM_LOAD( "d1.u8", 0x3000, 0x0800, CRC(291fa93b) SHA1(1d57f736b11ddc916effde78e2cd08c313a62901) )
+ ROM_LOAD( "d1.u9", 0x3800, 0x0800, CRC(ec3309a7) SHA1(b8ab7f3f2edf2658ea633b2b557ea37517615399) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "d1.u67", 0x0000, 0x0800, CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
+ ROM_LOAD( "d1.u67", 0x0000, 0x0800, CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "d1.u70", 0x0000, 0x0800, CRC(4f12d424) SHA1(c43f1df757ac7dd76875245e73d47451d1f7f6f2) )
- ROM_LOAD( "d1.u69", 0x0800, 0x0800, CRC(ed3c83b7) SHA1(93e2134de3d9f79a6cff0391c1a32fccd3840c3f) )
- ROM_LOAD( "d1.u68", 0x1000, 0x0800, CRC(81d07f12) SHA1(c14226f8bc1d08fcdfc5cb71fcaf6e070fa2d4a8) )
+ ROM_LOAD( "d1.u70", 0x0000, 0x0800, CRC(4f12d424) SHA1(c43f1df757ac7dd76875245e73d47451d1f7f6f2) )
+ ROM_LOAD( "d1.u69", 0x0800, 0x0800, CRC(ed3c83b7) SHA1(93e2134de3d9f79a6cff0391c1a32fccd3840c3f) )
+ ROM_LOAD( "d1.u68", 0x1000, 0x0800, CRC(81d07f12) SHA1(c14226f8bc1d08fcdfc5cb71fcaf6e070fa2d4a8) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "d1.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "d1.u28", 0x0000, 0x0100, CRC(a26a8fae) SHA1(d570fe9443a0912bd34b81ac4c3e4c5f8901f523) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( jjpoker ) /* tuni-83 */
+ROM_START( jjpoker ) /* tuni-83 */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "tuni-83.u5", 0x1800, 0x0800, CRC(46c542ee) SHA1(0b3832d8ab69427298de03d18984a220a9a35c30) )
- ROM_LOAD( "tuni-83.u6", 0x2000, 0x0800, CRC(e24b392a) SHA1(3b705b5cc60d2b33375f52958b72e70ce36fa216) )
- ROM_LOAD( "tuni-83.u7", 0x2800, 0x0800, CRC(c49e4e37) SHA1(d70321e87e6192bc65950153c13c049a52000148) )
- ROM_LOAD( "tuni-83.u8", 0x3000, 0x0800, CRC(7a20d8ff) SHA1(d9c08c5dd5fe8d9f67d4fe031b47c3dbfcc717c1) )
- ROM_LOAD( "tuni-83.u9", 0x3800, 0x0800, CRC(8cba33a6) SHA1(6998a47521f8d40425f68444bb9a45df72276c6b) )
+ ROM_LOAD( "tuni-83.u5", 0x1800, 0x0800, CRC(46c542ee) SHA1(0b3832d8ab69427298de03d18984a220a9a35c30) )
+ ROM_LOAD( "tuni-83.u6", 0x2000, 0x0800, CRC(e24b392a) SHA1(3b705b5cc60d2b33375f52958b72e70ce36fa216) )
+ ROM_LOAD( "tuni-83.u7", 0x2800, 0x0800, CRC(c49e4e37) SHA1(d70321e87e6192bc65950153c13c049a52000148) )
+ ROM_LOAD( "tuni-83.u8", 0x3000, 0x0800, CRC(7a20d8ff) SHA1(d9c08c5dd5fe8d9f67d4fe031b47c3dbfcc717c1) )
+ ROM_LOAD( "tuni-83.u9", 0x3800, 0x0800, CRC(8cba33a6) SHA1(6998a47521f8d40425f68444bb9a45df72276c6b) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
+ ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
- ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
- ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
+ ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
+ ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
+ ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( jjpokerb ) /* pokr_j */
+ROM_START( jjpokerb ) /* pokr_j */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pokr_j.01.u5", 0x1800, 0x0800, CRC(d0004eda) SHA1(2fd39213e3028066fd4f9b8db206f036b566e2f7) )
- ROM_LOAD( "pokr_j.02.u6", 0x2000, 0x0800, CRC(6809ccd9) SHA1(2573194a13ddf0270bccd456bda84b822036c660) )
- ROM_LOAD( "pokr_j.03.u7", 0x2800, 0x0800, CRC(20c4519a) SHA1(c58662a6404060c2d1e60953a0bf69fee5657694) )
- ROM_LOAD( "pokr_j.04.u8", 0x3000, 0x0800, CRC(d127fcbf) SHA1(ebf8ab47233c2cfe54cb8e36ec2ff7bf5f8631a5) )
- ROM_LOAD( "pokr_j.05.u9", 0x3800, 0x0800, CRC(bb376541) SHA1(1b4f91cef36d6decd2b1da9765af4e5ec976b2fc) )
+ ROM_LOAD( "pokr_j.01.u5", 0x1800, 0x0800, CRC(d0004eda) SHA1(2fd39213e3028066fd4f9b8db206f036b566e2f7) )
+ ROM_LOAD( "pokr_j.02.u6", 0x2000, 0x0800, CRC(6809ccd9) SHA1(2573194a13ddf0270bccd456bda84b822036c660) )
+ ROM_LOAD( "pokr_j.03.u7", 0x2800, 0x0800, CRC(20c4519a) SHA1(c58662a6404060c2d1e60953a0bf69fee5657694) )
+ ROM_LOAD( "pokr_j.04.u8", 0x3000, 0x0800, CRC(d127fcbf) SHA1(ebf8ab47233c2cfe54cb8e36ec2ff7bf5f8631a5) )
+ ROM_LOAD( "pokr_j.05.u9", 0x3800, 0x0800, CRC(bb376541) SHA1(1b4f91cef36d6decd2b1da9765af4e5ec976b2fc) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
+ ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
- ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
- ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
+ ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
+ ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
+ ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( ssipkr24 ) /* pokr02_4 (gfx and prom from jjpoker) */
+ROM_START( ssipkr24 ) /* pokr02_4 (gfx and prom from jjpoker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pokr02_4.01.u5", 0x1800, 0x0800, CRC(8adf1d6d) SHA1(d83677eed9426841767d947919f6da671b5fbed4) )
- ROM_LOAD( "pokr02_4.02.u6", 0x2000, 0x0800, CRC(5298a01c) SHA1(a0085498699bc15cc6ada9e4e9541bd84b97eeae) )
- ROM_LOAD( "pokr02_4.03.u7", 0x2800, 0x0800, CRC(30b5ead6) SHA1(7650ebb5f17eae17f3a0ddee67432a7f9dbf1c13) )
- ROM_LOAD( "pokr02_4.04.u8", 0x3000, 0x0800, CRC(ade57860) SHA1(ee80e97302a4d6371fde5bacb58747075976f617) )
- ROM_LOAD( "pokr02_4.05.u9", 0x3800, 0x0800, CRC(ad15250b) SHA1(d006657df1d2e01e33a3efb906e4532a2cd5b85d) )
+ ROM_LOAD( "pokr02_4.01.u5", 0x1800, 0x0800, CRC(8adf1d6d) SHA1(d83677eed9426841767d947919f6da671b5fbed4) )
+ ROM_LOAD( "pokr02_4.02.u6", 0x2000, 0x0800, CRC(5298a01c) SHA1(a0085498699bc15cc6ada9e4e9541bd84b97eeae) )
+ ROM_LOAD( "pokr02_4.03.u7", 0x2800, 0x0800, CRC(30b5ead6) SHA1(7650ebb5f17eae17f3a0ddee67432a7f9dbf1c13) )
+ ROM_LOAD( "pokr02_4.04.u8", 0x3000, 0x0800, CRC(ade57860) SHA1(ee80e97302a4d6371fde5bacb58747075976f617) )
+ ROM_LOAD( "pokr02_4.05.u9", 0x3800, 0x0800, CRC(ad15250b) SHA1(d006657df1d2e01e33a3efb906e4532a2cd5b85d) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, BAD_DUMP CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
+ ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, BAD_DUMP CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, BAD_DUMP CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
- ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, BAD_DUMP CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
- ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, BAD_DUMP CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
+ ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, BAD_DUMP CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
+ ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, BAD_DUMP CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
+ ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, BAD_DUMP CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, BAD_DUMP CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, BAD_DUMP CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( ssipkr30 ) /* pokr03_0 (gfx and prom from jjpoker) */
+ROM_START( ssipkr30 ) /* pokr03_0 (gfx and prom from jjpoker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "pokr03_0.01.u5", 0x1800, 0x0800, CRC(db9581fe) SHA1(605b254e0ebb96423eb522ce75242083d70f01ca) )
- ROM_LOAD( "pokr03_0.02.u6", 0x2000, 0x0800, CRC(861243ad) SHA1(290eba5c820177669e5adeac1e2f172b73789542) )
- ROM_LOAD( "pokr03_0.03.u7", 0x2800, 0x0800, CRC(b5154dc0) SHA1(3b517a8d82db62be68427378fe92f0225174ba00) )
- ROM_LOAD( "pokr03_0.04.u8", 0x3000, 0x0800, CRC(93bdef84) SHA1(3ea10a4d4d164f63082fbff4ae9b9fd14b5bcb27) )
- ROM_LOAD( "pokr03_0.05.u9", 0x3800, 0x0800, CRC(bd2ffd49) SHA1(b60c3866b11acd5053ec6dc5c37c0e322cb29478) )
+ ROM_LOAD( "pokr03_0.01.u5", 0x1800, 0x0800, CRC(db9581fe) SHA1(605b254e0ebb96423eb522ce75242083d70f01ca) )
+ ROM_LOAD( "pokr03_0.02.u6", 0x2000, 0x0800, CRC(861243ad) SHA1(290eba5c820177669e5adeac1e2f172b73789542) )
+ ROM_LOAD( "pokr03_0.03.u7", 0x2800, 0x0800, CRC(b5154dc0) SHA1(3b517a8d82db62be68427378fe92f0225174ba00) )
+ ROM_LOAD( "pokr03_0.04.u8", 0x3000, 0x0800, CRC(93bdef84) SHA1(3ea10a4d4d164f63082fbff4ae9b9fd14b5bcb27) )
+ ROM_LOAD( "pokr03_0.05.u9", 0x3800, 0x0800, CRC(bd2ffd49) SHA1(b60c3866b11acd5053ec6dc5c37c0e322cb29478) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, BAD_DUMP CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
+ ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, BAD_DUMP CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, BAD_DUMP CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
- ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, BAD_DUMP CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
- ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, BAD_DUMP CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
+ ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, BAD_DUMP CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
+ ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, BAD_DUMP CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
+ ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, BAD_DUMP CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, BAD_DUMP CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, BAD_DUMP CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
-ROM_START( ssipkr40 ) /* (gfx and prom from jjpoker) */
+ROM_START( ssipkr40 ) /* (gfx and prom from jjpoker) */
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "40-1.903.u5", 0x1800, 0x0800, CRC(461eb68c) SHA1(54781670930c723c993ca9ad80e06e38ddd2f035) )
- ROM_LOAD( "40-2.903.u6", 0x2000, 0x0800, CRC(099094a9) SHA1(c5a6ccb5ec0bebc79ef0b9c98595ef87c65ce361) )
- ROM_LOAD( "40-3.903.u7", 0x2800, 0x0800, CRC(1c923554) SHA1(d0050a8833f9a1a5fa0598b06a7bb265f0e814e4) )
- ROM_LOAD( "40-4.903.u8", 0x3000, 0x0800, CRC(552bf73d) SHA1(bf9197aab029c8dfaac88abcbda57547845323da) )
- ROM_LOAD( "40-5.903.u9", 0x3800, 0x0800, CRC(4d388d13) SHA1(8d46d6c227fe22f0433f02909b172f60cada1dd4) )
+ ROM_LOAD( "40-1.903.u5", 0x1800, 0x0800, CRC(461eb68c) SHA1(54781670930c723c993ca9ad80e06e38ddd2f035) )
+ ROM_LOAD( "40-2.903.u6", 0x2000, 0x0800, CRC(099094a9) SHA1(c5a6ccb5ec0bebc79ef0b9c98595ef87c65ce361) )
+ ROM_LOAD( "40-3.903.u7", 0x2800, 0x0800, CRC(1c923554) SHA1(d0050a8833f9a1a5fa0598b06a7bb265f0e814e4) )
+ ROM_LOAD( "40-4.903.u8", 0x3000, 0x0800, CRC(552bf73d) SHA1(bf9197aab029c8dfaac88abcbda57547845323da) )
+ ROM_LOAD( "40-5.903.u9", 0x3800, 0x0800, CRC(4d388d13) SHA1(8d46d6c227fe22f0433f02909b172f60cada1dd4) )
ROM_REGION( 0x0800, "gfx1", 0 )
- ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, BAD_DUMP CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
+ ROM_LOAD( "tuni-83.u67", 0x0000, 0x0800, BAD_DUMP CRC(a8ac979d) SHA1(f7299d3f7c4aded028a65ae4365c174f0e953824) )
ROM_REGION( 0x1800, "gfx2", 0 )
- ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, BAD_DUMP CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
- ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, BAD_DUMP CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
- ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, BAD_DUMP CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
+ ROM_LOAD( "tuni-83.u70", 0x0000, 0x0800, BAD_DUMP CRC(c131bf96) SHA1(3fb6717955a7312061395e5770c0f1ca9716d77c) )
+ ROM_LOAD( "tuni-83.u69", 0x0800, 0x0800, BAD_DUMP CRC(3483b4fb) SHA1(ac04b68c5fb8f8f142582181ad13bee87636cead) )
+ ROM_LOAD( "tuni-83.u68", 0x1000, 0x0800, BAD_DUMP CRC(e055a148) SHA1(d80e4330dce96b98df5bec731876f185476d6058) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, BAD_DUMP CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
- ROM_RELOAD( 0x0100, 0x0100 )
- ROM_RELOAD( 0x0200, 0x0100 )
- ROM_RELOAD( 0x0300, 0x0100 )
+ ROM_LOAD( "tunipoker.u28", 0x0000, 0x0100, BAD_DUMP CRC(5101a33b) SHA1(a36bc421064d0ed96beb27b549f69adce0a553c2) )
+ ROM_RELOAD( 0x0100, 0x0100 )
+ ROM_RELOAD( 0x0200, 0x0100 )
+ ROM_RELOAD( 0x0300, 0x0100 )
ROM_END
@@ -3913,7 +3913,7 @@ DRIVER_INIT_MEMBER(calomega_state,standard)
for (x = 0x0000; x < 0x0400; x++)
{
if (BPR[x] == 0x07)
- BPR[x] = 0x04; /* blue background */
+ BPR[x] = 0x04; /* blue background */
}
}
@@ -3939,7 +3939,7 @@ DRIVER_INIT_MEMBER(calomega_state,jjpoker)
for (x = 0x0000; x < 0x0400; x++)
{
if (BPR[x] == 0x02)
- BPR[x] = 0x00; /* black background */
+ BPR[x] = 0x00; /* black background */
}
}
@@ -3952,13 +3952,13 @@ DRIVER_INIT_MEMBER(calomega_state,comg080)
for (x = 0x0000; x < 0x0400; x++)
{
if (BPR[x] == 0x07)
- BPR[x] = 0x04; /* blue background */
+ BPR[x] = 0x04; /* blue background */
}
/* Injecting missing Start and NMI vectors...
- Start = $2042; NMI = $26f8;
- Also a fake vector at $3ff8-$3ff9. The code checks these values to continue.
- */
+ Start = $2042; NMI = $26f8;
+ Also a fake vector at $3ff8-$3ff9. The code checks these values to continue.
+ */
UINT8 *PRGROM = machine().root_device().memregion( "maincpu" )->base();
PRGROM[0x3ff8] = 0x8e; /* checked by code */
@@ -3978,11 +3978,11 @@ DRIVER_INIT_MEMBER(calomega_state,comg080)
/* YEAR NAME PARENT MACHINE INPUT INIT ROT COMPANY FULLNAME FLAGS */
GAME( 1981, comg074, 0, sys903, comg074, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 7.4 (Gaming Poker, W.Export)", 0 )
GAME( 1981, comg076, 0, sys903, comg076, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 7.6 (Arcade Poker)", 0 )
-GAME( 1981, comg079, 0, sys903, comg076, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 7.9 (Arcade Poker)", GAME_NOT_WORKING ) /* bad dump */
-GAME( 1981, comg080, 0, sys903, arcadebj, calomega_state, comg080, ROT0, "Cal Omega Inc.", "Cal Omega - Game 8.0 (Arcade Black Jack)", 0 ) /* bad dump */
+GAME( 1981, comg079, 0, sys903, comg076, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 7.9 (Arcade Poker)", GAME_NOT_WORKING ) /* bad dump */
+GAME( 1981, comg080, 0, sys903, arcadebj, calomega_state, comg080, ROT0, "Cal Omega Inc.", "Cal Omega - Game 8.0 (Arcade Black Jack)", 0 ) /* bad dump */
GAME( 1981, comg094, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 9.4 (Keno)", GAME_NOT_WORKING )
GAME( 1982, comg107, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 10.7c (Big Game)", GAME_NOT_WORKING )
-GAME( 1982, comg123, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 12.3 (Ticket Poker)", GAME_NOT_WORKING ) /* bad dump */
+GAME( 1982, comg123, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 12.3 (Ticket Poker)", GAME_NOT_WORKING ) /* bad dump */
GAME( 1982, comg125, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 12.5 (Bingo)", GAME_NOT_WORKING )
GAME( 1982, comg127, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 12.7 (Keno)", GAME_NOT_WORKING )
GAME( 1982, comg128, 0, sys903, comg128, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 12.8 (Arcade Game)", 0 )
@@ -3990,7 +3990,7 @@ GAME( 1982, comg134, 0, sys903, stand903, calomega_state, standard, RO
GAME( 1982, comg145, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 14.5 (Pixels)", GAME_NOT_WORKING )
GAME( 1983, comg157, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 15.7 (Double-Draw Poker)", GAME_NOT_WORKING )
GAME( 1983, comg159, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 15.9 (Wild Double-Up)", GAME_NOT_WORKING )
-GAME( 1983, comg164, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 16.4 (Keno)", GAME_NOT_WORKING ) /* incomplete dump */
+GAME( 1983, comg164, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 16.4 (Keno)", GAME_NOT_WORKING ) /* incomplete dump */
GAME( 1983, comg168, 0, sys903, stand903, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 16.8 (Keno)", GAME_NOT_WORKING )
GAME( 1983, comg172, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 17.2 (Double Double Poker)", GAME_NOT_WORKING )
GAME( 1984, comg175, 0, sys903, gdrwpkrd, calomega_state, standard, ROT0, "Cal Omega / Casino Electronics Inc.", "Cal Omega - Game 17.51 (Gaming Draw Poker)", 0 )
@@ -3999,11 +3999,11 @@ GAME( 1982, comg181, 0, sys903, stand903, calomega_state, standard, RO
GAME( 1983, comg183, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 18.3 (Pixels)", GAME_NOT_WORKING )
GAME( 1983, comg185, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 18.5 (Pixels)", GAME_NOT_WORKING )
GAME( 1983, comg186, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 18.6 (Pixels)", GAME_NOT_WORKING )
-GAME( 1983, comg187, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 18.7 (Amusement Poker)", GAME_NOT_WORKING ) /* bad dump */
+GAME( 1983, comg187, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 18.7 (Amusement Poker)", GAME_NOT_WORKING ) /* bad dump */
GAME( 1984, comg204, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 20.4 (Super Blackjack)", GAME_NOT_WORKING )
GAME( 1984, comg208, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 20.8 (Winner's Choice)", GAME_NOT_WORKING )
GAME( 1984, comg227, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 22.7 (Amusement Poker, d/d)", GAME_NOT_WORKING )
-GAME( 1984, comg230, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 23.0 (FC Bingo (4-card))", GAME_NOT_WORKING ) /* bad dump */
+GAME( 1984, comg230, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 23.0 (FC Bingo (4-card))", GAME_NOT_WORKING ) /* bad dump */
GAME( 1984, comg236, 0, sys905, stand905, calomega_state, standard, ROT0, "Cal Omega Inc.", "Cal Omega - Game 23.6 (Hotline)", GAME_NOT_WORKING )
GAME( 1985, comg239, 0, sys903, gdrwpkrd, calomega_state, standard, ROT0, "Cal Omega / Casino Electronics Inc.", "Cal Omega - Game 23.9 (Gaming Draw Poker)", 0 )
GAME( 1985, comg240, 0, sys903, gdrwpkrh, calomega_state, standard, ROT0, "Cal Omega / Casino Electronics Inc.", "Cal Omega - Game 24.0 (Gaming Draw Poker, hold)", 0 )
diff --git a/src/mame/drivers/calorie.c b/src/mame/drivers/calorie.c
index dbd33958a24..58952c632f6 100644
--- a/src/mame/drivers/calorie.c
+++ b/src/mame/drivers/calorie.c
@@ -191,7 +191,7 @@ UINT32 calorie_state::screen_update_calorie(screen_device &screen, bitmap_ind16
if (m_sprites[x + 1] & 0x10)
{
- /* 32x32 sprites */
+ /* 32x32 sprites */
drawgfx_transpen(bitmap, cliprect, machine().gfx[3], tileno | 0x40, color, flipx, flipy, xpos, ypos - 31, 0);
}
else
@@ -440,11 +440,11 @@ void calorie_state::machine_reset()
static MACHINE_CONFIG_START( calorie, calorie_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,4000000) /* 4 MHz */
+ MCFG_CPU_ADD("maincpu", Z80,4000000) /* 4 MHz */
MCFG_CPU_PROGRAM_MAP(calorie_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", calorie_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80,3000000) /* 3 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80,3000000) /* 3 MHz */
MCFG_CPU_PROGRAM_MAP(calorie_sound_map)
MCFG_CPU_IO_MAP(calorie_sound_io_map)
MCFG_CPU_PERIODIC_INT_DRIVER(calorie_state, irq0_line_hold, 64)
diff --git a/src/mame/drivers/canyon.c b/src/mame/drivers/canyon.c
index 18e2fb73c34..0727234bd86 100644
--- a/src/mame/drivers/canyon.c
+++ b/src/mame/drivers/canyon.c
@@ -135,8 +135,8 @@ static INPUT_PORTS_START( canyon )
PORT_DIPSETTING( 0x01, DEF_STR( Spanish ) )
PORT_DIPSETTING( 0x02, DEF_STR( French ) )
PORT_DIPSETTING( 0x03, DEF_STR( German ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW:3" ) /* Manual says these are unused */
- PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW:4" ) /* Manual says these are unused */
+ PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x04, "SW:3" ) /* Manual says these are unused */
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW:4" ) /* Manual says these are unused */
PORT_DIPNAME( 0x30, 0x00, "Misses Per Play" ) PORT_DIPLOCATION("SW:5,6")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x10, "4" )
@@ -285,7 +285,7 @@ ROM_START( canyon )
ROM_LOAD_NIB_HIGH( "9505-01.n5", 0x0000, 0x0100, CRC(60507c07) SHA1(fcb76890cbaa37e02392bf8b97f7be9a6fe6a721) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "9491-01.j6", 0x0000, 0x0100, CRC(b8094b4c) SHA1(82dc6799a19984f3b204ee3aeeb007e55afc8be3) ) /* sync (not used) */
+ ROM_LOAD( "9491-01.j6", 0x0000, 0x0100, CRC(b8094b4c) SHA1(82dc6799a19984f3b204ee3aeeb007e55afc8be3) ) /* sync (not used) */
ROM_END
@@ -304,7 +304,7 @@ ROM_START( canyonp )
ROM_LOAD_NIB_HIGH( "9505-01.n5", 0x0000, 0x0100, CRC(60507c07) SHA1(fcb76890cbaa37e02392bf8b97f7be9a6fe6a721) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "9491-01.j6", 0x0000, 0x0100, CRC(b8094b4c) SHA1(82dc6799a19984f3b204ee3aeeb007e55afc8be3) ) /* sync (not used) */
+ ROM_LOAD( "9491-01.j6", 0x0000, 0x0100, CRC(b8094b4c) SHA1(82dc6799a19984f3b204ee3aeeb007e55afc8be3) ) /* sync (not used) */
ROM_END
diff --git a/src/mame/drivers/capbowl.c b/src/mame/drivers/capbowl.c
index cbad9522402..05f43be2a76 100644
--- a/src/mame/drivers/capbowl.c
+++ b/src/mame/drivers/capbowl.c
@@ -94,7 +94,7 @@
#include "sound/2203intf.h"
#include "sound/dac.h"
-#define MASTER_CLOCK 8000000 /* 8MHz crystal */
+#define MASTER_CLOCK 8000000 /* 8MHz crystal */
/*************************************
@@ -107,8 +107,8 @@
INTERRUPT_GEN_MEMBER(capbowl_state::capbowl_interrupt)
{
- if (machine().root_device().ioport("SERVICE")->read() & 1) /* get status of the F2 key */
- device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE); /* trigger self test */
+ if (machine().root_device().ioport("SERVICE")->read() & 1) /* get status of the F2 key */
+ device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE); /* trigger self test */
}
@@ -212,8 +212,8 @@ static void firqhandler( device_t *device, int irq )
void capbowl_state::init_nvram(nvram_device &nvram, void *base, size_t size)
{
/* invalidate nvram to make the game initialize it.
- A 0xff fill will cause the game to malfunction, so we use a
- 0x01 fill which seems OK */
+ A 0xff fill will cause the game to malfunction, so we use a
+ 0x01 fill which seems OK */
memset(base, 0x01, size);
}
@@ -232,9 +232,9 @@ static ADDRESS_MAP_START( capbowl_map, AS_PROGRAM, 8, capbowl_state )
AM_RANGE(0x5000, 0x57ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x5800, 0x5fff) AM_READWRITE(capbowl_tms34061_r, capbowl_tms34061_w)
AM_RANGE(0x6000, 0x6000) AM_WRITE(capbowl_sndcmd_w)
- AM_RANGE(0x6800, 0x6800) AM_WRITE(track_reset_w) /* + watchdog */
- AM_RANGE(0x7000, 0x7000) AM_READ(track_0_r) /* + other inputs */
- AM_RANGE(0x7800, 0x7800) AM_READ(track_1_r) /* + other inputs */
+ AM_RANGE(0x6800, 0x6800) AM_WRITE(track_reset_w) /* + watchdog */
+ AM_RANGE(0x7000, 0x7000) AM_READ(track_0_r) /* + other inputs */
+ AM_RANGE(0x7800, 0x7800) AM_READ(track_1_r) /* + other inputs */
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END
@@ -245,9 +245,9 @@ static ADDRESS_MAP_START( bowlrama_map, AS_PROGRAM, 8, capbowl_state )
AM_RANGE(0x5000, 0x57ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x5800, 0x5fff) AM_READWRITE(capbowl_tms34061_r, capbowl_tms34061_w)
AM_RANGE(0x6000, 0x6000) AM_WRITE(capbowl_sndcmd_w)
- AM_RANGE(0x6800, 0x6800) AM_WRITE(track_reset_w) /* + watchdog */
- AM_RANGE(0x7000, 0x7000) AM_READ(track_0_r) /* + other inputs */
- AM_RANGE(0x7800, 0x7800) AM_READ(track_1_r) /* + other inputs */
+ AM_RANGE(0x6800, 0x6800) AM_WRITE(track_reset_w) /* + watchdog */
+ AM_RANGE(0x7000, 0x7000) AM_READ(track_0_r) /* + other inputs */
+ AM_RANGE(0x7800, 0x7800) AM_READ(track_1_r) /* + other inputs */
AM_RANGE(0x8000, 0xffff) AM_ROM
ADDRESS_MAP_END
@@ -262,7 +262,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, capbowl_state )
AM_RANGE(0x0000, 0x07ff) AM_RAM
AM_RANGE(0x1000, 0x1001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w)
- AM_RANGE(0x2000, 0x2000) AM_WRITENOP /* Not hooked up according to the schematics */
+ AM_RANGE(0x2000, 0x2000) AM_WRITENOP /* Not hooked up according to the schematics */
AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("dac", dac_device, write_unsigned8)
AM_RANGE(0x7000, 0x7000) AM_READ(soundlatch_byte_r)
AM_RANGE(0x8000, 0xffff) AM_ROM
@@ -282,7 +282,7 @@ static INPUT_PORTS_START( capbowl )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Cabinet ) ) /* This version of Bowl-O-Rama */
- PORT_DIPSETTING( 0x40, DEF_STR( Upright ) ) /* is Upright only */
+ PORT_DIPSETTING( 0x40, DEF_STR( Upright ) ) /* is Upright only */
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
diff --git a/src/mame/drivers/capcom.c b/src/mame/drivers/capcom.c
index bf548735782..0cfdb9e39b9 100644
--- a/src/mame/drivers/capcom.c
+++ b/src/mame/drivers/capcom.c
@@ -11,7 +11,7 @@ class capcom_state : public driver_device
public:
capcom_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -289,17 +289,17 @@ ROM_START(ghv101)
ROM_END
-GAME(1996, abv106, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Airborne", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, abv106r, abv106, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Airborne (Redemption)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, bbb109, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Big Bang Bar (Beta 1.9 US)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, bbb108, bbb109, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Big Bang Bar (Beta 1.8 US)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, bsv103, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, bsv100r, bsv103, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot (Redemption 1.0)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, bsv102r, bsv103, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot (Redemption 1.2)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, bsb105, bsv103, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot (Beta)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, ffv104, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Flipper Football (v1.04)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, ffv101, ffv104, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Flipper Football (v1.01)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1996, kpv106, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Kingpin (Pinball)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1995, pmv112, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Pinball Magic", GAME_IS_SKELETON_MECHANICAL)
-GAME(1995, pmv112r, pmv112, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Pinball Magic (Redemption)", GAME_IS_SKELETON_MECHANICAL)
-GAME(1995, ghv101, 0, capcom, capcom, capcom_state, capcom, ROT0, "Romstar", "Goofy Hoops", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, abv106, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Airborne", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, abv106r, abv106, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Airborne (Redemption)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, bbb109, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Big Bang Bar (Beta 1.9 US)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, bbb108, bbb109, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Big Bang Bar (Beta 1.8 US)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, bsv103, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, bsv100r, bsv103, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot (Redemption 1.0)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, bsv102r, bsv103, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot (Redemption 1.2)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, bsb105, bsv103, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Breakshot (Beta)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, ffv104, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Flipper Football (v1.04)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, ffv101, ffv104, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Flipper Football (v1.01)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1996, kpv106, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Kingpin (Pinball)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1995, pmv112, 0, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Pinball Magic", GAME_IS_SKELETON_MECHANICAL)
+GAME(1995, pmv112r, pmv112, capcom, capcom, capcom_state, capcom, ROT0, "Capcom", "Pinball Magic (Redemption)", GAME_IS_SKELETON_MECHANICAL)
+GAME(1995, ghv101, 0, capcom, capcom, capcom_state, capcom, ROT0, "Romstar", "Goofy Hoops", GAME_IS_SKELETON_MECHANICAL)
diff --git a/src/mame/drivers/carjmbre.c b/src/mame/drivers/carjmbre.c
index ef6a6c6cef7..270e637c531 100644
--- a/src/mame/drivers/carjmbre.c
+++ b/src/mame/drivers/carjmbre.c
@@ -62,8 +62,8 @@ static ADDRESS_MAP_START( carjmbre_map, AS_PROGRAM, 8, carjmbre_state )
AM_RANGE(0x8000, 0x87ff) AM_RAM
// AM_RANGE(0x8800, 0x8800) AM_READNOP // watchdog?
AM_RANGE(0x8803, 0x8803) AM_WRITE(nmi_mask_w)
- AM_RANGE(0x8805, 0x8805) AM_WRITE(carjmbre_bgcolor_w) // guessed
- AM_RANGE(0x8806, 0x8806) AM_WRITE(carjmbre_8806_w) // video related?
+ AM_RANGE(0x8805, 0x8805) AM_WRITE(carjmbre_bgcolor_w) // guessed
+ AM_RANGE(0x8806, 0x8806) AM_WRITE(carjmbre_8806_w) // video related?
AM_RANGE(0x8807, 0x8807) AM_WRITE(carjmbre_flipscreen_w)
// AM_RANGE(0x8fc1, 0x8fc1) AM_WRITENOP // overrun during initial screen clear
// AM_RANGE(0x8fe1, 0x8fe1) AM_WRITENOP // overrun during initial screen clear
@@ -83,12 +83,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( carjmbre_sound_io_map, AS_IO, 8, carjmbre_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x00) AM_READ(soundlatch_byte_r)
- AM_RANGE(0x10, 0x10) AM_WRITENOP //?? written on init/0xff sound command reset
+ AM_RANGE(0x10, 0x10) AM_WRITENOP //?? written on init/0xff sound command reset
AM_RANGE(0x20, 0x21) AM_DEVWRITE_LEGACY("ay1", ay8910_address_data_w)
- AM_RANGE(0x22, 0x22) AM_WRITENOP //?? written before and after 0x21 with same value
- AM_RANGE(0x24, 0x24) AM_READNOP //??
+ AM_RANGE(0x22, 0x22) AM_WRITENOP //?? written before and after 0x21 with same value
+ AM_RANGE(0x24, 0x24) AM_READNOP //??
AM_RANGE(0x30, 0x31) AM_DEVWRITE_LEGACY("ay2", ay8910_address_data_w)
- AM_RANGE(0x32, 0x32) AM_WRITENOP //?? written before and after 0x31 with same value
+ AM_RANGE(0x32, 0x32) AM_WRITENOP //?? written before and after 0x31 with same value
ADDRESS_MAP_END
/*************************************
@@ -99,8 +99,8 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( carjmbre )
PORT_START("P1")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) //coin error if held high for 1s
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) //or if many coins inserted quickly
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) //coin error if held high for 1s
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) //or if many coins inserted quickly
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 )
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_4WAY
@@ -119,26 +119,26 @@ static INPUT_PORTS_START( carjmbre )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
PORT_START("DSW")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x03, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_6C ) )
- PORT_DIPNAME( 0x18, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4,5")
+ PORT_DIPNAME( 0x18, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:4,5")
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x10, "5" )
PORT_DIPSETTING( 0x18, "Free") // 250 (cheat)
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x00, "10k, then every 100k" )
PORT_DIPSETTING( 0x20, "20k, then every 100k" )
- PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x40, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
INPUT_PORTS_END
diff --git a/src/mame/drivers/carpolo.c b/src/mame/drivers/carpolo.c
index a511f7aa6da..016c5df26d8 100644
--- a/src/mame/drivers/carpolo.c
+++ b/src/mame/drivers/carpolo.c
@@ -65,7 +65,7 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( carpolo )
- PORT_START("IN0") /* IN0 */
+ PORT_START("IN0") /* IN0 */
PORT_BIT (0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT (0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
PORT_BIT (0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
@@ -73,87 +73,87 @@ static INPUT_PORTS_START( carpolo )
PORT_BIT (0xf0, IP_ACTIVE_HIGH, IPT_UNUSED )
/* the value read from here is used directly,
- the result is calculated by 60/value */
- PORT_START("IN1") /* IN1 */
- PORT_BIT (0x03, IP_ACTIVE_HIGH, IPT_UNUSED ) /* the lowest 2 bits of the counter */
+ the result is calculated by 60/value */
+ PORT_START("IN1") /* IN1 */
+ PORT_BIT (0x03, IP_ACTIVE_HIGH, IPT_UNUSED ) /* the lowest 2 bits of the counter */
PORT_DIPNAME( 0xfc, 0x3c, "Game Sec/Real Sec" )
- PORT_DIPSETTING( 0x00, "0.23 (Longest)" )
- PORT_DIPSETTING( 0xfc, "0.24" )
- PORT_DIPSETTING( 0xf8, "0.24" )
- PORT_DIPSETTING( 0xf4, "0.25" )
- PORT_DIPSETTING( 0xf0, "0.25" )
- PORT_DIPSETTING( 0xec, "0.25" )
- PORT_DIPSETTING( 0xe8, "0.26" )
- PORT_DIPSETTING( 0xe4, "0.26" )
- PORT_DIPSETTING( 0xe0, "0.27" )
- PORT_DIPSETTING( 0xdc, "0.27" )
- PORT_DIPSETTING( 0xd8, "0.28" )
- PORT_DIPSETTING( 0xd4, "0.28" )
- PORT_DIPSETTING( 0xd0, "0.29" )
- PORT_DIPSETTING( 0xcc, "0.29" )
- PORT_DIPSETTING( 0xc8, "0.30" )
- PORT_DIPSETTING( 0xc4, "0.31" )
- PORT_DIPSETTING( 0xc0, "0.31" )
- PORT_DIPSETTING( 0xbc, "0.32" )
- PORT_DIPSETTING( 0xb8, "0.33" )
- PORT_DIPSETTING( 0xb4, "0.33" )
- PORT_DIPSETTING( 0xb0, "0.34" )
- PORT_DIPSETTING( 0xac, "0.35" )
- PORT_DIPSETTING( 0xa8, "0.36" )
- PORT_DIPSETTING( 0xa4, "0.37" )
- PORT_DIPSETTING( 0xa0, "0.38" )
- PORT_DIPSETTING( 0x9c, "0.38" )
- PORT_DIPSETTING( 0x98, "0.39" )
- PORT_DIPSETTING( 0x94, "0.41" )
- PORT_DIPSETTING( 0x90, "0.42" )
- PORT_DIPSETTING( 0x8c, "0.44" )
- PORT_DIPSETTING( 0x84, "0.46" )
- PORT_DIPSETTING( 0x80, "0.47" )
- PORT_DIPSETTING( 0x7c, "0.48" )
- PORT_DIPSETTING( 0x78, "0.50" )
- PORT_DIPSETTING( 0x74, "0.52" )
- PORT_DIPSETTING( 0x70, "0.54" )
- PORT_DIPSETTING( 0x6c, "0.56" )
- PORT_DIPSETTING( 0x68, "0.58" )
- PORT_DIPSETTING( 0x64, "0.60" )
- PORT_DIPSETTING( 0x60, "0.63" )
- PORT_DIPSETTING( 0x5c, "0.65" )
- PORT_DIPSETTING( 0x58, "0.68" )
- PORT_DIPSETTING( 0x54, "0.71" )
- PORT_DIPSETTING( 0x50, "0.75" )
- PORT_DIPSETTING( 0x4c, "0.79" )
- PORT_DIPSETTING( 0x48, "0.83" )
- PORT_DIPSETTING( 0x44, "0.88" )
- PORT_DIPSETTING( 0x40, "0.94" )
- PORT_DIPSETTING( 0x3c, "1.00" )
- PORT_DIPSETTING( 0x38, "1.07" )
- PORT_DIPSETTING( 0x34, "1.15" )
- PORT_DIPSETTING( 0x30, "1.25" )
- PORT_DIPSETTING( 0x2c, "1.36" )
- PORT_DIPSETTING( 0x28, "1.50" )
- PORT_DIPSETTING( 0x24, "1.67" )
- PORT_DIPSETTING( 0x20, "1.88" )
- PORT_DIPSETTING( 0x1c, "2.14" )
- PORT_DIPSETTING( 0x18, "2.50" )
- PORT_DIPSETTING( 0x14, "3.00" )
- PORT_DIPSETTING( 0x10, "3.75" )
- PORT_DIPSETTING( 0x0c, "5.00" )
- PORT_DIPSETTING( 0x08, "7.50" )
- PORT_DIPSETTING( 0x04, "15.00 (Shortest)" )
-
- PORT_START("DIAL0") /* IN2 */
+ PORT_DIPSETTING( 0x00, "0.23 (Longest)" )
+ PORT_DIPSETTING( 0xfc, "0.24" )
+ PORT_DIPSETTING( 0xf8, "0.24" )
+ PORT_DIPSETTING( 0xf4, "0.25" )
+ PORT_DIPSETTING( 0xf0, "0.25" )
+ PORT_DIPSETTING( 0xec, "0.25" )
+ PORT_DIPSETTING( 0xe8, "0.26" )
+ PORT_DIPSETTING( 0xe4, "0.26" )
+ PORT_DIPSETTING( 0xe0, "0.27" )
+ PORT_DIPSETTING( 0xdc, "0.27" )
+ PORT_DIPSETTING( 0xd8, "0.28" )
+ PORT_DIPSETTING( 0xd4, "0.28" )
+ PORT_DIPSETTING( 0xd0, "0.29" )
+ PORT_DIPSETTING( 0xcc, "0.29" )
+ PORT_DIPSETTING( 0xc8, "0.30" )
+ PORT_DIPSETTING( 0xc4, "0.31" )
+ PORT_DIPSETTING( 0xc0, "0.31" )
+ PORT_DIPSETTING( 0xbc, "0.32" )
+ PORT_DIPSETTING( 0xb8, "0.33" )
+ PORT_DIPSETTING( 0xb4, "0.33" )
+ PORT_DIPSETTING( 0xb0, "0.34" )
+ PORT_DIPSETTING( 0xac, "0.35" )
+ PORT_DIPSETTING( 0xa8, "0.36" )
+ PORT_DIPSETTING( 0xa4, "0.37" )
+ PORT_DIPSETTING( 0xa0, "0.38" )
+ PORT_DIPSETTING( 0x9c, "0.38" )
+ PORT_DIPSETTING( 0x98, "0.39" )
+ PORT_DIPSETTING( 0x94, "0.41" )
+ PORT_DIPSETTING( 0x90, "0.42" )
+ PORT_DIPSETTING( 0x8c, "0.44" )
+ PORT_DIPSETTING( 0x84, "0.46" )
+ PORT_DIPSETTING( 0x80, "0.47" )
+ PORT_DIPSETTING( 0x7c, "0.48" )
+ PORT_DIPSETTING( 0x78, "0.50" )
+ PORT_DIPSETTING( 0x74, "0.52" )
+ PORT_DIPSETTING( 0x70, "0.54" )
+ PORT_DIPSETTING( 0x6c, "0.56" )
+ PORT_DIPSETTING( 0x68, "0.58" )
+ PORT_DIPSETTING( 0x64, "0.60" )
+ PORT_DIPSETTING( 0x60, "0.63" )
+ PORT_DIPSETTING( 0x5c, "0.65" )
+ PORT_DIPSETTING( 0x58, "0.68" )
+ PORT_DIPSETTING( 0x54, "0.71" )
+ PORT_DIPSETTING( 0x50, "0.75" )
+ PORT_DIPSETTING( 0x4c, "0.79" )
+ PORT_DIPSETTING( 0x48, "0.83" )
+ PORT_DIPSETTING( 0x44, "0.88" )
+ PORT_DIPSETTING( 0x40, "0.94" )
+ PORT_DIPSETTING( 0x3c, "1.00" )
+ PORT_DIPSETTING( 0x38, "1.07" )
+ PORT_DIPSETTING( 0x34, "1.15" )
+ PORT_DIPSETTING( 0x30, "1.25" )
+ PORT_DIPSETTING( 0x2c, "1.36" )
+ PORT_DIPSETTING( 0x28, "1.50" )
+ PORT_DIPSETTING( 0x24, "1.67" )
+ PORT_DIPSETTING( 0x20, "1.88" )
+ PORT_DIPSETTING( 0x1c, "2.14" )
+ PORT_DIPSETTING( 0x18, "2.50" )
+ PORT_DIPSETTING( 0x14, "3.00" )
+ PORT_DIPSETTING( 0x10, "3.75" )
+ PORT_DIPSETTING( 0x0c, "5.00" )
+ PORT_DIPSETTING( 0x08, "7.50" )
+ PORT_DIPSETTING( 0x04, "15.00 (Shortest)" )
+
+ PORT_START("DIAL0") /* IN2 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(1)
- PORT_START("DIAL1") /* IN3 */
+ PORT_START("DIAL1") /* IN3 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
- PORT_START("DIAL2") /* IN4 */
+ PORT_START("DIAL2") /* IN4 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(3)
- PORT_START("DIAL3") /* IN5 */
+ PORT_START("DIAL3") /* IN5 */
PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(4)
- PORT_START("PEDALS") /* IN6 - accelerator pedals */
+ PORT_START("PEDALS") /* IN6 - accelerator pedals */
PORT_BIT (0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT (0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT (0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
@@ -163,7 +163,7 @@ static INPUT_PORTS_START( carpolo )
PORT_BIT (0x40, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(4)
PORT_BIT (0x80, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(4)
- PORT_START("IN2") /* IN7 - forward/reverse */
+ PORT_START("IN2") /* IN7 - forward/reverse */
PORT_BIT (0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT (0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4)
PORT_BIT (0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
@@ -186,9 +186,9 @@ static const gfx_layout spritelayout =
1,
{ 0 },
{ STEP4(3*0x100*8+4,1),
- STEP4(2*0x100*8+4,1),
- STEP4(1*0x100*8+4,1),
- STEP4(0*0x100*8+4,1) },
+ STEP4(2*0x100*8+4,1),
+ STEP4(1*0x100*8+4,1),
+ STEP4(0*0x100*8+4,1) },
{ STEP16(0,8) },
16*8
};
@@ -201,8 +201,8 @@ static const gfx_layout goallayout =
{ 4, 5, 6, 7 },
{ STEP8(0,8) },
{ STEP8(192*8,8*8),
- STEP16( 0*8,8*8),
- STEP8(128*8,8*8) },
+ STEP16( 0*8,8*8),
+ STEP8(128*8,8*8) },
0
};
@@ -242,9 +242,9 @@ static const ttl74153_config carpolo_ttl74153_intf =
static MACHINE_CONFIG_START( carpolo, carpolo_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6502, XTAL_11_289MHz/12) /* 940.75 kHz */
+ MCFG_CPU_ADD("maincpu", M6502, XTAL_11_289MHz/12) /* 940.75 kHz */
MCFG_CPU_PROGRAM_MAP(main_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", carpolo_state, carpolo_timer_interrupt) /* this not strictly VBLANK,
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", carpolo_state, carpolo_timer_interrupt) /* this not strictly VBLANK,
but it's supposed to happen 60
times a sec, so it's a good place */
@@ -300,25 +300,25 @@ ROM_START( carpolo )
ROM_LOAD( "4006.6l", 0xfc00, 0x0200, CRC(8479c350) SHA1(391c737947498aad4d478639cbbc72181d680fce) )
ROM_LOAD( "4007a.6n", 0xfe00, 0x0200, CRC(c6a619de) SHA1(c1b650a0126791fa733f89d9e9bdeeb605486a2c) )
- ROM_REGION( 0x0400, "gfx1", 0 ) /* sprites */
+ ROM_REGION( 0x0400, "gfx1", 0 ) /* sprites */
ROM_LOAD( "1024.10w", 0x0000, 0x0100, CRC(eedacc7e) SHA1(d89628f013039ca387cafe22180de71e1553cffc) )
ROM_LOAD( "1023.10v", 0x0100, 0x0100, CRC(45df6c74) SHA1(a986b62b4c263c5d217bae0d51e74197f5288180) )
ROM_LOAD( "1022.10u", 0x0200, 0x0100, CRC(00868768) SHA1(2388e428db300a1e0005cccb9165ec604518033d) )
ROM_LOAD( "1021.10t", 0x0300, 0x0100, CRC(a508af9c) SHA1(219ba776d8cccf6726519aff17e37f2a6a85d0d1) )
- ROM_REGION( 0x0100, "gfx2", 0 ) /* goal */
+ ROM_REGION( 0x0100, "gfx2", 0 ) /* goal */
ROM_LOAD( "1020.6v", 0x0000, 0x0100, CRC(5e89fbcd) SHA1(6be171168924cd8aa94ff5e1994faecb6f303bd9) )
- ROM_REGION( 0x0200, "gfx3", 0 ) /* alpha */
- ROM_LOAD( "2513.4l", 0x0000, 0x0200, BAD_DUMP CRC(f80d8889) SHA1(ca573543dcce1221459d5693c476cef14bfac4f4) ) /* MIA - stolen from Night Driver */
+ ROM_REGION( 0x0200, "gfx3", 0 ) /* alpha */
+ ROM_LOAD( "2513.4l", 0x0000, 0x0200, BAD_DUMP CRC(f80d8889) SHA1(ca573543dcce1221459d5693c476cef14bfac4f4) ) /* MIA - stolen from Night Driver */
ROM_REGION( 0x0060, "proms", 0 )
- ROM_LOAD( "328.5u", 0x0000, 0x0020, CRC(f295e0fc) SHA1(974a0481e0c6d5c0b6f0129653d8ed87880916e0) ) /* color PROM */
- ROM_LOAD( "325.6t", 0x0020, 0x0020, CRC(b8b44022) SHA1(29fe6159c8d239c322296cef68ad59bcf290f246) ) /* horizontal timing */
- ROM_LOAD( "326.6w", 0x0040, 0x0020, CRC(628ae3d1) SHA1(e6d43d2b5e8ec4b8c1adf6f29c2c9a43ab67ff50) ) /* vertical timing */
+ ROM_LOAD( "328.5u", 0x0000, 0x0020, CRC(f295e0fc) SHA1(974a0481e0c6d5c0b6f0129653d8ed87880916e0) ) /* color PROM */
+ ROM_LOAD( "325.6t", 0x0020, 0x0020, CRC(b8b44022) SHA1(29fe6159c8d239c322296cef68ad59bcf290f246) ) /* horizontal timing */
+ ROM_LOAD( "326.6w", 0x0040, 0x0020, CRC(628ae3d1) SHA1(e6d43d2b5e8ec4b8c1adf6f29c2c9a43ab67ff50) ) /* vertical timing */
ROM_REGION( 0x0020, "user1", 0 )
- ROM_LOAD( "327.10s", 0x0000, 0x0020, CRC(e047d24d) SHA1(2ea7afc8d97c906295bf2af929e0515f6c34137f) ) /* sprite image map */
+ ROM_LOAD( "327.10s", 0x0000, 0x0020, CRC(e047d24d) SHA1(2ea7afc8d97c906295bf2af929e0515f6c34137f) ) /* sprite image map */
ROM_END
diff --git a/src/mame/drivers/carrera.c b/src/mame/drivers/carrera.c
index 0f0d6c435d1..bd006e8564b 100644
--- a/src/mame/drivers/carrera.c
+++ b/src/mame/drivers/carrera.c
@@ -44,7 +44,7 @@ TODO:
*/
-#define MASTER_CLOCK XTAL_22_1184MHz
+#define MASTER_CLOCK XTAL_22_1184MHz
#include "emu.h"
#include "cpu/z80/z80.h"
@@ -87,7 +87,7 @@ static ADDRESS_MAP_START( io_map, AS_IO, 8, carrera_state )
ADDRESS_MAP_END
static INPUT_PORTS_START( carrera )
- PORT_START("IN0") /* Port 0 */
+ PORT_START("IN0") /* Port 0 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
@@ -104,7 +104,7 @@ static INPUT_PORTS_START( carrera )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("IN1") /* Port 1 */
+ PORT_START("IN1") /* Port 1 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
/* unused / unknown inputs, not dips */
@@ -128,7 +128,7 @@ static INPUT_PORTS_START( carrera )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
/* I suspect the 4 below are the 4xDSWs */
- PORT_START("IN2") /* Port 2 */
+ PORT_START("IN2") /* Port 2 */
PORT_DIPNAME( 0x01, 0x01, "2" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -154,7 +154,7 @@ static INPUT_PORTS_START( carrera )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("IN3") /* Port 3 */
+ PORT_START("IN3") /* Port 3 */
PORT_DIPNAME( 0x01, 0x01, "3" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -180,7 +180,7 @@ static INPUT_PORTS_START( carrera )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("IN4") /* Port 4 */
+ PORT_START("IN4") /* Port 4 */
PORT_DIPNAME( 0x01, 0x01, "4" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -206,7 +206,7 @@ static INPUT_PORTS_START( carrera )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("IN5") /* Port 5 */
+ PORT_START("IN5") /* Port 5 */
PORT_DIPNAME( 0x01, 0x01, "5" )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -287,7 +287,7 @@ void carrera_state::palette_init()
{
const UINT8 *color_prom = machine().root_device().memregion("proms")->base();
int br_bit0, br_bit1, bit0, bit1, r, g, b;
- int i;
+ int i;
for (i = 0; i < 0x20; ++i)
{
@@ -312,16 +312,16 @@ void carrera_state::palette_init()
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
@@ -371,4 +371,3 @@ ROM_END
GAME( 19??, carrera, 0, carrera, carrera, driver_device,0, ROT0, "BS Electronics", "Carrera (Version 6.7)", 0 )
-
diff --git a/src/mame/drivers/castle.c b/src/mame/drivers/castle.c
index b1772acc0df..8d1a14dcde4 100644
--- a/src/mame/drivers/castle.c
+++ b/src/mame/drivers/castle.c
@@ -50,7 +50,7 @@ class castle_state : public driver_device
public:
castle_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
protected:
@@ -111,7 +111,7 @@ ROM_END
// 4.00 JACKPOT. VERSION 1 (for revision E CPU) Written by and copyright of David John Powell - 25th February 1987
-GAME( 1987, castrev, 0, castle_V1rvE, castrev, driver_device, 0, ROT0, "Castle","Revolution (Castle) (MACH2000 V1rvE)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 1987, castrev, 0, castle_V1rvE, castrev, driver_device, 0, ROT0, "Castle","Revolution (Castle) (MACH2000 V1rvE)",GAME_IS_SKELETON_MECHANICAL )
// I'm *guessing* this is on MACH2000 V2rvA hardware, it contains strings saying 'MACH 2000 test' and is designed for a single CPU.
-GAME( 198?, castfpt, 0, castle_V2rvA, castrev, driver_device, 0, ROT0, "Castle","Fortune Pot (Castle) (MACH2000 V2rvA)",GAME_IS_SKELETON_MECHANICAL )
+GAME( 198?, castfpt, 0, castle_V2rvA, castrev, driver_device, 0, ROT0, "Castle","Fortune Pot (Castle) (MACH2000 V2rvA)",GAME_IS_SKELETON_MECHANICAL )
diff --git a/src/mame/drivers/caswin.c b/src/mame/drivers/caswin.c
index 7da403c04cc..ddb887940b1 100644
--- a/src/mame/drivers/caswin.c
+++ b/src/mame/drivers/caswin.c
@@ -168,12 +168,12 @@ WRITE8_MEMBER(caswin_state::vvillage_output_w)
WRITE8_MEMBER(caswin_state::vvillage_lamps_w)
{
/*
- ---x ---- lamp button 5
- ---- x--- lamp button 4
- ---- -x-- lamp button 3
- ---- --x- lamp button 2
- ---- ---x lamp button 1
- */
+ ---x ---- lamp button 5
+ ---- x--- lamp button 4
+ ---- -x-- lamp button 3
+ ---- --x- lamp button 2
+ ---- ---x lamp button 1
+ */
set_led_status(machine(), 0, data & 0x01);
set_led_status(machine(), 1, data & 0x02);
set_led_status(machine(), 2, data & 0x04);
@@ -300,8 +300,8 @@ static const ay8910_interface ay8910_config =
void caswin_state::palette_init()
{
const UINT8 *color_prom = machine().root_device().memregion("proms")->base();
- int bit0, bit1, bit2 , r, g, b;
- int i;
+ int bit0, bit1, bit2 , r, g, b;
+ int i;
for (i = 0; i < 0x40; ++i)
{
@@ -326,7 +326,7 @@ void caswin_state::palette_init()
static MACHINE_CONFIG_START( vvillage, caswin_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,4000000) /* ? MHz */
+ MCFG_CPU_ADD("maincpu", Z80,4000000) /* ? MHz */
MCFG_CPU_PROGRAM_MAP(vvillage_mem)
MCFG_CPU_IO_MAP(vvillage_io)
MCFG_CPU_VBLANK_INT_DRIVER("screen", caswin_state, irq0_line_hold)
diff --git a/src/mame/drivers/cave.c b/src/mame/drivers/cave.c
index 14ebba6c617..b706d712b6d 100644
--- a/src/mame/drivers/cave.c
+++ b/src/mame/drivers/cave.c
@@ -115,7 +115,7 @@ static void update_irq_state( running_machine &machine )
TIMER_CALLBACK_MEMBER(cave_state::cave_vblank_end)
{
- if (m_kludge == 3) /* mazinger metmqstr */
+ if (m_kludge == 3) /* mazinger metmqstr */
{
m_unknown_irq = 1;
update_irq_state(machine());
@@ -231,7 +231,7 @@ WRITE16_MEMBER(cave_state::sound_cmd_w)
// m_sound_flag2 = 1;
soundlatch_word_w(space, offset, data, mem_mask);
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
- space.device().execute().spin_until_time(attotime::from_usec(50)); // Allow the other cpu to reply
+ space.device().execute().spin_until_time(attotime::from_usec(50)); // Allow the other cpu to reply
}
/* Sound CPU: read the low 8 bits of the 16 bit sound latch */
@@ -399,15 +399,15 @@ WRITE16_MEMBER(cave_state::metmqstr_eeprom_msb_w)
static const eeprom_interface eeprom_interface_93C46_pacslot =
{
- 6, // address bits 6
- 16, // data bits 16
- "*110", // read 1 10 aaaaaa
- "*101", // write 1 01 aaaaaa dddddddddddddddd
- "*111", // erase 1 11 aaaaaa
- "*10000xxxx", // lock 1 00 00xxxx
- "*10011xxxx", // unlock 1 00 11xxxx
- 1, // enable_multi_read (needed by pacslot)
- 1 // reset_delay (otherwise pacslot will not recognize the eeprom)
+ 6, // address bits 6
+ 16, // data bits 16
+ "*110", // read 1 10 aaaaaa
+ "*101", // write 1 01 aaaaaa dddddddddddddddd
+ "*111", // erase 1 11 aaaaaa
+ "*10000xxxx", // lock 1 00 00xxxx
+ "*10011xxxx", // unlock 1 00 11xxxx
+ 1, // enable_multi_read (needed by pacslot)
+ 1 // reset_delay (otherwise pacslot will not recognize the eeprom)
// "*10001xxxx" // write all 1 00 01xxxx dddddddddddddddd
// "*10010xxxx" // erase all 1 00 10xxxx
};
@@ -430,23 +430,23 @@ static const eeprom_interface eeprom_interface_93C46_pacslot =
***************************************************************************/
static ADDRESS_MAP_START( dfeveron_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
- AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
-/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
-/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
-/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
-/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
-/**/AM_RANGE(0x708000, 0x708fff) AM_RAM AM_SHARE("paletteram") // Palette
-/**/AM_RANGE(0x710000, 0x710bff) AM_READONLY // ?
- AM_RANGE(0x710c00, 0x710fff) AM_RAM // ?
- AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
- AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0xc00000, 0xc00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+ AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
+/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
+/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+/**/AM_RANGE(0x708000, 0x708fff) AM_RAM AM_SHARE("paletteram") // Palette
+/**/AM_RANGE(0x710000, 0x710bff) AM_READONLY // ?
+ AM_RANGE(0x710c00, 0x710fff) AM_RAM // ?
+ AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+ AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0xc00000, 0xc00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
ADDRESS_MAP_END
@@ -455,23 +455,23 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( ddonpach_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
- AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
-/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
-/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
-/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
-/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
-/**/AM_RANGE(0x700000, 0x70ffff) AM_RAM_WRITE(cave_vram_2_8x8_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
-/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+ AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
+/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
+/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+/**/AM_RANGE(0x700000, 0x70ffff) AM_RAM_WRITE(cave_vram_2_8x8_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
ADDRESS_MAP_END
@@ -486,9 +486,9 @@ READ16_MEMBER(cave_state::donpachi_videoregs_r)
case 0:
case 1:
case 2:
- case 3: return cave_irq_cause_r(space, offset, 0xffff);
+ case 3: return cave_irq_cause_r(space, offset, 0xffff);
- default: return 0x0000;
+ default: return 0x0000;
}
}
@@ -505,24 +505,24 @@ WRITE16_MEMBER(cave_state::donpachi_videoregs_w)
#endif
static ADDRESS_MAP_START( donpachi_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
- AM_RANGE(0x200000, 0x207fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
- AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x400000, 0x407fff) AM_RAM_WRITE(cave_vram_2_8x8_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x500000, 0x507fff) AM_RAM AM_SHARE("spriteram") // Sprites
- AM_RANGE(0x508000, 0x50ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
-/**/AM_RANGE(0x600000, 0x600005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0x800000, 0x800005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
- AM_RANGE(0x900000, 0x90007f) AM_RAM_READ(donpachi_videoregs_r) AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0xa08000, 0xa08fff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0xb00000, 0xb00003) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // M6295
- AM_RANGE(0xb00010, 0xb00013) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff) //
- AM_RANGE(0xb00020, 0xb0002f) AM_DEVWRITE_LEGACY("nmk112", nmk112_okibank_lsb_w) //
- AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0xd00000, 0xd00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+ AM_RANGE(0x200000, 0x207fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+ AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x400000, 0x407fff) AM_RAM_WRITE(cave_vram_2_8x8_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x500000, 0x507fff) AM_RAM AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0x508000, 0x50ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+/**/AM_RANGE(0x600000, 0x600005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0x800000, 0x800005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+ AM_RANGE(0x900000, 0x90007f) AM_RAM_READ(donpachi_videoregs_r) AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0xa08000, 0xa08fff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0xb00000, 0xb00003) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // M6295
+ AM_RANGE(0xb00010, 0xb00013) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff) //
+ AM_RANGE(0xb00020, 0xb0002f) AM_DEVWRITE_LEGACY("nmk112", nmk112_okibank_lsb_w) //
+ AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0xd00000, 0xd00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
ADDRESS_MAP_END
@@ -531,23 +531,23 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( esprade_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
- AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
-/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
-/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
-/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
-/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
-/**/AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
-/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0" ) // Inputs
- AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
- AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+ AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
+/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
+/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+/**/AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0" ) // Inputs
+ AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1" ) // Inputs + EEPROM
+ AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
ADDRESS_MAP_END
@@ -556,28 +556,28 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( gaia_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
- AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
- AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprite bank 1
- AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprite bank 2
- AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x508000, 0x50ffff) AM_RAM // More Layer 0, Tested but not used?
- AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
- AM_RANGE(0x608000, 0x60ffff) AM_RAM // More Layer 1, Tested but not used?
- AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x708000, 0x70ffff) AM_RAM // More Layer 2, Tested but not used?
- AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
- AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0xd00010, 0xd00011) AM_WRITE(gaia_coin_lsb_w) // Coin counter only
- AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1") // Inputs
- AM_RANGE(0xd00014, 0xd00015) AM_READ_PORT("DSW") // Dips
- AM_RANGE(0xd00014, 0xd00015) AM_WRITE(watchdog_reset16_w) // Watchdog?
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+ AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
+ AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprite bank 1
+ AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprite bank 2
+ AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x508000, 0x50ffff) AM_RAM // More Layer 0, Tested but not used?
+ AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+ AM_RANGE(0x608000, 0x60ffff) AM_RAM // More Layer 1, Tested but not used?
+ AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x708000, 0x70ffff) AM_RAM // More Layer 2, Tested but not used?
+ AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x800000, 0x80007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+ AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0xd00010, 0xd00011) AM_WRITE(gaia_coin_lsb_w) // Coin counter only
+ AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1") // Inputs
+ AM_RANGE(0xd00014, 0xd00015) AM_READ_PORT("DSW") // Dips
+ AM_RANGE(0xd00014, 0xd00015) AM_WRITE(watchdog_reset16_w) // Watchdog?
ADDRESS_MAP_END
@@ -586,23 +586,23 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( guwange_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x200000, 0x20ffff) AM_RAM // RAM
- AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x300000, 0x30007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
-/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
-/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
-/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
-/**/AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x800000, 0x800003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
-/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
-/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0xd00010, 0xd00011) AM_WRITE(cave_eeprom_lsb_w) // EEPROM
- AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x200000, 0x20ffff) AM_RAM // RAM
+ AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x300000, 0x30007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
+/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+/**/AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x800000, 0x800003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
+/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0xd00010, 0xd00011) AM_WRITE(cave_eeprom_lsb_w) // EEPROM
+ AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1") // Inputs + EEPROM
// AM_RANGE(0xd00012, 0xd00013) AM_WRITENOP // ?
// AM_RANGE(0xd00014, 0xd00015) AM_WRITENOP // ? $800068 in dfeveron ? probably Watchdog
ADDRESS_MAP_END
@@ -613,25 +613,25 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( hotdogst_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x300000, 0x30ffff) AM_RAM // RAM
-/**/AM_RANGE(0x408000, 0x408fff) AM_RAM AM_SHARE("paletteram") // Palette
-/**/AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
-/**/AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
-/**/AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x300000, 0x30ffff) AM_RAM // RAM
+/**/AM_RANGE(0x408000, 0x408fff) AM_RAM AM_SHARE("paletteram") // Palette
+/**/AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+/**/AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+/**/AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r) // IRQ Cause
// AM_RANGE(0xa8006e, 0xa8006f) AM_READ(soundlatch_ack_r) // From Sound CPU
- AM_RANGE(0xa8006e, 0xa8006f) AM_WRITE(sound_cmd_w) // To Sound CPU
- AM_RANGE(0xa80000, 0xa8007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
- AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0xd00000, 0xd00001) AM_WRITE(hotdogst_eeprom_msb_w) // EEPROM
- AM_RANGE(0xd00002, 0xd00003) AM_WRITENOP // ???
-/**/AM_RANGE(0xf00000, 0xf07fff) AM_RAM AM_SHARE("spriteram") // Sprites
-/**/AM_RANGE(0xf08000, 0xf0ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+ AM_RANGE(0xa8006e, 0xa8006f) AM_WRITE(sound_cmd_w) // To Sound CPU
+ AM_RANGE(0xa80000, 0xa8007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+ AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0xd00000, 0xd00001) AM_WRITE(hotdogst_eeprom_msb_w) // EEPROM
+ AM_RANGE(0xd00002, 0xd00003) AM_WRITENOP // ???
+/**/AM_RANGE(0xf00000, 0xf07fff) AM_RAM AM_SHARE("spriteram") // Sprites
+/**/AM_RANGE(0xf08000, 0xf0ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
ADDRESS_MAP_END
@@ -653,8 +653,8 @@ WRITE16_MEMBER(cave_state::korokoro_leds_w)
set_led_status(machine(), 0, data & 0x8000);
set_led_status(machine(), 1, data & 0x4000);
- set_led_status(machine(), 2, data & 0x1000); // square button
- set_led_status(machine(), 3, data & 0x0800); // round button
+ set_led_status(machine(), 2, data & 0x1000); // square button
+ set_led_status(machine(), 3, data & 0x0800); // round button
// coin_lockout_w(machine(), 1, ~data & 0x0200); // coin lockouts?
// coin_lockout_w(machine(), 0, ~data & 0x0100);
@@ -683,7 +683,7 @@ WRITE16_MEMBER(cave_state::korokoro_eeprom_msb_w)
if (ACCESSING_BITS_8_15) // even address
{
- m_hopper = data & 0x0100; // ???
+ m_hopper = data & 0x0100; // ???
// latch the bit
eeprom_device *eeprom = downcast<eeprom_device *>(device);
@@ -704,38 +704,38 @@ CUSTOM_INPUT_MEMBER(cave_state::korokoro_hopper_r)
static ADDRESS_MAP_START( korokoro_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x107fff) AM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x140000, 0x140005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
- AM_RANGE(0x180000, 0x187fff) AM_WRITEONLY AM_SHARE("spriteram") // Sprites
- AM_RANGE(0x1c0000, 0x1c0007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x1c0000, 0x1c007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
- AM_RANGE(0x200000, 0x207fff) AM_WRITEONLY AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x107fff) AM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x140000, 0x140005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
+ AM_RANGE(0x180000, 0x187fff) AM_WRITEONLY AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0x1c0000, 0x1c0007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x1c0000, 0x1c007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+ AM_RANGE(0x200000, 0x207fff) AM_WRITEONLY AM_SHARE("paletteram") // Palette
// AM_RANGE(0x240000, 0x240003) AM_DEVREAD8_LEGACY("ymz", ymz280b_r, 0x00ff) // YMZ280
- AM_RANGE(0x240000, 0x240003) AM_DEVWRITE8_LEGACY("ymz", ymz280b_w, 0x00ff) // YMZ280
- AM_RANGE(0x280000, 0x280001) AM_READ_PORT("IN0") // Inputs + ???
- AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0x280008, 0x280009) AM_WRITE(korokoro_leds_w) // Leds
- AM_RANGE(0x28000a, 0x28000b) AM_WRITE(korokoro_eeprom_msb_w) // EEPROM
- AM_RANGE(0x28000c, 0x28000d) AM_WRITENOP // 0 (watchdog?)
- AM_RANGE(0x300000, 0x30ffff) AM_RAM // RAM
+ AM_RANGE(0x240000, 0x240003) AM_DEVWRITE8_LEGACY("ymz", ymz280b_w, 0x00ff) // YMZ280
+ AM_RANGE(0x280000, 0x280001) AM_READ_PORT("IN0") // Inputs + ???
+ AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0x280008, 0x280009) AM_WRITE(korokoro_leds_w) // Leds
+ AM_RANGE(0x28000a, 0x28000b) AM_WRITE(korokoro_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x28000c, 0x28000d) AM_WRITENOP // 0 (watchdog?)
+ AM_RANGE(0x300000, 0x30ffff) AM_RAM // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( crusherm_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x107fff) AM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x140000, 0x140005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
- AM_RANGE(0x180000, 0x187fff) AM_WRITEONLY AM_SHARE("spriteram") // Sprites
- AM_RANGE(0x200000, 0x207fff) AM_WRITEONLY AM_SHARE("paletteram") // Palette
- AM_RANGE(0x240000, 0x240003) AM_DEVWRITE8_LEGACY("ymz", ymz280b_w, 0x00ff) // YMZ280
- AM_RANGE(0x280000, 0x280001) AM_READ_PORT("IN0") // Inputs + ???
- AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0x280008, 0x280009) AM_WRITE(korokoro_leds_w) // Leds
- AM_RANGE(0x28000a, 0x28000b) AM_WRITE(korokoro_eeprom_msb_w) // EEPROM
- AM_RANGE(0x28000c, 0x28000d) AM_WRITENOP // 0 (watchdog?)
- AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x300000, 0x30007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
- AM_RANGE(0x340000, 0x34ffff) AM_RAM // RAM
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x107fff) AM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x140000, 0x140005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
+ AM_RANGE(0x180000, 0x187fff) AM_WRITEONLY AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0x200000, 0x207fff) AM_WRITEONLY AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x240000, 0x240003) AM_DEVWRITE8_LEGACY("ymz", ymz280b_w, 0x00ff) // YMZ280
+ AM_RANGE(0x280000, 0x280001) AM_READ_PORT("IN0") // Inputs + ???
+ AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0x280008, 0x280009) AM_WRITE(korokoro_leds_w) // Leds
+ AM_RANGE(0x28000a, 0x28000b) AM_WRITE(korokoro_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x28000c, 0x28000d) AM_WRITENOP // 0 (watchdog?)
+ AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x300000, 0x30007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+ AM_RANGE(0x340000, 0x34ffff) AM_RAM // RAM
ADDRESS_MAP_END
/***************************************************************************
@@ -743,23 +743,23 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( mazinger_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
-/**/AM_RANGE(0x200000, 0x207fff) AM_RAM AM_SHARE("spriteram") // Sprites
-/**/AM_RANGE(0x208000, 0x20ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
- AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x300068, 0x300069) AM_WRITE(watchdog_reset16_w) // Watchdog
- AM_RANGE(0x30006e, 0x30006f) AM_READWRITE(soundlatch_ack_r, sound_cmd_w) // From Sound CPU
- AM_RANGE(0x300000, 0x30007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
- AM_RANGE(0x400000, 0x407fff) AM_RAM_WRITE(cave_vram_1_8x8_w) AM_SHARE("vram.1") // Layer 1
-/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_8x8_w) AM_SHARE("vram.0") // Layer 0
-/**/AM_RANGE(0x600000, 0x600005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
- AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0x900000, 0x900001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
-/**/AM_RANGE(0xc08000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0xd00000, 0xd7ffff) AM_ROMBANK("bank1") // ROM
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+/**/AM_RANGE(0x200000, 0x207fff) AM_RAM AM_SHARE("spriteram") // Sprites
+/**/AM_RANGE(0x208000, 0x20ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+ AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x300068, 0x300069) AM_WRITE(watchdog_reset16_w) // Watchdog
+ AM_RANGE(0x30006e, 0x30006f) AM_READWRITE(soundlatch_ack_r, sound_cmd_w) // From Sound CPU
+ AM_RANGE(0x300000, 0x30007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+ AM_RANGE(0x400000, 0x407fff) AM_RAM_WRITE(cave_vram_1_8x8_w) AM_SHARE("vram.1") // Layer 1
+/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_8x8_w) AM_SHARE("vram.0") // Layer 0
+/**/AM_RANGE(0x600000, 0x600005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+ AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0x900000, 0x900001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
+/**/AM_RANGE(0xc08000, 0xc0ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0xd00000, 0xd7ffff) AM_ROMBANK("bank1") // ROM
ADDRESS_MAP_END
@@ -768,30 +768,30 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( metmqstr_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x17ffff) AM_ROM // ROM
- AM_RANGE(0x200000, 0x27ffff) AM_ROM // ROM
- AM_RANGE(0x408000, 0x408fff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0x600000, 0x600001) AM_READ(watchdog_reset16_r) // Watchdog?
- AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x888000, 0x88ffff) AM_RAM //
- AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
- AM_RANGE(0x908000, 0x90ffff) AM_RAM //
- AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x988000, 0x98ffff) AM_RAM //
- AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0xa80068, 0xa80069) AM_WRITE(watchdog_reset16_w) // Watchdog?
- AM_RANGE(0xa8006c, 0xa8006d) AM_READ(soundflags_ack_r) AM_WRITENOP // Communication
- AM_RANGE(0xa8006e, 0xa8006f) AM_READWRITE(soundlatch_ack_r, sound_cmd_w) // From Sound CPU
- AM_RANGE(0xa80000, 0xa8007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
-/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
- AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0xd00000, 0xd00001) AM_WRITE(metmqstr_eeprom_msb_w) // EEPROM
- AM_RANGE(0xf00000, 0xf07fff) AM_RAM AM_SHARE("spriteram") // Sprites
- AM_RANGE(0xf08000, 0xf0ffff) AM_RAM AM_SHARE("spriteram_2") // RAM
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x17ffff) AM_ROM // ROM
+ AM_RANGE(0x200000, 0x27ffff) AM_ROM // ROM
+ AM_RANGE(0x408000, 0x408fff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x600000, 0x600001) AM_READ(watchdog_reset16_r) // Watchdog?
+ AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x888000, 0x88ffff) AM_RAM //
+ AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+ AM_RANGE(0x908000, 0x90ffff) AM_RAM //
+ AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x988000, 0x98ffff) AM_RAM //
+ AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0xa80068, 0xa80069) AM_WRITE(watchdog_reset16_w) // Watchdog?
+ AM_RANGE(0xa8006c, 0xa8006d) AM_READ(soundflags_ack_r) AM_WRITENOP // Communication
+ AM_RANGE(0xa8006e, 0xa8006f) AM_READWRITE(soundlatch_ack_r, sound_cmd_w) // From Sound CPU
+ AM_RANGE(0xa80000, 0xa8007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+ AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0xd00000, 0xd00001) AM_WRITE(metmqstr_eeprom_msb_w) // EEPROM
+ AM_RANGE(0xf00000, 0xf07fff) AM_RAM AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0xf08000, 0xf0ffff) AM_RAM AM_SHARE("spriteram_2") // RAM
ADDRESS_MAP_END
@@ -814,11 +814,11 @@ INLINE void vctrl_w(address_space &space, offs_t offset, UINT16 data, UINT16 mem
{
switch (data & 0x000f)
{
- case 1: data = (data & ~0x000f) | 0; break;
- case 2: data = (data & ~0x000f) | 1; break;
- case 4: data = (data & ~0x000f) | 2; break;
+ case 1: data = (data & ~0x000f) | 0; break;
+ case 2: data = (data & ~0x000f) | 1; break;
+ case 4: data = (data & ~0x000f) | 2; break;
default:
- case 8: data = (data & ~0x000f) | 3; break;
+ case 8: data = (data & ~0x000f) | 3; break;
}
}
COMBINE_DATA(&VCTRL[offset]);
@@ -829,28 +829,28 @@ WRITE16_MEMBER(cave_state::pwrinst2_vctrl_2_w){ vctrl_w(space, offset, data, mem
WRITE16_MEMBER(cave_state::pwrinst2_vctrl_3_w){ vctrl_w(space, offset, data, mem_mask, 3); }
static ADDRESS_MAP_START( pwrinst2_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x1fffff) AM_ROM // ROM
- AM_RANGE(0x400000, 0x40ffff) AM_RAM // RAM
- AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1") //
- AM_RANGE(0x600000, 0x6fffff) AM_ROM AM_REGION("user1", 0) // extra data ROM space
- AM_RANGE(0x700000, 0x700001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
- AM_RANGE(0x800000, 0x807fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
- AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_3_8x8_w) AM_SHARE("vram.3") // Layer 3
- AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_SHARE("spriteram") // Sprites
- AM_RANGE(0xa08000, 0xa0ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
- AM_RANGE(0xa10000, 0xa1ffff) AM_RAM // Sprites?
- AM_RANGE(0xa80000, 0xa8007f) AM_RAM_READ(donpachi_videoregs_r) AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM_WRITE(pwrinst2_vctrl_2_w) AM_SHARE("vctrl.2") // Layer 2 Control
-/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM_WRITE(pwrinst2_vctrl_0_w) AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM_WRITE(pwrinst2_vctrl_1_w) AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xc80000, 0xc80005) AM_RAM_WRITE(pwrinst2_vctrl_3_w) AM_SHARE("vctrl.3") // Layer 3 Control
- AM_RANGE(0xd80000, 0xd80001) AM_READ(soundlatch_ack_r) // ? From Sound CPU
- AM_RANGE(0xe00000, 0xe00001) AM_WRITE(sound_cmd_w) // To Sound CPU
- AM_RANGE(0xe80000, 0xe80001) AM_READ(pwrinst2_eeprom_r) // EEPROM
- AM_RANGE(0xf00000, 0xf04fff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x000000, 0x1fffff) AM_ROM // ROM
+ AM_RANGE(0x400000, 0x40ffff) AM_RAM // RAM
+ AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1") //
+ AM_RANGE(0x600000, 0x6fffff) AM_ROM AM_REGION("user1", 0) // extra data ROM space
+ AM_RANGE(0x700000, 0x700001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x800000, 0x807fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+ AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_3_8x8_w) AM_SHARE("vram.3") // Layer 3
+ AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0xa08000, 0xa0ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+ AM_RANGE(0xa10000, 0xa1ffff) AM_RAM // Sprites?
+ AM_RANGE(0xa80000, 0xa8007f) AM_RAM_READ(donpachi_videoregs_r) AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM_WRITE(pwrinst2_vctrl_2_w) AM_SHARE("vctrl.2") // Layer 2 Control
+/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM_WRITE(pwrinst2_vctrl_0_w) AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM_WRITE(pwrinst2_vctrl_1_w) AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xc80000, 0xc80005) AM_RAM_WRITE(pwrinst2_vctrl_3_w) AM_SHARE("vctrl.3") // Layer 3 Control
+ AM_RANGE(0xd80000, 0xd80001) AM_READ(soundlatch_ack_r) // ? From Sound CPU
+ AM_RANGE(0xe00000, 0xe00001) AM_WRITE(sound_cmd_w) // To Sound CPU
+ AM_RANGE(0xe80000, 0xe80001) AM_READ(pwrinst2_eeprom_r) // EEPROM
+ AM_RANGE(0xf00000, 0xf04fff) AM_RAM AM_SHARE("paletteram") // Palette
ADDRESS_MAP_END
@@ -865,32 +865,32 @@ READ16_MEMBER(cave_state::sailormn_input0_r)
}
static ADDRESS_MAP_START( sailormn_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
- AM_RANGE(0x110000, 0x110001) AM_RAM // (agallet)
- AM_RANGE(0x200000, 0x3fffff) AM_ROM // ROM
- AM_RANGE(0x400000, 0x407fff) AM_RAM // (agallet)
- AM_RANGE(0x408000, 0x40bfff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0x40c000, 0x40ffff) AM_RAM // (agallet)
- AM_RANGE(0x410000, 0x410001) AM_RAM // (agallet)
- AM_RANGE(0x500000, 0x507fff) AM_RAM AM_SHARE("spriteram") // Sprites
- AM_RANGE(0x508000, 0x50ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
- AM_RANGE(0x510000, 0x510001) AM_RAM // (agallet)
- AM_RANGE(0x600000, 0x600001) AM_READ(sailormn_input0_r) // Inputs + Watchdog!
- AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0x700000, 0x700001) AM_WRITE(sailormn_eeprom_msb_w) // EEPROM
- AM_RANGE(0x800000, 0x807fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
- AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
- AM_RANGE(0x908000, 0x908001) AM_RAM // (agallet)
-/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0xa80000, 0xa80005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
-/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
- AM_RANGE(0xb80000, 0xb80007) AM_READ(cave_irq_cause_r) // IRQ Cause (bit 2 tested!)
- AM_RANGE(0xb8006c, 0xb8006d) AM_READ(soundflags_ack_r) // Communication
- AM_RANGE(0xb8006e, 0xb8006f) AM_READ(soundlatch_ack_r) // From Sound CPU
- AM_RANGE(0xb8006e, 0xb8006f) AM_WRITE(sound_cmd_w) // To Sound CPU
- AM_RANGE(0xb80000, 0xb8007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+ AM_RANGE(0x110000, 0x110001) AM_RAM // (agallet)
+ AM_RANGE(0x200000, 0x3fffff) AM_ROM // ROM
+ AM_RANGE(0x400000, 0x407fff) AM_RAM // (agallet)
+ AM_RANGE(0x408000, 0x40bfff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x40c000, 0x40ffff) AM_RAM // (agallet)
+ AM_RANGE(0x410000, 0x410001) AM_RAM // (agallet)
+ AM_RANGE(0x500000, 0x507fff) AM_RAM AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0x508000, 0x50ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+ AM_RANGE(0x510000, 0x510001) AM_RAM // (agallet)
+ AM_RANGE(0x600000, 0x600001) AM_READ(sailormn_input0_r) // Inputs + Watchdog!
+ AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0x700000, 0x700001) AM_WRITE(sailormn_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x800000, 0x807fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_1_w) AM_SHARE("vram.1") // Layer 1
+ AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_2_w) AM_SHARE("vram.2") // Layer 2
+ AM_RANGE(0x908000, 0x908001) AM_RAM // (agallet)
+/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0xa80000, 0xa80005) AM_RAM AM_SHARE("vctrl.1") // Layer 1 Control
+/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_SHARE("vctrl.2") // Layer 2 Control
+ AM_RANGE(0xb80000, 0xb80007) AM_READ(cave_irq_cause_r) // IRQ Cause (bit 2 tested!)
+ AM_RANGE(0xb8006c, 0xb8006d) AM_READ(soundflags_ack_r) // Communication
+ AM_RANGE(0xb8006e, 0xb8006f) AM_READ(soundlatch_ack_r) // From Sound CPU
+ AM_RANGE(0xb8006e, 0xb8006f) AM_WRITE(sound_cmd_w) // To Sound CPU
+ AM_RANGE(0xb80000, 0xb8007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
ADDRESS_MAP_END
@@ -922,14 +922,14 @@ WRITE16_MEMBER(cave_state::tjumpman_leds_w)
{
if (ACCESSING_BITS_0_7)
{
- set_led_status(machine(), 0, data & 0x0001); // suru
- set_led_status(machine(), 1, data & 0x0002); // shinai
- set_led_status(machine(), 2, data & 0x0004); // payout
- set_led_status(machine(), 3, data & 0x0008); // go
- set_led_status(machine(), 4, data & 0x0010); // 1 bet
- set_led_status(machine(), 5, data & 0x0020); // medal
- m_hopper = data & 0x0040; // hopper
- set_led_status(machine(), 6, data & 0x0080); // 3 bet
+ set_led_status(machine(), 0, data & 0x0001); // suru
+ set_led_status(machine(), 1, data & 0x0002); // shinai
+ set_led_status(machine(), 2, data & 0x0004); // payout
+ set_led_status(machine(), 3, data & 0x0008); // go
+ set_led_status(machine(), 4, data & 0x0010); // 1 bet
+ set_led_status(machine(), 5, data & 0x0020); // medal
+ m_hopper = data & 0x0040; // hopper
+ set_led_status(machine(), 6, data & 0x0080); // 3 bet
}
// popmessage("led %04X", data);
@@ -941,22 +941,22 @@ CUSTOM_INPUT_MEMBER(cave_state::tjumpman_hopper_r)
}
static ADDRESS_MAP_START( tjumpman_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_SHARE("nvram") // RAM
- AM_RANGE(0x200000, 0x207fff) AM_RAM AM_SHARE("spriteram") // Sprites
- AM_RANGE(0x208000, 0x20ffff) AM_RAM AM_SHARE("spriteram_2") // Sprite bank 2
- AM_RANGE(0x304000, 0x307fff) AM_WRITE(cave_vram_0_w) // Layer 0 - 16x16 tiles mapped here
- AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x400000, 0x400005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
- AM_RANGE(0x500000, 0x50ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0x600000, 0x600001) AM_READ_PORT("IN0") // Inputs + EEPROM + Hopper
- AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1") // Inputs
- AM_RANGE(0x700000, 0x700007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x700068, 0x700069) AM_WRITE(watchdog_reset16_w) // Watchdog
- AM_RANGE(0x700000, 0x70007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
- AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // M6295
- AM_RANGE(0xc00000, 0xc00001) AM_WRITE(tjumpman_leds_w) // Leds + Hopper
- AM_RANGE(0xe00000, 0xe00001) AM_WRITE(tjumpman_eeprom_lsb_w) // EEPROM
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_SHARE("nvram") // RAM
+ AM_RANGE(0x200000, 0x207fff) AM_RAM AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0x208000, 0x20ffff) AM_RAM AM_SHARE("spriteram_2") // Sprite bank 2
+ AM_RANGE(0x304000, 0x307fff) AM_WRITE(cave_vram_0_w) // Layer 0 - 16x16 tiles mapped here
+ AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x400000, 0x400005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
+ AM_RANGE(0x500000, 0x50ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x600000, 0x600001) AM_READ_PORT("IN0") // Inputs + EEPROM + Hopper
+ AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1") // Inputs
+ AM_RANGE(0x700000, 0x700007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x700068, 0x700069) AM_WRITE(watchdog_reset16_w) // Watchdog
+ AM_RANGE(0x700000, 0x70007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+ AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // M6295
+ AM_RANGE(0xc00000, 0xc00001) AM_WRITE(tjumpman_leds_w) // Leds + Hopper
+ AM_RANGE(0xe00000, 0xe00001) AM_WRITE(tjumpman_eeprom_lsb_w) // EEPROM
ADDRESS_MAP_END
@@ -968,34 +968,34 @@ WRITE16_MEMBER(cave_state::pacslot_leds_w)
{
if (ACCESSING_BITS_0_7)
{
- set_led_status(machine(), 0, data & 0x0001); // pac-man
- set_led_status(machine(), 1, data & 0x0002); // ms. pac-man
- set_led_status(machine(), 2, data & 0x0004); // payout
- set_led_status(machine(), 3, data & 0x0008); // start
- set_led_status(machine(), 4, data & 0x0010); // bet
- set_led_status(machine(), 5, data & 0x0020); // medal
- m_hopper = data & 0x0040; // hopper
+ set_led_status(machine(), 0, data & 0x0001); // pac-man
+ set_led_status(machine(), 1, data & 0x0002); // ms. pac-man
+ set_led_status(machine(), 2, data & 0x0004); // payout
+ set_led_status(machine(), 3, data & 0x0008); // start
+ set_led_status(machine(), 4, data & 0x0010); // bet
+ set_led_status(machine(), 5, data & 0x0020); // medal
+ m_hopper = data & 0x0040; // hopper
}
// popmessage("led %04X", data);
}
static ADDRESS_MAP_START( pacslot_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_SHARE("nvram") // RAM
- AM_RANGE(0x200000, 0x207fff) AM_RAM AM_SHARE("spriteram") // Sprites
- AM_RANGE(0x208000, 0x20ffff) AM_RAM AM_SHARE("spriteram_2") // Sprite bank 2
- AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x400000, 0x400007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x400068, 0x400069) AM_WRITE(watchdog_reset16_w) // Watchdog
- AM_RANGE(0x400000, 0x40007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
- AM_RANGE(0x500000, 0x500005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
- AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0x700000, 0x700001) AM_READ_PORT("IN0") // Inputs + EEPROM + Hopper
- AM_RANGE(0x700002, 0x700003) AM_READ_PORT("IN1") // Inputs
- AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // M6295
- AM_RANGE(0xc00000, 0xc00001) AM_WRITE(pacslot_leds_w) // Leds + Hopper
- AM_RANGE(0xe00000, 0xe00001) AM_WRITE(tjumpman_eeprom_lsb_w) // EEPROM
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_SHARE("nvram") // RAM
+ AM_RANGE(0x200000, 0x207fff) AM_RAM AM_SHARE("spriteram") // Sprites
+ AM_RANGE(0x208000, 0x20ffff) AM_RAM AM_SHARE("spriteram_2") // Sprite bank 2
+ AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x400000, 0x400007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x400068, 0x400069) AM_WRITE(watchdog_reset16_w) // Watchdog
+ AM_RANGE(0x400000, 0x40007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+ AM_RANGE(0x500000, 0x500005) AM_WRITEONLY AM_SHARE("vctrl.0") // Layer 0 Control
+ AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x700000, 0x700001) AM_READ_PORT("IN0") // Inputs + EEPROM + Hopper
+ AM_RANGE(0x700002, 0x700003) AM_READ_PORT("IN1") // Inputs
+ AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // M6295
+ AM_RANGE(0xc00000, 0xc00001) AM_WRITE(pacslot_leds_w) // Leds + Hopper
+ AM_RANGE(0xe00000, 0xe00001) AM_WRITE(tjumpman_eeprom_lsb_w) // EEPROM
ADDRESS_MAP_END
@@ -1004,19 +1004,19 @@ ADDRESS_MAP_END
***************************************************************************/
static ADDRESS_MAP_START( uopoko_map, AS_PROGRAM, 16, cave_state )
- AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
- AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
- AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
-/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
-/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
-/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
- AM_RANGE(0x600000, 0x600007) AM_READ(cave_irq_cause_r) // IRQ Cause
- AM_RANGE(0x600000, 0x60007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
-/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
-/**/AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_SHARE("paletteram") // Palette
- AM_RANGE(0x900000, 0x900001) AM_READ_PORT("IN0") // Inputs
- AM_RANGE(0x900002, 0x900003) AM_READ_PORT("IN1") // Inputs + EEPROM
- AM_RANGE(0xa00000, 0xa00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
+ AM_RANGE(0x000000, 0x0fffff) AM_ROM // ROM
+ AM_RANGE(0x100000, 0x10ffff) AM_RAM // RAM
+ AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8_LEGACY("ymz", ymz280b_r, ymz280b_w, 0x00ff) // YMZ280
+/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_SHARE("spriteram") // Sprites
+/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_SHARE("spriteram_2") // Sprites?
+/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_SHARE("vram.0") // Layer 0
+ AM_RANGE(0x600000, 0x600007) AM_READ(cave_irq_cause_r) // IRQ Cause
+ AM_RANGE(0x600000, 0x60007f) AM_WRITEONLY AM_SHARE("videoregs") // Video Regs
+/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_SHARE("vctrl.0") // Layer 0 Control
+/**/AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x900000, 0x900001) AM_READ_PORT("IN0") // Inputs
+ AM_RANGE(0x900002, 0x900003) AM_READ_PORT("IN1") // Inputs + EEPROM
+ AM_RANGE(0xa00000, 0xa00001) AM_WRITE(cave_eeprom_msb_w) // EEPROM
ADDRESS_MAP_END
@@ -1062,19 +1062,19 @@ WRITE8_MEMBER(cave_state::hotdogst_okibank_w)
}
static ADDRESS_MAP_START( hotdogst_sound_map, AS_PROGRAM, 8, cave_state )
- AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank2") // ROM (Banked)
- AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
+ AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank2") // ROM (Banked)
+ AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( hotdogst_sound_portmap, AS_IO, 8, cave_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_WRITE(hotdogst_rombank_w) // ROM bank
- AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
- AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r) //
- AM_RANGE(0x50, 0x51) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) //
- AM_RANGE(0x60, 0x60) AM_DEVREADWRITE("oki", okim6295_device, read, write) // M6295
- AM_RANGE(0x70, 0x70) AM_WRITE(hotdogst_okibank_w) // Samples bank
+ AM_RANGE(0x00, 0x00) AM_WRITE(hotdogst_rombank_w) // ROM bank
+ AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
+ AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r) //
+ AM_RANGE(0x50, 0x51) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) //
+ AM_RANGE(0x60, 0x60) AM_DEVREADWRITE("oki", okim6295_device, read, write) // M6295
+ AM_RANGE(0x70, 0x70) AM_WRITE(hotdogst_okibank_w) // Samples bank
ADDRESS_MAP_END
@@ -1091,21 +1091,21 @@ WRITE8_MEMBER(cave_state::mazinger_rombank_w)
}
static ADDRESS_MAP_START( mazinger_sound_map, AS_PROGRAM, 8, cave_state )
- AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank2") // ROM (Banked)
- AM_RANGE(0xc000, 0xc7ff) AM_RAM // RAM
- AM_RANGE(0xf800, 0xffff) AM_RAM // RAM
+ AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank2") // ROM (Banked)
+ AM_RANGE(0xc000, 0xc7ff) AM_RAM // RAM
+ AM_RANGE(0xf800, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( mazinger_sound_portmap, AS_IO, 8, cave_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_WRITE(mazinger_rombank_w) // ROM bank
- AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w) // To Main CPU
- AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
- AM_RANGE(0x50, 0x51) AM_DEVWRITE_LEGACY("ymsnd", ym2203_w) // YM2203
- AM_RANGE(0x52, 0x53) AM_DEVREAD_LEGACY("ymsnd", ym2203_r) // YM2203
- AM_RANGE(0x70, 0x70) AM_DEVWRITE("oki", okim6295_device, write) // M6295
- AM_RANGE(0x74, 0x74) AM_WRITE(hotdogst_okibank_w) // Samples bank
+ AM_RANGE(0x00, 0x00) AM_WRITE(mazinger_rombank_w) // ROM bank
+ AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w) // To Main CPU
+ AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
+ AM_RANGE(0x50, 0x51) AM_DEVWRITE_LEGACY("ymsnd", ym2203_w) // YM2203
+ AM_RANGE(0x52, 0x53) AM_DEVREAD_LEGACY("ymsnd", ym2203_r) // YM2203
+ AM_RANGE(0x70, 0x70) AM_DEVWRITE("oki", okim6295_device, write) // M6295
+ AM_RANGE(0x74, 0x74) AM_WRITE(hotdogst_okibank_w) // Samples bank
ADDRESS_MAP_END
@@ -1138,22 +1138,22 @@ WRITE8_MEMBER(cave_state::metmqstr_okibank1_w)
}
static ADDRESS_MAP_START( metmqstr_sound_map, AS_PROGRAM, 8, cave_state )
- AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") // ROM (Banked)
- AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
+ AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") // ROM (Banked)
+ AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( metmqstr_sound_portmap, AS_IO, 8, cave_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_WRITE(metmqstr_rombank_w) // Rom Bank
- AM_RANGE(0x20, 0x20) AM_READ(soundflags_r) // Communication
- AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
- AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r) //
- AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) // YM2151
- AM_RANGE(0x60, 0x60) AM_DEVWRITE("oki1", okim6295_device, write) // M6295 #0
- AM_RANGE(0x70, 0x70) AM_WRITE(metmqstr_okibank0_w) // Samples Bank #0
- AM_RANGE(0x80, 0x80) AM_DEVWRITE("oki2", okim6295_device, write) // M6295 #1
- AM_RANGE(0x90, 0x90) AM_WRITE(metmqstr_okibank1_w) // Samples Bank #1
+ AM_RANGE(0x00, 0x00) AM_WRITE(metmqstr_rombank_w) // Rom Bank
+ AM_RANGE(0x20, 0x20) AM_READ(soundflags_r) // Communication
+ AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
+ AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r) //
+ AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) // YM2151
+ AM_RANGE(0x60, 0x60) AM_DEVWRITE("oki1", okim6295_device, write) // M6295 #0
+ AM_RANGE(0x70, 0x70) AM_WRITE(metmqstr_okibank0_w) // Samples Bank #0
+ AM_RANGE(0x80, 0x80) AM_DEVWRITE("oki2", okim6295_device, write) // M6295 #1
+ AM_RANGE(0x90, 0x90) AM_WRITE(metmqstr_okibank1_w) // Samples Bank #1
ADDRESS_MAP_END
@@ -1170,22 +1170,22 @@ WRITE8_MEMBER(cave_state::pwrinst2_rombank_w)
}
static ADDRESS_MAP_START( pwrinst2_sound_map, AS_PROGRAM, 8, cave_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
- AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") // ROM (Banked)
- AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
+ AM_RANGE(0x0000, 0x7fff) AM_ROM // ROM
+ AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1") // ROM (Banked)
+ AM_RANGE(0xe000, 0xffff) AM_RAM // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( pwrinst2_sound_portmap, AS_IO, 8, cave_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_DEVREADWRITE("oki1", okim6295_device, read, write) // M6295
- AM_RANGE(0x08, 0x08) AM_DEVREADWRITE("oki2", okim6295_device, read, write) //
- AM_RANGE(0x10, 0x17) AM_DEVWRITE_LEGACY("nmk112", nmk112_okibank_w) // Samples bank
- AM_RANGE(0x40, 0x41) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) //
- AM_RANGE(0x50, 0x50) AM_WRITE(soundlatch_ack_w) // To Main CPU
+ AM_RANGE(0x00, 0x00) AM_DEVREADWRITE("oki1", okim6295_device, read, write) // M6295
+ AM_RANGE(0x08, 0x08) AM_DEVREADWRITE("oki2", okim6295_device, read, write) //
+ AM_RANGE(0x10, 0x17) AM_DEVWRITE_LEGACY("nmk112", nmk112_okibank_w) // Samples bank
+ AM_RANGE(0x40, 0x41) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) //
+ AM_RANGE(0x50, 0x50) AM_WRITE(soundlatch_ack_w) // To Main CPU
// AM_RANGE(0x51, 0x51) AM_WRITENOP // ?? volume
- AM_RANGE(0x80, 0x80) AM_WRITE(pwrinst2_rombank_w) // ROM bank
- AM_RANGE(0x60, 0x60) AM_READ(soundlatch_hi_r) // From Main CPU
- AM_RANGE(0x70, 0x70) AM_READ(soundlatch_lo_r) //
+ AM_RANGE(0x80, 0x80) AM_WRITE(pwrinst2_rombank_w) // ROM bank
+ AM_RANGE(0x60, 0x60) AM_READ(soundlatch_hi_r) // From Main CPU
+ AM_RANGE(0x70, 0x70) AM_READ(soundlatch_lo_r) //
ADDRESS_MAP_END
@@ -1228,24 +1228,24 @@ WRITE8_MEMBER(cave_state::sailormn_okibank1_w)
}
static ADDRESS_MAP_START( sailormn_sound_map, AS_PROGRAM, 8, cave_state )
- AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") // ROM (Banked)
- AM_RANGE(0xc000, 0xdfff) AM_READWRITE(mirror_ram_r, mirror_ram_w) AM_SHARE("mirror_ram") // RAM
- AM_RANGE(0xe000, 0xffff) AM_READWRITE(mirror_ram_r, mirror_ram_w) // Mirrored RAM (agallet)
+ AM_RANGE(0x0000, 0x3fff) AM_ROM // ROM
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") // ROM (Banked)
+ AM_RANGE(0xc000, 0xdfff) AM_READWRITE(mirror_ram_r, mirror_ram_w) AM_SHARE("mirror_ram") // RAM
+ AM_RANGE(0xe000, 0xffff) AM_READWRITE(mirror_ram_r, mirror_ram_w) // Mirrored RAM (agallet)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sailormn_sound_portmap, AS_IO, 8, cave_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_WRITE(sailormn_rombank_w) // Rom Bank
- AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w) // To Main CPU
- AM_RANGE(0x20, 0x20) AM_READ(soundflags_r) // Communication
- AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
- AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r) //
- AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) // YM2151
- AM_RANGE(0x60, 0x60) AM_DEVREADWRITE("oki1", okim6295_device, read, write) // M6295 #0
- AM_RANGE(0x70, 0x70) AM_WRITE(sailormn_okibank0_w) // Samples Bank #0
- AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("oki2", okim6295_device, read, write) // M6295 #1
- AM_RANGE(0xc0, 0xc0) AM_WRITE(sailormn_okibank1_w) // Samples Bank #1
+ AM_RANGE(0x00, 0x00) AM_WRITE(sailormn_rombank_w) // Rom Bank
+ AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w) // To Main CPU
+ AM_RANGE(0x20, 0x20) AM_READ(soundflags_r) // Communication
+ AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r) // From Main CPU
+ AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r) //
+ AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) // YM2151
+ AM_RANGE(0x60, 0x60) AM_DEVREADWRITE("oki1", okim6295_device, read, write) // M6295 #0
+ AM_RANGE(0x70, 0x70) AM_WRITE(sailormn_okibank0_w) // Samples Bank #0
+ AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("oki2", okim6295_device, read, write) // M6295 #1
+ AM_RANGE(0xc0, 0xc0) AM_WRITE(sailormn_okibank1_w) // Samples Bank #1
ADDRESS_MAP_END
@@ -1266,7 +1266,7 @@ ADDRESS_MAP_END
/* Most games use this */
static INPUT_PORTS_START( cave )
- PORT_START("IN0") // Player 1
+ PORT_START("IN0") // Player 1
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
@@ -1277,14 +1277,14 @@ static INPUT_PORTS_START( cave )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(6)
PORT_SERVICE_NO_TOGGLE( 0x0200, IP_ACTIVE_LOW )
- PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) // sw? exit service mode
- PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) // sw? enter & exit service mode
+ PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN ) // sw? exit service mode
+ PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN ) // sw? enter & exit service mode
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN1") // Player 2
+ PORT_START("IN1") // Player 2
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
@@ -1307,7 +1307,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( gaia )
PORT_INCLUDE( cave )
- PORT_MODIFY("IN0") // Player 1 + 2
+ PORT_MODIFY("IN0") // Player 1 + 2
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
@@ -1318,7 +1318,7 @@ static INPUT_PORTS_START( gaia )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
- PORT_MODIFY("IN1") // Coins
+ PORT_MODIFY("IN1") // Coins
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(6)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(6)
PORT_SERVICE_NO_TOGGLE( 0x0004, IP_ACTIVE_LOW )
@@ -1338,10 +1338,10 @@ static INPUT_PORTS_START( gaia )
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:2")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
- PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x0000, DEF_STR( English ) )
PORT_DIPSETTING( 0x0004, DEF_STR( Japanese ) )
- PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,5,6")
+ PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:4,5,6")
PORT_DIPSETTING( 0x0008, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
@@ -1350,19 +1350,19 @@ static INPUT_PORTS_START( gaia )
PORT_DIPSETTING( 0x0018, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0028, DEF_STR( 1C_3C ) )
- PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:7")
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:8")
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0080, DEF_STR( On ) )
- PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x0100, "1" )
PORT_DIPSETTING( 0x0000, "2" )
PORT_DIPSETTING( 0x0300, "3" )
PORT_DIPSETTING( 0x0200, "4" )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0400, "150k/300k" ) PORT_CONDITION("DSW", 0xe000, EQUALS, 0xc000)
PORT_DIPSETTING( 0x0400, "150k/350k" ) PORT_CONDITION("DSW", 0xe000, EQUALS, 0xa000)
@@ -1372,12 +1372,12 @@ static INPUT_PORTS_START( gaia )
PORT_DIPSETTING( 0x0400, "150k/400k" ) PORT_CONDITION("DSW", 0xe000, EQUALS, 0x2000)
PORT_DIPSETTING( 0x0400, "200k/500k" ) PORT_CONDITION("DSW", 0xe000, EQUALS, 0x4000)
PORT_DIPSETTING( 0x0400, "200k/500k" ) PORT_CONDITION("DSW", 0xe000, EQUALS, 0x0000)
- PORT_DIPNAME( 0x1800, 0x1800, "Damage" ) PORT_DIPLOCATION("SW2:4,5")
+ PORT_DIPNAME( 0x1800, 0x1800, "Damage" ) PORT_DIPLOCATION("SW2:4,5")
PORT_DIPSETTING( 0x1800, "+0" )
PORT_DIPSETTING( 0x1000, "+1" )
PORT_DIPSETTING( 0x0800, "+2" )
PORT_DIPSETTING( 0x0000, "+3" )
- PORT_DIPNAME( 0xe000, 0xe000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7,8")
+ PORT_DIPNAME( 0xe000, 0xe000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7,8")
PORT_DIPSETTING( 0xc000, DEF_STR( Very_Easy ) )
PORT_DIPSETTING( 0xa000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0xe000, DEF_STR( Medium ) )
@@ -1392,17 +1392,17 @@ static INPUT_PORTS_START( theroes )
PORT_INCLUDE( gaia )
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x0004, 0x0000, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x0000, DEF_STR( English ) )
PORT_DIPSETTING( 0x0004, DEF_STR( Chinese ) )
- PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0400, "150k/300k" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x8000)
PORT_DIPSETTING( 0x0400, "150k/350k" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0xc000)
PORT_DIPSETTING( 0x0400, "150k/400k" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x4000)
PORT_DIPSETTING( 0x0400, "200k/500k" ) PORT_CONDITION("DSW", 0xc000, EQUALS, 0x0000)
PORT_DIPUNKNOWN_DIPLOC( 0x2000, 0x2000, "SW2:6" )
- PORT_DIPNAME( 0xc000, 0xc000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8")
+ PORT_DIPNAME( 0xc000, 0xc000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:7,8")
PORT_DIPSETTING( 0x8000, DEF_STR( Very_Easy ) )
PORT_DIPSETTING( 0xc000, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x4000, DEF_STR( Medium_Hard ) )
@@ -1414,16 +1414,16 @@ INPUT_PORTS_END
static INPUT_PORTS_START( metmqstr )
PORT_INCLUDE( cave )
- PORT_MODIFY("IN0") // Player 1
+ PORT_MODIFY("IN0") // Player 1
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
- PORT_MODIFY("IN1") // Player 2
+ PORT_MODIFY("IN1") // Player 2
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
INPUT_PORTS_END
/* Different layout */
static INPUT_PORTS_START( guwange )
- PORT_START("IN0") // Player 1 & 2
+ PORT_START("IN0") // Player 1 & 2
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
@@ -1441,7 +1441,7 @@ static INPUT_PORTS_START( guwange )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
- PORT_START("IN1") // Coins
+ PORT_START("IN1") // Coins
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(6)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(6)
PORT_SERVICE_NO_TOGGLE( 0x0004, IP_ACTIVE_LOW )
@@ -1463,11 +1463,11 @@ INPUT_PORTS_END
static INPUT_PORTS_START( korokoro )
PORT_START("IN0")
- PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(10) // bit 0x0010 of leds (coin)
- PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(10) // bit 0x0020 of leds (does coin sound)
- PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(10) // bit 0x0080 of leds
- PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON1 ) // round button (choose)
- PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) // square button (select in service mode / medal out in game)
+ PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(10) // bit 0x0010 of leds (coin)
+ PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(10) // bit 0x0020 of leds (does coin sound)
+ PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(10) // bit 0x0080 of leds
+ PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON1 ) // round button (choose)
+ PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) // square button (select in service mode / medal out in game)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1475,10 +1475,10 @@ static INPUT_PORTS_START( korokoro )
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // service medal out?
+ PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // service medal out?
PORT_SERVICE( 0x2000, IP_ACTIVE_LOW )
- PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service coin
- PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, cave_state,korokoro_hopper_r, NULL) // motor / hopper status ???
+ PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service coin
+ PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, cave_state,korokoro_hopper_r, NULL) // motor / hopper status ???
PORT_START("IN1")
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1506,7 +1506,7 @@ static INPUT_PORTS_START( tjumpman )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( DEF_STR( Yes ) ) PORT_CODE(KEYCODE_Y) // suru ("do")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( DEF_STR( Yes ) ) PORT_CODE(KEYCODE_Y) // suru ("do")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME( "1 Bet" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, cave_state,tjumpman_hopper_r, NULL)
@@ -1518,9 +1518,9 @@ static INPUT_PORTS_START( tjumpman )
PORT_CONFNAME( 0x08, 0x08, "Self Test" )
PORT_CONFSETTING( 0x08, DEF_STR( Off ) )
PORT_CONFSETTING( 0x00, DEF_STR( On ) )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME( DEF_STR( No ) ) PORT_CODE(KEYCODE_N) // shinai ("not")
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME( DEF_STR( No ) ) PORT_CODE(KEYCODE_N) // shinai ("not")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME( "Go" )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) // medal
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) // medal
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME( "3 Bet" )
INPUT_PORTS_END
@@ -1528,7 +1528,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( pacslot )
PORT_START("IN0")
PORT_SERVICE( 0x01, IP_ACTIVE_LOW )
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) // credits
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) // credits
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME( "Pac-Man" ) PORT_CODE(KEYCODE_Y)
@@ -1639,13 +1639,13 @@ static const gfx_layout layout_sprites =
static GFXDECODE_START( dfeveron )
/* There are only $800 colors here, the first half for sprites
- the second half for tiles. We use $8000 virtual colors instead
- for consistency with games having $8000 real colors.
- A PALETTE_INIT function is thus needed for sprites */
+ the second half for tiles. We use $8000 virtual colors instead
+ for consistency with games having $8000 real colors.
+ A PALETTE_INIT function is thus needed for sprites */
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4400, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4400, 0x40 ) // [1] Layer 1
GFXDECODE_END
/***************************************************************************
@@ -1654,15 +1654,15 @@ GFXDECODE_END
static GFXDECODE_START( ddonpach )
/* Layers 01 are 4 bit deep and use the first 16 of every 256
- colors for any given color code (a PALETTE_INIT function
- is provided for these layers, filling the 8000-83ff entries
- in the color table). Layer 2 uses the whole 256 for any given
- color code and the 4000-7fff range in the color table. */
+ colors for any given color code (a PALETTE_INIT function
+ is provided for these layers, filling the 8000-83ff entries
+ in the color table). Layer 2 uses the whole 256 for any given
+ color code and the 4000-7fff range in the color table. */
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x8000, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x8000, 0x40 ) // [1] Layer 1
- GFXDECODE_ENTRY( "layer2", 0, layout_8x8x8, 0x4000, 0x40 ) // [2] Layer 2
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x8000, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x8000, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer2", 0, layout_8x8x8, 0x4000, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
@@ -1671,14 +1671,14 @@ GFXDECODE_END
static GFXDECODE_START( donpachi )
/* There are only $800 colors here, the first half for sprites
- the second half for tiles. We use $8000 virtual colors instead
- for consistency with games having $8000 real colors.
- A PALETTE_INIT function is thus needed for sprites */
+ the second half for tiles. We use $8000 virtual colors instead
+ for consistency with games having $8000 real colors.
+ A PALETTE_INIT function is thus needed for sprites */
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4400, 0x40 ) // [1] Layer 1
- GFXDECODE_ENTRY( "layer2", 0, layout_8x8x4, 0x4400, 0x40 ) // [2] Layer 2
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4400, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer2", 0, layout_8x8x4, 0x4400, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
@@ -1687,9 +1687,9 @@ GFXDECODE_END
static GFXDECODE_START( esprade )
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x8, 0x4000, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x8, 0x4000, 0x40 ) // [1] Layer 1
- GFXDECODE_ENTRY( "layer2", 0, layout_8x8x8, 0x4000, 0x40 ) // [2] Layer 2
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x8, 0x4000, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x8, 0x4000, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer2", 0, layout_8x8x8, 0x4000, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
@@ -1698,14 +1698,14 @@ GFXDECODE_END
static GFXDECODE_START( hotdogst )
/* There are only $800 colors here, the first half for sprites
- the second half for tiles. We use $8000 virtual colors instead
- for consistency with games having $8000 real colors.
- A PALETTE_INIT function is needed for sprites */
+ the second half for tiles. We use $8000 virtual colors instead
+ for consistency with games having $8000 real colors.
+ A PALETTE_INIT function is needed for sprites */
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4000, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4000, 0x40 ) // [1] Layer 1
- GFXDECODE_ENTRY( "layer2", 0, layout_8x8x4, 0x4000, 0x40 ) // [2] Layer 2
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4000, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4000, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer2", 0, layout_8x8x4, 0x4000, 0x40 ) // [2] Layer 2
GFXDECODE_END
/***************************************************************************
@@ -1714,7 +1714,7 @@ GFXDECODE_END
static GFXDECODE_START( korokoro )
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
GFXDECODE_END
/***************************************************************************
@@ -1723,16 +1723,16 @@ GFXDECODE_END
static GFXDECODE_START( mazinger )
/* Sprites are 4 bit deep.
- Layer 0 is 4 bit deep.
- Layer 1 uses 64 color palettes, but the game only fills the
- first 16 colors of each palette, Indeed, the gfx data in ROM
- is empty in the top 4 bits. Additionally even if there are
- $40 color codes, only $400 colors are addressable.
- A PALETTE_INIT function is thus needed for sprites and layer 0. */
+ Layer 0 is 4 bit deep.
+ Layer 1 uses 64 color palettes, but the game only fills the
+ first 16 colors of each palette, Indeed, the gfx data in ROM
+ is empty in the top 4 bits. Additionally even if there are
+ $40 color codes, only $400 colors are addressable.
+ A PALETTE_INIT function is thus needed for sprites and layer 0. */
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4000, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x6, 0x4400, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4000, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x6, 0x4400, 0x40 ) // [1] Layer 1
GFXDECODE_END
@@ -1742,10 +1742,10 @@ GFXDECODE_END
static GFXDECODE_START( pwrinst2 )
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x0800+0x8000, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x1000+0x8000, 0x40 ) // [1] Layer 1
- GFXDECODE_ENTRY( "layer2", 0, layout_8x8x4, 0x1800+0x8000, 0x40 ) // [2] Layer 2
- GFXDECODE_ENTRY( "layer3", 0, layout_8x8x4, 0x2000+0x8000, 0x40 ) // [3] Layer 3
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x0800+0x8000, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x1000+0x8000, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer2", 0, layout_8x8x4, 0x1800+0x8000, 0x40 ) // [2] Layer 2
+ GFXDECODE_ENTRY( "layer3", 0, layout_8x8x4, 0x2000+0x8000, 0x40 ) // [3] Layer 3
GFXDECODE_END
@@ -1756,9 +1756,9 @@ GFXDECODE_END
static GFXDECODE_START( sailormn )
/* 4 bit sprites ? */
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
- GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4800, 0x40 ) // [1] Layer 1
- GFXDECODE_ENTRY( "layer2", 0, layout_8x8x6_2, 0x4c00, 0x40 ) // [2] Layer 2
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x4, 0x4400, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer1", 0, layout_8x8x4, 0x4800, 0x40 ) // [1] Layer 1
+ GFXDECODE_ENTRY( "layer2", 0, layout_8x8x6_2, 0x4c00, 0x40 ) // [2] Layer 2
GFXDECODE_END
@@ -1768,7 +1768,7 @@ GFXDECODE_END
static GFXDECODE_START( tjumpman )
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x8_split, 0x4000, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x8_split, 0x4000, 0x40 ) // [0] Layer 0
GFXDECODE_END
@@ -1778,7 +1778,7 @@ GFXDECODE_END
static GFXDECODE_START( uopoko )
// "sprites"
- GFXDECODE_ENTRY( "layer0", 0, layout_8x8x8, 0x4000, 0x40 ) // [0] Layer 0
+ GFXDECODE_ENTRY( "layer0", 0, layout_8x8x8, 0x4000, 0x40 ) // [0] Layer 0
GFXDECODE_END
@@ -1863,7 +1863,7 @@ static MACHINE_CONFIG_START( dfeveron, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(dfeveron)
- MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
+ MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MCFG_PALETTE_INIT_OVERRIDE(cave_state,dfeveron)
MCFG_VIDEO_START_OVERRIDE(cave_state,cave_2_layers)
@@ -1905,7 +1905,7 @@ static MACHINE_CONFIG_START( ddonpach, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(ddonpach)
- MCFG_PALETTE_LENGTH(0x8000 + 0x40*16) // $400 extra entries for layers 1&2
+ MCFG_PALETTE_LENGTH(0x8000 + 0x40*16) // $400 extra entries for layers 1&2
MCFG_PALETTE_INIT_OVERRIDE(cave_state,ddonpach)
MCFG_VIDEO_START_OVERRIDE(cave_state,cave_3_layers)
@@ -1926,7 +1926,7 @@ MACHINE_CONFIG_END
static const nmk112_interface donpachi_nmk112_intf =
{
- "oki1", "oki2", 1 << 0 // chip #0 (music) is not paged
+ "oki1", "oki2", 1 << 0 // chip #0 (music) is not paged
};
static MACHINE_CONFIG_START( donpachi, cave_state )
@@ -1951,7 +1951,7 @@ static MACHINE_CONFIG_START( donpachi, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(donpachi)
- MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
+ MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MCFG_PALETTE_INIT_OVERRIDE(cave_state,dfeveron)
MCFG_VIDEO_START_OVERRIDE(cave_state,cave_3_layers)
@@ -2122,7 +2122,7 @@ static MACHINE_CONFIG_START( hotdogst, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(hotdogst)
- MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
+ MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MCFG_PALETTE_INIT_OVERRIDE(cave_state,dfeveron)
MCFG_VIDEO_START_OVERRIDE(cave_state,cave_3_layers)
@@ -2174,7 +2174,7 @@ static MACHINE_CONFIG_START( korokoro, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(korokoro)
- MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
+ MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MCFG_PALETTE_INIT_OVERRIDE(cave_state,korokoro)
MCFG_VIDEO_START_OVERRIDE(cave_state,cave_1_layer)
@@ -2211,7 +2211,7 @@ static MACHINE_CONFIG_START( mazinger, cave_state )
MCFG_CPU_PROGRAM_MAP(mazinger_sound_map)
MCFG_CPU_IO_MAP(mazinger_sound_portmap)
- MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
MCFG_MACHINE_START_OVERRIDE(cave_state,cave)
MCFG_MACHINE_RESET_OVERRIDE(cave_state,cave)
@@ -2228,7 +2228,7 @@ static MACHINE_CONFIG_START( mazinger, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(mazinger)
- MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
+ MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MCFG_PALETTE_INIT_OVERRIDE(cave_state,mazinger)
MCFG_VIDEO_START_OVERRIDE(cave_state,cave_2_layers)
@@ -2269,10 +2269,10 @@ static MACHINE_CONFIG_START( metmqstr, cave_state )
MCFG_CPU_PROGRAM_MAP(metmqstr_sound_map)
MCFG_CPU_IO_MAP(metmqstr_sound_portmap)
- MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
MCFG_MACHINE_START_OVERRIDE(cave_state,cave)
- MCFG_MACHINE_RESET_OVERRIDE(cave_state,cave) /* start with the watchdog armed */
+ MCFG_MACHINE_RESET_OVERRIDE(cave_state,cave) /* start with the watchdog armed */
MCFG_EEPROM_93C46_ADD("eeprom")
MCFG_TIMER_DRIVER_ADD("int_timer", cave_state, cave_vblank_start)
@@ -2286,7 +2286,7 @@ static MACHINE_CONFIG_START( metmqstr, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(donpachi)
- MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
+ MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
MCFG_PALETTE_INIT_OVERRIDE(cave_state,dfeveron)
MCFG_VIDEO_START_OVERRIDE(cave_state,cave_3_layers)
@@ -2324,7 +2324,7 @@ static MACHINE_CONFIG_START( pacslot, cave_state )
MCFG_CPU_PROGRAM_MAP(pacslot_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cave_state, cave_interrupt)
- MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
MCFG_MACHINE_START_OVERRIDE(cave_state,cave)
MCFG_MACHINE_RESET_OVERRIDE(cave_state,cave)
@@ -2374,11 +2374,11 @@ static const nmk112_interface pwrinst2_nmk112_intf =
static MACHINE_CONFIG_START( pwrinst2, cave_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz) /* 16 MHz */
+ MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz) /* 16 MHz */
MCFG_CPU_PROGRAM_MAP(pwrinst2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cave_state, cave_interrupt)
- MCFG_CPU_ADD("audiocpu", Z80,XTAL_16MHz / 2) /* 8 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80,XTAL_16MHz / 2) /* 8 MHz */
MCFG_CPU_PROGRAM_MAP(pwrinst2_sound_map)
MCFG_CPU_IO_MAP(pwrinst2_sound_portmap)
@@ -2460,10 +2460,10 @@ static MACHINE_CONFIG_START( sailormn, cave_state )
MCFG_SCREEN_UPDATE_DRIVER(cave_state, screen_update_cave)
MCFG_GFXDECODE(sailormn)
- MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
- MCFG_PALETTE_INIT_OVERRIDE(cave_state,sailormn) // 4 bit sprites, 6 bit tiles
+ MCFG_PALETTE_LENGTH(0x8000) /* $8000 palette entries for consistency with the other games */
+ MCFG_PALETTE_INIT_OVERRIDE(cave_state,sailormn) // 4 bit sprites, 6 bit tiles
- MCFG_VIDEO_START_OVERRIDE(cave_state,sailormn_3_layers) /* Layer 2 has 1 banked ROM */
+ MCFG_VIDEO_START_OVERRIDE(cave_state,sailormn_3_layers) /* Layer 2 has 1 banked ROM */
/* sound hardware */
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
@@ -2497,7 +2497,7 @@ static MACHINE_CONFIG_START( tjumpman, cave_state )
MCFG_CPU_PROGRAM_MAP(tjumpman_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cave_state, cave_interrupt)
- MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
+ MCFG_WATCHDOG_TIME_INIT(attotime::from_seconds(3)) /* a guess, and certainly wrong */
MCFG_MACHINE_START_OVERRIDE(cave_state,cave)
MCFG_MACHINE_RESET_OVERRIDE(cave_state,cave)
@@ -2581,16 +2581,16 @@ MACHINE_CONFIG_END
/* 4 bits -> 8 bits. Even and odd pixels are swapped */
static void unpack_sprites(running_machine &machine)
{
- const UINT32 len = machine.root_device().memregion("sprites")->bytes();
- UINT8 *rgn = machine.root_device().memregion ("sprites")->base();
- UINT8 *src = rgn + len / 2 - 1;
- UINT8 *dst = rgn + len - 1;
+ const UINT32 len = machine.root_device().memregion("sprites")->bytes();
+ UINT8 *rgn = machine.root_device().memregion ("sprites")->base();
+ UINT8 *src = rgn + len / 2 - 1;
+ UINT8 *dst = rgn + len - 1;
while(dst > src)
{
UINT8 data = *src--;
/* swap even and odd pixels */
- *dst-- = data >> 4; *dst-- = data & 0xF;
+ *dst-- = data >> 4; *dst-- = data & 0xF;
}
}
@@ -2598,10 +2598,10 @@ static void unpack_sprites(running_machine &machine)
/* 4 bits -> 8 bits. Even and odd pixels and even and odd words, are swapped */
static void ddonpach_unpack_sprites(running_machine &machine)
{
- const UINT32 len = machine.root_device().memregion("sprites")->bytes();
- UINT8 *rgn = machine.root_device().memregion ("sprites")->base();
- UINT8 *src = rgn + len / 2 - 1;
- UINT8 *dst = rgn + len - 1;
+ const UINT32 len = machine.root_device().memregion("sprites")->bytes();
+ UINT8 *rgn = machine.root_device().memregion ("sprites")->base();
+ UINT8 *src = rgn + len / 2 - 1;
+ UINT8 *dst = rgn + len - 1;
while(dst > src)
{
@@ -2611,10 +2611,10 @@ static void ddonpach_unpack_sprites(running_machine &machine)
UINT8 data4 = *src--;
/* swap even and odd pixels, and even and odd words */
- *dst-- = data2 & 0xF; *dst-- = data2 >> 4;
- *dst-- = data1 & 0xF; *dst-- = data1 >> 4;
- *dst-- = data4 & 0xF; *dst-- = data4 >> 4;
- *dst-- = data3 & 0xF; *dst-- = data3 >> 4;
+ *dst-- = data2 & 0xF; *dst-- = data2 >> 4;
+ *dst-- = data1 & 0xF; *dst-- = data1 >> 4;
+ *dst-- = data4 & 0xF; *dst-- = data4 >> 4;
+ *dst-- = data3 & 0xF; *dst-- = data3 >> 4;
}
}
@@ -2622,8 +2622,8 @@ static void ddonpach_unpack_sprites(running_machine &machine)
/* 2 pages of 4 bits -> 8 bits */
static void esprade_unpack_sprites(running_machine &machine)
{
- UINT8 *src = machine.root_device().memregion("sprites")->base();
- UINT8 *dst = src + machine.root_device().memregion("sprites")->bytes();
+ UINT8 *src = machine.root_device().memregion("sprites")->base();
+ UINT8 *dst = src + machine.root_device().memregion("sprites")->bytes();
while(src < dst)
{
@@ -2697,10 +2697,10 @@ BP962A.U77 23C16000 GFX
ROM_LOAD( "bp962a.u53", 0x000000, 0x100000, CRC(fcd9a107) SHA1(169b94db8389e7d47d4d77f36907a62c30fea727) ) \
ROM_CONTINUE( 0x000000, 0x100000 ) \
\
- ROM_REGION( 0x200000, "layer1", 0 ) \
+ ROM_REGION( 0x200000, "layer1", 0 ) \
ROM_LOAD( "bp962a.u54", 0x000000, 0x200000, CRC(0cfa3409) SHA1(17107e26762ef7e3b902fb29a6d7bc534a4d09aa) ) \
\
- ROM_REGION( (1*0x200000)*2, "layer2", 0 ) \
+ ROM_REGION( (1*0x200000)*2, "layer2", 0 ) \
\
ROM_LOAD( "bp962a.u57", 0x000000, 0x200000, CRC(6d608957) SHA1(15f6e8346f5f95eb229505b1b4666dabeb810ee8) ) \
\
@@ -2710,7 +2710,7 @@ BP962A.U77 23C16000 GFX
ROM_REGION( 0x200000, "oki1", 0 ) \
ROM_LOAD( "bp962a.u48", 0x000000, 0x200000, CRC(ae00a1ce) SHA1(5e8c74df0ac77efb3080406870856f958be14f79) ) \
\
- ROM_REGION( 0x200000, "oki2", 0 ) \
+ ROM_REGION( 0x200000, "oki2", 0 ) \
ROM_LOAD( "bp962a.u47", 0x000000, 0x200000, CRC(6d4e9737) SHA1(81c7ecdfc2d38d0b35e26745866f6672f566f936) ) \
/* the regions differ only in the EEPROM, hence the macro above - all EEPROMs are Factory Defaulted */
@@ -2766,21 +2766,21 @@ OSC: 28.0, 16.0, 16.9 MHz
***************************************************************************/
ROM_START( dfeveron )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "cv01-u34.bin", 0x000000, 0x080000, CRC(be87f19d) SHA1(595239245df3835cdf5a99a6c62480465558d8d3) )
ROM_LOAD16_BYTE( "cv01-u33.bin", 0x000001, 0x080000, CRC(e53a7db3) SHA1(ddced29f78dc3cc89038757b6577ba2ba0d8b041) )
- ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "cv01-u25.bin", 0x000000, 0x400000, CRC(a6f6a95d) SHA1(e1eb45cb5d0e6163edfd9d830633b913fb53c6ca) )
ROM_LOAD( "cv01-u26.bin", 0x400000, 0x400000, CRC(32edb62a) SHA1(3def74e1316b80cc25a8c3ac162cd7bcb8cc807c) )
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "cv01-u50.bin", 0x000000, 0x200000, CRC(7a344417) SHA1(828bd8f95d2fcc34407e17629ccafc904a4ea12d) )
- ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "cv01-u49.bin", 0x000000, 0x200000, CRC(d21cdda7) SHA1(cace4650de580c3c4a037f1f5c32bfc1846b383c) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "cv01-u19.bin", 0x000000, 0x400000, CRC(5f5514da) SHA1(53f27364aee544572a82649c9ff29bacc642b732) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
@@ -2872,21 +2872,21 @@ present in the japanese images...
*/
ROM_START( feversos )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "cv01-u34.sos", 0x000000, 0x080000, CRC(24ef3ce6) SHA1(42799eebbb2686a837b8972aec684143deadca59) )
ROM_LOAD16_BYTE( "cv01-u33.sos", 0x000001, 0x080000, CRC(64ff73fd) SHA1(7fc3a8469cec2361d373a4dac4a547c13ca5f709) )
- ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "cv01-u25.bin", 0x000000, 0x400000, CRC(a6f6a95d) SHA1(e1eb45cb5d0e6163edfd9d830633b913fb53c6ca) )
ROM_LOAD( "cv01-u26.bin", 0x400000, 0x400000, CRC(32edb62a) SHA1(3def74e1316b80cc25a8c3ac162cd7bcb8cc807c) )
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "cv01-u50.bin", 0x000000, 0x200000, CRC(7a344417) SHA1(828bd8f95d2fcc34407e17629ccafc904a4ea12d) )
- ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "cv01-u49.bin", 0x000000, 0x200000, CRC(d21cdda7) SHA1(cace4650de580c3c4a037f1f5c32bfc1846b383c) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "cv01-u19.bin", 0x000000, 0x400000, CRC(5f5514da) SHA1(53f27364aee544572a82649c9ff29bacc642b732) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
@@ -2907,26 +2907,26 @@ OSC: 28.0000MHz
***************************************************************************/
ROM_START( ddonpach )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "b1.u27", 0x000000, 0x080000, CRC(b5cdc8d3) SHA1(58757b50e21a27e500a82c03f62cf02a85389926) )
ROM_LOAD16_BYTE( "b2.u26", 0x000001, 0x080000, CRC(6bbb063a) SHA1(e5de64b9c3efc0a38a2e0e16b78ee393bff63558) )
- ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "u50.bin", 0x000000, 0x200000, CRC(14b260ec) SHA1(33bda210302428d5500115d0c7a839cdfcb67d17) )
ROM_LOAD( "u51.bin", 0x200000, 0x200000, CRC(e7ba8cce) SHA1(ad74a6b7d53760b19587c4a6dbea937daa7e87ce) )
ROM_LOAD( "u52.bin", 0x400000, 0x200000, CRC(02492ee0) SHA1(64d9cc64a4ad189a8b03cf6a749ddb732b4a0014) )
ROM_LOAD( "u53.bin", 0x600000, 0x200000, CRC(cb4c10f0) SHA1(a622e8bd0c938b5d38b392b247400b744d8be288) )
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "u60.bin", 0x000000, 0x200000, CRC(903096a7) SHA1(a243e903fef7c4a7b71383263e82e42acd869261) )
- ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "u61.bin", 0x000000, 0x200000, CRC(d89b7631) SHA1(a66bb4955ca58fab8973ca37a0f971e9a67ce017) )
- ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "u62.bin", 0x000000, 0x200000, CRC(292bfb6b) SHA1(11b385991ee990eb5ef36e136b988802b5f90fa4) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u6.bin", 0x000000, 0x200000, CRC(9dfdafaf) SHA1(f5cb450cdc78a20c3a74c6dac05c9ac3cba08327) )
ROM_LOAD( "u7.bin", 0x200000, 0x200000, CRC(795b17d5) SHA1(cbfc29f1df9600c82e0fdae00edd00da5b73e14c) )
@@ -2936,26 +2936,26 @@ ROM_END
ROM_START( ddonpachj )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "u27.bin", 0x000000, 0x080000, CRC(2432ff9b) SHA1(fbc826c30553f6553ead40b312b73c049e8f4bf6) )
ROM_LOAD16_BYTE( "u26.bin", 0x000001, 0x080000, CRC(4f3a914a) SHA1(ae98eba049f1462aa1145f6959b9f9a32c97278f) )
- ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "u50.bin", 0x000000, 0x200000, CRC(14b260ec) SHA1(33bda210302428d5500115d0c7a839cdfcb67d17) )
ROM_LOAD( "u51.bin", 0x200000, 0x200000, CRC(e7ba8cce) SHA1(ad74a6b7d53760b19587c4a6dbea937daa7e87ce) )
ROM_LOAD( "u52.bin", 0x400000, 0x200000, CRC(02492ee0) SHA1(64d9cc64a4ad189a8b03cf6a749ddb732b4a0014) )
ROM_LOAD( "u53.bin", 0x600000, 0x200000, CRC(cb4c10f0) SHA1(a622e8bd0c938b5d38b392b247400b744d8be288) )
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "u60.bin", 0x000000, 0x200000, CRC(903096a7) SHA1(a243e903fef7c4a7b71383263e82e42acd869261) )
- ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "u61.bin", 0x000000, 0x200000, CRC(d89b7631) SHA1(a66bb4955ca58fab8973ca37a0f971e9a67ce017) )
- ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "u62.bin", 0x000000, 0x200000, CRC(292bfb6b) SHA1(11b385991ee990eb5ef36e136b988802b5f90fa4) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u6.bin", 0x000000, 0x200000, CRC(9dfdafaf) SHA1(f5cb450cdc78a20c3a74c6dac05c9ac3cba08327) )
ROM_LOAD( "u7.bin", 0x200000, 0x200000, CRC(795b17d5) SHA1(cbfc29f1df9600c82e0fdae00edd00da5b73e14c) )
@@ -3004,27 +3004,27 @@ CUSTOM: ATLUS 8647-01 013
***************************************************************************/
ROM_START( donpachi )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "prgu.u29", 0x00000, 0x80000, CRC(89c36802) SHA1(7857c726cecca5a4fce282e0d2b873774d2c1b1d) )
- ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a1c0c4026e78eecc122d5d) )
- ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
+ ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
ROM_LOAD( "text.u58", 0x000000, 0x040000, CRC(5dba06e7) SHA1(f9dab7f6c732a683fddb4cae090a875b3962332b) )
- ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u33", 0x040000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
- ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u32", 0x040000, 0x100000, CRC(0d89fcca) SHA1(e16ed15fa5e72537822f7b37e83ccfed0fa87338) )
ROM_LOAD( "atdp.u33", 0x140000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
@@ -3037,27 +3037,27 @@ ROM_START( donpachi )
ROM_END
ROM_START( donpachij )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "prg.u29", 0x00000, 0x80000, CRC(6be14af6) SHA1(5b1158071f160efeded816ae4c4edca1d00d6e05) )
- ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a1c0c4026e78eecc122d5d) )
- ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
+ ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
ROM_LOAD( "u58.bin", 0x000000, 0x040000, CRC(285379ff) SHA1(b9552edcec29ddf4b552800b145c398b94117ab0) )
- ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u33", 0x040000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
- ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u32", 0x040000, 0x100000, CRC(0d89fcca) SHA1(e16ed15fa5e72537822f7b37e83ccfed0fa87338) )
ROM_LOAD( "atdp.u33", 0x140000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
@@ -3070,27 +3070,27 @@ ROM_START( donpachij )
ROM_END
ROM_START( donpachikr )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "prgk.u26", 0x00000, 0x80000, CRC(bbaf4c8b) SHA1(0f9d42c8c4c5b69e3d39bf768bc4b663f66b4f36) )
- ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a1c0c4026e78eecc122d5d) )
- ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
+ ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
ROM_LOAD( "u58.bin", 0x000000, 0x040000, CRC(285379ff) SHA1(b9552edcec29ddf4b552800b145c398b94117ab0) )
- ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u33", 0x040000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
- ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u32", 0x040000, 0x100000, CRC(0d89fcca) SHA1(e16ed15fa5e72537822f7b37e83ccfed0fa87338) )
ROM_LOAD( "atdp.u33", 0x140000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
@@ -3103,27 +3103,27 @@ ROM_START( donpachikr )
ROM_END
ROM_START( donpachihk )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "37.u29", 0x00000, 0x80000, CRC(71f39f30) SHA1(08a028208f21c073d450a29061604f27775786a8) )
- ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "atdp.u44", 0x000000, 0x200000, CRC(7189e953) SHA1(53adbe6ea5e01ecb48575e9db82cc3d0dc8a3726) )
ROM_LOAD( "atdp.u45", 0x200000, 0x200000, CRC(6984173f) SHA1(625dd6674adeb206815855b8b6a1fba79ed5c4cd) )
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "atdp.u54", 0x000000, 0x100000, CRC(6bda6b66) SHA1(6472e6706505bac17484fb8bf4e8922ced4adf63) )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "atdp.u57", 0x000000, 0x100000, CRC(0a0e72b9) SHA1(997e8253777e7acca5a1c0c4026e78eecc122d5d) )
- ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
+ ROM_REGION( 0x040000, "layer2", 0 ) /* Text / Character Layer */
ROM_LOAD( "u58.bin", 0x000000, 0x040000, CRC(285379ff) SHA1(b9552edcec29ddf4b552800b145c398b94117ab0) )
- ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x240000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u33", 0x040000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
- ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x340000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "atdp.u32", 0x040000, 0x100000, CRC(0d89fcca) SHA1(e16ed15fa5e72537822f7b37e83ccfed0fa87338) )
ROM_LOAD( "atdp.u33", 0x140000, 0x200000, CRC(d749de00) SHA1(64a0acc23eb2515e7d0459f0289919e083c63afc) )
@@ -3146,28 +3146,28 @@ OSC: 28.0, 16.0, 16.9 MHz
***************************************************************************/
ROM_START( esprade )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "u42.int", 0x000000, 0x080000, CRC(3b510a73) SHA1(ab1666eb826cb4a71588d86831dd18a2ef1c2a33) )
ROM_LOAD16_BYTE( "u41.int", 0x000001, 0x080000, CRC(97c1b649) SHA1(37a56b7b9662219a356aee3f4b5cbb774ac4950e) )
- ROM_REGION( 0x1000000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x1000000, "sprites", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "esp_u63.u63", 0x000000, 0x400000, CRC(2f2fe92c) SHA1(9519e365248bcec8419786eabb16fe4aae299af5) )
ROM_LOAD16_BYTE( "esp_u64.u64", 0x000001, 0x400000, CRC(491a3da4) SHA1(53549a2bd3edc7b5e73fb46e1421b156bb0c190f) )
ROM_LOAD16_BYTE( "esp_u65.u65", 0x800000, 0x400000, CRC(06563efe) SHA1(94e72da1f542b4e0525b4b43994242816b43dbdc) )
ROM_LOAD16_BYTE( "esp_u66.u66", 0x800001, 0x400000, CRC(7bbe4cfc) SHA1(e77d0ed7a11b5abca1df8a0eb20ac9360cf79e76) )
- ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "esp_u54.u54", 0x000000, 0x400000, CRC(e7ca6936) SHA1(b7f5ab67071a1d9dd3d2c1cd2304d9cdad68850c) )
ROM_LOAD( "esp_u55.u55", 0x400000, 0x400000, CRC(f53bd94f) SHA1(d0a74fb3d36fe522ef075e5ae44a9980da8abe2f) )
- ROM_REGION( 0x800000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x800000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "esp_u52.u52", 0x000000, 0x400000, CRC(e7abe7b4) SHA1(e98da45497e1aaf0d6ab352ec3e43c7438ed792a) )
ROM_LOAD( "esp_u53.u53", 0x400000, 0x400000, CRC(51a0f391) SHA1(8b7355cbad119f4e1add14e5cd5e343ec6706104) )
- ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "esp_u51.u51", 0x000000, 0x400000, CRC(0b9b875c) SHA1(ef05447cd8565ae24bb71db42342724622ad1e3e) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "esp_u19.u19", 0x000000, 0x400000, CRC(f54b1cab) SHA1(34d70bb5798de85d892c062001d9ac1d6604fd9f) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
@@ -3175,28 +3175,28 @@ ROM_START( esprade )
ROM_END
ROM_START( espradej )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "u42_ver.2", 0x000000, 0x080000, CRC(75d03c42) SHA1(1c176185b6f1531752b633a97f705ffa0cfeb5ad) )
ROM_LOAD16_BYTE( "u41_ver.2", 0x000001, 0x080000, CRC(734b3ef0) SHA1(f584227b85c347d62d5f179445011ce0f607bcfd) )
- ROM_REGION( 0x1000000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x1000000, "sprites", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "esp_u63.u63", 0x000000, 0x400000, CRC(2f2fe92c) SHA1(9519e365248bcec8419786eabb16fe4aae299af5) )
ROM_LOAD16_BYTE( "esp_u64.u64", 0x000001, 0x400000, CRC(491a3da4) SHA1(53549a2bd3edc7b5e73fb46e1421b156bb0c190f) )
ROM_LOAD16_BYTE( "esp_u65.u65", 0x800000, 0x400000, CRC(06563efe) SHA1(94e72da1f542b4e0525b4b43994242816b43dbdc) )
ROM_LOAD16_BYTE( "esp_u66.u66", 0x800001, 0x400000, CRC(7bbe4cfc) SHA1(e77d0ed7a11b5abca1df8a0eb20ac9360cf79e76) )
- ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "esp_u54.u54", 0x000000, 0x400000, CRC(e7ca6936) SHA1(b7f5ab67071a1d9dd3d2c1cd2304d9cdad68850c) )
ROM_LOAD( "esp_u55.u55", 0x400000, 0x400000, CRC(f53bd94f) SHA1(d0a74fb3d36fe522ef075e5ae44a9980da8abe2f) )
- ROM_REGION( 0x800000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x800000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "esp_u52.u52", 0x000000, 0x400000, CRC(e7abe7b4) SHA1(e98da45497e1aaf0d6ab352ec3e43c7438ed792a) )
ROM_LOAD( "esp_u53.u53", 0x400000, 0x400000, CRC(51a0f391) SHA1(8b7355cbad119f4e1add14e5cd5e343ec6706104) )
- ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "esp_u51.u51", 0x000000, 0x400000, CRC(0b9b875c) SHA1(ef05447cd8565ae24bb71db42342724622ad1e3e) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "esp_u19.u19", 0x000000, 0x400000, CRC(f54b1cab) SHA1(34d70bb5798de85d892c062001d9ac1d6604fd9f) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
@@ -3204,28 +3204,28 @@ ROM_START( espradej )
ROM_END
ROM_START( espradejo )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "u42.bin", 0x000000, 0x080000, CRC(0718c7e5) SHA1(c7d1f30bd2ef363cad15b6918f9980312a15809a) )
ROM_LOAD16_BYTE( "u41.bin", 0x000001, 0x080000, CRC(def30539) SHA1(957ad0b06f06689ae71393572592f6b8f818603a) )
- ROM_REGION( 0x1000000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x1000000, "sprites", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "esp_u63.u63", 0x000000, 0x400000, CRC(2f2fe92c) SHA1(9519e365248bcec8419786eabb16fe4aae299af5) )
ROM_LOAD16_BYTE( "esp_u64.u64", 0x000001, 0x400000, CRC(491a3da4) SHA1(53549a2bd3edc7b5e73fb46e1421b156bb0c190f) )
ROM_LOAD16_BYTE( "esp_u65.u65", 0x800000, 0x400000, CRC(06563efe) SHA1(94e72da1f542b4e0525b4b43994242816b43dbdc) )
ROM_LOAD16_BYTE( "esp_u66.u66", 0x800001, 0x400000, CRC(7bbe4cfc) SHA1(e77d0ed7a11b5abca1df8a0eb20ac9360cf79e76) )
- ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "esp_u54.u54", 0x000000, 0x400000, CRC(e7ca6936) SHA1(b7f5ab67071a1d9dd3d2c1cd2304d9cdad68850c) )
ROM_LOAD( "esp_u55.u55", 0x400000, 0x400000, CRC(f53bd94f) SHA1(d0a74fb3d36fe522ef075e5ae44a9980da8abe2f) )
- ROM_REGION( 0x800000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x800000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "esp_u52.u52", 0x000000, 0x400000, CRC(e7abe7b4) SHA1(e98da45497e1aaf0d6ab352ec3e43c7438ed792a) )
ROM_LOAD( "esp_u53.u53", 0x400000, 0x400000, CRC(51a0f391) SHA1(8b7355cbad119f4e1add14e5cd5e343ec6706104) )
- ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "esp_u51.u51", 0x000000, 0x400000, CRC(0b9b875c) SHA1(ef05447cd8565ae24bb71db42342724622ad1e3e) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "esp_u19.u19", 0x000000, 0x400000, CRC(f54b1cab) SHA1(34d70bb5798de85d892c062001d9ac1d6604fd9f) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
@@ -3274,7 +3274,7 @@ Notes:
***************************************************************************/
ROM_START( gaia )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "prg1.127", 0x000000, 0x080000, CRC(47b904b2) SHA1(58b9b55f59cf00f70b690a0371096e86f4d723c2) )
ROM_LOAD16_BYTE( "prg2.128", 0x000001, 0x080000, CRC(469b7794) SHA1(502f855c51005a866900b19c3a0a170d9ea02392) )
@@ -3282,16 +3282,16 @@ ROM_START( gaia )
ROM_LOAD( "obj1.736", 0x000000, 0x400000, CRC(f4f84e5d) SHA1(8f445dd7a5c8a996939c211e5aec5742121a6e7e) )
ROM_LOAD( "obj2.738", 0x400000, 0x400000, CRC(15c2a9ce) SHA1(631eb2968395be86ef2403733e7d4ec769a013b9) )
- ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "bg1.989", 0x000000, 0x400000, CRC(013a693d) SHA1(2cc5be6f47c13febed942e1c3167946efedc5f9b) )
- ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "bg2.995", 0x000000, 0x400000, CRC(783cc62f) SHA1(8b6e4212688b53be5ecc29ff2d41fd43e7d0a420) )
- ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "bg3.998", 0x000000, 0x400000, CRC(bcd61d1c) SHA1(660a3b02a8c39e1117b00d0ad06f73221fef4ce8) )
- ROM_REGION( 0xc00000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0xc00000, "ymz", 0 ) /* Samples */
ROM_LOAD( "snd1.447", 0x000000, 0x400000, CRC(92770a52) SHA1(81f6835e1b45eb0f367e4586fdda92466f02edb9) )
ROM_LOAD( "snd2.454", 0x400000, 0x400000, CRC(329ae1cf) SHA1(0c5e5074a5d8f4fb85ab4893bc953f192dcb301a) )
ROM_LOAD( "snd3.455", 0x800000, 0x400000, CRC(4048d64e) SHA1(5e4ec6d37e70484e2fcd04188385e79ef0b53026) )
@@ -3336,7 +3336,7 @@ Notes:
*/
ROM_START( theroes )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "t-hero-epm1.u0127", 0x000000, 0x080000, CRC(09db7195) SHA1(6aa5aa80e3b74e405ed8f1b9b801ce4367756986) )
ROM_LOAD16_BYTE( "t-hero-epm0.u0129", 0x000001, 0x080000, CRC(2d4e3310) SHA1(7c3284a2adc7943db50933a209d037422f87f80b) )
@@ -3344,16 +3344,16 @@ ROM_START( theroes )
ROM_LOAD( "t-hero-obj1.u0736", 0x000000, 0x400000, CRC(35090f7c) SHA1(035e6c12a87d9c7241eea34fc7e2170bec842acc) )
ROM_LOAD( "t-hero-obj2.u0738", 0x400000, 0x400000, CRC(71605108) SHA1(6070c26d8f22fafc81d97cacfef96ae652e355d0) )
- ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "t-hero-bg1.u0999", 0x000000, 0x400000, CRC(47b0fb40) SHA1(a7217b3d805b4255c589821cdadd9b190cada525) )
- ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "t-hero-bg2.u0995", 0x000000, 0x400000, CRC(b16237a1) SHA1(66aed2c5036492a17d20de90333e172a6f117851) )
- ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "t-hero-bg3.u0998", 0x000000, 0x400000, CRC(08eb5604) SHA1(3d32966708c73198272c40e6ddc680bf4c7919eb) )
- ROM_REGION( 0xc00000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0xc00000, "ymz", 0 ) /* Samples */
ROM_LOAD( "crvsaders-snd1.u0447", 0x000000, 0x400000, CRC(92770a52) SHA1(81f6835e1b45eb0f367e4586fdda92466f02edb9) )
ROM_LOAD( "crvsaders-snd2.u0454", 0x400000, 0x400000, CRC(329ae1cf) SHA1(0c5e5074a5d8f4fb85ab4893bc953f192dcb301a) )
ROM_LOAD( "t-hero-snd3.u0455", 0x800000, 0x400000, CRC(52b0b2c0) SHA1(6e96698905391c21a4fedd60e2768734b58add4e) )
@@ -3374,11 +3374,11 @@ OSC: 28.0000MHz
***************************************************************************/
ROM_START( guwange )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "gu-u0127.bin", 0x000000, 0x080000, CRC(f86b5293) SHA1(f8b1cd77cc25328d5010889850e4b86c27d9e396) )
ROM_LOAD16_BYTE( "gu-u0129.bin", 0x000001, 0x080000, CRC(6c0e3b93) SHA1(aaad6569b9a7b6f9a315062f9fedfc95851c1bc6) )
- ROM_REGION( 0x2000000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x2000000, "sprites", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "u083.bin", 0x0000000, 0x800000, CRC(adc4b9c4) SHA1(3f9fb004e19187bbfa87ddfe8cfc69740656a1bd) )
ROM_LOAD16_BYTE( "u082.bin", 0x0000001, 0x800000, CRC(3d75876c) SHA1(705b8c2dbdc31e9516f429969f87988beec796d7) )
ROM_LOAD16_BYTE( "u086.bin", 0x1000000, 0x400000, CRC(188e4f81) SHA1(626074d81782a6de0b52406331b4b8561d3e36f5) )
@@ -3388,16 +3388,16 @@ ROM_START( guwange )
// sprite bug fix?
// ROM_FILL( 0x1800000, 0x800000, 0xff )
- ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "u101.bin", 0x000000, 0x800000, CRC(0369491f) SHA1(ca6b1345506f13a17c9bace01637d1f61a278644) )
- ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "u10102.bin", 0x000000, 0x400000, CRC(e28d6855) SHA1(7001a6e298c6a1fcceb79586bf5f4bf0f30027f6) )
- ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "u10103.bin", 0x000000, 0x400000, CRC(0fe91b8e) SHA1(8b71ebeef5e4d2b00fdaaab97776d74e1c96dc59) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u0462.bin", 0x000000, 0x400000, CRC(b3d75691) SHA1(71d8dae92be1542a3cff50efeec0bf3c14ab59f5) )
ROM_REGION( 0x0004, "plds", 0 )
@@ -3411,11 +3411,11 @@ ROM_START( guwange )
ROM_END
ROM_START( guwanges )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "gu-u0127b.bin", 0x000000, 0x080000, CRC(64667d2e) SHA1(a5893eb38e309e2bced4a46559f02850ab39afe7) )
ROM_LOAD16_BYTE( "gu-u0129b.bin", 0x000001, 0x080000, CRC(a99C6b6c) SHA1(614a3cd1de9b325f73e461eaf250ff9cf773f4a5) )
- ROM_REGION( 0x2000000, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x2000000, "sprites", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "u083.bin", 0x0000000, 0x800000, CRC(adc4b9c4) SHA1(3f9fb004e19187bbfa87ddfe8cfc69740656a1bd) )
ROM_LOAD16_BYTE( "u082.bin", 0x0000001, 0x800000, CRC(3d75876c) SHA1(705b8c2dbdc31e9516f429969f87988beec796d7) )
ROM_LOAD16_BYTE( "u086.bin", 0x1000000, 0x400000, CRC(188e4f81) SHA1(626074d81782a6de0b52406331b4b8561d3e36f5) )
@@ -3425,16 +3425,16 @@ ROM_START( guwanges )
// sprite bug fix?
// ROM_FILL( 0x1800000, 0x800000, 0xff )
- ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x800000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "u101.bin", 0x000000, 0x800000, CRC(0369491f) SHA1(ca6b1345506f13a17c9bace01637d1f61a278644) )
- ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x400000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "u10102.bin", 0x000000, 0x400000, CRC(e28d6855) SHA1(7001a6e298c6a1fcceb79586bf5f4bf0f30027f6) )
- ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x400000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "u10103.bin", 0x000000, 0x400000, CRC(0fe91b8e) SHA1(8b71ebeef5e4d2b00fdaaab97776d74e1c96dc59) )
- ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x400000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u0462.bin", 0x000000, 0x400000, CRC(b3d75691) SHA1(71d8dae92be1542a3cff50efeec0bf3c14ab59f5) )
ROM_REGION( 0x0004, "plds", 0 )
@@ -3497,29 +3497,29 @@ small daughter card that splits MP8 & MP9 into two roms each:
***************************************************************************/
ROM_START( hotdogst )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "mp3.u29", 0x00000, 0x80000, CRC(1f4e5479) SHA1(5c3d7b36b1eda4c87c53e4f7cf89951cc5bcc871) )
ROM_LOAD16_BYTE( "mp4.u28", 0x00001, 0x80000, CRC(6f1c3c4b) SHA1(ab4e4d9b2ef74a2eefda718e120bef05fd0346ff) )
- ROM_REGION( 0x48000, "audiocpu", 0 ) /* Z80 code */
- ROM_LOAD( "mp2.u19", 0x00000, 0x08000, CRC(ff979ebe) SHA1(4cb80086cfdc69a321c7f75455cef89e20488b76) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x48000, "audiocpu", 0 ) /* Z80 code */
+ ROM_LOAD( "mp2.u19", 0x00000, 0x08000, CRC(ff979ebe) SHA1(4cb80086cfdc69a321c7f75455cef89e20488b76) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x10000, 0x38000 )
- ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "mp9.u55", 0x000000, 0x200000, CRC(258d49ec) SHA1(f39e30c82d8f680f248e1eb59d7c5acb479fa277) )
ROM_LOAD( "mp8.u54", 0x200000, 0x200000, CRC(bdb4d7b8) SHA1(0dd490988aa84b0e9a21ade5fd606b03eca13f6c) )
- ROM_REGION( 0x80000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x80000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "mp7.u56", 0x00000, 0x80000, CRC(87c21c50) SHA1(fc0eea79abdd96edb4fa2c7047aaa728ef838234) )
- ROM_REGION( 0x80000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x80000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "mp6.u61", 0x00000, 0x80000, CRC(4dafb288) SHA1(4756259adfe49ba42cde25e7902655b0f0731a6c) )
- ROM_REGION( 0x80000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x80000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "mp5.u64", 0x00000, 0x80000, CRC(9b26458c) SHA1(acef62422fa3f92e6ca1eba0ee6fb914cd1ee190) )
- ROM_REGION( 0x80000, "oki", 0 ) /* Samples */
- ROM_LOAD( "mp1.u65", 0x00000, 0x80000, CRC(4868be1b) SHA1(32b8234b19fdbe07fa5057fa7965e36807e35e77) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF, 4 x 0x20000
+ ROM_REGION( 0x80000, "oki", 0 ) /* Samples */
+ ROM_LOAD( "mp1.u65", 0x00000, 0x80000, CRC(4868be1b) SHA1(32b8234b19fdbe07fa5057fa7965e36807e35e77) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF, 4 x 0x20000
ROM_REGION16_BE( 0x80, "eeprom", 0 )
ROM_LOAD16_WORD( "eeprom-hotdogst.bin", 0x0000, 0x0080, CRC(12b4f934) SHA1(5b28d8fbd78869db78ce49e541a9d65558841966) )
@@ -3573,32 +3573,32 @@ MP-001
***************************************************************************/
ROM_START( korokoro )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_WORD_SWAP( "mp-001_ver07.u0130", 0x000000, 0x080000, CRC(86c7241f) SHA1(c9f0ab63c4fe36df1300445e9bb0d5c6a1bb733f) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF
- ROM_REGION( 0x180000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x180000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "mp-001_ver01.u1066", 0x000000, 0x100000, CRC(c5c6af7e) SHA1(13ac26fd703672a01d629be4e5efe9fb8720a4fb) )
- ROM_LOAD( "mp-001_ver01.u1051", 0x100000, 0x080000, CRC(fe5e28e8) SHA1(44da1a7d813b149f9bae351bbcbd0bc2d4c70e10) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF
+ ROM_LOAD( "mp-001_ver01.u1051", 0x100000, 0x080000, CRC(fe5e28e8) SHA1(44da1a7d813b149f9bae351bbcbd0bc2d4c70e10) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "mp-001_ver01.u1060", 0x000000, 0x100000, CRC(ec9cf9d8) SHA1(32fa7120e30c14e484de3b3a9c93efe3654d43c8) )
- ROM_REGION( 0x100000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x100000, "ymz", 0 ) /* Samples */
ROM_LOAD( "mp-001_ver01.u1186", 0x000000, 0x100000, CRC(d16e7c5d) SHA1(1f825ace3ed2e23c8d3212320c4645d3d52214c7) )
ROM_END
ROM_START( crusherm )
- ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x80000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_WORD_SWAP( "mp-003ver01.u0130", 0x000000, 0x080000, CRC(a4f56e6b) SHA1(1d3af7602c48a6b6c76c376dbc8ad3823b56868a) )
- ROM_REGION( 0x200000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x200000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "mp-003ver01.u1067", 0x000000, 0x100000, CRC(268a4921) SHA1(8bb818466616051af01680b381af53b8b6a18428) )
ROM_LOAD( "mp-003ver01.u1066", 0x100000, 0x100000, CRC(79e77a6e) SHA1(9d03dd083769851d628ba6b3d77cfde9603e74f4) )
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "mp-003ver01.u1060", 0x000000, 0x100000, CRC(7661893e) SHA1(d51645c96247b039214393ba5eae7357144dfd65) )
- ROM_REGION( 0x200000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x200000, "ymz", 0 ) /* Samples */
ROM_LOAD( "mp-003ver01.u1186", 0x000000, 0x100000, CRC(c3aeb745) SHA1(1bb8ab0512a9a9b0d3ce15f90b49cda431fb14eb) )
ROM_LOAD( "mp-003ver01.u1187", 0x100000, 0x100000, CRC(d9312497) SHA1(a349cfdbcad96701a74f06394e87f0e0614e115d) )
ROM_END
@@ -3716,76 +3716,76 @@ BP947A.U29 27C240 /
***************************************************************************/
ROM_START( metmqstr )
- ROM_REGION( 0x280000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x280000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "bp947a.u25", 0x000000, 0x80000, CRC(0a5c3442) SHA1(684b79912dedc103f45c42fdebf9983e091b1308) )
ROM_LOAD16_WORD_SWAP( "bp947a.u28", 0x100000, 0x80000, CRC(8c55decf) SHA1(76c6ce4c8e621273258d31ceb9ec4442fcf1a393) )
ROM_LOAD16_WORD_SWAP( "bp947a.u29", 0x200000, 0x80000, CRC(cf0f3f3b) SHA1(49a3c0e7536edd53bbf09353e43e9166d736b3f4) )
- ROM_REGION( 0x48000, "audiocpu", 0 ) /* Z80 code */
+ ROM_REGION( 0x48000, "audiocpu", 0 ) /* Z80 code */
ROM_LOAD( "bp947a.u20", 0x00000, 0x08000, CRC(a4a36170) SHA1(ae55094518bd968ea0d04613a133c1421e412012) )
ROM_CONTINUE( 0x10000, 0x38000 )
- ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "bp947a.u49", 0x000000, 0x200000, CRC(09749531) SHA1(6deeed2712241611ec3202c49a66beed28698af8) )
ROM_LOAD( "bp947a.u50", 0x200000, 0x200000, CRC(19cea8b2) SHA1(87fb29458074f0e4852237e0184b8b3b44b0eb29) )
ROM_LOAD( "bp947a.u51", 0x400000, 0x200000, CRC(c19bed67) SHA1(ac664a15512c0e8c8b701833aede95f53cd46a45) )
ROM_LOAD( "bp947a.u52", 0x600000, 0x200000, CRC(70c64875) SHA1(1c20ab100ccfdf42c97a25e4deb9041b83f5ca8d) )
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
- ROM_LOAD( "bp947a.u48", 0x000000, 0x100000, CRC(04ff6a3d) SHA1(7187db436f7a2ab59a3f5c6ab297b3d740e20f1d) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_LOAD( "bp947a.u48", 0x000000, 0x100000, CRC(04ff6a3d) SHA1(7187db436f7a2ab59a3f5c6ab297b3d740e20f1d) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
- ROM_LOAD( "bp947a.u47", 0x000000, 0x100000, CRC(0de42827) SHA1(05d452ca11a31f941cb8a9b0cbb0b59c6b0cbdcb) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_LOAD( "bp947a.u47", 0x000000, 0x100000, CRC(0de42827) SHA1(05d452ca11a31f941cb8a9b0cbb0b59c6b0cbdcb) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
- ROM_LOAD( "bp947a.u46", 0x000000, 0x100000, CRC(0f9c906e) SHA1(03872e8be28637df66373bddb04ed91de4f9db75) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
+ ROM_LOAD( "bp947a.u46", 0x000000, 0x100000, CRC(0f9c906e) SHA1(03872e8be28637df66373bddb04ed91de4f9db75) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "oki1", 0 ) /* OKIM6295 #1 Samples */
- ROM_LOAD( "bp947a.u42", 0x000000, 0x100000, CRC(2ce8ff2a) SHA1(8ef8c5b7d4a0e60c980c2962e75f7977faafa311) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_LOAD( "bp947a.u42", 0x000000, 0x100000, CRC(2ce8ff2a) SHA1(8ef8c5b7d4a0e60c980c2962e75f7977faafa311) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "oki2", 0 ) /* OKIM6295 #2 Samples */
- ROM_LOAD( "bp947a.u37", 0x000000, 0x100000, CRC(c3077c8f) SHA1(0a76316a81b7de78279b859549eb5161a721ac71) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_LOAD( "bp947a.u37", 0x000000, 0x100000, CRC(c3077c8f) SHA1(0a76316a81b7de78279b859549eb5161a721ac71) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
ROM_END
ROM_START( nmaster )
- ROM_REGION( 0x280000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x280000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "bp947a_n.u25",0x000000, 0x80000, CRC(748cc514) SHA1(11d882e77a539407c314f087386e50d691a6bc0b) )
ROM_LOAD16_WORD_SWAP( "bp947a.u28" , 0x100000, 0x80000, CRC(8c55decf) SHA1(76c6ce4c8e621273258d31ceb9ec4442fcf1a393) )
ROM_LOAD16_WORD_SWAP( "bp947a.u29", 0x200000, 0x80000, CRC(cf0f3f3b) SHA1(49a3c0e7536edd53bbf09353e43e9166d736b3f4) )
- ROM_REGION( 0x48000, "audiocpu", 0 ) /* Z80 code */
+ ROM_REGION( 0x48000, "audiocpu", 0 ) /* Z80 code */
ROM_LOAD( "bp947a.u20", 0x00000, 0x08000, CRC(a4a36170) SHA1(ae55094518bd968ea0d04613a133c1421e412012) )
ROM_CONTINUE( 0x10000, 0x38000 )
- ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x800000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "bp947a.u49", 0x000000, 0x200000, CRC(09749531) SHA1(6deeed2712241611ec3202c49a66beed28698af8) )
ROM_LOAD( "bp947a.u50", 0x200000, 0x200000, CRC(19cea8b2) SHA1(87fb29458074f0e4852237e0184b8b3b44b0eb29) )
ROM_LOAD( "bp947a.u51", 0x400000, 0x200000, CRC(c19bed67) SHA1(ac664a15512c0e8c8b701833aede95f53cd46a45) )
ROM_LOAD( "bp947a.u52", 0x600000, 0x200000, CRC(70c64875) SHA1(1c20ab100ccfdf42c97a25e4deb9041b83f5ca8d) )
- ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
- ROM_LOAD( "bp947a.u48", 0x000000, 0x100000, CRC(04ff6a3d) SHA1(7187db436f7a2ab59a3f5c6ab297b3d740e20f1d) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "layer0", 0 ) /* Layer 0 */
+ ROM_LOAD( "bp947a.u48", 0x000000, 0x100000, CRC(04ff6a3d) SHA1(7187db436f7a2ab59a3f5c6ab297b3d740e20f1d) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
- ROM_LOAD( "bp947a.u47", 0x000000, 0x100000, CRC(0de42827) SHA1(05d452ca11a31f941cb8a9b0cbb0b59c6b0cbdcb) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_LOAD( "bp947a.u47", 0x000000, 0x100000, CRC(0de42827) SHA1(05d452ca11a31f941cb8a9b0cbb0b59c6b0cbdcb) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
- ROM_LOAD( "bp947a.u46", 0x000000, 0x100000, CRC(0f9c906e) SHA1(03872e8be28637df66373bddb04ed91de4f9db75) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
+ ROM_LOAD( "bp947a.u46", 0x000000, 0x100000, CRC(0f9c906e) SHA1(03872e8be28637df66373bddb04ed91de4f9db75) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "oki1", 0 ) /* OKIM6295 #1 Samples */
- ROM_LOAD( "bp947a.u42", 0x000000, 0x100000, CRC(2ce8ff2a) SHA1(8ef8c5b7d4a0e60c980c2962e75f7977faafa311) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_LOAD( "bp947a.u42", 0x000000, 0x100000, CRC(2ce8ff2a) SHA1(8ef8c5b7d4a0e60c980c2962e75f7977faafa311) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
- ROM_REGION( 0x100000, "oki2", 0 ) /* OKIM6295 #2 Samples */
- ROM_LOAD( "bp947a.u37", 0x000000, 0x100000, CRC(c3077c8f) SHA1(0a76316a81b7de78279b859549eb5161a721ac71) ) // FIRST AND SECOND HALF IDENTICAL
+ ROM_REGION( 0x100000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_LOAD( "bp947a.u37", 0x000000, 0x100000, CRC(c3077c8f) SHA1(0a76316a81b7de78279b859549eb5161a721ac71) ) // FIRST AND SECOND HALF IDENTICAL
ROM_CONTINUE( 0x000000, 0x100000 )
ROM_END
@@ -3810,27 +3810,27 @@ ROM_END
***************************************************************************/
ROM_START( pacslot )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "pa1-mprob.u41", 0x00000, 0x80000, CRC(56281370) SHA1(b75a7c5997adac14486cef7be4e41d113c86021f) )
- ROM_REGION( 0x100000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x100000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "pa1-obj0.u52", 0x00000, 0x80000, CRC(bf9232ce) SHA1(9a887a964e9a75e16c59dcf217c664404e74cc2a) )
ROM_LOAD16_BYTE( "pa1-obj1.u53", 0x00001, 0x80000, CRC(6eb76a04) SHA1(66c8e36bee4439c203a02b30898e4f741205d681) )
- ROM_REGION( 0x80000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x80000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "pa1-cha0.u60", 0x00000, 0x40000, CRC(314b51a6) SHA1(eef102c4f0c0e0f668a7cf228cd4fbe45b2ce45f) )
ROM_LOAD( "pa1-cha1.u61", 0x40000, 0x40000, CRC(f7a2c846) SHA1(3b505a7a3c7f30e6cd87803f5ae7e962205fc1f0) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* OKIM6295 #1 Samples */
ROM_LOAD( "pa1-voi0.u27", 0x00000, 0x40000, CRC(e3e623e1) SHA1(396accc7f7384277b700f019b5083def8a48ccd7) )
- ROM_REGION( 0x40000, "oki2", ROMREGION_ERASE00 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x40000, "oki2", ROMREGION_ERASE00 ) /* OKIM6295 #2 Samples */
// empty ROM socket
ROM_REGION( 0x117 * 3, "plds", 0 )
- ROM_LOAD( "n44u1a.u1", 0x117*0, 0x117, NO_DUMP ) // GAL16V8B-15LP (Protected)
- ROM_LOAD( "n44u3a.u3", 0x117*1, 0x117, NO_DUMP ) // GAL16V8B-15LP (Protected)
- ROM_LOAD( "n44u51a.u51", 0x117*2, 0x117, NO_DUMP ) // GAL16V8B-15LP (Protected)
+ ROM_LOAD( "n44u1a.u1", 0x117*0, 0x117, NO_DUMP ) // GAL16V8B-15LP (Protected)
+ ROM_LOAD( "n44u3a.u3", 0x117*1, 0x117, NO_DUMP ) // GAL16V8B-15LP (Protected)
+ ROM_LOAD( "n44u51a.u51", 0x117*2, 0x117, NO_DUMP ) // GAL16V8B-15LP (Protected)
ROM_END
@@ -3849,20 +3849,20 @@ X3 = 16 MHz
***************************************************************************/
ROM_START( pwrinst2 )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "g02.u45", 0x000000, 0x80000, CRC(7b33bc43) SHA1(a68eb94e679f03c354932b8c5cd1bb2922fec0aa) )
ROM_LOAD16_BYTE( "g02.u44", 0x000001, 0x80000, CRC(8f6f6637) SHA1(024b12c0fe40e27c79e38bd7601a9183a62d75fd) )
ROM_LOAD16_BYTE( "g02.u43", 0x100000, 0x80000, CRC(178e3d24) SHA1(926234f4196a5d5e3bd1438abbf73355f2c65b06) )
ROM_LOAD16_BYTE( "g02.u42", 0x100001, 0x80000, CRC(a0b4ee99) SHA1(c6df4aa2543b04d8bda7683f503e5eb763e506af) )
- ROM_REGION16_BE( 0x100000, "user1", ROMREGION_ERASE00 ) /* 68000 extra data roms */
+ ROM_REGION16_BE( 0x100000, "user1", ROMREGION_ERASE00 ) /* 68000 extra data roms */
/* not used */
- ROM_REGION( 0x24000, "audiocpu", 0 ) /* Z80 code */
+ ROM_REGION( 0x24000, "audiocpu", 0 ) /* Z80 code */
ROM_LOAD( "g02.u3a", 0x00000, 0x0c000, CRC(ebea5e1e) SHA1(4d3af9e5f29d0c1b26563f51250039c9e8bd3735) )
ROM_CONTINUE( 0x10000, 0x14000 )
- ROM_REGION( 0xe00000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0xe00000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "g02.u61", 0x000000, 0x200000, CRC(91e30398) SHA1(2b59a5e40bed2a988382054fe30d92808dad3348) )
ROM_LOAD( "g02.u62", 0x200000, 0x200000, CRC(d9455dd7) SHA1(afa69fe9a540cd78b8cfecf09cffa1401c01141a) )
ROM_LOAD( "g02.u63", 0x400000, 0x200000, CRC(4d20560b) SHA1(ceaee8cf0b69cc366b95ddcb689a5594d79e5114) )
@@ -3871,44 +3871,44 @@ ROM_START( pwrinst2 )
ROM_LOAD( "g02.u66", 0xa00000, 0x200000, CRC(becf2a36) SHA1(f8b386d0292b1dc745b7253a3df51d1aa8d5e9db) )
ROM_LOAD( "g02.u67", 0xc00000, 0x200000, CRC(52fe2b8b) SHA1(dd50aa62f7db995e28f47de9b3fb749aeeaaa5b0) )
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "g02.u78", 0x000000, 0x200000, CRC(1eca63d2) SHA1(538942b43301f950e3d5139461331c54dc90129d) )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "g02.u81", 0x000000, 0x100000, CRC(8a3ff685) SHA1(4a59ec50ec4470453374fe10f76d3e894494b49f) )
- ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "g02.u89", 0x000000, 0x100000, CRC(373e1f73) SHA1(ec1ae9fab37eee41be8e1bc6dad03809b62fdbce) )
- ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
+ ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
ROM_LOAD( "g02.82a", 0x000000, 0x080000, CRC(4b3567d6) SHA1(d3e14783b312d2bea9722a8e3c22bcec81e26166) )
- ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u53", 0x040000, 0x200000, CRC(c4bdd9e0) SHA1(a938a831e789ddf6f3cc5f3e5f3877ec7bd62d4e) )
ROM_LOAD( "g02.u54", 0x240000, 0x200000, CRC(1357d50e) SHA1(433766177ce9d6933f90de85ba91bfc6d8d5d664) )
- ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u55", 0x040000, 0x200000, CRC(2d102898) SHA1(bd81f4cd2ba100707db0c5bb1419f0b23c998574) )
ROM_LOAD( "g02.u56", 0x240000, 0x200000, CRC(9ff50dda) SHA1(1121685e387c20e228032f2b0f5cbb606376fc15) )
ROM_END
ROM_START( pwrinst2j )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "g02j.u45", 0x000000, 0x80000, CRC(42d0abd7) SHA1(c58861d43c4539ccc8b2f93eabc56aab37d3aa34))
ROM_LOAD16_BYTE( "g02j.u44", 0x000001, 0x80000, CRC(362b7af3) SHA1(2d15611530cef76f0f9c82ee0411966079ae19c3))
ROM_LOAD16_BYTE( "g02j.u43", 0x100000, 0x80000, CRC(c94c596b) SHA1(ee755a344f769e3ed05d8ca57f517b9e8c02f22e) )
ROM_LOAD16_BYTE( "g02j.u42", 0x100001, 0x80000, CRC(4f4c8270) SHA1(1fa964f5646bd1d078e3661c21e191b0789c05c9) )
- ROM_REGION16_BE( 0x100000, "user1", ROMREGION_ERASE00 ) /* 68000 extra data roms */
+ ROM_REGION16_BE( 0x100000, "user1", ROMREGION_ERASE00 ) /* 68000 extra data roms */
/* not used */
- ROM_REGION( 0x24000, "audiocpu", 0 ) /* Z80 code */
+ ROM_REGION( 0x24000, "audiocpu", 0 ) /* Z80 code */
ROM_LOAD( "g02j.u3a", 0x00000, 0x0c000, CRC(eead01f1) SHA1(0ced6755e471e0303fe397b3d54a5c799762ebd8) )
ROM_CONTINUE( 0x10000, 0x14000 )
- ROM_REGION( 0xe00000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0xe00000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "g02.u61", 0x000000, 0x200000, CRC(91e30398) SHA1(2b59a5e40bed2a988382054fe30d92808dad3348) )
ROM_LOAD( "g02.u62", 0x200000, 0x200000, CRC(d9455dd7) SHA1(afa69fe9a540cd78b8cfecf09cffa1401c01141a) )
ROM_LOAD( "g02.u63", 0x400000, 0x200000, CRC(4d20560b) SHA1(ceaee8cf0b69cc366b95ddcb689a5594d79e5114) )
@@ -3917,24 +3917,24 @@ ROM_START( pwrinst2j )
ROM_LOAD( "g02.u66", 0xa00000, 0x200000, CRC(becf2a36) SHA1(f8b386d0292b1dc745b7253a3df51d1aa8d5e9db) )
ROM_LOAD( "g02.u67", 0xc00000, 0x200000, CRC(52fe2b8b) SHA1(dd50aa62f7db995e28f47de9b3fb749aeeaaa5b0) )
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "g02.u78", 0x000000, 0x200000, CRC(1eca63d2) SHA1(538942b43301f950e3d5139461331c54dc90129d) )
- ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x100000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "g02.u81", 0x000000, 0x100000, CRC(8a3ff685) SHA1(4a59ec50ec4470453374fe10f76d3e894494b49f) )
- ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x100000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "g02.u89", 0x000000, 0x100000, CRC(373e1f73) SHA1(ec1ae9fab37eee41be8e1bc6dad03809b62fdbce) )
- ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
+ ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
ROM_LOAD( "g02j.82a", 0x000000, 0x080000, CRC(3be86fe1) SHA1(313bfe5fb8dc5fee4462db259738e079759f9390) )
- ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u53", 0x040000, 0x200000, CRC(c4bdd9e0) SHA1(a938a831e789ddf6f3cc5f3e5f3877ec7bd62d4e) )
ROM_LOAD( "g02.u54", 0x240000, 0x200000, CRC(1357d50e) SHA1(433766177ce9d6933f90de85ba91bfc6d8d5d664) )
- ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u55", 0x040000, 0x200000, CRC(2d102898) SHA1(bd81f4cd2ba100707db0c5bb1419f0b23c998574) )
ROM_LOAD( "g02.u56", 0x240000, 0x200000, CRC(9ff50dda) SHA1(1121685e387c20e228032f2b0f5cbb606376fc15) )
@@ -3994,21 +3994,21 @@ Notes:
*/
ROM_START( plegends )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "d12.u45", 0x000000, 0x80000, CRC(ed8a2e3d) SHA1(0a09c58cd8a726189cd7679d06343e0b8c3de945) )
ROM_LOAD16_BYTE( "d13.u44", 0x000001, 0x80000, CRC(25821731) SHA1(7c6ece92b36dc7eb489879d9ae3e8af9380b9f62) )
ROM_LOAD16_BYTE( "d14.u2", 0x100000, 0x80000, CRC(c2cb1402) SHA1(78e70915ca32b97c22605a304dc8611e1fe01ae9) ) /* Contains text strings */
ROM_LOAD16_BYTE( "d16.u3", 0x100001, 0x80000, CRC(50a1c63e) SHA1(5a8431a81aa61034e67141944b9e7cf97842773a) ) /* Contains text strings */
- ROM_REGION16_BE( 0x100000, "user1", 0 ) /* 68000 extra data roms */
+ ROM_REGION16_BE( 0x100000, "user1", 0 ) /* 68000 extra data roms */
ROM_LOAD16_BYTE( "d15.u4", 0x000000, 0x80000, CRC(6352cec0) SHA1(a54d55b8d642e438158268d0d41880b6589e48e2) )
ROM_LOAD16_BYTE( "d17.u5", 0x000001, 0x80000, CRC(7af810d8) SHA1(5e24f78a228809a001f3f3372c1b32ea05070e17) )
- ROM_REGION( 0x44000, "audiocpu", 0 ) /* Z80 code */
+ ROM_REGION( 0x44000, "audiocpu", 0 ) /* Z80 code */
ROM_LOAD( "d19.u3", 0x00000, 0x0c000, CRC(47598459) SHA1(4e9dcfebfbd160230768965e8c6e5ed446c1aa7b) ) /* Same as sound.u3 below, but twice the size? */
ROM_CONTINUE( 0x10000, 0x34000 )
- ROM_REGION( 0x1000000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x1000000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "g02.u61", 0x000000, 0x200000, CRC(91e30398) SHA1(2b59a5e40bed2a988382054fe30d92808dad3348) )
ROM_LOAD( "g02.u62", 0x200000, 0x200000, CRC(d9455dd7) SHA1(afa69fe9a540cd78b8cfecf09cffa1401c01141a) )
ROM_LOAD( "g02.u63", 0x400000, 0x200000, CRC(4d20560b) SHA1(ceaee8cf0b69cc366b95ddcb689a5594d79e5114) )
@@ -4018,45 +4018,45 @@ ROM_START( plegends )
ROM_LOAD( "atgs.u1", 0xc00000, 0x200000, CRC(aa6f34a9) SHA1(00de85de1b413bd2c46931c13365f8556b50b634) ) /* US version's rom labeled "sp6_u67-1" */
ROM_LOAD( "atgs.u2", 0xe00000, 0x200000, CRC(553eda27) SHA1(5b9126f966f0c64b3ac7c06526064d71e4df60c5) ) /* US version's rom labeled "sp6_u67-2" */
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "atgs.u78", 0x000000, 0x200000, CRC(16710ecb) SHA1(6277f7f6095457df649932550b04242e5853ec5e) ) /* US version's rom labeled "bg0_u78" */
- ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "atgs.u81", 0x000000, 0x200000, CRC(cb2aca91) SHA1(869f0f2db35c45ec90b74d33d521cbb598e60a3f) ) /* US version's rom labeled "bg1_u81" */
- ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "atgs.u89", 0x000000, 0x200000, CRC(65f45a0f) SHA1(b7f4b56308dcdc144100d0a92d91255459a320a4) ) /* US version's rom labeled "bg2_u89" */
- ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
+ ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
ROM_LOAD( "text.u82", 0x000000, 0x080000, CRC(f57333ea) SHA1(409d8005ffcf91943e4a743b2434ce425f5bdc36) ) /* US version's rom labeled "d20" */
- ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u53", 0x040000, 0x200000, CRC(c4bdd9e0) SHA1(a938a831e789ddf6f3cc5f3e5f3877ec7bd62d4e) )
ROM_LOAD( "g02.u54", 0x240000, 0x200000, CRC(1357d50e) SHA1(433766177ce9d6933f90de85ba91bfc6d8d5d664) )
- ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u55", 0x040000, 0x200000, CRC(2d102898) SHA1(bd81f4cd2ba100707db0c5bb1419f0b23c998574) )
ROM_LOAD( "g02.u56", 0x240000, 0x200000, CRC(9ff50dda) SHA1(1121685e387c20e228032f2b0f5cbb606376fc15) )
ROM_END
ROM_START( plegendsj )
- ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x200000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_BYTE( "prog.u45", 0x000000, 0x80000, CRC(94f53db2) SHA1(34c671f160cfcb7d46cc964731ff2b77dc0be928) )
ROM_LOAD16_BYTE( "prog.u44", 0x000001, 0x80000, CRC(db0ad756) SHA1(9c1510491cdc9442062ee3bd8a1bb93f00d33d97) )
ROM_LOAD16_BYTE( "pr12.u2", 0x100000, 0x80000, CRC(0e202559) SHA1(217a8e47d5c679aff02ca43de1641230e4f78b01) ) /* Contains text in Japanese */
ROM_LOAD16_BYTE( "pr12.u3", 0x100001, 0x80000, CRC(54742f21) SHA1(fae7bb7381478eb077f0409acd521f77417aa968) ) /* Contains text in Japanese */
- ROM_REGION16_BE( 0x100000, "user1", 0 ) /* 68000 extra data roms */
+ ROM_REGION16_BE( 0x100000, "user1", 0 ) /* 68000 extra data roms */
ROM_LOAD16_BYTE( "d15.u4", 0x000000, 0x80000, CRC(6352cec0) SHA1(a54d55b8d642e438158268d0d41880b6589e48e2) )
ROM_LOAD16_BYTE( "d17.u5", 0x000001, 0x80000, CRC(7af810d8) SHA1(5e24f78a228809a001f3f3372c1b32ea05070e17) )
- ROM_REGION( 0x24000, "audiocpu", 0 ) /* Z80 code */
+ ROM_REGION( 0x24000, "audiocpu", 0 ) /* Z80 code */
ROM_LOAD( "sound.u3", 0x00000, 0x0c000, CRC(36f71520) SHA1(11d0a059ddba3e1aa4c54ccdde7b3f5c7bde482f) )
ROM_CONTINUE( 0x10000, 0x14000 )
- ROM_REGION( 0x1000000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x1000000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD( "g02.u61", 0x000000, 0x200000, CRC(91e30398) SHA1(2b59a5e40bed2a988382054fe30d92808dad3348) )
ROM_LOAD( "g02.u62", 0x200000, 0x200000, CRC(d9455dd7) SHA1(afa69fe9a540cd78b8cfecf09cffa1401c01141a) )
ROM_LOAD( "g02.u63", 0x400000, 0x200000, CRC(4d20560b) SHA1(ceaee8cf0b69cc366b95ddcb689a5594d79e5114) )
@@ -4066,24 +4066,24 @@ ROM_START( plegendsj )
ROM_LOAD( "atgs.u1", 0xc00000, 0x200000, CRC(aa6f34a9) SHA1(00de85de1b413bd2c46931c13365f8556b50b634) ) /* US version's rom labeled "sp6_u67-1" */
ROM_LOAD( "atgs.u2", 0xe00000, 0x200000, CRC(553eda27) SHA1(5b9126f966f0c64b3ac7c06526064d71e4df60c5) ) /* US version's rom labeled "sp6_u67-2" */
- ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x200000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "atgs.u78", 0x000000, 0x200000, CRC(16710ecb) SHA1(6277f7f6095457df649932550b04242e5853ec5e) ) /* US version's rom labeled "bg0_u78" */
- ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
+ ROM_REGION( 0x200000, "layer1", 0 ) /* Layer 1 */
ROM_LOAD( "atgs.u81", 0x000000, 0x200000, CRC(cb2aca91) SHA1(869f0f2db35c45ec90b74d33d521cbb598e60a3f) ) /* US version's rom labeled "bg1_u81" */
- ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
+ ROM_REGION( 0x200000, "layer2", 0 ) /* Layer 2 */
ROM_LOAD( "atgs.u89", 0x000000, 0x200000, CRC(65f45a0f) SHA1(b7f4b56308dcdc144100d0a92d91255459a320a4) ) /* US version's rom labeled "bg2_u89" */
- ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
+ ROM_REGION( 0x080000, "layer3", 0 ) /* Layer 3 */
ROM_LOAD( "text.u82", 0x000000, 0x080000, CRC(f57333ea) SHA1(409d8005ffcf91943e4a743b2434ce425f5bdc36) ) /* US version's rom labeled "d20" */
- ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x440000, "oki1", 0 ) /* OKIM6295 #1 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u53", 0x040000, 0x200000, CRC(c4bdd9e0) SHA1(a938a831e789ddf6f3cc5f3e5f3877ec7bd62d4e) )
ROM_LOAD( "g02.u54", 0x240000, 0x200000, CRC(1357d50e) SHA1(433766177ce9d6933f90de85ba91bfc6d8d5d664) )
- ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
+ ROM_REGION( 0x440000, "oki2", 0 ) /* OKIM6295 #2 Samples */
/* Leave the 0x40000 bytes addressable by the chip empty */
ROM_LOAD( "g02.u55", 0x040000, 0x200000, CRC(2d102898) SHA1(bd81f4cd2ba100707db0c5bb1419f0b23c998574) )
ROM_LOAD( "g02.u56", 0x240000, 0x200000, CRC(9ff50dda) SHA1(1121685e387c20e228032f2b0f5cbb606376fc15) )
@@ -4330,23 +4330,23 @@ ROM_END
***************************************************************************/
ROM_START( tjumpman )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "tj1_mpr-0c.u41", 0x00000, 0x80000, CRC(de3030b8) SHA1(5f2165ea039c34cab605ebddc0b61eadc47b1532) )
- ROM_REGION( 0x100000 * 2, "sprites", 0 ) /* Sprites */
+ ROM_REGION( 0x100000 * 2, "sprites", 0 ) /* Sprites */
ROM_LOAD16_BYTE( "tj1_obj-0a.u52", 0x00000, 0x80000, CRC(b42cf8e8) SHA1(9ed7fb3574ed163a81f34a0d8cfa7a4661439932) )
ROM_LOAD16_BYTE( "tj1_obj-1a.u53", 0x00001, 0x80000, CRC(5f0124d7) SHA1(4d9cfa464159998c176a178c668273d128dedff8) )
- ROM_REGION( 0x80000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x80000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "tj1_cha-0a.u60", 0x00000, 0x40000, CRC(8aa08a38) SHA1(92b4df72fb8a833bb686ea478811243c5b868470) )
ROM_LOAD( "tj1_cha-1a.u61", 0x40000, 0x40000, CRC(50072c82) SHA1(f8823e5a865afb8824cafd3b6483e2b6250ee77f) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* OKIM6295 #1 Samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* OKIM6295 #1 Samples */
ROM_LOAD( "tj1_voi-0a.u27", 0x00000, 0x40000, CRC(b5693aae) SHA1(8887ae98030cb5d184e3d57d2b4e48bf1e76a232) )
ROM_REGION( 0x117 * 2, "plds", 0 )
- ROM_LOAD( "n44u1g.u1", 0x117*0, 0x117, CRC(e226ec18) SHA1(c14098e06413d6fc88926e31538d496ef7314903) ) // GAL16V8D-15LP
- ROM_LOAD( "n44u3b.u3", 0x117*1, 0x117, CRC(4cd79750) SHA1(cfb3331cd8bb2eaaf5d2a80ae76a5a15ae92d379) ) // GAL16V8D-15LP
+ ROM_LOAD( "n44u1g.u1", 0x117*0, 0x117, CRC(e226ec18) SHA1(c14098e06413d6fc88926e31538d496ef7314903) ) // GAL16V8D-15LP
+ ROM_LOAD( "n44u3b.u3", 0x117*1, 0x117, CRC(4cd79750) SHA1(cfb3331cd8bb2eaaf5d2a80ae76a5a15ae92d379) ) // GAL16V8D-15LP
ROM_END
@@ -4359,17 +4359,17 @@ OSC: 28.0, 16.0, 16.9 MHz
***************************************************************************/
ROM_START( uopoko )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "u26.int", 0x000000, 0x080000, CRC(b445c9ac) SHA1(4dda1c6e19de629ea4d9061560c32a9f0deabd53) )
ROM_LOAD16_BYTE( "u25.int", 0x000001, 0x080000, CRC(a1258482) SHA1(7f4adc4a6d069032aaf3d93eb60fde16b59483f8) )
- ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "u33.bin", 0x000000, 0x400000, CRC(5d142ad2) SHA1(f26abcf7a625a322b83df44fbd6e852bfb03663c) )
- ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "u49.bin", 0x000000, 0x400000, CRC(12fb11bb) SHA1(953df1b16b5c9a6c3eb2fdebec4669a879270e73) )
- ROM_REGION( 0x200000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x200000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u4.bin", 0x000000, 0x200000, CRC(a2d0d755) SHA1(f8493ef7f367f3dc2a229ba785ac67bc5c2c54c0) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
@@ -4377,17 +4377,17 @@ ROM_START( uopoko )
ROM_END
ROM_START( uopokoj )
- ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
+ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */
ROM_LOAD16_BYTE( "u26.bin", 0x000000, 0x080000, CRC(e7eec050) SHA1(cf3a77741029f96dbbec5ca7217a1723e4233cff) )
ROM_LOAD16_BYTE( "u25.bin", 0x000001, 0x080000, CRC(68cb6211) SHA1(a6db0bc2e3e54b6992a44b7d52395917e66db49b) )
- ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites: * 2 */
+ ROM_REGION( 0x400000 * 2, "sprites", 0 ) /* Sprites: * 2 */
ROM_LOAD( "u33.bin", 0x000000, 0x400000, CRC(5d142ad2) SHA1(f26abcf7a625a322b83df44fbd6e852bfb03663c) )
- ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
+ ROM_REGION( 0x400000, "layer0", 0 ) /* Layer 0 */
ROM_LOAD( "u49.bin", 0x000000, 0x400000, CRC(12fb11bb) SHA1(953df1b16b5c9a6c3eb2fdebec4669a879270e73) )
- ROM_REGION( 0x200000, "ymz", 0 ) /* Samples */
+ ROM_REGION( 0x200000, "ymz", 0 ) /* Samples */
ROM_LOAD( "u4.bin", 0x000000, 0x200000, CRC(a2d0d755) SHA1(f8493ef7f367f3dc2a229ba785ac67bc5c2c54c0) )
ROM_REGION16_BE( 0x80, "eeprom", 0 )
@@ -4411,10 +4411,10 @@ ROM_END
Expand the 2 bit part into a 4 bit layout, so we can decode it */
static void sailormn_unpack_tiles( running_machine &machine, const char *region )
{
- const UINT32 len = machine.root_device().memregion(region)->bytes();
- UINT8 *rgn = machine.root_device().memregion(region)->base();
- UINT8 *src = rgn + (len/4)*3 - 1;
- UINT8 *dst = rgn + (len/4)*4 - 2;
+ const UINT32 len = machine.root_device().memregion(region)->bytes();
+ UINT8 *rgn = machine.root_device().memregion(region)->base();
+ UINT8 *src = rgn + (len/4)*3 - 1;
+ UINT8 *dst = rgn + (len/4)*4 - 2;
while(src <= dst)
{
@@ -4432,7 +4432,7 @@ static void init_cave(running_machine &machine)
{
cave_state *state = machine.driver_data<cave_state>();
- state->m_spritetype[0] = 0; // Normal sprites
+ state->m_spritetype[0] = 0; // Normal sprites
state->m_kludge = 0;
state->m_time_vblank_irq = 100;
@@ -4482,7 +4482,7 @@ DRIVER_INIT_MEMBER(cave_state,ddonpach)
init_cave(machine());
ddonpach_unpack_sprites(machine());
- m_spritetype[0] = 1; // "different" sprites (no zooming?)
+ m_spritetype[0] = 1; // "different" sprites (no zooming?)
m_time_vblank_irq = 90;
}
@@ -4491,7 +4491,7 @@ DRIVER_INIT_MEMBER(cave_state,donpachi)
init_cave(machine());
ddonpach_unpack_sprites(machine());
- m_spritetype[0] = 1; // "different" sprites (no zooming?)
+ m_spritetype[0] = 1; // "different" sprites (no zooming?)
m_time_vblank_irq = 90;
}
@@ -4501,12 +4501,12 @@ DRIVER_INIT_MEMBER(cave_state,esprade)
init_cave(machine());
esprade_unpack_sprites(machine());
- m_time_vblank_irq = 2000; /**/
+ m_time_vblank_irq = 2000; /**/
-#if 0 //ROM PATCH
+#if 0 //ROM PATCH
{
UINT16 *rom = (UINT16 *)memregion("maincpu")->base();
- rom[0x118A/2] = 0x4e71; //palette fix 118A: 5548 SUBQ.W #2,A0 --> NOP
+ rom[0x118A/2] = 0x4e71; //palette fix 118A: 5548 SUBQ.W #2,A0 --> NOP
}
#endif
}
@@ -4518,8 +4518,8 @@ DRIVER_INIT_MEMBER(cave_state,gaia)
/* No EEPROM */
unpack_sprites(machine());
- m_spritetype[0] = 2; // Normal sprites with different position handling
- m_time_vblank_irq = 2000; /**/
+ m_spritetype[0] = 2; // Normal sprites with different position handling
+ m_time_vblank_irq = 2000; /**/
}
DRIVER_INIT_MEMBER(cave_state,guwange)
@@ -4527,7 +4527,7 @@ DRIVER_INIT_MEMBER(cave_state,guwange)
init_cave(machine());
esprade_unpack_sprites(machine());
- m_time_vblank_irq = 2000; /**/
+ m_time_vblank_irq = 2000; /**/
}
DRIVER_INIT_MEMBER(cave_state,hotdogst)
@@ -4544,8 +4544,8 @@ DRIVER_INIT_MEMBER(cave_state,hotdogst)
membank("bank4")->configure_entries(0, 4, &ROM[0x00000], 0x20000);
unpack_sprites(machine());
- m_spritetype[0] = 2; // Normal sprites with different position handling
- m_time_vblank_irq = 2000; /**/
+ m_spritetype[0] = 2; // Normal sprites with different position handling
+ m_time_vblank_irq = 2000; /**/
}
DRIVER_INIT_MEMBER(cave_state,mazinger)
@@ -4575,7 +4575,7 @@ DRIVER_INIT_MEMBER(cave_state,mazinger)
}
unpack_sprites(machine());
- m_spritetype[0] = 2; // Normal sprites with different position handling
+ m_spritetype[0] = 2; // Normal sprites with different position handling
m_kludge = 3;
m_time_vblank_irq = 2100;
@@ -4602,7 +4602,7 @@ DRIVER_INIT_MEMBER(cave_state,metmqstr)
membank("bank6")->configure_entries(0, 8, &ROM[0x00000], 0x20000);
unpack_sprites(machine());
- m_spritetype[0] = 2; // Normal sprites with different position handling
+ m_spritetype[0] = 2; // Normal sprites with different position handling
m_kludge = 3;
m_time_vblank_irq = 17376;
}
@@ -4638,19 +4638,19 @@ DRIVER_INIT_MEMBER(cave_state,pwrinst2j)
unpack_sprites(machine());
m_spritetype[0] = 3;
m_kludge = 4;
- m_time_vblank_irq = 2000; /**/
+ m_time_vblank_irq = 2000; /**/
}
DRIVER_INIT_MEMBER(cave_state,pwrinst2)
{
/* this patch fixes on of the moves, why is it needed? is the rom bad or is there another
- problem? does the Japan set need it or not? */
+ problem? does the Japan set need it or not? */
DRIVER_INIT_CALL(pwrinst2j);
-#if 1 //ROM PATCH
+#if 1 //ROM PATCH
{
UINT16 *rom = (UINT16 *)machine().root_device().memregion("maincpu")->base();
- rom[0xd46c / 2] = 0xd482; // kurara dash fix 0xd400 -> 0xd482
+ rom[0xd46c / 2] = 0xd482; // kurara dash fix 0xd400 -> 0xd482
}
#endif
@@ -4689,7 +4689,7 @@ DRIVER_INIT_MEMBER(cave_state,sailormn)
sailormn_unpack_tiles( machine(), "layer2" );
unpack_sprites(machine());
- m_spritetype[0] = 2; // Normal sprites with different position handling
+ m_spritetype[0] = 2; // Normal sprites with different position handling
m_kludge = 1;
m_time_vblank_irq = 2000;
@@ -4702,7 +4702,7 @@ DRIVER_INIT_MEMBER(cave_state,tjumpman)
init_cave(machine());
unpack_sprites(machine());
- m_spritetype[0] = 2; // Normal sprites with different position handling
+ m_spritetype[0] = 2; // Normal sprites with different position handling
m_kludge = 3;
m_time_vblank_irq = 17376;
@@ -4716,7 +4716,7 @@ DRIVER_INIT_MEMBER(cave_state,uopoko)
unpack_sprites(machine());
m_kludge = 2;
- m_time_vblank_irq = 2000; /**/
+ m_time_vblank_irq = 2000; /**/
}
DRIVER_INIT_MEMBER(cave_state,korokoro)
@@ -4726,7 +4726,7 @@ DRIVER_INIT_MEMBER(cave_state,korokoro)
m_irq_level = 2;
unpack_sprites(machine());
- m_time_vblank_irq = 2000; /**/
+ m_time_vblank_irq = 2000; /**/
m_leds[0] = 0;
m_leds[1] = 0;
@@ -4773,7 +4773,7 @@ GAME( 1995, sailormnou, sailormn, sailormn, cave, cave_state, sailormn, ROT0
GAME( 1995, sailormnoj, sailormn, sailormn, cave, cave_state, sailormn, ROT0, "Banpresto", "Pretty Soldier Sailor Moon (Ver. 95/03/22, Japan)", GAME_SUPPORTS_SAVE )
GAME( 1995, sailormnok, sailormn, sailormn, cave, cave_state, sailormn, ROT0, "Banpresto", "Pretty Soldier Sailor Moon (Ver. 95/03/22, Korea)", GAME_SUPPORTS_SAVE )
GAME( 1995, sailormnot, sailormn, sailormn, cave, cave_state, sailormn, ROT0, "Banpresto", "Pretty Soldier Sailor Moon (Ver. 95/03/22, Taiwan)", GAME_SUPPORTS_SAVE )
-GAME( 1995, sailormnoh, sailormn, sailormn, cave, cave_state, sailormn, ROT0, "Banpresto", "Pretty Soldier Sailor Moon (Ver. 95/03/22, Hong Kong)", GAME_SUPPORTS_SAVE )
+GAME( 1995, sailormnoh, sailormn, sailormn, cave, cave_state, sailormn, ROT0, "Banpresto", "Pretty Soldier Sailor Moon (Ver. 95/03/22, Hong Kong)", GAME_SUPPORTS_SAVE )
// The EEPROM determines the region, program roms are the same between sets
GAME( 1996, agallet, 0, sailormn, cave, cave_state, agallet, ROT270, "Banpresto / Gazelle", "Air Gallet (Europe)", GAME_SUPPORTS_SAVE )
@@ -4811,4 +4811,4 @@ GAME( 1999, crusherm, 0, crusherm, korokoro, cave_state, korokoro, ROT0
GAME( 1999, tjumpman, 0, tjumpman, tjumpman, cave_state, tjumpman, ROT0, "Namco", "Tobikose! Jumpman", GAME_SUPPORTS_SAVE )
-GAME( 2001, theroes, 0, gaia, theroes, cave_state, gaia, ROT0, "Primetek Investments", "Thunder Heroes", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND ) // cuts out occasionally
+GAME( 2001, theroes, 0, gaia, theroes, cave_state, gaia, ROT0, "Primetek Investments", "Thunder Heroes", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_SOUND ) // cuts out occasionally
diff --git a/src/mame/drivers/cb2001.c b/src/mame/drivers/cb2001.c
index 0d3ebd532ae..a483d82152e 100644
--- a/src/mame/drivers/cb2001.c
+++ b/src/mame/drivers/cb2001.c
@@ -566,8 +566,8 @@ static ADDRESS_MAP_START( cb2001_map, AS_PROGRAM, 16, cb2001_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cb2001_io, AS_IO, 16, cb2001_state )
- AM_RANGE(0x00, 0x03) AM_DEVREADWRITE8("ppi8255_0", i8255_device, read, write, 0xffff) /* Input Ports */
- AM_RANGE(0x10, 0x13) AM_DEVREADWRITE8("ppi8255_1", i8255_device, read, write, 0xffff) /* DIP switches */
+ AM_RANGE(0x00, 0x03) AM_DEVREADWRITE8("ppi8255_0", i8255_device, read, write, 0xffff) /* Input Ports */
+ AM_RANGE(0x10, 0x13) AM_DEVREADWRITE8("ppi8255_1", i8255_device, read, write, 0xffff) /* DIP switches */
AM_RANGE(0x20, 0x21) AM_DEVREAD8_LEGACY("aysnd", ay8910_r, 0xff00)
AM_RANGE(0x22, 0x23) AM_DEVWRITE8_LEGACY("aysnd", ay8910_data_address_w, 0xffff)
@@ -589,12 +589,12 @@ static INPUT_PORTS_START( cb2001 )
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* Coin B */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(2) /* Coin B */
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_IMPULSE(2) /* Coin D */
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) /* Coin C */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_IMPULSE(2) /* Coin D */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(2) /* Coin C */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_KEYIN )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* Coin A */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(2) /* Coin A */
PORT_START("IN2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -607,32 +607,32 @@ static INPUT_PORTS_START( cb2001 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Stats")
PORT_START("DSW1")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:1") /* OK */
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:1") /* OK */
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Hopper Out Switch" ) PORT_DIPLOCATION("DSW1:2") /* OK */
+ PORT_DIPNAME( 0x02, 0x02, "Hopper Out Switch" ) PORT_DIPLOCATION("DSW1:2") /* OK */
PORT_DIPSETTING( 0x02, "Active Low" )
PORT_DIPSETTING( 0x00, "Active High" )
- PORT_DIPNAME( 0x04, 0x04, "Payout Mode" ) PORT_DIPLOCATION("DSW1:3") /* OK */
+ PORT_DIPNAME( 0x04, 0x04, "Payout Mode" ) PORT_DIPLOCATION("DSW1:3") /* OK */
PORT_DIPSETTING( 0x04, "Payout Switch" )
PORT_DIPSETTING( 0x00, "Automatic" )
- PORT_DIPNAME( 0x08, 0x00, "W-UP '7'" ) PORT_DIPLOCATION("DSW1:4") /* not checked */
+ PORT_DIPNAME( 0x08, 0x00, "W-UP '7'" ) PORT_DIPLOCATION("DSW1:4") /* not checked */
PORT_DIPSETTING( 0x08, "Loss" )
PORT_DIPSETTING( 0x00, "Even" )
- PORT_DIPNAME( 0x10, 0x00, "W-UP Pay Rate" ) PORT_DIPLOCATION("DSW1:5") /* OK */
+ PORT_DIPNAME( 0x10, 0x00, "W-UP Pay Rate" ) PORT_DIPLOCATION("DSW1:5") /* OK */
PORT_DIPSETTING( 0x00, "80%" )
PORT_DIPSETTING( 0x10, "90%" )
- PORT_DIPNAME( 0x20, 0x00, "W-UP Game" ) PORT_DIPLOCATION("DSW1:6") /* OK */
+ PORT_DIPNAME( 0x20, 0x00, "W-UP Game" ) PORT_DIPLOCATION("DSW1:6") /* OK */
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0xc0, 0xc0, "Bet Max" ) PORT_DIPLOCATION("DSW1:7,8") /* OK */
+ PORT_DIPNAME( 0xc0, 0xc0, "Bet Max" ) PORT_DIPLOCATION("DSW1:7,8") /* OK */
PORT_DIPSETTING( 0x00, "16" )
PORT_DIPSETTING( 0x40, "32" )
PORT_DIPSETTING( 0x80, "64" )
PORT_DIPSETTING( 0xc0, "96" )
PORT_START("DSW2")
- PORT_DIPNAME( 0x07, 0x00, "Main Game Pay Rate" ) PORT_DIPLOCATION("DSW2:1,2,3") /* OK */
+ PORT_DIPNAME( 0x07, 0x00, "Main Game Pay Rate" ) PORT_DIPLOCATION("DSW2:1,2,3") /* OK */
PORT_DIPSETTING( 0x07, "35%" )
PORT_DIPSETTING( 0x06, "40%" )
PORT_DIPSETTING( 0x05, "45%" )
@@ -641,23 +641,23 @@ static INPUT_PORTS_START( cb2001 )
PORT_DIPSETTING( 0x02, "60%" )
PORT_DIPSETTING( 0x01, "65%" )
PORT_DIPSETTING( 0x00, "70%" )
- PORT_DIPNAME( 0x18, 0x00, "Hopper Limit" ) PORT_DIPLOCATION("DSW2:4,5") /* OK */
+ PORT_DIPNAME( 0x18, 0x00, "Hopper Limit" ) PORT_DIPLOCATION("DSW2:4,5") /* OK */
PORT_DIPSETTING( 0x18, "300" )
PORT_DIPSETTING( 0x10, "500" )
PORT_DIPSETTING( 0x08, "1000" )
PORT_DIPSETTING( 0x00, "Unlimited" )
- PORT_DIPNAME( 0x20, 0x00, "100 Odds Sound" ) PORT_DIPLOCATION("DSW2:6") /* not checked */
+ PORT_DIPNAME( 0x20, 0x00, "100 Odds Sound" ) PORT_DIPLOCATION("DSW2:6") /* not checked */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Key-In Type" ) PORT_DIPLOCATION("DSW2:7") /* OK */
+ PORT_DIPNAME( 0x40, 0x40, "Key-In Type" ) PORT_DIPLOCATION("DSW2:7") /* OK */
PORT_DIPSETTING( 0x40, "A-Type" )
PORT_DIPSETTING( 0x00, "B-Type" )
- PORT_DIPNAME( 0x80, 0x00, "Center Super 7 Bet Limit" ) PORT_DIPLOCATION("DSW2:8") /* related with DSW 4-6 */
+ PORT_DIPNAME( 0x80, 0x00, "Center Super 7 Bet Limit" ) PORT_DIPLOCATION("DSW2:8") /* related with DSW 4-6 */
PORT_DIPSETTING( 0x80, "Unlimited" )
PORT_DIPSETTING( 0x00, "Limited" )
PORT_START("DSW3")
- PORT_DIPNAME( 0x03, 0x03, "Key In Rate" ) PORT_DIPLOCATION("DSW3:1,2") /* OK */
+ PORT_DIPNAME( 0x03, 0x03, "Key In Rate" ) PORT_DIPLOCATION("DSW3:1,2") /* OK */
PORT_DIPSETTING( 0x00, "1 Coin/10 Credits" ) PORT_CONDITION("DSW2",0x40,EQUALS,0x40) /* A-Type */
PORT_DIPSETTING( 0x01, "1 Coin/20 Credits" ) PORT_CONDITION("DSW2",0x40,EQUALS,0x40)
PORT_DIPSETTING( 0x02, "1 Coin/50 Credits" ) PORT_CONDITION("DSW2",0x40,EQUALS,0x40)
@@ -666,12 +666,12 @@ static INPUT_PORTS_START( cb2001 )
PORT_DIPSETTING( 0x01, "1 Coin/10 Credits" ) PORT_CONDITION("DSW2",0x40,EQUALS,0x00)
PORT_DIPSETTING( 0x02, "1 Coin/25 Credits" ) PORT_CONDITION("DSW2",0x40,EQUALS,0x00)
PORT_DIPSETTING( 0x03, "1 Coin/50 Credits" ) PORT_CONDITION("DSW2",0x40,EQUALS,0x00)
- PORT_DIPNAME( 0x0c, 0x0c, "Coin A Rate" ) PORT_DIPLOCATION("DSW3:3,4") /* OK */
+ PORT_DIPNAME( 0x0c, 0x0c, "Coin A Rate" ) PORT_DIPLOCATION("DSW3:3,4") /* OK */
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x04, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x0c, "1 Coin/10 Credits" )
- PORT_DIPNAME( 0x30, 0x30, "Coin D Rate" ) PORT_DIPLOCATION("DSW3:5,6") /* OK */
+ PORT_DIPNAME( 0x30, 0x30, "Coin D Rate" ) PORT_DIPLOCATION("DSW3:5,6") /* OK */
PORT_DIPSETTING( 0x30, DEF_STR( 5C_1C ) ) PORT_CONDITION("DSW4",0x10,EQUALS,0x10) /* C-Type */
PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) PORT_CONDITION("DSW4",0x10,EQUALS,0x10)
PORT_DIPSETTING( 0x10, DEF_STR( 1C_1C ) ) PORT_CONDITION("DSW4",0x10,EQUALS,0x10)
@@ -680,14 +680,14 @@ static INPUT_PORTS_START( cb2001 )
PORT_DIPSETTING( 0x10, "1 Coin/10 Credits" ) PORT_CONDITION("DSW4",0x10,EQUALS,0x00)
PORT_DIPSETTING( 0x20, "1 Coin/25 Credits" ) PORT_CONDITION("DSW4",0x10,EQUALS,0x00)
PORT_DIPSETTING( 0x30, "1 Coin/50 Credits" ) PORT_CONDITION("DSW4",0x10,EQUALS,0x00)
- PORT_DIPNAME( 0xc0, 0xc0, "Coin C Rate" ) PORT_DIPLOCATION("DSW3:7,8") /* OK */
+ PORT_DIPNAME( 0xc0, 0xc0, "Coin C Rate" ) PORT_DIPLOCATION("DSW3:7,8") /* OK */
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0xc0, "1 Coin/10 Credits" )
PORT_START("DSW4")
- PORT_DIPNAME( 0x07, 0x07, "Credit Limit" ) PORT_DIPLOCATION("DSW4:1,2,3") /* not checked */
+ PORT_DIPNAME( 0x07, 0x07, "Credit Limit" ) PORT_DIPLOCATION("DSW4:1,2,3") /* not checked */
PORT_DIPSETTING( 0x07, "5,000" )
PORT_DIPSETTING( 0x06, "10,000" )
PORT_DIPSETTING( 0x05, "20,000" )
@@ -699,40 +699,40 @@ static INPUT_PORTS_START( cb2001 )
PORT_DIPNAME( 0x08, 0x08, "Display Of Payout Limit" ) PORT_DIPLOCATION("DSW4:4") /* not working */
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Type Of Coin D" ) PORT_DIPLOCATION("DSW4:5") /* OK */
+ PORT_DIPNAME( 0x10, 0x10, "Type Of Coin D" ) PORT_DIPLOCATION("DSW4:5") /* OK */
PORT_DIPSETTING( 0x10, "C-Type" )
PORT_DIPSETTING( 0x00, "D-Type" )
- PORT_DIPNAME( 0x20, 0x20, "Min. Bet For Bonus Play" ) PORT_DIPLOCATION("DSW4:6") /* OK */
+ PORT_DIPNAME( 0x20, 0x20, "Min. Bet For Bonus Play" ) PORT_DIPLOCATION("DSW4:6") /* OK */
PORT_DIPSETTING( 0x20, "16 Bet" )
PORT_DIPSETTING( 0x00, "8 Bet" )
- PORT_DIPNAME( 0x40, 0x40, "Reel Speed" ) PORT_DIPLOCATION("DSW4:7") /* OK */
+ PORT_DIPNAME( 0x40, 0x40, "Reel Speed" ) PORT_DIPLOCATION("DSW4:7") /* OK */
PORT_DIPSETTING( 0x40, DEF_STR( Low ) )
PORT_DIPSETTING( 0x00, DEF_STR( High ) )
- PORT_DIPNAME( 0x80, 0x80, "Hopper Out By Coin A" ) PORT_DIPLOCATION("DSW4:8") /* not checked */
+ PORT_DIPNAME( 0x80, 0x80, "Hopper Out By Coin A" ) PORT_DIPLOCATION("DSW4:8") /* not checked */
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW5")
- PORT_DIPNAME( 0x01, 0x00, "Display Of Doll On Demo" ) PORT_DIPLOCATION("DSW5:1") /* not working */
+ PORT_DIPNAME( 0x01, 0x00, "Display Of Doll On Demo" ) PORT_DIPLOCATION("DSW5:1") /* not working */
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" ) PORT_DIPLOCATION("DSW5:2,3") /* not checked */
+ PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" ) PORT_DIPLOCATION("DSW5:2,3") /* not checked */
PORT_DIPSETTING( 0x06, "1,000" )
PORT_DIPSETTING( 0x04, "5,000" )
PORT_DIPSETTING( 0x02, "10,000" )
PORT_DIPSETTING( 0x00, "20,000" )
- PORT_DIPNAME( 0x18, 0x18, "Condition For 3 Kind Of Bonus" ) PORT_DIPLOCATION("DSW5:4,5") /* not checked */
+ PORT_DIPNAME( 0x18, 0x18, "Condition For 3 Kind Of Bonus" ) PORT_DIPLOCATION("DSW5:4,5") /* not checked */
PORT_DIPSETTING( 0x18, "12-7-1" )
PORT_DIPSETTING( 0x10, "9-5-1" )
PORT_DIPSETTING( 0x08, "6-3-1" )
PORT_DIPSETTING( 0x00, "3-2-1" )
- PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6") /* not checked */
+ PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6") /* not checked */
PORT_DIPSETTING( 0x20, DEF_STR( Low ) )
PORT_DIPSETTING( 0x00, DEF_STR( High ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:7") /* listed as unused */
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW5:7") /* listed as unused */
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, "Test Mode For Disp. Of Doll" ) PORT_DIPLOCATION("DSW5:8") /* not working */
+ PORT_DIPNAME( 0x80, 0x80, "Test Mode For Disp. Of Doll" ) PORT_DIPLOCATION("DSW5:8") /* not working */
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -802,22 +802,22 @@ void cb2001_state::palette_init()
static I8255A_INTERFACE( ppi8255_0_intf )
{
- DEVCB_INPUT_PORT("IN0"), /* Port A read */
- DEVCB_NULL, /* Port A write */
- DEVCB_INPUT_PORT("IN1"), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_INPUT_PORT("IN2"), /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_INPUT_PORT("IN0"), /* Port A read */
+ DEVCB_NULL, /* Port A write */
+ DEVCB_INPUT_PORT("IN1"), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_INPUT_PORT("IN2"), /* Port C read */
+ DEVCB_NULL /* Port C write */
};
static I8255A_INTERFACE( ppi8255_1_intf )
{
- DEVCB_INPUT_PORT("DSW1"), /* Port A read */
- DEVCB_NULL, /* Port A write */
- DEVCB_INPUT_PORT("DSW2"), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_INPUT_PORT("DSW3"), /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_INPUT_PORT("DSW1"), /* Port A read */
+ DEVCB_NULL, /* Port A write */
+ DEVCB_INPUT_PORT("DSW2"), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_INPUT_PORT("DSW3"), /* Port C read */
+ DEVCB_NULL /* Port C write */
};
static const ay8910_interface cb2001_ay8910_config =
diff --git a/src/mame/drivers/cbasebal.c b/src/mame/drivers/cbasebal.c
index b31fe854717..81edadf3164 100644
--- a/src/mame/drivers/cbasebal.c
+++ b/src/mame/drivers/cbasebal.c
@@ -14,7 +14,7 @@
#include "emu.h"
#include "cpu/z80/z80.h"
-#include "includes/cps1.h" // needed for decoding functions only
+#include "includes/cps1.h" // needed for decoding functions only
#include "includes/cbasebal.h"
#include "machine/eeprom.h"
#include "sound/okim6295.h"
@@ -47,7 +47,7 @@ READ8_MEMBER(cbasebal_state::bankedram_r)
switch (m_rambank)
{
case 2:
- return cbasebal_textram_r(space, offset); /* VRAM */
+ return cbasebal_textram_r(space, offset); /* VRAM */
case 1:
if (offset < 0x800)
return m_generic_paletteram_8[offset];
@@ -55,7 +55,7 @@ READ8_MEMBER(cbasebal_state::bankedram_r)
return 0;
break;
default:
- return cbasebal_scrollram_r(space, offset); /* SCROLL */
+ return cbasebal_scrollram_r(space, offset); /* SCROLL */
}
}
@@ -94,11 +94,11 @@ WRITE8_MEMBER(cbasebal_state::cbasebal_coinctrl_w)
static const eeprom_interface cbasebal_eeprom_intf =
{
- 6, /* address bits */
- 16, /* data bits */
- "0110", /* read command */
- "0101", /* write command */
- "0111" /* erase command */
+ 6, /* address bits */
+ 16, /* data bits */
+ "0110", /* read command */
+ "0101", /* write command */
+ "0111" /* erase command */
};
@@ -111,8 +111,8 @@ static const eeprom_interface cbasebal_eeprom_intf =
static ADDRESS_MAP_START( cbasebal_map, AS_PROGRAM, 8, cbasebal_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0xbfff) AM_ROMBANK("bank1")
- AM_RANGE(0xc000, 0xcfff) AM_READWRITE(bankedram_r, bankedram_w) AM_SHARE("paletteram") /* palette + vram + scrollram */
- AM_RANGE(0xe000, 0xfdff) AM_RAM /* work RAM */
+ AM_RANGE(0xc000, 0xcfff) AM_READWRITE(bankedram_r, bankedram_w) AM_SHARE("paletteram") /* palette + vram + scrollram */
+ AM_RANGE(0xe000, 0xfdff) AM_RAM /* work RAM */
AM_RANGE(0xfe00, 0xffff) AM_RAM AM_SHARE("spriteram")
ADDRESS_MAP_END
@@ -168,7 +168,7 @@ static INPUT_PORTS_START( cbasebal )
PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") /* ? */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen") /* ? */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("eeprom", eeprom_device, read_bit)
PORT_START( "IO_01" )
@@ -191,9 +191,9 @@ INPUT_PORTS_END
static const gfx_layout cbasebal_textlayout =
{
- 8,8, /* 8*8 characters */
- 4096, /* 4096 characters */
- 2, /* 2 bits per pixel */
+ 8,8, /* 8*8 characters */
+ 4096, /* 4096 characters */
+ 2, /* 2 bits per pixel */
{ 0, 4 },
{ 8+3, 8+2, 8+1, 8+0, 3, 2, 1, 0 },
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
@@ -202,9 +202,9 @@ static const gfx_layout cbasebal_textlayout =
static const gfx_layout cbasebal_tilelayout =
{
- 16,16, /* 16*16 tiles */
- 4096, /* 4096 tiles */
- 4, /* 4 bits per pixel */
+ 16,16, /* 16*16 tiles */
+ 4096, /* 4096 tiles */
+ 4, /* 4 bits per pixel */
{ 4096*64*8+4, 4096*64*8+0,4, 0 },
{ 0, 1, 2, 3, 8+0, 8+1, 8+2, 8+3,
16*16+0, 16*16+1, 16*16+2, 16*16+3, 16*16+8+0, 16*16+8+1, 16*16+8+2, 16*16+8+3 },
@@ -274,10 +274,10 @@ void cbasebal_state::machine_reset()
static MACHINE_CONFIG_START( cbasebal, cbasebal_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 6000000) /* ??? */
+ MCFG_CPU_ADD("maincpu", Z80, 6000000) /* ??? */
MCFG_CPU_PROGRAM_MAP(cbasebal_map)
MCFG_CPU_IO_MAP(cbasebal_portmap)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", cbasebal_state, irq0_line_hold) /* ??? */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", cbasebal_state, irq0_line_hold) /* ??? */
MCFG_EEPROM_ADD("eeprom", cbasebal_eeprom_intf)
@@ -323,21 +323,21 @@ ROM_START( cbasebal )
/* 0x70000-0x8ffff empty (space for 04) */
ROM_REGION( 0x10000, "gfx1", 0 )
- ROM_LOAD( "cbj13.16m", 0x00000, 0x10000, CRC(2359fa0a) SHA1(3a37532ea43dd4b150c53a240d35a57a9b76d23d) ) /* text */
+ ROM_LOAD( "cbj13.16m", 0x00000, 0x10000, CRC(2359fa0a) SHA1(3a37532ea43dd4b150c53a240d35a57a9b76d23d) ) /* text */
ROM_REGION( 0x80000, "gfx2", 0 )
- ROM_LOAD( "cbj02.1f", 0x00000, 0x20000, CRC(d6740535) SHA1(2ece885525718fd5fe52b8fa4c07930695b89659) ) /* tiles */
+ ROM_LOAD( "cbj02.1f", 0x00000, 0x20000, CRC(d6740535) SHA1(2ece885525718fd5fe52b8fa4c07930695b89659) ) /* tiles */
ROM_LOAD( "cbj03.2f", 0x20000, 0x20000, CRC(88098dcd) SHA1(caddebeea581129d6a62fc9f7f354d61eef175c7) )
ROM_LOAD( "cbj08.1j", 0x40000, 0x20000, CRC(5f3344bf) SHA1(1d3193078108e86e31bbfce15a8d2443cfbf2ff6) )
ROM_LOAD( "cbj09.2j", 0x60000, 0x20000, CRC(aafffdae) SHA1(26e76b55fff49811df8e5b1f165be20ec8dd196a) )
ROM_REGION( 0x80000, "gfx3", 0 )
- ROM_LOAD( "cbj11.1m", 0x00000, 0x20000, CRC(bdc1507d) SHA1(efeaf3066acfb7186d73ad8e5b291d6e61965de2) ) /* sprites */
+ ROM_LOAD( "cbj11.1m", 0x00000, 0x20000, CRC(bdc1507d) SHA1(efeaf3066acfb7186d73ad8e5b291d6e61965de2) ) /* sprites */
ROM_LOAD( "cbj12.2m", 0x20000, 0x20000, CRC(973f3efe) SHA1(d776499d5ac4bc23eb5d1f28b88447cc07d8ac99) )
ROM_LOAD( "cbj14.1n", 0x40000, 0x20000, CRC(765dabaa) SHA1(742d1c50b65f649f23eac7976fe26c2d7400e4e1) )
ROM_LOAD( "cbj15.2n", 0x60000, 0x20000, CRC(74756de5) SHA1(791d6620cdb563f0b3a717432aa4647981b0a10e) )
- ROM_REGION( 0x80000, "oki", 0 ) /* OKIM */
+ ROM_REGION( 0x80000, "oki", 0 ) /* OKIM */
ROM_LOAD( "cbj01.1e", 0x00000, 0x20000, CRC(1d8968bd) SHA1(813e475d1d0c343e7dad516f1fe564d00c9c27fb) )
ROM_END
diff --git a/src/mame/drivers/cbuster.c b/src/mame/drivers/cbuster.c
index 6552587fa47..a9250404f19 100644
--- a/src/mame/drivers/cbuster.c
+++ b/src/mame/drivers/cbuster.c
@@ -38,10 +38,10 @@ WRITE16_MEMBER(cbuster_state::twocrude_control_w)
case 6: /* IRQ ack */
return;
- case 2: /* Sound CPU write */
+ case 2: /* Sound CPU write */
soundlatch_byte_w(space, 0, data & 0xff);
m_audiocpu->set_input_line(0, HOLD_LINE);
- return;
+ return;
case 4: /* Protection, maybe this is a PAL on the board?
@@ -192,7 +192,7 @@ static INPUT_PORTS_START( twocrude )
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW1:8" ) /* Manual says OFF "Don't Change" */
+ PORT_DIPUNUSED_DIPLOC( 0x0080, 0x0080, "SW1:8" ) /* Manual says OFF "Don't Change" */
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x0100, "1" )
@@ -204,8 +204,8 @@ static INPUT_PORTS_START( twocrude )
PORT_DIPSETTING( 0x0800, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0400, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPUNUSED_DIPLOC( 0x1000, 0x1000, "SW2:5" ) /* Manual says OFF "Don't Change" */
- PORT_DIPUNUSED_DIPLOC( 0x2000, 0x2000, "SW2:6" ) /* Manual says OFF "Don't Change" */
+ PORT_DIPUNUSED_DIPLOC( 0x1000, 0x1000, "SW2:5" ) /* Manual says OFF "Don't Change" */
+ PORT_DIPUNUSED_DIPLOC( 0x2000, 0x2000, "SW2:6" ) /* Manual says OFF "Don't Change" */
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7")
PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
PORT_DIPSETTING( 0x4000, DEF_STR( Yes ) )
@@ -254,10 +254,10 @@ static const gfx_layout spritelayout =
};
static GFXDECODE_START( cbuster )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 0x500 ) /* Characters 8x8 */
- GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 0x500 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 0x500 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x100, 80 ) /* Sprites 16x16 */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 0x500 ) /* Characters 8x8 */
+ GFXDECODE_ENTRY( "gfx1", 0, tilelayout, 0, 0x500 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 0x500 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 0x100, 80 ) /* Sprites 16x16 */
GFXDECODE_END
/******************************************************************************/
@@ -271,9 +271,9 @@ static const deco16ic_interface twocrude_deco16ic_tilegen1_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0x00, 0x20, /* color base (default values) */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
twocrude_bank_callback,
twocrude_bank_callback,
0,1,
@@ -283,9 +283,9 @@ static const deco16ic_interface twocrude_deco16ic_tilegen2_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0x30, 0x40, /* color base (default values) */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
twocrude_bank_callback,
twocrude_bank_callback,
0,2,
@@ -365,7 +365,7 @@ ROM_START( cbuster )
ROM_LOAD16_BYTE( "fx03.rom", 0x40000, 0x20000, CRC(c3d65bf9) SHA1(99dd650fd4b427bca25a0776fbd6221f93504106) )
ROM_LOAD16_BYTE( "fx02.rom", 0x40001, 0x20000, CRC(b875266b) SHA1(a76f8e061392e17394a3f975584823ad39e0097e) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "fu11-.rom", 0x00000, 0x10000, CRC(65f20f10) SHA1(cf914893edd98a0f39bbf7068a469ed7d34bd90e) )
ROM_REGION( 0x100000, "gfx1", 0 )
@@ -386,14 +386,14 @@ ROM_START( cbuster )
ROM_LOAD( "fu09-.rom", 0x160000, 0x10000, CRC(526809ca) SHA1(2cb9e7417211c1eb23d32e3fee71c5254d34a3ff) )
ROM_LOAD( "fu10-.rom", 0x170000, 0x10000, CRC(6be6d50e) SHA1(b944db4b3a7c76190f6b40f71f033e16e7964f6a) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "fu12-.rom", 0x00000, 0x20000, CRC(2d1d65f2) SHA1(be3d57b9976ddf7ee6d20ee9e78fe826ee411d79) )
- ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "fu13-.rom", 0x00000, 0x20000, CRC(b8525622) SHA1(4a6ec5e3f64256b1383bfbab4167cbd2ec11b5c5) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
+ ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
ROM_END
ROM_START( cbusterw )
@@ -403,7 +403,7 @@ ROM_START( cbusterw )
ROM_LOAD16_BYTE( "fu03-.rom", 0x40000, 0x20000, CRC(def46956) SHA1(e1f71a440430f8f9351ee9e1826ca2d0d5a372f8) )
ROM_LOAD16_BYTE( "fu02-.rom", 0x40001, 0x20000, CRC(649c3338) SHA1(06373b364283706f0b00ab6d014c674e4b9818fa) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "fu11-.rom", 0x00000, 0x10000, CRC(65f20f10) SHA1(cf914893edd98a0f39bbf7068a469ed7d34bd90e) )
ROM_REGION( 0x100000, "gfx1", 0 )
@@ -424,14 +424,14 @@ ROM_START( cbusterw )
ROM_LOAD( "fu09-.rom", 0x160000, 0x10000, CRC(526809ca) SHA1(2cb9e7417211c1eb23d32e3fee71c5254d34a3ff) )
ROM_LOAD( "fu10-.rom", 0x170000, 0x10000, CRC(6be6d50e) SHA1(b944db4b3a7c76190f6b40f71f033e16e7964f6a) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "fu12-.rom", 0x00000, 0x20000, CRC(2d1d65f2) SHA1(be3d57b9976ddf7ee6d20ee9e78fe826ee411d79) )
- ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "fu13-.rom", 0x00000, 0x20000, CRC(b8525622) SHA1(4a6ec5e3f64256b1383bfbab4167cbd2ec11b5c5) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
+ ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
ROM_END
ROM_START( cbusterj )
@@ -441,7 +441,7 @@ ROM_START( cbusterj )
ROM_LOAD16_BYTE( "fr03", 0x40000, 0x20000, CRC(02c06118) SHA1(a251f936f80d8a9af033fe6d0d42e1e17ebbbf98) )
ROM_LOAD16_BYTE( "fr02", 0x40001, 0x20000, CRC(b6c34332) SHA1(c1215c72a03b368655e20f4557475a2fc4c46c9e) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "fu11-.rom", 0x00000, 0x10000, CRC(65f20f10) SHA1(cf914893edd98a0f39bbf7068a469ed7d34bd90e) )
ROM_REGION( 0x100000, "gfx1", 0 )
@@ -462,14 +462,14 @@ ROM_START( cbusterj )
ROM_LOAD( "fr09", 0x160000, 0x10000, CRC(f8363424) SHA1(6a6b143a3474965ef89f75e9d7b15946ae26d0d4) )
ROM_LOAD( "fr10", 0x170000, 0x10000, CRC(241d5760) SHA1(cd216ecf7e88939b91a6e0f02a23c8b875ac24dc) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "fu12-.rom", 0x00000, 0x20000, CRC(2d1d65f2) SHA1(be3d57b9976ddf7ee6d20ee9e78fe826ee411d79) )
- ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "fu13-.rom", 0x00000, 0x20000, CRC(b8525622) SHA1(4a6ec5e3f64256b1383bfbab4167cbd2ec11b5c5) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
+ ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
ROM_END
ROM_START( twocrude )
@@ -479,7 +479,7 @@ ROM_START( twocrude )
ROM_LOAD16_BYTE( "ft03", 0x40000, 0x20000, CRC(28002c99) SHA1(6397b05a1a237bb17657bee6c8185f61c60c6a2c) )
ROM_LOAD16_BYTE( "ft02", 0x40001, 0x20000, CRC(37ea0626) SHA1(ec1822eda83829c599cad217b6d5dd34fb970101) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "fu11-.rom", 0x00000, 0x10000, CRC(65f20f10) SHA1(cf914893edd98a0f39bbf7068a469ed7d34bd90e) )
ROM_REGION( 0x100000, "gfx1", 0 )
@@ -500,14 +500,14 @@ ROM_START( twocrude )
ROM_LOAD( "ft09", 0x160000, 0x10000, CRC(6e3657b9) SHA1(7e6a140e33f9bc18e35c255680eebe152a5d8858) )
ROM_LOAD( "ft10", 0x170000, 0x10000, CRC(cdb83560) SHA1(8b258c4436ccea5a74edff1b6219ab7a5eac0328) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "fu12-.rom", 0x00000, 0x20000, CRC(2d1d65f2) SHA1(be3d57b9976ddf7ee6d20ee9e78fe826ee411d79) )
- ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "fu13-.rom", 0x00000, 0x20000, CRC(b8525622) SHA1(4a6ec5e3f64256b1383bfbab4167cbd2ec11b5c5) )
ROM_REGION( 0x0100, "proms", 0 )
- ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
+ ROM_LOAD( "mb7114h.18e", 0x0000, 0x0100, CRC(3645b70f) SHA1(7d3831867362037892b43efb007e27d3bd5f6488) ) /* Priority (not used) */
ROM_END
/******************************************************************************/
diff --git a/src/mame/drivers/ccastles.c b/src/mame/drivers/ccastles.c
index 9c646c6ef10..5ccd0e8970f 100644
--- a/src/mame/drivers/ccastles.c
+++ b/src/mame/drivers/ccastles.c
@@ -125,11 +125,11 @@
#include "includes/ccastles.h"
-#define MASTER_CLOCK (10000000)
+#define MASTER_CLOCK (10000000)
-#define PIXEL_CLOCK (MASTER_CLOCK/2)
-#define HTOTAL (320)
-#define VTOTAL (256)
+#define PIXEL_CLOCK (MASTER_CLOCK/2)
+#define HTOTAL (320)
+#define VTOTAL (256)
@@ -356,17 +356,17 @@ ADDRESS_MAP_END
*************************************/
static INPUT_PORTS_START( ccastles )
- PORT_START("IN0") /* IN0 */
+ PORT_START("IN0") /* IN0 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_TILT )
PORT_SERVICE( 0x10, IP_ACTIVE_LOW )
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, ccastles_state,get_vblank, NULL)
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* 1p Jump, non-cocktail start1 */
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) /* 2p Jump, non-cocktail start2 */
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* 1p Jump, non-cocktail start1 */
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) /* 2p Jump, non-cocktail start2 */
- PORT_START("IN1") /* IN1 */
+ PORT_START("IN1") /* IN1 */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -376,8 +376,8 @@ static INPUT_PORTS_START( ccastles )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) /* cocktail only */
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) /* cocktail only */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 ) /* cocktail only */
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) /* cocktail only */
PORT_DIPNAME( 0x20, 0x00, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x20, DEF_STR( Cocktail ) )
@@ -482,7 +482,7 @@ static MACHINE_CONFIG_START( ccastles, ccastles_state )
MCFG_PALETTE_LENGTH(32)
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, 0, HTOTAL - 1, VTOTAL, 0, VTOTAL - 1) /* will be adjusted later */
+ MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, HTOTAL, 0, HTOTAL - 1, VTOTAL, 0, VTOTAL - 1) /* will be adjusted later */
MCFG_SCREEN_UPDATE_DRIVER(ccastles_state, screen_update_ccastles)
diff --git a/src/mame/drivers/cchance.c b/src/mame/drivers/cchance.c
index dce58768901..5161434c7b9 100644
--- a/src/mame/drivers/cchance.c
+++ b/src/mame/drivers/cchance.c
@@ -88,7 +88,7 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, cchance_state )
AM_RANGE(0xe000, 0xe2ff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spriteylow_r8, spriteylow_w8)
AM_RANGE(0xe300, 0xe303) AM_RAM AM_MIRROR(0xfc) AM_DEVWRITE_LEGACY("spritegen", spritectrl_w8) /* control registers (0x80 mirror used by Arkanoid 2) */
- AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */
+ AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */
AM_RANGE(0xf000, 0xf000) AM_READNOP AM_WRITENOP //???
AM_RANGE(0xf001, 0xf001) AM_READ(input_1_r) AM_WRITE(output_0_w)
@@ -219,7 +219,7 @@ MACHINE_RESET_MEMBER(cchance_state,cchance)
static MACHINE_CONFIG_START( cchance, cchance_state )
- MCFG_CPU_ADD("maincpu", Z80,4000000) /* ? MHz */
+ MCFG_CPU_ADD("maincpu", Z80,4000000) /* ? MHz */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cchance_state, irq0_line_hold)
@@ -259,7 +259,7 @@ ROM_START( cchance )
ROM_LOAD("chance-cccha2.bin", 0x10000, 0x10000, CRC(fa5ccf5b) SHA1(21957a6a7b88c315d1fbb82e98a924a637a28397) )
ROM_LOAD("chance-cccha3.bin", 0x00000, 0x10000, CRC(2a2979c9) SHA1(5036313e219ec561fa6753f0db6bb28c6fc97963) )
- ROM_REGION( 0x0400, "proms", 0 ) /* color proms */
+ ROM_REGION( 0x0400, "proms", 0 ) /* color proms */
ROM_LOAD( "prom1", 0x0000, 0x0200, NO_DUMP )
ROM_LOAD( "prom2", 0x0200, 0x0200, NO_DUMP )
ROM_END
diff --git a/src/mame/drivers/cchasm.c b/src/mame/drivers/cchasm.c
index a6ac9580593..6475d3c01da 100644
--- a/src/mame/drivers/cchasm.c
+++ b/src/mame/drivers/cchasm.c
@@ -156,10 +156,10 @@ static const z80_daisy_config daisy_chain[] =
static MACHINE_CONFIG_START( cchasm, cchasm_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M68000,CCHASM_68K_CLOCK) /* 8 MHz (from schematics) */
+ MCFG_CPU_ADD("maincpu", M68000,CCHASM_68K_CLOCK) /* 8 MHz (from schematics) */
MCFG_CPU_PROGRAM_MAP(memmap)
- MCFG_CPU_ADD("audiocpu", Z80,3584229) /* 3.58 MHz (from schematics) */
+ MCFG_CPU_ADD("audiocpu", Z80,3584229) /* 3.58 MHz (from schematics) */
MCFG_CPU_CONFIG(daisy_chain)
MCFG_CPU_PROGRAM_MAP(sound_memmap)
MCFG_CPU_IO_MAP(sound_portmap)
@@ -205,22 +205,22 @@ MACHINE_CONFIG_END
ROM_START( cchasm )
ROM_REGION( 0x010000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "chasm.u4", 0x000000, 0x001000, CRC(19244f25) SHA1(79deaae82da8d1b16d05bbac43ba900c4b1d9f26) )
- ROM_LOAD16_BYTE( "chasm.u12", 0x000001, 0x001000, CRC(5d702c7d) SHA1(cbdceed45a1112594fbcbeb6976edc932b32d518) )
- ROM_LOAD16_BYTE( "chasm.u8", 0x002000, 0x001000, CRC(56a7ce8a) SHA1(14c790dcddb78d3b81b5a65fe3529e42c9708273) )
- ROM_LOAD16_BYTE( "chasm.u16", 0x002001, 0x001000, CRC(2e192db0) SHA1(1a8ff983295ab52b5099c089b3142cdc56d28aee) )
- ROM_LOAD16_BYTE( "chasm.u3", 0x004000, 0x001000, CRC(9c71c600) SHA1(900526eaff7483fc478ebfb3f14796ff8fd1d01f) )
- ROM_LOAD16_BYTE( "chasm.u11", 0x004001, 0x001000, CRC(a4eb59a5) SHA1(a7bb3ca8f1f000f224def6342ca9d1eabcb210e6) )
- ROM_LOAD16_BYTE( "chasm.u7", 0x006000, 0x001000, CRC(8308dd6e) SHA1(82ad7c27e9a41af5280ecd975d3530ff2ed27ad4) )
- ROM_LOAD16_BYTE( "chasm.u15", 0x006001, 0x001000, CRC(9d3abf97) SHA1(476d684182d92d66263df82e1b5c4ff24b6814e8) )
- ROM_LOAD16_BYTE( "u2", 0x008000, 0x001000, CRC(4e076ae7) SHA1(a72f5425b256785b810ee5f23917b44f778cfcd3) )
- ROM_LOAD16_BYTE( "u10", 0x008001, 0x001000, CRC(cc9e19ca) SHA1(6c46ec265c2cc0683470ed1df978b96b577c5ca1) )
- ROM_LOAD16_BYTE( "chasm.u6", 0x00a000, 0x001000, CRC(a96525d2) SHA1(1c41bc3bf051cf1830182cbde6fba4e56db7e431) )
- ROM_LOAD16_BYTE( "chasm.u14", 0x00a001, 0x001000, CRC(8e426628) SHA1(2d70a7717b18cc892332b9d5d2de3ceba6c1481d) )
- ROM_LOAD16_BYTE( "u1", 0x00c000, 0x001000, CRC(88b71027) SHA1(49fa676d7838c643d642fbc70579ce29e76ba724) )
- ROM_LOAD16_BYTE( "chasm.u9", 0x00c001, 0x001000, CRC(d90c9773) SHA1(4033f0579f0782db2157f6cbece53b0d74e61d4f) )
- ROM_LOAD16_BYTE( "chasm.u5", 0x00e000, 0x001000, CRC(e4a58b7d) SHA1(0e5f948cd110804e6119fafb4e3fa5904dd1390f) )
- ROM_LOAD16_BYTE( "chasm.u13", 0x00e001, 0x001000, CRC(877e849c) SHA1(bdeb97fcb7488e7f0866dd651204c362d2ec9f4f) )
+ ROM_LOAD16_BYTE( "chasm.u4", 0x000000, 0x001000, CRC(19244f25) SHA1(79deaae82da8d1b16d05bbac43ba900c4b1d9f26) )
+ ROM_LOAD16_BYTE( "chasm.u12", 0x000001, 0x001000, CRC(5d702c7d) SHA1(cbdceed45a1112594fbcbeb6976edc932b32d518) )
+ ROM_LOAD16_BYTE( "chasm.u8", 0x002000, 0x001000, CRC(56a7ce8a) SHA1(14c790dcddb78d3b81b5a65fe3529e42c9708273) )
+ ROM_LOAD16_BYTE( "chasm.u16", 0x002001, 0x001000, CRC(2e192db0) SHA1(1a8ff983295ab52b5099c089b3142cdc56d28aee) )
+ ROM_LOAD16_BYTE( "chasm.u3", 0x004000, 0x001000, CRC(9c71c600) SHA1(900526eaff7483fc478ebfb3f14796ff8fd1d01f) )
+ ROM_LOAD16_BYTE( "chasm.u11", 0x004001, 0x001000, CRC(a4eb59a5) SHA1(a7bb3ca8f1f000f224def6342ca9d1eabcb210e6) )
+ ROM_LOAD16_BYTE( "chasm.u7", 0x006000, 0x001000, CRC(8308dd6e) SHA1(82ad7c27e9a41af5280ecd975d3530ff2ed27ad4) )
+ ROM_LOAD16_BYTE( "chasm.u15", 0x006001, 0x001000, CRC(9d3abf97) SHA1(476d684182d92d66263df82e1b5c4ff24b6814e8) )
+ ROM_LOAD16_BYTE( "u2", 0x008000, 0x001000, CRC(4e076ae7) SHA1(a72f5425b256785b810ee5f23917b44f778cfcd3) )
+ ROM_LOAD16_BYTE( "u10", 0x008001, 0x001000, CRC(cc9e19ca) SHA1(6c46ec265c2cc0683470ed1df978b96b577c5ca1) )
+ ROM_LOAD16_BYTE( "chasm.u6", 0x00a000, 0x001000, CRC(a96525d2) SHA1(1c41bc3bf051cf1830182cbde6fba4e56db7e431) )
+ ROM_LOAD16_BYTE( "chasm.u14", 0x00a001, 0x001000, CRC(8e426628) SHA1(2d70a7717b18cc892332b9d5d2de3ceba6c1481d) )
+ ROM_LOAD16_BYTE( "u1", 0x00c000, 0x001000, CRC(88b71027) SHA1(49fa676d7838c643d642fbc70579ce29e76ba724) )
+ ROM_LOAD16_BYTE( "chasm.u9", 0x00c001, 0x001000, CRC(d90c9773) SHA1(4033f0579f0782db2157f6cbece53b0d74e61d4f) )
+ ROM_LOAD16_BYTE( "chasm.u5", 0x00e000, 0x001000, CRC(e4a58b7d) SHA1(0e5f948cd110804e6119fafb4e3fa5904dd1390f) )
+ ROM_LOAD16_BYTE( "chasm.u13", 0x00e001, 0x001000, CRC(877e849c) SHA1(bdeb97fcb7488e7f0866dd651204c362d2ec9f4f) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "2732.bin", 0x0000, 0x1000, CRC(715adc4a) SHA1(426be4f3334ef7f2e8eb4d533e64276c30812aa3) )
@@ -232,22 +232,22 @@ ROM_END
ROM_START( cchasm1 )
ROM_REGION( 0x010000, "maincpu", 0 )
- ROM_LOAD16_BYTE( "chasm.u4", 0x000000, 0x001000, CRC(19244f25) SHA1(79deaae82da8d1b16d05bbac43ba900c4b1d9f26) )
- ROM_LOAD16_BYTE( "chasm.u12", 0x000001, 0x001000, CRC(5d702c7d) SHA1(cbdceed45a1112594fbcbeb6976edc932b32d518) )
- ROM_LOAD16_BYTE( "chasm.u8", 0x002000, 0x001000, CRC(56a7ce8a) SHA1(14c790dcddb78d3b81b5a65fe3529e42c9708273) )
- ROM_LOAD16_BYTE( "chasm.u16", 0x002001, 0x001000, CRC(2e192db0) SHA1(1a8ff983295ab52b5099c089b3142cdc56d28aee) )
- ROM_LOAD16_BYTE( "chasm.u3", 0x004000, 0x001000, CRC(9c71c600) SHA1(900526eaff7483fc478ebfb3f14796ff8fd1d01f) )
- ROM_LOAD16_BYTE( "chasm.u11", 0x004001, 0x001000, CRC(a4eb59a5) SHA1(a7bb3ca8f1f000f224def6342ca9d1eabcb210e6) )
- ROM_LOAD16_BYTE( "chasm.u7", 0x006000, 0x001000, CRC(8308dd6e) SHA1(82ad7c27e9a41af5280ecd975d3530ff2ed27ad4) )
- ROM_LOAD16_BYTE( "chasm.u15", 0x006001, 0x001000, CRC(9d3abf97) SHA1(476d684182d92d66263df82e1b5c4ff24b6814e8) )
- ROM_LOAD16_BYTE( "chasm.u2", 0x008000, 0x001000, CRC(008b26ef) SHA1(6758d77bf48f466b8692bf7c678a597792d8cfdb) )
- ROM_LOAD16_BYTE( "chasm.u10", 0x008001, 0x001000, CRC(c2c532a3) SHA1(d29d40d42a2f69de0b1e2ee6a32633468a94fd85) )
- ROM_LOAD16_BYTE( "chasm.u6", 0x00a000, 0x001000, CRC(a96525d2) SHA1(1c41bc3bf051cf1830182cbde6fba4e56db7e431) )
- ROM_LOAD16_BYTE( "chasm.u14", 0x00a001, 0x001000, CRC(8e426628) SHA1(2d70a7717b18cc892332b9d5d2de3ceba6c1481d) )
- ROM_LOAD16_BYTE( "chasm.u1", 0x00c000, 0x001000, CRC(e02293f8) SHA1(136757b3c9e0ebfde6c13c57ac52f5fdbf5fd65b) )
- ROM_LOAD16_BYTE( "chasm.u9", 0x00c001, 0x001000, CRC(d90c9773) SHA1(4033f0579f0782db2157f6cbece53b0d74e61d4f) )
- ROM_LOAD16_BYTE( "chasm.u5", 0x00e000, 0x001000, CRC(e4a58b7d) SHA1(0e5f948cd110804e6119fafb4e3fa5904dd1390f) )
- ROM_LOAD16_BYTE( "chasm.u13", 0x00e001, 0x001000, CRC(877e849c) SHA1(bdeb97fcb7488e7f0866dd651204c362d2ec9f4f) )
+ ROM_LOAD16_BYTE( "chasm.u4", 0x000000, 0x001000, CRC(19244f25) SHA1(79deaae82da8d1b16d05bbac43ba900c4b1d9f26) )
+ ROM_LOAD16_BYTE( "chasm.u12", 0x000001, 0x001000, CRC(5d702c7d) SHA1(cbdceed45a1112594fbcbeb6976edc932b32d518) )
+ ROM_LOAD16_BYTE( "chasm.u8", 0x002000, 0x001000, CRC(56a7ce8a) SHA1(14c790dcddb78d3b81b5a65fe3529e42c9708273) )
+ ROM_LOAD16_BYTE( "chasm.u16", 0x002001, 0x001000, CRC(2e192db0) SHA1(1a8ff983295ab52b5099c089b3142cdc56d28aee) )
+ ROM_LOAD16_BYTE( "chasm.u3", 0x004000, 0x001000, CRC(9c71c600) SHA1(900526eaff7483fc478ebfb3f14796ff8fd1d01f) )
+ ROM_LOAD16_BYTE( "chasm.u11", 0x004001, 0x001000, CRC(a4eb59a5) SHA1(a7bb3ca8f1f000f224def6342ca9d1eabcb210e6) )
+ ROM_LOAD16_BYTE( "chasm.u7", 0x006000, 0x001000, CRC(8308dd6e) SHA1(82ad7c27e9a41af5280ecd975d3530ff2ed27ad4) )
+ ROM_LOAD16_BYTE( "chasm.u15", 0x006001, 0x001000, CRC(9d3abf97) SHA1(476d684182d92d66263df82e1b5c4ff24b6814e8) )
+ ROM_LOAD16_BYTE( "chasm.u2", 0x008000, 0x001000, CRC(008b26ef) SHA1(6758d77bf48f466b8692bf7c678a597792d8cfdb) )
+ ROM_LOAD16_BYTE( "chasm.u10", 0x008001, 0x001000, CRC(c2c532a3) SHA1(d29d40d42a2f69de0b1e2ee6a32633468a94fd85) )
+ ROM_LOAD16_BYTE( "chasm.u6", 0x00a000, 0x001000, CRC(a96525d2) SHA1(1c41bc3bf051cf1830182cbde6fba4e56db7e431) )
+ ROM_LOAD16_BYTE( "chasm.u14", 0x00a001, 0x001000, CRC(8e426628) SHA1(2d70a7717b18cc892332b9d5d2de3ceba6c1481d) )
+ ROM_LOAD16_BYTE( "chasm.u1", 0x00c000, 0x001000, CRC(e02293f8) SHA1(136757b3c9e0ebfde6c13c57ac52f5fdbf5fd65b) )
+ ROM_LOAD16_BYTE( "chasm.u9", 0x00c001, 0x001000, CRC(d90c9773) SHA1(4033f0579f0782db2157f6cbece53b0d74e61d4f) )
+ ROM_LOAD16_BYTE( "chasm.u5", 0x00e000, 0x001000, CRC(e4a58b7d) SHA1(0e5f948cd110804e6119fafb4e3fa5904dd1390f) )
+ ROM_LOAD16_BYTE( "chasm.u13", 0x00e001, 0x001000, CRC(877e849c) SHA1(bdeb97fcb7488e7f0866dd651204c362d2ec9f4f) )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "2732.bin", 0x0000, 0x1000, CRC(715adc4a) SHA1(426be4f3334ef7f2e8eb4d533e64276c30812aa3) )
diff --git a/src/mame/drivers/cclimber.c b/src/mame/drivers/cclimber.c
index 37d99a19ad3..e9a85fe84f6 100644
--- a/src/mame/drivers/cclimber.c
+++ b/src/mame/drivers/cclimber.c
@@ -211,7 +211,7 @@ Dip location verified from manual for: cclimber, guzzler, swimmer
#include "includes/cclimber.h"
-#define MASTER_CLOCK XTAL_18_432MHz
+#define MASTER_CLOCK XTAL_18_432MHz
WRITE8_MEMBER(cclimber_state::swimmer_sh_soundlatch_w)
@@ -273,10 +273,10 @@ WRITE8_MEMBER(cclimber_state::nmi_mask_w)
static ADDRESS_MAP_START( cclimber_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x0000, 0x5fff) AM_ROM
- AM_RANGE(0x6000, 0x6bff) AM_RAM /* Crazy Kong only */
+ AM_RANGE(0x6000, 0x6bff) AM_RAM /* Crazy Kong only */
AM_RANGE(0x8000, 0x83ff) AM_RAM
AM_RANGE(0x8800, 0x88ff) AM_RAM AM_SHARE("bigspriteram")
- AM_RANGE(0x8900, 0x8bff) AM_RAM /* not used, but initialized */
+ AM_RANGE(0x8900, 0x8bff) AM_RAM /* not used, but initialized */
AM_RANGE(0x9000, 0x93ff) AM_MIRROR(0x0400) AM_RAM AM_SHARE("videoram")
/* 9800-9bff and 9c00-9fff share the same RAM, interleaved */
/* (9800-981f for scroll, 9c20-9c3f for color RAM, and so on) */
@@ -295,7 +295,7 @@ static ADDRESS_MAP_START( cclimber_map, AS_PROGRAM, 8, cclimber_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( cannonb_map, AS_PROGRAM, 8, cclimber_state )
- AM_RANGE(0x5045, 0x505f) AM_WRITENOP /* do not errorlog this */
+ AM_RANGE(0x5045, 0x505f) AM_WRITENOP /* do not errorlog this */
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x6bff) AM_RAM
AM_RANGE(0x8000, 0x83ff) AM_RAM
@@ -334,8 +334,8 @@ static ADDRESS_MAP_START( swimmer_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW1")
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("DSW2") AM_WRITEONLY AM_SHARE("bgcolor")
AM_RANGE(0xb880, 0xb880) AM_READ_PORT("SYSTEM")
- AM_RANGE(0xc000, 0xc7ff) AM_RAM /* ??? used by Guzzler */
- AM_RANGE(0xe000, 0xffff) AM_ROM /* Guzzler only */
+ AM_RANGE(0xc000, 0xc7ff) AM_RAM /* ??? used by Guzzler */
+ AM_RANGE(0xe000, 0xffff) AM_ROM /* Guzzler only */
ADDRESS_MAP_END
static ADDRESS_MAP_START( yamato_map, AS_PROGRAM, 8, cclimber_state )
@@ -343,7 +343,7 @@ static ADDRESS_MAP_START( yamato_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x6000, 0x6fff) AM_RAM
AM_RANGE(0x7000, 0x7fff) AM_ROM
AM_RANGE(0x8800, 0x88ff) AM_RAM AM_SHARE("bigspriteram")
- AM_RANGE(0x8900, 0x8bff) AM_RAM /* not used, but initialized */
+ AM_RANGE(0x8900, 0x8bff) AM_RAM /* not used, but initialized */
AM_RANGE(0x9000, 0x93ff) AM_MIRROR(0x0400) AM_RAM AM_SHARE("videoram")
/* 9800-9bff and 9c00-9fff share the same RAM, interleaved */
/* (9800-981f for scroll, 9c20-9c3f for color RAM, and so on) */
@@ -357,7 +357,7 @@ static ADDRESS_MAP_START( yamato_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P2")
AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
AM_RANGE(0xb800, 0xb800) AM_READ_PORT("COIN")
- AM_RANGE(0xba00, 0xba00) AM_READ_PORT("START") /* maybe a mirror of b800 */
+ AM_RANGE(0xba00, 0xba00) AM_READ_PORT("START") /* maybe a mirror of b800 */
ADDRESS_MAP_END
static ADDRESS_MAP_START( toprollr_map, AS_PROGRAM, 8, cclimber_state )
@@ -390,8 +390,8 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( yamato_portmap, AS_IO, 8, cclimber_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x00, 0x00) AM_WRITE(yamato_p0_w) /* ??? */
- AM_RANGE(0x01, 0x01) AM_WRITE(yamato_p1_w) /* ??? */
+ AM_RANGE(0x00, 0x00) AM_WRITE(yamato_p0_w) /* ??? */
+ AM_RANGE(0x01, 0x01) AM_WRITE(yamato_p1_w) /* ??? */
ADDRESS_MAP_END
@@ -399,7 +399,7 @@ static ADDRESS_MAP_START( swimmer_audio_map, AS_PROGRAM, 8, cclimber_state )
AM_RANGE(0x0000, 0x0fff) AM_ROM
AM_RANGE(0x2000, 0x23ff) AM_RAM
AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_byte_r)
- AM_RANGE(0x4000, 0x4001) AM_RAM /* ??? */
+ AM_RANGE(0x4000, 0x4001) AM_RAM /* ??? */
ADDRESS_MAP_END
static ADDRESS_MAP_START( yamato_audio_map, AS_PROGRAM, 8, cclimber_state )
@@ -418,8 +418,8 @@ static ADDRESS_MAP_START( yamato_audio_portmap, AS_IO, 8, cclimber_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
AM_RANGE(0x00, 0x01) AM_DEVWRITE_LEGACY("ay1", ay8910_address_data_w)
AM_RANGE(0x02, 0x03) AM_DEVWRITE_LEGACY("ay2", ay8910_address_data_w)
- AM_RANGE(0x04, 0x04) AM_READ(yamato_p0_r) /* ??? */
- AM_RANGE(0x08, 0x08) AM_READ(yamato_p1_r) /* ??? */
+ AM_RANGE(0x04, 0x04) AM_READ(yamato_p0_r) /* ??? */
+ AM_RANGE(0x08, 0x08) AM_READ(yamato_p1_r) /* ??? */
ADDRESS_MAP_END
@@ -450,7 +450,7 @@ static INPUT_PORTS_START( cclimber )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
PORT_DIPSETTING( 0x03, "6" )
- PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW:!3" ) // Look code at 0x03c4 : 0x8076 is never tested !
+ PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW:!3" ) // Look code at 0x03c4 : 0x8076 is never tested !
PORT_DIPNAME( 0x08, 0x00, "Rack Test (Cheat)" ) PORT_CODE(KEYCODE_F1) PORT_DIPLOCATION("SW:!4")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
@@ -459,11 +459,11 @@ static INPUT_PORTS_START( cclimber )
PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW:!7,!8") // Also "Bonus Life" due to code at 0x03d4
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) // Bonus life : 30000 points
- PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) // Bonus life : 50000 points
- PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) ) // Bonus life : 30000 points
- PORT_DIPSETTING( 0xc0, DEF_STR( Free_Play ) ) // Bonus life : 50000 points
+ PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW:!7,!8") // Also "Bonus Life" due to code at 0x03d4
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) // Bonus life : 30000 points
+ PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) // Bonus life : 50000 points
+ PORT_DIPSETTING( 0x80, DEF_STR( 1C_3C ) ) // Bonus life : 30000 points
+ PORT_DIPSETTING( 0xc0, DEF_STR( Free_Play ) ) // Bonus life : 50000 points
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
@@ -582,13 +582,13 @@ static INPUT_PORTS_START( cannonb )
INPUT_PORTS_END
static INPUT_PORTS_START( rpatrol )
- PORT_START("P1") /* P2 controls but we use cclimber tags */
+ PORT_START("P1") /* P2 controls but we use cclimber tags */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x3e, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
- PORT_START("P2") /* P1 controls but we use cclimber tags */
+ PORT_START("P2") /* P1 controls but we use cclimber tags */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 )
PORT_BIT( 0x3e, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_2WAY
@@ -676,8 +676,8 @@ static INPUT_PORTS_START( swimmer )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW B:!3,!4")
- PORT_DIPSETTING( 0x00, DEF_STR( Easy ) ) // labeled this way for similarities with 'swimmerb'
- PORT_DIPSETTING( 0x40, DEF_STR( Hard ) ) // labeled this way for similarities with 'swimmerb'
+ PORT_DIPSETTING( 0x00, DEF_STR( Easy ) ) // labeled this way for similarities with 'swimmerb'
+ PORT_DIPSETTING( 0x40, DEF_STR( Hard ) ) // labeled this way for similarities with 'swimmerb'
PORT_DIPSETTING( 0x80, DEF_STR( Harder ) )
PORT_DIPSETTING( 0xc0, DEF_STR( Hardest ) )
@@ -695,7 +695,7 @@ static INPUT_PORTS_START( swimmerb )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW B:!3")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) // SW B:!4
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) // SW B:!4
INPUT_PORTS_END
static INPUT_PORTS_START( guzzler )
@@ -806,11 +806,11 @@ static INPUT_PORTS_START( yamato )
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
PORT_START("COIN")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 ) /* set 1 only */
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 ) /* set 1 only */
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN3 ) /* set 1 only */
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN3 ) /* set 1 only */
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
@@ -930,7 +930,7 @@ static const gfx_layout swimmer_charlayout =
RGN_FRAC(1,3),
3,
{ 0, RGN_FRAC(1,3), RGN_FRAC(2,3) },
- { 0, 1, 2, 3, 4, 5, 6, 7 }, /* characters are upside down */
+ { 0, 1, 2, 3, 4, 5, 6, 7 }, /* characters are upside down */
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
8*8 /* every char takes 8 consecutive bytes */
};
@@ -983,7 +983,7 @@ INTERRUPT_GEN_MEMBER(cclimber_state::vblank_irq)
static MACHINE_CONFIG_START( root, cclimber_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/3/2) /* 3.072 MHz */
+ MCFG_CPU_ADD("maincpu", Z80, MASTER_CLOCK/3/2) /* 3.072 MHz */
MCFG_CPU_PROGRAM_MAP(cclimber_map)
MCFG_CPU_IO_MAP(cclimber_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cclimber_state, vblank_irq)
@@ -1079,18 +1079,18 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( swimmer, cclimber_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/6) /* verified on pcb */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/6) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(swimmer_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cclimber_state, vblank_irq)
- MCFG_CPU_ADD("audiocpu", Z80,XTAL_4MHz/2) /* verified on pcb */
+ MCFG_CPU_ADD("audiocpu", Z80,XTAL_4MHz/2) /* verified on pcb */
MCFG_CPU_PROGRAM_MAP(swimmer_audio_map)
MCFG_CPU_IO_MAP(swimmer_audio_portmap)
MCFG_CPU_PERIODIC_INT_DRIVER(cclimber_state, nmi_line_pulse, (double)4000000/16384) /* IRQs are triggered by the main CPU */
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60.57) /* verified on pcb */
+ MCFG_SCREEN_REFRESH_RATE(60.57) /* verified on pcb */
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE(32*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
@@ -1104,10 +1104,10 @@ static MACHINE_CONFIG_START( swimmer, cclimber_state )
/* audio hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay1", AY8910, XTAL_4MHz/2) /* verified on pcb */
+ MCFG_SOUND_ADD("ay1", AY8910, XTAL_4MHz/2) /* verified on pcb */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
- MCFG_SOUND_ADD("ay2", AY8910, XTAL_4MHz/2) /* verified on pcb */
+ MCFG_SOUND_ADD("ay2", AY8910, XTAL_4MHz/2) /* verified on pcb */
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
MACHINE_CONFIG_END
@@ -1145,7 +1145,7 @@ ROM_START( cclimber )
ROM_LOAD( "cclimber.pr2", 0x0020, 0x0020, CRC(ab1940fa) SHA1(8d98e05cbaa6f55770c12e0a9a8ed9c73cc54423) )
ROM_LOAD( "cclimber.pr3", 0x0040, 0x0020, CRC(71317756) SHA1(1195f0a037e379cc1a3c0314cb746f5cd2bffe50) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13", 0x0000, 0x1000, CRC(e0042f75) SHA1(86cb31b110742a0f7ae33052c88f42d00deb5468) )
ROM_LOAD( "cc12", 0x1000, 0x1000, CRC(5da13aaa) SHA1(b2d41e69435d09c456648a10e33f5e1fbb0bc64c) )
ROM_END
@@ -1177,7 +1177,7 @@ ROM_START( cclimberj )
ROM_LOAD( "cclimber.pr2", 0x0020, 0x0020, CRC(ab1940fa) SHA1(8d98e05cbaa6f55770c12e0a9a8ed9c73cc54423) )
ROM_LOAD( "cclimber.pr3", 0x0040, 0x0020, CRC(71317756) SHA1(1195f0a037e379cc1a3c0314cb746f5cd2bffe50) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13j.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "cc12j.bin", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1208,9 +1208,9 @@ ROM_START( ccboot )
ROM_LOAD( "cclimber.pr1", 0x0000, 0x0020, CRC(751c3325) SHA1(edce2bc883996c1d72dc6c1c9f62799b162d415a) )
ROM_LOAD( "cclimber.pr2", 0x0020, 0x0020, CRC(ab1940fa) SHA1(8d98e05cbaa6f55770c12e0a9a8ed9c73cc54423) )
ROM_LOAD( "cclimber.pr3", 0x0040, 0x0020, CRC(71317756) SHA1(1195f0a037e379cc1a3c0314cb746f5cd2bffe50) )
- ROM_LOAD( "ccboot.prm", 0x0060, 0x0100, CRC(9e11550d) SHA1(b8cba8e16e10e23fba1f11551102ab77b680bdf0) ) /* decryption table (not used) */
+ ROM_LOAD( "ccboot.prm", 0x0060, 0x0100, CRC(9e11550d) SHA1(b8cba8e16e10e23fba1f11551102ab77b680bdf0) ) /* decryption table (not used) */
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13j.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "cc12j.bin", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1241,9 +1241,9 @@ ROM_START( ccboot2 )
ROM_LOAD( "cclimber.pr1", 0x0000, 0x0020, CRC(751c3325) SHA1(edce2bc883996c1d72dc6c1c9f62799b162d415a) )
ROM_LOAD( "cclimber.pr2", 0x0020, 0x0020, CRC(ab1940fa) SHA1(8d98e05cbaa6f55770c12e0a9a8ed9c73cc54423) )
ROM_LOAD( "cclimber.pr3", 0x0040, 0x0020, CRC(71317756) SHA1(1195f0a037e379cc1a3c0314cb746f5cd2bffe50) )
- ROM_LOAD( "ccboot.prm", 0x0060, 0x0100, CRC(9e11550d) SHA1(b8cba8e16e10e23fba1f11551102ab77b680bdf0) ) /* decryption table (not used) */
+ ROM_LOAD( "ccboot.prm", 0x0060, 0x0100, CRC(9e11550d) SHA1(b8cba8e16e10e23fba1f11551102ab77b680bdf0) ) /* decryption table (not used) */
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13j.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "cc12j.bin", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1274,7 +1274,7 @@ ROM_START( ckongpt2 )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "14.5s", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "13.5p", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1303,7 +1303,7 @@ ROM_START( ckongpt2a )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "14.5s", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "13.5p", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1332,7 +1332,7 @@ ROM_START( ckongpt2j )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "14.5s", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "13.5p", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1361,7 +1361,7 @@ ROM_START( ckongpt2jeu )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "14.5s", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "13.5p", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1391,7 +1391,7 @@ ROM_START( ckongpt2b )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "14.5s", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "13.5p", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1424,7 +1424,7 @@ ROM_START( ckong )
ROM_LOAD( "ck6u.bin", 0x0020, 0x0020, CRC(ab1940fa) SHA1(8d98e05cbaa6f55770c12e0a9a8ed9c73cc54423) )
ROM_LOAD( "ck6t.bin", 0x0040, 0x0020, CRC(b4e827a5) SHA1(31a5a5ad54417a474d22bb16c473415d99a2b6f1) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "falcon13", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "falcon12", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) ) // differs from ckongalc
ROM_END
@@ -1459,7 +1459,7 @@ ROM_START( ckongo )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13j.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "cc12j.bin", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1488,7 +1488,7 @@ ROM_START( ckongalc )
ROM_LOAD( "ck6u.bin", 0x0020, 0x0020, CRC(ab1940fa) SHA1(8d98e05cbaa6f55770c12e0a9a8ed9c73cc54423) )
ROM_LOAD( "ck6t.bin", 0x0040, 0x0020, CRC(b4e827a5) SHA1(31a5a5ad54417a474d22bb16c473415d99a2b6f1) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13j.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "ck12.bin", 0x1000, 0x1000, CRC(2eb23b60) SHA1(c9e7dc584562aceb374193655fbacb7df6c9c731) )
ROM_END
@@ -1517,7 +1517,7 @@ ROM_START( bigkong )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13j.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "cc12j.bin", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1546,7 +1546,7 @@ ROM_START( monkeyd )
ROM_LOAD( "ck6u.bin", 0x0020, 0x0020, BAD_DUMP CRC(ab1940fa) SHA1(8d98e05cbaa6f55770c12e0a9a8ed9c73cc54423) )
ROM_LOAD( "ck6t.bin", 0x0040, 0x0020, BAD_DUMP CRC(b4e827a5) SHA1(31a5a5ad54417a474d22bb16c473415d99a2b6f1) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cc13j.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "ck12.bin", 0x1000, 0x1000, CRC(2eb23b60) SHA1(c9e7dc584562aceb374193655fbacb7df6c9c731) )
ROM_END
@@ -1717,7 +1717,7 @@ ROM_START( dking )
ROM_LOAD( "ck6t.bin", 0x0040, 0x0020, CRC(b4e827a5) SHA1(31a5a5ad54417a474d22bb16c473415d99a2b6f1) ) // 82s123.1t
ROM_LOAD( "82s129.5g", 0x0060, 0x0100, CRC(9e11550d) SHA1(b8cba8e16e10e23fba1f11551102ab77b680bdf0) ) // Decryption Table?
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "falcon13", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) ) // d6.1m
ROM_LOAD( "falcon12", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) ) // d5.1k
ROM_END
@@ -1871,11 +1871,11 @@ ROM_START( cannonb )
ROM_LOAD( "prom.u6", 0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
ROM_LOAD( "prom.t6", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "canballs.5s", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "canballs.5p", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
- ROM_REGION( 0x6000, "unused", ROMREGION_ERASEFF ) /* unused roms, don't seem to belong to this game - they come from the bagman on crazy kong conversion, see below */
+ ROM_REGION( 0x6000, "unused", ROMREGION_ERASEFF ) /* unused roms, don't seem to belong to this game - they come from the bagman on crazy kong conversion, see below */
//ROM_LOAD( "canballs.5m", 0x0000, 0x1000, CRC(4f0088ab) SHA1(a8009f5b8517ba4d84fbc483b199f2514f24eae8) ) // patched 'le bagnard' cod rom
//ROM_LOAD( "canballs.5n", 0x1000, 0x1000, CRC(91570033) SHA1(7cd7fe9541da36c3919324bc65e6db1d1ca635e0) ) // ?
//ROM_LOAD( "canballs.11l", 0x2000, 0x1000, CRC(060b044c) SHA1(3121f07adb661663a2303085eea1b662968f8f98) ) // 'le bagnard gfx'
@@ -1910,7 +1910,7 @@ ROM_START( cannonb2 )
ROM_LOAD( "u6.bin", 0x0020, 0x0020, CRC(c0539747) SHA1(1bc70057b59b8cb11299fb6b0d84a46da6c0a025) )
ROM_LOAD( "t6.bin", 0x0040, 0x0020, CRC(b4e827a5) SHA1(31a5a5ad54417a474d22bb16c473415d99a2b6f1) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "cb6.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "cb5.bin", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1941,7 +1941,7 @@ ROM_START( cannonb3 )
ROM_LOAD( "b pos u6 n82s123n.bin", 0x0020, 0x0020, CRC(a758b567) SHA1(d188c90dba10fe3abaae92488786b555b35218c5) )
ROM_LOAD( "a pos t6 n82s123n.bin", 0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "ck14 pos s5 2532.bin", 0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
ROM_LOAD( "ck13 pos r5 2532.bin", 0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
ROM_END
@@ -1993,7 +1993,7 @@ ROM_START( bagmanf )
ROM_LOAD( "2732 07 pos dboard.bin", 0x0000, 0x1000, CRC(2e0057ff) SHA1(33e3ffa6418f86864eb81e5e9bda4bf540c143a6) )
ROM_LOAD( "2732 08 pos dboard.bin", 0x1000, 0x1000, CRC(b2120edd) SHA1(52b89dbcc749b084331fa82b13d0876e911fce52) )
- ROM_REGION( 0x2000, "samples", ROMREGION_ERASE00 ) /* samples */
+ ROM_REGION( 0x2000, "samples", ROMREGION_ERASE00 ) /* samples */
/* unpopulated */
ROM_END
@@ -2019,11 +2019,11 @@ ROM_START( swimmer )
ROM_REGION( 0x3000, "gfx2", 0 )
ROM_LOAD( "sw23.6c", 0x0000, 0x0800, CRC(9ca67e24) SHA1(86f561abc1a1c6b0c29c6017246d805c5a48b999) ) /* bigsprite data */
- ROM_RELOAD( 0x0800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x0800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_LOAD( "sw22.5c", 0x1000, 0x0800, CRC(02c10992) SHA1(8c383fdcd83aa9997e5802a58419b9d993a9b38d) )
- ROM_RELOAD( 0x1800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x1800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_LOAD( "sw21.4c", 0x2000, 0x0800, CRC(7f4993c1) SHA1(a5884b3af707109e810cf1f38bee3cb642e619f6) )
- ROM_RELOAD( 0x2800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x2800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_REGION( 0x0220, "proms", 0 )
ROM_LOAD( "24s10.13b", 0x0000, 0x100, CRC(8e35b97d) SHA1(2e2c254574660e01b9983f795a2adb5b9911d7f0) )
@@ -2052,11 +2052,11 @@ ROM_START( swimmera )
ROM_REGION( 0x3000, "gfx2", 0 )
ROM_LOAD( "sw23.6c", 0x0000, 0x0800, CRC(9ca67e24) SHA1(86f561abc1a1c6b0c29c6017246d805c5a48b999) ) /* bigsprite data */
- ROM_RELOAD( 0x0800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x0800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_LOAD( "sw22.5c", 0x1000, 0x0800, CRC(02c10992) SHA1(8c383fdcd83aa9997e5802a58419b9d993a9b38d) )
- ROM_RELOAD( 0x1800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x1800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_LOAD( "sw21.4c", 0x2000, 0x0800, CRC(7f4993c1) SHA1(a5884b3af707109e810cf1f38bee3cb642e619f6) )
- ROM_RELOAD( 0x2800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x2800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_REGION( 0x0220, "proms", 0 )
ROM_LOAD( "24s10.13b", 0x0000, 0x100, CRC(8e35b97d) SHA1(2e2c254574660e01b9983f795a2adb5b9911d7f0) )
@@ -2085,11 +2085,11 @@ ROM_START( swimmerb )
ROM_REGION( 0x3000, "gfx2", 0 )
ROM_LOAD( "sw23.6c", 0x0000, 0x0800, CRC(9ca67e24) SHA1(86f561abc1a1c6b0c29c6017246d805c5a48b999) ) /* bigsprite data */
- ROM_RELOAD( 0x0800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x0800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_LOAD( "sw22.5c", 0x1000, 0x0800, CRC(02c10992) SHA1(8c383fdcd83aa9997e5802a58419b9d993a9b38d) )
- ROM_RELOAD( 0x1800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x1800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_LOAD( "sw21.4c", 0x2000, 0x0800, CRC(7f4993c1) SHA1(a5884b3af707109e810cf1f38bee3cb642e619f6) )
- ROM_RELOAD( 0x2800, 0x0800 ) /* Guzzler has larger ROMs */
+ ROM_RELOAD( 0x2800, 0x0800 ) /* Guzzler has larger ROMs */
ROM_REGION( 0x0220, "proms", 0 )
ROM_LOAD( "24s10.13b", 0x0000, 0x100, CRC(8e35b97d) SHA1(2e2c254574660e01b9983f795a2adb5b9911d7f0) )
@@ -2175,7 +2175,7 @@ ROM_START( yamato )
ROM_LOAD( "7.11a", 0x1000, 0x1000, CRC(4a179790) SHA1(7fb6b033de939ff8bd13055c073311dca2c1a6fe) )
ROM_REGION( 0x2000, "user1", 0 )
- ROM_LOAD( "5.5lm", 0x0000, 0x1000, CRC(7761ad24) SHA1(98878b19addd142d35718080eece05eaaee0388d) ) /* ?? */
+ ROM_LOAD( "5.5lm", 0x0000, 0x1000, CRC(7761ad24) SHA1(98878b19addd142d35718080eece05eaaee0388d) ) /* ?? */
ROM_LOAD( "6.5n", 0x1000, 0x1000, CRC(da48444c) SHA1(a43e672ce262eb817fb4e5715ef4fb304a6a2815) )
ROM_REGION( 0x00a0, "proms", 0 )
@@ -2206,7 +2206,7 @@ ROM_START( yamato2 )
ROM_LOAD( "7.11a", 0x1000, 0x1000, CRC(4a179790) SHA1(7fb6b033de939ff8bd13055c073311dca2c1a6fe) )
ROM_REGION( 0x2000, "user1", 0 )
- ROM_LOAD( "5.5lm", 0x0000, 0x1000, CRC(7761ad24) SHA1(98878b19addd142d35718080eece05eaaee0388d) ) /* ?? */
+ ROM_LOAD( "5.5lm", 0x0000, 0x1000, CRC(7761ad24) SHA1(98878b19addd142d35718080eece05eaaee0388d) ) /* ?? */
ROM_LOAD( "6.5n", 0x1000, 0x1000, CRC(da48444c) SHA1(a43e672ce262eb817fb4e5715ef4fb304a6a2815) )
ROM_REGION( 0x00a0, "proms", 0 )
@@ -2235,15 +2235,15 @@ ROM_START( toprollr )
ROM_LOAD( "5.l5", 0x1000, 0x1000, CRC(84139f46) SHA1(976f781fb279dd540778708174b942a263f16443) )
ROM_REGION( 0x12000, "user1", 0 )
- ROM_LOAD( "2.f5", 0x00000, 0x02000, CRC(ef789f00) SHA1(424d69584d391ee7b9ad5db7ee6ced97d69897d4) )
- ROM_LOAD( "8.f3", 0x02000, 0x02000, CRC(94371cfb) SHA1(cb501c36b213c995a4048b3a96c85848c556cd05) )
- ROM_LOAD( "4.k5", 0x04000, 0x02000, CRC(1cb48ea0) SHA1(fdc75075112042ec84a7d1b3e5b5a6db1d1cb871) )
+ ROM_LOAD( "2.f5", 0x00000, 0x02000, CRC(ef789f00) SHA1(424d69584d391ee7b9ad5db7ee6ced97d69897d4) )
+ ROM_LOAD( "8.f3", 0x02000, 0x02000, CRC(94371cfb) SHA1(cb501c36b213c995a4048b3a96c85848c556cd05) )
+ ROM_LOAD( "4.k5", 0x04000, 0x02000, CRC(1cb48ea0) SHA1(fdc75075112042ec84a7d1b3e5b5a6db1d1cb871) )
ROM_COPY( "user1", 0x04000, 0x0a000, 0x02000 )
ROM_COPY( "user1", 0x04000, 0x10000, 0x02000 )
- ROM_LOAD( "3.h5", 0x06000, 0x02000, CRC(d45494ba) SHA1(6e235b34f9457acadad6d4e27799978bc2e3db08) )
- ROM_LOAD( "9.h3", 0x08000, 0x02000, CRC(8a8032a7) SHA1(d6642d72645c613c21f65bbbe1560d0437d41f43) )
- ROM_LOAD( "1.d5", 0x0c000, 0x02000, CRC(9894374d) SHA1(173de4abbc3fb5d522aa6d6d5caf8e4d54f2a598) )
- ROM_LOAD( "7.d3", 0x0e000, 0x02000, CRC(904fffb6) SHA1(5528bc2a4d2fe8672428fd4725644265f0d57ded) )
+ ROM_LOAD( "3.h5", 0x06000, 0x02000, CRC(d45494ba) SHA1(6e235b34f9457acadad6d4e27799978bc2e3db08) )
+ ROM_LOAD( "9.h3", 0x08000, 0x02000, CRC(8a8032a7) SHA1(d6642d72645c613c21f65bbbe1560d0437d41f43) )
+ ROM_LOAD( "1.d5", 0x0c000, 0x02000, CRC(9894374d) SHA1(173de4abbc3fb5d522aa6d6d5caf8e4d54f2a598) )
+ ROM_LOAD( "7.d3", 0x0e000, 0x02000, CRC(904fffb6) SHA1(5528bc2a4d2fe8672428fd4725644265f0d57ded) )
ROM_REGION( 0x2000, "samples", 0 )
ROM_LOAD( "12.p3", 0x0000, 0x2000, CRC(7f989dc9) SHA1(3b4d18cbb992872b3cf8f5eaf5381ed3a9468cc1) )
diff --git a/src/mame/drivers/cd32.c b/src/mame/drivers/cd32.c
index 3aab08c8431..90fcae16e6e 100644
--- a/src/mame/drivers/cd32.c
+++ b/src/mame/drivers/cd32.c
@@ -43,8 +43,8 @@
/* set to 0 to use control panel with only buttons (as in quiz games) - joy is default in dispenser setup */
-#define MGPREM11_USE_JOY 1
-#define MGNUMBER_USE_JOY 1
+#define MGPREM11_USE_JOY 1
+#define MGNUMBER_USE_JOY 1
static void handle_cd32_joystick_cia(running_machine &machine, UINT8 pra, UINT8 dra);
@@ -132,9 +132,9 @@ static ADDRESS_MAP_START( cd32_map, AS_PROGRAM, 32, cd32_state )
AM_RANGE(0xbfa000, 0xbfa003) AM_WRITE(aga_overlay_w)
AM_RANGE(0xbfd000, 0xbfefff) AM_READWRITE16_LEGACY(amiga_cia_r, amiga_cia_w, 0xffffffff)
AM_RANGE(0xc00000, 0xdfffff) AM_READWRITE16_LEGACY(amiga_custom_r, amiga_custom_w, 0xffffffff) AM_SHARE("custom_regs")
- AM_RANGE(0xe00000, 0xe7ffff) AM_ROM AM_REGION("user1", 0x80000) /* CD32 Extended ROM */
+ AM_RANGE(0xe00000, 0xe7ffff) AM_ROM AM_REGION("user1", 0x80000) /* CD32 Extended ROM */
AM_RANGE(0xa00000, 0xf7ffff) AM_NOP
- AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("user1", 0x0) /* Kickstart */
+ AM_RANGE(0xf80000, 0xffffff) AM_ROM AM_REGION("user1", 0x0) /* Kickstart */
ADDRESS_MAP_END
/*************************************
@@ -740,20 +740,20 @@ INPUT_PORTS_END
static const legacy_mos6526_interface cia_0_intf =
{
- DEVCB_LINE(amiga_cia_0_irq), /* irq_func */
- DEVCB_NULL, /* pc_func */
+ DEVCB_LINE(amiga_cia_0_irq), /* irq_func */
+ DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_INPUT_PORT("CIA0PORTA"),
- DEVCB_DRIVER_MEMBER(cd32_state,cd32_cia_0_porta_w), /* port A */
+ DEVCB_DRIVER_MEMBER(cd32_state,cd32_cia_0_porta_w), /* port A */
DEVCB_DRIVER_MEMBER(cd32_state,cd32_cia_0_portb_r),
- DEVCB_DRIVER_MEMBER(cd32_state,cd32_cia_0_portb_w) /* port B */
+ DEVCB_DRIVER_MEMBER(cd32_state,cd32_cia_0_portb_w) /* port B */
};
static const legacy_mos6526_interface cia_1_intf =
{
- DEVCB_LINE(amiga_cia_1_irq), /* irq_func */
- DEVCB_NULL, /* pc_func */
+ DEVCB_LINE(amiga_cia_1_irq), /* irq_func */
+ DEVCB_NULL, /* pc_func */
DEVCB_NULL,
DEVCB_NULL,
DEVCB_NULL,
@@ -762,8 +762,8 @@ static const legacy_mos6526_interface cia_1_intf =
DEVCB_NULL
};
-#define NVRAM_SIZE 1024
-#define NVRAM_PAGE_SIZE 16 /* max size of one write request */
+#define NVRAM_SIZE 1024
+#define NVRAM_PAGE_SIZE 16 /* max size of one write request */
static const i2cmem_interface i2cmem_interface =
{
@@ -1489,7 +1489,7 @@ DRIVER_INIT_MEMBER(cd32_state,odeontw2)
/***************************************************************************************************/
// these are clones of the cd32 SYSTEM because they run on a stock retail unit, with additional HW
-GAME( 1993, cd32bios, 0, cd32base, cd32, cd32_state, cd32, ROT0, "Commodore Business Machines", "CD32 Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND | GAME_IS_BIOS_ROOT )
+GAME( 1993, cd32bios, 0, cd32base, cd32, cd32_state, cd32, ROT0, "Commodore Business Machines", "CD32 Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND | GAME_IS_BIOS_ROOT )
GAME( 1995, cndypuzl, cd32bios, cd32base, cndypuzl, cd32_state, cndypuzl, ROT0, "CD Express", "Candy Puzzle (v1.0)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
GAME( 1995, haremchl, cd32bios, cd32base, haremchl, cd32_state, haremchl, ROT0, "CD Express", "Harem Challenge", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
GAME( 1995, lsrquiz, cd32bios, cd32base, lsrquiz, cd32_state, lsrquiz, ROT0, "CD Express", "Laser Quiz Italy", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND ) /* no player 2 inputs (ingame) */
diff --git a/src/mame/drivers/cdi.c b/src/mame/drivers/cdi.c
index d555577deaa..437bba60689 100644
--- a/src/mame/drivers/cdi.c
+++ b/src/mame/drivers/cdi.c
@@ -37,15 +37,15 @@ TODO:
#if ENABLE_VERBOSE_LOG
INLINE void verboselog(running_machine &machine, int n_level, const char *s_fmt, ...)
{
- if( VERBOSE_LEVEL >= n_level )
- {
- va_list v;
- char buf[ 32768 ];
- va_start( v, s_fmt );
- vsprintf( buf, s_fmt, v );
- va_end( v );
- logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
- }
+ if( VERBOSE_LEVEL >= n_level )
+ {
+ va_list v;
+ char buf[ 32768 ];
+ va_start( v, s_fmt );
+ vsprintf( buf, s_fmt, v );
+ va_end( v );
+ logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
+ }
}
#else
#define verboselog(x,y,z,...)
@@ -56,23 +56,23 @@ INLINE void verboselog(running_machine &machine, int n_level, const char *s_fmt,
*************************/
static ADDRESS_MAP_START( cdimono1_mem, AS_PROGRAM, 16, cdi_state )
- AM_RANGE(0x00000000, 0x0007ffff) AM_RAM AM_SHARE("planea")
- AM_RANGE(0x00200000, 0x0027ffff) AM_RAM AM_SHARE("planeb")
+ AM_RANGE(0x00000000, 0x0007ffff) AM_RAM AM_SHARE("planea")
+ AM_RANGE(0x00200000, 0x0027ffff) AM_RAM AM_SHARE("planeb")
#if ENABLE_UART_PRINTING
- AM_RANGE(0x00301400, 0x00301403) AM_READ_LEGACY(uart_loopback_enable)
+ AM_RANGE(0x00301400, 0x00301403) AM_READ_LEGACY(uart_loopback_enable)
#endif
AM_RANGE(0x00300000, 0x00303bff) AM_DEVREADWRITE_LEGACY("cdic", cdic_ram_r, cdic_ram_w)
- //AM_RANGE(0x00300000, 0x00303bff) AM_RAM AM_SHARE("cdic_regs.ram")
+ //AM_RANGE(0x00300000, 0x00303bff) AM_RAM AM_SHARE("cdic_regs.ram")
AM_RANGE(0x00303c00, 0x00303fff) AM_DEVREADWRITE_LEGACY("cdic", cdic_r, cdic_w)
AM_RANGE(0x00310000, 0x00317fff) AM_DEVREADWRITE_LEGACY("slave", slave_r, slave_w)
- //AM_RANGE(0x00318000, 0x0031ffff) AM_NOP
- AM_RANGE(0x00320000, 0x00323fff) AM_DEVREADWRITE8_LEGACY("mk48t08", timekeeper_r, timekeeper_w, 0xff00) /* nvram (only low bytes used) */
- AM_RANGE(0x00400000, 0x0047ffff) AM_ROM AM_REGION("maincpu", 0)
- AM_RANGE(0x004fffe0, 0x004fffff) AM_READWRITE_LEGACY(mcd212_r, mcd212_w)
- //AM_RANGE(0x00500000, 0x0057ffff) AM_RAM
- AM_RANGE(0x00500000, 0x00ffffff) AM_NOP
- //AM_RANGE(0x00e00000, 0x00efffff) AM_RAM // DVC
- AM_RANGE(0x80000000, 0x8000807f) AM_READWRITE_LEGACY(scc68070_periphs_r, scc68070_periphs_w)
+ //AM_RANGE(0x00318000, 0x0031ffff) AM_NOP
+ AM_RANGE(0x00320000, 0x00323fff) AM_DEVREADWRITE8_LEGACY("mk48t08", timekeeper_r, timekeeper_w, 0xff00) /* nvram (only low bytes used) */
+ AM_RANGE(0x00400000, 0x0047ffff) AM_ROM AM_REGION("maincpu", 0)
+ AM_RANGE(0x004fffe0, 0x004fffff) AM_READWRITE_LEGACY(mcd212_r, mcd212_w)
+ //AM_RANGE(0x00500000, 0x0057ffff) AM_RAM
+ AM_RANGE(0x00500000, 0x00ffffff) AM_NOP
+ //AM_RANGE(0x00e00000, 0x00efffff) AM_RAM // DVC
+ AM_RANGE(0x80000000, 0x8000807f) AM_READWRITE_LEGACY(scc68070_periphs_r, scc68070_periphs_w)
ADDRESS_MAP_END
/*************************
@@ -81,7 +81,7 @@ ADDRESS_MAP_END
INPUT_CHANGED_MEMBER(cdi_state::mcu_input)
{
- scc68070_regs_t *scc68070 = &m_scc68070_regs;
+ scc68070_regs_t *scc68070 = &m_scc68070_regs;
bool send = false;
switch((FPTR)param)
@@ -128,14 +128,14 @@ INPUT_CHANGED_MEMBER(cdi_state::mcu_input)
static INPUT_PORTS_START( cdi )
PORT_START("MOUSEX")
- PORT_BIT(0x3ff, 0x000, IPT_MOUSE_X) PORT_SENSITIVITY(100) PORT_MINMAX(0x000, 0x3ff) PORT_KEYDELTA(2) PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
+ PORT_BIT(0x3ff, 0x000, IPT_MOUSE_X) PORT_SENSITIVITY(100) PORT_MINMAX(0x000, 0x3ff) PORT_KEYDELTA(2) PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
PORT_START("MOUSEY")
- PORT_BIT(0x3ff, 0x000, IPT_MOUSE_Y) PORT_SENSITIVITY(100) PORT_MINMAX(0x000, 0x3ff) PORT_KEYDELTA(2) PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
+ PORT_BIT(0x3ff, 0x000, IPT_MOUSE_Y) PORT_SENSITIVITY(100) PORT_MINMAX(0x000, 0x3ff) PORT_KEYDELTA(2) PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
PORT_START("MOUSEBTN")
- PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_CODE(MOUSECODE_BUTTON1) PORT_NAME("Mouse Button 1") PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
- PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_CODE(MOUSECODE_BUTTON2) PORT_NAME("Mouse Button 2") PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
+ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_BUTTON1) PORT_CODE(MOUSECODE_BUTTON1) PORT_NAME("Mouse Button 1") PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
+ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_BUTTON2) PORT_CODE(MOUSECODE_BUTTON2) PORT_NAME("Mouse Button 2") PORT_CHANGED_MEMBER("slave", cdislave_device, mouse_update, 0)
PORT_BIT(0xfc, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("DEBUG")
@@ -171,59 +171,59 @@ INPUT_PORTS_END
static INPUT_PORTS_START( quizard )
PORT_INCLUDE( cdi )
- PORT_START("INPUT1")
- PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("Coin 1") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x39)
- PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Start 1") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x37)
- PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("Player 1 A") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x31)
- PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON4) PORT_NAME("Player 1 B") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x32)
- PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_BUTTON5) PORT_NAME("Player 1 C") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x33)
- PORT_BIT(0xe0, IP_ACTIVE_HIGH, IPT_UNUSED)
-
- PORT_START("INPUT2")
- PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_SERVICE1) PORT_NAME("Service") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x30)
- PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_START2) PORT_NAME("Start 2") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x38)
- PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON6) PORT_NAME("Player 2 A") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x34)
- PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON7) PORT_NAME("Player 2 B") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x35)
- PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_BUTTON8) PORT_NAME("Player 2 C") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x36)
- PORT_BIT(0xe0, IP_ACTIVE_HIGH, IPT_UNUSED)
+ PORT_START("INPUT1")
+ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_COIN1) PORT_NAME("Coin 1") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x39)
+ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_START1) PORT_NAME("Start 1") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x37)
+ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON3) PORT_NAME("Player 1 A") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x31)
+ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON4) PORT_NAME("Player 1 B") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x32)
+ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_BUTTON5) PORT_NAME("Player 1 C") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x33)
+ PORT_BIT(0xe0, IP_ACTIVE_HIGH, IPT_UNUSED)
+
+ PORT_START("INPUT2")
+ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_SERVICE1) PORT_NAME("Service") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x30)
+ PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_START2) PORT_NAME("Start 2") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x38)
+ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON6) PORT_NAME("Player 2 A") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x34)
+ PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON7) PORT_NAME("Player 2 B") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x35)
+ PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_BUTTON8) PORT_NAME("Player 2 C") PORT_CHANGED_MEMBER(DEVICE_SELF, cdi_state,mcu_input, (void*)0x36)
+ PORT_BIT(0xe0, IP_ACTIVE_HIGH, IPT_UNUSED)
INPUT_PORTS_END
void cdi_state::machine_start()
{
- scc68070_register_globals(machine(), &m_scc68070_regs);
+ scc68070_register_globals(machine(), &m_scc68070_regs);
}
MACHINE_RESET_MEMBER(cdi_state,cdi)
{
- UINT16 *src = (UINT16*)memregion("maincpu")->base();
- UINT16 *dst = m_planea;
- //device_t *cdrom_dev = machine().device("cdrom");
- memcpy(dst, src, 0x8);
+ UINT16 *src = (UINT16*)memregion("maincpu")->base();
+ UINT16 *dst = m_planea;
+ //device_t *cdrom_dev = machine().device("cdrom");
+ memcpy(dst, src, 0x8);
- scc68070_init(machine(), &m_scc68070_regs);
+ scc68070_init(machine(), &m_scc68070_regs);
- machine().device("maincpu")->reset();
+ machine().device("maincpu")->reset();
- m_dmadac[0] = machine().device<dmadac_sound_device>("dac1");
- m_dmadac[1] = machine().device<dmadac_sound_device>("dac2");
+ m_dmadac[0] = machine().device<dmadac_sound_device>("dac1");
+ m_dmadac[1] = machine().device<dmadac_sound_device>("dac2");
}
MACHINE_RESET_MEMBER(cdi_state,quizrd12)
{
MACHINE_RESET_CALL_MEMBER( cdi );
- scc68070_set_quizard_mcu_value(machine(), 0x021f);
- scc68070_set_quizard_mcu_ack(machine(), 0x5a);
+ scc68070_set_quizard_mcu_value(machine(), 0x021f);
+ scc68070_set_quizard_mcu_ack(machine(), 0x5a);
}
MACHINE_RESET_MEMBER(cdi_state,quizrd17)
{
MACHINE_RESET_CALL_MEMBER( cdi );
- scc68070_set_quizard_mcu_value(machine(), 0x021f);
- scc68070_set_quizard_mcu_ack(machine(), 0x5a);
+ scc68070_set_quizard_mcu_value(machine(), 0x021f);
+ scc68070_set_quizard_mcu_ack(machine(), 0x5a);
}
/* Untested - copied from quizrd17 */
@@ -231,8 +231,8 @@ MACHINE_RESET_MEMBER(cdi_state,quizrd18)
{
MACHINE_RESET_CALL_MEMBER( cdi );
- scc68070_set_quizard_mcu_value(machine(), 0x021f);
- scc68070_set_quizard_mcu_ack(machine(), 0x5a);
+ scc68070_set_quizard_mcu_value(machine(), 0x021f);
+ scc68070_set_quizard_mcu_ack(machine(), 0x5a);
}
MACHINE_RESET_MEMBER(cdi_state,quizrd22)
@@ -244,7 +244,7 @@ MACHINE_RESET_MEMBER(cdi_state,quizrd22)
// 0x188: German
scc68070_set_quizard_mcu_value(machine(), 0x188);
- scc68070_set_quizard_mcu_ack(machine(), 0x59);
+ scc68070_set_quizard_mcu_ack(machine(), 0x59);
}
/* Untested - copied from quizrd22 */
@@ -257,7 +257,7 @@ MACHINE_RESET_MEMBER(cdi_state,quizrd23)
// 0x188: German
scc68070_set_quizard_mcu_value(machine(), 0x188);
- scc68070_set_quizard_mcu_ack(machine(), 0x59);
+ scc68070_set_quizard_mcu_ack(machine(), 0x59);
}
MACHINE_RESET_MEMBER(cdi_state,quizrd32)
@@ -265,7 +265,7 @@ MACHINE_RESET_MEMBER(cdi_state,quizrd32)
MACHINE_RESET_CALL_MEMBER( cdi );
scc68070_set_quizard_mcu_value(machine(), 0x00ae);
- scc68070_set_quizard_mcu_ack(machine(), 0x58);
+ scc68070_set_quizard_mcu_ack(machine(), 0x58);
}
/* Untested - copied from quizrd32 */
@@ -274,7 +274,7 @@ MACHINE_RESET_MEMBER(cdi_state,quizrd34)
MACHINE_RESET_CALL_MEMBER( cdi );
scc68070_set_quizard_mcu_value(machine(), 0x00ae);
- scc68070_set_quizard_mcu_ack(machine(), 0x58);
+ scc68070_set_quizard_mcu_ack(machine(), 0x58);
}
/* Untested - copied from quizrr41 */
@@ -323,46 +323,46 @@ static DEVICE_IMAGE_DISPLAY_INFO(cdi_cdinfo)
static MACHINE_CONFIG_START( cdi, cdi_state )
- MCFG_CPU_ADD("maincpu", SCC68070, CLOCK_A/2)
- MCFG_CPU_PROGRAM_MAP(cdimono1_mem)
+ MCFG_CPU_ADD("maincpu", SCC68070, CLOCK_A/2)
+ MCFG_CPU_PROGRAM_MAP(cdimono1_mem)
- MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
- MCFG_SCREEN_SIZE(384, 302)
- MCFG_SCREEN_VISIBLE_AREA(0, 384-1, 22, 302-1) //dynamic resolution,TODO
+ MCFG_SCREEN_ADD("screen", RASTER)
+ MCFG_SCREEN_REFRESH_RATE(60)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
+ MCFG_SCREEN_SIZE(384, 302)
+ MCFG_SCREEN_VISIBLE_AREA(0, 384-1, 22, 302-1) //dynamic resolution,TODO
MCFG_SCREEN_UPDATE_DRIVER(cdi_state, screen_update_cdimono1)
- MCFG_SCREEN_ADD("lcd", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
- MCFG_SCREEN_SIZE(192, 22)
- MCFG_SCREEN_VISIBLE_AREA(0, 192-1, 0, 22-1)
+ MCFG_SCREEN_ADD("lcd", RASTER)
+ MCFG_SCREEN_REFRESH_RATE(60)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
+ MCFG_SCREEN_SIZE(192, 22)
+ MCFG_SCREEN_VISIBLE_AREA(0, 192-1, 0, 22-1)
MCFG_SCREEN_UPDATE_DRIVER(cdi_state, screen_update_cdimono1_lcd)
- MCFG_PALETTE_LENGTH(0x100)
+ MCFG_PALETTE_LENGTH(0x100)
- MCFG_DEFAULT_LAYOUT(layout_cdi)
+ MCFG_DEFAULT_LAYOUT(layout_cdi)
- MCFG_CDICDIC_ADD( "cdic" )
- MCFG_CDISLAVE_ADD( "slave" )
+ MCFG_CDICDIC_ADD( "cdic" )
+ MCFG_CDISLAVE_ADD( "slave" )
- /* sound hardware */
- MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
+ /* sound hardware */
+ MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
- MCFG_SOUND_ADD( "dac1", DMADAC, 0 )
- MCFG_SOUND_ROUTE( ALL_OUTPUTS, "lspeaker", 1.0 )
+ MCFG_SOUND_ADD( "dac1", DMADAC, 0 )
+ MCFG_SOUND_ROUTE( ALL_OUTPUTS, "lspeaker", 1.0 )
- MCFG_SOUND_ADD( "dac2", DMADAC, 0 )
- MCFG_SOUND_ROUTE( ALL_OUTPUTS, "rspeaker", 1.0 )
+ MCFG_SOUND_ADD( "dac2", DMADAC, 0 )
+ MCFG_SOUND_ROUTE( ALL_OUTPUTS, "rspeaker", 1.0 )
- MCFG_SOUND_ADD( "cdda", CDDA, 0 )
- MCFG_SOUND_ROUTE( ALL_OUTPUTS, "lspeaker", 1.0 )
- MCFG_SOUND_ROUTE( ALL_OUTPUTS, "rspeaker", 1.0 )
+ MCFG_SOUND_ADD( "cdda", CDDA, 0 )
+ MCFG_SOUND_ROUTE( ALL_OUTPUTS, "lspeaker", 1.0 )
+ MCFG_SOUND_ROUTE( ALL_OUTPUTS, "rspeaker", 1.0 )
- MCFG_MK48T08_ADD( "mk48t08" )
+ MCFG_MK48T08_ADD( "mk48t08" )
MACHINE_CONFIG_END
struct cdrom_interface cdi_cdrom =
@@ -383,9 +383,9 @@ static MACHINE_CONFIG_DERIVED( cdimono1, cdi_base )
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( quizard, cdi_base )
- MCFG_CPU_MODIFY("maincpu")
- MCFG_CPU_PROGRAM_MAP(cdimono1_mem)
- MCFG_CPU_VBLANK_INT("screen", scc68070_mcu_frame)
+ MCFG_CPU_MODIFY("maincpu")
+ MCFG_CPU_PROGRAM_MAP(cdimono1_mem)
+ MCFG_CPU_VBLANK_INT("screen", scc68070_mcu_frame)
MACHINE_CONFIG_END
static MACHINE_CONFIG_DERIVED( quizrd12, quizard )
@@ -448,11 +448,11 @@ ROM_START( cdimono1 )
//ROM_SYSTEM_BIOS( 3, "pcdi910m", "Philips CD-i 910" )
//ROMX_LOAD( "cdi910.rom", 0x000000, 0x80000, CRC(8ee44ed6) SHA1(3fcdfa96f862b0cb7603fb6c2af84cac59527b05), ROM_BIOS(4) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
ROM_END
@@ -469,150 +469,150 @@ ROM_START( cdibios )
//ROM_SYSTEM_BIOS( 3, "pcdi910m", "Philips CD-i 910" )
//ROMX_LOAD( "cdi910.rom", 0x000000, 0x80000, CRC(8ee44ed6) SHA1(3fcdfa96f862b0cb7603fb6c2af84cac59527b05), ROM_BIOS(4) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
ROM_END
ROM_START( quizard )
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrd32", 0, BAD_DUMP SHA1(31e9fa2169aa44d799c37170b238134ab738e1a1) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrd32", 0, BAD_DUMP SHA1(31e9fa2169aa44d799c37170b238134ab738e1a1) )
ROM_END
ROM_START( quizrd22 )
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrd22", 0, BAD_DUMP SHA1(03c8fdcf27ead6e221691111e8c679b551099543) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrd22", 0, BAD_DUMP SHA1(03c8fdcf27ead6e221691111e8c679b551099543) )
ROM_END
ROM_START( quizrd17 )
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrd17", 0, BAD_DUMP SHA1(4bd698f076505b4e17be978481bce027eb47123b) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrd17", 0, BAD_DUMP SHA1(4bd698f076505b4e17be978481bce027eb47123b) )
ROM_END
ROM_START( quizrd12 ) /* CD-ROM printed 01/95 */
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrd12", 0, BAD_DUMP SHA1(6e41683b96b74e903040842aeb18437ad7813c82) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrd12", 0, BAD_DUMP SHA1(6e41683b96b74e903040842aeb18437ad7813c82) )
ROM_END
ROM_START( quizrd18 ) /* CD-ROM printed ??/?? */
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrd18", 0, BAD_DUMP SHA1(ede873b22957f2a707bbd3039e962ef2ca5aedbd) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrd18", 0, BAD_DUMP SHA1(ede873b22957f2a707bbd3039e962ef2ca5aedbd) )
ROM_END
ROM_START( quizrd23 ) /* CD-ROM printed ??/?? */
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrd23", 0, BAD_DUMP SHA1(cd909d9a54275d6f2d36e03e83eea996e781b4d3) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrd23", 0, BAD_DUMP SHA1(cd909d9a54275d6f2d36e03e83eea996e781b4d3) )
ROM_END
ROM_START( quizrd34 ) /* CD-ROM printed ??/?? */
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrd34", 0, BAD_DUMP SHA1(37ad49b72b5175afbb87141d57bc8604347fe032) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrd34", 0, BAD_DUMP SHA1(37ad49b72b5175afbb87141d57bc8604347fe032) )
ROM_END
ROM_START( quizrr42 ) /* CD-ROM printed 09/98 */
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrr42", 0, BAD_DUMP SHA1(a5d5c8950b4650b8753f9119dc7f1ccaa2aa5442) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrr42", 0, BAD_DUMP SHA1(a5d5c8950b4650b8753f9119dc7f1ccaa2aa5442) )
ROM_END
ROM_START( quizrr41 )
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrr41", 0, BAD_DUMP SHA1(2c0484c6545aac8e00b318328c6edce6f5dde43d) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrr41", 0, BAD_DUMP SHA1(2c0484c6545aac8e00b318328c6edce6f5dde43d) )
ROM_END
ROM_START( quizrr40 ) /* CD-ROM printed 07/97 */
- ROM_REGION(0x80000, "maincpu", 0)
- ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
+ ROM_REGION(0x80000, "maincpu", 0)
+ ROM_LOAD( "cdi220b.rom", 0x000000, 0x80000, CRC(279683ca) SHA1(53360a1f21ddac952e95306ced64186a3fc0b93e) )
- ROM_REGION(0x2000, "cdic", 0)
- ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "cdic", 0)
+ ROM_LOAD( "cdic.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- ROM_REGION(0x2000, "slave", 0)
- ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
+ ROM_REGION(0x2000, "slave", 0)
+ ROM_LOAD( "slave.bin", 0x0000, 0x2000, NO_DUMP ) // Undumped 68HC05 microcontroller, might need decapping
- DISK_REGION( "cdrom" )
- DISK_IMAGE_READONLY( "quizrr40", 0, BAD_DUMP SHA1(288cc37a994e4f1cbd47aa8c92342879c6fc0b87) )
+ DISK_REGION( "cdrom" )
+ DISK_IMAGE_READONLY( "quizrr40", 0, BAD_DUMP SHA1(288cc37a994e4f1cbd47aa8c92342879c6fc0b87) )
ROM_END
@@ -625,7 +625,7 @@ CONS( 1991, cdimono1, 0, 0, cdimono1, cdi, driver_device, 0,
// The Quizard games are RETAIL CD-i units, with additional JAMMA adapters & dongles for protection, hence being 'clones' of the system.
-GAME( 1995, cdibios, 0, cdi_base, quizard, driver_device, 0, ROT0, "Philips", "CD-i Bios", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_IS_BIOS_ROOT )
+GAME( 1995, cdibios, 0, cdi_base, quizard, driver_device, 0, ROT0, "Philips", "CD-i Bios", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_IS_BIOS_ROOT )
// Working
GAME( 1995, quizrd12, cdibios, quizrd12, quizard, driver_device, 0, ROT0, "TAB Austria", "Quizard 1.2", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION )
GAME( 1995, quizrd17, cdibios, quizrd17, quizard, driver_device, 0, ROT0, "TAB Austria", "Quizard 1.7", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION )
@@ -640,4 +640,3 @@ GAME( 1996, quizard, cdibios, quizrd32, quizard, driver_device,
GAME( 1997, quizrr40, cdibios, quizrr40, quizard, driver_device, 0, ROT0, "TAB Austria", "Quizard Rainbow 4.0", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION )
GAME( 1998, quizrr41, cdibios, quizrr41, quizard, driver_device, 0, ROT0, "TAB Austria", "Quizard Rainbow 4.1", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION )
GAME( 1998, quizrr42, cdibios, quizrr42, quizard, driver_device, 0, ROT0, "TAB Austria", "Quizard Rainbow 4.2", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION )
-
diff --git a/src/mame/drivers/centiped.c b/src/mame/drivers/centiped.c
index 65e346f9ef7..8578624385d 100644
--- a/src/mame/drivers/centiped.c
+++ b/src/mame/drivers/centiped.c
@@ -565,12 +565,12 @@ READ8_MEMBER(centiped_state::milliped_IN2_r)
UINT8 data = ioport("IN2")->read();
/* MSH - 15 Feb, 2007
- * The P2 X Joystick inputs are not properly handled in
- * the Milliped code, so we are forcing the P2 inputs
- * into the P1 Joystick handler, this require remapping
- * the inputs, and has the good side effect of disabling
- * the actual Joy1 inputs while control_select is no zero.
- */
+ * The P2 X Joystick inputs are not properly handled in
+ * the Milliped code, so we are forcing the P2 inputs
+ * into the P1 Joystick handler, this require remapping
+ * the inputs, and has the good side effect of disabling
+ * the actual Joy1 inputs while control_select is no zero.
+ */
if (m_control_select != 0)
{
/* Bottom 4 bits is our joystick inputs */
@@ -666,12 +666,12 @@ static ADDRESS_MAP_START( centiped_base_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x0000, 0x03ff) AM_RAM AM_SHARE("rambase")
AM_RANGE(0x0400, 0x07bf) AM_RAM_WRITE(centiped_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x07c0, 0x07ff) AM_RAM AM_SHARE("spriteram")
- AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW1") /* DSW1 */
- AM_RANGE(0x0801, 0x0801) AM_READ_PORT("DSW2") /* DSW2 */
- AM_RANGE(0x0c00, 0x0c00) AM_READ(centiped_IN0_r) /* IN0 */
- AM_RANGE(0x0c01, 0x0c01) AM_READ_PORT("IN1") /* IN1 */
- AM_RANGE(0x0c02, 0x0c02) AM_READ(centiped_IN2_r) /* IN2 */
- AM_RANGE(0x0c03, 0x0c03) AM_READ_PORT("IN3") /* IN3 */
+ AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW1") /* DSW1 */
+ AM_RANGE(0x0801, 0x0801) AM_READ_PORT("DSW2") /* DSW2 */
+ AM_RANGE(0x0c00, 0x0c00) AM_READ(centiped_IN0_r) /* IN0 */
+ AM_RANGE(0x0c01, 0x0c01) AM_READ_PORT("IN1") /* IN1 */
+ AM_RANGE(0x0c02, 0x0c02) AM_READ(centiped_IN2_r) /* IN2 */
+ AM_RANGE(0x0c03, 0x0c03) AM_READ_PORT("IN3") /* IN3 */
AM_RANGE(0x1400, 0x140f) AM_WRITE(centiped_paletteram_w) AM_SHARE("paletteram")
AM_RANGE(0x1600, 0x163f) AM_DEVWRITE("earom",atari_vg_earom_device, write)
AM_RANGE(0x1680, 0x1680) AM_DEVWRITE("earom", atari_vg_earom_device, ctrl_w)
@@ -698,12 +698,12 @@ static ADDRESS_MAP_START( centipdb_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x0000, 0x03ff) AM_MIRROR(0x4000) AM_RAM
AM_RANGE(0x0400, 0x07bf) AM_MIRROR(0x4000) AM_RAM_WRITE(centiped_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x07c0, 0x07ff) AM_MIRROR(0x4000) AM_RAM AM_SHARE("spriteram")
- AM_RANGE(0x0800, 0x0800) AM_MIRROR(0x4000) AM_READ_PORT("DSW1") /* DSW1 */
- AM_RANGE(0x0801, 0x0801) AM_MIRROR(0x4000) AM_READ_PORT("DSW2") /* DSW2 */
- AM_RANGE(0x0c00, 0x0c00) AM_MIRROR(0x4000) AM_READ(centiped_IN0_r) /* IN0 */
- AM_RANGE(0x0c01, 0x0c01) AM_MIRROR(0x4000) AM_READ_PORT("IN1") /* IN1 */
- AM_RANGE(0x0c02, 0x0c02) AM_MIRROR(0x4000) AM_READ(centiped_IN2_r) /* IN2 */
- AM_RANGE(0x0c03, 0x0c03) AM_MIRROR(0x4000) AM_READ_PORT("IN3") /* IN3 */
+ AM_RANGE(0x0800, 0x0800) AM_MIRROR(0x4000) AM_READ_PORT("DSW1") /* DSW1 */
+ AM_RANGE(0x0801, 0x0801) AM_MIRROR(0x4000) AM_READ_PORT("DSW2") /* DSW2 */
+ AM_RANGE(0x0c00, 0x0c00) AM_MIRROR(0x4000) AM_READ(centiped_IN0_r) /* IN0 */
+ AM_RANGE(0x0c01, 0x0c01) AM_MIRROR(0x4000) AM_READ_PORT("IN1") /* IN1 */
+ AM_RANGE(0x0c02, 0x0c02) AM_MIRROR(0x4000) AM_READ(centiped_IN2_r) /* IN2 */
+ AM_RANGE(0x0c03, 0x0c03) AM_MIRROR(0x4000) AM_READ_PORT("IN3") /* IN3 */
AM_RANGE(0x1000, 0x1001) AM_MIRROR(0x4000) AM_DEVWRITE_LEGACY("pokey", ay8910_data_address_w)
AM_RANGE(0x1001, 0x1001) AM_MIRROR(0x4000) AM_DEVREAD_LEGACY("pokey", ay8910_r)
AM_RANGE(0x1400, 0x140f) AM_MIRROR(0x4000) AM_WRITE(centiped_paletteram_w) AM_SHARE("paletteram")
@@ -888,10 +888,10 @@ static ADDRESS_MAP_START( warlords_map, AS_PROGRAM, 8, centiped_state )
AM_RANGE(0x0000, 0x03ff) AM_RAM
AM_RANGE(0x0400, 0x07bf) AM_RAM_WRITE(centiped_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x07c0, 0x07ff) AM_RAM AM_SHARE("spriteram")
- AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW1") /* DSW1 */
- AM_RANGE(0x0801, 0x0801) AM_READ_PORT("DSW2") /* DSW2 */
- AM_RANGE(0x0c00, 0x0c00) AM_READ_PORT("IN0") /* IN0 */
- AM_RANGE(0x0c01, 0x0c01) AM_READ_PORT("IN1") /* IN1 */
+ AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW1") /* DSW1 */
+ AM_RANGE(0x0801, 0x0801) AM_READ_PORT("DSW2") /* DSW2 */
+ AM_RANGE(0x0c00, 0x0c00) AM_READ_PORT("IN0") /* IN0 */
+ AM_RANGE(0x0c01, 0x0c01) AM_READ_PORT("IN1") /* IN1 */
AM_RANGE(0x1000, 0x100f) AM_DEVREADWRITE("pokey", pokey_device, read, write)
AM_RANGE(0x1800, 0x1800) AM_WRITE(irq_ack_w)
AM_RANGE(0x1c00, 0x1c02) AM_WRITE(coin_count_w)
@@ -984,13 +984,13 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( centiped )
PORT_START("IN0")
- PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
+ PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x10, DEF_STR( Cocktail ) )
PORT_SERVICE( 0x20, IP_ACTIVE_LOW )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
@@ -1003,9 +1003,9 @@ static INPUT_PORTS_START( centiped )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_START("IN2")
- PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
+ PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
PORT_BIT( 0x70, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
PORT_START("IN3")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
@@ -1018,43 +1018,43 @@ static INPUT_PORTS_START( centiped )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:!1,!2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:!1,!2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( German ) )
PORT_DIPSETTING( 0x02, DEF_STR( French ) )
PORT_DIPSETTING( 0x03, DEF_STR( Spanish ) )
- PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("N9:!3,!4")
+ PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("N9:!3,!4")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x0c, "5" )
- PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("N9:!5,!6")
+ PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("N9:!5,!6")
PORT_DIPSETTING( 0x00, "10000" )
PORT_DIPSETTING( 0x10, "12000" )
PORT_DIPSETTING( 0x20, "15000" )
PORT_DIPSETTING( 0x30, "20000" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("N9:!7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("N9:!7")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("N9:!8")
+ PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("N9:!8")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x80, "2" )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("N8:!1,!2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("N8:!1,!2")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("N8:!3,!4")
+ PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("N8:!3,!4")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x04, "*4" )
PORT_DIPSETTING( 0x08, "*5" )
PORT_DIPSETTING( 0x0c, "*6" )
- PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("N8:!5")
+ PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("N8:!5")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x10, "*2" )
- PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("N8:!6,!7,!8")
+ PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("N8:!6,!7,!8")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
@@ -1062,16 +1062,16 @@ static INPUT_PORTS_START( centiped )
PORT_DIPSETTING( 0x80, "6 credits/5 coins" )
PORT_DIPSETTING( 0xa0, "4 credits/3 coins" )
- PORT_START("TRACK0_X") /* IN6, fake trackball input port. */
+ PORT_START("TRACK0_X") /* IN6, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE
- PORT_START("TRACK0_Y") /* IN7, fake trackball input port. */
+ PORT_START("TRACK0_Y") /* IN7, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
- PORT_START("TRACK1_X") /* IN8, fake trackball input port. */
+ PORT_START("TRACK1_X") /* IN8, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_COCKTAIL
- PORT_START("TRACK1_Y") /* IN9, fake trackball input port. */
+ PORT_START("TRACK1_Y") /* IN9, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_COCKTAIL
INPUT_PORTS_END
@@ -1079,7 +1079,7 @@ static INPUT_PORTS_START( caterplr )
PORT_INCLUDE( centiped )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:!1,!2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("N9:!1,!2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( German ) )
PORT_DIPSETTING( 0x02, DEF_STR( French ) )
@@ -1101,35 +1101,35 @@ static INPUT_PORTS_START( centtime )
PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:!1,!2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:!1,!2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( German ) )
PORT_DIPSETTING( 0x02, DEF_STR( French ) )
PORT_DIPSETTING( 0x03, DEF_STR( Spanish ) )
- PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!3,!4")
+ PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!3,!4")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x0c, "5" )
- PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:!5,!6")
+ PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW1:!5,!6")
PORT_DIPSETTING( 0x00, "10000" )
PORT_DIPSETTING( 0x10, "12000" )
PORT_DIPSETTING( 0x20, "15000" )
PORT_DIPSETTING( 0x30, "20000" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!7")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW1:!8")
+ PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW1:!8")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x80, "2" )
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!1,!2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!1,!2")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x1c, 0x00, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("SW2:!3,!4,!5")
+ PORT_DIPNAME( 0x1c, 0x00, DEF_STR( Game_Time ) ) PORT_DIPLOCATION("SW2:!3,!4,!5")
PORT_DIPSETTING( 0x00, "Untimed" )
PORT_DIPSETTING( 0x04, "1 Minute" )
PORT_DIPSETTING( 0x08, "2 Minutes" )
@@ -1138,7 +1138,7 @@ static INPUT_PORTS_START( centtime )
PORT_DIPSETTING( 0x14, "5 Minutes" )
PORT_DIPSETTING( 0x18, "6 Minutes" )
PORT_DIPSETTING( 0x1c, "7 Minutes" )
- PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!6,!7,!8")
+ PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!6,!7,!8")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
@@ -1146,10 +1146,10 @@ static INPUT_PORTS_START( centtime )
PORT_DIPSETTING( 0x80, "6 credits/5 coins" )
PORT_DIPSETTING( 0xa0, "4 credits/3 coins" )
- PORT_MODIFY("TRACK1_X") /* IN8, place for cocktail trackball (not used) */
+ PORT_MODIFY("TRACK1_X") /* IN8, place for cocktail trackball (not used) */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_MODIFY("TRACK1_Y") /* IN9, place for cocktail trackball (not used) */
+ PORT_MODIFY("TRACK1_Y") /* IN9, place for cocktail trackball (not used) */
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
INPUT_PORTS_END
@@ -1165,60 +1165,60 @@ static INPUT_PORTS_START( magworm )
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_MODIFY("DSW1")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!1,!2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:!1,!2")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("SW1:!3,!4")
+ PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("SW1:!3,!4")
PORT_DIPSETTING( 0x00, "*3" )
PORT_DIPSETTING( 0x04, "*7" )
PORT_DIPSETTING( 0x08, "*1/2" )
PORT_DIPSETTING( 0x0c, "*6" )
- PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:!5,!6")
+ PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:!5,!6")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x10, DEF_STR( German ) )
PORT_DIPSETTING( 0x20, DEF_STR( French ) )
PORT_DIPSETTING( 0x30, DEF_STR( Spanish ) )
- PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!7,!8")
+ PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!7,!8")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x40, "3" )
PORT_DIPSETTING( 0x80, "4" )
PORT_DIPSETTING( 0xc0, "5" )
PORT_MODIFY("DSW2")
- PORT_DIPNAME( 0x01, 0x00, "Left Coin" ) PORT_DIPLOCATION("SW2:!1")
+ PORT_DIPNAME( 0x01, 0x00, "Left Coin" ) PORT_DIPLOCATION("SW2:!1")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x01, "*2" )
- PORT_DIPNAME( 0x0e, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!2,!3,!4")
+ PORT_DIPNAME( 0x0e, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!2,!3,!4")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x02, "3 credits/2 coins" )
PORT_DIPSETTING( 0x04, "5 credits/4 coins" )
PORT_DIPSETTING( 0x06, "6 credits/4 coins" )
PORT_DIPSETTING( 0x08, "6 credits/5 coins" )
PORT_DIPSETTING( 0x0a, "4 credits/3 coins" )
- PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:!5,!6")
+ PORT_DIPNAME( 0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:!5,!6")
PORT_DIPSETTING( 0x00, "10000" )
PORT_DIPSETTING( 0x10, "12000" )
PORT_DIPSETTING( 0x20, "15000" )
PORT_DIPSETTING( 0x30, "20000" )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:!7")
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW2:!8")
+ PORT_DIPNAME( 0x80, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("SW2:!8")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x80, "2" )
INPUT_PORTS_END
static INPUT_PORTS_START( milliped )
- PORT_START("IN0") /* $2000 */ /* see port 6 for x trackball */
- PORT_DIPNAME(0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("P8:!1,!2")
+ PORT_START("IN0") /* $2000 */ /* see port 6 for x trackball */
+ PORT_DIPNAME(0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("P8:!1,!2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( German ) )
PORT_DIPSETTING( 0x02, DEF_STR( French ) )
PORT_DIPSETTING( 0x03, DEF_STR( Spanish ) )
- PORT_DIPNAME(0x0c, 0x04, "Bonus" ) PORT_DIPLOCATION("P8:!3,!4")
+ PORT_DIPNAME(0x0c, 0x04, "Bonus" ) PORT_DIPLOCATION("P8:!3,!4")
PORT_DIPSETTING( 0x00, "0" )
PORT_DIPSETTING( 0x04, "0 1x" )
PORT_DIPSETTING( 0x08, "0 1x 2x" )
@@ -1226,24 +1226,24 @@ static INPUT_PORTS_START( milliped )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
- PORT_START("IN1") /* $2001 */ /* see port 7 for y trackball */
+ PORT_START("IN1") /* $2001 */ /* see port 7 for y trackball */
/* these bits are unused */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_DIPNAME(0x04, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("P8:!7")
+ PORT_DIPNAME(0x04, 0x00, "Credit Minimum" ) PORT_DIPLOCATION("P8:!7")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x04, "2" )
- PORT_DIPNAME(0x08, 0x00, "Coin Counters" ) PORT_DIPLOCATION("P8:!8")
+ PORT_DIPNAME(0x08, 0x00, "Coin Counters" ) PORT_DIPLOCATION("P8:!8")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x08, "2" )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
- PORT_START("IN2") /* $2010 */
+ PORT_START("IN2") /* $2010 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
@@ -1253,7 +1253,7 @@ static INPUT_PORTS_START( milliped )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_START("IN3") /* $2011 */
+ PORT_START("IN3") /* $2011 */
/* Note, joystick X input for player 2 are bad in software */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
@@ -1266,45 +1266,45 @@ static INPUT_PORTS_START( milliped )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
- PORT_START("DSW1") /* $0408 */
- PORT_DIPNAME(0x01, 0x00, "Millipede Head" ) PORT_DIPLOCATION("D5:!1")
+ PORT_START("DSW1") /* $0408 */
+ PORT_DIPNAME(0x01, 0x00, "Millipede Head" ) PORT_DIPLOCATION("D5:!1")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x01, DEF_STR( Hard ) )
- PORT_DIPNAME(0x02, 0x00, "Beetle" ) PORT_DIPLOCATION("D5:!2")
+ PORT_DIPNAME(0x02, 0x00, "Beetle" ) PORT_DIPLOCATION("D5:!2")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x02, DEF_STR( Hard ) )
- PORT_DIPNAME(0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("D5:!3,!4")
+ PORT_DIPNAME(0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("D5:!3,!4")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x0c, "5" )
- PORT_DIPNAME(0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("D5:!5,!6")
+ PORT_DIPNAME(0x30, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("D5:!5,!6")
PORT_DIPSETTING( 0x00, "12000" )
PORT_DIPSETTING( 0x10, "15000" )
PORT_DIPSETTING( 0x20, "20000" )
PORT_DIPSETTING( 0x30, DEF_STR( None ) )
- PORT_DIPNAME(0x40, 0x00, "Spider" ) PORT_DIPLOCATION("D5:!7")
+ PORT_DIPNAME(0x40, 0x00, "Spider" ) PORT_DIPLOCATION("D5:!7")
PORT_DIPSETTING( 0x00, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Hard ) )
- PORT_DIPNAME(0x80, 0x00, "Starting Score Select" ) PORT_DIPLOCATION("D5:!8")
+ PORT_DIPNAME(0x80, 0x00, "Starting Score Select" ) PORT_DIPLOCATION("D5:!8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("DSW2") /* $0808 */
- PORT_DIPNAME(0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("B5:!1,!2")
+ PORT_START("DSW2") /* $0808 */
+ PORT_DIPNAME(0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("B5:!1,!2")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME(0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("B5:!3,!4")
+ PORT_DIPNAME(0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("B5:!3,!4")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x04, "*4" )
PORT_DIPSETTING( 0x08, "*5" )
PORT_DIPSETTING( 0x0c, "*6" )
- PORT_DIPNAME(0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("B5:!5")
+ PORT_DIPNAME(0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("B5:!5")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x10, "*2" )
- PORT_DIPNAME(0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("B5:!6,!7,!8")
+ PORT_DIPNAME(0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("B5:!6,!7,!8")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
@@ -1313,16 +1313,16 @@ static INPUT_PORTS_START( milliped )
PORT_DIPSETTING( 0xa0, "4 credits/3 coins" )
PORT_DIPSETTING( 0xc0, "Demo Mode" )
- PORT_START("TRACK0_X") /* IN6, fake trackball input port. */
+ PORT_START("TRACK0_X") /* IN6, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE
- PORT_START("TRACK0_Y") /* IN7, fake trackball input port. */
+ PORT_START("TRACK0_Y") /* IN7, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
- PORT_START("TRACK1_X") /* IN8, fake trackball input port. */
+ PORT_START("TRACK1_X") /* IN8, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_COCKTAIL
- PORT_START("TRACK1_Y") /* IN9, fake trackball input port. */
+ PORT_START("TRACK1_Y") /* IN9, fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_COCKTAIL
INPUT_PORTS_END
@@ -1366,7 +1366,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( warlords )
PORT_START("IN0")
PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_DIPNAME( 0x10, 0x00, "Diag Step" ) /* Not referenced */
+ PORT_DIPNAME( 0x10, 0x00, "Diag Step" ) /* Not referenced */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
PORT_SERVICE( 0x20, IP_ACTIVE_LOW )
@@ -1386,16 +1386,16 @@ static INPUT_PORTS_START( warlords )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("J2:1,2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("J2:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( French ) )
PORT_DIPSETTING( 0x02, DEF_STR( Spanish ) )
PORT_DIPSETTING( 0x03, DEF_STR( German ) )
- PORT_DIPNAME( 0x04, 0x00, "Music" ) PORT_DIPLOCATION("J2:3")
+ PORT_DIPNAME( 0x04, 0x00, "Music" ) PORT_DIPLOCATION("J2:3")
PORT_DIPSETTING( 0x00, "End of game" )
PORT_DIPSETTING( 0x04, "High score only" )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "J2:4" )
- PORT_DIPNAME( 0x30, 0x00, "Credits" ) PORT_DIPLOCATION("J2:5,6")
+ PORT_DIPNAME( 0x30, 0x00, "Credits" ) PORT_DIPLOCATION("J2:5,6")
PORT_DIPSETTING( 0x00, "1p/2p = 1 credit" )
PORT_DIPSETTING( 0x10, "1p = 1, 2p = 2" )
PORT_DIPSETTING( 0x20, "1p/2p = 2 credits" )
@@ -1404,20 +1404,20 @@ static INPUT_PORTS_START( warlords )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("M2:1,2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("M2:1,2")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("M2:3,4")
+ PORT_DIPNAME( 0x0c, 0x00, "Right Coin" ) PORT_DIPLOCATION("M2:3,4")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x04, "*4" )
PORT_DIPSETTING( 0x08, "*5" )
PORT_DIPSETTING( 0x0c, "*6" )
- PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("M2:5")
+ PORT_DIPNAME( 0x10, 0x00, "Left Coin" ) PORT_DIPLOCATION("M2:5")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x10, "*2" )
- PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("M2:6,7,8")
+ PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("M2:6,7,8")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
@@ -1441,7 +1441,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( mazeinv )
PORT_START("IN0")
- PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW0:!1,!2")
+ PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW0:!1,!2")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( German ) )
PORT_DIPSETTING( 0x02, DEF_STR( French ) )
@@ -1450,7 +1450,7 @@ static INPUT_PORTS_START( mazeinv )
PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW0:!4" )
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x00, "SW0:!5" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "SW0:!6" )
- PORT_DIPNAME( 0x40, 0x00, "Minimum credits" ) PORT_DIPLOCATION("SW0:!7")
+ PORT_DIPNAME( 0x40, 0x00, "Minimum credits" ) PORT_DIPLOCATION("SW0:!7")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x40, "2" )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
@@ -1463,7 +1463,7 @@ static INPUT_PORTS_START( mazeinv )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Fire")
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_TILT ) // No Function?
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_TILT ) // No Function?
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 )
@@ -1481,42 +1481,42 @@ static INPUT_PORTS_START( mazeinv )
PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x00, "Doors for bonus" ) PORT_DIPLOCATION("SW1:!1,!2")
+ PORT_DIPNAME( 0x03, 0x00, "Doors for bonus" ) PORT_DIPLOCATION("SW1:!1,!2")
PORT_DIPSETTING( 0x00, "10" )
PORT_DIPSETTING( 0x01, "12" )
PORT_DIPSETTING( 0x02, "14" )
PORT_DIPSETTING( 0x03, "16" )
- PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!3,!4")
+ PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:!3,!4")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x04, "3" )
PORT_DIPSETTING( 0x08, "4" )
PORT_DIPSETTING( 0x0c, "5" )
- PORT_DIPNAME( 0x30, 0x00, "Extra life at" ) PORT_DIPLOCATION("SW1:!5,!6")
+ PORT_DIPNAME( 0x30, 0x00, "Extra life at" ) PORT_DIPLOCATION("SW1:!5,!6")
PORT_DIPSETTING( 0x00, "20000" )
PORT_DIPSETTING( 0x10, "25000" )
PORT_DIPSETTING( 0x20, "30000" )
PORT_DIPSETTING( 0x30, "Never" )
- PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!7,!8")
+ PORT_DIPNAME( 0xc0, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:!7,!8")
PORT_DIPSETTING( 0x00, DEF_STR( Easiest ) )
PORT_DIPSETTING( 0x40, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x80, DEF_STR( Hard ) )
PORT_DIPSETTING( 0xc0, DEF_STR( Harder ) )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!1,!2")
+ PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:!1,!2")
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0x0c, 0x00, "Coin 2" ) PORT_DIPLOCATION("SW2:!3,!4")
+ PORT_DIPNAME( 0x0c, 0x00, "Coin 2" ) PORT_DIPLOCATION("SW2:!3,!4")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x04, "*4" )
PORT_DIPSETTING( 0x08, "*5" )
PORT_DIPSETTING( 0x0c, "*6" )
- PORT_DIPNAME( 0x10, 0x00, "Coin 3" ) PORT_DIPLOCATION("SW2:!5")
+ PORT_DIPNAME( 0x10, 0x00, "Coin 3" ) PORT_DIPLOCATION("SW2:!5")
PORT_DIPSETTING( 0x00, "*1" )
PORT_DIPSETTING( 0x10, "*2" )
- PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!6,!7,!8")
+ PORT_DIPNAME( 0xe0, 0x00, "Bonus Coins" ) PORT_DIPLOCATION("SW2:!6,!7,!8")
PORT_DIPSETTING( 0x00, DEF_STR( None ) )
PORT_DIPSETTING( 0x20, "3 credits/2 coins" )
PORT_DIPSETTING( 0x40, "5 credits/4 coins" )
@@ -1540,10 +1540,10 @@ INPUT_PORTS_END
static INPUT_PORTS_START( bullsdrt )
PORT_START("IN0")
- PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
+ PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
PORT_BIT( 0x30, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
@@ -1556,9 +1556,9 @@ static INPUT_PORTS_START( bullsdrt )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_START("IN2")
- PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
+ PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball data */
PORT_BIT( 0x70, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* trackball sign bit */
PORT_START("DSW1")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
@@ -1612,10 +1612,10 @@ static INPUT_PORTS_START( bullsdrt )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("TRACK0_X") /* fake trackball input port. */
+ PORT_START("TRACK0_X") /* fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE
- PORT_START("TRACK0_Y") /* fake trackball input port. */
+ PORT_START("TRACK0_Y") /* fake trackball input port. */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
/* 2008-06 FP: was bullsdrt available as cocktail? If not, these can be removed */
@@ -1738,7 +1738,7 @@ static const pokey_interface warlords_pokey_interface =
static const sn76496_config psg_intf =
{
- DEVCB_NULL
+ DEVCB_NULL
};
@@ -1751,7 +1751,7 @@ static const sn76496_config psg_intf =
static MACHINE_CONFIG_START( centiped_base, centiped_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6502, 12096000/8) /* 1.512 MHz (slows down to 0.75MHz while accessing playfield RAM) */
+ MCFG_CPU_ADD("maincpu", M6502, 12096000/8) /* 1.512 MHz (slows down to 0.75MHz while accessing playfield RAM) */
MCFG_MACHINE_START_OVERRIDE(centiped_state,centiped)
MCFG_MACHINE_RESET_OVERRIDE(centiped_state,centiped)
diff --git a/src/mame/drivers/cesclass.c b/src/mame/drivers/cesclass.c
index f4f6f79310e..78a752b0cfd 100644
--- a/src/mame/drivers/cesclass.c
+++ b/src/mame/drivers/cesclass.c
@@ -107,10 +107,10 @@ WRITE16_MEMBER( cesclassic_state::lamps_w )
WRITE16_MEMBER( cesclassic_state::outputs_w )
{
/*
- -x-- ---- OKI bankswitch
- --x- ---- probably screen enable
- ---- --x- coin counter
- */
+ -x-- ---- OKI bankswitch
+ --x- ---- probably screen enable
+ ---- --x- coin counter
+ */
m_oki->set_bank_base((data & 0x40) ? 0x40000 : 0);
coin_counter_w(machine(), 0, data & 2);
if(data & ~0x62)
diff --git a/src/mame/drivers/chaknpop.c b/src/mame/drivers/chaknpop.c
index 7e99be833b9..c78da89b6d2 100644
--- a/src/mame/drivers/chaknpop.c
+++ b/src/mame/drivers/chaknpop.c
@@ -153,20 +153,20 @@ static ADDRESS_MAP_START( chaknpop_map, AS_PROGRAM, 8, chaknpop_state )
AM_RANGE(0x880a, 0x880a) AM_READ_PORT("SYSTEM")
AM_RANGE(0x880b, 0x880b) AM_READ_PORT("P2")
AM_RANGE(0x880c, 0x880c) AM_READWRITE(chaknpop_gfxmode_r, chaknpop_gfxmode_w)
- AM_RANGE(0x880d, 0x880d) AM_WRITE(coinlock_w) // coin lock out
- AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(chaknpop_txram_w) AM_SHARE("tx_ram") // TX tilemap
- AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(chaknpop_attrram_w) AM_SHARE("attr_ram") // Color attribute
- AM_RANGE(0x9840, 0x98ff) AM_RAM AM_SHARE("spr_ram") // sprite
+ AM_RANGE(0x880d, 0x880d) AM_WRITE(coinlock_w) // coin lock out
+ AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(chaknpop_txram_w) AM_SHARE("tx_ram") // TX tilemap
+ AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(chaknpop_attrram_w) AM_SHARE("attr_ram") // Color attribute
+ AM_RANGE(0x9840, 0x98ff) AM_RAM AM_SHARE("spr_ram") // sprite
AM_RANGE(0xa000, 0xbfff) AM_ROM
- AM_RANGE(0xc000, 0xffff) AM_RAMBANK("bank1") // bitmap plane 1-4
+ AM_RANGE(0xc000, 0xffff) AM_RAMBANK("bank1") // bitmap plane 1-4
ADDRESS_MAP_END
static const ay8910_interface ay8910_interface_1 =
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
- DEVCB_INPUT_PORT("DSWA"), // DSW A
- DEVCB_INPUT_PORT("DSWB"), // DSW B
+ DEVCB_INPUT_PORT("DSWA"), // DSW A
+ DEVCB_INPUT_PORT("DSWB"), // DSW B
DEVCB_NULL,
DEVCB_NULL
};
@@ -177,8 +177,8 @@ static const ay8910_interface ay8910_interface_2 =
AY8910_DEFAULT_LOADS,
DEVCB_NULL,
DEVCB_NULL,
- DEVCB_DRIVER_MEMBER(chaknpop_state,unknown_port_1_w), // ??
- DEVCB_DRIVER_MEMBER(chaknpop_state,unknown_port_2_w) // ??
+ DEVCB_DRIVER_MEMBER(chaknpop_state,unknown_port_1_w), // ??
+ DEVCB_DRIVER_MEMBER(chaknpop_state,unknown_port_2_w) // ??
};
@@ -192,8 +192,8 @@ static INPUT_PORTS_START( chaknpop )
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) // LEFT COIN
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) // RIGHT COIN
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) // LEFT COIN
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) // RIGHT COIN
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
@@ -220,57 +220,57 @@ static INPUT_PORTS_START( chaknpop )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("DSWC")
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Language ) ) PORT_DIPLOCATION("SWC:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Language ) ) PORT_DIPLOCATION("SWC:1")
PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPSETTING( 0x01, DEF_STR( Japanese ) )
- PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWC:2")
+ PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWC:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, "Super Chack'n" ) PORT_DIPLOCATION("SWC:3")
+ PORT_DIPNAME( 0x04, 0x04, "Super Chack'n" ) PORT_DIPLOCATION("SWC:3")
PORT_DIPSETTING( 0x04, "pi" )
PORT_DIPSETTING( 0x00, "1st Chance" )
- PORT_DIPNAME( 0x08, 0x08, "Endless (Cheat)") PORT_DIPLOCATION("SWC:4")
+ PORT_DIPNAME( 0x08, 0x08, "Endless (Cheat)") PORT_DIPLOCATION("SWC:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Credit Info" ) PORT_DIPLOCATION("SWC:5")
+ PORT_DIPNAME( 0x10, 0x10, "Credit Info" ) PORT_DIPLOCATION("SWC:5")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "Show Year" ) PORT_DIPLOCATION("SWC:6")
+ PORT_DIPNAME( 0x20, 0x20, "Show Year" ) PORT_DIPLOCATION("SWC:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Infinite (Cheat)") PORT_DIPLOCATION("SWC:7")
+ PORT_DIPNAME( 0x40, 0x40, "Infinite (Cheat)") PORT_DIPLOCATION("SWC:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWC:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWC:8")
PORT_DIPSETTING( 0x00, "1 Way" )
PORT_DIPSETTING( 0x80, "2 Way" )
PORT_START("DSWB")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SWB:1,2")
PORT_DIPSETTING( 0x00, "80k and every 100k" )
PORT_DIPSETTING( 0x01, "60k and every 100k" )
PORT_DIPSETTING( 0x02, "40k and every 100k" )
PORT_DIPSETTING( 0x03, "20k and every 100k" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SWB:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SWB:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x18, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:4,5")
+ PORT_DIPNAME( 0x18, 0x08, DEF_STR( Lives ) ) PORT_DIPLOCATION("SWB:4,5")
PORT_DIPSETTING( 0x00, "6" )
PORT_DIPSETTING( 0x08, "3" )
PORT_DIPSETTING( 0x10, "2" )
PORT_DIPSETTING( 0x18, "1" )
- PORT_DIPNAME( 0x20, 0x00, "Training/Difficulty" ) PORT_DIPLOCATION("SWB:6")
+ PORT_DIPNAME( 0x20, 0x00, "Training/Difficulty" ) PORT_DIPLOCATION("SWB:6")
PORT_DIPSETTING( 0x20, "Off/Every 10 Min." )
PORT_DIPSETTING( 0x00, "On/Every 7 Min." )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWB:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWB:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWB:8")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x80, DEF_STR( Cocktail ) )
PORT_START("DSWA")
- PORT_DIPNAME(0x0f, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:1,2,3,4")
+ PORT_DIPNAME(0x0f, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWA:1,2,3,4")
PORT_DIPSETTING( 0x0f, DEF_STR( 9C_1C ) )
PORT_DIPSETTING( 0x0e, DEF_STR( 8C_1C ) )
PORT_DIPSETTING( 0x0d, DEF_STR( 7C_1C ) )
@@ -287,7 +287,7 @@ static INPUT_PORTS_START( chaknpop )
PORT_DIPSETTING( 0x05, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x06, DEF_STR( 1C_7C ) )
PORT_DIPSETTING( 0x07, DEF_STR( 1C_8C ) )
- PORT_DIPNAME(0xf0, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWA:5,6,7,8")
+ PORT_DIPNAME(0xf0, 0x00, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWA:5,6,7,8")
PORT_DIPSETTING( 0xf0, DEF_STR( 9C_1C ) )
PORT_DIPSETTING( 0xe0, DEF_STR( 8C_1C ) )
PORT_DIPSETTING( 0xd0, DEF_STR( 7C_1C ) )
@@ -315,26 +315,26 @@ INPUT_PORTS_END
static const gfx_layout spritelayout =
{
- 16,16, /* 16*16 characters */
- 256, /* 256 characters */
- 2, /* 2 bits per pixel */
- { 0, 0x2000*8 }, /* the two bitplanes are separated */
+ 16,16, /* 16*16 characters */
+ 256, /* 256 characters */
+ 2, /* 2 bits per pixel */
+ { 0, 0x2000*8 }, /* the two bitplanes are separated */
{ 0, 1, 2, 3, 4, 5, 6, 7 ,
8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
16*8, 17*8, 18*8, 19*8, 20*8, 21*8, 22*8, 23*8 },
- 32*8 /* every sprite takes 32 consecutive bytes */
+ 32*8 /* every sprite takes 32 consecutive bytes */
};
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 characters */
- 1024, /* 1024 characters */
- 2, /* 2 bits per pixel */
- { 0, 0x2000*8 }, /* the two bitplanes are separated */
+ 8,8, /* 8*8 characters */
+ 1024, /* 1024 characters */
+ 2, /* 2 bits per pixel */
+ { 0, 0x2000*8 }, /* the two bitplanes are separated */
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static GFXDECODE_START( chaknpop )
@@ -373,7 +373,7 @@ void chaknpop_state::machine_reset()
static MACHINE_CONFIG_START( chaknpop, chaknpop_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, XTAL_18MHz / 6) /* Verified on PCB */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_18MHz / 6) /* Verified on PCB */
MCFG_CPU_PROGRAM_MAP(chaknpop_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", chaknpop_state, irq0_line_hold)
@@ -393,11 +393,11 @@ static MACHINE_CONFIG_START( chaknpop, chaknpop_state )
/* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono")
- MCFG_SOUND_ADD("ay1", AY8910, XTAL_18MHz / 12) /* Verified on PCB */
+ MCFG_SOUND_ADD("ay1", AY8910, XTAL_18MHz / 12) /* Verified on PCB */
MCFG_SOUND_CONFIG(ay8910_interface_1)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
- MCFG_SOUND_ADD("ay2", AY8910, XTAL_18MHz / 12) /* Verified on PCB */
+ MCFG_SOUND_ADD("ay2", AY8910, XTAL_18MHz / 12) /* Verified on PCB */
MCFG_SOUND_CONFIG(ay8910_interface_2)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
MACHINE_CONFIG_END
@@ -410,25 +410,25 @@ MACHINE_CONFIG_END
***************************************************************************/
ROM_START( chaknpop )
- ROM_REGION( 0x18000, "maincpu", 0 ) /* Main CPU */
+ ROM_REGION( 0x18000, "maincpu", 0 ) /* Main CPU */
ROM_LOAD( "ao4_01.ic28", 0x00000, 0x2000, CRC(386fe1c8) SHA1(cca24abfb8a7f439251e7936036475c694002561) )
ROM_LOAD( "ao4_02.ic27", 0x02000, 0x2000, CRC(5562a6a7) SHA1(0c5d81f9aaf858f88007a6bca7f83dc3ef59c5b5) )
ROM_LOAD( "ao4_03.ic26", 0x04000, 0x2000, CRC(3e2f0a9c) SHA1(f1cf87a4cb07f77104d4a4d369807dac522e052c) )
ROM_LOAD( "ao4_04.ic25", 0x06000, 0x2000, CRC(5209c7d4) SHA1(dcba785a697df55d84d65735de38365869a1da9d) )
ROM_LOAD( "ao4_05.ic3", 0x0a000, 0x2000, CRC(8720e024) SHA1(99e445c117d1501a245f9eb8d014abc4712b4963) )
- ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the Motorola MC68705P5 Micro-controller */
+ ROM_REGION( 0x0800, "mcu", 0 ) /* 2k for the Motorola MC68705P5 Micro-controller */
ROM_LOAD( "ao4_06.ic23", 0x0000, 0x0800, NO_DUMP )
- ROM_REGION( 0x4000, "gfx1", 0 ) /* Sprite */
+ ROM_REGION( 0x4000, "gfx1", 0 ) /* Sprite */
ROM_LOAD( "ao4_08.ic14", 0x0000, 0x2000, CRC(5575a021) SHA1(c2fad53fe6a12c19cec69d27c13fce6aea2502f2) )
ROM_LOAD( "ao4_07.ic15", 0x2000, 0x2000, CRC(ae687c18) SHA1(65b25263da88d30cbc0dad94511869596e5c975a) )
- ROM_REGION( 0x4000, "gfx2", 0 ) /* Text */
+ ROM_REGION( 0x4000, "gfx2", 0 ) /* Text */
ROM_LOAD( "ao4_09.ic98", 0x0000, 0x2000, CRC(757a723a) SHA1(62ab84d2aaa9bc1ea5aa9df8155aa3b5a1e93889) )
ROM_LOAD( "ao4_10.ic97", 0x2000, 0x2000, CRC(3e3fd608) SHA1(053a8fbdb35bf1c142349f78a63e8cd1adb41ef6) )
- ROM_REGION( 0x0800, "proms", 0 ) /* Palette */
+ ROM_REGION( 0x0800, "proms", 0 ) /* Palette */
ROM_LOAD( "ao4-11.ic96", 0x0000, 0x0400, CRC(9bf0e85f) SHA1(44f0a4712c99a715dec54060afb0b27dc48998b4) )
ROM_LOAD( "ao4-12.ic95", 0x0400, 0x0400, CRC(954ce8fc) SHA1(e187f9e2cb754264d149c2896ca949dea3bcf2eb) )
ROM_END
diff --git a/src/mame/drivers/cham24.c b/src/mame/drivers/cham24.c
index 99f9fd9e612..3e6b710bb3f 100644
--- a/src/mame/drivers/cham24.c
+++ b/src/mame/drivers/cham24.c
@@ -236,13 +236,13 @@ WRITE8_MEMBER(cham24_state::cham24_mapper_w)
}
static ADDRESS_MAP_START( cham24_map, AS_PROGRAM, 8, cham24_state )
- AM_RANGE(0x0000, 0x07ff) AM_RAM /* NES RAM */
+ AM_RANGE(0x0000, 0x07ff) AM_RAM /* NES RAM */
AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write)
- AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE_LEGACY("nes", nes_psg_r, nes_psg_w) /* PSG primary registers */
+ AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE_LEGACY("nes", nes_psg_r, nes_psg_w) /* PSG primary registers */
AM_RANGE(0x4014, 0x4014) AM_WRITE(sprite_dma_w)
- AM_RANGE(0x4015, 0x4015) AM_READWRITE(psg_4015_r, psg_4015_w) /* PSG status / first control register */
- AM_RANGE(0x4016, 0x4016) AM_READWRITE(cham24_IN0_r, cham24_IN0_w) /* IN0 - input port 1 */
- AM_RANGE(0x4017, 0x4017) AM_READ(cham24_IN1_r) AM_WRITE(psg_4017_w) /* IN1 - input port 2 / PSG second control register */
+ AM_RANGE(0x4015, 0x4015) AM_READWRITE(psg_4015_r, psg_4015_w) /* PSG status / first control register */
+ AM_RANGE(0x4016, 0x4016) AM_READWRITE(cham24_IN0_r, cham24_IN0_w) /* IN0 - input port 1 */
+ AM_RANGE(0x4017, 0x4017) AM_READ(cham24_IN1_r) AM_WRITE(psg_4017_w) /* IN1 - input port 2 / PSG second control register */
AM_RANGE(0x8000, 0xffff) AM_ROM AM_WRITE(cham24_mapper_w)
ADDRESS_MAP_END
@@ -250,7 +250,7 @@ static INPUT_PORTS_START( cham24 )
PORT_START("P1") /* IN0 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) /* Select */
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1) /* Select */
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_PLAYER(1)
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
@@ -260,7 +260,7 @@ static INPUT_PORTS_START( cham24 )
PORT_START("P2") /* IN1 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2)
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) /* Select */
+ PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2) /* Select */
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_START ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
@@ -293,10 +293,10 @@ static const ppu2c0x_interface ppu_interface =
{
"maincpu",
"screen",
- 0, /* gfxlayout num */
- 0, /* color base */
- PPU_MIRROR_NONE, /* mirroring */
- ppu_irq /* irq */
+ 0, /* gfxlayout num */
+ 0, /* color base */
+ PPU_MIRROR_NONE, /* mirroring */
+ ppu_irq /* irq */
};
void cham24_state::video_start()
diff --git a/src/mame/drivers/champbas.c b/src/mame/drivers/champbas.c
index 830b357e708..59b8adc974a 100644
--- a/src/mame/drivers/champbas.c
+++ b/src/mame/drivers/champbas.c
@@ -187,23 +187,23 @@ READ8_MEMBER(champbas_state::champbja_alt_protection_r)
{
UINT8 data = 0;
/*
- (68BA) & 0x99 == 0x00
- (6867) & 0x99 == 0x99
- (68AB) & 0x80 == 0x80
- (6854) & 0x99 == 0x19
+ (68BA) & 0x99 == 0x00
+ (6867) & 0x99 == 0x99
+ (68AB) & 0x80 == 0x80
+ (6854) & 0x99 == 0x19
- BA 1011_1010
- 00 0--0_0--0
+ BA 1011_1010
+ 00 0--0_0--0
- 54 0101_0100
- 19 0--1_1--1
+ 54 0101_0100
+ 19 0--1_1--1
- 67 0110_0111
- 99 1--1_1--1
+ 67 0110_0111
+ 99 1--1_1--1
- AB 1010_1011
- 80 1--0_0--0
- */
+ AB 1010_1011
+ 80 1--0_0--0
+ */
/* bit7 = bit0 */
if ((offset & 0x01))
@@ -237,7 +237,7 @@ static ADDRESS_MAP_START( talbot_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0xa0c0, 0xa0c0) AM_READ_PORT("SYSTEM")
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_enable_w)
- AM_RANGE(0xa001, 0xa001) AM_WRITENOP // !WORK board output (no use?)
+ AM_RANGE(0xa001, 0xa001) AM_WRITENOP // !WORK board output (no use?)
AM_RANGE(0xa002, 0xa002) AM_WRITENOP
AM_RANGE(0xa003, 0xa003) AM_WRITE(champbas_flipscreen_w)
AM_RANGE(0xa004, 0xa004) AM_WRITENOP
@@ -254,7 +254,7 @@ static ADDRESS_MAP_START( champbas_main_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x63ff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x7000, 0x7001) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_address_w)
- AM_RANGE(0x7800, 0x7fff) AM_ROM // champbb2 only
+ AM_RANGE(0x7800, 0x7fff) AM_ROM // champbb2 only
AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(champbas_bg_videoram_w) AM_SHARE("bg_videoram")
AM_RANGE(0x8800, 0x8fef) AM_RAM
AM_RANGE(0x8ff0, 0x8fff) AM_RAM AM_SHARE("spriteram")
@@ -265,13 +265,13 @@ static ADDRESS_MAP_START( champbas_main_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0xa0c0, 0xa0c0) AM_READ_PORT("SYSTEM")
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_enable_w)
- AM_RANGE(0xa001, 0xa001) AM_WRITENOP // !WORK board output (no use?)
+ AM_RANGE(0xa001, 0xa001) AM_WRITENOP // !WORK board output (no use?)
AM_RANGE(0xa002, 0xa002) AM_WRITE(champbas_gfxbank_w)
AM_RANGE(0xa003, 0xa003) AM_WRITE(champbas_flipscreen_w)
AM_RANGE(0xa004, 0xa004) AM_WRITE(champbas_palette_bank_w)
- AM_RANGE(0xa005, 0xa005) AM_WRITENOP // n.c.
- AM_RANGE(0xa006, 0xa006) AM_WRITE(champbas_mcu_halt_w) // MCU not present/not used in champbas
- AM_RANGE(0xa007, 0xa007) AM_WRITE(champbas_mcu_switch_w) // MCU not present/not used in champbas
+ AM_RANGE(0xa005, 0xa005) AM_WRITENOP // n.c.
+ AM_RANGE(0xa006, 0xa006) AM_WRITE(champbas_mcu_halt_w) // MCU not present/not used in champbas
+ AM_RANGE(0xa007, 0xa007) AM_WRITE(champbas_mcu_switch_w) // MCU not present/not used in champbas
AM_RANGE(0xa060, 0xa06f) AM_RAM AM_SHARE("spriteram_2")
AM_RANGE(0xa080, 0xa080) AM_WRITE(soundlatch_byte_w)
@@ -296,11 +296,11 @@ static ADDRESS_MAP_START( exctsccrb_main_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0xa0c0, 0xa0c0) AM_READ_PORT("SYSTEM")
AM_RANGE(0xa000, 0xa000) AM_WRITE(irq_enable_w)
- AM_RANGE(0xa001, 0xa001) AM_WRITENOP /* ??? */
+ AM_RANGE(0xa001, 0xa001) AM_WRITENOP /* ??? */
AM_RANGE(0xa002, 0xa002) AM_WRITE(champbas_gfxbank_w)
AM_RANGE(0xa003, 0xa003) AM_WRITE(champbas_flipscreen_w)
- AM_RANGE(0xa006, 0xa006) AM_WRITENOP /* MCU is not used, but some leftover code still writes here */
- AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* MCU is not used, but some leftover code still writes here */
+ AM_RANGE(0xa006, 0xa006) AM_WRITENOP /* MCU is not used, but some leftover code still writes here */
+ AM_RANGE(0xa007, 0xa007) AM_WRITENOP /* MCU is not used, but some leftover code still writes here */
AM_RANGE(0xa040, 0xa06f) AM_WRITEONLY AM_SHARE("spriteram") /* Sprite Pos */
AM_RANGE(0xa080, 0xa080) AM_WRITE(soundlatch_byte_w)
@@ -337,7 +337,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( champbas_sub_map, AS_PROGRAM, 8, champbas_state )
AM_RANGE(0x0000, 0x5fff) AM_ROM
AM_RANGE(0x6000, 0x7fff) AM_READ(soundlatch_byte_r)
- AM_RANGE(0x8000, 0x9fff) AM_WRITENOP // 4-bit return code to main CPU (not used)
+ AM_RANGE(0x8000, 0x9fff) AM_WRITENOP // 4-bit return code to main CPU (not used)
AM_RANGE(0xa000, 0xbfff) AM_WRITE(soundlatch_clear_byte_w)
AM_RANGE(0xc000, 0xdfff) AM_WRITE(champbas_dac_w)
AM_RANGE(0xe000, 0xe3ff) AM_MIRROR(0x1c00) AM_RAM
@@ -411,7 +411,7 @@ static INPUT_PORTS_START( talbot )
PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) )
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )
- PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, champbas_state,champbas_watchdog_bit2, NULL) // bit 2 of the watchdog counter
+ PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, champbas_state,champbas_watchdog_bit2, NULL) // bit 2 of the watchdog counter
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
@@ -428,16 +428,16 @@ static INPUT_PORTS_START( champbas )
PORT_INCLUDE( talbot )
PORT_MODIFY("P1")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // throw (red)
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // throw (red)
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) // changes (blue)
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // steal (yellow)
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) // changes (blue)
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) // steal (yellow)
PORT_MODIFY("P2")
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL // steal (yellow)
- PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL // changes (blue)
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL // steal (yellow)
+ PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL // changes (blue)
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_COCKTAIL
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL // throw (red)
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL // throw (red)
PORT_MODIFY("DSW")
PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) )
@@ -458,7 +458,7 @@ static INPUT_PORTS_START( champbas )
PORT_DIPSETTING( 0x20, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hard ))
PORT_DIPUNKNOWN( 0x40, 0x00 )
- PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, champbas_state,champbas_watchdog_bit2, NULL) // bit 2 of the watchdog counter
+ PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, champbas_state,champbas_watchdog_bit2, NULL) // bit 2 of the watchdog counter
INPUT_PORTS_END
static INPUT_PORTS_START( exctsccr )
@@ -484,7 +484,7 @@ static INPUT_PORTS_START( exctsccr )
PORT_DIPSETTING( 0x00, "2 Min." )
PORT_DIPSETTING( 0x60, "3 Min." )
PORT_DIPSETTING( 0x40, "4 Min." )
- PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, champbas_state,champbas_watchdog_bit2, NULL) // bit 2 of the watchdog counter
+ PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, champbas_state,champbas_watchdog_bit2, NULL) // bit 2 of the watchdog counter
INPUT_PORTS_END
@@ -600,7 +600,7 @@ MACHINE_RESET_MEMBER(champbas_state,champbas)
{
m_palette_bank = 0;
- m_gfx_bank = 0; // talbot has only 1 bank
+ m_gfx_bank = 0; // talbot has only 1 bank
}
INTERRUPT_GEN_MEMBER(champbas_state::vblank_irq)
@@ -711,7 +711,7 @@ static MACHINE_CONFIG_START( exctsccr, champbas_state )
MCFG_CPU_PERIODIC_INT_DRIVER(champbas_state, nmi_line_pulse, 4000) /* 4 kHz, updates the dac */
/* MCU */
- MCFG_CPU_ADD(CPUTAG_MCU, ALPHA8301, XTAL_18_432MHz/6/8) /* Actually 8302 */
+ MCFG_CPU_ADD(CPUTAG_MCU, ALPHA8301, XTAL_18_432MHz/6/8) /* Actually 8302 */
MCFG_CPU_PROGRAM_MAP(mcu_map)
MCFG_MACHINE_START_OVERRIDE(champbas_state,exctsccr)
@@ -812,10 +812,10 @@ ROM_START( talbot )
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "8201.bin", 0x0000, 0x2000, CRC(b77931ac) SHA1(405b02585e80d95a2821455538c5c2c31ce262d1) )
- ROM_REGION( 0x1000, "gfx1", 0 ) // chars
+ ROM_REGION( 0x1000, "gfx1", 0 ) // chars
ROM_LOAD( "7.6a", 0x0000, 0x1000, CRC(bde14194) SHA1(f8f569342a3094eb5450a30b8ab87901b98e6061) )
- ROM_REGION( 0x1000, "gfx2", 0 ) // sprites
+ ROM_REGION( 0x1000, "gfx2", 0 ) // sprites
ROM_LOAD( "8.6b", 0x0000, 0x1000, CRC(ddcd227a) SHA1(c44de36311cd173afb3eebf8487305b06e069c0f) )
ROM_REGION( 0x0120, "proms", 0 )
@@ -834,10 +834,10 @@ ROM_START( champbas )
ROM_LOAD( "champbb.7", 0x2000, 0x2000, CRC(7c01715f) SHA1(b15b2001b8c110f2599eee3aeed79f67686ebd7e) )
ROM_LOAD( "champbb.8", 0x4000, 0x2000, CRC(3c911786) SHA1(eea0c467e213d237b5bb9d04b19a418d6090c2dc) )
- ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "champbb.4", 0x0000, 0x2000, CRC(1930fb52) SHA1(cae0b2701c2b53b79e9df3a7496442ba3472e996) )
- ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "champbb.5", 0x0000, 0x2000, CRC(a4cef5a1) SHA1(fa00ed0d075e00992a1ddce3c1327ed74770a735) )
ROM_REGION( 0x0120, "proms", 0 )
@@ -859,10 +859,10 @@ ROM_START( champbasj )
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "8201.bin", 0x0000, 0x2000, CRC(b77931ac) SHA1(405b02585e80d95a2821455538c5c2c31ce262d1) )
- ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "14.5e", 0x0000, 0x2000, CRC(1b8202b3) SHA1(889b77fc3d0cb029baf8c47be260f513f3ed59bd) )
- ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "15.5g", 0x0000, 0x2000, CRC(a67c0c40) SHA1(3845839eff8c1624d26937f28ffde67a5fcb4805) )
ROM_REGION( 0x0120, "proms", 0 )
@@ -881,10 +881,10 @@ ROM_START( champbasja )
ROM_LOAD( "17.2l", 0x2000, 0x2000, CRC(f10b148b) SHA1(d66516d509f6f16e51ee59d27c4867e276064c3f) )
ROM_LOAD( "18.2n", 0x4000, 0x2000, CRC(2dc484dd) SHA1(28bd68c787d7e6989849ca52009948dbd5cdcc79) )
- ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "14.5e", 0x0000, 0x2000, CRC(1b8202b3) SHA1(889b77fc3d0cb029baf8c47be260f513f3ed59bd) )
- ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "15.5g", 0x0000, 0x2000, CRC(a67c0c40) SHA1(3845839eff8c1624d26937f28ffde67a5fcb4805) )
ROM_REGION( 0x0120, "proms", 0 )
@@ -908,10 +908,10 @@ ROM_START( champbb2 )
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "8302.bin", 0x0000, 0x2000, CRC(edabac6c) SHA1(eaf1c51b63023256df526b0d3fd53cffc919c901) )
- ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "epr5936", 0x0000, 0x2000, CRC(c4a4df75) SHA1(7b85dbf405697b0b8881f910c08f6db6c828b19a) )
- ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "epr5937", 0x0000, 0x2000, CRC(5c80ec42) SHA1(9b79737577e48a6b2ec20ce145252545955e82c3) )
ROM_REGION( 0x0120, "proms", 0 )
@@ -936,10 +936,10 @@ ROM_START( champbb2a )
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "8302.bin", 0x0000, 0x2000, CRC(edabac6c) SHA1(eaf1c51b63023256df526b0d3fd53cffc919c901) )
- ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "epr5936", 0x0000, 0x2000, CRC(c4a4df75) SHA1(7b85dbf405697b0b8881f910c08f6db6c828b19a) )
- ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "epr5937", 0x0000, 0x2000, CRC(5c80ec42) SHA1(9b79737577e48a6b2ec20ce145252545955e82c3) )
ROM_REGION( 0x0120, "proms", 0 )
@@ -964,10 +964,10 @@ ROM_START( champbb2j )
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "8302.bin", 0x0000, 0x2000, CRC(edabac6c) SHA1(eaf1c51b63023256df526b0d3fd53cffc919c901) )
- ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x2000, "gfx1", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "4.6a", 0x0000, 0x2000, CRC(c4a4df75) SHA1(7b85dbf405697b0b8881f910c08f6db6c828b19a) )
- ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x2000, "gfx2", 0 ) // chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "5.6b", 0x0000, 0x2000, CRC(5c80ec42) SHA1(9b79737577e48a6b2ec20ce145252545955e82c3) )
ROM_REGION( 0x0120, "proms", 0 )
@@ -988,14 +988,14 @@ ROM_START( exctsccr ) /* Teams: ITA AUS GBR FRA FRG BRA */
ROM_LOAD( "7_c6.bin", 0x6000, 0x2000, CRC(6d51521e) SHA1(2809bd2e61f40dcd31d43c62520982bdcfb0a865) )
ROM_LOAD( "1_a6.bin", 0x8000, 0x1000, CRC(20f2207e) SHA1(b1ed2237d0bd50ddbe593fd2fbff9f1d67c1eb11) )
- ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "4_a5.bin", 0x0000, 0x2000, CRC(c342229b) SHA1(a989d6c12521c77882a7e17d4d80afe7eae05906) ) /* planes 0,1 */
ROM_LOAD( "6_c5.bin", 0x2000, 0x2000, CRC(eda40e32) SHA1(6c08fd4f4fb35fd354d02e04548e960c545f6a88) ) /* plane 3 */
- ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "5_b5.bin", 0x0000, 0x2000, CRC(35f4f8c9) SHA1(cdf5bbfea9abdd338938e5f4499d2d71ce3c6237) ) /* planes 0,1 */
- ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
+ ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
ROM_LOAD( "2.5k", 0x0000, 0x1000, CRC(7f9cace2) SHA1(bf05a31716f3ca1c2fd1034cd1f39e2d21cdaed3) )
ROM_LOAD( "3.5l", 0x1000, 0x1000, CRC(db2d9e0d) SHA1(6ec09a47f7aea6bf31eb0ee78f44012f4d92de8a) )
@@ -1018,14 +1018,14 @@ ROM_START( exctsccra ) /* Teams: ITA AUS GBR FRA FRG BRA */
ROM_LOAD( "7_c6.bin", 0x6000, 0x2000, CRC(6d51521e) SHA1(2809bd2e61f40dcd31d43c62520982bdcfb0a865) )
ROM_LOAD( "1_a6.bin", 0x8000, 0x1000, CRC(20f2207e) SHA1(b1ed2237d0bd50ddbe593fd2fbff9f1d67c1eb11) )
- ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "4_a5.bin", 0x0000, 0x2000, CRC(c342229b) SHA1(a989d6c12521c77882a7e17d4d80afe7eae05906) ) /* planes 0,1 */
ROM_LOAD( "6_c5.bin", 0x2000, 0x2000, CRC(eda40e32) SHA1(6c08fd4f4fb35fd354d02e04548e960c545f6a88) ) /* plane 3 */
- ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "5_b5.bin", 0x0000, 0x2000, CRC(35f4f8c9) SHA1(cdf5bbfea9abdd338938e5f4499d2d71ce3c6237) ) /* planes 0,1 */
- ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
+ ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
ROM_LOAD( "2.5k", 0x0000, 0x1000, CRC(7f9cace2) SHA1(bf05a31716f3ca1c2fd1034cd1f39e2d21cdaed3) )
ROM_LOAD( "3.5l", 0x1000, 0x1000, CRC(db2d9e0d) SHA1(6ec09a47f7aea6bf31eb0ee78f44012f4d92de8a) )
@@ -1048,14 +1048,14 @@ ROM_START( exctsccru ) /* Teams: ITA USA GBR FRA FRG BRA */
ROM_LOAD( "7_c6.bin", 0x6000, 0x2000, CRC(6d51521e) SHA1(2809bd2e61f40dcd31d43c62520982bdcfb0a865) )
ROM_LOAD( "1_a6.bin", 0x8000, 0x1000, CRC(20f2207e) SHA1(b1ed2237d0bd50ddbe593fd2fbff9f1d67c1eb11) )
- ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "vr4u.a5", 0x0000, 0x2000, CRC(103bb739) SHA1(335d89b3a374daa3fd1bd3fd66a82e7310303051) ) /* planes 0,1 */
ROM_LOAD( "vr6u.c5", 0x2000, 0x2000, CRC(a5b2b303) SHA1(0dd1912baa8236cba2baa4bc3d2955fd19617be9) ) /* plane 3 */
- ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "5_b5.bin", 0x0000, 0x2000, CRC(35f4f8c9) SHA1(cdf5bbfea9abdd338938e5f4499d2d71ce3c6237) ) /* planes 0,1 */
- ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
+ ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
ROM_LOAD( "2.5k", 0x0000, 0x1000, CRC(7f9cace2) SHA1(bf05a31716f3ca1c2fd1034cd1f39e2d21cdaed3) )
ROM_LOAD( "3.5l", 0x1000, 0x1000, CRC(db2d9e0d) SHA1(6ec09a47f7aea6bf31eb0ee78f44012f4d92de8a) )
@@ -1078,14 +1078,14 @@ ROM_START( exctsccrj ) /* Teams: JPN USA GBR FRA FRG BRA */
ROM_LOAD( "7_c6.bin", 0x6000, 0x2000, CRC(6d51521e) SHA1(2809bd2e61f40dcd31d43c62520982bdcfb0a865) )
ROM_LOAD( "1_a6.bin", 0x8000, 0x1000, CRC(20f2207e) SHA1(b1ed2237d0bd50ddbe593fd2fbff9f1d67c1eb11) )
- ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "4_5a.bin", 0x0000, 0x2000, CRC(74cc71d6) SHA1(ff3d59845bc66ec3335eadf81d799a684182c66f) ) /* planes 0,1 */
ROM_LOAD( "6_5c.bin", 0x2000, 0x2000, CRC(7c4cd1b6) SHA1(141e67fec9b6d6b4380cb941b4d79341787680e3) ) /* plane 3 */
- ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "5_5b.bin", 0x0000, 0x2000, CRC(35f4f8c9) SHA1(cdf5bbfea9abdd338938e5f4499d2d71ce3c6237) ) /* planes 0,1 */
- ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
+ ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
ROM_LOAD( "2.5k", 0x0000, 0x1000, CRC(7f9cace2) SHA1(bf05a31716f3ca1c2fd1034cd1f39e2d21cdaed3) )
ROM_LOAD( "3.5l", 0x1000, 0x1000, CRC(db2d9e0d) SHA1(6ec09a47f7aea6bf31eb0ee78f44012f4d92de8a) )
@@ -1107,14 +1107,14 @@ ROM_START( exctsccrjo ) /* Teams: JPN USA ENG FRA GFR BRA */
ROM_LOAD( "8.6d", 0x4000, 0x2000, CRC(b6b209a5) SHA1(e49a0db65b29337ac6b919237067b1990f2233ab) )
ROM_LOAD( "7.6c", 0x6000, 0x2000, CRC(8856452a) SHA1(4494c225c9df97da09c180caadb4dda49d0d5392) )
- ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "4.5a", 0x0000, 0x2000, CRC(c4259307) SHA1(7bd4e229a5e1a5136826a57aa61810fcdf9c5027) ) /* planes 0,1 */
ROM_LOAD( "6.5c", 0x2000, 0x2000, CRC(cca53367) SHA1(f06ebf2ab8f8f10cfe118af490017972990e3073) ) /* plane 3 */
- ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "5.5b", 0x0000, 0x2000, CRC(851d1a18) SHA1(2cfad530c8f9d95094fd0aacd2e0965b0300898c) ) /* planes 0,1 */
- ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
+ ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
ROM_LOAD( "2.5k", 0x0000, 0x1000, CRC(7f9cace2) SHA1(bf05a31716f3ca1c2fd1034cd1f39e2d21cdaed3) )
ROM_LOAD( "3.5l", 0x1000, 0x1000, CRC(db2d9e0d) SHA1(6ec09a47f7aea6bf31eb0ee78f44012f4d92de8a) )
@@ -1147,20 +1147,20 @@ ROM_START( exctsccrb )
ROM_LOAD( "es-2.g2", 0x2000, 0x2000, CRC(5c66e792) SHA1(f7a7f32806965fa926261217cee3159ccd198d49) )
ROM_LOAD( "es-3.h2", 0x4000, 0x2000, CRC(e0d504c0) SHA1(d9a9f37b3a44a05a3f3389aa9617c419a2cee661) )
- ROM_REGION( 0x10000, "sub", 0 ) /* sound */
+ ROM_REGION( 0x10000, "sub", 0 ) /* sound */
ROM_LOAD( "es-a.k2", 0x0000, 0x2000, CRC(99e87b78) SHA1(f12006ff3f6f3c706e06288c97a1446141373432) )
ROM_LOAD( "es-b.l2", 0x2000, 0x2000, CRC(8b3db794) SHA1(dbfed2357c7631bfca6bbd63a23617bc3abf6ca3) )
ROM_LOAD( "es-c.m2", 0x4000, 0x2000, CRC(7bed2f81) SHA1(cbbb0480519cc04a99e8983228b18c9e49a9985d) )
/* the national flags are wrong. This happens on the real board */
- ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "4_a5.bin", 0x0000, 0x2000, CRC(c342229b) SHA1(a989d6c12521c77882a7e17d4d80afe7eae05906) ) /* planes 0,1 */
ROM_LOAD( "6_c5.bin", 0x2000, 0x2000, CRC(eda40e32) SHA1(6c08fd4f4fb35fd354d02e04548e960c545f6a88) ) /* plane 3 */
- ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "5_b5.bin", 0x0000, 0x2000, CRC(35f4f8c9) SHA1(cdf5bbfea9abdd338938e5f4499d2d71ce3c6237) ) /* planes 0,1 */
- ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
+ ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
ROM_LOAD( "2_k5.bin", 0x0000, 0x1000, CRC(7f9cace2) SHA1(bf05a31716f3ca1c2fd1034cd1f39e2d21cdaed3) )
ROM_LOAD( "3_l5.bin", 0x1000, 0x1000, CRC(db2d9e0d) SHA1(6ec09a47f7aea6bf31eb0ee78f44012f4d92de8a) )
@@ -1179,21 +1179,21 @@ ROM_START( exctscc2 )
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "vr.7d", 0x0000, 0x2000, CRC(2c675a43) SHA1(aa0a8dbcae955e3da92c435202f2a1ed238c377e) )
ROM_LOAD( "vr.7e", 0x2000, 0x2000, CRC(e571873d) SHA1(2dfff24f5dac86e92612f40cf3642005c7f36ad3) )
- ROM_LOAD( "8_d6.bin", 0x4000, 0x2000, CRC(88651ee1) SHA1(2052e1b3f9784439369f464e31f4a2b0d1bb0565) ) /* vr.7f */
- ROM_LOAD( "7_c6.bin", 0x6000, 0x2000, CRC(6d51521e) SHA1(2809bd2e61f40dcd31d43c62520982bdcfb0a865) ) /* vr.7h */
- ROM_LOAD( "1_a6.bin", 0x8000, 0x1000, CRC(20f2207e) SHA1(b1ed2237d0bd50ddbe593fd2fbff9f1d67c1eb11) ) /* vr.7k */
+ ROM_LOAD( "8_d6.bin", 0x4000, 0x2000, CRC(88651ee1) SHA1(2052e1b3f9784439369f464e31f4a2b0d1bb0565) ) /* vr.7f */
+ ROM_LOAD( "7_c6.bin", 0x6000, 0x2000, CRC(6d51521e) SHA1(2809bd2e61f40dcd31d43c62520982bdcfb0a865) ) /* vr.7h */
+ ROM_LOAD( "1_a6.bin", 0x8000, 0x1000, CRC(20f2207e) SHA1(b1ed2237d0bd50ddbe593fd2fbff9f1d67c1eb11) ) /* vr.7k */
ROM_REGION( 0x2000, "mcu", 0 )
ROM_LOAD( "8303.bin", 0x0000, 0x2000, CRC(66adcb37) SHA1(e1c72ecb161129dcbddc0b16dd90e716d0c79311) )
- ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
+ ROM_REGION( 0x04000, "gfx1", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only chars
ROM_LOAD( "vr.5a", 0x0000, 0x2000, CRC(4ff1783d) SHA1(c45074864c3a4bcbf3a87d164027ae16dca53d9c) ) /* planes 0,1 */
ROM_LOAD( "vr.5c", 0x2000, 0x2000, CRC(1fb84ee6) SHA1(56ceb86c509be783f806403ac21e7c9684760d5f) ) /* plane 3 */
- ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
+ ROM_REGION( 0x04000, "gfx2", 0 ) // 3bpp chars + sprites: rearranged by DRIVER_INIT to leave only sprites
ROM_LOAD( "vr.5b", 0x0000, 0x2000, CRC(5605b60b) SHA1(19d5909896ae4a3d7552225c369d30475c56793b) ) /* planes 0,1 */
- ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
+ ROM_REGION( 0x02000, "gfx3", 0 ) // 4bpp sprites
ROM_LOAD( "vr.5k", 0x0000, 0x1000, CRC(1d37edfa) SHA1(184fa6dd7b1b3fff4c5fc19b42301ccb7979ac84) )
ROM_LOAD( "vr.5l", 0x1000, 0x1000, CRC(b97f396c) SHA1(4ffe512acf047230bd593911a615fc0ef66b481d) )
@@ -1268,7 +1268,7 @@ GAME( 1983, champbas, 0, champbas, champbas, champbas_state, champbas,
GAME( 1983, champbasj, champbas, champmcu, champbas, champbas_state, champbas, ROT0, "Alpha Denshi Co.", "Champion Base Ball (Japan set 1)", GAME_SUPPORTS_SAVE )
GAME( 1983, champbasja, champbas, champbas, champbas, champbas_state, champbas, ROT0, "Alpha Denshi Co.", "Champion Base Ball (Japan set 2)", GAME_SUPPORTS_SAVE )
GAME( 1983, champbb2, 0, champmcu, champbas, champbas_state, champbas, ROT0, "Alpha Denshi Co. (Sega license)", "Champion Base Ball Part-2: Pair Play (set 1)", GAME_SUPPORTS_SAVE )
-GAME( 1983, champbb2a, champbb2, champmcu, champbas, champbas_state, champbas, ROT0, "Alpha Denshi Co.", "Champion Baseball II (set 2)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // no dump
+GAME( 1983, champbb2a, champbb2, champmcu, champbas, champbas_state, champbas, ROT0, "Alpha Denshi Co.", "Champion Baseball II (set 2)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE ) // no dump
GAME( 1983, champbb2j, champbb2, champmcu, champbas, champbas_state, champbas, ROT0, "Alpha Denshi Co.", "Champion Baseball II (Japan)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
GAME( 1983, exctsccr, 0, exctsccr, exctsccr, champbas_state, exctsccr, ROT270, "Alpha Denshi Co.", "Exciting Soccer", GAME_SUPPORTS_SAVE )
diff --git a/src/mame/drivers/champbwl.c b/src/mame/drivers/champbwl.c
index cc0cf91e363..91b57bdac37 100644
--- a/src/mame/drivers/champbwl.c
+++ b/src/mame/drivers/champbwl.c
@@ -213,7 +213,7 @@ static ADDRESS_MAP_START( champbwl_map, AS_PROGRAM, 8, champbwl_state )
AM_RANGE(0xc000, 0xdfff) AM_DEVREADWRITE_LEGACY("x1snd", seta_sound_r, seta_sound_w)
AM_RANGE(0xe000, 0xe2ff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spriteylow_r8, spriteylow_w8)
AM_RANGE(0xe300, 0xe303) AM_MIRROR(0xfc) AM_DEVWRITE_LEGACY("spritegen", spritectrl_w8) /* control registers (0x80 mirror used by Arkanoid 2) */
- AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */
+ AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */
AM_RANGE(0xf000, 0xf000) AM_READ(trackball_r)
AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN0")
@@ -232,11 +232,11 @@ ADDRESS_MAP_END
WRITE8_MEMBER(champbwl_state::doraemon_outputs_w)
{
- coin_counter_w(machine(), 0, data & 1); // coin in counter
- coin_counter_w(machine(), 1, data & 2); // gift out counter
+ coin_counter_w(machine(), 0, data & 1); // coin in counter
+ coin_counter_w(machine(), 1, data & 2); // gift out counter
- coin_lockout_w(machine(), 0, ~data & 8); // coin lockout
- machine().device<ticket_dispenser_device>("hopper")->write(space, 0, (data & 0x04) ? 0x00 : 0x80); // gift out motor
+ coin_lockout_w(machine(), 0, ~data & 8); // coin lockout
+ machine().device<ticket_dispenser_device>("hopper")->write(space, 0, (data & 0x04) ? 0x00 : 0x80); // gift out motor
membank("bank1")->set_entry((data & 0x30) >> 4);
@@ -249,15 +249,15 @@ static ADDRESS_MAP_START( doraemon, AS_PROGRAM, 8, champbwl_state )
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0xa000, 0xafff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spritecodelow_r8, spritecodelow_w8)
AM_RANGE(0xb000, 0xbfff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spritecodehigh_r8, spritecodehigh_w8)
- AM_RANGE(0xc000, 0xc07f) AM_DEVREADWRITE_LEGACY("x1snd", seta_sound_r,seta_sound_w) // Sound
+ AM_RANGE(0xc000, 0xc07f) AM_DEVREADWRITE_LEGACY("x1snd", seta_sound_r,seta_sound_w) // Sound
AM_RANGE(0xe000, 0xe2ff) AM_RAM AM_DEVREADWRITE_LEGACY("spritegen", spriteylow_r8, spriteylow_w8)
AM_RANGE(0xe300, 0xe303) AM_DEVWRITE_LEGACY("spritegen", spritectrl_w8)
- AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */
+ AM_RANGE(0xe800, 0xe800) AM_DEVWRITE_LEGACY("spritegen", spritebgflag_w8) /* enable / disable background transparency */
AM_RANGE(0xf000, 0xf000) AM_READ_PORT("IN0") AM_WRITE(doraemon_outputs_w)
- AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN1") AM_WRITENOP // Ack?
- AM_RANGE(0xf004, 0xf004) AM_WRITENOP // Ack?
- AM_RANGE(0xf006, 0xf006) AM_READ_PORT("DSW") AM_WRITENOP // Ack?
- AM_RANGE(0xf800, 0xf800) AM_WRITENOP // 0
+ AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN1") AM_WRITENOP // Ack?
+ AM_RANGE(0xf004, 0xf004) AM_WRITENOP // Ack?
+ AM_RANGE(0xf006, 0xf006) AM_READ_PORT("DSW") AM_WRITENOP // Ack?
+ AM_RANGE(0xf800, 0xf800) AM_WRITENOP // 0
ADDRESS_MAP_END
@@ -348,17 +348,17 @@ static INPUT_PORTS_START( champbwl )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("FAKEX") /* FAKE */
+ PORT_START("FAKEX") /* FAKE */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X )PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_CENTERDELTA(0)
- PORT_START("FAKEY") /* FAKE */
+ PORT_START("FAKEY") /* FAKE */
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(45) PORT_CENTERDELTA(0) PORT_REVERSE
INPUT_PORTS_END
static INPUT_PORTS_START( doraemon )
- PORT_START("DSW") // f006
+ PORT_START("DSW") // f006
PORT_DIPNAME( 0x0f, 0x09, "Gift Out" )
PORT_DIPSETTING( 0x0f, "2 %" )
PORT_DIPSETTING( 0x0e, "5 %" )
@@ -389,23 +389,23 @@ static INPUT_PORTS_START( doraemon )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("IN0") // f000
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME( "Data Clear" )
+ PORT_START("IN0") // f000
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME( "Data Clear" )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE3 ) PORT_NAME( "Freeze" )
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE3 ) PORT_NAME( "Freeze" )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN1") // f002
+ PORT_START("IN1") // f002
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) // sensor
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) // sensor
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
INPUT_PORTS_END
@@ -431,7 +431,7 @@ GFXDECODE_END
static const x1_010_interface champbwl_sound_intf =
{
- 0x0000 /* address */
+ 0x0000 /* address */
};
MACHINE_START_MEMBER(champbwl_state,champbwl)
@@ -576,7 +576,7 @@ MACHINE_CONFIG_END
ROM_START( champbwl )
- ROM_REGION( 0x20000, "maincpu", 0 ) /* Z80 Code */
+ ROM_REGION( 0x20000, "maincpu", 0 ) /* Z80 Code */
ROM_LOAD( "ab001001.u1", 0x10000, 0x10000, CRC(6c6f7675) SHA1(19834f25f2644ae5d156c1e1bbb3fc50cae10fd2) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -589,7 +589,7 @@ ROM_START( champbwl )
ROM_LOAD( "ab001008.u26", 0x0000, 0x0200, CRC(30ac8d48) SHA1(af034de3f3b8548534effdf4e3717fe3838b7754) )
ROM_LOAD( "ab001009.u27", 0x0200, 0x0200, CRC(3bbd4bcd) SHA1(8c87ccc42ece2432b8ad25f8679cdf886e12a43c) )
- ROM_REGION( 0x100000, "x1snd", 0 ) /* Samples */
+ ROM_REGION( 0x100000, "x1snd", 0 ) /* Samples */
ROM_LOAD( "ab002002.2-2", 0x00000, 0x40000, CRC(42ebe997) SHA1(1808b9e5e996a395c1d48ac001067f736f96feec) ) // jingles (for strike, spare etc.)
ROM_LOAD( "ab003002.3-2", 0x40000, 0x40000, CRC(7ede8f28) SHA1(b5519c09b4f0019dc76cadca725da1d581912540) ) // basic coin + ball sounds
ROM_LOAD( "ab002003.2-3", 0x80000, 0x40000, CRC(3051b8c3) SHA1(5f53596d7af1c79db1dde4bdca3878e07c67b5d1) ) // 'welcome to.. , strike' speech etc.
@@ -678,7 +678,7 @@ Notes:
ROM_START( doraemon )
ROM_REGION( 0x30000, "maincpu", 0 )
ROM_LOAD( "u1.bin", 0x00000, 0x20000, CRC(d338b9ca) SHA1(5f59c994db81577dc6074362c8b6b93f8fe592f6) )
- ROM_RELOAD( 0x10000, 0x20000 ) /* banked at 4000-7fff */
+ ROM_RELOAD( 0x10000, 0x20000 ) /* banked at 4000-7fff */
ROM_REGION( 0x80000, "gfx1", 0 )
ROM_LOAD( "u22.bin", 0x00000, 0x20000, CRC(b264ac2d) SHA1(0529fd1b88ba61dcf72019c7b01e9b939b6e3f2e) )
diff --git a/src/mame/drivers/chanbara.c b/src/mame/drivers/chanbara.c
index cc6eed32ed7..5f12cf40461 100644
--- a/src/mame/drivers/chanbara.c
+++ b/src/mame/drivers/chanbara.c
@@ -298,29 +298,29 @@ INPUT_PORTS_END
static const gfx_layout tilelayout =
{
- 8,8, /* tile size */
- RGN_FRAC(1,2), /* number of tiles */
- 2, /* bits per pixel */
+ 8,8, /* tile size */
+ RGN_FRAC(1,2), /* number of tiles */
+ 2, /* bits per pixel */
{ 0, 4 }, /* plane offsets */
{ RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+1, RGN_FRAC(1,2)+2, RGN_FRAC(1,2)+3, 0,1,2,3 }, /* x offsets */
{ 0*8,1*8,2*8,3*8, 4*8, 5*8, 6*8, 7*8 }, /* y offsets */
- 8*8 /* offset to next tile */
+ 8*8 /* offset to next tile */
};
static const gfx_layout tile16layout =
{
- 16,16, /* tile size */
- RGN_FRAC(1,4), /* number of tiles */
- 3, /* bits per pixel */
+ 16,16, /* tile size */
+ RGN_FRAC(1,4), /* number of tiles */
+ 3, /* bits per pixel */
{ RGN_FRAC(1,2),0,4 }, /* plane offsets */
{ 16*8+RGN_FRAC(1,4)+0,16*8+ RGN_FRAC(1,4)+1,16*8+ RGN_FRAC(1,4)+2,16*8+ RGN_FRAC(1,4)+3,
- 0,1,2,3,
+ 0,1,2,3,
RGN_FRAC(1,4)+0, RGN_FRAC(1,4)+1, RGN_FRAC(1,4)+2, RGN_FRAC(1,4)+3,
- 16*8+0, 16*8+1, 16*8+2, 16*8+3,
+ 16*8+0, 16*8+1, 16*8+2, 16*8+3,
}, /* x offsets */
{ 0*8,1*8,2*8,3*8, 4*8, 5*8, 6*8, 7*8,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8 }, /* y offsets */
- 32*8 /* offset to next tile */
+ 32*8 /* offset to next tile */
};
@@ -338,10 +338,10 @@ static const gfx_layout spritelayout =
};
static GFXDECODE_START( chanbara )
- GFXDECODE_ENTRY( "gfx1", 0x00000, tilelayout, 0x40, 32 )
- GFXDECODE_ENTRY( "gfx2", 0x00000, spritelayout, 0x80, 16 )
+ GFXDECODE_ENTRY( "gfx1", 0x00000, tilelayout, 0x40, 32 )
+ GFXDECODE_ENTRY( "gfx2", 0x00000, spritelayout, 0x80, 16 )
- GFXDECODE_ENTRY( "gfx3", 0x00000, tile16layout, 0, 32 )
+ GFXDECODE_ENTRY( "gfx3", 0x00000, tile16layout, 0, 32 )
GFXDECODE_END
/***************************************************************************/
@@ -438,14 +438,14 @@ ROM_START( chanbara )
ROM_LOAD( "cp02.14c", 0x00000, 0x8000, CRC(c2b66cea) SHA1(f72f57add5f38313a72f5c521dce157edf49f70e) )
ROM_REGION( 0x02000, "gfx1", 0 ) // text layer
- ROM_LOAD( "cp12.17h", 0x00000, 0x2000, CRC(b87b96de) SHA1(f8bb9f094917df305c4fed071edaa775071e40fd) )
+ ROM_LOAD( "cp12.17h", 0x00000, 0x2000, CRC(b87b96de) SHA1(f8bb9f094917df305c4fed071edaa775071e40fd) )
ROM_REGION( 0x08000, "gfx3", 0 ) // bg layer
- ROM_LOAD( "cp13.15h", 0x00000, 0x4000, CRC(2dc38c3d) SHA1(4bb1335b8285e91b51c28e74d8de11a8d6df0486) )
+ ROM_LOAD( "cp13.15h", 0x00000, 0x4000, CRC(2dc38c3d) SHA1(4bb1335b8285e91b51c28e74d8de11a8d6df0486) )
/* rom cp14.13h is expanded at 0x4000 - 0x8000 */
ROM_REGION( 0x08000, "gfx4", 0 )
- ROM_LOAD( "cp14.13h", 0x00000, 0x2000, CRC(d31db368) SHA1(b62834137bfe4ac2013d2d16b0ead10bf2a2df83) )
+ ROM_LOAD( "cp14.13h", 0x00000, 0x2000, CRC(d31db368) SHA1(b62834137bfe4ac2013d2d16b0ead10bf2a2df83) )
ROM_REGION( 0x24000, "gfx2", 0 )
ROM_LOAD( "cp03.12c", 0x08000, 0x4000, CRC(dea247fb) SHA1(d54fa30813613ef6c3b5f86b563e9ab618a9f627))
@@ -469,9 +469,9 @@ ROM_END
DRIVER_INIT_MEMBER(chanbara_state,chanbara)
{
- UINT8 *src = machine().root_device().memregion("gfx4")->base();
- UINT8 *dst = machine().root_device().memregion("gfx3")->base() + 0x4000;
- UINT8 *bg = machine().root_device().memregion("user1")->base();
+ UINT8 *src = machine().root_device().memregion("gfx4")->base();
+ UINT8 *dst = machine().root_device().memregion("gfx3")->base() + 0x4000;
+ UINT8 *bg = machine().root_device().memregion("user1")->base();
int i;
for (i = 0; i < 0x1000; i++)
diff --git a/src/mame/drivers/chance32.c b/src/mame/drivers/chance32.c
index 0a2f6127adc..5db10358804 100644
--- a/src/mame/drivers/chance32.c
+++ b/src/mame/drivers/chance32.c
@@ -171,16 +171,16 @@ WRITE8_MEMBER(chance32_state::muxout_w)
x--- ---- Bet lamp.
*/
- if (data & 1) // bit 0 is the mux selector.
+ if (data & 1) // bit 0 is the mux selector.
{
- output_set_lamp_value(0, (data >> 1) & 1); /* Lamp 0 - Small / Big */
- output_set_lamp_value(1, (data >> 2) & 1); /* Lamp 1 - Big / Small */
- output_set_lamp_value(2, (data >> 3) & 1); /* Lamp 2 - Hold 5 */
- output_set_lamp_value(3, (data >> 4) & 1); /* Lamp 3 - Hold 4 */
- output_set_lamp_value(4, (data >> 5) & 1); /* Lamp 4 - Hold 3 */
- output_set_lamp_value(5, (data >> 6) & 1); /* Lamp 5 - Hold 2 */
- output_set_lamp_value(6, (data >> 7) & 1); /* Lamp 6 - Hold 1 */
+ output_set_lamp_value(0, (data >> 1) & 1); /* Lamp 0 - Small / Big */
+ output_set_lamp_value(1, (data >> 2) & 1); /* Lamp 1 - Big / Small */
+ output_set_lamp_value(2, (data >> 3) & 1); /* Lamp 2 - Hold 5 */
+ output_set_lamp_value(3, (data >> 4) & 1); /* Lamp 3 - Hold 4 */
+ output_set_lamp_value(4, (data >> 5) & 1); /* Lamp 4 - Hold 3 */
+ output_set_lamp_value(5, (data >> 6) & 1); /* Lamp 5 - Hold 2 */
+ output_set_lamp_value(6, (data >> 7) & 1); /* Lamp 6 - Hold 1 */
logerror("Lamps A: %02x\n", data);
}
@@ -188,12 +188,12 @@ WRITE8_MEMBER(chance32_state::muxout_w)
else
{
// bit 1 is unknown...
- output_set_lamp_value(7, (data >> 2) & 1); /* Lamp 7 - Fever! */
- output_set_lamp_value(8, (data >> 3) & 1); /* Lamp 8 - Cancel */
- output_set_lamp_value(9, (data >> 4) & 1); /* Lamp 9 - D-Up / Take */
- output_set_lamp_value(10, (data >> 5) & 1); /* Lamp 10 - Take / D-Up */
- output_set_lamp_value(11, (data >> 6) & 1); /* Lamp 11 - Deal */
- output_set_lamp_value(12, (data >> 7) & 1); /* Lamp 12 - Bet */
+ output_set_lamp_value(7, (data >> 2) & 1); /* Lamp 7 - Fever! */
+ output_set_lamp_value(8, (data >> 3) & 1); /* Lamp 8 - Cancel */
+ output_set_lamp_value(9, (data >> 4) & 1); /* Lamp 9 - D-Up / Take */
+ output_set_lamp_value(10, (data >> 5) & 1); /* Lamp 10 - Take / D-Up */
+ output_set_lamp_value(11, (data >> 6) & 1); /* Lamp 11 - Deal */
+ output_set_lamp_value(12, (data >> 7) & 1); /* Lamp 12 - Bet */
logerror("Lamps B: %02x\n", data);
}
@@ -210,7 +210,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( chance32_portmap, AS_IO, 8, chance32_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
- AM_RANGE(0x10, 0x10) AM_WRITENOP // writting bit3 constantly... watchdog?
+ AM_RANGE(0x10, 0x10) AM_WRITENOP // writting bit3 constantly... watchdog?
AM_RANGE(0x13, 0x13) AM_WRITE(mux_w)
AM_RANGE(0x20, 0x20) AM_READ_PORT("DSW0")
AM_RANGE(0x21, 0x21) AM_READ_PORT("DSW1")
@@ -357,7 +357,7 @@ static INPUT_PORTS_START( chance32 )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
PORT_START("UNK")
- PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") /* Otherwise is a 'Freeze' DIP switch */
+ PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") /* Otherwise is a 'Freeze' DIP switch */
PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x02, DEF_STR( On ) )
@@ -402,7 +402,7 @@ static INPUT_PORTS_START( chance32 )
PORT_START("IN2")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_GAMBLE_LOW ) PORT_NAME("Small / DIP Test (In Book Mode)")
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_PAYOUT ) // payout (hopper jam)
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_PAYOUT ) // payout (hopper jam)
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_GAMBLE_TAKE )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_GAMBLE_HIGH ) PORT_NAME("Big")
PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
@@ -412,12 +412,12 @@ static INPUT_PORTS_START( chance32 )
PORT_START("IN3")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN )
- PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Coin A")
+ PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(3) PORT_NAME("Coin A")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset")
- PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Coin B")
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_8) PORT_NAME("Flip Screen 1") /* unknown purpose */
- PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_9) PORT_NAME("Flip Screen 2") /* unknown purpose */
+ PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(3) PORT_NAME("Coin B")
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_8) PORT_NAME("Flip Screen 1") /* unknown purpose */
+ PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE1 ) PORT_CODE(KEYCODE_9) PORT_NAME("Flip Screen 2") /* unknown purpose */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_GAMBLE_KEYIN)
INPUT_PORTS_END
@@ -452,16 +452,16 @@ void chance32_state::machine_reset()
static const mc6845_interface mc6845_intf =
{
- "screen", /* screen we are acting on */
- 16, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 16, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
@@ -483,7 +483,7 @@ static MACHINE_CONFIG_START( chance32, chance32_state )
MCFG_SCREEN_VISIBLE_AREA(0, 35*16-1, 0, 29*8-1)
MCFG_SCREEN_UPDATE_DRIVER(chance32_state, screen_update_chance32)
- MCFG_MC6845_ADD("crtc", H46505, 12000000/16, mc6845_intf) /* 52.786 Hz (similar to Major Poker) */
+ MCFG_MC6845_ADD("crtc", H46505, 12000000/16, mc6845_intf) /* 52.786 Hz (similar to Major Poker) */
MCFG_GFXDECODE(chance32)
MCFG_PALETTE_LENGTH(0x800)
diff --git a/src/mame/drivers/changela.c b/src/mame/drivers/changela.c
index aea3cf2643f..2d7acef8f68 100644
--- a/src/mame/drivers/changela.c
+++ b/src/mame/drivers/changela.c
@@ -73,7 +73,7 @@ READ8_MEMBER(changela_state::changela_68705_port_c_r)
WRITE8_MEMBER(changela_state::changela_68705_port_c_w)
{
/* PC3 is connected to the CLOCK input of the LS374,
- so we latch the data on positive going edge of the clock */
+ so we latch the data on positive going edge of the clock */
/* this is strange because if we do this corectly - it just doesn't work */
if ((data & 8) /*& (!(m_port_c_out & 8))*/ )
@@ -111,7 +111,7 @@ ADDRESS_MAP_END
/* U30 */
READ8_MEMBER(changela_state::changela_24_r)
{
- return ((m_port_c_out & 2) << 2) | 7; /* bits 2,1,0-N/C inputs */
+ return ((m_port_c_out & 2) << 2) | 7; /* bits 2,1,0-N/C inputs */
}
READ8_MEMBER(changela_state::changela_25_r)
@@ -122,14 +122,14 @@ READ8_MEMBER(changela_state::changela_25_r)
READ8_MEMBER(changela_state::changela_30_r)
{
- return ioport("WHEEL")->read() & 0x0f; //wheel control (clocked input) signal on bits 3,2,1,0
+ return ioport("WHEEL")->read() & 0x0f; //wheel control (clocked input) signal on bits 3,2,1,0
}
READ8_MEMBER(changela_state::changela_31_r)
{
/* If the new value is less than the old value, and it did not wrap around,
- or if the new value is greater than the old value, and it did wrap around,
- then we are moving LEFT. */
+ or if the new value is greater than the old value, and it did wrap around,
+ then we are moving LEFT. */
UINT8 curr_value = ioport("WHEEL")->read();
if ((curr_value < m_prev_value_31 && (m_prev_value_31 - curr_value) < 0x80)
@@ -204,15 +204,15 @@ WRITE8_MEMBER(changela_state::changela_coin_counter_w)
static ADDRESS_MAP_START( changela_map, AS_PROGRAM, 8, changela_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM
AM_RANGE(0x8000, 0x83ff) AM_RAM AM_SHARE("spriteram") /* OBJ0 RAM */
- AM_RANGE(0x9000, 0x97ff) AM_RAM AM_SHARE("videoram") /* OBJ1 RAM */
- AM_RANGE(0xa000, 0xa07f) AM_WRITE(changela_colors_w) AM_SHARE("colorram") /* Color 93419 RAM 64x9(nine!!!) bits A0-used as the 8-th bit data input (d0-d7->normal, a0->d8) */
+ AM_RANGE(0x9000, 0x97ff) AM_RAM AM_SHARE("videoram") /* OBJ1 RAM */
+ AM_RANGE(0xa000, 0xa07f) AM_WRITE(changela_colors_w) AM_SHARE("colorram") /* Color 93419 RAM 64x9(nine!!!) bits A0-used as the 8-th bit data input (d0-d7->normal, a0->d8) */
AM_RANGE(0xb000, 0xbfff) AM_ROM
- AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(changela_mem_device_r, changela_mem_device_w) /* RAM4 (River Bed RAM); RAM5 (Tree RAM) */
+ AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(changela_mem_device_r, changela_mem_device_w) /* RAM4 (River Bed RAM); RAM5 (Tree RAM) */
/* LS138 - U16 */
- AM_RANGE(0xc800, 0xc800) AM_WRITENOP /* not connected */
- AM_RANGE(0xc900, 0xc900) AM_WRITE(changela_mem_device_select_w) /* selects the memory device to be accessible at 0xc000-0xc7ff */
+ AM_RANGE(0xc800, 0xc800) AM_WRITENOP /* not connected */
+ AM_RANGE(0xc900, 0xc900) AM_WRITE(changela_mem_device_select_w) /* selects the memory device to be accessible at 0xc000-0xc7ff */
AM_RANGE(0xca00, 0xca00) AM_WRITE(changela_slope_rom_addr_hi_w)
AM_RANGE(0xcb00, 0xcb00) AM_WRITE(changela_slope_rom_addr_lo_w)
@@ -235,15 +235,15 @@ static ADDRESS_MAP_START( changela_map, AS_PROGRAM, 8, changela_state )
AM_RANGE(0xd030, 0xd030) AM_READWRITE(changela_30_r, mcu_w)
AM_RANGE(0xd031, 0xd031) AM_READ(changela_31_r)
- AM_RANGE(0xe000, 0xe000) AM_WRITE(watchdog_reset_w) /* Watchdog */
+ AM_RANGE(0xe000, 0xe000) AM_WRITE(watchdog_reset_w) /* Watchdog */
- AM_RANGE(0xf000, 0xf7ff) AM_RAM /* RAM2 (Processor RAM) */
+ AM_RANGE(0xf000, 0xf7ff) AM_RAM /* RAM2 (Processor RAM) */
ADDRESS_MAP_END
static INPUT_PORTS_START( changela )
- PORT_START("DSWA") /* DSWA */
- PORT_DIPNAME( 0x07, 0x01, "Steering Wheel Ratio" ) PORT_DIPLOCATION("SWA:1,2,3")
+ PORT_START("DSWA") /* DSWA */
+ PORT_DIPNAME( 0x07, 0x01, "Steering Wheel Ratio" ) PORT_DIPLOCATION("SWA:1,2,3")
//PORT_DIPSETTING( 0x00, "?" ) /* Not documented */
PORT_DIPSETTING( 0x01, "Recommended Setting" )
//PORT_DIPSETTING( 0x02, "?" ) /* Not documented */
@@ -252,87 +252,87 @@ static INPUT_PORTS_START( changela )
//PORT_DIPSETTING( 0x05, "?" ) /* Not documented */
//PORT_DIPSETTING( 0x06, "?" ) /* Not documented */
//PORT_DIPSETTING( 0x07, "?" ) /* Not documented */
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SWA:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x00, "Ignore Memory Failures" ) PORT_DIPLOCATION("SWA:5")
+ PORT_DIPNAME( 0x10, 0x00, "Ignore Memory Failures" ) PORT_DIPLOCATION("SWA:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Controls ) ) PORT_DIPLOCATION("SWA:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Controls ) ) PORT_DIPLOCATION("SWA:6")
PORT_DIPSETTING( 0x20, DEF_STR( Joystick ) )
PORT_DIPSETTING( 0x00, "Steering Wheel" )
- PORT_DIPNAME( 0x40, 0x40, "Diagnostic" ) PORT_DIPLOCATION("SWA:7")
+ PORT_DIPNAME( 0x40, 0x40, "Diagnostic" ) PORT_DIPLOCATION("SWA:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Players ) ) PORT_DIPLOCATION("SWA:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Players ) ) PORT_DIPLOCATION("SWA:8")
PORT_DIPSETTING( 0x80, "1" )
PORT_DIPSETTING( 0x00, "2" )
- PORT_START("DSWB") /* DSWB */
- PORT_DIPNAME( 0x03, 0x00, "Max Bonus Fuels" ) PORT_DIPLOCATION("SWB:1,2")
+ PORT_START("DSWB") /* DSWB */
+ PORT_DIPNAME( 0x03, 0x00, "Max Bonus Fuels" ) PORT_DIPLOCATION("SWB:1,2")
PORT_DIPSETTING( 0x01, "1" )
PORT_DIPSETTING( 0x02, "2" )
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x00, "99" )
- PORT_DIPNAME( 0x0c, 0x08, "Game Difficulty" ) PORT_DIPLOCATION("SWB:3,4")
+ PORT_DIPNAME( 0x0c, 0x08, "Game Difficulty" ) PORT_DIPLOCATION("SWB:3,4")
PORT_DIPSETTING( 0x00, DEF_STR( Very_Easy) )
PORT_DIPSETTING( 0x04, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x08, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x0c, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x30, 0x20, "Traffic Difficulty" ) PORT_DIPLOCATION("SWB:5,6")
+ PORT_DIPNAME( 0x30, 0x20, "Traffic Difficulty" ) PORT_DIPLOCATION("SWB:5,6")
PORT_DIPSETTING( 0x00, DEF_STR( Very_Easy) )
PORT_DIPSETTING( 0x10, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x20, DEF_STR( Medium ) )
PORT_DIPSETTING( 0x30, DEF_STR( Hard ) )
- PORT_DIPNAME( 0x40, 0x00, "Land Collisions Enabled" ) PORT_DIPLOCATION("SWB:7")
+ PORT_DIPNAME( 0x40, 0x00, "Land Collisions Enabled" ) PORT_DIPLOCATION("SWB:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x00, "Car Collision Enabled" ) PORT_DIPLOCATION("SWB:8")
+ PORT_DIPNAME( 0x80, 0x00, "Car Collision Enabled" ) PORT_DIPLOCATION("SWB:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_START("DSWC") /* DSWC - coinage */
- PORT_DIPNAME( 0xf0, 0x10, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWC:5,6,7,8")
+ PORT_START("DSWC") /* DSWC - coinage */
+ PORT_DIPNAME( 0xf0, 0x10, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWC:5,6,7,8")
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPSETTING( 0x90, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0xa0, DEF_STR( 2C_2C ) )
- PORT_DIPSETTING( 0x10, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0xb0, DEF_STR( 2C_3C ) )
- PORT_DIPSETTING( 0xc0, DEF_STR( 2C_4C ) )
- PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING( 0xd0, DEF_STR( 2C_5C ) )
- PORT_DIPSETTING( 0xe0, DEF_STR( 2C_6C ) )
- PORT_DIPSETTING( 0x30, DEF_STR( 1C_3C ) )
- PORT_DIPSETTING( 0xf0, DEF_STR( 2C_7C ) )
- PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
- PORT_DIPSETTING( 0x50, DEF_STR( 1C_5C ) )
- PORT_DIPSETTING( 0x60, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x70, DEF_STR( 1C_7C ) )
- PORT_DIPNAME( 0x0f, 0x01, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWC:1,2,3,4")
+ PORT_DIPSETTING( 0x90, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0xa0, DEF_STR( 2C_2C ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0xb0, DEF_STR( 2C_3C ) )
+ PORT_DIPSETTING( 0xc0, DEF_STR( 2C_4C ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0xd0, DEF_STR( 2C_5C ) )
+ PORT_DIPSETTING( 0xe0, DEF_STR( 2C_6C ) )
+ PORT_DIPSETTING( 0x30, DEF_STR( 1C_3C ) )
+ PORT_DIPSETTING( 0xf0, DEF_STR( 2C_7C ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( 1C_4C ) )
+ PORT_DIPSETTING( 0x50, DEF_STR( 1C_5C ) )
+ PORT_DIPSETTING( 0x60, DEF_STR( 1C_6C ) )
+ PORT_DIPSETTING( 0x70, DEF_STR( 1C_7C ) )
+ PORT_DIPNAME( 0x0f, 0x01, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SWC:1,2,3,4")
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPSETTING( 0x09, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x0a, DEF_STR( 2C_2C ) )
- PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x0b, DEF_STR( 2C_3C ) )
- PORT_DIPSETTING( 0x0c, DEF_STR( 2C_4C ) )
- PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING( 0x0d, DEF_STR( 2C_5C ) )
- PORT_DIPSETTING( 0x0e, DEF_STR( 2C_6C ) )
- PORT_DIPSETTING( 0x03, DEF_STR( 1C_3C ) )
- PORT_DIPSETTING( 0x0f, DEF_STR( 2C_7C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
- PORT_DIPSETTING( 0x05, DEF_STR( 1C_5C ) )
- PORT_DIPSETTING( 0x06, DEF_STR( 1C_6C ) )
- PORT_DIPSETTING( 0x07, DEF_STR( 1C_7C ) )
-
- PORT_START("DSWD") /* DSWD - bonus */
- PORT_DIPNAME( 0x01, 0x01, "Right Slot" ) PORT_DIPLOCATION("SWD:1")
+ PORT_DIPSETTING( 0x09, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x0a, DEF_STR( 2C_2C ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x0b, DEF_STR( 2C_3C ) )
+ PORT_DIPSETTING( 0x0c, DEF_STR( 2C_4C ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x0d, DEF_STR( 2C_5C ) )
+ PORT_DIPSETTING( 0x0e, DEF_STR( 2C_6C ) )
+ PORT_DIPSETTING( 0x03, DEF_STR( 1C_3C ) )
+ PORT_DIPSETTING( 0x0f, DEF_STR( 2C_7C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 1C_4C ) )
+ PORT_DIPSETTING( 0x05, DEF_STR( 1C_5C ) )
+ PORT_DIPSETTING( 0x06, DEF_STR( 1C_6C ) )
+ PORT_DIPSETTING( 0x07, DEF_STR( 1C_7C ) )
+
+ PORT_START("DSWD") /* DSWD - bonus */
+ PORT_DIPNAME( 0x01, 0x01, "Right Slot" ) PORT_DIPLOCATION("SWD:1")
PORT_DIPSETTING( 0x01, "On Right (Bottom) Counter" )
PORT_DIPSETTING( 0x00, "On Left (Top) Counter" )
- PORT_DIPNAME( 0x02, 0x02, "Left Slot" ) PORT_DIPLOCATION("SWD:2")
+ PORT_DIPNAME( 0x02, 0x02, "Left Slot" ) PORT_DIPLOCATION("SWD:2")
PORT_DIPSETTING( 0x02, "On Right (Bottom) Counter" )
PORT_DIPSETTING( 0x00, "On Left (Top) Counter" )
- PORT_DIPNAME( 0x1c, 0x00, "Credits For Bonus" ) PORT_DIPLOCATION("SWD:3,4,5")
+ PORT_DIPNAME( 0x1c, 0x00, "Credits For Bonus" ) PORT_DIPLOCATION("SWD:3,4,5")
PORT_DIPSETTING( 0x00, "0" )
PORT_DIPSETTING( 0x04, "1" )
PORT_DIPSETTING( 0x08, "2" )
@@ -341,11 +341,11 @@ static INPUT_PORTS_START( changela )
PORT_DIPSETTING( 0x14, "5" )
PORT_DIPSETTING( 0x18, "6" )
PORT_DIPSETTING( 0x1c, "7" )
- PORT_DIPUNUSED_DIPLOC( 0x20, IP_ACTIVE_LOW, "SWD:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, IP_ACTIVE_LOW, "SWD:6" ) /* Listed as "Unused" */
PORT_DIPNAME( 0x40, 0x00, "'King Of The World' Name Length" )PORT_DIPLOCATION("SWD:7")
PORT_DIPSETTING( 0x40, "3 Letters" )
PORT_DIPSETTING( 0x00, "Long" )
- PORT_DIPNAME( 0x80, 0x00, "'King Of The World' Name" ) PORT_DIPLOCATION("SWD:8")
+ PORT_DIPNAME( 0x80, 0x00, "'King Of The World' Name" ) PORT_DIPLOCATION("SWD:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -354,9 +354,9 @@ static INPUT_PORTS_START( changela )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
- PORT_DIPNAME( 0x30, 0x30, "Self Test Switch" ) PORT_DIPLOCATION("SWT:1,2")
+ PORT_DIPNAME( 0x30, 0x30, "Self Test Switch" ) PORT_DIPLOCATION("SWT:1,2")
//PORT_DIPSETTING( 0x00, "?" ) /* Not possible, 3-state switch */
- PORT_DIPSETTING( 0x20, "Free Game" ) /* "Puts a credit on the game without increasing the coin counter." */
+ PORT_DIPSETTING( 0x20, "Free Game" ) /* "Puts a credit on the game without increasing the coin counter." */
PORT_DIPSETTING( 0x10, DEF_STR( Test ) )
PORT_DIPSETTING( 0x30, DEF_STR( Off ) )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
@@ -532,38 +532,38 @@ MACHINE_CONFIG_END
ROM_START( changela )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* Z80 code */
- ROM_LOAD( "cl25a", 0x0000, 0x2000, CRC(38530a60) SHA1(0b0ef1abe11c5271fcd1671322b77165217553c3) )
- ROM_LOAD( "cl24a", 0x2000, 0x2000, CRC(2fcf4a82) SHA1(c33355e2d4d3fab32c8d713a680ec0fceedab341) )
- ROM_LOAD( "cl23", 0x4000, 0x2000, CRC(08385891) SHA1(d8d66664ec25db067d5a4a6c35ec0ac65b9e0c6a) )
- ROM_LOAD( "cl22", 0x6000, 0x2000, CRC(796e0abd) SHA1(64dd9fc1f9bc44519a253ef0c02e181dd13904bf) )
- ROM_LOAD( "cl27", 0xb000, 0x1000, CRC(3668afb8) SHA1(bcfb788baf806edcb129ea9f9dcb1d4260684773) )
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* Z80 code */
+ ROM_LOAD( "cl25a", 0x0000, 0x2000, CRC(38530a60) SHA1(0b0ef1abe11c5271fcd1671322b77165217553c3) )
+ ROM_LOAD( "cl24a", 0x2000, 0x2000, CRC(2fcf4a82) SHA1(c33355e2d4d3fab32c8d713a680ec0fceedab341) )
+ ROM_LOAD( "cl23", 0x4000, 0x2000, CRC(08385891) SHA1(d8d66664ec25db067d5a4a6c35ec0ac65b9e0c6a) )
+ ROM_LOAD( "cl22", 0x6000, 0x2000, CRC(796e0abd) SHA1(64dd9fc1f9bc44519a253ef0c02e181dd13904bf) )
+ ROM_LOAD( "cl27", 0xb000, 0x1000, CRC(3668afb8) SHA1(bcfb788baf806edcb129ea9f9dcb1d4260684773) )
- ROM_REGION( 0x10000, "mcu", 0 ) /* 68705U3 */
- ROM_LOAD( "cl38a", 0x0000, 0x800, CRC(b70156ce) SHA1(c5eab8bbd65c4f587426298da4e22f991ce01dde) )
+ ROM_REGION( 0x10000, "mcu", 0 ) /* 68705U3 */
+ ROM_LOAD( "cl38a", 0x0000, 0x800, CRC(b70156ce) SHA1(c5eab8bbd65c4f587426298da4e22f991ce01dde) )
- ROM_REGION( 0x4000, "gfx1", 0 ) /* tile data */
- ROM_LOAD( "cl111", 0x0000, 0x2000, CRC(41c0149d) SHA1(3ea53a3821b044b3d0451fec1b4ee2c28da393ca) )
- ROM_LOAD( "cl113", 0x2000, 0x2000, CRC(ddf99926) SHA1(e816b88302c5639c7284f4845d450f232d63a10c) )
+ ROM_REGION( 0x4000, "gfx1", 0 ) /* tile data */
+ ROM_LOAD( "cl111", 0x0000, 0x2000, CRC(41c0149d) SHA1(3ea53a3821b044b3d0451fec1b4ee2c28da393ca) )
+ ROM_LOAD( "cl113", 0x2000, 0x2000, CRC(ddf99926) SHA1(e816b88302c5639c7284f4845d450f232d63a10c) )
- ROM_REGION( 0x1000, "gfx2", 0 ) /* obj 1 data */
- ROM_LOAD( "cl46", 0x0000, 0x1000, CRC(9c0a7d28) SHA1(fac9180ea0d9aeea56a84b35cc0958f0dd86a801) )
+ ROM_REGION( 0x1000, "gfx2", 0 ) /* obj 1 data */
+ ROM_LOAD( "cl46", 0x0000, 0x1000, CRC(9c0a7d28) SHA1(fac9180ea0d9aeea56a84b35cc0958f0dd86a801) )
- ROM_REGION( 0x8000, "user1", 0 ) /* obj 0 data */
- ROM_LOAD( "cl100", 0x0000, 0x2000, CRC(3fa9e4fa) SHA1(9abd7df5fcf143a0c476bd8c8753c5ea294b9f74) )
- ROM_LOAD( "cl99", 0x2000, 0x2000, CRC(67b27b9e) SHA1(7df0f93851959359218c8d2272e30d242a77039d) )
- ROM_LOAD( "cl98", 0x4000, 0x2000, CRC(bffe4149) SHA1(5cf0b98f9d342bd06d575c565ea01bbd79f5e04b) )
- ROM_LOAD( "cl97", 0x6000, 0x2000, CRC(5abab8f9) SHA1(f5156855bbcdf0740fd44520386318ee53ebbf9a) )
+ ROM_REGION( 0x8000, "user1", 0 ) /* obj 0 data */
+ ROM_LOAD( "cl100", 0x0000, 0x2000, CRC(3fa9e4fa) SHA1(9abd7df5fcf143a0c476bd8c8753c5ea294b9f74) )
+ ROM_LOAD( "cl99", 0x2000, 0x2000, CRC(67b27b9e) SHA1(7df0f93851959359218c8d2272e30d242a77039d) )
+ ROM_LOAD( "cl98", 0x4000, 0x2000, CRC(bffe4149) SHA1(5cf0b98f9d342bd06d575c565ea01bbd79f5e04b) )
+ ROM_LOAD( "cl97", 0x6000, 0x2000, CRC(5abab8f9) SHA1(f5156855bbcdf0740fd44520386318ee53ebbf9a) )
- ROM_REGION( 0x1000, "user2", 0 ) /* math tables: SLOPE ROM (river-tree schematic page 1/3) */
- ROM_LOAD( "cl44", 0x0000, 0x1000, CRC(160d2bc7) SHA1(2609208c2bd4618ea340923ee01af69278980c36) ) /* first and 2nd half identical */
+ ROM_REGION( 0x1000, "user2", 0 ) /* math tables: SLOPE ROM (river-tree schematic page 1/3) */
+ ROM_LOAD( "cl44", 0x0000, 0x1000, CRC(160d2bc7) SHA1(2609208c2bd4618ea340923ee01af69278980c36) ) /* first and 2nd half identical */
- ROM_REGION( 0x3000, "user3", 0 ) /* math tables: TREE ROM (river-tree schematic page 3/3)*/
- ROM_LOAD( "cl7", 0x0000, 0x0800, CRC(01e3efca) SHA1(b26203787f105ba32773e37035c39253050f9c82) ) /* fixed bits: 0xxxxxxx */
- ROM_LOAD( "cl9", 0x1000, 0x2000, CRC(4e53cdd0) SHA1(6255411cfdccbe2c581c83f9127d582623453c3a) )
+ ROM_REGION( 0x3000, "user3", 0 ) /* math tables: TREE ROM (river-tree schematic page 3/3)*/
+ ROM_LOAD( "cl7", 0x0000, 0x0800, CRC(01e3efca) SHA1(b26203787f105ba32773e37035c39253050f9c82) ) /* fixed bits: 0xxxxxxx */
+ ROM_LOAD( "cl9", 0x1000, 0x2000, CRC(4e53cdd0) SHA1(6255411cfdccbe2c581c83f9127d582623453c3a) )
ROM_REGION( 0x0020, "proms", 0 )
- ROM_LOAD( "cl88", 0x0000, 0x0020, CRC(da4d6625) SHA1(2d9a268973518252eb36f479ab650af8c16c885c) ) /* math train state machine */
+ ROM_LOAD( "cl88", 0x0000, 0x0020, CRC(da4d6625) SHA1(2d9a268973518252eb36f479ab650af8c16c885c) ) /* math train state machine */
ROM_END
GAMEL( 1983, changela, 0, changela, changela, driver_device, 0, ROT180, "Taito Corporation", "Change Lanes", GAME_SUPPORTS_SAVE, layout_changela )
diff --git a/src/mame/drivers/cheekyms.c b/src/mame/drivers/cheekyms.c
index 388adbdd3d6..f4ac1ea45f5 100644
--- a/src/mame/drivers/cheekyms.c
+++ b/src/mame/drivers/cheekyms.c
@@ -176,8 +176,8 @@ ROM_START( cheekyms )
ROM_LOAD( "cm08.n6", 0x0800, 0x0800, CRC(b3fbd4ac) SHA1(9f45cc6d9e0bf580149e18de5c3e37d4de347b92) )
ROM_REGION( 0x0060, "proms", 0 )
- ROM_LOAD( "cm.m9", 0x0000, 0x0020, CRC(db9c59a5) SHA1(357ed5ac8e954a4c8b4d78d36e57bf2de36c1d57) ) /* Character colors / */
- ROM_LOAD( "cm.m8", 0x0020, 0x0020, CRC(2386bc68) SHA1(6676082860cd8678a71339a352d2c6286e78ba44) ) /* Character colors \ Selected by Bit 6 of Port 0x80 */
+ ROM_LOAD( "cm.m9", 0x0000, 0x0020, CRC(db9c59a5) SHA1(357ed5ac8e954a4c8b4d78d36e57bf2de36c1d57) ) /* Character colors / */
+ ROM_LOAD( "cm.m8", 0x0020, 0x0020, CRC(2386bc68) SHA1(6676082860cd8678a71339a352d2c6286e78ba44) ) /* Character colors \ Selected by Bit 6 of Port 0x80 */
ROM_LOAD( "cm.p3", 0x0040, 0x0020, CRC(6ac41516) SHA1(05bf40790a0de1e859362df892f7f158c183e247) ) /* Sprite colors */
ROM_END
diff --git a/src/mame/drivers/chihiro.c b/src/mame/drivers/chihiro.c
index 384c397a526..29859eebc9a 100644
--- a/src/mame/drivers/chihiro.c
+++ b/src/mame/drivers/chihiro.c
@@ -385,7 +385,7 @@ class chihiro_state : public driver_device
{
public:
chihiro_state(const machine_config &mconfig, device_type type, const char *tag)
- : driver_device(mconfig, type, tag) { }
+ : driver_device(mconfig, type, tag) { }
DECLARE_READ32_MEMBER( geforce_r );
DECLARE_WRITE32_MEMBER( geforce_w );
@@ -407,9 +407,9 @@ public:
UINT32 screen_update_callback(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
struct chihiro_devices {
- device_t *pic8259_1;
- device_t *pic8259_2;
- device_t *ide;
+ device_t *pic8259_1;
+ device_t *pic8259_2;
+ device_t *ide;
} chihiro_devs;
nv2a_renderer *nvidia_nv2a;
@@ -442,7 +442,7 @@ most methods set parameters, others actually draw
class nv2a_renderer : public poly_manager<float, nvidia_object_data, 5, 6000>
{
public:
- nv2a_renderer(running_machine &machine) : poly_manager<float, nvidia_object_data, 5, 6000>(machine)
+ nv2a_renderer(running_machine &machine) : poly_manager<float, nvidia_object_data, 5, 6000>(machine)
{
memset(channel,0,sizeof(channel));
memset(pfifo,0,sizeof(pfifo));
@@ -720,7 +720,7 @@ static void jamtable_disasm(running_machine &machine, address_space &space,UINT3
static void jamtable_disasm_command(running_machine &machine, int ref, int params, const char **param)
{
address_space &space=machine.firstcpu->space();
- UINT64 addr,size;
+ UINT64 addr,size;
if (params < 2)
return;
@@ -734,7 +734,7 @@ static void jamtable_disasm_command(running_machine &machine, int ref, int param
static void dump_string_command(running_machine &machine, int ref, int params, const char **param)
{
address_space &space=machine.firstcpu->space();
- UINT64 addr;
+ UINT64 addr;
offs_t address;
UINT32 length,maximumlength;
offs_t buffer;
@@ -1021,12 +1021,12 @@ void nv2a_renderer::geforce_exec_method(address_space & space,UINT32 chanel,UINT
texture.dilate=dilatechose[(basesizeu << 4)+basesizev];
texture.buffer=space.get_read_ptr(offset);
/*if (dma0 != 0) {
- dmahand=channel[channel][subchannel].object.method[0x184/4];
- geforce_read_dma_object(dmahand,dmaoff,smasiz);
- } else if (dma1 != 0) {
- dmahand=channel[channel][subchannel].object.method[0x188/4];
- geforce_read_dma_object(dmahand,dmaoff,smasiz);
- }*/
+ dmahand=channel[channel][subchannel].object.method[0x184/4];
+ geforce_read_dma_object(dmahand,dmaoff,smasiz);
+ } else if (dma1 != 0) {
+ dmahand=channel[channel][subchannel].object.method[0x188/4];
+ geforce_read_dma_object(dmahand,dmaoff,smasiz);
+ }*/
}
if (method*4 == 0x1810) {
// draw vertices
@@ -1064,9 +1064,9 @@ void nv2a_renderer::geforce_exec_method(address_space & space,UINT32 chanel,UINT
float z[4],w[4];
UINT32 c[4];
/*float u[4],v[4];
- int xi,yi,xf,yf,dx,dy,xp,yp,up,vp;
- float ui,vi,uf,vf,du,dv;
- rectangle clip(0,0,639,479);*/
+ int xi,yi,xf,yf,dx,dy,xp,yp,up,vp;
+ float ui,vi,uf,vf,du,dv;
+ rectangle clip(0,0,639,479);*/
render_delegate rend;
for (m=0;m < 4;m++) {
@@ -1088,9 +1088,9 @@ void nv2a_renderer::geforce_exec_method(address_space & space,UINT32 chanel,UINT
render_polygon<4>(fb.cliprect(),rend,3+texture.enabled*2,xy);
wait();
/*myline(fb,xy[0].x,xy[0].y,xy[1].x,xy[1].y);
- myline(fb,xy[1].x,xy[1].y,xy[2].x,xy[2].y);
- myline(fb,xy[2].x,xy[2].y,xy[3].x,xy[3].y);
- myline(fb,xy[3].x,xy[3].y,xy[0].x,xy[0].y);*/
+ myline(fb,xy[1].x,xy[1].y,xy[2].x,xy[2].y);
+ myline(fb,xy[2].x,xy[2].y,xy[3].x,xy[3].y);
+ myline(fb,xy[3].x,xy[3].y,xy[0].x,xy[0].y);*/
//printf(" (%f,%f,%f)-(%f,%f,%f)-(%f,%f,%f)-(%f,%f,%f)\n\r",x[0],y[0],z[0],x[1],y[1],z[1],x[2],y[2],z[2],x[3],y[3],z[3]);
}
} else {
@@ -1476,16 +1476,16 @@ WRITE32_MEMBER( chihiro_state::ide_w )
class ide_baseboard_device : public ide_hdd_device
{
public:
- // construction/destruction
- ide_baseboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ // construction/destruction
+ ide_baseboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- virtual int read_sector(UINT32 lba, void *buffer);
- virtual int write_sector(UINT32 lba, const void *buffer);
+ virtual int read_sector(UINT32 lba, void *buffer);
+ virtual int write_sector(UINT32 lba, const void *buffer);
virtual bool is_ready() { return true; }
virtual void read_key(UINT8 key[]) { }
protected:
- // device-level overrides
- virtual void device_start();
+ // device-level overrides
+ virtual void device_start();
virtual void device_reset();
virtual void device_config_complete() { m_shortname = "ide_baseboard"; }
};
@@ -1502,7 +1502,7 @@ const device_type IDE_BASEBOARD = &device_creator<ide_baseboard_device>;
//-------------------------------------------------
ide_baseboard_device::ide_baseboard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : ide_hdd_device(mconfig, IDE_BASEBOARD, "IDE Baseboard", tag, owner, clock)
+ : ide_hdd_device(mconfig, IDE_BASEBOARD, "IDE Baseboard", tag, owner, clock)
{
}
@@ -1604,15 +1604,15 @@ static const struct pit8253_config chihiro_pit8254_config =
{
{
{
- 1125000, /* heartbeat IRQ */
+ 1125000, /* heartbeat IRQ */
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(chihiro_state, chihiro_pit8254_out0_changed)
}, {
- 1125000, /* (unused) dram refresh */
+ 1125000, /* (unused) dram refresh */
DEVCB_NULL,
DEVCB_NULL
}, {
- 1125000, /* (unused) pio port c pin 4, and speaker polling enough */
+ 1125000, /* (unused) pio port c pin 4, and speaker polling enough */
DEVCB_NULL,
DEVCB_DRIVER_LINE_MEMBER(chihiro_state, chihiro_pit8254_out2_changed)
}
@@ -2071,7 +2071,7 @@ ROM_START( outr2st )
DISK_REGION( "gdrom" )
DISK_IMAGE_READONLY( "gdx-0014a", 0, BAD_DUMP SHA1(4f9656634c47631f63eab554a13d19b15558217e) )
- ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF) // number was not readable on pic, please fix if known
+ ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF) // number was not readable on pic, please fix if known
ROM_LOAD( "317-0xxx-com.pic", 0x000000, 0x004000, CRC(f94cf26f) SHA1(dd4af2b52935c7b2d8cd196ec1a30c0ef0993322) )
ROM_END
diff --git a/src/mame/drivers/chinagat.c b/src/mame/drivers/chinagat.c
index 893bced6baa..285b3ab6b50 100644
--- a/src/mame/drivers/chinagat.c
+++ b/src/mame/drivers/chinagat.c
@@ -80,8 +80,8 @@ Dip locations and factory settings verified with China Gate US manual.
#include "sound/msm5205.h"
#include "includes/ddragon.h"
-#define MAIN_CLOCK XTAL_12MHz
-#define PIXEL_CLOCK MAIN_CLOCK / 2
+#define MAIN_CLOCK XTAL_12MHz
+#define PIXEL_CLOCK MAIN_CLOCK / 2
/*
@@ -164,11 +164,11 @@ static WRITE8_HANDLER( chinagat_interrupt_w )
static WRITE8_HANDLER( chinagat_video_ctrl_w )
{
/***************************
- ---- ---x X Scroll MSB
- ---- --x- Y Scroll MSB
- ---- -x-- Flip screen
- --x- ---- Enable video ???
- ****************************/
+ ---- ---x X Scroll MSB
+ ---- --x- Y Scroll MSB
+ ---- -x-- Flip screen
+ --x- ---- Enable video ???
+ ****************************/
ddragon_state *state = space.machine().driver_data<ddragon_state>();
state->m_scrolly_hi = ((data & 0x02) >> 1);
@@ -179,12 +179,12 @@ static WRITE8_HANDLER( chinagat_video_ctrl_w )
static WRITE8_HANDLER( chinagat_bankswitch_w )
{
- space.machine().root_device().membank("bank1")->set_entry(data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
+ space.machine().root_device().membank("bank1")->set_entry(data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
}
static WRITE8_HANDLER( chinagat_sub_bankswitch_w )
{
- space.machine().root_device().membank("bank4")->set_entry(data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
+ space.machine().root_device().membank("bank4")->set_entry(data & 0x07); // shall we check (data & 7) < 6 (# of banks)?
}
static READ8_HANDLER( saiyugoub1_mcu_command_r )
@@ -193,7 +193,7 @@ static READ8_HANDLER( saiyugoub1_mcu_command_r )
#if 0
if (state->m_mcu_command == 0x78)
{
- space.machine().device<cpu_device>("mcu")->suspend(SUSPEND_REASON_HALT, 1); /* Suspend (speed up) */
+ space.machine().device<cpu_device>("mcu")->suspend(SUSPEND_REASON_HALT, 1); /* Suspend (speed up) */
}
#endif
return state->m_mcu_command;
@@ -206,7 +206,7 @@ static WRITE8_HANDLER( saiyugoub1_mcu_command_w )
#if 0
if (data != 0x78)
{
- space.machine().device<cpu_device>("mcu")->resume(SUSPEND_REASON_HALT); /* Wake up */
+ space.machine().device<cpu_device>("mcu")->resume(SUSPEND_REASON_HALT); /* Wake up */
}
#endif
}
@@ -225,7 +225,7 @@ static WRITE8_DEVICE_HANDLER( saiyugoub1_adpcm_control_w )
/* i8748 Port 2 write */
UINT8 *saiyugoub1_adpcm_rom = state->memregion("adpcm")->base();
- if (data & 0x80) /* Reset m5205 and disable ADPCM ROM outputs */
+ if (data & 0x80) /* Reset m5205 and disable ADPCM ROM outputs */
{
logerror("ADPCM output disabled\n");
state->m_pcm_nibble = 0x0f;
@@ -235,12 +235,12 @@ static WRITE8_DEVICE_HANDLER( saiyugoub1_adpcm_control_w )
{
if ((state->m_i8748_P2 & 0xc) != (data & 0xc))
{
- if ((state->m_i8748_P2 & 0xc) == 0) /* Latch MSB Address */
+ if ((state->m_i8748_P2 & 0xc) == 0) /* Latch MSB Address */
{
/// logerror("Latching MSB\n");
state->m_adpcm_addr = (state->m_adpcm_addr & 0x3807f) | (state->m_i8748_P1 << 7);
}
- if ((state->m_i8748_P2 & 0xc) == 4) /* Latch LSB Address */
+ if ((state->m_i8748_P2 & 0xc) == 4) /* Latch LSB Address */
{
/// logerror("Latching LSB\n");
state->m_adpcm_addr = (state->m_adpcm_addr & 0x3ff80) | (state->m_i8748_P1 >> 1);
@@ -279,11 +279,11 @@ static WRITE8_DEVICE_HANDLER( saiyugoub1_m5205_clk_w )
state->m_m5205_clk++;
if (state->m_m5205_clk == 8)
{
- msm5205_vclk_w(device, 1); /* ??? */
+ msm5205_vclk_w(device, 1); /* ??? */
state->m_m5205_clk = 0;
}
else
- msm5205_vclk_w(device, 0); /* ??? */
+ msm5205_vclk_w(device, 0); /* ??? */
#endif
}
@@ -371,12 +371,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( i8748_map, AS_PROGRAM, 8, ddragon_state )
AM_RANGE(0x0000, 0x03ff) AM_ROM
- AM_RANGE(0x0400, 0x07ff) AM_ROM /* i8749 version */
+ AM_RANGE(0x0400, 0x07ff) AM_ROM /* i8749 version */
ADDRESS_MAP_END
static ADDRESS_MAP_START( i8748_portmap, AS_IO, 8, ddragon_state )
AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ_LEGACY(saiyugoub1_mcu_command_r)
- AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVWRITE_LEGACY("adpcm", saiyugoub1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */
+ AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T0) AM_DEVWRITE_LEGACY("adpcm", saiyugoub1_m5205_clk_w) /* Drives the clock on the m5205 at 1/8 of this frequency */
AM_RANGE(MCS48_PORT_T1, MCS48_PORT_T1) AM_READ_LEGACY(saiyugoub1_m5205_irq_r)
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE_LEGACY(saiyugoub1_adpcm_rom_addr_w)
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_DEVWRITE_LEGACY("adpcm", saiyugoub1_adpcm_control_w)
@@ -412,8 +412,8 @@ static INPUT_PORTS_START( chinagat )
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_5C ) )
/*PORT_DIPNAME( 0x40, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:7")
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )*/
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Cocktail ) )*/
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
@@ -421,14 +421,14 @@ static INPUT_PORTS_START( chinagat )
PORT_START("DSW2")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
- PORT_DIPSETTING( 0x01, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
- PORT_DIPSETTING( 0x02, DEF_STR( Hard ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x03, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( Hard ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x04, DEF_STR( On ) )
- PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // "SW2:4" - Left empty in the manual
+ PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // "SW2:4" - Left empty in the manual
PORT_DIPNAME( 0x30, 0x20, "Timer" ) PORT_DIPLOCATION("SW2:5,6")
PORT_DIPSETTING( 0x00, "50" )
PORT_DIPSETTING( 0x20, "55" )
@@ -463,31 +463,31 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 chars */
- RGN_FRAC(1,1), /* num of characters */
- 4, /* 4 bits per pixel */
- { 0, 2, 4, 6 }, /* plane offset */
+ 8,8, /* 8*8 chars */
+ RGN_FRAC(1,1), /* num of characters */
+ 4, /* 4 bits per pixel */
+ { 0, 2, 4, 6 }, /* plane offset */
{ 1, 0, 65, 64, 129, 128, 193, 192 },
- { STEP8(0,8) }, /* { 0*8, 1*8 ... 6*8, 7*8 }, */
+ { STEP8(0,8) }, /* { 0*8, 1*8 ... 6*8, 7*8 }, */
32*8 /* every char takes 32 consecutive bytes */
};
static const gfx_layout tilelayout =
{
- 16,16, /* 16x16 chars */
- RGN_FRAC(1,2), /* num of Tiles/Sprites */
- 4, /* 4 bits per pixel */
+ 16,16, /* 16x16 chars */
+ RGN_FRAC(1,2), /* num of Tiles/Sprites */
+ 4, /* 4 bits per pixel */
{ RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4, 0,4 }, /* plane offset */
{ 3, 2, 1, 0, 16*8+3, 16*8+2, 16*8+1, 16*8+0,
32*8+3,32*8+2 ,32*8+1 ,32*8+0 ,48*8+3 ,48*8+2 ,48*8+1 ,48*8+0 },
- { STEP16(0,8) }, /* { 0*8, 1*8 ... 14*8, 15*8 }, */
+ { STEP16(0,8) }, /* { 0*8, 1*8 ... 14*8, 15*8 }, */
64*8 /* every char takes 64 consecutive bytes */
};
static GFXDECODE_START( chinagat )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0,16 ) /* 8x8 chars */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 128, 8 ) /* 16x16 sprites */
- GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 256, 8 ) /* 16x16 background tiles */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0,16 ) /* 8x8 chars */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 128, 8 ) /* 16x16 sprites */
+ GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 256, 8 ) /* 16x16 background tiles */
GFXDECODE_END
@@ -500,8 +500,8 @@ static void chinagat_irq_handler( device_t *device, int irq )
/* This on the bootleg board, instead of the m6295 */
static const msm5205_interface msm5205_config =
{
- saiyugoub1_m5205_irq_w, /* Interrupt function */
- MSM5205_S64_4B /* vclk input mode (6030Hz, 4-bit) */
+ saiyugoub1_m5205_irq_w, /* Interrupt function */
+ MSM5205_S64_4B /* vclk input mode (6030Hz, 4-bit) */
};
/* This is only on the second bootleg board */
@@ -563,14 +563,14 @@ MACHINE_RESET_MEMBER(ddragon_state,chinagat)
static MACHINE_CONFIG_START( chinagat, ddragon_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", HD6309, MAIN_CLOCK / 2) /* 1.5 MHz (12MHz oscillator / 4 internally) */
+ MCFG_CPU_ADD("maincpu", HD6309, MAIN_CLOCK / 2) /* 1.5 MHz (12MHz oscillator / 4 internally) */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ddragon_state, chinagat_scanline, "screen", 0, 1)
- MCFG_CPU_ADD("sub", HD6309, MAIN_CLOCK / 2) /* 1.5 MHz (12MHz oscillator / 4 internally) */
+ MCFG_CPU_ADD("sub", HD6309, MAIN_CLOCK / 2) /* 1.5 MHz (12MHz oscillator / 4 internally) */
MCFG_CPU_PROGRAM_MAP(sub_map)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* heavy interleaving to sync up sprite<->main cpu's */
@@ -580,7 +580,7 @@ static MACHINE_CONFIG_START( chinagat, ddragon_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 384, 0, 256, 272, 0, 240) /* based on ddragon driver */
+ MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 384, 0, 256, 272, 0, 240) /* based on ddragon driver */
MCFG_SCREEN_UPDATE_DRIVER(ddragon_state, screen_update_ddragon)
MCFG_GFXDECODE(chinagat)
@@ -603,28 +603,28 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( saiyugoub1, ddragon_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */
+ MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ddragon_state, chinagat_scanline, "screen", 0, 1)
- MCFG_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */
+ MCFG_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 68B09EP 1.5 MHz (12MHz oscillator) */
MCFG_CPU_PROGRAM_MAP(sub_map)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz oscillator */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz oscillator */
MCFG_CPU_PROGRAM_MAP(saiyugoub1_sound_map)
- MCFG_CPU_ADD("mcu", I8748, 9263750) /* 9.263750 MHz oscillator, divided by 3*5 internally */
+ MCFG_CPU_ADD("mcu", I8748, 9263750) /* 9.263750 MHz oscillator, divided by 3*5 internally */
MCFG_CPU_PROGRAM_MAP(i8748_map)
MCFG_CPU_IO_MAP(i8748_portmap)
- MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* heavy interleaving to sync up sprite<->main cpu's */
+ MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* heavy interleaving to sync up sprite<->main cpu's */
MCFG_MACHINE_START_OVERRIDE(ddragon_state,chinagat)
MCFG_MACHINE_RESET_OVERRIDE(ddragon_state,chinagat)
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 384, 0, 256, 272, 0, 240) /* based on ddragon driver */
+ MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 384, 0, 256, 272, 0, 240) /* based on ddragon driver */
MCFG_SCREEN_UPDATE_DRIVER(ddragon_state, screen_update_ddragon)
MCFG_GFXDECODE(chinagat)
@@ -648,14 +648,14 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( saiyugoub2, ddragon_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */
+ MCFG_CPU_ADD("maincpu", M6809, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", ddragon_state, chinagat_scanline, "screen", 0, 1)
- MCFG_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */
+ MCFG_CPU_ADD("sub", M6809, MAIN_CLOCK / 8) /* 1.5 MHz (12MHz oscillator) */
MCFG_CPU_PROGRAM_MAP(sub_map)
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz oscillator */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* 3.579545 MHz oscillator */
MCFG_CPU_PROGRAM_MAP(ym2203c_sound_map)
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* heavy interleaving to sync up sprite<->main cpu's */
@@ -665,7 +665,7 @@ static MACHINE_CONFIG_START( saiyugoub2, ddragon_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 384, 0, 256, 272, 0, 240) /* based on ddragon driver */
+ MCFG_SCREEN_RAW_PARAMS(PIXEL_CLOCK, 384, 0, 256, 272, 0, 240) /* based on ddragon driver */
MCFG_SCREEN_UPDATE_DRIVER(ddragon_state, screen_update_ddragon)
MCFG_GFXDECODE(chinagat)
@@ -698,125 +698,125 @@ MACHINE_CONFIG_END
***************************************************************************/
ROM_START( chinagat )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
- ROM_LOAD( "cgate51.bin", 0x10000, 0x18000, CRC(439a3b19) SHA1(01393b4302ac7a66390270b01e2757582240f6b8) ) /* Banks 0x4000 long @ 0x4000 */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
+ ROM_LOAD( "cgate51.bin", 0x10000, 0x18000, CRC(439a3b19) SHA1(01393b4302ac7a66390270b01e2757582240f6b8) ) /* Banks 0x4000 long @ 0x4000 */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
- ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
+ ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
ROM_LOAD( "23j4-0.48", 0x10000, 0x18000, CRC(2914af38) SHA1(3d690fa50b7d36a22de82c026d59a16126a7b73c) ) /* Banks 0x4000 long @ 0x4000 */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
ROM_LOAD( "23j0-0.40", 0x00000, 0x08000, CRC(9ffcadb6) SHA1(606dbdd73aee3cabb2142200ac6f8c96169e4b19) )
- ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
- ROM_LOAD( "cgate18.bin", 0x00000, 0x20000, CRC(8d88d64d) SHA1(57265138ebb0c6419542cce5953aee7335bfa2bd) ) /* 0,1,2,3 */
+ ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
+ ROM_LOAD( "cgate18.bin", 0x00000, 0x20000, CRC(8d88d64d) SHA1(57265138ebb0c6419542cce5953aee7335bfa2bd) ) /* 0,1,2,3 */
- ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
- ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
- ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
- ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
- ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
+ ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
+ ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
+ ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
+ ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
+ ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
- ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
+ ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
ROM_LOAD( "chinagat_a-13", 0x00000, 0x10000, BAD_DUMP CRC(b745cac4) SHA1(759767ca7c5123b03b9e1a42bb105d194cb76400) ) // not dumped yet, these were taken from the bootleg set instead
ROM_LOAD( "chinagat_a-12", 0x10000, 0x10000, BAD_DUMP CRC(3c864299) SHA1(cb12616e4d6c53a82beb4cd51510a632894b359c) ) // Where are these on the real board?
ROM_LOAD( "chinagat_a-15", 0x20000, 0x10000, BAD_DUMP CRC(2f268f37) SHA1(f82cfe3b2001d5ed2a709ca9c51febcf624bb627) )
ROM_LOAD( "chinagat_a-14", 0x30000, 0x10000, BAD_DUMP CRC(aef814c8) SHA1(f6b9229ca7beb9a0e47d1f6a1083c6102fdd20c8) )
- ROM_REGION(0x40000, "oki", 0 ) /* ADPCM */
+ ROM_REGION(0x40000, "oki", 0 ) /* ADPCM */
ROM_LOAD( "23j1-0.53", 0x00000, 0x20000, CRC(f91f1001) SHA1(378402a3c966cabd61e9662ae5decd66672a228b) )
ROM_LOAD( "23j2-0.52", 0x20000, 0x20000, CRC(8b6f26e9) SHA1(7da26ae846814b3957b19c38b6bf7e83617dc6cc) )
- ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
- ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
- ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
+ ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
+ ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
+ ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
ROM_END
ROM_START( saiyugou )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
- ROM_LOAD( "23j3-0.51", 0x10000, 0x18000, CRC(aa8132a2) SHA1(87c3bd447767f263113c4865afc905a0e484a625) ) /* Banks 0x4000 long @ 0x4000 */
- ROM_CONTINUE( 0x08000, 0x08000) /* Static code */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
+ ROM_LOAD( "23j3-0.51", 0x10000, 0x18000, CRC(aa8132a2) SHA1(87c3bd447767f263113c4865afc905a0e484a625) ) /* Banks 0x4000 long @ 0x4000 */
+ ROM_CONTINUE( 0x08000, 0x08000) /* Static code */
- ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
- ROM_LOAD( "23j4-0.48", 0x10000, 0x18000, CRC(2914af38) SHA1(3d690fa50b7d36a22de82c026d59a16126a7b73c) ) /* Banks 0x4000 long @ 0x4000 */
- ROM_CONTINUE( 0x08000, 0x08000) /* Static code */
+ ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
+ ROM_LOAD( "23j4-0.48", 0x10000, 0x18000, CRC(2914af38) SHA1(3d690fa50b7d36a22de82c026d59a16126a7b73c) ) /* Banks 0x4000 long @ 0x4000 */
+ ROM_CONTINUE( 0x08000, 0x08000) /* Static code */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
ROM_LOAD( "23j0-0.40", 0x00000, 0x8000, CRC(9ffcadb6) SHA1(606dbdd73aee3cabb2142200ac6f8c96169e4b19) )
- ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
- ROM_LOAD( "23j6-0.18", 0x00000, 0x20000, CRC(86d33df0) SHA1(3419959c28703c5177de9c11b61e1dba9e76aca5) ) /* 0,1,2,3 */
+ ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
+ ROM_LOAD( "23j6-0.18", 0x00000, 0x20000, CRC(86d33df0) SHA1(3419959c28703c5177de9c11b61e1dba9e76aca5) ) /* 0,1,2,3 */
- ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
- ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
- ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
- ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
- ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
+ ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
+ ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
+ ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
+ ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
+ ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
- ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
+ ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
ROM_LOAD( "saiyugou_a-13", 0x00000, 0x10000, BAD_DUMP CRC(b745cac4) SHA1(759767ca7c5123b03b9e1a42bb105d194cb76400) ) // not dumped yet, these were taken from the bootleg set instead
ROM_LOAD( "saiyugou_a-12", 0x10000, 0x10000, BAD_DUMP CRC(3c864299) SHA1(cb12616e4d6c53a82beb4cd51510a632894b359c) ) // Where are these on the real board?
ROM_LOAD( "saiyugou_a-15", 0x20000, 0x10000, BAD_DUMP CRC(2f268f37) SHA1(f82cfe3b2001d5ed2a709ca9c51febcf624bb627) )
ROM_LOAD( "saiyugou_a-14", 0x30000, 0x10000, BAD_DUMP CRC(aef814c8) SHA1(f6b9229ca7beb9a0e47d1f6a1083c6102fdd20c8) )
- ROM_REGION(0x40000, "oki", 0 ) /* ADPCM */
+ ROM_REGION(0x40000, "oki", 0 ) /* ADPCM */
ROM_LOAD( "23j1-0.53", 0x00000, 0x20000, CRC(f91f1001) SHA1(378402a3c966cabd61e9662ae5decd66672a228b) )
ROM_LOAD( "23j2-0.52", 0x20000, 0x20000, CRC(8b6f26e9) SHA1(7da26ae846814b3957b19c38b6bf7e83617dc6cc) )
- ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
- ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
- ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
+ ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
+ ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
+ ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
ROM_END
ROM_START( saiyugoub1 )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
- ROM_LOAD( "23j3-0.51", 0x10000, 0x18000, CRC(aa8132a2) SHA1(87c3bd447767f263113c4865afc905a0e484a625) ) /* Banks 0x4000 long @ 0x4000 */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
+ ROM_LOAD( "23j3-0.51", 0x10000, 0x18000, CRC(aa8132a2) SHA1(87c3bd447767f263113c4865afc905a0e484a625) ) /* Banks 0x4000 long @ 0x4000 */
/* Orientation of bootleg ROMs which are split, but otherwise the same.
- ROM_LOAD( "a-5.bin", 0x10000, 0x10000, CRC(39795aa5) ) Banks 0x4000 long @ 0x4000
- ROM_LOAD( "a-9.bin", 0x20000, 0x08000, CRC(051ebe92) ) Banks 0x4000 long @ 0x4000
- */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
+ ROM_LOAD( "a-5.bin", 0x10000, 0x10000, CRC(39795aa5) ) Banks 0x4000 long @ 0x4000
+ ROM_LOAD( "a-9.bin", 0x20000, 0x08000, CRC(051ebe92) ) Banks 0x4000 long @ 0x4000
+ */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
- ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
- ROM_LOAD( "23j4-0.48", 0x10000, 0x18000, CRC(2914af38) SHA1(3d690fa50b7d36a22de82c026d59a16126a7b73c) ) /* Banks 0x4000 long @ 0x4000 */
+ ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
+ ROM_LOAD( "23j4-0.48", 0x10000, 0x18000, CRC(2914af38) SHA1(3d690fa50b7d36a22de82c026d59a16126a7b73c) ) /* Banks 0x4000 long @ 0x4000 */
/* Orientation of bootleg ROMs which are split, but otherwise the same.
- ROM_LOAD( "a-4.bin", 0x10000, 0x10000, CRC(9effddc1) ) Banks 0x4000 long @ 0x4000
- ROM_LOAD( "a-8.bin", 0x20000, 0x08000, CRC(a436edb8) ) Banks 0x4000 long @ 0x4000
- */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
+ ROM_LOAD( "a-4.bin", 0x10000, 0x10000, CRC(9effddc1) ) Banks 0x4000 long @ 0x4000
+ ROM_LOAD( "a-8.bin", 0x20000, 0x08000, CRC(a436edb8) ) Banks 0x4000 long @ 0x4000
+ */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
ROM_LOAD( "a-1.bin", 0x00000, 0x8000, CRC(46e5a6d4) SHA1(965ed7bdb727ab32ce3322ca49f1a4e3786e8051) )
- ROM_REGION( 0x800, "mcu", 0 ) /* ADPCM CPU, 1KB */
+ ROM_REGION( 0x800, "mcu", 0 ) /* ADPCM CPU, 1KB */
ROM_LOAD( "mcu8748.bin", 0x000, 0x400, CRC(6d28d6c5) SHA1(20582c62a72545e68c2e155b063ee7e95e1228ce) )
- ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
- ROM_LOAD( "23j6-0.18", 0x00000, 0x20000, CRC(86d33df0) SHA1(3419959c28703c5177de9c11b61e1dba9e76aca5) ) /* 0,1,2,3 */
+ ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
+ ROM_LOAD( "23j6-0.18", 0x00000, 0x20000, CRC(86d33df0) SHA1(3419959c28703c5177de9c11b61e1dba9e76aca5) ) /* 0,1,2,3 */
/* Orientation of bootleg ROMs which are split, but otherwise the same.
- ROM_LOAD( "a-2.bin", 0x00000, 0x10000, CRC(baa5a3b9) ) 0,1
- ROM_LOAD( "a-3.bin", 0x10000, 0x10000, CRC(532d59be) ) 2,3
- */
-
- ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
- ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
- ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
- ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
- ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
+ ROM_LOAD( "a-2.bin", 0x00000, 0x10000, CRC(baa5a3b9) ) 0,1
+ ROM_LOAD( "a-3.bin", 0x10000, 0x10000, CRC(532d59be) ) 2,3
+ */
+
+ ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
+ ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
+ ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
+ ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
+ ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
/* Orientation of bootleg ROMs which are split, but otherwise the same
- ROM_LOAD( "a-23.bin", 0x00000, 0x10000, CRC(12b56225) ) 2,3
- ROM_LOAD( "a-22.bin", 0x10000, 0x10000, CRC(b592aa9b) ) 2,3
- ROM_LOAD( "a-21.bin", 0x20000, 0x10000, CRC(a331ba3d) ) 2,3
- ROM_LOAD( "a-20.bin", 0x30000, 0x10000, CRC(2515d742) ) 2,3
- ROM_LOAD( "a-19.bin", 0x40000, 0x10000, CRC(d796f2e4) ) 0,1
- ROM_LOAD( "a-18.bin", 0x50000, 0x10000, CRC(c9e1c2f9) ) 0,1
- ROM_LOAD( "a-17.bin", 0x60000, 0x10000, CRC(00b6db0a) ) 0,1
- ROM_LOAD( "a-16.bin", 0x70000, 0x10000, CRC(f196818b) ) 0,1
- */
-
- ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
+ ROM_LOAD( "a-23.bin", 0x00000, 0x10000, CRC(12b56225) ) 2,3
+ ROM_LOAD( "a-22.bin", 0x10000, 0x10000, CRC(b592aa9b) ) 2,3
+ ROM_LOAD( "a-21.bin", 0x20000, 0x10000, CRC(a331ba3d) ) 2,3
+ ROM_LOAD( "a-20.bin", 0x30000, 0x10000, CRC(2515d742) ) 2,3
+ ROM_LOAD( "a-19.bin", 0x40000, 0x10000, CRC(d796f2e4) ) 0,1
+ ROM_LOAD( "a-18.bin", 0x50000, 0x10000, CRC(c9e1c2f9) ) 0,1
+ ROM_LOAD( "a-17.bin", 0x60000, 0x10000, CRC(00b6db0a) ) 0,1
+ ROM_LOAD( "a-16.bin", 0x70000, 0x10000, CRC(f196818b) ) 0,1
+ */
+
+ ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
ROM_LOAD( "a-13", 0x00000, 0x10000, CRC(b745cac4) SHA1(759767ca7c5123b03b9e1a42bb105d194cb76400) )
ROM_LOAD( "a-12", 0x10000, 0x10000, CRC(3c864299) SHA1(cb12616e4d6c53a82beb4cd51510a632894b359c) )
ROM_LOAD( "a-15", 0x20000, 0x10000, CRC(2f268f37) SHA1(f82cfe3b2001d5ed2a709ca9c51febcf624bb627) )
@@ -824,80 +824,80 @@ ROM_START( saiyugoub1 )
/* Some bootlegs have incorrectly halved the ADPCM data ! */
/* These are same as the 128k sample except nibble-swapped */
- ROM_REGION(0x40000, "adpcm", 0 ) /* ADPCM */ /* Bootleggers wrong data */
- ROM_LOAD ( "a-6.bin", 0x00000, 0x10000, CRC(4da4e935) SHA1(235a1589165a23cfad29e07cf66d7c3a777fc904) ) /* 0x8000, 0x7cd47f01 */
- ROM_LOAD ( "a-7.bin", 0x10000, 0x10000, CRC(6284c254) SHA1(e01be1bd4768ae0ccb1cec65b3a6bc80ed7a4b00) ) /* 0x8000, 0x7091959c */
- ROM_LOAD ( "a-10.bin", 0x20000, 0x10000, CRC(b728ec6e) SHA1(433b5f907e4918e89b79bd927e2993ad3030017b) ) /* 0x8000, 0x78349cb6 */
- ROM_LOAD ( "a-11.bin", 0x30000, 0x10000, CRC(a50d1895) SHA1(0c2c1f8a2e945d6c53ce43413f0e63ced45bae17) ) /* 0x8000, 0xaa5b6834 */
-
- ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
- ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
- ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
+ ROM_REGION(0x40000, "adpcm", 0 ) /* ADPCM */ /* Bootleggers wrong data */
+ ROM_LOAD ( "a-6.bin", 0x00000, 0x10000, CRC(4da4e935) SHA1(235a1589165a23cfad29e07cf66d7c3a777fc904) ) /* 0x8000, 0x7cd47f01 */
+ ROM_LOAD ( "a-7.bin", 0x10000, 0x10000, CRC(6284c254) SHA1(e01be1bd4768ae0ccb1cec65b3a6bc80ed7a4b00) ) /* 0x8000, 0x7091959c */
+ ROM_LOAD ( "a-10.bin", 0x20000, 0x10000, CRC(b728ec6e) SHA1(433b5f907e4918e89b79bd927e2993ad3030017b) ) /* 0x8000, 0x78349cb6 */
+ ROM_LOAD ( "a-11.bin", 0x30000, 0x10000, CRC(a50d1895) SHA1(0c2c1f8a2e945d6c53ce43413f0e63ced45bae17) ) /* 0x8000, 0xaa5b6834 */
+
+ ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
+ ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
+ ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
ROM_END
ROM_START( saiyugoub2 )
- ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
- ROM_LOAD( "23j3-0.51", 0x10000, 0x18000, CRC(aa8132a2) SHA1(87c3bd447767f263113c4865afc905a0e484a625) ) /* Banks 0x4000 long @ 0x4000 */
+ ROM_REGION( 0x28000, "maincpu", 0 ) /* Main CPU: 128KB for code (bankswitched using $3F01) */
+ ROM_LOAD( "23j3-0.51", 0x10000, 0x18000, CRC(aa8132a2) SHA1(87c3bd447767f263113c4865afc905a0e484a625) ) /* Banks 0x4000 long @ 0x4000 */
/* Orientation of bootleg ROMs which are split, but otherwise the same.
- ROM_LOAD( "sai5.bin", 0x10000, 0x10000, CRC(39795aa5) ) Banks 0x4000 long @ 0x4000
- ROM_LOAD( "sai9.bin", 0x20000, 0x08000, CRC(051ebe92) ) Banks 0x4000 long @ 0x4000
- */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
+ ROM_LOAD( "sai5.bin", 0x10000, 0x10000, CRC(39795aa5) ) Banks 0x4000 long @ 0x4000
+ ROM_LOAD( "sai9.bin", 0x20000, 0x08000, CRC(051ebe92) ) Banks 0x4000 long @ 0x4000
+ */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
- ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
- ROM_LOAD( "23j4-0.48", 0x10000, 0x18000, CRC(2914af38) SHA1(3d690fa50b7d36a22de82c026d59a16126a7b73c) ) /* Banks 0x4000 long @ 0x4000 */
+ ROM_REGION( 0x28000, "sub", 0 ) /* Slave CPU: 128KB for code (bankswitched using $2000) */
+ ROM_LOAD( "23j4-0.48", 0x10000, 0x18000, CRC(2914af38) SHA1(3d690fa50b7d36a22de82c026d59a16126a7b73c) ) /* Banks 0x4000 long @ 0x4000 */
/* Orientation of bootleg ROMs which are split, but otherwise the same.
- ROM_LOAD( "sai4.bin", 0x10000, 0x10000, CRC(9effddc1) ) Banks 0x4000 long @ 0x4000
- ROM_LOAD( "sai8.bin", 0x20000, 0x08000, CRC(a436edb8) ) Banks 0x4000 long @ 0x4000
- */
- ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
+ ROM_LOAD( "sai4.bin", 0x10000, 0x10000, CRC(9effddc1) ) Banks 0x4000 long @ 0x4000
+ ROM_LOAD( "sai8.bin", 0x20000, 0x08000, CRC(a436edb8) ) Banks 0x4000 long @ 0x4000
+ */
+ ROM_CONTINUE( 0x08000, 0x08000 ) /* Static code */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Music CPU, 64KB */
ROM_LOAD( "sai-alt1.bin", 0x00000, 0x8000, CRC(8d397a8d) SHA1(52599521c3dbcecc1ae56bb80dc855e76d700134) )
// ROM_REGION( 0x800, "cpu3", 0 ) /* ADPCM CPU, 1KB */
// ROM_LOAD( "sgr-8749.bin", 0x000, 0x800, CRC(9237e8c5) ) /* same as above but padded with 00 for different mcu */
- ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
- ROM_LOAD( "23j6-0.18", 0x00000, 0x20000, CRC(86d33df0) SHA1(3419959c28703c5177de9c11b61e1dba9e76aca5) ) /* 0,1,2,3 */
+ ROM_REGION(0x20000, "gfx1", 0 ) /* Text */
+ ROM_LOAD( "23j6-0.18", 0x00000, 0x20000, CRC(86d33df0) SHA1(3419959c28703c5177de9c11b61e1dba9e76aca5) ) /* 0,1,2,3 */
/* Orientation of bootleg ROMs which are split, but otherwise the same.
- ROM_LOAD( "sai2.bin", 0x00000, 0x10000, CRC(baa5a3b9) ) 0,1
- ROM_LOAD( "sai3.bin", 0x10000, 0x10000, CRC(532d59be) ) 2,3
- */
-
- ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
- ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
- ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
- ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
- ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
+ ROM_LOAD( "sai2.bin", 0x00000, 0x10000, CRC(baa5a3b9) ) 0,1
+ ROM_LOAD( "sai3.bin", 0x10000, 0x10000, CRC(532d59be) ) 2,3
+ */
+
+ ROM_REGION(0x80000, "gfx2", 0 ) /* Sprites */
+ ROM_LOAD( "23j7-0.103", 0x00000, 0x20000, CRC(2f445030) SHA1(3fcf32097e655e963d952d01a30396dc195269ca) ) /* 2,3 */
+ ROM_LOAD( "23j8-0.102", 0x20000, 0x20000, CRC(237f725a) SHA1(47bebe5b9878ca10fe6efd4f353717e53a372416) ) /* 2,3 */
+ ROM_LOAD( "23j9-0.101", 0x40000, 0x20000, CRC(8caf6097) SHA1(50ad192f831b055586a4a9974f8c6c2f2063ede5) ) /* 0,1 */
+ ROM_LOAD( "23ja-0.100", 0x60000, 0x20000, CRC(f678594f) SHA1(4bdcf9407543925f4630a8c7f1f48b85f76343a9) ) /* 0,1 */
/* Orientation of bootleg ROMs which are split, but otherwise the same
- ROM_LOAD( "sai23.bin", 0x00000, 0x10000, CRC(12b56225) ) 2,3
- ROM_LOAD( "sai22.bin", 0x10000, 0x10000, CRC(b592aa9b) ) 2,3
- ROM_LOAD( "sai21.bin", 0x20000, 0x10000, CRC(a331ba3d) ) 2,3
- ROM_LOAD( "sai20.bin", 0x30000, 0x10000, CRC(2515d742) ) 2,3
- ROM_LOAD( "sai19.bin", 0x40000, 0x10000, CRC(d796f2e4) ) 0,1
- ROM_LOAD( "sai18.bin", 0x50000, 0x10000, CRC(c9e1c2f9) ) 0,1
- ROM_LOAD( "roku17.bin",0x60000, 0x10000, CRC(00b6db0a) ) 0,1
- ROM_LOAD( "sai16.bin", 0x70000, 0x10000, CRC(f196818b) ) 0,1
- */
-
- ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
+ ROM_LOAD( "sai23.bin", 0x00000, 0x10000, CRC(12b56225) ) 2,3
+ ROM_LOAD( "sai22.bin", 0x10000, 0x10000, CRC(b592aa9b) ) 2,3
+ ROM_LOAD( "sai21.bin", 0x20000, 0x10000, CRC(a331ba3d) ) 2,3
+ ROM_LOAD( "sai20.bin", 0x30000, 0x10000, CRC(2515d742) ) 2,3
+ ROM_LOAD( "sai19.bin", 0x40000, 0x10000, CRC(d796f2e4) ) 0,1
+ ROM_LOAD( "sai18.bin", 0x50000, 0x10000, CRC(c9e1c2f9) ) 0,1
+ ROM_LOAD( "roku17.bin",0x60000, 0x10000, CRC(00b6db0a) ) 0,1
+ ROM_LOAD( "sai16.bin", 0x70000, 0x10000, CRC(f196818b) ) 0,1
+ */
+
+ ROM_REGION(0x40000, "gfx3", 0 ) /* Background */
ROM_LOAD( "a-13", 0x00000, 0x10000, CRC(b745cac4) SHA1(759767ca7c5123b03b9e1a42bb105d194cb76400) )
ROM_LOAD( "a-12", 0x10000, 0x10000, CRC(3c864299) SHA1(cb12616e4d6c53a82beb4cd51510a632894b359c) )
ROM_LOAD( "a-15", 0x20000, 0x10000, CRC(2f268f37) SHA1(f82cfe3b2001d5ed2a709ca9c51febcf624bb627) )
ROM_LOAD( "a-14", 0x30000, 0x10000, CRC(aef814c8) SHA1(f6b9229ca7beb9a0e47d1f6a1083c6102fdd20c8) )
- ROM_REGION(0x40000, "adpcm", 0 ) /* ADPCM */
+ ROM_REGION(0x40000, "adpcm", 0 ) /* ADPCM */
/* These are same as the 128k sample except nibble-swapped */
/* Some bootlegs have incorrectly halved the ADPCM data ! Bootleggers wrong data */
- ROM_LOAD ( "a-6.bin", 0x00000, 0x10000, CRC(4da4e935) SHA1(235a1589165a23cfad29e07cf66d7c3a777fc904) ) /* 0x8000, 0x7cd47f01 */
- ROM_LOAD ( "a-7.bin", 0x10000, 0x10000, CRC(6284c254) SHA1(e01be1bd4768ae0ccb1cec65b3a6bc80ed7a4b00) ) /* 0x8000, 0x7091959c */
- ROM_LOAD ( "a-10.bin", 0x20000, 0x10000, CRC(b728ec6e) SHA1(433b5f907e4918e89b79bd927e2993ad3030017b) ) /* 0x8000, 0x78349cb6 */
- ROM_LOAD ( "a-11.bin", 0x30000, 0x10000, CRC(a50d1895) SHA1(0c2c1f8a2e945d6c53ce43413f0e63ced45bae17) ) /* 0x8000, 0xaa5b6834 */
-
- ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
- ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
- ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
+ ROM_LOAD ( "a-6.bin", 0x00000, 0x10000, CRC(4da4e935) SHA1(235a1589165a23cfad29e07cf66d7c3a777fc904) ) /* 0x8000, 0x7cd47f01 */
+ ROM_LOAD ( "a-7.bin", 0x10000, 0x10000, CRC(6284c254) SHA1(e01be1bd4768ae0ccb1cec65b3a6bc80ed7a4b00) ) /* 0x8000, 0x7091959c */
+ ROM_LOAD ( "a-10.bin", 0x20000, 0x10000, CRC(b728ec6e) SHA1(433b5f907e4918e89b79bd927e2993ad3030017b) ) /* 0x8000, 0x78349cb6 */
+ ROM_LOAD ( "a-11.bin", 0x30000, 0x10000, CRC(a50d1895) SHA1(0c2c1f8a2e945d6c53ce43413f0e63ced45bae17) ) /* 0x8000, 0xaa5b6834 */
+
+ ROM_REGION(0x300, "user1", 0 ) /* Unknown Bipolar PROMs */
+ ROM_LOAD( "23jb-0.16", 0x000, 0x200, CRC(46339529) SHA1(64f4c42a826d67b7cbaa8a23a45ebc4eb6248891) ) /* 82S131 on video board */
+ ROM_LOAD( "23j5-0.45", 0x200, 0x100, CRC(fdb130a9) SHA1(4c4f214229b9fab2b5d69c745ec5428787b89e1f) ) /* 82S129 on main board */
ROM_END
diff --git a/src/mame/drivers/chinsan.c b/src/mame/drivers/chinsan.c
index 14b851667cf..00503c239e2 100644
--- a/src/mame/drivers/chinsan.c
+++ b/src/mame/drivers/chinsan.c
@@ -61,7 +61,7 @@ public:
UINT8 m_port_select;
UINT32 m_adpcm_pos;
UINT8 m_adpcm_idle;
- UINT8 m_adpcm_data;
+ UINT8 m_adpcm_data;
UINT8 m_trigger;
DECLARE_WRITE8_MEMBER(ctrl_w);
DECLARE_WRITE8_MEMBER(chinsan_port00_w);
@@ -161,13 +161,13 @@ WRITE8_MEMBER(chinsan_state::chinsan_port00_w)
m_port_select = data;
if (
- (data != 0x40) &&
- (data != 0x4f) &&
- (data != 0x53) &&
- (data != 0x57) &&
- (data != 0x5b) &&
- (data != 0x5d) &&
- (data != 0x5e))
+ (data != 0x40) &&
+ (data != 0x4f) &&
+ (data != 0x53) &&
+ (data != 0x57) &&
+ (data != 0x5b) &&
+ (data != 0x5d) &&
+ (data != 0x5e))
logerror("write port 00 %02x\n", data);
}
@@ -262,7 +262,7 @@ static ADDRESS_MAP_START( chinsan_io, AS_IO, 8, chinsan_state )
AM_RANGE(0x02, 0x02) AM_READ(chinsan_input_port_1_r)
AM_RANGE(0x10, 0x11) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w)
AM_RANGE(0x20, 0x20) AM_WRITE(chin_adpcm_w)
- AM_RANGE(0x30, 0x30) AM_WRITE(ctrl_w) // ROM bank + unknown stuff (input mutliplex?)
+ AM_RANGE(0x30, 0x30) AM_WRITE(ctrl_w) // ROM bank + unknown stuff (input mutliplex?)
ADDRESS_MAP_END
@@ -566,8 +566,8 @@ static void chin_adpcm_int( device_t *device )
static const msm5205_interface msm5205_config =
{
- chin_adpcm_int, /* interrupt function */
- MSM5205_S64_4B /* 8kHz */
+ chin_adpcm_int, /* interrupt function */
+ MSM5205_S64_4B /* 8kHz */
};
/*************************************
@@ -602,7 +602,7 @@ void chinsan_state::machine_reset()
static MACHINE_CONFIG_START( chinsan, chinsan_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,10000000/2) /* ? MHz */
+ MCFG_CPU_ADD("maincpu", Z80,10000000/2) /* ? MHz */
MCFG_CPU_PROGRAM_MAP(chinsan_map)
MCFG_CPU_IO_MAP(chinsan_io)
MCFG_CPU_VBLANK_INT_DRIVER("screen", chinsan_state, irq0_line_hold)
@@ -646,7 +646,7 @@ MACHINE_CONFIG_END
ROM_START( chinsan )
ROM_REGION( 0x20000, "maincpu", 0 ) /* encrypted code / data */
ROM_LOAD( "mm00.7d", 0x00000, 0x08000, CRC(f7a4414f) SHA1(f65223b2928f610ab97fda2f2c008806cf2420e5) )
- ROM_CONTINUE( 0x00000, 0x08000 ) // first half is blank
+ ROM_CONTINUE( 0x00000, 0x08000 ) // first half is blank
ROM_LOAD( "mm01.8d", 0x10000, 0x10000, CRC(c69ddbf5) SHA1(9533365c1761b113174d53a2e23ce6a7baca7dfe) )
ROM_REGION( 0x2000, "user1", 0 ) /* MC8123 key */
diff --git a/src/mame/drivers/chqflag.c b/src/mame/drivers/chqflag.c
index 8bcfe5deea9..d82024fec59 100644
--- a/src/mame/drivers/chqflag.c
+++ b/src/mame/drivers/chqflag.c
@@ -53,14 +53,14 @@ WRITE8_MEMBER(chqflag_state::chqflag_bankswitch_w)
membank("bank5")->set_base(m_generic_paletteram_8);
if (m_k051316_readroms)
- space.install_legacy_readwrite_handler(*m_k051316_1, 0x1000, 0x17ff, FUNC(k051316_rom_r), FUNC(k051316_w)); /* 051316 #1 (ROM test) */
+ space.install_legacy_readwrite_handler(*m_k051316_1, 0x1000, 0x17ff, FUNC(k051316_rom_r), FUNC(k051316_w)); /* 051316 #1 (ROM test) */
else
- space.install_legacy_readwrite_handler(*m_k051316_1, 0x1000, 0x17ff, FUNC(k051316_r), FUNC(k051316_w)); /* 051316 #1 */
+ space.install_legacy_readwrite_handler(*m_k051316_1, 0x1000, 0x17ff, FUNC(k051316_r), FUNC(k051316_w)); /* 051316 #1 */
}
else
{
- space.install_readwrite_bank(0x1000, 0x17ff, "bank1"); /* RAM */
- space.install_readwrite_bank(0x1800, 0x1fff, "bank2"); /* RAM */
+ space.install_readwrite_bank(0x1000, 0x17ff, "bank1"); /* RAM */
+ space.install_readwrite_bank(0x1800, 0x1fff, "bank2"); /* RAM */
}
/* other bits unknown/unused */
@@ -77,9 +77,9 @@ WRITE8_MEMBER(chqflag_state::chqflag_vreg_w)
m_k051316_readroms = (data & 0x10);
if (m_k051316_readroms)
- space.install_legacy_read_handler(*m_k051316_2, 0x2800, 0x2fff, FUNC(k051316_rom_r)); /* 051316 (ROM test) */
+ space.install_legacy_read_handler(*m_k051316_2, 0x2800, 0x2fff, FUNC(k051316_rom_r)); /* 051316 (ROM test) */
else
- space.install_legacy_read_handler(*m_k051316_2, 0x2800, 0x2fff, FUNC(k051316_r)); /* 051316 */
+ space.install_legacy_read_handler(*m_k051316_2, 0x2800, 0x2fff, FUNC(k051316_r)); /* 051316 */
/* Bits 3-7 probably control palette dimming in a similar way to TMNT2/Sunset Riders, */
/* however I don't have enough evidence to determine the exact behaviour. */
@@ -119,10 +119,10 @@ READ8_MEMBER(chqflag_state::analog_read_r)
{
switch (m_analog_ctrl & 0x03)
{
- case 0x00: return (m_accel = ioport("IN3")->read()); /* accelerator */
- case 0x01: return (m_wheel = ioport("IN4")->read()); /* steering */
- case 0x02: return m_accel; /* accelerator (previous?) */
- case 0x03: return m_wheel; /* steering (previous?) */
+ case 0x00: return (m_accel = ioport("IN3")->read()); /* accelerator */
+ case 0x01: return (m_wheel = ioport("IN4")->read()); /* steering */
+ case 0x02: return m_accel; /* accelerator (previous?) */
+ case 0x03: return m_wheel; /* steering (previous?) */
}
return 0xff;
@@ -138,29 +138,29 @@ WRITE8_MEMBER(chqflag_state::chqflag_sh_irqtrigger_w)
/****************************************************************************/
static ADDRESS_MAP_START( chqflag_map, AS_PROGRAM, 8, chqflag_state )
- AM_RANGE(0x0000, 0x0fff) AM_RAM /* RAM */
- AM_RANGE(0x1000, 0x17ff) AM_RAMBANK("bank1") /* banked RAM (RAM/051316 (chip 1)) */
- AM_RANGE(0x1800, 0x1fff) AM_RAMBANK("bank2") /* palette + RAM */
- AM_RANGE(0x2000, 0x2007) AM_DEVREADWRITE_LEGACY("k051960", k051937_r, k051937_w) /* Sprite control registers */
- AM_RANGE(0x2400, 0x27ff) AM_DEVREADWRITE_LEGACY("k051960", k051960_r, k051960_w) /* Sprite RAM */
- AM_RANGE(0x2800, 0x2fff) AM_READ_BANK("bank3") AM_DEVWRITE_LEGACY("k051316_2", k051316_w) /* 051316 zoom/rotation (chip 2) */
- AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_byte_w) /* sound code # */
- AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w) /* cause interrupt on audio CPU */
- AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w) /* bankswitch control */
- AM_RANGE(0x3003, 0x3003) AM_WRITE(chqflag_vreg_w) /* enable K051316 ROM reading */
- AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW1") /* DIPSW #1 */
- AM_RANGE(0x3200, 0x3200) AM_READ_PORT("IN1") /* COINSW, STARTSW, test mode */
- AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0") /* DIPSW #3, SW 4 */
- AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2") /* DIPSW #2 */
- AM_RANGE(0x3300, 0x3300) AM_WRITE(watchdog_reset_w) /* watchdog timer */
- AM_RANGE(0x3400, 0x341f) AM_DEVREADWRITE_LEGACY("k051733", k051733_r, k051733_w) /* 051733 (protection) */
- AM_RANGE(0x3500, 0x350f) AM_DEVWRITE_LEGACY("k051316_1", k051316_ctrl_w) /* 051316 control registers (chip 1) */
- AM_RANGE(0x3600, 0x360f) AM_DEVWRITE_LEGACY("k051316_2", k051316_ctrl_w) /* 051316 control registers (chip 2) */
- AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel */
- AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2") /* Brake + Shift + ? */
- AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w) /* accelerator/wheel */
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank4") /* banked ROM */
- AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
+ AM_RANGE(0x0000, 0x0fff) AM_RAM /* RAM */
+ AM_RANGE(0x1000, 0x17ff) AM_RAMBANK("bank1") /* banked RAM (RAM/051316 (chip 1)) */
+ AM_RANGE(0x1800, 0x1fff) AM_RAMBANK("bank2") /* palette + RAM */
+ AM_RANGE(0x2000, 0x2007) AM_DEVREADWRITE_LEGACY("k051960", k051937_r, k051937_w) /* Sprite control registers */
+ AM_RANGE(0x2400, 0x27ff) AM_DEVREADWRITE_LEGACY("k051960", k051960_r, k051960_w) /* Sprite RAM */
+ AM_RANGE(0x2800, 0x2fff) AM_READ_BANK("bank3") AM_DEVWRITE_LEGACY("k051316_2", k051316_w) /* 051316 zoom/rotation (chip 2) */
+ AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_byte_w) /* sound code # */
+ AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w) /* cause interrupt on audio CPU */
+ AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w) /* bankswitch control */
+ AM_RANGE(0x3003, 0x3003) AM_WRITE(chqflag_vreg_w) /* enable K051316 ROM reading */
+ AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW1") /* DIPSW #1 */
+ AM_RANGE(0x3200, 0x3200) AM_READ_PORT("IN1") /* COINSW, STARTSW, test mode */
+ AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0") /* DIPSW #3, SW 4 */
+ AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2") /* DIPSW #2 */
+ AM_RANGE(0x3300, 0x3300) AM_WRITE(watchdog_reset_w) /* watchdog timer */
+ AM_RANGE(0x3400, 0x341f) AM_DEVREADWRITE_LEGACY("k051733", k051733_r, k051733_w) /* 051733 (protection) */
+ AM_RANGE(0x3500, 0x350f) AM_DEVWRITE_LEGACY("k051316_1", k051316_ctrl_w) /* 051316 control registers (chip 1) */
+ AM_RANGE(0x3600, 0x360f) AM_DEVWRITE_LEGACY("k051316_2", k051316_ctrl_w) /* 051316 control registers (chip 2) */
+ AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w) /* select accelerator/wheel */
+ AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2") /* Brake + Shift + ? */
+ AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w) /* accelerator/wheel */
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank4") /* banked ROM */
+ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END
WRITE8_MEMBER(chqflag_state::k007232_bankswitch_w)
@@ -181,14 +181,14 @@ WRITE8_MEMBER(chqflag_state::k007232_bankswitch_w)
static ADDRESS_MAP_START( chqflag_sound_map, AS_PROGRAM, 8, chqflag_state )
AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */
AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
- AM_RANGE(0x9000, 0x9000) AM_WRITE(k007232_bankswitch_w) /* 007232 bankswitch */
- AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE_LEGACY("k007232_1", k007232_r, k007232_w) /* 007232 (chip 1) */
- AM_RANGE(0xa01c, 0xa01c) AM_WRITE(k007232_extvolume_w) /* extra volume, goes to the 007232 w/ A11 */
- AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE_LEGACY("k007232_2", k007232_r, k007232_w) /* 007232 (chip 2) */
- AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) /* YM2151 */
- AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
+ AM_RANGE(0x9000, 0x9000) AM_WRITE(k007232_bankswitch_w) /* 007232 bankswitch */
+ AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE_LEGACY("k007232_1", k007232_r, k007232_w) /* 007232 (chip 1) */
+ AM_RANGE(0xa01c, 0xa01c) AM_WRITE(k007232_extvolume_w) /* extra volume, goes to the 007232 w/ A11 */
+ AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE_LEGACY("k007232_2", k007232_r, k007232_w) /* 007232 (chip 2) */
+ AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ymsnd", ym2151_device, read, write) /* YM2151 */
+ AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r */
AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch2_byte_r) /* engine sound volume */
- AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ??? */
+ AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ??? */
ADDRESS_MAP_END
@@ -198,23 +198,23 @@ static INPUT_PORTS_START( chqflag )
/* Invalid = both coin slots disabled */
PORT_START("DSW2")
- PORT_DIPUNUSED_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW2:1" ) /* Manual says it's not used */
- PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "SW2:2" ) /* Manual says it's not used */
- PORT_DIPUNUSED_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW2:3" ) /* Manual says it's not used */
- PORT_DIPUNUSED_DIPLOC( 0x08, IP_ACTIVE_LOW, "SW2:4" ) /* Manual says it's not used */
- PORT_DIPUNUSED_DIPLOC( 0x10, IP_ACTIVE_LOW, "SW2:5" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW2:1" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "SW2:2" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW2:3" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x08, IP_ACTIVE_LOW, "SW2:4" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x10, IP_ACTIVE_LOW, "SW2:5" ) /* Manual says it's not used */
PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
- PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
+ PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Difficult ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Very_Difficult ) )
PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN0")
PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_DIPUNUSED_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW3:4" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW3:4" ) /* Manual says it's not used */
PORT_START("IN1")
/* COINSW + STARTSW */
@@ -224,22 +224,22 @@ static INPUT_PORTS_START( chqflag )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
/* DIPSW #3 */
- PORT_DIPUNUSED_DIPLOC( 0x20, IP_ACTIVE_LOW, "SW3:1" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x20, IP_ACTIVE_LOW, "SW3:1" ) /* Manual says it's not used */
PORT_DIPNAME( 0x40, 0x40, "Title" ) PORT_DIPLOCATION("SW3:2")
- PORT_DIPSETTING( 0x40, "Chequered Flag" )
- PORT_DIPSETTING( 0x00, "Checkered Flag" )
+ PORT_DIPSETTING( 0x40, "Chequered Flag" )
+ PORT_DIPSETTING( 0x00, "Checkered Flag" )
PORT_SERVICE_DIPLOC( 0x80, IP_ACTIVE_LOW, "SW3:3" )
- PORT_START("IN2") /* Brake, Shift + ??? */
+ PORT_START("IN2") /* Brake, Shift + ??? */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_TOGGLE
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
- PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* if this is set, it goes directly to test mode */
- PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* if bit 7 == 0, the game resets */
+ PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* if this is set, it goes directly to test mode */
+ PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* if bit 7 == 0, the game resets */
- PORT_START("IN3") /* Accelerator */
+ PORT_START("IN3") /* Accelerator */
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(5)
- PORT_START("IN4") /* Driving wheel */
+ PORT_START("IN4") /* Driving wheel */
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x10,0xef) PORT_SENSITIVITY(80) PORT_KEYDELTA(8)
INPUT_PORTS_END
@@ -251,7 +251,7 @@ static INPUT_PORTS_START( chqflagj )
// Manual says 1-5, 1-6, 1-7 and 1-8 are not used, but they work
PORT_MODIFY("IN1")
- PORT_DIPUNUSED_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW3:2" ) /* Manual says it's not used */
+ PORT_DIPUNUSED_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW3:2" ) /* Manual says it's not used */
INPUT_PORTS_END
@@ -341,7 +341,7 @@ void chqflag_state::machine_reset()
static MACHINE_CONFIG_START( chqflag, chqflag_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", KONAMI,XTAL_24MHz/8) /* 052001 (verified on pcb) */
+ MCFG_CPU_ADD("maincpu", KONAMI,XTAL_24MHz/8) /* 052001 (verified on pcb) */
MCFG_CPU_PROGRAM_MAP(chqflag_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", chqflag_state, chqflag_scanline, "screen", 0, 1)
@@ -392,63 +392,63 @@ static MACHINE_CONFIG_START( chqflag, chqflag_state )
MACHINE_CONFIG_END
ROM_START( chqflag )
- ROM_REGION( 0x58000, "maincpu", 0 ) /* 052001 code */
- ROM_LOAD( "717h02", 0x050000, 0x008000, CRC(f5bd4e78) SHA1(7bab02152d055a6c3a322c88e7ee0b85a39d8ef2) ) /* banked ROM */
- ROM_CONTINUE( 0x008000, 0x008000 ) /* fixed ROM */
- ROM_LOAD( "717e10", 0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) /* banked ROM */
+ ROM_REGION( 0x58000, "maincpu", 0 ) /* 052001 code */
+ ROM_LOAD( "717h02", 0x050000, 0x008000, CRC(f5bd4e78) SHA1(7bab02152d055a6c3a322c88e7ee0b85a39d8ef2) ) /* banked ROM */
+ ROM_CONTINUE( 0x008000, 0x008000 ) /* fixed ROM */
+ ROM_LOAD( "717e10", 0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) /* banked ROM */
/* extra memory for banked RAM */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
- ROM_LOAD( "717e01", 0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
+ ROM_LOAD( "717e01", 0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
- ROM_REGION( 0x100000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "717e04", 0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) ) /* sprites */
- ROM_LOAD( "717e05", 0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) ) /* sprites */
+ ROM_REGION( 0x100000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "717e04", 0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) ) /* sprites */
+ ROM_LOAD( "717e05", 0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) ) /* sprites */
- ROM_REGION( 0x020000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "717e06", 0x000000, 0x020000, CRC(1ec26c7a) SHA1(05b5b522c5ebf5d0a71a7fc39ec9382008ef33c8) ) /* zoom/rotate (N16) */
+ ROM_REGION( 0x020000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "717e06", 0x000000, 0x020000, CRC(1ec26c7a) SHA1(05b5b522c5ebf5d0a71a7fc39ec9382008ef33c8) ) /* zoom/rotate (N16) */
- ROM_REGION( 0x100000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "717e07", 0x000000, 0x040000, CRC(b9a565a8) SHA1(a11782f7336e5ad58a4c6ea81f2eeac35d5e7d0a) ) /* zoom/rotate (L20) */
- ROM_LOAD( "717e08", 0x040000, 0x040000, CRC(b68a212e) SHA1(b2bd121a43552c3ade528ac763a0df40c3e648e0) ) /* zoom/rotate (L22) */
- ROM_LOAD( "717e11", 0x080000, 0x040000, CRC(ebb171ec) SHA1(d65d4a6b169ce03e4427b2a397484634f938236b) ) /* zoom/rotate (N20) */
- ROM_LOAD( "717e12", 0x0c0000, 0x040000, CRC(9269335d) SHA1(af298c8cff50d707d6abc806065f8e931f975dc0) ) /* zoom/rotate (N22) */
+ ROM_REGION( 0x100000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "717e07", 0x000000, 0x040000, CRC(b9a565a8) SHA1(a11782f7336e5ad58a4c6ea81f2eeac35d5e7d0a) ) /* zoom/rotate (L20) */
+ ROM_LOAD( "717e08", 0x040000, 0x040000, CRC(b68a212e) SHA1(b2bd121a43552c3ade528ac763a0df40c3e648e0) ) /* zoom/rotate (L22) */
+ ROM_LOAD( "717e11", 0x080000, 0x040000, CRC(ebb171ec) SHA1(d65d4a6b169ce03e4427b2a397484634f938236b) ) /* zoom/rotate (N20) */
+ ROM_LOAD( "717e12", 0x0c0000, 0x040000, CRC(9269335d) SHA1(af298c8cff50d707d6abc806065f8e931f975dc0) ) /* zoom/rotate (N22) */
- ROM_REGION( 0x080000, "k007232_1", 0 ) /* 007232 data (chip 1) */
- ROM_LOAD( "717e03", 0x000000, 0x080000, CRC(ebe73c22) SHA1(fad3334e5e91bf8d11b74ffdbbfd57567e6f6f8c) )
+ ROM_REGION( 0x080000, "k007232_1", 0 ) /* 007232 data (chip 1) */
+ ROM_LOAD( "717e03", 0x000000, 0x080000, CRC(ebe73c22) SHA1(fad3334e5e91bf8d11b74ffdbbfd57567e6f6f8c) )
- ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
- ROM_LOAD( "717e09", 0x000000, 0x080000, CRC(d74e857d) SHA1(00c851c857650d67fc4caccea4461d99be4acb3c) )
+ ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
+ ROM_LOAD( "717e09", 0x000000, 0x080000, CRC(d74e857d) SHA1(00c851c857650d67fc4caccea4461d99be4acb3c) )
ROM_END
ROM_START( chqflagj )
- ROM_REGION( 0x58000, "maincpu", 0 ) /* 052001 code */
- ROM_LOAD( "717j02.bin", 0x050000, 0x008000, CRC(05355daa) SHA1(130ddbc289c077565e44f33c63a63963e6417e19) ) /* banked ROM */
- ROM_CONTINUE( 0x008000, 0x008000 ) /* fixed ROM */
- ROM_LOAD( "717e10", 0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) /* banked ROM */
+ ROM_REGION( 0x58000, "maincpu", 0 ) /* 052001 code */
+ ROM_LOAD( "717j02.bin", 0x050000, 0x008000, CRC(05355daa) SHA1(130ddbc289c077565e44f33c63a63963e6417e19) ) /* banked ROM */
+ ROM_CONTINUE( 0x008000, 0x008000 ) /* fixed ROM */
+ ROM_LOAD( "717e10", 0x010000, 0x040000, CRC(72fc56f6) SHA1(433ea9a33f0230e046c731c70060f6a38db14ac7) ) /* banked ROM */
/* extra memory for banked RAM */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
- ROM_LOAD( "717e01", 0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the SOUND CPU */
+ ROM_LOAD( "717e01", 0x000000, 0x008000, CRC(966b8ba8) SHA1(ab7448cb61fa5922b1d8ae5f0d0f42d734ed4f93) )
- ROM_REGION( 0x100000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "717e04", 0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) ) /* sprites */
- ROM_LOAD( "717e05", 0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) ) /* sprites */
+ ROM_REGION( 0x100000, "gfx1", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "717e04", 0x000000, 0x080000, CRC(1a50a1cc) SHA1(bc16fab84c637ed124e37b115ddc0149560b727d) ) /* sprites */
+ ROM_LOAD( "717e05", 0x080000, 0x080000, CRC(46ccb506) SHA1(3ed1f54744fc5cdc0f48e42f250c366267a8199a) ) /* sprites */
- ROM_REGION( 0x020000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "717e06", 0x000000, 0x020000, CRC(1ec26c7a) SHA1(05b5b522c5ebf5d0a71a7fc39ec9382008ef33c8) ) /* zoom/rotate (N16) */
+ ROM_REGION( 0x020000, "gfx2", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "717e06", 0x000000, 0x020000, CRC(1ec26c7a) SHA1(05b5b522c5ebf5d0a71a7fc39ec9382008ef33c8) ) /* zoom/rotate (N16) */
- ROM_REGION( 0x100000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
- ROM_LOAD( "717e07", 0x000000, 0x040000, CRC(b9a565a8) SHA1(a11782f7336e5ad58a4c6ea81f2eeac35d5e7d0a) ) /* zoom/rotate (L20) */
- ROM_LOAD( "717e08", 0x040000, 0x040000, CRC(b68a212e) SHA1(b2bd121a43552c3ade528ac763a0df40c3e648e0) ) /* zoom/rotate (L22) */
- ROM_LOAD( "717e11", 0x080000, 0x040000, CRC(ebb171ec) SHA1(d65d4a6b169ce03e4427b2a397484634f938236b) ) /* zoom/rotate (N20) */
- ROM_LOAD( "717e12", 0x0c0000, 0x040000, CRC(9269335d) SHA1(af298c8cff50d707d6abc806065f8e931f975dc0) ) /* zoom/rotate (N22) */
+ ROM_REGION( 0x100000, "gfx3", 0 ) /* graphics (addressable by the main CPU) */
+ ROM_LOAD( "717e07", 0x000000, 0x040000, CRC(b9a565a8) SHA1(a11782f7336e5ad58a4c6ea81f2eeac35d5e7d0a) ) /* zoom/rotate (L20) */
+ ROM_LOAD( "717e08", 0x040000, 0x040000, CRC(b68a212e) SHA1(b2bd121a43552c3ade528ac763a0df40c3e648e0) ) /* zoom/rotate (L22) */
+ ROM_LOAD( "717e11", 0x080000, 0x040000, CRC(ebb171ec) SHA1(d65d4a6b169ce03e4427b2a397484634f938236b) ) /* zoom/rotate (N20) */
+ ROM_LOAD( "717e12", 0x0c0000, 0x040000, CRC(9269335d) SHA1(af298c8cff50d707d6abc806065f8e931f975dc0) ) /* zoom/rotate (N22) */
- ROM_REGION( 0x080000, "k007232_1", 0 ) /* 007232 data (chip 1) */
- ROM_LOAD( "717e03", 0x000000, 0x080000, CRC(ebe73c22) SHA1(fad3334e5e91bf8d11b74ffdbbfd57567e6f6f8c) )
+ ROM_REGION( 0x080000, "k007232_1", 0 ) /* 007232 data (chip 1) */
+ ROM_LOAD( "717e03", 0x000000, 0x080000, CRC(ebe73c22) SHA1(fad3334e5e91bf8d11b74ffdbbfd57567e6f6f8c) )
- ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
- ROM_LOAD( "717e09", 0x000000, 0x080000, CRC(d74e857d) SHA1(00c851c857650d67fc4caccea4461d99be4acb3c) )
+ ROM_REGION( 0x080000, "k007232_2", 0 ) /* 007232 data (chip 2) */
+ ROM_LOAD( "717e09", 0x000000, 0x080000, CRC(d74e857d) SHA1(00c851c857650d67fc4caccea4461d99be4acb3c) )
ROM_END
diff --git a/src/mame/drivers/chsuper.c b/src/mame/drivers/chsuper.c
index 6e75ea0e22e..e599640cbe8 100644
--- a/src/mame/drivers/chsuper.c
+++ b/src/mame/drivers/chsuper.c
@@ -26,7 +26,7 @@ class chsuper_state : public driver_device
public:
chsuper_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu") { }
+ m_maincpu(*this, "maincpu") { }
DECLARE_WRITE8_MEMBER(chsuper_vram_w);
DECLARE_READ8_MEMBER(ff_r);
@@ -200,7 +200,7 @@ static RAMDAC_INTERFACE( ramdac_intf )
static MACHINE_CONFIG_START( chsuper, chsuper_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z180, XTAL_12MHz / 2) /* HD64180RP8, 8 MHz? */
+ MCFG_CPU_ADD("maincpu", Z180, XTAL_12MHz / 2) /* HD64180RP8, 8 MHz? */
MCFG_CPU_PROGRAM_MAP(chsuper_prg_map)
MCFG_CPU_IO_MAP(chsuper_portmap)
MCFG_CPU_VBLANK_INT_DRIVER("screen", chsuper_state, irq0_line_hold)
diff --git a/src/mame/drivers/cidelsa.c b/src/mame/drivers/cidelsa.c
index 4136db089fe..0ba82dfa9ea 100644
--- a/src/mame/drivers/cidelsa.c
+++ b/src/mame/drivers/cidelsa.c
@@ -34,14 +34,14 @@ WRITE8_MEMBER( draco_state::sound_bankswitch_w )
{
/*
- pin description
+ pin description
- D0 not connected
- D1 not connected
- D2 not connected
- D3 2716 A10
+ D0 not connected
+ D1 not connected
+ D2 not connected
+ D3 2716 A10
- */
+ */
int bank = BIT(data, 3);
@@ -52,14 +52,14 @@ WRITE8_MEMBER( draco_state::sound_g_w )
{
/*
- G1 G0 description
+ G1 G0 description
- 0 0 IAB inactive
- 0 1 DWS write to PSG
- 1 0 DTB read from PSG
- 1 1 INTAK latch address
+ 0 0 IAB inactive
+ 0 1 DWS write to PSG
+ 1 0 DTB read from PSG
+ 1 1 INTAK latch address
- */
+ */
switch (data)
{
@@ -97,17 +97,17 @@ WRITE8_MEMBER( draco_state::psg_w )
WRITE8_MEMBER( cidelsa_state::destryer_out1_w )
{
/*
- bit description
-
- 0
- 1
- 2
- 3
- 4
- 5
- 6
- 7
- */
+ bit description
+
+ 0
+ 1
+ 2
+ 3
+ 4
+ 5
+ 6
+ 7
+ */
}
/* CDP1852 Interfaces */
@@ -115,17 +115,17 @@ WRITE8_MEMBER( cidelsa_state::destryer_out1_w )
WRITE8_MEMBER( cidelsa_state::altair_out1_w )
{
/*
- bit description
-
- 0 S1 (CARTUCHO)
- 1 S2 (CARTUCHO)
- 2 S3 (CARTUCHO)
- 3 LG1
- 4 LG2
- 5 LGF
- 6 CONT. M2
- 7 CONT. M1
- */
+ bit description
+
+ 0 S1 (CARTUCHO)
+ 1 S2 (CARTUCHO)
+ 2 S3 (CARTUCHO)
+ 3 LG1
+ 4 LG2
+ 5 LGF
+ 6 CONT. M2
+ 7 CONT. M1
+ */
set_led_status(machine(), 0, data & 0x08); // 1P
set_led_status(machine(), 1, data & 0x10); // 2P
@@ -135,17 +135,17 @@ WRITE8_MEMBER( cidelsa_state::altair_out1_w )
WRITE8_MEMBER( draco_state::out1_w )
{
/*
- bit description
-
- 0 3K9 -> Green signal
- 1 820R -> Blue signal
- 2 510R -> Red signal
- 3 1K -> not connected
- 4 not connected
- 5 SONIDO A -> COP402 IN0
- 6 SONIDO B -> COP402 IN1
- 7 SONIDO C -> COP402 IN2
- */
+ bit description
+
+ 0 3K9 -> Green signal
+ 1 820R -> Blue signal
+ 2 510R -> Red signal
+ 3 1K -> not connected
+ 4 not connected
+ 5 SONIDO A -> COP402 IN0
+ 6 SONIDO B -> COP402 IN1
+ 7 SONIDO C -> COP402 IN2
+ */
m_sound = (data & 0xe0) >> 5;
}
@@ -493,10 +493,10 @@ static MACHINE_CONFIG_START( altair, cidelsa_state )
MCFG_NVRAM_ADD_0FILL("nvram")
/* input/output hardware */
- MCFG_CDP1852_ADD("ic23", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in0_intf) /* clock is really tied to CDP1869 CMSEL (pin 37) */
+ MCFG_CDP1852_ADD("ic23", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in0_intf) /* clock is really tied to CDP1869 CMSEL (pin 37) */
MCFG_CDP1852_ADD("ic24", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in1_intf)
MCFG_CDP1852_ADD("ic25", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in2_intf)
- MCFG_CDP1852_ADD("ic26", ALTAIR_CHR1 / 8, altair_cdp1852_out1_intf) /* clock is CDP1802 TPB */
+ MCFG_CDP1852_ADD("ic26", ALTAIR_CHR1 / 8, altair_cdp1852_out1_intf) /* clock is CDP1802 TPB */
/* sound and video hardware */
MCFG_FRAGMENT_ADD(altair_video)
@@ -516,10 +516,10 @@ static MACHINE_CONFIG_START( draco, draco_state )
MCFG_CPU_CONFIG(draco_cop_intf)
/* input/output hardware */
- MCFG_CDP1852_ADD("ic29", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in0_intf) /* clock is really tied to CDP1876 CMSEL (pin 32) */
+ MCFG_CDP1852_ADD("ic29", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in0_intf) /* clock is really tied to CDP1876 CMSEL (pin 32) */
MCFG_CDP1852_ADD("ic30", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in1_intf)
MCFG_CDP1852_ADD("ic31", CDP1852_CLOCK_HIGH, cidelsa_cdp1852_in2_intf)
- MCFG_CDP1852_ADD("ic32", DRACO_CHR1 / 8, draco_cdp1852_out1_intf) /* clock is CDP1802 TPB */
+ MCFG_CDP1852_ADD("ic32", DRACO_CHR1 / 8, draco_cdp1852_out1_intf) /* clock is CDP1802 TPB */
/* sound and video hardware */
MCFG_FRAGMENT_ADD(draco_video)
diff --git a/src/mame/drivers/cinemat.c b/src/mame/drivers/cinemat.c
index 2e3e08846fc..a8fc9bc382b 100644
--- a/src/mame/drivers/cinemat.c
+++ b/src/mame/drivers/cinemat.c
@@ -43,7 +43,7 @@
#include "sundance.lh"
#include "tailg.lh"
-#define MASTER_CLOCK XTAL_19_923MHz
+#define MASTER_CLOCK XTAL_19_923MHz
/*************************************
@@ -167,14 +167,14 @@ READ8_MEMBER(cinemat_state::speedfrk_wheel_r)
static const UINT8 speedfrk_steer[] = {0xe, 0x6, 0x2, 0x0, 0x3, 0x7, 0xf};
int delta_wheel;
- /* the shift register is cleared once per 'frame' */
- delta_wheel = (INT8)ioport("WHEEL")->read() / 8;
- if (delta_wheel > 3)
- delta_wheel = 3;
- else if (delta_wheel < -3)
- delta_wheel = -3;
+ /* the shift register is cleared once per 'frame' */
+ delta_wheel = (INT8)ioport("WHEEL")->read() / 8;
+ if (delta_wheel > 3)
+ delta_wheel = 3;
+ else if (delta_wheel < -3)
+ delta_wheel = -3;
- return (speedfrk_steer[delta_wheel + 3] >> offset) & 1;
+ return (speedfrk_steer[delta_wheel + 3] >> offset) & 1;
}
@@ -184,11 +184,11 @@ READ8_MEMBER(cinemat_state::speedfrk_gear_r)
/* check the fake gear input port and determine the bit settings for the gear */
if ((gearval & 0x0f) != 0x0f)
- m_gear = gearval & 0x0f;
+ m_gear = gearval & 0x0f;
/* add the start key into the mix -- note that it overlaps 4th gear */
if (!(ioport("INPUTS")->read() & 0x80))
- m_gear &= ~0x08;
+ m_gear &= ~0x08;
return (m_gear >> offset) & 1;
}
@@ -207,7 +207,7 @@ static const struct
UINT16 bitmask;
} sundance_port_map[16] =
{
- { "PAD1", 0x155 }, /* bit 0 is set if P1 1,3,5,7,9 is pressed */
+ { "PAD1", 0x155 }, /* bit 0 is set if P1 1,3,5,7,9 is pressed */
{ NULL, 0 },
{ NULL, 0 },
{ NULL, 0 },
@@ -217,15 +217,15 @@ static const struct
{ NULL, 0 },
{ NULL, 0 },
- { "PAD2", 0x1a1 }, /* bit 8 is set if P2 1,6,8,9 is pressed */
- { "PAD1", 0x1a1 }, /* bit 9 is set if P1 1,6,8,9 is pressed */
- { "PAD2", 0x155 }, /* bit 10 is set if P2 1,3,5,7,9 is pressed */
+ { "PAD2", 0x1a1 }, /* bit 8 is set if P2 1,6,8,9 is pressed */
+ { "PAD1", 0x1a1 }, /* bit 9 is set if P1 1,6,8,9 is pressed */
+ { "PAD2", 0x155 }, /* bit 10 is set if P2 1,3,5,7,9 is pressed */
{ NULL, 0 },
- { "PAD1", 0x093 }, /* bit 12 is set if P1 1,2,5,8 is pressed */
- { "PAD2", 0x093 }, /* bit 13 is set if P2 1,2,5,8 is pressed */
- { "PAD1", 0x048 }, /* bit 14 is set if P1 4,8 is pressed */
- { "PAD2", 0x048 }, /* bit 15 is set if P2 4,8 is pressed */
+ { "PAD1", 0x093 }, /* bit 12 is set if P1 1,2,5,8 is pressed */
+ { "PAD2", 0x093 }, /* bit 13 is set if P2 1,2,5,8 is pressed */
+ { "PAD1", 0x048 }, /* bit 14 is set if P1 4,8 is pressed */
+ { "PAD2", 0x048 }, /* bit 15 is set if P2 4,8 is pressed */
};
@@ -357,15 +357,15 @@ static INPUT_PORTS_START( spacewar )
PORT_DIPNAME( 0x03, 0x00, "Time" )
PORT_DIPSETTING( 0x03, "0:45/coin" )
PORT_DIPSETTING( 0x00, "1:00/coin" )
- PORT_DIPSETTING( 0x01, "1:30/coin" )
- PORT_DIPSETTING( 0x02, "2:00/coin" )
+ PORT_DIPSETTING( 0x01, "1:30/coin" )
+ PORT_DIPSETTING( 0x02, "2:00/coin" )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state,coin_inserted, 0)
INPUT_PORTS_END
@@ -375,10 +375,10 @@ static INPUT_PORTS_START( spaceshp )
PORT_MODIFY("SWITCHES")
PORT_DIPNAME( 0x03, 0x00, "Time" ) PORT_DIPLOCATION("SW1:!4,!3")
- PORT_DIPSETTING( 0x00, "1:00/coin" )
- PORT_DIPSETTING( 0x01, "1:30/coin" )
- PORT_DIPSETTING( 0x02, "2:00/coin" )
- PORT_DIPSETTING( 0x03, "2:30/coin" )
+ PORT_DIPSETTING( 0x00, "1:00/coin" )
+ PORT_DIPSETTING( 0x01, "1:30/coin" )
+ PORT_DIPSETTING( 0x02, "2:00/coin" )
+ PORT_DIPSETTING( 0x03, "2:30/coin" )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:!1" )
PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW1:!2" )
@@ -493,17 +493,17 @@ static INPUT_PORTS_START( starhawk )
PORT_START("SWITCHES")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Game_Time ) )
- PORT_DIPSETTING( 0x03, "2:00/4:00" )
- PORT_DIPSETTING( 0x01, "1:30/3:00" )
- PORT_DIPSETTING( 0x02, "1:00/2:00" )
- PORT_DIPSETTING( 0x00, "0:45/1:30" )
+ PORT_DIPSETTING( 0x03, "2:00/4:00" )
+ PORT_DIPSETTING( 0x01, "1:30/3:00" )
+ PORT_DIPSETTING( 0x02, "1:00/2:00" )
+ PORT_DIPSETTING( 0x00, "0:45/1:30" )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state,coin_inserted, 0)
INPUT_PORTS_END
@@ -529,13 +529,13 @@ static INPUT_PORTS_START( sundance )
PORT_START("SWITCHES")
PORT_DIPNAME( 0x03, 0x02, "Time" )
- PORT_DIPSETTING( 0x00, "0:45/coin" )
- PORT_DIPSETTING( 0x02, "1:00/coin" )
- PORT_DIPSETTING( 0x01, "1:30/coin" )
- PORT_DIPSETTING( 0x03, "2:00/coin" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Language ) )
- PORT_DIPSETTING( 0x04, DEF_STR( Japanese ) )
- PORT_DIPSETTING( 0x00, DEF_STR( English ) )
+ PORT_DIPSETTING( 0x00, "0:45/coin" )
+ PORT_DIPSETTING( 0x02, "1:00/coin" )
+ PORT_DIPSETTING( 0x01, "1:30/coin" )
+ PORT_DIPSETTING( 0x03, "2:00/coin" )
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Language ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Japanese ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( English ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) /* supposedly coinage, doesn't work */
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -584,17 +584,17 @@ static INPUT_PORTS_START( tailg )
PORT_START("SWITCHES")
PORT_DIPNAME( 0x23, 0x23, "Shield Points" )
- PORT_DIPSETTING( 0x00, "15" )
- PORT_DIPSETTING( 0x02, "20" )
- PORT_DIPSETTING( 0x01, "30" )
- PORT_DIPSETTING( 0x03, "40" )
- PORT_DIPSETTING( 0x20, "50" )
- PORT_DIPSETTING( 0x22, "60" )
- PORT_DIPSETTING( 0x21, "70" )
- PORT_DIPSETTING( 0x23, "80" )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x00, "15" )
+ PORT_DIPSETTING( 0x02, "20" )
+ PORT_DIPSETTING( 0x01, "30" )
+ PORT_DIPSETTING( 0x03, "40" )
+ PORT_DIPSETTING( 0x20, "50" )
+ PORT_DIPSETTING( 0x22, "60" )
+ PORT_DIPSETTING( 0x21, "70" )
+ PORT_DIPSETTING( 0x23, "80" )
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Coinage ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
@@ -705,22 +705,22 @@ static INPUT_PORTS_START( ripoff )
PORT_START("SWITCHES")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
- PORT_DIPSETTING( 0x01, "4" )
- PORT_DIPSETTING( 0x03, "8" )
- PORT_DIPSETTING( 0x00, "12" )
- PORT_DIPSETTING( 0x02, "16" )
+ PORT_DIPSETTING( 0x01, "4" )
+ PORT_DIPSETTING( 0x03, "8" )
+ PORT_DIPSETTING( 0x00, "12" )
+ PORT_DIPSETTING( 0x02, "16" )
PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Coinage ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x0c, DEF_STR( 4C_3C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 2C_3C ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x10, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, "Scores" )
- PORT_DIPSETTING( 0x00, "Individual" )
- PORT_DIPSETTING( 0x20, "Combined" )
- PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
+ PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x0c, DEF_STR( 4C_3C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 2C_3C ) )
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Demo_Sounds ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x00, "Scores" )
+ PORT_DIPSETTING( 0x00, "Individual" )
+ PORT_DIPSETTING( 0x20, "Combined" )
+ PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state,coin_inserted, 0)
INPUT_PORTS_END
@@ -774,22 +774,22 @@ static INPUT_PORTS_START( solarq )
PORT_START("SWITCHES")
PORT_DIPNAME( 0x05, 0x05, DEF_STR( Coinage ) )
- PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 4C_3C ) )
- PORT_DIPSETTING( 0x05, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 2C_3C ) )
- PORT_DIPNAME( 0x02, 0x02, DEF_STR( Bonus_Life ) )
- PORT_DIPSETTING( 0x02, "25 captures" )
- PORT_DIPSETTING( 0x00, "40 captures" )
+ PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 4C_3C ) )
+ PORT_DIPSETTING( 0x05, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 2C_3C ) )
+ PORT_DIPNAME( 0x02, 0x02, DEF_STR( Bonus_Life ) )
+ PORT_DIPSETTING( 0x02, "25 captures" )
+ PORT_DIPSETTING( 0x00, "40 captures" )
PORT_DIPNAME( 0x18, 0x10, DEF_STR( Lives ) )
- PORT_DIPSETTING( 0x18, "2" )
- PORT_DIPSETTING( 0x08, "3" )
- PORT_DIPSETTING( 0x10, "4" )
- PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Free_Play ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_SERVICE( 0x40, IP_ACTIVE_HIGH )
+ PORT_DIPSETTING( 0x18, "2" )
+ PORT_DIPSETTING( 0x08, "3" )
+ PORT_DIPSETTING( 0x10, "4" )
+ PORT_DIPSETTING( 0x00, "5" )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Free_Play ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_SERVICE( 0x40, IP_ACTIVE_HIGH )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state,coin_inserted, 0)
INPUT_PORTS_END
@@ -803,27 +803,27 @@ static INPUT_PORTS_START( boxingb )
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
PORT_BIT( 0x0fc0, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* dial */
+ PORT_BIT( 0xf000, IP_ACTIVE_HIGH, IPT_SPECIAL ) /* dial */
PORT_START("SWITCHES")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )
- PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 4C_3C ) )
- PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x02, DEF_STR( 2C_3C ) )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Lives ) )
- PORT_DIPSETTING( 0x04, "3" )
- PORT_DIPSETTING( 0x00, "5" )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) )
- PORT_DIPSETTING( 0x00, "30,000" )
- PORT_DIPSETTING( 0x08, "50,000" )
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
- PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Free_Play ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
+ PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 4C_3C ) )
+ PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( 2C_3C ) )
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Lives ) )
+ PORT_DIPSETTING( 0x04, "3" )
+ PORT_DIPSETTING( 0x00, "5" )
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Bonus_Life ) )
+ PORT_DIPSETTING( 0x00, "30,000" )
+ PORT_DIPSETTING( 0x08, "50,000" )
+ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Demo_Sounds ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Free_Play ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state,coin_inserted, 0)
PORT_START("DIAL")
@@ -922,38 +922,38 @@ static INPUT_PORTS_START( qb3 )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON4 ) // read at $1a5; if 0 add 8 to $25
+ PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON4 ) // read at $1a5; if 0 add 8 to $25
PORT_DIPNAME( 0x0200, 0x0200, "Debug" )
- PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) // read at $c7; jmp to $3AF1 if 0
+ PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) // read at $c7; jmp to $3AF1 if 0
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_RIGHT )
PORT_DIPNAME( 0x1000, 0x1000, "Infinite Lives" )
- PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT )
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL )
PORT_START("SWITCHES")
PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )
- PORT_DIPSETTING( 0x00, "2" )
- PORT_DIPSETTING( 0x02, "3" )
- PORT_DIPSETTING( 0x01, "4" )
- PORT_DIPSETTING( 0x03, "5" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Free_Play ) ) // read at $244, $2c1
- PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) // read at $27d
- PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) // read at $282
- PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
+ PORT_DIPSETTING( 0x00, "2" )
+ PORT_DIPSETTING( 0x02, "3" )
+ PORT_DIPSETTING( 0x01, "4" )
+ PORT_DIPSETTING( 0x03, "5" )
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Free_Play ) ) // read at $244, $2c1
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) // read at $27d
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) // read at $282
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, cinemat_state,coin_inserted, 0)
INPUT_PORTS_END
@@ -1353,9 +1353,9 @@ ROM_START( spaceftr )
ROM_LOAD16_BYTE( "fortrest7.7t", 0x0000, 0x0800, CRC(65d0a225) SHA1(e1fbee5ff42dd040ab2e90bbe2189fcb76d6167e) )
/* The original fortresp7.7p ROM image was a bad dump, a comparison showed only two bytes difference between it
- and starcast.p7 from starcas1. A disassembly proved that the two affected bytes resulted in bogus opcodes, which
- ultimately caused the game to fail. The current ROM taken from starcas1 can be assumed to be equal to a correct
- dump of fortresp7.7p. The BAD_DUMP flag is kept in just to be sure. */
+ and starcast.p7 from starcas1. A disassembly proved that the two affected bytes resulted in bogus opcodes, which
+ ultimately caused the game to fail. The current ROM taken from starcas1 can be assumed to be equal to a correct
+ dump of fortresp7.7p. The BAD_DUMP flag is kept in just to be sure. */
ROM_LOAD16_BYTE( "fortresp7.7p", 0x0001, 0x0800, BAD_DUMP CRC(d8f58d9a) SHA1(abba459431dcacc75099b0d340b957be71b89cfd) ) // taken from starcas1, read note above
ROM_LOAD16_BYTE( "fortresu7.7u", 0x1000, 0x0800, CRC(13b0287c) SHA1(366a23fd10684975bd5ee190e5227e47a0298ad5) )
diff --git a/src/mame/drivers/circus.c b/src/mame/drivers/circus.c
index 8cc9979822a..11b90260045 100644
--- a/src/mame/drivers/circus.c
+++ b/src/mame/drivers/circus.c
@@ -80,21 +80,21 @@ static INPUT_PORTS_START( circus )
PORT_START("DSW")
PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) ) PORT_DIPLOCATION("14A:6,7")
- PORT_DIPSETTING( 0x00, "3" )
- PORT_DIPSETTING( 0x01, "5" )
- PORT_DIPSETTING( 0x02, "7" )
- PORT_DIPSETTING( 0x03, "9" )
+ PORT_DIPSETTING( 0x00, "3" )
+ PORT_DIPSETTING( 0x01, "5" )
+ PORT_DIPSETTING( 0x02, "7" )
+ PORT_DIPSETTING( 0x03, "9" )
PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("14A:4,5")
// PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x0c, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x0c, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
PORT_DIPNAME( 0x10, 0x00, "High Score" ) PORT_DIPLOCATION("14A:3")
- PORT_DIPSETTING( 0x10, "Credit Awarded" )
- PORT_DIPSETTING( 0x00, "No Award" )
+ PORT_DIPSETTING( 0x10, "Credit Awarded" )
+ PORT_DIPSETTING( 0x00, "No Award" )
PORT_DIPNAME( 0x20, 0x00, "Bonus" ) PORT_DIPLOCATION("14A:2")
- PORT_DIPSETTING( 0x00, "Single Line" )
- PORT_DIPSETTING( 0x20, "Super Bonus" )
+ PORT_DIPSETTING( 0x00, "Single Line" )
+ PORT_DIPSETTING( 0x20, "Super Bonus" )
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x00, "14A:1" ) /* Not mentioned in the manual */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
@@ -118,18 +118,18 @@ static INPUT_PORTS_START( robotbwl )
PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x00, "14A:7" ) /* Manual says it's unused */
PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x00, "14A:6" ) /* Manual says it's unused */
PORT_DIPNAME( 0x04, 0x04, "Beer Frame" ) PORT_DIPLOCATION("14A:5")
- PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x04, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( On ) )
PORT_DIPNAME( 0x18, 0x08, DEF_STR( Coinage ) ) PORT_DIPLOCATION("14A:3,4")
- PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
// PORT_DIPSETTING( 0x18, DEF_STR( 1C_2C ) )
PORT_DIPNAME( 0x60, 0x00, "Bowl Timer" ) PORT_DIPLOCATION("14A:1,2")
- PORT_DIPSETTING( 0x00, "3 seconds" )
- PORT_DIPSETTING( 0x20, "5 seconds" )
- PORT_DIPSETTING( 0x40, "7 seconds" )
- PORT_DIPSETTING( 0x60, "9 seconds" )
+ PORT_DIPSETTING( 0x00, "3 seconds" )
+ PORT_DIPSETTING( 0x20, "5 seconds" )
+ PORT_DIPSETTING( 0x40, "7 seconds" )
+ PORT_DIPSETTING( 0x60, "9 seconds" )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_START("PADDLE")
@@ -150,18 +150,18 @@ static INPUT_PORTS_START( crash )
PORT_START("DSW")
PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) ) PORT_DIPLOCATION("14A:6,7")
- PORT_DIPSETTING( 0x00, "2" )
- PORT_DIPSETTING( 0x01, "3" )
- PORT_DIPSETTING( 0x02, "4" )
- PORT_DIPSETTING( 0x03, "5" )
+ PORT_DIPSETTING( 0x00, "2" )
+ PORT_DIPSETTING( 0x01, "3" )
+ PORT_DIPSETTING( 0x02, "4" )
+ PORT_DIPSETTING( 0x03, "5" )
PORT_DIPNAME( 0x0C, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("14A:4,5")
// PORT_DIPSETTING( 0x0c, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
PORT_DIPNAME( 0x10, 0x00, "High Score" ) PORT_DIPLOCATION("14A:3")
- PORT_DIPSETTING( 0x00, "No Award" )
- PORT_DIPSETTING( 0x10, "Credit Awarded" )
+ PORT_DIPSETTING( 0x00, "No Award" )
+ PORT_DIPSETTING( 0x10, "Credit Awarded" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "14A:2" ) /* Not mentioned in the manual */
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x00, "14A:1" ) /* Not mentioned in the manual */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
@@ -190,18 +190,18 @@ static INPUT_PORTS_START( ripcord )
PORT_START("DSW")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("14A:6,7")
- PORT_DIPSETTING( 0x00, "3" )
- PORT_DIPSETTING( 0x01, "5" )
- PORT_DIPSETTING( 0x02, "7" )
- PORT_DIPSETTING( 0x03, "9" )
+ PORT_DIPSETTING( 0x00, "3" )
+ PORT_DIPSETTING( 0x01, "5" )
+ PORT_DIPSETTING( 0x02, "7" )
+ PORT_DIPSETTING( 0x03, "9" )
PORT_DIPNAME( 0x0c, 0x04, DEF_STR( Coinage ) ) PORT_DIPLOCATION("14A:4,5")
// PORT_DIPSETTING( 0x0c, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
PORT_DIPNAME( 0x10, 0x00, "High Score" ) PORT_DIPLOCATION("14A:3")
- PORT_DIPSETTING( 0x10, "Award Credit" )
- PORT_DIPSETTING( 0x00, "No Award" )
+ PORT_DIPSETTING( 0x10, "Award Credit" )
+ PORT_DIPSETTING( 0x00, "No Award" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "14A:2" ) /* Not mentioned in the manual */
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x00, "14A:1" ) /* Not mentioned in the manual */
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
@@ -213,33 +213,33 @@ INPUT_PORTS_END
static const gfx_layout charlayout =
{
- 8,8, /* 8*8 characters */
- 256, /* 256 characters */
- 1, /* 1 bit per pixel */
+ 8,8, /* 8*8 characters */
+ 256, /* 256 characters */
+ 1, /* 1 bit per pixel */
{ 0 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout clownlayout =
{
- 16,16, /* 16*16 characters */
- 16, /* 16 characters */
- 1, /* 1 bit per pixel */
+ 16,16, /* 16*16 characters */
+ 16, /* 16 characters */
+ 1, /* 1 bit per pixel */
{ 0 },
{ 0, 1, 2, 3, 4, 5, 6, 7,
- 16*8, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 },
+ 16*8, 16*8+1, 16*8+2, 16*8+3, 16*8+4, 16*8+5, 16*8+6, 16*8+7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 16*16 /* every char takes 64 consecutive bytes */
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 16*16 /* every char takes 64 consecutive bytes */
};
static const gfx_layout robotlayout =
{
- 8,8, /* 16*16 characters */
- 1, /* 1 character */
- 1, /* 1 bit per pixel */
+ 8,8, /* 16*16 characters */
+ 1, /* 1 character */
+ 1, /* 1 bit per pixel */
{ 0 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
@@ -284,15 +284,15 @@ void circus_state::machine_reset()
static MACHINE_CONFIG_START( circus, circus_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */
+ MCFG_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */
MCFG_CPU_PROGRAM_MAP(circus_map)
/* video hardware */
- MCFG_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) /* needed for proper hardware collisions */
+ MCFG_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) /* needed for proper hardware collisions */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(57)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(3500) /* frames per second, vblank duration (complete guess) */)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(3500) /* frames per second, vblank duration (complete guess) */)
MCFG_SCREEN_SIZE(32*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(0*8, 31*8-1, 0*8, 32*8-1)
MCFG_SCREEN_UPDATE_DRIVER(circus_state, screen_update_circus)
@@ -394,10 +394,10 @@ static MACHINE_CONFIG_START( ripcord, circus_state )
/* video hardware */
- MCFG_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) /* needed for proper hardware collisions */
+ MCFG_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE) /* needed for proper hardware collisions */
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(57)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(3500) /* frames per second, vblank duration (complete guess) */)
+ MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(3500) /* frames per second, vblank duration (complete guess) */)
MCFG_SCREEN_SIZE(32*8, 32*8)
MCFG_SCREEN_VISIBLE_AREA(0*8, 31*8-1, 0*8, 32*8-1)
MCFG_SCREEN_UPDATE_DRIVER(circus_state, screen_update_ripcord)
@@ -422,46 +422,46 @@ MACHINE_CONFIG_END
ROM_START( circus )
ROM_REGION( 0x10000, "maincpu", 0 ) // code
- ROM_LOAD( "9004.1a", 0x1000, 0x0200, CRC(7654ea75) SHA1(fa29417618157002b8ecb21f4c15104c8145a742) )
- ROM_LOAD( "9005.2a", 0x1200, 0x0200, CRC(b8acdbc5) SHA1(634bb11089f7a57a316b6829954cc4da4523f267) )
- ROM_LOAD( "9006.3a", 0x1400, 0x0200, CRC(901dfff6) SHA1(c1f48845456e88d54981608afd00ddb92d97da99) )
- ROM_LOAD( "9007.5a", 0x1600, 0x0200, CRC(9dfdae38) SHA1(dc59a5f90a5a49fa071aada67eda768d3ecef010) )
- ROM_LOAD( "9008.6a", 0x1800, 0x0200, CRC(c8681cf6) SHA1(681cfea75bee8a86f9f4645e6c6b94b44762dae9) )
- ROM_LOAD( "9009.7a", 0x1a00, 0x0200, CRC(585f633e) SHA1(46133409f42e8cbc095dde576ce07d97b235972d) )
- ROM_LOAD( "9010.8a", 0x1c00, 0x0200, CRC(69cc409f) SHA1(b77289e62313e8535ce40686df7238aa9c0035bc) )
- ROM_LOAD( "9011.9a", 0x1e00, 0x0200, CRC(aff835eb) SHA1(d6d95510d4a046f48358fef01103bcc760eb71ed) )
- ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
+ ROM_LOAD( "9004.1a", 0x1000, 0x0200, CRC(7654ea75) SHA1(fa29417618157002b8ecb21f4c15104c8145a742) )
+ ROM_LOAD( "9005.2a", 0x1200, 0x0200, CRC(b8acdbc5) SHA1(634bb11089f7a57a316b6829954cc4da4523f267) )
+ ROM_LOAD( "9006.3a", 0x1400, 0x0200, CRC(901dfff6) SHA1(c1f48845456e88d54981608afd00ddb92d97da99) )
+ ROM_LOAD( "9007.5a", 0x1600, 0x0200, CRC(9dfdae38) SHA1(dc59a5f90a5a49fa071aada67eda768d3ecef010) )
+ ROM_LOAD( "9008.6a", 0x1800, 0x0200, CRC(c8681cf6) SHA1(681cfea75bee8a86f9f4645e6c6b94b44762dae9) )
+ ROM_LOAD( "9009.7a", 0x1a00, 0x0200, CRC(585f633e) SHA1(46133409f42e8cbc095dde576ce07d97b235972d) )
+ ROM_LOAD( "9010.8a", 0x1c00, 0x0200, CRC(69cc409f) SHA1(b77289e62313e8535ce40686df7238aa9c0035bc) )
+ ROM_LOAD( "9011.9a", 0x1e00, 0x0200, CRC(aff835eb) SHA1(d6d95510d4a046f48358fef01103bcc760eb71ed) )
+ ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
ROM_REGION( 0x0800, "gfx1", 0 ) // character set
- ROM_LOAD( "9003.4c", 0x0000, 0x0200, CRC(6efc315a) SHA1(d5a4a64a901853fff56df3c65512afea8336aad2) )
- ROM_LOAD( "9002.3c", 0x0200, 0x0200, CRC(30d72ef5) SHA1(45fc8285e213bf3906a26205a8c0b22f311fd6c3) )
- ROM_LOAD( "9001.2c", 0x0400, 0x0200, CRC(361da7ee) SHA1(6e6fe5b37ccb4c11aa4abbd9b7df772953abfe7e) )
- ROM_LOAD( "9000.1c", 0x0600, 0x0200, CRC(1f954bb3) SHA1(62a958b48078caa639b96f62a690583a1c8e83f5) )
+ ROM_LOAD( "9003.4c", 0x0000, 0x0200, CRC(6efc315a) SHA1(d5a4a64a901853fff56df3c65512afea8336aad2) )
+ ROM_LOAD( "9002.3c", 0x0200, 0x0200, CRC(30d72ef5) SHA1(45fc8285e213bf3906a26205a8c0b22f311fd6c3) )
+ ROM_LOAD( "9001.2c", 0x0400, 0x0200, CRC(361da7ee) SHA1(6e6fe5b37ccb4c11aa4abbd9b7df772953abfe7e) )
+ ROM_LOAD( "9000.1c", 0x0600, 0x0200, CRC(1f954bb3) SHA1(62a958b48078caa639b96f62a690583a1c8e83f5) )
ROM_REGION( 0x0200, "gfx2", 0 ) // clown sprite
- ROM_LOAD( "9012.14d", 0x0000, 0x0200, CRC(2fde3930) SHA1(a21e2d342f16a39a07edf4bea8d698a52216ecba) )
+ ROM_LOAD( "9012.14d", 0x0000, 0x0200, CRC(2fde3930) SHA1(a21e2d342f16a39a07edf4bea8d698a52216ecba) )
ROM_END
ROM_START( springbd )
ROM_REGION( 0x10000, "maincpu", 0 ) // code
- ROM_LOAD( "93448.1a", 0x1000, 0x0200, CRC(44d65ccd) SHA1(0eb2515444486a4656a4accec555501e75b39a74) )
- ROM_LOAD( "93448.2a", 0x1200, 0x0200, CRC(b8acdbc5) SHA1(634bb11089f7a57a316b6829954cc4da4523f267) )
- ROM_LOAD( "93448.3a", 0x1400, 0x0200, CRC(f2e25f7a) SHA1(6441e39fc7f710442dd6a3a047826862b0481c58) )
- ROM_LOAD( "93448.5a", 0x1600, 0x0200, CRC(9dfdae38) SHA1(dc59a5f90a5a49fa071aada67eda768d3ecef010) )
- ROM_LOAD( "93448.6a", 0x1800, 0x0200, CRC(c8681cf6) SHA1(681cfea75bee8a86f9f4645e6c6b94b44762dae9) )
- ROM_LOAD( "93448.7a", 0x1a00, 0x0200, CRC(585f633e) SHA1(46133409f42e8cbc095dde576ce07d97b235972d) )
- ROM_LOAD( "93448.8a", 0x1c00, 0x0200, CRC(d7c0dc05) SHA1(cc6f7d16ca4be74370c305c34aa1a2e338d2c41f) )
- ROM_LOAD( "93448.9a", 0x1e00, 0x0200, CRC(aff835eb) SHA1(d6d95510d4a046f48358fef01103bcc760eb71ed) )
- ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
+ ROM_LOAD( "93448.1a", 0x1000, 0x0200, CRC(44d65ccd) SHA1(0eb2515444486a4656a4accec555501e75b39a74) )
+ ROM_LOAD( "93448.2a", 0x1200, 0x0200, CRC(b8acdbc5) SHA1(634bb11089f7a57a316b6829954cc4da4523f267) )
+ ROM_LOAD( "93448.3a", 0x1400, 0x0200, CRC(f2e25f7a) SHA1(6441e39fc7f710442dd6a3a047826862b0481c58) )
+ ROM_LOAD( "93448.5a", 0x1600, 0x0200, CRC(9dfdae38) SHA1(dc59a5f90a5a49fa071aada67eda768d3ecef010) )
+ ROM_LOAD( "93448.6a", 0x1800, 0x0200, CRC(c8681cf6) SHA1(681cfea75bee8a86f9f4645e6c6b94b44762dae9) )
+ ROM_LOAD( "93448.7a", 0x1a00, 0x0200, CRC(585f633e) SHA1(46133409f42e8cbc095dde576ce07d97b235972d) )
+ ROM_LOAD( "93448.8a", 0x1c00, 0x0200, CRC(d7c0dc05) SHA1(cc6f7d16ca4be74370c305c34aa1a2e338d2c41f) )
+ ROM_LOAD( "93448.9a", 0x1e00, 0x0200, CRC(aff835eb) SHA1(d6d95510d4a046f48358fef01103bcc760eb71ed) )
+ ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
ROM_REGION( 0x0800, "gfx1", 0 ) // character set
- ROM_LOAD( "93448.4c", 0x0000, 0x0200, CRC(6efc315a) SHA1(d5a4a64a901853fff56df3c65512afea8336aad2) )
- ROM_LOAD( "93448.3c", 0x0200, 0x0200, CRC(30d72ef5) SHA1(45fc8285e213bf3906a26205a8c0b22f311fd6c3) )
- ROM_LOAD( "93448.2c", 0x0400, 0x0200, CRC(361da7ee) SHA1(6e6fe5b37ccb4c11aa4abbd9b7df772953abfe7e) )
- ROM_LOAD( "93448.1c", 0x0600, 0x0200, CRC(1f954bb3) SHA1(62a958b48078caa639b96f62a690583a1c8e83f5) )
+ ROM_LOAD( "93448.4c", 0x0000, 0x0200, CRC(6efc315a) SHA1(d5a4a64a901853fff56df3c65512afea8336aad2) )
+ ROM_LOAD( "93448.3c", 0x0200, 0x0200, CRC(30d72ef5) SHA1(45fc8285e213bf3906a26205a8c0b22f311fd6c3) )
+ ROM_LOAD( "93448.2c", 0x0400, 0x0200, CRC(361da7ee) SHA1(6e6fe5b37ccb4c11aa4abbd9b7df772953abfe7e) )
+ ROM_LOAD( "93448.1c", 0x0600, 0x0200, CRC(1f954bb3) SHA1(62a958b48078caa639b96f62a690583a1c8e83f5) )
ROM_REGION( 0x0200, "gfx2", 0 ) // clown sprite
- ROM_LOAD( "93448.14d", 0x0000, 0x0200, CRC(2fde3930) SHA1(a21e2d342f16a39a07edf4bea8d698a52216ecba) )
+ ROM_LOAD( "93448.14d", 0x0000, 0x0200, CRC(2fde3930) SHA1(a21e2d342f16a39a07edf4bea8d698a52216ecba) )
ROM_END
ROM_START( robotbwl )
@@ -487,68 +487,68 @@ ROM_END
ROM_START( crash )
ROM_REGION( 0x10000, "maincpu", 0 ) // code
- ROM_LOAD( "crash.a1", 0x1000, 0x0200, CRC(b9571203) SHA1(1299e476598d07a67aa1640f3320de1198280296) )
- ROM_LOAD( "crash.a2", 0x1200, 0x0200, CRC(b4581a95) SHA1(b3662bda5013443a56eabbe21fefa91e255e18e7) )
- ROM_LOAD( "crash.a3", 0x1400, 0x0200, CRC(597555ae) SHA1(39a6d10e229be0e0d52b1061f2aa2f678b351f0b) )
- ROM_LOAD( "crash.a4", 0x1600, 0x0200, CRC(0a15d69f) SHA1(c3a7b5ce4406cce511108e5c015b1dd5587b75ed) )
- ROM_LOAD( "crash.a5", 0x1800, 0x0200, CRC(a9c7a328) SHA1(2f21ee58ba117bf4fe9101373c55449217a08da6) )
- ROM_LOAD( "crash.a6", 0x1a00, 0x0200, CRC(c7d62d27) SHA1(974800cbeba2f2d0d796200d235371e2ce3a1d28) )
- ROM_LOAD( "crash.a7", 0x1c00, 0x0200, CRC(5e5af244) SHA1(9ea27241a5ac97b260599d56f60bf9ec3ffcac7f) )
- ROM_LOAD( "crash.a8", 0x1e00, 0x0200, CRC(3dc50839) SHA1(5782ea7d70e5cbe8b8245ed1075ce92b57cc6ddf) )
- ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
+ ROM_LOAD( "crash.a1", 0x1000, 0x0200, CRC(b9571203) SHA1(1299e476598d07a67aa1640f3320de1198280296) )
+ ROM_LOAD( "crash.a2", 0x1200, 0x0200, CRC(b4581a95) SHA1(b3662bda5013443a56eabbe21fefa91e255e18e7) )
+ ROM_LOAD( "crash.a3", 0x1400, 0x0200, CRC(597555ae) SHA1(39a6d10e229be0e0d52b1061f2aa2f678b351f0b) )
+ ROM_LOAD( "crash.a4", 0x1600, 0x0200, CRC(0a15d69f) SHA1(c3a7b5ce4406cce511108e5c015b1dd5587b75ed) )
+ ROM_LOAD( "crash.a5", 0x1800, 0x0200, CRC(a9c7a328) SHA1(2f21ee58ba117bf4fe9101373c55449217a08da6) )
+ ROM_LOAD( "crash.a6", 0x1a00, 0x0200, CRC(c7d62d27) SHA1(974800cbeba2f2d0d796200d235371e2ce3a1d28) )
+ ROM_LOAD( "crash.a7", 0x1c00, 0x0200, CRC(5e5af244) SHA1(9ea27241a5ac97b260599d56f60bf9ec3ffcac7f) )
+ ROM_LOAD( "crash.a8", 0x1e00, 0x0200, CRC(3dc50839) SHA1(5782ea7d70e5cbe8b8245ed1075ce92b57cc6ddf) )
+ ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
ROM_REGION( 0x0800, "gfx1", 0 ) // character set
- ROM_LOAD( "crash.c4", 0x0000, 0x0200, CRC(ba16f9e8) SHA1(fdbf8d36993196552ddb7729750420f8e31eee70) )
- ROM_LOAD( "crash.c3", 0x0200, 0x0200, CRC(3c8f7560) SHA1(ce4023167a0b4b912bbbc70b00fd3b462990a04c) )
- ROM_LOAD( "crash.c2", 0x0400, 0x0200, CRC(38f3e4ed) SHA1(4e537402c09b58997bc45498fd721d83a0eac3a7) )
- ROM_LOAD( "crash.c1", 0x0600, 0x0200, CRC(e9adf1e1) SHA1(c1f6d2a3be1e9b35c8675d1e3f57e6a85ddd99fd) )
+ ROM_LOAD( "crash.c4", 0x0000, 0x0200, CRC(ba16f9e8) SHA1(fdbf8d36993196552ddb7729750420f8e31eee70) )
+ ROM_LOAD( "crash.c3", 0x0200, 0x0200, CRC(3c8f7560) SHA1(ce4023167a0b4b912bbbc70b00fd3b462990a04c) )
+ ROM_LOAD( "crash.c2", 0x0400, 0x0200, CRC(38f3e4ed) SHA1(4e537402c09b58997bc45498fd721d83a0eac3a7) )
+ ROM_LOAD( "crash.c1", 0x0600, 0x0200, CRC(e9adf1e1) SHA1(c1f6d2a3be1e9b35c8675d1e3f57e6a85ddd99fd) )
ROM_REGION( 0x0200, "gfx2", 0 ) // car sprite
- ROM_LOAD( "crash.d14", 0x0000, 0x0200, CRC(833f81e4) SHA1(78a0ace3510546691ecaf6f6275cb3269495edc9) )
+ ROM_LOAD( "crash.d14", 0x0000, 0x0200, CRC(833f81e4) SHA1(78a0ace3510546691ecaf6f6275cb3269495edc9) )
ROM_END
ROM_START( smash )
ROM_REGION( 0x10000, "maincpu", 0 ) // code
- ROM_LOAD( "smash.a1", 0x1000, 0x0200, CRC(b9571203) SHA1(1299e476598d07a67aa1640f3320de1198280296) )
- ROM_LOAD( "smash.a2", 0x1200, 0x0200, CRC(b4581a95) SHA1(b3662bda5013443a56eabbe21fefa91e255e18e7) )
- ROM_LOAD( "smash.a3", 0x1400, 0x0200, CRC(597555ae) SHA1(39a6d10e229be0e0d52b1061f2aa2f678b351f0b) )
- ROM_LOAD( "smash.a4", 0x1600, 0x0200, CRC(0a15d69f) SHA1(c3a7b5ce4406cce511108e5c015b1dd5587b75ed) )
- ROM_LOAD( "smash.a5", 0x1800, 0x0200, CRC(a9c7a328) SHA1(2f21ee58ba117bf4fe9101373c55449217a08da6) )
- ROM_LOAD( "smash.a6", 0x1a00, 0x0200, CRC(c7d62d27) SHA1(974800cbeba2f2d0d796200d235371e2ce3a1d28) )
- ROM_LOAD( "smash.a7", 0x1c00, 0x0200, CRC(5e5af244) SHA1(9ea27241a5ac97b260599d56f60bf9ec3ffcac7f) )
- ROM_LOAD( "smash.a8", 0x1e00, 0x0200, CRC(3dc50839) SHA1(5782ea7d70e5cbe8b8245ed1075ce92b57cc6ddf) )
- ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
+ ROM_LOAD( "smash.a1", 0x1000, 0x0200, CRC(b9571203) SHA1(1299e476598d07a67aa1640f3320de1198280296) )
+ ROM_LOAD( "smash.a2", 0x1200, 0x0200, CRC(b4581a95) SHA1(b3662bda5013443a56eabbe21fefa91e255e18e7) )
+ ROM_LOAD( "smash.a3", 0x1400, 0x0200, CRC(597555ae) SHA1(39a6d10e229be0e0d52b1061f2aa2f678b351f0b) )
+ ROM_LOAD( "smash.a4", 0x1600, 0x0200, CRC(0a15d69f) SHA1(c3a7b5ce4406cce511108e5c015b1dd5587b75ed) )
+ ROM_LOAD( "smash.a5", 0x1800, 0x0200, CRC(a9c7a328) SHA1(2f21ee58ba117bf4fe9101373c55449217a08da6) )
+ ROM_LOAD( "smash.a6", 0x1a00, 0x0200, CRC(c7d62d27) SHA1(974800cbeba2f2d0d796200d235371e2ce3a1d28) )
+ ROM_LOAD( "smash.a7", 0x1c00, 0x0200, CRC(5e5af244) SHA1(9ea27241a5ac97b260599d56f60bf9ec3ffcac7f) )
+ ROM_LOAD( "smash.a8", 0x1e00, 0x0200, CRC(3dc50839) SHA1(5782ea7d70e5cbe8b8245ed1075ce92b57cc6ddf) )
+ ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
ROM_REGION( 0x0800, "gfx1", 0 ) // character set
- ROM_LOAD( "smash.c4", 0x0000, 0x0200, CRC(442500e5) SHA1(c54ebd5ccee096d8eed4153f623adc4e655b3909) )
- ROM_LOAD( "smash.c3", 0x0200, 0x0200, CRC(3c8f7560) SHA1(ce4023167a0b4b912bbbc70b00fd3b462990a04c) )
- ROM_LOAD( "smash.c2", 0x0400, 0x0200, CRC(38f3e4ed) SHA1(4e537402c09b58997bc45498fd721d83a0eac3a7) )
- ROM_LOAD( "smash.c1", 0x0600, 0x0200, CRC(e9adf1e1) SHA1(c1f6d2a3be1e9b35c8675d1e3f57e6a85ddd99fd) )
+ ROM_LOAD( "smash.c4", 0x0000, 0x0200, CRC(442500e5) SHA1(c54ebd5ccee096d8eed4153f623adc4e655b3909) )
+ ROM_LOAD( "smash.c3", 0x0200, 0x0200, CRC(3c8f7560) SHA1(ce4023167a0b4b912bbbc70b00fd3b462990a04c) )
+ ROM_LOAD( "smash.c2", 0x0400, 0x0200, CRC(38f3e4ed) SHA1(4e537402c09b58997bc45498fd721d83a0eac3a7) )
+ ROM_LOAD( "smash.c1", 0x0600, 0x0200, CRC(e9adf1e1) SHA1(c1f6d2a3be1e9b35c8675d1e3f57e6a85ddd99fd) )
ROM_REGION( 0x0200, "gfx2", 0 ) // car sprite
- ROM_LOAD( "smash.d14", 0x0000, 0x0200, CRC(833f81e4) SHA1(78a0ace3510546691ecaf6f6275cb3269495edc9) )
+ ROM_LOAD( "smash.d14", 0x0000, 0x0200, CRC(833f81e4) SHA1(78a0ace3510546691ecaf6f6275cb3269495edc9) )
ROM_END
ROM_START( ripcord )
ROM_REGION( 0x10000, "maincpu", 0 ) // code
- ROM_LOAD( "9027.1a", 0x1000, 0x0200, CRC(56b8dc06) SHA1(5432e4f2e321805a8dc9cfce20b8372793a9a4dd) )
- ROM_LOAD( "9028.2a", 0x1200, 0x0200, CRC(a8a78a30) SHA1(e6ddcba608f9b34e07a5402872793dafe5054156) )
- ROM_LOAD( "9029.4a", 0x1400, 0x0200, CRC(fc5c8e07) SHA1(4784a868491393f42520f6609266ffab21661ec3) )
- ROM_LOAD( "9030.5a", 0x1600, 0x0200, CRC(b496263c) SHA1(36321aa6d18e7c35461c1d445d2682d61279a8c7) )
- ROM_LOAD( "9031.6a", 0x1800, 0x0200, CRC(cdc7d46e) SHA1(369bb119320cd737641a5bf64d51c9b552578f8a) )
- ROM_LOAD( "9032.7a", 0x1a00, 0x0200, CRC(a6588bec) SHA1(76321ab29329b6291e4d4731bb445a6ac4ce2d86) )
- ROM_LOAD( "9033.8a", 0x1c00, 0x0200, CRC(fd49b806) SHA1(5205ee8e9cec53be6e79e0183bc1e9d96c8c2e55) )
- ROM_LOAD( "9034.9a", 0x1e00, 0x0200, CRC(7caf926d) SHA1(f51d010ce1909e21e04313e4262c70ab948c14e0) )
- ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
+ ROM_LOAD( "9027.1a", 0x1000, 0x0200, CRC(56b8dc06) SHA1(5432e4f2e321805a8dc9cfce20b8372793a9a4dd) )
+ ROM_LOAD( "9028.2a", 0x1200, 0x0200, CRC(a8a78a30) SHA1(e6ddcba608f9b34e07a5402872793dafe5054156) )
+ ROM_LOAD( "9029.4a", 0x1400, 0x0200, CRC(fc5c8e07) SHA1(4784a868491393f42520f6609266ffab21661ec3) )
+ ROM_LOAD( "9030.5a", 0x1600, 0x0200, CRC(b496263c) SHA1(36321aa6d18e7c35461c1d445d2682d61279a8c7) )
+ ROM_LOAD( "9031.6a", 0x1800, 0x0200, CRC(cdc7d46e) SHA1(369bb119320cd737641a5bf64d51c9b552578f8a) )
+ ROM_LOAD( "9032.7a", 0x1a00, 0x0200, CRC(a6588bec) SHA1(76321ab29329b6291e4d4731bb445a6ac4ce2d86) )
+ ROM_LOAD( "9033.8a", 0x1c00, 0x0200, CRC(fd49b806) SHA1(5205ee8e9cec53be6e79e0183bc1e9d96c8c2e55) )
+ ROM_LOAD( "9034.9a", 0x1e00, 0x0200, CRC(7caf926d) SHA1(f51d010ce1909e21e04313e4262c70ab948c14e0) )
+ ROM_RELOAD( 0xfe00, 0x0200 ) /* for the reset and interrupt vectors */
ROM_REGION( 0x0800, "gfx1", 0 ) // character set
- ROM_LOAD( "9026.5c", 0x0000, 0x0200, CRC(06e7adbb) SHA1(0c119743eacc30d6d9eb50dfee0746b69bb17377) )
- ROM_LOAD( "9025.4c", 0x0200, 0x0200, CRC(3129527e) SHA1(3d0519811c9e4a5645f5c54ed8f0b411cdc5d54b) )
- ROM_LOAD( "9024.2c", 0x0400, 0x0200, CRC(bcb88396) SHA1(d92dff2436f58d977f9196a88fa7701c3032ef7d) )
- ROM_LOAD( "9023.1c", 0x0600, 0x0200, CRC(9f86ed5b) SHA1(fbe38c6d63887e603d919b0ab2216cd44b8955e4) )
+ ROM_LOAD( "9026.5c", 0x0000, 0x0200, CRC(06e7adbb) SHA1(0c119743eacc30d6d9eb50dfee0746b69bb17377) )
+ ROM_LOAD( "9025.4c", 0x0200, 0x0200, CRC(3129527e) SHA1(3d0519811c9e4a5645f5c54ed8f0b411cdc5d54b) )
+ ROM_LOAD( "9024.2c", 0x0400, 0x0200, CRC(bcb88396) SHA1(d92dff2436f58d977f9196a88fa7701c3032ef7d) )
+ ROM_LOAD( "9023.1c", 0x0600, 0x0200, CRC(9f86ed5b) SHA1(fbe38c6d63887e603d919b0ab2216cd44b8955e4) )
ROM_REGION( 0x0200, "gfx2", 0 ) // skydiver sprite
- ROM_LOAD( "9035.14d", 0x0000, 0x0200, CRC(c9979802) SHA1(cf6dfad0821fa736c8fcf8735792054858232806) )
+ ROM_LOAD( "9035.14d", 0x0000, 0x0200, CRC(c9979802) SHA1(cf6dfad0821fa736c8fcf8735792054858232806) )
ROM_END
diff --git a/src/mame/drivers/circusc.c b/src/mame/drivers/circusc.c
index 5c7ae47e22a..604fbb7ea52 100644
--- a/src/mame/drivers/circusc.c
+++ b/src/mame/drivers/circusc.c
@@ -73,15 +73,15 @@ void circusc_state::machine_reset()
READ8_MEMBER(circusc_state::circusc_sh_timer_r)
{
/* This port reads the output of a counter clocked from the CPU clock.
- * The CPU XTAL is 14.31818MHz divided by 4. It then goes through 10
- * /2 stages to clock a 4 bit counter. The output of the counter goes
- * to D1-D4.
- *
- * The following:
- * clock = m_audiocpu->total_cycles() >> 10;
- * return (clock & 0x0f) << 1;
- * Can be shortened to:
- */
+ * The CPU XTAL is 14.31818MHz divided by 4. It then goes through 10
+ * /2 stages to clock a 4 bit counter. The output of the counter goes
+ * to D1-D4.
+ *
+ * The following:
+ * clock = m_audiocpu->total_cycles() >> 10;
+ * return (clock & 0x0f) << 1;
+ * Can be shortened to:
+ */
int clock;
@@ -141,14 +141,14 @@ WRITE8_MEMBER(circusc_state::irq_mask_w)
}
static ADDRESS_MAP_START( circusc_map, AS_PROGRAM, 8, circusc_state )
- AM_RANGE(0x0000, 0x0000) AM_MIRROR(0x03f8) AM_WRITE(circusc_flipscreen_w) /* FLIP */
- AM_RANGE(0x0001, 0x0001) AM_MIRROR(0x03f8) AM_WRITE(irq_mask_w) /* INTST */
+ AM_RANGE(0x0000, 0x0000) AM_MIRROR(0x03f8) AM_WRITE(circusc_flipscreen_w) /* FLIP */
+ AM_RANGE(0x0001, 0x0001) AM_MIRROR(0x03f8) AM_WRITE(irq_mask_w) /* INTST */
// AM_RANGE(0x0002, 0x0002) AM_MIRROR(0x03f8) AM_WRITENOP /* MUT - not used /*
- AM_RANGE(0x0003, 0x0004) AM_MIRROR(0x03f8) AM_WRITE(circusc_coin_counter_w) /* COIN1, COIN2 */
+ AM_RANGE(0x0003, 0x0004) AM_MIRROR(0x03f8) AM_WRITE(circusc_coin_counter_w) /* COIN1, COIN2 */
AM_RANGE(0x0005, 0x0005) AM_MIRROR(0x03f8) AM_WRITEONLY AM_SHARE("spritebank") /* OBJ CHENG */
- AM_RANGE(0x0400, 0x0400) AM_MIRROR(0x03ff) AM_WRITE(watchdog_reset_w) /* WDOG */
- AM_RANGE(0x0800, 0x0800) AM_MIRROR(0x03ff) AM_WRITE(soundlatch_byte_w) /* SOUND DATA */
- AM_RANGE(0x0c00, 0x0c00) AM_MIRROR(0x03ff) AM_WRITE(circusc_sh_irqtrigger_w) /* SOUND-ON causes interrupt on audio CPU */
+ AM_RANGE(0x0400, 0x0400) AM_MIRROR(0x03ff) AM_WRITE(watchdog_reset_w) /* WDOG */
+ AM_RANGE(0x0800, 0x0800) AM_MIRROR(0x03ff) AM_WRITE(soundlatch_byte_w) /* SOUND DATA */
+ AM_RANGE(0x0c00, 0x0c00) AM_MIRROR(0x03ff) AM_WRITE(circusc_sh_irqtrigger_w) /* SOUND-ON causes interrupt on audio CPU */
AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x03fc) AM_READ_PORT("SYSTEM")
AM_RANGE(0x1001, 0x1001) AM_MIRROR(0x03fc) AM_READ_PORT("P1")
AM_RANGE(0x1002, 0x1002) AM_MIRROR(0x03fc) AM_READ_PORT("P2")
@@ -168,9 +168,9 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 8, circusc_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x1c00) AM_RAM
- AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x1fff) AM_READ(soundlatch_byte_r) /* CS0 */
- AM_RANGE(0x8000, 0x8000) AM_MIRROR(0x1fff) AM_READ(circusc_sh_timer_r) /* CS1 */
- AM_RANGE(0xa000, 0xa07f) AM_MIRROR(0x1f80) AM_WRITE(circusc_sound_w) /* CS2 - CS6 */
+ AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x1fff) AM_READ(soundlatch_byte_r) /* CS0 */
+ AM_RANGE(0x8000, 0x8000) AM_MIRROR(0x1fff) AM_READ(circusc_sh_timer_r) /* CS1 */
+ AM_RANGE(0xa000, 0xa07f) AM_MIRROR(0x1f80) AM_WRITE(circusc_sound_w) /* CS2 - CS6 */
ADDRESS_MAP_END
@@ -182,32 +182,32 @@ static INPUT_PORTS_START( circusc )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* SW7 of 8 on unpopulated DIPSW 3 */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* SW7 of 8 on unpopulated DIPSW 3 */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("P1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* 1P UP - unused */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) /* 1P DOWN - unused */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* 1P UP - unused */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) /* 1P DOWN - unused */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) /* 1P SHOOT2 - unused */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) /* 1P SHOOT2 - unused */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("P2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
- PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* 2P UP - unused */
- PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) /* 2P DOWN - unused */
+ PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* 2P UP - unused */
+ PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) /* 2P DOWN - unused */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
- PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) /* 2P SHOOT2 - unused */
+ PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED ) /* 2P SHOOT2 - unused */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW1")
- PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
+ PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3,4")
PORT_DIPSETTING( 0x02, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x05, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x08, DEF_STR( 2C_1C ) )
@@ -224,7 +224,7 @@ static INPUT_PORTS_START( circusc )
PORT_DIPSETTING( 0x0a, DEF_STR( 1C_6C ) )
PORT_DIPSETTING( 0x09, DEF_STR( 1C_7C ) )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
- PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
+ PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7,8")
PORT_DIPSETTING( 0x20, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x50, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
@@ -243,24 +243,24 @@ static INPUT_PORTS_START( circusc )
PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "7" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, "20k 90k 70k+" )
PORT_DIPSETTING( 0x00, "30k 110k 80k+" )
PORT_DIPUNUSED_DIPLOC( 0x10, 0x00, "SW2:5" )
- PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
+ PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x20, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
INPUT_PORTS_END
@@ -310,14 +310,14 @@ GFXDECODE_END
static const sn76496_config psg_intf =
{
- DEVCB_NULL
+ DEVCB_NULL
};
static const discrete_mixer_desc circusc_mixer_desc =
{DISC_MIXER_IS_RESISTOR,
{RES_K(2.2), RES_K(2.2), RES_K(10)},
- {0,0,0}, // no variable resistors
+ {0,0,0}, // no variable resistors
{0,0,0}, // no node capacitors
0, RES_K(1),
CAP_U(0.1),
diff --git a/src/mame/drivers/cischeat.c b/src/mame/drivers/cischeat.c
index e2f07891b07..c68325611ff 100644
--- a/src/mame/drivers/cischeat.c
+++ b/src/mame/drivers/cischeat.c
@@ -212,21 +212,21 @@ WRITE16_MEMBER(cischeat_state::bigrun_paletteram16_w)
}
static ADDRESS_MAP_START( bigrun_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x080000, 0x083fff) AM_READWRITE(bigrun_vregs_r, bigrun_vregs_w) AM_SHARE("vregs") // Vregs
- AM_RANGE(0x084000, 0x087fff) AM_RAM // Linking with other units
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x080000, 0x083fff) AM_READWRITE(bigrun_vregs_r, bigrun_vregs_w) AM_SHARE("vregs") // Vregs
+ AM_RANGE(0x084000, 0x087fff) AM_RAM // Linking with other units
AM_RANGE(0x088000, 0x08bfff) AM_RAM AM_SHARE("share2") // Sharedram with sub CPU#2
AM_RANGE(0x08c000, 0x08ffff) AM_RAM AM_SHARE("share1") // Sharedram with sub CPU#1
/* Only writes to the first 0x40000 bytes affect the tilemaps: */
/* either these games support larger tilemaps or have more ram than needed */
- AM_RANGE(0x090000, 0x093fff) AM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
- AM_RANGE(0x094000, 0x097fff) AM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
- AM_RANGE(0x098000, 0x09bfff) AM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
+ AM_RANGE(0x090000, 0x093fff) AM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
+ AM_RANGE(0x094000, 0x097fff) AM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
+ AM_RANGE(0x098000, 0x09bfff) AM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
- AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_SHARE("paletteram") // Palettes
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
- AM_RANGE(0x100000, 0x13ffff) AM_ROM AM_REGION("user1",0) // ROM
+ AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_SHARE("paletteram") // Palettes
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
+ AM_RANGE(0x100000, 0x13ffff) AM_ROM AM_REGION("user1",0) // ROM
ADDRESS_MAP_END
@@ -265,9 +265,9 @@ WRITE16_MEMBER(cischeat_state::cischeat_paletteram16_w)
}
static ADDRESS_MAP_START( cischeat_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x080000, 0x087fff) AM_READWRITE(cischeat_vregs_r, cischeat_vregs_w) AM_SHARE("vregs") // Vregs
- AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x080000, 0x087fff) AM_READWRITE(cischeat_vregs_r, cischeat_vregs_w) AM_SHARE("vregs") // Vregs
+ AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
/* Only the first 0x800 bytes are tested but:
CPU #0 PC 0000278c: warning - write 68c0 to unmapped memory address 0009c7fe
@@ -280,14 +280,14 @@ static ADDRESS_MAP_START( cischeat_map, AS_PROGRAM, 16, cischeat_state )
/* Only writes to the first 0x40000 bytes affect the tilemaps: */
/* either these games support larger tilemaps or have more ram than needed */
- AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
- AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
- AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
+ AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
+ AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
+ AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
- AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_SHARE("paletteram") // Palettes
+ AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_SHARE("paletteram") // Palettes
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
- AM_RANGE(0x100000, 0x17ffff) AM_ROM AM_REGION("user1",0) // ROM
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
+ AM_RANGE(0x100000, 0x17ffff) AM_ROM AM_REGION("user1",0) // ROM
ADDRESS_MAP_END
@@ -325,23 +325,23 @@ WRITE16_MEMBER(cischeat_state::f1gpstar_paletteram16_w)
0F8000-0F9000 */
static ADDRESS_MAP_START( f1gpstar_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstar_vregs_r, f1gpstar_vregs_w) AM_SHARE("vregs") // Vregs
- AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstar_vregs_r, f1gpstar_vregs_w) AM_SHARE("vregs") // Vregs
+ AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
AM_RANGE(0x090000, 0x097fff) AM_RAM AM_SHARE("share2") // Sharedram with sub CPU#2
AM_RANGE(0x098000, 0x09ffff) AM_RAM AM_SHARE("share1") // Sharedram with sub CPU#1
/* Only writes to the first 0x40000 bytes affect the tilemaps: */
/* either these games support larger tilemaps or have more ram than needed */
- AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
- AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
- AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
+ AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
+ AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
+ AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
- AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_SHARE("paletteram") // Palettes
+ AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_SHARE("paletteram") // Palettes
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
- AM_RANGE(0x100000, 0x17ffff) AM_ROM AM_REGION("user1",0) // ROM
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
+ AM_RANGE(0x100000, 0x17ffff) AM_ROM AM_REGION("user1",0) // ROM
ADDRESS_MAP_END
@@ -351,23 +351,23 @@ ADDRESS_MAP_END
// Same as f1gpstar, but vregs are slightly different:
static ADDRESS_MAP_START( f1gpstr2_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstr2_vregs_r, f1gpstr2_vregs_w) AM_SHARE("vregs") // Vregs (slightly different from f1gpstar)
- AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstr2_vregs_r, f1gpstr2_vregs_w) AM_SHARE("vregs") // Vregs (slightly different from f1gpstar)
+ AM_RANGE(0x088000, 0x088fff) AM_RAM // Linking with other units
AM_RANGE(0x090000, 0x097fff) AM_RAM AM_SHARE("share2") // Sharedram with sub CPU#2
AM_RANGE(0x098000, 0x09ffff) AM_RAM AM_SHARE("share1") // Sharedram with sub CPU#1
/* Only writes to the first 0x40000 bytes affect the tilemaps: */
/* either these games support larger tilemaps or have more ram than needed */
- AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
- AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
- AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
+ AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll ram 0
+ AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(cischeat_scrollram_1_w) AM_SHARE("scrollram.1") // Scroll ram 1
+ AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll ram 2
- AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_SHARE("paletteram") // Palettes
+ AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_SHARE("paletteram") // Palettes
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
- AM_RANGE(0x100000, 0x17ffff) AM_ROM AM_REGION("user1",0) // ROM
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // RAM
+ AM_RANGE(0x100000, 0x17ffff) AM_ROM AM_REGION("user1",0) // ROM
ADDRESS_MAP_END
@@ -403,7 +403,7 @@ WRITE16_MEMBER(cischeat_state::scudhamm_paletteram16_w)
READ16_MEMBER(cischeat_state::scudhamm_motor_status_r)
{
- return m_scudhamm_motor_command; // Motor Status
+ return m_scudhamm_motor_command; // Motor Status
}
@@ -440,9 +440,9 @@ READ16_MEMBER(cischeat_state::scudhamm_analog_r)
m_prev=i;
/* effect of hammer collision 'accelerometer':
- $00 - $09 - no hit
- $0A - $3F - soft hit
- $40 - $FF - hard hit */
+ $00 - $09 - no hit
+ $0A - $3F - soft hit
+ $40 - $FF - hard hit */
if (j<0) return 0;
else if (j>0xff) return 0xff;
return j;
@@ -457,7 +457,7 @@ WRITE16_MEMBER(cischeat_state::scudhamm_leds_w)
{
if (ACCESSING_BITS_8_15)
{
- set_led_status(machine(), 0, data & 0x0100); // 3 buttons
+ set_led_status(machine(), 0, data & 0x0100); // 3 buttons
set_led_status(machine(), 1, data & 0x0200);
set_led_status(machine(), 2, data & 0x0400);
}
@@ -491,21 +491,21 @@ WRITE16_MEMBER(cischeat_state::scudhamm_oki_bank_w)
}
static ADDRESS_MAP_START( scudhamm_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_SHARE("vregs") // Video Registers + RAM
- AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll RAM 0
- AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll RAM 2
- AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_SHARE("paletteram") // Palette
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // Work RAM + Spriteram
- AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w) // Sound
- AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") AM_WRITE(scudhamm_leds_w) // Buttons
- AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // Sound
- AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff) //
- AM_RANGE(0x10001c, 0x10001d) AM_WRITE(scudhamm_enable_w) // ?
- AM_RANGE(0x100040, 0x100041) AM_READ(scudhamm_analog_r) AM_WRITENOP // A / D
- AM_RANGE(0x100044, 0x100045) AM_READ(scudhamm_motor_pos_r) // Motor Position
- AM_RANGE(0x100050, 0x100051) AM_READ(scudhamm_motor_status_r) AM_WRITE(scudhamm_motor_command_w) // Motor Limit Switches
- AM_RANGE(0x10005c, 0x10005d) AM_READ_PORT("IN2") // 2 x DSW
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_SHARE("vregs") // Video Registers + RAM
+ AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll RAM 0
+ AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll RAM 2
+ AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // Work RAM + Spriteram
+ AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w) // Sound
+ AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") AM_WRITE(scudhamm_leds_w) // Buttons
+ AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff) // Sound
+ AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff) //
+ AM_RANGE(0x10001c, 0x10001d) AM_WRITE(scudhamm_enable_w) // ?
+ AM_RANGE(0x100040, 0x100041) AM_READ(scudhamm_analog_r) AM_WRITENOP // A / D
+ AM_RANGE(0x100044, 0x100045) AM_READ(scudhamm_motor_pos_r) // Motor Position
+ AM_RANGE(0x100050, 0x100051) AM_READ(scudhamm_motor_status_r) AM_WRITE(scudhamm_motor_command_w) // Motor Limit Switches
+ AM_RANGE(0x10005c, 0x10005d) AM_READ_PORT("IN2") // 2 x DSW
ADDRESS_MAP_END
@@ -530,7 +530,7 @@ READ16_MEMBER(cischeat_state::armchmp2_analog_r)
armdelta = ioport("IN1")->read() - m_armold;
m_armold = ioport("IN1")->read();
- return ~( m_scudhamm_motor_command + armdelta ); // + x : x<=0 and player loses, x>0 and player wins
+ return ~( m_scudhamm_motor_command + armdelta ); // + x : x<=0 and player loses, x>0 and player wins
}
READ16_MEMBER(cischeat_state::armchmp2_buttons_r)
@@ -539,9 +539,9 @@ READ16_MEMBER(cischeat_state::armchmp2_buttons_r)
UINT16 ret = ioport("IN0")->read();
- if (arm_x < 0x40) ret &= ~1;
- else if (arm_x > 0xc0) ret &= ~2;
- else if ((arm_x > 0x60) && (arm_x < 0xa0)) ret &= ~4;
+ if (arm_x < 0x40) ret &= ~1;
+ else if (arm_x > 0xc0) ret &= ~2;
+ else if ((arm_x > 0x60) && (arm_x < 0xa0)) ret &= ~4;
return ret;
}
@@ -572,19 +572,19 @@ WRITE16_MEMBER(cischeat_state::armchmp2_leds_w)
}
static ADDRESS_MAP_START( armchmp2_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_SHARE("vregs") // Video Registers + RAM
- AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll RAM 0
- AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll RAM 2
- AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_SHARE("paletteram") // Palette
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // Work RAM + Spriteram
- AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN2") AM_WRITE(scudhamm_oki_bank_w) // DSW + Sound
- AM_RANGE(0x100004, 0x100005) AM_READ_PORT("IN3") // DSW
- AM_RANGE(0x100008, 0x100009) AM_READWRITE(armchmp2_buttons_r, armchmp2_leds_w) // Leds + Coin Counters + Buttons + Sensors
- AM_RANGE(0x10000c, 0x10000d) AM_READ(armchmp2_analog_r) AM_WRITENOP // A / D
- AM_RANGE(0x100010, 0x100011) AM_READWRITE(armchmp2_motor_status_r, armchmp2_motor_command_w) // Motor Limit Switches?
- AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff ) // Sound
- AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff ) //
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_SHARE("vregs") // Video Registers + RAM
+ AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(cischeat_scrollram_0_w) AM_SHARE("scrollram.0") // Scroll RAM 0
+ AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(cischeat_scrollram_2_w) AM_SHARE("scrollram.2") // Scroll RAM 2
+ AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_SHARE("paletteram") // Palette
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE("ram") // Work RAM + Spriteram
+ AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN2") AM_WRITE(scudhamm_oki_bank_w) // DSW + Sound
+ AM_RANGE(0x100004, 0x100005) AM_READ_PORT("IN3") // DSW
+ AM_RANGE(0x100008, 0x100009) AM_READWRITE(armchmp2_buttons_r, armchmp2_leds_w) // Leds + Coin Counters + Buttons + Sensors
+ AM_RANGE(0x10000c, 0x10000d) AM_READ(armchmp2_analog_r) AM_WRITENOP // A / D
+ AM_RANGE(0x100010, 0x100011) AM_READWRITE(armchmp2_motor_status_r, armchmp2_motor_command_w) // Motor Limit Switches?
+ AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff ) // Sound
+ AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff ) //
ADDRESS_MAP_END
@@ -601,17 +601,17 @@ ADDRESS_MAP_END
**************************************************************************/
static ADDRESS_MAP_START( bigrun_map2, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share1") // Shared RAM (with Main CPU)
- AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.0") // Road RAM
- AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share1") // Shared RAM (with Main CPU)
+ AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.0") // Road RAM
+ AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( bigrun_map3, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share2") // Shared RAM (with Main CPU)
- AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.1") // Road RAM
- AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share2") // Shared RAM (with Main CPU)
+ AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.1") // Road RAM
+ AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
ADDRESS_MAP_END
@@ -620,21 +620,21 @@ ADDRESS_MAP_END
**************************************************************************/
static ADDRESS_MAP_START( cischeat_map2, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share1") // Shared RAM (with Main CPU)
- AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.0") // Road RAM
- AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
- AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog
- AM_RANGE(0x200000, 0x23ffff) AM_ROM AM_REGION("cpu2",0x40000) // ROM
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share1") // Shared RAM (with Main CPU)
+ AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.0") // Road RAM
+ AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
+ AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog
+ AM_RANGE(0x200000, 0x23ffff) AM_ROM AM_REGION("cpu2",0x40000) // ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START( cischeat_map3, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share2") // Shared RAM (with Main CPU)
- AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.1") // Road RAM
- AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
- AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog
- AM_RANGE(0x200000, 0x23ffff) AM_ROM AM_REGION("cpu3",0x40000) // ROM
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x040000, 0x047fff) AM_RAM AM_SHARE("share2") // Shared RAM (with Main CPU)
+ AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("roadram.1") // Road RAM
+ AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM // RAM
+ AM_RANGE(0x100000, 0x100001) AM_WRITENOP // watchdog
+ AM_RANGE(0x200000, 0x23ffff) AM_ROM AM_REGION("cpu3",0x40000) // ROM
ADDRESS_MAP_END
@@ -644,19 +644,19 @@ ADDRESS_MAP_END
**************************************************************************/
static ADDRESS_MAP_START( f1gpstar_map2, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("share1") // Shared RAM (with Main CPU)
- AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_SHARE("roadram.0") // Road RAM
- AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM
- AM_RANGE(0x200000, 0x200001) AM_WRITENOP // watchdog
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("share1") // Shared RAM (with Main CPU)
+ AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_SHARE("roadram.0") // Road RAM
+ AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM
+ AM_RANGE(0x200000, 0x200001) AM_WRITENOP // watchdog
ADDRESS_MAP_END
static ADDRESS_MAP_START( f1gpstar_map3, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("share2") // Shared RAM (with Main CPU)
- AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_SHARE("roadram.1") // Road RAM
- AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM
- AM_RANGE(0x200000, 0x200001) AM_WRITENOP // watchdog
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_SHARE("share2") // Shared RAM (with Main CPU)
+ AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_SHARE("roadram.1") // Road RAM
+ AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM
+ AM_RANGE(0x200000, 0x200001) AM_WRITENOP // watchdog
ADDRESS_MAP_END
@@ -687,13 +687,13 @@ WRITE16_MEMBER(cischeat_state::bigrun_soundbank_w)
}
static ADDRESS_MAP_START( bigrun_sound_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040000, 0x040001) AM_READ(soundlatch_word_r) AM_WRITE(bigrun_soundbank_w) // From Main CPU
- AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w) // To Main CPU
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x040000, 0x040001) AM_READ(soundlatch_word_r) AM_WRITE(bigrun_soundbank_w) // From Main CPU
+ AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w) // To Main CPU
AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ymsnd", ym2151_device, read, write, 0x00ff)
AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff)
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM // RAM
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM // RAM
ADDRESS_MAP_END
@@ -705,25 +705,25 @@ WRITE16_MEMBER(cischeat_state::cischeat_soundbank_1_w)
{
device_t *device = machine().device("oki1");
okim6295_device *oki = downcast<okim6295_device *>(device);
- if (ACCESSING_BITS_0_7) oki->set_bank_base(0x40000 * (data & 1) );
+ if (ACCESSING_BITS_0_7) oki->set_bank_base(0x40000 * (data & 1) );
}
WRITE16_MEMBER(cischeat_state::cischeat_soundbank_2_w)
{
device_t *device = machine().device("oki2");
okim6295_device *oki = downcast<okim6295_device *>(device);
- if (ACCESSING_BITS_0_7) oki->set_bank_base(0x40000 * (data & 1) );
+ if (ACCESSING_BITS_0_7) oki->set_bank_base(0x40000 * (data & 1) );
}
static ADDRESS_MAP_START( cischeat_sound_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040002, 0x040003) AM_WRITE(cischeat_soundbank_1_w) // Sample Banking
- AM_RANGE(0x040004, 0x040005) AM_WRITE(cischeat_soundbank_2_w) // Sample Banking
- AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w) // To Main CPU
- AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r) // From Main CPU
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x040002, 0x040003) AM_WRITE(cischeat_soundbank_1_w) // Sample Banking
+ AM_RANGE(0x040004, 0x040005) AM_WRITE(cischeat_soundbank_2_w) // Sample Banking
+ AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w) // To Main CPU
+ AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r) // From Main CPU
AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ymsnd", ym2151_device, read, write, 0x00ff)
AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff)
- AM_RANGE(0x0f0000, 0x0fffff) AM_RAM // RAM
+ AM_RANGE(0x0f0000, 0x0fffff) AM_RAM // RAM
ADDRESS_MAP_END
@@ -732,14 +732,14 @@ ADDRESS_MAP_END
**************************************************************************/
static ADDRESS_MAP_START( f1gpstar_sound_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040004, 0x040005) AM_WRITE(cischeat_soundbank_1_w) // Sample Banking (cischeat: 40002)
- AM_RANGE(0x040008, 0x040009) AM_WRITE(cischeat_soundbank_2_w) // Sample Banking (cischeat: 40004)
- AM_RANGE(0x060000, 0x060001) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w) // From Main CPU (cischeat: 60004)
+ AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
+ AM_RANGE(0x040004, 0x040005) AM_WRITE(cischeat_soundbank_1_w) // Sample Banking (cischeat: 40002)
+ AM_RANGE(0x040008, 0x040009) AM_WRITE(cischeat_soundbank_2_w) // Sample Banking (cischeat: 40004)
+ AM_RANGE(0x060000, 0x060001) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w) // From Main CPU (cischeat: 60004)
AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ymsnd", ym2151_device, read, write, 0x00ff)
AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff)
- AM_RANGE(0x0e0000, 0x0fffff) AM_RAM // RAM (cischeat: f0000-fffff)
+ AM_RANGE(0x0e0000, 0x0fffff) AM_RAM // RAM (cischeat: f0000-fffff)
ADDRESS_MAP_END
@@ -749,14 +749,14 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( f1gpstr2_sound_map, AS_PROGRAM, 16, cischeat_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
- AM_RANGE(0x040004, 0x040005) AM_WRITE(cischeat_soundbank_1_w) // Sample Banking
- AM_RANGE(0x040008, 0x040009) AM_WRITE(cischeat_soundbank_2_w) // Sample Banking
- AM_RANGE(0x04000e, 0x04000f) AM_WRITENOP // ? 0 (f1gpstar: no)
- AM_RANGE(0x060004, 0x060005) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w) // From Main CPU (f1gpstar: 60000)
+ AM_RANGE(0x040004, 0x040005) AM_WRITE(cischeat_soundbank_1_w) // Sample Banking
+ AM_RANGE(0x040008, 0x040009) AM_WRITE(cischeat_soundbank_2_w) // Sample Banking
+ AM_RANGE(0x04000e, 0x04000f) AM_WRITENOP // ? 0 (f1gpstar: no)
+ AM_RANGE(0x060004, 0x060005) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w) // From Main CPU (f1gpstar: 60000)
AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ymsnd", ym2151_device, read, write, 0x00ff)
AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff)
- AM_RANGE(0x0e0000, 0x0fffff) AM_RAM // RAM
+ AM_RANGE(0x0e0000, 0x0fffff) AM_RAM // RAM
ADDRESS_MAP_END
/**************************************************************************
@@ -778,11 +778,11 @@ WRITE16_MEMBER(cischeat_state::f1gpstr2_io_w)
}
static ADDRESS_MAP_START( f1gpstr2_io_map, AS_PROGRAM, 16, cischeat_state )
- AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
- AM_RANGE(0x080000, 0x080fff) AM_READWRITE(f1gpstr2_io_r, f1gpstr2_io_w) //
- AM_RANGE(0x100000, 0x100001) AM_WRITEONLY AM_SHARE("ioready") //
- AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM
- AM_RANGE(0x200000, 0x200001) AM_WRITENOP //
+ AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
+ AM_RANGE(0x080000, 0x080fff) AM_READWRITE(f1gpstr2_io_r, f1gpstr2_io_w) //
+ AM_RANGE(0x100000, 0x100001) AM_WRITEONLY AM_SHARE("ioready") //
+ AM_RANGE(0x180000, 0x183fff) AM_RAM // RAM
+ AM_RANGE(0x200000, 0x200001) AM_WRITENOP //
ADDRESS_MAP_END
@@ -807,28 +807,28 @@ ADDRESS_MAP_END
// [4] DSW 1 & 2 [5] DSW 3 [6] Driving Wheel
static INPUT_PORTS_START( bigrun )
- PORT_START("IN1") // Coins - $80000.w
+ PORT_START("IN1") // Coins - $80000.w
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW ) // called "Test"
+ PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW ) // called "Test"
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN2") //Controls - $80002.w
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Brake") // Brake
+ PORT_START("IN2") //Controls - $80002.w
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Brake") // Brake
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P1 Gear Shift") PORT_TOGGLE // Shift
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("P1 Horn") // Horn
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("P1 Horn") // Horn
- PORT_START("IN3") // Motor Control? - $80004.w
- PORT_DIPNAME( 0x01, 0x01, "Up Limit SW" ) // Limit the Cockpit movements?
+ PORT_START("IN3") // Motor Control? - $80004.w
+ PORT_DIPNAME( 0x01, 0x01, "Up Limit SW" ) // Limit the Cockpit movements?
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "Down Limit SW" )
@@ -847,20 +847,20 @@ static INPUT_PORTS_START( bigrun )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN4") // DSW 2 & 3 - $80006.w
+ PORT_START("IN4") // DSW 2 & 3 - $80006.w
// DSW 3
- PORT_DIPNAME( 0x0003, 0x0003, "Extra Setting For Coin B" ) PORT_DIPLOCATION("SW302:8,7") /* 'Not used' (and must be OFF) according to the manual */
+ PORT_DIPNAME( 0x0003, 0x0003, "Extra Setting For Coin B" ) PORT_DIPLOCATION("SW302:8,7") /* 'Not used' (and must be OFF) according to the manual */
PORT_DIPSETTING( 0x0003, DEF_STR( Unused ) )
- PORT_DIPSETTING( 0x0001, DEF_STR( 1C_5C ) ) PORT_CONDITION("IN4", 0x1c00, NOTEQUALS, 0x0000)
- PORT_DIPSETTING( 0x0002, DEF_STR( 1C_6C ) ) PORT_CONDITION("IN4", 0x1c00, NOTEQUALS, 0x0000)
- PORT_DIPSETTING( 0x0000, DEF_STR( 1C_7C ) ) PORT_CONDITION("IN4", 0x1c00, NOTEQUALS, 0x0000)
- PORT_DIPSETTING( 0x0001, DEF_STR( Unused ) ) PORT_CONDITION("IN4", 0x1c00, EQUALS, 0x0000)
- PORT_DIPSETTING( 0x0002, DEF_STR( Unused ) ) PORT_CONDITION("IN4", 0x1c00, EQUALS, 0x0000)
- PORT_DIPSETTING( 0x0000, DEF_STR( Unused ) ) PORT_CONDITION("IN4", 0x1c00, EQUALS, 0x0000)
+ PORT_DIPSETTING( 0x0001, DEF_STR( 1C_5C ) ) PORT_CONDITION("IN4", 0x1c00, NOTEQUALS, 0x0000)
+ PORT_DIPSETTING( 0x0002, DEF_STR( 1C_6C ) ) PORT_CONDITION("IN4", 0x1c00, NOTEQUALS, 0x0000)
+ PORT_DIPSETTING( 0x0000, DEF_STR( 1C_7C ) ) PORT_CONDITION("IN4", 0x1c00, NOTEQUALS, 0x0000)
+ PORT_DIPSETTING( 0x0001, DEF_STR( Unused ) ) PORT_CONDITION("IN4", 0x1c00, EQUALS, 0x0000)
+ PORT_DIPSETTING( 0x0002, DEF_STR( Unused ) ) PORT_CONDITION("IN4", 0x1c00, EQUALS, 0x0000)
+ PORT_DIPSETTING( 0x0000, DEF_STR( Unused ) ) PORT_CONDITION("IN4", 0x1c00, EQUALS, 0x0000)
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW302:6")
PORT_DIPSETTING( 0x0004, DEF_STR( No ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
- PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Region ) ) PORT_DIPLOCATION("SW302:5") // If you try to change Unit ID the game show the error message in different language
+ PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Region ) ) PORT_DIPLOCATION("SW302:5") // If you try to change Unit ID the game show the error message in different language
PORT_DIPSETTING( 0x0008, DEF_STR( Japanese ) )
PORT_DIPSETTING( 0x0000, DEF_STR( English) )
PORT_DIPNAME( 0x0010, 0x0010, "Move Cabinet" ) PORT_DIPLOCATION("SW302:4")
@@ -904,9 +904,9 @@ static INPUT_PORTS_START( bigrun )
PORT_DIPSETTING( 0x2000, DEF_STR( 1C_4C ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Free_Play ) )
- PORT_START("IN5") // DSW 3 (4 bits, Cabinet Linking) - $82200.w
+ PORT_START("IN5") // DSW 3 (4 bits, Cabinet Linking) - $82200.w
/* According to Manual: "When Machines are linked for simultaneous racing throught the
- Com-Link System, SW1 should be set as shown", i.e. ON for Master Machine, OFF for others */
+ Com-Link System, SW1 should be set as shown", i.e. ON for Master Machine, OFF for others */
PORT_DIPNAME( 0x01, 0x00, "Link ID" ) PORT_DIPLOCATION("SW1:1")
PORT_DIPSETTING( 0x00, "Master Unit" )
PORT_DIPSETTING( 0x01, "Other Units" )
@@ -915,16 +915,16 @@ static INPUT_PORTS_START( bigrun )
PORT_DIPSETTING( 0x02, "2 (Green-White Car)" )
PORT_DIPSETTING( 0x04, "3 (Red-White Car)" )
PORT_DIPSETTING( 0x06, "4 (Yellow Car)" )
- PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW1:4") /* Always ON according to manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x00, "SW1:4") /* Always ON according to manual */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN6") // Driving Wheel - $80010.w(0)
+ PORT_START("IN6") // Driving Wheel - $80010.w(0)
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30)
- PORT_START("PEDAL") // Accelerator Pedal
+ PORT_START("PEDAL") // Accelerator Pedal
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(40)
INPUT_PORTS_END
@@ -938,28 +938,28 @@ INPUT_PORTS_END
// [4] DSW 1 & 2 [5] DSW 3 [6] Driving Wheel
static INPUT_PORTS_START( cischeat )
- PORT_START("IN1") // Coins - $80000.w
+ PORT_START("IN1") // Coins - $80000.w
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW) // called "Test"
+ PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_LOW) // called "Test"
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN2") // Controls - $80002.w
- PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P1 Brake") // Brake
+ PORT_START("IN2") // Controls - $80002.w
+ PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P1 Brake") // Brake
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("P1 Gear Shift") PORT_TOGGLE // Shift
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Accelerator") // Accel
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Accelerator") // Accel
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("P1 Horn") // Horn
+ PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("P1 Horn") // Horn
- PORT_START("IN3") // Motor Control? - $80004.w
- PORT_DIPNAME( 0x01, 0x01, "Up Limit SW" ) // Limit the Cockpit movements?
+ PORT_START("IN3") // Motor Control? - $80004.w
+ PORT_DIPNAME( 0x01, 0x01, "Up Limit SW" ) // Limit the Cockpit movements?
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, "Down Limit SW" )
@@ -976,7 +976,7 @@ static INPUT_PORTS_START( cischeat )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN4") // DSW 1 & 2 - $80006.w -> !f000a.w(hi byte) !f0008.w(low byte)
+ PORT_START("IN4") // DSW 1 & 2 - $80006.w -> !f000a.w(hi byte) !f0008.w(low byte)
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW301:1,2,3")
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
@@ -998,17 +998,17 @@ static INPUT_PORTS_START( cischeat )
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW301:7" )
PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW301:8" )
// DSW 2
- PORT_DIPNAME( 0x0300, 0x0300, "Unit ID" ) PORT_DIPLOCATION("SW302:1,2") // -> !f0020 (ID of this unit, when linked)
+ PORT_DIPNAME( 0x0300, 0x0300, "Unit ID" ) PORT_DIPLOCATION("SW302:1,2") // -> !f0020 (ID of this unit, when linked)
PORT_DIPSETTING( 0x0300, "0 (Red Car)" )
PORT_DIPSETTING( 0x0200, "1 (Blue Car)" )
PORT_DIPSETTING( 0x0100, "2 (Yellow Car)" )
PORT_DIPSETTING( 0x0000, "3 (Green Car)" )
- PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW302:3,4") // -> !f0026
+ PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW302:3,4") // -> !f0026
PORT_DIPSETTING( 0x0000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0800, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0400, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x1000, 0x1000, "Infinite Time (Cheat)" ) PORT_DIPLOCATION("SW302:5") // -> !f0028
+ PORT_DIPNAME( 0x1000, 0x1000, "Infinite Time (Cheat)" ) PORT_DIPLOCATION("SW302:5") // -> !f0028
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW302:6")
@@ -1017,13 +1017,13 @@ static INPUT_PORTS_START( cischeat )
PORT_DIPNAME( 0x4000, 0x4000, "Country" ) PORT_DIPLOCATION("SW302:7")
PORT_DIPSETTING( 0x4000, DEF_STR( Japan ) )
PORT_DIPSETTING( 0x0000, DEF_STR( USA ) )
- PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW302:8") // -> !f00c0
+ PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW302:8") // -> !f00c0
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_START("IN5") // DSW 3 (4 bits, Cabinet Linking) - $82200.w
+ PORT_START("IN5") // DSW 3 (4 bits, Cabinet Linking) - $82200.w
PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW1:1" )
- PORT_DIPNAME( 0x06, 0x06, "Unit ID (2)" ) PORT_DIPLOCATION("SW1:2,3") // -> f0020 (like DSW2 !!)
+ PORT_DIPNAME( 0x06, 0x06, "Unit ID (2)" ) PORT_DIPLOCATION("SW1:2,3") // -> f0020 (like DSW2 !!)
PORT_DIPSETTING( 0x06, "Use other" )
PORT_DIPSETTING( 0x00, "0 (Red Car)" )
PORT_DIPSETTING( 0x02, "1 (Blue Car)" )
@@ -1034,7 +1034,7 @@ static INPUT_PORTS_START( cischeat )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN6") // IN6 - Driving Wheel - $80010.w(0)
+ PORT_START("IN6") // IN6 - Driving Wheel - $80010.w(0)
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30)
INPUT_PORTS_END
@@ -1055,7 +1055,7 @@ static INPUT_PORTS_START( f1gpstar )
Europe English, Mph , "steering shock", "(c)1992"
France French, Km/h, "steering shock", "(c)1992" */
- PORT_START("IN1") // DSW 1 & 2 - $80000.w -> !f9012
+ PORT_START("IN1") // DSW 1 & 2 - $80000.w -> !f9012
// DSW 1
// Coinage Japan & USA (it changes with Country)
PORT_DIPNAME( 0x0007, 0x0007, "Coin A (JP US)" ) PORT_DIPLOCATION("SW01:1,2,3") PORT_CONDITION("IN1", 0x0300, GREATERTHAN, 0x0100)
@@ -1075,7 +1075,7 @@ static INPUT_PORTS_START( f1gpstar )
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0028, DEF_STR( 1C_3C ) )
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
- PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW01:7") PORT_CONDITION("IN1", 0x0300, GREATERTHAN, 0x0100) // unused?
+ PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW01:7") PORT_CONDITION("IN1", 0x0300, GREATERTHAN, 0x0100) // unused?
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
// Coinage Europe & France (it changes with Country)
@@ -1101,36 +1101,36 @@ static INPUT_PORTS_START( f1gpstar )
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x0080, 0x0080, "SW01:8" ) // unused?
+ PORT_DIPUNKNOWN_DIPLOC( 0x0080, 0x0080, "SW01:8" ) // unused?
// DSW 2
- PORT_DIPNAME( 0x0300, 0x0100, DEF_STR( Region ) ) PORT_DIPLOCATION("SW02:1,2") // -> !f901e
+ PORT_DIPNAME( 0x0300, 0x0100, DEF_STR( Region ) ) PORT_DIPLOCATION("SW02:1,2") // -> !f901e
PORT_DIPSETTING( 0x0300, DEF_STR( Japan ) )
PORT_DIPSETTING( 0x0200, DEF_STR( USA ) )
PORT_DIPSETTING( 0x0100, DEF_STR( Europe ) )
PORT_DIPSETTING( 0x0000, "France" )
- PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW02:3,4") // -> !f9026
- PORT_DIPSETTING( 0x0000, DEF_STR( Easy ) ) // 58 <- Initial Time (seconds, Germany)
- PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) ) // 51
- PORT_DIPSETTING( 0x0800, DEF_STR( Hard ) ) // 48
- PORT_DIPSETTING( 0x0400, DEF_STR( Very_Hard ) ) // 46
+ PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW02:3,4") // -> !f9026
+ PORT_DIPSETTING( 0x0000, DEF_STR( Easy ) ) // 58 <- Initial Time (seconds, Germany)
+ PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) ) // 51
+ PORT_DIPSETTING( 0x0800, DEF_STR( Hard ) ) // 48
+ PORT_DIPSETTING( 0x0400, DEF_STR( Very_Hard ) ) // 46
PORT_DIPNAME( 0x1000, 0x1000, "Infinite Time (Cheat)" ) PORT_DIPLOCATION("SW02:5")
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW02:6")
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x2000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW02:7") PORT_CONDITION("IN1", 0x0300, EQUALS, 0x0300) // unused?
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW02:7") PORT_CONDITION("IN1", 0x0300, EQUALS, 0x0300) // unused?
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, "Choose Race (US EU FR)" ) PORT_DIPLOCATION("SW02:7") PORT_CONDITION("IN1", 0x0300, NOTEQUALS, 0x0300) // -> f0020
+ PORT_DIPNAME( 0x4000, 0x4000, "Choose Race (US EU FR)" ) PORT_DIPLOCATION("SW02:7") PORT_CONDITION("IN1", 0x0300, NOTEQUALS, 0x0300) // -> f0020
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x4000, DEF_STR( On ) )
PORT_DIPNAME( 0x8000, 0x8000, "Vibrations" ) PORT_DIPLOCATION("SW02:8")
PORT_DIPSETTING( 0x8000, "Torque" )
PORT_DIPSETTING( 0x0000, "Shake" )
- PORT_START("IN2") // Controls - $80004.w -> !f9016
+ PORT_START("IN2") // Controls - $80004.w -> !f9016
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
@@ -1140,7 +1140,7 @@ static INPUT_PORTS_START( f1gpstar )
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Brake")// Brake -> !f9010
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START2 ) // "Race Together"
- PORT_START("IN3") // ? Read at boot only - $80006.w
+ PORT_START("IN3") // ? Read at boot only - $80006.w
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1164,26 +1164,26 @@ static INPUT_PORTS_START( f1gpstar )
ON-OFF Blue-White Car
ON- ON Blue Car, "equipped with communication link" */
- PORT_START("IN4") // DSW 3 (4 bits, Cabinet Linking) - $8000c.w -> !f9014
+ PORT_START("IN4") // DSW 3 (4 bits, Cabinet Linking) - $8000c.w -> !f9014
PORT_DIPNAME( 0x01, 0x01, "This Unit Is" ) PORT_DIPLOCATION("SW03:1")
PORT_DIPSETTING( 0x01, "Slave" )
PORT_DIPSETTING( 0x00, "Master" )
- PORT_DIPNAME( 0x06, 0x06, "Unit ID" ) PORT_DIPLOCATION("SW03:2,3") // -> !f901c
+ PORT_DIPNAME( 0x06, 0x06, "Unit ID" ) PORT_DIPLOCATION("SW03:2,3") // -> !f901c
PORT_DIPSETTING( 0x06, "0 (Red-White Car)" )
PORT_DIPSETTING( 0x04, "1 (Red Car)" )
PORT_DIPSETTING( 0x02, "2 (Blue-White Car)" )
PORT_DIPSETTING( 0x00, "3 (Blue Car)" )
- PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW03:4" ) // Redundant: Invert Unit ID
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW03:4" ) // Redundant: Invert Unit ID
PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW03:5" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW03:6" )
PORT_DIPUNKNOWN_DIPLOC( 0x40, 0x40, "SW03:7" )
PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW03:8" )
// Accelerator - $80010.b -> !f9004.w
- PORT_START("IN5") // Driving Wheel - $80011.b -> !f9008.w
+ PORT_START("IN5") // Driving Wheel - $80011.b -> !f9008.w
PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30)
- PORT_START("PEDAL") // Accelerator Pedal
+ PORT_START("PEDAL") // Accelerator Pedal
PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(100) PORT_KEYDELTA(40) PORT_REVERSE
INPUT_PORTS_END
@@ -1193,7 +1193,7 @@ INPUT_PORTS_END
**************************************************************************/
static INPUT_PORTS_START( wildplt )
- PORT_START("IN0") // DSW 1 & 2
+ PORT_START("IN0") // DSW 1 & 2
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coinage ) )
PORT_DIPSETTING( 0x0001, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0002, DEF_STR( 3C_1C ) )
@@ -1273,11 +1273,11 @@ INPUT_PORTS_END
**************************************************************************/
static INPUT_PORTS_START( scudhamm )
- PORT_START("IN0") // Buttons
+ PORT_START("IN0") // Buttons
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN ) // GAME OVER if pressed on the selection screen
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW ) // called "Test"
+ PORT_SERVICE_NO_TOGGLE( 0x0008, IP_ACTIVE_LOW ) // called "Test"
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON4 ) // Select
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -1292,10 +1292,10 @@ static INPUT_PORTS_START( scudhamm )
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_TILT )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
- PORT_START("IN1") // A/D
+ PORT_START("IN1") // A/D
PORT_BIT( 0x7fff, 0x0000, IPT_DIAL_V ) PORT_SENSITIVITY(50) PORT_KEYDELTA(50)
- PORT_START("IN2") // DSW
+ PORT_START("IN2") // DSW
PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW3:1,2")
PORT_DIPSETTING( 0x0000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0003, DEF_STR( Normal ) )
@@ -1337,7 +1337,7 @@ INPUT_PORTS_END
**************************************************************************/
static INPUT_PORTS_START( armchmp2 )
- PORT_START("IN0") // Buttons + Sensors
+ PORT_START("IN0") // Buttons + Sensors
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL ) // left sensor
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SPECIAL ) // right sensor
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SPECIAL ) // center sensor
@@ -1351,10 +1351,10 @@ static INPUT_PORTS_START( armchmp2 )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) // easy
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_BUTTON3 ) // elbow (it always complains though)
- PORT_START("IN1") // A/D
+ PORT_START("IN1") // A/D
PORT_BIT( 0x00ff, 0x0000, IPT_DIAL ) PORT_MINMAX(0x0000,0x00ff) PORT_SENSITIVITY(100) PORT_KEYDELTA(10)
- PORT_START("IN2") // DSW
+ PORT_START("IN2") // DSW
PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0003, DEF_STR( Normal ) )
@@ -1370,13 +1370,13 @@ static INPUT_PORTS_START( armchmp2 )
PORT_DIPSETTING( 0x0030, "20 s" )
PORT_DIPSETTING( 0x0020, "25 s" )
PORT_DIPSETTING( 0x0010, "30 s" )
- PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Region ) ) // some text is in japanese regardless!
+ PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Region ) ) // some text is in japanese regardless!
PORT_DIPSETTING( 0x00c0, DEF_STR( Japan ) )
PORT_DIPSETTING( 0x0080, DEF_STR( USA ) )
PORT_DIPSETTING( 0x0040, DEF_STR( Europe ) )
PORT_DIPSETTING( 0x0000, DEF_STR( World ) )
- PORT_START("IN3") // DSW
+ PORT_START("IN3") // DSW
PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
PORT_DIPSETTING( 0x01, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 3C_1C ) )
@@ -1473,12 +1473,12 @@ static const gfx_layout road_layout =
**************************************************************************/
static GFXDECODE_START( bigrun )
- GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [0] Scroll 0
- GFXDECODE_ENTRY( "gfx2", 0, tiles_8x8, 0x0100, 16 ) // [1] Scroll 1
- GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0e00, 16 ) // [2] Scroll 2
- GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16, 0x0a00, 64 ) // [3] Sprites
- GFXDECODE_ENTRY( "gfx5", 0, road_layout, 0x0600, 64 ) // [4] Road 0
- GFXDECODE_ENTRY( "gfx6", 0, road_layout, 0x0200, 64 ) // [5] Road 1
+ GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [0] Scroll 0
+ GFXDECODE_ENTRY( "gfx2", 0, tiles_8x8, 0x0100, 16 ) // [1] Scroll 1
+ GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0e00, 16 ) // [2] Scroll 2
+ GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16, 0x0a00, 64 ) // [3] Sprites
+ GFXDECODE_ENTRY( "gfx5", 0, road_layout, 0x0600, 64 ) // [4] Road 0
+ GFXDECODE_ENTRY( "gfx6", 0, road_layout, 0x0200, 64 ) // [5] Road 1
GFXDECODE_END
/**************************************************************************
@@ -1486,12 +1486,12 @@ GFXDECODE_END
**************************************************************************/
static GFXDECODE_START( cischeat )
- GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 32 ) // [0] Scroll 0
- GFXDECODE_ENTRY( "gfx2", 0, tiles_8x8, 0x0200, 32 ) // [1] Scroll 1
- GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0400, 32 ) // [2] Scroll 2
- GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16, 0x0e00, 128 ) // [3] Sprites
- GFXDECODE_ENTRY( "gfx5", 0, road_layout, 0x0600, 64 ) // [4] Road 0
- GFXDECODE_ENTRY( "gfx6", 0, road_layout, 0x0a00, 64 ) // [5] Road 1
+ GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 32 ) // [0] Scroll 0
+ GFXDECODE_ENTRY( "gfx2", 0, tiles_8x8, 0x0200, 32 ) // [1] Scroll 1
+ GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0400, 32 ) // [2] Scroll 2
+ GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16, 0x0e00, 128 ) // [3] Sprites
+ GFXDECODE_ENTRY( "gfx5", 0, road_layout, 0x0600, 64 ) // [4] Road 0
+ GFXDECODE_ENTRY( "gfx6", 0, road_layout, 0x0a00, 64 ) // [5] Road 1
GFXDECODE_END
/**************************************************************************
@@ -1499,12 +1499,12 @@ GFXDECODE_END
**************************************************************************/
static GFXDECODE_START( f1gpstar )
- GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [0] Scroll 0
- GFXDECODE_ENTRY( "gfx2", 0, tiles_8x8, 0x0100, 16 ) // [1] Scroll 1
- GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0200, 16 ) // [2] Scroll 2
- GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16, 0x0b00, 128 ) // [3] Sprites
- GFXDECODE_ENTRY( "gfx5", 0, road_layout, 0x0300, 64 ) // [4] Road 0
- GFXDECODE_ENTRY( "gfx6", 0, road_layout, 0x0700, 64 ) // [5] Road 1
+ GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [0] Scroll 0
+ GFXDECODE_ENTRY( "gfx2", 0, tiles_8x8, 0x0100, 16 ) // [1] Scroll 1
+ GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0200, 16 ) // [2] Scroll 2
+ GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16, 0x0b00, 128 ) // [3] Sprites
+ GFXDECODE_ENTRY( "gfx5", 0, road_layout, 0x0300, 64 ) // [4] Road 0
+ GFXDECODE_ENTRY( "gfx6", 0, road_layout, 0x0700, 64 ) // [5] Road 1
GFXDECODE_END
/**************************************************************************
@@ -1512,10 +1512,10 @@ GFXDECODE_END
**************************************************************************/
static GFXDECODE_START( scudhamm )
- GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [0] Scroll 0
- GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [1] UNUSED
- GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0100, 16 ) // [2] Scroll 2
- GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16_quad, 0x0200, 128 ) // [3] sprites
+ GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [0] Scroll 0
+ GFXDECODE_ENTRY( "gfx1", 0, tiles_8x8, 0x0000, 16 ) // [1] UNUSED
+ GFXDECODE_ENTRY( "gfx3", 0, tiles_8x8, 0x0100, 16 ) // [2] Scroll 2
+ GFXDECODE_ENTRY( "gfx4", 0, tiles_16x16_quad, 0x0200, 128 ) // [3] sprites
// No Road Layers
GFXDECODE_END
@@ -1549,8 +1549,8 @@ TIMER_DEVICE_CALLBACK_MEMBER(cischeat_state::bigrun_scanline)
-#define STD_FM_CLOCK 3000000
-#define STD_OKI_CLOCK (1584000)
+#define STD_FM_CLOCK 3000000
+#define STD_OKI_CLOCK (1584000)
@@ -1583,11 +1583,11 @@ static MACHINE_CONFIG_START( bigrun, cischeat_state )
MCFG_SCREEN_REFRESH_RATE(30) //TODO: wrong!
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
MCFG_SCREEN_SIZE(256, 256)
- MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0+16, 256-16-1)
+ MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0+16, 256-16-1)
MCFG_SCREEN_UPDATE_DRIVER(cischeat_state, screen_update_bigrun)
MCFG_GFXDECODE(bigrun)
- MCFG_PALETTE_LENGTH(16*16 * 3 + 64*16 * 2 + 64*16) /* scroll 0,1,2; road 0,1; sprites */
+ MCFG_PALETTE_LENGTH(16*16 * 3 + 64*16 * 2 + 64*16) /* scroll 0,1,2; road 0,1; sprites */
MCFG_VIDEO_START_OVERRIDE(cischeat_state,bigrun)
@@ -1625,11 +1625,11 @@ static MACHINE_CONFIG_DERIVED( cischeat, bigrun )
/* video hardware */
MCFG_SCREEN_MODIFY("screen")
- MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0+16, 256-16-8-1)
+ MCFG_SCREEN_VISIBLE_AREA(0, 256-1, 0+16, 256-16-8-1)
MCFG_SCREEN_UPDATE_DRIVER(cischeat_state, screen_update_cischeat)
MCFG_GFXDECODE(cischeat)
- MCFG_PALETTE_LENGTH(32*16 * 3 + 64*16 * 2 + 128*16) /* scroll 0,1,2; road 0,1; sprites */
+ MCFG_PALETTE_LENGTH(32*16 * 3 + 64*16 * 2 + 128*16) /* scroll 0,1,2; road 0,1; sprites */
MCFG_VIDEO_START_OVERRIDE(cischeat_state,cischeat)
MACHINE_CONFIG_END
@@ -1655,7 +1655,7 @@ static MACHINE_CONFIG_DERIVED( f1gpstar, bigrun )
/* video hardware */
MCFG_GFXDECODE(f1gpstar)
- MCFG_PALETTE_LENGTH(16*16 * 3 + 64*16 * 2 + 128*16) /* scroll 0,1,2; road 0,1; sprites */
+ MCFG_PALETTE_LENGTH(16*16 * 3 + 64*16 * 2 + 128*16) /* scroll 0,1,2; road 0,1; sprites */
MCFG_VIDEO_START_OVERRIDE(cischeat_state,f1gpstar)
MCFG_SCREEN_MODIFY("screen")
@@ -1783,8 +1783,8 @@ MACHINE_CONFIG_END
*/
static void cischeat_untangle_sprites(running_machine &machine, const char *region)
{
- UINT8 *src = machine.root_device().memregion(region)->base();
- const UINT8 *end = src + machine.root_device().memregion(region)->bytes();
+ UINT8 *src = machine.root_device().memregion(region)->base();
+ const UINT8 *end = src + machine.root_device().memregion(region)->bytes();
while (src < end)
{
@@ -1884,7 +1884,7 @@ ROM_START( bigrun )
ROM_LOAD16_BYTE( "br8953c.2", 0x000000, 0x020000, CRC(b690d8d9) SHA1(317c0b4e9bef30c84daf16765af66f5a6f9d1c54) )
ROM_LOAD16_BYTE( "br8953c.1", 0x000001, 0x020000, CRC(79fc7bc0) SHA1(edb6cf626f93417cdc9525627d85a0ca9bcd1b1c) )
- ROM_REGION16_BE( 0x40000, "user1", 0 ) /* second halves of program ROMs */
+ ROM_REGION16_BE( 0x40000, "user1", 0 ) /* second halves of program ROMs */
ROM_LOAD16_BYTE( "br8950b.3", 0x000000, 0x020000, CRC(864cebf7) SHA1(4e63106cd5832901688dfce2e450f536a6927c81) )
ROM_LOAD16_BYTE( "br8950b.4", 0x000001, 0x020000, CRC(702c2a6e) SHA1(cf3327919e24b7206d404b008cb00117e4308f94) )
@@ -1899,7 +1899,7 @@ ROM_START( bigrun )
ROM_REGION( 0x020000, "gfx3", 0 ) // scroll 2
ROM_LOAD( "br8950b.9", 0x000000, 0x020000, CRC(be0864c4) SHA1(e0f1c0f09b30a731f0e062b1acb1b3a3a772a5cc) )
- ROM_REGION( 0x280000, "gfx4", 0 ) /* sprites */
+ ROM_REGION( 0x280000, "gfx4", 0 ) /* sprites */
ROM_LOAD16_BYTE( "mr88004a.t41", 0x000000, 0x080000, CRC(c781d8c5) SHA1(52b23842a20443b51490d701dca72fb0a3118033) )
ROM_LOAD16_BYTE( "mr88004d.t43", 0x000001, 0x080000, CRC(e4041208) SHA1(f5bd21b42f627b01bca2324082aecee7852a37e6) )
ROM_LOAD16_BYTE( "mr88004b.t42", 0x100000, 0x080000, CRC(2df2e7b9) SHA1(5772e0dc2f842077ea70a558b55ec5ceea693f00) )
@@ -1916,28 +1916,28 @@ ROM_START( bigrun )
ROM_LOAD( "mb88004h.t46", 0x080000, 0x080000, CRC(6b31a1ba) SHA1(71a956f0f51a63bddedfef0febdc95108ed42226) )
/* t50 & t51: 40000-5ffff = 60000-7ffff */
- ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
ROM_LOAD( "mb88004l.t50", 0x000000, 0x020000, CRC(6b11fb10) SHA1(eb6e9614bb50b8fc332ada61882da484d34d727f) )
ROM_CONTINUE( 0x040000, 0x020000 )
ROM_CONTINUE( 0x020000, 0x020000 )
ROM_CONTINUE( 0x060000, 0x020000 )
- ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
ROM_LOAD( "mb88004m.t51", 0x000000, 0x020000, CRC(ee52f04d) SHA1(fc45bd1d3a7552433e40846c358573c6988127c3) )
ROM_CONTINUE( 0x040000, 0x020000 )
ROM_CONTINUE( 0x020000, 0x020000 )
ROM_CONTINUE( 0x060000, 0x020000 )
- ROM_REGION( 0x20000, "user2", 0 ) /* ? Unused ROMs ? */
- ROM_LOAD( "br8951b.21", 0x000000, 0x020000, CRC(59b9c26b) SHA1(09fea3b77b045d9c1ed62bf53efa8b5242a33a10) ) // x00xxxxxxxxxxxxx, mask=0001e0
- ROM_LOAD( "br8951b.22", 0x000000, 0x020000, CRC(c112a803) SHA1(224a2ed690b78caef266958a93524211ff4a8e70) ) // x00xxxxxxxxxxxxx
- ROM_LOAD( "br8951b.23", 0x000000, 0x010000, CRC(b9474fec) SHA1(f1f0eab014e8f52572484b83f56189e0ff6f2b0d) ) // 000xxxxxxxxxxxxx
+ ROM_REGION( 0x20000, "user2", 0 ) /* ? Unused ROMs ? */
+ ROM_LOAD( "br8951b.21", 0x000000, 0x020000, CRC(59b9c26b) SHA1(09fea3b77b045d9c1ed62bf53efa8b5242a33a10) ) // x00xxxxxxxxxxxxx, mask=0001e0
+ ROM_LOAD( "br8951b.22", 0x000000, 0x020000, CRC(c112a803) SHA1(224a2ed690b78caef266958a93524211ff4a8e70) ) // x00xxxxxxxxxxxxx
+ ROM_LOAD( "br8951b.23", 0x000000, 0x010000, CRC(b9474fec) SHA1(f1f0eab014e8f52572484b83f56189e0ff6f2b0d) ) // 000xxxxxxxxxxxxx
ROM_END
DRIVER_INIT_MEMBER(cischeat_state,bigrun)
{
- cischeat_untangle_sprites(machine(), "gfx4"); // Untangle sprites
- phantasm_rom_decode(machine(), "soundcpu"); // Decrypt sound cpu code
+ cischeat_untangle_sprites(machine(), "gfx4"); // Untangle sprites
+ phantasm_rom_decode(machine(), "soundcpu"); // Decrypt sound cpu code
}
@@ -2008,8 +2008,8 @@ ROM_START( cischeat )
ROM_LOAD16_BYTE( "ch9071.11", 0x000000, 0x020000, CRC(bc137bea) SHA1(ca6d781a617c797aec87e6ce0a002280aa62aebc) )
ROM_LOAD16_BYTE( "ch9071.10", 0x000001, 0x020000, CRC(bf7b634d) SHA1(29186c41a397df322cc2c40decd1c19963f89d36) )
- ROM_REGION16_BE( 0x100000, "user1", 0 ) /* second halves of program ROMs */
- ROM_LOAD16_BYTE( "ch9071.04", 0x000000, 0x040000, CRC(7fb48cbc) SHA1(7f0442ce37b39e830fe8bcb8230cf7da2103059d) ) // cpu #1
+ ROM_REGION16_BE( 0x100000, "user1", 0 ) /* second halves of program ROMs */
+ ROM_LOAD16_BYTE( "ch9071.04", 0x000000, 0x040000, CRC(7fb48cbc) SHA1(7f0442ce37b39e830fe8bcb8230cf7da2103059d) ) // cpu #1
ROM_LOAD16_BYTE( "ch9071.02", 0x000001, 0x040000, CRC(a5d0f4dc) SHA1(2e7aaa915e27ab31e38ca6759301ffe33a12b427) )
ROM_COPY( "cpu2", 0x40000, 0x80000, 0x40000 )
ROM_COPY( "cpu3", 0x40000, 0xc0000, 0x40000 )
@@ -2023,7 +2023,7 @@ ROM_START( cischeat )
ROM_REGION( 0x010000, "gfx3", 0 )
ROM_LOAD( "ch9071.07", 0x000000, 0x010000, CRC(3724ccc3) SHA1(3797ea49156362467ba948c51ac7b52610d1b9de) ) // scroll 2
- ROM_REGION( 0x400000, "gfx4", 0 ) /* sprites */
+ ROM_REGION( 0x400000, "gfx4", 0 ) /* sprites */
ROM_LOAD16_BYTE( "ch9072.r15", 0x000000, 0x080000, CRC(38af4aea) SHA1(ea27ab44b33776984adaa9b26d85165d6700a12c) )
ROM_LOAD16_BYTE( "ch9072.r16", 0x000001, 0x080000, CRC(71388dad) SHA1(0d2451e36cfbf7400ade849b4c8a1e8f56fc089c) )
ROM_LOAD16_BYTE( "ch9072.r17", 0x100000, 0x080000, CRC(9d052cf3) SHA1(d6bd30965316104cb03e62a69df61eb60eb84741) )
@@ -2041,13 +2041,13 @@ ROM_START( cischeat )
ROM_LOAD( "ch9073.r21", 0x000000, 0x080000, CRC(2943d2f6) SHA1(ae8a25c1d76d3c36aa326d0171acb7dce93c4d87) ) // Road
ROM_LOAD( "ch9073.r22", 0x080000, 0x080000, CRC(2dd44f85) SHA1(5f20f75e96e14389187d3471bc7f2ceb0758eec4) )
- ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
ROM_LOAD( "ch9071.r23", 0x000000, 0x080000, CRC(c7dbb992) SHA1(9fa802830947f4e5d41447b2ac9637daf1fd8193) ) // 2 x 0x40000
- ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
ROM_LOAD( "ch9071.r24", 0x000000, 0x080000, CRC(e87ca4d7) SHA1(b2a2edd701324640e438d1e84dd033ec212917b5) ) // 2 x 0x40000 (FIRST AND SECOND HALF IDENTICAL)
- ROM_REGION( 0x40000, "user2", 0 ) /* ? Unused ROMs ? */
+ ROM_REGION( 0x40000, "user2", 0 ) /* ? Unused ROMs ? */
ROM_LOAD( "ch9072.01", 0x000000, 0x020000, CRC(b2efed33) SHA1(3b347d4bc866aaa6cb53bd0991b4fb6a22e40a5c) ) // FIXED BITS (xxxxxxxx0xxxxxxx)
ROM_LOAD( "ch9072.02", 0x000000, 0x040000, CRC(536edde4) SHA1(45ebd2add357275177fcd7b6d9ea748c6756f1c0) )
ROM_LOAD( "ch9072.03", 0x000000, 0x040000, CRC(7e79151a) SHA1(5a305cff8600446be426641ce112208b379094b9) )
@@ -2055,8 +2055,8 @@ ROM_END
DRIVER_INIT_MEMBER(cischeat_state,cischeat)
{
- cischeat_untangle_sprites(machine(), "gfx4"); // Untangle sprites
- astyanax_rom_decode(machine(), "soundcpu"); // Decrypt sound cpu code
+ cischeat_untangle_sprites(machine(), "gfx4"); // Untangle sprites
+ astyanax_rom_decode(machine(), "soundcpu"); // Decrypt sound cpu code
}
@@ -2202,8 +2202,8 @@ ROM_START( f1gpstar )
ROM_LOAD16_BYTE( "9190a-2.v11", 0x000000, 0x020000, CRC(acb2fd80) SHA1(bbed505ce745490ae11df8efdd3633181cfd4dec) )
ROM_LOAD16_BYTE( "9190a-1.v11", 0x000001, 0x020000, CRC(7cccadaf) SHA1(d1b79fbd0e27e8d479ef533fa00b18d1f2982dda) )
- ROM_REGION16_BE( 0x80000, "user1", 0 ) /* second halves of program ROMs */
- ROM_LOAD16_BYTE( "9188a-26.v10", 0x000000, 0x040000, CRC(0b76673f) SHA1(cf29333ffb51250ae2d5363d612260f536cd15af) ) // cpu #1
+ ROM_REGION16_BE( 0x80000, "user1", 0 ) /* second halves of program ROMs */
+ ROM_LOAD16_BYTE( "9188a-26.v10", 0x000000, 0x040000, CRC(0b76673f) SHA1(cf29333ffb51250ae2d5363d612260f536cd15af) ) // cpu #1
ROM_LOAD16_BYTE( "9188a-21.v10", 0x000001, 0x040000, CRC(3e098d77) SHA1(0bf7e8ca36086a7ae3d44a10b4ca43f869403eb0) )
ROM_REGION( 0x080000, "gfx1", 0 )
@@ -2215,7 +2215,7 @@ ROM_START( f1gpstar )
ROM_REGION( 0x020000, "gfx3", 0 )
ROM_LOAD( "9188a-30.v10", 0x000000, 0x020000, CRC(0ef1fbf1) SHA1(28fa0b677e70833954a5fc2fdce233d0dec4f43c) ) // scroll 2
- ROM_REGION( 0x500000, "gfx4", 0 ) /* sprites */
+ ROM_REGION( 0x500000, "gfx4", 0 ) /* sprites */
ROM_LOAD16_BYTE( "90015-21.r46", 0x000000, 0x080000, CRC(6f30211f) SHA1(aedba39fc6aab7847a3a2314e152bc00615cbd72) )
ROM_LOAD16_BYTE( "90015-22.r47", 0x000001, 0x080000, CRC(05a9a5da) SHA1(807c43c3ee76bce8e4874fa51d2453917b1e4f3b) )
ROM_LOAD16_BYTE( "90015-23.r48", 0x100000, 0x080000, CRC(58e9c6d2) SHA1(b81208819dbc5887183855001c72d0d91d32fc4b) )
@@ -2237,34 +2237,34 @@ ROM_START( f1gpstar )
ROM_LOAD( "90015-09.w13", 0x000000, 0x080000, CRC(55f49315) SHA1(ad338cb53149ccea2dbe5ad890433c9f09a8211c) ) // Road 1
ROM_LOAD( "90015-10.w15", 0x080000, 0x080000, CRC(678be0cb) SHA1(3857b549170b62b29644cf5ebdd4aac1afa9e420) )
- ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
ROM_LOAD( "90015-34.w32", 0x000000, 0x080000, CRC(2ca9b062) SHA1(c01b8020b409d826c0ae69c153fdc5d89241771e) ) // 2 x 0x40000
- ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
ROM_LOAD( "90015-33.w31", 0x000000, 0x080000, CRC(6121d247) SHA1(213c7c45bc3d57c09778b1d58dbb5fe26d0b2477) ) // 2 x 0x40000
- ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
+ ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
// "I know that one of the ROM images in the archive looks bad (90015-04.W09)
// however, it is good as far as I can tell. There were two of those ROMs
// (soldered) onto the board and I checked them both against each other. "
- ROM_LOAD( "90015-04.w09", 0x000000, 0x080000, CRC(5b324c81) SHA1(ce61f2ea29086a74bdcf9f4df8e2edb749e41da5) ) // x 2 xxxxxxxxx0xxxxxxxxx = 0x00
- ROM_LOAD( "90015-03.w08", 0x000000, 0x080000, CRC(ccf5b158) SHA1(06250762646e0da1fb71fd7b638492eaab3f5b7f) ) // x 2 FIXED BITS (000x000x)
- ROM_LOAD( "90015-02.w07", 0x000000, 0x080000, CRC(fcbecc9b) SHA1(0670c276730ee282ef8c9599c00571b8d97725ab) ) // x 2
- ROM_LOAD( "90015-01.w06", 0x000000, 0x080000, CRC(ce4bfe6e) SHA1(d428eb3d5da3bd080957c585c5b72b94a7849fca) ) // x 2 FIXED BITS (000x000x)
+ ROM_LOAD( "90015-04.w09", 0x000000, 0x080000, CRC(5b324c81) SHA1(ce61f2ea29086a74bdcf9f4df8e2edb749e41da5) ) // x 2 xxxxxxxxx0xxxxxxxxx = 0x00
+ ROM_LOAD( "90015-03.w08", 0x000000, 0x080000, CRC(ccf5b158) SHA1(06250762646e0da1fb71fd7b638492eaab3f5b7f) ) // x 2 FIXED BITS (000x000x)
+ ROM_LOAD( "90015-02.w07", 0x000000, 0x080000, CRC(fcbecc9b) SHA1(0670c276730ee282ef8c9599c00571b8d97725ab) ) // x 2
+ ROM_LOAD( "90015-01.w06", 0x000000, 0x080000, CRC(ce4bfe6e) SHA1(d428eb3d5da3bd080957c585c5b72b94a7849fca) ) // x 2 FIXED BITS (000x000x)
ROM_LOAD( "90015-20.r45", 0x000000, 0x080000, CRC(9d428fb7) SHA1(02f72938d73db932bd217620a175a05215f6016a) ) // x 2
- ROM_LOAD( "ch9072-4", 0x000000, 0x001000, CRC(5bc23535) SHA1(2fd1b7184175c416b19e6570de7ecb0d897deb9a) ) // FIXED BITS (0000000x)
- ROM_LOAD( "ch9072-5", 0x000000, 0x001000, CRC(0efac5b4) SHA1(a3e945aaf142bb62e0e791b8ca49a34891f31077) ) // FIXED BITS (xxxx0xxx)
+ ROM_LOAD( "ch9072-4", 0x000000, 0x001000, CRC(5bc23535) SHA1(2fd1b7184175c416b19e6570de7ecb0d897deb9a) ) // FIXED BITS (0000000x)
+ ROM_LOAD( "ch9072-5", 0x000000, 0x001000, CRC(0efac5b4) SHA1(a3e945aaf142bb62e0e791b8ca49a34891f31077) ) // FIXED BITS (xxxx0xxx)
ROM_LOAD( "ch9072-6", 0x000000, 0x001000, CRC(76ff63c5) SHA1(652754533cc14773f4d7590a65183349eed9eb62) )
- ROM_LOAD( "ch9072-8", 0x000000, 0x001000, CRC(ca04bace) SHA1(3771ef4bf7983e97e3346309fcb0271e17a6d359) ) // FIXED BITS (0xxx0xxx)
+ ROM_LOAD( "ch9072-8", 0x000000, 0x001000, CRC(ca04bace) SHA1(3771ef4bf7983e97e3346309fcb0271e17a6d359) ) // FIXED BITS (0xxx0xxx)
- ROM_LOAD( "pr88004q", 0x000000, 0x000200, CRC(9327dc37) SHA1(cfe7b144cdcd76170d47f1c4e0f72b6d4fca0c8d) ) // FIXED BITS (1xxxxxxx1111x1xx)
- ROM_LOAD( "pr88004w", 0x000000, 0x000100, CRC(3d648467) SHA1(bf8dbaa2176c801f7370313425c87f0eefe8a3a4) ) // FIXED BITS (00xxxxxx)
+ ROM_LOAD( "pr88004q", 0x000000, 0x000200, CRC(9327dc37) SHA1(cfe7b144cdcd76170d47f1c4e0f72b6d4fca0c8d) ) // FIXED BITS (1xxxxxxx1111x1xx)
+ ROM_LOAD( "pr88004w", 0x000000, 0x000100, CRC(3d648467) SHA1(bf8dbaa2176c801f7370313425c87f0eefe8a3a4) ) // FIXED BITS (00xxxxxx)
- ROM_LOAD( "pr90015a", 0x000000, 0x000800, CRC(777583db) SHA1(8fd060a68fbb6156feb55afcfc5afd95999a8a62) ) // FIXED BITS (00000xxx0000xxxx)
- ROM_LOAD( "pr90015b", 0x000000, 0x000100, CRC(be240dac) SHA1(6203b73c1a5e09e525380a78b555c3818929d5eb) ) // FIXED BITS (000xxxxx000xxxx1)
+ ROM_LOAD( "pr90015a", 0x000000, 0x000800, CRC(777583db) SHA1(8fd060a68fbb6156feb55afcfc5afd95999a8a62) ) // FIXED BITS (00000xxx0000xxxx)
+ ROM_LOAD( "pr90015b", 0x000000, 0x000100, CRC(be240dac) SHA1(6203b73c1a5e09e525380a78b555c3818929d5eb) ) // FIXED BITS (000xxxxx000xxxx1)
ROM_END
DRIVER_INIT_MEMBER(cischeat_state,f1gpstar)
@@ -2417,7 +2417,7 @@ ROM_START( wildplt )
ROM_LOAD16_BYTE( "wp-92116_5_ver1-0.bin", 0x000000, 0x20000, CRC(8952e07c) SHA1(9025954c09c20dfe910a83283cfe010a5e898f38) )
ROM_LOAD16_BYTE( "wp-92116_6_ver1-0.bin", 0x000001, 0x20000, CRC(2c8108c2) SHA1(759ab884a09669c8cb532f72aa14a3df2806c5f2) )
- ROM_REGION16_BE( 0x80000, "user1", 0 ) /* second halves of program ROMs */
+ ROM_REGION16_BE( 0x80000, "user1", 0 ) /* second halves of program ROMs */
ROM_LOAD16_BYTE( "gp-9188a_26_ver1-0.bin", 0x000000, 0x40000, CRC(bc48db69) SHA1(d66fa43347b991b899e086bfcf9ceb6277b859a9) )
ROM_LOAD16_BYTE( "gp-9188a_21_ver1-0.bin", 0x000001, 0x40000, CRC(c3192fbe) SHA1(c4a82a9174f6dc48946925ab94f81162632f58b0) )
@@ -2430,7 +2430,7 @@ ROM_START( wildplt )
ROM_REGION( 0x020000, "gfx3", 0 )
ROM_LOAD( "gp-9188a_30_ver1-0.bin", 0x000000, 0x20000, CRC(35478ed9) SHA1(4090ad8c529c1295799a0fe6d7b05d68ec2cf584) )
- ROM_REGION( 0x500000, "gfx4", 0 ) /* sprites */
+ ROM_REGION( 0x500000, "gfx4", 0 ) /* sprites */
ROM_LOAD16_BYTE( "mr92020-11_w65.bin", 0x000000, 0x80000, CRC(585448cb) SHA1(578d241b928cc5b531c63b118fd1e7f1b864d5f3) )
ROM_LOAD16_BYTE( "mr92020-12_w66.bin", 0x000001, 0x80000, CRC(07104f78) SHA1(757fa1e0722533f42f12c7e030a283b7e90fc225) )
ROM_LOAD16_BYTE( "mr92020-13_w67.bin", 0x100000, 0x80000, CRC(c4afa3dc) SHA1(deda215a72914c61d500fee82e108997990d4057) )
@@ -2454,13 +2454,13 @@ ROM_START( wildplt )
ROM_LOAD( "mr92020-02_c53.bin", 0x100000, 0x80000, CRC(da961dd4) SHA1(fa36ee94d0a40a0e6e7201df2b74413f23e02ae0) )
ROM_LOAD( "mr92020-01_c46.bin", 0x180000, 0x80000, CRC(f908c6e0) SHA1(40c50a01b8b3fb184b8fa9824f95652399d479e2) )
- ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
ROM_LOAD( "wp-92116_2_ver1-0.bin", 0x000000, 0x80000, CRC(95237bd0) SHA1(45780d587565edf8ee0b6443bdc44db72fe65a86) )
- ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
ROM_LOAD( "wp-92116_1_ver1-0.bin", 0x000000, 0x80000, CRC(559bafc3) SHA1(612fa66b02e72a93ea5e89b40426b6ffb2a2a373) )
- ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
+ ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
ROM_LOAD( "ch9072_4.bin", 0x000000, 0x2000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) )
ROM_LOAD( "ch9072_5.bin", 0x000000, 0x2000, CRC(e122916b) SHA1(86d5ecc7ecc6f175ecb28459697ef33e1ee06860) )
ROM_LOAD( "ch9072_6.bin", 0x000000, 0x2000, CRC(05d95bf7) SHA1(78181cf71f22c090a1e62823a43757353a9ef6ab) )
@@ -2632,8 +2632,8 @@ ROM_START( f1gpstr2 )
ROM_LOAD16_BYTE( "92116-5.116", 0x000000, 0x040000, CRC(da16db49) SHA1(a07fb706b0c93a83148a9fdaaca1bc5414bfe286) )
ROM_LOAD16_BYTE( "92116-6.117", 0x000001, 0x040000, CRC(1f1e147a) SHA1(ebedcdad9cfda8fa3b5c2653232209da5be237e1) )
- ROM_REGION16_BE( 0x80000, "user1", 0 ) /* second halves of program ROMs */
- ROM_LOAD16_BYTE( "9188a-26.124", 0x000000, 0x040000, CRC(8690bb79) SHA1(8ef822cf8371cb209c30cfe5c4d5e8b36392f732) ) // cpu1
+ ROM_REGION16_BE( 0x80000, "user1", 0 ) /* second halves of program ROMs */
+ ROM_LOAD16_BYTE( "9188a-26.124", 0x000000, 0x040000, CRC(8690bb79) SHA1(8ef822cf8371cb209c30cfe5c4d5e8b36392f732) ) // cpu1
ROM_LOAD16_BYTE( "9188a-21.91", 0x000001, 0x040000, CRC(c5a5807e) SHA1(15493030d154579d2095c7304dd843aed09a69ec) )
ROM_REGION( 0x080000, "gfx1", 0 )
@@ -2645,7 +2645,7 @@ ROM_START( f1gpstr2 )
ROM_REGION( 0x020000, "gfx3", 0 )
ROM_LOAD( "9188a-30.174", 0x000000, 0x020000, CRC(c5906023) SHA1(6006c86995abef1442232ff5fbd68c2a37038d1f) ) // scroll 2
- ROM_REGION( 0x600000, "gfx4", 0 ) /* sprites */
+ ROM_REGION( 0x600000, "gfx4", 0 ) /* sprites */
ROM_LOAD16_BYTE( "92021-11.1", 0x000000, 0x100000, CRC(fec883a7) SHA1(a17ca17fa37b35c5f28cede52efa91afe566a95a) )
ROM_LOAD16_BYTE( "92021-12.2", 0x000001, 0x100000, CRC(df283a7e) SHA1(4e9eed9475186e6f94d9ef84a798fa807fb37903) )
ROM_LOAD16_BYTE( "92021-13.11", 0x200000, 0x100000, CRC(1ceb593a) SHA1(e8428c42d10aa0d26717176b1bdea9a4a1d3e5f3) )
@@ -2665,35 +2665,35 @@ ROM_START( f1gpstr2 )
ROM_LOAD( "92021-02.15", 0x100000, 0x080000, CRC(d0582ad8) SHA1(b343a6525bb9d7dbb288ddec392b23e85ae150bb) )
ROM_LOAD( "92021-01.14", 0x180000, 0x080000, CRC(06e50be4) SHA1(60ced74d97ac5f641b7e721484abbe74522fe3ba) )
- ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki1", 0 ) /* samples */
ROM_LOAD( "92116-2.18", 0x000000, 0x080000, CRC(8c06cded) SHA1(789d620dddfebc1343d424fccd03dd51b58c50fa) )
- ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* samples */
ROM_LOAD( "92116-1.4", 0x000000, 0x080000, CRC(8da37b9d) SHA1(ffc67901d087e63bfbb36d15d75c57f6847ef6ea) )
- ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
- ROM_LOAD( "90015-04.17", 0x000000, 0x080000, CRC(5b324c81) SHA1(ce61f2ea29086a74bdcf9f4df8e2edb749e41da5) ) // x 2 xxxxxxxxx0xxxxxxxxx = 0x00
- ROM_LOAD( "90015-04.82", 0x000000, 0x080000, CRC(5b324c81) SHA1(ce61f2ea29086a74bdcf9f4df8e2edb749e41da5) ) //
- ROM_LOAD( "90015-03.16", 0x000000, 0x080000, CRC(ccf5b158) SHA1(06250762646e0da1fb71fd7b638492eaab3f5b7f) ) // x 2 FIXED BITS (000x000x)
- ROM_LOAD( "90015-03.81", 0x000000, 0x080000, CRC(ccf5b158) SHA1(06250762646e0da1fb71fd7b638492eaab3f5b7f) ) //
- ROM_LOAD( "90015-02.15", 0x000000, 0x080000, CRC(fcbecc9b) SHA1(0670c276730ee282ef8c9599c00571b8d97725ab) ) // x 2
- ROM_LOAD( "90015-02.80", 0x000000, 0x080000, CRC(fcbecc9b) SHA1(0670c276730ee282ef8c9599c00571b8d97725ab) ) //
- ROM_LOAD( "90015-01.14", 0x000000, 0x080000, CRC(ce4bfe6e) SHA1(d428eb3d5da3bd080957c585c5b72b94a7849fca) ) // x 2 FIXED BITS (000x000x)
- ROM_LOAD( "90015-01.79", 0x000000, 0x080000, CRC(ce4bfe6e) SHA1(d428eb3d5da3bd080957c585c5b72b94a7849fca) ) //
+ ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
+ ROM_LOAD( "90015-04.17", 0x000000, 0x080000, CRC(5b324c81) SHA1(ce61f2ea29086a74bdcf9f4df8e2edb749e41da5) ) // x 2 xxxxxxxxx0xxxxxxxxx = 0x00
+ ROM_LOAD( "90015-04.82", 0x000000, 0x080000, CRC(5b324c81) SHA1(ce61f2ea29086a74bdcf9f4df8e2edb749e41da5) ) //
+ ROM_LOAD( "90015-03.16", 0x000000, 0x080000, CRC(ccf5b158) SHA1(06250762646e0da1fb71fd7b638492eaab3f5b7f) ) // x 2 FIXED BITS (000x000x)
+ ROM_LOAD( "90015-03.81", 0x000000, 0x080000, CRC(ccf5b158) SHA1(06250762646e0da1fb71fd7b638492eaab3f5b7f) ) //
+ ROM_LOAD( "90015-02.15", 0x000000, 0x080000, CRC(fcbecc9b) SHA1(0670c276730ee282ef8c9599c00571b8d97725ab) ) // x 2
+ ROM_LOAD( "90015-02.80", 0x000000, 0x080000, CRC(fcbecc9b) SHA1(0670c276730ee282ef8c9599c00571b8d97725ab) ) //
+ ROM_LOAD( "90015-01.14", 0x000000, 0x080000, CRC(ce4bfe6e) SHA1(d428eb3d5da3bd080957c585c5b72b94a7849fca) ) // x 2 FIXED BITS (000x000x)
+ ROM_LOAD( "90015-01.79", 0x000000, 0x080000, CRC(ce4bfe6e) SHA1(d428eb3d5da3bd080957c585c5b72b94a7849fca) ) //
ROM_LOAD( "90015-35.54", 0x000000, 0x080000, CRC(9d428fb7) SHA1(02f72938d73db932bd217620a175a05215f6016a) ) // x 2
ROM_LOAD( "90015-35.67", 0x000000, 0x080000, CRC(9d428fb7) SHA1(02f72938d73db932bd217620a175a05215f6016a) ) //
- ROM_LOAD( "ch9072_4.39", 0x000000, 0x002000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) ) // FIXED BITS (0000000x)
- ROM_LOAD( "ch9072_5.33", 0x000000, 0x002000, CRC(e122916b) SHA1(86d5ecc7ecc6f175ecb28459697ef33e1ee06860) ) // FIXED BITS (xxxx0xxx)
+ ROM_LOAD( "ch9072_4.39", 0x000000, 0x002000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) ) // FIXED BITS (0000000x)
+ ROM_LOAD( "ch9072_5.33", 0x000000, 0x002000, CRC(e122916b) SHA1(86d5ecc7ecc6f175ecb28459697ef33e1ee06860) ) // FIXED BITS (xxxx0xxx)
ROM_LOAD( "ch9072_6.35", 0x000000, 0x002000, CRC(05d95bf7) SHA1(78181cf71f22c090a1e62823a43757353a9ef6ab) )
- ROM_LOAD( "ch9072_8.59", 0x000000, 0x002000, CRC(6bf52596) SHA1(bf4e7e7df3daae4aa6a441b58b15a435aa45630e) ) // FIXED BITS (0xxx0xxx)
+ ROM_LOAD( "ch9072_8.59", 0x000000, 0x002000, CRC(6bf52596) SHA1(bf4e7e7df3daae4aa6a441b58b15a435aa45630e) ) // FIXED BITS (0xxx0xxx)
- ROM_LOAD( "pr88004q.105", 0x000000, 0x000200, CRC(9327dc37) SHA1(cfe7b144cdcd76170d47f1c4e0f72b6d4fca0c8d) ) // FIXED BITS (1xxxxxxx1111x1xx)
- ROM_LOAD( "pr88004w.66", 0x000000, 0x000100, CRC(3d648467) SHA1(bf8dbaa2176c801f7370313425c87f0eefe8a3a4) ) // FIXED BITS (00xxxxxx)
+ ROM_LOAD( "pr88004q.105", 0x000000, 0x000200, CRC(9327dc37) SHA1(cfe7b144cdcd76170d47f1c4e0f72b6d4fca0c8d) ) // FIXED BITS (1xxxxxxx1111x1xx)
+ ROM_LOAD( "pr88004w.66", 0x000000, 0x000100, CRC(3d648467) SHA1(bf8dbaa2176c801f7370313425c87f0eefe8a3a4) ) // FIXED BITS (00xxxxxx)
- ROM_LOAD( "pr90015a.117", 0x000000, 0x000800, CRC(777583db) SHA1(8fd060a68fbb6156feb55afcfc5afd95999a8a62) ) // FIXED BITS (00000xxx0000xxxx)
- ROM_LOAD( "pr90015b.153", 0x000000, 0x000100, CRC(be240dac) SHA1(6203b73c1a5e09e525380a78b555c3818929d5eb) ) // FIXED BITS (000xxxxx000xxxx1)
+ ROM_LOAD( "pr90015a.117", 0x000000, 0x000800, CRC(777583db) SHA1(8fd060a68fbb6156feb55afcfc5afd95999a8a62) ) // FIXED BITS (00000xxx0000xxxx)
+ ROM_LOAD( "pr90015b.153", 0x000000, 0x000100, CRC(be240dac) SHA1(6203b73c1a5e09e525380a78b555c3818929d5eb) ) // FIXED BITS (000xxxxx000xxxx1)
ROM_END
@@ -2731,7 +2731,7 @@ GP-9189:
***************************************************************************/
ROM_START( scudhamm )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */
ROM_LOAD16_BYTE( "3", 0x000000, 0x040000, CRC(a908e7bd) SHA1(be0a8f959ab5c19122eee6c3def6137f37f1a9c6) )
ROM_LOAD16_BYTE( "4", 0x000001, 0x040000, CRC(981c8b02) SHA1(db6c8993bf1c3993ab31dd649022ab76169975e1) )
@@ -2756,13 +2756,13 @@ ROM_START( scudhamm )
ROM_LOAD16_BYTE( "9.bot", 0x400000, 0x080000, CRC(c1b301f1) SHA1(776b9889703d73afc4fb0ff77498b98c943246d3) )
ROM_LOAD16_BYTE( "10.bot", 0x400001, 0x080000, CRC(dab4528f) SHA1(f5ddc37a2d106d5438ad1b7d23a2bbbce07f2c89) )
- ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (4x40000) */
+ ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (4x40000) */
ROM_LOAD( "2.l", 0x000000, 0x080000, CRC(889311da) SHA1(fcaee3e6c98a784cfde06fc2e0e8f5abbfb4df6c) )
ROM_LOAD( "2.h", 0x080000, 0x080000, CRC(347928fc) SHA1(36903c38b9f13594de40dfc697326327c7010d65) )
- ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (4x40000) */
+ ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (4x40000) */
ROM_LOAD( "1.l", 0x000000, 0x080000, CRC(3c94aa90) SHA1(f9278fec9d93dac0309f30e35c727bd481f347d4) )
- ROM_LOAD( "1.h", 0x080000, 0x080000, CRC(5caee787) SHA1(267f4d3c28e71e53180a5d0ff27a6555ac6fa4a0) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF
+ ROM_LOAD( "1.h", 0x080000, 0x080000, CRC(5caee787) SHA1(267f4d3c28e71e53180a5d0ff27a6555ac6fa4a0) ) // 1xxxxxxxxxxxxxxxxxx = 0xFF
ROM_END
@@ -2903,7 +2903,7 @@ Notes:
***************************************************************************/
ROM_START( armchmp2 )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */
ROM_LOAD16_BYTE( "ac-91106v2.6_4.ic63", 0x000000, 0x020000, CRC(e0cec032) SHA1(743b022b6de3efb045c4f1cca49caed0259ccfff) )
ROM_LOAD16_BYTE( "ac-91106v2.6_3.ic62", 0x000001, 0x020000, CRC(5de6da19) SHA1(1f46056596924789394ad2d99ec2d7fcb7845d3c) )
@@ -2924,15 +2924,15 @@ ROM_START( armchmp2 )
ROM_LOAD16_BYTE( "mr91042-05-r64_5.ic11", 0x200000, 0x080000, CRC(7a3bb52d) SHA1(7f9d1dad4c89e6b55415b082363bc261115e9f96) )
ROM_LOAD16_BYTE( "mr91042-06-r65_6.ic12", 0x200001, 0x080000, CRC(5312a4f2) SHA1(4dcd2839bb5acccecf1eb6c0e19e877a0cff6875) )
- ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (4x40000) */
+ ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (4x40000) */
ROM_LOAD( "mr91042-08_2.ic57", 0x000000, 0x080000, CRC(dc015f6c) SHA1(9d0677c50a25be1d11d43e54dbf3005f18b79b66) )
ROM_RELOAD( 0x080000, 0x080000 )
- ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (4x40000) */
+ ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (4x40000) */
ROM_LOAD( "ac-91106v2.0_1.ic56", 0x000000, 0x080000, CRC(0ff5cbcf) SHA1(25ef8d67749ca78afc4c13a31b3f7a87284947c1) )
ROM_RELOAD( 0x080000, 0x080000 )
- ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
+ ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
ROM_LOAD( "ch9072-4_13.ic39", 0x000000, 0x002000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) )
ROM_LOAD( "ch9072-5_11.ic33", 0x000000, 0x002000, CRC(e122916b) SHA1(86d5ecc7ecc6f175ecb28459697ef33e1ee06860) )
ROM_LOAD( "ch9072-6_12.ic35", 0x000000, 0x002000, CRC(05d95bf7) SHA1(78181cf71f22c090a1e62823a43757353a9ef6ab) )
@@ -2948,7 +2948,7 @@ ROM_START( armchmp2 )
ROM_END
ROM_START( armchmp2o )
- ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */
+ ROM_REGION( 0x080000, "maincpu", 0 ) /* Main CPU Code */
ROM_LOAD16_BYTE( "ac91106_ver1.7_4.ic63", 0x000000, 0x020000, CRC(aaa11bc7) SHA1(ac6186f45a006074d3a86d7437c5a3411bf27188) )
ROM_LOAD16_BYTE( "ac91106_ver1.7_3.ic62", 0x000001, 0x020000, CRC(a7965879) SHA1(556fecd6ea0f977b718d132c4180bb2160b9da7e) )
@@ -2969,15 +2969,15 @@ ROM_START( armchmp2o )
ROM_LOAD16_BYTE( "mr91042-05-r64_5.ic11", 0x200000, 0x080000, CRC(7a3bb52d) SHA1(7f9d1dad4c89e6b55415b082363bc261115e9f96) )
ROM_LOAD16_BYTE( "mr91042-06-r65_6.ic12", 0x200001, 0x080000, CRC(5312a4f2) SHA1(4dcd2839bb5acccecf1eb6c0e19e877a0cff6875) )
- ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (4x40000) */
+ ROM_REGION( 0x100000, "oki1", 0 ) /* Samples (4x40000) */
ROM_LOAD( "mr91042-08_2.ic57", 0x000000, 0x080000, CRC(dc015f6c) SHA1(9d0677c50a25be1d11d43e54dbf3005f18b79b66) )
ROM_RELOAD( 0x080000, 0x080000 )
- ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (4x40000) */
+ ROM_REGION( 0x100000, "oki2", 0 ) /* Samples (4x40000) */
ROM_LOAD( "ac91106_ver1.2_1.ic56", 0x000000, 0x080000, CRC(48208b69) SHA1(5dfcc7744f7cdd0326886a4a841755ab6ec5482b) )
ROM_RELOAD( 0x080000, 0x080000 )
- ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
+ ROM_REGION( 0x80000, "user2", 0 ) /* ? Unused ROMs ? */
ROM_LOAD( "ch9072-4_13.ic39", 0x000000, 0x002000, CRC(b45b4dc0) SHA1(b9fae0c9ac2d40f0a202c538d866d5f2941ba8dd) )
ROM_LOAD( "ch9072-5_11.ic33", 0x000000, 0x002000, CRC(e122916b) SHA1(86d5ecc7ecc6f175ecb28459697ef33e1ee06860) )
ROM_LOAD( "ch9072-6_12.ic35", 0x000000, 0x002000, CRC(05d95bf7) SHA1(78181cf71f22c090a1e62823a43757353a9ef6ab) )
@@ -3000,7 +3000,7 @@ ROM_END
***************************************************************************/
-GAMEL( 1989, bigrun, 0, bigrun, bigrun, cischeat_state, bigrun, ROT0, "Jaleco", "Big Run (11th Rallye version)", GAME_IMPERFECT_GRAPHICS, layout_cischeat ) // there's a 13th Rallye version (1991)
+GAMEL( 1989, bigrun, 0, bigrun, bigrun, cischeat_state, bigrun, ROT0, "Jaleco", "Big Run (11th Rallye version)", GAME_IMPERFECT_GRAPHICS, layout_cischeat ) // there's a 13th Rallye version (1991)
GAMEL( 1990, cischeat, 0, cischeat, cischeat, cischeat_state, cischeat, ROT0, "Jaleco", "Cisco Heat", GAME_IMPERFECT_GRAPHICS, layout_cischeat )
GAMEL( 1991, f1gpstar, 0, f1gpstar, f1gpstar, cischeat_state, f1gpstar, ROT0, "Jaleco", "Grand Prix Star", GAME_IMPERFECT_GRAPHICS, layout_f1gpstar )
GAME ( 1992, armchmp2, 0, armchmp2, armchmp2, driver_device, 0, ROT270, "Jaleco", "Arm Champs II v2.6", GAME_IMPERFECT_GRAPHICS )
diff --git a/src/mame/drivers/citycon.c b/src/mame/drivers/citycon.c
index 3f9b39a85d6..dadc980efc2 100644
--- a/src/mame/drivers/citycon.c
+++ b/src/mame/drivers/citycon.c
@@ -32,7 +32,7 @@ static ADDRESS_MAP_START( citycon_map, AS_PROGRAM, 8, citycon_state )
AM_RANGE(0x2000, 0x20ff) AM_RAM_WRITE(citycon_linecolor_w) AM_SHARE("linecolor")
AM_RANGE(0x2800, 0x28ff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x2800, 0x2fff) AM_NOP //0x2900-0x2fff cleared at post but unused
- AM_RANGE(0x3000, 0x3000) AM_READ(citycon_in_r) AM_WRITE(citycon_background_w) /* player 1 & 2 inputs multiplexed */
+ AM_RANGE(0x3000, 0x3000) AM_READ(citycon_in_r) AM_WRITE(citycon_background_w) /* player 1 & 2 inputs multiplexed */
AM_RANGE(0x3001, 0x3001) AM_READ_PORT("DSW1") AM_WRITE(soundlatch_byte_w)
AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW2") AM_WRITE(soundlatch2_byte_w)
AM_RANGE(0x3004, 0x3005) AM_READNOP AM_WRITEONLY AM_SHARE("scroll")
@@ -128,34 +128,34 @@ static const gfx_layout charlayout =
static const gfx_layout tilelayout =
{
- 8,8, /* 8*8 characters */
- 256, /* 256 characters */
- 4, /* 4 bits per pixel */
+ 8,8, /* 8*8 characters */
+ 256, /* 256 characters */
+ 4, /* 4 bits per pixel */
{ 4, 0, 0xc000*8+4, 0xc000*8+0 },
{ 0, 1, 2, 3, 256*8*8+0, 256*8*8+1, 256*8*8+2, 256*8*8+3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout spritelayout =
{
- 8,16, /* 8*16 sprites */
- 128, /* 128 sprites */
- 4, /* 4 bits per pixel */
+ 8,16, /* 8*16 sprites */
+ 128, /* 128 sprites */
+ 4, /* 4 bits per pixel */
{ 4, 0, 0x2000*8+4, 0x2000*8+0 },
{ 0, 1, 2, 3, 128*16*8+0, 128*16*8+1, 128*16*8+2, 128*16*8+3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
- 16*8 /* every sprite takes 16 consecutive bytes */
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 16*8 /* every sprite takes 16 consecutive bytes */
};
static GFXDECODE_START( citycon )
// GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 512, 32 ) /* colors 512-639 */
- GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 640, 32 ) /* colors 512-639 */
- GFXDECODE_ENTRY( "gfx2", 0x00000, spritelayout, 0, 16 ) /* colors 0-255 */
+ GFXDECODE_ENTRY( "gfx1", 0x00000, charlayout, 640, 32 ) /* colors 512-639 */
+ GFXDECODE_ENTRY( "gfx2", 0x00000, spritelayout, 0, 16 ) /* colors 0-255 */
GFXDECODE_ENTRY( "gfx2", 0x01000, spritelayout, 0, 16 )
- GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 256, 16 ) /* colors 256-511 */
+ GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 256, 16 ) /* colors 256-511 */
GFXDECODE_ENTRY( "gfx3", 0x01000, tilelayout, 256, 16 )
GFXDECODE_ENTRY( "gfx3", 0x02000, tilelayout, 256, 16 )
GFXDECODE_ENTRY( "gfx3", 0x03000, tilelayout, 256, 16 )
@@ -222,7 +222,7 @@ static MACHINE_CONFIG_START( citycon, citycon_state )
MCFG_SCREEN_UPDATE_DRIVER(citycon_state, screen_update_citycon)
MCFG_GFXDECODE(citycon)
- MCFG_PALETTE_LENGTH(640+1024) /* 640 real palette + 1024 virtual palette */
+ MCFG_PALETTE_LENGTH(640+1024) /* 640 real palette + 1024 virtual palette */
MCFG_PALETTE_INIT(all_black) /* guess */
@@ -257,22 +257,22 @@ ROM_START( citycon )
ROM_LOAD( "c1", 0x8000, 0x8000, CRC(1fad7589) SHA1(2e626bbbab8cffe11ee7de3e56aa1871c29d5fa9) )
ROM_REGION( 0x03000, "gfx1", 0 )
- ROM_LOAD( "c4", 0x00000, 0x2000, CRC(a6b32fc6) SHA1(d99d5a527440e9a91525c1084b95b213e3b760ec) ) /* Characters */
+ ROM_LOAD( "c4", 0x00000, 0x2000, CRC(a6b32fc6) SHA1(d99d5a527440e9a91525c1084b95b213e3b760ec) ) /* Characters */
ROM_REGION( 0x04000, "gfx2", 0 )
- ROM_LOAD( "c12", 0x00000, 0x2000, CRC(08eaaccd) SHA1(a970381e3ba22bcdea6df2d31cd8a10c4b2bc413) ) /* Sprites */
+ ROM_LOAD( "c12", 0x00000, 0x2000, CRC(08eaaccd) SHA1(a970381e3ba22bcdea6df2d31cd8a10c4b2bc413) ) /* Sprites */
ROM_LOAD( "c13", 0x02000, 0x2000, CRC(1819aafb) SHA1(8a5ffcd8866e09c5568879257384767d61796111) )
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "c9", 0x00000, 0x8000, CRC(8aeb47e6) SHA1(bb09dbe6b37e1bd02abf3024ac4d954c8f0e70f2) ) /* Background tiles */
+ ROM_LOAD( "c9", 0x00000, 0x8000, CRC(8aeb47e6) SHA1(bb09dbe6b37e1bd02abf3024ac4d954c8f0e70f2) ) /* Background tiles */
ROM_LOAD( "c8", 0x08000, 0x4000, CRC(0d7a1eeb) SHA1(60b8d4124ce857a248d3c41fdb050f11be58549f) )
ROM_LOAD( "c6", 0x0c000, 0x8000, CRC(2246fe9d) SHA1(f7f8708d499bcbd1a583e1092b54425ad1105f94) )
ROM_LOAD( "c7", 0x14000, 0x4000, CRC(e8b97de9) SHA1(f4d1b7075f47ab4522c36281b97eaa02fe383814) )
- ROM_REGION( 0xe000, "gfx4", 0 ) /* background tilemaps */
- ROM_LOAD( "c2", 0x0000, 0x8000, CRC(f2da4f23) SHA1(5ea1a51c3ac283796f7eafb6719d88356767340d) ) /* background maps */
+ ROM_REGION( 0xe000, "gfx4", 0 ) /* background tilemaps */
+ ROM_LOAD( "c2", 0x0000, 0x8000, CRC(f2da4f23) SHA1(5ea1a51c3ac283796f7eafb6719d88356767340d) ) /* background maps */
ROM_LOAD( "c3", 0x8000, 0x4000, CRC(7ef3ac1b) SHA1(8a0497c4e4733f9c50d576f632210b82497a5e1c) )
- ROM_LOAD( "c5", 0xc000, 0x2000, CRC(c03d8b1b) SHA1(641c1eba334d36ea64b9293a20320b31c7c88858) ) /* color codes for the background */
+ ROM_LOAD( "c5", 0xc000, 0x2000, CRC(c03d8b1b) SHA1(641c1eba334d36ea64b9293a20320b31c7c88858) ) /* color codes for the background */
ROM_END
ROM_START( citycona )
@@ -284,22 +284,22 @@ ROM_START( citycona )
ROM_LOAD( "c1", 0x8000, 0x8000, CRC(1fad7589) SHA1(2e626bbbab8cffe11ee7de3e56aa1871c29d5fa9) )
ROM_REGION( 0x03000, "gfx1", 0 )
- ROM_LOAD( "c4", 0x00000, 0x2000, CRC(a6b32fc6) SHA1(d99d5a527440e9a91525c1084b95b213e3b760ec) ) /* Characters */
+ ROM_LOAD( "c4", 0x00000, 0x2000, CRC(a6b32fc6) SHA1(d99d5a527440e9a91525c1084b95b213e3b760ec) ) /* Characters */
ROM_REGION( 0x04000, "gfx2", 0 )
- ROM_LOAD( "c12", 0x00000, 0x2000, CRC(08eaaccd) SHA1(a970381e3ba22bcdea6df2d31cd8a10c4b2bc413) ) /* Sprites */
+ ROM_LOAD( "c12", 0x00000, 0x2000, CRC(08eaaccd) SHA1(a970381e3ba22bcdea6df2d31cd8a10c4b2bc413) ) /* Sprites */
ROM_LOAD( "c13", 0x02000, 0x2000, CRC(1819aafb) SHA1(8a5ffcd8866e09c5568879257384767d61796111) )
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "c9", 0x00000, 0x8000, CRC(8aeb47e6) SHA1(bb09dbe6b37e1bd02abf3024ac4d954c8f0e70f2) ) /* Background tiles */
+ ROM_LOAD( "c9", 0x00000, 0x8000, CRC(8aeb47e6) SHA1(bb09dbe6b37e1bd02abf3024ac4d954c8f0e70f2) ) /* Background tiles */
ROM_LOAD( "c8", 0x08000, 0x4000, CRC(0d7a1eeb) SHA1(60b8d4124ce857a248d3c41fdb050f11be58549f) )
ROM_LOAD( "c6", 0x0c000, 0x8000, CRC(2246fe9d) SHA1(f7f8708d499bcbd1a583e1092b54425ad1105f94) )
ROM_LOAD( "c7", 0x14000, 0x4000, CRC(e8b97de9) SHA1(f4d1b7075f47ab4522c36281b97eaa02fe383814) )
- ROM_REGION( 0xe000, "gfx4", 0 ) /* background tilemaps */
- ROM_LOAD( "c2", 0x0000, 0x8000, CRC(f2da4f23) SHA1(5ea1a51c3ac283796f7eafb6719d88356767340d) ) /* background maps */
+ ROM_REGION( 0xe000, "gfx4", 0 ) /* background tilemaps */
+ ROM_LOAD( "c2", 0x0000, 0x8000, CRC(f2da4f23) SHA1(5ea1a51c3ac283796f7eafb6719d88356767340d) ) /* background maps */
ROM_LOAD( "c3", 0x8000, 0x4000, CRC(7ef3ac1b) SHA1(8a0497c4e4733f9c50d576f632210b82497a5e1c) )
- ROM_LOAD( "c5", 0xc000, 0x2000, CRC(c03d8b1b) SHA1(641c1eba334d36ea64b9293a20320b31c7c88858) ) /* color codes for the background */
+ ROM_LOAD( "c5", 0xc000, 0x2000, CRC(c03d8b1b) SHA1(641c1eba334d36ea64b9293a20320b31c7c88858) ) /* color codes for the background */
ROM_END
ROM_START( cruisin )
@@ -311,22 +311,22 @@ ROM_START( cruisin )
ROM_LOAD( "c1", 0x8000, 0x8000, CRC(1fad7589) SHA1(2e626bbbab8cffe11ee7de3e56aa1871c29d5fa9) )
ROM_REGION( 0x03000, "gfx1", 0 )
- ROM_LOAD( "cr4", 0x00000, 0x2000, CRC(8cd0308e) SHA1(7303b9e074bda557d64b39e04cef0f965a756be6) ) /* Characters */
+ ROM_LOAD( "cr4", 0x00000, 0x2000, CRC(8cd0308e) SHA1(7303b9e074bda557d64b39e04cef0f965a756be6) ) /* Characters */
ROM_REGION( 0x04000, "gfx2", 0 )
- ROM_LOAD( "c12", 0x00000, 0x2000, CRC(08eaaccd) SHA1(a970381e3ba22bcdea6df2d31cd8a10c4b2bc413) ) /* Sprites */
+ ROM_LOAD( "c12", 0x00000, 0x2000, CRC(08eaaccd) SHA1(a970381e3ba22bcdea6df2d31cd8a10c4b2bc413) ) /* Sprites */
ROM_LOAD( "c13", 0x02000, 0x2000, CRC(1819aafb) SHA1(8a5ffcd8866e09c5568879257384767d61796111) )
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "c9", 0x00000, 0x8000, CRC(8aeb47e6) SHA1(bb09dbe6b37e1bd02abf3024ac4d954c8f0e70f2) ) /* Background tiles */
+ ROM_LOAD( "c9", 0x00000, 0x8000, CRC(8aeb47e6) SHA1(bb09dbe6b37e1bd02abf3024ac4d954c8f0e70f2) ) /* Background tiles */
ROM_LOAD( "c8", 0x08000, 0x4000, CRC(0d7a1eeb) SHA1(60b8d4124ce857a248d3c41fdb050f11be58549f) )
ROM_LOAD( "c6", 0x0c000, 0x8000, CRC(2246fe9d) SHA1(f7f8708d499bcbd1a583e1092b54425ad1105f94) )
ROM_LOAD( "c7", 0x14000, 0x4000, CRC(e8b97de9) SHA1(f4d1b7075f47ab4522c36281b97eaa02fe383814) )
- ROM_REGION( 0xe000, "gfx4", 0 ) /* background tilemaps */
- ROM_LOAD( "c2", 0x0000, 0x8000, CRC(f2da4f23) SHA1(5ea1a51c3ac283796f7eafb6719d88356767340d) ) /* background maps */
+ ROM_REGION( 0xe000, "gfx4", 0 ) /* background tilemaps */
+ ROM_LOAD( "c2", 0x0000, 0x8000, CRC(f2da4f23) SHA1(5ea1a51c3ac283796f7eafb6719d88356767340d) ) /* background maps */
ROM_LOAD( "c3", 0x8000, 0x4000, CRC(7ef3ac1b) SHA1(8a0497c4e4733f9c50d576f632210b82497a5e1c) )
- ROM_LOAD( "c5", 0xc000, 0x2000, CRC(c03d8b1b) SHA1(641c1eba334d36ea64b9293a20320b31c7c88858) ) /* color codes for the background */
+ ROM_LOAD( "c5", 0xc000, 0x2000, CRC(c03d8b1b) SHA1(641c1eba334d36ea64b9293a20320b31c7c88858) ) /* color codes for the background */
ROM_END
@@ -337,11 +337,11 @@ DRIVER_INIT_MEMBER(citycon_state,citycon)
int i;
/*
- City Connection controls the text color code for each _scanline_, not
- for each character as happens in most games. To handle that conveniently,
- I convert the 2bpp char data into 5bpp, and create a virtual palette so
- characters can still be drawn in one pass.
- */
+ City Connection controls the text color code for each _scanline_, not
+ for each character as happens in most games. To handle that conveniently,
+ I convert the 2bpp char data into 5bpp, and create a virtual palette so
+ characters can still be drawn in one pass.
+ */
for (i = 0x0fff; i >= 0; i--)
{
int mask;
diff --git a/src/mame/drivers/clayshoo.c b/src/mame/drivers/clayshoo.c
index be7cd10fcd4..afb698cf8f2 100644
--- a/src/mame/drivers/clayshoo.c
+++ b/src/mame/drivers/clayshoo.c
@@ -62,14 +62,14 @@ static UINT8 difficulty_input_port_r( running_machine &machine, int bit )
UINT8 ret = 0;
/* read fake port and remap the buttons to 2 bits */
- UINT8 raw = machine.root_device().ioport("FAKE")->read();
+ UINT8 raw = machine.root_device().ioport("FAKE")->read();
if (raw & (1 << (bit + 1)))
- ret = 0x03; /* expert */
+ ret = 0x03; /* expert */
else if (raw & (1 << (bit + 2)))
- ret = 0x01; /* pro */
+ ret = 0x01; /* pro */
else
- ret = 0x00; /* amateur otherwise */
+ ret = 0x00; /* amateur otherwise */
return ret;
}
@@ -81,13 +81,13 @@ READ8_MEMBER(clayshoo_state::input_port_r)
switch (m_input_port_select)
{
- case 0x01: ret = ioport("IN0")->read(); break;
- case 0x02: ret = ioport("IN1")->read(); break;
- case 0x04: ret = (ioport("IN2")->read() & 0xf0) | difficulty_input_port_r(machine(), 0) |
- (difficulty_input_port_r(machine(), 3) << 2); break;
- case 0x08: ret = ioport("IN3")->read(); break;
+ case 0x01: ret = ioport("IN0")->read(); break;
+ case 0x02: ret = ioport("IN1")->read(); break;
+ case 0x04: ret = (ioport("IN2")->read() & 0xf0) | difficulty_input_port_r(machine(), 0) |
+ (difficulty_input_port_r(machine(), 3) << 2); break;
+ case 0x08: ret = ioport("IN3")->read(); break;
case 0x10:
- case 0x20: break; /* these two are not really used */
+ case 0x20: break; /* these two are not really used */
default: logerror("Unexpected port read: %02X\n", m_input_port_select);
}
return ret;
@@ -110,7 +110,7 @@ TIMER_CALLBACK_MEMBER(clayshoo_state::reset_analog_bit)
static attotime compute_duration( device_t *device, int analog_pos )
{
/* the 58 comes from the length of the loop used to
- read the analog position */
+ read the analog position */
return downcast<cpu_device *>(device)->cycles_to_attotime(58 * analog_pos);
}
@@ -118,8 +118,8 @@ static attotime compute_duration( device_t *device, int analog_pos )
WRITE8_MEMBER(clayshoo_state::analog_reset_w)
{
/* reset the analog value, and start the two times that will fire
- off in a short period proportional to the position of the
- analog control and set the appropriate bit. */
+ off in a short period proportional to the position of the
+ analog control and set the appropriate bit. */
m_analog_port_val = 0xff;
@@ -151,22 +151,22 @@ static void create_analog_timers( running_machine &machine )
static I8255A_INTERFACE( ppi8255_0_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_NULL, /* Port A write */
- DEVCB_NULL, /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_NULL, /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_NULL, /* Port A read */
+ DEVCB_NULL, /* Port A write */
+ DEVCB_NULL, /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_NULL, /* Port C read */
+ DEVCB_NULL /* Port C write */
};
static I8255A_INTERFACE( ppi8255_1_intf )
{
- DEVCB_NULL, /* Port A read */
- DEVCB_DRIVER_MEMBER(clayshoo_state,input_port_select_w), /* Port A write */
- DEVCB_DRIVER_MEMBER(clayshoo_state,input_port_r), /* Port B read */
- DEVCB_NULL, /* Port B write */
- DEVCB_NULL, /* Port C read */
- DEVCB_NULL /* Port C write */
+ DEVCB_NULL, /* Port A read */
+ DEVCB_DRIVER_MEMBER(clayshoo_state,input_port_select_w), /* Port A write */
+ DEVCB_DRIVER_MEMBER(clayshoo_state,input_port_r), /* Port B read */
+ DEVCB_NULL, /* Port B write */
+ DEVCB_NULL, /* Port C read */
+ DEVCB_NULL /* Port C write */
};
void clayshoo_state::machine_start()
@@ -222,8 +222,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, clayshoo_state )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x2000, 0x23ff) AM_RAM
AM_RANGE(0x4000, 0x47ff) AM_ROM
- AM_RANGE(0x8000, 0x97ff) AM_RAM AM_SHARE("videoram") /* 6k of video ram according to readme */
- AM_RANGE(0x9800, 0xa800) AM_WRITENOP /* not really mapped, but cleared */
+ AM_RANGE(0x8000, 0x97ff) AM_RAM AM_SHARE("videoram") /* 6k of video ram according to readme */
+ AM_RANGE(0x9800, 0xa800) AM_WRITENOP /* not really mapped, but cleared */
AM_RANGE(0xc800, 0xc800) AM_READWRITE(analog_r, analog_reset_w)
ADDRESS_MAP_END
@@ -260,11 +260,11 @@ static INPUT_PORTS_START( clayshoo )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x03, DEF_STR( Free_Play ) )
- PORT_BIT( 0x3c, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* doesn't appear to be used */
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) /* not 100% positive */
+ PORT_BIT( 0x3c, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* doesn't appear to be used */
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Demo_Sounds ) ) /* not 100% positive */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) /* used */
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) /* used */
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
@@ -278,11 +278,11 @@ static INPUT_PORTS_START( clayshoo )
PORT_DIPSETTING( 0x05, "60/8k-120/10k" )
PORT_DIPSETTING( 0x06, "90/11.5k-150/11.5k" )
PORT_DIPSETTING( 0x07, "90/11.5k-190/13k" )
- PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* doesn't appear to be used */
+ PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* doesn't appear to be used */
PORT_START("IN2")
- PORT_BIT( 0x03, IP_ACTIVE_LOW, IPT_SPECIAL ) /* amateur/expert/pro Player 2 */
- PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_SPECIAL ) /* amateur/expert/pro Player 1 */
+ PORT_BIT( 0x03, IP_ACTIVE_LOW, IPT_SPECIAL ) /* amateur/expert/pro Player 2 */
+ PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_SPECIAL ) /* amateur/expert/pro Player 1 */
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
@@ -300,7 +300,7 @@ static INPUT_PORTS_START( clayshoo )
PORT_BIT( 0x0f, 0x08, IPT_AD_STICK_Y ) PORT_MINMAX(0,0x0f) PORT_SENSITIVITY(10) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNUSED )
- PORT_START("FAKE") /* IN6 - Fake. Visible in IN2 bits 0-1 and 2-3 */
+ PORT_START("FAKE") /* IN6 - Fake. Visible in IN2 bits 0-1 and 2-3 */
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_TOGGLE PORT_PLAYER(2) PORT_NAME("P2 Amateur Difficulty")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_TOGGLE PORT_PLAYER(2) PORT_NAME("P2 Expert Difficulty")
PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_TOGGLE PORT_PLAYER(2) PORT_NAME("P2 Pro Difficulty")
@@ -328,7 +328,7 @@ void clayshoo_state::machine_reset()
static MACHINE_CONFIG_START( clayshoo, clayshoo_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80,5068000/4) /* 5.068/4 Mhz (divider is a guess) */
+ MCFG_CPU_ADD("maincpu", Z80,5068000/4) /* 5.068/4 Mhz (divider is a guess) */
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_IO_MAP(main_io_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", clayshoo_state, irq0_line_hold)
diff --git a/src/mame/drivers/cliffhgr.c b/src/mame/drivers/cliffhgr.c
index 01d67336589..533098cef4b 100644
--- a/src/mame/drivers/cliffhgr.c
+++ b/src/mame/drivers/cliffhgr.c
@@ -81,17 +81,17 @@ Side 2 = 0x8F7DDD (or 0x880000 | ( 0x77 << 12 ) | 0x0DDD)
#include "sound/discrete.h"
#include "machine/nvram.h"
-#define CLIFF_ENABLE_SND_1 NODE_01
-#define CLIFF_ENABLE_SND_2 NODE_02
+#define CLIFF_ENABLE_SND_1 NODE_01
+#define CLIFF_ENABLE_SND_2 NODE_02
class cliffhgr_state : public driver_device
{
public:
cliffhgr_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_laserdisc(*this, "laserdisc"),
- m_port_bank(0),
- m_phillips_code(0) { }
+ m_laserdisc(*this, "laserdisc"),
+ m_port_bank(0),
+ m_phillips_code(0) { }
required_device<pioneer_pr8210_device> m_laserdisc;
@@ -236,9 +236,9 @@ void cliffhgr_state::machine_reset()
/********************************************************/
static ADDRESS_MAP_START( mainmem, AS_PROGRAM, 8, cliffhgr_state )
- AM_RANGE(0x0000, 0xbfff) AM_ROM /* ROM */
- AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("nvram") /* NVRAM */
- AM_RANGE(0xe800, 0xefff) AM_RAM /* RAM */
+ AM_RANGE(0x0000, 0xbfff) AM_ROM /* ROM */
+ AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE("nvram") /* NVRAM */
+ AM_RANGE(0xe800, 0xefff) AM_RAM /* RAM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( mainport, AS_IO, 8, cliffhgr_state )
@@ -270,98 +270,98 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( cliffhgr )
PORT_START("BANK0")
PORT_BIT ( 0x3F, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_SERVICE2 ) /* SW2 on CPU PCB */
- PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* SW1 on CPU PCB */
+ PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_SERVICE2 ) /* SW2 on CPU PCB */
+ PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* SW1 on CPU PCB */
PORT_START("BANK1")
- PORT_DIPNAME( 0xc0, 0xc0, "Should Have Hint" ) PORT_DIPLOCATION("E11:7,8")
+ PORT_DIPNAME( 0xc0, 0xc0, "Should Have Hint" ) PORT_DIPLOCATION("E11:7,8")
PORT_DIPSETTING( 0xc0, "Never" )
PORT_DIPSETTING( 0x80, "After 1st Player Mistake" )
PORT_DIPSETTING( 0x40, "After 2nd Player Mistake" )
PORT_DIPSETTING( 0x00, "After 3rd Player Mistake" )
- PORT_DIPNAME( 0x20, 0x00, "Action/Stick Hints" ) PORT_DIPLOCATION("E11:6")
+ PORT_DIPNAME( 0x20, 0x00, "Action/Stick Hints" ) PORT_DIPLOCATION("E11:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x00, "Display Score and Lives During Animation" ) PORT_DIPLOCATION("E11:5")
+ PORT_DIPNAME( 0x10, 0x00, "Display Score and Lives During Animation" ) PORT_DIPLOCATION("E11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x00, "Regular Length Scenes" ) PORT_DIPLOCATION("E11:4")
+ PORT_DIPNAME( 0x08, 0x00, "Regular Length Scenes" ) PORT_DIPLOCATION("E11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, "No Hanging Scene" ) PORT_DIPLOCATION("E11:3")
+ PORT_DIPNAME( 0x04, 0x04, "No Hanging Scene" ) PORT_DIPLOCATION("E11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("E11:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("E11:1,2")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "6" )
PORT_START("BANK2")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("F11:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("F11:5,6")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("F11:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("F11:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_START("BANK3")
- PORT_DIPNAME( 0x80, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("G11:8")
+ PORT_DIPNAME( 0x80, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("G11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Short Scenes" ) PORT_DIPLOCATION("G11:7")
+ PORT_DIPNAME( 0x40, 0x40, "Short Scenes" ) PORT_DIPLOCATION("G11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G11:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G11:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Disc Test" ) PORT_DIPLOCATION("G11:5")
+ PORT_DIPNAME( 0x10, 0x10, "Disc Test" ) PORT_DIPLOCATION("G11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, "Player Immortality" ) PORT_DIPLOCATION("G11:4")
+ PORT_DIPNAME( 0x08, 0x08, "Player Immortality" ) PORT_DIPLOCATION("G11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("G11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("G11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Switch Test" ) PORT_DIPLOCATION("G11:2")
+ PORT_DIPNAME( 0x02, 0x02, "Switch Test" ) PORT_DIPLOCATION("G11:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x01, 0x01, "Service Index" ) PORT_DIPLOCATION("G11:1")
+ PORT_DIPNAME( 0x01, 0x01, "Service Index" ) PORT_DIPLOCATION("G11:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("BANK4")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x0f, 0x0f, "Move Difficulty" ) PORT_DIPLOCATION("H11:1,2,3,4")
+ PORT_DIPNAME( 0x0f, 0x0f, "Move Difficulty" ) PORT_DIPLOCATION("H11:1,2,3,4")
PORT_DIPSETTING( 0x0f, "0 (Easiest)" )
PORT_DIPSETTING( 0x0e, "1" )
PORT_DIPSETTING( 0x0d, "2" )
@@ -400,87 +400,87 @@ INPUT_PORTS_END
static INPUT_PORTS_START( cliffhgra )
PORT_START("BANK0")
PORT_BIT ( 0x3F, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_SERVICE2 ) /* SW2 on CPU PCB */
- PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* SW1 on CPU PCB */
+ PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_SERVICE2 ) /* SW2 on CPU PCB */
+ PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* SW1 on CPU PCB */
PORT_START("BANK1")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("E11:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("E11:1,2")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "6" )
PORT_START("BANK2")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("F11:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("F11:5,6")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
// PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x30, DEF_STR( 2C_1C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("F11:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("F11:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
// PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
PORT_START("BANK3")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("G11:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("G11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Play Thru/Random" ) PORT_DIPLOCATION("G11:7")
+ PORT_DIPNAME( 0x40, 0x40, "Play Thru/Random" ) PORT_DIPLOCATION("G11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G11:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G11:6")
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x20, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Scene Jump/Disc Test" ) PORT_DIPLOCATION("G11:5")
+ PORT_DIPNAME( 0x10, 0x10, "Scene Jump/Disc Test" ) PORT_DIPLOCATION("G11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, "Immortality" ) PORT_DIPLOCATION("G11:4")
+ PORT_DIPNAME( 0x08, 0x08, "Immortality" ) PORT_DIPLOCATION("G11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("G11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("G11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Switch Test" ) PORT_DIPLOCATION("G11:2")
+ PORT_DIPNAME( 0x02, 0x02, "Switch Test" ) PORT_DIPLOCATION("G11:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x01, 0x01, "Service Index" ) PORT_DIPLOCATION("G11:1")
+ PORT_DIPNAME( 0x01, 0x01, "Service Index" ) PORT_DIPLOCATION("G11:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("BANK4")
- PORT_DIPNAME( 0xf0, 0xf0, "Hint Difficulty" ) PORT_DIPLOCATION("H11:5,6,7,8")
+ PORT_DIPNAME( 0xf0, 0xf0, "Hint Difficulty" ) PORT_DIPLOCATION("H11:5,6,7,8")
PORT_DIPSETTING( 0xf0, "0 (Most Hints)" )
PORT_DIPSETTING( 0xe0, "1" )
PORT_DIPSETTING( 0xd0, "2" )
@@ -497,7 +497,7 @@ static INPUT_PORTS_START( cliffhgra )
PORT_DIPSETTING( 0x20, "13" )
PORT_DIPSETTING( 0x10, "14" )
PORT_DIPSETTING( 0x00, "15 (Least Hints)" )
- PORT_DIPNAME( 0x0f, 0x0f, "Move Difficulty" ) PORT_DIPLOCATION("H11:1,2,3,4")
+ PORT_DIPNAME( 0x0f, 0x0f, "Move Difficulty" ) PORT_DIPLOCATION("H11:1,2,3,4")
PORT_DIPSETTING( 0x0f, "0 (Easiest)" )
PORT_DIPSETTING( 0x0e, "1" )
PORT_DIPSETTING( 0x0d, "2" )
@@ -536,100 +536,100 @@ INPUT_PORTS_END
static INPUT_PORTS_START( goaltogo )
PORT_START("BANK0")
PORT_BIT ( 0x3F, IP_ACTIVE_LOW, IPT_UNUSED )
- PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_SERVICE2 ) /* SW2 on CPU PCB */
- PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* SW1 on CPU PCB */
+ PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_SERVICE2 ) /* SW2 on CPU PCB */
+ PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) /* SW1 on CPU PCB */
PORT_START("BANK1")
- PORT_DIPNAME( 0x80, 0x80, "Should Have Hint" ) PORT_DIPLOCATION("E11:8")
+ PORT_DIPNAME( 0x80, 0x80, "Should Have Hint" ) PORT_DIPLOCATION("E11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, "Max. Game Time Timer" ) PORT_DIPLOCATION("E11:7")
+ PORT_DIPNAME( 0x40, 0x40, "Max. Game Time Timer" ) PORT_DIPLOCATION("E11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, "Action/Stick Hints" ) PORT_DIPLOCATION("E11:6")
+ PORT_DIPNAME( 0x20, 0x20, "Action/Stick Hints" ) PORT_DIPLOCATION("E11:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("E11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Single Coin Continue" ) PORT_DIPLOCATION("E11:2")
+ PORT_DIPNAME( 0x02, 0x02, "Single Coin Continue" ) PORT_DIPLOCATION("E11:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) PORT_CONDITION("BANK1",0x01,EQUALS,0x00)
PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_CONDITION("BANK1",0x01,EQUALS,0x00)
- PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("E11:1")
+ PORT_DIPNAME( 0x01, 0x01, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("E11:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("BANK2")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("F11:5,6")
+ PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("F11:5,6")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
- PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:4")
+ PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("F11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("F11:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("F11:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_START("BANK3")
- PORT_DIPNAME( 0x80, 0x00, "Display Diagram Before Play" ) PORT_DIPLOCATION("G11:8")
+ PORT_DIPNAME( 0x80, 0x00, "Display Diagram Before Play" ) PORT_DIPLOCATION("G11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x00, "Display Score During Game" ) PORT_DIPLOCATION("G11:7")
+ PORT_DIPNAME( 0x40, 0x00, "Display Score During Game" ) PORT_DIPLOCATION("G11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G11:6")
+ PORT_DIPNAME( 0x20, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("G11:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, "Scene Jump/Disc Test" ) PORT_DIPLOCATION("G11:5")
+ PORT_DIPNAME( 0x10, 0x10, "Scene Jump/Disc Test" ) PORT_DIPLOCATION("G11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x08, 0x08, "Immortality" ) PORT_DIPLOCATION("G11:4")
+ PORT_DIPNAME( 0x08, 0x08, "Immortality" ) PORT_DIPLOCATION("G11:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("G11:3")
+ PORT_DIPNAME( 0x04, 0x04, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("G11:3")
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Switch Test" ) PORT_DIPLOCATION("G11:2")
+ PORT_DIPNAME( 0x02, 0x02, "Switch Test" ) PORT_DIPLOCATION("G11:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x01, 0x01, "Service Index" ) PORT_DIPLOCATION("G11:1")
+ PORT_DIPNAME( 0x01, 0x01, "Service Index" ) PORT_DIPLOCATION("G11:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("BANK4")
- PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:8")
+ PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:8")
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:7")
+ PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:7")
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:6")
+ PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("H11:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x0f, 0x0f, "Move Difficulty" ) PORT_DIPLOCATION("H11:1,2,3,4")
+ PORT_DIPNAME( 0x0f, 0x0f, "Move Difficulty" ) PORT_DIPLOCATION("H11:1,2,3,4")
PORT_DIPSETTING( 0x0f, "0 (Easiest)" )
PORT_DIPSETTING( 0x0e, "1" )
PORT_DIPSETTING( 0x0d, "2" )
@@ -704,7 +704,7 @@ static MACHINE_CONFIG_START( cliffhgr, cliffhgr_state )
MCFG_LASERDISC_OVERLAY_CLIP(TMS9928A_HORZ_DISPLAY_START-12, TMS9928A_HORZ_DISPLAY_START+32*8+12-1, TMS9928A_VERT_DISPLAY_START_NTSC - 12, TMS9928A_VERT_DISPLAY_START_NTSC+24*8+12-1)
/* start with the TMS9928a video configuration */
- MCFG_TMS9928A_ADD( "tms9928a", TMS9128, cliffhgr_tms9928a_interface ) /* TMS9128NL on the board */
+ MCFG_TMS9928A_ADD( "tms9928a", TMS9128, cliffhgr_tms9928a_interface ) /* TMS9128NL on the board */
/* override video rendering and raw screen info */
MCFG_LASERDISC_SCREEN_ADD_NTSC("screen", "laserdisc")
@@ -731,11 +731,11 @@ MACHINE_CONFIG_END
ROM_START( cliffhgr )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "cliff_u1.bin", 0x0000, 0x2000, CRC(a86ec38f) SHA1(bfca1b1c084f5b7b1e0ccb2f3616ecea1340f04c) )
- ROM_LOAD( "cliff_u2.bin", 0x2000, 0x2000, CRC(b8d33b6b) SHA1(02778f87a78199129c758a8fb0629b9ba74cab99) )
- ROM_LOAD( "cliff_u3.bin", 0x4000, 0x2000, CRC(75a64cd2) SHA1(18fe4d8885b59ec8b8c28b5d7141a27164c982ac) )
- ROM_LOAD( "cliff_u4.bin", 0x6000, 0x2000, CRC(906b2af1) SHA1(65fadd2fec90f47c91ac4928f342c79ab8bc6ef0) )
- ROM_LOAD( "cliff_u5.bin", 0x8000, 0x2000, CRC(5922e710) SHA1(10637baba4d16dc333aeb0ab88ee251f44e1a115) )
+ ROM_LOAD( "cliff_u1.bin", 0x0000, 0x2000, CRC(a86ec38f) SHA1(bfca1b1c084f5b7b1e0ccb2f3616ecea1340f04c) )
+ ROM_LOAD( "cliff_u2.bin", 0x2000, 0x2000, CRC(b8d33b6b) SHA1(02778f87a78199129c758a8fb0629b9ba74cab99) )
+ ROM_LOAD( "cliff_u3.bin", 0x4000, 0x2000, CRC(75a64cd2) SHA1(18fe4d8885b59ec8b8c28b5d7141a27164c982ac) )
+ ROM_LOAD( "cliff_u4.bin", 0x6000, 0x2000, CRC(906b2af1) SHA1(65fadd2fec90f47c91ac4928f342c79ab8bc6ef0) )
+ ROM_LOAD( "cliff_u5.bin", 0x8000, 0x2000, CRC(5922e710) SHA1(10637baba4d16dc333aeb0ab88ee251f44e1a115) )
DISK_REGION( "laserdisc" )
DISK_IMAGE_READONLY( "cliffhgr", 0, SHA1(4442995c824d7891a2a19c607bb3301d696fbdc8) )
@@ -743,10 +743,10 @@ ROM_END
ROM_START( cliffhgra )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "cliff_alt_0.bin", 0x0000, 0x2000, CRC(27caa67c) SHA1(70d8270766b8712d4250b1a23489007d59eb262f) )
- ROM_LOAD( "cliff_alt_1.bin", 0x2000, 0x2000, CRC(6e5f1515) SHA1(1c4116f4f5910857408826d73c630abbf1434119) )
- ROM_LOAD( "cliff_alt_2.bin", 0x4000, 0x2000, CRC(045f895d) SHA1(364e259a9630d87ca917c7a9dc1a94d6f0d0eba5) )
- ROM_LOAD( "cliff_alt_3.bin", 0x6000, 0x2000, CRC(54cdb4a1) SHA1(6b1d73aec029af4a88ca2f883b4ed706d153592d) )
+ ROM_LOAD( "cliff_alt_0.bin", 0x0000, 0x2000, CRC(27caa67c) SHA1(70d8270766b8712d4250b1a23489007d59eb262f) )
+ ROM_LOAD( "cliff_alt_1.bin", 0x2000, 0x2000, CRC(6e5f1515) SHA1(1c4116f4f5910857408826d73c630abbf1434119) )
+ ROM_LOAD( "cliff_alt_2.bin", 0x4000, 0x2000, CRC(045f895d) SHA1(364e259a9630d87ca917c7a9dc1a94d6f0d0eba5) )
+ ROM_LOAD( "cliff_alt_3.bin", 0x6000, 0x2000, CRC(54cdb4a1) SHA1(6b1d73aec029af4a88ca2f883b4ed706d153592d) )
DISK_REGION( "laserdisc" )
DISK_IMAGE_READONLY( "cliffhgr", 0, SHA1(4442995c824d7891a2a19c607bb3301d696fbdc8) )
@@ -754,11 +754,11 @@ ROM_END
ROM_START( goaltogo )
ROM_REGION( 0x10000, "maincpu", 0 )
- ROM_LOAD( "gtg.rm0", 0x0000, 0x2000, CRC(d8efddea) SHA1(69a076fed60ebabad3032d8c10804f57a0904327) )
- ROM_LOAD( "gtg.rm1", 0x2000, 0x2000, CRC(69953d38) SHA1(2a51aa785a4576db8b046e128bbfc1b3949d7bf7) )
- ROM_LOAD( "gtg.rm2", 0x4000, 0x2000, CRC(b043e205) SHA1(8992c0e294f59bd9331fb3a50a0dfd8d5c194fa3) )
- ROM_LOAD( "gtg.rm3", 0x6000, 0x2000, CRC(ec305f5e) SHA1(e205fac699db4ca28a87f56f89cc6cf185ad540d) )
- ROM_LOAD( "gtg.rm4", 0x8000, 0x2000, CRC(9e4c8aa2) SHA1(002c0940d3890141f85f98f854fd30cc1e340d45) )
+ ROM_LOAD( "gtg.rm0", 0x0000, 0x2000, CRC(d8efddea) SHA1(69a076fed60ebabad3032d8c10804f57a0904327) )
+ ROM_LOAD( "gtg.rm1", 0x2000, 0x2000, CRC(69953d38) SHA1(2a51aa785a4576db8b046e128bbfc1b3949d7bf7) )
+ ROM_LOAD( "gtg.rm2", 0x4000, 0x2000, CRC(b043e205) SHA1(8992c0e294f59bd9331fb3a50a0dfd8d5c194fa3) )
+ ROM_LOAD( "gtg.rm3", 0x6000, 0x2000, CRC(ec305f5e) SHA1(e205fac699db4ca28a87f56f89cc6cf185ad540d) )
+ ROM_LOAD( "gtg.rm4", 0x8000, 0x2000, CRC(9e4c8aa2) SHA1(002c0940d3890141f85f98f854fd30cc1e340d45) )
DISK_REGION( "laserdisc" )
DISK_IMAGE_READONLY( "goaltog1", 0, NO_DUMP )
diff --git a/src/mame/drivers/cloak.c b/src/mame/drivers/cloak.c
index c4ad239b5fe..53ca649ee49 100644
--- a/src/mame/drivers/cloak.c
+++ b/src/mame/drivers/cloak.c
@@ -167,8 +167,8 @@ static ADDRESS_MAP_START( master_map, AS_PROGRAM, 8, cloak_state )
AM_RANGE(0x0000, 0x03ff) AM_RAM
AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(cloak_videoram_w) AM_SHARE("videoram")
AM_RANGE(0x0800, 0x0fff) AM_RAM AM_SHARE("share1")
- AM_RANGE(0x1000, 0x100f) AM_DEVREADWRITE("pokey1", pokey_device, read, write) /* DSW0 also */
- AM_RANGE(0x1800, 0x180f) AM_DEVREADWRITE("pokey2", pokey_device, read, write) /* DSW1 also */
+ AM_RANGE(0x1000, 0x100f) AM_DEVREADWRITE("pokey1", pokey_device, read, write) /* DSW0 also */
+ AM_RANGE(0x1800, 0x180f) AM_DEVREADWRITE("pokey2", pokey_device, read, write) /* DSW1 also */
AM_RANGE(0x2000, 0x2000) AM_READ_PORT("P1")
AM_RANGE(0x2200, 0x2200) AM_READ_PORT("P2")
AM_RANGE(0x2400, 0x2400) AM_READ_PORT("SYSTEM")
@@ -179,7 +179,7 @@ static ADDRESS_MAP_START( master_map, AS_PROGRAM, 8, cloak_state )
AM_RANGE(0x3200, 0x327f) AM_WRITE(cloak_paletteram_w)
AM_RANGE(0x3800, 0x3801) AM_WRITE(cloak_coin_counter_w)
AM_RANGE(0x3803, 0x3803) AM_WRITE(cloak_flipscreen_w)
- AM_RANGE(0x3805, 0x3805) AM_WRITENOP // ???
+ AM_RANGE(0x3805, 0x3805) AM_WRITENOP // ???
AM_RANGE(0x3806, 0x3807) AM_WRITE(cloak_led_w)
AM_RANGE(0x3a00, 0x3a00) AM_WRITE(watchdog_reset_w)
AM_RANGE(0x3c00, 0x3c00) AM_WRITE(cloak_irq_reset_0_w)
@@ -225,21 +225,21 @@ static INPUT_PORTS_START( cloak )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_LEFT ) PORT_8WAY
PORT_START("P2")
- PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) // player 2 controls, not used
+ PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) // player 2 controls, not used
PORT_START("SYSTEM")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_VBLANK("screen")
PORT_SERVICE( 0x02, IP_ACTIVE_LOW )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN1 )
- PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) // cocktail mode switch, not used
+ PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED ) // cocktail mode switch, not used
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )
- PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // player 2 button 1, not used
+ PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) // player 2 button 1, not used
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_START("START")
- PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED ) // not connected
- PORT_BIT( 0x30, IP_ACTIVE_HIGH, IPT_UNUSED ) // pulled high
+ PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED ) // not connected
+ PORT_BIT( 0x30, IP_ACTIVE_HIGH, IPT_UNUSED ) // pulled high
PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 )
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 )
@@ -257,11 +257,11 @@ static INPUT_PORTS_START( cloak )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("5A:!4")
PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
- PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) // "5A:!3" - it must be OFF according to manual.
- PORT_DIPNAME( 0x40, 0x00, "Demo Freeze Mode" ) PORT_DIPLOCATION("5A:!2") // when active, press button 1 to freeze
+ PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) // "5A:!3" - it must be OFF according to manual.
+ PORT_DIPNAME( 0x40, 0x00, "Demo Freeze Mode" ) PORT_DIPLOCATION("5A:!2") // when active, press button 1 to freeze
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x40, DEF_STR( On ) )
- PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) // "5A:!1" - Not Used according to manual.
+ PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) // "5A:!1" - Not Used according to manual.
INPUT_PORTS_END
@@ -331,11 +331,11 @@ static const pokey_interface pokey_interface_2 =
static MACHINE_CONFIG_START( cloak, cloak_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6502, 1000000) /* 1 MHz ???? */
+ MCFG_CPU_ADD("maincpu", M6502, 1000000) /* 1 MHz ???? */
MCFG_CPU_PROGRAM_MAP(master_map)
MCFG_CPU_PERIODIC_INT_DRIVER(cloak_state, irq0_line_hold, 4*60)
- MCFG_CPU_ADD("slave", M6502, 1250000) /* 1.25 MHz ???? */
+ MCFG_CPU_ADD("slave", M6502, 1250000) /* 1.25 MHz ???? */
MCFG_CPU_PROGRAM_MAP(slave_map)
MCFG_CPU_PERIODIC_INT_DRIVER(cloak_state, irq0_line_hold, 2*60)
@@ -359,12 +359,12 @@ static MACHINE_CONFIG_START( cloak, cloak_state )
MCFG_SPEAKER_STANDARD_MONO("mono")
/* more low pass filters ==> DISCRETE processing */
- MCFG_POKEY_ADD("pokey1", XTAL_10MHz/8) /* Accurate to recording */
+ MCFG_POKEY_ADD("pokey1", XTAL_10MHz/8) /* Accurate to recording */
MCFG_POKEY_CONFIG(pokey_interface_1)
MCFG_POKEY_OUTPUT_OPAMP_LOW_PASS(RES_K(1), CAP_U(0.047), 5.0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
- MCFG_POKEY_ADD("pokey2", XTAL_10MHz/8) /* Accurate to recording */
+ MCFG_POKEY_ADD("pokey2", XTAL_10MHz/8) /* Accurate to recording */
MCFG_POKEY_CONFIG(pokey_interface_2)
MCFG_POKEY_OUTPUT_OPAMP_LOW_PASS(RES_K(1), CAP_U(0.022), 5.0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
diff --git a/src/mame/drivers/cloud9.c b/src/mame/drivers/cloud9.c
index 475577c3200..cc98e5fd6b7 100644
--- a/src/mame/drivers/cloud9.c
+++ b/src/mame/drivers/cloud9.c
@@ -309,20 +309,20 @@ static INPUT_PORTS_START( cloud9 )
PORT_START("DSW")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0xfe, 0x04, DEF_STR( Coinage ) )
- PORT_DIPSETTING( 0x22, DEF_STR( 9C_1C ) )
- PORT_DIPSETTING( 0x1e, DEF_STR( 8C_1C ) )
- PORT_DIPSETTING( 0x1a, DEF_STR( 7C_1C ) )
- PORT_DIPSETTING( 0x16, DEF_STR( 6C_1C ) )
- PORT_DIPSETTING( 0x12, DEF_STR( 5C_1C ) )
- PORT_DIPSETTING( 0x0e, DEF_STR( 4C_1C ) )
- PORT_DIPSETTING( 0x0a, DEF_STR( 3C_1C ) )
- PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) )
- PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
- PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
+ PORT_DIPSETTING( 0x22, DEF_STR( 9C_1C ) )
+ PORT_DIPSETTING( 0x1e, DEF_STR( 8C_1C ) )
+ PORT_DIPSETTING( 0x1a, DEF_STR( 7C_1C ) )
+ PORT_DIPSETTING( 0x16, DEF_STR( 6C_1C ) )
+ PORT_DIPSETTING( 0x12, DEF_STR( 5C_1C ) )
+ PORT_DIPSETTING( 0x0e, DEF_STR( 4C_1C ) )
+ PORT_DIPSETTING( 0x0a, DEF_STR( 3C_1C ) )
+ PORT_DIPSETTING( 0x06, DEF_STR( 2C_1C ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( 1C_1C ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
PORT_START("TRACKY")
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE
@@ -351,29 +351,29 @@ static INPUT_PORTS_START( firebeas )
PORT_START("DSW")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
- PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("TRACKY")
PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE
@@ -433,7 +433,7 @@ static MACHINE_CONFIG_START( cloud9, cloud9_state )
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE((float)PIXEL_CLOCK / (float)VTOTAL / (float)HTOTAL)
MCFG_SCREEN_SIZE(HTOTAL, VTOTAL)
- MCFG_SCREEN_VBLANK_TIME(0) /* VBLANK is handled manually */
+ MCFG_SCREEN_VBLANK_TIME(0) /* VBLANK is handled manually */
MCFG_SCREEN_VISIBLE_AREA(0, 255, 0, 231)
MCFG_SCREEN_UPDATE_DRIVER(cloud9_state, screen_update_cloud9)
@@ -472,10 +472,10 @@ ROM_START( cloud9 )
ROM_LOAD( "c9_gfx3.bin", 0x3000, 0x1000, CRC(27e9b88d) SHA1(a1d27e62eea9cdff662a3c160f650bbdb32b7f47) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "63s141.e10", 0x0000, 0x0100, BAD_DUMP CRC(8e98083f) SHA1(ed29c7ed2226613ed5d09ecef4e645e3b53f7f8d) ) /* Sync PROM */
- ROM_LOAD( "63s141.m10", 0x0100, 0x0100, BAD_DUMP CRC(b0b039c0) SHA1(724fa88f3f3c62b3c9345cdb13e114a10b7bbdb0) ) /* ??? PROM */
- ROM_LOAD( "82s129.p3", 0x0200, 0x0100, BAD_DUMP CRC(615d784d) SHA1(e7e6397ae45d6ae8b3670b457ede79c42d18d71f) ) /* VRAM Write Protect PROM */
- ROM_LOAD( "63s141.m8", 0x0300, 0x0100, BAD_DUMP CRC(6d7479ec) SHA1(7a7c30f5846b98afaaca2af9aab82416ebafe4cc) ) /* ??? PROM */
+ ROM_LOAD( "63s141.e10", 0x0000, 0x0100, BAD_DUMP CRC(8e98083f) SHA1(ed29c7ed2226613ed5d09ecef4e645e3b53f7f8d) ) /* Sync PROM */
+ ROM_LOAD( "63s141.m10", 0x0100, 0x0100, BAD_DUMP CRC(b0b039c0) SHA1(724fa88f3f3c62b3c9345cdb13e114a10b7bbdb0) ) /* ??? PROM */
+ ROM_LOAD( "82s129.p3", 0x0200, 0x0100, BAD_DUMP CRC(615d784d) SHA1(e7e6397ae45d6ae8b3670b457ede79c42d18d71f) ) /* VRAM Write Protect PROM */
+ ROM_LOAD( "63s141.m8", 0x0300, 0x0100, BAD_DUMP CRC(6d7479ec) SHA1(7a7c30f5846b98afaaca2af9aab82416ebafe4cc) ) /* ??? PROM */
ROM_END
@@ -495,10 +495,10 @@ ROM_START( firebeas )
ROM_LOAD( "mo6000.m12", 0x6000, 0x2000, CRC(b722997f) SHA1(65a2618ecd8b4923f30f59c1fb95124cf0391964) )
ROM_REGION( 0x400, "proms", 0 )
- ROM_LOAD( "63s141.e10", 0x0000, 0x0100, CRC(8e98083f) SHA1(ed29c7ed2226613ed5d09ecef4e645e3b53f7f8d) ) /* Sync PROM */
- ROM_LOAD( "63s141.m10", 0x0100, 0x0100, CRC(b0b039c0) SHA1(724fa88f3f3c62b3c9345cdb13e114a10b7bbdb0) ) /* ??? PROM */
- ROM_LOAD( "82s129.p3", 0x0200, 0x0100, CRC(615d784d) SHA1(e7e6397ae45d6ae8b3670b457ede79c42d18d71f) ) /* VRAM Write Protect PROM */
- ROM_LOAD( "63s141.m8", 0x0300, 0x0100, CRC(6d7479ec) SHA1(7a7c30f5846b98afaaca2af9aab82416ebafe4cc) ) /* ??? PROM */
+ ROM_LOAD( "63s141.e10", 0x0000, 0x0100, CRC(8e98083f) SHA1(ed29c7ed2226613ed5d09ecef4e645e3b53f7f8d) ) /* Sync PROM */
+ ROM_LOAD( "63s141.m10", 0x0100, 0x0100, CRC(b0b039c0) SHA1(724fa88f3f3c62b3c9345cdb13e114a10b7bbdb0) ) /* ??? PROM */
+ ROM_LOAD( "82s129.p3", 0x0200, 0x0100, CRC(615d784d) SHA1(e7e6397ae45d6ae8b3670b457ede79c42d18d71f) ) /* VRAM Write Protect PROM */
+ ROM_LOAD( "63s141.m8", 0x0300, 0x0100, CRC(6d7479ec) SHA1(7a7c30f5846b98afaaca2af9aab82416ebafe4cc) ) /* ??? PROM */
ROM_END
diff --git a/src/mame/drivers/clshroad.c b/src/mame/drivers/clshroad.c
index 00298804197..c8e068245d4 100644
--- a/src/mame/drivers/clshroad.c
+++ b/src/mame/drivers/clshroad.c
@@ -30,7 +30,7 @@ void clshroad_state::machine_reset()
READ8_MEMBER(clshroad_state::clshroad_input_r)
{
- return ((~ioport("P1")->read() & (1 << offset)) ? 1 : 0) |
+ return ((~ioport("P1")->read() & (1 << offset)) ? 1 : 0) |
((~ioport("P2")->read() & (1 << offset)) ? 2 : 0) |
((~ioport("DSW1")->read() & (1 << offset)) ? 4 : 0) |
((~ioport("DSW2")->read() & (1 << offset)) ? 8 : 0) ;
@@ -43,19 +43,19 @@ static ADDRESS_MAP_START( clshroad_map, AS_PROGRAM, 8, clshroad_state )
AM_RANGE(0x9600, 0x97ff) AM_RAM AM_SHARE("share1")
AM_RANGE(0x9800, 0x9dff) AM_RAM
AM_RANGE(0x9e00, 0x9fff) AM_RAM AM_SHARE("spriteram")
- AM_RANGE(0xa001, 0xa001) AM_WRITENOP // ? Interrupt related
+ AM_RANGE(0xa001, 0xa001) AM_WRITENOP // ? Interrupt related
AM_RANGE(0xa004, 0xa004) AM_WRITE(clshroad_flipscreen_w)
AM_RANGE(0xa100, 0xa107) AM_READ(clshroad_input_r)
- AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(clshroad_vram_1_w) AM_SHARE("vram_1") // Layer 1
- AM_RANGE(0xb000, 0xb003) AM_WRITEONLY AM_SHARE("vregs") // Scroll
- AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(clshroad_vram_0_w) AM_SHARE("vram_0") // Layer 0
+ AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(clshroad_vram_1_w) AM_SHARE("vram_1") // Layer 1
+ AM_RANGE(0xb000, 0xb003) AM_WRITEONLY AM_SHARE("vregs") // Scroll
+ AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(clshroad_vram_0_w) AM_SHARE("vram_0") // Layer 0
ADDRESS_MAP_END
static ADDRESS_MAP_START( clshroad_sound_map, AS_PROGRAM, 8, clshroad_state )
AM_RANGE(0x0000, 0x1fff) AM_ROM
AM_RANGE(0x4000, 0x7fff) AM_DEVWRITE_LEGACY("custom", wiping_sound_w)
AM_RANGE(0x9600, 0x97ff) AM_RAM AM_SHARE("share1")
- AM_RANGE(0xa003, 0xa003) AM_WRITENOP // ? Interrupt related
+ AM_RANGE(0xa003, 0xa003) AM_WRITENOP // ? Interrupt related
ADDRESS_MAP_END
@@ -82,24 +82,24 @@ static INPUT_PORTS_START( clshroad )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:3")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5") // Damage when falling
- PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // 8
- PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) // A
- PORT_DIPSETTING( 0x08, DEF_STR( Harder ) ) // C
- PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) // E
- PORT_DIPNAME( 0x20, 0x20, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6")
+ PORT_DIPNAME( 0x18, 0x18, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:4,5") // Damage when falling
+ PORT_DIPSETTING( 0x18, DEF_STR( Normal ) ) // 8
+ PORT_DIPSETTING( 0x10, DEF_STR( Hard ) ) // A
+ PORT_DIPSETTING( 0x08, DEF_STR( Harder ) ) // C
+ PORT_DIPSETTING( 0x00, DEF_STR( Hardest ) ) // E
+ PORT_DIPNAME( 0x20, 0x20, "Invulnerability (Cheat)") PORT_DIPLOCATION("SW1:6")
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW1:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8" ) /* Listed as "Unused" */
/* DSW2 is listed as "Unused" */
PORT_START("DSW2")
@@ -115,14 +115,14 @@ first bit OFF is: 0 0 <- value
But the values seems unused then.
*/
- PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:1" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:2" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:3" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
- PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW2:1" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW2:2" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW2:3" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW2:6" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7" ) /* Listed as "Unused" */
+ PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8" ) /* Listed as "Unused" */
INPUT_PORTS_END
static INPUT_PORTS_START( firebatl )
@@ -147,7 +147,7 @@ static INPUT_PORTS_START( firebatl )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
PORT_START("DSW1")
- PORT_DIPNAME( 0x7f, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6,7")
+ PORT_DIPNAME( 0x7f, 0x03, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2,3,4,5,6,7")
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x01, "2" )
PORT_DIPSETTING( 0x03, "3" )
@@ -159,18 +159,18 @@ static INPUT_PORTS_START( firebatl )
PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "SW1:8" )
PORT_START("DSW2")
- PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:1,2")
+ PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW2:1,2")
PORT_DIPSETTING( 0x00, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:4")
+ PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:4")
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5")
+ PORT_DIPNAME( 0x10, 0x10, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:5")
PORT_DIPSETTING( 0x10, "10K 30K+" )
PORT_DIPSETTING( 0x00, "20K 30K+" )
PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW2:6" )
@@ -229,13 +229,13 @@ GFXDECODE_END
static MACHINE_CONFIG_START( firebatl, clshroad_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, 3000000) /* ? */
+ MCFG_CPU_ADD("maincpu", Z80, 3000000) /* ? */
MCFG_CPU_PROGRAM_MAP(clshroad_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
- MCFG_CPU_ADD("audiocpu", Z80, 3000000) /* ? */
+ MCFG_CPU_ADD("audiocpu", Z80, 3000000) /* ? */
MCFG_CPU_PROGRAM_MAP(clshroad_sound_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
/* video hardware */
@@ -262,13 +262,13 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( clshroad, clshroad_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/4) /* ? real speed unknown. 3MHz is too low and causes problems */
+ MCFG_CPU_ADD("maincpu", Z80, XTAL_18_432MHz/4) /* ? real speed unknown. 3MHz is too low and causes problems */
MCFG_CPU_PROGRAM_MAP(clshroad_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
- MCFG_CPU_ADD("audiocpu", Z80, XTAL_18_432MHz/6) /* ? */
+ MCFG_CPU_ADD("audiocpu", Z80, XTAL_18_432MHz/6) /* ? */
MCFG_CPU_PROGRAM_MAP(clshroad_sound_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", clshroad_state, irq0_line_hold) /* IRQ, no NMI */
/* video hardware */
@@ -295,126 +295,126 @@ MACHINE_CONFIG_END
ROM_START( firebatl )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
ROM_LOAD( "rom01", 0x00000, 0x2000, CRC(10e24ef6) SHA1(b6dae9824eb3cecececbdfdb416a90b1b61ff18d) )
ROM_LOAD( "rom02", 0x02000, 0x2000, CRC(47f79bee) SHA1(23e64ff69ff5112b0413d12a283ca90cf3642389) )
ROM_LOAD( "rom03", 0x04000, 0x2000, CRC(693459b9) SHA1(8bba526960f49c9e6c7bca40eb8fbbfc81588660) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
ROM_LOAD( "rom04", 0x0000, 0x2000, CRC(5f232d9a) SHA1(d0b9926cb02203f1a1f7fd0d0d7b1fe8eddc6511) )
- ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
+ ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
ROM_LOAD( "rom14", 0x0000, 0x2000, CRC(36a508a7) SHA1(9b2dede4332d2b8e55e7c5f916d8cf370d7e77fc) )
ROM_LOAD( "rom13", 0x2000, 0x2000, CRC(a2ec508e) SHA1(a6dd7b9729f320ed3a28e0cd8ea7b26c2a639e1a) )
ROM_LOAD( "rom12", 0x4000, 0x2000, CRC(f80ece92) SHA1(2cc4317b2c58be48dc285bb3a667863e2ca8d5b7) )
ROM_LOAD( "rom11", 0x6000, 0x2000, CRC(b293e701) SHA1(9dacaa9897d91dc465f2c1907804fed9bfb7207b) )
- ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
+ ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
ROM_LOAD( "rom09", 0x0000, 0x2000, CRC(77ea3e39) SHA1(c897664bd4f4b163a557d39d12374dae08a0a0c2) )
ROM_LOAD( "rom08", 0x2000, 0x2000, CRC(1b7585dd) SHA1(e402c879c5651bf0fa21dcf1ff3c4b7bf690cbaa) )
ROM_LOAD( "rom07", 0x4000, 0x2000, CRC(e3ec9825) SHA1(ea266683a48e8515d40ed077fd55d15a1859c942) )
ROM_LOAD( "rom06", 0x6000, 0x2000, CRC(d29fab5f) SHA1(de5f8d57d3dd9090e6c056ff7f1ab0bb59630863) )
- ROM_REGION( 0x01000, "gfx3", 0 ) /* Layer 1 */
+ ROM_REGION( 0x01000, "gfx3", 0 ) /* Layer 1 */
ROM_LOAD( "rom15", 0x0000, 0x1000, CRC(8b5464d6) SHA1(e65acd280c0d9776cb80073241cf260b76ff0ca6) )
ROM_REGION( 0x0a20, "proms", 0 )
- ROM_LOAD( "prom6.bpr", 0x0000, 0x0100, CRC(b117d22c) SHA1(357efed6597757907077a7e5130bfa643d5dd197) ) /* palette red? */
- ROM_LOAD( "prom7.bpr", 0x0100, 0x0100, CRC(9b6b4f56) SHA1(7fd726a20fce40b8ba4b8ef05fb51a85ad9fd282) ) /* palette green? */
- ROM_LOAD( "prom8.bpr", 0x0200, 0x0100, CRC(67cb68ae) SHA1(9b54c7e51d8db0d8699723173709f04dd2fdfa77) ) /* palette blue? */
- ROM_LOAD( "prom9.bpr", 0x0300, 0x0100, CRC(dd015b80) SHA1(ce45577204cfbbe623121c1bd99a190464ae7895) ) /* char lookup table msb? */
- ROM_LOAD( "prom10.bpr", 0x0400, 0x0100, CRC(71b768c7) SHA1(3d8c106758d279daf8e989d4c1bb72de3419d2d6) ) /* char lookup table lsb? */
- ROM_LOAD( "prom4.bpr", 0x0500, 0x0100, CRC(06523b81) SHA1(0042c364fd2fabd6b04cb2d59a71a7e6deb90ab3) ) /* unknown */
- ROM_LOAD( "prom5.bpr", 0x0600, 0x0100, CRC(75ea8f70) SHA1(1a2c478e7b87fa7f8725a3d1ff06c5c9422dd524) ) /* unknown */
- ROM_LOAD( "prom11.bpr", 0x0700, 0x0100, CRC(ba42a582) SHA1(2e8f3dab82a34078b866e9875978e83fef045f86) ) /* unknown */
- ROM_LOAD( "prom12.bpr", 0x0800, 0x0100, CRC(f2540c51) SHA1(126f698eb65e54fa16a1abfa5b40b0161cb66254) ) /* unknown */
- ROM_LOAD( "prom13.bpr", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
- ROM_LOAD( "prom1.bpr", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? (on the cpu board) */
-
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_LOAD( "prom6.bpr", 0x0000, 0x0100, CRC(b117d22c) SHA1(357efed6597757907077a7e5130bfa643d5dd197) ) /* palette red? */
+ ROM_LOAD( "prom7.bpr", 0x0100, 0x0100, CRC(9b6b4f56) SHA1(7fd726a20fce40b8ba4b8ef05fb51a85ad9fd282) ) /* palette green? */
+ ROM_LOAD( "prom8.bpr", 0x0200, 0x0100, CRC(67cb68ae) SHA1(9b54c7e51d8db0d8699723173709f04dd2fdfa77) ) /* palette blue? */
+ ROM_LOAD( "prom9.bpr", 0x0300, 0x0100, CRC(dd015b80) SHA1(ce45577204cfbbe623121c1bd99a190464ae7895) ) /* char lookup table msb? */
+ ROM_LOAD( "prom10.bpr", 0x0400, 0x0100, CRC(71b768c7) SHA1(3d8c106758d279daf8e989d4c1bb72de3419d2d6) ) /* char lookup table lsb? */
+ ROM_LOAD( "prom4.bpr", 0x0500, 0x0100, CRC(06523b81) SHA1(0042c364fd2fabd6b04cb2d59a71a7e6deb90ab3) ) /* unknown */
+ ROM_LOAD( "prom5.bpr", 0x0600, 0x0100, CRC(75ea8f70) SHA1(1a2c478e7b87fa7f8725a3d1ff06c5c9422dd524) ) /* unknown */
+ ROM_LOAD( "prom11.bpr", 0x0700, 0x0100, CRC(ba42a582) SHA1(2e8f3dab82a34078b866e9875978e83fef045f86) ) /* unknown */
+ ROM_LOAD( "prom12.bpr", 0x0800, 0x0100, CRC(f2540c51) SHA1(126f698eb65e54fa16a1abfa5b40b0161cb66254) ) /* unknown */
+ ROM_LOAD( "prom13.bpr", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
+ ROM_LOAD( "prom1.bpr", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? (on the cpu board) */
+
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "rom05", 0x0000, 0x2000, CRC(21544cd6) SHA1(b9644ab3c4393cd2669d2b5b3c80d7a9f1c91ca6) )
- ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
- ROM_LOAD( "prom3.bpr", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
- ROM_LOAD( "prom2.bpr", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
+ ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
+ ROM_LOAD( "prom3.bpr", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
+ ROM_LOAD( "prom2.bpr", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
ROM_END
ROM_START( clshroad )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
ROM_LOAD( "clashr3.bin", 0x0000, 0x8000, CRC(865c32ae) SHA1(e5cdd2d624fe6dc8bd6bebf2bd1c79d287408c63) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
ROM_LOAD( "clashr2.bin", 0x0000, 0x2000, CRC(e6389ec1) SHA1(6ec94d5e389e9104f40fc48df6f15674415851c0) )
- ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
+ ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
ROM_LOAD( "clashr5.bin", 0x0000, 0x4000, CRC(094858b8) SHA1(a19f79cb665bbb1e25a94e9dd09a9e99f553afe8) )
ROM_LOAD( "clashr6.bin", 0x4000, 0x4000, CRC(daa1daf3) SHA1(cc24c97c9950adc0041f68832774e40c87d1d4b2) )
- ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
+ ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
ROM_LOAD( "clashr8.bin", 0x0000, 0x4000, CRC(cbb66719) SHA1(2497575f84a956bc2b9e4c3f2c71ae42d036355e) )
ROM_LOAD( "clashr9.bin", 0x4000, 0x4000, CRC(c15e8eed) SHA1(3b1e7fa014d176a01d5f9214051b0c8cc5556684) )
- ROM_REGION( 0x04000, "gfx3", ROMREGION_INVERT) /* Layer 1 */
+ ROM_REGION( 0x04000, "gfx3", ROMREGION_INVERT) /* Layer 1 */
ROM_LOAD( "clashr4.bin", 0x0000, 0x2000, CRC(664201d9) SHA1(4eb85306f0c9683d0e0cf787f6389df8fe4a3d9d) )
ROM_LOAD( "clashr7.bin", 0x2000, 0x2000, CRC(97973030) SHA1(cca7a9d2751add7f6dd9bac83f7f63ece8021dbc) )
ROM_REGION( 0x0b40, "proms", 0 )
- ROM_LOAD( "82s129.6", 0x0000, 0x0100, CRC(38f443da) SHA1(a015217508b18eb3f1987cd5b53f31608b13de08) ) /* r */
- ROM_LOAD( "82s129.7", 0x0100, 0x0100, CRC(977fab0c) SHA1(78e7b4f1e9891d2d9cf1e1ec0c4f59a311cef1c5) ) /* g */
- ROM_LOAD( "82s129.8", 0x0200, 0x0100, CRC(ae7ae54d) SHA1(d7d4682e437f2f7adb7fceb813437c06f27f2711) ) /* b */
+ ROM_LOAD( "82s129.6", 0x0000, 0x0100, CRC(38f443da) SHA1(a015217508b18eb3f1987cd5b53f31608b13de08) ) /* r */
+ ROM_LOAD( "82s129.7", 0x0100, 0x0100, CRC(977fab0c) SHA1(78e7b4f1e9891d2d9cf1e1ec0c4f59a311cef1c5) ) /* g */
+ ROM_LOAD( "82s129.8", 0x0200, 0x0100, CRC(ae7ae54d) SHA1(d7d4682e437f2f7adb7fceb813437c06f27f2711) ) /* b */
/* all other proms that firebatl has are missing */
- ROM_LOAD( "clashrd.a2", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
- ROM_LOAD( "clashrd.g4", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? */
- ROM_LOAD( "clashrd.b11", 0x0a20, 0x0020, CRC(d453f2c5) SHA1(7fdc5bf59bad9e8f00e970565ff6f6b3773541db) ) /* unknown (possibly bad dump) */
- ROM_LOAD( "clashrd.g10", 0x0a40, 0x0100, CRC(73afefd0) SHA1(d14c5490c5b174d54043bfdf5c6fb675e67492e7) ) /* unknown (possibly bad dump) */
+ ROM_LOAD( "clashrd.a2", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
+ ROM_LOAD( "clashrd.g4", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? */
+ ROM_LOAD( "clashrd.b11", 0x0a20, 0x0020, CRC(d453f2c5) SHA1(7fdc5bf59bad9e8f00e970565ff6f6b3773541db) ) /* unknown (possibly bad dump) */
+ ROM_LOAD( "clashrd.g10", 0x0a40, 0x0100, CRC(73afefd0) SHA1(d14c5490c5b174d54043bfdf5c6fb675e67492e7) ) /* unknown (possibly bad dump) */
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "clashr1.bin", 0x0000, 0x2000, CRC(0d0a8068) SHA1(529878d0c5f078590e07ec0fffc27b212843c0ad) )
- ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
- ROM_LOAD( "clashrd.g8", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
- ROM_LOAD( "clashrd.g7", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
+ ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
+ ROM_LOAD( "clashrd.g8", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
+ ROM_LOAD( "clashrd.g7", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
ROM_END
ROM_START( clshroads )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
ROM_LOAD( "cr-3", 0x0000, 0x8000, CRC(23559df2) SHA1(41a08a4fbad3da1898226e2ca1956a9f7c8f94b0) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
ROM_LOAD( "clashr2.bin", 0x0000, 0x2000, CRC(e6389ec1) SHA1(6ec94d5e389e9104f40fc48df6f15674415851c0) )
- ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
+ ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
ROM_LOAD( "cr-12", 0x0000, 0x2000, CRC(e5aa4c46) SHA1(c0ed717e263aca2d0ec8a078f0aa3377357b9e3d) )
ROM_LOAD( "cr-11", 0x2000, 0x2000, CRC(7fc11c7c) SHA1(e798c4abe87fd701f250625ae6545ab00bcfbef5) )
ROM_LOAD( "cr-10", 0x4000, 0x2000, CRC(6b1293b7) SHA1(3219c03e87be0f53d4556a45d82278fc712f4d0b) )
ROM_LOAD( "cr-9", 0x6000, 0x2000, CRC(d219722c) SHA1(e68a0883113db43a878a5529fa8deb7816573e35) )
- ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
+ ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
ROM_LOAD( "cr-7", 0x0000, 0x2000, CRC(e8aa7ac3) SHA1(12f4f1041001ce6e77e9b0c691663f4a20969eaa) )
ROM_LOAD( "cr-6", 0x2000, 0x2000, CRC(037be475) SHA1(72a8c1da210239ecac96ea22e54a5d193f32ad83) )
ROM_LOAD( "cr-5", 0x4000, 0x2000, CRC(a4151734) SHA1(1ccf68270bbfd557cd8cca3f7f36e9e2de7e94e6) )
ROM_LOAD( "cr-4", 0x6000, 0x2000, CRC(5ef24757) SHA1(4c6a06fdadb0b52f62148642e0416c4f60c8048b) )
- ROM_REGION( 0x04000, "gfx3", ROMREGION_INVERT) /* Layer 1 */
+ ROM_REGION( 0x04000, "gfx3", ROMREGION_INVERT) /* Layer 1 */
ROM_LOAD( "cr-13", 0x0000, 0x2000, CRC(012a6412) SHA1(ae9757e56f896e4158e6af7dc12eb6c2a3755f4d) )
ROM_LOAD( "cr-8", 0x2000, 0x2000, CRC(3c2b816c) SHA1(3df3d9f49475ccfbb0792d98c3d12c8fd15034bc) )
ROM_REGION( 0x0b40, "proms", 0 )
- ROM_LOAD( "82s129.6", 0x0000, 0x0100, CRC(38f443da) SHA1(a015217508b18eb3f1987cd5b53f31608b13de08) ) /* r */
- ROM_LOAD( "82s129.7", 0x0100, 0x0100, CRC(977fab0c) SHA1(78e7b4f1e9891d2d9cf1e1ec0c4f59a311cef1c5) ) /* g */
- ROM_LOAD( "82s129.8", 0x0200, 0x0100, CRC(ae7ae54d) SHA1(d7d4682e437f2f7adb7fceb813437c06f27f2711) ) /* b */
+ ROM_LOAD( "82s129.6", 0x0000, 0x0100, CRC(38f443da) SHA1(a015217508b18eb3f1987cd5b53f31608b13de08) ) /* r */
+ ROM_LOAD( "82s129.7", 0x0100, 0x0100, CRC(977fab0c) SHA1(78e7b4f1e9891d2d9cf1e1ec0c4f59a311cef1c5) ) /* g */
+ ROM_LOAD( "82s129.8", 0x0200, 0x0100, CRC(ae7ae54d) SHA1(d7d4682e437f2f7adb7fceb813437c06f27f2711) ) /* b */
/* all other proms that firebatl has are missing */
- ROM_LOAD( "clashrd.a2", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
- ROM_LOAD( "clashrd.g4", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? */
- ROM_LOAD( "clashrd.b11", 0x0a20, 0x0020, CRC(d453f2c5) SHA1(7fdc5bf59bad9e8f00e970565ff6f6b3773541db) ) /* unknown (possibly bad dump) */
- ROM_LOAD( "clashrd.g10", 0x0a40, 0x0100, CRC(73afefd0) SHA1(d14c5490c5b174d54043bfdf5c6fb675e67492e7) ) /* unknown (possibly bad dump) */
+ ROM_LOAD( "clashrd.a2", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
+ ROM_LOAD( "clashrd.g4", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? */
+ ROM_LOAD( "clashrd.b11", 0x0a20, 0x0020, CRC(d453f2c5) SHA1(7fdc5bf59bad9e8f00e970565ff6f6b3773541db) ) /* unknown (possibly bad dump) */
+ ROM_LOAD( "clashrd.g10", 0x0a40, 0x0100, CRC(73afefd0) SHA1(d14c5490c5b174d54043bfdf5c6fb675e67492e7) ) /* unknown (possibly bad dump) */
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "clashr1.bin", 0x0000, 0x2000, CRC(0d0a8068) SHA1(529878d0c5f078590e07ec0fffc27b212843c0ad) )
- ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
- ROM_LOAD( "clashrd.g8", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
- ROM_LOAD( "clashrd.g7", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
+ ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
+ ROM_LOAD( "clashrd.g8", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
+ ROM_LOAD( "clashrd.g7", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
ROM_END
// this set came from a bootleg board, but I believe it to be original for the following reason:
@@ -422,40 +422,40 @@ ROM_END
// set the Wood Place string is padded with several 0x20 (Space) characters to fit the same number of bytes
// in which the Data East Corporation string fits, suggesting that they always planned to put it there.
ROM_START( clshroadd )
- ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
+ ROM_REGION( 0x10000, "maincpu", 0 ) /* Main Z80 Code */
ROM_LOAD( "crdeco-3.bin", 0x0000, 0x8000, CRC(1d54195c) SHA1(4b1d7d333707b5ebd57572742eb74df5abe8a70d) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound Z80 Code */
ROM_LOAD( "clashr2.bin", 0x0000, 0x2000, CRC(e6389ec1) SHA1(6ec94d5e389e9104f40fc48df6f15674415851c0) )
- ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
+ ROM_REGION( 0x08000, "gfx1", ROMREGION_INVERT ) /* Sprites */
ROM_LOAD( "clashr5.bin", 0x0000, 0x4000, CRC(094858b8) SHA1(a19f79cb665bbb1e25a94e9dd09a9e99f553afe8) )
ROM_LOAD( "clashr6.bin", 0x4000, 0x4000, CRC(daa1daf3) SHA1(cc24c97c9950adc0041f68832774e40c87d1d4b2) )
- ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
+ ROM_REGION( 0x08000, "gfx2", ROMREGION_INVERT ) /* Layer 0 */
ROM_LOAD( "clashr8.bin", 0x0000, 0x4000, CRC(cbb66719) SHA1(2497575f84a956bc2b9e4c3f2c71ae42d036355e) )
ROM_LOAD( "clashr9.bin", 0x4000, 0x4000, CRC(c15e8eed) SHA1(3b1e7fa014d176a01d5f9214051b0c8cc5556684) )
- ROM_REGION( 0x04000, "gfx3", ROMREGION_INVERT) /* Layer 1 */
+ ROM_REGION( 0x04000, "gfx3", ROMREGION_INVERT) /* Layer 1 */
ROM_LOAD( "clashr4.bin", 0x0000, 0x2000, CRC(664201d9) SHA1(4eb85306f0c9683d0e0cf787f6389df8fe4a3d9d) )
ROM_LOAD( "clashr7.bin", 0x2000, 0x2000, CRC(97973030) SHA1(cca7a9d2751add7f6dd9bac83f7f63ece8021dbc) )
ROM_REGION( 0x0b40, "proms", 0 )
- ROM_LOAD( "82s129.6", 0x0000, 0x0100, CRC(38f443da) SHA1(a015217508b18eb3f1987cd5b53f31608b13de08) ) /* r */
- ROM_LOAD( "82s129.7", 0x0100, 0x0100, CRC(977fab0c) SHA1(78e7b4f1e9891d2d9cf1e1ec0c4f59a311cef1c5) ) /* g */
- ROM_LOAD( "82s129.8", 0x0200, 0x0100, CRC(ae7ae54d) SHA1(d7d4682e437f2f7adb7fceb813437c06f27f2711) ) /* b */
+ ROM_LOAD( "82s129.6", 0x0000, 0x0100, CRC(38f443da) SHA1(a015217508b18eb3f1987cd5b53f31608b13de08) ) /* r */
+ ROM_LOAD( "82s129.7", 0x0100, 0x0100, CRC(977fab0c) SHA1(78e7b4f1e9891d2d9cf1e1ec0c4f59a311cef1c5) ) /* g */
+ ROM_LOAD( "82s129.8", 0x0200, 0x0100, CRC(ae7ae54d) SHA1(d7d4682e437f2f7adb7fceb813437c06f27f2711) ) /* b */
/* all other proms that firebatl has are missing */
- ROM_LOAD( "clashrd.a2", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
- ROM_LOAD( "clashrd.g4", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? */
- ROM_LOAD( "clashrd.b11", 0x0a20, 0x0020, CRC(d453f2c5) SHA1(7fdc5bf59bad9e8f00e970565ff6f6b3773541db) ) /* unknown (possibly bad dump) */
- ROM_LOAD( "clashrd.g10", 0x0a40, 0x0100, CRC(73afefd0) SHA1(d14c5490c5b174d54043bfdf5c6fb675e67492e7) ) /* unknown (possibly bad dump) */
+ ROM_LOAD( "clashrd.a2", 0x0900, 0x0100, CRC(4e2a2781) SHA1(7be2e066499ea0af76f6ae926fe87e02f8c36a6f) ) /* unknown */
+ ROM_LOAD( "clashrd.g4", 0x0a00, 0x0020, CRC(1afc04f0) SHA1(38207cf3e15bac7034ac06469b95708d22b57da4) ) /* timing? */
+ ROM_LOAD( "clashrd.b11", 0x0a20, 0x0020, CRC(d453f2c5) SHA1(7fdc5bf59bad9e8f00e970565ff6f6b3773541db) ) /* unknown (possibly bad dump) */
+ ROM_LOAD( "clashrd.g10", 0x0a40, 0x0100, CRC(73afefd0) SHA1(d14c5490c5b174d54043bfdf5c6fb675e67492e7) ) /* unknown (possibly bad dump) */
- ROM_REGION( 0x2000, "samples", 0 ) /* samples */
+ ROM_REGION( 0x2000, "samples", 0 ) /* samples */
ROM_LOAD( "clashr1.bin", 0x0000, 0x2000, CRC(0d0a8068) SHA1(529878d0c5f078590e07ec0fffc27b212843c0ad) )
- ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
- ROM_LOAD( "clashrd.g8", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
- ROM_LOAD( "clashrd.g7", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
+ ROM_REGION( 0x0200, "soundproms", 0 ) /* 4bit->8bit sample expansion PROMs */
+ ROM_LOAD( "clashrd.g8", 0x0000, 0x0100, CRC(bd2c080b) SHA1(9782bb5001e96db56bc29df398187f700bce4f8e) ) /* low 4 bits */
+ ROM_LOAD( "clashrd.g7", 0x0100, 0x0100, CRC(4017a2a6) SHA1(dadef2de7a1119758c8e6d397aa42815b0218889) ) /* high 4 bits */
ROM_END
DRIVER_INIT_MEMBER(clshroad_state,firebatl)
diff --git a/src/mame/drivers/cmmb.c b/src/mame/drivers/cmmb.c
index 62f52e544e0..c43e04ef0c8 100644
--- a/src/mame/drivers/cmmb.c
+++ b/src/mame/drivers/cmmb.c
@@ -117,14 +117,14 @@ WRITE8_MEMBER(cmmb_state::cmmb_charram_w)
/* dirty char */
machine().gfx[0]->mark_dirty(offset >> 4);
- machine().gfx[1]->mark_dirty(offset >> 5);
+ machine().gfx[1]->mark_dirty(offset >> 5);
}
WRITE8_MEMBER(cmmb_state::cmmb_paletteram_w)
{
- /* RGB output is inverted */
- paletteram_RRRGGGBB_byte_w(space,offset,~data);
+ /* RGB output is inverted */
+ paletteram_RRRGGGBB_byte_w(space,offset,~data);
}
READ8_MEMBER(cmmb_state::cmmb_input_r)
@@ -348,7 +348,7 @@ MACHINE_CONFIG_END
ROM_START( cmmb162 )
ROM_REGION( 0x50000, "maincpu", 0 )
ROM_LOAD( "cmmb162.u2", 0x10000, 0x40000, CRC(71a5a75d) SHA1(0ad7b97580082cda98cb1e8aab8efcf491d0ed25) )
- ROM_COPY( "maincpu", 0x18000, 0x08000, 0x08000 )
+ ROM_COPY( "maincpu", 0x18000, 0x08000, 0x08000 )
ROM_REGION( 0x1000, "gfx", ROMREGION_ERASE00 )
ROM_END
diff --git a/src/mame/drivers/cninja.c b/src/mame/drivers/cninja.c
index a0c4ec63f68..0ad60afbf1f 100644
--- a/src/mame/drivers/cninja.c
+++ b/src/mame/drivers/cninja.c
@@ -96,10 +96,10 @@ WRITE16_MEMBER(cninja_state::cninja_irq_w)
{
case 0:
/* IRQ enable:
- 0xca: Raster IRQ turned off
- 0xc8: Raster IRQ turned on (68k IRQ level 4)
- 0xd8: Raster IRQ turned on (68k IRQ level 3)
- */
+ 0xca: Raster IRQ turned off
+ 0xc8: Raster IRQ turned on (68k IRQ level 4)
+ 0xd8: Raster IRQ turned on (68k IRQ level 3)
+ */
logerror("%08x: IRQ write %d %08x\n", space.device().safe_pc(), offset, data);
m_irq_mask = data & 0xff;
return;
@@ -180,10 +180,10 @@ static ADDRESS_MAP_START( cninja_map, AS_PROGRAM, 16, cninja_state )
AM_RANGE(0x190000, 0x190007) AM_READWRITE(cninja_irq_r, cninja_irq_w)
AM_RANGE(0x19c000, 0x19dfff) AM_RAM_DEVWRITE_LEGACY("deco_common", decocomn_nonbuffered_palette_w) AM_SHARE("paletteram")
- AM_RANGE(0x1a4000, 0x1a47ff) AM_RAM AM_SHARE("spriteram") /* Sprites */
+ AM_RANGE(0x1a4000, 0x1a47ff) AM_RAM AM_SHARE("spriteram") /* Sprites */
AM_RANGE(0x1b4000, 0x1b4001) AM_DEVWRITE("spriteram", buffered_spriteram16_device, write) /* DMA flag */
- AM_RANGE(0x1bc000, 0x1bc0ff) AM_WRITE_LEGACY(deco16_104_cninja_prot_w) AM_SHARE("prot16ram") /* Protection writes */
- AM_RANGE(0x1bc000, 0x1bcfff) AM_READ_LEGACY(deco16_104_cninja_prot_r) AM_SHARE("prot16ram") /* Protection device */
+ AM_RANGE(0x1bc000, 0x1bc0ff) AM_WRITE_LEGACY(deco16_104_cninja_prot_w) AM_SHARE("prot16ram") /* Protection writes */
+ AM_RANGE(0x1bc000, 0x1bcfff) AM_READ_LEGACY(deco16_104_cninja_prot_r) AM_SHARE("prot16ram") /* Protection device */
AM_RANGE(0x308000, 0x308fff) AM_WRITENOP /* Bootleg only */
ADDRESS_MAP_END
@@ -199,7 +199,7 @@ static ADDRESS_MAP_START( cninjabl_map, AS_PROGRAM, 16, cninja_state )
AM_RANGE(0x14c000, 0x14c7ff) AM_WRITEONLY AM_SHARE("pf1_rowscroll")
AM_RANGE(0x14e000, 0x14e7ff) AM_RAM AM_SHARE("pf2_rowscroll")
- AM_RANGE(0x150000, 0x15000f) AM_WRITE(cninja_pf34_control_w) // not used / incorrect on this
+ AM_RANGE(0x150000, 0x15000f) AM_WRITE(cninja_pf34_control_w) // not used / incorrect on this
AM_RANGE(0x154000, 0x154fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf1_data_r, deco16ic_pf1_data_w)
AM_RANGE(0x156000, 0x156fff) AM_DEVREADWRITE_LEGACY("tilegen2", deco16ic_pf2_data_r, deco16ic_pf2_data_w)
AM_RANGE(0x15c000, 0x15c7ff) AM_RAM AM_SHARE("pf3_rowscroll")
@@ -399,20 +399,20 @@ static INPUT_PORTS_START( edrandy )
PORT_DIPSETTING( 0x0080, "1" )
PORT_DIPSETTING( 0x0000, "2" )
- PORT_DIPNAME( 0x0300, 0x0300, "Player's Power" ) PORT_DIPLOCATION("SW2:1,2") /* Energy */
- PORT_DIPSETTING( 0x0100, DEF_STR( Very_Low ) ) /* 2.5 */
- PORT_DIPSETTING( 0x0000, DEF_STR( Low ) ) /* 3 */
- PORT_DIPSETTING( 0x0300, DEF_STR( Medium ) ) /* 3.5 */
- PORT_DIPSETTING( 0x0200, DEF_STR( High ) ) /* 4.5 */
+ PORT_DIPNAME( 0x0300, 0x0300, "Player's Power" ) PORT_DIPLOCATION("SW2:1,2") /* Energy */
+ PORT_DIPSETTING( 0x0100, DEF_STR( Very_Low ) ) /* 2.5 */
+ PORT_DIPSETTING( 0x0000, DEF_STR( Low ) ) /* 3 */
+ PORT_DIPSETTING( 0x0300, DEF_STR( Medium ) ) /* 3.5 */
+ PORT_DIPSETTING( 0x0200, DEF_STR( High ) ) /* 4.5 */
PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
PORT_DIPSETTING( 0x0800, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0400, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") /* Listed as "Don't Change" in the manual */
+ PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") /* Listed as "Don't Change" in the manual */
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") /* Listed as "Don't Change" in the manual */
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") /* Listed as "Don't Change" in the manual */
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Continues ) ) PORT_DIPLOCATION("SW2:7")
@@ -427,7 +427,7 @@ static INPUT_PORTS_START( edrandc )
PORT_INCLUDE(edrandy)
PORT_MODIFY("DSW")
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") /* Listed as "Don't Change" in the manual */
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") /* Listed as "Don't Change" in the manual */
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
INPUT_PORTS_END
@@ -443,16 +443,16 @@ static INPUT_PORTS_START( cninja )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_START("DSW") /* Dip switch bank 1 */
+ PORT_START("DSW") /* Dip switch bank 1 */
DATAEAST_COINAGE
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") /* If DS #1-#6 are all ON */
- PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) /* Standard Coin Credit */
- PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) /* 2 Coins to Start / 1 Coin to Continue */
+ PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:8") /* If DS #1-#6 are all ON */
+ PORT_DIPSETTING( 0x0080, DEF_STR( Off ) ) /* Standard Coin Credit */
+ PORT_DIPSETTING( 0x0000, DEF_STR( On ) ) /* 2 Coins to Start / 1 Coin to Continue */
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2") /* Dip switch bank 2 */
PORT_DIPSETTING( 0x0100, "1" )
@@ -464,13 +464,13 @@ static INPUT_PORTS_START( cninja )
PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0400, DEF_STR( Hard ) )
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
- PORT_DIPNAME( 0x1000, 0x1000, "Restore Life Meter" ) PORT_DIPLOCATION("SW2:5") /* Recovery of Life After Defeated Boss */
+ PORT_DIPNAME( 0x1000, 0x1000, "Restore Life Meter" ) PORT_DIPLOCATION("SW2:5") /* Recovery of Life After Defeated Boss */
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") /* Listed as "Don't Change" in the manual */
+ PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6") /* Listed as "Don't Change" in the manual */
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
- PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") /* Listed as "Don't Change" in the manual */
+ PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:7") /* Listed as "Don't Change" in the manual */
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
@@ -512,7 +512,7 @@ static INPUT_PORTS_START( robocop2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_START("DSW") /* Dip switch bank 1 */
+ PORT_START("DSW") /* Dip switch bank 1 */
DATAEAST_COINAGE
@@ -546,7 +546,7 @@ static INPUT_PORTS_START( robocop2 )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_START("DSW3")
- PORT_DIPNAME( 0x0003, 0x0003, "Bullets" ) PORT_DIPLOCATION("SW3:1,2") /* Dip switch bank 3 */
+ PORT_DIPNAME( 0x0003, 0x0003, "Bullets" ) PORT_DIPLOCATION("SW3:1,2") /* Dip switch bank 3 */
PORT_DIPSETTING( 0x0000, "Least" )
PORT_DIPSETTING( 0x0001, "Less" )
PORT_DIPSETTING( 0x0003, DEF_STR( Normal ) )
@@ -580,7 +580,7 @@ static INPUT_PORTS_START( mutantf )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
- PORT_START("DSW") /* Dip switch bank 1 */
+ PORT_START("DSW") /* Dip switch bank 1 */
DATAEAST_COINAGE
@@ -624,7 +624,7 @@ static const gfx_layout charlayout =
{ RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 },
{ 0, 1, 2, 3, 4, 5, 6, 7 },
{ 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
- 16*8 /* every char takes 8 consecutive bytes */
+ 16*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout charlayout_boot =
@@ -678,34 +678,34 @@ static const gfx_layout tilelayout_8bpp =
};
static GFXDECODE_START( cninja )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 32 ) /* Characters 8x8 */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 32 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 512, 64 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 ) /* Sprites 16x16 */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 32 ) /* Characters 8x8 */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 32 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 512, 64 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 ) /* Sprites 16x16 */
GFXDECODE_END
static GFXDECODE_START( cninjabl )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout_boot, 0, 32 ) /* Characters 8x8 */
- GFXDECODE_ENTRY( "gfx2", 0, spritelayout,0, 32 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx3", 0, spritelayout,512, 64 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 ) /* Sprites 16x16 */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout_boot, 0, 32 ) /* Characters 8x8 */
+ GFXDECODE_ENTRY( "gfx2", 0, spritelayout,0, 32 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx3", 0, spritelayout,512, 64 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 ) /* Sprites 16x16 */
GFXDECODE_END
static GFXDECODE_START( robocop2 )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 32 ) /* Characters 8x8 */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 32 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 512, 64 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 ) /* Sprites 16x16 */
- GFXDECODE_ENTRY( "gfx3", 0, tilelayout_8bpp, 512, 1 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 32 ) /* Characters 8x8 */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 32 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 512, 64 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx4", 0, spritelayout,768, 32 ) /* Sprites 16x16 */
+ GFXDECODE_ENTRY( "gfx3", 0, tilelayout_8bpp, 512, 1 ) /* Tiles 16x16 */
GFXDECODE_END
static GFXDECODE_START( mutantf )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 64 ) /* Characters 8x8 */
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 64 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 0, 64 ) /* Tiles 16x16 */
- GFXDECODE_ENTRY( "gfx4", 0, spritelayout, 0, 128 ) /* Sprites 16x16 */
- GFXDECODE_ENTRY( "gfx5", 0, spritelayout, 0, 16 ) /* Sprites 16x16 */
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 64 ) /* Characters 8x8 */
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 64 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx3", 0, tilelayout, 0, 64 ) /* Tiles 16x16 */
+ GFXDECODE_ENTRY( "gfx4", 0, spritelayout, 0, 128 ) /* Sprites 16x16 */
+ GFXDECODE_ENTRY( "gfx5", 0, spritelayout, 0, 16 ) /* Sprites 16x16 */
GFXDECODE_END
/**********************************************************************************/
@@ -751,7 +751,7 @@ static const deco16ic_interface cninja_deco16ic_tilegen1_intf =
1, 1,
0x0f, 0x0f, /* trans masks (default values) */
0, 16, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
NULL,
NULL,
0, 1,
@@ -761,9 +761,9 @@ static const deco16ic_interface cninja_deco16ic_tilegen2_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0, 48, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
cninja_bank_callback,
cninja_bank_callback,
0, 2,
@@ -787,9 +787,9 @@ static const deco16ic_interface edrandy_deco16ic_tilegen2_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0, 48, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
cninja_bank_callback,
cninja_bank_callback,
0,2,
@@ -800,7 +800,7 @@ static const deco16ic_interface robocop2_deco16ic_tilegen1_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0, 16, /* color base */
0x0f, 0x0f, /* color masks (default values) */
NULL,
@@ -812,9 +812,9 @@ static const deco16ic_interface robocop2_deco16ic_tilegen2_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0, 48, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
robocop2_bank_callback,
robocop2_bank_callback,
0,2,
@@ -825,9 +825,9 @@ static const deco16ic_interface mutantf_deco16ic_tilegen1_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0, 0x30, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
mutantf_1_bank_callback,
mutantf_2_bank_callback,
0,1,
@@ -837,9 +837,9 @@ static const deco16ic_interface mutantf_deco16ic_tilegen2_intf =
{
"screen",
0, 1,
- 0x0f, 0x0f, /* trans masks (default values) */
+ 0x0f, 0x0f, /* trans masks (default values) */
0x20, 0x40, /* color base */
- 0x0f, 0x0f, /* color masks (default values) */
+ 0x0f, 0x0f, /* color masks (default values) */
mutantf_1_bank_callback,
mutantf_1_bank_callback,
0,2,
@@ -883,7 +883,7 @@ static MACHINE_CONFIG_START( cninja, cninja_state )
MCFG_CPU_PROGRAM_MAP(cninja_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cninja_state, irq5_line_hold)
- MCFG_CPU_ADD("audiocpu", H6280,32220000/8) /* Accurate */
+ MCFG_CPU_ADD("audiocpu", H6280,32220000/8) /* Accurate */
MCFG_CPU_PROGRAM_MAP(sound_map)
@@ -1032,7 +1032,7 @@ static MACHINE_CONFIG_START( edrandy, cninja_state )
MCFG_CPU_PROGRAM_MAP(edrandy_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cninja_state, irq5_line_hold)
- MCFG_CPU_ADD("audiocpu", H6280,32220000/8) /* Accurate */
+ MCFG_CPU_ADD("audiocpu", H6280,32220000/8) /* Accurate */
MCFG_CPU_PROGRAM_MAP(sound_map)
@@ -1086,7 +1086,7 @@ static MACHINE_CONFIG_START( robocop2, cninja_state )
MCFG_CPU_PROGRAM_MAP(robocop2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cninja_state, irq5_line_hold)
- MCFG_CPU_ADD("audiocpu", H6280,32220000/8) /* Accurate */
+ MCFG_CPU_ADD("audiocpu", H6280,32220000/8) /* Accurate */
MCFG_CPU_PROGRAM_MAP(sound_map)
@@ -1207,20 +1207,20 @@ ROM_START( cninja ) /* World ver 4 */
ROM_LOAD( "gl-07.rom", 0x00000, 0x10000, CRC(ca8bef96) SHA1(fcdbd598c85e339a3389a2ef58cf2d5b3a2779af) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
+ ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
ROM_REGION( 0x080000, "gfx2", 0 )
- ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
+ ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
+ ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
ROM_CONTINUE( 0x080000, 0x40000 )
- ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
+ ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
ROM_CONTINUE( 0x0c0000, 0x40000 )
ROM_REGION( 0x200000, "gfx4", 0 )
- ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
+ ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
@@ -1229,10 +1229,10 @@ ROM_START( cninja ) /* World ver 4 */
ROM_LOAD( "gl-06.rom", 0x00000, 0x20000, CRC(d92e519d) SHA1(08238f12bf7058a3965ab6348b468e3d35d4cd23) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
+ ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
+ ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
ROM_END
ROM_START( cninja1 ) /* World ver 1 */
@@ -1248,20 +1248,20 @@ ROM_START( cninja1 ) /* World ver 1 */
ROM_LOAD( "gl-07.rom", 0x00000, 0x10000, CRC(ca8bef96) SHA1(fcdbd598c85e339a3389a2ef58cf2d5b3a2779af) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
+ ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
ROM_REGION( 0x080000, "gfx2", 0 )
- ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
+ ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
+ ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
ROM_CONTINUE( 0x080000, 0x40000 )
- ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
+ ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
ROM_CONTINUE( 0x0c0000, 0x40000 )
ROM_REGION( 0x200000, "gfx4", 0 )
- ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
+ ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
@@ -1270,10 +1270,10 @@ ROM_START( cninja1 ) /* World ver 1 */
ROM_LOAD( "gl-06.rom", 0x00000, 0x20000, CRC(d92e519d) SHA1(08238f12bf7058a3965ab6348b468e3d35d4cd23) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
+ ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
+ ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
ROM_END
ROM_START( cninjau ) /* US ver 4 */
@@ -1289,20 +1289,20 @@ ROM_START( cninjau ) /* US ver 4 */
ROM_LOAD( "gl-07.rom", 0x00000, 0x10000, CRC(ca8bef96) SHA1(fcdbd598c85e339a3389a2ef58cf2d5b3a2779af) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
+ ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
ROM_REGION( 0x080000, "gfx2", 0 )
- ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
+ ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
+ ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
ROM_CONTINUE( 0x080000, 0x40000 )
- ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
+ ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
ROM_CONTINUE( 0x0c0000, 0x40000 )
ROM_REGION( 0x200000, "gfx4", 0 )
- ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
+ ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
@@ -1311,10 +1311,10 @@ ROM_START( cninjau ) /* US ver 4 */
ROM_LOAD( "gl-06.rom", 0x00000, 0x20000, CRC(d92e519d) SHA1(08238f12bf7058a3965ab6348b468e3d35d4cd23) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
+ ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
+ ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
ROM_END
ROM_START( cninjaa )
@@ -1330,20 +1330,20 @@ ROM_START( cninjaa )
ROM_LOAD( "gl-07.rom", 0x00000, 0x10000, CRC(ca8bef96) SHA1(fcdbd598c85e339a3389a2ef58cf2d5b3a2779af) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
+ ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
ROM_REGION( 0x080000, "gfx2", 0 )
- ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
+ ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
+ ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
ROM_CONTINUE( 0x080000, 0x40000 )
- ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
+ ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
ROM_CONTINUE( 0x0c0000, 0x40000 )
ROM_REGION( 0x200000, "gfx4", 0 )
- ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
+ ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
@@ -1352,10 +1352,10 @@ ROM_START( cninjaa )
ROM_LOAD( "gl-06.rom", 0x00000, 0x20000, CRC(d92e519d) SHA1(08238f12bf7058a3965ab6348b468e3d35d4cd23) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
+ ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
+ ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
ROM_END
ROM_START( joemac ) /* Japan ver 1 */
@@ -1371,20 +1371,20 @@ ROM_START( joemac ) /* Japan ver 1 */
ROM_LOAD( "gl-07.rom", 0x00000, 0x10000, CRC(ca8bef96) SHA1(fcdbd598c85e339a3389a2ef58cf2d5b3a2779af) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
+ ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
ROM_REGION( 0x080000, "gfx2", 0 )
- ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
+ ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
+ ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
ROM_CONTINUE( 0x080000, 0x40000 )
- ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
+ ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
ROM_CONTINUE( 0x0c0000, 0x40000 )
ROM_REGION( 0x200000, "gfx4", 0 )
- ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
+ ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
@@ -1393,10 +1393,10 @@ ROM_START( joemac ) /* Japan ver 1 */
ROM_LOAD( "gl-06.rom", 0x00000, 0x20000, CRC(d92e519d) SHA1(08238f12bf7058a3965ab6348b468e3d35d4cd23) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
+ ROM_LOAD( "mag-07.rom", 0x00000, 0x80000, CRC(08eb5264) SHA1(3e33085f00b758acfc78034dc9a75fd6921fc3fe) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
+ ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
ROM_END
ROM_START( stoneage )
@@ -1412,23 +1412,23 @@ ROM_START( stoneage )
ROM_LOAD( "sa_1_012.bin", 0x00000, 0x10000, CRC(56058934) SHA1(99a007884c92c2d931d9270c6c2ec02fbc913922) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
+ ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
/* The bootleg graphics are stored in a different arrangement but
- seem to be the same as the original set */
+ seem to be the same as the original set */
ROM_REGION( 0x080000, "gfx2", 0 )
- ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
+ ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
+ ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
ROM_CONTINUE( 0x080000, 0x40000 )
- ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
+ ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
ROM_CONTINUE( 0x0c0000, 0x40000 )
ROM_REGION( 0x200000, "gfx4", 0 )
- ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
+ ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
@@ -1472,43 +1472,43 @@ ROM_START( cninjabl )
ROM_END
ROM_START( cninjabl2 )
- ROM_REGION( 0xc0000, "maincpu", 0 ) /* 68000 code */
- ROM_LOAD16_BYTE( "6.bin", 0x00001, 0x40000, CRC(a86ccfb7) SHA1(c4ac331d5750a35cd48e5d75f0247758b892b034) )
- ROM_LOAD16_BYTE( "4.bin", 0x00000, 0x40000, CRC(88c7043a) SHA1(9981d10f6c88556ceda083158d9835fdeb191511) )
- ROM_LOAD16_BYTE( "gn-00.rom", 0x80000, 0x20000, CRC(0b110b16) SHA1(a967c8aeae3f0cee1f354583cf26ee736636aaf8) )
- ROM_LOAD16_BYTE( "gn-03.rom", 0x80001, 0x20000, CRC(1e28e697) SHA1(2313e97f3a34892dfdc338944c0f00538fcae800) )
-
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
- ROM_LOAD( "audio-prg.3", 0x00000, 0x10000, CRC(3eb65b6d) SHA1(e6d94223a7b98d33470ad4e387d6ce399b76ea4a) )
-
- ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
- ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
-
- ROM_REGION( 0x080000, "gfx2", 0 )
- ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
-
- ROM_REGION( 0x100000, "gfx3", 0 )
- ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
- ROM_CONTINUE( 0x080000, 0x40000 )
- ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
- ROM_CONTINUE( 0x0c0000, 0x40000 )
-
- ROM_REGION( 0x200000, "gfx4", 0 )
- ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
- ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
- ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
- ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
-
- ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */
- ROM_LOAD( "audio-samp.2", 0x00000, 0x20000, CRC(c6638568) SHA1(b5e38d807146b033d1a0b5fb013ac755cd4a2699) )
- ROM_LOAD( "audio-samp.1", 0x00000, 0x10000, CRC(7815e6ab) SHA1(3112b4e8a4008b519f73e6f2d1393ef1e620a0c5) )
-
- ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "audio-samp.18", 0x00000, 0x80000, CRC(06f1bc18) SHA1(fe551d78466dc5b098263520f0ab00200d651593) ) /* banked */
-
- ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
+ ROM_REGION( 0xc0000, "maincpu", 0 ) /* 68000 code */
+ ROM_LOAD16_BYTE( "6.bin", 0x00001, 0x40000, CRC(a86ccfb7) SHA1(c4ac331d5750a35cd48e5d75f0247758b892b034) )
+ ROM_LOAD16_BYTE( "4.bin", 0x00000, 0x40000, CRC(88c7043a) SHA1(9981d10f6c88556ceda083158d9835fdeb191511) )
+ ROM_LOAD16_BYTE( "gn-00.rom", 0x80000, 0x20000, CRC(0b110b16) SHA1(a967c8aeae3f0cee1f354583cf26ee736636aaf8) )
+ ROM_LOAD16_BYTE( "gn-03.rom", 0x80001, 0x20000, CRC(1e28e697) SHA1(2313e97f3a34892dfdc338944c0f00538fcae800) )
+
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_LOAD( "audio-prg.3", 0x00000, 0x10000, CRC(3eb65b6d) SHA1(e6d94223a7b98d33470ad4e387d6ce399b76ea4a) )
+
+ ROM_REGION( 0x020000, "gfx1", 0 )
+ ROM_LOAD16_BYTE( "gl-08.rom", 0x00001, 0x10000, CRC(33a2b400) SHA1(fdb8de315f33705719c0ac03a61fb56ffbfdf597) ) /* chars */
+ ROM_LOAD16_BYTE( "gl-09.rom", 0x00000, 0x10000, CRC(5a2d4752) SHA1(617dd10a99b5b55ca64dcdd22a0f133b0d6b770d) )
+
+ ROM_REGION( 0x080000, "gfx2", 0 )
+ ROM_LOAD( "mag-02.rom", 0x000000, 0x80000, CRC(de89c69a) SHA1(b41bdf859854b5541c7eae7cd541b910cea1f839) ) /* tiles 3 */
+
+ ROM_REGION( 0x100000, "gfx3", 0 )
+ ROM_LOAD( "mag-00.rom", 0x000000, 0x40000, CRC(a8f05d33) SHA1(a1330bc9ca4648219403db087622badfc632b47d) ) /* tiles 1 */
+ ROM_CONTINUE( 0x080000, 0x40000 )
+ ROM_LOAD( "mag-01.rom", 0x040000, 0x40000, CRC(5b399eed) SHA1(490f8f9c0c557b0ba94c6019e3fe680641a0787e) ) /* tiles 2 */
+ ROM_CONTINUE( 0x0c0000, 0x40000 )
+
+ ROM_REGION( 0x200000, "gfx4", 0 )
+ ROM_LOAD16_BYTE( "mag-03.rom", 0x000000, 0x80000, CRC(2220eb9f) SHA1(bdf0bd6e6ba375f0770b9d08a7efa32201cbb6ef) ) /* sprites */
+ ROM_LOAD16_BYTE( "mag-05.rom", 0x000001, 0x80000, CRC(56a53254) SHA1(10940cfdc6fbe9013865107de3394ca7f782d9c7) )
+ ROM_LOAD16_BYTE( "mag-04.rom", 0x100000, 0x80000, CRC(144b94cc) SHA1(d982508608942a714b428a2b721bf24e1627cbb6) )
+ ROM_LOAD16_BYTE( "mag-06.rom", 0x100001, 0x80000, CRC(82d44749) SHA1(c471fa573e00c2f8ae44068439ba6d849a124c68) )
+
+ ROM_REGION( 0x40000, "oki1", 0 ) /* Oki samples */
+ ROM_LOAD( "audio-samp.2", 0x00000, 0x20000, CRC(c6638568) SHA1(b5e38d807146b033d1a0b5fb013ac755cd4a2699) )
+ ROM_LOAD( "audio-samp.1", 0x00000, 0x10000, CRC(7815e6ab) SHA1(3112b4e8a4008b519f73e6f2d1393ef1e620a0c5) )
+
+ ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
+ ROM_LOAD( "audio-samp.18", 0x00000, 0x80000, CRC(06f1bc18) SHA1(fe551d78466dc5b098263520f0ab00200d651593) ) /* banked */
+
+ ROM_REGION( 1024, "proms", 0 )
+ ROM_LOAD( "mb7122h.7v", 0x00000, 0x400, CRC(a1267336) SHA1(d11ea9d78526ac3c0dc6e57a2da5914273ad1e3f) ) /* Priority Unused */
ROM_END
ROM_START( edrandy ) /* World ver 3 */
@@ -1522,7 +1522,7 @@ ROM_START( edrandy ) /* World ver 3 */
ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) )
ROM_LOAD16_BYTE( "ge-07.f3", 0xc0001, 0x20000, CRC(5eb819a1) SHA1(1852cb624eccd0a424d404bc853b5df307875cc9) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "ge-09.k13", 0x00000, 0x10000, CRC(9f94c60b) SHA1(56edf63850189b2168c602e1f21492ef14662682) )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -1550,14 +1550,14 @@ ROM_START( edrandy ) /* World ver 3 */
ROM_LOAD16_BYTE( "mad-09", 0x400000, 0x80000, CRC(930f4900) SHA1(dd09d3c8a251b8397996f6a3330e6e704f65d7fa) )
ROM_LOAD16_BYTE( "mad-12", 0x400001, 0x80000, CRC(a0bd62b6) SHA1(a1ab365f3c63fc4edc32b09ecf8f982beb4bfae5) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "ge-08.j13", 0x00000, 0x20000, CRC(dfe28c7b) SHA1(aba55834b276cbab194e03858564077cad21eff1) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
+ ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
+ ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
ROM_END
ROM_START( edrandy2 ) /* World ver 2 */
@@ -1571,7 +1571,7 @@ ROM_START( edrandy2 ) /* World ver 2 */
ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) )
ROM_LOAD16_BYTE( "ge-07.f3", 0xc0001, 0x20000, CRC(5eb819a1) SHA1(1852cb624eccd0a424d404bc853b5df307875cc9) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "ge-09.k13", 0x00000, 0x10000, CRC(9f94c60b) SHA1(56edf63850189b2168c602e1f21492ef14662682) )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -1599,14 +1599,14 @@ ROM_START( edrandy2 ) /* World ver 2 */
ROM_LOAD16_BYTE( "mad-09", 0x400000, 0x80000, CRC(930f4900) SHA1(dd09d3c8a251b8397996f6a3330e6e704f65d7fa) )
ROM_LOAD16_BYTE( "mad-12", 0x400001, 0x80000, CRC(a0bd62b6) SHA1(a1ab365f3c63fc4edc32b09ecf8f982beb4bfae5) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "ge-08.j13", 0x00000, 0x20000, CRC(dfe28c7b) SHA1(aba55834b276cbab194e03858564077cad21eff1) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
+ ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
+ ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
ROM_END
ROM_START( edrandy1 ) /* World ver 1 */
@@ -1620,7 +1620,7 @@ ROM_START( edrandy1 ) /* World ver 1 */
ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) ) /* labeled as "4" */
ROM_LOAD16_BYTE( "ge-07.f3", 0xc0001, 0x20000, CRC(5eb819a1) SHA1(1852cb624eccd0a424d404bc853b5df307875cc9) ) /* labeled as "8" */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "ge-09.k13", 0x00000, 0x10000, CRC(9f94c60b) SHA1(56edf63850189b2168c602e1f21492ef14662682) ) /* labeled as "9" */
ROM_REGION( 0x020000, "gfx1", 0 ) /* Original graphics, later revised for the World sets above?? */
@@ -1648,14 +1648,14 @@ ROM_START( edrandy1 ) /* World ver 1 */
ROM_LOAD16_BYTE( "mad-09", 0x400000, 0x80000, CRC(930f4900) SHA1(dd09d3c8a251b8397996f6a3330e6e704f65d7fa) )
ROM_LOAD16_BYTE( "mad-12", 0x400001, 0x80000, CRC(a0bd62b6) SHA1(a1ab365f3c63fc4edc32b09ecf8f982beb4bfae5) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "ge-08.j13", 0x00000, 0x20000, CRC(dfe28c7b) SHA1(aba55834b276cbab194e03858564077cad21eff1) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
+ ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
+ ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
ROM_END
ROM_START( edrandyj ) /* Japan ver 3 */
@@ -1669,7 +1669,7 @@ ROM_START( edrandyj ) /* Japan ver 3 */
ROM_LOAD16_BYTE( "ge-03.f1", 0xc0000, 0x20000, CRC(5e7b19a8) SHA1(637945e36c3665c74d31f4b14e600e93ed9be054) )
ROM_LOAD16_BYTE( "ge-07.f3", 0xc0001, 0x20000, CRC(5eb819a1) SHA1(1852cb624eccd0a424d404bc853b5df307875cc9) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "ge-09.k13", 0x00000, 0x10000, CRC(9f94c60b) SHA1(56edf63850189b2168c602e1f21492ef14662682) )
ROM_REGION( 0x020000, "gfx1", 0 )
@@ -1697,14 +1697,14 @@ ROM_START( edrandyj ) /* Japan ver 3 */
ROM_LOAD16_BYTE( "mad-09", 0x400000, 0x80000, CRC(930f4900) SHA1(dd09d3c8a251b8397996f6a3330e6e704f65d7fa) )
ROM_LOAD16_BYTE( "mad-12", 0x400001, 0x80000, CRC(a0bd62b6) SHA1(a1ab365f3c63fc4edc32b09ecf8f982beb4bfae5) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "ge-08.j13", 0x00000, 0x20000, CRC(dfe28c7b) SHA1(aba55834b276cbab194e03858564077cad21eff1) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
+ ROM_LOAD( "mad-13", 0x00000, 0x80000, CRC(6ab28eba) SHA1(12d3025478ee5af4bdea037656d9b1146cd9759f) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
+ ROM_LOAD( "ge-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused, same as Robocop 2 */
ROM_END
ROM_START( robocop2 )
@@ -1722,7 +1722,7 @@ ROM_START( robocop2 )
ROM_LOAD( "gp-09.k13", 0x00000, 0x10000, CRC(4a4e0f8d) SHA1(5408465667d2854bbade23a26ba619d42a0c22f8) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gp10-1.y6", 0x00001, 0x10000, CRC(d25d719c) SHA1(be874cf403ec0e607eb9b54b7cfff0a53f4d59a2) ) /* chars */
+ ROM_LOAD16_BYTE( "gp10-1.y6", 0x00001, 0x10000, CRC(d25d719c) SHA1(be874cf403ec0e607eb9b54b7cfff0a53f4d59a2) ) /* chars */
ROM_LOAD16_BYTE( "gp11-1.z6", 0x00000, 0x10000, CRC(030ded47) SHA1(59ded540b2601ec37255e871e38ac71a47c8d007) )
ROM_REGION( 0x100000, "gfx2", 0 )
@@ -1751,10 +1751,10 @@ ROM_START( robocop2 )
ROM_LOAD( "gp-08.j13", 0x00000, 0x20000, CRC(365183b1) SHA1(7d3c201c49981c3ac84022283b048e380cbb7ec3) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mah-11.f13", 0x00000, 0x80000, CRC(642bc692) SHA1(8d9e446b7633bb6acc46d9f92044a69b99a0ccc9) ) /* banked */
+ ROM_LOAD( "mah-11.f13", 0x00000, 0x80000, CRC(642bc692) SHA1(8d9e446b7633bb6acc46d9f92044a69b99a0ccc9) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "go-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused */
+ ROM_LOAD( "go-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused */
ROM_END
ROM_START( robocop2u )
@@ -1772,7 +1772,7 @@ ROM_START( robocop2u )
ROM_LOAD( "gp-09.k13", 0x00000, 0x10000, CRC(4a4e0f8d) SHA1(5408465667d2854bbade23a26ba619d42a0c22f8) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gp10-1.y6", 0x00001, 0x10000, CRC(d25d719c) SHA1(be874cf403ec0e607eb9b54b7cfff0a53f4d59a2) ) /* chars */
+ ROM_LOAD16_BYTE( "gp10-1.y6", 0x00001, 0x10000, CRC(d25d719c) SHA1(be874cf403ec0e607eb9b54b7cfff0a53f4d59a2) ) /* chars */
ROM_LOAD16_BYTE( "gp11-1.z6", 0x00000, 0x10000, CRC(030ded47) SHA1(59ded540b2601ec37255e871e38ac71a47c8d007) )
ROM_REGION( 0x100000, "gfx2", 0 )
@@ -1801,10 +1801,10 @@ ROM_START( robocop2u )
ROM_LOAD( "gp-08.j13", 0x00000, 0x20000, CRC(365183b1) SHA1(7d3c201c49981c3ac84022283b048e380cbb7ec3) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mah-11.f13", 0x00000, 0x80000, CRC(642bc692) SHA1(8d9e446b7633bb6acc46d9f92044a69b99a0ccc9) ) /* banked */
+ ROM_LOAD( "mah-11.f13", 0x00000, 0x80000, CRC(642bc692) SHA1(8d9e446b7633bb6acc46d9f92044a69b99a0ccc9) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "go-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused */
+ ROM_LOAD( "go-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused */
ROM_END
ROM_START( robocop2j )
@@ -1822,7 +1822,7 @@ ROM_START( robocop2j )
ROM_LOAD( "gp-09.k13", 0x00000, 0x10000, CRC(4a4e0f8d) SHA1(5408465667d2854bbade23a26ba619d42a0c22f8) )
ROM_REGION( 0x020000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "gp10-1.y6", 0x00001, 0x10000, CRC(d25d719c) SHA1(be874cf403ec0e607eb9b54b7cfff0a53f4d59a2) ) /* chars */
+ ROM_LOAD16_BYTE( "gp10-1.y6", 0x00001, 0x10000, CRC(d25d719c) SHA1(be874cf403ec0e607eb9b54b7cfff0a53f4d59a2) ) /* chars */
ROM_LOAD16_BYTE( "gp11-1.z6", 0x00000, 0x10000, CRC(030ded47) SHA1(59ded540b2601ec37255e871e38ac71a47c8d007) )
ROM_REGION( 0x100000, "gfx2", 0 )
@@ -1851,10 +1851,10 @@ ROM_START( robocop2j )
ROM_LOAD( "gp-08.j13", 0x00000, 0x20000, CRC(365183b1) SHA1(7d3c201c49981c3ac84022283b048e380cbb7ec3) )
ROM_REGION( 0x80000, "oki2", 0 ) /* Extra Oki samples */
- ROM_LOAD( "mah-11.f13", 0x00000, 0x80000, CRC(642bc692) SHA1(8d9e446b7633bb6acc46d9f92044a69b99a0ccc9) ) /* banked */
+ ROM_LOAD( "mah-11.f13", 0x00000, 0x80000, CRC(642bc692) SHA1(8d9e446b7633bb6acc46d9f92044a69b99a0ccc9) ) /* banked */
ROM_REGION( 1024, "proms", 0 )
- ROM_LOAD( "go-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused */
+ ROM_LOAD( "go-12.v7", 0x00000, 0x400, CRC(278f674f) SHA1(d4f5b9770d6d2ddebf1b999e291c80a3e274d492) ) /* Priority Unused */
ROM_END
ROM_START( mutantf ) /* World ver 5 */
@@ -1864,7 +1864,7 @@ ROM_START( mutantf ) /* World ver 5 */
ROM_LOAD16_BYTE("hd-04-1.4c", 0x40000, 0x20000, CRC(fd2ea8d7) SHA1(00e50d42fcc7f6d5076963b02f5abb36275dc993) )
ROM_LOAD16_BYTE("hd-01-1.4a", 0x40001, 0x20000, CRC(48a247ac) SHA1(c69d67e44ffae92b261de247f8d3eac2e02fcf11) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "hd-12.21j", 0x00000, 0x10000, CRC(13d55f11) SHA1(6438dca57f43b3ca6d273bf82b62104a49260132) )
ROM_REGION( 0x0a0000, "gfx1", 0 ) /* chars */
@@ -1894,10 +1894,10 @@ ROM_START( mutantf ) /* World ver 5 */
ROM_LOAD32_BYTE("hf-10.15c", 0x00000, 0x10000, CRC(9b06f418) SHA1(d1579ae36676e38c96ee55a1ffa20aa307a21654) )
ROM_LOAD32_BYTE("hf-11.17c", 0x00002, 0x10000, CRC(3859a531) SHA1(a2a0c1aa28181b5ef6c075ff0118178340389693) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-10.20l", 0x00000, 0x40000, CRC(7c57f48b) SHA1(9a5624553b3b038d70f9b517f410a635c00a8771) )
- ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-09.18l", 0x00000, 0x80000, CRC(28e7ed81) SHA1(e168a2748b75c647f6f9c0d7d25d4f046aa98094) )
ROM_END
@@ -1908,7 +1908,7 @@ ROM_START( mutantf4 ) /* World ver 4 */
ROM_LOAD16_BYTE("hd-04-1.4c", 0x40000, 0x20000, CRC(fd2ea8d7) SHA1(00e50d42fcc7f6d5076963b02f5abb36275dc993) )
ROM_LOAD16_BYTE("hd-01-1.4a", 0x40001, 0x20000, CRC(48a247ac) SHA1(c69d67e44ffae92b261de247f8d3eac2e02fcf11) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "hd-12.21j", 0x00000, 0x10000, CRC(13d55f11) SHA1(6438dca57f43b3ca6d273bf82b62104a49260132) )
ROM_REGION( 0x0a0000, "gfx1", 0 ) /* chars */
@@ -1938,10 +1938,10 @@ ROM_START( mutantf4 ) /* World ver 4 */
ROM_LOAD32_BYTE("hf-10.15c", 0x00000, 0x10000, CRC(9b06f418) SHA1(d1579ae36676e38c96ee55a1ffa20aa307a21654) )
ROM_LOAD32_BYTE("hf-11.17c", 0x00002, 0x10000, CRC(3859a531) SHA1(a2a0c1aa28181b5ef6c075ff0118178340389693) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-10.20l", 0x00000, 0x40000, CRC(7c57f48b) SHA1(9a5624553b3b038d70f9b517f410a635c00a8771) )
- ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-09.18l", 0x00000, 0x80000, CRC(28e7ed81) SHA1(e168a2748b75c647f6f9c0d7d25d4f046aa98094) )
ROM_END
@@ -1952,7 +1952,7 @@ ROM_START( mutantf3 ) /* World ver 3 */
ROM_LOAD16_BYTE("hd-04-1.4c", 0x40000, 0x20000, CRC(fd2ea8d7) SHA1(00e50d42fcc7f6d5076963b02f5abb36275dc993) )
ROM_LOAD16_BYTE("hd-01-1.4a", 0x40001, 0x20000, CRC(48a247ac) SHA1(c69d67e44ffae92b261de247f8d3eac2e02fcf11) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "hd-12.21j", 0x00000, 0x10000, CRC(13d55f11) SHA1(6438dca57f43b3ca6d273bf82b62104a49260132) )
ROM_REGION( 0x0a0000, "gfx1", 0 ) /* chars */
@@ -1982,10 +1982,10 @@ ROM_START( mutantf3 ) /* World ver 3 */
ROM_LOAD32_BYTE("hf-10.15c", 0x00000, 0x10000, CRC(9b06f418) SHA1(d1579ae36676e38c96ee55a1ffa20aa307a21654) )
ROM_LOAD32_BYTE("hf-11.17c", 0x00002, 0x10000, CRC(3859a531) SHA1(a2a0c1aa28181b5ef6c075ff0118178340389693) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-10.20l", 0x00000, 0x40000, CRC(7c57f48b) SHA1(9a5624553b3b038d70f9b517f410a635c00a8771) )
- ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-09.18l", 0x00000, 0x80000, CRC(28e7ed81) SHA1(e168a2748b75c647f6f9c0d7d25d4f046aa98094) )
ROM_END
@@ -1996,7 +1996,7 @@ ROM_START( deathbrd ) /* Japan ver 3 */
ROM_LOAD16_BYTE("hd-04-1.4c", 0x40000, 0x20000, CRC(fd2ea8d7) SHA1(00e50d42fcc7f6d5076963b02f5abb36275dc993) ) /* May have the "HD" or "HF" region code label */
ROM_LOAD16_BYTE("hd-01-1.4a", 0x40001, 0x20000, CRC(48a247ac) SHA1(c69d67e44ffae92b261de247f8d3eac2e02fcf11) ) /* May have the "HD" or "HF" region code label */
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* Sound CPU */
ROM_LOAD( "hd-12.21j", 0x00000, 0x10000, CRC(13d55f11) SHA1(6438dca57f43b3ca6d273bf82b62104a49260132) ) /* May have the "HD" or "HF" region code label */
ROM_REGION( 0x0a0000, "gfx1", 0 ) /* chars */
@@ -2026,10 +2026,10 @@ ROM_START( deathbrd ) /* Japan ver 3 */
ROM_LOAD32_BYTE("hf-10.15c", 0x00000, 0x10000, CRC(9b06f418) SHA1(d1579ae36676e38c96ee55a1ffa20aa307a21654) )
ROM_LOAD32_BYTE("hf-11.17c", 0x00002, 0x10000, CRC(3859a531) SHA1(a2a0c1aa28181b5ef6c075ff0118178340389693) )
- ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x40000, "oki1", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-10.20l", 0x00000, 0x40000, CRC(7c57f48b) SHA1(9a5624553b3b038d70f9b517f410a635c00a8771) )
- ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
+ ROM_REGION( 0x80000, "oki2", 0 ) /* ADPCM samples */
ROM_LOAD( "maf-09.18l", 0x00000, 0x80000, CRC(28e7ed81) SHA1(e168a2748b75c647f6f9c0d7d25d4f046aa98094) )
ROM_END
diff --git a/src/mame/drivers/cntsteer.c b/src/mame/drivers/cntsteer.c
index bd98e7deb97..098e6cfdff4 100644
--- a/src/mame/drivers/cntsteer.c
+++ b/src/mame/drivers/cntsteer.c
@@ -56,11 +56,11 @@ public:
int m_scrollx;
int m_scrollx_hi;
int m_rotation_x;
- int m_rotation_sign;
+ int m_rotation_sign;
int m_disable_roz;
/* misc */
- int m_nmimask; // zerotrgt only
+ int m_nmimask; // zerotrgt only
/* devices */
cpu_device *m_maincpu;
@@ -298,16 +298,16 @@ UINT32 cntsteer_state::screen_update_zerotrgt(screen_device &screen, bitmap_ind1
if (rot_val < -90) { rot_val = -90; }
/*
- (u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
- */
+ (u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
+ */
/*
- 1
- 0----|----0
- -1
- 0
- 0----|----1
- 0
- */
+ 1
+ 0----|----0
+ -1
+ 0
+ 0----|----1
+ 0
+ */
/*65536*z*cos(a), 65536*z*sin(a), -65536*z*sin(a), 65536*z*cos(a)*/
p1 = -65536 * 1 * cos(2 * M_PI * (rot_val) / 1024);
p2 = -65536 * 1 * sin(2 * M_PI * (rot_val) / 1024);
@@ -346,16 +346,16 @@ UINT32 cntsteer_state::screen_update_cntsteer(screen_device &screen, bitmap_ind1
// popmessage("%d %02x %02x", rot_val, m_rotation_sign, m_rotation_x);
/*
- (u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
- */
+ (u, v) = (a + cx + dy, b - dx + cy) when (x, y)=screen and (u, v) = tilemap
+ */
/*
- 1
- 0----|----0
- -1
- 0
- 0----|----1
- 0
- */
+ 1
+ 0----|----0
+ -1
+ 0
+ 0----|----1
+ 0
+ */
/*65536*z*cos(a), 65536*z*sin(a), -65536*z*sin(a), 65536*z*cos(a)*/
p1 = -65536 * 1 * cos(2 * M_PI * (rot_val) / 1024);
p2 = -65536 * 1 * sin(2 * M_PI * (rot_val) / 1024);
@@ -400,19 +400,19 @@ WRITE8_MEMBER(cntsteer_state::zerotrgt_vregs_w)
switch (offset)
{
- case 0: m_scrolly = data; break;
- case 1: m_scrollx = data; break;
- case 2: m_bg_bank = (data & 0x30) << 4;
+ case 0: m_scrolly = data; break;
+ case 1: m_scrollx = data; break;
+ case 2: m_bg_bank = (data & 0x30) << 4;
m_bg_color_bank = (data & 7);
m_disable_roz = (data & 0x40);
m_bg_tilemap->mark_all_dirty();
break;
- case 3: m_rotation_sign = (data & 1);
+ case 3: m_rotation_sign = (data & 1);
flip_screen_set(!(data & 4));
m_scrolly_hi = (data & 0x30) << 4;
m_scrollx_hi = (data & 0xc0) << 2;
break;
- case 4: m_rotation_x = data; break;
+ case 4: m_rotation_x = data; break;
}
}
@@ -425,18 +425,18 @@ WRITE8_MEMBER(cntsteer_state::cntsteer_vregs_w)
switch(offset)
{
- case 0: m_scrolly = data; break;
- case 1: m_scrollx = data; break;
- case 2: m_bg_bank = (data & 0x01) << 8;
+ case 0: m_scrolly = data; break;
+ case 1: m_scrollx = data; break;
+ case 2: m_bg_bank = (data & 0x01) << 8;
m_bg_color_bank = (data & 6) >> 1;
m_bg_tilemap->mark_all_dirty();
break;
- case 3: m_rotation_sign = (data & 7);
+ case 3: m_rotation_sign = (data & 7);
m_disable_roz = (~data & 0x08);
m_scrolly_hi = (data & 0x30) << 4;
m_scrollx_hi = (data & 0xc0) << 2;
break;
- case 4: m_rotation_x = data; break;
+ case 4: m_rotation_x = data; break;
}
}
@@ -753,13 +753,13 @@ INPUT_PORTS_END
static const gfx_layout cntsteer_charlayout =
{
- 8,8, /* 8*8 characters */
+ 8,8, /* 8*8 characters */
0x200,
- 2, /* 2 bits per pixel */
- { 0, 4 }, /* the two bitplanes for 4 pixels are packed into one byte */
+ 2, /* 2 bits per pixel */
+ { 0, 4 }, /* the two bitplanes for 4 pixels are packed into one byte */
{ 0, 1, 2, 3, 0x800*8+0, 0x800*8+1, 0x800*8+2, 0x800*8+3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every char takes 8 consecutive bytes */
+ 8*8 /* every char takes 8 consecutive bytes */
};
static const gfx_layout zerotrgt_charlayout =
@@ -770,7 +770,7 @@ static const gfx_layout zerotrgt_charlayout =
{ 0,4 },
{ 0, 1, 2, 3, 1024*8*8+0, 1024*8*8+1, 1024*8*8+2, 1024*8*8+3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
- 8*8 /* every tile takes 32 consecutive bytes */
+ 8*8 /* every tile takes 32 consecutive bytes */
};
static const gfx_layout sprites =
@@ -789,13 +789,13 @@ static const gfx_layout tilelayout =
{
16,16,
0x400,
- 3, /* 3 bits per pixel */
+ 3, /* 3 bits per pixel */
{ RGN_FRAC(4,8)+4, 0, 4 },
{ 3, 2, 1, 0, 11, 10, 9 , 8, 19, 18, 17,16, 27, 26, 25, 24 },
{
- RGN_FRAC(0,8)+0*8, RGN_FRAC(1,8)+0*8, RGN_FRAC(2,8)+0*8, RGN_FRAC(3,8)+0*8,
- RGN_FRAC(0,8)+4*8, RGN_FRAC(1,8)+4*8, RGN_FRAC(2,8)+4*8, RGN_FRAC(3,8)+4*8,
- RGN_FRAC(0,8)+8*8, RGN_FRAC(1,8)+8*8, RGN_FRAC(2,8)+8*8, RGN_FRAC(3,8)+8*8,
+ RGN_FRAC(0,8)+0*8, RGN_FRAC(1,8)+0*8, RGN_FRAC(2,8)+0*8, RGN_FRAC(3,8)+0*8,
+ RGN_FRAC(0,8)+4*8, RGN_FRAC(1,8)+4*8, RGN_FRAC(2,8)+4*8, RGN_FRAC(3,8)+4*8,
+ RGN_FRAC(0,8)+8*8, RGN_FRAC(1,8)+8*8, RGN_FRAC(2,8)+8*8, RGN_FRAC(3,8)+8*8,
RGN_FRAC(0,8)+12*8, RGN_FRAC(1,8)+12*8,RGN_FRAC(2,8)+12*8,RGN_FRAC(3,8)+12*8
},
8*16
@@ -803,15 +803,15 @@ static const gfx_layout tilelayout =
static GFXDECODE_START( cntsteer )
GFXDECODE_ENTRY( "gfx1", 0x00000, cntsteer_charlayout, 0, 256 ) /* Only 1 used so far :/ */
- GFXDECODE_ENTRY( "gfx2", 0x00000, sprites, 0, 256 )
- GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 0, 256 )
+ GFXDECODE_ENTRY( "gfx2", 0x00000, sprites, 0, 256 )
+ GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 0, 256 )
GFXDECODE_END
static GFXDECODE_START( zerotrgt )
GFXDECODE_ENTRY( "gfx1", 0x00000, zerotrgt_charlayout, 0, 256 ) /* Only 1 used so far :/ */
- GFXDECODE_ENTRY( "gfx2", 0x00000, sprites, 0, 256 )
- GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 0, 256 )
+ GFXDECODE_ENTRY( "gfx2", 0x00000, sprites, 0, 256 )
+ GFXDECODE_ENTRY( "gfx3", 0x00000, tilelayout, 0, 256 )
GFXDECODE_END
/***************************************************************************/
@@ -881,11 +881,11 @@ static const ay8910_interface ay8910_config =
static MACHINE_CONFIG_START( cntsteer, cntsteer_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6809, 2000000) /* ? */
+ MCFG_CPU_ADD("maincpu", M6809, 2000000) /* ? */
MCFG_CPU_PROGRAM_MAP(cntsteer_cpu1_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cntsteer_state, nmi_line_pulse) /* ? */
- MCFG_CPU_ADD("subcpu", M6809, 2000000) /* ? */
+ MCFG_CPU_ADD("subcpu", M6809, 2000000) /* ? */
MCFG_CPU_PROGRAM_MAP(cntsteer_cpu2_map)
// MCFG_DEVICE_DISABLE()
MCFG_CPU_VBLANK_INT_DRIVER("screen", cntsteer_state, nmi_line_pulse) /* ? */
@@ -929,15 +929,15 @@ MACHINE_CONFIG_END
static MACHINE_CONFIG_START( zerotrgt, cntsteer_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M6809, 2000000) /* ? */
+ MCFG_CPU_ADD("maincpu", M6809, 2000000) /* ? */
MCFG_CPU_PROGRAM_MAP(gekitsui_cpu1_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cntsteer_state, nmi_line_pulse) /* ? */
- MCFG_CPU_ADD("subcpu", M6809, 2000000) /* ? */
+ MCFG_CPU_ADD("subcpu", M6809, 2000000) /* ? */
MCFG_CPU_PROGRAM_MAP(gekitsui_cpu2_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cntsteer_state, nmi_line_pulse) /* ? */
- MCFG_CPU_ADD("audiocpu", M6502, 1500000) /* ? */
+ MCFG_CPU_ADD("audiocpu", M6502, 1500000) /* ? */
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(cntsteer_state, sound_interrupt, 480)
@@ -1113,7 +1113,7 @@ ROM_START( gekitsui )
ROM_LOAD( "ct00.1c", 0xe000, 0x2000, CRC(ae091b6c) SHA1(8b3a1c0acbfa56f05bcf65677f85d70c8c9640d6) )
ROM_REGION( 0x04000, "gfx1", 0 )
- ROM_LOAD( "ct05", 0x00000, 0x4000, CRC(b9e997a1) SHA1(5891cb0984bf4a1ccd80ef338c47e3d5705a1331) ) /* Characters */
+ ROM_LOAD( "ct05", 0x00000, 0x4000, CRC(b9e997a1) SHA1(5891cb0984bf4a1ccd80ef338c47e3d5705a1331) ) /* Characters */
ROM_REGION( 0x18000, "gfx2", 0 ) /* Sprites */
ROM_LOAD( "ct02.14c", 0x00000, 0x8000, CRC(d2a0bb72) SHA1(ee060f8db0b1fa1ba1034bf94cf44ff6820660bd) )
diff --git a/src/mame/drivers/cobra.c b/src/mame/drivers/cobra.c
index c213a86dcc8..125d44a645a 100644
--- a/src/mame/drivers/cobra.c
+++ b/src/mame/drivers/cobra.c
@@ -324,19 +324,19 @@
#include "sound/rf5c400.h"
#include "sound/dmadac.h"
-#define GFXFIFO_IN_VERBOSE 0
-#define GFXFIFO_OUT_VERBOSE 0
-#define M2SFIFO_VERBOSE 0
-#define S2MFIFO_VERBOSE 0
+#define GFXFIFO_IN_VERBOSE 0
+#define GFXFIFO_OUT_VERBOSE 0
+#define M2SFIFO_VERBOSE 0
+#define S2MFIFO_VERBOSE 0
-#define LOG_DEBUG_STATES 0
-#define LOG_JVS 0
-#define LOG_GFX_RAM_WRITES 0
-#define LOG_DRAW_COMMANDS 0
+#define LOG_DEBUG_STATES 0
+#define LOG_JVS 0
+#define LOG_GFX_RAM_WRITES 0
+#define LOG_DRAW_COMMANDS 0
-#define ENABLE_BILINEAR 1
+#define ENABLE_BILINEAR 1
-#define DMA_SOUND_BUFFER_SIZE 16000
+#define DMA_SOUND_BUFFER_SIZE 16000
/* Cobra Renderer class */
@@ -415,20 +415,20 @@ private:
enum
{
- RE_STATUS_IDLE = 0,
- RE_STATUS_COMMAND = 1,
+ RE_STATUS_IDLE = 0,
+ RE_STATUS_COMMAND = 1,
};
enum
{
- POLY_Z = 0,
- POLY_R = 1,
- POLY_G = 2,
- POLY_B = 3,
- POLY_A = 4,
- POLY_U = 5,
- POLY_V = 6,
- POLY_W = 7,
+ POLY_Z = 0,
+ POLY_R = 1,
+ POLY_G = 2,
+ POLY_B = 3,
+ POLY_A = 4,
+ POLY_U = 5,
+ POLY_V = 6,
+ POLY_W = 7,
};
};
@@ -728,7 +728,7 @@ public:
void cobra_renderer::render_color_scan(INT32 scanline, const extent_t &extent, const cobra_polydata &extradata, int threadid)
{
- UINT32 *fb = &m_backbuffer->pix32(scanline);
+ UINT32 *fb = &m_backbuffer->pix32(scanline);
float *zb = (float*)&m_zbuffer->pix32(scanline);
float z = extent.param[POLY_Z].start;
@@ -745,8 +745,8 @@ void cobra_renderer::render_color_scan(INT32 scanline, const extent_t &extent, c
UINT32 zmode = extradata.zmode;
- for (int x = extent.startx; x < extent.stopx; x++)
- {
+ for (int x = extent.startx; x < extent.stopx; x++)
+ {
if (z <= zb[x] || zmode == 7)
{
UINT32 r = (int)(gr);
@@ -769,7 +769,7 @@ void cobra_renderer::render_color_scan(INT32 scanline, const extent_t &extent, c
gg += dgg;
gb += dgb;
ga += dga;
- }
+ }
}
INLINE rgb_t texture_fetch(UINT32 *texture, int u, int v, int width, int format)
@@ -947,7 +947,7 @@ void cobra_renderer::draw_line(const rectangle &visarea, vertex_t &v1, vertex_t
int x1 = v1.x;
int y1 = v1.y;
- UINT32 color = 0xffffffff; // TODO: where does the color come from?
+ UINT32 color = 0xffffffff; // TODO: where does the color come from?
if (v1.x < visarea.min_x || v1.x > visarea.max_x ||
v1.y < visarea.min_y || v1.y > visarea.max_y ||
@@ -1613,9 +1613,9 @@ static ADDRESS_MAP_START( cobra_main_map, AS_PROGRAM, 64, cobra_state )
AM_RANGE(0x00000000, 0x003fffff) AM_RAM
AM_RANGE(0x07c00000, 0x07ffffff) AM_RAM
AM_RANGE(0x80000cf8, 0x80000cff) AM_READWRITE(main_mpc106_r, main_mpc106_w)
- AM_RANGE(0xc0000000, 0xc03fffff) AM_RAM AM_SHARE("gfx_main_ram_0") // GFX board main ram, bank 0
- AM_RANGE(0xc7c00000, 0xc7ffffff) AM_RAM AM_SHARE("gfx_main_ram_1") // GFX board main ram, bank 1
- AM_RANGE(0xfff00000, 0xfff7ffff) AM_ROM AM_REGION("user1", 0) /* Boot ROM */
+ AM_RANGE(0xc0000000, 0xc03fffff) AM_RAM AM_SHARE("gfx_main_ram_0") // GFX board main ram, bank 0
+ AM_RANGE(0xc7c00000, 0xc7ffffff) AM_RAM AM_SHARE("gfx_main_ram_1") // GFX board main ram, bank 1
+ AM_RANGE(0xfff00000, 0xfff7ffff) AM_ROM AM_REGION("user1", 0) /* Boot ROM */
AM_RANGE(0xfff80000, 0xfffbffff) AM_READWRITE(main_comram_r, main_comram_w)
AM_RANGE(0xffff0000, 0xffff0007) AM_READWRITE(main_fifo_r, main_fifo_w)
ADDRESS_MAP_END
@@ -1651,18 +1651,18 @@ READ32_MEMBER(cobra_state::sub_unk1_r)
WRITE32_MEMBER(cobra_state::sub_unk1_w)
{
/*
- if (!(mem_mask & 0xff000000))
- {
- printf("%02X", data >> 24);
- ucount++;
+ if (!(mem_mask & 0xff000000))
+ {
+ printf("%02X", data >> 24);
+ ucount++;
- if (ucount >= 4)
- {
- ucount = 0;
- printf("\n");
- }
- }
- */
+ if (ucount >= 4)
+ {
+ ucount = 0;
+ printf("\n");
+ }
+ }
+ */
}
READ32_MEMBER(cobra_state::sub_mainbd_r)
@@ -1802,7 +1802,7 @@ READ32_MEMBER(cobra_state::sub_config_r)
if (ACCESSING_BITS_8_15)
{
- r |= (0x2) << 8; // if bit 0x2 is zero, maskrom boot
+ r |= (0x2) << 8; // if bit 0x2 is zero, maskrom boot
}
if (ACCESSING_BITS_0_7)
{
@@ -1929,15 +1929,15 @@ static void sub_sound_dma_w(device_t *device, int width, UINT32 data)
//printf("DMA write to unknown: size %d, data %08X\n", width, data);
/*
- static FILE *out;
- if (out == NULL)
- out = fopen("sound.bin", "wb");
+ static FILE *out;
+ if (out == NULL)
+ out = fopen("sound.bin", "wb");
- fputc((data >> 24) & 0xff, out);
- fputc((data >> 16) & 0xff, out);
- fputc((data >> 8) & 0xff, out);
- fputc((data >> 0) & 0xff, out);
- */
+ fputc((data >> 24) & 0xff, out);
+ fputc((data >> 16) & 0xff, out);
+ fputc((data >> 8) & 0xff, out);
+ fputc((data >> 0) & 0xff, out);
+ */
cobra_state *cobra = device->machine().driver_data<cobra_state>();
@@ -1989,26 +1989,26 @@ static void sub_jvs_w(device_t *device, UINT8 data)
}
static ADDRESS_MAP_START( cobra_sub_map, AS_PROGRAM, 32, cobra_state )
- AM_RANGE(0x00000000, 0x003fffff) AM_MIRROR(0x80000000) AM_RAM // Main RAM
- AM_RANGE(0x70000000, 0x7003ffff) AM_MIRROR(0x80000000) AM_READWRITE(sub_comram_r, sub_comram_w) // Double buffered shared RAM between Main and Sub
+ AM_RANGE(0x00000000, 0x003fffff) AM_MIRROR(0x80000000) AM_RAM // Main RAM
+ AM_RANGE(0x70000000, 0x7003ffff) AM_MIRROR(0x80000000) AM_READWRITE(sub_comram_r, sub_comram_w) // Double buffered shared RAM between Main and Sub
// AM_RANGE(0x78000000, 0x780000ff) AM_MIRROR(0x80000000) AM_NOP // SCSI controller (unused)
AM_RANGE(0x78040000, 0x7804ffff) AM_MIRROR(0x80000000) AM_DEVREADWRITE16_LEGACY("rfsnd", rf5c400_r, rf5c400_w, 0xffffffff)
AM_RANGE(0x78080000, 0x7808000f) AM_MIRROR(0x80000000) AM_READWRITE(sub_ata0_r, sub_ata0_w)
AM_RANGE(0x780c0010, 0x780c001f) AM_MIRROR(0x80000000) AM_READWRITE(sub_ata1_r, sub_ata1_w)
- AM_RANGE(0x78200000, 0x782000ff) AM_MIRROR(0x80000000) AM_DEVREADWRITE_LEGACY("k001604", k001604_reg_r, k001604_reg_w) // PSAC registers
- AM_RANGE(0x78210000, 0x78217fff) AM_MIRROR(0x80000000) AM_RAM_WRITE(sub_psac_palette_w) AM_SHARE("paletteram") // PSAC palette RAM
- AM_RANGE(0x78220000, 0x7823ffff) AM_MIRROR(0x80000000) AM_DEVREADWRITE_LEGACY("k001604", k001604_tile_r, k001604_tile_w) // PSAC tile RAM
- AM_RANGE(0x78240000, 0x7827ffff) AM_MIRROR(0x80000000) AM_DEVREADWRITE_LEGACY("k001604", k001604_char_r, k001604_char_w) // PSAC character RAM
- AM_RANGE(0x78280000, 0x7828000f) AM_MIRROR(0x80000000) AM_NOP // ???
- AM_RANGE(0x78300000, 0x7830000f) AM_MIRROR(0x80000000) AM_READWRITE(sub_psac2_r, sub_psac2_w) // PSAC
+ AM_RANGE(0x78200000, 0x782000ff) AM_MIRROR(0x80000000) AM_DEVREADWRITE_LEGACY("k001604", k001604_reg_r, k001604_reg_w) // PSAC registers
+ AM_RANGE(0x78210000, 0x78217fff) AM_MIRROR(0x80000000) AM_RAM_WRITE(sub_psac_palette_w) AM_SHARE("paletteram") // PSAC palette RAM
+ AM_RANGE(0x78220000, 0x7823ffff) AM_MIRROR(0x80000000) AM_DEVREADWRITE_LEGACY("k001604", k001604_tile_r, k001604_tile_w) // PSAC tile RAM
+ AM_RANGE(0x78240000, 0x7827ffff) AM_MIRROR(0x80000000) AM_DEVREADWRITE_LEGACY("k001604", k001604_char_r, k001604_char_w) // PSAC character RAM
+ AM_RANGE(0x78280000, 0x7828000f) AM_MIRROR(0x80000000) AM_NOP // ???
+ AM_RANGE(0x78300000, 0x7830000f) AM_MIRROR(0x80000000) AM_READWRITE(sub_psac2_r, sub_psac2_w) // PSAC
AM_RANGE(0x7e000000, 0x7e000003) AM_MIRROR(0x80000000) AM_READWRITE(sub_unk7e_r, sub_debug_w)
- AM_RANGE(0x7e040000, 0x7e041fff) AM_MIRROR(0x80000000) AM_DEVREADWRITE8_LEGACY("m48t58", timekeeper_r, timekeeper_w, 0xffffffff) /* M48T58Y RTC/NVRAM */
- AM_RANGE(0x7e180000, 0x7e180003) AM_MIRROR(0x80000000) AM_READWRITE(sub_unk1_r, sub_unk1_w) // TMS57002?
+ AM_RANGE(0x7e040000, 0x7e041fff) AM_MIRROR(0x80000000) AM_DEVREADWRITE8_LEGACY("m48t58", timekeeper_r, timekeeper_w, 0xffffffff) /* M48T58Y RTC/NVRAM */
+ AM_RANGE(0x7e180000, 0x7e180003) AM_MIRROR(0x80000000) AM_READWRITE(sub_unk1_r, sub_unk1_w) // TMS57002?
AM_RANGE(0x7e200000, 0x7e200003) AM_MIRROR(0x80000000) AM_READWRITE(sub_config_r, sub_config_w)
AM_RANGE(0x7e280000, 0x7e28ffff) AM_MIRROR(0x80000000) AM_NOP // LANC
AM_RANGE(0x7e300000, 0x7e30ffff) AM_MIRROR(0x80000000) AM_NOP // LANC
AM_RANGE(0x7e380000, 0x7e380003) AM_MIRROR(0x80000000) AM_READWRITE(sub_mainbd_r, sub_mainbd_w)
- AM_RANGE(0x7ff80000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION("user2", 0) /* Boot ROM */
+ AM_RANGE(0x7ff80000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION("user2", 0) /* Boot ROM */
ADDRESS_MAP_END
@@ -2070,17 +2070,17 @@ void cobra_renderer::gfx_init(running_machine &machine)
void cobra_renderer::gfx_exit(running_machine &machine)
{
/*
- FILE *file;
- file = fopen("texture_ram.bin","wb");
- for (int i=0; i < 0x100000; i++)
- {
- fputc((UINT8)(m_texture_ram[i] >> 24), file);
- fputc((UINT8)(m_texture_ram[i] >> 16), file);
- fputc((UINT8)(m_texture_ram[i] >> 8), file);
- fputc((UINT8)(m_texture_ram[i] >> 0), file);
- }
- fclose(file);
- */
+ FILE *file;
+ file = fopen("texture_ram.bin","wb");
+ for (int i=0; i < 0x100000; i++)
+ {
+ fputc((UINT8)(m_texture_ram[i] >> 24), file);
+ fputc((UINT8)(m_texture_ram[i] >> 16), file);
+ fputc((UINT8)(m_texture_ram[i] >> 8), file);
+ fputc((UINT8)(m_texture_ram[i] >> 0), file);
+ }
+ fclose(file);
+ */
}
void cobra_renderer::gfx_reset(running_machine &machine)
@@ -2100,7 +2100,7 @@ UINT32 cobra_renderer::gfx_read_gram(UINT32 address)
switch ((address >> 16) & 0xf)
{
- case 0xc: // 0xCxxxx
+ case 0xc: // 0xCxxxx
{
if ((address >= 0xc0c00 && address < 0xc1000) ||
(address >= 0xc4c00 && address < 0xc5000) ||
@@ -2109,8 +2109,8 @@ UINT32 cobra_renderer::gfx_read_gram(UINT32 address)
{
UINT32 a = (((address >> 2) & 0xff) * 2) + ((address & 0x4000) ? 1 : 0);
UINT32 page = ((m_gfx_gram[0xc3028/4] >> 9) * 0x800) +
- ((address & 0x8000) ? 0x400 : 0) +
- ((m_gfx_gram[0xc3028/4] & 0x100) ? 0x200 : 0);
+ ((address & 0x8000) ? 0x400 : 0) +
+ ((m_gfx_gram[0xc3028/4] & 0x100) ? 0x200 : 0);
return m_texture_ram[page + a];
}
@@ -2125,7 +2125,7 @@ void cobra_renderer::gfx_write_gram(UINT32 address, UINT32 mask, UINT32 data)
{
switch ((address >> 16) & 0xf)
{
- case 0x4: // 0x4xxxx
+ case 0x4: // 0x4xxxx
{
if (address == 0x40fff)
{
@@ -2134,7 +2134,7 @@ void cobra_renderer::gfx_write_gram(UINT32 address, UINT32 mask, UINT32 data)
break;
}
- case 0xc: // 0xCxxxx
+ case 0xc: // 0xCxxxx
{
switch (address & 0xffff)
{
@@ -2234,8 +2234,8 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
if (fifo_in->current_num() < 6)
{
// wait until there's enough data in FIFO
- memset(param, 0, sizeof(param));
- memset(w, 0, sizeof(w));
+ memset(param, 0, sizeof(param));
+ memset(w, 0, sizeof(w));
return;
}
@@ -2246,8 +2246,8 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
fifo_in->pop(NULL, &param[4]);
fifo_in->pop(NULL, &param[5]);
- w[0] = (UINT32)param[0]; w[1] = (UINT32)param[1]; w[2] = (UINT32)param[2];
- w[3] = (UINT32)param[3]; w[4] = (UINT32)param[4]; w[5] = (UINT32)param[5];
+ w[0] = (UINT32)param[0]; w[1] = (UINT32)param[1]; w[2] = (UINT32)param[2];
+ w[3] = (UINT32)param[3]; w[4] = (UINT32)param[4]; w[5] = (UINT32)param[5];
// mbuslib_pumpkin(): 0x00600000 0x10500010
// 0x00600000 0x10500018
@@ -2355,10 +2355,10 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
// determine the expected packet size to see if we can process it yet
int unit_size = 8;
- if (w2 & 0x40000000) unit_size += 1; // lines only
- if (w2 & 0x20000000) unit_size += 1; // unknown float
- if (w2 & 0x00200000) unit_size += 3; // texture coords?
- if (w2 & 0x00000001) unit_size += 1; // ?
+ if (w2 & 0x40000000) unit_size += 1; // lines only
+ if (w2 & 0x20000000) unit_size += 1; // unknown float
+ if (w2 & 0x00200000) unit_size += 3; // texture coords?
+ if (w2 & 0x00000001) unit_size += 1; // ?
num = unit_size * units;
@@ -2371,10 +2371,10 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
- float vp_width = u2f(m_gfx_gram[0x00090/4]);
- float vp_height = u2f(m_gfx_gram[0x000a4/4]);
- float vp_center_x = u2f(m_gfx_gram[0x0009c/4]);
- float vp_center_y = u2f(m_gfx_gram[0x000ac/4]);
+ float vp_width = u2f(m_gfx_gram[0x00090/4]);
+ float vp_height = u2f(m_gfx_gram[0x000a4/4]);
+ float vp_center_x = u2f(m_gfx_gram[0x0009c/4]);
+ float vp_center_y = u2f(m_gfx_gram[0x000ac/4]);
if (vp_width == 0.0f)
{
@@ -2395,34 +2395,34 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
w = 1.0f;
UINT64 in[4];
- if (w2 & 0x40000000) // line flags
+ if (w2 & 0x40000000) // line flags
{
fifo_in->pop(NULL, &in[0]);
}
- if (w2 & 0x20000000) // unknown float (0.0f ... 1.0f)
+ if (w2 & 0x20000000) // unknown float (0.0f ... 1.0f)
{
fifo_in->pop(NULL, &in[1]);
}
- fifo_in->pop(NULL, &x); // X coord
- fifo_in->pop(NULL, &y); // Y coord
- fifo_in->pop(NULL, &in[2]); // coord?
- fifo_in->pop(NULL, &z); // Z coord
+ fifo_in->pop(NULL, &x); // X coord
+ fifo_in->pop(NULL, &y); // Y coord
+ fifo_in->pop(NULL, &in[2]); // coord?
+ fifo_in->pop(NULL, &z); // Z coord
- if (w2 & 0x00200000) // texture coords
+ if (w2 & 0x00200000) // texture coords
{
- fifo_in->pop(NULL, &w); // W coord (1 / Z)
- fifo_in->pop(NULL, &vert[i].p[POLY_U]); // U/Z coord
- fifo_in->pop(NULL, &vert[i].p[POLY_V]); // V/Z coord
+ fifo_in->pop(NULL, &w); // W coord (1 / Z)
+ fifo_in->pop(NULL, &vert[i].p[POLY_U]); // U/Z coord
+ fifo_in->pop(NULL, &vert[i].p[POLY_V]); // V/Z coord
}
- fifo_in->pop(NULL, &a); // Gouraud Color Alpha
- fifo_in->pop(NULL, &r); // Gouraud Color R
- fifo_in->pop(NULL, &g); // Gouraud Color G
- fifo_in->pop(NULL, &b); // Gouraud Color B
+ fifo_in->pop(NULL, &a); // Gouraud Color Alpha
+ fifo_in->pop(NULL, &r); // Gouraud Color R
+ fifo_in->pop(NULL, &g); // Gouraud Color G
+ fifo_in->pop(NULL, &b); // Gouraud Color B
- if (w2 & 0x00000001) // unknown float (0.0f ... 1.0f)
+ if (w2 & 0x00000001) // unknown float (0.0f ... 1.0f)
{
fifo_in->pop(NULL, &in[3]);
}
@@ -2487,7 +2487,7 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
// render
switch ((w1 >> 24) & 0xf)
{
- case 0x0: // triangles
+ case 0x0: // triangles
{
if (w2 & 0x00200000)
{
@@ -2508,7 +2508,7 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
break;
}
- case 0x2: // points
+ case 0x2: // points
{
for (int i=0; i < units; i++)
{
@@ -2517,16 +2517,16 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
break;
}
- case 0x3: // lines
+ case 0x3: // lines
{
- if ((units & 1) == 0) // batches of lines
+ if ((units & 1) == 0) // batches of lines
{
for (i=0; i < units; i+=2)
{
draw_line(visarea, vert[i], vert[i+1]);
}
}
- else // line strip
+ else // line strip
{
printf("GFX: linestrip %08X, %08X\n", w1, w2);
}
@@ -2571,11 +2571,11 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
UINT32 *buffer;
switch (m_gfx_gram[0x80104/4])
{
- case 0x800000: buffer = &m_framebuffer->pix32(y); break;
- case 0x200000: buffer = &m_backbuffer->pix32(y); break;
- case 0x0e0000: buffer = &m_overlay->pix32(y); break;
- case 0x000800: buffer = &m_zbuffer->pix32(y); break;
- case 0x000200: buffer = &m_stencil->pix32(y); break;
+ case 0x800000: buffer = &m_framebuffer->pix32(y); break;
+ case 0x200000: buffer = &m_backbuffer->pix32(y); break;
+ case 0x0e0000: buffer = &m_overlay->pix32(y); break;
+ case 0x000800: buffer = &m_zbuffer->pix32(y); break;
+ case 0x000200: buffer = &m_stencil->pix32(y); break;
default:
{
@@ -2616,11 +2616,11 @@ void cobra_renderer::gfx_fifo_exec(running_machine &machine)
UINT32 *buffer;
switch (m_gfx_gram[0x80104/4])
{
- case 0x800000: buffer = &m_framebuffer->pix32(y); break;
- case 0x200000: buffer = &m_backbuffer->pix32(y); break;
- case 0x0e0000: buffer = &m_overlay->pix32(y); break;
- case 0x000800: buffer = &m_zbuffer->pix32(y); break;
- case 0x000200: buffer = &m_stencil->pix32(y); break;
+ case 0x800000: buffer = &m_framebuffer->pix32(y); break;
+ case 0x200000: buffer = &m_backbuffer->pix32(y); break;
+ case 0x0e0000: buffer = &m_overlay->pix32(y); break;
+ case 0x000800: buffer = &m_zbuffer->pix32(y); break;
+ case 0x000200: buffer = &m_stencil->pix32(y); break;
default:
{
@@ -2935,7 +2935,7 @@ READ64_MEMBER(cobra_state::gfx_unk1_r)
r |= (UINT64) 0x7f << 40;
}
- if (ACCESSING_BITS_24_31) // this register returns FIFO number during check_fifo (see below)
+ if (ACCESSING_BITS_24_31) // this register returns FIFO number during check_fifo (see below)
{
r |= (m_gfx_unknown_v1 & 3) << 24;
}
@@ -2965,7 +2965,7 @@ WRITE64_MEMBER(cobra_state::gfx_unk1_w)
{
m_gfxfifo_in->pop(&space.device(), &in1);
m_gfxfifo_in->pop(&space.device(), &in2);
- m_gfx_unknown_v1 = (UINT32)(in1 >> 32); // FIFO number is read back from this same register
+ m_gfx_unknown_v1 = (UINT32)(in1 >> 32); // FIFO number is read back from this same register
m_gfxfifo_out->push(&space.device(), in1 & 0xffffffff);
m_gfxfifo_out->push(&space.device(), in2 & 0xffffffff);
@@ -3018,7 +3018,7 @@ WRITE64_MEMBER(cobra_state::gfx_buf_w)
m_gfx_unk_status &= ~0x400;
}
- else if (data != U64(0x00a0000110520200)) // mbuslib_regread()
+ else if (data != U64(0x00a0000110520200)) // mbuslib_regread()
{
// prc_read always expects a value...
@@ -3093,9 +3093,9 @@ static ADDRESS_MAP_START( cobra_gfx_map, AS_PROGRAM, 64, cobra_state )
AM_RANGE(0x10000000, 0x100007ff) AM_WRITE(gfx_fifo0_w)
AM_RANGE(0x18000000, 0x180007ff) AM_WRITE(gfx_fifo1_w)
AM_RANGE(0x1e000000, 0x1e0007ff) AM_WRITE(gfx_fifo2_w)
- AM_RANGE(0x20000000, 0x20000007) AM_WRITE(gfx_buf_w) // this might really map to 0x1e000000, depending on the pagetable
+ AM_RANGE(0x20000000, 0x20000007) AM_WRITE(gfx_buf_w) // this might really map to 0x1e000000, depending on the pagetable
AM_RANGE(0x7f000000, 0x7f00ffff) AM_RAM AM_SHARE("pagetable")
- AM_RANGE(0xfff00000, 0xfff7ffff) AM_ROM AM_REGION("user3", 0) /* Boot ROM */
+ AM_RANGE(0xfff00000, 0xfff7ffff) AM_ROM AM_REGION("user3", 0) /* Boot ROM */
AM_RANGE(0xfff80000, 0xfff80007) AM_WRITE(gfx_debug_state_w)
AM_RANGE(0xffff0000, 0xffff0007) AM_READWRITE(gfx_unk1_r, gfx_unk1_w)
AM_RANGE(0xffff0010, 0xffff001f) AM_READ(gfx_fifo_r)
@@ -3106,7 +3106,7 @@ ADDRESS_MAP_END
INPUT_PORTS_START( cobra )
PORT_START("TEST")
- PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW) /* Test Button */
+ PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW) /* Test Button */
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service") PORT_CODE(KEYCODE_7)
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
@@ -3154,24 +3154,24 @@ INPUT_PORTS_END
static powerpc_config main_ppc_cfg =
{
- XTAL_66_6667MHz, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
- NULL,
- NULL
+ XTAL_66_6667MHz, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
+ NULL,
+ NULL
};
static powerpc_config gfx_ppc_cfg =
{
- XTAL_66_6667MHz, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
+ XTAL_66_6667MHz, /* Multiplier 1.5, Bus = 66MHz, Core = 100MHz */
NULL,
- NULL
+ NULL
};
static const k001604_interface cobra_k001604_intf =
{
- 0, 1, /* gfx index 1 & 2 */
- 0, 1, /* layer_size, roz_size */
- 0 /* slrasslt hack */
+ 0, 1, /* gfx index 1 & 2 */
+ 0, 1, /* layer_size, roz_size */
+ 0 /* slrasslt hack */
};
@@ -3206,9 +3206,9 @@ void cobra_state::machine_reset()
UINT8 *ide_features = ide->ide_get_features(0);
// Cobra expects these settings or the BIOS fails
- ide_features[51*2+0] = 0; /* 51: PIO data transfer cycle timing mode */
+ ide_features[51*2+0] = 0; /* 51: PIO data transfer cycle timing mode */
ide_features[51*2+1] = 2;
- ide_features[67*2+0] = 0xe0; /* 67: minimum PIO transfer cycle time without flow control */
+ ide_features[67*2+0] = 0xe0; /* 67: minimum PIO transfer cycle time without flow control */
ide_features[67*2+1] = 0x01;
m_renderer->gfx_reset(machine());
@@ -3226,15 +3226,15 @@ void cobra_state::machine_reset()
static MACHINE_CONFIG_START( cobra, cobra_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", PPC603, 100000000) /* 603EV, 100? MHz */
+ MCFG_CPU_ADD("maincpu", PPC603, 100000000) /* 603EV, 100? MHz */
MCFG_CPU_CONFIG(main_ppc_cfg)
MCFG_CPU_PROGRAM_MAP(cobra_main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", cobra_state, cobra_vblank)
- MCFG_CPU_ADD("subcpu", PPC403GA, 32000000) /* 403GA, 33? MHz */
+ MCFG_CPU_ADD("subcpu", PPC403GA, 32000000) /* 403GA, 33? MHz */
MCFG_CPU_PROGRAM_MAP(cobra_sub_map)
- MCFG_CPU_ADD("gfxcpu", PPC604, 100000000) /* 604, 100? MHz */
+ MCFG_CPU_ADD("gfxcpu", PPC604, 100000000) /* 604, 100? MHz */
MCFG_CPU_CONFIG(gfx_ppc_cfg)
MCFG_CPU_PROGRAM_MAP(cobra_gfx_map)
@@ -3270,7 +3270,7 @@ static MACHINE_CONFIG_START( cobra, cobra_state )
MCFG_M48T58_ADD("m48t58")
- MCFG_K001604_ADD("k001604", cobra_k001604_intf) // on the LAN board in Racing Jam DX
+ MCFG_K001604_ADD("k001604", cobra_k001604_intf) // on the LAN board in Racing Jam DX
MCFG_DEVICE_ADD("cobra_jvs_host", COBRA_JVS_HOST, 4000000)
MCFG_JVS_DEVICE_ADD("cobra_jvs", COBRA_JVS, "cobra_jvs_host")
@@ -3285,36 +3285,36 @@ DRIVER_INIT_MEMBER(cobra_state, cobra)
{
m_gfxfifo_in = auto_alloc(machine(),
- cobra_fifo(machine(),
- 8192,
- "GFXFIFO_IN",
- GFXFIFO_IN_VERBOSE != 0,
- cobra_fifo::event_delegate(FUNC(cobra_state::gfxfifo_in_event_callback), this))
- );
+ cobra_fifo(machine(),
+ 8192,
+ "GFXFIFO_IN",
+ GFXFIFO_IN_VERBOSE != 0,
+ cobra_fifo::event_delegate(FUNC(cobra_state::gfxfifo_in_event_callback), this))
+ );
m_gfxfifo_out = auto_alloc(machine(),
- cobra_fifo(machine(),
- 8192,
- "GFXFIFO_OUT",
- GFXFIFO_OUT_VERBOSE != 0,
- cobra_fifo::event_delegate(FUNC(cobra_state::gfxfifo_out_event_callback), this))
- );
+ cobra_fifo(machine(),
+ 8192,
+ "GFXFIFO_OUT",
+ GFXFIFO_OUT_VERBOSE != 0,
+ cobra_fifo::event_delegate(FUNC(cobra_state::gfxfifo_out_event_callback), this))
+ );
m_m2sfifo = auto_alloc(machine(),
- cobra_fifo(machine(),
- 2048,
- "M2SFIFO",
- M2SFIFO_VERBOSE != 0,
- cobra_fifo::event_delegate(FUNC(cobra_state::m2sfifo_event_callback), this))
- );
+ cobra_fifo(machine(),
+ 2048,
+ "M2SFIFO",
+ M2SFIFO_VERBOSE != 0,
+ cobra_fifo::event_delegate(FUNC(cobra_state::m2sfifo_event_callback), this))
+ );
m_s2mfifo = auto_alloc(machine(),
- cobra_fifo(machine(),
- 2048,
- "S2MFIFO",
- S2MFIFO_VERBOSE != 0,
- cobra_fifo::event_delegate(FUNC(cobra_state::s2mfifo_event_callback), this))
- );
+ cobra_fifo(machine(),
+ 2048,
+ "S2MFIFO",
+ S2MFIFO_VERBOSE != 0,
+ cobra_fifo::event_delegate(FUNC(cobra_state::s2mfifo_event_callback), this))
+ );
ppc_set_dcstore_callback(m_maincpu, main_cpu_dc_store);
@@ -3334,7 +3334,7 @@ DRIVER_INIT_MEMBER(cobra_state, cobra)
// setup fake pagetable until we figure out what really maps there...
//m_gfx_pagetable[0x80 / 8] = U64(0x800001001e0001a8);
- m_gfx_pagetable[0x80 / 8] = U64(0x80000100200001a8); // should this map to 0x1e000000?
+ m_gfx_pagetable[0x80 / 8] = U64(0x80000100200001a8); // should this map to 0x1e000000?
}
DRIVER_INIT_MEMBER(cobra_state,bujutsu)
@@ -3345,7 +3345,7 @@ DRIVER_INIT_MEMBER(cobra_state,bujutsu)
{
UINT32 *rom = (UINT32*)machine().root_device().memregion("user2")->base();
- rom[0x62094 / 4] = 0x60000000; // skip hardcheck()...
+ rom[0x62094 / 4] = 0x60000000; // skip hardcheck()...
}
@@ -3356,7 +3356,7 @@ DRIVER_INIT_MEMBER(cobra_state,bujutsu)
UINT32 *rom = (UINT32*)machine().root_device().memregion("user3")->base();
- rom[(0x022d4^4) / 4] = 0x60000000; // skip init_raster() for now ...
+ rom[(0x022d4^4) / 4] = 0x60000000; // skip init_raster() for now ...
// calculate the checksum of the patched rom...
for (i=0; i < 0x20000/4; i++)
@@ -3376,20 +3376,20 @@ DRIVER_INIT_MEMBER(cobra_state,bujutsu)
// fill in M48T58 data for now...
{
UINT8 *rom = (UINT8*)machine().root_device().memregion("m48t58")->base();
- rom[0x00] = 0x47; // G
- rom[0x01] = 0x4e; // N // N = 2-player, Q = 1-player?
- rom[0x02] = 0x36; // 6
- rom[0x03] = 0x34; // 4
- rom[0x04] = 0x35; // 5
+ rom[0x00] = 0x47; // G
+ rom[0x01] = 0x4e; // N // N = 2-player, Q = 1-player?
+ rom[0x02] = 0x36; // 6
+ rom[0x03] = 0x34; // 4
+ rom[0x04] = 0x35; // 5
rom[0x05] = 0x00;
rom[0x06] = 0x00;
rom[0x07] = 0x00;
rom[0x08] = 0x00;
rom[0x09] = 0x00;
- rom[0x0a] = 0x4a; // J
- rom[0x0b] = 0x41; // A
- rom[0x0c] = 0x41; // A
+ rom[0x0a] = 0x4a; // J
+ rom[0x0b] = 0x41; // A
+ rom[0x0c] = 0x41; // A
rom[0x0d] = 0x00;
// calculate checksum
@@ -3427,8 +3427,8 @@ DRIVER_INIT_MEMBER(cobra_state,racjamdx)
{
UINT32 *rom = (UINT32*)machine().root_device().memregion("user2")->base();
- rom[0x62094 / 4] = 0x60000000; // skip hardcheck()...
- rom[0x62ddc / 4] = 0x60000000; // skip lanc_hardcheck()
+ rom[0x62094 / 4] = 0x60000000; // skip hardcheck()...
+ rom[0x62ddc / 4] = 0x60000000; // skip lanc_hardcheck()
// calculate the checksum of the patched rom...
@@ -3453,9 +3453,9 @@ DRIVER_INIT_MEMBER(cobra_state,racjamdx)
UINT32 *rom = (UINT32*)machine().root_device().memregion("user3")->base();
- rom[(0x02448^4) / 4] = 0x60000000; // skip init_raster() for now ...
+ rom[(0x02448^4) / 4] = 0x60000000; // skip init_raster() for now ...
- rom[(0x02438^4) / 4] = 0x60000000; // awfully long delay loop (5000000 * 166)
+ rom[(0x02438^4) / 4] = 0x60000000; // awfully long delay loop (5000000 * 166)
// calculate the checksum of the patched rom...
for (i=0; i < 0x20000/4; i++)
@@ -3474,11 +3474,11 @@ DRIVER_INIT_MEMBER(cobra_state,racjamdx)
// fill in M48T58 data for now...
{
UINT8 *rom = (UINT8*)machine().root_device().memregion("m48t58")->base();
- rom[0x00] = 0x47; // G
- rom[0x01] = 0x59; // Y
- rom[0x02] = 0x36; // 6
- rom[0x03] = 0x37; // 7
- rom[0x04] = 0x36; // 6
+ rom[0x00] = 0x47; // G
+ rom[0x01] = 0x59; // Y
+ rom[0x02] = 0x36; // 6
+ rom[0x03] = 0x37; // 7
+ rom[0x04] = 0x36; // 6
rom[0x05] = 0x00;
rom[0x06] = 0x00;
rom[0x07] = 0x00;
@@ -3514,13 +3514,13 @@ DRIVER_INIT_MEMBER(cobra_state,racjamdx)
/*****************************************************************************/
ROM_START(bujutsu)
- ROM_REGION64_BE(0x80000, "user1", 0) /* Main CPU program (PPC603) */
+ ROM_REGION64_BE(0x80000, "user1", 0) /* Main CPU program (PPC603) */
ROM_LOAD("645a01.33d", 0x00000, 0x80000, CRC(cb1a8683) SHA1(77b7dece84dc17e9d63242347b7202e879b9a10e) )
- ROM_REGION32_BE(0x80000, "user2", 0) /* Sub CPU program (PPC403) */
+ ROM_REGION32_BE(0x80000, "user2", 0) /* Sub CPU program (PPC403) */
ROM_LOAD("645a02.24r", 0x00000, 0x80000, CRC(7d1c31bd) SHA1(94907c4068a488a74b2fa9a486c832d380c5b184) )
- ROM_REGION64_BE(0x80000, "user3", 0) /* Gfx CPU program (PPC604) */
+ ROM_REGION64_BE(0x80000, "user3", 0) /* Gfx CPU program (PPC604) */
ROM_LOAD("645a03.u17", 0x00000, 0x80000, CRC(086abd0b) SHA1(24df439eb9828ed3842f43f5f4014a3fc746e1e3) )
ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)
@@ -3533,13 +3533,13 @@ ROM_START(bujutsu)
ROM_END
ROM_START(racjamdx)
- ROM_REGION64_BE(0x80000, "user1", 0) /* Main CPU program (PPC603) */
+ ROM_REGION64_BE(0x80000, "user1", 0) /* Main CPU program (PPC603) */
ROM_LOAD( "676a01.33d", 0x000000, 0x080000, CRC(1e6238f1) SHA1(d55949d98e9e290ceb8c018ed60ca090ec16c9dd) )
- ROM_REGION32_BE(0x80000, "user2", 0) /* Sub CPU program (PPC403) */
+ ROM_REGION32_BE(0x80000, "user2", 0) /* Sub CPU program (PPC403) */
ROM_LOAD( "676a02.24r", 0x000000, 0x080000, CRC(371978ed) SHA1(c83f0cf04204212db00588df91b32122f37900f8) )
- ROM_REGION64_BE(0x80000, "user3", 0) /* Gfx CPU program (PPC604) */
+ ROM_REGION64_BE(0x80000, "user3", 0) /* Gfx CPU program (PPC604) */
ROM_LOAD( "676a03.u17", 0x000000, 0x080000, CRC(66f77cbd) SHA1(f1c7e50dbbfcc27ac011cbbb8ad2fd376c2e9056) )
ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00)
@@ -3555,4 +3555,3 @@ ROM_END
GAME( 1997, bujutsu, 0, cobra, cobra, cobra_state, bujutsu, ROT0, "Konami", "Fighting Bujutsu", GAME_NOT_WORKING | GAME_NO_SOUND )
GAME( 1997, racjamdx, 0, cobra, cobra, cobra_state, racjamdx, ROT0, "Konami", "Racing Jam DX", GAME_NOT_WORKING | GAME_NO_SOUND )
-
diff --git a/src/mame/drivers/coinmstr.c b/src/mame/drivers/coinmstr.c
index b25b9f66bb2..4ad99b3a76f 100644
--- a/src/mame/drivers/coinmstr.c
+++ b/src/mame/drivers/coinmstr.c
@@ -109,7 +109,7 @@ WRITE8_MEMBER(coinmstr_state::quizmstr_attr1_w)
if(offset >= 0x0240)
{
// the later games also use attr3 for something..
- UINT32 paldata = (m_attr_ram1[offset] & 0x7f) | ((m_attr_ram2[offset] & 0x7f) << 7);
+ UINT32 paldata = (m_attr_ram1[offset] & 0x7f) | ((m_attr_ram2[offset] & 0x7f) << 7);
m_bg_tilemap->mark_tile_dirty(offset - 0x0240);
coinmstr_set_pal(machine(), paldata, offset - 0x240);
@@ -124,7 +124,7 @@ WRITE8_MEMBER(coinmstr_state::quizmstr_attr2_w)
if(offset >= 0x0240)
{
// the later games also use attr3 for something..
- UINT32 paldata = (m_attr_ram1[offset] & 0x7f) | ((m_attr_ram2[offset] & 0x7f) << 7);
+ UINT32 paldata = (m_attr_ram1[offset] & 0x7f) | ((m_attr_ram2[offset] & 0x7f) << 7);
m_bg_tilemap->mark_tile_dirty(offset - 0x0240);
coinmstr_set_pal(machine(), paldata, offset - 0x240);
@@ -280,7 +280,7 @@ static ADDRESS_MAP_START( pokeroul_io_map, AS_IO, 8, coinmstr_state )
AM_RANGE(0x58, 0x5b) AM_DEVREADWRITE("pia0", pia6821_device, read, write) /* confirmed */
AM_RANGE(0x68, 0x6b) AM_DEVREADWRITE("pia1", pia6821_device, read, write) /* confirmed */
AM_RANGE(0x78, 0x7b) AM_DEVREADWRITE("pia2", pia6821_device, read, write) /* confirmed */
- AM_RANGE(0xc0, 0xc1) AM_READ(ff_r) /* needed to boot */
+ AM_RANGE(0xc0, 0xc1) AM_READ(ff_r) /* needed to boot */
ADDRESS_MAP_END
@@ -932,52 +932,52 @@ UINT32 coinmstr_state::screen_update_coinmstr(screen_device &screen, bitmap_ind1
/* PIA 0 */
static const pia6821_interface pia_0_intf =
{
- DEVCB_INPUT_PORT("PIA0.A"), /* port A in */
- DEVCB_INPUT_PORT("PIA0.B"), /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_NULL, /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_INPUT_PORT("PIA0.A"), /* port A in */
+ DEVCB_INPUT_PORT("PIA0.B"), /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_NULL, /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
/* PIA 1 */
static const pia6821_interface pia_1_intf =
{
- DEVCB_INPUT_PORT("PIA1.A"), /* port A in */
- DEVCB_INPUT_PORT("PIA1.B"), /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_NULL, /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_INPUT_PORT("PIA1.A"), /* port A in */
+ DEVCB_INPUT_PORT("PIA1.B"), /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_NULL, /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
/* PIA 2 */
static const pia6821_interface pia_2_intf =
{
- DEVCB_INPUT_PORT("PIA2.A"), /* port A in */
- DEVCB_INPUT_PORT("PIA2.B"), /* port B in */
- DEVCB_NULL, /* line CA1 in */
- DEVCB_NULL, /* line CB1 in */
- DEVCB_NULL, /* line CA2 in */
- DEVCB_NULL, /* line CB2 in */
- DEVCB_NULL, /* port A out */
- DEVCB_NULL, /* port B out */
- DEVCB_NULL, /* line CA2 out */
- DEVCB_NULL, /* port CB2 out */
- DEVCB_NULL, /* IRQA */
- DEVCB_NULL /* IRQB */
+ DEVCB_INPUT_PORT("PIA2.A"), /* port A in */
+ DEVCB_INPUT_PORT("PIA2.B"), /* port B in */
+ DEVCB_NULL, /* line CA1 in */
+ DEVCB_NULL, /* line CB1 in */
+ DEVCB_NULL, /* line CA2 in */
+ DEVCB_NULL, /* line CB2 in */
+ DEVCB_NULL, /* port A out */
+ DEVCB_NULL, /* port B out */
+ DEVCB_NULL, /* line CA2 out */
+ DEVCB_NULL, /* port CB2 out */
+ DEVCB_NULL, /* IRQA */
+ DEVCB_NULL /* IRQB */
};
@@ -994,16 +994,16 @@ static const ay8910_interface ay8912_interface =
static const mc6845_interface h46505_intf =
{
- "screen", /* screen we are acting on */
- 8, /* number of pixels per video memory address */
- NULL, /* before pixel update callback */
- NULL, /* row update callback */
- NULL, /* after pixel update callback */
- DEVCB_NULL, /* callback for display state changes */
- DEVCB_NULL, /* callback for cursor state changes */
- DEVCB_NULL, /* HSYNC callback */
- DEVCB_NULL, /* VSYNC callback */
- NULL /* update address callback */
+ "screen", /* screen we are acting on */
+ 8, /* number of pixels per video memory address */
+ NULL, /* before pixel update callback */
+ NULL, /* row update callback */
+ NULL, /* after pixel update callback */
+ DEVCB_NULL, /* callback for display state changes */
+ DEVCB_NULL, /* callback for cursor state changes */
+ DEVCB_NULL, /* HSYNC callback */
+ DEVCB_NULL, /* VSYNC callback */
+ NULL /* update address callback */
};
diff --git a/src/mame/drivers/coinmvga.c b/src/mame/drivers/coinmvga.c
index 2d91df4d5e4..1dc18356e21 100644
--- a/src/mame/drivers/coinmvga.c
+++ b/src/mame/drivers/coinmvga.c
@@ -208,10 +208,10 @@
*******************************************************************************/
-#define CPU_CLOCK XTAL_14_7456MHz
-#define MACH_CLOCK XTAL_50MHz // 50.35
-#define COM_CLOCK XTAL_20MHz
-#define SND_CLOCK XTAL_16_9344MHz
+#define CPU_CLOCK XTAL_14_7456MHz
+#define MACH_CLOCK XTAL_50MHz // 50.35
+#define COM_CLOCK XTAL_20MHz
+#define SND_CLOCK XTAL_16_9344MHz
#include "emu.h"
#include "cpu/h83002/h8.h"
@@ -645,8 +645,8 @@ static const gfx_layout tiles16x16_layout =
******************************/
static GFXDECODE_START( coinmvga )
- GFXDECODE_ENTRY( "gfx1", 0, tiles8x8_layout, 0x100, 16 ) /* Foreground GFX */
- GFXDECODE_ENTRY( "gfx2", 0, tiles16x16_layout, 0x000, 16 ) /* Background GFX */
+ GFXDECODE_ENTRY( "gfx1", 0, tiles8x8_layout, 0x100, 16 ) /* Foreground GFX */
+ GFXDECODE_ENTRY( "gfx2", 0, tiles16x16_layout, 0x000, 16 ) /* Background GFX */
GFXDECODE_END
@@ -656,7 +656,7 @@ GFXDECODE_END
static const ymz280b_interface ymz280b_intf =
{
- 0 // irq ?
+ 0 // irq ?
};
INTERRUPT_GEN_MEMBER(coinmvga_state::vblank_irq)
@@ -673,10 +673,10 @@ INTERRUPT_GEN_MEMBER(coinmvga_state::vblank_irq)
static MACHINE_CONFIG_START( coinmvga, coinmvga_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", H83007, CPU_CLOCK) /* xtal */
+ MCFG_CPU_ADD("maincpu", H83007, CPU_CLOCK) /* xtal */
MCFG_CPU_PROGRAM_MAP(coinmvga_map)
MCFG_CPU_IO_MAP(coinmvga_io_map)
- MCFG_CPU_VBLANK_INT_DRIVER("screen", coinmvga_state, vblank_irq) /* wrong, fix me */
+ MCFG_CPU_VBLANK_INT_DRIVER("screen", coinmvga_state, vblank_irq) /* wrong, fix me */
// MCFG_NVRAM_ADD_0FILL("nvram")
@@ -718,20 +718,20 @@ ROM_START( colorama )
ROM_LOAD16_BYTE( "p521_prg2.cp2", 0x00000, 0x80000, CRC(6db85d66) SHA1(21009aa01db5193d1be588deaeba8f89582d53dd) )
ROM_REGION( 0x100000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "p521_fore1.fg1", 0x00001, 0x80000, CRC(0a8fe27a) SHA1(29500040e2bd0b6f349abaf51bb7f8aaac73e8cf) )
- ROM_LOAD16_BYTE( "p521_fore2.fg2", 0x00000, 0x80000, CRC(3ae78445) SHA1(ef590a6042969718d88732244d2639b7cd8ab507) )
+ ROM_LOAD16_BYTE( "p521_fore1.fg1", 0x00001, 0x80000, CRC(0a8fe27a) SHA1(29500040e2bd0b6f349abaf51bb7f8aaac73e8cf) )
+ ROM_LOAD16_BYTE( "p521_fore2.fg2", 0x00000, 0x80000, CRC(3ae78445) SHA1(ef590a6042969718d88732244d2639b7cd8ab507) )
ROM_REGION( 0x400000, "gfx2", 0 )
- ROM_LOAD16_BYTE( "p521_back1.bg1", 0x200001, 0x100000, CRC(0c1a7a2d) SHA1(a7827c6091d0f78e146419261eca427cd229d445) )
- ROM_LOAD16_BYTE( "p521_back2.bg2", 0x200000, 0x100000, CRC(218912d7) SHA1(64e3dc22ff6ae296e1843b6d6bfb02eb0d202db5) )
- ROM_LOAD16_BYTE( "p521_back3.bg3", 0x000001, 0x100000, CRC(8ddad7d1) SHA1(0a41ca166c8a9eca2ee27d35a3ae41ddb8759dce) )
- ROM_LOAD16_BYTE( "p521_back4.bg4", 0x000000, 0x100000, CRC(28d54ce1) SHA1(0dadae2e11f9b86dddb6a0c33abfbdb8b6f2d862) )
+ ROM_LOAD16_BYTE( "p521_back1.bg1", 0x200001, 0x100000, CRC(0c1a7a2d) SHA1(a7827c6091d0f78e146419261eca427cd229d445) )
+ ROM_LOAD16_BYTE( "p521_back2.bg2", 0x200000, 0x100000, CRC(218912d7) SHA1(64e3dc22ff6ae296e1843b6d6bfb02eb0d202db5) )
+ ROM_LOAD16_BYTE( "p521_back3.bg3", 0x000001, 0x100000, CRC(8ddad7d1) SHA1(0a41ca166c8a9eca2ee27d35a3ae41ddb8759dce) )
+ ROM_LOAD16_BYTE( "p521_back4.bg4", 0x000000, 0x100000, CRC(28d54ce1) SHA1(0dadae2e11f9b86dddb6a0c33abfbdb8b6f2d862) )
ROM_REGION( 0x100000, "ymz", 0 )
- ROM_LOAD( "p521_snd.sp1", 0x00000, 0x100000, CRC(5c87bb98) SHA1(bc1b8c090fbae166e3a7e1da74bfd2e84c1a03f6) )
+ ROM_LOAD( "p521_snd.sp1", 0x00000, 0x100000, CRC(5c87bb98) SHA1(bc1b8c090fbae166e3a7e1da74bfd2e84c1a03f6) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
+ ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
ROM_END
@@ -743,27 +743,27 @@ ROM_END
ROM_START( cmrltv75 )
- /*** Bet Station ***/
+ /*** Bet Station ***/
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD16_BYTE( "bet.cp1", 0x00001, 0x80000, CRC(2dc1c899) SHA1(2be488d23df5e50bbcfa4e66a49a455c617b29b4) )
ROM_LOAD16_BYTE( "bet.cp2", 0x00000, 0x80000, CRC(fcab8825) SHA1(79cb862ac5363ab90e91184efd9cfaec86bb82a5) )
ROM_REGION( 0x100000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "p497.fg1", 0x00001, 0x80000, CRC(ce5f9fe9) SHA1(a30f5f375eaa651ede4057449c1648c64d207577) )
- ROM_LOAD16_BYTE( "p497.fg2", 0x00000, 0x80000, CRC(3846fad0) SHA1(409725ab8c9353a8d5774c5f010ace1077b3fd35) )
+ ROM_LOAD16_BYTE( "p497.fg1", 0x00001, 0x80000, CRC(ce5f9fe9) SHA1(a30f5f375eaa651ede4057449c1648c64d207577) )
+ ROM_LOAD16_BYTE( "p497.fg2", 0x00000, 0x80000, CRC(3846fad0) SHA1(409725ab8c9353a8d5774c5f010ace1077b3fd35) )
ROM_REGION( 0x400000, "gfx2", 0 )
- ROM_LOAD16_BYTE( "p497.bg1", 0x200001, 0x100000, CRC(fadf2a5a) SHA1(ac5413ff213ef5c6210e716a24cd41519b81a54a) )
- ROM_LOAD16_BYTE( "p497.bg2", 0x200000, 0x100000, CRC(5d648914) SHA1(2a4a2839293529aee500aacfbf1d6b12b328b2eb) )
- ROM_LOAD16_BYTE( "p497.bg3", 0x000001, 0x100000, CRC(627e236c) SHA1(a4bd8b482cbac2bf2ab1723ee61d32480ede8985) )
- ROM_LOAD16_BYTE( "p497.bg4", 0x000000, 0x100000, CRC(3698f748) SHA1(856eeed8eff79273ba3aafbbd5d0b1d89e9cff5b) )
+ ROM_LOAD16_BYTE( "p497.bg1", 0x200001, 0x100000, CRC(fadf2a5a) SHA1(ac5413ff213ef5c6210e716a24cd41519b81a54a) )
+ ROM_LOAD16_BYTE( "p497.bg2", 0x200000, 0x100000, CRC(5d648914) SHA1(2a4a2839293529aee500aacfbf1d6b12b328b2eb) )
+ ROM_LOAD16_BYTE( "p497.bg3", 0x000001, 0x100000, CRC(627e236c) SHA1(a4bd8b482cbac2bf2ab1723ee61d32480ede8985) )
+ ROM_LOAD16_BYTE( "p497.bg4", 0x000000, 0x100000, CRC(3698f748) SHA1(856eeed8eff79273ba3aafbbd5d0b1d89e9cff5b) )
ROM_REGION( 0x100000, "ymz", 0 )
- ROM_LOAD( "betsound.sp1", 0x00000, 0x100000, CRC(979ecd0e) SHA1(827e8c86b27e5252368960fffe42ace167aa4495) )
+ ROM_LOAD( "betsound.sp1", 0x00000, 0x100000, CRC(979ecd0e) SHA1(827e8c86b27e5252368960fffe42ace167aa4495) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
+ ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
/*** Wheel Controller ***/
@@ -772,12 +772,12 @@ ROM_START( cmrltv75 )
ROM_LOAD16_BYTE( "wheel.cp2", 0x00000, 0x80000, CRC(a8441b04) SHA1(cc8f10390947c2a15b2c94b11574c5eeb69fded5) )
ROM_REGION( 0x800000, "wheelsnd", 0 ) /* the wheel controller has 8 sockets */
- ROM_LOAD( "rwc497ym.sp1", 0x000000, 0x100000, CRC(13d6cff5) SHA1(ad1858f251e11017a427cbf7219d78bb2b854528) )
- ROM_LOAD( "rwc497ym.sp2", 0x100000, 0x100000, CRC(f8c7efd1) SHA1(e86a7ef0617c85415334e1f39a9059d5b16bc7d1) )
- ROM_LOAD( "rwc497ym.sp3", 0x200000, 0x100000, CRC(a1977dff) SHA1(c405bf1f1721ae864a2ff91ec7d637f03e431ad4) )
- ROM_LOAD( "rwc497ym.sp4", 0x300000, 0x100000, CRC(f8cb0fb8) SHA1(3ea8f268bc8745a257eb4b20d7e79196d0f1fb9e) )
- ROM_LOAD( "rwc497ym.sp5", 0x400000, 0x100000, CRC(788b52f7) SHA1(1b339cb984b807a08e6fde260b5ee2bc8ca66f62) )
- ROM_LOAD( "rwc497ym.sp6", 0x500000, 0x100000, CRC(be94fd18) SHA1(2884cae7cf96008a78e77f42e8efb5c3ca8f4a4d) )
+ ROM_LOAD( "rwc497ym.sp1", 0x000000, 0x100000, CRC(13d6cff5) SHA1(ad1858f251e11017a427cbf7219d78bb2b854528) )
+ ROM_LOAD( "rwc497ym.sp2", 0x100000, 0x100000, CRC(f8c7efd1) SHA1(e86a7ef0617c85415334e1f39a9059d5b16bc7d1) )
+ ROM_LOAD( "rwc497ym.sp3", 0x200000, 0x100000, CRC(a1977dff) SHA1(c405bf1f1721ae864a2ff91ec7d637f03e431ad4) )
+ ROM_LOAD( "rwc497ym.sp4", 0x300000, 0x100000, CRC(f8cb0fb8) SHA1(3ea8f268bc8745a257eb4b20d7e79196d0f1fb9e) )
+ ROM_LOAD( "rwc497ym.sp5", 0x400000, 0x100000, CRC(788b52f7) SHA1(1b339cb984b807a08e6fde260b5ee2bc8ca66f62) )
+ ROM_LOAD( "rwc497ym.sp6", 0x500000, 0x100000, CRC(be94fd18) SHA1(2884cae7cf96008a78e77f42e8efb5c3ca8f4a4d) )
ROM_END
@@ -789,27 +789,27 @@ ROM_END
ROM_START( cmkenosp )
- /*** Bet Station ***/
+ /*** Bet Station ***/
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD16_BYTE( "bet1.cp1", 0x00001, 0x80000, CRC(ee04b815) SHA1(cea29973cf9caa5c06bc312fc3b19e146c1ae063) )
ROM_LOAD16_BYTE( "bet2.cp2", 0x00000, 0x80000, CRC(32071845) SHA1(278217a70ea777f82ae91d11d51b832383eafdbe) )
ROM_REGION( 0x100000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "fore1.fg1", 0x00001, 0x80000, CRC(a3548c2a) SHA1(02f98ee09581a235df3704951683f9d2aab3b1e8) )
- ROM_LOAD16_BYTE( "fore2.fg2", 0x00000, 0x80000, CRC(8b1afa73) SHA1(efd176dfb55f047b8e01b9460469936c86953417) )
+ ROM_LOAD16_BYTE( "fore1.fg1", 0x00001, 0x80000, CRC(a3548c2a) SHA1(02f98ee09581a235df3704951683f9d2aab3b1e8) )
+ ROM_LOAD16_BYTE( "fore2.fg2", 0x00000, 0x80000, CRC(8b1afa73) SHA1(efd176dfb55f047b8e01b9460469936c86953417) )
ROM_REGION( 0x400000, "gfx2", 0 )
- ROM_LOAD16_BYTE( "back1.bg1", 0x200001, 0x100000, CRC(8e9d1753) SHA1(4a733bc6b284571b2dae9e80ba8b88724e9dbffb) )
- ROM_LOAD16_BYTE( "back2.bg2", 0x200000, 0x100000, CRC(aa4fe1ba) SHA1(241cf6ee13664d4cf0c559c26170cb561afca016) )
- ROM_LOAD16_BYTE( "back3.bg3", 0x000001, 0x100000, CRC(9f26f0e0) SHA1(0c3d78e2befc6fdeb8c3534f5278d2d275106219) )
- ROM_LOAD16_BYTE( "back4.bg4", 0x000000, 0x100000, CRC(96d33887) SHA1(ca7eb9f2cfeb65c69e837246c8c78ea56c057e66) )
+ ROM_LOAD16_BYTE( "back1.bg1", 0x200001, 0x100000, CRC(8e9d1753) SHA1(4a733bc6b284571b2dae9e80ba8b88724e9dbffb) )
+ ROM_LOAD16_BYTE( "back2.bg2", 0x200000, 0x100000, CRC(aa4fe1ba) SHA1(241cf6ee13664d4cf0c559c26170cb561afca016) )
+ ROM_LOAD16_BYTE( "back3.bg3", 0x000001, 0x100000, CRC(9f26f0e0) SHA1(0c3d78e2befc6fdeb8c3534f5278d2d275106219) )
+ ROM_LOAD16_BYTE( "back4.bg4", 0x000000, 0x100000, CRC(96d33887) SHA1(ca7eb9f2cfeb65c69e837246c8c78ea56c057e66) )
ROM_REGION( 0x100000, "ymz", 0 )
- ROM_LOAD( "betsound.sp1", 0x00000, 0x100000, CRC(979ecd0e) SHA1(827e8c86b27e5252368960fffe42ace167aa4495) )
+ ROM_LOAD( "betsound.sp1", 0x00000, 0x100000, CRC(979ecd0e) SHA1(827e8c86b27e5252368960fffe42ace167aa4495) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
+ ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
/*** Wheel Controller ***/
@@ -818,10 +818,10 @@ ROM_START( cmkenosp )
ROM_LOAD16_BYTE( "wheel_prog_2.cp2", 0x00000, 0x80000, CRC(cfc02d3e) SHA1(09e41b26c62137b31f8673184dad565932881f47) )
ROM_REGION( 0x800000, "wheelsnd", 0 ) /* the wheel controller has 8 sockets */
- ROM_LOAD( "rwc497ym.sp1", 0x000000, 0x100000, CRC(90a93951) SHA1(73603f402eb3b62e69a745af9d45738f35bc0b4e) )
- ROM_LOAD( "rwc497ym.sp2", 0x100000, 0x100000, CRC(f5d0a6e7) SHA1(c4a1c333854c95e37c0040fed35b72ac1e853832) )
- ROM_LOAD( "rwc497ym.sp3", 0x200000, 0x100000, CRC(0e53c1a9) SHA1(0785c52b24277c9ba24d0fbf0ac335acb0235e23) )
- ROM_LOAD( "rwc497ym.sp4", 0x300000, 0x100000, CRC(b5729ae7) SHA1(0e63fbb81ff5f2fef3c653f769db8073dff1214b) )
+ ROM_LOAD( "rwc497ym.sp1", 0x000000, 0x100000, CRC(90a93951) SHA1(73603f402eb3b62e69a745af9d45738f35bc0b4e) )
+ ROM_LOAD( "rwc497ym.sp2", 0x100000, 0x100000, CRC(f5d0a6e7) SHA1(c4a1c333854c95e37c0040fed35b72ac1e853832) )
+ ROM_LOAD( "rwc497ym.sp3", 0x200000, 0x100000, CRC(0e53c1a9) SHA1(0785c52b24277c9ba24d0fbf0ac335acb0235e23) )
+ ROM_LOAD( "rwc497ym.sp4", 0x300000, 0x100000, CRC(b5729ae7) SHA1(0e63fbb81ff5f2fef3c653f769db8073dff1214b) )
ROM_END
@@ -833,27 +833,27 @@ ROM_END
ROM_START( cmkenospa )
- /*** Bet Station ***/
+ /*** Bet Station ***/
ROM_REGION( 0x100000, "maincpu", 0 )
ROM_LOAD16_BYTE( "bet.cp1", 0x00001, 0x80000, CRC(ffdc69a0) SHA1(2ba6a36cb0953474164d4fb80a60bf8ca27e9a0c) )
ROM_LOAD16_BYTE( "bet.cp2", 0x00000, 0x80000, CRC(c46f237c) SHA1(75a60ace7277a90b3d7acd7838d1271fd41517f1) )
ROM_REGION( 0x100000, "gfx1", 0 )
- ROM_LOAD16_BYTE( "fore1.fg1", 0x00001, 0x80000, CRC(a3548c2a) SHA1(02f98ee09581a235df3704951683f9d2aab3b1e8) )
- ROM_LOAD16_BYTE( "fore2.fg2", 0x00000, 0x80000, CRC(8b1afa73) SHA1(efd176dfb55f047b8e01b9460469936c86953417) )
+ ROM_LOAD16_BYTE( "fore1.fg1", 0x00001, 0x80000, CRC(a3548c2a) SHA1(02f98ee09581a235df3704951683f9d2aab3b1e8) )
+ ROM_LOAD16_BYTE( "fore2.fg2", 0x00000, 0x80000, CRC(8b1afa73) SHA1(efd176dfb55f047b8e01b9460469936c86953417) )
ROM_REGION( 0x400000, "gfx2", 0 )
- ROM_LOAD16_BYTE( "back1.bg1", 0x200001, 0x100000, CRC(8e9d1753) SHA1(4a733bc6b284571b2dae9e80ba8b88724e9dbffb) )
- ROM_LOAD16_BYTE( "back2.bg2", 0x200000, 0x100000, CRC(aa4fe1ba) SHA1(241cf6ee13664d4cf0c559c26170cb561afca016) )
- ROM_LOAD16_BYTE( "back3.bg3", 0x000001, 0x100000, CRC(9f26f0e0) SHA1(0c3d78e2befc6fdeb8c3534f5278d2d275106219) )
- ROM_LOAD16_BYTE( "back4.bg4", 0x000000, 0x100000, CRC(96d33887) SHA1(ca7eb9f2cfeb65c69e837246c8c78ea56c057e66) )
+ ROM_LOAD16_BYTE( "back1.bg1", 0x200001, 0x100000, CRC(8e9d1753) SHA1(4a733bc6b284571b2dae9e80ba8b88724e9dbffb) )
+ ROM_LOAD16_BYTE( "back2.bg2", 0x200000, 0x100000, CRC(aa4fe1ba) SHA1(241cf6ee13664d4cf0c559c26170cb561afca016) )
+ ROM_LOAD16_BYTE( "back3.bg3", 0x000001, 0x100000, CRC(9f26f0e0) SHA1(0c3d78e2befc6fdeb8c3534f5278d2d275106219) )
+ ROM_LOAD16_BYTE( "back4.bg4", 0x000000, 0x100000, CRC(96d33887) SHA1(ca7eb9f2cfeb65c69e837246c8c78ea56c057e66) )
ROM_REGION( 0x100000, "ymz", 0 )
- ROM_LOAD( "betsound.sp1", 0x00000, 0x100000, CRC(979ecd0e) SHA1(827e8c86b27e5252368960fffe42ace167aa4495) )
+ ROM_LOAD( "betsound.sp1", 0x00000, 0x100000, CRC(979ecd0e) SHA1(827e8c86b27e5252368960fffe42ace167aa4495) )
ROM_REGION( 0x0200, "plds", 0 )
- ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
+ ROM_LOAD( "palce22v10h25.u11", 0x0000, 0x0200, NO_DUMP )
/*** Wheel Controller ***/
@@ -862,10 +862,10 @@ ROM_START( cmkenospa )
ROM_LOAD16_BYTE( "wheel.cp2", 0x00000, 0x80000, CRC(49a50ae7) SHA1(89857ebd94ebbfa040d99648a46779c9ba8f85dd) )
ROM_REGION( 0x800000, "wheelsnd", 0 ) /* the wheel controller has 8 sockets */
- ROM_LOAD( "rwc497ym.sp1", 0x000000, 0x100000, CRC(90a93951) SHA1(73603f402eb3b62e69a745af9d45738f35bc0b4e) )
- ROM_LOAD( "rwc497ym.sp2", 0x100000, 0x100000, CRC(f5d0a6e7) SHA1(c4a1c333854c95e37c0040fed35b72ac1e853832) )
- ROM_LOAD( "rwc497ym.sp3", 0x200000, 0x100000, CRC(0e53c1a9) SHA1(0785c52b24277c9ba24d0fbf0ac335acb0235e23) )
- ROM_LOAD( "rwc497ym.sp4", 0x300000, 0x100000, CRC(b5729ae7) SHA1(0e63fbb81ff5f2fef3c653f769db8073dff1214b) )
+ ROM_LOAD( "rwc497ym.sp1", 0x000000, 0x100000, CRC(90a93951) SHA1(73603f402eb3b62e69a745af9d45738f35bc0b4e) )
+ ROM_LOAD( "rwc497ym.sp2", 0x100000, 0x100000, CRC(f5d0a6e7) SHA1(c4a1c333854c95e37c0040fed35b72ac1e853832) )
+ ROM_LOAD( "rwc497ym.sp3", 0x200000, 0x100000, CRC(0e53c1a9) SHA1(0785c52b24277c9ba24d0fbf0ac335acb0235e23) )
+ ROM_LOAD( "rwc497ym.sp4", 0x300000, 0x100000, CRC(b5729ae7) SHA1(0e63fbb81ff5f2fef3c653f769db8073dff1214b) )
ROM_END
diff --git a/src/mame/drivers/combatsc.c b/src/mame/drivers/combatsc.c
index 55178aaa616..6a140ba572c 100644
--- a/src/mame/drivers/combatsc.c
+++ b/src/mame/drivers/combatsc.c
@@ -211,7 +211,7 @@ WRITE8_MEMBER(combatsc_state::combatscb_io_w)
{
case 0x400: combatscb_priority_w(space, 0, data); break;
case 0x800: combatscb_sh_irqtrigger_w(space, 0, data); break;
- case 0xc00: combatsc_vreg_w(space, 0, data); break;
+ case 0xc00: combatsc_vreg_w(space, 0, data); break;
default: m_io_ram[offset] = data; break;
}
}
@@ -249,8 +249,8 @@ WRITE8_MEMBER(combatsc_state::combatscb_bankselect_w)
}
else
{
- space.install_read_bank(0x4000, 0x7fff, "bank1"); /* banked ROM */
- space.unmap_write(0x4000, 0x7fff); /* banked ROM */
+ space.install_read_bank(0x4000, 0x7fff, "bank1"); /* banked ROM */
+ space.unmap_write(0x4000, 0x7fff); /* banked ROM */
}
}
}
@@ -364,45 +364,45 @@ static ADDRESS_MAP_START( combatsc_map, AS_PROGRAM, 8, combatsc_state )
AM_RANGE(0x0206, 0x0206) AM_WRITE(protection_clock_w)
AM_RANGE(0x0400, 0x0400) AM_READ_PORT("IN0")
- AM_RANGE(0x0401, 0x0401) AM_READ_PORT("DSW3") /* DSW #3 */
- AM_RANGE(0x0402, 0x0402) AM_READ_PORT("DSW1") /* DSW #1 */
- AM_RANGE(0x0403, 0x0403) AM_READ_PORT("DSW2") /* DSW #2 */
- AM_RANGE(0x0404, 0x0407) AM_READ(trackball_r) /* 1P & 2P controls / trackball */
- AM_RANGE(0x0408, 0x0408) AM_WRITE(combatsc_coin_counter_w) /* coin counters */
+ AM_RANGE(0x0401, 0x0401) AM_READ_PORT("DSW3") /* DSW #3 */
+ AM_RANGE(0x0402, 0x0402) AM_READ_PORT("DSW1") /* DSW #1 */
+ AM_RANGE(0x0403, 0x0403) AM_READ_PORT("DSW2") /* DSW #2 */
+ AM_RANGE(0x0404, 0x0407) AM_READ(trackball_r) /* 1P & 2P controls / trackball */
+ AM_RANGE(0x0408, 0x0408) AM_WRITE(combatsc_coin_counter_w) /* coin counters */
AM_RANGE(0x040c, 0x040c) AM_WRITE(combatsc_vreg_w)
AM_RANGE(0x0410, 0x0410) AM_WRITE(combatsc_bankselect_w)
AM_RANGE(0x0414, 0x0414) AM_WRITE(soundlatch_byte_w)
AM_RANGE(0x0418, 0x0418) AM_WRITE(combatsc_sh_irqtrigger_w)
- AM_RANGE(0x041c, 0x041c) AM_WRITE(watchdog_reset_w) /* watchdog reset? */
+ AM_RANGE(0x041c, 0x041c) AM_WRITE(watchdog_reset_w) /* watchdog reset? */
- AM_RANGE(0x0600, 0x06ff) AM_RAM AM_SHARE("paletteram") /* palette */
- AM_RANGE(0x0800, 0x1fff) AM_RAM /* RAM */
+ AM_RANGE(0x0600, 0x06ff) AM_RAM AM_SHARE("paletteram") /* palette */
+ AM_RANGE(0x0800, 0x1fff) AM_RAM /* RAM */
AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combatsc_video_r, combatsc_video_w)
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM area */
- AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM area */
+ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( combatscb_map, AS_PROGRAM, 8, combatsc_state )
AM_RANGE(0x0000, 0x04ff) AM_RAM
AM_RANGE(0x0500, 0x0500) AM_WRITE(combatscb_bankselect_w)
- AM_RANGE(0x0600, 0x06ff) AM_RAM AM_SHARE("paletteram") /* palette */
+ AM_RANGE(0x0600, 0x06ff) AM_RAM AM_SHARE("paletteram") /* palette */
AM_RANGE(0x0800, 0x1fff) AM_RAM
AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combatsc_video_r, combatsc_video_w)
- AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM/RAM area */
- AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
+ AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1") /* banked ROM/RAM area */
+ AM_RANGE(0x8000, 0xffff) AM_ROM /* ROM */
ADDRESS_MAP_END
static ADDRESS_MAP_START( combatsc_sound_map, AS_PROGRAM, 8, combatsc_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */
- AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
+ AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */
+ AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
- AM_RANGE(0x9000, 0x9000) AM_WRITE(combatsc_play_w) /* upd7759 play voice */
- AM_RANGE(0xa000, 0xa000) AM_DEVWRITE_LEGACY("upd", upd7759_port_w) /* upd7759 voice select */
- AM_RANGE(0xb000, 0xb000) AM_READ(combatsc_busy_r) /* upd7759 busy? */
- AM_RANGE(0xc000, 0xc000) AM_WRITE(combatsc_voice_reset_w) /* upd7759 reset? */
+ AM_RANGE(0x9000, 0x9000) AM_WRITE(combatsc_play_w) /* upd7759 play voice */
+ AM_RANGE(0xa000, 0xa000) AM_DEVWRITE_LEGACY("upd", upd7759_port_w) /* upd7759 voice select */
+ AM_RANGE(0xb000, 0xb000) AM_READ(combatsc_busy_r) /* upd7759 busy? */
+ AM_RANGE(0xc000, 0xc000) AM_WRITE(combatsc_voice_reset_w) /* upd7759 reset? */
- AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r? */
- AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) /* YM 2203 intercepted */
+ AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r? */
+ AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) /* YM 2203 intercepted */
ADDRESS_MAP_END
WRITE8_MEMBER(combatsc_state::combatscb_dac_w)
@@ -420,12 +420,12 @@ WRITE8_MEMBER(combatsc_state::combatscb_dac_w)
}
static ADDRESS_MAP_START( combatscb_sound_map, AS_PROGRAM, 8, combatsc_state )
- AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */
- AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
- AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) /* YM 2203 */
- AM_RANGE(0x9008, 0x9009) AM_DEVREAD_LEGACY("ymsnd", ym2203_r) /* ??? */
+ AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */
+ AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
+ AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE_LEGACY("ymsnd", ym2203_r, ym2203_w) /* YM 2203 */
+ AM_RANGE(0x9008, 0x9009) AM_DEVREAD_LEGACY("ymsnd", ym2203_r) /* ??? */
AM_RANGE(0x9800, 0x9800) AM_WRITE(combatscb_dac_w)
- AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r? */
+ AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_byte_r) /* soundlatch_byte_r? */
AM_RANGE(0xc000, 0xffff) AM_ROMBANK("bl_abank")
ADDRESS_MAP_END
@@ -452,11 +452,11 @@ static INPUT_PORTS_START( common_inputs )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
- PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
- PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "SW3:2" ) /* Not Used according to the manual */
+ PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( On ) )
+ PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x00, "SW3:2" ) /* Not Used according to the manual */
PORT_SERVICE_DIPLOC( 0x40, IP_ACTIVE_LOW, "SW3:3" )
- PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x00, "SW3:4" ) /* Not Used according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x00, "SW3:4" ) /* Not Used according to the manual */
INPUT_PORTS_END
static INPUT_PORTS_START( dips )
@@ -498,13 +498,13 @@ static INPUT_PORTS_START( dips )
/* None = coin slot B disabled */
PORT_START("DSW2")
- PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW2:1" ) /* Not Used according to the manual */
- PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW2:2" ) /* Not Used according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW2:1" ) /* Not Used according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x02, 0x02, "SW2:2" ) /* Not Used according to the manual */
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3")
- PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
- PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
- PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Not Used according to the manual */
- PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Not Used according to the manual */
+ PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
+ PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
+ PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW2:4" ) /* Not Used according to the manual */
+ PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW2:5" ) /* Not Used according to the manual */
PORT_DIPNAME( 0x60, 0x60, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:6,7")
PORT_DIPSETTING( 0x60, DEF_STR( Easy ) )
PORT_DIPSETTING( 0x40, DEF_STR( Normal ) )
@@ -557,8 +557,8 @@ static INPUT_PORTS_START( combatscb )
PORT_MODIFY("DSW2")
PORT_DIPUNKNOWN_DIPLOC( 0x04, 0x00, "SW2:3" )
PORT_DIPNAME( 0x10, 0x00, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:5")
- PORT_DIPSETTING( 0x10, DEF_STR( No ) )
- PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
+ PORT_DIPSETTING( 0x10, DEF_STR( No ) )
+ PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
PORT_START("IN0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
@@ -604,7 +604,7 @@ static const gfx_layout tile_layout =
{
8,8,
0x2000, /* number of tiles */
- 4, /* bitplanes */
+ 4, /* bitplanes */
{ 0*0x10000*8, 1*0x10000*8, 2*0x10000*8, 3*0x10000*8 }, /* plane offsets */
{ 0,1,2,3,4,5,6,7 },
{ 0*8,1*8,2*8,3*8,4*8,5*8,6*8,7*8 },
@@ -614,8 +614,8 @@ static const gfx_layout tile_layout =
static const gfx_layout sprite_layout =
{
16,16,
- 0x800, /* number of sprites */
- 4, /* bitplanes */
+ 0x800, /* number of sprites */
+ 4, /* bitplanes */
{ 3*0x10000*8, 2*0x10000*8, 1*0x10000*8, 0*0x10000*8 }, /* plane offsets */
{
0,1,2,3,4,5,6,7,
@@ -733,11 +733,11 @@ void combatsc_state::machine_reset()
static MACHINE_CONFIG_START( combatsc, combatsc_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", HD6309, 3000000*4) /* 3 MHz? */
+ MCFG_CPU_ADD("maincpu", HD6309, 3000000*4) /* 3 MHz? */
MCFG_CPU_PROGRAM_MAP(combatsc_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", combatsc_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80,3579545) /* 3.579545 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80,3579545) /* 3.579545 MHz */
MCFG_CPU_PROGRAM_MAP(combatsc_sound_map)
MCFG_QUANTUM_TIME(attotime::from_hz(1200))
@@ -775,19 +775,19 @@ MACHINE_CONFIG_END
static const msm5205_interface msm5205_config =
{
- 0, /* interrupt function */
- MSM5205_SEX_4B /* 8KHz playback ? */
+ 0, /* interrupt function */
+ MSM5205_SEX_4B /* 8KHz playback ? */
};
/* combat school (bootleg on different hardware) */
static MACHINE_CONFIG_START( combatscb, combatsc_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", HD6309, 3000000*4) /* 3 MHz? */
+ MCFG_CPU_ADD("maincpu", HD6309, 3000000*4) /* 3 MHz? */
MCFG_CPU_PROGRAM_MAP(combatscb_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", combatsc_state, irq0_line_hold)
- MCFG_CPU_ADD("audiocpu", Z80,3579545) /* 3.579545 MHz */
+ MCFG_CPU_ADD("audiocpu", Z80,3579545) /* 3.579545 MHz */
MCFG_CPU_PROGRAM_MAP(combatscb_sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(combatsc_state, irq0_line_hold, 3800) // controls BGM tempo
@@ -852,7 +852,7 @@ ROM_START( combatsc )
ROM_LOAD( "611g10.h6", 0x0200, 0x0100, CRC(f916129a) SHA1(d5e4a8a3baab8fcdac86ef5182858cede1abf040) ) /* sprites lookup table */
ROM_LOAD( "611g09.h7", 0x0300, 0x0100, CRC(207a7b07) SHA1(f4e638e7f182e5228a062b243406d0ceaaa5bfdc) ) /* chars lookup table */
- ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
+ ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
ROM_LOAD( "611g04.rom", 0x00000, 0x20000, CRC(2987e158) SHA1(87c5129161d3be29a339083349807e60b625c3f7) )
ROM_REGION( 0x0600, "plds", 0 )
@@ -885,7 +885,7 @@ ROM_START( combatsct )
ROM_LOAD( "611g10.h6", 0x0200, 0x0100, CRC(f916129a) SHA1(d5e4a8a3baab8fcdac86ef5182858cede1abf040) ) /* sprites lookup table */
ROM_LOAD( "611g09.h7", 0x0300, 0x0100, CRC(207a7b07) SHA1(f4e638e7f182e5228a062b243406d0ceaaa5bfdc) ) /* chars lookup table */
- ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
+ ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
ROM_LOAD( "611g04.rom", 0x00000, 0x20000, CRC(2987e158) SHA1(87c5129161d3be29a339083349807e60b625c3f7) )
ROM_END
@@ -913,7 +913,7 @@ ROM_START( combatscj )
ROM_LOAD( "611g10.h6", 0x0200, 0x0100, CRC(f916129a) SHA1(d5e4a8a3baab8fcdac86ef5182858cede1abf040) ) /* sprites lookup table */
ROM_LOAD( "611g09.h7", 0x0300, 0x0100, CRC(207a7b07) SHA1(f4e638e7f182e5228a062b243406d0ceaaa5bfdc) ) /* chars lookup table */
- ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
+ ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
ROM_LOAD( "611g04.rom", 0x00000, 0x20000, CRC(2987e158) SHA1(87c5129161d3be29a339083349807e60b625c3f7) )
ROM_END
@@ -941,16 +941,16 @@ ROM_START( bootcamp )
ROM_LOAD( "611g10.h6", 0x0200, 0x0100, CRC(f916129a) SHA1(d5e4a8a3baab8fcdac86ef5182858cede1abf040) ) /* sprites lookup table */
ROM_LOAD( "611g09.h7", 0x0300, 0x0100, CRC(207a7b07) SHA1(f4e638e7f182e5228a062b243406d0ceaaa5bfdc) ) /* chars lookup table */
- ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
+ ROM_REGION( 0x20000, "upd", 0 ) /* uPD7759 data */
ROM_LOAD( "611g04.rom", 0x00000, 0x20000, CRC(2987e158) SHA1(87c5129161d3be29a339083349807e60b625c3f7) )
ROM_END
ROM_START( combatscb )
ROM_REGION( 0x40000, "maincpu", 0 ) /* 6809 code */
- ROM_LOAD( "combat.002", 0x30000, 0x08000, CRC(0996755d) SHA1(bb6bbbf7ab3b5fab5e1c6cebc7b3f0d720493c3b) )
+ ROM_LOAD( "combat.002", 0x30000, 0x08000, CRC(0996755d) SHA1(bb6bbbf7ab3b5fab5e1c6cebc7b3f0d720493c3b) )
ROM_CONTINUE( 0x08000, 0x08000 )
- ROM_LOAD( "combat.003", 0x10000, 0x10000, CRC(229c93b2) SHA1(ac3fd3df1bb5f6a461d0d1423c50568348ef69df) )
- ROM_LOAD( "combat.004", 0x20000, 0x10000, CRC(a069cb84) SHA1(f49f70afb17df46b16f5801ef42edb0706730723) )
+ ROM_LOAD( "combat.003", 0x10000, 0x10000, CRC(229c93b2) SHA1(ac3fd3df1bb5f6a461d0d1423c50568348ef69df) )
+ ROM_LOAD( "combat.004", 0x20000, 0x10000, CRC(a069cb84) SHA1(f49f70afb17df46b16f5801ef42edb0706730723) )
/* extra 0x8000 for banked RAM */
ROM_REGION( 0x10000 , "audiocpu", 0 ) /* sound CPU */
diff --git a/src/mame/drivers/comebaby.c b/src/mame/drivers/comebaby.c
index fdafde94653..050aba9ae92 100644
--- a/src/mame/drivers/comebaby.c
+++ b/src/mame/drivers/comebaby.c
@@ -69,7 +69,7 @@ class comebaby_state : public driver_device
public:
comebaby_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
- m_maincpu(*this, "maincpu")
+ m_maincpu(*this, "maincpu")
{ }
UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@@ -119,7 +119,7 @@ MACHINE_CONFIG_END
ROM_START(comebaby)
- ROM_REGION32_LE(0x20000, "maincpu", 0) /* motherboard bios */
+ ROM_REGION32_LE(0x20000, "maincpu", 0) /* motherboard bios */
ROM_LOAD("comeonbaby.pcbios", 0x000000, 0x10000, NO_DUMP )
DISK_REGION( "disks" )
diff --git a/src/mame/drivers/commando.c b/src/mame/drivers/commando.c
index cd41223bbd4..48f9db74469 100644
--- a/src/mame/drivers/commando.c
+++ b/src/mame/drivers/commando.c
@@ -108,7 +108,7 @@ static INPUT_PORTS_START( commando )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START("DSW1")
- PORT_DIPNAME( 0x03, 0x03, "Starting Area" ) PORT_DIPLOCATION("SW1:8,7")
+ PORT_DIPNAME( 0x03, 0x03, "Starting Area" ) PORT_DIPLOCATION("SW1:8,7")
PORT_DIPSETTING( 0x03, "0 (Forest 1)" )
PORT_DIPSETTING( 0x01, "2 (Desert 1)" )
PORT_DIPSETTING( 0x02, "4 (Forest 2)" )
@@ -203,22 +203,22 @@ static const gfx_layout spritelayout =
/* Graphics Decode Information */
static GFXDECODE_START( commando )
- GFXDECODE_ENTRY( "gfx1", 0, charlayout, 192, 16 ) // colors 192-255
- GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 16 ) // colors 0-127
- GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 128, 4 ) // colors 128-191
+ GFXDECODE_ENTRY( "gfx1", 0, charlayout, 192, 16 ) // colors 192-255
+ GFXDECODE_ENTRY( "gfx2", 0, tilelayout, 0, 16 ) // colors 0-127
+ GFXDECODE_ENTRY( "gfx3", 0, spritelayout, 128, 4 ) // colors 128-191
GFXDECODE_END
/* Sound Interface */
-#define XTAL 12000000
-#define PHI_B XTAL/2/2
-#define PHI_MAIN 4000000 // ??? too complicated to trace from schematics
+#define XTAL 12000000
+#define PHI_B XTAL/2/2
+#define PHI_MAIN 4000000 // ??? too complicated to trace from schematics
/* Interrupt Generator */
INTERRUPT_GEN_MEMBER(commando_state::commando_interrupt)
{
- device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xd7); // RST 10h - VBLANK
+ device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xd7); // RST 10h - VBLANK
}
/* Machine Driver */
@@ -245,11 +245,11 @@ void commando_state::machine_reset()
static MACHINE_CONFIG_START( commando, commando_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", Z80, PHI_MAIN) // ???
+ MCFG_CPU_ADD("maincpu", Z80, PHI_MAIN) // ???
MCFG_CPU_PROGRAM_MAP(commando_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", commando_state, commando_interrupt)
- MCFG_CPU_ADD("audiocpu", Z80, PHI_B) // 3 MHz
+ MCFG_CPU_ADD("audiocpu", Z80, PHI_B) // 3 MHz
MCFG_CPU_PROGRAM_MAP(sound_map)
MCFG_CPU_PERIODIC_INT_DRIVER(commando_state, irq0_line_hold, 4*60)
@@ -284,7 +284,7 @@ MACHINE_CONFIG_END
/* ROMs */
ROM_START( commando )
- ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
+ ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
ROM_LOAD( "cm04.9m", 0x0000, 0x8000, CRC(8438b694) SHA1(e154478d8f1b635355bd777370acabe49cb9d309) )
ROM_LOAD( "cm03.8m", 0x8000, 0x4000, CRC(35486542) SHA1(531a85c9e03970ce037be84f2240c2df6f6e3ec1) )
@@ -292,18 +292,18 @@ ROM_START( commando )
ROM_LOAD( "cm02.9f", 0x0000, 0x4000, CRC(f9cc4a74) SHA1(ee8dd73919c6f47f62cc6d999de9510db9f79b8f) )
ROM_REGION( 0x4000, "gfx1", 0 )
- ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
+ ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
ROM_REGION( 0x18000, "gfx2", 0 )
- ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
- ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
- ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
- ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
- ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
- ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
+ ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
+ ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
+ ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
+ ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
+ ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
+ ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
+ ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
ROM_LOAD( "vt06.8e", 0x04000, 0x4000, CRC(26fee521) SHA1(2fbfc73ee860f72a20229a01d4da9f5cc2e858d3) )
ROM_LOAD( "vt07.9e", 0x08000, 0x4000, CRC(ca88bdfd) SHA1(548b05460bc7983cc81f15c70e87f47d10db2812) )
ROM_LOAD( "vt08.7h", 0x0c000, 0x4000, CRC(2019c883) SHA1(883c0156ceab99f4849fe36972c4162b4ac8c216) )
@@ -311,16 +311,16 @@ ROM_START( commando )
ROM_LOAD( "vt10.9h", 0x14000, 0x4000, CRC(f069d2f8) SHA1(2c92300a9407470b34965021de882f1f7a84730c) )
ROM_REGION( 0x600, "proms", 0 )
- ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
- ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
- ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
- ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
- ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
+ ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
+ ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
+ ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
+ ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( commandou )
- ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
+ ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
ROM_LOAD( "u4-f.9m", 0x0000, 0x8000, CRC(a6118935) SHA1(d5811968b23d61e344e151747bcc3c0ed2b9497b) )
ROM_LOAD( "u3-f.8m", 0x8000, 0x4000, CRC(24f49684) SHA1(d38a7bd9f3b506747a03f6b94c3f8a2d9fc59166) )
@@ -328,18 +328,18 @@ ROM_START( commandou )
ROM_LOAD( "cm02.9f", 0x0000, 0x4000, CRC(f9cc4a74) SHA1(ee8dd73919c6f47f62cc6d999de9510db9f79b8f) )
ROM_REGION( 0x4000, "gfx1", 0 )
- ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
+ ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
ROM_REGION( 0x18000, "gfx2", 0 )
- ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
- ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
- ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
- ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
- ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
- ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
+ ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
+ ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
+ ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
+ ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
+ ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
+ ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
+ ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
ROM_LOAD( "vt06.8e", 0x04000, 0x4000, CRC(26fee521) SHA1(2fbfc73ee860f72a20229a01d4da9f5cc2e858d3) )
ROM_LOAD( "vt07.9e", 0x08000, 0x4000, CRC(ca88bdfd) SHA1(548b05460bc7983cc81f15c70e87f47d10db2812) )
ROM_LOAD( "vt08.7h", 0x0c000, 0x4000, CRC(2019c883) SHA1(883c0156ceab99f4849fe36972c4162b4ac8c216) )
@@ -347,16 +347,16 @@ ROM_START( commandou )
ROM_LOAD( "vt10.9h", 0x14000, 0x4000, CRC(f069d2f8) SHA1(2c92300a9407470b34965021de882f1f7a84730c) )
ROM_REGION( 0x600, "proms", 0 )
- ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
- ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
- ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
- ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
- ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
+ ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
+ ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
+ ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
+ ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( commandoj )
- ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
+ ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
ROM_LOAD( "so04.9m", 0x0000, 0x8000, CRC(d3f2bfb3) SHA1(738a5673ac6a907cb04cfb125e8aab3f7437b9d2) )
ROM_LOAD( "so03.8m", 0x8000, 0x4000, CRC(ed01f472) SHA1(fa181293ae8f0fee78d412259eb81f6de1e1307a) )
@@ -364,18 +364,18 @@ ROM_START( commandoj )
ROM_LOAD( "so02.9f", 0x0000, 0x4000, CRC(ca20aca5) SHA1(206a8fd4a8985e7ceed7de8349ba02627e881503) )
ROM_REGION( 0x4000, "gfx1", 0 )
- ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
+ ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
ROM_REGION( 0x18000, "gfx2", 0 )
- ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
- ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
- ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
- ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
- ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
- ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
+ ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
+ ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
+ ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
+ ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
+ ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
+ ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
+ ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
ROM_LOAD( "vt06.8e", 0x04000, 0x4000, CRC(26fee521) SHA1(2fbfc73ee860f72a20229a01d4da9f5cc2e858d3) )
ROM_LOAD( "vt07.9e", 0x08000, 0x4000, CRC(ca88bdfd) SHA1(548b05460bc7983cc81f15c70e87f47d10db2812) )
ROM_LOAD( "vt08.7h", 0x0c000, 0x4000, CRC(2019c883) SHA1(883c0156ceab99f4849fe36972c4162b4ac8c216) )
@@ -383,16 +383,16 @@ ROM_START( commandoj )
ROM_LOAD( "vt10.9h", 0x14000, 0x4000, CRC(f069d2f8) SHA1(2c92300a9407470b34965021de882f1f7a84730c) )
ROM_REGION( 0x600, "proms", 0 )
- ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
- ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
- ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
- ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
- ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
+ ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
+ ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
+ ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
+ ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( commandob )
- ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
+ ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
ROM_LOAD( "commandob_04_9m_27256.bin", 0x0000, 0x8000, CRC(348a7654) SHA1(f3668c47c154a9c7d7afeabb0259c9bc56e847ac) )
ROM_LOAD( "cm03.8m", 0x8000, 0x4000, CRC(35486542) SHA1(531a85c9e03970ce037be84f2240c2df6f6e3ec1) )
@@ -400,43 +400,43 @@ ROM_START( commandob )
ROM_LOAD( "cm02.9f", 0x0000, 0x4000, CRC(f9cc4a74) SHA1(ee8dd73919c6f47f62cc6d999de9510db9f79b8f) )
ROM_REGION( 0x4000, "gfx1", 0 )
- ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
+ ROM_LOAD( "vt01.5d", 0x0000, 0x4000, CRC(505726e0) SHA1(2435c87c9c9d78a6e703cf0e1f6a0288207fcd4c) ) // characters
ROM_REGION( 0x18000, "gfx2", 0 )
- ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
- ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
- ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
- ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
- ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
- ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
+ ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
+ ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
+ ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
+ ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
+ ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
+ ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
+ ROM_LOAD( "vt05.7e", 0x00000, 0x4000, CRC(79f16e3d) SHA1(04e1f03a4d6b4cc2b81bce3a290bbb95de900d35) ) // sprites
ROM_LOAD( "vt06.8e", 0x04000, 0x4000, CRC(26fee521) SHA1(2fbfc73ee860f72a20229a01d4da9f5cc2e858d3) )
ROM_LOAD( "vt07.9e", 0x08000, 0x4000, CRC(ca88bdfd) SHA1(548b05460bc7983cc81f15c70e87f47d10db2812) )
ROM_LOAD( "vt08.7h", 0x0c000, 0x4000, CRC(2019c883) SHA1(883c0156ceab99f4849fe36972c4162b4ac8c216) )
ROM_LOAD( "vt09.8h", 0x10000, 0x4000, CRC(98703982) SHA1(ba9a9b0dcadd4f52502828408c4a19b0bd518351) )
ROM_LOAD( "vt10.9h", 0x14000, 0x4000, CRC(f069d2f8) SHA1(2c92300a9407470b34965021de882f1f7a84730c) )
- /* I did not dumped the PROMs of the bootleg board, I'm just adding the parent ones, it has the same
- number of PROMs on the same board locations as the original board. */
+ /* I did not dumped the PROMs of the bootleg board, I'm just adding the parent ones, it has the same
+ number of PROMs on the same board locations as the original board. */
ROM_REGION( 0x600, "proms", 0 )
- ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
- ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
- ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
- ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
- ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
-
- /* There's a 16L8A PAL (with a 74LS244P and a 74LS367AP) on a tiny sub-board between the CPU1 ROMs
- and the CPU1 (a Z80 compatible NEC D780C-1). This sub-board is plugged on what seems to be
- a ROM socket. */
+ ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
+ ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
+ ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
+ ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
+ ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+
+ /* There's a 16L8A PAL (with a 74LS244P and a 74LS367AP) on a tiny sub-board between the CPU1 ROMs
+ and the CPU1 (a Z80 compatible NEC D780C-1). This sub-board is plugged on what seems to be
+ a ROM socket. */
ROM_REGION( 0x0200, "plds", 0 )
ROM_LOAD( "commandob_pal16l8a.bin", 0x0000, 0x0104, NO_DUMP ) /* I Didn't try to dump it... */
ROM_END
ROM_START( sinvasn )
- ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
+ ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
ROM_LOAD( "sp04.9m", 0x0000, 0x8000, CRC(33f9601e) SHA1(71182227b77fccbbc1d89b5828aa86dcc64ca05e) )
ROM_LOAD( "sp03.8m", 0x8000, 0x4000, CRC(c7fb43b3) SHA1(36d0dffdacc36a6b6a77101d942c0821846f3275) )
@@ -444,18 +444,18 @@ ROM_START( sinvasn )
ROM_LOAD( "u2.9f", 0x0000, 0x4000, CRC(cbf8c40e) SHA1(0c8dce034d96d075e012cbb8f68c2817b860d969) )
ROM_REGION( 0x04000, "gfx1", 0 )
- ROM_LOAD( "u1.5d", 0x0000, 0x4000, CRC(f477e13a) SHA1(ec5b80f5d508501e72cba028dc45b2c307ac452b) ) /* characters */
+ ROM_LOAD( "u1.5d", 0x0000, 0x4000, CRC(f477e13a) SHA1(ec5b80f5d508501e72cba028dc45b2c307ac452b) ) /* characters */
ROM_REGION( 0x18000, "gfx2", 0 )
- ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
- ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
- ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
- ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
- ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
- ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
+ ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
+ ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
+ ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
+ ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
+ ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
+ ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "u5.e7", 0x00000, 0x4000, CRC(2a97c933) SHA1(bfddb0c0f930a7caffad7e52d394d72c09ffb45f) ) /* sprites */
+ ROM_LOAD( "u5.e7", 0x00000, 0x4000, CRC(2a97c933) SHA1(bfddb0c0f930a7caffad7e52d394d72c09ffb45f) ) /* sprites */
ROM_LOAD( "sp06.e8", 0x04000, 0x4000, CRC(d7887212) SHA1(43ad98263d6314d40abf33087127c23a3ad72335) )
ROM_LOAD( "sp07.e9", 0x08000, 0x4000, CRC(9abe7a20) SHA1(5f1b851bd66a3ab818b893286d3ebf2194f425c4) )
ROM_LOAD( "u8.h7", 0x0c000, 0x4000, CRC(d6b4aa2e) SHA1(5bbf536f73010182b9150dd4fb1e2a42b5b380b0) )
@@ -463,16 +463,16 @@ ROM_START( sinvasn )
ROM_LOAD( "sp10.h9", 0x14000, 0x4000, CRC(3c131b0f) SHA1(dd3e63199120502c03eedd024a2eed3b5d3e2a1c) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
- ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
- ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
- ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
- ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
+ ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
+ ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
+ ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
+ ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
ROM_START( sinvasnb )
- ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
+ ROM_REGION( 2*0x10000, "maincpu", 0 ) /* 64k for code + 64k for decrypted opcodes */
ROM_LOAD( "u4", 0x0000, 0x8000, CRC(834ba0de) SHA1(85f40559e6a436f3f752b6e862a419a5b9481fa8) )
ROM_LOAD( "u3", 0x8000, 0x4000, CRC(07e4ee3a) SHA1(6d7665b3072f075893ef37e55147b10271d069ef) )
@@ -480,18 +480,18 @@ ROM_START( sinvasnb )
ROM_LOAD( "u2", 0x0000, 0x4000, CRC(cbf8c40e) SHA1(0c8dce034d96d075e012cbb8f68c2817b860d969) )
ROM_REGION( 0x04000, "gfx1", 0 )
- ROM_LOAD( "u1", 0x0000, 0x4000, CRC(f477e13a) SHA1(ec5b80f5d508501e72cba028dc45b2c307ac452b) ) /* characters */
+ ROM_LOAD( "u1", 0x0000, 0x4000, CRC(f477e13a) SHA1(ec5b80f5d508501e72cba028dc45b2c307ac452b) ) /* characters */
ROM_REGION( 0x18000, "gfx2", 0 )
- ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
- ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
- ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
- ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
- ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
- ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
+ ROM_LOAD( "vt11.5a", 0x00000, 0x4000, CRC(7b2e1b48) SHA1(5d49e1d8146e4ef744445b68f35677302e875a85) ) // SCR X (tiles)
+ ROM_LOAD( "vt12.6a", 0x04000, 0x4000, CRC(81b417d3) SHA1(5ec7e3f0c8069384a5f6eb39232c228b9d7b8c0c) ) // SCR X
+ ROM_LOAD( "vt13.7a", 0x08000, 0x4000, CRC(5612dbd2) SHA1(9e4e1a22b6cbf60607b9a81dae34482ae55f7c47) ) // SCR Y
+ ROM_LOAD( "vt14.8a", 0x0c000, 0x4000, CRC(2b2dee36) SHA1(8792278464fa3da47176582025f6673a15a581e2) ) // SCR Y
+ ROM_LOAD( "vt15.9a", 0x10000, 0x4000, CRC(de70babf) SHA1(6717e23baf55f84d3143fb432140a7c3e102ac26) ) // SCR Z
+ ROM_LOAD( "vt16.10a", 0x14000, 0x4000, CRC(14178237) SHA1(f896e71c7004349c9a46155edfd9f0aaa186065d) ) // SCR Z
ROM_REGION( 0x18000, "gfx3", 0 )
- ROM_LOAD( "u5", 0x00000, 0x4000, CRC(2a97c933) SHA1(bfddb0c0f930a7caffad7e52d394d72c09ffb45f) ) /* sprites */
+ ROM_LOAD( "u5", 0x00000, 0x4000, CRC(2a97c933) SHA1(bfddb0c0f930a7caffad7e52d394d72c09ffb45f) ) /* sprites */
ROM_LOAD( "vt06.e8", 0x04000, 0x4000, CRC(26fee521) SHA1(2fbfc73ee860f72a20229a01d4da9f5cc2e858d3) )
ROM_LOAD( "vt07.e9", 0x08000, 0x4000, CRC(ca88bdfd) SHA1(548b05460bc7983cc81f15c70e87f47d10db2812) )
ROM_LOAD( "u8", 0x0c000, 0x4000, CRC(d6b4aa2e) SHA1(5bbf536f73010182b9150dd4fb1e2a42b5b380b0) )
@@ -499,12 +499,12 @@ ROM_START( sinvasnb )
ROM_LOAD( "vt10.h9", 0x14000, 0x4000, CRC(f069d2f8) SHA1(2c92300a9407470b34965021de882f1f7a84730c) )
ROM_REGION( 0x0600, "proms", 0 )
- ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
- ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
- ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
- ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
- ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
- ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
+ ROM_LOAD( "vtb1.1d", 0x0000, 0x0100, CRC(3aba15a1) SHA1(8b057f6e26155dd9e48bde182e680fce4519f600) ) /* red */
+ ROM_LOAD( "vtb2.2d", 0x0100, 0x0100, CRC(88865754) SHA1(ca6dddca98baf00a65b2fb70b69cf4704ef8c831) ) /* green */
+ ROM_LOAD( "vtb3.3d", 0x0200, 0x0100, CRC(4c14c3f6) SHA1(644ac17c7413f094ec9a15cba87bbd421b26321f) ) /* blue */
+ ROM_LOAD( "vtb4.1h", 0x0300, 0x0100, CRC(b388c246) SHA1(038f9851699331ad887b6281a9df053dca3db8fd) ) /* palette selector (not used) */
+ ROM_LOAD( "vtb5.6l", 0x0400, 0x0100, CRC(712ac508) SHA1(5349d722ab6733afdda65f6e0a98322f0d515e86) ) /* interrupt timing (not used) */
+ ROM_LOAD( "vtb6.6e", 0x0500, 0x0100, CRC(0eaf5158) SHA1(bafd4108708f66cd7b280e47152b108f3e254fc9) ) /* video timing (not used) */
ROM_END
/* Driver Initialization */
diff --git a/src/mame/drivers/compgolf.c b/src/mame/drivers/compgolf.c
index 0e4ac3b72d1..2c32f4e5756 100644
--- a/src/mame/drivers/compgolf.c
+++ b/src/mame/drivers/compgolf.c
@@ -171,7 +171,7 @@ static const gfx_layout tilelayoutbg =
{ 0, 1, 2, 3, 16*8+0, 16*8+1, 16*8+2, 16*8+3,
2*16*8+0, 2*16*8+1, 2*16*8+2, 2*16*8+3, 3*16*8+0, 3*16*8+1, 3*16*8+2, 3*16*8+3 },
{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
- 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
+ 8*8, 9*8, 10*8, 11*8, 12*8, 13*8, 14*8, 15*8 },
32*16
};
diff --git a/src/mame/drivers/contra.c b/src/mame/drivers/contra.c
index e26c7b9f518..d0f61577b6d 100644
--- a/src/mame/drivers/contra.c
+++ b/src/mame/drivers/contra.c
@@ -71,7 +71,7 @@ static ADDRESS_MAP_START( contra_map, AS_PROGRAM, 8, contra_state )
AM_RANGE(0x0018, 0x0018) AM_WRITE(contra_coin_counter_w)
AM_RANGE(0x001a, 0x001a) AM_WRITE(contra_sh_irqtrigger_w)
AM_RANGE(0x001c, 0x001c) AM_WRITE(cpu_sound_command_w)
- AM_RANGE(0x001e, 0x001e) AM_WRITENOP /* ? */
+ AM_RANGE(0x001e, 0x001e) AM_WRITENOP /* ? */
AM_RANGE(0x0060, 0x0067) AM_WRITE(contra_K007121_ctrl_1_w)
AM_RANGE(0x0c00, 0x0cff) AM_RAM AM_SHARE("paletteram")
@@ -125,7 +125,7 @@ static INPUT_PORTS_START( contra )
PORT_DIPSETTING( 0x02, "3" )
PORT_DIPSETTING( 0x01, "5" )
PORT_DIPSETTING( 0x00, "7" )
- PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3") /* Not Used according to manual */
+ PORT_DIPNAME( 0x04, 0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:3") /* Not Used according to manual */
PORT_DIPSETTING( 0x00, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x04, DEF_STR( Cocktail ) )
PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION("SW2:4,5")
@@ -146,7 +146,7 @@ static INPUT_PORTS_START( contra )
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
- PORT_DIPNAME( 0x02, 0x02, "Upright Controls" ) PORT_DIPLOCATION("SW3:2") /* Not Used according to manual */
+ PORT_DIPNAME( 0x02, 0x02, "Upright Controls" ) PORT_DIPLOCATION("SW3:2") /* Not Used according to manual */
PORT_DIPSETTING( 0x02, DEF_STR( Single ) )
PORT_DIPSETTING( 0x00, DEF_STR( Dual ) )
PORT_SERVICE_DIPLOC( 0x04, IP_ACTIVE_LOW, "SW3:3" )
@@ -196,7 +196,7 @@ static MACHINE_CONFIG_START( contra, contra_state )
MCFG_CPU_ADD("audiocpu", M6809, XTAL_24MHz/8) /* 3000000? */
MCFG_CPU_PROGRAM_MAP(sound_map)
- MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* enough for the sound CPU to read all commands */
+ MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* enough for the sound CPU to read all commands */
/* video hardware */
@@ -224,12 +224,12 @@ MACHINE_CONFIG_END
ROM_START( contra )
- ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
+ ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
ROM_LOAD( "633m03.18a", 0x20000, 0x08000, CRC(d045e1da) SHA1(ec781e98a6efb14861223250c6239b06ec98ed0b) )
ROM_CONTINUE( 0x08000, 0x08000 )
ROM_LOAD( "633i02.17a", 0x10000, 0x10000, CRC(b2f7bd9a) SHA1(6c29568419bc49f0be3995b0c34edd9038f6f8d9) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -241,22 +241,22 @@ ROM_START( contra )
ROM_LOAD16_BYTE( "633e07.16f", 0x00001, 0x40000, CRC(f2d06638) SHA1(0fa0fbfc53ab5c31b9de22f90153d9af37ff22ce) )
ROM_REGION( 0x0500, "proms", 0 )
- ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
- ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
- ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
- ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
+ ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
+ ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
+ ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
+ ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
ROM_REGION( 0x0001, "pals", 0 )
ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
ROM_END
ROM_START( contra1 )
- ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
+ ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
ROM_LOAD( "633e03.18a", 0x20000, 0x08000, CRC(7fc0d8cf) SHA1(cf1cf15646a4e5dc72671e957bc51ca44d30995c) )
ROM_CONTINUE( 0x08000, 0x08000 )
ROM_LOAD( "633i02.17a", 0x10000, 0x10000, CRC(b2f7bd9a) SHA1(6c29568419bc49f0be3995b0c34edd9038f6f8d9) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -268,22 +268,22 @@ ROM_START( contra1 )
ROM_LOAD16_BYTE( "633e07.16f", 0x00001, 0x40000, CRC(f2d06638) SHA1(0fa0fbfc53ab5c31b9de22f90153d9af37ff22ce) )
ROM_REGION( 0x0400, "proms", 0 )
- ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
- ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
- ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
- ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
+ ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
+ ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
+ ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
+ ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
ROM_REGION( 0x0001, "pals", 0 )
ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
ROM_END
ROM_START( contrab )
- ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
+ ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
ROM_LOAD( "633m03.18a", 0x20000, 0x08000, CRC(d045e1da) SHA1(ec781e98a6efb14861223250c6239b06ec98ed0b) )
ROM_CONTINUE( 0x08000, 0x08000 )
ROM_LOAD( "633i02.17a", 0x10000, 0x10000, CRC(b2f7bd9a) SHA1(6c29568419bc49f0be3995b0c34edd9038f6f8d9) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -309,20 +309,20 @@ ROM_START( contrab )
/* This last section, 0x70000-0x7ffff is empty */
ROM_REGION( 0x0500, "proms", 0 )
- ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
- ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
- ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
- ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
- ROM_LOAD( "conprom.53", 0x0400, 0x0100, CRC(05a1da7e) SHA1(ec0bdfc9da05c99e6a283014769db6d641f1a0aa) ) /* unknown (only present in this bootleg) */
+ ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
+ ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
+ ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
+ ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
+ ROM_LOAD( "conprom.53", 0x0400, 0x0100, CRC(05a1da7e) SHA1(ec0bdfc9da05c99e6a283014769db6d641f1a0aa) ) /* unknown (only present in this bootleg) */
ROM_END
ROM_START( contraj )
- ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
+ ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
ROM_LOAD( "633n03.18a", 0x20000, 0x08000, CRC(fedab568) SHA1(7fd4546335bdeef7f8326d4cbde7fa36d74e5cfc) )
ROM_CONTINUE( 0x08000, 0x08000 )
ROM_LOAD( "633k02.17a", 0x10000, 0x10000, CRC(5d5f7438) SHA1(489fe56ca57ef4f6a7792fba07a9656009f3f285) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -334,22 +334,22 @@ ROM_START( contraj )
ROM_LOAD16_BYTE( "633e07.16f", 0x00001, 0x40000, CRC(f2d06638) SHA1(0fa0fbfc53ab5c31b9de22f90153d9af37ff22ce) )
ROM_REGION( 0x0400, "proms", 0 )
- ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
- ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
- ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
- ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
+ ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
+ ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
+ ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
+ ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
ROM_REGION( 0x0001, "pals", 0 )
ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
ROM_END
ROM_START( contrajb )
- ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
+ ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
ROM_LOAD( "g-2.18a", 0x20000, 0x08000, CRC(bdb9196d) SHA1(fad170e8fda94c9c9d7b82433daa30b80af12efc) )
ROM_CONTINUE( 0x08000, 0x08000 )
ROM_LOAD( "633k02.17a", 0x10000, 0x10000, CRC(5d5f7438) SHA1(489fe56ca57ef4f6a7792fba07a9656009f3f285) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -376,19 +376,19 @@ ROM_START( contrajb )
ROM_REGION( 0x0400, "proms", 0 )
- ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
- ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
- ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
- ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
+ ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
+ ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
+ ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
+ ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
ROM_END
ROM_START( gryzor )
- ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
+ ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
ROM_LOAD( "g2.18a", 0x20000, 0x08000, CRC(92ca77bd) SHA1(3a56f51a617edff9f2a60df0141dff040881b82a) )
ROM_CONTINUE( 0x08000, 0x08000 )
ROM_LOAD( "g3.17a", 0x10000, 0x10000, CRC(bbd9e95e) SHA1(fd5de1bcc485de7b8fc2e321351c2e3ddd25d053) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -400,22 +400,22 @@ ROM_START( gryzor )
ROM_LOAD16_BYTE( "633e07.16f", 0x00001, 0x40000, CRC(f2d06638) SHA1(0fa0fbfc53ab5c31b9de22f90153d9af37ff22ce) )
ROM_REGION( 0x0400, "proms", 0 )
- ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
- ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
- ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
- ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
+ ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
+ ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
+ ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
+ ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
ROM_REGION( 0x0001, "pals", 0 )
ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
ROM_END
ROM_START( gryzora )
- ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
+ ROM_REGION( 0x30000, "maincpu", ROMREGION_ERASEFF ) /* 64k for code + 96k for banked ROMs */
ROM_LOAD( "633j03.18a", 0x20000, 0x08000, CRC(20919162) SHA1(2f375166428ee03f6e8ac0372a373bb8ab35e64c) )
ROM_CONTINUE( 0x08000, 0x08000 )
ROM_LOAD( "633j02.17a", 0x10000, 0x10000, CRC(b5922f9a) SHA1(441a23dc99a908ec2c09c855e73070dbab8c5ae2) )
- ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
+ ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for SOUND code */
ROM_LOAD( "633e01.12a", 0x08000, 0x08000, CRC(d1549255) SHA1(d700c7de36746ba247e3a5d0410b7aa036aa4073) )
ROM_REGION( 0x80000, "gfx1", 0 )
@@ -427,10 +427,10 @@ ROM_START( gryzora )
ROM_LOAD16_BYTE( "633e07.16f", 0x00001, 0x40000, CRC(f2d06638) SHA1(0fa0fbfc53ab5c31b9de22f90153d9af37ff22ce) )
ROM_REGION( 0x0400, "proms", 0 )
- ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
- ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
- ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
- ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
+ ROM_LOAD( "633e08.10g", 0x0000, 0x0100, CRC(9f0949fa) SHA1(7c8fefdcae4523d008a7d39062194c7a80aa3500) ) /* 007121 #0 sprite lookup table */
+ ROM_LOAD( "633e09.12g", 0x0100, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #0 char lookup table */
+ ROM_LOAD( "633f10.18g", 0x0200, 0x0100, CRC(2b244d84) SHA1(c3bde7afb501bae58d07721c637dc06938c22150) ) /* 007121 #1 sprite lookup table */
+ ROM_LOAD( "633f11.20g", 0x0300, 0x0100, CRC(14ca5e19) SHA1(eeee2f8b3d1e4acf47de1e74c4e507ff924591e7) ) /* 007121 #1 char lookup table */
ROM_REGION( 0x0001, "pals", 0 )
ROM_LOAD( "007766.20d.bin", 0x0000, 0x0001, NO_DUMP ) /* PAL16L8A-2CN */
diff --git a/src/mame/drivers/coolpool.c b/src/mame/drivers/coolpool.c
index 5487b9e945a..5d0462936d2 100644
--- a/src/mame/drivers/coolpool.c
+++ b/src/mame/drivers/coolpool.c
@@ -284,23 +284,23 @@ WRITE16_MEMBER(coolpool_state::amerdart_dsp_answer_w)
static int amerdart_trackball_inc(int data)
{
- switch (data & 0x03) /* Bits of opposite track direction must both change with identical levels */
+ switch (data & 0x03) /* Bits of opposite track direction must both change with identical levels */
{
- case 0x00: data ^= 0x03; break;
- case 0x01: data ^= 0x01; break;
- case 0x02: data ^= 0x01; break;
- case 0x03: data ^= 0x03; break;
+ case 0x00: data ^= 0x03; break;
+ case 0x01: data ^= 0x01; break;
+ case 0x02: data ^= 0x01; break;
+ case 0x03: data ^= 0x03; break;
}
return data;
}
static int amerdart_trackball_dec(int data)
{
- switch (data & 0x03) /* Bits of opposite track direction must both change with opposing levels */
+ switch (data & 0x03) /* Bits of opposite track direction must both change with opposing levels */
{
- case 0x00: data ^= 0x01; break;
- case 0x01: data ^= 0x03; break;
- case 0x02: data ^= 0x03; break;
- case 0x03: data ^= 0x01; break;
+ case 0x00: data ^= 0x01; break;
+ case 0x01: data ^= 0x03; break;
+ case 0x02: data ^= 0x03; break;
+ case 0x03: data ^= 0x01; break;
}
return data;
}
@@ -313,42 +313,42 @@ static int amerdart_trackball_direction(address_space &space, int num, int data)
UINT16 result_y = (data & 0x03) >> 0;
- if ((state->m_dx[num] == 0) && (state->m_dy[num] < 0)) { /* Up */
+ if ((state->m_dx[num] == 0) && (state->m_dy[num] < 0)) { /* Up */
state->m_oldy[num]--;
result_x = amerdart_trackball_inc(result_x);
result_y = amerdart_trackball_inc(result_y);
}
- if ((state->m_dx[num] == 0) && (state->m_dy[num] > 0)) { /* Down */
+ if ((state->m_dx[num] == 0) && (state->m_dy[num] > 0)) { /* Down */
state->m_oldy[num]++;
result_x = amerdart_trackball_dec(result_x);
result_y = amerdart_trackball_dec(result_y);
}
- if ((state->m_dx[num] < 0) && (state->m_dy[num] == 0)) { /* Left */
+ if ((state->m_dx[num] < 0) && (state->m_dy[num] == 0)) { /* Left */
state->m_oldx[num]--;
result_x = amerdart_trackball_inc(result_x);
result_y = amerdart_trackball_dec(result_y);
}
- if ((state->m_dx[num] > 0) && (state->m_dy[num] == 0)) { /* Right */
+ if ((state->m_dx[num] > 0) && (state->m_dy[num] == 0)) { /* Right */
state->m_oldx[num]++;
result_x = amerdart_trackball_dec(result_x);
result_y = amerdart_trackball_inc(result_y);
}
- if ((state->m_dx[num] < 0) && (state->m_dy[num] < 0)) { /* Left & Up */
+ if ((state->m_dx[num] < 0) && (state->m_dy[num] < 0)) { /* Left & Up */
state->m_oldx[num]--;
state->m_oldy[num]--;
result_x = amerdart_trackball_inc(result_x);
}
- if ((state->m_dx[num] < 0) && (state->m_dy[num] > 0)) { /* Left & Down */
+ if ((state->m_dx[num] < 0) && (state->m_dy[num] > 0)) { /* Left & Down */
state->m_oldx[num]--;
state->m_oldy[num]++;
result_y = amerdart_trackball_dec(result_y);
}
- if ((state->m_dx[num] > 0) && (state->m_dy[num] < 0)) { /* Right & Up */
+ if ((state->m_dx[num] > 0) && (state->m_dy[num] < 0)) { /* Right & Up */
state->m_oldx[num]++;
state->m_oldy[num]--;
result_y = amerdart_trackball_inc(result_y);
}
- if ((state->m_dx[num] > 0) && (state->m_dy[num] > 0)) { /* Right & Down */
+ if ((state->m_dx[num] > 0) && (state->m_dy[num] > 0)) { /* Right & Down */
state->m_oldx[num]++;
state->m_oldy[num]++;
result_x = amerdart_trackball_dec(result_x);
@@ -401,10 +401,10 @@ READ16_MEMBER(coolpool_state::amerdart_trackball_r)
m_result = (m_lastresult | 0x00ff);
- m_newx[1] = ioport("XAXIS1")->read(); /* Trackball 1 Left - Right */
- m_newy[1] = ioport("YAXIS1")->read(); /* Trackball 1 Up - Down */
- m_newx[2] = ioport("XAXIS2")->read(); /* Trackball 2 Left - Right */
- m_newy[2] = ioport("YAXIS2")->read(); /* Trackball 2 Up - Down */
+ m_newx[1] = ioport("XAXIS1")->read(); /* Trackball 1 Left - Right */
+ m_newy[1] = ioport("YAXIS1")->read(); /* Trackball 1 Up - Down */
+ m_newx[2] = ioport("XAXIS2")->read(); /* Trackball 2 Left - Right */
+ m_newy[2] = ioport("YAXIS2")->read(); /* Trackball 2 Up - Down */
m_dx[1] = (INT8)(m_newx[1] - m_oldx[1]);
m_dy[1] = (INT8)(m_newy[1] - m_oldy[1]);
@@ -456,7 +456,7 @@ TIMER_CALLBACK_MEMBER(coolpool_state::deferred_iop_w)
m_iop_cmd = param;
m_cmd_pending = 1;
- machine().device("dsp")->execute().set_input_line(0, HOLD_LINE); /* ??? I have no idea who should generate this! */
+ machine().device("dsp")->execute().set_input_line(0, HOLD_LINE); /* ??? I have no idea who should generate this! */
/* the DSP polls the status bit so it isn't strictly */
/* necessary to also have an IRQ */
machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(50));
@@ -515,7 +515,7 @@ READ16_MEMBER(coolpool_state::dsp_bio_line_r)
READ16_MEMBER(coolpool_state::dsp_hold_line_r)
{
- return CLEAR_LINE; /* ??? */
+ return CLEAR_LINE; /* ??? */
}
@@ -578,10 +578,10 @@ READ16_MEMBER(coolpool_state::coolpool_input_r)
m_oldx[1]--;
switch (m_result & 0x300)
{
- case 0x000: m_result ^= 0x200; break;
- case 0x100: m_result ^= 0x100; break;
- case 0x200: m_result ^= 0x100; break;
- case 0x300: m_result ^= 0x200; break;
+ case 0x000: m_result ^= 0x200; break;
+ case 0x100: m_result ^= 0x100; break;
+ case 0x200: m_result ^= 0x100; break;
+ case 0x300: m_result ^= 0x200; break;
}
}
if (m_dx[1] > 0)
@@ -589,10 +589,10 @@ READ16_MEMBER(coolpool_state::coolpool_input_r)
m_oldx[1]++;
switch (m_result & 0x300)
{
- case 0x000: m_result ^= 0x100; break;
- case 0x100: m_result ^= 0x200; break;
- case 0x200: m_result ^= 0x200; break;
- case 0x300: m_result ^= 0x100; break;
+ case 0x000: m_result ^= 0x100; break;
+ case 0x100: m_result ^= 0x200; break;
+ case 0x200: m_result ^= 0x200; break;
+ case 0x300: m_result ^= 0x100; break;
}
}
@@ -601,10 +601,10 @@ READ16_MEMBER(coolpool_state::coolpool_input_r)
m_oldy[1]--;
switch (m_result & 0xc00)
{
- case 0x000: m_result ^= 0x800; break;
- case 0x400: m_result ^= 0x400; break;
- case 0x800: m_result ^= 0x400; break;
- case 0xc00: m_result ^= 0x800; break;
+ case 0x000: m_result ^= 0x800; break;
+ case 0x400: m_result ^= 0x400; break;
+ case 0x800: m_result ^= 0x400; break;
+ case 0xc00: m_result ^= 0x800; break;
}
}
if (m_dy[1] > 0)
@@ -612,10 +612,10 @@ READ16_MEMBER(coolpool_state::coolpool_input_r)
m_oldy[1]++;
switch (m_result & 0xc00)
{
- case 0x000: m_result ^= 0x400; break;
- case 0x400: m_result ^= 0x800; break;
- case 0x800: m_result ^= 0x800; break;
- case 0xc00: m_result ^= 0x400; break;
+ case 0x000: m_result ^= 0x400; break;
+ case 0x400: m_result ^= 0x800; break;
+ case 0x800: m_result ^= 0x800; break;
+ case 0xc00: m_result ^= 0x400; break;
}
}
@@ -645,7 +645,7 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( coolpool_map, AS_PROGRAM, 16, coolpool_state )
AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_SHARE("vram_base")
- AM_RANGE(0x01000000, 0x010000ff) AM_DEVREADWRITE8_LEGACY("tlc34076", tlc34076_r, tlc34076_w, 0x00ff) // IMSG176P-40
+ AM_RANGE(0x01000000, 0x010000ff) AM_DEVREADWRITE8_LEGACY("tlc34076", tlc34076_r, tlc34076_w, 0x00ff) // IMSG176P-40
AM_RANGE(0x02000000, 0x020000ff) AM_READWRITE(coolpool_iop_r, coolpool_iop_w)
AM_RANGE(0x03000000, 0x0300000f) AM_WRITE(coolpool_misc_w)
AM_RANGE(0x03000000, 0x03ffffff) AM_ROM AM_REGION("gfx1", 0)
@@ -659,7 +659,7 @@ static ADDRESS_MAP_START( nballsht_map, AS_PROGRAM, 16, coolpool_state )
AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_SHARE("vram_base")
AM_RANGE(0x02000000, 0x020000ff) AM_READWRITE(coolpool_iop_r, coolpool_iop_w)
AM_RANGE(0x03000000, 0x0300000f) AM_WRITE(coolpool_misc_w)
- AM_RANGE(0x04000000, 0x040000ff) AM_DEVREADWRITE8_LEGACY("tlc34076", tlc34076_r, tlc34076_w, 0x00ff) // IMSG176P-40
+ AM_RANGE(0x04000000, 0x040000ff) AM_DEVREADWRITE8_LEGACY("tlc34076", tlc34076_r, tlc34076_w, 0x00ff) // IMSG176P-40
AM_RANGE(0x06000000, 0x0601ffff) AM_MIRROR(0x00020000) AM_RAM_WRITE(nvram_thrash_data_w) AM_SHARE("nvram")
AM_RANGE(0xc0000000, 0xc00001ff) AM_READWRITE_LEGACY(tms34010_io_register_r, tms34010_io_register_w)
AM_RANGE(0xff000000, 0xff7fffff) AM_ROM AM_REGION("gfx1", 0)
@@ -811,29 +811,29 @@ INPUT_PORTS_END
static const tms34010_config tms_config_amerdart =
{
- FALSE, /* halt on reset */
- "screen", /* the screen operated on */
- XTAL_40MHz/12, /* pixel clock */
- 2, /* pixels per clock */
- NULL, /* scanline callback (indexed16) */
- amerdart_scanline, /* scanline callback (rgb32) */
- NULL, /* generate interrupt */
- coolpool_to_shiftreg, /* write to shiftreg function */
- coolpool_from_shiftreg /* read from shiftreg function */
+ FALSE, /* halt on reset */
+ "screen", /* the screen operated on */
+ XTAL_40MHz/12, /* pixel clock */
+ 2, /* pixels per clock */
+ NULL, /* scanline callback (indexed16) */
+ amerdart_scanline, /* scanline callback (rgb32) */
+ NULL, /* generate interrupt */
+ coolpool_to_shiftreg, /* write to shiftreg function */
+ coolpool_from_shiftreg /* read from shiftreg function */
};
static const tms34010_config tms_config_coolpool =
{
- FALSE, /* halt on reset */
- "screen", /* the screen operated on */
- XTAL_40MHz/6, /* pixel clock */
- 1, /* pixels per clock */
- NULL, /* scanline callback (indexed16) */
- coolpool_scanline, /* scanline callback (rgb32) */
- NULL, /* generate interrupt */
- coolpool_to_shiftreg, /* write to shiftreg function */
- coolpool_from_shiftreg /* read from shiftreg function */
+ FALSE, /* halt on reset */
+ "screen", /* the screen operated on */
+ XTAL_40MHz/6, /* pixel clock */
+ 1, /* pixels per clock */
+ NULL, /* scanline callback (indexed16) */
+ coolpool_scanline, /* scanline callback (rgb32) */
+ NULL, /* generate interrupt */
+ coolpool_to_shiftreg, /* write to shiftreg function */
+ coolpool_from_shiftreg /* read from shiftreg function */
};
@@ -921,7 +921,7 @@ MACHINE_CONFIG_END
*************************************/
ROM_START( amerdart ) /* You need to check the sum16 values listed on the labels to determine different sets */
- ROM_REGION16_LE( 0x0a0000, "user1", 0 ) /* 34010 code */
+ ROM_REGION16_LE( 0x0a0000, "user1", 0 ) /* 34010 code */
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u31 4e74", 0x000001, 0x10000, CRC(9628c422) SHA1(46b71acc746760962e34e9d7876f9499ea7d5c7c) )
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u32 0ef7", 0x000000, 0x10000, CRC(2d651ed0) SHA1(e2da2c3d8f25c17e26fd435c75983b2db8691993) )
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u38 10b4", 0x020001, 0x10000, CRC(1eb8c887) SHA1(220f566043535c54ad1cf2216966c7f42099e50b) )
@@ -933,10 +933,10 @@ ROM_START( amerdart ) /* You need to check the sum16 values listed on the labels
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u57 6016", 0x080001, 0x10000, CRC(f620f935) SHA1(bf891fce1f04f3ad5b8b72d43d041ceacb0b65bc) ) /* Different then set 2 or 3 */
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u58 48af", 0x080000, 0x10000, CRC(f1b3d7c4) SHA1(7b897230d110be7a5eb05eda927d00561ebb9ce3) ) /* Different then set 2 or 3 */
- ROM_REGION( 0x10000, "dsp", 0 ) /* TMS32015 code */
+ ROM_REGION( 0x10000, "dsp", 0 ) /* TMS32015 code */
ROM_LOAD16_WORD( "tms320e15.bin", 0x0000, 0x2000, CRC(375DB4EA) SHA1(11689C89CE62F44F43CB8973B4EC6E6B0024ED14) ) /* Passes internal checksum routine */
- ROM_REGION( 0x100000, "user2", 0 ) /* TMS32015 audio sample data */
+ ROM_REGION( 0x100000, "user2", 0 ) /* TMS32015 audio sample data */
ROM_LOAD16_WORD( "ameri corp copyright 1989 u1 4461", 0x000000, 0x10000, CRC(3f459482) SHA1(d9d489efd0d9217fceb3bf1a3b37a78d6823b4d9) ) /* Different then set 2 or 3 */
ROM_LOAD16_WORD( "ameri corp copyright 1989 u16 abd6", 0x010000, 0x10000, CRC(7437e8bf) SHA1(754be4822cd586590f09e706d7eb48e5ba8c8817) )
ROM_LOAD16_WORD( "ameri corp copyright 1989 u2 cae4", 0x020000, 0x10000, CRC(a587fffd) SHA1(f33f511d1bf1d6eb3c42535593a9718571174c4b) )
@@ -956,7 +956,7 @@ ROM_START( amerdart ) /* You need to check the sum16 values listed on the labels
ROM_END
ROM_START( amerdart2 ) /* You need to check the sum16 values listed on the labels to determine different sets */
- ROM_REGION16_LE( 0x0a0000, "user1", 0 ) /* 34010 code */
+ ROM_REGION16_LE( 0x0a0000, "user1", 0 ) /* 34010 code */
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u31 4e74", 0x000001, 0x10000, CRC(9628c422) SHA1(46b71acc746760962e34e9d7876f9499ea7d5c7c) )
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u32 0ef7", 0x000000, 0x10000, CRC(2d651ed0) SHA1(e2da2c3d8f25c17e26fd435c75983b2db8691993) )
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u38 10b4", 0x020001, 0x10000, CRC(1eb8c887) SHA1(220f566043535c54ad1cf2216966c7f42099e50b) )
@@ -968,10 +968,10 @@ ROM_START( amerdart2 ) /* You need to check the sum16 values listed on the label
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u57 1a0c", 0x080001, 0x10000, CRC(8a70f849) SHA1(dfd4cf90de2ab8cbeff458f0fd20110c1ed009e9) ) /* Different then set 1 or 3 */
ROM_LOAD16_BYTE( "ameri corp copyright 1989 u58 0d81", 0x080000, 0x10000, CRC(8bb81975) SHA1(b7666572ab543991c7deaa0ebefb8b4526a7e386) ) /* Different then set 1 or 3 */
- ROM_REGION( 0x10000, "dsp", 0 ) /* TMS32015 code */
+ ROM_REGION( 0x10000, "dsp", 0 ) /* TMS32015 code */
ROM_LOAD16_WORD( "tms320e15.bin", 0x0000, 0x2000, CRC(375DB4EA) SHA1(11689C89CE62F44F43CB8973B4EC6E6B0024ED14) ) /* Passes internal checksum routine */
- ROM_REGION( 0x100000, "user2", 0 ) /* TMS32015 audio sample data */
+ ROM_REGION( 0x100000, "user2", 0 ) /* TMS32015 audio sample data */
ROM_LOAD16_WORD( "ameri corp copyright 1989 u1 222f", 0x000000, 0x10000, CRC(e2bb7f54) SHA1(39eeb61a852b93331f445cc1c993727e52959660) ) /* Different then set 1 */
ROM_LOAD16_WORD( "ameri corp copyright 1989 u16 abd6", 0x010000, 0x10000, CRC(7437e8bf) SHA1(754be4822cd586590f09e706d7eb48e5ba8c8817) )
ROM_LOAD16_WORD( "ameri corp copyright 1989 u2 cae4", 0x020000, 0x10000, CRC(a587fffd) SHA1(f33f511d1bf1d6eb3c42535593a9718571174c4b) )
@@ -991,7 +991,7 @@ ROM_START( amerdart2 ) /* You need to check the sum16 values listed on the label